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-rw-r--r--sim/ChangeLog506
-rw-r--r--sim/MAINTAINERS8
-rw-r--r--sim/Makefile.in254
-rw-r--r--sim/README-HACKING254
-rw-r--r--sim/arm/COPYING340
-rw-r--r--sim/arm/ChangeLog825
-rw-r--r--sim/arm/Makefile.in50
-rw-r--r--sim/arm/README.Cygnus27
-rw-r--r--sim/arm/acconfig.h15
-rw-r--r--sim/arm/armcopro.c1420
-rw-r--r--sim/arm/armdefs.h416
-rw-r--r--sim/arm/armemu.c4847
-rw-r--r--sim/arm/armemu.h496
-rw-r--r--sim/arm/armfpe.h1352
-rw-r--r--sim/arm/arminit.c319
-rw-r--r--sim/arm/armopts.h23
-rw-r--r--sim/arm/armos.c680
-rw-r--r--sim/arm/armos.h97
-rw-r--r--sim/arm/armrdi.c1247
-rw-r--r--sim/arm/armsupp.c887
-rw-r--r--sim/arm/armvirt.c520
-rw-r--r--sim/arm/bag.c166
-rw-r--r--sim/arm/bag.h43
-rw-r--r--sim/arm/communicate.c255
-rw-r--r--sim/arm/communicate.h36
-rw-r--r--sim/arm/config.in158
-rwxr-xr-xsim/arm/configure4026
-rw-r--r--sim/arm/configure.in13
-rw-r--r--sim/arm/dbg_conf.h50
-rw-r--r--sim/arm/dbg_cp.h70
-rw-r--r--sim/arm/dbg_hif.h48
-rw-r--r--sim/arm/dbg_rdi.h332
-rw-r--r--sim/arm/gdbhost.c113
-rw-r--r--sim/arm/gdbhost.h23
-rw-r--r--sim/arm/kid.c540
-rw-r--r--sim/arm/main.c194
-rw-r--r--sim/arm/parent.c481
-rw-r--r--sim/arm/tconfig.in17
-rw-r--r--sim/arm/thumbemu.c559
-rw-r--r--sim/arm/wrapper.c534
-rw-r--r--sim/common/ChangeLog4675
-rw-r--r--sim/common/Make-common.in714
-rw-r--r--sim/common/Makefile.in136
-rw-r--r--sim/common/acconfig.h15
-rw-r--r--sim/common/aclocal.m41228
-rw-r--r--sim/common/callback.c810
-rw-r--r--sim/common/cgen-accfp.c706
-rw-r--r--sim/common/cgen-cpu.h106
-rw-r--r--sim/common/cgen-defs.h183
-rw-r--r--sim/common/cgen-engine.h431
-rw-r--r--sim/common/cgen-fpu.c32
-rw-r--r--sim/common/cgen-fpu.h212
-rw-r--r--sim/common/cgen-mem.h229
-rw-r--r--sim/common/cgen-ops.h601
-rw-r--r--sim/common/cgen-par.c490
-rw-r--r--sim/common/cgen-par.h211
-rw-r--r--sim/common/cgen-run.c237
-rw-r--r--sim/common/cgen-scache.c476
-rw-r--r--sim/common/cgen-scache.h162
-rw-r--r--sim/common/cgen-sim.h36
-rw-r--r--sim/common/cgen-trace.c436
-rw-r--r--sim/common/cgen-trace.h91
-rw-r--r--sim/common/cgen-types.h112
-rw-r--r--sim/common/cgen-utils.c438
-rw-r--r--sim/common/cgen.sh222
-rw-r--r--sim/common/config.in182
-rwxr-xr-xsim/common/configure4049
-rw-r--r--sim/common/configure.in41
-rw-r--r--sim/common/dv-core.c116
-rw-r--r--sim/common/dv-glue.c373
-rw-r--r--sim/common/dv-pal.c605
-rw-r--r--sim/common/dv-sockser.c388
-rw-r--r--sim/common/dv-sockser.h32
-rw-r--r--sim/common/gdbinit.in10
-rw-r--r--sim/common/genmloop.sh1334
-rw-r--r--sim/common/gennltvals.sh66
-rw-r--r--sim/common/gentmap.c125
-rw-r--r--sim/common/gentvals.sh74
-rw-r--r--sim/common/hw-alloc.c97
-rw-r--r--sim/common/hw-alloc.h49
-rw-r--r--sim/common/hw-base.c576
-rw-r--r--sim/common/hw-base.h108
-rw-r--r--sim/common/hw-device.c66
-rw-r--r--sim/common/hw-device.h535
-rw-r--r--sim/common/hw-events.c273
-rw-r--r--sim/common/hw-events.h65
-rw-r--r--sim/common/hw-handles.c237
-rw-r--r--sim/common/hw-handles.h63
-rw-r--r--sim/common/hw-instances.c286
-rw-r--r--sim/common/hw-instances.h157
-rw-r--r--sim/common/hw-main.h73
-rw-r--r--sim/common/hw-ports.c339
-rw-r--r--sim/common/hw-ports.h129
-rw-r--r--sim/common/hw-properties.c906
-rw-r--r--sim/common/hw-properties.h244
-rw-r--r--sim/common/hw-tree.c1345
-rw-r--r--sim/common/hw-tree.h119
-rw-r--r--sim/common/nltvals.def418
-rw-r--r--sim/common/nrun.c212
-rw-r--r--sim/common/run.1463
-rw-r--r--sim/common/run.c338
-rw-r--r--sim/common/sim-abort.c60
-rw-r--r--sim/common/sim-alu.h1047
-rw-r--r--sim/common/sim-arange.c305
-rw-r--r--sim/common/sim-arange.h83
-rw-r--r--sim/common/sim-assert.h90
-rw-r--r--sim/common/sim-base.h256
-rw-r--r--sim/common/sim-basics.h154
-rw-r--r--sim/common/sim-bits.c270
-rw-r--r--sim/common/sim-bits.h608
-rw-r--r--sim/common/sim-break.c278
-rw-r--r--sim/common/sim-break.h38
-rw-r--r--sim/common/sim-config.c377
-rw-r--r--sim/common/sim-config.h594
-rw-r--r--sim/common/sim-core.c836
-rw-r--r--sim/common/sim-core.h352
-rw-r--r--sim/common/sim-cpu.c80
-rw-r--r--sim/common/sim-cpu.h152
-rw-r--r--sim/common/sim-endian.c128
-rw-r--r--sim/common/sim-endian.h414
-rw-r--r--sim/common/sim-engine.c210
-rw-r--r--sim/common/sim-engine.h161
-rw-r--r--sim/common/sim-events.c1201
-rw-r--r--sim/common/sim-events.h277
-rw-r--r--sim/common/sim-fpu.c2567
-rw-r--r--sim/common/sim-fpu.h424
-rw-r--r--sim/common/sim-hload.c63
-rw-r--r--sim/common/sim-hrw.c41
-rw-r--r--sim/common/sim-hw.c519
-rw-r--r--sim/common/sim-hw.h98
-rw-r--r--sim/common/sim-info.c32
-rw-r--r--sim/common/sim-inline.c96
-rw-r--r--sim/common/sim-inline.h810
-rw-r--r--sim/common/sim-io.c389
-rw-r--r--sim/common/sim-io.h84
-rw-r--r--sim/common/sim-load.c241
-rw-r--r--sim/common/sim-memopt.c579
-rw-r--r--sim/common/sim-memopt.h47
-rw-r--r--sim/common/sim-model.c215
-rw-r--r--sim/common/sim-model.h141
-rw-r--r--sim/common/sim-module.c399
-rw-r--r--sim/common/sim-module.h125
-rw-r--r--sim/common/sim-n-bits.h218
-rw-r--r--sim/common/sim-n-core.h417
-rw-r--r--sim/common/sim-n-endian.h169
-rw-r--r--sim/common/sim-options.c979
-rw-r--r--sim/common/sim-options.h149
-rw-r--r--sim/common/sim-profile.c1274
-rw-r--r--sim/common/sim-profile.h297
-rw-r--r--sim/common/sim-reason.c57
-rw-r--r--sim/common/sim-reg.c52
-rw-r--r--sim/common/sim-resume.c90
-rw-r--r--sim/common/sim-run.c51
-rw-r--r--sim/common/sim-signal.c96
-rw-r--r--sim/common/sim-signal.h49
-rw-r--r--sim/common/sim-stop.c43
-rw-r--r--sim/common/sim-trace.c1354
-rw-r--r--sim/common/sim-trace.h567
-rw-r--r--sim/common/sim-types.h209
-rw-r--r--sim/common/sim-utils.c413
-rw-r--r--sim/common/sim-utils.h90
-rw-r--r--sim/common/sim-watch.c458
-rw-r--r--sim/common/sim-watch.h78
-rw-r--r--sim/common/syscall.c482
-rw-r--r--sim/common/tconfig.in19
-rwxr-xr-xsim/configure1924
-rw-r--r--sim/configure.in185
-rw-r--r--sim/d10v/ChangeLog1188
-rw-r--r--sim/d10v/Makefile.in53
-rw-r--r--sim/d10v/acconfig.h15
-rw-r--r--sim/d10v/config.in158
-rwxr-xr-xsim/d10v/configure4062
-rw-r--r--sim/d10v/configure.in13
-rw-r--r--sim/d10v/d10v_sim.h487
-rw-r--r--sim/d10v/endian.c137
-rw-r--r--sim/d10v/gencode.c156
-rw-r--r--sim/d10v/interp.c1460
-rw-r--r--sim/d10v/simops.c3628
-rw-r--r--sim/d30v/ChangeLog1380
-rw-r--r--sim/d30v/Makefile.in217
-rw-r--r--sim/d30v/acconfig.h15
-rw-r--r--sim/d30v/alu.h106
-rw-r--r--sim/d30v/config.in162
-rwxr-xr-xsim/d30v/configure4410
-rw-r--r--sim/d30v/configure.in40
-rw-r--r--sim/d30v/cpu.c172
-rw-r--r--sim/d30v/cpu.h249
-rw-r--r--sim/d30v/d30v-insns2424
-rw-r--r--sim/d30v/dc-short22
-rw-r--r--sim/d30v/engine.c496
-rw-r--r--sim/d30v/ic-d30v80
-rw-r--r--sim/d30v/sim-calls.c364
-rw-r--r--sim/d30v/sim-main.h82
-rw-r--r--sim/d30v/tconfig.in8
-rw-r--r--sim/erc32/ChangeLog603
-rw-r--r--sim/erc32/Makefile.in75
-rw-r--r--sim/erc32/NEWS108
-rw-r--r--sim/erc32/README.erc32130
-rw-r--r--sim/erc32/README.gdb67
-rw-r--r--sim/erc32/README.sis356
-rw-r--r--sim/erc32/acconfig.h15
-rw-r--r--sim/erc32/config.in158
-rwxr-xr-xsim/erc32/configure4096
-rw-r--r--sim/erc32/configure.in24
-rw-r--r--sim/erc32/end.c26
-rw-r--r--sim/erc32/erc32.c1888
-rw-r--r--sim/erc32/exec.c2041
-rw-r--r--sim/erc32/float.c212
-rw-r--r--sim/erc32/func.c1162
-rw-r--r--sim/erc32/help.c40
-rw-r--r--sim/erc32/interf.c526
-rw-r--r--sim/erc32/sis.c310
-rw-r--r--sim/erc32/sis.h217
-rw-r--r--sim/erc32/startsim4
-rw-r--r--sim/fr30/ChangeLog412
-rw-r--r--sim/fr30/Makefile.in107
-rw-r--r--sim/fr30/README14
-rw-r--r--sim/fr30/TODO14
-rw-r--r--sim/fr30/arch.c35
-rw-r--r--sim/fr30/arch.h45
-rw-r--r--sim/fr30/config.in162
-rw-r--r--sim/fr30/configure4294
-rw-r--r--sim/fr30/configure.in16
-rw-r--r--sim/fr30/cpu.c357
-rw-r--r--sim/fr30/cpu.h890
-rw-r--r--sim/fr30/cpuall.h66
-rw-r--r--sim/fr30/decode.c2956
-rw-r--r--sim/fr30/decode.h125
-rw-r--r--sim/fr30/devices.c98
-rw-r--r--sim/fr30/fr30-sim.h96
-rw-r--r--sim/fr30/fr30.c423
-rw-r--r--sim/fr30/mloop.in236
-rw-r--r--sim/fr30/model.c4004
-rw-r--r--sim/fr30/sem-switch.c5409
-rw-r--r--sim/fr30/sem.c5730
-rw-r--r--sim/fr30/sim-if.c208
-rw-r--r--sim/fr30/sim-main.h70
-rw-r--r--sim/fr30/tconfig.in42
-rw-r--r--sim/fr30/traps.c218
-rw-r--r--sim/h8300/ChangeLog632
-rw-r--r--sim/h8300/Makefile.in25
-rw-r--r--sim/h8300/acconfig.h15
-rw-r--r--sim/h8300/compile.c2145
-rw-r--r--sim/h8300/config.in158
-rwxr-xr-xsim/h8300/configure4024
-rw-r--r--sim/h8300/configure.in10
-rw-r--r--sim/h8300/inst.h89
-rw-r--r--sim/h8300/tconfig.in17
-rw-r--r--sim/h8300/writecode.c1033
-rw-r--r--sim/h8500/ChangeLog425
-rw-r--r--sim/h8500/Makefile.in28
-rw-r--r--sim/h8500/acconfig.h15
-rw-r--r--sim/h8500/compile.c2519
-rw-r--r--sim/h8500/config.in158
-rwxr-xr-xsim/h8500/configure4024
-rw-r--r--sim/h8500/configure.in10
-rw-r--r--sim/h8500/inst.h101
-rw-r--r--sim/h8500/tconfig.in13
-rw-r--r--sim/i960/ChangeLog198
-rw-r--r--sim/i960/Makefile.in125
-rw-r--r--sim/i960/README23
-rw-r--r--sim/i960/TODO64
-rw-r--r--sim/i960/acconfig.h15
-rw-r--r--sim/i960/arch.c38
-rw-r--r--sim/i960/arch.h44
-rw-r--r--sim/i960/config.in162
-rwxr-xr-xsim/i960/configure4294
-rw-r--r--sim/i960/configure.in16
-rw-r--r--sim/i960/cpu.c85
-rw-r--r--sim/i960/cpu.h601
-rw-r--r--sim/i960/cpuall.h67
-rw-r--r--sim/i960/decode.c5569
-rw-r--r--sim/i960/decode.h160
-rw-r--r--sim/i960/devices.c107
-rw-r--r--sim/i960/i960-desc.c2106
-rw-r--r--sim/i960/i960-desc.h317
-rw-r--r--sim/i960/i960-opc.h170
-rw-r--r--sim/i960/i960-sim.h54
-rw-r--r--sim/i960/i960.c205
-rw-r--r--sim/i960/mloop.in301
-rw-r--r--sim/i960/model.c10065
-rw-r--r--sim/i960/sem-switch.c7345
-rw-r--r--sim/i960/sem.c7918
-rw-r--r--sim/i960/sim-if.c311
-rw-r--r--sim/i960/sim-main.h69
-rw-r--r--sim/i960/tconfig.in49
-rw-r--r--sim/i960/traps.c214
-rw-r--r--sim/igen/ChangeLog1020
-rw-r--r--sim/igen/Makefile.in184
-rw-r--r--sim/igen/acconfig.h15
-rw-r--r--sim/igen/config.in31
-rwxr-xr-xsim/igen/configure1838
-rw-r--r--sim/igen/configure.in52
-rw-r--r--sim/igen/filter.c355
-rw-r--r--sim/igen/filter.h86
-rw-r--r--sim/igen/filter_host.c37
-rw-r--r--sim/igen/filter_host.h27
-rw-r--r--sim/igen/gen-engine.c807
-rw-r--r--sim/igen/gen-engine.h37
-rw-r--r--sim/igen/gen-icache.c859
-rw-r--r--sim/igen/gen-icache.h81
-rw-r--r--sim/igen/gen-idecode.c1391
-rw-r--r--sim/igen/gen-idecode.h50
-rw-r--r--sim/igen/gen-itable.c317
-rw-r--r--sim/igen/gen-itable.h30
-rw-r--r--sim/igen/gen-model.c416
-rw-r--r--sim/igen/gen-model.h29
-rw-r--r--sim/igen/gen-semantics.c390
-rw-r--r--sim/igen/gen-semantics.h104
-rw-r--r--sim/igen/gen-support.c219
-rw-r--r--sim/igen/gen-support.h29
-rw-r--r--sim/igen/gen.c1765
-rw-r--r--sim/igen/gen.h227
-rw-r--r--sim/igen/igen.c1621
-rw-r--r--sim/igen/igen.h234
-rw-r--r--sim/igen/ld-cache.c114
-rw-r--r--sim/igen/ld-cache.h66
-rw-r--r--sim/igen/ld-decode.c404
-rw-r--r--sim/igen/ld-decode.h235
-rw-r--r--sim/igen/ld-insn.c1829
-rw-r--r--sim/igen/ld-insn.h703
-rw-r--r--sim/igen/lf.c418
-rw-r--r--sim/igen/lf.h143
-rw-r--r--sim/igen/misc.c284
-rw-r--r--sim/igen/misc.h149
-rw-r--r--sim/igen/table.c632
-rw-r--r--sim/igen/table.h155
-rw-r--r--sim/m32r/ChangeLog1364
-rw-r--r--sim/m32r/Makefile.in145
-rw-r--r--sim/m32r/README14
-rw-r--r--sim/m32r/TODO9
-rw-r--r--sim/m32r/acconfig.h15
-rw-r--r--sim/m32r/arch.c38
-rw-r--r--sim/m32r/arch.h47
-rw-r--r--sim/m32r/config.in162
-rwxr-xr-xsim/m32r/configure4341
-rw-r--r--sim/m32r/configure.in17
-rw-r--r--sim/m32r/cpu.c181
-rw-r--r--sim/m32r/cpu.h638
-rw-r--r--sim/m32r/cpuall.h74
-rw-r--r--sim/m32r/cpux.c197
-rw-r--r--sim/m32r/cpux.h958
-rw-r--r--sim/m32r/decode.c1779
-rw-r--r--sim/m32r/decode.h98
-rw-r--r--sim/m32r/decodex.c2141
-rw-r--r--sim/m32r/decodex.h143
-rw-r--r--sim/m32r/devices.c107
-rw-r--r--sim/m32r/m32r-sim.h231
-rw-r--r--sim/m32r/m32r.c521
-rw-r--r--sim/m32r/m32rx.c311
-rw-r--r--sim/m32r/mloop.in319
-rw-r--r--sim/m32r/mloopx.in484
-rw-r--r--sim/m32r/model.c4168
-rw-r--r--sim/m32r/modelx.c2899
-rw-r--r--sim/m32r/sem-switch.c2515
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-rw-r--r--sim/m32r/sim-if.c292
-rw-r--r--sim/m32r/sim-main.h88
-rw-r--r--sim/m32r/tconfig.in47
-rw-r--r--sim/m32r/traps.c182
-rw-r--r--sim/m68hc11/ChangeLog346
-rw-r--r--sim/m68hc11/Makefile.in64
-rw-r--r--sim/m68hc11/config.in174
-rwxr-xr-xsim/m68hc11/configure4353
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-rw-r--r--sim/m68hc11/dv-m68hc11.c593
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-rw-r--r--sim/m68hc11/dv-m68hc11sio.c661
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-rw-r--r--sim/m68hc11/dv-m68hc11tim.c694
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-rw-r--r--sim/mcore/ChangeLog74
-rw-r--r--sim/mcore/Makefile.in29
-rw-r--r--sim/mcore/config.in34
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-rw-r--r--sim/mcore/configure.in10
-rw-r--r--sim/mcore/interp.c2214
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-rw-r--r--sim/mips/ChangeLog2232
-rw-r--r--sim/mips/Makefile.in293
-rw-r--r--sim/mips/acconfig.h15
-rw-r--r--sim/mips/config.in174
-rwxr-xr-xsim/mips/configure4988
-rw-r--r--sim/mips/configure.in171
-rw-r--r--sim/mips/dv-tx3904cpu.c246
-rw-r--r--sim/mips/dv-tx3904irc.c413
-rw-r--r--sim/mips/dv-tx3904sio.c622
-rw-r--r--sim/mips/dv-tx3904tmr.c698
-rw-r--r--sim/mips/interp.c3467
-rw-r--r--sim/mips/m16.dc25
-rw-r--r--sim/mips/m16.igen1236
-rw-r--r--sim/mips/m16run.c74
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-rw-r--r--sim/mips/sim-main.c564
-rw-r--r--sim/mips/sim-main.h788
-rw-r--r--sim/mips/tconfig.in33
-rw-r--r--sim/mips/tx.igen46
-rw-r--r--sim/mips/vr.igen78
-rw-r--r--sim/mn10200/ChangeLog455
-rw-r--r--sim/mn10200/Makefile.in52
-rw-r--r--sim/mn10200/acconfig.h15
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-rw-r--r--sim/mn10200/gencode.c154
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-rw-r--r--sim/mn10200/mn10200_sim.h297
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-rw-r--r--sim/mn10300/ChangeLog978
-rw-r--r--sim/mn10300/Makefile.in159
-rw-r--r--sim/mn10300/acconfig.h15
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-rw-r--r--sim/testsuite/sim/m32r/hello.ms19
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-rw-r--r--sim/testsuite/sim/m32r/ld.cgs21
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-rw-r--r--sim/testsuite/sim/m32r/ldi16.cgs14
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-rw-r--r--sim/testsuite/sim/m32r/ldub.cgs21
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-rw-r--r--sim/testsuite/sim/m32r/lduh.cgs22
-rw-r--r--sim/testsuite/sim/m32r/lock.cgs25
-rw-r--r--sim/testsuite/sim/m32r/machi.cgs17
-rw-r--r--sim/testsuite/sim/m32r/maclo.cgs17
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-rw-r--r--sim/testsuite/sim/m32r/misc.exp21
-rw-r--r--sim/testsuite/sim/m32r/mul.cgs17
-rw-r--r--sim/testsuite/sim/m32r/mulhi.cgs16
-rw-r--r--sim/testsuite/sim/m32r/mullo.cgs16
-rw-r--r--sim/testsuite/sim/m32r/mulwhi.cgs18
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-rw-r--r--sim/testsuite/sim/m32r/mvtc.cgs18
-rw-r--r--sim/testsuite/sim/m32r/neg.cgs17
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-rw-r--r--sim/testsuite/sim/m32r/not.cgs17
-rw-r--r--sim/testsuite/sim/m32r/or.cgs17
-rw-r--r--sim/testsuite/sim/m32r/or3.cgs17
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-rw-r--r--sim/testsuite/sim/m32r/rem.cgs17
-rw-r--r--sim/testsuite/sim/m32r/remu.cgs23
-rw-r--r--sim/testsuite/sim/m32r/rte.cgs87
-rw-r--r--sim/testsuite/sim/m32r/seth.cgs20
-rw-r--r--sim/testsuite/sim/m32r/sll.cgs15
-rw-r--r--sim/testsuite/sim/m32r/sll3.cgs15
-rw-r--r--sim/testsuite/sim/m32r/slli.cgs14
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-rw-r--r--sim/testsuite/sim/m32r/sra3.cgs16
-rw-r--r--sim/testsuite/sim/m32r/srai.cgs14
-rw-r--r--sim/testsuite/sim/m32r/srl.cgs15
-rw-r--r--sim/testsuite/sim/m32r/srl3.cgs15
-rw-r--r--sim/testsuite/sim/m32r/srli.cgs15
-rw-r--r--sim/testsuite/sim/m32r/st-d.cgs26
-rw-r--r--sim/testsuite/sim/m32r/st-minus.cgs29
-rw-r--r--sim/testsuite/sim/m32r/st-plus.cgs28
-rw-r--r--sim/testsuite/sim/m32r/st.cgs21
-rw-r--r--sim/testsuite/sim/m32r/stb-d.cgs25
-rw-r--r--sim/testsuite/sim/m32r/stb.cgs21
-rw-r--r--sim/testsuite/sim/m32r/sth-d.cgs25
-rw-r--r--sim/testsuite/sim/m32r/sth.cgs21
-rw-r--r--sim/testsuite/sim/m32r/sub.cgs18
-rw-r--r--sim/testsuite/sim/m32r/subv.cgs20
-rw-r--r--sim/testsuite/sim/m32r/subx.cgs26
-rw-r--r--sim/testsuite/sim/m32r/testutils.inc95
-rw-r--r--sim/testsuite/sim/m32r/trap.cgs109
-rw-r--r--sim/testsuite/sim/m32r/unlock.cgs30
-rw-r--r--sim/testsuite/sim/m32r/uread16.ms18
-rw-r--r--sim/testsuite/sim/m32r/uread32.ms18
-rw-r--r--sim/testsuite/sim/m32r/uwrite16.ms18
-rw-r--r--sim/testsuite/sim/m32r/uwrite32.ms18
-rw-r--r--sim/testsuite/sim/m32r/xor.cgs16
-rw-r--r--sim/testsuite/sim/m32r/xor3.cgs16
-rw-r--r--sim/tic80/ChangeLog662
-rw-r--r--sim/tic80/Makefile.in140
-rw-r--r--sim/tic80/acconfig.h15
-rw-r--r--sim/tic80/alu.h75
-rw-r--r--sim/tic80/config.in168
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-rw-r--r--sim/tic80/cpu.h345
-rw-r--r--sim/tic80/interp.c127
-rw-r--r--sim/tic80/misc.c624
-rw-r--r--sim/tic80/sim-calls.c203
-rw-r--r--sim/tic80/sim-main.h81
-rw-r--r--sim/tic80/tic80.dc6
-rw-r--r--sim/tic80/tic80.ic52
-rw-r--r--sim/tic80/tic80.igen1615
-rw-r--r--sim/v850/ChangeLog1094
-rw-r--r--sim/v850/Makefile.in140
-rw-r--r--sim/v850/acconfig.h15
-rw-r--r--sim/v850/config.in183
-rwxr-xr-xsim/v850/configure4412
-rw-r--r--sim/v850/configure.in18
-rw-r--r--sim/v850/gencode.c149
-rw-r--r--sim/v850/interp.c360
-rw-r--r--sim/v850/sim-main.h388
-rw-r--r--sim/v850/simops.c2733
-rw-r--r--sim/v850/v850-dc30
-rw-r--r--sim/v850/v850.igen1418
-rw-r--r--sim/v850/v850_sim.h8
-rw-r--r--sim/w65/ChangeLog148
-rw-r--r--sim/w65/Makefile.in247
-rw-r--r--sim/w65/acconfig.h18
-rw-r--r--sim/w65/config.in131
-rwxr-xr-xsim/w65/configure3354
-rw-r--r--sim/w65/configure.in48
-rw-r--r--sim/w65/gencode.c991
-rw-r--r--sim/w65/interp.c388
-rw-r--r--sim/w65/interp.h194
-rw-r--r--sim/w65/run.c131
-rw-r--r--sim/z8k/ChangeLog482
-rw-r--r--sim/z8k/Makefile.in66
-rw-r--r--sim/z8k/acconfig.h15
-rw-r--r--sim/z8k/comped1.c31
-rw-r--r--sim/z8k/comped2.c25
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-rwxr-xr-xsim/z8k/configure4024
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-rw-r--r--sim/z8k/iface.c263
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-rw-r--r--sim/z8k/syscall.h43
-rw-r--r--sim/z8k/tconfig.in13
-rw-r--r--sim/z8k/tm.h192
-rw-r--r--sim/z8k/writecode.c2011
988 files changed, 0 insertions, 460237 deletions
diff --git a/sim/ChangeLog b/sim/ChangeLog
deleted file mode 100644
index 0834ccf18f3..00000000000
--- a/sim/ChangeLog
+++ /dev/null
@@ -1,506 +0,0 @@
-2001-02-16 Ben Elliston <bje@redhat.com>
-
- * MAINTAINERS: Add myself for common portions.
-
-2001-01-15 Chris Demetriou <cgd@broadcom.com>
-
- * MAINTAINERS: Added self and Andrew for the mips sim.
-
-2000-10-25 Geoff Keating <geoffk@cygnus.com>
-
- * MAINTAINERS: Added self and Andrew for the ppc sim.
-
-Thu Jul 27 21:26:26 2000 Andrew Cagney <cagney@b1.cygnus.com>
-
- From Stephane Carrez <Stephane.Carrez@worldnet.fr>:
- * m68hc11: New directory.
- * configure.in: Add.
- * configure: Regenerate.
-
-Tue Jul 4 13:43:54 2000 Andrew Cagney <cagney@b1.cygnus.com>
-
- * tic80: New directory.
- * configure.in: Add configury.
- * configure: Regenerate.
-
-2000-04-20 Nick Clifton <nickc@cygnus.com>
-
- * configure.in (extra_subdirs): Add testsuite to strongarm
- directories.
- * configure: Regenerate.
-
-Sat Mar 4 16:48:54 2000 Andrew Cagney <cagney@b1.cygnus.com>
-
- * MAINTAINERS: New file. Blank.
-
-1999-11-18 Ben Elliston <bje@cygnus.com>
-
- * configure.in: Require autoconf 2.13 and remove obsolete
- invocation of AC_C_CROSS.
- * configure: Regenerate.
-
-1999-09-29 Doug Evans <devans@casey.cygnus.com>
-
- * configure.in: Configure the testsuite directory for thumb.
- * configure: Regenerate.
-
-1999-07-16 Ben Elliston <bje@cygnus.com>
-
- * configure.in: Configure the testsuite directory for arm.
- * configure: Regenerate.
-
-1999-04-08 Nick Clifton <nickc@cygnus.com>
-
- * configure.in: Add support for MCore target.
- * configure: Regenerate.
-
-1999-03-14 Stan Shebs <shebs@andros.cygnus.com>
-
- * Makefile.in (FLAGS_TO_PASS, TARGET_FLAGS_TO_PASS): Remove
- RUNTEST instead of commenting out, fixes portability problem.
-
-1999-02-08 Nick Clifton <nickc@cygnus.com>
-
- * configure.in: Add support for StrongARM target.
- * configure: Regenerate.
-
-1999-01-04 Jason Molenda (jsm@bugshack.cygnus.com)
-
- * configure.in: Require autoconf 2.12.1 or higher.
-
-1998-12-08 James E Wilson <wilson@wilson-pc.cygnus.com>
-
- * configure.in (i960-*-*): Add.
- * configure: Rebuild.
-
-Wed Nov 4 19:11:43 1998 Dave Brolley <brolley@cygnus.com>
-
- * configure.in: Added case for fr30-*-*.
- * configure: Regenerated.
-
-Fri Sep 25 10:12:19 1998 Christopher Faylor <cgf@cygnus.com>
-
- * ppc/Makefile.in: Add EXEEXT to installed powerpc-eabi-run program
- to allow successful operation on Windows.
-
-Thu May 28 14:59:46 1998 Jillian Ye <jillian@cygnus.com>
-
- * Makefile.in: Take RUNTEST out of FLAGS_TO_PASS so that make
- check can be invoked recursively.
-
-Wed Apr 29 12:38:53 1998 Mark Alexander <marka@cygnus.com>
-
- * configure.in: Build simulator on sparclite and sparc86x targets.
- * configure: Regenerate.
-
-Sun Apr 26 15:21:01 1998 Tom Tromey <tromey@cygnus.com>
-
- * Makefile.in (autoconf-common autoheader-common): Don't pass -l
- to autoconf and autoheader.
-
-Fri Apr 24 11:14:13 1998 Tom Tromey <tromey@cygnus.com>
-
- * Makefile.in (autoconf-common autoheader-common): Pass `-l
- ../common' to autoconf and autoheader. Unconditionally run
- autoconf in every subdir.
- (autoconf-changelog autoheader-changelog): Unconditionally run
- commands in every subdir.
- (autoconf-install autoheader-install): Likewise.
-
-Tue Mar 24 17:12:43 1998 Stu Grossman <grossman@bhuna.cygnus.co.uk>
-
- * Makefile.in: Get SHELL from configure.
- * (FLAGS_TO_PASS): Pass down SHELL.
- * configure: Regenerate with autoconf 2.12.1 to fix shell issues for
- NT native builds.
-
-Tue Mar 24 11::18:00 1998 Joyce Janczyn <janczyn@cygnus.com>
-
- * configure.in (extra_subdirs): Enable igen for mn10300.
- * configure: Re-generate.
-
-Tue Dec 2 10:10:42 1997 Nick Clifton <nickc@cygnus.com>
-
- * configure.in (extra_subdirs): Add support for thumb target.
-
- * configure (extra_subdirs): Add support for thumb target.
-
-Wed Oct 8 12:38:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure.in (extra_subdirs): Add IGEN directory when MIPS
- target.
- * configure: Regenerate.
-
-Fri Sep 12 13:10:31 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure.in (extra_subdirs): v850ea needs igen.
- * configure: Re-generate.
-
-Mon Sep 1 16:48:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure.in (testdir): When a testsuite directory, add that to
- the list of confdirs.
-
-Tue Aug 19 11:17:46 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure.in (extra_subdirs): Enable igen ready for V850.
-
-Tue Aug 26 15:14:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure.in (w65-*-*, only_if_enabled): Set.
- * configure: Re-generate.
-
-Mon Aug 25 16:26:53 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure.in (sparc*-*-*, only_if_enabled): Set
- only_if_enabled=yes. Check only_if_enabled before enabling a
- simulator.
- * configure: Regenerate.
-
-Mon Aug 18 10:56:59 1997 Nick Clifton <nickc@cygnus.com>
-
- * configure.in (extra_subdirs): Add v850e target.
-
-Mon Aug 18 10:56:59 1997 Nick Clifton <nickc@cygnus.com>
-
- * configure.in (extra_subdirs): Add v850ea target.
-
-Fri Jul 25 11:40:47 1997 Doug Evans <dje@canuck.cygnus.com>
-
- * configure.in (sparc*-*-*): Don't build erc32.
- * configure: Regenerate.
-
-Thu Apr 24 00:47:20 1997 Doug Evans <dje@canuck.cygnus.com>
-
- * configure.in (m32r-*-*): New target.
- * configure: Regenerate.
-
- * Makefile.in (autoconf-common, autoconf-changelog): Change $* to $@.
-
-Mon Apr 21 22:57:55 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * Makefile.in (.NOEXPORT, MAKEOVERRIDES): Moved to end, BSD make
- thought that .NOEXPORT was the default target.
-
-Fri Apr 11 17:18:07 1997 Ian Lance Taylor <ian@cygnus.com>
-
- * Makefile.in (clean mostlyclean): Restore targets accidentally
- deleted in earlier change.
-
-Thu Apr 3 12:20:32 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
-
- * Makefile.in (autoheader-common, autoheader-changelog,
- autoheader-install): Perform autoheader in addition to autoconf.
-
-Wed Apr 2 15:09:05 1997 Doug Evans <dje@canuck.cygnus.com>
-
- * Makefile.in (autoconf-install): New target.
- (autoconf-changelog): Try different way to obtain user name.
-
-Wed Apr 2 14:25:52 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
-
- * Makefile.in (autoconf-changelog): New target, update
- ChangeLog for all subdirectories - normally used after
- autoconf-common target.
-
-Wed Mar 19 14:26:21 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
-
- * configure.in (extra_subdirs): Include testsuite for d30v.
- * configure: Regenerate.
-
- * Makefile.in (RUNTEST, RUNTESTFLAGS): Borrow test rules from
- ../gdb/Makefile.in
- (check): New rules - drive the testsuite.
-
-Mon Mar 3 13:01:00 1997 Jeffrey A Law (law@cygnus.com)
-
- * configure.in: Add mn10200 configure lines accidentally
- removed.
- * configure: Regenerated.
-
-Wed Feb 19 10:34:20 1997 Andrew Cagney <cagney@critters.cygnus.com>
-
- * configure.in (extra_subdirs): Generalize common sub directory
- into a list.
- (extra_subdirs): For d30v add igen to the list to be built.
-
-Sun Feb 16 16:37:47 1997 Andrew Cagney <cagney@critters.cygnus.com>
-
- * configure.in (d30v): New target.
- * configure: Regenerated.
-
-Wed Feb 19 23:17:13 1997 Jeffrey A Law (law@cygnus.com)
-
- * configure.in: Don't require GCC to build the mn10200
- simulator anymore.
- * configure: Rebuilt.
-
-Wed Feb 5 13:28:13 1997 Doug Evans <dje@canuck.cygnus.com>
-
- * configure.in: Don't configure any subdirs if no simulator
- is being built. Don't use erc32 for sparc64.
- * configure: Regenerated.
-
-Tue Feb 4 13:19:39 1997 Doug Evans <dje@canuck.cygnus.com>
-
- * Makefile.in (autoconf-common): New target.
- * configure.in: Do configure common.
- * configure: Regenerated.
-
-Thu Jan 23 13:59:52 1997 Stu Grossman (grossman@critters.cygnus.com)
-
- * configure configure.in: Don't configure common anymore. Files
- from common are now built in the individual simualtor directories.
- This fixes problems with the WinGDB build procedure.
-
-Mon Jan 13 13:16:42 1997 Jeffrey A Law (law@cygnus.com)
-
- * configure: Enable the mn10200 simulator.
-
-Wed Nov 20 01:00:36 1996 Doug Evans <dje@canuck.cygnus.com>
-
- * configure.in (configdirs): Add common.
- * configure: Regenerated.
-
-Fri Nov 1 08:03:30 1996 Michael Meissner <meissner@tiktok.cygnus.com>
-
- * configure.in (powerpc*-*-linux*): Treat like the other powerpc
- system V based targets.
- * configure: Regenerate.
-
-Thu Oct 17 12:50:08 1996 Doug Evans <dje@canuck.cygnus.com>
-
- * configure.in (--enable-sim-powerpc): Delete.
- (--enable-sim): Add.
- * configure: Regenerated.
-
-Fri Oct 11 21:13:43 1996 Jeffrey A Law (law@cygnus.com)
-
- * configure.in: Only build the V850 simulator if
- we are using gcc.
- * configure: Rebuild.
-
-Sun Sep 8 17:22:50 1996 Ian Lance Taylor <ian@cygnus.com>
-
- * configure.in: Do build erc32 for DOS and Windows hosts.
- * configure: Rebuild.
-
-Wed Sep 4 18:11:27 1996 Stu Grossman (grossman@critters.cygnus.com)
-
- * Makefile.in erc32/Makefile.in: Don't set srcroot. This should
- be inherited from the parent. Remove INSTALL_XFORM and
- INSTALL_XFORM1. Make INSTALL be set from configure.
-
-Wed Sep 4 15:49:16 1996 Ian Lance Taylor <ian@cygnus.com>
-
- * configure.in: Only build the MIPS simulator if we are using
- gcc.
- * configure: Rebuild.
-
-Wed Aug 28 19:05:23 1996 Jeffrey A Law (law@cygnus.com)
-
- * configure.in (v850-*-*): Added V850 simulator.
-
-Thu Aug 1 17:08:41 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
-
- * configure.in (d10v-*-*): Added D10V simulator.
-
-Wed Jun 26 12:33:57 1996 Jason Molenda (crash@godzilla.cygnus.co.jp)
-
- * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
- INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
- (docdir): Removed.
- * configure.in (AC_PREREQ): autoconf 2.5 or higher.
- (AC_PROG_INSTALL): Added.
- * configure: Rebuilt.
-
-Mon Jun 24 14:18:26 1996 Ian Lance Taylor <ian@cygnus.com>
-
- * configure.in: Only configure erc32 if using gcc.
- * configure: Rebuild.
-
-Tue Jun 4 09:24:21 1996 Michael Meissner <meissner@tiktok.cygnus.com>
-
- * configure.in (sim_target): Build PowerPC simulator for powerpc
- System V.4, Solaris, and Elf targets.
- * configure: Regenerate with autoconf 2.10.
-
-Wed May 22 12:10:49 1996 Rob Savoye <rob@chinadoll>
-
- * configure.in: Only built erc32 simulator on Unix hosts as it
- uses pseudo ttys.
- * configure: Regenerated with autoconf 2.8.
-
-Sun May 19 20:20:40 1996 Rob Savoye <rob@chinadoll.cygnus.com>
-
- * erc32: Sparc simulator from the ESA.
-
-Sun Apr 7 21:00:09 1996 Fred Fish <fnf@cygnus.com>
-
- From: Miles Bader <miles@gnu.ai.mit.edu>
- * configure.in: Use AC_CHECK_TOOL to find AR & RANLIB.
- * configure: Regenerate using autoconf.
-
-Thu Feb 22 11:31:50 1996 Michael Meissner <meissner@tiktok.cygnus.com>
-
- * Makefile.in (install): Fix typo.
-
-Wed Feb 21 11:59:57 1996 Ian Lance Taylor <ian@cygnus.com>
-
- * configure: Regenerate with autoconf 2.7.
-
- * Makefile.in (all): Simplify.
- (clean, mostlyclean): SUBDIRS may contain whitespace; fix the loop
- as in the all target.
- (distclean, maintainer-clean, realclean): Likewise.
- (install): Likewise.
-
-Thu Feb 15 18:37:00 1996 Fred Fish <fnf@cygnus.com>
-
- * Makefile.in (all): Remove extra '\' char from shell script.
-
-Wed Feb 14 16:43:59 1996 Mike Meissner <meissner@tiktok.cygnus.com>
-
- * Makefile.in (all): Avoid a for loop with zero elements, even if
- the loop will not be executed because of an if statement.
-
-Wed Jan 31 21:48:34 1996 Fred Fish <fnf@cygnus.com>
-
- * Makefile.in (install): Add missing semicolon in "fi \".
-
-Thu Nov 9 16:10:56 1995 Michael Meissner <meissner@tiktok.cygnus.com>
-
- * Makefile.in (AR, CC, CFLAGS, CC_FOR_BUILD, RANLIB): Pick up
- defaults from configure.
-
- * configure.in: Pick up AR, CC, CFLAGS, CC_FOR_BUILD, RANLIB using
- configure defaults.
- (powerpc*-*-eabi*): Build simulator for all powerpc eabi targets
- if either --enable-sim-powerpc is used, or the host compiler is
- GCC.
-
-Wed Nov 8 15:46:49 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
-
- * configure.in (mips*-*-*): Added "mips" simulator target.
- * configure: Re-generated.
-
-Tue Oct 10 11:08:20 1995 Fred Fish <fnf@cygnus.com>
-
- * Makefile.in (BISON): Remove macro.
- (FLAGS_TO_PASS): Remove BISON.
-
-Sun Oct 8 04:26:27 1995 Peter Schauer (pes@regent.e-technik.tu-muenchen.de)
-
- * configure.in: Explicitly `exit 0' for broken shells.
- * configure: Rebuilt.
-
-Fri Oct 6 12:03:27 1995 Jim Wilson <wilson@chestnut.cygnus.com>
-
- * common/run.c (main): Initialize the callbacks.
-
-Wed Sep 20 13:34:50 1995 Ian Lance Taylor <ian@cygnus.com>
-
- * Makefile.in (maintainer-clean): New synonym for realclean.
-
-Fri Aug 25 11:53:43 1995 Michael Meissner <meissner@tiktok.cygnus.com>
-
- * configure.in (powerpc*-*-eabisim*): Only build the simulator if
- the target is powerpc*-*-eabisim*, since it requires GCC to build.
-
-Mon Aug 21 17:53:48 1995 Michael Meissner <meissner@tiktok.cygnus.com>
-
- * configure.in (powerpc{,le}-*-*): Add psim from Andrew Cagney
- <cagney@highland.com.au>.
- * configure: Regnerate from configure.in.
-
-Thu Aug 3 10:45:37 1995 Fred Fish <fnf@cygnus.com>
-
- * Update all FSF addresses except those in COPYING* files.
-
-Thu Jul 20 15:17:29 1995 Fred Fish <fnf@cygnus.com>
-
- * Makefile.in (CC_FOR_BUILD): Define default and arrange to pass
- submakes either default or passed in value.
-
-Wed Jul 5 14:32:54 1995 J.T. Conklin <jtc@rtl.cygnus.com>
-
- * Makefile.in (all, clean, distclean, mostlyclean, realclean,
- install): Changed targets so that they descend all
- subdirectories in $(SUBDIRS).
- (*-all, *-clean, *-install): Removed targets.
-
- * configure.in: Don't bother with target makefile fragments, they
- are no longer needed.
- * configure: regenerated.
-
- * Makefile.in, configure.in: converted to autoconf.
- * configure: New file, generated with autconf 2.4.
-
-Wed May 24 14:48:46 1995 Steve Chamberlain <sac@slash.cygnus.com>
-
- * Makefile.in: Support ARM.
- * configure.in: Ditto.
-
-Sun Jan 15 16:53:47 1995 Steve Chamberlain <sac@splat>
-
- * Makefile.in: Support W65.
- * configure.in: Ditto.
-
-Sun Mar 13 09:27:50 1994 Jim Kingdon (kingdon@lioth.cygnus.com)
-
- * Makefile.in: Add TAGS target.
-
-Mon Sep 13 12:47:15 1993 K. Richard Pixley (rich@sendai.cygnus.com)
-
- * Makefile.in (all-z8k, install-z8k, clean-z8k, all-h8300,
- install-h8300, clean-h8300, all-h8500, install-h8500,
- clean-h8500, all-sh, install-sh, clean-sh): do not echo
- recursion lines.
-
-Wed Jun 30 14:12:05 1993 david d `zoo' zuhn (zoo at poseidon.cygnus.com)
-
- * Makefile.in: remove endian.h trace from h8500
-
-Sun Jun 13 13:08:58 1993 Jim Kingdon (kingdon@cygnus.com)
-
- * Makefile.in: Add distclean, realclean, and mostlyclean targets.
-
-Fri May 21 11:21:16 1993 david d `zoo' zuhn (zoo at cirdan.cygnus.com)
-
- * Makefile.in: make all of the all-* target (except all-nothing)
- depend on endian.h, so that if we're not building a simulator, we
- don't built endian
-
-Fri May 21 10:55:06 1993 Ian Lance Taylor (ian@cygnus.com)
-
- * Makefile.in (check, installcheck): Added dummy targets.
-
-Mon May 3 21:39:43 1993 Fred Fish (fnf@cygnus.com)
-
- * Makefile.in (endian): Find endian.c in $(srcdir), and also
- explicitly make it, since some makes apparently don't work with
- VPATH and .c to executable rules (SunOS make for example).
-
-Mon May 3 08:29:01 1993 Steve Chamberlain (sac@thepub.cygnus.com)
-
- * Makefile.in (endian): Add explicit rule for broken makes.
-
-Mon Mar 15 15:47:53 1993 Ian Lance Taylor (ian@cygnus.com)
-
- * Makefile.in (info, install-info): New targets.
- (DO_INSTALL): Renamed from INSTALL, which is overridden by the top
- level Makefile.
-
-Wed Feb 10 20:12:27 1993 K. Richard Pixley (rich@ok.cygnus.com)
-
- * Makefile.in (endian.h): build endian.h via a temporary file so
- that we don't leave an incomplete file lying around on
- interrupted builds.
- (clean): remove endian, e.h, and endian.h.
-
-Mon Feb 8 11:46:06 1993 Steve Chamberlain (sac@thepub.cygnus.com)
-
- * Makefile.in, configure.in: if target isn't supported, build a
- harmless makefile.
-
-
diff --git a/sim/MAINTAINERS b/sim/MAINTAINERS
deleted file mode 100644
index 5f59b58f40e..00000000000
--- a/sim/MAINTAINERS
+++ /dev/null
@@ -1,8 +0,0 @@
-Maintiners for particular sims:
-ppc Andrew Cagney <ac131313@cygnus.com>
-ppc Geoff Keating <geoffk@redhat.com>
-mips Andrew Cagney <ac131313@cygnus.com>
-mips Chris Demetriou <cgd@broadcom.com>
-common Ben Elliston <bje@redhat.com>
-
-The remainder of this file is intentionally left blank.
diff --git a/sim/Makefile.in b/sim/Makefile.in
deleted file mode 100644
index 1e53780fd5d..00000000000
--- a/sim/Makefile.in
+++ /dev/null
@@ -1,254 +0,0 @@
-# Makefile template for Configure for the sim library.
-# Copyright (C) 1993, 1995, 1997, 1998 Free Software Foundation, Inc.
-# Written by Cygnus Support.
-#
-# This file is part of BFD, the Binary File Descriptor library.
-#
-# This program is free software; you can redistribute it and/or modify
-# it under the terms of the GNU General Public License as published by
-# the Free Software Foundation; either version 2 of the License, or
-# (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
-VPATH = @srcdir@
-srcdir = @srcdir@
-
-prefix = @prefix@
-exec_prefix = @exec_prefix@
-
-host_alias = @host_alias@
-target_alias = @target_alias@
-program_transform_name = @program_transform_name@
-bindir = @bindir@
-libdir = @libdir@
-tooldir = $(libdir)/$(target_alias)
-
-datadir = @datadir@
-mandir = @mandir@
-man1dir = $(mandir)/man1
-man2dir = $(mandir)/man2
-man3dir = $(mandir)/man3
-man4dir = $(mandir)/man4
-man5dir = $(mandir)/man5
-man6dir = $(mandir)/man6
-man7dir = $(mandir)/man7
-man8dir = $(mandir)/man8
-man9dir = $(mandir)/man9
-infodir = @infodir@
-includedir = @includedir@
-
-SHELL = @SHELL@
-
-INSTALL = @INSTALL@
-INSTALL_PROGRAM = @INSTALL_PROGRAM@
-INSTALL_DATA = @INSTALL_DATA@
-
-AR = @AR@
-AR_FLAGS = rc
-CC = @CC@
-CFLAGS = @CFLAGS@
-CC_FOR_BUILD = @CC_FOR_BUILD@
-MAKEINFO = makeinfo
-RANLIB = @RANLIB@
-
-SUBDIRS = @subdirs@
-
-INCDIR = $(srcdir)/../include
-CSEARCH = -I. -I$(srcdir) -I$(INCDIR)
-DEP = mkdep
-
-# compilers to use to create programs which must be run in the build
-# environment.
-CC_FOR_BUILD = $(CC)
-
-#### Makefile fragments come in here.
-# @target_makefile_frag@
-###
-
-RUNTEST = `if [ -f $${srcdir}/../dejagnu/runtest ] ; then \
- echo $${srcdir}/../dejagnu/runtest ; else echo runtest; \
- fi`
-RUNTESTFLAGS=
-
-FLAGS_TO_PASS = \
- "prefix=$(prefix)" \
- "exec_prefix=$(exec_prefix)" \
- "against=$(against)" \
- "AR=$(AR)" \
- "AR_FLAGS=$(AR_FLAGS)" \
- "CC=$(CC)" \
- "CC_FOR_BUILD=$(CC_FOR_BUILD)" \
- "CFLAGS=$(CFLAGS)" \
- "RANLIB=$(RANLIB)" \
- "MAKEINFO=$(MAKEINFO)" \
- "INSTALL=$(INSTALL)" \
- "INSTALL_DATA=$(INSTALL_DATA)" \
- "INSTALL_PROGRAM=$(INSTALL_PROGRAM)" \
- "RUNTESTFLAGS=$(RUNTESTFLAGS)" \
- "SHELL=$(SHELL)"
-
-# The use of $$(x_FOR_TARGET) reduces the command line length by not
-# duplicating the lengthy definition.
-TARGET_FLAGS_TO_PASS = \
- "prefix=$(prefix)" \
- "exec_prefix=$(exec_prefix)" \
- "against=$(against)" \
- 'CC=$$(CC_FOR_TARGET)' \
- "CC_FOR_TARGET=$(CC_FOR_TARGET)" \
- "CFLAGS=$(CFLAGS)" \
- "CHILLFLAGS=$(CHILLFLAGS)" \
- 'CHILL=$$(CHILL_FOR_TARGET)' \
- "CHILL_FOR_TARGET=$(CHILL_FOR_TARGET)" \
- "CHILL_LIB=$(CHILL_LIB)" \
- 'CXX=$$(CXX_FOR_TARGET)' \
- "CXX_FOR_TARGET=$(CXX_FOR_TARGET)" \
- "CXXFLAGS=$(CXXFLAGS)" \
- "INSTALL=$(INSTALL)" \
- "INSTALL_PROGRAM=$(INSTALL_PROGRAM)" \
- "INSTALL_DATA=$(INSTALL_DATA)" \
- "MAKEINFO=$(MAKEINFO)" \
- "RUNTESTFLAGS=$(RUNTESTFLAGS)"
-
-
-all:
- @rootme=`pwd` ; export rootme ; \
- for dir in . `echo ${SUBDIRS} | sed 's/testsuite//'` ; do \
- if [ "$$dir" = "." ]; then \
- true; \
- elif [ -d $$dir ]; then \
- (cd $$dir; $(MAKE) $(FLAGS_TO_PASS)); \
- else true; fi; \
- done
-
-clean mostlyclean:
- @rootme=`pwd` ; export rootme ; \
- for dir in . ${SUBDIRS}; do \
- if [ "$$dir" = "." ]; then \
- true; \
- elif [ -d $$dir ]; then \
- (cd $$dir; $(MAKE) $(FLAGS_TO_PASS) $@); \
- else true; fi; \
- done
-
-distclean maintainer-clean realclean:
- @rootme=`pwd` ; export rootme ; \
- for dir in . ${SUBDIRS}; do \
- if [ "$$dir" = "." ]; then \
- true; \
- elif [ -d $$dir ]; then \
- (cd $$dir; $(MAKE) $(FLAGS_TO_PASS) $@); \
- else true; fi; \
- done
- rm -f Makefile config.cache config.log config.status
-
-install:
- @rootme=`pwd` ; export rootme ; \
- for dir in . ${SUBDIRS}; do \
- if [ "$$dir" = "." ]; then \
- true; \
- elif [ -d $$dir ]; then \
- (cd $$dir; $(MAKE) $(FLAGS_TO_PASS) install); \
- else true; fi; \
- done
-
-installcheck:
- @echo No installcheck target is available yet for the GNU simulators.
-
-installcheck:
-
-# The check target can not use subdir_do, because subdir_do does not
-# use TARGET_FLAGS_TO_PASS.
-check: force
- @if [ -f testsuite/Makefile ]; then \
- rootme=`pwd`; export rootme; \
- rootsrc=`cd $(srcdir); pwd`; export rootsrc; \
- cd testsuite; \
- $(MAKE) $(TARGET_FLAGS_TO_PASS) check; \
- else true; fi
-
-
-
-info:
-install-info:
-dvi:
-
-###
-###
-
-.NOEXPORT:
-MAKEOVERRIDES=
-
-.PHONY: check installcheck
-check:
-installcheck:
-
-TAGS:
-
-force:
-
-Makefile: Makefile.in config.status
- $(SHELL) ./config.status
-
-config.status: configure
- $(SHELL) ./config.status --recheck
-
-# Utility to run autoconf in each directory that uses the common framework.
-# This is intended to be invoked in $srcdir as
-# "make -f Makefile.in autoconf-common".
-.PHONY: autoconf-common
-autoconf-common autoheader-common:
- for d in * ; \
- do \
- if [ -d $$d -a -f $$d/configure.in ] ; \
- then \
- echo "Running autoconf in $$d ..." ; \
- (cd $$d && autoconf) ; \
- if [ $@ = autoheader-common ] ; \
- then \
- echo "Running autoheader in $$d ..." ; \
- (cd $$d && autoheader) ; \
- fi ; \
- fi ; \
- done
-
-autoconf-changelog autoheader-changelog:
- id="`id | sed -e 's/^[^(]*(\([^)]*\).*$$/\1/'`" ; \
- name=`grep "^$$id:" /etc/passwd | cut -f 5 -d ':'` ; \
- host="`hostname`" ; \
- date="`date | sed 's/ [^ ]* \([0-9]*\)$$/ \1/'`" ; \
- echo "$$date $$name $$id@$$host" ; \
- for d in * ; \
- do \
- if [ -d $$d -a -f $$d/configure.in ] ; \
- then \
- echo "Creating new-ChangeLog in $$d ..." ; \
- ( echo "$$date $$name <$$id@$$host>" ; \
- echo "" ; \
- echo " * configure: Regenerated to track ../common/aclocal.m4 changes." ; \
- if [ $@ = autoheader-changelog ] ; \
- then \
- echo " * config.in: Ditto." ; \
- fi ; \
- echo "" ; \
- cat $$d/ChangeLog \
- ) > $$d/new-ChangeLog ; \
- fi ; \
- done
-
-autoconf-install autoheader-install:
- for d in * ; \
- do \
- if [ -d $$d -a -f $$d/configure.in ] ; \
- then \
- echo "Moving $$d/new-ChangeLog to $$d/ChangeLog ..." ; \
- mv $$d/new-ChangeLog $$d/ChangeLog ; \
- fi ; \
- done
diff --git a/sim/README-HACKING b/sim/README-HACKING
deleted file mode 100644
index e4efeb155b0..00000000000
--- a/sim/README-HACKING
+++ /dev/null
@@ -1,254 +0,0 @@
-This is a loose collection of notes for people hacking on simulators.
-If this document gets big enough it can be prettied up then.
-
-Contents
-
-- The "common" directory
-- Common Makefile Support
-- TAGS support
-- Generating "configure" files
-- tconfig.in
-- C Language Assumptions
-- "dump" commands under gdb
-
-The "common" directory
-======================
-
-The common directory contains:
-
-- common documentation files (e.g. run.1, and maybe in time .texi files)
-- common source files (e.g. run.c)
-- common Makefile fragment and configury (e.g. Make-common.in, aclocal.m4).
-
-In addition "common" contains portions of the system call support
-(e.g. callback.c, nltvals.def).
-
-Even though no files are built in this directory, it is still configured
-so support for regenerating nltvals.def is present.
-
-Common Makefile Support
-=======================
-
-A common configuration framework is available for simulators that want
-to use it. The common framework exists to remove a lot of duplication
-in configure.in and Makefile.in, and it also provides a foundation for
-enhancing the simulators uniformly (e.g. the more they share in common
-the easier a feature added to one is added to all).
-
-The configure.in of a simulator using the common framework should look like:
-
---- snip ---
-dnl Process this file with autoconf to produce a configure script.
-sinclude(../common/aclocal.m4)
-AC_PREREQ(2.5)dnl
-AC_INIT(Makefile.in)
-
-SIM_AC_COMMON
-
-... target specific additions ...
-
-SIM_AC_OUTPUT
---- snip ---
-
-SIM_AC_COMMON:
-
-- invokes the autoconf macros most often used by the simulators
-- defines --enable/--with options usable by all simulators
-- initializes sim_link_files/sim_link_links as the set of symbolic links
- to set up
-
-SIM_AC_OUTPUT:
-
-- creates the symbolic links defined in sim_link_{files,links}
-- creates config.h
-- creates the Makefile
-
-The Makefile.in of a simulator using the common framework should look like:
-
---- snip ---
-# Makefile for blah ...
-# Copyright blah ...
-
-## COMMON_PRE_CONFIG_FRAG
-
-# These variables are given default values in COMMON_PRE_CONFIG_FRAG.
-# We override the ones we need to here.
-# Not all of these need to be mentioned, only the necessary ones.
-# In fact it is better to *not* mention ones if the value is the default.
-
-# List of object files, less common parts.
-SIM_OBJS =
-# List of extra dependencies.
-# Generally this consists of simulator specific files included by sim-main.h.
-SIM_EXTRA_DEPS =
-# List of flags to always pass to $(CC).
-SIM_EXTRA_CFLAGS =
-# List of extra libraries to link with.
-SIM_EXTRA_LIBS =
-# List of extra program dependencies.
-SIM_EXTRA_LIBDEPS =
-# List of main object files for `run'.
-SIM_RUN_OBJS = run.o
-# Dependency of `all' to build any extra files.
-SIM_EXTRA_ALL =
-# Dependency of `install' to install any extra files.
-SIM_EXTRA_INSTALL =
-# Dependency of `clean' to clean any extra files.
-SIM_EXTRA_CLEAN =
-
-## COMMON_POST_CONFIG_FRAG
-
-# Rules need to build $(SIM_OBJS), plus whatever else the target wants.
-
-... target specific rules ...
---- snip ---
-
-COMMON_{PRE,POST}_CONFIG_FRAG are markers for SIM_AC_OUTPUT to tell it
-where to insert the two pieces of common/Make-common.in.
-The resulting Makefile is created by doing autoconf substitions on
-both the target's Makefile.in and Make-common.in, and inserting
-the two pieces of Make-common.in into the target's Makefile.in at
-COMMON_{PRE,POST}_CONFIG_FRAG.
-
-Note that SIM_EXTRA_{INSTALL,CLEAN} could be removed and "::" targets
-could be used instead. However, it's not clear yet whether "::" targets
-are portable enough.
-
-TAGS support
-============
-
-Many files generate program symbols at compile time.
-Such symbols can't be found with grep nor do they normally appear in
-the TAGS file. To get around this, source files can add the comment
-
-/* TAGS: foo1 foo2 */
-
-where foo1, foo2 are program symbols. Symbols found in such comments
-are greppable and appear in the TAGS file.
-
-Generating "configure" files
-============================
-
-For targets using the common framework, "configure" can be generated
-by running `autoconf'.
-
-To regenerate the configure files for all targets using the common framework:
-
- $ cd devo/sim
- $ make -f Makefile.in SHELL=/bin/sh autoconf-common
-
-To add a change-log entry to the ChangeLog file for each updated
-directory (WARNING - check the modified new-ChangeLog files before
-renaming):
-
- $ make -f Makefile.in SHELL=/bin/sh autoconf-changelog
- $ more */new-ChangeLog
- $ make -f Makefile.in SHELL=/bin/sh autoconf-install
-
-In a similar vein, both the configure and config.in files can be
-updated using the sequence:
-
- $ cd devo/sim
- $ make -f Makefile.in SHELL=/bin/sh autoheader-common
- $ make -f Makefile.in SHELL=/bin/sh autoheader-changelog
- $ more */new-ChangeLog
- $ make -f Makefile.in SHELL=/bin/sh autoheader-install
-
-tconfig.in
-==========
-
-File tconfig.in defines one or more target configuration macros
-(e.g. a tm.h file). There are very few that need defining.
-For a list of all of them, see common/tconfig.in.
-It contains them all, commented out.
-The intent is that a new port can just copy this file and
-define the ones it needs.
-
-C Language Assumptions
-======================
-
-The programmer may assume that the simulator is being built using an
-ANSI C compiler that supports a 64 bit data type. Consequently:
-
- o prototypes can be used (although using
- PARAMS() and K&R declarations wouldn't
- go astray).
-
- o If sim-types.h is included, the two
- types signed64 and unsigned64 are
- available.
-
- o The type `unsigned' is valid.
-
-However, the user should be aware of the following:
-
- o GCC's `<number>LL' is NOT acceptable.
- Microsoft-C doesn't reconize it.
-
- o MSC's `<number>i64' is NOT acceptable.
- GCC doesn't reconize it.
-
- o GCC's `long long' MSC's `_int64' can
- NOT be used to define 64 bit integer data
- types.
-
- o An empty array (eg int a[0]) is not valid.
-
-When building with GCC it is effectivly a requirement that
---enable-build-warnings=,-Werror be specified during configuration.
-
-"dump" commands under gdb
-=========================
-
-gdbinit.in contains the following
-
-define dump
-set sim_debug_dump ()
-end
-
-Simulators that define the sim_debug_dump function can then have their
-internal state pretty printed from gdb.
-
-FIXME: This can obviously be made more elaborate. As needed it will be.
-
-Rebuilding nltvals.def
-======================
-
-Checkout a copy of the SIM and LIBGLOSS modules (Unless you've already
-got one to hand):
-
- $ mkdir /tmp/$$
- $ cd /tmp/$$
- $ cvs checkout sim-no-testsuite libgloss-no-testsuite newlib-no-testsuite
-
-Configure things for an arbitrary simulator target (I've d10v for
-convenience):
-
- $ mkdir /tmp/$$/build
- $ cd /tmp/$$/build
- $ /tmp/$$/devo/configure --target=d10v-elf
-
-In the sim/common directory rebuild the headers:
-
- $ cd sim/common
- $ make headers
-
-To add a new target:
-
- devo/sim/common/gennltvals.sh
-
- Add your new processor target (you'll need to grub
- around to find where your syscall.h lives).
-
- devo/sim/<processor>/Makefile.in
-
- Add the definition:
-
- ``NL_TARGET = -DNL_TARGET_d10v''
-
- just before the line COMMON_POST_CONFIG_FRAG.
-
- devo/sim/<processor>/*.[ch]
-
- Include targ-vals.h instead of syscall.h.
-
diff --git a/sim/arm/COPYING b/sim/arm/COPYING
deleted file mode 100644
index 60549be514a..00000000000
--- a/sim/arm/COPYING
+++ /dev/null
@@ -1,340 +0,0 @@
- GNU GENERAL PUBLIC LICENSE
- Version 2, June 1991
-
- Copyright (C) 1989, 1991 Free Software Foundation, Inc.
- 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- Everyone is permitted to copy and distribute verbatim copies
- of this license document, but changing it is not allowed.
-
- Preamble
-
- The licenses for most software are designed to take away your
-freedom to share and change it. By contrast, the GNU General Public
-License is intended to guarantee your freedom to share and change free
-software--to make sure the software is free for all its users. This
-General Public License applies to most of the Free Software
-Foundation's software and to any other program whose authors commit to
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-address new problems or concerns.
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- 10. If you wish to incorporate parts of the Program into other free
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-
- How to Apply These Terms to Your New Programs
-
- If you develop a new program, and you want it to be of the greatest
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-free software which everyone can redistribute and change under these terms.
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-to attach them to the start of each source file to most effectively
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-the "copyright" line and a pointer to where the full notice is found.
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- Copyright (C) 19yy <name of author>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
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- GNU General Public License for more details.
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- You should have received a copy of the GNU General Public License
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- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
-
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- This is free software, and you are welcome to redistribute it
- under certain conditions; type `show c' for details.
-
-The hypothetical commands `show w' and `show c' should show the appropriate
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- `Gnomovision' (which makes passes at compilers) written by James Hacker.
-
- <signature of Ty Coon>, 1 April 1989
- Ty Coon, President of Vice
-
-This General Public License does not permit incorporating your program into
-proprietary programs. If your program is a subroutine library, you may
-consider it more useful to permit linking proprietary applications with the
-library. If this is what you want to do, use the GNU Library General
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diff --git a/sim/arm/ChangeLog b/sim/arm/ChangeLog
deleted file mode 100644
index 181f6f47bd2..00000000000
--- a/sim/arm/ChangeLog
+++ /dev/null
@@ -1,825 +0,0 @@
-2001-05-11 Nick Clifton <nickc@cambridge.redhat.com>
-
- * armemu.c (ARMul_Emulate32): Fix handling of XScale LDRD and STRD
- instructions with post indexed addressing modes.
-
-2001-05-08 Jens-Christian Lache <lache@tu-harburg.de>
-
- * armsupp.c (ARMul_FixCPSR): Check Mode not Bank in order to
- determine rocesor mode.
-
-2001-04-18 matthew green <mrg@redhat.com>
-
- * armcopro.c (write_cp15_reg): Set CHANGEMODE if endianness changes.
- (read_cp15_reg): Make non-static.
- (XScale_cp15_LDC): Update for write_cp15_reg() change.
- (XScale_cp15_MCR): Likewise.
- (XScale_cp15_write_reg): Likewise.
- (XScale_check_memacc): New function. Check for breakpoints being
- activated by memory accesses. Does not support the Branch Target
- Buffer.
- (XScale_set_fsr_far): New function. Set FSR and FAR for XScale.
- (XScale_debug_moe): New function. Set the debug Method Of Entry,
- if configured.
- (write_cp14_reg): Reset count counter if requested.
- * armdefs.h (struct ARMul_State): New members `LastTime' and
- `CP14R0_CCD' used for the timer/counters.
- (ARMul_CP13_R0_FIQ, ARMul_CP13_R0_IRQ, ARMul_CP13_R8_PMUS,
- ARMul_CP14_R0_ENABLE, ARMul_CP14_R0_CLKRST, ARMul_CP14_R0_CCD,
- ARMul_CP14_R0_INTEN0, ARMul_CP14_R0_INTEN1, ARMul_CP14_R0_INTEN2,
- ARMul_CP14_R0_FLAG0, ARMul_CP14_R0_FLAG1, ARMul_CP14_R0_FLAG2,
- ARMul_CP14_R10_MOE_IB, ARMul_CP14_R10_MOE_DB, ARMul_CP14_R10_MOE_BT,
- ARMul_CP15_R1_ENDIAN, ARMul_CP15_R1_ALIGN, ARMul_CP15_R5_X,
- ARMul_CP15_R5_ST_ALIGN, ARMul_CP15_R5_IMPRE, ARMul_CP15_R5_MMU_EXCPT,
- ARMul_CP15_DBCON_M, ARMul_CP15_DBCON_E1, ARMul_CP15_DBCON_E0): New
- defines for XScale registers.
- (XScale_check_memacc, XScale_set_fsr_far, XScale_debug_moe): Prototype.
- (ARMul_Emulate32, ARMul_Emulate26): Clean up function definition.
- (ARMul_Emulate32): Handle the clock counter and hardware instruction
- breakpoints. Call XScale_set_fsr_far() for software breakpoints and
- software interrupts.
- (LoadMult): Call XScale_set_fsr_far() for data aborts.
- (LoadSMult): Likewise.
- (StoreMult): Likewise.
- (StoreSMult): Likewise.
- * armemu.h (write_cp15_reg): Update prototype.
- * arminit.c (ARMul_NewState): Initialise CP14R0_CCD and LastTime.
- (ARMul_Abort): If XScale, check for FIQ and IRQ being enabled in CP13
- register 0.
- * armvirt.c (GetWord): Call XScale_check_memacc().
- (PutWord): Likewise.
-
-2001-03-20 Nick Clifton <nickc@redhat.com>
-
- * armvirt.c (ARMul_ReLoadInstr): Do not enable alignment checking
- when loading unaligned thumb instructions.
-
-2001-03-06 Nick Clifton <nickc@redhat.com>
-
- * thumbemu.c (ARMul_ThumbDecode): Delete label bo_blx2.
- Compute destination address of BLX(1) instruction by
- taking bit 1 from PC and not from bit 0 of the offset.
-
-2001-02-27 Nick Clifton <nickc@redhat.com>
-
- * armvirt.c (GetWord): Add new parameter - check - to enable or
- disable the alignment checking.
- (PutWord): Add new parameter - check - to enable or disable the
- alignment checking.
- (ARMul_ReLoadInstr): Pass extra parameter to GetWord.
- (ARMul_ReadWord): Pass extra parameter to GetWord.
- (ARMul_WriteWord): Pass extra parameter to PutWord.
- (ARMul_StoreHalfWord): Pass extra parameter to PutWord.
- (ARMul_WriteByte): Pass extra parameter to GetWord.
- (ARMul_SwapWord): Pass extra parameter to PutWord.
- (ARMul_SafeReadByte): New Function: Read a byte but do not abort.
- (ARMul_SafeWriteByte): New Function: Write a byte but do not abort.
-
- * armdefs.h: Add prototypes for ARMul_SafeReadByte and
- ARMul_SafeWriteByte.
-
- * wrapper.c (sim_write): Use ARMul_SafeWriteByte.
- (sim_read): Use ARMul_SafeReadByte.
-
- * armos.c (in_SWI_handler): Remove.
- (SWIWrite0): Use ARMul_SafeReadByte.
- (WriteCommandLineTo): Use ARMul_SafeWriteByte.
- (SWIopen): Use ARMul_SafeReadByte.
- (SWIread): Use ARMul_SafeWriteByte.
- (SWIwrite): Use ARMul_SafeReadByte.
- (ARMul_OSHandleSWI): Remove use of is_SWI_handler.
- (ARMul_OSException): Remove use of is_SWI_handler.
-
-2001-02-16 Nick Clifton <nickc@redhat.com>
-
- * armemu.c: Remove Prefetch abort for breakpoints. Instead set
- the state to RESUME.
-
-2001-02-14 Nick Clifton <nickc@redhat.com>
-
- * armemu.c: Add code to preserve processor mode when a prefetch
- abort is signalled after processing a breakpoint.
-
- * wrapper.c (sim_create_inferior): Reset processor into ARM mode
- for any machine type except the early ARMs.
-
-2001-02-13 Nick Clifton <nickc@redhat.com>
-
- * armos.c (in_SWI_handler): New static variable.
- (ARMul_OSHandleSWI): Set in_SWI_handler whilst emulating a SWI.
- (ARMul_OSException): Ignore exceptions generated whilst emulating
- a SWI.
-
-2001-02-12 Nick Clifton <nickc@redhat.com>
-
- * armemu.h (NEGBRANCH): Fix defintion.
-
-2001-02-01 Nick Clifton <nickc@redhat.com>
-
- * armemu.c (LoadSMult): Update base address register after
- restoring register bank.
- (StoreMult): Update base address register after restoring register
- bank.
-
-2001-01-31 Nick Clifton <nickc@redhat.com>
-
- * armvirt.c (PutWord): Detect installation of SWI vector.
- (SWI_vector_installed): Define.
- * armos.c (ARMul_OsInit): Reset SWI_vector_installed.
- * armos.h (SWI_vector_installed): Declare.
- * wrapper.c (SWI_vector_installed): Remove definition.
- (sim_write): Remove check of SWI vector installation
-
-2000-12-18 Nick Clifton <nickc@redhat.com>
-
- * armemu.c (ARMul_Emulate26): Fix test for StoreDouble
- instruction.
-
-2000-12-10 Nick Clifton <nickc@redhat.com>
-
- * armos.c (ARMul_OSHandleSWI): Add 0x91 as an FPE SWI.
-
-2000-12-07 Nick Clifton <nickc@redhat.com>
-
- * armemu.c (ARMul_Emulate26): Detect double word load and
- store instructions and call emulation routines.
- (Handle_Load_Double): Emulate a double word load instruction.
- (Handle_Store_Double): Emulate a double word store
- instruction.
-
-2000-12-03 Nick Clifton <nickc@redhat.com>
-
- * armos.c: Fix formatting.
- (ARMul_OSHandleSWI): Suppress support of DEMON SWIs when in xscale
- mode.
-
-2000-11-29 Nick Clifton <nickc@redhat.com>
-
- * armdefs.h (State): Add 'v5e' and 'xscale' fields.
- (ARM_v5e_Prop): Define.
- (ARM_XScale_Prop): Define.
-
- * wrapper.c (sim_create_inferior): Select processor based on
- machine number.
- (SWI_vector_installed): New boolean. Set to true if the SWI
- vector address is written to by the executable.
-
- * arminit.c (ARMul_NewState): Switch default to 32 bit mode.
- (ARMul_SelectProcessor): Initialise v5e and xscale signals.
- (ARMul_Abort): Fix calculation of LR address.
-
- * armos.c (ARMul_OSHandleSWI): If a SWI vector has been installed
- and a SWI is not handled by the simulator, pass the SWI off to the
- vector, otherwise issue a warning message and continue.
-
- * armsupp.c (ARMul_CPSRAltered): Set S bit aswell.
-
- * thumbemu.c: Add v5 instruction simulation.
- * armemu.c: Add v5, XScale and El Segundo instruction simulation.
-
- * armcopro.c: Add XScale co-processor emulation.
- * armemu.h: Add exported XScale co-processor functions.
-
-2000-09-15 Nick Clifton <nickc@redhat.com>
-
- * armdefs.h: Rename StrongARM property to v4_ARM and add v5 ARM
- property. Delete unnecessary processor names.
- (ARM_Strong_Prop): Delete.
- (STRONGARM): Delete.
- (ARM_v4_Prop): Add.
- (ARM_v5_Prop): Add
- (State): Delete is_StrongARM boolean. Add is_v4 and is_v5
- booleans.
-
- * armemu.h (BUSUSEDINCPCS): Use is_v4 boolean.
- (BUSUSEDINCPCN): Use is_v4 boolean.
-
- * arminit.c (ARMul_NewState): Initialise is_v4 and is_v5 fields.
- (ARMul_SelectProcessor): Change second parameter from 'processor'
- to 'properties'. Set is_v4 and is_v5 booleans in State.
-
- * armrdi.c: Remove use of ARM processor names. Replace with ARM
- processor properties.
-
- * wrapper.c (sim_create_inferior): Choose properties passed to
- ARMul_SelectProcessor based on machine number.
-
-2000-08-14 Nick Clifton <nickc@redhat.com>
-
- * armemu.c (LHPOSTDOWN): Compute write back value before
- performing load in case the offset register is overwritten.
- (LHPOSTUP): Ditto.
-
-2000-07-14 Fernando Nasser <fnasser@cygnus.com>
-
- * wrapper.c (sim_create_inferior): Fix typo in the previous patch.
-
-2000-07-14 Fernando Nasser <fnasser@cygnus.com>
-
- * wrapper.c (sim_create_inferior): Reset mode to ARM when creating a
- new inferior.
-
-2000-07-04 Alexandre Oliva <aoliva@redhat.com>
-
- * armvirt.c (ABORTS): Do not define.
-
- * armdefs.h (struct ARMul_State): Add is_StrongARM.
- (ARM_Strong_Prop, STRONGARM): Define.
- * arminit.c (ARMul_NewState): Reset is_StrongARM.
- (ARMul_SelectProcessor): Set is_StrongARM.
- * wrapper.c (sim_create_inferior): Use bfd machine type to
- determine processor type to emulate.
- * armemu.h (BUSUSEDINCPCS, BUSUSEDINCPCN): Don't increment PC
- when emulating StrongARM.
-
- * armemu.c (ARMul_Emulate, t_undefined): Proceed to next insn.
-
- * armemu.h (INSN_SIZE): New macro.
- (SET_ABORT): Save CPSR in SPSR and set LR.
- * armemu.c (ARMul_Emulate, isize): Set to INSN_SIZE.
- (WriteR15, WriteSR15): Do not discard bit 1 in Thumb mode.
- * arminit.c (ARMul_Abort): Use new SETABORT and INSN_SIZE.
-
- * armemu.c (LoadSMult): Use WriteR15() to discard the least
- significant bits of PC.
-
- * armemu.h (WRITEDESTB): New macro.
- * armemu.c (ARMul_Emulate26, bl): Use WriteR15Branch() to
- modify PC. Moved the existing logic...
- (WriteR15Branch): ... here. New function.
- (WriteR15, WriteSR15): Drop the two least significant bits.
- (LoadSMult): Use WriteR15Branch() to modify PC.
- (LoadMult): Use WRITEDESTB() instead of WRITEDEST().
-
- * armemu.h (GETSPSR): Call ARMul_GetSPSR().
- * armsupp.c (ARMul_CPSRAltered): Zero out bits as they're
- extracted from state->Cpsr, but preserve the unused bits.
- (ARMul_GetCPSR): Get bits preserved in state->Cpsr.
- (ARMul_GetSPSR, ARMul_FixCPSR): Use ARMul_GetCPSR() to
- get the full CPSR word.
-
- * armemu.h (PSR_FBITS, PSR_SBITS, PSR_XBITS, PSR_CBITS): New.
- (SETPSR_F, SETPSR_S, SETPSR_X, SETPSR_C): New macros.
- (SETPSR, SET_INTMODE, SETCC): Removed.
- * armsupp.c (ARMul_FixCPSR, ARMul_FixSPSR): Do not test bit
- mask. Use SETPSR_* to modify PSR.
- (ARMul_SetCPSR): Load all bits from value.
- * armemu.c (ARMul_Emulate, msr): Do not test bit mask.
-
- * armemu.c (ARMul_Emulate): Compute writeback value before
- loading, since the offset register may be the destination
- register.
-
- * armdefs.h (SYSTEMBANK): Define as USERBANK.
- * armsupp.c (ARMul_SwitchMode): Remove SYSTEMBANK cases.
-
-2000-06-22 Alexandre Oliva <aoliva@cygnus.com>
-
- * armemu.c (Multiply64): Fix computation of flag N.
-
- * armemu.c (MultiplyAdd64): Fix computation of flag N.
-
-2000-06-20 Alexandre Oliva <aoliva@cygnus.com>
-
- * armemu.h (NEGBRANCH): Do not overwrite the two most significant
- bits of the offset.
-
-2000-05-25 Nick Clifton <nickc@cygnus.com>
-
- * armcopro.c (MMUMCR): Only indicate mode change if a singal has
- really changed.
- (MMUWrite): Only indicate mode change if a singal has really
- changed.
-
- * armdefs.h (SYSTEMMODE): Define.
- (BANK_CAN_ACEESS_SPSR): Define.
-
- * armemu.c (ARM_Emulate26): If the mode has changed allow the PC
- to advance before stopping the emulation.
-
- * arminit.c (ARMul_Reset): Ensure Mode field of State is set
- correctly.
-
- * armos.c (ARMul_OSInit): Create a initial stack pointer for
- System mode.
-
- * armsupp.c (ModeToBank): Remove unused first parameter.
- Add support for System Mode.
- (ARMul_GetSPSR): Use BANK_CAN_ACCESS_SPSR macro.
- (ARMul_SetSPSR): Use BANK_CAN_ACCESS_SPSR macro.
- (ARMul_FixSPSR): Use BANK_CAN_ACCESS_SPSR macro.
- (ARMulSwitchMode): Add support for System Mode.
-
-Wed May 24 14:40:34 2000 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-2000-05-23 Nick Clifton <nickc@cygnus.com>
-
- * wrapper.c (sim_store_register): Special handling for CPSR
- register.
-
-2000-03-11 Philip Blundell <philb@gnu.org>
-
- * armemu.c (LoadSMult, LoadMult): Correct handling of aborts.
- Patch from Allan Skillman <Allan.Skillman@arm.com>.
-
-Wed Mar 22 15:24:21 2000 glen mccready <gkm@pobox.com>
-
- * wrapper.c (sim_open,sim_close): Copy into myname, free myname.
-
-2000-02-08 Nick Clifton <nickc@cygnus.com>
-
- * wrapper.c: Fix compile time warning messages.
- * armcopro.c: Fix compile time warning messages.
- * armdefs.h: Fix compile time warning messages.
- * armemu.c: Fix compile time warning messages.
- * armemu.h: Fix compile time warning messages.
- * armos.c: Fix compile time warning messages.
- * armsupp.c: Fix compile time warning messages.
- * armvirt.c: Fix compile time warning messages.
- * bag.c: Fix compile time warning messages.
-
-2000-02-02 Bernd Schmidt <bernds@cygnus.co.uk>
-
- * *.[ch]: Use indent to make readable.
-
-1999-11-22 Nick Clifton <nickc@cygnus.com>
-
- * armos.c (SWIread): Generate an error message if a huge read is
- performed.
- (SWIwrite): Generate an error message if a huge write is
- performed.
-
-1999-10-27 Nick Clifton <nickc@cygnus.com>
-
- * thumbemu.c (ARMul_ThumbDecode): Accept 0xbebe as a thumb
- breakpoint.
-
-1999-10-08 Ulrich Drepper <drepper@cygnus.com>
-
- * armos.c (SWIopen): Always pass third parameter with 0666 since
- otherwise uninitialized memory gets access if the O_CREAT bit is
- set and so we possibly cannot access the file afterwards.
-
-1999-09-29 Doug Evans <devans@casey.cygnus.com>
-
- * armos.c (SWIWrite0): Send output to stdout instead of stderr.
- (ARMul_OSHandleSWI, case SWI_WriteC,AngelSWI_Reason_WriteC): Ditto.
-
-Thu Sep 2 18:15:53 1999 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-1999-05-08 Felix Lee <flee@cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-1999-04-06 Keith Seitz <keiths@cygnus.com>
-
- * wrapper.c (stop_simulator): New global.
- (sim_stop): Set sim state to STOP and set
- stop_simulator.
- (sim_resume): Reset stop_simulator.
- (sim_stop_reason): If stop_simulator is set, tell gdb
- that the we took SIGINT.
- * armemu.c (ARMul_Emulate26): Don't loop forever. Stop if
- stop_simulator is set.
-
-1999-04-02 Keith Seitz <keiths@cygnus.com>
-
- * armemu.c (ARMul_Emulate26): If NEED_UI_LOOP_HOOK, call ui_loop_hook
- whenever the counter expires.
- * Makefile.in (SIM_EXTRA_CFLAGS): Include define NEED_UI_LOOP_HOOK.
-
-1999-03-24 Nick Clifton <nickc@cygnus.com>
-
- * armemu.c (ARMul_Emulate26): Handle new breakpoint value.
- * thumbemu.c (ARMul_ThumbDecode): Handle new breakpoint value.
-
-Mon Sep 14 09:00:05 1998 Nick Clifton <nickc@cygnus.com>
-
- * wrapper.c (sim_open): Set endianness according to BFD or command
- line switch.
-
- * tconfig.in: Define SIM_HAVE_BIENDIAN.
-
-Thu Aug 27 11:00:05 1998 Nick Clifton <nickc@cygnus.com>
-
- * armemu.c (Multiply64): Test for Rm (rather than Rs) not being
- the same as either RdHi or RdLo.
-
-Thu Jul 2 10:24:35 1998 Nick Clifton <nickc@cygnus.com>
-
- * armos.c (ARMul_OSHandleSWI: AngelSWI_Reason_ReportException):
- Set Reg[0] based on reason for for the exception.
-
-Thu Jun 4 15:22:03 1998 Jason Molenda (crash@bugshack.cygnus.com)
-
- * armos.c (SWIwrite0): New function.
- (WriteCommandLineTo): New function.
- (SWIopen): New function.
- (SWIread): New function.
- (SWIwrite): New function.
- (SWIflen): New function.
- (ARMul_OSHandleSWI): Call new functions instead of handling
- these here.
- (ARMul_OSHandleSWI): Handle Angel SWIs correctly.
- (*): Reformat spacing to be a bit more GNUly.
- Most code taken from a patch by Anthony Thompson
- (athompso@cambridge.arm.com)
-
-Tue Jun 2 15:22:22 1998 Nick Clifton <nickc@cygnus.com>
-
- * armos.h: Add Angel SWI and its reason codes.
- * armos.c (ARMul_OSHandleSWI): Ignore Angel SWIs (for now).
-
-Mon Jun 1 17:14:19 1998 Anthony Thompson (athompso@cambridge.arm.com)
-
- * armos.c (ARMul_OSHandleSWI::SWI_Open): Handle special case
- of ":tt" to catch stdin in addition to stdout.
- (ARMul_OSHandleSWI::SWI_Seek): Return 0 or 1 to indicate failure
- or success of lseek().
-
-Wed May 20 17:36:25 1998 Nick Clifton <nickc@cygnus.com>
-
- * armos.c (ARMul_OSHandleSWI): Special case code to catch attempts
- to open stdout.
-
-Wed Apr 29 15:29:55 1998 Jeff Johnston <jjohnstn@cygnus.com>
-
- * armos.c (ARMul_OSHandleSWI): Added code for SWI_Clock,
- SWI_Flen, and SWI_Time. Also fixed SWI_Seek code to only
- seek from offset 0 and not to use R2 for whence since it is
- not passed as part of the SWI call.
-
-Tue Apr 28 18:33:31 1998 Geoffrey Noer <noer@cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Sun Apr 26 15:31:55 1998 Tom Tromey <tromey@creche>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
- * config.in: Ditto.
-
-Sun Apr 26 15:20:26 1998 Tom Tromey <tromey@cygnus.com>
-
- * acconfig.h: New file.
- * configure.in: Reverted change of Apr 24; use sinclude again.
-
-Fri Apr 24 14:16:40 1998 Tom Tromey <tromey@creche>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
- * config.in: Ditto.
-
-Fri Apr 24 11:20:19 1998 Tom Tromey <tromey@cygnus.com>
-
- * configure.in: Don't call sinclude.
-
-Sat Apr 4 20:36:25 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Fri Mar 27 16:15:52 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Wed Mar 25 12:35:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Wed Mar 18 12:38:12 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Tue Mar 10 09:26:38 1998 Nick Clifton <nickc@cygnus.com>
-
- * armopts.h: Remove definition of LITTLEND - it is not used.
-
-Tue Feb 17 12:35:54 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * wrapper.c (sim_store_register, sim_fetch_register): Pass in
- length parameter. Return -1.
-
-Sun Feb 1 16:47:51 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Sat Jan 31 18:15:41 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Mon Jan 19 22:26:29 1998 Doug Evans <devans@seba>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Mon Dec 15 23:17:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
- * config.in: Ditto.
-
-Tue Dec 9 11:30:48 1997 Nick Clifton <nickc@cygnus.com>
-
- * Makefile.in: Updated with changes from branch.
- * armdefs.h: ditto
- * armemu.c: ditto these changes
- * armemu.h: ditto add support for
- * armos.c: ditto the Thumb instruction
- * armsupp.c: ditto set and the new v4
- * armvirt.c: ditto architecture.
- * wrapper.c: ditto
- * thumbemu.c: New file from branch.
-
-
-Thu Dec 4 09:21:05 1997 Doug Evans <devans@canuck.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Thu Oct 30 13:54:06 1997 Nick Clifton <nickc@cygnus.com>
-
- * armos.c (ARMul_OSHandleSWI): Add support for GetEnv SWI. Patch
- from Tony Thompson at ARM: athompso@arm.com
-
- * wrapper.c (sim_create_inferior): Add code to create an execution
- environment. Patch from Tony Thompson at ARM: athompso@arm.com
-
-Wed Oct 22 14:43:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * wrapper.c (sim_load): Pass lma_p and sim_write args to
- sim_load_file.
-
-Fri Oct 3 09:28:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Wed Sep 24 17:38:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Tue Sep 23 11:04:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Mon Sep 22 11:46:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Fri Sep 19 17:45:25 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Mon Sep 15 17:36:15 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Thu Sep 4 17:21:23 1997 Doug Evans <dje@seba>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Wed Aug 27 18:13:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
- * config.in: Ditto.
-
-Tue Aug 26 10:37:27 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * wrapper.c (sim_kill): Delete.
- (sim_create_inferior): Add ABFD argument.
- (sim_load): Move setting of PC from here.
- (sim_create_inferior): To here.
-
-Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
- * config.in: Ditto.
-
-Mon Aug 25 15:35:45 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * wrapper.c (sim_open): Add ABFD argument.
-
-Tue May 20 10:13:26 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * wrapper.c (sim_open): Add callback argument.
- (sim_set_callbacks): Drop SIM_DESC argument.
-
-Thu Apr 24 00:39:51 1997 Doug Evans <dje@canuck.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Fri Apr 18 13:32:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * wrapper.c (sim_stop): Stub sim_stop function.
-
-Thu Apr 17 18:33:01 1997 Fred Fish <fnf@cygnus.com>
-
- * arminit.c (ARMul_NewState): Preinitialize the state to
- all zero/NULL.
-
-Thu Apr 17 02:39:02 1997 Doug Evans <dje@canuck.cygnus.com>
-
- * Makefile.in (SIM_OBJS): Add sim-load.o.
- * wrapper.c (sim_kind,myname): New static locals.
- (sim_open): Set sim_kind, myname.
- (sim_load): Call sim_load_file to do work. Set start address from bfd.
- (sim_create_inferior): Return SIM_RC. Delete start_address arg.
-
-Thu Apr 17 11:48:25 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * wrapper.c (sim_trace): Update so that it matches prototype.
-
-Mon Apr 7 15:45:02 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
- * config.in: Ditto.
-
-Mon Apr 7 12:01:17 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
-
- * Makefile.in (armemu32.o): Replace $< with autoconf recommended
- $(srcdir)/....
- (armemu26.o): Ditto.
-
-Wed Apr 2 15:06:28 1997 Doug Evans <dje@canuck.cygnus.com>
-
- * wrapper.c (sim_open): New arg `kind'.
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Wed Apr 2 14:50:44 1997 Ian Lance Taylor <ian@cygnus.com>
-
- * COPYING: Update FSF address.
-
-Wed Apr 2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Wed Mar 19 01:14:00 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Mon Mar 17 15:10:07 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
-
- * configure: Re-generate.
-
-Fri Mar 14 10:34:11 1997 Michael Meissner <meissner@cygnus.com>
-
- * configure: Regenerate to track ../common/aclocal.m4 changes.
-
-Thu Mar 13 12:38:56 1997 Doug Evans <dje@canuck.cygnus.com>
-
- * wrapper.c (sim_open): Has result now.
- (sim_*): New SIM_DESC argument.
-
-Tue Feb 4 13:22:21 1997 Doug Evans <dje@canuck.cygnus.com>
-
- * Makefile.in (@COMMON_MAKEFILE_FRAG@): Use
- COMMON_{PRE,POST}_CONFIG_FRAG instead.
- * configure.in: sinclude ../common/aclocal.m4.
- * configure: Regenerated.
-
-Thu Jan 23 11:46:23 1997 Stu Grossman (grossman@critters.cygnus.com)
-
- * configure configure.in Makefile.in: Update to new configure
- scheme which is more compatible with WinGDB builds.
- * configure.in: Improve comment on how to run autoconf.
- * configure: Re-run autoconf to get new ../common/aclocal.m4.
- * Makefile.in: Use autoconf substitution to install common
- makefile fragment.
-
-Wed Nov 20 01:05:10 1996 Doug Evans <dje@canuck.cygnus.com>
-
- * run.c: Deleted, use one in ../common now.
- * Makefile.in: Delete everything that's been moved to
- ../common/Make-common.in.
- (SIM_OBJS): Define.
- * configure.in: Simplify using macros in ../common/aclocal.m4.
- * configure: Regenerated.
- * config.in: New file.
- * armos.c: #include config.h.
- * wrapper.c (mem_size): Value is in bytes now.
- (sim_callback): New global.
- (arm_sim_set_profile{,_size}): Delete.
- (arm_sim_set_mem_size): Rename to sim_size.
- (sim_do_command): Call printf_filtered via callback.
- (sim_set_callbacks): Record callback.
-
-Thu Oct 3 16:10:27 1996 Jason Molenda (crash@godzilla.cygnus.co.jp)
-
- * Makefile.in (mostlyclean): Remove config.log.
-
-Wed Jun 26 12:17:24 1996 Jason Molenda (crash@godzilla.cygnus.co.jp)
-
- * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
- INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
- (docdir): Removed.
- * configure.in (AC_PREREQ): autoconf 2.5 or higher.
- (AC_PROG_INSTALL): Added.
- * configure: Rebuilt.
-
-Wed Feb 21 12:14:31 1996 Ian Lance Taylor <ian@cygnus.com>
-
- * configure: Regenerate with autoconf 2.7.
-
-Fri Dec 15 16:27:30 1995 Ian Lance Taylor <ian@cygnus.com>
-
- * run.c (main): Use new bfd_big_endian macro.
-
-Mon Nov 20 17:40:38 1995 Doug Evans <dje@canuck.cygnus.com>
-
- * run.c: Include "getopt.h".
- (verbose): Delete.
- (usage): Make static.
- (main): Call arm_sim_set_verbosity.
- Only load sections marked SEC_LOAD.
- * wrapper.c (mem_size, verbosity): New static global.
- (arm_sim_set_mem_size): Renamed from sim_size. Callers updated.
- (arm_sim_set_profile{,_size}): Renamed from sim_foo. Callers updated.
-
-Fri Nov 17 19:35:11 1995 Doug Evans <dje@canuck.cygnus.com>
-
- * armdefs.h (ARMul_State): New member `verbose'.
- * armrdi.c (ARMul_ConsolePrint): Add missing va_end.
- * run.c (verbose): Make global.
- * wrapper.c (init): Set state->verbose.
- (ARMul_ConsolePrint): Don't print anything if !verbose.
-
-Fri Oct 13 15:30:30 1995 Doug Evans <dje@canuck.cygnus.com>
-
- * armos.c: #include dbg_rdi.h.
- (ARMul_OSHandleSWI): Handle SWI_Breakpoint.
- * armos.h (SWI_Breakpoint): Define.
- * wrapper.c: #include armemu.h, dbg_rdi.h.
- (rc): Delete.
- (sim_resume): Use state->EndCondition to record stop state.
- Call FLUSHPIPE before returning.
- (sim_stop_reason): Determine reason from state->EndCondition.
-
-Fri Oct 13 15:04:05 1995 steve chamberlain <sac@slash.cygnus.com>
-
- * wrapper.c (sim_set_callbacks): New.
-
-Thu Sep 28 19:45:56 1995 Doug Evans <dje@deneb.cygnus.com>
-
- * armos.c (ARMul_OSHandleSWI): Result of read/write calls is
- number of bytes not read/written (or -1).
-
-Wed Sep 20 13:35:54 1995 Ian Lance Taylor <ian@cygnus.com>
-
- * Makefile.in (maintainer-clean): New synonym for realclean.
-
-Fri Sep 8 14:27:20 1995 Ian Lance Taylor <ian@cygnus.com>
-
- * configure.in: Remove AC_PROG_INSTALL.
- * configure: Rebuild.
- * Makefile.in (INSTALL): Revert to using install.sh.
- (INSTALL_PROGRAM, INSTALL_DATA): Set to $(INSTALL).
- (INSTALL_XFORM, INSTALL_XFORM1): Restore.
- (mostlyclean): Make the same as clean, not distclean.
- (clean): Remove config.log.
- (install): Don't install in $(tooldir).
-
-Thu Sep 7 12:00:17 1995 Doug Evans <dje@canuck.cygnus.com>
-
- (Try to) Update to new bfd autoconf scheme.
- * run.c: Don't include sysdep.h.
- * Makefile.in (INSTALL{,_PROGRAM,_DATA}): Use autoconf computed value.
- (CC, CFLAGS, AR, RANLIB): Likewise.
- (HDEFINES, TDEFINES): Define.
- (CC_FOR_BUILD): Delete.
- (host_makefile_frag): Delete.
- (Makefile): Don't depend on frags.
- * configure.in (sysdep.h): Don't create symlink.
- (host_makefile_frag, frags): Deleted.
- (CC, CFLAGS, AR, RANLIB, INSTALL): Compute values.
- * configure: Regenerated.
-
-Thu Aug 3 10:45:37 1995 Fred Fish <fnf@cygnus.com>
-
- * Update all FSF addresses except those in COPYING* files.
-
-Wed Jul 5 16:15:54 1995 J.T. Conklin <jtc@rtl.cygnus.com>
-
- * Makefile.in (clean): Remove run, libsim.a.
-
- * Makefile.in, configure.in: converted to autoconf.
- * configure: New file, generated with autconf 2.4.
-
- * arm.mt: Removed.
-
-Fri Jun 30 16:49:47 1995 Stan Shebs <shebs@andros.cygnus.com>
-
- * wrapper.c (sim_do_command): New function.
-
-Tue Jun 13 10:57:32 1995 Steve Chamberlain <sac@slash.cygnus.com>
-
- * armos.c (ARMul_OSHandleSWI): New version to work with
- newlib simply.
-
-Thu Jun 8 14:37:14 1995 Steve Chamberlain <sac@slash.cygnus.com>
-
- * run.c (main): Grab return value from right register.
-
-Wed May 24 14:37:31 1995 Steve Chamberlain <sac@slash.cygnus.com>
-
- * New.
-
-
diff --git a/sim/arm/Makefile.in b/sim/arm/Makefile.in
deleted file mode 100644
index 19a9bcab4f9..00000000000
--- a/sim/arm/Makefile.in
+++ /dev/null
@@ -1,50 +0,0 @@
-# Makefile template for Configure for the arm sim library.
-# Copyright (C) 1995, 1996, 1997 Free Software Foundation, Inc.
-# Written by Cygnus Support.
-#
-# This program is free software; you can redistribute it and/or modify
-# it under the terms of the GNU General Public License as published by
-# the Free Software Foundation; either version 2 of the License, or
-# (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
-## COMMON_PRE_CONFIG_FRAG
-
-SIM_EXTRA_CFLAGS = -DMODET -DNEED_UI_LOOP_HOOK
-
-COPRO=@COPRO@
-
-SIM_OBJS = armemu26.o armemu32.o arminit.o armos.o armsupp.o \
- armvirt.o bag.o thumbemu.o wrapper.o sim-load.o $(COPRO)
-
-## COMMON_POST_CONFIG_FRAG
-
-
-armos.o: armos.c armdefs.h armos.h armfpe.h
-
-armcopro.o: armcopro.c armdefs.h
-
-armemu26.o: armemu.c armdefs.h armemu.h
- $(CC) -c $< -o armemu26.o $(ALL_CFLAGS)
-
-armemu32.o: armemu.c armdefs.h armemu.h
- $(CC) -c $< -o armemu32.o -DMODE32 $(ALL_CFLAGS)
-
-arminit.o: arminit.c armdefs.h armemu.h
-
-armrdi.o: armrdi.c armdefs.h armemu.h armos.h dbg_cp.h dbg_conf.h dbg_rdi.h \
- dbg_hif.h communicate.h
-
-armsupp.o: armsupp.c armdefs.h armemu.h
-
-thumbemu.o: thumbemu.c armdefs.h armemu.h
-
-bag.o: bag.c bag.h
diff --git a/sim/arm/README.Cygnus b/sim/arm/README.Cygnus
deleted file mode 100644
index adfb766451d..00000000000
--- a/sim/arm/README.Cygnus
+++ /dev/null
@@ -1,27 +0,0 @@
-
-This directory contains the standard release of the ARMulator from
-Advanced RISC Machines, and was ftp'd from.
-
-ftp.cl.cam.ac.uk:/arm/gnu
-
-It likes to use TCP/IP between the simulator and the host, which is
-nice, but is a pain to use under anything non-unix.
-
-I've added created a new Makefile.in (the original in Makefile.orig)
-to build a version of the simulator without the TCP/IP stuff, and a
-wrapper.c to link directly into gdb and the run command.
-
-It should be possible (barring major changes in the layout of
-the armulator) to upgrade the simulator by copying all the files
-out of a release into this directory and renaming the Makefile.
-
-(Except that I changed armos.c to work more simply with our
-simulator rigs)
-
-Steve
-
-sac@cygnus.com
-
-Mon May 15 12:03:28 PDT 1995
-
-
diff --git a/sim/arm/acconfig.h b/sim/arm/acconfig.h
deleted file mode 100644
index f9b87a10c60..00000000000
--- a/sim/arm/acconfig.h
+++ /dev/null
@@ -1,15 +0,0 @@
-
-/* Define to 1 if NLS is requested. */
-#undef ENABLE_NLS
-
-/* Define as 1 if you have catgets and don't want to use GNU gettext. */
-#undef HAVE_CATGETS
-
-/* Define as 1 if you have gettext and don't want to use GNU gettext. */
-#undef HAVE_GETTEXT
-
-/* Define as 1 if you have the stpcpy function. */
-#undef HAVE_STPCPY
-
-/* Define if your locale.h file contains LC_MESSAGES. */
-#undef HAVE_LC_MESSAGES
diff --git a/sim/arm/armcopro.c b/sim/arm/armcopro.c
deleted file mode 100644
index 52b22d7b85a..00000000000
--- a/sim/arm/armcopro.c
+++ /dev/null
@@ -1,1420 +0,0 @@
-/* armcopro.c -- co-processor interface: ARM6 Instruction Emulator.
- Copyright (C) 1994, 2000 Advanced RISC Machines Ltd.
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
-
-#include "armdefs.h"
-#include "armos.h"
-#include "armemu.h"
-#include "ansidecl.h"
-
-/* Dummy Co-processors. */
-
-static unsigned
-NoCoPro3R (ARMul_State * state ATTRIBUTE_UNUSED,
- unsigned a ATTRIBUTE_UNUSED,
- ARMword b ATTRIBUTE_UNUSED)
-{
- return ARMul_CANT;
-}
-
-static unsigned
-NoCoPro4R (ARMul_State * state ATTRIBUTE_UNUSED,
- unsigned a ATTRIBUTE_UNUSED,
- ARMword b ATTRIBUTE_UNUSED,
- ARMword c ATTRIBUTE_UNUSED)
-{
- return ARMul_CANT;
-}
-
-static unsigned
-NoCoPro4W (ARMul_State * state ATTRIBUTE_UNUSED,
- unsigned a ATTRIBUTE_UNUSED,
- ARMword b ATTRIBUTE_UNUSED,
- ARMword * c ATTRIBUTE_UNUSED)
-{
- return ARMul_CANT;
-}
-
-/* The XScale Co-processors. */
-
-/* Coprocessor 15: System Control. */
-
-/* There are two sets of registers for copro 15.
- One set is available when opcode_2 is 0 and
- the other set when opcode_2 >= 1. */
-static ARMword XScale_cp15_opcode_2_is_0_Regs[16];
-static ARMword XScale_cp15_opcode_2_is_not_0_Regs[16];
-/* There are also a set of breakpoint registers
- which are accessed via CRm instead of opcode_2. */
-static ARMword XScale_cp15_DBR1;
-static ARMword XScale_cp15_DBCON;
-static ARMword XScale_cp15_IBCR0;
-static ARMword XScale_cp15_IBCR1;
-
-static unsigned
-XScale_cp15_init (ARMul_State * state ATTRIBUTE_UNUSED)
-{
- int i;
-
- for (i = 16; i--;)
- {
- XScale_cp15_opcode_2_is_0_Regs[i] = 0;
- XScale_cp15_opcode_2_is_not_0_Regs[i] = 0;
- }
-
- /* Initialise the processor ID. */
- XScale_cp15_opcode_2_is_0_Regs[0] = 0x69052000;
-
- /* Initialise the cache type. */
- XScale_cp15_opcode_2_is_not_0_Regs[0] = 0x0B1AA1AA;
-
- /* Initialise the ARM Control Register. */
- XScale_cp15_opcode_2_is_0_Regs[1] = 0x00000078;
-
-}
-
-/* Check an access to a register. */
-
-static unsigned
-check_cp15_access (ARMul_State * state,
- unsigned reg,
- unsigned CRm,
- unsigned opcode_1,
- unsigned opcode_2)
-{
- /* Do not allow access to these register in USER mode. */
- if (state->Mode == USER26MODE || state->Mode == USER32MODE)
- return ARMul_CANT;
-
- /* Opcode_1should be zero. */
- if (opcode_1 != 0)
- return ARMul_CANT;
-
- /* Different register have different access requirements. */
- switch (reg)
- {
- case 0:
- case 1:
- /* CRm must be 0. Opcode_2 can be anything. */
- if (CRm != 0)
- return ARMul_CANT;
- break;
- case 2:
- case 3:
- /* CRm must be 0. Opcode_2 must be zero. */
- if ((CRm != 0) || (opcode_2 != 0))
- return ARMul_CANT;
- break;
- case 4:
- /* Access not allowed. */
- return ARMul_CANT;
- case 5:
- case 6:
- /* Opcode_2 must be zero. CRm must be 0. */
- if ((CRm != 0) || (opcode_2 != 0))
- return ARMul_CANT;
- break;
- case 7:
- /* Permissable combinations:
- Opcode_2 CRm
- 0 5
- 0 6
- 0 7
- 1 5
- 1 6
- 1 10
- 4 10
- 5 2
- 6 5 */
- switch (opcode_2)
- {
- default: return ARMul_CANT;
- case 6: if (CRm != 5) return ARMul_CANT; break;
- case 5: if (CRm != 2) return ARMul_CANT; break;
- case 4: if (CRm != 10) return ARMul_CANT; break;
- case 1: if ((CRm != 5) && (CRm != 6) && (CRm != 10)) return ARMul_CANT; break;
- case 0: if ((CRm < 5) || (CRm > 7)) return ARMul_CANT; break;
- }
- break;
-
- case 8:
- /* Permissable combinations:
- Opcode_2 CRm
- 0 5
- 0 6
- 0 7
- 1 5
- 1 6 */
- if (opcode_2 > 1)
- return ARMul_CANT;
- if ((CRm < 5) || (CRm > 7))
- return ARMul_CANT;
- if (opcode_2 == 1 && CRm == 7)
- return ARMul_CANT;
- break;
- case 9:
- /* Opcode_2 must be zero or one. CRm must be 1 or 2. */
- if ( ((CRm != 0) && (CRm != 1))
- || ((opcode_2 != 1) && (opcode_2 != 2)))
- return ARMul_CANT;
- break;
- case 10:
- /* Opcode_2 must be zero or one. CRm must be 4 or 8. */
- if ( ((CRm != 0) && (CRm != 1))
- || ((opcode_2 != 4) && (opcode_2 != 8)))
- return ARMul_CANT;
- break;
- case 11:
- /* Access not allowed. */
- return ARMul_CANT;
- case 12:
- /* Access not allowed. */
- return ARMul_CANT;
- case 13:
- /* Opcode_2 must be zero. CRm must be 0. */
- if ((CRm != 0) || (opcode_2 != 0))
- return ARMul_CANT;
- break;
- case 14:
- /* Opcode_2 must be 0. CRm must be 0, 3, 4, 8 or 9. */
- if (opcode_2 != 0)
- return ARMul_CANT;
-
- if ((CRm != 0) && (CRm != 3) && (CRm != 4) && (CRm != 8) && (CRm != 9))
- return ARMul_CANT;
- break;
- case 15:
- /* Opcode_2 must be zero. CRm must be 1. */
- if ((CRm != 1) || (opcode_2 != 0))
- return ARMul_CANT;
- break;
- default:
- /* Should never happen. */
- return ARMul_CANT;
- }
-
- return ARMul_DONE;
-}
-
-/* Store a value into one of coprocessor 15's registers. */
-
-void
-write_cp15_reg (ARMul_State * state, unsigned reg, unsigned opcode_2, unsigned CRm, ARMword value)
-{
- if (opcode_2)
- {
- switch (reg)
- {
- case 0: /* Cache Type. */
- /* Writes are not allowed. */
- return;
-
- case 1: /* Auxillary Control. */
- /* Only BITS (5, 4) and BITS (1, 0) can be written. */
- value &= 0x33;
- break;
-
- default:
- return;
- }
-
- XScale_cp15_opcode_2_is_not_0_Regs [reg] = value;
- }
- else
- {
- switch (reg)
- {
- case 0: /* ID. */
- /* Writes are not allowed. */
- return;
-
- case 1: /* ARM Control. */
- /* Only BITS (13, 11), BITS (9, 7) and BITS (2, 0) can be written.
- BITS (31, 14) and BIT (10) write as zero, BITS (6, 3) write as one. */
- value &= 0x00003b87;
- value |= 0x00000078;
-
- /* Change the endianness if necessary */
- if ((value & ARMul_CP15_R1_ENDIAN) !=
- (XScale_cp15_opcode_2_is_0_Regs [reg] & ARMul_CP15_R1_ENDIAN))
- {
- state->bigendSig = value & ARMul_CP15_R1_ENDIAN;
- /* Force ARMulator to notice these now. */
- state->Emulate = CHANGEMODE;
- }
- break;
-
- case 2: /* Translation Table Base. */
- /* Only BITS (31, 14) can be written. */
- value &= 0xffffc000;
- break;
-
- case 3: /* Domain Access Control. */
- /* All bits writable. */
- break;
-
- case 5: /* Fault Status Register. */
- /* BITS (10, 9) and BITS (7, 0) can be written. */
- value &= 0x000006ff;
- break;
-
- case 6: /* Fault Address Register. */
- /* All bits writable. */
- break;
-
- case 7: /* Cache Functions. */
- case 8: /* TLB Operations. */
- case 10: /* TLB Lock Down. */
- /* Ignore writes. */
- return;
-
- case 9: /* Data Cache Lock. */
- /* Only BIT (0) can be written. */
- value &= 0x1;
- break;
-
- case 13: /* Process ID. */
- /* Only BITS (31, 25) are writable. */
- value &= 0xfe000000;
- break;
-
- case 14: /* DBR0, DBR1, DBCON, IBCR0, IBCR1 */
- /* All bits can be written. Which register is accessed is
- dependent upon CRm. */
- switch (CRm)
- {
- case 0: /* DBR0 */
- break;
- case 3: /* DBR1 */
- XScale_cp15_DBR1 = value;
- break;
- case 4: /* DBCON */
- XScale_cp15_DBCON = value;
- break;
- case 8: /* IBCR0 */
- XScale_cp15_IBCR0 = value;
- break;
- case 9: /* IBCR1 */
- XScale_cp15_IBCR1 = value;
- break;
- default:
- return;
- }
- break;
-
- case 15: /* Coprpcessor Access Register. */
- /* Access is only valid if CRm == 1. */
- if (CRm != 1)
- return;
-
- /* Only BITS (13, 0) may be written. */
- value &= 0x00003fff;
- break;
-
- default:
- return;
- }
-
- XScale_cp15_opcode_2_is_0_Regs [reg] = value;
- }
-
- return;
-}
-
-/* Return the value in a cp15 register. */
-
-ARMword
-read_cp15_reg (unsigned reg, unsigned opcode_2, unsigned CRm)
-{
- if (opcode_2 == 0)
- {
- if (reg == 15 && CRm != 1)
- return 0;
-
- if (reg == 14)
- {
- switch (CRm)
- {
- case 3: return XScale_cp15_DBR1;
- case 4: return XScale_cp15_DBCON;
- case 8: return XScale_cp15_IBCR0;
- case 9: return XScale_cp15_IBCR1;
- default:
- break;
- }
- }
-
- return XScale_cp15_opcode_2_is_0_Regs [reg];
- }
- else
- return XScale_cp15_opcode_2_is_not_0_Regs [reg];
-
- return 0;
-}
-
-static unsigned
-XScale_cp15_LDC (ARMul_State * state, unsigned type, ARMword instr, ARMword data)
-{
- unsigned reg = BITS (12, 15);
- unsigned result;
-
- result = check_cp15_access (state, reg, 0, 0, 0);
-
- if (result == ARMul_DONE && type == ARMul_DATA)
- write_cp15_reg (state, reg, 0, 0, data);
-
- return result;
-}
-
-static unsigned
-XScale_cp15_STC (ARMul_State * state, unsigned type, ARMword instr, ARMword * data)
-{
- unsigned reg = BITS (12, 15);
- unsigned result;
-
- result = check_cp15_access (state, reg, 0, 0, 0);
-
- if (result == ARMul_DONE && type == ARMul_DATA)
- * data = read_cp15_reg (reg, 0, 0);
-
- return result;
-}
-
-static unsigned
-XScale_cp15_MRC (ARMul_State * state,
- unsigned type ATTRIBUTE_UNUSED,
- ARMword instr,
- ARMword * value)
-{
- unsigned opcode_2 = BITS (5, 7);
- unsigned CRm = BITS (0, 3);
- unsigned reg = BITS (16, 19);
- unsigned result;
-
- result = check_cp15_access (state, reg, CRm, BITS (21, 23), opcode_2);
-
- if (result == ARMul_DONE)
- * value = read_cp15_reg (reg, opcode_2, CRm);
-
- return result;
-}
-
-static unsigned
-XScale_cp15_MCR (ARMul_State * state,
- unsigned type ATTRIBUTE_UNUSED,
- ARMword instr,
- ARMword value)
-{
- unsigned opcode_2 = BITS (5, 7);
- unsigned CRm = BITS (0, 3);
- unsigned reg = BITS (16, 19);
- unsigned result;
-
- result = check_cp15_access (state, reg, CRm, BITS (21, 23), opcode_2);
-
- if (result == ARMul_DONE)
- write_cp15_reg (state, reg, opcode_2, CRm, value);
-
- return result;
-}
-
-static unsigned
-XScale_cp15_read_reg (ARMul_State * state ATTRIBUTE_UNUSED,
- unsigned reg,
- ARMword * value)
-{
- /* FIXME: Not sure what to do about the alternative register set
- here. For now default to just accessing CRm == 0 registers. */
- * value = read_cp15_reg (reg, 0, 0);
-
- return TRUE;
-}
-
-static unsigned
-XScale_cp15_write_reg (ARMul_State * state ATTRIBUTE_UNUSED,
- unsigned reg,
- ARMword value)
-{
- /* FIXME: Not sure what to do about the alternative register set
- here. For now default to just accessing CRm == 0 registers. */
- write_cp15_reg (state, reg, 0, 0, value);
-
- return TRUE;
-}
-
-/***************************************************************************\
-* Check for special XScale memory access features *
-\***************************************************************************/
-void
-XScale_check_memacc (ARMul_State * state, ARMword * address, int store)
-{
- ARMword dbcon, r0, r1;
- int e1, e0;
-
- if (!state->is_XScale)
- return;
-
- /* Check for PID-ification.
- XXX BTB access support will require this test failing. */
- r0 = (read_cp15_reg (13, 0, 0) & 0xfe000000);
- if (r0 && (*address & 0xfe000000) == 0)
- *address |= r0;
-
- /* Check alignment fault enable/disable. */
- if ((read_cp15_reg (1, 0, 0) & ARMul_CP15_R1_ALIGN) && (*address & 3))
- ARMul_Abort (state, ARMul_DataAbortV);
-
- if (XScale_debug_moe (state, -1))
- return;
-
- /* Check the data breakpoint registers. */
- dbcon = read_cp15_reg (14, 0, 4);
- r0 = read_cp15_reg (14, 0, 0);
- r1 = read_cp15_reg (14, 0, 3);
- e0 = dbcon & ARMul_CP15_DBCON_E0;
-
- if (dbcon & ARMul_CP15_DBCON_M)
- {
- /* r1 is a inverse mask. */
- if (e0 != 0 && ((store && e0 != 3) || (!store && e0 != 1))
- && ((*address & ~r1) == (r0 & ~r1)))
- {
- XScale_debug_moe (state, ARMul_CP14_R10_MOE_DB);
- ARMul_OSHandleSWI (state, SWI_Breakpoint);
- }
- }
- else
- {
- if (e0 != 0 && ((store && e0 != 3) || (!store && e0 != 1))
- && ((*address & ~3) == (r0 & ~3)))
- {
- XScale_debug_moe (state, ARMul_CP14_R10_MOE_DB);
- ARMul_OSHandleSWI (state, SWI_Breakpoint);
- }
-
- e1 = (dbcon & ARMul_CP15_DBCON_E1) >> 2;
- if (e1 != 0 && ((store && e1 != 3) || (!store && e1 != 1))
- && ((*address & ~3) == (r1 & ~3)))
- {
- XScale_debug_moe (state, ARMul_CP14_R10_MOE_DB);
- ARMul_OSHandleSWI (state, SWI_Breakpoint);
- }
- }
-}
-
-/***************************************************************************\
-* Check set
-\***************************************************************************/
-void
-XScale_set_fsr_far(ARMul_State * state, ARMword fsr, ARMword far)
-{
- if (!state->is_XScale || (read_cp14_reg (10) & (1UL << 31)) == 0)
- return;
-
- write_cp15_reg (state, 5, 0, 0, fsr);
- write_cp15_reg (state, 6, 0, 0, far);
-}
-
-/* Set the XScale debug `method of entry' if it is enabled. */
-int
-XScale_debug_moe (ARMul_State * state, int moe)
-{
- ARMword value;
-
- if (!state->is_XScale)
- return 1;
-
- value = read_cp14_reg (10);
- if (value & (1UL << 31))
- {
- if (moe != -1)
- {
- value &= ~0x1c;
- value |= moe;
-
- write_cp14_reg (10, value);
- }
- return 1;
- }
- return 0;
-}
-
-/* Coprocessor 13: Interrupt Controller and Bus Controller. */
-
-/* There are two sets of registers for copro 13.
- One set (of three registers) is available when CRm is 0
- and the other set (of six registers) when CRm is 1. */
-
-static ARMword XScale_cp13_CR0_Regs[16];
-static ARMword XScale_cp13_CR1_Regs[16];
-
-static unsigned
-XScale_cp13_init (ARMul_State * state ATTRIBUTE_UNUSED)
-{
- int i;
-
- for (i = 16; i--;)
- {
- XScale_cp13_CR0_Regs[i] = 0;
- XScale_cp13_CR1_Regs[i] = 0;
- }
-}
-
-/* Check an access to a register. */
-
-static unsigned
-check_cp13_access (ARMul_State * state,
- unsigned reg,
- unsigned CRm,
- unsigned opcode_1,
- unsigned opcode_2)
-{
- /* Do not allow access to these register in USER mode. */
- if (state->Mode == USER26MODE || state->Mode == USER32MODE)
- return ARMul_CANT;
-
- /* The opcodes should be zero. */
- if ((opcode_1 != 0) || (opcode_2 != 0))
- return ARMul_CANT;
-
- /* Do not allow access to these register if bit 13 of coprocessor
- 15's register 15 is zero. */
- if ((XScale_cp15_opcode_2_is_0_Regs[15] & (1 << 13)) == 0)
- return ARMul_CANT;
-
- /* Registers 0, 4 and 8 are defined when CRm == 0.
- Registers 0, 4, 5, 6, 7, 8 are defined when CRm == 1.
- For all other CRm values undefined behaviour results. */
- if (CRm == 0)
- {
- if (reg == 0 || reg == 4 || reg == 8)
- return ARMul_DONE;
- }
- else if (CRm == 1)
- {
- if (reg == 0 || (reg >= 4 && reg <= 8))
- return ARMul_DONE;
- }
-
- return ARMul_CANT;
-}
-
-/* Store a value into one of coprocessor 13's registers. */
-
-static void
-write_cp13_reg (unsigned reg, unsigned CRm, ARMword value)
-{
- switch (CRm)
- {
- case 0:
- switch (reg)
- {
- case 0: /* INTCTL */
- /* Only BITS (3:0) can be written. */
- value &= 0xf;
- break;
-
- case 4: /* INTSRC */
- /* No bits may be written. */
- return;
-
- case 8: /* INTSTR */
- /* Only BITS (1:0) can be written. */
- value &= 0x3;
- break;
-
- default:
- /* Should not happen. Ignore any writes to unimplemented registers. */
- return;
- }
-
- XScale_cp13_CR0_Regs [reg] = value;
- break;
-
- case 1:
- switch (reg)
- {
- case 0: /* BCUCTL */
- /* Only BITS (30:28) and BITS (3:0) can be written.
- BIT(31) is write ignored. */
- value &= 0x7000000f;
- value |= XScale_cp13_CR1_Regs[0] & (1UL << 31);
- break;
-
- case 4: /* ELOG0 */
- case 5: /* ELOG1 */
- case 6: /* ECAR0 */
- case 7: /* ECAR1 */
- /* No bits can be written. */
- return;
-
- case 8: /* ECTST */
- /* Only BITS (7:0) can be written. */
- value &= 0xff;
- break;
-
- default:
- /* Should not happen. Ignore any writes to unimplemented registers. */
- return;
- }
-
- XScale_cp13_CR1_Regs [reg] = value;
- break;
-
- default:
- /* Should not happen. */
- break;
- }
-
- return;
-}
-
-/* Return the value in a cp13 register. */
-
-static ARMword
-read_cp13_reg (unsigned reg, unsigned CRm)
-{
- if (CRm == 0)
- return XScale_cp13_CR0_Regs [reg];
- else if (CRm == 1)
- return XScale_cp13_CR1_Regs [reg];
-
- return 0;
-}
-
-static unsigned
-XScale_cp13_LDC (ARMul_State * state, unsigned type, ARMword instr, ARMword data)
-{
- unsigned reg = BITS (12, 15);
- unsigned result;
-
- result = check_cp13_access (state, reg, 0, 0, 0);
-
- if (result == ARMul_DONE && type == ARMul_DATA)
- write_cp13_reg (reg, 0, data);
-
- return result;
-}
-
-static unsigned
-XScale_cp13_STC (ARMul_State * state, unsigned type, ARMword instr, ARMword * data)
-{
- unsigned reg = BITS (12, 15);
- unsigned result;
-
- result = check_cp13_access (state, reg, 0, 0, 0);
-
- if (result == ARMul_DONE && type == ARMul_DATA)
- * data = read_cp13_reg (reg, 0);
-
- return result;
-}
-
-static unsigned
-XScale_cp13_MRC (ARMul_State * state,
- unsigned type ATTRIBUTE_UNUSED,
- ARMword instr,
- ARMword * value)
-{
- unsigned CRm = BITS (0, 3);
- unsigned reg = BITS (16, 19);
- unsigned result;
-
- result = check_cp13_access (state, reg, CRm, BITS (21, 23), BITS (5, 7));
-
- if (result == ARMul_DONE)
- * value = read_cp13_reg (reg, CRm);
-
- return result;
-}
-
-static unsigned
-XScale_cp13_MCR (ARMul_State * state,
- unsigned type ATTRIBUTE_UNUSED,
- ARMword instr,
- ARMword value)
-{
- unsigned CRm = BITS (0, 3);
- unsigned reg = BITS (16, 19);
- unsigned result;
-
- result = check_cp13_access (state, reg, CRm, BITS (21, 23), BITS (5, 7));
-
- if (result == ARMul_DONE)
- write_cp13_reg (reg, CRm, value);
-
- return result;
-}
-
-static unsigned
-XScale_cp13_read_reg
-(
- ARMul_State * state ATTRIBUTE_UNUSED,
- unsigned reg,
- ARMword * value
-)
-{
- /* FIXME: Not sure what to do about the alternative register set
- here. For now default to just accessing CRm == 0 registers. */
- * value = read_cp13_reg (reg, 0);
-
- return TRUE;
-}
-
-static unsigned
-XScale_cp13_write_reg
-(
- ARMul_State * state ATTRIBUTE_UNUSED,
- unsigned reg,
- ARMword value
-)
-{
- /* FIXME: Not sure what to do about the alternative register set
- here. For now default to just accessing CRm == 0 registers. */
- write_cp13_reg (reg, 0, value);
-
- return TRUE;
-}
-
-/* Coprocessor 14: Performance Monitoring, Clock and Power management,
- Software Debug. */
-
-static ARMword XScale_cp14_Regs[16];
-
-static unsigned
-XScale_cp14_init (ARMul_State * state ATTRIBUTE_UNUSED)
-{
- int i;
-
- for (i = 16; i--;)
- XScale_cp14_Regs[i] = 0;
-}
-
-/* Check an access to a register. */
-
-static unsigned
-check_cp14_access (ARMul_State * state,
- unsigned reg,
- unsigned CRm,
- unsigned opcode1,
- unsigned opcode2)
-{
- /* Not allowed to access these register in USER mode. */
- if (state->Mode == USER26MODE || state->Mode == USER32MODE)
- return ARMul_CANT;
-
- /* CRm should be zero. */
- if (CRm != 0)
- return ARMul_CANT;
-
- /* OPcodes should be zero. */
- if (opcode1 != 0 || opcode2 != 0)
- return ARMul_CANT;
-
- /* Accessing registers 4 or 5 has unpredicatable results. */
- if (reg >= 4 && reg <= 5)
- return ARMul_CANT;
-
- return ARMul_DONE;
-}
-
-/* Store a value into one of coprocessor 14's registers. */
-
-void
-write_cp14_reg (unsigned reg, ARMword value)
-{
- switch (reg)
- {
- case 0: /* PMNC */
- /* Only BITS (27:12), BITS (10:8) and BITS (6:0) can be written. */
- value &= 0x0ffff77f;
-
- /* Reset the clock counter if necessary */
- if (value & ARMul_CP14_R0_CLKRST)
- XScale_cp14_Regs [1] = 0;
- break;
-
- case 4:
- case 5:
- /* We should not normally reach this code. The debugger interface
- can bypass the normal checks though, so it could happen. */
- value = 0;
- break;
-
- case 6: /* CCLKCFG */
- /* Only BITS (3:0) can be written. */
- value &= 0xf;
- break;
-
- case 7: /* PWRMODE */
- /* Although BITS (1:0) can be written with non-zero values, this would
- have the side effect of putting the processor to sleep. Thus in
- order for the register to be read again, it would have to go into
- ACTIVE mode, which means that any read will see these bits as zero.
-
- Rather than trying to implement complex reset-to-zero-upon-read logic
- we just override the write value with zero. */
- value = 0;
- break;
-
- case 10: /* DCSR */
- /* Only BITS (31:30), BITS (23:22), BITS (20:16) and BITS (5:0) can
- be written. */
- value &= 0xc0df003f;
- break;
-
- case 11: /* TBREG */
- /* No writes are permitted. */
- value = 0;
- break;
-
- case 14: /* TXRXCTRL */
- /* Only BITS (31:30) can be written. */
- value &= 0xc0000000;
- break;
-
- default:
- /* All bits can be written. */
- break;
- }
-
- XScale_cp14_Regs [reg] = value;
-}
-
-/* Return the value in a cp14 register. Not a static function since
- it is used by the code to emulate the BKPT instruction in armemu.c. */
-
-ARMword
-read_cp14_reg (unsigned reg)
-{
- return XScale_cp14_Regs [reg];
-}
-
-static unsigned
-XScale_cp14_LDC (ARMul_State * state, unsigned type, ARMword instr, ARMword data)
-{
- unsigned reg = BITS (12, 15);
- unsigned result;
-
- result = check_cp14_access (state, reg, 0, 0, 0);
-
- if (result == ARMul_DONE && type == ARMul_DATA)
- write_cp14_reg (reg, data);
-
- return result;
-}
-
-static unsigned
-XScale_cp14_STC (ARMul_State * state, unsigned type, ARMword instr, ARMword * data)
-{
- unsigned reg = BITS (12, 15);
- unsigned result;
-
- result = check_cp14_access (state, reg, 0, 0, 0);
-
- if (result == ARMul_DONE && type == ARMul_DATA)
- * data = read_cp14_reg (reg);
-
- return result;
-}
-
-static unsigned
-XScale_cp14_MRC
-(
- ARMul_State * state,
- unsigned type ATTRIBUTE_UNUSED,
- ARMword instr,
- ARMword * value
-)
-{
- unsigned reg = BITS (16, 19);
- unsigned result;
-
- result = check_cp14_access (state, reg, BITS (0, 3), BITS (21, 23), BITS (5, 7));
-
- if (result == ARMul_DONE)
- * value = read_cp14_reg (reg);
-
- return result;
-}
-
-static unsigned
-XScale_cp14_MCR
-(
- ARMul_State * state,
- unsigned type ATTRIBUTE_UNUSED,
- ARMword instr,
- ARMword value
-)
-{
- unsigned reg = BITS (16, 19);
- unsigned result;
-
- result = check_cp14_access (state, reg, BITS (0, 3), BITS (21, 23), BITS (5, 7));
-
- if (result == ARMul_DONE)
- write_cp14_reg (reg, value);
-
- return result;
-}
-
-static unsigned
-XScale_cp14_read_reg
-(
- ARMul_State * state ATTRIBUTE_UNUSED,
- unsigned reg,
- ARMword * value
-)
-{
- * value = read_cp14_reg (reg);
-
- return TRUE;
-}
-
-static unsigned
-XScale_cp14_write_reg
-(
- ARMul_State * state ATTRIBUTE_UNUSED,
- unsigned reg,
- ARMword value
-)
-{
- write_cp14_reg (reg, value);
-
- return TRUE;
-}
-
-/* Here's ARMulator's MMU definition. A few things to note:
- 1) It has eight registers, but only two are defined.
- 2) You can only access its registers with MCR and MRC.
- 3) MMU Register 0 (ID) returns 0x41440110
- 4) Register 1 only has 4 bits defined. Bits 0 to 3 are unused, bit 4
- controls 32/26 bit program space, bit 5 controls 32/26 bit data space,
- bit 6 controls late abort timimg and bit 7 controls big/little endian. */
-
-static ARMword MMUReg[8];
-
-static unsigned
-MMUInit (ARMul_State * state)
-{
- MMUReg[1] = state->prog32Sig << 4 |
- state->data32Sig << 5 | state->lateabtSig << 6 | state->bigendSig << 7;
-
- ARMul_ConsolePrint (state, ", MMU present");
-
- return TRUE;
-}
-
-static unsigned
-MMUMRC (ARMul_State * state ATTRIBUTE_UNUSED,
- unsigned type ATTRIBUTE_UNUSED,
- ARMword instr,
- ARMword * value)
-{
- int reg = BITS (16, 19) & 7;
-
- if (reg == 0)
- *value = 0x41440110;
- else
- *value = MMUReg[reg];
-
- return ARMul_DONE;
-}
-
-static unsigned
-MMUMCR (ARMul_State * state,
- unsigned type ATTRIBUTE_UNUSED,
- ARMword instr,
- ARMword value)
-{
- int reg = BITS (16, 19) & 7;
-
- MMUReg[reg] = value;
-
- if (reg == 1)
- {
- ARMword p,d,l,b;
-
- p = state->prog32Sig;
- d = state->data32Sig;
- l = state->lateabtSig;
- b = state->bigendSig;
-
- state->prog32Sig = value >> 4 & 1;
- state->data32Sig = value >> 5 & 1;
- state->lateabtSig = value >> 6 & 1;
- state->bigendSig = value >> 7 & 1;
-
- if ( p != state->prog32Sig
- || d != state->data32Sig
- || l != state->lateabtSig
- || b != state->bigendSig)
- /* Force ARMulator to notice these now. */
- state->Emulate = CHANGEMODE;
- }
-
- return ARMul_DONE;
-}
-
-static unsigned
-MMURead (ARMul_State * state ATTRIBUTE_UNUSED, unsigned reg, ARMword * value)
-{
- if (reg == 0)
- *value = 0x41440110;
- else if (reg < 8)
- *value = MMUReg[reg];
-
- return TRUE;
-}
-
-static unsigned
-MMUWrite (ARMul_State * state, unsigned reg, ARMword value)
-{
- if (reg < 8)
- MMUReg[reg] = value;
-
- if (reg == 1)
- {
- ARMword p,d,l,b;
-
- p = state->prog32Sig;
- d = state->data32Sig;
- l = state->lateabtSig;
- b = state->bigendSig;
-
- state->prog32Sig = value >> 4 & 1;
- state->data32Sig = value >> 5 & 1;
- state->lateabtSig = value >> 6 & 1;
- state->bigendSig = value >> 7 & 1;
-
- if ( p != state->prog32Sig
- || d != state->data32Sig
- || l != state->lateabtSig
- || b != state->bigendSig)
- /* Force ARMulator to notice these now. */
- state->Emulate = CHANGEMODE;
- }
-
- return TRUE;
-}
-
-
-/* What follows is the Validation Suite Coprocessor. It uses two
- co-processor numbers (4 and 5) and has the follwing functionality.
- Sixteen registers. Both co-processor nuimbers can be used in an MCR
- and MRC to access these registers. CP 4 can LDC and STC to and from
- the registers. CP 4 and CP 5 CDP 0 will busy wait for the number of
- cycles specified by a CP register. CP 5 CDP 1 issues a FIQ after a
- number of cycles (specified in a CP register), CDP 2 issues an IRQW
- in the same way, CDP 3 and 4 turn of the FIQ and IRQ source, and CDP 5
- stores a 32 bit time value in a CP register (actually it's the total
- number of N, S, I, C and F cyles). */
-
-static ARMword ValReg[16];
-
-static unsigned
-ValLDC (ARMul_State * state ATTRIBUTE_UNUSED,
- unsigned type,
- ARMword instr,
- ARMword data)
-{
- static unsigned words;
-
- if (type != ARMul_DATA)
- words = 0;
- else
- {
- ValReg[BITS (12, 15)] = data;
-
- if (BIT (22))
- /* It's a long access, get two words. */
- if (words++ != 4)
- return ARMul_INC;
- }
-
- return ARMul_DONE;
-}
-
-static unsigned
-ValSTC (ARMul_State * state ATTRIBUTE_UNUSED,
- unsigned type,
- ARMword instr,
- ARMword * data)
-{
- static unsigned words;
-
- if (type != ARMul_DATA)
- words = 0;
- else
- {
- * data = ValReg[BITS (12, 15)];
-
- if (BIT (22))
- /* It's a long access, get two words. */
- if (words++ != 4)
- return ARMul_INC;
- }
-
- return ARMul_DONE;
-}
-
-static unsigned
-ValMRC (ARMul_State * state ATTRIBUTE_UNUSED,
- unsigned type ATTRIBUTE_UNUSED,
- ARMword instr,
- ARMword * value)
-{
- *value = ValReg[BITS (16, 19)];
-
- return ARMul_DONE;
-}
-
-static unsigned
-ValMCR (ARMul_State * state ATTRIBUTE_UNUSED,
- unsigned type ATTRIBUTE_UNUSED,
- ARMword instr,
- ARMword value)
-{
- ValReg[BITS (16, 19)] = value;
-
- return ARMul_DONE;
-}
-
-static unsigned
-ValCDP (ARMul_State * state, unsigned type, ARMword instr)
-{
- static unsigned long finish = 0;
-
- if (BITS (20, 23) != 0)
- return ARMul_CANT;
-
- if (type == ARMul_FIRST)
- {
- ARMword howlong;
-
- howlong = ValReg[BITS (0, 3)];
-
- /* First cycle of a busy wait. */
- finish = ARMul_Time (state) + howlong;
-
- return howlong == 0 ? ARMul_DONE : ARMul_BUSY;
- }
- else if (type == ARMul_BUSY)
- {
- if (ARMul_Time (state) >= finish)
- return ARMul_DONE;
- else
- return ARMul_BUSY;
- }
-
- return ARMul_CANT;
-}
-
-static unsigned
-DoAFIQ (ARMul_State * state)
-{
- state->NfiqSig = LOW;
- state->Exception++;
- return 0;
-}
-
-static unsigned
-DoAIRQ (ARMul_State * state)
-{
- state->NirqSig = LOW;
- state->Exception++;
- return 0;
-}
-
-static unsigned
-IntCDP (ARMul_State * state, unsigned type, ARMword instr)
-{
- static unsigned long finish;
- ARMword howlong;
-
- howlong = ValReg[BITS (0, 3)];
-
- switch ((int) BITS (20, 23))
- {
- case 0:
- if (type == ARMul_FIRST)
- {
- /* First cycle of a busy wait. */
- finish = ARMul_Time (state) + howlong;
-
- return howlong == 0 ? ARMul_DONE : ARMul_BUSY;
- }
- else if (type == ARMul_BUSY)
- {
- if (ARMul_Time (state) >= finish)
- return ARMul_DONE;
- else
- return ARMul_BUSY;
- }
- return ARMul_DONE;
-
- case 1:
- if (howlong == 0)
- ARMul_Abort (state, ARMul_FIQV);
- else
- ARMul_ScheduleEvent (state, howlong, DoAFIQ);
- return ARMul_DONE;
-
- case 2:
- if (howlong == 0)
- ARMul_Abort (state, ARMul_IRQV);
- else
- ARMul_ScheduleEvent (state, howlong, DoAIRQ);
- return ARMul_DONE;
-
- case 3:
- state->NfiqSig = HIGH;
- state->Exception--;
- return ARMul_DONE;
-
- case 4:
- state->NirqSig = HIGH;
- state->Exception--;
- return ARMul_DONE;
-
- case 5:
- ValReg[BITS (0, 3)] = ARMul_Time (state);
- return ARMul_DONE;
- }
-
- return ARMul_CANT;
-}
-
-/***************************************************************************\
-* Install co-processor instruction handlers in this routine *
-\***************************************************************************/
-
-unsigned
-ARMul_CoProInit (ARMul_State * state)
-{
- unsigned int i;
-
- /* Initialise tham all first. */
- for (i = 0; i < 16; i++)
- ARMul_CoProDetach (state, i);
-
- /* Install CoPro Instruction handlers here.
- The format is:
- ARMul_CoProAttach (state, CP Number,
- Init routine, Exit routine
- LDC routine, STC routine,
- MRC routine, MCR routine,
- CDP routine,
- Read Reg routine, Write Reg routine). */
- ARMul_CoProAttach (state, 4, NULL, NULL,
- ValLDC, ValSTC, ValMRC, ValMCR, ValCDP, NULL, NULL);
-
- ARMul_CoProAttach (state, 5, NULL, NULL,
- NULL, NULL, ValMRC, ValMCR, IntCDP, NULL, NULL);
-
- ARMul_CoProAttach (state, 15, MMUInit, NULL,
- NULL, NULL, MMUMRC, MMUMCR, NULL, MMURead, MMUWrite);
-
- ARMul_CoProAttach (state, 13, XScale_cp13_init, NULL,
- XScale_cp13_LDC, XScale_cp13_STC, XScale_cp13_MRC,
- XScale_cp13_MCR, NULL, XScale_cp13_read_reg,
- XScale_cp13_write_reg);
-
- ARMul_CoProAttach (state, 14, XScale_cp14_init, NULL,
- XScale_cp14_LDC, XScale_cp14_STC, XScale_cp14_MRC,
- XScale_cp14_MCR, NULL, XScale_cp14_read_reg,
- XScale_cp14_write_reg);
-
- ARMul_CoProAttach (state, 15, XScale_cp15_init, NULL,
- NULL, NULL, XScale_cp15_MRC, XScale_cp15_MCR,
- NULL, XScale_cp15_read_reg, XScale_cp15_write_reg);
-
- /* No handlers below here. */
-
- /* Call all the initialisation routines. */
- for (i = 0; i < 16; i++)
- if (state->CPInit[i])
- (state->CPInit[i]) (state);
-
- return TRUE;
-}
-
-/***************************************************************************\
-* Install co-processor finalisation routines in this routine *
-\***************************************************************************/
-
-void
-ARMul_CoProExit (ARMul_State * state)
-{
- register unsigned i;
-
- for (i = 0; i < 16; i++)
- if (state->CPExit[i])
- (state->CPExit[i]) (state);
-
- for (i = 0; i < 16; i++) /* Detach all handlers. */
- ARMul_CoProDetach (state, i);
-}
-
-/***************************************************************************\
-* Routines to hook Co-processors into ARMulator *
-\***************************************************************************/
-
-void
-ARMul_CoProAttach (ARMul_State * state,
- unsigned number,
- ARMul_CPInits * init,
- ARMul_CPExits * exit,
- ARMul_LDCs * ldc,
- ARMul_STCs * stc,
- ARMul_MRCs * mrc,
- ARMul_MCRs * mcr,
- ARMul_CDPs * cdp,
- ARMul_CPReads * read,
- ARMul_CPWrites * write)
-{
- if (init != NULL)
- state->CPInit[number] = init;
- if (exit != NULL)
- state->CPExit[number] = exit;
- if (ldc != NULL)
- state->LDC[number] = ldc;
- if (stc != NULL)
- state->STC[number] = stc;
- if (mrc != NULL)
- state->MRC[number] = mrc;
- if (mcr != NULL)
- state->MCR[number] = mcr;
- if (cdp != NULL)
- state->CDP[number] = cdp;
- if (read != NULL)
- state->CPRead[number] = read;
- if (write != NULL)
- state->CPWrite[number] = write;
-}
-
-void
-ARMul_CoProDetach (ARMul_State * state, unsigned number)
-{
- ARMul_CoProAttach (state, number, NULL, NULL,
- NoCoPro4R, NoCoPro4W, NoCoPro4W, NoCoPro4R,
- NoCoPro3R, NULL, NULL);
-
- state->CPInit[number] = NULL;
- state->CPExit[number] = NULL;
- state->CPRead[number] = NULL;
- state->CPWrite[number] = NULL;
-}
diff --git a/sim/arm/armdefs.h b/sim/arm/armdefs.h
deleted file mode 100644
index fde31251633..00000000000
--- a/sim/arm/armdefs.h
+++ /dev/null
@@ -1,416 +0,0 @@
-/* armdefs.h -- ARMulator common definitions: ARM6 Instruction Emulator.
- Copyright (C) 1994 Advanced RISC Machines Ltd.
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
-
-#include <stdio.h>
-#include <stdlib.h>
-
-#define FALSE 0
-#define TRUE 1
-#define LOW 0
-#define HIGH 1
-#define LOWHIGH 1
-#define HIGHLOW 2
-
-#ifndef __STDC__
-typedef char *VoidStar;
-#endif
-
-typedef unsigned long ARMword; /* must be 32 bits wide */
-typedef unsigned long long ARMdword; /* Must be at least 64 bits wide. */
-typedef struct ARMul_State ARMul_State;
-
-typedef unsigned ARMul_CPInits (ARMul_State * state);
-typedef unsigned ARMul_CPExits (ARMul_State * state);
-typedef unsigned ARMul_LDCs (ARMul_State * state, unsigned type,
- ARMword instr, ARMword value);
-typedef unsigned ARMul_STCs (ARMul_State * state, unsigned type,
- ARMword instr, ARMword * value);
-typedef unsigned ARMul_MRCs (ARMul_State * state, unsigned type,
- ARMword instr, ARMword * value);
-typedef unsigned ARMul_MCRs (ARMul_State * state, unsigned type,
- ARMword instr, ARMword value);
-typedef unsigned ARMul_CDPs (ARMul_State * state, unsigned type,
- ARMword instr);
-typedef unsigned ARMul_CPReads (ARMul_State * state, unsigned reg,
- ARMword * value);
-typedef unsigned ARMul_CPWrites (ARMul_State * state, unsigned reg,
- ARMword value);
-
-struct ARMul_State
-{
- ARMword Emulate; /* to start and stop emulation */
- unsigned EndCondition; /* reason for stopping */
- unsigned ErrorCode; /* type of illegal instruction */
- ARMword Reg[16]; /* the current register file */
- ARMword RegBank[7][16]; /* all the registers */
- /* 40 bit accumulator. We always keep this 64 bits wide,
- and move only 40 bits out of it in an MRA insn. */
- ARMdword Accumulator;
- ARMword Cpsr; /* the current psr */
- ARMword Spsr[7]; /* the exception psr's */
- ARMword NFlag, ZFlag, CFlag, VFlag, IFFlags; /* dummy flags for speed */
- ARMword SFlag;
-#ifdef MODET
- ARMword TFlag; /* Thumb state */
-#endif
- ARMword Bank; /* the current register bank */
- ARMword Mode; /* the current mode */
- ARMword instr, pc, temp; /* saved register state */
- ARMword loaded, decoded; /* saved pipeline state */
- unsigned long NumScycles, NumNcycles, NumIcycles, NumCcycles, NumFcycles; /* emulated cycles used */
- unsigned long NumInstrs; /* the number of instructions executed */
- unsigned NextInstr;
- unsigned VectorCatch; /* caught exception mask */
- unsigned CallDebug; /* set to call the debugger */
- unsigned CanWatch; /* set by memory interface if its willing to suffer the
- overhead of checking for watchpoints on each memory
- access */
- unsigned MemReadDebug, MemWriteDebug;
- unsigned long StopHandle;
-
- unsigned char *MemDataPtr; /* admin data */
- unsigned char *MemInPtr; /* the Data In bus */
- unsigned char *MemOutPtr; /* the Data Out bus (which you may not need */
- unsigned char *MemSparePtr; /* extra space */
- ARMword MemSize;
-
- unsigned char *OSptr; /* OS Handle */
- char *CommandLine; /* Command Line from ARMsd */
-
- ARMul_CPInits *CPInit[16]; /* coprocessor initialisers */
- ARMul_CPExits *CPExit[16]; /* coprocessor finalisers */
- ARMul_LDCs *LDC[16]; /* LDC instruction */
- ARMul_STCs *STC[16]; /* STC instruction */
- ARMul_MRCs *MRC[16]; /* MRC instruction */
- ARMul_MCRs *MCR[16]; /* MCR instruction */
- ARMul_CDPs *CDP[16]; /* CDP instruction */
- ARMul_CPReads *CPRead[16]; /* Read CP register */
- ARMul_CPWrites *CPWrite[16]; /* Write CP register */
- unsigned char *CPData[16]; /* Coprocessor data */
- unsigned char const *CPRegWords[16]; /* map of coprocessor register sizes */
- unsigned long LastTime; /* Value of last call to ARMul_Time() */
- ARMword CP14R0_CCD; /* used to count 64 clock cycles with CP14 R0 bit
- 3 set */
-
- unsigned EventSet; /* the number of events in the queue */
- unsigned long Now; /* time to the nearest cycle */
- struct EventNode **EventPtr; /* the event list */
-
- unsigned Exception; /* enable the next four values */
- unsigned Debug; /* show instructions as they are executed */
- unsigned NresetSig; /* reset the processor */
- unsigned NfiqSig;
- unsigned NirqSig;
-
- unsigned abortSig;
- unsigned NtransSig;
- unsigned bigendSig;
- unsigned prog32Sig;
- unsigned data32Sig;
- unsigned lateabtSig;
- ARMword Vector; /* synthesize aborts in cycle modes */
- ARMword Aborted; /* sticky flag for aborts */
- ARMword Reseted; /* sticky flag for Reset */
- ARMword Inted, LastInted; /* sticky flags for interrupts */
- ARMword Base; /* extra hand for base writeback */
- ARMword AbortAddr; /* to keep track of Prefetch aborts */
-
- const struct Dbg_HostosInterface *hostif;
-
- unsigned is_v4; /* Are we emulating a v4 architecture (or higher) ? */
- unsigned is_v5; /* Are we emulating a v5 architecture ? */
- unsigned is_v5e; /* Are we emulating a v5e architecture ? */
- unsigned is_XScale; /* Are we emulating an XScale architecture ? */
- unsigned verbose; /* Print various messages like the banner */
-};
-
-#define ResetPin NresetSig
-#define FIQPin NfiqSig
-#define IRQPin NirqSig
-#define AbortPin abortSig
-#define TransPin NtransSig
-#define BigEndPin bigendSig
-#define Prog32Pin prog32Sig
-#define Data32Pin data32Sig
-#define LateAbortPin lateabtSig
-
-/***************************************************************************\
-* Properties of ARM we know about *
-\***************************************************************************/
-
-/* The bitflags */
-#define ARM_Fix26_Prop 0x01
-#define ARM_Nexec_Prop 0x02
-#define ARM_Debug_Prop 0x10
-#define ARM_Isync_Prop ARM_Debug_Prop
-#define ARM_Lock_Prop 0x20
-#define ARM_v4_Prop 0x40
-#define ARM_v5_Prop 0x80
-#define ARM_v5e_Prop 0x100
-#define ARM_XScale_Prop 0x200
-
-/***************************************************************************\
-* Macros to extract instruction fields *
-\***************************************************************************/
-
-#define BIT(n) ( (ARMword)(instr>>(n))&1) /* bit n of instruction */
-#define BITS(m,n) ( (ARMword)(instr<<(31-(n))) >> ((31-(n))+(m)) ) /* bits m to n of instr */
-#define TOPBITS(n) (instr >> (n)) /* bits 31 to n of instr */
-
-/***************************************************************************\
-* The hardware vector addresses *
-\***************************************************************************/
-
-#define ARMResetV 0L
-#define ARMUndefinedInstrV 4L
-#define ARMSWIV 8L
-#define ARMPrefetchAbortV 12L
-#define ARMDataAbortV 16L
-#define ARMAddrExceptnV 20L
-#define ARMIRQV 24L
-#define ARMFIQV 28L
-#define ARMErrorV 32L /* This is an offset, not an address ! */
-
-#define ARMul_ResetV ARMResetV
-#define ARMul_UndefinedInstrV ARMUndefinedInstrV
-#define ARMul_SWIV ARMSWIV
-#define ARMul_PrefetchAbortV ARMPrefetchAbortV
-#define ARMul_DataAbortV ARMDataAbortV
-#define ARMul_AddrExceptnV ARMAddrExceptnV
-#define ARMul_IRQV ARMIRQV
-#define ARMul_FIQV ARMFIQV
-
-/***************************************************************************\
-* Mode and Bank Constants *
-\***************************************************************************/
-
-#define USER26MODE 0L
-#define FIQ26MODE 1L
-#define IRQ26MODE 2L
-#define SVC26MODE 3L
-#define USER32MODE 16L
-#define FIQ32MODE 17L
-#define IRQ32MODE 18L
-#define SVC32MODE 19L
-#define ABORT32MODE 23L
-#define UNDEF32MODE 27L
-#define SYSTEMMODE 31L
-
-#define ARM32BITMODE (state->Mode > 3)
-#define ARM26BITMODE (state->Mode <= 3)
-#define ARMMODE (state->Mode)
-#define ARMul_MODEBITS 0x1fL
-#define ARMul_MODE32BIT ARM32BITMODE
-#define ARMul_MODE26BIT ARM26BITMODE
-
-#define USERBANK 0
-#define FIQBANK 1
-#define IRQBANK 2
-#define SVCBANK 3
-#define ABORTBANK 4
-#define UNDEFBANK 5
-#define DUMMYBANK 6
-#define SYSTEMBANK USERBANK
-
-#define BANK_CAN_ACCESS_SPSR(bank) \
- ((bank) != USERBANK && (bank) != SYSTEMBANK && (bank) != DUMMYBANK)
-
-/***************************************************************************\
-* Definitons of things in the emulator *
-\***************************************************************************/
-
-extern void ARMul_EmulateInit (void);
-extern ARMul_State *ARMul_NewState (void);
-extern void ARMul_Reset (ARMul_State * state);
-extern ARMword ARMul_DoProg (ARMul_State * state);
-extern ARMword ARMul_DoInstr (ARMul_State * state);
-
-/***************************************************************************\
-* Definitons of things for event handling *
-\***************************************************************************/
-
-extern void ARMul_ScheduleEvent (ARMul_State * state, unsigned long delay,
- unsigned (*func) ());
-extern void ARMul_EnvokeEvent (ARMul_State * state);
-extern unsigned long ARMul_Time (ARMul_State * state);
-
-/***************************************************************************\
-* Useful support routines *
-\***************************************************************************/
-
-extern ARMword ARMul_GetReg (ARMul_State * state, unsigned mode,
- unsigned reg);
-extern void ARMul_SetReg (ARMul_State * state, unsigned mode, unsigned reg,
- ARMword value);
-extern ARMword ARMul_GetPC (ARMul_State * state);
-extern ARMword ARMul_GetNextPC (ARMul_State * state);
-extern void ARMul_SetPC (ARMul_State * state, ARMword value);
-extern ARMword ARMul_GetR15 (ARMul_State * state);
-extern void ARMul_SetR15 (ARMul_State * state, ARMword value);
-
-extern ARMword ARMul_GetCPSR (ARMul_State * state);
-extern void ARMul_SetCPSR (ARMul_State * state, ARMword value);
-extern ARMword ARMul_GetSPSR (ARMul_State * state, ARMword mode);
-extern void ARMul_SetSPSR (ARMul_State * state, ARMword mode, ARMword value);
-
-/***************************************************************************\
-* Definitons of things to handle aborts *
-\***************************************************************************/
-
-extern void ARMul_Abort (ARMul_State * state, ARMword address);
-#define ARMul_ABORTWORD 0xefffffff /* SWI -1 */
-#define ARMul_PREFETCHABORT(address) if (state->AbortAddr == 1) \
- state->AbortAddr = (address & ~3L)
-#define ARMul_DATAABORT(address) state->abortSig = HIGH ; \
- state->Aborted = ARMul_DataAbortV ;
-#define ARMul_CLEARABORT state->abortSig = LOW
-
-/***************************************************************************\
-* Definitons of things in the memory interface *
-\***************************************************************************/
-
-extern unsigned ARMul_MemoryInit (ARMul_State * state,
- unsigned long initmemsize);
-extern void ARMul_MemoryExit (ARMul_State * state);
-
-extern ARMword ARMul_LoadInstrS (ARMul_State * state, ARMword address,
- ARMword isize);
-extern ARMword ARMul_LoadInstrN (ARMul_State * state, ARMword address,
- ARMword isize);
-extern ARMword ARMul_ReLoadInstr (ARMul_State * state, ARMword address,
- ARMword isize);
-
-extern ARMword ARMul_LoadWordS (ARMul_State * state, ARMword address);
-extern ARMword ARMul_LoadWordN (ARMul_State * state, ARMword address);
-extern ARMword ARMul_LoadHalfWord (ARMul_State * state, ARMword address);
-extern ARMword ARMul_LoadByte (ARMul_State * state, ARMword address);
-
-extern void ARMul_StoreWordS (ARMul_State * state, ARMword address,
- ARMword data);
-extern void ARMul_StoreWordN (ARMul_State * state, ARMword address,
- ARMword data);
-extern void ARMul_StoreHalfWord (ARMul_State * state, ARMword address,
- ARMword data);
-extern void ARMul_StoreByte (ARMul_State * state, ARMword address,
- ARMword data);
-
-extern ARMword ARMul_SwapWord (ARMul_State * state, ARMword address,
- ARMword data);
-extern ARMword ARMul_SwapByte (ARMul_State * state, ARMword address,
- ARMword data);
-
-extern void ARMul_Icycles (ARMul_State * state, unsigned number,
- ARMword address);
-extern void ARMul_Ccycles (ARMul_State * state, unsigned number,
- ARMword address);
-
-extern ARMword ARMul_ReadWord (ARMul_State * state, ARMword address);
-extern ARMword ARMul_ReadByte (ARMul_State * state, ARMword address);
-extern ARMword ARMul_SafeReadByte (ARMul_State * state, ARMword address);
-extern void ARMul_WriteWord (ARMul_State * state, ARMword address,
- ARMword data);
-extern void ARMul_WriteByte (ARMul_State * state, ARMword address,
- ARMword data);
-extern void ARMul_SafeWriteByte (ARMul_State * state, ARMword address,
- ARMword data);
-
-extern ARMword ARMul_MemAccess (ARMul_State * state, ARMword, ARMword,
- ARMword, ARMword, ARMword, ARMword, ARMword,
- ARMword, ARMword, ARMword);
-
-/***************************************************************************\
-* Definitons of things in the co-processor interface *
-\***************************************************************************/
-
-#define ARMul_FIRST 0
-#define ARMul_TRANSFER 1
-#define ARMul_BUSY 2
-#define ARMul_DATA 3
-#define ARMul_INTERRUPT 4
-#define ARMul_DONE 0
-#define ARMul_CANT 1
-#define ARMul_INC 3
-
-#define ARMul_CP13_R0_FIQ 0x1
-#define ARMul_CP13_R0_IRQ 0x2
-#define ARMul_CP13_R8_PMUS 0x1
-
-#define ARMul_CP14_R0_ENABLE 0x0001
-#define ARMul_CP14_R0_CLKRST 0x0004
-#define ARMul_CP14_R0_CCD 0x0008
-#define ARMul_CP14_R0_INTEN0 0x0010
-#define ARMul_CP14_R0_INTEN1 0x0020
-#define ARMul_CP14_R0_INTEN2 0x0040
-#define ARMul_CP14_R0_FLAG0 0x0100
-#define ARMul_CP14_R0_FLAG1 0x0200
-#define ARMul_CP14_R0_FLAG2 0x0400
-#define ARMul_CP14_R10_MOE_IB 0x0004
-#define ARMul_CP14_R10_MOE_DB 0x0008
-#define ARMul_CP14_R10_MOE_BT 0x000c
-#define ARMul_CP15_R1_ENDIAN 0x0080
-#define ARMul_CP15_R1_ALIGN 0x0002
-#define ARMul_CP15_R5_X 0x0400
-#define ARMul_CP15_R5_ST_ALIGN 0x0001
-#define ARMul_CP15_R5_IMPRE 0x0406
-#define ARMul_CP15_R5_MMU_EXCPT 0x0400
-#define ARMul_CP15_DBCON_M 0x0100
-#define ARMul_CP15_DBCON_E1 0x000c
-#define ARMul_CP15_DBCON_E0 0x0003
-
-extern unsigned ARMul_CoProInit (ARMul_State * state);
-extern void ARMul_CoProExit (ARMul_State * state);
-extern void ARMul_CoProAttach (ARMul_State * state, unsigned number,
- ARMul_CPInits * init, ARMul_CPExits * exit,
- ARMul_LDCs * ldc, ARMul_STCs * stc,
- ARMul_MRCs * mrc, ARMul_MCRs * mcr,
- ARMul_CDPs * cdp,
- ARMul_CPReads * read, ARMul_CPWrites * write);
-extern void ARMul_CoProDetach (ARMul_State * state, unsigned number);
-extern void XScale_check_memacc (ARMul_State * state, ARMword * address,
- int store);
-extern void XScale_set_fsr_far (ARMul_State * state, ARMword fsr, ARMword far);
-extern int XScale_debug_moe (ARMul_State * state, int moe);
-
-/***************************************************************************\
-* Definitons of things in the host environment *
-\***************************************************************************/
-
-extern unsigned ARMul_OSInit (ARMul_State * state);
-extern void ARMul_OSExit (ARMul_State * state);
-extern unsigned ARMul_OSHandleSWI (ARMul_State * state, ARMword number);
-extern ARMword ARMul_OSLastErrorP (ARMul_State * state);
-
-extern ARMword ARMul_Debug (ARMul_State * state, ARMword pc, ARMword instr);
-extern unsigned ARMul_OSException (ARMul_State * state, ARMword vector,
- ARMword pc);
-extern int rdi_log;
-
-/***************************************************************************\
-* Host-dependent stuff *
-\***************************************************************************/
-
-#ifdef macintosh
-pascal void SpinCursor (short increment); /* copied from CursorCtl.h */
-# define HOURGLASS SpinCursor( 1 )
-# define HOURGLASS_RATE 1023 /* 2^n - 1 */
-#endif
-
-extern void ARMul_UndefInstr (ARMul_State *, ARMword);
-extern void ARMul_FixCPSR (ARMul_State *, ARMword, ARMword);
-extern void ARMul_FixSPSR (ARMul_State *, ARMword, ARMword);
-extern void ARMul_ConsolePrint (ARMul_State *, const char *, ...);
-extern void ARMul_SelectProcessor (ARMul_State *, unsigned);
diff --git a/sim/arm/armemu.c b/sim/arm/armemu.c
deleted file mode 100644
index 4edac6f4112..00000000000
--- a/sim/arm/armemu.c
+++ /dev/null
@@ -1,4847 +0,0 @@
-/* armemu.c -- Main instruction emulation: ARM7 Instruction Emulator.
- Copyright (C) 1994 Advanced RISC Machines Ltd.
- Modifications to add arch. v4 support by <jsmith@cygnus.com>.
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
-
-#include "armdefs.h"
-#include "armemu.h"
-#include "armos.h"
-
-static ARMword GetDPRegRHS (ARMul_State * state, ARMword instr);
-static ARMword GetDPSRegRHS (ARMul_State * state, ARMword instr);
-static void WriteR15 (ARMul_State * state, ARMword src);
-static void WriteSR15 (ARMul_State * state, ARMword src);
-static void WriteR15Branch (ARMul_State * state, ARMword src);
-static ARMword GetLSRegRHS (ARMul_State * state, ARMword instr);
-static ARMword GetLS7RHS (ARMul_State * state, ARMword instr);
-static unsigned LoadWord (ARMul_State * state, ARMword instr,
- ARMword address);
-static unsigned LoadHalfWord (ARMul_State * state, ARMword instr,
- ARMword address, int signextend);
-static unsigned LoadByte (ARMul_State * state, ARMword instr, ARMword address,
- int signextend);
-static unsigned StoreWord (ARMul_State * state, ARMword instr,
- ARMword address);
-static unsigned StoreHalfWord (ARMul_State * state, ARMword instr,
- ARMword address);
-static unsigned StoreByte (ARMul_State * state, ARMword instr,
- ARMword address);
-static void LoadMult (ARMul_State * state, ARMword address, ARMword instr,
- ARMword WBBase);
-static void StoreMult (ARMul_State * state, ARMword address, ARMword instr,
- ARMword WBBase);
-static void LoadSMult (ARMul_State * state, ARMword address, ARMword instr,
- ARMword WBBase);
-static void StoreSMult (ARMul_State * state, ARMword address, ARMword instr,
- ARMword WBBase);
-static unsigned Multiply64 (ARMul_State * state, ARMword instr,
- int signextend, int scc);
-static unsigned MultiplyAdd64 (ARMul_State * state, ARMword instr,
- int signextend, int scc);
-static void Handle_Load_Double (ARMul_State * state, ARMword instr);
-static void Handle_Store_Double (ARMul_State * state, ARMword instr);
-
-#define LUNSIGNED (0) /* unsigned operation */
-#define LSIGNED (1) /* signed operation */
-#define LDEFAULT (0) /* default : do nothing */
-#define LSCC (1) /* set condition codes on result */
-
-#ifdef NEED_UI_LOOP_HOOK
-/* How often to run the ui_loop update, when in use */
-#define UI_LOOP_POLL_INTERVAL 0x32000
-
-/* Counter for the ui_loop_hook update */
-static long ui_loop_hook_counter = UI_LOOP_POLL_INTERVAL;
-
-/* Actual hook to call to run through gdb's gui event loop */
-extern int (*ui_loop_hook) (int);
-#endif /* NEED_UI_LOOP_HOOK */
-
-extern int stop_simulator;
-
-/***************************************************************************\
-* short-hand macros for LDR/STR *
-\***************************************************************************/
-
-/* store post decrement writeback */
-#define SHDOWNWB() \
- lhs = LHS ; \
- if (StoreHalfWord(state, instr, lhs)) \
- LSBase = lhs - GetLS7RHS(state, instr) ;
-
-/* store post increment writeback */
-#define SHUPWB() \
- lhs = LHS ; \
- if (StoreHalfWord(state, instr, lhs)) \
- LSBase = lhs + GetLS7RHS(state, instr) ;
-
-/* store pre decrement */
-#define SHPREDOWN() \
- (void)StoreHalfWord(state, instr, LHS - GetLS7RHS(state, instr)) ;
-
-/* store pre decrement writeback */
-#define SHPREDOWNWB() \
- temp = LHS - GetLS7RHS(state, instr) ; \
- if (StoreHalfWord(state, instr, temp)) \
- LSBase = temp ;
-
-/* store pre increment */
-#define SHPREUP() \
- (void)StoreHalfWord(state, instr, LHS + GetLS7RHS(state, instr)) ;
-
-/* store pre increment writeback */
-#define SHPREUPWB() \
- temp = LHS + GetLS7RHS(state, instr) ; \
- if (StoreHalfWord(state, instr, temp)) \
- LSBase = temp ;
-
-/* Load post decrement writeback. */
-#define LHPOSTDOWN() \
-{ \
- int done = 1; \
- lhs = LHS; \
- temp = lhs - GetLS7RHS (state, instr); \
- \
- switch (BITS (5, 6)) \
- { \
- case 1: /* H */ \
- if (LoadHalfWord (state, instr, lhs, LUNSIGNED)) \
- LSBase = temp; \
- break; \
- case 2: /* SB */ \
- if (LoadByte (state, instr, lhs, LSIGNED)) \
- LSBase = temp; \
- break; \
- case 3: /* SH */ \
- if (LoadHalfWord (state, instr, lhs, LSIGNED)) \
- LSBase = temp; \
- break; \
- case 0: /* SWP handled elsewhere. */ \
- default: \
- done = 0; \
- break; \
- } \
- if (done) \
- break; \
-}
-
-/* Load post increment writeback. */
-#define LHPOSTUP() \
-{ \
- int done = 1; \
- lhs = LHS; \
- temp = lhs + GetLS7RHS (state, instr); \
- \
- switch (BITS (5, 6)) \
- { \
- case 1: /* H */ \
- if (LoadHalfWord (state, instr, lhs, LUNSIGNED)) \
- LSBase = temp; \
- break; \
- case 2: /* SB */ \
- if (LoadByte (state, instr, lhs, LSIGNED)) \
- LSBase = temp; \
- break; \
- case 3: /* SH */ \
- if (LoadHalfWord (state, instr, lhs, LSIGNED)) \
- LSBase = temp; \
- break; \
- case 0: /* SWP handled elsewhere. */ \
- default: \
- done = 0; \
- break; \
- } \
- if (done) \
- break; \
-}
-
-
-/* load pre decrement */
-#define LHPREDOWN() \
-{ \
- int done = 1 ; \
- temp = LHS - GetLS7RHS(state,instr) ; \
- switch (BITS(5,6)) { \
- case 1: /* H */ \
- (void)LoadHalfWord(state,instr,temp,LUNSIGNED) ; \
- break ; \
- case 2: /* SB */ \
- (void)LoadByte(state,instr,temp,LSIGNED) ; \
- break ; \
- case 3: /* SH */ \
- (void)LoadHalfWord(state,instr,temp,LSIGNED) ; \
- break ; \
- case 0: /* SWP handled elsewhere */ \
- default: \
- done = 0 ; \
- break ; \
- } \
- if (done) \
- break ; \
-}
-
-/* load pre decrement writeback */
-#define LHPREDOWNWB() \
-{ \
- int done = 1 ; \
- temp = LHS - GetLS7RHS(state, instr) ; \
- switch (BITS(5,6)) { \
- case 1: /* H */ \
- if (LoadHalfWord(state,instr,temp,LUNSIGNED)) \
- LSBase = temp ; \
- break ; \
- case 2: /* SB */ \
- if (LoadByte(state,instr,temp,LSIGNED)) \
- LSBase = temp ; \
- break ; \
- case 3: /* SH */ \
- if (LoadHalfWord(state,instr,temp,LSIGNED)) \
- LSBase = temp ; \
- break ; \
- case 0: /* SWP handled elsewhere */ \
- default: \
- done = 0 ; \
- break ; \
- } \
- if (done) \
- break ; \
-}
-
-/* load pre increment */
-#define LHPREUP() \
-{ \
- int done = 1 ; \
- temp = LHS + GetLS7RHS(state,instr) ; \
- switch (BITS(5,6)) { \
- case 1: /* H */ \
- (void)LoadHalfWord(state,instr,temp,LUNSIGNED) ; \
- break ; \
- case 2: /* SB */ \
- (void)LoadByte(state,instr,temp,LSIGNED) ; \
- break ; \
- case 3: /* SH */ \
- (void)LoadHalfWord(state,instr,temp,LSIGNED) ; \
- break ; \
- case 0: /* SWP handled elsewhere */ \
- default: \
- done = 0 ; \
- break ; \
- } \
- if (done) \
- break ; \
-}
-
-/* load pre increment writeback */
-#define LHPREUPWB() \
-{ \
- int done = 1 ; \
- temp = LHS + GetLS7RHS(state, instr) ; \
- switch (BITS(5,6)) { \
- case 1: /* H */ \
- if (LoadHalfWord(state,instr,temp,LUNSIGNED)) \
- LSBase = temp ; \
- break ; \
- case 2: /* SB */ \
- if (LoadByte(state,instr,temp,LSIGNED)) \
- LSBase = temp ; \
- break ; \
- case 3: /* SH */ \
- if (LoadHalfWord(state,instr,temp,LSIGNED)) \
- LSBase = temp ; \
- break ; \
- case 0: /* SWP handled elsewhere */ \
- default: \
- done = 0 ; \
- break ; \
- } \
- if (done) \
- break ; \
-}
-
-/***************************************************************************\
-* EMULATION of ARM6 *
-\***************************************************************************/
-
-/* The PC pipeline value depends on whether ARM or Thumb instructions
- are being executed: */
-ARMword isize;
-
-ARMword
-#ifdef MODE32
-ARMul_Emulate32 (register ARMul_State * state)
-#else
-ARMul_Emulate26 (register ARMul_State * state)
-#endif
-{
- register ARMword instr, /* the current instruction */
- dest = 0, /* almost the DestBus */
- temp, /* ubiquitous third hand */
- pc = 0; /* the address of the current instruction */
- ARMword lhs, rhs; /* almost the ABus and BBus */
- ARMword decoded = 0, loaded = 0; /* instruction pipeline */
-
-/***************************************************************************\
-* Execute the next instruction *
-\***************************************************************************/
-
- if (state->NextInstr < PRIMEPIPE)
- {
- decoded = state->decoded;
- loaded = state->loaded;
- pc = state->pc;
- }
-
- do
- { /* just keep going */
- isize = INSN_SIZE;
- switch (state->NextInstr)
- {
- case SEQ:
- state->Reg[15] += isize; /* Advance the pipeline, and an S cycle */
- pc += isize;
- instr = decoded;
- decoded = loaded;
- loaded = ARMul_LoadInstrS (state, pc + (isize * 2), isize);
- break;
-
- case NONSEQ:
- state->Reg[15] += isize; /* Advance the pipeline, and an N cycle */
- pc += isize;
- instr = decoded;
- decoded = loaded;
- loaded = ARMul_LoadInstrN (state, pc + (isize * 2), isize);
- NORMALCYCLE;
- break;
-
- case PCINCEDSEQ:
- pc += isize; /* Program counter advanced, and an S cycle */
- instr = decoded;
- decoded = loaded;
- loaded = ARMul_LoadInstrS (state, pc + (isize * 2), isize);
- NORMALCYCLE;
- break;
-
- case PCINCEDNONSEQ:
- pc += isize; /* Program counter advanced, and an N cycle */
- instr = decoded;
- decoded = loaded;
- loaded = ARMul_LoadInstrN (state, pc + (isize * 2), isize);
- NORMALCYCLE;
- break;
-
- case RESUME: /* The program counter has been changed */
- pc = state->Reg[15];
-#ifndef MODE32
- pc = pc & R15PCBITS;
-#endif
- state->Reg[15] = pc + (isize * 2);
- state->Aborted = 0;
- instr = ARMul_ReLoadInstr (state, pc, isize);
- decoded = ARMul_ReLoadInstr (state, pc + isize, isize);
- loaded = ARMul_ReLoadInstr (state, pc + isize * 2, isize);
- NORMALCYCLE;
- break;
-
- default: /* The program counter has been changed */
- pc = state->Reg[15];
-#ifndef MODE32
- pc = pc & R15PCBITS;
-#endif
- state->Reg[15] = pc + (isize * 2);
- state->Aborted = 0;
- instr = ARMul_LoadInstrN (state, pc, isize);
- decoded = ARMul_LoadInstrS (state, pc + (isize), isize);
- loaded = ARMul_LoadInstrS (state, pc + (isize * 2), isize);
- NORMALCYCLE;
- break;
- }
- if (state->EventSet)
- ARMul_EnvokeEvent (state);
-
-#if 0
- /* Enable this for a helpful bit of debugging when tracing is needed. */
- fprintf (stderr, "pc: %x, instr: %x\n", pc & ~1, instr);
- if (instr == 0)
- abort ();
-#endif
-
- if (state->Exception)
- { /* Any exceptions */
- if (state->NresetSig == LOW)
- {
- ARMul_Abort (state, ARMul_ResetV);
- break;
- }
- else if (!state->NfiqSig && !FFLAG)
- {
- ARMul_Abort (state, ARMul_FIQV);
- break;
- }
- else if (!state->NirqSig && !IFLAG)
- {
- ARMul_Abort (state, ARMul_IRQV);
- break;
- }
- }
-
- if (state->CallDebug > 0)
- {
- instr = ARMul_Debug (state, pc, instr);
- if (state->Emulate < ONCE)
- {
- state->NextInstr = RESUME;
- break;
- }
- if (state->Debug)
- {
- fprintf (stderr, "sim: At %08lx Instr %08lx Mode %02lx\n", pc, instr,
- state->Mode);
- (void) fgetc (stdin);
- }
- }
- else if (state->Emulate < ONCE)
- {
- state->NextInstr = RESUME;
- break;
- }
-
- state->NumInstrs++;
-
-#ifdef MODET
- /* Provide Thumb instruction decoding. If the processor is in Thumb
- mode, then we can simply decode the Thumb instruction, and map it
- to the corresponding ARM instruction (by directly loading the
- instr variable, and letting the normal ARM simulator
- execute). There are some caveats to ensure that the correct
- pipelined PC value is used when executing Thumb code, and also for
- dealing with the BL instruction. */
- if (TFLAG)
- { /* check if in Thumb mode */
- ARMword new;
- switch (ARMul_ThumbDecode (state, pc, instr, &new))
- {
- case t_undefined:
- ARMul_UndefInstr (state, instr); /* This is a Thumb instruction */
- goto donext;
-
- case t_branch: /* already processed */
- goto donext;
-
- case t_decoded: /* ARM instruction available */
- instr = new; /* so continue instruction decoding */
- break;
- }
- }
-#endif
-
-/***************************************************************************\
-* Check the condition codes *
-\***************************************************************************/
- if ((temp = TOPBITS (28)) == AL)
- goto mainswitch; /* vile deed in the need for speed */
-
- switch ((int) TOPBITS (28))
- { /* check the condition code */
- case AL:
- temp = TRUE;
- break;
- case NV:
- if (state->is_v5)
- {
- if (BITS (25, 27) == 5) /* BLX(1) */
- {
- ARMword dest;
-
- state->Reg[14] = pc + 4;
-
- dest = pc + 8 + 1; /* Force entry into Thumb mode. */
- if (BIT (23))
- dest += (NEGBRANCH + (BIT (24) << 1));
- else
- dest += POSBRANCH + (BIT (24) << 1);
-
- WriteR15Branch (state, dest);
- goto donext;
- }
- else if ((instr & 0xFC70F000) == 0xF450F000)
- /* The PLD instruction. Ignored. */
- goto donext;
- else
- /* UNDEFINED in v5, UNPREDICTABLE in v3, v4, non executed in v1, v2. */
- ARMul_UndefInstr (state, instr);
- }
- temp = FALSE;
- break;
- case EQ:
- temp = ZFLAG;
- break;
- case NE:
- temp = !ZFLAG;
- break;
- case VS:
- temp = VFLAG;
- break;
- case VC:
- temp = !VFLAG;
- break;
- case MI:
- temp = NFLAG;
- break;
- case PL:
- temp = !NFLAG;
- break;
- case CS:
- temp = CFLAG;
- break;
- case CC:
- temp = !CFLAG;
- break;
- case HI:
- temp = (CFLAG && !ZFLAG);
- break;
- case LS:
- temp = (!CFLAG || ZFLAG);
- break;
- case GE:
- temp = ((!NFLAG && !VFLAG) || (NFLAG && VFLAG));
- break;
- case LT:
- temp = ((NFLAG && !VFLAG) || (!NFLAG && VFLAG));
- break;
- case GT:
- temp = ((!NFLAG && !VFLAG && !ZFLAG) || (NFLAG && VFLAG && !ZFLAG));
- break;
- case LE:
- temp = ((NFLAG && !VFLAG) || (!NFLAG && VFLAG)) || ZFLAG;
- break;
- } /* cc check */
-
- /* Handle the Clock counter here. */
- if (state->is_XScale)
- {
- ARMword cp14r0 = state->CPRead[14] (state, 0, 0);
-
- if (cp14r0 && ARMul_CP14_R0_ENABLE)
- {
- unsigned long newcycles, nowtime = ARMul_Time(state);
-
- newcycles = nowtime - state->LastTime;
- state->LastTime = nowtime;
- if (cp14r0 && ARMul_CP14_R0_CCD)
- {
- if (state->CP14R0_CCD == -1)
- state->CP14R0_CCD = newcycles;
- else
- state->CP14R0_CCD += newcycles;
- if (state->CP14R0_CCD >= 64)
- {
- newcycles = 0;
- while (state->CP14R0_CCD >= 64)
- state->CP14R0_CCD -= 64, newcycles++;
- goto check_PMUintr;
- }
- }
- else
- {
- ARMword cp14r1;
- int do_int = 0;
-
- state->CP14R0_CCD = -1;
-check_PMUintr:
- cp14r0 |= ARMul_CP14_R0_FLAG2;
- (void) state->CPWrite[14] (state, 0, cp14r0);
-
- cp14r1 = state->CPRead[14] (state, 1, 0);
-
- /* coded like this for portability */
- while (newcycles)
- {
- if (cp14r1 == 0xffffffff)
- {
- cp14r1 = 0;
- do_int = 1;
- }
- else
- cp14r1++;
- newcycles--;
- }
- (void) state->CPWrite[14] (state, 1, cp14r1);
- if (do_int && (cp14r0 & ARMul_CP14_R0_INTEN2))
- {
- if (state->CPRead[13] (state, 8, 0)
- && ARMul_CP13_R8_PMUS)
- ARMul_Abort (state, ARMul_FIQV);
- else
- ARMul_Abort (state, ARMul_IRQV);
- }
- }
- }
- }
-
- /* Handle hardware instructions breakpoints here. */
- if (state->is_XScale)
- {
- if ((pc | 3) == (read_cp15_reg (14, 0, 8) | 2)
- || (pc | 3) == (read_cp15_reg (14, 0, 9) | 2))
- {
- if (XScale_debug_moe (state, ARMul_CP14_R10_MOE_IB))
- ARMul_OSHandleSWI (state, SWI_Breakpoint);
- }
- }
-
-/***************************************************************************\
-* Actual execution of instructions begins here *
-\***************************************************************************/
-
- if (temp)
- { /* if the condition codes don't match, stop here */
- mainswitch:
-
- if (state->is_XScale)
- {
- if (BIT (20) == 0 && BITS (25, 27) == 0)
- {
- if (BITS (4, 7) == 0xD)
- {
- /* XScale Load Consecutive insn. */
- ARMword temp = GetLS7RHS (state, instr);
- ARMword temp2 = BIT (23) ? LHS + temp : LHS - temp;
- ARMword addr = BIT (24) ? temp2 : LHS;
-
- if (BIT (12))
- ARMul_UndefInstr (state, instr);
- else if (addr & 7)
- /* Alignment violation. */
- ARMul_Abort (state, ARMul_DataAbortV);
- else
- {
- int wb = BIT (21) || (! BIT (24));
-
- state->Reg[BITS (12, 15)] =
- ARMul_LoadWordN (state, addr);
- state->Reg[BITS (12, 15) + 1] =
- ARMul_LoadWordN (state, addr + 4);
- if (wb)
- LSBase = temp2;
- }
-
- goto donext;
- }
- else if (BITS (4, 7) == 0xF)
- {
- /* XScale Store Consecutive insn. */
- ARMword temp = GetLS7RHS (state, instr);
- ARMword temp2 = BIT (23) ? LHS + temp : LHS - temp;
- ARMword addr = BIT (24) ? temp2 : LHS;
-
- if (BIT (12))
- ARMul_UndefInstr (state, instr);
- else if (addr & 7)
- /* Alignment violation. */
- ARMul_Abort (state, ARMul_DataAbortV);
- else
- {
- ARMul_StoreWordN (state, addr,
- state->Reg[BITS (12, 15)]);
- ARMul_StoreWordN (state, addr + 4,
- state->Reg[BITS (12, 15) + 1]);
-
- if (BIT (21)|| ! BIT (24))
- LSBase = temp2;
- }
-
- goto donext;
- }
- }
- }
-
- switch ((int) BITS (20, 27))
- {
-
-/***************************************************************************\
-* Data Processing Register RHS Instructions *
-\***************************************************************************/
-
- case 0x00: /* AND reg and MUL */
-#ifdef MODET
- if (BITS (4, 11) == 0xB)
- {
- /* STRH register offset, no write-back, down, post indexed */
- SHDOWNWB ();
- break;
- }
- if (BITS (4, 7) == 0xD)
- {
- Handle_Load_Double (state, instr);
- break;
- }
- if (BITS (4, 7) == 0xF)
- {
- Handle_Store_Double (state, instr);
- break;
- }
-#endif
- if (BITS (4, 7) == 9)
- { /* MUL */
- rhs = state->Reg[MULRHSReg];
- if (MULLHSReg == MULDESTReg)
- {
- UNDEF_MULDestEQOp1;
- state->Reg[MULDESTReg] = 0;
- }
- else if (MULDESTReg != 15)
- state->Reg[MULDESTReg] = state->Reg[MULLHSReg] * rhs;
- else
- {
- UNDEF_MULPCDest;
- }
- for (dest = 0, temp = 0; dest < 32; dest++)
- if (rhs & (1L << dest))
- temp = dest; /* mult takes this many/2 I cycles */
- ARMul_Icycles (state, ARMul_MultTable[temp], 0L);
- }
- else
- { /* AND reg */
- rhs = DPRegRHS;
- dest = LHS & rhs;
- WRITEDEST (dest);
- }
- break;
-
- case 0x01: /* ANDS reg and MULS */
-#ifdef MODET
- if ((BITS (4, 11) & 0xF9) == 0x9)
- {
- /* LDR register offset, no write-back, down, post indexed */
- LHPOSTDOWN ();
- /* fall through to rest of decoding */
- }
-#endif
- if (BITS (4, 7) == 9)
- { /* MULS */
- rhs = state->Reg[MULRHSReg];
- if (MULLHSReg == MULDESTReg)
- {
- UNDEF_MULDestEQOp1;
- state->Reg[MULDESTReg] = 0;
- CLEARN;
- SETZ;
- }
- else if (MULDESTReg != 15)
- {
- dest = state->Reg[MULLHSReg] * rhs;
- ARMul_NegZero (state, dest);
- state->Reg[MULDESTReg] = dest;
- }
- else
- {
- UNDEF_MULPCDest;
- }
- for (dest = 0, temp = 0; dest < 32; dest++)
- if (rhs & (1L << dest))
- temp = dest; /* mult takes this many/2 I cycles */
- ARMul_Icycles (state, ARMul_MultTable[temp], 0L);
- }
- else
- { /* ANDS reg */
- rhs = DPSRegRHS;
- dest = LHS & rhs;
- WRITESDEST (dest);
- }
- break;
-
- case 0x02: /* EOR reg and MLA */
-#ifdef MODET
- if (BITS (4, 11) == 0xB)
- {
- /* STRH register offset, write-back, down, post indexed */
- SHDOWNWB ();
- break;
- }
-#endif
- if (BITS (4, 7) == 9)
- { /* MLA */
- rhs = state->Reg[MULRHSReg];
- if (MULLHSReg == MULDESTReg)
- {
- UNDEF_MULDestEQOp1;
- state->Reg[MULDESTReg] = state->Reg[MULACCReg];
- }
- else if (MULDESTReg != 15)
- state->Reg[MULDESTReg] =
- state->Reg[MULLHSReg] * rhs + state->Reg[MULACCReg];
- else
- {
- UNDEF_MULPCDest;
- }
- for (dest = 0, temp = 0; dest < 32; dest++)
- if (rhs & (1L << dest))
- temp = dest; /* mult takes this many/2 I cycles */
- ARMul_Icycles (state, ARMul_MultTable[temp], 0L);
- }
- else
- {
- rhs = DPRegRHS;
- dest = LHS ^ rhs;
- WRITEDEST (dest);
- }
- break;
-
- case 0x03: /* EORS reg and MLAS */
-#ifdef MODET
- if ((BITS (4, 11) & 0xF9) == 0x9)
- {
- /* LDR register offset, write-back, down, post-indexed */
- LHPOSTDOWN ();
- /* fall through to rest of the decoding */
- }
-#endif
- if (BITS (4, 7) == 9)
- { /* MLAS */
- rhs = state->Reg[MULRHSReg];
- if (MULLHSReg == MULDESTReg)
- {
- UNDEF_MULDestEQOp1;
- dest = state->Reg[MULACCReg];
- ARMul_NegZero (state, dest);
- state->Reg[MULDESTReg] = dest;
- }
- else if (MULDESTReg != 15)
- {
- dest =
- state->Reg[MULLHSReg] * rhs + state->Reg[MULACCReg];
- ARMul_NegZero (state, dest);
- state->Reg[MULDESTReg] = dest;
- }
- else
- {
- UNDEF_MULPCDest;
- }
- for (dest = 0, temp = 0; dest < 32; dest++)
- if (rhs & (1L << dest))
- temp = dest; /* mult takes this many/2 I cycles */
- ARMul_Icycles (state, ARMul_MultTable[temp], 0L);
- }
- else
- { /* EORS Reg */
- rhs = DPSRegRHS;
- dest = LHS ^ rhs;
- WRITESDEST (dest);
- }
- break;
-
- case 0x04: /* SUB reg */
-#ifdef MODET
- if (BITS (4, 7) == 0xB)
- {
- /* STRH immediate offset, no write-back, down, post indexed */
- SHDOWNWB ();
- break;
- }
- if (BITS (4, 7) == 0xD)
- {
- Handle_Load_Double (state, instr);
- break;
- }
- if (BITS (4, 7) == 0xF)
- {
- Handle_Store_Double (state, instr);
- break;
- }
-#endif
- rhs = DPRegRHS;
- dest = LHS - rhs;
- WRITEDEST (dest);
- break;
-
- case 0x05: /* SUBS reg */
-#ifdef MODET
- if ((BITS (4, 7) & 0x9) == 0x9)
- {
- /* LDR immediate offset, no write-back, down, post indexed */
- LHPOSTDOWN ();
- /* fall through to the rest of the instruction decoding */
- }
-#endif
- lhs = LHS;
- rhs = DPRegRHS;
- dest = lhs - rhs;
- if ((lhs >= rhs) || ((rhs | lhs) >> 31))
- {
- ARMul_SubCarry (state, lhs, rhs, dest);
- ARMul_SubOverflow (state, lhs, rhs, dest);
- }
- else
- {
- CLEARC;
- CLEARV;
- }
- WRITESDEST (dest);
- break;
-
- case 0x06: /* RSB reg */
-#ifdef MODET
- if (BITS (4, 7) == 0xB)
- {
- /* STRH immediate offset, write-back, down, post indexed */
- SHDOWNWB ();
- break;
- }
-#endif
- rhs = DPRegRHS;
- dest = rhs - LHS;
- WRITEDEST (dest);
- break;
-
- case 0x07: /* RSBS reg */
-#ifdef MODET
- if ((BITS (4, 7) & 0x9) == 0x9)
- {
- /* LDR immediate offset, write-back, down, post indexed */
- LHPOSTDOWN ();
- /* fall through to remainder of instruction decoding */
- }
-#endif
- lhs = LHS;
- rhs = DPRegRHS;
- dest = rhs - lhs;
- if ((rhs >= lhs) || ((rhs | lhs) >> 31))
- {
- ARMul_SubCarry (state, rhs, lhs, dest);
- ARMul_SubOverflow (state, rhs, lhs, dest);
- }
- else
- {
- CLEARC;
- CLEARV;
- }
- WRITESDEST (dest);
- break;
-
- case 0x08: /* ADD reg */
-#ifdef MODET
- if (BITS (4, 11) == 0xB)
- {
- /* STRH register offset, no write-back, up, post indexed */
- SHUPWB ();
- break;
- }
- if (BITS (4, 7) == 0xD)
- {
- Handle_Load_Double (state, instr);
- break;
- }
- if (BITS (4, 7) == 0xF)
- {
- Handle_Store_Double (state, instr);
- break;
- }
-#endif
-#ifdef MODET
- if (BITS (4, 7) == 0x9)
- { /* MULL */
- /* 32x32 = 64 */
- ARMul_Icycles (state,
- Multiply64 (state, instr, LUNSIGNED,
- LDEFAULT), 0L);
- break;
- }
-#endif
- rhs = DPRegRHS;
- dest = LHS + rhs;
- WRITEDEST (dest);
- break;
-
- case 0x09: /* ADDS reg */
-#ifdef MODET
- if ((BITS (4, 11) & 0xF9) == 0x9)
- {
- /* LDR register offset, no write-back, up, post indexed */
- LHPOSTUP ();
- /* fall through to remaining instruction decoding */
- }
-#endif
-#ifdef MODET
- if (BITS (4, 7) == 0x9)
- { /* MULL */
- /* 32x32=64 */
- ARMul_Icycles (state,
- Multiply64 (state, instr, LUNSIGNED, LSCC),
- 0L);
- break;
- }
-#endif
- lhs = LHS;
- rhs = DPRegRHS;
- dest = lhs + rhs;
- ASSIGNZ (dest == 0);
- if ((lhs | rhs) >> 30)
- { /* possible C,V,N to set */
- ASSIGNN (NEG (dest));
- ARMul_AddCarry (state, lhs, rhs, dest);
- ARMul_AddOverflow (state, lhs, rhs, dest);
- }
- else
- {
- CLEARN;
- CLEARC;
- CLEARV;
- }
- WRITESDEST (dest);
- break;
-
- case 0x0a: /* ADC reg */
-#ifdef MODET
- if (BITS (4, 11) == 0xB)
- {
- /* STRH register offset, write-back, up, post-indexed */
- SHUPWB ();
- break;
- }
-#endif
-#ifdef MODET
- if (BITS (4, 7) == 0x9)
- { /* MULL */
- /* 32x32=64 */
- ARMul_Icycles (state,
- MultiplyAdd64 (state, instr, LUNSIGNED,
- LDEFAULT), 0L);
- break;
- }
-#endif
- rhs = DPRegRHS;
- dest = LHS + rhs + CFLAG;
- WRITEDEST (dest);
- break;
-
- case 0x0b: /* ADCS reg */
-#ifdef MODET
- if ((BITS (4, 11) & 0xF9) == 0x9)
- {
- /* LDR register offset, write-back, up, post indexed */
- LHPOSTUP ();
- /* fall through to remaining instruction decoding */
- }
-#endif
-#ifdef MODET
- if (BITS (4, 7) == 0x9)
- { /* MULL */
- /* 32x32=64 */
- ARMul_Icycles (state,
- MultiplyAdd64 (state, instr, LUNSIGNED,
- LSCC), 0L);
- break;
- }
-#endif
- lhs = LHS;
- rhs = DPRegRHS;
- dest = lhs + rhs + CFLAG;
- ASSIGNZ (dest == 0);
- if ((lhs | rhs) >> 30)
- { /* possible C,V,N to set */
- ASSIGNN (NEG (dest));
- ARMul_AddCarry (state, lhs, rhs, dest);
- ARMul_AddOverflow (state, lhs, rhs, dest);
- }
- else
- {
- CLEARN;
- CLEARC;
- CLEARV;
- }
- WRITESDEST (dest);
- break;
-
- case 0x0c: /* SBC reg */
-#ifdef MODET
- if (BITS (4, 7) == 0xB)
- {
- /* STRH immediate offset, no write-back, up post indexed */
- SHUPWB ();
- break;
- }
- if (BITS (4, 7) == 0xD)
- {
- Handle_Load_Double (state, instr);
- break;
- }
- if (BITS (4, 7) == 0xF)
- {
- Handle_Store_Double (state, instr);
- break;
- }
-#endif
-#ifdef MODET
- if (BITS (4, 7) == 0x9)
- { /* MULL */
- /* 32x32=64 */
- ARMul_Icycles (state,
- Multiply64 (state, instr, LSIGNED, LDEFAULT),
- 0L);
- break;
- }
-#endif
- rhs = DPRegRHS;
- dest = LHS - rhs - !CFLAG;
- WRITEDEST (dest);
- break;
-
- case 0x0d: /* SBCS reg */
-#ifdef MODET
- if ((BITS (4, 7) & 0x9) == 0x9)
- {
- /* LDR immediate offset, no write-back, up, post indexed */
- LHPOSTUP ();
- }
-#endif
-#ifdef MODET
- if (BITS (4, 7) == 0x9)
- { /* MULL */
- /* 32x32=64 */
- ARMul_Icycles (state,
- Multiply64 (state, instr, LSIGNED, LSCC),
- 0L);
- break;
- }
-#endif
- lhs = LHS;
- rhs = DPRegRHS;
- dest = lhs - rhs - !CFLAG;
- if ((lhs >= rhs) || ((rhs | lhs) >> 31))
- {
- ARMul_SubCarry (state, lhs, rhs, dest);
- ARMul_SubOverflow (state, lhs, rhs, dest);
- }
- else
- {
- CLEARC;
- CLEARV;
- }
- WRITESDEST (dest);
- break;
-
- case 0x0e: /* RSC reg */
-#ifdef MODET
- if (BITS (4, 7) == 0xB)
- {
- /* STRH immediate offset, write-back, up, post indexed */
- SHUPWB ();
- break;
- }
-#endif
-#ifdef MODET
- if (BITS (4, 7) == 0x9)
- { /* MULL */
- /* 32x32=64 */
- ARMul_Icycles (state,
- MultiplyAdd64 (state, instr, LSIGNED,
- LDEFAULT), 0L);
- break;
- }
-#endif
- rhs = DPRegRHS;
- dest = rhs - LHS - !CFLAG;
- WRITEDEST (dest);
- break;
-
- case 0x0f: /* RSCS reg */
-#ifdef MODET
- if ((BITS (4, 7) & 0x9) == 0x9)
- {
- /* LDR immediate offset, write-back, up, post indexed */
- LHPOSTUP ();
- /* fall through to remaining instruction decoding */
- }
-#endif
-#ifdef MODET
- if (BITS (4, 7) == 0x9)
- { /* MULL */
- /* 32x32=64 */
- ARMul_Icycles (state,
- MultiplyAdd64 (state, instr, LSIGNED, LSCC),
- 0L);
- break;
- }
-#endif
- lhs = LHS;
- rhs = DPRegRHS;
- dest = rhs - lhs - !CFLAG;
- if ((rhs >= lhs) || ((rhs | lhs) >> 31))
- {
- ARMul_SubCarry (state, rhs, lhs, dest);
- ARMul_SubOverflow (state, rhs, lhs, dest);
- }
- else
- {
- CLEARC;
- CLEARV;
- }
- WRITESDEST (dest);
- break;
-
- case 0x10: /* TST reg and MRS CPSR and SWP word */
- if (state->is_v5e)
- {
- if (BIT (4) == 0 && BIT (7) == 1)
- {
- /* ElSegundo SMLAxy insn. */
- ARMword op1 = state->Reg[BITS (0, 3)];
- ARMword op2 = state->Reg[BITS (8, 11)];
- ARMword Rn = state->Reg[BITS (12, 15)];
-
- if (BIT (5))
- op1 >>= 16;
- if (BIT (6))
- op2 >>= 16;
- op1 &= 0xFFFF;
- op2 &= 0xFFFF;
- if (op1 & 0x8000)
- op1 -= 65536;
- if (op2 & 0x8000)
- op2 -= 65536;
- op1 *= op2;
-
- if (AddOverflow (op1, Rn, op1 + Rn))
- SETS;
- state->Reg[BITS (16, 19)] = op1 + Rn;
- break;
- }
-
- if (BITS (4, 11) == 5)
- {
- /* ElSegundo QADD insn. */
- ARMword op1 = state->Reg[BITS (0, 3)];
- ARMword op2 = state->Reg[BITS (16, 19)];
- ARMword result = op1 + op2;
- if (AddOverflow (op1, op2, result))
- {
- result = POS (result) ? 0x80000000 : 0x7fffffff;
- SETS;
- }
- state->Reg[BITS (12, 15)] = result;
- break;
- }
- }
-#ifdef MODET
- if (BITS (4, 11) == 0xB)
- {
- /* STRH register offset, no write-back, down, pre indexed */
- SHPREDOWN ();
- break;
- }
- if (BITS (4, 7) == 0xD)
- {
- Handle_Load_Double (state, instr);
- break;
- }
- if (BITS (4, 7) == 0xF)
- {
- Handle_Store_Double (state, instr);
- break;
- }
-#endif
- if (BITS (4, 11) == 9)
- { /* SWP */
- UNDEF_SWPPC;
- temp = LHS;
- BUSUSEDINCPCS;
-#ifndef MODE32
- if (VECTORACCESS (temp) || ADDREXCEPT (temp))
- {
- INTERNALABORT (temp);
- (void) ARMul_LoadWordN (state, temp);
- (void) ARMul_LoadWordN (state, temp);
- }
- else
-#endif
- dest = ARMul_SwapWord (state, temp, state->Reg[RHSReg]);
- if (temp & 3)
- DEST = ARMul_Align (state, temp, dest);
- else
- DEST = dest;
- if (state->abortSig || state->Aborted)
- {
- TAKEABORT;
- }
- }
- else if ((BITS (0, 11) == 0) && (LHSReg == 15))
- { /* MRS CPSR */
- UNDEF_MRSPC;
- DEST = ECC | EINT | EMODE;
- }
- else
- {
- UNDEF_Test;
- }
- break;
-
- case 0x11: /* TSTP reg */
-#ifdef MODET
- if ((BITS (4, 11) & 0xF9) == 0x9)
- {
- /* LDR register offset, no write-back, down, pre indexed */
- LHPREDOWN ();
- /* continue with remaining instruction decode */
- }
-#endif
- if (DESTReg == 15)
- { /* TSTP reg */
-#ifdef MODE32
- state->Cpsr = GETSPSR (state->Bank);
- ARMul_CPSRAltered (state);
-#else
- rhs = DPRegRHS;
- temp = LHS & rhs;
- SETR15PSR (temp);
-#endif
- }
- else
- { /* TST reg */
- rhs = DPSRegRHS;
- dest = LHS & rhs;
- ARMul_NegZero (state, dest);
- }
- break;
-
- case 0x12: /* TEQ reg and MSR reg to CPSR (ARM6) */
- if (state->is_v5)
- {
- if (BITS (4, 7) == 3)
- {
- /* BLX(2) */
- ARMword temp;
-
- if (TFLAG)
- temp = (pc + 2) | 1;
- else
- temp = pc + 4;
-
- WriteR15Branch (state, state->Reg[RHSReg]);
- state->Reg[14] = temp;
- break;
- }
- }
-
- if (state->is_v5e)
- {
- if (BIT (4) == 0 && BIT (7) == 1
- && (BIT (5) == 0 || BITS (12, 15) == 0))
- {
- /* ElSegundo SMLAWy/SMULWy insn. */
- unsigned long long op1 = state->Reg[BITS (0, 3)];
- unsigned long long op2 = state->Reg[BITS (8, 11)];
- unsigned long long result;
-
- if (BIT (6))
- op2 >>= 16;
- if (op1 & 0x80000000)
- op1 -= 1ULL << 32;
- op2 &= 0xFFFF;
- if (op2 & 0x8000)
- op2 -= 65536;
- result = (op1 * op2) >> 16;
-
- if (BIT (5) == 0)
- {
- ARMword Rn = state->Reg[BITS (12, 15)];
-
- if (AddOverflow (result, Rn, result + Rn))
- SETS;
- result += Rn;
- }
- state->Reg[BITS (16, 19)] = result;
- break;
- }
-
- if (BITS (4, 11) == 5)
- {
- /* ElSegundo QSUB insn. */
- ARMword op1 = state->Reg[BITS (0, 3)];
- ARMword op2 = state->Reg[BITS (16, 19)];
- ARMword result = op1 - op2;
-
- if (SubOverflow (op1, op2, result))
- {
- result = POS (result) ? 0x80000000 : 0x7fffffff;
- SETS;
- }
-
- state->Reg[BITS (12, 15)] = result;
- break;
- }
- }
-#ifdef MODET
- if (BITS (4, 11) == 0xB)
- {
- /* STRH register offset, write-back, down, pre indexed */
- SHPREDOWNWB ();
- break;
- }
- if (BITS (4, 27) == 0x12FFF1)
- {
- /* BX */
- WriteR15Branch (state, state->Reg[RHSReg]);
- break;
- }
- if (BITS (4, 7) == 0xD)
- {
- Handle_Load_Double (state, instr);
- break;
- }
- if (BITS (4, 7) == 0xF)
- {
- Handle_Store_Double (state, instr);
- break;
- }
-#endif
- if (state->is_v5)
- {
- if (BITS (4, 7) == 0x7)
- {
- ARMword value;
- extern int SWI_vector_installed;
-
- /* Hardware is allowed to optionally override this
- instruction and treat it as a breakpoint. Since
- this is a simulator not hardware, we take the position
- that if a SWI vector was not installed, then an Abort
- vector was probably not installed either, and so
- normally this instruction would be ignored, even if an
- Abort is generated. This is a bad thing, since GDB
- uses this instruction for its breakpoints (at least in
- Thumb mode it does). So intercept the instruction here
- and generate a breakpoint SWI instead. */
- if (! SWI_vector_installed)
- ARMul_OSHandleSWI (state, SWI_Breakpoint);
- else
- {
- /* BKPT - normally this will cause an abort, but on the
- XScale we must check the DCSR. */
- XScale_set_fsr_far (state, ARMul_CP15_R5_MMU_EXCPT, pc);
- if (!XScale_debug_moe (state, ARMul_CP14_R10_MOE_BT))
- break;
- }
-
- /* Force the next instruction to be refetched. */
- state->NextInstr = RESUME;
- break;
- }
- }
- if (DESTReg == 15)
- {
- /* MSR reg to CPSR */
- UNDEF_MSRPC;
- temp = DPRegRHS;
-#ifdef MODET
- /* Don't allow TBIT to be set by MSR. */
- temp &= ~ TBIT;
-#endif
- ARMul_FixCPSR (state, instr, temp);
- }
- else
- {
- UNDEF_Test;
- }
- break;
-
- case 0x13: /* TEQP reg */
-#ifdef MODET
- if ((BITS (4, 11) & 0xF9) == 0x9)
- {
- /* LDR register offset, write-back, down, pre indexed */
- LHPREDOWNWB ();
- /* continue with remaining instruction decode */
- }
-#endif
- if (DESTReg == 15)
- { /* TEQP reg */
-#ifdef MODE32
- state->Cpsr = GETSPSR (state->Bank);
- ARMul_CPSRAltered (state);
-#else
- rhs = DPRegRHS;
- temp = LHS ^ rhs;
- SETR15PSR (temp);
-#endif
- }
- else
- { /* TEQ Reg */
- rhs = DPSRegRHS;
- dest = LHS ^ rhs;
- ARMul_NegZero (state, dest);
- }
- break;
-
- case 0x14: /* CMP reg and MRS SPSR and SWP byte */
- if (state->is_v5e)
- {
- if (BIT (4) == 0 && BIT (7) == 1)
- {
- /* ElSegundo SMLALxy insn. */
- unsigned long long op1 = state->Reg[BITS (0, 3)];
- unsigned long long op2 = state->Reg[BITS (8, 11)];
- unsigned long long dest;
- unsigned long long result;
-
- if (BIT (5))
- op1 >>= 16;
- if (BIT (6))
- op2 >>= 16;
- op1 &= 0xFFFF;
- if (op1 & 0x8000)
- op1 -= 65536;
- op2 &= 0xFFFF;
- if (op2 & 0x8000)
- op2 -= 65536;
-
- dest = (unsigned long long) state->Reg[BITS (16, 19)] << 32;
- dest |= state->Reg[BITS (12, 15)];
- dest += op1 * op2;
- state->Reg[BITS (12, 15)] = dest;
- state->Reg[BITS (16, 19)] = dest >> 32;
- break;
- }
-
- if (BITS (4, 11) == 5)
- {
- /* ElSegundo QDADD insn. */
- ARMword op1 = state->Reg[BITS (0, 3)];
- ARMword op2 = state->Reg[BITS (16, 19)];
- ARMword op2d = op2 + op2;
- ARMword result;
-
- if (AddOverflow (op2, op2, op2d))
- {
- SETS;
- op2d = POS (op2d) ? 0x80000000 : 0x7fffffff;
- }
-
- result = op1 + op2d;
- if (AddOverflow (op1, op2d, result))
- {
- SETS;
- result = POS (result) ? 0x80000000 : 0x7fffffff;
- }
-
- state->Reg[BITS (12, 15)] = result;
- break;
- }
- }
-#ifdef MODET
- if (BITS (4, 7) == 0xB)
- {
- /* STRH immediate offset, no write-back, down, pre indexed */
- SHPREDOWN ();
- break;
- }
- if (BITS (4, 7) == 0xD)
- {
- Handle_Load_Double (state, instr);
- break;
- }
- if (BITS (4, 7) == 0xF)
- {
- Handle_Store_Double (state, instr);
- break;
- }
-#endif
- if (BITS (4, 11) == 9)
- { /* SWP */
- UNDEF_SWPPC;
- temp = LHS;
- BUSUSEDINCPCS;
-#ifndef MODE32
- if (VECTORACCESS (temp) || ADDREXCEPT (temp))
- {
- INTERNALABORT (temp);
- (void) ARMul_LoadByte (state, temp);
- (void) ARMul_LoadByte (state, temp);
- }
- else
-#endif
- DEST = ARMul_SwapByte (state, temp, state->Reg[RHSReg]);
- if (state->abortSig || state->Aborted)
- {
- TAKEABORT;
- }
- }
- else if ((BITS (0, 11) == 0) && (LHSReg == 15))
- { /* MRS SPSR */
- UNDEF_MRSPC;
- DEST = GETSPSR (state->Bank);
- }
- else
- {
- UNDEF_Test;
- }
- break;
-
- case 0x15: /* CMPP reg */
-#ifdef MODET
- if ((BITS (4, 7) & 0x9) == 0x9)
- {
- /* LDR immediate offset, no write-back, down, pre indexed */
- LHPREDOWN ();
- /* continue with remaining instruction decode */
- }
-#endif
- if (DESTReg == 15)
- { /* CMPP reg */
-#ifdef MODE32
- state->Cpsr = GETSPSR (state->Bank);
- ARMul_CPSRAltered (state);
-#else
- rhs = DPRegRHS;
- temp = LHS - rhs;
- SETR15PSR (temp);
-#endif
- }
- else
- { /* CMP reg */
- lhs = LHS;
- rhs = DPRegRHS;
- dest = lhs - rhs;
- ARMul_NegZero (state, dest);
- if ((lhs >= rhs) || ((rhs | lhs) >> 31))
- {
- ARMul_SubCarry (state, lhs, rhs, dest);
- ARMul_SubOverflow (state, lhs, rhs, dest);
- }
- else
- {
- CLEARC;
- CLEARV;
- }
- }
- break;
-
- case 0x16: /* CMN reg and MSR reg to SPSR */
- if (state->is_v5e)
- {
- if (BIT (4) == 0 && BIT (7) == 1 && BITS (12, 15) == 0)
- {
- /* ElSegundo SMULxy insn. */
- ARMword op1 = state->Reg[BITS (0, 3)];
- ARMword op2 = state->Reg[BITS (8, 11)];
- ARMword Rn = state->Reg[BITS (12, 15)];
-
- if (BIT (5))
- op1 >>= 16;
- if (BIT (6))
- op2 >>= 16;
- op1 &= 0xFFFF;
- op2 &= 0xFFFF;
- if (op1 & 0x8000)
- op1 -= 65536;
- if (op2 & 0x8000)
- op2 -= 65536;
-
- state->Reg[BITS (16, 19)] = op1 * op2;
- break;
- }
-
- if (BITS (4, 11) == 5)
- {
- /* ElSegundo QDSUB insn. */
- ARMword op1 = state->Reg[BITS (0, 3)];
- ARMword op2 = state->Reg[BITS (16, 19)];
- ARMword op2d = op2 + op2;
- ARMword result;
-
- if (AddOverflow (op2, op2, op2d))
- {
- SETS;
- op2d = POS (op2d) ? 0x80000000 : 0x7fffffff;
- }
-
- result = op1 - op2d;
- if (SubOverflow (op1, op2d, result))
- {
- SETS;
- result = POS (result) ? 0x80000000 : 0x7fffffff;
- }
-
- state->Reg[BITS (12, 15)] = result;
- break;
- }
- }
-
- if (state->is_v5)
- {
- if (BITS (4, 11) == 0xF1 && BITS (16, 19) == 0xF)
- {
- /* ARM5 CLZ insn. */
- ARMword op1 = state->Reg[BITS (0, 3)];
- int result = 32;
-
- if (op1)
- for (result = 0; (op1 & 0x80000000) == 0; op1 <<= 1)
- result++;
-
- state->Reg[BITS (12, 15)] = result;
- break;
- }
- }
-#ifdef MODET
- if (BITS (4, 7) == 0xB)
- {
- /* STRH immediate offset, write-back, down, pre indexed */
- SHPREDOWNWB ();
- break;
- }
- if (BITS (4, 7) == 0xD)
- {
- Handle_Load_Double (state, instr);
- break;
- }
- if (BITS (4, 7) == 0xF)
- {
- Handle_Store_Double (state, instr);
- break;
- }
-#endif
- if (DESTReg == 15)
- { /* MSR */
- UNDEF_MSRPC;
- ARMul_FixSPSR (state, instr, DPRegRHS);
- }
- else
- {
- UNDEF_Test;
- }
- break;
-
- case 0x17: /* CMNP reg */
-#ifdef MODET
- if ((BITS (4, 7) & 0x9) == 0x9)
- {
- /* LDR immediate offset, write-back, down, pre indexed */
- LHPREDOWNWB ();
- /* continue with remaining instruction decoding */
- }
-#endif
- if (DESTReg == 15)
- {
-#ifdef MODE32
- state->Cpsr = GETSPSR (state->Bank);
- ARMul_CPSRAltered (state);
-#else
- rhs = DPRegRHS;
- temp = LHS + rhs;
- SETR15PSR (temp);
-#endif
- break;
- }
- else
- { /* CMN reg */
- lhs = LHS;
- rhs = DPRegRHS;
- dest = lhs + rhs;
- ASSIGNZ (dest == 0);
- if ((lhs | rhs) >> 30)
- { /* possible C,V,N to set */
- ASSIGNN (NEG (dest));
- ARMul_AddCarry (state, lhs, rhs, dest);
- ARMul_AddOverflow (state, lhs, rhs, dest);
- }
- else
- {
- CLEARN;
- CLEARC;
- CLEARV;
- }
- }
- break;
-
- case 0x18: /* ORR reg */
-#ifdef MODET
- if (BITS (4, 11) == 0xB)
- {
- /* STRH register offset, no write-back, up, pre indexed */
- SHPREUP ();
- break;
- }
- if (BITS (4, 7) == 0xD)
- {
- Handle_Load_Double (state, instr);
- break;
- }
- if (BITS (4, 7) == 0xF)
- {
- Handle_Store_Double (state, instr);
- break;
- }
-#endif
- rhs = DPRegRHS;
- dest = LHS | rhs;
- WRITEDEST (dest);
- break;
-
- case 0x19: /* ORRS reg */
-#ifdef MODET
- if ((BITS (4, 11) & 0xF9) == 0x9)
- {
- /* LDR register offset, no write-back, up, pre indexed */
- LHPREUP ();
- /* continue with remaining instruction decoding */
- }
-#endif
- rhs = DPSRegRHS;
- dest = LHS | rhs;
- WRITESDEST (dest);
- break;
-
- case 0x1a: /* MOV reg */
-#ifdef MODET
- if (BITS (4, 11) == 0xB)
- {
- /* STRH register offset, write-back, up, pre indexed */
- SHPREUPWB ();
- break;
- }
- if (BITS (4, 7) == 0xD)
- {
- Handle_Load_Double (state, instr);
- break;
- }
- if (BITS (4, 7) == 0xF)
- {
- Handle_Store_Double (state, instr);
- break;
- }
-#endif
- dest = DPRegRHS;
- WRITEDEST (dest);
- break;
-
- case 0x1b: /* MOVS reg */
-#ifdef MODET
- if ((BITS (4, 11) & 0xF9) == 0x9)
- {
- /* LDR register offset, write-back, up, pre indexed */
- LHPREUPWB ();
- /* continue with remaining instruction decoding */
- }
-#endif
- dest = DPSRegRHS;
- WRITESDEST (dest);
- break;
-
- case 0x1c: /* BIC reg */
-#ifdef MODET
- if (BITS (4, 7) == 0xB)
- {
- /* STRH immediate offset, no write-back, up, pre indexed */
- SHPREUP ();
- break;
- }
- if (BITS (4, 7) == 0xD)
- {
- Handle_Load_Double (state, instr);
- break;
- }
- else if (BITS (4, 7) == 0xF)
- {
- Handle_Store_Double (state, instr);
- break;
- }
-#endif
- rhs = DPRegRHS;
- dest = LHS & ~rhs;
- WRITEDEST (dest);
- break;
-
- case 0x1d: /* BICS reg */
-#ifdef MODET
- if ((BITS (4, 7) & 0x9) == 0x9)
- {
- /* LDR immediate offset, no write-back, up, pre indexed */
- LHPREUP ();
- /* continue with instruction decoding */
- }
-#endif
- rhs = DPSRegRHS;
- dest = LHS & ~rhs;
- WRITESDEST (dest);
- break;
-
- case 0x1e: /* MVN reg */
-#ifdef MODET
- if (BITS (4, 7) == 0xB)
- {
- /* STRH immediate offset, write-back, up, pre indexed */
- SHPREUPWB ();
- break;
- }
- if (BITS (4, 7) == 0xD)
- {
- Handle_Load_Double (state, instr);
- break;
- }
- if (BITS (4, 7) == 0xF)
- {
- Handle_Store_Double (state, instr);
- break;
- }
-#endif
- dest = ~DPRegRHS;
- WRITEDEST (dest);
- break;
-
- case 0x1f: /* MVNS reg */
-#ifdef MODET
- if ((BITS (4, 7) & 0x9) == 0x9)
- {
- /* LDR immediate offset, write-back, up, pre indexed */
- LHPREUPWB ();
- /* continue instruction decoding */
- }
-#endif
- dest = ~DPSRegRHS;
- WRITESDEST (dest);
- break;
-
-/***************************************************************************\
-* Data Processing Immediate RHS Instructions *
-\***************************************************************************/
-
- case 0x20: /* AND immed */
- dest = LHS & DPImmRHS;
- WRITEDEST (dest);
- break;
-
- case 0x21: /* ANDS immed */
- DPSImmRHS;
- dest = LHS & rhs;
- WRITESDEST (dest);
- break;
-
- case 0x22: /* EOR immed */
- dest = LHS ^ DPImmRHS;
- WRITEDEST (dest);
- break;
-
- case 0x23: /* EORS immed */
- DPSImmRHS;
- dest = LHS ^ rhs;
- WRITESDEST (dest);
- break;
-
- case 0x24: /* SUB immed */
- dest = LHS - DPImmRHS;
- WRITEDEST (dest);
- break;
-
- case 0x25: /* SUBS immed */
- lhs = LHS;
- rhs = DPImmRHS;
- dest = lhs - rhs;
- if ((lhs >= rhs) || ((rhs | lhs) >> 31))
- {
- ARMul_SubCarry (state, lhs, rhs, dest);
- ARMul_SubOverflow (state, lhs, rhs, dest);
- }
- else
- {
- CLEARC;
- CLEARV;
- }
- WRITESDEST (dest);
- break;
-
- case 0x26: /* RSB immed */
- dest = DPImmRHS - LHS;
- WRITEDEST (dest);
- break;
-
- case 0x27: /* RSBS immed */
- lhs = LHS;
- rhs = DPImmRHS;
- dest = rhs - lhs;
- if ((rhs >= lhs) || ((rhs | lhs) >> 31))
- {
- ARMul_SubCarry (state, rhs, lhs, dest);
- ARMul_SubOverflow (state, rhs, lhs, dest);
- }
- else
- {
- CLEARC;
- CLEARV;
- }
- WRITESDEST (dest);
- break;
-
- case 0x28: /* ADD immed */
- dest = LHS + DPImmRHS;
- WRITEDEST (dest);
- break;
-
- case 0x29: /* ADDS immed */
- lhs = LHS;
- rhs = DPImmRHS;
- dest = lhs + rhs;
- ASSIGNZ (dest == 0);
- if ((lhs | rhs) >> 30)
- { /* possible C,V,N to set */
- ASSIGNN (NEG (dest));
- ARMul_AddCarry (state, lhs, rhs, dest);
- ARMul_AddOverflow (state, lhs, rhs, dest);
- }
- else
- {
- CLEARN;
- CLEARC;
- CLEARV;
- }
- WRITESDEST (dest);
- break;
-
- case 0x2a: /* ADC immed */
- dest = LHS + DPImmRHS + CFLAG;
- WRITEDEST (dest);
- break;
-
- case 0x2b: /* ADCS immed */
- lhs = LHS;
- rhs = DPImmRHS;
- dest = lhs + rhs + CFLAG;
- ASSIGNZ (dest == 0);
- if ((lhs | rhs) >> 30)
- { /* possible C,V,N to set */
- ASSIGNN (NEG (dest));
- ARMul_AddCarry (state, lhs, rhs, dest);
- ARMul_AddOverflow (state, lhs, rhs, dest);
- }
- else
- {
- CLEARN;
- CLEARC;
- CLEARV;
- }
- WRITESDEST (dest);
- break;
-
- case 0x2c: /* SBC immed */
- dest = LHS - DPImmRHS - !CFLAG;
- WRITEDEST (dest);
- break;
-
- case 0x2d: /* SBCS immed */
- lhs = LHS;
- rhs = DPImmRHS;
- dest = lhs - rhs - !CFLAG;
- if ((lhs >= rhs) || ((rhs | lhs) >> 31))
- {
- ARMul_SubCarry (state, lhs, rhs, dest);
- ARMul_SubOverflow (state, lhs, rhs, dest);
- }
- else
- {
- CLEARC;
- CLEARV;
- }
- WRITESDEST (dest);
- break;
-
- case 0x2e: /* RSC immed */
- dest = DPImmRHS - LHS - !CFLAG;
- WRITEDEST (dest);
- break;
-
- case 0x2f: /* RSCS immed */
- lhs = LHS;
- rhs = DPImmRHS;
- dest = rhs - lhs - !CFLAG;
- if ((rhs >= lhs) || ((rhs | lhs) >> 31))
- {
- ARMul_SubCarry (state, rhs, lhs, dest);
- ARMul_SubOverflow (state, rhs, lhs, dest);
- }
- else
- {
- CLEARC;
- CLEARV;
- }
- WRITESDEST (dest);
- break;
-
- case 0x30: /* TST immed */
- UNDEF_Test;
- break;
-
- case 0x31: /* TSTP immed */
- if (DESTReg == 15)
- { /* TSTP immed */
-#ifdef MODE32
- state->Cpsr = GETSPSR (state->Bank);
- ARMul_CPSRAltered (state);
-#else
- temp = LHS & DPImmRHS;
- SETR15PSR (temp);
-#endif
- }
- else
- {
- DPSImmRHS; /* TST immed */
- dest = LHS & rhs;
- ARMul_NegZero (state, dest);
- }
- break;
-
- case 0x32: /* TEQ immed and MSR immed to CPSR */
- if (DESTReg == 15)
- { /* MSR immed to CPSR */
- ARMul_FixCPSR (state, instr, DPImmRHS);
- }
- else
- {
- UNDEF_Test;
- }
- break;
-
- case 0x33: /* TEQP immed */
- if (DESTReg == 15)
- { /* TEQP immed */
-#ifdef MODE32
- state->Cpsr = GETSPSR (state->Bank);
- ARMul_CPSRAltered (state);
-#else
- temp = LHS ^ DPImmRHS;
- SETR15PSR (temp);
-#endif
- }
- else
- {
- DPSImmRHS; /* TEQ immed */
- dest = LHS ^ rhs;
- ARMul_NegZero (state, dest);
- }
- break;
-
- case 0x34: /* CMP immed */
- UNDEF_Test;
- break;
-
- case 0x35: /* CMPP immed */
- if (DESTReg == 15)
- { /* CMPP immed */
-#ifdef MODE32
- state->Cpsr = GETSPSR (state->Bank);
- ARMul_CPSRAltered (state);
-#else
- temp = LHS - DPImmRHS;
- SETR15PSR (temp);
-#endif
- break;
- }
- else
- {
- lhs = LHS; /* CMP immed */
- rhs = DPImmRHS;
- dest = lhs - rhs;
- ARMul_NegZero (state, dest);
- if ((lhs >= rhs) || ((rhs | lhs) >> 31))
- {
- ARMul_SubCarry (state, lhs, rhs, dest);
- ARMul_SubOverflow (state, lhs, rhs, dest);
- }
- else
- {
- CLEARC;
- CLEARV;
- }
- }
- break;
-
- case 0x36: /* CMN immed and MSR immed to SPSR */
- if (DESTReg == 15) /* MSR */
- ARMul_FixSPSR (state, instr, DPImmRHS);
- else
- {
- UNDEF_Test;
- }
- break;
-
- case 0x37: /* CMNP immed */
- if (DESTReg == 15)
- { /* CMNP immed */
-#ifdef MODE32
- state->Cpsr = GETSPSR (state->Bank);
- ARMul_CPSRAltered (state);
-#else
- temp = LHS + DPImmRHS;
- SETR15PSR (temp);
-#endif
- break;
- }
- else
- {
- lhs = LHS; /* CMN immed */
- rhs = DPImmRHS;
- dest = lhs + rhs;
- ASSIGNZ (dest == 0);
- if ((lhs | rhs) >> 30)
- { /* possible C,V,N to set */
- ASSIGNN (NEG (dest));
- ARMul_AddCarry (state, lhs, rhs, dest);
- ARMul_AddOverflow (state, lhs, rhs, dest);
- }
- else
- {
- CLEARN;
- CLEARC;
- CLEARV;
- }
- }
- break;
-
- case 0x38: /* ORR immed */
- dest = LHS | DPImmRHS;
- WRITEDEST (dest);
- break;
-
- case 0x39: /* ORRS immed */
- DPSImmRHS;
- dest = LHS | rhs;
- WRITESDEST (dest);
- break;
-
- case 0x3a: /* MOV immed */
- dest = DPImmRHS;
- WRITEDEST (dest);
- break;
-
- case 0x3b: /* MOVS immed */
- DPSImmRHS;
- WRITESDEST (rhs);
- break;
-
- case 0x3c: /* BIC immed */
- dest = LHS & ~DPImmRHS;
- WRITEDEST (dest);
- break;
-
- case 0x3d: /* BICS immed */
- DPSImmRHS;
- dest = LHS & ~rhs;
- WRITESDEST (dest);
- break;
-
- case 0x3e: /* MVN immed */
- dest = ~DPImmRHS;
- WRITEDEST (dest);
- break;
-
- case 0x3f: /* MVNS immed */
- DPSImmRHS;
- WRITESDEST (~rhs);
- break;
-
-/***************************************************************************\
-* Single Data Transfer Immediate RHS Instructions *
-\***************************************************************************/
-
- case 0x40: /* Store Word, No WriteBack, Post Dec, Immed */
- lhs = LHS;
- if (StoreWord (state, instr, lhs))
- LSBase = lhs - LSImmRHS;
- break;
-
- case 0x41: /* Load Word, No WriteBack, Post Dec, Immed */
- lhs = LHS;
- if (LoadWord (state, instr, lhs))
- LSBase = lhs - LSImmRHS;
- break;
-
- case 0x42: /* Store Word, WriteBack, Post Dec, Immed */
- UNDEF_LSRBaseEQDestWb;
- UNDEF_LSRPCBaseWb;
- lhs = LHS;
- temp = lhs - LSImmRHS;
- state->NtransSig = LOW;
- if (StoreWord (state, instr, lhs))
- LSBase = temp;
- state->NtransSig = (state->Mode & 3) ? HIGH : LOW;
- break;
-
- case 0x43: /* Load Word, WriteBack, Post Dec, Immed */
- UNDEF_LSRBaseEQDestWb;
- UNDEF_LSRPCBaseWb;
- lhs = LHS;
- state->NtransSig = LOW;
- if (LoadWord (state, instr, lhs))
- LSBase = lhs - LSImmRHS;
- state->NtransSig = (state->Mode & 3) ? HIGH : LOW;
- break;
-
- case 0x44: /* Store Byte, No WriteBack, Post Dec, Immed */
- lhs = LHS;
- if (StoreByte (state, instr, lhs))
- LSBase = lhs - LSImmRHS;
- break;
-
- case 0x45: /* Load Byte, No WriteBack, Post Dec, Immed */
- lhs = LHS;
- if (LoadByte (state, instr, lhs, LUNSIGNED))
- LSBase = lhs - LSImmRHS;
- break;
-
- case 0x46: /* Store Byte, WriteBack, Post Dec, Immed */
- UNDEF_LSRBaseEQDestWb;
- UNDEF_LSRPCBaseWb;
- lhs = LHS;
- state->NtransSig = LOW;
- if (StoreByte (state, instr, lhs))
- LSBase = lhs - LSImmRHS;
- state->NtransSig = (state->Mode & 3) ? HIGH : LOW;
- break;
-
- case 0x47: /* Load Byte, WriteBack, Post Dec, Immed */
- UNDEF_LSRBaseEQDestWb;
- UNDEF_LSRPCBaseWb;
- lhs = LHS;
- state->NtransSig = LOW;
- if (LoadByte (state, instr, lhs, LUNSIGNED))
- LSBase = lhs - LSImmRHS;
- state->NtransSig = (state->Mode & 3) ? HIGH : LOW;
- break;
-
- case 0x48: /* Store Word, No WriteBack, Post Inc, Immed */
- lhs = LHS;
- if (StoreWord (state, instr, lhs))
- LSBase = lhs + LSImmRHS;
- break;
-
- case 0x49: /* Load Word, No WriteBack, Post Inc, Immed */
- lhs = LHS;
- if (LoadWord (state, instr, lhs))
- LSBase = lhs + LSImmRHS;
- break;
-
- case 0x4a: /* Store Word, WriteBack, Post Inc, Immed */
- UNDEF_LSRBaseEQDestWb;
- UNDEF_LSRPCBaseWb;
- lhs = LHS;
- state->NtransSig = LOW;
- if (StoreWord (state, instr, lhs))
- LSBase = lhs + LSImmRHS;
- state->NtransSig = (state->Mode & 3) ? HIGH : LOW;
- break;
-
- case 0x4b: /* Load Word, WriteBack, Post Inc, Immed */
- UNDEF_LSRBaseEQDestWb;
- UNDEF_LSRPCBaseWb;
- lhs = LHS;
- state->NtransSig = LOW;
- if (LoadWord (state, instr, lhs))
- LSBase = lhs + LSImmRHS;
- state->NtransSig = (state->Mode & 3) ? HIGH : LOW;
- break;
-
- case 0x4c: /* Store Byte, No WriteBack, Post Inc, Immed */
- lhs = LHS;
- if (StoreByte (state, instr, lhs))
- LSBase = lhs + LSImmRHS;
- break;
-
- case 0x4d: /* Load Byte, No WriteBack, Post Inc, Immed */
- lhs = LHS;
- if (LoadByte (state, instr, lhs, LUNSIGNED))
- LSBase = lhs + LSImmRHS;
- break;
-
- case 0x4e: /* Store Byte, WriteBack, Post Inc, Immed */
- UNDEF_LSRBaseEQDestWb;
- UNDEF_LSRPCBaseWb;
- lhs = LHS;
- state->NtransSig = LOW;
- if (StoreByte (state, instr, lhs))
- LSBase = lhs + LSImmRHS;
- state->NtransSig = (state->Mode & 3) ? HIGH : LOW;
- break;
-
- case 0x4f: /* Load Byte, WriteBack, Post Inc, Immed */
- UNDEF_LSRBaseEQDestWb;
- UNDEF_LSRPCBaseWb;
- lhs = LHS;
- state->NtransSig = LOW;
- if (LoadByte (state, instr, lhs, LUNSIGNED))
- LSBase = lhs + LSImmRHS;
- state->NtransSig = (state->Mode & 3) ? HIGH : LOW;
- break;
-
-
- case 0x50: /* Store Word, No WriteBack, Pre Dec, Immed */
- (void) StoreWord (state, instr, LHS - LSImmRHS);
- break;
-
- case 0x51: /* Load Word, No WriteBack, Pre Dec, Immed */
- (void) LoadWord (state, instr, LHS - LSImmRHS);
- break;
-
- case 0x52: /* Store Word, WriteBack, Pre Dec, Immed */
- UNDEF_LSRBaseEQDestWb;
- UNDEF_LSRPCBaseWb;
- temp = LHS - LSImmRHS;
- if (StoreWord (state, instr, temp))
- LSBase = temp;
- break;
-
- case 0x53: /* Load Word, WriteBack, Pre Dec, Immed */
- UNDEF_LSRBaseEQDestWb;
- UNDEF_LSRPCBaseWb;
- temp = LHS - LSImmRHS;
- if (LoadWord (state, instr, temp))
- LSBase = temp;
- break;
-
- case 0x54: /* Store Byte, No WriteBack, Pre Dec, Immed */
- (void) StoreByte (state, instr, LHS - LSImmRHS);
- break;
-
- case 0x55: /* Load Byte, No WriteBack, Pre Dec, Immed */
- (void) LoadByte (state, instr, LHS - LSImmRHS, LUNSIGNED);
- break;
-
- case 0x56: /* Store Byte, WriteBack, Pre Dec, Immed */
- UNDEF_LSRBaseEQDestWb;
- UNDEF_LSRPCBaseWb;
- temp = LHS - LSImmRHS;
- if (StoreByte (state, instr, temp))
- LSBase = temp;
- break;
-
- case 0x57: /* Load Byte, WriteBack, Pre Dec, Immed */
- UNDEF_LSRBaseEQDestWb;
- UNDEF_LSRPCBaseWb;
- temp = LHS - LSImmRHS;
- if (LoadByte (state, instr, temp, LUNSIGNED))
- LSBase = temp;
- break;
-
- case 0x58: /* Store Word, No WriteBack, Pre Inc, Immed */
- (void) StoreWord (state, instr, LHS + LSImmRHS);
- break;
-
- case 0x59: /* Load Word, No WriteBack, Pre Inc, Immed */
- (void) LoadWord (state, instr, LHS + LSImmRHS);
- break;
-
- case 0x5a: /* Store Word, WriteBack, Pre Inc, Immed */
- UNDEF_LSRBaseEQDestWb;
- UNDEF_LSRPCBaseWb;
- temp = LHS + LSImmRHS;
- if (StoreWord (state, instr, temp))
- LSBase = temp;
- break;
-
- case 0x5b: /* Load Word, WriteBack, Pre Inc, Immed */
- UNDEF_LSRBaseEQDestWb;
- UNDEF_LSRPCBaseWb;
- temp = LHS + LSImmRHS;
- if (LoadWord (state, instr, temp))
- LSBase = temp;
- break;
-
- case 0x5c: /* Store Byte, No WriteBack, Pre Inc, Immed */
- (void) StoreByte (state, instr, LHS + LSImmRHS);
- break;
-
- case 0x5d: /* Load Byte, No WriteBack, Pre Inc, Immed */
- (void) LoadByte (state, instr, LHS + LSImmRHS, LUNSIGNED);
- break;
-
- case 0x5e: /* Store Byte, WriteBack, Pre Inc, Immed */
- UNDEF_LSRBaseEQDestWb;
- UNDEF_LSRPCBaseWb;
- temp = LHS + LSImmRHS;
- if (StoreByte (state, instr, temp))
- LSBase = temp;
- break;
-
- case 0x5f: /* Load Byte, WriteBack, Pre Inc, Immed */
- UNDEF_LSRBaseEQDestWb;
- UNDEF_LSRPCBaseWb;
- temp = LHS + LSImmRHS;
- if (LoadByte (state, instr, temp, LUNSIGNED))
- LSBase = temp;
- break;
-
-/***************************************************************************\
-* Single Data Transfer Register RHS Instructions *
-\***************************************************************************/
-
- case 0x60: /* Store Word, No WriteBack, Post Dec, Reg */
- if (BIT (4))
- {
- ARMul_UndefInstr (state, instr);
- break;
- }
- UNDEF_LSRBaseEQOffWb;
- UNDEF_LSRBaseEQDestWb;
- UNDEF_LSRPCBaseWb;
- UNDEF_LSRPCOffWb;
- lhs = LHS;
- if (StoreWord (state, instr, lhs))
- LSBase = lhs - LSRegRHS;
- break;
-
- case 0x61: /* Load Word, No WriteBack, Post Dec, Reg */
- if (BIT (4))
- {
- ARMul_UndefInstr (state, instr);
- break;
- }
- UNDEF_LSRBaseEQOffWb;
- UNDEF_LSRBaseEQDestWb;
- UNDEF_LSRPCBaseWb;
- UNDEF_LSRPCOffWb;
- lhs = LHS;
- temp = lhs - LSRegRHS;
- if (LoadWord (state, instr, lhs))
- LSBase = temp;
- break;
-
- case 0x62: /* Store Word, WriteBack, Post Dec, Reg */
- if (BIT (4))
- {
- ARMul_UndefInstr (state, instr);
- break;
- }
- UNDEF_LSRBaseEQOffWb;
- UNDEF_LSRBaseEQDestWb;
- UNDEF_LSRPCBaseWb;
- UNDEF_LSRPCOffWb;
- lhs = LHS;
- state->NtransSig = LOW;
- if (StoreWord (state, instr, lhs))
- LSBase = lhs - LSRegRHS;
- state->NtransSig = (state->Mode & 3) ? HIGH : LOW;
- break;
-
- case 0x63: /* Load Word, WriteBack, Post Dec, Reg */
- if (BIT (4))
- {
- ARMul_UndefInstr (state, instr);
- break;
- }
- UNDEF_LSRBaseEQOffWb;
- UNDEF_LSRBaseEQDestWb;
- UNDEF_LSRPCBaseWb;
- UNDEF_LSRPCOffWb;
- lhs = LHS;
- temp = lhs - LSRegRHS;
- state->NtransSig = LOW;
- if (LoadWord (state, instr, lhs))
- LSBase = temp;
- state->NtransSig = (state->Mode & 3) ? HIGH : LOW;
- break;
-
- case 0x64: /* Store Byte, No WriteBack, Post Dec, Reg */
- if (BIT (4))
- {
- ARMul_UndefInstr (state, instr);
- break;
- }
- UNDEF_LSRBaseEQOffWb;
- UNDEF_LSRBaseEQDestWb;
- UNDEF_LSRPCBaseWb;
- UNDEF_LSRPCOffWb;
- lhs = LHS;
- if (StoreByte (state, instr, lhs))
- LSBase = lhs - LSRegRHS;
- break;
-
- case 0x65: /* Load Byte, No WriteBack, Post Dec, Reg */
- if (BIT (4))
- {
- ARMul_UndefInstr (state, instr);
- break;
- }
- UNDEF_LSRBaseEQOffWb;
- UNDEF_LSRBaseEQDestWb;
- UNDEF_LSRPCBaseWb;
- UNDEF_LSRPCOffWb;
- lhs = LHS;
- temp = lhs - LSRegRHS;
- if (LoadByte (state, instr, lhs, LUNSIGNED))
- LSBase = temp;
- break;
-
- case 0x66: /* Store Byte, WriteBack, Post Dec, Reg */
- if (BIT (4))
- {
- ARMul_UndefInstr (state, instr);
- break;
- }
- UNDEF_LSRBaseEQOffWb;
- UNDEF_LSRBaseEQDestWb;
- UNDEF_LSRPCBaseWb;
- UNDEF_LSRPCOffWb;
- lhs = LHS;
- state->NtransSig = LOW;
- if (StoreByte (state, instr, lhs))
- LSBase = lhs - LSRegRHS;
- state->NtransSig = (state->Mode & 3) ? HIGH : LOW;
- break;
-
- case 0x67: /* Load Byte, WriteBack, Post Dec, Reg */
- if (BIT (4))
- {
- ARMul_UndefInstr (state, instr);
- break;
- }
- UNDEF_LSRBaseEQOffWb;
- UNDEF_LSRBaseEQDestWb;
- UNDEF_LSRPCBaseWb;
- UNDEF_LSRPCOffWb;
- lhs = LHS;
- temp = lhs - LSRegRHS;
- state->NtransSig = LOW;
- if (LoadByte (state, instr, lhs, LUNSIGNED))
- LSBase = temp;
- state->NtransSig = (state->Mode & 3) ? HIGH : LOW;
- break;
-
- case 0x68: /* Store Word, No WriteBack, Post Inc, Reg */
- if (BIT (4))
- {
- ARMul_UndefInstr (state, instr);
- break;
- }
- UNDEF_LSRBaseEQOffWb;
- UNDEF_LSRBaseEQDestWb;
- UNDEF_LSRPCBaseWb;
- UNDEF_LSRPCOffWb;
- lhs = LHS;
- if (StoreWord (state, instr, lhs))
- LSBase = lhs + LSRegRHS;
- break;
-
- case 0x69: /* Load Word, No WriteBack, Post Inc, Reg */
- if (BIT (4))
- {
- ARMul_UndefInstr (state, instr);
- break;
- }
- UNDEF_LSRBaseEQOffWb;
- UNDEF_LSRBaseEQDestWb;
- UNDEF_LSRPCBaseWb;
- UNDEF_LSRPCOffWb;
- lhs = LHS;
- temp = lhs + LSRegRHS;
- if (LoadWord (state, instr, lhs))
- LSBase = temp;
- break;
-
- case 0x6a: /* Store Word, WriteBack, Post Inc, Reg */
- if (BIT (4))
- {
- ARMul_UndefInstr (state, instr);
- break;
- }
- UNDEF_LSRBaseEQOffWb;
- UNDEF_LSRBaseEQDestWb;
- UNDEF_LSRPCBaseWb;
- UNDEF_LSRPCOffWb;
- lhs = LHS;
- state->NtransSig = LOW;
- if (StoreWord (state, instr, lhs))
- LSBase = lhs + LSRegRHS;
- state->NtransSig = (state->Mode & 3) ? HIGH : LOW;
- break;
-
- case 0x6b: /* Load Word, WriteBack, Post Inc, Reg */
- if (BIT (4))
- {
- ARMul_UndefInstr (state, instr);
- break;
- }
- UNDEF_LSRBaseEQOffWb;
- UNDEF_LSRBaseEQDestWb;
- UNDEF_LSRPCBaseWb;
- UNDEF_LSRPCOffWb;
- lhs = LHS;
- temp = lhs + LSRegRHS;
- state->NtransSig = LOW;
- if (LoadWord (state, instr, lhs))
- LSBase = temp;
- state->NtransSig = (state->Mode & 3) ? HIGH : LOW;
- break;
-
- case 0x6c: /* Store Byte, No WriteBack, Post Inc, Reg */
- if (BIT (4))
- {
- ARMul_UndefInstr (state, instr);
- break;
- }
- UNDEF_LSRBaseEQOffWb;
- UNDEF_LSRBaseEQDestWb;
- UNDEF_LSRPCBaseWb;
- UNDEF_LSRPCOffWb;
- lhs = LHS;
- if (StoreByte (state, instr, lhs))
- LSBase = lhs + LSRegRHS;
- break;
-
- case 0x6d: /* Load Byte, No WriteBack, Post Inc, Reg */
- if (BIT (4))
- {
- ARMul_UndefInstr (state, instr);
- break;
- }
- UNDEF_LSRBaseEQOffWb;
- UNDEF_LSRBaseEQDestWb;
- UNDEF_LSRPCBaseWb;
- UNDEF_LSRPCOffWb;
- lhs = LHS;
- temp = lhs + LSRegRHS;
- if (LoadByte (state, instr, lhs, LUNSIGNED))
- LSBase = temp;
- break;
-
- case 0x6e: /* Store Byte, WriteBack, Post Inc, Reg */
- if (BIT (4))
- {
- ARMul_UndefInstr (state, instr);
- break;
- }
- UNDEF_LSRBaseEQOffWb;
- UNDEF_LSRBaseEQDestWb;
- UNDEF_LSRPCBaseWb;
- UNDEF_LSRPCOffWb;
- lhs = LHS;
- state->NtransSig = LOW;
- if (StoreByte (state, instr, lhs))
- LSBase = lhs + LSRegRHS;
- state->NtransSig = (state->Mode & 3) ? HIGH : LOW;
- break;
-
- case 0x6f: /* Load Byte, WriteBack, Post Inc, Reg */
- if (BIT (4))
- {
- ARMul_UndefInstr (state, instr);
- break;
- }
- UNDEF_LSRBaseEQOffWb;
- UNDEF_LSRBaseEQDestWb;
- UNDEF_LSRPCBaseWb;
- UNDEF_LSRPCOffWb;
- lhs = LHS;
- temp = lhs + LSRegRHS;
- state->NtransSig = LOW;
- if (LoadByte (state, instr, lhs, LUNSIGNED))
- LSBase = temp;
- state->NtransSig = (state->Mode & 3) ? HIGH : LOW;
- break;
-
-
- case 0x70: /* Store Word, No WriteBack, Pre Dec, Reg */
- if (BIT (4))
- {
- ARMul_UndefInstr (state, instr);
- break;
- }
- (void) StoreWord (state, instr, LHS - LSRegRHS);
- break;
-
- case 0x71: /* Load Word, No WriteBack, Pre Dec, Reg */
- if (BIT (4))
- {
- ARMul_UndefInstr (state, instr);
- break;
- }
- (void) LoadWord (state, instr, LHS - LSRegRHS);
- break;
-
- case 0x72: /* Store Word, WriteBack, Pre Dec, Reg */
- if (BIT (4))
- {
- ARMul_UndefInstr (state, instr);
- break;
- }
- UNDEF_LSRBaseEQOffWb;
- UNDEF_LSRBaseEQDestWb;
- UNDEF_LSRPCBaseWb;
- UNDEF_LSRPCOffWb;
- temp = LHS - LSRegRHS;
- if (StoreWord (state, instr, temp))
- LSBase = temp;
- break;
-
- case 0x73: /* Load Word, WriteBack, Pre Dec, Reg */
- if (BIT (4))
- {
- ARMul_UndefInstr (state, instr);
- break;
- }
- UNDEF_LSRBaseEQOffWb;
- UNDEF_LSRBaseEQDestWb;
- UNDEF_LSRPCBaseWb;
- UNDEF_LSRPCOffWb;
- temp = LHS - LSRegRHS;
- if (LoadWord (state, instr, temp))
- LSBase = temp;
- break;
-
- case 0x74: /* Store Byte, No WriteBack, Pre Dec, Reg */
- if (BIT (4))
- {
- ARMul_UndefInstr (state, instr);
- break;
- }
- (void) StoreByte (state, instr, LHS - LSRegRHS);
- break;
-
- case 0x75: /* Load Byte, No WriteBack, Pre Dec, Reg */
- if (BIT (4))
- {
- ARMul_UndefInstr (state, instr);
- break;
- }
- (void) LoadByte (state, instr, LHS - LSRegRHS, LUNSIGNED);
- break;
-
- case 0x76: /* Store Byte, WriteBack, Pre Dec, Reg */
- if (BIT (4))
- {
- ARMul_UndefInstr (state, instr);
- break;
- }
- UNDEF_LSRBaseEQOffWb;
- UNDEF_LSRBaseEQDestWb;
- UNDEF_LSRPCBaseWb;
- UNDEF_LSRPCOffWb;
- temp = LHS - LSRegRHS;
- if (StoreByte (state, instr, temp))
- LSBase = temp;
- break;
-
- case 0x77: /* Load Byte, WriteBack, Pre Dec, Reg */
- if (BIT (4))
- {
- ARMul_UndefInstr (state, instr);
- break;
- }
- UNDEF_LSRBaseEQOffWb;
- UNDEF_LSRBaseEQDestWb;
- UNDEF_LSRPCBaseWb;
- UNDEF_LSRPCOffWb;
- temp = LHS - LSRegRHS;
- if (LoadByte (state, instr, temp, LUNSIGNED))
- LSBase = temp;
- break;
-
- case 0x78: /* Store Word, No WriteBack, Pre Inc, Reg */
- if (BIT (4))
- {
- ARMul_UndefInstr (state, instr);
- break;
- }
- (void) StoreWord (state, instr, LHS + LSRegRHS);
- break;
-
- case 0x79: /* Load Word, No WriteBack, Pre Inc, Reg */
- if (BIT (4))
- {
- ARMul_UndefInstr (state, instr);
- break;
- }
- (void) LoadWord (state, instr, LHS + LSRegRHS);
- break;
-
- case 0x7a: /* Store Word, WriteBack, Pre Inc, Reg */
- if (BIT (4))
- {
- ARMul_UndefInstr (state, instr);
- break;
- }
- UNDEF_LSRBaseEQOffWb;
- UNDEF_LSRBaseEQDestWb;
- UNDEF_LSRPCBaseWb;
- UNDEF_LSRPCOffWb;
- temp = LHS + LSRegRHS;
- if (StoreWord (state, instr, temp))
- LSBase = temp;
- break;
-
- case 0x7b: /* Load Word, WriteBack, Pre Inc, Reg */
- if (BIT (4))
- {
- ARMul_UndefInstr (state, instr);
- break;
- }
- UNDEF_LSRBaseEQOffWb;
- UNDEF_LSRBaseEQDestWb;
- UNDEF_LSRPCBaseWb;
- UNDEF_LSRPCOffWb;
- temp = LHS + LSRegRHS;
- if (LoadWord (state, instr, temp))
- LSBase = temp;
- break;
-
- case 0x7c: /* Store Byte, No WriteBack, Pre Inc, Reg */
- if (BIT (4))
- {
- ARMul_UndefInstr (state, instr);
- break;
- }
- (void) StoreByte (state, instr, LHS + LSRegRHS);
- break;
-
- case 0x7d: /* Load Byte, No WriteBack, Pre Inc, Reg */
- if (BIT (4))
- {
- ARMul_UndefInstr (state, instr);
- break;
- }
- (void) LoadByte (state, instr, LHS + LSRegRHS, LUNSIGNED);
- break;
-
- case 0x7e: /* Store Byte, WriteBack, Pre Inc, Reg */
- if (BIT (4))
- {
- ARMul_UndefInstr (state, instr);
- break;
- }
- UNDEF_LSRBaseEQOffWb;
- UNDEF_LSRBaseEQDestWb;
- UNDEF_LSRPCBaseWb;
- UNDEF_LSRPCOffWb;
- temp = LHS + LSRegRHS;
- if (StoreByte (state, instr, temp))
- LSBase = temp;
- break;
-
- case 0x7f: /* Load Byte, WriteBack, Pre Inc, Reg */
- if (BIT (4))
- {
- /* Check for the special breakpoint opcode.
- This value should correspond to the value defined
- as ARM_BE_BREAKPOINT in gdb/arm/tm-arm.h. */
- if (BITS (0, 19) == 0xfdefe)
- {
- if (!ARMul_OSHandleSWI (state, SWI_Breakpoint))
- ARMul_Abort (state, ARMul_SWIV);
- }
- else
- ARMul_UndefInstr (state, instr);
- break;
- }
- UNDEF_LSRBaseEQOffWb;
- UNDEF_LSRBaseEQDestWb;
- UNDEF_LSRPCBaseWb;
- UNDEF_LSRPCOffWb;
- temp = LHS + LSRegRHS;
- if (LoadByte (state, instr, temp, LUNSIGNED))
- LSBase = temp;
- break;
-
-/***************************************************************************\
-* Multiple Data Transfer Instructions *
-\***************************************************************************/
-
- case 0x80: /* Store, No WriteBack, Post Dec */
- STOREMULT (instr, LSBase - LSMNumRegs + 4L, 0L);
- break;
-
- case 0x81: /* Load, No WriteBack, Post Dec */
- LOADMULT (instr, LSBase - LSMNumRegs + 4L, 0L);
- break;
-
- case 0x82: /* Store, WriteBack, Post Dec */
- temp = LSBase - LSMNumRegs;
- STOREMULT (instr, temp + 4L, temp);
- break;
-
- case 0x83: /* Load, WriteBack, Post Dec */
- temp = LSBase - LSMNumRegs;
- LOADMULT (instr, temp + 4L, temp);
- break;
-
- case 0x84: /* Store, Flags, No WriteBack, Post Dec */
- STORESMULT (instr, LSBase - LSMNumRegs + 4L, 0L);
- break;
-
- case 0x85: /* Load, Flags, No WriteBack, Post Dec */
- LOADSMULT (instr, LSBase - LSMNumRegs + 4L, 0L);
- break;
-
- case 0x86: /* Store, Flags, WriteBack, Post Dec */
- temp = LSBase - LSMNumRegs;
- STORESMULT (instr, temp + 4L, temp);
- break;
-
- case 0x87: /* Load, Flags, WriteBack, Post Dec */
- temp = LSBase - LSMNumRegs;
- LOADSMULT (instr, temp + 4L, temp);
- break;
-
- case 0x88: /* Store, No WriteBack, Post Inc */
- STOREMULT (instr, LSBase, 0L);
- break;
-
- case 0x89: /* Load, No WriteBack, Post Inc */
- LOADMULT (instr, LSBase, 0L);
- break;
-
- case 0x8a: /* Store, WriteBack, Post Inc */
- temp = LSBase;
- STOREMULT (instr, temp, temp + LSMNumRegs);
- break;
-
- case 0x8b: /* Load, WriteBack, Post Inc */
- temp = LSBase;
- LOADMULT (instr, temp, temp + LSMNumRegs);
- break;
-
- case 0x8c: /* Store, Flags, No WriteBack, Post Inc */
- STORESMULT (instr, LSBase, 0L);
- break;
-
- case 0x8d: /* Load, Flags, No WriteBack, Post Inc */
- LOADSMULT (instr, LSBase, 0L);
- break;
-
- case 0x8e: /* Store, Flags, WriteBack, Post Inc */
- temp = LSBase;
- STORESMULT (instr, temp, temp + LSMNumRegs);
- break;
-
- case 0x8f: /* Load, Flags, WriteBack, Post Inc */
- temp = LSBase;
- LOADSMULT (instr, temp, temp + LSMNumRegs);
- break;
-
- case 0x90: /* Store, No WriteBack, Pre Dec */
- STOREMULT (instr, LSBase - LSMNumRegs, 0L);
- break;
-
- case 0x91: /* Load, No WriteBack, Pre Dec */
- LOADMULT (instr, LSBase - LSMNumRegs, 0L);
- break;
-
- case 0x92: /* Store, WriteBack, Pre Dec */
- temp = LSBase - LSMNumRegs;
- STOREMULT (instr, temp, temp);
- break;
-
- case 0x93: /* Load, WriteBack, Pre Dec */
- temp = LSBase - LSMNumRegs;
- LOADMULT (instr, temp, temp);
- break;
-
- case 0x94: /* Store, Flags, No WriteBack, Pre Dec */
- STORESMULT (instr, LSBase - LSMNumRegs, 0L);
- break;
-
- case 0x95: /* Load, Flags, No WriteBack, Pre Dec */
- LOADSMULT (instr, LSBase - LSMNumRegs, 0L);
- break;
-
- case 0x96: /* Store, Flags, WriteBack, Pre Dec */
- temp = LSBase - LSMNumRegs;
- STORESMULT (instr, temp, temp);
- break;
-
- case 0x97: /* Load, Flags, WriteBack, Pre Dec */
- temp = LSBase - LSMNumRegs;
- LOADSMULT (instr, temp, temp);
- break;
-
- case 0x98: /* Store, No WriteBack, Pre Inc */
- STOREMULT (instr, LSBase + 4L, 0L);
- break;
-
- case 0x99: /* Load, No WriteBack, Pre Inc */
- LOADMULT (instr, LSBase + 4L, 0L);
- break;
-
- case 0x9a: /* Store, WriteBack, Pre Inc */
- temp = LSBase;
- STOREMULT (instr, temp + 4L, temp + LSMNumRegs);
- break;
-
- case 0x9b: /* Load, WriteBack, Pre Inc */
- temp = LSBase;
- LOADMULT (instr, temp + 4L, temp + LSMNumRegs);
- break;
-
- case 0x9c: /* Store, Flags, No WriteBack, Pre Inc */
- STORESMULT (instr, LSBase + 4L, 0L);
- break;
-
- case 0x9d: /* Load, Flags, No WriteBack, Pre Inc */
- LOADSMULT (instr, LSBase + 4L, 0L);
- break;
-
- case 0x9e: /* Store, Flags, WriteBack, Pre Inc */
- temp = LSBase;
- STORESMULT (instr, temp + 4L, temp + LSMNumRegs);
- break;
-
- case 0x9f: /* Load, Flags, WriteBack, Pre Inc */
- temp = LSBase;
- LOADSMULT (instr, temp + 4L, temp + LSMNumRegs);
- break;
-
-/***************************************************************************\
-* Branch forward *
-\***************************************************************************/
-
- case 0xa0:
- case 0xa1:
- case 0xa2:
- case 0xa3:
- case 0xa4:
- case 0xa5:
- case 0xa6:
- case 0xa7:
- state->Reg[15] = pc + 8 + POSBRANCH;
- FLUSHPIPE;
- break;
-
-/***************************************************************************\
-* Branch backward *
-\***************************************************************************/
-
- case 0xa8:
- case 0xa9:
- case 0xaa:
- case 0xab:
- case 0xac:
- case 0xad:
- case 0xae:
- case 0xaf:
- state->Reg[15] = pc + 8 + NEGBRANCH;
- FLUSHPIPE;
- break;
-
-/***************************************************************************\
-* Branch and Link forward *
-\***************************************************************************/
-
- case 0xb0:
- case 0xb1:
- case 0xb2:
- case 0xb3:
- case 0xb4:
- case 0xb5:
- case 0xb6:
- case 0xb7:
-#ifdef MODE32
- state->Reg[14] = pc + 4; /* put PC into Link */
-#else
- state->Reg[14] = (pc + 4) | ECC | ER15INT | EMODE; /* put PC into Link */
-#endif
- state->Reg[15] = pc + 8 + POSBRANCH;
- FLUSHPIPE;
- break;
-
-/***************************************************************************\
-* Branch and Link backward *
-\***************************************************************************/
-
- case 0xb8:
- case 0xb9:
- case 0xba:
- case 0xbb:
- case 0xbc:
- case 0xbd:
- case 0xbe:
- case 0xbf:
-#ifdef MODE32
- state->Reg[14] = pc + 4; /* put PC into Link */
-#else
- state->Reg[14] = (pc + 4) | ECC | ER15INT | EMODE; /* put PC into Link */
-#endif
- state->Reg[15] = pc + 8 + NEGBRANCH;
- FLUSHPIPE;
- break;
-
-/***************************************************************************\
-* Co-Processor Data Transfers *
-\***************************************************************************/
-
- case 0xc4:
- if (state->is_XScale)
- {
- if (BITS (4, 7) != 0x00)
- ARMul_UndefInstr (state, instr);
-
- if (BITS (8, 11) != 0x00)
- ARMul_UndefInstr (state, instr); /* Not CP0. */
-
- /* XScale MAR insn. Move two registers into accumulator. */
- if (BITS (0, 3) == 0x00)
- {
- state->Accumulator = state->Reg[BITS (12, 15)];
- state->Accumulator += (ARMdword) state->Reg[BITS (16, 19)] << 32;
- break;
- }
- /* Access to any other acc is unpredicatable. */
- break;
- }
- /* Drop through. */
-
- case 0xc0: /* Store , No WriteBack , Post Dec */
- ARMul_STC (state, instr, LHS);
- break;
-
- case 0xc5:
- if (state->is_XScale)
- {
- if (BITS (4, 7) != 0x00)
- ARMul_UndefInstr (state, instr);
-
- if (BITS (8, 11) != 0x00)
- ARMul_UndefInstr (state, instr); /* Not CP0. */
-
- /* XScale MRA insn. Move accumulator into two registers. */
- if (BITS (0, 3) == 0x00)
- {
- ARMword t1 = (state->Accumulator >> 32) & 255;
-
- if (t1 & 128)
- t1 -= 256;
-
- state->Reg[BITS (12, 15)] = state->Accumulator;
- state->Reg[BITS (16, 19)] = t1;
- break;
- }
- /* Access to any other acc is unpredicatable. */
- break;
- }
- /* Drop through. */
-
- case 0xc1: /* Load , No WriteBack , Post Dec */
- ARMul_LDC (state, instr, LHS);
- break;
-
- case 0xc2:
- case 0xc6: /* Store , WriteBack , Post Dec */
- lhs = LHS;
- state->Base = lhs - LSCOff;
- ARMul_STC (state, instr, lhs);
- break;
-
- case 0xc3:
- case 0xc7: /* Load , WriteBack , Post Dec */
- lhs = LHS;
- state->Base = lhs - LSCOff;
- ARMul_LDC (state, instr, lhs);
- break;
-
- case 0xc8:
- case 0xcc: /* Store , No WriteBack , Post Inc */
- ARMul_STC (state, instr, LHS);
- break;
-
- case 0xc9:
- case 0xcd: /* Load , No WriteBack , Post Inc */
- ARMul_LDC (state, instr, LHS);
- break;
-
- case 0xca:
- case 0xce: /* Store , WriteBack , Post Inc */
- lhs = LHS;
- state->Base = lhs + LSCOff;
- ARMul_STC (state, instr, LHS);
- break;
-
- case 0xcb:
- case 0xcf: /* Load , WriteBack , Post Inc */
- lhs = LHS;
- state->Base = lhs + LSCOff;
- ARMul_LDC (state, instr, LHS);
- break;
-
-
- case 0xd0:
- case 0xd4: /* Store , No WriteBack , Pre Dec */
- ARMul_STC (state, instr, LHS - LSCOff);
- break;
-
- case 0xd1:
- case 0xd5: /* Load , No WriteBack , Pre Dec */
- ARMul_LDC (state, instr, LHS - LSCOff);
- break;
-
- case 0xd2:
- case 0xd6: /* Store , WriteBack , Pre Dec */
- lhs = LHS - LSCOff;
- state->Base = lhs;
- ARMul_STC (state, instr, lhs);
- break;
-
- case 0xd3:
- case 0xd7: /* Load , WriteBack , Pre Dec */
- lhs = LHS - LSCOff;
- state->Base = lhs;
- ARMul_LDC (state, instr, lhs);
- break;
-
- case 0xd8:
- case 0xdc: /* Store , No WriteBack , Pre Inc */
- ARMul_STC (state, instr, LHS + LSCOff);
- break;
-
- case 0xd9:
- case 0xdd: /* Load , No WriteBack , Pre Inc */
- ARMul_LDC (state, instr, LHS + LSCOff);
- break;
-
- case 0xda:
- case 0xde: /* Store , WriteBack , Pre Inc */
- lhs = LHS + LSCOff;
- state->Base = lhs;
- ARMul_STC (state, instr, lhs);
- break;
-
- case 0xdb:
- case 0xdf: /* Load , WriteBack , Pre Inc */
- lhs = LHS + LSCOff;
- state->Base = lhs;
- ARMul_LDC (state, instr, lhs);
- break;
-
-/***************************************************************************\
-* Co-Processor Register Transfers (MCR) and Data Ops *
-\***************************************************************************/
-
- case 0xe2:
- if (state->is_XScale)
- switch (BITS (18, 19))
- {
- case 0x0:
- {
- /* XScale MIA instruction. Signed multiplication of two 32 bit
- values and addition to 40 bit accumulator. */
- long long Rm = state->Reg[MULLHSReg];
- long long Rs = state->Reg[MULACCReg];
-
- if (Rm & (1 << 31))
- Rm -= 1ULL << 32;
- if (Rs & (1 << 31))
- Rs -= 1ULL << 32;
- state->Accumulator += Rm * Rs;
- }
- goto donext;
-
- case 0x2:
- {
- /* XScale MIAPH instruction. */
- ARMword t1 = state->Reg[MULLHSReg] >> 16;
- ARMword t2 = state->Reg[MULACCReg] >> 16;
- ARMword t3 = state->Reg[MULLHSReg] & 0xffff;
- ARMword t4 = state->Reg[MULACCReg] & 0xffff;
- long long t5;
-
- if (t1 & (1 << 15))
- t1 -= 1 << 16;
- if (t2 & (1 << 15))
- t2 -= 1 << 16;
- if (t3 & (1 << 15))
- t3 -= 1 << 16;
- if (t4 & (1 << 15))
- t4 -= 1 << 16;
- t1 *= t2;
- t5 = t1;
- if (t5 & (1 << 31))
- t5 -= 1ULL << 32;
- state->Accumulator += t5;
- t3 *= t4;
- t5 = t3;
- if (t5 & (1 << 31))
- t5 -= 1ULL << 32;
- state->Accumulator += t5;
- }
- goto donext;
-
- case 0x3:
- {
- /* XScale MIAxy instruction. */
- ARMword t1;
- ARMword t2;
- long long t5;
-
- if (BIT (17))
- t1 = state->Reg[MULLHSReg] >> 16;
- else
- t1 = state->Reg[MULLHSReg] & 0xffff;
-
- if (BIT (16))
- t2 = state->Reg[MULACCReg] >> 16;
- else
- t2 = state->Reg[MULACCReg] & 0xffff;
-
- if (t1 & (1 << 15))
- t1 -= 1 << 16;
- if (t2 & (1 << 15))
- t2 -= 1 << 16;
- t1 *= t2;
- t5 = t1;
- if (t5 & (1 << 31))
- t5 -= 1ULL << 32;
- state->Accumulator += t5;
- }
- goto donext;
-
- default:
- break;
- }
- /* Drop through. */
-
- case 0xe0:
- case 0xe4:
- case 0xe6:
- case 0xe8:
- case 0xea:
- case 0xec:
- case 0xee:
- if (BIT (4))
- { /* MCR */
- if (DESTReg == 15)
- {
- UNDEF_MCRPC;
-#ifdef MODE32
- ARMul_MCR (state, instr, state->Reg[15] + isize);
-#else
- ARMul_MCR (state, instr, ECC | ER15INT | EMODE |
- ((state->Reg[15] + isize) & R15PCBITS));
-#endif
- }
- else
- ARMul_MCR (state, instr, DEST);
- }
- else /* CDP Part 1 */
- ARMul_CDP (state, instr);
- break;
-
-/***************************************************************************\
-* Co-Processor Register Transfers (MRC) and Data Ops *
-\***************************************************************************/
-
- case 0xe1:
- case 0xe3:
- case 0xe5:
- case 0xe7:
- case 0xe9:
- case 0xeb:
- case 0xed:
- case 0xef:
- if (BIT (4))
- { /* MRC */
- temp = ARMul_MRC (state, instr);
- if (DESTReg == 15)
- {
- ASSIGNN ((temp & NBIT) != 0);
- ASSIGNZ ((temp & ZBIT) != 0);
- ASSIGNC ((temp & CBIT) != 0);
- ASSIGNV ((temp & VBIT) != 0);
- }
- else
- DEST = temp;
- }
- else /* CDP Part 2 */
- ARMul_CDP (state, instr);
- break;
-
-/***************************************************************************\
-* SWI instruction *
-\***************************************************************************/
-
- case 0xf0:
- case 0xf1:
- case 0xf2:
- case 0xf3:
- case 0xf4:
- case 0xf5:
- case 0xf6:
- case 0xf7:
- case 0xf8:
- case 0xf9:
- case 0xfa:
- case 0xfb:
- case 0xfc:
- case 0xfd:
- case 0xfe:
- case 0xff:
- if (instr == ARMul_ABORTWORD && state->AbortAddr == pc)
- {
- /* A prefetch abort. */
- XScale_set_fsr_far (state, ARMul_CP15_R5_MMU_EXCPT, pc);
- ARMul_Abort (state, ARMul_PrefetchAbortV);
- break;
- }
-
- if (!ARMul_OSHandleSWI (state, BITS (0, 23)))
- {
- ARMul_Abort (state, ARMul_SWIV);
- }
- break;
- } /* 256 way main switch */
- } /* if temp */
-
-#ifdef MODET
- donext:
-#endif
-
-#ifdef NEED_UI_LOOP_HOOK
- if (ui_loop_hook != NULL && ui_loop_hook_counter-- < 0)
- {
- ui_loop_hook_counter = UI_LOOP_POLL_INTERVAL;
- ui_loop_hook (0);
- }
-#endif /* NEED_UI_LOOP_HOOK */
-
- if (state->Emulate == ONCE)
- state->Emulate = STOP;
- /* If we have changed mode, allow the PC to advance before stopping. */
- else if (state->Emulate == CHANGEMODE)
- continue;
- else if (state->Emulate != RUN)
- break;
- }
- while (!stop_simulator); /* do loop */
-
- state->decoded = decoded;
- state->loaded = loaded;
- state->pc = pc;
-
- return pc;
-} /* Emulate 26/32 in instruction based mode */
-
-
-/***************************************************************************\
-* This routine evaluates most Data Processing register RHS's with the S *
-* bit clear. It is intended to be called from the macro DPRegRHS, which *
-* filters the common case of an unshifted register with in line code *
-\***************************************************************************/
-
-static ARMword
-GetDPRegRHS (ARMul_State * state, ARMword instr)
-{
- ARMword shamt, base;
-
- base = RHSReg;
- if (BIT (4))
- { /* shift amount in a register */
- UNDEF_Shift;
- INCPC;
-#ifndef MODE32
- if (base == 15)
- base = ECC | ER15INT | R15PC | EMODE;
- else
-#endif
- base = state->Reg[base];
- ARMul_Icycles (state, 1, 0L);
- shamt = state->Reg[BITS (8, 11)] & 0xff;
- switch ((int) BITS (5, 6))
- {
- case LSL:
- if (shamt == 0)
- return (base);
- else if (shamt >= 32)
- return (0);
- else
- return (base << shamt);
- case LSR:
- if (shamt == 0)
- return (base);
- else if (shamt >= 32)
- return (0);
- else
- return (base >> shamt);
- case ASR:
- if (shamt == 0)
- return (base);
- else if (shamt >= 32)
- return ((ARMword) ((long int) base >> 31L));
- else
- return ((ARMword) ((long int) base >> (int) shamt));
- case ROR:
- shamt &= 0x1f;
- if (shamt == 0)
- return (base);
- else
- return ((base << (32 - shamt)) | (base >> shamt));
- }
- }
- else
- { /* shift amount is a constant */
-#ifndef MODE32
- if (base == 15)
- base = ECC | ER15INT | R15PC | EMODE;
- else
-#endif
- base = state->Reg[base];
- shamt = BITS (7, 11);
- switch ((int) BITS (5, 6))
- {
- case LSL:
- return (base << shamt);
- case LSR:
- if (shamt == 0)
- return (0);
- else
- return (base >> shamt);
- case ASR:
- if (shamt == 0)
- return ((ARMword) ((long int) base >> 31L));
- else
- return ((ARMword) ((long int) base >> (int) shamt));
- case ROR:
- if (shamt == 0) /* its an RRX */
- return ((base >> 1) | (CFLAG << 31));
- else
- return ((base << (32 - shamt)) | (base >> shamt));
- }
- }
- return (0); /* just to shut up lint */
-}
-
-/***************************************************************************\
-* This routine evaluates most Logical Data Processing register RHS's *
-* with the S bit set. It is intended to be called from the macro *
-* DPSRegRHS, which filters the common case of an unshifted register *
-* with in line code *
-\***************************************************************************/
-
-static ARMword
-GetDPSRegRHS (ARMul_State * state, ARMword instr)
-{
- ARMword shamt, base;
-
- base = RHSReg;
- if (BIT (4))
- { /* shift amount in a register */
- UNDEF_Shift;
- INCPC;
-#ifndef MODE32
- if (base == 15)
- base = ECC | ER15INT | R15PC | EMODE;
- else
-#endif
- base = state->Reg[base];
- ARMul_Icycles (state, 1, 0L);
- shamt = state->Reg[BITS (8, 11)] & 0xff;
- switch ((int) BITS (5, 6))
- {
- case LSL:
- if (shamt == 0)
- return (base);
- else if (shamt == 32)
- {
- ASSIGNC (base & 1);
- return (0);
- }
- else if (shamt > 32)
- {
- CLEARC;
- return (0);
- }
- else
- {
- ASSIGNC ((base >> (32 - shamt)) & 1);
- return (base << shamt);
- }
- case LSR:
- if (shamt == 0)
- return (base);
- else if (shamt == 32)
- {
- ASSIGNC (base >> 31);
- return (0);
- }
- else if (shamt > 32)
- {
- CLEARC;
- return (0);
- }
- else
- {
- ASSIGNC ((base >> (shamt - 1)) & 1);
- return (base >> shamt);
- }
- case ASR:
- if (shamt == 0)
- return (base);
- else if (shamt >= 32)
- {
- ASSIGNC (base >> 31L);
- return ((ARMword) ((long int) base >> 31L));
- }
- else
- {
- ASSIGNC ((ARMword) ((long int) base >> (int) (shamt - 1)) & 1);
- return ((ARMword) ((long int) base >> (int) shamt));
- }
- case ROR:
- if (shamt == 0)
- return (base);
- shamt &= 0x1f;
- if (shamt == 0)
- {
- ASSIGNC (base >> 31);
- return (base);
- }
- else
- {
- ASSIGNC ((base >> (shamt - 1)) & 1);
- return ((base << (32 - shamt)) | (base >> shamt));
- }
- }
- }
- else
- { /* shift amount is a constant */
-#ifndef MODE32
- if (base == 15)
- base = ECC | ER15INT | R15PC | EMODE;
- else
-#endif
- base = state->Reg[base];
- shamt = BITS (7, 11);
- switch ((int) BITS (5, 6))
- {
- case LSL:
- ASSIGNC ((base >> (32 - shamt)) & 1);
- return (base << shamt);
- case LSR:
- if (shamt == 0)
- {
- ASSIGNC (base >> 31);
- return (0);
- }
- else
- {
- ASSIGNC ((base >> (shamt - 1)) & 1);
- return (base >> shamt);
- }
- case ASR:
- if (shamt == 0)
- {
- ASSIGNC (base >> 31L);
- return ((ARMword) ((long int) base >> 31L));
- }
- else
- {
- ASSIGNC ((ARMword) ((long int) base >> (int) (shamt - 1)) & 1);
- return ((ARMword) ((long int) base >> (int) shamt));
- }
- case ROR:
- if (shamt == 0)
- { /* its an RRX */
- shamt = CFLAG;
- ASSIGNC (base & 1);
- return ((base >> 1) | (shamt << 31));
- }
- else
- {
- ASSIGNC ((base >> (shamt - 1)) & 1);
- return ((base << (32 - shamt)) | (base >> shamt));
- }
- }
- }
- return (0); /* just to shut up lint */
-}
-
-/***************************************************************************\
-* This routine handles writes to register 15 when the S bit is not set. *
-\***************************************************************************/
-
-static void
-WriteR15 (ARMul_State * state, ARMword src)
-{
- /* The ARM documentation states that the two least significant bits
- are discarded when setting PC, except in the cases handled by
- WriteR15Branch() below. It's probably an oversight: in THUMB
- mode, the second least significant bit should probably not be
- discarded. */
-#ifdef MODET
- if (TFLAG)
- src &= 0xfffffffe;
- else
-#endif
- src &= 0xfffffffc;
-#ifdef MODE32
- state->Reg[15] = src & PCBITS;
-#else
- state->Reg[15] = (src & R15PCBITS) | ECC | ER15INT | EMODE;
- ARMul_R15Altered (state);
-#endif
- FLUSHPIPE;
-}
-
-/***************************************************************************\
-* This routine handles writes to register 15 when the S bit is set. *
-\***************************************************************************/
-
-static void
-WriteSR15 (ARMul_State * state, ARMword src)
-{
-#ifdef MODE32
- if (state->Bank > 0)
- {
- state->Cpsr = state->Spsr[state->Bank];
- ARMul_CPSRAltered (state);
- }
-#ifdef MODET
- if (TFLAG)
- src &= 0xfffffffe;
- else
-#endif
- src &= 0xfffffffc;
- state->Reg[15] = src & PCBITS;
-#else
-#ifdef MODET
- if (TFLAG)
- abort (); /* ARMul_R15Altered would have to support it. */
- else
-#endif
- src &= 0xfffffffc;
- if (state->Bank == USERBANK)
- state->Reg[15] = (src & (CCBITS | R15PCBITS)) | ER15INT | EMODE;
- else
- state->Reg[15] = src;
- ARMul_R15Altered (state);
-#endif
- FLUSHPIPE;
-}
-
-/* In machines capable of running in Thumb mode, BX, BLX, LDR and LDM
- will switch to Thumb mode if the least significant bit is set. */
-
-static void
-WriteR15Branch (ARMul_State * state, ARMword src)
-{
-#ifdef MODET
- if (src & 1)
- { /* Thumb bit */
- SETT;
- state->Reg[15] = src & 0xfffffffe;
- }
- else
- {
- CLEART;
- state->Reg[15] = src & 0xfffffffc;
- }
- FLUSHPIPE;
-#else
- WriteR15 (state, src);
-#endif
-}
-
-/***************************************************************************\
-* This routine evaluates most Load and Store register RHS's. It is *
-* intended to be called from the macro LSRegRHS, which filters the *
-* common case of an unshifted register with in line code *
-\***************************************************************************/
-
-static ARMword
-GetLSRegRHS (ARMul_State * state, ARMword instr)
-{
- ARMword shamt, base;
-
- base = RHSReg;
-#ifndef MODE32
- if (base == 15)
- base = ECC | ER15INT | R15PC | EMODE; /* Now forbidden, but .... */
- else
-#endif
- base = state->Reg[base];
-
- shamt = BITS (7, 11);
- switch ((int) BITS (5, 6))
- {
- case LSL:
- return (base << shamt);
- case LSR:
- if (shamt == 0)
- return (0);
- else
- return (base >> shamt);
- case ASR:
- if (shamt == 0)
- return ((ARMword) ((long int) base >> 31L));
- else
- return ((ARMword) ((long int) base >> (int) shamt));
- case ROR:
- if (shamt == 0) /* its an RRX */
- return ((base >> 1) | (CFLAG << 31));
- else
- return ((base << (32 - shamt)) | (base >> shamt));
- }
- return (0); /* just to shut up lint */
-}
-
-/***************************************************************************\
-* This routine evaluates the ARM7T halfword and signed transfer RHS's. *
-\***************************************************************************/
-
-static ARMword
-GetLS7RHS (ARMul_State * state, ARMword instr)
-{
- if (BIT (22) == 0)
- { /* register */
-#ifndef MODE32
- if (RHSReg == 15)
- return ECC | ER15INT | R15PC | EMODE; /* Now forbidden, but ... */
-#endif
- return state->Reg[RHSReg];
- }
-
- /* else immediate */
- return BITS (0, 3) | (BITS (8, 11) << 4);
-}
-
-/***************************************************************************\
-* This function does the work of loading a word for a LDR instruction. *
-\***************************************************************************/
-
-static unsigned
-LoadWord (ARMul_State * state, ARMword instr, ARMword address)
-{
- ARMword dest;
-
- BUSUSEDINCPCS;
-#ifndef MODE32
- if (ADDREXCEPT (address))
- {
- INTERNALABORT (address);
- }
-#endif
- dest = ARMul_LoadWordN (state, address);
- if (state->Aborted)
- {
- TAKEABORT;
- return (state->lateabtSig);
- }
- if (address & 3)
- dest = ARMul_Align (state, address, dest);
- WRITEDESTB (dest);
- ARMul_Icycles (state, 1, 0L);
-
- return (DESTReg != LHSReg);
-}
-
-#ifdef MODET
-/***************************************************************************\
-* This function does the work of loading a halfword. *
-\***************************************************************************/
-
-static unsigned
-LoadHalfWord (ARMul_State * state, ARMword instr, ARMword address,
- int signextend)
-{
- ARMword dest;
-
- BUSUSEDINCPCS;
-#ifndef MODE32
- if (ADDREXCEPT (address))
- {
- INTERNALABORT (address);
- }
-#endif
- dest = ARMul_LoadHalfWord (state, address);
- if (state->Aborted)
- {
- TAKEABORT;
- return (state->lateabtSig);
- }
- UNDEF_LSRBPC;
- if (signextend)
- {
- if (dest & 1 << (16 - 1))
- dest = (dest & ((1 << 16) - 1)) - (1 << 16);
- }
- WRITEDEST (dest);
- ARMul_Icycles (state, 1, 0L);
- return (DESTReg != LHSReg);
-}
-
-#endif /* MODET */
-
-/***************************************************************************\
-* This function does the work of loading a byte for a LDRB instruction. *
-\***************************************************************************/
-
-static unsigned
-LoadByte (ARMul_State * state, ARMword instr, ARMword address, int signextend)
-{
- ARMword dest;
-
- BUSUSEDINCPCS;
-#ifndef MODE32
- if (ADDREXCEPT (address))
- {
- INTERNALABORT (address);
- }
-#endif
- dest = ARMul_LoadByte (state, address);
- if (state->Aborted)
- {
- TAKEABORT;
- return (state->lateabtSig);
- }
- UNDEF_LSRBPC;
- if (signextend)
- {
- if (dest & 1 << (8 - 1))
- dest = (dest & ((1 << 8) - 1)) - (1 << 8);
- }
- WRITEDEST (dest);
- ARMul_Icycles (state, 1, 0L);
- return (DESTReg != LHSReg);
-}
-
-/***************************************************************************\
-* This function does the work of loading two words for a LDRD instruction. *
-\***************************************************************************/
-
-static void
-Handle_Load_Double (ARMul_State * state, ARMword instr)
-{
- ARMword dest_reg;
- ARMword addr_reg;
- ARMword write_back = BIT (21);
- ARMword immediate = BIT (22);
- ARMword add_to_base = BIT (23);
- ARMword pre_indexed = BIT (24);
- ARMword offset;
- ARMword addr;
- ARMword sum;
- ARMword base;
- ARMword value1;
- ARMword value2;
-
- BUSUSEDINCPCS;
-
- /* If the writeback bit is set, the pre-index bit must be clear. */
- if (write_back && ! pre_indexed)
- {
- ARMul_UndefInstr (state, instr);
- return;
- }
-
- /* Extract the base address register. */
- addr_reg = LHSReg;
-
- /* Extract the destination register and check it. */
- dest_reg = DESTReg;
-
- /* Destination register must be even. */
- if ((dest_reg & 1)
- /* Destination register cannot be LR. */
- || (dest_reg == 14))
- {
- ARMul_UndefInstr (state, instr);
- return;
- }
-
- /* Compute the base address. */
- base = state->Reg[addr_reg];
-
- /* Compute the offset. */
- offset = immediate ? ((BITS (8, 11) << 4) | BITS (0, 3)) : state->Reg[RHSReg];
-
- /* Compute the sum of the two. */
- if (add_to_base)
- sum = base + offset;
- else
- sum = base - offset;
-
- /* If this is a pre-indexed mode use the sum. */
- if (pre_indexed)
- addr = sum;
- else
- addr = base;
-
- /* The address must be aligned on a 8 byte boundary. */
- if (addr & 0x7)
- {
-#ifdef ABORTS
- ARMul_DATAABORT (addr);
-#else
- ARMul_UndefInstr (state, instr);
-#endif
- return;
- }
-
- /* For pre indexed or post indexed addressing modes,
- check that the destination registers do not overlap
- the address registers. */
- if ((! pre_indexed || write_back)
- && ( addr_reg == dest_reg
- || addr_reg == dest_reg + 1))
- {
- ARMul_UndefInstr (state, instr);
- return;
- }
-
- /* Load the words. */
- value1 = ARMul_LoadWordN (state, addr);
- value2 = ARMul_LoadWordN (state, addr + 4);
-
- /* Check for data aborts. */
- if (state->Aborted)
- {
- TAKEABORT;
- return;
- }
-
- ARMul_Icycles (state, 2, 0L);
-
- /* Store the values. */
- state->Reg[dest_reg] = value1;
- state->Reg[dest_reg + 1] = value2;
-
- /* Do the post addressing and writeback. */
- if (! pre_indexed)
- addr = sum;
-
- if (! pre_indexed || write_back)
- state->Reg[addr_reg] = addr;
-}
-
-/***************************************************************************\
-* This function does the work of storing two words for a STRD instruction. *
-\***************************************************************************/
-
-static void
-Handle_Store_Double (ARMul_State * state, ARMword instr)
-{
- ARMword src_reg;
- ARMword addr_reg;
- ARMword write_back = BIT (21);
- ARMword immediate = BIT (22);
- ARMword add_to_base = BIT (23);
- ARMword pre_indexed = BIT (24);
- ARMword offset;
- ARMword addr;
- ARMword sum;
- ARMword base;
-
- BUSUSEDINCPCS;
-
- /* If the writeback bit is set, the pre-index bit must be clear. */
- if (write_back && ! pre_indexed)
- {
- ARMul_UndefInstr (state, instr);
- return;
- }
-
- /* Extract the base address register. */
- addr_reg = LHSReg;
-
- /* Base register cannot be PC. */
- if (addr_reg == 15)
- {
- ARMul_UndefInstr (state, instr);
- return;
- }
-
- /* Extract the source register. */
- src_reg = DESTReg;
-
- /* Source register must be even. */
- if (src_reg & 1)
- {
- ARMul_UndefInstr (state, instr);
- return;
- }
-
- /* Compute the base address. */
- base = state->Reg[addr_reg];
-
- /* Compute the offset. */
- offset = immediate ? ((BITS (8, 11) << 4) | BITS (0, 3)) : state->Reg[RHSReg];
-
- /* Compute the sum of the two. */
- if (add_to_base)
- sum = base + offset;
- else
- sum = base - offset;
-
- /* If this is a pre-indexed mode use the sum. */
- if (pre_indexed)
- addr = sum;
- else
- addr = base;
-
- /* The address must be aligned on a 8 byte boundary. */
- if (addr & 0x7)
- {
-#ifdef ABORTS
- ARMul_DATAABORT (addr);
-#else
- ARMul_UndefInstr (state, instr);
-#endif
- return;
- }
-
- /* For pre indexed or post indexed addressing modes,
- check that the destination registers do not overlap
- the address registers. */
- if ((! pre_indexed || write_back)
- && ( addr_reg == src_reg
- || addr_reg == src_reg + 1))
- {
- ARMul_UndefInstr (state, instr);
- return;
- }
-
- /* Load the words. */
- ARMul_StoreWordN (state, addr, state->Reg[src_reg]);
- ARMul_StoreWordN (state, addr + 4, state->Reg[src_reg + 1]);
-
- if (state->Aborted)
- {
- TAKEABORT;
- return;
- }
-
- /* Do the post addressing and writeback. */
- if (! pre_indexed)
- addr = sum;
-
- if (! pre_indexed || write_back)
- state->Reg[addr_reg] = addr;
-}
-
-/***************************************************************************\
-* This function does the work of storing a word from a STR instruction. *
-\***************************************************************************/
-
-static unsigned
-StoreWord (ARMul_State * state, ARMword instr, ARMword address)
-{
- BUSUSEDINCPCN;
-#ifndef MODE32
- if (DESTReg == 15)
- state->Reg[15] = ECC | ER15INT | R15PC | EMODE;
-#endif
-#ifdef MODE32
- ARMul_StoreWordN (state, address, DEST);
-#else
- if (VECTORACCESS (address) || ADDREXCEPT (address))
- {
- INTERNALABORT (address);
- (void) ARMul_LoadWordN (state, address);
- }
- else
- ARMul_StoreWordN (state, address, DEST);
-#endif
- if (state->Aborted)
- {
- TAKEABORT;
- return (state->lateabtSig);
- }
- return (TRUE);
-}
-
-#ifdef MODET
-/***************************************************************************\
-* This function does the work of storing a byte for a STRH instruction. *
-\***************************************************************************/
-
-static unsigned
-StoreHalfWord (ARMul_State * state, ARMword instr, ARMword address)
-{
- BUSUSEDINCPCN;
-
-#ifndef MODE32
- if (DESTReg == 15)
- state->Reg[15] = ECC | ER15INT | R15PC | EMODE;
-#endif
-
-#ifdef MODE32
- ARMul_StoreHalfWord (state, address, DEST);
-#else
- if (VECTORACCESS (address) || ADDREXCEPT (address))
- {
- INTERNALABORT (address);
- (void) ARMul_LoadHalfWord (state, address);
- }
- else
- ARMul_StoreHalfWord (state, address, DEST);
-#endif
-
- if (state->Aborted)
- {
- TAKEABORT;
- return (state->lateabtSig);
- }
-
- return (TRUE);
-}
-
-#endif /* MODET */
-
-/***************************************************************************\
-* This function does the work of storing a byte for a STRB instruction. *
-\***************************************************************************/
-
-static unsigned
-StoreByte (ARMul_State * state, ARMword instr, ARMword address)
-{
- BUSUSEDINCPCN;
-#ifndef MODE32
- if (DESTReg == 15)
- state->Reg[15] = ECC | ER15INT | R15PC | EMODE;
-#endif
-#ifdef MODE32
- ARMul_StoreByte (state, address, DEST);
-#else
- if (VECTORACCESS (address) || ADDREXCEPT (address))
- {
- INTERNALABORT (address);
- (void) ARMul_LoadByte (state, address);
- }
- else
- ARMul_StoreByte (state, address, DEST);
-#endif
- if (state->Aborted)
- {
- TAKEABORT;
- return (state->lateabtSig);
- }
- UNDEF_LSRBPC;
- return (TRUE);
-}
-
-/***************************************************************************\
-* This function does the work of loading the registers listed in an LDM *
-* instruction, when the S bit is clear. The code here is always increment *
-* after, it's up to the caller to get the input address correct and to *
-* handle base register modification. *
-\***************************************************************************/
-
-static void
-LoadMult (ARMul_State * state, ARMword instr, ARMword address, ARMword WBBase)
-{
- ARMword dest, temp;
-
- UNDEF_LSMNoRegs;
- UNDEF_LSMPCBase;
- UNDEF_LSMBaseInListWb;
- BUSUSEDINCPCS;
-#ifndef MODE32
- if (ADDREXCEPT (address))
- {
- INTERNALABORT (address);
- }
-#endif
- if (BIT (21) && LHSReg != 15)
- LSBase = WBBase;
-
- for (temp = 0; !BIT (temp); temp++); /* N cycle first */
- dest = ARMul_LoadWordN (state, address);
- if (!state->abortSig && !state->Aborted)
- state->Reg[temp++] = dest;
- else if (!state->Aborted)
- {
- XScale_set_fsr_far(state, ARMul_CP15_R5_ST_ALIGN, address);
- state->Aborted = ARMul_DataAbortV;
- }
-
- for (; temp < 16; temp++) /* S cycles from here on */
- if (BIT (temp))
- { /* load this register */
- address += 4;
- dest = ARMul_LoadWordS (state, address);
- if (!state->abortSig && !state->Aborted)
- state->Reg[temp] = dest;
- else if (!state->Aborted)
- {
- XScale_set_fsr_far(state, ARMul_CP15_R5_ST_ALIGN, address);
- state->Aborted = ARMul_DataAbortV;
- }
- }
-
- if (BIT (15) && !state->Aborted)
- { /* PC is in the reg list */
- WriteR15Branch(state, PC);
- }
-
- ARMul_Icycles (state, 1, 0L); /* to write back the final register */
-
- if (state->Aborted)
- {
- if (BIT (21) && LHSReg != 15)
- LSBase = WBBase;
- TAKEABORT;
- }
-}
-
-/***************************************************************************\
-* This function does the work of loading the registers listed in an LDM *
-* instruction, when the S bit is set. The code here is always increment *
-* after, it's up to the caller to get the input address correct and to *
-* handle base register modification. *
-\***************************************************************************/
-
-static void
-LoadSMult (ARMul_State * state,
- ARMword instr,
- ARMword address,
- ARMword WBBase)
-{
- ARMword dest, temp;
-
- UNDEF_LSMNoRegs;
- UNDEF_LSMPCBase;
- UNDEF_LSMBaseInListWb;
-
- BUSUSEDINCPCS;
-
-#ifndef MODE32
- if (ADDREXCEPT (address))
- {
- INTERNALABORT (address);
- }
-#endif
-
- if (BIT (21) && LHSReg != 15)
- LSBase = WBBase;
-
- if (!BIT (15) && state->Bank != USERBANK)
- {
- /* Temporary reg bank switch. */
- (void) ARMul_SwitchMode (state, state->Mode, USER26MODE);
- UNDEF_LSMUserBankWb;
- }
-
- for (temp = 0; !BIT (temp); temp ++)
- ; /* N cycle first. */
-
- dest = ARMul_LoadWordN (state, address);
-
- if (!state->abortSig)
- state->Reg[temp++] = dest;
- else if (!state->Aborted)
- {
- XScale_set_fsr_far(state, ARMul_CP15_R5_ST_ALIGN, address);
- state->Aborted = ARMul_DataAbortV;
- }
-
- for (; temp < 16; temp++)
- /* S cycles from here on. */
- if (BIT (temp))
- {
- /* Load this register. */
- address += 4;
- dest = ARMul_LoadWordS (state, address);
-
- if (!state->abortSig && !state->Aborted)
- state->Reg[temp] = dest;
- else if (!state->Aborted)
- {
- XScale_set_fsr_far(state, ARMul_CP15_R5_ST_ALIGN, address);
- state->Aborted = ARMul_DataAbortV;
- }
- }
-
- if (BIT (15) && !state->Aborted)
- {
- /* PC is in the reg list. */
-#ifdef MODE32
- if (state->Mode != USER26MODE && state->Mode != USER32MODE)
- {
- state->Cpsr = GETSPSR (state->Bank);
- ARMul_CPSRAltered (state);
- }
-
- WriteR15 (state, PC);
-#else
- if (state->Mode == USER26MODE || state->Mode == USER32MODE)
- {
- /* Protect bits in user mode. */
- ASSIGNN ((state->Reg[15] & NBIT) != 0);
- ASSIGNZ ((state->Reg[15] & ZBIT) != 0);
- ASSIGNC ((state->Reg[15] & CBIT) != 0);
- ASSIGNV ((state->Reg[15] & VBIT) != 0);
- }
- else
- ARMul_R15Altered (state);
-
- FLUSHPIPE;
-#endif
- }
-
- if (!BIT (15) && state->Mode != USER26MODE && state->Mode != USER32MODE)
- /* Restore the correct bank. */
- (void) ARMul_SwitchMode (state, USER26MODE, state->Mode);
-
- /* To write back the final register. */
- ARMul_Icycles (state, 1, 0L);
-
- if (state->Aborted)
- {
- if (BIT (21) && LHSReg != 15)
- LSBase = WBBase;
-
- TAKEABORT;
- }
-}
-
-/***************************************************************************\
-* This function does the work of storing the registers listed in an STM *
-* instruction, when the S bit is clear. The code here is always increment *
-* after, it's up to the caller to get the input address correct and to *
-* handle base register modification. *
-\***************************************************************************/
-
-static void
-StoreMult (ARMul_State * state, ARMword instr,
- ARMword address, ARMword WBBase)
-{
- ARMword temp;
-
- UNDEF_LSMNoRegs;
- UNDEF_LSMPCBase;
- UNDEF_LSMBaseInListWb;
- if (!TFLAG)
- {
- BUSUSEDINCPCN; /* N-cycle, increment the PC and update the NextInstr state */
- }
-
-#ifndef MODE32
- if (VECTORACCESS (address) || ADDREXCEPT (address))
- {
- INTERNALABORT (address);
- }
- if (BIT (15))
- PATCHR15;
-#endif
-
- for (temp = 0; !BIT (temp); temp++); /* N cycle first */
-#ifdef MODE32
- ARMul_StoreWordN (state, address, state->Reg[temp++]);
-#else
- if (state->Aborted)
- {
- (void) ARMul_LoadWordN (state, address);
- for (; temp < 16; temp++) /* Fake the Stores as Loads */
- if (BIT (temp))
- { /* save this register */
- address += 4;
- (void) ARMul_LoadWordS (state, address);
- }
- if (BIT (21) && LHSReg != 15)
- LSBase = WBBase;
- TAKEABORT;
- return;
- }
- else
- ARMul_StoreWordN (state, address, state->Reg[temp++]);
-#endif
-
- if (state->abortSig && !state->Aborted)
- {
- XScale_set_fsr_far(state, ARMul_CP15_R5_ST_ALIGN, address);
- state->Aborted = ARMul_DataAbortV;
- }
-
- if (BIT (21) && LHSReg != 15)
- LSBase = WBBase;
-
- for (; temp < 16; temp++) /* S cycles from here on */
- if (BIT (temp))
- { /* save this register */
- address += 4;
-
- ARMul_StoreWordS (state, address, state->Reg[temp]);
-
- if (state->abortSig && !state->Aborted)
- {
- XScale_set_fsr_far(state, ARMul_CP15_R5_ST_ALIGN, address);
- state->Aborted = ARMul_DataAbortV;
- }
- }
-
- if (state->Aborted)
- {
- TAKEABORT;
- }
-}
-
-/***************************************************************************\
-* This function does the work of storing the registers listed in an STM *
-* instruction when the S bit is set. The code here is always increment *
-* after, it's up to the caller to get the input address correct and to *
-* handle base register modification. *
-\***************************************************************************/
-
-static void
-StoreSMult (ARMul_State * state,
- ARMword instr,
- ARMword address,
- ARMword WBBase)
-{
- ARMword temp;
-
- UNDEF_LSMNoRegs;
- UNDEF_LSMPCBase;
- UNDEF_LSMBaseInListWb;
-
- BUSUSEDINCPCN;
-
-#ifndef MODE32
- if (VECTORACCESS (address) || ADDREXCEPT (address))
- {
- INTERNALABORT (address);
- }
-
- if (BIT (15))
- PATCHR15;
-#endif
-
- if (state->Bank != USERBANK)
- {
- /* Force User Bank. */
- (void) ARMul_SwitchMode (state, state->Mode, USER26MODE);
- UNDEF_LSMUserBankWb;
- }
-
- for (temp = 0; !BIT (temp); temp++)
- ; /* N cycle first. */
-
-#ifdef MODE32
- ARMul_StoreWordN (state, address, state->Reg[temp++]);
-#else
- if (state->Aborted)
- {
- (void) ARMul_LoadWordN (state, address);
-
- for (; temp < 16; temp++)
- /* Fake the Stores as Loads. */
- if (BIT (temp))
- {
- /* Save this register. */
- address += 4;
-
- (void) ARMul_LoadWordS (state, address);
- }
-
- if (BIT (21) && LHSReg != 15)
- LSBase = WBBase;
-
- TAKEABORT;
-
- return;
- }
- else
- ARMul_StoreWordN (state, address, state->Reg[temp++]);
-#endif
-
- if (state->abortSig && !state->Aborted)
- {
- XScale_set_fsr_far(state, ARMul_CP15_R5_ST_ALIGN, address);
- state->Aborted = ARMul_DataAbortV;
- }
-
- for (; temp < 16; temp++)
- /* S cycles from here on. */
- if (BIT (temp))
- {
- /* Save this register. */
- address += 4;
-
- ARMul_StoreWordS (state, address, state->Reg[temp]);
-
- if (state->abortSig && !state->Aborted)
- {
- XScale_set_fsr_far(state, ARMul_CP15_R5_ST_ALIGN, address);
- state->Aborted = ARMul_DataAbortV;
- }
- }
-
- if (state->Mode != USER26MODE && state->Mode != USER32MODE)
- /* Restore the correct bank. */
- (void) ARMul_SwitchMode (state, USER26MODE, state->Mode);
-
- if (BIT (21) && LHSReg != 15)
- LSBase = WBBase;
-
- if (state->Aborted)
- {
- TAKEABORT;
- }
-}
-
-/***************************************************************************\
-* This function does the work of adding two 32bit values together, and *
-* calculating if a carry has occurred. *
-\***************************************************************************/
-
-static ARMword
-Add32 (ARMword a1, ARMword a2, int *carry)
-{
- ARMword result = (a1 + a2);
- unsigned int uresult = (unsigned int) result;
- unsigned int ua1 = (unsigned int) a1;
-
- /* If (result == RdLo) and (state->Reg[nRdLo] == 0),
- or (result > RdLo) then we have no carry: */
- if ((uresult == ua1) ? (a2 != 0) : (uresult < ua1))
- *carry = 1;
- else
- *carry = 0;
-
- return (result);
-}
-
-/***************************************************************************\
-* This function does the work of multiplying two 32bit values to give a *
-* 64bit result. *
-\***************************************************************************/
-
-static unsigned
-Multiply64 (ARMul_State * state, ARMword instr, int msigned, int scc)
-{
- int nRdHi, nRdLo, nRs, nRm; /* operand register numbers */
- ARMword RdHi = 0, RdLo = 0, Rm;
- int scount; /* cycle count */
-
- nRdHi = BITS (16, 19);
- nRdLo = BITS (12, 15);
- nRs = BITS (8, 11);
- nRm = BITS (0, 3);
-
- /* Needed to calculate the cycle count: */
- Rm = state->Reg[nRm];
-
- /* Check for illegal operand combinations first: */
- if (nRdHi != 15
- && nRdLo != 15
- && nRs != 15
- && nRm != 15 && nRdHi != nRdLo && nRdHi != nRm && nRdLo != nRm)
- {
- ARMword lo, mid1, mid2, hi; /* intermediate results */
- int carry;
- ARMword Rs = state->Reg[nRs];
- int sign = 0;
-
- if (msigned)
- {
- /* Compute sign of result and adjust operands if necessary. */
-
- sign = (Rm ^ Rs) & 0x80000000;
-
- if (((signed long) Rm) < 0)
- Rm = -Rm;
-
- if (((signed long) Rs) < 0)
- Rs = -Rs;
- }
-
- /* We can split the 32x32 into four 16x16 operations. This ensures
- that we do not lose precision on 32bit only hosts: */
- lo = ((Rs & 0xFFFF) * (Rm & 0xFFFF));
- mid1 = ((Rs & 0xFFFF) * ((Rm >> 16) & 0xFFFF));
- mid2 = (((Rs >> 16) & 0xFFFF) * (Rm & 0xFFFF));
- hi = (((Rs >> 16) & 0xFFFF) * ((Rm >> 16) & 0xFFFF));
-
- /* We now need to add all of these results together, taking care
- to propogate the carries from the additions: */
- RdLo = Add32 (lo, (mid1 << 16), &carry);
- RdHi = carry;
- RdLo = Add32 (RdLo, (mid2 << 16), &carry);
- RdHi +=
- (carry + ((mid1 >> 16) & 0xFFFF) + ((mid2 >> 16) & 0xFFFF) + hi);
-
- if (sign)
- {
- /* Negate result if necessary. */
-
- RdLo = ~RdLo;
- RdHi = ~RdHi;
- if (RdLo == 0xFFFFFFFF)
- {
- RdLo = 0;
- RdHi += 1;
- }
- else
- RdLo += 1;
- }
-
- state->Reg[nRdLo] = RdLo;
- state->Reg[nRdHi] = RdHi;
- } /* else undefined result */
- else
- fprintf (stderr, "sim: MULTIPLY64 - INVALID ARGUMENTS\n");
-
- if (scc)
- {
- /* Ensure that both RdHi and RdLo are used to compute Z, but
- don't let RdLo's sign bit make it to N. */
- ARMul_NegZero (state, RdHi | (RdLo >> 16) | (RdLo & 0xFFFF));
- }
-
- /* The cycle count depends on whether the instruction is a signed or
- unsigned multiply, and what bits are clear in the multiplier: */
- if (msigned && (Rm & ((unsigned) 1 << 31)))
- Rm = ~Rm; /* invert the bits to make the check against zero */
-
- if ((Rm & 0xFFFFFF00) == 0)
- scount = 1;
- else if ((Rm & 0xFFFF0000) == 0)
- scount = 2;
- else if ((Rm & 0xFF000000) == 0)
- scount = 3;
- else
- scount = 4;
-
- return 2 + scount;
-}
-
-/***************************************************************************\
-* This function does the work of multiplying two 32bit values and adding *
-* a 64bit value to give a 64bit result. *
-\***************************************************************************/
-
-static unsigned
-MultiplyAdd64 (ARMul_State * state, ARMword instr, int msigned, int scc)
-{
- unsigned scount;
- ARMword RdLo, RdHi;
- int nRdHi, nRdLo;
- int carry = 0;
-
- nRdHi = BITS (16, 19);
- nRdLo = BITS (12, 15);
-
- RdHi = state->Reg[nRdHi];
- RdLo = state->Reg[nRdLo];
-
- scount = Multiply64 (state, instr, msigned, LDEFAULT);
-
- RdLo = Add32 (RdLo, state->Reg[nRdLo], &carry);
- RdHi = (RdHi + state->Reg[nRdHi]) + carry;
-
- state->Reg[nRdLo] = RdLo;
- state->Reg[nRdHi] = RdHi;
-
- if (scc)
- {
- /* Ensure that both RdHi and RdLo are used to compute Z, but
- don't let RdLo's sign bit make it to N. */
- ARMul_NegZero (state, RdHi | (RdLo >> 16) | (RdLo & 0xFFFF));
- }
-
- return scount + 1; /* extra cycle for addition */
-}
diff --git a/sim/arm/armemu.h b/sim/arm/armemu.h
deleted file mode 100644
index 009e9c8771a..00000000000
--- a/sim/arm/armemu.h
+++ /dev/null
@@ -1,496 +0,0 @@
-/* armemu.h -- ARMulator emulation macros: ARM6 Instruction Emulator.
- Copyright (C) 1994 Advanced RISC Machines Ltd.
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
-
-extern ARMword isize;
-
-/***************************************************************************\
-* Condition code values *
-\***************************************************************************/
-
-#define EQ 0
-#define NE 1
-#define CS 2
-#define CC 3
-#define MI 4
-#define PL 5
-#define VS 6
-#define VC 7
-#define HI 8
-#define LS 9
-#define GE 10
-#define LT 11
-#define GT 12
-#define LE 13
-#define AL 14
-#define NV 15
-
-/***************************************************************************\
-* Shift Opcodes *
-\***************************************************************************/
-
-#define LSL 0
-#define LSR 1
-#define ASR 2
-#define ROR 3
-
-/***************************************************************************\
-* Macros to twiddle the status flags and mode *
-\***************************************************************************/
-
-#define NBIT ((unsigned)1L << 31)
-#define ZBIT (1L << 30)
-#define CBIT (1L << 29)
-#define VBIT (1L << 28)
-#define SBIT (1L << 27)
-#define IBIT (1L << 7)
-#define FBIT (1L << 6)
-#define IFBITS (3L << 6)
-#define R15IBIT (1L << 27)
-#define R15FBIT (1L << 26)
-#define R15IFBITS (3L << 26)
-
-#define POS(i) ( (~(i)) >> 31 )
-#define NEG(i) ( (i) >> 31 )
-
-#ifdef MODET /* Thumb support */
-/* ??? This bit is actually in the low order bit of the PC in the hardware.
- It isn't clear if the simulator needs to model that or not. */
-#define TBIT (1L << 5)
-#define TFLAG state->TFlag
-#define SETT state->TFlag = 1
-#define CLEART state->TFlag = 0
-#define ASSIGNT(res) state->TFlag = res
-#define INSN_SIZE (TFLAG ? 2 : 4)
-#else
-#define INSN_SIZE 4
-#endif
-
-#define NFLAG state->NFlag
-#define SETN state->NFlag = 1
-#define CLEARN state->NFlag = 0
-#define ASSIGNN(res) state->NFlag = res
-
-#define ZFLAG state->ZFlag
-#define SETZ state->ZFlag = 1
-#define CLEARZ state->ZFlag = 0
-#define ASSIGNZ(res) state->ZFlag = res
-
-#define CFLAG state->CFlag
-#define SETC state->CFlag = 1
-#define CLEARC state->CFlag = 0
-#define ASSIGNC(res) state->CFlag = res
-
-#define VFLAG state->VFlag
-#define SETV state->VFlag = 1
-#define CLEARV state->VFlag = 0
-#define ASSIGNV(res) state->VFlag = res
-
-#define SFLAG state->SFlag
-#define SETS state->SFlag = 1
-#define CLEARS state->SFlag = 0
-#define ASSIGNS(res) state->SFlag = res
-
-#define IFLAG (state->IFFlags >> 1)
-#define FFLAG (state->IFFlags & 1)
-#define IFFLAGS state->IFFlags
-#define ASSIGNINT(res) state->IFFlags = (((res) >> 6) & 3)
-#define ASSIGNR15INT(res) state->IFFlags = (((res) >> 26) & 3) ;
-
-#define PSR_FBITS (0xff000000L)
-#define PSR_SBITS (0x00ff0000L)
-#define PSR_XBITS (0x0000ff00L)
-#define PSR_CBITS (0x000000ffL)
-
-#if defined MODE32 || defined MODET
-#define CCBITS (0xf8000000L)
-#else
-#define CCBITS (0xf0000000L)
-#endif
-
-#define INTBITS (0xc0L)
-
-#if defined MODET && defined MODE32
-#define PCBITS (0xffffffffL)
-#else
-#define PCBITS (0xfffffffcL)
-#endif
-
-#define MODEBITS (0x1fL)
-#define R15INTBITS (3L << 26)
-
-#if defined MODET && defined MODE32
-#define R15PCBITS (0x03ffffffL)
-#else
-#define R15PCBITS (0x03fffffcL)
-#endif
-
-#define R15PCMODEBITS (0x03ffffffL)
-#define R15MODEBITS (0x3L)
-
-#ifdef MODE32
-#define PCMASK PCBITS
-#define PCWRAP(pc) (pc)
-#else
-#define PCMASK R15PCBITS
-#define PCWRAP(pc) ((pc) & R15PCBITS)
-#endif
-
-#define PC (state->Reg[15] & PCMASK)
-#define R15CCINTMODE (state->Reg[15] & (CCBITS | R15INTBITS | R15MODEBITS))
-#define R15INT (state->Reg[15] & R15INTBITS)
-#define R15INTPC (state->Reg[15] & (R15INTBITS | R15PCBITS))
-#define R15INTPCMODE (state->Reg[15] & (R15INTBITS | R15PCBITS | R15MODEBITS))
-#define R15INTMODE (state->Reg[15] & (R15INTBITS | R15MODEBITS))
-#define R15PC (state->Reg[15] & R15PCBITS)
-#define R15PCMODE (state->Reg[15] & (R15PCBITS | R15MODEBITS))
-#define R15MODE (state->Reg[15] & R15MODEBITS)
-
-#define ECC ((NFLAG << 31) | (ZFLAG << 30) | (CFLAG << 29) | (VFLAG << 28) | (SFLAG << 27))
-#define EINT (IFFLAGS << 6)
-#define ER15INT (IFFLAGS << 26)
-#define EMODE (state->Mode)
-
-#ifdef MODET
-#define CPSR (ECC | EINT | EMODE | (TFLAG << 5))
-#else
-#define CPSR (ECC | EINT | EMODE)
-#endif
-
-#ifdef MODE32
-#define PATCHR15
-#else
-#define PATCHR15 state->Reg[15] = ECC | ER15INT | EMODE | R15PC
-#endif
-
-#define GETSPSR(bank) (ARMul_GetSPSR (state, EMODE))
-#define SETPSR_F(d,s) d = ((d) & ~PSR_FBITS) | ((s) & PSR_FBITS)
-#define SETPSR_S(d,s) d = ((d) & ~PSR_SBITS) | ((s) & PSR_SBITS)
-#define SETPSR_X(d,s) d = ((d) & ~PSR_XBITS) | ((s) & PSR_XBITS)
-#define SETPSR_C(d,s) d = ((d) & ~PSR_CBITS) | ((s) & PSR_CBITS)
-#define SETR15PSR(s) if (state->Mode == USER26MODE) { \
- state->Reg[15] = ((s) & CCBITS) | R15PC | ER15INT | EMODE ; \
- ASSIGNN((state->Reg[15] & NBIT) != 0) ; \
- ASSIGNZ((state->Reg[15] & ZBIT) != 0) ; \
- ASSIGNC((state->Reg[15] & CBIT) != 0) ; \
- ASSIGNV((state->Reg[15] & VBIT) != 0) ; \
- } \
- else { \
- state->Reg[15] = R15PC | ((s) & (CCBITS | R15INTBITS | R15MODEBITS)) ; \
- ARMul_R15Altered (state) ; \
- }
-#define SETABORT(i,m,d) do { \
- int SETABORT_mode = (m); \
- ARMul_SetSPSR (state, SETABORT_mode, ARMul_GetCPSR (state)); \
- ARMul_SetCPSR (state, ((ARMul_GetCPSR (state) & ~(EMODE | TBIT)) \
- | (i) | SETABORT_mode)); \
- state->Reg[14] = temp - (d); \
-} while (0)
-
-#ifndef MODE32
-#define VECTORS 0x20
-#define LEGALADDR 0x03ffffff
-#define VECTORACCESS(address) (address < VECTORS && ARMul_MODE26BIT && state->prog32Sig)
-#define ADDREXCEPT(address) (address > LEGALADDR && !state->data32Sig)
-#endif
-
-#define INTERNALABORT(address) if (address < VECTORS) \
- state->Aborted = ARMul_DataAbortV ; \
- else \
- state->Aborted = ARMul_AddrExceptnV ;
-
-#ifdef MODE32
-#define TAKEABORT ARMul_Abort(state,ARMul_DataAbortV)
-#else
-#define TAKEABORT if (state->Aborted == ARMul_AddrExceptnV) \
- ARMul_Abort(state,ARMul_AddrExceptnV) ; \
- else \
- ARMul_Abort(state,ARMul_DataAbortV)
-#endif
-#define CPTAKEABORT if (!state->Aborted) \
- ARMul_Abort(state,ARMul_UndefinedInstrV) ; \
- else if (state->Aborted == ARMul_AddrExceptnV) \
- ARMul_Abort(state,ARMul_AddrExceptnV) ; \
- else \
- ARMul_Abort(state,ARMul_DataAbortV)
-
-
-/***************************************************************************\
-* Different ways to start the next instruction *
-\***************************************************************************/
-
-#define SEQ 0
-#define NONSEQ 1
-#define PCINCEDSEQ 2
-#define PCINCEDNONSEQ 3
-#define PRIMEPIPE 4
-#define RESUME 8
-
-#define NORMALCYCLE state->NextInstr = 0
-#define BUSUSEDN state->NextInstr |= 1 /* The next fetch will be an N cycle. */
-#define BUSUSEDINCPCS \
- do \
- { \
- if (! state->is_v4) \
- { \
- state->Reg[15] += isize ; /* A standard PC inc and an S cycle. */ \
- state->NextInstr = (state->NextInstr & 0xff) | 2; \
- } \
- } \
- while (0)
-#define BUSUSEDINCPCN \
- do \
- { \
- if (state->is_v4) \
- BUSUSEDN; \
- else \
- { \
- state->Reg[15] += isize ; /* A standard PC inc and an N cycle. */ \
- state->NextInstr |= 3; \
- } \
- } \
- while (0)
-#define INCPC state->Reg[15] += isize ; /* a standard PC inc */ \
- state->NextInstr |= 2
-#define FLUSHPIPE state->NextInstr |= PRIMEPIPE
-
-/***************************************************************************\
-* Cycle based emulation *
-\***************************************************************************/
-
-#define OUTPUTCP(i,a,b)
-#define NCYCLE
-#define SCYCLE
-#define ICYCLE
-#define CCYCLE
-#define NEXTCYCLE(c)
-
-/***************************************************************************\
-* States of the cycle based state machine *
-\***************************************************************************/
-
-
-/***************************************************************************\
-* Macros to extract parts of instructions *
-\***************************************************************************/
-
-#define DESTReg (BITS(12,15))
-#define LHSReg (BITS(16,19))
-#define RHSReg (BITS(0,3))
-
-#define DEST (state->Reg[DESTReg])
-
-#ifdef MODE32
-#ifdef MODET
-#define LHS ((LHSReg == 15) ? (state->Reg[15] & 0xFFFFFFFC): (state->Reg[LHSReg]))
-#else
-#define LHS (state->Reg[LHSReg])
-#endif
-#else
-#define LHS ((LHSReg == 15) ? R15PC : (state->Reg[LHSReg]) )
-#endif
-
-#define MULDESTReg (BITS(16,19))
-#define MULLHSReg (BITS(0,3))
-#define MULRHSReg (BITS(8,11))
-#define MULACCReg (BITS(12,15))
-
-#define DPImmRHS (ARMul_ImmedTable[BITS(0,11)])
-#define DPSImmRHS temp = BITS(0,11) ; \
- rhs = ARMul_ImmedTable[temp] ; \
- if (temp > 255) /* there was a shift */ \
- ASSIGNC(rhs >> 31) ;
-
-#ifdef MODE32
-#define DPRegRHS ((BITS(4,11)==0) ? state->Reg[RHSReg] \
- : GetDPRegRHS(state, instr))
-#define DPSRegRHS ((BITS(4,11)==0) ? state->Reg[RHSReg] \
- : GetDPSRegRHS(state, instr))
-#else
-#define DPRegRHS ((BITS(0,11)<15) ? state->Reg[RHSReg] \
- : GetDPRegRHS(state, instr))
-#define DPSRegRHS ((BITS(0,11)<15) ? state->Reg[RHSReg] \
- : GetDPSRegRHS(state, instr))
-#endif
-
-#define LSBase state->Reg[LHSReg]
-#define LSImmRHS (BITS(0,11))
-
-#ifdef MODE32
-#define LSRegRHS ((BITS(4,11)==0) ? state->Reg[RHSReg] \
- : GetLSRegRHS(state, instr))
-#else
-#define LSRegRHS ((BITS(0,11)<15) ? state->Reg[RHSReg] \
- : GetLSRegRHS(state, instr))
-#endif
-
-#define LSMNumRegs ((ARMword)ARMul_BitList[BITS(0,7)] + \
- (ARMword)ARMul_BitList[BITS(8,15)] )
-#define LSMBaseFirst ((LHSReg == 0 && BIT(0)) || \
- (BIT(LHSReg) && BITS(0,LHSReg-1) == 0))
-
-#define SWAPSRC (state->Reg[RHSReg])
-
-#define LSCOff (BITS(0,7) << 2)
-#define CPNum BITS(8,11)
-
-/***************************************************************************\
-* Macro to rotate n right by b bits *
-\***************************************************************************/
-
-#define ROTATER(n,b) (((n)>>(b))|((n)<<(32-(b))))
-
-/***************************************************************************\
-* Macros to store results of instructions *
-\***************************************************************************/
-
-#define WRITEDEST(d) if (DESTReg==15) \
- WriteR15(state, d) ; \
- else \
- DEST = d
-
-#define WRITESDEST(d) if (DESTReg == 15) \
- WriteSR15(state, d) ; \
- else { \
- DEST = d ; \
- ARMul_NegZero(state, d) ; \
- }
-
-#define WRITEDESTB(d) if (DESTReg == 15) \
- WriteR15Branch(state, d) ; \
- else \
- DEST = d
-
-#define BYTETOBUS(data) ((data & 0xff) | \
- ((data & 0xff) << 8) | \
- ((data & 0xff) << 16) | \
- ((data & 0xff) << 24))
-#define BUSTOBYTE(address,data) \
- if (state->bigendSig) \
- temp = (data >> (((address ^ 3) & 3) << 3)) & 0xff ; \
- else \
- temp = (data >> ((address & 3) << 3)) & 0xff
-
-#define LOADMULT(instr,address,wb) LoadMult(state,instr,address,wb)
-#define LOADSMULT(instr,address,wb) LoadSMult(state,instr,address,wb)
-#define STOREMULT(instr,address,wb) StoreMult(state,instr,address,wb)
-#define STORESMULT(instr,address,wb) StoreSMult(state,instr,address,wb)
-
-#define POSBRANCH ((instr & 0x7fffff) << 2)
-#define NEGBRANCH ((0xff000000 |(instr & 0xffffff)) << 2)
-
-
-/***************************************************************************\
-* Values for Emulate *
-\***************************************************************************/
-
-#define STOP 0 /* stop */
-#define CHANGEMODE 1 /* change mode */
-#define ONCE 2 /* execute just one interation */
-#define RUN 3 /* continuous execution */
-
-/***************************************************************************\
-* Stuff that is shared across modes *
-\***************************************************************************/
-
-extern ARMword ARMul_Emulate26 (ARMul_State * state);
-extern ARMword ARMul_Emulate32 (ARMul_State * state);
-extern unsigned ARMul_MultTable[]; /* Number of I cycles for a mult */
-extern ARMword ARMul_ImmedTable[]; /* immediate DP LHS values */
-extern char ARMul_BitList[]; /* number of bits in a byte table */
-extern void ARMul_Abort26 (ARMul_State * state, ARMword);
-extern void ARMul_Abort32 (ARMul_State * state, ARMword);
-extern unsigned ARMul_NthReg (ARMword instr, unsigned number);
-extern void ARMul_MSRCpsr (ARMul_State * state, ARMword instr, ARMword rhs);
-extern void ARMul_NegZero (ARMul_State * state, ARMword result);
-extern void ARMul_AddCarry (ARMul_State * state, ARMword a, ARMword b,
- ARMword result);
-extern int AddOverflow (ARMword a, ARMword b, ARMword result);
-extern int SubOverflow (ARMword a, ARMword b, ARMword result);
-extern void ARMul_AddOverflow (ARMul_State * state, ARMword a, ARMword b,
- ARMword result);
-extern void ARMul_SubCarry (ARMul_State * state, ARMword a, ARMword b,
- ARMword result);
-extern void ARMul_SubOverflow (ARMul_State * state, ARMword a, ARMword b,
- ARMword result);
-extern void ARMul_CPSRAltered (ARMul_State * state);
-extern void ARMul_R15Altered (ARMul_State * state);
-extern ARMword ARMul_SwitchMode (ARMul_State * state, ARMword oldmode,
- ARMword newmode);
-extern unsigned ARMul_NthReg (ARMword instr, unsigned number);
-extern void ARMul_LDC (ARMul_State * state, ARMword instr, ARMword address);
-extern void ARMul_STC (ARMul_State * state, ARMword instr, ARMword address);
-extern void ARMul_MCR (ARMul_State * state, ARMword instr, ARMword source);
-extern ARMword ARMul_MRC (ARMul_State * state, ARMword instr);
-extern void ARMul_CDP (ARMul_State * state, ARMword instr);
-extern unsigned IntPending (ARMul_State * state);
-extern ARMword ARMul_Align (ARMul_State * state, ARMword address,
- ARMword data);
-#define EVENTLISTSIZE 1024L
-
-/* Thumb support: */
-
-typedef enum
-{
- t_undefined, /* undefined Thumb instruction */
- t_decoded, /* instruction decoded to ARM equivalent */
- t_branch /* Thumb branch (already processed) */
-}
-tdstate;
-
-extern tdstate ARMul_ThumbDecode (ARMul_State * state, ARMword pc,
- ARMword tinstr, ARMword * ainstr);
-
-/***************************************************************************\
-* Macros to scrutinize instructions *
-\***************************************************************************/
-
-
-#define UNDEF_Test
-#define UNDEF_Shift
-#define UNDEF_MSRPC
-#define UNDEF_MRSPC
-#define UNDEF_MULPCDest
-#define UNDEF_MULDestEQOp1
-#define UNDEF_LSRBPC
-#define UNDEF_LSRBaseEQOffWb
-#define UNDEF_LSRBaseEQDestWb
-#define UNDEF_LSRPCBaseWb
-#define UNDEF_LSRPCOffWb
-#define UNDEF_LSMNoRegs
-#define UNDEF_LSMPCBase
-#define UNDEF_LSMUserBankWb
-#define UNDEF_LSMBaseInListWb
-#define UNDEF_SWPPC
-#define UNDEF_CoProHS
-#define UNDEF_MCRPC
-#define UNDEF_LSCPCBaseWb
-#define UNDEF_UndefNotBounced
-#define UNDEF_ShortInt
-#define UNDEF_IllegalMode
-#define UNDEF_Prog32SigChange
-#define UNDEF_Data32SigChange
-
-/* Coprocessor support functions. */
-extern unsigned ARMul_CoProInit (ARMul_State *);
-extern void ARMul_CoProExit (ARMul_State *);
-extern void ARMul_CoProAttach (ARMul_State *, unsigned, ARMul_CPInits *, ARMul_CPExits *,
- ARMul_LDCs *, ARMul_STCs *, ARMul_MRCs *, ARMul_MCRs *,
- ARMul_CDPs *, ARMul_CPReads *, ARMul_CPWrites *);
-extern void ARMul_CoProDetach (ARMul_State *, unsigned);
-extern void write_cp15_reg (ARMul_State *, unsigned, unsigned, unsigned, ARMword);
-extern void write_cp14_reg (unsigned, ARMword);
-extern ARMword read_cp14_reg (unsigned);
diff --git a/sim/arm/armfpe.h b/sim/arm/armfpe.h
deleted file mode 100644
index 8093096e2f2..00000000000
--- a/sim/arm/armfpe.h
+++ /dev/null
@@ -1,1352 +0,0 @@
-/* armfpe.h -- ARMulator pre-compiled FPE: ARM6 Instruction Emulator.
- Copyright (C) 1994 Advanced RISC Machines Ltd.
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
-
-/* Array containing the Floating Point Emualtor (FPE). */
-
-
-unsigned long fpecode[] = {
- 0x00000000, 0x00000000, 0x00000000, 0x00000000,
- 0x00000000, 0x00000000, 0x00000000, 0x00000000,
- 0x00000000, 0x00000000, 0x00000000, 0x00000000,
- 0x00000000, 0x00000000, 0x00000000, 0x00000000,
- 0x00000000, 0x00000000, 0x00000000, 0x00000000,
- 0x00000000, 0x00000000, 0x00000000, 0x00000000,
- 0x00000000, 0x00000000, 0x00000000, 0x00000000,
- 0x00000000, 0x00000000, 0x00000000, 0x00000000,
- 0x00000000, 0x00000000, 0x00000000, 0x00000000,
- 0x00000000, 0x00000000, 0x00000000, 0x00000000,
- 0x00000000, 0x00000000, 0x00000000, 0x00000000,
- 0x00000000, 0x00000000, 0x00000000, 0x00000000,
- 0x00000000, 0x00000000, 0x00000000, 0x00000000,
- 0x00000000, 0x00000000, 0x00000000, 0x00000000,
- 0x00000000, 0x00000000, 0x00000000, 0x00000000,
- 0x00000000, 0x00000000, 0x00000000, 0x00000000,
- 0x00000000, 0x00000000, 0x00000000, 0x00000000,
- 0x00000000, 0x00000000, 0x00000000, 0x00000000,
- 0x00000000, 0x00000000, 0x00000000, 0x00000000,
- 0x00000000, 0x00000000, 0x00000000, 0x00000000,
- 0x00000000, 0x00000000, 0x00000000, 0x00000000,
- 0x00000000, 0x00000000, 0x00000000, 0x00000000,
- 0x00000000, 0x00000000, 0x00000000, 0x00000000,
- 0x00000000, 0x00000000, 0x00000000, 0x00000000,
- 0x00070000, 0x00000000, 0xe92d400e, 0xeb0013ef,
- 0xe28f00d4, 0xe1a00120, 0xe38004ea, 0xe3a01004,
- 0xe5912000, 0xe24f3028, 0xe1500002, 0x15832000,
- 0x15810000, 0xe3a00001, 0xe8bd800e, 0xe28d9040,
- 0xe1a0a00e, 0xe24f7048, 0xe597b000, 0xe20b74ee,
- 0xe14f8000, 0xe2088040, 0xe388809b, 0xe121f008,
- 0xe35704ea, 0x004bb007, 0x01a0b10b, 0x028bf00c,
- 0xe20b733b, 0xe3570339, 0x01a0ba0b, 0x01a0ba2b,
- 0x059bb00c, 0x0249800c, 0x08880e00, 0x0919ff80,
- 0xe24f7094, 0xe1a0f007, 0xe14f8000, 0xe2088040,
- 0xe3888093, 0xe121f008, 0xe8dd7fff, 0xe1a00000,
- 0xe28dd03c, 0xe8fd8000, 0xe14f8000, 0xe2088040,
- 0xe3888093, 0xe121f008, 0xe8bd1fff, 0xe28dd00c,
- 0xe1b0f00e, 0xe14f8000, 0xe2088040, 0xe3888093,
- 0xe121f008, 0xe28dd01c, 0xe8bd1f80, 0xe28dd00c,
- 0xe1b0f00e, 0x00002100, 0xe90d4007, 0xe14f0000,
- 0xe24d1010, 0xe10f2000, 0xe20220c0, 0xe3822003,
- 0xe121f002, 0xe169f000, 0xe8914007, 0xe24dd040,
- 0xe8cd7fff, 0xe24fcf6b, 0xe58de03c, 0xe24ea004,
- 0xe14f9000, 0xe20990c0, 0xe3899003, 0xe121f009,
- 0xe4ba9008, 0xe20987fe, 0xe2197010, 0xe0077aa9,
- 0xe0288a07, 0x02097402, 0x00077509, 0x00888007,
- 0xe2097c0f, 0xe3370c01, 0x0209733e, 0x0337033a,
- 0x008ff8a8, 0xea00009f, 0xea0003b7, 0xea0003b6,
- 0xea000307, 0xea000306, 0xea0003b3, 0xea0003b2,
- 0xea000303, 0xea000302, 0xea0003c3, 0xea0003c2,
- 0xea00030d, 0xea00030c, 0xea0003bf, 0xea0003be,
- 0xea000309, 0xea000308, 0xea0003cf, 0xea0003ce,
- 0xea000314, 0xea000313, 0xea0003cb, 0xea0003ca,
- 0xea000310, 0xea00030f, 0xea0003db, 0xea0003da,
- 0xea00031a, 0xea000319, 0xea0003d7, 0xea0003d6,
- 0xea000316, 0xea000315, 0xea0003e7, 0xea0003e6,
- 0xea000321, 0xea000320, 0xea0003f7, 0xea0003f6,
- 0xea00032b, 0xea00032a, 0xea000449, 0xea000448,
- 0xea000335, 0xea000334, 0xea000459, 0xea000458,
- 0xea000340, 0xea00033f, 0xea000469, 0xea000468,
- 0xea00034b, 0xea00034a, 0xea000479, 0xea000478,
- 0xea000355, 0xea000354, 0xea000489, 0xea000488,
- 0xea00035f, 0xea00035e, 0xea000499, 0xea000498,
- 0xea00036a, 0xea000369, 0xea000ac8, 0xea000ac5,
- 0xea000c3d, 0xea000c3a, 0xea000b7b, 0xea000b78,
- 0xea000b79, 0xea000b76, 0xea000d34, 0xea000d31,
- 0xea000d08, 0xea000d05, 0xea000e34, 0xea000e31,
- 0xea000e1c, 0xea000e19, 0xea000ecf, 0xea000ecc,
- 0xea000c2d, 0xea000c2a, 0xea000d28, 0xea000d25,
- 0xea000cfc, 0xea000cf9, 0xea00123d, 0xea00123a,
- 0xeaffff55, 0xeaffff54, 0xeaffff53, 0xeaffff52,
- 0xeaffff51, 0xeaffff50, 0xea0007b8, 0xea0007ec,
- 0xea00073c, 0xea00073b, 0xea000806, 0xea000805,
- 0xea00080f, 0xea00080e, 0xeaffff47, 0xeaffff46,
- 0xeaffff45, 0xeaffff44, 0xeaffff43, 0xeaffff42,
- 0xeaffff41, 0xeaffff40, 0xeaffff3f, 0xeaffff3e,
- 0xea00086f, 0xea00086e, 0xeaffff3b, 0xeaffff3a,
- 0xea00086b, 0xea00086a, 0xeaffff37, 0xeaffff36,
- 0xea0007ff, 0xea0007fe, 0xeaffff33, 0xeaffff32,
- 0xea0007fb, 0xea0007fa, 0xea000914, 0xea0008f3,
- 0xea00091f, 0xea0008fb, 0xea00092b, 0xea000904,
- 0xea0009dc, 0xea0009d9, 0xea0009fd, 0xea0009fa,
- 0xea000ef8, 0xea000ef5, 0xea000ef6, 0xea000ef3,
- 0xea000f9d, 0xea000f9a, 0xea00111e, 0xea00111b,
- 0xea00111c, 0xea001119, 0xea00104e, 0xea00104b,
- 0xea001147, 0xea001144, 0xea001145, 0xea001142,
- 0xea00125a, 0xea001257, 0xeaffff13, 0xeaffff12,
- 0xeaffff11, 0xeaffff10, 0xe3190c0e, 0x1affff0e,
- 0xe3190c01, 0x13190302, 0x0affff0b, 0xe28fb016,
- 0xe79b7d27, 0xe14fb000, 0xe1a0be2b, 0xe28bb010,
- 0xe1170b37, 0x0affff51, 0xeaffff29, 0x8000f0f0,
- 0x80000f0f, 0x8000cccc, 0x80003333, 0x8000ff00,
- 0x800000ff, 0x8000aaaa, 0x80005555, 0x8000cfcf,
- 0x80003030, 0x800055aa, 0x8000aa55, 0x80005faf,
- 0x8000a050, 0x80000000, 0x8000ffff, 0xe1300007,
- 0x5a000002, 0xea00004a, 0xe3100102, 0x1a000048,
- 0xe053400b, 0x4a00002d, 0xe2745020, 0xda00001b,
- 0xe092243a, 0x20822518, 0x30922518, 0xe0b11438,
- 0xe1a0451a, 0x2a000006, 0xe0922fa4, 0xe2b11000,
- 0x31b0f00e, 0xe3a01102, 0xe2833001, 0xe1a040a4,
- 0xe1b0f00e, 0xe2833001, 0xe1a040a4, 0xe1844f82,
- 0xe1a020a2, 0xe1822f81, 0xe1a01061, 0xe0922fa4,
- 0xe2a11000, 0xe1b0f00e, 0xe1a04538, 0xe0922fa4,
- 0xe2b11000, 0x23a01102, 0x22833001, 0xe1b0f00e,
- 0xe2545040, 0xaafffff7, 0xe2444020, 0xe2645020,
- 0xe0922438, 0xe2b11000, 0xe1a04518, 0xe184443a,
- 0x2affffe7, 0xe0922fa4, 0xe2b11000, 0x31b0f00e,
- 0xe3a01102, 0xe2833001, 0xe1a040a4, 0xe1b0f00e,
- 0xe2644000, 0xe1a0300b, 0xe1a05001, 0xe1a01008,
- 0xe1a08005, 0xe1a05002, 0xe1a0200a, 0xe1a0a005,
- 0xe2745020, 0xdaffffe5, 0xe092243a, 0x20822518,
- 0x30922518, 0xe0b11438, 0xe1a0451a, 0x2affffd0,
- 0xe0922fa4, 0xe2b11000, 0x31b0f00e, 0xe3a01102,
- 0xe2833001, 0xe1a040a4, 0xe1b0f00e, 0xe3100102,
- 0x1affffb6, 0xe053600b, 0x4a00003d, 0x01510008,
- 0x0152000a, 0x0a00004f, 0x3a000039, 0xe3a04000,
- 0xe2765020, 0xda00001a, 0xe054451a, 0xe0d2263a,
- 0x30422518, 0x20522518, 0xe0d11638, 0x5a000002,
- 0xe0922fa4, 0xe2a11000, 0xe1b0f00e, 0xe0944004,
- 0xe0b22002, 0xe0b11001, 0xe2433001, 0x5afffffa,
- 0xe0922fa4, 0xe2b11000, 0x31b0f00e, 0xe3a01102,
- 0xe2833001, 0xe1a040a4, 0xe1b0f00e, 0xe0544538,
- 0x41b0f00e, 0xe2d22000, 0xe2d11000, 0x41b0f00e,
- 0xeaffffed, 0xe3a04000, 0xe2565040, 0xaafffff6,
- 0xe2466020, 0xe2665020, 0xe054751a, 0xe0d4463a,
- 0x30444518, 0x20544518, 0xe0d22638, 0xe2d11000,
- 0x5a000002, 0xe0922fa4, 0xe2a11000, 0xe1b0f00e,
- 0xe0977007, 0xe0b44004, 0xe0b22002, 0xe0b11001,
- 0xe2433001, 0x5afffff9, 0xe0922fa4, 0xe2b11000,
- 0x31b0f00e, 0xe3a01102, 0xe2833001, 0xe1a040a4,
- 0xe1b0f00e, 0xe2666000, 0xe2200102, 0xe1a0300b,
- 0xe1a05001, 0xe1a01008, 0xe1a08005, 0xe1a05002,
- 0xe1a0200a, 0xe1a0a005, 0xe3a04000, 0xe2765020,
- 0xdaffffd7, 0xe054451a, 0xe0d2263a, 0x30422518,
- 0x20522518, 0xe0d11638, 0x5affffbf, 0xe0922fa4,
- 0xe2a11000, 0xe1b0f00e, 0xe3a03000, 0xe3a02000,
- 0xe3a01000, 0xe3a04000, 0xe1b0f00e, 0xe1a07000,
- 0xe1a08001, 0xe1a0a002, 0xe1a0b003, 0xe0200007,
- 0xe1914002, 0x1198400a, 0x0afffff2, 0xe3b054ff,
- 0xe0a3300b, 0xe185b425, 0xe043392b, 0xe92c4209,
- 0xe1a04821, 0xe1c1500b, 0xe1a06822, 0xe1c2700b,
- 0xe1c8900b, 0xe1a08828, 0xe1cab00b, 0xe1a0a82a,
- 0xe0030b96, 0xe0020b94, 0xe0010994, 0xe0000a97,
- 0xe0933000, 0xe0000a95, 0xe0b22000, 0xe0000895,
- 0xe0b11000, 0x33a0e000, 0x23a0e001, 0xe0000996,
- 0xe0922000, 0xe2b11000, 0xe2aee000, 0xe0000897,
- 0xe0922000, 0xe2b11000, 0xe2aee000, 0xe18ee803,
- 0xe1a03823, 0xe1833802, 0xe1a02822, 0xe1822801,
- 0xe1a01821, 0xe181180e, 0xe3cee0ff, 0xe0000b95,
- 0xe00b0b97, 0xe09eb00b, 0xe0b33000, 0xe0000896,
- 0xe0b22000, 0xe0000894, 0xe0a11000, 0xe0000a94,
- 0xe00a0a96, 0xe09aa003, 0xe0b22000, 0xe2a11000,
- 0xe0000997, 0xe09a4000, 0xe0000995, 0xe0b22000,
- 0xe2b11000, 0xe8bc4209, 0x4a000005, 0xe09bb00b,
- 0xe0b44004, 0xe0b22002, 0xe0b11001, 0xe2433001,
- 0x5afffff9, 0xe0922fa4, 0xe2b11000, 0x31b0f00e,
- 0xe3a01102, 0xe2833001, 0xe1a040a4, 0xe1b0f00e,
- 0xe1a07000, 0xe1a08001, 0xe1a0a002, 0xe1a0b003,
- 0xe3a00000, 0xe3a01102, 0xe3b02100, 0xe2e23901,
- 0xe0200007, 0xe1914002, 0x1198400a, 0x0affff9d,
- 0xe043300b, 0xe2833901, 0xe2433001, 0xe3a0b000,
- 0xe052500a, 0xe0d14008, 0x23a01003, 0x2a00000c,
- 0xe1a05002, 0xe1a04001, 0xe3a01001, 0xe2433001,
- 0xe0955005, 0xe0b44004, 0xe2abb000, 0xe055700a,
- 0xe0d46008, 0x31b0b0ab, 0x21a05007, 0x21a04006,
- 0xe0a11001, 0xe0955005, 0xe0b44004, 0xe2abb000,
- 0xe055700a, 0xe0d46008, 0x31b0b0ab, 0x21a05007,
- 0x21a04006, 0xe0a11001, 0xe0955005, 0xe0b44004,
- 0xe2abb000, 0xe055700a, 0xe0d46008, 0x31b0b0ab,
- 0x21a05007, 0x21a04006, 0xe0a11001, 0xe0955005,
- 0xe0b44004, 0xe2abb000, 0xe055700a, 0xe0d46008,
- 0x31b0b0ab, 0x21a05007, 0x21a04006, 0xe0b11001,
- 0x3affffda, 0xe1942005, 0x01b0f00e, 0xe3a02001,
- 0xe0955005, 0xe0b44004, 0xe2abb000, 0xe055700a,
- 0xe0d46008, 0x31b0b0ab, 0x21a05007, 0x21a04006,
- 0xe0a22002, 0xe0955005, 0xe0b44004, 0xe2abb000,
- 0xe055700a, 0xe0d46008, 0x31b0b0ab, 0x21a05007,
- 0x21a04006, 0xe0a22002, 0xe0955005, 0xe0b44004,
- 0xe2abb000, 0xe055700a, 0xe0d46008, 0x31b0b0ab,
- 0x21a05007, 0x21a04006, 0xe0a22002, 0xe0955005,
- 0xe0b44004, 0xe2abb000, 0xe055700a, 0xe0d46008,
- 0x31b0b0ab, 0x21a05007, 0x21a04006, 0xe0b22002,
- 0x3affffda, 0xe0955005, 0xe0b44004, 0x2a000001,
- 0xe1540008, 0x0155000a, 0xe2b22000, 0xe2b11000,
- 0x31b0f00e, 0xe2a33000, 0xe3a01102, 0xe1b0f00e,
- 0xe1b04883, 0x0affff37, 0xe2833901, 0xe2433001,
- 0xe1b030a3, 0xe1a05002, 0x32414102, 0x22414101,
- 0x33a07201, 0x23a07202, 0xe3a01102, 0xe0955005,
- 0xe0b44004, 0xe0216007, 0x31540006, 0x20444006,
- 0x20211087, 0xe1b070e7, 0x5afffff7, 0xe1942005,
- 0x01b0f00e, 0xe3a02000, 0xe0955005, 0xe0b44004,
- 0xe0a00000, 0xe0226007, 0xe055a006, 0xe0d48001,
- 0x31b000a0, 0x21a0500a, 0x21a04008, 0x20222087,
- 0x20211fa7, 0xe1b070a7, 0x1afffff2, 0xe0955005,
- 0xe0b44004, 0xe0b70007, 0xe0d5a002, 0xe0d48001,
- 0x31b000a0, 0x21a0500a, 0x21a04008, 0x22222001,
- 0x23a07102, 0xe3a00000, 0xe0977007, 0xe0b55005,
- 0xe0b44004, 0x2a000002, 0xe1540001, 0x01550002,
- 0x03570101, 0xe2b22000, 0xe2b11000, 0xe2a33000,
- 0x23a01102, 0xe1b0f00e, 0xe1b07004, 0x42644000,
- 0xe3a0b901, 0xe3a0a000, 0xe1a08004, 0xe1b04828,
- 0x01a08808, 0x128bb010, 0xe1b04c28, 0x01a08408,
- 0x128bb008, 0xe1b04e28, 0x01a08208, 0x128bb004,
- 0xe1b04f28, 0x01a08108, 0x128bb002, 0xe1b04fa8,
- 0x01a08088, 0x024bb001, 0xe1b0f00e, 0xe1a07000,
- 0xe1a0b003, 0xe24b40fe, 0xe2544c3f, 0xda000011,
- 0xe2745020, 0x4a000003, 0xe3a0a000, 0xe1a08531,
- 0xe1a08518, 0xe1b0f00e, 0xe1a08001, 0xe1a0a002,
- 0xe2745040, 0x41b0f00e, 0xe1a0a53a, 0xe1a0a51a,
- 0xe1b0f00e, 0x03a04001, 0x03a08102, 0xe3a0a000,
- 0x028bb001, 0x01b0f00e, 0xe3a04000, 0xe3a08000,
- 0xe3a0a000, 0xe3a0b000, 0xe1b0f00e, 0xe1a07000,
- 0xe1a0b003, 0xe24b40fe, 0xe2544c3f, 0xdafffff0,
- 0xe2745020, 0x4a000007, 0xe3a0a000, 0xe1b04531,
- 0xe2a44000, 0xe1b08514, 0x31b0f00e, 0xe1a08068,
- 0xe28bb001, 0xe1b0f00e, 0xe1a08001, 0xe1a0a002,
- 0xe2745040, 0xe3e04000, 0x41b0f00e, 0xe1b0a53a,
- 0xe2aaa000, 0xe1b0a51a, 0xe2b88000, 0x31b0f00e,
- 0xe1a0a0aa, 0xe18aaf88, 0xe1a08068, 0xe28bb001,
- 0xe1b0f00e, 0xe38ee101, 0xe24340fe, 0xe2544c3f,
- 0xda000032, 0xe2745020, 0x4a000018, 0xe1a08411,
- 0x01a08002, 0x11a0a002, 0x03a0a000, 0xe3a02000,
- 0xe1a01531, 0xe2194060, 0x1a000007, 0xe19aa088,
- 0x00088f81, 0xe0911fa8, 0x31b01511, 0x31b0f00e,
- 0xe1a01061, 0xe2833001, 0xe1b0f00e, 0xe3540060,
- 0x1198a00a, 0x0a000003, 0xe0304d04, 0x5a000001,
- 0xe2911001, 0xeafffff3, 0xe1a01511, 0xe1b0f00e,
- 0xe2745040, 0xd1b0f00e, 0xe2444020, 0xe1a08412,
- 0xe1b02532, 0xe2194060, 0x1a00000a, 0xe1b0a088,
- 0x00088f82, 0xe0822fa8, 0xe1b02512, 0xe2b11000,
- 0x31b0f00e, 0xe1a020a2, 0xe1822f81, 0xe1a01061,
- 0xe2833001, 0xe1b0f00e, 0xe3540060, 0x13580000,
- 0x0afffff4, 0xe0304d04, 0x42822001, 0xeafffff1,
- 0x0a000011, 0xe2194060, 0x1a000006, 0xe1918002,
- 0x01b0f00e, 0xe3a01000, 0xe3a02000, 0xe3a03000,
- 0xe3a04008, 0xe1a0f00e, 0xe1918002, 0x13540060,
- 0x0afffff5, 0xe0304d04, 0x5afffff3, 0xe3a01102,
- 0xe3b02100, 0xe2e23901, 0xe1b0f00e, 0xe2194060,
- 0x1afffff4, 0xe1924081, 0x1afffff7, 0xeaffffea,
- 0xe1a04000, 0xe1a00007, 0xe1a07004, 0xe1a04001,
- 0xe1a01008, 0xe1a08004, 0xe1a04002, 0xe1a0200a,
- 0xe1a0a004, 0xe1a04003, 0xe1a0300b, 0xe1a0b004,
- 0xe1b0f00e, 0xe209ba07, 0xe08c542b, 0xe209780f,
- 0xe79da727, 0xe21980ff, 0xe04a8108, 0x178d8727,
- 0xe2199902, 0xe3899901, 0xe1a09789, 0xe4ba6004,
- 0x14ba7004, 0xe88503c0, 0xeafffcae, 0xe209ba07,
- 0xe08c542b, 0xe209780f, 0xe79da727, 0xe21980ff,
- 0xe04a8108, 0x178d8727, 0xe2199902, 0xe3899905,
- 0xe1a09789, 0xe4ba6004, 0xe4ba7004, 0xe4ba8000,
- 0xe88503c0, 0xeafffc9f, 0xe209ba07, 0xe08c542b,
- 0xe209780f, 0xe79da727, 0xe21980ff, 0xe08a8108,
- 0x178d8727, 0xe2199902, 0xe3899901, 0xe1a09789,
- 0xe4ba6004, 0x14ba7004, 0xe88503c0, 0xeafffc91,
- 0xe209ba07, 0xe08c542b, 0xe209780f, 0xe79da727,
- 0xe21980ff, 0xe08a8108, 0x178d8727, 0xe2199902,
- 0xe3899905, 0xe1a09789, 0xe4ba6004, 0xe4ba7004,
- 0xe4ba8000, 0xe88503c0, 0xeafffc82, 0xe209ba07,
- 0xe08cc42b, 0xe209780f, 0xe337080f, 0x179da727,
- 0xe21980ff, 0xe04aa108, 0xe2199902, 0xe3899901,
- 0xe1a0b789, 0xe4ba8004, 0x14ba9004, 0xe88c0f00,
- 0xeafffc83, 0xe209ba07, 0xe08c542b, 0xe209780f,
- 0xe79da727, 0xe21980ff, 0xe04aa108, 0x178da727,
- 0xe2199902, 0xe3899901, 0xe1a09789, 0xe4ba6004,
- 0x14ba7004, 0xe88503c0, 0xeafffc66, 0xe209ba07,
- 0xe08cc42b, 0xe209780f, 0xe337080f, 0x179da727,
- 0xe21980ff, 0xe04aa108, 0xe2199902, 0xe3899905,
- 0xe1a0b789, 0xe4ba8004, 0xe4ba9004, 0xe4baa000,
- 0xe88c0f00, 0xeafffc66, 0xe209ba07, 0xe08c542b,
- 0xe209780f, 0xe79da727, 0xe21980ff, 0xe04aa108,
- 0x178da727, 0xe2199902, 0xe3899905, 0xe1a09789,
- 0xe4ba6004, 0xe4ba7004, 0xe4ba8000, 0xe88503c0,
- 0xeafffc48, 0xe209ba07, 0xe08cc42b, 0xe209780f,
- 0xe337080f, 0x179da727, 0xe21980ff, 0xe08aa108,
- 0xe2199902, 0xe3899901, 0xe1a0b789, 0xe4ba8004,
- 0x14ba9004, 0xe88c0f00, 0xeafffc49, 0xe209ba07,
- 0xe08c542b, 0xe209780f, 0xe79da727, 0xe21980ff,
- 0xe08aa108, 0x178da727, 0xe2199902, 0xe3899901,
- 0xe1a09789, 0xe4ba6004, 0x14ba7004, 0xe88503c0,
- 0xeafffc2c, 0xe209ba07, 0xe08cc42b, 0xe209780f,
- 0xe337080f, 0x179da727, 0xe21980ff, 0xe08aa108,
- 0xe2199902, 0xe3899905, 0xe1a0b789, 0xe4ba8004,
- 0xe4ba9004, 0xe4baa000, 0xe88c0f00, 0xeafffc2c,
- 0xe209ba07, 0xe08c542b, 0xe209780f, 0xe79da727,
- 0xe21980ff, 0xe08aa108, 0x178da727, 0xe2199902,
- 0xe3899905, 0xe1a09789, 0xe4ba6004, 0xe4ba7004,
- 0xe4ba8000, 0xe88503c0, 0xeafffc0e, 0xe2095a07,
- 0xe08c5425, 0xe895000f, 0xe3a04002, 0xe0044729,
- 0xe3844001, 0xe1340ea3, 0xe1844d23, 0xe28f7004,
- 0xe28f5f6f, 0x1085f104, 0xe209780f, 0xe79da727,
- 0xe21980ff, 0xe04a8108, 0x178d8727, 0xe4aa0004,
- 0xe3130101, 0x14aa1000, 0xeafffbfa, 0xe2095a07,
- 0xe08c5425, 0xe895000f, 0xe3a04002, 0xe0044729,
- 0xe3844005, 0xe1340ea3, 0xe1844d23, 0xe28f7004,
- 0xe28f5f5b, 0x1085f104, 0xe209780f, 0xe79da727,
- 0xe21980ff, 0xe04a8108, 0x178d8727, 0xe4aa0004,
- 0xe4aa1004, 0xe4aa2000, 0xeafffbe6, 0xe2095a07,
- 0xe08c5425, 0xe895000f, 0xe3a04002, 0xe0044729,
- 0xe3844001, 0xe1340ea3, 0xe1844d23, 0xe28f7004,
- 0xe28f5f47, 0x1085f104, 0xe209780f, 0xe79da727,
- 0xe21980ff, 0xe08a8108, 0x178d8727, 0xe4aa0004,
- 0xe3130101, 0x14aa1000, 0xeafffbd2, 0xe2095a07,
- 0xe08c5425, 0xe895000f, 0xe3a04002, 0xe0044729,
- 0xe3844005, 0xe1340ea3, 0xe1844d23, 0xe28f7004,
- 0xe28f50cc, 0x1085f104, 0xe209780f, 0xe79da727,
- 0xe21980ff, 0xe08a8108, 0x178d8727, 0xe4aa0004,
- 0xe4aa1004, 0xe4aa2000, 0xeafffbbe, 0xe2095a07,
- 0xe08c5425, 0xe895000f, 0xe3a04002, 0xe0044729,
- 0xe3844001, 0xe1340ea3, 0xe1844d23, 0xe28f7004,
- 0xe28f507c, 0x1085f104, 0xe209780f, 0xe337080f,
- 0x179da727, 0xe21980ff, 0xe04aa108, 0xe4aa0004,
- 0xe3130101, 0x14aa1000, 0xeafffbb2, 0xe2095a07,
- 0xe08c5425, 0xe895000f, 0xe3a04002, 0xe0044729,
- 0xe3844001, 0xe1340ea3, 0xe1844d23, 0xe28f7004,
- 0xe28f502c, 0x1085f104, 0xe209780f, 0xe79da727,
- 0xe21980ff, 0xe04aa108, 0x178da727, 0xe4aa0004,
- 0xe3130101, 0x14aa1000, 0xeafffb96, 0xe08ff104,
- 0xeb00036b, 0xe1a0f007, 0xea0000b6, 0xeb000368,
- 0xea0000ea, 0xeb000366, 0xea000123, 0xeb000364,
- 0xea0001ca, 0xea000124, 0xe1a0f007, 0xeb000360,
- 0xea000134, 0xeb00035e, 0xea00014b, 0xeb00035c,
- 0xea0001bd, 0xeb00035a, 0xeb000359, 0xeb000358,
- 0xeb000357, 0xeb000356, 0xeb000355, 0xeb000354,
- 0xeb000353, 0xea000156, 0xea00016f, 0xeb000350,
- 0xe1a0f007, 0xeb00034e, 0xea00018c, 0xeb00034c,
- 0xea0001ad, 0xeb00034a, 0xeb000349, 0xeb000348,
- 0xeb000347, 0xeb000346, 0xeb000345, 0xeb000344,
- 0xeb000343, 0xea00019f, 0xea00008d, 0xeb000340,
- 0xea0000c1, 0xeb00033e, 0xe1a0f007, 0xeb00033c,
- 0xea00019d, 0xeb00033a, 0xeb000339, 0xeb000338,
- 0xeb000337, 0xeb000336, 0xeb000335, 0xeb000334,
- 0xeb000333, 0xea00024f, 0xea00024e, 0xeb000330,
- 0xea00024c, 0xeb00032e, 0xea00024a, 0xeb00032c,
- 0xe1a0f007, 0xe2095a07, 0xe08c5425, 0xe895000f,
- 0xe3a04002, 0xe0044729, 0xe3844005, 0xe1340ea3,
- 0xe1844d23, 0xe28f7004, 0xe24f5f4b, 0x1085f104,
- 0xe209780f, 0xe337080f, 0x179da727, 0xe21980ff,
- 0xe04aa108, 0xe4aa0004, 0xe4aa1004, 0xe4aa2004,
- 0xeafffb48, 0xe2095a07, 0xe08c5425, 0xe895000f,
- 0xe3a04002, 0xe0044729, 0xe3844005, 0xe1340ea3,
- 0xe1844d23, 0xe28f7004, 0xe24f5f5f, 0x1085f104,
- 0xe209780f, 0xe79da727, 0xe21980ff, 0xe04aa108,
- 0x178da727, 0xe4aa0004, 0xe4aa1004, 0xe4aa2000,
- 0xeafffb2c, 0xe2095a07, 0xe08c5425, 0xe895000f,
- 0xe3a04002, 0xe0044729, 0xe3844001, 0xe1340ea3,
- 0xe1844d23, 0xe28f7004, 0xe24f5f73, 0x1085f104,
- 0xe209780f, 0xe337080f, 0x179da727, 0xe21980ff,
- 0xe08aa108, 0xe4aa0004, 0xe3130101, 0x14aa1000,
- 0xeafffb20, 0xe2095a07, 0xe08c5425, 0xe895000f,
- 0xe3a04002, 0xe0044729, 0xe3844001, 0xe1340ea3,
- 0xe1844d23, 0xe28f7004, 0xe24f5f87, 0x1085f104,
- 0xe209780f, 0xe79da727, 0xe21980ff, 0xe08aa108,
- 0x178da727, 0xe4aa0004, 0xe3130101, 0x14aa1000,
- 0xeafffb04, 0xe2095a07, 0xe08c5425, 0xe895000f,
- 0xe3a04002, 0xe0044729, 0xe3844005, 0xe1340ea3,
- 0xe1844d23, 0xe28f7004, 0xe24f5f9b, 0x1085f104,
- 0xe209780f, 0xe337080f, 0x179da727, 0xe21980ff,
- 0xe08aa108, 0xe4aa0004, 0xe4aa1004, 0xe4aa2004,
- 0xeafffaf8, 0xe2095a07, 0xe08c5425, 0xe895000f,
- 0xe3a04002, 0xe0044729, 0xe3844005, 0xe1340ea3,
- 0xe1844d23, 0xe28f7004, 0xe24f5faf, 0x1085f104,
- 0xe209780f, 0xe79da727, 0xe21980ff, 0xe08aa108,
- 0x178da727, 0xe4aa0004, 0xe4aa1004, 0xe4aa2000,
- 0xeafffadc, 0xe3c03102, 0xe2000102, 0xe1b05883,
- 0x12955802, 0x0a00000e, 0xe3320000, 0x01922c81,
- 0xe2012080, 0x000220a1, 0xe0911002, 0x31a01081,
- 0xe2a33000, 0xe2533dfe, 0x9a00001c, 0xe35300ff,
- 0x31800b83, 0x318004a1, 0x33a03202, 0x31a0f007,
- 0xea000008, 0xe1b04c03, 0xe18000a4, 0xe3a03202,
- 0x13c11102, 0x11800421, 0x11a0f007, 0xe1922001,
- 0x01a0f007, 0xea000015, 0xe380047f, 0xe3800502,
- 0xe3a03202, 0xe3a04004, 0xe59c5080, 0xe1855004,
- 0xe58c5080, 0xe1140825, 0x11a00004, 0x1a000e8a,
- 0xe3540004, 0x11a0f007, 0xe3a04010, 0xeafffff5,
- 0xe3730017, 0xda000005, 0xe1a01521, 0xe3811501,
- 0xe2633000, 0xe1800331, 0xe3a03202, 0xe1a0f007,
- 0xe3a03202, 0xe3a04008, 0xeaffffea, 0xe3c03102,
- 0xe2000102, 0xe1b05883, 0x12955802, 0x0a000012,
- 0xe1b04b02, 0xe2024b01, 0x000440a2, 0xe0922004,
- 0xe2b11000, 0xe2a33000, 0xe0922002, 0xe0a11001,
- 0xe2533b0f, 0x9a000019, 0xe2834001, 0xe3540b02,
- 0x31800a03, 0x31800621, 0x31a01a01, 0x31811622,
- 0x33a03206, 0x31a0f007, 0xea00000a, 0xe1b04a83,
- 0xe18000a4, 0xe3a03206, 0x13c11102, 0x118005a1,
- 0x11a01a81, 0x118115a2, 0x11a0f007, 0xe1922001,
- 0x01a0f007, 0xea000014, 0xe380047f, 0xe380060f,
- 0xe3a01000, 0xe3a03206, 0xe3a04004, 0xeaffffc1,
- 0xe3730034, 0xda00000c, 0xe1a026a2, 0xe1822981,
- 0xe1a016a1, 0xe3811702, 0xe2633000, 0xe2534020,
- 0x21a01431, 0x32634020, 0x31800331, 0x31a01411,
- 0x31811332, 0xe3a03206, 0xe1a0f007, 0xe3a01000,
- 0xe3a03206, 0xe3a04008, 0xeaffffae, 0xe2000102,
- 0xe1800003, 0xe3a0320a, 0xe1a0f007, 0xe3a02000,
- 0xe1a03080, 0xe1b03c23, 0x133300ff, 0x11a01400,
- 0x13811102, 0x12833dfe, 0x11a0f007, 0xe1933383,
- 0x11a01400, 0x13c11102, 0x11a0f007, 0xe1b01480,
- 0x01a0f007, 0xe3a03dfe, 0x52433001, 0x51b01081,
- 0x5afffffc, 0xe1a0f007, 0xe1a01e80, 0xe3c03102,
- 0xe2000102, 0xe18001a3, 0xe3a03206, 0xe21026ff,
- 0x133206ff, 0x1280030e, 0x11a0f007, 0xe1800182,
- 0xe3320000, 0x11a0f007, 0xe1912600, 0x01a0f007,
- 0xe1a01a21, 0xe1911600, 0xe2000102, 0xe380030e,
- 0x52400601, 0x51b01081, 0x5afffffc, 0xe1a01081,
- 0xe1800621, 0xe1a01a01, 0xe1a0f007, 0xe3a02000,
- 0xe1a03080, 0xe1b03c23, 0x133300ff, 0xe1a01400,
- 0x13811102, 0x12833dfe, 0xe2000102, 0xe1800003,
- 0xe3a0320a, 0x11a0f007, 0xe1800380, 0xe31000ff,
- 0x13c11102, 0x11a0f007, 0xe1b01081, 0x01a0f007,
- 0xe3800dfe, 0x52400001, 0x51b01081, 0x5afffffc,
- 0xe1a0f007, 0xe1a03080, 0xe1b03aa3, 0x12834001,
- 0x13340b02, 0xe1a02581, 0xe1a01aa1, 0xe1811580,
- 0x13811102, 0x12833b0f, 0x11a0f007, 0xe1933203,
- 0x11a0f007, 0xe0922002, 0xe0a11001, 0xe1924001,
- 0x01a0f007, 0xe3a03b0f, 0xe1b01001, 0x52433001,
- 0xe3a04000, 0x51844fa2, 0x51844081, 0x51a02082,
- 0x51b01004, 0x5afffff8, 0xe1a0f007, 0xe1a03080,
- 0xe1b03aa3, 0x12834001, 0x13340b02, 0x0a00000f,
- 0xe1b04201, 0xe1a01a21, 0xe1811600, 0xe2014c01,
- 0x000440a1, 0xe0911004, 0xe2a33000, 0xe2000102,
- 0xe2533d0e, 0x9affff49, 0xe35300ff, 0x31800b83,
- 0x318004a1, 0x33a03202, 0x31a0f007, 0xeaffff35,
- 0xe1812600, 0xe1a01a21, 0xe1811600, 0xe2000102,
- 0xe1b04c03, 0xe18000a4, 0xe3a03202, 0x118004a1,
- 0x11a0f007, 0xe3320000, 0x01a0f007, 0xeaffff3f,
- 0xe1a03080, 0xe1b03aa3, 0x12834001, 0x13340b02,
- 0xe1a02581, 0xe1a01aa1, 0xe1811580, 0x13811102,
- 0x12833b0f, 0xe2000102, 0xe1800003, 0xe3a0320a,
- 0x11a0f007, 0xe1800200, 0xe31000ff, 0x11a0f007,
- 0xe0922002, 0xe0a11001, 0xe1924001, 0x01a0f007,
- 0xe3800b0f, 0xe1b01001, 0x52400001, 0xe3a04000,
- 0x51844fa2, 0x51844081, 0x51a02082, 0x51b01004,
- 0x5afffff8, 0xe1a0f007, 0xe3c03102, 0xe1a0f007,
- 0x9a209a84, 0xfbcff799, 0x00003ffd, 0xe92c0080,
- 0xe28f7004, 0xe3c44007, 0xeafffe2b, 0xe8bc0080,
- 0xe1b05883, 0x12955802, 0x0a000099, 0xe3a05901,
- 0xe2455001, 0xe1530005, 0x3a000006, 0xe2855003,
- 0xe1530005, 0x0351020a, 0x33a04000, 0x33a05000,
- 0x392c4ff0, 0x3a000021, 0xe92c4fcf, 0xe3a00902,
- 0xe2404003, 0xe0644083, 0xebfffc46, 0xe24bb001,
- 0xe24f4078, 0xe894000e, 0xebfffb4b, 0xe3a04901,
- 0xe2444002, 0xe0434004, 0xe2644020, 0xe1a09431,
- 0xe1510419, 0x03520000, 0x1210b102, 0x12899001,
- 0xe200b102, 0xe8bc000f, 0xe92c0a00, 0xeb0000bf,
- 0xe59c4004, 0xe1b04004, 0x5bfffb90, 0x4bfffb3a,
- 0xe3a05901, 0xe2455001, 0xe1530005, 0x3a000051,
- 0xe2855003, 0xe1530005, 0x0351020a, 0x2a000040,
- 0xe3a04901, 0xe2844002, 0xe0544003, 0xe2645020,
- 0xe1a03512, 0x11a02432, 0x11822511, 0x11a01431,
- 0xe1a04e21, 0xe3a07003, 0xe3c1120f, 0xe0933003,
- 0xe0b22002, 0xe0a11001, 0xe1a08101, 0xe1888f22,
- 0xe1a0a102, 0xe18aaf23, 0xe092200a, 0xe0a11008,
- 0xe2577001, 0x11a04204, 0x11844e21, 0x1afffff1,
- 0xe1915002, 0x03a06000, 0x0a000019, 0xe3a0700f,
- 0xe1a05205, 0xe1855e26, 0xe1a06206, 0xe1866e21,
- 0xe3c1120f, 0xe0922002, 0xe0a11001, 0xe1a08101,
- 0xe1888f22, 0xe0922102, 0xe0a11008, 0xe2577001,
- 0x1afffff2, 0xe1a05205, 0xe1855e26, 0xe1a06206,
- 0xe1866e21, 0xe1b01281, 0x3a000005, 0xe2866001,
- 0xe1911002, 0x03c66001, 0xe206100f, 0xe351000a,
- 0x02466001, 0xe8bc0008, 0xeb000023, 0xe2000102,
- 0xe1800221, 0xe8bc0080, 0xe18000a7, 0xe1800004,
- 0xe1a01005, 0xe1a02006, 0xe3a0320e, 0xe8bc4fc0,
- 0xe1a0f007, 0xe8bc0030, 0xe3150102, 0x12644000,
- 0xe2844001, 0xe2145102, 0x12644000, 0xe92c0030,
- 0xe3a07901, 0xe3a0820a, 0xe3a0a000, 0xe287b002,
- 0xebfffb3a, 0xeaffffb1, 0xe8bc0030, 0xe3150102,
- 0x12644000, 0xe2444001, 0xe2145102, 0x12644000,
- 0xe92c0030, 0xe3a07901, 0xe3a0820a, 0xe3a0a000,
- 0xe287b002, 0xebfffad8, 0xeaffffa4, 0xe1a02003,
- 0xe3a03010, 0xe0922002, 0x3352020a, 0x2242220a,
- 0xe0b33003, 0x3afffffa, 0xe1a01622, 0xe3530064,
- 0xa2433064, 0xa2811201, 0xaafffffb, 0xe353000a,
- 0xa243300a, 0xa2811401, 0xaafffffb, 0xe1811a03,
- 0xe1b0f00e, 0xe3530000, 0x1a00000a, 0xe1915002,
- 0x03a0320e, 0x03a00000, 0x01a0f007, 0xe3110102,
- 0x1affff5d, 0xe0922002, 0xe0b11001, 0xe2433001,
- 0x5afffffb, 0xeaffff58, 0xe2000102, 0xe1800603,
- 0xe3800302, 0xe18009a1, 0xe1a01681, 0xe18119a2,
- 0xe1a02682, 0xe3a0320e, 0xe1a0f007, 0x9392ee8e,
- 0x921d5d07, 0x00003fc3, 0xe1915002, 0x01b05a00,
- 0x1200540f, 0x1355040f, 0x0a0000ac, 0xe92c4fd0,
- 0xe3a07000, 0xe3a06000, 0xe1a04a00, 0xe3a05003,
- 0xeb00009a, 0xe1a04001, 0xe3a05008, 0xeb000097,
- 0xe1a04002, 0xe3a05008, 0xeb000094, 0xe1a02007,
- 0xe1b01006, 0xe3a0303e, 0xe2833901, 0x4a000003,
- 0xe0922002, 0xe0b11001, 0xe2433001, 0x5afffffb,
- 0xe3a06000, 0xe3a07000, 0xe1a04200, 0xe3a05004,
- 0xeb000086, 0xe1a09007, 0xeb00000c, 0xe3100101,
- 0x1bfffade, 0x0bfffa88, 0xe24f70a4, 0xe8970d00,
- 0xebfffa85, 0xe8bc4fd0, 0xe2935001, 0xda000090,
- 0xe1b057a5, 0x1a0000a7, 0xe2044007, 0xeafffd46,
- 0xe3590014, 0xd28f8084, 0xd0889209, 0xd8990d80,
- 0xd1b0f00e, 0xe92c400f, 0xe3a01102, 0xe3a02000,
- 0xe3a00901, 0xe2403001, 0xe3590000, 0x0a000011,
- 0xe92c000f, 0xe2833003, 0xe3b0120a, 0x3bfffa6a,
- 0xe1b090a9, 0x3afffffc, 0xe8bc0d80, 0x192c000f,
- 0xebfffa69, 0x0a000007, 0xe8bc0d80, 0xe92c000f,
- 0xe1a00007, 0xe1a01008, 0xe1a0200a, 0xe1a0300b,
- 0xebfffa61, 0xeafffff1, 0xe1a07000, 0xe1a08001,
- 0xe1a0a002, 0xe1a0b003, 0xe8bc400f, 0xe1b0f00e,
- 0x00000000, 0x80000000, 0x00000000, 0x00003fff,
- 0x00000000, 0xa0000000, 0x00000000, 0x00004002,
- 0x00000000, 0xc8000000, 0x00000000, 0x00004005,
- 0x00000000, 0xfa000000, 0x00000000, 0x00004008,
- 0x00000000, 0x9c400000, 0x00000000, 0x0000400c,
- 0x00000000, 0xc3500000, 0x00000000, 0x0000400f,
- 0x00000000, 0xf4240000, 0x00000000, 0x00004012,
- 0x00000000, 0x98968000, 0x00000000, 0x00004016,
- 0x00000000, 0xbebc2000, 0x00000000, 0x00004019,
- 0x00000000, 0xee6b2800, 0x00000000, 0x0000401c,
- 0x00000000, 0x9502f900, 0x00000000, 0x00004020,
- 0x00000000, 0xba43b740, 0x00000000, 0x00004023,
- 0x00000000, 0xe8d4a510, 0x00000000, 0x00004026,
- 0x00000000, 0x9184e72a, 0x00000000, 0x0000402a,
- 0x00000000, 0xb5e620f4, 0x80000000, 0x0000402d,
- 0x00000000, 0xe35fa931, 0xa0000000, 0x00004030,
- 0x00000000, 0x8e1bc9bf, 0x04000000, 0x00004034,
- 0x00000000, 0xb1a2bc2e, 0xc5000000, 0x00004037,
- 0x00000000, 0xde0b6b3a, 0x76400000, 0x0000403a,
- 0x00000000, 0x8ac72304, 0x89e80000, 0x0000403e,
- 0x00000000, 0xad78ebc5, 0xac620000, 0x00004041,
- 0xe0977007, 0xe0a66006, 0xe0978107, 0xe0a6af27,
- 0xe08a6106, 0xe1a07008, 0xe0977e24, 0xe2a66000,
- 0xe1a04204, 0xe2555001, 0x1afffff4, 0xe1b0f00e,
- 0xe1a03280, 0xe1a038a3, 0xe1a026a2, 0xe1822981,
- 0xe1a016a1, 0xe1811980, 0xe3c11102, 0xe2044007,
- 0xeafffcb9, 0xe2144007, 0x13540005, 0x0a000003,
- 0xe2000102, 0xe3540001, 0x0afffda0, 0xeafffdda,
- 0xe2633000, 0xe3530040, 0xaa000008, 0xe2735020,
- 0x42435020, 0x41a02531, 0x51a02332, 0x51822511,
- 0xe1a01331, 0xe3a03000, 0xe2044007, 0xeafffca6,
- 0xe2000102, 0xe3a01000, 0xe3a02000, 0xe1a03e84,
- 0xe3a04008, 0xeafffd7b, 0xe2144007, 0x0a000003,
- 0xe3a00000, 0xe3540003, 0x0afffdae, 0xbafffd71,
- 0xe3a01000, 0xe3b02100, 0xe2e23902, 0xe2000102,
- 0xe1800003, 0xe3540000, 0x13a0320a, 0xe3a04004,
- 0xeafffd6c, 0xeafffffe, 0xe209aa0f, 0xe3190008,
- 0x1a000069, 0xe2095007, 0xe08c5205, 0xe895000f,
- 0xe1b04d23, 0xe28f7000, 0x1afffc87, 0xe1b04883,
- 0x12944802, 0x0a00002b, 0x5a000039, 0xe354083e,
- 0xe20448ff, 0x4a000049, 0xe1a048a4, 0xe2199060,
- 0x1a00000e, 0xe2846002, 0xe1922611, 0xe3a02101,
- 0xe0012432, 0x000220a1, 0xe264401f, 0xe1a01431,
- 0xe3320000, 0x12811001, 0xe3100102, 0x12611000,
- 0xe0312000, 0x4a000049, 0xe78d152a, 0xeafff805,
- 0xe3590060, 0x1a000005, 0xe264401f, 0xe1a01431,
- 0xe3100102, 0x12611000, 0xe78d152a, 0xeafff7fd,
- 0xe0307d09, 0x5afffff7, 0xe2846001, 0xe1922611,
- 0x0afffff4, 0xe264401f, 0xe1a01431, 0xe2811001,
- 0xe3100102, 0x12611000, 0xe0312000, 0x4a000033,
- 0xe78d152a, 0xeafff7ef, 0xe31300ff, 0x1a000003,
- 0xe1921001, 0x1a000006, 0xe78d152a, 0xeafff7e9,
- 0xe1921001, 0x0a000029, 0xe28f70bc, 0xe3a04001,
- 0xeafffd28, 0xe02970a9, 0xe3170020, 0x0a000010,
- 0xea000003, 0xe2199060, 0x0a000008, 0xe3590060,
- 0x0a00000b, 0xe0307d09, 0x5a000009, 0xe3a01001,
- 0xe3100102, 0x12611000, 0xe78d152a, 0xeafff7d5,
- 0xe2947802, 0x5a000002, 0xe3510102, 0x03520000,
- 0x8afffff5, 0xe3a01000, 0xe78d152a, 0xea000016,
- 0xe354083e, 0x03510102, 0xe2000102, 0x03500102,
- 0x1a00000a, 0xe3520000, 0x0affffae, 0xe2199060,
- 0x0a000004, 0xe3590060, 0x0affffaa, 0xe0307d09,
- 0x5affffa8, 0xea000001, 0xe3520102, 0x9affffa5,
- 0xe28f7014, 0xe3a04001, 0xeafffcfe, 0xe2091007,
- 0xe3510006, 0xaa000001, 0xe78d152a, 0xeafff7b5,
- 0xe2811003, 0xe351000a, 0x13a01001, 0xe2099060,
- 0x13590020, 0x1affffde, 0xe78d152a, 0xeafff7ad,
- 0xe3190080, 0x1a000034, 0xe2097a0f, 0xe79d8527,
- 0xe209b807, 0xe08cb62b, 0xe1b07008, 0x42688000,
- 0xe3a0a09e, 0xe28aadfe, 0x03a0a01f, 0xe1b0c828,
- 0x01a08808, 0x024aa010, 0xe1b0cc28, 0x01a08408,
- 0x024aa008, 0xe1b0ce28, 0x01a08208, 0x024aa004,
- 0xe1b0cf28, 0x01a08108, 0x024aa002, 0xe1b0cfa8,
- 0x01a08088, 0x024aa001, 0xe1b0cc08, 0x1a000002,
- 0xe3a09000, 0xe88b0780, 0xeafff79d, 0xe2199060,
- 0x1a000008, 0xe1b0c08c, 0xe208c080, 0x000cc0a8,
- 0xe098800c, 0xe2aaa000, 0x23a08102, 0xe3c880ff,
- 0xe88b0780, 0xeafff792, 0xe2399060, 0x0afffffa,
- 0xe027cc89, 0xe20cc102, 0xe0988bac, 0xe2aaa000,
- 0x23a08102, 0xe3a09000, 0xe3c880ff, 0xe88b0780,
- 0xeafff787, 0xe3190080, 0x1afff75f, 0xe2097a0f,
- 0xe79d8527, 0xe209b807, 0xe08cb62b, 0xe1b07008,
- 0x42688000, 0xe3a0a09e, 0xe28aadfe, 0x03a0a01f,
- 0xe1b09828, 0x01a08808, 0x024aa010, 0xe1b09c28,
- 0x01a08408, 0x024aa008, 0xe1b09e28, 0x01a08208,
- 0x024aa004, 0xe1b09f28, 0x01a08108, 0x024aa002,
- 0xe1b09fa8, 0x01a08088, 0x024aa001, 0xe3a09000,
- 0xe88b0780, 0xeafff76a, 0xe2097a0f, 0xe79da527,
- 0xe3ca801f, 0xe3d8881f, 0x1a000002, 0xe38aa000,
- 0xe58ca080, 0xeafff762, 0xe24f700c, 0xe3a04001,
- 0xeafffc94, 0xe2097a0f, 0xe59ca080, 0xe78da527,
- 0xeafff74c, 0xe1b08e09, 0x4a000037, 0xe08c8c28,
- 0xe898000f, 0xe1b04d23, 0xe28f7000, 0x1afffbae,
- 0xe2097807, 0xe1a0b003, 0xe1a0a002, 0xe0208509,
- 0xe1a09001, 0xe08cc627, 0xe89c000f, 0xe1b04d23,
- 0xe28f7000, 0x1afffba4, 0x188c000f, 0xe3a04803,
- 0xe0945883, 0x3094588b, 0x2a000015, 0xe0305008,
- 0x4a000009, 0xe153000b, 0x01510009, 0x0152000a,
- 0xe10f7000, 0xe2077206, 0x33877102, 0x13100102,
- 0x1227720a, 0xe168f007, 0xeafff72a, 0xe19b4003,
- 0x019a4002, 0x01994001, 0x0a000003, 0xe3100102,
- 0x1368f102, 0x0368f202, 0xeafff722, 0xe368f206,
- 0xeafff720, 0xe0945883, 0x3a000001, 0xe1915002,
- 0x1a000003, 0xe094588b, 0x3affffe3, 0xe199500a,
- 0x0affffe1, 0xe368f201, 0xe24fc0c0, 0xe24ccc24,
- 0xe24f7038, 0xe3a04001, 0xeafffc56, 0xe2097807,
- 0xe2095602, 0xe24f6074, 0xe0866c28, 0xe8960f00,
- 0xe0288505, 0xeaffffca, 0x00000000, 0x00000000,
- 0x00000000, 0x00000000, 0x00000000, 0x80000000,
- 0x00000000, 0x00003fff, 0x00000000, 0x80000000,
- 0x00000000, 0x00004000, 0x00000000, 0xc0000000,
- 0x00000000, 0x00004000, 0x00000000, 0x80000000,
- 0x00000000, 0x00004001, 0x00000000, 0xa0000000,
- 0x00000000, 0x00004001, 0x00000000, 0x80000000,
- 0x00000000, 0x00003ffe, 0x00000000, 0xa0000000,
- 0x00000000, 0x00004002, 0xe2097807, 0xe2095602,
- 0xe24f6e11, 0xe0866c28, 0xe8960f00, 0xe0288505,
- 0xea00000b, 0xe1b08e09, 0x4afffff6, 0xe08c8c28,
- 0xe898000f, 0xe1b04d23, 0xe28f7000, 0x1afffb46,
- 0xe2097807, 0xe1a0b003, 0xe1a0a002, 0xe0208509,
- 0xe1a09001, 0xe08cc627, 0xe89c000f, 0xe1b04d23,
- 0xe28f7000, 0x1afffb3c, 0x188c000f, 0xe3a04803,
- 0xe0945883, 0x3094588b, 0x2a00000b, 0xe0305008,
- 0x4affffa1, 0xe153000b, 0x01510009, 0x0152000a,
- 0xe10f7000, 0xe2077206, 0x33877102, 0x13100102,
- 0x1227720a, 0xe168f007, 0xeafff6c2, 0xe0945883,
- 0x3a000001, 0xe1915002, 0x1a000003, 0xe094588b,
- 0x3affffed, 0xe199500a, 0x0affffeb, 0xe368f201,
- 0xeafff6b8, 0xe2099060, 0xe3590020, 0x03a07209,
- 0x0a000006, 0xe3a00000, 0xe08cb42a, 0xe28f708c,
- 0xe2877c05, 0xea0000de, 0xe357020e, 0x0afffff4,
- 0xe24f8c02, 0xe0887c27, 0xe08cb42a, 0xe8970780,
- 0xe88b0780, 0xeafff6b6, 0xe24f8f85, 0xe0887c27,
- 0xe08cb42a, 0xe8970700, 0xe3a07102, 0xe88b0780,
- 0xeafff6af, 0xe24f7e23, 0xe0878c28, 0xe8980d00,
- 0xe3a04000, 0xea0001f3, 0xe24f7f91, 0xe0878c28,
- 0xe8980d00, 0xe3a04000, 0xea0002a5, 0xe3580102,
- 0x0a00040f, 0xe24f7e26, 0xe0878c28, 0xe8980d00,
- 0xea00035f, 0xe3580102, 0x0a00050f, 0xe24f7f9e,
- 0xe0878c28, 0xe8980d00, 0xea000456, 0xe24f7fa3,
- 0xe0876c26, 0xe896000f, 0xea000463, 0xe3580102,
- 0x0a0005b3, 0xe24f7e2a, 0xe0878c28, 0xe8980d00,
- 0xea000546, 0xe24f7fad, 0xe0876c26, 0xe896000f,
- 0xea000549, 0xe24f8fb1, 0xe0888c27, 0xe08cb42a,
- 0xe898000f, 0xe3570209, 0x9a00018e, 0xea000143,
- 0xe24f8e2e, 0xe0888c27, 0xe898000f, 0xea00063a,
- 0xe24f8e2f, 0xe0888c27, 0xe898000f, 0xea0006dd,
- 0xe24f8c03, 0xe0888c27, 0xe898000f, 0xea000790,
- 0xe24f8e31, 0xe0888c27, 0xe898000f, 0xea000858,
- 0xe3570102, 0x13570209, 0x1357020e, 0x1a0008fe,
- 0xe24f8e33, 0xe0888c27, 0xe898000f, 0xea000880,
- 0xe24f8d0d, 0xe0888c27, 0xe898000f, 0xea000992,
- 0xe24f7e35, 0xe0876c26, 0xe896000f, 0xea000937,
- 0xe24f7fd7, 0xe0878c28, 0xe8980d00, 0xea0005b6,
- 0xe3190080, 0x1afff638, 0xe1b07e09, 0xe209aa07,
- 0x4affff9e, 0xe08c7c27, 0xe08cb42a, 0xe8970780,
- 0xe88b0780, 0xeafff656, 0xe3190080, 0x1afff62e,
- 0xe1b07e09, 0xe209aa07, 0x4affff9a, 0xe08c7c27,
- 0xe08cb42a, 0xe8970780, 0xe2277102, 0xe88b0780,
- 0xeafff64b, 0xe3190080, 0x1afff623, 0xe1b07e09,
- 0xe209aa07, 0x4affff89, 0xe08c7c27, 0xe08cb42a,
- 0xe8970780, 0xe3c77102, 0xe88b0780, 0xeafff640,
- 0xe1b07e09, 0xe209aa07, 0x4affff80, 0xe08c7c27,
- 0xe08ca42a, 0xe897000f, 0xe2098080, 0xe3888040,
- 0xe1580ba3, 0x21b04183, 0x3a00001d, 0xe88a000f,
- 0xeafff62c, 0xe1b07e09, 0xe209aa07, 0x4affff79,
- 0xe08c7c27, 0xe08ca42a, 0xe897000f, 0xe2200102,
- 0xe2098080, 0xe3888040, 0xe1580ba3, 0x21b04183,
- 0x3a00000f, 0xe88a000f, 0xeafff61e, 0xe1b07e09,
- 0xe209aa07, 0x4affff65, 0xe08c7c27, 0xe08ca42a,
- 0xe897000f, 0xe3c00102, 0xe2098080, 0xe3888040,
- 0xe1580ba3, 0x21b04183, 0x3a000001, 0xe88a000f,
- 0xeafff610, 0xe1a04328, 0xe1844d23, 0xe24f7018,
- 0xe3540019, 0x0a00006b, 0xc3c03102, 0xe3140002,
- 0x1a000034, 0xe1b05883, 0x12955802, 0x0a00001c,
- 0xe2195060, 0x1a00000c, 0xe1925c81, 0xe2012080,
- 0x000220a1, 0xe0911002, 0x23a01102, 0xe2a33000,
- 0xe3a02000, 0xe3c110ff, 0xe2535dfe, 0x9a00001a,
- 0xe35500ff, 0x31a0f007, 0xea000012, 0xe3550060,
- 0x11922c01, 0x10305d05, 0x5afffff4, 0xe2911c01,
- 0x23a01102, 0xe2a33000, 0xe3a02000, 0xe3c110ff,
- 0xe2535dfe, 0x9a00000c, 0xe35500ff, 0x31a0f007,
- 0xea000004, 0xe31300ff, 0x11a0f007, 0xe1922001,
- 0x01a0f007, 0xea00000a, 0xe3a030ff, 0xe3833c7f,
- 0xe3a01000, 0xe3a04004, 0xeafffb1a, 0xe3750017,
- 0xda000003, 0xe2655009, 0xe1a01531, 0xe1a01511,
- 0xe1a0f007, 0xe3a03000, 0xe3a02000, 0xe3a01000,
- 0xe3a04008, 0xeafffb0f, 0xe1b05883, 0x12955802,
- 0x0a000022, 0xe2195060, 0x1a00000f, 0xe1b04b02,
- 0xe2024b01, 0x000440a2, 0xe0922004, 0xe2b11000,
- 0xe2a33000, 0x23a01102, 0xe1a025a2, 0xe1a02582,
- 0xe2535b0f, 0x9a00001a, 0xe2854001, 0xe3540b02,
- 0x31a0f007, 0xe3a02000, 0xeaffffda, 0xe3550060,
- 0x11b04a82, 0x10305d05, 0x5afffff2, 0xe2922b02,
- 0xe2b11000, 0x23a01102, 0xe2a33000, 0xe1a025a2,
- 0xe1a02582, 0xe2535b0f, 0x9a000009, 0xe2854001,
- 0xe3540b02, 0x31a0f007, 0xe3a02000, 0xeaffffc9,
- 0xe31300ff, 0x11a0f007, 0xe1922001, 0x01a0f007,
- 0xeaffffcf, 0xe3750034, 0xdaffffcd, 0xe265500c,
- 0xe2554020, 0x21a02431, 0x31a02532, 0x21a01412,
- 0xe1a02512, 0xe1a0f007, 0xe1a03080, 0xe1b03aa3,
- 0x12834001, 0x13340b02, 0x0a000023, 0xe2833b0f,
- 0xe2195060, 0x1a00000f, 0xe1b04201, 0xe1a01aa1,
- 0xe1811580, 0xe3811102, 0xe2014080, 0x000440a1,
- 0xe0911004, 0x23a01102, 0xe2a33000, 0xe3c110ff,
- 0xe3a02000, 0xe2535dfe, 0x9affffab, 0xe35500ff,
- 0x31a0f007, 0xeaffffa3, 0xe1b04181, 0xe1a01aa1,
- 0xe1811580, 0xe3811102, 0x13550060, 0x10305d05,
- 0x5afffff1, 0xe2911c01, 0x23a01102, 0xe2a33000,
- 0xe3a02000, 0xe3c110ff, 0xe2535dfe, 0x9affff9a,
- 0xe35500ff, 0x31a0f007, 0xeaffff92, 0xe1833203,
- 0xe1912600, 0x01a0f007, 0xe1a02581, 0xe1a01aa1,
- 0xe1811580, 0xe31300ff, 0x11a0f007, 0xeaffff94,
- 0xe3190080, 0x1afff54c, 0xe1b07e09, 0xe209aa07,
- 0x4afffeb0, 0xe08c7c27, 0xe08cb42a, 0xe897000f,
- 0xe1b04d23, 0xe28f7000, 0x1afff9c3, 0xe1a04883,
- 0xe2944802, 0x0a00000b, 0xe92c4000, 0xebfff83c,
- 0xe8bc4000, 0xe28f7014, 0x1afffa96, 0xe1898629,
- 0xe3180080, 0x0affff4e, 0xe3190080, 0x1affff81,
- 0xe88b000f, 0xeafff553, 0xe1928001, 0x0a000003,
- 0xe3811101, 0xe24f701c, 0xe3a04001, 0xeafffa89,
- 0xe3a02000, 0xe24f702c, 0xeaffff66, 0xe3190080,
- 0x1afff529, 0xe1b07e09, 0xe209aa07, 0x4afffec0,
- 0xe08c8c27, 0xe08cb42a, 0xe898000f, 0xe1b04d23,
- 0xe28f7000, 0x1afff9a0, 0x1888000f, 0xe1b04883,
- 0x12944802, 0x0a000063, 0xe3100102, 0x1a000059,
- 0xe2833901, 0xe2433001, 0xe1b030a3, 0xe1a05002,
- 0x32414102, 0x22414101, 0x33a07201, 0x23a07202,
- 0xe3a01102, 0xe0955005, 0xe0b44004, 0xe0216007,
- 0x31540006, 0x20444006, 0x20211087, 0xe1b070e7,
- 0x5afffff7, 0xe1942005, 0x11892629, 0x12122080,
- 0x03a07000, 0x0a000018, 0xe3a02000, 0xe0955005,
- 0xe0b44004, 0xe0a00000, 0xe0226007, 0xe055a006,
- 0xe0d48001, 0x31b000a0, 0x21a0500a, 0x21a04008,
- 0x20222087, 0x20211fa7, 0xe1b070a7, 0x1afffff2,
- 0xe0955005, 0xe0b44004, 0xe0b70007, 0xe0d5a002,
- 0xe0d48001, 0x31b000a0, 0x21a0500a, 0x21a04008,
- 0x22222001, 0x23a07102, 0xe3a00000, 0xe3190702,
- 0x1a000008, 0xe1954004, 0x01944007, 0x13822001,
- 0xe28f7044, 0xe3530000, 0xdaffff29, 0xe3190080,
- 0x0afffef7, 0xeaffff2b, 0xe2196060, 0x1a000015,
- 0xe0977007, 0xe0b55005, 0xe0b44004, 0x2a000002,
- 0xe1540001, 0x01550002, 0x03570101, 0xe2b22000,
- 0xe2b11000, 0xe2a33000, 0x23a01102, 0xe59c5080,
- 0xe3150010, 0x0a000001, 0xe88b000f, 0xeafff4ed,
- 0xe3855010, 0xe58c5080, 0xe3150601, 0x0afffff9,
- 0xe3a00010, 0xea0008b4, 0xe1945005, 0x01955007,
- 0x13560060, 0x0afffff0, 0xe1300c86, 0x4affffee,
- 0xe2922001, 0xeaffffe9, 0xe3a014c5, 0xe3a02000,
- 0xe3a030ff, 0xe1833383, 0xe3811101, 0xe24f705c,
- 0xe3a04001, 0xeafffa13, 0xe3530000, 0x1a000008,
- 0xe1914002, 0x0affffe3, 0xe1b01001, 0x4affff95,
- 0xe0922002, 0xe0b11001, 0xe2433001, 0x5afffffb,
- 0xeaffff90, 0xe1914002, 0x1affffee, 0xe3100102,
- 0x0affffd5, 0xeaffffe7, 0xe3190080, 0x1afff4a6,
- 0xe1b08e09, 0x4afffe1a, 0xe08c8c28, 0xe898000f,
- 0xe1b04d23, 0x0a00000b, 0xe28f7024, 0xe3540008,
- 0x1afff91d, 0xe3a02000, 0xe1a03080, 0xe1b03c23,
- 0x133300ff, 0x11a01400, 0x13811102, 0x12833dfe,
- 0x0afffa4d, 0xe888000f, 0xe1a0b003, 0xe1a0a002,
- 0xe1a08001, 0xe2004102, 0xe2096807, 0xe08c6626,
- 0xe896000f, 0xe1340000, 0x4a0000b6, 0xe1b04d23,
- 0x0a00000b, 0xe28f7024, 0xe3540008, 0x1afff906,
- 0xe3a02000, 0xe1a03080, 0xe1b03c23, 0x133300ff,
- 0x11a01400, 0x13811102, 0x12833dfe, 0x0afffa36,
- 0xe886000f, 0xe3a06802, 0xe0965883, 0x3096588b,
- 0x2a000061, 0xe053400b, 0x4a000046, 0xe2745020,
- 0xda00000e, 0xe092243a, 0x20822518, 0x30922518,
- 0xe0b11438, 0xe1a0851a, 0xe1a0a088, 0x2a000011,
- 0xe3190702, 0x1a00001d, 0xe19aa008, 0x13822001,
- 0xe28f7090, 0xe3190080, 0x0afffe7d, 0xeafffeb1,
- 0xe3540040, 0xc18aa008, 0xc3a08000, 0xaa00000b,
- 0xe2444020, 0xe2645020, 0xe0922438, 0xe2b11000,
- 0xe1a08518, 0xe18aa088, 0xe2a33000, 0x218aa008,
- 0x21a08f82, 0x21a020a2, 0x21822f81, 0x21a01061,
- 0xe3190702, 0x1a000005, 0xe19aa008, 0x13822001,
- 0xe28f7030, 0xe3190080, 0x0afffe65, 0xeafffe99,
- 0xe2197060, 0x1a000014, 0xe19aa088, 0x00088f82,
- 0xe0922fa8, 0xe2b11000, 0xe2a33000, 0x23a01102,
- 0xe0965883, 0x0a00003b, 0xe59c5080, 0xe3150010,
- 0x0a000003, 0xe2099a07, 0xe08c9429, 0xe889000f,
- 0xeafff45c, 0xe3855010, 0xe58c5080, 0xe3150601,
- 0x0afffff7, 0xe3a00010, 0xea000823, 0xe19aa008,
- 0x13570060, 0x0affffef, 0xe1300c87, 0x4affffed,
- 0xe2922001, 0xeaffffe6, 0xe2644000, 0xe1a0300b,
- 0xe1a05001, 0xe1a01008, 0xe1a08005, 0xe1a05002,
- 0xe1a0200a, 0xe1a0a005, 0xe2745020, 0xdaffffbf,
- 0xe092243a, 0x20822518, 0x30922518, 0xe0b11438,
- 0xe1a0851a, 0xe1a0a088, 0x2affffc2, 0xe3190702,
- 0x1affffce, 0xe19aa008, 0x13822001, 0xe24f70ac,
- 0xe3190080, 0x0afffe2e, 0xeafffe62, 0xe0965883,
- 0x1a000001, 0xe1925001, 0x1a000006, 0xe096588b,
- 0x1affffcc, 0xe1a0300b, 0xe1a01008, 0xe1a0200a,
- 0xe1915002, 0x0affffc7, 0xe3811101, 0xe24f70ec,
- 0xe3a04001, 0xeafff963, 0xe3a030ff, 0xe1833383,
- 0xe3a02000, 0xe3a01000, 0xe24f7f42, 0xe3a04004,
- 0xeafff95c, 0xe1b04d23, 0x0a00000b, 0xe28f7024,
- 0xe3540008, 0x1afff87c, 0xe3a02000, 0xe1a03080,
- 0xe1b03c23, 0x133300ff, 0x11a01400, 0x13811102,
- 0x12833dfe, 0x0afff9ac, 0xe886000f, 0xe0200589,
- 0xeaffff73, 0xe3190080, 0x1afff3ef, 0xe1b08e09,
- 0x4afffd68, 0xe08c8c28, 0xe898000f, 0xe1b04d23,
- 0x0a00000b, 0xe28f7024, 0xe3540008, 0x1afff866,
- 0xe3a02000, 0xe1a03080, 0xe1b03c23, 0x133300ff,
- 0x11a01400, 0x13811102, 0x12833dfe, 0x0afff996,
- 0xe888000f, 0xe1a0b003, 0xe1a0a002, 0xe1a08001,
- 0xe2004102, 0xe2096807, 0xe08c6626, 0xe896000f,
- 0xe1340000, 0x4affffd2, 0xe1b04d23, 0x0a00000b,
- 0xe28f7024, 0xe3540008, 0x1afff84f, 0xe3a02000,
- 0xe1a03080, 0xe1b03c23, 0x133300ff, 0x11a01400,
- 0x13811102, 0x12833dfe, 0x0afff97f, 0xe886000f,
- 0xe0200589, 0xe3a06802, 0xe0965883, 0x3096588b,
- 0x2a00006b, 0xe053400b, 0x01510008, 0x0152000a,
- 0x0a000078, 0x3a00004c, 0xe3a07000, 0xe2745020,
- 0xda000015, 0xe057651a, 0xe0d2243a, 0x30422518,
- 0x20522518, 0xe0d11438, 0x5a00001b, 0xe3190702,
- 0x1a000029, 0xe1977006, 0x13822001, 0xe28f70c0,
- 0xe3190080, 0x0afffdc2, 0xeafffdf6, 0x13a06102,
- 0xe3a07001, 0xe198500a, 0x0a000029, 0xe2522001,
- 0xe2d11000, 0x5a00000c, 0xea000011, 0xe3a06000,
- 0xe3540040, 0xaafffff4, 0xe2444020, 0xe2645020,
- 0xe057751a, 0xe0d6643a, 0x30466518, 0x20566518,
- 0xe0d22438, 0xe2d11000, 0x4a000005, 0xe0977007,
- 0xe0b66006, 0xe0b22002, 0xe0b11001, 0xe2433001,
- 0x5afffff9, 0xe3190702, 0x1a000007, 0xe3530000,
- 0xda00004c, 0xe1977006, 0x13822001, 0xe28f7030,
- 0xe3190080, 0x0afffd9e, 0xeafffdd2, 0xe2195060,
- 0x1a00000e, 0xe1977086, 0x00066f82, 0xe0922fa6,
- 0xe2b11000, 0xe2a33000, 0x23a01102, 0xe1b03003,
- 0x4a000042, 0xe59c5080, 0xe3150010, 0x0affff3c,
- 0xe2099a07, 0xe08c9429, 0xe889000f, 0xeafff395,
- 0xe1977006, 0x13550060, 0x0afffff3, 0xe1300c85,
- 0x4afffff1, 0xe2922001, 0xeaffffec, 0xe2644000,
- 0xe2200102, 0xe1a0300b, 0xe1a05001, 0xe1a01008,
- 0xe1a08005, 0xe1a05002, 0xe1a0200a, 0xe1a0a005,
- 0xe3a07000, 0xe2745020, 0xdaffffbf, 0xe057651a,
- 0xe0d2243a, 0x30422518, 0x20522518, 0xe0d11438,
- 0x5affffc5, 0xe3190702, 0x1affffd3, 0xe1977006,
- 0x13822001, 0xe24f7098, 0xe3190080, 0x0afffd6c,
- 0xeafffda0, 0xe0965883, 0x1a000005, 0xe1925001,
- 0x1affff44, 0xe153000b, 0x0198500a, 0x03a014c1,
- 0x0affff40, 0xe096588b, 0x1affffcd, 0xe2200102,
- 0xe1a0300b, 0xe1a01008, 0xe1a0200a, 0xe1915002,
- 0x0affffc7, 0xeaffff37, 0xe3a03000, 0xe3a02000,
- 0xe3a01000, 0xeaffffc2, 0xe3a03000, 0xe3a02000,
- 0xe3a01000, 0xe24f7f42, 0xe3a04008, 0xeafff895,
- 0xe2633000, 0xe2734020, 0x42435020, 0x41a02531,
- 0x51a02332, 0x51822411, 0xe1a01331, 0xe3a03000,
- 0xeaffffb3, 0xe3190080, 0x1afff32f, 0xe1b08e09,
- 0x4afffcad, 0xe08c8c28, 0xe898000f, 0xe1b04d23,
- 0x0a00000b, 0xe28f7024, 0xe3540008, 0x1afff7a6,
- 0xe3a02000, 0xe1a03080, 0xe1b03c23, 0x133300ff,
- 0x11a01400, 0x13811102, 0x12833dfe, 0x0afff8d6,
- 0xe888000f, 0xe2000102, 0xe183b000, 0xe1a0a002,
- 0xe1a08001, 0xe2096807, 0xe08c6626, 0xe896000f,
- 0xe1b04d23, 0x0a00000b, 0xe28f7024, 0xe3540008,
- 0x1afff791, 0xe3a02000, 0xe1a03080, 0xe1b03c23,
- 0x133300ff, 0x11a01400, 0x13811102, 0x12833dfe,
- 0x0afff8c1, 0xe886000f, 0xe020000b, 0xe3cbb102,
- 0xe3a06802, 0xe3530000, 0x135b0000, 0x0a00008c,
- 0xe0965883, 0x3096588b, 0x2afffee7, 0xe3b054ff,
- 0xe0a3300b, 0xe185b425, 0xe043392b, 0xe19a4088,
- 0x11924081, 0x0a000064, 0xe92c4209, 0xe1a04821,
- 0xe1c1500b, 0xe1a06822, 0xe1c2700b, 0xe1c8900b,
- 0xe1a08828, 0xe1cab00b, 0xe1a0a82a, 0xe0030b96,
- 0xe0020b94, 0xe0010994, 0xe0000a97, 0xe0933000,
- 0xe0000a95, 0xe0b22000, 0xe0000895, 0xe0b11000,
- 0x33a0e000, 0x23a0e001, 0xe0000996, 0xe0922000,
- 0xe2b11000, 0xe2aee000, 0xe0000897, 0xe0922000,
- 0xe2b11000, 0xe2aee000, 0xe18ee803, 0xe1a03823,
- 0xe1833802, 0xe1a02822, 0xe1822801, 0xe1a01821,
- 0xe181180e, 0xe3cee0ff, 0xe0000b95, 0xe00b0b97,
- 0xe09eb00b, 0xe0b33000, 0xe0000896, 0xe0b22000,
- 0xe0000894, 0xe0a11000, 0xe0000a94, 0xe00a0a96,
- 0xe09aa003, 0xe0b22000, 0xe2a11000, 0xe0000997,
- 0xe09aa000, 0xe0000995, 0xe0b22000, 0xe2b11000,
- 0xe8bc4209, 0x5a000009, 0xe3190702, 0x1a000017,
- 0xe19bb00a, 0x13822001, 0xe3530000, 0xdaffff79,
- 0xe28f7078, 0xe3190080, 0x0afffccd, 0xeafffd01,
- 0xe09bb00b, 0xe0baa00a, 0xe0b22002, 0xe0b11001,
- 0xe2433001, 0x5afffff9, 0xe3190702, 0x1a000007,
- 0xe3530000, 0xdaffff6b, 0xe19bb00a, 0x13822001,
- 0xe28f7038, 0xe3190080, 0x0afffcbd, 0xeafffcf1,
- 0xe2195060, 0x1a00001c, 0xe19bb08a, 0x000aaf82,
- 0xe0922faa, 0xe2b11000, 0xe2a33000, 0x23a01102,
- 0xe2934001, 0xda00001b, 0xe1b047a4, 0x1afffe91,
- 0xe59c5080, 0xe3150010, 0x0afffe59, 0xe2099a07,
- 0xe08c9429, 0xe889000f, 0xeafff2b2, 0xe19a4088,
- 0x11a0200a, 0x11a01008, 0xe2433001, 0xe3190702,
- 0x1affffee, 0xe3530000, 0xdaffff4a, 0xe24f7044,
- 0xe3190080, 0x0afffc9e, 0xeafffcd2, 0xe19bb00a,
- 0x13550060, 0x0affffe5, 0xe1300c85, 0x4affffe3,
- 0xe2922001, 0xeaffffde, 0xe2633000, 0xe3530040,
- 0xaaffff3c, 0xe2734020, 0x42435020, 0x41a02531,
- 0x51a02332, 0x51822411, 0xe1a01331, 0xe3a03000,
- 0xeaffffda, 0xe3530000, 0x1a000003, 0xe1915002,
- 0x0a00000c, 0xe35b0000, 0x1affff6c, 0xe198500a,
- 0x1affff6a, 0xe0965883, 0x33a03000, 0x33a02000,
- 0x33a01000, 0x3affffcd, 0xe1915002, 0x1afffe59,
- 0xe3a014c2, 0xeafffe57, 0xe096588b, 0x3affffc7,
- 0xe198500a, 0x1afffe48, 0xe1a0300b, 0xeafffff7,
- 0xe3190080, 0x1afff25c, 0xe2096807, 0xe08c6626,
- 0xe896000f, 0xe1b04d23, 0x0a00000b, 0xe28f7024,
- 0xe3540008, 0x1afff6d4, 0xe3a02000, 0xe1a03080,
- 0xe1b03c23, 0x133300ff, 0x11a01400, 0x13811102,
- 0x12833dfe, 0x0afff804, 0xe886000f, 0xe2000102,
- 0xe183b000, 0xe1a0a002, 0xe1a08001, 0xe1b06e09,
- 0x4afffbd1, 0xe08c6c26, 0xe896000f, 0xe1b04d23,
- 0x0a000035, 0xe28f7024, 0xe3540008, 0x1afff6be,
- 0xe3a02000, 0xe1a03080, 0xe1b03c23, 0x133300ff,
- 0x11a01400, 0x13811102, 0x12833dfe, 0x0afff7ee,
- 0xe886000f, 0xea000028, 0xe3190080, 0x1afff232,
- 0xe1b08e09, 0x4afffbb6, 0xe08c8c28, 0xe898000f,
- 0xe1b04d23, 0x0a00000b, 0xe28f7024, 0xe3540008,
- 0x1afff6a9, 0xe3a02000, 0xe1a03080, 0xe1b03c23,
- 0x133300ff, 0x11a01400, 0x13811102, 0x12833dfe,
- 0x0afff7d9, 0xe888000f, 0xe2000102, 0xe183b000,
- 0xe1a0a002, 0xe1a08001, 0xe2096807, 0xe08c6626,
- 0xe896000f, 0xe1b04d23, 0x0a00000b, 0xe28f7024,
- 0xe3540008, 0x1afff694, 0xe3a02000, 0xe1a03080,
- 0xe1b03c23, 0x133300ff, 0x11a01400, 0x13811102,
- 0x12833dfe, 0x0afff7c4, 0xe886000f, 0xe020000b,
- 0xe3cbb102, 0xe1b04883, 0x11b0588b, 0x12944802,
- 0x12955802, 0x0a000082, 0xe043300b, 0xe2833901,
- 0xe2433001, 0xe3a0b000, 0xe052500a, 0xe0d14008,
- 0x23a01003, 0x2a00000c, 0xe1a05002, 0xe1a04001,
- 0xe3a01001, 0xe2433001, 0xe0955005, 0xe0b44004,
- 0xe2abb000, 0xe055700a, 0xe0d46008, 0x31b0b0ab,
- 0x21a05007, 0x21a04006, 0xe0a11001, 0xe0955005,
- 0xe0b44004, 0xe2abb000, 0xe055700a, 0xe0d46008,
- 0x31b0b0ab, 0x21a05007, 0x21a04006, 0xe0a11001,
- 0xe0955005, 0xe0b44004, 0xe2abb000, 0xe055700a,
- 0xe0d46008, 0x31b0b0ab, 0x21a05007, 0x21a04006,
- 0xe0a11001, 0xe0955005, 0xe0b44004, 0xe2abb000,
- 0xe055700a, 0xe0d46008, 0x31b0b0ab, 0x21a05007,
- 0x21a04006, 0xe0b11001, 0x3affffda, 0xe1942005,
- 0x11892629, 0x12122080, 0x0a000025, 0xe3a02001,
- 0xe0955005, 0xe0b44004, 0xe2abb000, 0xe055700a,
- 0xe0d46008, 0x31b0b0ab, 0x21a05007, 0x21a04006,
- 0xe0a22002, 0xe0955005, 0xe0b44004, 0xe2abb000,
- 0xe055700a, 0xe0d46008, 0x31b0b0ab, 0x21a05007,
- 0x21a04006, 0xe0a22002, 0xe0955005, 0xe0b44004,
- 0xe2abb000, 0xe055700a, 0xe0d46008, 0x31b0b0ab,
- 0x21a05007, 0x21a04006, 0xe0a22002, 0xe0955005,
- 0xe0b44004, 0xe2abb000, 0xe055700a, 0xe0d46008,
- 0x31b0b0ab, 0x21a05007, 0x21a04006, 0xe0b22002,
- 0x3affffda, 0xe3190702, 0x1a000007, 0xe1954004,
- 0x13822001, 0xe3530000, 0xdafffe62, 0xe28f7048,
- 0xe3190080, 0x0afffbb6, 0xeafffbea, 0xe2197060,
- 0x1a000014, 0xe0955005, 0xe0b44004, 0x2a000002,
- 0xe1540008, 0x0155000a, 0x011500a2, 0xe2b22000,
- 0xe2b11000, 0xe2a33000, 0x23a01102, 0xe2934001,
- 0xdaffff10, 0xe1b047a4, 0x1afffd86, 0xe59c5080,
- 0xe3150010, 0x0afffd4e, 0xe2099a07, 0xe08c9429,
- 0xe889000f, 0xeafff1a7, 0xe1945005, 0x13570060,
- 0x0afffff1, 0xe1300c87, 0x4affffef, 0xe2922001,
- 0xeaffffea, 0xe1b04883, 0x1a000013, 0xe1915002,
- 0x1a00000d, 0xe1b0588b, 0x0198600a, 0x03a014c3,
- 0x03a030ff, 0x01833383, 0x0afffd6a, 0xe2955802,
- 0x1affffe8, 0xe198600a, 0x0affffe6, 0xe1a01008,
- 0xe1a0200a, 0xe1a0300b, 0xeafffd62, 0xe0922002,
- 0xe0b11001, 0xe2433001, 0x5afffffb, 0xe1b0588b,
- 0x1a000010, 0xe198600a, 0x1a00000a, 0xe2944802,
- 0x1a000001, 0xe1916002, 0x1afffd56, 0xe3a01000,
- 0xe3a02000, 0xe3a030ff, 0xe1833383, 0xe24f70bc,
- 0xe3a04002, 0xeafff6b7, 0xe09aa00a, 0xe0b88008,
- 0xe24bb001, 0x5afffffb, 0xe2956802, 0x12946802,
- 0x1affff50, 0xe2946802, 0x1a000006, 0xe1916002,
- 0x1afffd44, 0xe2956802, 0x1affffbf, 0xe198600a,
- 0x03a01331, 0x0afffd3f, 0xe198600a, 0x0afffe09,
- 0xe1a01008, 0xe1a0200a, 0xe1a0300b, 0xeafffd39,
- 0xe3190080, 0x1afff144, 0xe2096807, 0xe08c6626,
- 0xe896000f, 0xe1b04d23, 0xe28f7000, 0x1afff5be,
- 0x1886000f, 0xe2000102, 0xe183b000, 0xe1a0a002,
- 0xe1a08001, 0xe1b06e09, 0x4afffacd, 0xe08c6c26,
- 0xe896000f, 0xe1b04d23, 0xe28f7000, 0x1afff5b2,
- 0x1886000f, 0xea000014, 0xe3190080, 0x1afff12e,
- 0xe1b08e09, 0x4afffabc, 0xe08c8c28, 0xe898000f,
- 0xe1b04d23, 0xe28f7000, 0x1afff5a7, 0x1888000f,
- 0xe2000102, 0xe183b000, 0xe1a0a002, 0xe1a08001,
- 0xe2096807, 0xe08c6626, 0xe896000f, 0xe1b04d23,
- 0xe28f7000, 0x1afff59c, 0x1886000f, 0xe1a0700b,
- 0xe3cbb102, 0xe1b04883, 0x12944802, 0x11b0588b,
- 0x12955802, 0x0a00004e, 0xe92c4200, 0x5a000035,
- 0xe24b4c3f, 0xe24440fe, 0xe3540010, 0xca00002a,
- 0xe19a5418, 0x1a00002f, 0xe2649020, 0xe1a09938,
- 0xe0000f89, 0xe92c0080, 0xe3a08102, 0xe3a0a000,
- 0xe3a07901, 0xe257b001, 0xe92c0d80, 0x3bfff2b6,
- 0xe1b090a9, 0x3afffffc, 0xe8bc0d80, 0x192c000f,
- 0xebfff2b5, 0xe2834001, 0x0a000009, 0xe3540902,
- 0xaa000010, 0xe8bc0d80, 0xe92c000f, 0xe1a00007,
- 0xe1a01008, 0xe1a0200a, 0xe1a0300b, 0xebfff2aa,
- 0xeaffffee, 0xe8bc0080, 0xe3170102, 0x1bfff2f3,
- 0xe8bc4200, 0xe2934001, 0xdafffe6a, 0xe1b047a4,
- 0x1afffce0, 0xea0000cb, 0xe28cc010, 0xe8bc4280,
- 0xe3170102, 0x1afffda3, 0xeafffcda, 0xe3540040,
- 0x2a000012, 0xe2545020, 0x21b0651a, 0x0a000010,
- 0xe19a6418, 0x0a00000e, 0xe3100102, 0x1a00000e,
- 0xe92c0001, 0xe3a00000, 0xe92c0d80, 0xe3c99601,
- 0xeb0000e1, 0xe8bc0d80, 0xebfff28b, 0xeb000166,
- 0xe8bc4201, 0x0a0000b3, 0xe28f7e2f, 0xeafff629,
- 0x13b05100, 0x33a00000, 0xeafffff0, 0xe8bc4200,
- 0xe3a014c7, 0xe3a02000, 0xe3a030ff, 0xe1833383,
- 0xeafffcb8, 0xe3540000, 0x1a00001e, 0xe3530000,
- 0x0a000002, 0xe1916002, 0x1afffcb2, 0xea000001,
- 0xe1916002, 0x1a000010, 0xe1b0588b, 0x1a000006,
- 0xe198600a, 0x03a01102, 0x03a02000, 0x03a00000,
- 0x03a03901, 0x02433001, 0xea000096, 0xe2955802,
- 0x1a000094, 0xe198600a, 0x0a000092, 0xe1a01008,
- 0xe1a0200a, 0xe1a0300b, 0xeafffc9e, 0xe0922002,
- 0xe0b11001, 0xe2433001, 0x5afffffb, 0xe1b0588b,
- 0x12955802, 0x1affff8f, 0xe35b0000, 0x0a000008,
- 0xe1a01008, 0xe1a0200a, 0xe1a00007, 0xe1a0300b,
- 0xe198600a, 0x1afffc8f, 0xe3100102, 0x13a03000,
- 0xea00007c, 0xe198600a, 0x0affffdd, 0xe09aa00a,
- 0xe0b88008, 0xe24bb001, 0x5afffffb, 0xe92c4200,
- 0xeaffffb4, 0xe3190080, 0x1afff08f, 0xe1b08e09,
- 0x4afffa4e, 0xe08c8c28, 0xe898000f, 0xe1b04d23,
- 0xe28f7000, 0x1afff508, 0x1888000f, 0xe2000102,
- 0xe183b000, 0xe1a0a002, 0xe1a08001, 0xe2096807,
- 0xe08c6626, 0xe896000f, 0xe1b04d23, 0xe28f7000,
- 0x1afff4fd, 0x1886000f, 0xe1a0700b, 0xe3cbb102,
- 0xe1b04883, 0x12944802, 0x11b0588b, 0x12955802,
- 0x0a00000a, 0xe92c400f, 0xe92c0d80, 0xebfff27f,
- 0xebfff36f, 0xe8bc0d80, 0xebfff227, 0xe2200102,
- 0xe8bc0d80, 0xebfff178, 0xe8bc4000, 0xea00004d,
- 0xe1b04883, 0x1a000010, 0xe1915002, 0x1a00000a,
- 0xe1b0588b, 0x0198600a, 0x0a000013, 0xe2955802,
- 0x1a000015, 0xe198600a, 0x0a000013, 0xe1a01008,
- 0xe1a0200a, 0xe1a0300b, 0xeafffc4e, 0xe0922002,
- 0xe0b11001, 0xe2433001, 0x5afffffb, 0xe1b0588b,
- 0x1a000012, 0xe198600a, 0x1a00000c, 0xe2944802,
- 0x1a000001, 0xe1916002, 0x1afffc42, 0xe3a01333,
- 0xe3b02100, 0xe2e23902, 0xeafffc3e, 0xe3a00000,
- 0xe3a01000, 0xe3a02000, 0xe3a03000, 0xea000029,
- 0xe09aa00a, 0xe0b88008, 0xe24bb001, 0x5afffffb,
- 0xe2956802, 0x12946802, 0x1affffc9, 0xe2946802,
- 0x1a000008, 0xe1916002, 0x1afffc2e, 0x03a01333,
- 0xe2956802, 0x1afffc2b, 0xe198600a, 0x11a01008,
- 0x11a0200a, 0xeafffc27, 0xe198600a, 0x0a000015,
- 0xe1a01008, 0xe1a0200a, 0xe1a0300b, 0xeafffc21,
- 0xe3190080, 0x1afff02c, 0xe1b07e09, 0x4afff9cb,
- 0xe08c8c27, 0xe898000f, 0xe1b04d23, 0xe28f7000,
- 0x1afff4a5, 0x1888000f, 0xe1b04883, 0x12944802,
- 0x0a00001d, 0xe3100102, 0x1a000016, 0xe92c4000,
- 0xeb000029, 0xe8bc4000, 0xe3190702, 0x1a000005,
- 0xe28f7018, 0xe3530000, 0xdafffa5d, 0xe3190080,
- 0x0afffa2b, 0xeafffa5f, 0xe3530000, 0xba000006,
- 0xe59c5080, 0xe3150010, 0x0afffbd1, 0xe2099a07,
- 0xe08c9429, 0xe889000f, 0xeafff02a, 0xe3730040,
- 0xcafffcce, 0xeafffa4e, 0xe3a014c6, 0xe3a02000,
- 0xe3a030ff, 0xe1833383, 0xeafffbf6, 0xe3530000,
- 0x1a000008, 0xe1914002, 0x0afffff6, 0xe1b01001,
- 0x4affffdb, 0xe0922002, 0xe0b11001, 0xe2433001,
- 0x5afffffb, 0xeaffffd6, 0xe1914002, 0x1afffbe9,
- 0xe3100102, 0x0affffe1, 0xeaffffea, 0xe28f4f52,
- 0xe8940500, 0xe1510008, 0x0152000a, 0xe1a0a0a2,
- 0xe18aaf81, 0xe1a080a1, 0xe3888102, 0xe3a0b0fe,
- 0xe18bb30b, 0xe043400b, 0x92444001, 0xe92c4210,
- 0xe1a0300b, 0x8a000005, 0xe3c88101, 0xe0922002,
- 0xe0b11001, 0xe2433001, 0x5a000003, 0xea000008,
- 0xe3a00102, 0xe2722000, 0xe2f11000, 0x03520000,
- 0x0a000035, 0xe0922002, 0xe0b11001, 0xe2433001,
- 0x5afffff9, 0xe3a07000, 0xebfff1e0, 0xe92c000f,
- 0xebfff185, 0xe92c000f, 0xe28f90c4, 0xe8b90d00,
- 0xebfff125, 0xe89c0d80, 0xebfff183, 0xe8b90d00,
- 0xebfff0d8, 0xe89c0d80, 0xebfff17f, 0xe8b90d00,
- 0xebfff11d, 0xe89c0d80, 0xe92c000f, 0xe3a00102,
- 0xe8b9000e, 0xebfff178, 0xe8b90d00, 0xebfff0cd,
- 0xe28c4010, 0xe8940d80, 0xebfff173, 0xe8b90d00,
- 0xebfff111, 0xe8bc0d80, 0xebfff1c4, 0xe8bc0d80,
- 0xebfff16d, 0xe89c0d80, 0xebfff16b, 0xe8bc0d80,
- 0xebfff0bd, 0xe8bc0010, 0xebfff25e, 0xe92c000f,
- 0xe3a00000, 0xe8b9000e, 0xebfff163, 0xe8bc0d80,
- 0xebfff0b5, 0xe8bc0200, 0xe3190601, 0xe28f7074,
- 0x18970d00, 0x1bfff15c, 0xe8bc8000, 0xe3a00000,
- 0xe3a03000, 0xe28f9050, 0xeaffffed, 0xb504f333,
- 0xf9de6484, 0x8eac025b, 0x3e7076bb, 0x00004004,
- 0x9c041fd0, 0xa933ef60, 0x00004007, 0xc05ff4e0,
- 0x6c83bb96, 0x00004008, 0xca20ad9a, 0xb5e946e9,
- 0x00003ffe, 0x83125100, 0xb57f6509, 0x00004003,
- 0x803ff895, 0x9dacd228, 0x00004005, 0xb17217f7,
- 0xd1cf79ac, 0x00003ffe, 0xde5bd8a9, 0x37287195,
- 0x00003ffd, 0xe3190080, 0x1affef83, 0xe1b07e09,
- 0x4afff926, 0xe08c8c27, 0xe898000f, 0xe1b04d23,
- 0xe28f7000, 0x1afff3fc, 0x1888000f, 0xe1a04883,
- 0xe2944802, 0x0a000005, 0xe92c4000, 0xeb00000a,
- 0xe8bc4000, 0x0affff57, 0xe24f7d0a, 0xeafff4cd,
- 0xe1914002, 0x1afffb63, 0xe3100102, 0x0affff5b,
- 0xe3a00000, 0xe3a03000, 0xeaffff58, 0xe28f4f6e,
- 0xe3100102, 0x128f4f72, 0xe8b40d00, 0xe153000b,
- 0x01510008, 0x0152000a, 0x8a00005d, 0xe8940d00,
- 0xe153000b, 0x01510008, 0x0152000a, 0x3a000052,
- 0xe92c421f, 0xe28f9e1b, 0xe3a07000, 0xe8b90d00,
- 0xebfff111, 0xebfff238, 0xe3170102, 0x12644000,
- 0xe58c4010, 0xe92c0d80, 0xe3a00000, 0xe8b9000e,
- 0xebfff109, 0xe8bc0d80, 0xe92c000f, 0xe8b9000e,
- 0xe3a00102, 0xebfff104, 0xe92c000f, 0xe28c4020,
- 0xe894000f, 0xebfff20c, 0xe3170102, 0x0bfff09e,
- 0x1bfff054, 0xe1a0400c, 0xe92c000f, 0xe894000f,
- 0xebfff04d, 0xe8bc0d80, 0xebfff04b, 0xe28cc010,
- 0xe8bc0d80, 0xebfff048, 0xe88c000f, 0xebfff0ee,
- 0xe92c000f, 0xe3a07000, 0xe8b90d00, 0xebfff0ee,
- 0xe8b90d00, 0xebfff043, 0xe89c0d80, 0xebfff0ea,
- 0xe8b90d00, 0xebfff03f, 0xe89c0d80, 0xebfff0e6,
- 0xe8b90d00, 0xebfff03b, 0xe89c0d80, 0xe92c000f,
- 0xe3a00000, 0xe8b9000e, 0xebfff0df, 0xe8b90d00,
- 0xebfff034, 0xe28c7010, 0xe8970d80, 0xebfff0da,
- 0xe8b90d00, 0xebfff02f, 0xe28c7020, 0xe8970d80,
- 0xebfff0d5, 0xe8bc0d80, 0xe92c000f, 0xe2200102,
- 0xebfff025, 0xe1a07000, 0xe1a08001, 0xe1a0a002,
- 0xe1a0b003, 0xe8bc000f, 0xebfff120, 0xe8b90d00,
- 0xebfff020, 0xe28cc020, 0xe8bc4210, 0xe2844001,
- 0xe0833004, 0xe3b04000, 0xe1a0f00e, 0xe3b00000,
- 0xe3a01102, 0xe3a02000, 0xe3a03901, 0xe2433001,
- 0xe1a0f00e, 0xe3100102, 0xe3a00000, 0xe3a01000,
- 0xe3a02000, 0x13a03000, 0x13a04008, 0x03a030ff,
- 0x01833383, 0x03b04004, 0xe1a0f00e, 0xb17217f7,
- 0xd1cf79ab, 0x0000400c, 0x80000000, 0x00000000,
- 0x00003fbe, 0xb21dfe7f, 0x09e2baa9, 0x0000400c,
- 0x80000000, 0x00000000, 0x00003fbe, 0xb8aa3b29,
- 0x5c17f0bc, 0x00003fff, 0xde8082e3, 0x08654362,
- 0x00003ff2, 0xb1800000, 0x00000000, 0x00003ffe,
- 0xc99b1867, 0x2822a93e, 0x00003fea, 0xa57862e1,
- 0x46a6fb39, 0x00003ff4, 0xe8b9428e, 0xfecff592,
- 0x00003ffa, 0x80000000, 0x00000000, 0x00003ffe,
- 0x845a2157, 0x3490f106, 0x00003ff0, 0xf83a5f91,
- 0x50952c99, 0x00003ff7, 0x80000000, 0x00000000,
- 0x00003ffd, 0x80000000, 0x00000000, 0x00003ffe,
- 0xe3190080, 0x1affeecc, 0xe1b07e09, 0x4afff873,
- 0xe08c8c27, 0xe898000f, 0xe1b04d23, 0xe28f7000,
- 0x1afff345, 0x1888000f, 0xe1a04883, 0xe2944802,
- 0x0a000006, 0xe92c4000, 0xeb000007, 0xe8bc4000,
- 0x0afffea0, 0xe24f705c, 0xe2477c05, 0xeafff415,
- 0xe1914002, 0x03a01332, 0xeafffaaa, 0xe28f4f8f,
- 0xe8b40d00, 0xe153000b, 0x01510008, 0x0152000a,
- 0x8a00006c, 0xe1b01001, 0x5a000063, 0xe92c421f,
- 0xe3190601, 0xe28f9e22, 0xe3a07000, 0xe8b90d00,
- 0xebfff061, 0xebfff188, 0x1b00006d, 0xe58c4010,
- 0xe92c0d80, 0xe3a00000, 0xe8b9000e, 0xebfff05a,
- 0xe8bc0d80, 0xe92c000f, 0xe8b9000e, 0xe3a00102,
- 0xebfff055, 0xe92c000f, 0xe28c4020, 0xe894000f,
- 0xebfff15d, 0xe3170102, 0x0bffefef, 0x1bffefa5,
- 0xe1a0400c, 0xe92c000f, 0xe894000f, 0xebffef9e,
- 0xe8bc0d80, 0xebffef9c, 0xe28cc010, 0xe8bc0d80,
- 0xebffef99, 0xe3a04c3f, 0xe38440df, 0xe1530004,
- 0xba000037, 0xe88c000f, 0xebfff03b, 0xe92c000f,
- 0xe3a07000, 0xe8b90d00, 0xebfff03b, 0xe8b90d00,
- 0xebffefd9, 0xe89c0d80, 0xebfff037, 0xe8b90d00,
- 0xebffef8c, 0xe89c0d80, 0xebfff033, 0xe8b90d00,
- 0xebffefd1, 0xe89c0d80, 0xebfff02f, 0xe8b90d00,
- 0xebffef84, 0xe89c0d80, 0xe92c000f, 0xe3a00102,
- 0xe8b9000e, 0xebfff028, 0xe8b90d00, 0xebffef7d,
- 0xe28c7010, 0xe8970d80, 0xebfff023, 0xe8b90d00,
- 0xebffefc1, 0xe28c7010, 0xe8970d80, 0xebfff01e,
- 0xe28c7020, 0xe8970d80, 0xebfff01b, 0xe28c7020,
- 0xe8970d80, 0xebffef6c, 0xe8bc0d80, 0xe28cc020,
- 0xe8bc0010, 0xe3140001, 0x12200102, 0x1bfff1a7,
- 0xe29b4902, 0x4a000018, 0xe35b0000, 0x0198400a,
- 0x0a000015, 0xebfff061, 0xe8bc4200, 0xe3b04000,
- 0xe1a0f00e, 0xe24cc010, 0xe3a07000, 0xe3a08102,
- 0xe3b0a100, 0xe2eab901, 0xeaffffeb, 0xe1914002,
- 0x0affff99, 0xe2433001, 0xe0922002, 0xe0b11001,
- 0x5afffffb, 0xeaffff94, 0xe3a01332, 0xe3b02100,
- 0xe2f23902, 0xe3a04001, 0xe1a0f00e, 0xe3a01000,
- 0xe3b02100, 0xe2f33902, 0xe3a04004, 0xe8bc4200,
- 0xe1a0f00e, 0xe2844001, 0xe35b0000, 0x03a08102,
- 0xe3a06901, 0x0246b002, 0x01a0f00e, 0xe2466002,
- 0xe04b6006, 0xe3a05102, 0xe153000b, 0x01510008,
- 0x0152000a, 0x20888635, 0x21a0f00e, 0xe0588635,
- 0x51a08088, 0x524bb001, 0xe2444001, 0xe1a0f00e,
- 0xc90fdaa2, 0x00000000, 0x0000401d, 0xa2f9836e,
- 0x4e44152a, 0x00003ffe, 0x95777a5c, 0xf72cece6,
- 0x00003fed, 0xc9100000, 0x00000000, 0x00003fff,
- 0x85bba783, 0xb3c748a9, 0x00003fea, 0xa37b24c8,
- 0x4a42092e, 0x00003ff3, 0xd23cf50b, 0xf10aca84,
- 0x00003ff9, 0xeef5823f, 0xdecea969, 0x00003ffd,
- 0x80000000, 0x00000000, 0x00003fff, 0x95d5b975,
- 0x16391da8, 0x00003fef, 0xe0741531, 0xdd56f650,
- 0x00003ff6, 0x8895af2a, 0x6847fcd5, 0x00003ffc,
- 0xe3190080, 0x1affee00, 0xe1b07e09, 0x4afff7ab,
- 0xe08c8c27, 0xe898000f, 0xe1b04d23, 0xe28f7000,
- 0x1afff279, 0x1888000f, 0xe1a04883, 0xe2944802,
- 0x0a000015, 0xe1c00589, 0xe92c4000, 0xe1914002,
- 0x12433001, 0xebffff38, 0x1a000012, 0xe92c000f,
- 0xebffefa1, 0xe3a08102, 0xe3b0a100, 0xe2eab901,
- 0xebffeef8, 0xe1a07000, 0xe1a08001, 0xe1a0a002,
- 0xe1a0b003, 0xe8bc000f, 0xebffeff0, 0xe1914002,
- 0x12833001, 0xe8bc4000, 0xeafffdc2, 0xe1914002,
- 0x03a014c9, 0xeafff9cf, 0xe8bc4000, 0xe3540004,
- 0x03a03000, 0x03a00000, 0x0afffdba, 0xe3a014c9,
- 0xe3b02100, 0xe2e23902, 0xeafff9c6, 0xe3190080,
- 0x1affedd1, 0xe1b07e09, 0x4afff780, 0xe08c8c27,
- 0xe898000f, 0xe1b04d23, 0xe28f7000, 0x1afff24a,
- 0x1888000f, 0xe1b04883, 0x0a00006b, 0x52944802,
- 0x4a000072, 0xe92c4201, 0xe3a00000, 0xe3a05901,
- 0xe2455002, 0xe1530005, 0xaa000009, 0xe2094501,
- 0xe92c0010, 0xe3a04901, 0xe2444021, 0xe1530004,
- 0xba000049, 0xe92c000f, 0xebffef6b, 0xe92c000f,
- 0xea000012, 0xe2094501, 0xe2244501, 0xe92c0010,
- 0xe3a00102, 0xe3a08102, 0xe3b0a100, 0xe2eab901,
- 0xebffeebc, 0xe1914002, 0x0a00003b, 0xe2433001,
- 0xe24cc010, 0xe92c000f, 0xebfff01c, 0xe2200102,
- 0xe2833001, 0xe28c4010, 0xe884000f, 0xe89c000f,
- 0xe28f9f59, 0xe8b90d00, 0xebffeef7, 0xe89c0d80,
- 0xebffef55, 0xe8b90d00, 0xebffeeaa, 0xe89c0d80,
- 0xebffef51, 0xe8b90d00, 0xebffeeef, 0xe89c0d80,
- 0xebffef4d, 0xe8b90d00, 0xebffeea2, 0xe89c0d80,
- 0xebffef49, 0xe8b90d00, 0xebffeee7, 0xe89c0d80,
- 0xe92c000f, 0xe3a00102, 0xe8b9000e, 0xebffef42,
- 0xe8b90d00, 0xebffee97, 0xe28c7010, 0xe8970d80,
- 0xebffef3d, 0xe8b90d00, 0xebffeedb, 0xe28c7010,
- 0xe8970d80, 0xebffef38, 0xe8b90d00, 0xebffee8d,
- 0xe28c7010, 0xe8970d80, 0xebffef33, 0xe8b90d00,
- 0xebffeed1, 0xe28c7010, 0xe8970d80, 0xebffef2e,
- 0xe8bc0d80, 0xe28cc010, 0xebffef80, 0xe89c0d80,
- 0xebffef29, 0xe8bc0d80, 0xebffee7b, 0xe8bc0230,
- 0xe3190501, 0x0a000008, 0xe3150102, 0x028f5c01,
- 0x128f5f46, 0xe0855924, 0x02200102, 0xe8950d00,
- 0xebffee74, 0xe8bc4000, 0xeafffd46, 0xe3150102,
- 0xe28f50dc, 0xe0855924, 0xe8950d00, 0xebffee6d,
- 0x12200102, 0xe8bc4000, 0xeafffd3e, 0xe1915002,
- 0x0affff93, 0xe1b01001, 0x4affff91, 0xe2433001,
- 0xe0922002, 0xe0b11001, 0x5afffffb, 0xeaffff8c,
- 0xe2f35901, 0x01925081, 0x0affff89, 0xe2944802,
- 0x1a000001, 0xe1914002, 0x1afff93e, 0xe3a014ca,
- 0xe3b02100, 0xe2e23902, 0xeafff93a, 0xbe974377,
- 0xcc30f9e6, 0x00004003, 0x96f3e4b2, 0xc8e37cbc,
- 0x00004006, 0xbeee77e2, 0xb5423cf3, 0x00004007,
- 0xd0927880, 0xf5c2170b, 0x00004007, 0xa43601f1,
- 0x5c3e6196, 0x00004006, 0xb25dedaf, 0x30f3242c,
- 0x00003ffe, 0xa270bb27, 0x61c93957, 0x00004002,
- 0x9ec1654d, 0x36d4f820, 0x00004004, 0xe4d539b0,
- 0x56a451ad, 0x00004004, 0xdaf2ad41, 0xd05311c4,
- 0x00004003, 0x00000000, 0x00000000, 0x00000000,
- 0x00000000, 0xc90fdaa2, 0x2168c235, 0x00003fff,
- 0xc90fdaa2, 0x2168c235, 0x00004000, 0x00000000,
- 0xc90fdaa2, 0x2168c235, 0x00003fff, 0xe3190080,
- 0x1affed19, 0xe2096807, 0xe08c6626, 0xe896000f,
- 0xe1b04d23, 0xe28f7000, 0x1afff193, 0x1886000f,
- 0xe2000102, 0xe183b000, 0xe1a0a002, 0xe1a08001,
- 0xe1b06e09, 0x4afff6c9, 0xe08c6c26, 0xe896000f,
- 0xe1b04d23, 0xe28f7000, 0x1afff187, 0x1886000f,
- 0xe1a0700b, 0xe3cbb102, 0xe1b04883, 0x12944802,
- 0x11b0588b, 0x12955802, 0x192c4281, 0x1bffef0b,
- 0x1a00004e, 0xe1b04883, 0x1a000010, 0xe1915002,
- 0x1a00000a, 0xe1b0588b, 0x0198600a, 0x0a00001f,
- 0xe2955802, 0x1a000016, 0xe198600a, 0x0a000014,
- 0xe1a01008, 0xe1a0200a, 0xe1a0300b, 0xeafff8e1,
- 0xe0922002, 0xe0b11001, 0xe2433001, 0x5afffffb,
- 0xe1b0588b, 0x1a000019, 0xe198600a, 0x1a000013,
- 0xe2944802, 0x1a000001, 0xe1916002, 0x1afff8d5,
- 0xe1a04000, 0xe1a05007, 0xe28f0fbd, 0xe890000e,
- 0xea00008c, 0xe1a04000, 0xe1a05007, 0xe3a00000,
- 0xe3a01000, 0xe3a02000, 0xe3a03000, 0xea00007d,
- 0xe3a014cb, 0xe3b02100, 0xe2e23902, 0xeafff8c5,
- 0xe09aa00a, 0xe0b88008, 0xe24bb001, 0x5afffffb,
- 0xe2956802, 0x12946802, 0x1affffca, 0xe2946802,
- 0x1a000006, 0xe1916002, 0x1afff8ba, 0xe2956802,
- 0x1affffe2, 0xe198600a, 0x03a014cb, 0x0afff8b5,
- 0xe198600a, 0x0affffe2, 0xe1a01008, 0xe1a0200a,
- 0xe1a0300b, 0xeafff8af, 0xe3190080, 0x1affecba,
- 0xe1b07e09, 0x4afff671, 0xe08c8c27, 0xe898000f,
- 0xe1b04d23, 0xe28f7000, 0x1afff133, 0x1888000f,
- 0xe1b04883, 0x12944802, 0x0a000060, 0xe92c4281,
- 0xe3b00100, 0xe2f34901, 0xdbffeeb0, 0xd3a04002,
- 0xc3a04000, 0xe28f9d06, 0xe8b90d00, 0xe153000b,
- 0x01510008, 0x0152000a, 0xc2844001, 0xe92c0010,
- 0xda00000d, 0xe92c000f, 0xe8990d00, 0xebffedad,
- 0xe8bc0d80, 0xe92c000f, 0xe3a00000, 0xe8b9000e,
- 0xebffee51, 0xe3a08102, 0xe3b0a100, 0xe2eab901,
- 0xebffeded, 0xe8bc0d80, 0xebffeea0, 0xe3a04901,
- 0xe2444021, 0xe1530004, 0xba00002c, 0xe92c000f,
- 0xebffee41, 0xe92c000f, 0xe28f9f49, 0xe8b90d00,
- 0xebffed98, 0xe89c0d80, 0xebffee3f, 0xe8b90d00,
- 0xebffed94, 0xe89c0d80, 0xebffee3b, 0xe8b90d00,
- 0xebffed90, 0xe89c0d80, 0xebffee37, 0xe8b90d00,
- 0xebffed8c, 0xe89c0d80, 0xe92c000f, 0xe3a00102,
- 0xe8b9000e, 0xebffee30, 0xe8b90d00, 0xebffedce,
- 0xe28c7010, 0xe8970d80, 0xebffee2b, 0xe8b90d00,
- 0xebffedc9, 0xe28c7010, 0xe8970d80, 0xebffee26,
- 0xe8b90d00, 0xebffedc4, 0xe28c7010, 0xe8970d80,
- 0xebffee21, 0xe8bc0d80, 0xe28cc010, 0xebffee73,
- 0xe89c0d80, 0xebffee1c, 0xe8bc0d80, 0xebffed6e,
- 0xe28f90dc, 0xe8bc0010, 0xe0200f04, 0xe0899204,
- 0xe8990d00, 0xebffed6b, 0xe8bc4230, 0xe3190601,
- 0x10200004, 0x1afffc3b, 0xe3150102, 0x0a000005,
- 0xe92c4010, 0xe2200102, 0xe24f7d0d, 0xe8970d00,
- 0xebffed60, 0xe8bc4010, 0xe0200004, 0xeafffc31,
- 0xe3530000, 0x0afffc2f, 0xe1914002, 0x1afff83d,
- 0xe28f009c, 0xe890000e, 0xeafffc2a, 0x8930a2f4,
- 0xf66ab18a, 0x00003ffd, 0xddb3d742, 0xc265539e,
- 0x00003fff, 0xf0624f0a, 0x56388310, 0x00004002,
- 0xee505190, 0x6d1eb4e8, 0x00004004, 0xac509020,
- 0x5b6d243b, 0x00004005, 0xa443e5e6, 0x24ad4b90,
- 0x00004004, 0xd66bd6cd, 0x8c3de934, 0x00003ffe,
- 0x87e9fae4, 0x6b531a29, 0x00004002, 0xa40bfdcf,
- 0x15e65691, 0x00004003, 0xdb053288, 0x30e70eb4,
- 0x00004002, 0x00000000, 0x00000000, 0x00000000,
- 0x00000000, 0x860a91c1, 0x6b9b2c23, 0x00003ffe,
- 0x00000000, 0xc90fdaa2, 0x2168c235, 0x00003fff,
- 0x00000000, 0x860a91c1, 0x6b9b2c23, 0x00003fff,
- 0xe92d5001, 0xe24fc05c, 0xe24ccc50, 0xe3a00807,
- 0xe58c0080, 0xe8bd9001, 0xe1a00000, 0xe3100001,
- 0x128f0e15, 0x1a00000a, 0xe3100004, 0x128f0f47,
- 0x1a000007, 0xe3100002, 0x128f00e0, 0x1a000004,
- 0xe3100008, 0x128f00a8, 0x1a000001, 0xe28f0070,
- 0xeaffffff, 0xe28f101c, 0xe14fb000, 0xe8bd07f8,
- 0xe8a107f8, 0xe8bd07f8, 0xe24aa004, 0xe8a10ff8,
- 0xe28f1000, 0xef000071, 0x00000000, 0x00000000,
- 0x00000000, 0x00000000, 0x00000000, 0x00000000,
- 0x00000000, 0x00000000, 0x00000000, 0x00000000,
- 0x00000000, 0x00000000, 0x00000000, 0x00000000,
- 0x00000000, 0x00000000, 0x00000000, 0x00002278,
- 0xffffffff, 0x80000204, 0x616f6c46, 0x676e6974,
- 0x696f5020, 0x4520746e, 0x70656378, 0x6e6f6974,
- 0x49203a20, 0x6178656e, 0x52207463, 0x6c757365,
- 0x00000074, 0x80000203, 0x616f6c46, 0x676e6974,
- 0x696f5020, 0x4520746e, 0x70656378, 0x6e6f6974,
- 0x55203a20, 0x7265646e, 0x776f6c66, 0x00000000,
- 0x80000202, 0x616f6c46, 0x676e6974, 0x696f5020,
- 0x4520746e, 0x70656378, 0x6e6f6974, 0x44203a20,
- 0x64697669, 0x79422065, 0x72655a20, 0x0000006f,
- 0x80000201, 0x616f6c46, 0x676e6974, 0x696f5020,
- 0x4520746e, 0x70656378, 0x6e6f6974, 0x4f203a20,
- 0x66726576, 0x00776f6c, 0x80000200, 0x616f6c46,
- 0x676e6974, 0x696f5020, 0x4520746e, 0x70656378,
- 0x6e6f6974, 0x49203a20, 0x6c61766e, 0x4f206469,
- 0x61726570, 0x6e6f6974, 0x00000000, 0xfefefeff, 0
-};
-
-unsigned long fpesize = 0x00005300;
diff --git a/sim/arm/arminit.c b/sim/arm/arminit.c
deleted file mode 100644
index bdbb2c77771..00000000000
--- a/sim/arm/arminit.c
+++ /dev/null
@@ -1,319 +0,0 @@
-/* arminit.c -- ARMulator initialization: ARM6 Instruction Emulator.
- Copyright (C) 1994 Advanced RISC Machines Ltd.
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
-
-#include "armdefs.h"
-#include "armemu.h"
-
-/***************************************************************************\
-* Definitions for the emulator architecture *
-\***************************************************************************/
-
-void ARMul_EmulateInit (void);
-ARMul_State *ARMul_NewState (void);
-void ARMul_Reset (ARMul_State * state);
-ARMword ARMul_DoCycle (ARMul_State * state);
-unsigned ARMul_DoCoPro (ARMul_State * state);
-ARMword ARMul_DoProg (ARMul_State * state);
-ARMword ARMul_DoInstr (ARMul_State * state);
-void ARMul_Abort (ARMul_State * state, ARMword address);
-
-unsigned ARMul_MultTable[32] =
- { 1, 2, 2, 3, 3, 4, 4, 5, 5, 6, 6, 7, 7, 8, 8, 9, 9,
- 10, 10, 11, 11, 12, 12, 13, 13, 14, 14, 15, 15, 16, 16, 16
-};
-ARMword ARMul_ImmedTable[4096]; /* immediate DP LHS values */
-char ARMul_BitList[256]; /* number of bits in a byte table */
-
-/***************************************************************************\
-* Call this routine once to set up the emulator's tables. *
-\***************************************************************************/
-
-void
-ARMul_EmulateInit (void)
-{
- unsigned long i, j;
-
- for (i = 0; i < 4096; i++)
- { /* the values of 12 bit dp rhs's */
- ARMul_ImmedTable[i] = ROTATER (i & 0xffL, (i >> 7L) & 0x1eL);
- }
-
- for (i = 0; i < 256; ARMul_BitList[i++] = 0); /* how many bits in LSM */
- for (j = 1; j < 256; j <<= 1)
- for (i = 0; i < 256; i++)
- if ((i & j) > 0)
- ARMul_BitList[i]++;
-
- for (i = 0; i < 256; i++)
- ARMul_BitList[i] *= 4; /* you always need 4 times these values */
-
-}
-
-/***************************************************************************\
-* Returns a new instantiation of the ARMulator's state *
-\***************************************************************************/
-
-ARMul_State *
-ARMul_NewState (void)
-{
- ARMul_State *state;
- unsigned i, j;
-
- state = (ARMul_State *) malloc (sizeof (ARMul_State));
- memset (state, 0, sizeof (ARMul_State));
-
- state->Emulate = RUN;
- for (i = 0; i < 16; i++)
- {
- state->Reg[i] = 0;
- for (j = 0; j < 7; j++)
- state->RegBank[j][i] = 0;
- }
- for (i = 0; i < 7; i++)
- state->Spsr[i] = 0;
-
- /* state->Mode = USER26MODE; */
- state->Mode = USER32MODE;
-
- state->CallDebug = FALSE;
- state->Debug = FALSE;
- state->VectorCatch = 0;
- state->Aborted = FALSE;
- state->Reseted = FALSE;
- state->Inted = 3;
- state->LastInted = 3;
-
- state->MemDataPtr = NULL;
- state->MemInPtr = NULL;
- state->MemOutPtr = NULL;
- state->MemSparePtr = NULL;
- state->MemSize = 0;
-
- state->OSptr = NULL;
- state->CommandLine = NULL;
-
- state->CP14R0_CCD = -1;
- state->LastTime = 0;
-
- state->EventSet = 0;
- state->Now = 0;
- state->EventPtr = (struct EventNode **) malloc ((unsigned) EVENTLISTSIZE *
- sizeof (struct EventNode
- *));
- for (i = 0; i < EVENTLISTSIZE; i++)
- *(state->EventPtr + i) = NULL;
-
- state->prog32Sig = HIGH;
- state->data32Sig = HIGH;
-
- state->lateabtSig = LOW;
- state->bigendSig = LOW;
-
- state->is_v4 = LOW;
- state->is_v5 = LOW;
- state->is_v5e = LOW;
- state->is_XScale = LOW;
-
- ARMul_Reset (state);
-
- return state;
-}
-
-/***************************************************************************\
- Call this routine to set ARMulator to model certain processor properities
-\***************************************************************************/
-
-void
-ARMul_SelectProcessor (ARMul_State * state, unsigned properties)
-{
- if (properties & ARM_Fix26_Prop)
- {
- state->prog32Sig = LOW;
- state->data32Sig = LOW;
- }
- else
- {
- state->prog32Sig = HIGH;
- state->data32Sig = HIGH;
- }
-
- state->lateabtSig = LOW;
-
- state->is_v4 = (properties & (ARM_v4_Prop | ARM_v5_Prop)) ? HIGH : LOW;
- state->is_v5 = (properties & ARM_v5_Prop) ? HIGH : LOW;
- state->is_v5e = (properties & ARM_v5e_Prop) ? HIGH : LOW;
- state->is_XScale = (properties & ARM_XScale_Prop) ? HIGH : LOW;
-}
-
-/***************************************************************************\
-* Call this routine to set up the initial machine state (or perform a RESET *
-\***************************************************************************/
-
-void
-ARMul_Reset (ARMul_State * state)
-{
- state->NextInstr = 0;
-
- if (state->prog32Sig)
- {
- state->Reg[15] = 0;
- state->Cpsr = INTBITS | SVC32MODE;
- state->Mode = SVC32MODE;
- }
- else
- {
- state->Reg[15] = R15INTBITS | SVC26MODE;
- state->Cpsr = INTBITS | SVC26MODE;
- state->Mode = SVC26MODE;
- }
-
- ARMul_CPSRAltered (state);
- state->Bank = SVCBANK;
-
- FLUSHPIPE;
-
- state->EndCondition = 0;
- state->ErrorCode = 0;
-
- state->Exception = FALSE;
- state->NresetSig = HIGH;
- state->NfiqSig = HIGH;
- state->NirqSig = HIGH;
- state->NtransSig = (state->Mode & 3) ? HIGH : LOW;
- state->abortSig = LOW;
- state->AbortAddr = 1;
-
- state->NumInstrs = 0;
- state->NumNcycles = 0;
- state->NumScycles = 0;
- state->NumIcycles = 0;
- state->NumCcycles = 0;
- state->NumFcycles = 0;
-#ifdef ASIM
- (void) ARMul_MemoryInit ();
- ARMul_OSInit (state);
-#endif
-}
-
-
-/***************************************************************************\
-* Emulate the execution of an entire program. Start the correct emulator *
-* (Emulate26 for a 26 bit ARM and Emulate32 for a 32 bit ARM), return the *
-* address of the last instruction that is executed. *
-\***************************************************************************/
-
-ARMword
-ARMul_DoProg (ARMul_State * state)
-{
- ARMword pc = 0;
-
- state->Emulate = RUN;
- while (state->Emulate != STOP)
- {
- state->Emulate = RUN;
- if (state->prog32Sig && ARMul_MODE32BIT)
- pc = ARMul_Emulate32 (state);
- else
- pc = ARMul_Emulate26 (state);
- }
- return (pc);
-}
-
-/***************************************************************************\
-* Emulate the execution of one instruction. Start the correct emulator *
-* (Emulate26 for a 26 bit ARM and Emulate32 for a 32 bit ARM), return the *
-* address of the instruction that is executed. *
-\***************************************************************************/
-
-ARMword
-ARMul_DoInstr (ARMul_State * state)
-{
- ARMword pc = 0;
-
- state->Emulate = ONCE;
- if (state->prog32Sig && ARMul_MODE32BIT)
- pc = ARMul_Emulate32 (state);
- else
- pc = ARMul_Emulate26 (state);
-
- return (pc);
-}
-
-/***************************************************************************\
-* This routine causes an Abort to occur, including selecting the correct *
-* mode, register bank, and the saving of registers. Call with the *
-* appropriate vector's memory address (0,4,8 ....) *
-\***************************************************************************/
-
-void
-ARMul_Abort (ARMul_State * state, ARMword vector)
-{
- ARMword temp;
- int isize = INSN_SIZE;
- int esize = (TFLAG ? 0 : 4);
- int e2size = (TFLAG ? -4 : 0);
-
- state->Aborted = FALSE;
-
- if (ARMul_OSException (state, vector, ARMul_GetPC (state)))
- return;
-
- if (state->prog32Sig)
- if (ARMul_MODE26BIT)
- temp = R15PC;
- else
- temp = state->Reg[15];
- else
- temp = R15PC | ECC | ER15INT | EMODE;
-
- switch (vector)
- {
- case ARMul_ResetV: /* RESET */
- SETABORT (INTBITS, state->prog32Sig ? SVC32MODE : SVC26MODE, 0);
- break;
- case ARMul_UndefinedInstrV: /* Undefined Instruction */
- SETABORT (IBIT, state->prog32Sig ? UNDEF32MODE : SVC26MODE, isize);
- break;
- case ARMul_SWIV: /* Software Interrupt */
- SETABORT (IBIT, state->prog32Sig ? SVC32MODE : SVC26MODE, isize);
- break;
- case ARMul_PrefetchAbortV: /* Prefetch Abort */
- state->AbortAddr = 1;
- SETABORT (IBIT, state->prog32Sig ? ABORT32MODE : SVC26MODE, esize);
- break;
- case ARMul_DataAbortV: /* Data Abort */
- SETABORT (IBIT, state->prog32Sig ? ABORT32MODE : SVC26MODE, e2size);
- break;
- case ARMul_AddrExceptnV: /* Address Exception */
- SETABORT (IBIT, SVC26MODE, isize);
- break;
- case ARMul_IRQV: /* IRQ */
- if (!state->is_XScale
- || (state->CPRead[13](state, 0, 0) & ARMul_CP13_R0_IRQ))
- SETABORT (IBIT, state->prog32Sig ? IRQ32MODE : IRQ26MODE, esize);
- break;
- case ARMul_FIQV: /* FIQ */
- if (!state->is_XScale
- || (state->CPRead[13](state, 0, 0) & ARMul_CP13_R0_FIQ))
- SETABORT (INTBITS, state->prog32Sig ? FIQ32MODE : FIQ26MODE, esize);
- break;
- }
- if (ARMul_MODE32BIT)
- ARMul_SetR15 (state, vector);
- else
- ARMul_SetR15 (state, R15CCINTMODE | vector);
-}
diff --git a/sim/arm/armopts.h b/sim/arm/armopts.h
deleted file mode 100644
index c3b5cb770d3..00000000000
--- a/sim/arm/armopts.h
+++ /dev/null
@@ -1,23 +0,0 @@
-/* armopts.h -- ARMulator configuration options: ARM6 Instruction Emulator.
- Copyright (C) 1994 Advanced RISC Machines Ltd.
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
-
-/* Define one of ARM60 or ARM61 */
-#ifndef ARM60
-#ifndef ARM61
-#define ARM60
-#endif
-#endif
diff --git a/sim/arm/armos.c b/sim/arm/armos.c
deleted file mode 100644
index 93dcbd89345..00000000000
--- a/sim/arm/armos.c
+++ /dev/null
@@ -1,680 +0,0 @@
-/* armos.c -- ARMulator OS interface: ARM6 Instruction Emulator.
- Copyright (C) 1994 Advanced RISC Machines Ltd.
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
-
-/* This file contains a model of Demon, ARM Ltd's Debug Monitor,
- including all the SWI's required to support the C library. The code in
- it is not really for the faint-hearted (especially the abort handling
- code), but it is a complete example. Defining NOOS will disable all the
- fun, and definign VAILDATE will define SWI 1 to enter SVC mode, and SWI
- 0x11 to halt the emulator. */
-
-#include "config.h"
-#include "ansidecl.h"
-
-#include <time.h>
-#include <errno.h>
-#include <string.h>
-#include <fcntl.h>
-
-#ifndef O_RDONLY
-#define O_RDONLY 0
-#endif
-#ifndef O_WRONLY
-#define O_WRONLY 1
-#endif
-#ifndef O_RDWR
-#define O_RDWR 2
-#endif
-#ifndef O_BINARY
-#define O_BINARY 0
-#endif
-
-#ifdef __STDC__
-#define unlink(s) remove(s)
-#endif
-
-#ifdef HAVE_UNISTD_H
-#include <unistd.h> /* For SEEK_SET etc */
-#endif
-
-#ifdef __riscos
-extern int _fisatty (FILE *);
-#define isatty_(f) _fisatty(f)
-#else
-#ifdef __ZTC__
-#include <io.h>
-#define isatty_(f) isatty((f)->_file)
-#else
-#ifdef macintosh
-#include <ioctl.h>
-#define isatty_(f) (~ioctl ((f)->_file, FIOINTERACTIVE, NULL))
-#else
-#define isatty_(f) isatty (fileno (f))
-#endif
-#endif
-#endif
-
-#include "armdefs.h"
-#include "armos.h"
-#include "armemu.h"
-
-#ifndef NOOS
-#ifndef VALIDATE
-/* #ifndef ASIM */
-#include "armfpe.h"
-/* #endif */
-#endif
-#endif
-
-/* For RDIError_BreakpointReached. */
-#include "dbg_rdi.h"
-
-extern unsigned ARMul_OSInit (ARMul_State * state);
-extern void ARMul_OSExit (ARMul_State * state);
-extern unsigned ARMul_OSHandleSWI (ARMul_State * state, ARMword number);
-extern unsigned ARMul_OSException (ARMul_State * state, ARMword vector,
- ARMword pc);
-extern ARMword ARMul_OSLastErrorP (ARMul_State * state);
-extern ARMword ARMul_Debug (ARMul_State * state, ARMword pc, ARMword instr);
-
-#define BUFFERSIZE 4096
-#ifndef FOPEN_MAX
-#define FOPEN_MAX 64
-#endif
-#define UNIQUETEMPS 256
-
-/* OS private Information. */
-
-struct OSblock
-{
- ARMword Time0;
- ARMword ErrorP;
- ARMword ErrorNo;
- FILE *FileTable[FOPEN_MAX];
- char FileFlags[FOPEN_MAX];
- char *tempnames[UNIQUETEMPS];
-};
-
-#define NOOP 0
-#define BINARY 1
-#define READOP 2
-#define WRITEOP 4
-
-#ifdef macintosh
-#define FIXCRLF(t,c) ((t & BINARY) ? \
- c : \
- ((c == '\n' || c == '\r' ) ? (c ^ 7) : c) \
- )
-#else
-#define FIXCRLF(t,c) c
-#endif
-
-static ARMword softvectorcode[] =
-{
- /* Basic: swi tidyexception + event; mov pc, lr;
- ldmia r11,{r11,pc}; swi generateexception + event. */
- 0xef000090, 0xe1a0e00f, 0xe89b8800, 0xef000080, /* Reset */
- 0xef000091, 0xe1a0e00f, 0xe89b8800, 0xef000081, /* Undef */
- 0xef000092, 0xe1a0e00f, 0xe89b8800, 0xef000082, /* SWI */
- 0xef000093, 0xe1a0e00f, 0xe89b8800, 0xef000083, /* Prefetch abort */
- 0xef000094, 0xe1a0e00f, 0xe89b8800, 0xef000084, /* Data abort */
- 0xef000095, 0xe1a0e00f, 0xe89b8800, 0xef000085, /* Address exception */
- 0xef000096, 0xe1a0e00f, 0xe89b8800, 0xef000086, /* IRQ */
- 0xef000097, 0xe1a0e00f, 0xe89b8800, 0xef000087, /* FIQ */
- 0xef000098, 0xe1a0e00f, 0xe89b8800, 0xef000088, /* Error */
- 0xe1a0f00e /* Default handler */
-};
-
-/* Time for the Operating System to initialise itself. */
-
-unsigned
-ARMul_OSInit (ARMul_State * state)
-{
-#ifndef NOOS
-#ifndef VALIDATE
- ARMword instr, i, j;
- struct OSblock *OSptr = (struct OSblock *) state->OSptr;
-
- if (state->OSptr == NULL)
- {
- state->OSptr = (unsigned char *) malloc (sizeof (struct OSblock));
- if (state->OSptr == NULL)
- {
- perror ("OS Memory");
- exit (15);
- }
- }
-
- OSptr = (struct OSblock *) state->OSptr;
- OSptr->ErrorP = 0;
- state->Reg[13] = ADDRSUPERSTACK; /* set up a stack for the current mode */
- ARMul_SetReg (state, SVC32MODE, 13, ADDRSUPERSTACK); /* and for supervisor mode */
- ARMul_SetReg (state, ABORT32MODE, 13, ADDRSUPERSTACK); /* and for abort 32 mode */
- ARMul_SetReg (state, UNDEF32MODE, 13, ADDRSUPERSTACK); /* and for undef 32 mode */
- ARMul_SetReg (state, SYSTEMMODE, 13, ADDRSUPERSTACK); /* and for system mode */
- instr = 0xe59ff000 | (ADDRSOFTVECTORS - 8); /* load pc from soft vector */
-
- for (i = ARMul_ResetV; i <= ARMFIQV; i += 4)
- ARMul_WriteWord (state, i, instr); /* write hardware vectors */
-
- SWI_vector_installed = 0;
-
- for (i = ARMul_ResetV; i <= ARMFIQV + 4; i += 4)
- {
- ARMul_WriteWord (state, ADDRSOFTVECTORS + i, SOFTVECTORCODE + i * 4);
- ARMul_WriteWord (state, ADDRSOFHANDLERS + 2 * i + 4L,
- SOFTVECTORCODE + sizeof (softvectorcode) - 4L);
- }
-
- for (i = 0; i < sizeof (softvectorcode); i += 4)
- ARMul_WriteWord (state, SOFTVECTORCODE + i, softvectorcode[i / 4]);
-
- for (i = 0; i < FOPEN_MAX; i++)
- OSptr->FileTable[i] = NULL;
-
- for (i = 0; i < UNIQUETEMPS; i++)
- OSptr->tempnames[i] = NULL;
-
- ARMul_ConsolePrint (state, ", Demon 1.01");
-
-/* #ifndef ASIM */
-
- /* install fpe */
- for (i = 0; i < fpesize; i += 4) /* copy the code */
- ARMul_WriteWord (state, FPESTART + i, fpecode[i >> 2]);
-
- for (i = FPESTART + fpesize;; i -= 4)
- { /* reverse the error strings */
- if ((j = ARMul_ReadWord (state, i)) == 0xffffffff)
- break;
- if (state->bigendSig && j < 0x80000000)
- { /* it's part of the string so swap it */
- j = ((j >> 0x18) & 0x000000ff) |
- ((j >> 0x08) & 0x0000ff00) |
- ((j << 0x08) & 0x00ff0000) | ((j << 0x18) & 0xff000000);
- ARMul_WriteWord (state, i, j);
- }
- }
-
- ARMul_WriteWord (state, FPEOLDVECT, ARMul_ReadWord (state, 4)); /* copy old illegal instr vector */
- ARMul_WriteWord (state, 4, FPENEWVECT (ARMul_ReadWord (state, i - 4))); /* install new vector */
- ARMul_ConsolePrint (state, ", FPE");
-
-/* #endif ASIM */
-#endif /* VALIDATE */
-#endif /* NOOS */
-
- return TRUE;
-}
-
-void
-ARMul_OSExit (ARMul_State * state)
-{
- free ((char *) state->OSptr);
-}
-
-
-/* Return the last Operating System Error. */
-
-ARMword ARMul_OSLastErrorP (ARMul_State * state)
-{
- return ((struct OSblock *) state->OSptr)->ErrorP;
-}
-
-static int translate_open_mode[] =
-{
- O_RDONLY, /* "r" */
- O_RDONLY + O_BINARY, /* "rb" */
- O_RDWR, /* "r+" */
- O_RDWR + O_BINARY, /* "r+b" */
- O_WRONLY + O_CREAT + O_TRUNC, /* "w" */
- O_WRONLY + O_BINARY + O_CREAT + O_TRUNC, /* "wb" */
- O_RDWR + O_CREAT + O_TRUNC, /* "w+" */
- O_RDWR + O_BINARY + O_CREAT + O_TRUNC, /* "w+b" */
- O_WRONLY + O_APPEND + O_CREAT, /* "a" */
- O_WRONLY + O_BINARY + O_APPEND + O_CREAT, /* "ab" */
- O_RDWR + O_APPEND + O_CREAT, /* "a+" */
- O_RDWR + O_BINARY + O_APPEND + O_CREAT /* "a+b" */
-};
-
-static void
-SWIWrite0 (ARMul_State * state, ARMword addr)
-{
- ARMword temp;
- struct OSblock *OSptr = (struct OSblock *) state->OSptr;
-
- while ((temp = ARMul_SafeReadByte (state, addr++)) != 0)
- (void) fputc ((char) temp, stdout);
-
- OSptr->ErrorNo = errno;
-}
-
-static void
-WriteCommandLineTo (ARMul_State * state, ARMword addr)
-{
- ARMword temp;
- char *cptr = state->CommandLine;
-
- if (cptr == NULL)
- cptr = "\0";
- do
- {
- temp = (ARMword) * cptr++;
- ARMul_SafeWriteByte (state, addr++, temp);
- }
- while (temp != 0);
-}
-
-static void
-SWIopen (ARMul_State * state, ARMword name, ARMword SWIflags)
-{
- struct OSblock *OSptr = (struct OSblock *) state->OSptr;
- char dummy[2000];
- int flags;
- int i;
-
- for (i = 0; (dummy[i] = ARMul_SafeReadByte (state, name + i)); i++)
- ;
-
- /* Now we need to decode the Demon open mode. */
- flags = translate_open_mode[SWIflags];
-
- /* Filename ":tt" is special: it denotes stdin/out. */
- if (strcmp (dummy, ":tt") == 0)
- {
- if (flags == O_RDONLY) /* opening tty "r" */
- state->Reg[0] = 0; /* stdin */
- else
- state->Reg[0] = 1; /* stdout */
- }
- else
- {
- state->Reg[0] = (int) open (dummy, flags, 0666);
- OSptr->ErrorNo = errno;
- }
-}
-
-static void
-SWIread (ARMul_State * state, ARMword f, ARMword ptr, ARMword len)
-{
- struct OSblock *OSptr = (struct OSblock *) state->OSptr;
- int res;
- int i;
- char *local = malloc (len);
-
- if (local == NULL)
- {
- fprintf (stderr, "sim: Unable to read 0x%ulx bytes - out of memory\n",
- len);
- return;
- }
-
- res = read (f, local, len);
- if (res > 0)
- for (i = 0; i < res; i++)
- ARMul_SafeWriteByte (state, ptr + i, local[i]);
-
- free (local);
- state->Reg[0] = res == -1 ? -1 : len - res;
- OSptr->ErrorNo = errno;
-}
-
-static void
-SWIwrite (ARMul_State * state, ARMword f, ARMword ptr, ARMword len)
-{
- struct OSblock *OSptr = (struct OSblock *) state->OSptr;
- int res;
- ARMword i;
- char *local = malloc (len);
-
- if (local == NULL)
- {
- fprintf (stderr, "sim: Unable to write 0x%lx bytes - out of memory\n",
- (long) len);
- return;
- }
-
- for (i = 0; i < len; i++)
- local[i] = ARMul_SafeReadByte (state, ptr + i);
-
- res = write (f, local, len);
- state->Reg[0] = res == -1 ? -1 : len - res;
- free (local);
-
- OSptr->ErrorNo = errno;
-}
-
-static void
-SWIflen (ARMul_State * state, ARMword fh)
-{
- struct OSblock *OSptr = (struct OSblock *) state->OSptr;
- ARMword addr;
-
- if (fh == 0 || fh > FOPEN_MAX)
- {
- OSptr->ErrorNo = EBADF;
- state->Reg[0] = -1L;
- return;
- }
-
- addr = lseek (fh, 0, SEEK_CUR);
-
- state->Reg[0] = lseek (fh, 0L, SEEK_END);
- (void) lseek (fh, addr, SEEK_SET);
-
- OSptr->ErrorNo = errno;
-}
-
-/* The emulator calls this routine when a SWI instruction is encuntered.
- The parameter passed is the SWI number (lower 24 bits of the instruction). */
-
-unsigned
-ARMul_OSHandleSWI (ARMul_State * state, ARMword number)
-{
- ARMword addr;
- ARMword temp;
- ARMword saved_number = 0;
- struct OSblock * OSptr = (struct OSblock *) state->OSptr;
-
- /* Intel do not want DEMON SWI support. */
- if (state->is_XScale)
- switch (number)
- {
- case SWI_Read:
- case SWI_Write:
- case SWI_Open:
- case SWI_Clock:
- case SWI_Time:
- case SWI_Close:
- case SWI_Flen:
- case SWI_Exit:
- case SWI_Seek:
- case SWI_WriteC:
- case SWI_Write0:
- case SWI_GetErrno:
- case SWI_GetEnv:
- saved_number = number;
- number = -1;
- default:
- break;
- }
-
- switch (number)
- {
- case SWI_Read:
- SWIread (state, state->Reg[0], state->Reg[1], state->Reg[2]);
- break;
-
- case SWI_Write:
- SWIwrite (state, state->Reg[0], state->Reg[1], state->Reg[2]);
- break;
-
- case SWI_Open:
- SWIopen (state, state->Reg[0], state->Reg[1]);
- break;
-
- case SWI_Clock:
- /* Return number of centi-seconds. */
- state->Reg[0] =
-#ifdef CLOCKS_PER_SEC
- (CLOCKS_PER_SEC >= 100)
- ? (ARMword) (clock () / (CLOCKS_PER_SEC / 100))
- : (ARMword) ((clock () * 100) / CLOCKS_PER_SEC);
-#else
- /* Presume unix... clock() returns microseconds. */
- (ARMword) (clock () / 10000);
-#endif
- OSptr->ErrorNo = errno;
- break;
-
- case SWI_Time:
- state->Reg[0] = (ARMword) time (NULL);
- OSptr->ErrorNo = errno;
- break;
-
- case SWI_Close:
- state->Reg[0] = close (state->Reg[0]);
- OSptr->ErrorNo = errno;
- break;
-
- case SWI_Flen:
- SWIflen (state, state->Reg[0]);
- break;
-
- case SWI_Exit:
- state->Emulate = FALSE;
- break;
-
- case SWI_Seek:
- /* We must return non-zero for failure. */
- state->Reg[0] = -1 >= lseek (state->Reg[0], state->Reg[1], SEEK_SET);
- OSptr->ErrorNo = errno;
- break;
-
- case SWI_WriteC:
- (void) fputc ((int) state->Reg[0], stdout);
- OSptr->ErrorNo = errno;
- break;
-
- case SWI_Write0:
- SWIWrite0 (state, state->Reg[0]);
- break;
-
- case SWI_GetErrno:
- state->Reg[0] = OSptr->ErrorNo;
- break;
-
- case SWI_GetEnv:
- state->Reg[0] = ADDRCMDLINE;
- if (state->MemSize)
- state->Reg[1] = state->MemSize;
- else
- state->Reg[1] = ADDRUSERSTACK;
-
- WriteCommandLineTo (state, state->Reg[0]);
- break;
-
- case SWI_Breakpoint:
- state->EndCondition = RDIError_BreakpointReached;
- state->Emulate = FALSE;
- break;
-
- /* Handle Angel SWIs as well as Demon ones. */
- case AngelSWI_ARM:
- case AngelSWI_Thumb:
- /* R1 is almost always a parameter block. */
- addr = state->Reg[1];
- /* R0 is a reason code. */
- switch (state->Reg[0])
- {
- /* Unimplemented reason codes. */
- case AngelSWI_Reason_ReadC:
- case AngelSWI_Reason_IsTTY:
- case AngelSWI_Reason_TmpNam:
- case AngelSWI_Reason_Remove:
- case AngelSWI_Reason_Rename:
- case AngelSWI_Reason_System:
- case AngelSWI_Reason_EnterSVC:
- default:
- state->Emulate = FALSE;
- return FALSE;
-
- case AngelSWI_Reason_Clock:
- /* Return number of centi-seconds. */
- state->Reg[0] =
-#ifdef CLOCKS_PER_SEC
- (CLOCKS_PER_SEC >= 100)
- ? (ARMword) (clock () / (CLOCKS_PER_SEC / 100))
- : (ARMword) ((clock () * 100) / CLOCKS_PER_SEC);
-#else
- /* Presume unix... clock() returns microseconds. */
- (ARMword) (clock () / 10000);
-#endif
- OSptr->ErrorNo = errno;
- break;
-
- case AngelSWI_Reason_Time:
- state->Reg[0] = (ARMword) time (NULL);
- OSptr->ErrorNo = errno;
- break;
-
- case AngelSWI_Reason_WriteC:
- (void) fputc ((int) ARMul_SafeReadByte (state, addr), stdout);
- OSptr->ErrorNo = errno;
- /* Fall thgrough. */
-
- case AngelSWI_Reason_Write0:
- SWIWrite0 (state, addr);
- break;
-
- case AngelSWI_Reason_Close:
- state->Reg[0] = close (ARMul_ReadWord (state, addr));
- OSptr->ErrorNo = errno;
- break;
-
- case AngelSWI_Reason_Seek:
- state->Reg[0] = -1 >= lseek (ARMul_ReadWord (state, addr),
- ARMul_ReadWord (state, addr + 4),
- SEEK_SET);
- OSptr->ErrorNo = errno;
- break;
-
- case AngelSWI_Reason_FLen:
- SWIflen (state, ARMul_ReadWord (state, addr));
- break;
-
- case AngelSWI_Reason_GetCmdLine:
- WriteCommandLineTo (state, ARMul_ReadWord (state, addr));
- break;
-
- case AngelSWI_Reason_HeapInfo:
- /* R1 is a pointer to a pointer. */
- addr = ARMul_ReadWord (state, addr);
-
- /* Pick up the right memory limit. */
- if (state->MemSize)
- temp = state->MemSize;
- else
- temp = ADDRUSERSTACK;
-
- ARMul_WriteWord (state, addr, 0); /* Heap base */
- ARMul_WriteWord (state, addr + 4, temp); /* Heap limit */
- ARMul_WriteWord (state, addr + 8, temp); /* Stack base */
- ARMul_WriteWord (state, addr + 12, temp); /* Stack limit */
- break;
-
- case AngelSWI_Reason_ReportException:
- if (state->Reg[1] == ADP_Stopped_ApplicationExit)
- state->Reg[0] = 0;
- else
- state->Reg[0] = -1;
- state->Emulate = FALSE;
- break;
-
- case ADP_Stopped_ApplicationExit:
- state->Reg[0] = 0;
- state->Emulate = FALSE;
- break;
-
- case ADP_Stopped_RunTimeError:
- state->Reg[0] = -1;
- state->Emulate = FALSE;
- break;
-
- case AngelSWI_Reason_Errno:
- state->Reg[0] = OSptr->ErrorNo;
- break;
-
- case AngelSWI_Reason_Open:
- SWIopen (state,
- ARMul_ReadWord (state, addr),
- ARMul_ReadWord (state, addr + 4));
- break;
-
- case AngelSWI_Reason_Read:
- SWIread (state,
- ARMul_ReadWord (state, addr),
- ARMul_ReadWord (state, addr + 4),
- ARMul_ReadWord (state, addr + 8));
- break;
-
- case AngelSWI_Reason_Write:
- SWIwrite (state,
- ARMul_ReadWord (state, addr),
- ARMul_ReadWord (state, addr + 4),
- ARMul_ReadWord (state, addr + 8));
- break;
- }
-
- case 0x90:
- case 0x91:
- case 0x92:
- /* These are used by the FPE code. */
- break;
-
- default:
- /* If there is a SWI vector installed use it. */
- if (state->is_XScale && saved_number != -1)
- number = saved_number;
-
- if (SWI_vector_installed && number != SWI_Breakpoint)
- {
- ARMword cpsr;
- ARMword i_size;
-
- cpsr = ARMul_GetCPSR (state);
- i_size = INSN_SIZE;
-
- ARMul_SetSPSR (state, SVC32MODE, cpsr);
-
- cpsr &= ~0xbf;
- cpsr |= SVC32MODE | 0x80;
- ARMul_SetCPSR (state, cpsr);
-
- state->RegBank[SVCBANK][14] = state->Reg[14] = state->Reg[15] - i_size;
- state->NextInstr = RESUME;
- state->Reg[15] = state->pc = ARMSWIV;
- FLUSHPIPE;
- }
- else
- {
- fprintf (stderr, "unknown SWI encountered - %x - ignoring\n", number);
- return FALSE;
- }
- }
-
- return TRUE;
-}
-
-#ifndef NOOS
-#ifndef ASIM
-
-/* The emulator calls this routine when an Exception occurs. The second
- parameter is the address of the relevant exception vector. Returning
- FALSE from this routine causes the trap to be taken, TRUE causes it to
- be ignored (so set state->Emulate to FALSE!). */
-
-unsigned
-ARMul_OSException (ARMul_State * state ATTRIBUTE_UNUSED,
- ARMword vector ATTRIBUTE_UNUSED,
- ARMword pc ATTRIBUTE_UNUSED)
-{
- return FALSE;
-}
-
-#endif
-#endif /* NOOS */
diff --git a/sim/arm/armos.h b/sim/arm/armos.h
deleted file mode 100644
index d943735d33e..00000000000
--- a/sim/arm/armos.h
+++ /dev/null
@@ -1,97 +0,0 @@
-/* armos.h -- ARMulator OS definitions: ARM6 Instruction Emulator.
- Copyright (C) 1994 Advanced RISC Machines Ltd.
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
-
-/***************************************************************************\
-* Define the initial layout of memory *
-\***************************************************************************/
-
-#define ADDRSUPERSTACK 0x800L /* supervisor stack space */
-#define ADDRUSERSTACK 0x80000L /* default user stack start */
-#define ADDRSOFTVECTORS 0x840L /* soft vectors are here */
-#define ADDRCMDLINE 0xf00L /* command line is here after a SWI GetEnv */
-#define ADDRSOFHANDLERS 0xad0L /* address and workspace for installed handlers */
-#define SOFTVECTORCODE 0xb80L /* default handlers */
-
-/***************************************************************************\
-* SWI numbers *
-\***************************************************************************/
-
-#define SWI_WriteC 0x0
-#define SWI_Write0 0x2
-#define SWI_ReadC 0x4
-#define SWI_CLI 0x5
-#define SWI_GetEnv 0x10
-#define SWI_Exit 0x11
-#define SWI_EnterOS 0x16
-
-#define SWI_GetErrno 0x60
-#define SWI_Clock 0x61
-#define SWI_Time 0x63
-#define SWI_Remove 0x64
-#define SWI_Rename 0x65
-#define SWI_Open 0x66
-
-#define SWI_Close 0x68
-#define SWI_Write 0x69
-#define SWI_Read 0x6a
-#define SWI_Seek 0x6b
-#define SWI_Flen 0x6c
-
-#define SWI_IsTTY 0x6e
-#define SWI_TmpNam 0x6f
-#define SWI_InstallHandler 0x70
-#define SWI_GenerateError 0x71
-
-#define SWI_Breakpoint 0x180000 /* see gdb's tm-arm.h */
-
-#define AngelSWI_ARM 0x123456
-#define AngelSWI_Thumb 0xAB
-
-/* The reason codes: */
-#define AngelSWI_Reason_Open (0x01)
-#define AngelSWI_Reason_Close (0x02)
-#define AngelSWI_Reason_WriteC (0x03)
-#define AngelSWI_Reason_Write0 (0x04)
-#define AngelSWI_Reason_Write (0x05)
-#define AngelSWI_Reason_Read (0x06)
-#define AngelSWI_Reason_ReadC (0x07)
-#define AngelSWI_Reason_IsTTY (0x09)
-#define AngelSWI_Reason_Seek (0x0A)
-#define AngelSWI_Reason_FLen (0x0C)
-#define AngelSWI_Reason_TmpNam (0x0D)
-#define AngelSWI_Reason_Remove (0x0E)
-#define AngelSWI_Reason_Rename (0x0F)
-#define AngelSWI_Reason_Clock (0x10)
-#define AngelSWI_Reason_Time (0x11)
-#define AngelSWI_Reason_System (0x12)
-#define AngelSWI_Reason_Errno (0x13)
-#define AngelSWI_Reason_GetCmdLine (0x15)
-#define AngelSWI_Reason_HeapInfo (0x16)
-#define AngelSWI_Reason_EnterSVC (0x17)
-#define AngelSWI_Reason_ReportException (0x18)
-#define ADP_Stopped_ApplicationExit ((2 << 16) + 38)
-#define ADP_Stopped_RunTimeError ((2 << 16) + 34)
-
-#define FPESTART 0x2000L
-#define FPEEND 0x8000L
-#define FPEOLDVECT FPESTART + 0x100L + 8L * 16L + 4L /* stack + 8 regs + fpsr */
-#define FPENEWVECT(addr) 0xea000000L + ((addr) >> 2) - 3L /* branch from 4 to 0x2400 */
-
-extern unsigned long fpecode[];
-extern unsigned long fpesize;
-
-extern int SWI_vector_installed;
diff --git a/sim/arm/armrdi.c b/sim/arm/armrdi.c
deleted file mode 100644
index 14904e3be53..00000000000
--- a/sim/arm/armrdi.c
+++ /dev/null
@@ -1,1247 +0,0 @@
-/* armrdi.c -- ARMulator RDI interface: ARM6 Instruction Emulator.
- Copyright (C) 1994 Advanced RISC Machines Ltd.
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
-
-#include <string.h>
-#include <ctype.h>
-#include "armdefs.h"
-#include "armemu.h"
-#include "armos.h"
-#include "dbg_cp.h"
-#include "dbg_conf.h"
-#include "dbg_rdi.h"
-#include "dbg_hif.h"
-#include "communicate.h"
-
-/***************************************************************************\
-* Declarations *
-\***************************************************************************/
-
-#define Watch_AnyRead (RDIWatch_ByteRead+RDIWatch_HalfRead+RDIWatch_WordRead)
-#define Watch_AnyWrite (RDIWatch_ByteWrite+RDIWatch_HalfWrite+RDIWatch_WordWrite)
-
-static unsigned FPRegsAddr; /* last known address of FPE regs */
-#define FPESTART 0x2000L
-#define FPEEND 0x8000L
-
-#define IGNORE(d) (d = d)
-#ifdef RDI_VERBOSE
-#define TracePrint(s) \
- if (rdi_log & 1) ARMul_DebugPrint s
-#else
-#define TracePrint(s)
-#endif
-
-static ARMul_State *state = NULL;
-static unsigned BreaksSet; /* The number of breakpoints set */
-
-static int rdi_log = 0; /* debugging ? */
-
-#define LOWEST_RDI_LEVEL 0
-#define HIGHEST_RDI_LEVEL 1
-static int MYrdi_level = LOWEST_RDI_LEVEL;
-
-typedef struct BreakNode BreakNode;
-typedef struct WatchNode WatchNode;
-
-struct BreakNode
-{ /* A breakpoint list node */
- BreakNode *next;
- ARMword address; /* The address of this breakpoint */
- unsigned type; /* The type of comparison */
- ARMword bound; /* The other address for a range */
- ARMword inst;
-};
-
-struct WatchNode
-{ /* A watchpoint list node */
- WatchNode *next;
- ARMword address; /* The address of this watchpoint */
- unsigned type; /* The type of comparison */
- unsigned datatype; /* The type of access to watch for */
- ARMword bound; /* The other address for a range */
-};
-
-BreakNode *BreakList = NULL;
-WatchNode *WatchList = NULL;
-
-void
-ARMul_DebugPrint_i (const Dbg_HostosInterface * hostif, const char *format,
- ...)
-{
- va_list ap;
- va_start (ap, format);
- hostif->dbgprint (hostif->dbgarg, format, ap);
- va_end (ap);
-}
-
-void
-ARMul_DebugPrint (ARMul_State * state, const char *format, ...)
-{
- va_list ap;
- va_start (ap, format);
- if (!(rdi_log & 8))
- state->hostif->dbgprint (state->hostif->dbgarg, format, ap);
- va_end (ap);
-}
-
-#define CONSOLE_PRINT_MAX_LEN 128
-
-void
-ARMul_ConsolePrint (ARMul_State * state, const char *format, ...)
-{
- va_list ap;
- int ch;
- char *str, buf[CONSOLE_PRINT_MAX_LEN];
- int i, j;
- ARMword junk;
-
- va_start (ap, format);
- vsprintf (buf, format, ap);
-
- for (i = 0; buf[i]; i++); /* The string is i chars long */
-
- str = buf;
- while (i >= 32)
- {
- MYwrite_char (kidmum[1], RDP_OSOp);
- MYwrite_word (kidmum[1], SWI_Write0);
- MYwrite_char (kidmum[1], OS_SendString);
- MYwrite_char (kidmum[1], 32); /* Send string 32bytes at a time */
- for (j = 0; j < 32; j++, str++)
- MYwrite_char (kidmum[1], *str);
- wait_for_osreply (&junk);
- i -= 32;
- }
-
- if (i > 0)
- {
- MYwrite_char (kidmum[1], RDP_OSOp);
- MYwrite_word (kidmum[1], SWI_Write0);
- MYwrite_char (kidmum[1], OS_SendString);
- MYwrite_char (kidmum[1], (unsigned char) i); /* Send remainder of string */
- for (j = 0; j < i; j++, str++)
- MYwrite_char (kidmum[1], *str);
- wait_for_osreply (&junk);
- }
-
- va_end (ap);
- return;
-
-/* str = buf; */
-/* while ((ch=*str++) != 0) */
-/* state->hostif->writec(state->hostif->hostosarg, ch); */
-}
-
-void
-ARMul_DebugPause (ARMul_State * state)
-{
- if (!(rdi_log & 8))
- state->hostif->dbgpause (state->hostif->dbgarg);
-}
-
-/***************************************************************************\
-* RDI_open *
-\***************************************************************************/
-
-static void
-InitFail (int exitcode, char const *which)
-{
- ARMul_ConsolePrint (state, "%s interface failed to initialise. Exiting\n",
- which);
- exit (exitcode);
-}
-
-static void
-RDIInit (unsigned type)
-{
- if (type == 0)
- { /* cold start */
- state->CallDebug = state->MemReadDebug = state->MemWriteDebug = 0;
- BreaksSet = 0;
- }
-}
-
-#define UNKNOWNPROC 0
-
-typedef struct
-{
- char name[16];
- unsigned properties;
-}
-Processor;
-
-Processor const p_arm2 = { "ARM2", ARM_Fix26_Prop };
-Processor const p_arm2as = { "ARM2AS", ARM_Fix26_Prop };
-Processor const p_arm61 = { "ARM61", ARM_Fix26_Prop };
-Processor const p_arm3 = { "ARM3", ARM_Fix26_Prop };
-Processor const p_arm6 = { "ARM6", ARM_Lock_Prop };
-Processor const p_arm60 = { "ARM60", ARM_Lock_Prop };
-Processor const p_arm600 = { "ARM600", ARM_Lock_Prop };
-Processor const p_arm610 = { "ARM610", ARM_Lock_Prop };
-Processor const p_arm620 = { "ARM620", ARM_Lock_Prop };
-Processor const p_unknown = { "", 0 };
-
-Processor const *const processors[] =
-{
- &p_arm6, /* default: must come first */
- &p_arm2,
- &p_arm2as,
- &p_arm61,
- &p_arm3,
- &p_arm60,
- &p_arm600,
- &p_arm610,
- &p_arm620,
- &p_unknown
-};
-
-typedef struct ProcessorConfig ProcessorConfig;
-struct ProcessorConfig
-{
- long id[2];
- ProcessorConfig const *self;
- long count;
- Processor const *const *processors;
-};
-
-ProcessorConfig const processorconfig = {
- {((((((long) 'x' << 8) | ' ') << 8) | 'c') << 8) | 'p',
- ((((((long) 'u' << 8) | 's') << 8) | ' ') << 8) | 'x'},
- &processorconfig,
- 16,
- processors
-};
-
-static int
-RDI_open (unsigned type, const Dbg_ConfigBlock * config,
- const Dbg_HostosInterface * hostif, struct Dbg_MCState *dbg_state)
-/* Initialise everything */
-{
- int virgin = (state == NULL);
- IGNORE (dbg_state);
-
-#ifdef RDI_VERBOSE
- if (rdi_log & 1)
- {
- if (virgin)
- ARMul_DebugPrint_i (hostif, "RDI_open: type = %d\n", type);
- else
- ARMul_DebugPrint (state, "RDI_open: type = %d\n", type);
- }
-#endif
-
- if (type & 1)
- { /* Warm start */
- ARMul_Reset (state);
- RDIInit (1);
- }
- else
- {
- if (virgin)
- {
- ARMul_EmulateInit ();
- state = ARMul_NewState ();
- state->hostif = hostif;
- {
- int req = config->processor;
- unsigned processor = processors[req]->val;
- ARMul_SelectProcessor (state, processor);
- ARMul_Reset (state);
- ARMul_ConsolePrint (state, "ARMulator V1.50, %s",
- processors[req]->name);
- }
- if (ARMul_MemoryInit (state, config->memorysize) == FALSE)
- InitFail (1, "Memory");
- if (config->bytesex != RDISex_DontCare)
- state->bigendSig = config->bytesex;
- if (ARMul_CoProInit (state) == FALSE)
- InitFail (2, "Co-Processor");
- if (ARMul_OSInit (state) == FALSE)
- InitFail (3, "Operating System");
- }
- ARMul_Reset (state);
- RDIInit (0);
- }
- if (type & 2)
- { /* Reset the comms link */
- /* what comms link ? */
- }
- if (virgin && (type & 1) == 0) /* Cold start */
- ARMul_ConsolePrint (state, ", %s endian.\n",
- state->bigendSig ? "Big" : "Little");
-
- if (config->bytesex == RDISex_DontCare)
- return (state->bigendSig ? RDIError_BigEndian : RDIError_LittleEndian);
- else
- return (RDIError_NoError);
-}
-
-/***************************************************************************\
-* RDI_close *
-\***************************************************************************/
-
-static int
-RDI_close (void)
-{
- TracePrint ((state, "RDI_close\n"));
- ARMul_OSExit (state);
- ARMul_CoProExit (state);
- ARMul_MemoryExit (state);
- return (RDIError_NoError);
-}
-
-/***************************************************************************\
-* RDI_read *
-\***************************************************************************/
-
-static int
-RDI_read (ARMword source, void *dest, unsigned *nbytes)
-{
- unsigned i;
- char *memptr = (char *) dest;
-
- TracePrint ((state, "RDI_read: source=%.8lx dest=%p nbytes=%.8x\n",
- source, dest, *nbytes));
-
- for (i = 0; i < *nbytes; i++)
- *memptr++ = (char) ARMul_ReadByte (state, source++);
- if (state->abortSig)
- {
- state->abortSig = LOW;
- return (RDIError_DataAbort);
- }
- return (RDIError_NoError);
-}
-
-/***************************************************************************\
-* RDI_write *
-\***************************************************************************/
-
-static int
-RDI_write (const void *source, ARMword dest, unsigned *nbytes)
-{
- unsigned i;
- char *memptr = (char *) source;
-
- TracePrint ((state, "RDI_write: source=%p dest=%.8lx nbytes=%.8x\n",
- source, dest, *nbytes));
-
- for (i = 0; i < *nbytes; i++)
- ARMul_WriteByte (state, (ARMword) dest++, (ARMword) * memptr++);
-
- if (state->abortSig)
- {
- state->abortSig = LOW;
- return (RDIError_DataAbort);
- }
- return (RDIError_NoError);
-}
-
-/***************************************************************************\
-* RDI_CPUread *
-\***************************************************************************/
-
-static int
-RDI_CPUread (unsigned mode, unsigned long mask, ARMword buffer[])
-{
- unsigned i, upto;
-
- if (mode == RDIMode_Curr)
- mode = (unsigned) (ARMul_GetCPSR (state) & MODEBITS);
-
- for (upto = 0, i = 0; i < 15; i++)
- if (mask & (1L << i))
- {
- buffer[upto++] = ARMul_GetReg (state, mode, i);
- }
-
- if (mask & RDIReg_R15)
- {
- buffer[upto++] = ARMul_GetR15 (state);
- }
-
- if (mask & RDIReg_PC)
- {
- buffer[upto++] = ARMul_GetPC (state);
- }
-
- if (mask & RDIReg_CPSR)
- buffer[upto++] = ARMul_GetCPSR (state);
-
- if (mask & RDIReg_SPSR)
- buffer[upto++] = ARMul_GetSPSR (state, mode);
-
- TracePrint ((state, "RDI_CPUread: mode=%.8x mask=%.8lx", mode, mask));
-#ifdef RDI_VERBOSE
- if (rdi_log & 1)
- {
- for (upto = 0, i = 0; i <= 20; i++)
- if (mask & (1L << i))
- {
- ARMul_DebugPrint (state, "%c%.8lx", upto % 4 == 0 ? '\n' : ' ',
- buffer[upto]);
- upto++;
- }
- ARMul_DebugPrint (state, "\n");
- }
-#endif
-
- return (RDIError_NoError);
-}
-
-/***************************************************************************\
-* RDI_CPUwrite *
-\***************************************************************************/
-
-static int
-RDI_CPUwrite (unsigned mode, unsigned long mask, ARMword const buffer[])
-{
- int i, upto;
-
-
- TracePrint ((state, "RDI_CPUwrite: mode=%.8x mask=%.8lx", mode, mask));
-#ifdef RDI_VERBOSE
- if (rdi_log & 1)
- {
- for (upto = 0, i = 0; i <= 20; i++)
- if (mask & (1L << i))
- {
- ARMul_DebugPrint (state, "%c%.8lx", upto % 4 == 0 ? '\n' : ' ',
- buffer[upto]);
- upto++;
- }
- ARMul_DebugPrint (state, "\n");
- }
-#endif
-
- if (mode == RDIMode_Curr)
- mode = (unsigned) (ARMul_GetCPSR (state) & MODEBITS);
-
- for (upto = 0, i = 0; i < 15; i++)
- if (mask & (1L << i))
- ARMul_SetReg (state, mode, i, buffer[upto++]);
-
- if (mask & RDIReg_R15)
- ARMul_SetR15 (state, buffer[upto++]);
-
- if (mask & RDIReg_PC)
- {
-
- ARMul_SetPC (state, buffer[upto++]);
- }
- if (mask & RDIReg_CPSR)
- ARMul_SetCPSR (state, buffer[upto++]);
-
- if (mask & RDIReg_SPSR)
- ARMul_SetSPSR (state, mode, buffer[upto++]);
-
- return (RDIError_NoError);
-}
-
-/***************************************************************************\
-* RDI_CPread *
-\***************************************************************************/
-
-static int
-RDI_CPread (unsigned CPnum, unsigned long mask, ARMword buffer[])
-{
- ARMword fpregsaddr, word[4];
-
- unsigned r, w;
- unsigned upto;
-
- if (CPnum != 1 && CPnum != 2)
- {
- unsigned char const *rmap = state->CPRegWords[CPnum];
- if (rmap == NULL)
- return (RDIError_UnknownCoPro);
- for (upto = 0, r = 0; r < rmap[-1]; r++)
- if (mask & (1L << r))
- {
- (void) state->CPRead[CPnum] (state, r, &buffer[upto]);
- upto += rmap[r];
- }
- TracePrint ((state, "RDI_CPread: CPnum=%d mask=%.8lx", CPnum, mask));
-#ifdef RDI_VERBOSE
- if (rdi_log & 1)
- {
- w = 0;
- for (upto = 0, r = 0; r < rmap[-1]; r++)
- if (mask & (1L << r))
- {
- int words = rmap[r];
- ARMul_DebugPrint (state, "%c%2d",
- (w >= 4 ? (w = 0, '\n') : ' '), r);
- while (--words >= 0)
- {
- ARMul_DebugPrint (state, " %.8lx", buffer[upto++]);
- w++;
- }
- }
- ARMul_DebugPrint (state, "\n");
- }
-#endif
- return RDIError_NoError;
- }
-
-#ifdef NOFPE
- return RDIError_UnknownCoPro;
-
-#else
- if (FPRegsAddr == 0)
- {
- fpregsaddr = ARMul_ReadWord (state, 4L);
- if ((fpregsaddr & 0xff800000) != 0xea000000) /* Must be a forward branch */
- return RDIError_UnknownCoPro;
- fpregsaddr = ((fpregsaddr & 0xffffff) << 2) + 8; /* address in __fp_decode - 4 */
- if ((fpregsaddr < FPESTART) || (fpregsaddr >= FPEEND))
- return RDIError_UnknownCoPro;
- fpregsaddr = ARMul_ReadWord (state, fpregsaddr); /* pointer to fp registers */
- FPRegsAddr = fpregsaddr;
- }
- else
- fpregsaddr = FPRegsAddr;
-
- if (fpregsaddr == 0)
- return RDIError_UnknownCoPro;
- for (upto = 0, r = 0; r < 8; r++)
- if (mask & (1L << r))
- {
- for (w = 0; w < 4; w++)
- word[w] =
- ARMul_ReadWord (state,
- fpregsaddr + (ARMword) r * 16 + (ARMword) w * 4);
- switch ((int) (word[3] >> 29))
- {
- case 0:
- case 2:
- case 4:
- case 6: /* its unpacked, convert to extended */
- buffer[upto++] = 2; /* mark as extended */
- buffer[upto++] = (word[3] & 0x7fff) | (word[0] & 0x80000000); /* exp and sign */
- buffer[upto++] = word[1]; /* mantissa 1 */
- buffer[upto++] = word[2]; /* mantissa 2 */
- break;
- case 1: /* packed single */
- buffer[upto++] = 0; /* mark as single */
- buffer[upto++] = word[0]; /* sign, exp and mantissa */
- buffer[upto++] = word[1]; /* padding */
- buffer[upto++] = word[2]; /* padding */
- break;
- case 3: /* packed double */
- buffer[upto++] = 1; /* mark as double */
- buffer[upto++] = word[0]; /* sign, exp and mantissa1 */
- buffer[upto++] = word[1]; /* mantissa 2 */
- buffer[upto++] = word[2]; /* padding */
- break;
- case 5: /* packed extended */
- buffer[upto++] = 2; /* mark as extended */
- buffer[upto++] = word[0]; /* sign and exp */
- buffer[upto++] = word[1]; /* mantissa 1 */
- buffer[upto++] = word[2]; /* mantissa 2 */
- break;
- case 7: /* packed decimal */
- buffer[upto++] = 3; /* mark as packed decimal */
- buffer[upto++] = word[0]; /* sign, exp and mantissa1 */
- buffer[upto++] = word[1]; /* mantissa 2 */
- buffer[upto++] = word[2]; /* mantissa 3 */
- break;
- }
- }
- if (mask & (1L << r))
- buffer[upto++] = ARMul_ReadWord (state, fpregsaddr + 128); /* fpsr */
- if (mask & (1L << (r + 1)))
- buffer[upto++] = 0; /* fpcr */
-
- TracePrint ((state, "RDI_CPread: CPnum=%d mask=%.8lx\n", CPnum, mask));
-#ifdef RDI_VERBOSE
- if (rdi_log & 1)
- {
- for (upto = 0, r = 0; r < 9; r++)
- if (mask & (1L << r))
- {
- if (r != 8)
- {
- ARMul_DebugPrint (state, "%08lx ", buffer[upto++]);
- ARMul_DebugPrint (state, "%08lx ", buffer[upto++]);
- ARMul_DebugPrint (state, "%08lx ", buffer[upto++]);
- }
- ARMul_DebugPrint (state, "%08lx\n", buffer[upto++]);
- }
- ARMul_DebugPrint (state, "\n");
- }
-#endif
- return (RDIError_NoError);
-#endif /* NOFPE */
-}
-
-/***************************************************************************\
-* RDI_CPwrite *
-\***************************************************************************/
-
-static int
-RDI_CPwrite (unsigned CPnum, unsigned long mask, ARMword const buffer[])
-{
- unsigned r;
- unsigned upto;
- ARMword fpregsaddr;
-
- if (CPnum != 1 && CPnum != 2)
- {
- unsigned char const *rmap = state->CPRegWords[CPnum];
- if (rmap == NULL)
- return (RDIError_UnknownCoPro);
- TracePrint ((state, "RDI_CPwrite: CPnum=%d mask=%.8lx", CPnum, mask));
-#ifdef RDI_VERBOSE
- if (rdi_log & 1)
- {
- int w = 0;
- for (upto = 0, r = 0; r < rmap[-1]; r++)
- if (mask & (1L << r))
- {
- int words = rmap[r];
- ARMul_DebugPrint (state, "%c%2d",
- (w >= 4 ? (w = 0, '\n') : ' '), r);
- while (--words >= 0)
- {
- ARMul_DebugPrint (state, " %.8lx", buffer[upto++]);
- w++;
- }
- }
- ARMul_DebugPrint (state, "\n");
- }
-#endif
- for (upto = 0, r = 0; r < rmap[-1]; r++)
- if (mask & (1L << r))
- {
- (void) state->CPWrite[CPnum] (state, r, &buffer[upto]);
- upto += rmap[r];
- }
- return RDIError_NoError;
- }
-
-#ifdef NOFPE
- return RDIError_UnknownCoPro;
-
-#else
- TracePrint ((state, "RDI_CPwrite: CPnum=%d mask=%.8lx", CPnum, mask));
-#ifdef RDI_VERBOSE
- if (rdi_log & 1)
- {
- for (upto = 0, r = 0; r < 9; r++)
- if (mask & (1L << r))
- {
- if (r != 8)
- {
- ARMul_DebugPrint (state, "%08lx ", buffer[upto++]);
- ARMul_DebugPrint (state, "%08lx ", buffer[upto++]);
- ARMul_DebugPrint (state, "%08lx ", buffer[upto++]);
- }
- ARMul_DebugPrint (state, "%08lx\n", buffer[upto++]);
- }
- ARMul_DebugPrint (state, "\n");
- }
-#endif
-
- if (FPRegsAddr == 0)
- {
- fpregsaddr = ARMul_ReadWord (state, 4L);
- if ((fpregsaddr & 0xff800000) != 0xea000000) /* Must be a forward branch */
- return RDIError_UnknownCoPro;
- fpregsaddr = ((fpregsaddr & 0xffffff) << 2) + 8; /* address in __fp_decode - 4 */
- if ((fpregsaddr < FPESTART) || (fpregsaddr >= FPEEND))
- return RDIError_UnknownCoPro;
- fpregsaddr = ARMul_ReadWord (state, fpregsaddr); /* pointer to fp registers */
- FPRegsAddr = fpregsaddr;
- }
- else
- fpregsaddr = FPRegsAddr;
-
- if (fpregsaddr == 0)
- return RDIError_UnknownCoPro;
- for (upto = 0, r = 0; r < 8; r++)
- if (mask & (1L << r))
- {
- ARMul_WriteWord (state, fpregsaddr + (ARMword) r * 16,
- buffer[upto + 1]);
- ARMul_WriteWord (state, fpregsaddr + (ARMword) r * 16 + 4,
- buffer[upto + 2]);
- ARMul_WriteWord (state, fpregsaddr + (ARMword) r * 16 + 8,
- buffer[upto + 3]);
- ARMul_WriteWord (state, fpregsaddr + (ARMword) r * 16 + 12,
- (buffer[upto] * 2 + 1) << 29); /* mark type */
- upto += 4;
- }
- if (mask & (1L << r))
- ARMul_WriteWord (state, fpregsaddr + 128, buffer[upto++]); /* fpsr */
- return (RDIError_NoError);
-#endif /* NOFPE */
-}
-
-static void
-deletebreaknode (BreakNode ** prevp)
-{
- BreakNode *p = *prevp;
- *prevp = p->next;
- ARMul_WriteWord (state, p->address, p->inst);
- free ((char *) p);
- BreaksSet--;
- state->CallDebug--;
-}
-
-static int
-removebreak (ARMword address, unsigned type)
-{
- BreakNode *p, **prevp = &BreakList;
- for (; (p = *prevp) != NULL; prevp = &p->next)
- if (p->address == address && p->type == type)
- {
- deletebreaknode (prevp);
- return TRUE;
- }
- return FALSE;
-}
-
-/* This routine installs a breakpoint into the breakpoint table */
-
-static BreakNode *
-installbreak (ARMword address, unsigned type, ARMword bound)
-{
- BreakNode *p = (BreakNode *) malloc (sizeof (BreakNode));
- p->next = BreakList;
- BreakList = p;
- p->address = address;
- p->type = type;
- p->bound = bound;
- p->inst = ARMul_ReadWord (state, address);
- ARMul_WriteWord (state, address, 0xee000000L);
- return p;
-}
-
-/***************************************************************************\
-* RDI_setbreak *
-\***************************************************************************/
-
-static int
-RDI_setbreak (ARMword address, unsigned type, ARMword bound,
- PointHandle * handle)
-{
- BreakNode *p;
- TracePrint ((state, "RDI_setbreak: address=%.8lx type=%d bound=%.8lx\n",
- address, type, bound));
-
- removebreak (address, type);
- p = installbreak (address, type, bound);
- BreaksSet++;
- state->CallDebug++;
- *handle = (PointHandle) p;
- TracePrint ((state, " returns %.8lx\n", *handle));
- return RDIError_NoError;
-}
-
-/***************************************************************************\
-* RDI_clearbreak *
-\***************************************************************************/
-
-static int
-RDI_clearbreak (PointHandle handle)
-{
- TracePrint ((state, "RDI_clearbreak: address=%.8lx\n", handle));
- {
- BreakNode *p, **prevp = &BreakList;
- for (; (p = *prevp) != NULL; prevp = &p->next)
- if (p == (BreakNode *) handle)
- break;
- if (p == NULL)
- return RDIError_NoSuchPoint;
- deletebreaknode (prevp);
- return RDIError_NoError;
- }
-}
-
-/***************************************************************************\
-* Internal functions for breakpoint table manipulation *
-\***************************************************************************/
-
-static void
-deletewatchnode (WatchNode ** prevp)
-{
- WatchNode *p = *prevp;
- if (p->datatype & Watch_AnyRead)
- state->MemReadDebug--;
- if (p->datatype & Watch_AnyWrite)
- state->MemWriteDebug--;
- *prevp = p->next;
- free ((char *) p);
-}
-
-int
-removewatch (ARMword address, unsigned type)
-{
- WatchNode *p, **prevp = &WatchList;
- for (; (p = *prevp) != NULL; prevp = &p->next)
- if (p->address == address && p->type == type)
- { /* found a match */
- deletewatchnode (prevp);
- return TRUE;
- }
- return FALSE; /* never found a match */
-}
-
-static WatchNode *
-installwatch (ARMword address, unsigned type, unsigned datatype,
- ARMword bound)
-{
- WatchNode *p = (WatchNode *) malloc (sizeof (WatchNode));
- p->next = WatchList;
- WatchList = p;
- p->address = address;
- p->type = type;
- p->datatype = datatype;
- p->bound = bound;
- return p;
-}
-
-/***************************************************************************\
-* RDI_setwatch *
-\***************************************************************************/
-
-static int
-RDI_setwatch (ARMword address, unsigned type, unsigned datatype,
- ARMword bound, PointHandle * handle)
-{
- WatchNode *p;
- TracePrint (
- (state,
- "RDI_setwatch: address=%.8lx type=%d datatype=%d bound=%.8lx",
- address, type, datatype, bound));
-
- if (!state->CanWatch)
- return RDIError_UnimplementedMessage;
-
- removewatch (address, type);
- p = installwatch (address, type, datatype, bound);
- if (datatype & Watch_AnyRead)
- state->MemReadDebug++;
- if (datatype & Watch_AnyWrite)
- state->MemWriteDebug++;
- *handle = (PointHandle) p;
- TracePrint ((state, " returns %.8lx\n", *handle));
- return RDIError_NoError;
-}
-
-/***************************************************************************\
-* RDI_clearwatch *
-\***************************************************************************/
-
-static int
-RDI_clearwatch (PointHandle handle)
-{
- TracePrint ((state, "RDI_clearwatch: address=%.8lx\n", handle));
- {
- WatchNode *p, **prevp = &WatchList;
- for (; (p = *prevp) != NULL; prevp = &p->next)
- if (p == (WatchNode *) handle)
- break;
- if (p == NULL)
- return RDIError_NoSuchPoint;
- deletewatchnode (prevp);
- return RDIError_NoError;
- }
-}
-
-/***************************************************************************\
-* RDI_execute *
-\***************************************************************************/
-
-static int
-RDI_execute (PointHandle * handle)
-{
- TracePrint ((state, "RDI_execute\n"));
- if (rdi_log & 4)
- {
- state->CallDebug++;
- state->Debug = TRUE;
- }
- state->EndCondition = RDIError_NoError;
- state->StopHandle = 0;
-
- ARMul_DoProg (state);
-
- *handle = state->StopHandle;
- state->Reg[15] -= 8; /* undo the pipeline */
- if (rdi_log & 4)
- {
- state->CallDebug--;
- state->Debug = FALSE;
- }
- return (state->EndCondition);
-}
-
-/***************************************************************************\
-* RDI_step *
-\***************************************************************************/
-
-static int
-RDI_step (unsigned ninstr, PointHandle * handle)
-{
-
- TracePrint ((state, "RDI_step\n"));
- if (ninstr != 1)
- return RDIError_UnimplementedMessage;
- if (rdi_log & 4)
- {
- state->CallDebug++;
- state->Debug = TRUE;
- }
- state->EndCondition = RDIError_NoError;
- state->StopHandle = 0;
- ARMul_DoInstr (state);
- *handle = state->StopHandle;
- state->Reg[15] -= 8; /* undo the pipeline */
- if (rdi_log & 4)
- {
- state->CallDebug--;
- state->Debug = FALSE;
- }
- return (state->EndCondition);
-}
-
-/***************************************************************************\
-* RDI_info *
-\***************************************************************************/
-
-static int
-RDI_info (unsigned type, ARMword * arg1, ARMword * arg2)
-{
- switch (type)
- {
- case RDIInfo_Target:
- TracePrint ((state, "RDI_Info_Target\n"));
- /* Emulator, speed 10**5 IPS */
- *arg1 = 5 | HIGHEST_RDI_LEVEL << 5 | LOWEST_RDI_LEVEL << 8;
- *arg2 = 1298224434;
- return RDIError_NoError;
-
- case RDIInfo_Points:
- {
- ARMword n = RDIPointCapability_Comparison | RDIPointCapability_Range |
- RDIPointCapability_Mask | RDIPointCapability_Status;
- TracePrint ((state, "RDI_Info_Points\n"));
- if (state->CanWatch)
- n |= (Watch_AnyRead + Watch_AnyWrite) << 2;
- *arg1 = n;
- return RDIError_NoError;
- }
-
- case RDIInfo_Step:
- TracePrint ((state, "RDI_Info_Step\n"));
- *arg1 = RDIStep_Single;
- return RDIError_NoError;
-
- case RDIInfo_MMU:
- TracePrint ((state, "RDI_Info_MMU\n"));
- *arg1 = 1313820229;
- return RDIError_NoError;
-
- case RDISignal_Stop:
- TracePrint ((state, "RDISignal_Stop\n"));
- state->CallDebug++;
- state->EndCondition = RDIError_UserInterrupt;
- return RDIError_NoError;
-
- case RDIVector_Catch:
- TracePrint ((state, "RDIVector_Catch %.8lx\n", *arg1));
- state->VectorCatch = (unsigned) *arg1;
- return RDIError_NoError;
-
- case RDISet_Cmdline:
- TracePrint ((state, "RDI_Set_Cmdline %s\n", (char *) arg1));
- state->CommandLine =
- (char *) malloc ((unsigned) strlen ((char *) arg1) + 1);
- (void) strcpy (state->CommandLine, (char *) arg1);
- return RDIError_NoError;
-
- case RDICycles:
- TracePrint ((state, "RDI_Info_Cycles\n"));
- arg1[0] = 0;
- arg1[1] = state->NumInstrs;
- arg1[2] = 0;
- arg1[3] = state->NumScycles;
- arg1[4] = 0;
- arg1[5] = state->NumNcycles;
- arg1[6] = 0;
- arg1[7] = state->NumIcycles;
- arg1[8] = 0;
- arg1[9] = state->NumCcycles;
- arg1[10] = 0;
- arg1[11] = state->NumFcycles;
- return RDIError_NoError;
-
- case RDIErrorP:
- *arg1 = ARMul_OSLastErrorP (state);
- TracePrint ((state, "RDI_ErrorP returns %ld\n", *arg1));
- return RDIError_NoError;
-
- case RDIInfo_DescribeCoPro:
- {
- int cpnum = *(int *) arg1;
- struct Dbg_CoProDesc *cpd = (struct Dbg_CoProDesc *) arg2;
- int i;
- unsigned char const *map = state->CPRegWords[cpnum];
- if (map == NULL)
- return RDIError_UnknownCoPro;
- for (i = 0; i < cpd->entries; i++)
- {
- unsigned r, w = cpd->regdesc[i].nbytes / sizeof (ARMword);
- for (r = cpd->regdesc[i].rmin; r <= cpd->regdesc[i].rmax; r++)
- if (map[r] != w)
- return RDIError_BadCoProState;
- }
- return RDIError_NoError;
- }
-
- case RDIInfo_RequestCoProDesc:
- {
- int cpnum = *(int *) arg1;
- struct Dbg_CoProDesc *cpd = (struct Dbg_CoProDesc *) arg2;
- int i = -1, lastw = -1, r;
- unsigned char const *map;
- if ((unsigned) cpnum >= 16)
- return RDIError_UnknownCoPro;
- map = state->CPRegWords[cpnum];
- if (map == NULL)
- return RDIError_UnknownCoPro;
- for (r = 0; r < map[-1]; r++)
- {
- int words = map[r];
- if (words == lastw)
- cpd->regdesc[i].rmax = r;
- else
- {
- if (++i >= cpd->entries)
- return RDIError_BufferFull;
- cpd->regdesc[i].rmax = cpd->regdesc[i].rmin = r;
- cpd->regdesc[i].nbytes = words * sizeof (ARMword);
- cpd->regdesc[i].access =
- Dbg_Access_Readable + Dbg_Access_Writable;
- }
- }
- cpd->entries = i + 1;
- return RDIError_NoError;
- }
-
- case RDIInfo_Log:
- *arg1 = (ARMword) rdi_log;
- return RDIError_NoError;
-
- case RDIInfo_SetLog:
- rdi_log = (int) *arg1;
- return RDIError_NoError;
-
- case RDIInfo_CoPro:
- return RDIError_NoError;
-
- case RDIPointStatus_Watch:
- {
- WatchNode *p, *handle = (WatchNode *) * arg1;
- for (p = WatchList; p != NULL; p = p->next)
- if (p == handle)
- {
- *arg1 = -1;
- *arg2 = 1;
- return RDIError_NoError;
- }
- return RDIError_NoSuchPoint;
- }
-
- case RDIPointStatus_Break:
- {
- BreakNode *p, *handle = (BreakNode *) * arg1;
- for (p = BreakList; p != NULL; p = p->next)
- if (p == handle)
- {
- *arg1 = -1;
- *arg2 = 1;
- return RDIError_NoError;
- }
- return RDIError_NoSuchPoint;
- }
-
- case RDISet_RDILevel:
- if (*arg1 < LOWEST_RDI_LEVEL || *arg1 > HIGHEST_RDI_LEVEL)
- return RDIError_IncompatibleRDILevels;
- MYrdi_level = *arg1;
- return RDIError_NoError;
-
- default:
- return RDIError_UnimplementedMessage;
-
- }
-}
-
-/***************************************************************************\
-* The emulator calls this routine at the beginning of every cycle when the *
-* CallDebug flag is set. The second parameter passed is the address of the *
-* currently executing instruction (i.e Program Counter - 8), the third *
-* parameter is the instruction being executed. *
-\***************************************************************************/
-
-ARMword
-ARMul_Debug (ARMul_State * state, ARMword pc, ARMword instr)
-{
-
- if (state->EndCondition == RDIError_UserInterrupt)
- {
- TracePrint ((state, "User interrupt at %.8lx\n", pc));
- state->CallDebug--;
- state->Emulate = STOP;
- }
- else
- {
- BreakNode *p = BreakList;
- for (; p != NULL; p = p->next)
- {
- switch (p->type)
- {
- case RDIPoint_EQ:
- if (pc == p->address)
- break;
- continue;
- case RDIPoint_GT:
- if (pc > p->address)
- break;
- continue;
- case RDIPoint_GE:
- if (pc >= p->address)
- break;
- continue;
- case RDIPoint_LT:
- if (pc < p->address)
- break;
- continue;
- case RDIPoint_LE:
- if (pc <= p->address)
- break;
- continue;
- case RDIPoint_IN:
- if (p->address <= pc && pc < p->address + p->bound)
- break;
- continue;
- case RDIPoint_OUT:
- if (p->address > pc || pc >= p->address + p->bound)
- break;
- continue;
- case RDIPoint_MASK:
- if ((pc & p->bound) == p->address)
- break;
- continue;
- }
- /* found a match */
- TracePrint ((state, "Breakpoint reached at %.8lx\n", pc));
- state->EndCondition = RDIError_BreakpointReached;
- state->Emulate = STOP;
- state->StopHandle = (ARMword) p;
- break;
- }
- }
- return instr;
-}
-
-void
-ARMul_CheckWatch (ARMul_State * state, ARMword addr, int access)
-{
- WatchNode *p;
- for (p = WatchList; p != NULL; p = p->next)
- if (p->datatype & access)
- {
- switch (p->type)
- {
- case RDIPoint_EQ:
- if (addr == p->address)
- break;
- continue;
- case RDIPoint_GT:
- if (addr > p->address)
- break;
- continue;
- case RDIPoint_GE:
- if (addr >= p->address)
- break;
- continue;
- case RDIPoint_LT:
- if (addr < p->address)
- break;
- continue;
- case RDIPoint_LE:
- if (addr <= p->address)
- break;
- continue;
- case RDIPoint_IN:
- if (p->address <= addr && addr < p->address + p->bound)
- break;
- continue;
- case RDIPoint_OUT:
- if (p->address > addr || addr >= p->address + p->bound)
- break;
- continue;
- case RDIPoint_MASK:
- if ((addr & p->bound) == p->address)
- break;
- continue;
- }
- /* found a match */
- TracePrint ((state, "Watchpoint at %.8lx accessed\n", addr));
- state->EndCondition = RDIError_WatchpointAccessed;
- state->Emulate = STOP;
- state->StopHandle = (ARMword) p;
- return;
- }
-}
-
-static RDI_NameList const *
-RDI_cpunames ()
-{
- return (RDI_NameList const *) &processorconfig.count;
-}
-
-const struct RDIProcVec armul_rdi = {
- "ARMUL",
- RDI_open,
- RDI_close,
- RDI_read,
- RDI_write,
- RDI_CPUread,
- RDI_CPUwrite,
- RDI_CPread,
- RDI_CPwrite,
- RDI_setbreak,
- RDI_clearbreak,
- RDI_setwatch,
- RDI_clearwatch,
- RDI_execute,
- RDI_step,
- RDI_info,
-
- 0, /*pointinq */
- 0, /*addconfig */
- 0, /*loadconfigdata */
- 0, /*selectconfig */
- 0, /*drivernames */
-
- RDI_cpunames
-};
diff --git a/sim/arm/armsupp.c b/sim/arm/armsupp.c
deleted file mode 100644
index 99b6099b3c3..00000000000
--- a/sim/arm/armsupp.c
+++ /dev/null
@@ -1,887 +0,0 @@
-/* armsupp.c -- ARMulator support code: ARM6 Instruction Emulator.
- Copyright (C) 1994 Advanced RISC Machines Ltd.
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
-
-#include "armdefs.h"
-#include "armemu.h"
-#include "ansidecl.h"
-
-/***************************************************************************\
-* Definitions for the support routines *
-\***************************************************************************/
-
-ARMword ARMul_GetReg (ARMul_State * state, unsigned mode, unsigned reg);
-void ARMul_SetReg (ARMul_State * state, unsigned mode, unsigned reg,
- ARMword value);
-ARMword ARMul_GetPC (ARMul_State * state);
-ARMword ARMul_GetNextPC (ARMul_State * state);
-void ARMul_SetPC (ARMul_State * state, ARMword value);
-ARMword ARMul_GetR15 (ARMul_State * state);
-void ARMul_SetR15 (ARMul_State * state, ARMword value);
-
-ARMword ARMul_GetCPSR (ARMul_State * state);
-void ARMul_SetCPSR (ARMul_State * state, ARMword value);
-ARMword ARMul_GetSPSR (ARMul_State * state, ARMword mode);
-void ARMul_SetSPSR (ARMul_State * state, ARMword mode, ARMword value);
-
-void ARMul_CPSRAltered (ARMul_State * state);
-void ARMul_R15Altered (ARMul_State * state);
-
-ARMword ARMul_SwitchMode (ARMul_State * state, ARMword oldmode,
- ARMword newmode);
-static ARMword ModeToBank (ARMword mode);
-
-unsigned ARMul_NthReg (ARMword instr, unsigned number);
-
-void ARMul_NegZero (ARMul_State * state, ARMword result);
-void ARMul_AddCarry (ARMul_State * state, ARMword a, ARMword b,
- ARMword result);
-void ARMul_AddOverflow (ARMul_State * state, ARMword a, ARMword b,
- ARMword result);
-void ARMul_SubCarry (ARMul_State * state, ARMword a, ARMword b,
- ARMword result);
-void ARMul_SubOverflow (ARMul_State * state, ARMword a, ARMword b,
- ARMword result);
-
-void ARMul_LDC (ARMul_State * state, ARMword instr, ARMword address);
-void ARMul_STC (ARMul_State * state, ARMword instr, ARMword address);
-void ARMul_MCR (ARMul_State * state, ARMword instr, ARMword source);
-ARMword ARMul_MRC (ARMul_State * state, ARMword instr);
-void ARMul_CDP (ARMul_State * state, ARMword instr);
-unsigned IntPending (ARMul_State * state);
-
-ARMword ARMul_Align (ARMul_State * state, ARMword address, ARMword data);
-
-void ARMul_ScheduleEvent (ARMul_State * state, unsigned long delay,
- unsigned (*what) ());
-void ARMul_EnvokeEvent (ARMul_State * state);
-unsigned long ARMul_Time (ARMul_State * state);
-static void EnvokeList (ARMul_State * state, unsigned long from,
- unsigned long to);
-
-struct EventNode
-{ /* An event list node */
- unsigned (*func) (); /* The function to call */
- struct EventNode *next;
-};
-
-/***************************************************************************\
-* This routine returns the value of a register from a mode. *
-\***************************************************************************/
-
-ARMword
-ARMul_GetReg (ARMul_State * state, unsigned mode, unsigned reg)
-{
- mode &= MODEBITS;
- if (mode != state->Mode)
- return (state->RegBank[ModeToBank ((ARMword) mode)][reg]);
- else
- return (state->Reg[reg]);
-}
-
-/***************************************************************************\
-* This routine sets the value of a register for a mode. *
-\***************************************************************************/
-
-void
-ARMul_SetReg (ARMul_State * state, unsigned mode, unsigned reg, ARMword value)
-{
- mode &= MODEBITS;
- if (mode != state->Mode)
- state->RegBank[ModeToBank ((ARMword) mode)][reg] = value;
- else
- state->Reg[reg] = value;
-}
-
-/***************************************************************************\
-* This routine returns the value of the PC, mode independently. *
-\***************************************************************************/
-
-ARMword
-ARMul_GetPC (ARMul_State * state)
-{
- if (state->Mode > SVC26MODE)
- return (state->Reg[15]);
- else
- return (R15PC);
-}
-
-/***************************************************************************\
-* This routine returns the value of the PC, mode independently. *
-\***************************************************************************/
-
-ARMword
-ARMul_GetNextPC (ARMul_State * state)
-{
- if (state->Mode > SVC26MODE)
- return (state->Reg[15] + isize);
- else
- return ((state->Reg[15] + isize) & R15PCBITS);
-}
-
-/***************************************************************************\
-* This routine sets the value of the PC. *
-\***************************************************************************/
-
-void
-ARMul_SetPC (ARMul_State * state, ARMword value)
-{
- if (ARMul_MODE32BIT)
- state->Reg[15] = value & PCBITS;
- else
- state->Reg[15] = R15CCINTMODE | (value & R15PCBITS);
- FLUSHPIPE;
-}
-
-/***************************************************************************\
-* This routine returns the value of register 15, mode independently. *
-\***************************************************************************/
-
-ARMword
-ARMul_GetR15 (ARMul_State * state)
-{
- if (state->Mode > SVC26MODE)
- return (state->Reg[15]);
- else
- return (R15PC | ECC | ER15INT | EMODE);
-}
-
-/***************************************************************************\
-* This routine sets the value of Register 15. *
-\***************************************************************************/
-
-void
-ARMul_SetR15 (ARMul_State * state, ARMword value)
-{
- if (ARMul_MODE32BIT)
- state->Reg[15] = value & PCBITS;
- else
- {
- state->Reg[15] = value;
- ARMul_R15Altered (state);
- }
- FLUSHPIPE;
-}
-
-/***************************************************************************\
-* This routine returns the value of the CPSR *
-\***************************************************************************/
-
-ARMword
-ARMul_GetCPSR (ARMul_State * state)
-{
- return (CPSR | state->Cpsr);
-}
-
-/***************************************************************************\
-* This routine sets the value of the CPSR *
-\***************************************************************************/
-
-void
-ARMul_SetCPSR (ARMul_State * state, ARMword value)
-{
- state->Cpsr = value;
- ARMul_CPSRAltered (state);
-}
-
-/***************************************************************************\
-* This routine does all the nasty bits involved in a write to the CPSR, *
-* including updating the register bank, given a MSR instruction. *
-\***************************************************************************/
-
-void
-ARMul_FixCPSR (ARMul_State * state, ARMword instr, ARMword rhs)
-{
- state->Cpsr = ARMul_GetCPSR (state);
- if (state->Mode != USER26MODE
- && state->Mode != USER32MODE)
- { /* In user mode, only write flags */
- if (BIT (16))
- SETPSR_C (state->Cpsr, rhs);
- if (BIT (17))
- SETPSR_X (state->Cpsr, rhs);
- if (BIT (18))
- SETPSR_S (state->Cpsr, rhs);
- }
- if (BIT (19))
- SETPSR_F (state->Cpsr, rhs);
- ARMul_CPSRAltered (state);
-}
-
-/***************************************************************************\
-* Get an SPSR from the specified mode *
-\***************************************************************************/
-
-ARMword
-ARMul_GetSPSR (ARMul_State * state, ARMword mode)
-{
- ARMword bank = ModeToBank (mode & MODEBITS);
-
- if (! BANK_CAN_ACCESS_SPSR (bank))
- return ARMul_GetCPSR (state);
-
- return state->Spsr[bank];
-}
-
-/***************************************************************************\
-* This routine does a write to an SPSR *
-\***************************************************************************/
-
-void
-ARMul_SetSPSR (ARMul_State * state, ARMword mode, ARMword value)
-{
- ARMword bank = ModeToBank (mode & MODEBITS);
-
- if (BANK_CAN_ACCESS_SPSR (bank))
- state->Spsr[bank] = value;
-}
-
-/***************************************************************************\
-* This routine does a write to the current SPSR, given an MSR instruction *
-\***************************************************************************/
-
-void
-ARMul_FixSPSR (ARMul_State * state, ARMword instr, ARMword rhs)
-{
- if (BANK_CAN_ACCESS_SPSR (state->Bank))
- {
- if (BIT (16))
- SETPSR_C (state->Spsr[state->Bank], rhs);
- if (BIT (17))
- SETPSR_X (state->Spsr[state->Bank], rhs);
- if (BIT (18))
- SETPSR_S (state->Spsr[state->Bank], rhs);
- if (BIT (19))
- SETPSR_F (state->Spsr[state->Bank], rhs);
- }
-}
-
-/***************************************************************************\
-* This routine updates the state of the emulator after the Cpsr has been *
-* changed. Both the processor flags and register bank are updated. *
-\***************************************************************************/
-
-void
-ARMul_CPSRAltered (ARMul_State * state)
-{
- ARMword oldmode;
-
- if (state->prog32Sig == LOW)
- state->Cpsr &= (CCBITS | INTBITS | R15MODEBITS);
-
- oldmode = state->Mode;
-
- if (state->Mode != (state->Cpsr & MODEBITS))
- {
- state->Mode =
- ARMul_SwitchMode (state, state->Mode, state->Cpsr & MODEBITS);
-
- state->NtransSig = (state->Mode & 3) ? HIGH : LOW;
- }
- state->Cpsr &= ~MODEBITS;
-
- ASSIGNINT (state->Cpsr & INTBITS);
- state->Cpsr &= ~INTBITS;
- ASSIGNN ((state->Cpsr & NBIT) != 0);
- state->Cpsr &= ~NBIT;
- ASSIGNZ ((state->Cpsr & ZBIT) != 0);
- state->Cpsr &= ~ZBIT;
- ASSIGNC ((state->Cpsr & CBIT) != 0);
- state->Cpsr &= ~CBIT;
- ASSIGNV ((state->Cpsr & VBIT) != 0);
- state->Cpsr &= ~VBIT;
- ASSIGNS ((state->Cpsr & SBIT) != 0);
- state->Cpsr &= ~SBIT;
-#ifdef MODET
- ASSIGNT ((state->Cpsr & TBIT) != 0);
- state->Cpsr &= ~TBIT;
-#endif
-
- if (oldmode > SVC26MODE)
- {
- if (state->Mode <= SVC26MODE)
- {
- state->Emulate = CHANGEMODE;
- state->Reg[15] = ECC | ER15INT | EMODE | R15PC;
- }
- }
- else
- {
- if (state->Mode > SVC26MODE)
- {
- state->Emulate = CHANGEMODE;
- state->Reg[15] = R15PC;
- }
- else
- state->Reg[15] = ECC | ER15INT | EMODE | R15PC;
- }
-}
-
-/***************************************************************************\
-* This routine updates the state of the emulator after register 15 has *
-* been changed. Both the processor flags and register bank are updated. *
-* This routine should only be called from a 26 bit mode. *
-\***************************************************************************/
-
-void
-ARMul_R15Altered (ARMul_State * state)
-{
- if (state->Mode != R15MODE)
- {
- state->Mode = ARMul_SwitchMode (state, state->Mode, R15MODE);
- state->NtransSig = (state->Mode & 3) ? HIGH : LOW;
- }
- if (state->Mode > SVC26MODE)
- state->Emulate = CHANGEMODE;
- ASSIGNR15INT (R15INT);
- ASSIGNN ((state->Reg[15] & NBIT) != 0);
- ASSIGNZ ((state->Reg[15] & ZBIT) != 0);
- ASSIGNC ((state->Reg[15] & CBIT) != 0);
- ASSIGNV ((state->Reg[15] & VBIT) != 0);
-}
-
-/***************************************************************************\
-* This routine controls the saving and restoring of registers across mode *
-* changes. The regbank matrix is largely unused, only rows 13 and 14 are *
-* used across all modes, 8 to 14 are used for FIQ, all others use the USER *
-* column. It's easier this way. old and new parameter are modes numbers. *
-* Notice the side effect of changing the Bank variable. *
-\***************************************************************************/
-
-ARMword
-ARMul_SwitchMode (ARMul_State * state, ARMword oldmode, ARMword newmode)
-{
- unsigned i;
- ARMword oldbank;
- ARMword newbank;
-
- oldbank = ModeToBank (oldmode);
- newbank = state->Bank = ModeToBank (newmode);
-
- if (oldbank != newbank)
- { /* really need to do it */
- switch (oldbank)
- { /* save away the old registers */
- case USERBANK:
- case IRQBANK:
- case SVCBANK:
- case ABORTBANK:
- case UNDEFBANK:
- if (newbank == FIQBANK)
- for (i = 8; i < 13; i++)
- state->RegBank[USERBANK][i] = state->Reg[i];
- state->RegBank[oldbank][13] = state->Reg[13];
- state->RegBank[oldbank][14] = state->Reg[14];
- break;
- case FIQBANK:
- for (i = 8; i < 15; i++)
- state->RegBank[FIQBANK][i] = state->Reg[i];
- break;
- case DUMMYBANK:
- for (i = 8; i < 15; i++)
- state->RegBank[DUMMYBANK][i] = 0;
- break;
- default:
- abort ();
- }
-
- switch (newbank)
- { /* restore the new registers */
- case USERBANK:
- case IRQBANK:
- case SVCBANK:
- case ABORTBANK:
- case UNDEFBANK:
- if (oldbank == FIQBANK)
- for (i = 8; i < 13; i++)
- state->Reg[i] = state->RegBank[USERBANK][i];
- state->Reg[13] = state->RegBank[newbank][13];
- state->Reg[14] = state->RegBank[newbank][14];
- break;
- case FIQBANK:
- for (i = 8; i < 15; i++)
- state->Reg[i] = state->RegBank[FIQBANK][i];
- break;
- case DUMMYBANK:
- for (i = 8; i < 15; i++)
- state->Reg[i] = 0;
- break;
- default:
- abort ();
- } /* switch */
- } /* if */
-
- return newmode;
-}
-
-/***************************************************************************\
-* Given a processor mode, this routine returns the register bank that *
-* will be accessed in that mode. *
-\***************************************************************************/
-
-static ARMword
-ModeToBank (ARMword mode)
-{
- static ARMword bankofmode[] =
- {
- USERBANK, FIQBANK, IRQBANK, SVCBANK,
- DUMMYBANK, DUMMYBANK, DUMMYBANK, DUMMYBANK,
- DUMMYBANK, DUMMYBANK, DUMMYBANK, DUMMYBANK,
- DUMMYBANK, DUMMYBANK, DUMMYBANK, DUMMYBANK,
- USERBANK, FIQBANK, IRQBANK, SVCBANK,
- DUMMYBANK, DUMMYBANK, DUMMYBANK, ABORTBANK,
- DUMMYBANK, DUMMYBANK, DUMMYBANK, UNDEFBANK,
- DUMMYBANK, DUMMYBANK, DUMMYBANK, SYSTEMBANK
- };
-
- if (mode >= (sizeof (bankofmode) / sizeof (bankofmode[0])))
- return DUMMYBANK;
-
- return bankofmode[mode];
-}
-
-/***************************************************************************\
-* Returns the register number of the nth register in a reg list. *
-\***************************************************************************/
-
-unsigned
-ARMul_NthReg (ARMword instr, unsigned number)
-{
- unsigned bit, upto;
-
- for (bit = 0, upto = 0; upto <= number; bit++)
- if (BIT (bit))
- upto++;
- return (bit - 1);
-}
-
-/***************************************************************************\
-* Assigns the N and Z flags depending on the value of result *
-\***************************************************************************/
-
-void
-ARMul_NegZero (ARMul_State * state, ARMword result)
-{
- if (NEG (result))
- {
- SETN;
- CLEARZ;
- }
- else if (result == 0)
- {
- CLEARN;
- SETZ;
- }
- else
- {
- CLEARN;
- CLEARZ;
- };
-}
-
-/* Compute whether an addition of A and B, giving RESULT, overflowed. */
-int
-AddOverflow (ARMword a, ARMword b, ARMword result)
-{
- return ((NEG (a) && NEG (b) && POS (result))
- || (POS (a) && POS (b) && NEG (result)));
-}
-
-/* Compute whether a subtraction of A and B, giving RESULT, overflowed. */
-int
-SubOverflow (ARMword a, ARMword b, ARMword result)
-{
- return ((NEG (a) && POS (b) && POS (result))
- || (POS (a) && NEG (b) && NEG (result)));
-}
-
-/***************************************************************************\
-* Assigns the C flag after an addition of a and b to give result *
-\***************************************************************************/
-
-void
-ARMul_AddCarry (ARMul_State * state, ARMword a, ARMword b, ARMword result)
-{
- ASSIGNC ((NEG (a) && NEG (b)) ||
- (NEG (a) && POS (result)) || (NEG (b) && POS (result)));
-}
-
-/***************************************************************************\
-* Assigns the V flag after an addition of a and b to give result *
-\***************************************************************************/
-
-void
-ARMul_AddOverflow (ARMul_State * state, ARMword a, ARMword b, ARMword result)
-{
- ASSIGNV (AddOverflow (a, b, result));
-}
-
-/***************************************************************************\
-* Assigns the C flag after an subtraction of a and b to give result *
-\***************************************************************************/
-
-void
-ARMul_SubCarry (ARMul_State * state, ARMword a, ARMword b, ARMword result)
-{
- ASSIGNC ((NEG (a) && POS (b)) ||
- (NEG (a) && POS (result)) || (POS (b) && POS (result)));
-}
-
-/***************************************************************************\
-* Assigns the V flag after an subtraction of a and b to give result *
-\***************************************************************************/
-
-void
-ARMul_SubOverflow (ARMul_State * state, ARMword a, ARMword b, ARMword result)
-{
- ASSIGNV (SubOverflow (a, b, result));
-}
-
-/***************************************************************************\
-* This function does the work of generating the addresses used in an *
-* LDC instruction. The code here is always post-indexed, it's up to the *
-* caller to get the input address correct and to handle base register *
-* modification. It also handles the Busy-Waiting. *
-\***************************************************************************/
-
-void
-ARMul_LDC (ARMul_State * state, ARMword instr, ARMword address)
-{
- unsigned cpab;
- ARMword data;
-
- UNDEF_LSCPCBaseWb;
- if (ADDREXCEPT (address))
- {
- INTERNALABORT (address);
- }
- cpab = (state->LDC[CPNum]) (state, ARMul_FIRST, instr, 0);
- while (cpab == ARMul_BUSY)
- {
- ARMul_Icycles (state, 1, 0);
- if (IntPending (state))
- {
- cpab = (state->LDC[CPNum]) (state, ARMul_INTERRUPT, instr, 0);
- return;
- }
- else
- cpab = (state->LDC[CPNum]) (state, ARMul_BUSY, instr, 0);
- }
- if (cpab == ARMul_CANT)
- {
- CPTAKEABORT;
- return;
- }
- cpab = (state->LDC[CPNum]) (state, ARMul_TRANSFER, instr, 0);
- data = ARMul_LoadWordN (state, address);
- BUSUSEDINCPCN;
- if (BIT (21))
- LSBase = state->Base;
- cpab = (state->LDC[CPNum]) (state, ARMul_DATA, instr, data);
- while (cpab == ARMul_INC)
- {
- address += 4;
- data = ARMul_LoadWordN (state, address);
- cpab = (state->LDC[CPNum]) (state, ARMul_DATA, instr, data);
- }
- if (state->abortSig || state->Aborted)
- {
- TAKEABORT;
- }
-}
-
-/***************************************************************************\
-* This function does the work of generating the addresses used in an *
-* STC instruction. The code here is always post-indexed, it's up to the *
-* caller to get the input address correct and to handle base register *
-* modification. It also handles the Busy-Waiting. *
-\***************************************************************************/
-
-void
-ARMul_STC (ARMul_State * state, ARMword instr, ARMword address)
-{
- unsigned cpab;
- ARMword data;
-
- UNDEF_LSCPCBaseWb;
- if (ADDREXCEPT (address) || VECTORACCESS (address))
- {
- INTERNALABORT (address);
- }
- cpab = (state->STC[CPNum]) (state, ARMul_FIRST, instr, &data);
- while (cpab == ARMul_BUSY)
- {
- ARMul_Icycles (state, 1, 0);
- if (IntPending (state))
- {
- cpab = (state->STC[CPNum]) (state, ARMul_INTERRUPT, instr, 0);
- return;
- }
- else
- cpab = (state->STC[CPNum]) (state, ARMul_BUSY, instr, &data);
- }
- if (cpab == ARMul_CANT)
- {
- CPTAKEABORT;
- return;
- }
-#ifndef MODE32
- if (ADDREXCEPT (address) || VECTORACCESS (address))
- {
- INTERNALABORT (address);
- }
-#endif
- BUSUSEDINCPCN;
- if (BIT (21))
- LSBase = state->Base;
- cpab = (state->STC[CPNum]) (state, ARMul_DATA, instr, &data);
- ARMul_StoreWordN (state, address, data);
- while (cpab == ARMul_INC)
- {
- address += 4;
- cpab = (state->STC[CPNum]) (state, ARMul_DATA, instr, &data);
- ARMul_StoreWordN (state, address, data);
- }
- if (state->abortSig || state->Aborted)
- {
- TAKEABORT;
- }
-}
-
-/***************************************************************************\
-* This function does the Busy-Waiting for an MCR instruction. *
-\***************************************************************************/
-
-void
-ARMul_MCR (ARMul_State * state, ARMword instr, ARMword source)
-{
- unsigned cpab;
-
- cpab = (state->MCR[CPNum]) (state, ARMul_FIRST, instr, source);
-
- while (cpab == ARMul_BUSY)
- {
- ARMul_Icycles (state, 1, 0);
-
- if (IntPending (state))
- {
- cpab = (state->MCR[CPNum]) (state, ARMul_INTERRUPT, instr, 0);
- return;
- }
- else
- cpab = (state->MCR[CPNum]) (state, ARMul_BUSY, instr, source);
- }
-
- if (cpab == ARMul_CANT)
- ARMul_Abort (state, ARMul_UndefinedInstrV);
- else
- {
- BUSUSEDINCPCN;
- ARMul_Ccycles (state, 1, 0);
- }
-}
-
-/***************************************************************************\
-* This function does the Busy-Waiting for an MRC instruction. *
-\***************************************************************************/
-
-ARMword
-ARMul_MRC (ARMul_State * state, ARMword instr)
-{
- unsigned cpab;
- ARMword result = 0;
-
- cpab = (state->MRC[CPNum]) (state, ARMul_FIRST, instr, &result);
- while (cpab == ARMul_BUSY)
- {
- ARMul_Icycles (state, 1, 0);
- if (IntPending (state))
- {
- cpab = (state->MRC[CPNum]) (state, ARMul_INTERRUPT, instr, 0);
- return (0);
- }
- else
- cpab = (state->MRC[CPNum]) (state, ARMul_BUSY, instr, &result);
- }
- if (cpab == ARMul_CANT)
- {
- ARMul_Abort (state, ARMul_UndefinedInstrV);
- result = ECC; /* Parent will destroy the flags otherwise */
- }
- else
- {
- BUSUSEDINCPCN;
- ARMul_Ccycles (state, 1, 0);
- ARMul_Icycles (state, 1, 0);
- }
- return (result);
-}
-
-/***************************************************************************\
-* This function does the Busy-Waiting for an CDP instruction. *
-\***************************************************************************/
-
-void
-ARMul_CDP (ARMul_State * state, ARMword instr)
-{
- unsigned cpab;
-
- cpab = (state->CDP[CPNum]) (state, ARMul_FIRST, instr);
- while (cpab == ARMul_BUSY)
- {
- ARMul_Icycles (state, 1, 0);
- if (IntPending (state))
- {
- cpab = (state->CDP[CPNum]) (state, ARMul_INTERRUPT, instr);
- return;
- }
- else
- cpab = (state->CDP[CPNum]) (state, ARMul_BUSY, instr);
- }
- if (cpab == ARMul_CANT)
- ARMul_Abort (state, ARMul_UndefinedInstrV);
- else
- BUSUSEDN;
-}
-
-/***************************************************************************\
-* This function handles Undefined instructions, as CP isntruction *
-\***************************************************************************/
-
-void
-ARMul_UndefInstr (ARMul_State * state, ARMword instr ATTRIBUTE_UNUSED)
-{
- ARMul_Abort (state, ARMul_UndefinedInstrV);
-}
-
-/***************************************************************************\
-* Return TRUE if an interrupt is pending, FALSE otherwise. *
-\***************************************************************************/
-
-unsigned
-IntPending (ARMul_State * state)
-{
- if (state->Exception)
- { /* Any exceptions */
- if (state->NresetSig == LOW)
- {
- ARMul_Abort (state, ARMul_ResetV);
- return (TRUE);
- }
- else if (!state->NfiqSig && !FFLAG)
- {
- ARMul_Abort (state, ARMul_FIQV);
- return (TRUE);
- }
- else if (!state->NirqSig && !IFLAG)
- {
- ARMul_Abort (state, ARMul_IRQV);
- return (TRUE);
- }
- }
- return (FALSE);
-}
-
-/***************************************************************************\
-* Align a word access to a non word boundary *
-\***************************************************************************/
-
-ARMword
-ARMul_Align (state, address, data)
- ARMul_State * state ATTRIBUTE_UNUSED;
- ARMword address;
- ARMword data;
-{
- /* This code assumes the address is really unaligned,
- as a shift by 32 is undefined in C. */
-
- address = (address & 3) << 3; /* get the word address */
- return ((data >> address) | (data << (32 - address))); /* rot right */
-}
-
-/***************************************************************************\
-* This routine is used to call another routine after a certain number of *
-* cycles have been executed. The first parameter is the number of cycles *
-* delay before the function is called, the second argument is a pointer *
-* to the function. A delay of zero doesn't work, just call the function. *
-\***************************************************************************/
-
-void
-ARMul_ScheduleEvent (ARMul_State * state, unsigned long delay,
- unsigned (*what) ())
-{
- unsigned long when;
- struct EventNode *event;
-
- if (state->EventSet++ == 0)
- state->Now = ARMul_Time (state);
- when = (state->Now + delay) % EVENTLISTSIZE;
- event = (struct EventNode *) malloc (sizeof (struct EventNode));
- event->func = what;
- event->next = *(state->EventPtr + when);
- *(state->EventPtr + when) = event;
-}
-
-/***************************************************************************\
-* This routine is called at the beginning of every cycle, to envoke *
-* scheduled events. *
-\***************************************************************************/
-
-void
-ARMul_EnvokeEvent (ARMul_State * state)
-{
- static unsigned long then;
-
- then = state->Now;
- state->Now = ARMul_Time (state) % EVENTLISTSIZE;
- if (then < state->Now) /* schedule events */
- EnvokeList (state, then, state->Now);
- else if (then > state->Now)
- { /* need to wrap around the list */
- EnvokeList (state, then, EVENTLISTSIZE - 1L);
- EnvokeList (state, 0L, state->Now);
- }
-}
-
-static void
-EnvokeList (ARMul_State * state, unsigned long from, unsigned long to)
-/* envokes all the entries in a range */
-{
- struct EventNode *anevent;
-
- for (; from <= to; from++)
- {
- anevent = *(state->EventPtr + from);
- while (anevent)
- {
- (anevent->func) (state);
- state->EventSet--;
- anevent = anevent->next;
- }
- *(state->EventPtr + from) = NULL;
- }
-}
-
-/***************************************************************************\
-* This routine is returns the number of clock ticks since the last reset. *
-\***************************************************************************/
-
-unsigned long
-ARMul_Time (ARMul_State * state)
-{
- return (state->NumScycles + state->NumNcycles +
- state->NumIcycles + state->NumCcycles + state->NumFcycles);
-}
diff --git a/sim/arm/armvirt.c b/sim/arm/armvirt.c
deleted file mode 100644
index ce1e77d8c45..00000000000
--- a/sim/arm/armvirt.c
+++ /dev/null
@@ -1,520 +0,0 @@
-/* armvirt.c -- ARMulator virtual memory interace: ARM6 Instruction Emulator.
- Copyright (C) 1994 Advanced RISC Machines Ltd.
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
-
-/* This file contains a complete ARMulator memory model, modelling a
-"virtual memory" system. A much simpler model can be found in armfast.c,
-and that model goes faster too, but has a fixed amount of memory. This
-model's memory has 64K pages, allocated on demand from a 64K entry page
-table. The routines PutWord and GetWord implement this. Pages are never
-freed as they might be needed again. A single area of memory may be
-defined to generate aborts. */
-
-#include "armopts.h"
-#include "armos.h"
-#include "armdefs.h"
-#include "ansidecl.h"
-
-#ifdef VALIDATE /* for running the validate suite */
-#define TUBE 48 * 1024 * 1024 /* write a char on the screen */
-#define ABORTS 1
-#endif
-
-/* #define ABORTS */
-
-#ifdef ABORTS /* the memory system will abort */
-/* For the old test suite Abort between 32 Kbytes and 32 Mbytes
- For the new test suite Abort between 8 Mbytes and 26 Mbytes */
-/* #define LOWABORT 32 * 1024
-#define HIGHABORT 32 * 1024 * 1024 */
-#define LOWABORT 8 * 1024 * 1024
-#define HIGHABORT 26 * 1024 * 1024
-
-#endif
-
-#define NUMPAGES 64 * 1024
-#define PAGESIZE 64 * 1024
-#define PAGEBITS 16
-#define OFFSETBITS 0xffff
-
-int SWI_vector_installed = FALSE;
-
-/***************************************************************************\
-* Get a Word from Virtual Memory, maybe allocating the page *
-\***************************************************************************/
-
-static ARMword
-GetWord (ARMul_State * state, ARMword address, int check)
-{
- ARMword page;
- ARMword offset;
- ARMword **pagetable;
- ARMword *pageptr;
-
- XScale_check_memacc (state, &address, 0);
-
- page = address >> PAGEBITS;
- offset = (address & OFFSETBITS) >> 2;
- pagetable = (ARMword **) state->MemDataPtr;
- pageptr = *(pagetable + page);
-
- if (pageptr == NULL)
- {
- pageptr = (ARMword *) malloc (PAGESIZE);
-
- if (pageptr == NULL)
- {
- perror ("ARMulator can't allocate VM page");
- exit (12);
- }
-
- *(pagetable + page) = pageptr;
- }
-
- return *(pageptr + offset);
-}
-
-/***************************************************************************\
-* Put a Word into Virtual Memory, maybe allocating the page *
-\***************************************************************************/
-
-static void
-PutWord (ARMul_State * state, ARMword address, ARMword data, int check)
-{
- ARMword page;
- ARMword offset;
- ARMword **pagetable;
- ARMword *pageptr;
-
- XScale_check_memacc (state, &address, 1);
-
- page = address >> PAGEBITS;
- offset = (address & OFFSETBITS) >> 2;
- pagetable = (ARMword **) state->MemDataPtr;
- pageptr = *(pagetable + page);
-
- if (pageptr == NULL)
- {
- pageptr = (ARMword *) malloc (PAGESIZE);
- if (pageptr == NULL)
- {
- perror ("ARMulator can't allocate VM page");
- exit (13);
- }
-
- *(pagetable + page) = pageptr;
- }
-
- if (address == 0x8)
- SWI_vector_installed = TRUE;
-
- *(pageptr + offset) = data;
-}
-
-/***************************************************************************\
-* Initialise the memory interface *
-\***************************************************************************/
-
-unsigned
-ARMul_MemoryInit (ARMul_State * state, unsigned long initmemsize)
-{
- ARMword **pagetable;
- unsigned page;
-
- if (initmemsize)
- state->MemSize = initmemsize;
-
- pagetable = (ARMword **) malloc (sizeof (ARMword) * NUMPAGES);
-
- if (pagetable == NULL)
- return FALSE;
-
- for (page = 0; page < NUMPAGES; page++)
- *(pagetable + page) = NULL;
-
- state->MemDataPtr = (unsigned char *) pagetable;
-
- ARMul_ConsolePrint (state, ", 4 Gb memory");
-
- return TRUE;
-}
-
-/***************************************************************************\
-* Remove the memory interface *
-\***************************************************************************/
-
-void
-ARMul_MemoryExit (ARMul_State * state)
-{
- ARMword page;
- ARMword **pagetable;
- ARMword *pageptr;
-
- pagetable = (ARMword **) state->MemDataPtr;
- for (page = 0; page < NUMPAGES; page++)
- {
- pageptr = *(pagetable + page);
- if (pageptr != NULL)
- free ((char *) pageptr);
- }
- free ((char *) pagetable);
- return;
-}
-
-/***************************************************************************\
-* ReLoad Instruction *
-\***************************************************************************/
-
-ARMword
-ARMul_ReLoadInstr (ARMul_State * state, ARMword address, ARMword isize)
-{
-#ifdef ABORTS
- if (address >= LOWABORT && address < HIGHABORT)
- {
- ARMul_PREFETCHABORT (address);
- return ARMul_ABORTWORD;
- }
- else
- {
- ARMul_CLEARABORT;
- }
-#endif
-
- if ((isize == 2) && (address & 0x2))
- {
- /* We return the next two halfwords: */
- ARMword lo = GetWord (state, address, FALSE);
- ARMword hi = GetWord (state, address + 4, FALSE);
-
- if (state->bigendSig == HIGH)
- return (lo << 16) | (hi >> 16);
- else
- return ((hi & 0xFFFF) << 16) | (lo >> 16);
- }
-
- return GetWord (state, address, TRUE);
-}
-
-/***************************************************************************\
-* Load Instruction, Sequential Cycle *
-\***************************************************************************/
-
-ARMword ARMul_LoadInstrS (ARMul_State * state, ARMword address, ARMword isize)
-{
- state->NumScycles++;
-
-#ifdef HOURGLASS
- if ((state->NumScycles & HOURGLASS_RATE) == 0)
- {
- HOURGLASS;
- }
-#endif
-
- return ARMul_ReLoadInstr (state, address, isize);
-}
-
-/***************************************************************************\
-* Load Instruction, Non Sequential Cycle *
-\***************************************************************************/
-
-ARMword ARMul_LoadInstrN (ARMul_State * state, ARMword address, ARMword isize)
-{
- state->NumNcycles++;
-
- return ARMul_ReLoadInstr (state, address, isize);
-}
-
-/***************************************************************************\
-* Read Word (but don't tell anyone!) *
-\***************************************************************************/
-
-ARMword ARMul_ReadWord (ARMul_State * state, ARMword address)
-{
-#ifdef ABORTS
- if (address >= LOWABORT && address < HIGHABORT)
- {
- ARMul_DATAABORT (address);
- return ARMul_ABORTWORD;
- }
- else
- {
- ARMul_CLEARABORT;
- }
-#endif
-
- return GetWord (state, address, TRUE);
-}
-
-/***************************************************************************\
-* Load Word, Sequential Cycle *
-\***************************************************************************/
-
-ARMword ARMul_LoadWordS (ARMul_State * state, ARMword address)
-{
- state->NumScycles++;
-
- return ARMul_ReadWord (state, address);
-}
-
-/***************************************************************************\
-* Load Word, Non Sequential Cycle *
-\***************************************************************************/
-
-ARMword ARMul_LoadWordN (ARMul_State * state, ARMword address)
-{
- state->NumNcycles++;
-
- return ARMul_ReadWord (state, address);
-}
-
-/***************************************************************************\
-* Load Halfword, (Non Sequential Cycle) *
-\***************************************************************************/
-
-ARMword ARMul_LoadHalfWord (ARMul_State * state, ARMword address)
-{
- ARMword temp, offset;
-
- state->NumNcycles++;
-
- temp = ARMul_ReadWord (state, address);
- offset = (((ARMword) state->bigendSig * 2) ^ (address & 2)) << 3; /* bit offset into the word */
-
- return (temp >> offset) & 0xffff;
-}
-
-/***************************************************************************\
-* Read Byte (but don't tell anyone!) *
-\***************************************************************************/
-
-ARMword ARMul_ReadByte (ARMul_State * state, ARMword address)
-{
- ARMword temp, offset;
-
- temp = ARMul_ReadWord (state, address);
- offset = (((ARMword) state->bigendSig * 3) ^ (address & 3)) << 3; /* bit offset into the word */
-
- return (temp >> offset & 0xffL);
-}
-
-/***************************************************************************\
-* Load Byte, (Non Sequential Cycle) *
-\***************************************************************************/
-
-ARMword ARMul_LoadByte (ARMul_State * state, ARMword address)
-{
- state->NumNcycles++;
-
- return ARMul_ReadByte (state, address);
-}
-
-/***************************************************************************\
-* Write Word (but don't tell anyone!) *
-\***************************************************************************/
-
-void
-ARMul_WriteWord (ARMul_State * state, ARMword address, ARMword data)
-{
-#ifdef ABORTS
- if (address >= LOWABORT && address < HIGHABORT)
- {
- ARMul_DATAABORT (address);
- return;
- }
- else
- {
- ARMul_CLEARABORT;
- }
-#endif
-
- PutWord (state, address, data, TRUE);
-}
-
-/***************************************************************************\
-* Store Word, Sequential Cycle *
-\***************************************************************************/
-
-void
-ARMul_StoreWordS (ARMul_State * state, ARMword address, ARMword data)
-{
- state->NumScycles++;
-
- ARMul_WriteWord (state, address, data);
-}
-
-/***************************************************************************\
-* Store Word, Non Sequential Cycle *
-\***************************************************************************/
-
-void
-ARMul_StoreWordN (ARMul_State * state, ARMword address, ARMword data)
-{
- state->NumNcycles++;
-
- ARMul_WriteWord (state, address, data);
-}
-
-/***************************************************************************\
-* Store HalfWord, (Non Sequential Cycle) *
-\***************************************************************************/
-
-void
-ARMul_StoreHalfWord (ARMul_State * state, ARMword address, ARMword data)
-{
- ARMword temp, offset;
-
- state->NumNcycles++;
-
-#ifdef VALIDATE
- if (address == TUBE)
- {
- if (data == 4)
- state->Emulate = FALSE;
- else
- (void) putc ((char) data, stderr); /* Write Char */
- return;
- }
-#endif
-
- temp = ARMul_ReadWord (state, address);
- offset = (((ARMword) state->bigendSig * 2) ^ (address & 2)) << 3; /* bit offset into the word */
-
- PutWord (state, address,
- (temp & ~(0xffffL << offset)) | ((data & 0xffffL) << offset),
- TRUE);
-}
-
-/***************************************************************************\
-* Write Byte (but don't tell anyone!) *
-\***************************************************************************/
-
-void
-ARMul_WriteByte (ARMul_State * state, ARMword address, ARMword data)
-{
- ARMword temp, offset;
-
- temp = ARMul_ReadWord (state, address);
- offset = (((ARMword) state->bigendSig * 3) ^ (address & 3)) << 3; /* bit offset into the word */
-
- PutWord (state, address,
- (temp & ~(0xffL << offset)) | ((data & 0xffL) << offset),
- TRUE);
-}
-
-/***************************************************************************\
-* Store Byte, (Non Sequential Cycle) *
-\***************************************************************************/
-
-void
-ARMul_StoreByte (ARMul_State * state, ARMword address, ARMword data)
-{
- state->NumNcycles++;
-
-#ifdef VALIDATE
- if (address == TUBE)
- {
- if (data == 4)
- state->Emulate = FALSE;
- else
- (void) putc ((char) data, stderr); /* Write Char */
- return;
- }
-#endif
-
- ARMul_WriteByte (state, address, data);
-}
-
-/***************************************************************************\
-* Swap Word, (Two Non Sequential Cycles) *
-\***************************************************************************/
-
-ARMword ARMul_SwapWord (ARMul_State * state, ARMword address, ARMword data)
-{
- ARMword temp;
-
- state->NumNcycles++;
-
- temp = ARMul_ReadWord (state, address);
-
- state->NumNcycles++;
-
- PutWord (state, address, data, TRUE);
-
- return temp;
-}
-
-/***************************************************************************\
-* Swap Byte, (Two Non Sequential Cycles) *
-\***************************************************************************/
-
-ARMword ARMul_SwapByte (ARMul_State * state, ARMword address, ARMword data)
-{
- ARMword temp;
-
- temp = ARMul_LoadByte (state, address);
- ARMul_StoreByte (state, address, data);
-
- return temp;
-}
-
-/***************************************************************************\
-* Count I Cycles *
-\***************************************************************************/
-
-void
-ARMul_Icycles (ARMul_State * state, unsigned number, ARMword address ATTRIBUTE_UNUSED)
-{
- state->NumIcycles += number;
- ARMul_CLEARABORT;
-}
-
-/***************************************************************************\
-* Count C Cycles *
-\***************************************************************************/
-
-void
-ARMul_Ccycles (ARMul_State * state, unsigned number, ARMword address ATTRIBUTE_UNUSED)
-{
- state->NumCcycles += number;
- ARMul_CLEARABORT;
-}
-
-
-/* Read a byte. Do not check for alignment or access errors. */
-
-ARMword
-ARMul_SafeReadByte (ARMul_State * state, ARMword address)
-{
- ARMword temp, offset;
-
- temp = GetWord (state, address, FALSE);
- offset = (((ARMword) state->bigendSig * 3) ^ (address & 3)) << 3;
-
- return (temp >> offset & 0xffL);
-}
-
-void
-ARMul_SafeWriteByte (ARMul_State * state, ARMword address, ARMword data)
-{
- ARMword temp, offset;
-
- temp = GetWord (state, address, FALSE);
- offset = (((ARMword) state->bigendSig * 3) ^ (address & 3)) << 3;
-
- PutWord (state, address,
- (temp & ~(0xffL << offset)) | ((data & 0xffL) << offset),
- FALSE);
-}
diff --git a/sim/arm/bag.c b/sim/arm/bag.c
deleted file mode 100644
index a09d749b002..00000000000
--- a/sim/arm/bag.c
+++ /dev/null
@@ -1,166 +0,0 @@
-/* bag.c -- ARMulator support code: ARM6 Instruction Emulator.
- Copyright (C) 1994 Advanced RISC Machines Ltd.
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
-
-/********************************************************************/
-/* bag.c: */
-/* Offers a data structure for storing and getting pairs of number. */
-/* The numbers are stored together, put one can be looked up by */
-/* quoting the other. If a new pair is entered and one of the */
-/* numbers is a repeat of a previous pair, then the previos pair */
-/* is deleted. */
-/********************************************************************/
-
-#include "bag.h"
-#include <stdlib.h>
-
-#define HASH_TABLE_SIZE 256
-#define hash(x) (((x)&0xff)^(((x)>>8)&0xff)^(((x)>>16)&0xff)^(((x)>>24)&0xff))
-
-typedef struct hashentry
-{
- struct hashentry *next;
- int first;
- int second;
-}
-Hashentry;
-
-Hashentry *lookupbyfirst[HASH_TABLE_SIZE];
-Hashentry *lookupbysecond[HASH_TABLE_SIZE];
-
-void
-addtolist (Hashentry ** add, long first, long second)
-{
- while (*add)
- add = &((*add)->next);
- /* Malloc will never fail? :o( */
- (*add) = (Hashentry *) malloc (sizeof (Hashentry));
- (*add)->next = (Hashentry *) 0;
- (*add)->first = first;
- (*add)->second = second;
-}
-
-void
-killwholelist (Hashentry * p)
-{
- Hashentry *q;
-
- while (p)
- {
- q = p;
- p = p->next;
- free (q);
- }
-}
-
-static void
-removefromlist (Hashentry ** p, long first)
-{
- Hashentry *q;
-
- while (*p)
- {
- if ((*p)->first == first)
- {
- q = (*p)->next;
- free (*p);
- *p = q;
- return;
- }
- p = &((*p)->next);
- }
-}
-
-void
-BAG_putpair (long first, long second)
-{
- long junk;
-
- if (BAG_getfirst (&junk, second) != NO_SUCH_PAIR)
- BAG_killpair_bysecond (second);
- addtolist (&lookupbyfirst[hash (first)], first, second);
- addtolist (&lookupbysecond[hash (second)], first, second);
-}
-
-Bag_error
-BAG_getfirst (long *first, long second)
-{
- Hashentry *look;
-
- look = lookupbysecond[hash (second)];
- while (look)
- if (look->second == second)
- {
- *first = look->first;
- return NO_ERROR;
- }
- return NO_SUCH_PAIR;
-}
-
-Bag_error
-BAG_getsecond (long first, long *second)
-{
- Hashentry *look;
-
- look = lookupbyfirst[hash (first)];
- while (look)
- {
- if (look->first == first)
- {
- *second = look->second;
- return NO_ERROR;
- }
- look = look->next;
- }
- return NO_SUCH_PAIR;
-}
-
-Bag_error
-BAG_killpair_byfirst (long first)
-{
- long second;
-
- if (BAG_getsecond (first, &second) == NO_SUCH_PAIR)
- return NO_SUCH_PAIR;
- removefromlist (&lookupbyfirst[hash (first)], first);
- removefromlist (&lookupbysecond[hash (second)], first);
- return NO_ERROR;
-}
-
-Bag_error
-BAG_killpair_bysecond (long second)
-{
- long first;
-
- if (BAG_getfirst (&first, second) == NO_SUCH_PAIR)
- return NO_SUCH_PAIR;
- removefromlist (&lookupbyfirst[hash (first)], first);
- removefromlist (&lookupbysecond[hash (second)], first);
- return NO_ERROR;
-}
-
-void
-BAG_newbag ()
-{
- int i;
-
- for (i = 0; i < 256; i++)
- {
- killwholelist (lookupbyfirst[i]);
- killwholelist (lookupbysecond[i]);
- lookupbyfirst[i] = lookupbysecond[i] = (Hashentry *) 0;
- }
-}
diff --git a/sim/arm/bag.h b/sim/arm/bag.h
deleted file mode 100644
index 0738195eca8..00000000000
--- a/sim/arm/bag.h
+++ /dev/null
@@ -1,43 +0,0 @@
-/* bag.h -- ARMulator support code: ARM6 Instruction Emulator.
- Copyright (C) 1994 Advanced RISC Machines Ltd.
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
-
-/********************************************************************/
-/* bag.h: */
-/* Header file for bag.c */
-/* Offers a data structure for storing and getting pairs of number. */
-/* The numbers are stored together, put one can be looked up by */
-/* quoting the other. If a new pair is entered and one of the */
-/* numbers is a repeat of a previous pair, then the previos pair */
-/* is deleted. */
-/********************************************************************/
-
-typedef enum
-{
- NO_ERROR,
- DELETED_OLD_PAIR,
- NO_SUCH_PAIR,
-}
-Bag_error;
-
-void BAG_putpair (long first, long second);
-
-void BAG_newbag (void);
-Bag_error BAG_killpair_byfirst (long first);
-Bag_error BAG_killpair_bysecond (long second);
-
-Bag_error BAG_getfirst (long *first, long second);
-Bag_error BAG_getsecond (long first, long *second);
diff --git a/sim/arm/communicate.c b/sim/arm/communicate.c
deleted file mode 100644
index 6f6d78581cd..00000000000
--- a/sim/arm/communicate.c
+++ /dev/null
@@ -1,255 +0,0 @@
-/* communicate.c -- ARMulator RDP comms code: ARM6 Instruction Emulator.
- Copyright (C) 1994 Advanced RISC Machines Ltd.
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
-
-/**************************************************************************/
-/* Functions to read and write characters or groups of characters */
-/* down sockets or pipes. Those that return a value return -1 on failure */
-/* and 0 on success. */
-/**************************************************************************/
-
-#include <sys/time.h>
-#include <sys/types.h>
-#include <sys/socket.h>
-#include <netinet/in.h>
-
-#include "armdefs.h"
-
-/* The socket to the debugger */
-int debugsock;
-
-/* The maximum number of file descriptors */
-extern int nfds;
-
-/* The socket handle */
-extern int sockethandle;
-
-/* Read and Write routines down a pipe or socket */
-
-/****************************************************************/
-/* Read an individual character. */
-/* All other read functions rely on this one. */
-/* It waits 15 seconds until there is a character available: if */
-/* no character is available, then it timeouts and returns -1. */
-/****************************************************************/
-int
-MYread_char (int sock, unsigned char *c)
-{
- int i;
- fd_set readfds;
- struct timeval timeout = { 15, 0 };
- struct sockaddr_in isa;
-
-retry:
-
- FD_ZERO (&readfds);
- FD_SET (sock, &readfds);
-
- i = select (nfds, &readfds, (fd_set *) 0, (fd_set *) 0, &timeout);
-
- if (i < 0)
- {
- perror ("select");
- exit (1);
- }
-
- if (!i)
- {
- fprintf (stderr, "read: Timeout\n");
- return -1;
- }
-
- if ((i = read (sock, c, 1)) < 1)
- {
- if (!i && sock == debugsock)
- {
- fprintf (stderr, "Connection with debugger severed.\n");
- /* This shouldn't be necessary for a detached armulator, but
- the armulator cannot be cold started a second time, so
- this is probably preferable to locking up. */
- return -1;
- fprintf (stderr, "Waiting for connection from debugger...");
- debugsock = accept (sockethandle, &isa, &i);
- if (debugsock < 0)
- { /* Now we are in serious trouble... */
- perror ("accept");
- return -1;
- }
- fprintf (stderr, " done.\nConnection Established.\n");
- sock = debugsock;
- goto retry;
- }
- perror ("read");
- return -1;
- }
-
-#ifdef DEBUG
- if (sock == debugsock)
- fprintf (stderr, "<%02x ", *c);
-#endif
-
- return 0;
-}
-
-/****************************************************************/
-/* Read an individual character. */
-/* It waits until there is a character available. Returns -1 if */
-/* an error occurs. */
-/****************************************************************/
-int
-MYread_charwait (int sock, unsigned char *c)
-{
- int i;
- fd_set readfds;
- struct sockaddr_in isa;
-
-retry:
-
- FD_ZERO (&readfds);
- FD_SET (sock, &readfds);
-
- i = select (nfds, &readfds,
- (fd_set *) 0, (fd_set *) 0, (struct timeval *) 0);
-
- if (i < 0)
- {
- perror ("select");
- exit (-1);
- }
-
- if ((i = read (sock, c, 1)) < 1)
- {
- if (!i && sock == debugsock)
- {
- fprintf (stderr, "Connection with debugger severed.\n");
- return -1;
- fprintf (stderr, "Waiting for connection from debugger...");
- debugsock = accept (sockethandle, &isa, &i);
- if (debugsock < 0)
- { /* Now we are in serious trouble... */
- perror ("accept");
- return -1;
- }
- fprintf (stderr, " done.\nConnection Established.\n");
- sock = debugsock;
- goto retry;
- }
- perror ("read");
- return -1;
- }
-
-#ifdef DEBUG
- if (sock == debugsock)
- fprintf (stderr, "<%02x ", *c);
-#endif
-
- return 0;
-}
-
-void
-MYwrite_char (int sock, unsigned char c)
-{
-
- if (write (sock, &c, 1) < 1)
- perror ("write");
-#ifdef DEBUG
- if (sock == debugsock)
- fprintf (stderr, ">%02x ", c);
-#endif
-}
-
-int
-MYread_word (int sock, ARMword * here)
-{
- unsigned char a, b, c, d;
-
- if (MYread_char (sock, &a) < 0)
- return -1;
- if (MYread_char (sock, &b) < 0)
- return -1;
- if (MYread_char (sock, &c) < 0)
- return -1;
- if (MYread_char (sock, &d) < 0)
- return -1;
- *here = a | b << 8 | c << 16 | d << 24;
- return 0;
-}
-
-void
-MYwrite_word (int sock, ARMword i)
-{
- MYwrite_char (sock, i & 0xff);
- MYwrite_char (sock, (i & 0xff00) >> 8);
- MYwrite_char (sock, (i & 0xff0000) >> 16);
- MYwrite_char (sock, (i & 0xff000000) >> 24);
-}
-
-void
-MYwrite_string (int sock, char *s)
-{
- int i;
- for (i = 0; MYwrite_char (sock, s[i]), s[i]; i++);
-}
-
-int
-MYread_FPword (int sock, char *putinhere)
-{
- int i;
- for (i = 0; i < 16; i++)
- if (MYread_char (sock, &putinhere[i]) < 0)
- return -1;
- return 0;
-}
-
-void
-MYwrite_FPword (int sock, char *fromhere)
-{
- int i;
- for (i = 0; i < 16; i++)
- MYwrite_char (sock, fromhere[i]);
-}
-
-/* Takes n bytes from source and those n bytes */
-/* down to dest */
-int
-passon (int source, int dest, int n)
-{
- char *p;
- int i;
-
- p = (char *) malloc (n);
- if (!p)
- {
- perror ("Out of memory\n");
- exit (1);
- }
- if (n)
- {
- for (i = 0; i < n; i++)
- if (MYread_char (source, &p[i]) < 0)
- return -1;
-
-#ifdef DEBUG
- if (dest == debugsock)
- for (i = 0; i < n; i++)
- fprintf (stderr, ")%02x ", (unsigned char) p[i]);
-#endif
-
- write (dest, p, n);
- }
- free (p);
- return 0;
-}
diff --git a/sim/arm/communicate.h b/sim/arm/communicate.h
deleted file mode 100644
index f6503ec10f3..00000000000
--- a/sim/arm/communicate.h
+++ /dev/null
@@ -1,36 +0,0 @@
-/* communicate.h -- ARMulator comms support defns: ARM6 Instruction Emulator.
- Copyright (C) 1994 Advanced RISC Machines Ltd.
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
-
-int MYread_char (int sock, unsigned char *c);
-void MYwrite_char (int sock, unsigned char c);
-int MYread_word (int sock, ARMword * here);
-void MYwrite_word (int sock, ARMword i);
-void MYwrite_string (int sock, char *s);
-int MYread_FPword (int sock, char *putinhere);
-void MYwrite_FPword (int sock, char *fromhere);
-int passon (int source, int dest, int n);
-
-int wait_for_osreply (ARMword * reply); /* from kid.c */
-
-#define OS_SendNothing 0x0
-#define OS_SendChar 0x1
-#define OS_SendWord 0x2
-#define OS_SendString 0x3
-
-/* The pipes between the two processes */
-extern int mumkid[2];
-extern int kidmum[2];
diff --git a/sim/arm/config.in b/sim/arm/config.in
deleted file mode 100644
index 1f87a2bee4e..00000000000
--- a/sim/arm/config.in
+++ /dev/null
@@ -1,158 +0,0 @@
-/* config.in. Generated automatically from configure.in by autoheader. */
-
-/* Define if using alloca.c. */
-#undef C_ALLOCA
-
-/* Define to empty if the keyword does not work. */
-#undef const
-
-/* Define to one of _getb67, GETB67, getb67 for Cray-2 and Cray-YMP systems.
- This function is required for alloca.c support on those systems. */
-#undef CRAY_STACKSEG_END
-
-/* Define if you have alloca, as a function or macro. */
-#undef HAVE_ALLOCA
-
-/* Define if you have <alloca.h> and it should be used (not on Ultrix). */
-#undef HAVE_ALLOCA_H
-
-/* Define if you have a working `mmap' system call. */
-#undef HAVE_MMAP
-
-/* Define as __inline if that's what the C compiler calls it. */
-#undef inline
-
-/* Define to `long' if <sys/types.h> doesn't define. */
-#undef off_t
-
-/* Define if you need to in order for stat and other things to work. */
-#undef _POSIX_SOURCE
-
-/* Define as the return type of signal handlers (int or void). */
-#undef RETSIGTYPE
-
-/* Define to `unsigned' if <sys/types.h> doesn't define. */
-#undef size_t
-
-/* If using the C implementation of alloca, define if you know the
- direction of stack growth for your system; otherwise it will be
- automatically deduced at run-time.
- STACK_DIRECTION > 0 => grows toward higher addresses
- STACK_DIRECTION < 0 => grows toward lower addresses
- STACK_DIRECTION = 0 => direction of growth unknown
- */
-#undef STACK_DIRECTION
-
-/* Define if you have the ANSI C header files. */
-#undef STDC_HEADERS
-
-/* Define to 1 if NLS is requested. */
-#undef ENABLE_NLS
-
-/* Define as 1 if you have gettext and don't want to use GNU gettext. */
-#undef HAVE_GETTEXT
-
-/* Define as 1 if you have the stpcpy function. */
-#undef HAVE_STPCPY
-
-/* Define if your locale.h file contains LC_MESSAGES. */
-#undef HAVE_LC_MESSAGES
-
-/* Define if you have the __argz_count function. */
-#undef HAVE___ARGZ_COUNT
-
-/* Define if you have the __argz_next function. */
-#undef HAVE___ARGZ_NEXT
-
-/* Define if you have the __argz_stringify function. */
-#undef HAVE___ARGZ_STRINGIFY
-
-/* Define if you have the __setfpucw function. */
-#undef HAVE___SETFPUCW
-
-/* Define if you have the dcgettext function. */
-#undef HAVE_DCGETTEXT
-
-/* Define if you have the getcwd function. */
-#undef HAVE_GETCWD
-
-/* Define if you have the getpagesize function. */
-#undef HAVE_GETPAGESIZE
-
-/* Define if you have the getrusage function. */
-#undef HAVE_GETRUSAGE
-
-/* Define if you have the munmap function. */
-#undef HAVE_MUNMAP
-
-/* Define if you have the putenv function. */
-#undef HAVE_PUTENV
-
-/* Define if you have the setenv function. */
-#undef HAVE_SETENV
-
-/* Define if you have the setlocale function. */
-#undef HAVE_SETLOCALE
-
-/* Define if you have the sigaction function. */
-#undef HAVE_SIGACTION
-
-/* Define if you have the stpcpy function. */
-#undef HAVE_STPCPY
-
-/* Define if you have the strcasecmp function. */
-#undef HAVE_STRCASECMP
-
-/* Define if you have the strchr function. */
-#undef HAVE_STRCHR
-
-/* Define if you have the time function. */
-#undef HAVE_TIME
-
-/* Define if you have the <argz.h> header file. */
-#undef HAVE_ARGZ_H
-
-/* Define if you have the <fcntl.h> header file. */
-#undef HAVE_FCNTL_H
-
-/* Define if you have the <fpu_control.h> header file. */
-#undef HAVE_FPU_CONTROL_H
-
-/* Define if you have the <limits.h> header file. */
-#undef HAVE_LIMITS_H
-
-/* Define if you have the <locale.h> header file. */
-#undef HAVE_LOCALE_H
-
-/* Define if you have the <malloc.h> header file. */
-#undef HAVE_MALLOC_H
-
-/* Define if you have the <nl_types.h> header file. */
-#undef HAVE_NL_TYPES_H
-
-/* Define if you have the <stdlib.h> header file. */
-#undef HAVE_STDLIB_H
-
-/* Define if you have the <string.h> header file. */
-#undef HAVE_STRING_H
-
-/* Define if you have the <strings.h> header file. */
-#undef HAVE_STRINGS_H
-
-/* Define if you have the <sys/param.h> header file. */
-#undef HAVE_SYS_PARAM_H
-
-/* Define if you have the <sys/resource.h> header file. */
-#undef HAVE_SYS_RESOURCE_H
-
-/* Define if you have the <sys/time.h> header file. */
-#undef HAVE_SYS_TIME_H
-
-/* Define if you have the <time.h> header file. */
-#undef HAVE_TIME_H
-
-/* Define if you have the <unistd.h> header file. */
-#undef HAVE_UNISTD_H
-
-/* Define if you have the <values.h> header file. */
-#undef HAVE_VALUES_H
diff --git a/sim/arm/configure b/sim/arm/configure
deleted file mode 100755
index 2c574e4cd94..00000000000
--- a/sim/arm/configure
+++ /dev/null
@@ -1,4026 +0,0 @@
-#! /bin/sh
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-sim_inline="-DDEFAULT_INLINE=0"
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
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-ac_exeext=
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-
-
-
-echo $ac_n "checking how to run the C preprocessor""... $ac_c" 1>&6
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- cat > conftest.$ac_ext <<EOF
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- echo "configure: failed program was:" >&5
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-{ (eval echo configure:734: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
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- CPP="$ac_cv_prog_CPP"
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-
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-echo "configure:759: checking whether ${MAKE-make} sets \${MAKE}" >&5
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- SET_MAKE="MAKE=${MAKE-make}"
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-
-echo $ac_n "checking for POSIXized ISC""... $ac_c" 1>&6
-echo "configure:786: checking for POSIXized ISC" >&5
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- echo "$ac_t""no" 1>&6
- ISC=
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-
-echo $ac_n "checking for ANSI C header files""... $ac_c" 1>&6
-echo "configure:807: checking for ANSI C header files" >&5
-if eval "test \"`echo '$''{'ac_cv_header_stdc'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 812 "configure"
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-ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
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-ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
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- ac_cv_header_stdc=yes
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- echo "$ac_err" >&5
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- ac_cv_header_stdc=no
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-rm -f conftest*
-
-if test $ac_cv_header_stdc = yes; then
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-#line 837 "configure"
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-EOF
-if (eval "$ac_cpp conftest.$ac_ext") 2>&5 |
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- rm -rf conftest*
- ac_cv_header_stdc=no
-fi
-rm -f conftest*
-
-fi
-
-if test $ac_cv_header_stdc = yes; then
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-cat > conftest.$ac_ext <<EOF
-#line 855 "configure"
-#include "confdefs.h"
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-EOF
-if (eval "$ac_cpp conftest.$ac_ext") 2>&5 |
- egrep "free" >/dev/null 2>&1; then
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- rm -rf conftest*
- ac_cv_header_stdc=no
-fi
-rm -f conftest*
-
-fi
-
-if test $ac_cv_header_stdc = yes; then
- # /bin/cc in Irix-4.0.5 gets non-ANSI ctype macros unless using -ansi.
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- cat > conftest.$ac_ext <<EOF
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-if { (eval echo configure:887: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null
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-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -fr conftest*
- ac_cv_header_stdc=no
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-rm -fr conftest*
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-
-fi
-fi
-
-echo "$ac_t""$ac_cv_header_stdc" 1>&6
-if test $ac_cv_header_stdc = yes; then
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-#define STDC_HEADERS 1
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-
-fi
-
-echo $ac_n "checking for working const""... $ac_c" 1>&6
-echo "configure:911: checking for working const" >&5
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- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 916 "configure"
-#include "confdefs.h"
-
-int main() {
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-/* Ultrix mips cc rejects this. */
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-/* NEC SVR4.0.2 mips cc rejects this. */
-struct point {int x, y;};
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-{ /* SCO 3.2v4 cc rejects this. */
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-
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-{ /* Someone thinks the Sun supposedly-ANSI compiler will reject this. */
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-{ /* Sun SC1.0 ANSI compiler rejects this -- but not the above. */
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-{ /* AIX XL C 1.02.0.0 rejects this saying
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-{ /* ULTRIX-32 V3.1 (Rev 9) vcc rejects this */
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-
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-if { (eval echo configure:965: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
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- ac_cv_c_const=yes
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- ac_cv_c_const=no
-fi
-rm -f conftest*
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-
-echo "$ac_t""$ac_cv_c_const" 1>&6
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-
-fi
-
-echo $ac_n "checking for inline""... $ac_c" 1>&6
-echo "configure:986: checking for inline" >&5
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-else
- ac_cv_c_inline=no
-for ac_kw in inline __inline__ __inline; do
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-#line 993 "configure"
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-if { (eval echo configure:1000: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
- rm -rf conftest*
- ac_cv_c_inline=$ac_kw; break
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
-fi
-rm -f conftest*
-done
-
-fi
-
-echo "$ac_t""$ac_cv_c_inline" 1>&6
-case "$ac_cv_c_inline" in
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- *) cat >> confdefs.h <<EOF
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-echo $ac_n "checking for off_t""... $ac_c" 1>&6
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-if eval "test \"`echo '$''{'ac_cv_type_off_t'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
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- cat > conftest.$ac_ext <<EOF
-#line 1031 "configure"
-#include "confdefs.h"
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-#if STDC_HEADERS
-#include <stdlib.h>
-#include <stddef.h>
-#endif
-EOF
-if (eval "$ac_cpp conftest.$ac_ext") 2>&5 |
- egrep "(^|[^a-zA-Z_0-9])off_t[^a-zA-Z_0-9]" >/dev/null 2>&1; then
- rm -rf conftest*
- ac_cv_type_off_t=yes
-else
- rm -rf conftest*
- ac_cv_type_off_t=no
-fi
-rm -f conftest*
-
-fi
-echo "$ac_t""$ac_cv_type_off_t" 1>&6
-if test $ac_cv_type_off_t = no; then
- cat >> confdefs.h <<\EOF
-#define off_t long
-EOF
-
-fi
-
-echo $ac_n "checking for size_t""... $ac_c" 1>&6
-echo "configure:1059: checking for size_t" >&5
-if eval "test \"`echo '$''{'ac_cv_type_size_t'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1064 "configure"
-#include "confdefs.h"
-#include <sys/types.h>
-#if STDC_HEADERS
-#include <stdlib.h>
-#include <stddef.h>
-#endif
-EOF
-if (eval "$ac_cpp conftest.$ac_ext") 2>&5 |
- egrep "(^|[^a-zA-Z_0-9])size_t[^a-zA-Z_0-9]" >/dev/null 2>&1; then
- rm -rf conftest*
- ac_cv_type_size_t=yes
-else
- rm -rf conftest*
- ac_cv_type_size_t=no
-fi
-rm -f conftest*
-
-fi
-echo "$ac_t""$ac_cv_type_size_t" 1>&6
-if test $ac_cv_type_size_t = no; then
- cat >> confdefs.h <<\EOF
-#define size_t unsigned
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-
-fi
-
-# The Ultrix 4.2 mips builtin alloca declared by alloca.h only works
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-echo $ac_n "checking for working alloca.h""... $ac_c" 1>&6
-echo "configure:1094: checking for working alloca.h" >&5
-if eval "test \"`echo '$''{'ac_cv_header_alloca_h'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1099 "configure"
-#include "confdefs.h"
-#include <alloca.h>
-int main() {
-char *p = alloca(2 * sizeof(int));
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-EOF
-if { (eval echo configure:1106: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- rm -rf conftest*
- ac_cv_header_alloca_h=yes
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- ac_cv_header_alloca_h=no
-fi
-rm -f conftest*
-fi
-
-echo "$ac_t""$ac_cv_header_alloca_h" 1>&6
-if test $ac_cv_header_alloca_h = yes; then
- cat >> confdefs.h <<\EOF
-#define HAVE_ALLOCA_H 1
-EOF
-
-fi
-
-echo $ac_n "checking for alloca""... $ac_c" 1>&6
-echo "configure:1127: checking for alloca" >&5
-if eval "test \"`echo '$''{'ac_cv_func_alloca_works'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1132 "configure"
-#include "confdefs.h"
-
-#ifdef __GNUC__
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-# else
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-# include <alloca.h>
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-# ifdef _AIX
- #pragma alloca
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-# endif
-# endif
-# endif
-# endif
-#endif
-
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-if { (eval echo configure:1160: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- rm -rf conftest*
- ac_cv_func_alloca_works=yes
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- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- ac_cv_func_alloca_works=no
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-rm -f conftest*
-fi
-
-echo "$ac_t""$ac_cv_func_alloca_works" 1>&6
-if test $ac_cv_func_alloca_works = yes; then
- cat >> confdefs.h <<\EOF
-#define HAVE_ALLOCA 1
-EOF
-
-fi
-
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- # use ar to extract alloca.o from them instead of compiling alloca.c.
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- cat >> confdefs.h <<\EOF
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-
-
-echo $ac_n "checking whether alloca needs Cray hooks""... $ac_c" 1>&6
-echo "configure:1192: checking whether alloca needs Cray hooks" >&5
-if eval "test \"`echo '$''{'ac_cv_os_cray'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1197 "configure"
-#include "confdefs.h"
-#if defined(CRAY) && ! defined(CRAY2)
-webecray
-#else
-wenotbecray
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-
-EOF
-if (eval "$ac_cpp conftest.$ac_ext") 2>&5 |
- egrep "webecray" >/dev/null 2>&1; then
- rm -rf conftest*
- ac_cv_os_cray=yes
-else
- rm -rf conftest*
- ac_cv_os_cray=no
-fi
-rm -f conftest*
-
-fi
-
-echo "$ac_t""$ac_cv_os_cray" 1>&6
-if test $ac_cv_os_cray = yes; then
-for ac_func in _getb67 GETB67 getb67; do
- echo $ac_n "checking for $ac_func""... $ac_c" 1>&6
-echo "configure:1222: checking for $ac_func" >&5
-if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1227 "configure"
-#include "confdefs.h"
-/* System header to define __stub macros and hopefully few prototypes,
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-#include <assert.h>
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-/* We use char because int might match the return type of a gcc2
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-char $ac_func();
-
-int main() {
-
-/* The GNU C library defines this for functions which it implements
- to always fail with ENOSYS. Some functions are actually named
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-#if defined (__stub_$ac_func) || defined (__stub___$ac_func)
-choke me
-#else
-$ac_func();
-#endif
-
-; return 0; }
-EOF
-if { (eval echo configure:1250: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=yes"
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=no"
-fi
-rm -f conftest*
-fi
-
-if eval "test \"`echo '$ac_cv_func_'$ac_func`\" = yes"; then
- echo "$ac_t""yes" 1>&6
- cat >> confdefs.h <<EOF
-#define CRAY_STACKSEG_END $ac_func
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-
- break
-else
- echo "$ac_t""no" 1>&6
-fi
-
-done
-fi
-
-echo $ac_n "checking stack direction for C alloca""... $ac_c" 1>&6
-echo "configure:1277: checking stack direction for C alloca" >&5
-if eval "test \"`echo '$''{'ac_cv_c_stack_direction'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- if test "$cross_compiling" = yes; then
- ac_cv_c_stack_direction=0
-else
- cat > conftest.$ac_ext <<EOF
-#line 1285 "configure"
-#include "confdefs.h"
-find_stack_direction ()
-{
- static char *addr = 0;
- auto char dummy;
- if (addr == 0)
- {
- addr = &dummy;
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- else
- return (&dummy > addr) ? 1 : -1;
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-{
- exit (find_stack_direction() < 0);
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-if { (eval echo configure:1304: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null
-then
- ac_cv_c_stack_direction=1
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -fr conftest*
- ac_cv_c_stack_direction=-1
-fi
-rm -fr conftest*
-fi
-
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-
-echo "$ac_t""$ac_cv_c_stack_direction" 1>&6
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-
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-{ (eval echo configure:1339: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
-ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
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- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
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- eval "ac_cv_header_$ac_safe=no"
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- ac_tr_hdr=HAVE_`echo $ac_hdr | sed 'y%abcdefghijklmnopqrstuvwxyz./-%ABCDEFGHIJKLMNOPQRSTUVWXYZ___%'`
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-
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- echo "$ac_t""no" 1>&6
-fi
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-
-for ac_func in getpagesize
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-echo $ac_n "checking for $ac_func""... $ac_c" 1>&6
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-if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1373 "configure"
-#include "confdefs.h"
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-/* Override any gcc2 internal prototype to avoid an error. */
-/* We use char because int might match the return type of a gcc2
- builtin and then its argument prototype would still apply. */
-char $ac_func();
-
-int main() {
-
-/* The GNU C library defines this for functions which it implements
- to always fail with ENOSYS. Some functions are actually named
- something starting with __ and the normal name is an alias. */
-#if defined (__stub_$ac_func) || defined (__stub___$ac_func)
-choke me
-#else
-$ac_func();
-#endif
-
-; return 0; }
-EOF
-if { (eval echo configure:1396: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
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- eval "ac_cv_func_$ac_func=yes"
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=no"
-fi
-rm -f conftest*
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-
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- ac_tr_func=HAVE_`echo $ac_func | tr 'abcdefghijklmnopqrstuvwxyz' 'ABCDEFGHIJKLMNOPQRSTUVWXYZ'`
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-
-else
- echo "$ac_t""no" 1>&6
-fi
-done
-
-echo $ac_n "checking for working mmap""... $ac_c" 1>&6
-echo "configure:1421: checking for working mmap" >&5
-if eval "test \"`echo '$''{'ac_cv_func_mmap_fixed_mapped'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- if test "$cross_compiling" = yes; then
- ac_cv_func_mmap_fixed_mapped=no
-else
- cat > conftest.$ac_ext <<EOF
-#line 1429 "configure"
-#include "confdefs.h"
-
-/* Thanks to Mike Haertel and Jim Avera for this test.
- Here is a matrix of mmap possibilities:
- mmap private not fixed
- mmap private fixed at somewhere currently unmapped
- mmap private fixed at somewhere already mapped
- mmap shared not fixed
- mmap shared fixed at somewhere currently unmapped
- mmap shared fixed at somewhere already mapped
- For private mappings, we should verify that changes cannot be read()
- back from the file, nor mmap's back from the file at a different
- address. (There have been systems where private was not correctly
- implemented like the infamous i386 svr4.0, and systems where the
- VM page cache was not coherent with the filesystem buffer cache
- like early versions of FreeBSD and possibly contemporary NetBSD.)
- For shared mappings, we should conversely verify that changes get
- propogated back to all the places they're supposed to be.
-
- Grep wants private fixed already mapped.
- The main things grep needs to know about mmap are:
- * does it exist and is it safe to write into the mmap'd area
- * how to use it (BSD variants) */
-#include <sys/types.h>
-#include <fcntl.h>
-#include <sys/mman.h>
-
-/* This mess was copied from the GNU getpagesize.h. */
-#ifndef HAVE_GETPAGESIZE
-# ifdef HAVE_UNISTD_H
-# include <unistd.h>
-# endif
-
-/* Assume that all systems that can run configure have sys/param.h. */
-# ifndef HAVE_SYS_PARAM_H
-# define HAVE_SYS_PARAM_H 1
-# endif
-
-# ifdef _SC_PAGESIZE
-# define getpagesize() sysconf(_SC_PAGESIZE)
-# else /* no _SC_PAGESIZE */
-# ifdef HAVE_SYS_PARAM_H
-# include <sys/param.h>
-# ifdef EXEC_PAGESIZE
-# define getpagesize() EXEC_PAGESIZE
-# else /* no EXEC_PAGESIZE */
-# ifdef NBPG
-# define getpagesize() NBPG * CLSIZE
-# ifndef CLSIZE
-# define CLSIZE 1
-# endif /* no CLSIZE */
-# else /* no NBPG */
-# ifdef NBPC
-# define getpagesize() NBPC
-# else /* no NBPC */
-# ifdef PAGESIZE
-# define getpagesize() PAGESIZE
-# endif /* PAGESIZE */
-# endif /* no NBPC */
-# endif /* no NBPG */
-# endif /* no EXEC_PAGESIZE */
-# else /* no HAVE_SYS_PARAM_H */
-# define getpagesize() 8192 /* punt totally */
-# endif /* no HAVE_SYS_PARAM_H */
-# endif /* no _SC_PAGESIZE */
-
-#endif /* no HAVE_GETPAGESIZE */
-
-#ifdef __cplusplus
-extern "C" { void *malloc(unsigned); }
-#else
-char *malloc();
-#endif
-
-int
-main()
-{
- char *data, *data2, *data3;
- int i, pagesize;
- int fd;
-
- pagesize = getpagesize();
-
- /*
- * First, make a file with some known garbage in it.
- */
- data = malloc(pagesize);
- if (!data)
- exit(1);
- for (i = 0; i < pagesize; ++i)
- *(data + i) = rand();
- umask(0);
- fd = creat("conftestmmap", 0600);
- if (fd < 0)
- exit(1);
- if (write(fd, data, pagesize) != pagesize)
- exit(1);
- close(fd);
-
- /*
- * Next, try to mmap the file at a fixed address which
- * already has something else allocated at it. If we can,
- * also make sure that we see the same garbage.
- */
- fd = open("conftestmmap", O_RDWR);
- if (fd < 0)
- exit(1);
- data2 = malloc(2 * pagesize);
- if (!data2)
- exit(1);
- data2 += (pagesize - ((int) data2 & (pagesize - 1))) & (pagesize - 1);
- if (data2 != mmap(data2, pagesize, PROT_READ | PROT_WRITE,
- MAP_PRIVATE | MAP_FIXED, fd, 0L))
- exit(1);
- for (i = 0; i < pagesize; ++i)
- if (*(data + i) != *(data2 + i))
- exit(1);
-
- /*
- * Finally, make sure that changes to the mapped area
- * do not percolate back to the file as seen by read().
- * (This is a bug on some variants of i386 svr4.0.)
- */
- for (i = 0; i < pagesize; ++i)
- *(data2 + i) = *(data2 + i) + 1;
- data3 = malloc(pagesize);
- if (!data3)
- exit(1);
- if (read(fd, data3, pagesize) != pagesize)
- exit(1);
- for (i = 0; i < pagesize; ++i)
- if (*(data + i) != *(data3 + i))
- exit(1);
- close(fd);
- unlink("conftestmmap");
- exit(0);
-}
-
-EOF
-if { (eval echo configure:1569: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null
-then
- ac_cv_func_mmap_fixed_mapped=yes
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -fr conftest*
- ac_cv_func_mmap_fixed_mapped=no
-fi
-rm -fr conftest*
-fi
-
-fi
-
-echo "$ac_t""$ac_cv_func_mmap_fixed_mapped" 1>&6
-if test $ac_cv_func_mmap_fixed_mapped = yes; then
- cat >> confdefs.h <<\EOF
-#define HAVE_MMAP 1
-EOF
-
-fi
-
-echo $ac_n "checking for Cygwin environment""... $ac_c" 1>&6
-echo "configure:1592: checking for Cygwin environment" >&5
-if eval "test \"`echo '$''{'ac_cv_cygwin'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1597 "configure"
-#include "confdefs.h"
-
-int main() {
-
-#ifndef __CYGWIN__
-#define __CYGWIN__ __CYGWIN32__
-#endif
-return __CYGWIN__;
-; return 0; }
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-if { (eval echo configure:1608: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
- rm -rf conftest*
- ac_cv_cygwin=yes
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- ac_cv_cygwin=no
-fi
-rm -f conftest*
-rm -f conftest*
-fi
-
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-CYGWIN=
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-echo $ac_n "checking for mingw32 environment""... $ac_c" 1>&6
-echo "configure:1625: checking for mingw32 environment" >&5
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- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1630 "configure"
-#include "confdefs.h"
-
-int main() {
-return __MINGW32__;
-; return 0; }
-EOF
-if { (eval echo configure:1637: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
- rm -rf conftest*
- ac_cv_mingw32=yes
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- ac_cv_mingw32=no
-fi
-rm -f conftest*
-rm -f conftest*
-fi
-
-echo "$ac_t""$ac_cv_mingw32" 1>&6
-MINGW32=
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-
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-
-
-ac_aux_dir=
-for ac_dir in `cd $srcdir;pwd`/../.. $srcdir/`cd $srcdir;pwd`/../..; do
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- ac_install_sh="$ac_aux_dir/install-sh -c"
- break
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- ac_install_sh="$ac_aux_dir/install.sh -c"
- break
- fi
-done
-if test -z "$ac_aux_dir"; then
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-fi
-ac_config_guess=$ac_aux_dir/config.guess
-ac_config_sub=$ac_aux_dir/config.sub
-ac_configure=$ac_aux_dir/configure # This should be Cygnus configure.
-
-
-# Do some error checking and defaulting for the host and target type.
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-#
-# The rules are:
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-# 2. Host defaults to nonopt.
-# 3. If nonopt is not specified, then host defaults to the current host,
-# as determined by config.guess.
-# 4. Target and build default to nonopt.
-# 5. If nonopt is not specified, then target and build default to host.
-
-# The aliases save the names the user supplied, while $host etc.
-# will get canonicalized.
-case $host---$target---$nonopt in
-NONE---*---* | *---NONE---* | *---*---NONE) ;;
-*) { echo "configure: error: can only configure for one host and one target at a time" 1>&2; exit 1; } ;;
-esac
-
-
-# Make sure we can run config.sub.
-if ${CONFIG_SHELL-/bin/sh} $ac_config_sub sun4 >/dev/null 2>&1; then :
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-fi
-
-echo $ac_n "checking host system type""... $ac_c" 1>&6
-echo "configure:1704: checking host system type" >&5
-
-host_alias=$host
-case "$host_alias" in
-NONE)
- case $nonopt in
- NONE)
- if host_alias=`${CONFIG_SHELL-/bin/sh} $ac_config_guess`; then :
- else { echo "configure: error: can not guess host type; you must specify one" 1>&2; exit 1; }
- fi ;;
- *) host_alias=$nonopt ;;
- esac ;;
-esac
-
-host=`${CONFIG_SHELL-/bin/sh} $ac_config_sub $host_alias`
-host_cpu=`echo $host | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\1/'`
-host_vendor=`echo $host | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\2/'`
-host_os=`echo $host | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\3/'`
-echo "$ac_t""$host" 1>&6
-
-echo $ac_n "checking target system type""... $ac_c" 1>&6
-echo "configure:1725: checking target system type" >&5
-
-target_alias=$target
-case "$target_alias" in
-NONE)
- case $nonopt in
- NONE) target_alias=$host_alias ;;
- *) target_alias=$nonopt ;;
- esac ;;
-esac
-
-target=`${CONFIG_SHELL-/bin/sh} $ac_config_sub $target_alias`
-target_cpu=`echo $target | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\1/'`
-target_vendor=`echo $target | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\2/'`
-target_os=`echo $target | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\3/'`
-echo "$ac_t""$target" 1>&6
-
-echo $ac_n "checking build system type""... $ac_c" 1>&6
-echo "configure:1743: checking build system type" >&5
-
-build_alias=$build
-case "$build_alias" in
-NONE)
- case $nonopt in
- NONE) build_alias=$host_alias ;;
- *) build_alias=$nonopt ;;
- esac ;;
-esac
-
-build=`${CONFIG_SHELL-/bin/sh} $ac_config_sub $build_alias`
-build_cpu=`echo $build | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\1/'`
-build_vendor=`echo $build | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\2/'`
-build_os=`echo $build | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\3/'`
-echo "$ac_t""$build" 1>&6
-
-test "$host_alias" != "$target_alias" &&
- test "$program_prefix$program_suffix$program_transform_name" = \
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- program_prefix=${target_alias}-
-
-if test "$program_transform_name" = s,x,x,; then
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-else
- # Double any \ or $. echo might interpret backslashes.
- cat <<\EOF_SED > conftestsed
-s,\\,\\\\,g; s,\$,$$,g
-EOF_SED
- program_transform_name="`echo $program_transform_name|sed -f conftestsed`"
- rm -f conftestsed
-fi
-test "$program_prefix" != NONE &&
- program_transform_name="s,^,${program_prefix},; $program_transform_name"
-# Use a double $ so make ignores it.
-test "$program_suffix" != NONE &&
- program_transform_name="s,\$\$,${program_suffix},; $program_transform_name"
-
-# sed with no file args requires a program.
-test "$program_transform_name" = "" && program_transform_name="s,x,x,"
-
-# Extract the first word of "gcc", so it can be a program name with args.
-set dummy gcc; ac_word=$2
-echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:1787: checking for $ac_word" >&5
-if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- if test -n "$CC"; then
- ac_cv_prog_CC="$CC" # Let the user override the test.
-else
- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
- ac_dummy="$PATH"
- for ac_dir in $ac_dummy; do
- test -z "$ac_dir" && ac_dir=.
- if test -f $ac_dir/$ac_word; then
- ac_cv_prog_CC="gcc"
- break
- fi
- done
- IFS="$ac_save_ifs"
-fi
-fi
-CC="$ac_cv_prog_CC"
-if test -n "$CC"; then
- echo "$ac_t""$CC" 1>&6
-else
- echo "$ac_t""no" 1>&6
-fi
-
-if test -z "$CC"; then
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-echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:1817: checking for $ac_word" >&5
-if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- if test -n "$CC"; then
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-else
- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
- ac_prog_rejected=no
- ac_dummy="$PATH"
- for ac_dir in $ac_dummy; do
- test -z "$ac_dir" && ac_dir=.
- if test -f $ac_dir/$ac_word; then
- if test "$ac_dir/$ac_word" = "/usr/ucb/cc"; then
- ac_prog_rejected=yes
- continue
- fi
- ac_cv_prog_CC="cc"
- break
- fi
- done
- IFS="$ac_save_ifs"
-if test $ac_prog_rejected = yes; then
- # We found a bogon in the path, so make sure we never use it.
- set dummy $ac_cv_prog_CC
- shift
- if test $# -gt 0; then
- # We chose a different compiler from the bogus one.
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- # first if we set CC to just the basename; use the full file name.
- shift
- set dummy "$ac_dir/$ac_word" "$@"
- shift
- ac_cv_prog_CC="$@"
- fi
-fi
-fi
-fi
-CC="$ac_cv_prog_CC"
-if test -n "$CC"; then
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-else
- echo "$ac_t""no" 1>&6
-fi
-
- if test -z "$CC"; then
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- *win32* | *WIN32*)
- # Extract the first word of "cl", so it can be a program name with args.
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-echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:1868: checking for $ac_word" >&5
-if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- if test -n "$CC"; then
- ac_cv_prog_CC="$CC" # Let the user override the test.
-else
- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
- ac_dummy="$PATH"
- for ac_dir in $ac_dummy; do
- test -z "$ac_dir" && ac_dir=.
- if test -f $ac_dir/$ac_word; then
- ac_cv_prog_CC="cl"
- break
- fi
- done
- IFS="$ac_save_ifs"
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-CC="$ac_cv_prog_CC"
-if test -n "$CC"; then
- echo "$ac_t""$CC" 1>&6
-else
- echo "$ac_t""no" 1>&6
-fi
- ;;
- esac
- fi
- test -z "$CC" && { echo "configure: error: no acceptable cc found in \$PATH" 1>&2; exit 1; }
-fi
-
-echo $ac_n "checking whether the C compiler ($CC $CFLAGS $LDFLAGS) works""... $ac_c" 1>&6
-echo "configure:1900: checking whether the C compiler ($CC $CFLAGS $LDFLAGS) works" >&5
-
-ac_ext=c
-# CFLAGS is not in ac_cpp because -g, -O, etc. are not valid cpp options.
-ac_cpp='$CPP $CPPFLAGS'
-ac_compile='${CC-cc} -c $CFLAGS $CPPFLAGS conftest.$ac_ext 1>&5'
-ac_link='${CC-cc} -o conftest${ac_exeext} $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS 1>&5'
-cross_compiling=$ac_cv_prog_cc_cross
-
-cat > conftest.$ac_ext << EOF
-
-#line 1911 "configure"
-#include "confdefs.h"
-
-main(){return(0);}
-EOF
-if { (eval echo configure:1916: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- ac_cv_prog_cc_works=yes
- # If we can't run a trivial program, we are probably using a cross compiler.
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- else
- ac_cv_prog_cc_cross=yes
- fi
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- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- ac_cv_prog_cc_works=no
-fi
-rm -fr conftest*
-ac_ext=c
-# CFLAGS is not in ac_cpp because -g, -O, etc. are not valid cpp options.
-ac_cpp='$CPP $CPPFLAGS'
-ac_compile='${CC-cc} -c $CFLAGS $CPPFLAGS conftest.$ac_ext 1>&5'
-ac_link='${CC-cc} -o conftest${ac_exeext} $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS 1>&5'
-cross_compiling=$ac_cv_prog_cc_cross
-
-echo "$ac_t""$ac_cv_prog_cc_works" 1>&6
-if test $ac_cv_prog_cc_works = no; then
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-fi
-echo $ac_n "checking whether the C compiler ($CC $CFLAGS $LDFLAGS) is a cross-compiler""... $ac_c" 1>&6
-echo "configure:1942: checking whether the C compiler ($CC $CFLAGS $LDFLAGS) is a cross-compiler" >&5
-echo "$ac_t""$ac_cv_prog_cc_cross" 1>&6
-cross_compiling=$ac_cv_prog_cc_cross
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-echo "configure:2571: checking for $ac_word" >&5
-if eval "test \"`echo '$''{'ac_cv_path_GMSGFMT'+set}'`\" = set"; then
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- case "$GMSGFMT" in
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- ?:/*)
- ac_cv_path_GMSGFMT="$GMSGFMT" # Let the user override the test with a dos path.
- ;;
- *)
- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
- ac_dummy="$PATH"
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- done
- IFS="$ac_save_ifs"
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- echo "$ac_t""no" 1>&6
-fi
-
- # Extract the first word of "xgettext", so it can be a program name with args.
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-echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:2607: checking for $ac_word" >&5
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- case "$XGETTEXT" in
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- ac_cv_path_XGETTEXT="$XGETTEXT" # Let the user override the test with a path.
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- *)
- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS="${IFS}:"
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- IFS="$ac_save_ifs"
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-XGETTEXT="$ac_cv_path_XGETTEXT"
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- echo "$ac_t""no" 1>&6
-fi
-
- cat > conftest.$ac_ext <<EOF
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- cat conftest.$ac_ext >&5
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-
-
-
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- *)
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- IFS="$ac_save_ifs"
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-
- # Extract the first word of "gmsgfmt", so it can be a program name with args.
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- *)
- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
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- IFS="$ac_save_ifs"
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-
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-echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
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- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS="${IFS}:"
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- IFS="$ac_save_ifs"
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-else
- echo "$ac_t""no" 1>&6
-fi
-
-
- USE_INCLUDED_LIBINTL=yes
- CATOBJEXT=.gmo
- INSTOBJEXT=.mo
- DATADIRNAME=share
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- LIBS=`echo $LIBS | sed -e 's/-lintl//'`
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-
-
-
-
-
-
-
-
-
-
-
-
-
-
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- echo $ac_n "checking for catalogs to be installed""... $ac_c" 1>&6
-echo "configure:2839: checking for catalogs to be installed" >&5
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- else
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-
-
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- eval "ac_cv_header_$ac_safe=yes"
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- echo "$ac_err" >&5
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=no"
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-rm -f conftest*
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-if eval "test \"`echo '$ac_cv_header_'$ac_safe`\" = yes"; then
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- echo "$ac_t""no" 1>&6
-msgformat=xopen
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-
-
- sed -e '/^#/d' $srcdir/$msgformat-msg.sed > po2msg.sed
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- sed -e '/^#.*[^\\]$/d' -e '/^#$/d' \
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-
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- GT_NO=
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-
-
-
- MKINSTALLDIRS="\$(srcdir)/../../mkinstalldirs"
-
-
- l=
-
-
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- fi
-
-
-# Check for common headers.
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-for ac_hdr in stdlib.h string.h strings.h unistd.h time.h
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-echo "configure:2946: checking for $ac_hdr" >&5
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-else
- cat > conftest.$ac_ext <<EOF
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-ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:2956: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
-ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
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- eval "ac_cv_header_$ac_safe=yes"
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- echo "configure: failed program was:" >&5
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- eval "ac_cv_header_$ac_safe=no"
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- ac_tr_hdr=HAVE_`echo $ac_hdr | sed 'y%abcdefghijklmnopqrstuvwxyz./-%ABCDEFGHIJKLMNOPQRSTUVWXYZ___%'`
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-echo "configure:2986: checking for $ac_hdr" >&5
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-{ (eval echo configure:2996: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
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- eval "ac_cv_header_$ac_safe=yes"
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- echo "$ac_err" >&5
- echo "configure: failed program was:" >&5
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- eval "ac_cv_header_$ac_safe=no"
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- ac_tr_hdr=HAVE_`echo $ac_hdr | sed 'y%abcdefghijklmnopqrstuvwxyz./-%ABCDEFGHIJKLMNOPQRSTUVWXYZ___%'`
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-
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-echo "configure:3026: checking for $ac_hdr" >&5
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-{ (eval echo configure:3036: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
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- echo "configure: failed program was:" >&5
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- eval "ac_cv_header_$ac_safe=no"
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- ac_tr_hdr=HAVE_`echo $ac_hdr | sed 'y%abcdefghijklmnopqrstuvwxyz./-%ABCDEFGHIJKLMNOPQRSTUVWXYZ___%'`
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-
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-echo "configure:3066: checking for $ac_hdr" >&5
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-#line 3071 "configure"
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-ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:3076: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
-ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
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- eval "ac_cv_header_$ac_safe=yes"
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- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=no"
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- ac_tr_hdr=HAVE_`echo $ac_hdr | sed 'y%abcdefghijklmnopqrstuvwxyz./-%ABCDEFGHIJKLMNOPQRSTUVWXYZ___%'`
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-
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-#line 3110 "configure"
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-/* We use char because int might match the return type of a gcc2
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-
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-
-/* The GNU C library defines this for functions which it implements
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-#if defined (__stub_$ac_func) || defined (__stub___$ac_func)
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-$ac_func();
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-
-; return 0; }
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-if { (eval echo configure:3133: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
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- eval "ac_cv_func_$ac_func=yes"
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- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=no"
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-
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- ac_tr_func=HAVE_`echo $ac_func | tr 'abcdefghijklmnopqrstuvwxyz' 'ABCDEFGHIJKLMNOPQRSTUVWXYZ'`
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-
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-fi
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-
-
-# Check for socket libraries
-echo $ac_n "checking for bind in -lsocket""... $ac_c" 1>&6
-echo "configure:3160: checking for bind in -lsocket" >&5
-ac_lib_var=`echo socket'_'bind | sed 'y%./+-%__p_%'`
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- ac_save_LIBS="$LIBS"
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-cat > conftest.$ac_ext <<EOF
-#line 3168 "configure"
-#include "confdefs.h"
-/* Override any gcc2 internal prototype to avoid an error. */
-/* We use char because int might match the return type of a gcc2
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-char bind();
-
-int main() {
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-if { (eval echo configure:3179: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
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- eval "ac_cv_lib_$ac_lib_var=yes"
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- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_lib_$ac_lib_var=no"
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-rm -f conftest*
-LIBS="$ac_save_LIBS"
-
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- ac_tr_lib=HAVE_LIB`echo socket | sed -e 's/[^a-zA-Z0-9_]/_/g' \
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- cat >> confdefs.h <<EOF
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-
- LIBS="-lsocket $LIBS"
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-
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-
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-
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-COPRO=armcopro.o
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-trap 'rm -f $CONFIG_STATUS conftest*; exit 1' 1 2 15
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-DEFS=-DHAVE_CONFIG_H
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-CONFIG_FILES=\${CONFIG_FILES-"Makefile.sim:Makefile.in Make-common.sim:../common/Make-common.in .gdbinit:../common/gdbinit.in"}
-EOF
-cat >> $CONFIG_STATUS <<\EOF
-for ac_file in .. $CONFIG_FILES; do if test "x$ac_file" != x..; then
- # Support "outfile[:infile[:infile...]]", defaulting infile="outfile.in".
- case "$ac_file" in
- *:*) ac_file_in=`echo "$ac_file"|sed 's%[^:]*:%%'`
- ac_file=`echo "$ac_file"|sed 's%:.*%%'` ;;
- *) ac_file_in="${ac_file}.in" ;;
- esac
-
- # Adjust a relative srcdir, top_srcdir, and INSTALL for subdirectories.
-
- # Remove last slash and all that follows it. Not all systems have dirname.
- ac_dir=`echo $ac_file|sed 's%/[^/][^/]*$%%'`
- if test "$ac_dir" != "$ac_file" && test "$ac_dir" != .; then
- # The file is in a subdirectory.
- test ! -d "$ac_dir" && mkdir "$ac_dir"
- ac_dir_suffix="/`echo $ac_dir|sed 's%^\./%%'`"
- # A "../" for each directory in $ac_dir_suffix.
- ac_dots=`echo $ac_dir_suffix|sed 's%/[^/]*%../%g'`
- else
- ac_dir_suffix= ac_dots=
- fi
-
- case "$ac_given_srcdir" in
- .) srcdir=.
- if test -z "$ac_dots"; then top_srcdir=.
- else top_srcdir=`echo $ac_dots|sed 's%/$%%'`; fi ;;
- /*) srcdir="$ac_given_srcdir$ac_dir_suffix"; top_srcdir="$ac_given_srcdir" ;;
- *) # Relative path.
- srcdir="$ac_dots$ac_given_srcdir$ac_dir_suffix"
- top_srcdir="$ac_dots$ac_given_srcdir" ;;
- esac
-
- case "$ac_given_INSTALL" in
- [/$]*) INSTALL="$ac_given_INSTALL" ;;
- *) INSTALL="$ac_dots$ac_given_INSTALL" ;;
- esac
-
- echo creating "$ac_file"
- rm -f "$ac_file"
- configure_input="Generated automatically from `echo $ac_file_in|sed 's%.*/%%'` by configure."
- case "$ac_file" in
- *Makefile*) ac_comsub="1i\\
-# $configure_input" ;;
- *) ac_comsub= ;;
- esac
-
- ac_file_inputs=`echo $ac_file_in|sed -e "s%^%$ac_given_srcdir/%" -e "s%:% $ac_given_srcdir/%g"`
- sed -e "$ac_comsub
-s%@configure_input@%$configure_input%g
-s%@srcdir@%$srcdir%g
-s%@top_srcdir@%$top_srcdir%g
-s%@INSTALL@%$INSTALL%g
-" $ac_file_inputs | (eval "$ac_sed_cmds") > $ac_file
-fi; done
-rm -f conftest.s*
-
-# These sed commands are passed to sed as "A NAME B NAME C VALUE D", where
-# NAME is the cpp macro being defined and VALUE is the value it is being given.
-#
-# ac_d sets the value in "#define NAME VALUE" lines.
-ac_dA='s%^\([ ]*\)#\([ ]*define[ ][ ]*\)'
-ac_dB='\([ ][ ]*\)[^ ]*%\1#\2'
-ac_dC='\3'
-ac_dD='%g'
-# ac_u turns "#undef NAME" with trailing blanks into "#define NAME VALUE".
-ac_uA='s%^\([ ]*\)#\([ ]*\)undef\([ ][ ]*\)'
-ac_uB='\([ ]\)%\1#\2define\3'
-ac_uC=' '
-ac_uD='\4%g'
-# ac_e turns "#undef NAME" without trailing blanks into "#define NAME VALUE".
-ac_eA='s%^\([ ]*\)#\([ ]*\)undef\([ ][ ]*\)'
-ac_eB='$%\1#\2define\3'
-ac_eC=' '
-ac_eD='%g'
-
-if test "${CONFIG_HEADERS+set}" != set; then
-EOF
-cat >> $CONFIG_STATUS <<EOF
- CONFIG_HEADERS="config.h:config.in"
-EOF
-cat >> $CONFIG_STATUS <<\EOF
-fi
-for ac_file in .. $CONFIG_HEADERS; do if test "x$ac_file" != x..; then
- # Support "outfile[:infile[:infile...]]", defaulting infile="outfile.in".
- case "$ac_file" in
- *:*) ac_file_in=`echo "$ac_file"|sed 's%[^:]*:%%'`
- ac_file=`echo "$ac_file"|sed 's%:.*%%'` ;;
- *) ac_file_in="${ac_file}.in" ;;
- esac
-
- echo creating $ac_file
-
- rm -f conftest.frag conftest.in conftest.out
- ac_file_inputs=`echo $ac_file_in|sed -e "s%^%$ac_given_srcdir/%" -e "s%:% $ac_given_srcdir/%g"`
- cat $ac_file_inputs > conftest.in
-
-EOF
-
-# Transform confdefs.h into a sed script conftest.vals that substitutes
-# the proper values into config.h.in to produce config.h. And first:
-# Protect against being on the right side of a sed subst in config.status.
-# Protect against being in an unquoted here document in config.status.
-rm -f conftest.vals
-cat > conftest.hdr <<\EOF
-s/[\\&%]/\\&/g
-s%[\\$`]%\\&%g
-s%#define \([A-Za-z_][A-Za-z0-9_]*\) *\(.*\)%${ac_dA}\1${ac_dB}\1${ac_dC}\2${ac_dD}%gp
-s%ac_d%ac_u%gp
-s%ac_u%ac_e%gp
-EOF
-sed -n -f conftest.hdr confdefs.h > conftest.vals
-rm -f conftest.hdr
-
-# This sed command replaces #undef with comments. This is necessary, for
-# example, in the case of _POSIX_SOURCE, which is predefined and required
-# on some systems where configure will not decide to define it.
-cat >> conftest.vals <<\EOF
-s%^[ ]*#[ ]*undef[ ][ ]*[a-zA-Z_][a-zA-Z_0-9]*%/* & */%
-EOF
-
-# Break up conftest.vals because some shells have a limit on
-# the size of here documents, and old seds have small limits too.
-
-rm -f conftest.tail
-while :
-do
- ac_lines=`grep -c . conftest.vals`
- # grep -c gives empty output for an empty file on some AIX systems.
- if test -z "$ac_lines" || test "$ac_lines" -eq 0; then break; fi
- # Write a limited-size here document to conftest.frag.
- echo ' cat > conftest.frag <<CEOF' >> $CONFIG_STATUS
- sed ${ac_max_here_lines}q conftest.vals >> $CONFIG_STATUS
- echo 'CEOF
- sed -f conftest.frag conftest.in > conftest.out
- rm -f conftest.in
- mv conftest.out conftest.in
-' >> $CONFIG_STATUS
- sed 1,${ac_max_here_lines}d conftest.vals > conftest.tail
- rm -f conftest.vals
- mv conftest.tail conftest.vals
-done
-rm -f conftest.vals
-
-cat >> $CONFIG_STATUS <<\EOF
- rm -f conftest.frag conftest.h
- echo "/* $ac_file. Generated automatically by configure. */" > conftest.h
- cat conftest.in >> conftest.h
- rm -f conftest.in
- if cmp -s $ac_file conftest.h 2>/dev/null; then
- echo "$ac_file is unchanged"
- rm -f conftest.h
- else
- # Remove last slash and all that follows it. Not all systems have dirname.
- ac_dir=`echo $ac_file|sed 's%/[^/][^/]*$%%'`
- if test "$ac_dir" != "$ac_file" && test "$ac_dir" != .; then
- # The file is in a subdirectory.
- test ! -d "$ac_dir" && mkdir "$ac_dir"
- fi
- rm -f $ac_file
- mv conftest.h $ac_file
- fi
-fi; done
-
-EOF
-
-cat >> $CONFIG_STATUS <<EOF
-ac_sources="$sim_link_files"
-ac_dests="$sim_link_links"
-EOF
-
-cat >> $CONFIG_STATUS <<\EOF
-srcdir=$ac_given_srcdir
-while test -n "$ac_sources"; do
- set $ac_dests; ac_dest=$1; shift; ac_dests=$*
- set $ac_sources; ac_source=$1; shift; ac_sources=$*
-
- echo "linking $srcdir/$ac_source to $ac_dest"
-
- if test ! -r $srcdir/$ac_source; then
- { echo "configure: error: $srcdir/$ac_source: File not found" 1>&2; exit 1; }
- fi
- rm -f $ac_dest
-
- # Make relative symlinks.
- # Remove last slash and all that follows it. Not all systems have dirname.
- ac_dest_dir=`echo $ac_dest|sed 's%/[^/][^/]*$%%'`
- if test "$ac_dest_dir" != "$ac_dest" && test "$ac_dest_dir" != .; then
- # The dest file is in a subdirectory.
- test ! -d "$ac_dest_dir" && mkdir "$ac_dest_dir"
- ac_dest_dir_suffix="/`echo $ac_dest_dir|sed 's%^\./%%'`"
- # A "../" for each directory in $ac_dest_dir_suffix.
- ac_dots=`echo $ac_dest_dir_suffix|sed 's%/[^/]*%../%g'`
- else
- ac_dest_dir_suffix= ac_dots=
- fi
-
- case "$srcdir" in
- [/$]*) ac_rel_source="$srcdir/$ac_source" ;;
- *) ac_rel_source="$ac_dots$srcdir/$ac_source" ;;
- esac
-
- # Make a symlink if possible; otherwise try a hard link.
- if ln -s $ac_rel_source $ac_dest 2>/dev/null ||
- ln $srcdir/$ac_source $ac_dest; then :
- else
- { echo "configure: error: can not link $ac_dest to $srcdir/$ac_source" 1>&2; exit 1; }
- fi
-done
-EOF
-cat >> $CONFIG_STATUS <<EOF
-
-EOF
-cat >> $CONFIG_STATUS <<\EOF
-case "x$CONFIG_FILES" in
- xMakefile*)
- echo "Merging Makefile.sim+Make-common.sim into Makefile ..."
- rm -f Makesim1.tmp Makesim2.tmp Makefile
- sed -n -e '/^## COMMON_PRE_/,/^## End COMMON_PRE_/ p' <Make-common.sim >Makesim1.tmp
- sed -n -e '/^## COMMON_POST_/,/^## End COMMON_POST_/ p' <Make-common.sim >Makesim2.tmp
- sed -e '/^## COMMON_PRE_/ r Makesim1.tmp' \
- -e '/^## COMMON_POST_/ r Makesim2.tmp' \
- <Makefile.sim >Makefile
- rm -f Makefile.sim Make-common.sim Makesim1.tmp Makesim2.tmp
- ;;
- esac
- case "x$CONFIG_HEADERS" in xconfig.h:config.in) echo > stamp-h ;; esac
-
-exit 0
-EOF
-chmod +x $CONFIG_STATUS
-rm -fr confdefs* $ac_clean_files
-test "$no_create" = yes || ${CONFIG_SHELL-/bin/sh} $CONFIG_STATUS || exit 1
-
-
diff --git a/sim/arm/configure.in b/sim/arm/configure.in
deleted file mode 100644
index cbfac44e4cd..00000000000
--- a/sim/arm/configure.in
+++ /dev/null
@@ -1,13 +0,0 @@
-dnl Process this file with autoconf to produce a configure script.
-sinclude(../common/aclocal.m4)
-AC_PREREQ(2.5)dnl
-AC_INIT(Makefile.in)
-
-SIM_AC_COMMON
-
-AC_CHECK_HEADERS(unistd.h)
-
-COPRO=armcopro.o
-AC_SUBST(COPRO)
-
-SIM_AC_OUTPUT
diff --git a/sim/arm/dbg_conf.h b/sim/arm/dbg_conf.h
deleted file mode 100644
index 2e49dddc826..00000000000
--- a/sim/arm/dbg_conf.h
+++ /dev/null
@@ -1,50 +0,0 @@
-/* dbg_conf.h -- ARMulator debug interface: ARM6 Instruction Emulator.
- Copyright (C) 1994 Advanced RISC Machines Ltd.
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
-
-#ifndef Dbg_Conf__h
-
-#define Dbg_Conf__h
-
-typedef struct Dbg_ConfigBlock
-{
- int bytesex;
- long memorysize;
- int serialport; /*) remote connection parameters */
- int seriallinespeed; /*) (serial connection) */
- int parallelport; /*) ditto */
- int parallellinespeed; /*) (parallel connection) */
- int processor; /* processor the armulator is to emulate (eg ARM60) */
- int rditype; /* armulator / remote processor */
- int drivertype; /* parallel / serial / etc */
- char const *configtoload;
- int flags;
-}
-Dbg_ConfigBlock;
-
-#define Dbg_ConfigFlag_Reset 1
-
-typedef struct Dbg_HostosInterface Dbg_HostosInterface;
-/* This structure allows access by the (host-independent) C-library support
- module of armulator or pisd (armos.c) to host-dependent functions for
- which there is no host-independent interface. Its contents are unknown
- to the debugger toolbox.
- The assumption is that, in a windowed system, fputc(stderr) for example
- may not achieve the desired effect of the character appearing in some
- window.
- */
-
-#endif
diff --git a/sim/arm/dbg_cp.h b/sim/arm/dbg_cp.h
deleted file mode 100644
index e59c0ec8a99..00000000000
--- a/sim/arm/dbg_cp.h
+++ /dev/null
@@ -1,70 +0,0 @@
-/* dbg_cp.h -- ARMulator debug interface: ARM6 Instruction Emulator.
- Copyright (C) 1994 Advanced RISC Machines Ltd.
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
-
-#ifndef Dbg_CP__h
-
-#define Dbg_CP__h
-
-#define Dbg_Access_Readable 1
-#define Dbg_Access_Writable 2
-#define Dbg_Access_CPDT 4 /* else CPRT */
-
-typedef struct
-{
- unsigned short rmin, rmax;
- /* a single description can be used for a range of registers with
- the same properties *accessed via CPDT instructions*
- */
- unsigned char nbytes; /* size of register */
- unsigned char access; /* see above (Access_xxx) */
- union
- {
- struct
- {
- /* CPDT instructions do not allow the coprocessor much freedom:
- only bit 22 ('N') and 12-15 ('CRd') are free for the
- coprocessor to use as it sees fit. */
- unsigned char nbit;
- unsigned char rdbits;
- }
- cpdt;
- struct
- {
- /* CPRT instructions have much more latitude. The bits fixed
- by the ARM are 24..31 (condition mask & opcode)
- 20 (direction)
- 8..15 (cpnum, arm register)
- 4 (CPRT not CPDO)
- leaving 14 bits free to the coprocessor (fortunately
- falling within two bytes). */
- unsigned char read_b0, read_b1, write_b0, write_b1;
- }
- cprt;
- }
- accessinst;
-}
-Dbg_CoProRegDesc;
-
-struct Dbg_CoProDesc
-{
- int entries;
- Dbg_CoProRegDesc regdesc[1 /* really nentries */ ];
-};
-
-#define Dbg_CoProDesc_Size(n) (sizeof(struct Dbg_CoProDesc) + (n-1)*sizeof(Dbg_CoProRegDesc))
-
-#endif
diff --git a/sim/arm/dbg_hif.h b/sim/arm/dbg_hif.h
deleted file mode 100644
index 715551cb02c..00000000000
--- a/sim/arm/dbg_hif.h
+++ /dev/null
@@ -1,48 +0,0 @@
-/* dbg_hif.h -- ARMulator debug interface: ARM6 Instruction Emulator.
- Copyright (C) 1994 Advanced RISC Machines Ltd.
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
-
-#ifdef __STDC__
-# include <stdarg.h>
-#else
-# include <varargs.h>
-#endif
-
-typedef void Hif_DbgPrint (void *arg, const char *format, va_list ap);
-typedef void Hif_DbgPause (void *arg);
-
-typedef void Hif_WriteC (void *arg, int c);
-typedef int Hif_ReadC (void *arg);
-typedef int Hif_Write (void *arg, char const *buffer, int len);
-typedef char *Hif_GetS (void *arg, char *buffer, int len);
-
-typedef void Hif_RDIResetProc (void *arg);
-
-struct Dbg_HostosInterface
-{
- Hif_DbgPrint *dbgprint;
- Hif_DbgPause *dbgpause;
- void *dbgarg;
-
- Hif_WriteC *writec;
- Hif_ReadC *readc;
- Hif_Write *write;
- Hif_GetS *gets;
- void *hostosarg;
-
- Hif_RDIResetProc *reset;
- void *resetarg;
-};
diff --git a/sim/arm/dbg_rdi.h b/sim/arm/dbg_rdi.h
deleted file mode 100644
index 35924ec2267..00000000000
--- a/sim/arm/dbg_rdi.h
+++ /dev/null
@@ -1,332 +0,0 @@
-/* dbg_rdi.h -- ARMulator RDI interface: ARM6 Instruction Emulator.
- Copyright (C) 1994 Advanced RISC Machines Ltd.
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
-
-#ifndef dbg_rdi__h
-#define dbg_rdi__h
-
-/***************************************************************************\
-* Error Codes *
-\***************************************************************************/
-
-#define RDIError_NoError 0
-
-#define RDIError_Reset 1
-#define RDIError_UndefinedInstruction 2
-#define RDIError_SoftwareInterrupt 3
-#define RDIError_PrefetchAbort 4
-#define RDIError_DataAbort 5
-#define RDIError_AddressException 6
-#define RDIError_IRQ 7
-#define RDIError_FIQ 8
-#define RDIError_Error 9
-#define RDIError_BranchThrough0 10
-
-#define RDIError_NotInitialised 128
-#define RDIError_UnableToInitialise 129
-#define RDIError_WrongByteSex 130
-#define RDIError_UnableToTerminate 131
-#define RDIError_BadInstruction 132
-#define RDIError_IllegalInstruction 133
-#define RDIError_BadCPUStateSetting 134
-#define RDIError_UnknownCoPro 135
-#define RDIError_UnknownCoProState 136
-#define RDIError_BadCoProState 137
-#define RDIError_BadPointType 138
-#define RDIError_UnimplementedType 139
-#define RDIError_BadPointSize 140
-#define RDIError_UnimplementedSize 141
-#define RDIError_NoMorePoints 142
-#define RDIError_BreakpointReached 143
-#define RDIError_WatchpointAccessed 144
-#define RDIError_NoSuchPoint 145
-#define RDIError_ProgramFinishedInStep 146
-#define RDIError_UserInterrupt 147
-#define RDIError_CantSetPoint 148
-#define RDIError_IncompatibleRDILevels 149
-
-#define RDIError_CantLoadConfig 150
-#define RDIError_BadConfigData 151
-#define RDIError_NoSuchConfig 152
-#define RDIError_BufferFull 153
-#define RDIError_OutOfStore 154
-#define RDIError_NotInDownload 155
-#define RDIError_PointInUse 156
-#define RDIError_BadImageFormat 157
-#define RDIError_TargetRunning 158
-
-#define RDIError_LittleEndian 240
-#define RDIError_BigEndian 241
-#define RDIError_SoftInitialiseError 242
-
-#define RDIError_InsufficientPrivilege 253
-#define RDIError_UnimplementedMessage 254
-#define RDIError_UndefinedMessage 255
-
-/***************************************************************************\
-* RDP Message Numbers *
-\***************************************************************************/
-
-#define RDP_Start (unsigned char)0x0
-#define RDP_End (unsigned char)0x1
-#define RDP_Read (unsigned char)0x2
-#define RDP_Write (unsigned char)0x3
-#define RDP_CPUread (unsigned char)0x4
-#define RDP_CPUwrite (unsigned char)0x5
-#define RDP_CPread (unsigned char)0x6
-#define RDP_CPwrite (unsigned char)0x7
-#define RDP_SetBreak (unsigned char)0xa
-#define RDP_ClearBreak (unsigned char)0xb
-#define RDP_SetWatch (unsigned char)0xc
-#define RDP_ClearWatch (unsigned char)0xd
-#define RDP_Execute (unsigned char)0x10
-#define RDP_Step (unsigned char)0x11
-#define RDP_Info (unsigned char)0x12
-#define RDP_OSOpReply (unsigned char)0x13
-
-#define RDP_AddConfig (unsigned char)0x14
-#define RDP_LoadConfigData (unsigned char)0x15
-#define RDP_SelectConfig (unsigned char)0x16
-#define RDP_LoadAgent (unsigned char)0x17
-
-#define RDP_Stopped (unsigned char)0x20
-#define RDP_OSOp (unsigned char)0x21
-#define RDP_Fatal (unsigned char)0x5e
-#define RDP_Return (unsigned char)0x5f
-#define RDP_Reset (unsigned char)0x7f
-
-/***************************************************************************\
-* Other RDI values *
-\***************************************************************************/
-
-#define RDISex_Little 0 /* the byte sex of the debuggee */
-#define RDISex_Big 1
-#define RDISex_DontCare 2
-
-#define RDIPoint_EQ 0 /* the different types of break/watchpoints */
-#define RDIPoint_GT 1
-#define RDIPoint_GE 2
-#define RDIPoint_LT 3
-#define RDIPoint_LE 4
-#define RDIPoint_IN 5
-#define RDIPoint_OUT 6
-#define RDIPoint_MASK 7
-
-#define RDIPoint_Inquiry 64 /* ORRed with point type in extended RDP */
-#define RDIPoint_Handle 128 /* messages */
-
-#define RDIWatch_ByteRead 1 /* types of data accesses to watch for */
-#define RDIWatch_HalfRead 2
-#define RDIWatch_WordRead 4
-#define RDIWatch_ByteWrite 8
-#define RDIWatch_HalfWrite 16
-#define RDIWatch_WordWrite 32
-
-#define RDIReg_R15 (1L << 15) /* mask values for CPU */
-#define RDIReg_PC (1L << 16)
-#define RDIReg_CPSR (1L << 17)
-#define RDIReg_SPSR (1L << 18)
-#define RDINumCPURegs 19
-
-#define RDINumCPRegs 10 /* current maximum */
-
-#define RDIMode_Curr 255
-
-/* Bits set in return value from RDIInfo_Target */
-#define RDITarget_LogSpeed 0x0f
-#define RDITarget_HW 0x10 /* else emulator */
-#define RDITarget_AgentMaxLevel 0xe0
-#define RDITarget_AgentLevelShift 5
-#define RDITarget_DebuggerMinLevel 0x700
-#define RDITarget_DebuggerLevelShift 8
-#define RDITarget_CanReloadAgent 0x800
-#define RDITarget_CanInquireLoadSize 0x1000
-
-/* Bits set in return value from RDIInfo_Step */
-#define RDIStep_Multiple 1
-#define RDIStep_PCChange 2
-#define RDIStep_Single 4
-
-/* Bits set in return value from RDIInfo_Points */
-#define RDIPointCapability_Comparison 1
-#define RDIPointCapability_Range 2
-/* 4 to 128 are RDIWatch_xx{Read,Write} left-shifted by two */
-#define RDIPointCapability_Mask 256
-#define RDIPointCapability_Status 512 /* Point status enquiries available */
-
-/* RDI_Info subcodes */
-#define RDIInfo_Target 0
-#define RDIInfo_Points 1
-#define RDIInfo_Step 2
-#define RDIInfo_MMU 3
-#define RDIInfo_DownLoad 4 /* Inquires whether configuration download
- and selection is available.
- */
-#define RDIInfo_SemiHosting 5 /* Inquires whether RDISemiHosting_* RDI_Info
- calls are available.
- */
-#define RDIInfo_CoPro 6 /* Inquires whether CoPro RDI_Info calls are
- available.
- */
-#define RDIInfo_Icebreaker 7
-
-/* The next two are only to be used if the value returned by RDIInfo_Points */
-/* has RDIPointCapability_Status set. */
-#define RDIPointStatus_Watch 0x80
-#define RDIPointStatus_Break 0x81
-
-#define RDISignal_Stop 0x100
-
-#define RDIVector_Catch 0x180
-
-/* The next four are only to be used if RDIInfo_Semihosting returned no error */
-#define RDISemiHosting_SetState 0x181
-#define RDISemiHosting_GetState 0x182
-#define RDISemiHosting_SetVector 0x183
-#define RDISemiHosting_GetVector 0x184
-
-/* The next two are only to be used if RDIInfo_Icebreaker returned no error */
-#define RDIIcebreaker_GetLocks 0x185
-#define RDIIcebreaker_SetLocks 0x186
-
-/* Only if RDIInfo_Target returned RDITarget_CanInquireLoadSize */
-#define RDIInfo_GetLoadSize 0x187
-
-#define RDICycles 0x200
-#define RDICycles_Size 48
-#define RDIErrorP 0x201
-
-#define RDISet_Cmdline 0x300
-#define RDISet_RDILevel 0x301
-#define RDISet_Thread 0x302
-
-/* The next two are only to be used if RDIInfo_CoPro returned no error */
-#define RDIInfo_DescribeCoPro 0x400
-#define RDIInfo_RequestCoProDesc 0x401
-
-#define RDIInfo_Log 0x800
-#define RDIInfo_SetLog 0x801
-
-typedef unsigned long PointHandle;
-typedef unsigned long ThreadHandle;
-#define RDINoPointHandle ((PointHandle)-1L)
-#define RDINoHandle ((ThreadHandle)-1L)
-
-struct Dbg_ConfigBlock;
-struct Dbg_HostosInterface;
-struct Dbg_MCState;
-typedef int rdi_open_proc (unsigned type,
- struct Dbg_ConfigBlock const *config,
- struct Dbg_HostosInterface const *i,
- struct Dbg_MCState *dbg_state);
-typedef int rdi_close_proc (void);
-typedef int rdi_read_proc (ARMword source, void *dest, unsigned *nbytes);
-typedef int rdi_write_proc (const void *source, ARMword dest,
- unsigned *nbytes);
-typedef int rdi_CPUread_proc (unsigned mode, unsigned long mask,
- ARMword * state);
-typedef int rdi_CPUwrite_proc (unsigned mode, unsigned long mask,
- ARMword const *state);
-typedef int rdi_CPread_proc (unsigned CPnum, unsigned long mask,
- ARMword * state);
-typedef int rdi_CPwrite_proc (unsigned CPnum, unsigned long mask,
- ARMword const *state);
-typedef int rdi_setbreak_proc (ARMword address, unsigned type, ARMword bound,
- PointHandle * handle);
-typedef int rdi_clearbreak_proc (PointHandle handle);
-typedef int rdi_setwatch_proc (ARMword address, unsigned type,
- unsigned datatype, ARMword bound,
- PointHandle * handle);
-typedef int rdi_clearwatch_proc (PointHandle handle);
-typedef int rdi_execute_proc (PointHandle * handle);
-typedef int rdi_step_proc (unsigned ninstr, PointHandle * handle);
-typedef int rdi_info_proc (unsigned type, ARMword * arg1, ARMword * arg2);
-typedef int rdi_pointinq_proc (ARMword * address, unsigned type,
- unsigned datatype, ARMword * bound);
-
-typedef enum
-{
- RDI_ConfigCPU,
- RDI_ConfigSystem
-}
-RDI_ConfigAspect;
-
-typedef enum
-{
- RDI_MatchAny,
- RDI_MatchExactly,
- RDI_MatchNoEarlier
-}
-RDI_ConfigMatchType;
-
-typedef int rdi_addconfig_proc (unsigned long nbytes);
-typedef int rdi_loadconfigdata_proc (unsigned long nbytes, char const *data);
-typedef int rdi_selectconfig_proc (RDI_ConfigAspect aspect, char const *name,
- RDI_ConfigMatchType matchtype,
- unsigned versionreq, unsigned *versionp);
-
-typedef char *getbufferproc (void *getbarg, unsigned long *sizep);
-typedef int rdi_loadagentproc (ARMword dest, unsigned long size,
- getbufferproc * getb, void *getbarg);
-
-typedef struct
-{
- int itemmax;
- char const *const *names;
-}
-RDI_NameList;
-
-typedef RDI_NameList const *rdi_namelistproc (void);
-
-typedef int rdi_errmessproc (char *buf, int buflen, int errno);
-
-struct RDIProcVec
-{
- char rditypename[12];
-
- rdi_open_proc *open;
- rdi_close_proc *close;
- rdi_read_proc *read;
- rdi_write_proc *write;
- rdi_CPUread_proc *CPUread;
- rdi_CPUwrite_proc *CPUwrite;
- rdi_CPread_proc *CPread;
- rdi_CPwrite_proc *CPwrite;
- rdi_setbreak_proc *setbreak;
- rdi_clearbreak_proc *clearbreak;
- rdi_setwatch_proc *setwatch;
- rdi_clearwatch_proc *clearwatch;
- rdi_execute_proc *execute;
- rdi_step_proc *step;
- rdi_info_proc *info;
- /* V2 RDI */
- rdi_pointinq_proc *pointinquiry;
-
- /* These three useable only if RDIInfo_DownLoad returns no error */
- rdi_addconfig_proc *addconfig;
- rdi_loadconfigdata_proc *loadconfigdata;
- rdi_selectconfig_proc *selectconfig;
-
- rdi_namelistproc *drivernames;
- rdi_namelistproc *cpunames;
-
- rdi_errmessproc *errmess;
-
- /* Only if RDIInfo_Target returns a value with RDITarget_LoadAgent set */
- rdi_loadagentproc *loadagent;
-};
-
-#endif
diff --git a/sim/arm/gdbhost.c b/sim/arm/gdbhost.c
deleted file mode 100644
index 5d12574f83c..00000000000
--- a/sim/arm/gdbhost.c
+++ /dev/null
@@ -1,113 +0,0 @@
-/* gdbhost.c -- ARMulator RDP to gdb comms code: ARM6 Instruction Emulator.
- Copyright (C) 1994 Advanced RISC Machines Ltd.
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
-
-/***********************************************************/
-/* Functions that communicate info back to the debugger... */
-/***********************************************************/
-
-#include <stdio.h>
-#include <stdarg.h>
-#include "armdefs.h"
-#include "communicate.h"
-#include "dbg_rdi.h"
-#include "armos.h"
-
-#define OS_SendNothing 0x0
-#define OS_SendChar 0x1
-#define OS_SendWord 0x2
-#define OS_SendString 0x3
-
-/* Defined in kid.c */
-extern int wait_for_osreply (ARMword * reply);
-
-/* A pipe for handling SWI return values that goes straight from the */
-/* parent to the ARMulator host interface, bypassing the childs RDP */
-/* to RDI interpreter */
-int DebuggerARMul[2];
-
-/* The pipes between the two processes */
-int mumkid[2];
-int kidmum[2];
-
-void
-myprint (void *arg, const char *format, va_list ap)
-{
-#ifdef DEBUG
- fprintf (stderr, "Host: myprint\n");
-#endif
- vfprintf (stderr, format, ap);
-}
-
-
-/* Waits for a keypress on the debuggers' keyboard */
-void
-mypause (void *arg)
-{
-#ifdef DEBUG
- fprintf (stderr, "Host: mypause\n");
-#endif
-} /* I do love exciting functions */
-
-void
-mywritec (void *arg, int c)
-{
-#ifdef DEBUG
- fprintf (stderr, "Mywrite : %c\n", c);
-#endif
- MYwrite_char (kidmum[1], RDP_OSOp); /* OS Operation Request Message */
- MYwrite_word (kidmum[1], SWI_WriteC); /* Print... */
- MYwrite_char (kidmum[1], OS_SendChar); /* ...a single character */
- MYwrite_char (kidmum[1], (unsigned char) c);
-
- wait_for_osreply ((ARMword *) 0);
-}
-
-int
-myreadc (void *arg)
-{
- char c;
- ARMword x;
-
-#ifdef DEBUG
- fprintf (stderr, "Host: myreadc\n");
-#endif
- MYwrite_char (kidmum[1], RDP_OSOp); /* OS Operation Request Message */
- MYwrite_word (kidmum[1], SWI_ReadC); /* Read... */
- MYwrite_char (kidmum[1], OS_SendNothing);
-
- c = wait_for_osreply (&x);
- return (x);
-}
-
-
-int
-mywrite (void *arg, char const *buffer, int len)
-{
-#ifdef DEBUG
- fprintf (stderr, "Host: mywrite\n");
-#endif
- return 0;
-}
-
-char *
-mygets (void *arg, char *buffer, int len)
-{
-#ifdef DEBUG
- fprintf (stderr, "Host: mygets\n");
-#endif
- return buffer;
-}
diff --git a/sim/arm/gdbhost.h b/sim/arm/gdbhost.h
deleted file mode 100644
index 164d7716efa..00000000000
--- a/sim/arm/gdbhost.h
+++ /dev/null
@@ -1,23 +0,0 @@
-/* gdbhost.h -- ARMulator to gdb interface: ARM6 Instruction Emulator.
- Copyright (C) 1994 Advanced RISC Machines Ltd.
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
-
-void myprint (void *arg, const char *format, va_list ap);
-void mypause (void *arg);
-void mywritec (void *arg, int c);
-int myreadc (void *arg);
-int mywrite (void *arg, char const *buffer, int len);
-char *mygets (void *arg, char *buffer, int len);
diff --git a/sim/arm/kid.c b/sim/arm/kid.c
deleted file mode 100644
index c43d4dd1ae8..00000000000
--- a/sim/arm/kid.c
+++ /dev/null
@@ -1,540 +0,0 @@
-/* kid.c -- ARMulator RDP/RDI interface: ARM6 Instruction Emulator.
- Copyright (C) 1994 Advanced RISC Machines Ltd.
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
-
-/*****************************************************************/
-/* The child process continues here... */
-/* It waits on a pipe from the parent and translates the RDP */
-/* messages into RDI calls to the ARMulator passing RDP replies */
-/* back up a pipe to the parent. */
-/*****************************************************************/
-
-#include <sys/types.h>
-#include <signal.h>
-
-#include "armdefs.h"
-#include "dbg_conf.h"
-#include "dbg_hif.h"
-#include "dbg_rdi.h"
-#include "gdbhost.h"
-#include "communicate.h"
-
-/* The pipes between the two processes */
-extern int mumkid[2];
-extern int kidmum[2];
-
-/* The maximum number of file descriptors */
-extern int nfds;
-
-/* The machine name */
-#define MAXHOSTNAMELENGTH 64
-extern char localhost[MAXHOSTNAMELENGTH + 1];
-
-/* The socket number */
-extern unsigned int socketnumber;
-
-/* RDI interface */
-extern const struct RDIProcVec armul_rdi;
-
-static int MYrdp_level = 0;
-
-static int rdi_state = 0;
-
-/**************************************************************/
-/* Signal handler that terminates excecution in the ARMulator */
-/**************************************************************/
-void
-kid_handlesignal (int sig)
-{
-#ifdef DEBUG
- fprintf (stderr, "Terminate ARMulator excecution\n");
-#endif
- if (sig != SIGUSR1)
- {
- fprintf (stderr, "Unsupported signal.\n");
- return;
- }
- armul_rdi.info (RDISignal_Stop, (unsigned long *) 0, (unsigned long *) 0);
-}
-
-/********************************************************************/
-/* Waits on a pipe from the socket demon for RDP and */
-/* acts as an RDP to RDI interpreter on the front of the ARMulator. */
-/********************************************************************/
-void
-kid ()
-{
- char *p, *q;
- int i, j, k;
- long outofthebag;
- unsigned char c, d, message;
- ARMword x, y, z;
- struct sigaction action;
- PointHandle point;
- Dbg_ConfigBlock config;
- Dbg_HostosInterface hostif;
- struct Dbg_MCState *MCState;
- char command_line[256];
- struct fd_set readfds;
-
- /* Setup a signal handler for SIGUSR1 */
- action.sa_handler = kid_handlesignal;
- action.sa_mask = 0;
- action.sa_flags = 0;
-
- sigaction (SIGUSR1, &action, (struct sigaction *) 0);
-
- while (1)
- {
- /* Wait for ever */
- FD_ZERO (&readfds);
- FD_SET (mumkid[0], &readfds);
-
- i = select (nfds, &readfds,
- (fd_set *) 0, (fd_set *) 0, (struct timeval *) 0);
-
- if (i < 0)
- {
- perror ("select");
- }
-
- if (read (mumkid[0], &message, 1) < 1)
- {
- perror ("read");
- }
-
- switch (message)
- {
- case RDP_Start:
- /* Open and/or Initialise */
- BAG_newbag ();
-
- MYread_char (mumkid[0], &c); /* type */
- MYread_word (mumkid[0], &x); /* memorysize */
- if (c & 0x2)
- MYread_char (mumkid[0], &d); /* speed */
- config.processor = 0;
- config.memorysize = x;
- config.bytesex = (c & 0x4) ? RDISex_Big : RDISex_Little;
- if (c & 0x8)
- config.bytesex = RDISex_DontCare;
-
- hostif.dbgprint = myprint;
- hostif.dbgpause = mypause;
- hostif.dbgarg = stdout;
- hostif.writec = mywritec;
- hostif.readc = myreadc;
- hostif.write = mywrite;
- hostif.gets = mygets;
- hostif.reset = mypause; /* do nothing */
- hostif.resetarg = "Do I love resetting or what!\n";
-
- if (rdi_state)
- {
- /* we have restarted, so kill off the existing run. */
- /* armul_rdi.close(); */
- }
- i = armul_rdi.open (c & 0x3, &config, &hostif, MCState);
- rdi_state = 1;
-
- MYwrite_char (kidmum[1], RDP_Return);
- MYwrite_char (kidmum[1], (unsigned char) i);
-
- x = ~0x4;
- armul_rdi.info (RDIVector_Catch, &x, 0);
-
- break;
-
- case RDP_End:
- /* Close and Finalise */
- i = armul_rdi.close ();
- rdi_state = 0;
- MYwrite_char (kidmum[1], RDP_Return);
- MYwrite_char (kidmum[1], (unsigned char) i);
- break;
-
- case RDP_Read:
- /* Read Memory Address */
- MYread_word (mumkid[0], &x); /* address */
- MYread_word (mumkid[0], &y); /* nbytes */
- p = (char *) malloc (y);
- i = armul_rdi.read (x, p, (unsigned *) &y);
- MYwrite_char (kidmum[1], RDP_Return);
- for (k = 0; k < y; k++)
- MYwrite_char (kidmum[1], p[k]);
- free (p);
- MYwrite_char (kidmum[1], (unsigned char) i);
- if (i)
- MYwrite_word (kidmum[1], y); /* number of bytes sent without error */
- break;
-
- case RDP_Write:
- /* Write Memory Address */
- MYread_word (mumkid[0], &x); /* address */
- MYread_word (mumkid[0], &y); /* nbytes */
- p = (char *) malloc (y);
- for (k = 0; k < y; k++)
- MYread_char (mumkid[0], &p[k]);
- i = armul_rdi.write (p, x, (unsigned *) &y);
- free (p);
- MYwrite_char (kidmum[1], RDP_Return);
- MYwrite_char (kidmum[1], (unsigned char) i);
- if (i)
- MYwrite_word (kidmum[1], y); /* number of bytes sent without error */
- break;
-
- case RDP_CPUread:
- /* Read CPU State */
- MYread_char (mumkid[0], &c); /* mode */
- MYread_word (mumkid[0], &x); /* mask */
- p = (char *) malloc (4 * RDINumCPURegs);
- i = armul_rdi.CPUread (c, x, (ARMword *) p);
- MYwrite_char (kidmum[1], RDP_Return);
- for (k = 1, j = 0; k != 0x80000000; k *= 2)
- if (k & x)
- MYwrite_word (kidmum[1], ((ARMword *) p)[j++]);
- free (p);
- if (i)
- MYwrite_char (kidmum[1], (unsigned char) j);
- MYwrite_char (kidmum[1], (unsigned char) i);
- break;
-
- case RDP_CPUwrite:
- /* Write CPU State */
- MYread_char (mumkid[0], &c); /* mode */
- MYread_word (mumkid[0], &x); /* mask */
-
- p = (char *) malloc (4 * RDINumCPURegs);
- for (k = 1, j = 0; k != 0x80000000; k *= 2)
- if (k & x)
- MYread_word (mumkid[0], &(((ARMword *) p)[j++]));
- i = armul_rdi.CPUwrite (c, x, (ARMword *) p);
- MYwrite_char (kidmum[1], RDP_Return);
- MYwrite_char (kidmum[1], (unsigned char) i);
- free (p);
- break;
-
- case RDP_CPread:
- /* Read Co-Processor State */
- MYread_char (mumkid[0], &c); /* CPnum */
- MYread_word (mumkid[0], &x); /* mask */
- p = q = (char *) malloc (16 * RDINumCPRegs);
- i = armul_rdi.CPread (c, x, (ARMword *) p);
- MYwrite_char (kidmum[1], RDP_Return);
- for (k = 1, j = 0; k != 0x80000000; k *= 2, j++)
- if (k & x)
- {
- if ((c == 1 || c == 2) && k <= 128)
- {
- MYwrite_FPword (kidmum[1], q);
- q += 16;
- }
- else
- {
- MYwrite_word (kidmum[1], *q);
- q += 4;
- }
- }
- free (p);
- if (i)
- MYwrite_char (kidmum[1], (unsigned char) j);
- MYwrite_char (kidmum[1], (unsigned char) i);
- break;
-
- case RDP_CPwrite:
- /* Write Co-Processor State */
- MYread_char (mumkid[0], &c); /* CPnum */
- MYread_word (mumkid[0], &x); /* mask */
- p = q = (char *) malloc (16 * RDINumCPURegs);
- for (k = 1, j = 0; k != 0x80000000; k *= 2, j++)
- if (k & x)
- {
- if ((c == 1 || c == 2) && k <= 128)
- {
- MYread_FPword (kidmum[1], q);
- q += 16;
- }
- else
- {
- MYread_word (mumkid[0], (ARMword *) q);
- q += 4;
- }
- }
- i = armul_rdi.CPwrite (c, x, (ARMword *) p);
- MYwrite_char (kidmum[1], RDP_Return);
- MYwrite_char (kidmum[1], (unsigned char) i);
- free (p);
- break;
-
- case RDP_SetBreak:
- /* Set Breakpoint */
- MYread_word (mumkid[0], &x); /* address */
- MYread_char (mumkid[0], &c); /* type */
- if ((c & 0xf) >= 5)
- MYread_word (mumkid[0], &y); /* bound */
- i = armul_rdi.setbreak (x, c, y, &point);
- if (!MYrdp_level)
- BAG_putpair ((long) x, (long) point);
- MYwrite_char (kidmum[1], RDP_Return);
- if (MYrdp_level)
- MYwrite_word (kidmum[1], point);
- MYwrite_char (kidmum[1], (unsigned char) i);
- break;
-
- case RDP_ClearBreak:
- /* Clear Breakpoint */
- MYread_word (mumkid[0], &point); /* PointHandle */
- if (!MYrdp_level)
- {
- BAG_getsecond ((long) point, &outofthebag); /* swap pointhandle for address */
- BAG_killpair_byfirst (outofthebag);
- point = outofthebag;
- }
- i = armul_rdi.clearbreak (point);
- MYwrite_char (kidmum[1], RDP_Return);
- MYwrite_char (kidmum[1], (unsigned char) i);
- break;
-
- case RDP_SetWatch:
- /* Set Watchpoint */
- MYread_word (mumkid[0], &x); /* address */
- MYread_char (mumkid[0], &c); /* type */
- MYread_char (mumkid[0], &d); /* datatype */
- if ((c & 0xf) >= 5)
- MYread_word (mumkid[0], &y); /* bound */
- i = armul_rdi.setwatch (x, c, d, y, &point);
- MYwrite_char (kidmum[1], RDP_Return);
- MYwrite_word (kidmum[1], point);
- MYwrite_char (kidmum[1], (unsigned char) i);
- break;
-
- case RDP_ClearWatch:
- /* Clear Watchpoint */
- MYread_word (mumkid[0], &point); /* PointHandle */
- i = armul_rdi.clearwatch (point);
- MYwrite_char (kidmum[1], RDP_Return);
- MYwrite_char (kidmum[1], (unsigned char) i);
- break;
-
- case RDP_Execute:
- /* Excecute */
-
- MYread_char (mumkid[0], &c); /* return */
-
-#ifdef DEBUG
- fprintf (stderr, "Starting execution\n");
-#endif
- i = armul_rdi.execute (&point);
-#ifdef DEBUG
- fprintf (stderr, "Completed execution\n");
-#endif
- MYwrite_char (kidmum[1], RDP_Return);
- if (c & 0x80)
- MYwrite_word (kidmum[1], point);
- MYwrite_char (kidmum[1], (unsigned char) i);
- break;
-
- case RDP_Step:
- /* Step */
- MYread_char (mumkid[0], &c); /* return */
- MYread_word (mumkid[0], &x); /* ninstr */
- point = 0x87654321;
- i = armul_rdi.step (x, &point);
- MYwrite_char (kidmum[1], RDP_Return);
- if (c & 0x80)
- MYwrite_word (kidmum[1], point);
- MYwrite_char (kidmum[1], (unsigned char) i);
- break;
-
- case RDP_Info:
- /* Info */
- MYread_word (mumkid[0], &x);
- switch (x)
- {
- case RDIInfo_Target:
- i = armul_rdi.info (RDIInfo_Target, &y, &z);
- MYwrite_char (kidmum[1], RDP_Return);
- MYwrite_word (kidmum[1], y); /* Loads of info... */
- MYwrite_word (kidmum[1], z); /* Model */
- MYwrite_char (kidmum[1], (unsigned char) i);
- break;
-
- case RDISet_RDILevel:
- MYread_word (mumkid[0], &x); /* arg1, debug level */
- i = armul_rdi.info (RDISet_RDILevel, &x, 0);
- if (i == RDIError_NoError)
- MYrdp_level = x;
- MYwrite_char (kidmum[1], RDP_Return);
- MYwrite_char (kidmum[1], (unsigned char) i);
- break;
-
- case RDISet_Cmdline:
- for (p = command_line; MYread_char (mumkid[0], p), *p; p++)
- ; /* String */
- i = armul_rdi.info (RDISet_Cmdline,
- (unsigned long *) command_line, 0);
- MYwrite_char (kidmum[1], RDP_Return);
- MYwrite_char (kidmum[1], (unsigned char) i);
- break;
-
- case RDIInfo_Step:
- i = armul_rdi.info (RDIInfo_Step, &x, 0);
- MYwrite_char (kidmum[1], RDP_Return);
- MYwrite_word (kidmum[1], x);
- MYwrite_char (kidmum[1], (unsigned char) i);
- break;
-
- case RDIVector_Catch:
- MYread_word (mumkid[0], &x);
- i = armul_rdi.info (RDIVector_Catch, &x, 0);
- MYwrite_char (kidmum[1], RDP_Return);
- MYwrite_char (kidmum[1], i);
- break;
-
- case RDIInfo_Points:
- i = armul_rdi.info (RDIInfo_Points, &x, 0);
- MYwrite_char (kidmum[1], RDP_Return);
- MYwrite_word (kidmum[1], x);
- MYwrite_char (kidmum[1], (unsigned char) i);
- break;
-
- default:
- fprintf (stderr, "Unsupported info code %d\n", x);
- break;
- }
- break;
-
- case RDP_OSOpReply:
- /* OS Operation Reply */
- MYwrite_char (kidmum[1], RDP_Fatal);
- break;
-
- case RDP_Reset:
- /* Reset */
- for (i = 0; i < 50; i++)
- MYwrite_char (kidmum[1], RDP_Reset);
- p = (char *) malloc (MAXHOSTNAMELENGTH + 5 + 20);
- sprintf (p, "Running on %s:%d\n", localhost, socketnumber);
- MYwrite_string (kidmum[1], p);
- free (p);
-
- break;
- default:
- fprintf (stderr, "Oh dear: Something is seriously wrong :-(\n");
- /* Hmm.. bad RDP operation */
- break;
- }
- }
-}
-
-
-/* Handles memory read operations until an OS Operation Reply Message is */
-/* encounterd. It then returns the byte info value (0, 1, or 2) and fills */
-/* in 'putinr0' with the data if appropriate. */
-int
-wait_for_osreply (ARMword * reply)
-{
- char *p, *q;
- int i, j, k;
- unsigned char c, d, message;
- ARMword x, y, z;
- struct sigaction action;
- PointHandle point;
- Dbg_ConfigBlock config;
- Dbg_HostosInterface hostif;
- struct Dbg_MCState *MCState;
- char command_line[256];
- struct fd_set readfds;
-
-#ifdef DEBUG
- fprintf (stderr, "wait_for_osreply ().\n");
-#endif
-
- /* Setup a signal handler for SIGUSR1 */
- action.sa_handler = kid_handlesignal;
- action.sa_mask = 0;
- action.sa_flags = 0;
-
- sigaction (SIGUSR1, &action, (struct sigaction *) 0);
-
- while (1)
- {
- /* Wait for ever */
- FD_ZERO (&readfds);
- FD_SET (mumkid[0], &readfds);
-
- i = select (nfds, &readfds,
- (fd_set *) 0, (fd_set *) 0, (struct timeval *) 0);
-
- if (i < 0)
- {
- perror ("select");
- }
-
- if (read (mumkid[0], &message, 1) < 1)
- {
- perror ("read");
- }
-
- switch (message)
- {
- case RDP_Read:
- /* Read Memory Address */
- MYread_word (mumkid[0], &x); /* address */
- MYread_word (mumkid[0], &y); /* nbytes */
- p = (char *) malloc (y);
- i = armul_rdi.read (x, p, (unsigned *) &y);
- MYwrite_char (kidmum[1], RDP_Return);
- for (k = 0; k < y; k++)
- MYwrite_char (kidmum[1], p[k]);
- free (p);
- MYwrite_char (kidmum[1], (unsigned char) i);
- if (i)
- MYwrite_word (kidmum[1], y); /* number of bytes sent without error */
- break;
-
- case RDP_Write:
- /* Write Memory Address */
- MYread_word (mumkid[0], &x); /* address */
- MYread_word (mumkid[0], &y); /* nbytes */
- p = (char *) malloc (y);
- for (k = 0; k < y; k++)
- MYread_char (mumkid[0], &p[k]);
- i = armul_rdi.write (p, x, (unsigned *) &y);
- free (p);
- MYwrite_char (kidmum[1], RDP_Return);
- MYwrite_char (kidmum[1], (unsigned char) i);
- if (i)
- MYwrite_word (kidmum[1], y); /* number of bytes sent without error */
- break;
-
- case RDP_OSOpReply:
- /* OS Operation Reply */
- MYread_char (mumkid[0], &c);
- if (c == 1)
- MYread_char (mumkid[0], (char *) reply);
- if (c == 2)
- MYread_word (mumkid[0], reply);
- return c;
- break;
-
- default:
- fprintf (stderr,
- "HELP! Unaccounted-for message during OS request. \n");
- MYwrite_char (kidmum[1], RDP_Fatal);
- }
- }
-}
diff --git a/sim/arm/main.c b/sim/arm/main.c
deleted file mode 100644
index c7992908b44..00000000000
--- a/sim/arm/main.c
+++ /dev/null
@@ -1,194 +0,0 @@
-/* main.c -- top level of ARMulator: ARM6 Instruction Emulator.
- Copyright (C) 1994 Advanced RISC Machines Ltd.
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
-
-/**********************************************************************/
-/* Forks the ARMulator and hangs on a socket passing on RDP messages */
-/* down a pipe to the ARMulator which translates them into RDI calls. */
-/**********************************************************************/
-
-#include <stdio.h>
-#include <string.h>
-#include <sys/types.h>
-#include <sys/socket.h>
-#include <netinet/in.h>
-#include <signal.h>
-#include <netdb.h>
-#include <unistd.h>
-
-#include "armdefs.h"
-#include "dbg_rdi.h"
-#include "dbg_conf.h"
-
-#define MAXHOSTNAMELENGTH 64
-
-/* Read and write routines down sockets and pipes */
-
-void MYread_chars (int sock, void *p, int n);
-unsigned char MYread_char (int sock);
-ARMword MYread_word (int sock);
-void MYread_FPword (int sock, char *putinhere);
-
-void MYwrite_word (int sock, ARMword i);
-void MYwrite_string (int sock, char *s);
-void MYwrite_FPword (int sock, char *fromhere);
-void MYwrite_char (int sock, unsigned char c);
-
-void passon (int source, int dest, int n);
-
-
-/* Mother and child processes */
-void parent (void);
-void kid (void);
-
-/* The child process id. */
-pid_t child;
-
-/* The socket to the debugger */
-int debugsock;
-
-/* The pipes between the two processes */
-int mumkid[2];
-int kidmum[2];
-
-/* A pipe for handling SWI return values that goes straight from the */
-/* parent to the ARMulator host interface, bypassing the childs RDP */
-/* to RDI interpreter */
-int DebuggerARMul[2];
-
-/* The maximum number of file descriptors */
-int nfds;
-
-/* The socket handle */
-int sockethandle;
-
-/* The machine name */
-char localhost[MAXHOSTNAMELENGTH + 1];
-
-/* The socket number */
-unsigned int socketnumber;
-
-/**************************************************************/
-/* Takes one argument: the socket number. */
-/* Opens a socket to the debugger, and once opened spawns the */
-/* ARMulator and sets up a couple of pipes. */
-/**************************************************************/
-int
-main (int argc, char *argv[])
-{
- int i;
- struct sockaddr_in devil, isa;
- struct hostent *hp;
-
-
- if (argc == 1)
- {
- fprintf (stderr, "No socket number\n");
- return 1;
- }
-
- sscanf (argv[1], "%d", &socketnumber);
- if (!socketnumber || socketnumber > 0xffff)
- {
- fprintf (stderr, "Invalid socket number: %d\n", socketnumber);
- return 1;
- }
-
- gethostname (localhost, MAXHOSTNAMELENGTH);
- hp = gethostbyname (localhost);
- if (!hp)
- {
- fprintf (stderr, "Cannot get local host info\n");
- return 1;
- }
-
- /* Open a socket */
- sockethandle = socket (hp->h_addrtype, SOCK_STREAM, 0);
- if (sockethandle < 0)
- {
- perror ("socket");
- return 1;
- }
-
- devil.sin_family = hp->h_addrtype;
- devil.sin_port = htons (socketnumber);
- devil.sin_addr.s_addr = 0;
- for (i = 0; i < sizeof (devil.sin_zero); i++)
- devil.sin_zero[i] = '\000';
- memcpy (&devil.sin_addr, hp->h_addr_list[0], hp->h_length);
-
- if (bind (sockethandle, &devil, sizeof (devil)) < 0)
- {
- perror ("bind");
- return 1;
- }
-
- /* May only accept one debugger at once */
-
- if (listen (sockethandle, 0))
- {
- perror ("listen");
- return 1;
- }
-
- fprintf (stderr, "Waiting for connection from debugger...");
-
- debugsock = accept (sockethandle, &isa, &i);
- if (debugsock < 0)
- {
- perror ("accept");
- return 1;
- }
-
- fprintf (stderr, " done.\nConnection Established.\n");
-
- nfds = getdtablesize ();
-
- if (pipe (mumkid))
- {
- perror ("pipe");
- return 1;
- }
- if (pipe (kidmum))
- {
- perror ("pipe");
- return 1;
- }
-
- if (pipe (DebuggerARMul))
- {
- perror ("pipe");
- return 1;
- }
-
-#ifdef DEBUG
- fprintf (stderr, "Created pipes ok\n");
-#endif
-
- child = fork ();
-
-#ifdef DEBUG
- fprintf (stderr, "fork() ok\n");
-#endif
-
- if (child == 0)
- kid ();
- if (child != -1)
- parent ();
-
- perror ("fork");
- return 1;
-}
diff --git a/sim/arm/parent.c b/sim/arm/parent.c
deleted file mode 100644
index 684af842895..00000000000
--- a/sim/arm/parent.c
+++ /dev/null
@@ -1,481 +0,0 @@
-/* parent.c -- ARMulator RDP comms code: ARM6 Instruction Emulator.
- Copyright (C) 1994 Advanced RISC Machines Ltd.
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
-
-/*****************************************************************/
-/* The Parent process continues here... */
-/* It waits on the socket and passes on RDP messages down a pipe */
-/* to the ARMulator RDP to RDI interpreter. */
-/*****************************************************************/
-
-#include <stdio.h>
-#include <sys/types.h>
-#include <signal.h>
-#include "time.h"
-#include "armdefs.h"
-#include "dbg_rdi.h"
-#include "communicate.h"
-
-/* The socket to the debugger */
-extern int debugsock;
-
-/* The pipes between the two processes */
-extern int mumkid[2];
-extern int kidmum[2];
-
-/* A pipe for handling SWI return values that goes straight from the */
-/* parent to the ARMulator host interface, bypassing the child's RDP */
-/* to RDI interpreter */
-extern int DebuggerARMul[2];
-
-/* The maximum number of file descriptors */
-extern int nfds;
-
-/* The child process id. */
-extern pid_t child;
-
-void
-parent ()
-{
- int i, j, k;
- unsigned char message, CPnum, exreturn;
- ARMword mask, nbytes, messagetype;
- unsigned char c, d;
- ARMword x, y;
- int virgin = 1;
- struct fd_set readfds;
-
-#ifdef DEBUG
- fprintf (stderr, "parent ()...\n");
-#endif
-
-panic_error:
-
- if (!virgin)
- {
-#ifdef DEBUG
- fprintf (stderr, "Arghh! What is going on?\n");
-#endif
- kill (child, SIGHUP);
- MYwrite_char (debugsock, RDP_Reset);
- }
-
- virgin = 0;
-
- while (1)
- {
-
- /* Wait either for the ARMulator or the debugger */
-
- FD_ZERO (&readfds);
- FD_SET (kidmum[0], &readfds); /* Wait for messages from ARMulator */
- FD_SET (debugsock, &readfds); /* Wait for messages from debugger */
-
-#ifdef DEBUG
- fprintf (stderr, "Waiting for ARMulator or debugger... ");
-#endif
-
- while ((i = select (nfds, &readfds, (fd_set *) 0, (fd_set *) 0, 0)) < 0)
- {
- perror ("select");
- }
-
-#ifdef DEBUG
- fprintf (stderr, "(%d/2)", i);
-#endif
-
- if (FD_ISSET (debugsock, &readfds))
- {
-#ifdef DEBUG
- fprintf (stderr, "->debugger\n");
-#endif
-
- /* Inside this rather large if statement with simply pass on a complete
- message to the ARMulator. The reason we need to pass messages on one
- at a time is that we have to know whether the message is an OSOpReply
- or an info(stop), so that we can take different action in those
- cases. */
-
- if (MYread_char (debugsock, &message))
- goto panic_error;
-
- switch (message)
- {
- case RDP_Start:
- /* Open and/or Initialise */
-#ifdef DEBUG
- fprintf (stderr, "RDP Open\n");
-#endif
- if (MYread_char (debugsock, &c)) /* type */
- goto panic_error;
-
- if (MYread_word (debugsock, &x)) /* memory size */
- goto panic_error;
-
- MYwrite_char (mumkid[1], message);
- MYwrite_char (mumkid[1], c);
- MYwrite_word (mumkid[1], x);
- if (c & 0x2)
- {
- passon (debugsock, mumkid[1], 1); /* speed */
- }
- break;
-
- case RDP_End:
- /* Close and Finalise */
-#ifdef DEBUG
- fprintf (stderr, "RDP Close\n");
-#endif
- MYwrite_char (mumkid[1], message);
- break;
-
- case RDP_Read:
- /* Read Memory Address */
-#ifdef DEBUG
- fprintf (stderr, "RDP Read Memory\n");
-#endif
- MYwrite_char (mumkid[1], message);
- if (passon (debugsock, mumkid[1], 4))
- goto panic_error; /* address */
- if (MYread_word (debugsock, &nbytes))
- goto panic_error; /* nbytes */
- MYwrite_word (mumkid[1], nbytes);
- break;
-
- case RDP_Write:
- /* Write Memory Address */
-#ifdef DEBUG
- fprintf (stderr, "RDP Write Memory\n");
-#endif
- if (MYread_word (debugsock, &x))
- goto panic_error; /* address */
-
- if (MYread_word (debugsock, &y))
- goto panic_error; /* nbytes */
-
- MYwrite_char (mumkid[1], message);
- MYwrite_word (mumkid[1], x);
- MYwrite_word (mumkid[1], y);
- passon (debugsock, mumkid[1], y); /* actual data */
- break;
-
- case RDP_CPUread:
- /* Read CPU State */
-#ifdef DEBUG
- fprintf (stderr, "RDP Read CPU\n");
-#endif
- if (MYread_char (debugsock, &c))
- goto panic_error; /* mode */
-
- if (MYread_word (debugsock, &mask))
- goto panic_error; /* mask */
-
- MYwrite_char (mumkid[1], message);
- MYwrite_char (mumkid[1], c);
- MYwrite_word (mumkid[1], mask);
- break;
-
- case RDP_CPUwrite:
- /* Write CPU State */
-#ifdef DEBUG
- fprintf (stderr, "RDP Write CPU\n");
-#endif
- if (MYread_char (debugsock, &c))
- goto panic_error; /* mode */
-
- if (MYread_word (debugsock, &x))
- goto panic_error; /* mask */
-
- MYwrite_char (mumkid[1], message);
- MYwrite_char (mumkid[1], c);
- MYwrite_word (mumkid[1], x);
- for (k = 1, j = 0; k != 0x80000000; k *= 2, j++)
- if ((k & x) && passon (debugsock, mumkid[1], 4))
- goto panic_error;
- break;
-
- case RDP_CPread:
- /* Read Co-Processor State */
-#ifdef DEBUG
- fprintf (stderr, "RDP Read CP state\n");
-#endif
- if (MYread_char (debugsock, &CPnum))
- goto panic_error;
-
- if (MYread_word (debugsock, &mask))
- goto panic_error;
-
- MYwrite_char (mumkid[1], message);
- MYwrite_char (mumkid[1], CPnum);
- MYwrite_word (mumkid[1], mask);
- break;
-
- case RDP_CPwrite:
- /* Write Co-Processor State */
-#ifdef DEBUG
- fprintf (stderr, "RDP Write CP state\n");
-#endif
- if (MYread_char (debugsock, &CPnum))
- goto panic_error;
-
- if (MYread_word (debugsock, &mask))
- goto panic_error;
-
- MYwrite_char (mumkid[1], message);
- MYwrite_char (mumkid[1], c);
- MYwrite_char (mumkid[1], x);
- for (k = 1, j = 0; k != 0x80000000; k *= 2, j++)
- if (k & x)
- {
- if ((c == 1 || c == 2) && k <= 128)
- {
- /* FP register = 12 bytes + 4 bytes format */
- if (passon (debugsock, mumkid[1], 16))
- goto panic_error;
- }
- else
- {
- /* Normal register = 4 bytes */
- if (passon (debugsock, mumkid[1], 4))
- goto panic_error;
- }
- }
- break;
-
- case RDP_SetBreak:
- /* Set Breakpoint */
-#ifdef DEBUG
- fprintf (stderr, "RDP Set Breakpoint\n");
-#endif
- if (MYread_word (debugsock, &x))
- goto panic_error; /* address */
-
- if (MYread_char (debugsock, &c))
- goto panic_error; /* type */
-
- MYwrite_char (mumkid[1], message);
- MYwrite_word (mumkid[1], x);
- MYwrite_char (mumkid[1], c);
- if (((c & 0xf) >= 5) && passon (debugsock, mumkid[1], 4))
- goto panic_error; /* bound */
- break;
-
- case RDP_ClearBreak:
- /* Clear Breakpoint */
-#ifdef DEBUG
- fprintf (stderr, "RDP Clear Breakpoint\n");
-#endif
- MYwrite_char (mumkid[1], message);
- if (passon (debugsock, mumkid[1], 4))
- goto panic_error; /* point */
- break;
-
- case RDP_SetWatch:
- /* Set Watchpoint */
-#ifdef DEBUG
- fprintf (stderr, "RDP Set Watchpoint\n");
-#endif
- if (MYread_word (debugsock, &x))
- goto panic_error; /* address */
-
- if (MYread_char (debugsock, &c))
- goto panic_error; /* type */
-
- if (MYread_char (debugsock, &d))
- goto panic_error; /* datatype */
-
- MYwrite_char (mumkid[1], message);
- MYwrite_word (mumkid[1], x);
- MYwrite_char (mumkid[1], c);
- MYwrite_char (mumkid[1], d);
- if (((c & 0xf) >= 5) && passon (debugsock, mumkid[1], 4))
- goto panic_error; /* bound */
- break;
-
- case RDP_ClearWatch:
- /* Clear Watchpoint */
-#ifdef DEBUG
- fprintf (stderr, "RDP Clear Watchpoint\n");
-#endif
- MYwrite_char (mumkid[1], message);
- if (passon (debugsock, mumkid[1], 4))
- goto panic_error; /* point */
- break;
-
- case RDP_Execute:
- /* Excecute */
-#ifdef DEBUG
- fprintf (stderr, "RDP Execute\n");
-#endif
-
- /* LEAVE THIS ONE 'TIL LATER... */
- /* NEED TO WORK THINGS OUT */
-
- /* NO ASCYNCHROUS RUNNING */
-
- if (MYread_char (debugsock, &c))
- goto panic_error; /* return */
-
- /* Remember incase bit 7 is set and we have to send back a word */
- exreturn = c;
-
- MYwrite_char (mumkid[1], message);
- MYwrite_char (mumkid[1], c);
- break;
-
- case RDP_Step:
- /* Step */
-#ifdef DEBUG
- fprintf (stderr, "RDP Step\n");
-#endif
-
- if (MYread_char (debugsock, &c))
- goto panic_error; /* return */
-
- if (MYread_word (debugsock, &x))
- goto panic_error; /* ninstr */
-
- MYwrite_char (mumkid[1], message);
- MYwrite_char (mumkid[1], c);
- MYwrite_word (mumkid[1], x);
- break;
-
- case RDP_Info:
- /* Info */
-#ifdef DEBUG
- fprintf (stderr, "RDP Info\n");
-#endif
- /* INFO TARGET, SET RDI LEVEL */
- if (MYread_word (debugsock, &messagetype))
- goto panic_error; /* info */
-
- switch (messagetype)
- {
- case RDIInfo_Target:
- MYwrite_char (mumkid[1], message);
- MYwrite_word (mumkid[1], messagetype);
- break;
-
- case RDISet_RDILevel:
- MYwrite_char (mumkid[1], message);
- MYwrite_word (mumkid[1], messagetype);
- if (passon (debugsock, mumkid[1], 1))
- goto panic_error; /* argument */
- break;
-
- case RDISet_Cmdline:
- /* Got to pass on a string argument */
- MYwrite_char (mumkid[1], message);
- MYwrite_word (mumkid[1], messagetype);
- do
- {
- if (MYread_char (debugsock, &c))
- goto panic_error;
-
- MYwrite_char (mumkid[1], c);
- }
- while (c);
- break;
-
- case RDISignal_Stop:
- kill (child, SIGUSR1);
- MYwrite_char (debugsock, RDP_Return);
- MYwrite_char (debugsock, RDIError_UserInterrupt);
- break;
-
- case RDIVector_Catch:
- MYread_word (debugsock, &x);
- MYwrite_char (mumkid[1], message);
- MYwrite_word (mumkid[1], messagetype);
- MYwrite_word (mumkid[1], x);
- break;
-
- case RDIInfo_Step:
- MYwrite_char (mumkid[1], message);
- MYwrite_word (mumkid[1], messagetype);
- break;
-
- case RDIInfo_Points:
- MYwrite_char (mumkid[1], message);
- MYwrite_word (mumkid[1], messagetype);
- break;
-
- default:
- fprintf (stderr, "Unrecognized RDIInfo request %d\n",
- messagetype);
- goto panic_error;
- }
- break;
-
- case RDP_OSOpReply:
- /* OS Operation Reply */
-#ifdef DEBUG
- fprintf (stderr, "RDP OS Reply\n");
-#endif
- MYwrite_char (mumkid[1], message);
- if (MYread_char (debugsock, &message))
- goto panic_error;
- MYwrite_char (mumkid[1], message);
- switch (message)
- {
- case 0: /* return value i.e. nothing else. */
- break;
-
- case 1: /* returns a byte... */
- if (MYread_char (debugsock, &c))
- goto panic_error;
-
- MYwrite_char (mumkid[1], c);
- break;
-
- case 2: /* returns a word... */
- if (MYread_word (debugsock, &x))
- goto panic_error;
-
- MYwrite_word (mumkid[1], x);
- break;
- }
- break;
-
- case RDP_Reset:
- /* Reset */
-#ifdef DEBUG
- fprintf (stderr, "RDP Reset\n");
-#endif
- MYwrite_char (mumkid[1], message);
- break;
-
- default:
- /* Hmm.. bad RDP operation */
- fprintf (stderr, "RDP Bad RDP request (%d)\n", message);
- MYwrite_char (debugsock, RDP_Return);
- MYwrite_char (debugsock, RDIError_UnimplementedMessage);
- break;
- }
- }
-
- if (FD_ISSET (kidmum[0], &readfds))
- {
-#ifdef DEBUG
- fprintf (stderr, "->ARMulator\n");
-#endif
- /* Anything we get from the ARMulator has to go to the debugger... */
- /* It is that simple! */
-
- passon (kidmum[0], debugsock, 1);
- }
- }
-}
diff --git a/sim/arm/tconfig.in b/sim/arm/tconfig.in
deleted file mode 100644
index 04f702d5a4e..00000000000
--- a/sim/arm/tconfig.in
+++ /dev/null
@@ -1,17 +0,0 @@
-/* ARM target configuration file. */
-
-/* Define this if the simulator supports profiling.
- See the mips simulator for an example.
- This enables the `-p foo' and `-s bar' options.
- The target is required to provide sim_set_profile{,_size}. */
-/* #define SIM_HAVE_PROFILE */
-
-/* Define this if the simulator uses an instruction cache.
- See the h8/300 simulator for an example.
- This enables the `-c size' option to set the size of the cache.
- The target is required to provide sim_set_simcache_size. */
-/* #define SIM_HAVE_SIMCACHE */
-
-/* Define this if the target cpu is bi-endian
- and the simulator supports it. */
-#define SIM_HAVE_BIENDIAN
diff --git a/sim/arm/thumbemu.c b/sim/arm/thumbemu.c
deleted file mode 100644
index 4f007333363..00000000000
--- a/sim/arm/thumbemu.c
+++ /dev/null
@@ -1,559 +0,0 @@
-/* thumbemu.c -- Thumb instruction emulation.
- Copyright (C) 1996, Cygnus Software Technologies Ltd.
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
-
-/* We can provide simple Thumb simulation by decoding the Thumb
-instruction into its corresponding ARM instruction, and using the
-existing ARM simulator. */
-
-#ifndef MODET /* required for the Thumb instruction support */
-#if 1
-#error "MODET needs to be defined for the Thumb world to work"
-#else
-#define MODET (1)
-#endif
-#endif
-
-#include "armdefs.h"
-#include "armemu.h"
-#include "armos.h"
-
-/* Decode a 16bit Thumb instruction. The instruction is in the low
- 16-bits of the tinstr field, with the following Thumb instruction
- held in the high 16-bits. Passing in two Thumb instructions allows
- easier simulation of the special dual BL instruction. */
-
-tdstate ARMul_ThumbDecode (state, pc, tinstr, ainstr)
- ARMul_State *
- state;
- ARMword
- pc;
- ARMword
- tinstr;
- ARMword *
- ainstr;
-{
- tdstate valid = t_decoded; /* default assumes a valid instruction */
- ARMword next_instr;
-
- if (state->bigendSig)
- {
- next_instr = tinstr & 0xFFFF;
- tinstr >>= 16;
- }
- else
- {
- next_instr = tinstr >> 16;
- tinstr &= 0xFFFF;
- }
-
-#if 1 /* debugging to catch non updates */
- *ainstr = 0xDEADC0DE;
-#endif
-
- switch ((tinstr & 0xF800) >> 11)
- {
- case 0: /* LSL */
- case 1: /* LSR */
- case 2: /* ASR */
- /* Format 1 */
- *ainstr = 0xE1B00000 /* base opcode */
- | ((tinstr & 0x1800) >> (11 - 5)) /* shift type */
- | ((tinstr & 0x07C0) << (7 - 6)) /* imm5 */
- | ((tinstr & 0x0038) >> 3) /* Rs */
- | ((tinstr & 0x0007) << 12); /* Rd */
- break;
- case 3: /* ADD/SUB */
- /* Format 2 */
- {
- ARMword subset[4] = {
- 0xE0900000, /* ADDS Rd,Rs,Rn */
- 0xE0500000, /* SUBS Rd,Rs,Rn */
- 0xE2900000, /* ADDS Rd,Rs,#imm3 */
- 0xE2500000 /* SUBS Rd,Rs,#imm3 */
- };
- /* It is quicker indexing into a table, than performing switch
- or conditionals: */
- *ainstr = subset[(tinstr & 0x0600) >> 9] /* base opcode */
- | ((tinstr & 0x01C0) >> 6) /* Rn or imm3 */
- | ((tinstr & 0x0038) << (16 - 3)) /* Rs */
- | ((tinstr & 0x0007) << (12 - 0)); /* Rd */
- }
- break;
- case 4: /* MOV */
- case 5: /* CMP */
- case 6: /* ADD */
- case 7: /* SUB */
- /* Format 3 */
- {
- ARMword subset[4] = {
- 0xE3B00000, /* MOVS Rd,#imm8 */
- 0xE3500000, /* CMP Rd,#imm8 */
- 0xE2900000, /* ADDS Rd,Rd,#imm8 */
- 0xE2500000, /* SUBS Rd,Rd,#imm8 */
- };
- *ainstr = subset[(tinstr & 0x1800) >> 11] /* base opcode */
- | ((tinstr & 0x00FF) >> 0) /* imm8 */
- | ((tinstr & 0x0700) << (16 - 8)) /* Rn */
- | ((tinstr & 0x0700) << (12 - 8)); /* Rd */
- }
- break;
- case 8: /* Arithmetic and high register transfers */
- /* TODO: Since the subsets for both Format 4 and Format 5
- instructions are made up of different ARM encodings, we could
- save the following conditional, and just have one large
- subset. */
- if ((tinstr & (1 << 10)) == 0)
- {
- /* Format 4 */
- struct
- {
- ARMword opcode;
- enum
- { t_norm, t_shift, t_neg, t_mul }
- otype;
- }
- subset[16] =
- {
- { 0xE0100000, t_norm}, /* ANDS Rd,Rd,Rs */
- { 0xE0300000, t_norm}, /* EORS Rd,Rd,Rs */
- { 0xE1B00010, t_shift}, /* MOVS Rd,Rd,LSL Rs */
- { 0xE1B00030, t_shift}, /* MOVS Rd,Rd,LSR Rs */
- { 0xE1B00050, t_shift}, /* MOVS Rd,Rd,ASR Rs */
- { 0xE0B00000, t_norm}, /* ADCS Rd,Rd,Rs */
- { 0xE0D00000, t_norm}, /* SBCS Rd,Rd,Rs */
- { 0xE1B00070, t_shift}, /* MOVS Rd,Rd,ROR Rs */
- { 0xE1100000, t_norm}, /* TST Rd,Rs */
- { 0xE2700000, t_neg}, /* RSBS Rd,Rs,#0 */
- { 0xE1500000, t_norm}, /* CMP Rd,Rs */
- { 0xE1700000, t_norm}, /* CMN Rd,Rs */
- { 0xE1900000, t_norm}, /* ORRS Rd,Rd,Rs */
- { 0xE0100090, t_mul} , /* MULS Rd,Rd,Rs */
- { 0xE1D00000, t_norm}, /* BICS Rd,Rd,Rs */
- { 0xE1F00000, t_norm} /* MVNS Rd,Rs */
- };
- *ainstr = subset[(tinstr & 0x03C0) >> 6].opcode; /* base */
- switch (subset[(tinstr & 0x03C0) >> 6].otype)
- {
- case t_norm:
- *ainstr |= ((tinstr & 0x0007) << 16) /* Rn */
- | ((tinstr & 0x0007) << 12) /* Rd */
- | ((tinstr & 0x0038) >> 3); /* Rs */
- break;
- case t_shift:
- *ainstr |= ((tinstr & 0x0007) << 12) /* Rd */
- | ((tinstr & 0x0007) >> 0) /* Rm */
- | ((tinstr & 0x0038) << (8 - 3)); /* Rs */
- break;
- case t_neg:
- *ainstr |= ((tinstr & 0x0007) << 12) /* Rd */
- | ((tinstr & 0x0038) << (16 - 3)); /* Rn */
- break;
- case t_mul:
- *ainstr |= ((tinstr & 0x0007) << 16) /* Rd */
- | ((tinstr & 0x0007) << 8) /* Rs */
- | ((tinstr & 0x0038) >> 3); /* Rm */
- break;
- }
- }
- else
- {
- /* Format 5 */
- ARMword Rd = ((tinstr & 0x0007) >> 0);
- ARMword Rs = ((tinstr & 0x0038) >> 3);
- if (tinstr & (1 << 7))
- Rd += 8;
- if (tinstr & (1 << 6))
- Rs += 8;
- switch ((tinstr & 0x03C0) >> 6)
- {
- case 0x1: /* ADD Rd,Rd,Hs */
- case 0x2: /* ADD Hd,Hd,Rs */
- case 0x3: /* ADD Hd,Hd,Hs */
- *ainstr = 0xE0800000 /* base */
- | (Rd << 16) /* Rn */
- | (Rd << 12) /* Rd */
- | (Rs << 0); /* Rm */
- break;
- case 0x5: /* CMP Rd,Hs */
- case 0x6: /* CMP Hd,Rs */
- case 0x7: /* CMP Hd,Hs */
- *ainstr = 0xE1500000 /* base */
- | (Rd << 16) /* Rn */
- | (Rd << 12) /* Rd */
- | (Rs << 0); /* Rm */
- break;
- case 0x9: /* MOV Rd,Hs */
- case 0xA: /* MOV Hd,Rs */
- case 0xB: /* MOV Hd,Hs */
- *ainstr = 0xE1A00000 /* base */
- | (Rd << 16) /* Rn */
- | (Rd << 12) /* Rd */
- | (Rs << 0); /* Rm */
- break;
- case 0xC: /* BX Rs */
- case 0xD: /* BX Hs */
- *ainstr = 0xE12FFF10 /* base */
- | ((tinstr & 0x0078) >> 3); /* Rd */
- break;
- case 0xE: /* UNDEFINED */
- case 0xF: /* UNDEFINED */
- if (state->is_v5)
- {
- /* BLX Rs; BLX Hs */
- *ainstr = 0xE12FFF30 /* base */
- | ((tinstr & 0x0078) >> 3); /* Rd */
- break;
- }
- /* Drop through. */
- case 0x0: /* UNDEFINED */
- case 0x4: /* UNDEFINED */
- case 0x8: /* UNDEFINED */
- valid = t_undefined;
- break;
- }
- }
- break;
- case 9: /* LDR Rd,[PC,#imm8] */
- /* Format 6 */
- *ainstr = 0xE59F0000 /* base */
- | ((tinstr & 0x0700) << (12 - 8)) /* Rd */
- | ((tinstr & 0x00FF) << (2 - 0)); /* off8 */
- break;
- case 10:
- case 11:
- /* TODO: Format 7 and Format 8 perform the same ARM encoding, so
- the following could be merged into a single subset, saving on
- the following boolean: */
- if ((tinstr & (1 << 9)) == 0)
- {
- /* Format 7 */
- ARMword subset[4] = {
- 0xE7800000, /* STR Rd,[Rb,Ro] */
- 0xE7C00000, /* STRB Rd,[Rb,Ro] */
- 0xE7900000, /* LDR Rd,[Rb,Ro] */
- 0xE7D00000 /* LDRB Rd,[Rb,Ro] */
- };
- *ainstr = subset[(tinstr & 0x0C00) >> 10] /* base */
- | ((tinstr & 0x0007) << (12 - 0)) /* Rd */
- | ((tinstr & 0x0038) << (16 - 3)) /* Rb */
- | ((tinstr & 0x01C0) >> 6); /* Ro */
- }
- else
- {
- /* Format 8 */
- ARMword subset[4] = {
- 0xE18000B0, /* STRH Rd,[Rb,Ro] */
- 0xE19000D0, /* LDRSB Rd,[Rb,Ro] */
- 0xE19000B0, /* LDRH Rd,[Rb,Ro] */
- 0xE19000F0 /* LDRSH Rd,[Rb,Ro] */
- };
- *ainstr = subset[(tinstr & 0x0C00) >> 10] /* base */
- | ((tinstr & 0x0007) << (12 - 0)) /* Rd */
- | ((tinstr & 0x0038) << (16 - 3)) /* Rb */
- | ((tinstr & 0x01C0) >> 6); /* Ro */
- }
- break;
- case 12: /* STR Rd,[Rb,#imm5] */
- case 13: /* LDR Rd,[Rb,#imm5] */
- case 14: /* STRB Rd,[Rb,#imm5] */
- case 15: /* LDRB Rd,[Rb,#imm5] */
- /* Format 9 */
- {
- ARMword subset[4] = {
- 0xE5800000, /* STR Rd,[Rb,#imm5] */
- 0xE5900000, /* LDR Rd,[Rb,#imm5] */
- 0xE5C00000, /* STRB Rd,[Rb,#imm5] */
- 0xE5D00000 /* LDRB Rd,[Rb,#imm5] */
- };
- /* The offset range defends on whether we are transferring a
- byte or word value: */
- *ainstr = subset[(tinstr & 0x1800) >> 11] /* base */
- | ((tinstr & 0x0007) << (12 - 0)) /* Rd */
- | ((tinstr & 0x0038) << (16 - 3)) /* Rb */
- | ((tinstr & 0x07C0) >> (6 - ((tinstr & (1 << 12)) ? 0 : 2))); /* off5 */
- }
- break;
- case 16: /* STRH Rd,[Rb,#imm5] */
- case 17: /* LDRH Rd,[Rb,#imm5] */
- /* Format 10 */
- *ainstr = ((tinstr & (1 << 11)) /* base */
- ? 0xE1D000B0 /* LDRH */
- : 0xE1C000B0) /* STRH */
- | ((tinstr & 0x0007) << (12 - 0)) /* Rd */
- | ((tinstr & 0x0038) << (16 - 3)) /* Rb */
- | ((tinstr & 0x01C0) >> (6 - 1)) /* off5, low nibble */
- | ((tinstr & 0x0600) >> (9 - 8)); /* off5, high nibble */
- break;
- case 18: /* STR Rd,[SP,#imm8] */
- case 19: /* LDR Rd,[SP,#imm8] */
- /* Format 11 */
- *ainstr = ((tinstr & (1 << 11)) /* base */
- ? 0xE59D0000 /* LDR */
- : 0xE58D0000) /* STR */
- | ((tinstr & 0x0700) << (12 - 8)) /* Rd */
- | ((tinstr & 0x00FF) << 2); /* off8 */
- break;
- case 20: /* ADD Rd,PC,#imm8 */
- case 21: /* ADD Rd,SP,#imm8 */
- /* Format 12 */
- if ((tinstr & (1 << 11)) == 0)
- {
- /* NOTE: The PC value used here should by word aligned */
- /* We encode shift-left-by-2 in the rotate immediate field,
- so no shift of off8 is needed. */
- *ainstr = 0xE28F0F00 /* base */
- | ((tinstr & 0x0700) << (12 - 8)) /* Rd */
- | (tinstr & 0x00FF); /* off8 */
- }
- else
- {
- /* We encode shift-left-by-2 in the rotate immediate field,
- so no shift of off8 is needed. */
- *ainstr = 0xE28D0F00 /* base */
- | ((tinstr & 0x0700) << (12 - 8)) /* Rd */
- | (tinstr & 0x00FF); /* off8 */
- }
- break;
- case 22:
- case 23:
- switch (tinstr & 0x0F00)
- {
- case 0x0000:
- /* Format 13 */
- /* NOTE: The instruction contains a shift left of 2
- equivalent (implemented as ROR #30): */
- *ainstr = ((tinstr & (1 << 7)) /* base */
- ? 0xE24DDF00 /* SUB */
- : 0xE28DDF00) /* ADD */
- | (tinstr & 0x007F); /* off7 */
- break;
- case 0x0400:
- /* Format 14 - Push */
- * ainstr = 0xE92D0000 | (tinstr & 0x00FF);
- break;
- case 0x0500:
- /* Format 14 - Push + LR */
- * ainstr = 0xE92D4000 | (tinstr & 0x00FF);
- break;
- case 0x0c00:
- /* Format 14 - Pop */
- * ainstr = 0xE8BD0000 | (tinstr & 0x00FF);
- break;
- case 0x0d00:
- /* Format 14 - Pop + PC */
- * ainstr = 0xE8BD8000 | (tinstr & 0x00FF);
- break;
- case 0x0e00:
- if (state->is_v5)
- {
- /* This is normally an undefined instruction. The v5t architecture
- defines this particular pattern as a BKPT instruction, for
- hardware assisted debugging. We map onto the arm BKPT
- instruction. */
- * ainstr = 0xE1200070 | ((tinstr & 0xf0) << 4) | (tinstr & 0xf);
- break;
- }
- /* Drop through. */
- default:
- /* Everything else is an undefined instruction. */
- valid = t_undefined;
- break;
- }
- break;
- case 24: /* STMIA */
- case 25: /* LDMIA */
- /* Format 15 */
- *ainstr = ((tinstr & (1 << 11)) /* base */
- ? 0xE8B00000 /* LDMIA */
- : 0xE8A00000) /* STMIA */
- | ((tinstr & 0x0700) << (16 - 8)) /* Rb */
- | (tinstr & 0x00FF); /* mask8 */
- break;
- case 26: /* Bcc */
- case 27: /* Bcc/SWI */
- if ((tinstr & 0x0F00) == 0x0F00)
- {
- /* Format 17 : SWI */
- *ainstr = 0xEF000000;
- /* Breakpoint must be handled specially. */
- if ((tinstr & 0x00FF) == 0x18)
- *ainstr |= ((tinstr & 0x00FF) << 16);
- /* New breakpoint value. See gdb/arm-tdep.c */
- else if ((tinstr & 0x00FF) == 0xFE)
- *ainstr |= SWI_Breakpoint;
- else
- *ainstr |= (tinstr & 0x00FF);
- }
- else if ((tinstr & 0x0F00) != 0x0E00)
- {
- /* Format 16 */
- int doit = FALSE;
- /* TODO: Since we are doing a switch here, we could just add
- the SWI and undefined instruction checks into this
- switch to same on a couple of conditionals: */
- switch ((tinstr & 0x0F00) >> 8)
- {
- case EQ:
- doit = ZFLAG;
- break;
- case NE:
- doit = !ZFLAG;
- break;
- case VS:
- doit = VFLAG;
- break;
- case VC:
- doit = !VFLAG;
- break;
- case MI:
- doit = NFLAG;
- break;
- case PL:
- doit = !NFLAG;
- break;
- case CS:
- doit = CFLAG;
- break;
- case CC:
- doit = !CFLAG;
- break;
- case HI:
- doit = (CFLAG && !ZFLAG);
- break;
- case LS:
- doit = (!CFLAG || ZFLAG);
- break;
- case GE:
- doit = ((!NFLAG && !VFLAG) || (NFLAG && VFLAG));
- break;
- case LT:
- doit = ((NFLAG && !VFLAG) || (!NFLAG && VFLAG));
- break;
- case GT:
- doit = ((!NFLAG && !VFLAG && !ZFLAG)
- || (NFLAG && VFLAG && !ZFLAG));
- break;
- case LE:
- doit = ((NFLAG && !VFLAG) || (!NFLAG && VFLAG)) || ZFLAG;
- break;
- }
- if (doit)
- {
- state->Reg[15] = (pc + 4
- + (((tinstr & 0x7F) << 1)
- | ((tinstr & (1 << 7)) ? 0xFFFFFF00 : 0)));
- FLUSHPIPE;
- }
- valid = t_branch;
- }
- else /* UNDEFINED : cc=1110(AL) uses different format */
- valid = t_undefined;
- break;
- case 28: /* B */
- /* Format 18 */
- state->Reg[15] = (pc + 4
- + (((tinstr & 0x3FF) << 1)
- | ((tinstr & (1 << 10)) ? 0xFFFFF800 : 0)));
- FLUSHPIPE;
- valid = t_branch;
- break;
- case 29: /* UNDEFINED */
- if (state->is_v5)
- {
- if (tinstr & 1)
- {
- valid = t_undefined;
- break;
- }
- /* Drop through. */
-
- /* Format 19 */
- /* There is no single ARM instruction equivalent for this
- instruction. Also, it should only ever be matched with the
- fmt19 "BL/BLX instruction 1" instruction. However, we do
- allow the simulation of it on its own, with undefined results
- if r14 is not suitably initialised. */
- {
- ARMword tmp = (pc + 2);
-
- state->Reg[15] = ((state->Reg[14] + ((tinstr & 0x07FF) << 1))
- & 0xFFFFFFFC);
- CLEART;
- state->Reg[14] = (tmp | 1);
- valid = t_branch;
- FLUSHPIPE;
- break;
- }
- }
- valid = t_undefined;
- break;
- case 30: /* BL instruction 1 */
- /* Format 19 */
- /* There is no single ARM instruction equivalent for this Thumb
- instruction. To keep the simulation simple (from the user
- perspective) we check if the following instruction is the
- second half of this BL, and if it is we simulate it
- immediately. */
- state->Reg[14] = state->Reg[15] \
- +(((tinstr & 0x07FF) << 12) \
- |((tinstr & (1 << 10)) ? 0xFF800000 : 0));
- valid = t_branch; /* in-case we don't have the 2nd half */
- tinstr = next_instr; /* move the instruction down */
- pc += 2; /* point the pc at the 2nd half */
- if (((tinstr & 0xF800) >> 11) != 31)
- {
- if (((tinstr & 0xF800) >> 11) == 29)
- {
- ARMword tmp = (pc + 2);
-
- /* Bit one of the destination address comes from bit one of the
- address of the first (H == 10) half of the instruction, not
- from the offset in the instruction. */
- state->Reg[15] = ((state->Reg[14]
- + ((tinstr & 0x07FE) << 1)
- + ((pc - 2) & 2))
- & 0xFFFFFFFC);
- CLEART;
- state->Reg[14] = (tmp | 1);
- valid = t_branch;
- FLUSHPIPE;
- }
- else
- /* Exit, since not correct instruction. */
- pc -= 2;
- break;
- }
- /* else we fall through to process the second half of the BL */
- case 31: /* BL instruction 2 */
- /* Format 19 */
- /* There is no single ARM instruction equivalent for this
- instruction. Also, it should only ever be matched with the
- fmt19 "BL instruction 1" instruction. However, we do allow
- the simulation of it on its own, with undefined results if
- r14 is not suitably initialised. */
- {
- ARMword tmp = (pc + 2);
- state->Reg[15] = (state->Reg[14] + ((tinstr & 0x07FF) << 1));
- state->Reg[14] = (tmp | 1);
- valid = t_branch;
- FLUSHPIPE;
- }
- break;
- }
-
- return valid;
-}
diff --git a/sim/arm/wrapper.c b/sim/arm/wrapper.c
deleted file mode 100644
index 877f7fbfd6f..00000000000
--- a/sim/arm/wrapper.c
+++ /dev/null
@@ -1,534 +0,0 @@
-/* run front end support for arm
- Copyright (C) 1995, 1996, 1997, 2000, 2001 Free Software Foundation, Inc.
-
-This file is part of ARM SIM.
-
-GNU CC is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-GNU CC is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License
-along with this program; if not, write to the Free Software
-Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
-
-/* This file provides the interface between the simulator and run.c and gdb
- (when the simulator is linked with gdb).
- All simulator interaction should go through this file. */
-
-#include <stdio.h>
-#include <stdarg.h>
-#include <string.h>
-#include <bfd.h>
-#include <signal.h>
-#include "callback.h"
-#include "remote-sim.h"
-#include "armdefs.h"
-#include "armemu.h"
-#include "dbg_rdi.h"
-#include "ansidecl.h"
-
-host_callback *sim_callback;
-
-static struct ARMul_State *state;
-
-/* Who is using the simulator. */
-static SIM_OPEN_KIND sim_kind;
-
-/* argv[0] */
-static char *myname;
-
-/* Memory size in bytes. */
-static int mem_size = (1 << 21);
-
-/* Non-zero to display start up banner, and maybe other things. */
-static int verbosity;
-
-/* Non-zero to set big endian mode. */
-static int big_endian;
-
-int stop_simulator;
-
-static void
-init ()
-{
- static int done;
-
- if (!done)
- {
- ARMul_EmulateInit ();
- state = ARMul_NewState ();
- state->bigendSig = (big_endian ? HIGH : LOW);
- ARMul_MemoryInit (state, mem_size);
- ARMul_OSInit (state);
- ARMul_CoProInit (state);
- state->verbose = verbosity;
- done = 1;
- }
-}
-
-/* Set verbosity level of simulator.
- This is not intended to produce detailed tracing or debugging information.
- Just summaries. */
-/* FIXME: common/run.c doesn't do this yet. */
-
-void
-sim_set_verbose (v)
- int v;
-{
- verbosity = v;
-}
-
-/* Set the memory size to SIZE bytes.
- Must be called before initializing simulator. */
-/* FIXME: Rename to sim_set_mem_size. */
-
-void
-sim_size (size)
- int size;
-{
- mem_size = size;
-}
-
-void
-ARMul_ConsolePrint (ARMul_State * state, const char *format, ...)
-{
- va_list ap;
-
- if (state->verbose)
- {
- va_start (ap, format);
- vprintf (format, ap);
- va_end (ap);
- }
-}
-
-ARMword
-ARMul_Debug (ARMul_State * state ATTRIBUTE_UNUSED, ARMword pc ATTRIBUTE_UNUSED, ARMword instr ATTRIBUTE_UNUSED)
-{
- return 0;
-}
-
-int
-sim_write (sd, addr, buffer, size)
- SIM_DESC sd ATTRIBUTE_UNUSED;
- SIM_ADDR addr;
- unsigned char *buffer;
- int size;
-{
- int i;
-
- init ();
-
- for (i = 0; i < size; i++)
- ARMul_SafeWriteByte (state, addr + i, buffer[i]);
-
- return size;
-}
-
-int
-sim_read (sd, addr, buffer, size)
- SIM_DESC sd ATTRIBUTE_UNUSED;
- SIM_ADDR addr;
- unsigned char *buffer;
- int size;
-{
- int i;
-
- init ();
- for (i = 0; i < size; i++)
- buffer[i] = ARMul_SafeReadByte (state, addr + i);
-
- return size;
-}
-
-int
-sim_trace (sd)
- SIM_DESC sd ATTRIBUTE_UNUSED;
-{
- (*sim_callback->printf_filtered) (sim_callback,
- "This simulator does not support tracing\n");
- return 1;
-}
-
-int
-sim_stop (sd)
- SIM_DESC sd ATTRIBUTE_UNUSED;
-{
- state->Emulate = STOP;
- stop_simulator = 1;
- return 1;
-}
-
-void
-sim_resume (sd, step, siggnal)
- SIM_DESC sd ATTRIBUTE_UNUSED;
- int step;
- int siggnal ATTRIBUTE_UNUSED;
-{
- state->EndCondition = 0;
- stop_simulator = 0;
-
- if (step)
- {
- state->Reg[15] = ARMul_DoInstr (state);
- if (state->EndCondition == 0)
- state->EndCondition = RDIError_BreakpointReached;
- }
- else
- {
-#if 1 /* JGS */
- state->NextInstr = RESUME; /* treat as PC change */
-#endif
- state->Reg[15] = ARMul_DoProg (state);
- }
-
- FLUSHPIPE;
-}
-
-SIM_RC
-sim_create_inferior (sd, abfd, argv, env)
- SIM_DESC sd ATTRIBUTE_UNUSED;
- struct _bfd *abfd;
- char **argv;
- char **env;
-{
- int argvlen = 0;
- int mach;
- char **arg;
-
- if (abfd != NULL)
- ARMul_SetPC (state, bfd_get_start_address (abfd));
- else
- ARMul_SetPC (state, 0); /* ??? */
-
- mach = bfd_get_mach (abfd);
-
- switch (mach)
- {
- default:
- (*sim_callback->printf_filtered) (sim_callback,
- "Unknown machine type; please update sim_create_inferior.\n");
- /* fall through */
-
- case 0:
- /* We wouldn't set the machine type with earlier toolchains, so we
- explicitly select a processor capable of supporting all ARMs in
- 32bit mode. */
- case bfd_mach_arm_5:
- case bfd_mach_arm_5T:
- ARMul_SelectProcessor (state, ARM_v5_Prop);
- break;
-
- case bfd_mach_arm_5TE:
- ARMul_SelectProcessor (state, ARM_v5_Prop | ARM_v5e_Prop);
- break;
-
- case bfd_mach_arm_XScale:
- ARMul_SelectProcessor (state, ARM_v5_Prop | ARM_v5e_Prop | ARM_XScale_Prop);
- break;
-
- case bfd_mach_arm_4:
- case bfd_mach_arm_4T:
- ARMul_SelectProcessor (state, ARM_v4_Prop);
- break;
-
- case bfd_mach_arm_3:
- case bfd_mach_arm_3M:
- ARMul_SelectProcessor (state, ARM_Lock_Prop);
- break;
-
- case bfd_mach_arm_2:
- case bfd_mach_arm_2a:
- ARMul_SelectProcessor (state, ARM_Fix26_Prop);
- break;
- }
-
- if ( mach != bfd_mach_arm_3
- && mach != bfd_mach_arm_3M
- && mach != bfd_mach_arm_2
- && mach != bfd_mach_arm_2a)
- {
- /* Reset mode to ARM. A gdb user may rerun a program that had entered
- THUMB mode from the start and cause the ARM-mode startup code to be
- executed in THUMB mode. */
- ARMul_SetCPSR (state, SVC32MODE);
- }
-
- if (argv != NULL)
- {
- /* Set up the command line by laboriously stringing together
- the environment carefully picked apart by our caller. */
-
- /* Free any old stuff. */
- if (state->CommandLine != NULL)
- {
- free (state->CommandLine);
- state->CommandLine = NULL;
- }
-
- /* See how much we need. */
- for (arg = argv; *arg != NULL; arg++)
- argvlen += strlen (*arg) + 1;
-
- /* Allocate it. */
- state->CommandLine = malloc (argvlen + 1);
- if (state->CommandLine != NULL)
- {
- arg = argv;
- state->CommandLine[0] = '\0';
-
- for (arg = argv; *arg != NULL; arg++)
- {
- strcat (state->CommandLine, *arg);
- strcat (state->CommandLine, " ");
- }
- }
- }
-
- if (env != NULL)
- {
- /* Now see if there's a MEMSIZE spec in the environment. */
- while (*env)
- {
- if (strncmp (*env, "MEMSIZE=", sizeof ("MEMSIZE=") - 1) == 0)
- {
- char *end_of_num;
-
- /* Set up memory limit. */
- state->MemSize =
- strtoul (*env + sizeof ("MEMSIZE=") - 1, &end_of_num, 0);
- }
- env++;
- }
- }
-
- return SIM_RC_OK;
-}
-
-void
-sim_info (sd, verbose)
- SIM_DESC sd ATTRIBUTE_UNUSED;
- int verbose ATTRIBUTE_UNUSED;
-{
-}
-
-
-static int
-frommem (state, memory)
- struct ARMul_State *state;
- unsigned char *memory;
-{
- if (state->bigendSig == HIGH)
- {
- return (memory[0] << 24)
- | (memory[1] << 16) | (memory[2] << 8) | (memory[3] << 0);
- }
- else
- {
- return (memory[3] << 24)
- | (memory[2] << 16) | (memory[1] << 8) | (memory[0] << 0);
- }
-}
-
-
-static void
-tomem (state, memory, val)
- struct ARMul_State *state;
- unsigned char *memory;
- int val;
-{
- if (state->bigendSig == HIGH)
- {
- memory[0] = val >> 24;
- memory[1] = val >> 16;
- memory[2] = val >> 8;
- memory[3] = val >> 0;
- }
- else
- {
- memory[3] = val >> 24;
- memory[2] = val >> 16;
- memory[1] = val >> 8;
- memory[0] = val >> 0;
- }
-}
-
-int
-sim_store_register (sd, rn, memory, length)
- SIM_DESC sd ATTRIBUTE_UNUSED;
- int rn;
- unsigned char *memory;
- int length ATTRIBUTE_UNUSED;
-{
- init ();
-
- if (rn == 25)
- {
- state->Cpsr = frommem (state, memory);
- ARMul_CPSRAltered (state);
- }
- else
- ARMul_SetReg (state, state->Mode, rn, frommem (state, memory));
- return -1;
-}
-
-int
-sim_fetch_register (sd, rn, memory, length)
- SIM_DESC sd ATTRIBUTE_UNUSED;
- int rn;
- unsigned char *memory;
- int length ATTRIBUTE_UNUSED;
-{
- ARMword regval;
-
- init ();
-
- if (rn < 16)
- regval = ARMul_GetReg (state, state->Mode, rn);
- else if (rn == 25) /* FIXME: use PS_REGNUM from gdb/config/arm/tm-arm.h */
- regval = ARMul_GetCPSR (state);
- else
- regval = 0; /* FIXME: should report an error */
- tomem (state, memory, regval);
- return -1;
-}
-
-SIM_DESC
-sim_open (kind, ptr, abfd, argv)
- SIM_OPEN_KIND kind;
- host_callback *ptr;
- struct _bfd *abfd;
- char **argv;
-{
- sim_kind = kind;
- if (myname) free (myname);
- myname = (char *) xstrdup (argv[0]);
- sim_callback = ptr;
-
- /* Decide upon the endian-ness of the processor.
- If we can, get the information from the bfd itself.
- Otherwise look to see if we have been given a command
- line switch that tells us. Otherwise default to little endian. */
- if (abfd != NULL)
- big_endian = bfd_big_endian (abfd);
- else if (argv[1] != NULL)
- {
- int i;
-
- /* Scan for endian-ness switch. */
- for (i = 0; (argv[i] != NULL) && (argv[i][0] != 0); i++)
- if (argv[i][0] == '-' && argv[i][1] == 'E')
- {
- char c;
-
- if ((c = argv[i][2]) == 0)
- {
- ++i;
- c = argv[i][0];
- }
-
- switch (c)
- {
- case 0:
- sim_callback->printf_filtered
- (sim_callback, "No argument to -E option provided\n");
- break;
-
- case 'b':
- case 'B':
- big_endian = 1;
- break;
-
- case 'l':
- case 'L':
- big_endian = 0;
- break;
-
- default:
- sim_callback->printf_filtered
- (sim_callback, "Unrecognised argument to -E option\n");
- break;
- }
- }
- }
-
- return (SIM_DESC) 1;
-}
-
-void
-sim_close (sd, quitting)
- SIM_DESC sd ATTRIBUTE_UNUSED;
- int quitting ATTRIBUTE_UNUSED;
-{
- if (myname) free (myname);
- myname = NULL;
-}
-
-SIM_RC
-sim_load (sd, prog, abfd, from_tty)
- SIM_DESC sd;
- char *prog;
- bfd *abfd;
- int from_tty ATTRIBUTE_UNUSED;
-{
- extern bfd *sim_load_file (); /* ??? Don't know where this should live. */
- bfd *prog_bfd;
-
- prog_bfd = sim_load_file (sd, myname, sim_callback, prog, abfd,
- sim_kind == SIM_OPEN_DEBUG, 0, sim_write);
- if (prog_bfd == NULL)
- return SIM_RC_FAIL;
- ARMul_SetPC (state, bfd_get_start_address (prog_bfd));
- if (abfd == NULL)
- bfd_close (prog_bfd);
- return SIM_RC_OK;
-}
-
-void
-sim_stop_reason (sd, reason, sigrc)
- SIM_DESC sd ATTRIBUTE_UNUSED;
- enum sim_stop *reason;
- int *sigrc;
-{
- if (stop_simulator)
- {
- *reason = sim_stopped;
- *sigrc = SIGINT;
- }
- else if (state->EndCondition == 0)
- {
- *reason = sim_exited;
- *sigrc = state->Reg[0] & 255;
- }
- else
- {
- *reason = sim_stopped;
- if (state->EndCondition == RDIError_BreakpointReached)
- *sigrc = SIGTRAP;
- else
- *sigrc = 0;
- }
-}
-
-void
-sim_do_command (sd, cmd)
- SIM_DESC sd ATTRIBUTE_UNUSED;
- char *cmd ATTRIBUTE_UNUSED;
-{
- (*sim_callback->printf_filtered) (sim_callback,
- "This simulator does not accept any commands.\n");
-}
-
-
-void
-sim_set_callbacks (ptr)
- host_callback *ptr;
-{
- sim_callback = ptr;
-}
diff --git a/sim/common/ChangeLog b/sim/common/ChangeLog
deleted file mode 100644
index 0b941770dcf..00000000000
--- a/sim/common/ChangeLog
+++ /dev/null
@@ -1,4675 +0,0 @@
-2001-07-05 Ben Elliston <bje@redhat.com>
-
- * Make-common.in (srccgen): Remove.
- (CGEN_CPU_DIR): Define.
- (CGEN_READ_SCM): Redefine without $(srccgen).
- (CGEN_ARCH_SCM): Ditto.
- (CGEN_CPU_SCM): Ditto.
- (CGEN_DECODE_SCM): Ditto.
- (CGEN_DESC_SCM): Ditto.
-
-2001-04-25 Frank Ch. Eigler <fche@redhat.com>
-
- * sim-load.c (sim_load_file): Put it back: external now.
- * sim-utils.c (sim_analyze_program): Ditto. Nyuk nyuk nyuk.
-
-2001-04-21 Andrew Cagney <ac131313@redhat.com>
-
- * sim-load.c (sim_load_file): Delete call bfd_cache_close. BFD
- internal interface.
- * sim-utils.c (sim_analyze_program): Ditto.
-
-2001-04-19 Frank Ch. Eigler <fche@redhat.com>
-
- * sim-utils.c (sim_analyze_program): Call bfd_cache_close after
- we're finished with its immediate use.
- * sim-load.c (sim_load_file): Ditto.
-
-2001-03-16 Frank Ch. Eigler <fche@redhat.com>
-
- Add support for mmap-based memory regions.
- * sim-memopt.c (mmap_next_fd): New global.
- (sim_memory_init): Reinitialize it.
- (OPTION_MEMORY_MAPFILE, memory_option_handler): Support new
- "--memory-mapfile FILE" option. Check for some errors.
- (do_memopt_add): Conditionally do mmap instead of malloc for
- backing store of simulated memory. Check for more errors.
- (do_simopt_delete, sim_memory_uninstall): Corresponding cleanup.
- * sim-memopt.h (munmap_length): New member of _sim_memopt.
- * configure.in: Look for mmap/fstat related functions and headers.
- * config.in, configure: Regenerated.
-
-2001-03-15 Frank Ch. Eigler <fche@redhat.com>
-
- * sim-core.c (sim_core_map_attach): Correct overlap-related
- error messages.
-
-2001-03-07 Michael Meissner <meissner@redhat.com>
-
- * run.c (alloca-conf.h): Delete, no longer provided.
-
-2001-02-22 Ben Elliston <bje@redhat.com>
-
- * sim-trace.h (TRACE_VPU_IDX): Add.
- (TRACE_vpu): Define.
- (WITH_TRACE_VPU_P): Likewise.
- (TRACE_VPU_P): Likewise.
- * sim-trace.c (OPTION_TRACE_VPU): Define.
- (trace_options): Add --trace-vpu.
- (trace_option_handler): Handle OPTION_TRACE_VPU.
- (trace_option_handler): Include VPU tracing in --trace-semantics.
- (trace_idx_to_str): Handle TRACE_VPU_IDX.
-
-2001-02-21 Ben Elliston <bje@redhat.com>
-
- * sim-trace.h (TRACE_BRANCH_INPUT1): New macro.
- (TRACE_BRANCH_INPUT2): Likewise.
-
-2001-02-09 Ben Elliston <bje@redhat.com>
-
- * (profile_print_pc): Write header out in target byte order.
-
-2001-02-09 Ben Elliston <bje@redhat.com>
-
- * sim-profile.c (profile_pc_init): Correct bug in loop logic when
- adjusting the pc shift value.
-
-2001-01-12 Chris Demetriou <cgd@sibyte.com>
-
- * aclocal.m4 (SIM_AC_OPTION_SCACHE): Properly handle the case
- where a numeric value is supplied.
-
-2001-01-06 Ben Elliston <bje@redhat.com>
-
- * cgen.sh: Allow extrafiles to include the semantics files when
- generating an ISA-specific decoder.
-
-2000-12-27 Alexandre Oliva <aoliva@redhat.com>
-
- * Make-common.in (sim-io.o): Depend on targ-vals.h.
-
-2000-12-23 Ben Elliston <bje@redhat.com>
-
- * cgen-trace.c (trace_result): Handle 'f' type operands; output
- them to the trace stream using sim_fpu_printn_fpu. Include
- "sim-fpu.h".
-
-2000-12-15 Ben Elliston <bje@redhat.com>
-
- * sim-fpu.h (sim_fpu_printn_fpu): Declare.
- * sim-fpu.c (print_bits): Add digits parameter. Print only as many
- trailing digits as specified (-1 to print all digits).
- (sim_fpu_print_fpu): New wrapper around sim_fpu_printn_fpu.
- (sim_fpu_printn_fpu): Rename from sim_fpu_print_fpu; update calls
- to print_bits ().
-
-2000-12-13 Ben Elliston <bje@redhat.com>
-
- * cgen.sh: Set prefix/PREFIX (append ISA if applicable). Factor
- sed expressions into $sedscript, substituting @prefix@/@PREFIX@.
- (defs): New action.
-
-2000-12-12 Geoffrey Keating <geoffk@redhat.com>
-
- * sim-endian.h: Don't have parameters on macro definitions which
- are simply renaming functions, to permit use of XCONCAT2 in both
- the macro name and the arguments in a use of such a definition.
-
-2000-12-11 Ben Elliston <bje@redhat.com>
-
- * cgen-ops.h (SUBWORDDFDI): New function.
-
-2000-12-05 Ben Elliston <bje@redhat.com>
-
- * Make-common.in (cgen-defs): New target.
- (cgen-decode): Pass $(EXTRAFILES).
-
- * genmloop.sh: Use @prefix@, not @cpu@ throughout. Add -prefix and
- -outfile-suffix options.
-
-2000-12-04 Ben Elliston <bje@redhat.com>
-
- * cgen-ops.h (SUBWORDSIQI): Mask off top bits.
- (SUBWORDSIUQI): Likewise.
- (SUBWORDDIHI): Likewise.
- (SUBWORDDIQI): New function.
-
- * cgen-trace.c (disassemble_insn): Remove unused declaration.
- * cgen-scache.c (scache_option_handler): Remove unused local var.
-
-2000-12-03 Ben Elliston <bje@redhat.com>
-
- * sim-profile.c (profile_option_handler): Remove unused prof_nr.
-
-2000-11-26 Stephane Carrez <Stephane.Carrez@worldnet.fr>
-
- * hw-events.c (delete_hw_event_data): Remove the scheduled events.
-
-2000-11-26 Stephane Carrez <Stephane.Carrez@worldnet.fr>
-
- * dv-core.c (dv_core_attach_address_callback): Don't abort if
- space is not zero.
-
-2000-11-24 Stephane Carrez <Stephane.Carrez@worldnet.fr>
-
- * hw-base.c (hw_delete): Don't free base_of_hw since it's freed.
- (set_hw_delete): Moved the macro as a function.
- * hw-base.h (set_hw_delete): Declare as external function.
- * hw-alloc.c (delete_hw_alloc_data): Allow to free the memory
- allocated using hw_malloc.
-
-2000-11-24 Stephane Carrez <Stephane.Carrez@worldnet.fr>
-
- * sim-options.c (sim_parse_args): Free the memory used for
- long_options, short_options, handlers, opt_cpu, orig_val.
-
-2000-11-20 Ben Elliston <bje@redhat.com>
-
- * cgen-ops.h (SUBBI): New macro.
- (SUBWORDSIQI, SUBWORDSIHI, SUBWORDSIUQI): New functions.
- (SUBWORDDIHI, SUBWORDDIUQI, SUBWORDDIDF): Likewise.
-
-2000-11-16 Ben Elliston <bje@redhat.com>
-
- * cgen-types.h (VOID): New type.
-
-2000-11-09 Ben Elliston <bje@redhat.com>
-
- * sim-fpu.c (sim_fpu_one): Set exponent to 0.
- (sim_fpu_two): Set exponent to 1.
-
-2000-10-26 Ben Elliston <bje@redhat.com>
-
- * cgen.sh: Handle an isa argument between cpu and mach. Default to
- `all'. Pass `-i' options to cgen applications.
- * Make-common.in (cgen-arch, cgen-cpu, cgen-decode, cgen-cpu-decode,
- cgen-desc): Pass $(isa) to cgen.sh.
-
-2000-10-08 Ben Elliston <bje@redhat.com>
-
- * cgen-utils.c (cgen_rtx_error): New function.
-
-2000-10-07 Ben Elliston <bje@redhat.com>
-
- * cgen-trace.c (sim_cgen_disassemble_insn): Handle failure
- conditions for sim_core_read_buffer().
-
-2000-09-26 Dave Brolley <brolley@redhat.com>
-
- * cgen-utils.c (RORQI): New function.
- (ROLQI): New function.
- (RORHI): New function.
- (ROLHI): New function.
-
-2000-08-28 Dave Brolley <brolley@redhat.com>
-
- * cgen-trace.c (sim_cgen_disassemble_insn): Make sure entire insn is
- in insn_value if it will fit.
-
-2000-08-21 Frank Ch. Eigler <fche@redhat.com>
-
- * Make-common.in, cgen.sh: Contribute CGEN-related build targets/rules.
-
-2000-08-15 Dave Brolley <brolley@redhat.com>
-
- * sim-profile.c (profile_print_speed): Print cpu frequency if not zero.
-
-2000-08-15 Dave Brolley <brolley@redhat.com>
-
- * sim-profile.h (PROFILE_DATA): Add cpu_freq.
- (PROFILE_CPU_FREQ): New macro.
- * sim-profile.c (OPTION_PROFILE_CPU_FREQUENCY): New enumerator.
- (profile-options): Add profile-cpu-frequency.
- (parse_frequency): New function.
- (profile_option_handler): Handle OPTION_PROFILE_CPU_FREQUENCY.
- (profile_print_speed): Print cpu frequency and simulated execution time.
- Re-indent other items to match.
-
-2000-08-09 Andrew Cagney <cagney@lulu.cygnus.com>
-
- * dv-sockser.c (dv_sockser_init): Eliminate MIN macro.
-
-2000-07-27 Frank Ch. Eigler <fche@redhat.com>
-
- From Maciej W. Rozycki <macro@ds2.pg.gda.pl>
- * Makefile.in (install): Install run.1 man page.
-
-Thu Jul 27 21:56:08 2000 Andrew Cagney <cagney@b1.cygnus.com>
-
- From 2000-06-23 Doug Evans <dje@casey.transmeta.com>:
- * Makefile.in (headers,nltvals.def): Merge.
-
-Thu Jul 27 20:37:47 2000 Andrew Cagney <cagney@b1.cygnus.com>
-
- From 2000-06-25 Stephane Carrez <Stephane.Carrez@worldnet.fr>:
- * nrun.c (main): Print the simulator statistics only in
- verbose mode.
- * hw-properties.h (hw_find_integer_array_property): Fix
- prototype (use signed_cell).
-
- From 2000-06-25 Stephane Carrez <Stephane.Carrez@worldnet.fr>:
- * sim-events.c (sim_events_remain_time): New function returning
- the time that remains before the event is raised.
- * hw-events.c (hw_event_remain_time): Likewise.
- * sim-events.h (sim_events_remain_time): Declare.
- * hw-events.h (hw_event_remain_time): Declare.
-
- From 2000-06-25 Stephane Carrez <Stephane.Carrez@worldnet.fr>:
- * sim-hw.c: Use <errno.h> instead of <sys/errno.h>
- (OPTION_HW_LIST): New option --hw-list to list the devices.
- (hw_option_handler): List the device tree with 'sim_hw_print'.
-
- From 2000-06-25 Stephane Carrez <Stephane.Carrez@worldnet.fr>:
- * sim-bits.h (_MSB_16, _LSB_16): Define for 16-bit targets.
- (MASK, LSBIT, MSBIT): Likewise and use _MSB_16 and _LSB_16.
- (EXTENDED): Define for 16-bit word size.
- * sim-bits.c (LSEXTRACTED, MSEXTRACTED, LSINSERTED,
- MSINSERTED, LSSEXT, MSSEXT): Implement for 16-bit word size.
- * sim-types.h: Added support for 16-bit targets.
-
-2000-06-23 Frank Ch. Eigler <fche@redhat.com>
-
- * cgen-trace.h (TRACE_USEFUL_MASK): Remove TRACE_EVENTS_IDX.
-
-2000-06-24 Frank Ch. Eigler <fche@redhat.com>
-
- From Maciej W. Rozycki <macro@ds2.pg.gda.pl>:
- * Makefile.in (distclean): Clean cconfig.h also.
-
-Tue May 23 21:39:23 2000 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Tue May 23 21:35:53 2000 Andrew Cagney <cagney@b1.cygnus.com>
-
- * aclocal.m4 (sim-profile): Enable the profiler by default.
-
-Tue May 23 20:30:12 2000 Andrew Cagney <cagney@amy.cygnus.com>
-
- * run.c (main): Initialize sigrc.
-
-Wed Apr 26 16:18:44 2000 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-events.c (update_time_from_event): Add more detailed event
- tracing.
-
-2000-03-30 Dave Brolley <brolley@redhat.com>
-
- * aclocal.m4 (cgen): Use guile to run cgen.
-
-2000-03-23 Dave Brolley <brolley@redhat.com>
-
- * cgen-fpu.h: Rename extsfdf to fextsfdf. Rename truncdfsf to
- ftruncdfsf.
- * cgen-accfp.c (fextsfdf): New function.
- (ftruncdfsf): New function.
- (cgen_init_accurate_fpu): Initialize fextsfdf and ftruncdfsf.
-
-2000-03-13 Jeff Johnston <jjohnstn@cygnus.com>
-
- * cgen-ops.h: Added TRUNCSISI.
-
-2000-03-08 Dave Brolley <brolley@redhat.com>
-
- * cgen-par.h (cgen_write_queue_kind): Add CGEN_FN_SF_WRITE.
- (CGEN_WRITE_QUEUE_ELEMENT): Add fn_sf_write.
- (sim_queue_fn_si_write): Last argument is has type USI.
- (sim_queue_fn_sf_write): New function.
- * cgen-par.c (sim_queue_fn_si_write): Declare 'value' as USI.
- (sim_queue_fn_sf_write): New function.
- (cgen_write_queue_element_execute): Handle CGEN_FN_SF_WRITE.
-
-Tue Feb 22 16:45:09 2000 Andrew Cagney <cagney@b1.cygnus.com>
-
- * run.c (main): When SIM_HAVE_ENVIRONMENT enable tracing with
- sim_set_trace and run simulator using sim_resume.
- (main): Add option ``-o'' - operating environment. Only continue
- after a signal when operating environment.
- (main): Always set REASON and SIGRC using sim_stop_reason.
- (sim_trace): Delete extern declaration.
-
-2000-02-08 Nick Clifton <nickc@cygnus.com>
-
- * callback.c: Fix compile time warning messages.
- * run.c: Fix compile time warning messages.
-
-1999-12-17 Dave Brolley <brolley@cygnus.com>
-
- * sim-profile.h: (set_profile_option_mask): Add prototype.
- * sim-profile.c (set_profile_option_mask): No longer static.
-
-Wed Dec 8 21:47:13 1999 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-arange.c: Include <string.h>
-
-1999-12-07 Dave Brolley <brolley@cygnus.com>
-
- * sim-options.c (print_help): '=' required before optional argument.
- * cgen-par.h (CGEN_FN_MEM_QI_WRITE): New enumerator.
- (CGEN_FN_MEM_HI_WRITE): New enumerator.
- (CGEN_FN_MEM_SI_WRITE): New enumerator.
- (CGEN_FN_MEM_DI_WRITE): New enumerator.
- (CGEN_FN_MEM_DF_WRITE): New enumerator.
- (CGEN_FN_MEM_XI_WRITE): New enumerator.
- (fn_mem_qi_write): New union members.
- (fn_mem_hi_write): New union members.
- (fn_mem_si_write): New union members.
- (fn_mem_di_write): New union members.
- (fn_mem_df_write): New union members.
- (fn_mem_xi_write): New union members.
- (sim_queue_fn_mem_qi_write): New function.
- (sim_queue_fn_mem_hi_write): New function.
- (sim_queue_fn_mem_si_write): New function.
- (sim_queue_fn_mem_di_write): New function.
- (sim_queue_fn_mem_df_write): New function.
- (sim_queue_fn_mem_xi_write): New function.
- * cgen-par.c (sim_queue_fn_mem_qi_write): New function.
- (sim_queue_fn_mem_hi_write): New function.
- (sim_queue_fn_mem_si_write): New function.
- (sim_queue_fn_mem_di_write): New function.
- (sim_queue_fn_mem_df_write): New function.
- (sim_queue_fn_mem_xi_write): New function.
- (cgen_write_queue_element_execute): Handle CGEN_FN_MEM_QI_WRITE,
- CGEN_FN_MEM_HI_WRITE, CGEN_FN_MEM_SI_WRITE, CGEN_FN_MEM_DI_WRITE,
- CGEN_FN_MEM_DF_WRITE, CGEN_FN_MEM_XI_WRITE.
-
-1999-12-01 Dave Brolley <brolley@cygnus.com>
-
- * cgen-accfp.c (subsf): Check status code.
- (mulsf): Ditto.
- (negsf): Ditto.
- (abssf): Ditto.
- (sqrtsf): Ditto.
- (invsf): Ditto.
- (minsf): Ditto.
- (maxsf): Ditto.
- (subdf): Ditto.
- (muldf): Ditto.
- (divdf): Ditto.
- (negdf): Ditto.
- (absdf): Ditto.
- (sqrtdf): Ditto.
- (invdf): Ditto.
- (mindf): Ditto.
- (maxdf): Ditto.
-
-1999-11-26 Dave Brolley <brolley@cygnus.com>
-
- * cgen-par.h (fn_df_write): Mode of data is DF.
- (sim_queue_fn_df_write): Mode of data is DF.
- * cgen-par.c (sim_queue_fn_df_write): Mode of data is DF.
-
-1999-11-22 Dave Brolley <brolley@cygnus.com>
-
- * cgen-trace.c (SIZE_TRACE_BUF): Inxrease size of trace buffer.
- * cgen-par.h (CGEN_WRITE_QUEUE_SIZE): Increase size of queue.
-
-1999-11-04 Dave Brolley <brolley@cygnus.com>
-
- * cgen-par.h (cgen_write_queue_kind): Add CGEN_FN_XI_WRITE and
- CGEN_MEM_XI_WRITE members.
- (CGEN_WRITE_QUEUE_ELEMENT): Add fn_xi_write and mem_xi_write members.
- (sim_queue_fn_xi_write): New function.
- (sim_queue_mem_xi_write): New function.
-
- * cgen-par.c (sim_queue_fn_xi_write): New function.
- (sim_queue_mem_xi_write): New function.
- (cgen_write_queue_element_execute): Handle CGEN_FN_XI_WRITE and
- CGEN_MEM_XI_WRITE.
-
-1999-10-22 Dave Brolley <brolley@cygnus.com>
-
- * cgen-par.h (insn_address): New field in CGEN_WRITE_QUEUE_ELEMENT.
- (CGEN_WRITE_QUEUE_ELEMENT_IADDR): New macro.
- * cgen-par.c: Set insn_address for each queued write. Get pc from
- cpu when executing queued writes.
-
-1999-10-19 Dave Brolley <brolley@cygnus.com>
-
- * cgen-par.h (sim_queue_fn_pc_write): New function.
- (CGEN_FN_PC_WRITE): New enumerator.
- (fn_pc_write): New union member.
- * cgen-par.c (sim_queue_fn_pc_write): New function.
- (cgen_write_queue_element_execute): Handle CGEN_FN_PC_WRITE.
-
-1999-10-18 Dave Brolley <brolley@cygnus.com>
-
- * cgen-par.h (CGEN_MEM_DI_WRITE): New enumerator.
- (CGEN_MEM_DF_WRITE): New enumerator.
- (mem_di_write): New union member.
- (mem_df_write): New union member.
- * cgen-par.c (sim_queue_mem_di_write): New function.
- (sim_queue_mem_df_write): New function.
- (cgen_write_queue_element_execute): Handle CGEN_MEM_DI_WRITE and
- CGEN_MEM_DF_WRITE.
- * cgen-accfp.c (divsf): Check for division errors.
-
-1999-10-14 Doug Evans <devans@casey.cygnus.com>
-
- * cgen-engine.h (EXTRACT_INT,EXTRACT_UINT): Delete.
-
-1999-10-07 Dave Brolley <brolley@cygnus.com>
-
- * cgen-par.h (CGEN_FN_HI_WRITE): New enumerator.
- (fn_hi_write): New union member.
- (sim_queue_fn_hi_write): New function.
- * cgen-par.c (sim_queue_fn_hi_write): New function.
- (cgen_write_queue_element_execute): Handle CGEN_FN_HI_WRITE.
-
-1999-09-29 Doug Evans <devans@casey.cygnus.com>
-
- * cgen-defs.h (sim_engine_invalid_insn): New arg `vpc'.
- Change type of result to SEM_PC.
-
-Wed Sep 29 14:43:57 1999 Dave Brolley <brolley@cygnus.com>
-
- * cgen-defs.h (sim_engine_invalid_insn): Now returns PC.
-
-1999-09-25 Doug Evans <devans@casey.cygnus.com>
-
- * cgen-ops.h (SUBWORD*): Delete cpu arg.
- (JOIN*): Delete cpu arg.
-
-Tue Sep 21 17:14:16 1999 Dave Brolley <brolley@cygnus.com>
-
- * genmloop.sh (@cpu@_scache_lookup): No longer takes last_insn_p
- parameter.
- (SET_LAST_INSN_P): Set last_insn_p flag in the scache element.
-
-Mon Sep 20 21:44:06 1999 Geoffrey Keating <geoffk@cygnus.com>
-
- * sim-fpu.c (i2fpu): Keep the guard bits sticky when converting
- large values.
-
-Tue Feb 8 16:33:48 2000 Andrew Cagney <cagney@b1.cygnus.com>
-
- * run.c (main): Check the sim_stop_reason and only halt simulation
- when a valid stop condition is identified.
-
-Wed Sep 15 14:12:37 1999 Andrew Cagney <cagney@b1.cygnus.com>
-
- * hw-tree.c, hw-properties.c, hw-instances.c: Include "sim-io.h".
-
-Tue Sep 14 14:15:47 1999 Dave Brolley <brolley@cygnus.com>
-
- * cgen-par.h (CGEN_BI_WRITE): New enumerator.
- (bi_write): New union element.
- (sim_queue_bi_write): New function.
- * cgen-par.c (sim_queue_bi_write): New function.
- (cgen_write_queue_element_execute): Handle CGEN_BI_WRITE.
-
-Thu Sep 2 18:15:53 1999 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
- * aclocal.m4 (WERROR_CFLAGS, WARN_CFLAGS): Merge from
- ../gdb/configure.in.
- * Make-common.in (WERROR_CFLAGS, WARN_CFLAGS): Define.
- (SIM_WERROR_CFLAGS, SIM_WARN_CFLAGS): Define.
- (SIM_WARNINGS): Delete
- (CONFIG_CFLAGS): Update.
-
-Tue Aug 31 16:01:42 1999 Dave Brolley <brolley@cygnus.com>
-
- * cgen-par.c: New file.
- * cgen-par.h: New file.
- * cgen-sim.h (cgen-par.h): #include it.
- * cgen-cpu.h (write_queue): New field.
- (CPU_WRITE_QUEUE): New access macro.
- * Make-common.in (CGEN_MAIN_CPU_DEPS): Add cgen-par.h.
- (cgen-par.o): New target.
-
-1999-08-28 Doug Evans <devans@casey.cygnus.com>
-
- * cgen-types.h (mode_type,MODE_VOID): Renamed from MODE_VM.
- * cgen-utils.c (mode_names): Update.
-
-1999-08-20 Doug Evans <devans@casey.cygnus.com>
-
- * genmloop.sh: New args -parallel-generic-write, -parallel-only.
- * cgen-engine.h (SEMANTIC_FN): Don't use version with PAREXEC
- buffer arg if WITH_PARALLEL_GENWRITE.
- (struct insn_sem): Handle WITH_PARALLEL_GENWRITE.
- (struct idesc): Ditto.
-
-Wed Aug 18 18:17:28 1999 Doug Evans <devans@canuck.cygnus.com>
-
- * sim-model.c (model_option_handler): Add \n to error message.
-
-1999-08-08 Doug Evans <devans@casey.cygnus.com>
-
- * cgen-engine.h (SEM_FN_NAME,SEMF_FN_NAME): Delete.
- (insn_sem): Rewrite.
- (sem_fn_desc): New struct.
- (idesc): Rewrite.
- * genmloop.sh (scache case,@cpu@_scache_lookup): Profile scache hit,
- misses if ! FAST_P.
- (scache case): Split into non-parallel/parallel versions.
- (@cpu@_engine_run_{full,fast}): Call @cpu@_{sem,semf}_init_idesc_table
- if not use semantic switch version.
-
-1999-08-04 Doug Evans <devans@casey.cygnus.com>
-
- * cgen-defs.h (SEM_BRANCH_TYPE): New enum.
- * cgen-engine.h (SEM_BRANCH_UNTAKEN,SEM_BRANCH_UNCACHEABLE): Delete.
- (SEM_BRANCH_INIT_EXTRACT): Delete.
- (SEM_BRANCH_INIT): Replace npc_ptr with br_type.
- (SEM_BRANCH_FINI): Ditto.
- (SEM_BRANCH_VIA_ADDR): Ditto.
- (SEM_BRANCH_VIA_CACHE): Ditto. Delete cachvarptr arg.
- (SEM_BRANCH_ADDR_CACHE): Delete.
- (SEM_SKIP_COMPILE,SEM_SKIP_INSN): New macros.
- * cgen-scache.h (cpu_scache): Replace member pbb_pr_npc_ptr with
- pbb_br_type.
- * genmloop.sh (eng.hin): Update prototype of ${cpu}_pbb_cti_chain.
- (@cpu@_pbb_begin): Initialize branch_target.
- (@cpu@_pbb_cti_chain): Replace arg new_vpc_ptr with br_type.
- (@cpu@_engine_run_full): Replace local pbb_br_npc_ptr with
- pbb_br_type.
- (@cpu@_engine_run_fast): Ditto.
-
-Fri Jul 16 14:47:53 1999 Dave Brolley <brolley@cygnus.com>
-
- * cgen-utils.c (RORSI): New function.
- (ROLSI): New function.
-
-1999-07-14 Doug Evans <devans@casey.cygnus.com>
-
- * Makefile.in (TAGS): Tweak TAGS regex.
- * cgen-mem.h (*): Add TAGS markers.
-
-Sun Jul 11 23:47:20 1999 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-resume.c (sim_resume): Ensure that the siggnal [sic] is only
- passed in when sim_resume is first entered - don't re-pass it
- after a restart.
-
-Sun Jul 11 23:34:44 1999 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-options.c (standard_option_handler): Add OPTION_LOAD_VMA and
- OPTION_LOAD_LMA but only when is defined.
- (standard_options): When SIM_HANDLES_LMA is defined include
- options --load-lma and --load-vma.
- (standard_install): Initialize STATE_LOAD_AT_LMA_P.
-
- * sim-base.h (STATE_LOAD_AT_LMA_P): Define.
- (struct sim_state_base): Add load_at_lma_p.
- * sim-hload.c (sim_load): Replace SIM_HANDLES_LMA with
- STATE_LOAD_AT_LMA_P.
-
-Sun Jul 11 12:03:36 1999 Andrew Cagney <cagney@b1.cygnus.com>
-
- * nrun.c (main): Re-format loop gnu style.
-
-Wed Jul 7 19:56:03 1999 Andrew Cagney <cagney@b1.cygnus.com>
-
- * dv-sockser.c (connected_p): Initialize addrlen.
-
-1999-07-06 Dave Brolley <brolley@cygnus.com>
-
- * cgen-accfp.c (floatsidf): New function.
- (fixdfsi): New function.
-
-1999-07-06 Doug Evans <devans@casey.cygnus.com>
-
- * sim-model.c (sim_model_init): Issue error if machine is unsupported.
-
-1999-07-05 Doug Evans <devans@casey.cygnus.com>
-
- * Make-common.in (CGEN_MAIN_CPU_DEPS): Add cgen-fpu.h.
- (cgen-fpu.o,cgen-accfp.o): Add rules for.
- * cgen-fpu.c: New file.
- * cgen-fpu.h: New file.
- * cgen-accfp.c: New file.
- * cgen-cpu.h (CGEN_CPU): New member fpu.
- * cgen-mem.h: Redo fp support.
- * cgen-ops.h: Delete k&r support. Redo fp support.
- * cgen-sim.h: Include cgen-fpu.h.
- * cgen-types.h (SF,DF,XF,TF): Moved to cgen-fpu.h.
-
-1999-06-23 Doug Evans <devans@casey.cygnus.com>
-
- * cgen-engine.h (TARGET_SEM_BRANCH_FINI): Remove cruft at end of
- ifndef.
- * genmloop.sh (@cpu@_scache_lookup): Delete unused local var.
- (@cpu@_pbb_cti_chain): Minor clean up.
-
-1999-05-08 Felix Lee <flee@cygnus.com>
-
- * aclocal.m4: Use AC_EXEEXT instead of AM_EXEEXT. Delete defn of
- AM_CYGWIN32 and AM_EXEEXT.
- * configure: Regenerate.
-
-Fri Apr 16 16:43:22 1999 Doug Evans <devans@charmed.cygnus.com>
-
- * sim-core.c (device_error,device_io_read_buffer,
- device_io_write_buffer): Delete decls.
- * sim-core.h: Put them here.
-
- * sim-core.c (sim_core_read_buffer): Pass sd to device_io_read_buffer.
- (sim_core_write_buffer): Pass sd to device_io_write_buffer.
- * sim-n-core.h (sim_core_read_aligned_N): Ditto.
- (sim_core_write_aligned_N): Ditto.
-
-1999-04-14 Stephane Carrez <stcarrez@worldnet.fr>
-
- * sim-memopt.c (sim_memory_uninstall): Don't look into
- free()d memory.
-
-1999-04-14 Doug Evans <devans@casey.cygnus.com>
-
- * cgen-utils.scm (virtual_insn_entries): Update attribute definition.
-
-1999-04-13 Doug Evans <devans@casey.cygnus.com>
-
- * sim-core.c (sim_core_read_buffer): Handle NULL cpu when WITH_DEVICES.
- (sim_core_write_buffer): Ditto.
-
-1999-04-02 Keith Seitz <keiths@cygnus.com>
-
- * sim-io.c (sim_io_poll_quit): Only call the poll_quit callback
- after the interval counter has expired.
- (POLL_QUIT_INTERVAL): Define. Used to tweak the frequency of
- poll_quit callbacks. May be overridden by Makefile.
- (poll_quit_counter): New global.
- * sim-events.c: Remove all mentions of ui_loop_hook. The
- host callback "poll_quit" will serve the purpose.
- * run.c: Add definition of ui_loop_hook when NEED_UI_LOOP_HOOK
- is defined.
- * nrun.c: Remove declaration of ui_loop_hook.
-
-Wed Mar 31 18:55:41 1999 Doug Evans <devans@canuck.cygnus.com>
-
- * cgen-run.c (sim_resume): Don't tell main loop to run "forever"
- if being used by gdb.
-
-1999-03-22 Doug Evans <devans@casey.cygnus.com>
-
- * cgen-types.h (XF,TF): Tweak.
- * cgen-ops.h: Redo inline support. Delete DI_FN_SUPPORT,
- in cgen-types.h.
- (SUBWORD*,JOIN*): Define.
- * cgen-trace.c (sim_cgen_disassemble_insn): Update, base_insn_bitsize
- moved into cpu descriptor.
- * sim-model.h (MACH): New member `num'.
-
-1999-02-09 Doug Evans <devans@casey.cygnus.com>
-
- * cgen-cpu.h (CGEN_DISASSEMBLER): New type.
- (CGEN_CPU): Member opcode renamed to cpu_desc.
- New members get_idata,disassembler.
- * cgen-defs.h (CGEN_INSN_VIRTUAL_P): CGEN_INSN_ATTR renamed to
- CGEN_INSN_ATTR_VALUE.
- (CGEN_STATE): Delete member opcode_table.
- (sim_disassemble_insn): Delete decl.
- * cgen-engine.h (struct insn_sem): Moved to here from <cpu>-decode.c.
- (struct idesc): Moved to here from <cpu>-decode.h.
- * cgen-run.c (prime_cpu): Call prepare_run callback.
- * cgen-trace.h (SFILE): New type.
- (sim_disasm_sprintf): Declare.
- (sim_disasm_read_memory,sim_disasm_perror_memory): Declare.
- (sim_cgen_disassemble_insn): Declare.
- * cgen-trace.c: Include errno.h,dis-asm.h. Don't include cpu-opc.h.
- (insn_fields): Delete.
- (trace_insn_fini): STATE_OPCODE_TABLE (sd) replaced with
- CPU_CPU_DESC (cpu).
- (trace_insn): Call CPU_DISASSEMBLER hook.
- (sim_disasm_sprintf): New function.
- (sim_disasm_read_memory): New function.
- (sim_disasm_perror_memory): New function.
- (sim_cgen_disassemble_insn): New function.
- * cgen-utils.c: Don't include cpu-opc.h.
- (virtual_insn_entries): New static local.
- (cgen_virtual_insn_table): Renamed from cgen_virtual_opcode_table.
- (cgen_insn_name): Rewrite.
- (disasm_sprintf,sim_disassemble_insn): Moved to cgen-trace.c.
- * cgen.sh (desc): New file generator handler.
- * genmloop.sh: -parallel changed to -parallel-read/-parallel-write.
- Define WITH_PARALLEL_READ/WITH_PARALLEL_WRITE appropriately.
- Don't include cpu-opc.h,cpu-sim.h.
- * sim-model.c (model_set): Delete SIM_DESC arg.
- (sim_model_set): Update.
- * sim-model.h (MACH): New member prepare_run.
-
-1999-01-28 Frank Ch. Eigler <fche@cygnus.com>
-
- * sim-memopt.c (memory_option_handler): Avoid memset() calls
- if redundant with allocator functions.
-
-Wed Jan 27 17:19:09 1999 Doug Evans <devans@canuck.cygnus.com>
-
- * cgen-engine.h (EXTRACT_LSB0_{INT,UINT}): Fix.
-
- * sim-profile.h: Make like sim-trace.h.
- (PROFILE_USEFUL_MASK): New macro.
- * sim-profile.c (profile_options): Make like trace_options, allow
- optional on|off arg where applicable.
- (set_profile_option_mask): New function.
- (sim_profile_set_option): New function.
- (profile_option_handler): Simplify.
- Have -p only enable selected things, not everything.
- Add missing break to OPTION_PROFILE_PC_RANGE.
- * cgen-scache.c (scache_options): Allow optional on|off arg to
- --profile-scache.
- (scache_option_handler): Use sim_profile_set_option.
-
-1999-01-26 Frank Ch. Eigler <fche@cygnus.com>
-
- * sim-memopt.c (memory_options): Add MEMORY_FILL option.
- (memory_option_handler): Implement MEMORY_FILL option. Make
- MEMORY_CLEAR an alias for MEMORY_FILL=0.
- (parse_ulong_value): New function.
- (do_memopt_add): Allocate all buffers. Optionally fill them.
-
-1999-01-15 Richard Henderson <rth@cygnus.com>
-
- * hw-events.c (hw_event_queue_schedule): _vtracef takes a
- va_list, not an integer.
- * sim-events.c (sim_events_schedule): Likewise.
-
- * sim-types.h (UNSIGNED32, UNSIGNED64): Properly cast to
- the appropriate type.
-
-1999-01-14 Doug Evans <devans@casey.cygnus.com>
-
- * cgen-defs.h (PCADDR,CIA): Define in terms of IADDR.
- (sim_disassemble_insn): Update prototype.
- (sim_engine_invalid_insn): Ditto.
- * cgen-engine.h (SEMANTIC_FN): Add !WITH_SCACHE version.
- (SEM_BRANCH_INIT): PCADDR->IADDR.
- (SEM_NBRANCH_FINI): New macro for !WITH_SCACHE case.
- * cgen-scache.c (scache_lookup,scache_lookup_or_alloc): PCADDR->IADDR.
- * cgen-scache.h (*): Ditto.
- * cgen-trace.c (*): Ditto.
- * cgen-trace.h (*): Ditto.
- * cgen-utils.c (*): Ditto.
- * cgen-types.h (integer modes): Use signedNN/unsignedNN types.
- (insn_t): Delete.
- * genmloop.sh (@cpu@_fill_argbuf): Add !WITH_SCACHE support.
- (simple engine framework): Rewrite.
- * sim-module.c (modules): Install model module sooner (and in
- particular before the profile module).
-
-1999-01-12 Doug Evans <devans@casey.cygnus.com>
-
- * sim-model.h (sim_mach_lookup_bfd_name): Add prototype.
- * sim-model.c (sim_mach_lookup_bfd_name): New function.
- (sim_model_init): Call it.
-
- * cgen-trace.c (trace_insn): Pass pc to trace_prefix for virtual insns.
-
-1999-01-05 Doug Evans <devans@casey.cygnus.com>
-
- * Make-common.in (CGEN_INCLUDE_DEPS): Add cgen-defs.h, cgen-engine.h.
- * cgen-engine.h (SEM_BRANCH_FINI): New arg pcvar, all uses updated.
- (SEM_BRANCH_INIT_EXTRACT): New macro.
- (SEM_BRANCH_INIT): Add taken_p.
- (TARGET_SEM_BRANCH_FINI): Provide default definition.
- (SEM_BRANCH_FINI): Use it.
- (SEM_INSN): Update.
- * cgen-run.c (sim_resume): Handle tracing of last insn.
- * cgen-scache.h (WITH_SCACHE): Define as 0 if not defined.
- * cgen-trace.c (current_abuf): New static global.
- (trace_insn_init): Initialize it.
- (trace_insn_fini): Use it.
- (trace_insn): Set it.
- * cgen.sh (arch case): Pass -m ${mach} to cgen.
- * genmloop.sh (@cpu@_emit_before): Only define if WITH_SCACHE_PBB.
- (@cpu@_emit_after): Ditto.
- (simple @cpu@_engine_run_full): New local `pc'. Initialize semantic
- labels if WITH_SEM_SWITCH_FULL.
- * sim-model.c: Include bfd.h.
- (sim_model_init): New function.
- (sim_model_install): Record init fn.
- * sim-model.h (MACH): New member bfd_name.
- * sim-module.c (modules): Initialize model before scache.
-
-1998-12-24 Frank Ch. Eigler <fche@cygnus.com>
-
- * dv-sockser.c (DEFAULT_TIMEOUT): Increase to 1 ms.
-
- * nrun.c (main): Remain in simulation loop for traps and
- exceptions when in operating environment mode.
- (ui_loop_hook): New stub hook for standalone use.
- * sim-events.c (sim_events_process): Call ui_loop_hook
- periodically on CYGWIN host.
-
- * sim-reason.c (sim_stop_reason): Return host signal numbers
- to gdb on sim_stopped and sim_signalled cases.
- * sim-engine.c (sim_engine_halt): Call SIM_CPU_EXCEPTION_SUSPEND
- hook just before longjmp.
- * sim-resume.c (sim_resume): Call SIM_CPU_EXCEPTION_RESUME
- hook just before sim_engine_run.
-
- * sim-n-core.h (sim_core_trace_M): Allay const warning.
- * sim-trace.h (trace_generic): Ditto.
- * sim-trace.c (trace_generic): Ditto.
-
-1998-12-14 Doug Evans <devans@casey.cygnus.com>
-
- * Make-common.in (SIM_MAIN_DEPS): New var.
- (CGEN_MAIN_CPU_DEPS): New var.
- * aclocal.m4: Add --enable-cgen-maint option.
- * cgen-mem.h (GETMEM*): New arg `pc'. Pass to sim_core routine.
- (SETMEM*): Ditto.
- (GETIMEM*): Pass pc value to sim_core routine.
-
-Fri Dec 11 16:58:36 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * hw-handles.c (hw_handle_add_ihandle, hw_handle_add_phandle):
- Compare with ZERO not NULL.
-
-Thu Dec 10 14:14:39 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * hw-properties.c, hw-instances.c, hw-tree.c: Include
- "sim-assert.h".
-
-1998-12-09 Doug Evans <devans@casey.cygnus.com>
-
- * sim-arange.c: Include libiberty.h, and stdlib.h if present.
- * sim-trace.c: Include stdlib.h if present.
- * dv-sockser.c: Include unistd.h if present.
- (dv_sockser_init): Add missing arg to call to sim_io_eprintf.
- * cgen-scache.c (scache_flush): Delete unused locals i,sc.
-
-1998-12-08 James E Wilson <wilson@wilson-pc.cygnus.com>
-
- * gennltvals.sh: Add i960.
- * nltvals.def: Rebuild.
-
-1998-12-04 Doug Evans <devans@casey.cygnus.com>
-
- * cgen-defs.h: New file, old cgen-sim.h.
- * cgen-sim.h: Simple header that includes others.
- * sim-arange.c: New file.
- * sim-arange.h: New file.
- * sim-basics.h: Include it.
- * Make-common.in (SIM_NEW_COMMON_OBJS): Add sim-arange.o.
- (sim-arange.o): Add rule for.
- * sim-cpu.h (sim_cpu_msg_prefix): Add prototype.
- (sim_io_eprintf_cpu): Add prototype.
- * sim-inline.h (HAVE_INLINE): Define if GNUC.
- (INLINE2): New macro.
- (EXTERN_INLINE): New macro.
- * sim-module.c (sim_post_argv_init): Initialize cpu backlink
- before calling module init fns.
- * sim-profile.c (OPTION_PROFILE_*): Move into enum.
- (profile_init): New function.
- (profile_options): New option --profile-range.
- (profile_option_handler): Handle --profile-range.
- (profile_print_insn): Qualify address range specific section titles.
- (profile_print_addr_ranges): New function.
- (profile_info): Print address ranges if specified.
- (profile_install): Set profile_init init fn.
- * sim-profile.h (PROFILE_DATA): New member `range'.
- * sim-trace.c (trace_init): New function.
- (trace_options): New option --trace-range.
- (trace_option_handler): Handle --trace-range.
- (trace_install): Set trace_init init fn.
- * sim-trace.h (TRACE_DATA): New member `range'.
- * sim-utils.c (sim_cpu_msg_prefix): New function.
- (sim_io_eprintf_cpu): New function.
- * cgen-engine.h (PC_IN_TRACE_RANGE_P): New macro.
- (PC_IN_PROFILE_RANGE_P): New macro.
- * cgen-trace.c (trace_insn_init): Set current_insn to NULL.
- (trace_insn_fini): New arg abuf. All callers updated.
- Exit early if trace_insn not called. Check ARGBUF_PROFILE_P before
- printing cycle counts.
- * cgen-trace.h (trace_insn_fini): Update prototype.
- (TRACE_RESULT_P): New macro.
- (TRACE_INSN_INIT,TRACE_INSN_FINI): New arg abuf. All callers updated.
- (TRACE_INSN): Check ARGBUF_TRACE_P.
- (TRACE_EXTRACT,TRACE_RESULT): New arg abuf. All callers updated.
- * cgen-types.h (SIM_INLINE): Delete.
- (SIM_HAVE_MODEL,SIM_HAVE_ADDR_RANGE): Define.
- * cgen-utils.c: Don't include cgen-engine.h
- * genmloop.sh (@cpu@_fill_argbuf): New function.
- (@cpu@_fill_argbuf_tp): New function.
- (@cpu@_emit_before,@cpu@_emit_after): New functions.
- (@cpu@_pbb_begin): Prefix cti_sc,insn_count with '_'.
- (SET_CTI_VPC,SET_INSN_COUNT): Update.
- (@cpu@_pbb_before): Check ARGBUF_PROFILE_P before calling
- doing profiling. Update call to TRACE_INSN_INIT,TRACE_INSN_FINI.
- (@cpu@_pbb_after): Check ARGBUF_PROFILE_P before calling
- doing profiling. Update call to TRACE_INSN_FINI.
-
- * sim-memopt.c (sim_memory_uninstall): Result type is `void'.
-
-1998-12-03 Frank Ch. Eigler <fche@cygnus.com>
-
- * sim-memopt.c (sim_memory_uninstall): Deallocate all memory
- regions.
-
-1998-12-01 Doug Evans <devans@casey.cygnus.com>
-
- * sim-inline.c (SIM_INLINE_P): Fix typo.
-
-1998-11-30 Doug Evans <devans@casey.cygnus.com>
-
- * cgen-utils.c (cgen_virtual_opcode_table): Update.
-
-Tue Nov 24 18:40:03 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * gennltvals.sh: Add v850 and d10v. Sort alphabetically.
- * nltvals.def: Re-generate.
-
-Mon Nov 23 13:28:38 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-core.c (reverse_n, sim_core_uninstall, sim_core_init,
- sim_core_map_attach, sim_core_map_detach, next_event_queue,
- new_sim_core_mapping): Only define when EXTERN_SIM_CORE_P, pacify
- GCC.
- * sim-events.c (sim_events_uninstall, sim_events_suspend,
- sim_events_resume, sim_events_zalloc, insert_sim_event): Ditto.
-
-1998-11-22 Doug Evans <devans@tobor.to.cygnus.com>
-
- * genmloop.sh (${cpu}_pbb_chain): Watch for Ctrl-C's.
- (${cpu}_pbb_cti_chain): Ditto.
-
-1998-11-18 Doug Evans <devans@casey.cygnus.com>
-
- * Make-common.in (cgen-utils.o): Depend on cgen-engine.h.
- * cgen-engine.h (EXTRACT_[ML]SB0_{INT,UINT}): New macros.
- (EXTRACT_INT,EXTRACT_UINT): New macros.
- (SEM_SEM_ARG): New macro.
- (SEM_NEXT_VPC): New arg `pc'.
- * cgen-sim.h (EXTRACT_SIGNED,EXTRACT_UNSIGNED): Delete.
- (sim_disassemble_insn): Update prototype.
- * cgen-trace.c (current_insn,insn_fields): New static locals.
- (trace_insn): Set them.
- * cgen-utils.c: #include cgen-engine.h.
- (sim_disassemble_insn): New arg insn_fields.
- Handle variable length insns.
- * genmloop.sh: Only emit pbb decls if -pbb.
- (${cpu}_scache_lookup): New arg `vpc'.
- (scache support): Fetch pc before entering loop.
-
- * gennltvals.sh: Add fr30 support.
- * nltvals.def: Rebuild.
-
-Wed Nov 18 10:22:22 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-types.h: Re-do type system so that GCC's attribute and mode
- are used to specify types. Handle case of ALPHA.
-
-1998-11-13 Frank Ch. Eigler <fche@elastic.org>
-
- * aclocal.m4: Add tests for dlopen family.
- * config.in: Regenerated.
-
-Wed Nov 11 14:02:25 1998 Doug Evans <devans@canuck.cygnus.com>
-
- * sim-hload.c (sim_load): Pass `prog_name' to sim_load_file, not NULL.
-
-Wed Nov 4 23:51:19 1998 Doug Evans <devans@seba.cygnus.com>
-
- * genmloop.sh (eng.hin): Rename HAVE_PARALLEL_EXEC to
- HAVE_PARALLEL_INSNS, define as 0 or 1. Emit decls of fns in mloop.cin.
- * cgen-engine.h: Typedefs of IADDR,CIA,SEM_ARG,SEM_PC moved ...
- * cgen-sim.h: ... to here.
-
-Wed Oct 28 12:00:57 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * aclocal.m4 (enable-build-warnings): Replace
- enable-sim-warnings. Extend =LIST syntax so that prepend and
- append of options is possible. Drop -Werror, add
- -Wstrict-prototypes for GDB compatibility.
- * Make-common.in (SIM_WARNINGS): Update.
-
-Mon Oct 19 13:56:32 1998 Doug Evans <devans@seba.cygnus.com>
-
- * Make-common.in (CGEN_INCLUDE_DEPS): Define.
- (sim-core.o): Delete duplicate dependence on $(SIM_EXTRA_DEPS).
- (sim-cpu.o,sim-endian.o,sim-hw.o): Ditto.
- (cgen-run.o,cgen-scache.o,cgen-trace.o,cgen-utils.o): Delete
- explicit cgen header dependencies, require SIM_EXTRA_DEPS to include
- CGEN_INCLUDE_DEPS.
- * cgen-cpu.h: New file.
- * cgen-engine.h: New file.
- * cgen-scache.h: New file.
- * cgen-sim.h: Delete portions moved to new files.
- * genmloop.sh: Generate two files eng.hin,mloop.cin explicitly,
- rather than sending result to stdout.
-
-Fri Oct 9 14:20:22 1998 Doug Evans <devans@seba.cygnus.com>
-
- * Make-common.in (sim-reg.o): New rule.
- (cgen-run.o): New rule.
- * cgen-ops.h: Delete many BI macros. Change all UBI -> BI.
- * cgen-run.c (prime_cpu): New function.
- * cgen-scache.c: Add pseudo-basic-block (pbb) scaching support.
- (scache_option_handler, case OPTION_PROFILE_SCACHE): Handle explicitly
- mentioned cpu.
- (scache_flush_cpu,scache_lookup,scache_lookup_or_alloc): New fns.
- * cgen-sim.h (CGEN_INSN_VIRTUAL_TYPE): New enum.
- (CGEN_INSN_VIRTUAL_P): New macro.
- (SEM_PC): New typedef.
- (SEMANTIC_FN): Change type of result to SEM_PC.
- (SEM_SET_FULL_CODE,SEM_SET_FAST_CODE,SEM_SET_CODE): New macros.
- (IDESC_CTI_P,IDESC_SKIP_P): New macros.
- (SCACHE_MAP): New typedef.
- (CPU_SCACHE): Add pbb support.
- (scace_lookup,scache_lookup_or_alloc,scache_flush_cpu): Declare.
- (SEM_BRANCH_INIT_EXTRACT,SEM_BRANCH_INIT,SEM_BRANCH_FINI): New macros.
- (CGEN_CPU): New members running_p,insn_count,{fast,full}_engine_fn,
- max_slice_insns.
- (INSN_NAME): Delete.
- (cgen_insn_name): Declare.
- (sim_engine_invalid_insn): Renamed from sim_engine_illegal_insn.
- * cgen-trace.c (trace_buf): Shrink from 1024 to 256 bytes.
- (first_insn_p): Make static.
- (trace_insn): Handle virtual insns specially.
- (cgen_trace_printf): Ensure we haven't overflowed the buffer.
- * cgen-types.h (UBI): Delete.
- (MODE_TYPE): New enum.
- (HOSTINT,HOSTUINT,HOSTPTR): Delete.
- * cgen-utils.c (mode_names): Delete UBI. Add INT,UINT,PTR.
- (cgen_virtual_opcode_table): New global.
- (cgen_insn_name): New function.
- (sim_disassemble_insn): Ignore virtual insns.
- * genmloop.sh: Delete top level loop generation. Add pbb support.
- * sim-cpu.h (CPU_INSN_NAME_FN): New typedef.
- (sim_cpu_base): New members max_insns,insn_name,model_data.
- (CPU_PC_GET,CPU_PC_SET): New macros.
- (sim_pc_get,sim_pc_set): Declare.
- * sim-model.c (model_set): Call model init fn.
- * sim-model.h (MODEL_FN): New typedef.
- (INSN_TIMING): New member model_fn.
- (MODEL): New members num,init.
- * sim-profile.c (sim_profile_print_bar): Renamed from print_bar.
- All callers updated.
- (profile_insn_init): New fn.
- (profile_print_insn): Update, INSN_NAME -> CPU_INSN_NAME.
- Exit early if insn profiling not supported.
- (profile_print_memory): Update, MAX_MODES -> MODE_TARGET_MAX.
- (profile_install): Record profile_insn_init as init fn.
- (profile_uninstall): Free PROFILE_INSN_COUNT if non-null.
- * sim-profile.h: Update, MAX_MODES -> MODE_TARGET_MAX.
- (PROFILE_DATA): Delete member exec_time.
- Change insn_count to pointer to array, rather than the array.
- (sim_profile_print_bar): Declare.
-
-Wed Oct 7 16:56:42 1998 Doug Evans <devans@seba.cygnus.com>
-
- * cgen-run.c: New file.
- * sim-reg.c: New file.
-
-Mon Sep 14 10:58:19 1998 Frank Ch. Eigler <fche@cygnus.com>
-
- * aclocal.m4: Add checks for -lsocket and -lnsl.
-
- * dv-sockser.c (dv_sockser_init): Use SO_REUSEADDR to
- allow local port reuse on listening socket.
-
-Tue Sep 1 15:36:52 1998 Frank Ch. Eigler <fche@cygnus.com>
-
- * sim-config.h: Remove reference to linux kernel header.
-
-Tue Aug 25 12:45:27 1998 Frank Ch. Eigler <fche@cygnus.com>
-
- * dv-sockser.c (sockser_addr): Make variable non-static.
-
-Mon Aug 24 11:47:37 1998 Joyce Janczyn <janczyn@cygnus.com>
-
- * sim-hw.{c,h} (sim_hw_parse): Return struct hw pointer.
-
-Tue Aug 11 18:12:19 1998 Doug Evans <devans@canuck.cygnus.com>
-
- * sim-events.c (sim_events_elapsed_time): Fix calculation.
-
-Tue Aug 4 20:36:46 1998 Jeff Holcomb <jeffh@cygnus.com>
-
- * Make-common.in (install-common): Add $(EXEEXT) when installing
- run.
-
-Mon Aug 3 11:46:01 1998 Doug Evans <devans@seba.cygnus.com>
-
- * cgen-sim.h (cgen_state): New member opcode_table.
- * cgen-utils.c (sim_disassemble_insn): Use it.
-
-Fri Jul 24 10:14:18 1998 Doug Evans <devans@canuck.cygnus.com>
-
- * cgen-mem.h (DECLARE_SETT): Fix return type.
- * cgen-sim.h (sim_engine_illegal_insn): Declare.
- * cgen-scache.c: Include stdlib.h.
- * cgen-trace.c (trace_extract): Use %lx for PCADDR.
- * sim-model.c (model_option_handler): Remove unused variable `n'.
-
-Tue Jul 21 16:27:43 1998 Doug Evans <devans@seba.cygnus.com>
-
- * cgen-utils.c: Include bfd.h.
- (sim_disassemble_insn): Update call to CGEN_EXTRACT_FN.
-
-Wed Jul 8 18:24:10 1998 Jeffrey A Law (law@cygnus.com)
-
- * sim-bits.h (EXTEND24): Fix typo.
-
-Wed Jul 8 17:41:47 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-events.c (ETRACE_P): New macro.
- (struct _sim_event): Add member trace.
- (sim_events_free): Reclaim trace message.
-
- * sim-events.c, sim-events.h (sim_events_schedule_vtracef,
- sim_events_schedule_tracef): New functions, include printf trace
- information in argument list. If tracing, store asprintf'd trace
- message in sim_event.
-
- * hw-events.c, hw-events.h (hw_event_queue_schedule_tracef,
- hw_event_queue_schedule_vtracef): New functions, mimic
- sim_event_tracef.
-
-Mon Jul 6 15:51:14 1998 Jeffrey A Law (law@cygnus.com)
-
- * sim-bits.h (EXTEND24): Define.
-
-Thu Jul 2 17:13:25 1998 Doug Evans <devans@seba.cygnus.com>
-
- * cgen-sim.h (CPU_SCACHE): Make size unsigned.
- (CPU_SCACHE_HASH_MASK): New macro.
- (SCACHE_HASH_PC): Rewrite.
- * genmloop.sh (engine_resume_{full,fast}): Move some of hash
- computation out of main loop.
-
-Wed Jul 1 16:44:12 1998 Doug Evans <devans@seba.cygnus.com>
-
- * cgen-sim.h (RECORD_IADDR): Delete.
- * cgen-types.h (HOSTINT,HOSTUINT,HOSTPTR): New types.
- * genmloop.sh (engine_resume_{full,fast}): Delete icount.
-
-Wed Jun 17 12:25:08 1998 Mark Alexander <marka@cygnus.com>
-
- * gennltvals.def (mn10200): Add entry.
- * nltvals.def: Regenerate with MN10200 additions.
-
-Wed Jun 17 13:18:28 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-inline.h (EXTERN_*): Replace with EXTERN_*_P. Correct
- documentation on how it works.
-
- * sim-core.h, sim-core.c (sim_core_install, sim_core_attach,
- sim_core_detach, sim_core_read_buffer, sim_core_write_buffer,
- sim_core_set_xor, sim_core_xor_read_buffer,
- sim_core_xor_write_buffer): Update.
-
- * sim-events.h, sim-events.c (sim_events_install,
- sim_events_watch_clock, sim_events_schedule_after_signal,
- sim_events_schedule, sim_events_watch_sim, sim_events_watch_core,
- sim_events_deschedule): Update.
-
- * sim-fpu.h, sim-fpu.c (sim_fpu_zero, sim_fpu_one, sim_fpu_two,
- sim_fpu_max32, sim_fpu_max64): Update.
-
-Sat Jun 13 07:45:38 1998 Doug Evans <devans@fallis.cygnus.com>
-
- * cgen-trace.c (trace_insn_fini): Redo cycle handling.
- * sim-profile.h (PROFILE_DATA): Rename cycle handling members.
- * sim-profile.c (profile_print_model): Update.
-
-Fri Jun 12 18:35:07 1998 Doug Evans <devans@seba.cygnus.com>
-
- * gennltvals.def (m32r): Use common syscall.h now.
- (mn10300): Add entry.
- * nltvals.def: Regenerate.
-
- * sim-engine.c (sim_engine_get_run_state): New function.
- * sim-engine.h (sim_engine_get_run_state): Declare it.
-
-Thu Jun 11 00:50:03 1998 Doug Evans <devans@seba.cygnus.com>
-
- * sim-core.h (SIM_CORE_SIGNAL_FN): New typedef.
- * sim-core.c (sim_core_signal): Make extern, always define.
-
-Wed Jun 10 16:02:29 1998 Doug Evans <devans@seba.cygnus.com>
-
- * Make-common.in (CGEN_FLAGS_TO_PASS): New variable.
- * cgen-ops.h (ANDIF): New macro.
- (ANDIF[BQHSD]I): Delete.
-
-Thu Jun 4 13:53:54 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * hw-events.c (create_hw_event, delete_hw_event): Delete.
- (hw_event_queue_schedule, hw_event_queue_deschedule,
- bounce_hw_event): Fix hw-event memory corruptions found by Joyce
- Janczyn.
-
- * hw-alloc.h (HW_NZALLOC): Define.
-
- * Make-common.in (test-hw-events): Add target for testing the
- hw-event code.
-
-Mon May 25 21:11:26 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * Make-common.in (SIM_COMMON_HW_OBJS): Add hw-handles.o and
- hw-instances.o.
- hw-handles.c, hw-instances.c, hw-handles.h, hw-instances.h: New
- files.
- * hw-main.h: Include hw-handles.h, hw-instances.h.
- * hw-base.h ({create,delete}_hw_{handles,instances}_data): Declare
- * hw-base.c (hw_create, hw_delete): Call same.
-
-Mon May 25 18:55:35 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * dv-core.c: Include hw-main.h and sim-main.h.
- * dv-pal.c: Include hw-main.h and sim-io.h.
- * dv-glue.c: Include hw-main.h.
-
- * hw-main.h: New file. Move list of includes to here.
- * hw-base.h: From here.
- * Make-common.in (hw_base_headers): Rename to hw_main_headers.
- (hw-*.o, dv-*.o): Update.
- * hw-tree.c, hw-base.c, hw-properties.c, hw-ports.c, hw-device.c,
- hw-events.c, hw-alloc.c, sim-hw.c: Include hw-main.h instead of
- sim-main.h.
-
- * hw-base.h (do_hw_attach_regs, do_hw_poll_read_method,
- do_hw_poll_read): Move declarations from here.
- * hw-main.h: To here.
-
- * hw-base.h (struct hw_device_descriptor, hw_finish_callback):
- Move from here.
- * hw-main.h (struct hw_descriptor, hw_finish_method): To here,
- rename.
- * Make-common.in (hw-config.h): Update
- * hw-base.c, dv-pal.c, dv-glue.c: Update
-
- * dv-glue.c, hw-device.h, hw-base.h, hw-ports.c: Rename
- `*_callback' to `*_method.
-
-Mon May 25 18:41:18 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * hw-base.h (set_*): Move set method macros from here.
- * hw-device.h: To here.
-
-Mon May 25 18:21:38 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * hw-base.h (create_hw_property_data, delete_hw_property_data):
- Declare.
-
- * hw-base.c (hw_create, hw_delete): Call
- * hw-properties.c (create_hw_property_data,
- delete_hw_property_data): Define.
-
-Mon May 25 17:40:46 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * hw-device.c, hw-properties.c: Include hw-base.h
-
- * hw-alloc.h, hw-alloc.c: New files. Move alloc code to here.
- * hw-device.c: From here.
- * hw-base.h: Include "hw-events.h".
-
- * hw-base.h (create_hw_alloc_data, delete_hw_alloc_data): Declare.
- * hw-base.c (hw_create, hw_delete): Call.
- * hw-alloc.c (create_hw_alloc_data, delete_hw_alloc_data): Define.
-
- * Make-common.in (SIM_NEW_COMMON_OBJS): Add hw-alloc.o.
- (hw-alloc.o): New target.
-
-Mon May 25 17:14:27 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * hw-events.h, hw-events.c: New files. Move event code to here.
- * sim-hw.c: From here.
- * hw-base.h: Include "hw-events.h".
- * Make-common.in (SIM_NEW_COMMON_OBJS): Add hw-events.o.
- (hw-events.o): New target.
-
- * hw-device.h (struct hw): Add struct hw_event_data events_of_hw.
- * hw-events.h (struct hw_event): Replace typedef hw_event.
-
- * hw-base.h (create_hw_event_data, delete_hw_event_data): Declare.
- * hw-base.c (hw_create, hw_delete): Call.
- * hw-events.c (create_hw_event_data, delete_hw_event_data): Define.
-
- * dv-pal.c: Update.
-
-Mon May 25 16:55:16 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * hw-base.c (panic_hw_port_event, empty_hw_ports): Move from here.
- * hw-ports.c: To here.
-
- * hw-base.h, hw-ports.c (create_hw_port_data,
- delete_hw_port_data): New functions.
- * hw-base.c (hw_delete, hw_create): Call same.
-
- * hw-base.h (set_hw_ports, set_hw_port_event): Move set functions
- from here.
- * hw-ports.h: To here.
-
-Mon May 25 16:42:48 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * hw-device.c (hw_ioctl), hw-device.h (hw_ioctl_callback): Drop
- PROCESSOR and CIA arguments.
-
-Fri May 22 12:16:27 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * aclocal.m4 (SIM_AC_OPTION_HW): Add enable / disable argument.
- Move common object files from here.
- * Make-common.in (SIM_COMMON_HW_OBJS): To here.
-
-Thu May 21 17:57:16 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-hw.c: Include ctype.h.
- (do_hw_poll_read): Do not assume EAGAIN.
-
-Wed May 20 04:37:57 1998 Doug Evans <devans@seba.cygnus.com>
-
- * cgen-trace.c (first_insn_p): New static local.
- (trace_insn_init): Set it.
- (trace_insn_fini): Use TRACE_PREFIX.
- (trace_insn): Rewrite to use trace_prefix.
- * sim-trace.c (trace_prefix): Don't print filename arg if NULL.
- Adjust width accordingly.
-
- * sim-profile.h (PROFILE_DATA): New member profile_any_p.
- (PROFILE_ANY_P,PROFILE_INSN_P,PROFILE_MEMORY): New macros.
- (PROFILE_SCACHE_P,PROFILE_PC_P,PROFILE_CORE_P): New macros.
- (PROFILE_COUNT_INSN,PROFILE_COUNT_READ,PROFILE_COUNT_WRITE): Simplify.
- (PROFILE_COUNT_CORE): Simplify.
- * sim-profile.c (profile_option_handler): Compute profile_any_p.
-
-Tue May 19 23:55:30 1998 Doug Evans <devans@seba.cygnus.com>
-
- * cgen-ops.h (ADDCFSI): Fix typo.
-
-Sat May 16 12:44:52 1998 Doug Evans <devans@seba.cygnus.com>
-
- * cgen-sim.h (CGEN_CPU): New members idesc_{read,sem}_init_p.
- * genmloop.sh: Use them rather than static locals.
-
- * sim-engine.c (sim_engine_set_run_state): New function.
- * sim-engine.h (sim_engine_set_run_state): Declare.
- * genmloop.sh (pending_reason,pending_sigrc): New static locals.
- (@cpu@_engine_stop): New args reason,sigrc. All callers updated.
- (engine_resume): Reorganize. Allow synchronous exit from main loop.
-
-Fri May 15 16:06:05 1998 Doug Evans <devans@seba.cygnus.com>
-
- * cgen-trace.c (trace_insn_init): New arg first_p.
- All callers updated.
- (trace_insn_fini): New arg last_p. All callers updated.
- * cgen-trace.h (trace_insn_init,trace_insn_fini): Update.
- (TRACE_INSN_INIT,TRACE_INSN_FINI): Update.
- * genmloop.sh (engine_resume): Update.
-
-Fri May 15 15:59:00 1998 Joyce Janczyn <janczyn@cygnus.com>
-
- * Make-common.in (install-common): Run ranlib on installed copy of
- libsim.a.
-
-Fri May 15 15:03:00 1998 Joyce Janczyn <janczyn@cygnus.com>
-
- * Make-common.in (install-common): Rename and install libsim.a.
-
-Tue May 12 15:23:57 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-io.c (unistd.h): Include.
-
-Wed May 6 16:04:18 1998 Doug Evans <devans@seba.cygnus.com>
-
- * Make-common (sim_main_headers): Sort.
- (cgen-*.o): Add cgen-sim.h dependency.
-
- * cgen-scache.c (scache_init): Only allocate space if scache element
- size is non-zero.
- (scache_flush,scache_print_profile): Check if scache in use first.
-
- * cgen-sim.h (IDESC): Provide forward declaration.
- (DECODE): Delete.
- (CGEN_CPU): Always define scache member. New members idesc,opcode.
- (cgen_cpu_max_extra_bytes): Declare.
- * cgen-utils.c (cgen_cpu_max_extra_bytes): New function.
-
- * sim-cpu.h: New file. sim_cpu_base moved here.
- Move sim_cpu_lookup decl here.
- * sim-base.h: #include "sim-cpu.h".
- * sim-cpu.c: New file.
- * Make-common (sim_main_headers): Add sim-cpu.h.
- (sim-cpu.o): Add rule for.
-
- * sim-model.c (set_model): Delete.
- (sim_model_set,model_set): New functions.
- (sim_model_install): Renamed from model_install.
- Don't set default model here.
- (model_option_handler): Rewrite --model processing.
- (sim_model_lookup,sim_mach_lookup): New functions.
- * sim-model.h (MAX_MODELS,MAX_INSNS): Delete.
- (insn_timing): Delete.
- (INSN_TIMING): New member `num'.
- (IMP_PROPERTIES): Always define scache_elm_size member.
- (MACH): New member init_cpu.
- (sim_machs): Renamed from machs.
- (sim_model_install): Renamed from model_install.
- (sim_model_set,sim_model_lookup,sim_mach_lookup): Declare.
- * sim-module.c (modules): Update.
-
- * sim-profile.c (profile_print_insn): Add cpu arg to INSN_NAME macro.
-
- * sim-io.c: #include <errno.h>.
-
-Wed May 6 12:39:15 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * dv-pal.c (struct hw_pal_device): Add reader.
- (hw_pal_finish): Initialize reader.
- (scan_hw_pal): Use reader.
-
- * hw-base.h, sim-hw.c (do_hw_poll_read): New function.
- (HW_IO_EOF, HW_IO_NOT_READY): Define.
- * dv-pal.c: Use.
-
- * sim-io.h, sim-io.c (sim_io_poll_read): New function. Copy from
- ../ppc/main.c sim_io_read_stdin.
-
-Fri May 1 12:11:02 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * hw-tree.h (hw_tree_print): Paramaterize with print and file
- arguments.
- * hw-tree.c: Update.
-
- * hw-base.h (hw_port_event_callback): Delete CPU/CIA args.
- * hw-device.h (hw_io_read_buffer, hw_io_write_buffer): Delete
- CPU/CIA args.
- * hw-ports.h (hw_port_event): Ditto.
- * hw-ports.c (hw_port_event): Update.
- * hw-base.c (panic_hw_io_read_buffer, panic_hw_io_write_buffer):
- Update.
- * dv-pal.c (hw_pal_io_read_buffer, hw_pal_io_write_buffer):
- Update.
- (hw_pal_io_write_buffer): Call hw_halt not sim_engine_halt.
- (do_counter_event): Update.
- * dv-glue.c (hw_glue_io_read_buffer): Update.
- (hw_glue_port_event): Update.
-
- * hw-device.h (SIM_DESC): Replace with struct sim_state.
- * hw-base.h (hw_create): Ditto.
- * hw-base.c (hw_create): Ditto.
-
- * hw-device.c (hw_abort, hw_trace, hw_hw_event_queue_schedule,
- hw_event_queue_deschedule, hw_event_queue_time): Delete, moved
- from here to.
- * sim-hw.c: Here.
- * hw-device.h (hw_system_cpu): Declare.
- * sim-hw.c (hw_system_cpu): New function.
-
- * sim-core.c (sim_core_map_attach, sim_core_attach): Call
- sim_hw_abort not hw_abort.
- (sim-hw.h): Include.
- (sim_core_read_buffer, sim_core_write_buffer): Call
- sim_hw_io_read_buffer and sim_hw_io_write_buffer. Do not pass CPU
- argument.
- (sim_core_set_xor): Do not pass CPU when aborting.
-
- * sim-n-core.h (sim_core_read_aligned_N,
- sim_core_write_aligned_N): Call sim_hw_abort not hw_abort.
- (sim_core_read_aligned_N, sim_core_write_aligned_N): Call
- sim_cpu_hw_io_read_buffer and sim_cpu_hw_io_write_buffer. Does not
- return length.
-
- * sim-hw.h: Declare sim_hw_io_{read,write}_buffer. Declare
- sim_hw_print.
- * sim-hw.c (sim_hw_io_read_buffer, sim_hw_io_write_buffer,
- sim_cpu_hw_io_read_buffer, sim_cpu_hw_io_write_buffer): New
- functions.
- (sim_hw_print): New function.
-
- * sim-engine.h (sim_engine_vabort): Declare.
- * sim-engine.c (sim_engine_vabort): New function.
-
-Wed Apr 29 23:58:52 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-trace.c (print_data): For floating-point numbers trace raw
- hex value.
- (trace_result_fp2): New function.
- * sim-trace.h (trace_result_fp2): New declaration.
- (TRACE_FP_RESULT2): New macro.
-
-Tue Apr 28 18:28:58 1998 Geoffrey Noer <noer@cygnus.com>
-
- * common/aclocal.m4: call AM_EXEEXT in SIM_AC_COMMON, define
- AM_CYGWIN32 and AM_EXEEXT.
- * common/Make-common.in: set EXEEXT, add missing EXEEXTs
- to run and install-common rules.
- * common/configure: regenerate
-
-Sat Apr 25 17:45:01 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-types.h (cell_word): New type.
- (natural_cell): Delete type.
-
-Sun Apr 26 15:31:55 1998 Tom Tromey <tromey@creche>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
- * config.in: Ditto.
-
-Sun Apr 26 15:25:07 1998 Tom Tromey <tromey@cygnus.com>
-
- * acconfig.h (NEED_DECLARATION_PRINTF): Removed.
-
-Fri Apr 24 14:16:40 1998 Tom Tromey <tromey@creche>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
- * config.in: Ditto.
-
-Fri Apr 24 11:38:08 1998 Tom Tromey <tromey@cygnus.com>
-
- * acconfig.h: New file.
- * Make-common.in (top_builddir): New macro.
- (INTL_LIB): Removed.
- (INTLLIBS): New macro.
- (INTLDEPS): Likewise.
- (LIBDEPS): Use INTLDEPS.
- (EXTRA_LIBS): Use INTLLIBS.
- * aclocal.m4 (SIM_AC_COMMON): Call CY_GNU_GETTEXT.
- (CY_WITH_NLS, CY_GNU_GETTEXT, AM_PATH_PROG_WITH_TEST,
- AM_LC_MESSAGES): New macros from GNU gettext.
-
-Fri Apr 24 19:57:59 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-config.h: Discard leading _ from macros.
- * sim-types.h: Ditto.
-
-Wed Apr 22 14:14:19 1998 Michael Meissner <meissner@cygnus.com>
-
- * Make-common.in (CSEARCH): Add -I to intl directories.
- (INTL_LIB): Point to libintl.a.
- (LIBDEPS): Add $(INTL_LIB).
- (EXTRA_LIBS): Ditto.
-
-Tue Apr 21 12:44:27 1998 Doug Evans <devans@canuck.cygnus.com>
-
- * cgen-types.h (GETHIDI,MAKEDI): Tweak.
-
- * cgen-ops.h (ADDCFSI): Fix.
- (SUBCFSI): Tweak.
-
-Tue Apr 21 13:18:41 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-types.h (signed_address, unsigned_address): Define.
-
-Mon Apr 20 21:47:54 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-fpu.c (sim_fpu_2d): Don't return an SNaN, convert it into a
- QNaN.
-
-Thu Apr 16 10:30:14 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-fpu.c, sim-fpu.h (sim_fpu_fractionto, sim_fpu_tofraction):
- New functions, pack / unpack sim_fpu struct using raw values.
- (sim_fpu_is): Differentiate between negative and positive
- infinity.
-
-Tue Apr 14 18:49:31 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-bits.h (EXTEND4): Define.
- (EXTEND4, EXTEND15, EXTEND11): Ditto.
-
-Tue Apr 14 16:31:35 1998 John Metzler <jmetzler@cygnus.com>
-
- * sim-memopt.c (parse_addr): Sunos 4.5 does not have strtol
- declared so we need this cast to prevent long long addresses
- from being misconfigures. Results in access to unmapped memory.
-
-Tue Apr 14 13:19:14 1998 Doug Evans <devans@canuck.cygnus.com>
-
- * Make-common.in (RUNTESTFLAGS): Define.
- (check): Pass RUNTESTFLAGS to recursive make.
-
-Tue Apr 14 15:09:19 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-info.c (sim_info): Be verbose when either VERBOSE or
- STATE_VERBOSE_P.
-
-Sat Apr 4 23:24:17 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * aclocal.m4 (sim-inline): By default, disable sim-inline when
- cross compiling.
-
-Sat Apr 4 20:36:25 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * aclocal.m4 (sim-cflags): Add -fomit-frame-pointer to defaults.
- (sim-inline): Update to match sim-inline.[hc]
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
- * Make-common.in (sim_main_headers): Add sim-inline.h
-
- * sim-bits.h (sim-bits.c): Include when H_REVEALS_MODULE_P.
- selected.
- * sim-endian.h (sim-endian.c): Ditto.
-
- * sim-events.h (_SIM_EVENTS_H_): Replace with SIM_EVENTS_H.
- (sim_events_set_trace): Delete unused prototype.
-
- * sim-core.h (_SIM_CORE_H_): Replace with SIM_CORE_H.
- * sim-core.c (_SIM_CORE_C_): Ditto for SIM_CORE_C.
-
- * sim-fpu.h (sim-fpu.c): Include when H_REVEALS_MODULE_P.
- (sim_fpu_to232i, sim_fpu_to232u, sim_fpu_i232to, sim_fpu_u232to):
- Comment out, not yet implemented in sim-fpu.c.
- (sim_fpu_zero, sim_fpu_one, sim_fpu_two, sim_fpu_qnan,
- sim_fpu_max32, sim_fpu_max64): Mark as EXTERN_SIM_FPU.
-
- * sim-inline.h: Rewrite description.
- (H_REVEALS_MODULE_P, C_REVEALS_MODULE_P): Define.
- (SIM_MAIN_INLINE): Add inline option.
-
- * sim-inline.c (semantics.c, idecode.c, engine.c, ...): Do not
- include generated files. Handled by generator directly.
-
-Sat Apr 4 01:07:06 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-trace.c (set_trace_option_mask): Keep TRACE_ANY_P
- up-to-date.
-
- * sim-trace.h (TRACE_ANY_P): Define.
- (struct _trace_data): Add trace_any_p.
-
-Mon Mar 30 17:11:55 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * run.c (main): Handle all alternatives of enum sim_stop.
- (main): Delete unused `asection *s'.
-
-Fri Mar 27 16:15:52 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * hw-tree.h, hw-tree.c (hw_tree_vparse): New function
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
- * sim-hw.c: New file.
- * sim-hw.h (sim_hw_parse): Declare function.
- (hw-tree.h): Do not include.
-
- * sim-base.h (STATE_HW): Define.
- (struct sim_state_base): Add member struct *hw.
-
- * sim-module.c (sim-hw.h): Include.
- (modules): Add sim_hw_install.
-
- * aclocal.m4 (sim_hw_obj): Add sim-hw.o
-
-Fri Mar 27 14:55:06 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-base.h (CPU_INDEX): Define.
-
- * sim-utils.c (sim_state_alloc): Initialize.
- * sim-module.c (sim_post_argv_init): Ditto.
-
-Thu Mar 26 10:07:57 1998 Stu Grossman <grossman@bhuna.cygnus.co.uk>
-
- * aclocal.m4 (sim_hw_obj): Fix sed expression to generate
- properly formatted lists.
-
-Thu Mar 26 10:37:22 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * dv-pal.c (enum hw_pal_address_mask): From Stu Grossman, was
- 0x2f needs to be 0x3f.
-
-Thu Mar 26 09:10:56 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * hw-tree.c (hw_tree_find_property): Return NULL when device is
- not found.
- (hw_tree_find_*_property): Clean up error message when property is
- not found.
-
- * dv-pal.c (hw_pal_io_read_buffer): Check the smp property is
- present before looking for it.
-
-Wed Mar 25 16:17:38 1998 Ian Carmichael <iancarm@cygnus.com>
-
- * aclocal.m4 (AC_CHECK_HEADERS): Add check for fpu_control.h.
- (AC_CHECK_FUNCS): Add check for __setfpucw.
- * configure: Regenerated.
-
-Wed Mar 25 09:18:34 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * dv-pal.c (hw_pal_countdown, hw_pal_countdown_value,
- hw_pal_timer, hw_pal_timer_value): Define.
- (hw_pal_io_read_buffer, hw_pal_io_write_buffer): Add timer support
- (do_counter_event, do_counter_read, do_counter_value,
- do_counter_write): new functions.
-
-Tue Mar 24 12:24:24 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * hw-tree.c (hw_printf): Send tree dump to stderr, same as other
- trace output.
-
- * hw-base.c (hw_create): Stop searching for a device when one is
- found.
-
-Wed Mar 25 12:35:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Mon Mar 23 10:25:08 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * aclocal.m4 (SIM_AC_OPTION_HARDWARE): Add second argument,
- appends extra devices.
- (SIM_AC_OPTION_HARDWARE): Substute sim_hw, a non-duplicate list of
- the device names.
-
- * Make-common.in (hw-config.h): New target, create hw-config.h
- file.
- (SIM_HW): Definition from @sim_hw@.
- (hw-base.o): Depend on hw-config.h
-
-Tue Mar 24 17:41:35 1998 Stu Grossman <grossman@bhuna.cygnus.co.uk>
-
- * Make-common.in: Get SHELL from configure.
- * (stamp-tvals sim-inline.c): Use $(SHELL) when invoking
- move-if-change. Fixes NT native build problem.
- * Makefile.in (nltvals.def): Use $(SHELL) when invoking
- move-if-change. Fixes NT native build problem.
- * configure: Regenerate with autoconf 2.12.1 to fix shell issues for
- NT native builds.
-
-Sun Mar 22 16:54:40 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * hw-device.h, hw-device.c (hw_strdup): New function.
-
- * hw-base.c (hw_create): Use hw_strdup when saving a copy of the
- strings name, family and args.
- (full_name_of_hw): Use hw_strdup when returning the full path.
-
- * hw-properties.c: Clean up property not found / wrong type error
- messages.
-
- * hw-tree.c (hw_tree_parse): Finish a devices initialization
- before attaching any ports.
-
- * hw-base.c (hw-config.): Include. Replace hardwired table.
-
- * dv-glue.c: Copy over ../ppc/hw_glue.c. Update to new framework.
-
- * Make-common.in: Add rule for dv-glue.o.
-
-Sun Mar 22 16:45:54 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * hw-base.c (hw_finish): Move setting of trace level to here.
- (hw_create): From here.
-
- * hw-base.h, hw-base.c (do_hw_attach_regs): Copy function from
- ../ppc/device_table.c.
-
- * dv-pal.c (hw_pal_finish): Attach PAL device to parent bus.
-
- * hw-tree.c (print_properties): Supress path when printing
- properties of root node.
-
-Sun Mar 22 16:21:15 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * hw-device.h (HW_TRACE): Define.
- (hw_trace): Declare.
- * hw-device.c (hw_trace): Implement function.
-
- * hw-base.c (hw_create): Set hw trace level from "trace?"
- property.
-
- * dv-core.c (dv_core_attach_address_callback): Add trace.
-
- * dv-pal.c: Replace DTRACE with HW_TRACE.
-
-Sun Mar 22 15:23:35 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * hw-device.h (HW_ZALLOC, HW_MALLOC): New macros.
- (hw_alloc_data): Delcare.
- (struct hw): Add member alloc_of_hw.
-
- * hw-device.c (hw_zalloc, hw_malloc, hw_free, hw_free_all): New
- functions. Assocate memory with a device.
- (stdlib.h): Include.
-
- * hw-base.h (set_hw_delete): Define.
- (hw_delete_callback): Declare.
- (hw_delete): Declare.
-
- * hw-base.c (hw_delete): Implement function.
- (struct hw_base_data): Add member to_delete.
- (ignore_hw_delete): New function, does nothing.
- (hw_create): Set the hw_delete method.
- (hw_create): Allocate the base type using HW_ZALLOC before setting
- any methods.
-
- * hw-tree.h, hw-tree.c (hw_tree_delete): New function.
-
- * hw-properties.c: Replace zalloc/zfree with hw_zalloc/hw_free.
-
- * hw-ports.c: Replace zalloc/zfree with hw_zalloc/hw_free.
- (attach_hw_port_edge): Add struct hw argument
-
- * dv-pal.c (hw_pal_finish): Replace zalloc/zfree with
- hw_zalloc/hw_free.
-
-Sun Mar 22 15:09:52 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * hw-device.h (hw_attach_address_callback,
- hw_detach_address_callback): Attach to a single space not a space
- mask. Clarify interpretation of SPACE:ADDR parameters.
-
- * hw-base.c (passthrough_hw_attach_address,
- passthrough_hw_detach_address): Update.
- * dv-core.c (dv_core_attach_address_callback): Ditto.
- * dv-pal.c (hw_pal_attach_address): Ditto.
-
-Thu Mar 19 00:41:00 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-options.h: Document additional CPU arg to OPTION_HANDLER.
-
-Wed Mar 18 14:13:02 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * Make-common.in (SIM_HW_OBJS, SIM_HW_SRC, SIM_DV_OBJS): Define.
- (hw-base_h, hw-device_h, hw-handles_h, hw-instances_h, hw_ports_h,
- hw-properties_h, hw-tree_h): Define, point at corresponding
- header.
- (hw_base_headers): Define list of headers included by hw-base.h
- (hw-base.o, hw-device.o, hw-instances.o, hw-handles.o, hw-ports.o,
- hw-properties.o, hw-tree.o): Specify dependencies.
- (dv-core.o, dv-pal.o): Ditto.
-
- * sim-hw.h: New file.
-
- * hw-device.h, hw-device.c, hw-properties.h, hw-properties.c,
- hw-ports.h, hw-ports.c: New files. Copied from ../ppc/device.[ch].
-
- * hw-tree.h, hw-tree.c: New files. Copied from ../ppc/tree.[hc].
-
- * hw-base.h, hw-base.c: new files. Copied from
- ../ppc/device_table.[hc].
-
- * dv-core.c, dv-pal.c: New files. Copied from
- ../ppc/hw_{core,pal}.c
-
- * sim-basics.h (struct hw): Declare.
- (enum port_direction, enum object_disposition): Declare.
-
-Wed Mar 18 12:38:12 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * aclocal.m4 (SIM_AC_OPTION_HARDWARE): Set sim_hw_obj, sim_dv_obj,
- sim_dv_src in Makefile. Take list of devices as parameter to m4
- macro..
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Mon Mar 16 12:37:33 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-trace.h, sim-trace.c (trace_prefix): Pass in sim_cia so that
- trace_prefix can abort cleanly.
-
-Sat Mar 14 18:36:12 1998 Doug Evans <devans@seba.cygnus.com>
-
- * dv-sockser.c, dv-sockser.h: New files.
- * Make-common.in (dv-sockser.o): Add rule for.
- * aclocal.m4: Check for fcntl.h.
- * config.h: Add HAVE_FCNTL_H.
-
- * sim-break.c (remove_breakpoint): Fix thinko.
-
- * sim-hload.c (sim_load): Provide default value of SIM_HANDLES_LMA.
- Use SIM_HANDLES_LMA for lma_p arg to sim_load_file.
-
-1998-03-13 Fred Fish <fnf@cygnus.com>
-
- * sim-base.h (struct sim_state_base): Add prog_syms and
- define macro STATE_PROG_SYMS.
- * sim-trace.c (trace_prefix): Add variables abfd, symsize,
- symbol_count, and asymbols. Call bfd_get_symtab_upper_bound
- and bfd_canonicalize_symtab, to get symbol table on first use
- and preserve it via STATE_PROG_SYMS for future calls to
- bfd_find_nearest_line.
-
-Wed Mar 11 14:02:47 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-core.h, sim-core.c (sim_core_map_to_str): Delete.
-
- * sim-core.c (sim_core_attach): Handle a generic number of maps -
- up to nr_maps, not just access_* maps.
-
- * sim-profile.h (struct PROFILE_DATA): Track nr_maps different
- maps.
-
- * sim-profile.c (profile_print_core): Make map unsigned. Iterate
- over nr_maps not sim_core_nr_maps.
-
- * sim-events.h, sim-events.c (sim_events_watch_core): Change
- core_map argument to unsigned.
- (struct _sim_core): Ditto for struct member core_map.
-
- * sim-core.h (nr_sim_core_maps, sim_core_*_map): Delete
-
- * sim-basics.h (access_io, access_*_io): Define.
- (map_read, map_write, map_exec, map_io): Define.
-
- * sim-core.c, sim-core.h (sim_core_attach): Replace argument
- attach with more generic mapmask.
- (sim_core_{read,write}_*): Change map argument to unsigned.
-
- * sim-core.c (sim_core_uninstall, sim_core_attach,
- sim_core_detach): Iterate over nr_maps instead of
- sim_core_nr_maps.
-
- * sim-break.c (insert_breakpoint): Write breakpoints to exec_map
- instead of the write_map.
- (remove_breakpoint): Ditto.
-
- * genmloop.sh (engine_resume_full): Replace sim_core_*_map
- with read_map, write_map, exec_map resp.
-
- * cgen-mem.h (DECLARE_GETMEM, DECLARE_SETMEM, DECLARE_GETIMEM):
- Ditto.
-
- * cgen-utils.c (sim_disassemble_insn): Ditto.
-
- * sim-hrw.c (sim_write, sim_write): Ditto.
-
- * sim-utils.h, sim-utils.c (access_to_str, map_to_str,
- transfer_to_str): New functions.
-
-Mon Mar 9 12:50:59 1998 Doug Evans <devans@seba.cygnus.com>
-
- * sim-base.h (sim_state_base): New member environment.
- (STATE_ENVIRONMENT): New macro.
- * sim-config.c (current_environment): Delete.
- (sim_config_default): New function.
- (sim_config): Set STATE_ENVIRONMENT, not current_environment.
- * sim-config.h (current_environment,CURRENT_ENVIRONMENT): Delete.
- (sim_config_default): Add prototype.
- * sim-module.c (sim_pre_argv_init): Call sim_config_default.
- * sim-options.c (standard_option_handler, case OPTION_ENVIRONMENT):
- Set STATE_ENVIRONMENT, not current_environment.
-
-Mon Mar 9 11:59:03 1998 Jim Wilson <wilson@cygnus.com>
-
- * sim-fpu.c (NR_GUARDS64): Change NR_PAD32 to NR_PAD64.
-
-Tue Mar 3 10:53:05 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-types.h (SIGNED32, SIGNED64): Pacify GCC.
-
- * sim-alu.h (ALU64_BEGIN): Make alu64_r unsigned.
-
-Mon Mar 2 10:20:06 1998 Doug Evans <devans@seba.cygnus.com>
-
- * Make-common.in (TAGS): Make smarter.
- * Makefile.in (TAGS): Ditto.
-
-Fri Feb 27 19:09:57 1998 Doug Evans <devans@canuck.cygnus.com>
-
- * sim-module.c (*): Fix typos in assertion tests.
-
-Sat Feb 28 13:54:10 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-module.c (sim_pre_argv_init): String passed to asprintf
- can't be constant.
-
- * sim-options.c (sim_parse_args): Ditto.
- (sim_args_command): Return OK, instead of nothing, for an empty
- command.
-
-Fri Feb 27 13:29:13 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-profile.c (profile_info): Rename from profile_print. Drop
- misc and misc_cpu callback arguments. Use
- PROFILE_INFO_CPU_CALLBACK and STATE_PROFILE_INFO_CALLBACK instead.
- (profile_install): Install profile_info function.
-
- * sim-profile.h (PROFILE_INFO_CPU_CALLBACK,
- STATE_PROFILE_INFO_CALLBACK): Define.
- (struct PROFILE_DATA): Add field info_cpu_callback.
- (profile_print): Delete function.
-
- * sim-base.h (STATE_MODULES): Define. Replace individual
- STATE_*_LIST with single struct module_list.
-
- * sim-module.h (MODULE_INFO_FN, MODULE_INFO_LIST): Declare.
- (struct module_list): Declare.
-
- * sim-module.h, sim-module.c (sim_module_add_info_fn,
- sim_module_info): New functions.
- (sim_module_install): Clean up module data structures.
-
- * sim-info.c (sim_info): New file. New function. Call
- sim_module_info.
-
- * Make-common.in (sim-info.o): Define rule.
- (SIM_NEW_COMMON_OBJS): Add sim-info.o.
-
-
-Fri Feb 27 18:26:16 1998 Doug Evans <devans@canuck.cygnus.com>
-
- * sim-base.h (sim_cpu_base): New members name, options.
- (sim_cpu_lookup): Add prototype.
- * sim-module.c (sim_pre_argv_init): Provide default names for cpus.
- * sim-options.h (DECLARE_OPTION_HANDLER): New argument `cpu'.
- (sim_add_option_table): Update prototype.
- * sim-options.c (sim_add_option_table): New argument `cpu'.
- (standard_option_handler,standard_install): Update.
- (sim_parse_args): Handle cpu specific options.
- (print_help): New static function.
- (sim_print_help): Call it. Print cpu specific options.
- (find_match): New static function.
- (sim_args_command): Call it. Handle cpu specific options.
- * sim-utils.c (sim_cpu_lookup): New function.
- * sim-memopt.c (memory_option_handler): Update.
- (sim_memopt_install): Update.
- * sim-model.c (model_option_handler): Update.
- (model_install): Update.
- * sim-profile.c (profile_option_handler): Update.
- (profile_install): Update.
- * sim-trace.c (trace_option_handler): Update.
- (trace_install): Update.
- * sim-watch.c (watchpoint_option_handler): Update.
- (sim_watchpoint_install): Update.
- * cgen-scache.c (scache_option_handler): Update.
- (scache_install): Update.
-
-Wed Feb 25 11:00:26 1998 Doug Evans <devans@canuck.cygnus.com>
-
- * Make-common.in (check): Run `make check' in testsuite dir.
-
-Wed Feb 25 14:40:24 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-trace.c (trace_result0): New function.
-
- * sim-trace.h (TRACE_FP_*, TRACE_FPU_*): Rename TRACE_FPU_*
- macro's to TRACE_FP_*. TRACE_FPU_* should be defined and used when
- tracing sim_fpu variables.
- (TRACE_ALU_RESULT0): Define.
- (TRACE_FP_RESULT_WORD): Define.
- (TRACE_FP_INPUT_WORD1): Define.
-
- * sim-fpu.c, sim-fpu.h (sim_fpu_max32, sim_fpu_max64, sim_fpu_one,
- sim_fpu_two): New constants.
- (sim_fpu_op1, sim_fpu_op2): New types.
- (struct _sim_fpu): Delete member result. Re-order other members.
- (sim_fpu_sign, sim_fpu_exp): New functions.
- (sim_fpu_max, sim_fpu_min): new functions.
- (EXPMAX32, EXPMAX64, NR_PAD32, NR_PAD64, NR_GUARDS32, NR_GUARDS64,
- NORMAL_EXPMAX32, NORMAL_EXPMAX64): Define.
-
-Tue Feb 24 22:45:39 1998 Doug Evans <devans@seba.cygnus.com>
-
- * sim-profile.c (profile_print): Delete duplicate test of
- PROFILE_INSN_IDX.
- (profile_print_pc): Exit early if data collection not set up.
- (profile_print_core): Simplify by calling sim_core_map_to_str.
- * sim-core.h (sim_core_map_to_str): Declare.
- * sim-core.c (sim_core_map_to_str): Make non-static.
-
- * genmloop.sh (engine_resume): Update insn_count before exiting.
- (engine_resume_full): Keep accurate core profile data.
-
- * cgen-utils.c (sim_disassemble_insn): Don't use
- sim_core_read_aligned_N, it messes up profiling results.
-
-Mon Feb 23 20:45:57 1998 Mark Alexander <marka@cygnus.com>
-
- * nltvals.def: Regenerate with MN10300 additions.
-
-Tue Feb 24 13:18:42 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-trace.h (TRACE_ALU_RESULT2): Define.
-
- * sim-trace.h, sim-trace.c (trace_result_word2,
- trace_input_word4, trace_result_word4): New function.
-
-Mon Feb 23 13:08:35 1998 Doug Evans <devans@canuck.cygnus.com>
-
- * cgen-sim.h (SEM_NEXT_PC): New arg `len'.
-
- * sim-xcat.h: Delete.
- * cgen-mem.h: Delete inclusion of sim-xcat.h.
- * cgen-sim.h: Ditto.
- * sim-alu.h: Replace sim-xcat.h with symcat.h.
- * sim-n-bits.h: Ditto.
- * sim-n-core.h: Ditto.
- * sim-n-endian.h: Ditto.
-
-Mon Feb 23 13:19:58 1998 Michael Meissner <meissner@cygnus.com>
-
- * syscall.c (cb_syscall): Handle short reads, and EOF.
-
-Tue Feb 24 00:29:57 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-trace.c (print_data): case trace_fmt_fp missing break. Use
- sim_fpu to safely print fp_word values.
- (print_data): Add trace_fmt_bool and trace_fmt_addr.
- (trace_result_bool1, trace_result_addr1): New functions.
- (trace_input_bool1, trace_input_addr1): New functions.
-
- * sim-trace.h (TRACE_FPU_*): Define.
-
-Mon Feb 23 13:24:54 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-fpu.h (enum sim_fpu_class): Add sim_fpu_class_denorm.
- (sim_fpu_fpto, sim_fpu_tofp): Define.
-
-Fri Feb 20 18:08:51 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-fpu.c (sim_fpu_cmp): New function.
-
-Wed Feb 18 16:29:21 1998 Doug Evans <devans@canuck.cygnus.com>
-
- * cgen-utils.h (sim_disassemble_insn): Use CGEN_INSN_BITSIZE
- instead of abuf->length.
- * sim-trace.c (trace_options): Have -t only trace a few useful things.
- (set_trace_option_mask): Renamed from set_trace_options.
- (set_trace_option): New function.
- (trace_option_handler): Update calls to set_trace_option{,_mask}.
- * sim-trace.h (TRACE_USEFUL_MASK): New macro.
-
-Wed Feb 18 12:42:15 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-basics.h: Declare struct _sim_fpu.
-
-Tue Feb 17 16:27:46 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-trace.h (TRACE_ALU_INPUT*, TRACE_ALU_RESULT): Define.
- (trace_prefix, trace_input*, trace_result*): Declare.
- (trace_one_insn): Change declaration, assume trace_prefix called.
- (trace_generic): Like trace_one_insn.
- (TRACE_ALU_IDX, TRACE_*_IDX): Change #define's to enum.
- (TRACE_alu, TRACE_[a-z]*): Update.
-
- * sim-trace.c (trace_prefix, trace_input*, trace_result*,
- trace_insn, save_data, trace_idx_to_str, print_data): New
- functions.
- (trace_one_insn): Rewrite.
- (trace_generic): New function.
-
-Tue Feb 17 17:27:30 1998 Doug Evans <devans@seba.cygnus.com>
-
- * aclocal.m4 (USE_MAINTAINER_MODE): New variable.
-
- * cgen-sim.h (SEMANTIC_CACHE_FN): Delete.
- (SEMANTIC_FN): Rewrite declaration.
- (DECODE): Update type of semantic_fast member.
- ({EX,SEM}_FN_NAME): Have only one version.
- * sim-base.h (sim_state_base): Delete conditionals surrounding
- member scache_size.
-
-Tue Feb 10 18:31:49 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-load.c (sim_load_file): Print LMA/VMA according to value
- used.
-
-Tue Feb 10 14:56:23 1998 Ian Carmichael <iancarm@cygnus.com>
-
- * sim-core.c: Add missing prototypes for WITH_DEVICES.
- Add missing parameters to device_io calls.
- * sim-core.h: Add missing parameters to device_io calls.
-
-Mon Feb 9 14:48:37 1998 Doug Evans <devans@canuck.cygnus.com>
-
- * cgen-sim.h (DECODE): Always use switch for `read' for now.
- (PAREXEC): Renamed from PARALLEL_EXEC. All uses updated.
- (SEMANTIC{,_CACHE}_FN): Fix return type.
- * genmloop.sh (@cpu@_engine_run): Delete `current_state'.
- (engine_resume): Likewise. Make `engine' volatile. Save copy
- of cpu pointer in volatile object. Initialize read switch if
- -parallel.
-
-Thu Feb 5 13:27:04 1998 Doug Evans <devans@seba.cygnus.com>
-
- * cgen-sim.h (EX_FN_NAME): _exc_ -> _ex_.
- (SEM_INSN): New macro.
-
-Tue Feb 3 16:31:56 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-run.c (sim_engine_run): Assume IMEM is 32 bit.
-
-Sun Feb 1 16:47:51 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Sun Feb 1 16:16:57 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-types.h (fp_word): New type, define according to
- WITH_TARGET_FLOATING_POINT_BITSIZE.
-
- * aclocal.m4 (default_sim_floating_point_bitsize): Add
- configuration of size of floating point registers.
-
-Sun Feb 1 14:02:31 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-profile.c (profile_print): Only print CPU <N> if other
- output is going to appear.
-
-Sat Jan 31 18:15:41 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Sat Jan 31 18:03:55 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-types.h (address_word): Typedef according to
- WITH_TARGET_ADDRESS_BITSIZE.
- (signed_cell, unsigned_cell, natural_cell): Ditto using
- WITH_TARGET_CELL_BITSIZE.
-
- * sim-config.h (WITH_TARGET_ADDRESS_BITSIZE): Define.
- (WITH_TARGET_CELL_BITSIZE): Define.
- (WITH_HOST_WORD_BITSIZE): Delete.
-
- * sim-config.c (print_sim_config): Update.
-
- * aclocal.m4 (SIM_AC_OPTION_BITSIZE): Add support for
- configuration of address and OpenFirmware cell sizes.
-
-Fri Jan 30 09:36:33 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-engine.h (sim_engine_run): Add argument nr_cpus.
- * sim-run.c (sim_engine_run): Update.
-
- * sim-engine.h (SIM_ENGINE_HALT_HOOK): Use SET_CPU_CIA instead of
- CPU_CIA.
- * sim-run.c (sim_engine_run): Ditto.
-
- * sim-resume.c (sim_resume): Obtain nr_cpus from sim_engine.
- (sim_resume): Pass nr_cpus to sim_engine_run.
-
- * sim-engine.h (struct _sim_engine): Add member nr_cpus.
-
- * sim-engine.c (sim_engine_init): Hardwire nr_cpus to
- MAX_NR_PROCESSORS.
- (sim_engine_nr_cpus) sim-engine.c, sim-engine.h: New function
-
-Fri Jan 23 14:20:54 1998 Doug Evans <devans@seba.cygnus.com>
-
- * Make-common.in (stamp-tvals): New rule.
- (targ-vals.h,targ-map.c): Depend on it.
- (clean): Remove stamp-tvals.
-
-Tue Jan 20 21:35:13 1998 Michael Meissner <meissner@cygnus.com>
-
- * sim-utils.c (sim_state_alloc): #if 0 variable that is only used
- in code also #if 0'ed.
-
-Mon Jan 19 22:26:29 1998 Doug Evans <devans@seba>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
- * aclocal.m4: Recognize --enable-maintainer-mode.
-
-Mon Jan 19 12:45:45 1998 Doug Evans <devans@seba.cygnus.com>
-
- * cgen-scache.h: Deleted.
- * Make-common.in (cgen-run.o,cgen-scache.o): Delete cgen-scache.h dep.
- * cgen-scache.c: Only compile contents if WITH_SCACHE.
- (scache_init): Use runtime computed size of SCACHE.
- (scache_flush): Likewise.
- * cgen-mem.h (GETIMEMU[QHSD]I): Declare.
- ([GS]ETT{QI,UQI,HI,UHI,SI,USI,DI,UDI}): Declare.
- * cgen-sim.h: Scache support moved here.
- (PC): Redo definition.
- (ARGBUF,SCACHE,PARALLEL_EXEC): Provide forward decls.
- (DECODE): Add parallel execution support.
- Only include semantic label members if using switch.
- (SWITCH,CASE,BREAK,DEFAULT,ENDSWITCH): Portable computed goto support.
- (CGEN_CPU): Delete members exec_state, halt_sigrc, halt_jmp_buf.
- (IADDR,CIA,SEM_ARG,EX_FN_NAME,SEM_FN_NAME,RECORD_IADDR,SEM_ARGBUF,
- SEM_NEXT_PC,SEM_BRANCH_VIA_{CACHE,ADDR},SEM_NEW_PC_ADDR): Moved here
- from cgen-types.h.
- (engine_{stop,run,resume,halt,signal}): Delete decls.
- * cgen-types.h (CGEN_{XCAT3,CAT3}): Delete.
- (argbuf,scache): Delete forward decls.
- (STATE): Delete decl.
- * cgen-utils.c: Don't include decode.h, mem-ops.h, sem-ops.h.
- Include cgen-mem.h, cgen-ops.h.
- (engine_halt,engine_signal): Delete.
- ({ex,exc,sem,semc}_illegal): Delete.
- (sim_disassemble_insn): Result of extract fn is in bits.
- * genmloop.sh: Rewrite.
-
- * cgen-trace.c (trace_insn): Set printed_result_p=0 if not tracing
- line numbers.
-
- * sim-base.h (sim_state_base): Delete member `model'.
- (sim_cpu_base): Add member `model'.
- * sim-model.h (IMP_PROPERTIES): New type.
- (MACH): New members imp_props, models.
- (models): Delete decl.
- * sim-model.c (set_model): Update.
- * sim-profile.c (profile_print_model): Update.
-
- * sim-utils.c (sim_state_alloc): Delete setting of cpu backlink here.
-
-Fri Jan 16 12:33:09 1998 Nick Clifton <nickc@cygnus.com>
-
- * cgen-trace.c (trace_insn): Call CGEN_INSN_MNEMONIC() rather than
- CGEN_INSN_SYNTAX().
-
-Mon Dec 15 23:17:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
- * config.in: Ditto.
-
-Mon Dec 15 23:16:03 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * aclocal.m4 (AR): Check for sigaction.
-
-Thu Dec 4 09:21:05 1997 Doug Evans <devans@canuck.cygnus.com>
-
- * Make-common.in (sim-core.o): Depend on $(sim_main_headers).
-
- * sim-config.h (WITH_TREE_PROPERTIES): Define as 0.
- * sim-config.c (sim_config): Replace WITH_DEVICES with
- WITH_TREE_PROPERTIES.
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Wed Dec 3 17:56:02 1997 Doug Evans <devans@canuck.cygnus.com>
-
- * Make-common.in (SIM_ENVIRONMENT): New variable.
- (CONFIG_CFLAGS): Add it.
- * aclocal.m4 (SIM_AC_OPTION_ENVIRONMENT): Handle
- --enable-sim-environment option.
- * configure: Regenerated.
- * sim-config.h (environment support): Rewrite.
- * sim-config.c (current_environment): Define as enum, unconditionally.
- (current_alignment): Define unconditionally.
- (config_environment_to_a): Update.
- (config_alignment_to_a): Fix type of argument. Define unconditionally.
- (sim_config): Handle environment and alignment determination
- unconditionally. Delete sanity checks of current_environment,
- unnecessary.
- (print_sim_config): Update.
- * sim-options.c (STANDARD_OPTIONS enum): Add OPTION_ENVIRONMENT.
- (standard_options): Add --environment.
- (standard_option_handler): Likewise.
-
-Fri Nov 28 12:21:25 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-alu.h: Add notes on carry vs borrow for subtraction.
- (ALU{,8,16,32,64}ADD): Redefine ADD macro as add overflowing.
- (ALU{,8,16,32,64}ADDC): Define - add carrying.
- (ALU{,8,16,32,64}SUB): Redefine SUB macro as subtract overflowing.
- (ALU{,8,16,32,64}SUBB): Define - subtract borrowing.
- (ALU{,8,16,32,64}SUBC): Define - tract carrying.
- (ALU{,8,16,32,64}ADD_CA, ALU{,8,16,32,64}ADDC_C): Replace single
- argument ADD_CA macro with two argument ADDC_C - add carrying with
- carry in.
- (ALU{,8,16,32,64}SUB_CA, ALU{,8,16,32,64}SUBC_X): Replace single
- argument SUB_CA macro with two argument SUBC_X - subtract
- carrying, extended.
- (ALU{,8,16,32,64}SUBB_B): Define - subtract borrowing with
- borrow-in.
- (ALU{,8,16,32,64}NEGC, ALU{,8,16,32,64}NEGB): Define.
-
-Sun Nov 30 17:40:57 1997 Michael Meissner <meissner@cygnus.com>
-
- * sim-io.c (sim_io_{syscalls,getstring}): Delete. No longer used.
- * sim-io.h (sim_io_syscalls): Delete.
-
-Fri Nov 28 20:10:09 1997 Michael Meissner <meissner@cygnus.com>
-
- * syscall.c (cb_syscall): Add missing else, so write to stdout
- isn't doubled.
-
- * sim-alu.h (ALU{,8,16,32,64}_SET_CARRY): Provide macros to import
- the carry bit from the CPU's psw.
-
-Fri Nov 28 11:15:05 1997 Doug Evans <devans@canuck.cygnus.com>
-
- * gennltvals.sh: Redo syscall support.
- * nltvals.def: Regenerated.
-
-Wed Nov 26 16:49:38 1997 Michael Meissner <meissner@cygnus.com>
-
- * syscall.c (cb_syscall): If writing to stdout or stderr, flush
- the stream immediately.
-
-Wed Nov 26 12:32:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-io.c (sim_io_getstring): Delete unused len2.
- (sim_io_syscalls): Ditto for sys_errno.
-
-Wed Nov 26 11:18:40 1997 Doug Evans <devans@canuck.cygnus.com>
-
- * syscall.c (cb_syscall): Test CB_SYSCALL struct magic number.
-
- * Make-common.in (run.o): Depend on remote-sim.h.
- (nrun.o,sim-hload.o,sim-hrw.o): Likewise.
- (sim-io.o,sim-reason.o,sim-resume.o): Likewise.
-
-Tue Nov 25 20:12:46 1997 Michael Meissner <meissner@cygnus.com>
-
- * sim-io.c (sim_io_syscalls): Disable lseek.
-
-Tue Nov 25 00:12:38 1997 Doug Evans <devans@seba.cygnus.com>
-
- * gennltvals.sh: Generate syscall values for d30v.
-
- * gennltvals.sh: Use libgloss/syscall.h for sparc.
- * nltvals.def: Regenerate.
-
- * callback.c (os_stat): Make 3rd arg a host struct stat ptr.
- (os_fstat): Likewise. Validate fd argument.
- (cb_host_to_target_stat): Delete big_p arg. If HS arg is NULL,
- just compute target stat struct length.
- * syscall.c: #include "libiberty.h", <sys/types.h>, <sys/stat.h>.
- (ENOSYS,ENAMETOOLONG): Provide definitions if missing.
- (get_string): Return host errno values so they can be properly
- translated later.
- (cb_syscall): Likewise.
- (cb_syscall, cases open,unlink): Use get_path instead of get_string.
- (cb_syscall, case read): Use read_stdin for file descriptor 0.
- (cb_syscall, case write): Use write_stderr for file descriptor 2.
- (cb_syscall): Add cases for lseek, unlink, stat, fstat, time.
- (get_path): New function.
-
-Mon Nov 24 18:56:07 1997 Michael Meissner <meissner@cygnus.com>
-
- * sim-io.c (sim_io_syscalls): New function to provide system call
- emulation. Provide exit, open, close, read, write, lseek, and
- unlink.
- (sim_io_getstring): New function to return a string from a
- simulated memory location.
-
- * sim-io.h (sim_io_syscalls): Add declaration.
-
-Mon Nov 24 12:09:59 1997 Doug Evans <devans@seba.cygnus.com>
-
- * sim-core.c (sim_core_signal): Fix spelling error in message.
-
- * sim-hrw.c (sim_read): Use read map, not write map.
-
- * Make-common.in (all): Add .gdbinit.
- * gdbinit.in: Add dump command.
-
- * sim-model.c (model_options): Use '\0' for `shortopt'.
-
- * sim-trace.c (trace_option_handler): Set state trace file
- for --trace-file in addition to cpu's values.
- (trace_vprintf): If cpu == NULL, try state's trace file.
- (trace_options): Reorganize table, reword some descriptions.
-
-Sun Nov 23 10:57:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-fpu.c (sim_fpu_abs, sim_fpu_neg, sim_fpu_inv), sim-fpu.h:
- New functions.
-
-Sat Nov 22 19:16:54 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-reason.c (sim_stop_reason): For sim_signalled, return the
- signal untranslated, document problem with this.
-
- * nrun.c (main): Check for a prog name of `*step'. If present,
- step the simulator instead of allowing it to run free.
-
- * sim-signal.c (SIGQUIT): Define on _MSC_VER hosts.
-
- * Make-common.in (sim_main_headers): Add sim-signal.h.
-
-Fri Nov 21 09:32:32 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-signal.c (sim_signal_to_host): Return 0 for SIM_SIGNONE.
-
-Thu Nov 20 20:35:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-signal.h: Start simulator signals at 64 so that host signal
- numbers can be detected and reported.
-
- * sim-signal.h (SIM_SIGFPE), sim-signal.h: Add signal.
-
-Wed Nov 19 12:02:41 1997 Doug Evans <devans@seba.cygnus.com>
-
- * callback.c (cb_host_to_target_stat): Fix return values.
-
- * cgen-sim.h (enum_signal_type): Delete.
- (engine_signal): Update prototype.
- * cgen-utils.c: Don't include <signal.h>.
- (sim_signal_to_host): Delete, lives in sim-signal.c now.
- (engine_signal): Update.
-
- * sim-utils.c (sim_state_alloc): Call SIM_STATE_ALLOC if defined.
- (sim_state_free): Call SIM_STATE_FREE if defined.
-
- * sim-module.c (sim_module_install): Don't leave any modules
- installed if one fails to install.
-
-Wed Nov 19 13:25:48 1997 Michael Meissner <meissner@cygnus.com>
-
- * sim-options.c: Don't include ../libiberty/alloca-conf.h any
- more, since alloca is not used in this file.
-
- * sim-alu.h (ALU{32,64}_*): Rewrite 32 and 64 bit ALU support to
- correctly set the carry and overflow bits for those types.
- (ALU{8,16,32,64}_{ADD,SUB}_CA): Take VAL argument to add along
- with carry, so carry is correct after doing both adds.
- (ALU*): Space out '\' to make it easier to read.
-
-Tue Nov 18 15:53:45 1997 Doug Evans <devans@canuck.cygnus.com>
-
- * sim-core.c (sim_core_signal): Use sim_stopped instead of
- sim_signalled.
-
- * sim-signal.c, sim-signal.h: New files.
- * Make-common.in (sim-signal.o): Add rule for.
- (SIM_NEW_COMMON_OBJS): Add sim-signal.o.
- * sim-abort.c: Don't include <signal.h>.
- * sim-basics.h: #include "sim-signal.h".
- * sim-break.c: Don't include <signal.h>.
- (sim_handle_breakpoint): Replace SIGTRAP with SIM_SIGTRAP.
- * sim-core.c: Don't include <signal.h>.
- (SIGBUS): Delete definition.
- (sim_core_signal): Replace SIGSEGV,SIGBUS with SIM_SIGSEGV,SIM_SIGBUS.
- * sim-engine.c: Don't include <signal.h>.
- (sim_engine_abort): Replace SIGABRT with SIM_SIGABRT.
- * sim-reason.c (sim_stop_reason): Call sim_signal_to_host.
- * sim-resume.c: Don't include <signal.h>.
- (SIGTRAP): Delete definition.
- (has_stepped): Replace SIGTRAP with SIM_SIGTRAP.
- * sim-stop.c: Don't include <signal.h>.
- (control_c_simulation): Replace SIGINT with SIM_SIGINT.
- * sim-watch.c: Don't include <signal.h>.
- (handle_watchpoint): Replace SIGINT with SIM_SIGINT.
-
- * Make-common.in (SIM_NEW_COMMON_OBJS): New variable.
-
- * sim-base.h (CIA_ADDR): Provide default definition.
- * sim-core.c (sim_core_signal): Use CIA_ADDR to fetch value.
- * sim-break.c (sim_handle_breakpoint): Likewise.
-
-Mon Nov 17 14:15:31 1997 Doug Evans <devans@seba.cygnus.com>
-
- * Make-common.in (srccom): New variable.
-
- * Make-common.in (DEP, COMMON_DEP_CFLAGS): Define.
- (LIB_OBJS): Add syscall.o.
- (gentmap): Pass $(NL_TARGET) to $(CC).
- (syscall.o): Add rule for.
- (sim_main_headers): Add $(SIM_EXTRA_DEPS).
- (sim-bits.o): Depend on $(sim-n-bits_h).
- (sim-load.o): Depend on callback.h.
-
- * Make-common.in (cgen-*.o): Update dependencies, mem-ops.h renamed to
- cgen-mem.h, sem-ops.h renamed to cgen-ops.h.
- * cgen-mem.h, cgen-ops.h: New files.
-
- * aclocal.m4 (--enable-sim-scache): Pass -DWITH_SCACHE=0 for "=no".
-
- * Makefile.in (nltvals.def): Depend on gennltvals.sh.
- Rewrite build rule.
- * callback.c: #include string.h or strings.h.
- #include sys/types.h and sys/stat.h.
- (cb_init_syscall_map,cb_init_errno_map,cb_init_open_map): Declare.
- (os_get_errno,os_open): Update.
- (os_stat,os_fstat): New functions.
- (os_init): Initialize syscall_map, errno_map, open_map.
- (default_callback): Add entries for os_stat, os_fstat, syscall_map,
- errno_map, open_map, signal_map, stat_map.
- (cb_read_target_syscall_maps): New function.
- (cb_target_to_host_syscall): New function.
- (cb_host_to_target_errno): Renamed from host_to_target_errno.
- (cb_target_to_host_open): Renamed from target_to_host_open.
- (store): New function.
- (cb_host_to_target_stat): New function.
- * syscall.c: New file.
- * gentmap.c (sys_tdefs): New global.
- (gen_targ_vals_h): Output target syscall numbers.
- (gen_targ_map_c): Update. Output target syscall translation map.
- * gentvals.sh: New first argument `target'. Preface table with
- #ifdef NL_TARGET_$target if non-null target passed.
- * gennltvals.sh: New file.
- * nltvals.def: Regenerated.
-
-Fri Nov 14 11:33:34 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-n-core.h (sim_core_read_unaligned_N): Return static
- sim_core_dummy_M.
- (sim_core_dummy_M): Declare.
-
-Wed Nov 12 18:16:15 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-core.c (sim_core_signal): Print the address of the
- instruction.
-
-Thu Nov 13 11:49:41 1997 Doug Evans <devans@seba.cygnus.com>
-
- * sim-base.h (sim_state_base): Move `magic' to end of struct.
-
- * sim-base.h (sim_state_base): Add member trace_data.
- (STATE_TRACE_DATA): New macro.
- * sim-trace.h (TRACE_DEBUG_IDX,TRACE_debug): New macros.
- ({WITH_,}TRACE_DEBUG_P): New macros.
- (STATE_TRACE_FLAGS,STRACE_P,STRACE_DEBUG_P): New macros.
- (_sim_cpu): Delete forward reference.
- (debug_printf): Update.
- * sim-trace.c (OPTION_TRACE_DEBUG): Define.
- (trace_options): Add --trace-debug.
- (set_trace_options): Handle it.
- (trace_option_handler): Likewise.
- (trace_install): Init state trace_data struct.
- (trace_uninstall): Close state trace file.
- * sim-events.c (ETRACE): Only print source file and line number if
- --trace-debug.
- * sim-n-core.h (sim_core_trace_M): Likewise.
-
- * sim-core.c (sim_core_signal): Add missing "\n" in message.
-
-1997-11-13 Felix Lee <flee@cygnus.com>
-
- * sim-n-core.h (sim_core_read_unaligned_N): illegal empty
- initializer.
- * sim-types.h (unsigned128,signed128): fix typo for MSVC.
-
-Wed Nov 12 12:18:08 1997 Doug Evans <devans@canuck.cygnus.com>
-
- * aclocal.m4 (SIM_AC_OPTION_SCACHE): Fix typo.
-
- * Make-common.in (BUILT_SRC_FROM_COMMON): Remove files no longer
- built this way.
- (sim-config.o): Remove non-existent $(sim-nconfig_h) dependency.
- (clean): Don't delete $(BUILT_SRC_FROM_COMMON) if building in
- source tree.
-
-Tue Nov 11 13:28:02 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-events.c (sim_events_process): Re-compute the time -
- update_time_from_event - as each event is processed. Reverses
- previous change.
-
-Fri Nov 7 00:37:36 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * callback.c (os_poll_quit): Replace _WIN32 with _MSC_VER.
-
-Fri Nov 7 00:37:36 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-events.c (sim_events_process): Delete redundant call to
- update_time_from_event.
- (sim_events_slip): Always decrement time_from_event.
- (sim_events_tick, sim_events_deschedule, update_time_from_event):
- Delete assertion that time_from_event >=0 when work in queue, no
- longer applicable.
-
-Thu Nov 6 12:06:46 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-options.c (STANDARD_OPTIONS): Change OPTION_* to an enum.
- (standard_option_handler): Update.
-
- * sim-options.h: Clarify documentation.
- (OPTION_LONG_ONLY_P): Delete definition.
- (OPTION_VALID_P): Define.
-
- * sim-options.c (sim_print_help): Allow short only options.
- (sim_parse_args): Ditto.
- (sim_args_command): Skip short only options.
- (sim_parse_args): Allocate space for NUM_OPTS not just 256. Make
- separate entries for short and long options in the HANDLERS and
- ORIG_VAL tables.
- (sim_parse_args): Disable argument permutation.
-
-Wed Nov 5 13:40:31 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-core.h (DECLARE_SIM_CORE_WRITE_N. DECLARE_SIM_CORE_READ_N):
- Add argument M, size of data type.
- (sim_core_read_misaligned_3, sim_core_write_misaligned_3):
- Declare, ditto for 5, 6 & 7 byte transfers.
- (sim_core_write_unaligned_1, sim_core_write_unaligned_1): Define
- as aligned variant.
-
- * sim-n-core.h (sim_core_trace_M): Rename from
- sim_core_trace_N. Add nr_bytes argument. Replace transfer argument
- with transfer type. Print transfer direction. Handle 1 and 2 byte
- transfers.
- (sim_core_read_unaligned_N, sim_core_write_unaligned_N): Trace
- unaligned accesses.
- (unsigned_M, T2H_M, H2T_M): Rename from unsigned_N, T2H_N, H2T_N.
- Update all functions.
-
- * sim-core.c: Generate functions starting with 16 not 1.
- (sim_core_read_unaligned_3): Generate. Ditto for 3 byte write and
- all 5, 6 & 7 byte transfers.
-
- * sim-n-core.h (sim_core_read_misaligned_N,
- sim_core_write_misaligned_N): Implement.
-
-Mon Nov 3 15:03:04 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-endian.h (U16_8): Implement
-
- * sim-endian.c (sim_endian_split_16, sim_endian_join_16): New functions
-
- * sim-endian.h (VL8_16, VH8_16): Implement.
-
- * sim-memopt.c (memory_option_handler): Typecast 64bit value to
- long in printf.
- (memory_option_handler): Only zalloc modulo bytes when non-zero.
- (memory_option_handler): Skip comma in alias address list
-
-Fri Oct 31 13:03:33 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-memopt.c (do_memopt_add, do_memopt_delete): Add level and
- space params.
- (parse_size, parse_addr): New functions
- (memory_option_handler, memory_options): Parse address & size
- using new functions. Pass level, space, modulo to do_memopt_add &
- do_memopt_del.
-
- * sim-memopt.h (struct _sim_memopt): Add level & space fields.
-
- * sim-core.h (sim_core_arrach, sim_core_detach): Replace
- `attach_type attach' argument with `unsigned level' argument.
- Document.
-
- * sim-core.c (new_sim_core_mapping, sim_core_map_attach,
- sim_core_attach): Replace argument attach with level. Update
- verification of arguments.
- (sim_core_map_detach, sim_core_detach): Replace argument attach
- with level.
-
- * sim-basics.h (enum _attach_type): Delete.
-
-Thu Oct 30 13:45:00 1997 Doug Evans <devans@seba.cygnus.com>
-
- * sim-core.h (sim_core_write_8): Define.
-
-Tue Oct 28 12:29:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-bits.h: Document ROTn macro.
-
- * sim-endian.h (H2T): Handle 16 byte variables.
-
- * sim-n-core.h (sim_core_read_unaligned_N): Return a dummy when an
- error.
-
- * sim-core.c: Do not generate sim_core_*_word.
-
- * sim-n-core.h (sim_core_trace_N): Add line_nr argument.
- (sim_core_write_aligned_N, sim_core_read_aligned_N): Update.
-
- * sim-core.h (sim_core_read_unaligned_word,
- sim_core_read_aligned_word, sim_core_read_word,
- sim_core_write_unaligned_word, sim_core_write_aligned_word,
- sim_core_write_word): Change to macros that map onto sim_core_*_N.
-
-Mon Oct 27 11:25:10 1997 Doug Evans <devans@canuck.cygnus.com>
-
- * sim-n-endian.h: Add TAGS entrys for 16 byte versions.
-
- * sim-endian.h: Disable 16 byte support.
-
-Mon Oct 27 12:00:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-endian.c (_SWAP_16): Define. Generate 126 bit swap code.
-
- * sim-n-core.h (sim_core_trace_N): New function.
- (sim_core_read_aligned_N, sim_core_write_aligned_N): Use,
- (sim_core_read_unaligned_N): Do not retyrn bogus value wden error.
-
- * sim-endian.h: Add 128 bit variant.
-
- * sim-core.h, sim-core.c: Add 128 bit variant.
-
- * sim-types.h: Add signed128 and unsigned128 types using a struct.
-
-Fri Oct 24 11:33:07 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-events.c (sim_events_process): Clear events->work_pending.
- (sim_events_tickn, sim_events_tick): Accumulate, instead of
- setting, nr_ticks_to_process.
- (sim_events_preprocess): Allow nr_ticks_to_process to be non-zero
- when the event queue isn't next.
-
- * sim-events.h, sim-events.c (sim_events_slip): New function.
-
-Wed Oct 22 14:18:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-hload.c (sim_load): Pass lma_p==0 and do_load=sim_load.
-
- * sim-utils.h, sim-load.c (sim_load_file): Add lma_p and do_load
- arguments.
-
-Tue Oct 21 18:37:57 1997 Doug Evans <devans@canuck.cygnus.com>
-
- * nrun.c (main): Remove useless test of name != NULL.
- Exit if bfd_openr fails. Call bfd_check_format after bfd_openr.
-
-Tue Oct 21 10:42:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-fpu.c (EXPMAX): Type is unsigned.
- (MIN_INT, MAX_INT): Type is signed64.
- (i2fpu): Type of val is signed64.
-
-Tue Oct 21 10:42:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-profile.h (PROFILE_PC_BUCKET_SIZE): Treat a shift of zero as
- a bucket size of zero.
-
- * sim-profile.c (OPTION_PROFILE_PC_GRANULARITY,
- OPTION_PROFILE_PC): Define.
- (profile_option_handler): Add support for --profile-pc and
- --profile-pc-granularity options.
- (profile_pc_init): When possible, compute nr buckets from bucket
- size.
-
- * sim-profile.c (profile_pc_init): Align the profile-pc end
- address with the profile-pc bucket size.
-
- * sim-profile.h (PROFILE_PC_NR_BUCKETS): Rename PROFILE_PC_SIZE to
- something less ambiguous.
- (PROFILE_PC_BUCKET_SIZE): Ditto for PROFILE_PC_SAMPLE_SIZE.
-
- * sim-profile.c (profile_pc_cleanup): New function. Move
- profile_pc_uninstall code to here.
- (profile_pc_uninstall): Call.
- (profile_pc_init): Call.
-
-Mon Oct 20 17:23:58 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-profile.c (profile_print_pc): Dump pc profile to dmon.out
- file using BSD gprof format.
-
- * sim-bits.h (LSBIT, MSBIT, BIT): Force result to type
- unsigned_word.
- (LSBIT8, LSBIT16, LSBIT32, LSBIT64, MSBIT8, MSBIT16, MSBIT32,
- MSBIT64): Force result to unsignedN.
-
-Thu Oct 16 11:38:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-alu.h (ALU16_BEGIN, ALU32_BEGIN, ALU64_BEGIN): Drop opening
- brace from macro.
- (ALU8_BEGIN, ALU8_SET, ALU8_ADD, ALU8_SUB, ALU8_NEGATE): Define.
- (ALU16_ADD, ALU16_SUB, ALU16_NEGATE): Simplify arrithmetic.
- (ALU32_ADD, ALU32_SUB, ALU32_NEGATE): Simplify arrithmetic.
- (ALU64_ADD, ALU64_SUB, ALU64_NEGATE): Simplify arrithmetic.
-
-Wed Oct 15 09:24:19 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-core.h (struct _sim_core_mapping): Change free_buffer to
- type void*.
-
- * sim-core.c (sim_core_uninstall, new_sim_core_mapping,
- sim_core_map_attach, sim_core_map_detach): Change free_buffer to
- type void*.
- (sim_core_attach): Rename buffer_freed to free_buffer, type
- void*. Ensure that allocated buffer is alligned according to
- region's address.
-
-Mon Oct 13 11:34:50 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-alu.h (ALU64_HAD_OVERFLOW): Define.
- (ALU64_SUB): Define.
-
- * Make-common.in (all): Build SIM_EXTRA_ALL first.
- (.gdbinit): Remove dependencies, generate once per build.
-
-Tue Oct 14 19:20:09 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-n-core.h (sim_core_read_aligned_N,
- sim_core_write_aligned_N): Make xaddr param type address_word not
- unsigned_word.
-
-Fri Oct 3 09:49:18 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-fpu.h, sim-fpu.c: Rewrite. Change sim_fpu object to an
- unpacked floating point struct. Pass sim_fpu object by reference.
- Add preliminary support for rounding modes.
-
-Fri Oct 3 09:28:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Thu Oct 2 19:43:52 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * aclocal.m4 (sim-bitsize): Fix typo, WITH_TARGET_WORD_BITSIZE not
- WITH_TARGET_BITSIZE.
-
-Thu Sep 25 23:20:20 1997 Felix Lee <flee@yin.cygnus.com>
-
- * sim-profile.c (profile_print_core): label needs empty statement.
-
-Thu Sep 25 11:20:47 1997 Stu Grossman <grossman@babylon-5.cygnus.com>
-
- * sim-break.c (sim_set_breakpoint sim_clear_breakpoint): Use ZALLOC
- and zfree instead of xmalloc and free. Prevents warnings.
-
-Wed Sep 24 17:38:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Wed Sep 24 17:23:31 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * Make-common.in (SIM_BITSIZE): Assign from configured value.
- (CONFIG_CFLAGS): Add SIM_BITSIZE.
-
- * aclocal.m4 (--enable-sim-bitsize): Developer option for
- controling the bitsize/msb of the target.
-
-Wed Sep 24 17:41:40 1997 Stu Grossman <grossman@babylon-5.cygnus.com>
-
- * Make-common.in: New files sim-break.c, sim-break.h.
- * sim-base.h: Add point to breakpoint list to sim_state_base.
- * sim-break.c sim-break.h: New modules that implement intrinsic
- breakpoint support.
- * sim-module.c: Add breakpoint module.
-
-Tue Sep 23 00:26:39 1997 Felix Lee <flee@yin.cygnus.com>
-
- * sim-events.c (SIM_EVENTS_POLL_RATE): poll more often than once
- an hour.
- * sim-n-core.h (WITH_XOR_ENDIAN): MSVC barfs on
- if (0) { 1 % 0; }
- * sim-core.c (sim_core_xor_write_buffer): WITH_XOR_ENDIAN + 1.
- (SIGBUS) define for Windows.
- * sim-trace.c (trace_printf,debug_printf): added ALMOST_STDC.
- * sim-resume.c: define SIGTRAP for windows.
- * sim-xcat.h: use token pasting if ALMOST_STDC.
-
-Tue Sep 23 11:04:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * Make-common.in (SIM_SCACHE, SIM_DEFAULT_MODEL): Assign
- configured values.
- (CONFIG_CFLAGS): Add same.
-
-Mon Sep 22 17:20:27 1997 Felix Lee <flee@cygnus.com>
-
- * sim-types.h (SIGNED64): ##i64 when _MSC_VER, not _WIN32.
- (SIGNED32): use ##i32.
-
-Tue Sep 23 11:04:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Tue Sep 23 10:07:47 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * aclocal.m4 (sim-endian): Simplify logic determining [default]
- endian of target.
-
- * Make-common.in (SIM_WARNINGS, SIM_ALIGNMENT, SIM_ENDIAN,
- SIM_HOSTENDIAN, SIM_RESERVED_BITS, SIM_ASSERT, SIM_FLOAT,
- SIM_HARDWARE, SIM_INLINE, SIM_PACKAGES, SIM_REGPARM, SIM_SMP,
- SIM_STDCALL, SIM_XOR_ENDIAN): Assign configured values.
- (CONFIG_CFLAGS): Add same.
-
- * aclocal.m4: Perform AC_SUBST on optional options.
-
-Mon Sep 22 11:46:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-config.h (WITH_DEFAULT_ALIGNMENT): Don't hardwire any alignment.
-
- * sim-options.c (standard_option_handler): Typo in warning message.
-
- * sim-base.h (STATE_MODEL): Make conditional on SIM_HAVE_MODEL.
-
- * sim-profile.c (profile_print_insn): Check 0 .. MAX_INSN for any
- insn count. Make count conditional on there being a valid
- INSN_NAME.
- (profile_pc_init): Make default PC profile frequency an arbitrary
- 256.
-
- * sim-base.h: Ditto.
-
- * sim-profile.h (WITH_PROFILE_MODEL_P): Only enable modeling when
- SIM_HAVE_MODEL.
-
- * sim-model.h (struct MACH): Depreciate, to be replaced by bfd
- archure struct.
-
-Mon Sep 22 11:46:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Mon Sep 22 11:45:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * aclocal.m4 (sim_alignment): Simplify logic for selecting the
- configured alignment.
-
-Fri Sep 19 17:45:25 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Fri Sep 19 17:26:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-config.c (sim_config): Check for default alignment.
-
- * sim-options.c (standard_option_handler): Add alignment option.
-
- * aclocal.m4 (sim_alignment): Allow configuration of hardwired and
- default alignment requirements on memory accesses.
-
-Fri Sep 19 11:51:35 1997 Jeffrey A Law (law@cygnus.com)
-
- * sim-load.c (sim_load_file): Return failure if the executable
- had no loadable sections.
-
-Wed Sep 17 13:33:28 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-events.c (ETRACE): Use trace_printf not sim_io_printf for
- trace output.
-
- * sim-core.c (sim_core_signal): When bad access halt simulator
- SIGSEGV / SIGBUS instead of aborting.
- (signal.h): Include.
-
- * sim-watch.c (sim_watchpoint_install): Handler for watchpoint
- options was missing.
-
- * sim-bits.h (MOVED): Define
-
-Wed Sep 17 10:33:28 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-alu.h (ALU32_HAD_OVERFLOW): Pacify GCC, Use MSBIT instead of
- BIT.
-
- * sim-bits.h (LSBIT, MSBIT): Check for overflow of shift value.
-
- * sim-bits.c: Add 8 bit versions of bit macros.
-
- * sim-bits.h: Ditto.
-
-Tue Sep 16 16:15:16 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-bits.c (LSSEXT, MSSEXT): Replace SEXT.
- (LSINSERTED, MSINSERTED): Ditto for INSERTED.
-
- * sim-n-bits.h (MSSEXTn, LSSEXTn): Replace SEXTn.
- (LSINSERTDn, MSINSERTEDN): Ditto for INSERTEDn.
-
- * sim-bits.h (SEXT*): Define as MSEXT/LSEXT.
- (INSERTED*): Ditto for LSINSERTED/MSINSERTED.
-
-Mon Sep 15 17:36:15 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * aclocal.m4 (SIM_AC_COMMON): Add optional config.h file argument.
- configure.in: Output to cconfig.h instead of config.h.
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Mon Sep 15 15:39:28 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-utils.c (sim_analyze_program): Set STATE_ARCHITECTURE from
- BFD if known.
-
-Tue Sep 9 21:46:46 1997 Felix Lee <flee@cygnus.com>
-
- * callback.c (os_write): divert stdout and stderr to their
- respective hooks.
-
-Thu Sep 11 10:08:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-profile.c (profile_print_speed): Call
- sim_events_elapsed_time instead of PROFILE_EXEC_TIME for moment.
-
- * sim-events.c (sim_events_elapsed_time): New function return nr
- host MS consumed by the simulator.
- (sim_watch_valid): Use.
-
- * sim-module.c (modules): Install sim_events very very early.
-
- * sim-profile.c (profile_print): Call profile_print_pc.
- (print_bar):
- (profile_pc_init): New function, set up processor for PC
- profiling.
- (profile_print_pc): New function, print a PC profile.
- (profile_pc_event): New function, sample PC.
-
- * sim-profile.h (PROFILE_PC_COUNT, PROFILE_PC_START,
- PROFILE_PC_END, PROFILE_PC_SHIFT, PROFILE_PC_SAMPLE_SIZE): Add to
- profile struct.
-
- * sim-options.c (sim_print_help): Pacify GCC.
-
- * sim-n-core.h (sim_core_read_aligned_N,
- sim_core_write_aligned_N): Add un-conditional profile call.
- (sim_core_read_unaligned_N, sim_core_write_unaligned_N): Add
- profile call when aligned read/write isn't used.
-
- * sim-base.h: Include sim-profile, sim-model after sim-core &
- sim-events allow sim-core to define useful values.
-
- * sim-profile.c (OPTION_PROFILE_CORE): Define.
- (profile_option_handler, profile_options): Add support for
- --profile-core option.
- (print_bar): Include when core profiling.
- (profile_print_core): New function, print core profile.
-
- * sim-config.c (print_sim_config): Print profile status.
-
- * sim-profile.h (PROFILE_NEXT_IDX, PROFILE_core,
- WITH_PROFILE_PC_P): Define.
- (PROFILE_CORE_COUNT): Count each core-map/size separatly.
- (PROFILE_COUNT_CORE): Define.
-
-Thu Sep 11 08:44:52 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-watch.c (handle_watchpoint): Pass a char** index into the
- interrupt_names array as the data.
- (sim-watch.h): Document.
-
-Wed Sep 10 16:15:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-options.c (sim_print_help): When the doc string is to long
- word wrap it.
-
- * sim-watch.c (sim_watchpoint_install): Use option.doc_name so
- that only the first few the watch options are listed. Generate
- meanginful usage messages.
-
- * sim-options.h (struct OPTION): Clarify use of doc_name field
-
-Wed Sep 10 13:23:24 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-options.c (OPTION_ARCHITECTURE_INFO): New option.
- (standard_option_handler): Handle --architecture-info.
-
-Tue Sep 9 21:46:46 1997 Felix Lee <flee@cygnus.com>
-
- * sim-core.h (sim_cpu_core): [WITH_XOR_ENDIAN + 1], to avoid
- illegal zero-sized array.
- * sim-core.c (sim_core_xor_read_buffer): same.
-
-Tue Sep 9 11:20:35 1997 Doug Evans <dje@canuck.cygnus.com>
-
- * nltvals.def: Regenerate.
-
-Tue Sep 9 02:10:36 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-fpu.c (DP_FRACHIGH2): Define LL using SIGNED64.
-
-Mon Sep 8 12:22:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-bits.c (MASKED): Delete.
- (EXTRACTED): Delete.
- (LSEXTRACTED, MSEXTRACTED): New functions.
-
- * sim-n-bits.h (MASKEDn): Delete, define as MSMASKED or LSMASKED.
- (MSMASKEDn, LSMASKEDn): Add last argument.
- (MSMASK*): Ditto.
-
- * sim-bits.h (EXTEND8, EXTEND16): Define.
- (EXTRACTED64): Define as 64 bit extract, not 32 bit.
-
- * sim-run.c (sim_engine_run): Use CPU_CIA macro.
-
- * sim-engine.h (SIM_ENGINE_HALT_HOOK): Use CPU_CIA to get at
- current instruction address.
-
- * sim-inline.h (*_ENGINE): Define.
-
-Fri Sep 5 08:39:02 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-core.c (sim_core_attach): Fix checks of modulo/mask.
-
- * sim-watch.c (delete_watchpoint): Delete by ident and type.
- (watch_option_handler): Call delete_watchpoint with ident or type.
- (sim_watchpoint_install): Create interrupt specific watchpoint
- commands on the fly.
- (do_watchpoint_create): New function, create a watch point using
- type/int-nr info encoded in the option nr.
- (do_watchpoint_info): New function. List active watchpoints.
-
- * sim-watch.h: Change data structure to a list.
-
- * sim-memopt.c (memory_option_handler): Require explicit "all"
- before deleting all memory regions.
-
- * sim-utils.c (sim_do_commandf): New function, printf version of
- sim_do_command.
-
- * sim-basics.h (asprintf, vasprintf): Hack, define for CYGWIN32.
-
- * sim-alu.h (ALU64_ADD): Use explicit MSEXTRACTED64, do not assume
- bit endianness.
- (SIGNED64, UNSIGNED64): Delete.
- (ALU64_ADD): Don't rely on bit endianness.
- (ALU64_BEGIN): Define.
-
- * sim-n-bits.h (MSEXTRACTEDn, LSEXTRACTED): New functions.
- (EXTRACTEDn): Delete, define as either LSEXTRACTED or MSEXTRACTED.
-
- * sim-types.h (SIGNED64, UNSIGNED64): New macros, attach relevant
- suffix - u64, LL - to 64 bit constants.
-
-Thu Sep 4 09:27:54 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-config.c (sim_config): Add assert for SIM_MAGIC_NUMBER.
-
- * sim-utils.h (NZALLOC): Define - zalloc * N.
-
- * sim-hrw.c (sim_read, sim_write): New file. Provide generic
- implementation of read/write functions.
-
- * Make-common.in (sim-hrw.o): New target.
-
- * sim-base.h (STATE_MEMOPT_P): Delete, simulators _always_ add
- memory.
-
- * sim-memopt.c (memory_option_handler): Implement memory-size
- command. Implement memory-alias command. Let memory-delete delete
- all memory regions.
- (add_memopt): New function. Add a memory region.
- (do_memopt_delete): New function. Delete a memory region.
-
- * sim-utils.c (sim_elapsed_time_get): Never return zero.
-
- * sim-core.c (sim_core_detach): New function.
- (sim_core_map_detach): New function. Perform the actual detach.
- (sim_core_init): Move initialization code from here.
- (sim_core_install): To here.
- (sim_core_uninstall): And here.
-
- * sim-module.c: Add memopt module.
-
- * sim-base.h (STATE_MEMOPT, STATE_MEMOPT_P): Add memopt to
- simulator base type.
-
- * Make-common.in (sim_main_headers): Add sim-memopt.h
- (sim-memopt.o): New target.
-
- * sim-core.c (sim_core_install): Add core_options to the option
- table.
-
- * sim-watch.c (watch_options): Make --delete-watch a synonym for
- --watch-delete.
-
- * sim-config.h (WITH_MODULO_MEMORY): Define as 0. Update
- comments.
-
- * sim-core.h (struct _sim_core_mapping): Change nr_bytes to type
- address_word, add mask member.
-
- * sim-core.h, sim-core.c (sim_core_attach): Make nr_bytes of type
- address_word, allow for 64bit targets in 32bit host. Add modulo
- argument.
- (sim_core_map_attach): Ditto.
- (new_sim_core_mapping): Ditto.
- (sim_core_translate): Mask address when modulo memory.
-
-Wed Sep 3 17:32:54 1997 Doug Evans <dje@seba.cygnus.com>
-
- * sim-hload.c (sim_load): Add assert for SIM_MAGIC_NUMBER.
-
- * gdbinit.in: New file.
- * aclocal.m4 (SIM_AC_OUTPUT): Build .gdbinit.
- * Make-common.in (distclean): Delete .gdbinit.
- (.gdbinit): Add rule for.
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
- * Make-common.in (cgen-run.o): Add rule for.
-
-Wed Sep 3 10:08:21 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-resume.c (sim_resume): Suspend/resume the simulator.
-
- * sim-events.c (sim_watch_valid): Compute total elapsed time from
- both resumed and previous elapsed time.
- (sim_events_init): Set initial_wallclock and current_wallclock to
- zero.
- (sim_events_install): Install sim_events_suspend and
- sim_events_resume.
- (sim_events_watch_clock): Allow for suspended simulator when
- computing the time of the clock event.
-
- * sim-events.h (struct _sim_event): Add resume_wallclock, rename
- initial_wallclock to elapsed_wallclock, set both to zero.
- (sim_events_init, sim_events_uninstall): Delete prototypes.
-
- * sim-module.h (MODULE_SUSPEND_FN, MODULE_RESUME_FN): Define types.
-
- * sim-module.c(sim_module_resume, sim_module_suspend): New
- functions.
-
-Wed Sep 3 10:08:21 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-core.c (sim_core_map_attach): Clarify memory overlap error
- message.
-
-Tue Sep 2 14:57:06 1997 Doug Evans <dje@canuck.cygnus.com>
-
- * Makefile.in (TAGS): Add support for "/* TAGS: foo */" marker.
- * Make-common.in (TAGS): Likewise.
- * sim-n-bits.h: Add TAGS comments for all functions.
- * sim-n-core.h: Likewise.
- * sim-n-endian.h: Likewise.
-
-Mon Sep 1 10:50:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-utils.c (sim_state_alloc): Set CPU backlinks, callback and
- kind.
-
- * sim-base.h (sim_state_alloc): Add callback and kind arguments.
-
- * sim-base.h (INVALID_INSTRUCTION_ADDRESS): Add default
- definition.
-
-Sat Aug 30 09:47:21 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-fpu.c (DP_GARDMSB, ...): Make unsigned.
- (DP_FRACHIGH, DP_FRACHIGH2, ..): Use MSMASK to avoid LL.
-
-Fri Aug 29 13:37:44 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-core.c (sim_core_map_attach): Cast attach enum to int.
- (sim_core_xor_read_buffer, sim_core_xor_write_buffer): Make
- nr_transfered and nr_this_transfer unsigned.
-
- * sim-events.c (sim_events_tickn): N is signed, as limited to
- MAXINT.
-
- * sim-n-endian.h (offset_N): Change size to unsigned.
-
- * callback.c (os_poll_quit): Add prototypes for kbhit and getkey.
-
-Fri Aug 29 10:10:53 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-utils.c (sim_copy_argv): Delete, replaced by dupargv.
-
- * sim-options.c (sim_parse_args): Use dupargv.
-
-Thu Aug 28 10:36:34 1997 Doug Evans <dje@canuck.cygnus.com>
-
- * sim-options.c (standard_option_handler): Use xstrdup, not strdup.
-
-Thu Aug 28 12:09:15 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-base.h (STATE_ARCHITECTURE, STATE_TARGET): Add to simulator
- base type.
-
- * sim-options.c (standard_options): Add --architecture=MACHINE and
- --target=TARGET options.
- (OPTION_ARCHITECTURE, OPTION_TARGET): Define.
- (standard_option_handler): Handle architecture and target options.
- (bfd.h): Include.
-
- * sim-utils.c (sim_analyze_program): Pass STATE_TARGET to
- bfd_openr.
- (sim_analyze_program): Set prog_bfd architecture from
- STATE_ARCHITECTURE if known.
-
-Wed Aug 27 18:13:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
- * config.in: Ditto.
-
-Wed Aug 27 18:11:30 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * aclocal.m4 (enable-sim-warnings): Remove comment stating
- that option does not apply to certain files.
-
-Wed Aug 27 15:13:04 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-bits.h (LSBIT8, LSBIT16, LSBIT32, LSBIT64, LSBIT, MSBIT8,
- MSBIT16, MSBIT32, MSBIT64, MSBIT): New macros - single bit as
- offset from MSB/LSB.
-
- * sim-endian.h (A1_8, A2_8, A4_8, A1_4, A2_4, A1_2): New macro,
- access address of sub word quantity of a hosts 16, 32, 64 bit word
- type.
- (V1_2, V1_4, V2_4, V1_8, V2_8, V4_8): Ditto for values.
- (U8_1, U8_2, U8_4, U4_1, U4_2, U2_1): Ditto for set of values.
- (V2_H1, V2_L1, V4_H2, V4_L2, V8_L4, V8_H4): Given N byte argument,
- return N*2 byte value with argument in Hi/Lo word. Renamed from
- V1_H2, V1_L2, V2_H4, V2_L4, V4_H8, V4_L8.
-
- * sim-alu.h (ALU32_HAD_OVERFLOW): Use 64 bit mask not 32bit.
- (ALU16_HAD_CARRY, ALU32_HAD_CARRY, ALU16_HAD_OVERFLOW): Use MSBIT
- so that bit offset is explicit.
-
-Wed Aug 27 11:55:35 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-utils.c (sim_analyze_program): Add prog_name argument.
- Update STATE_PROG_BFD when needed with a dup'd copy of the
- program.
-
- * sim-config.c (sim_config): Delete ABFD argument, use
- STATE_PROG_BFD directly.
-
-Tue Aug 26 12:55:26 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * run.c (main): Pass the open ABFD to sim_create_inferior.
-
- * nrun.c (main): Determine prog_bfd. Pass to sim_create_inferior
- and sim_load.
- (bfd.h): Include.
-
- * sim-hload.c (sim_load): New file. Implement generic sim_load for
- hardware only simulator targets.
-
- * Make-common.in (sim-hload.o): Add rule.
-
-Wed Aug 27 09:51:42 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-utils.c (sim_copy_argv): Rewrite to match malloc strategy
- used by copyargv and freeargv.
-
- * sim-options.c (sim_parse_args): Save a copy of PROG-ARGS in
- STATE_PROG_ARGV, not just a pointer.
-
-Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
- * config.in: Ditto.
-
-Mon Aug 25 12:11:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * aclocal.m4 (sim-endian): Add second argument to
- SIM_AC_OPTION_ENDIAN. First is hardwired endian, second is
- default endian when not hardwired.
-
- * sim-config.h (WITH_DEFAULT_TARGET_BYTE_ORDER): New macro, if all
- else failes value for target byte order.
-
- * sim-config.c (sim_config): Add abfd arguments. Set
- STATE_PROG_BFD accordingly. Determine prefered_target_byte_order
- from same.
- (sim_config): Return SIM_RC, don't abort.
- (bfd.h): Include.
-
- * run.c (main): Update call to sim_open - add ABFD argument.
- * nrun.c (main): Add NULL ABFD argument.
-
-Thu Aug 14 12:48:57 1997 Doug Evans <dje@canuck.cygnus.com>
-
- * callback.c (os_poll_quit): Make static.
- Call sim_cb_eprintf, not p->eprintf.
- (sim_cb_printf, sim_cb_eprintf): New functions.
- * sim-utils.h (sim_cb_printf, sim_cb_eprintf): Declare.
-
- * sim-basics.h (zalloc,zfree,sim_add_commas,SIM_ELAPSED_TIME,
- sim_elapsed_time_get,sim_elapsed_time_since): Move decls to
- sim-utils.h. #include sim-utils.h.
- * sim-utils.h: Above decls moved here.
- (sim_analyze_program,sim_load_file): Use `struct _bfd', not `bfd'.
-
- * sim-watch.c (action_watchpoint): Fix thinkos.
-
-Thu Jul 24 08:48:05 1997 Stu Grossman (grossman@critters.cygnus.com)
-
- * sim-types.h: Fix defs of 64 bit data types for MSVC.
-
-Tue Jul 22 10:35:37 1997 Doug Evans <dje@canuck.cygnus.com>
-
- * sim-n-core.h (sim_core_write_unaligned_N): Add missing break
- to FORCED_ALIGNMENT case.
-
-Thu Jun 5 13:48:37 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * callback.c (target_to_host_open): Handle hosts with O_BINARY.
-
-Thu Jun 5 08:47:10 1997 Jeffrey A Law (law@cygnus.com)
-
- * Make-common.in (libsim.a): Fix typo.
-
-Thu Jun 5 13:48:37 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * nrun.c (main): Verify the structure returned before using it.
-
-Wed Jun 4 11:44:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-config.h (WITH_ENGINE): Enable the sim-engine module by
- default.
-
- * sim-engine.c (sim_engine_install): New function. Install the
- engine init functions.
- (sim_engine_init): [Re]initialize the simulator engine.
-
- * sim-module.c: Add sim_engine to list of modules that always
- install.
-
-Tue Jun 3 04:52:04 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-watch.c (schedule_watchpoint): Use sim_unschedule_watchpoint
- to remove the old watchpoint, not delete_watchpoint.
- (watch_option_handler): Action the correct watchpoint, not just
- cycles.
-
-Wed May 28 14:47:41 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-n-core.h (sim_core_write_aligned_N): For 8byte reads, output
- both low and high word.
- (sim_core_write_aligned_N): Ditto.
-
- * sim-trace.c (set_trace_options): Delete code explicitly setting
- core->trace.
-
- * sim-options.c (sim_print_help): Call the list commands if not a
- standalone simulator.
- (sim_print_help): Advise that some options may not be applicable.
-
- * sim-trace.c (set_trace_options): Assume core present.
-
- * sim-events.c (sim_events_schedule_after_signal): Overflow signal
- buffer when full not almost full.
-
-Tue May 27 14:32:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-events.c (sim_events_process): Don't blat the event queue
- when processing watchpoints.
-
- * sim-watch.h: Make arg unsigned long - stop sign extension.
-
- * sim-events.c (sim_watch_valid): rewrite so debugable.
-
- * sim-config.h (WITH_XOR_ENDIAN): Default to zero.
-
- * sim-watch.c (schedule_watchpoint): Add is_within option so that
- inequality test is possible.
- (handle_watchpoint): Re-pass is_within arg.
- (watch_option_handler): When `!' prefix to pc-watchpoint arg pass
- 0 to schedule_watchpoint's is_within arg.
- (sim_watchpoint_init): Re-pass is_within arg.
-
- * sim-options.c (sim_print_help): Add is_command argument. Don't
- include -- prefix when called from the command line interpreter.
-
- * sim-watch.c (schedule_watchpoint): Pass true is_within argument.
-
- * sim-events.c (sim_events_watch_sim): Add is_within argument,
- zero indicates that the test should be reversed.
- (sim_events_watch_core): Ditto.
- (WATCH_CORE): Compare range against is_within.
- (WATCH_SIM): Ditto.
-
-Tue May 27 12:48:03 1997 Andrew Cagney <cagney@b2.cygnus.com>
-
- * sim-events.c (WATCH_CORE): Pass NULL cpu argument to
- sim_core_read_buffer. Check nr-bytes transfered.
-
- * sim-core.h (sim_core_common): Define a new struct that contains
- the common data. to sd and cpu structures.
- * sim-core.c (sim_core_attach): Update.
- (sim_core_init): Update. Remember to copy initialized data to each
- cpu.
- (sim_core_find_mapping): Ditto.
-
- * sim-core.c (sim_core_read_buffer): Add cpu argument.
- (sim_core_write_buffer): Ditto.
-
- * sim-n-core.h (sim_core_read_unaligned_N): When mis-aligned
- transfer use xor version of read buffer.
- (sim_core_write_unaligned_N): Ditto for write.
-
- * sim-core.c (sim_core_xor_read_buffer): New function implement
- xor-endian data read breaking transfer up into xor-endian sized
- blocks.
- (sim_core_xor_write_buffer): Ditto for write.
- (reverse_n): Reverse order of arbitrary number of bytes in buffer
- - needed for xor-endian transfers.
-
-Fri May 23 14:24:31 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-inline.h: Review description.
-
- * sim-core.h, sim-core.c: Reduce number of functions being inlined
- to just those involved in data transfers and configuration.
-
- * sim-xcat.h (XSTRING): New macro, map macro definition onto
- string.
- * sim-n-core.h (sim_core_read_aligned_N): Use.
- (sim_core_read_unaligned_N): Ditto.
- (sim_core_read_unaligned_N): Ditto..
- (sim_core_write_unaligned_N): Ditto.
-
- * sim-core.h: Add xor endian bitmap to main structure. *
-
- sim-n-core.h (sim_core_write_aligned_N): Add suport for xor
- endian.
- (sim_core_read_aligned_N): Ditto.
-
- * sim-core.c (sim_core_set_xor_endian): New function.
- (sim_core_attach): Don't overwrite the per-cpu xor map when
- cloning the global core.
-
-Fri May 23 10:53:13 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-engine.h: Update below so that it is using an enumerated
- type.
-
-Thu May 22 09:12:16 1997 Gavin Koch <gavin@cygnus.com>
-
- * sim-engine.c (sim_engine_restart):
- * sim-resume.c (sim_resume): Change longjmp param/setjmp
- return value used for simulator restart from 0 to 2.
-
-Wed May 21 08:47:30 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * cgen-scache.c (scache_option_handler): Add is_command arg.
-
- * sim-model.c (model_option_handler): Add is_command argument.
-
- * sim-profile.c (profile_option_handler): Add is_command arg.
-
- * sim-events.c (sim_watch_valid): Use ub64, lb64 when 64bit value
- involved.
-
- * sim-module.c (sim_module_add_init_fn): Call init fn in the same
- order that they are registered.
-
- * sim-options.h (OPTION_HANDLER): Add argument to differentiate
- between option and command line processing.
-
- * sim-options.c: Include stdlib.h, ctype.h.
-
- * Make-common.in (sim-watch.o): Add rule.
- (sim_main_headers): Assume sim-assert.h included.
- (sim-*.o): Simplify make rule.
-
- * sim-module.c: Add sim_watch_install to module list.
-
-Tue May 20 14:15:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-base.h (STATE_LOADED_P): New predicate. Set once everything
- has been loaded.
-
- * sim-trace.c (trace_install): Check magic. Include sim-assert.h.
- * sim-events.c (sim_events_install): Ditto.
- * sim-core.c (sim_core_install): Ditto.
- * sim-model.c (model_install): Ditto.
- * sim-options.c (standard_install): Ditto.
- * sim-profile.c (profile_install): Ditto.
- * sim-reason.c (sim_stop_reason): Ditto.
- * sim-run.c (sim_engine_run): Ditto.
- * sim-utils.c (sim_analyze_program): Ditto.
-
- * sim-module.c (modules): Make profile_install and trace_install
- optional.
-
- * sim-base.h (STATE_MEM_BASE): Define for flat memory systems.
-
- * sim-options.c (standard_option_handler): Set the byte order.
-
- * sim-events.c (sim_events_process): Allow multi tick processing.
- (sim_events_tickn): New function - multi cycle tick.
-
- * sim-events.h (sim_events_tickn, sim_events_timewarp): Add
- prototypes. Under development.
- (sim_events): Replace processing with nr_ticks_to_process.
-
-Tue May 20 09:39:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * nrun.c (main): Pass callbacks to sim_open instead of using
- sim_set_callbacks.
-
- * run.c (main): Ditto.
-
-Mon May 19 12:07:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-events.c (sim_events_zalloc): Signal save memory allocator -
- stop tk interrupting malloc calls.
- (sim_events_zalloc): Converse.
-
- * Make-common.in (sim_main_headers): Add sim-events.h.
-
- * sim-events.c (sim_events_schedule_after_signal): Change return
- type to void - signal events are strictly internal.
- (sim_events_init): Allocate a finite buffer for signal events.
- (sim_events_schedule_after_signal): Enter signal events into the
- signal buffer.
-
- * sim-engine.c (sim_engine_halt): Check SIM_DESC magic.
- (sim_engine_restart): Ditto.
- (sim_engine_abort): Ditto.
- * sim-stop.c (sim_stop): Ditto.
- (control_c_simulation): Ditto.
- * sim-resume.c (sim_resume): Ditto.
- (has_stepped): Ditto.
- * sim-abort.c (sim_engine_abort): Ditto.
-
- * sim-basics.h (transfer_type): New type.
-
- * sim-core.c (sim_core_signal): New function. Print core signal
- information.
- (sim_core_find_mapping): Add transfer argument.
-
- * sim-n-core.h (sim_core_{write,write}_unaligned_N): Call
- SIM_CORE_SIGNAL if a recoverable abort.
- * sim-core.c (sim_core_find_mapping): Ditto.
-
-Fri May 16 15:13:21 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-core.c (sim_core_find_mapping): Replace calls to
- sim_io_error to more resiliant sim_engine_abort.
-
- * sim-n-core.h (sim_core_read_unaligned_N): Ditto.
- (sim_core_write_unaligned_N): Ditto.
-
-Tue May 13 13:50:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-module.c: Add sim_events_install to list.
-
- * sim-events.c (sim_events_install, sim_events_uninstall): Clonse
- from sim_core_*.
- (sim_events_init): Now returns SIG_RC.
-
- * sim-run.c: New file. Generic sim_engine_run.
- * sim-reason.c: New file. Generic sim_stop_reason.
- * sim-stop.c: New file. Generic sim_stop.
- * sim-resume.c: New file. Generic sim_resume.
-
- * Make-common.in (sim-engine.o): Add rule.
- (sim-run.o, sim-reason.o, sim-stop.o, sim-resume.o): Ditto.
-
- * sim-engine.h, sim-engine.c: New file. Provide generic
- implementation of sim_engine_halt, sim_engine_error. et.al.
-
- * sim-base.h (sim_state_base): Add member halt.
- (sim-engine.h): Include.
-
- * sim-events.h (sim_event_handler): Always pass SIM_DESC to event
- handlers.
- * sim-events.c (sim_events_poll): Update event handler.
-
-Tue May 13 09:57:49 1997 Andrew Cagney <cagney@b2.cygnus.com>
-
- * sim-events.h, sim-events.c (sim_events_watch_clock): New
- function.
- (sim_events_watch_sim): New function.
- (sim_events_watch_core): New function.
- (sim_watch_valid): New function.
- (sim_events_preprocess): New function.
- (sim_events_process): Process the watchpoints as well as the timer
- queue.
- (sim_events_tick): Check WORK_PENDING instead of the hold queue.
- (sim_events_deschedule): Check all the queues when removing an
- event.
- (sim_events_init): Ditto for cleaning.
-
-Mon May 19 12:07:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-fpu.c (is_ufpu_number): Comment out - currently unused.
-
-Mon May 19 11:23:03 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * callback.c (os_open): Type of arg flags is int.
-
-Fri May 16 22:26:43 1997 Michael Meissner <meissner@cygnus.com>
-
- * sim-fpu.c (sim_fpu_is_{eq,ne,lt,le,gt,ge}): Compare Infinities
- just like normal numbers as per IEEE rules.
-
-Wed May 14 21:20:38 1997 Bob Manson <manson@charmed.cygnus.com>
-
- * callback.c (os_close): Mark the descriptor as being
- available if the close succeeded.
- (os_open): Pass 0644 as the mode of the file being created.
-
-Thu May 15 10:58:52 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-fpu.c (pack_fpu, unpack_fpu): New functions - decode a
- float.
-
- * sim-inline.c (SIM_INLINE_C): Rename from _SIM_INLINE_C_.
- * sim-lnline.h: Update.
-
- * sim-fpu.h, sim-fpu.c (sim_fpu_[iu]{32,64}to): New int2fp
- conversion functions.
- (sim_fpu_to{32,64}[iu]): New fp2int functions.
-
- * sim-fpu.h, sim-fpu.c (sim_fpu_is_{lt,le,eq,ne,ge,gt}): New fp
- compare functions. Replacing.
- (sim_fpu_cmp): This. Delete.
-
-Mon May 12 14:49:05 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-core.c (sim_core_find_mapping): Call engine_error not
- sim_io_error when possible.
-
-Mon May 12 08:55:07 1997 Andrew Cagney <cagney@b2.cygnus.com>
-
- * sim-endian.h (V1_H2): Add macro's to insert a word into a
- high/low double word.
-
- * sim-trace.h: Remove definition of attribute - defined in
- sim_basics.h.
-
-Mon May 12 08:55:07 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-options.h (struct OPTION): Add doc_opt as the documenting
- name of the option - or family of options.
-
- * sim-options.c (sim_args_command): Match command `a-b c' with
- option `--a-b-c' from option table.
-
-Thu May 8 12:40:07 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-options.c (sim_print_help): For optional arguments, wrap
- them in [].
-
- * sim-trace.c (set_trace_options): New function, handle optional
- argument and multiple assignment.
- (trace_option_handler): Update.
-
- * sim-trace.c (trace_option_handler): Trace branch and not fpu
- when branch tracing selected.
-
-Wed May 7 15:19:58 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-trace.c (trace_one_insn): Make a va-args function.
-
- * sim-trace.c (trace_vprintf): New function, va-arg version of
- trace_printf.
-
-Tue May 6 16:38:16 1997 Doug Evans <dje@canuck.cygnus.com>
-
- * sim-trace.c (trace_uninstall): Don't close a file twice.
- * sim-profile.c (profile_uninstall): Likewise.
-
-Tue May 6 06:14:01 1997 Mike Meissner <meissner@cygnus.com>
-
- * sim-trace.c (toplevel): Include bfd.h.
- (trace_options): Note that --trace-linenum also turns on
- --trace-insn. Add --trace-{branch,semantics}.
- (trace_option_handler): If --trace-linenum, also turn on
- --trace-insn. Add --trace-branch support. If --trace-semantics,
- turn on ALU, FPU, branch, and memory tracing.
- (trace_one_insn): New function to trace an instruction. Support
- --trace-linenum.
- (OPTION_TRACE_*): Use an enum, rather than lots of defines.
-
- * sim-trace.h (TRACE_{SEMANTICS,BRANCH}_IDX): Add new macros.
- (MAX_TRACE_VALUES): Use 32, not 12 by default.
- (TRACE_branch): Add new mask.
- (TRACE_*_P): Define all possible trace_p macros.
- (trace_one_insn): Declare function.
-
-Mon May 5 14:08:34 1997 Mike Meissner <meissner@cygnus.com>
-
- * sim-trace.h (__attribute__): Define as nothing if not GNU C or
- GNU C doesn't support __attributes__.
- ({trace,debug}_printf): Add attribute's so -Wformat can check the
- format strings.
-
-Mon May 5 11:16:12 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-config.h (FORCED_ALIGNMENT): New alignment option -
- addresses are masked forcing them to be correctly aligned.
- (WITH_ALIGNMENT): Make NONSTRICT_ALIGNMENT the default.
- * sim-config.c (config_alignment_to_a): Update.
-
- * sim-core.h (sim_cpu_core): New data type contains cpu specific
- core data.
- * sim-base.h (CPU_CORE): Add cpu specific core data to cpu base
- type.
- * sim-core.c (sim_core_attach): Add CPU argument. Ready for
- processor specific core maps.
- (sim_core_map_attach): Copy the core map data to each of the
- processor specific core data structures.
- * sim-core.c (sim_core_find_mapping): Update.
-
- * sim-n-core.h (sim_core_read_N, sim_core_write_N): Rename.
- (sim_core_write_aligned_N, sim_core_write_aligned_N): New names.
- (sim_core_write_unaligned_N, sim_core_write_unaligned_N): New
- alternatives that handle unaligned addresses.
- (sim_core_{read,write}_{,un}aligned_N): Drop SIM_DESC arg, replace
- with just CPU arg.
- * cgen-utils.c (sim_disassemble_insn): Update.
-
-Mon May 5 13:19:16 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-trace.h (TRACE_FPU_IDX): Add Floating-point specific
- tracing.
-
- * sim-fpu.h, sim-fpu.c: New files - prototype for generic target
- fpu support.
-
- * sim-inline.h, sim-inline.c: Add support for SIM_FPU.
-
-Fri May 2 17:59:42 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-core.c (sim_core_map_to_str): New function ascii equivalent
- to map type.
-
- * sim-n-core.h (sim_core_read_N, sim_core_write_N): Use in trace
- statement.
-
-Fri May 2 17:28:02 1997 Andrew Cagney <cagney@b2.cygnus.com>
-
- * cgen-trace.c: Prepend additional trace_printf argument.
-
- * cgen-utils.c (sim_disassemble_insn): Add additional core
- arguments.
-
-Fri May 2 11:40:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * nrun.c (main): Catch/report errorenous simulator states.
-
- * sim-module.c: #include "libiberty.h" so that xmalloc is defined.
- * sim-trace.c: #include string.h/strings.h so that memset is
- defined.
- * sim-utils.c: Ditto.
- * sim-profile.c: Ditto. And stdlib.h.
- (print_bar): Only define when used by instruction or memory profiler.
-
- * sim-options.c (standard_option_handler): Make ul more local.
-
- * sim-load.c (sim_load_file): Make the name constant.
- (sim_load_file): Passify gcc.
-
- * sim-utils.h: New file, pre-declare utilites in corresponding .c
- file.
- * sim-utils.c, sim-load.c: Include sim-utils.h.
-
- * sim-base.h (sim_cpu): Pre define here so available to all.
-
- * sim-core.h (DECLARE_SIM_CORE_WRITE_N, DECLARE_SIM_CORE_READ_N):
- Restore the sim_cpu and instruction_address arguments so that full
- information is available to the abort function.
- * sim-core.c (sim_core_find_mapping, sim_core_write_buffer): Ditto.
- * sim-n-core.h (sim_core_write_N, sim_core_read_N): Update.
-
- * sim-trace.h, sim-trace.c (trace_option_handler): Add interim
- tracing support for sim-events and sim-core.
- (trace_option_handler): Convert #if to if where possible so always
- compiled/checked by C compiler.
- * sim-n-core.h (sim_core_write_N, sim_core_read_N): Update.
-
- * sim-base.h: Adjust comment documenting how to define the cpu
- structure.
- (sim_state_base): Add sim_core and sim_events to simulator base
- object.
-
- * sim-trace.h, sim-trace.c (trace_printf): Add SIM_DESC argument.
- * sim-core.c (sim_core_init, sim_core_attach,
- sim_core_find_mapping): Update.
- * sim-events.c (ETRACE, sim_events_init, sim_events_time,
- update_time_from_event, insert_sim_event,
- sim_events_schedule_after_signal, sim_events_deschedule,
- sim_events_tick): Ditto.
-
- * sim-basics.h (sim-module.h, sim-trace.h, sim-profile.h,
- sim-model.h): Move #includes from here.
- * sim-base.h: To here.
- (sim-core.h, sim-events.h, sim-io.h): Include also
-
-Wed Apr 30 15:37:54 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * callback.c (default_callback): Missing initialisers.
-
-Thu May 1 10:40:47 1997 Doug Evans <dje@canuck.cygnus.com>
-
- * sim-utils.c (sim_add_commas): New function.
- * sim-basics.h (sim_add_commas): Add prototype.
- * cgen-scache.c (scache_print_profile): Print commas in numbers.
- * sim-profile.c (COMMAS): New macro.
- (print_*): Use it to print commas in numbers.
-
- * configure: Regenerated.
-
- * cgen-sim.h (sim_signal_type): Add SIM_SIGINT.
- (cgen_state): New member run_fast_p.
- (cgen_init): Add prototype.
- (sim_disassemble_insn): New arg `cpu'.
- * cgen-trace.c (trace_insn): Update call to sim_disassemble_insn.
- * cgen-utils.c (cgen_init): New function.
- (sim_disassemble_insn): New arg `cpu'. Rewrite fetching of insn.
- * genmloop.sh: Call engine_halt if loop exits.
-
- * Makefile.in (sim-options_h): Define.
- (sim-{module,options,trace,profile,utils}.o): Clean up dependencies.
- (sim-model.o): Add new rule.
- (cgen-{scache,trace,utils}.o): Add new rules.
- * aclocal.m4 (SIM_AC_OPTION_{SCACHE,DEFAULT_MODEL}): Add.
- * cgen-scache.c (scache_print_profile): Change `sd' arg to `cpu'.
- Indent output by 2 spaces.
- * cgen-scache.h (scache_print_profile): Update.
- * cgen-trace.c (trace_insn_fini): Indent output by 2 spaces.
- Use trace_printf, not fprintf.
- (trace_extract): Use trace_printf, not cgen_trace_printf.
- * genmloop.sh (!FAST case): Increment `insn_count'.
- * sim-base.h (sim_state_base): Only include scache_size if WITH_SCACHE.
- (sim_cpu_base): Rename member `sd' to `state' to be consistent with
- access macro's name.
- * sim-core.c (sim_core_init): Use EXTERN_SIM_CORE to define it.
- Change return type to SIM_RC.
- (sim_core_{install,uninstall}): New functions.
- * sim-core.h (sim_core_{install,uninstall}): Declare.
- (sim_core_init): Use EXTERN_SIM_CORE to define it.
- Change return type to SIM_RC.
- * sim-model.h (models,machs,model_install): Declare.
- * sim-module.c (modules): Add scache_install, model_install.
- (sim_post_argv_init): Set cpu->state backlinks.
- * sim-options.c (standard_options): Delete --simcache-size,--max-insns.
- (standard_option_handler): Likewise.
- * sim-profile.c (PROFILE_{HISTOGRAM,LABEL}_WIDTH): Move to
- sim-profile.h.
- (*): Assume ANSI C.
- (profile_options): Delete --profile-simcache.
- (profile_option_handler): Likewise.
- (profile_print_insn): Change `sd' arg to `cpu'. Indent output 2
- spaces.
- (profile_print_{memory,model}): Likewise.
- (profile_print_simcache): Delete.
- (profile_print_speed): New function.
- (profile_print): Rewrite.
- * sim-profile.h (PROFILE_scache): Renamed from PROFILE_simcache.
- (WITH_PROFILE_SCACHE_P): Renamed from WITH_PROFILE_SIMCACHE_P.
- (PROFILE_DATA): Delete members simcache_{hits,misses}.
- (PROFILE_COUNT_SIMCACHE_{HIT,MISS}): Delete.
- (PROFILE_{CALLBACK,CPU_CALLBACK}): New types.
- (profile_print): Update prototype.
-
-Wed Apr 30 11:34:14 1997 Doug Evans <dje@canuck.cygnus.com>
-
- * cgen-scache.[ch], cgen-sim.h: New files.
- * cgen-trace.[ch], cgen-types.h, cgen-utils.c, genmloop.sh: New files.
- * sim-model.c: New file.
-
- * Make-common.in (clean targets): Undo patch of Apr. 22.
-
-Fri Apr 25 15:28:32 1997 Mike Meissner <meissner@cygnus.com>
-
- * sim-n-bits.h (signed): If we have a standard compiler, undef
- signed, so that signedN is defined correctly.
-
-Thu Apr 24 00:00:07 1997 Doug Evans <dje@canuck.cygnus.com>
-
- * sim-module.h, sim-model.h, sim-profile.h: New files.
- * sim-module.c, sim-profile.c: New files.
- * Make-common.in (SIM_PROFILE): Define
- (CONFIG_CFLAGS): Add $(SIM_PROFILE).
- (sim_main_headers): Add sim-module.h, sim-model.h, sim-profile.h.
- (sim_module.o,sim-profile.o): Add rules for.
- * aclocal.m4 (--enable-sim-trace): Allow symbolic arguments.
- (--enable-sim-profile): Add.
- * configure: Regenerated.
- * sim-base.h (sim_state_base): New members init_list, uninstall_list,
- model. Move trace and profile support to sim-{trace,profile}.h.
- New members trace_data, profile_data.
- * sim-basics.h: #include sim-module.h, sim-model.h, sim-profile.h.
- * sim-config.h: Provide default definition of WITH_PROFILE.
- (WITH_TRACE): Change default to -1.
- (MAX_NR_PROCESSORS): Always define.
- * sim-options.c: Move trace and profile support to
- sim-{trace,profile}.h.
- (sim_pre_argv_init): Moved to sim-model.c.
- (standard_install): New function.
- * sim-options.h (sim_pre_argv_init): Move decl to sim-model.c.
- (standard_install): Declare.
- * sim-trace.c: Tracing option handling moved here from sim-options.c.
- (trace_install, trace_uninstall): New functions.
- (trace_printf): Update reference to TRACE_FILE.
- * sim-trace.h (TRACE_FOO_IDX): Moved here from sim-base.h.
- (TRACE_foo): Bit masks for symbolic arguments to --enable-sim-trace.
- (WITH_TRACE_FOO_P): Define.
- (trace_install): Declare.
- (TRACE_DATA): New struct.
-
-Wed Apr 23 17:23:15 1997 Doug Evans <dje@canuck.cygnus.com>
-
- * run.c: Undo last exec_bfd patch.
- (main): Only pass -E ifdef SIM_HAVE_BIENDIAN.
-
-Wed Apr 23 17:54:27 1997 Mike Meissner <meissner@cygnus.com>
-
- * run.c (exec_bfd): Add back in.
- (main): Set exec_bfd.
-
-Tue Apr 22 14:43:46 1997 Doug Evans <dje@canuck.cygnus.com>
-
- * sim-load.c (sim_load_file): #include <stdio.h> for NULL.
-
-Wed Apr 23 02:55:54 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-events.c (insert_sim_event): Call sim_io_error instead of
- less well defined engine_error.
- * sim-core.c: Ditto.
-
-Tue Apr 22 08:48:16 1997 Stu Grossman (grossman@critters.cygnus.com)
-
- * Make-common.in: Change clean targets to use :: so that other
- Makefiles can have their own clean targets.
- * sim-load.c (xprintf eprintf): Use ANSI_PROTOTYPES instead of
- __STDC__ to control use of stdarg vs. varargs syntax. Some
- systems can't use __STDC__, but require stdarg.
-
-Fri Apr 18 11:14:43 1997 Doug Evans <dje@canuck.cygnus.com>
-
- * sim-options.c (standard_options): Add --endian.
- (standard_option_handler): Likewise.
-
- * nrun.c: #include <signal.h>.
- (main, cntrl_c): Wrap calls to sim_resume in a SIGINT
- handler that calls sim_stop ().
-
-Fri Apr 18 13:11:36 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * run.c (main, cntrl_c): Wrap calls to sim_resume in a SIGINT
- handler that calls sim_stop (). Simulators may still be
- establishing their own handler.
-
- * sim-events.c (sim_events_poll): Rename from
- sim_events_at_large_int. Poll IO.
-
- * sim-io.c (sim_io_poll_quit): New function - pass on a polling
- request.
-
- * callback.c (os_poll_quit): New function poll for quit signal
- where needed.
- (default_callback): Include magic number.
-
-Thu Apr 17 02:25:11 1997 Doug Evans <dje@canuck.cygnus.com>
-
- * aclocal.m4: Check for headers time.h, sys/time.h, sys/resource.h.
- Check for functions getrusage, time.
- * sim-basics.h (SIM_ELAPSED_TIME): New typedef.
- (sim_elapsed_time_get, sim_elapsed_time_since): Add prototypes.
- * sim-utils.c: #include time.h, sys/time.h, sys/resource.h if able.
- (sim_elapsed_time_get, sim_elapsed_time_since): New functions.
-
- * sim-utils.c (sim_copy_argv, sim_analyze_program): New functions.
-
- * sim-options.c, sim-options.h: New files.
- * sim-config.h (WITH_DEBUG): Provide default value of zero.
- * Make-common.in (nrun.o): Add rules for.
- * nrun.c: New file.
-
- * run.c (main): Check return value of sim_open.
-
- * Make-common.in (sim-options.o, sim-load.o, sim-trace.o): Add rules.
- (sim_main_headers): Add sim-trace.h.
- * run.c (exec_bfd, target_byte_order): Delete.
- (main): Pass -E <endian> to sim_open. Delete code to load sections,
- call sim_load instead. Check return code of sim_create_inferior.
- * sim-base.h (CURRENT_STATE): Define.
- (sim_state_base): Make typedef. New members options, prog_argv,
- prog_bfd, text_{section,start,end}, start_addr, simcache_size,
- mem_size, memory [+ corresponding access macros].
- (sim_cpu_base): New typedef.
- * sim-trace.h: New file.
- * sim-trace.c: New file.
- * sim-basics.h: #include it.
- * sim-load.c: New file.
-
-Tue Apr 15 15:10:13 1997 Ian Lance Taylor <ian@cygnus.com>
-
- * Make-common.in (INSTALL): Set to @INSTALL@.
- (INSTALL_XFORM, INSTALL_XFORM1): Remove.
- (install-common): Depend upon installdirs. Use
- $(program_transform_name) directly, rather than using
- $(INSTALL_XFORM).
- (installdirs): New target.
- * Makefile.in (INSTALL): Set to @INSTALL@.
- (INSTALL_XFORM, INSTALL_XFORM1): Remove.
- (install-man): Depend upon installdirs. Use
- $(program_transform_name) directly, rather than using
- $(INSTALL_XFORM).
- (installdirs): New target.
-
-Tue Apr 15 15:08:12 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-assert.h (SIM_ASSERT, ASSERT): Allow these macros to
- be overriden.
-
-Wed Apr 9 16:06:44 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
-
- * sim-basics.h: Only bring in config.h and tconfig.h if
- HAVE_CONFIG_H.
-
-Mon Apr 7 11:39:45 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
-
- * sim-config.h (WITH_TARGET_WORD_MSB): New Macro. Define the bit
- numbering convention of the target.
- * sim-config.c (print_sim_config): Print WITH_TARGET_WORD_BITSIZE
- and WITH_TARGET_WORD_MSB.
- (sim_config): When possible, check for consistency with bitsize
- and msb.
-
- * sim-bits.h: Allow MSB to be other than zero.
- * sim-bits.c: Ditto.
- * sim-n-bits.h: Ditto.
-
- * sim-bits.h (MSMASK*): New macros - converce to LSMASK*.
- * sim-n-bits.h (MSMASKEDn): Ditto.
-
-Mon Apr 14 16:29:21 1997 Ian Lance Taylor <ian@cygnus.com>
-
- * Makefile.in (INSTALL): Change install.sh to install-sh.
-
-Mon Apr 7 10:46:38 1997 Doug Evans <dje@canuck.cygnus.com>
-
- * sim-base.h (sim_state_base): Move `magic' to end of struct.
-
-Mon Apr 7 15:53:21 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
-
- * run.c (main): Check that a program to run was specified.
-
-Mon Apr 7 15:45:02 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
-
- * aclocal.m4 (AC_TYPE_SIGNAL): Add check.
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
- * config.in: Ditto.
-
-Wed Apr 2 15:06:28 1997 Doug Evans <dje@canuck.cygnus.com>
-
- * sim-endian.h: Move host {LITTLE,BIG}_ENDIAN support from here,
- * sim-config.h: To here.
-
- * Make-common.in (SIM_EXTRA_DEPS): New config var.
- (sim_main_headers): Define.
- (sim-*.o): Depend on $(SIM_EXTRA_DEPS).
- (BUILT_SRC_FROM_COMMON): Move here from ../d30v/Makefile.in.
- (clean): Use it.
- (sim-utils.o): Add rule for.
- * sim-utils.o: New file.
- * sim-basics.h: #include sim-base.h.
- (zalloc): Make argument unsigned long.
- * sim-base.h: New file.
- * sim-inline.h (SIM_IO support): Delete.
- * sim-io.h: Delete inline support.
- * sim-io.c: Likewise. sim-state.h renamed to sim-main.h.
- * sim-config.c: sim-state.h renamed to sim-main.h.
- * sim-core.c: Likewise.
- * sim-events.c: Likewise.
-
- * run.c (main): Pass SIM_OPEN_STANDALONE to sim_open.
-
- * aclocal.m4: Check for stdlib.h, string.h, strings.h, unistd.h.
- (sim-debug): Allow arguments. Define WITH_DEBUG in addition to
- -DDEBUG.
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Wed Apr 2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Wed Apr 2 11:08:11 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
-
- * sim-config.h (WITH_ALIGNMENT, WITH_FLOATING_POINT,
- WITH_XOR_ENDIAN, WITH_SMP, WITH_RESERVED_BITS): Assume that these
- are defined by the configure.
-
- * aclocal.m4 (sim-stdio): Add option stdio from ../ppc configure.
-
- * aclocal.m4 (floating-point, xor-endian, alignment, smp,
- reserved-bits): Always define.
-
- * sim-config.h, sim-config.c (sim_config): New function - and new
- file - co-ordinate the setting/checking of the common simulator
- configuration options.
-
- * Make-common.in (sim-config.o): Add rule.
-
-Fri Mar 28 15:32:00 1997 Mike Meissner <meissner@cygnus.com>
-
- * callback.c (os_{,e}vprintf_filtered): Change stdarg type to
- va_list from void *, since va_list might not be a pointer type.
-
-Mon Mar 24 15:27:12 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
-
- * sim-n-endian.h (offset_N): Correct assertion - word and sub word
- in wrong order.
- (offset_N): Correct computation of LE offset.
-
- * sim-io.c (sim_io_error): Include a new line when reporting
- errors.
-
- * sim-assert.h (SIM_FILTER_PATH): Out by one when locating last
- `/'.
-
-Thu Mar 20 22:31:06 1997 Jeffrey A Law (law@cygnus.com)
-
- * run.c: Include alloca-conf.h.
-
- * callback.c (os_evprintf_filtered): Fix typo.
-
-Fri Mar 21 13:36:20 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
-
- * run.c (string.h, strings.h, stdlib.h): Include.
-
- * sim-events.c (sim_events_tick): Recent cleanup failed to return
- 0 when nothing pending.
-
- * run.c (sim_size, sim_trace): Plicate GCC - these two functions
- will soon be going away.
- (getopt): Plicate GCC.
-
- * sim-endian.c (sim-io.h): Plicate GCC.
- * sim-bits.c (sim-io.h): Ditto.
- * sim-n-bits.h (ROTn): Ditto.
-
- * sim-io.c (sim_io_error): Correct check for NULL.
-
- * sim-assert.h (SIM_FILTER_PATH): Separate out the code filtering
- the __FILE__.
- * sim-events.c: Use SIM_FILTER_PATH to filter out the filename
- path.
-
-Wed Mar 19 01:12:06 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
-
- * aclocal.m4 (SIM_AC_OPTION_*: Move so that they are outside of
- SIM_AC_COMMON - SIM_AC_COMMON was gobling arguments.
-
-Tue Mar 18 20:48:12 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
-
- * sim-alu.h: Include sim-xcat.h.
-
-Tue Mar 18 13:58:18 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
-
- * Make-common.in (sim-bits.c, sim-core.c, sim-endian.c,
- sim-events.c, sim-inline.c, sim-io.c): Define rules for building
- these.
-
- * sim-events.c (sim_events_at_large_int): New function. Just
- schedules an event every large-int ticks.
- (sim_events_init): Call.
- (sim_events_tick, sim_events_process): Move async handing to
- sim_events_process. Move timer decrement so that it occures after
- events have been processed.
-
- * sim-basics.h (struct _engine): Remove declaration.
-
- * sim-events.h, sim-events.c: Rename type to sim_events. Prefix
- everything with same. Rename global struct to SIM_DESC.
- * sim-core.h, sim-core.c, sim-n-core.c: Ditto for sim_core.
- * sim-io.h, sim-io.c: Ditto.
-
- * sim-assert.h: New file. Optional assertion checking macros.
- * sim-io.c (sim_io_error): Make just this function tolerant to
- null pointers.
-
- * sim-xcat.h: New file. Define concatenate macros.
- * sim-basics.h (XCONCAT*): Move to sim-xcat.h.
- * sim-n-core.h, sim-n-bits.h, sim-n-endian.h: Explicitly include
- concat macros.
-
-
-Tue Mar 18 12:44:55 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
-
- * sim-bits.h (LSMASK): New macro. Create mask of LS bits.
-
-Mon Mar 17 18:10:05 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
-
- * sim-inline.h: Add definitions for sim-types.
- (ALL_BY_MODULE): New macro, encapsulate full inlining by the
- module.
-
-Mon Mar 17 15:38:27 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
-
- * sim-events.h: Remove defunct reference to callback struct.
-
-Mon Mar 17 15:10:07 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
-
- * configure: Re-generate.
-
-Mon Mar 17 15:04:47 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
-
- * Make-common.in (CSEARCH): Do not include the gdb directory in
- the search path.
-
-Mon Mar 17 13:16:26 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
-
- * Make-common.in (SIM_ENDIAN, SIM_HOSTENDIAN, SIM_INLINE,
- SIM_WARNING): Drop, requiring the simulator specific Makefile.in
- to explicitly incorporate these.
-
- * aclocal.m4 (--enable-sim-alignment); New option. Strongly
- specify the alignment restrictions of the target architecture -
- without this option all alignment restrictions are accomodated.
- (--enable-sim-assert): New option. Conditionally compile in
- assertion statements.
- (--enable-sim-float): New option. Strongly specify the target's
- floating point support.
- (--enable-sim-hardware): New option. Specify the hardware devices
- included in the simulation.
- (--enable-sim-packages): New option. Specify the hardware
- packages included in the simulation.
- (--enable-sim-regparm): New option. Specify that parameters be
- passed in registers instead of on the stack.
- (--enable-sim-reserved-bits): New option. Specify that reserved
- bits within an instruction are are correctly set.
- (--enable-sim-smp): New option. Specify the level of SMP support
- to be included in the simulator.
- (--enable-sim-stdcall): New option. Specify an alternative
- function call convention.
- (--enable-sim-xor-endian): New option. Configure xor-endian
- support used by some targets to implement bi-endian support.
-
-Fri Mar 14 19:51:21 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
-
- * aclocal.m4 (--enable-sim-hostendian): New option. Allow the
- host endianness to be overridden.
- (--enable-sim-endian): Allow the target platform's byte order
- to be overridden.
- (--enable-sim-inline): Control the inlining of common components.
- (--enable-sim-bswap): For compatibility, also define WITH_BSWAP.
- (--enable-sim-warnings): Enable additional GCC compiler checks.
- * Make-common.in (SIM_ENDIAN, SIM_HOSTENDIAN, SIM_INLINE,
- SIM_WARNINGS): Add.
-
- * sim-n-core.h, sim-n-bits.h, sim-n-endian.h: Rename from
- sim-*-n.h so that the names are uniq on dos machines
- * sim-core.c, sim-bits.c, sim-endian.c: Update.
-
-Thu Mar 13 12:32:42 1997 Doug Evans <dje@canuck.cygnus.com>
-
- * run.c: #include "libiberty.h".
- (main): New locals sd,no_args,sim_argv.
- Run buildargv on -a option. Pass argv to sim_open, argv[0]
- is program name. Update call to sim_set_callbacks.
- Record result of sim_open, pass to other sim_foo routines.
-
-Thu Mar 13 10:24:05 1997 Michael Meissner <meissner@cygnus.com>
-
- * callback.c (os_printf_filtered): Do not call exit(1) or print a
- final newline.
-
-Thu Mar 6 15:50:28 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
-
- * callback.c: Add os_flush_stdout and vprintf_filtered callbacks.
- Route stdout through buffered IO.
-
- * callback.c: Add os_flush_stderr, os_write_stderr,
- os_evprintf_filtered functions to route error output through
- stderr.
-
- * sim-io.h, sim-io.c (sim_io_flush_stderr, sim_io_flush_stdout):
- Correct return type - should be void.
-
-Fri Mar 7 20:14:37 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
-
- * sim-basics.h: Clean up. Many macro's moved to sim-inline.h.
-
- * sim-config.h: Ditto. For some options - eg WITH_DEVICES - do
- not provide a default value as undefined indicates disable code.
-
-Thu Mar 6 15:50:28 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
-
- * sim-core.h, sim-core-n.h, sim-core.c: Borrow code from ppc
- directory.
- * sim-events.h, sim-events.c: Ditto.
- * sim-io.h, sim-io.c: Ditto.
-
-Tue Mar 4 09:35:56 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
-
- * sim-alu.h (ALU_SUB_CA, ALU*_SUB_CA): New alu operation.
-
- * sim-bits.h, sim-bits-n.h, sim-bits.c (LSMASKED*): New macro's
- extract the tail or least signifiant bits from an integer of the
- specified size.
-
- * sim-bits.h, sim-bits.c: Clean up conditionally compiled #if
- WITH_TARGET_BITSIZE so that the compilation will fail when an
- unsupported bitsize value is defined.
-
- (INSERTED*): Convert to functions.
- (EXTRACTED*): Ditto.
-
- (SIGN_EXTEND, SEXT): Change to more terse name.
-
-Tue Mar 4 09:35:56 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
-
- * sim-inline.h: Allow explicit control over which .c files will be
- included by their header.
-
- * sim-inline.h: Allow explicit control over which .c files use the
- alternative - REGPARM - parameter passing mechanism.
-
- * sim-inline.h, sim-inline.c: Don't attempt to include any of
- icache.c, idecode.c, semantics.c or support.c. Those names are
- not generally applicable.
-
-Thu Feb 27 10:17:23 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
-
- * sim-bits.c, sim-bits-n.h (new): Split sim-bits.c into two parts
- in a fashion similar to sim-endian-n.
-
- * sim-endian.h: (H_word, L_word, AL_*, VL_*): Extend to include
- both value and address macro's.
-
-Tue Feb 25 18:51:57 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
-
- * sim-alu.h (ALU16_BEGIN, ALU16_SET, ...): Fill in.
-
- * sim-endian.h (L_word, H_word): Replace MS2W_4, LS2W_4 with more
- generic L_word, H_word macro's.
-
-Thu Feb 20 18:36:55 1997 Andrew Cagney <cagney@critters.cygnus.com>
-
- * sim-basics.h: Borrow code from ppc directory.
- * sim-bits.c: Ditto.
- * sim-bits.h: Ditto.
- * sim-config.h: Ditto.
- * sim-endian-n.h: Ditto.
- * sim-endian.c: Ditto.
- * sim-endian.h: Ditto.
- * sim-inline.c: Ditto.
- * sim-inline.h: Ditto.
- * sim-types.h: Ditto.
-
-Wed Feb 19 12:40:50 1997 Andrew Cagney <cagney@critters.cygnus.com>
-
- * sim-alu.h (ALU_SET16, ALU_SET32, ALU_SET64, etc): Make available
- all the ALU size alternatives and then auto-configure a default.
-
- * sim-alu.h: Copy ppc/idecode_expression.h.
-
-Mon Feb 17 10:44:18 1997 Andrew Cagney <cagney@critters.cygnus.com>
-
- * bits.h, bits.c (SIGN_EXTEND32, SIGN_EXTEND64): New functions,
- sign extend a bit within a value.
-
- * sim-endian.h, sim-endian-n.h (offset_N): New functions - return
- a pointer into the middle of a host word.
- * sim-endian.h (MS2W_4, LS2W_4): Use this function.
-
-Tue Feb 11 13:46:49 1997 Michael Meissner <meissner@tiktok.cygnus.com>
-
- * callback.c: If HAVE_CONFIG_H is defined, include config.h from
- autoconf. If HAVE_UNISTD_H is defined, include unistd.h to get
- appropriate definitions of read, write, etc. Add prototype for
- system.
-
-Tue Feb 4 13:24:44 1997 Doug Evans <dje@canuck.cygnus.com>
-
- * Makefile.in (libcommon.a): Delete.
- (callback.o,targ-map.o): Delete, moved to Make-common.in.
- (gentmap,targ-vals.h,targ-map.c): Likewise.
- (run-autoconf): Delete.
- * aclocal.m4 (SIM_AC_OUTPUT): Redo creation of Makefile.
- (common makefile fragment): Moved back into ...
- * Make-common.in: Resurrect.
- * configure.in (AC_LINK_FILES): Delete, unnecessary now.
- * configure: Regenerated.
-
-Fri Jan 31 07:16:49 1997 Doug Evans <dje@canuck.cygnus.com>
-
- * aclocal.m4 (SIM_AC_COMMON): Move COMMON_MAKEFILE_FRAG from here.
- (SIM_AC_OUTPUT): To here.
-
-Fri Jan 24 10:37:17 1997 Stu Grossman (grossman@critters.cygnus.com)
-
- * aclocal.m4 (COMMON_MAKEFILE_FRAG): Quote a couple of $'s in
- comments and single quotes. Fixes a problem found on hpux.
-
-Thu Jan 23 13:35:03 1997 Stu Grossman (grossman@critters.cygnus.com)
-
- * aclocal.m4: Remove Make-common.in from dependencies.
- * (distclean): Remove targ-vals.def.
-
- * aclocal.m4 (SIM_AC_COMMON): Move contents of Make-common.in
- into here. Makes insertion into makefiles easier. Also, change
- the way that callback.o, gentmap, targ-vals.h, targ-map.c,
- targ-map.o, and run are built. They are now built in the
- individual simulator directories, taking sources from ../common as
- necessary. This replaces the merging of libcommon.a into
- linsim.a, which was problematic for the WinGDB build process.
- * run.c: Include config.h from . instead of ../common.
- * Make-common.in: Remove. It's no longer necessary.
-
-Mon Dec 16 15:02:33 1996 Ian Lance Taylor <ian@cygnus.com>
-
- * Make-common.in (ALL_CLAGS): Put CFLAGS at the end.
- (.c.o): Put $(ALL_CFLAGS) before the file being compiled.
-
-Wed Dec 11 11:30:58 1996 Jim Wilson <wilson@cygnus.com>
-
- * run.c (main): Set target_byte_order before call to sim_open.
-
-Sun Dec 8 18:22:06 1996 Doug Evans <dje@canuck.cygnus.com>
-
- * callback.c: #include <stdlib.h>
- (os_error): New function.
- (default_callback): Add os_error.
-
-Mon Nov 25 19:44:35 1996 Doug Evans <dje@canuck.cygnus.com>
-
- * Make-common.in (Makefile): Set CONFIG_HEADERS="".
- * aclocal.m4: Mark the fact that --enable-sim-bswap isn't host
- specific.
- (SIM_AC_OUTPUT): Don't build Makefile if CONFIG_FILES="".
-
-Wed Nov 20 01:11:04 1996 Doug Evans <dje@canuck.cygnus.com>
-
- * run.c: #include ../common/config.h, tconfig.h.
- (myname): New static global.
- (main): Recognize new options -a, -c. Also recognize -h if h8/300.
- Only process -c ifdef SIM_HAVE_SIMCACHE.
- Only process -p/-s ifdef SIM_HAVE_PROFILE.
- Parse program name from argv[0] and use in error messages.
- Pass sim_args to sim_open. Pass prog_args to sim_create_inferior.
- Add support for incomplete h8/300 termination indicators.
- (usage): Make more verbose.
- * aclocal.m4,config.in,tconfig.in,configure.in,configure: New files.
- * Makefile.in,Make-common.in,callback.c: New files.
- * nltvals.def,gentmap.c,gentvals.sh: New files.
-
-Tue Nov 12 13:34:00 1996 Dawn Perchik <dawn@cygnus.com>
-
- * run.c: Include stdarg.h if __STDC__.
-
-Tue Oct 15 11:16:31 1996 Jeffrey A Law (law@cygnus.com)
-
- * run.c (main): Don't print out anything if the signal
- number is zero (ie no signal).
-
-Tue Oct 15 11:20:44 1996 Michael Meissner <meissner@tiktok.cygnus.com>
-
- * run.c (main): Print out if the program raised a signal.
-
-Wed Sep 18 09:52:14 1996 Michael Meissner <meissner@tiktok.cygnus.com>
-
- * run.c (exec_bfd): Rename from sim_bfd, to use the gdb name.
- (main): Ditto.
-
-Tue Sep 17 11:04:50 1996 James G. Smith <jsmith@cygnus.co.uk>
-
- * run.c (main): Explicitly cast malloc() parameter.
-
-Thu Sep 12 11:27:21 1996 Michael Meissner <meissner@tiktok.cygnus.com>
-
- * run.c (sim_bfd): New global to hold the bfd pointer for the
- executable.
- (main): Initialize sim_bfd.
-
-Fri Dec 15 16:27:49 1995 Ian Lance Taylor <ian@cygnus.com>
-
- * run.c (main): Use new bfd_big_endian macro.
-
-Wed Nov 8 15:49:49 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
-
- * run.c (main): Removed SH specific comments, so source is
- generic. Also updated to only load relevant sections. Moved
- sim_open() to after callback attach (to match GDB).
-
- * run.1: Removed SH specific comments.
-
-Sat Oct 21 12:31:01 1995 Jim Wilson <wilson@chestnut.cygnus.com>
-
- * run.c (main): Always return sigrc at end.
-
-Tue Oct 10 12:03:13 1995 J.T. Conklin <jtc@rtl.cygnus.com>
-
- * run.c (main): Print error diagnostic and exit if bfd_openr() or
- bfd_check_format() fails.
-
-Thu Sep 28 15:40:36 1995 steve chamberlain <sac@slash.cygnus.com>
-
- * run.c, run.1: From sh directory.
diff --git a/sim/common/Make-common.in b/sim/common/Make-common.in
deleted file mode 100644
index 519b213da73..00000000000
--- a/sim/common/Make-common.in
+++ /dev/null
@@ -1,714 +0,0 @@
-# Makefile fragment for common parts of all simulators.
-# Copyright 1997, 1998, 1999, 2000, 2001 Free Software Foundation, Inc.
-# Contributed by Cygnus Support.
-
-# This program is free software; you can redistribute it and/or modify
-# it under the terms of the GNU General Public License as published by
-# the Free Software Foundation; either version 2 of the License, or
-# (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
-# This Makefile fragment consists of two separate parts.
-# They are merged into the final Makefile at points denoted by
-# "## COMMON_PRE_CONFIG_FRAG" and "## COMMON_POST_CONFIG_FRAG".
-#
-# The target Makefile should look like:
-#
-#># Copyright blah blah
-#>
-#>## COMMON_PRE_CONFIG_FRAG
-#>
-#># Any overrides necessary for the SIM_FOO config vars.
-#>SIM_FOO = ...
-#>
-#>## COMMON_POST_CONFIG_FRAG
-#>
-#># Rules to build target specific .o's.
-
-## COMMON_PRE_CONFIG_FRAG
-
-VPATH = @srcdir@
-srcdir = @srcdir@
-srccom = $(srcdir)/../common
-srcroot = $(srcdir)/../..
-
-prefix = @prefix@
-exec_prefix = @exec_prefix@
-
-host_alias = @host_alias@
-target_alias = @target_alias@
-program_transform_name = @program_transform_name@
-bindir = @bindir@
-
-libdir = @libdir@
-tooldir = $(libdir)/$(target_alias)
-
-datadir = @datadir@
-mandir = @mandir@
-man1dir = $(mandir)/man1
-infodir = @infodir@
-includedir = @includedir@
-
-# This can be referenced by the gettext configuration code.
-top_builddir = ..
-
-EXEEXT = @EXEEXT@
-SHELL = @SHELL@
-
-INSTALL = @INSTALL@
-INSTALL_PROGRAM = @INSTALL_PROGRAM@
-INSTALL_DATA = @INSTALL_DATA@
-
-CC = @CC@
-CC_FOR_BUILD = @CC_FOR_BUILD@
-CFLAGS = @CFLAGS@
-SIM_BSWAP = @sim_bswap@
-SIM_CFLAGS = @sim_cflags@
-SIM_DEBUG = @sim_debug@
-SIM_TRACE = @sim_trace@
-SIM_PROFILE = @sim_profile@
-
-SIM_ASSERT = @sim_assert@
-SIM_ALIGNMENT = @sim_alignment@
-SIM_BITSIZE = @sim_bitsize@
-SIM_DEFAULT_MODEL = @sim_default_model@
-SIM_ENDIAN = @sim_endian@
-SIM_ENVIRONMENT = @sim_environment@
-SIM_FLOAT = @sim_float@
-SIM_HW_CFLAGS = @sim_hw_cflags@
-SIM_HW_OBJS = @sim_hw_objs@
-SIM_HW = @sim_hw@
-SIM_HOSTENDIAN = @sim_hostendian@
-SIM_INLINE = @sim_inline@
-SIM_PACKAGES = @sim_packages@
-SIM_REGPARM = @sim_regparm@
-SIM_RESERVED_BITS = @sim_reserved_bits@
-SIM_SCACHE = @sim_scache@
-SIM_SMP = @sim_smp@
-SIM_STDCALL = @sim_stdcall@
-SIM_XOR_ENDIAN = @sim_xor_endian@
-WARN_CFLAGS = @WARN_CFLAGS@
-WERROR_CFLAGS = @WERROR_CFLAGS@
-SIM_WARN_CFLAGS = $(WARN_CFLAGS)
-SIM_WERROR_CFLAGS = $(WERROR_CFLAGS)
-
-HDEFINES = @HDEFINES@
-TDEFINES =
-
-AR = @AR@
-AR_FLAGS = rc
-RANLIB = @RANLIB@
-MAKEINFO = makeinfo
-
-DEP = $(srcroot)/mkdep
-
-# Each simulator's Makefile.in defines one or more of these variables
-# to override our settings as necessary. There is no need to define these
-# in the simulator's Makefile.in if one is using the default value. In fact
-# it's preferable not to.
-
-# List of object files, less common parts.
-SIM_OBJS =
-# List of extra dependencies.
-# Generally this consists of simulator specific files included by sim-main.h.
-SIM_EXTRA_DEPS =
-# List of flags to always pass to $(CC).
-SIM_EXTRA_CFLAGS =
-# List of extra libraries to link with.
-SIM_EXTRA_LIBS =
-# List of extra program dependencies.
-SIM_EXTRA_LIBDEPS =
-# List of main object files for `run'.
-SIM_RUN_OBJS = run.o
-# Dependency of `all' to build any extra files.
-SIM_EXTRA_ALL =
-# Dependency of `install' to install any extra files.
-SIM_EXTRA_INSTALL =
-# Dependency of `clean' to clean any extra files.
-SIM_EXTRA_CLEAN =
-
-# Every time a new general purpose source file was added every target's
-# Makefile.in needed to be updated to include the file in SIM_OBJS.
-# This doesn't scale.
-# This variable specifies all the generic stuff common to the newer simulators.
-# Things like sim-reason.o can't go here as the cpu may provide its own
-# (though hopefully in time that won't be so). Things like sim-bits.o can go
-# here. Some files are used by all simulators (e.g. callback.o).
-# Those files are specified in LIB_OBJS below.
-
-SIM_COMMON_HW_OBJS = \
- hw-alloc.o \
- hw-base.o \
- hw-device.o \
- hw-events.o \
- hw-handles.o \
- hw-instances.o \
- hw-ports.o \
- hw-properties.o \
- hw-tree.o \
- sim-hw.o \
-
-SIM_NEW_COMMON_OBJS = \
- sim-arange.o \
- sim-bits.o \
- sim-break.o \
- sim-config.o \
- sim-core.o \
- sim-endian.o \
- sim-events.o \
- sim-fpu.o \
- sim-io.o \
- sim-info.o \
- sim-load.o \
- sim-memopt.o \
- sim-module.o \
- sim-options.o \
- sim-profile.o \
- sim-signal.o \
- sim-trace.o \
- sim-utils.o \
- sim-watch.o \
- \
- $(SIM_HW_OBJS) \
-
-# Add this to SIM_EXTRA_DEPS.
-CGEN_INCLUDE_DEPS = \
- $(srccom)/cgen-cpu.h \
- $(srccom)/cgen-defs.h \
- $(srccom)/cgen-engine.h \
- $(srccom)/cgen-scache.h \
- $(srccom)/cgen-sim.h \
- $(srccom)/cgen-trace.h \
- $(srccom)/cgen-types.h \
- $(srcdir)/../../include/opcode/cgen.h
-
-## End COMMON_PRE_CONFIG_FRAG
-
-## COMMON_POST_CONFIG_FRAG
-
-CONFIG_CFLAGS = \
- @DEFS@ \
- $(SIM_CFLAGS) \
- $(SIM_DEBUG) \
- $(SIM_DEFAULT_MODEL) \
- $(SIM_TRACE) \
- $(SIM_PROFILE) \
- $(SIM_BSWAP) \
- $(SIM_ASSERT) \
- $(SIM_ALIGNMENT) \
- $(SIM_BITSIZE) \
- $(SIM_ENDIAN) \
- $(SIM_ENVIRONMENT) \
- $(SIM_FLOAT) \
- $(SIM_HW_CFLAGS) \
- $(SIM_HOSTENDIAN) \
- $(SIM_INLINE) \
- $(SIM_PACKAGES) \
- $(SIM_REGPARM) \
- $(SIM_RESERVED_BITS) \
- $(SIM_SCACHE) \
- $(SIM_SMP) \
- $(SIM_STDCALL) \
- $(SIM_WARN_CFLAGS) \
- $(SIM_WERROR_CFLAGS) \
- $(SIM_XOR_ENDIAN) \
- $(SIM_HARDWARE) \
- $(SIM_EXTRA_CFLAGS) \
- $(HDEFINES) $(TDEFINES)
-CSEARCH = -I. -I$(srcdir) -I../common -I$(srccom) \
- -I../../include -I$(srcroot)/include \
- -I../../bfd -I$(srcroot)/bfd \
- -I../../opcodes -I$(srcroot)/opcodes \
- -I../../intl -I$(srcroot)/intl
-ALL_CFLAGS = $(CONFIG_CFLAGS) $(CSEARCH) $(CFLAGS)
-BUILD_CFLAGS = -g -O $(CSEARCH)
-
-COMMON_DEP_CFLAGS = $(CONFIG_CFLAGS) $(CSEARCH)
-
-LIBIBERTY_LIB = ../../libiberty/libiberty.a
-BFD_LIB = ../../bfd/libbfd.a
-OPCODES_LIB = ../../opcodes/libopcodes.a
-INTLLIBS = @INTLLIBS@
-INTLDEPS = @INTLDEPS@
-CONFIG_LIBS = @LIBS@
-LIBDEPS = $(BFD_LIB) $(OPCODES_LIB) $(INTLLIBS) $(LIBIBERTY_LIB) \
- $(SIM_EXTRA_LIBDEPS)
-EXTRA_LIBS = $(BFD_LIB) $(OPCODES_LIB) $(INTLLIBS) $(LIBIBERTY_LIB) \
- $(CONFIG_LIBS) $(SIM_EXTRA_LIBS)
-
-LIB_OBJS = callback.o syscall.o targ-map.o $(SIM_OBJS)
-
-RUNTESTFLAGS =
-
-all: $(SIM_EXTRA_ALL) libsim.a run .gdbinit
-
-libsim.a: $(LIB_OBJS)
- rm -f libsim.a
- $(AR) $(AR_FLAGS) libsim.a $(LIB_OBJS)
- $(RANLIB) libsim.a
-
-run: $(SIM_RUN_OBJS) libsim.a $(LIBDEPS)
- $(CC) $(ALL_CFLAGS) -o run$(EXEEXT) \
- $(SIM_RUN_OBJS) libsim.a $(EXTRA_LIBS)
-
-run.o: $(srccom)/run.c config.h tconfig.h \
- $(srcroot)/include/remote-sim.h $(srcroot)/include/callback.h
- $(CC) -c $(srccom)/run.c $(ALL_CFLAGS)
-
-# FIXME: Ideally, callback.o and friends live in a library outside of
-# both the gdb and simulator source trees (e.g. devo/remote. Not
-# devo/libremote because this directory would contain more than just
-# a library).
-
-callback.o: $(srccom)/callback.c config.h tconfig.h \
- $(srcroot)/include/callback.h targ-vals.h
- $(CC) -c $(srccom)/callback.c $(ALL_CFLAGS)
-
-syscall.o: $(srccom)/syscall.c config.h tconfig.h \
- $(srcroot)/include/callback.h targ-vals.h
- $(CC) -c $(srccom)/syscall.c $(ALL_CFLAGS)
-
-targ-map.o: targ-map.c targ-vals.h
-
-gentmap: Makefile $(srccom)/gentmap.c targ-vals.def
- $(CC_FOR_BUILD) $(srccom)/gentmap.c -o gentmap $(BUILD_CFLAGS) $(NL_TARGET)
-
-targ-vals.h targ-map.c: stamp-tvals
-stamp-tvals: gentmap
- rm -f tmp-tvals.h tmp-tmap.c
- ./gentmap -h >tmp-tvals.h
- $(SHELL) $(srcroot)/move-if-change tmp-tvals.h targ-vals.h
- ./gentmap -c >tmp-tmap.c
- $(SHELL) $(srcroot)/move-if-change tmp-tmap.c targ-map.c
- touch stamp-tvals
-
-#
-# Rules for building sim-* components. Triggered by listing the corresponding
-# .o file in the list of simulator targets.
-#
-
-sim_main_headers = \
- sim-main.h \
- $(srccom)/sim-assert.h \
- $(srccom)/sim-base.h \
- $(srccom)/sim-basics.h \
- $(srccom)/sim-config.h \
- $(srccom)/sim-cpu.h \
- $(srccom)/sim-engine.h \
- $(srccom)/sim-events.h \
- $(srccom)/sim-inline.h \
- $(srccom)/sim-memopt.h \
- $(srccom)/sim-model.h \
- $(srccom)/sim-module.h \
- $(srccom)/sim-profile.h \
- $(srccom)/sim-signal.h \
- $(srccom)/sim-trace.h \
- $(srccom)/sim-watch.h \
- tconfig.h \
- $(SIM_EXTRA_DEPS)
-
-# Exported version of sim_main_headers.
-SIM_MAIN_DEPS = \
- $(sim_main_headers)
-
-sim-assert_h = $(srccom)/sim-assert.h
-sim-endian_h = $(srccom)/sim-endian.h
-sim-n-endian_h = $(srccom)/sim-n-endian.h
-sim-arange_h = $(srccom)/sim-arange.h
-sim-bits_h = $(srccom)/sim-bits.h
-sim-config_h = $(srccom)/sim-config.h
-sim-n-bits_h = $(srccom)/sim-n-bits.h
-sim-core_h = $(srccom)/sim-core.h
-sim-n-core_h = $(srccom)/sim-n-core.h
-sim-engine_h = $(srccom)/sim-engine.h
-sim-events_h = $(srccom)/sim-events.h
-sim-fpu_h = $(srccom)/sim-fpu.h
-sim-io_h = $(srccom)/sim-io.h
-sim-options_h = $(srccom)/sim-options.h
-sim-break_h = $(srccom)/sim-break.h
-sim-signal_h = $(srccom)/sim-signal.h
-
-hw-alloc_h = $(srccom)/hw-alloc.h
-hw-base_h = $(srccom)/hw-base.h
-hw-device_h = $(srccom)/hw-device.h
-hw-events_h = $(srccom)/hw-events.h
-hw-handles_h = $(srccom)/hw-handles.h
-hw-instances_h = $(srccom)/hw-instances.h
-hw-ports_h = $(srccom)/hw-ports.h
-hw-properties_h = $(srccom)/hw-properties.h
-hw-tree_h = $(srccom)/hw-tree.h
-
-hw_main_headers = \
- $(srccom)/hw-main.h \
- $(hw-alloc_h) \
- $(hw-base_h) \
- $(hw-device_h) \
- $(hw-events_h) \
- $(hw-instances_h) \
- $(hw-handles_h) \
- $(hw-ports_h) \
- $(hw-properties_h) \
-
-# FIXME: If this complicated way of building .o files from ../common is
-# necessary, the reason should be documented here.
-
-BUILT_SRC_FROM_COMMON= \
- sim-inline.c
-
-sim-abort.o: $(srccom)/sim-abort.c \
- $(SIM_EXTRA_DEPS)
- $(CC) -c $(srccom)/sim-abort.c $(ALL_CFLAGS)
-
-sim-arange.o: $(srccom)/sim-arange.c $(sim-arange_h) $(SIM_EXTRA_DEPS)
- $(CC) -c $(srccom)/sim-arange.c $(ALL_CFLAGS)
-
-sim-bits.o: $(srccom)/sim-bits.c $(sim-bits_h) $(sim-n-bits_h) \
- $(SIM_EXTRA_DEPS)
- $(CC) -c $(srccom)/sim-bits.c $(ALL_CFLAGS)
-
-sim-config.o: $(srccom)/sim-config.c $(sim-config_h) \
- $(SIM_EXTRA_DEPS)
- $(CC) -c $(srccom)/sim-config.c $(ALL_CFLAGS)
-
-sim-core.o: $(srccom)/sim-core.c $(sim_main_headers) \
- $(sim-core_h) $(sim-n-core_h)
- $(CC) -c $(srccom)/sim-core.c $(ALL_CFLAGS)
-
-sim-cpu.o: $(srccom)/sim-cpu.c $(sim_main_headers)
- $(CC) -c $(srccom)/sim-cpu.c $(ALL_CFLAGS)
-
-sim-endian.o: $(srccom)/sim-endian.c $(sim-endian_h) $(sim-n-endian_h)
- $(CC) -c $(srccom)/sim-endian.c $(ALL_CFLAGS)
-
-sim-engine.o: $(srccom)/sim-engine.c $(sim_main_headers) $(sim-engine_h)
- $(CC) -c $(srccom)/sim-engine.c $(ALL_CFLAGS)
-
-sim-events.o: $(srccom)/sim-events.c $(sim-events_h) \
- $(SIM_EXTRA_DEPS)
- $(CC) -c $(srccom)/sim-events.c $(ALL_CFLAGS)
-
-sim-fpu.o: $(srccom)/sim-fpu.c $(sim-fpu_h) \
- $(SIM_EXTRA_DEPS)
- $(CC) -c $(srccom)/sim-fpu.c $(ALL_CFLAGS)
-
-sim-hload.o: $(srccom)/sim-hload.c $(sim-assert_h) \
- $(srcroot)/include/remote-sim.h \
- $(SIM_EXTRA_DEPS)
- $(CC) -c $(srccom)/sim-hload.c $(ALL_CFLAGS)
-
-sim-hrw.o: $(srccom)/sim-hrw.c $(sim-assert_h) $(sim_core_h) \
- $(srcroot)/include/remote-sim.h \
- $(SIM_EXTRA_DEPS)
- $(CC) -c $(srccom)/sim-hrw.c $(ALL_CFLAGS)
-
-sim-hw.o: $(srccom)/sim-hw.c $(sim_main_headers)
- $(CC) -c $(srccom)/sim-hw.c $(ALL_CFLAGS)
-
-sim-info.o: $(srccom)/sim-info.c $(sim-assert_h) \
- $(srcroot)/include/remote-sim.h \
- $(SIM_EXTRA_DEPS)
- $(CC) -c $(srccom)/sim-info.c $(ALL_CFLAGS)
-
-sim-inline.c: $(srccom)/sim-inline.c
- rm -f $@ tmp-$@
- echo "# 1 \"$(srccom)/$@\"" > tmp-$@
- cat $(srccom)/$@ >> tmp-$@
- $(SHELL) $(srcdir)/../../move-if-change tmp-$@ $@
-
-sim-io.o: $(srccom)/sim-io.c $(sim_main_headers) $(sim-io_h) \
- $(srcroot)/include/remote-sim.h targ-vals.h
- $(CC) -c $(srccom)/sim-io.c $(ALL_CFLAGS)
-
-sim-memopt.o: $(srccom)/sim-memopt.c $(sim_main_headers) \
- $(sim-io_h)
- $(CC) -c $(srccom)/sim-memopt.c $(ALL_CFLAGS)
-
-sim-module.o: $(srccom)/sim-module.c $(sim_main_headers) \
- $(sim-io_h)
- $(CC) -c $(srccom)/sim-module.c $(ALL_CFLAGS)
-
-sim-options.o: $(srccom)/sim-options.c $(sim_main_headers) \
- $(sim-options_h) $(sim-io_h)
- $(CC) -c $(srccom)/sim-options.c $(ALL_CFLAGS)
-
-sim-reason.o: $(srccom)/sim-reason.c $(sim_main_headers) \
- $(srcroot)/include/remote-sim.h
- $(CC) -c $(srccom)/sim-reason.c $(ALL_CFLAGS)
-
-sim-reg.o: $(srccom)/sim-reg.c $(sim_main_headers) \
- $(srcroot)/include/remote-sim.h
- $(CC) -c $(srccom)/sim-reg.c $(ALL_CFLAGS)
-
-sim-resume.o: $(srccom)/sim-resume.c $(sim_main_headers) \
- $(srcroot)/include/remote-sim.h
- $(CC) -c $(srccom)/sim-resume.c $(ALL_CFLAGS)
-
-sim-run.o: $(srccom)/sim-run.c $(sim_main_headers)
- $(CC) -c $(srccom)/sim-run.c $(ALL_CFLAGS)
-
-sim-signal.o: $(srccom)/sim-signal.c $(sim_main_headers) $(sim-signal_h)
- $(CC) -c $(srccom)/sim-signal.c $(ALL_CFLAGS)
-
-sim-stop.o: $(srccom)/sim-stop.c $(sim_main_headers)
- $(CC) -c $(srccom)/sim-stop.c $(ALL_CFLAGS)
-
-sim-trace.o: $(srccom)/sim-trace.c $(sim_main_headers) \
- $(sim-options_h) $(sim-io_h)
- $(CC) -c $(srccom)/sim-trace.c $(ALL_CFLAGS)
-
-sim-profile.o: $(srccom)/sim-profile.c $(sim_main_headers) \
- $(sim-options_h) $(sim-io_h)
- $(CC) -c $(srccom)/sim-profile.c $(ALL_CFLAGS)
-
-sim-model.o: $(srccom)/sim-model.c $(sim_main_headers) \
- $(sim-io_h)
- $(CC) -c $(srccom)/sim-model.c $(ALL_CFLAGS)
-
-sim-utils.o: $(srccom)/sim-utils.c $(sim_main_headers)
- $(CC) -c $(srccom)/sim-utils.c $(ALL_CFLAGS)
-
-sim-watch.o: $(srccom)/sim-watch.c $(sim_main_headers)
- $(CC) -c $(srccom)/sim-watch.c $(ALL_CFLAGS)
-
-sim-load.o: $(srccom)/sim-load.c $(srcroot)/include/callback.h
- $(CC) -c $(srccom)/sim-load.c $(ALL_CFLAGS)
-
-sim-break.o: $(srccom)/sim-break.c $(sim_main_headers) \
- $(sim_break_h)
- $(CC) -c $(srccom)/sim-break.c $(ALL_CFLAGS)
-
-
-# FIXME This is one very simple-minded way of generating the file hw-config.h
-hw-config.h: Makefile.in $(srccom)/Make-common.in config.status Makefile
- rm -f tmp-hw.h
- echo "/* generated by Makefile */" > tmp-hw.h
- for hw in $(SIM_HW) ; do \
- echo "extern const struct hw_descriptor dv_$${hw}_descriptor[];" ; \
- done >> tmp-hw.h
- echo "const struct hw_descriptor *hw_descriptors[] = {" >> tmp-hw.h
- for hw in $(SIM_HW) ; do \
- echo " dv_$${hw}_descriptor," ; \
- done >> tmp-hw.h
- echo " NULL," >> tmp-hw.h
- echo "};" >> tmp-hw.h
- mv tmp-hw.h hw-config.h
-
-hw-alloc.o: $(srccom)/hw-alloc.c $(hw_main_headers)
- $(CC) -c $(srccom)/hw-alloc.c $(ALL_CFLAGS)
-
-hw-base.o: $(srccom)/hw-base.c $(hw_main_headers) hw-config.h
- $(CC) -c $(srccom)/hw-base.c $(ALL_CFLAGS)
-
-hw-device.o: $(srccom)/hw-device.c $(hw_main_headers)
- $(CC) -c $(srccom)/hw-device.c $(ALL_CFLAGS)
-
-hw-events.o: $(srccom)/hw-events.c $(hw_main_headers) $(sim_main_headers)
- $(CC) -c $(srccom)/hw-events.c $(ALL_CFLAGS)
-
-test-hw-events: $(srccom)/hw-events.c libsim.a
- $(CC) $(ALL_CFLAGS) -DMAIN -o test-hw-events$(EXEEXT) \
- $(srccom)/hw-events.c libsim.a $(EXTRA_LIBS)
-
-hw-instances.o: $(srccom)/hw-instances.c $(hw_main_headers)
- $(CC) -c $(srccom)/hw-instances.c $(ALL_CFLAGS)
-
-hw-handles.o: $(srccom)/hw-handles.c $(hw_main_headers)
- $(CC) -c $(srccom)/hw-handles.c $(ALL_CFLAGS)
-
-hw-ports.o: $(srccom)/hw-ports.c $(hw_main_headers)
- $(CC) -c $(srccom)/hw-ports.c $(ALL_CFLAGS)
-
-hw-properties.o: $(srccom)/hw-properties.c $(hw_main_headers)
- $(CC) -c $(srccom)/hw-properties.c $(ALL_CFLAGS)
-
-hw-tree.o: $(srccom)/hw-tree.c $(hw_main_headers) $(hw-tree_h)
- $(CC) -c $(srccom)/hw-tree.c $(ALL_CFLAGS)
-
-# Devices.
-
-dv-core.o: $(srccom)/dv-core.c $(hw_main_headers) $(sim_main_headers)
- $(CC) -c $(srccom)/dv-core.c $(ALL_CFLAGS)
-
-dv-glue.o: $(srccom)/dv-glue.c $(hw_main_headers) $(sim_main_headers)
- $(CC) -c $(srccom)/dv-glue.c $(ALL_CFLAGS)
-
-dv-pal.o: $(srccom)/dv-pal.c $(hw_main_headers) $(sim_main_headers)
- $(CC) -c $(srccom)/dv-pal.c $(ALL_CFLAGS)
-
-dv-sockser.o: $(srccom)/dv-sockser.h $(sim_main_headers)
- $(CC) -c $(srccom)/dv-sockser.c $(ALL_CFLAGS)
-
-
-nrun.o: $(srccom)/nrun.c config.h tconfig.h \
- $(srcroot)/include/remote-sim.h $(srcroot)/include/callback.h \
- $(sim_main_headers)
- $(CC) -c $(srccom)/nrun.c $(ALL_CFLAGS)
-
-# CGEN support.
-
-# For use in Makefile.in for cpu-specific files.
-CGEN_MAIN_CPU_DEPS = \
- $(SIM_MAIN_DEPS) \
- $(CGEN_INCLUDE_DEPS) \
- $(srccom)/cgen-ops.h \
- $(srccom)/cgen-mem.h \
- $(srccom)/cgen-par.h \
- $(srccom)/cgen-fpu.h
-
-cgen-run.o: $(srccom)/cgen-run.c $(sim_main_headers)
- $(CC) -c $(srccom)/cgen-run.c $(ALL_CFLAGS)
-
-cgen-scache.o: $(srccom)/cgen-scache.c $(sim_main_headers)
- $(CC) -c $(srccom)/cgen-scache.c $(ALL_CFLAGS)
-
-cgen-trace.o: $(srccom)/cgen-trace.c $(sim_main_headers)
- $(CC) -c $(srccom)/cgen-trace.c $(ALL_CFLAGS)
-
-cgen-fpu.o: $(srccom)/cgen-fpu.c $(sim_main_headers) $(sim-fpu_h)
- $(CC) -c $(srccom)/cgen-fpu.c $(ALL_CFLAGS)
-
-cgen-accfp.o: $(srccom)/cgen-accfp.c $(sim_main_headers) $(sim-fpu_h)
- $(CC) -c $(srccom)/cgen-accfp.c $(ALL_CFLAGS)
-
-cgen-utils.o: $(srccom)/cgen-utils.c $(sim_main_headers) \
- $(srccom)/cgen-mem.h $(srccom)/cgen-ops.h $(srccom)/cgen-engine.h
- $(CC) -c $(srccom)/cgen-utils.c $(ALL_CFLAGS)
-
-cgen-par.o: $(srccom)/cgen-par.c $(sim_main_headers) \
- $(srccom)/cgen-mem.h $(srccom)/cgen-par.h
- $(CC) -c $(srccom)/cgen-par.c $(ALL_CFLAGS)
-
-# Support targets.
-
-install: install-common $(SIM_EXTRA_INSTALL)
-
-install-common: installdirs
- n=`echo run | sed '$(program_transform_name)'`; \
- $(INSTALL_PROGRAM) run$(EXEEXT) $(bindir)/$$n$(EXEEXT)
- n=`echo libsim.a | sed s/libsim.a/lib$(target_alias)-sim.a/`; \
- $(INSTALL_DATA) libsim.a $(libdir)/$$n ; \
- ( cd $(libdir) ; $(RANLIB) $$n )
-
-installdirs:
- $(SHELL) $(srcdir)/../../mkinstalldirs $(bindir)
-
-check:
- cd ../testsuite && $(MAKE) check RUNTESTFLAGS="$(RUNTESTFLAGS)"
-
-info:
-clean-info:
-install-info:
-
-.NOEXPORT:
-MAKEOVERRIDES=
-
-tags etags: TAGS
-
-# Macros like EXTERN_SIM_CORE confuse tags.
-# And the sim-n-foo.h files create functions that can't be found either.
-TAGS: force
- cd $(srcdir) && \
- etags --regex '/^\([a-z_]+\) (/\1/' --regex '/^\/[*] TAGS: .*/' \
- *.[ch] ../common/*.[ch]
-
-clean: $(SIM_EXTRA_CLEAN)
- rm -f *.[oa] *~ core
- rm -f run libsim.a
- rm -f gentmap targ-map.c targ-vals.h stamp-tvals
- if [ ! -f Make-common.in ] ; then \
- rm -f $(BUILT_SRC_FROM_COMMON) ; \
- fi
- rm -f tmp-mloop.hin tmp-mloop.h tmp-mloop.cin tmp-mloop.c
-
-distclean mostlyclean maintainer-clean realclean: clean
- rm -f TAGS
- rm -f Makefile config.cache config.log config.status .gdbinit
- rm -f tconfig.h config.h stamp-h
- rm -f targ-vals.def
-
-.c.o:
- $(CC) -c $(ALL_CFLAGS) $<
-
-# Dummy target to force execution of dependent targets.
-force:
-
-Makefile: Makefile.in $(srccom)/Make-common.in config.status
- CONFIG_HEADERS= $(SHELL) ./config.status
-
-config.status: configure
- $(SHELL) ./config.status --recheck
-
-config.h: stamp-h ; @true
-stamp-h: config.in config.status
- CONFIG_FILES= CONFIG_HEADERS=config.h:config.in $(SHELL) ./config.status
-
-.gdbinit: # config.status $(srccom)/gdbinit.in
- CONFIG_FILES=$@:../common/gdbinit.in CONFIG_HEADERS= $(SHELL) ./config.status
-
-
-# CGEN support
-
-CGENDIR = @cgendir@
-CGEN = `if [ -f ../../guile/libguile/guile ]; then echo ../../guile/libguile/guile; else echo guile ; fi`
-CGENFLAGS = -v
-CGEN_CPU_DIR = $(CGENDIR)/cpu
-
-CGEN_READ_SCM = ../../cgen/stamp-cgen $(CGENDIR)/sim.scm
-CGEN_ARCH_SCM = $(CGENDIR)/sim-arch.scm
-CGEN_CPU_SCM = $(CGENDIR)/sim-cpu.scm $(CGENDIR)/sim-model.scm
-CGEN_DECODE_SCM = $(CGENDIR)/sim-decode.scm
-CGEN_DESC_SCM = $(CGENDIR)/desc.scm $(CGENDIR)/desc-cpu.scm
-
-# Various choices for which cpu specific files to generate.
-CGEN_CPU_EXTR = -E tmp-ext.c1
-CGEN_CPU_READ = -R tmp-read.c1
-CGEN_CPU_WRITE = -W tmp-write.c1
-CGEN_CPU_SEM = -S tmp-sem.c1
-CGEN_CPU_SEMSW = -X tmp-semsw.c1
-
-CGEN_FLAGS_TO_PASS = \
- CGEN=$(CGEN) \
- CGENFLAGS="$(CGENFLAGS)"
-
-# We store the generated files in the source directory until we decide to
-# ship a Scheme interpreter with gdb/binutils. Maybe we never will.
-
-cgen-arch: force
- $(SHELL) $(srccom)/cgen.sh arch $(srcdir) \
- $(CGEN) $(CGENDIR) "$(CGENFLAGS)" \
- $(arch) "$(FLAGS)" ignored "$(isa)" $(mach) ignored ignored
-
-cgen-cpu: force
- $(SHELL) $(srccom)/cgen.sh cpu $(srcdir) \
- $(CGEN) $(CGENDIR) "$(CGENFLAGS)" \
- $(arch) "$(FLAGS)" $(cpu) "$(isa)" $(mach) "$(SUFFIX)" "$(EXTRAFILES)"
-
-cgen-defs: force
- $(SHELL) $(srccom)/cgen.sh defs $(srcdir) \
- $(CGEN) $(CGENDIR) "$(CGENFLAGS)" \
- $(arch) "$(FLAGS)" $(cpu) "$(isa)" $(mach) "$(SUFFIX)" ignored
-
-cgen-decode: force
- $(SHELL) $(srccom)/cgen.sh decode $(srcdir) \
- $(CGEN) $(CGENDIR) "$(CGENFLAGS)" \
- $(arch) "$(FLAGS)" $(cpu) "$(isa)" $(mach) "$(SUFFIX)" "$(EXTRAFILES)"
-
-cgen-cpu-decode: force
- $(SHELL) $(srccom)/cgen.sh cpu-decode $(srcdir) \
- $(CGEN) $(CGENDIR) "$(CGENFLAGS)" \
- $(arch) "$(FLAGS)" $(cpu) "$(isa)" $(mach) "$(SUFFIX)" "$(EXTRAFILES)"
-
-cgen-desc: force
- $(SHELL) $(srccom)/cgen.sh desc $(srcdir) \
- $(CGEN) $(CGENDIR) "$(CGENFLAGS)" \
- $(arch) "$(FLAGS)" $(cpu) "$(isa)" $(mach) "$(SUFFIX)" ignored
-
-## End COMMON_POST_CONFIG_FRAG
diff --git a/sim/common/Makefile.in b/sim/common/Makefile.in
deleted file mode 100644
index d021566ea7c..00000000000
--- a/sim/common/Makefile.in
+++ /dev/null
@@ -1,136 +0,0 @@
-# Makefile template for Configure for simulator common directory
-# Copyright (C) 1996, 1997 Free Software Foundation, Inc.
-#
-# This program is free software; you can redistribute it and/or modify
-# it under the terms of the GNU General Public License as published by
-# the Free Software Foundation; either version 2 of the License, or
-# (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
-default: all
-
-VPATH = @srcdir@
-srcdir = @srcdir@
-srcroot = $(srcdir)/../..
-
-prefix = @prefix@
-exec_prefix = @exec_prefix@
-
-host_alias = @host_alias@
-target_alias = @target_alias@
-program_transform_name = @program_transform_name@
-bindir = @bindir@
-
-libdir = @libdir@
-tooldir = $(libdir)/$(target_alias)
-
-datadir = @datadir@
-mandir = @mandir@
-man1dir = $(mandir)/man1
-infodir = @infodir@
-includedir = @includedir@
-
-SHELL = /bin/sh
-
-INSTALL = @INSTALL@
-INSTALL_PROGRAM = @INSTALL_PROGRAM@
-INSTALL_DATA = @INSTALL_DATA@
-
-CC = @CC@
-CC_FOR_BUILD = @CC_FOR_BUILD@
-CFLAGS = @CFLAGS@
-SIM_CFLAGS = @sim_cflags@
-
-# These are used to rebuild nltvals.def.
-CPP_FOR_TARGET = @CPP_FOR_TARGET@
-TARGET_SUBDIR = @TARGET_SUBDIR@
-
-HDEFINES = @HDEFINES@
-TDEFINES =
-
-CONFIG_CFLAGS = @DEFS@ $(SIM_CFLAGS) $(HDEFINES) $(TDEFINES)
-CSEARCH = -I. -I$(srcdir) -I$(srcroot)/include
-ALL_CFLAGS = $(CFLAGS) $(CONFIG_CFLAGS) $(CSEARCH)
-BUILD_CFLAGS = -g -O $(CSEARCH)
-
-AR = @AR@
-AR_FLAGS = rc
-RANLIB = @RANLIB@
-MAKEINFO = makeinfo
-
-.NOEXPORT:
-MAKEOVERRIDES=
-
-all:
-
-# Generate nltvals.def for newlib/libgloss using devo and build tree.
-# This file is shipped with distributions so we build in the source dir.
-# Use `make headers' to rebuild.
-# Note: If gdb releases begin to contain target header files (not a good idea,
-# but if they did ...), targ-vals.def coud be generated at build time.
-# An alternative is to slurp in the tables at runtime.
-.PHONY: headers
-headers:
- rootme=`pwd` ; \
- cd $(srcdir) ; \
- rm -f nltvals.new ; \
- $(SHELL) $(srcdir)/gennltvals.sh $(SHELL) $(srcroot) "$(CPP_FOR_TARGET)" > nltvals.new ; \
- $(SHELL) $(srcroot)/move-if-change nltvals.new nltvals.def
-
-.c.o:
- $(CC) -c $< $(ALL_CFLAGS)
-
-check:
-
-info:
-clean-info:
-install-info:
-
-tags etags: TAGS
-
-# Macros like EXTERN_SIM_CORE confuse tags.
-# And the sim-n-foo.h files create functions that can't be found either.
-TAGS: force
- cd $(srcdir) && \
- etags --regex '/^\([a-z_]+\) (/\1/' --regex '/^.*\/[*] TAGS: .*/' \
- *.c *.h
-
-clean:
- rm -f *.[oa] *~ core
- rm -f $(ALL)
-
-distclean mostlyclean maintainer-clean realclean: clean
- rm -f TAGS
- rm -f Makefile config.cache config.log config.status
- rm -f cconfig.h config.h stamp-h
-
-# Dummy target to force execution of dependent targets.
-force:
-
-# Copy the files into directories where they will be run.
-install: install-man
-
-install-man: installdirs
- n=`echo run | sed '$(program_transform_name)'`; \
- $(INSTALL_DATA) $(srcdir)/run.1 $(man1dir)/$$n.1
-
-installdirs:
- $(SHELL) $(srcdir)/../../mkinstalldirs $(man1dir)
-
-Makefile: Makefile.in config.status
- $(SHELL) ./config.status
-
-config.status: configure
- $(SHELL) ./config.status --recheck
-
-config.h: stamp-h ; @true
-stamp-h: config.in config.status
- CONFIG_FILES= CONFIG_HEADERS=config.h:config.in $(SHELL) ./config.status
diff --git a/sim/common/acconfig.h b/sim/common/acconfig.h
deleted file mode 100644
index f9b87a10c60..00000000000
--- a/sim/common/acconfig.h
+++ /dev/null
@@ -1,15 +0,0 @@
-
-/* Define to 1 if NLS is requested. */
-#undef ENABLE_NLS
-
-/* Define as 1 if you have catgets and don't want to use GNU gettext. */
-#undef HAVE_CATGETS
-
-/* Define as 1 if you have gettext and don't want to use GNU gettext. */
-#undef HAVE_GETTEXT
-
-/* Define as 1 if you have the stpcpy function. */
-#undef HAVE_STPCPY
-
-/* Define if your locale.h file contains LC_MESSAGES. */
-#undef HAVE_LC_MESSAGES
diff --git a/sim/common/aclocal.m4 b/sim/common/aclocal.m4
deleted file mode 100644
index a1c797af274..00000000000
--- a/sim/common/aclocal.m4
+++ /dev/null
@@ -1,1228 +0,0 @@
-# This file contains common code used by all simulators.
-#
-# SIM_AC_COMMON invokes AC macros used by all simulators and by the common
-# directory. It is intended to be invoked before any target specific stuff.
-# SIM_AC_OUTPUT is a cover function to AC_OUTPUT to generate the Makefile.
-# It is intended to be invoked last.
-#
-# The simulator's configure.in should look like:
-#
-# dnl Process this file with autoconf to produce a configure script.
-# sinclude(../common/aclocal.m4)
-# AC_PREREQ(2.5)dnl
-# AC_INIT(Makefile.in)
-#
-# SIM_AC_COMMON
-#
-# ... target specific stuff ...
-#
-# SIM_AC_OUTPUT
-
-AC_DEFUN(SIM_AC_COMMON,
-[
-# autoconf.info says this should be called right after AC_INIT.
-AC_CONFIG_HEADER(ifelse([$1],,config.h,[$1]):config.in)
-
-AC_CONFIG_AUX_DIR(`cd $srcdir;pwd`/../..)
-AC_CANONICAL_SYSTEM
-AC_ARG_PROGRAM
-AC_PROG_CC
-AC_PROG_INSTALL
-
-# Put a plausible default for CC_FOR_BUILD in Makefile.
-if test "x$cross_compiling" = "xno"; then
- CC_FOR_BUILD='$(CC)'
-else
- CC_FOR_BUILD=gcc
-fi
-AC_SUBST(CC_FOR_BUILD)
-
-AC_SUBST(CFLAGS)
-AC_SUBST(HDEFINES)
-AR=${AR-ar}
-AC_SUBST(AR)
-AC_PROG_RANLIB
-
-dnl We don't use gettext, but bfd does. So we do the appropriate checks
-dnl to see if there are intl libraries we should link against.
-ALL_LINGUAS=
-CY_GNU_GETTEXT
-
-# Check for common headers.
-# FIXME: Seems to me this can cause problems for i386-windows hosts.
-# At one point there were hardcoded AC_DEFINE's if ${host} = i386-*-windows*.
-AC_CHECK_HEADERS(stdlib.h string.h strings.h unistd.h time.h)
-AC_CHECK_HEADERS(sys/time.h sys/resource.h)
-AC_CHECK_HEADERS(fcntl.h fpu_control.h)
-AC_CHECK_HEADERS(dlfcn.h errno.h sys/stat.h)
-AC_CHECK_FUNCS(getrusage time sigaction __setfpucw)
-
-# Check for socket libraries
-AC_CHECK_LIB(socket, bind)
-AC_CHECK_LIB(nsl, gethostbyname)
-
-. ${srcdir}/../../bfd/configure.host
-
-dnl Standard (and optional) simulator options.
-dnl Eventually all simulators will support these.
-dnl Do not add any here that cannot be supported by all simulators.
-dnl Do not add similar but different options to a particular simulator,
-dnl all shall eventually behave the same way.
-
-
-dnl We don't use automake, but we still want to support
-dnl --enable-maintainer-mode.
-USE_MAINTAINER_MODE=no
-AC_ARG_ENABLE(maintainer-mode,
-[ --enable-maintainer-mode Enable developer functionality.],
-[case "${enableval}" in
- yes) MAINT="" USE_MAINTAINER_MODE=yes ;;
- no) MAINT="#" ;;
- *) AC_MSG_ERROR("--enable-maintainer-mode does not take a value"); MAINT="#" ;;
-esac
-if test x"$silent" != x"yes" && test x"$MAINT" = x""; then
- echo "Setting maintainer mode" 6>&1
-fi],[MAINT="#"])dnl
-AC_SUBST(MAINT)
-
-
-dnl This is a generic option to enable special byte swapping
-dnl insns on *any* cpu.
-AC_ARG_ENABLE(sim-bswap,
-[ --enable-sim-bswap Use Host specific BSWAP instruction.],
-[case "${enableval}" in
- yes) sim_bswap="-DWITH_BSWAP=1 -DUSE_BSWAP=1";;
- no) sim_bswap="-DWITH_BSWAP=0";;
- *) AC_MSG_ERROR("--enable-sim-bswap does not take a value"); sim_bswap="";;
-esac
-if test x"$silent" != x"yes" && test x"$sim_bswap" != x""; then
- echo "Setting bswap flags = $sim_bswap" 6>&1
-fi],[sim_bswap=""])dnl
-AC_SUBST(sim_bswap)
-
-
-AC_ARG_ENABLE(sim-cflags,
-[ --enable-sim-cflags=opts Extra CFLAGS for use in building simulator],
-[case "${enableval}" in
- yes) sim_cflags="-O2 -fomit-frame-pointer";;
- trace) AC_MSG_ERROR("Please use --enable-sim-debug instead."); sim_cflags="";;
- no) sim_cflags="";;
- *) sim_cflags=`echo "${enableval}" | sed -e "s/,/ /g"`;;
-esac
-if test x"$silent" != x"yes" && test x"$sim_cflags" != x""; then
- echo "Setting sim cflags = $sim_cflags" 6>&1
-fi],[sim_cflags=""])dnl
-AC_SUBST(sim_cflags)
-
-
-dnl --enable-sim-debug is for developers of the simulator
-dnl the allowable values are work-in-progress
-AC_ARG_ENABLE(sim-debug,
-[ --enable-sim-debug=opts Enable debugging flags],
-[case "${enableval}" in
- yes) sim_debug="-DDEBUG=7 -DWITH_DEBUG=7";;
- no) sim_debug="-DDEBUG=0 -DWITH_DEBUG=0";;
- *) sim_debug="-DDEBUG='(${enableval})' -DWITH_DEBUG='(${enableval})'";;
-esac
-if test x"$silent" != x"yes" && test x"$sim_debug" != x""; then
- echo "Setting sim debug = $sim_debug" 6>&1
-fi],[sim_debug=""])dnl
-AC_SUBST(sim_debug)
-
-
-dnl --enable-sim-stdio is for users of the simulator
-dnl It determines if IO from the program is routed through STDIO (buffered)
-AC_ARG_ENABLE(sim-stdio,
-[ --enable-sim-stdio Specify whether to use stdio for console input/output.],
-[case "${enableval}" in
- yes) sim_stdio="-DWITH_STDIO=DO_USE_STDIO";;
- no) sim_stdio="-DWITH_STDIO=DONT_USE_STDIO";;
- *) AC_MSG_ERROR("Unknown value $enableval passed to --enable-sim-stdio"); sim_stdio="";;
-esac
-if test x"$silent" != x"yes" && test x"$sim_stdio" != x""; then
- echo "Setting stdio flags = $sim_stdio" 6>&1
-fi],[sim_stdio=""])dnl
-AC_SUBST(sim_stdio)
-
-
-dnl --enable-sim-trace is for users of the simulator
-dnl The argument is either a bitmask of things to enable [exactly what is
-dnl up to the simulator], or is a comma separated list of names of tracing
-dnl elements to enable. The latter is only supported on simulators that
-dnl use WITH_TRACE.
-AC_ARG_ENABLE(sim-trace,
-[ --enable-sim-trace=opts Enable tracing flags],
-[case "${enableval}" in
- yes) sim_trace="-DTRACE=1 -DWITH_TRACE=-1";;
- no) sim_trace="-DTRACE=0 -DWITH_TRACE=0";;
- [[-0-9]]*)
- sim_trace="-DTRACE='(${enableval})' -DWITH_TRACE='(${enableval})'";;
- [[a-z]]*)
- sim_trace=""
- for x in `echo "$enableval" | sed -e "s/,/ /g"`; do
- if test x"$sim_trace" = x; then
- sim_trace="-DWITH_TRACE='(TRACE_$x"
- else
- sim_trace="${sim_trace}|TRACE_$x"
- fi
- done
- sim_trace="$sim_trace)'" ;;
-esac
-if test x"$silent" != x"yes" && test x"$sim_trace" != x""; then
- echo "Setting sim trace = $sim_trace" 6>&1
-fi],[sim_trace=""])dnl
-AC_SUBST(sim_trace)
-
-
-dnl --enable-sim-profile
-dnl The argument is either a bitmask of things to enable [exactly what is
-dnl up to the simulator], or is a comma separated list of names of profiling
-dnl elements to enable. The latter is only supported on simulators that
-dnl use WITH_PROFILE.
-AC_ARG_ENABLE(sim-profile,
-[ --enable-sim-profile=opts Enable profiling flags],
-[case "${enableval}" in
- yes) sim_profile="-DPROFILE=1 -DWITH_PROFILE=-1";;
- no) sim_profile="-DPROFILE=0 -DWITH_PROFILE=0";;
- [[-0-9]]*)
- sim_profile="-DPROFILE='(${enableval})' -DWITH_PROFILE='(${enableval})'";;
- [[a-z]]*)
- sim_profile=""
- for x in `echo "$enableval" | sed -e "s/,/ /g"`; do
- if test x"$sim_profile" = x; then
- sim_profile="-DWITH_PROFILE='(PROFILE_$x"
- else
- sim_profile="${sim_profile}|PROFILE_$x"
- fi
- done
- sim_profile="$sim_profile)'" ;;
-esac
-if test x"$silent" != x"yes" && test x"$sim_profile" != x""; then
- echo "Setting sim profile = $sim_profile" 6>&1
-fi],[sim_profile="-DPROFILE=1 -DWITH_PROFILE=-1"])dnl
-AC_SUBST(sim_profile)
-
-
-dnl Types used by common code
-AC_TYPE_SIGNAL
-
-dnl Detect exe extension
-AC_EXEEXT
-
-dnl These are available to append to as desired.
-sim_link_files=
-sim_link_links=
-
-dnl Create tconfig.h either from simulator's tconfig.in or default one
-dnl in common.
-sim_link_links=tconfig.h
-if test -f ${srcdir}/tconfig.in
-then
- sim_link_files=tconfig.in
-else
- sim_link_files=../common/tconfig.in
-fi
-
-# targ-vals.def points to the libc macro description file.
-case "${target}" in
-*-*-*) TARG_VALS_DEF=../common/nltvals.def ;;
-esac
-sim_link_files="${sim_link_files} ${TARG_VALS_DEF}"
-sim_link_links="${sim_link_links} targ-vals.def"
-
-]) dnl End of SIM_AC_COMMON
-
-
-dnl Additional SIM options that can (optionally) be configured
-dnl For optional simulator options, a macro SIM_AC_OPTION_* is defined.
-dnl Simulators that wish to use the relevant option specify the macro
-dnl in the simulator specific configure.in file between the SIM_AC_COMMON
-dnl and SIM_AC_OUTPUT lines.
-
-
-dnl Specify the running environment.
-dnl If the simulator invokes this in its configure.in then without this option
-dnl the default is the user environment and all are runtime selectable.
-dnl If the simulator doesn't invoke this, only the user environment is
-dnl supported.
-dnl ??? Until there is demonstrable value in doing something more complicated,
-dnl let's not.
-AC_DEFUN(SIM_AC_OPTION_ENVIRONMENT,
-[
-AC_ARG_ENABLE(sim-environment,
-[ --enable-sim-environment=environment Specify mixed, user, virtual or operating environment.],
-[case "${enableval}" in
- all | ALL) sim_environment="-DWITH_ENVIRONMENT=ALL_ENVIRONMENT";;
- user | USER) sim_environment="-DWITH_ENVIRONMENT=USER_ENVIRONMENT";;
- virtual | VIRTUAL) sim_environment="-DWITH_ENVIRONMENT=VIRTUAL_ENVIRONMENT";;
- operating | OPERATING) sim_environment="-DWITH_ENVIRONMENT=OPERATING_ENVIRONMENT";;
- *) AC_MSG_ERROR("Unknown value $enableval passed to --enable-sim-environment");
- sim_environment="";;
-esac
-if test x"$silent" != x"yes" && test x"$sim_environment" != x""; then
- echo "Setting sim environment = $sim_environment" 6>&1
-fi],
-[sim_environment="-DWITH_ENVIRONMENT=ALL_ENVIRONMENT"])dnl
-])
-AC_SUBST(sim_environment)
-
-
-dnl Specify the alignment restrictions of the target architecture.
-dnl Without this option all possible alignment restrictions are accommodated.
-dnl arg[1] is hardwired target alignment
-dnl arg[2] is default target alignment
-AC_DEFUN(SIM_AC_OPTION_ALIGNMENT,
-wire_alignment="[$1]"
-default_alignment="[$2]"
-[
-AC_ARG_ENABLE(sim-alignment,
-[ --enable-sim-alignment=align Specify strict, nonstrict or forced alignment of memory accesses.],
-[case "${enableval}" in
- strict | STRICT) sim_alignment="-DWITH_ALIGNMENT=STRICT_ALIGNMENT";;
- nonstrict | NONSTRICT) sim_alignment="-DWITH_ALIGNMENT=NONSTRICT_ALIGNMENT";;
- forced | FORCED) sim_alignment="-DWITH_ALIGNMENT=FORCED_ALIGNMENT";;
- yes) if test x"$wire_alignment" != x; then
- sim_alignment="-DWITH_ALIGNMENT=${wire_alignment}"
- else
- if test x"$default_alignment" != x; then
- sim_alignment="-DWITH_ALIGNMENT=${default_alignment}"
- else
- echo "No hard-wired alignment for target $target" 1>&6
- sim_alignment="-DWITH_ALIGNMENT=0"
- fi
- fi;;
- no) if test x"$default_alignment" != x; then
- sim_alignment="-DWITH_DEFAULT_ALIGNMENT=${default_alignment}"
- else
- if test x"$wire_alignment" != x; then
- sim_alignment="-DWITH_DEFAULT_ALIGNMENT=${wire_alignment}"
- else
- echo "No default alignment for target $target" 1>&6
- sim_alignment="-DWITH_DEFAULT_ALIGNMENT=0"
- fi
- fi;;
- *) AC_MSG_ERROR("Unknown value $enableval passed to --enable-sim-alignment"); sim_alignment="";;
-esac
-if test x"$silent" != x"yes" && test x"$sim_alignment" != x""; then
- echo "Setting alignment flags = $sim_alignment" 6>&1
-fi],
-[if test x"$default_alignment" != x; then
- sim_alignment="-DWITH_DEFAULT_ALIGNMENT=${default_alignment}"
-else
- if test x"$wire_alignment" != x; then
- sim_alignment="-DWITH_ALIGNMENT=${wire_alignment}"
- else
- sim_alignment=
- fi
-fi])dnl
-])dnl
-AC_SUBST(sim_alignment)
-
-
-dnl Conditionally compile in assertion statements.
-AC_DEFUN(SIM_AC_OPTION_ASSERT,
-[
-AC_ARG_ENABLE(sim-assert,
-[ --enable-sim-assert Specify whether to perform random assertions.],
-[case "${enableval}" in
- yes) sim_assert="-DWITH_ASSERT=1";;
- no) sim_assert="-DWITH_ASSERT=0";;
- *) AC_MSG_ERROR("--enable-sim-assert does not take a value"); sim_assert="";;
-esac
-if test x"$silent" != x"yes" && test x"$sim_assert" != x""; then
- echo "Setting assert flags = $sim_assert" 6>&1
-fi],[sim_assert=""])dnl
-])
-AC_SUBST(sim_assert)
-
-
-
-dnl --enable-sim-bitsize is for developers of the simulator
-dnl It specifies the number of BITS in the target.
-dnl arg[1] is the number of bits in a word
-dnl arg[2] is the number assigned to the most significant bit
-dnl arg[3] is the number of bits in an address
-dnl arg[4] is the number of bits in an OpenFirmware cell.
-dnl FIXME: this information should be obtained from bfd/archure
-AC_DEFUN(SIM_AC_OPTION_BITSIZE,
-wire_word_bitsize="[$1]"
-wire_word_msb="[$2]"
-wire_address_bitsize="[$3]"
-wire_cell_bitsize="[$4]"
-[AC_ARG_ENABLE(sim-bitsize,
-[ --enable-sim-bitsize=N Specify target bitsize (32 or 64).],
-[sim_bitsize=
-case "${enableval}" in
- 64,63 | 64,63,* ) sim_bitsize="-DWITH_TARGET_WORD_BITSIZE=64 -DWITH_TARGET_WORD_MSB=63";;
- 32,31 | 32,31,* ) sim_bitsize="-DWITH_TARGET_WORD_BITSIZE=32 -DWITH_TARGET_WORD_MSB=31";;
- 64,0 | 64,0,* ) sim_bitsize="-DWITH_TARGET_WORD_BITSIZE=32 -DWITH_TARGET_WORD_MSB=0";;
- 32,0 | 64,0,* ) sim_bitsize="-DWITH_TARGET_WORD_BITSIZE=32 -DWITH_TARGET_WORD_MSB=0";;
- 32) if test x"$wire_word_msb" != x -a x"$wire_word_msb" != x0; then
- sim_bitsize="-DWITH_TARGET_WORD_BITSIZE=32 -DWITH_TARGET_WORD_MSB=31"
- else
- sim_bitsize="-DWITH_TARGET_WORD_BITSIZE=32 -DWITH_TARGET_WORD_MSB=0"
- fi ;;
- 64) if test x"$wire_word_msb" != x -a x"$wire_word_msb" != x0; then
- sim_bitsize="-DWITH_TARGET_WORD_BITSIZE=64 -DWITH_TARGET_WORD_MSB=63"
- else
- sim_bitsize="-DWITH_TARGET_WORD_BITSIZE=64 -DWITH_TARGET_WORD_MSB=0"
- fi ;;
- *) AC_MSG_ERROR("--enable-sim-bitsize was given $enableval. Expected 32 or 64") ;;
-esac
-# address bitsize
-tmp=`echo "${enableval}" | sed -e "s/^[[0-9]]*,*[[0-9]]*,*//"`
-case x"${tmp}" in
- x ) ;;
- x32 | x32,* ) sim_bitsize="${sim_bitsize} -DWITH_TARGET_ADDRESS_BITSIZE=32" ;;
- x64 | x64,* ) sim_bitsize="${sim_bitsize} -DWITH_TARGET_ADDRESS_BITSIZE=64" ;;
- * ) AC_MSG_ERROR("--enable-sim-bitsize was given address size $enableval. Expected 32 or 64") ;;
-esac
-# cell bitsize
-tmp=`echo "${enableval}" | sed -e "s/^[[0-9]]*,*[[0-9*]]*,*[[0-9]]*,*//"`
-case x"${tmp}" in
- x ) ;;
- x32 | x32,* ) sim_bitsize="${sim_bitsize} -DWITH_TARGET_CELL_BITSIZE=32" ;;
- x64 | x64,* ) sim_bitsize="${sim_bitsize} -DWITH_TARGET_CELL_BITSIZE=64" ;;
- * ) AC_MSG_ERROR("--enable-sim-bitsize was given cell size $enableval. Expected 32 or 64") ;;
-esac
-if test x"$silent" != x"yes" && test x"$sim_bitsize" != x""; then
- echo "Setting bitsize flags = $sim_bitsize" 6>&1
-fi],
-[sim_bitsize=""
-if test x"$wire_word_bitsize" != x; then
- sim_bitsize="$sim_bitsize -DWITH_TARGET_WORD_BITSIZE=$wire_word_bitsize"
-fi
-if test x"$wire_word_msb" != x; then
- sim_bitsize="$sim_bitsize -DWITH_TARGET_WORD_MSB=$wire_word_msb"
-fi
-if test x"$wire_address_bitsize" != x; then
- sim_bitsize="$sim_bitsize -DWITH_TARGET_ADDRESS_BITSIZE=$wire_address_bitsize"
-fi
-if test x"$wire_cell_bitsize" != x; then
- sim_bitsize="$sim_bitsize -DWITH_TARGET_CELL_BITSIZE=$wire_cell_bitsize"
-fi])dnl
-])
-AC_SUBST(sim_bitsize)
-
-
-
-dnl --enable-sim-endian={yes,no,big,little} is for simulators
-dnl that support both big and little endian targets.
-dnl arg[1] is hardwired target endianness.
-dnl arg[2] is default target endianness.
-AC_DEFUN(SIM_AC_OPTION_ENDIAN,
-[
-wire_endian="[$1]"
-default_endian="[$2]"
-AC_ARG_ENABLE(sim-endian,
-[ --enable-sim-endian=endian Specify target byte endian orientation.],
-[case "${enableval}" in
- b*|B*) sim_endian="-DWITH_TARGET_BYTE_ORDER=BIG_ENDIAN";;
- l*|L*) sim_endian="-DWITH_TARGET_BYTE_ORDER=LITTLE_ENDIAN";;
- yes) if test x"$wire_endian" != x; then
- sim_endian="-DWITH_TARGET_BYTE_ORDER=${wire_endian}"
- else
- if test x"$default_endian" != x; then
- sim_endian="-DWITH_TARGET_BYTE_ORDER=${default_endian}"
- else
- echo "No hard-wired endian for target $target" 1>&6
- sim_endian="-DWITH_TARGET_BYTE_ORDER=0"
- fi
- fi;;
- no) if test x"$default_endian" != x; then
- sim_endian="-DWITH_DEFAULT_TARGET_BYTE_ORDER=${default_endian}"
- else
- if test x"$wire_endian" != x; then
- sim_endian="-DWITH_DEFAULT_TARGET_BYTE_ORDER=${wire_endian}"
- else
- echo "No default endian for target $target" 1>&6
- sim_endian="-DWITH_DEFAULT_TARGET_BYTE_ORDER=0"
- fi
- fi;;
- *) AC_MSG_ERROR("Unknown value $enableval for --enable-sim-endian"); sim_endian="";;
-esac
-if test x"$silent" != x"yes" && test x"$sim_endian" != x""; then
- echo "Setting endian flags = $sim_endian" 6>&1
-fi],
-[if test x"$default_endian" != x; then
- sim_endian="-DWITH_DEFAULT_TARGET_BYTE_ORDER=${default_endian}"
-else
- if test x"$wire_endian" != x; then
- sim_endian="-DWITH_TARGET_BYTE_ORDER=${wire_endian}"
- else
- sim_endian=
- fi
-fi])dnl
-])
-AC_SUBST(sim_endian)
-
-
-dnl --enable-sim-hostendian is for users of the simulator when
-dnl they find that AC_C_BIGENDIAN does not function correctly
-dnl (for instance in a canadian cross)
-AC_DEFUN(SIM_AC_OPTION_HOSTENDIAN,
-[
-AC_ARG_ENABLE(sim-hostendian,
-[ --enable-sim-hostendian=end Specify host byte endian orientation.],
-[case "${enableval}" in
- no) sim_hostendian="-DWITH_HOST_BYTE_ORDER=0";;
- b*|B*) sim_hostendian="-DWITH_HOST_BYTE_ORDER=BIG_ENDIAN";;
- l*|L*) sim_hostendian="-DWITH_HOST_BYTE_ORDER=LITTLE_ENDIAN";;
- *) AC_MSG_ERROR("Unknown value $enableval for --enable-sim-hostendian"); sim_hostendian="";;
-esac
-if test x"$silent" != x"yes" && test x"$sim_hostendian" != x""; then
- echo "Setting hostendian flags = $sim_hostendian" 6>&1
-fi],[
-if test "x$cross_compiling" = "xno"; then
- AC_C_BIGENDIAN
- if test $ac_cv_c_bigendian = yes; then
- sim_hostendian="-DWITH_HOST_BYTE_ORDER=BIG_ENDIAN"
- else
- sim_hostendian="-DWITH_HOST_BYTE_ORDER=LITTLE_ENDIAN"
- fi
-else
- sim_hostendian="-DWITH_HOST_BYTE_ORDER=0"
-fi])dnl
-])
-AC_SUBST(sim_hostendian)
-
-
-dnl --enable-sim-float is for developers of the simulator
-dnl It specifies the presence of hardware floating point
-dnl And optionally the bitsize of the floating point register.
-dnl arg[1] specifies the presence (or absence) of floating point hardware
-dnl arg[2] specifies the number of bits in a floating point register
-AC_DEFUN(SIM_AC_OPTION_FLOAT,
-[
-default_sim_float="[$1]"
-default_sim_float_bitsize="[$2]"
-AC_ARG_ENABLE(sim-float,
-[ --enable-sim-float Specify that the target processor has floating point hardware.],
-[case "${enableval}" in
- yes | hard) sim_float="-DWITH_FLOATING_POINT=HARD_FLOATING_POINT";;
- no | soft) sim_float="-DWITH_FLOATING_POINT=SOFT_FLOATING_POINT";;
- 32) sim_float="-DWITH_FLOATING_POINT=HARD_FLOATING_POINT -DWITH_TARGET_FLOATING_POINT_BITSIZE=32";;
- 64) sim_float="-DWITH_FLOATING_POINT=HARD_FLOATING_POINT -DWITH_TARGET_FLOATING_POINT_BITSIZE=64";;
- *) AC_MSG_ERROR("Unknown value $enableval passed to --enable-sim-float"); sim_float="";;
-esac
-if test x"$silent" != x"yes" && test x"$sim_float" != x""; then
- echo "Setting float flags = $sim_float" 6>&1
-fi],[
-sim_float=
-if test x"${default_sim_float}" != x""; then
- sim_float="-DWITH_FLOATING_POINT=${default_sim_float}"
-fi
-if test x"${default_sim_float_bitsize}" != x""; then
- sim_float="$sim_float -DWITH_TARGET_FLOATING_POINT_BITSIZE=${default_sim_float_bitsize}"
-fi
-])dnl
-])
-AC_SUBST(sim_float)
-
-
-dnl The argument is the default cache size if none is specified.
-AC_DEFUN(SIM_AC_OPTION_SCACHE,
-[
-default_sim_scache="ifelse([$1],,0,[$1])"
-AC_ARG_ENABLE(sim-scache,
-[ --enable-sim-scache=size Specify simulator execution cache size.],
-[case "${enableval}" in
- yes) sim_scache="-DWITH_SCACHE=${default_sim_scache}";;
- no) sim_scache="-DWITH_SCACHE=0" ;;
- [[0-9]]*) sim_scache="-DWITH_SCACHE=${enableval}";;
- *) AC_MSG_ERROR("Bad value $enableval passed to --enable-sim-scache");
- sim_scache="";;
-esac
-if test x"$silent" != x"yes" && test x"$sim_scache" != x""; then
- echo "Setting scache size = $sim_scache" 6>&1
-fi],[sim_scache="-DWITH_SCACHE=${default_sim_scache}"])
-])
-AC_SUBST(sim_scache)
-
-
-dnl The argument is the default model if none is specified.
-AC_DEFUN(SIM_AC_OPTION_DEFAULT_MODEL,
-[
-default_sim_default_model="ifelse([$1],,0,[$1])"
-AC_ARG_ENABLE(sim-default-model,
-[ --enable-sim-default-model=model Specify default model to simulate.],
-[case "${enableval}" in
- yes|no) AC_MSG_ERROR("Missing argument to --enable-sim-default-model");;
- *) sim_default_model="-DWITH_DEFAULT_MODEL='\"${enableval}\"'";;
-esac
-if test x"$silent" != x"yes" && test x"$sim_default_model" != x""; then
- echo "Setting default model = $sim_default_model" 6>&1
-fi],[sim_default_model="-DWITH_DEFAULT_MODEL='\"${default_sim_default_model}\"'"])
-])
-AC_SUBST(sim_default_model)
-
-
-dnl --enable-sim-hardware is for users of the simulator
-dnl arg[1] Enable sim-hw by default? ("yes" or "no")
-dnl arg[2] is a space separated list of devices that override the defaults
-dnl arg[3] is a space separated list of extra target specific devices.
-AC_DEFUN(SIM_AC_OPTION_HARDWARE,
-[
-if test x"[$1]" = x"yes"; then
- sim_hw_p=yes
-else
- sim_hw_p=no
-fi
-if test "[$2]"; then
- hardware="core pal glue"
-else
- hardware="core pal glue [$3]"
-fi
-sim_hw_cflags="-DWITH_HW=1"
-sim_hw="$hardware"
-sim_hw_objs="\$(SIM_COMMON_HW_OBJS) `echo $sim_hw | sed -e 's/\([[^ ]][[^ ]]*\)/dv-\1.o/g'`"
-AC_ARG_ENABLE(sim-hardware,
-[ --enable-sim-hardware=LIST Specify the hardware to be included in the build.],
-[
-case "${enableval}" in
- yes) sim_hw_p=yes;;
- no) sim_hw_p=no;;
- ,*) sim_hw_p=yes; hardware="${hardware} `echo ${enableval} | sed -e 's/,/ /'`";;
- *,) sim_hw_p=yes; hardware="`echo ${enableval} | sed -e 's/,/ /'` ${hardware}";;
- *) sim_hw_p=yes; hardware="`echo ${enableval} | sed -e 's/,/ /'`"'';;
-esac
-if test "$sim_hw_p" != yes; then
- sim_hw_objs=
- sim_hw_cflags="-DWITH_HW=0"
- sim_hw=
-else
- sim_hw_cflags="-DWITH_HW=1"
- # remove duplicates
- sim_hw=""
- sim_hw_objs="\$(SIM_COMMON_HW_OBJS)"
- for i in x $hardware ; do
- case " $f " in
- x) ;;
- *" $i "*) ;;
- *) sim_hw="$sim_hw $i" ; sim_hw_objs="$sim_hw_objs dv-$i.o";;
- esac
- done
-fi
-if test x"$silent" != x"yes" && test "$sim_hw_p" = "yes"; then
- echo "Setting hardware to $sim_hw_cflags, $sim_hw, $sim_hw_objs"
-fi],[
-if test "$sim_hw_p" != yes; then
- sim_hw_objs=
- sim_hw_cflags="-DWITH_HW=0"
- sim_hw=
-fi
-if test x"$silent" != x"yes"; then
- echo "Setting hardware to $sim_hw_cflags, $sim_hw, $sim_hw_objs"
-fi])dnl
-])
-AC_SUBST(sim_hw_cflags)
-AC_SUBST(sim_hw_objs)
-AC_SUBST(sim_hw)
-
-
-dnl --enable-sim-inline is for users that wish to ramp up the simulator's
-dnl performance by inlining functions.
-dnl Guarantee that unconfigured simulators do not do any inlining
-sim_inline="-DDEFAULT_INLINE=0"
-AC_DEFUN(SIM_AC_OPTION_INLINE,
-[
-default_sim_inline="ifelse([$1],,,-DDEFAULT_INLINE=[$1])"
-AC_ARG_ENABLE(sim-inline,
-[ --enable-sim-inline=inlines Specify which functions should be inlined.],
-[sim_inline=""
-case "$enableval" in
- no) sim_inline="-DDEFAULT_INLINE=0";;
- 0) sim_inline="-DDEFAULT_INLINE=0";;
- yes | 2) sim_inline="-DDEFAULT_INLINE=ALL_C_INLINE";;
- 1) sim_inline="-DDEFAULT_INLINE=INLINE_LOCALS";;
- *) for x in `echo "$enableval" | sed -e "s/,/ /g"`; do
- new_flag=""
- case "$x" in
- *_INLINE=*) new_flag="-D$x";;
- *=*) new_flag=`echo "$x" | sed -e "s/=/_INLINE=/" -e "s/^/-D/"`;;
- *_INLINE) new_flag="-D$x=ALL_C_INLINE";;
- *) new_flag="-D$x""_INLINE=ALL_C_INLINE";;
- esac
- if test x"$sim_inline" = x""; then
- sim_inline="$new_flag"
- else
- sim_inline="$sim_inline $new_flag"
- fi
- done;;
-esac
-if test x"$silent" != x"yes" && test x"$sim_inline" != x""; then
- echo "Setting inline flags = $sim_inline" 6>&1
-fi],[
-if test "x$cross_compiling" = "xno"; then
- if test x"$GCC" != "x" -a x"${default_sim_inline}" != "x" ; then
- sim_inline="${default_sim_inline}"
- if test x"$silent" != x"yes"; then
- echo "Setting inline flags = $sim_inline" 6>&1
- fi
- else
- sim_inline=""
- fi
-else
- sim_inline="-DDEFAULT_INLINE=0"
-fi])dnl
-])
-AC_SUBST(sim_inline)
-
-
-AC_DEFUN(SIM_AC_OPTION_PACKAGES,
-[
-AC_ARG_ENABLE(sim-packages,
-[ --enable-sim-packages=list Specify the packages to be included in the build.],
-[packages=disklabel
-case "${enableval}" in
- yes) ;;
- no) AC_MSG_ERROR("List of packages must be specified for --enable-sim-packages"); packages="";;
- ,*) packages="${packages}${enableval}";;
- *,) packages="${enableval}${packages}";;
- *) packages="${enableval}"'';;
-esac
-sim_pk_src=`echo $packages | sed -e 's/,/.c pk_/g' -e 's/^/pk_/' -e 's/$/.c/'`
-sim_pk_obj=`echo $sim_pk_src | sed -e 's/\.c/.o/g'`
-if test x"$silent" != x"yes" && test x"$packages" != x""; then
- echo "Setting packages to $sim_pk_src, $sim_pk_obj"
-fi],[packages=disklabel
-sim_pk_src=`echo $packages | sed -e 's/,/.c pk_/g' -e 's/^/pk_/' -e 's/$/.c/'`
-sim_pk_obj=`echo $sim_pk_src | sed -e 's/\.c/.o/g'`
-if test x"$silent" != x"yes"; then
- echo "Setting packages to $sim_pk_src, $sim_pk_obj"
-fi])dnl
-])
-AC_SUBST(sim_packages)
-
-
-AC_DEFUN(SIM_AC_OPTION_REGPARM,
-[
-AC_ARG_ENABLE(sim-regparm,
-[ --enable-sim-regparm=nr-parm Pass parameters in registers instead of on the stack - x86/GCC specific.],
-[case "${enableval}" in
- 0*|1*|2*|3*|4*|5*|6*|7*|8*|9*) sim_regparm="-DWITH_REGPARM=${enableval}";;
- no) sim_regparm="" ;;
- yes) sim_regparm="-DWITH_REGPARM=3";;
- *) AC_MSG_ERROR("Unknown value $enableval for --enable-sim-regparm"); sim_regparm="";;
-esac
-if test x"$silent" != x"yes" && test x"$sim_regparm" != x""; then
- echo "Setting regparm flags = $sim_regparm" 6>&1
-fi],[sim_regparm=""])dnl
-])
-AC_SUBST(sim_regparm)
-
-
-AC_DEFUN(SIM_AC_OPTION_RESERVED_BITS,
-[
-default_sim_reserved_bits="ifelse([$1],,1,[$1])"
-AC_ARG_ENABLE(sim-reserved-bits,
-[ --enable-sim-reserved-bits Specify whether to check reserved bits in instruction.],
-[case "${enableval}" in
- yes) sim_reserved_bits="-DWITH_RESERVED_BITS=1";;
- no) sim_reserved_bits="-DWITH_RESERVED_BITS=0";;
- *) AC_MSG_ERROR("--enable-sim-reserved-bits does not take a value"); sim_reserved_bits="";;
-esac
-if test x"$silent" != x"yes" && test x"$sim_reserved_bits" != x""; then
- echo "Setting reserved flags = $sim_reserved_bits" 6>&1
-fi],[sim_reserved_bits="-DWITH_RESERVED_BITS=${default_sim_reserved_bits}"])dnl
-])
-AC_SUBST(sim_reserved_bits)
-
-
-AC_DEFUN(SIM_AC_OPTION_SMP,
-[
-default_sim_smp="ifelse([$1],,5,[$1])"
-AC_ARG_ENABLE(sim-smp,
-[ --enable-sim-smp=n Specify number of processors to configure for (default ${default_sim_smp}).],
-[case "${enableval}" in
- yes) sim_smp="-DWITH_SMP=5" ; sim_igen_smp="-N 5";;
- no) sim_smp="-DWITH_SMP=0" ; sim_igen_smp="-N 0";;
- *) sim_smp="-DWITH_SMP=$enableval" ; sim_igen_smp="-N $enableval";;
-esac
-if test x"$silent" != x"yes" && test x"$sim_smp" != x""; then
- echo "Setting smp flags = $sim_smp" 6>&1
-fi],[sim_smp="-DWITH_SMP=${default_sim_smp}" ; sim_igen_smp="-N ${default_sim_smp}"
-if test x"$silent" != x"yes"; then
- echo "Setting smp flags = $sim_smp" 6>&1
-fi])dnl
-])
-AC_SUBST(sim_smp)
-
-
-AC_DEFUN(SIM_AC_OPTION_STDCALL,
-[
-AC_ARG_ENABLE(sim-stdcall,
-[ --enable-sim-stdcall=type Use an alternative function call/return mechanism - x86/GCC specific.],
-[case "${enableval}" in
- no) sim_stdcall="" ;;
- std*) sim_stdcall="-DWITH_STDCALL=1";;
- yes) sim_stdcall="-DWITH_STDCALL=1";;
- *) AC_MSG_ERROR("Unknown value $enableval for --enable-sim-stdcall"); sim_stdcall="";;
-esac
-if test x"$silent" != x"yes" && test x"$sim_stdcall" != x""; then
- echo "Setting function call flags = $sim_stdcall" 6>&1
-fi],[sim_stdcall=""])dnl
-])
-AC_SUBST(sim_stdcall)
-
-
-AC_DEFUN(SIM_AC_OPTION_XOR_ENDIAN,
-[
-default_sim_xor_endian="ifelse([$1],,8,[$1])"
-AC_ARG_ENABLE(sim-xor-endian,
-[ --enable-sim-xor-endian=n Specify number bytes involved in XOR bi-endian mode (default ${default_sim_xor_endian}).],
-[case "${enableval}" in
- yes) sim_xor_endian="-DWITH_XOR_ENDIAN=8";;
- no) sim_xor_endian="-DWITH_XOR_ENDIAN=0";;
- *) sim_xor_endian="-DWITH_XOR_ENDIAN=$enableval";;
-esac
-if test x"$silent" != x"yes" && test x"$sim_xor_endian" != x""; then
- echo "Setting xor-endian flag = $sim_xor_endian" 6>&1
-fi],[sim_xor_endian="-DWITH_XOR_ENDIAN=${default_sim_xor_endian}"])dnl
-])
-AC_SUBST(sim_xor_endian)
-
-
-dnl --enable-build-warnings is for developers of the simulator.
-dnl it enables extra GCC specific warnings.
-AC_DEFUN(SIM_AC_OPTION_WARNINGS,
-[
-AC_ARG_ENABLE(build-warnings,
-[ --enable-build-warnings[=LIST] Enable build-time compiler warnings],
-[build_warnings="-Wall -Wpointer-arith -Wstrict-prototypes -Wmissing-prototypes -Wmissing-declarations"
-case "${enableval}" in
- yes) ;;
- no) build_warnings="-w";;
- ,*) t=`echo "${enableval}" | sed -e "s/,/ /g"`
- build_warnings="${build_warnings} ${t}";;
- *,) t=`echo "${enableval}" | sed -e "s/,/ /g"`
- build_warnings="${t} ${build_warnings}";;
- *) build_warnings=`echo "${enableval}" | sed -e "s/,/ /g"`;;
-esac
-if test x"$silent" != x"yes" && test x"$build_warnings" != x""; then
- echo "Setting warning flags = $build_warnings" 6>&1
-fi
-WARN_CFLAGS=""
-WERROR_CFLAGS=""
-if test "x${build_warnings}" != x -a "x$GCC" = xyes
-then
- # Separate out the -Werror flag as some files just cannot be
- # compiled with it enabled.
- for w in ${build_warnings}; do
- case $w in
- -Werr*) WERROR_CFLAGS=-Werror ;;
- *) WARN_CFLAGS="${WARN_CFLAGS} $w"
- esac
- done
-fi],[build_warnings=""])dnl
-])
-AC_SUBST(WARN_CFLAGS)
-AC_SUBST(WERROR_CFLAGS)
-
-
-dnl Generate the Makefile in a target specific directory.
-dnl Substitutions aren't performed on the file in AC_SUBST_FILE,
-dnl so this is a cover macro to tuck the details away of how we cope.
-dnl We cope by having autoconf generate two files and then merge them into
-dnl one afterwards. The two pieces of the common fragment are inserted into
-dnl the target's fragment at the appropriate points.
-
-AC_DEFUN(SIM_AC_OUTPUT,
-[
-AC_LINK_FILES($sim_link_files, $sim_link_links)
-AC_OUTPUT(Makefile.sim:Makefile.in Make-common.sim:../common/Make-common.in .gdbinit:../common/gdbinit.in,
-[case "x$CONFIG_FILES" in
- xMakefile*)
- echo "Merging Makefile.sim+Make-common.sim into Makefile ..."
- rm -f Makesim1.tmp Makesim2.tmp Makefile
- sed -n -e '/^## COMMON_PRE_/,/^## End COMMON_PRE_/ p' <Make-common.sim >Makesim1.tmp
- sed -n -e '/^## COMMON_POST_/,/^## End COMMON_POST_/ p' <Make-common.sim >Makesim2.tmp
- sed -e '/^## COMMON_PRE_/ r Makesim1.tmp' \
- -e '/^## COMMON_POST_/ r Makesim2.tmp' \
- <Makefile.sim >Makefile
- rm -f Makefile.sim Make-common.sim Makesim1.tmp Makesim2.tmp
- ;;
- esac
- case "x$CONFIG_HEADERS" in xconfig.h:config.in) echo > stamp-h ;; esac
-])
-])
-
-# This file is derived from `gettext.m4'. The difference is that the
-# included macros assume Cygnus-style source and build trees.
-
-# Macro to add for using GNU gettext.
-# Ulrich Drepper <drepper@cygnus.com>, 1995.
-#
-# This file file be copied and used freely without restrictions. It can
-# be used in projects which are not available under the GNU Public License
-# but which still want to provide support for the GNU gettext functionality.
-# Please note that the actual code is *not* freely available.
-
-# serial 3
-
-AC_DEFUN(CY_WITH_NLS,
- [AC_MSG_CHECKING([whether NLS is requested])
- dnl Default is enabled NLS
- AC_ARG_ENABLE(nls,
- [ --disable-nls do not use Native Language Support],
- USE_NLS=$enableval, USE_NLS=yes)
- AC_MSG_RESULT($USE_NLS)
- AC_SUBST(USE_NLS)
-
- USE_INCLUDED_LIBINTL=no
-
- dnl If we use NLS figure out what method
- if test "$USE_NLS" = "yes"; then
- AC_DEFINE(ENABLE_NLS)
- AC_MSG_CHECKING([whether included gettext is requested])
- AC_ARG_WITH(included-gettext,
- [ --with-included-gettext use the GNU gettext library included here],
- nls_cv_force_use_gnu_gettext=$withval,
- nls_cv_force_use_gnu_gettext=no)
- AC_MSG_RESULT($nls_cv_force_use_gnu_gettext)
-
- nls_cv_use_gnu_gettext="$nls_cv_force_use_gnu_gettext"
- if test "$nls_cv_force_use_gnu_gettext" != "yes"; then
- dnl User does not insist on using GNU NLS library. Figure out what
- dnl to use. If gettext or catgets are available (in this order) we
- dnl use this. Else we have to fall back to GNU NLS library.
- dnl catgets is only used if permitted by option --with-catgets.
- nls_cv_header_intl=
- nls_cv_header_libgt=
- CATOBJEXT=NONE
-
- AC_CHECK_HEADER(libintl.h,
- [AC_CACHE_CHECK([for gettext in libc], gt_cv_func_gettext_libc,
- [AC_TRY_LINK([#include <libintl.h>], [return (int) gettext ("")],
- gt_cv_func_gettext_libc=yes, gt_cv_func_gettext_libc=no)])
-
- if test "$gt_cv_func_gettext_libc" != "yes"; then
- AC_CHECK_LIB(intl, bindtextdomain,
- [AC_CACHE_CHECK([for gettext in libintl],
- gt_cv_func_gettext_libintl,
- [AC_TRY_LINK([], [return (int) gettext ("")],
- gt_cv_func_gettext_libintl=yes,
- gt_cv_func_gettext_libintl=no)])])
- fi
-
- if test "$gt_cv_func_gettext_libc" = "yes" \
- || test "$gt_cv_func_gettext_libintl" = "yes"; then
- AC_DEFINE(HAVE_GETTEXT)
- AM_PATH_PROG_WITH_TEST(MSGFMT, msgfmt,
- [test -z "`$ac_dir/$ac_word -h 2>&1 | grep 'dv '`"], no)dnl
- if test "$MSGFMT" != "no"; then
- AC_CHECK_FUNCS(dcgettext)
- AC_PATH_PROG(GMSGFMT, gmsgfmt, $MSGFMT)
- AM_PATH_PROG_WITH_TEST(XGETTEXT, xgettext,
- [test -z "`$ac_dir/$ac_word -h 2>&1 | grep '(HELP)'`"], :)
- AC_TRY_LINK(, [extern int _nl_msg_cat_cntr;
- return _nl_msg_cat_cntr],
- [CATOBJEXT=.gmo
- DATADIRNAME=share],
- [CATOBJEXT=.mo
- DATADIRNAME=lib])
- INSTOBJEXT=.mo
- fi
- fi
- ])
-
- dnl In the standard gettext, we would now check for catgets.
- dnl However, we never want to use catgets for our releases.
-
- if test "$CATOBJEXT" = "NONE"; then
- dnl Neither gettext nor catgets in included in the C library.
- dnl Fall back on GNU gettext library.
- nls_cv_use_gnu_gettext=yes
- fi
- fi
-
- if test "$nls_cv_use_gnu_gettext" = "yes"; then
- dnl Mark actions used to generate GNU NLS library.
- INTLOBJS="\$(GETTOBJS)"
- AM_PATH_PROG_WITH_TEST(MSGFMT, msgfmt,
- [test -z "`$ac_dir/$ac_word -h 2>&1 | grep 'dv '`"], msgfmt)
- AC_PATH_PROG(GMSGFMT, gmsgfmt, $MSGFMT)
- AM_PATH_PROG_WITH_TEST(XGETTEXT, xgettext,
- [test -z "`$ac_dir/$ac_word -h 2>&1 | grep '(HELP)'`"], :)
- AC_SUBST(MSGFMT)
- USE_INCLUDED_LIBINTL=yes
- CATOBJEXT=.gmo
- INSTOBJEXT=.mo
- DATADIRNAME=share
- INTLDEPS='$(top_builddir)/../intl/libintl.a'
- INTLLIBS=$INTLDEPS
- LIBS=`echo $LIBS | sed -e 's/-lintl//'`
- nls_cv_header_intl=libintl.h
- nls_cv_header_libgt=libgettext.h
- fi
-
- dnl Test whether we really found GNU xgettext.
- if test "$XGETTEXT" != ":"; then
- dnl If it is no GNU xgettext we define it as : so that the
- dnl Makefiles still can work.
- if $XGETTEXT --omit-header /dev/null 2> /dev/null; then
- : ;
- else
- AC_MSG_RESULT(
- [found xgettext programs is not GNU xgettext; ignore it])
- XGETTEXT=":"
- fi
- fi
-
- # We need to process the po/ directory.
- POSUB=po
- else
- DATADIRNAME=share
- nls_cv_header_intl=libintl.h
- nls_cv_header_libgt=libgettext.h
- fi
-
- # If this is used in GNU gettext we have to set USE_NLS to `yes'
- # because some of the sources are only built for this goal.
- if test "$PACKAGE" = gettext; then
- USE_NLS=yes
- USE_INCLUDED_LIBINTL=yes
- fi
-
- dnl These rules are solely for the distribution goal. While doing this
- dnl we only have to keep exactly one list of the available catalogs
- dnl in configure.in.
- for lang in $ALL_LINGUAS; do
- GMOFILES="$GMOFILES $lang.gmo"
- POFILES="$POFILES $lang.po"
- done
-
- dnl Make all variables we use known to autoconf.
- AC_SUBST(USE_INCLUDED_LIBINTL)
- AC_SUBST(CATALOGS)
- AC_SUBST(CATOBJEXT)
- AC_SUBST(DATADIRNAME)
- AC_SUBST(GMOFILES)
- AC_SUBST(INSTOBJEXT)
- AC_SUBST(INTLDEPS)
- AC_SUBST(INTLLIBS)
- AC_SUBST(INTLOBJS)
- AC_SUBST(POFILES)
- AC_SUBST(POSUB)
- ])
-
-AC_DEFUN(CY_GNU_GETTEXT,
- [AC_REQUIRE([AC_PROG_MAKE_SET])dnl
- AC_REQUIRE([AC_PROG_CC])dnl
- AC_REQUIRE([AC_PROG_RANLIB])dnl
- AC_REQUIRE([AC_ISC_POSIX])dnl
- AC_REQUIRE([AC_HEADER_STDC])dnl
- AC_REQUIRE([AC_C_CONST])dnl
- AC_REQUIRE([AC_C_INLINE])dnl
- AC_REQUIRE([AC_TYPE_OFF_T])dnl
- AC_REQUIRE([AC_TYPE_SIZE_T])dnl
- AC_REQUIRE([AC_FUNC_ALLOCA])dnl
- AC_REQUIRE([AC_FUNC_MMAP])dnl
-
- AC_CHECK_HEADERS([argz.h limits.h locale.h nl_types.h malloc.h string.h \
-unistd.h values.h sys/param.h])
- AC_CHECK_FUNCS([getcwd munmap putenv setenv setlocale strchr strcasecmp \
-__argz_count __argz_stringify __argz_next])
-
- if test "${ac_cv_func_stpcpy+set}" != "set"; then
- AC_CHECK_FUNCS(stpcpy)
- fi
- if test "${ac_cv_func_stpcpy}" = "yes"; then
- AC_DEFINE(HAVE_STPCPY)
- fi
-
- AM_LC_MESSAGES
- CY_WITH_NLS
-
- if test "x$CATOBJEXT" != "x"; then
- if test "x$ALL_LINGUAS" = "x"; then
- LINGUAS=
- else
- AC_MSG_CHECKING(for catalogs to be installed)
- NEW_LINGUAS=
- for lang in ${LINGUAS=$ALL_LINGUAS}; do
- case "$ALL_LINGUAS" in
- *$lang*) NEW_LINGUAS="$NEW_LINGUAS $lang" ;;
- esac
- done
- LINGUAS=$NEW_LINGUAS
- AC_MSG_RESULT($LINGUAS)
- fi
-
- dnl Construct list of names of catalog files to be constructed.
- if test -n "$LINGUAS"; then
- for lang in $LINGUAS; do CATALOGS="$CATALOGS $lang$CATOBJEXT"; done
- fi
- fi
-
- dnl The reference to <locale.h> in the installed <libintl.h> file
- dnl must be resolved because we cannot expect the users of this
- dnl to define HAVE_LOCALE_H.
- if test $ac_cv_header_locale_h = yes; then
- INCLUDE_LOCALE_H="#include <locale.h>"
- else
- INCLUDE_LOCALE_H="\
-/* The system does not provide the header <locale.h>. Take care yourself. */"
- fi
- AC_SUBST(INCLUDE_LOCALE_H)
-
- dnl Determine which catalog format we have (if any is needed)
- dnl For now we know about two different formats:
- dnl Linux libc-5 and the normal X/Open format
- if test -f $srcdir/po2tbl.sed.in; then
- if test "$CATOBJEXT" = ".cat"; then
- AC_CHECK_HEADER(linux/version.h, msgformat=linux, msgformat=xopen)
-
- dnl Transform the SED scripts while copying because some dumb SEDs
- dnl cannot handle comments.
- sed -e '/^#/d' $srcdir/$msgformat-msg.sed > po2msg.sed
- fi
- dnl po2tbl.sed is always needed.
- sed -e '/^#.*[^\\]$/d' -e '/^#$/d' \
- $srcdir/po2tbl.sed.in > po2tbl.sed
- fi
-
- dnl In the intl/Makefile.in we have a special dependency which makes
- dnl only sense for gettext. We comment this out for non-gettext
- dnl packages.
- if test "$PACKAGE" = "gettext"; then
- GT_NO="#NO#"
- GT_YES=
- else
- GT_NO=
- GT_YES="#YES#"
- fi
- AC_SUBST(GT_NO)
- AC_SUBST(GT_YES)
-
- MKINSTALLDIRS="\$(srcdir)/../../mkinstalldirs"
- AC_SUBST(MKINSTALLDIRS)
-
- dnl *** For now the libtool support in intl/Makefile is not for real.
- l=
- AC_SUBST(l)
-
- dnl Generate list of files to be processed by xgettext which will
- dnl be included in po/Makefile. But only do this if the po directory
- dnl exists in srcdir.
- if test -d $srcdir/po; then
- test -d po || mkdir po
- if test "x$srcdir" != "x."; then
- if test "x`echo $srcdir | sed 's@/.*@@'`" = "x"; then
- posrcprefix="$srcdir/"
- else
- posrcprefix="../$srcdir/"
- fi
- else
- posrcprefix="../"
- fi
- rm -f po/POTFILES
- sed -e "/^#/d" -e "/^\$/d" -e "s,.*, $posrcprefix& \\\\," -e "\$s/\(.*\) \\\\/\1/" \
- < $srcdir/po/POTFILES.in > po/POTFILES
- fi
- ])
-
-# Search path for a program which passes the given test.
-# Ulrich Drepper <drepper@cygnus.com>, 1996.
-#
-# This file file be copied and used freely without restrictions. It can
-# be used in projects which are not available under the GNU Public License
-# but which still want to provide support for the GNU gettext functionality.
-# Please note that the actual code is *not* freely available.
-
-# serial 1
-
-dnl AM_PATH_PROG_WITH_TEST(VARIABLE, PROG-TO-CHECK-FOR,
-dnl TEST-PERFORMED-ON-FOUND_PROGRAM [, VALUE-IF-NOT-FOUND [, PATH]])
-AC_DEFUN(AM_PATH_PROG_WITH_TEST,
-[# Extract the first word of "$2", so it can be a program name with args.
-set dummy $2; ac_word=[$]2
-AC_MSG_CHECKING([for $ac_word])
-AC_CACHE_VAL(ac_cv_path_$1,
-[case "[$]$1" in
- /*)
- ac_cv_path_$1="[$]$1" # Let the user override the test with a path.
- ;;
- *)
- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS="${IFS}:"
- for ac_dir in ifelse([$5], , $PATH, [$5]); do
- test -z "$ac_dir" && ac_dir=.
- if test -f $ac_dir/$ac_word; then
- if [$3]; then
- ac_cv_path_$1="$ac_dir/$ac_word"
- break
- fi
- fi
- done
- IFS="$ac_save_ifs"
-dnl If no 4th arg is given, leave the cache variable unset,
-dnl so AC_PATH_PROGS will keep looking.
-ifelse([$4], , , [ test -z "[$]ac_cv_path_$1" && ac_cv_path_$1="$4"
-])dnl
- ;;
-esac])dnl
-$1="$ac_cv_path_$1"
-if test -n "[$]$1"; then
- AC_MSG_RESULT([$]$1)
-else
- AC_MSG_RESULT(no)
-fi
-AC_SUBST($1)dnl
-])
-
-# Check whether LC_MESSAGES is available in <locale.h>.
-# Ulrich Drepper <drepper@cygnus.com>, 1995.
-#
-# This file file be copied and used freely without restrictions. It can
-# be used in projects which are not available under the GNU Public License
-# but which still want to provide support for the GNU gettext functionality.
-# Please note that the actual code is *not* freely available.
-
-# serial 1
-
-AC_DEFUN(AM_LC_MESSAGES,
- [if test $ac_cv_header_locale_h = yes; then
- AC_CACHE_CHECK([for LC_MESSAGES], am_cv_val_LC_MESSAGES,
- [AC_TRY_LINK([#include <locale.h>], [return LC_MESSAGES],
- am_cv_val_LC_MESSAGES=yes, am_cv_val_LC_MESSAGES=no)])
- if test $am_cv_val_LC_MESSAGES = yes; then
- AC_DEFINE(HAVE_LC_MESSAGES)
- fi
- fi])
-
-
-dnl --enable-cgen-maint support
-AC_DEFUN(SIM_AC_OPTION_CGEN_MAINT,
-[
-cgen_maint=no
-dnl Default is to use one in build tree.
-cgen=guile
-cgendir='$(srcdir)/../../cgen'
-dnl Having --enable-maintainer-mode take arguments is another way to go.
-dnl ??? One can argue --with is more appropriate if one wants to specify
-dnl a directory name, but what we're doing here is an enable/disable kind
-dnl of thing and specifying both --enable and --with is klunky.
-dnl If you reeely want this to be --with, go ahead and change it.
-AC_ARG_ENABLE(cgen-maint,
-[ --enable-cgen-maint[=DIR] build cgen generated files],
-[case "${enableval}" in
- yes) cgen_maint=yes ;;
- no) cgen_maint=no ;;
- *)
- # argument is cgen install directory (not implemented yet).
- # Having a `share' directory might be more appropriate for the .scm,
- # .cpu, etc. files.
- cgendir=${cgen_maint}/lib/cgen
- cgen=guile
- ;;
-esac])dnl
-dnl AM_CONDITIONAL(CGEN_MAINT, test x${cgen_maint} != xno)
-if test x${cgen_maint} != xno ; then
- CGEN_MAINT=''
-else
- CGEN_MAINT='#'
-fi
-AC_SUBST(CGEN_MAINT)
-AC_SUBST(cgendir)
-AC_SUBST(cgen)
-])
diff --git a/sim/common/callback.c b/sim/common/callback.c
deleted file mode 100644
index 19acca0e998..00000000000
--- a/sim/common/callback.c
+++ /dev/null
@@ -1,810 +0,0 @@
-/* Remote target callback routines.
- Copyright 1995, 1996, 1997 Free Software Foundation, Inc.
- Contributed by Cygnus Solutions.
-
- This file is part of GDB.
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with GAS; see the file COPYING. If not, write to the Free Software
- Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
-
-/* This file provides a standard way for targets to talk to the host OS
- level. */
-
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-#include "ansidecl.h"
-#ifdef ANSI_PROTOTYPES
-#include <stdarg.h>
-#else
-#include <varargs.h>
-#endif
-#include <stdio.h>
-#ifdef HAVE_STDLIB_H
-#include <stdlib.h>
-#endif
-#ifdef HAVE_STRING_H
-#include <string.h>
-#else
-#ifdef HAVE_STRINGS_H
-#include <strings.h>
-#endif
-#endif
-#include <errno.h>
-#include <fcntl.h>
-#include <time.h>
-#include <sys/types.h>
-#include <sys/stat.h>
-#include "callback.h"
-#include "targ-vals.h"
-
-#ifdef HAVE_UNISTD_H
-#include <unistd.h>
-#endif
-
-/* ??? sim_cb_printf should be cb_printf, but until the callback support is
- broken out of the simulator directory, these are here to not require
- sim-utils.h. */
-void sim_cb_printf PARAMS ((host_callback *, const char *, ...));
-void sim_cb_eprintf PARAMS ((host_callback *, const char *, ...));
-
-extern CB_TARGET_DEFS_MAP cb_init_syscall_map[];
-extern CB_TARGET_DEFS_MAP cb_init_errno_map[];
-extern CB_TARGET_DEFS_MAP cb_init_open_map[];
-
-extern int system PARAMS ((const char *));
-
-static int os_init PARAMS ((host_callback *));
-static int os_shutdown PARAMS ((host_callback *));
-static int os_unlink PARAMS ((host_callback *, const char *));
-static long os_time PARAMS ((host_callback *, long *));
-static int os_system PARAMS ((host_callback *, const char *));
-static int os_rename PARAMS ((host_callback *, const char *, const char *));
-static int os_write_stdout PARAMS ((host_callback *, const char *, int));
-static void os_flush_stdout PARAMS ((host_callback *));
-static int os_write_stderr PARAMS ((host_callback *, const char *, int));
-static void os_flush_stderr PARAMS ((host_callback *));
-static int os_write PARAMS ((host_callback *, int, const char *, int));
-static int os_read_stdin PARAMS ((host_callback *, char *, int));
-static int os_read PARAMS ((host_callback *, int, char *, int));
-static int os_open PARAMS ((host_callback *, const char *, int));
-static int os_lseek PARAMS ((host_callback *, int, long, int));
-static int os_isatty PARAMS ((host_callback *, int));
-static int os_get_errno PARAMS ((host_callback *));
-static int os_close PARAMS ((host_callback *, int));
-static void os_vprintf_filtered PARAMS ((host_callback *, const char *, va_list));
-static void os_evprintf_filtered PARAMS ((host_callback *, const char *, va_list));
-static void os_error PARAMS ((host_callback *, const char *, ...));
-static int fdmap PARAMS ((host_callback *, int));
-static int fdbad PARAMS ((host_callback *, int));
-static int wrap PARAMS ((host_callback *, int));
-
-/* Set the callback copy of errno from what we see now. */
-
-static int
-wrap (p, val)
- host_callback *p;
- int val;
-{
- p->last_errno = errno;
- return val;
-}
-
-/* Make sure the FD provided is ok. If not, return non-zero
- and set errno. */
-
-static int
-fdbad (p, fd)
- host_callback *p;
- int fd;
-{
- if (fd < 0 || fd > MAX_CALLBACK_FDS || !p->fdopen[fd])
- {
- p->last_errno = EINVAL;
- return -1;
- }
- return 0;
-}
-
-static int
-fdmap (p, fd)
- host_callback *p;
- int fd;
-{
- return p->fdmap[fd];
-}
-
-static int
-os_close (p, fd)
- host_callback *p;
- int fd;
-{
- int result;
-
- result = fdbad (p, fd);
- if (result)
- return result;
- result = wrap (p, close (fdmap (p, fd)));
- if (result == 0 && !p->alwaysopen[fd])
- p->fdopen[fd] = 0;
-
- return result;
-}
-
-
-/* taken from gdb/util.c:notice_quit() - should be in a library */
-
-
-#if defined(__GO32__) || defined (_MSC_VER)
-static int
-os_poll_quit (p)
- host_callback *p;
-{
-#if defined(__GO32__)
- int kbhit ();
- int getkey ();
- if (kbhit ())
- {
- int k = getkey ();
- if (k == 1)
- {
- return 1;
- }
- else if (k == 2)
- {
- return 1;
- }
- else
- {
- sim_cb_eprintf (p, "CTRL-A to quit, CTRL-B to quit harder\n");
- }
- }
-#endif
-#if defined (_MSC_VER)
- /* NB - this will not compile! */
- int k = win32pollquit();
- if (k == 1)
- return 1;
- else if (k == 2)
- return 1;
-#endif
- return 0;
-}
-#else
-#define os_poll_quit 0
-#endif /* defined(__GO32__) || defined(_MSC_VER) */
-
-static int
-os_get_errno (p)
- host_callback *p;
-{
- return cb_host_to_target_errno (p, p->last_errno);
-}
-
-
-static int
-os_isatty (p, fd)
- host_callback *p;
- int fd;
-{
- int result;
-
- result = fdbad (p, fd);
- if (result)
- return result;
- result = wrap (p, isatty (fdmap (p, fd)));
-
- return result;
-}
-
-static int
-os_lseek (p, fd, off, way)
- host_callback *p;
- int fd;
- long off;
- int way;
-{
- int result;
-
- result = fdbad (p, fd);
- if (result)
- return result;
- result = lseek (fdmap (p, fd), off, way);
- return result;
-}
-
-static int
-os_open (p, name, flags)
- host_callback *p;
- const char *name;
- int flags;
-{
- int i;
- for (i = 0; i < MAX_CALLBACK_FDS; i++)
- {
- if (!p->fdopen[i])
- {
- int f = open (name, cb_target_to_host_open (p, flags), 0644);
- if (f < 0)
- {
- p->last_errno = errno;
- return f;
- }
- p->fdopen[i] = 1;
- p->fdmap[i] = f;
- return i;
- }
- }
- p->last_errno = EMFILE;
- return -1;
-}
-
-static int
-os_read (p, fd, buf, len)
- host_callback *p;
- int fd;
- char *buf;
- int len;
-{
- int result;
-
- result = fdbad (p, fd);
- if (result)
- return result;
- result = wrap (p, read (fdmap (p, fd), buf, len));
- return result;
-}
-
-static int
-os_read_stdin (p, buf, len)
- host_callback *p;
- char *buf;
- int len;
-{
- return wrap (p, read (0, buf, len));
-}
-
-static int
-os_write (p, fd, buf, len)
- host_callback *p;
- int fd;
- const char *buf;
- int len;
-{
- int result;
- int real_fd;
-
- result = fdbad (p, fd);
- if (result)
- return result;
- real_fd = fdmap (p, fd);
- switch (real_fd)
- {
- default:
- result = wrap (p, write (real_fd, buf, len));
- break;
- case 1:
- result = p->write_stdout (p, buf, len);
- break;
- case 2:
- result = p->write_stderr (p, buf, len);
- break;
- }
- return result;
-}
-
-static int
-os_write_stdout (p, buf, len)
- host_callback *p ATTRIBUTE_UNUSED;
- const char *buf;
- int len;
-{
- return fwrite (buf, 1, len, stdout);
-}
-
-static void
-os_flush_stdout (p)
- host_callback *p ATTRIBUTE_UNUSED;
-{
- fflush (stdout);
-}
-
-static int
-os_write_stderr (p, buf, len)
- host_callback *p ATTRIBUTE_UNUSED;
- const char *buf;
- int len;
-{
- return fwrite (buf, 1, len, stderr);
-}
-
-static void
-os_flush_stderr (p)
- host_callback *p ATTRIBUTE_UNUSED;
-{
- fflush (stderr);
-}
-
-static int
-os_rename (p, f1, f2)
- host_callback *p;
- const char *f1;
- const char *f2;
-{
- return wrap (p, rename (f1, f2));
-}
-
-
-static int
-os_system (p, s)
- host_callback *p;
- const char *s;
-{
- return wrap (p, system (s));
-}
-
-static long
-os_time (p, t)
- host_callback *p;
- long *t;
-{
- return wrap (p, time (t));
-}
-
-
-static int
-os_unlink (p, f1)
- host_callback *p;
- const char *f1;
-{
- return wrap (p, unlink (f1));
-}
-
-static int
-os_stat (p, file, buf)
- host_callback *p;
- const char *file;
- struct stat *buf;
-{
- /* ??? There is an issue of when to translate to the target layout.
- One could do that inside this function, or one could have the
- caller do it. It's more flexible to let the caller do it, though
- I'm not sure the flexibility will ever be useful. */
- return wrap (p, stat (file, buf));
-}
-
-static int
-os_fstat (p, fd, buf)
- host_callback *p;
- int fd;
- struct stat *buf;
-{
- if (fdbad (p, fd))
- return -1;
- /* ??? There is an issue of when to translate to the target layout.
- One could do that inside this function, or one could have the
- caller do it. It's more flexible to let the caller do it, though
- I'm not sure the flexibility will ever be useful. */
- return wrap (p, fstat (fdmap (p, fd), buf));
-}
-
-static int
-os_shutdown (p)
- host_callback *p;
-{
- int i;
- for (i = 0; i < MAX_CALLBACK_FDS; i++)
- {
- if (p->fdopen[i] && !p->alwaysopen[i]) {
- close (p->fdmap[i]);
- p->fdopen[i] = 0;
- }
- }
- return 1;
-}
-
-static int
-os_init (p)
- host_callback *p;
-{
- int i;
-
- os_shutdown (p);
- for (i = 0; i < 3; i++)
- {
- p->fdmap[i] = i;
- p->fdopen[i] = 1;
- p->alwaysopen[i] = 1;
- }
-
- p->syscall_map = cb_init_syscall_map;
- p->errno_map = cb_init_errno_map;
- p->open_map = cb_init_open_map;
-
- return 1;
-}
-
-/* DEPRECIATED */
-
-/* VARARGS */
-static void
-#ifdef ANSI_PROTOTYPES
-os_printf_filtered (host_callback *p ATTRIBUTE_UNUSED, const char *format, ...)
-#else
-os_printf_filtered (p, va_alist)
- host_callback *p;
- va_dcl
-#endif
-{
- va_list args;
-#ifdef ANSI_PROTOTYPES
- va_start (args, format);
-#else
- char *format;
-
- va_start (args);
- format = va_arg (args, char *);
-#endif
-
- vfprintf (stdout, format, args);
- va_end (args);
-}
-
-/* VARARGS */
-static void
-#ifdef ANSI_PROTOTYPES
-os_vprintf_filtered (host_callback *p ATTRIBUTE_UNUSED, const char *format, va_list args)
-#else
-os_vprintf_filtered (p, format, args)
- host_callback *p;
- const char *format;
- va_list args;
-#endif
-{
- vprintf (format, args);
-}
-
-/* VARARGS */
-static void
-#ifdef ANSI_PROTOTYPES
-os_evprintf_filtered (host_callback *p ATTRIBUTE_UNUSED, const char *format, va_list args)
-#else
-os_evprintf_filtered (p, format, args)
- host_callback *p;
- const char *format;
- va_list args;
-#endif
-{
- vfprintf (stderr, format, args);
-}
-
-/* VARARGS */
-static void
-#ifdef ANSI_PROTOTYPES
-os_error (host_callback *p ATTRIBUTE_UNUSED, const char *format, ...)
-#else
-os_error (p, va_alist)
- host_callback *p;
- va_dcl
-#endif
-{
- va_list args;
-#ifdef ANSI_PROTOTYPES
- va_start (args, format);
-#else
- char *format;
-
- va_start (args);
- format = va_arg (args, char *);
-#endif
-
- vfprintf (stderr, format, args);
- fprintf (stderr, "\n");
-
- va_end (args);
- exit (1);
-}
-
-host_callback default_callback =
-{
- os_close,
- os_get_errno,
- os_isatty,
- os_lseek,
- os_open,
- os_read,
- os_read_stdin,
- os_rename,
- os_system,
- os_time,
- os_unlink,
- os_write,
- os_write_stdout,
- os_flush_stdout,
- os_write_stderr,
- os_flush_stderr,
-
- os_stat,
- os_fstat,
-
- os_poll_quit,
-
- os_shutdown,
- os_init,
-
- os_printf_filtered, /* deprecated */
-
- os_vprintf_filtered,
- os_evprintf_filtered,
- os_error,
-
- 0, /* last errno */
-
- { 0, }, /* fdmap */
- { 0, }, /* fdopen */
- { 0, }, /* alwaysopen */
-
- 0, /* syscall_map */
- 0, /* errno_map */
- 0, /* open_map */
- 0, /* signal_map */
- 0, /* stat_map */
-
- HOST_CALLBACK_MAGIC,
-};
-
-/* Read in a file describing the target's system call values.
- E.g. maybe someone will want to use something other than newlib.
- This assumes that the basic system call recognition and value passing/
- returning is supported. So maybe some coding/recompilation will be
- necessary, but not as much.
-
- If an error occurs, the existing mapping is not changed. */
-
-CB_RC
-cb_read_target_syscall_maps (cb, file)
- host_callback *cb;
- const char *file;
-{
- CB_TARGET_DEFS_MAP *syscall_map, *errno_map, *open_map, *signal_map;
- const char *stat_map;
- FILE *f;
-
- if ((f = fopen (file, "r")) == NULL)
- return CB_RC_ACCESS;
-
- /* ... read in and parse file ... */
-
- fclose (f);
- return CB_RC_NO_MEM; /* FIXME:wip */
-
- /* Free storage allocated for any existing maps. */
- if (cb->syscall_map)
- free (cb->syscall_map);
- if (cb->errno_map)
- free (cb->errno_map);
- if (cb->open_map)
- free (cb->open_map);
- if (cb->signal_map)
- free (cb->signal_map);
- if (cb->stat_map)
- free ((PTR) cb->stat_map);
-
- cb->syscall_map = syscall_map;
- cb->errno_map = errno_map;
- cb->open_map = open_map;
- cb->signal_map = signal_map;
- cb->stat_map = stat_map;
-
- return CB_RC_OK;
-}
-
-/* Translate the target's version of a syscall number to the host's.
- This isn't actually the host's version, rather a canonical form.
- ??? Perhaps this should be renamed to ..._canon_syscall. */
-
-int
-cb_target_to_host_syscall (cb, target_val)
- host_callback *cb;
- int target_val;
-{
- CB_TARGET_DEFS_MAP *m;
-
- for (m = &cb->syscall_map[0]; m->target_val != -1; ++m)
- if (m->target_val == target_val)
- return m->host_val;
-
- return -1;
-}
-
-/* FIXME: sort tables if large.
- Alternatively, an obvious improvement for errno conversion is
- to machine generate a function with a large switch(). */
-
-/* Translate the host's version of errno to the target's. */
-
-int
-cb_host_to_target_errno (cb, host_val)
- host_callback *cb;
- int host_val;
-{
- CB_TARGET_DEFS_MAP *m;
-
- for (m = &cb->errno_map[0]; m->host_val; ++m)
- if (m->host_val == host_val)
- return m->target_val;
-
- /* ??? Which error to return in this case is up for grabs.
- Note that some missing values may have standard alternatives.
- For now return 0 and require caller to deal with it. */
- return 0;
-}
-
-/* Given a set of target bitmasks for the open system call,
- return the host equivalent.
- Mapping open flag values is best done by looping so there's no need
- to machine generate this function. */
-
-int
-cb_target_to_host_open (cb, target_val)
- host_callback *cb;
- int target_val;
-{
- int host_val = 0;
- CB_TARGET_DEFS_MAP *m;
-
- for (m = &cb->open_map[0]; m->host_val != -1; ++m)
- {
- switch (m->target_val)
- {
- /* O_RDONLY can be (and usually is) 0 which needs to be treated
- specially. */
- case TARGET_O_RDONLY :
- case TARGET_O_WRONLY :
- case TARGET_O_RDWR :
- if ((target_val & (TARGET_O_RDONLY | TARGET_O_WRONLY | TARGET_O_RDWR))
- == m->target_val)
- host_val |= m->host_val;
- /* Handle the host/target differentiating between binary and
- text mode. Only one case is of importance */
-#if ! defined (TARGET_O_BINARY) && defined (O_BINARY)
- host_val |= O_BINARY;
-#endif
- break;
- default :
- if ((m->target_val & target_val) == m->target_val)
- host_val |= m->host_val;
- break;
- }
- }
-
- return host_val;
-}
-
-/* Utility for cb_host_to_target_stat to store values in the target's
- stat struct. */
-
-static void
-store (p, size, val, big_p)
- char *p;
- int size;
- long val; /* ??? must be as big as target word size */
- int big_p;
-{
- if (big_p)
- {
- p += size;
- while (size-- > 0)
- {
- *--p = val;
- val >>= 8;
- }
- }
- else
- {
- while (size-- > 0)
- {
- *p++ = val;
- val >>= 8;
- }
- }
-}
-
-/* Translate a host's stat struct into a target's.
- If HS is NULL, just compute the length of the buffer required,
- TS is ignored.
-
- The result is the size of the target's stat struct,
- or zero if an error occured during the translation. */
-
-int
-cb_host_to_target_stat (cb, hs, ts)
- host_callback *cb;
- const struct stat *hs;
- PTR ts;
-{
- const char *m = cb->stat_map;
- char *p;
- int big_p = 0;
-
- if (hs == NULL)
- ts = NULL;
- p = ts;
-
- while (m)
- {
- char *q = strchr (m, ',');
- int size;
-
- /* FIXME: Use sscanf? */
- if (q == NULL)
- {
- /* FIXME: print error message */
- return 0;
- }
- size = atoi (q + 1);
- if (size == 0)
- {
- /* FIXME: print error message */
- return 0;
- }
-
- if (hs != NULL)
- {
- if (strncmp (m, "st_dev", q - m) == 0)
- store (p, size, hs->st_dev, big_p);
- else if (strncmp (m, "st_ino", q - m) == 0)
- store (p, size, hs->st_ino, big_p);
- /* FIXME:wip */
- else
- store (p, size, 0, big_p); /* unsupported field, store 0 */
- }
-
- p += size;
- m = strchr (q, ':');
- if (m)
- ++m;
- }
-
- return p - (char *) ts;
-}
-
-/* Cover functions to the vfprintf callbacks.
-
- ??? If one thinks of the callbacks as a subsystem onto itself [or part of
- a larger "remote target subsystem"] with a well defined interface, then
- one would think that the subsystem would provide these. However, until
- one is allowed to create such a subsystem (with its own source tree
- independent of any particular user), such a critter can't exist. Thus
- these functions are here for the time being. */
-
-void
-sim_cb_printf (host_callback *p, const char *fmt, ...)
-{
- va_list ap;
-
- va_start (ap, fmt);
- p->vprintf_filtered (p, fmt, ap);
- va_end (ap);
-}
-
-void
-sim_cb_eprintf (host_callback *p, const char *fmt, ...)
-{
- va_list ap;
-
- va_start (ap, fmt);
- p->evprintf_filtered (p, fmt, ap);
- va_end (ap);
-}
diff --git a/sim/common/cgen-accfp.c b/sim/common/cgen-accfp.c
deleted file mode 100644
index 929dd22b3c6..00000000000
--- a/sim/common/cgen-accfp.c
+++ /dev/null
@@ -1,706 +0,0 @@
-/* Accurate fp support for CGEN-based simulators.
- Copyright (C) 1999 Cygnus Solutions.
-
- This implemention assumes:
- typedef USI SF;
- typedef UDI DF;
-
- TODO:
- - lazy encoding/decoding
- - checking return code (say by callback)
- - proper rounding
-*/
-
-#include "sim-main.h"
-#include "sim-fpu.h"
-
-/* SF mode support */
-
-static SF
-addsf (CGEN_FPU* fpu, SF x, SF y)
-{
- sim_fpu op1;
- sim_fpu op2;
- sim_fpu ans;
- unsigned32 res;
- sim_fpu_status status;
-
- sim_fpu_32to (&op1, x);
- sim_fpu_32to (&op2, y);
- status = sim_fpu_add (&ans, &op1, &op2);
- if (status != 0)
- (*fpu->ops->error) (fpu, status);
- sim_fpu_to32 (&res, &ans);
-
- return res;
-}
-
-static SF
-subsf (CGEN_FPU* fpu, SF x, SF y)
-{
- sim_fpu op1;
- sim_fpu op2;
- sim_fpu ans;
- unsigned32 res;
- sim_fpu_status status;
-
- sim_fpu_32to (&op1, x);
- sim_fpu_32to (&op2, y);
- status = sim_fpu_sub (&ans, &op1, &op2);
- if (status != 0)
- (*fpu->ops->error) (fpu, status);
- sim_fpu_to32 (&res, &ans);
-
- return res;
-}
-
-static SF
-mulsf (CGEN_FPU* fpu, SF x, SF y)
-{
- sim_fpu op1;
- sim_fpu op2;
- sim_fpu ans;
- unsigned32 res;
- sim_fpu_status status;
-
- sim_fpu_32to (&op1, x);
- sim_fpu_32to (&op2, y);
- status = sim_fpu_mul (&ans, &op1, &op2);
- if (status != 0)
- (*fpu->ops->error) (fpu, status);
- sim_fpu_to32 (&res, &ans);
-
- return res;
-}
-
-static SF
-divsf (CGEN_FPU* fpu, SF x, SF y)
-{
- sim_fpu op1;
- sim_fpu op2;
- sim_fpu ans;
- unsigned32 res;
- sim_fpu_status status;
-
- sim_fpu_32to (&op1, x);
- sim_fpu_32to (&op2, y);
- status = sim_fpu_div (&ans, &op1, &op2);
- if (status != 0)
- (*fpu->ops->error) (fpu, status);
- sim_fpu_to32 (&res, &ans);
-
- return res;
-}
-
-static SF
-negsf (CGEN_FPU* fpu, SF x)
-{
- sim_fpu op1;
- sim_fpu ans;
- unsigned32 res;
- sim_fpu_status status;
-
- sim_fpu_32to (&op1, x);
- status = sim_fpu_neg (&ans, &op1);
- if (status != 0)
- (*fpu->ops->error) (fpu, status);
- sim_fpu_to32 (&res, &ans);
-
- return res;
-}
-
-static SF
-abssf (CGEN_FPU* fpu, SF x)
-{
- sim_fpu op1;
- sim_fpu ans;
- unsigned32 res;
- sim_fpu_status status;
-
- sim_fpu_32to (&op1, x);
- status = sim_fpu_abs (&ans, &op1);
- if (status != 0)
- (*fpu->ops->error) (fpu, status);
- sim_fpu_to32 (&res, &ans);
-
- return res;
-}
-
-static SF
-sqrtsf (CGEN_FPU* fpu, SF x)
-{
- sim_fpu op1;
- sim_fpu ans;
- unsigned32 res;
- sim_fpu_status status;
-
- sim_fpu_32to (&op1, x);
- status = sim_fpu_sqrt (&ans, &op1);
- if (status != 0)
- (*fpu->ops->error) (fpu, status);
- sim_fpu_to32 (&res, &ans);
-
- return res;
-}
-
-static SF
-invsf (CGEN_FPU* fpu, SF x)
-{
- sim_fpu op1;
- sim_fpu ans;
- unsigned32 res;
- sim_fpu_status status;
-
- sim_fpu_32to (&op1, x);
- status = sim_fpu_inv (&ans, &op1);
- if (status != 0)
- (*fpu->ops->error) (fpu, status);
- sim_fpu_to32 (&res, &ans);
-
- return res;
-}
-
-static SF
-minsf (CGEN_FPU* fpu, SF x, SF y)
-{
- sim_fpu op1;
- sim_fpu op2;
- sim_fpu ans;
- unsigned32 res;
- sim_fpu_status status;
-
- sim_fpu_32to (&op1, x);
- sim_fpu_32to (&op2, y);
- status = sim_fpu_min (&ans, &op1, &op2);
- if (status != 0)
- (*fpu->ops->error) (fpu, status);
- sim_fpu_to32 (&res, &ans);
-
- return res;
-}
-
-static SF
-maxsf (CGEN_FPU* fpu, SF x, SF y)
-{
- sim_fpu op1;
- sim_fpu op2;
- sim_fpu ans;
- unsigned32 res;
- sim_fpu_status status;
-
- sim_fpu_32to (&op1, x);
- sim_fpu_32to (&op2, y);
- status = sim_fpu_max (&ans, &op1, &op2);
- if (status != 0)
- (*fpu->ops->error) (fpu, status);
- sim_fpu_to32 (&res, &ans);
-
- return res;
-}
-
-static CGEN_FP_CMP
-cmpsf (CGEN_FPU* fpu, SF x, SF y)
-{
- sim_fpu op1;
- sim_fpu op2;
-
- sim_fpu_32to (&op1, x);
- sim_fpu_32to (&op2, y);
-
- if (sim_fpu_is_nan (&op1)
- || sim_fpu_is_nan (&op2))
- return FP_CMP_NAN;
-
- if (x < y)
- return FP_CMP_LT;
- if (x > y)
- return FP_CMP_GT;
- return FP_CMP_EQ;
-}
-
-static int
-eqsf (CGEN_FPU* fpu, SF x, SF y)
-{
- sim_fpu op1;
- sim_fpu op2;
-
- sim_fpu_32to (&op1, x);
- sim_fpu_32to (&op2, y);
- return sim_fpu_is_eq (&op1, &op2);
-}
-
-static int
-nesf (CGEN_FPU* fpu, SF x, SF y)
-{
- sim_fpu op1;
- sim_fpu op2;
-
- sim_fpu_32to (&op1, x);
- sim_fpu_32to (&op2, y);
- return sim_fpu_is_ne (&op1, &op2);
-}
-
-static int
-ltsf (CGEN_FPU* fpu, SF x, SF y)
-{
- sim_fpu op1;
- sim_fpu op2;
-
- sim_fpu_32to (&op1, x);
- sim_fpu_32to (&op2, y);
- return sim_fpu_is_lt (&op1, &op2);
-}
-
-static int
-lesf (CGEN_FPU* fpu, SF x, SF y)
-{
- sim_fpu op1;
- sim_fpu op2;
-
- sim_fpu_32to (&op1, x);
- sim_fpu_32to (&op2, y);
- return sim_fpu_is_le (&op1, &op2);
-}
-
-static int
-gtsf (CGEN_FPU* fpu, SF x, SF y)
-{
- sim_fpu op1;
- sim_fpu op2;
-
- sim_fpu_32to (&op1, x);
- sim_fpu_32to (&op2, y);
- return sim_fpu_is_gt (&op1, &op2);
-}
-
-static int
-gesf (CGEN_FPU* fpu, SF x, SF y)
-{
- sim_fpu op1;
- sim_fpu op2;
-
- sim_fpu_32to (&op1, x);
- sim_fpu_32to (&op2, y);
- return sim_fpu_is_ge (&op1, &op2);
-}
-
-static DF
-fextsfdf (CGEN_FPU* fpu, SF x)
-{
- sim_fpu op1;
- unsigned64 res;
-
- sim_fpu_32to (&op1, x);
- sim_fpu_to64 (&res, &op1);
-
- return res;
-}
-
-static SF
-ftruncdfsf (CGEN_FPU* fpu, DF x)
-{
- sim_fpu op1;
- unsigned32 res;
-
- sim_fpu_64to (&op1, x);
- sim_fpu_to32 (&res, &op1);
-
- return res;
-}
-
-static SF
-floatsisf (CGEN_FPU* fpu, SI x)
-{
- sim_fpu ans;
- unsigned32 res;
-
- sim_fpu_i32to (&ans, x, sim_fpu_round_near);
- sim_fpu_to32 (&res, &ans);
- return res;
-}
-
-static DF
-floatsidf (CGEN_FPU* fpu, SI x)
-{
- sim_fpu ans;
- unsigned64 res;
-
- sim_fpu_i32to (&ans, x, sim_fpu_round_near);
- sim_fpu_to64 (&res, &ans);
- return res;
-}
-
-static SF
-ufloatsisf (CGEN_FPU* fpu, USI x)
-{
- sim_fpu ans;
- unsigned32 res;
-
- sim_fpu_u32to (&ans, x, sim_fpu_round_near);
- sim_fpu_to32 (&res, &ans);
- return res;
-}
-
-static SI
-fixsfsi (CGEN_FPU* fpu, SF x)
-{
- sim_fpu op1;
- unsigned32 res;
-
- sim_fpu_32to (&op1, x);
- sim_fpu_to32i (&res, &op1, sim_fpu_round_near);
- return res;
-}
-
-static SI
-fixdfsi (CGEN_FPU* fpu, DF x)
-{
- sim_fpu op1;
- unsigned32 res;
-
- sim_fpu_64to (&op1, x);
- sim_fpu_to32i (&res, &op1, sim_fpu_round_near);
- return res;
-}
-
-static USI
-ufixsfsi (CGEN_FPU* fpu, SF x)
-{
- sim_fpu op1;
- unsigned32 res;
-
- sim_fpu_32to (&op1, x);
- sim_fpu_to32u (&res, &op1, sim_fpu_round_near);
- return res;
-}
-
-/* DF mode support */
-
-static DF
-adddf (CGEN_FPU* fpu, DF x, DF y)
-{
- sim_fpu op1;
- sim_fpu op2;
- sim_fpu ans;
- unsigned64 res;
- sim_fpu_status status;
-
- sim_fpu_64to (&op1, x);
- sim_fpu_64to (&op2, y);
- status = sim_fpu_add (&ans, &op1, &op2);
- if (status != 0)
- (*fpu->ops->error) (fpu, status);
- sim_fpu_to64 (&res, &ans);
-
- return res;
-}
-
-static DF
-subdf (CGEN_FPU* fpu, DF x, DF y)
-{
- sim_fpu op1;
- sim_fpu op2;
- sim_fpu ans;
- unsigned64 res;
- sim_fpu_status status;
-
- sim_fpu_64to (&op1, x);
- sim_fpu_64to (&op2, y);
- status = sim_fpu_sub (&ans, &op1, &op2);
- if (status != 0)
- (*fpu->ops->error) (fpu, status);
- sim_fpu_to64 (&res, &ans);
-
- return res;
-}
-
-static DF
-muldf (CGEN_FPU* fpu, DF x, DF y)
-{
- sim_fpu op1;
- sim_fpu op2;
- sim_fpu ans;
- unsigned64 res;
- sim_fpu_status status;
-
- sim_fpu_64to (&op1, x);
- sim_fpu_64to (&op2, y);
- status = sim_fpu_mul (&ans, &op1, &op2);
- if (status != 0)
- (*fpu->ops->error) (fpu, status);
- sim_fpu_to64 (&res, &ans);
-
- return res;
-}
-
-static DF
-divdf (CGEN_FPU* fpu, DF x, DF y)
-{
- sim_fpu op1;
- sim_fpu op2;
- sim_fpu ans;
- unsigned64 res;
- sim_fpu_status status;
-
- sim_fpu_64to (&op1, x);
- sim_fpu_64to (&op2, y);
- status = sim_fpu_div (&ans, &op1, &op2);
- if (status != 0)
- (*fpu->ops->error) (fpu, status);
- sim_fpu_to64 (&res, &ans);
-
- return res;
-}
-
-static DF
-negdf (CGEN_FPU* fpu, DF x)
-{
- sim_fpu op1;
- sim_fpu ans;
- unsigned64 res;
- sim_fpu_status status;
-
- sim_fpu_64to (&op1, x);
- status = sim_fpu_neg (&ans, &op1);
- if (status != 0)
- (*fpu->ops->error) (fpu, status);
- sim_fpu_to64 (&res, &ans);
-
- return res;
-}
-
-static DF
-absdf (CGEN_FPU* fpu, DF x)
-{
- sim_fpu op1;
- sim_fpu ans;
- unsigned64 res;
- sim_fpu_status status;
-
- sim_fpu_64to (&op1, x);
- status = sim_fpu_abs (&ans, &op1);
- if (status != 0)
- (*fpu->ops->error) (fpu, status);
- sim_fpu_to64 (&res, &ans);
-
- return res;
-}
-
-static DF
-sqrtdf (CGEN_FPU* fpu, DF x)
-{
- sim_fpu op1;
- sim_fpu ans;
- unsigned64 res;
- sim_fpu_status status;
-
- sim_fpu_64to (&op1, x);
- status = sim_fpu_sqrt (&ans, &op1);
- if (status != 0)
- (*fpu->ops->error) (fpu, status);
- sim_fpu_to64 (&res, &ans);
-
- return res;
-}
-
-static DF
-invdf (CGEN_FPU* fpu, DF x)
-{
- sim_fpu op1;
- sim_fpu ans;
- unsigned64 res;
- sim_fpu_status status;
-
- sim_fpu_64to (&op1, x);
- status = sim_fpu_inv (&ans, &op1);
- if (status != 0)
- (*fpu->ops->error) (fpu, status);
- sim_fpu_to64 (&res, &ans);
-
- return res;
-}
-
-static DF
-mindf (CGEN_FPU* fpu, DF x, DF y)
-{
- sim_fpu op1;
- sim_fpu op2;
- sim_fpu ans;
- unsigned64 res;
- sim_fpu_status status;
-
- sim_fpu_64to (&op1, x);
- sim_fpu_64to (&op2, y);
- status = sim_fpu_min (&ans, &op1, &op2);
- if (status != 0)
- (*fpu->ops->error) (fpu, status);
- sim_fpu_to64 (&res, &ans);
-
- return res;
-}
-
-static DF
-maxdf (CGEN_FPU* fpu, DF x, DF y)
-{
- sim_fpu op1;
- sim_fpu op2;
- sim_fpu ans;
- unsigned64 res;
- sim_fpu_status status;
-
- sim_fpu_64to (&op1, x);
- sim_fpu_64to (&op2, y);
- status = sim_fpu_max (&ans, &op1, &op2);
- if (status != 0)
- (*fpu->ops->error) (fpu, status);
- sim_fpu_to64 (&res, &ans);
-
- return res;
-}
-
-static CGEN_FP_CMP
-cmpdf (CGEN_FPU* fpu, DF x, DF y)
-{
- sim_fpu op1;
- sim_fpu op2;
-
- sim_fpu_64to (&op1, x);
- sim_fpu_64to (&op2, y);
-
- if (sim_fpu_is_nan (&op1)
- || sim_fpu_is_nan (&op2))
- return FP_CMP_NAN;
-
- if (x < y)
- return FP_CMP_LT;
- if (x > y)
- return FP_CMP_GT;
- return FP_CMP_EQ;
-}
-
-static int
-eqdf (CGEN_FPU* fpu, DF x, DF y)
-{
- sim_fpu op1;
- sim_fpu op2;
-
- sim_fpu_64to (&op1, x);
- sim_fpu_64to (&op2, y);
- return sim_fpu_is_eq (&op1, &op2);
-}
-
-static int
-nedf (CGEN_FPU* fpu, DF x, DF y)
-{
- sim_fpu op1;
- sim_fpu op2;
-
- sim_fpu_64to (&op1, x);
- sim_fpu_64to (&op2, y);
- return sim_fpu_is_ne (&op1, &op2);
-}
-
-static int
-ltdf (CGEN_FPU* fpu, DF x, DF y)
-{
- sim_fpu op1;
- sim_fpu op2;
-
- sim_fpu_64to (&op1, x);
- sim_fpu_64to (&op2, y);
- return sim_fpu_is_lt (&op1, &op2);
-}
-
-static int
-ledf (CGEN_FPU* fpu, DF x, DF y)
-{
- sim_fpu op1;
- sim_fpu op2;
-
- sim_fpu_64to (&op1, x);
- sim_fpu_64to (&op2, y);
- return sim_fpu_is_le (&op1, &op2);
-}
-
-static int
-gtdf (CGEN_FPU* fpu, DF x, DF y)
-{
- sim_fpu op1;
- sim_fpu op2;
-
- sim_fpu_64to (&op1, x);
- sim_fpu_64to (&op2, y);
- return sim_fpu_is_gt (&op1, &op2);
-}
-
-static int
-gedf (CGEN_FPU* fpu, DF x, DF y)
-{
- sim_fpu op1;
- sim_fpu op2;
-
- sim_fpu_64to (&op1, x);
- sim_fpu_64to (&op2, y);
- return sim_fpu_is_ge (&op1, &op2);
-}
-
-/* Initialize FP_OPS to use accurate library. */
-
-void
-cgen_init_accurate_fpu (SIM_CPU* cpu, CGEN_FPU* fpu, CGEN_FPU_ERROR_FN* error)
-{
- CGEN_FP_OPS* o;
-
- fpu->owner = cpu;
- /* ??? small memory leak, not freed by sim_close */
- fpu->ops = (CGEN_FP_OPS*) xmalloc (sizeof (CGEN_FP_OPS));
-
- o = fpu->ops;
- memset (o, 0, sizeof (*o));
-
- o->error = error;
-
- o->addsf = addsf;
- o->subsf = subsf;
- o->mulsf = mulsf;
- o->divsf = divsf;
- o->negsf = negsf;
- o->abssf = abssf;
- o->sqrtsf = sqrtsf;
- o->invsf = invsf;
- o->minsf = minsf;
- o->maxsf = maxsf;
- o->cmpsf = cmpsf;
- o->eqsf = eqsf;
- o->nesf = nesf;
- o->ltsf = ltsf;
- o->lesf = lesf;
- o->gtsf = gtsf;
- o->gesf = gesf;
-
- o->adddf = adddf;
- o->subdf = subdf;
- o->muldf = muldf;
- o->divdf = divdf;
- o->negdf = negdf;
- o->absdf = absdf;
- o->sqrtdf = sqrtdf;
- o->invdf = invdf;
- o->mindf = mindf;
- o->maxdf = maxdf;
- o->cmpdf = cmpdf;
- o->eqdf = eqdf;
- o->nedf = nedf;
- o->ltdf = ltdf;
- o->ledf = ledf;
- o->gtdf = gtdf;
- o->gedf = gedf;
- o->fextsfdf = fextsfdf;
- o->ftruncdfsf = ftruncdfsf;
- o->floatsisf = floatsisf;
- o->floatsidf = floatsidf;
- o->ufloatsisf = ufloatsisf;
- o->fixsfsi = fixsfsi;
- o->fixdfsi = fixdfsi;
- o->ufixsfsi = ufixsfsi;
-}
diff --git a/sim/common/cgen-cpu.h b/sim/common/cgen-cpu.h
deleted file mode 100644
index d79e98fee8d..00000000000
--- a/sim/common/cgen-cpu.h
+++ /dev/null
@@ -1,106 +0,0 @@
-/* Simulator header for cgen cpus.
- Copyright (C) 1998, 1999 Free Software Foundation, Inc.
- Contributed by Cygnus Support.
-
-This file is part of GDB, the GNU debugger.
-
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License along
-with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
-
-#ifndef CGEN_CPU_H
-#define CGEN_CPU_H
-
-/* Type of function that is ultimately called by sim_resume. */
-typedef void (ENGINE_FN) (SIM_CPU *);
-
-/* Type of function to do disassembly. */
-typedef void (CGEN_DISASSEMBLER) (SIM_CPU *, const CGEN_INSN *,
- const ARGBUF *, IADDR pc_, char *buf_);
-
-/* Additional non-machine generated per-cpu data to go in SIM_CPU.
- The member's name must be `cgen_cpu'. */
-
-typedef struct {
- /* Non-zero while cpu simulation is running. */
- int running_p;
-#define CPU_RUNNING_P(cpu) ((cpu)->cgen_cpu.running_p)
-
- /* Instruction count. This is maintained even in fast mode to keep track
- of simulator speed. */
- unsigned long insn_count;
-#define CPU_INSN_COUNT(cpu) ((cpu)->cgen_cpu.insn_count)
-
- /* sim_resume handlers */
- ENGINE_FN *fast_engine_fn;
-#define CPU_FAST_ENGINE_FN(cpu) ((cpu)->cgen_cpu.fast_engine_fn)
- ENGINE_FN *full_engine_fn;
-#define CPU_FULL_ENGINE_FN(cpu) ((cpu)->cgen_cpu.full_engine_fn)
-
- /* Maximum number of instructions per time slice.
- When single stepping this is 1. If using the pbb model, this can be
- more than 1. 0 means "as long as you want". */
- unsigned int max_slice_insns;
-#define CPU_MAX_SLICE_INSNS(cpu) ((cpu)->cgen_cpu.max_slice_insns)
-
- /* Simulator's execution cache.
- Allocate space for this even if not used as some simulators may have
- one machine variant that uses the scache and another that doesn't and
- we don't want members in this struct to move about. */
- CPU_SCACHE scache;
-
- /* Instruction descriptor table. */
- IDESC *idesc;
-#define CPU_IDESC(cpu) ((cpu)->cgen_cpu.idesc)
-
- /* Whether the read,write,semantic entries (function pointers or computed
- goto labels) have been initialized or not. */
- int idesc_read_init_p;
-#define CPU_IDESC_READ_INIT_P(cpu) ((cpu)->cgen_cpu.idesc_read_init_p)
- int idesc_write_init_p;
-#define CPU_IDESC_WRITE_INIT_P(cpu) ((cpu)->cgen_cpu.idesc_write_init_p)
- int idesc_sem_init_p;
-#define CPU_IDESC_SEM_INIT_P(cpu) ((cpu)->cgen_cpu.idesc_sem_init_p)
-
- /* Cpu descriptor table.
- This is a CGEN created entity that contains the description file
- turned into C code and tables for our use. */
- CGEN_CPU_DESC cpu_desc;
-#define CPU_CPU_DESC(cpu) ((cpu)->cgen_cpu.cpu_desc)
-
- /* Function to fetch the insn data entry in the IDESC. */
- const CGEN_INSN * (*get_idata) (SIM_CPU *, int);
-#define CPU_GET_IDATA(cpu) ((cpu)->cgen_cpu.get_idata)
-
- /* Floating point support. */
- CGEN_FPU fpu;
-#define CGEN_CPU_FPU(cpu) (& (cpu)->cgen_cpu.fpu)
-
- /* Disassembler. */
- CGEN_DISASSEMBLER *disassembler;
-#define CPU_DISASSEMBLER(cpu) ((cpu)->cgen_cpu.disassembler)
-
- /* Queued writes for parallel write-after support. */
- CGEN_WRITE_QUEUE write_queue;
-#define CPU_WRITE_QUEUE(cpu) (& (cpu)->cgen_cpu.write_queue)
-
- /* Allow slop in size calcs for case where multiple cpu types are supported
- and space for the specified cpu is malloc'd at run time. */
- double slop;
-} CGEN_CPU;
-
-/* Shorthand macro for fetching registers.
- CPU_CGEN_HW is defined in cpu.h. */
-#define CPU(x) (CPU_CGEN_HW (current_cpu)->x)
-
-#endif /* CGEN_CPU_H */
diff --git a/sim/common/cgen-defs.h b/sim/common/cgen-defs.h
deleted file mode 100644
index fbdfb9a2791..00000000000
--- a/sim/common/cgen-defs.h
+++ /dev/null
@@ -1,183 +0,0 @@
-/* General Cpu tools GENerated simulator support.
- Copyright (C) 1996, 1997, 1998, 1999 Free Software Foundation, Inc.
- Contributed by Cygnus Support.
-
-This file is part of GDB, the GNU debugger.
-
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License along
-with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
-
-#ifndef CGEN_DEFS_H
-#define CGEN_DEFS_H
-
-/* Compute number of longs required to hold N bits. */
-#define HOST_LONGS_FOR_BITS(n) \
- (((n) + sizeof (long) * 8 - 1) / sizeof (long) * 8)
-
-/* Forward decls. Defined in the machine generated files. */
-
-/* This holds the contents of the extracted insn.
- There are a few common entries (e.g. pc address), and then one big
- union with an entry for each of the instruction formats. */
-typedef struct argbuf ARGBUF;
-
-/* ARGBUF accessors. */
-#define ARGBUF_ADDR(abuf) ((abuf)->addr)
-#define ARGBUF_IDESC(abuf) ((abuf)->idesc)
-#define ARGBUF_TRACE_P(abuf) ((abuf)->trace_p)
-#define ARGBUF_PROFILE_P(abuf) ((abuf)->profile_p)
-
-/* This is one ARGBUF plus whatever else is needed for WITH_SCACHE support.
- At present there is nothing else, but it also provides a level of
- abstraction. */
-typedef struct scache SCACHE;
-
-/* This is a union with one entry for each instruction format.
- Each entry contains all of the non-constant inputs of the instruction
- in the case of read-before-exec support, or all outputs of the instruction
- in the case of write-after-exec support. */
-typedef struct parexec PAREXEC;
-
-/* An "Instruction DESCriptor".
- This is the main handle on an instruction for the simulator. */
-typedef struct idesc IDESC;
-
-/* Engine support.
- ??? This is here because it's needed before eng.h (built by genmloop.sh)
- which is needed before cgen-engine.h and cpu.h.
- ??? This depends on a cpu family specific type, IADDR, but no machine
- generated headers will have been included yet. sim/common currently
- requires the typedef of sim_cia in sim-main.h between the inclusion of
- sim-basics.h and sim-base.h so this is no different. */
-
-/* SEM_ARG is intended to hide whether or not the scache is in use from the
- semantic routines. In reality for the with-extraction case it is always
- an SCACHE * even when not using the SCACHE since there's no current win to
- making it something else ("not using the SCACHE" is like having a cache
- size of 1).
- The without-extraction case still uses an ARGBUF:
- - consistency with scache version
- - still need to record which operands are written
- This wouldn't be needed if modeling was done in the semantic routines
- but this isn't as general as handling it outside of the semantic routines.
- For example Shade allows calling user-supplied code before/after each
- instruction and this is something that is being planned.
- ??? There is still some clumsiness in how much of ARGBUF to use. */
-typedef SCACHE *SEM_ARG;
-
-/* instruction address
- ??? This was intended to be a struct of two elements in the WITH_SCACHE_PBB
- case. The first element is the IADDR, the second element is the SCACHE *.
- Haven't found the time yet to make this work, but it seemed a nicer approach
- than the current br_cache stuff. */
-typedef IADDR PCADDR;
-
-/* Current instruction address, used by common. */
-typedef IADDR CIA;
-
-/* Semantic routines' version of the PC. */
-#if WITH_SCACHE_PBB
-typedef SCACHE *SEM_PC;
-#else
-typedef IADDR SEM_PC;
-#endif
-
-/* Kinds of branches. */
-typedef enum {
- SEM_BRANCH_UNTAKEN,
- /* Branch to an uncacheable address (e.g. j reg). */
- SEM_BRANCH_UNCACHEABLE,
- /* Branch to a cacheable (fixed) address. */
- SEM_BRANCH_CACHEABLE
-} SEM_BRANCH_TYPE;
-
-/* Virtual insn support. */
-
-/* Opcode table for virtual insns (only used by the simulator). */
-extern const CGEN_INSN cgen_virtual_insn_table[];
-
-/* -ve of indices of virtual insns in cgen_virtual_insn_table. */
-typedef enum {
- VIRTUAL_INSN_X_INVALID = 0,
- VIRTUAL_INSN_X_BEFORE = -1, VIRTUAL_INSN_X_AFTER = -2,
- VIRTUAL_INSN_X_BEGIN = -3,
- VIRTUAL_INSN_X_CHAIN= -4, VIRTUAL_INSN_X_CTI_CHAIN = -5
-} CGEN_INSN_VIRTUAL_TYPE;
-
-/* Return non-zero if CGEN_INSN* INSN is a virtual insn. */
-#define CGEN_INSN_VIRTUAL_P(insn) \
- CGEN_INSN_ATTR_VALUE ((insn), CGEN_INSN_VIRTUAL)
-
-/* GNU C's "computed goto" facility is used to speed things up where
- possible. These macros provide a portable way to use them.
- Nesting of these switch statements is done by providing an extra argument
- that distinguishes them. `N' can be a number or symbol.
- Variable `labels_##N' must be initialized with the labels of each case. */
-
-#ifdef __GNUC__
-#define SWITCH(N, X) goto *X;
-#define CASE(N, X) case_##N##_##X
-#define BREAK(N) goto end_switch_##N
-#define DEFAULT(N) default_##N
-#define ENDSWITCH(N) end_switch_##N:
-#else
-#define SWITCH(N, X) switch (X)
-#define CASE(N, X) case X /* FIXME: old sem-switch had (@arch@_,X) here */
-#define BREAK(N) break
-#define DEFAULT(N) default
-#define ENDSWITCH(N)
-#endif
-
-/* Simulator state. */
-
-/* Records simulator descriptor so utilities like @cpu@_dump_regs can be
- called from gdb. */
-extern SIM_DESC current_state;
-
-/* Simulator state. */
-
-/* CGEN_STATE contains additional state information not present in
- sim_state_base. */
-
-typedef struct cgen_state {
- /* FIXME: Moved to sim_state_base. */
- /* argv, env */
- char **argv;
-#define STATE_ARGV(s) ((s) -> cgen_state.argv)
- /* FIXME: Move to sim_state_base. */
- char **envp;
-#define STATE_ENVP(s) ((s) -> cgen_state.envp)
-
- /* Non-zero if no tracing or profiling is selected. */
- int run_fast_p;
-#define STATE_RUN_FAST_P(sd) ((sd) -> cgen_state.run_fast_p)
-} CGEN_STATE;
-
-/* Various utilities. */
-
-/* Called after sim_post_argv_init to do any cgen initialization. */
-extern void cgen_init (SIM_DESC);
-
-/* Return the name of an insn. */
-extern CPU_INSN_NAME_FN cgen_insn_name;
-
-/* Return the maximum number of extra bytes required for a sim_cpu struct. */
-/* ??? Ok, yes, this is less pretty than it should be. Give me a better
- language [or suggest a better way]. */
-extern int cgen_cpu_max_extra_bytes (void);
-
-/* Target supplied routine to process an invalid instruction. */
-extern SEM_PC sim_engine_invalid_insn (SIM_CPU *, IADDR, SEM_PC);
-
-#endif /* CGEN_DEFS_H */
diff --git a/sim/common/cgen-engine.h b/sim/common/cgen-engine.h
deleted file mode 100644
index a0daf80f627..00000000000
--- a/sim/common/cgen-engine.h
+++ /dev/null
@@ -1,431 +0,0 @@
-/* Engine header for Cpu tools GENerated simulators.
- Copyright (C) 1998, 1999 Free Software Foundation, Inc.
- Contributed by Cygnus Support.
-
-This file is part of GDB, the GNU debugger.
-
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License along
-with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
-
-/* This file must be included after eng.h and before ${cpu}.h.
- ??? A lot of this could be moved to genmloop.sh to be put in eng.h
- and thus remove some conditional compilation. Worth it? */
-
-/* Semantic functions come in six versions on two axes:
- fast/full-featured, and using one of the simple/scache/compilation engines.
- A full featured simulator is always provided. --enable-sim-fast includes
- support for fast execution by duplicating the semantic code but leaving
- out all features like tracing and profiling.
- Using the scache is selected with --enable-sim-scache. */
-/* FIXME: --enable-sim-fast not implemented yet. */
-/* FIXME: undecided how to handle WITH_SCACHE_PBB. */
-
-/* There are several styles of engines, all generally supported by the
- same code:
-
- WITH_SCACHE && WITH_SCACHE_PBB - pseudo-basic-block scaching
- WITH_SCACHE && !WITH_SCACHE_PBB - scaching on an insn by insn basis
- !WITH_SCACHE - simple engine: fetch an insn, execute an insn
-
- The !WITH_SCACHE case can also be broken up into two flavours:
- extract the fields of the insn into an ARGBUF struct, or defer the
- extraction to the semantic handler. The former can be viewed as the
- WITH_SCACHE case with a cache size of 1 (thus there's no need for a
- WITH_EXTRACTION macro). The WITH_SCACHE case always extracts the fields
- into an ARGBUF struct. */
-
-#ifndef CGEN_ENGINE_H
-#define CGEN_ENGINE_H
-
-/* Instruction field support macros. */
-
-#define EXTRACT_MSB0_INT(val, total, start, length) \
-(((INT) (val) << ((sizeof (INT) * 8) - (total) + (start))) \
- >> ((sizeof (INT) * 8) - (length)))
-#define EXTRACT_MSB0_UINT(val, total, start, length) \
-(((UINT) (val) << ((sizeof (UINT) * 8) - (total) + (start))) \
- >> ((sizeof (UINT) * 8) - (length)))
-
-#define EXTRACT_LSB0_INT(val, total, start, length) \
-(((INT) (val) << ((sizeof (INT) * 8) - (start) - 1)) \
- >> ((sizeof (INT) * 8) - (length)))
-#define EXTRACT_LSB0_UINT(val, total, start, length) \
-(((UINT) (val) << ((sizeof (UINT) * 8) - (start) - 1)) \
- >> ((sizeof (UINT) * 8) - (length)))
-
-/* Semantic routines. */
-
-/* Type of the machine generated extraction fns. */
-/* ??? No longer used. */
-typedef void (EXTRACT_FN) (SIM_CPU *, IADDR, CGEN_INSN_INT, ARGBUF *);
-
-/* Type of the machine generated semantic fns. */
-
-#if WITH_SCACHE
-
-/* Instruction fields are extracted into ARGBUF before calling the
- semantic routine. */
-#if HAVE_PARALLEL_INSNS && ! WITH_PARALLEL_GENWRITE
-typedef SEM_PC (SEMANTIC_FN) (SIM_CPU *, SEM_ARG, PAREXEC *);
-#else
-typedef SEM_PC (SEMANTIC_FN) (SIM_CPU *, SEM_ARG);
-#endif
-
-#else
-
-/* Result of semantic routines is a status indicator (wip). */
-typedef unsigned int SEM_STATUS;
-
-/* Instruction fields are extracted by the semantic routine.
- ??? TODO: multi word insns. */
-#if HAVE_PARALLEL_INSNS && ! WITH_PARALLEL_GENWRITE
-typedef SEM_STATUS (SEMANTIC_FN) (SIM_CPU *, SEM_ARG, PAREXEC *, CGEN_INSN_INT);
-#else
-typedef SEM_STATUS (SEMANTIC_FN) (SIM_CPU *, SEM_ARG, CGEN_INSN_INT);
-#endif
-
-#endif
-
-/* In the ARGBUF struct, a pointer to the semantic routine for the insn. */
-
-union sem {
-#if ! WITH_SEM_SWITCH_FULL
- SEMANTIC_FN *sem_full;
-#endif
-#if ! WITH_SEM_SWITCH_FAST
- SEMANTIC_FN *sem_fast;
-#endif
-#if WITH_SEM_SWITCH_FULL || WITH_SEM_SWITCH_FAST
-#ifdef __GNUC__
- void *sem_case;
-#else
- int sem_case;
-#endif
-#endif
-};
-
-/* Set the appropriate semantic handler in ABUF. */
-
-#if WITH_SEM_SWITCH_FULL
-#ifdef __GNUC__
-#define SEM_SET_FULL_CODE(abuf, idesc) \
- do { (abuf)->semantic.sem_case = (idesc)->sem_full_lab; } while (0)
-#else
-#define SEM_SET_FULL_CODE(abuf, idesc) \
- do { (abuf)->semantic.sem_case = (idesc)->num; } while (0)
-#endif
-#else
-#define SEM_SET_FULL_CODE(abuf, idesc) \
- do { (abuf)->semantic.sem_full = (idesc)->sem_full; } while (0)
-#endif
-
-#if WITH_SEM_SWITCH_FAST
-#ifdef __GNUC__
-#define SEM_SET_FAST_CODE(abuf, idesc) \
- do { (abuf)->semantic.sem_case = (idesc)->sem_fast_lab; } while (0)
-#else
-#define SEM_SET_FAST_CODE(abuf, idesc) \
- do { (abuf)->semantic.sem_case = (idesc)->num; } while (0)
-#endif
-#else
-#define SEM_SET_FAST_CODE(abuf, idesc) \
- do { (abuf)->semantic.sem_fast = (idesc)->sem_fast; } while (0)
-#endif
-
-#define SEM_SET_CODE(abuf, idesc, fast_p) \
-do { \
- if (fast_p) \
- SEM_SET_FAST_CODE ((abuf), (idesc)); \
- else \
- SEM_SET_FULL_CODE ((abuf), (idesc)); \
-} while (0)
-
-/* Return non-zero if IDESC is a conditional or unconditional CTI. */
-
-#define IDESC_CTI_P(idesc) \
- ((CGEN_ATTR_BOOLS (CGEN_INSN_ATTRS ((idesc)->idata)) \
- & (CGEN_ATTR_MASK (CGEN_INSN_COND_CTI) \
- | CGEN_ATTR_MASK (CGEN_INSN_UNCOND_CTI))) \
- != 0)
-
-/* Return non-zero if IDESC is a skip insn. */
-
-#define IDESC_SKIP_P(idesc) \
- ((CGEN_ATTR_BOOLS (CGEN_INSN_ATTRS ((idesc)->idata)) \
- & CGEN_ATTR_MASK (CGEN_INSN_SKIP_CTI)) \
- != 0)
-
-/* Return pointer to ARGBUF given ptr to SCACHE. */
-#define SEM_ARGBUF(sem_arg) (& (sem_arg) -> argbuf)
-
-/* There are several styles of engines, all generally supported by the
- same code:
-
- WITH_SCACHE && WITH_SCACHE_PBB - pseudo-basic-block scaching
- WITH_SCACHE && !WITH_SCACHE_PBB - scaching on an insn by insn basis
- !WITH_SCACHE - simple engine: fetch an insn, execute an insn
-
- ??? The !WITH_SCACHE case can also be broken up into two flavours:
- extract the fields of the insn into an ARGBUF struct, or defer the
- extraction to the semantic handler. The WITH_SCACHE case always
- extracts the fields into an ARGBUF struct. */
-
-#if WITH_SCACHE
-
-#define CIA_ADDR(cia) (cia)
-
-#if WITH_SCACHE_PBB
-
-/* Return the scache pointer of the current insn. */
-#define SEM_SEM_ARG(vpc, sc) (vpc)
-
-/* Return the virtual pc of the next insn to execute
- (assuming this isn't a cti or the branch isn't taken). */
-#define SEM_NEXT_VPC(sem_arg, pc, len) ((sem_arg) + 1)
-
-/* Update the instruction counter. */
-#define PBB_UPDATE_INSN_COUNT(cpu,sc) \
- (CPU_INSN_COUNT (cpu) += SEM_ARGBUF (sc) -> fields.chain.insn_count)
-
-/* Do not append a `;' to invocations of this.
- npc,br_type are for communication between the cti insn and cti-chain. */
-#define SEM_BRANCH_INIT \
- IADDR npc = 0; /* assign a value for -Wall */ \
- SEM_BRANCH_TYPE br_type = SEM_BRANCH_UNTAKEN;
-
-/* SEM_IN_SWITCH is defined at the top of the mainloop.c files
- generated by genmloop.sh. It exists so generated semantic code needn't
- care whether it's being put in a switch or in a function. */
-#ifdef SEM_IN_SWITCH
-#define SEM_BRANCH_FINI(pcvar) \
-do { \
- pbb_br_npc = npc; \
- pbb_br_type = br_type; \
-} while (0)
-#else /* 1 semantic function per instruction */
-#define SEM_BRANCH_FINI(pcvar) \
-do { \
- CPU_PBB_BR_NPC (current_cpu) = npc; \
- CPU_PBB_BR_TYPE (current_cpu) = br_type; \
-} while (0)
-#endif
-
-#define SEM_BRANCH_VIA_CACHE(cpu, sc, newval, pcvar) \
-do { \
- npc = (newval); \
- br_type = SEM_BRANCH_CACHEABLE; \
-} while (0)
-
-#define SEM_BRANCH_VIA_ADDR(cpu, sc, newval, pcvar) \
-do { \
- npc = (newval); \
- br_type = SEM_BRANCH_UNCACHEABLE; \
-} while (0)
-
-#define SEM_SKIP_COMPILE(cpu, sc, skip) \
-do { \
- SEM_ARGBUF (sc) -> skip_count = (skip); \
-} while (0)
-
-#define SEM_SKIP_INSN(cpu, sc, vpcvar) \
-do { \
- (vpcvar) += SEM_ARGBUF (sc) -> skip_count; \
-} while (0)
-
-#else /* ! WITH_SCACHE_PBB */
-
-#define SEM_SEM_ARG(vpc, sc) (sc)
-
-#define SEM_NEXT_VPC(sem_arg, pc, len) ((pc) + (len))
-
-/* ??? May wish to move taken_p out of here and make it explicit. */
-#define SEM_BRANCH_INIT \
- int taken_p = 0;
-
-#ifndef TARGET_SEM_BRANCH_FINI
-#define TARGET_SEM_BRANCH_FINI(pcvar, taken_p)
-#endif
-#define SEM_BRANCH_FINI(pcvar) \
- do { TARGET_SEM_BRANCH_FINI (pcvar, taken_p); } while (0)
-
-#define SEM_BRANCH_VIA_CACHE(cpu, sc, newval, pcvar) \
-do { \
- (pcvar) = (newval); \
- taken_p = 1; \
-} while (0)
-
-#define SEM_BRANCH_VIA_ADDR(cpu, sc, newval, pcvar) \
-do { \
- (pcvar) = (newval); \
- taken_p = 1; \
-} while (0)
-
-#endif /* ! WITH_SCACHE_PBB */
-
-#else /* ! WITH_SCACHE */
-
-/* This is the "simple" engine case. */
-
-#define CIA_ADDR(cia) (cia)
-
-#define SEM_SEM_ARG(vpc, sc) (sc)
-
-#define SEM_NEXT_VPC(sem_arg, pc, len) ((pc) + (len))
-
-#define SEM_BRANCH_INIT \
- int taken_p = 0;
-
-#define SEM_BRANCH_VIA_CACHE(cpu, abuf, newval, pcvar) \
-do { \
- (pcvar) = (newval); \
- taken_p = 1; \
-} while (0)
-
-#define SEM_BRANCH_VIA_ADDR(cpu, abuf, newval, pcvar) \
-do { \
- (pcvar) = (newval); \
- taken_p = 1; \
-} while (0)
-
-/* Finish off branch insns.
- The target must define TARGET_SEM_BRANCH_FINI.
- ??? This can probably go away when define-execute is finished. */
-#define SEM_BRANCH_FINI(pcvar, bool_attrs) \
- do { TARGET_SEM_BRANCH_FINI ((pcvar), (bool_attrs), taken_p); } while (0)
-
-/* Finish off non-branch insns.
- The target must define TARGET_SEM_NBRANCH_FINI.
- ??? This can probably go away when define-execute is finished. */
-#define SEM_NBRANCH_FINI(pcvar, bool_attrs) \
- do { TARGET_SEM_NBRANCH_FINI ((pcvar), (bool_attrs)); } while (0)
-
-#endif /* ! WITH_SCACHE */
-
-/* Instruction information. */
-
-/* Sanity check, at most one of these may be true. */
-#if WITH_PARALLEL_READ + WITH_PARALLEL_WRITE + WITH_PARALLEL_GENWRITE > 1
-#error "At most one of WITH_PARALLEL_{READ,WRITE,GENWRITE} can be true."
-#endif
-
-/* Compile time computable instruction data. */
-
-struct insn_sem {
- /* The instruction type (a number that identifies each insn over the
- entire architecture). */
- CGEN_INSN_TYPE type;
-
- /* Index in IDESC table. */
- int index;
-
- /* Semantic format number. */
- int sfmt;
-
-#if HAVE_PARALLEL_INSNS && ! WITH_PARALLEL_ONLY
- /* Index in IDESC table of parallel handler. */
- int par_index;
-#endif
-
-#if WITH_PARALLEL_READ
- /* Index in IDESC table of read handler. */
- int read_index;
-#endif
-
-#if WITH_PARALLEL_WRITE
- /* Index in IDESC table of writeback handler. */
- int write_index;
-#endif
-};
-
-/* Entry in semantic function table.
- This information is copied to the insn descriptor table at run-time. */
-
-struct sem_fn_desc {
- /* Index in IDESC table. */
- int index;
-
- /* Function to perform the semantics of the insn. */
- SEMANTIC_FN *fn;
-};
-
-/* Run-time computed instruction descriptor. */
-
-struct idesc {
-#if WITH_SEM_SWITCH_FAST
-#ifdef __GNUC__
- void *sem_fast_lab;
-#else
- /* nothing needed, switch's on `num' member */
-#endif
-#else
- SEMANTIC_FN *sem_fast;
-#endif
-
-#if WITH_SEM_SWITCH_FULL
-#ifdef __GNUC__
- void *sem_full_lab;
-#else
- /* nothing needed, switch's on `num' member */
-#endif
-#else
- SEMANTIC_FN *sem_full;
-#endif
-
- /* Parallel support. */
-#if HAVE_PARALLEL_INSNS && (! WITH_PARALLEL_ONLY || (WITH_PARALLEL_ONLY && ! WITH_PARALLEL_GENWRITE))
- /* Pointer to parallel handler if serial insn.
- Pointer to readahead/writeback handler if parallel insn. */
- struct idesc *par_idesc;
-#endif
-
- /* Instruction number (index in IDESC table, profile table).
- Also used to switch on in non-gcc semantic switches. */
- int num;
-
- /* Semantic format id. */
- int sfmt;
-
- /* instruction data (name, attributes, size, etc.) */
- const CGEN_INSN *idata;
-
- /* instruction attributes, copied from `idata' for speed */
- const CGEN_INSN_ATTR_TYPE *attrs;
-
- /* instruction length in bytes, copied from `idata' for speed */
- int length;
-
- /* profiling/modelling support */
- const INSN_TIMING *timing;
-};
-
-/* Tracing/profiling. */
-
-/* Return non-zero if a before/after handler is needed.
- When tracing/profiling a selected range there's no need to slow
- down simulation of the other insns (except to get more accurate data!).
-
- ??? May wish to profile all insns if doing insn tracing, or to
- get more accurate cycle data.
-
- First test ANY_P so we avoid a potentially expensive HIT_P call
- [if there are lots of address ranges]. */
-
-#define PC_IN_TRACE_RANGE_P(cpu, pc) \
- (TRACE_ANY_P (cpu) \
- && ADDR_RANGE_HIT_P (TRACE_RANGE (CPU_TRACE_DATA (cpu)), (pc)))
-#define PC_IN_PROFILE_RANGE_P(cpu, pc) \
- (PROFILE_ANY_P (cpu) \
- && ADDR_RANGE_HIT_P (PROFILE_RANGE (CPU_PROFILE_DATA (cpu)), (pc)))
-
-#endif /* CGEN_ENGINE_H */
diff --git a/sim/common/cgen-fpu.c b/sim/common/cgen-fpu.c
deleted file mode 100644
index 3a8d5199bea..00000000000
--- a/sim/common/cgen-fpu.c
+++ /dev/null
@@ -1,32 +0,0 @@
-/* CGEN fpu support
- Copyright (C) 1999 Cygnus Solutions. */
-
-#include "sim-main.h"
-#include "sim-fpu.h"
-
-/* Return boolean indicating if X is an snan. */
-
-BI
-cgen_sf_snan_p (CGEN_FPU* fpu, SF x)
-{
- sim_fpu op1;
-
- sim_fpu_32to (&op1, x);
- return sim_fpu_is_nan (&op1);
-}
-
-BI
-cgen_df_snan_p (CGEN_FPU* fpu, DF x)
-{
- sim_fpu op1;
-
- sim_fpu_64to (&op1, x);
- return sim_fpu_is_nan (&op1);
-}
-
-/* No-op fpu error handler. */
-
-void
-cgen_fpu_ignore_errors (CGEN_FPU* fpu, int status)
-{
-}
diff --git a/sim/common/cgen-fpu.h b/sim/common/cgen-fpu.h
deleted file mode 100644
index bc3364e00cd..00000000000
--- a/sim/common/cgen-fpu.h
+++ /dev/null
@@ -1,212 +0,0 @@
-/* CGEN fpu support
- Copyright (C) 1999 Cygnus Solutions. */
-
-#ifndef CGEN_FPU_H
-#define CGEN_FPU_H
-
-/* Floating point support is a little more complicated.
- We want to support using either host fp insns or an accurate fp library.
- We also want to support easily added variants (e.g. modified ieee).
- This is done by vectoring all calls through a table. */
-
-typedef USI SF;
-typedef UDI DF;
-typedef struct { SI parts[3]; } XF;
-typedef struct { SI parts[4]; } TF;
-
-#ifndef TARGET_EXT_FP_WORDS
-#define TARGET_EXT_FP_WORDS 4
-#endif
-
-/* forward decl */
-typedef struct cgen_fp_ops CGEN_FP_OPS;
-
-/* Instance of an fpu. */
-
-typedef struct {
- /* Usually a pointer back to the SIM_CPU struct. */
- void* owner;
- /* Pointer to ops struct, rather than copy of it, to avoid bloating
- SIM_CPU struct. */
- CGEN_FP_OPS* ops;
-} CGEN_FPU;
-
-/* result of cmp */
-
-typedef enum {
- /* ??? May wish to distinguish qnan/snan here. */
- FP_CMP_EQ, FP_CMP_LT, FP_CMP_GT, FP_CMP_NAN
-} CGEN_FP_CMP;
-
-/* error handler */
-
-typedef void (CGEN_FPU_ERROR_FN) (CGEN_FPU*, int);
-
-/* fpu operation table */
-
-struct cgen_fp_ops {
-
- /* error (e.g. signalling nan) handler, supplied by owner */
-
- CGEN_FPU_ERROR_FN *error;
-
- /* basic SF ops */
-
- SF (*addsf) (CGEN_FPU*, SF, SF);
- SF (*subsf) (CGEN_FPU*, SF, SF);
- SF (*mulsf) (CGEN_FPU*, SF, SF);
- SF (*divsf) (CGEN_FPU*, SF, SF);
- SF (*negsf) (CGEN_FPU*, SF);
- SF (*abssf) (CGEN_FPU*, SF);
- SF (*sqrtsf) (CGEN_FPU*, SF);
- SF (*invsf) (CGEN_FPU*, SF);
- SF (*cossf) (CGEN_FPU*, SF);
- SF (*sinsf) (CGEN_FPU*, SF);
- SF (*minsf) (CGEN_FPU*, SF, SF);
- SF (*maxsf) (CGEN_FPU*, SF, SF);
-
- /* ??? to be revisited */
- CGEN_FP_CMP (*cmpsf) (CGEN_FPU*, SF, SF);
- int (*eqsf) (CGEN_FPU*, SF, SF);
- int (*nesf) (CGEN_FPU*, SF, SF);
- int (*ltsf) (CGEN_FPU*, SF, SF);
- int (*lesf) (CGEN_FPU*, SF, SF);
- int (*gtsf) (CGEN_FPU*, SF, SF);
- int (*gesf) (CGEN_FPU*, SF, SF);
-
- /* basic DF ops */
-
- DF (*adddf) (CGEN_FPU*, DF, DF);
- DF (*subdf) (CGEN_FPU*, DF, DF);
- DF (*muldf) (CGEN_FPU*, DF, DF);
- DF (*divdf) (CGEN_FPU*, DF, DF);
- DF (*negdf) (CGEN_FPU*, DF);
- DF (*absdf) (CGEN_FPU*, DF);
- DF (*sqrtdf) (CGEN_FPU*, DF);
- DF (*invdf) (CGEN_FPU*, DF);
- DF (*cosdf) (CGEN_FPU*, DF);
- DF (*sindf) (CGEN_FPU*, DF);
- DF (*mindf) (CGEN_FPU*, DF, DF);
- DF (*maxdf) (CGEN_FPU*, DF, DF);
-
- /* ??? to be revisited */
- CGEN_FP_CMP (*cmpdf) (CGEN_FPU*, DF, DF);
- int (*eqdf) (CGEN_FPU*, DF, DF);
- int (*nedf) (CGEN_FPU*, DF, DF);
- int (*ltdf) (CGEN_FPU*, DF, DF);
- int (*ledf) (CGEN_FPU*, DF, DF);
- int (*gtdf) (CGEN_FPU*, DF, DF);
- int (*gedf) (CGEN_FPU*, DF, DF);
-
- /* SF/DF conversion ops */
-
- DF (*fextsfdf) (CGEN_FPU*, SF);
- SF (*ftruncdfsf) (CGEN_FPU*, DF);
-
- SF (*floatsisf) (CGEN_FPU*, SI);
- SF (*floatdisf) (CGEN_FPU*, DI);
- SF (*ufloatsisf) (CGEN_FPU*, USI);
- SF (*ufloatdisf) (CGEN_FPU*, UDI);
-
- SI (*fixsfsi) (CGEN_FPU*, SF);
- DI (*fixsfdi) (CGEN_FPU*, SF);
- USI (*ufixsfsi) (CGEN_FPU*, SF);
- UDI (*ufixsfdi) (CGEN_FPU*, SF);
-
- DF (*floatsidf) (CGEN_FPU*, SI);
- DF (*floatdidf) (CGEN_FPU*, DI);
- DF (*ufloatsidf) (CGEN_FPU*, USI);
- DF (*ufloatdidf) (CGEN_FPU*, UDI);
-
- SI (*fixdfsi) (CGEN_FPU*, DF);
- DI (*fixdfdi) (CGEN_FPU*, DF);
- USI (*ufixdfsi) (CGEN_FPU*, DF);
- UDI (*ufixdfdi) (CGEN_FPU*, DF);
-
- /* XF mode support (kept separate 'cus not always present) */
-
- XF (*addxf) (CGEN_FPU*, XF, XF);
- XF (*subxf) (CGEN_FPU*, XF, XF);
- XF (*mulxf) (CGEN_FPU*, XF, XF);
- XF (*divxf) (CGEN_FPU*, XF, XF);
- XF (*negxf) (CGEN_FPU*, XF);
- XF (*absxf) (CGEN_FPU*, XF);
- XF (*sqrtxf) (CGEN_FPU*, XF);
- XF (*invxf) (CGEN_FPU*, XF);
- XF (*cosxf) (CGEN_FPU*, XF);
- XF (*sinxf) (CGEN_FPU*, XF);
- XF (*minxf) (CGEN_FPU*, XF, XF);
- XF (*maxxf) (CGEN_FPU*, XF, XF);
-
- CGEN_FP_CMP (*cmpxf) (CGEN_FPU*, XF, XF);
- int (*eqxf) (CGEN_FPU*, XF, XF);
- int (*nexf) (CGEN_FPU*, XF, XF);
- int (*ltxf) (CGEN_FPU*, XF, XF);
- int (*lexf) (CGEN_FPU*, XF, XF);
- int (*gtxf) (CGEN_FPU*, XF, XF);
- int (*gexf) (CGEN_FPU*, XF, XF);
-
- XF (*extsfxf) (CGEN_FPU*, SF);
- XF (*extdfxf) (CGEN_FPU*, DF);
- SF (*truncxfsf) (CGEN_FPU*, XF);
- DF (*truncxfdf) (CGEN_FPU*, XF);
-
- XF (*floatsixf) (CGEN_FPU*, SI);
- XF (*floatdixf) (CGEN_FPU*, DI);
- XF (*ufloatsixf) (CGEN_FPU*, USI);
- XF (*ufloatdixf) (CGEN_FPU*, UDI);
-
- SI (*fixxfsi) (CGEN_FPU*, XF);
- DI (*fixxfdi) (CGEN_FPU*, XF);
- USI (*ufixxfsi) (CGEN_FPU*, XF);
- UDI (*ufixxfdi) (CGEN_FPU*, XF);
-
- /* TF mode support (kept separate 'cus not always present) */
-
- TF (*addtf) (CGEN_FPU*, TF, TF);
- TF (*subtf) (CGEN_FPU*, TF, TF);
- TF (*multf) (CGEN_FPU*, TF, TF);
- TF (*divtf) (CGEN_FPU*, TF, TF);
- TF (*negtf) (CGEN_FPU*, TF);
- TF (*abstf) (CGEN_FPU*, TF);
- TF (*sqrttf) (CGEN_FPU*, TF);
- TF (*invtf) (CGEN_FPU*, TF);
- TF (*costf) (CGEN_FPU*, TF);
- TF (*sintf) (CGEN_FPU*, TF);
- TF (*mintf) (CGEN_FPU*, TF, TF);
- TF (*maxtf) (CGEN_FPU*, TF, TF);
-
- CGEN_FP_CMP (*cmptf) (CGEN_FPU*, TF, TF);
- int (*eqtf) (CGEN_FPU*, TF, TF);
- int (*netf) (CGEN_FPU*, TF, TF);
- int (*lttf) (CGEN_FPU*, TF, TF);
- int (*letf) (CGEN_FPU*, TF, TF);
- int (*gttf) (CGEN_FPU*, TF, TF);
- int (*getf) (CGEN_FPU*, TF, TF);
-
- TF (*extsftf) (CGEN_FPU*, SF);
- TF (*extdftf) (CGEN_FPU*, DF);
- SF (*trunctfsf) (CGEN_FPU*, TF);
- DF (*trunctfdf) (CGEN_FPU*, TF);
-
- TF (*floatsitf) (CGEN_FPU*, SI);
- TF (*floatditf) (CGEN_FPU*, DI);
- TF (*ufloatsitf) (CGEN_FPU*, USI);
- TF (*ufloatditf) (CGEN_FPU*, UDI);
-
- SI (*fixtfsi) (CGEN_FPU*, TF);
- DI (*fixtfdi) (CGEN_FPU*, TF);
- USI (*ufixtfsi) (CGEN_FPU*, TF);
- UDI (*ufixtfdi) (CGEN_FPU*, TF);
-
-};
-
-extern void cgen_init_accurate_fpu (SIM_CPU*, CGEN_FPU*, CGEN_FPU_ERROR_FN*);
-
-BI cgen_sf_snan_p (CGEN_FPU*, SF);
-BI cgen_df_snan_p (CGEN_FPU*, DF);
-
-/* no-op fp error handler */
-extern CGEN_FPU_ERROR_FN cgen_fpu_ignore_errors;
-
-#endif /* CGEN_FPU_H */
diff --git a/sim/common/cgen-mem.h b/sim/common/cgen-mem.h
deleted file mode 100644
index 186adc6d600..00000000000
--- a/sim/common/cgen-mem.h
+++ /dev/null
@@ -1,229 +0,0 @@
-/* Memory ops header for CGEN-based simulators.
- Copyright (C) 1996, 1997, 1998, 1999 Free Software Foundation, Inc.
- Contributed by Cygnus Solutions.
-
-This file is part of the GNU Simulators.
-
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License along
-with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
-
-#ifndef CGEN_MEM_H
-#define CGEN_MEM_H
-
-#ifdef MEMOPS_DEFINE_INLINE
-#define MEMOPS_INLINE
-#else
-#define MEMOPS_INLINE extern inline
-#endif
-
-/* Integer memory read support.
-
- There is no floating point support. In this context there are no
- floating point modes, only floating point operations (whose arguments
- and results are arrays of bits that we treat as integer modes). */
-
-#if defined (__GNUC__) || defined (MEMOPS_DEFINE_INLINE)
-#define DECLARE_GETMEM(mode, size) \
-MEMOPS_INLINE mode \
-XCONCAT2 (GETMEM,mode) (SIM_CPU *cpu, IADDR pc, ADDR a) \
-{ \
- PROFILE_COUNT_READ (cpu, a, XCONCAT2 (MODE_,mode)); \
- /* Don't read anything into "unaligned" here. Bad name choice. */\
- return XCONCAT2 (sim_core_read_unaligned_,size) (cpu, pc, read_map, a); \
-}
-#else
-#define DECLARE_GETMEM(mode, size) \
-extern mode XCONCAT2 (GETMEM,mode) (SIM_CPU *, IADDR, ADDR);
-#endif
-
-DECLARE_GETMEM (QI, 1) /* TAGS: GETMEMQI */
-DECLARE_GETMEM (UQI, 1) /* TAGS: GETMEMUQI */
-DECLARE_GETMEM (HI, 2) /* TAGS: GETMEMHI */
-DECLARE_GETMEM (UHI, 2) /* TAGS: GETMEMUHI */
-DECLARE_GETMEM (SI, 4) /* TAGS: GETMEMSI */
-DECLARE_GETMEM (USI, 4) /* TAGS: GETMEMUSI */
-DECLARE_GETMEM (DI, 8) /* TAGS: GETMEMDI */
-DECLARE_GETMEM (UDI, 8) /* TAGS: GETMEMUDI */
-
-#undef DECLARE_GETMEM
-
-/* Integer memory write support. */
-
-#if defined (__GNUC__) || defined (MEMOPS_DEFINE_INLINE)
-#define DECLARE_SETMEM(mode, size) \
-MEMOPS_INLINE void \
-XCONCAT2 (SETMEM,mode) (SIM_CPU *cpu, IADDR pc, ADDR a, mode val) \
-{ \
- PROFILE_COUNT_WRITE (cpu, a, XCONCAT2 (MODE_,mode)); \
- /* Don't read anything into "unaligned" here. Bad name choice. */ \
- XCONCAT2 (sim_core_write_unaligned_,size) (cpu, pc, write_map, a, val); \
-}
-#else
-#define DECLARE_SETMEM(mode, size) \
-extern void XCONCAT2 (SETMEM,mode) (SIM_CPU *, IADDR, ADDR, mode);
-#endif
-
-DECLARE_SETMEM (QI, 1) /* TAGS: SETMEMQI */
-DECLARE_SETMEM (UQI, 1) /* TAGS: SETMEMUQI */
-DECLARE_SETMEM (HI, 2) /* TAGS: SETMEMHI */
-DECLARE_SETMEM (UHI, 2) /* TAGS: SETMEMUHI */
-DECLARE_SETMEM (SI, 4) /* TAGS: SETMEMSI */
-DECLARE_SETMEM (USI, 4) /* TAGS: SETMEMUSI */
-DECLARE_SETMEM (DI, 8) /* TAGS: SETMEMDI */
-DECLARE_SETMEM (UDI, 8) /* TAGS: SETMEMUDI */
-
-#undef DECLARE_SETMEM
-
-/* Instruction read support. */
-
-#if defined (__GNUC__) || defined (MEMOPS_DEFINE_INLINE)
-#define DECLARE_GETIMEM(mode, size) \
-MEMOPS_INLINE mode \
-XCONCAT2 (GETIMEM,mode) (SIM_CPU *cpu, IADDR a) \
-{ \
- /*PROFILE_COUNT_READ (cpu, a, XCONCAT2 (MODE_,mode));*/ \
- /* Don't read anything into "unaligned" here. Bad name choice. */\
- return XCONCAT2 (sim_core_read_unaligned_,size) (cpu, a, exec_map, a); \
-}
-#else
-#define DECLARE_GETIMEM(mode, size) \
-extern mode XCONCAT2 (GETIMEM,mode) (SIM_CPU *, ADDR);
-#endif
-
-DECLARE_GETIMEM (UQI, 1) /* TAGS: GETIMEMUQI */
-DECLARE_GETIMEM (UHI, 2) /* TAGS: GETIMEMUHI */
-DECLARE_GETIMEM (USI, 4) /* TAGS: GETIMEMUSI */
-DECLARE_GETIMEM (UDI, 8) /* TAGS: GETIMEMUDI */
-
-#undef DECLARE_GETIMEM
-
-/* Floating point support.
-
- ??? One can specify that the integer memory ops should be used instead,
- and treat fp values as just a series of bits. One might even bubble
- that notion up into the description language. However, that departs from
- gcc. One could cross over from gcc's notion and a "series of bits" notion
- between there and here, and thus still not require these routines. However,
- that's a complication of its own (not that having these fns isn't).
- But for now, we do things this way. */
-
-#if defined (__GNUC__) || defined (MEMOPS_DEFINE_INLINE)
-#define DECLARE_GETMEM(mode, size) \
-MEMOPS_INLINE mode \
-XCONCAT2 (GETMEM,mode) (SIM_CPU *cpu, IADDR pc, ADDR a) \
-{ \
- PROFILE_COUNT_READ (cpu, a, XCONCAT2 (MODE_,mode)); \
- /* Don't read anything into "unaligned" here. Bad name choice. */\
- return XCONCAT2 (sim_core_read_unaligned_,size) (cpu, pc, read_map, a); \
-}
-#else
-#define DECLARE_GETMEM(mode, size) \
-extern mode XCONCAT2 (GETMEM,mode) (SIM_CPU *, IADDR, ADDR);
-#endif
-
-DECLARE_GETMEM (SF, 4) /* TAGS: GETMEMSF */
-DECLARE_GETMEM (DF, 8) /* TAGS: GETMEMDF */
-
-#undef DECLARE_GETMEM
-
-#if defined (__GNUC__) || defined (MEMOPS_DEFINE_INLINE)
-#define DECLARE_SETMEM(mode, size) \
-MEMOPS_INLINE void \
-XCONCAT2 (SETMEM,mode) (SIM_CPU *cpu, IADDR pc, ADDR a, mode val) \
-{ \
- PROFILE_COUNT_WRITE (cpu, a, XCONCAT2 (MODE_,mode)); \
- /* Don't read anything into "unaligned" here. Bad name choice. */ \
- XCONCAT2 (sim_core_write_unaligned_,size) (cpu, pc, write_map, a, val); \
-}
-#else
-#define DECLARE_SETMEM(mode, size) \
-extern void XCONCAT2 (SETMEM,mode) (SIM_CPU *, IADDR, ADDR, mode);
-#endif
-
-DECLARE_SETMEM (SF, 4) /* TAGS: SETMEMSF */
-DECLARE_SETMEM (DF, 8) /* TAGS: SETMEMDF */
-
-#undef DECLARE_SETMEM
-
-/* GETT<mode>: translate target value at P to host value.
- This needn't be very efficient (i.e. can call memcpy) as this is
- only used when interfacing with the outside world (e.g. gdb). */
-
-#if defined (__GNUC__) || defined (MEMOPS_DEFINE_INLINE)
-#define DECLARE_GETT(mode, size) \
-MEMOPS_INLINE mode \
-XCONCAT2 (GETT,mode) (unsigned char *p) \
-{ \
- mode tmp; \
- memcpy (&tmp, p, sizeof (mode)); \
- return XCONCAT2 (T2H_,size) (tmp); \
-}
-#else
-#define DECLARE_GETT(mode, size) \
-extern mode XCONCAT2 (GETT,mode) (unsigned char *);
-#endif
-
-DECLARE_GETT (QI, 1) /* TAGS: GETTQI */
-DECLARE_GETT (UQI, 1) /* TAGS: GETTUQI */
-DECLARE_GETT (HI, 2) /* TAGS: GETTHI */
-DECLARE_GETT (UHI, 2) /* TAGS: GETTUHI */
-DECLARE_GETT (SI, 4) /* TAGS: GETTSI */
-DECLARE_GETT (USI, 4) /* TAGS: GETTUSI */
-DECLARE_GETT (DI, 8) /* TAGS: GETTDI */
-DECLARE_GETT (UDI, 8) /* TAGS: GETTUDI */
-
-#if 0 /* ??? defered until necessary */
-DECLARE_GETT (SF, 4) /* TAGS: GETTSF */
-DECLARE_GETT (DF, 8) /* TAGS: GETTDF */
-DECLARE_GETT (TF, 16) /* TAGS: GETTTF */
-#endif
-
-#undef DECLARE_GETT
-
-/* SETT<mode>: translate host value to target value and store at P.
- This needn't be very efficient (i.e. can call memcpy) as this is
- only used when interfacing with the outside world (e.g. gdb). */
-
-#if defined (__GNUC__) || defined (MEMOPS_DEFINE_INLINE)
-#define DECLARE_SETT(mode, size) \
-MEMOPS_INLINE void \
-XCONCAT2 (SETT,mode) (unsigned char *buf, mode val) \
-{ \
- mode tmp; \
- tmp = XCONCAT2 (H2T_,size) (val); \
- memcpy (buf, &tmp, sizeof (mode)); \
-}
-#else
-#define DECLARE_SETT(mode, size) \
-extern mode XCONCAT2 (GETT,mode) (unsigned char *, mode);
-#endif
-
-DECLARE_SETT (QI, 1) /* TAGS: SETTQI */
-DECLARE_SETT (UQI, 1) /* TAGS: SETTUQI */
-DECLARE_SETT (HI, 2) /* TAGS: SETTHI */
-DECLARE_SETT (UHI, 2) /* TAGS: SETTUHI */
-DECLARE_SETT (SI, 4) /* TAGS: SETTSI */
-DECLARE_SETT (USI, 4) /* TAGS: SETTUSI */
-DECLARE_SETT (DI, 8) /* TAGS: SETTDI */
-DECLARE_SETT (UDI, 8) /* TAGS: SETTUDI */
-
-#if 0 /* ??? defered until necessary */
-DECLARE_SETT (SF, 4) /* TAGS: SETTSF */
-DECLARE_SETT (DF, 8) /* TAGS: SETTDF */
-DECLARE_SETT (TF, 16) /* TAGS: SETTTF */
-#endif
-
-#undef DECLARE_SETT
-
-#endif /* CGEN_MEM_H */
diff --git a/sim/common/cgen-ops.h b/sim/common/cgen-ops.h
deleted file mode 100644
index 2ce1b12d9dc..00000000000
--- a/sim/common/cgen-ops.h
+++ /dev/null
@@ -1,601 +0,0 @@
-/* Semantics ops support for CGEN-based simulators.
- Copyright (C) 1996, 1997, 1998, 1999 Free Software Foundation, Inc.
- Contributed by Cygnus Solutions.
-
-This file is part of the GNU Simulators.
-
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License along
-with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
-*/
-
-#ifndef CGEN_SEM_OPS_H
-#define CGEN_SEM_OPS_H
-
-#include <assert.h>
-
-#if defined (__GNUC__) && ! defined (SEMOPS_DEFINE_INLINE)
-#define SEMOPS_DEFINE_INLINE
-#define SEMOPS_INLINE extern inline
-#else
-#define SEMOPS_INLINE
-#endif
-
-/* Semantic operations.
- At one point this file was machine generated. Maybe it will be again. */
-
-/* TODO: Lazy encoding/decoding of fp values. */
-
-/* These don't really have a mode. */
-#define ANDIF(x, y) ((x) && (y))
-#define ORIF(x, y) ((x) || (y))
-
-#define SUBBI(x, y) ((x) - (y))
-#define ANDBI(x, y) ((x) & (y))
-#define ORBI(x, y) ((x) | (y))
-#define XORBI(x, y) ((x) ^ (y))
-#define NEGBI(x) (- (x))
-#define NOTBI(x) (! (BI) (x))
-#define INVBI(x) (~ (x))
-#define EQBI(x, y) ((BI) (x) == (BI) (y))
-#define NEBI(x, y) ((BI) (x) != (BI) (y))
-#define LTBI(x, y) ((BI) (x) < (BI) (y))
-#define LEBI(x, y) ((BI) (x) <= (BI) (y))
-#define GTBI(x, y) ((BI) (x) > (BI) (y))
-#define GEBI(x, y) ((BI) (x) >= (BI) (y))
-#define LTUBI(x, y) ((BI) (x) < (BI) (y))
-#define LEUBI(x, y) ((BI) (x) <= (BI) (y))
-#define GTUBI(x, y) ((BI) (x) > (BI) (y))
-#define GEUBI(x, y) ((BI) (x) >= (BI) (y))
-
-#define ADDQI(x, y) ((x) + (y))
-#define SUBQI(x, y) ((x) - (y))
-#define MULQI(x, y) ((x) * (y))
-#define DIVQI(x, y) ((QI) (x) / (QI) (y))
-#define UDIVQI(x, y) ((UQI) (x) / (UQI) (y))
-#define MODQI(x, y) ((QI) (x) % (QI) (y))
-#define UMODQI(x, y) ((UQI) (x) % (UQI) (y))
-#define SRAQI(x, y) ((QI) (x) >> (y))
-#define SRLQI(x, y) ((UQI) (x) >> (y))
-#define SLLQI(x, y) ((UQI) (x) << (y))
-extern QI RORQI (QI, int);
-extern QI ROLQI (QI, int);
-#define ANDQI(x, y) ((x) & (y))
-#define ORQI(x, y) ((x) | (y))
-#define XORQI(x, y) ((x) ^ (y))
-#define NEGQI(x) (- (x))
-#define NOTQI(x) (! (QI) (x))
-#define INVQI(x) (~ (x))
-#define ABSQI(x) ((x) < 0 ? -(x) : (x))
-#define EQQI(x, y) ((QI) (x) == (QI) (y))
-#define NEQI(x, y) ((QI) (x) != (QI) (y))
-#define LTQI(x, y) ((QI) (x) < (QI) (y))
-#define LEQI(x, y) ((QI) (x) <= (QI) (y))
-#define GTQI(x, y) ((QI) (x) > (QI) (y))
-#define GEQI(x, y) ((QI) (x) >= (QI) (y))
-#define LTUQI(x, y) ((UQI) (x) < (UQI) (y))
-#define LEUQI(x, y) ((UQI) (x) <= (UQI) (y))
-#define GTUQI(x, y) ((UQI) (x) > (UQI) (y))
-#define GEUQI(x, y) ((UQI) (x) >= (UQI) (y))
-
-#define ADDHI(x, y) ((x) + (y))
-#define SUBHI(x, y) ((x) - (y))
-#define MULHI(x, y) ((x) * (y))
-#define DIVHI(x, y) ((HI) (x) / (HI) (y))
-#define UDIVHI(x, y) ((UHI) (x) / (UHI) (y))
-#define MODHI(x, y) ((HI) (x) % (HI) (y))
-#define UMODHI(x, y) ((UHI) (x) % (UHI) (y))
-#define SRAHI(x, y) ((HI) (x) >> (y))
-#define SRLHI(x, y) ((UHI) (x) >> (y))
-#define SLLHI(x, y) ((UHI) (x) << (y))
-extern HI RORHI (HI, int);
-extern HI ROLHI (HI, int);
-#define ANDHI(x, y) ((x) & (y))
-#define ORHI(x, y) ((x) | (y))
-#define XORHI(x, y) ((x) ^ (y))
-#define NEGHI(x) (- (x))
-#define NOTHI(x) (! (HI) (x))
-#define INVHI(x) (~ (x))
-#define ABSHI(x) ((x) < 0 ? -(x) : (x))
-#define EQHI(x, y) ((HI) (x) == (HI) (y))
-#define NEHI(x, y) ((HI) (x) != (HI) (y))
-#define LTHI(x, y) ((HI) (x) < (HI) (y))
-#define LEHI(x, y) ((HI) (x) <= (HI) (y))
-#define GTHI(x, y) ((HI) (x) > (HI) (y))
-#define GEHI(x, y) ((HI) (x) >= (HI) (y))
-#define LTUHI(x, y) ((UHI) (x) < (UHI) (y))
-#define LEUHI(x, y) ((UHI) (x) <= (UHI) (y))
-#define GTUHI(x, y) ((UHI) (x) > (UHI) (y))
-#define GEUHI(x, y) ((UHI) (x) >= (UHI) (y))
-
-#define ADDSI(x, y) ((x) + (y))
-#define SUBSI(x, y) ((x) - (y))
-#define MULSI(x, y) ((x) * (y))
-#define DIVSI(x, y) ((SI) (x) / (SI) (y))
-#define UDIVSI(x, y) ((USI) (x) / (USI) (y))
-#define MODSI(x, y) ((SI) (x) % (SI) (y))
-#define UMODSI(x, y) ((USI) (x) % (USI) (y))
-#define SRASI(x, y) ((SI) (x) >> (y))
-#define SRLSI(x, y) ((USI) (x) >> (y))
-#define SLLSI(x, y) ((USI) (x) << (y))
-extern SI RORSI (SI, int);
-extern SI ROLSI (SI, int);
-#define ANDSI(x, y) ((x) & (y))
-#define ORSI(x, y) ((x) | (y))
-#define XORSI(x, y) ((x) ^ (y))
-#define NEGSI(x) (- (x))
-#define NOTSI(x) (! (SI) (x))
-#define INVSI(x) (~ (x))
-#define ABSSI(x) ((x) < 0 ? -(x) : (x))
-#define EQSI(x, y) ((SI) (x) == (SI) (y))
-#define NESI(x, y) ((SI) (x) != (SI) (y))
-#define LTSI(x, y) ((SI) (x) < (SI) (y))
-#define LESI(x, y) ((SI) (x) <= (SI) (y))
-#define GTSI(x, y) ((SI) (x) > (SI) (y))
-#define GESI(x, y) ((SI) (x) >= (SI) (y))
-#define LTUSI(x, y) ((USI) (x) < (USI) (y))
-#define LEUSI(x, y) ((USI) (x) <= (USI) (y))
-#define GTUSI(x, y) ((USI) (x) > (USI) (y))
-#define GEUSI(x, y) ((USI) (x) >= (USI) (y))
-
-#ifdef DI_FN_SUPPORT
-extern DI ADDDI (DI, DI);
-extern DI SUBDI (DI, DI);
-extern DI MULDI (DI, DI);
-extern DI DIVDI (DI, DI);
-extern DI UDIVDI (DI, DI);
-extern DI MODDI (DI, DI);
-extern DI UMODDI (DI, DI);
-extern DI SRADI (DI, int);
-extern UDI SRLDI (UDI, int);
-extern UDI SLLDI (UDI, int);
-extern DI RORDI (DI, int);
-extern DI ROLDI (DI, int);
-extern DI ANDDI (DI, DI);
-extern DI ORDI (DI, DI);
-extern DI XORDI (DI, DI);
-extern DI NEGDI (DI);
-extern int NOTDI (DI);
-extern DI INVDI (DI);
-extern int EQDI (DI, DI);
-extern int NEDI (DI, DI);
-extern int LTDI (DI, DI);
-extern int LEDI (DI, DI);
-extern int GTDI (DI, DI);
-extern int GEDI (DI, DI);
-extern int LTUDI (UDI, UDI);
-extern int LEUDI (UDI, UDI);
-extern int GTUDI (UDI, UDI);
-extern int GEUDI (UDI, UDI);
-#else /* ! DI_FN_SUPPORT */
-#define ADDDI(x, y) ((x) + (y))
-#define SUBDI(x, y) ((x) - (y))
-#define MULDI(x, y) ((x) * (y))
-#define DIVDI(x, y) ((DI) (x) / (DI) (y))
-#define UDIVDI(x, y) ((UDI) (x) / (UDI) (y))
-#define MODDI(x, y) ((DI) (x) % (DI) (y))
-#define UMODDI(x, y) ((UDI) (x) % (UDI) (y))
-#define SRADI(x, y) ((DI) (x) >> (y))
-#define SRLDI(x, y) ((UDI) (x) >> (y))
-#define SLLDI(x, y) ((UDI) (x) << (y))
-extern DI RORDI (DI, int);
-extern DI ROLDI (DI, int);
-#define ANDDI(x, y) ((x) & (y))
-#define ORDI(x, y) ((x) | (y))
-#define XORDI(x, y) ((x) ^ (y))
-#define NEGDI(x) (- (x))
-#define NOTDI(x) (! (DI) (x))
-#define INVDI(x) (~ (x))
-#define ABSDI(x) ((x) < 0 ? -(x) : (x))
-#define EQDI(x, y) ((DI) (x) == (DI) (y))
-#define NEDI(x, y) ((DI) (x) != (DI) (y))
-#define LTDI(x, y) ((DI) (x) < (DI) (y))
-#define LEDI(x, y) ((DI) (x) <= (DI) (y))
-#define GTDI(x, y) ((DI) (x) > (DI) (y))
-#define GEDI(x, y) ((DI) (x) >= (DI) (y))
-#define LTUDI(x, y) ((UDI) (x) < (UDI) (y))
-#define LEUDI(x, y) ((UDI) (x) <= (UDI) (y))
-#define GTUDI(x, y) ((UDI) (x) > (UDI) (y))
-#define GEUDI(x, y) ((UDI) (x) >= (UDI) (y))
-#endif /* DI_FN_SUPPORT */
-
-#define EXTBIQI(x) ((QI) (BI) (x))
-#define EXTBIHI(x) ((HI) (BI) (x))
-#define EXTBISI(x) ((SI) (BI) (x))
-#if defined (DI_FN_SUPPORT)
-extern DI EXTBIDI (BI);
-#else
-#define EXTBIDI(x) ((DI) (BI) (x))
-#endif
-#define EXTQIHI(x) ((HI) (QI) (x))
-#define EXTQISI(x) ((SI) (QI) (x))
-#if defined (DI_FN_SUPPORT)
-extern DI EXTQIDI (QI);
-#else
-#define EXTQIDI(x) ((DI) (QI) (x))
-#endif
-#define EXTHIHI(x) ((HI) (HI) (x))
-#define EXTHISI(x) ((SI) (HI) (x))
-#define EXTSISI(x) ((SI) (SI) (x))
-#if defined (DI_FN_SUPPORT)
-extern DI EXTHIDI (HI);
-#else
-#define EXTHIDI(x) ((DI) (HI) (x))
-#endif
-#if defined (DI_FN_SUPPORT)
-extern DI EXTSIDI (SI);
-#else
-#define EXTSIDI(x) ((DI) (SI) (x))
-#endif
-
-#define ZEXTBIQI(x) ((QI) (BI) (x))
-#define ZEXTBIHI(x) ((HI) (BI) (x))
-#define ZEXTBISI(x) ((SI) (BI) (x))
-#if defined (DI_FN_SUPPORT)
-extern DI ZEXTBIDI (BI);
-#else
-#define ZEXTBIDI(x) ((DI) (BI) (x))
-#endif
-#define ZEXTQIHI(x) ((HI) (UQI) (x))
-#define ZEXTQISI(x) ((SI) (UQI) (x))
-#if defined (DI_FN_SUPPORT)
-extern DI ZEXTQIDI (QI);
-#else
-#define ZEXTQIDI(x) ((DI) (UQI) (x))
-#endif
-#define ZEXTHISI(x) ((SI) (UHI) (x))
-#define ZEXTHIHI(x) ((HI) (UHI) (x))
-#define ZEXTSISI(x) ((SI) (USI) (x))
-#if defined (DI_FN_SUPPORT)
-extern DI ZEXTHIDI (HI);
-#else
-#define ZEXTHIDI(x) ((DI) (UHI) (x))
-#endif
-#if defined (DI_FN_SUPPORT)
-extern DI ZEXTSIDI (SI);
-#else
-#define ZEXTSIDI(x) ((DI) (USI) (x))
-#endif
-
-#define TRUNCQIBI(x) ((BI) (QI) (x))
-#define TRUNCHIBI(x) ((BI) (HI) (x))
-#define TRUNCHIQI(x) ((QI) (HI) (x))
-#define TRUNCSIBI(x) ((BI) (SI) (x))
-#define TRUNCSIQI(x) ((QI) (SI) (x))
-#define TRUNCSIHI(x) ((HI) (SI) (x))
-#define TRUNCSISI(x) ((SI) (SI) (x))
-#if defined (DI_FN_SUPPORT)
-extern BI TRUNCDIBI (DI);
-#else
-#define TRUNCDIBI(x) ((BI) (DI) (x))
-#endif
-#if defined (DI_FN_SUPPORT)
-extern QI TRUNCDIQI (DI);
-#else
-#define TRUNCDIQI(x) ((QI) (DI) (x))
-#endif
-#if defined (DI_FN_SUPPORT)
-extern HI TRUNCDIHI (DI);
-#else
-#define TRUNCDIHI(x) ((HI) (DI) (x))
-#endif
-#if defined (DI_FN_SUPPORT)
-extern SI TRUNCDISI (DI);
-#else
-#define TRUNCDISI(x) ((SI) (DI) (x))
-#endif
-
-/* Composing/decomposing the various types.
- Word ordering is endian-independent. Words are specified most to least
- significant and word number 0 is the most significant word.
- ??? May also wish an endian-dependent version. Later. */
-
-#ifdef SEMOPS_DEFINE_INLINE
-
-SEMOPS_INLINE SF
-SUBWORDSISF (SI in)
-{
- union { SI in; SF out; } x;
- x.in = in;
- return x.out;
-}
-
-SEMOPS_INLINE DF
-SUBWORDDIDF (DI in)
-{
- union { DI in; DF out; } x;
- x.in = in;
- return x.out;
-}
-
-SEMOPS_INLINE QI
-SUBWORDSIQI (SI in, int byte)
-{
- assert (byte >= 0 && byte <= 3);
- return (UQI) (in >> (8 * (3 - byte))) & 0xFF;
-}
-
-SEMOPS_INLINE UQI
-SUBWORDSIUQI (SI in, int byte)
-{
- assert (byte >= 0 && byte <= 3);
- return (UQI) (in >> (8 * (3 - byte))) & 0xFF;
-}
-
-SEMOPS_INLINE QI
-SUBWORDDIQI (DI in, int byte)
-{
- assert (byte >= 0 && byte <= 7);
- return (UQI) (in >> (8 * (7 - byte))) & 0xFF;
-}
-
-SEMOPS_INLINE HI
-SUBWORDDIHI (DI in, int word)
-{
- assert (word >= 0 && word <= 3);
- return (UHI) (in >> (16 * (3 - word))) & 0xFFFF;
-}
-
-SEMOPS_INLINE HI
-SUBWORDSIHI (SI in, int word)
-{
- if (word == 0)
- return (USI) in >> 16;
- else
- return in;
-}
-
-SEMOPS_INLINE SI
-SUBWORDSFSI (SF in)
-{
- union { SF in; SI out; } x;
- x.in = in;
- return x.out;
-}
-
-SEMOPS_INLINE DI
-SUBWORDDFDI (DF in)
-{
- union { DF in; DI out; } x;
- x.in = in;
- return x.out;
-}
-
-SEMOPS_INLINE UQI
-SUBWORDDIUQI (DI in, int byte)
-{
- assert (byte >= 0 && byte <= 7);
- return (UQI) (in >> (8 * (7 - byte)));
-}
-
-SEMOPS_INLINE SI
-SUBWORDDISI (DI in, int word)
-{
- if (word == 0)
- return (UDI) in >> 32;
- else
- return in;
-}
-
-SEMOPS_INLINE SI
-SUBWORDDFSI (DF in, int word)
-{
- /* Note: typedef UDI DF; */
- if (word == 0)
- return (UDI) in >> 32;
- else
- return in;
-}
-
-SEMOPS_INLINE SI
-SUBWORDXFSI (XF in, int word)
-{
- /* Note: typedef struct { SI parts[3]; } XF; */
- union { XF in; SI out[3]; } x;
- x.in = in;
- return x.out[word];
-}
-
-SEMOPS_INLINE SI
-SUBWORDTFSI (TF in, int word)
-{
- /* Note: typedef struct { SI parts[4]; } TF; */
- union { TF in; SI out[4]; } x;
- x.in = in;
- return x.out[word];
-}
-
-SEMOPS_INLINE DI
-JOINSIDI (SI x0, SI x1)
-{
- if (CURRENT_TARGET_BYTE_ORDER == BIG_ENDIAN)
- return MAKEDI (x0, x1);
- else
- return MAKEDI (x1, x0);
-}
-
-SEMOPS_INLINE DF
-JOINSIDF (SI x0, SI x1)
-{
- union { SI in[2]; DF out; } x;
- if (CURRENT_TARGET_BYTE_ORDER == BIG_ENDIAN)
- x.in[0] = x0, x.in[1] = x1;
- else
- x.in[1] = x0, x.in[0] = x1;
- return x.out;
-}
-
-SEMOPS_INLINE XF
-JOINSIXF (SI x0, SI x1, SI x2)
-{
- union { SI in[3]; XF out; } x;
- if (CURRENT_TARGET_BYTE_ORDER == BIG_ENDIAN)
- x.in[0] = x0, x.in[1] = x1, x.in[2] = x2;
- else
- x.in[2] = x0, x.in[1] = x1, x.in[0] = x2;
- return x.out;
-}
-
-SEMOPS_INLINE TF
-JOINSITF (SI x0, SI x1, SI x2, SI x3)
-{
- union { SI in[4]; TF out; } x;
- if (CURRENT_TARGET_BYTE_ORDER == BIG_ENDIAN)
- x.in[0] = x0, x.in[1] = x1, x.in[2] = x2, x.in[3] = x3;
- else
- x.in[3] = x0, x.in[2] = x1, x.in[1] = x2, x.in[0] = x3;
- return x.out;
-}
-
-#else
-
-QI SUBWORDSIQI (SI);
-HI SUBWORDSIHI (HI);
-SI SUBWORDSFSI (SF);
-SF SUBWORDSISF (SI);
-DI SUBWORDDFDI (DF);
-DF SUBWORDDIDF (DI);
-QI SUBWORDDIQI (DI, int);
-HI SUBWORDDIHI (DI, int);
-SI SUBWORDDISI (DI, int);
-SI SUBWORDDFSI (DF, int);
-SI SUBWORDXFSI (XF, int);
-SI SUBWORDTFSI (TF, int);
-
-UQI SUBWORDSIUQI (SI);
-UQI SUBWORDDIUQI (DI);
-
-DI JOINSIDI (SI, SI);
-DF JOINSIDF (SI, SI);
-XF JOINSIXF (SI, SI, SI);
-TF JOINSITF (SI, SI, SI, SI);
-
-#endif /* SUBWORD,JOIN */
-
-/* Semantic support utilities. */
-
-#ifdef SEMOPS_DEFINE_INLINE
-
-SEMOPS_INLINE SI
-ADDCSI (SI a, SI b, BI c)
-{
- SI res = ADDSI (a, ADDSI (b, c));
- return res;
-}
-
-SEMOPS_INLINE BI
-ADDCFSI (SI a, SI b, BI c)
-{
- SI tmp = ADDSI (a, ADDSI (b, c));
- BI res = ((USI) tmp < (USI) a) || (c && tmp == a);
- return res;
-}
-
-SEMOPS_INLINE BI
-ADDOFSI (SI a, SI b, BI c)
-{
- SI tmp = ADDSI (a, ADDSI (b, c));
- BI res = (((a < 0) == (b < 0))
- && ((a < 0) != (tmp < 0)));
- return res;
-}
-
-SEMOPS_INLINE SI
-SUBCSI (SI a, SI b, BI c)
-{
- SI res = SUBSI (a, ADDSI (b, c));
- return res;
-}
-
-SEMOPS_INLINE BI
-SUBCFSI (SI a, SI b, BI c)
-{
- BI res = ((USI) a < (USI) b) || (c && a == b);
- return res;
-}
-
-SEMOPS_INLINE BI
-SUBOFSI (SI a, SI b, BI c)
-{
- SI tmp = SUBSI (a, ADDSI (b, c));
- BI res = (((a < 0) != (b < 0))
- && ((a < 0) != (tmp < 0)));
- return res;
-}
-
-SEMOPS_INLINE HI
-ADDCHI (HI a, HI b, BI c)
-{
- HI res = ADDHI (a, ADDHI (b, c));
- return res;
-}
-
-SEMOPS_INLINE BI
-ADDCFHI (HI a, HI b, BI c)
-{
- HI tmp = ADDHI (a, ADDHI (b, c));
- BI res = ((UHI) tmp < (UHI) a) || (c && tmp == a);
- return res;
-}
-
-SEMOPS_INLINE BI
-ADDOFHI (HI a, HI b, BI c)
-{
- HI tmp = ADDHI (a, ADDHI (b, c));
- BI res = (((a < 0) == (b < 0))
- && ((a < 0) != (tmp < 0)));
- return res;
-}
-
-SEMOPS_INLINE HI
-SUBCHI (HI a, HI b, BI c)
-{
- HI res = SUBHI (a, ADDHI (b, c));
- return res;
-}
-
-SEMOPS_INLINE BI
-SUBCFHI (HI a, HI b, BI c)
-{
- BI res = ((UHI) a < (UHI) b) || (c && a == b);
- return res;
-}
-
-SEMOPS_INLINE BI
-SUBOFHI (HI a, HI b, BI c)
-{
- HI tmp = SUBHI (a, ADDHI (b, c));
- BI res = (((a < 0) != (b < 0))
- && ((a < 0) != (tmp < 0)));
- return res;
-}
-
-#else
-
-SI ADDCSI (SI, SI, BI);
-UBI ADDCFSI (SI, SI, BI);
-UBI ADDOFSI (SI, SI, BI);
-SI SUBCSI (SI, SI, BI);
-UBI SUBCFSI (SI, SI, BI);
-UBI SUBOFSI (SI, SI, BI);
-HI ADDCHI (HI, HI, BI);
-UBI ADDCFHI (HI, HI, BI);
-UBI ADDOFHI (HI, HI, BI);
-HI SUBCHI (HI, HI, BI);
-UBI SUBCFHI (HI, HI, BI);
-UBI SUBOFHI (HI, HI, BI);
-
-#endif
-
-#endif /* CGEN_SEM_OPS_H */
diff --git a/sim/common/cgen-par.c b/sim/common/cgen-par.c
deleted file mode 100644
index a47d26cb538..00000000000
--- a/sim/common/cgen-par.c
+++ /dev/null
@@ -1,490 +0,0 @@
-/* Simulator parallel routines for CGEN simulators (and maybe others).
- Copyright (C) 1999, 2000 Free Software Foundation, Inc.
- Contributed by Cygnus Solutions.
-
-This file is part of the GNU instruction set simulator.
-
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License along
-with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
-
-#include "sim-main.h"
-#include "cgen-mem.h"
-#include "cgen-par.h"
-
-/* Functions required by the cgen interface. These functions add various
- kinds of writes to the write queue. */
-void sim_queue_bi_write (SIM_CPU *cpu, BI *target, BI value)
-{
- CGEN_WRITE_QUEUE *q = CPU_WRITE_QUEUE (cpu);
- CGEN_WRITE_QUEUE_ELEMENT *element = CGEN_WRITE_QUEUE_NEXT (q);
- element->kind = CGEN_BI_WRITE;
- element->insn_address = CPU_PC_GET (cpu);
- element->kinds.bi_write.target = target;
- element->kinds.bi_write.value = value;
-}
-
-void sim_queue_qi_write (SIM_CPU *cpu, UQI *target, UQI value)
-{
- CGEN_WRITE_QUEUE *q = CPU_WRITE_QUEUE (cpu);
- CGEN_WRITE_QUEUE_ELEMENT *element = CGEN_WRITE_QUEUE_NEXT (q);
- element->kind = CGEN_QI_WRITE;
- element->insn_address = CPU_PC_GET (cpu);
- element->kinds.qi_write.target = target;
- element->kinds.qi_write.value = value;
-}
-
-void sim_queue_si_write (SIM_CPU *cpu, SI *target, SI value)
-{
- CGEN_WRITE_QUEUE *q = CPU_WRITE_QUEUE (cpu);
- CGEN_WRITE_QUEUE_ELEMENT *element = CGEN_WRITE_QUEUE_NEXT (q);
- element->kind = CGEN_SI_WRITE;
- element->insn_address = CPU_PC_GET (cpu);
- element->kinds.si_write.target = target;
- element->kinds.si_write.value = value;
-}
-
-void sim_queue_sf_write (SIM_CPU *cpu, SI *target, SF value)
-{
- CGEN_WRITE_QUEUE *q = CPU_WRITE_QUEUE (cpu);
- CGEN_WRITE_QUEUE_ELEMENT *element = CGEN_WRITE_QUEUE_NEXT (q);
- element->kind = CGEN_SF_WRITE;
- element->insn_address = CPU_PC_GET (cpu);
- element->kinds.sf_write.target = target;
- element->kinds.sf_write.value = value;
-}
-
-void sim_queue_pc_write (SIM_CPU *cpu, USI value)
-{
- CGEN_WRITE_QUEUE *q = CPU_WRITE_QUEUE (cpu);
- CGEN_WRITE_QUEUE_ELEMENT *element = CGEN_WRITE_QUEUE_NEXT (q);
- element->kind = CGEN_PC_WRITE;
- element->insn_address = CPU_PC_GET (cpu);
- element->kinds.pc_write.value = value;
-}
-
-void sim_queue_fn_hi_write (
- SIM_CPU *cpu,
- void (*write_function)(SIM_CPU *cpu, UINT, UHI),
- UINT regno,
- UHI value
-)
-{
- CGEN_WRITE_QUEUE *q = CPU_WRITE_QUEUE (cpu);
- CGEN_WRITE_QUEUE_ELEMENT *element = CGEN_WRITE_QUEUE_NEXT (q);
- element->kind = CGEN_FN_HI_WRITE;
- element->insn_address = CPU_PC_GET (cpu);
- element->kinds.fn_hi_write.function = write_function;
- element->kinds.fn_hi_write.regno = regno;
- element->kinds.fn_hi_write.value = value;
-}
-
-void sim_queue_fn_si_write (
- SIM_CPU *cpu,
- void (*write_function)(SIM_CPU *cpu, UINT, USI),
- UINT regno,
- USI value
-)
-{
- CGEN_WRITE_QUEUE *q = CPU_WRITE_QUEUE (cpu);
- CGEN_WRITE_QUEUE_ELEMENT *element = CGEN_WRITE_QUEUE_NEXT (q);
- element->kind = CGEN_FN_SI_WRITE;
- element->insn_address = CPU_PC_GET (cpu);
- element->kinds.fn_si_write.function = write_function;
- element->kinds.fn_si_write.regno = regno;
- element->kinds.fn_si_write.value = value;
-}
-
-void sim_queue_fn_sf_write (
- SIM_CPU *cpu,
- void (*write_function)(SIM_CPU *cpu, UINT, SF),
- UINT regno,
- SF value
-)
-{
- CGEN_WRITE_QUEUE *q = CPU_WRITE_QUEUE (cpu);
- CGEN_WRITE_QUEUE_ELEMENT *element = CGEN_WRITE_QUEUE_NEXT (q);
- element->kind = CGEN_FN_SF_WRITE;
- element->insn_address = CPU_PC_GET (cpu);
- element->kinds.fn_sf_write.function = write_function;
- element->kinds.fn_sf_write.regno = regno;
- element->kinds.fn_sf_write.value = value;
-}
-
-void sim_queue_fn_di_write (
- SIM_CPU *cpu,
- void (*write_function)(SIM_CPU *cpu, UINT, DI),
- UINT regno,
- DI value
-)
-{
- CGEN_WRITE_QUEUE *q = CPU_WRITE_QUEUE (cpu);
- CGEN_WRITE_QUEUE_ELEMENT *element = CGEN_WRITE_QUEUE_NEXT (q);
- element->kind = CGEN_FN_DI_WRITE;
- element->insn_address = CPU_PC_GET (cpu);
- element->kinds.fn_di_write.function = write_function;
- element->kinds.fn_di_write.regno = regno;
- element->kinds.fn_di_write.value = value;
-}
-
-void sim_queue_fn_xi_write (
- SIM_CPU *cpu,
- void (*write_function)(SIM_CPU *cpu, UINT, SI *),
- UINT regno,
- SI *value
-)
-{
- CGEN_WRITE_QUEUE *q = CPU_WRITE_QUEUE (cpu);
- CGEN_WRITE_QUEUE_ELEMENT *element = CGEN_WRITE_QUEUE_NEXT (q);
- element->kind = CGEN_FN_XI_WRITE;
- element->insn_address = CPU_PC_GET (cpu);
- element->kinds.fn_xi_write.function = write_function;
- element->kinds.fn_xi_write.regno = regno;
- element->kinds.fn_xi_write.value[0] = value[0];
- element->kinds.fn_xi_write.value[1] = value[1];
- element->kinds.fn_xi_write.value[2] = value[2];
- element->kinds.fn_xi_write.value[3] = value[3];
-}
-
-void sim_queue_fn_df_write (
- SIM_CPU *cpu,
- void (*write_function)(SIM_CPU *cpu, UINT, DF),
- UINT regno,
- DF value
-)
-{
- CGEN_WRITE_QUEUE *q = CPU_WRITE_QUEUE (cpu);
- CGEN_WRITE_QUEUE_ELEMENT *element = CGEN_WRITE_QUEUE_NEXT (q);
- element->kind = CGEN_FN_DF_WRITE;
- element->insn_address = CPU_PC_GET (cpu);
- element->kinds.fn_df_write.function = write_function;
- element->kinds.fn_df_write.regno = regno;
- element->kinds.fn_df_write.value = value;
-}
-
-void sim_queue_fn_pc_write (
- SIM_CPU *cpu,
- void (*write_function)(SIM_CPU *cpu, USI),
- USI value
-)
-{
- CGEN_WRITE_QUEUE *q = CPU_WRITE_QUEUE (cpu);
- CGEN_WRITE_QUEUE_ELEMENT *element = CGEN_WRITE_QUEUE_NEXT (q);
- element->kind = CGEN_FN_PC_WRITE;
- element->insn_address = CPU_PC_GET (cpu);
- element->kinds.fn_pc_write.function = write_function;
- element->kinds.fn_pc_write.value = value;
-}
-
-void sim_queue_mem_qi_write (SIM_CPU *cpu, SI address, QI value)
-{
- CGEN_WRITE_QUEUE *q = CPU_WRITE_QUEUE (cpu);
- CGEN_WRITE_QUEUE_ELEMENT *element = CGEN_WRITE_QUEUE_NEXT (q);
- element->kind = CGEN_MEM_QI_WRITE;
- element->insn_address = CPU_PC_GET (cpu);
- element->kinds.mem_qi_write.address = address;
- element->kinds.mem_qi_write.value = value;
-}
-
-void sim_queue_mem_hi_write (SIM_CPU *cpu, SI address, HI value)
-{
- CGEN_WRITE_QUEUE *q = CPU_WRITE_QUEUE (cpu);
- CGEN_WRITE_QUEUE_ELEMENT *element = CGEN_WRITE_QUEUE_NEXT (q);
- element->kind = CGEN_MEM_HI_WRITE;
- element->insn_address = CPU_PC_GET (cpu);
- element->kinds.mem_hi_write.address = address;
- element->kinds.mem_hi_write.value = value;
-}
-
-void sim_queue_mem_si_write (SIM_CPU *cpu, SI address, SI value)
-{
- CGEN_WRITE_QUEUE *q = CPU_WRITE_QUEUE (cpu);
- CGEN_WRITE_QUEUE_ELEMENT *element = CGEN_WRITE_QUEUE_NEXT (q);
- element->kind = CGEN_MEM_SI_WRITE;
- element->insn_address = CPU_PC_GET (cpu);
- element->kinds.mem_si_write.address = address;
- element->kinds.mem_si_write.value = value;
-}
-
-void sim_queue_mem_di_write (SIM_CPU *cpu, SI address, DI value)
-{
- CGEN_WRITE_QUEUE *q = CPU_WRITE_QUEUE (cpu);
- CGEN_WRITE_QUEUE_ELEMENT *element = CGEN_WRITE_QUEUE_NEXT (q);
- element->kind = CGEN_MEM_DI_WRITE;
- element->insn_address = CPU_PC_GET (cpu);
- element->kinds.mem_di_write.address = address;
- element->kinds.mem_di_write.value = value;
-}
-
-void sim_queue_mem_df_write (SIM_CPU *cpu, SI address, DF value)
-{
- CGEN_WRITE_QUEUE *q = CPU_WRITE_QUEUE (cpu);
- CGEN_WRITE_QUEUE_ELEMENT *element = CGEN_WRITE_QUEUE_NEXT (q);
- element->kind = CGEN_MEM_DF_WRITE;
- element->insn_address = CPU_PC_GET (cpu);
- element->kinds.mem_df_write.address = address;
- element->kinds.mem_df_write.value = value;
-}
-
-void sim_queue_mem_xi_write (SIM_CPU *cpu, SI address, SI *value)
-{
- CGEN_WRITE_QUEUE *q = CPU_WRITE_QUEUE (cpu);
- CGEN_WRITE_QUEUE_ELEMENT *element = CGEN_WRITE_QUEUE_NEXT (q);
- element->kind = CGEN_MEM_XI_WRITE;
- element->insn_address = CPU_PC_GET (cpu);
- element->kinds.mem_xi_write.address = address;
- element->kinds.mem_xi_write.value[0] = value[0];
- element->kinds.mem_xi_write.value[1] = value[1];
- element->kinds.mem_xi_write.value[2] = value[2];
- element->kinds.mem_xi_write.value[3] = value[3];
-}
-
-void sim_queue_fn_mem_qi_write (
- SIM_CPU *cpu,
- void (*write_function)(SIM_CPU *cpu, IADDR, SI, QI),
- SI address,
- QI value
-)
-{
- CGEN_WRITE_QUEUE *q = CPU_WRITE_QUEUE (cpu);
- CGEN_WRITE_QUEUE_ELEMENT *element = CGEN_WRITE_QUEUE_NEXT (q);
- element->kind = CGEN_FN_MEM_QI_WRITE;
- element->insn_address = CPU_PC_GET (cpu);
- element->kinds.fn_mem_qi_write.function = write_function;
- element->kinds.fn_mem_qi_write.address = address;
- element->kinds.fn_mem_qi_write.value = value;
-}
-
-void sim_queue_fn_mem_hi_write (
- SIM_CPU *cpu,
- void (*write_function)(SIM_CPU *cpu, IADDR, SI, HI),
- SI address,
- HI value
-)
-{
- CGEN_WRITE_QUEUE *q = CPU_WRITE_QUEUE (cpu);
- CGEN_WRITE_QUEUE_ELEMENT *element = CGEN_WRITE_QUEUE_NEXT (q);
- element->kind = CGEN_FN_MEM_HI_WRITE;
- element->insn_address = CPU_PC_GET (cpu);
- element->kinds.fn_mem_hi_write.function = write_function;
- element->kinds.fn_mem_hi_write.address = address;
- element->kinds.fn_mem_hi_write.value = value;
-}
-
-void sim_queue_fn_mem_si_write (
- SIM_CPU *cpu,
- void (*write_function)(SIM_CPU *cpu, IADDR, SI, SI),
- SI address,
- SI value
-)
-{
- CGEN_WRITE_QUEUE *q = CPU_WRITE_QUEUE (cpu);
- CGEN_WRITE_QUEUE_ELEMENT *element = CGEN_WRITE_QUEUE_NEXT (q);
- element->kind = CGEN_FN_MEM_SI_WRITE;
- element->insn_address = CPU_PC_GET (cpu);
- element->kinds.fn_mem_si_write.function = write_function;
- element->kinds.fn_mem_si_write.address = address;
- element->kinds.fn_mem_si_write.value = value;
-}
-
-void sim_queue_fn_mem_di_write (
- SIM_CPU *cpu,
- void (*write_function)(SIM_CPU *cpu, IADDR, SI, DI),
- SI address,
- DI value
-)
-{
- CGEN_WRITE_QUEUE *q = CPU_WRITE_QUEUE (cpu);
- CGEN_WRITE_QUEUE_ELEMENT *element = CGEN_WRITE_QUEUE_NEXT (q);
- element->kind = CGEN_FN_MEM_DI_WRITE;
- element->insn_address = CPU_PC_GET (cpu);
- element->kinds.fn_mem_di_write.function = write_function;
- element->kinds.fn_mem_di_write.address = address;
- element->kinds.fn_mem_di_write.value = value;
-}
-
-void sim_queue_fn_mem_df_write (
- SIM_CPU *cpu,
- void (*write_function)(SIM_CPU *cpu, IADDR, SI, DF),
- SI address,
- DF value
-)
-{
- CGEN_WRITE_QUEUE *q = CPU_WRITE_QUEUE (cpu);
- CGEN_WRITE_QUEUE_ELEMENT *element = CGEN_WRITE_QUEUE_NEXT (q);
- element->kind = CGEN_FN_MEM_DF_WRITE;
- element->insn_address = CPU_PC_GET (cpu);
- element->kinds.fn_mem_df_write.function = write_function;
- element->kinds.fn_mem_df_write.address = address;
- element->kinds.fn_mem_df_write.value = value;
-}
-
-void sim_queue_fn_mem_xi_write (
- SIM_CPU *cpu,
- void (*write_function)(SIM_CPU *cpu, IADDR, SI, SI *),
- SI address,
- SI *value
-)
-{
- CGEN_WRITE_QUEUE *q = CPU_WRITE_QUEUE (cpu);
- CGEN_WRITE_QUEUE_ELEMENT *element = CGEN_WRITE_QUEUE_NEXT (q);
- element->kind = CGEN_FN_MEM_XI_WRITE;
- element->insn_address = CPU_PC_GET (cpu);
- element->kinds.fn_mem_xi_write.function = write_function;
- element->kinds.fn_mem_xi_write.address = address;
- element->kinds.fn_mem_xi_write.value[0] = value[0];
- element->kinds.fn_mem_xi_write.value[1] = value[1];
- element->kinds.fn_mem_xi_write.value[2] = value[2];
- element->kinds.fn_mem_xi_write.value[3] = value[3];
-}
-
-/* Execute a write stored on the write queue. */
-void
-cgen_write_queue_element_execute (SIM_CPU *cpu, CGEN_WRITE_QUEUE_ELEMENT *item)
-{
- IADDR pc;
- switch (CGEN_WRITE_QUEUE_ELEMENT_KIND (item))
- {
- case CGEN_BI_WRITE:
- *item->kinds.bi_write.target = item->kinds.bi_write.value;
- break;
- case CGEN_QI_WRITE:
- *item->kinds.qi_write.target = item->kinds.qi_write.value;
- break;
- case CGEN_SI_WRITE:
- *item->kinds.si_write.target = item->kinds.si_write.value;
- break;
- case CGEN_SF_WRITE:
- *item->kinds.sf_write.target = item->kinds.sf_write.value;
- break;
- case CGEN_PC_WRITE:
- CPU_PC_SET (cpu, item->kinds.pc_write.value);
- break;
- case CGEN_FN_HI_WRITE:
- item->kinds.fn_hi_write.function (cpu,
- item->kinds.fn_hi_write.regno,
- item->kinds.fn_hi_write.value);
- break;
- case CGEN_FN_SI_WRITE:
- item->kinds.fn_si_write.function (cpu,
- item->kinds.fn_si_write.regno,
- item->kinds.fn_si_write.value);
- break;
- case CGEN_FN_SF_WRITE:
- item->kinds.fn_sf_write.function (cpu,
- item->kinds.fn_sf_write.regno,
- item->kinds.fn_sf_write.value);
- break;
- case CGEN_FN_DI_WRITE:
- item->kinds.fn_di_write.function (cpu,
- item->kinds.fn_di_write.regno,
- item->kinds.fn_di_write.value);
- break;
- case CGEN_FN_DF_WRITE:
- item->kinds.fn_df_write.function (cpu,
- item->kinds.fn_df_write.regno,
- item->kinds.fn_df_write.value);
- break;
- case CGEN_FN_XI_WRITE:
- item->kinds.fn_xi_write.function (cpu,
- item->kinds.fn_xi_write.regno,
- item->kinds.fn_xi_write.value);
- break;
- case CGEN_FN_PC_WRITE:
- item->kinds.fn_pc_write.function (cpu, item->kinds.fn_pc_write.value);
- break;
- case CGEN_MEM_QI_WRITE:
- pc = item->insn_address;
- SETMEMQI (cpu, pc, item->kinds.mem_qi_write.address,
- item->kinds.mem_qi_write.value);
- break;
- case CGEN_MEM_HI_WRITE:
- pc = item->insn_address;
- SETMEMHI (cpu, pc, item->kinds.mem_hi_write.address,
- item->kinds.mem_hi_write.value);
- break;
- case CGEN_MEM_SI_WRITE:
- pc = item->insn_address;
- SETMEMSI (cpu, pc, item->kinds.mem_si_write.address,
- item->kinds.mem_si_write.value);
- break;
- case CGEN_MEM_DI_WRITE:
- pc = item->insn_address;
- SETMEMDI (cpu, pc, item->kinds.mem_di_write.address,
- item->kinds.mem_di_write.value);
- break;
- case CGEN_MEM_DF_WRITE:
- pc = item->insn_address;
- SETMEMDF (cpu, pc, item->kinds.mem_df_write.address,
- item->kinds.mem_df_write.value);
- break;
- case CGEN_MEM_XI_WRITE:
- pc = item->insn_address;
- SETMEMSI (cpu, pc, item->kinds.mem_xi_write.address,
- item->kinds.mem_xi_write.value[0]);
- SETMEMSI (cpu, pc, item->kinds.mem_xi_write.address + 4,
- item->kinds.mem_xi_write.value[1]);
- SETMEMSI (cpu, pc, item->kinds.mem_xi_write.address + 8,
- item->kinds.mem_xi_write.value[2]);
- SETMEMSI (cpu, pc, item->kinds.mem_xi_write.address + 12,
- item->kinds.mem_xi_write.value[3]);
- break;
- case CGEN_FN_MEM_QI_WRITE:
- pc = item->insn_address;
- item->kinds.fn_mem_qi_write.function (cpu, pc,
- item->kinds.fn_mem_qi_write.address,
- item->kinds.fn_mem_qi_write.value);
- break;
- case CGEN_FN_MEM_HI_WRITE:
- pc = item->insn_address;
- item->kinds.fn_mem_hi_write.function (cpu, pc,
- item->kinds.fn_mem_hi_write.address,
- item->kinds.fn_mem_hi_write.value);
- break;
- case CGEN_FN_MEM_SI_WRITE:
- pc = item->insn_address;
- item->kinds.fn_mem_si_write.function (cpu, pc,
- item->kinds.fn_mem_si_write.address,
- item->kinds.fn_mem_si_write.value);
- break;
- case CGEN_FN_MEM_DI_WRITE:
- pc = item->insn_address;
- item->kinds.fn_mem_di_write.function (cpu, pc,
- item->kinds.fn_mem_di_write.address,
- item->kinds.fn_mem_di_write.value);
- break;
- case CGEN_FN_MEM_DF_WRITE:
- pc = item->insn_address;
- item->kinds.fn_mem_df_write.function (cpu, pc,
- item->kinds.fn_mem_df_write.address,
- item->kinds.fn_mem_df_write.value);
- break;
- case CGEN_FN_MEM_XI_WRITE:
- pc = item->insn_address;
- item->kinds.fn_mem_xi_write.function (cpu, pc,
- item->kinds.fn_mem_xi_write.address,
- item->kinds.fn_mem_xi_write.value);
- break;
- default:
- abort ();
- break; /* FIXME: for now....print message later. */
- }
-}
-
-/* Utilities for the write queue. */
-CGEN_WRITE_QUEUE_ELEMENT *
-cgen_write_queue_overflow (CGEN_WRITE_QUEUE *q)
-{
- abort (); /* FIXME: for now....print message later. */
- return 0;
-}
diff --git a/sim/common/cgen-par.h b/sim/common/cgen-par.h
deleted file mode 100644
index 1b8a3215237..00000000000
--- a/sim/common/cgen-par.h
+++ /dev/null
@@ -1,211 +0,0 @@
-/* Simulator header for cgen parallel support.
- Copyright (C) 1999, 2000 Free Software Foundation, Inc.
- Contributed by Cygnus Solutions.
-
-This file is part of the GNU instruction set simulator.
-
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License along
-with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
-
-#ifndef CGEN_PAR_H
-#define CGEN_PAR_H
-
-/* Kinds of writes stored on the write queue. */
-enum cgen_write_queue_kind {
- CGEN_BI_WRITE, CGEN_QI_WRITE, CGEN_SI_WRITE, CGEN_SF_WRITE,
- CGEN_PC_WRITE,
- CGEN_FN_HI_WRITE, CGEN_FN_SI_WRITE, CGEN_FN_SF_WRITE,
- CGEN_FN_DI_WRITE, CGEN_FN_DF_WRITE,
- CGEN_FN_XI_WRITE, CGEN_FN_PC_WRITE,
- CGEN_MEM_QI_WRITE, CGEN_MEM_HI_WRITE, CGEN_MEM_SI_WRITE, CGEN_MEM_DI_WRITE,
- CGEN_MEM_DF_WRITE, CGEN_MEM_XI_WRITE,
- CGEN_FN_MEM_QI_WRITE, CGEN_FN_MEM_HI_WRITE, CGEN_FN_MEM_SI_WRITE,
- CGEN_FN_MEM_DI_WRITE, CGEN_FN_MEM_DF_WRITE, CGEN_FN_MEM_XI_WRITE,
- CGEN_NUM_WRITE_KINDS
-};
-
-/* Element of the write queue. */
-typedef struct {
- enum cgen_write_queue_kind kind; /* Used to select union member below. */
- IADDR insn_address; /* Address of the insn performing the write. */
- union {
- struct {
- BI *target;
- BI value;
- } bi_write;
- struct {
- UQI *target;
- QI value;
- } qi_write;
- struct {
- SI *target;
- SI value;
- } si_write;
- struct {
- SI *target;
- SF value;
- } sf_write;
- struct {
- USI value;
- } pc_write;
- struct {
- UINT regno;
- UHI value;
- void (*function)(SIM_CPU *, UINT, UHI);
- } fn_hi_write;
- struct {
- UINT regno;
- SI value;
- void (*function)(SIM_CPU *, UINT, USI);
- } fn_si_write;
- struct {
- UINT regno;
- SF value;
- void (*function)(SIM_CPU *, UINT, SF);
- } fn_sf_write;
- struct {
- UINT regno;
- DI value;
- void (*function)(SIM_CPU *, UINT, DI);
- } fn_di_write;
- struct {
- UINT regno;
- DF value;
- void (*function)(SIM_CPU *, UINT, DF);
- } fn_df_write;
- struct {
- UINT regno;
- SI value[4];
- void (*function)(SIM_CPU *, UINT, SI *);
- } fn_xi_write;
- struct {
- USI value;
- void (*function)(SIM_CPU *, USI);
- } fn_pc_write;
- struct {
- SI address;
- QI value;
- } mem_qi_write;
- struct {
- SI address;
- HI value;
- } mem_hi_write;
- struct {
- SI address;
- SI value;
- } mem_si_write;
- struct {
- SI address;
- DI value;
- } mem_di_write;
- struct {
- SI address;
- DF value;
- } mem_df_write;
- struct {
- SI address;
- SI value[4];
- } mem_xi_write;
- struct {
- SI address;
- QI value;
- void (*function)(SIM_CPU *, IADDR, SI, QI);
- } fn_mem_qi_write;
- struct {
- SI address;
- HI value;
- void (*function)(SIM_CPU *, IADDR, SI, HI);
- } fn_mem_hi_write;
- struct {
- SI address;
- SI value;
- void (*function)(SIM_CPU *, IADDR, SI, SI);
- } fn_mem_si_write;
- struct {
- SI address;
- DI value;
- void (*function)(SIM_CPU *, IADDR, SI, DI);
- } fn_mem_di_write;
- struct {
- SI address;
- DF value;
- void (*function)(SIM_CPU *, IADDR, SI, DF);
- } fn_mem_df_write;
- struct {
- SI address;
- SI value[4];
- void (*function)(SIM_CPU *, IADDR, SI, SI *);
- } fn_mem_xi_write;
- } kinds;
-} CGEN_WRITE_QUEUE_ELEMENT;
-
-#define CGEN_WRITE_QUEUE_ELEMENT_KIND(element) ((element)->kind)
-#define CGEN_WRITE_QUEUE_ELEMENT_IADDR(element) ((element)->insn_address)
-
-extern void cgen_write_queue_element_execute (
- SIM_CPU *, CGEN_WRITE_QUEUE_ELEMENT *
-);
-
-/* Instance of the queue for parallel write-after support. */
-/* FIXME: Should be dynamic? */
-#define CGEN_WRITE_QUEUE_SIZE (64 * 4) /* 64 writes x 4 insns -- for now. */
-
-typedef struct {
- int index;
- CGEN_WRITE_QUEUE_ELEMENT q[CGEN_WRITE_QUEUE_SIZE];
-} CGEN_WRITE_QUEUE;
-
-#define CGEN_WRITE_QUEUE_CLEAR(queue) ((queue)->index = 0)
-#define CGEN_WRITE_QUEUE_INDEX(queue) ((queue)->index)
-#define CGEN_WRITE_QUEUE_ELEMENT(queue, ix) (&(queue)->q[(ix)])
-
-#define CGEN_WRITE_QUEUE_NEXT(queue) ( \
- (queue)->index < CGEN_WRITE_QUEUE_SIZE \
- ? &(queue)->q[(queue)->index++] \
- : cgen_write_queue_overflow (queue) \
-)
-
-extern CGEN_WRITE_QUEUE_ELEMENT *cgen_write_queue_overflow (CGEN_WRITE_QUEUE *);
-
-/* Functions for queuing writes. Used by semantic code. */
-extern void sim_queue_bi_write (SIM_CPU *, BI *, BI);
-extern void sim_queue_qi_write (SIM_CPU *, UQI *, UQI);
-extern void sim_queue_si_write (SIM_CPU *, SI *, SI);
-extern void sim_queue_sf_write (SIM_CPU *, SI *, SF);
-
-extern void sim_queue_pc_write (SIM_CPU *, USI);
-
-extern void sim_queue_fn_hi_write (SIM_CPU *, void (*)(SIM_CPU *, UINT, UHI), UINT, UHI);
-extern void sim_queue_fn_si_write (SIM_CPU *, void (*)(SIM_CPU *, UINT, USI), UINT, USI);
-extern void sim_queue_fn_sf_write (SIM_CPU *, void (*)(SIM_CPU *, UINT, SF), UINT, SF);
-extern void sim_queue_fn_di_write (SIM_CPU *, void (*)(SIM_CPU *, UINT, DI), UINT, DI);
-extern void sim_queue_fn_df_write (SIM_CPU *, void (*)(SIM_CPU *, UINT, DF), UINT, DF);
-extern void sim_queue_fn_xi_write (SIM_CPU *, void (*)(SIM_CPU *, UINT, SI *), UINT, SI *);
-extern void sim_queue_fn_pc_write (SIM_CPU *, void (*)(SIM_CPU *, USI), USI);
-
-extern void sim_queue_mem_qi_write (SIM_CPU *, SI, QI);
-extern void sim_queue_mem_hi_write (SIM_CPU *, SI, HI);
-extern void sim_queue_mem_si_write (SIM_CPU *, SI, SI);
-extern void sim_queue_mem_di_write (SIM_CPU *, SI, DI);
-extern void sim_queue_mem_df_write (SIM_CPU *, SI, DF);
-extern void sim_queue_mem_xi_write (SIM_CPU *, SI, SI *);
-
-extern void sim_queue_fn_mem_qi_write (SIM_CPU *, void (*)(SIM_CPU *, IADDR, SI, QI), SI, QI);
-extern void sim_queue_fn_mem_hi_write (SIM_CPU *, void (*)(SIM_CPU *, IADDR, SI, HI), SI, HI);
-extern void sim_queue_fn_mem_si_write (SIM_CPU *, void (*)(SIM_CPU *, IADDR, SI, SI), SI, SI);
-extern void sim_queue_fn_mem_di_write (SIM_CPU *, void (*)(SIM_CPU *, IADDR, SI, DI), SI, DI);
-extern void sim_queue_fn_mem_df_write (SIM_CPU *, void (*)(SIM_CPU *, IADDR, SI, DF), SI, DF);
-extern void sim_queue_fn_mem_xi_write (SIM_CPU *, void (*)(SIM_CPU *, IADDR, SI, SI *), SI, SI *);
-
-#endif /* CGEN_PAR_H */
diff --git a/sim/common/cgen-run.c b/sim/common/cgen-run.c
deleted file mode 100644
index 031bc1c69ea..00000000000
--- a/sim/common/cgen-run.c
+++ /dev/null
@@ -1,237 +0,0 @@
-/* Main simulator loop for CGEN-based simulators.
- Copyright (C) 1998 Free Software Foundation, Inc.
- Contributed by Cygnus Solutions.
-
-This file is part of GDB, the GNU debugger.
-
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License along
-with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
-
-/* ??? These are old notes, kept around for now.
- Collecting profile data and tracing slow us down so we don't do them in
- "fast mode".
- There are 6 possibilities on 2 axes:
- - no-scaching, insn-scaching, basic-block-scaching
- - run with full features or run fast
- Supporting all six possibilities in one executable is a bit much but
- supporting full/fast seems reasonable.
- If the scache is configured in it is always used.
- If pbb-scaching is configured in it is always used.
- ??? Sometimes supporting more than one set of semantic functions will make
- the simulator too large - this should be configurable. Blah blah blah.
- ??? Supporting full/fast can be more modular, blah blah blah.
- When the framework is more modular, this can be.
-*/
-
-#include "sim-main.h"
-#include "sim-assert.h"
-
-#ifndef SIM_ENGINE_PREFIX_HOOK
-#define SIM_ENGINE_PREFIX_HOOK(sd)
-#endif
-#ifndef SIM_ENGINE_POSTFIX_HOOK
-#define SIM_ENGINE_POSTFIX_HOOK(sd)
-#endif
-
-static sim_event_handler has_stepped;
-static void prime_cpu (SIM_CPU *, int);
-static void engine_run_1 (SIM_DESC, int, int);
-static void engine_run_n (SIM_DESC, int, int, int, int);
-
-/* sim_resume for cgen */
-
-void
-sim_resume (SIM_DESC sd, int step, int siggnal)
-{
- sim_engine *engine = STATE_ENGINE (sd);
- jmp_buf buf;
- int jmpval;
-
- ASSERT (STATE_MAGIC (sd) == SIM_MAGIC_NUMBER);
-
- /* we only want to be single stepping the simulator once */
- if (engine->stepper != NULL)
- {
- sim_events_deschedule (sd, engine->stepper);
- engine->stepper = NULL;
- }
- if (step)
- engine->stepper = sim_events_schedule (sd, 1, has_stepped, sd);
-
- sim_module_resume (sd);
-
-#if WITH_SCACHE
- if (USING_SCACHE_P (sd))
- scache_flush (sd);
-#endif
-
- /* run/resume the simulator */
-
- sim_engine_set_run_state (sd, sim_running, 0);
-
- engine->jmpbuf = &buf;
- jmpval = setjmp (buf);
- if (jmpval == sim_engine_start_jmpval
- || jmpval == sim_engine_restart_jmpval)
- {
- int last_cpu_nr = sim_engine_last_cpu_nr (sd);
- int next_cpu_nr = sim_engine_next_cpu_nr (sd);
- int nr_cpus = sim_engine_nr_cpus (sd);
- /* ??? Setting max_insns to 0 allows pbb/jit code to run wild and is
- useful if all one wants to do is run a benchmark. Need some better
- way to identify this case. */
- int max_insns = (step
- ? 1
- : (nr_cpus == 1
- /*&& wip:no-events*/
- /* Don't do this if running under gdb, need to
- poll ui for events. */
- && STATE_OPEN_KIND (sd) == SIM_OPEN_STANDALONE)
- ? 0
- : 8); /*FIXME: magic number*/
- int fast_p = STATE_RUN_FAST_P (sd);
-
- sim_events_preprocess (sd, last_cpu_nr >= nr_cpus, next_cpu_nr >= nr_cpus);
- if (next_cpu_nr >= nr_cpus)
- next_cpu_nr = 0;
- if (nr_cpus == 1)
- engine_run_1 (sd, max_insns, fast_p);
- else
- engine_run_n (sd, next_cpu_nr, nr_cpus, max_insns, fast_p);
- }
-#if 1 /*wip*/
- else
- {
- /* Account for the last insn executed. */
- SIM_CPU *cpu = STATE_CPU (sd, sim_engine_last_cpu_nr (sd));
- ++ CPU_INSN_COUNT (cpu);
- TRACE_INSN_FINI (cpu, NULL, 1);
- }
-#endif
-
- engine->jmpbuf = NULL;
-
- {
- int i;
- int nr_cpus = sim_engine_nr_cpus (sd);
-
-#if 0 /*wip,ignore*/
- /* If the loop exits, either we single-stepped or @cpu@_engine_stop
- was called. */
- if (step)
- sim_engine_set_run_state (sd, sim_stopped, SIM_SIGTRAP);
- else
- sim_engine_set_run_state (sd, pending_reason, pending_sigrc);
-#endif
-
- for (i = 0; i < nr_cpus; ++i)
- {
- SIM_CPU *cpu = STATE_CPU (sd, i);
-
- PROFILE_TOTAL_INSN_COUNT (CPU_PROFILE_DATA (cpu)) += CPU_INSN_COUNT (cpu);
- }
- }
-
- sim_module_suspend (sd);
-}
-
-/* Halt the simulator after just one instruction. */
-
-static void
-has_stepped (SIM_DESC sd, void *data)
-{
- ASSERT (STATE_MAGIC (sd) == SIM_MAGIC_NUMBER);
- sim_engine_halt (sd, NULL, NULL, NULL_CIA, sim_stopped, SIM_SIGTRAP);
-}
-
-/* Prepare a cpu for running.
- MAX_INSNS is the number of insns to execute per time slice.
- If 0 it means the cpu can run as long as it wants (e.g. until the
- program completes).
- ??? Perhaps this should be an argument to the engine_fn. */
-
-static void
-prime_cpu (SIM_CPU *cpu, int max_insns)
-{
- CPU_MAX_SLICE_INSNS (cpu) = max_insns;
- CPU_INSN_COUNT (cpu) = 0;
-
- /* Initialize the insn descriptor table.
- This has to be done after all initialization so we just defer it to
- here. */
-
- if (MACH_PREPARE_RUN (CPU_MACH (cpu)))
- (* MACH_PREPARE_RUN (CPU_MACH (cpu))) (cpu);
-}
-
-/* Main loop, for 1 cpu. */
-
-static void
-engine_run_1 (SIM_DESC sd, int max_insns, int fast_p)
-{
- sim_cpu *cpu = STATE_CPU (sd, 0);
- ENGINE_FN *fn = fast_p ? CPU_FAST_ENGINE_FN (cpu) : CPU_FULL_ENGINE_FN (cpu);
-
- prime_cpu (cpu, max_insns);
-
- while (1)
- {
- SIM_ENGINE_PREFIX_HOOK (sd);
-
- (*fn) (cpu);
-
- SIM_ENGINE_POSTFIX_HOOK (sd);
-
- /* process any events */
- if (sim_events_tick (sd))
- sim_events_process (sd);
- }
-}
-
-/* Main loop, for multiple cpus. */
-
-static void
-engine_run_n (SIM_DESC sd, int next_cpu_nr, int nr_cpus, int max_insns, int fast_p)
-{
- int i;
- ENGINE_FN *engine_fns[MAX_NR_PROCESSORS];
-
- for (i = 0; i < nr_cpus; ++i)
- {
- SIM_CPU *cpu = STATE_CPU (sd, i);
-
- engine_fns[i] = fast_p ? CPU_FAST_ENGINE_FN (cpu) : CPU_FULL_ENGINE_FN (cpu);
- prime_cpu (cpu, max_insns);
- }
-
- while (1)
- {
- SIM_ENGINE_PREFIX_HOOK (sd);
-
- /* FIXME: proper cycling of all of them, blah blah blah. */
- while (next_cpu_nr != nr_cpus)
- {
- SIM_CPU *cpu = STATE_CPU (sd, next_cpu_nr);
-
- (* engine_fns[next_cpu_nr]) (cpu);
- ++next_cpu_nr;
- }
-
- SIM_ENGINE_POSTFIX_HOOK (sd);
-
- /* process any events */
- if (sim_events_tick (sd))
- sim_events_process (sd);
- }
-}
diff --git a/sim/common/cgen-scache.c b/sim/common/cgen-scache.c
deleted file mode 100644
index 282497c5043..00000000000
--- a/sim/common/cgen-scache.c
+++ /dev/null
@@ -1,476 +0,0 @@
-/* Simulator cache routines for CGEN simulators (and maybe others).
- Copyright (C) 1996, 1997, 1998 Free Software Foundation, Inc.
- Contributed by Cygnus Support.
-
-This file is part of GDB, the GNU debugger.
-
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License along
-with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
-
-#define SCACHE_DEFINE_INLINE
-
-#include "sim-main.h"
-#ifdef HAVE_STDLIB_H
-#include <stdlib.h>
-#endif
-#include "libiberty.h"
-#include "sim-options.h"
-#include "sim-io.h"
-
-#define MAX(a,b) ((a) > (b) ? (a) : (b))
-
-/* Unused address. */
-#define UNUSED_ADDR 0xffffffff
-
-/* Scache configuration parameters.
- ??? Experiments to determine reasonable values is wip.
- These are just guesses. */
-
-/* Default number of scache elements.
- The size of an element is typically 32-64 bytes, so the size of the
- default scache will be between 512K and 1M bytes. */
-#ifdef CONFIG_SIM_CACHE_SIZE
-#define SCACHE_DEFAULT_CACHE_SIZE CONFIG_SIM_CACHE_SIZE
-#else
-#define SCACHE_DEFAULT_CACHE_SIZE 16384
-#endif
-
-/* Minimum cache size.
- The m32r port assumes a cache size of at least 2 so it can decode both 16
- bit insns. When compiling we need an extra for the chain entry. And this
- must be a multiple of 2. Hence 4 is the minimum (though, for those with
- featuritis or itchy pedantic bits, we could make this conditional on
- WITH_SCACHE_PBB). */
-#define MIN_SCACHE_SIZE 4
-
-/* Ratio of size of text section to size of scache.
- When compiling, we don't want to flush the scache more than we have to
- but we also don't want it to be exorbitantly(sp?) large. So we pick a high
- default value, then reduce it by the size of the program being simulated,
- but we don't override any value specified on the command line.
- If not specified on the command line, the size to use is computed as
- max (MIN_SCACHE_SIZE,
- min (DEFAULT_SCACHE_SIZE,
- text_size / (base_insn_size * INSN_SCACHE_RATIO))). */
-/* ??? Interesting idea but not currently used. */
-#define INSN_SCACHE_RATIO 4
-
-/* Default maximum insn chain length.
- The only reason for a maximum is so we can place a maximum size on the
- profiling table. Chain lengths are determined by cti's.
- 32 is a more reasonable number, but when profiling, the before/after
- handlers take up that much more space. The scache is filled from front to
- back so all this determines is when the scache needs to be flushed. */
-#define MAX_CHAIN_LENGTH 64
-
-/* Default maximum hash list length. */
-#define MAX_HASH_CHAIN_LENGTH 4
-
-/* Minimum hash table size. */
-#define MIN_HASH_CHAINS 32
-
-/* Ratio of number of scache elements to number of hash lists.
- Since the user can only specify the size of the scache, we compute the
- size of the hash table as
- max (MIN_HASH_CHAINS, scache_size / SCACHE_HASH_RATIO). */
-#define SCACHE_HASH_RATIO 8
-
-/* Hash a PC value.
- FIXME: May wish to make the hashing architecture specific.
- FIXME: revisit */
-#define HASH_PC(pc) (((pc) >> 2) + ((pc) >> 5))
-
-static MODULE_INIT_FN scache_init;
-static MODULE_UNINSTALL_FN scache_uninstall;
-
-static DECLARE_OPTION_HANDLER (scache_option_handler);
-
-#define OPTION_PROFILE_SCACHE (OPTION_START + 0)
-
-static const OPTION scache_options[] = {
- { {"scache-size", optional_argument, NULL, 'c'},
- 'c', "[SIZE]", "Specify size of simulator execution cache",
- scache_option_handler },
-#if WITH_SCACHE_PBB
- /* ??? It might be nice to allow the user to specify the size of the hash
- table, the maximum hash list length, and the maximum chain length, but
- for now that might be more akin to featuritis. */
-#endif
- { {"profile-scache", optional_argument, NULL, OPTION_PROFILE_SCACHE},
- '\0', "on|off", "Perform simulator execution cache profiling",
- scache_option_handler },
- { {NULL, no_argument, NULL, 0}, '\0', NULL, NULL, NULL }
-};
-
-static SIM_RC
-scache_option_handler (SIM_DESC sd, sim_cpu *cpu, int opt,
- char *arg, int is_command)
-{
- switch (opt)
- {
- case 'c' :
- if (WITH_SCACHE)
- {
- if (arg != NULL)
- {
- int n = strtol (arg, NULL, 0);
- if (n < MIN_SCACHE_SIZE)
- {
- sim_io_eprintf (sd, "invalid scache size `%d', must be at least 4", n);
- return SIM_RC_FAIL;
- }
- /* Ensure it's a multiple of 2. */
- if ((n & (n - 1)) != 0)
- {
- sim_io_eprintf (sd, "scache size `%d' not a multiple of 2\n", n);
- {
- /* round up to nearest multiple of 2 */
- int i;
- for (i = 1; i < n; i <<= 1)
- continue;
- n = i;
- }
- sim_io_eprintf (sd, "rounding scache size up to %d\n", n);
- }
- if (cpu == NULL)
- STATE_SCACHE_SIZE (sd) = n;
- else
- CPU_SCACHE_SIZE (cpu) = n;
- }
- else
- {
- if (cpu == NULL)
- STATE_SCACHE_SIZE (sd) = SCACHE_DEFAULT_CACHE_SIZE;
- else
- CPU_SCACHE_SIZE (cpu) = SCACHE_DEFAULT_CACHE_SIZE;
- }
- }
- else
- sim_io_eprintf (sd, "Simulator execution cache not enabled, `--scache-size' ignored\n");
- break;
-
- case OPTION_PROFILE_SCACHE :
- if (WITH_SCACHE && WITH_PROFILE_SCACHE_P)
- {
- /* FIXME: handle cpu != NULL. */
- return sim_profile_set_option (sd, "-scache", PROFILE_SCACHE_IDX,
- arg);
- }
- else
- sim_io_eprintf (sd, "Simulator cache profiling not compiled in, `--profile-scache' ignored\n");
- break;
- }
-
- return SIM_RC_OK;
-}
-
-SIM_RC
-scache_install (SIM_DESC sd)
-{
- sim_add_option_table (sd, NULL, scache_options);
- sim_module_add_init_fn (sd, scache_init);
- sim_module_add_uninstall_fn (sd, scache_uninstall);
-
- /* This is the default, it may be overridden on the command line. */
- STATE_SCACHE_SIZE (sd) = WITH_SCACHE;
-
- return SIM_RC_OK;
-}
-
-static SIM_RC
-scache_init (SIM_DESC sd)
-{
- int c;
-
- for (c = 0; c < MAX_NR_PROCESSORS; ++c)
- {
- SIM_CPU *cpu = STATE_CPU (sd, c);
- int elm_size = IMP_PROPS_SCACHE_ELM_SIZE (MACH_IMP_PROPS (CPU_MACH (cpu)));
-
- /* elm_size is 0 if the cpu doesn't not have scache support */
- if (elm_size == 0)
- {
- CPU_SCACHE_SIZE (cpu) = 0;
- CPU_SCACHE_CACHE (cpu) = NULL;
- }
- else
- {
- if (CPU_SCACHE_SIZE (cpu) == 0)
- CPU_SCACHE_SIZE (cpu) = STATE_SCACHE_SIZE (sd);
- CPU_SCACHE_CACHE (cpu) =
- (SCACHE *) xmalloc (CPU_SCACHE_SIZE (cpu) * elm_size);
-#if WITH_SCACHE_PBB
- CPU_SCACHE_MAX_CHAIN_LENGTH (cpu) = MAX_CHAIN_LENGTH;
- CPU_SCACHE_NUM_HASH_CHAIN_ENTRIES (cpu) = MAX_HASH_CHAIN_LENGTH;
- CPU_SCACHE_NUM_HASH_CHAINS (cpu) = MAX (MIN_HASH_CHAINS,
- CPU_SCACHE_SIZE (cpu)
- / SCACHE_HASH_RATIO);
- CPU_SCACHE_HASH_TABLE (cpu) =
- (SCACHE_MAP *) xmalloc (CPU_SCACHE_NUM_HASH_CHAINS (cpu)
- * CPU_SCACHE_NUM_HASH_CHAIN_ENTRIES (cpu)
- * sizeof (SCACHE_MAP));
- CPU_SCACHE_PBB_BEGIN (cpu) = (SCACHE *) zalloc (elm_size);
- CPU_SCACHE_CHAIN_LENGTHS (cpu) =
- (unsigned long *) zalloc ((CPU_SCACHE_MAX_CHAIN_LENGTH (cpu) + 1)
- * sizeof (long));
-#endif
- }
- }
-
- scache_flush (sd);
-
- return SIM_RC_OK;
-}
-
-static void
-scache_uninstall (SIM_DESC sd)
-{
- int c;
-
- for (c = 0; c < MAX_NR_PROCESSORS; ++c)
- {
- SIM_CPU *cpu = STATE_CPU (sd, c);
-
- if (CPU_SCACHE_CACHE (cpu) != NULL)
- free (CPU_SCACHE_CACHE (cpu));
-#if WITH_SCACHE_PBB
- if (CPU_SCACHE_HASH_TABLE (cpu) != NULL)
- free (CPU_SCACHE_HASH_TABLE (cpu));
- if (CPU_SCACHE_PBB_BEGIN (cpu) != NULL)
- free (CPU_SCACHE_PBB_BEGIN (cpu));
- if (CPU_SCACHE_CHAIN_LENGTHS (cpu) != NULL)
- free (CPU_SCACHE_CHAIN_LENGTHS (cpu));
-#endif
- }
-}
-
-void
-scache_flush (SIM_DESC sd)
-{
- int c;
-
- for (c = 0; c < MAX_NR_PROCESSORS; ++c)
- {
- SIM_CPU *cpu = STATE_CPU (sd, c);
- scache_flush_cpu (cpu);
- }
-}
-
-void
-scache_flush_cpu (SIM_CPU *cpu)
-{
- int i,n;
-
- /* Don't bother if cache not in use. */
- if (CPU_SCACHE_SIZE (cpu) == 0)
- return;
-
-#if WITH_SCACHE_PBB
- /* It's important that this be reasonably fast as this can be done when
- the simulation is running. */
- CPU_SCACHE_NEXT_FREE (cpu) = CPU_SCACHE_CACHE (cpu);
- n = CPU_SCACHE_NUM_HASH_CHAINS (cpu) * CPU_SCACHE_NUM_HASH_CHAIN_ENTRIES (cpu);
- /* ??? Might be faster to just set the first entry, then update the
- "last entry" marker during allocation. */
- for (i = 0; i < n; ++i)
- CPU_SCACHE_HASH_TABLE (cpu) [i] . pc = UNUSED_ADDR;
-#else
- {
- int elm_size = IMP_PROPS_SCACHE_ELM_SIZE (MACH_IMP_PROPS (CPU_MACH (cpu)));
- SCACHE *sc;
-
- /* Technically, this may not be necessary, but it helps debugging. */
- memset (CPU_SCACHE_CACHE (cpu), 0,
- CPU_SCACHE_SIZE (cpu) * elm_size);
-
- for (i = 0, sc = CPU_SCACHE_CACHE (cpu); i < CPU_SCACHE_SIZE (cpu);
- ++i, sc = (SCACHE *) ((char *) sc + elm_size))
- {
- sc->argbuf.addr = UNUSED_ADDR;
- }
- }
-#endif
-}
-
-#if WITH_SCACHE_PBB
-
-/* Look up PC in the hash table of scache entry points.
- Returns the entry or NULL if not found. */
-
-SCACHE *
-scache_lookup (SIM_CPU *cpu, IADDR pc)
-{
- /* FIXME: hash computation is wrong, doesn't take into account
- NUM_HASH_CHAIN_ENTRIES. A lot of the hash table will be unused! */
- unsigned int slot = HASH_PC (pc) & (CPU_SCACHE_NUM_HASH_CHAINS (cpu) - 1);
- int i, max_i = CPU_SCACHE_NUM_HASH_CHAIN_ENTRIES (cpu);
- SCACHE_MAP *scm;
-
- /* We don't update hit/miss statistics as this is only used when recording
- branch target addresses. */
-
- scm = & CPU_SCACHE_HASH_TABLE (cpu) [slot];
- for (i = 0; i < max_i && scm->pc != UNUSED_ADDR; ++i, ++scm)
- {
- if (scm->pc == pc)
- return scm->sc;
- }
- return 0;
-}
-
-/* Look up PC and if not found create an entry for it.
- If found the result is a pointer to the SCACHE entry.
- If not found the result is NULL, and the address of a buffer of at least
- N entries is stored in BUFP.
- It's done this way so the caller can still distinguish found/not-found.
- If the table is full, it is emptied to make room.
- If the maximum length of a hash list is reached a random entry is thrown out
- to make room.
- ??? One might want to try to make this smarter, but let's see some
- measurable benefit first. */
-
-SCACHE *
-scache_lookup_or_alloc (SIM_CPU *cpu, IADDR pc, int n, SCACHE **bufp)
-{
- /* FIXME: hash computation is wrong, doesn't take into account
- NUM_HASH_CHAIN_ENTRIES. A lot of the hash table will be unused! */
- unsigned int slot = HASH_PC (pc) & (CPU_SCACHE_NUM_HASH_CHAINS (cpu) - 1);
- int i, max_i = CPU_SCACHE_NUM_HASH_CHAIN_ENTRIES (cpu);
- SCACHE_MAP *scm;
- SCACHE *sc;
-
- scm = & CPU_SCACHE_HASH_TABLE (cpu) [slot];
- for (i = 0; i < max_i && scm->pc != UNUSED_ADDR; ++i, ++scm)
- {
- if (scm->pc == pc)
- {
- PROFILE_COUNT_SCACHE_HIT (cpu);
- return scm->sc;
- }
- }
- PROFILE_COUNT_SCACHE_MISS (cpu);
-
- /* The address we want isn't cached. Bummer.
- If the hash chain we have for this address is full, throw out an entry
- to make room. */
-
- if (i == max_i)
- {
- /* Rather than do something sophisticated like LRU, we just throw out
- a semi-random entry. Let someone else have the joy of saying how
- wrong this is. NEXT_FREE is the entry to throw out and cycles
- through all possibilities. */
- static int next_free = 0;
-
- scm = & CPU_SCACHE_HASH_TABLE (cpu) [slot];
- /* FIXME: This seems rather clumsy. */
- for (i = 0; i < next_free; ++i, ++scm)
- continue;
- ++next_free;
- if (next_free == CPU_SCACHE_NUM_HASH_CHAIN_ENTRIES (cpu))
- next_free = 0;
- }
-
- /* At this point SCM points to the hash table entry to use.
- Now make sure there's room in the cache. */
- /* FIXME: Kinda weird to use a next_free adjusted scm when cache is
- flushed. */
-
- {
- int elm_size = IMP_PROPS_SCACHE_ELM_SIZE (MACH_IMP_PROPS (CPU_MACH (cpu)));
- int elms_used = (((char *) CPU_SCACHE_NEXT_FREE (cpu)
- - (char *) CPU_SCACHE_CACHE (cpu))
- / elm_size);
- int elms_left = CPU_SCACHE_SIZE (cpu) - elms_used;
-
- if (elms_left < n)
- {
- PROFILE_COUNT_SCACHE_FULL_FLUSH (cpu);
- scache_flush_cpu (cpu);
- }
- }
-
- sc = CPU_SCACHE_NEXT_FREE (cpu);
- scm->pc = pc;
- scm->sc = sc;
-
- *bufp = sc;
- return NULL;
-}
-
-#endif /* WITH_SCACHE_PBB */
-
-/* Print cache access statics for CPU. */
-
-void
-scache_print_profile (SIM_CPU *cpu, int verbose)
-{
- SIM_DESC sd = CPU_STATE (cpu);
- unsigned long hits = CPU_SCACHE_HITS (cpu);
- unsigned long misses = CPU_SCACHE_MISSES (cpu);
- char buf[20];
- unsigned long max_val;
- unsigned long *lengths;
- int i;
-
- if (CPU_SCACHE_SIZE (cpu) == 0)
- return;
-
- sim_io_printf (sd, "Simulator Cache Statistics\n\n");
-
- /* One could use PROFILE_LABEL_WIDTH here. I chose not to. */
- sim_io_printf (sd, " Cache size: %s\n",
- sim_add_commas (buf, sizeof (buf), CPU_SCACHE_SIZE (cpu)));
- sim_io_printf (sd, " Hits: %s\n",
- sim_add_commas (buf, sizeof (buf), hits));
- sim_io_printf (sd, " Misses: %s\n",
- sim_add_commas (buf, sizeof (buf), misses));
- if (hits + misses != 0)
- sim_io_printf (sd, " Hit rate: %.2f%%\n",
- ((double) hits / ((double) hits + (double) misses)) * 100);
-
-#if WITH_SCACHE_PBB
- sim_io_printf (sd, "\n");
- sim_io_printf (sd, " Hash table size: %s\n",
- sim_add_commas (buf, sizeof (buf), CPU_SCACHE_NUM_HASH_CHAINS (cpu)));
- sim_io_printf (sd, " Max hash list length: %s\n",
- sim_add_commas (buf, sizeof (buf), CPU_SCACHE_NUM_HASH_CHAIN_ENTRIES (cpu)));
- sim_io_printf (sd, " Max insn chain length: %s\n",
- sim_add_commas (buf, sizeof (buf), CPU_SCACHE_MAX_CHAIN_LENGTH (cpu)));
- sim_io_printf (sd, " Cache full flushes: %s\n",
- sim_add_commas (buf, sizeof (buf), CPU_SCACHE_FULL_FLUSHES (cpu)));
- sim_io_printf (sd, "\n");
-
- if (verbose)
- {
- sim_io_printf (sd, " Insn chain lengths:\n\n");
- max_val = 0;
- lengths = CPU_SCACHE_CHAIN_LENGTHS (cpu);
- for (i = 1; i < CPU_SCACHE_MAX_CHAIN_LENGTH (cpu); ++i)
- if (lengths[i] > max_val)
- max_val = lengths[i];
- for (i = 1; i < CPU_SCACHE_MAX_CHAIN_LENGTH (cpu); ++i)
- {
- sim_io_printf (sd, " %2d: %*s: ",
- i,
- max_val < 10000 ? 5 : 10,
- sim_add_commas (buf, sizeof (buf), lengths[i]));
- sim_profile_print_bar (sd, PROFILE_HISTOGRAM_WIDTH,
- lengths[i], max_val);
- sim_io_printf (sd, "\n");
- }
- sim_io_printf (sd, "\n");
- }
-#endif /* WITH_SCACHE_PBB */
-}
diff --git a/sim/common/cgen-scache.h b/sim/common/cgen-scache.h
deleted file mode 100644
index b7a20de9915..00000000000
--- a/sim/common/cgen-scache.h
+++ /dev/null
@@ -1,162 +0,0 @@
-/* Simulator header for cgen scache support.
- Copyright (C) 1998 Free Software Foundation, Inc.
- Contributed by Cygnus Solutions.
-
-This file is part of GDB, the GNU debugger.
-
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License along
-with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
-
-#ifndef CGEN_SCACHE_H
-#define CGEN_SCACHE_H
-
-#ifndef WITH_SCACHE
-#define WITH_SCACHE 0
-#endif
-
-/* When caching bb's, instructions are extracted into "chains".
- SCACHE_MAP is a hash table into these chains. */
-
-typedef struct {
- IADDR pc;
- SCACHE *sc;
-} SCACHE_MAP;
-
-typedef struct cpu_scache {
- /* Simulator cache size. Must be a power of 2.
- This is the number of elements in the `cache' member. */
- unsigned int size;
-#define CPU_SCACHE_SIZE(cpu) ((cpu) -> cgen_cpu.scache.size)
- /* The cache. */
- SCACHE *cache;
-#define CPU_SCACHE_CACHE(cpu) ((cpu) -> cgen_cpu.scache.cache)
-
-#if WITH_SCACHE_PBB
- /* Number of hash chains. Must be a power of 2. */
- unsigned int num_hash_chains;
-#define CPU_SCACHE_NUM_HASH_CHAINS(cpu) ((cpu) -> cgen_cpu.scache.num_hash_chains)
- /* Number of entries in each hash chain.
- The hash table is a statically allocated NxM array where
- N = num_hash_chains
- M = num_hash_chain_entries. */
- unsigned int num_hash_chain_entries;
-#define CPU_SCACHE_NUM_HASH_CHAIN_ENTRIES(cpu) ((cpu) -> cgen_cpu.scache.num_hash_chain_entries)
- /* Maximum number of instructions in a chain.
- ??? This just let's us set a static size of chain_lengths table.
- In a simulation that handles more than just the cpu, this might also be
- used to keep too many instructions from being executed before checking
- for events (or some such). */
- unsigned int max_chain_length;
-#define CPU_SCACHE_MAX_CHAIN_LENGTH(cpu) ((cpu) -> cgen_cpu.scache.max_chain_length)
- /* Special scache entry for (re)starting bb extraction. */
- SCACHE *pbb_begin;
-#define CPU_SCACHE_PBB_BEGIN(cpu) ((cpu) -> cgen_cpu.scache.pbb_begin)
- /* Hash table into cached chains. */
- SCACHE_MAP *hash_table;
-#define CPU_SCACHE_HASH_TABLE(cpu) ((cpu) -> cgen_cpu.scache.hash_table)
- /* Next free entry in cache. */
- SCACHE *next_free;
-#define CPU_SCACHE_NEXT_FREE(cpu) ((cpu) -> cgen_cpu.scache.next_free)
-
- /* Kind of branch being taken.
- Only used by functional semantics, not switch form. */
- SEM_BRANCH_TYPE pbb_br_type;
-#define CPU_PBB_BR_TYPE(cpu) ((cpu) -> cgen_cpu.scache.pbb_br_type)
- /* Target's branch address. */
- IADDR pbb_br_npc;
-#define CPU_PBB_BR_NPC(cpu) ((cpu) -> cgen_cpu.scache.pbb_br_npc)
-#endif /* WITH_SCACHE_PBB */
-
-#if WITH_PROFILE_SCACHE_P
- /* Cache hits, misses. */
- unsigned long hits, misses;
-#define CPU_SCACHE_HITS(cpu) ((cpu) -> cgen_cpu.scache.hits)
-#define CPU_SCACHE_MISSES(cpu) ((cpu) -> cgen_cpu.scache.misses)
-
-#if WITH_SCACHE_PBB
- /* Chain length counts.
- Each element is a count of the number of chains created with that
- length. */
- unsigned long *chain_lengths;
-#define CPU_SCACHE_CHAIN_LENGTHS(cpu) ((cpu) -> cgen_cpu.scache.chain_lengths)
- /* Number of times cache was flushed due to its being full. */
- unsigned long full_flushes;
-#define CPU_SCACHE_FULL_FLUSHES(cpu) ((cpu) -> cgen_cpu.scache.full_flushes)
-#endif
-#endif
-} CPU_SCACHE;
-
-/* Hash a PC value.
- This is split into two parts to help with moving as much of the
- computation out of the main loop. */
-#define CPU_SCACHE_HASH_MASK(cpu) (CPU_SCACHE_SIZE (cpu) - 1)
-#define SCACHE_HASH_PC(pc, mask) \
-((CGEN_MIN_INSN_SIZE == 2 ? ((pc) >> 1) \
- : CGEN_MIN_INSN_SIZE == 4 ? ((pc) >> 2) \
- : (pc)) \
- & (mask))
-
-/* Non-zero if cache is in use. */
-#define USING_SCACHE_P(sd) (STATE_SCACHE_SIZE (sd) > 0)
-
-/* Install the simulator cache into the simulator. */
-MODULE_INSTALL_FN scache_install;
-
-/* Lookup a PC value in the scache [compilation only]. */
-extern SCACHE * scache_lookup (SIM_CPU *, IADDR);
-/* Return a pointer to at least N buffers. */
-extern SCACHE *scache_lookup_or_alloc (SIM_CPU *, IADDR, int, SCACHE **);
-/* Flush all cpu's scaches. */
-extern void scache_flush (SIM_DESC);
-/* Flush a cpu's scache. */
-extern void scache_flush_cpu (SIM_CPU *);
-
-/* Scache profiling support. */
-
-/* Print summary scache usage information. */
-extern void scache_print_profile (SIM_CPU *cpu, int verbose);
-
-#if WITH_PROFILE_SCACHE_P
-
-#define PROFILE_COUNT_SCACHE_HIT(cpu) \
-do { \
- if (CPU_PROFILE_FLAGS (cpu) [PROFILE_SCACHE_IDX]) \
- ++ CPU_SCACHE_HITS (cpu); \
-} while (0)
-#define PROFILE_COUNT_SCACHE_MISS(cpu) \
-do { \
- if (CPU_PROFILE_FLAGS (cpu) [PROFILE_SCACHE_IDX]) \
- ++ CPU_SCACHE_MISSES (cpu); \
-} while (0)
-#define PROFILE_COUNT_SCACHE_CHAIN_LENGTH(cpu,length) \
-do { \
- if (CPU_PROFILE_FLAGS (cpu) [PROFILE_SCACHE_IDX]) \
- ++ CPU_SCACHE_CHAIN_LENGTHS (cpu) [length]; \
-} while (0)
-#define PROFILE_COUNT_SCACHE_FULL_FLUSH(cpu) \
-do { \
- if (CPU_PROFILE_FLAGS (cpu) [PROFILE_SCACHE_IDX]) \
- ++ CPU_SCACHE_FULL_FLUSHES (cpu); \
-} while (0)
-
-#else
-
-#define PROFILE_COUNT_SCACHE_HIT(cpu)
-#define PROFILE_COUNT_SCACHE_MISS(cpu)
-#define PROFILE_COUNT_SCACHE_CHAIN_LENGTH(cpu,length)
-#define PROFILE_COUNT_SCACHE_FULL_FLUSH(cpu)
-
-#endif
-
-#endif /* CGEN_SCACHE_H */
diff --git a/sim/common/cgen-sim.h b/sim/common/cgen-sim.h
deleted file mode 100644
index bcb8e5ab857..00000000000
--- a/sim/common/cgen-sim.h
+++ /dev/null
@@ -1,36 +0,0 @@
-/* Main header file for Cpu tools GENerated simulators.
- Copyright (C) 1998 Free Software Foundation, Inc.
- Contributed by Cygnus Support.
-
-This file is part of GDB, the GNU debugger.
-
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License along
-with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
-
-/* This file must be included after sim-base.h. */
-
-#ifndef CGEN_SIM_H
-#define CGEN_SIM_H
-
-#include "cgen-defs.h"
-#include "cgen-scache.h"
-#include "cgen-fpu.h"
-#include "cgen-par.h"
-#include "cgen-cpu.h"
-#include "cgen-trace.h"
-
-/* This is a machine generated file. */
-#include "cpuall.h"
-
-#endif /* CGEN_SIM_H */
diff --git a/sim/common/cgen-trace.c b/sim/common/cgen-trace.c
deleted file mode 100644
index 765ab57ab03..00000000000
--- a/sim/common/cgen-trace.c
+++ /dev/null
@@ -1,436 +0,0 @@
-/* Tracing support for CGEN-based simulators.
- Copyright (C) 1996, 1997, 1998, 1999 Free Software Foundation, Inc.
- Contributed by Cygnus Support.
-
-This file is part of GDB, the GNU debugger.
-
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License along
-with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
-
-#include <errno.h>
-#include "dis-asm.h"
-#include "bfd.h"
-#include "sim-main.h"
-#include "sim-fpu.h"
-
-#undef min
-#define min(a,b) ((a) < (b) ? (a) : (b))
-
-#ifndef SIZE_INSTRUCTION
-#define SIZE_INSTRUCTION 16
-#endif
-
-#ifndef SIZE_LOCATION
-#define SIZE_LOCATION 20
-#endif
-
-#ifndef SIZE_PC
-#define SIZE_PC 6
-#endif
-
-#ifndef SIZE_LINE_NUMBER
-#define SIZE_LINE_NUMBER 4
-#endif
-
-#ifndef SIZE_CYCLE_COUNT
-#define SIZE_CYCLE_COUNT 2
-#endif
-
-#ifndef SIZE_TOTAL_CYCLE_COUNT
-#define SIZE_TOTAL_CYCLE_COUNT 9
-#endif
-
-#ifndef SIZE_TRACE_BUF
-#define SIZE_TRACE_BUF 1024
-#endif
-
-/* Text is queued in TRACE_BUF because we want to output the insn's cycle
- count first but that isn't known until after the insn has executed.
- This also handles the queueing of trace results, TRACE_RESULT may be
- called multiple times for one insn. */
-static char trace_buf[SIZE_TRACE_BUF];
-/* If NULL, output to stdout directly. */
-static char *bufptr;
-
-/* Non-zero if this is the first insn in a set of parallel insns. */
-static int first_insn_p;
-
-/* For communication between trace_insn and trace_result. */
-static int printed_result_p;
-
-/* Insn and its extracted fields.
- Set by trace_insn, used by trace_insn_fini.
- ??? Move to SIM_CPU to support heterogeneous multi-cpu case. */
-static const struct cgen_insn *current_insn;
-static const struct argbuf *current_abuf;
-
-void
-trace_insn_init (SIM_CPU *cpu, int first_p)
-{
- bufptr = trace_buf;
- *bufptr = 0;
- first_insn_p = first_p;
-
- /* Set to NULL so trace_insn_fini can know if trace_insn was called. */
- current_insn = NULL;
- current_abuf = NULL;
-}
-
-void
-trace_insn_fini (SIM_CPU *cpu, const struct argbuf *abuf, int last_p)
-{
- SIM_DESC sd = CPU_STATE (cpu);
-
- /* Was insn traced? It might not be if trace ranges are in effect. */
- if (current_insn == NULL)
- return;
-
- /* The first thing printed is current and total cycle counts. */
-
- if (PROFILE_MODEL_P (cpu)
- && ARGBUF_PROFILE_P (current_abuf))
- {
- unsigned long total = PROFILE_MODEL_TOTAL_CYCLES (CPU_PROFILE_DATA (cpu));
- unsigned long this_insn = PROFILE_MODEL_CUR_INSN_CYCLES (CPU_PROFILE_DATA (cpu));
-
- if (last_p)
- {
- trace_printf (sd, cpu, "%-*ld %-*ld ",
- SIZE_CYCLE_COUNT, this_insn,
- SIZE_TOTAL_CYCLE_COUNT, total);
- }
- else
- {
- trace_printf (sd, cpu, "%-*ld %-*s ",
- SIZE_CYCLE_COUNT, this_insn,
- SIZE_TOTAL_CYCLE_COUNT, "---");
- }
- }
-
- /* Print the disassembled insn. */
-
- trace_printf (sd, cpu, "%s", TRACE_PREFIX (CPU_TRACE_DATA (cpu)));
-
-#if 0
- /* Print insn results. */
- {
- const CGEN_OPINST *opinst = CGEN_INSN_OPERANDS (current_insn);
-
- if (opinst)
- {
- int i;
- int indices[MAX_OPERAND_INSTANCES];
-
- /* Fetch the operands used by the insn. */
- /* FIXME: Add fn ptr to CGEN_CPU_DESC. */
- CGEN_SYM (get_insn_operands) (CPU_CPU_DESC (cpu), current_insn,
- 0, CGEN_FIELDS_BITSIZE (&insn_fields),
- indices);
-
- for (i = 0;
- CGEN_OPINST_TYPE (opinst) != CGEN_OPINST_END;
- ++i, ++opinst)
- {
- if (CGEN_OPINST_TYPE (opinst) == CGEN_OPINST_OUTPUT)
- trace_result (cpu, current_insn, opinst, indices[i]);
- }
- }
- }
-#endif
-
- /* Print anything else requested. */
-
- if (*trace_buf)
- trace_printf (sd, cpu, " %s\n", trace_buf);
- else
- trace_printf (sd, cpu, "\n");
-}
-
-void
-trace_insn (SIM_CPU *cpu, const struct cgen_insn *opcode,
- const struct argbuf *abuf, IADDR pc)
-{
- char disasm_buf[50];
-
- printed_result_p = 0;
- current_insn = opcode;
- current_abuf = abuf;
-
- if (CGEN_INSN_VIRTUAL_P (opcode))
- {
- trace_prefix (CPU_STATE (cpu), cpu, NULL_CIA, pc, 0,
- NULL, 0, CGEN_INSN_NAME (opcode));
- return;
- }
-
- CPU_DISASSEMBLER (cpu) (cpu, opcode, abuf, pc, disasm_buf);
- trace_prefix (CPU_STATE (cpu), cpu, NULL_CIA, pc, TRACE_LINENUM_P (cpu),
- NULL, 0,
- "%s%-*s",
- first_insn_p ? " " : "|",
- SIZE_INSTRUCTION, disasm_buf);
-}
-
-void
-trace_extract (SIM_CPU *cpu, IADDR pc, char *name, ...)
-{
- va_list args;
- int printed_one_p = 0;
- char *fmt;
-
- va_start (args, name);
-
- trace_printf (CPU_STATE (cpu), cpu, "Extract: 0x%.*lx: %s ",
- SIZE_PC, pc, name);
-
- do {
- int type,ival;
-
- fmt = va_arg (args, char *);
-
- if (fmt)
- {
- if (printed_one_p)
- trace_printf (CPU_STATE (cpu), cpu, ", ");
- printed_one_p = 1;
- type = va_arg (args, int);
- switch (type)
- {
- case 'x' :
- ival = va_arg (args, int);
- trace_printf (CPU_STATE (cpu), cpu, fmt, ival);
- break;
- default :
- abort ();
- }
- }
- } while (fmt);
-
- va_end (args);
- trace_printf (CPU_STATE (cpu), cpu, "\n");
-}
-
-void
-trace_result (SIM_CPU *cpu, char *name, int type, ...)
-{
- va_list args;
-
- va_start (args, type);
- if (printed_result_p)
- cgen_trace_printf (cpu, ", ");
-
- switch (type)
- {
- case 'x' :
- default :
- cgen_trace_printf (cpu, "%s <- 0x%x", name, va_arg (args, int));
- break;
- case 'f':
- {
- DI di;
- sim_fpu f;
-
- /* this is separated from previous line for sunos cc */
- di = va_arg (args, DI);
- sim_fpu_64to (&f, di);
-
- cgen_trace_printf (cpu, "%s <- ", name);
- sim_fpu_printn_fpu (&f, (sim_fpu_print_func *) cgen_trace_printf, 4, cpu);
- break;
- }
- case 'D' :
- {
- DI di;
- /* this is separated from previous line for sunos cc */
- di = va_arg (args, DI);
- cgen_trace_printf (cpu, "%s <- 0x%x%08x", name,
- GETHIDI(di), GETLODI (di));
- break;
- }
- }
-
- printed_result_p = 1;
- va_end (args);
-}
-
-/* Print trace output to BUFPTR if active, otherwise print normally.
- This is only for tracing semantic code. */
-
-void
-cgen_trace_printf (SIM_CPU *cpu, char *fmt, ...)
-{
- va_list args;
-
- va_start (args, fmt);
-
- if (bufptr == NULL)
- {
- if (TRACE_FILE (CPU_TRACE_DATA (cpu)) == NULL)
- (* STATE_CALLBACK (CPU_STATE (cpu))->evprintf_filtered)
- (STATE_CALLBACK (CPU_STATE (cpu)), fmt, args);
- else
- vfprintf (TRACE_FILE (CPU_TRACE_DATA (cpu)), fmt, args);
- }
- else
- {
- vsprintf (bufptr, fmt, args);
- bufptr += strlen (bufptr);
- /* ??? Need version of SIM_ASSERT that is always enabled. */
- if (bufptr - trace_buf > SIZE_TRACE_BUF)
- abort ();
- }
-
- va_end (args);
-}
-
-/* Disassembly support. */
-
-/* sprintf to a "stream" */
-
-int
-sim_disasm_sprintf VPARAMS ((SFILE *f, const char *format, ...))
-{
-#ifndef __STDC__
- SFILE *f;
- const char *format;
-#endif
- int n;
- va_list args;
-
- VA_START (args, format);
-#ifndef __STDC__
- f = va_arg (args, SFILE *);
- format = va_arg (args, char *);
-#endif
- vsprintf (f->current, format, args);
- f->current += n = strlen (f->current);
- va_end (args);
- return n;
-}
-
-/* Memory read support for an opcodes disassembler. */
-
-int
-sim_disasm_read_memory (bfd_vma memaddr, bfd_byte *myaddr, int length,
- struct disassemble_info *info)
-{
- SIM_CPU *cpu = (SIM_CPU *) info->application_data;
- SIM_DESC sd = CPU_STATE (cpu);
- int length_read;
-
- length_read = sim_core_read_buffer (sd, cpu, read_map, myaddr, memaddr,
- length);
- if (length_read != length)
- return EIO;
- return 0;
-}
-
-/* Memory error support for an opcodes disassembler. */
-
-void
-sim_disasm_perror_memory (int status, bfd_vma memaddr,
- struct disassemble_info *info)
-{
- if (status != EIO)
- /* Can't happen. */
- info->fprintf_func (info->stream, "Unknown error %d.", status);
- else
- /* Actually, address between memaddr and memaddr + len was
- out of bounds. */
- info->fprintf_func (info->stream,
- "Address 0x%x is out of bounds.",
- (int) memaddr);
-}
-
-/* Disassemble using the CGEN opcode table.
- ??? While executing an instruction, the insn has been decoded and all its
- fields have been extracted. It is certainly possible to do the disassembly
- with that data. This seems simpler, but maybe in the future the already
- extracted fields will be used. */
-
-void
-sim_cgen_disassemble_insn (SIM_CPU *cpu, const CGEN_INSN *insn,
- const ARGBUF *abuf, IADDR pc, char *buf)
-{
- unsigned int length;
- unsigned int base_length;
- unsigned long insn_value;
- struct disassemble_info disasm_info;
- SFILE sfile;
- union {
- unsigned8 bytes[CGEN_MAX_INSN_SIZE];
- unsigned16 shorts[8];
- unsigned32 words[4];
- } insn_buf;
- SIM_DESC sd = CPU_STATE (cpu);
- CGEN_CPU_DESC cd = CPU_CPU_DESC (cpu);
- CGEN_EXTRACT_INFO ex_info;
- CGEN_FIELDS *fields = alloca (CGEN_CPU_SIZEOF_FIELDS (cd));
- int insn_bit_length = CGEN_INSN_BITSIZE (insn);
- int insn_length = insn_bit_length / 8;
-
- sfile.buffer = sfile.current = buf;
- INIT_DISASSEMBLE_INFO (disasm_info, (FILE *) &sfile,
- (fprintf_ftype) sim_disasm_sprintf);
- disasm_info.endian =
- (bfd_big_endian (STATE_PROG_BFD (sd)) ? BFD_ENDIAN_BIG
- : bfd_little_endian (STATE_PROG_BFD (sd)) ? BFD_ENDIAN_LITTLE
- : BFD_ENDIAN_UNKNOWN);
-
- length = sim_core_read_buffer (sd, cpu, read_map, &insn_buf, pc,
- insn_length);
-
- if (length != insn_length)
- {
- sim_io_error (sd, "unable to read address %x", pc);
- }
-
- /* If the entire insn will fit into an integer, then do it. Otherwise, just
- use the bits of the base_insn. */
- if (insn_bit_length <= 32)
- base_length = insn_bit_length;
- else
- base_length = min (cd->base_insn_bitsize, insn_bit_length);
- switch (base_length)
- {
- case 0 : return; /* fake insn, typically "compile" (aka "invalid") */
- case 8 : insn_value = insn_buf.bytes[0]; break;
- case 16 : insn_value = T2H_2 (insn_buf.shorts[0]); break;
- case 32 : insn_value = T2H_4 (insn_buf.words[0]); break;
- default: abort ();
- }
-
- disasm_info.buffer_vma = pc;
- disasm_info.buffer = insn_buf.bytes;
- disasm_info.buffer_length = length;
-
- ex_info.dis_info = (PTR) &disasm_info;
- ex_info.valid = (1 << length) - 1;
- ex_info.insn_bytes = insn_buf.bytes;
-
- length = (*CGEN_EXTRACT_FN (cd, insn)) (cd, insn, &ex_info, insn_value, fields, pc);
- /* Result of extract fn is in bits. */
- /* ??? This assumes that each instruction has a fixed length (and thus
- for insns with multiple versions of variable lengths they would each
- have their own table entry). */
- if (length == insn_bit_length)
- {
- (*CGEN_PRINT_FN (cd, insn)) (cd, &disasm_info, insn, fields, pc, length);
- }
- else
- {
- /* This shouldn't happen, but aborting is too drastic. */
- strcpy (buf, "***unknown***");
- }
-}
diff --git a/sim/common/cgen-trace.h b/sim/common/cgen-trace.h
deleted file mode 100644
index 5e796fbf061..00000000000
--- a/sim/common/cgen-trace.h
+++ /dev/null
@@ -1,91 +0,0 @@
-/* Simulator tracing support for Cpu tools GENerated simulators.
- Copyright (C) 1996, 1997, 1998, 1999 Free Software Foundation, Inc.
- Contributed by Cygnus Support.
-
-This file is part of GDB, the GNU debugger.
-
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License along
-with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
-
-#ifndef CGEN_TRACE_H
-#define CGEN_TRACE_H
-
-void trace_insn_init (SIM_CPU *, int);
-void trace_insn_fini (SIM_CPU *, const struct argbuf *, int);
-void trace_insn (SIM_CPU *, const struct cgen_insn *,
- const struct argbuf *, IADDR);
-void trace_extract (SIM_CPU *, IADDR, char *, ...);
-void trace_result (SIM_CPU *, char *, int, ...);
-void cgen_trace_printf (SIM_CPU *, char *fmt, ...);
-
-/* Trace instruction results. */
-#define TRACE_RESULT_P(cpu, abuf) (TRACE_INSN_P (cpu) && ARGBUF_TRACE_P (abuf))
-
-#define TRACE_INSN_INIT(cpu, abuf, first_p) \
-do { \
- if (TRACE_INSN_P (cpu)) \
- trace_insn_init ((cpu), (first_p)); \
-} while (0)
-#define TRACE_INSN_FINI(cpu, abuf, last_p) \
-do { \
- if (TRACE_INSN_P (cpu)) \
- trace_insn_fini ((cpu), (abuf), (last_p)); \
-} while (0)
-#define TRACE_PRINTF(cpu, what, args) \
-do { \
- if (TRACE_P ((cpu), (what))) \
- cgen_trace_printf args ; \
-} while (0)
-#define TRACE_INSN(cpu, insn, abuf, pc) \
-do { \
- if (TRACE_INSN_P (cpu) && ARGBUF_TRACE_P (abuf)) \
- trace_insn ((cpu), (insn), (abuf), (pc)) ; \
-} while (0)
-#define TRACE_EXTRACT(cpu, abuf, args) \
-do { \
- if (TRACE_EXTRACT_P (cpu)) \
- trace_extract args ; \
-} while (0)
-#define TRACE_RESULT(cpu, abuf, name, type, val) \
-do { \
- if (TRACE_RESULT_P ((cpu), (abuf))) \
- trace_result ((cpu), (name), (type), (val)) ; \
-} while (0)
-
-/* Disassembly support. */
-
-/* Function to use for cgen-based disassemblers. */
-extern CGEN_DISASSEMBLER sim_cgen_disassemble_insn;
-
-/* Pseudo FILE object for strings. */
-typedef struct {
- char *buffer;
- char *current;
-} SFILE;
-
-/* String printer for the disassembler. */
-extern int sim_disasm_sprintf (SFILE *, const char *, ...);
-
-/* For opcodes based disassemblers. */
-#ifdef BFD_VERSION
-struct disassemble_info;
-extern int
-sim_disasm_read_memory (bfd_vma memaddr_, bfd_byte *myaddr_, int length_,
- struct disassemble_info *info_);
-extern void
-sim_disasm_perror_memory (int status_, bfd_vma memaddr_,
- struct disassemble_info *info_);
-#endif
-
-#endif /* CGEN_TRACE_H */
diff --git a/sim/common/cgen-types.h b/sim/common/cgen-types.h
deleted file mode 100644
index dd85d4ce7e5..00000000000
--- a/sim/common/cgen-types.h
+++ /dev/null
@@ -1,112 +0,0 @@
-/* Types for Cpu tools GENerated simulators.
- Copyright (C) 1996, 1997, 1998, 1999 Free Software Foundation, Inc.
- Contributed by Cygnus Support.
-
-This file is part of GDB, the GNU debugger.
-
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License along
-with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
-
-/* This file is not included with cgen-sim.h as it defines types
- needed by sim-base.h. */
-
-#ifndef CGEN_TYPES_H
-#define CGEN_TYPES_H
-
-/* Miscellaneous cgen configury defined here as this file gets
- included soon enough. */
-
-/* Indicate we support --profile-model. */
-#undef SIM_HAVE_MODEL
-#define SIM_HAVE_MODEL
-
-/* Indicate we support --{profile,trace}-{range,function}. */
-#undef SIM_HAVE_ADDR_RANGE
-#define SIM_HAVE_ADDR_RANGE
-
-#ifdef __GNUC__
-#define HAVE_LONGLONG
-#undef DI_FN_SUPPORT
-#else
-#undef HAVE_LONGLONG
-#define DI_FN_SUPPORT
-#endif
-
-/* Mode support. */
-
-/* Common mode types. */
-/* ??? Target specific modes. */
-typedef enum mode_type {
- MODE_VOID, MODE_BI,
- MODE_QI, MODE_HI, MODE_SI, MODE_DI,
- MODE_UQI, MODE_UHI, MODE_USI, MODE_UDI,
- MODE_SF, MODE_DF, MODE_XF, MODE_TF,
- MODE_TARGET_MAX /* = MODE_TF? */,
- /* These are host modes. */
- MODE_INT, MODE_UINT, MODE_PTR, /*??? MODE_ADDR, MODE_IADDR,*/
- MODE_MAX
-} MODE_TYPE;
-
-#define MAX_TARGET_MODES ((int) MODE_TARGET_MAX)
-#define MAX_MODES ((int) MODE_MAX)
-
-extern const char *mode_names[];
-#define MODE_NAME(m) (mode_names[m])
-
-typedef void VOID;
-typedef unsigned char BI;
-typedef signed8 QI;
-typedef signed16 HI;
-typedef signed32 SI;
-typedef unsigned8 UQI;
-typedef unsigned16 UHI;
-typedef unsigned32 USI;
-
-#ifdef HAVE_LONGLONG
-typedef signed64 DI;
-typedef unsigned64 UDI;
-#define GETLODI(di) ((SI) (di))
-#define GETHIDI(di) ((SI) ((UDI) (di) >> 32))
-#define SETLODI(di, val) ((di) = (((di) & 0xffffffff00000000LL) | (val)))
-#define SETHIDI(di, val) ((di) = (((di) & 0xffffffffLL) | (((DI) (val)) << 32)))
-#define SETDI(di, hi, lo) ((di) = MAKEDI (hi, lo))
-#define MAKEDI(hi, lo) ((((DI) (SI) (hi)) << 32) | ((UDI) (USI) (lo)))
-#else
-/* DI mode support if "long long" doesn't exist.
- At one point CGEN supported K&R C compilers, and ANSI C compilers without
- "long long". One can argue the various merits of keeping this in or
- throwing it out. I went to the trouble of adding it so for the time being
- I'm leaving it in. */
-typedef struct { SI hi,lo; } DI;
-typedef DI UDI;
-#define GETLODI(di) ((di).lo)
-#define GETHIDI(di) ((di).hi)
-#define SETLODI(di, val) ((di).lo = (val))
-#define SETHIDI(di, val) ((di).hi = (val))
-#define SETDI(di, hi, lo) ((di) = MAKEDI (hi, lo))
-extern DI make_struct_di (SI, SI);
-#define MAKEDI(hi, lo) (make_struct_di ((hi), (lo)))
-#endif
-
-/* These are used to record extracted raw data from an instruction, among other
- things. It must be a host data type, and not a target one. */
-typedef int INT;
-typedef unsigned int UINT;
-
-typedef unsigned_address ADDR; /* FIXME: wip*/
-typedef unsigned_address IADDR; /* FIXME: wip*/
-
-/* fp types are in cgen-fpu.h */
-
-#endif /* CGEN_TYPES_H */
diff --git a/sim/common/cgen-utils.c b/sim/common/cgen-utils.c
deleted file mode 100644
index 8383196595d..00000000000
--- a/sim/common/cgen-utils.c
+++ /dev/null
@@ -1,438 +0,0 @@
-/* Support code for various pieces of CGEN simulators.
- Copyright (C) 1996, 1997, 1998, 1999 Free Software Foundation, Inc.
- Contributed by Cygnus Support.
-
-This file is part of GDB, the GNU debugger.
-
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License along
-with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
-
-#include "bfd.h"
-#include "sim-main.h"
-#include "dis-asm.h"
-
-#define MEMOPS_DEFINE_INLINE
-#include "cgen-mem.h"
-
-#define SEMOPS_DEFINE_INLINE
-#include "cgen-ops.h"
-
-#undef min
-#define min(a,b) ((a) < (b) ? (a) : (b))
-
-const char *mode_names[] = {
- "VOID",
- "BI",
- "QI",
- "HI",
- "SI",
- "DI",
- "UQI",
- "UHI",
- "USI",
- "UDI",
- "SF",
- "DF",
- "XF",
- "TF",
- 0, /* MODE_TARGET_MAX */
- "INT",
- "UINT",
- "PTR"
-};
-
-/* Opcode table for virtual insns used by the simulator. */
-
-#define V CGEN_ATTR_MASK (CGEN_INSN_VIRTUAL)
-
-static const CGEN_IBASE virtual_insn_entries[] =
-{
- {
- VIRTUAL_INSN_X_INVALID, "--invalid--", NULL, 0, { V, { 0 } }
- },
- {
- VIRTUAL_INSN_X_BEFORE, "--before--", NULL, 0, { V, { 0 } }
- },
- {
- VIRTUAL_INSN_X_AFTER, "--after--", NULL, 0, { V, { 0 } }
- },
- {
- VIRTUAL_INSN_X_BEGIN, "--begin--", NULL, 0, { V, { 0 } }
- },
- {
- VIRTUAL_INSN_X_CHAIN, "--chain--", NULL, 0, { V, { 0 } }
- },
- {
- VIRTUAL_INSN_X_CTI_CHAIN, "--cti-chain--", NULL, 0, { V, { 0 } }
- }
-};
-
-#undef V
-
-const CGEN_INSN cgen_virtual_insn_table[] =
-{
- { & virtual_insn_entries[0] },
- { & virtual_insn_entries[1] },
- { & virtual_insn_entries[2] },
- { & virtual_insn_entries[3] },
- { & virtual_insn_entries[4] },
- { & virtual_insn_entries[5] }
-};
-
-/* Initialize cgen things.
- This is called after sim_post_argv_init. */
-
-void
-cgen_init (SIM_DESC sd)
-{
- int i, c;
-
- /* If no profiling or tracing has been enabled, run in fast mode. */
- {
- int run_fast_p = 1;
-
- for (c = 0; c < MAX_NR_PROCESSORS; ++c)
- {
- SIM_CPU *cpu = STATE_CPU (sd, c);
-
- for (i = 0; i < MAX_PROFILE_VALUES; ++i)
- if (CPU_PROFILE_FLAGS (cpu) [i])
- {
- run_fast_p = 0;
- break;
- }
- for (i = 0; i < MAX_TRACE_VALUES; ++i)
- if (CPU_TRACE_FLAGS (cpu) [i])
- {
- run_fast_p = 0;
- break;
- }
- if (! run_fast_p)
- break;
- }
- STATE_RUN_FAST_P (sd) = run_fast_p;
- }
-}
-
-/* Return the name of insn number I. */
-
-const char *
-cgen_insn_name (SIM_CPU *cpu, int i)
-{
- return CGEN_INSN_NAME ((* CPU_GET_IDATA (cpu)) ((cpu), (i)));
-}
-
-/* Return the maximum number of extra bytes required for a SIM_CPU struct. */
-
-int
-cgen_cpu_max_extra_bytes (void)
-{
- int i;
- int extra = 0;
-
- for (i = 0; sim_machs[i] != 0; ++i)
- {
- int size = IMP_PROPS_SIM_CPU_SIZE (MACH_IMP_PROPS (sim_machs[i]));
- if (size > extra)
- extra = size;
- }
- return extra;
-}
-
-#ifdef DI_FN_SUPPORT
-
-DI
-make_struct_di (hi, lo)
- SI hi, lo;
-{
- DI result;
-
- result.hi = hi;
- result.lo = lo;
- return result;
-}
-
-DI
-ANDDI (a, b)
- DI a, b;
-{
- SI ahi = GETHIDI (a);
- SI alo = GETLODI (a);
- SI bhi = GETHIDI (b);
- SI blo = GETLODI (b);
- return MAKEDI (ahi & bhi, alo & blo);
-}
-
-DI
-ORDI (a, b)
- DI a, b;
-{
- SI ahi = GETHIDI (a);
- SI alo = GETLODI (a);
- SI bhi = GETHIDI (b);
- SI blo = GETLODI (b);
- return MAKEDI (ahi | bhi, alo | blo);
-}
-
-DI
-ADDDI (a, b)
- DI a, b;
-{
- USI ahi = GETHIDI (a);
- USI alo = GETLODI (a);
- USI bhi = GETHIDI (b);
- USI blo = GETLODI (b);
- USI x = alo + blo;
- return MAKEDI (ahi + bhi + (x < alo), x);
-}
-
-DI
-MULDI (a, b)
- DI a, b;
-{
- USI ahi = GETHIDI (a);
- USI alo = GETLODI (a);
- USI bhi = GETHIDI (b);
- USI blo = GETLODI (b);
- USI rhi,rlo;
- USI x0, x1, x2, x3;
-
- x0 = alo * blo;
- x1 = alo * bhi;
- x2 = ahi * blo;
- x3 = ahi * bhi;
-
-#define SI_TYPE_SIZE 32
-#define BITS4 (SI_TYPE_SIZE / 4)
-#define ll_B (1L << (SI_TYPE_SIZE / 2))
-#define ll_lowpart(t) ((USI) (t) % ll_B)
-#define ll_highpart(t) ((USI) (t) / ll_B)
- x1 += ll_highpart (x0); /* this can't give carry */
- x1 += x2; /* but this indeed can */
- if (x1 < x2) /* did we get it? */
- x3 += ll_B; /* yes, add it in the proper pos. */
-
- rhi = x3 + ll_highpart (x1);
- rlo = ll_lowpart (x1) * ll_B + ll_lowpart (x0);
- return MAKEDI (rhi + (alo * bhi) + (ahi * blo), rlo);
-}
-
-DI
-SHLDI (val, shift)
- DI val;
- SI shift;
-{
- USI hi = GETHIDI (val);
- USI lo = GETLODI (val);
- /* FIXME: Need to worry about shift < 0 || shift >= 32. */
- return MAKEDI ((hi << shift) | (lo >> (32 - shift)), lo << shift);
-}
-
-DI
-SLADI (val, shift)
- DI val;
- SI shift;
-{
- SI hi = GETHIDI (val);
- USI lo = GETLODI (val);
- /* FIXME: Need to worry about shift < 0 || shift >= 32. */
- return MAKEDI ((hi << shift) | (lo >> (32 - shift)), lo << shift);
-}
-
-DI
-SRADI (val, shift)
- DI val;
- SI shift;
-{
- SI hi = GETHIDI (val);
- USI lo = GETLODI (val);
- /* We use SRASI because the result is implementation defined if hi < 0. */
- /* FIXME: Need to worry about shift < 0 || shift >= 32. */
- return MAKEDI (SRASI (hi, shift), (hi << (32 - shift)) | (lo >> shift));
-}
-
-int
-GEDI (a, b)
- DI a, b;
-{
- SI ahi = GETHIDI (a);
- USI alo = GETLODI (a);
- SI bhi = GETHIDI (b);
- USI blo = GETLODI (b);
- if (ahi > bhi)
- return 1;
- if (ahi == bhi)
- return alo >= blo;
- return 0;
-}
-
-int
-LEDI (a, b)
- DI a, b;
-{
- SI ahi = GETHIDI (a);
- USI alo = GETLODI (a);
- SI bhi = GETHIDI (b);
- USI blo = GETLODI (b);
- if (ahi < bhi)
- return 1;
- if (ahi == bhi)
- return alo <= blo;
- return 0;
-}
-
-DI
-CONVHIDI (val)
- HI val;
-{
- if (val < 0)
- return MAKEDI (-1, val);
- else
- return MAKEDI (0, val);
-}
-
-DI
-CONVSIDI (val)
- SI val;
-{
- if (val < 0)
- return MAKEDI (-1, val);
- else
- return MAKEDI (0, val);
-}
-
-SI
-CONVDISI (val)
- DI val;
-{
- return GETLODI (val);
-}
-
-#endif /* DI_FN_SUPPORT */
-
-QI
-RORQI (val, shift)
- QI val;
- int shift;
-{
- if (shift != 0)
- {
- int remain = 8 - shift;
- int mask = (1 << shift) - 1;
- QI result = (val & mask) << remain;
- mask = (1 << remain) - 1;
- result |= (val >> shift) & mask;
- return result;
- }
- return val;
-}
-
-QI
-ROLQI (val, shift)
- QI val;
- int shift;
-{
- if (shift != 0)
- {
- int remain = 8 - shift;
- int mask = (1 << remain) - 1;
- QI result = (val & mask) << shift;
- mask = (1 << shift) - 1;
- result |= (val >> remain) & mask;
- return result;
- }
- return val;
-}
-
-HI
-RORHI (val, shift)
- HI val;
- int shift;
-{
- if (shift != 0)
- {
- int remain = 16 - shift;
- int mask = (1 << shift) - 1;
- HI result = (val & mask) << remain;
- mask = (1 << remain) - 1;
- result |= (val >> shift) & mask;
- return result;
- }
- return val;
-}
-
-HI
-ROLHI (val, shift)
- HI val;
- int shift;
-{
- if (shift != 0)
- {
- int remain = 16 - shift;
- int mask = (1 << remain) - 1;
- HI result = (val & mask) << shift;
- mask = (1 << shift) - 1;
- result |= (val >> remain) & mask;
- return result;
- }
- return val;
-}
-
-SI
-RORSI (val, shift)
- SI val;
- int shift;
-{
- if (shift != 0)
- {
- int remain = 32 - shift;
- int mask = (1 << shift) - 1;
- SI result = (val & mask) << remain;
- mask = (1 << remain) - 1;
- result |= (val >> shift) & mask;
- return result;
- }
- return val;
-}
-
-SI
-ROLSI (val, shift)
- SI val;
- int shift;
-{
- if (shift != 0)
- {
- int remain = 32 - shift;
- int mask = (1 << remain) - 1;
- SI result = (val & mask) << shift;
- mask = (1 << shift) - 1;
- result |= (val >> remain) & mask;
- return result;
- }
-
- return val;
-}
-
-/* Emit an error message from CGEN RTL. */
-
-void
-cgen_rtx_error (SIM_CPU *cpu, const char * msg)
-{
- SIM_DESC sd = CPU_STATE (cpu);
-
- sim_io_printf (sd, msg);
- sim_io_printf (sd, "\n");
-
- sim_engine_halt (sd, cpu, NULL, CIA_GET (cpu), sim_stopped, SIM_SIGTRAP);
-}
diff --git a/sim/common/cgen.sh b/sim/common/cgen.sh
deleted file mode 100644
index bf467e13baa..00000000000
--- a/sim/common/cgen.sh
+++ /dev/null
@@ -1,222 +0,0 @@
-#! /bin/sh
-# Generate CGEN simulator files.
-#
-# Usage: /bin/sh cgen.sh {"arch"|"cpu"|"decode"|"defs"|"cpu-decode"} \
-# srcdir cgen cgendir cgenflags \
-# arch archflags cpu mach suffix extrafiles
-#
-# We store the generated files in the source directory until we decide to
-# ship a Scheme interpreter (or other implementation) with gdb/binutils.
-# Maybe we never will.
-
-# We want to behave like make, any error forces us to stop.
-set -e
-
-action=$1
-srcdir=$2
-cgen=$3
-cgendir=$4
-cgenflags=$5
-arch=$6
-archflags=$7
-cpu=$8
-isa=$9
-# portably bring parameters beyond $9 into view
-shift ; mach=$9
-shift ; suffix=$9
-shift ; extrafiles=$9
-
-rootdir=${srcdir}/../..
-
-if test -z "$isa" ; then
- isa=all
- prefix=$cpu
-else
- prefix=${cpu}_$isa
-fi
-
-lowercase='abcdefghijklmnopqrstuvwxyz'
-uppercase='ABCDEFGHIJKLMNOPQRSTUVWXYZ'
-ARCH=`echo ${arch} | tr "${lowercase}" "${uppercase}"`
-CPU=`echo ${cpu} | tr "${lowercase}" "${uppercase}"`
-PREFIX=`echo ${prefix} | tr "${lowercase}" "${uppercase}"`
-
-sedscript="\
--e s/@ARCH@/${ARCH}/g -e s/@arch@/${arch}/g \
--e s/@CPU@/${CPU}/g -e s/@cpu@/${cpu}/g \
--e s/@PREFIX@/${PREFIX}/g -e s/@prefix@/${prefix}/g"
-
-case $action in
-arch)
- rm -f tmp-arch.h1 tmp-arch.h
- rm -f tmp-arch.c1 tmp-arch.c
- rm -f tmp-all.h1 tmp-all.h
-
- ${cgen} -s ${cgendir}/cgen-sim.scm \
- -s ${cgendir} \
- ${cgenflags} \
- -f "${archflags}" \
- -m ${mach} \
- -a ${arch} \
- -i ${isa} \
- -A tmp-arch.h1 \
- -B tmp-arch.c1 \
- -N tmp-all.h1
- sed $sedscript < tmp-arch.h1 > tmp-arch.h
- ${rootdir}/move-if-change tmp-arch.h ${srcdir}/arch.h
- sed $sedscript < tmp-arch.c1 > tmp-arch.c
- ${rootdir}/move-if-change tmp-arch.c ${srcdir}/arch.c
- sed $sedscript < tmp-all.h1 > tmp-all.h
- ${rootdir}/move-if-change tmp-all.h ${srcdir}/cpuall.h
-
- rm -f tmp-arch.h1 tmp-arch.c1 tmp-all.h1
- ;;
-
-cpu | decode | cpu-decode)
-
- fileopts=""
- case $action in
- *cpu*)
- rm -f tmp-cpu.h1 tmp-cpu.c1
- rm -f tmp-ext.c1 tmp-read.c1 tmp-write.c1
- rm -f tmp-sem.c1 tmp-semsw.c1
- rm -f tmp-mod.c1
- rm -f tmp-cpu.h tmp-cpu.c
- rm -f tmp-ext.c tmp-read.c tmp-write.c
- rm -f tmp-sem.c tmp-semsw.c tmp-mod.c
- fileopts="$fileopts \
- -C tmp-cpu.h1 \
- -U tmp-cpu.c1 \
- -M tmp-mod.c1 \
- ${extrafiles}"
- ;;
- esac
- case $action in
- *decode*)
- rm -f tmp-dec.h1 tmp-dec.h tmp-dec.c1 tmp-dec.c
- fileopts="$fileopts \
- -T tmp-dec.h1 \
- -D tmp-dec.c1"
- case "$extrafiles" in
- ignored) # Do nothing.
- ;;
- *) fileopts="$fileopts $extrafiles"
- ;;
- esac
- ;;
- esac
-
- ${cgen} -s ${cgendir}/cgen-sim.scm \
- -s ${cgendir} \
- ${cgenflags} \
- -f "${archflags}" \
- -m ${mach} \
- -a ${arch} \
- -i ${isa} \
- ${fileopts}
-
- case $action in
- *cpu*)
- sed $sedscript < tmp-cpu.h1 > tmp-cpu.h
- ${rootdir}/move-if-change tmp-cpu.h ${srcdir}/cpu${suffix}.h
- sed $sedscript < tmp-cpu.c1 > tmp-cpu.c
- ${rootdir}/move-if-change tmp-cpu.c ${srcdir}/cpu${suffix}.c
- sed $sedscript < tmp-mod.c1 > tmp-mod.c
- ${rootdir}/move-if-change tmp-mod.c ${srcdir}/model${suffix}.c
- if test -f tmp-ext.c1 ; then \
- sed $sedscript < tmp-ext.c1 > tmp-ext.c ; \
- ${rootdir}/move-if-change tmp-ext.c ${srcdir}/extract${suffix}.c ; \
- fi
- if test -f tmp-read.c1 ; then \
- sed $sedscript < tmp-read.c1 > tmp-read.c ; \
- ${rootdir}/move-if-change tmp-read.c ${srcdir}/read${suffix}.c ; \
- fi
- if test -f tmp-write.c1 ; then \
- sed $sedscript < tmp-write.c1 > tmp-write.c ; \
- ${rootdir}/move-if-change tmp-write.c ${srcdir}/write${suffix}.c ; \
- fi
- if test -f tmp-sem.c1 ; then \
- sed $sedscript < tmp-sem.c1 > tmp-sem.c ; \
- ${rootdir}/move-if-change tmp-sem.c ${srcdir}/sem${suffix}.c ; \
- fi
- if test -f tmp-semsw.c1 ; then \
- sed $sedscript < tmp-semsw.c1 > tmp-semsw.c ; \
- ${rootdir}/move-if-change tmp-semsw.c ${srcdir}/sem${suffix}-switch.c ; \
- fi
-
- rm -f tmp-cpu.h1 tmp-cpu.c1
- rm -f tmp-ext.c1 tmp-read.c1 tmp-write.c1
- rm -f tmp-sem.c1 tmp-semsw.c1 tmp-mod.c1
- ;;
- esac
-
- case $action in
- *decode*)
- sed $sedscript < tmp-dec.h1 > tmp-dec.h
- ${rootdir}/move-if-change tmp-dec.h ${srcdir}/decode${suffix}.h
- sed $sedscript < tmp-dec.c1 > tmp-dec.c
- ${rootdir}/move-if-change tmp-dec.c ${srcdir}/decode${suffix}.c
-
- if test -f tmp-sem.c1 ; then \
- sed $sedscript < tmp-sem.c1 > tmp-sem.c ; \
- ${rootdir}/move-if-change tmp-sem.c ${srcdir}/sem${suffix}.c ; \
- fi
- if test -f tmp-semsw.c1 ; then \
- sed $sedscript < tmp-semsw.c1 > tmp-semsw.c ; \
- ${rootdir}/move-if-change tmp-semsw.c ${srcdir}/sem${suffix}-switch.c ; \
- fi
-
- rm -f tmp-dec.h1 tmp-dec.c1
- ;;
- esac
-
- ;;
-
-defs)
- rm -f tmp-defs.h1 tmp-defs.h
-
- ${cgen} -s ${cgendir}/cgen-sim.scm \
- -s ${cgendir} \
- ${cgenflags} \
- -f "${archflags}" \
- -m ${mach} \
- -a ${arch} \
- -i ${isa} \
- -G tmp-defs.h1
- sed $sedscript < tmp-defs.h1 > tmp-defs.h
- ${rootdir}/move-if-change tmp-defs.h ${srcdir}/defs${suffix}.h
- ;;
-
-desc)
- rm -f tmp-desc.h1 tmp-desc.h
- rm -f tmp-desc.c1 tmp-desc.c
- rm -f tmp-opc.h1 tmp-opc.h
-
- ${cgen} -s ${cgendir}/cgen-opc.scm \
- -s ${cgendir} \
- ${cgenflags} \
- -f "${archflags}" \
- -m ${mach} \
- -a ${arch} \
- -i ${isa} \
- -H tmp-desc.h1 \
- -C tmp-desc.c1 \
- -O tmp-opc.h1
- sed $sedscript < tmp-desc.h1 > tmp-desc.h
- ${rootdir}/move-if-change tmp-desc.h ${srcdir}/${arch}-desc.h
- sed $sedscript < tmp-desc.c1 > tmp-desc.c
- ${rootdir}/move-if-change tmp-desc.c ${srcdir}/${arch}-desc.c
- sed $sedscript < tmp-opc.h1 > tmp-opc.h
- ${rootdir}/move-if-change tmp-opc.h ${srcdir}/${arch}-opc.h
-
- rm -f tmp-desc.h1 tmp-desc.c1 tmp-opc.h1
- ;;
-
-*)
- echo "`basename $0`: unknown action: ${action}" >&2
- exit 1
- ;;
-
-esac
-
-exit 0
diff --git a/sim/common/config.in b/sim/common/config.in
deleted file mode 100644
index 0b222e8b6ef..00000000000
--- a/sim/common/config.in
+++ /dev/null
@@ -1,182 +0,0 @@
-/* config.in. Generated automatically from configure.in by autoheader. */
-
-/* Define if using alloca.c. */
-#undef C_ALLOCA
-
-/* Define to empty if the keyword does not work. */
-#undef const
-
-/* Define to one of _getb67, GETB67, getb67 for Cray-2 and Cray-YMP systems.
- This function is required for alloca.c support on those systems. */
-#undef CRAY_STACKSEG_END
-
-/* Define if you have alloca, as a function or macro. */
-#undef HAVE_ALLOCA
-
-/* Define if you have <alloca.h> and it should be used (not on Ultrix). */
-#undef HAVE_ALLOCA_H
-
-/* Define if you have a working `mmap' system call. */
-#undef HAVE_MMAP
-
-/* Define as __inline if that's what the C compiler calls it. */
-#undef inline
-
-/* Define to `long' if <sys/types.h> doesn't define. */
-#undef off_t
-
-/* Define if you need to in order for stat and other things to work. */
-#undef _POSIX_SOURCE
-
-/* Define as the return type of signal handlers (int or void). */
-#undef RETSIGTYPE
-
-/* Define to `unsigned' if <sys/types.h> doesn't define. */
-#undef size_t
-
-/* If using the C implementation of alloca, define if you know the
- direction of stack growth for your system; otherwise it will be
- automatically deduced at run-time.
- STACK_DIRECTION > 0 => grows toward higher addresses
- STACK_DIRECTION < 0 => grows toward lower addresses
- STACK_DIRECTION = 0 => direction of growth unknown
- */
-#undef STACK_DIRECTION
-
-/* Define if you have the ANSI C header files. */
-#undef STDC_HEADERS
-
-/* Define to 1 if NLS is requested. */
-#undef ENABLE_NLS
-
-/* Define as 1 if you have gettext and don't want to use GNU gettext. */
-#undef HAVE_GETTEXT
-
-/* Define as 1 if you have the stpcpy function. */
-#undef HAVE_STPCPY
-
-/* Define if your locale.h file contains LC_MESSAGES. */
-#undef HAVE_LC_MESSAGES
-
-/* Define if you have the __argz_count function. */
-#undef HAVE___ARGZ_COUNT
-
-/* Define if you have the __argz_next function. */
-#undef HAVE___ARGZ_NEXT
-
-/* Define if you have the __argz_stringify function. */
-#undef HAVE___ARGZ_STRINGIFY
-
-/* Define if you have the __setfpucw function. */
-#undef HAVE___SETFPUCW
-
-/* Define if you have the dcgettext function. */
-#undef HAVE_DCGETTEXT
-
-/* Define if you have the getcwd function. */
-#undef HAVE_GETCWD
-
-/* Define if you have the getpagesize function. */
-#undef HAVE_GETPAGESIZE
-
-/* Define if you have the getrusage function. */
-#undef HAVE_GETRUSAGE
-
-/* Define if you have the mmap function. */
-#undef HAVE_MMAP
-
-/* Define if you have the munmap function. */
-#undef HAVE_MUNMAP
-
-/* Define if you have the putenv function. */
-#undef HAVE_PUTENV
-
-/* Define if you have the setenv function. */
-#undef HAVE_SETENV
-
-/* Define if you have the setlocale function. */
-#undef HAVE_SETLOCALE
-
-/* Define if you have the sigaction function. */
-#undef HAVE_SIGACTION
-
-/* Define if you have the stpcpy function. */
-#undef HAVE_STPCPY
-
-/* Define if you have the strcasecmp function. */
-#undef HAVE_STRCASECMP
-
-/* Define if you have the strchr function. */
-#undef HAVE_STRCHR
-
-/* Define if you have the time function. */
-#undef HAVE_TIME
-
-/* Define if you have the <argz.h> header file. */
-#undef HAVE_ARGZ_H
-
-/* Define if you have the <dlfcn.h> header file. */
-#undef HAVE_DLFCN_H
-
-/* Define if you have the <errno.h> header file. */
-#undef HAVE_ERRNO_H
-
-/* Define if you have the <fcntl.h> header file. */
-#undef HAVE_FCNTL_H
-
-/* Define if you have the <fpu_control.h> header file. */
-#undef HAVE_FPU_CONTROL_H
-
-/* Define if you have the <limits.h> header file. */
-#undef HAVE_LIMITS_H
-
-/* Define if you have the <locale.h> header file. */
-#undef HAVE_LOCALE_H
-
-/* Define if you have the <malloc.h> header file. */
-#undef HAVE_MALLOC_H
-
-/* Define if you have the <nl_types.h> header file. */
-#undef HAVE_NL_TYPES_H
-
-/* Define if you have the <stdlib.h> header file. */
-#undef HAVE_STDLIB_H
-
-/* Define if you have the <string.h> header file. */
-#undef HAVE_STRING_H
-
-/* Define if you have the <strings.h> header file. */
-#undef HAVE_STRINGS_H
-
-/* Define if you have the <sys/mman.h> header file. */
-#undef HAVE_SYS_MMAN_H
-
-/* Define if you have the <sys/param.h> header file. */
-#undef HAVE_SYS_PARAM_H
-
-/* Define if you have the <sys/resource.h> header file. */
-#undef HAVE_SYS_RESOURCE_H
-
-/* Define if you have the <sys/stat.h> header file. */
-#undef HAVE_SYS_STAT_H
-
-/* Define if you have the <sys/time.h> header file. */
-#undef HAVE_SYS_TIME_H
-
-/* Define if you have the <sys/times.h> header file. */
-#undef HAVE_SYS_TIMES_H
-
-/* Define if you have the <time.h> header file. */
-#undef HAVE_TIME_H
-
-/* Define if you have the <unistd.h> header file. */
-#undef HAVE_UNISTD_H
-
-/* Define if you have the <values.h> header file. */
-#undef HAVE_VALUES_H
-
-/* Define if you have the nsl library (-lnsl). */
-#undef HAVE_LIBNSL
-
-/* Define if you have the socket library (-lsocket). */
-#undef HAVE_LIBSOCKET
diff --git a/sim/common/configure b/sim/common/configure
deleted file mode 100755
index 11c0e64e6c9..00000000000
--- a/sim/common/configure
+++ /dev/null
@@ -1,4049 +0,0 @@
-#! /bin/sh
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-sim_inline="-DDEFAULT_INLINE=0"
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-# This file is derived from `gettext.m4'. The difference is that the
-# included macros assume Cygnus-style source and build trees.
-
-# Macro to add for using GNU gettext.
-# Ulrich Drepper <drepper@cygnus.com>, 1995.
-#
-# This file file be copied and used freely without restrictions. It can
-# be used in projects which are not available under the GNU Public License
-# but which still want to provide support for the GNU gettext functionality.
-# Please note that the actual code is *not* freely available.
-
-# serial 3
-
-
-
-
-
-# Search path for a program which passes the given test.
-# Ulrich Drepper <drepper@cygnus.com>, 1996.
-#
-# This file file be copied and used freely without restrictions. It can
-# be used in projects which are not available under the GNU Public License
-# but which still want to provide support for the GNU gettext functionality.
-# Please note that the actual code is *not* freely available.
-
-# serial 1
-
-
-
-# Check whether LC_MESSAGES is available in <locale.h>.
-# Ulrich Drepper <drepper@cygnus.com>, 1995.
-#
-# This file file be copied and used freely without restrictions. It can
-# be used in projects which are not available under the GNU Public License
-# but which still want to provide support for the GNU gettext functionality.
-# Please note that the actual code is *not* freely available.
-
-# serial 1
-
-
-
-
-
-# Guess values for system-dependent variables and create Makefiles.
-# Generated automatically using autoconf version 2.13
-# Copyright (C) 1992, 93, 94, 95, 96 Free Software Foundation, Inc.
-#
-# This configure script is free software; the Free Software Foundation
-# gives unlimited permission to copy, distribute and modify it.
-
-# Defaults:
-ac_help=
-ac_default_prefix=/usr/local
-# Any additions from configure.in:
-ac_help="$ac_help
- --disable-nls do not use Native Language Support"
-ac_help="$ac_help
- --with-included-gettext use the GNU gettext library included here"
-ac_help="$ac_help
- --enable-maintainer-mode Enable developer functionality."
-ac_help="$ac_help
- --enable-sim-bswap Use Host specific BSWAP instruction."
-ac_help="$ac_help
- --enable-sim-cflags=opts Extra CFLAGS for use in building simulator"
-ac_help="$ac_help
- --enable-sim-debug=opts Enable debugging flags"
-ac_help="$ac_help
- --enable-sim-stdio Specify whether to use stdio for console input/output."
-ac_help="$ac_help
- --enable-sim-trace=opts Enable tracing flags"
-ac_help="$ac_help
- --enable-sim-profile=opts Enable profiling flags"
-
-# Initialize some variables set by options.
-# The variables have the same names as the options, with
-# dashes changed to underlines.
-build=NONE
-cache_file=./config.cache
-exec_prefix=NONE
-host=NONE
-no_create=
-nonopt=NONE
-no_recursion=
-prefix=NONE
-program_prefix=NONE
-program_suffix=NONE
-program_transform_name=s,x,x,
-silent=
-site=
-sitefile=
-srcdir=
-target=NONE
-verbose=
-x_includes=NONE
-x_libraries=NONE
-bindir='${exec_prefix}/bin'
-sbindir='${exec_prefix}/sbin'
-libexecdir='${exec_prefix}/libexec'
-datadir='${prefix}/share'
-sysconfdir='${prefix}/etc'
-sharedstatedir='${prefix}/com'
-localstatedir='${prefix}/var'
-libdir='${exec_prefix}/lib'
-includedir='${prefix}/include'
-oldincludedir='/usr/include'
-infodir='${prefix}/info'
-mandir='${prefix}/man'
-
-# Initialize some other variables.
-subdirs=
-MFLAGS= MAKEFLAGS=
-SHELL=${CONFIG_SHELL-/bin/sh}
-# Maximum number of lines to put in a shell here document.
-ac_max_here_lines=12
-
-ac_prev=
-for ac_option
-do
-
- # If the previous option needs an argument, assign it.
- if test -n "$ac_prev"; then
- eval "$ac_prev=\$ac_option"
- ac_prev=
- continue
- fi
-
- case "$ac_option" in
- -*=*) ac_optarg=`echo "$ac_option" | sed 's/[-_a-zA-Z0-9]*=//'` ;;
- *) ac_optarg= ;;
- esac
-
- # Accept the important Cygnus configure options, so we can diagnose typos.
-
- case "$ac_option" in
-
- -bindir | --bindir | --bindi | --bind | --bin | --bi)
- ac_prev=bindir ;;
- -bindir=* | --bindir=* | --bindi=* | --bind=* | --bin=* | --bi=*)
- bindir="$ac_optarg" ;;
-
- -build | --build | --buil | --bui | --bu)
- ac_prev=build ;;
- -build=* | --build=* | --buil=* | --bui=* | --bu=*)
- build="$ac_optarg" ;;
-
- -cache-file | --cache-file | --cache-fil | --cache-fi \
- | --cache-f | --cache- | --cache | --cach | --cac | --ca | --c)
- ac_prev=cache_file ;;
- -cache-file=* | --cache-file=* | --cache-fil=* | --cache-fi=* \
- | --cache-f=* | --cache-=* | --cache=* | --cach=* | --cac=* | --ca=* | --c=*)
- cache_file="$ac_optarg" ;;
-
- -datadir | --datadir | --datadi | --datad | --data | --dat | --da)
- ac_prev=datadir ;;
- -datadir=* | --datadir=* | --datadi=* | --datad=* | --data=* | --dat=* \
- | --da=*)
- datadir="$ac_optarg" ;;
-
- -disable-* | --disable-*)
- ac_feature=`echo $ac_option|sed -e 's/-*disable-//'`
- # Reject names that are not valid shell variable names.
- if test -n "`echo $ac_feature| sed 's/[-a-zA-Z0-9_]//g'`"; then
- { echo "configure: error: $ac_feature: invalid feature name" 1>&2; exit 1; }
- fi
- ac_feature=`echo $ac_feature| sed 's/-/_/g'`
- eval "enable_${ac_feature}=no" ;;
-
- -enable-* | --enable-*)
- ac_feature=`echo $ac_option|sed -e 's/-*enable-//' -e 's/=.*//'`
- # Reject names that are not valid shell variable names.
- if test -n "`echo $ac_feature| sed 's/[-_a-zA-Z0-9]//g'`"; then
- { echo "configure: error: $ac_feature: invalid feature name" 1>&2; exit 1; }
- fi
- ac_feature=`echo $ac_feature| sed 's/-/_/g'`
- case "$ac_option" in
- *=*) ;;
- *) ac_optarg=yes ;;
- esac
- eval "enable_${ac_feature}='$ac_optarg'" ;;
-
- -exec-prefix | --exec_prefix | --exec-prefix | --exec-prefi \
- | --exec-pref | --exec-pre | --exec-pr | --exec-p | --exec- \
- | --exec | --exe | --ex)
- ac_prev=exec_prefix ;;
- -exec-prefix=* | --exec_prefix=* | --exec-prefix=* | --exec-prefi=* \
- | --exec-pref=* | --exec-pre=* | --exec-pr=* | --exec-p=* | --exec-=* \
- | --exec=* | --exe=* | --ex=*)
- exec_prefix="$ac_optarg" ;;
-
- -gas | --gas | --ga | --g)
- # Obsolete; use --with-gas.
- with_gas=yes ;;
-
- -help | --help | --hel | --he)
- # Omit some internal or obsolete options to make the list less imposing.
- # This message is too long to be a string in the A/UX 3.1 sh.
- cat << EOF
-Usage: configure [options] [host]
-Options: [defaults in brackets after descriptions]
-Configuration:
- --cache-file=FILE cache test results in FILE
- --help print this message
- --no-create do not create output files
- --quiet, --silent do not print \`checking...' messages
- --site-file=FILE use FILE as the site file
- --version print the version of autoconf that created configure
-Directory and file names:
- --prefix=PREFIX install architecture-independent files in PREFIX
- [$ac_default_prefix]
- --exec-prefix=EPREFIX install architecture-dependent files in EPREFIX
- [same as prefix]
- --bindir=DIR user executables in DIR [EPREFIX/bin]
- --sbindir=DIR system admin executables in DIR [EPREFIX/sbin]
- --libexecdir=DIR program executables in DIR [EPREFIX/libexec]
- --datadir=DIR read-only architecture-independent data in DIR
- [PREFIX/share]
- --sysconfdir=DIR read-only single-machine data in DIR [PREFIX/etc]
- --sharedstatedir=DIR modifiable architecture-independent data in DIR
- [PREFIX/com]
- --localstatedir=DIR modifiable single-machine data in DIR [PREFIX/var]
- --libdir=DIR object code libraries in DIR [EPREFIX/lib]
- --includedir=DIR C header files in DIR [PREFIX/include]
- --oldincludedir=DIR C header files for non-gcc in DIR [/usr/include]
- --infodir=DIR info documentation in DIR [PREFIX/info]
- --mandir=DIR man documentation in DIR [PREFIX/man]
- --srcdir=DIR find the sources in DIR [configure dir or ..]
- --program-prefix=PREFIX prepend PREFIX to installed program names
- --program-suffix=SUFFIX append SUFFIX to installed program names
- --program-transform-name=PROGRAM
- run sed PROGRAM on installed program names
-EOF
- cat << EOF
-Host type:
- --build=BUILD configure for building on BUILD [BUILD=HOST]
- --host=HOST configure for HOST [guessed]
- --target=TARGET configure for TARGET [TARGET=HOST]
-Features and packages:
- --disable-FEATURE do not include FEATURE (same as --enable-FEATURE=no)
- --enable-FEATURE[=ARG] include FEATURE [ARG=yes]
- --with-PACKAGE[=ARG] use PACKAGE [ARG=yes]
- --without-PACKAGE do not use PACKAGE (same as --with-PACKAGE=no)
- --x-includes=DIR X include files are in DIR
- --x-libraries=DIR X library files are in DIR
-EOF
- if test -n "$ac_help"; then
- echo "--enable and --with options recognized:$ac_help"
- fi
- exit 0 ;;
-
- -host | --host | --hos | --ho)
- ac_prev=host ;;
- -host=* | --host=* | --hos=* | --ho=*)
- host="$ac_optarg" ;;
-
- -includedir | --includedir | --includedi | --included | --include \
- | --includ | --inclu | --incl | --inc)
- ac_prev=includedir ;;
- -includedir=* | --includedir=* | --includedi=* | --included=* | --include=* \
- | --includ=* | --inclu=* | --incl=* | --inc=*)
- includedir="$ac_optarg" ;;
-
- -infodir | --infodir | --infodi | --infod | --info | --inf)
- ac_prev=infodir ;;
- -infodir=* | --infodir=* | --infodi=* | --infod=* | --info=* | --inf=*)
- infodir="$ac_optarg" ;;
-
- -libdir | --libdir | --libdi | --libd)
- ac_prev=libdir ;;
- -libdir=* | --libdir=* | --libdi=* | --libd=*)
- libdir="$ac_optarg" ;;
-
- -libexecdir | --libexecdir | --libexecdi | --libexecd | --libexec \
- | --libexe | --libex | --libe)
- ac_prev=libexecdir ;;
- -libexecdir=* | --libexecdir=* | --libexecdi=* | --libexecd=* | --libexec=* \
- | --libexe=* | --libex=* | --libe=*)
- libexecdir="$ac_optarg" ;;
-
- -localstatedir | --localstatedir | --localstatedi | --localstated \
- | --localstate | --localstat | --localsta | --localst \
- | --locals | --local | --loca | --loc | --lo)
- ac_prev=localstatedir ;;
- -localstatedir=* | --localstatedir=* | --localstatedi=* | --localstated=* \
- | --localstate=* | --localstat=* | --localsta=* | --localst=* \
- | --locals=* | --local=* | --loca=* | --loc=* | --lo=*)
- localstatedir="$ac_optarg" ;;
-
- -mandir | --mandir | --mandi | --mand | --man | --ma | --m)
- ac_prev=mandir ;;
- -mandir=* | --mandir=* | --mandi=* | --mand=* | --man=* | --ma=* | --m=*)
- mandir="$ac_optarg" ;;
-
- -nfp | --nfp | --nf)
- # Obsolete; use --without-fp.
- with_fp=no ;;
-
- -no-create | --no-create | --no-creat | --no-crea | --no-cre \
- | --no-cr | --no-c)
- no_create=yes ;;
-
- -no-recursion | --no-recursion | --no-recursio | --no-recursi \
- | --no-recurs | --no-recur | --no-recu | --no-rec | --no-re | --no-r)
- no_recursion=yes ;;
-
- -oldincludedir | --oldincludedir | --oldincludedi | --oldincluded \
- | --oldinclude | --oldinclud | --oldinclu | --oldincl | --oldinc \
- | --oldin | --oldi | --old | --ol | --o)
- ac_prev=oldincludedir ;;
- -oldincludedir=* | --oldincludedir=* | --oldincludedi=* | --oldincluded=* \
- | --oldinclude=* | --oldinclud=* | --oldinclu=* | --oldincl=* | --oldinc=* \
- | --oldin=* | --oldi=* | --old=* | --ol=* | --o=*)
- oldincludedir="$ac_optarg" ;;
-
- -prefix | --prefix | --prefi | --pref | --pre | --pr | --p)
- ac_prev=prefix ;;
- -prefix=* | --prefix=* | --prefi=* | --pref=* | --pre=* | --pr=* | --p=*)
- prefix="$ac_optarg" ;;
-
- -program-prefix | --program-prefix | --program-prefi | --program-pref \
- | --program-pre | --program-pr | --program-p)
- ac_prev=program_prefix ;;
- -program-prefix=* | --program-prefix=* | --program-prefi=* \
- | --program-pref=* | --program-pre=* | --program-pr=* | --program-p=*)
- program_prefix="$ac_optarg" ;;
-
- -program-suffix | --program-suffix | --program-suffi | --program-suff \
- | --program-suf | --program-su | --program-s)
- ac_prev=program_suffix ;;
- -program-suffix=* | --program-suffix=* | --program-suffi=* \
- | --program-suff=* | --program-suf=* | --program-su=* | --program-s=*)
- program_suffix="$ac_optarg" ;;
-
- -program-transform-name | --program-transform-name \
- | --program-transform-nam | --program-transform-na \
- | --program-transform-n | --program-transform- \
- | --program-transform | --program-transfor \
- | --program-transfo | --program-transf \
- | --program-trans | --program-tran \
- | --progr-tra | --program-tr | --program-t)
- ac_prev=program_transform_name ;;
- -program-transform-name=* | --program-transform-name=* \
- | --program-transform-nam=* | --program-transform-na=* \
- | --program-transform-n=* | --program-transform-=* \
- | --program-transform=* | --program-transfor=* \
- | --program-transfo=* | --program-transf=* \
- | --program-trans=* | --program-tran=* \
- | --progr-tra=* | --program-tr=* | --program-t=*)
- program_transform_name="$ac_optarg" ;;
-
- -q | -quiet | --quiet | --quie | --qui | --qu | --q \
- | -silent | --silent | --silen | --sile | --sil)
- silent=yes ;;
-
- -sbindir | --sbindir | --sbindi | --sbind | --sbin | --sbi | --sb)
- ac_prev=sbindir ;;
- -sbindir=* | --sbindir=* | --sbindi=* | --sbind=* | --sbin=* \
- | --sbi=* | --sb=*)
- sbindir="$ac_optarg" ;;
-
- -sharedstatedir | --sharedstatedir | --sharedstatedi \
- | --sharedstated | --sharedstate | --sharedstat | --sharedsta \
- | --sharedst | --shareds | --shared | --share | --shar \
- | --sha | --sh)
- ac_prev=sharedstatedir ;;
- -sharedstatedir=* | --sharedstatedir=* | --sharedstatedi=* \
- | --sharedstated=* | --sharedstate=* | --sharedstat=* | --sharedsta=* \
- | --sharedst=* | --shareds=* | --shared=* | --share=* | --shar=* \
- | --sha=* | --sh=*)
- sharedstatedir="$ac_optarg" ;;
-
- -site | --site | --sit)
- ac_prev=site ;;
- -site=* | --site=* | --sit=*)
- site="$ac_optarg" ;;
-
- -site-file | --site-file | --site-fil | --site-fi | --site-f)
- ac_prev=sitefile ;;
- -site-file=* | --site-file=* | --site-fil=* | --site-fi=* | --site-f=*)
- sitefile="$ac_optarg" ;;
-
- -srcdir | --srcdir | --srcdi | --srcd | --src | --sr)
- ac_prev=srcdir ;;
- -srcdir=* | --srcdir=* | --srcdi=* | --srcd=* | --src=* | --sr=*)
- srcdir="$ac_optarg" ;;
-
- -sysconfdir | --sysconfdir | --sysconfdi | --sysconfd | --sysconf \
- | --syscon | --sysco | --sysc | --sys | --sy)
- ac_prev=sysconfdir ;;
- -sysconfdir=* | --sysconfdir=* | --sysconfdi=* | --sysconfd=* | --sysconf=* \
- | --syscon=* | --sysco=* | --sysc=* | --sys=* | --sy=*)
- sysconfdir="$ac_optarg" ;;
-
- -target | --target | --targe | --targ | --tar | --ta | --t)
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-char *p = alloca(2 * sizeof(int));
-; return 0; }
-EOF
-if { (eval echo configure:1106: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- rm -rf conftest*
- ac_cv_header_alloca_h=yes
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- ac_cv_header_alloca_h=no
-fi
-rm -f conftest*
-fi
-
-echo "$ac_t""$ac_cv_header_alloca_h" 1>&6
-if test $ac_cv_header_alloca_h = yes; then
- cat >> confdefs.h <<\EOF
-#define HAVE_ALLOCA_H 1
-EOF
-
-fi
-
-echo $ac_n "checking for alloca""... $ac_c" 1>&6
-echo "configure:1127: checking for alloca" >&5
-if eval "test \"`echo '$''{'ac_cv_func_alloca_works'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1132 "configure"
-#include "confdefs.h"
-
-#ifdef __GNUC__
-# define alloca __builtin_alloca
-#else
-# ifdef _MSC_VER
-# include <malloc.h>
-# define alloca _alloca
-# else
-# if HAVE_ALLOCA_H
-# include <alloca.h>
-# else
-# ifdef _AIX
- #pragma alloca
-# else
-# ifndef alloca /* predefined by HP cc +Olibcalls */
-char *alloca ();
-# endif
-# endif
-# endif
-# endif
-#endif
-
-int main() {
-char *p = (char *) alloca(1);
-; return 0; }
-EOF
-if { (eval echo configure:1160: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- rm -rf conftest*
- ac_cv_func_alloca_works=yes
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- ac_cv_func_alloca_works=no
-fi
-rm -f conftest*
-fi
-
-echo "$ac_t""$ac_cv_func_alloca_works" 1>&6
-if test $ac_cv_func_alloca_works = yes; then
- cat >> confdefs.h <<\EOF
-#define HAVE_ALLOCA 1
-EOF
-
-fi
-
-if test $ac_cv_func_alloca_works = no; then
- # The SVR3 libPW and SVR4 libucb both contain incompatible functions
- # that cause trouble. Some versions do not even contain alloca or
- # contain a buggy version. If you still want to use their alloca,
- # use ar to extract alloca.o from them instead of compiling alloca.c.
- ALLOCA=alloca.${ac_objext}
- cat >> confdefs.h <<\EOF
-#define C_ALLOCA 1
-EOF
-
-
-echo $ac_n "checking whether alloca needs Cray hooks""... $ac_c" 1>&6
-echo "configure:1192: checking whether alloca needs Cray hooks" >&5
-if eval "test \"`echo '$''{'ac_cv_os_cray'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1197 "configure"
-#include "confdefs.h"
-#if defined(CRAY) && ! defined(CRAY2)
-webecray
-#else
-wenotbecray
-#endif
-
-EOF
-if (eval "$ac_cpp conftest.$ac_ext") 2>&5 |
- egrep "webecray" >/dev/null 2>&1; then
- rm -rf conftest*
- ac_cv_os_cray=yes
-else
- rm -rf conftest*
- ac_cv_os_cray=no
-fi
-rm -f conftest*
-
-fi
-
-echo "$ac_t""$ac_cv_os_cray" 1>&6
-if test $ac_cv_os_cray = yes; then
-for ac_func in _getb67 GETB67 getb67; do
- echo $ac_n "checking for $ac_func""... $ac_c" 1>&6
-echo "configure:1222: checking for $ac_func" >&5
-if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1227 "configure"
-#include "confdefs.h"
-/* System header to define __stub macros and hopefully few prototypes,
- which can conflict with char $ac_func(); below. */
-#include <assert.h>
-/* Override any gcc2 internal prototype to avoid an error. */
-/* We use char because int might match the return type of a gcc2
- builtin and then its argument prototype would still apply. */
-char $ac_func();
-
-int main() {
-
-/* The GNU C library defines this for functions which it implements
- to always fail with ENOSYS. Some functions are actually named
- something starting with __ and the normal name is an alias. */
-#if defined (__stub_$ac_func) || defined (__stub___$ac_func)
-choke me
-#else
-$ac_func();
-#endif
-
-; return 0; }
-EOF
-if { (eval echo configure:1250: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=yes"
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=no"
-fi
-rm -f conftest*
-fi
-
-if eval "test \"`echo '$ac_cv_func_'$ac_func`\" = yes"; then
- echo "$ac_t""yes" 1>&6
- cat >> confdefs.h <<EOF
-#define CRAY_STACKSEG_END $ac_func
-EOF
-
- break
-else
- echo "$ac_t""no" 1>&6
-fi
-
-done
-fi
-
-echo $ac_n "checking stack direction for C alloca""... $ac_c" 1>&6
-echo "configure:1277: checking stack direction for C alloca" >&5
-if eval "test \"`echo '$''{'ac_cv_c_stack_direction'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- if test "$cross_compiling" = yes; then
- ac_cv_c_stack_direction=0
-else
- cat > conftest.$ac_ext <<EOF
-#line 1285 "configure"
-#include "confdefs.h"
-find_stack_direction ()
-{
- static char *addr = 0;
- auto char dummy;
- if (addr == 0)
- {
- addr = &dummy;
- return find_stack_direction ();
- }
- else
- return (&dummy > addr) ? 1 : -1;
-}
-main ()
-{
- exit (find_stack_direction() < 0);
-}
-EOF
-if { (eval echo configure:1304: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null
-then
- ac_cv_c_stack_direction=1
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -fr conftest*
- ac_cv_c_stack_direction=-1
-fi
-rm -fr conftest*
-fi
-
-fi
-
-echo "$ac_t""$ac_cv_c_stack_direction" 1>&6
-cat >> confdefs.h <<EOF
-#define STACK_DIRECTION $ac_cv_c_stack_direction
-EOF
-
-fi
-
-for ac_hdr in unistd.h
-do
-ac_safe=`echo "$ac_hdr" | sed 'y%./+-%__p_%'`
-echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6
-echo "configure:1329: checking for $ac_hdr" >&5
-if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1334 "configure"
-#include "confdefs.h"
-#include <$ac_hdr>
-EOF
-ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:1339: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
-ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
-if test -z "$ac_err"; then
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=yes"
-else
- echo "$ac_err" >&5
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=no"
-fi
-rm -f conftest*
-fi
-if eval "test \"`echo '$ac_cv_header_'$ac_safe`\" = yes"; then
- echo "$ac_t""yes" 1>&6
- ac_tr_hdr=HAVE_`echo $ac_hdr | sed 'y%abcdefghijklmnopqrstuvwxyz./-%ABCDEFGHIJKLMNOPQRSTUVWXYZ___%'`
- cat >> confdefs.h <<EOF
-#define $ac_tr_hdr 1
-EOF
-
-else
- echo "$ac_t""no" 1>&6
-fi
-done
-
-for ac_func in getpagesize
-do
-echo $ac_n "checking for $ac_func""... $ac_c" 1>&6
-echo "configure:1368: checking for $ac_func" >&5
-if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1373 "configure"
-#include "confdefs.h"
-/* System header to define __stub macros and hopefully few prototypes,
- which can conflict with char $ac_func(); below. */
-#include <assert.h>
-/* Override any gcc2 internal prototype to avoid an error. */
-/* We use char because int might match the return type of a gcc2
- builtin and then its argument prototype would still apply. */
-char $ac_func();
-
-int main() {
-
-/* The GNU C library defines this for functions which it implements
- to always fail with ENOSYS. Some functions are actually named
- something starting with __ and the normal name is an alias. */
-#if defined (__stub_$ac_func) || defined (__stub___$ac_func)
-choke me
-#else
-$ac_func();
-#endif
-
-; return 0; }
-EOF
-if { (eval echo configure:1396: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=yes"
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=no"
-fi
-rm -f conftest*
-fi
-
-if eval "test \"`echo '$ac_cv_func_'$ac_func`\" = yes"; then
- echo "$ac_t""yes" 1>&6
- ac_tr_func=HAVE_`echo $ac_func | tr 'abcdefghijklmnopqrstuvwxyz' 'ABCDEFGHIJKLMNOPQRSTUVWXYZ'`
- cat >> confdefs.h <<EOF
-#define $ac_tr_func 1
-EOF
-
-else
- echo "$ac_t""no" 1>&6
-fi
-done
-
-echo $ac_n "checking for working mmap""... $ac_c" 1>&6
-echo "configure:1421: checking for working mmap" >&5
-if eval "test \"`echo '$''{'ac_cv_func_mmap_fixed_mapped'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- if test "$cross_compiling" = yes; then
- ac_cv_func_mmap_fixed_mapped=no
-else
- cat > conftest.$ac_ext <<EOF
-#line 1429 "configure"
-#include "confdefs.h"
-
-/* Thanks to Mike Haertel and Jim Avera for this test.
- Here is a matrix of mmap possibilities:
- mmap private not fixed
- mmap private fixed at somewhere currently unmapped
- mmap private fixed at somewhere already mapped
- mmap shared not fixed
- mmap shared fixed at somewhere currently unmapped
- mmap shared fixed at somewhere already mapped
- For private mappings, we should verify that changes cannot be read()
- back from the file, nor mmap's back from the file at a different
- address. (There have been systems where private was not correctly
- implemented like the infamous i386 svr4.0, and systems where the
- VM page cache was not coherent with the filesystem buffer cache
- like early versions of FreeBSD and possibly contemporary NetBSD.)
- For shared mappings, we should conversely verify that changes get
- propogated back to all the places they're supposed to be.
-
- Grep wants private fixed already mapped.
- The main things grep needs to know about mmap are:
- * does it exist and is it safe to write into the mmap'd area
- * how to use it (BSD variants) */
-#include <sys/types.h>
-#include <fcntl.h>
-#include <sys/mman.h>
-
-/* This mess was copied from the GNU getpagesize.h. */
-#ifndef HAVE_GETPAGESIZE
-# ifdef HAVE_UNISTD_H
-# include <unistd.h>
-# endif
-
-/* Assume that all systems that can run configure have sys/param.h. */
-# ifndef HAVE_SYS_PARAM_H
-# define HAVE_SYS_PARAM_H 1
-# endif
-
-# ifdef _SC_PAGESIZE
-# define getpagesize() sysconf(_SC_PAGESIZE)
-# else /* no _SC_PAGESIZE */
-# ifdef HAVE_SYS_PARAM_H
-# include <sys/param.h>
-# ifdef EXEC_PAGESIZE
-# define getpagesize() EXEC_PAGESIZE
-# else /* no EXEC_PAGESIZE */
-# ifdef NBPG
-# define getpagesize() NBPG * CLSIZE
-# ifndef CLSIZE
-# define CLSIZE 1
-# endif /* no CLSIZE */
-# else /* no NBPG */
-# ifdef NBPC
-# define getpagesize() NBPC
-# else /* no NBPC */
-# ifdef PAGESIZE
-# define getpagesize() PAGESIZE
-# endif /* PAGESIZE */
-# endif /* no NBPC */
-# endif /* no NBPG */
-# endif /* no EXEC_PAGESIZE */
-# else /* no HAVE_SYS_PARAM_H */
-# define getpagesize() 8192 /* punt totally */
-# endif /* no HAVE_SYS_PARAM_H */
-# endif /* no _SC_PAGESIZE */
-
-#endif /* no HAVE_GETPAGESIZE */
-
-#ifdef __cplusplus
-extern "C" { void *malloc(unsigned); }
-#else
-char *malloc();
-#endif
-
-int
-main()
-{
- char *data, *data2, *data3;
- int i, pagesize;
- int fd;
-
- pagesize = getpagesize();
-
- /*
- * First, make a file with some known garbage in it.
- */
- data = malloc(pagesize);
- if (!data)
- exit(1);
- for (i = 0; i < pagesize; ++i)
- *(data + i) = rand();
- umask(0);
- fd = creat("conftestmmap", 0600);
- if (fd < 0)
- exit(1);
- if (write(fd, data, pagesize) != pagesize)
- exit(1);
- close(fd);
-
- /*
- * Next, try to mmap the file at a fixed address which
- * already has something else allocated at it. If we can,
- * also make sure that we see the same garbage.
- */
- fd = open("conftestmmap", O_RDWR);
- if (fd < 0)
- exit(1);
- data2 = malloc(2 * pagesize);
- if (!data2)
- exit(1);
- data2 += (pagesize - ((int) data2 & (pagesize - 1))) & (pagesize - 1);
- if (data2 != mmap(data2, pagesize, PROT_READ | PROT_WRITE,
- MAP_PRIVATE | MAP_FIXED, fd, 0L))
- exit(1);
- for (i = 0; i < pagesize; ++i)
- if (*(data + i) != *(data2 + i))
- exit(1);
-
- /*
- * Finally, make sure that changes to the mapped area
- * do not percolate back to the file as seen by read().
- * (This is a bug on some variants of i386 svr4.0.)
- */
- for (i = 0; i < pagesize; ++i)
- *(data2 + i) = *(data2 + i) + 1;
- data3 = malloc(pagesize);
- if (!data3)
- exit(1);
- if (read(fd, data3, pagesize) != pagesize)
- exit(1);
- for (i = 0; i < pagesize; ++i)
- if (*(data + i) != *(data3 + i))
- exit(1);
- close(fd);
- unlink("conftestmmap");
- exit(0);
-}
-
-EOF
-if { (eval echo configure:1569: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null
-then
- ac_cv_func_mmap_fixed_mapped=yes
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -fr conftest*
- ac_cv_func_mmap_fixed_mapped=no
-fi
-rm -fr conftest*
-fi
-
-fi
-
-echo "$ac_t""$ac_cv_func_mmap_fixed_mapped" 1>&6
-if test $ac_cv_func_mmap_fixed_mapped = yes; then
- cat >> confdefs.h <<\EOF
-#define HAVE_MMAP 1
-EOF
-
-fi
-
-echo $ac_n "checking for Cygwin environment""... $ac_c" 1>&6
-echo "configure:1592: checking for Cygwin environment" >&5
-if eval "test \"`echo '$''{'ac_cv_cygwin'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1597 "configure"
-#include "confdefs.h"
-
-int main() {
-
-#ifndef __CYGWIN__
-#define __CYGWIN__ __CYGWIN32__
-#endif
-return __CYGWIN__;
-; return 0; }
-EOF
-if { (eval echo configure:1608: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
- rm -rf conftest*
- ac_cv_cygwin=yes
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- ac_cv_cygwin=no
-fi
-rm -f conftest*
-rm -f conftest*
-fi
-
-echo "$ac_t""$ac_cv_cygwin" 1>&6
-CYGWIN=
-test "$ac_cv_cygwin" = yes && CYGWIN=yes
-echo $ac_n "checking for mingw32 environment""... $ac_c" 1>&6
-echo "configure:1625: checking for mingw32 environment" >&5
-if eval "test \"`echo '$''{'ac_cv_mingw32'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1630 "configure"
-#include "confdefs.h"
-
-int main() {
-return __MINGW32__;
-; return 0; }
-EOF
-if { (eval echo configure:1637: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
- rm -rf conftest*
- ac_cv_mingw32=yes
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- ac_cv_mingw32=no
-fi
-rm -f conftest*
-rm -f conftest*
-fi
-
-echo "$ac_t""$ac_cv_mingw32" 1>&6
-MINGW32=
-test "$ac_cv_mingw32" = yes && MINGW32=yes
-
-# autoconf.info says this should be called right after AC_INIT.
-
-
-ac_aux_dir=
-for ac_dir in `cd $srcdir;pwd`/../.. $srcdir/`cd $srcdir;pwd`/../..; do
- if test -f $ac_dir/install-sh; then
- ac_aux_dir=$ac_dir
- ac_install_sh="$ac_aux_dir/install-sh -c"
- break
- elif test -f $ac_dir/install.sh; then
- ac_aux_dir=$ac_dir
- ac_install_sh="$ac_aux_dir/install.sh -c"
- break
- fi
-done
-if test -z "$ac_aux_dir"; then
- { echo "configure: error: can not find install-sh or install.sh in `cd $srcdir;pwd`/../.. $srcdir/`cd $srcdir;pwd`/../.." 1>&2; exit 1; }
-fi
-ac_config_guess=$ac_aux_dir/config.guess
-ac_config_sub=$ac_aux_dir/config.sub
-ac_configure=$ac_aux_dir/configure # This should be Cygnus configure.
-
-
-# Do some error checking and defaulting for the host and target type.
-# The inputs are:
-# configure --host=HOST --target=TARGET --build=BUILD NONOPT
-#
-# The rules are:
-# 1. You are not allowed to specify --host, --target, and nonopt at the
-# same time.
-# 2. Host defaults to nonopt.
-# 3. If nonopt is not specified, then host defaults to the current host,
-# as determined by config.guess.
-# 4. Target and build default to nonopt.
-# 5. If nonopt is not specified, then target and build default to host.
-
-# The aliases save the names the user supplied, while $host etc.
-# will get canonicalized.
-case $host---$target---$nonopt in
-NONE---*---* | *---NONE---* | *---*---NONE) ;;
-*) { echo "configure: error: can only configure for one host and one target at a time" 1>&2; exit 1; } ;;
-esac
-
-
-# Make sure we can run config.sub.
-if ${CONFIG_SHELL-/bin/sh} $ac_config_sub sun4 >/dev/null 2>&1; then :
-else { echo "configure: error: can not run $ac_config_sub" 1>&2; exit 1; }
-fi
-
-echo $ac_n "checking host system type""... $ac_c" 1>&6
-echo "configure:1704: checking host system type" >&5
-
-host_alias=$host
-case "$host_alias" in
-NONE)
- case $nonopt in
- NONE)
- if host_alias=`${CONFIG_SHELL-/bin/sh} $ac_config_guess`; then :
- else { echo "configure: error: can not guess host type; you must specify one" 1>&2; exit 1; }
- fi ;;
- *) host_alias=$nonopt ;;
- esac ;;
-esac
-
-host=`${CONFIG_SHELL-/bin/sh} $ac_config_sub $host_alias`
-host_cpu=`echo $host | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\1/'`
-host_vendor=`echo $host | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\2/'`
-host_os=`echo $host | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\3/'`
-echo "$ac_t""$host" 1>&6
-
-echo $ac_n "checking target system type""... $ac_c" 1>&6
-echo "configure:1725: checking target system type" >&5
-
-target_alias=$target
-case "$target_alias" in
-NONE)
- case $nonopt in
- NONE) target_alias=$host_alias ;;
- *) target_alias=$nonopt ;;
- esac ;;
-esac
-
-target=`${CONFIG_SHELL-/bin/sh} $ac_config_sub $target_alias`
-target_cpu=`echo $target | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\1/'`
-target_vendor=`echo $target | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\2/'`
-target_os=`echo $target | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\3/'`
-echo "$ac_t""$target" 1>&6
-
-echo $ac_n "checking build system type""... $ac_c" 1>&6
-echo "configure:1743: checking build system type" >&5
-
-build_alias=$build
-case "$build_alias" in
-NONE)
- case $nonopt in
- NONE) build_alias=$host_alias ;;
- *) build_alias=$nonopt ;;
- esac ;;
-esac
-
-build=`${CONFIG_SHELL-/bin/sh} $ac_config_sub $build_alias`
-build_cpu=`echo $build | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\1/'`
-build_vendor=`echo $build | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\2/'`
-build_os=`echo $build | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\3/'`
-echo "$ac_t""$build" 1>&6
-
-test "$host_alias" != "$target_alias" &&
- test "$program_prefix$program_suffix$program_transform_name" = \
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- program_prefix=${target_alias}-
-
-if test "$program_transform_name" = s,x,x,; then
- program_transform_name=
-else
- # Double any \ or $. echo might interpret backslashes.
- cat <<\EOF_SED > conftestsed
-s,\\,\\\\,g; s,\$,$$,g
-EOF_SED
- program_transform_name="`echo $program_transform_name|sed -f conftestsed`"
- rm -f conftestsed
-fi
-test "$program_prefix" != NONE &&
- program_transform_name="s,^,${program_prefix},; $program_transform_name"
-# Use a double $ so make ignores it.
-test "$program_suffix" != NONE &&
- program_transform_name="s,\$\$,${program_suffix},; $program_transform_name"
-
-# sed with no file args requires a program.
-test "$program_transform_name" = "" && program_transform_name="s,x,x,"
-
-# Extract the first word of "gcc", so it can be a program name with args.
-set dummy gcc; ac_word=$2
-echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:1787: checking for $ac_word" >&5
-if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- if test -n "$CC"; then
- ac_cv_prog_CC="$CC" # Let the user override the test.
-else
- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
- ac_dummy="$PATH"
- for ac_dir in $ac_dummy; do
- test -z "$ac_dir" && ac_dir=.
- if test -f $ac_dir/$ac_word; then
- ac_cv_prog_CC="gcc"
- break
- fi
- done
- IFS="$ac_save_ifs"
-fi
-fi
-CC="$ac_cv_prog_CC"
-if test -n "$CC"; then
- echo "$ac_t""$CC" 1>&6
-else
- echo "$ac_t""no" 1>&6
-fi
-
-if test -z "$CC"; then
- # Extract the first word of "cc", so it can be a program name with args.
-set dummy cc; ac_word=$2
-echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:1817: checking for $ac_word" >&5
-if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- if test -n "$CC"; then
- ac_cv_prog_CC="$CC" # Let the user override the test.
-else
- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
- ac_prog_rejected=no
- ac_dummy="$PATH"
- for ac_dir in $ac_dummy; do
- test -z "$ac_dir" && ac_dir=.
- if test -f $ac_dir/$ac_word; then
- if test "$ac_dir/$ac_word" = "/usr/ucb/cc"; then
- ac_prog_rejected=yes
- continue
- fi
- ac_cv_prog_CC="cc"
- break
- fi
- done
- IFS="$ac_save_ifs"
-if test $ac_prog_rejected = yes; then
- # We found a bogon in the path, so make sure we never use it.
- set dummy $ac_cv_prog_CC
- shift
- if test $# -gt 0; then
- # We chose a different compiler from the bogus one.
- # However, it has the same basename, so the bogon will be chosen
- # first if we set CC to just the basename; use the full file name.
- shift
- set dummy "$ac_dir/$ac_word" "$@"
- shift
- ac_cv_prog_CC="$@"
- fi
-fi
-fi
-fi
-CC="$ac_cv_prog_CC"
-if test -n "$CC"; then
- echo "$ac_t""$CC" 1>&6
-else
- echo "$ac_t""no" 1>&6
-fi
-
- if test -z "$CC"; then
- case "`uname -s`" in
- *win32* | *WIN32*)
- # Extract the first word of "cl", so it can be a program name with args.
-set dummy cl; ac_word=$2
-echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:1868: checking for $ac_word" >&5
-if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- if test -n "$CC"; then
- ac_cv_prog_CC="$CC" # Let the user override the test.
-else
- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
- ac_dummy="$PATH"
- for ac_dir in $ac_dummy; do
- test -z "$ac_dir" && ac_dir=.
- if test -f $ac_dir/$ac_word; then
- ac_cv_prog_CC="cl"
- break
- fi
- done
- IFS="$ac_save_ifs"
-fi
-fi
-CC="$ac_cv_prog_CC"
-if test -n "$CC"; then
- echo "$ac_t""$CC" 1>&6
-else
- echo "$ac_t""no" 1>&6
-fi
- ;;
- esac
- fi
- test -z "$CC" && { echo "configure: error: no acceptable cc found in \$PATH" 1>&2; exit 1; }
-fi
-
-echo $ac_n "checking whether the C compiler ($CC $CFLAGS $LDFLAGS) works""... $ac_c" 1>&6
-echo "configure:1900: checking whether the C compiler ($CC $CFLAGS $LDFLAGS) works" >&5
-
-ac_ext=c
-# CFLAGS is not in ac_cpp because -g, -O, etc. are not valid cpp options.
-ac_cpp='$CPP $CPPFLAGS'
-ac_compile='${CC-cc} -c $CFLAGS $CPPFLAGS conftest.$ac_ext 1>&5'
-ac_link='${CC-cc} -o conftest${ac_exeext} $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS 1>&5'
-cross_compiling=$ac_cv_prog_cc_cross
-
-cat > conftest.$ac_ext << EOF
-
-#line 1911 "configure"
-#include "confdefs.h"
-
-main(){return(0);}
-EOF
-if { (eval echo configure:1916: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- ac_cv_prog_cc_works=yes
- # If we can't run a trivial program, we are probably using a cross compiler.
- if (./conftest; exit) 2>/dev/null; then
- ac_cv_prog_cc_cross=no
- else
- ac_cv_prog_cc_cross=yes
- fi
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- ac_cv_prog_cc_works=no
-fi
-rm -fr conftest*
-ac_ext=c
-# CFLAGS is not in ac_cpp because -g, -O, etc. are not valid cpp options.
-ac_cpp='$CPP $CPPFLAGS'
-ac_compile='${CC-cc} -c $CFLAGS $CPPFLAGS conftest.$ac_ext 1>&5'
-ac_link='${CC-cc} -o conftest${ac_exeext} $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS 1>&5'
-cross_compiling=$ac_cv_prog_cc_cross
-
-echo "$ac_t""$ac_cv_prog_cc_works" 1>&6
-if test $ac_cv_prog_cc_works = no; then
- { echo "configure: error: installation or configuration problem: C compiler cannot create executables." 1>&2; exit 1; }
-fi
-echo $ac_n "checking whether the C compiler ($CC $CFLAGS $LDFLAGS) is a cross-compiler""... $ac_c" 1>&6
-echo "configure:1942: checking whether the C compiler ($CC $CFLAGS $LDFLAGS) is a cross-compiler" >&5
-echo "$ac_t""$ac_cv_prog_cc_cross" 1>&6
-cross_compiling=$ac_cv_prog_cc_cross
-
-echo $ac_n "checking whether we are using GNU C""... $ac_c" 1>&6
-echo "configure:1947: checking whether we are using GNU C" >&5
-if eval "test \"`echo '$''{'ac_cv_prog_gcc'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.c <<EOF
-#ifdef __GNUC__
- yes;
-#endif
-EOF
-if { ac_try='${CC-cc} -E conftest.c'; { (eval echo configure:1956: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }; } | egrep yes >/dev/null 2>&1; then
- ac_cv_prog_gcc=yes
-else
- ac_cv_prog_gcc=no
-fi
-fi
-
-echo "$ac_t""$ac_cv_prog_gcc" 1>&6
-
-if test $ac_cv_prog_gcc = yes; then
- GCC=yes
-else
- GCC=
-fi
-
-ac_test_CFLAGS="${CFLAGS+set}"
-ac_save_CFLAGS="$CFLAGS"
-CFLAGS=
-echo $ac_n "checking whether ${CC-cc} accepts -g""... $ac_c" 1>&6
-echo "configure:1975: checking whether ${CC-cc} accepts -g" >&5
-if eval "test \"`echo '$''{'ac_cv_prog_cc_g'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- echo 'void f(){}' > conftest.c
-if test -z "`${CC-cc} -g -c conftest.c 2>&1`"; then
- ac_cv_prog_cc_g=yes
-else
- ac_cv_prog_cc_g=no
-fi
-rm -f conftest*
-
-fi
-
-echo "$ac_t""$ac_cv_prog_cc_g" 1>&6
-if test "$ac_test_CFLAGS" = set; then
- CFLAGS="$ac_save_CFLAGS"
-elif test $ac_cv_prog_cc_g = yes; then
- if test "$GCC" = yes; then
- CFLAGS="-g -O2"
- else
- CFLAGS="-g"
- fi
-else
- if test "$GCC" = yes; then
- CFLAGS="-O2"
- else
- CFLAGS=
- fi
-fi
-
-# Find a good install program. We prefer a C program (faster),
-# so one script is as good as another. But avoid the broken or
-# incompatible versions:
-# SysV /etc/install, /usr/sbin/install
-# SunOS /usr/etc/install
-# IRIX /sbin/install
-# AIX /bin/install
-# AIX 4 /usr/bin/installbsd, which doesn't work without a -g flag
-# AFS /usr/afsws/bin/install, which mishandles nonexistent args
-# SVR4 /usr/ucb/install, which tries to use the nonexistent group "staff"
-# ./install, which can be erroneously created by make from ./install.sh.
-echo $ac_n "checking for a BSD compatible install""... $ac_c" 1>&6
-echo "configure:2018: checking for a BSD compatible install" >&5
-if test -z "$INSTALL"; then
-if eval "test \"`echo '$''{'ac_cv_path_install'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- IFS="${IFS= }"; ac_save_IFS="$IFS"; IFS=":"
- for ac_dir in $PATH; do
- # Account for people who put trailing slashes in PATH elements.
- case "$ac_dir/" in
- /|./|.//|/etc/*|/usr/sbin/*|/usr/etc/*|/sbin/*|/usr/afsws/bin/*|/usr/ucb/*) ;;
- *)
- # OSF1 and SCO ODT 3.0 have their own names for install.
- # Don't use installbsd from OSF since it installs stuff as root
- # by default.
- for ac_prog in ginstall scoinst install; do
- if test -f $ac_dir/$ac_prog; then
- if test $ac_prog = install &&
- grep dspmsg $ac_dir/$ac_prog >/dev/null 2>&1; then
- # AIX install. It has an incompatible calling convention.
- :
- else
- ac_cv_path_install="$ac_dir/$ac_prog -c"
- break 2
- fi
- fi
- done
- ;;
- esac
- done
- IFS="$ac_save_IFS"
-
-fi
- if test "${ac_cv_path_install+set}" = set; then
- INSTALL="$ac_cv_path_install"
- else
- # As a last resort, use the slow shell script. We don't cache a
- # path for INSTALL within a source directory, because that will
- # break other packages using the cache if that directory is
- # removed, or if the path is relative.
- INSTALL="$ac_install_sh"
- fi
-fi
-echo "$ac_t""$INSTALL" 1>&6
-
-# Use test -z because SunOS4 sh mishandles braces in ${var-val}.
-# It thinks the first close brace ends the variable substitution.
-test -z "$INSTALL_PROGRAM" && INSTALL_PROGRAM='${INSTALL}'
-
-test -z "$INSTALL_SCRIPT" && INSTALL_SCRIPT='${INSTALL_PROGRAM}'
-
-test -z "$INSTALL_DATA" && INSTALL_DATA='${INSTALL} -m 644'
-
-
-# Put a plausible default for CC_FOR_BUILD in Makefile.
-if test "x$cross_compiling" = "xno"; then
- CC_FOR_BUILD='$(CC)'
-else
- CC_FOR_BUILD=gcc
-fi
-
-
-
-
-AR=${AR-ar}
-
-# Extract the first word of "ranlib", so it can be a program name with args.
-set dummy ranlib; ac_word=$2
-echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:2086: checking for $ac_word" >&5
-if eval "test \"`echo '$''{'ac_cv_prog_RANLIB'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- if test -n "$RANLIB"; then
- ac_cv_prog_RANLIB="$RANLIB" # Let the user override the test.
-else
- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
- ac_dummy="$PATH"
- for ac_dir in $ac_dummy; do
- test -z "$ac_dir" && ac_dir=.
- if test -f $ac_dir/$ac_word; then
- ac_cv_prog_RANLIB="ranlib"
- break
- fi
- done
- IFS="$ac_save_ifs"
- test -z "$ac_cv_prog_RANLIB" && ac_cv_prog_RANLIB=":"
-fi
-fi
-RANLIB="$ac_cv_prog_RANLIB"
-if test -n "$RANLIB"; then
- echo "$ac_t""$RANLIB" 1>&6
-else
- echo "$ac_t""no" 1>&6
-fi
-
-
-ALL_LINGUAS=
-
- for ac_hdr in argz.h limits.h locale.h nl_types.h malloc.h string.h \
-unistd.h values.h sys/param.h
-do
-ac_safe=`echo "$ac_hdr" | sed 'y%./+-%__p_%'`
-echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6
-echo "configure:2121: checking for $ac_hdr" >&5
-if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 2126 "configure"
-#include "confdefs.h"
-#include <$ac_hdr>
-EOF
-ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:2131: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
-ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
-if test -z "$ac_err"; then
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=yes"
-else
- echo "$ac_err" >&5
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=no"
-fi
-rm -f conftest*
-fi
-if eval "test \"`echo '$ac_cv_header_'$ac_safe`\" = yes"; then
- echo "$ac_t""yes" 1>&6
- ac_tr_hdr=HAVE_`echo $ac_hdr | sed 'y%abcdefghijklmnopqrstuvwxyz./-%ABCDEFGHIJKLMNOPQRSTUVWXYZ___%'`
- cat >> confdefs.h <<EOF
-#define $ac_tr_hdr 1
-EOF
-
-else
- echo "$ac_t""no" 1>&6
-fi
-done
-
- for ac_func in getcwd munmap putenv setenv setlocale strchr strcasecmp \
-__argz_count __argz_stringify __argz_next
-do
-echo $ac_n "checking for $ac_func""... $ac_c" 1>&6
-echo "configure:2161: checking for $ac_func" >&5
-if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 2166 "configure"
-#include "confdefs.h"
-/* System header to define __stub macros and hopefully few prototypes,
- which can conflict with char $ac_func(); below. */
-#include <assert.h>
-/* Override any gcc2 internal prototype to avoid an error. */
-/* We use char because int might match the return type of a gcc2
- builtin and then its argument prototype would still apply. */
-char $ac_func();
-
-int main() {
-
-/* The GNU C library defines this for functions which it implements
- to always fail with ENOSYS. Some functions are actually named
- something starting with __ and the normal name is an alias. */
-#if defined (__stub_$ac_func) || defined (__stub___$ac_func)
-choke me
-#else
-$ac_func();
-#endif
-
-; return 0; }
-EOF
-if { (eval echo configure:2189: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=yes"
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=no"
-fi
-rm -f conftest*
-fi
-
-if eval "test \"`echo '$ac_cv_func_'$ac_func`\" = yes"; then
- echo "$ac_t""yes" 1>&6
- ac_tr_func=HAVE_`echo $ac_func | tr 'abcdefghijklmnopqrstuvwxyz' 'ABCDEFGHIJKLMNOPQRSTUVWXYZ'`
- cat >> confdefs.h <<EOF
-#define $ac_tr_func 1
-EOF
-
-else
- echo "$ac_t""no" 1>&6
-fi
-done
-
-
- if test "${ac_cv_func_stpcpy+set}" != "set"; then
- for ac_func in stpcpy
-do
-echo $ac_n "checking for $ac_func""... $ac_c" 1>&6
-echo "configure:2218: checking for $ac_func" >&5
-if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 2223 "configure"
-#include "confdefs.h"
-/* System header to define __stub macros and hopefully few prototypes,
- which can conflict with char $ac_func(); below. */
-#include <assert.h>
-/* Override any gcc2 internal prototype to avoid an error. */
-/* We use char because int might match the return type of a gcc2
- builtin and then its argument prototype would still apply. */
-char $ac_func();
-
-int main() {
-
-/* The GNU C library defines this for functions which it implements
- to always fail with ENOSYS. Some functions are actually named
- something starting with __ and the normal name is an alias. */
-#if defined (__stub_$ac_func) || defined (__stub___$ac_func)
-choke me
-#else
-$ac_func();
-#endif
-
-; return 0; }
-EOF
-if { (eval echo configure:2246: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=yes"
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=no"
-fi
-rm -f conftest*
-fi
-
-if eval "test \"`echo '$ac_cv_func_'$ac_func`\" = yes"; then
- echo "$ac_t""yes" 1>&6
- ac_tr_func=HAVE_`echo $ac_func | tr 'abcdefghijklmnopqrstuvwxyz' 'ABCDEFGHIJKLMNOPQRSTUVWXYZ'`
- cat >> confdefs.h <<EOF
-#define $ac_tr_func 1
-EOF
-
-else
- echo "$ac_t""no" 1>&6
-fi
-done
-
- fi
- if test "${ac_cv_func_stpcpy}" = "yes"; then
- cat >> confdefs.h <<\EOF
-#define HAVE_STPCPY 1
-EOF
-
- fi
-
- if test $ac_cv_header_locale_h = yes; then
- echo $ac_n "checking for LC_MESSAGES""... $ac_c" 1>&6
-echo "configure:2280: checking for LC_MESSAGES" >&5
-if eval "test \"`echo '$''{'am_cv_val_LC_MESSAGES'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 2285 "configure"
-#include "confdefs.h"
-#include <locale.h>
-int main() {
-return LC_MESSAGES
-; return 0; }
-EOF
-if { (eval echo configure:2292: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- rm -rf conftest*
- am_cv_val_LC_MESSAGES=yes
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- am_cv_val_LC_MESSAGES=no
-fi
-rm -f conftest*
-fi
-
-echo "$ac_t""$am_cv_val_LC_MESSAGES" 1>&6
- if test $am_cv_val_LC_MESSAGES = yes; then
- cat >> confdefs.h <<\EOF
-#define HAVE_LC_MESSAGES 1
-EOF
-
- fi
- fi
- echo $ac_n "checking whether NLS is requested""... $ac_c" 1>&6
-echo "configure:2313: checking whether NLS is requested" >&5
- # Check whether --enable-nls or --disable-nls was given.
-if test "${enable_nls+set}" = set; then
- enableval="$enable_nls"
- USE_NLS=$enableval
-else
- USE_NLS=yes
-fi
-
- echo "$ac_t""$USE_NLS" 1>&6
-
-
- USE_INCLUDED_LIBINTL=no
-
- if test "$USE_NLS" = "yes"; then
- cat >> confdefs.h <<\EOF
-#define ENABLE_NLS 1
-EOF
-
- echo $ac_n "checking whether included gettext is requested""... $ac_c" 1>&6
-echo "configure:2333: checking whether included gettext is requested" >&5
- # Check whether --with-included-gettext or --without-included-gettext was given.
-if test "${with_included_gettext+set}" = set; then
- withval="$with_included_gettext"
- nls_cv_force_use_gnu_gettext=$withval
-else
- nls_cv_force_use_gnu_gettext=no
-fi
-
- echo "$ac_t""$nls_cv_force_use_gnu_gettext" 1>&6
-
- nls_cv_use_gnu_gettext="$nls_cv_force_use_gnu_gettext"
- if test "$nls_cv_force_use_gnu_gettext" != "yes"; then
- nls_cv_header_intl=
- nls_cv_header_libgt=
- CATOBJEXT=NONE
-
- ac_safe=`echo "libintl.h" | sed 'y%./+-%__p_%'`
-echo $ac_n "checking for libintl.h""... $ac_c" 1>&6
-echo "configure:2352: checking for libintl.h" >&5
-if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 2357 "configure"
-#include "confdefs.h"
-#include <libintl.h>
-EOF
-ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:2362: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
-ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
-if test -z "$ac_err"; then
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=yes"
-else
- echo "$ac_err" >&5
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=no"
-fi
-rm -f conftest*
-fi
-if eval "test \"`echo '$ac_cv_header_'$ac_safe`\" = yes"; then
- echo "$ac_t""yes" 1>&6
- echo $ac_n "checking for gettext in libc""... $ac_c" 1>&6
-echo "configure:2379: checking for gettext in libc" >&5
-if eval "test \"`echo '$''{'gt_cv_func_gettext_libc'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 2384 "configure"
-#include "confdefs.h"
-#include <libintl.h>
-int main() {
-return (int) gettext ("")
-; return 0; }
-EOF
-if { (eval echo configure:2391: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
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-
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-
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-if { (eval echo configure:2426: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
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-
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-fi
-
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-
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-
- # Extract the first word of "msgfmt", so it can be a program name with args.
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- IFS="$ac_save_ifs"
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-if { (eval echo configure:2544: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
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-
- # Extract the first word of "gmsgfmt", so it can be a program name with args.
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-echo "configure:2571: checking for $ac_word" >&5
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- echo $ac_n "(cached) $ac_c" 1>&6
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- case "$GMSGFMT" in
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- ac_cv_path_GMSGFMT="$GMSGFMT" # Let the user override the test with a path.
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- ?:/*)
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- ;;
- *)
- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
- ac_dummy="$PATH"
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- IFS="$ac_save_ifs"
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-else
- echo "$ac_t""no" 1>&6
-fi
-
- # Extract the first word of "xgettext", so it can be a program name with args.
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-echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:2607: checking for $ac_word" >&5
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-else
- case "$XGETTEXT" in
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- ac_cv_path_XGETTEXT="$XGETTEXT" # Let the user override the test with a path.
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- *)
- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS="${IFS}:"
- for ac_dir in $PATH; do
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- IFS="$ac_save_ifs"
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- ;;
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-XGETTEXT="$ac_cv_path_XGETTEXT"
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-else
- echo "$ac_t""no" 1>&6
-fi
-
- cat > conftest.$ac_ext <<EOF
-#line 2639 "configure"
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-
-int main() {
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- return _nl_msg_cat_cntr
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-if { (eval echo configure:2647: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
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- CATOBJEXT=.gmo
- DATADIRNAME=share
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- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- CATOBJEXT=.mo
- DATADIRNAME=lib
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-rm -f conftest*
- INSTOBJEXT=.mo
- fi
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-
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- echo "$ac_t""no" 1>&6
-fi
-
-
-
- if test "$CATOBJEXT" = "NONE"; then
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-
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- # Extract the first word of "msgfmt", so it can be a program name with args.
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-echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:2679: checking for $ac_word" >&5
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-else
- case "$MSGFMT" in
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- ac_cv_path_MSGFMT="$MSGFMT" # Let the user override the test with a path.
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- *)
- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS="${IFS}:"
- for ac_dir in $PATH; do
- test -z "$ac_dir" && ac_dir=.
- if test -f $ac_dir/$ac_word; then
- if test -z "`$ac_dir/$ac_word -h 2>&1 | grep 'dv '`"; then
- ac_cv_path_MSGFMT="$ac_dir/$ac_word"
- break
- fi
- fi
- done
- IFS="$ac_save_ifs"
- test -z "$ac_cv_path_MSGFMT" && ac_cv_path_MSGFMT="msgfmt"
- ;;
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-MSGFMT="$ac_cv_path_MSGFMT"
-if test -n "$MSGFMT"; then
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-else
- echo "$ac_t""no" 1>&6
-fi
-
- # Extract the first word of "gmsgfmt", so it can be a program name with args.
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-echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:2713: checking for $ac_word" >&5
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-else
- case "$GMSGFMT" in
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- ac_cv_path_GMSGFMT="$GMSGFMT" # Let the user override the test with a path.
- ;;
- ?:/*)
- ac_cv_path_GMSGFMT="$GMSGFMT" # Let the user override the test with a dos path.
- ;;
- *)
- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
- ac_dummy="$PATH"
- for ac_dir in $ac_dummy; do
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- fi
- done
- IFS="$ac_save_ifs"
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- echo "$ac_t""no" 1>&6
-fi
-
- # Extract the first word of "xgettext", so it can be a program name with args.
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-echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:2749: checking for $ac_word" >&5
-if eval "test \"`echo '$''{'ac_cv_path_XGETTEXT'+set}'`\" = set"; then
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-else
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- ac_cv_path_XGETTEXT="$XGETTEXT" # Let the user override the test with a path.
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- *)
- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS="${IFS}:"
- for ac_dir in $PATH; do
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- IFS="$ac_save_ifs"
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-else
- echo "$ac_t""no" 1>&6
-fi
-
-
- USE_INCLUDED_LIBINTL=yes
- CATOBJEXT=.gmo
- INSTOBJEXT=.mo
- DATADIRNAME=share
- INTLDEPS='$(top_builddir)/../intl/libintl.a'
- INTLLIBS=$INTLDEPS
- LIBS=`echo $LIBS | sed -e 's/-lintl//'`
- nls_cv_header_intl=libintl.h
- nls_cv_header_libgt=libgettext.h
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-
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- : ;
- else
- echo "$ac_t""found xgettext programs is not GNU xgettext; ignore it" 1>&6
- XGETTEXT=":"
- fi
- fi
-
- # We need to process the po/ directory.
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- else
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- nls_cv_header_intl=libintl.h
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-
- # If this is used in GNU gettext we have to set USE_NLS to `yes'
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- fi
-
- for lang in $ALL_LINGUAS; do
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- POFILES="$POFILES $lang.po"
- done
-
-
-
-
-
-
-
-
-
-
-
-
-
-
- if test "x$CATOBJEXT" != "x"; then
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- LINGUAS=
- else
- echo $ac_n "checking for catalogs to be installed""... $ac_c" 1>&6
-echo "configure:2839: checking for catalogs to be installed" >&5
- NEW_LINGUAS=
- for lang in ${LINGUAS=$ALL_LINGUAS}; do
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- esac
- done
- LINGUAS=$NEW_LINGUAS
- echo "$ac_t""$LINGUAS" 1>&6
- fi
-
- if test -n "$LINGUAS"; then
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- fi
- fi
-
- if test $ac_cv_header_locale_h = yes; then
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- else
- INCLUDE_LOCALE_H="\
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- fi
-
-
- if test -f $srcdir/po2tbl.sed.in; then
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-echo $ac_n "checking for linux/version.h""... $ac_c" 1>&6
-echo "configure:2867: checking for linux/version.h" >&5
-if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then
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-else
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-#include <linux/version.h>
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-{ (eval echo configure:2877: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
-ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
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- eval "ac_cv_header_$ac_safe=yes"
-else
- echo "$ac_err" >&5
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=no"
-fi
-rm -f conftest*
-fi
-if eval "test \"`echo '$ac_cv_header_'$ac_safe`\" = yes"; then
- echo "$ac_t""yes" 1>&6
- msgformat=linux
-else
- echo "$ac_t""no" 1>&6
-msgformat=xopen
-fi
-
-
- sed -e '/^#/d' $srcdir/$msgformat-msg.sed > po2msg.sed
- fi
- sed -e '/^#.*[^\\]$/d' -e '/^#$/d' \
- $srcdir/po2tbl.sed.in > po2tbl.sed
- fi
-
- if test "$PACKAGE" = "gettext"; then
- GT_NO="#NO#"
- GT_YES=
- else
- GT_NO=
- GT_YES="#YES#"
- fi
-
-
-
- MKINSTALLDIRS="\$(srcdir)/../../mkinstalldirs"
-
-
- l=
-
-
- if test -d $srcdir/po; then
- test -d po || mkdir po
- if test "x$srcdir" != "x."; then
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- else
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- fi
- else
- posrcprefix="../"
- fi
- rm -f po/POTFILES
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- < $srcdir/po/POTFILES.in > po/POTFILES
- fi
-
-
-# Check for common headers.
-# FIXME: Seems to me this can cause problems for i386-windows hosts.
-# At one point there were hardcoded AC_DEFINE's if ${host} = i386-*-windows*.
-for ac_hdr in stdlib.h string.h strings.h unistd.h time.h
-do
-ac_safe=`echo "$ac_hdr" | sed 'y%./+-%__p_%'`
-echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6
-echo "configure:2946: checking for $ac_hdr" >&5
-if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 2951 "configure"
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-#include <$ac_hdr>
-EOF
-ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:2956: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
-ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
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- eval "ac_cv_header_$ac_safe=yes"
-else
- echo "$ac_err" >&5
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=no"
-fi
-rm -f conftest*
-fi
-if eval "test \"`echo '$ac_cv_header_'$ac_safe`\" = yes"; then
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- ac_tr_hdr=HAVE_`echo $ac_hdr | sed 'y%abcdefghijklmnopqrstuvwxyz./-%ABCDEFGHIJKLMNOPQRSTUVWXYZ___%'`
- cat >> confdefs.h <<EOF
-#define $ac_tr_hdr 1
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-
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-
-for ac_hdr in sys/time.h sys/resource.h
-do
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-echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6
-echo "configure:2986: checking for $ac_hdr" >&5
-if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 2991 "configure"
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-ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:2996: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
-ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
-if test -z "$ac_err"; then
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=yes"
-else
- echo "$ac_err" >&5
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=no"
-fi
-rm -f conftest*
-fi
-if eval "test \"`echo '$ac_cv_header_'$ac_safe`\" = yes"; then
- echo "$ac_t""yes" 1>&6
- ac_tr_hdr=HAVE_`echo $ac_hdr | sed 'y%abcdefghijklmnopqrstuvwxyz./-%ABCDEFGHIJKLMNOPQRSTUVWXYZ___%'`
- cat >> confdefs.h <<EOF
-#define $ac_tr_hdr 1
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-
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- echo "$ac_t""no" 1>&6
-fi
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-
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-do
-ac_safe=`echo "$ac_hdr" | sed 'y%./+-%__p_%'`
-echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6
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-
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- sim_trace="${sim_trace}|TRACE_$x"
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- sim_trace="$sim_trace)'" ;;
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-
-
-
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- [-0-9]*)
- sim_profile="-DPROFILE='(${enableval})' -DWITH_PROFILE='(${enableval})'";;
- [a-z]*)
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- else
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- sim_profile="$sim_profile)'" ;;
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-
-
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- cat > conftest.$ac_ext <<EOF
-#line 3407 "configure"
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-#endif
-#ifdef __cplusplus
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-#else
-void (*signal ()) ();
-#endif
-
-int main() {
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-; return 0; }
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-if { (eval echo configure:3424: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
- rm -rf conftest*
- ac_cv_type_signal=void
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- ac_cv_type_signal=int
-fi
-rm -f conftest*
-fi
-
-echo "$ac_t""$ac_cv_type_signal" 1>&6
-cat >> confdefs.h <<EOF
-#define RETSIGTYPE $ac_cv_type_signal
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-
-
-
-
-
-echo $ac_n "checking for executable suffix""... $ac_c" 1>&6
-echo "configure:3446: checking for executable suffix" >&5
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-else
- if test "$CYGWIN" = yes || test "$MINGW32" = yes; then
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- echo 'int main () { return 0; }' > conftest.$ac_ext
- ac_cv_exeext=
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- for file in conftest.*; do
- case $file in
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- *) ac_cv_exeext=`echo $file | sed -e s/conftest//` ;;
- esac
- done
- else
- { echo "configure: error: installation or configuration problem: compiler cannot create executables." 1>&2; exit 1; }
- fi
- rm -f conftest*
- test x"${ac_cv_exeext}" = x && ac_cv_exeext=no
-fi
-fi
-
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-ac_exeext=$EXEEXT
-
-
-sim_link_files=
-sim_link_links=
-
-sim_link_links=tconfig.h
-if test -f ${srcdir}/tconfig.in
-then
- sim_link_files=tconfig.in
-else
- sim_link_files=../common/tconfig.in
-fi
-
-# targ-vals.def points to the libc macro description file.
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-
-
-
-# Put a useful copy of CPP_FOR_TARGET in Makefile.
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- else \
- echo \$\${rootme}/../../gcc/xgcc -B\$\${rootme}/../../gcc/; \
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-
-
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-
-
-# These aren't all needed yet, but will be eventually.
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-echo "configure:3530: checking for $ac_hdr" >&5
-if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 3535 "configure"
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-ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:3540: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
-ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
-if test -z "$ac_err"; then
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=yes"
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- echo "$ac_err" >&5
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=no"
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- ac_tr_hdr=HAVE_`echo $ac_hdr | sed 'y%abcdefghijklmnopqrstuvwxyz./-%ABCDEFGHIJKLMNOPQRSTUVWXYZ___%'`
- cat >> confdefs.h <<EOF
-#define $ac_tr_hdr 1
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-
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-
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-echo "configure:3569: checking for $ac_func" >&5
-if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 3574 "configure"
-#include "confdefs.h"
-/* System header to define __stub macros and hopefully few prototypes,
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-/* Override any gcc2 internal prototype to avoid an error. */
-/* We use char because int might match the return type of a gcc2
- builtin and then its argument prototype would still apply. */
-char $ac_func();
-
-int main() {
-
-/* The GNU C library defines this for functions which it implements
- to always fail with ENOSYS. Some functions are actually named
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-choke me
-#else
-$ac_func();
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-if { (eval echo configure:3597: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=yes"
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=no"
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-rm -f conftest*
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-
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- ac_tr_func=HAVE_`echo $ac_func | tr 'abcdefghijklmnopqrstuvwxyz' 'ABCDEFGHIJKLMNOPQRSTUVWXYZ'`
- cat >> confdefs.h <<EOF
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-
-
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-# So, don't put newlines in cache variables' values.
-# Ultrix sh set writes to stderr and can't be redirected directly,
-# and sets the high bit in the cache file unless we assign to the vars.
-(set) 2>&1 |
- case `(ac_space=' '; set | grep ac_space) 2>&1` in
- *ac_space=\ *)
- # `set' does not quote correctly, so add quotes (double-quote substitution
- # turns \\\\ into \\, and sed turns \\ into \).
- sed -n \
- -e "s/'/'\\\\''/g" \
- -e "s/^\\([a-zA-Z0-9_]*_cv_[a-zA-Z0-9_]*\\)=\\(.*\\)/\\1=\${\\1='\\2'}/p"
- ;;
- *)
- # `set' quotes correctly as required by POSIX, so do not add quotes.
- sed -n -e 's/^\([a-zA-Z0-9_]*_cv_[a-zA-Z0-9_]*\)=\(.*\)/\1=${\1=\2}/p'
- ;;
- esac >> confcache
-if cmp -s $cache_file confcache; then
- :
-else
- if test -w $cache_file; then
- echo "updating cache $cache_file"
- cat confcache > $cache_file
- else
- echo "not updating unwritable cache $cache_file"
- fi
-fi
-rm -f confcache
-
-trap 'rm -fr conftest* confdefs* core core.* *.core $ac_clean_files; exit 1' 1 2 15
-
-test "x$prefix" = xNONE && prefix=$ac_default_prefix
-# Let make expand exec_prefix.
-test "x$exec_prefix" = xNONE && exec_prefix='${prefix}'
-
-# Any assignment to VPATH causes Sun make to only execute
-# the first set of double-colon rules, so remove it if not needed.
-# If there is a colon in the path, we need to keep it.
-if test "x$srcdir" = x.; then
- ac_vpsub='/^[ ]*VPATH[ ]*=[^:]*$/d'
-fi
-
-trap 'rm -f $CONFIG_STATUS conftest*; exit 1' 1 2 15
-
-DEFS=-DHAVE_CONFIG_H
-
-# Without the "./", some shells look in PATH for config.status.
-: ${CONFIG_STATUS=./config.status}
-
-echo creating $CONFIG_STATUS
-rm -f $CONFIG_STATUS
-cat > $CONFIG_STATUS <<EOF
-#! /bin/sh
-# Generated automatically by configure.
-# Run this file to recreate the current configuration.
-# This directory was configured as follows,
-# on host `(hostname || uname -n) 2>/dev/null | sed 1q`:
-#
-# $0 $ac_configure_args
-#
-# Compiler output produced by configure, useful for debugging
-# configure, is in ./config.log if it exists.
-
-ac_cs_usage="Usage: $CONFIG_STATUS [--recheck] [--version] [--help]"
-for ac_option
-do
- case "\$ac_option" in
- -recheck | --recheck | --rechec | --reche | --rech | --rec | --re | --r)
- echo "running \${CONFIG_SHELL-/bin/sh} $0 $ac_configure_args --no-create --no-recursion"
- exec \${CONFIG_SHELL-/bin/sh} $0 $ac_configure_args --no-create --no-recursion ;;
- -version | --version | --versio | --versi | --vers | --ver | --ve | --v)
- echo "$CONFIG_STATUS generated by autoconf version 2.13"
- exit 0 ;;
- -help | --help | --hel | --he | --h)
- echo "\$ac_cs_usage"; exit 0 ;;
- *) echo "\$ac_cs_usage"; exit 1 ;;
- esac
-done
-
-ac_given_srcdir=$srcdir
-ac_given_INSTALL="$INSTALL"
-
-trap 'rm -fr `echo "Makefile cconfig.h:config.in" | sed "s/:[^ ]*//g"` conftest*; exit 1' 1 2 15
-EOF
-cat >> $CONFIG_STATUS <<EOF
-
-# Protect against being on the right side of a sed subst in config.status.
-sed 's/%@/@@/; s/@%/@@/; s/%g\$/@g/; /@g\$/s/[\\\\&%]/\\\\&/g;
- s/@@/%@/; s/@@/@%/; s/@g\$/%g/' > conftest.subs <<\\CEOF
-$ac_vpsub
-$extrasub
-s%@sim_environment@%$sim_environment%g
-s%@sim_alignment@%$sim_alignment%g
-s%@sim_assert@%$sim_assert%g
-s%@sim_bitsize@%$sim_bitsize%g
-s%@sim_endian@%$sim_endian%g
-s%@sim_hostendian@%$sim_hostendian%g
-s%@sim_float@%$sim_float%g
-s%@sim_scache@%$sim_scache%g
-s%@sim_default_model@%$sim_default_model%g
-s%@sim_hw_cflags@%$sim_hw_cflags%g
-s%@sim_hw_objs@%$sim_hw_objs%g
-s%@sim_hw@%$sim_hw%g
-s%@sim_inline@%$sim_inline%g
-s%@sim_packages@%$sim_packages%g
-s%@sim_regparm@%$sim_regparm%g
-s%@sim_reserved_bits@%$sim_reserved_bits%g
-s%@sim_smp@%$sim_smp%g
-s%@sim_stdcall@%$sim_stdcall%g
-s%@sim_xor_endian@%$sim_xor_endian%g
-s%@WARN_CFLAGS@%$WARN_CFLAGS%g
-s%@WERROR_CFLAGS@%$WERROR_CFLAGS%g
-s%@SHELL@%$SHELL%g
-s%@CFLAGS@%$CFLAGS%g
-s%@CPPFLAGS@%$CPPFLAGS%g
-s%@CXXFLAGS@%$CXXFLAGS%g
-s%@FFLAGS@%$FFLAGS%g
-s%@DEFS@%$DEFS%g
-s%@LDFLAGS@%$LDFLAGS%g
-s%@LIBS@%$LIBS%g
-s%@exec_prefix@%$exec_prefix%g
-s%@prefix@%$prefix%g
-s%@program_transform_name@%$program_transform_name%g
-s%@bindir@%$bindir%g
-s%@sbindir@%$sbindir%g
-s%@libexecdir@%$libexecdir%g
-s%@datadir@%$datadir%g
-s%@sysconfdir@%$sysconfdir%g
-s%@sharedstatedir@%$sharedstatedir%g
-s%@localstatedir@%$localstatedir%g
-s%@libdir@%$libdir%g
-s%@includedir@%$includedir%g
-s%@oldincludedir@%$oldincludedir%g
-s%@infodir@%$infodir%g
-s%@mandir@%$mandir%g
-s%@host@%$host%g
-s%@host_alias@%$host_alias%g
-s%@host_cpu@%$host_cpu%g
-s%@host_vendor@%$host_vendor%g
-s%@host_os@%$host_os%g
-s%@target@%$target%g
-s%@target_alias@%$target_alias%g
-s%@target_cpu@%$target_cpu%g
-s%@target_vendor@%$target_vendor%g
-s%@target_os@%$target_os%g
-s%@build@%$build%g
-s%@build_alias@%$build_alias%g
-s%@build_cpu@%$build_cpu%g
-s%@build_vendor@%$build_vendor%g
-s%@build_os@%$build_os%g
-s%@CC@%$CC%g
-s%@INSTALL_PROGRAM@%$INSTALL_PROGRAM%g
-s%@INSTALL_SCRIPT@%$INSTALL_SCRIPT%g
-s%@INSTALL_DATA@%$INSTALL_DATA%g
-s%@CC_FOR_BUILD@%$CC_FOR_BUILD%g
-s%@HDEFINES@%$HDEFINES%g
-s%@AR@%$AR%g
-s%@RANLIB@%$RANLIB%g
-s%@SET_MAKE@%$SET_MAKE%g
-s%@CPP@%$CPP%g
-s%@ALLOCA@%$ALLOCA%g
-s%@USE_NLS@%$USE_NLS%g
-s%@MSGFMT@%$MSGFMT%g
-s%@GMSGFMT@%$GMSGFMT%g
-s%@XGETTEXT@%$XGETTEXT%g
-s%@USE_INCLUDED_LIBINTL@%$USE_INCLUDED_LIBINTL%g
-s%@CATALOGS@%$CATALOGS%g
-s%@CATOBJEXT@%$CATOBJEXT%g
-s%@DATADIRNAME@%$DATADIRNAME%g
-s%@GMOFILES@%$GMOFILES%g
-s%@INSTOBJEXT@%$INSTOBJEXT%g
-s%@INTLDEPS@%$INTLDEPS%g
-s%@INTLLIBS@%$INTLLIBS%g
-s%@INTLOBJS@%$INTLOBJS%g
-s%@POFILES@%$POFILES%g
-s%@POSUB@%$POSUB%g
-s%@INCLUDE_LOCALE_H@%$INCLUDE_LOCALE_H%g
-s%@GT_NO@%$GT_NO%g
-s%@GT_YES@%$GT_YES%g
-s%@MKINSTALLDIRS@%$MKINSTALLDIRS%g
-s%@l@%$l%g
-s%@MAINT@%$MAINT%g
-s%@sim_bswap@%$sim_bswap%g
-s%@sim_cflags@%$sim_cflags%g
-s%@sim_debug@%$sim_debug%g
-s%@sim_stdio@%$sim_stdio%g
-s%@sim_trace@%$sim_trace%g
-s%@sim_profile@%$sim_profile%g
-s%@EXEEXT@%$EXEEXT%g
-s%@CPP_FOR_TARGET@%$CPP_FOR_TARGET%g
-s%@TARGET_SUBDIR@%$TARGET_SUBDIR%g
-
-CEOF
-EOF
-
-cat >> $CONFIG_STATUS <<\EOF
-
-# Split the substitutions into bite-sized pieces for seds with
-# small command number limits, like on Digital OSF/1 and HP-UX.
-ac_max_sed_cmds=90 # Maximum number of lines to put in a sed script.
-ac_file=1 # Number of current file.
-ac_beg=1 # First line for current file.
-ac_end=$ac_max_sed_cmds # Line after last line for current file.
-ac_more_lines=:
-ac_sed_cmds=""
-while $ac_more_lines; do
- if test $ac_beg -gt 1; then
- sed "1,${ac_beg}d; ${ac_end}q" conftest.subs > conftest.s$ac_file
- else
- sed "${ac_end}q" conftest.subs > conftest.s$ac_file
- fi
- if test ! -s conftest.s$ac_file; then
- ac_more_lines=false
- rm -f conftest.s$ac_file
- else
- if test -z "$ac_sed_cmds"; then
- ac_sed_cmds="sed -f conftest.s$ac_file"
- else
- ac_sed_cmds="$ac_sed_cmds | sed -f conftest.s$ac_file"
- fi
- ac_file=`expr $ac_file + 1`
- ac_beg=$ac_end
- ac_end=`expr $ac_end + $ac_max_sed_cmds`
- fi
-done
-if test -z "$ac_sed_cmds"; then
- ac_sed_cmds=cat
-fi
-EOF
-
-cat >> $CONFIG_STATUS <<EOF
-
-CONFIG_FILES=\${CONFIG_FILES-"Makefile"}
-EOF
-cat >> $CONFIG_STATUS <<\EOF
-for ac_file in .. $CONFIG_FILES; do if test "x$ac_file" != x..; then
- # Support "outfile[:infile[:infile...]]", defaulting infile="outfile.in".
- case "$ac_file" in
- *:*) ac_file_in=`echo "$ac_file"|sed 's%[^:]*:%%'`
- ac_file=`echo "$ac_file"|sed 's%:.*%%'` ;;
- *) ac_file_in="${ac_file}.in" ;;
- esac
-
- # Adjust a relative srcdir, top_srcdir, and INSTALL for subdirectories.
-
- # Remove last slash and all that follows it. Not all systems have dirname.
- ac_dir=`echo $ac_file|sed 's%/[^/][^/]*$%%'`
- if test "$ac_dir" != "$ac_file" && test "$ac_dir" != .; then
- # The file is in a subdirectory.
- test ! -d "$ac_dir" && mkdir "$ac_dir"
- ac_dir_suffix="/`echo $ac_dir|sed 's%^\./%%'`"
- # A "../" for each directory in $ac_dir_suffix.
- ac_dots=`echo $ac_dir_suffix|sed 's%/[^/]*%../%g'`
- else
- ac_dir_suffix= ac_dots=
- fi
-
- case "$ac_given_srcdir" in
- .) srcdir=.
- if test -z "$ac_dots"; then top_srcdir=.
- else top_srcdir=`echo $ac_dots|sed 's%/$%%'`; fi ;;
- /*) srcdir="$ac_given_srcdir$ac_dir_suffix"; top_srcdir="$ac_given_srcdir" ;;
- *) # Relative path.
- srcdir="$ac_dots$ac_given_srcdir$ac_dir_suffix"
- top_srcdir="$ac_dots$ac_given_srcdir" ;;
- esac
-
- case "$ac_given_INSTALL" in
- [/$]*) INSTALL="$ac_given_INSTALL" ;;
- *) INSTALL="$ac_dots$ac_given_INSTALL" ;;
- esac
-
- echo creating "$ac_file"
- rm -f "$ac_file"
- configure_input="Generated automatically from `echo $ac_file_in|sed 's%.*/%%'` by configure."
- case "$ac_file" in
- *Makefile*) ac_comsub="1i\\
-# $configure_input" ;;
- *) ac_comsub= ;;
- esac
-
- ac_file_inputs=`echo $ac_file_in|sed -e "s%^%$ac_given_srcdir/%" -e "s%:% $ac_given_srcdir/%g"`
- sed -e "$ac_comsub
-s%@configure_input@%$configure_input%g
-s%@srcdir@%$srcdir%g
-s%@top_srcdir@%$top_srcdir%g
-s%@INSTALL@%$INSTALL%g
-" $ac_file_inputs | (eval "$ac_sed_cmds") > $ac_file
-fi; done
-rm -f conftest.s*
-
-# These sed commands are passed to sed as "A NAME B NAME C VALUE D", where
-# NAME is the cpp macro being defined and VALUE is the value it is being given.
-#
-# ac_d sets the value in "#define NAME VALUE" lines.
-ac_dA='s%^\([ ]*\)#\([ ]*define[ ][ ]*\)'
-ac_dB='\([ ][ ]*\)[^ ]*%\1#\2'
-ac_dC='\3'
-ac_dD='%g'
-# ac_u turns "#undef NAME" with trailing blanks into "#define NAME VALUE".
-ac_uA='s%^\([ ]*\)#\([ ]*\)undef\([ ][ ]*\)'
-ac_uB='\([ ]\)%\1#\2define\3'
-ac_uC=' '
-ac_uD='\4%g'
-# ac_e turns "#undef NAME" without trailing blanks into "#define NAME VALUE".
-ac_eA='s%^\([ ]*\)#\([ ]*\)undef\([ ][ ]*\)'
-ac_eB='$%\1#\2define\3'
-ac_eC=' '
-ac_eD='%g'
-
-if test "${CONFIG_HEADERS+set}" != set; then
-EOF
-cat >> $CONFIG_STATUS <<EOF
- CONFIG_HEADERS="cconfig.h:config.in"
-EOF
-cat >> $CONFIG_STATUS <<\EOF
-fi
-for ac_file in .. $CONFIG_HEADERS; do if test "x$ac_file" != x..; then
- # Support "outfile[:infile[:infile...]]", defaulting infile="outfile.in".
- case "$ac_file" in
- *:*) ac_file_in=`echo "$ac_file"|sed 's%[^:]*:%%'`
- ac_file=`echo "$ac_file"|sed 's%:.*%%'` ;;
- *) ac_file_in="${ac_file}.in" ;;
- esac
-
- echo creating $ac_file
-
- rm -f conftest.frag conftest.in conftest.out
- ac_file_inputs=`echo $ac_file_in|sed -e "s%^%$ac_given_srcdir/%" -e "s%:% $ac_given_srcdir/%g"`
- cat $ac_file_inputs > conftest.in
-
-EOF
-
-# Transform confdefs.h into a sed script conftest.vals that substitutes
-# the proper values into config.h.in to produce config.h. And first:
-# Protect against being on the right side of a sed subst in config.status.
-# Protect against being in an unquoted here document in config.status.
-rm -f conftest.vals
-cat > conftest.hdr <<\EOF
-s/[\\&%]/\\&/g
-s%[\\$`]%\\&%g
-s%#define \([A-Za-z_][A-Za-z0-9_]*\) *\(.*\)%${ac_dA}\1${ac_dB}\1${ac_dC}\2${ac_dD}%gp
-s%ac_d%ac_u%gp
-s%ac_u%ac_e%gp
-EOF
-sed -n -f conftest.hdr confdefs.h > conftest.vals
-rm -f conftest.hdr
-
-# This sed command replaces #undef with comments. This is necessary, for
-# example, in the case of _POSIX_SOURCE, which is predefined and required
-# on some systems where configure will not decide to define it.
-cat >> conftest.vals <<\EOF
-s%^[ ]*#[ ]*undef[ ][ ]*[a-zA-Z_][a-zA-Z_0-9]*%/* & */%
-EOF
-
-# Break up conftest.vals because some shells have a limit on
-# the size of here documents, and old seds have small limits too.
-
-rm -f conftest.tail
-while :
-do
- ac_lines=`grep -c . conftest.vals`
- # grep -c gives empty output for an empty file on some AIX systems.
- if test -z "$ac_lines" || test "$ac_lines" -eq 0; then break; fi
- # Write a limited-size here document to conftest.frag.
- echo ' cat > conftest.frag <<CEOF' >> $CONFIG_STATUS
- sed ${ac_max_here_lines}q conftest.vals >> $CONFIG_STATUS
- echo 'CEOF
- sed -f conftest.frag conftest.in > conftest.out
- rm -f conftest.in
- mv conftest.out conftest.in
-' >> $CONFIG_STATUS
- sed 1,${ac_max_here_lines}d conftest.vals > conftest.tail
- rm -f conftest.vals
- mv conftest.tail conftest.vals
-done
-rm -f conftest.vals
-
-cat >> $CONFIG_STATUS <<\EOF
- rm -f conftest.frag conftest.h
- echo "/* $ac_file. Generated automatically by configure. */" > conftest.h
- cat conftest.in >> conftest.h
- rm -f conftest.in
- if cmp -s $ac_file conftest.h 2>/dev/null; then
- echo "$ac_file is unchanged"
- rm -f conftest.h
- else
- # Remove last slash and all that follows it. Not all systems have dirname.
- ac_dir=`echo $ac_file|sed 's%/[^/][^/]*$%%'`
- if test "$ac_dir" != "$ac_file" && test "$ac_dir" != .; then
- # The file is in a subdirectory.
- test ! -d "$ac_dir" && mkdir "$ac_dir"
- fi
- rm -f $ac_file
- mv conftest.h $ac_file
- fi
-fi; done
-
-EOF
-cat >> $CONFIG_STATUS <<EOF
-
-EOF
-cat >> $CONFIG_STATUS <<\EOF
-case x$CONFIG_HEADERS in xcconfig.h:config.in) echo > stamp-h ;; esac
-exit 0
-EOF
-chmod +x $CONFIG_STATUS
-rm -fr confdefs* $ac_clean_files
-test "$no_create" = yes || ${CONFIG_SHELL-/bin/sh} $CONFIG_STATUS || exit 1
-
diff --git a/sim/common/configure.in b/sim/common/configure.in
deleted file mode 100644
index 44218783be7..00000000000
--- a/sim/common/configure.in
+++ /dev/null
@@ -1,41 +0,0 @@
-dnl Process this file with autoconf to produce a configure script.
-AC_PREREQ(2.5)dnl
-AC_INIT(Makefile.in)
-
-# This is intended for use by the target specific directories, and by us.
-SIM_AC_COMMON(cconfig.h)
-
-# Put a useful copy of CPP_FOR_TARGET in Makefile.
-# This is only used to build the target values header files. These files are
-# shipped with distributions so CPP_FOR_TARGET only needs to work in
-# developer's trees. This value is borrowed from ../../Makefile.in.
-CPP_FOR_TARGET="\` \
- if test -f \$\${rootme}/../../gcc/Makefile ; then \
- if test -f \$\${rootme}/../../\$(TARGET_SUBDIR)/newlib/Makefile ; then \
- echo \$\${rootme}/../../gcc/xgcc -B\$\${rootme}/../../gcc/ -idirafter \$\${rootme}/../../\$(TARGET_SUBDIR)/newlib/targ-include -idirafter \$(srcroot)/newlib/libc/include -nostdinc; \
- else \
- echo \$\${rootme}/../../gcc/xgcc -B\$\${rootme}/../../gcc/; \
- fi; \
- else \
- if test '\$(host_canonical)' = '\$(target_canonical)' ; then \
- echo \$(CC); \
- else \
- t='\$(program_transform_name)'; echo gcc | sed -e 's/x/x/' \$\$t; \
- fi; \
- fi\` -E"
-AC_SUBST(CPP_FOR_TARGET)
-
-# Set TARGET_SUBDIR, needed by CPP_FOR_TARGET.
-if test x"${host}" = x"${target}" ; then
- TARGET_SUBDIR="."
-else
- TARGET_SUBDIR=${target_alias}
-fi
-AC_SUBST(TARGET_SUBDIR)
-
-# These aren't all needed yet, but will be eventually.
-AC_CHECK_HEADERS(stdlib.h string.h strings.h time.h sys/times.h sys/stat.h sys/mman.h)
-AC_CHECK_FUNCS(mmap munmap)
-
-AC_OUTPUT(Makefile,
-[case x$CONFIG_HEADERS in xcconfig.h:config.in) echo > stamp-h ;; esac])
diff --git a/sim/common/dv-core.c b/sim/common/dv-core.c
deleted file mode 100644
index 0a0c4a9acbd..00000000000
--- a/sim/common/dv-core.c
+++ /dev/null
@@ -1,116 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1996, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-#include "sim-main.h"
-#include "hw-main.h"
-
-/* DEVICE
-
- core - root of the device tree
-
- DESCRIPTION
-
- The core device, positioned at the root of the device tree appears
- to its child devices as a normal device just like every other
- device in the tree.
-
- Internally it is implemented using a core object. Requests to
- attach (or detach) address spaces are passed to that core object.
- Requests to transfer (DMA) data are reflected back down the device
- tree using the core_map data transfer methods.
-
- PROPERTIES
-
- None.
-
- */
-
-
-static void
-dv_core_attach_address_callback (struct hw *me,
- int level,
- int space,
- address_word addr,
- address_word nr_bytes,
- struct hw *client)
-{
- HW_TRACE ((me, "attach - level=%d, space=%d, addr=0x%lx, nr_bytes=%ld, client=%s",
- level, space, (unsigned long) addr, (unsigned long) nr_bytes, hw_path (client)));
- /* NOTE: At preset the space is assumed to be zero. Perhaphs the
- space should be mapped onto something for instance: space0 -
- unified memory; space1 - IO memory; ... */
- sim_core_attach (hw_system (me),
- NULL, /*cpu*/
- level,
- access_read_write_exec,
- space, addr,
- nr_bytes,
- 0, /* modulo */
- client,
- NULL);
-}
-
-
-static unsigned
-dv_core_dma_read_buffer_callback (struct hw *me,
- void *dest,
- int space,
- unsigned_word addr,
- unsigned nr_bytes)
-{
- return sim_core_read_buffer (hw_system (me),
- NULL, /*CPU*/
- space, /*???*/
- dest,
- addr,
- nr_bytes);
-}
-
-
-static unsigned
-dv_core_dma_write_buffer_callback (struct hw *me,
- const void *source,
- int space,
- unsigned_word addr,
- unsigned nr_bytes,
- int violate_read_only_section)
-{
- return sim_core_write_buffer (hw_system (me),
- NULL, /*cpu*/
- space, /*???*/
- source,
- addr,
- nr_bytes);
-}
-
-
-static void
-dv_core_finish (struct hw *me)
-{
- set_hw_attach_address (me, dv_core_attach_address_callback);
- set_hw_dma_write_buffer (me, dv_core_dma_write_buffer_callback);
- set_hw_dma_read_buffer (me, dv_core_dma_read_buffer_callback);
-}
-
-const struct hw_descriptor dv_core_descriptor[] = {
- { "core", dv_core_finish, },
- { NULL },
-};
diff --git a/sim/common/dv-glue.c b/sim/common/dv-glue.c
deleted file mode 100644
index a235531ae84..00000000000
--- a/sim/common/dv-glue.c
+++ /dev/null
@@ -1,373 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1996,1998 Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-#include "hw-main.h"
-
-#ifdef HAVE_STRING_H
-#include <string.h>
-#else
-#ifdef HAVE_STRINGS_H
-#include <strings.h>
-#endif
-#endif
-
-/* DEVICE
-
-
- glue - glue to interconnect and test hardware ports
-
-
- DESCRIPTION
-
-
- The glue device provides two functions. Firstly, it provides a
- mechanism for inspecting and driving the port network. Secondly,
- it provides a set of boolean primitives that can be used to apply
- combinatorial operations to the port network.
-
- Glue devices have a variable number of big endian <<output>>
- registers. Each register is target-word sized. The registers can
- be read and written.
-
- Writing to an output register results in an event being driven
- (level determined by the value written) on the devices
- corresponding output port.
-
- Reading an <<output>> register returns either the last value
- written or the most recently computed value (for that register) as
- a result of an event ariving on that port (which ever was computed
- last).
-
- At present the following sub device types are available:
-
- <<glue>>: In addition to driving its output interrupt port with any
- value written to an interrupt input port is stored in the
- corresponding <<output>> register. Such input interrupts, however,
- are not propogated to an output interrupt port.
-
- <<glue-and>>: The bit-wise AND of the interrupt inputs is computed
- and then both stored in <<output>> register zero and propogated to
- output interrupt output port zero.
-
-
- PROPERTIES
-
-
- reg = <address> <size> (required)
-
- Specify the address (within the parent bus) that this device is to
- live. The address must be 2048 * sizeof (word) (8k in a 32bit
- simulation) aligned.
-
-
- interrupt-ranges = <int-number> <range> (optional)
-
- If present, this specifies the number of valid interrupt inputs (up
- to the maximum of 2048). By default, <<int-number>> is zero and
- range is determined by the <<reg>> size.
-
-
- PORTS
-
-
- int[0..] (input, output)
-
- Both an input and an output port.
-
-
- EXAMPLES
-
-
- Enable tracing of the device:
-
- | -t glue-device \
-
-
- Create source, bitwize-and, and sink glue devices. Since the
- device at address <<0x10000>> is of size <<8>> it will have two
- output interrupt ports.
-
- | -o '/iobus@0xf0000000/glue@0x10000/reg 0x10000 8' \
- | -o '/iobus@0xf0000000/glue-and@0x20000/reg 0x20000 4' \
- | -o '/iobus@0xf0000000/glue-and/interrupt-ranges 0 2' \
- | -o '/iobus@0xf0000000/glue@0x30000/reg 0x30000 4' \
-
-
- Wire the two source interrupts to the AND device:
-
- | -o '/iobus@0xf0000000/glue@0x10000 > 0 0 /iobus/glue-and' \
- | -o '/iobus@0xf0000000/glue@0x10000 > 1 1 /iobus/glue-and' \
-
-
- Wire the AND device up to the sink so that the and's output is not
- left open.
-
- | -o '/iobus@0xf0000000/glue-and > 0 0 /iobus/glue@0x30000' \
-
-
- With the above configuration. The client program is able to
- compute a two bit AND. For instance the <<C>> stub below prints 1
- AND 0.
-
- | unsigned *input = (void*)0xf0010000;
- | unsigned *output = (void*)0xf0030000;
- | unsigned ans;
- | input[0] = htonl(1);
- | input[1] = htonl(0);
- | ans = ntohl(*output);
- | write_string("AND is ");
- | write_int(ans);
- | write_line();
-
-
- BUGS
-
-
- A future implementation of this device may support multiple
- interrupt ranges.
-
- Some of the devices listed may not yet be fully implemented.
-
- Additional devices such as a D flip-flop (DFF), an inverter (INV)
- or a latch (LAT) may prove useful.
-
- */
-
-
-enum {
- max_nr_ports = 2048,
-};
-
-enum hw_glue_type {
- glue_undefined = 0,
- glue_io,
- glue_and,
- glue_nand,
- glue_or,
- glue_xor,
- glue_nor,
- glue_not,
-};
-
-struct hw_glue {
- enum hw_glue_type type;
- int int_number;
- int *input;
- int nr_inputs;
- unsigned sizeof_input;
- /* our output registers */
- int space;
- unsigned_word address;
- unsigned sizeof_output;
- int *output;
- int nr_outputs;
-};
-
-
-static hw_io_read_buffer_method hw_glue_io_read_buffer;
-static hw_io_write_buffer_method hw_glue_io_write_buffer;
-static hw_port_event_method hw_glue_port_event;
-const static struct hw_port_descriptor hw_glue_ports[];
-
-static void
-hw_glue_finish (struct hw *me)
-{
- struct hw_glue *glue = HW_ZALLOC (me, struct hw_glue);
-
- /* establish our own methods */
- set_hw_data (me, glue);
- set_hw_io_read_buffer (me, hw_glue_io_read_buffer);
- set_hw_io_write_buffer (me, hw_glue_io_write_buffer);
- set_hw_ports (me, hw_glue_ports);
- set_hw_port_event (me, hw_glue_port_event);
-
- /* attach to our parent bus */
- do_hw_attach_regs (me);
-
- /* establish the output registers */
- {
- reg_property_spec unit;
- int reg_nr;
- /* find a relevant reg entry */
- reg_nr = 0;
- while (hw_find_reg_array_property (me, "reg", reg_nr, &unit)
- && !hw_unit_size_to_attach_size (hw_parent (me),
- &unit.size,
- &glue->sizeof_output,
- me))
- reg_nr++;
- /* check out the size */
- if (glue->sizeof_output == 0)
- hw_abort (me, "at least one reg property size must be nonzero");
- if (glue->sizeof_output % sizeof (unsigned_word) != 0)
- hw_abort (me, "reg property size must be %d aligned",
- sizeof (unsigned_word));
- /* and the address */
- hw_unit_address_to_attach_address (hw_parent (me),
- &unit.address,
- &glue->space,
- &glue->address,
- me);
- if (glue->address % (sizeof (unsigned_word) * max_nr_ports) != 0)
- hw_abort (me, "reg property address must be %d aligned",
- sizeof (unsigned_word) * max_nr_ports);
- glue->nr_outputs = glue->sizeof_output / sizeof (unsigned_word);
- glue->output = hw_zalloc (me, glue->sizeof_output);
- }
-
- /* establish the input ports */
- {
- const struct hw_property *ranges;
- ranges = hw_find_property (me, "interrupt-ranges");
- if (ranges == NULL)
- {
- glue->int_number = 0;
- glue->nr_inputs = glue->nr_outputs;
- }
- else if (ranges->sizeof_array != sizeof (unsigned_cell) * 2)
- {
- hw_abort (me, "invalid interrupt-ranges property (incorrect size)");
- }
- else
- {
- const unsigned_cell *int_range = ranges->array;
- glue->int_number = BE2H_cell (int_range[0]);
- glue->nr_inputs = BE2H_cell (int_range[1]);
- }
- glue->sizeof_input = glue->nr_inputs * sizeof (unsigned);
- glue->input = hw_zalloc (me, glue->sizeof_input);
- }
-
- /* determine our type */
- {
- const char *name = hw_name(me);
- if (strcmp (name, "glue") == 0)
- glue->type = glue_io;
- else if (strcmp (name, "glue-and") == 0)
- glue->type = glue_and;
- else
- hw_abort (me, "unimplemented glue type");
- }
-
- HW_TRACE ((me, "int-number %d, nr_inputs %d, nr_outputs %d",
- glue->int_number, glue->nr_inputs, glue->nr_outputs));
-}
-
-static unsigned
-hw_glue_io_read_buffer (struct hw *me,
- void *dest,
- int space,
- unsigned_word addr,
- unsigned nr_bytes)
-{
- struct hw_glue *glue = (struct hw_glue *) hw_data (me);
- int reg = ((addr - glue->address) / sizeof (unsigned_word)) % glue->nr_outputs;
- if (nr_bytes != sizeof (unsigned_word)
- || (addr % sizeof (unsigned_word)) != 0)
- hw_abort (me, "missaligned read access (%d:0x%lx:%d) not supported",
- space, (unsigned long)addr, nr_bytes);
- *(unsigned_word*)dest = H2BE_4(glue->output[reg]);
- HW_TRACE ((me, "read - port %d (0x%lx), level %d",
- reg, (unsigned long) addr, glue->output[reg]));
- return nr_bytes;
-}
-
-
-static unsigned
-hw_glue_io_write_buffer (struct hw *me,
- const void *source,
- int space,
- unsigned_word addr,
- unsigned nr_bytes)
-{
- struct hw_glue *glue = (struct hw_glue *) hw_data (me);
- int reg = ((addr - glue->address) / sizeof (unsigned_word)) % max_nr_ports;
- if (nr_bytes != sizeof (unsigned_word)
- || (addr % sizeof (unsigned_word)) != 0)
- hw_abort (me, "missaligned write access (%d:0x%lx:%d) not supported",
- space, (unsigned long) addr, nr_bytes);
- glue->output[reg] = H2BE_4 (*(unsigned_word*)source);
- HW_TRACE ((me, "write - port %d (0x%lx), level %d",
- reg, (unsigned long) addr, glue->output[reg]));
- hw_port_event (me, reg, glue->output[reg]);
- return nr_bytes;
-}
-
-static void
-hw_glue_port_event (struct hw *me,
- int my_port,
- struct hw *source,
- int source_port,
- int level)
-{
- struct hw_glue *glue = (struct hw_glue *) hw_data (me);
- int i;
- if (my_port < glue->int_number
- || my_port >= glue->int_number + glue->nr_inputs)
- hw_abort (me, "port %d outside of valid range", my_port);
- glue->input[my_port - glue->int_number] = level;
- switch (glue->type)
- {
- case glue_io:
- {
- int port = my_port % glue->nr_outputs;
- glue->output[port] = level;
- HW_TRACE ((me, "input - port %d (0x%lx), level %d",
- my_port,
- (unsigned long) glue->address + port * sizeof (unsigned_word),
- level));
- break;
- }
- case glue_and:
- {
- glue->output[0] = glue->input[0];
- for (i = 1; i < glue->nr_inputs; i++)
- glue->output[0] &= glue->input[i];
- HW_TRACE ((me, "and - port %d, level %d arrived - output %d",
- my_port, level, glue->output[0]));
- hw_port_event (me, 0, glue->output[0]);
- break;
- }
- default:
- {
- hw_abort (me, "operator not implemented");
- break;
- }
- }
-}
-
-
-static const struct hw_port_descriptor hw_glue_ports[] = {
- { "int", 0, max_nr_ports },
- { NULL }
-};
-
-
-const struct hw_descriptor dv_glue_descriptor[] = {
- { "glue", hw_glue_finish, },
- { "glue-and", hw_glue_finish, },
- { "glue-nand", hw_glue_finish, },
- { "glue-or", hw_glue_finish, },
- { "glue-xor", hw_glue_finish, },
- { "glue-nor", hw_glue_finish, },
- { "glue-not", hw_glue_finish, },
- { NULL },
-};
diff --git a/sim/common/dv-pal.c b/sim/common/dv-pal.c
deleted file mode 100644
index 421bde7e216..00000000000
--- a/sim/common/dv-pal.c
+++ /dev/null
@@ -1,605 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1996,1998, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-#include "hw-main.h"
-#include "sim-io.h"
-
-/* NOTE: pal is naughty and grubs around looking at things outside of
- its immediate domain */
-#include "hw-tree.h"
-
-#ifdef HAVE_STRING_H
-#include <string.h>
-#else
-#ifdef HAVE_STRINGS_H
-#include <strings.h>
-#endif
-#endif
-
-#ifdef HAVE_UNISTD_H
-#include <unistd.h>
-#endif
-#ifdef HAVE_STDLIB_H
-#include <stdlib.h>
-#endif
-
-/* DEVICE
-
-
- pal - glue logic device containing assorted junk
-
-
- DESCRIPTION
-
-
- Typical hardware dependant hack. This device allows the firmware
- to gain access to all the things the firmware needs (but the OS
- doesn't).
-
- The pal contains the following registers:
-
- |0 reset register (write, 8bit)
- |4 processor id register (read, 8bit)
- |8 interrupt register (8 - port, 9 - level) (write, 16bit)
- |12 processor count register (read, 8bit)
-
- |16 tty input fifo register (read, 8bit)
- |20 tty input status register (read, 8bit)
- |24 tty output fifo register (write, 8bit)
- |28 tty output status register (read, 8bit)
-
- |32 countdown register (read/write, 32bit, big-endian)
- |36 countdown value register (read, 32bit, big-endian)
- |40 timer register (read/write, 32bit, big-endian)
- |44 timer value register (read, 32bit, big-endian)
-
- RESET (write): halts the simulator. The value written to the
- register is used as an exit status.
-
- PROCESSOR ID (read): returns the processor identifier (0 .. N-1) of
- the processor performing the read.
-
- INTERRUPT (write): This register must be written using a two byte
- store. The low byte specifies a port and the upper byte specifies
- the a level. LEVEL is driven on the specified port. By
- convention, the pal's interrupt ports (int0, int1, ...) are wired
- up to the corresponding processor's level sensative external
- interrupt pin. Eg: A two byte write to address 8 of 0x0102
- (big-endian) will result in processor 2's external interrupt pin
- being asserted.
-
- PROCESSOR COUNT (read): returns the total number of processors
- active in the current simulation.
-
- TTY INPUT FIFO (read): if the TTY input status register indicates a
- character is available by being nonzero, returns the next available
- character from the pal's tty input port.
-
- TTY OUTPUT FIFO (write): if the TTY output status register
- indicates the output fifo is not full by being nonzero, outputs the
- character written to the tty's output port.
-
- COUNDOWN (read/write): The countdown registers provide a
- non-repeating timed interrupt source. Writing a 32 bit big-endian
- zero value to this register clears the countdown timer. Writing a
- non-zero 32 bit big-endian value to this register sets the
- countdown timer to expire in VALUE ticks (ticks is target
- dependant). Reading the countdown register returns the last value
- writen.
-
- COUNTDOWN VALUE (read): Reading this 32 bit big-endian register
- returns the number of ticks remaining until the countdown timer
- expires.
-
- TIMER (read/write): The timer registers provide a periodic timed
- interrupt source. Writing a 32 bit big-endian zero value to this
- register clears the periodic timer. Writing a 32 bit non-zero
- value to this register sets the periodic timer to triger every
- VALUE ticks (ticks is target dependant). Reading the timer
- register returns the last value written.
-
- TIMER VALUE (read): Reading this 32 bit big-endian register returns
- the number of ticks until the next periodic interrupt.
-
-
- PROPERTIES
-
-
- reg = <address> <size> (required)
-
- Specify the address (within the parent bus) that this device is to
- be located.
-
- poll? = <boolean>
-
- If present and true, indicates that the device should poll its
- input.
-
-
- PORTS
-
-
- int[0..NR_PROCESSORS] (output)
-
- Driven as a result of a write to the interrupt-port /
- interrupt-level register pair.
-
-
- countdown
-
- Driven whenever the countdown counter reaches zero.
-
-
- timer
-
- Driven whenever the timer counter reaches zero.
-
-
- BUGS
-
-
- At present the common simulator framework does not support input
- polling.
-
- */
-
-
-enum {
- hw_pal_reset_register = 0x0,
- hw_pal_cpu_nr_register = 0x4,
- hw_pal_int_register = 0x8,
- hw_pal_nr_cpu_register = 0xa,
- hw_pal_read_fifo = 0x10,
- hw_pal_read_status = 0x14,
- hw_pal_write_fifo = 0x18,
- hw_pal_write_status = 0x1a,
- hw_pal_countdown = 0x20,
- hw_pal_countdown_value = 0x24,
- hw_pal_timer = 0x28,
- hw_pal_timer_value = 0x2c,
- hw_pal_address_mask = 0x3f,
-};
-
-
-typedef struct _hw_pal_console_buffer {
- char buffer;
- int status;
-} hw_pal_console_buffer;
-
-typedef struct _hw_pal_counter {
- struct hw_event *handler;
- signed64 start;
- unsigned32 delta;
- int periodic_p;
-} hw_pal_counter;
-
-
-typedef struct _hw_pal_device {
- hw_pal_console_buffer input;
- hw_pal_console_buffer output;
- hw_pal_counter countdown;
- hw_pal_counter timer;
- struct hw *disk;
- do_hw_poll_read_method *reader;
-} hw_pal_device;
-
-enum {
- COUNTDOWN_PORT,
- TIMER_PORT,
- INT_PORT,
-};
-
-static const struct hw_port_descriptor hw_pal_ports[] = {
- { "countdown", COUNTDOWN_PORT, 0, output_port, },
- { "timer", TIMER_PORT, 0, output_port, },
- { "int", INT_PORT, MAX_NR_PROCESSORS, output_port, },
- { NULL }
-};
-
-
-/* countdown and simple timer */
-
-static void
-do_counter_event (struct hw *me,
- void *data)
-{
- hw_pal_counter *counter = (hw_pal_counter *) data;
- if (counter->periodic_p)
- {
- HW_TRACE ((me, "timer expired"));
- counter->start = hw_event_queue_time (me);
- hw_port_event (me, TIMER_PORT, 1);
- hw_event_queue_schedule (me, counter->delta, do_counter_event, counter);
- }
- else
- {
- HW_TRACE ((me, "countdown expired"));
- counter->delta = 0;
- hw_port_event (me, COUNTDOWN_PORT, 1);
- }
-}
-
-static void
-do_counter_read (struct hw *me,
- hw_pal_device *pal,
- const char *reg,
- hw_pal_counter *counter,
- unsigned32 *word,
- unsigned nr_bytes)
-{
- unsigned32 val;
- if (nr_bytes != 4)
- hw_abort (me, "%s - bad read size must be 4 bytes", reg);
- val = counter->delta;
- HW_TRACE ((me, "read - %s %ld", reg, (long) val));
- *word = H2BE_4 (val);
-}
-
-static void
-do_counter_value (struct hw *me,
- hw_pal_device *pal,
- const char *reg,
- hw_pal_counter *counter,
- unsigned32 *word,
- unsigned nr_bytes)
-{
- unsigned32 val;
- if (nr_bytes != 4)
- hw_abort (me, "%s - bad read size must be 4 bytes", reg);
- if (counter->delta != 0)
- val = (counter->start + counter->delta
- - hw_event_queue_time (me));
- else
- val = 0;
- HW_TRACE ((me, "read - %s %ld", reg, (long) val));
- *word = H2BE_4 (val);
-}
-
-static void
-do_counter_write (struct hw *me,
- hw_pal_device *pal,
- const char *reg,
- hw_pal_counter *counter,
- const unsigned32 *word,
- unsigned nr_bytes)
-{
- if (nr_bytes != 4)
- hw_abort (me, "%s - bad write size must be 4 bytes", reg);
- if (counter->handler != NULL)
- {
- hw_event_queue_deschedule (me, counter->handler);
- counter->handler = NULL;
- }
- counter->delta = BE2H_4 (*word);
- counter->start = hw_event_queue_time (me);
- HW_TRACE ((me, "write - %s %ld", reg, (long) counter->delta));
- if (counter->delta > 0)
- hw_event_queue_schedule (me, counter->delta, do_counter_event, counter);
-}
-
-
-
-
-/* check the console for an available character */
-static void
-scan_hw_pal (struct hw *me)
-{
- hw_pal_device *hw_pal = (hw_pal_device *)hw_data (me);
- char c;
- int count;
- count = do_hw_poll_read (me, hw_pal->reader, 0/*STDIN*/, &c, sizeof(c));
- switch (count)
- {
- case HW_IO_NOT_READY:
- case HW_IO_EOF:
- hw_pal->input.buffer = 0;
- hw_pal->input.status = 0;
- break;
- default:
- hw_pal->input.buffer = c;
- hw_pal->input.status = 1;
- }
-}
-
-/* write the character to the hw_pal */
-
-static void
-write_hw_pal (struct hw *me,
- char val)
-{
- hw_pal_device *hw_pal = (hw_pal_device *) hw_data (me);
- sim_io_write_stdout (hw_system (me), &val, 1);
- hw_pal->output.buffer = val;
- hw_pal->output.status = 1;
-}
-
-
-/* Reads/writes */
-
-static unsigned
-hw_pal_io_read_buffer (struct hw *me,
- void *dest,
- int space,
- unsigned_word addr,
- unsigned nr_bytes)
-{
- hw_pal_device *hw_pal = (hw_pal_device *) hw_data (me);
- unsigned_1 *byte = (unsigned_1 *) dest;
- memset (dest, 0, nr_bytes);
- switch (addr & hw_pal_address_mask)
- {
-
- case hw_pal_cpu_nr_register:
-#ifdef CPU_INDEX
- *byte = CPU_INDEX (hw_system_cpu (me));
-#else
- *byte = 0;
-#endif
- HW_TRACE ((me, "read - cpu-nr %d\n", *byte));
- break;
-
- case hw_pal_nr_cpu_register:
- if (hw_tree_find_property (me, "/openprom/options/smp") == NULL)
- {
- *byte = 1;
- HW_TRACE ((me, "read - nr-cpu %d (not defined)\n", *byte));
- }
- else
- {
- *byte = hw_tree_find_integer_property (me, "/openprom/options/smp");
- HW_TRACE ((me, "read - nr-cpu %d\n", *byte));
- }
- break;
-
- case hw_pal_read_fifo:
- *byte = hw_pal->input.buffer;
- HW_TRACE ((me, "read - input-fifo %d\n", *byte));
- break;
-
- case hw_pal_read_status:
- scan_hw_pal (me);
- *byte = hw_pal->input.status;
- HW_TRACE ((me, "read - input-status %d\n", *byte));
- break;
-
- case hw_pal_write_fifo:
- *byte = hw_pal->output.buffer;
- HW_TRACE ((me, "read - output-fifo %d\n", *byte));
- break;
-
- case hw_pal_write_status:
- *byte = hw_pal->output.status;
- HW_TRACE ((me, "read - output-status %d\n", *byte));
- break;
-
- case hw_pal_countdown:
- do_counter_read (me, hw_pal, "countdown",
- &hw_pal->countdown, dest, nr_bytes);
- break;
-
- case hw_pal_countdown_value:
- do_counter_value (me, hw_pal, "countdown-value",
- &hw_pal->countdown, dest, nr_bytes);
- break;
-
- case hw_pal_timer:
- do_counter_read (me, hw_pal, "timer",
- &hw_pal->timer, dest, nr_bytes);
- break;
-
- case hw_pal_timer_value:
- do_counter_value (me, hw_pal, "timer-value",
- &hw_pal->timer, dest, nr_bytes);
- break;
-
- default:
- HW_TRACE ((me, "read - ???\n"));
- break;
-
- }
- return nr_bytes;
-}
-
-
-static unsigned
-hw_pal_io_write_buffer (struct hw *me,
- const void *source,
- int space,
- unsigned_word addr,
- unsigned nr_bytes)
-{
- hw_pal_device *hw_pal = (hw_pal_device*) hw_data (me);
- unsigned_1 *byte = (unsigned_1 *) source;
-
- switch (addr & hw_pal_address_mask)
- {
-
- case hw_pal_reset_register:
- hw_halt (me, sim_exited, byte[0]);
- break;
-
- case hw_pal_int_register:
- hw_port_event (me,
- INT_PORT + byte[0], /*port*/
- (nr_bytes > 1 ? byte[1] : 0)); /* val */
- break;
-
- case hw_pal_read_fifo:
- hw_pal->input.buffer = byte[0];
- HW_TRACE ((me, "write - input-fifo %d\n", byte[0]));
- break;
-
- case hw_pal_read_status:
- hw_pal->input.status = byte[0];
- HW_TRACE ((me, "write - input-status %d\n", byte[0]));
- break;
-
- case hw_pal_write_fifo:
- write_hw_pal (me, byte[0]);
- HW_TRACE ((me, "write - output-fifo %d\n", byte[0]));
- break;
-
- case hw_pal_write_status:
- hw_pal->output.status = byte[0];
- HW_TRACE ((me, "write - output-status %d\n", byte[0]));
- break;
-
- case hw_pal_countdown:
- do_counter_write (me, hw_pal, "countdown",
- &hw_pal->countdown, source, nr_bytes);
- break;
-
- case hw_pal_timer:
- do_counter_write (me, hw_pal, "timer",
- &hw_pal->timer, source, nr_bytes);
- break;
-
- }
- return nr_bytes;
-}
-
-
-/* instances of the hw_pal struct hw */
-
-#if NOT_YET
-static void
-hw_pal_instance_delete_callback(hw_instance *instance)
-{
- /* nothing to delete, the hw_pal is attached to the struct hw */
- return;
-}
-#endif
-
-#if NOT_YET
-static int
-hw_pal_instance_read_callback (hw_instance *instance,
- void *buf,
- unsigned_word len)
-{
- DITRACE (pal, ("read - %s (%ld)", (const char*) buf, (long int) len));
- return sim_io_read_stdin (buf, len);
-}
-#endif
-
-#if NOT_YET
-static int
-hw_pal_instance_write_callback (hw_instance *instance,
- const void *buf,
- unsigned_word len)
-{
- int i;
- const char *chp = buf;
- hw_pal_device *hw_pal = hw_instance_data (instance);
- DITRACE (pal, ("write - %s (%ld)", (const char*) buf, (long int) len));
- for (i = 0; i < len; i++)
- write_hw_pal (hw_pal, chp[i]);
- sim_io_flush_stdoutput ();
- return i;
-}
-#endif
-
-#if NOT_YET
-static const hw_instance_callbacks hw_pal_instance_callbacks = {
- hw_pal_instance_delete_callback,
- hw_pal_instance_read_callback,
- hw_pal_instance_write_callback,
-};
-#endif
-
-#if 0
-static hw_instance *
-hw_pal_create_instance (struct hw *me,
- const char *path,
- const char *args)
-{
- return hw_create_instance_from (me, NULL,
- hw_data (me),
- path, args,
- &hw_pal_instance_callbacks);
-}
-#endif
-
-
-static void
-hw_pal_attach_address (struct hw *me,
- int level,
- int space,
- address_word addr,
- address_word nr_bytes,
- struct hw *client)
-{
- hw_pal_device *pal = (hw_pal_device*) hw_data (me);
- pal->disk = client;
-}
-
-
-#if 0
-static hw_callbacks const hw_pal_callbacks = {
- { generic_hw_init_address, },
- { hw_pal_attach_address, }, /* address */
- { hw_pal_io_read_buffer_callback,
- hw_pal_io_write_buffer_callback, },
- { NULL, }, /* DMA */
- { NULL, NULL, hw_pal_interrupt_ports }, /* interrupt */
- { generic_hw_unit_decode,
- generic_hw_unit_encode,
- generic_hw_address_to_attach_address,
- generic_hw_size_to_attach_size },
- hw_pal_create_instance,
-};
-#endif
-
-
-static void
-hw_pal_finish (struct hw *hw)
-{
- /* create the descriptor */
- hw_pal_device *hw_pal = HW_ZALLOC (hw, hw_pal_device);
- hw_pal->output.status = 1;
- hw_pal->output.buffer = '\0';
- hw_pal->input.status = 0;
- hw_pal->input.buffer = '\0';
- set_hw_data (hw, hw_pal);
- set_hw_attach_address (hw, hw_pal_attach_address);
- set_hw_io_read_buffer (hw, hw_pal_io_read_buffer);
- set_hw_io_write_buffer (hw, hw_pal_io_write_buffer);
- set_hw_ports (hw, hw_pal_ports);
- /* attach ourselves */
- do_hw_attach_regs (hw);
- /* If so configured, enable polled input */
- if (hw_find_property (hw, "poll?") != NULL
- && hw_find_boolean_property (hw, "poll?"))
- {
- hw_pal->reader = sim_io_poll_read;
- }
- else
- {
- hw_pal->reader = sim_io_read;
- }
- /* tag the periodic timer */
- hw_pal->timer.periodic_p = 1;
-}
-
-
-const struct hw_descriptor dv_pal_descriptor[] = {
- { "pal", hw_pal_finish, },
- { NULL },
-};
diff --git a/sim/common/dv-sockser.c b/sim/common/dv-sockser.c
deleted file mode 100644
index d5e657732dd..00000000000
--- a/sim/common/dv-sockser.c
+++ /dev/null
@@ -1,388 +0,0 @@
-/* Serial port emulation using sockets.
- Copyright (C) 1998 Free Software Foundation, Inc.
- Contributed by Cygnus Solutions.
-
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License along
-with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
-
-/* FIXME: will obviously need to evolve.
- - connectionless sockets might be more appropriate. */
-
-#include "sim-main.h"
-
-#ifdef HAVE_STRING_H
-#include <string.h>
-#else
-#ifdef HAVE_STRINGS_H
-#include <strings.h>
-#endif
-#endif
-#include <signal.h>
-#ifdef HAVE_STDLIB_H
-#include <stdlib.h>
-#endif
-#ifdef HAVE_FCNTL_H
-#include <fcntl.h>
-#endif
-#ifdef HAVE_UNISTD_H
-#include <unistd.h>
-#endif
-
-#include <errno.h>
-#include <sys/types.h>
-#include <sys/time.h>
-#include <netinet/in.h>
-#include <arpa/inet.h>
-#include <netdb.h>
-#include <sys/socket.h>
-
-#ifndef __CYGWIN32__
-#include <netinet/tcp.h>
-#endif
-
-#include "sim-assert.h"
-#include "sim-options.h"
-
-#include "dv-sockser.h"
-
-/* Get definitions for both O_NONBLOCK and O_NDELAY. */
-
-#ifndef O_NDELAY
-#ifdef FNDELAY
-#define O_NDELAY FNDELAY
-#else /* ! defined (FNDELAY) */
-#define O_NDELAY 0
-#endif /* ! defined (FNDELAY) */
-#endif /* ! defined (O_NDELAY) */
-
-#ifndef O_NONBLOCK
-#ifdef FNBLOCK
-#define O_NONBLOCK FNBLOCK
-#else /* ! defined (FNBLOCK) */
-#define O_NONBLOCK 0
-#endif /* ! defined (FNBLOCK) */
-#endif /* ! defined (O_NONBLOCK) */
-
-
-/* Compromise between eating cpu and properly busy-waiting.
- One could have an option to set this but for now that seems
- like featuritis. */
-#define DEFAULT_TIMEOUT 1000 /* microseconds */
-
-/* FIXME: These should allocated at run time and kept with other simulator
- state (duh...). Later. */
-const char * sockser_addr = NULL;
-/* Timeout in microseconds during status flag computation.
- Setting this to zero achieves proper busy wait semantics but eats cpu. */
-static unsigned int sockser_timeout = DEFAULT_TIMEOUT;
-static int sockser_listen_fd = -1;
-static int sockser_fd = -1;
-
-/* FIXME: use tree properties when they're ready. */
-
-typedef enum {
- OPTION_ADDR = OPTION_START
-} SOCKSER_OPTIONS;
-
-static DECLARE_OPTION_HANDLER (sockser_option_handler);
-
-static const OPTION sockser_options[] =
-{
- { { "sockser-addr", required_argument, NULL, OPTION_ADDR },
- '\0', "SOCKET ADDRESS", "Set serial emulation socket address",
- sockser_option_handler },
- { { NULL, no_argument, NULL, 0 }, '\0', NULL, NULL, NULL }
-};
-
-static SIM_RC
-sockser_option_handler (SIM_DESC sd, sim_cpu *cpu, int opt,
- char *arg, int is_command)
-{
- switch (opt)
- {
- case OPTION_ADDR :
- sockser_addr = arg;
- break;
- }
-
- return SIM_RC_OK;
-}
-
-static SIM_RC
-dv_sockser_init (SIM_DESC sd)
-{
- struct hostent *hostent;
- struct sockaddr_in sockaddr;
- char hostname[100];
- const char *port_str;
- int tmp,port;
-
- if (STATE_ENVIRONMENT (sd) != OPERATING_ENVIRONMENT
- || sockser_addr == NULL)
- return SIM_RC_OK;
-
- if (*sockser_addr == '/')
- {
- /* support for these can come later */
- sim_io_eprintf (sd, "sockser init: unix domain sockets not supported: `%s'\n",
- sockser_addr);
- return SIM_RC_FAIL;
- }
-
- port_str = strchr (sockser_addr, ':');
- if (!port_str)
- {
- sim_io_eprintf (sd, "sockser init: missing port number: `%s'\n",
- sockser_addr);
- return SIM_RC_FAIL;
- }
- tmp = port_str - sockser_addr;
- if (tmp >= sizeof hostname)
- tmp = sizeof (hostname) - 1;
- strncpy (hostname, sockser_addr, tmp);
- hostname[tmp] = '\000';
- port = atoi (port_str + 1);
-
- hostent = gethostbyname (hostname);
- if (! hostent)
- {
- sim_io_eprintf (sd, "sockser init: unknown host: %s\n",
- hostname);
- return SIM_RC_FAIL;
- }
-
- sockser_listen_fd = socket (PF_INET, SOCK_STREAM, 0);
- if (sockser_listen_fd < 0)
- {
- sim_io_eprintf (sd, "sockser init: unable to get socket: %s\n",
- strerror (errno));
- return SIM_RC_FAIL;
- }
-
- sockaddr.sin_family = PF_INET;
- sockaddr.sin_port = htons(port);
- memcpy (&sockaddr.sin_addr.s_addr, hostent->h_addr,
- sizeof (struct in_addr));
-
- tmp = 1;
- if (setsockopt (sockser_listen_fd, SOL_SOCKET, SO_REUSEADDR, (void*)& tmp, sizeof(tmp)) < 0)
- {
- sim_io_eprintf (sd, "sockser init: unable to set SO_REUSEADDR: %s\n",
- strerror (errno));
- }
- if (bind (sockser_listen_fd, (struct sockaddr *) &sockaddr, sizeof (sockaddr)) < 0)
- {
- sim_io_eprintf (sd, "sockser init: unable to bind socket address: %s\n",
- strerror (errno));
- close (sockser_listen_fd);
- sockser_listen_fd = -1;
- return SIM_RC_FAIL;
- }
- if (listen (sockser_listen_fd, 1) < 0)
- {
- sim_io_eprintf (sd, "sockser init: unable to set up listener: %s\n",
- strerror (errno));
- close (sockser_listen_fd);
- sockser_listen_fd = -1;
- return SIM_RC_OK;
- }
-
- /* Handle writes to missing client -> SIGPIPE.
- ??? Need a central signal management module. */
- {
- RETSIGTYPE (*orig) ();
- orig = signal (SIGPIPE, SIG_IGN);
- /* If a handler is already set up, don't mess with it. */
- if (orig != SIG_DFL && orig != SIG_IGN)
- signal (SIGPIPE, orig);
- }
-
- return SIM_RC_OK;
-}
-
-static void
-dv_sockser_uninstall (SIM_DESC sd)
-{
- if (sockser_listen_fd != -1)
- {
- close (sockser_listen_fd);
- sockser_listen_fd = -1;
- }
- if (sockser_fd != -1)
- {
- close (sockser_fd);
- sockser_fd = -1;
- }
-}
-
-SIM_RC
-dv_sockser_install (SIM_DESC sd)
-{
- SIM_ASSERT (STATE_MAGIC (sd) == SIM_MAGIC_NUMBER);
- if (sim_add_option_table (sd, NULL, sockser_options) != SIM_RC_OK)
- return SIM_RC_FAIL;
- sim_module_add_init_fn (sd, dv_sockser_init);
- sim_module_add_uninstall_fn (sd, dv_sockser_uninstall);
- return SIM_RC_OK;
-}
-
-static int
-connected_p (SIM_DESC sd)
-{
- int numfds,flags;
- struct timeval tv;
- fd_set readfds;
- struct sockaddr sockaddr;
- int addrlen;
-
- if (sockser_listen_fd == -1)
- return 0;
-
- if (sockser_fd >= 0)
- {
- /* FIXME: has client gone away? */
- return 1;
- }
-
- /* Not connected. Connect with a client if there is one. */
-
- FD_ZERO (&readfds);
- FD_SET (sockser_listen_fd, &readfds);
-
- /* ??? One can certainly argue this should be done differently,
- but for now this is sufficient. */
- tv.tv_sec = 0;
- tv.tv_usec = sockser_timeout;
-
- numfds = select (sockser_listen_fd + 1, &readfds, 0, 0, &tv);
- if (numfds <= 0)
- return 0;
-
- addrlen = sizeof (sockaddr);
- sockser_fd = accept (sockser_listen_fd, &sockaddr, &addrlen);
- if (sockser_fd < 0)
- return 0;
-
- /* Set non-blocking i/o. */
- flags = fcntl (sockser_fd, F_GETFL);
- flags |= O_NONBLOCK | O_NDELAY;
- if (fcntl (sockser_fd, F_SETFL, flags) == -1)
- {
- sim_io_eprintf (sd, "unable to set nonblocking i/o");
- close (sockser_fd);
- sockser_fd = -1;
- return 0;
- }
- return 1;
-}
-
-int
-dv_sockser_status (SIM_DESC sd)
-{
- int numrfds,numwfds,status;
- struct timeval tv;
- fd_set readfds,writefds;
-
- /* status to return if the socket isn't set up, or select fails */
- status = DV_SOCKSER_INPUT_EMPTY | DV_SOCKSER_OUTPUT_EMPTY;
-
- if (! connected_p (sd))
- return status;
-
- FD_ZERO (&readfds);
- FD_ZERO (&writefds);
- FD_SET (sockser_fd, &readfds);
- FD_SET (sockser_fd, &writefds);
-
- /* ??? One can certainly argue this should be done differently,
- but for now this is sufficient. The read is done separately
- from the write to enforce the delay which we heuristically set to
- once every SOCKSER_TIMEOUT_FREQ tries.
- No, this isn't great for SMP situations, blah blah blah. */
-
- {
- static int n;
-#define SOCKSER_TIMEOUT_FREQ 42
- if (++n == SOCKSER_TIMEOUT_FREQ)
- n = 0;
- if (n == 0)
- {
- tv.tv_sec = 0;
- tv.tv_usec = sockser_timeout;
- numrfds = select (sockser_fd + 1, &readfds, 0, 0, &tv);
- tv.tv_sec = 0;
- tv.tv_usec = 0;
- numwfds = select (sockser_fd + 1, 0, &writefds, 0, &tv);
- }
- else /* do both selects at once */
- {
- tv.tv_sec = 0;
- tv.tv_usec = 0;
- numrfds = numwfds = select (sockser_fd + 1, &readfds, &writefds, 0, &tv);
- }
- }
-
- status = 0;
- if (numrfds <= 0 || ! FD_ISSET (sockser_fd, &readfds))
- status |= DV_SOCKSER_INPUT_EMPTY;
- if (numwfds <= 0 || FD_ISSET (sockser_fd, &writefds))
- status |= DV_SOCKSER_OUTPUT_EMPTY;
- return status;
-}
-
-int
-dv_sockser_write (SIM_DESC sd, unsigned char c)
-{
- int n;
-
- if (! connected_p (sd))
- return -1;
- n = write (sockser_fd, &c, 1);
- if (n == -1)
- {
- if (errno == EPIPE)
- {
- close (sockser_fd);
- sockser_fd = -1;
- }
- return -1;
- }
- if (n != 1)
- return -1;
- return 1;
-}
-
-int
-dv_sockser_read (SIM_DESC sd)
-{
- unsigned char c;
- int n;
-
- if (! connected_p (sd))
- return -1;
- n = read (sockser_fd, &c, 1);
- /* ??? We're assuming semantics that may not be correct for all hosts.
- In particular (from cvssrc/src/server.c), this assumes that we are using
- BSD or POSIX nonblocking I/O. System V nonblocking I/O returns zero if
- there is nothing to read. */
- if (n == 0)
- {
- close (sockser_fd);
- sockser_fd = -1;
- return -1;
- }
- if (n != 1)
- return -1;
- return c;
-}
diff --git a/sim/common/dv-sockser.h b/sim/common/dv-sockser.h
deleted file mode 100644
index ef0a7a9973a..00000000000
--- a/sim/common/dv-sockser.h
+++ /dev/null
@@ -1,32 +0,0 @@
-/* Serial port emulation via sockets.
- Copyright (C) 1998, Free Software Foundation, Inc.
-
-This file is part of the GNU simulators.
-
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License along
-with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
-
-#ifndef DV_SOCKSER_H
-#define DV_SOCKSER_H
-
-/* bits in result of dev_sockser_status */
-#define DV_SOCKSER_INPUT_EMPTY 1
-#define DV_SOCKSER_OUTPUT_EMPTY 2
-
-/* FIXME: later add a device ptr arg */
-extern int dv_sockser_status (SIM_DESC);
-int dv_sockser_write (SIM_DESC, unsigned char);
-int dv_sockser_read (SIM_DESC);
-
-#endif /* DV_SOCKSER_H */
diff --git a/sim/common/gdbinit.in b/sim/common/gdbinit.in
deleted file mode 100644
index ddda344a2e3..00000000000
--- a/sim/common/gdbinit.in
+++ /dev/null
@@ -1,10 +0,0 @@
-break sim_io_error
-
-define dump
-set sim_debug_dump ()
-end
-
-document dump
-Dump cpu and simulator registers for debugging the simulator.
-Requires the simulator to provide function sim_debug_dump.
-end
diff --git a/sim/common/genmloop.sh b/sim/common/genmloop.sh
deleted file mode 100644
index dddd1a1c337..00000000000
--- a/sim/common/genmloop.sh
+++ /dev/null
@@ -1,1334 +0,0 @@
-# Generate the main loop of the simulator.
-# Copyright (C) 1996, 1997, 1998, 1999, 2000 Free Software Foundation, Inc.
-# Contributed by Cygnus Support.
-#
-# This file is part of the GNU simulators.
-#
-# This program is free software; you can redistribute it and/or modify
-# it under the terms of the GNU General Public License as published by
-# the Free Software Foundation; either version 2, or (at your option)
-# any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License along
-# with this program; if not, write to the Free Software Foundation, Inc.,
-# 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-#
-# This file creates two files: eng.hin and mloop.cin.
-# eng.hin defines a few macros that specify what kind of engine was selected
-# based on the arguments to this script.
-# mloop.cin contains the engine.
-#
-# ??? Rename mloop.c to eng.c?
-# ??? Rename mainloop.in to engine.in?
-# ??? Add options to specify output file names?
-# ??? Rename this file to genengine.sh?
-#
-# Syntax: genmloop.sh [options]
-#
-# Options:
-#
-# -mono | -multi
-# - specify single cpu or multiple cpus (number specifyable at runtime),
-# maximum number is a configuration parameter
-# - -multi wip
-#
-# -fast: include support for fast execution in addition to full featured mode
-#
-# Full featured mode is for tracing, profiling, etc. and is always
-# provided. Fast mode contains no frills, except speed.
-# A target need only provide a "full" version of one of
-# simple,scache,pbb. If the target wants it can also provide a fast
-# version of same. It can't provide more than this.
-# ??? Later add ability to have another set of full/fast semantics
-# for use in with-devices/with-smp situations (pbb can be inappropriate
-# here).
-#
-# -full-switch: same as -fast but for full featured version of -switch
-# Only needed if -fast present.
-#
-# -simple: simple execution engine (the default)
-#
-# This engine fetches and executes one instruction at a time.
-# Field extraction is done in the semantic routines.
-#
-# ??? There are two possible flavours of -simple. One that extracts
-# fields in the semantic routine (which is what is implemented here),
-# and one that stores the extracted fields in ARGBUF before calling the
-# semantic routine. The latter is essentially the -scache case with a
-# cache size of one (and the scache lookup code removed). There are no
-# current uses of this and it's not clear when doing this would be a win.
-# More complicated ISA's that want to use -simple may find this a win.
-# Should this ever be desirable, implement a new engine style here and
-# call it -extract (or some such). It's believed that the CGEN-generated
-# code for the -scache case would be usable here, so no new code
-# generation option would be needed for CGEN.
-#
-# -scache: use the scache to speed things up (not always a win)
-#
-# This engine caches the extracted instruction before executing it.
-# When executing instructions they are first looked up in the scache.
-#
-# -pbb: same as -scache but extract a (pseudo-) basic block at a time
-#
-# This engine is basically identical to the scache version except that
-# extraction is done a pseudo-basic-block at a time and the address of
-# the scache entry of a branch target is recorded as well.
-# Additional speedups are then possible by defering Ctrl-C checking
-# to the end of basic blocks and by threading the insns together.
-# We call them pseudo-basic-block's instead of just basic-blocks because
-# they're not necessarily basic-blocks, though normally are.
-#
-# -parallel-read: support parallel execution with read-before-exec support.
-# -parallel-write: support parallel execution with write-after-exec support.
-# -parallel-generic-write: support parallel execution with generic queued
-# writes.
-#
-# One of these options is specified in addition to -simple, -scache,
-# -pbb. Note that while the code can determine if the cpu supports
-# parallel execution with HAVE_PARALLEL_INSNS [and thus this option is
-# technically unnecessary], having this option cuts down on the clutter
-# in the result.
-#
-# -parallel-only: semantic code only supports parallel version of insn
-#
-# Semantic code only supports parallel versions of each insn.
-# Things can be sped up by generating both serial and parallel versions
-# and is better suited to mixed parallel architectures like the m32r.
-#
-# -prefix: string to prepend to function names in mloop.c/eng.h.
-#
-# If no prefix is specified, the cpu type is used.
-#
-# -switch file: specify file containing semantics implemented as a switch()
-#
-# -cpu <cpu-family>
-#
-# Specify the cpu family name.
-#
-# -infile <input-file>
-#
-# Specify the mainloop.in input file.
-#
-# -outfile-suffix <output-file-suffix>
-#
-# Specify the suffix to append to output files.
-#
-# Only one of -scache/-pbb may be selected.
-# -simple is the default.
-#
-####
-#
-# TODO
-# - build mainloop.in from .cpu file
-
-type=mono
-#scache=
-#fast=
-#full_switch=
-#pbb=
-parallel=no
-parallel_only=no
-switch=
-cpu="unknown"
-infile=""
-prefix="unknown"
-outsuffix=""
-
-while test $# -gt 0
-do
- case $1 in
- -mono) type=mono ;;
- -multi) type=multi ;;
- -no-fast) ;;
- -fast) fast=yes ;;
- -full-switch) full_switch=yes ;;
- -simple) ;;
- -scache) scache=yes ;;
- -pbb) pbb=yes ;;
- -no-parallel) ;;
- -outfile-suffix) shift ; outsuffix=$1 ;;
- -parallel-read) parallel=read ;;
- -parallel-write) parallel=write ;;
- -parallel-generic-write) parallel=genwrite ;;
- -parallel-only) parallel_only=yes ;;
- -prefix) shift ; prefix=$1 ;;
- -switch) shift ; switch=$1 ;;
- -cpu) shift ; cpu=$1 ;;
- -infile) shift ; infile=$1 ;;
- *) echo "unknown option: $1" >&2 ; exit 1 ;;
- esac
- shift
-done
-
-# Argument validation.
-
-if [ x$scache = xyes -a x$pbb = xyes ] ; then
- echo "only one of -scache and -pbb may be selected" >&2
- exit 1
-fi
-
-if [ "x$cpu" = xunknown ] ; then
- echo "cpu family not specified" >&2
- exit 1
-fi
-
-if [ "x$infile" = x ] ; then
- echo "mainloop.in not specified" >&2
- exit 1
-fi
-
-if [ "x$prefix" = xunknown ] ; then
- prefix=$cpu
-fi
-
-lowercase='abcdefghijklmnopqrstuvwxyz'
-uppercase='ABCDEFGHIJKLMNOPQRSTUVWXYZ'
-CPU=`echo ${cpu} | tr "${lowercase}" "${uppercase}"`
-PREFIX=`echo ${prefix} | tr "${lowercase}" "${uppercase}"`
-
-##########################################################################
-
-rm -f eng${outsuffix}.hin
-exec 1>eng${outsuffix}.hin
-
-echo "/* engine configuration for ${cpu} */"
-echo ""
-
-echo "/* WITH_FAST: non-zero if a fast version of the engine is available"
-echo " in addition to the full-featured version. */"
-if [ x$fast = xyes ] ; then
- echo "#define WITH_FAST 1"
-else
- echo "#define WITH_FAST 0"
-fi
-
-echo ""
-echo "/* WITH_SCACHE_PBB_${PREFIX}: non-zero if the pbb engine was selected. */"
-if [ x$pbb = xyes ] ; then
- echo "#define WITH_SCACHE_PBB_${PREFIX} 1"
-else
- echo "#define WITH_SCACHE_PBB_${PREFIX} 0"
-fi
-
-echo ""
-echo "/* HAVE_PARALLEL_INSNS: non-zero if cpu can parallelly execute > 1 insn. */"
-# blah blah blah, other ways to do this, blah blah blah
-case x$parallel in
-xno)
- echo "#define HAVE_PARALLEL_INSNS 0"
- echo "#define WITH_PARALLEL_READ 0"
- echo "#define WITH_PARALLEL_WRITE 0"
- echo "#define WITH_PARALLEL_GENWRITE 0"
- ;;
-xread)
- echo "#define HAVE_PARALLEL_INSNS 1"
- echo "/* Parallel execution is supported by read-before-exec. */"
- echo "#define WITH_PARALLEL_READ 1"
- echo "#define WITH_PARALLEL_WRITE 0"
- echo "#define WITH_PARALLEL_GENWRITE 0"
- ;;
-xwrite)
- echo "#define HAVE_PARALLEL_INSNS 1"
- echo "/* Parallel execution is supported by write-after-exec. */"
- echo "#define WITH_PARALLEL_READ 0"
- echo "#define WITH_PARALLEL_WRITE 1"
- echo "#define WITH_PARALLEL_GENWRITE 0"
- ;;
-xgenwrite)
- echo "#define HAVE_PARALLEL_INSNS 1"
- echo "/* Parallel execution is supported by generic write-after-exec. */"
- echo "#define WITH_PARALLEL_READ 0"
- echo "#define WITH_PARALLEL_WRITE 0"
- echo "#define WITH_PARALLEL_GENWRITE 1"
- ;;
-esac
-
-if [ "x$switch" != x ] ; then
- echo ""
- echo "/* WITH_SEM_SWITCH_FULL: non-zero if full-featured engine is"
- echo " implemented as a switch(). */"
- if [ x$fast != xyes -o x$full_switch = xyes ] ; then
- echo "#define WITH_SEM_SWITCH_FULL 1"
- else
- echo "#define WITH_SEM_SWITCH_FULL 0"
- fi
- echo ""
- echo "/* WITH_SEM_SWITCH_FAST: non-zero if fast engine is"
- echo " implemented as a switch(). */"
- if [ x$fast = xyes ] ; then
- echo "#define WITH_SEM_SWITCH_FAST 1"
- else
- echo "#define WITH_SEM_SWITCH_FAST 0"
- fi
-fi
-
-# Decls of functions we define.
-
-echo ""
-echo "/* Functions defined in the generated mainloop.c file"
-echo " (which doesn't necessarily have that file name). */"
-echo ""
-echo "extern ENGINE_FN ${prefix}_engine_run_full;"
-echo "extern ENGINE_FN ${prefix}_engine_run_fast;"
-
-if [ x$pbb = xyes ] ; then
- echo ""
- echo "extern SEM_PC ${prefix}_pbb_begin (SIM_CPU *, int);"
- echo "extern SEM_PC ${prefix}_pbb_chain (SIM_CPU *, SEM_ARG);"
- echo "extern SEM_PC ${prefix}_pbb_cti_chain (SIM_CPU *, SEM_ARG, SEM_BRANCH_TYPE, PCADDR);"
- echo "extern void ${prefix}_pbb_before (SIM_CPU *, SCACHE *);"
- echo "extern void ${prefix}_pbb_after (SIM_CPU *, SCACHE *);"
-fi
-
-##########################################################################
-
-rm -f tmp-mloop-$$.cin mloop${outsuffix}.cin
-exec 1>tmp-mloop-$$.cin
-
-# We use @cpu@ instead of ${cpu} because we still need to run sed to handle
-# transformation of @cpu@ for mainloop.in, so there's no need to use ${cpu}
-# here.
-
-cat << EOF
-/* This file is generated by the genmloop script. DO NOT EDIT! */
-
-/* Enable switch() support in cgen headers. */
-#define SEM_IN_SWITCH
-
-#define WANT_CPU @cpu@
-#define WANT_CPU_@CPU@
-
-#include "sim-main.h"
-#include "bfd.h"
-#include "cgen-mem.h"
-#include "cgen-ops.h"
-#include "sim-assert.h"
-
-/* Fill in the administrative ARGBUF fields required by all insns,
- virtual and real. */
-
-static INLINE void
-@prefix@_fill_argbuf (const SIM_CPU *cpu, ARGBUF *abuf, const IDESC *idesc,
- PCADDR pc, int fast_p)
-{
-#if WITH_SCACHE
- SEM_SET_CODE (abuf, idesc, fast_p);
- ARGBUF_ADDR (abuf) = pc;
-#endif
- ARGBUF_IDESC (abuf) = idesc;
-}
-
-/* Fill in tracing/profiling fields of an ARGBUF. */
-
-static INLINE void
-@prefix@_fill_argbuf_tp (const SIM_CPU *cpu, ARGBUF *abuf,
- int trace_p, int profile_p)
-{
- ARGBUF_TRACE_P (abuf) = trace_p;
- ARGBUF_PROFILE_P (abuf) = profile_p;
-}
-
-#if WITH_SCACHE_PBB
-
-/* Emit the "x-before" handler.
- x-before is emitted before each insn (serial or parallel).
- This is as opposed to x-after which is only emitted at the end of a group
- of parallel insns. */
-
-static INLINE void
-@prefix@_emit_before (SIM_CPU *current_cpu, SCACHE *sc, PCADDR pc, int first_p)
-{
- ARGBUF *abuf = &sc[0].argbuf;
- const IDESC *id = & CPU_IDESC (current_cpu) [@PREFIX@_INSN_X_BEFORE];
-
- abuf->fields.before.first_p = first_p;
- @prefix@_fill_argbuf (current_cpu, abuf, id, pc, 0);
- /* no need to set trace_p,profile_p */
-}
-
-/* Emit the "x-after" handler.
- x-after is emitted after a serial insn or at the end of a group of
- parallel insns. */
-
-static INLINE void
-@prefix@_emit_after (SIM_CPU *current_cpu, SCACHE *sc, PCADDR pc)
-{
- ARGBUF *abuf = &sc[0].argbuf;
- const IDESC *id = & CPU_IDESC (current_cpu) [@PREFIX@_INSN_X_AFTER];
-
- @prefix@_fill_argbuf (current_cpu, abuf, id, pc, 0);
- /* no need to set trace_p,profile_p */
-}
-
-#endif /* WITH_SCACHE_PBB */
-
-EOF
-
-${SHELL} $infile support
-
-##########################################################################
-
-# Simple engine: fetch an instruction, execute the instruction.
-#
-# Instruction fields are not extracted into ARGBUF, they are extracted in
-# the semantic routines themselves. However, there is still a need to pass
-# and return misc. information to the semantic routines so we still use ARGBUF.
-# [One could certainly implement things differently and remove ARGBUF.
-# It's not clear this is necessarily always a win.]
-# ??? The use of the SCACHE struct is for consistency with the with-scache
-# case though it might be a source of confusion.
-
-if [ x$scache != xyes -a x$pbb != xyes ] ; then
-
- cat << EOF
-
-#define FAST_P 0
-
-void
-@prefix@_engine_run_full (SIM_CPU *current_cpu)
-{
-#define FAST_P 0
- SIM_DESC current_state = CPU_STATE (current_cpu);
- /* ??? Use of SCACHE is a bit of a hack as we don't actually use the scache.
- We do however use ARGBUF so for consistency with the other engine flavours
- the SCACHE type is used. */
- SCACHE cache[MAX_LIW_INSNS];
- SCACHE *sc = &cache[0];
-
-EOF
-
-case x$parallel in
-xread | xwrite)
- cat << EOF
- PAREXEC pbufs[MAX_PARALLEL_INSNS];
- PAREXEC *par_exec;
-
-EOF
- ;;
-esac
-
-# Any initialization code before looping starts.
-# Note that this code may declare some locals.
-${SHELL} $infile init
-
-if [ x$parallel = xread ] ; then
- cat << EOF
-
-#if defined (__GNUC__)
- {
- if (! CPU_IDESC_READ_INIT_P (current_cpu))
- {
-/* ??? Later maybe paste read.c in when building mainloop.c. */
-#define DEFINE_LABELS
-#include "readx.c"
- CPU_IDESC_READ_INIT_P (current_cpu) = 1;
- }
- }
-#endif
-
-EOF
-fi
-
-cat << EOF
-
- if (! CPU_IDESC_SEM_INIT_P (current_cpu))
- {
-#if WITH_SEM_SWITCH_FULL
-#if defined (__GNUC__)
-/* ??? Later maybe paste sem-switch.c in when building mainloop.c. */
-#define DEFINE_LABELS
-#include "$switch"
-#endif
-#else
- @prefix@_sem_init_idesc_table (current_cpu);
-#endif
- CPU_IDESC_SEM_INIT_P (current_cpu) = 1;
- }
-
- do
- {
-/* begin full-exec-simple */
-EOF
-
-${SHELL} $infile full-exec-simple
-
-cat << EOF
-/* end full-exec-simple */
-
- ++ CPU_INSN_COUNT (current_cpu);
- }
- while (0 /*CPU_RUNNING_P (current_cpu)*/);
-}
-
-#undef FAST_P
-
-EOF
-
-####################################
-
-# Simple engine: fast version.
-# ??? A somewhat dubious effort, but for completeness' sake.
-
-if [ x$fast = xyes ] ; then
-
- cat << EOF
-
-#define FAST_P 1
-
-FIXME: "fast simple version unimplemented, delete -fast arg to genmloop.sh."
-
-#undef FAST_P
-
-EOF
-
-fi # -fast
-
-fi # simple engine
-
-##########################################################################
-
-# Non-parallel scache engine: lookup insn in scache, fetch if missing,
-# then execute it.
-
-if [ x$scache = xyes -a x$parallel = xno ] ; then
-
- cat << EOF
-
-static INLINE SCACHE *
-@prefix@_scache_lookup (SIM_CPU *current_cpu, PCADDR vpc, SCACHE *scache,
- unsigned int hash_mask, int FAST_P)
-{
- /* First step: look up current insn in hash table. */
- SCACHE *sc = scache + SCACHE_HASH_PC (vpc, hash_mask);
-
- /* If the entry isn't the one we want (cache miss),
- fetch and decode the instruction. */
- if (sc->argbuf.addr != vpc)
- {
- if (! FAST_P)
- PROFILE_COUNT_SCACHE_MISS (current_cpu);
-
-/* begin extract-scache */
-EOF
-
-${SHELL} $infile extract-scache
-
-cat << EOF
-/* end extract-scache */
- }
- else if (! FAST_P)
- {
- PROFILE_COUNT_SCACHE_HIT (current_cpu);
- /* Make core access statistics come out right.
- The size is a guess, but it's currently not used either. */
- PROFILE_COUNT_CORE (current_cpu, vpc, 2, exec_map);
- }
-
- return sc;
-}
-
-#define FAST_P 0
-
-void
-@prefix@_engine_run_full (SIM_CPU *current_cpu)
-{
- SIM_DESC current_state = CPU_STATE (current_cpu);
- SCACHE *scache = CPU_SCACHE_CACHE (current_cpu);
- unsigned int hash_mask = CPU_SCACHE_HASH_MASK (current_cpu);
- SEM_PC vpc;
-
-EOF
-
-# Any initialization code before looping starts.
-# Note that this code may declare some locals.
-${SHELL} $infile init
-
-cat << EOF
-
- if (! CPU_IDESC_SEM_INIT_P (current_cpu))
- {
-#if ! WITH_SEM_SWITCH_FULL
- @prefix@_sem_init_idesc_table (current_cpu);
-#endif
- CPU_IDESC_SEM_INIT_P (current_cpu) = 1;
- }
-
- vpc = GET_H_PC ();
-
- do
- {
- SCACHE *sc;
-
- sc = @prefix@_scache_lookup (current_cpu, vpc, scache, hash_mask, FAST_P);
-
-/* begin full-exec-scache */
-EOF
-
-${SHELL} $infile full-exec-scache
-
-cat << EOF
-/* end full-exec-scache */
-
- SET_H_PC (vpc);
-
- ++ CPU_INSN_COUNT (current_cpu);
- }
- while (0 /*CPU_RUNNING_P (current_cpu)*/);
-}
-
-#undef FAST_P
-
-EOF
-
-####################################
-
-# Non-parallel scache engine: fast version.
-
-if [ x$fast = xyes ] ; then
-
- cat << EOF
-
-#define FAST_P 1
-
-void
-@prefix@_engine_run_fast (SIM_CPU *current_cpu)
-{
- SIM_DESC current_state = CPU_STATE (current_cpu);
- SCACHE *scache = CPU_SCACHE_CACHE (current_cpu);
- unsigned int hash_mask = CPU_SCACHE_HASH_MASK (current_cpu);
- SEM_PC vpc;
-
-EOF
-
-# Any initialization code before looping starts.
-# Note that this code may declare some locals.
-${SHELL} $infile init
-
-cat << EOF
-
- if (! CPU_IDESC_SEM_INIT_P (current_cpu))
- {
-#if WITH_SEM_SWITCH_FAST
-#if defined (__GNUC__)
-/* ??? Later maybe paste sem-switch.c in when building mainloop.c. */
-#define DEFINE_LABELS
-#include "$switch"
-#endif
-#else
- @prefix@_semf_init_idesc_table (current_cpu);
-#endif
- CPU_IDESC_SEM_INIT_P (current_cpu) = 1;
- }
-
- vpc = GET_H_PC ();
-
- do
- {
- SCACHE *sc;
-
- sc = @prefix@_scache_lookup (current_cpu, vpc, scache, hash_mask, FAST_P);
-
-/* begin fast-exec-scache */
-EOF
-
-${SHELL} $infile fast-exec-scache
-
-cat << EOF
-/* end fast-exec-scache */
-
- SET_H_PC (vpc);
-
- ++ CPU_INSN_COUNT (current_cpu);
- }
- while (0 /*CPU_RUNNING_P (current_cpu)*/);
-}
-
-#undef FAST_P
-
-EOF
-
-fi # -fast
-
-fi # -scache && ! parallel
-
-##########################################################################
-
-# Parallel scache engine: lookup insn in scache, fetch if missing,
-# then execute it.
-# For the parallel case we give the target more flexibility.
-
-if [ x$scache = xyes -a x$parallel != xno ] ; then
-
- cat << EOF
-
-static INLINE SCACHE *
-@prefix@_scache_lookup (SIM_CPU *current_cpu, PCADDR vpc, SCACHE *scache,
- unsigned int hash_mask, int FAST_P)
-{
- /* First step: look up current insn in hash table. */
- SCACHE *sc = scache + SCACHE_HASH_PC (vpc, hash_mask);
-
- /* If the entry isn't the one we want (cache miss),
- fetch and decode the instruction. */
- if (sc->argbuf.addr != vpc)
- {
- if (! FAST_P)
- PROFILE_COUNT_SCACHE_MISS (current_cpu);
-
-#define SET_LAST_INSN_P(last_p) do { sc->last_insn_p = (last_p); } while (0)
-/* begin extract-scache */
-EOF
-
-${SHELL} $infile extract-scache
-
-cat << EOF
-/* end extract-scache */
-#undef SET_LAST_INSN_P
- }
- else if (! FAST_P)
- {
- PROFILE_COUNT_SCACHE_HIT (current_cpu);
- /* Make core access statistics come out right.
- The size is a guess, but it's currently not used either. */
- PROFILE_COUNT_CORE (current_cpu, vpc, 2, exec_map);
- }
-
- return sc;
-}
-
-#define FAST_P 0
-
-void
-@prefix@_engine_run_full (SIM_CPU *current_cpu)
-{
- SIM_DESC current_state = CPU_STATE (current_cpu);
- SCACHE *scache = CPU_SCACHE_CACHE (current_cpu);
- unsigned int hash_mask = CPU_SCACHE_HASH_MASK (current_cpu);
- SEM_PC vpc;
-
-EOF
-
-# Any initialization code before looping starts.
-# Note that this code may declare some locals.
-${SHELL} $infile init
-
-if [ x$parallel = xread ] ; then
-cat << EOF
-#if defined (__GNUC__)
- {
- if (! CPU_IDESC_READ_INIT_P (current_cpu))
- {
-/* ??? Later maybe paste read.c in when building mainloop.c. */
-#define DEFINE_LABELS
-#include "readx.c"
- CPU_IDESC_READ_INIT_P (current_cpu) = 1;
- }
- }
-#endif
-
-EOF
-fi
-
-cat << EOF
-
- if (! CPU_IDESC_SEM_INIT_P (current_cpu))
- {
-#if ! WITH_SEM_SWITCH_FULL
- @prefix@_sem_init_idesc_table (current_cpu);
-#endif
- CPU_IDESC_SEM_INIT_P (current_cpu) = 1;
- }
-
- vpc = GET_H_PC ();
-
- do
- {
-/* begin full-exec-scache */
-EOF
-
-${SHELL} $infile full-exec-scache
-
-cat << EOF
-/* end full-exec-scache */
- }
- while (0 /*CPU_RUNNING_P (current_cpu)*/);
-}
-
-#undef FAST_P
-
-EOF
-
-####################################
-
-# Parallel scache engine: fast version.
-
-if [ x$fast = xyes ] ; then
-
- cat << EOF
-
-#define FAST_P 1
-
-void
-@prefix@_engine_run_fast (SIM_CPU *current_cpu)
-{
- SIM_DESC current_state = CPU_STATE (current_cpu);
- SCACHE *scache = CPU_SCACHE_CACHE (current_cpu);
- unsigned int hash_mask = CPU_SCACHE_HASH_MASK (current_cpu);
- SEM_PC vpc;
- PAREXEC pbufs[MAX_PARALLEL_INSNS];
- PAREXEC *par_exec;
-
-EOF
-
-# Any initialization code before looping starts.
-# Note that this code may declare some locals.
-${SHELL} $infile init
-
-if [ x$parallel = xread ] ; then
-cat << EOF
-
-#if defined (__GNUC__)
- {
- if (! CPU_IDESC_READ_INIT_P (current_cpu))
- {
-/* ??? Later maybe paste read.c in when building mainloop.c. */
-#define DEFINE_LABELS
-#include "readx.c"
- CPU_IDESC_READ_INIT_P (current_cpu) = 1;
- }
- }
-#endif
-
-EOF
-fi
-
-cat << EOF
-
- if (! CPU_IDESC_SEM_INIT_P (current_cpu))
- {
-#if WITH_SEM_SWITCH_FAST
-#if defined (__GNUC__)
-/* ??? Later maybe paste sem-switch.c in when building mainloop.c. */
-#define DEFINE_LABELS
-#include "$switch"
-#endif
-#else
- @prefix@_semf_init_idesc_table (current_cpu);
-#endif
- CPU_IDESC_SEM_INIT_P (current_cpu) = 1;
- }
-
- vpc = GET_H_PC ();
-
- do
- {
-/* begin fast-exec-scache */
-EOF
-
-${SHELL} $infile fast-exec-scache
-
-cat << EOF
-/* end fast-exec-scache */
- }
- while (0 /*CPU_RUNNING_P (current_cpu)*/);
-}
-
-#undef FAST_P
-
-EOF
-
-fi # -fast
-
-fi # -scache && parallel
-
-##########################################################################
-
-# Compilation engine: lookup insn in scache, extract a pbb
-# (pseudo-basic-block) if missing, then execute the pbb.
-# A "pbb" is a sequence of insns up to the next cti insn or until
-# some prespecified maximum.
-# CTI: control transfer instruction.
-
-if [ x$pbb = xyes ] ; then
-
- cat << EOF
-
-/* Record address of cti terminating a pbb. */
-#define SET_CTI_VPC(sc) do { _cti_sc = (sc); } while (0)
-/* Record number of [real] insns in pbb. */
-#define SET_INSN_COUNT(n) do { _insn_count = (n); } while (0)
-
-/* Fetch and extract a pseudo-basic-block.
- FAST_P is non-zero if no tracing/profiling/etc. is wanted. */
-
-INLINE SEM_PC
-@prefix@_pbb_begin (SIM_CPU *current_cpu, int FAST_P)
-{
- SEM_PC new_vpc;
- PCADDR pc;
- SCACHE *sc;
- int max_insns = CPU_SCACHE_MAX_CHAIN_LENGTH (current_cpu);
-
- pc = GET_H_PC ();
-
- new_vpc = scache_lookup_or_alloc (current_cpu, pc, max_insns, &sc);
- if (! new_vpc)
- {
- /* Leading '_' to avoid collision with mainloop.in. */
- int _insn_count = 0;
- SCACHE *orig_sc = sc;
- SCACHE *_cti_sc = NULL;
- int slice_insns = CPU_MAX_SLICE_INSNS (current_cpu);
-
- /* First figure out how many instructions to compile.
- MAX_INSNS is the size of the allocated buffer, which includes space
- for before/after handlers if they're being used.
- SLICE_INSNS is the maxinum number of real insns that can be
- executed. Zero means "as many as we want". */
- /* ??? max_insns is serving two incompatible roles.
- 1) Number of slots available in scache buffer.
- 2) Number of real insns to execute.
- They're incompatible because there are virtual insns emitted too
- (chain,cti-chain,before,after handlers). */
-
- if (slice_insns == 1)
- {
- /* No need to worry about extra slots required for virtual insns
- and parallel exec support because MAX_CHAIN_LENGTH is
- guaranteed to be big enough to execute at least 1 insn! */
- max_insns = 1;
- }
- else
- {
- /* Allow enough slop so that while compiling insns, if max_insns > 0
- then there's guaranteed to be enough space to emit one real insn.
- MAX_CHAIN_LENGTH is typically much longer than
- the normal number of insns between cti's anyway. */
- max_insns -= (1 /* one for the trailing chain insn */
- + (FAST_P
- ? 0
- : (1 + MAX_PARALLEL_INSNS) /* before+after */)
- + (MAX_PARALLEL_INSNS > 1
- ? (MAX_PARALLEL_INSNS * 2)
- : 0));
-
- /* Account for before/after handlers. */
- if (! FAST_P)
- slice_insns *= 3;
-
- if (slice_insns > 0
- && slice_insns < max_insns)
- max_insns = slice_insns;
- }
-
- new_vpc = sc;
-
- /* SC,PC must be updated to point passed the last entry used.
- SET_CTI_VPC must be called if pbb is terminated by a cti.
- SET_INSN_COUNT must be called to record number of real insns in
- pbb [could be computed by us of course, extra cpu but perhaps
- negligible enough]. */
-
-/* begin extract-pbb */
-EOF
-
-${SHELL} $infile extract-pbb
-
-cat << EOF
-/* end extract-pbb */
-
- /* The last one is a pseudo-insn to link to the next chain.
- It is also used to record the insn count for this chain. */
- {
- const IDESC *id;
-
- /* Was pbb terminated by a cti? */
- if (_cti_sc)
- {
- id = & CPU_IDESC (current_cpu) [@PREFIX@_INSN_X_CTI_CHAIN];
- }
- else
- {
- id = & CPU_IDESC (current_cpu) [@PREFIX@_INSN_X_CHAIN];
- }
- SEM_SET_CODE (&sc->argbuf, id, FAST_P);
- sc->argbuf.idesc = id;
- sc->argbuf.addr = pc;
- sc->argbuf.fields.chain.insn_count = _insn_count;
- sc->argbuf.fields.chain.next = 0;
- sc->argbuf.fields.chain.branch_target = 0;
- ++sc;
- }
-
- /* Update the pointer to the next free entry, may not have used as
- many entries as was asked for. */
- CPU_SCACHE_NEXT_FREE (current_cpu) = sc;
- /* Record length of chain if profiling.
- This includes virtual insns since they count against
- max_insns too. */
- if (! FAST_P)
- PROFILE_COUNT_SCACHE_CHAIN_LENGTH (current_cpu, sc - orig_sc);
- }
-
- return new_vpc;
-}
-
-/* Chain to the next block from a non-cti terminated previous block. */
-
-INLINE SEM_PC
-@prefix@_pbb_chain (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-
- PBB_UPDATE_INSN_COUNT (current_cpu, sem_arg);
-
- SET_H_PC (abuf->addr);
-
- /* If not running forever, exit back to main loop. */
- if (CPU_MAX_SLICE_INSNS (current_cpu) != 0
- /* Also exit back to main loop if there's an event.
- Note that if CPU_MAX_SLICE_INSNS != 1, events won't get processed
- at the "right" time, but then that was what was asked for.
- There is no silver bullet for simulator engines.
- ??? Clearly this needs a cleaner interface.
- At present it's just so Ctrl-C works. */
- || STATE_EVENTS (CPU_STATE (current_cpu))->work_pending)
- CPU_RUNNING_P (current_cpu) = 0;
-
- /* If chained to next block, go straight to it. */
- if (abuf->fields.chain.next)
- return abuf->fields.chain.next;
- /* See if next block has already been compiled. */
- abuf->fields.chain.next = scache_lookup (current_cpu, abuf->addr);
- if (abuf->fields.chain.next)
- return abuf->fields.chain.next;
- /* Nope, so next insn is a virtual insn to invoke the compiler
- (begin a pbb). */
- return CPU_SCACHE_PBB_BEGIN (current_cpu);
-}
-
-/* Chain to the next block from a cti terminated previous block.
- BR_TYPE indicates whether the branch was taken and whether we can cache
- the vpc of the branch target.
- NEW_PC is the target's branch address, and is only valid if
- BR_TYPE != SEM_BRANCH_UNTAKEN. */
-
-INLINE SEM_PC
-@prefix@_pbb_cti_chain (SIM_CPU *current_cpu, SEM_ARG sem_arg,
- SEM_BRANCH_TYPE br_type, PCADDR new_pc)
-{
- SEM_PC *new_vpc_ptr;
-
- PBB_UPDATE_INSN_COUNT (current_cpu, sem_arg);
-
- /* If not running forever, exit back to main loop. */
- if (CPU_MAX_SLICE_INSNS (current_cpu) != 0
- /* Also exit back to main loop if there's an event.
- Note that if CPU_MAX_SLICE_INSNS != 1, events won't get processed
- at the "right" time, but then that was what was asked for.
- There is no silver bullet for simulator engines.
- ??? Clearly this needs a cleaner interface.
- At present it's just so Ctrl-C works. */
- || STATE_EVENTS (CPU_STATE (current_cpu))->work_pending)
- CPU_RUNNING_P (current_cpu) = 0;
-
- /* Restart compiler if we branched to an uncacheable address
- (e.g. "j reg"). */
- if (br_type == SEM_BRANCH_UNCACHEABLE)
- {
- SET_H_PC (new_pc);
- return CPU_SCACHE_PBB_BEGIN (current_cpu);
- }
-
- /* If branch wasn't taken, update the pc and set BR_ADDR_PTR to our
- next chain ptr. */
- if (br_type == SEM_BRANCH_UNTAKEN)
- {
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- new_pc = abuf->addr;
- SET_H_PC (new_pc);
- new_vpc_ptr = &abuf->fields.chain.next;
- }
- else
- {
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- SET_H_PC (new_pc);
- new_vpc_ptr = &abuf->fields.chain.branch_target;
- }
-
- /* If chained to next block, go straight to it. */
- if (*new_vpc_ptr)
- return *new_vpc_ptr;
- /* See if next block has already been compiled. */
- *new_vpc_ptr = scache_lookup (current_cpu, new_pc);
- if (*new_vpc_ptr)
- return *new_vpc_ptr;
- /* Nope, so next insn is a virtual insn to invoke the compiler
- (begin a pbb). */
- return CPU_SCACHE_PBB_BEGIN (current_cpu);
-}
-
-/* x-before handler.
- This is called before each insn. */
-
-void
-@prefix@_pbb_before (SIM_CPU *current_cpu, SCACHE *sc)
-{
- SEM_ARG sem_arg = sc;
- const ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int first_p = abuf->fields.before.first_p;
- const ARGBUF *cur_abuf = SEM_ARGBUF (sc + 1);
- const IDESC *cur_idesc = cur_abuf->idesc;
- PCADDR pc = cur_abuf->addr;
-
- if (ARGBUF_PROFILE_P (cur_abuf))
- PROFILE_COUNT_INSN (current_cpu, pc, cur_idesc->num);
-
- /* If this isn't the first insn, finish up the previous one. */
-
- if (! first_p)
- {
- if (PROFILE_MODEL_P (current_cpu))
- {
- const SEM_ARG prev_sem_arg = sc - 1;
- const ARGBUF *prev_abuf = SEM_ARGBUF (prev_sem_arg);
- const IDESC *prev_idesc = prev_abuf->idesc;
- int cycles;
-
- /* ??? May want to measure all insns if doing insn tracing. */
- if (ARGBUF_PROFILE_P (prev_abuf))
- {
- cycles = (*prev_idesc->timing->model_fn) (current_cpu, prev_sem_arg);
- @prefix@_model_insn_after (current_cpu, 0 /*last_p*/, cycles);
- }
- }
-
- TRACE_INSN_FINI (current_cpu, cur_abuf, 0 /*last_p*/);
- }
-
- /* FIXME: Later make cover macros: PROFILE_INSN_{INIT,FINI}. */
- if (PROFILE_MODEL_P (current_cpu)
- && ARGBUF_PROFILE_P (cur_abuf))
- @prefix@_model_insn_before (current_cpu, first_p);
-
- TRACE_INSN_INIT (current_cpu, cur_abuf, first_p);
- TRACE_INSN (current_cpu, cur_idesc->idata, cur_abuf, pc);
-}
-
-/* x-after handler.
- This is called after a serial insn or at the end of a group of parallel
- insns. */
-
-void
-@prefix@_pbb_after (SIM_CPU *current_cpu, SCACHE *sc)
-{
- SEM_ARG sem_arg = sc;
- const ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- const SEM_ARG prev_sem_arg = sc - 1;
- const ARGBUF *prev_abuf = SEM_ARGBUF (prev_sem_arg);
-
- /* ??? May want to measure all insns if doing insn tracing. */
- if (PROFILE_MODEL_P (current_cpu)
- && ARGBUF_PROFILE_P (prev_abuf))
- {
- const IDESC *prev_idesc = prev_abuf->idesc;
- int cycles;
-
- cycles = (*prev_idesc->timing->model_fn) (current_cpu, prev_sem_arg);
- @prefix@_model_insn_after (current_cpu, 1 /*last_p*/, cycles);
- }
- TRACE_INSN_FINI (current_cpu, prev_abuf, 1 /*last_p*/);
-}
-
-#define FAST_P 0
-
-void
-@prefix@_engine_run_full (SIM_CPU *current_cpu)
-{
- SIM_DESC current_state = CPU_STATE (current_cpu);
- SCACHE *scache = CPU_SCACHE_CACHE (current_cpu);
- /* virtual program counter */
- SEM_PC vpc;
-#if WITH_SEM_SWITCH_FULL
- /* For communication between cti's and cti-chain. */
- SEM_BRANCH_TYPE pbb_br_type;
- PCADDR pbb_br_npc;
-#endif
-
-EOF
-
-case x$parallel in
-xread | xwrite)
- cat << EOF
- PAREXEC pbufs[MAX_PARALLEL_INSNS];
- PAREXEC *par_exec = &pbufs[0];
-
-EOF
- ;;
-esac
-
-# Any initialization code before looping starts.
-# Note that this code may declare some locals.
-${SHELL} $infile init
-
-cat << EOF
-
- if (! CPU_IDESC_SEM_INIT_P (current_cpu))
- {
- /* ??? 'twould be nice to move this up a level and only call it once.
- On the other hand, in the "let's go fast" case the test is only done
- once per pbb (since we only return to the main loop at the end of
- a pbb). And in the "let's run until we're done" case we don't return
- until the program exits. */
-
-#if WITH_SEM_SWITCH_FULL
-#if defined (__GNUC__)
-/* ??? Later maybe paste sem-switch.c in when building mainloop.c. */
-#define DEFINE_LABELS
-#include "$switch"
-#endif
-#else
- @prefix@_sem_init_idesc_table (current_cpu);
-#endif
-
- /* Initialize the "begin (compile) a pbb" virtual insn. */
- vpc = CPU_SCACHE_PBB_BEGIN (current_cpu);
- SEM_SET_FULL_CODE (SEM_ARGBUF (vpc),
- & CPU_IDESC (current_cpu) [@PREFIX@_INSN_X_BEGIN]);
- vpc->argbuf.idesc = & CPU_IDESC (current_cpu) [@PREFIX@_INSN_X_BEGIN];
-
- CPU_IDESC_SEM_INIT_P (current_cpu) = 1;
- }
-
- CPU_RUNNING_P (current_cpu) = 1;
- /* ??? In the case where we're returning to the main loop after every
- pbb we don't want to call pbb_begin each time (which hashes on the pc
- and does a table lookup). A way to speed this up is to save vpc
- between calls. */
- vpc = @prefix@_pbb_begin (current_cpu, FAST_P);
-
- do
- {
-/* begin full-exec-pbb */
-EOF
-
-${SHELL} $infile full-exec-pbb
-
-cat << EOF
-/* end full-exec-pbb */
- }
- while (CPU_RUNNING_P (current_cpu));
-}
-
-#undef FAST_P
-
-EOF
-
-####################################
-
-# Compile engine: fast version.
-
-if [ x$fast = xyes ] ; then
-
- cat << EOF
-
-#define FAST_P 1
-
-void
-@prefix@_engine_run_fast (SIM_CPU *current_cpu)
-{
- SIM_DESC current_state = CPU_STATE (current_cpu);
- SCACHE *scache = CPU_SCACHE_CACHE (current_cpu);
- /* virtual program counter */
- SEM_PC vpc;
-#if WITH_SEM_SWITCH_FAST
- /* For communication between cti's and cti-chain. */
- SEM_BRANCH_TYPE pbb_br_type;
- PCADDR pbb_br_npc;
-#endif
-
-EOF
-
-case x$parallel in
-xread | xwrite)
- cat << EOF
- PAREXEC pbufs[MAX_PARALLEL_INSNS];
- PAREXEC *par_exec = &pbufs[0];
-
-EOF
- ;;
-esac
-
-# Any initialization code before looping starts.
-# Note that this code may declare some locals.
-${SHELL} $infile init
-
-cat << EOF
-
- if (! CPU_IDESC_SEM_INIT_P (current_cpu))
- {
- /* ??? 'twould be nice to move this up a level and only call it once.
- On the other hand, in the "let's go fast" case the test is only done
- once per pbb (since we only return to the main loop at the end of
- a pbb). And in the "let's run until we're done" case we don't return
- until the program exits. */
-
-#if WITH_SEM_SWITCH_FAST
-#if defined (__GNUC__)
-/* ??? Later maybe paste sem-switch.c in when building mainloop.c. */
-#define DEFINE_LABELS
-#include "$switch"
-#endif
-#else
- @prefix@_semf_init_idesc_table (current_cpu);
-#endif
-
- /* Initialize the "begin (compile) a pbb" virtual insn. */
- vpc = CPU_SCACHE_PBB_BEGIN (current_cpu);
- SEM_SET_FAST_CODE (SEM_ARGBUF (vpc),
- & CPU_IDESC (current_cpu) [@PREFIX@_INSN_X_BEGIN]);
- vpc->argbuf.idesc = & CPU_IDESC (current_cpu) [@PREFIX@_INSN_X_BEGIN];
-
- CPU_IDESC_SEM_INIT_P (current_cpu) = 1;
- }
-
- CPU_RUNNING_P (current_cpu) = 1;
- /* ??? In the case where we're returning to the main loop after every
- pbb we don't want to call pbb_begin each time (which hashes on the pc
- and does a table lookup). A way to speed this up is to save vpc
- between calls. */
- vpc = @prefix@_pbb_begin (current_cpu, FAST_P);
-
- do
- {
-/* begin fast-exec-pbb */
-EOF
-
-${SHELL} $infile fast-exec-pbb
-
-cat << EOF
-/* end fast-exec-pbb */
- }
- while (CPU_RUNNING_P (current_cpu));
-}
-
-#undef FAST_P
-
-EOF
-fi # -fast
-
-fi # -pbb
-
-# Expand @..@ macros appearing in tmp-mloop-{pid}.cin.
-sed \
- -e "s/@cpu@/$cpu/g" -e "s/@CPU@/$CPU/g" \
- -e "s/@prefix@/$prefix/g" -e "s/@PREFIX@/$PREFIX/g" < tmp-mloop-$$.cin > mloop${outsuffix}.cin
-rc=$?
-rm -f tmp-mloop-$$.cin
-
-exit $rc
diff --git a/sim/common/gennltvals.sh b/sim/common/gennltvals.sh
deleted file mode 100644
index 40ca5c7b476..00000000000
--- a/sim/common/gennltvals.sh
+++ /dev/null
@@ -1,66 +0,0 @@
-#! /bin/sh
-# Generate nltvals.def, a file that describes various newlib/libgloss
-# target values used by the host/target interface.
-#
-# Syntax: /bin/sh gennltvals.sh shell srcroot cpp
-
-shell=$1
-srcroot=$2
-cpp=$3
-
-srccom=$srcroot/sim/common
-
-echo '/* Newlib/libgloss macro values needed by remote target support. */'
-echo '/* This file is machine generated by gennltvals.sh. */'
-
-$shell ${srccom}/gentvals.sh "" errno ${srcroot}/newlib/libc/include \
- "errno.h sys/errno.h" 'E[A-Z0-9]*' "${cpp}"
-
-$shell ${srccom}/gentvals.sh "" signal ${srcroot}/newlib/libc/include \
- "signal.h sys/signal.h" 'SIG[A-Z0-9]*' "${cpp}"
-
-$shell ${srccom}/gentvals.sh "" open ${srcroot}/newlib/libc/include \
- "fcntl.h sys/fcntl.h" 'O_[A-Z0-9]*' "${cpp}"
-
-# Unfortunately, each newlib/libgloss port has seen fit to define their own
-# syscall.h file. This means that system call numbers can vary for each port.
-# Support for all this crud is kept here, rather than trying to get too fancy.
-# If you want to try to improve this, please do, but don't break anything.
-# Note that there is a standard syscall.h file (libgloss/syscall.h) now which
-# hopefully more targets can use.
-
-dir=newlib/libc/sys/d10v/sys target=d10v
-$shell ${srccom}/gentvals.sh $target sys ${srcroot}/$dir \
- "syscall.h" 'SYS_[_A-Za-z0-9]*' "${cpp}"
-
-dir=libgloss target=d30v
-$shell ${srccom}/gentvals.sh $target sys ${srcroot}/$dir \
- "syscall.h" 'SYS_[_A-Za-z0-9]*' "${cpp}"
-
-dir=libgloss target=fr30
-$shell ${srccom}/gentvals.sh $target sys ${srcroot}/$dir \
- "syscall.h" 'SYS_[_A-Za-z0-9]*' "${cpp}"
-
-dir=libgloss/i960 target=i960
-$shell ${srccom}/gentvals.sh $target sys ${srcroot}/$dir \
- "syscall.h" 'SYS_[_A-Za-z0-9]*' "${cpp}"
-
-dir=libgloss target=m32r
-$shell ${srccom}/gentvals.sh $target sys ${srcroot}/$dir \
- "syscall.h" 'SYS_[_A-Za-z0-9]*' "${cpp}"
-
-dir=libgloss target=mn10200
-$shell ${srccom}/gentvals.sh $target sys ${srcroot}/$dir \
- "syscall.h" 'SYS_[_A-Za-z0-9]*' "${cpp}"
-
-dir=libgloss target=mn10300
-$shell ${srccom}/gentvals.sh $target sys ${srcroot}/$dir \
- "syscall.h" 'SYS_[_A-Za-z0-9]*' "${cpp}"
-
-dir=libgloss target=sparc
-$shell ${srccom}/gentvals.sh $target sys ${srcroot}/$dir \
- "syscall.h" 'SYS_[_A-Za-z0-9]*' "${cpp}"
-
-dir=libgloss/v850/sys target=v850
-$shell ${srccom}/gentvals.sh $target sys ${srcroot}/$dir \
- "syscall.h" 'SYS_[_A-Za-z0-9]*' "${cpp}"
diff --git a/sim/common/gentmap.c b/sim/common/gentmap.c
deleted file mode 100644
index e4f5d0dc8b4..00000000000
--- a/sim/common/gentmap.c
+++ /dev/null
@@ -1,125 +0,0 @@
-/* Generate targ-vals.h and targ-map.c. */
-
-#include <stdio.h>
-
-struct tdefs {
- char *symbol;
- int value;
-};
-
-static struct tdefs sys_tdefs[] = {
-#define sys_defs
-#include "targ-vals.def"
-#undef sys_defs
- { 0, 0 }
-};
-
-static struct tdefs errno_tdefs[] = {
-#define errno_defs
-#include "targ-vals.def"
-#undef errno_defs
- { 0, 0 }
-};
-
-static struct tdefs open_tdefs[] = {
-#define open_defs
-#include "targ-vals.def"
-#undef open_defs
- { 0, 0 }
-};
-
-static void
-gen_targ_vals_h ()
-{
- struct tdefs *t;
-
- printf ("/* Target header values needed by the simulator and gdb. */\n");
- printf ("/* This file is machine generated by gentmap.c. */\n\n");
-
- printf ("#ifndef TARG_VALS_H\n");
- printf ("#define TARG_VALS_H\n\n");
-
- printf ("/* syscall values */\n");
- for (t = &sys_tdefs[0]; t->symbol; ++t)
- printf ("#define TARGET_%s %d\n", t->symbol, t->value);
- printf ("\n");
-
- printf ("/* errno values */\n");
- for (t = &errno_tdefs[0]; t->symbol; ++t)
- printf ("#define TARGET_%s %d\n", t->symbol, t->value);
- printf ("\n");
-
- printf ("/* open flag values */\n");
- for (t = &open_tdefs[0]; t->symbol; ++t)
- printf ("#define TARGET_%s 0x%x\n", t->symbol, t->value);
- printf ("\n");
-
- printf ("#endif /* TARG_VALS_H */\n");
-}
-
-static void
-gen_targ_map_c ()
-{
- struct tdefs *t;
-
- printf ("/* Target value mapping utilities needed by the simulator and gdb. */\n");
- printf ("/* This file is machine generated by gentmap.c. */\n\n");
-
- printf ("#include <errno.h>\n");
- printf ("#include <fcntl.h>\n");
- printf ("#include \"ansidecl.h\"\n");
- printf ("#include \"callback.h\"\n");
- printf ("#include \"targ-vals.h\"\n");
- printf ("\n");
-
- printf ("/* syscall mapping table */\n");
- printf ("CB_TARGET_DEFS_MAP cb_init_syscall_map[] = {\n");
- for (t = &sys_tdefs[0]; t->symbol; ++t)
- {
- printf ("#ifdef CB_%s\n", t->symbol);
- printf (" { CB_%s, TARGET_%s },\n", t->symbol, t->symbol);
- printf ("#endif\n");
- }
- printf (" { -1, -1 }\n");
- printf ("};\n\n");
-
- printf ("/* errno mapping table */\n");
- printf ("CB_TARGET_DEFS_MAP cb_init_errno_map[] = {\n");
- for (t = &errno_tdefs[0]; t->symbol; ++t)
- {
- printf ("#ifdef %s\n", t->symbol);
- printf (" { %s, TARGET_%s },\n", t->symbol, t->symbol);
- printf ("#endif\n");
- }
- printf (" { 0, 0 }\n");
- printf ("};\n\n");
-
- printf ("/* open flags mapping table */\n");
- printf ("CB_TARGET_DEFS_MAP cb_init_open_map[] = {\n");
- for (t = &open_tdefs[0]; t->symbol; ++t)
- {
- printf ("#ifdef %s\n", t->symbol);
- printf (" { %s, TARGET_%s },\n", t->symbol, t->symbol);
- printf ("#endif\n");
- }
- printf (" { -1, -1 }\n");
- printf ("};\n\n");
-}
-
-int
-main (argc, argv)
- int argc;
- char *argv[];
-{
- if (argc != 2)
- abort ();
-
- if (strcmp (argv[1], "-h") == 0)
- gen_targ_vals_h ();
- else if (strcmp (argv[1], "-c") == 0)
- gen_targ_map_c ();
- else
- abort ();
-
- exit (0);
-}
diff --git a/sim/common/gentvals.sh b/sim/common/gentvals.sh
deleted file mode 100644
index 6dd7315f30a..00000000000
--- a/sim/common/gentvals.sh
+++ /dev/null
@@ -1,74 +0,0 @@
-#!/bin/sh
-# Usage: gentvals.sh target type dir files pattern cpp
-
-target=$1
-type=$2
-dir=$3
-# FIXME: Would be nice to process #include's in these files.
-files=$4
-pattern=$5
-cpp=$6
-
-# FIXME: need trap to remove tmp files.
-
-rm -f tmpvals.list tmpvals.uniq
-for f in $files
-do
- if test -f $dir/$f ; then
- grep "#define[ ]$pattern" $dir/$f | sed -e "s/^.*#define[ ]\($pattern\)[ ]*\([^ ][^ ]*\).*$/\1/" >> tmpvals.list
- fi
-done
-
-sort <tmpvals.list | uniq >tmpvals.uniq
-
-rm -f tmpvals.h
-for f in $files
-do
- if test -f $dir/$f ; then
- echo "#include <$f>" >>tmpvals.h
- fi
-done
-
-cat tmpvals.uniq |
-while read sym
-do
- echo "#ifdef $sym" >>tmpvals.h
- echo 'DEFVAL { "'$sym'", '$sym ' },' >>tmpvals.h
- echo "#endif" >>tmpvals.h
-done
-
-if test -z "$target"
-then
- echo "#ifdef ${type}_defs"
-else
- echo "#ifdef NL_TARGET_$target"
- echo "#ifdef ${type}_defs"
-fi
-
-for f in $files
-do
- if test -f $dir/$f ; then
- echo "/* from $f */"
- fi
-done
-
-if test -z "$target"
-then
- echo "/* begin $type target macros */"
-else
- echo "/* begin $target $type target macros */"
-fi
-
-$cpp -I$dir tmpvals.h | grep DEFVAL | sed -e 's/DEFVAL//' -e 's/ / /'
-
-if test -z "$target"
-then
- echo "/* end $type target macros */"
- echo "#endif"
-else
- echo "/* end $target $type target macros */"
- echo "#endif"
- echo "#endif"
-fi
-
-rm -f tmpvals.list tmpvals.uniq tmpvals.h
diff --git a/sim/common/hw-alloc.c b/sim/common/hw-alloc.c
deleted file mode 100644
index 5664e9b5e32..00000000000
--- a/sim/common/hw-alloc.c
+++ /dev/null
@@ -1,97 +0,0 @@
-/* Hardware memory allocator.
- Copyright (C) 1998 Free Software Foundation, Inc.
- Contributed by Cygnus Support.
-
-This file is part of GDB, the GNU debugger.
-
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License along
-with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
-
-
-#include "hw-main.h"
-#include "hw-base.h"
-
-
-#ifdef HAVE_STDLIB_H
-#include <stdlib.h>
-#endif
-
-struct hw_alloc_data {
- void *alloc;
- int zalloc_p;
- struct hw_alloc_data *next;
-};
-
-void
-create_hw_alloc_data (struct hw *me)
-{
- /* NULL */
-}
-
-void
-delete_hw_alloc_data (struct hw *me)
-{
- while (me->alloc_of_hw != NULL)
- {
- hw_free (me, me->alloc_of_hw->alloc);
- }
-}
-
-
-
-void *
-hw_zalloc (struct hw *me, unsigned long size)
-{
- struct hw_alloc_data *memory = ZALLOC (struct hw_alloc_data);
- memory->alloc = zalloc (size);
- memory->zalloc_p = 1;
- memory->next = me->alloc_of_hw;
- me->alloc_of_hw = memory;
- return memory->alloc;
-}
-
-void *
-hw_malloc (struct hw *me, unsigned long size)
-{
- struct hw_alloc_data *memory = ZALLOC (struct hw_alloc_data);
- memory->alloc = zalloc (size);
- memory->zalloc_p = 0;
- memory->next = me->alloc_of_hw;
- me->alloc_of_hw = memory;
- return memory->alloc;
-}
-
-void
-hw_free (struct hw *me,
- void *alloc)
-{
- struct hw_alloc_data **memory;
- for (memory = &me->alloc_of_hw;
- *memory != NULL;
- memory = &(*memory)->next)
- {
- if ((*memory)->alloc == alloc)
- {
- struct hw_alloc_data *die = (*memory);
- (*memory) = die->next;
- if (die->zalloc_p)
- zfree (die->alloc);
- else
- free (die->alloc);
- zfree (die);
- return;
- }
- }
- hw_abort (me, "free of memory not belonging to a device");
-}
diff --git a/sim/common/hw-alloc.h b/sim/common/hw-alloc.h
deleted file mode 100644
index 48b03f22ddb..00000000000
--- a/sim/common/hw-alloc.h
+++ /dev/null
@@ -1,49 +0,0 @@
-/* Hardware memory allocator.
- Copyright (C) 1998 Free Software Foundation, Inc.
- Contributed by Cygnus Support.
-
-This file is part of GDB, the GNU debugger.
-
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License along
-with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
-
-
-#ifndef HW_ALLOC_H
-#define HW_ALLOC_H
-
-/* Mechanism for associating memory allocated by a device to that
- device.
-
- When a device is deleted any remaining memory regions associated to
- it are reclaimed.
-
- FIXME: Perhaphs this can be generalized. Perhaphs it should not
- be. */
-
-
-#define HW_ZALLOC(me,type) (type*) hw_zalloc (me, sizeof (type))
-#define HW_MALLOC(me,type) (type*) hw_malloc (me, sizeof (type))
-#define HW_NZALLOC(ME,TYPE,N) (TYPE*) hw_zalloc (me, sizeof (TYPE) * (N))
-
-extern void *hw_zalloc (struct hw *me, unsigned long size);
-extern void *hw_malloc (struct hw *me, unsigned long size);
-
-extern void hw_free (struct hw *me, void *);
-
-
-/* Duplicate a string allocating memory using the per-device heap */
-
-extern char *hw_strdup (struct hw *me, const char *str);
-
-#endif
diff --git a/sim/common/hw-base.c b/sim/common/hw-base.c
deleted file mode 100644
index 9c05da81159..00000000000
--- a/sim/common/hw-base.c
+++ /dev/null
@@ -1,576 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1996, 1998, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-#include "hw-main.h"
-#include "hw-base.h"
-
-
-#ifdef HAVE_STRING_H
-#include <string.h>
-#else
-#ifdef HAVE_STRINGS_H
-#include <strings.h>
-#endif
-#endif
-
-#if HAVE_STDLIB_H
-#include <stdlib.h>
-#endif
-
-#include <ctype.h>
-
-#include "hw-config.h"
-
-struct hw_base_data {
- int finished_p;
- const struct hw_descriptor *descriptor;
- hw_delete_callback *to_delete;
-};
-
-static int
-generic_hw_unit_decode (struct hw *bus,
- const char *unit,
- hw_unit *phys)
-{
- memset (phys, 0, sizeof (*phys));
- if (unit == NULL)
- return 0;
- else
- {
- int nr_cells = 0;
- const int max_nr_cells = hw_unit_nr_address_cells (bus);
- while (1)
- {
- char *end = NULL;
- unsigned long val;
- val = strtoul (unit, &end, 0);
- /* parse error? */
- if (unit == end)
- return -1;
- /* two many cells? */
- if (nr_cells >= max_nr_cells)
- return -1;
- /* save it */
- phys->cells[nr_cells] = val;
- nr_cells++;
- unit = end;
- /* more to follow? */
- if (isspace (*unit) || *unit == '\0')
- break;
- if (*unit != ',')
- return -1;
- unit++;
- }
- if (nr_cells < max_nr_cells) {
- /* shift everything to correct position */
- int i;
- for (i = 1; i <= nr_cells; i++)
- phys->cells[max_nr_cells - i] = phys->cells[nr_cells - i];
- for (i = 0; i < (max_nr_cells - nr_cells); i++)
- phys->cells[i] = 0;
- }
- phys->nr_cells = max_nr_cells;
- return max_nr_cells;
- }
-}
-
-static int
-generic_hw_unit_encode (struct hw *bus,
- const hw_unit *phys,
- char *buf,
- int sizeof_buf)
-{
- int i;
- int len;
- char *pos = buf;
- /* skip leading zero's */
- for (i = 0; i < phys->nr_cells; i++)
- {
- if (phys->cells[i] != 0)
- break;
- }
- /* don't output anything if empty */
- if (phys->nr_cells == 0)
- {
- strcpy(pos, "");
- len = 0;
- }
- else if (i == phys->nr_cells)
- {
- /* all zero */
- strcpy(pos, "0");
- len = 1;
- }
- else
- {
- for (; i < phys->nr_cells; i++)
- {
- if (pos != buf) {
- strcat(pos, ",");
- pos = strchr(pos, '\0');
- }
- if (phys->cells[i] < 10)
- sprintf (pos, "%ld", (unsigned long)phys->cells[i]);
- else
- sprintf (pos, "0x%lx", (unsigned long)phys->cells[i]);
- pos = strchr(pos, '\0');
- }
- len = pos - buf;
- }
- if (len >= sizeof_buf)
- hw_abort (NULL, "generic_unit_encode - buffer overflow\n");
- return len;
-}
-
-static int
-generic_hw_unit_address_to_attach_address (struct hw *me,
- const hw_unit *address,
- int *attach_space,
- unsigned_word *attach_address,
- struct hw *client)
-{
- int i;
- for (i = 0; i < address->nr_cells - 2; i++)
- {
- if (address->cells[i] != 0)
- hw_abort (me, "Only 32bit addresses supported");
- }
- if (address->nr_cells >= 2)
- *attach_space = address->cells[address->nr_cells - 2];
- else
- *attach_space = 0;
- *attach_address = address->cells[address->nr_cells - 1];
- return 1;
-}
-
-static int
-generic_hw_unit_size_to_attach_size (struct hw *me,
- const hw_unit *size,
- unsigned *nr_bytes,
- struct hw *client)
-{
- int i;
- for (i = 0; i < size->nr_cells - 1; i++)
- {
- if (size->cells[i] != 0)
- hw_abort (me, "Only 32bit sizes supported");
- }
- *nr_bytes = size->cells[0];
- return *nr_bytes;
-}
-
-
-/* ignore/passthrough versions of each function */
-
-static void
-passthrough_hw_attach_address (struct hw *me,
- int level,
- int space,
- address_word addr,
- address_word nr_bytes,
- struct hw *client) /*callback/default*/
-{
- if (hw_parent (me) == NULL)
- hw_abort (client, "hw_attach_address: no parent attach method");
- hw_attach_address (hw_parent (me), level,
- space, addr, nr_bytes,
- client);
-}
-
-static void
-passthrough_hw_detach_address (struct hw *me,
- int level,
- int space,
- address_word addr,
- address_word nr_bytes,
- struct hw *client) /*callback/default*/
-{
- if (hw_parent (me) == NULL)
- hw_abort (client, "hw_attach_address: no parent attach method");
- hw_detach_address (hw_parent (me), level,
- space, addr, nr_bytes,
- client);
-}
-
-static unsigned
-panic_hw_io_read_buffer (struct hw *me,
- void *dest,
- int space,
- unsigned_word addr,
- unsigned nr_bytes)
-{
- hw_abort (me, "no io-read method");
- return 0;
-}
-
-static unsigned
-panic_hw_io_write_buffer (struct hw *me,
- const void *source,
- int space,
- unsigned_word addr,
- unsigned nr_bytes)
-{
- hw_abort (me, "no io-write method");
- return 0;
-}
-
-static unsigned
-passthrough_hw_dma_read_buffer (struct hw *me,
- void *dest,
- int space,
- unsigned_word addr,
- unsigned nr_bytes)
-{
- if (hw_parent (me) == NULL)
- hw_abort (me, "no parent dma-read method");
- return hw_dma_read_buffer (hw_parent (me), dest,
- space, addr, nr_bytes);
-}
-
-static unsigned
-passthrough_hw_dma_write_buffer (struct hw *me,
- const void *source,
- int space,
- unsigned_word addr,
- unsigned nr_bytes,
- int violate_read_only_section)
-{
- if (hw_parent (me) == NULL)
- hw_abort (me, "no parent dma-write method");
- return hw_dma_write_buffer (hw_parent (me), source,
- space, addr,
- nr_bytes,
- violate_read_only_section);
-}
-
-static void
-ignore_hw_delete (struct hw *me)
-{
- /* NOP */
-}
-
-
-
-
-static const char *
-full_name_of_hw (struct hw *leaf,
- char *buf,
- unsigned sizeof_buf)
-{
- /* get a buffer */
- char full_name[1024];
- if (buf == (char*)0)
- {
- buf = full_name;
- sizeof_buf = sizeof (full_name);
- }
-
- /* use head recursion to construct the path */
-
- if (hw_parent (leaf) == NULL)
- /* root */
- {
- if (sizeof_buf < 1)
- hw_abort (leaf, "buffer overflow");
- *buf = '\0';
- }
- else
- /* sub node */
- {
- char unit[1024];
- full_name_of_hw (hw_parent (leaf), buf, sizeof_buf);
- if (hw_unit_encode (hw_parent (leaf),
- hw_unit_address (leaf),
- unit + 1,
- sizeof (unit) - 1)
- > 0)
- unit[0] = '@';
- else
- unit[0] = '\0';
- if (strlen (buf) + strlen ("/") + strlen (hw_name (leaf)) + strlen (unit)
- >= sizeof_buf)
- hw_abort (leaf, "buffer overflow");
- strcat (buf, "/");
- strcat (buf, hw_name (leaf));
- strcat (buf, unit);
- }
-
- /* return it usefully */
- if (buf == full_name)
- buf = hw_strdup (leaf, full_name);
- return buf;
-}
-
-struct hw *
-hw_create (struct sim_state *sd,
- struct hw *parent,
- const char *family,
- const char *name,
- const char *unit,
- const char *args)
-{
- /* NOTE: HW must be allocated using ZALLOC, others use HW_ZALLOC */
- struct hw *hw = ZALLOC (struct hw);
-
- /* our identity */
- hw->family_of_hw = hw_strdup (hw, family);
- hw->name_of_hw = hw_strdup (hw, name);
- hw->args_of_hw = hw_strdup (hw, args);
-
- /* a hook into the system */
- if (sd != NULL)
- hw->system_of_hw = sd;
- else if (parent != NULL)
- hw->system_of_hw = hw_system (parent);
- else
- hw_abort (parent, "No system found");
-
- /* in a tree */
- if (parent != NULL)
- {
- struct hw **sibling = &parent->child_of_hw;
- while ((*sibling) != NULL)
- sibling = &(*sibling)->sibling_of_hw;
- *sibling = hw;
- hw->parent_of_hw = parent;
- }
-
- /* top of tree */
- if (parent != NULL)
- {
- struct hw *root = parent;
- while (root->parent_of_hw != NULL)
- root = root->parent_of_hw;
- hw->root_of_hw = root;
- }
-
- /* a unique identifier for the device on the parents bus */
- if (parent != NULL)
- {
- hw_unit_decode (parent, unit, &hw->unit_address_of_hw);
- }
-
- /* Determine our path */
- if (parent != NULL)
- hw->path_of_hw = full_name_of_hw (hw, NULL, 0);
- else
- hw->path_of_hw = "/";
-
- /* create our base type */
- hw->base_of_hw = HW_ZALLOC (hw, struct hw_base_data);
- hw->base_of_hw->finished_p = 0;
-
- /* our callbacks */
- set_hw_io_read_buffer (hw, panic_hw_io_read_buffer);
- set_hw_io_write_buffer (hw, panic_hw_io_write_buffer);
- set_hw_dma_read_buffer (hw, passthrough_hw_dma_read_buffer);
- set_hw_dma_write_buffer (hw, passthrough_hw_dma_write_buffer);
- set_hw_unit_decode (hw, generic_hw_unit_decode);
- set_hw_unit_encode (hw, generic_hw_unit_encode);
- set_hw_unit_address_to_attach_address (hw, generic_hw_unit_address_to_attach_address);
- set_hw_unit_size_to_attach_size (hw, generic_hw_unit_size_to_attach_size);
- set_hw_attach_address (hw, passthrough_hw_attach_address);
- set_hw_detach_address (hw, passthrough_hw_detach_address);
- set_hw_delete (hw, ignore_hw_delete);
-
- /* locate a descriptor */
- {
- const struct hw_descriptor **table;
- for (table = hw_descriptors;
- *table != NULL;
- table++)
- {
- const struct hw_descriptor *entry;
- for (entry = *table;
- entry->family != NULL;
- entry++)
- {
- if (strcmp (family, entry->family) == 0)
- {
- hw->base_of_hw->descriptor = entry;
- break;
- }
- }
- }
- if (hw->base_of_hw->descriptor == NULL)
- {
- hw_abort (parent, "Unknown device `%s'", family);
- }
- }
-
- /* Attach dummy ports */
- create_hw_alloc_data (hw);
- create_hw_property_data (hw);
- create_hw_port_data (hw);
- create_hw_event_data (hw);
- create_hw_handle_data (hw);
- create_hw_instance_data (hw);
-
- return hw;
-}
-
-
-int
-hw_finished_p (struct hw *me)
-{
- return (me->base_of_hw->finished_p);
-}
-
-void
-hw_finish (struct hw *me)
-{
- if (hw_finished_p (me))
- hw_abort (me, "Attempt to finish finished device");
-
- /* Fill in the (hopefully) defined address/size cells values */
- if (hw_find_property (me, "#address-cells") != NULL)
- me->nr_address_cells_of_hw_unit =
- hw_find_integer_property (me, "#address-cells");
- else
- me->nr_address_cells_of_hw_unit = 2;
- if (hw_find_property (me, "#size-cells") != NULL)
- me->nr_size_cells_of_hw_unit =
- hw_find_integer_property (me, "#size-cells");
- else
- me->nr_size_cells_of_hw_unit = 1;
-
- /* Fill in the (hopefully) defined trace variable */
- if (hw_find_property (me, "trace?") != NULL)
- me->trace_of_hw_p = hw_find_boolean_property (me, "trace?");
- /* allow global variable to define default tracing */
- else if (! hw_trace_p (me)
- && hw_find_property (hw_root (me), "global-trace?") != NULL
- && hw_find_boolean_property (hw_root (me), "global-trace?"))
- me->trace_of_hw_p = 1;
-
-
- /* Allow the real device to override any methods */
- me->base_of_hw->descriptor->to_finish (me);
- me->base_of_hw->finished_p = 1;
-}
-
-
-void
-hw_delete (struct hw *me)
-{
- /* give the object a chance to tidy up */
- me->base_of_hw->to_delete (me);
-
- delete_hw_instance_data (me);
- delete_hw_handle_data (me);
- delete_hw_event_data (me);
- delete_hw_port_data (me);
- delete_hw_property_data (me);
-
- /* now unlink us from the tree */
- if (hw_parent (me))
- {
- struct hw **sibling = &hw_parent (me)->child_of_hw;
- while (*sibling != NULL)
- {
- if (*sibling == me)
- {
- *sibling = me->sibling_of_hw;
- me->sibling_of_hw = NULL;
- me->parent_of_hw = NULL;
- break;
- }
- }
- }
-
- /* some sanity checks */
- if (hw_child (me) != NULL)
- {
- hw_abort (me, "attempt to delete device with children");
- }
- if (hw_sibling (me) != NULL)
- {
- hw_abort (me, "attempt to delete device with siblings");
- }
-
- /* blow away all memory belonging to the device */
- delete_hw_alloc_data (me);
-
- /* finally */
- zfree (me);
-}
-
-void
-set_hw_delete (struct hw *hw, hw_delete_callback method)
-{
- hw->base_of_hw->to_delete = method;
-}
-
-
-/* Go through the devices various reg properties for those that
- specify attach addresses */
-
-
-void
-do_hw_attach_regs (struct hw *hw)
-{
- static const char *(reg_property_names[]) = {
- "attach-addresses",
- "assigned-addresses",
- "reg",
- "alternate-reg" ,
- NULL
- };
- const char **reg_property_name;
- int nr_valid_reg_properties = 0;
- for (reg_property_name = reg_property_names;
- *reg_property_name != NULL;
- reg_property_name++)
- {
- if (hw_find_property (hw, *reg_property_name) != NULL)
- {
- reg_property_spec reg;
- int reg_entry;
- for (reg_entry = 0;
- hw_find_reg_array_property (hw, *reg_property_name, reg_entry,
- &reg);
- reg_entry++)
- {
- unsigned_word attach_address;
- int attach_space;
- unsigned attach_size;
- if (!hw_unit_address_to_attach_address (hw_parent (hw),
- &reg.address,
- &attach_space,
- &attach_address,
- hw))
- continue;
- if (!hw_unit_size_to_attach_size (hw_parent (hw),
- &reg.size,
- &attach_size, hw))
- continue;
- hw_attach_address (hw_parent (hw),
- 0,
- attach_space, attach_address, attach_size,
- hw);
- nr_valid_reg_properties++;
- }
- /* if first option matches don't try for any others */
- if (reg_property_name == reg_property_names)
- break;
- }
- }
-}
diff --git a/sim/common/hw-base.h b/sim/common/hw-base.h
deleted file mode 100644
index 57601034a7c..00000000000
--- a/sim/common/hw-base.h
+++ /dev/null
@@ -1,108 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1998, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-#ifndef HW_BASE
-#define HW_BASE
-
-/* Create a primative device */
-
-struct hw *hw_create
-(struct sim_state *sd,
- struct hw *parent,
- const char *family,
- const char *name,
- const char *unit,
- const char *args);
-
-
-/* Complete the creation of that device (finish overrides methods
- using the set_hw_* operations below) */
-
-void hw_finish
-(struct hw *me);
-
-int hw_finished_p
-(struct hw *me);
-
-
-/* Delete the entire device */
-
-void hw_delete
-(struct hw *me);
-
-
-/* Override device methods */
-
-typedef void (hw_delete_callback)
- (struct hw *me);
-
-extern void set_hw_delete(struct hw* hw, hw_delete_callback method);
-
-
-/* ALLOC */
-
-extern void create_hw_alloc_data
-(struct hw *hw);
-extern void delete_hw_alloc_data
-(struct hw *hw);
-
-
-/* PORTS */
-
-extern void create_hw_port_data
-(struct hw *hw);
-extern void delete_hw_port_data
-(struct hw *hw);
-
-
-/* PROPERTIES */
-
-extern void create_hw_property_data
-(struct hw *hw);
-extern void delete_hw_property_data
-(struct hw *hw);
-
-
-/* EVENTS */
-
-extern void create_hw_event_data
-(struct hw *hw);
-extern void delete_hw_event_data
-(struct hw *hw);
-
-
-/* HANDLES */
-
-extern void create_hw_handle_data
-(struct hw *hw);
-extern void delete_hw_handle_data
-(struct hw *hw);
-
-
-/* INSTANCES */
-
-extern void create_hw_instance_data
-(struct hw *hw);
-extern void delete_hw_instance_data
-(struct hw *hw);
-
-
-#endif
diff --git a/sim/common/hw-device.c b/sim/common/hw-device.c
deleted file mode 100644
index c7f50e30953..00000000000
--- a/sim/common/hw-device.c
+++ /dev/null
@@ -1,66 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1998, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-#include "hw-main.h"
-#include "hw-base.h"
-
-#if HAVE_STDLIB_H
-#include <stdlib.h>
-#endif
-
-/* Address methods */
-
-const hw_unit *
-hw_unit_address (struct hw *me)
-{
- return &me->unit_address_of_hw;
-}
-
-
-/* IOCTL: */
-
-int
-hw_ioctl (struct hw *me,
- hw_ioctl_request request,
- ...)
-{
- int status;
- va_list ap;
- va_start(ap, request);
- status = me->to_ioctl (me, request, ap);
- va_end(ap);
- return status;
-}
-
-char *
-hw_strdup (struct hw *me, const char *str)
-{
- if (str != NULL)
- {
- char *dup = hw_zalloc (me, strlen (str) + 1);
- strcpy (dup, str);
- return dup;
- }
- else
- {
- return NULL;
- }
-}
diff --git a/sim/common/hw-device.h b/sim/common/hw-device.h
deleted file mode 100644
index 2cbdc5adc46..00000000000
--- a/sim/common/hw-device.h
+++ /dev/null
@@ -1,535 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1998, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-#ifndef HW_DEVICE_H
-#define HW_DEVICE_H
-
-/* declared in sim-basics.h, this object is used everywhere */
-/* typedef struct _device device; */
-
-
-/* Introduction:
-
- As explained in earlier sections, the device, device instance,
- property and ports lie at the heart of PSIM's device model.
-
- In the below a synopsis of the device object and the operations it
- supports are given.
- */
-
-
-/* Creation:
-
- The devices are created using a sequence of steps. In particular:
-
- o A tree framework is created.
-
- At this point, properties can be modified and extra
- devices inserted (or removed?).
-
-#if LATER
-
- Any properties that have a run-time value (eg ihandle
- or device instance pointer properties) are entered
- into the device tree using a named reference to the
- corresponding runtime object that is to be created.
-
-#endif
-
- o Real devices are created for all the dummy devices.
-
- A device can assume that all of its parents have been
- initialized.
-
- A device can assume that all non run-time properties
- have been initialized.
-
- As part of being created, the device normally attaches
- itself to its parent bus.
-
-#if LATER
-
- Device instance data is initialized.
-
-#endif
-
-#if LATER
-
- o Any run-time properties are created.
-
-#endif
-
-#if MUCH_MUCH_LATER
-
- o Some devices, as part of their initialization
- might want to refer to ihandle properties
- in the device tree.
-
-#endif
-
- NOTES:
-
- o It is important to separate the creation
- of an actual device from the creation
- of the tree. The alternative creating
- the device in two stages: As a separate
- entity and then as a part of the tree.
-
-#if LATER
- o Run-time properties can not be created
- until after the devices in the tree
- have been created. Hence an extra pass
- for handling them.
-#endif
-
- */
-
-/* Relationships:
-
- A device is able to determine its relationship to other devices
- within the tree. Operations include querying for a devices parent,
- sibling, child, name, and path (from the root).
-
- */
-
-
-#define hw_parent(hw) ((hw)->parent_of_hw + 0)
-
-#define hw_sibling(hw) ((hw)->sibling_of_hw + 0)
-
-#define hw_child(hw) ((hw)->child_of_hw + 0)
-
-
-
-/* Herritage:
-
- */
-
-#define hw_family(hw) ((hw)->family_of_hw + 0)
-
-#define hw_name(hw) ((hw)->name_of_hw + 0)
-
-#define hw_args(hw) ((hw)->args_of_hw + 0)
-
-#define hw_path(hw) ((hw)->path_of_hw + 0)
-
-
-
-/* Short cut to the root node of the tree */
-
-#define hw_root(hw) ((hw)->root_of_hw + 0)
-
-/* Short cut back to the simulator object */
-
-#define hw_system(hw) ((hw)->system_of_hw)
-
-/* For requests initiated by a CPU the cpu that initiated the request */
-
-struct _sim_cpu *hw_system_cpu (struct hw *hw);
-
-
-/* Device private data */
-
-#define hw_data(hw) ((hw)->data_of_hw)
-
-#define set_hw_data(hw, value) \
-((hw)->data_of_hw = (value))
-
-
-
-/* Perform a soft reset of the device */
-
-typedef unsigned (hw_reset_method)
- (struct hw *me);
-
-#define hw_reset(hw) ((hw)->to_reset (hw))
-
-#define set_hw_reset(hw, method) \
-((hw)->to_reset = method)
-
-
-/* Hardware operations:
-
- Connecting a parent to its children is a common bus. The parent
- node is described as the bus owner and is responisble for
- co-ordinating bus operations. On the bus, a SPACE:ADDR pair is used
- to specify an address. A device that is both a bus owner (parent)
- and bus client (child) are refered to as a bridging device.
-
- A child performing a data (DMA) transfer will pass its request to
- the bus owner (the devices parent). The bus owner will then either
- reflect the request to one of the other devices attached to the bus
- (a child of the bus owner) or bridge the request up the tree to the
- next bus. */
-
-
-/* Children attached to a bus can register (attach) themselves to
- specific addresses on their attached bus.
-
- (A device may also be implicitly attached to certain bus
- addresses).
-
- The SPACE:ADDR pair specify an address on the common bus that
- connects the parent and child devices. */
-
-typedef void (hw_attach_address_method)
- (struct hw *me,
- int level,
- int space,
- address_word addr,
- address_word nr_bytes,
- struct hw *client); /*callback/default*/
-
-#define hw_attach_address(me, level, space, addr, nr_bytes, client) \
-((me)->to_attach_address (me, level, space, addr, nr_bytes, client))
-
-#define set_hw_attach_address(hw, method) \
-((hw)->to_attach_address = (method))
-
-typedef void (hw_detach_address_method)
- (struct hw *me,
- int level,
- int space,
- address_word addr,
- address_word nr_bytes,
- struct hw *client); /*callback/default*/
-
-#define hw_detach_address(me, level, space, addr, nr_bytes, client) \
-((me)->to_detach_address (me, level, space, addr, nr_bytes, client))
-
-#define set_hw_detach_address(hw, method) \
-((hw)->to_detach_address = (method))
-
-
-/* An IO operation from a parent to a child via the conecting bus.
-
- The SPACE:ADDR pair specify an address on the bus shared between
- the parent and child devices. */
-
-typedef unsigned (hw_io_read_buffer_method)
- (struct hw *me,
- void *dest,
- int space,
- unsigned_word addr,
- unsigned nr_bytes);
-
-#define hw_io_read_buffer(hw, dest, space, addr, nr_bytes) \
-((hw)->to_io_read_buffer (hw, dest, space, addr, nr_bytes))
-
-#define set_hw_io_read_buffer(hw, method) \
-((hw)->to_io_read_buffer = (method))
-
-typedef unsigned (hw_io_write_buffer_method)
- (struct hw *me,
- const void *source,
- int space,
- unsigned_word addr,
- unsigned nr_bytes);
-
-#define hw_io_write_buffer(hw, src, space, addr, nr_bytes) \
-((hw)->to_io_write_buffer (hw, src, space, addr, nr_bytes))
-
-#define set_hw_io_write_buffer(hw, method) \
-((hw)->to_io_write_buffer = (method))
-
-
-/* Conversly, the device pci1000,1@1 may need to perform a dma transfer
- into the cpu/memory core. Just as I/O moves towards the leaves,
- dma transfers move towards the core via the initiating devices
- parent nodes. The root device (special) converts the DMA transfer
- into reads/writes to memory.
-
- The SPACE:ADDR pair specify an address on the common bus connecting
- the parent and child devices. */
-
-typedef unsigned (hw_dma_read_buffer_method)
- (struct hw *bus,
- void *dest,
- int space,
- unsigned_word addr,
- unsigned nr_bytes);
-
-#define hw_dma_read_buffer(bus, dest, space, addr, nr_bytes) \
-((bus)->to_dma_read_buffer (bus, dest, space, addr, nr_bytes))
-
-#define set_hw_dma_read_buffer(me, method) \
-((me)->to_dma_read_buffer = (method))
-
-typedef unsigned (hw_dma_write_buffer_method)
- (struct hw *bus,
- const void *source,
- int space,
- unsigned_word addr,
- unsigned nr_bytes,
- int violate_read_only_section);
-
-#define hw_dma_write_buffer(bus, src, space, addr, nr_bytes, violate_ro) \
-((bus)->to_dma_write_buffer (bus, src, space, addr, nr_bytes, violate_ro))
-
-#define set_hw_dma_write_buffer(me, method) \
-((me)->to_dma_write_buffer = (method))
-
-/* Address/size specs for devices are encoded following a convention
- similar to that used by OpenFirmware. In particular, an
- address/size is packed into a sequence of up to four cell words.
- The number of words determined by the number of {address,size}
- cells attributes of the device. */
-
-typedef struct _hw_unit {
- int nr_cells;
- unsigned_cell cells[4]; /* unused cells are zero */
-} hw_unit;
-
-
-/* For the given bus, the number of address and size cells used in a
- hw_unit. */
-
-#define hw_unit_nr_address_cells(bus) ((bus)->nr_address_cells_of_hw_unit + 0)
-
-#define hw_unit_nr_size_cells(bus) ((bus)->nr_size_cells_of_hw_unit + 0)
-
-
-/* For the given device, its identifying hw_unit address.
-
- Each device has an identifying hw_unit address. That address is
- used when identifying one of a number of identical devices on a
- common controller bus. ex fd0&fd1. */
-
-const hw_unit *hw_unit_address
-(struct hw *me);
-
-
-/* Convert between a textual and the internal representation of a
- hw_unit address/size.
-
- NOTE: A device asks its parent to translate between a hw_unit and
- textual representation. This is because the textual address of a
- device is specified using the parent busses notation. */
-
-typedef int (hw_unit_decode_method)
- (struct hw *bus,
- const char *encoded,
- hw_unit *unit);
-
-#define hw_unit_decode(bus, encoded, unit) \
-((bus)->to_unit_decode (bus, encoded, unit))
-
-#define set_hw_unit_decode(hw, method) \
-((hw)->to_unit_decode = (method))
-
-typedef int (hw_unit_encode_method)
- (struct hw *bus,
- const hw_unit *unit,
- char *encoded,
- int sizeof_buf);
-
-#define hw_unit_encode(bus, unit, encoded, sizeof_encoded) \
-((bus)->to_unit_encode (bus, unit, encoded, sizeof_encoded))
-
-#define set_hw_unit_encode(hw, method) \
-((hw)->to_unit_encode = (method))
-
-
-/* As the bus that the device is attached too, to translate a devices
- hw_unit address/size into a form suitable for an attach address
- call.
-
- Return a zero result if the address should be ignored when looking
- for attach addresses. */
-
-typedef int (hw_unit_address_to_attach_address_method)
- (struct hw *bus,
- const hw_unit *unit_addr,
- int *attach_space,
- unsigned_word *attach_addr,
- struct hw *client);
-
-#define hw_unit_address_to_attach_address(bus, unit_addr, attach_space, attach_addr, client) \
-((bus)->to_unit_address_to_attach_address (bus, unit_addr, attach_space, attach_addr, client))
-
-#define set_hw_unit_address_to_attach_address(hw, method) \
-((hw)->to_unit_address_to_attach_address = (method))
-
-typedef int (hw_unit_size_to_attach_size_method)
- (struct hw *bus,
- const hw_unit *unit_size,
- unsigned *attach_size,
- struct hw *client);
-
-#define hw_unit_size_to_attach_size(bus, unit_size, attach_size, client) \
-((bus)->to_unit_size_to_attach_size (bus, unit_size, attach_size, client))
-
-#define set_hw_unit_size_to_attach_size(hw, method) \
-((hw)->to_unit_size_to_attach_size = (method))
-
-
-extern char *hw_strdup (struct hw *me, const char *str);
-
-
-/* Utilities:
-
- */
-
-/* IOCTL::
-
- Often devices require `out of band' operations to be performed.
- For instance a pal device may need to notify a PCI bridge device
- that an interrupt ack cycle needs to be performed on the PCI bus.
- Within PSIM such operations are performed by using the generic
- ioctl call <<hw_ioctl()>>.
-
- */
-
-typedef enum {
- hw_ioctl_break, /* unsigned_word requested_break */
- hw_ioctl_set_trace, /* void */
- hw_ioctl_create_stack, /* unsigned_word *sp, char **argv, char **envp */
- hw_ioctl_change_media, /* const char *new_image (possibly NULL) */
- nr_hw_ioctl_requests,
-} hw_ioctl_request;
-
-typedef int (hw_ioctl_method)
- (struct hw *me,
- hw_ioctl_request request,
- va_list ap);
-
-int hw_ioctl
-(struct hw *me,
- hw_ioctl_request request,
- ...);
-
-
-/* Error reporting::
-
- So that errors originating from devices appear in a consistent
- format, the <<hw_abort()>> function can be used. Formats and
- outputs the error message before aborting the simulation
-
- Devices should use this function to abort the simulation except
- when the abort reason leaves the simulation in a hazardous
- condition (for instance a failed malloc).
-
- */
-
-void hw_abort
-(struct hw *me,
- const char *fmt,
- ...) __attribute__ ((format (printf, 2, 3)));
-
-void hw_vabort
-(struct hw *me,
- const char *fmt,
- va_list ap);
-
-void hw_halt
-(struct hw *me,
- int reason,
- int status);
-
-
-#define hw_trace_p(hw) ((hw)->trace_of_hw_p + 0)
-
-void hw_trace
-(struct hw *me,
- const char *fmt,
- ...) __attribute__ ((format (printf, 2, 3)));
-
-#define HW_TRACE(ARGS) \
-do { \
- if (hw_trace_p (me)) \
- { \
- hw_trace ARGS; \
- } \
-} while (0)
-
-
-/* Some of the related functions require specific types */
-
-struct hw_property_data;
-struct hw_port_data;
-struct hw_base_data;
-struct hw_alloc_data;
-struct hw_event_data;
-struct hw_handle_data;
-struct hw_instance_data;
-
-/* Finally the hardware device - keep your grubby little mits off of
- these internals! :-) */
-
-struct hw {
-
- /* our relatives */
- struct hw *parent_of_hw;
- struct hw *sibling_of_hw;
- struct hw *child_of_hw;
-
- /* our identity */
- const char *name_of_hw;
- const char *family_of_hw;
- const char *args_of_hw;
- const char *path_of_hw;
-
- /* our data */
- void *data_of_hw;
-
- /* hot links */
- struct hw *root_of_hw;
- struct sim_state *system_of_hw;
-
- /* identifying data */
- hw_unit unit_address_of_hw;
- int nr_address_cells_of_hw_unit;
- int nr_size_cells_of_hw_unit;
-
- /* Soft reset */
- hw_reset_method *to_reset;
-
- /* Basic callbacks */
- hw_io_read_buffer_method *to_io_read_buffer;
- hw_io_write_buffer_method *to_io_write_buffer;
- hw_dma_read_buffer_method *to_dma_read_buffer;
- hw_dma_write_buffer_method *to_dma_write_buffer;
- hw_attach_address_method *to_attach_address;
- hw_detach_address_method *to_detach_address;
-
- /* More complicated callbacks */
- hw_ioctl_method *to_ioctl;
- int trace_of_hw_p;
-
- /* address callbacks */
- hw_unit_decode_method *to_unit_decode;
- hw_unit_encode_method *to_unit_encode;
- hw_unit_address_to_attach_address_method *to_unit_address_to_attach_address;
- hw_unit_size_to_attach_size_method *to_unit_size_to_attach_size;
-
- /* related data */
- struct hw_property_data *properties_of_hw;
- struct hw_port_data *ports_of_hw;
- struct hw_base_data *base_of_hw;
- struct hw_alloc_data *alloc_of_hw;
- struct hw_event_data *events_of_hw;
- struct hw_handle_data *handles_of_hw;
- struct hw_instance_data *instances_of_hw;
-
-};
-
-
-#endif
diff --git a/sim/common/hw-events.c b/sim/common/hw-events.c
deleted file mode 100644
index 243a7aae712..00000000000
--- a/sim/common/hw-events.c
+++ /dev/null
@@ -1,273 +0,0 @@
-/* Hardware event manager.
- Copyright (C) 1998 Free Software Foundation, Inc.
- Contributed by Cygnus Support.
-
-This file is part of GDB, the GNU debugger.
-
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License along
-with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
-
-
-#include "hw-main.h"
-#include "hw-base.h"
-
-#include "sim-events.h"
-
-
-/* The hw-events object is implemented using sim-events */
-
-struct hw_event {
- void *data;
- struct hw *me;
- hw_event_callback *callback;
- sim_event *real;
- struct hw_event_data *entry;
-};
-
-struct hw_event_data {
- struct hw_event event;
- struct hw_event_data *next;
-};
-
-void
-create_hw_event_data (struct hw *me)
-{
- if (me->events_of_hw != NULL)
- hw_abort (me, "stray events");
- /* NOP */
-}
-
-void
-delete_hw_event_data (struct hw *me)
-{
- /* Remove the scheduled event. */
- while (me->events_of_hw)
- hw_event_queue_deschedule (me, &me->events_of_hw->event);
-}
-
-
-/* Pass the H/W event onto the real callback */
-
-static void
-bounce_hw_event (SIM_DESC sd,
- void *data)
-{
- /* save the data */
- struct hw_event_data *entry = (struct hw_event_data *) data;
- struct hw *me = entry->event.me;
- void *event_data = entry->event.data;
- hw_event_callback *callback = entry->event.callback;
- struct hw_event_data **prev = &me->events_of_hw;
- while ((*prev) != entry)
- prev = &(*prev)->next;
- (*prev) = entry->next;
- hw_free (me, entry);
- callback (me, event_data); /* may not return */
-}
-
-
-
-/* Map onto the event functions */
-
-struct hw_event *
-hw_event_queue_schedule (struct hw *me,
- signed64 delta_time,
- hw_event_callback *callback,
- void *data)
-{
- struct hw_event *event;
- va_list dummy;
- event = hw_event_queue_schedule_vtracef (me, delta_time, callback, data,
- NULL, dummy);
- return event;
-}
-
-struct hw_event *
-hw_event_queue_schedule_tracef (struct hw *me,
- signed64 delta_time,
- hw_event_callback *callback,
- void *data,
- const char *fmt,
- ...)
-{
- struct hw_event *event;
- va_list ap;
- va_start (ap, fmt);
- event = hw_event_queue_schedule_vtracef (me, delta_time, callback, data, fmt, ap);
- va_end (ap);
- return event;
-}
-
-struct hw_event *
-hw_event_queue_schedule_vtracef (struct hw *me,
- signed64 delta_time,
- hw_event_callback *callback,
- void *data,
- const char *fmt,
- va_list ap)
-{
- struct hw_event_data *entry = HW_ZALLOC (me, struct hw_event_data);
- entry->next = me->events_of_hw;
- me->events_of_hw = entry;
- /* fill it in */
- entry->event.entry = entry;
- entry->event.data = data;
- entry->event.callback = callback;
- entry->event.me = me;
- entry->event.real = sim_events_schedule_vtracef (hw_system (me),
- delta_time,
- bounce_hw_event,
- entry,
- fmt, ap);
- return &entry->event;
-}
-
-
-void
-hw_event_queue_deschedule (struct hw *me,
- struct hw_event *event_to_remove)
-{
-/* ZAP the event but only if it is still in the event queue. Note
- that event_to_remove is only de-referenced after its validity has
- been confirmed. */
- struct hw_event_data **prev;
- for (prev = &me->events_of_hw;
- (*prev) != NULL;
- prev = &(*prev)->next)
- {
- struct hw_event_data *entry = (*prev);
- if (&entry->event == event_to_remove)
- {
- sim_events_deschedule (hw_system (me),
- entry->event.real);
- (*prev) = entry->next;
- hw_free (me, entry);
- return;
- }
- }
-}
-
-
-signed64
-hw_event_queue_time (struct hw *me)
-{
- return sim_events_time (hw_system (me));
-}
-
-/* Returns the time that remains before the event is raised. */
-signed64
-hw_event_remain_time (struct hw *me, struct hw_event *event)
-{
- signed64 t;
-
- t = sim_events_remain_time (hw_system (me), event->real);
- return t;
-}
-
-/* Only worry about this compling on ANSI systems.
- Build with `make test-hw-events' in sim/<cpu> directory*/
-
-#if defined (MAIN)
-#include "sim-main.h"
-#include <string.h>
-#include <stdio.h>
-
-static void
-test_handler (struct hw *me,
- void *data)
-{
- int *n = data;
- if (*n != hw_event_queue_time (me))
- abort ();
- *n = -(*n);
-}
-
-int
-main (int argc,
- char **argv)
-{
- host_callback *cb = ZALLOC (host_callback);
- struct sim_state *sd = sim_state_alloc (0, cb);
- struct hw *me = ZALLOC (struct hw);
- sim_pre_argv_init (sd, "test-hw-events");
- sim_post_argv_init (sd);
- me->system_of_hw = sd;
-
- printf ("Create hw-event-data\n");
- {
- create_hw_alloc_data (me);
- create_hw_event_data (me);
- delete_hw_event_data (me);
- delete_hw_alloc_data (me);
- }
-
- printf ("Create hw-events\n");
- {
- struct hw_event *a;
- struct hw_event *b;
- struct hw_event *c;
- struct hw_event *d;
- create_hw_alloc_data (me);
- create_hw_event_data (me);
- a = hw_event_queue_schedule (me, 0, NULL, NULL);
- b = hw_event_queue_schedule (me, 1, NULL, NULL);
- c = hw_event_queue_schedule (me, 2, NULL, NULL);
- d = hw_event_queue_schedule (me, 1, NULL, NULL);
- hw_event_queue_deschedule (me, c);
- hw_event_queue_deschedule (me, b);
- hw_event_queue_deschedule (me, a);
- hw_event_queue_deschedule (me, d);
- c = HW_ZALLOC (me, struct hw_event);
- hw_event_queue_deschedule (me, b); /* OOPS! */
- hw_free (me, c);
- delete_hw_event_data (me);
- delete_hw_alloc_data (me);
- }
-
- printf ("Schedule hw-events\n");
- {
- struct hw_event **e;
- int *n;
- int i;
- int nr = 4;
- e = HW_NZALLOC (me, struct hw_event *, nr);
- n = HW_NZALLOC (me, int, nr);
- create_hw_alloc_data (me);
- create_hw_event_data (me);
- for (i = 0; i < nr; i++)
- {
- n[i] = i;
- e[i] = hw_event_queue_schedule (me, i, test_handler, &n[i]);
- }
- sim_events_preprocess (sd, 1, 1);
- for (i = 0; i < nr; i++)
- {
- if (sim_events_tick (sd))
- sim_events_process (sd);
- }
- for (i = 0; i < nr; i++)
- {
- if (n[i] != -i)
- abort ();
- hw_event_queue_deschedule (me, e[i]);
- }
- hw_free (me, n);
- hw_free (me, e);
- delete_hw_event_data (me);
- delete_hw_alloc_data (me);
- }
-
- return 0;
-}
-#endif
diff --git a/sim/common/hw-events.h b/sim/common/hw-events.h
deleted file mode 100644
index 29e10fac080..00000000000
--- a/sim/common/hw-events.h
+++ /dev/null
@@ -1,65 +0,0 @@
-/* Hardware event manager.
- Copyright (C) 1998 Free Software Foundation, Inc.
- Contributed by Cygnus Support.
-
-This file is part of GDB, the GNU debugger.
-
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License along
-with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
-
-#ifndef HW_EVENTS_H
-#define HW_EVENTS_H
-
-/* Event manager customized for hardware models.
-
- This interface is discussed further in sim-events.h. */
-
-struct hw_event;
-typedef void (hw_event_callback) (struct hw *me, void *data);
-
-struct hw_event *hw_event_queue_schedule
-(struct hw *me,
- signed64 delta_time,
- hw_event_callback *handler,
- void *data);
-
-struct hw_event *hw_event_queue_schedule_tracef
-(struct hw *me,
- signed64 delta_time,
- hw_event_callback *handler,
- void *data,
- const char *fmt,
- ...) __attribute__ ((format (printf, 5, 6)));
-
-struct hw_event *hw_event_queue_schedule_vtracef
-(struct hw *me,
- signed64 delta_time,
- hw_event_callback *handler,
- void *data,
- const char *fmt,
- va_list ap);
-
-
-void hw_event_queue_deschedule
-(struct hw *me,
- struct hw_event *event_to_remove);
-
-signed64 hw_event_queue_time
-(struct hw *me);
-
-/* Returns the time that remains before the event is raised. */
-signed64 hw_event_remain_time
-(struct hw *me, struct hw_event *event);
-
-#endif
diff --git a/sim/common/hw-handles.c b/sim/common/hw-handles.c
deleted file mode 100644
index 9400ca82e92..00000000000
--- a/sim/common/hw-handles.c
+++ /dev/null
@@ -1,237 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1995,1997-1998, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-#include "hw-main.h"
-#include "hw-base.h"
-
-
-struct hw_handle_mapping {
- cell_word external;
- struct hw *phandle;
- struct hw_instance *ihandle;
- struct hw_handle_mapping *next;
-};
-
-
-struct hw_handle_data {
- int nr_mappings;
- struct hw_handle_mapping *mappings;
-};
-
-void
-create_hw_handle_data (struct hw *hw)
-{
- if (hw_parent (hw) == NULL)
- {
- hw->handles_of_hw = HW_ZALLOC (hw, struct hw_handle_data);
- }
- else
- {
- hw->handles_of_hw = hw_root (hw)->handles_of_hw;
- }
-}
-
-void
-delete_hw_handle_data (struct hw *hw)
-{
- /* NULL */
-}
-
-
-
-#if 0
-void
-hw_handle_init (struct hw *hw)
-{
- struct hw_handle_mapping *current_map = db->mappings;
- if (current_map != NULL)
- {
- db->nr_mappings = db->mappings->external;
- /* verify that the mappings that were not removed are in
- sequence down to nr 1 */
- while (current_map->next != NULL)
- {
- if (current_map->external != current_map->next->external + 1)
- error ("hw_handle: hw_handle database possibly corrupt");
- current_map = current_map->next;
- }
- ASSERT (current_map->next == NULL);
- if (current_map->external != 1)
- error ("hw_handle: hw_handle database possibly corrupt");
- }
- else
- {
- db->nr_mappings = 0;
- }
-}
-#endif
-
-
-struct hw_instance *
-hw_handle_ihandle2 (struct hw *hw,
- cell_word external)
-{
- struct hw_handle_data *db = hw->handles_of_hw;
- struct hw_handle_mapping *current_map = db->mappings;
- while (current_map != NULL)
- {
- if (current_map->external == external)
- return current_map->ihandle;
- current_map = current_map->next;
- }
- return (void*)0;
-}
-
-
-struct hw *
-hw_handle_phandle2 (struct hw *hw,
- cell_word external)
-{
- struct hw_handle_data *db = hw->handles_of_hw;
- struct hw_handle_mapping *current_map = db->mappings;
- while (current_map != NULL)
- {
- if (current_map->external == external)
- return current_map->phandle;
- current_map = current_map->next;
- }
- return (void*)0;
-}
-
-
-cell_word
-hw_handle_2ihandle (struct hw *hw,
- struct hw_instance *internal)
-{
- struct hw_handle_data *db = hw->handles_of_hw;
- struct hw_handle_mapping *current_map = db->mappings;
- while (current_map != NULL)
- {
- if (current_map->ihandle == internal)
- return current_map->external;
- current_map = current_map->next;
- }
- return 0;
-}
-
-
-cell_word
-hw_handle_2phandle (struct hw *hw,
- struct hw *internal)
-{
- struct hw_handle_data *db = hw->handles_of_hw;
- struct hw_handle_mapping *current_map = db->mappings;
- while (current_map != NULL)
- {
- if (current_map->phandle == internal)
- return current_map->external;
- current_map = current_map->next;
- }
- return 0;
-}
-
-
-void
-hw_handle_add_ihandle (struct hw *hw,
- struct hw_instance *internal)
-{
- struct hw_handle_data *db = hw->handles_of_hw;
- if (hw_handle_2ihandle (hw, internal) != 0)
- {
- hw_abort (hw, "attempting to add an ihandle already in the data base");
- }
- else
- {
- /* insert at the front making things in decending order */
- struct hw_handle_mapping *new_map = ZALLOC (struct hw_handle_mapping);
- new_map->next = db->mappings;
- new_map->ihandle = internal;
- db->nr_mappings += 1;
- new_map->external = db->nr_mappings;
- db->mappings = new_map;
- }
-}
-
-
-void
-hw_handle_add_phandle (struct hw *hw,
- struct hw *internal)
-{
- struct hw_handle_data *db = hw->handles_of_hw;
- if (hw_handle_2phandle (hw, internal) != 0)
- {
- hw_abort (hw, "attempting to add a phandle already in the data base");
- }
- else
- {
- /* insert at the front making things in decending order */
- struct hw_handle_mapping *new_map = ZALLOC (struct hw_handle_mapping);
- new_map->next = db->mappings;
- new_map->phandle = internal;
- db->nr_mappings += 1;
- new_map->external = db->nr_mappings;
- db->mappings = new_map;
- }
-}
-
-
-void
-hw_handle_remove_ihandle (struct hw *hw,
- struct hw_instance *internal)
-{
- struct hw_handle_data *db = hw->handles_of_hw;
- struct hw_handle_mapping **current_map = &db->mappings;
- while (*current_map != NULL)
- {
- if ((*current_map)->ihandle == internal)
- {
- struct hw_handle_mapping *delete = *current_map;
- *current_map = delete->next;
- zfree (delete);
- return;
- }
- current_map = &(*current_map)->next;
- }
- hw_abort (hw, "attempt to remove nonexistant ihandle");
-}
-
-
-void
-hw_handle_remove_phandle (struct hw *hw,
- struct hw *internal)
-{
- struct hw_handle_data *db = hw->handles_of_hw;
- struct hw_handle_mapping **current_map = &db->mappings;
- while (*current_map != NULL)
- {
- if ((*current_map)->phandle == internal)
- {
- struct hw_handle_mapping *delete = *current_map;
- *current_map = delete->next;
- zfree (delete);
- return;
- }
- current_map = &(*current_map)->next;
- }
- hw_abort (hw, "attempt to remove nonexistant phandle");
-}
-
-
diff --git a/sim/common/hw-handles.h b/sim/common/hw-handles.h
deleted file mode 100644
index 087c9d02e75..00000000000
--- a/sim/common/hw-handles.h
+++ /dev/null
@@ -1,63 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1995,1997-1998, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-#ifndef HW_HANDLES_H
-#define HW_HANDLES_H
-
-
-/* Export a capability (handle) data base that maps between internal
- data values and those given to a simulation. */
-
-
-cell_word hw_handle_2ihandle
-(struct hw *db,
- struct hw_instance *instance);
-
-struct hw_instance *hw_handle_ihandle2
-(struct hw *db,
- cell_word external);
-
-void hw_handle_add_ihandle
-(struct hw *db,
- struct hw_instance *instance);
-
-void hw_handle_remove_ihandle
-(struct hw *db,
- struct hw_instance *instance);
-
-
-cell_word hw_handle_2phandle
-(struct hw *db,
- struct hw *hw);
-
-struct hw *hw_handle_phandle2
-(struct hw *db,
- cell_word external);
-
-void hw_handle_add_phandle
-(struct hw *db,
- struct hw *hw);
-
-void hw_handle_remove_phandle
-(struct hw *db,
- struct hw *hw);
-
-#endif
diff --git a/sim/common/hw-instances.c b/sim/common/hw-instances.c
deleted file mode 100644
index 22c1cd9e9a9..00000000000
--- a/sim/common/hw-instances.c
+++ /dev/null
@@ -1,286 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1998, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-#include "hw-main.h"
-#include "hw-base.h"
-
-#include "sim-io.h"
-#include "sim-assert.h"
-
-struct hw_instance_data {
- hw_finish_instance_method *to_finish;
- struct hw_instance *instances;
-};
-
-static hw_finish_instance_method abort_hw_finish_instance;
-
-void
-create_hw_instance_data (struct hw *me)
-{
- me->instances_of_hw = HW_ZALLOC (me, struct hw_instance_data);
- set_hw_finish_instance (me, abort_hw_finish_instance);
-}
-
-void
-delete_hw_instance_data (struct hw *me)
-{
- /* NOP */
-}
-
-
-static void
-abort_hw_finish_instance (struct hw *hw,
- struct hw_instance *instance)
-{
- hw_abort (hw, "no instance finish method");
-}
-
-void
-set_hw_finish_instance (struct hw *me,
- hw_finish_instance_method *finish)
-{
- me->instances_of_hw->to_finish = finish;
-}
-
-
-#if 0
-void
-clean_hw_instances (struct hw *me)
-{
- struct hw_instance **instance = &me->instances;
- while (*instance != NULL)
- {
- struct hw_instance *old_instance = *instance;
- hw_instance_delete (old_instance);
- instance = &me->instances;
- }
-}
-#endif
-
-
-void
-hw_instance_delete (struct hw_instance *instance)
-{
-#if 1
- hw_abort (hw_instance_hw (instance), "not implemented");
-#else
- struct hw *me = hw_instance_hw (instance);
- if (instance->to_instance_delete == NULL)
- hw_abort (me, "no delete method");
- instance->method->delete(instance);
- if (instance->args != NULL)
- zfree (instance->args);
- if (instance->path != NULL)
- zfree (instance->path);
- if (instance->child == NULL)
- {
- /* only remove leaf nodes */
- struct hw_instance **curr = &me->instances;
- while (*curr != instance)
- {
- ASSERT (*curr != NULL);
- curr = &(*curr)->next;
- }
- *curr = instance->next;
- }
- else
- {
- /* check it isn't in the instance list */
- struct hw_instance *curr = me->instances;
- while (curr != NULL)
- {
- ASSERT(curr != instance);
- curr = curr->next;
- }
- /* unlink the child */
- ASSERT (instance->child->parent == instance);
- instance->child->parent = NULL;
- }
- cap_remove (me->ihandles, instance);
- zfree (instance);
-#endif
-}
-
-
-static int
-panic_hw_instance_read (struct hw_instance *instance,
- void *addr,
- unsigned_word len)
-{
- hw_abort (hw_instance_hw (instance), "no read method");
- return -1;
-}
-
-
-
-static int
-panic_hw_instance_write (struct hw_instance *instance,
- const void *addr,
- unsigned_word len)
-{
- hw_abort (hw_instance_hw (instance), "no write method");
- return -1;
-}
-
-
-static int
-panic_hw_instance_seek (struct hw_instance *instance,
- unsigned_word pos_hi,
- unsigned_word pos_lo)
-{
- hw_abort (hw_instance_hw (instance), "no seek method");
- return -1;
-}
-
-
-int
-hw_instance_call_method (struct hw_instance *instance,
- const char *method_name,
- int n_stack_args,
- unsigned_cell stack_args[/*n_stack_args*/],
- int n_stack_returns,
- unsigned_cell stack_returns[/*n_stack_args*/])
-{
-#if 1
- hw_abort (hw_instance_hw (instance), "not implemented");
- return -1;
-#else
- struct hw *me = instance->owner;
- const hw_instance_methods *method = instance->method->methods;
- if (method == NULL)
- {
- hw_abort (me, "no methods (want %s)", method_name);
- }
- while (method->name != NULL)
- {
- if (strcmp(method->name, method_name) == 0)
- {
- return method->method (instance,
- n_stack_args, stack_args,
- n_stack_returns, stack_returns);
- }
- method++;
- }
- hw_abort (me, "no %s method", method_name);
- return 0;
-#endif
-}
-
-
-#define set_hw_instance_read(instance, method)\
-((instance)->to_instance_read = (method))
-
-#define set_hw_instance_write(instance, method)\
-((instance)->to_instance_write = (method))
-
-#define set_hw_instance_seek(instance, method)\
-((instance)->to_instance_seek = (method))
-
-
-#if 0
-static void
-set_hw_instance_finish (struct hw *me,
- hw_instance_finish_method *method)
-{
- if (me->instances_of_hw == NULL)
- me->instances_of_hw = HW_ZALLOC (me, struct hw_instance_data);
- me->instances_of_hw->to_finish = method;
-}
-#endif
-
-
-struct hw_instance *
-hw_instance_create (struct hw *me,
- struct hw_instance *parent,
- const char *path,
- const char *args)
-{
- struct hw_instance *instance = ZALLOC (struct hw_instance);
- /*instance->unit*/
- /* link this instance into the devices list */
- instance->hw_of_instance = me;
- instance->parent_of_instance = NULL;
- /* link this instance into the front of the devices instance list */
- instance->sibling_of_instance = me->instances_of_hw->instances;
- me->instances_of_hw->instances = instance;
- if (parent != NULL)
- {
- ASSERT (parent->child_of_instance == NULL);
- parent->child_of_instance = instance;
- instance->parent_of_instance = parent;
- }
- instance->args_of_instance = hw_strdup (me, args);
- instance->path_of_instance = hw_strdup (me, path);
- set_hw_instance_read (instance, panic_hw_instance_read);
- set_hw_instance_write (instance, panic_hw_instance_write);
- set_hw_instance_seek (instance, panic_hw_instance_seek);
- hw_handle_add_ihandle (me, instance);
- me->instances_of_hw->to_finish (me, instance);
- return instance;
-}
-
-
-struct hw_instance *
-hw_instance_interceed (struct hw_instance *parent,
- const char *path,
- const char *args)
-{
-#if 1
- return NULL;
-#else
- struct hw_instance *instance = ZALLOC (struct hw_instance);
- /*instance->unit*/
- /* link this instance into the devices list */
- if (me != NULL)
- {
- ASSERT (parent == NULL);
- instance->hw_of_instance = me;
- instance->parent_of_instance = NULL;
- /* link this instance into the front of the devices instance list */
- instance->sibling_of_instance = me->instances_of_hw->instances;
- me->instances_of_hw->instances = instance;
- }
- if (parent != NULL)
- {
- struct hw_instance **previous;
- ASSERT (parent->child_of_instance == NULL);
- parent->child_of_instance = instance;
- instance->owner = parent->owner;
- instance->parent_of_instance = parent;
- /* in the devices instance list replace the parent instance with
- this one */
- instance->next = parent->next;
- /* replace parent with this new node */
- previous = &instance->owner->instances;
- while (*previous != parent)
- {
- ASSERT (*previous != NULL);
- previous = &(*previous)->next;
- }
- *previous = instance;
- }
- instance->data = data;
- instance->args = (args == NULL ? NULL : (char *) strdup(args));
- instance->path = (path == NULL ? NULL : (char *) strdup(path));
- cap_add (instance->owner->ihandles, instance);
- return instance;
-#endif
-}
diff --git a/sim/common/hw-instances.h b/sim/common/hw-instances.h
deleted file mode 100644
index 6d27b114873..00000000000
--- a/sim/common/hw-instances.h
+++ /dev/null
@@ -1,157 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1998, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-#ifndef HW_INSTANCES_H
-#define HW_INSTANCES_H
-
-/* Instances:
-
- As with IEEE1275, a device can be opened, creating an instance.
- Instances provide more abstract interfaces to the underlying
- hardware. For example, the instance methods for a disk may include
- code that is able to interpret file systems found on disks. Such
- methods would there for allow the manipulation of files on the
- disks file system. The operations would be implemented using the
- basic block I/O model provided by the disk.
-
- This model includes methods that faciliate the creation of device
- instance and (should a given device support it) standard operations
- on those instances.
-
- */
-
-
-struct hw_instance;
-
-
-typedef void (hw_finish_instance_method)
- (struct hw *hw,
- struct hw_instance *);
-
-extern void set_hw_finish_instance
-(struct hw *hw,
- hw_finish_instance_method *method);
-
-
-/* construct an instance of the hardware */
-
-struct hw_instance *hw_instance_create
-(struct hw *hw,
- struct hw_instance *parent,
- const char *path,
- const char *args);
-
-struct hw_instance *hw_instance_interceed
-(struct hw_instance *parent,
- const char *path,
- const char *args);
-
-void hw_instance_delete
-(struct hw_instance *instance);
-
-
-/* methods applied to an instance of the hw */
-
-typedef int (hw_instance_read_method)
- (struct hw_instance *instance,
- void *addr,
- unsigned_cell len);
-
-#define hw_instance_read(instance, addr, len) \
-((instance)->to_instance_read ((instance), (addr), (len)))
-
-#define set_hw_instance_read(instance, method) \
-((instance)->to_instance_read = (method))
-
-
-typedef int (hw_instance_write_method)
- (struct hw_instance *instance,
- const void *addr,
- unsigned_cell len);
-
-#define hw_instance_write(instance, addr, len) \
-((instance)->to_instance_write ((instance), (addr), (len)))
-
-#define set_hw_instance_write(instance, method) \
-((instance)->to_instance_write = (method))
-
-
-typedef int (hw_instance_seek_method)
- (struct hw_instance *instance,
- unsigned_cell pos_hi,
- unsigned_cell pos_lo);
-
-#define hw_instance_seek(instance, pos_hi, pos_lo) \
-((instance)->to_instance_seek ((instance), (pos_hi), (pos_lo)));
-
-#define set_hw_instance_seek(instance, method) \
-((instance)->to_instance_seek = (method))
-
-
-int hw_instance_call_method
-(struct hw_instance *instance,
- const char *method,
- int n_stack_args,
- unsigned_cell stack_args[/*n_stack_args + 1(NULL)*/],
- int n_stack_returns,
- unsigned_cell stack_returns[/*n_stack_returns + 1(NULL)*/]);
-
-
-
-/* the definition of the instance */
-
-#define hw_instance_hw(instance) ((instance)->hw_of_instance + 0)
-
-#define hw_instance_path(instance) ((instance)->path_of_instance + 0)
-
-#define hw_instance_args(instance) ((instance)->args_of_instance)
-
-#define hw_instance_data(instance) ((instance)->data_of_instance)
-
-#define hw_instance_system(instance) (hw_system (hw_instance_hw (instance)))
-
-
-
-/* Finally an instance of a hardware device - keep your grubby little
- mits off of these internals! :-) */
-
-struct hw_instance {
-
- void *data_of_instance;
- char *args_of_instance;
- char *path_of_instance;
-
- /* the device that owns the instance */
- struct hw *hw_of_instance;
- struct hw_instance *sibling_of_instance;
-
- /* interposed instance */
- struct hw_instance *parent_of_instance;
- struct hw_instance *child_of_instance;
-
- /* methods */
- hw_instance_read_method *to_instance_read;
- hw_instance_write_method *to_instance_write;
- hw_instance_seek_method *to_instance_seek;
-
-};
-
-#endif
diff --git a/sim/common/hw-main.h b/sim/common/hw-main.h
deleted file mode 100644
index 3c086c19b98..00000000000
--- a/sim/common/hw-main.h
+++ /dev/null
@@ -1,73 +0,0 @@
-/* Common hardware header file.
- Copyright (C) 1998 Free Software Foundation, Inc.
- Contributed by Andrew Cagney and Cygnus Support.
-
-This file is part of GDB, the GNU debugger.
-
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License along
-with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
-
-
-#ifndef HW_MAIN
-#define HW_MAIN
-
-/* establish a type system */
-#include "sim-basics.h"
-
-/* construct a hw device */
-#include "hw-device.h"
-#include "hw-properties.h"
-#include "hw-events.h"
-#include "hw-alloc.h"
-#include "hw-instances.h"
-#include "hw-handles.h"
-#include "hw-ports.h"
-
-/* Description of a hardware device */
-
-typedef void (hw_finish_method)
- (struct hw *me);
-
-struct hw_descriptor {
- const char *family;
- hw_finish_method *to_finish;
-};
-
-/* Helper functions to make the implementation of a device easier */
-
-/* Go through the devices reg properties and look for those specifying
- an address to attach various registers to */
-
-void do_hw_attach_regs (struct hw *me);
-
-/* Perform a polling read on FD returning either the number of bytes
- or a hw_io status code that indicates the reason for the read
- failure */
-
-enum {
- HW_IO_EOF = -1, HW_IO_NOT_READY = -2, /* See: IEEE 1275 */
-};
-
-typedef int (do_hw_poll_read_method)
- (SIM_DESC sd, int, char *, int);
-
-int do_hw_poll_read
-(struct hw *me,
- do_hw_poll_read_method *read,
- int sim_io_fd,
- void *buf,
- unsigned size_of_buf);
-
-
-#endif
diff --git a/sim/common/hw-ports.c b/sim/common/hw-ports.c
deleted file mode 100644
index b7dc9850926..00000000000
--- a/sim/common/hw-ports.c
+++ /dev/null
@@ -1,339 +0,0 @@
-/* Hardware ports.
- Copyright (C) 1998 Free Software Foundation, Inc.
- Contributed by Andrew Cagney and Cygnus Solutions.
-
-This file is part of GDB, the GNU debugger.
-
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License along
-with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
-
-
-#include "hw-main.h"
-#include "hw-base.h"
-
-#ifdef HAVE_STDLIB_H
-#include <stdlib.h>
-#endif
-
-#ifdef HAVE_STRING_H
-#include <string.h>
-#else
-#ifdef HAVE_STRINGS_H
-#include <strings.h>
-#endif
-#endif
-
-#include <ctype.h>
-
-#define TRACE(x,y)
-
-
-struct hw_port_edge {
- int my_port;
- struct hw *dest;
- int dest_port;
- struct hw_port_edge *next;
- object_disposition disposition;
-};
-
-struct hw_port_data {
- hw_port_event_method *to_port_event;
- const struct hw_port_descriptor *ports;
- struct hw_port_edge *edges;
-};
-
-const struct hw_port_descriptor empty_hw_ports[] = {
- { NULL, },
-};
-
-static void
-panic_hw_port_event (struct hw *me,
- int my_port,
- struct hw *source,
- int source_port,
- int level)
-{
- hw_abort (me, "no port method");
-}
-
-void
-create_hw_port_data (struct hw *me)
-{
- me->ports_of_hw = HW_ZALLOC (me, struct hw_port_data);
- set_hw_port_event (me, panic_hw_port_event);
- set_hw_ports (me, empty_hw_ports);
-}
-
-void
-delete_hw_port_data (struct hw *me)
-{
- hw_free (me, me->ports_of_hw);
- me->ports_of_hw = NULL;
-}
-
-void
-set_hw_ports (struct hw *me,
- const struct hw_port_descriptor ports[])
-{
- me->ports_of_hw->ports = ports;
-}
-
-void
-set_hw_port_event (struct hw *me,
- hw_port_event_method *port_event)
-{
- me->ports_of_hw->to_port_event = port_event;
-}
-
-
-static void
-attach_hw_port_edge (struct hw *me,
- struct hw_port_edge **list,
- int my_port,
- struct hw *dest,
- int dest_port,
- object_disposition disposition)
-{
- struct hw_port_edge *new_edge = HW_ZALLOC (me, struct hw_port_edge);
- new_edge->my_port = my_port;
- new_edge->dest = dest;
- new_edge->dest_port = dest_port;
- new_edge->next = *list;
- new_edge->disposition = disposition;
- *list = new_edge;
-}
-
-
-static void
-detach_hw_port_edge (struct hw *me,
- struct hw_port_edge **list,
- int my_port,
- struct hw *dest,
- int dest_port)
-{
- while (*list != NULL)
- {
- struct hw_port_edge *old_edge = *list;
- if (old_edge->dest == dest
- && old_edge->dest_port == dest_port
- && old_edge->my_port == my_port)
- {
- if (old_edge->disposition == permenant_object)
- hw_abort (me, "attempt to delete permenant port edge");
- *list = old_edge->next;
- hw_free (me, old_edge);
- return;
- }
- }
- hw_abort (me, "attempt to delete unattached port");
-}
-
-
-#if 0
-static void
-clean_hw_port_edges (struct hw_port_edge **list)
-{
- while (*list != NULL)
- {
- struct hw_port_edge *old_edge = *list;
- switch (old_edge->disposition)
- {
- case permenant_object:
- list = &old_edge->next;
- break;
- case temporary_object:
- *list = old_edge->next;
- hw_free (me, old_edge);
- break;
- }
- }
-}
-#endif
-
-
-/* Ports: */
-
-void
-hw_port_event (struct hw *me,
- int my_port,
- int level)
-{
- int found_an_edge = 0;
- struct hw_port_edge *edge;
- /* device's lines directly connected */
- for (edge = me->ports_of_hw->edges;
- edge != NULL;
- edge = edge->next)
- {
- if (edge->my_port == my_port)
- {
- edge->dest->ports_of_hw->to_port_event (edge->dest,
- edge->dest_port,
- me,
- my_port,
- level);
- found_an_edge = 1;
- }
- }
- if (!found_an_edge)
- hw_abort (me, "No edge for port %d", my_port);
-}
-
-
-void
-hw_port_attach (struct hw *me,
- int my_port,
- struct hw *dest,
- int dest_port,
- object_disposition disposition)
-{
- attach_hw_port_edge (me,
- &me->ports_of_hw->edges,
- my_port,
- dest,
- dest_port,
- disposition);
-}
-
-
-void
-hw_port_detach (struct hw *me,
- int my_port,
- struct hw *dest,
- int dest_port)
-{
- detach_hw_port_edge (me,
- &me->ports_of_hw->edges,
- my_port,
- dest,
- dest_port);
-}
-
-
-void
-hw_port_traverse (struct hw *me,
- hw_port_traverse_function *handler,
- void *data)
-{
- struct hw_port_edge *port_edge;
- for (port_edge = me->ports_of_hw->edges;
- port_edge != NULL;
- port_edge = port_edge->next)
- {
- handler (me, port_edge->my_port,
- port_edge->dest, port_edge->dest_port,
- data);
- }
-}
-
-
-int
-hw_port_decode (struct hw *me,
- const char *port_name,
- port_direction direction)
-{
- if (port_name == NULL || port_name[0] == '\0')
- return 0;
- if (isdigit(port_name[0]))
- {
- return strtoul (port_name, NULL, 0);
- }
- else
- {
- const struct hw_port_descriptor *ports =
- me->ports_of_hw->ports;
- if (ports != NULL)
- {
- while (ports->name != NULL)
- {
- if (ports->direction == bidirect_port
- || ports->direction == direction)
- {
- if (ports->nr_ports > 0)
- {
- int len = strlen (ports->name);
- if (strncmp (port_name, ports->name, len) == 0)
- {
- if (port_name[len] == '\0')
- return ports->number;
- else if(isdigit (port_name[len]))
- {
- int port = (ports->number
- + strtoul (&port_name[len], NULL, 0));
- if (port >= ports->number + ports->nr_ports)
- hw_abort (me,
- "Port %s out of range",
- port_name);
- return port;
- }
- }
- }
- else if (strcmp (port_name, ports->name) == 0)
- return ports->number;
- }
- ports++;
- }
- }
- }
- hw_abort (me, "Unreconized port %s", port_name);
- return 0;
-}
-
-
-int
-hw_port_encode (struct hw *me,
- int port_number,
- char *buf,
- int sizeof_buf,
- port_direction direction)
-{
- const struct hw_port_descriptor *ports = NULL;
- ports = me->ports_of_hw->ports;
- if (ports != NULL) {
- while (ports->name != NULL)
- {
- if (ports->direction == bidirect_port
- || ports->direction == direction)
- {
- if (ports->nr_ports > 0)
- {
- if (port_number >= ports->number
- && port_number < ports->number + ports->nr_ports)
- {
- strcpy (buf, ports->name);
- sprintf (buf + strlen(buf), "%d", port_number - ports->number);
- if (strlen (buf) >= sizeof_buf)
- hw_abort (me, "hw_port_encode: buffer overflow");
- return strlen (buf);
- }
- }
- else
- {
- if (ports->number == port_number)
- {
- if (strlen(ports->name) >= sizeof_buf)
- hw_abort (me, "hw_port_encode: buffer overflow");
- strcpy(buf, ports->name);
- return strlen(buf);
- }
- }
- }
- ports++;
- }
- }
- sprintf (buf, "%d", port_number);
- if (strlen(buf) >= sizeof_buf)
- hw_abort (me, "hw_port_encode: buffer overflow");
- return strlen(buf);
-}
diff --git a/sim/common/hw-ports.h b/sim/common/hw-ports.h
deleted file mode 100644
index 566895a2f4a..00000000000
--- a/sim/common/hw-ports.h
+++ /dev/null
@@ -1,129 +0,0 @@
-/* Hardware ports.
- Copyright (C) 1998 Free Software Foundation, Inc.
- Contributed by Andrew Cagney and Cygnus Solutions.
-
-This file is part of GDB, the GNU debugger.
-
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License along
-with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
-
-
-#ifndef HW_PORTS_H
-#define HW_PORTS_H
-
-/* Initialize a port */
-
-struct hw_port_descriptor {
- const char *name;
- int number;
- int nr_ports;
- port_direction direction;
-};
-
-void set_hw_ports (struct hw *hw, const struct hw_port_descriptor ports[]);
-
-typedef void (hw_port_event_method)
- (struct hw *me,
- int my_port,
- struct hw *source,
- int source_port,
- int level);
-
-void set_hw_port_event (struct hw *hw, hw_port_event_method *to_port_event);
-
-
-/* Port source
-
- A device drives its output ports using the call
-
- */
-
-void hw_port_event
-(struct hw *me,
- int my_port,
- int value);
-
-/* This port event will then be propogated to any attached
- destination ports.
-
- Any interpretation of PORT and VALUE is model dependant. As a
- guideline the following are recommended: PCI interrupts A-D should
- correspond to ports 0-3; level sensative interrupts be requested
- with a value of one and withdrawn with a value of 0; edge sensative
- interrupts always have a value of 1, the event its self is treated
- as the interrupt.
-
-
- Port destinations
-
- Attached to each port of a device can be zero or more
- desitinations. These destinations consist of a device/port pair.
- A destination is attached/detached to a device line using the
- attach and detach calls. */
-
-void hw_port_attach
-(struct hw *me,
- int my_port,
- struct hw *dest,
- int dest_port,
- object_disposition disposition);
-
-void hw_port_detach
-(struct hw *me,
- int my_port,
- struct hw *dest,
- int dest_port);
-
-
-/* Iterate over the list of ports attached to a device */
-
-typedef void (hw_port_traverse_function)
- (struct hw *me,
- int my_port,
- struct hw *dest,
- int dest_port,
- void *data);
-
-void hw_port_traverse
-(struct hw *me,
- hw_port_traverse_function *handler,
- void *data);
-
-
-/* DESTINATION is attached (detached) to LINE of the device ME
-
-
- Port conversion
-
- Users refer to port numbers symbolically. For instance a device
- may refer to its `INT' signal which is internally represented by
- port 3.
-
- To convert to/from the symbolic and internal representation of a
- port name/number. The following functions are available. */
-
-int hw_port_decode
-(struct hw *me,
- const char *symbolic_name,
- port_direction direction);
-
-int hw_port_encode
-(struct hw *me,
- int port_number,
- char *buf,
- int sizeof_buf,
- port_direction direction);
-
-
-#endif
diff --git a/sim/common/hw-properties.c b/sim/common/hw-properties.c
deleted file mode 100644
index 5a4d76dbf1d..00000000000
--- a/sim/common/hw-properties.c
+++ /dev/null
@@ -1,906 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1998, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-#include "hw-main.h"
-#include "hw-base.h"
-
-#include "sim-io.h"
-#include "sim-assert.h"
-
-#ifdef HAVE_STRING_H
-#include <string.h>
-#else
-#ifdef HAVE_STRINGS_H
-#include <strings.h>
-#endif
-#endif
-
-#define TRACE(A,B)
-
-/* property entries */
-
-struct hw_property_data {
- struct hw_property_data *next;
- struct hw_property *property;
- const void *init_array;
- unsigned sizeof_init_array;
-};
-
-void
-create_hw_property_data (struct hw *me)
-{
-}
-
-void
-delete_hw_property_data (struct hw *me)
-{
-}
-
-
-/* Device Properties: */
-
-static struct hw_property_data *
-find_property_data (struct hw *me,
- const char *property)
-{
- struct hw_property_data *entry;
- ASSERT (property != NULL);
- entry = me->properties_of_hw;
- while (entry != NULL)
- {
- if (strcmp (entry->property->name, property) == 0)
- return entry;
- entry = entry->next;
- }
- return NULL;
-}
-
-
-static void
-hw_add_property (struct hw *me,
- const char *property,
- hw_property_type type,
- const void *init_array,
- unsigned sizeof_init_array,
- const void *array,
- unsigned sizeof_array,
- const struct hw_property *original,
- object_disposition disposition)
-{
- struct hw_property_data *new_entry = NULL;
- struct hw_property *new_value = NULL;
-
- /* find the list end */
- struct hw_property_data **insertion_point = &me->properties_of_hw;
- while (*insertion_point != NULL)
- {
- if (strcmp ((*insertion_point)->property->name, property) == 0)
- return;
- insertion_point = &(*insertion_point)->next;
- }
-
- /* create a new value */
- new_value = HW_ZALLOC (me, struct hw_property);
- new_value->name = (char *) strdup (property);
- new_value->type = type;
- if (sizeof_array > 0)
- {
- void *new_array = hw_zalloc (me, sizeof_array);
- memcpy (new_array, array, sizeof_array);
- new_value->array = new_array;
- new_value->sizeof_array = sizeof_array;
- }
- new_value->owner = me;
- new_value->original = original;
- new_value->disposition = disposition;
-
- /* insert the value into the list */
- new_entry = HW_ZALLOC (me, struct hw_property_data);
- *insertion_point = new_entry;
- if (sizeof_init_array > 0)
- {
- void *new_init_array = hw_zalloc (me, sizeof_init_array);
- memcpy (new_init_array, init_array, sizeof_init_array);
- new_entry->init_array = new_init_array;
- new_entry->sizeof_init_array = sizeof_init_array;
- }
- new_entry->property = new_value;
-}
-
-
-static void
-hw_set_property (struct hw *me,
- const char *property,
- hw_property_type type,
- const void *array,
- int sizeof_array)
-{
- /* find the property */
- struct hw_property_data *entry = find_property_data (me, property);
- if (entry != NULL)
- {
- /* existing property - update it */
- void *new_array = 0;
- struct hw_property *value = entry->property;
- /* check the type matches */
- if (value->type != type)
- hw_abort (me, "conflict between type of new and old value for property %s", property);
- /* replace its value */
- if (value->array != NULL)
- hw_free (me, (void*)value->array);
- new_array = (sizeof_array > 0
- ? hw_zalloc (me, sizeof_array)
- : (void*)0);
- value->array = new_array;
- value->sizeof_array = sizeof_array;
- if (sizeof_array > 0)
- memcpy (new_array, array, sizeof_array);
- return;
- }
- else
- {
- /* new property - create it */
- hw_add_property (me, property, type,
- NULL, 0, array, sizeof_array,
- NULL, temporary_object);
- }
-}
-
-
-#if 0
-static void
-clean_hw_properties (struct hw *me)
-{
- struct hw_property_data **delete_point = &me->properties_of_hw;
- while (*delete_point != NULL)
- {
- struct hw_property_data *current = *delete_point;
- switch (current->property->disposition)
- {
- case permenant_object:
- /* zap the current value, will be initialized later */
- ASSERT (current->init_array != NULL);
- if (current->property->array != NULL)
- {
- hw_free (me, (void*)current->property->array);
- current->property->array = NULL;
- }
- delete_point = &(*delete_point)->next;
- break;
- case temporary_object:
- /* zap the actual property, was created during simulation run */
- ASSERT (current->init_array == NULL);
- *delete_point = current->next;
- if (current->property->array != NULL)
- hw_free (me, (void*)current->property->array);
- hw_free (me, current->property);
- hw_free (me, current);
- break;
- }
- }
-}
-#endif
-
-#if 0
-void
-hw_init_static_properties (SIM_DESC sd,
- struct hw *me,
- void *data)
-{
- struct hw_property_data *property;
- for (property = me->properties_of_hw;
- property != NULL;
- property = property->next)
- {
- ASSERT (property->init_array != NULL);
- ASSERT (property->property->array == NULL);
- ASSERT(property->property->disposition == permenant_object);
- switch (property->property->type)
- {
- case array_property:
- case boolean_property:
- case range_array_property:
- case reg_array_property:
- case string_property:
- case string_array_property:
- case integer_property:
- /* delete the property, and replace it with the original */
- hw_set_property (me, property->property->name,
- property->property->type,
- property->init_array,
- property->sizeof_init_array);
- break;
-#if 0
- case ihandle_property:
- break;
-#endif
- }
- }
-}
-#endif
-
-
-#if 0
-void
-hw_init_runtime_properties (SIM_DESC sd,
- struct hw *me,
- void *data)
-{
- struct hw_property_data *property;
- for (property = me->properties_of_hw;
- property != NULL;
- property = property->next)
- {
- switch (property->property->disposition)
- {
- case permenant_object:
- switch (property->property->type)
- {
-#if 0
- case ihandle_property:
- {
- struct hw_instance *ihandle;
- ihandle_runtime_property_spec spec;
- ASSERT (property->init_array != NULL);
- ASSERT (property->property->array == NULL);
- hw_find_ihandle_runtime_property (me, property->property->name, &spec);
- ihandle = tree_instance (me, spec.full_path);
- hw_set_ihandle_property (me, property->property->name, ihandle);
- break;
- }
-#endif
- case array_property:
- case boolean_property:
- case range_array_property:
- case integer_property:
- case reg_array_property:
- case string_property:
- case string_array_property:
- ASSERT (property->init_array != NULL);
- ASSERT (property->property->array != NULL);
- break;
- }
- break;
- case temporary_object:
- ASSERT (property->init_array == NULL);
- ASSERT (property->property->array != NULL);
- break;
- }
- }
-}
-#endif
-
-
-
-const struct hw_property *
-hw_next_property (const struct hw_property *property)
-{
- /* find the property in the list */
- struct hw *owner = property->owner;
- struct hw_property_data *entry = owner->properties_of_hw;
- while (entry != NULL && entry->property != property)
- entry = entry->next;
- /* now return the following property */
- ASSERT (entry != NULL); /* must be a member! */
- if (entry->next != NULL)
- return entry->next->property;
- else
- return NULL;
-}
-
-
-const struct hw_property *
-hw_find_property (struct hw *me,
- const char *property)
-{
- if (me == NULL)
- {
- return NULL;
- }
- else if (property == NULL || strcmp (property, "") == 0)
- {
- if (me->properties_of_hw == NULL)
- return NULL;
- else
- return me->properties_of_hw->property;
- }
- else
- {
- struct hw_property_data *entry = find_property_data (me, property);
- if (entry != NULL)
- return entry->property;
- }
- return NULL;
-}
-
-
-void
-hw_add_array_property (struct hw *me,
- const char *property,
- const void *array,
- int sizeof_array)
-{
- hw_add_property (me, property, array_property,
- array, sizeof_array, array, sizeof_array,
- NULL, permenant_object);
-}
-
-void
-hw_set_array_property (struct hw *me,
- const char *property,
- const void *array,
- int sizeof_array)
-{
- hw_set_property (me, property, array_property, array, sizeof_array);
-}
-
-const struct hw_property *
-hw_find_array_property (struct hw *me,
- const char *property)
-{
- const struct hw_property *node;
- node = hw_find_property (me, property);
- if (node == NULL)
- hw_abort (me, "property \"%s\" not found", property);
- if (node->type != array_property)
- hw_abort (me, "property \"%s\" of wrong type (array)", property);
- return node;
-}
-
-
-
-void
-hw_add_boolean_property (struct hw *me,
- const char *property,
- int boolean)
-{
- signed32 new_boolean = (boolean ? -1 : 0);
- hw_add_property (me, property, boolean_property,
- &new_boolean, sizeof(new_boolean),
- &new_boolean, sizeof(new_boolean),
- NULL, permenant_object);
-}
-
-int
-hw_find_boolean_property (struct hw *me,
- const char *property)
-{
- const struct hw_property *node;
- unsigned_cell boolean;
- node = hw_find_property (me, property);
- if (node == NULL)
- hw_abort (me, "property \"%s\" not found", property);
- if (node->type != boolean_property)
- hw_abort (me, "property \"%s\" of wrong type (boolean)", property);
- ASSERT (sizeof (boolean) == node->sizeof_array);
- memcpy (&boolean, node->array, sizeof (boolean));
- return boolean;
-}
-
-
-
-#if 0
-void
-hw_add_ihandle_runtime_property (struct hw *me,
- const char *property,
- const ihandle_runtime_property_spec *ihandle)
-{
- /* enter the full path as the init array */
- hw_add_property (me, property, ihandle_property,
- ihandle->full_path, strlen(ihandle->full_path) + 1,
- NULL, 0,
- NULL, permenant_object);
-}
-#endif
-
-#if 0
-void
-hw_find_ihandle_runtime_property (struct hw *me,
- const char *property,
- ihandle_runtime_property_spec *ihandle)
-{
- struct hw_property_data *entry = find_property_data (me, property);
- TRACE (trace_devices,
- ("hw_find_ihandle_runtime_property(me=0x%lx, property=%s)\n",
- (long)me, property));
- if (entry == NULL)
- hw_abort (me, "property \"%s\" not found", property);
- if (entry->property->type != ihandle_property
- || entry->property->disposition != permenant_object)
- hw_abort (me, "property \"%s\" of wrong type", property);
- ASSERT (entry->init_array != NULL);
- /* the full path */
- ihandle->full_path = entry->init_array;
-}
-#endif
-
-
-
-#if 0
-void
-hw_set_ihandle_property (struct hw *me,
- const char *property,
- hw_instance *ihandle)
-{
- unsigned_cell cells;
- cells = H2BE_cell (hw_instance_to_external (ihandle));
- hw_set_property (me, property, ihandle_property,
- &cells, sizeof (cells));
-
-}
-#endif
-
-#if 0
-hw_instance *
-hw_find_ihandle_property (struct hw *me,
- const char *property)
-{
- const hw_property_data *node;
- unsigned_cell ihandle;
- hw_instance *instance;
-
- node = hw_find_property (me, property);
- if (node == NULL)
- hw_abort (me, "property \"%s\" not found", property);
- if (node->type != ihandle_property)
- hw_abort(me, "property \"%s\" of wrong type (ihandle)", property);
- if (node->array == NULL)
- hw_abort(me, "runtime property \"%s\" not yet initialized", property);
-
- ASSERT (sizeof(ihandle) == node->sizeof_array);
- memcpy (&ihandle, node->array, sizeof(ihandle));
- instance = external_to_hw_instance (me, BE2H_cell(ihandle));
- ASSERT (instance != NULL);
- return instance;
-}
-#endif
-
-
-void
-hw_add_integer_property (struct hw *me,
- const char *property,
- signed_cell integer)
-{
- H2BE (integer);
- hw_add_property (me, property, integer_property,
- &integer, sizeof(integer),
- &integer, sizeof(integer),
- NULL, permenant_object);
-}
-
-signed_cell
-hw_find_integer_property (struct hw *me,
- const char *property)
-{
- const struct hw_property *node;
- signed_cell integer;
- TRACE (trace_devices,
- ("hw_find_integer(me=0x%lx, property=%s)\n",
- (long)me, property));
- node = hw_find_property (me, property);
- if (node == NULL)
- hw_abort (me, "property \"%s\" not found", property);
- if (node->type != integer_property)
- hw_abort (me, "property \"%s\" of wrong type (integer)", property);
- ASSERT (sizeof(integer) == node->sizeof_array);
- memcpy (&integer, node->array, sizeof (integer));
- return BE2H_cell (integer);
-}
-
-int
-hw_find_integer_array_property (struct hw *me,
- const char *property,
- unsigned index,
- signed_cell *integer)
-{
- const struct hw_property *node;
- int sizeof_integer = sizeof (*integer);
- signed_cell *cell;
- TRACE (trace_devices,
- ("hw_find_integer(me=0x%lx, property=%s)\n",
- (long)me, property));
-
- /* check things sane */
- node = hw_find_property (me, property);
- if (node == NULL)
- hw_abort (me, "property \"%s\" not found", property);
- if (node->type != integer_property
- && node->type != array_property)
- hw_abort (me, "property \"%s\" of wrong type (integer or array)", property);
- if ((node->sizeof_array % sizeof_integer) != 0)
- hw_abort (me, "property \"%s\" contains an incomplete number of cells", property);
- if (node->sizeof_array <= sizeof_integer * index)
- return 0;
-
- /* Find and convert the value */
- cell = ((signed_cell*)node->array) + index;
- *integer = BE2H_cell (*cell);
-
- return node->sizeof_array / sizeof_integer;
-}
-
-
-static unsigned_cell *
-unit_address_to_cells (const hw_unit *unit,
- unsigned_cell *cell,
- int nr_cells)
-{
- int i;
- ASSERT(nr_cells == unit->nr_cells);
- for (i = 0; i < unit->nr_cells; i++)
- {
- *cell = H2BE_cell (unit->cells[i]);
- cell += 1;
- }
- return cell;
-}
-
-
-static const unsigned_cell *
-cells_to_unit_address (const unsigned_cell *cell,
- hw_unit *unit,
- int nr_cells)
-{
- int i;
- memset(unit, 0, sizeof(*unit));
- unit->nr_cells = nr_cells;
- for (i = 0; i < unit->nr_cells; i++)
- {
- unit->cells[i] = BE2H_cell (*cell);
- cell += 1;
- }
- return cell;
-}
-
-
-static unsigned
-nr_range_property_cells (struct hw *me,
- int nr_ranges)
-{
- return ((hw_unit_nr_address_cells (me)
- + hw_unit_nr_address_cells (hw_parent (me))
- + hw_unit_nr_size_cells (me))
- ) * nr_ranges;
-}
-
-void
-hw_add_range_array_property (struct hw *me,
- const char *property,
- const range_property_spec *ranges,
- unsigned nr_ranges)
-{
- unsigned sizeof_cells = (nr_range_property_cells (me, nr_ranges)
- * sizeof (unsigned_cell));
- unsigned_cell *cells = hw_zalloc (me, sizeof_cells);
- unsigned_cell *cell;
- int i;
-
- /* copy the property elements over */
- cell = cells;
- for (i = 0; i < nr_ranges; i++)
- {
- const range_property_spec *range = &ranges[i];
- /* copy the child address */
- cell = unit_address_to_cells (&range->child_address, cell,
- hw_unit_nr_address_cells (me));
- /* copy the parent address */
- cell = unit_address_to_cells (&range->parent_address, cell,
- hw_unit_nr_address_cells (hw_parent (me)));
- /* copy the size */
- cell = unit_address_to_cells (&range->size, cell,
- hw_unit_nr_size_cells (me));
- }
- ASSERT (cell == &cells[nr_range_property_cells (me, nr_ranges)]);
-
- /* add it */
- hw_add_property (me, property, range_array_property,
- cells, sizeof_cells,
- cells, sizeof_cells,
- NULL, permenant_object);
-
- hw_free (me, cells);
-}
-
-int
-hw_find_range_array_property (struct hw *me,
- const char *property,
- unsigned index,
- range_property_spec *range)
-{
- const struct hw_property *node;
- unsigned sizeof_entry = (nr_range_property_cells (me, 1)
- * sizeof (unsigned_cell));
- const unsigned_cell *cells;
-
- /* locate the property */
- node = hw_find_property (me, property);
- if (node == NULL)
- hw_abort (me, "property \"%s\" not found", property);
- if (node->type != range_array_property)
- hw_abort (me, "property \"%s\" of wrong type (range array)", property);
-
- /* aligned ? */
- if ((node->sizeof_array % sizeof_entry) != 0)
- hw_abort (me, "property \"%s\" contains an incomplete number of entries",
- property);
-
- /* within bounds? */
- if (node->sizeof_array < sizeof_entry * (index + 1))
- return 0;
-
- /* find the range of interest */
- cells = (unsigned_cell*)((char*)node->array + sizeof_entry * index);
-
- /* copy the child address out - converting as we go */
- cells = cells_to_unit_address (cells, &range->child_address,
- hw_unit_nr_address_cells (me));
-
- /* copy the parent address out - converting as we go */
- cells = cells_to_unit_address (cells, &range->parent_address,
- hw_unit_nr_address_cells (hw_parent (me)));
-
- /* copy the size - converting as we go */
- cells = cells_to_unit_address (cells, &range->size,
- hw_unit_nr_size_cells (me));
-
- return node->sizeof_array / sizeof_entry;
-}
-
-
-static unsigned
-nr_reg_property_cells (struct hw *me,
- int nr_regs)
-{
- return (hw_unit_nr_address_cells (hw_parent(me))
- + hw_unit_nr_size_cells (hw_parent(me))
- ) * nr_regs;
-}
-
-void
-hw_add_reg_array_property (struct hw *me,
- const char *property,
- const reg_property_spec *regs,
- unsigned nr_regs)
-{
- unsigned sizeof_cells = (nr_reg_property_cells (me, nr_regs)
- * sizeof (unsigned_cell));
- unsigned_cell *cells = hw_zalloc (me, sizeof_cells);
- unsigned_cell *cell;
- int i;
-
- /* copy the property elements over */
- cell = cells;
- for (i = 0; i < nr_regs; i++)
- {
- const reg_property_spec *reg = &regs[i];
- /* copy the address */
- cell = unit_address_to_cells (&reg->address, cell,
- hw_unit_nr_address_cells (hw_parent (me)));
- /* copy the size */
- cell = unit_address_to_cells (&reg->size, cell,
- hw_unit_nr_size_cells (hw_parent (me)));
- }
- ASSERT (cell == &cells[nr_reg_property_cells (me, nr_regs)]);
-
- /* add it */
- hw_add_property (me, property, reg_array_property,
- cells, sizeof_cells,
- cells, sizeof_cells,
- NULL, permenant_object);
-
- hw_free (me, cells);
-}
-
-int
-hw_find_reg_array_property (struct hw *me,
- const char *property,
- unsigned index,
- reg_property_spec *reg)
-{
- const struct hw_property *node;
- unsigned sizeof_entry = (nr_reg_property_cells (me, 1)
- * sizeof (unsigned_cell));
- const unsigned_cell *cells;
-
- /* locate the property */
- node = hw_find_property (me, property);
- if (node == NULL)
- hw_abort (me, "property \"%s\" not found", property);
- if (node->type != reg_array_property)
- hw_abort (me, "property \"%s\" of wrong type (reg array)", property);
-
- /* aligned ? */
- if ((node->sizeof_array % sizeof_entry) != 0)
- hw_abort (me, "property \"%s\" contains an incomplete number of entries",
- property);
-
- /* within bounds? */
- if (node->sizeof_array < sizeof_entry * (index + 1))
- return 0;
-
- /* find the range of interest */
- cells = (unsigned_cell*)((char*)node->array + sizeof_entry * index);
-
- /* copy the address out - converting as we go */
- cells = cells_to_unit_address (cells, &reg->address,
- hw_unit_nr_address_cells (hw_parent (me)));
-
- /* copy the size out - converting as we go */
- cells = cells_to_unit_address (cells, &reg->size,
- hw_unit_nr_size_cells (hw_parent (me)));
-
- return node->sizeof_array / sizeof_entry;
-}
-
-
-void
-hw_add_string_property (struct hw *me,
- const char *property,
- const char *string)
-{
- hw_add_property (me, property, string_property,
- string, strlen(string) + 1,
- string, strlen(string) + 1,
- NULL, permenant_object);
-}
-
-const char *
-hw_find_string_property (struct hw *me,
- const char *property)
-{
- const struct hw_property *node;
- const char *string;
- node = hw_find_property (me, property);
- if (node == NULL)
- hw_abort (me, "property \"%s\" not found", property);
- if (node->type != string_property)
- hw_abort (me, "property \"%s\" of wrong type (string)", property);
- string = node->array;
- ASSERT (strlen(string) + 1 == node->sizeof_array);
- return string;
-}
-
-void
-hw_add_string_array_property (struct hw *me,
- const char *property,
- const string_property_spec *strings,
- unsigned nr_strings)
-{
- int sizeof_array;
- int string_nr;
- char *array;
- char *chp;
- if (nr_strings == 0)
- hw_abort (me, "property \"%s\" must be non-null", property);
- /* total up the size of the needed array */
- for (sizeof_array = 0, string_nr = 0;
- string_nr < nr_strings;
- string_nr ++)
- {
- sizeof_array += strlen (strings[string_nr]) + 1;
- }
- /* create the array */
- array = (char*) hw_zalloc (me, sizeof_array);
- chp = array;
- for (string_nr = 0;
- string_nr < nr_strings;
- string_nr++)
- {
- strcpy (chp, strings[string_nr]);
- chp += strlen (chp) + 1;
- }
- ASSERT (chp == array + sizeof_array);
- /* now enter it */
- hw_add_property (me, property, string_array_property,
- array, sizeof_array,
- array, sizeof_array,
- NULL, permenant_object);
-}
-
-int
-hw_find_string_array_property (struct hw *me,
- const char *property,
- unsigned index,
- string_property_spec *string)
-{
- const struct hw_property *node;
- node = hw_find_property (me, property);
- if (node == NULL)
- hw_abort (me, "property \"%s\" not found", property);
- switch (node->type)
- {
- default:
- hw_abort (me, "property \"%s\" of wrong type", property);
- break;
- case string_property:
- if (index == 0)
- {
- *string = node->array;
- ASSERT (strlen(*string) + 1 == node->sizeof_array);
- return 1;
- }
- break;
- case array_property:
- if (node->sizeof_array == 0
- || ((char*)node->array)[node->sizeof_array - 1] != '\0')
- hw_abort (me, "property \"%s\" invalid for string array", property);
- /* FALL THROUGH */
- case string_array_property:
- ASSERT (node->sizeof_array > 0);
- ASSERT (((char*)node->array)[node->sizeof_array - 1] == '\0');
- {
- const char *chp = node->array;
- int nr_entries = 0;
- /* count the number of strings, keeping an eye out for the one
- we're looking for */
- *string = chp;
- do
- {
- if (*chp == '\0')
- {
- /* next string */
- nr_entries++;
- chp++;
- if (nr_entries == index)
- *string = chp;
- }
- else
- {
- chp++;
- }
- } while (chp < (char*)node->array + node->sizeof_array);
- if (index < nr_entries)
- return nr_entries;
- else
- {
- *string = NULL;
- return 0;
- }
- }
- break;
- }
- return 0;
-}
-
-void
-hw_add_duplicate_property (struct hw *me,
- const char *property,
- const struct hw_property *original)
-{
- struct hw_property_data *master;
- TRACE (trace_devices,
- ("hw_add_duplicate_property(me=0x%lx, property=%s, ...)\n",
- (long)me, property));
- if (original->disposition != permenant_object)
- hw_abort (me, "Can only duplicate permenant objects");
- /* find the original's master */
- master = original->owner->properties_of_hw;
- while (master->property != original)
- {
- master = master->next;
- ASSERT(master != NULL);
- }
- /* now duplicate it */
- hw_add_property (me, property,
- original->type,
- master->init_array, master->sizeof_init_array,
- original->array, original->sizeof_array,
- original, permenant_object);
-}
diff --git a/sim/common/hw-properties.h b/sim/common/hw-properties.h
deleted file mode 100644
index 198878fb06b..00000000000
--- a/sim/common/hw-properties.h
+++ /dev/null
@@ -1,244 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1998, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-#ifndef HW_PROPERTIES_H
-#define HW_PROPERTIES_H
-
-/* The following are valid property types. The property `array' is
- for generic untyped data. */
-
-typedef enum {
- array_property,
- boolean_property,
-#if 0
- ihandle_property, /*runtime*/
-#endif
- integer_property,
- range_array_property,
- reg_array_property,
- string_property,
- string_array_property,
-} hw_property_type;
-
-struct hw_property {
- struct hw *owner;
- const char *name;
- hw_property_type type;
- unsigned sizeof_array;
- const void *array;
- const struct hw_property *original;
- object_disposition disposition;
-};
-
-#define hw_property_owner(p) ((p)->owner + 0)
-#define hw_property_name(p) ((p)->name + 0)
-#define hw_property_type(p) ((p)->type + 0)
-#define hw_property_array(p) ((p)->array + 0)
-#define hw_property_sizeof_array(p) ((p)->sizeof_array + 0)
-#define hw_property_original(p) ((p)->original + 0)
-#define hw_property_disposition(p) ((p)->disposition + 0)
-
-
-/* Find/iterate over properites attached to a device.
-
- To iterate over all properties attached to a device, call
- hw_find_property (.., NULL) and then hw_property_next. */
-
-const struct hw_property *hw_find_property
-(struct hw *me,
- const char *property);
-
-const struct hw_property *hw_next_property
-(const struct hw_property *previous);
-
-
-/* Manipulate the properties belonging to a given device.
-
- HW_ADD_* will, if the property is not already present, add a
- property to the device. Adding a property to a device after it has
- been created is a checked run-time error (use HW_SET_*).
-
- HW_SET_* will always update (or create) the property so that it has
- the specified value. Changing the type of a property is a checked
- run-time error.
-
- FIND returns the specified properties value. It is a checked
- runtime error to either request a nonexistant property or to
- request a property using the wrong type. Code locating a property
- should first check its type (using hw_find_property above) and then
- obtain its value using the below.
-
- Naming convention:
-
- void hw_add_<type>_property(struct hw *, const char *, <type>)
- void hw_add_*_array_property(struct hw *, const char *, const <type>*, int)
- void hw_set_*_property(struct hw *, const char *, <type>)
- void hw_set_*_array_property(struct hw *, const char *, const <type>*, int)
- <type> hw_find_*_property(struct hw *, const char *)
- int hw_find_*_array_property(struct hw *, const char *, int, <type>*)
-
- */
-
-
-void hw_add_array_property
-(struct hw *me,
- const char *property,
- const void *array,
- int sizeof_array);
-
-void hw_set_array_property
-(struct hw *me,
- const char *property,
- const void *array,
- int sizeof_array);
-
-const struct hw_property *hw_find_array_property
-(struct hw *me,
- const char *property);
-
-
-
-void hw_add_boolean_property
-(struct hw *me,
- const char *property,
- int bool);
-
-int hw_find_boolean_property
-(struct hw *me,
- const char *property);
-
-
-
-#if 0
-typedef struct _ihandle_runtime_property_spec {
- const char *full_path;
-} ihandle_runtime_property_spec;
-
-void hw_add_ihandle_runtime_property
-(struct hw *me,
- const char *property,
- const ihandle_runtime_property_spec *ihandle);
-
-void hw_find_ihandle_runtime_property
-(struct hw *me,
- const char *property,
- ihandle_runtime_property_spec *ihandle);
-
-void hw_set_ihandle_property
-(struct hw *me,
- const char *property,
- hw_instance *ihandle);
-
-hw_instance * hw_find_ihandle_property
-(struct hw *me,
- const char *property);
-#endif
-
-
-void hw_add_integer_property
-(struct hw *me,
- const char *property,
- signed_cell integer);
-
-signed_cell hw_find_integer_property
-(struct hw *me,
- const char *property);
-
-int hw_find_integer_array_property
-(struct hw *me,
- const char *property,
- unsigned index,
- signed_cell *integer);
-
-
-
-typedef struct _range_property_spec {
- hw_unit child_address;
- hw_unit parent_address;
- hw_unit size;
-} range_property_spec;
-
-void hw_add_range_array_property
-(struct hw *me,
- const char *property,
- const range_property_spec *ranges,
- unsigned nr_ranges);
-
-int hw_find_range_array_property
-(struct hw *me,
- const char *property,
- unsigned index,
- range_property_spec *range);
-
-
-
-typedef struct _reg_property_spec {
- hw_unit address;
- hw_unit size;
-} reg_property_spec;
-
-void hw_add_reg_array_property
-(struct hw *me,
- const char *property,
- const reg_property_spec *reg,
- unsigned nr_regs);
-
-int hw_find_reg_array_property
-(struct hw *me,
- const char *property,
- unsigned index,
- reg_property_spec *reg);
-
-
-
-void hw_add_string_property
-(struct hw *me,
- const char *property,
- const char *string);
-
-const char *hw_find_string_property
-(struct hw *me,
- const char *property);
-
-
-
-typedef const char *string_property_spec;
-
-void hw_add_string_array_property
-(struct hw *me,
- const char *property,
- const string_property_spec *strings,
- unsigned nr_strings);
-
-int hw_find_string_array_property
-(struct hw *me,
- const char *property,
- unsigned index,
- string_property_spec *string);
-
-
-
-void hw_add_duplicate_property
-(struct hw *me,
- const char *property,
- const struct hw_property *original);
-
-#endif
diff --git a/sim/common/hw-tree.c b/sim/common/hw-tree.c
deleted file mode 100644
index 3f31b3b4394..00000000000
--- a/sim/common/hw-tree.c
+++ /dev/null
@@ -1,1345 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1998, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-#include "hw-main.h"
-#include "hw-base.h"
-#include "hw-tree.h"
-
-#include "sim-io.h"
-#include "sim-assert.h"
-
-#ifdef HAVE_STDLIB_H
-#include <stdlib.h>
-#endif
-
-#ifdef HAVE_STRING_H
-#include <string.h>
-#else
-#ifdef HAVE_STRINGS_H
-#include <strings.h>
-#endif
-#endif
-
-#include <ctype.h>
-
-/* manipulate/lookup device names */
-
-typedef struct _name_specifier {
-
- /* components in the full length name */
- char *path;
- char *property;
- char *value;
-
- /* current device */
- char *family;
- char *name;
- char *unit;
- char *args;
-
- /* previous device */
- char *last_name;
- char *last_family;
- char *last_unit;
- char *last_args;
-
- /* work area */
- char buf[1024];
-
-} name_specifier;
-
-
-
-/* Given a device specifier, break it up into its main components:
- path (and if present) property name and property value. */
-
-static int
-split_device_specifier (struct hw *current,
- const char *device_specifier,
- name_specifier *spec)
-{
- char *chp = NULL;
-
- /* expand any leading alias if present */
- if (current != NULL
- && *device_specifier != '\0'
- && *device_specifier != '.'
- && *device_specifier != '/')
- {
- struct hw *aliases = hw_tree_find_device (current, "/aliases");
- char alias[32];
- int len = 0;
- while (device_specifier[len] != '\0'
- && device_specifier[len] != '/'
- && device_specifier[len] != ':'
- && !isspace (device_specifier[len]))
- {
- alias[len] = device_specifier[len];
- len++;
- if (len >= sizeof(alias))
- hw_abort (NULL, "split_device_specifier: buffer overflow");
- }
- alias[len] = '\0';
- if (aliases != NULL
- && hw_find_property (aliases, alias))
- {
- strcpy (spec->buf, hw_find_string_property(aliases, alias));
- strcat (spec->buf, device_specifier + len);
- }
- else
- {
- strcpy (spec->buf, device_specifier);
- }
- }
- else
- {
- strcpy(spec->buf, device_specifier);
- }
-
- /* check no overflow */
- if (strlen(spec->buf) >= sizeof(spec->buf))
- hw_abort (NULL, "split_device_specifier: buffer overflow\n");
-
- /* strip leading spaces */
- chp = spec->buf;
- while (*chp != '\0' && isspace(*chp))
- chp++;
- if (*chp == '\0')
- return 0;
-
- /* find the path and terminate it with null */
- spec->path = chp;
- while (*chp != '\0' && !isspace(*chp))
- chp++;
- if (*chp != '\0')
- {
- *chp = '\0';
- chp++;
- }
-
- /* and any value */
- while (*chp != '\0' && isspace(*chp))
- chp++;
- spec->value = chp;
-
- /* now go back and chop the property off of the path */
- if (spec->value[0] == '\0')
- {
- spec->property = NULL; /*not a property*/
- spec->value = NULL;
- }
- else if (spec->value[0] == '>'
- || spec->value[0] == '<')
- {
- /* an interrupt spec */
- spec->property = NULL;
- }
- else {
- chp = strrchr(spec->path, '/');
- if (chp == NULL)
- {
- spec->property = spec->path;
- spec->path = strchr(spec->property, '\0');
- }
- else {
- *chp = '\0';
- spec->property = chp+1;
- }
- }
-
- /* and mark the rest as invalid */
- spec->name = NULL;
- spec->family = NULL;
- spec->unit = NULL;
- spec->args = NULL;
- spec->last_name = NULL;
- spec->last_family = NULL;
- spec->last_unit = NULL;
- spec->last_args = NULL;
-
- return 1;
-}
-
-
-/* given a device specifier break it up into its main components -
- path and property name - assuming that the last `device' is a
- property name. */
-
-static int
-split_property_specifier (struct hw *current,
- const char *property_specifier,
- name_specifier *spec)
-{
- if (split_device_specifier (current, property_specifier, spec))
- {
- if (spec->property == NULL)
- {
- /* force the last name to be a property name */
- char *chp = strrchr (spec->path, '/');
- if (chp == NULL)
- {
- spec->property = spec->path;
- spec->path = strrchr (spec->property, '\0');;
- }
- else
- {
- *chp = '\0';
- spec->property = chp + 1;
- }
- }
- return 1;
- }
- else
- return 0;
-}
-
-
-/* device the next device name and split it up, return 0 when no more
- names to struct hw */
-
-static int
-split_device_name (name_specifier *spec)
-{
- char *chp;
- /* remember what came before */
- spec->last_name = spec->name;
- spec->last_family = spec->family;
- spec->last_unit = spec->unit;
- spec->last_args = spec->args;
- /* finished? */
- if (spec->path[0] == '\0')
- {
- spec->name = NULL;
- spec->family = NULL;
- spec->unit = NULL;
- spec->args = NULL;
- return 0;
- }
- /* break the current device spec from the path */
- spec->name = spec->path;
- chp = strchr (spec->name, '/');
- if (chp == NULL)
- spec->path = strchr (spec->name, '\0');
- else
- {
- spec->path = chp+1;
- *chp = '\0';
- }
- /* break out the base */
- if (spec->name[0] == '(')
- {
- chp = strchr(spec->name, ')');
- if (chp == NULL)
- {
- spec->family = spec->name;
- }
- else
- {
- *chp = '\0';
- spec->family = spec->name + 1;
- spec->name = chp + 1;
- }
- }
- else
- {
- spec->family = spec->name;
- }
- /* now break out the unit */
- chp = strchr(spec->name, '@');
- if (chp == NULL)
- {
- spec->unit = NULL;
- chp = spec->name;
- }
- else
- {
- *chp = '\0';
- chp += 1;
- spec->unit = chp;
- }
- /* finally any args */
- chp = strchr(chp, ':');
- if (chp == NULL)
- spec->args = NULL;
- else
- {
- *chp = '\0';
- spec->args = chp+1;
- }
- return 1;
-}
-
-
-/* device the value, returning the next non-space token */
-
-static char *
-split_value (name_specifier *spec)
-{
- char *token;
- if (spec->value == NULL)
- return NULL;
- /* skip leading white space */
- while (isspace (spec->value[0]))
- spec->value++;
- if (spec->value[0] == '\0')
- {
- spec->value = NULL;
- return NULL;
- }
- token = spec->value;
- /* find trailing space */
- while (spec->value[0] != '\0' && !isspace (spec->value[0]))
- spec->value++;
- /* chop this value out */
- if (spec->value[0] != '\0')
- {
- spec->value[0] = '\0';
- spec->value++;
- }
- return token;
-}
-
-
-
-/* traverse the path specified by spec starting at current */
-
-static struct hw *
-split_find_device (struct hw *current,
- name_specifier *spec)
-{
- /* strip off (and process) any leading ., .., ./ and / */
- while (1)
- {
- if (strncmp (spec->path, "/", strlen ("/")) == 0)
- {
- /* cd /... */
- while (current != NULL && hw_parent (current) != NULL)
- current = hw_parent (current);
- spec->path += strlen ("/");
- }
- else if (strncmp (spec->path, "./", strlen ("./")) == 0)
- {
- /* cd ./... */
- current = current;
- spec->path += strlen ("./");
- }
- else if (strncmp (spec->path, "../", strlen ("../")) == 0)
- {
- /* cd ../... */
- if (current != NULL && hw_parent (current) != NULL)
- current = hw_parent (current);
- spec->path += strlen ("../");
- }
- else if (strcmp (spec->path, ".") == 0)
- {
- /* cd . */
- current = current;
- spec->path += strlen (".");
- }
- else if (strcmp (spec->path, "..") == 0)
- {
- /* cd .. */
- if (current != NULL && hw_parent (current) != NULL)
- current = hw_parent (current);
- spec->path += strlen ("..");
- }
- else
- break;
- }
-
- /* now go through the path proper */
-
- if (current == NULL)
- {
- split_device_name (spec);
- return NULL;
- }
-
- while (split_device_name (spec))
- {
- struct hw *child;
- for (child = hw_child (current);
- child != NULL; child = hw_sibling (child))
- {
- if (strcmp (spec->name, hw_name (child)) == 0)
- {
- if (spec->unit == NULL)
- break;
- else
- {
- hw_unit phys;
- hw_unit_decode (current, spec->unit, &phys);
- if (memcmp (&phys, hw_unit_address (child),
- sizeof (hw_unit)) == 0)
- break;
- }
- }
- }
- if (child == NULL)
- return current; /* search failed */
- current = child;
- }
-
- return current;
-}
-
-
-static struct hw *
-split_fill_path (struct hw *current,
- const char *device_specifier,
- name_specifier *spec)
-{
- /* break it up */
- if (!split_device_specifier (current, device_specifier, spec))
- hw_abort (current, "error parsing %s\n", device_specifier);
-
- /* fill our tree with its contents */
- current = split_find_device (current, spec);
-
- /* add any additional devices as needed */
- if (spec->name != NULL)
- {
- do
- {
- if (current != NULL && !hw_finished_p (current))
- hw_finish (current);
- current = hw_create (NULL,
- current,
- spec->family,
- spec->name,
- spec->unit,
- spec->args);
- }
- while (split_device_name (spec));
- }
-
- return current;
-}
-
-
-/* <non-white-space> */
-
-static const char *
-skip_token(const char *chp)
-{
- while (!isspace(*chp) && *chp != '\0')
- chp++;
- while (isspace(*chp) && *chp != '\0')
- chp++;
- return chp;
-}
-
-
-/* count the number of entries */
-
-static int
-count_entries (struct hw *current,
- const char *property_name,
- const char *property_value,
- int modulo)
-{
- const char *chp = property_value;
- int nr_entries = 0;
- while (*chp != '\0')
- {
- nr_entries += 1;
- chp = skip_token (chp);
- }
- if ((nr_entries % modulo) != 0)
- {
- hw_abort (current, "incorrect number of entries for %s property %s, should be multiple of %d",
- property_name, property_value, modulo);
- }
- return nr_entries / modulo;
-}
-
-
-
-/* parse: <address> ::= <token> ; device dependant */
-
-static const char *
-parse_address (struct hw *current,
- struct hw *bus,
- const char *chp,
- hw_unit *address)
-{
- if (hw_unit_decode (bus, chp, address) < 0)
- hw_abort (current, "invalid unit address in %s", chp);
- return skip_token (chp);
-}
-
-
-/* parse: <size> ::= <number> { "," <number> } ; */
-
-static const char *
-parse_size (struct hw *current,
- struct hw *bus,
- const char *chp,
- hw_unit *size)
-{
- int i;
- int nr;
- const char *curr = chp;
- memset(size, 0, sizeof(*size));
- /* parse the numeric list */
- size->nr_cells = hw_unit_nr_size_cells (bus);
- nr = 0;
- while (1)
- {
- char *next;
- size->cells[nr] = strtoul (curr, &next, 0);
- if (curr == next)
- hw_abort (current, "Problem parsing <size> %s", chp);
- nr += 1;
- if (next[0] != ',')
- break;
- if (nr == size->nr_cells)
- hw_abort (current, "Too many values in <size> %s", chp);
- curr = next + 1;
- }
- ASSERT (nr > 0 && nr <= size->nr_cells);
- /* right align the numbers */
- for (i = 1; i <= size->nr_cells; i++)
- {
- if (i <= nr)
- size->cells[size->nr_cells - i] = size->cells[nr - i];
- else
- size->cells[size->nr_cells - i] = 0;
- }
- return skip_token (chp);
-}
-
-
-/* parse: <reg> ::= { <address> <size> } ; */
-
-static void
-parse_reg_property (struct hw *current,
- const char *property_name,
- const char *property_value)
-{
- int nr_regs;
- int reg_nr;
- reg_property_spec *regs;
- const char *chp;
-
- /* determine the number of reg entries by counting tokens */
- nr_regs = count_entries (current, property_name, property_value, 2);
-
- /* create working space */
- regs = zalloc (nr_regs * sizeof (*regs));
-
- /* fill it in */
- chp = property_value;
- for (reg_nr = 0; reg_nr < nr_regs; reg_nr++)
- {
- chp = parse_address (current, hw_parent(current),
- chp, &regs[reg_nr].address);
- chp = parse_size (current, hw_parent(current),
- chp, &regs[reg_nr].size);
- }
-
- /* create it */
- hw_add_reg_array_property (current, property_name,
- regs, nr_regs);
-
- zfree (regs);
-}
-
-
-/* { <child-address> <parent-address> <child-size> }* */
-
-static void
-parse_ranges_property (struct hw *current,
- const char *property_name,
- const char *property_value)
-{
- int nr_ranges;
- int range_nr;
- range_property_spec *ranges;
- const char *chp;
-
- /* determine the number of ranges specified */
- nr_ranges = count_entries (current, property_name, property_value, 3);
-
- /* create a property of that size */
- ranges = zalloc (nr_ranges * sizeof(*ranges));
-
- /* fill it in */
- chp = property_value;
- for (range_nr = 0; range_nr < nr_ranges; range_nr++)
- {
- chp = parse_address (current, current,
- chp, &ranges[range_nr].child_address);
- chp = parse_address (current, hw_parent(current),
- chp, &ranges[range_nr].parent_address);
- chp = parse_size (current, current,
- chp, &ranges[range_nr].size);
- }
-
- /* create it */
- hw_add_range_array_property (current, property_name, ranges, nr_ranges);
-
- zfree (ranges);
-}
-
-
-/* <integer> ... */
-
-static void
-parse_integer_property (struct hw *current,
- const char *property_name,
- const char *property_value)
-{
- int nr_entries;
- unsigned_cell words[1024];
- /* integer or integer array? */
- nr_entries = 0;
- while (1)
- {
- char *end;
- words[nr_entries] = strtoul (property_value, &end, 0);
- if (property_value == end)
- break;
- nr_entries += 1;
- if (nr_entries * sizeof (words[0]) >= sizeof (words))
- hw_abort (current, "buffer overflow");
- property_value = end;
- }
- if (nr_entries == 0)
- hw_abort (current, "error parsing integer property %s (%s)",
- property_name, property_value);
- else if (nr_entries == 1)
- hw_add_integer_property (current, property_name, words[0]);
- else
- {
- int i;
- for (i = 0; i < nr_entries; i++)
- {
- H2BE (words[i]);
- }
- /* perhaphs integer array property is better */
- hw_add_array_property (current, property_name, words,
- sizeof(words[0]) * nr_entries);
- }
-}
-
-
-/* <string> ... */
-
-static void
-parse_string_property (struct hw *current,
- const char *property_name,
- const char *property_value)
-{
- char **strings;
- const char *chp;
- int nr_strings;
- int approx_nr_strings;
-
- /* get an estimate as to the number of strings by counting double
- quotes */
- approx_nr_strings = 2;
- for (chp = property_value; *chp; chp++)
- {
- if (*chp == '"')
- approx_nr_strings++;
- }
- approx_nr_strings = (approx_nr_strings) / 2;
-
- /* create a string buffer for that many (plus a null) */
- strings = (char**) zalloc ((approx_nr_strings + 1) * sizeof(char*));
-
- /* now find all the strings */
- chp = property_value;
- nr_strings = 0;
- while (1)
- {
-
- /* skip leading space */
- while (*chp != '\0' && isspace (*chp))
- chp += 1;
- if (*chp == '\0')
- break;
-
- /* copy it in */
- if (*chp == '"')
- {
- /* a quoted string - watch for '\' et.al. */
- /* estimate the size and allocate space for it */
- int pos;
- chp++;
- pos = 0;
- while (chp[pos] != '\0' && chp[pos] != '"')
- {
- if (chp[pos] == '\\' && chp[pos+1] != '\0')
- pos += 2;
- else
- pos += 1;
- }
- strings[nr_strings] = zalloc (pos + 1);
- /* copy the string over */
- pos = 0;
- while (*chp != '\0' && *chp != '"')
- {
- if (*chp == '\\' && *(chp+1) != '\0') {
- strings[nr_strings][pos] = *(chp+1);
- chp += 2;
- pos++;
- }
- else
- {
- strings[nr_strings][pos] = *chp;
- chp += 1;
- pos++;
- }
- }
- if (*chp != '\0')
- chp++;
- strings[nr_strings][pos] = '\0';
- }
- else
- {
- /* copy over a single unquoted token */
- int len = 0;
- while (chp[len] != '\0' && !isspace(chp[len]))
- len++;
- strings[nr_strings] = zalloc(len + 1);
- strncpy(strings[nr_strings], chp, len);
- strings[nr_strings][len] = '\0';
- chp += len;
- }
- nr_strings++;
- if (nr_strings > approx_nr_strings)
- hw_abort (current, "String property %s badly formatted",
- property_name);
- }
- ASSERT (strings[nr_strings] == NULL); /* from zalloc */
-
- /* install it */
- if (nr_strings == 0)
- hw_add_string_property (current, property_name, "");
- else if (nr_strings == 1)
- hw_add_string_property (current, property_name, strings[0]);
- else
- {
- const char **specs = (const char**) strings; /* stop a bogus error */
- hw_add_string_array_property (current, property_name,
- specs, nr_strings);
- }
-
- /* flush the created string */
- while (nr_strings > 0)
- {
- nr_strings--;
- zfree (strings[nr_strings]);
- }
- zfree(strings);
-}
-
-
-/* <path-to-ihandle-device> */
-
-#if NOT_YET
-static void
-parse_ihandle_property (struct hw *current,
- const char *property,
- const char *value)
-{
- ihandle_runtime_property_spec ihandle;
-
- /* pass the full path */
- ihandle.full_path = value;
-
- /* save this ready for the ihandle create */
- hw_add_ihandle_runtime_property (current, property,
- &ihandle);
-}
-#endif
-
-
-struct hw *
-hw_tree_create (SIM_DESC sd,
- const char *family)
-{
- return hw_create (sd, NULL, family, family, NULL, NULL);
-}
-
-void
-hw_tree_delete (struct hw *me)
-{
- /* Need to allow devices to disapear under our feet */
- while (hw_child (me) != NULL)
- {
- hw_tree_delete (hw_child (me));
- }
- hw_delete (me);
-}
-
-
-struct hw *
-hw_tree_parse (struct hw *current,
- const char *fmt,
- ...)
-{
- va_list ap;
- va_start (ap, fmt);
- current = hw_tree_vparse (current, fmt, ap);
- va_end (ap);
- return current;
-}
-
-struct hw *
-hw_tree_vparse (struct hw *current,
- const char *fmt,
- va_list ap)
-{
- char device_specifier[1024];
- name_specifier spec;
-
- /* format the path */
- vsprintf (device_specifier, fmt, ap);
- if (strlen (device_specifier) >= sizeof (device_specifier))
- hw_abort (NULL, "device_tree_add_deviced: buffer overflow\n");
-
- /* construct the tree down to the final struct hw */
- current = split_fill_path (current, device_specifier, &spec);
-
- /* is there an interrupt spec */
- if (spec.property == NULL
- && spec.value != NULL)
- {
- char *op = split_value (&spec);
- switch (op[0])
- {
- case '>':
- {
- char *my_port_name = split_value (&spec);
- int my_port;
- char *dest_port_name = split_value (&spec);
- int dest_port;
- name_specifier dest_spec;
- char *dest_hw_name = split_value (&spec);
- struct hw *dest;
- /* find my name */
- if (!hw_finished_p (current))
- hw_finish (current);
- my_port = hw_port_decode (current, my_port_name, output_port);
- /* find the dest device and port */
- dest = split_fill_path (current, dest_hw_name, &dest_spec);
- if (!hw_finished_p (dest))
- hw_finish (dest);
- dest_port = hw_port_decode (dest, dest_port_name,
- input_port);
- /* connect the two */
- hw_port_attach (current,
- my_port,
- dest,
- dest_port,
- permenant_object);
- break;
- }
- default:
- hw_abort (current, "unreconised interrupt spec %s\n", spec.value);
- break;
- }
- }
-
- /* is there a property */
- if (spec.property != NULL)
- {
- if (strcmp (spec.value, "true") == 0)
- hw_add_boolean_property (current, spec.property, 1);
- else if (strcmp (spec.value, "false") == 0)
- hw_add_boolean_property (current, spec.property, 0);
- else
- {
- const struct hw_property *property;
- switch (spec.value[0])
- {
-#if NOT_YET
- case '*':
- {
- parse_ihandle_property (current, spec.property, spec.value + 1);
- break;
- }
-#endif
- case '[':
- {
- unsigned8 words[1024];
- char *curr = spec.value + 1;
- int nr_words = 0;
- while (1)
- {
- char *next;
- words[nr_words] = H2BE_1 (strtoul (curr, &next, 0));
- if (curr == next)
- break;
- curr = next;
- nr_words += 1;
- }
- hw_add_array_property (current, spec.property,
- words, sizeof(words[0]) * nr_words);
- break;
- }
- case '"':
- {
- parse_string_property (current, spec.property, spec.value);
- break;
- }
- case '!':
- {
- spec.value++;
- property = hw_tree_find_property (current, spec.value);
- if (property == NULL)
- hw_abort (current, "property %s not found\n", spec.value);
- hw_add_duplicate_property (current,
- spec.property,
- property);
- break;
- }
- default:
- {
- if (strcmp (spec.property, "reg") == 0
- || strcmp (spec.property, "assigned-addresses") == 0
- || strcmp (spec.property, "alternate-reg") == 0)
- {
- parse_reg_property (current, spec.property, spec.value);
- }
- else if (strcmp (spec.property, "ranges") == 0)
- {
- parse_ranges_property (current, spec.property, spec.value);
- }
- else if (isdigit(spec.value[0])
- || (spec.value[0] == '-' && isdigit(spec.value[1]))
- || (spec.value[0] == '+' && isdigit(spec.value[1])))
- {
- parse_integer_property(current, spec.property, spec.value);
- }
- else
- parse_string_property(current, spec.property, spec.value);
- break;
- }
- }
- }
- }
- return current;
-}
-
-
-static void
-finish_hw_tree (struct hw *me,
- void *data)
-{
- if (!hw_finished_p (me))
- hw_finish (me);
-}
-
-void
-hw_tree_finish (struct hw *root)
-{
- hw_tree_traverse (root, finish_hw_tree, NULL, NULL);
-}
-
-
-
-void
-hw_tree_traverse (struct hw *root,
- hw_tree_traverse_function *prefix,
- hw_tree_traverse_function *postfix,
- void *data)
-{
- struct hw *child;
- if (prefix != NULL)
- prefix (root, data);
- for (child = hw_child (root);
- child != NULL;
- child = hw_sibling (child))
- {
- hw_tree_traverse (child, prefix, postfix, data);
- }
- if (postfix != NULL)
- postfix (root, data);
-}
-
-
-
-struct printer {
- hw_tree_print_callback *print;
- void *file;
-};
-
-static void
-print_address (struct hw *bus,
- const hw_unit *phys,
- struct printer *p)
-{
- char unit[32];
- hw_unit_encode (bus, phys, unit, sizeof(unit));
- p->print (p->file, " %s", unit);
-}
-
-static void
-print_size (struct hw *bus,
- const hw_unit *size,
- struct printer *p)
-{
- int i;
- for (i = 0; i < size->nr_cells; i++)
- if (size->cells[i] != 0)
- break;
- if (i < size->nr_cells) {
- p->print (p->file, " 0x%lx", (unsigned long) size->cells[i]);
- i++;
- for (; i < size->nr_cells; i++)
- p->print (p->file, ",0x%lx", (unsigned long) size->cells[i]);
- }
- else
- p->print (p->file, " 0");
-}
-
-static void
-print_reg_property (struct hw *me,
- const struct hw_property *property,
- struct printer *p)
-{
- int reg_nr;
- reg_property_spec reg;
- for (reg_nr = 0;
- hw_find_reg_array_property (me, property->name, reg_nr, &reg);
- reg_nr++) {
- print_address (hw_parent (me), &reg.address, p);
- print_size (me, &reg.size, p);
- }
-}
-
-static void
-print_ranges_property (struct hw *me,
- const struct hw_property *property,
- struct printer *p)
-{
- int range_nr;
- range_property_spec range;
- for (range_nr = 0;
- hw_find_range_array_property (me, property->name, range_nr, &range);
- range_nr++)
- {
- print_address (me, &range.child_address, p);
- print_address (hw_parent (me), &range.parent_address, p);
- print_size (me, &range.size, p);
- }
-}
-
-static void
-print_string (struct hw *me,
- const char *string,
- struct printer *p)
-{
- p->print (p->file, " \"");
- while (*string != '\0') {
- switch (*string) {
- case '"':
- p->print (p->file, "\\\"");
- break;
- case '\\':
- p->print (p->file, "\\\\");
- break;
- default:
- p->print (p->file, "%c", *string);
- break;
- }
- string++;
- }
- p->print (p->file, "\"");
-}
-
-static void
-print_string_array_property (struct hw *me,
- const struct hw_property *property,
- struct printer *p)
-{
- int nr;
- string_property_spec string;
- for (nr = 0;
- hw_find_string_array_property (me, property->name, nr, &string);
- nr++)
- {
- print_string (me, string, p);
- }
-}
-
-static void
-print_properties (struct hw *me,
- struct printer *p)
-{
- const struct hw_property *property;
- for (property = hw_find_property (me, NULL);
- property != NULL;
- property = hw_next_property (property))
- {
- if (hw_parent (me) == NULL)
- p->print (p->file, "/%s", property->name);
- else
- p->print (p->file, "%s/%s", hw_path (me), property->name);
- if (property->original != NULL)
- {
- p->print (p->file, " !");
- p->print (p->file, "%s/%s",
- hw_path (property->original->owner),
- property->original->name);
- }
- else
- {
- switch (property->type)
- {
- case array_property:
- {
- if ((property->sizeof_array % sizeof (signed_cell)) == 0)
- {
- unsigned_cell *w = (unsigned_cell*) property->array;
- int cell_nr;
- for (cell_nr = 0;
- cell_nr < (property->sizeof_array / sizeof (unsigned_cell));
- cell_nr++)
- {
- p->print (p->file, " 0x%lx", (unsigned long) BE2H_cell (w[cell_nr]));
- }
- }
- else
- {
- unsigned8 *w = (unsigned8*)property->array;
- p->print (p->file, " [");
- while ((char*)w - (char*)property->array < property->sizeof_array) {
- p->print (p->file, " 0x%2x", BE2H_1 (*w));
- w++;
- }
- }
- break;
- }
- case boolean_property:
- {
- int b = hw_find_boolean_property(me, property->name);
- p->print (p->file, " %s", b ? "true" : "false");
- break;
- }
-#if NOT_YET
- case ihandle_property:
- {
- if (property->array != NULL)
- {
- device_instance *instance = hw_find_ihandle_property (me, property->name);
- p->print (p->file, " *%s", device_instance_path(instance));
- }
- else
- {
- /* not yet initialized, ask the device for the path */
- ihandle_runtime_property_spec spec;
- hw_find_ihandle_runtime_property (me, property->name, &spec);
- p->print (p->file, " *%s", spec.full_path);
- }
- break;
- }
-#endif
- case integer_property:
- {
- unsigned_word w = hw_find_integer_property (me, property->name);
- p->print (p->file, " 0x%lx", (unsigned long)w);
- break;
- }
- case range_array_property:
- {
- print_ranges_property (me, property, p);
- break;
- }
- case reg_array_property:
- {
- print_reg_property (me, property, p);
- break;
- }
- case string_property:
- {
- const char *s = hw_find_string_property (me, property->name);
- print_string (me, s, p);
- break;
- }
- case string_array_property:
- {
- print_string_array_property (me, property, p);
- break;
- }
- }
- }
- p->print (p->file, "\n");
- }
-}
-
-static void
-print_interrupts (struct hw *me,
- int my_port,
- struct hw *dest,
- int dest_port,
- void *data)
-{
- struct printer *p = data;
- char src[32];
- char dst[32];
- hw_port_encode (me, my_port, src, sizeof(src), output_port);
- hw_port_encode (dest, dest_port, dst, sizeof(dst), input_port);
- p->print (p->file,
- "%s > %s %s %s\n",
- hw_path (me),
- src, dst,
- hw_path (dest));
-}
-
-static void
-print_device (struct hw *me,
- void *data)
-{
- struct printer *p = data;
- p->print (p->file, "%s\n", hw_path (me));
- print_properties (me, p);
- hw_port_traverse (me, print_interrupts, data);
-}
-
-void
-hw_tree_print (struct hw *root,
- hw_tree_print_callback *print,
- void *file)
-{
- struct printer p;
- p.print = print;
- p.file = file;
- hw_tree_traverse (root,
- print_device, NULL,
- &p);
-}
-
-
-
-#if NOT_YET
-device_instance *
-tree_instance(struct hw *root,
- const char *device_specifier)
-{
- /* find the device node */
- struct hw *me;
- name_specifier spec;
- if (!split_device_specifier(root, device_specifier, &spec))
- return NULL;
- me = split_find_device(root, &spec);
- if (spec.name != NULL)
- return NULL;
- /* create the instance */
- return device_create_instance(me, device_specifier, spec.last_args);
-}
-#endif
-
-struct hw *
-hw_tree_find_device (struct hw *root,
- const char *path_to_device)
-{
- struct hw *node;
- name_specifier spec;
-
- /* parse the path */
- split_device_specifier (root, path_to_device, &spec);
- if (spec.value != NULL)
- return NULL; /* something wierd */
-
- /* now find it */
- node = split_find_device (root, &spec);
- if (spec.name != NULL)
- return NULL; /* not a leaf */
-
- return node;
-}
-
-
-const struct hw_property *
-hw_tree_find_property (struct hw *root,
- const char *path_to_property)
-{
- name_specifier spec;
- if (!split_property_specifier (root, path_to_property, &spec))
- hw_abort (root, "Invalid property path %s", path_to_property);
- root = split_find_device (root, &spec);
- if (spec.name != NULL)
- return NULL; /* not a leaf */
- return hw_find_property (root, spec.property);
-}
-
-int
-hw_tree_find_boolean_property (struct hw *root,
- const char *path_to_property)
-{
- name_specifier spec;
- if (!split_property_specifier (root, path_to_property, &spec))
- hw_abort (root, "Invalid property path %s", path_to_property);
- root = split_find_device (root, &spec);
- if (spec.name != NULL)
- hw_abort (root, "device \"%s\" not found (property \"%s\")",
- spec.name, path_to_property);
- return hw_find_boolean_property (root, spec.property);
-}
-
-signed_cell
-hw_tree_find_integer_property (struct hw *root,
- const char *path_to_property)
-{
- name_specifier spec;
- if (!split_property_specifier (root, path_to_property, &spec))
- hw_abort (root, "Invalid property path %s", path_to_property);
- root = split_find_device (root, &spec);
- if (spec.name != NULL)
- hw_abort (root, "device \"%s\" not found (property \"%s\")",
- spec.name, path_to_property);
- return hw_find_integer_property (root, spec.property);
-}
-
-#if NOT_YET
-device_instance *
-hw_tree_find_ihandle_property (struct hw *root,
- const char *path_to_property)
-{
- struct hw *root;
- name_specifier spec;
- if (!split_property_specifier (root, path_to_property, &spec))
- hw_abort (root, "Invalid property path %s", path_to_property);
- root = split_find_device (root, &spec);
- if (spec.name != NULL)
- hw_abort (root, "device \"%s\" not found (property \"%s\")",
- spec.name, path_to_property);
- return hw_find_ihandle_property (root, spec.property);
-}
-#endif
-
-const char *
-hw_tree_find_string_property (struct hw *root,
- const char *path_to_property)
-{
- name_specifier spec;
- if (!split_property_specifier (root, path_to_property, &spec))
- hw_abort (root, "Invalid property path %s", path_to_property);
- root = split_find_device (root, &spec);
- if (spec.name != NULL)
- hw_abort (root, "device \"%s\" not found (property \"%s\")",
- spec.name, path_to_property);
- return hw_find_string_property (root, spec.property);
-}
diff --git a/sim/common/hw-tree.h b/sim/common/hw-tree.h
deleted file mode 100644
index bfa5681e707..00000000000
--- a/sim/common/hw-tree.h
+++ /dev/null
@@ -1,119 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1997, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-#ifndef HW_TREE
-#define HW_TREE
-
-
-struct hw *hw_tree_create
-(SIM_DESC sd,
- const char *device);
-
-void hw_tree_delete
-(struct hw *root);
-
-struct hw *hw_tree_parse
-(struct hw *root,
- const char *fmt,
- ...) __attribute__ ((format (printf, 2, 3)));
-
-struct hw *hw_tree_vparse
-(struct hw *root,
- const char *fmt,
- va_list ap);
-
-
-void hw_tree_finish
-(struct hw *root);
-
-typedef void (hw_tree_print_callback)
- (void *,
- const char *fmt,
- ...);
-
-void hw_tree_print
-(struct hw *root,
- hw_tree_print_callback *print,
- void *file);
-
-
-/* Tree traversal::
-
- The entire device tree can be traversed using the
- <<device_tree_traverse()>> function. The traversal can be in
- either prefix or postfix order.
-
- */
-
-typedef void (hw_tree_traverse_function)
- (struct hw *device,
- void *data);
-
-void hw_tree_traverse
-(struct hw *root,
- hw_tree_traverse_function *prefix,
- hw_tree_traverse_function *postfix,
- void *data);
-
-
-/* Tree lookup::
-
- The function <<hw_tree_find_device()>> will attempt to locate the
- specified device within the tree. If the device is not found a
- NULL device is returned.
-
- */
-
-struct hw * hw_tree_find_device
-(struct hw *root,
- const char *path);
-
-
-const struct hw_property *hw_tree_find_property
-(struct hw *root,
- const char *path_to_property);
-
-int hw_tree_find_boolean_property
-(struct hw *root,
- const char *path_to_property);
-
-signed_cell hw_tree_find_integer_property
-(struct hw *root,
- const char *path_to_property);
-
-#if NOT_YET
-device_instance *hw_tree_find_ihandle_property
-(struct hw *root,
- const char *path_to_property);
-#endif
-
-const char *hw_tree_find_string_property
-(struct hw *root,
- const char *path_to_property);
-
-
-/* Perform a soft reset on the created tree. */
-
-void hw_tree_reset
-(struct hw *root);
-
-
-#endif
diff --git a/sim/common/nltvals.def b/sim/common/nltvals.def
deleted file mode 100644
index b5e82fcfb48..00000000000
--- a/sim/common/nltvals.def
+++ /dev/null
@@ -1,418 +0,0 @@
-/* Newlib/libgloss macro values needed by remote target support. */
-/* This file is machine generated by gennltvals.sh. */
-#ifdef errno_defs
-/* from errno.h */
-/* from sys/errno.h */
-/* begin errno target macros */
- { "E2BIG", 7 },
- { "EACCES", 13 },
- { "EADDRINUSE", 112 },
- { "EADDRNOTAVAIL", 125 },
- { "EADV", 68 },
- { "EAFNOSUPPORT", 106 },
- { "EAGAIN", 11 },
- { "EALREADY", 120 },
- { "EBADE", 50 },
- { "EBADF", 9 },
- { "EBADFD", 81 },
- { "EBADMSG", 77 },
- { "EBADR", 51 },
- { "EBADRQC", 54 },
- { "EBADSLT", 55 },
- { "EBFONT", 57 },
- { "EBUSY", 16 },
- { "ECHILD", 10 },
- { "ECHRNG", 37 },
- { "ECOMM", 70 },
- { "ECONNABORTED", 113 },
- { "ECONNREFUSED", 111 },
- { "ECONNRESET", 104 },
- { "EDEADLK", 45 },
- { "EDEADLOCK", 56 },
- { "EDESTADDRREQ", 121 },
- { "EDOM", 33 },
- { "EDOTDOT", 76 },
- { "EDQUOT", 132 },
- { "EEXIST", 17 },
- { "EFAULT", 14 },
- { "EFBIG", 27 },
- { "EHOSTDOWN", 117 },
- { "EHOSTUNREACH", 118 },
- { "EIDRM", 36 },
- { "EINPROGRESS", 119 },
- { "EINTR", 4 },
- { "EINVAL", 22 },
- { "EIO", 5 },
- { "EISCONN", 127 },
- { "EISDIR", 21 },
- { "EL2HLT", 44 },
- { "EL2NSYNC", 38 },
- { "EL3HLT", 39 },
- { "EL3RST", 40 },
- { "ELBIN", 75 },
- { "ELIBACC", 83 },
- { "ELIBBAD", 84 },
- { "ELIBEXEC", 87 },
- { "ELIBMAX", 86 },
- { "ELIBSCN", 85 },
- { "ELNRNG", 41 },
- { "ELOOP", 92 },
- { "EMFILE", 24 },
- { "EMLINK", 31 },
- { "EMSGSIZE", 122 },
- { "EMULTIHOP", 74 },
- { "ENAMETOOLONG", 91 },
- { "ENETDOWN", 115 },
- { "ENETRESET", 126 },
- { "ENETUNREACH", 114 },
- { "ENFILE", 23 },
- { "ENMFILE", 89 },
- { "ENOANO", 53 },
- { "ENOBUFS", 105 },
- { "ENOCSI", 43 },
- { "ENODATA", 61 },
- { "ENODEV", 19 },
- { "ENOENT", 2 },
- { "ENOEXEC", 8 },
- { "ENOLCK", 46 },
- { "ENOLINK", 67 },
- { "ENOMEM", 12 },
- { "ENOMSG", 35 },
- { "ENONET", 64 },
- { "ENOPKG", 65 },
- { "ENOPROTOOPT", 109 },
- { "ENOSPC", 28 },
- { "ENOSR", 63 },
- { "ENOSTR", 60 },
- { "ENOSYS", 88 },
- { "ENOTBLK", 15 },
- { "ENOTCONN", 128 },
- { "ENOTDIR", 20 },
- { "ENOTEMPTY", 90 },
- { "ENOTSOCK", 108 },
- { "ENOTSUP", 134 },
- { "ENOTTY", 25 },
- { "ENOTUNIQ", 80 },
- { "ENXIO", 6 },
- { "EOPNOTSUPP", 95 },
- { "EPERM", 1 },
- { "EPFNOSUPPORT", 96 },
- { "EPIPE", 32 },
- { "EPROCLIM", 130 },
- { "EPROTO", 71 },
- { "EPROTONOSUPPORT", 123 },
- { "EPROTOTYPE", 107 },
- { "ERANGE", 34 },
- { "EREMCHG", 82 },
- { "EREMOTE", 66 },
- { "EROFS", 30 },
- { "ESHUTDOWN", 110 },
- { "ESOCKTNOSUPPORT", 124 },
- { "ESPIPE", 29 },
- { "ESRCH", 3 },
- { "ESRMNT", 69 },
- { "ESTALE", 133 },
- { "ETIME", 62 },
- { "ETIMEDOUT", 116 },
- { "ETOOMANYREFS", 129 },
- { "ETXTBSY", 26 },
- { "EUNATCH", 42 },
- { "EUSERS", 131 },
- { "EWOULDBLOCK", 11 },
- { "EXDEV", 18 },
- { "EXFULL", 52 },
-/* end errno target macros */
-#endif
-#ifdef signal_defs
-/* from signal.h */
-/* from sys/signal.h */
-/* begin signal target macros */
- { "SIGABRT", 6 },
- { "SIGALRM", 14 },
- { "SIGBUS", 10 },
- { "SIGCHLD", 20 },
- { "SIGCLD", 20 },
- { "SIGCONT", 19 },
- { "SIGEMT", 7 },
- { "SIGFPE", 8 },
- { "SIGHUP", 1 },
- { "SIGILL", 4 },
- { "SIGINT", 2 },
- { "SIGIO", 23 },
- { "SIGIOT", 6 },
- { "SIGKILL", 9 },
- { "SIGLOST", 29 },
- { "SIGPIPE", 13 },
- { "SIGPOLL", 23 },
- { "SIGPROF", 27 },
- { "SIGQUIT", 3 },
- { "SIGSEGV", 11 },
- { "SIGSTOP", 17 },
- { "SIGSYS", 12 },
- { "SIGTERM", 15 },
- { "SIGTRAP", 5 },
- { "SIGTSTP", 18 },
- { "SIGTTIN", 21 },
- { "SIGTTOU", 22 },
- { "SIGURG", 16 },
- { "SIGUSR1", 30 },
- { "SIGUSR2", 31 },
- { "SIGVTALRM", 26 },
- { "SIGWINCH", 28 },
- { "SIGXCPU", 24 },
- { "SIGXFSZ", 25 },
-/* end signal target macros */
-#endif
-#ifdef open_defs
-/* from fcntl.h */
-/* from sys/fcntl.h */
-/* begin open target macros */
- { "O_ACCMODE", (0 | 1 | 2 ) },
- { "O_APPEND", 0x0008 },
- { "O_CREAT", 0x0200 },
- { "O_EXCL", 0x0800 },
- { "O_NOCTTY", 0x8000 },
- { "O_NONBLOCK", 0x4000 },
- { "O_RDONLY", 0 },
- { "O_RDWR", 2 },
- { "O_SYNC", 0x2000 },
- { "O_TRUNC", 0x0400 },
- { "O_WRONLY", 1 },
-/* end open target macros */
-#endif
-#ifdef NL_TARGET_d10v
-#ifdef sys_defs
-/* from syscall.h */
-/* begin d10v sys target macros */
- { "SYS_ARG", 24 },
- { "SYS_chdir", 12 },
- { "SYS_chmod", 15 },
- { "SYS_chown", 16 },
- { "SYS_close", 6 },
- { "SYS_creat", 8 },
- { "SYS_execv", 11 },
- { "SYS_execve", 59 },
- { "SYS_exit", 1 },
- { "SYS_fork", 2 },
- { "SYS_fstat", 22 },
- { "SYS_getpid", 20 },
- { "SYS_isatty", 21 },
- { "SYS_kill", 60 },
- { "SYS_link", 9 },
- { "SYS_lseek", 19 },
- { "SYS_mknod", 14 },
- { "SYS_open", 5 },
- { "SYS_pipe", 42 },
- { "SYS_read", 3 },
- { "SYS_stat", 38 },
- { "SYS_time", 23 },
- { "SYS_unlink", 10 },
- { "SYS_utime", 201 },
- { "SYS_wait", 202 },
- { "SYS_wait4", 7 },
- { "SYS_write", 4 },
-/* end d10v sys target macros */
-#endif
-#endif
-#ifdef NL_TARGET_d30v
-#ifdef sys_defs
-/* from syscall.h */
-/* begin d30v sys target macros */
- { "SYS_argv", 13 },
- { "SYS_argvlen", 12 },
- { "SYS_chdir", 14 },
- { "SYS_chmod", 16 },
- { "SYS_close", 3 },
- { "SYS_exit", 1 },
- { "SYS_fstat", 10 },
- { "SYS_getpid", 8 },
- { "SYS_kill", 9 },
- { "SYS_lseek", 6 },
- { "SYS_open", 2 },
- { "SYS_read", 4 },
- { "SYS_stat", 15 },
- { "SYS_time", 18 },
- { "SYS_unlink", 7 },
- { "SYS_utime", 17 },
- { "SYS_write", 5 },
-/* end d30v sys target macros */
-#endif
-#endif
-#ifdef NL_TARGET_fr30
-#ifdef sys_defs
-/* from syscall.h */
-/* begin fr30 sys target macros */
- { "SYS_argv", 13 },
- { "SYS_argvlen", 12 },
- { "SYS_chdir", 14 },
- { "SYS_chmod", 16 },
- { "SYS_close", 3 },
- { "SYS_exit", 1 },
- { "SYS_fstat", 10 },
- { "SYS_getpid", 8 },
- { "SYS_kill", 9 },
- { "SYS_lseek", 6 },
- { "SYS_open", 2 },
- { "SYS_read", 4 },
- { "SYS_stat", 15 },
- { "SYS_time", 18 },
- { "SYS_unlink", 7 },
- { "SYS_utime", 17 },
- { "SYS_write", 5 },
-/* end fr30 sys target macros */
-#endif
-#endif
-#ifdef NL_TARGET_i960
-#ifdef sys_defs
-/* from syscall.h */
-/* begin i960 sys target macros */
- { "SYS_argv", 13 },
- { "SYS_argvlen", 12 },
- { "SYS_chdir", 14 },
- { "SYS_chmod", 16 },
- { "SYS_close", 234 },
- { "SYS_exit", 257 },
- { "SYS_fstat", 10 },
- { "SYS_getpid", 8 },
- { "SYS_kill", 9 },
- { "SYS_lseek", 233 },
- { "SYS_open", 230 },
- { "SYS_read", 231 },
- { "SYS_stat", 15 },
- { "SYS_time", 18 },
- { "SYS_unlink", 7 },
- { "SYS_utime", 17 },
- { "SYS_write", 232 },
-/* end i960 sys target macros */
-#endif
-#endif
-#ifdef NL_TARGET_m32r
-#ifdef sys_defs
-/* from syscall.h */
-/* begin m32r sys target macros */
- { "SYS_argv", 13 },
- { "SYS_argvlen", 12 },
- { "SYS_chdir", 14 },
- { "SYS_chmod", 16 },
- { "SYS_close", 3 },
- { "SYS_exit", 1 },
- { "SYS_fstat", 10 },
- { "SYS_getpid", 8 },
- { "SYS_kill", 9 },
- { "SYS_lseek", 6 },
- { "SYS_open", 2 },
- { "SYS_read", 4 },
- { "SYS_stat", 15 },
- { "SYS_time", 18 },
- { "SYS_unlink", 7 },
- { "SYS_utime", 17 },
- { "SYS_write", 5 },
-/* end m32r sys target macros */
-#endif
-#endif
-#ifdef NL_TARGET_mn10200
-#ifdef sys_defs
-/* from syscall.h */
-/* begin mn10200 sys target macros */
- { "SYS_argv", 13 },
- { "SYS_argvlen", 12 },
- { "SYS_chdir", 14 },
- { "SYS_chmod", 16 },
- { "SYS_close", 3 },
- { "SYS_exit", 1 },
- { "SYS_fstat", 10 },
- { "SYS_getpid", 8 },
- { "SYS_kill", 9 },
- { "SYS_lseek", 6 },
- { "SYS_open", 2 },
- { "SYS_read", 4 },
- { "SYS_stat", 15 },
- { "SYS_time", 18 },
- { "SYS_unlink", 7 },
- { "SYS_utime", 17 },
- { "SYS_write", 5 },
-/* end mn10200 sys target macros */
-#endif
-#endif
-#ifdef NL_TARGET_mn10300
-#ifdef sys_defs
-/* from syscall.h */
-/* begin mn10300 sys target macros */
- { "SYS_argv", 13 },
- { "SYS_argvlen", 12 },
- { "SYS_chdir", 14 },
- { "SYS_chmod", 16 },
- { "SYS_close", 3 },
- { "SYS_exit", 1 },
- { "SYS_fstat", 10 },
- { "SYS_getpid", 8 },
- { "SYS_kill", 9 },
- { "SYS_lseek", 6 },
- { "SYS_open", 2 },
- { "SYS_read", 4 },
- { "SYS_stat", 15 },
- { "SYS_time", 18 },
- { "SYS_unlink", 7 },
- { "SYS_utime", 17 },
- { "SYS_write", 5 },
-/* end mn10300 sys target macros */
-#endif
-#endif
-#ifdef NL_TARGET_sparc
-#ifdef sys_defs
-/* from syscall.h */
-/* begin sparc sys target macros */
- { "SYS_argv", 13 },
- { "SYS_argvlen", 12 },
- { "SYS_chdir", 14 },
- { "SYS_chmod", 16 },
- { "SYS_close", 3 },
- { "SYS_exit", 1 },
- { "SYS_fstat", 10 },
- { "SYS_getpid", 8 },
- { "SYS_kill", 9 },
- { "SYS_lseek", 6 },
- { "SYS_open", 2 },
- { "SYS_read", 4 },
- { "SYS_stat", 15 },
- { "SYS_time", 18 },
- { "SYS_unlink", 7 },
- { "SYS_utime", 17 },
- { "SYS_write", 5 },
-/* end sparc sys target macros */
-#endif
-#endif
-#ifdef NL_TARGET_v850
-#ifdef sys_defs
-/* from syscall.h */
-/* begin v850 sys target macros */
- { "SYS_ARG", 24 },
- { "SYS_chdir", 12 },
- { "SYS_chmod", 15 },
- { "SYS_chown", 16 },
- { "SYS_close", 6 },
- { "SYS_creat", 8 },
- { "SYS_execv", 11 },
- { "SYS_execve", 59 },
- { "SYS_exit", 1 },
- { "SYS_fork", 2 },
- { "SYS_fstat", 22 },
- { "SYS_getpid", 20 },
- { "SYS_gettimeofday", 116 },
- { "SYS_isatty", 21 },
- { "SYS_link", 9 },
- { "SYS_lseek", 19 },
- { "SYS_mknod", 14 },
- { "SYS_open", 5 },
- { "SYS_pipe", 42 },
- { "SYS_read", 3 },
- { "SYS_stat", 38 },
- { "SYS_time", 23 },
- { "SYS_unlink", 10 },
- { "SYS_utime", 201 },
- { "SYS_wait", 202 },
- { "SYS_wait4", 7 },
- { "SYS_write", 4 },
-/* end v850 sys target macros */
-#endif
-#endif
diff --git a/sim/common/nrun.c b/sim/common/nrun.c
deleted file mode 100644
index ef25d680915..00000000000
--- a/sim/common/nrun.c
+++ /dev/null
@@ -1,212 +0,0 @@
-/* New version of run front end support for simulators.
- Copyright (C) 1997 Free Software Foundation, Inc.
-
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License along
-with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
-
-#include <signal.h>
-#include "sim-main.h"
-
-#include "bfd.h"
-
-#ifdef HAVE_ENVIRON
-extern char **environ;
-#endif
-
-static void usage (void);
-
-extern host_callback default_callback;
-
-static char *myname;
-
-static SIM_DESC sd;
-
-static RETSIGTYPE
-cntrl_c (int sig)
-{
- if (! sim_stop (sd))
- {
- fprintf (stderr, "Quit!\n");
- exit (1);
- }
-}
-
-int
-main (int argc, char **argv)
-{
- char *name;
- char **prog_argv = NULL;
- struct _bfd *prog_bfd;
- enum sim_stop reason;
- int sigrc = 0;
- int single_step = 0;
- RETSIGTYPE (*prev_sigint) ();
-
- myname = argv[0] + strlen (argv[0]);
- while (myname > argv[0] && myname[-1] != '/')
- --myname;
-
- /* INTERNAL: When MYNAME is `step', single step the simulator
- instead of allowing it to run free. The sole purpose of this
- HACK is to allow the sim_resume interface's step argument to be
- tested without having to build/run gdb. */
- if (strlen (myname) > 4 && strcmp (myname - 4, "step") == 0)
- {
- single_step = 1;
- }
-
- /* Create an instance of the simulator. */
- default_callback.init (&default_callback);
- sd = sim_open (SIM_OPEN_STANDALONE, &default_callback, NULL, argv);
- if (sd == 0)
- exit (1);
- if (STATE_MAGIC (sd) != SIM_MAGIC_NUMBER)
- {
- fprintf (stderr, "Internal error - bad magic number in simulator struct\n");
- abort ();
- }
-
- /* Was there a program to run? */
- prog_argv = STATE_PROG_ARGV (sd);
- prog_bfd = STATE_PROG_BFD (sd);
- if (prog_argv == NULL || *prog_argv == NULL)
- usage ();
-
- name = *prog_argv;
-
- /* For simulators that don't open prog during sim_open() */
- if (prog_bfd == NULL)
- {
- prog_bfd = bfd_openr (name, 0);
- if (prog_bfd == NULL)
- {
- fprintf (stderr, "%s: can't open \"%s\": %s\n",
- myname, name, bfd_errmsg (bfd_get_error ()));
- exit (1);
- }
- if (!bfd_check_format (prog_bfd, bfd_object))
- {
- fprintf (stderr, "%s: \"%s\" is not an object file: %s\n",
- myname, name, bfd_errmsg (bfd_get_error ()));
- exit (1);
- }
- }
-
- if (STATE_VERBOSE_P (sd))
- printf ("%s %s\n", myname, name);
-
- /* Load the program into the simulator. */
- if (sim_load (sd, name, prog_bfd, 0) == SIM_RC_FAIL)
- exit (1);
-
- /* Prepare the program for execution. */
-#ifdef HAVE_ENVIRON
- sim_create_inferior (sd, prog_bfd, prog_argv, environ);
-#else
- sim_create_inferior (sd, prog_bfd, prog_argv, NULL);
-#endif
-
- /* Run/Step the program. */
- if (single_step)
- {
- do
- {
- prev_sigint = signal (SIGINT, cntrl_c);
- sim_resume (sd, 1/*step*/, 0);
- signal (SIGINT, prev_sigint);
- sim_stop_reason (sd, &reason, &sigrc);
-
- if ((reason == sim_stopped) &&
- (sigrc == sim_signal_to_host (sd, SIM_SIGINT)))
- break; /* exit on control-C */
- }
- /* remain on breakpoint or signals in oe mode*/
- while (((reason == sim_signalled) &&
- (sigrc == sim_signal_to_host (sd, SIM_SIGTRAP))) ||
- ((reason == sim_stopped) &&
- (STATE_ENVIRONMENT (sd) == OPERATING_ENVIRONMENT)));
- }
- else
- {
- do
- {
-#if defined (HAVE_SIGACTION) && defined (SA_RESTART)
- struct sigaction sa, osa;
- sa.sa_handler = cntrl_c;
- sigemptyset (&sa.sa_mask);
- sa.sa_flags = 0;
- sigaction (SIGINT, &sa, &osa);
- prev_sigint = osa.sa_handler;
-#else
- prev_sigint = signal (SIGINT, cntrl_c);
-#endif
- sim_resume (sd, 0, sigrc);
- signal (SIGINT, prev_sigint);
- sim_stop_reason (sd, &reason, &sigrc);
-
- if ((reason == sim_stopped) &&
- (sigrc == sim_signal_to_host (sd, SIM_SIGINT)))
- break; /* exit on control-C */
-
- /* remain on signals in oe mode */
- } while ((reason == sim_stopped) &&
- (STATE_ENVIRONMENT (sd) == OPERATING_ENVIRONMENT));
-
- }
- /* Print any stats the simulator collected. */
- if (STATE_VERBOSE_P (sd))
- sim_info (sd, 0);
-
- /* Shutdown the simulator. */
- sim_close (sd, 0);
-
- /* If reason is sim_exited, then sigrc holds the exit code which we want
- to return. If reason is sim_stopped or sim_signalled, then sigrc holds
- the signal that the simulator received; we want to return that to
- indicate failure. */
-
-#ifdef SIM_H8300 /* FIXME: Ugh. grep for SLEEP in compile.c */
- if (sigrc == SIGILL)
- abort ();
- sigrc = 0;
-#else
- /* Why did we stop? */
- switch (reason)
- {
- case sim_signalled:
- case sim_stopped:
- if (sigrc != 0)
- fprintf (stderr, "program stopped with signal %d.\n", sigrc);
- break;
-
- case sim_exited:
- break;
-
- default:
- fprintf (stderr, "program in undefined state (%d:%d)\n", reason, sigrc);
- break;
-
- }
-#endif
-
- return sigrc;
-}
-
-static void
-usage ()
-{
- fprintf (stderr, "Usage: %s [options] program [program args]\n", myname);
- fprintf (stderr, "Run `%s --help' for full list of options.\n", myname);
- exit (1);
-}
diff --git a/sim/common/run.1 b/sim/common/run.1
deleted file mode 100644
index ad11210ecba..00000000000
--- a/sim/common/run.1
+++ /dev/null
@@ -1,463 +0,0 @@
-.\" Copyright (c) 1993 Free Software Foundation
-.\" See section COPYING for conditions for redistribution
-.TH run 1 "13oct1993" "GNU Tools" "GNU Tools"
-.de BP
-.sp
-.ti -.2i
-\(**
-..
-
-.SH NAME
-run\(em\&Simulator front-end
-
-.SH SYNOPSIS
-.hy 0
-.na
-.TP
-.B run
-.RB "[\|" \-v "\|]"
-." .RB "[\|" \-t "\|]"
-.RB "[\|" \-p
-.IR freq "\|]"
-.RB "[\|" \-m
-.IR memory "\|]"
-.I program
-.ad b
-.hy 1
-.SH DESCRIPTION
-
-Use `\|\c
-.BI run " program"\c
-\&\|' to execute a binary by interpreting machine instructions on your
-host computer.
-
-.B run
-is the same emulator used by GDB's `\|\c
-.B target sim\c
-\&\|' command. You can run it directly by executing
-.B run
-if you just want to see your program execute, and do not need any
-debugger functionality. You can also use
-.B run
-to generate profiling information for analysis with
-.BR gprof .
-
-.SH OPTIONS
-
-.TP
-.B \-v
-Verbose output. Display the name of the program to run before
-execution; after execution, display the number of instructions
-executed, the number of machine cycles emulated, the number of
-pipeline stalls, the real time taken, the emulated execution time
-taken, and a summary of how much profiling information was generated.
-."
-." .TP
-." .B \-t
-." `trace', calls a sim_trace routine that does nothing.
-
-.TP
-.BI \-p " freq"
-Generate profile information (for use with
-.B gprof\c
-\&).
-.I freq
-is the profiling frequency. Write the profiling information to a file called
-.BR gmon.out .
-
-.TP
-.BI \-m " memory"
-Set the memory size for the emulated machine to two to the power
-.IR memory .
-The default value is 19, emulating a board with 524288 bytes of memory.
-
-.PP
-
-.SH "SEE ALSO"
-.RB "`\|" gprof "\|'"
-entry in
-.B info\c
-\&;
-.RB "`\|" gdb "\|'"
-entry in
-.B info\c
-\&;
-.I
-Using GDB: A Guide to the GNU Source-Level Debugger\c
-, Richard M. Stallman and Roland H. Pesch.
-
-.SH COPYING
-Copyright (c) 1993, 2000 Free Software Foundation, Inc.
-.PP
-This document is distributed under the terms of the GNU Free
-Documentation License, version 1.1. That license is described in the
-sources for this manual page, but it is not displayed here in order to
-make this manual more consise. Copies of this license can also be
-obtained from: http://www.gnu.org/copyleft/.
-
-\" GNU Free Documentation License
-\" Version 1.1, March 2000
-
-\" Copyright (C) 2000 Free Software Foundation, Inc.
-\" 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
-
-\" Everyone is permitted to copy and distribute verbatim
-\" copies of this license document, but changing it is
-\" not allowed.
-\" .PP
-\" 0. PREAMBLE
-\" .PP
-\" The purpose of this License is to make a manual, textbook, or other
-\" written document "free" in the sense of freedom: to assure everyone
-\" the effective freedom to copy and redistribute it, with or without
-\" modifying it, either commercially or noncommercially. Secondarily,
-\" this License preserves for the author and publisher a way to get
-\" credit for their work, while not being considered responsible for
-\" modifications made by others.
-\" .PP
-\" This License is a kind of "copyleft", which means that derivative
-\" works of the document must themselves be free in the same sense. It
-\" complements the GNU General Public License, which is a copyleft
-\" license designed for free software.
-\" .PP
-\" We have designed this License in order to use it for manuals for free
-\" software, because free software needs free documentation: a free
-\" program should come with manuals providing the same freedoms that the
-\" software does. But this License is not limited to software manuals;
-\" it can be used for any textual work, regardless of subject matter or
-\" whether it is published as a printed book. We recommend this License
-\" principally for works whose purpose is instruction or reference.
-\" .PP
-\" 1. APPLICABILITY AND DEFINITIONS
-\" .PP
-\" This License applies to any manual or other work that contains a
-\" notice placed by the copyright holder saying it can be distributed
-\" under the terms of this License. The "Document", below, refers to any
-\" such manual or work. Any member of the public is a licensee, and is
-\" addressed as "you".
-\" .PP
-\" A "Modified Version" of the Document means any work containing the
-\" Document or a portion of it, either copied verbatim, or with
-\" modifications and/or translated into another language.
-\" .PP
-\" A "Secondary Section" is a named appendix or a front-matter section of
-\" the Document that deals exclusively with the relationship of the
-\" publishers or authors of the Document to the Document's overall subject
-\" (or to related matters) and contains nothing that could fall directly
-\" within that overall subject. (For example, if the Document is in part a
-\" textbook of mathematics, a Secondary Section may not explain any
-\" mathematics.) The relationship could be a matter of historical
-\" connection with the subject or with related matters, or of legal,
-\" commercial, philosophical, ethical or political position regarding
-\" them.
-\" .PP
-\" The "Invariant Sections" are certain Secondary Sections whose titles
-\" are designated, as being those of Invariant Sections, in the notice
-\" that says that the Document is released under this License.
-\" .PP
-\" The "Cover Texts" are certain short passages of text that are listed,
-\" as Front-Cover Texts or Back-Cover Texts, in the notice that says that
-\" the Document is released under this License.
-\" .PP
-\" A "Transparent" copy of the Document means a machine-readable copy,
-\" represented in a format whose specification is available to the
-\" general public, whose contents can be viewed and edited directly and
-\" straightforwardly with generic text editors or (for images composed of
-\" pixels) generic paint programs or (for drawings) some widely available
-\" drawing editor, and that is suitable for input to text formatters or
-\" for automatic translation to a variety of formats suitable for input
-\" to text formatters. A copy made in an otherwise Transparent file
-\" format whose markup has been designed to thwart or discourage
-\" subsequent modification by readers is not Transparent. A copy that is
-\" not "Transparent" is called "Opaque".
-\" .PP
-\" Examples of suitable formats for Transparent copies include plain
-\" ASCII without markup, Texinfo input format, LaTeX input format, SGML
-\" or XML using a publicly available DTD, and standard-conforming simple
-\" HTML designed for human modification. Opaque formats include
-\" PostScript, PDF, proprietary formats that can be read and edited only
-\" by proprietary word processors, SGML or XML for which the DTD and/or
-\" processing tools are not generally available, and the
-\" machine-generated HTML produced by some word processors for output
-\" purposes only.
-\" .PP
-\" The "Title Page" means, for a printed book, the title page itself,
-\" plus such following pages as are needed to hold, legibly, the material
-\" this License requires to appear in the title page. For works in
-\" formats which do not have any title page as such, "Title Page" means
-\" the text near the most prominent appearance of the work's title,
-\" preceding the beginning of the body of the text.
-\" .PP
-\" 2. VERBATIM COPYING
-\" .PP
-\" You may copy and distribute the Document in any medium, either
-\" commercially or noncommercially, provided that this License, the
-\" copyright notices, and the license notice saying this License applies
-\" to the Document are reproduced in all copies, and that you add no other
-\" conditions whatsoever to those of this License. You may not use
-\" technical measures to obstruct or control the reading or further
-\" copying of the copies you make or distribute. However, you may accept
-\" compensation in exchange for copies. If you distribute a large enough
-\" number of copies you must also follow the conditions in section 3.
-\" .PP
-\" You may also lend copies, under the same conditions stated above, and
-\" you may publicly display copies.
-\" .PP
-\" 3. COPYING IN QUANTITY
-\" .PP
-\" If you publish printed copies of the Document numbering more than 100,
-\" and the Document's license notice requires Cover Texts, you must enclose
-\" the copies in covers that carry, clearly and legibly, all these Cover
-\" Texts: Front-Cover Texts on the front cover, and Back-Cover Texts on
-\" the back cover. Both covers must also clearly and legibly identify
-\" you as the publisher of these copies. The front cover must present
-\" the full title with all words of the title equally prominent and
-\" visible. You may add other material on the covers in addition.
-\" Copying with changes limited to the covers, as long as they preserve
-\" the title of the Document and satisfy these conditions, can be treated
-\" as verbatim copying in other respects.
-\" .PP
-\" If the required texts for either cover are too voluminous to fit
-\" legibly, you should put the first ones listed (as many as fit
-\" reasonably) on the actual cover, and continue the rest onto adjacent
-\" pages.
-\" .PP
-\" If you publish or distribute Opaque copies of the Document numbering
-\" more than 100, you must either include a machine-readable Transparent
-\" copy along with each Opaque copy, or state in or with each Opaque copy
-\" a publicly-accessible computer-network location containing a complete
-\" Transparent copy of the Document, free of added material, which the
-\" general network-using public has access to download anonymously at no
-\" charge using public-standard network protocols. If you use the latter
-\" option, you must take reasonably prudent steps, when you begin
-\" distribution of Opaque copies in quantity, to ensure that this
-\" Transparent copy will remain thus accessible at the stated location
-\" until at least one year after the last time you distribute an Opaque
-\" copy (directly or through your agents or retailers) of that edition to
-\" the public.
-\" .PP
-\" It is requested, but not required, that you contact the authors of the
-\" Document well before redistributing any large number of copies, to give
-\" them a chance to provide you with an updated version of the Document.
-\" .PP
-\" 4. MODIFICATIONS
-\" .PP
-\" You may copy and distribute a Modified Version of the Document under
-\" the conditions of sections 2 and 3 above, provided that you release
-\" the Modified Version under precisely this License, with the Modified
-\" Version filling the role of the Document, thus licensing distribution
-\" and modification of the Modified Version to whoever possesses a copy
-\" of it. In addition, you must do these things in the Modified Version:
-\" .PP
-\" A. Use in the Title Page (and on the covers, if any) a title distinct
-\" from that of the Document, and from those of previous versions
-\" (which should, if there were any, be listed in the History section
-\" of the Document). You may use the same title as a previous version
-\" if the original publisher of that version gives permission.
-\" .PP
-\" B. List on the Title Page, as authors, one or more persons or entities
-\" responsible for authorship of the modifications in the Modified
-\" Version, together with at least five of the principal authors of the
-\" Document (all of its principal authors, if it has less than five).
-\" .PP
-\" C. State on the Title page the name of the publisher of the
-\" Modified Version, as the publisher.
-\" .PP
-\" D. Preserve all the copyright notices of the Document.
-\" .PP
-\" E. Add an appropriate copyright notice for your modifications
-\" adjacent to the other copyright notices.
-\" .PP
-\" F. Include, immediately after the copyright notices, a license notice
-\" giving the public permission to use the Modified Version under the
-\" terms of this License, in the form shown in the Addendum below.
-\" Preserve in that license notice the full lists of Invariant Sections
-\" and required Cover Texts given in the Document's license notice.
-\" .PP
-\" H. Include an unaltered copy of this License.
-\" .PP
-\" I. Preserve the section entitled "History", and its title, and add to
-\" it an item stating at least the title, year, new authors, and
-\" publisher of the Modified Version as given on the Title Page. If
-\" there is no section entitled "History" in the Document, create one
-\" stating the title, year, authors, and publisher of the Document as
-\" given on its Title Page, then add an item describing the Modified
-\" Version as stated in the previous sentence.
-\" .PP
-\" J. Preserve the network location, if any, given in the Document for
-\" public access to a Transparent copy of the Document, and likewise
-\" the network locations given in the Document for previous versions
-\" it was based on. These may be placed in the "History" section.
-\" You may omit a network location for a work that was published at
-\" least four years before the Document itself, or if the original
-\" publisher of the version it refers to gives permission.
-\" .PP
-\" K. In any section entitled "Acknowledgements" or "Dedications",
-\" preserve the section's title, and preserve in the section all the
-\" substance and tone of each of the contributor acknowledgements
-\" and/or dedications given therein.
-\" .PP
-\" L. Preserve all the Invariant Sections of the Document,
-\" unaltered in their text and in their titles. Section numbers
-\" or the equivalent are not considered part of the section titles.
-\" .PP
-\" M. Delete any section entitled "Endorsements". Such a section
-\" may not be included in the Modified Version.
-\" .PP
-\" N. Do not retitle any existing section as "Endorsements"
-\" or to conflict in title with any Invariant Section.
-\" .PP
-\" If the Modified Version includes new front-matter sections or
-\" appendices that qualify as Secondary Sections and contain no material
-\" copied from the Document, you may at your option designate some or all
-\" of these sections as invariant. To do this, add their titles to the
-\" list of Invariant Sections in the Modified Version's license notice.
-\" These titles must be distinct from any other section titles.
-\" .PP
-\" You may add a section entitled "Endorsements", provided it contains
-\" nothing but endorsements of your Modified Version by various
-\" parties--for example, statements of peer review or that the text has
-\" been approved by an organization as the authoritative definition of a
-\" standard.
-\" .PP
-\" You may add a passage of up to five words as a Front-Cover Text, and a
-\" passage of up to 25 words as a Back-Cover Text, to the end of the list
-\" of Cover Texts in the Modified Version. Only one passage of
-\" Front-Cover Text and one of Back-Cover Text may be added by (or
-\" through arrangements made by) any one entity. If the Document already
-\" includes a cover text for the same cover, previously added by you or
-\" by arrangement made by the same entity you are acting on behalf of,
-\" you may not add another; but you may replace the old one, on explicit
-\" permission from the previous publisher that added the old one.
-\" .PP
-\" The author(s) and publisher(s) of the Document do not by this License
-\" give permission to use their names for publicity for or to assert or
-\" imply endorsement of any Modified Version.
-\" .PP
-
-\" 5. COMBINING DOCUMENTS
-\" .PP
-\" You may combine the Document with other documents released under this
-\" License, under the terms defined in section 4 above for modified
-\" versions, provided that you include in the combination all of the
-\" Invariant Sections of all of the original documents, unmodified, and
-\" list them all as Invariant Sections of your combined work in its
-\" license notice.
-\" .PP
-\" The combined work need only contain one copy of this License, and
-\" multiple identical Invariant Sections may be replaced with a single
-\" copy. If there are multiple Invariant Sections with the same name but
-\" different contents, make the title of each such section unique by
-\" adding at the end of it, in parentheses, the name of the original
-\" author or publisher of that section if known, or else a unique number.
-\" Make the same adjustment to the section titles in the list of
-\" Invariant Sections in the license notice of the combined work.
-\" .PP
-\" In the combination, you must combine any sections entitled "History"
-\" in the various original documents, forming one section entitled
-\" "History"; likewise combine any sections entitled "Acknowledgements",
-\" and any sections entitled "Dedications". You must delete all sections
-\" entitled "Endorsements."
-\" .PP
-
-\" 6. COLLECTIONS OF DOCUMENTS
-\" .PP
-\" You may make a collection consisting of the Document and other documents
-\" released under this License, and replace the individual copies of this
-\" License in the various documents with a single copy that is included in
-\" the collection, provided that you follow the rules of this License for
-\" verbatim copying of each of the documents in all other respects.
-\" .PP
-\" You may extract a single document from such a collection, and distribute
-\" it individually under this License, provided you insert a copy of this
-\" License into the extracted document, and follow this License in all
-\" other respects regarding verbatim copying of that document.
-\" .PP
-
-\" 7. AGGREGATION WITH INDEPENDENT WORKS
-\" .PP
-\" A compilation of the Document or its derivatives with other separate
-\" and independent documents or works, in or on a volume of a storage or
-\" distribution medium, does not as a whole count as a Modified Version
-\" of the Document, provided no compilation copyright is claimed for the
-\" compilation. Such a compilation is called an "aggregate", and this
-\" License does not apply to the other self-contained works thus compiled
-\" with the Document, on account of their being thus compiled, if they
-\" are not themselves derivative works of the Document.
-\" .PP
-\" If the Cover Text requirement of section 3 is applicable to these
-\" copies of the Document, then if the Document is less than one quarter
-\" of the entire aggregate, the Document's Cover Texts may be placed on
-\" covers that surround only the Document within the aggregate.
-\" Otherwise they must appear on covers around the whole aggregate.
-\" .PP
-
-\" 8. TRANSLATION
-\" .PP
-\" Translation is considered a kind of modification, so you may
-\" distribute translations of the Document under the terms of section 4.
-\" Replacing Invariant Sections with translations requires special
-\" permission from their copyright holders, but you may include
-\" translations of some or all Invariant Sections in addition to the
-\" original versions of these Invariant Sections. You may include a
-\" translation of this License provided that you also include the
-\" original English version of this License. In case of a disagreement
-\" between the translation and the original English version of this
-\" License, the original English version will prevail.
-\" .PP
-
-\" 9. TERMINATION
-\" .PP
-\" You may not copy, modify, sublicense, or distribute the Document except
-\" as expressly provided for under this License. Any other attempt to
-\" copy, modify, sublicense or distribute the Document is void, and will
-\" automatically terminate your rights under this License. However,
-\" parties who have received copies, or rights, from you under this
-\" License will not have their licenses terminated so long as such
-\" parties remain in full compliance.
-\" .PP
-
-\" 10. FUTURE REVISIONS OF THIS LICENSE
-\" .PP
-\" The Free Software Foundation may publish new, revised versions
-\" of the GNU Free Documentation License from time to time. Such new
-\" versions will be similar in spirit to the present version, but may
-\" differ in detail to address new problems or concerns. See
-\" http://www.gnu.org/copyleft/.
-\" .PP
-\" Each version of the License is given a distinguishing version number.
-\" If the Document specifies that a particular numbered version of this
-\" License "or any later version" applies to it, you have the option of
-\" following the terms and conditions either of that specified version or
-\" of any later version that has been published (not as a draft) by the
-\" Free Software Foundation. If the Document does not specify a version
-\" number of this License, you may choose any version ever published (not
-\" as a draft) by the Free Software Foundation.
-\" .PP
-
-\" ADDENDUM: How to use this License for your documents
-\" .PP
-\" To use this License in a document you have written, include a copy of
-\" the License in the document and put the following copyright and
-\" license notices just after the title page:
-\" .PP
-\" Copyright (c) YEAR YOUR NAME.
-\" Permission is granted to copy, distribute and/or
-\" modify this document under the terms of the GNU
-\" Free Documentation License, Version 1.1 or any later
-\" version published by the Free Software Foundation;
-\" with the Invariant Sections being LIST THEIR TITLES,
-\" with the Front-Cover Texts being LIST, and with the
-\" Back-Cover Texts being LIST. A copy of the license
-\" is included in the section entitled "GNU Free
-\" Documentation License".
-\" .PP
-\" If you have no Invariant Sections, write "with no Invariant Sections"
-\" instead of saying which ones are invariant. If you have no
-\" Front-Cover Texts, write "no Front-Cover Texts" instead of
-\" "Front-Cover Texts being LIST"; likewise for Back-Cover Texts.
-\" .PP
-\" If your document contains nontrivial examples of program code, we
-\" recommend releasing these examples in parallel under your choice of
-\" free software license, such as the GNU General Public License,
-\" to permit their use in free software.
diff --git a/sim/common/run.c b/sim/common/run.c
deleted file mode 100644
index 66f76f5114d..00000000000
--- a/sim/common/run.c
+++ /dev/null
@@ -1,338 +0,0 @@
-/* run front end support for all the simulators.
- Copyright (C) 1992, 93-96, 1997 Free Software Foundation, Inc.
-
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License along
-with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
-
-/* Steve Chamberlain sac@cygnus.com,
- and others at Cygnus. */
-
-#include "config.h"
-#include "tconfig.h"
-
-#include <signal.h>
-#include <stdio.h>
-#ifdef __STDC__
-#include <stdarg.h>
-#else
-#include <varargs.h>
-#endif
-
-#ifdef HAVE_STDLIB_H
-#include <stdlib.h>
-#endif
-
-#ifdef HAVE_STRING_H
-#include <string.h>
-#else
-#ifdef HAVE_STRINGS_H
-#include <strings.h>
-#endif
-#endif
-
-#include "libiberty.h"
-#include "bfd.h"
-#include "callback.h"
-#include "remote-sim.h"
-#include "ansidecl.h"
-
-static void usage PARAMS ((void));
-extern int optind;
-extern char *optarg;
-
-extern host_callback default_callback;
-
-static char *myname;
-
-extern int getopt ();
-
-#ifdef NEED_UI_LOOP_HOOK
-/* Gdb foolery. This is only needed for gdb using a gui. */
-int (*ui_loop_hook) PARAMS ((int signo));
-#endif
-
-static SIM_DESC sd;
-
-static RETSIGTYPE
-cntrl_c (int sig ATTRIBUTE_UNUSED)
-{
- if (! sim_stop (sd))
- {
- fprintf (stderr, "Quit!\n");
- exit (1);
- }
-}
-
-int
-main (ac, av)
- int ac;
- char **av;
-{
- RETSIGTYPE (*prev_sigint) ();
- bfd *abfd;
- int i;
- int verbose = 0;
- int trace = 0;
-#ifdef SIM_HAVE_ENVIRONMENT
- int operating_p = 0;
-#endif
- char *name;
- static char *no_args[4];
- char **sim_argv = &no_args[0];
- char **prog_args;
- enum sim_stop reason;
- int sigrc;
-
- myname = av[0] + strlen (av[0]);
- while (myname > av[0] && myname[-1] != '/')
- --myname;
-
- /* The first element of sim_open's argv is the program name. */
- no_args[0] = av[0];
-#ifdef SIM_HAVE_BIENDIAN
- no_args[1] = "-E";
- no_args[2] = "set-later";
-#endif
-
- /* FIXME: This is currently being migrated into sim_open.
- Simulators that use functions such as sim_size() still require
- this. */
- default_callback.init (&default_callback);
- sim_set_callbacks (&default_callback);
-
- /* FIXME: This is currently being rewritten to have each simulator
- do all argv processing. */
-
-#ifdef SIM_H8300 /* FIXME: quick hack */
- while ((i = getopt (ac, av, "a:c:m:op:s:htv")) != EOF)
-#else
- while ((i = getopt (ac, av, "a:c:m:op:s:tv")) != EOF)
-#endif
- switch (i)
- {
- case 'a':
- /* FIXME: Temporary hack. */
- {
- int len = strlen (av[0]) + strlen (optarg);
- char *argbuf = (char *) alloca (len + 2 + 50);
- sprintf (argbuf, "%s %s", av[0], optarg);
-#ifdef SIM_HAVE_BIENDIAN
- /* The desired endianness must be passed to sim_open.
- The value for "set-later" is set when we know what it is.
- -E support isn't yet part of the published interface. */
- strcat (argbuf, " -E set-later");
-#endif
- sim_argv = buildargv (argbuf);
- }
- break;
-#ifdef SIM_HAVE_SIMCACHE
- case 'c':
- sim_set_simcache_size (atoi (optarg));
- break;
-#endif
- case 'm':
- /* FIXME: Rename to sim_set_mem_size. */
- sim_size (atoi (optarg));
- break;
-#ifdef SIM_HAVE_ENVIRONMENT
- case 'o':
- /* Operating enironment where any signals are delivered to the
- target. */
- operating_p = 1;
- break;
-#endif SIM_HAVE_ENVIRONMENT
-#ifdef SIM_HAVE_PROFILE
- case 'p':
- sim_set_profile (atoi (optarg));
- break;
- case 's':
- sim_set_profile_size (atoi (optarg));
- break;
-#endif
- case 't':
- trace = 1;
- break;
- case 'v':
- /* Things that are printed with -v are the kinds of things that
- gcc -v prints. This is not meant to include detailed tracing
- or debugging information, just summaries. */
- verbose = 1;
- /* sim_set_verbose (1); */
- break;
- /* FIXME: Quick hack, to be replaced by more general facility. */
-#ifdef SIM_H8300
- case 'h':
- set_h8300h (1);
- break;
-#endif
- default:
- usage ();
- }
-
- ac -= optind;
- av += optind;
- if (ac <= 0)
- usage ();
-
- name = *av;
- prog_args = av;
-
- if (verbose)
- {
- printf ("%s %s\n", myname, name);
- }
-
- abfd = bfd_openr (name, 0);
- if (!abfd)
- {
- fprintf (stderr, "%s: can't open %s: %s\n",
- myname, name, bfd_errmsg (bfd_get_error ()));
- exit (1);
- }
-
- if (!bfd_check_format (abfd, bfd_object))
- {
- fprintf (stderr, "%s: can't load %s: %s\n",
- myname, name, bfd_errmsg (bfd_get_error ()));
- exit (1);
- }
-
-#ifdef SIM_HAVE_BIENDIAN
- /* The endianness must be passed to sim_open because one may wish to
- examine/set registers before calling sim_load [which is the other
- place where one can determine endianness]. We previously passed the
- endianness via global `target_byte_order' but that's not a clean
- interface. */
- for (i = 1; sim_argv[i + 1] != NULL; ++i)
- continue;
- if (bfd_big_endian (abfd))
- sim_argv[i] = "big";
- else
- sim_argv[i] = "little";
-#endif
-
- /* Ensure that any run-time initialisation that needs to be
- performed by the simulator can occur. */
- sd = sim_open (SIM_OPEN_STANDALONE, &default_callback, abfd, sim_argv);
- if (sd == 0)
- exit (1);
-
- if (sim_load (sd, name, abfd, 0) == SIM_RC_FAIL)
- exit (1);
-
- if (sim_create_inferior (sd, abfd, prog_args, NULL) == SIM_RC_FAIL)
- exit (1);
-
-#ifdef SIM_HAVE_ENVIRONMENT
- /* NOTE: An old simulator supporting the operating environment MUST
- provide sim_set_trace() and not sim_trace(). That way
- sim_stop_reason() can be used to determine any stop reason. */
- if (trace)
- sim_set_trace ();
- sigrc = 0;
- do
- {
- prev_sigint = signal (SIGINT, cntrl_c);
- sim_resume (sd, 0, sigrc);
- signal (SIGINT, prev_sigint);
- sim_stop_reason (sd, &reason, &sigrc);
- }
- while (operating_p && reason == sim_stopped && sigrc != SIGINT);
-#else
- if (trace)
- {
- int done = 0;
- prev_sigint = signal (SIGINT, cntrl_c);
- while (!done)
- {
- done = sim_trace (sd);
- }
- signal (SIGINT, prev_sigint);
- sim_stop_reason (sd, &reason, &sigrc);
- }
- else
- {
- prev_sigint = signal (SIGINT, cntrl_c);
- sigrc = 0;
- sim_resume (sd, 0, sigrc);
- signal (SIGINT, prev_sigint);
- sim_stop_reason (sd, &reason, &sigrc);
- }
-#endif
-
- if (verbose)
- sim_info (sd, 0);
- sim_close (sd, 0);
-
- /* If reason is sim_exited, then sigrc holds the exit code which we want
- to return. If reason is sim_stopped or sim_signalled, then sigrc holds
- the signal that the simulator received; we want to return that to
- indicate failure. */
-
-#ifdef SIM_H8300 /* FIXME: Ugh. grep for SLEEP in compile.c */
- if (sigrc == SIGILL)
- abort ();
- sigrc = 0;
-#else
- /* Why did we stop? */
- switch (reason)
- {
- case sim_signalled:
- case sim_stopped:
- if (sigrc != 0)
- fprintf (stderr, "program stopped with signal %d.\n", sigrc);
- break;
-
- case sim_exited:
- break;
-
- case sim_running:
- case sim_polling: /* these indicate a serious problem */
- abort ();
- break;
-
- }
-#endif
-
- return sigrc;
-}
-
-static void
-usage ()
-{
- fprintf (stderr, "Usage: %s [options] program [program args]\n", myname);
- fprintf (stderr, "Options:\n");
- fprintf (stderr, "-a args Pass `args' to simulator.\n");
-#ifdef SIM_HAVE_SIMCACHE
- fprintf (stderr, "-c size Set simulator cache size to `size'.\n");
-#endif
-#ifdef SIM_H8300
- fprintf (stderr, "-h Executable is for h8/300h or h8/300s.\n");
-#endif
- fprintf (stderr, "-m size Set memory size of simulator, in bytes.\n");
-#ifdef SIM_HAVE_ENVIRONMENT
- fprintf (stderr, "-o Select operating (kernel) environment.\n");
-#endif
-#ifdef SIM_HAVE_PROFILE
- fprintf (stderr, "-p freq Set profiling frequency.\n");
- fprintf (stderr, "-s size Set profiling size.\n");
-#endif
- fprintf (stderr, "-t Perform instruction tracing.\n");
- fprintf (stderr, " Note: Very few simulators support tracing.\n");
- fprintf (stderr, "-v Verbose output.\n");
- fprintf (stderr, "\n");
- fprintf (stderr, "program args Arguments to pass to simulated program.\n");
- fprintf (stderr, " Note: Very few simulators support this.\n");
- exit (1);
-}
diff --git a/sim/common/sim-abort.c b/sim/common/sim-abort.c
deleted file mode 100644
index 088bf201a68..00000000000
--- a/sim/common/sim-abort.c
+++ /dev/null
@@ -1,60 +0,0 @@
-/* Generic simulator abort.
- Copyright (C) 1997 Free Software Foundation, Inc.
- Contributed by Cygnus Support.
-
-This file is part of GDB, the GNU debugger.
-
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License along
-with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
-
-#include <stdio.h>
-
-#include "sim-main.h"
-#include "sim-assert.h"
-
-/* This is an implementation of sim_engine_abort that does not use
- longjmp, instead it just calls sim_io_error. sim_io_error will
- jump right out of the simulator.
-
- It is intended as a holder for simulators that have started to use
- sim-core et.al. but are not yet in a position to use sim-engine
- (the setjmp/longjmp code). */
-
-
-void
-sim_engine_abort (SIM_DESC sd,
- sim_cpu *cpu,
- sim_cia cia,
- const char *fmt,
- ...)
-{
- ASSERT (sd == NULL || STATE_MAGIC (sd) == SIM_MAGIC_NUMBER);
- if (sd != NULL)
- {
- va_list ap;
- va_start(ap, fmt);
- sim_io_evprintf (sd, fmt, ap);
- va_end(ap);
- sim_io_error (sd, "\n");
- }
- else
- {
- va_list ap;
- va_start(ap, fmt);
- vfprintf (stderr, fmt, ap);
- va_end(ap);
- fprintf (stderr, "\n");
- abort ();
- }
-}
diff --git a/sim/common/sim-alu.h b/sim/common/sim-alu.h
deleted file mode 100644
index 49d1018527a..00000000000
--- a/sim/common/sim-alu.h
+++ /dev/null
@@ -1,1047 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1996, Andrew Cagney <cagney@highland.com.au>
- Copyright (C) 1997, Free Software Foundation, Inc.
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-#ifndef _SIM_ALU_H_
-#define _SIM_ALU_H_
-
-#include "symcat.h"
-
-
-/* INTEGER ALU MODULE:
-
- This module provides an implementation of 2's complement arithmetic
- including the recording of carry and overflow status bits.
-
-
- EXAMPLE:
-
- Code using this module includes it into sim-main.h and then, as a
- convention, defines macro's ALU*_END that records the result of any
- aritmetic performed. Ex:
-
- #include "sim-alu.h"
- #define ALU32_END(RES) \
- (RES) = ALU32_OVERFLOW_RESULT; \
- carry = ALU32_HAD_CARRY_BORROW; \
- overflow = ALU32_HAD_OVERFLOW
-
- The macro's are then used vis:
-
- {
- ALU32_BEGIN (GPR[i]);
- ALU32_ADDC (GPR[j]);
- ALU32_END (GPR[k]);
- }
-
-
- NOTES:
-
- Macros exist for efficiently computing 8, 16, 32 and 64 bit
- arithmetic - ALU8_*, ALU16_*, .... In addition, according to
- TARGET_WORD_BITSIZE a set of short-hand macros are defined - ALU_*
-
- Initialization:
-
- ALU*_BEGIN(ACC): Declare initialize the ALU accumulator with ACC.
-
- Results:
-
- The calculation of the final result may be computed a number
- of different ways. Three different overflow macro's are
- defined, the most efficient one to use depends on which other
- outputs from the alu are being used.
-
- ALU*_RESULT: Generic ALU result output.
-
- ALU*_HAD_OVERFLOW: Returns a nonzero value if signed overflow
- occured.
-
- ALU*_OVERFLOW_RESULT: If the macro ALU*_HAD_OVERFLOW is being
- used this is the most efficient result available. Ex:
-
- #define ALU16_END(RES) \
- if (ALU16_HAD_OVERFLOW) \
- sim_engine_halt (...); \
- (RES) = ALU16_OVERFLOW_RESULT
-
- ALU*_HAD_CARRY_BORROW: Returns a nonzero value if unsigned
- overflow or underflow (also refered to as carry and borrow)
- occured.
-
- ALU*_CARRY_BORROW_RESULT: If the macro ALU*_HAD_CARRY_BORROW is being
- used this is the most efficient result available. Ex:
-
- #define ALU64_END(RES) \
- State.carry = ALU64_HAD_CARRY_BORROW; \
- (RES) = ALU64_CARRY_BORROW_RESULT
-
-
- Addition:
-
- ALU*_ADD(VAL): Add VAL to the ALU accumulator. Record any
- overflow as well as the final result.
-
- ALU*_ADDC(VAL): Add VAL to the ALU accumulator. Record any
- carry-out or overflow as well as the final result.
-
- ALU*_ADDC_C(VAL,CI): Add VAL and CI (carry-in). Record any
- carry-out or overflow as well as the final result.
-
- Subtraction:
-
- ALU*_SUB(VAL): Subtract VAL from the ALU accumulator. Record
- any underflow as well as the final result.
-
- ALU*_SUBC(VAL): Subtract VAL from the ALU accumulator using
- negated addition. Record any underflow or carry-out as well
- as the final result.
-
- ALU*_SUBB(VAL): Subtract VAL from the ALU accumulator using
- direct subtraction (ACC+~VAL+1). Record any underflow or
- borrow-out as well as the final result.
-
- ALU*_SUBC_X(VAL,CI): Subtract VAL and CI (carry-in) from the
- ALU accumulator using extended negated addition (ACC+~VAL+CI).
- Record any underflow or carry-out as well as the final result.
-
- ALU*_SUBB_B(VAL,BI): Subtract VAL and BI (borrow-in) from the
- ALU accumulator using direct subtraction. Record any
- underflow or borrow-out as well as the final result.
-
-
- */
-
-
-
-/* Twos complement aritmetic - addition/subtraction - carry/borrow
- (or you thought you knew the answer to 0-0)
-
-
-
- Notation and Properties:
-
-
- Xn denotes the value X stored in N bits.
-
- MSBn (X): The most significant (sign) bit of X treated as an N bit
- value.
-
- SEXTn (X): The infinite sign extension of X treated as an N bit
- value.
-
- MAXn, MINn: The upper and lower bound of a signed, two's
- complement N bit value.
-
- UMAXn: The upper bound of an unsigned N bit value (the lower
- bound is always zero).
-
- Un: UMAXn + 1. Unsigned arrithmetic is computed `modulo (Un)'.
-
- X[p]: Is bit P of X. X[0] denotes the least signifant bit.
-
- ~X[p]: Is the inversion of bit X[p]. Also equal to 1-X[p],
- (1+X[p])mod(2).
-
-
-
- Addition - Overflow - Introduction:
-
-
- Overflow/Overflow indicates an error in computation of signed
- arrithmetic. i.e. given X,Y in [MINn..MAXn]; overflow
- indicates that the result X+Y > MAXn or X+Y < MIN_INTx.
-
- Hardware traditionally implements overflow by computing the XOR of
- carry-in/carry-out of the most significant bit of the ALU. Here
- other methods need to be found.
-
-
-
- Addition - Overflow - method 1:
-
-
- Overflow occures when the sign (most significant bit) of the two N
- bit operands is identical but different to the sign of the result:
-
- Rn = (Xn + Yn)
- V = MSBn (~(Xn ^ Yn) & (Rn ^ Xn))
-
-
-
- Addition - Overflow - method 2:
-
-
- The two N bit operands are sign extended to M>N bits and then
- added. Overflow occures when SIGN_BIT<n> and SIGN_BIT<m> do not
- match.
-
- Rm = (SEXTn (Xn) + SEXTn (Yn))
- V = MSBn ((Rm >> (M - N)) ^ Rm)
-
-
-
- Addition - Overflow - method 3:
-
-
- The two N bit operands are sign extended to M>N bits and then
- added. Overflow occures when the result is outside of the sign
- extended range [MINn .. MAXn].
-
-
-
- Addition - Overflow - method 4:
-
-
- Given the Result and Carry-out bits, the oVerflow from the addition
- of X, Y and carry-In can be computed using the equation:
-
- Rn = (Xn + Yn)
- V = (MSBn ((Xn ^ Yn) ^ Rn)) ^ C)
-
- As shown in the table below:
-
- I X Y R C | V | X^Y ^R ^C
- ---------------+---+-------------
- 0 0 0 0 0 | 0 | 0 0 0
- 0 0 1 1 0 | 0 | 1 0 0
- 0 1 0 1 0 | 0 | 1 0 0
- 0 1 1 0 1 | 1 | 0 0 1
- 1 0 0 1 0 | 1 | 0 1 1
- 1 0 1 0 1 | 0 | 1 1 0
- 1 1 0 0 1 | 0 | 1 1 0
- 1 1 1 1 1 | 0 | 0 1 0
-
-
-
- Addition - Carry - Introduction:
-
-
- Carry (poorly named) indicates that an overflow occured for
- unsigned N bit addition. i.e. given X, Y in [0..UMAXn] then
- carry indicates X+Y > UMAXn or X+Y >= Un.
-
- The following table lists the output for all given inputs into a
- full-adder.
-
- I X Y R | C
- ------------+---
- 0 0 0 0 | 0
- 0 0 1 1 | 0
- 0 1 0 1 | 0
- 0 1 1 0 | 1
- 1 0 0 1 | 0
- 1 0 1 0 | 1
- 1 1 0 0 | 1
- 1 1 1 1 | 1
-
- (carry-In, X, Y, Result, Carry-out):
-
-
-
- Addition - Carry - method 1:
-
-
- Looking at the terms X, Y and R we want an equation for C.
-
- XY\R 0 1
- +-------
- 00 | 0 0
- 01 | 1 0
- 11 | 1 1
- 10 | 1 0
-
- This giving us the sum-of-prod equation:
-
- MSBn ((Xn & Yn) | (Xn & ~Rn) | (Yn & ~Rn))
-
- Verifying:
-
- I X Y R | C | X&Y X&~R Y&~R
- ------------+---+---------------
- 0 0 0 0 | 0 | 0 0 0
- 0 0 1 1 | 0 | 0 0 0
- 0 1 0 1 | 0 | 0 0 0
- 0 1 1 0 | 1 | 1 1 1
- 1 0 0 1 | 0 | 0 0 0
- 1 0 1 0 | 1 | 0 0 1
- 1 1 0 0 | 1 | 0 1 0
- 1 1 1 1 | 1 | 1 0 0
-
-
-
- Addition - Carry - method 2:
-
-
- Given two signed N bit numbers, a carry can be detected by treating
- the numbers as N bit unsigned and adding them using M>N unsigned
- arrithmetic. Carry is indicated by bit (1 << N) being set (result
- >= 2**N).
-
-
-
- Addition - Carry - method 3:
-
-
- Given the oVerflow bit. The carry can be computed from:
-
- (~R&V) | (R&V)
-
-
-
- Addition - Carry - method 4:
-
- Given two signed numbers. Treating them as unsigned we have:
-
- 0 <= X < Un, 0 <= Y < Un
- ==> X + Y < 2 Un
-
- Consider Y when carry occures:
-
- X + Y >= Un, Y < Un
- ==> (Un - X) <= Y < Un # re-arange
- ==> Un <= X + Y < Un + X < 2 Un # add Xn
- ==> 0 <= (X + Y) mod Un < X mod Un
-
- or when carry as occured:
-
- (X + Y) mod Un < X mod Un
-
- Consider Y when carry does not occure:
-
- X + Y < Un
- have X < Un, Y >= 0
- ==> X <= X + Y < Un
- ==> X mod Un <= (X + Y) mod Un
-
- or when carry has not occured:
-
- ! ( (X + Y) mod Un < X mod Un)
-
- hence we get carry by computing in N bit unsigned arrithmetic.
-
- carry <- (Xn + Yn) < Xn
-
-
-
- Subtraction - Introduction
-
-
- There are two different ways of computing the signed two's
- complement difference of two numbers. The first is based on
- negative addition, the second on direct subtraction.
-
-
-
- Subtraction - Carry - Introduction - Negated Addition
-
-
- The equation X - Y can be computed using:
-
- X + (-Y)
- ==> X + ~Y + 1 # -Y = ~Y + 1
-
- In addition to the result, the equation produces Carry-out. For
- succeeding extended prrcision calculations, the more general
- equation can be used:
-
- C[p]:R[p] = X[p] + ~Y[p] + C[p-1]
- where C[0]:R[0] = X[0] + ~Y[0] + 1
-
-
-
- Subtraction - Borrow - Introduction - Direct Subtraction
-
-
- The alternative to negative addition is direct subtraction where
- `X-Y is computed directly. In addition to the result of the
- calculation, a Borrow bit is produced. In general terms:
-
- B[p]:R[p] = X[p] - Y[p] - B[p-1]
- where B[0]:R[0] = X[0] - Y[0]
-
- The Borrow bit is the complement of the Carry bit produced by
- Negated Addition above. A dodgy proof follows:
-
- Case 0:
- C[0]:R[0] = X[0] + ~Y[0] + 1
- ==> C[0]:R[0] = X[0] + 1 - Y[0] + 1 # ~Y[0] = (1 - Y[0])?
- ==> C[0]:R[0] = 2 + X[0] - Y[0]
- ==> C[0]:R[0] = 2 + B[0]:R[0]
- ==> C[0]:R[0] = (1 + B[0]):R[0]
- ==> C[0] = ~B[0] # (1 + B[0]) mod 2 = ~B[0]?
-
- Case P:
- C[p]:R[p] = X[p] + ~Y[p] + C[p-1]
- ==> C[p]:R[p] = X[p] + 1 - Y[0] + 1 - B[p-1]
- ==> C[p]:R[p] = 2 + X[p] - Y[0] - B[p-1]
- ==> C[p]:R[p] = 2 + B[p]:R[p]
- ==> C[p]:R[p] = (1 + B[p]):R[p]
- ==> C[p] = ~B[p]
-
- The table below lists all possible inputs/outputs for a
- full-subtractor:
-
- X Y I | R B
- 0 0 0 | 0 0
- 0 0 1 | 1 1
- 0 1 0 | 1 1
- 0 1 1 | 0 1
- 1 0 0 | 1 0
- 1 0 1 | 0 0
- 1 1 0 | 0 0
- 1 1 1 | 1 1
-
-
-
- Subtraction - Method 1
-
-
- Treating Xn and Yn as unsigned values then a borrow (unsigned
- underflow) occures when:
-
- B = Xn < Yn
- ==> C = Xn >= Yn
-
- */
-
-
-
-/* 8 bit target expressions:
-
- Since the host's natural bitsize > 8 bits, carry method 2 and
- overflow method 2 are used. */
-
-#define ALU8_BEGIN(VAL) \
-unsigned alu8_cr = (unsigned8) (VAL); \
-signed alu8_vr = (signed8) (alu8_cr)
-
-#define ALU8_SET(VAL) \
-alu8_cr = (unsigned8) (VAL); \
-alu8_vr = (signed8) (alu8_cr)
-
-#define ALU8_SET_CARRY_BORROW(CARRY) \
-do { \
- if (CARRY) \
- alu8_cr |= ((signed)-1) << 8; \
- else \
- alu8_cr &= 0xff; \
-} while (0)
-
-#define ALU8_HAD_CARRY_BORROW (alu8_cr & LSBIT32(8))
-#define ALU8_HAD_OVERFLOW (((alu8_vr >> 8) ^ alu8_vr) & LSBIT32 (8-1))
-
-#define ALU8_RESULT ((unsigned8) alu8_cr)
-#define ALU8_CARRY_BORROW_RESULT ((unsigned8) alu8_cr)
-#define ALU8_OVERFLOW_RESULT ((unsigned8) alu8_vr)
-
-/* #define ALU8_END ????? - target dependant */
-
-
-
-/* 16 bit target expressions:
-
- Since the host's natural bitsize > 16 bits, carry method 2 and
- overflow method 2 are used. */
-
-#define ALU16_BEGIN(VAL) \
-signed alu16_cr = (unsigned16) (VAL); \
-unsigned alu16_vr = (signed16) (alu16_cr)
-
-#define ALU16_SET(VAL) \
-alu16_cr = (unsigned16) (VAL); \
-alu16_vr = (signed16) (alu16_cr)
-
-#define ALU16_SET_CARRY_BORROW(CARRY) \
-do { \
- if (CARRY) \
- alu16_cr |= ((signed)-1) << 16; \
- else \
- alu16_cr &= 0xffff; \
-} while (0)
-
-#define ALU16_HAD_CARRY_BORROW (alu16_cr & LSBIT32(16))
-#define ALU16_HAD_OVERFLOW (((alu16_vr >> 16) ^ alu16_vr) & LSBIT32 (16-1))
-
-#define ALU16_RESULT ((unsigned16) alu16_cr)
-#define ALU16_CARRY_BORROW_RESULT ((unsigned16) alu16_cr)
-#define ALU16_OVERFLOW_RESULT ((unsigned16) alu16_vr)
-
-/* #define ALU16_END ????? - target dependant */
-
-
-
-/* 32 bit target expressions:
-
- Since most hosts do not support 64 (> 32) bit arrithmetic, carry
- method 4 and overflow method 4 are used. */
-
-#define ALU32_BEGIN(VAL) \
-unsigned32 alu32_r = (VAL); \
-int alu32_c = 0; \
-int alu32_v = 0
-
-#define ALU32_SET(VAL) \
-alu32_r = (VAL); \
-alu32_c = 0; \
-alu32_v = 0
-
-#define ALU32_SET_CARRY_BORROW(CARRY) alu32_c = (CARRY)
-
-#define ALU32_HAD_CARRY_BORROW (alu32_c)
-#define ALU32_HAD_OVERFLOW (alu32_v)
-
-#define ALU32_RESULT (alu32_r)
-#define ALU32_CARRY_BORROW_RESULT (alu32_r)
-#define ALU32_OVERFLOW_RESULT (alu32_r)
-
-
-
-/* 64 bit target expressions:
-
- Even though the host typically doesn't support native 64 bit
- arrithmetic, it is still used. */
-
-#define ALU64_BEGIN(VAL) \
-unsigned64 alu64_r = (VAL); \
-int alu64_c = 0; \
-int alu64_v = 0
-
-#define ALU64_SET(VAL) \
-alu64_r = (VAL); \
-alu64_c = 0; \
-alu64_v = 0
-
-#define ALU64_SET_CARRY_BORROW(CARRY) alu64_c = (CARRY)
-
-#define ALU64_HAD_CARRY_BORROW (alu64_c)
-#define ALU64_HAD_OVERFLOW (alu64_v)
-
-#define ALU64_RESULT (alu64_r)
-#define ALU64_CARRY_BORROW_RESULT (alu64_r)
-#define ALU64_OVERFLOW_RESULT (alu64_r)
-
-
-
-/* Generic versions of above macros */
-
-#define ALU_BEGIN XCONCAT3(ALU,WITH_TARGET_WORD_BITSIZE,_BEGIN)
-#define ALU_SET XCONCAT3(ALU,WITH_TARGET_WORD_BITSIZE,_SET)
-#define ALU_SET_CARRY XCONCAT3(ALU,WITH_TARGET_WORD_BITSIZE,_SET_CARRY)
-
-#define ALU_HAD_OVERFLOW XCONCAT3(ALU,WITH_TARGET_WORD_BITSIZE,_HAD_OVERFLOW)
-#define ALU_HAD_CARRY XCONCAT3(ALU,WITH_TARGET_WORD_BITSIZE,_HAD_CARRY)
-
-#define ALU_RESULT XCONCAT3(ALU,WITH_TARGET_WORD_BITSIZE,_RESULT)
-#define ALU_OVERFLOW_RESULT XCONCAT3(ALU,WITH_TARGET_WORD_BITSIZE,_OVERFLOW_RESULT)
-#define ALU_CARRY_RESULT XCONCAT3(ALU,WITH_TARGET_WORD_BITSIZE,_CARRY_RESULT)
-
-
-
-/* Basic operation - add (overflowing) */
-
-#define ALU8_ADD(VAL) \
-do { \
- unsigned8 alu8add_val = (VAL); \
- ALU8_ADDC (alu8add_val); \
-} while (0)
-
-#define ALU16_ADD(VAL) \
-do { \
- unsigned16 alu16add_val = (VAL); \
- ALU16_ADDC (alu8add_val); \
-} while (0)
-
-#define ALU32_ADD(VAL) \
-do { \
- unsigned32 alu32add_val = (VAL); \
- ALU32_ADDC (alu32add_val); \
-} while (0)
-
-#define ALU64_ADD(VAL) \
-do { \
- unsigned64 alu64add_val = (unsigned64) (VAL); \
- ALU64_ADDC (alu64add_val); \
-} while (0)
-
-#define ALU_ADD XCONCAT3(ALU,WITH_TARGET_WORD_BITSIZE,_ADD)
-
-
-
-/* Basic operation - add carrying (and overflowing) */
-
-#define ALU8_ADDC(VAL) \
-do { \
- unsigned8 alu8addc_val = (VAL); \
- alu8_cr += (unsigned8)(alu8addc_val); \
- alu8_vr += (signed8)(alu8addc_val); \
-} while (0)
-
-#define ALU16_ADDC(VAL) \
-do { \
- unsigned16 alu16addc_val = (VAL); \
- alu16_cr += (unsigned16)(alu16addc_val); \
- alu16_vr += (signed16)(alu16addc_val); \
-} while (0)
-
-#define ALU32_ADDC(VAL) \
-do { \
- unsigned32 alu32addc_val = (VAL); \
- unsigned32 alu32addc_sign = alu32addc_val ^ alu32_r; \
- alu32_r += (alu32addc_val); \
- alu32_c = (alu32_r < alu32addc_val); \
- alu32_v = ((alu32addc_sign ^ - (unsigned32)alu32_c) ^ alu32_r) >> 31; \
-} while (0)
-
-#define ALU64_ADDC(VAL) \
-do { \
- unsigned64 alu64addc_val = (unsigned64) (VAL); \
- unsigned64 alu64addc_sign = alu64addc_val ^ alu64_r; \
- alu64_r += (alu64addc_val); \
- alu64_c = (alu64_r < alu64addc_val); \
- alu64_v = ((alu64addc_sign ^ - (unsigned64)alu64_c) ^ alu64_r) >> 63; \
-} while (0)
-
-#define ALU_ADDC XCONCAT3(ALU,WITH_TARGET_WORD_BITSIZE,_ADDC)
-
-
-
-/* Compound operation - add carrying (and overflowing) with carry-in */
-
-#define ALU8_ADDC_C(VAL,C) \
-do { \
- unsigned8 alu8addcc_val = (VAL); \
- unsigned8 alu8addcc_c = (C); \
- alu8_cr += (unsigned)(unsigned8)alu8addcc_val + alu8addcc_c; \
- alu8_vr += (signed)(signed8)(alu8addcc_val) + alu8addcc_c; \
-} while (0)
-
-#define ALU16_ADDC_C(VAL,C) \
-do { \
- unsigned16 alu16addcc_val = (VAL); \
- unsigned16 alu16addcc_c = (C); \
- alu16_cr += (unsigned)(unsigned16)alu16addcc_val + alu16addcc_c; \
- alu16_vr += (signed)(signed16)(alu16addcc_val) + alu16addcc_c; \
-} while (0)
-
-#define ALU32_ADDC_C(VAL,C) \
-do { \
- unsigned32 alu32addcc_val = (VAL); \
- unsigned32 alu32addcc_c = (C); \
- unsigned32 alu32addcc_sign = (alu32addcc_val ^ alu32_r); \
- alu32_r += (alu32addcc_val + alu32addcc_c); \
- alu32_c = ((alu32_r < alu32addcc_val) \
- || (alu32addcc_c && alu32_r == alu32addcc_val)); \
- alu32_v = ((alu32addcc_sign ^ - (unsigned32)alu32_c) ^ alu32_r) >> 31;\
-} while (0)
-
-#define ALU64_ADDC_C(VAL,C) \
-do { \
- unsigned64 alu64addcc_val = (VAL); \
- unsigned64 alu64addcc_c = (C); \
- unsigned64 alu64addcc_sign = (alu64addcc_val ^ alu64_r); \
- alu64_r += (alu64addcc_val + alu64addcc_c); \
- alu64_c = ((alu64_r < alu64addcc_val) \
- || (alu64addcc_c && alu64_r == alu64addcc_val)); \
- alu64_v = ((alu64addcc_sign ^ - (unsigned64)alu64_c) ^ alu64_r) >> 63;\
-} while (0)
-
-#define ALU_ADDC_C XCONCAT3(ALU,WITH_TARGET_WORD_BITSIZE,_ADDC_C)
-
-
-
-/* Basic operation - subtract (overflowing) */
-
-#define ALU8_SUB(VAL) \
-do { \
- unsigned8 alu8sub_val = (VAL); \
- ALU8_ADDC_C (~alu8sub_val, 1); \
-} while (0)
-
-#define ALU16_SUB(VAL) \
-do { \
- unsigned16 alu16sub_val = (VAL); \
- ALU16_ADDC_C (~alu16sub_val, 1); \
-} while (0)
-
-#define ALU32_SUB(VAL) \
-do { \
- unsigned32 alu32sub_val = (VAL); \
- ALU32_ADDC_C (~alu32sub_val, 1); \
-} while (0)
-
-#define ALU64_SUB(VAL) \
-do { \
- unsigned64 alu64sub_val = (VAL); \
- ALU64_ADDC_C (~alu64sub_val, 1); \
-} while (0)
-
-#define ALU_SUB XCONCAT3(ALU,WITH_TARGET_WORD_BITSIZE,_SUB)
-
-
-
-/* Basic operation - subtract carrying (and overflowing) */
-
-#define ALU8_SUBC(VAL) \
-do { \
- unsigned8 alu8subc_val = (VAL); \
- ALU8_ADDC_C (~alu8subc_val, 1); \
-} while (0)
-
-#define ALU16_SUBC(VAL) \
-do { \
- unsigned16 alu16subc_val = (VAL); \
- ALU16_ADDC_C (~alu16subc_val, 1); \
-} while (0)
-
-#define ALU32_SUBC(VAL) \
-do { \
- unsigned32 alu32subc_val = (VAL); \
- ALU32_ADDC_C (~alu32subc_val, 1); \
-} while (0)
-
-#define ALU64_SUBC(VAL) \
-do { \
- unsigned64 alu64subc_val = (VAL); \
- ALU64_ADDC_C (~alu64subc_val, 1); \
-} while (0)
-
-#define ALU_SUBC XCONCAT3(ALU,WITH_TARGET_WORD_BITSIZE,_SUBC)
-
-
-
-/* Compound operation - subtract carrying (and overflowing), extended */
-
-#define ALU8_SUBC_X(VAL,C) \
-do { \
- unsigned8 alu8subcx_val = (VAL); \
- unsigned8 alu8subcx_c = (C); \
- ALU8_ADDC_C (~alu8subcx_val, alu8subcx_c); \
-} while (0)
-
-#define ALU16_SUBC_X(VAL,C) \
-do { \
- unsigned16 alu16subcx_val = (VAL); \
- unsigned16 alu16subcx_c = (C); \
- ALU16_ADDC_C (~alu16subcx_val, alu16subcx_c); \
-} while (0)
-
-#define ALU32_SUBC_X(VAL,C) \
-do { \
- unsigned32 alu32subcx_val = (VAL); \
- unsigned32 alu32subcx_c = (C); \
- ALU32_ADDC_C (~alu32subcx_val, alu32subcx_c); \
-} while (0)
-
-#define ALU64_SUBC_X(VAL,C) \
-do { \
- unsigned64 alu64subcx_val = (VAL); \
- unsigned64 alu64subcx_c = (C); \
- ALU64_ADDC_C (~alu64subcx_val, alu64subcx_c); \
-} while (0)
-
-#define ALU_SUBC_X XCONCAT3(ALU,WITH_TARGET_WORD_BITSIZE,_SUBC_X)
-
-
-
-/* Basic operation - subtract borrowing (and overflowing) */
-
-#define ALU8_SUBB(VAL) \
-do { \
- unsigned8 alu8subb_val = (VAL); \
- alu8_cr -= (unsigned)(unsigned8)alu8subb_val; \
- alu8_vr -= (signed)(signed8)alu8subb_val; \
-} while (0)
-
-#define ALU16_SUBB(VAL) \
-do { \
- unsigned16 alu16subb_val = (VAL); \
- alu16_cr -= (unsigned)(unsigned16)alu16subb_val; \
- alu16_vr -= (signed)(signed16)alu16subb_val; \
-} while (0)
-
-#define ALU32_SUBB(VAL) \
-do { \
- unsigned32 alu32subb_val = (VAL); \
- unsigned32 alu32subb_sign = alu32subb_val ^ alu32_r; \
- alu32_c = (alu32_r < alu32subb_val); \
- alu32_r -= (alu32subb_val); \
- alu32_v = ((alu32subb_sign ^ - (unsigned32)alu32_c) ^ alu32_r) >> 31; \
-} while (0)
-
-#define ALU64_SUBB(VAL) \
-do { \
- unsigned64 alu64subb_val = (VAL); \
- unsigned64 alu64subb_sign = alu64subb_val ^ alu64_r; \
- alu64_c = (alu64_r < alu64subb_val); \
- alu64_r -= (alu64subb_val); \
- alu64_v = ((alu64subb_sign ^ - (unsigned64)alu64_c) ^ alu64_r) >> 31; \
-} while (0)
-
-#define ALU_SUBB XCONCAT3(ALU,WITH_TARGET_WORD_BITSIZE,_SUBB)
-
-
-
-/* Compound operation - subtract borrowing (and overflowing) with borrow-in */
-
-#define ALU8_SUBB_B(VAL,B) \
-do { \
- unsigned8 alu8subbb_val = (VAL); \
- unsigned8 alu8subbb_b = (B); \
- alu8_cr -= (unsigned)(unsigned8)alu8subbb_val; \
- alu8_cr -= (unsigned)(unsigned8)alu8subbb_b; \
- alu8_vr -= (signed)(signed8)alu8subbb_val + alu8subbb_b; \
-} while (0)
-
-#define ALU16_SUBB_B(VAL,B) \
-do { \
- unsigned16 alu16subbb_val = (VAL); \
- unsigned16 alu16subbb_b = (B); \
- alu16_cr -= (unsigned)(unsigned16)alu16subbb_val; \
- alu16_cr -= (unsigned)(unsigned16)alu16subbb_b; \
- alu16_vr -= (signed)(signed16)alu16subbb_val + alu16subbb_b; \
-} while (0)
-
-#define ALU32_SUBB_B(VAL,B) \
-do { \
- unsigned32 alu32subbb_val = (VAL); \
- unsigned32 alu32subbb_b = (B); \
- ALU32_ADDC_C (~alu32subbb_val, !alu32subbb_b); \
- alu32_c = !alu32_c; \
-} while (0)
-
-#define ALU64_SUBB_B(VAL,B) \
-do { \
- unsigned64 alu64subbb_val = (VAL); \
- unsigned64 alu64subbb_b = (B); \
- ALU64_ADDC_C (~alu64subbb_val, !alu64subbb_b); \
- alu64_c = !alu64_c; \
-} while (0)
-
-#define ALU_SUBB_B XCONCAT3(ALU,WITH_TARGET_WORD_BITSIZE,_SUBB_B)
-
-
-
-/* Basic operation - negate (overflowing) */
-
-#define ALU8_NEG() \
-do { \
- signed alu8neg_val = (ALU8_RESULT); \
- ALU8_SET (1); \
- ALU8_ADDC (~alu8neg_val); \
-} while (0)
-
-#define ALU16_NEG() \
-do { \
- signed alu16neg_val = (ALU16_RESULT); \
- ALU16_SET (1); \
- ALU16_ADDC (~alu16neg_val); \
-} while (0)
-
-#define ALU32_NEG() \
-do { \
- unsigned32 alu32neg_val = (ALU32_RESULT); \
- ALU32_SET (1); \
- ALU32_ADDC (~alu32neg_val); \
-} while(0)
-
-#define ALU64_NEG() \
-do { \
- unsigned64 alu64neg_val = (ALU64_RESULT); \
- ALU64_SET (1); \
- ALU64_ADDC (~alu64neg_val); \
-} while (0)
-
-#define ALU_NEG XCONCAT3(ALU,WITH_TARGET_WORD_BITSIZE,_NEG)
-
-
-
-
-/* Basic operation - negate carrying (and overflowing) */
-
-#define ALU8_NEGC() \
-do { \
- signed alu8negc_val = (ALU8_RESULT); \
- ALU8_SET (1); \
- ALU8_ADDC (~alu8negc_val); \
-} while (0)
-
-#define ALU16_NEGC() \
-do { \
- signed alu16negc_val = (ALU16_RESULT); \
- ALU16_SET (1); \
- ALU16_ADDC (~alu16negc_val); \
-} while (0)
-
-#define ALU32_NEGC() \
-do { \
- unsigned32 alu32negc_val = (ALU32_RESULT); \
- ALU32_SET (1); \
- ALU32_ADDC (~alu32negc_val); \
-} while(0)
-
-#define ALU64_NEGC() \
-do { \
- unsigned64 alu64negc_val = (ALU64_RESULT); \
- ALU64_SET (1); \
- ALU64_ADDC (~alu64negc_val); \
-} while (0)
-
-#define ALU_NEGC XCONCAT3(ALU,WITH_TARGET_WORD_BITSIZE,_NEGC)
-
-
-
-
-/* Basic operation - negate borrowing (and overflowing) */
-
-#define ALU8_NEGB() \
-do { \
- signed alu8negb_val = (ALU8_RESULT); \
- ALU8_SET (0); \
- ALU8_SUBB (alu8negb_val); \
-} while (0)
-
-#define ALU16_NEGB() \
-do { \
- signed alu16negb_val = (ALU16_RESULT); \
- ALU16_SET (0); \
- ALU16_SUBB (alu16negb_val); \
-} while (0)
-
-#define ALU32_NEGB() \
-do { \
- unsigned32 alu32negb_val = (ALU32_RESULT); \
- ALU32_SET (0); \
- ALU32_SUBB (alu32negb_val); \
-} while(0)
-
-#define ALU64_NEGB() \
-do { \
- unsigned64 alu64negb_val = (ALU64_RESULT); \
- ALU64_SET (0); \
- ALU64_SUBB (alu64negb_val); \
-} while (0)
-
-#define ALU_NEGB XCONCAT3(ALU,WITH_TARGET_WORD_BITSIZE,_NEGB)
-
-
-
-
-/* Other */
-
-#define ALU8_OR(VAL) \
-do { \
- error("ALU16_OR"); \
-} while (0)
-
-#define ALU16_OR(VAL) \
-do { \
- error("ALU16_OR"); \
-} while (0)
-
-#define ALU32_OR(VAL) \
-do { \
- alu32_r |= (VAL); \
- alu32_c = 0; \
- alu32_v = 0; \
-} while (0)
-
-#define ALU64_OR(VAL) \
-do { \
- alu64_r |= (VAL); \
- alu64_c = 0; \
- alu64_v = 0; \
-} while (0)
-
-#define ALU_OR(VAL) XCONCAT3(ALU,WITH_TARGET_WORD_BITSIZE,_OR)(VAL)
-
-
-
-#define ALU16_XOR(VAL) \
-do { \
- error("ALU16_XOR"); \
-} while (0)
-
-#define ALU32_XOR(VAL) \
-do { \
- alu32_r ^= (VAL); \
- alu32_c = 0; \
- alu32_v = 0; \
-} while (0)
-
-#define ALU64_XOR(VAL) \
-do { \
- alu64_r ^= (VAL); \
- alu64_c = 0; \
- alu64_v = 0; \
-} while (0)
-
-#define ALU_XOR(VAL) XCONCAT3(ALU,WITH_TARGET_WORD_BITSIZE,_XOR)(VAL)
-
-
-
-
-#define ALU16_AND(VAL) \
-do { \
- error("ALU_AND16"); \
-} while (0)
-
-#define ALU32_AND(VAL) \
-do { \
- alu32_r &= (VAL); \
- alu32_r = 0; \
- alu32_v = 0; \
-} while (0)
-
-#define ALU64_AND(VAL) \
-do { \
- alu64_r &= (VAL); \
- alu64_r = 0; \
- alu64_v = 0; \
-} while (0)
-
-#define ALU_AND(VAL) XCONCAT3(ALU,WITH_TARGET_WORD_BITSIZE,_AND)(VAL)
-
-
-
-
-#define ALU16_NOT(VAL) \
-do { \
- error("ALU_NOT16"); \
-} while (0)
-
-#define ALU32_NOT \
-do { \
- alu32_r = ~alu32_r; \
- alu32_c = 0; \
- alu32_v = 0; \
-} while (0)
-
-#define ALU64_NOT \
-do { \
- alu64_r = ~alu64_r; \
- alu64_c = 0; \
- alu64_v = 0; \
-} while (0)
-
-#define ALU_NOT XCONCAT3(ALU,WITH_TARGET_WORD_BITSIZE,_NOT)
-
-#endif
diff --git a/sim/common/sim-arange.c b/sim/common/sim-arange.c
deleted file mode 100644
index fc08113a468..00000000000
--- a/sim/common/sim-arange.c
+++ /dev/null
@@ -1,305 +0,0 @@
-/* Address ranges.
- Copyright (C) 1998 Free Software Foundation, Inc.
- Contributed by Cygnus Solutions.
-
-This file is part of the GNU Simulators.
-
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License along
-with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
-
-/* Tell sim-arange.h it's us. */
-#define SIM_ARANGE_C
-
-#include "libiberty.h"
-#include "sim-basics.h"
-#include "sim-assert.h"
-
-#ifdef HAVE_STDLIB_H
-#include <stdlib.h>
-#endif
-
-#ifdef HAVE_STRING_H
-#include <string.h>
-#endif
-
-#define DEFINE_INLINE_P (! defined (SIM_ARANGE_C_INCLUDED))
-#define DEFINE_NON_INLINE_P defined (SIM_ARANGE_C_INCLUDED)
-
-#if DEFINE_NON_INLINE_P
-
-/* Insert a range. */
-
-static void
-insert_range (ADDR_SUBRANGE **pos, ADDR_SUBRANGE *asr)
-{
- asr->next = *pos;
- *pos = asr;
-}
-
-/* Delete a range. */
-
-static void
-delete_range (ADDR_SUBRANGE **thisasrp)
-{
- ADDR_SUBRANGE *thisasr;
-
- thisasr = *thisasrp;
- *thisasrp = thisasr->next;
-
- free (thisasr);
-}
-
-/* Add or delete an address range.
- This code was borrowed from linux's locks.c:posix_lock_file().
- ??? Todo: Given our simpler needs this could be simplified
- (split into two fns). */
-
-static void
-frob_range (ADDR_RANGE *ar, address_word start, address_word end, int delete_p)
-{
- ADDR_SUBRANGE *asr;
- ADDR_SUBRANGE *new_asr, *new_asr2;
- ADDR_SUBRANGE *left = NULL;
- ADDR_SUBRANGE *right = NULL;
- ADDR_SUBRANGE **before;
- ADDR_SUBRANGE init_caller;
- ADDR_SUBRANGE *caller = &init_caller;
- int added_p = 0;
-
- memset (caller, 0, sizeof (ADDR_SUBRANGE));
- new_asr = ZALLOC (ADDR_SUBRANGE);
- new_asr2 = ZALLOC (ADDR_SUBRANGE);
-
- caller->start = start;
- caller->end = end;
- before = &ar->ranges;
-
- while ((asr = *before) != NULL)
- {
- if (! delete_p)
- {
- /* Try next range if current range preceeds new one and not
- adjacent or overlapping. */
- if (asr->end < caller->start - 1)
- goto next_range;
-
- /* Break out if new range preceeds current one and not
- adjacent or overlapping. */
- if (asr->start > caller->end + 1)
- break;
-
- /* If we come here, the new and current ranges are adjacent or
- overlapping. Make one range yielding from the lower start address
- of both ranges to the higher end address. */
- if (asr->start > caller->start)
- asr->start = caller->start;
- else
- caller->start = asr->start;
- if (asr->end < caller->end)
- asr->end = caller->end;
- else
- caller->end = asr->end;
-
- if (added_p)
- {
- delete_range (before);
- continue;
- }
- caller = asr;
- added_p = 1;
- }
- else /* deleting a range */
- {
- /* Try next range if current range preceeds new one. */
- if (asr->end < caller->start)
- goto next_range;
-
- /* Break out if new range preceeds current one. */
- if (asr->start > caller->end)
- break;
-
- added_p = 1;
-
- if (asr->start < caller->start)
- left = asr;
-
- /* If the next range in the list has a higher end
- address than the new one, insert the new one here. */
- if (asr->end > caller->end)
- {
- right = asr;
- break;
- }
- if (asr->start >= caller->start)
- {
- /* The new range completely replaces an old
- one (This may happen several times). */
- if (added_p)
- {
- delete_range (before);
- continue;
- }
-
- /* Replace the old range with the new one. */
- asr->start = caller->start;
- asr->end = caller->end;
- caller = asr;
- added_p = 1;
- }
- }
-
- /* Go on to next range. */
- next_range:
- before = &asr->next;
- }
-
- if (!added_p)
- {
- if (delete_p)
- goto out;
- new_asr->start = caller->start;
- new_asr->end = caller->end;
- insert_range (before, new_asr);
- new_asr = NULL;
- }
- if (right)
- {
- if (left == right)
- {
- /* The new range breaks the old one in two pieces,
- so we have to use the second new range. */
- new_asr2->start = right->start;
- new_asr2->end = right->end;
- left = new_asr2;
- insert_range (before, left);
- new_asr2 = NULL;
- }
- right->start = caller->end + 1;
- }
- if (left)
- {
- left->end = caller->start - 1;
- }
-
- out:
- if (new_asr)
- free(new_asr);
- if (new_asr2)
- free(new_asr2);
-}
-
-/* Free T and all subtrees. */
-
-static void
-free_search_tree (ADDR_RANGE_TREE *t)
-{
- if (t != NULL)
- {
- free_search_tree (t->lower);
- free_search_tree (t->higher);
- free (t);
- }
-}
-
-/* Subroutine of build_search_tree to recursively build a balanced tree.
- ??? It's not an optimum tree though. */
-
-static ADDR_RANGE_TREE *
-build_tree_1 (ADDR_SUBRANGE **asrtab, unsigned int n)
-{
- unsigned int mid = n / 2;
- ADDR_RANGE_TREE *t;
-
- if (n == 0)
- return NULL;
- t = (ADDR_RANGE_TREE *) xmalloc (sizeof (ADDR_RANGE_TREE));
- t->start = asrtab[mid]->start;
- t->end = asrtab[mid]->end;
- if (mid != 0)
- t->lower = build_tree_1 (asrtab, mid);
- else
- t->lower = NULL;
- if (n > mid + 1)
- t->higher = build_tree_1 (asrtab + mid + 1, n - mid - 1);
- else
- t->higher = NULL;
- return t;
-}
-
-/* Build a search tree for address range AR. */
-
-static void
-build_search_tree (ADDR_RANGE *ar)
-{
- /* ??? Simple version for now. */
- ADDR_SUBRANGE *asr,**asrtab;
- unsigned int i, n;
-
- for (n = 0, asr = ar->ranges; asr != NULL; ++n, asr = asr->next)
- continue;
- asrtab = (ADDR_SUBRANGE **) xmalloc (n * sizeof (ADDR_SUBRANGE *));
- for (i = 0, asr = ar->ranges; i < n; ++i, asr = asr->next)
- asrtab[i] = asr;
- ar->range_tree = build_tree_1 (asrtab, n);
- free (asrtab);
-}
-
-void
-sim_addr_range_add (ADDR_RANGE *ar, address_word start, address_word end)
-{
- frob_range (ar, start, end, 0);
-
- /* Rebuild the search tree. */
- /* ??? Instead of rebuilding it here it could be done in a module resume
- handler, say by first checking for a `changed' flag, assuming of course
- this would never be done while the simulation is running. */
- free_search_tree (ar->range_tree);
- build_search_tree (ar);
-}
-
-void
-sim_addr_range_delete (ADDR_RANGE *ar, address_word start, address_word end)
-{
- frob_range (ar, start, end, 1);
-
- /* Rebuild the search tree. */
- /* ??? Instead of rebuilding it here it could be done in a module resume
- handler, say by first checking for a `changed' flag, assuming of course
- this would never be done while the simulation is running. */
- free_search_tree (ar->range_tree);
- build_search_tree (ar);
-}
-
-#endif /* DEFINE_NON_INLINE_P */
-
-#if DEFINE_INLINE_P
-
-SIM_ARANGE_INLINE int
-sim_addr_range_hit_p (ADDR_RANGE *ar, address_word addr)
-{
- ADDR_RANGE_TREE *t = ar->range_tree;
-
- while (t != NULL)
- {
- if (addr < t->start)
- t = t->lower;
- else if (addr > t->end)
- t = t->higher;
- else
- return 1;
- }
- return 0;
-}
-
-#endif /* DEFINE_INLINE_P */
diff --git a/sim/common/sim-arange.h b/sim/common/sim-arange.h
deleted file mode 100644
index 10ba0f4e7bd..00000000000
--- a/sim/common/sim-arange.h
+++ /dev/null
@@ -1,83 +0,0 @@
-/* Address ranges.
- Copyright (C) 1998 Free Software Foundation, Inc.
- Contributed by Cygnus Solutions.
-
-This file is part of the GNU Simulators.
-
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License along
-with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
-
-/* This file is meant to be included by sim-basics.h. */
-
-#ifndef SIM_ARANGE_H
-#define SIM_ARANGE_H
-
-/* A list of address ranges. */
-
-typedef struct _addr_subrange {
- struct _addr_subrange *next;
-
- /* Range of addresses to be traced is [start,end]. */
- address_word start,end;
-} ADDR_SUBRANGE;
-
-/* For speed, searching is done on a tree. */
-
-typedef struct _addr_range_tree {
- struct _addr_range_tree *lower;
- struct _addr_range_tree *higher;
-
- /* Range of addresses to be traced is [start,end]. */
- address_word start,end;
-} ADDR_RANGE_TREE;
-
-/* The top level struct. */
-
-typedef struct _addr_range {
- ADDR_SUBRANGE *ranges;
-#define ADDR_RANGE_RANGES(ar) ((ar)->ranges)
- ADDR_RANGE_TREE *range_tree;
-#define ADDR_RANGE_TREE(ar) ((ar)->range_tree)
-} ADDR_RANGE;
-
-/* Add address range START,END to AR. */
-extern void sim_addr_range_add (ADDR_RANGE * /*ar*/,
- address_word /*start*/,
- address_word /*end*/);
-
-/* Delete address range START,END from AR. */
-extern void sim_addr_range_delete (ADDR_RANGE * /*ar*/,
- address_word /*start*/,
- address_word /*end*/);
-
-/* Return non-zero if ADDR is in range AR, traversing the entire tree.
- If no range is specified, that is defined to mean "everything". */
-extern INLINE int
-sim_addr_range_hit_p (ADDR_RANGE * /*ar*/, address_word /*addr*/);
-#define ADDR_RANGE_HIT_P(ar, addr) \
- ((ar)->range_tree == NULL || sim_addr_range_hit_p ((ar), (addr)))
-
-#ifdef HAVE_INLINE
-#ifdef SIM_ARANGE_C
-#define SIM_ARANGE_INLINE INLINE
-#else
-#define SIM_ARANGE_INLINE EXTERN_INLINE
-#endif
-#include "sim-arange.c"
-#else
-#define SIM_ARANGE_INLINE
-#endif
-#define SIM_ARANGE_C_INCLUDED
-
-#endif /* SIM_ARANGE_H */
diff --git a/sim/common/sim-assert.h b/sim/common/sim-assert.h
deleted file mode 100644
index 0274084c008..00000000000
--- a/sim/common/sim-assert.h
+++ /dev/null
@@ -1,90 +0,0 @@
-/* This file is part of the program GDB.
-
- Copyright (C) 1997, Free Software Foundation, Inc.
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-#ifndef _SIM_ASSERT_H_
-#define _SIM_ASSERT_H_
-
-#define SIM_FILTER_PATH(FILE, PATH) \
-do \
- { \
- /* strip leading path */ \
- const char *p = (PATH); \
- (FILE) = p; \
- while (*p != '\0' && *p != ':') \
- { \
- if (*p == '/') \
- (FILE) = p + 1; \
- p++; \
- } \
- } \
-while (0)
-
-/* The subtle difference between SIM_ASSERT and ASSERT is that
- SIM_ASSERT passes `sd' to sim_io_error for the SIM_DESC,
- ASSERT passes NULL. */
-
-#if !defined (SIM_ASSERT)
-#if defined (WITH_ASSERT)
-#define SIM_ASSERT(EXPRESSION) \
-do \
- { \
- if (WITH_ASSERT) \
- { \
- if (!(EXPRESSION)) \
- { \
- /* report the failure */ \
- const char *file; \
- SIM_FILTER_PATH(file, __FILE__); \
- sim_io_error (sd, "%s:%d: assertion failed - %s", \
- file, __LINE__, #EXPRESSION); \
- } \
- } \
- } \
-while (0)
-#else
-#define SIM_ASSERT(EXPRESSION) do { /*nothing*/; } while (0)
-#endif
-#endif
-
-#if !defined (ASSERT)
-#if defined (WITH_ASSERT)
-#define ASSERT(EXPRESSION) \
-do \
- { \
- if (WITH_ASSERT) \
- { \
- if (!(EXPRESSION)) \
- { \
- /* report the failure */ \
- const char *file; \
- SIM_FILTER_PATH(file, __FILE__); \
- sim_io_error (NULL, "%s:%d: assertion failed - %s", \
- file, __LINE__, #EXPRESSION); \
- } \
- } \
- } \
-while (0)
-#else
-#define ASSERT(EXPRESSION) do { /*nothing*/; } while (0)
-#endif
-#endif
-
-#endif
diff --git a/sim/common/sim-base.h b/sim/common/sim-base.h
deleted file mode 100644
index 420b137b6b2..00000000000
--- a/sim/common/sim-base.h
+++ /dev/null
@@ -1,256 +0,0 @@
-/* Simulator pseudo baseclass.
- Copyright (C) 1997-1998 Free Software Foundation, Inc.
- Contributed by Cygnus Support.
-
-This file is part of GDB, the GNU debugger.
-
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License along
-with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
-
-
-/* Simulator state pseudo baseclass.
-
- Each simulator is required to have the file ``sim-main.h''. That
- file includes ``sim-basics.h'', defines the base type ``sim_cia''
- (the data type that contains complete current instruction address
- information), include ``sim-base.h'':
-
- #include "sim-basics.h"
- typedef address_word sim_cia;
- /-* If `sim_cia' is not an integral value (e.g. a struct), define
- CIA_ADDR to return the integral value. *-/
- /-* #define CIA_ADDR(cia) (...) *-/
- #include "sim-base.h"
-
- finally, two data types `struct _sim_cpu' and `struct sim_state'
- are defined:
-
- struct _sim_cpu {
- ... simulator specific members ...
- sim_cpu_base base;
- };
-
- struct sim_state {
- sim_cpu cpu[MAX_NR_PROCESSORS];
- #if (WITH_SMP)
- #define STATE_CPU(sd,n) (&(sd)->cpu[n])
- #else
- #define STATE_CPU(sd,n) (&(sd)->cpu[0])
- #endif
- ... simulator specific members ...
- sim_state_base base;
- };
-
- Note that `base' appears last. This makes `base.magic' appear last
- in the entire struct and helps catch miscompilation errors. */
-
-
-#ifndef SIM_BASE_H
-#define SIM_BASE_H
-
-/* Pre-declare certain types. */
-
-/* typedef <target-dependant> sim_cia; */
-#ifndef NULL_CIA
-#define NULL_CIA ((sim_cia) 0)
-#endif
-/* Return the current instruction address as a number.
- Some targets treat the current instruction address as a struct
- (e.g. for delay slot handling). */
-#ifndef CIA_ADDR
-#define CIA_ADDR(cia) (cia)
-#endif
-#ifndef INVALID_INSTRUCTION_ADDRESS
-#define INVALID_INSTRUCTION_ADDRESS ((address_word)0 - 1)
-#endif
-
-typedef struct _sim_cpu sim_cpu;
-
-#include "sim-module.h"
-
-#include "sim-trace.h"
-#include "sim-core.h"
-#include "sim-events.h"
-#include "sim-profile.h"
-#ifdef SIM_HAVE_MODEL
-#include "sim-model.h"
-#endif
-#include "sim-io.h"
-#include "sim-engine.h"
-#include "sim-watch.h"
-#include "sim-memopt.h"
-#ifdef SIM_HAVE_BREAKPOINTS
-#include "sim-break.h"
-#endif
-#include "sim-cpu.h"
-
-/* Global pointer to current state while sim_resume is running.
- On a machine with lots of registers, it might be possible to reserve
- one of them for current_state. However on a machine with few registers
- current_state can't permanently live in one and indirecting through it
- will be slower [in which case one can have sim_resume set globals from
- current_state for faster access].
- If CURRENT_STATE_REG is defined, it means current_state is living in
- a global register. */
-
-
-#ifdef CURRENT_STATE_REG
-/* FIXME: wip */
-#else
-extern struct sim_state *current_state;
-#endif
-
-
-/* The simulator may provide different (and faster) definition. */
-#ifndef CURRENT_STATE
-#define CURRENT_STATE current_state
-#endif
-
-
-typedef struct {
-
- /* Simulator's argv[0]. */
- const char *my_name;
-#define STATE_MY_NAME(sd) ((sd)->base.my_name)
-
- /* Who opened the simulator. */
- SIM_OPEN_KIND open_kind;
-#define STATE_OPEN_KIND(sd) ((sd)->base.open_kind)
-
- /* The host callbacks. */
- struct host_callback_struct *callback;
-#define STATE_CALLBACK(sd) ((sd)->base.callback)
-
- /* The type of simulation environment (user/operating). */
- enum sim_environment environment;
-#define STATE_ENVIRONMENT(sd) ((sd)->base.environment)
-
-#if 0 /* FIXME: Not ready yet. */
- /* Stuff defined in sim-config.h. */
- struct sim_config config;
-#define STATE_CONFIG(sd) ((sd)->base.config)
-#endif
-
- /* List of installed module `init' handlers. */
- struct module_list *modules;
-#define STATE_MODULES(sd) ((sd)->base.modules)
-
- /* Supported options. */
- struct option_list *options;
-#define STATE_OPTIONS(sd) ((sd)->base.options)
-
- /* Non-zero if -v specified. */
- int verbose_p;
-#define STATE_VERBOSE_P(sd) ((sd)->base.verbose_p)
-
- /* Non cpu-specific trace data. See sim-trace.h. */
- TRACE_DATA trace_data;
-#define STATE_TRACE_DATA(sd) (& (sd)->base.trace_data)
-
- /* If non NULL, the BFD architecture specified on the command line */
- const struct bfd_arch_info *architecture;
-#define STATE_ARCHITECTURE(sd) ((sd)->base.architecture)
-
- /* If non NULL, the bfd target specified on the command line */
- const char *target;
-#define STATE_TARGET(sd) ((sd)->base.target)
-
- /* In standalone simulator, this is the program's arguments passed
- on the command line. */
- char **prog_argv;
-#define STATE_PROG_ARGV(sd) ((sd)->base.prog_argv)
-
- /* The program's bfd. */
- struct _bfd *prog_bfd;
-#define STATE_PROG_BFD(sd) ((sd)->base.prog_bfd)
-
- /* Symbol table for prog_bfd */
- struct symbol_cache_entry **prog_syms;
-#define STATE_PROG_SYMS(sd) ((sd)->base.prog_syms)
-
- /* The program's text section. */
- struct sec *text_section;
- /* Starting and ending text section addresses from the bfd. */
- SIM_ADDR text_start, text_end;
-#define STATE_TEXT_SECTION(sd) ((sd)->base.text_section)
-#define STATE_TEXT_START(sd) ((sd)->base.text_start)
-#define STATE_TEXT_END(sd) ((sd)->base.text_end)
-
- /* Start address, set when the program is loaded from the bfd. */
- SIM_ADDR start_addr;
-#define STATE_START_ADDR(sd) ((sd)->base.start_addr)
-
- /* Size of the simulator's cache, if any.
- This is not the target's cache. It is the cache the simulator uses
- to process instructions. */
- unsigned int scache_size;
-#define STATE_SCACHE_SIZE(sd) ((sd)->base.scache_size)
-
- /* FIXME: Move to top level sim_state struct (as some struct)? */
-#ifdef SIM_HAVE_FLATMEM
- unsigned int mem_size;
-#define STATE_MEM_SIZE(sd) ((sd)->base.mem_size)
- unsigned int mem_base;
-#define STATE_MEM_BASE(sd) ((sd)->base.mem_base)
- unsigned char *memory;
-#define STATE_MEMORY(sd) ((sd)->base.memory)
-#endif
-
- /* core memory bus */
-#define STATE_CORE(sd) (&(sd)->base.core)
- sim_core core;
-
- /* Record of memory sections added via the memory-options interface. */
-#define STATE_MEMOPT(sd) ((sd)->base.memopt)
- sim_memopt *memopt;
-
- /* event handler */
-#define STATE_EVENTS(sd) (&(sd)->base.events)
- sim_events events;
-
- /* generic halt/resume engine */
- sim_engine engine;
-#define STATE_ENGINE(sd) (&(sd)->base.engine)
-
- /* generic watchpoint support */
- sim_watchpoints watchpoints;
-#define STATE_WATCHPOINTS(sd) (&(sd)->base.watchpoints)
-
- /* Pointer to list of breakpoints */
- struct sim_breakpoint *breakpoints;
-#define STATE_BREAKPOINTS(sd) ((sd)->base.breakpoints)
-
-#if WITH_HW
- struct sim_hw *hw;
-#define STATE_HW(sd) ((sd)->base.hw)
-#endif
-
- /* Should image loads be performed using the LMA or VMA? Older
- simulators use the VMA while newer simulators prefer the LMA. */
- int load_at_lma_p;
-#define STATE_LOAD_AT_LMA_P(SD) ((SD)->base.load_at_lma_p)
-
- /* Marker for those wanting to do sanity checks.
- This should remain the last member of this struct to help catch
- miscompilation errors. */
- int magic;
-#define SIM_MAGIC_NUMBER 0x4242
-#define STATE_MAGIC(sd) ((sd)->base.magic)
-} sim_state_base;
-
-/* Functions for allocating/freeing a sim_state. */
-SIM_DESC sim_state_alloc PARAMS ((SIM_OPEN_KIND kind, host_callback *callback));
-void sim_state_free PARAMS ((SIM_DESC));
-
-#endif /* SIM_BASE_H */
diff --git a/sim/common/sim-basics.h b/sim/common/sim-basics.h
deleted file mode 100644
index fc34b21618f..00000000000
--- a/sim/common/sim-basics.h
+++ /dev/null
@@ -1,154 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1997, Andrew Cagney <cagney@highland.com.au>
- Copyright (C) 1997, 1998, Free Software Foundation, Inc.
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-#ifndef _SIM_BASICS_H_
-#define _SIM_BASICS_H_
-
-
-/* Basic configuration */
-
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
-/* Basic host dependant mess - hopefully <stdio.h> + <stdarg.h> will
- bring potential conflicts out in the open */
-
-#include <stdarg.h>
-#include <stdio.h>
-#include <setjmp.h>
-
-#ifdef __CYGWIN32__
-extern int vasprintf (char **result, const char *format, va_list args);
-extern int asprintf (char **result, const char *format, ...);
-#endif
-
-
-#ifndef NULL
-#define NULL 0
-#endif
-
-
-
-/* Some versions of GCC include an attribute operator, define it */
-
-#if !defined (__attribute__)
-#if (!defined(__GNUC__) || (__GNUC__ < 2) || (__GNUC__ == 2 && __GNUC_MINOR__ < 6))
-#define __attribute__(arg)
-#endif
-#endif
-
-
-/* Global types that code manipulates */
-
-typedef struct _device device;
-struct hw;
-struct _sim_fpu;
-
-
-/* Generic address space (maps) and access attributes */
-
-enum {
- read_map = 0,
- write_map = 1,
- exec_map = 2,
- io_map = 3,
- nr_maps = 32, /* something small */
-};
-
-enum {
- access_invalid = 0,
- access_read = 1 << read_map,
- access_write = 1 << write_map,
- access_exec = 1 << exec_map,
- access_io = 1 << io_map,
-};
-
-enum {
- access_read_write = (access_read | access_write),
- access_read_exec = (access_read | access_exec),
- access_write_exec = (access_write | access_exec),
- access_read_write_exec = (access_read | access_write | access_exec),
- access_read_io = (access_read | access_io),
- access_write_io = (access_write | access_io),
- access_read_write_io = (access_read | access_write | access_io),
- access_exec_io = (access_exec | access_io),
- access_read_exec_io = (access_read | access_exec | access_io),
- access_write_exec_io = (access_write | access_exec | access_io),
- access_read_write_exec_io = (access_read | access_write | access_exec | access_io),
-};
-
-
-/* disposition of an object when things are reset */
-
-typedef enum {
- permenant_object,
- temporary_object,
-} object_disposition;
-
-
-/* Memory transfer types */
-
-typedef enum _transfer_type {
- read_transfer,
- write_transfer,
-} transfer_type;
-
-
-/* directions */
-
-typedef enum {
- bidirect_port,
- input_port,
- output_port,
-} port_direction;
-
-
-
-/* Basic definitions - ordered so that nothing calls what comes after it. */
-
-/* FIXME: conditionalizing tconfig.h on HAVE_CONFIG_H seems wrong. */
-#ifdef HAVE_CONFIG_H
-#include "tconfig.h"
-#endif
-
-#include "ansidecl.h"
-#include "callback.h"
-#include "remote-sim.h"
-
-#include "sim-config.h"
-
-#include "sim-inline.h"
-
-#include "sim-types.h"
-#include "sim-bits.h"
-#include "sim-endian.h"
-#include "sim-signal.h"
-#include "sim-arange.h"
-
-#include "sim-utils.h"
-
-/* Note: Only the simpler interfaces are defined here. More heavy
- weight objects, such as core and events, are defined in the more
- serious sim-base.h header. */
-
-#endif /* _SIM_BASICS_H_ */
diff --git a/sim/common/sim-bits.c b/sim/common/sim-bits.c
deleted file mode 100644
index 4ba0f79055c..00000000000
--- a/sim/common/sim-bits.c
+++ /dev/null
@@ -1,270 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1997, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-#ifndef _SIM_BITS_C_
-#define _SIM_BITS_C_
-
-#include "sim-basics.h"
-#include "sim-assert.h"
-#include "sim-io.h"
-
-
-INLINE_SIM_BITS\
-(unsigned_word)
-LSMASKED (unsigned_word val,
- int start,
- int stop)
-{
- /* NOTE - start, stop can wrap */
- val &= LSMASK (start, stop);
- return val;
-}
-
-
-INLINE_SIM_BITS\
-(unsigned_word)
-MSMASKED (unsigned_word val,
- int start,
- int stop)
-{
- /* NOTE - start, stop can wrap */
- val &= MSMASK (start, stop);
- return val;
-}
-
-
-INLINE_SIM_BITS\
-(unsigned_word)
-LSEXTRACTED (unsigned_word val,
- int start,
- int stop)
-{
- ASSERT (start >= stop);
-#if (WITH_TARGET_WORD_BITSIZE == 64)
- return LSEXTRACTED64 (val, start, stop);
-#endif
-#if (WITH_TARGET_WORD_BITSIZE == 32)
- if (stop >= 32)
- return 0;
- else
- {
- if (start < 32)
- val &= LSMASK (start, 0);
- val >>= stop;
- return val;
- }
-#endif
-#if (WITH_TARGET_WORD_BITSIZE == 16)
- if (stop >= 16)
- return 0;
- else
- {
- if (start < 16)
- val &= LSMASK (start, 0);
- val >>= stop;
- return val;
- }
-#endif
-}
-
-
-INLINE_SIM_BITS\
-(unsigned_word)
-MSEXTRACTED (unsigned_word val,
- int start,
- int stop)
-{
- ASSERT (start <= stop);
-#if (WITH_TARGET_WORD_BITSIZE == 64)
- return MSEXTRACTED64 (val, start, stop);
-#endif
-#if (WITH_TARGET_WORD_BITSIZE == 32)
- if (stop < 32)
- return 0;
- else
- {
- if (start >= 32)
- val &= MSMASK (start, 64 - 1);
- val >>= (64 - stop - 1);
- return val;
- }
-#endif
-#if (WITH_TARGET_WORD_BITSIZE == 16)
- if (stop < 16)
- return 0;
- else
- {
- if (start >= 16)
- val &= MSMASK (start, 64 - 1);
- val >>= (64 - stop - 1);
- return val;
- }
-#endif
-}
-
-
-INLINE_SIM_BITS\
-(unsigned_word)
-LSINSERTED (unsigned_word val,
- int start,
- int stop)
-{
- ASSERT (start >= stop);
-#if (WITH_TARGET_WORD_BITSIZE == 64)
- return LSINSERTED64 (val, start, stop);
-#endif
-#if (WITH_TARGET_WORD_BITSIZE == 32)
- /* Bit numbers are 63..0, even for 32 bit targets.
- On 32 bit targets we ignore 63..32 */
- if (stop >= 32)
- return 0;
- else
- {
- val <<= stop;
- val &= LSMASK (start, stop);
- return val;
- }
-#endif
-#if (WITH_TARGET_WORD_BITSIZE == 16)
- /* Bit numbers are 63..0, even for 16 bit targets.
- On 16 bit targets we ignore 63..16 */
- if (stop >= 16)
- return 0;
- else
- {
- val <<= stop;
- val &= LSMASK (start, stop);
- return val;
- }
-#endif
-}
-
-INLINE_SIM_BITS\
-(unsigned_word)
-MSINSERTED (unsigned_word val,
- int start,
- int stop)
-{
- ASSERT (start <= stop);
-#if (WITH_TARGET_WORD_BITSIZE == 64)
- return MSINSERTED64 (val, start, stop);
-#endif
-#if (WITH_TARGET_WORD_BITSIZE == 32)
- /* Bit numbers are 0..63, even for 32 bit targets.
- On 32 bit targets we ignore 0..31. */
- if (stop < 32)
- return 0;
- else
- {
- val <<= ((64 - 1) - stop);
- val &= MSMASK (start, stop);
- return val;
- }
-#endif
-#if (WITH_TARGET_WORD_BITSIZE == 16)
- /* Bit numbers are 0..63, even for 16 bit targets.
- On 16 bit targets we ignore 0..47. */
- if (stop < 32 + 16)
- return 0;
- else
- {
- val <<= ((64 - 1) - stop);
- val &= MSMASK (start, stop);
- return val;
- }
-#endif
-}
-
-
-
-INLINE_SIM_BITS\
-(unsigned_word)
-LSSEXT (signed_word val,
- int sign_bit)
-{
- ASSERT (sign_bit < 64);
-#if (WITH_TARGET_WORD_BITSIZE == 64)
- return LSSEXT64 (val, sign_bit);
-#endif
-#if (WITH_TARGET_WORD_BITSIZE == 32)
- if (sign_bit >= 32)
- return val;
- else {
- val = LSSEXT32 (val, sign_bit);
- return val;
- }
-#endif
-#if (WITH_TARGET_WORD_BITSIZE == 16)
- if (sign_bit >= 16)
- return val;
- else {
- val = LSSEXT16 (val, sign_bit);
- return val;
- }
-#endif
-}
-
-INLINE_SIM_BITS\
-(unsigned_word)
-MSSEXT (signed_word val,
- int sign_bit)
-{
- ASSERT (sign_bit < 64);
-#if (WITH_TARGET_WORD_BITSIZE == 64)
- return MSSEXT64 (val, sign_bit);
-#endif
-#if (WITH_TARGET_WORD_BITSIZE == 32)
- if (sign_bit < 32)
- return val;
- else {
- val = MSSEXT32 (val, sign_bit - 32);
- return val;
- }
-#endif
-#if (WITH_TARGET_WORD_BITSIZE == 16)
- if (sign_bit < 32 + 16)
- return val;
- else {
- val = MSSEXT16 (val, sign_bit - 32 - 16);
- return val;
- }
-#endif
-}
-
-
-
-#define N 8
-#include "sim-n-bits.h"
-#undef N
-
-#define N 16
-#include "sim-n-bits.h"
-#undef N
-
-#define N 32
-#include "sim-n-bits.h"
-#undef N
-
-#define N 64
-#include "sim-n-bits.h"
-#undef N
-
-#endif /* _SIM_BITS_C_ */
diff --git a/sim/common/sim-bits.h b/sim/common/sim-bits.h
deleted file mode 100644
index caebf0a902b..00000000000
--- a/sim/common/sim-bits.h
+++ /dev/null
@@ -1,608 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1996, Andrew Cagney <cagney@highland.com.au>
- Copyright (C) 1997, Free Software Foundation, Inc.
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-#ifndef _SIM_BITS_H_
-#define _SIM_BITS_H_
-
-
-/* Bit manipulation routines:
-
- Bit numbering: The bits are numbered according to the target ISA's
- convention. That being controlled by WITH_TARGET_WORD_MSB. For
- the PowerPC (WITH_TARGET_WORD_MSB == 0) the numbering is 0..31
- while for the MIPS (WITH_TARGET_WORD_MSB == 31) it is 31..0.
-
- Size convention: Each macro is in three forms - <MACRO>32 which
- operates in 32bit quantity (bits are numbered 0..31); <MACRO>64
- which operates using 64bit quantites (and bits are numbered 0..63);
- and <MACRO> which operates using the bit size of the target
- architecture (bits are still numbered 0..63), with 32bit
- architectures ignoring the first 32bits leaving bit 32 as the most
- significant.
-
- NB: Use EXTRACTED, MSEXTRACTED and LSEXTRACTED as a guideline for
- naming. LSMASK and LSMASKED are wrong.
-
- BIT*(POS): `*' bit constant with just 1 bit set.
-
- LSBIT*(OFFSET): `*' bit constant with just 1 bit set - LS bit is
- zero.
-
- MSBIT*(OFFSET): `*' bit constant with just 1 bit set - MS bit is
- zero.
-
- MASK*(FIRST, LAST): `*' bit constant with bits [FIRST .. LAST]
- set. The <MACRO> (no size) version permits FIRST >= LAST and
- generates a wrapped bit mask vis ([0..LAST] | [FIRST..LSB]).
-
- LSMASK*(FIRST, LAST): Like MASK - LS bit is zero.
-
- MSMASK*(FIRST, LAST): Like MASK - LS bit is zero.
-
- MASKED*(VALUE, FIRST, LAST): Masks out all but bits [FIRST
- .. LAST].
-
- LSMASKED*(VALUE, FIRST, LAST): Like MASKED - LS bit is zero.
-
- MSMASKED*(VALUE, FIRST, LAST): Like MASKED - MS bit is zero.
-
- EXTRACTED*(VALUE, FIRST, LAST): Masks out bits [FIRST .. LAST] but
- also right shifts the masked value so that bit LAST becomes the
- least significant (right most).
-
- LSEXTRACTED*(VALUE, FIRST, LAST): Same as extracted - LS bit is
- zero.
-
- MSEXTRACTED*(VALUE, FIRST, LAST): Same as extracted - MS bit is
- zero.
-
- SHUFFLED**(VALUE, OLD, NEW): Mask then move a single bit from OLD
- new NEW.
-
- MOVED**(VALUE, OLD_FIRST, OLD_LAST, NEW_FIRST, NEW_LAST): Moves
- things around so that bits OLD_FIRST..OLD_LAST are masked then
- moved to NEW_FIRST..NEW_LAST.
-
- INSERTED*(VALUE, FIRST, LAST): Takes VALUE and `inserts' the (LAST
- - FIRST + 1) least significant bits into bit positions [ FIRST
- .. LAST ]. This is almost the complement to EXTRACTED.
-
- IEA_MASKED(SHOULD_MASK, ADDR): Convert the address to the targets
- natural size. If in 32bit mode, discard the high 32bits.
-
- EXTEND*(VALUE): Convert the `*' bit value to the targets natural
- word size. Sign extend the value if needed.
-
- ALIGN_*(VALUE): Round the value upwards so that it is aligned to a
- `_*' byte boundary.
-
- FLOOR_*(VALUE): Truncate the value so that it is aligned to a `_*'
- byte boundary.
-
- ROT*(VALUE, NR_BITS): Return the `*' bit VALUE rotated by NR_BITS
- right (positive) or left (negative).
-
- ROTL*(VALUE, NR_BITS): Return the `*' bit value rotated by NR_BITS
- left. 0 <= NR_BITS <= `*'.
-
- ROTR*(VALUE, NR_BITS): Return the `*' bit value rotated by NR_BITS
- right. 0 <= NR_BITS <= N.
-
- SEXT*(VALUE, SIGN_BIT): Treat SIGN_BIT as VALUEs sign, extend it ti
- `*' bits.
-
- Note: Only the BIT* and MASK* macros return a constant that can be
- used in variable declarations.
-
- */
-
-
-/* compute the number of bits between START and STOP */
-
-#if (WITH_TARGET_WORD_MSB == 0)
-#define _MAKE_WIDTH(START, STOP) (STOP - START + 1)
-#else
-#define _MAKE_WIDTH(START, STOP) (START - STOP + 1)
-#endif
-
-
-
-/* compute the number shifts required to move a bit between LSB (MSB)
- and POS */
-
-#if (WITH_TARGET_WORD_MSB == 0)
-#define _LSB_SHIFT(WIDTH, POS) (WIDTH - 1 - POS)
-#else
-#define _LSB_SHIFT(WIDTH, POS) (POS)
-#endif
-
-#if (WITH_TARGET_WORD_MSB == 0)
-#define _MSB_SHIFT(WIDTH, POS) (POS)
-#else
-#define _MSB_SHIFT(WIDTH, POS) (WIDTH - 1 - POS)
-#endif
-
-
-/* compute the absolute bit position given the OFFSET from the MSB(LSB)
- NB: _MAKE_xxx_POS (WIDTH, _MAKE_xxx_SHIFT (WIDTH, POS)) == POS */
-
-#if (WITH_TARGET_WORD_MSB == 0)
-#define _MSB_POS(WIDTH, SHIFT) (SHIFT)
-#else
-#define _MSB_POS(WIDTH, SHIFT) (WIDTH - 1 - SHIFT)
-#endif
-
-#if (WITH_TARGET_WORD_MSB == 0)
-#define _LSB_POS(WIDTH, SHIFT) (WIDTH - 1 - SHIFT)
-#else
-#define _LSB_POS(WIDTH, SHIFT) (SHIFT)
-#endif
-
-
-/* convert a 64 bit position into a corresponding 32bit position. MSB
- pos handles the posibility that the bit lies beyond the 32bit
- boundary */
-
-#if (WITH_TARGET_WORD_MSB == 0)
-#define _MSB_32(START, STOP) (START <= STOP \
- ? (START < 32 ? 0 : START - 32) \
- : (STOP < 32 ? 0 : STOP - 32))
-#define _MSB_16(START, STOP) (START <= STOP \
- ? (START < 48 ? 0 : START - 48) \
- : (STOP < 48 ? 0 : STOP - 48))
-#else
-#define _MSB_32(START, STOP) (START >= STOP \
- ? (START >= 32 ? 31 : START) \
- : (STOP >= 32 ? 31 : STOP))
-#define _MSB_16(START, STOP) (START >= STOP \
- ? (START >= 16 ? 15 : START) \
- : (STOP >= 16 ? 15 : STOP))
-#endif
-
-#if (WITH_TARGET_WORD_MSB == 0)
-#define _LSB_32(START, STOP) (START <= STOP \
- ? (STOP < 32 ? 0 : STOP - 32) \
- : (START < 32 ? 0 : START - 32))
-#define _LSB_16(START, STOP) (START <= STOP \
- ? (STOP < 48 ? 0 : STOP - 48) \
- : (START < 48 ? 0 : START - 48))
-#else
-#define _LSB_32(START, STOP) (START >= STOP \
- ? (STOP >= 32 ? 31 : STOP) \
- : (START >= 32 ? 31 : START))
-#define _LSB_16(START, STOP) (START >= STOP \
- ? (STOP >= 16 ? 15 : STOP) \
- : (START >= 16 ? 15 : START))
-#endif
-
-#if (WITH_TARGET_WORD_MSB == 0)
-#define _MSB(START, STOP) (START <= STOP ? START : STOP)
-#else
-#define _MSB(START, STOP) (START >= STOP ? START : STOP)
-#endif
-
-#if (WITH_TARGET_WORD_MSB == 0)
-#define _LSB(START, STOP) (START <= STOP ? STOP : START)
-#else
-#define _LSB(START, STOP) (START >= STOP ? STOP : START)
-#endif
-
-
-/* LS/MS Bit operations */
-
-#define LSBIT8(POS) ((unsigned8) 1 << (POS))
-#define LSBIT16(POS) ((unsigned16)1 << (POS))
-#define LSBIT32(POS) ((unsigned32)1 << (POS))
-#define LSBIT64(POS) ((unsigned64)1 << (POS))
-
-#if (WITH_TARGET_WORD_BITSIZE == 64)
-#define LSBIT(POS) LSBIT64 (POS)
-#endif
-#if (WITH_TARGET_WORD_BITSIZE == 32)
-#define LSBIT(POS) ((unsigned32)((POS) >= 32 \
- ? 0 \
- : (1 << ((POS) >= 32 ? 0 : (POS)))))
-#endif
-#if (WITH_TARGET_WORD_BITSIZE == 16)
-#define LSBIT(POS) ((unsigned16)((POS) >= 16 \
- ? 0 \
- : (1 << ((POS) >= 16 ? 0 : (POS)))))
-#endif
-
-
-#define MSBIT8(POS) ((unsigned8) 1 << ( 8 - 1 - (POS)))
-#define MSBIT16(POS) ((unsigned16)1 << (16 - 1 - (POS)))
-#define MSBIT32(POS) ((unsigned32)1 << (32 - 1 - (POS)))
-#define MSBIT64(POS) ((unsigned64)1 << (64 - 1 - (POS)))
-
-#if (WITH_TARGET_WORD_BITSIZE == 64)
-#define MSBIT(POS) MSBIT64 (POS)
-#endif
-#if (WITH_TARGET_WORD_BITSIZE == 32)
-#define MSBIT(POS) ((unsigned32)((POS) < 32 \
- ? 0 \
- : (1 << ((POS) < 32 ? 0 : (64 - 1) - (POS)))))
-#endif
-#if (WITH_TARGET_WORD_BITSIZE == 16)
-#define MSBIT(POS) ((unsigned16)((POS) < 48 \
- ? 0 \
- : (1 << ((POS) < 48 ? 0 : (64 - 1) - (POS)))))
-#endif
-
-
-/* Bit operations */
-
-#define BIT4(POS) (1 << _LSB_SHIFT (4, (POS)))
-#define BIT5(POS) (1 << _LSB_SHIFT (5, (POS)))
-#define BIT10(POS) (1 << _LSB_SHIFT (10, (POS)))
-
-#if (WITH_TARGET_WORD_MSB == 0)
-#define BIT8 MSBIT8
-#define BIT16 MSBIT16
-#define BIT32 MSBIT32
-#define BIT64 MSBIT64
-#define BIT MSBIT
-#else
-#define BIT8 LSBIT8
-#define BIT16 LSBIT16
-#define BIT32 LSBIT32
-#define BIT64 LSBIT64
-#define BIT LSBIT
-#endif
-
-
-
-/* multi bit mask */
-
-/* 111111 -> mmll11 -> mm11ll */
-#define _MASKn(WIDTH, START, STOP) (((unsigned##WIDTH)(-1) \
- >> (_MSB_SHIFT (WIDTH, START) \
- + _LSB_SHIFT (WIDTH, STOP))) \
- << _LSB_SHIFT (WIDTH, STOP))
-
-#if (WITH_TARGET_WORD_MSB == 0)
-#define _POS_LE(START, STOP) (START <= STOP)
-#else
-#define _POS_LE(START, STOP) (STOP <= START)
-#endif
-
-#if (WITH_TARGET_WORD_BITSIZE == 64)
-#define MASK(START, STOP) \
- (_POS_LE ((START), (STOP)) \
- ? _MASKn(64, \
- _MSB ((START), (STOP)), \
- _LSB ((START), (STOP)) ) \
- : (_MASKn(64, _MSB_POS (64, 0), (STOP)) \
- | _MASKn(64, (START), _LSB_POS (64, 0))))
-#endif
-#if (WITH_TARGET_WORD_BITSIZE == 32)
-#define MASK(START, STOP) \
- (_POS_LE ((START), (STOP)) \
- ? (_POS_LE ((STOP), _MSB_POS (64, 31)) \
- ? 0 \
- : _MASKn (32, \
- _MSB_32 ((START), (STOP)), \
- _LSB_32 ((START), (STOP)))) \
- : (_MASKn (32, \
- _LSB_32 ((START), (STOP)), \
- _LSB_POS (32, 0)) \
- | (_POS_LE ((STOP), _MSB_POS (64, 31)) \
- ? 0 \
- : _MASKn (32, \
- _MSB_POS (32, 0), \
- _MSB_32 ((START), (STOP))))))
-#endif
-#if (WITH_TARGET_WORD_BITSIZE == 16)
-#define MASK(START, STOP) \
- (_POS_LE ((START), (STOP)) \
- ? (_POS_LE ((STOP), _MSB_POS (64, 15)) \
- ? 0 \
- : _MASKn (16, \
- _MSB_16 ((START), (STOP)), \
- _LSB_16 ((START), (STOP)))) \
- : (_MASKn (16, \
- _LSB_16 ((START), (STOP)), \
- _LSB_POS (16, 0)) \
- | (_POS_LE ((STOP), _MSB_POS (64, 15)) \
- ? 0 \
- : _MASKn (16, \
- _MSB_POS (16, 0), \
- _MSB_16 ((START), (STOP))))))
-#endif
-#if !defined (MASK)
-#error "MASK never undefined"
-#endif
-
-
-/* Multi-bit mask on least significant bits */
-
-#define _LSMASKn(WIDTH, FIRST, LAST) _MASKn (WIDTH, \
- _LSB_POS (WIDTH, FIRST), \
- _LSB_POS (WIDTH, LAST))
-
-#define LSMASK8(FIRST, LAST) _LSMASKn ( 8, (FIRST), (LAST))
-#define LSMASK16(FIRST, LAST) _LSMASKn (16, (FIRST), (LAST))
-#define LSMASK32(FIRST, LAST) _LSMASKn (32, (FIRST), (LAST))
-#define LSMASK64(FIRST, LAST) _LSMASKn (64, (FIRST), (LAST))
-
-#define LSMASK(FIRST, LAST) (MASK (_LSB_POS (64, FIRST), _LSB_POS (64, LAST)))
-
-
-/* Multi-bit mask on most significant bits */
-
-#define _MSMASKn(WIDTH, FIRST, LAST) _MASKn (WIDTH, \
- _MSB_POS (WIDTH, FIRST), \
- _MSB_POS (WIDTH, LAST))
-
-#define MSMASK8(FIRST, LAST) _MSMASKn ( 8, (FIRST), (LAST))
-#define MSMASK16(FIRST, LAST) _MSMASKn (16, (FIRST), (LAST))
-#define MSMASK32(FIRST, LAST) _MSMASKn (32, (FIRST), (LAST))
-#define MSMASK64(FIRST, LAST) _MSMASKn (64, (FIRST), (LAST))
-
-#define MSMASK(FIRST, LAST) (MASK (_MSB_POS (64, FIRST), _MSB_POS (64, LAST)))
-
-
-
-#if (WITH_TARGET_WORD_MSB == 0)
-#define MASK8 MSMASK8
-#define MASK16 MSMASK16
-#define MASK32 MSMASK32
-#define MASK64 MSMASK64
-#else
-#define MASK8 LSMASK8
-#define MASK16 LSMASK16
-#define MASK32 LSMASK32
-#define MASK64 LSMASK64
-#endif
-
-
-
-/* mask the required bits, leaving them in place */
-
-INLINE_SIM_BITS(unsigned8) LSMASKED8 (unsigned8 word, int first, int last);
-INLINE_SIM_BITS(unsigned16) LSMASKED16 (unsigned16 word, int first, int last);
-INLINE_SIM_BITS(unsigned32) LSMASKED32 (unsigned32 word, int first, int last);
-INLINE_SIM_BITS(unsigned64) LSMASKED64 (unsigned64 word, int first, int last);
-
-INLINE_SIM_BITS(unsigned_word) LSMASKED (unsigned_word word, int first, int last);
-
-INLINE_SIM_BITS(unsigned8) MSMASKED8 (unsigned8 word, int first, int last);
-INLINE_SIM_BITS(unsigned16) MSMASKED16 (unsigned16 word, int first, int last);
-INLINE_SIM_BITS(unsigned32) MSMASKED32 (unsigned32 word, int first, int last);
-INLINE_SIM_BITS(unsigned64) MSMASKED64 (unsigned64 word, int first, int last);
-
-INLINE_SIM_BITS(unsigned_word) MSMASKED (unsigned_word word, int first, int last);
-
-#if (WITH_TARGET_WORD_MSB == 0)
-#define MASKED8 MSMASKED8
-#define MASKED16 MSMASKED16
-#define MASKED32 MSMASKED32
-#define MASKED64 MSMASKED64
-#define MASKED MSMASKED
-#else
-#define MASKED8 LSMASKED8
-#define MASKED16 LSMASKED16
-#define MASKED32 LSMASKED32
-#define MASKED64 LSMASKED64
-#define MASKED LSMASKED
-#endif
-
-
-
-/* extract the required bits aligning them with the lsb */
-
-INLINE_SIM_BITS(unsigned8) LSEXTRACTED8 (unsigned8 val, int start, int stop);
-INLINE_SIM_BITS(unsigned16) LSEXTRACTED16 (unsigned16 val, int start, int stop);
-INLINE_SIM_BITS(unsigned32) LSEXTRACTED32 (unsigned32 val, int start, int stop);
-INLINE_SIM_BITS(unsigned64) LSEXTRACTED64 (unsigned64 val, int start, int stop);
-
-INLINE_SIM_BITS(unsigned_word) LSEXTRACTED (unsigned_word val, int start, int stop);
-
-INLINE_SIM_BITS(unsigned8) MSEXTRACTED8 (unsigned8 val, int start, int stop);
-INLINE_SIM_BITS(unsigned16) MSEXTRACTED16 (unsigned16 val, int start, int stop);
-INLINE_SIM_BITS(unsigned32) MSEXTRACTED32 (unsigned32 val, int start, int stop);
-INLINE_SIM_BITS(unsigned64) MSEXTRACTED64 (unsigned64 val, int start, int stop);
-
-INLINE_SIM_BITS(unsigned_word) MSEXTRACTED (unsigned_word val, int start, int stop);
-
-#if (WITH_TARGET_WORD_MSB == 0)
-#define EXTRACTED8 MSEXTRACTED8
-#define EXTRACTED16 MSEXTRACTED16
-#define EXTRACTED32 MSEXTRACTED32
-#define EXTRACTED64 MSEXTRACTED64
-#define EXTRACTED MSEXTRACTED
-#else
-#define EXTRACTED8 LSEXTRACTED8
-#define EXTRACTED16 LSEXTRACTED16
-#define EXTRACTED32 LSEXTRACTED32
-#define EXTRACTED64 LSEXTRACTED64
-#define EXTRACTED LSEXTRACTED
-#endif
-
-
-
-/* move a single bit around */
-/* NB: the wierdness (N>O?N-O:0) is to stop a warning from GCC */
-#define _SHUFFLEDn(N, WORD, OLD, NEW) \
-((OLD) < (NEW) \
- ? (((unsigned##N)(WORD) \
- >> (((NEW) > (OLD)) ? ((NEW) - (OLD)) : 0)) \
- & MASK32((NEW), (NEW))) \
- : (((unsigned##N)(WORD) \
- << (((OLD) > (NEW)) ? ((OLD) - (NEW)) : 0)) \
- & MASK32((NEW), (NEW))))
-
-#define SHUFFLED32(WORD, OLD, NEW) _SHUFFLEDn (32, WORD, OLD, NEW)
-#define SHUFFLED64(WORD, OLD, NEW) _SHUFFLEDn (64, WORD, OLD, NEW)
-
-#define SHUFFLED(WORD, OLD, NEW) _SHUFFLEDn (_word, WORD, OLD, NEW)
-
-
-/* Insert a group of bits into a bit position */
-
-INLINE_SIM_BITS(unsigned8) LSINSERTED8 (unsigned8 val, int start, int stop);
-INLINE_SIM_BITS(unsigned16) LSINSERTED16 (unsigned16 val, int start, int stop);
-INLINE_SIM_BITS(unsigned32) LSINSERTED32 (unsigned32 val, int start, int stop);
-INLINE_SIM_BITS(unsigned64) LSINSERTED64 (unsigned64 val, int start, int stop);
-INLINE_SIM_BITS(unsigned_word) LSINSERTED (unsigned_word val, int start, int stop);
-
-INLINE_SIM_BITS(unsigned8) MSINSERTED8 (unsigned8 val, int start, int stop);
-INLINE_SIM_BITS(unsigned16) MSINSERTED16 (unsigned16 val, int start, int stop);
-INLINE_SIM_BITS(unsigned32) MSINSERTED32 (unsigned32 val, int start, int stop);
-INLINE_SIM_BITS(unsigned64) MSINSERTED64 (unsigned64 val, int start, int stop);
-INLINE_SIM_BITS(unsigned_word) MSINSERTED (unsigned_word val, int start, int stop);
-
-#if (WITH_TARGET_WORD_MSB == 0)
-#define INSERTED8 MSINSERTED8
-#define INSERTED16 MSINSERTED16
-#define INSERTED32 MSINSERTED32
-#define INSERTED64 MSINSERTED64
-#define INSERTED MSINSERTED
-#else
-#define INSERTED8 LSINSERTED8
-#define INSERTED16 LSINSERTED16
-#define INSERTED32 LSINSERTED32
-#define INSERTED64 LSINSERTED64
-#define INSERTED LSINSERTED
-#endif
-
-
-
-/* MOVE bits from one loc to another (combination of extract/insert) */
-
-#define MOVED8(VAL,OH,OL,NH,NL) INSERTED8 (EXTRACTED8 ((VAL), OH, OL), NH, NL)
-#define MOVED16(VAL,OH,OL,NH,NL) INSERTED16(EXTRACTED16((VAL), OH, OL), NH, NL)
-#define MOVED32(VAL,OH,OL,NH,NL) INSERTED32(EXTRACTED32((VAL), OH, OL), NH, NL)
-#define MOVED64(VAL,OH,OL,NH,NL) INSERTED64(EXTRACTED64((VAL), OH, OL), NH, NL)
-#define MOVED(VAL,OH,OL,NH,NL) INSERTED (EXTRACTED ((VAL), OH, OL), NH, NL)
-
-
-
-/* Sign extend the quantity to the targets natural word size */
-
-#define EXTEND4(X) (LSSEXT ((X), 3))
-#define EXTEND5(X) (LSSEXT ((X), 4))
-#define EXTEND8(X) ((signed_word)(signed8)(X))
-#define EXTEND11(X) (LSSEXT ((X), 10))
-#define EXTEND15(X) (LSSEXT ((X), 14))
-#define EXTEND16(X) ((signed_word)(signed16)(X))
-#define EXTEND24(X) (LSSEXT ((X), 23))
-#define EXTEND32(X) ((signed_word)(signed32)(X))
-#define EXTEND64(X) ((signed_word)(signed64)(X))
-
-/* depending on MODE return a 64bit or 32bit (sign extended) value */
-#if (WITH_TARGET_WORD_BITSIZE == 64)
-#define EXTENDED(X) ((signed64)(signed32)(X))
-#endif
-#if (WITH_TARGET_WORD_BITSIZE == 32)
-#define EXTENDED(X) (X)
-#endif
-#if (WITH_TARGET_WORD_BITSIZE == 16)
-#define EXTENDED(X) (X)
-#endif
-
-
-/* memory alignment macro's */
-#define _ALIGNa(A,X) (((X) + ((A) - 1)) & ~((A) - 1))
-#define _FLOORa(A,X) ((X) & ~((A) - 1))
-
-#define ALIGN_8(X) _ALIGNa (8, X)
-#define ALIGN_16(X) _ALIGNa (16, X)
-
-#define ALIGN_PAGE(X) _ALIGNa (0x1000, X)
-#define FLOOR_PAGE(X) ((X) & ~(0x1000 - 1))
-
-
-/* bit bliting macro's */
-#define BLIT32(V, POS, BIT) \
-do { \
- if (BIT) \
- V |= BIT32 (POS); \
- else \
- V &= ~BIT32 (POS); \
-} while (0)
-#define MBLIT32(V, LO, HI, VAL) \
-do { \
- (V) = (((V) & ~MASK32 ((LO), (HI))) \
- | INSERTED32 (VAL, LO, HI)); \
-} while (0)
-
-
-
-/* some rotate functions. The generic macro's ROT, ROTL, ROTR are
- intentionally omited. */
-
-
-INLINE_SIM_BITS(unsigned8) ROT8 (unsigned8 val, int shift);
-INLINE_SIM_BITS(unsigned16) ROT16 (unsigned16 val, int shift);
-INLINE_SIM_BITS(unsigned32) ROT32 (unsigned32 val, int shift);
-INLINE_SIM_BITS(unsigned64) ROT64 (unsigned64 val, int shift);
-
-
-INLINE_SIM_BITS(unsigned8) ROTL8 (unsigned8 val, int shift);
-INLINE_SIM_BITS(unsigned16) ROTL16 (unsigned16 val, int shift);
-INLINE_SIM_BITS(unsigned32) ROTL32 (unsigned32 val, int shift);
-INLINE_SIM_BITS(unsigned64) ROTL64 (unsigned64 val, int shift);
-
-
-INLINE_SIM_BITS(unsigned8) ROTR8 (unsigned8 val, int shift);
-INLINE_SIM_BITS(unsigned16) ROTR16 (unsigned16 val, int shift);
-INLINE_SIM_BITS(unsigned32) ROTR32 (unsigned32 val, int shift);
-INLINE_SIM_BITS(unsigned64) ROTR64 (unsigned64 val, int shift);
-
-
-
-/* Sign extension operations */
-
-INLINE_SIM_BITS(unsigned8) LSSEXT8 (signed8 val, int sign_bit);
-INLINE_SIM_BITS(unsigned16) LSSEXT16 (signed16 val, int sign_bit);
-INLINE_SIM_BITS(unsigned32) LSSEXT32 (signed32 val, int sign_bit);
-INLINE_SIM_BITS(unsigned64) LSSEXT64 (signed64 val, int sign_bit);
-INLINE_SIM_BITS(unsigned_word) LSSEXT (signed_word val, int sign_bit);
-
-INLINE_SIM_BITS(unsigned8) MSSEXT8 (signed8 val, int sign_bit);
-INLINE_SIM_BITS(unsigned16) MSSEXT16 (signed16 val, int sign_bit);
-INLINE_SIM_BITS(unsigned32) MSSEXT32 (signed32 val, int sign_bit);
-INLINE_SIM_BITS(unsigned64) MSSEXT64 (signed64 val, int sign_bit);
-INLINE_SIM_BITS(unsigned_word) MSSEXT (signed_word val, int sign_bit);
-
-#if (WITH_TARGET_WORD_MSB == 0)
-#define SEXT8 MSSEXT8
-#define SEXT16 MSSEXT16
-#define SEXT32 MSSEXT32
-#define SEXT64 MSSEXT64
-#define SEXT MSSEXT
-#else
-#define SEXT8 LSSEXT8
-#define SEXT16 LSSEXT16
-#define SEXT32 LSSEXT32
-#define SEXT64 LSSEXT64
-#define SEXT LSSEXT
-#endif
-
-
-
-#if H_REVEALS_MODULE_P (SIM_BITS_INLINE)
-#include "sim-bits.c"
-#endif
-
-#endif /* _SIM_BITS_H_ */
diff --git a/sim/common/sim-break.c b/sim/common/sim-break.c
deleted file mode 100644
index 3b89560aeb1..00000000000
--- a/sim/common/sim-break.c
+++ /dev/null
@@ -1,278 +0,0 @@
-/* Simulator breakpoint support.
- Copyright (C) 1997 Free Software Foundation, Inc.
- Contributed by Cygnus Support.
-
-This file is part of GDB, the GNU debugger.
-
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License along
-with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
-
-#include <stdio.h>
-
-#include "sim-main.h"
-#include "sim-assert.h"
-#include "sim-break.h"
-
-#ifndef SIM_BREAKPOINT
-#define SIM_BREAKPOINT {0x00}
-#define SIM_BREAKPOINT_SIZE (1)
-#endif
-
-struct
-sim_breakpoint
-{
- struct sim_breakpoint *next;
- SIM_ADDR addr; /* Address of this breakpoint */
- int flags;
- unsigned char loc_contents[SIM_BREAKPOINT_SIZE]; /* Contents of addr while
- BP is enabled */
-};
-
-#define SIM_BREAK_INSERTED 0x1 /* Breakpoint has been inserted */
-#define SIM_BREAK_DISABLED 0x2 /* Breakpoint is disabled */
-
-static unsigned char sim_breakpoint [] = SIM_BREAKPOINT;
-
-static void insert_breakpoint PARAMS ((SIM_DESC sd,
- struct sim_breakpoint *bp));
-static void remove_breakpoint PARAMS ((SIM_DESC sd,
- struct sim_breakpoint *bp));
-static SIM_RC resume_handler PARAMS ((SIM_DESC sd));
-static SIM_RC suspend_handler PARAMS ((SIM_DESC sd));
-
-
-/* Do the actual work of inserting a breakpoint into the instruction
- stream. */
-
-static void
-insert_breakpoint (sd, bp)
- SIM_DESC sd;
- struct sim_breakpoint *bp;
-{
- if (bp->flags & (SIM_BREAK_INSERTED | SIM_BREAK_DISABLED))
- return;
-
- sim_core_read_buffer (sd, NULL, exec_map, bp->loc_contents,
- bp->addr, SIM_BREAKPOINT_SIZE);
- sim_core_write_buffer (sd, NULL, exec_map, sim_breakpoint,
- bp->addr, SIM_BREAKPOINT_SIZE);
- bp->flags |= SIM_BREAK_INSERTED;
-}
-
-/* Do the actual work of removing a breakpoint. */
-
-static void
-remove_breakpoint (sd, bp)
- SIM_DESC sd;
- struct sim_breakpoint *bp;
-{
- if (!(bp->flags & SIM_BREAK_INSERTED))
- return;
-
- sim_core_write_buffer (sd, NULL, exec_map, bp->loc_contents,
- bp->addr, SIM_BREAKPOINT_SIZE);
- bp->flags &= ~SIM_BREAK_INSERTED;
-}
-
-/* Come here when a breakpoint insn is hit. If it's really a breakpoint, we
- halt things, and never return. If it's a false hit, we return to let the
- caller handle things. */
-
-void
-sim_handle_breakpoint (sd, cpu, cia)
- SIM_DESC sd;
- sim_cpu *cpu;
- sim_cia cia;
-{
- struct sim_breakpoint *bp;
-
- for (bp = STATE_BREAKPOINTS (sd); bp; bp = bp->next)
- if (bp->addr == CIA_ADDR (cia))
- break;
-
- if (!bp || !(bp->flags & SIM_BREAK_INSERTED))
- return;
-
- sim_engine_halt (sd, STATE_CPU (sd, 0), NULL, cia, sim_stopped, SIM_SIGTRAP);
-}
-
-/* Handler functions for simulator resume and suspend events. */
-
-static SIM_RC
-resume_handler (sd)
- SIM_DESC sd;
-{
- struct sim_breakpoint *bp;
-
- for (bp = STATE_BREAKPOINTS (sd); bp; bp = bp->next)
- insert_breakpoint (sd, bp);
-
- return SIM_RC_OK;
-}
-
-static SIM_RC
-suspend_handler (sd)
- SIM_DESC sd;
-{
- struct sim_breakpoint *bp;
-
- for (bp = STATE_BREAKPOINTS (sd); bp; bp = bp->next)
- remove_breakpoint (sd, bp);
-
- return SIM_RC_OK;
-}
-
-/* Called from simulator module initialization. */
-
-SIM_RC
-sim_break_install (sd)
- SIM_DESC sd;
-{
- sim_module_add_resume_fn (sd, resume_handler);
- sim_module_add_suspend_fn (sd, suspend_handler);
-
- return SIM_RC_OK;
-}
-
-/* Install a breakpoint. This is a user-function. The breakpoint isn't
- actually installed here. We just record it. Resume_handler does the
- actual work.
-*/
-
-SIM_RC
-sim_set_breakpoint (sd, addr)
- SIM_DESC sd;
- SIM_ADDR addr;
-{
- struct sim_breakpoint *bp;
-
- for (bp = STATE_BREAKPOINTS (sd); bp; bp = bp->next)
- if (bp->addr == addr)
- return SIM_RC_DUPLICATE_BREAKPOINT; /* Already there */
- else
- break; /* FIXME: why not scan all bp's? */
-
- bp = ZALLOC (struct sim_breakpoint);
-
- bp->addr = addr;
- bp->next = STATE_BREAKPOINTS (sd);
- bp->flags = 0;
- STATE_BREAKPOINTS (sd) = bp;
-
- return SIM_RC_OK;
-}
-
-/* Delete a breakpoint. All knowlege of the breakpoint is removed from the
- simulator.
-*/
-
-SIM_RC
-sim_clear_breakpoint (sd, addr)
- SIM_DESC sd;
- SIM_ADDR addr;
-{
- struct sim_breakpoint *bp, *bpprev;
-
- for (bp = STATE_BREAKPOINTS (sd), bpprev = NULL;
- bp;
- bpprev = bp, bp = bp->next)
- if (bp->addr == addr)
- break;
-
- if (!bp)
- return SIM_RC_UNKNOWN_BREAKPOINT;
-
- remove_breakpoint (sd, bp);
-
- if (bpprev)
- bpprev->next = bp->next;
- else
- STATE_BREAKPOINTS (sd) = NULL;
-
- zfree (bp);
-
- return SIM_RC_OK;
-}
-
-SIM_RC
-sim_clear_all_breakpoints (sd)
- SIM_DESC sd;
-{
- while (STATE_BREAKPOINTS (sd))
- sim_clear_breakpoint (sd, STATE_BREAKPOINTS (sd)->addr);
-
- return SIM_RC_OK;
-}
-
-SIM_RC
-sim_enable_breakpoint (sd, addr)
- SIM_DESC sd;
- SIM_ADDR addr;
-{
- struct sim_breakpoint *bp;
-
- for (bp = STATE_BREAKPOINTS (sd); bp; bp = bp->next)
- if (bp->addr == addr)
- break;
-
- if (!bp)
- return SIM_RC_UNKNOWN_BREAKPOINT;
-
- bp->flags &= ~SIM_BREAK_DISABLED;
-
- return SIM_RC_OK;
-}
-
-SIM_RC
-sim_disable_breakpoint (sd, addr)
- SIM_DESC sd;
- SIM_ADDR addr;
-{
- struct sim_breakpoint *bp;
-
- for (bp = STATE_BREAKPOINTS (sd); bp; bp = bp->next)
- if (bp->addr == addr)
- break;
-
- if (!bp)
- return SIM_RC_UNKNOWN_BREAKPOINT;
-
- bp->flags |= SIM_BREAK_DISABLED;
-
- return SIM_RC_OK;
-}
-
-SIM_RC
-sim_enable_all_breakpoints (sd)
- SIM_DESC sd;
-{
- struct sim_breakpoint *bp;
-
- for (bp = STATE_BREAKPOINTS (sd); bp; bp = bp->next)
- bp->flags &= ~SIM_BREAK_DISABLED;
-
- return SIM_RC_OK;
-}
-
-SIM_RC
-sim_disable_all_breakpoints (sd)
- SIM_DESC sd;
-{
- struct sim_breakpoint *bp;
-
- for (bp = STATE_BREAKPOINTS (sd); bp; bp = bp->next)
- bp->flags |= SIM_BREAK_DISABLED;
-
- return SIM_RC_OK;
-}
diff --git a/sim/common/sim-break.h b/sim/common/sim-break.h
deleted file mode 100644
index 8b0338f4b38..00000000000
--- a/sim/common/sim-break.h
+++ /dev/null
@@ -1,38 +0,0 @@
-/* Simulator breakpoint support.
- Copyright (C) 1997 Free Software Foundation, Inc.
- Contributed by Cygnus Support.
-
-This file is part of GDB, the GNU debugger.
-
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License along
-with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
-
-
-#ifndef SIM_BREAK_H
-#define SIM_BREAK_H
-
-/* Call this to install the resume and suspend handlers for the breakpoint
- module. */
-
-MODULE_INSTALL_FN sim_break_install;
-
-/* Call this inside the simulator when we execute the potential
- breakpoint insn. If the breakpoint system knows about it, the
- breakpoint is handled, and this routine never returns. If this
- isn't really a breakpoint, then it returns to allow the caller to
- handle things. */
-
-void sim_handle_breakpoint PARAMS ((SIM_DESC sd, sim_cpu *cpu, sim_cia cia));
-
-#endif /* SIM_BREAK_H */
diff --git a/sim/common/sim-config.c b/sim/common/sim-config.c
deleted file mode 100644
index 10a19aaa205..00000000000
--- a/sim/common/sim-config.c
+++ /dev/null
@@ -1,377 +0,0 @@
-/* This file is part of the GNU simulators.
-
- Copyright (C) 1994-1995,1997, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-#include "sim-main.h"
-#include "sim-assert.h"
-#include "bfd.h"
-
-
-int current_host_byte_order;
-int current_target_byte_order;
-int current_stdio;
-
-enum sim_alignments current_alignment;
-
-#if defined (WITH_FLOATING_POINT)
-int current_floating_point;
-#endif
-
-
-
-/* map a byte order onto a textual string */
-
-static const char *
-config_byte_order_to_a (int byte_order)
-{
- switch (byte_order)
- {
- case LITTLE_ENDIAN:
- return "LITTLE_ENDIAN";
- case BIG_ENDIAN:
- return "BIG_ENDIAN";
- case 0:
- return "0";
- }
- return "UNKNOWN";
-}
-
-
-static const char *
-config_stdio_to_a (int stdio)
-{
- switch (stdio)
- {
- case DONT_USE_STDIO:
- return "DONT_USE_STDIO";
- case DO_USE_STDIO:
- return "DO_USE_STDIO";
- case 0:
- return "0";
- }
- return "UNKNOWN";
-}
-
-
-static const char *
-config_environment_to_a (enum sim_environment environment)
-{
- switch (environment)
- {
- case ALL_ENVIRONMENT:
- return "ALL_ENVIRONMENT";
- case USER_ENVIRONMENT:
- return "USER_ENVIRONMENT";
- case VIRTUAL_ENVIRONMENT:
- return "VIRTUAL_ENVIRONMENT";
- case OPERATING_ENVIRONMENT:
- return "OPERATING_ENVIRONMENT";
- }
- return "UNKNOWN";
-}
-
-
-static const char *
-config_alignment_to_a (enum sim_alignments alignment)
-{
- switch (alignment)
- {
- case MIXED_ALIGNMENT:
- return "MIXED_ALIGNMENT";
- case NONSTRICT_ALIGNMENT:
- return "NONSTRICT_ALIGNMENT";
- case STRICT_ALIGNMENT:
- return "STRICT_ALIGNMENT";
- case FORCED_ALIGNMENT:
- return "FORCED_ALIGNMENT";
- }
- return "UNKNOWN";
-}
-
-
-#if defined (WITH_FLOATING_POINT)
-static const char *
-config_floating_point_to_a (int floating_point)
-{
- switch (floating_point)
- {
- case SOFT_FLOATING_POINT:
- return "SOFT_FLOATING_POINT";
- case HARD_FLOATING_POINT:
- return "HARD_FLOATING_POINT";
- case 0:
- return "0";
- }
- return "UNKNOWN";
-}
-#endif
-
-/* Set the default environment, prior to parsing argv. */
-
-void
-sim_config_default (SIM_DESC sd)
-{
- /* Set the current environment to ALL_ENVIRONMENT to indicate none has been
- selected yet. This is so that after parsing argv, we know whether the
- environment was explicitly specified or not. */
- STATE_ENVIRONMENT (sd) = ALL_ENVIRONMENT;
-}
-
-/* Complete and verify the simulation environment. */
-
-SIM_RC
-sim_config (SIM_DESC sd)
-{
- int prefered_target_byte_order;
- SIM_ASSERT (STATE_MAGIC (sd) == SIM_MAGIC_NUMBER);
-
- /* extract all relevant information */
- if (STATE_PROG_BFD (sd) == NULL)
- prefered_target_byte_order = 0;
- else
- prefered_target_byte_order = (bfd_little_endian(STATE_PROG_BFD (sd))
- ? LITTLE_ENDIAN
- : BIG_ENDIAN);
-
- /* set the host byte order */
- current_host_byte_order = 1;
- if (*(char*)(&current_host_byte_order))
- current_host_byte_order = LITTLE_ENDIAN;
- else
- current_host_byte_order = BIG_ENDIAN;
-
- /* verify the host byte order */
- if (CURRENT_HOST_BYTE_ORDER != current_host_byte_order)
- {
- sim_io_eprintf (sd, "host (%s) and configured (%s) byte order in conflict",
- config_byte_order_to_a (current_host_byte_order),
- config_byte_order_to_a (CURRENT_HOST_BYTE_ORDER));
- return SIM_RC_FAIL;
- }
-
-
- /* set the target byte order */
-#if (WITH_TREE_PROPERTIES)
- if (current_target_byte_order == 0)
- current_target_byte_order
- = (tree_find_boolean_property (root, "/options/little-endian?")
- ? LITTLE_ENDIAN
- : BIG_ENDIAN);
-#endif
- if (current_target_byte_order == 0
- && prefered_target_byte_order != 0)
- current_target_byte_order = prefered_target_byte_order;
- if (current_target_byte_order == 0)
- current_target_byte_order = WITH_TARGET_BYTE_ORDER;
- if (current_target_byte_order == 0)
- current_target_byte_order = WITH_DEFAULT_TARGET_BYTE_ORDER;
-
- /* verify the target byte order */
- if (CURRENT_TARGET_BYTE_ORDER == 0)
- {
- sim_io_eprintf (sd, "Target byte order unspecified\n");
- return SIM_RC_FAIL;
- }
- if (CURRENT_TARGET_BYTE_ORDER != current_target_byte_order)
- sim_io_eprintf (sd, "Target (%s) and configured (%s) byte order in conflict\n",
- config_byte_order_to_a (current_target_byte_order),
- config_byte_order_to_a (CURRENT_TARGET_BYTE_ORDER));
- if (prefered_target_byte_order != 0
- && CURRENT_TARGET_BYTE_ORDER != prefered_target_byte_order)
- sim_io_eprintf (sd, "Target (%s) and specified (%s) byte order in conflict\n",
- config_byte_order_to_a (CURRENT_TARGET_BYTE_ORDER),
- config_byte_order_to_a (prefered_target_byte_order));
-
-
- /* set the stdio */
- if (current_stdio == 0)
- current_stdio = WITH_STDIO;
- if (current_stdio == 0)
- current_stdio = DO_USE_STDIO;
-
- /* verify the stdio */
- if (CURRENT_STDIO == 0)
- {
- sim_io_eprintf (sd, "Target standard IO unspecified\n");
- return SIM_RC_FAIL;
- }
- if (CURRENT_STDIO != current_stdio)
- {
- sim_io_eprintf (sd, "Target (%s) and configured (%s) standard IO in conflict\n",
- config_stdio_to_a (CURRENT_STDIO),
- config_stdio_to_a (current_stdio));
- return SIM_RC_FAIL;
- }
-
-
- /* check the value of MSB */
- if (WITH_TARGET_WORD_MSB != 0
- && WITH_TARGET_WORD_MSB != (WITH_TARGET_WORD_BITSIZE - 1))
- {
- sim_io_eprintf (sd, "Target bitsize (%d) contradicts target most significant bit (%d)\n",
- WITH_TARGET_WORD_BITSIZE, WITH_TARGET_WORD_MSB);
- return SIM_RC_FAIL;
- }
-
-
- /* set the environment */
-#if (WITH_TREE_PROPERTIES)
- if (STATE_ENVIRONMENT (sd) == ALL_ENVIRONMENT)
- {
- const char *env =
- tree_find_string_property(root, "/openprom/options/env");
- STATE_ENVIRONMENT (sd) = ((strcmp(env, "user") == 0
- || strcmp(env, "uea") == 0)
- ? USER_ENVIRONMENT
- : (strcmp(env, "virtual") == 0
- || strcmp(env, "vea") == 0)
- ? VIRTUAL_ENVIRONMENT
- : (strcmp(env, "operating") == 0
- || strcmp(env, "oea") == 0)
- ? OPERATING_ENVIRONMENT
- : ALL_ENVIRONMENT);
- }
-#endif
- if (STATE_ENVIRONMENT (sd) == ALL_ENVIRONMENT)
- STATE_ENVIRONMENT (sd) = DEFAULT_ENVIRONMENT;
-
-
- /* set the alignment */
-#if (WITH_TREE_PROPERTIES)
- if (current_alignment == 0)
- current_alignment =
- (tree_find_boolean_property(root, "/openprom/options/strict-alignment?")
- ? STRICT_ALIGNMENT
- : NONSTRICT_ALIGNMENT);
-#endif
- if (current_alignment == 0)
- current_alignment = WITH_ALIGNMENT;
- if (current_alignment == 0)
- current_alignment = WITH_DEFAULT_ALIGNMENT;
-
- /* verify the alignment */
- if (CURRENT_ALIGNMENT == 0)
- {
- sim_io_eprintf (sd, "Target alignment unspecified\n");
- return SIM_RC_FAIL;
- }
- if (CURRENT_ALIGNMENT != current_alignment)
- {
- sim_io_eprintf (sd, "Target (%s) and configured (%s) alignment in conflict\n",
- config_alignment_to_a (CURRENT_ALIGNMENT),
- config_alignment_to_a (current_alignment));
- return SIM_RC_FAIL;
- }
-
-#if defined (WITH_FLOATING_POINT)
-
- /* set the floating point */
- if (current_floating_point == 0)
- current_floating_point = WITH_FLOATING_POINT;
-
- /* verify the floating point */
- if (CURRENT_FLOATING_POINT == 0)
- {
- sim_io_eprintf (sd, "Target floating-point unspecified\n");
- return SIM_RC_FAIL;
- }
- if (CURRENT_FLOATING_POINT != current_floating_point)
- {
- sim_io_eprintf (sd, "Target (%s) and configured (%s) floating-point in conflict\n",
- config_alignment_to_a (CURRENT_FLOATING_POINT),
- config_alignment_to_a (current_floating_point));
- return SIM_RC_FAIL;
- }
-
-#endif
- return SIM_RC_OK;
-}
-
-
-void
-print_sim_config (SIM_DESC sd)
-{
-#if defined (__GNUC__) && defined (__VERSION__)
- sim_io_printf (sd, "Compiled by GCC %s on %s %s\n",
- __VERSION__, __DATE__, __TIME__);
-#else
- sim_io_printf (sd, "Compiled on %s %s\n", __DATE__, __TIME__);
-#endif
-
- sim_io_printf (sd, "WITH_TARGET_BYTE_ORDER = %s\n",
- config_byte_order_to_a (WITH_TARGET_BYTE_ORDER));
-
- sim_io_printf (sd, "WITH_DEFAULT_TARGET_BYTE_ORDER = %s\n",
- config_byte_order_to_a (WITH_DEFAULT_TARGET_BYTE_ORDER));
-
- sim_io_printf (sd, "WITH_HOST_BYTE_ORDER = %s\n",
- config_byte_order_to_a (WITH_HOST_BYTE_ORDER));
-
- sim_io_printf (sd, "WITH_STDIO = %s\n",
- config_stdio_to_a (WITH_STDIO));
-
- sim_io_printf (sd, "WITH_TARGET_WORD_MSB = %d\n",
- WITH_TARGET_WORD_MSB);
-
- sim_io_printf (sd, "WITH_TARGET_WORD_BITSIZE = %d\n",
- WITH_TARGET_WORD_BITSIZE);
-
- sim_io_printf (sd, "WITH_TARGET_ADDRESS_BITSIZE = %d\n",
- WITH_TARGET_ADDRESS_BITSIZE);
-
- sim_io_printf (sd, "WITH_TARGET_CELL_BITSIZE = %d\n",
- WITH_TARGET_CELL_BITSIZE);
-
- sim_io_printf (sd, "WITH_TARGET_FLOATING_POINT_BITSIZE = %d\n",
- WITH_TARGET_FLOATING_POINT_BITSIZE);
-
- sim_io_printf (sd, "WITH_ENVIRONMENT = %s\n",
- config_environment_to_a (WITH_ENVIRONMENT));
-
- sim_io_printf (sd, "WITH_ALIGNMENT = %s\n",
- config_alignment_to_a (WITH_ALIGNMENT));
-
-#if defined (WITH_DEFAULT_ALIGNMENT)
- sim_io_printf (sd, "WITH_DEFAULT_ALIGNMENT = %s\n",
- config_alignment_to_a (WITH_DEFAULT_ALIGNMENT));
-#endif
-
-#if defined (WITH_XOR_ENDIAN)
- sim_io_printf (sd, "WITH_XOR_ENDIAN = %d\n", WITH_XOR_ENDIAN);
-#endif
-
-#if defined (WITH_FLOATING_POINT)
- sim_io_printf (sd, "WITH_FLOATING_POINT = %s\n",
- config_floating_point_to_a (WITH_FLOATING_POINT));
-#endif
-
-#if defined (WITH_SMP)
- sim_io_printf (sd, "WITH_SMP = %d\n", WITH_SMP);
-#endif
-
-#if defined (WITH_RESERVED_BITS)
- sim_io_printf (sd, "WITH_RESERVED_BITS = %d\n", WITH_RESERVED_BITS);
-#endif
-
-#if defined (WITH_PROFILE)
- sim_io_printf (sd, "WITH_PROFILE = %d\n", WITH_PROFILE);
-#endif
-
-}
diff --git a/sim/common/sim-config.h b/sim/common/sim-config.h
deleted file mode 100644
index 97207120ac2..00000000000
--- a/sim/common/sim-config.h
+++ /dev/null
@@ -1,594 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1995, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-#ifndef SIM_CONFIG_H
-#define SIM_CONFIG_H
-
-
-/* Host dependant:
-
- The CPP below defines information about the compilation host. In
- particular it defines the macro's:
-
- WITH_HOST_BYTE_ORDER The byte order of the host. Could
- be any of LITTLE_ENDIAN, BIG_ENDIAN
- or 0 (unknown). Those macro's also
- need to be defined.
-
- */
-
-
-/* NetBSD:
-
- NetBSD is easy, everything you could ever want is in a header file
- (well almost :-) */
-
-#if defined(__NetBSD__)
-# include <machine/endian.h>
-# if (WITH_HOST_BYTE_ORDER == 0)
-# undef WITH_HOST_BYTE_ORDER
-# define WITH_HOST_BYTE_ORDER BYTE_ORDER
-# endif
-# if (BYTE_ORDER != WITH_HOST_BYTE_ORDER)
-# error "host endian incorrectly configured, check config.h"
-# endif
-#endif
-
-/* Linux is similarly easy. */
-
-#if defined(__linux__)
-# include <endian.h>
-# if defined(__LITTLE_ENDIAN) && !defined(LITTLE_ENDIAN)
-# define LITTLE_ENDIAN __LITTLE_ENDIAN
-# endif
-# if defined(__BIG_ENDIAN) && !defined(BIG_ENDIAN)
-# define BIG_ENDIAN __BIG_ENDIAN
-# endif
-# if defined(__BYTE_ORDER) && !defined(BYTE_ORDER)
-# define BYTE_ORDER __BYTE_ORDER
-# endif
-# if (WITH_HOST_BYTE_ORDER == 0)
-# undef WITH_HOST_BYTE_ORDER
-# define WITH_HOST_BYTE_ORDER BYTE_ORDER
-# endif
-# if (BYTE_ORDER != WITH_HOST_BYTE_ORDER)
-# error "host endian incorrectly configured, check config.h"
-# endif
-#endif
-
-/* INSERT HERE - hosts that have available LITTLE_ENDIAN and
- BIG_ENDIAN macro's */
-
-
-/* Some hosts don't define LITTLE_ENDIAN or BIG_ENDIAN, help them out */
-
-#ifndef LITTLE_ENDIAN
-#define LITTLE_ENDIAN 1234
-#endif
-#ifndef BIG_ENDIAN
-#define BIG_ENDIAN 4321
-#endif
-
-
-/* SunOS on SPARC:
-
- Big endian last time I looked */
-
-#if defined(sparc) || defined(__sparc__)
-# if (WITH_HOST_BYTE_ORDER == 0)
-# undef WITH_HOST_BYTE_ORDER
-# define WITH_HOST_BYTE_ORDER BIG_ENDIAN
-# endif
-# if (WITH_HOST_BYTE_ORDER != BIG_ENDIAN)
-# error "sun was big endian last time I looked ..."
-# endif
-#endif
-
-
-/* Random x86
-
- Little endian last time I looked */
-
-#if defined(i386) || defined(i486) || defined(i586) || defined (i686) || defined(__i386__) || defined(__i486__) || defined(__i586__) || defined (__i686__)
-# if (WITH_HOST_BYTE_ORDER == 0)
-# undef WITH_HOST_BYTE_ORDER
-# define WITH_HOST_BYTE_ORDER LITTLE_ENDIAN
-# endif
-# if (WITH_HOST_BYTE_ORDER != LITTLE_ENDIAN)
-# error "x86 was little endian last time I looked ..."
-# endif
-#endif
-
-#if (defined (__i486__) || defined (__i586__) || defined (__i686__)) && defined(__GNUC__) && WITH_BSWAP
-#undef htonl
-#undef ntohl
-#define htonl(IN) __extension__ ({ int _out; __asm__ ("bswap %0" : "=r" (_out) : "0" (IN)); _out; })
-#define ntohl(IN) __extension__ ({ int _out; __asm__ ("bswap %0" : "=r" (_out) : "0" (IN)); _out; })
-#endif
-
-/* Power or PowerPC running AIX */
-#if defined(_POWER) && defined(_AIX)
-# if (WITH_HOST_BYTE_ORDER == 0)
-# undef WITH_HOST_BYTE_ORDER
-# define WITH_HOST_BYTE_ORDER BIG_ENDIAN
-# endif
-# if (WITH_HOST_BYTE_ORDER != BIG_ENDIAN)
-# error "Power/PowerPC AIX was big endian last time I looked ..."
-# endif
-#endif
-
-/* Solaris running PowerPC */
-#if defined(__PPC) && defined(__sun__)
-# if (WITH_HOST_BYTE_ORDER == 0)
-# undef WITH_HOST_BYTE_ORDER
-# define WITH_HOST_BYTE_ORDER LITTLE_ENDIAN
-# endif
-# if (WITH_HOST_BYTE_ORDER != LITTLE_ENDIAN)
-# error "Solaris on PowerPCs was little endian last time I looked ..."
-# endif
-#endif
-
-/* HP/PA */
-#if defined(__hppa__)
-# if (WITH_HOST_BYTE_ORDER == 0)
-# undef WITH_HOST_BYTE_ORDER
-# define WITH_HOST_BYTE_ORDER BIG_ENDIAN
-# endif
-# if (WITH_HOST_BYTE_ORDER != BIG_ENDIAN)
-# error "HP/PA was big endian last time I looked ..."
-# endif
-#endif
-
-/* Big endian MIPS */
-#if defined(__MIPSEB__)
-# if (WITH_HOST_BYTE_ORDER == 0)
-# undef WITH_HOST_BYTE_ORDER
-# define WITH_HOST_BYTE_ORDER BIG_ENDIAN
-# endif
-# if (WITH_HOST_BYTE_ORDER != BIG_ENDIAN)
-# error "MIPSEB was big endian last time I looked ..."
-# endif
-#endif
-
-/* Little endian MIPS */
-#if defined(__MIPSEL__)
-# if (WITH_HOST_BYTE_ORDER == 0)
-# undef WITH_HOST_BYTE_ORDER
-# define WITH_HOST_BYTE_ORDER LITTLE_ENDIAN
-# endif
-# if (WITH_HOST_BYTE_ORDER != LITTLE_ENDIAN)
-# error "MIPSEL was little endian last time I looked ..."
-# endif
-#endif
-
-/* Windows NT */
-#if defined(__WIN32__)
-# if (WITH_HOST_BYTE_ORDER == 0)
-# undef WITH_HOST_BYTE_ORDER
-# define WITH_HOST_BYTE_ORDER LITTLE_ENDIAN
-# endif
-# if (WITH_HOST_BYTE_ORDER != LITTLE_ENDIAN)
-# error "Windows NT was little endian last time I looked ..."
-# endif
-#endif
-
-/* Alpha running DEC unix */
-#if defined(__osf__) && defined(__alpha__)
-# if (WITH_HOST_BYTE_ORDER == 0)
-# undef WITH_HOST_BYTE_ORDER
-# define WITH_HOST_BYTE_ORDER LITTLE_ENDIAN
-# endif
-# if (WITH_HOST_BYTE_ORDER != LITTLE_ENDIAN)
-# error "AXP running DEC unix was little endian last time I looked ..."
-# endif
-#endif
-
-
-/* INSERT HERE - additional hosts that do not have LITTLE_ENDIAN and
- BIG_ENDIAN definitions available. */
-
-/* Until devices and tree properties are sorted out, tell sim-config.c
- not to call the tree_find_foo fns. */
-#define WITH_TREE_PROPERTIES 0
-
-
-/* endianness of the host/target:
-
- If the build process is aware (at compile time) of the endianness
- of the host/target it is able to eliminate slower generic endian
- handling code.
-
- Possible values are 0 (unknown), LITTLE_ENDIAN, BIG_ENDIAN */
-
-#ifndef WITH_HOST_BYTE_ORDER
-#define WITH_HOST_BYTE_ORDER 0 /*unknown*/
-#endif
-
-#ifndef WITH_TARGET_BYTE_ORDER
-#define WITH_TARGET_BYTE_ORDER 0 /*unknown*/
-#endif
-
-#ifndef WITH_DEFAULT_TARGET_BYTE_ORDER
-#define WITH_DEFAULT_TARGET_BYTE_ORDER 0 /* fatal */
-#endif
-
-extern int current_host_byte_order;
-#define CURRENT_HOST_BYTE_ORDER (WITH_HOST_BYTE_ORDER \
- ? WITH_HOST_BYTE_ORDER \
- : current_host_byte_order)
-extern int current_target_byte_order;
-#define CURRENT_TARGET_BYTE_ORDER (WITH_TARGET_BYTE_ORDER \
- ? WITH_TARGET_BYTE_ORDER \
- : current_target_byte_order)
-
-
-
-/* XOR endian.
-
- In addition to the above, the simulator can support the horrible
- XOR endian mode (as found in the PowerPC and MIPS ISA). See
- sim-core for more information.
-
- If WITH_XOR_ENDIAN is non-zero, it specifies the number of bytes
- potentially involved in the XOR munge. A typical value is 8. */
-
-#ifndef WITH_XOR_ENDIAN
-#define WITH_XOR_ENDIAN 0
-#endif
-
-
-
-/* Intel host BSWAP support:
-
- Whether to use bswap on the 486 and pentiums rather than the 386
- sequence that uses xchgb/rorl/xchgb */
-#ifndef WITH_BSWAP
-#define WITH_BSWAP 0
-#endif
-
-
-
-/* SMP support:
-
- Sets a limit on the number of processors that can be simulated. If
- WITH_SMP is set to zero (0), the simulator is restricted to
- suporting only one processor (and as a consequence leaves the SMP
- code out of the build process).
-
- The actual number of processors is taken from the device
- /options/smp@<nr-cpu> */
-
-#if defined (WITH_SMP) && (WITH_SMP > 0)
-#define MAX_NR_PROCESSORS WITH_SMP
-#endif
-
-#ifndef MAX_NR_PROCESSORS
-#define MAX_NR_PROCESSORS 1
-#endif
-
-
-/* Size of target word, address and OpenFirmware Cell:
-
- The target word size is determined by the natural size of its
- reginsters.
-
- On most hosts, the address and cell are the same size as a target
- word. */
-
-#ifndef WITH_TARGET_WORD_BITSIZE
-#define WITH_TARGET_WORD_BITSIZE 32
-#endif
-
-#ifndef WITH_TARGET_ADDRESS_BITSIZE
-#define WITH_TARGET_ADDRESS_BITSIZE WITH_TARGET_WORD_BITSIZE
-#endif
-
-#ifndef WITH_TARGET_CELL_BITSIZE
-#define WITH_TARGET_CELL_BITSIZE WITH_TARGET_WORD_BITSIZE
-#endif
-
-#ifndef WITH_TARGET_FLOATING_POINT_BITSIZE
-#define WITH_TARGET_FLOATING_POINT_BITSIZE 64
-#endif
-
-
-
-/* Most significant bit of target:
-
- Set this according to your target's bit numbering convention. For
- the PowerPC it is zero, for many other targets it is 31 or 63.
-
- For targets that can both have either 32 or 64 bit words and number
- MSB as 31, 63. Define this to be (WITH_TARGET_WORD_BITSIZE - 1) */
-
-#ifndef WITH_TARGET_WORD_MSB
-#define WITH_TARGET_WORD_MSB 0
-#endif
-
-
-
-/* Program environment:
-
- Three environments are available - UEA (user), VEA (virtual) and
- OEA (perating). The former two are environment that users would
- expect to see (VEA includes things like coherency and the time
- base) while OEA is what an operating system expects to see. By
- setting these to specific values, the build process is able to
- eliminate non relevent environment code.
-
- STATE_ENVIRONMENT(sd) specifies which of vea or oea is required for
- the current runtime.
-
- ALL_ENVIRONMENT is used during configuration as a value for
- WITH_ENVIRONMENT to indicate the choice is runtime selectable.
- The default is then USER_ENVIRONMENT [since allowing the user to choose
- the default at configure time seems like featuritis and since people using
- OPERATING_ENVIRONMENT have more to worry about than selecting the
- default].
- ALL_ENVIRONMENT is also used to set STATE_ENVIRONMENT to the
- "uninitialized" state. */
-
-enum sim_environment {
- ALL_ENVIRONMENT,
- USER_ENVIRONMENT,
- VIRTUAL_ENVIRONMENT,
- OPERATING_ENVIRONMENT
-};
-
-/* If the simulator specified SIM_AC_OPTION_ENVIRONMENT, indicate so. */
-#ifdef WITH_ENVIRONMENT
-#define SIM_HAVE_ENVIRONMENT
-#endif
-
-/* If the simulator doesn't specify SIM_AC_OPTION_ENVIRONMENT in its
- configure.in, the only supported environment is the user environment. */
-#ifndef WITH_ENVIRONMENT
-#define WITH_ENVIRONMENT USER_ENVIRONMENT
-#endif
-
-#define DEFAULT_ENVIRONMENT (WITH_ENVIRONMENT != ALL_ENVIRONMENT \
- ? WITH_ENVIRONMENT \
- : USER_ENVIRONMENT)
-
-
-/* Callback & Modulo Memory.
-
- Core includes a builtin memory type (raw_memory) that is
- implemented using an array. raw_memory does not require any
- additional functions etc.
-
- Callback memory is where the core calls a core device for the data
- it requires. Callback memory can be layered using priorities.
-
- Modulo memory is a variation on raw_memory where ADDRESS & (MODULO
- - 1) is used as the index into the memory array.
-
- The OEA model uses callback memory for devices.
-
- The VEA model uses callback memory to capture `page faults'.
-
- BTW, while raw_memory could have been implemented as a callback,
- profiling has shown that there is a biger win (at least for the
- x86) in eliminating a function call for the most common
- (raw_memory) case. */
-
-#ifndef WITH_CALLBACK_MEMORY
-#define WITH_CALLBACK_MEMORY 1
-#endif
-
-#ifndef WITH_MODULO_MEMORY
-#define WITH_MODULO_MEMORY 0
-#endif
-
-
-
-/* Alignment:
-
- A processor architecture may or may not handle miss aligned
- transfers.
-
- As alternatives: both little and big endian modes take an exception
- (STRICT_ALIGNMENT); big and little endian models handle mis aligned
- transfers (NONSTRICT_ALIGNMENT); or the address is forced into
- alignment using a mask (FORCED_ALIGNMENT).
-
- Mixed alignment should be specified when the simulator needs to be
- able to change the alignment requirements on the fly (eg for
- bi-endian support). */
-
-enum sim_alignments {
- MIXED_ALIGNMENT,
- NONSTRICT_ALIGNMENT,
- STRICT_ALIGNMENT,
- FORCED_ALIGNMENT,
-};
-
-extern enum sim_alignments current_alignment;
-
-#if !defined (WITH_ALIGNMENT)
-#define WITH_ALIGNMENT 0
-#endif
-
-#if !defined (WITH_DEFAULT_ALIGNMENT)
-#define WITH_DEFAULT_ALIGNMENT 0 /* fatal */
-#endif
-
-
-
-
-#define CURRENT_ALIGNMENT (WITH_ALIGNMENT \
- ? WITH_ALIGNMENT \
- : current_alignment)
-
-
-
-/* Floating point suport:
-
- Should the processor trap for all floating point instructions (as
- if the hardware wasn't implemented) or implement the floating point
- instructions directly. */
-
-#if defined (WITH_FLOATING_POINT)
-
-#define SOFT_FLOATING_POINT 1
-#define HARD_FLOATING_POINT 2
-
-extern int current_floating_point;
-#define CURRENT_FLOATING_POINT (WITH_FLOATING_POINT \
- ? WITH_FLOATING_POINT \
- : current_floating_point)
-
-#endif
-
-
-
-/* Engine module.
-
- Use the common start/stop/restart framework (sim-engine).
- Simulators using the other modules but not the engine should define
- WITH_ENGINE=0. */
-
-#ifndef WITH_ENGINE
-#define WITH_ENGINE 1
-#endif
-
-
-
-/* Debugging:
-
- Control the inclusion of debugging code.
- Debugging is only turned on in rare circumstances [say during development]
- and is not intended to be turned on otherwise. */
-
-#ifndef WITH_DEBUG
-#define WITH_DEBUG 0
-#endif
-
-/* Include the tracing code. Disabling this eliminates all tracing
- code */
-
-#ifndef WITH_TRACE
-#define WITH_TRACE (-1)
-#endif
-
-/* Include the profiling code. Disabling this eliminates all profiling
- code. */
-
-#ifndef WITH_PROFILE
-#define WITH_PROFILE (-1)
-#endif
-
-
-/* include code that checks assertions scattered through out the
- program */
-
-#ifndef WITH_ASSERT
-#define WITH_ASSERT 1
-#endif
-
-
-/* Whether to check instructions for reserved bits being set */
-
-/* #define WITH_RESERVED_BITS 1 */
-
-
-
-/* include monitoring code */
-
-#define MONITOR_INSTRUCTION_ISSUE 1
-#define MONITOR_LOAD_STORE_UNIT 2
-/* do not define WITH_MON by default */
-#define DEFAULT_WITH_MON (MONITOR_LOAD_STORE_UNIT \
- | MONITOR_INSTRUCTION_ISSUE)
-
-
-/* Current CPU model (models are in the generated models.h include file) */
-#ifndef WITH_MODEL
-#define WITH_MODEL 0
-#endif
-
-#define CURRENT_MODEL (WITH_MODEL \
- ? WITH_MODEL \
- : current_model)
-
-#ifndef WITH_DEFAULT_MODEL
-#define WITH_DEFAULT_MODEL DEFAULT_MODEL
-#endif
-
-#define MODEL_ISSUE_IGNORE (-1)
-#define MODEL_ISSUE_PROCESS 1
-
-#ifndef WITH_MODEL_ISSUE
-#define WITH_MODEL_ISSUE 0
-#endif
-
-extern int current_model_issue;
-#define CURRENT_MODEL_ISSUE (WITH_MODEL_ISSUE \
- ? WITH_MODEL_ISSUE \
- : current_model_issue)
-
-
-
-/* Whether or not input/output just uses stdio, or uses printf_filtered for
- output, and polling input for input. */
-
-#define DONT_USE_STDIO 2
-#define DO_USE_STDIO 1
-
-#ifndef WITH_STDIO
-#define WITH_STDIO 0
-#endif
-
-extern int current_stdio;
-#define CURRENT_STDIO (WITH_STDIO \
- ? WITH_STDIO \
- : current_stdio)
-
-
-
-/* Specify that configured calls pass parameters in registers when the
- convention is that they are placed on the stack */
-
-#ifndef WITH_REGPARM
-#define WITH_REGPARM 0
-#endif
-
-/* Specify that configured calls use an alternative calling mechanism */
-
-#ifndef WITH_STDCALL
-#define WITH_STDCALL 0
-#endif
-
-
-/* Set the default state configuration, before parsing argv. */
-
-extern void sim_config_default (SIM_DESC sd);
-
-/* Complete and verify the simulator configuration. */
-
-extern SIM_RC sim_config (SIM_DESC sd);
-
-/* Print the simulator configuration. */
-
-extern void print_sim_config (SIM_DESC sd);
-
-
-#endif
diff --git a/sim/common/sim-core.c b/sim/common/sim-core.c
deleted file mode 100644
index 8e5ef38ab95..00000000000
--- a/sim/common/sim-core.c
+++ /dev/null
@@ -1,836 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1997, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-#ifndef SIM_CORE_C
-#define SIM_CORE_C
-
-#include "sim-main.h"
-#include "sim-assert.h"
-
-#if (WITH_HW)
-#include "sim-hw.h"
-#endif
-
-/* "core" module install handler.
-
- This is called via sim_module_install to install the "core"
- subsystem into the simulator. */
-
-#if EXTERN_SIM_CORE_P
-static MODULE_INIT_FN sim_core_init;
-static MODULE_UNINSTALL_FN sim_core_uninstall;
-#endif
-
-#if EXTERN_SIM_CORE_P
-SIM_RC
-sim_core_install (SIM_DESC sd)
-{
- SIM_ASSERT (STATE_MAGIC (sd) == SIM_MAGIC_NUMBER);
-
- /* establish the other handlers */
- sim_module_add_uninstall_fn (sd, sim_core_uninstall);
- sim_module_add_init_fn (sd, sim_core_init);
-
- /* establish any initial data structures - none */
- return SIM_RC_OK;
-}
-#endif
-
-
-/* Uninstall the "core" subsystem from the simulator. */
-
-#if EXTERN_SIM_CORE_P
-static void
-sim_core_uninstall (SIM_DESC sd)
-{
- sim_core *core = STATE_CORE(sd);
- unsigned map;
- /* blow away any mappings */
- for (map = 0; map < nr_maps; map++) {
- sim_core_mapping *curr = core->common.map[map].first;
- while (curr != NULL) {
- sim_core_mapping *tbd = curr;
- curr = curr->next;
- if (tbd->free_buffer != NULL) {
- SIM_ASSERT(tbd->buffer != NULL);
- zfree(tbd->free_buffer);
- }
- zfree(tbd);
- }
- core->common.map[map].first = NULL;
- }
-}
-#endif
-
-
-#if EXTERN_SIM_CORE_P
-static SIM_RC
-sim_core_init (SIM_DESC sd)
-{
- /* Nothing to do */
- return SIM_RC_OK;
-}
-#endif
-
-
-
-#ifndef SIM_CORE_SIGNAL
-#define SIM_CORE_SIGNAL(SD,CPU,CIA,MAP,NR_BYTES,ADDR,TRANSFER,ERROR) \
-sim_core_signal ((SD), (CPU), (CIA), (MAP), (NR_BYTES), (ADDR), (TRANSFER), (ERROR))
-#endif
-
-#if EXTERN_SIM_CORE_P
-void
-sim_core_signal (SIM_DESC sd,
- sim_cpu *cpu,
- sim_cia cia,
- unsigned map,
- int nr_bytes,
- address_word addr,
- transfer_type transfer,
- sim_core_signals sig)
-{
- const char *copy = (transfer == read_transfer ? "read" : "write");
- address_word ip = CIA_ADDR (cia);
- switch (sig)
- {
- case sim_core_unmapped_signal:
- sim_io_eprintf (sd, "core: %d byte %s to unmapped address 0x%lx at 0x%lx\n",
- nr_bytes, copy, (unsigned long) addr, (unsigned long) ip);
- sim_engine_halt (sd, cpu, NULL, cia, sim_stopped, SIM_SIGSEGV);
- break;
- case sim_core_unaligned_signal:
- sim_io_eprintf (sd, "core: %d byte misaligned %s to address 0x%lx at 0x%lx\n",
- nr_bytes, copy, (unsigned long) addr, (unsigned long) ip);
- sim_engine_halt (sd, cpu, NULL, cia, sim_stopped, SIM_SIGBUS);
- break;
- default:
- sim_engine_abort (sd, cpu, cia,
- "sim_core_signal - internal error - bad switch");
- }
-}
-#endif
-
-
-#if EXTERN_SIM_CORE_P
-static sim_core_mapping *
-new_sim_core_mapping (SIM_DESC sd,
- int level,
- int space,
- address_word addr,
- address_word nr_bytes,
- unsigned modulo,
-#if WITH_HW
- struct hw *device,
-#else
- device *device,
-#endif
- void *buffer,
- void *free_buffer)
-{
- sim_core_mapping *new_mapping = ZALLOC(sim_core_mapping);
- /* common */
- new_mapping->level = level;
- new_mapping->space = space;
- new_mapping->base = addr;
- new_mapping->nr_bytes = nr_bytes;
- new_mapping->bound = addr + (nr_bytes - 1);
- if (modulo == 0)
- new_mapping->mask = (unsigned) 0 - 1;
- else
- new_mapping->mask = modulo - 1;
- new_mapping->buffer = buffer;
- new_mapping->free_buffer = free_buffer;
- new_mapping->device = device;
- return new_mapping;
-}
-#endif
-
-
-#if EXTERN_SIM_CORE_P
-static void
-sim_core_map_attach (SIM_DESC sd,
- sim_core_map *access_map,
- int level,
- int space,
- address_word addr,
- address_word nr_bytes,
- unsigned modulo,
-#if WITH_HW
- struct hw *client, /*callback/default*/
-#else
- device *client, /*callback/default*/
-#endif
- void *buffer, /*raw_memory*/
- void *free_buffer) /*raw_memory*/
-{
- /* find the insertion point for this additional mapping and then
- insert */
- sim_core_mapping *next_mapping;
- sim_core_mapping **last_mapping;
-
- SIM_ASSERT ((client == NULL) != (buffer == NULL));
- SIM_ASSERT ((client == NULL) >= (free_buffer != NULL));
-
- /* actually do occasionally get a zero size map */
- if (nr_bytes == 0)
- {
-#if (WITH_DEVICES)
- device_error(client, "called on sim_core_map_attach with size zero");
-#endif
-#if (WITH_HW)
- sim_hw_abort (sd, client, "called on sim_core_map_attach with size zero");
-#endif
- sim_io_error (sd, "called on sim_core_map_attach with size zero");
- }
-
- /* find the insertion point (between last/next) */
- next_mapping = access_map->first;
- last_mapping = &access_map->first;
- while(next_mapping != NULL
- && (next_mapping->level < level
- || (next_mapping->level == level
- && next_mapping->bound < addr)))
- {
- /* provided levels are the same */
- /* assert: next_mapping->base > all bases before next_mapping */
- /* assert: next_mapping->bound >= all bounds before next_mapping */
- last_mapping = &next_mapping->next;
- next_mapping = next_mapping->next;
- }
-
- /* check insertion point correct */
- SIM_ASSERT (next_mapping == NULL || next_mapping->level >= level);
- if (next_mapping != NULL && next_mapping->level == level
- && next_mapping->base < (addr + (nr_bytes - 1)))
- {
-#if (WITH_DEVICES)
- device_error (client, "memory map %d:0x%lx..0x%lx (%ld bytes) overlaps %d:0x%lx..0x%lx (%ld bytes)",
- space,
- (long) addr,
- (long) (addr + nr_bytes - 1),
- (long) nr_bytes,
- next_mapping->space,
- (long) next_mapping->base,
- (long) next_mapping->bound,
- (long) next_mapping->nr_bytes);
-#endif
-#if WITH_HW
- sim_hw_abort (sd, client, "memory map %d:0x%lx..0x%lx (%ld bytes) overlaps %d:0x%lx..0x%lx (%ld bytes)",
- space,
- (long) addr,
- (long) (addr + (nr_bytes - 1)),
- (long) nr_bytes,
- next_mapping->space,
- (long) next_mapping->base,
- (long) next_mapping->bound,
- (long) next_mapping->nr_bytes);
-#endif
- sim_io_error (sd, "memory map %d:0x%lx..0x%lx (%ld bytes) overlaps %d:0x%lx..0x%lx (%ld bytes)",
- space,
- (long) addr,
- (long) (addr + (nr_bytes - 1)),
- (long) nr_bytes,
- next_mapping->space,
- (long) next_mapping->base,
- (long) next_mapping->bound,
- (long) next_mapping->nr_bytes);
- }
-
- /* create/insert the new mapping */
- *last_mapping = new_sim_core_mapping(sd,
- level,
- space, addr, nr_bytes, modulo,
- client, buffer, free_buffer);
- (*last_mapping)->next = next_mapping;
-}
-#endif
-
-
-/* Attach memory or a memory mapped device to the simulator.
- See sim-core.h for a full description. */
-
-#if EXTERN_SIM_CORE_P
-void
-sim_core_attach (SIM_DESC sd,
- sim_cpu *cpu,
- int level,
- unsigned mapmask,
- int space,
- address_word addr,
- address_word nr_bytes,
- unsigned modulo,
-#if WITH_HW
- struct hw *client,
-#else
- device *client,
-#endif
- void *optional_buffer)
-{
- sim_core *memory = STATE_CORE(sd);
- unsigned map;
- void *buffer;
- void *free_buffer;
-
- /* check for for attempt to use unimplemented per-processor core map */
- if (cpu != NULL)
- sim_io_error (sd, "sim_core_map_attach - processor specific memory map not yet supported");
-
- /* verify modulo memory */
- if (!WITH_MODULO_MEMORY && modulo != 0)
- {
-#if (WITH_DEVICES)
- device_error (client, "sim_core_attach - internal error - modulo memory disabled");
-#endif
-#if (WITH_HW)
- sim_hw_abort (sd, client, "sim_core_attach - internal error - modulo memory disabled");
-#endif
- sim_io_error (sd, "sim_core_attach - internal error - modulo memory disabled");
- }
- if (client != NULL && modulo != 0)
- {
-#if (WITH_DEVICES)
- device_error (client, "sim_core_attach - internal error - modulo and callback memory conflict");
-#endif
-#if (WITH_HW)
- sim_hw_abort (sd, client, "sim_core_attach - internal error - modulo and callback memory conflict");
-#endif
- sim_io_error (sd, "sim_core_attach - internal error - modulo and callback memory conflict");
- }
- if (modulo != 0)
- {
- unsigned mask = modulo - 1;
- /* any zero bits */
- while (mask >= sizeof (unsigned64)) /* minimum modulo */
- {
- if ((mask & 1) == 0)
- mask = 0;
- else
- mask >>= 1;
- }
- if (mask != sizeof (unsigned64) - 1)
- {
-#if (WITH_DEVICES)
- device_error (client, "sim_core_attach - internal error - modulo %lx not power of two", (long) modulo);
-#endif
-#if (WITH_HW)
- sim_hw_abort (sd, client, "sim_core_attach - internal error - modulo %lx not power of two", (long) modulo);
-#endif
- sim_io_error (sd, "sim_core_attach - internal error - modulo %lx not power of two", (long) modulo);
- }
- }
-
- /* verify consistency between device and buffer */
- if (client != NULL && optional_buffer != NULL)
- {
-#if (WITH_DEVICES)
- device_error (client, "sim_core_attach - internal error - conflicting buffer and attach arguments");
-#endif
-#if (WITH_HW)
- sim_hw_abort (sd, client, "sim_core_attach - internal error - conflicting buffer and attach arguments");
-#endif
- sim_io_error (sd, "sim_core_attach - internal error - conflicting buffer and attach arguments");
- }
- if (client == NULL)
- {
- if (optional_buffer == NULL)
- {
- int padding = (addr % sizeof (unsigned64));
- unsigned long bytes = (modulo == 0 ? nr_bytes : modulo) + padding;
- free_buffer = zalloc (bytes);
- buffer = (char*) free_buffer + padding;
- }
- else
- {
- buffer = optional_buffer;
- free_buffer = NULL;
- }
- }
- else
- {
- /* a device */
- buffer = NULL;
- free_buffer = NULL;
- }
-
- /* attach the region to all applicable access maps */
- for (map = 0;
- map < nr_maps;
- map++)
- {
- if (mapmask & (1 << map))
- {
- sim_core_map_attach (sd, &memory->common.map[map],
- level, space, addr, nr_bytes, modulo,
- client, buffer, free_buffer);
- free_buffer = NULL;
- }
- }
-
- /* Just copy this map to each of the processor specific data structures.
- FIXME - later this will be replaced by true processor specific
- maps. */
- {
- int i;
- for (i = 0; i < MAX_NR_PROCESSORS; i++)
- {
- CPU_CORE (STATE_CPU (sd, i))->common = STATE_CORE (sd)->common;
- }
- }
-}
-#endif
-
-
-/* Remove any memory reference related to this address */
-#if EXTERN_SIM_CORE_P
-static void
-sim_core_map_detach (SIM_DESC sd,
- sim_core_map *access_map,
- int level,
- int space,
- address_word addr)
-{
- sim_core_mapping **entry;
- for (entry = &access_map->first;
- (*entry) != NULL;
- entry = &(*entry)->next)
- {
- if ((*entry)->base == addr
- && (*entry)->level == level
- && (*entry)->space == space)
- {
- sim_core_mapping *dead = (*entry);
- (*entry) = dead->next;
- if (dead->free_buffer != NULL)
- zfree (dead->free_buffer);
- zfree (dead);
- return;
- }
- }
-}
-#endif
-
-#if EXTERN_SIM_CORE_P
-void
-sim_core_detach (SIM_DESC sd,
- sim_cpu *cpu,
- int level,
- int address_space,
- address_word addr)
-{
- sim_core *memory = STATE_CORE (sd);
- unsigned map;
- for (map = 0; map < nr_maps; map++)
- {
- sim_core_map_detach (sd, &memory->common.map[map],
- level, address_space, addr);
- }
- /* Just copy this update to each of the processor specific data
- structures. FIXME - later this will be replaced by true
- processor specific maps. */
- {
- int i;
- for (i = 0; i < MAX_NR_PROCESSORS; i++)
- {
- CPU_CORE (STATE_CPU (sd, i))->common = STATE_CORE (sd)->common;
- }
- }
-}
-#endif
-
-
-STATIC_INLINE_SIM_CORE\
-(sim_core_mapping *)
-sim_core_find_mapping(sim_core_common *core,
- unsigned map,
- address_word addr,
- unsigned nr_bytes,
- transfer_type transfer,
- int abort, /*either 0 or 1 - hint to inline/-O */
- sim_cpu *cpu, /* abort => cpu != NULL */
- sim_cia cia)
-{
- sim_core_mapping *mapping = core->map[map].first;
- ASSERT ((addr & (nr_bytes - 1)) == 0); /* must be aligned */
- ASSERT ((addr + (nr_bytes - 1)) >= addr); /* must not wrap */
- ASSERT (!abort || cpu != NULL); /* abort needs a non null CPU */
- while (mapping != NULL)
- {
- if (addr >= mapping->base
- && (addr + (nr_bytes - 1)) <= mapping->bound)
- return mapping;
- mapping = mapping->next;
- }
- if (abort)
- {
- SIM_CORE_SIGNAL (CPU_STATE (cpu), cpu, cia, map, nr_bytes, addr, transfer,
- sim_core_unmapped_signal);
- }
- return NULL;
-}
-
-
-STATIC_INLINE_SIM_CORE\
-(void *)
-sim_core_translate (sim_core_mapping *mapping,
- address_word addr)
-{
- if (WITH_MODULO_MEMORY)
- return (void *)((unsigned8 *) mapping->buffer
- + ((addr - mapping->base) & mapping->mask));
- else
- return (void *)((unsigned8 *) mapping->buffer
- + addr - mapping->base);
-}
-
-
-#if EXTERN_SIM_CORE_P
-unsigned
-sim_core_read_buffer (SIM_DESC sd,
- sim_cpu *cpu,
- unsigned map,
- void *buffer,
- address_word addr,
- unsigned len)
-{
- sim_core_common *core = (cpu == NULL ? &STATE_CORE (sd)->common : &CPU_CORE (cpu)->common);
- unsigned count = 0;
- while (count < len)
- {
- unsigned_word raddr = addr + count;
- sim_core_mapping *mapping =
- sim_core_find_mapping (core, map,
- raddr, /*nr-bytes*/1,
- read_transfer,
- 0 /*dont-abort*/, NULL, NULL_CIA);
- if (mapping == NULL)
- break;
-#if (WITH_DEVICES)
- if (mapping->device != NULL)
- {
- int nr_bytes = len - count;
- sim_cia cia = cpu ? CIA_GET (cpu) : NULL_CIA;
- if (raddr + nr_bytes - 1> mapping->bound)
- nr_bytes = mapping->bound - raddr + 1;
- if (device_io_read_buffer (mapping->device,
- (unsigned_1*)buffer + count,
- mapping->space,
- raddr,
- nr_bytes,
- sd,
- cpu,
- cia) != nr_bytes)
- break;
- count += nr_bytes;
- continue;
- }
-#endif
-#if (WITH_HW)
- if (mapping->device != NULL)
- {
- int nr_bytes = len - count;
- if (raddr + nr_bytes - 1> mapping->bound)
- nr_bytes = mapping->bound - raddr + 1;
- if (sim_hw_io_read_buffer (sd, mapping->device,
- (unsigned_1*)buffer + count,
- mapping->space,
- raddr,
- nr_bytes) != nr_bytes)
- break;
- count += nr_bytes;
- continue;
- }
-#endif
- ((unsigned_1*)buffer)[count] =
- *(unsigned_1*)sim_core_translate(mapping, raddr);
- count += 1;
- }
- return count;
-}
-#endif
-
-
-#if EXTERN_SIM_CORE_P
-unsigned
-sim_core_write_buffer (SIM_DESC sd,
- sim_cpu *cpu,
- unsigned map,
- const void *buffer,
- address_word addr,
- unsigned len)
-{
- sim_core_common *core = (cpu == NULL ? &STATE_CORE (sd)->common : &CPU_CORE (cpu)->common);
- unsigned count = 0;
- while (count < len)
- {
- unsigned_word raddr = addr + count;
- sim_core_mapping *mapping =
- sim_core_find_mapping (core, map,
- raddr, /*nr-bytes*/1,
- write_transfer,
- 0 /*dont-abort*/, NULL, NULL_CIA);
- if (mapping == NULL)
- break;
-#if (WITH_DEVICES)
- if (WITH_CALLBACK_MEMORY
- && mapping->device != NULL)
- {
- int nr_bytes = len - count;
- sim_cia cia = cpu ? CIA_GET (cpu) : NULL_CIA;
- if (raddr + nr_bytes - 1 > mapping->bound)
- nr_bytes = mapping->bound - raddr + 1;
- if (device_io_write_buffer (mapping->device,
- (unsigned_1*)buffer + count,
- mapping->space,
- raddr,
- nr_bytes,
- sd,
- cpu,
- cia) != nr_bytes)
- break;
- count += nr_bytes;
- continue;
- }
-#endif
-#if (WITH_HW)
- if (WITH_CALLBACK_MEMORY
- && mapping->device != NULL)
- {
- int nr_bytes = len - count;
- if (raddr + nr_bytes - 1 > mapping->bound)
- nr_bytes = mapping->bound - raddr + 1;
- if (sim_hw_io_write_buffer (sd, mapping->device,
- (unsigned_1*)buffer + count,
- mapping->space,
- raddr,
- nr_bytes) != nr_bytes)
- break;
- count += nr_bytes;
- continue;
- }
-#endif
- *(unsigned_1*)sim_core_translate(mapping, raddr) =
- ((unsigned_1*)buffer)[count];
- count += 1;
- }
- return count;
-}
-#endif
-
-
-#if EXTERN_SIM_CORE_P
-void
-sim_core_set_xor (SIM_DESC sd,
- sim_cpu *cpu,
- int is_xor)
-{
- /* set up the XOR map if required. */
- if (WITH_XOR_ENDIAN) {
- {
- sim_core *core = STATE_CORE (sd);
- sim_cpu_core *cpu_core = (cpu != NULL ? CPU_CORE (cpu) : NULL);
- if (cpu_core != NULL)
- {
- int i = 1;
- unsigned mask;
- if (is_xor)
- mask = WITH_XOR_ENDIAN - 1;
- else
- mask = 0;
- while (i - 1 < WITH_XOR_ENDIAN)
- {
- cpu_core->xor[i-1] = mask;
- mask = (mask << 1) & (WITH_XOR_ENDIAN - 1);
- i = (i << 1);
- }
- }
- else
- {
- if (is_xor)
- core->byte_xor = WITH_XOR_ENDIAN - 1;
- else
- core->byte_xor = 0;
- }
- }
- }
- else {
- if (is_xor)
- sim_engine_abort (sd, NULL, NULL_CIA,
- "Attempted to enable xor-endian mode when permenantly disabled.");
- }
-}
-#endif
-
-
-#if EXTERN_SIM_CORE_P
-static void
-reverse_n (unsigned_1 *dest,
- const unsigned_1 *src,
- int nr_bytes)
-{
- int i;
- for (i = 0; i < nr_bytes; i++)
- {
- dest [nr_bytes - i - 1] = src [i];
- }
-}
-#endif
-
-
-#if EXTERN_SIM_CORE_P
-unsigned
-sim_core_xor_read_buffer (SIM_DESC sd,
- sim_cpu *cpu,
- unsigned map,
- void *buffer,
- address_word addr,
- unsigned nr_bytes)
-{
- address_word byte_xor = (cpu == NULL ? STATE_CORE (sd)->byte_xor : CPU_CORE (cpu)->xor[0]);
- if (!WITH_XOR_ENDIAN || !byte_xor)
- return sim_core_read_buffer (sd, cpu, map, buffer, addr, nr_bytes);
- else
- /* only break up transfers when xor-endian is both selected and enabled */
- {
- unsigned_1 x[WITH_XOR_ENDIAN + 1]; /* +1 to avoid zero-sized array */
- unsigned nr_transfered = 0;
- address_word start = addr;
- unsigned nr_this_transfer = (WITH_XOR_ENDIAN - (addr & ~(WITH_XOR_ENDIAN - 1)));
- address_word stop;
- /* initial and intermediate transfers are broken when they cross
- an XOR endian boundary */
- while (nr_transfered + nr_this_transfer < nr_bytes)
- /* initial/intermediate transfers */
- {
- /* since xor-endian is enabled stop^xor defines the start
- address of the transfer */
- stop = start + nr_this_transfer - 1;
- SIM_ASSERT (start <= stop);
- SIM_ASSERT ((stop ^ byte_xor) <= (start ^ byte_xor));
- if (sim_core_read_buffer (sd, cpu, map, x, stop ^ byte_xor, nr_this_transfer)
- != nr_this_transfer)
- return nr_transfered;
- reverse_n (&((unsigned_1*)buffer)[nr_transfered], x, nr_this_transfer);
- nr_transfered += nr_this_transfer;
- nr_this_transfer = WITH_XOR_ENDIAN;
- start = stop + 1;
- }
- /* final transfer */
- nr_this_transfer = nr_bytes - nr_transfered;
- stop = start + nr_this_transfer - 1;
- SIM_ASSERT (stop == (addr + nr_bytes - 1));
- if (sim_core_read_buffer (sd, cpu, map, x, stop ^ byte_xor, nr_this_transfer)
- != nr_this_transfer)
- return nr_transfered;
- reverse_n (&((unsigned_1*)buffer)[nr_transfered], x, nr_this_transfer);
- return nr_bytes;
- }
-}
-#endif
-
-
-#if EXTERN_SIM_CORE_P
-unsigned
-sim_core_xor_write_buffer (SIM_DESC sd,
- sim_cpu *cpu,
- unsigned map,
- const void *buffer,
- address_word addr,
- unsigned nr_bytes)
-{
- address_word byte_xor = (cpu == NULL ? STATE_CORE (sd)->byte_xor : CPU_CORE (cpu)->xor[0]);
- if (!WITH_XOR_ENDIAN || !byte_xor)
- return sim_core_write_buffer (sd, cpu, map, buffer, addr, nr_bytes);
- else
- /* only break up transfers when xor-endian is both selected and enabled */
- {
- unsigned_1 x[WITH_XOR_ENDIAN + 1]; /* +1 to avoid zero sized array */
- unsigned nr_transfered = 0;
- address_word start = addr;
- unsigned nr_this_transfer = (WITH_XOR_ENDIAN - (addr & ~(WITH_XOR_ENDIAN - 1)));
- address_word stop;
- /* initial and intermediate transfers are broken when they cross
- an XOR endian boundary */
- while (nr_transfered + nr_this_transfer < nr_bytes)
- /* initial/intermediate transfers */
- {
- /* since xor-endian is enabled stop^xor defines the start
- address of the transfer */
- stop = start + nr_this_transfer - 1;
- SIM_ASSERT (start <= stop);
- SIM_ASSERT ((stop ^ byte_xor) <= (start ^ byte_xor));
- reverse_n (x, &((unsigned_1*)buffer)[nr_transfered], nr_this_transfer);
- if (sim_core_read_buffer (sd, cpu, map, x, stop ^ byte_xor, nr_this_transfer)
- != nr_this_transfer)
- return nr_transfered;
- nr_transfered += nr_this_transfer;
- nr_this_transfer = WITH_XOR_ENDIAN;
- start = stop + 1;
- }
- /* final transfer */
- nr_this_transfer = nr_bytes - nr_transfered;
- stop = start + nr_this_transfer - 1;
- SIM_ASSERT (stop == (addr + nr_bytes - 1));
- reverse_n (x, &((unsigned_1*)buffer)[nr_transfered], nr_this_transfer);
- if (sim_core_read_buffer (sd, cpu, map, x, stop ^ byte_xor, nr_this_transfer)
- != nr_this_transfer)
- return nr_transfered;
- return nr_bytes;
- }
-}
-#endif
-
-
-
-/* define the read/write 1/2/4/8/16/word functions */
-
-#define N 16
-#include "sim-n-core.h"
-
-#define N 8
-#include "sim-n-core.h"
-
-#define N 7
-#define M 8
-#include "sim-n-core.h"
-
-#define N 6
-#define M 8
-#include "sim-n-core.h"
-
-#define N 5
-#define M 8
-#include "sim-n-core.h"
-
-#define N 4
-#include "sim-n-core.h"
-
-#define N 3
-#define M 4
-#include "sim-n-core.h"
-
-#define N 2
-#include "sim-n-core.h"
-
-#define N 1
-#include "sim-n-core.h"
-
-#endif
diff --git a/sim/common/sim-core.h b/sim/common/sim-core.h
deleted file mode 100644
index 182569e5aea..00000000000
--- a/sim/common/sim-core.h
+++ /dev/null
@@ -1,352 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1997, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-#ifndef SIM_CORE_H
-#define SIM_CORE_H
-
-
-/* core signals (error conditions)
- Define SIM_CORE_SIGNAL to catch these signals - see sim-core.c for
- details. */
-
-typedef enum {
- sim_core_unmapped_signal,
- sim_core_unaligned_signal,
- nr_sim_core_signals,
-} sim_core_signals;
-
-/* Type of SIM_CORE_SIGNAL handler. */
-typedef void (SIM_CORE_SIGNAL_FN)
- (SIM_DESC sd, sim_cpu *cpu, sim_cia cia, unsigned map, int nr_bytes,
- address_word addr, transfer_type transfer, sim_core_signals sig);
-
-extern SIM_CORE_SIGNAL_FN sim_core_signal;
-
-
-/* basic types */
-
-typedef struct _sim_core_mapping sim_core_mapping;
-struct _sim_core_mapping {
- /* common */
- int level;
- int space;
- unsigned_word base;
- unsigned_word bound;
- unsigned_word nr_bytes;
- unsigned mask;
- /* memory map */
- void *free_buffer;
- void *buffer;
- /* callback map */
-#if (WITH_HW)
- struct hw *device;
-#else
- device *device;
-#endif
- /* tracing */
- int trace;
- /* growth */
- sim_core_mapping *next;
-};
-
-typedef struct _sim_core_map sim_core_map;
-struct _sim_core_map {
- sim_core_mapping *first;
-};
-
-
-typedef struct _sim_core_common {
- sim_core_map map[nr_maps];
-} sim_core_common;
-
-
-/* Main core structure */
-
-typedef struct _sim_core sim_core;
-struct _sim_core {
- sim_core_common common;
- address_word byte_xor; /* apply xor universally */
-};
-
-
-/* Per CPU distributed component of the core. At present this is
- mostly a clone of the global core data structure. */
-
-typedef struct _sim_cpu_core {
- sim_core_common common;
- address_word xor[WITH_XOR_ENDIAN + 1]; /* +1 to avoid zero-sized array */
-} sim_cpu_core;
-
-
-/* Install the "core" module. */
-
-extern SIM_RC sim_core_install (SIM_DESC sd);
-
-
-
-/* Create a memory region within the core.
-
- CPU - when non NULL, specifes the single processor that the memory
- space is to be attached to. (INIMPLEMENTED).
-
- LEVEL - specifies the ordering of the memory region. Lower regions
- are searched first. Within a level, memory regions can not
- overlap.
-
- MAPMASK - Bitmask specifying the memory maps that the region is to
- be attached to. Typically the enums sim-basics.h:access_* are used.
-
- ADDRESS_SPACE - For device regions, a MAP:ADDRESS pair is
- translated into ADDRESS_SPACE:OFFSET before being passed to the
- client device.
-
- MODULO - when the simulator has been configured WITH_MODULO support
- and is greater than zero, specifies that accesses to the region
- [ADDR .. ADDR+NR_BYTES) should be mapped onto the sub region [ADDR
- .. ADDR+MODULO). The modulo value must be a power of two.
-
- DEVICE - When non NULL, indicates that this is a callback memory
- space and specified device's memory callback handler should be
- called.
-
- OPTIONAL_BUFFER - when non NULL, specifies the buffer to use for
- data read & written to the region. Normally a more efficient
- internal structure is used. It is assumed that buffer is allocated
- such that the byte alignmed of OPTIONAL_BUFFER matches ADDR vis
- (OPTIONAL_BUFFER % 8) == (ADDR % 8)). It is defined to be a sub-optimal
- hook that allows clients to do nasty things that the interface doesn't
- accomodate. */
-
-extern void sim_core_attach
-(SIM_DESC sd,
- sim_cpu *cpu,
- int level,
- unsigned mapmask,
- int address_space,
- address_word addr,
- address_word nr_bytes,
- unsigned modulo,
-#if (WITH_HW)
- struct hw *client,
-#else
- device *client,
-#endif
- void *optional_buffer);
-
-
-/* Delete a memory section within the core.
-
- */
-
-extern void sim_core_detach
-(SIM_DESC sd,
- sim_cpu *cpu,
- int level,
- int address_space,
- address_word addr);
-
-
-/* Variable sized read/write
-
- Transfer a variable sized block of raw data between the host and
- target. Should any problems occure, the number of bytes
- successfully transfered is returned.
-
- No host/target byte endian conversion is performed. No xor-endian
- conversion is performed.
-
- If CPU argument, when non NULL, specifies the processor specific
- address map that is to be used in the transfer. */
-
-
-extern unsigned sim_core_read_buffer
-(SIM_DESC sd,
- sim_cpu *cpu,
- unsigned map,
- void *buffer,
- address_word addr,
- unsigned nr_bytes);
-
-extern unsigned sim_core_write_buffer
-(SIM_DESC sd,
- sim_cpu *cpu,
- unsigned map,
- const void *buffer,
- address_word addr,
- unsigned nr_bytes);
-
-
-
-/* Configure the core's XOR endian transfer mode. Only applicable
- when WITH_XOR_ENDIAN is enabled.
-
- Targets suporting XOR endian, shall notify the core of any changes
- in state via this call.
-
- The CPU argument, when non NULL, specifes the single processor that
- the xor-endian configuration is to be applied to. */
-
-extern void sim_core_set_xor
-(SIM_DESC sd,
- sim_cpu *cpu,
- int is_xor);
-
-
-/* XOR version of variable sized read/write.
-
- Transfer a variable sized block of raw data between the host and
- target. Should any problems occure, the number of bytes
- successfully transfered is returned.
-
- No host/target byte endian conversion is performed. If applicable
- (WITH_XOR_ENDIAN and xor-endian set), xor-endian conversion *is*
- performed.
-
- If CPU argument, when non NULL, specifies the processor specific
- address map that is to be used in the transfer. */
-
-extern unsigned sim_core_xor_read_buffer
-(SIM_DESC sd,
- sim_cpu *cpu,
- unsigned map,
- void *buffer,
- address_word addr,
- unsigned nr_bytes);
-
-extern unsigned sim_core_xor_write_buffer
-(SIM_DESC sd,
- sim_cpu *cpu,
- unsigned map,
- const void *buffer,
- address_word addr,
- unsigned nr_bytes);
-
-
-
-/* Fixed sized, processor oriented, read/write.
-
- Transfer a fixed amout of memory between the host and target. The
- data transfered is translated from/to host to/from target byte
- order (including xor endian). Should the transfer fail, the
- operation shall abort (no return).
-
- ALIGNED assumes yhat the specified ADDRESS is correctly alligned
- for an N byte transfer (no alignment checks are made). Passing an
- incorrectly aligned ADDRESS is erroneous.
-
- UNALIGNED checks/modifies the ADDRESS according to the requirements
- of an N byte transfer. Action, as defined by WITH_ALIGNMENT, being
- taken should the check fail.
-
- MISSALIGNED transfers the data regardless.
-
- Misaligned xor-endian accesses are broken into a sequence of
- transfers each <= WITH_XOR_ENDIAN bytes */
-
-
-#define DECLARE_SIM_CORE_WRITE_N(ALIGNMENT,N,M) \
-INLINE_SIM_CORE\
-(void) sim_core_write_##ALIGNMENT##_##N \
-(sim_cpu *cpu, \
- sim_cia cia, \
- unsigned map, \
- address_word addr, \
- unsigned_##M val);
-
-DECLARE_SIM_CORE_WRITE_N(aligned,1,1)
-DECLARE_SIM_CORE_WRITE_N(aligned,2,2)
-DECLARE_SIM_CORE_WRITE_N(aligned,4,4)
-DECLARE_SIM_CORE_WRITE_N(aligned,8,8)
-DECLARE_SIM_CORE_WRITE_N(aligned,16,16)
-
-#define sim_core_write_unaligned_1 sim_core_write_aligned_1
-DECLARE_SIM_CORE_WRITE_N(unaligned,2,2)
-DECLARE_SIM_CORE_WRITE_N(unaligned,4,4)
-DECLARE_SIM_CORE_WRITE_N(unaligned,8,8)
-DECLARE_SIM_CORE_WRITE_N(unaligned,16,16)
-
-DECLARE_SIM_CORE_WRITE_N(misaligned,3,4)
-DECLARE_SIM_CORE_WRITE_N(misaligned,5,8)
-DECLARE_SIM_CORE_WRITE_N(misaligned,6,8)
-DECLARE_SIM_CORE_WRITE_N(misaligned,7,8)
-
-#define sim_core_write_1 sim_core_write_aligned_1
-#define sim_core_write_2 sim_core_write_aligned_2
-#define sim_core_write_4 sim_core_write_aligned_4
-#define sim_core_write_8 sim_core_write_aligned_8
-#define sim_core_write_16 sim_core_write_aligned_16
-
-#define sim_core_write_unaligned_word XCONCAT2(sim_core_write_unaligned_,WITH_TARGET_WORD_BITSIZE)
-#define sim_core_write_aligned_word XCONCAT2(sim_core_write_aligned_,WITH_TARGET_WORD_BITSIZE)
-#define sim_core_write_word XCONCAT2(sim_core_write_,WITH_TARGET_WORD_BITSIZE)
-
-#undef DECLARE_SIM_CORE_WRITE_N
-
-
-#define DECLARE_SIM_CORE_READ_N(ALIGNMENT,N,M) \
-INLINE_SIM_CORE\
-(unsigned_##M) sim_core_read_##ALIGNMENT##_##N \
-(sim_cpu *cpu, \
- sim_cia cia, \
- unsigned map, \
- address_word addr);
-
-DECLARE_SIM_CORE_READ_N(aligned,1,1)
-DECLARE_SIM_CORE_READ_N(aligned,2,2)
-DECLARE_SIM_CORE_READ_N(aligned,4,4)
-DECLARE_SIM_CORE_READ_N(aligned,8,8)
-DECLARE_SIM_CORE_READ_N(aligned,16,16)
-
-#define sim_core_read_unaligned_1 sim_core_read_aligned_1
-DECLARE_SIM_CORE_READ_N(unaligned,2,2)
-DECLARE_SIM_CORE_READ_N(unaligned,4,4)
-DECLARE_SIM_CORE_READ_N(unaligned,8,8)
-DECLARE_SIM_CORE_READ_N(unaligned,16,16)
-
-DECLARE_SIM_CORE_READ_N(misaligned,3,4)
-DECLARE_SIM_CORE_READ_N(misaligned,5,8)
-DECLARE_SIM_CORE_READ_N(misaligned,6,8)
-DECLARE_SIM_CORE_READ_N(misaligned,7,8)
-
-
-#define sim_core_read_1 sim_core_read_aligned_1
-#define sim_core_read_2 sim_core_read_aligned_2
-#define sim_core_read_4 sim_core_read_aligned_4
-#define sim_core_read_8 sim_core_read_aligned_8
-#define sim_core_read_16 sim_core_read_aligned_16
-
-#define sim_core_read_unaligned_word XCONCAT2(sim_core_read_unaligned_,WITH_TARGET_WORD_BITSIZE)
-#define sim_core_read_aligned_word XCONCAT2(sim_core_read_aligned_,WITH_TARGET_WORD_BITSIZE)
-#define sim_core_read_word XCONCAT2(sim_core_read_,WITH_TARGET_WORD_BITSIZE)
-
-#undef DECLARE_SIM_CORE_READ_N
-
-
-#if (WITH_DEVICES)
-/* TODO: create sim/common/device.h */
-/* These are defined with each particular cpu. */
-void device_error (device *me, char* message, ...);
-int device_io_read_buffer(device *me, void *dest, int space, address_word addr, unsigned nr_bytes, SIM_DESC sd, sim_cpu *processor, sim_cia cia);
-int device_io_write_buffer(device *me, const void *source, int space, address_word addr, unsigned nr_bytes, SIM_DESC sd, sim_cpu *processor, sim_cia cia);
-#endif
-
-
-#endif
diff --git a/sim/common/sim-cpu.c b/sim/common/sim-cpu.c
deleted file mode 100644
index 0e6d52c1dd1..00000000000
--- a/sim/common/sim-cpu.c
+++ /dev/null
@@ -1,80 +0,0 @@
-/* CPU support.
- Copyright (C) 1998 Free Software Foundation, Inc.
- Contributed by Cygnus Solutions.
-
-This file is part of GDB, the GNU debugger.
-
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License along
-with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
-
-#include "sim-main.h"
-#include "bfd.h"
-
-/* Allocate space for all cpus in the simulator.
- Space for the cpu must currently exist prior to parsing ARGV.
- EXTRA_BYTES is additional space to allocate for the sim_cpu struct. */
-/* ??? wip. better solution must wait. */
-
-SIM_RC
-sim_cpu_alloc_all (SIM_DESC sd, int ncpus, int extra_bytes)
-{
- int c;
-
- for (c = 0; c < ncpus; ++c)
- STATE_CPU (sd, c) = sim_cpu_alloc (sd, extra_bytes);
- return SIM_RC_OK;
-}
-
-/* Allocate space for a cpu object.
- EXTRA_BYTES is additional space to allocate for the sim_cpu struct. */
-
-sim_cpu *
-sim_cpu_alloc (SIM_DESC sd, int extra_bytes)
-{
- return zalloc (sizeof (sim_cpu) + extra_bytes);
-}
-
-/* Free all resources held by all cpus. */
-
-void
-sim_cpu_free_all (SIM_DESC sd)
-{
- int c;
-
- for (c = 0; c < MAX_NR_PROCESSORS; ++c)
- if (STATE_CPU (sd, c))
- sim_cpu_free (STATE_CPU (sd, c));
-}
-
-/* Free all resources used by CPU. */
-
-void
-sim_cpu_free (sim_cpu *cpu)
-{
- zfree (cpu);
-}
-
-/* PC utilities. */
-
-sim_cia
-sim_pc_get (sim_cpu *cpu)
-{
- return (* CPU_PC_FETCH (cpu)) (cpu);
-}
-
-void
-sim_pc_set (sim_cpu *cpu, sim_cia newval)
-{
- (* CPU_PC_STORE (cpu)) (cpu, newval);
-}
diff --git a/sim/common/sim-cpu.h b/sim/common/sim-cpu.h
deleted file mode 100644
index 069fead4808..00000000000
--- a/sim/common/sim-cpu.h
+++ /dev/null
@@ -1,152 +0,0 @@
-/* CPU support.
- Copyright (C) 1998 Free Software Foundation, Inc.
- Contributed by Cygnus Solutions.
-
-This file is part of GDB, the GNU debugger.
-
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License along
-with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
-
-/* This file is intended to be included by sim-base.h.
-
- This file provides an interface between the simulator framework and
- the selected cpu. */
-
-#ifndef SIM_CPU_H
-#define SIM_CPU_H
-
-/* Type of function to return an insn name. */
-typedef const char * (CPU_INSN_NAME_FN) (sim_cpu *, int);
-
-/* Types for register access functions.
- These routines implement the sim_{fetch,store}_register interface. */
-typedef int (CPUREG_FETCH_FN) (sim_cpu *, int, unsigned char *, int);
-typedef int (CPUREG_STORE_FN) (sim_cpu *, int, unsigned char *, int);
-
-/* Types for PC access functions.
- Some simulators require a functional interface to access the program
- counter [a macro is insufficient as the PC is kept in a cpu-specific part
- of the sim_cpu struct]. */
-typedef sim_cia (PC_FETCH_FN) (sim_cpu *);
-typedef void (PC_STORE_FN) (sim_cpu *, sim_cia);
-
-/* Pseudo baseclass for each cpu. */
-
-typedef struct {
-
- /* Backlink to main state struct. */
- SIM_DESC state;
-#define CPU_STATE(cpu) ((cpu)->base.state)
-
- /* Processor index within the SD_DESC */
- int index;
-#define CPU_INDEX(cpu) ((cpu)->base.index)
-
- /* The name of the cpu. */
- const char *name;
-#define CPU_NAME(cpu) ((cpu)->base.name)
-
- /* Options specific to this cpu. */
- struct option_list *options;
-#define CPU_OPTIONS(cpu) ((cpu)->base.options)
-
- /* Processor specific core data */
- sim_cpu_core core;
-#define CPU_CORE(cpu) (& (cpu)->base.core)
-
- /* Number of instructions (used to iterate over CPU_INSN_NAME). */
- unsigned int max_insns;
-#define CPU_MAX_INSNS(cpu) ((cpu)->base.max_insns)
-
- /* Function to return the name of an insn. */
- CPU_INSN_NAME_FN *insn_name;
-#define CPU_INSN_NAME(cpu) ((cpu)->base.insn_name)
-
- /* Trace data. See sim-trace.h. */
- TRACE_DATA trace_data;
-#define CPU_TRACE_DATA(cpu) (& (cpu)->base.trace_data)
-
- /* Maximum number of debuggable entities.
- This debugging is not intended for normal use.
- It is only enabled when the simulator is configured with --with-debug
- which shouldn't normally be specified. */
-#ifndef MAX_DEBUG_VALUES
-#define MAX_DEBUG_VALUES 4
-#endif
-
- /* Boolean array of specified debugging flags. */
- char debug_flags[MAX_DEBUG_VALUES];
-#define CPU_DEBUG_FLAGS(cpu) ((cpu)->base.debug_flags)
- /* Standard values. */
-#define DEBUG_INSN_IDX 0
-#define DEBUG_NEXT_IDX 2 /* simulator specific debug bits begin here */
-
- /* Debugging output goes to this or stderr if NULL.
- We can't store `stderr' here as stderr goes through a callback. */
- FILE *debug_file;
-#define CPU_DEBUG_FILE(cpu) ((cpu)->base.debug_file)
-
- /* Profile data. See sim-profile.h. */
- PROFILE_DATA profile_data;
-#define CPU_PROFILE_DATA(cpu) (& (cpu)->base.profile_data)
-
-#ifdef SIM_HAVE_MODEL
- /* Machine tables for this cpu. See sim-model.h. */
- const MACH *mach;
-#define CPU_MACH(cpu) ((cpu)->base.mach)
- /* The selected model. */
- const MODEL *model;
-#define CPU_MODEL(cpu) ((cpu)->base.model)
- /* Model data (profiling state, etc.). */
- void *model_data;
-#define CPU_MODEL_DATA(cpu) ((cpu)->base.model_data)
-#endif
-
- /* Routines to fetch/store registers. */
- CPUREG_FETCH_FN *reg_fetch;
-#define CPU_REG_FETCH(c) ((c)->base.reg_fetch)
- CPUREG_STORE_FN *reg_store;
-#define CPU_REG_STORE(c) ((c)->base.reg_store)
- PC_FETCH_FN *pc_fetch;
-#define CPU_PC_FETCH(c) ((c)->base.pc_fetch)
- PC_STORE_FN *pc_store;
-#define CPU_PC_STORE(c) ((c)->base.pc_store)
-
-} sim_cpu_base;
-
-/* Create all cpus. */
-extern SIM_RC sim_cpu_alloc_all (SIM_DESC, int, int);
-/* Create a cpu. */
-extern sim_cpu *sim_cpu_alloc (SIM_DESC, int);
-/* Release resources held by all cpus. */
-extern void sim_cpu_free_all (SIM_DESC);
-/* Release resources held by a cpu. */
-extern void sim_cpu_free (sim_cpu *);
-
-/* Return a pointer to the cpu data for CPU_NAME, or NULL if not found. */
-extern sim_cpu *sim_cpu_lookup (SIM_DESC, const char *);
-
-/* Return prefix to use in cpu specific messages. */
-extern const char *sim_cpu_msg_prefix (sim_cpu *);
-/* Cover fn to sim_io_eprintf. */
-extern void sim_io_eprintf_cpu (sim_cpu *, const char *, ...);
-
-/* Get/set a pc value. */
-#define CPU_PC_GET(cpu) ((* CPU_PC_FETCH (cpu)) (cpu))
-#define CPU_PC_SET(cpu,newval) ((* CPU_PC_STORE (cpu)) ((cpu), (newval)))
-/* External interface to accessing the pc. */
-sim_cia sim_pc_get (sim_cpu *);
-void sim_pc_set (sim_cpu *, sim_cia);
-
-#endif /* SIM_CPU_H */
diff --git a/sim/common/sim-endian.c b/sim/common/sim-endian.c
deleted file mode 100644
index 36820284ffd..00000000000
--- a/sim/common/sim-endian.c
+++ /dev/null
@@ -1,128 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1995, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-#ifndef _SIM_ENDIAN_C_
-#define _SIM_ENDIAN_C_
-
-#include "sim-basics.h"
-#include "sim-assert.h"
-#include "sim-io.h"
-
-
-#if !defined(_SWAP_1)
-#define _SWAP_1(SET,RAW) SET (RAW)
-#endif
-
-#if !defined(_SWAP_2) && (WITH_HOST_BYTE_ORDER == LITTLE_ENDIAN) && defined(htons)
-#define _SWAP_2(SET,RAW) SET htons (RAW)
-#endif
-
-#ifndef _SWAP_2
-#define _SWAP_2(SET,RAW) SET (((RAW) >> 8) | ((RAW) << 8))
-#endif
-
-#if !defined(_SWAP_4) && (WITH_HOST_BYTE_ORDER == LITTLE_ENDIAN) && defined(htonl)
-#define _SWAP_4(SET,RAW) SET htonl (RAW)
-#endif
-
-#ifndef _SWAP_4
-#define _SWAP_4(SET,RAW) SET (((RAW) << 24) | (((RAW) & 0xff00) << 8) | (((RAW) & 0xff0000) >> 8) | ((RAW) >> 24))
-#endif
-
-#ifndef _SWAP_8
-#define _SWAP_8(SET,RAW) \
- union { unsigned_8 dword; unsigned_4 words[2]; } in, out; \
- in.dword = RAW; \
- _SWAP_4 (out.words[0] =, in.words[1]); \
- _SWAP_4 (out.words[1] =, in.words[0]); \
- SET out.dword;
-#endif
-
-#ifndef _SWAP_16
-#define _SWAP_16(SET,RAW) \
- union { unsigned_16 word; unsigned_4 words[4]; } in, out; \
- in.word = (RAW); \
- _SWAP_4 (out.words[0] =, in.words[3]); \
- _SWAP_4 (out.words[1] =, in.words[2]); \
- _SWAP_4 (out.words[2] =, in.words[1]); \
- _SWAP_4 (out.words[3] =, in.words[0]); \
- SET out.word;
-#endif
-
-
-#define N 1
-#include "sim-n-endian.h"
-#undef N
-
-#define N 2
-#include "sim-n-endian.h"
-#undef N
-
-#define N 4
-#include "sim-n-endian.h"
-#undef N
-
-#define N 8
-#include "sim-n-endian.h"
-#undef N
-
-#define N 16
-#include "sim-n-endian.h"
-#undef N
-
-
-INLINE_SIM_ENDIAN\
-(unsigned_8)
-sim_endian_split_16 (unsigned_16 word, int w)
-{
- if (CURRENT_HOST_BYTE_ORDER == LITTLE_ENDIAN)
- {
- return word.a[1 - w];
- }
- else
- {
- return word.a[w];
- }
-}
-
-
-INLINE_SIM_ENDIAN\
-(unsigned_16)
-sim_endian_join_16 (unsigned_8 h, unsigned_8 l)
-
-{
- unsigned_16 word;
- if (CURRENT_HOST_BYTE_ORDER == LITTLE_ENDIAN)
- {
- word.a[0] = l;
- word.a[1] = h;
- }
- else
- {
- word.a[0] = h;
- word.a[1] = l;
- }
- return word;
-}
-
-
-
-#endif /* _SIM_ENDIAN_C_ */
diff --git a/sim/common/sim-endian.h b/sim/common/sim-endian.h
deleted file mode 100644
index 8239aa0ff0e..00000000000
--- a/sim/common/sim-endian.h
+++ /dev/null
@@ -1,414 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1995, Andrew Cagney <cagney@highland.com.au>
- Copyright (C) 1997, Free Software Foundation, Inc.
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-#ifndef _SIM_ENDIAN_H_
-#define _SIM_ENDIAN_H_
-
-
-/* C byte conversion functions */
-
-INLINE_SIM_ENDIAN(unsigned_1) endian_h2t_1(unsigned_1 x);
-INLINE_SIM_ENDIAN(unsigned_2) endian_h2t_2(unsigned_2 x);
-INLINE_SIM_ENDIAN(unsigned_4) endian_h2t_4(unsigned_4 x);
-INLINE_SIM_ENDIAN(unsigned_8) endian_h2t_8(unsigned_8 x);
-INLINE_SIM_ENDIAN(unsigned_16) endian_h2t_16(unsigned_16 x);
-
-INLINE_SIM_ENDIAN(unsigned_1) endian_t2h_1(unsigned_1 x);
-INLINE_SIM_ENDIAN(unsigned_2) endian_t2h_2(unsigned_2 x);
-INLINE_SIM_ENDIAN(unsigned_4) endian_t2h_4(unsigned_4 x);
-INLINE_SIM_ENDIAN(unsigned_8) endian_t2h_8(unsigned_8 x);
-INLINE_SIM_ENDIAN(unsigned_16) endian_t2h_16(unsigned_16 x);
-
-INLINE_SIM_ENDIAN(unsigned_1) swap_1(unsigned_1 x);
-INLINE_SIM_ENDIAN(unsigned_2) swap_2(unsigned_2 x);
-INLINE_SIM_ENDIAN(unsigned_4) swap_4(unsigned_4 x);
-INLINE_SIM_ENDIAN(unsigned_8) swap_8(unsigned_8 x);
-INLINE_SIM_ENDIAN(unsigned_16) swap_16(unsigned_16 x);
-
-INLINE_SIM_ENDIAN(unsigned_1) endian_h2be_1(unsigned_1 x);
-INLINE_SIM_ENDIAN(unsigned_2) endian_h2be_2(unsigned_2 x);
-INLINE_SIM_ENDIAN(unsigned_4) endian_h2be_4(unsigned_4 x);
-INLINE_SIM_ENDIAN(unsigned_8) endian_h2be_8(unsigned_8 x);
-INLINE_SIM_ENDIAN(unsigned_16) endian_h2be_16(unsigned_16 x);
-
-INLINE_SIM_ENDIAN(unsigned_1) endian_be2h_1(unsigned_1 x);
-INLINE_SIM_ENDIAN(unsigned_2) endian_be2h_2(unsigned_2 x);
-INLINE_SIM_ENDIAN(unsigned_4) endian_be2h_4(unsigned_4 x);
-INLINE_SIM_ENDIAN(unsigned_8) endian_be2h_8(unsigned_8 x);
-INLINE_SIM_ENDIAN(unsigned_16) endian_be2h_16(unsigned_16 x);
-
-INLINE_SIM_ENDIAN(unsigned_1) endian_h2le_1(unsigned_1 x);
-INLINE_SIM_ENDIAN(unsigned_2) endian_h2le_2(unsigned_2 x);
-INLINE_SIM_ENDIAN(unsigned_4) endian_h2le_4(unsigned_4 x);
-INLINE_SIM_ENDIAN(unsigned_8) endian_h2le_8(unsigned_8 x);
-INLINE_SIM_ENDIAN(unsigned_16) endian_h2le_16(unsigned_16 x);
-
-INLINE_SIM_ENDIAN(unsigned_1) endian_le2h_1(unsigned_1 x);
-INLINE_SIM_ENDIAN(unsigned_2) endian_le2h_2(unsigned_2 x);
-INLINE_SIM_ENDIAN(unsigned_4) endian_le2h_4(unsigned_4 x);
-INLINE_SIM_ENDIAN(unsigned_8) endian_le2h_8(unsigned_8 x);
-INLINE_SIM_ENDIAN(unsigned_16) endian_le2h_16(unsigned_16 x);
-
-INLINE_SIM_ENDIAN(void*) offset_1(unsigned_1 *x, unsigned ws, unsigned w);
-INLINE_SIM_ENDIAN(void*) offset_2(unsigned_2 *x, unsigned ws, unsigned w);
-INLINE_SIM_ENDIAN(void*) offset_4(unsigned_4 *x, unsigned ws, unsigned w);
-INLINE_SIM_ENDIAN(void*) offset_8(unsigned_8 *x, unsigned ws, unsigned w);
-INLINE_SIM_ENDIAN(void*) offset_16(unsigned_16 *x, unsigned ws, unsigned w);
-
-INLINE_SIM_ENDIAN(unsigned_16) sim_endian_join_16 (unsigned_8 h, unsigned_8 l);
-INLINE_SIM_ENDIAN(unsigned_8) sim_endian_split_16 (unsigned_16 word, int w);
-
-
-/* SWAP */
-
-#define SWAP_1 swap_1
-#define SWAP_2 swap_2
-#define SWAP_4 swap_4
-#define SWAP_8 swap_8
-#define SWAP_16 swap_16
-
-
-/* HOST to BE */
-
-#define H2BE_1 endian_h2be_1
-#define H2BE_2 endian_h2be_2
-#define H2BE_4 endian_h2be_4
-#define H2BE_8 endian_h2be_8
-#define H2BE_16 endian_h2be_16
-#define BE2H_1 endian_be2h_1
-#define BE2H_2 endian_be2h_2
-#define BE2H_4 endian_be2h_4
-#define BE2H_8 endian_be2h_8
-#define BE2H_16 endian_be2h_16
-
-
-/* HOST to LE */
-
-#define H2LE_1 endian_h2le_1
-#define H2LE_2 endian_h2le_2
-#define H2LE_4 endian_h2le_4
-#define H2LE_8 endian_h2le_8
-#define H2LE_16 endian_h2le_16
-#define LE2H_1 endian_le2h_1
-#define LE2H_2 endian_le2h_2
-#define LE2H_4 endian_le2h_4
-#define LE2H_8 endian_le2h_8
-#define LE2H_16 endian_le2h_16
-
-
-/* HOST to TARGET */
-
-#define H2T_1 endian_h2t_1
-#define H2T_2 endian_h2t_2
-#define H2T_4 endian_h2t_4
-#define H2T_8 endian_h2t_8
-#define H2T_16 endian_h2t_16
-#define T2H_1 endian_t2h_1
-#define T2H_2 endian_t2h_2
-#define T2H_4 endian_t2h_4
-#define T2H_8 endian_t2h_8
-#define T2H_16 endian_t2h_16
-
-
-/* CONVERT IN PLACE
-
- These macros, given an argument of unknown size, swap its value in
- place if a host/target conversion is required. */
-
-#define H2T(VARIABLE) \
-do { \
- void *vp = &(VARIABLE); \
- switch (sizeof (VARIABLE)) { \
- case 1: *(unsigned_1*)vp = H2T_1(*(unsigned_1*)vp); break; \
- case 2: *(unsigned_2*)vp = H2T_2(*(unsigned_2*)vp); break; \
- case 4: *(unsigned_4*)vp = H2T_4(*(unsigned_4*)vp); break; \
- case 8: *(unsigned_8*)vp = H2T_8(*(unsigned_8*)vp); break; \
- case 16: *(unsigned_16*)vp = H2T_16(*(unsigned_16*)vp); break; \
- } \
-} while (0)
-
-#define T2H(VARIABLE) \
-do { \
- switch (sizeof(VARIABLE)) { \
- case 1: VARIABLE = T2H_1(VARIABLE); break; \
- case 2: VARIABLE = T2H_2(VARIABLE); break; \
- case 4: VARIABLE = T2H_4(VARIABLE); break; \
- case 8: VARIABLE = T2H_8(VARIABLE); break; \
- /*case 16: VARIABLE = T2H_16(VARIABLE); break;*/ \
- } \
-} while (0)
-
-#define SWAP(VARIABLE) \
-do { \
- switch (sizeof(VARIABLE)) { \
- case 1: VARIABLE = SWAP_1(VARIABLE); break; \
- case 2: VARIABLE = SWAP_2(VARIABLE); break; \
- case 4: VARIABLE = SWAP_4(VARIABLE); break; \
- case 8: VARIABLE = SWAP_8(VARIABLE); break; \
- /*case 16: VARIABLE = SWAP_16(VARIABLE); break;*/ \
- } \
-} while (0)
-
-#define H2BE(VARIABLE) \
-do { \
- switch (sizeof(VARIABLE)) { \
- case 1: VARIABLE = H2BE_1(VARIABLE); break; \
- case 2: VARIABLE = H2BE_2(VARIABLE); break; \
- case 4: VARIABLE = H2BE_4(VARIABLE); break; \
- case 8: VARIABLE = H2BE_8(VARIABLE); break; \
- /*case 16: VARIABLE = H2BE_16(VARIABLE); break;*/ \
- } \
-} while (0)
-
-#define BE2H(VARIABLE) \
-do { \
- switch (sizeof(VARIABLE)) { \
- case 1: VARIABLE = BE2H_1(VARIABLE); break; \
- case 2: VARIABLE = BE2H_2(VARIABLE); break; \
- case 4: VARIABLE = BE2H_4(VARIABLE); break; \
- case 8: VARIABLE = BE2H_8(VARIABLE); break; \
- /*case 16: VARIABLE = BE2H_16(VARIABLE); break;*/ \
- } \
-} while (0)
-
-#define H2LE(VARIABLE) \
-do { \
- switch (sizeof(VARIABLE)) { \
- case 1: VARIABLE = H2LE_1(VARIABLE); break; \
- case 2: VARIABLE = H2LE_2(VARIABLE); break; \
- case 4: VARIABLE = H2LE_4(VARIABLE); break; \
- case 8: VARIABLE = H2LE_8(VARIABLE); break; \
- /*case 16: VARIABLE = H2LE_16(VARIABLE); break;*/ \
- } \
-} while (0)
-
-#define LE2H(VARIABLE) \
-do { \
- switch (sizeof(VARIABLE)) { \
- case 1: VARIABLE = LE2H_1(VARIABLE); break; \
- case 2: VARIABLE = LE2H_2(VARIABLE); break; \
- case 4: VARIABLE = LE2H_4(VARIABLE); break; \
- case 8: VARIABLE = LE2H_8(VARIABLE); break; \
- /*case 16: VARIABLE = LE2H_16(VARIABLE); break;*/ \
- } \
-} while (0)
-
-
-
-/* TARGET WORD:
-
- Byte swap a quantity the size of the targets word */
-
-#if (WITH_TARGET_WORD_BITSIZE == 64)
-#define H2T_word H2T_8
-#define T2H_word T2H_8
-#define H2BE_word H2BE_8
-#define BE2H_word BE2H_8
-#define H2LE_word H2LE_8
-#define LE2H_word LE2H_8
-#define SWAP_word SWAP_8
-#endif
-#if (WITH_TARGET_WORD_BITSIZE == 32)
-#define H2T_word H2T_4
-#define T2H_word T2H_4
-#define H2BE_word H2BE_4
-#define BE2H_word BE2H_4
-#define H2LE_word H2LE_4
-#define LE2H_word LE2H_4
-#define SWAP_word SWAP_4
-#endif
-
-
-
-/* TARGET CELL:
-
- Byte swap a quantity the size of the targets IEEE 1275 memory cell */
-
-#define H2T_cell H2T_4
-#define T2H_cell T2H_4
-#define H2BE_cell H2BE_4
-#define BE2H_cell BE2H_4
-#define H2LE_cell H2LE_4
-#define LE2H_cell LE2H_4
-#define SWAP_cell SWAP_4
-
-
-
-/* HOST Offsets:
-
- Address of high/low sub-word within a host word quantity.
-
- Address of sub-word N within a host word quantity. NOTE: Numbering
- is BIG endian always. */
-
-#define AH1_2(X) (unsigned_1*)offset_2((X), 1, 0)
-#define AL1_2(X) (unsigned_1*)offset_2((X), 1, 1)
-
-#define AH2_4(X) (unsigned_2*)offset_4((X), 2, 0)
-#define AL2_4(X) (unsigned_2*)offset_4((X), 2, 1)
-
-#define AH4_8(X) (unsigned_4*)offset_8((X), 4, 0)
-#define AL4_8(X) (unsigned_4*)offset_8((X), 4, 1)
-
-#define AH8_16(X) (unsigned_8*)offset_16((X), 8, 0)
-#define AL8_16(X) (unsigned_8*)offset_16((X), 8, 1)
-
-#if (WITH_TARGET_WORD_BITSIZE == 64)
-#define AH_word(X) AH4_8(X)
-#define AL_word(X) AL4_8(X)
-#endif
-#if (WITH_TARGET_WORD_BITSIZE == 32)
-#define AH_word(X) AH2_4(X)
-#define AL_word(X) AL2_4(X)
-#endif
-
-
-#define A1_2(X,N) (unsigned_1*)offset_2((X), 1, (N))
-
-#define A1_4(X,N) (unsigned_1*)offset_4((X), 1, (N))
-#define A2_4(X,N) (unsigned_2*)offset_4((X), 2, (N))
-
-#define A1_8(X,N) (unsigned_1*)offset_8((X), 1, (N))
-#define A2_8(X,N) (unsigned_2*)offset_8((X), 2, (N))
-#define A4_8(X,N) (unsigned_4*)offset_8((X), 4, (N))
-
-#define A1_16(X,N) (unsigned_1*)offset_16((X), 1, (N))
-#define A2_16(X,N) (unsigned_2*)offset_16((X), 2, (N))
-#define A4_16(X,N) (unsigned_4*)offset_16((X), 4, (N))
-#define A8_16(X,N) (unsigned_8*)offset_16((X), 8, (N))
-
-
-
-
-/* HOST Components:
-
- Value of sub-word within a host word quantity */
-
-#define VH1_2(X) ((unsigned_1)((unsigned_2)(X) >> 8))
-#define VL1_2(X) (unsigned_1)(X)
-
-#define VH2_4(X) ((unsigned_2)((unsigned_4)(X) >> 16))
-#define VL2_4(X) ((unsigned_2)(X))
-
-#define VH4_8(X) ((unsigned_4)((unsigned_8)(X) >> 32))
-#define VL4_8(X) ((unsigned_4)(X))
-
-#define VH8_16(X) (sim_endian_split_16 ((X), 0))
-#define VL8_16(X) (sim_endian_split_16 ((X), 1))
-
-#if (WITH_TARGET_WORD_BITSIZE == 64)
-#define VH_word(X) VH4_8(X)
-#define VL_word(X) VL4_8(X)
-#endif
-#if (WITH_TARGET_WORD_BITSIZE == 32)
-#define VH_word(X) VH2_4(X)
-#define VL_word(X) VL2_4(X)
-#endif
-
-
-#define V1_2(X,N) ((unsigned_1)((unsigned_2)(X) >> ( 8 * (1 - (N)))))
-
-#define V1_4(X,N) ((unsigned_1)((unsigned_4)(X) >> ( 8 * (3 - (N)))))
-#define V2_4(X,N) ((unsigned_2)((unsigned_4)(X) >> (16 * (1 - (N)))))
-
-#define V1_8(X,N) ((unsigned_1)((unsigned_8)(X) >> ( 8 * (7 - (N)))))
-#define V2_8(X,N) ((unsigned_2)((unsigned_8)(X) >> (16 * (3 - (N)))))
-#define V4_8(X,N) ((unsigned_4)((unsigned_8)(X) >> (32 * (1 - (N)))))
-
-#define V1_16(X,N) (*A1_16 (&(X),N))
-#define V2_16(X,N) (*A2_16 (&(X),N))
-#define V4_16(X,N) (*A4_16 (&(X),N))
-#define V8_16(X,N) (*A8_16 (&(X),N))
-
-
-/* Reverse - insert sub-word into word quantity */
-
-#define V2_H1(X) ((unsigned_2)(unsigned_1)(X) << 8)
-#define V2_L1(X) ((unsigned_2)(unsigned_1)(X))
-
-#define V4_H2(X) ((unsigned_4)(unsigned_2)(X) << 16)
-#define V4_L2(X) ((unsigned_4)(unsigned_2)(X))
-
-#define V8_H4(X) ((unsigned_8)(unsigned_4)(X) << 32)
-#define V8_L4(X) ((unsigned_8)(unsigned_4)(X))
-
-#define V16_H8(X) ((unsigned_16)(unsigned_8)(X) << 64)
-#define V16_L8(X) ((unsigned_16)(unsigned_8)(X))
-
-
-#define V2_1(X,N) ((unsigned_2)(unsigned_1)(X) << ( 8 * (1 - (N))))
-
-#define V4_1(X,N) ((unsigned_4)(unsigned_1)(X) << ( 8 * (3 - (N))))
-#define V4_2(X,N) ((unsigned_4)(unsigned_2)(X) << (16 * (1 - (N))))
-
-#define V8_1(X,N) ((unsigned_8)(unsigned_1)(X) << ( 8 * (7 - (N))))
-#define V8_2(X,N) ((unsigned_8)(unsigned_2)(X) << (16 * (3 - (N))))
-#define V8_4(X,N) ((unsigned_8)(unsigned_4)(X) << (32 * (1 - (N))))
-
-#define V16_1(X,N) ((unsigned_16)(unsigned_1)(X) << ( 8 * (15 - (N))))
-#define V16_2(X,N) ((unsigned_16)(unsigned_2)(X) << (16 * (7 - (N))))
-#define V16_4(X,N) ((unsigned_16)(unsigned_4)(X) << (32 * (3 - (N))))
-#define V16_8(X,N) ((unsigned_16)(unsigned_8)(X) << (64 * (1 - (N))))
-
-
-/* Reverse - insert N sub-words into single word quantity */
-
-#define U2_1(I0,I1) (V2_1(I0,0) | V2_1(I1,1))
-#define U4_1(I0,I1,I2,I3) (V4_1(I0,0) | V4_1(I1,1) | V4_1(I2,2) | V4_1(I3,3))
-#define U8_1(I0,I1,I2,I3,I4,I5,I6,I7) \
-(V8_1(I0,0) | V8_1(I1,1) | V8_1(I2,2) | V8_1(I3,3) \
- | V8_1(I4,4) | V8_1(I5,5) | V8_1(I6,6) | V8_1(I7,7))
-#define U16_1(I0,I1,I2,I3,I4,I5,I6,I7,I8,I9,I10,I11,I12,I13,I14,I15) \
-(V16_1(I0,0) | V16_1(I1,1) | V16_1(I2,2) | V16_1(I3,3) \
- | V16_1(I4,4) | V16_1(I5,5) | V16_1(I6,6) | V16_1(I7,7) \
- | V16_1(I8,8) | V16_1(I9,9) | V16_1(I10,10) | V16_1(I11,11) \
- | V16_1(I12,12) | V16_1(I13,13) | V16_1(I14,14) | V16_1(I15,15))
-
-#define U4_2(I0,I1) (V4_2(I0,0) | V4_2(I1,1))
-#define U8_2(I0,I1,I2,I3) (V8_2(I0,0) | V8_2(I1,1) | V8_2(I2,2) | V8_2(I3,3))
-#define U16_2(I0,I1,I2,I3,I4,I5,I6,I7) \
-(V16_2(I0,0) | V16_2(I1,1) | V16_2(I2,2) | V16_2(I3,3) \
- | V16_2(I4,4) | V16_2(I5,5) | V16_2(I6,6) | V16_2(I7,7) )
-
-#define U8_4(I0,I1) (V8_4(I0,0) | V8_4(I1,1))
-#define U16_4(I0,I1,I2,I3) (V16_4(I0,0) | V16_4(I1,1) | V16_4(I2,2) | V16_4(I3,3))
-
-#define U16_8(I0,I1) (sim_endian_join_16 (I0, I1))
-
-
-#if (WITH_TARGET_WORD_BITSIZE == 64)
-#define Vword_H(X) V8_H4(X)
-#define Vword_L(X) V8_L4(X)
-#endif
-#if (WITH_TARGET_WORD_BITSIZE == 32)
-#define Vword_H(X) V4_H2(X)
-#define Vword_L(X) V4_L2(X)
-#endif
-
-
-
-
-#if H_REVEALS_MODULE_P (SIM_ENDIAN_INLINE)
-#include "sim-endian.c"
-#endif
-
-#endif /* _SIM_ENDIAN_H_ */
diff --git a/sim/common/sim-engine.c b/sim/common/sim-engine.c
deleted file mode 100644
index 9415f637cc1..00000000000
--- a/sim/common/sim-engine.c
+++ /dev/null
@@ -1,210 +0,0 @@
-/* Generic simulator halt/restart.
- Copyright (C) 1997, 1998 Free Software Foundation, Inc.
- Contributed by Cygnus Support.
-
-This file is part of GDB, the GNU debugger.
-
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License along
-with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
-
-#include <stdio.h>
-
-#include "sim-main.h"
-#include "sim-assert.h"
-
-/* Get the run state.
- REASON/SIGRC are the values returned by sim_stop_reason.
- ??? Should each cpu have its own copy? */
-
-void
-sim_engine_get_run_state (SIM_DESC sd, enum sim_stop *reason, int *sigrc)
-{
- sim_engine *engine = STATE_ENGINE (sd);
- ASSERT (STATE_MAGIC (sd) == SIM_MAGIC_NUMBER);
- *reason = engine->reason;
- *sigrc = engine->sigrc;
-}
-
-/* Set the run state to REASON/SIGRC.
- REASON/SIGRC are the values returned by sim_stop_reason.
- ??? Should each cpu have its own copy? */
-
-void
-sim_engine_set_run_state (SIM_DESC sd, enum sim_stop reason, int sigrc)
-{
- sim_engine *engine = STATE_ENGINE (sd);
- ASSERT (STATE_MAGIC (sd) == SIM_MAGIC_NUMBER);
- engine->reason = reason;
- engine->sigrc = sigrc;
-}
-
-/* Generic halt */
-
-void
-sim_engine_halt (SIM_DESC sd,
- sim_cpu *last_cpu,
- sim_cpu *next_cpu, /* NULL - use default */
- sim_cia cia,
- enum sim_stop reason,
- int sigrc)
-{
- sim_engine *engine = STATE_ENGINE (sd);
- ASSERT (STATE_MAGIC (sd) == SIM_MAGIC_NUMBER);
- if (engine->jmpbuf != NULL)
- {
- jmp_buf *halt_buf = engine->jmpbuf;
- engine->last_cpu = last_cpu;
- engine->next_cpu = next_cpu;
- engine->reason = reason;
- engine->sigrc = sigrc;
-
- SIM_ENGINE_HALT_HOOK (sd, last_cpu, cia);
-
-#ifdef SIM_CPU_EXCEPTION_SUSPEND
- if (last_cpu != NULL && reason != sim_exited)
- SIM_CPU_EXCEPTION_SUSPEND (sd, last_cpu, sim_signal_to_host (sd, sigrc));
-#endif
-
- longjmp (*halt_buf, sim_engine_halt_jmpval);
- }
- else
- sim_io_error (sd, "sim_halt - bad long jump");
-}
-
-
-/* Generic restart */
-
-void
-sim_engine_restart (SIM_DESC sd,
- sim_cpu *last_cpu,
- sim_cpu *next_cpu,
- sim_cia cia)
-{
- sim_engine *engine = STATE_ENGINE (sd);
- ASSERT (STATE_MAGIC (sd) == SIM_MAGIC_NUMBER);
- if (engine->jmpbuf != NULL)
- {
- jmp_buf *halt_buf = engine->jmpbuf;
- engine->last_cpu = last_cpu;
- engine->next_cpu = next_cpu;
- SIM_ENGINE_RESTART_HOOK (sd, last_cpu, cia);
- longjmp (*halt_buf, sim_engine_restart_jmpval);
- }
- else
- sim_io_error (sd, "sim_restart - bad long jump");
-}
-
-
-/* Generic error code */
-
-void
-sim_engine_vabort (SIM_DESC sd,
- sim_cpu *cpu,
- sim_cia cia,
- const char *fmt,
- va_list ap)
-{
- ASSERT (sd == NULL || STATE_MAGIC (sd) == SIM_MAGIC_NUMBER);
- if (sd == NULL)
- {
- vfprintf (stderr, fmt, ap);
- fprintf (stderr, "\nQuit\n");
- abort ();
- }
- else if (STATE_ENGINE (sd)->jmpbuf == NULL)
- {
- sim_io_evprintf (sd, fmt, ap);
- sim_io_eprintf (sd, "\n");
- sim_io_error (sd, "Quit Simulator");
- }
- else
- {
- sim_io_evprintf (sd, fmt, ap);
- sim_io_eprintf (sd, "\n");
- sim_engine_halt (sd, cpu, NULL, cia, sim_stopped, SIM_SIGABRT);
- }
-}
-
-void
-sim_engine_abort (SIM_DESC sd,
- sim_cpu *cpu,
- sim_cia cia,
- const char *fmt,
- ...)
-{
- va_list ap;
- ASSERT (sd == NULL || STATE_MAGIC (sd) == SIM_MAGIC_NUMBER);
- va_start(ap, fmt);
- sim_engine_vabort (sd, cpu, cia, fmt, ap);
- va_end (ap);
-}
-
-
-/* Generic next/last cpu */
-
-int
-sim_engine_last_cpu_nr (SIM_DESC sd)
-{
- sim_engine *engine = STATE_ENGINE (sd);
- if (engine->last_cpu != NULL)
- return engine->last_cpu - STATE_CPU (sd, 0);
- else
- return MAX_NR_PROCESSORS;
-}
-
-int
-sim_engine_next_cpu_nr (SIM_DESC sd)
-{
- sim_engine *engine = STATE_ENGINE (sd);
- if (engine->next_cpu != NULL)
- return engine->next_cpu - STATE_CPU (sd, 0);
- else
- return sim_engine_last_cpu_nr (sd) + 1;
-}
-
-int
-sim_engine_nr_cpus (SIM_DESC sd)
-{
- sim_engine *engine = STATE_ENGINE (sd);
- return engine->nr_cpus;
-}
-
-
-
-
-/* Initialization */
-
-static SIM_RC
-sim_engine_init (SIM_DESC sd)
-{
- /* initialize the start/stop/resume engine */
- sim_engine *engine = STATE_ENGINE (sd);
- engine->jmpbuf = NULL;
- engine->last_cpu = NULL;
- engine->next_cpu = NULL;
- engine->nr_cpus = MAX_NR_PROCESSORS;
- engine->reason = sim_running;
- engine->sigrc = 0;
- engine->stepper = NULL; /* sim_events_init will clean it up */
- return SIM_RC_OK;
-}
-
-
-SIM_RC
-sim_engine_install (SIM_DESC sd)
-{
- SIM_ASSERT (STATE_MAGIC (sd) == SIM_MAGIC_NUMBER);
- sim_module_add_init_fn (sd, sim_engine_init);
- return SIM_RC_OK;
-}
diff --git a/sim/common/sim-engine.h b/sim/common/sim-engine.h
deleted file mode 100644
index 41aa51f9ed0..00000000000
--- a/sim/common/sim-engine.h
+++ /dev/null
@@ -1,161 +0,0 @@
-/* Generic simulator halt/resume.
- Copyright (C) 1997, 1998 Free Software Foundation, Inc.
- Contributed by Cygnus Support.
-
-This file is part of GDB, the GNU debugger.
-
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License along
-with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
-
-#ifndef SIM_ENGINE_H
-#define SIM_ENGINE_H
-
-
-typedef struct _sim_engine sim_engine;
-struct _sim_engine
-{
- void *jmpbuf;
- sim_cpu *last_cpu;
- sim_cpu *next_cpu;
- int nr_cpus;
- enum sim_stop reason;
- sim_event *stepper;
- int sigrc;
-};
-
-
-
-/* jmpval: 0 (initial use) start simulator
- 1 halt simulator
- 2 restart simulator
- This is required by the ISO C standard (the only time 0 is returned
- is at the initial call to setjmp). */
-
-enum {
- sim_engine_start_jmpval,
- sim_engine_halt_jmpval,
- sim_engine_restart_jmpval,
-};
-
-
-/* Get/set the run state of CPU to REASON/SIGRC.
- REASON/SIGRC are the values returned by sim_stop_reason. */
-void sim_engine_get_run_state (SIM_DESC sd, enum sim_stop *reason, int *sigrc);
-void sim_engine_set_run_state (SIM_DESC sd, enum sim_stop reason, int sigrc);
-
-
-/* Halt the simulator *now* */
-
-extern void sim_engine_halt
-(SIM_DESC sd,
- sim_cpu *last_cpu, /* NULL -> in event-mgr */
- sim_cpu *next_cpu, /* NULL -> succ (last_cpu) or event-mgr */
- sim_cia cia,
- enum sim_stop reason,
- int sigrc);
-
-/* Halt hook - allow target specific operation when halting a
- simulator */
-
-#if !defined (SIM_ENGINE_HALT_HOOK)
-#define SIM_ENGINE_HALT_HOOK(SD, LAST_CPU, CIA) \
-if ((LAST_CPU) != NULL) CIA_SET (LAST_CPU, CIA)
-#endif
-
-/* NB: If a port uses the SIM_CPU_EXCEPTION_* hooks, the default
- SIM_ENGINE_HALT_HOOK and SIM_ENGINE_RESUME_HOOK must not be used.
- They conflict in that the PC set by the HALT_HOOK may overwrite the
- proper one, as intended to be saved by the EXCEPTION_TRIGGER
- hook. */
-
-
-/* restart the simulator *now* */
-
-extern void sim_engine_restart
-(SIM_DESC sd,
- sim_cpu *last_cpu, /* NULL -> in event-mgr */
- sim_cpu *next_cpu, /* NULL -> succ (last_cpu) or event-mgr */
- sim_cia cia);
-
-/* Restart hook - allow target specific operation when restarting a
- simulator */
-
-#if !defined (SIM_ENGINE_RESTART_HOOK)
-#define SIM_ENGINE_RESTART_HOOK(SD, LAST_CPU, CIA) SIM_ENGINE_HALT_HOOK(SD, LAST_CPU, CIA)
-#endif
-
-
-
-
-/* Abort the simulator *now*.
-
- This function is NULL safe. It can be called when either of SD or
- CIA are NULL.
-
- This function is setjmp/longjmp safe. It can be called when of
- the sim_engine setjmp/longjmp buffer has not been established.
-
- Simulators that are using components such as sim-core but are not
- yet using this sim-engine module should link in file sim-abort.o
- which implements a non setjmp/longjmp version of
- sim_engine_abort. */
-
-extern void sim_engine_abort
-(SIM_DESC sd,
- sim_cpu *cpu,
- sim_cia cia,
- const char *fmt,
- ...) __attribute__ ((format (printf, 4, 5)));
-
-extern void sim_engine_vabort
-(SIM_DESC sd,
- sim_cpu *cpu,
- sim_cia cia,
- const char *fmt,
- va_list ap);
-
-/* No abort hook - when possible this function exits using the
- engine_halt function (and SIM_ENGINE_HALT_HOOK). */
-
-
-
-
-/* Called by the generic sim_resume to run the simulation within the
- above safty net.
-
- An example implementation of sim_engine_run can be found in the
- file sim-run.c */
-
-extern void sim_engine_run
-(SIM_DESC sd,
- int next_cpu_nr,
- int nr_cpus,
- int siggnal); /* most simulators ignore siggnal */
-
-
-
-/* Determine the state of next/last cpu when the simulator was last
- halted - a value >= MAX_NR_PROCESSORS indicates that the
- event-queue was next/last. */
-
-extern int sim_engine_next_cpu_nr (SIM_DESC sd);
-extern int sim_engine_last_cpu_nr (SIM_DESC sd);
-extern int sim_engine_nr_cpus (SIM_DESC sd);
-
-
-/* Establish the simulator engine */
-MODULE_INSTALL_FN sim_engine_install;
-
-
-#endif
diff --git a/sim/common/sim-events.c b/sim/common/sim-events.c
deleted file mode 100644
index 1866b2dccd7..00000000000
--- a/sim/common/sim-events.c
+++ /dev/null
@@ -1,1201 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1997, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-#ifndef _SIM_EVENTS_C_
-#define _SIM_EVENTS_C_
-
-#include "sim-main.h"
-#include "sim-assert.h"
-
-#ifdef HAVE_STRING_H
-#include <string.h>
-#else
-#ifdef HAVE_STRINGS_H
-#include <strings.h>
-#endif
-#endif
-
-#ifdef HAVE_STDLIB_H
-#include <stdlib.h>
-#endif
-
-#include <signal.h> /* For SIGPROCMASK et.al. */
-
-typedef enum {
- watch_invalid,
-
- /* core - target byte order */
- watch_core_targ_1,
- watch_core_targ_2,
- watch_core_targ_4,
- watch_core_targ_8,
- /* core - big-endian */
- watch_core_be_1,
- watch_core_be_2,
- watch_core_be_4,
- watch_core_be_8,
- /* core - little-endian */
- watch_core_le_1,
- watch_core_le_2,
- watch_core_le_4,
- watch_core_le_8,
-
- /* sim - host byte order */
- watch_sim_host_1,
- watch_sim_host_2,
- watch_sim_host_4,
- watch_sim_host_8,
- /* sim - big-endian */
- watch_sim_be_1,
- watch_sim_be_2,
- watch_sim_be_4,
- watch_sim_be_8,
- /* sim - little-endian */
- watch_sim_le_1,
- watch_sim_le_2,
- watch_sim_le_4,
- watch_sim_le_8,
-
- /* wallclock */
- watch_clock,
-
- /* timer */
- watch_timer,
-} sim_event_watchpoints;
-
-
-struct _sim_event {
- sim_event_watchpoints watching;
- void *data;
- sim_event_handler *handler;
- /* timer event */
- signed64 time_of_event;
- /* watch wallclock event */
- unsigned wallclock;
- /* watch core address */
- address_word core_addr;
- unsigned core_map;
- /* watch sim addr */
- void *host_addr;
- /* watch core/sim range */
- int is_within; /* 0/1 */
- unsigned ub;
- unsigned lb;
- unsigned64 ub64;
- unsigned64 lb64;
- /* trace info (if any) */
- char *trace;
- /* list */
- sim_event *next;
-};
-
-
-/* The event queue maintains a single absolute time using two
- variables.
-
- TIME_OF_EVENT: this holds the time at which the next event is ment
- to occure. If no next event it will hold the time of the last
- event.
-
- TIME_FROM_EVENT: The current distance from TIME_OF_EVENT. A value
- <= 0 (except when poll-event is being processed) indicates that
- event processing is due. This variable is decremented once for
- each iteration of a clock cycle.
-
- Initially, the clock is started at time one (0) with TIME_OF_EVENT
- == 0 and TIME_FROM_EVENT == 0 and with NR_TICKS_TO_PROCESS == 1.
-
- Clearly there is a bug in that this code assumes that the absolute
- time counter will never become greater than 2^62.
-
- To avoid the need to use 64bit arithmetic, the event queue always
- contains at least one event scheduled every 16 000 ticks. This
- limits the time from event counter to values less than
- 16 000. */
-
-
-#if !defined (SIM_EVENTS_POLL_RATE)
-#define SIM_EVENTS_POLL_RATE 0x1000
-#endif
-
-
-#define _ETRACE sd, NULL
-
-#undef ETRACE_P
-#define ETRACE_P (WITH_TRACE && STATE_EVENTS (sd)->trace)
-
-#undef ETRACE
-#define ETRACE(ARGS) \
-do \
- { \
- if (ETRACE_P) \
- { \
- if (STRACE_DEBUG_P (sd)) \
- { \
- const char *file; \
- SIM_FILTER_PATH (file, __FILE__); \
- trace_printf (sd, NULL, "%s:%d: ", file, __LINE__); \
- } \
- trace_printf ARGS; \
- } \
- } \
-while (0)
-
-
-/* event queue iterator - don't iterate over the held queue. */
-
-#if EXTERN_SIM_EVENTS_P
-static sim_event **
-next_event_queue (SIM_DESC sd,
- sim_event **queue)
-{
- if (queue == NULL)
- return &STATE_EVENTS (sd)->queue;
- else if (queue == &STATE_EVENTS (sd)->queue)
- return &STATE_EVENTS (sd)->watchpoints;
- else if (queue == &STATE_EVENTS (sd)->watchpoints)
- return &STATE_EVENTS (sd)->watchedpoints;
- else if (queue == &STATE_EVENTS (sd)->watchedpoints)
- return NULL;
- else
- sim_io_error (sd, "next_event_queue - bad queue");
- return NULL;
-}
-#endif
-
-
-STATIC_INLINE_SIM_EVENTS\
-(void)
-sim_events_poll (SIM_DESC sd,
- void *data)
-{
- /* just re-schedule in 1000 million ticks time */
- sim_events_schedule (sd, SIM_EVENTS_POLL_RATE, sim_events_poll, sd);
- sim_io_poll_quit (sd);
-}
-
-
-/* "events" module install handler.
- This is called via sim_module_install to install the "events" subsystem
- into the simulator. */
-
-#if EXTERN_SIM_EVENTS_P
-STATIC_SIM_EVENTS (MODULE_UNINSTALL_FN) sim_events_uninstall;
-STATIC_SIM_EVENTS (MODULE_INIT_FN) sim_events_init;
-STATIC_SIM_EVENTS (MODULE_RESUME_FN) sim_events_resume;
-STATIC_SIM_EVENTS (MODULE_SUSPEND_FN) sim_events_suspend;
-#endif
-
-#if EXTERN_SIM_EVENTS_P
-SIM_RC
-sim_events_install (SIM_DESC sd)
-{
- SIM_ASSERT (STATE_MAGIC (sd) == SIM_MAGIC_NUMBER);
- sim_module_add_uninstall_fn (sd, sim_events_uninstall);
- sim_module_add_init_fn (sd, sim_events_init);
- sim_module_add_resume_fn (sd, sim_events_resume);
- sim_module_add_suspend_fn (sd, sim_events_suspend);
- return SIM_RC_OK;
-}
-#endif
-
-
-/* Suspend/resume the event queue manager when the simulator is not
- running */
-
-#if EXTERN_SIM_EVENTS_P
-static SIM_RC
-sim_events_resume (SIM_DESC sd)
-{
- sim_events *events = STATE_EVENTS (sd);
- SIM_ASSERT (STATE_MAGIC (sd) == SIM_MAGIC_NUMBER);
- SIM_ASSERT (events->resume_wallclock == 0);
- events->resume_wallclock = sim_elapsed_time_get ();
- return SIM_RC_OK;
-}
-#endif
-
-#if EXTERN_SIM_EVENTS_P
-static SIM_RC
-sim_events_suspend (SIM_DESC sd)
-{
- sim_events *events = STATE_EVENTS (sd);
- SIM_ASSERT (STATE_MAGIC (sd) == SIM_MAGIC_NUMBER);
- SIM_ASSERT (events->resume_wallclock != 0);
- events->elapsed_wallclock += sim_elapsed_time_since (events->resume_wallclock);
- events->resume_wallclock = 0;
- return SIM_RC_OK;
-}
-#endif
-
-
-/* Uninstall the "events" subsystem from the simulator. */
-
-#if EXTERN_SIM_EVENTS_P
-static void
-sim_events_uninstall (SIM_DESC sd)
-{
- SIM_ASSERT (STATE_MAGIC (sd) == SIM_MAGIC_NUMBER);
- /* FIXME: free buffers, etc. */
-}
-#endif
-
-
-/* malloc/free */
-
-#if EXTERN_SIM_EVENTS_P
-static sim_event *
-sim_events_zalloc (SIM_DESC sd)
-{
- sim_events *events = STATE_EVENTS (sd);
- sim_event *new = events->free_list;
- if (new != NULL)
- {
- events->free_list = new->next;
- memset (new, 0, sizeof (*new));
- }
- else
- {
-#if defined (HAVE_SIGPROCMASK) && defined (SIG_SETMASK)
- /*-LOCK-*/
- sigset_t old_mask;
- sigset_t new_mask;
- sigfillset(&new_mask);
- sigprocmask (SIG_SETMASK, &new_mask, &old_mask);
-#endif
- new = ZALLOC (sim_event);
-#if defined (HAVE_SIGPROCMASK) && defined (SIG_SETMASK)
- /*-UNLOCK-*/
- sigprocmask (SIG_SETMASK, &old_mask, NULL);
-#endif
- }
- return new;
-}
-#endif
-
-STATIC_INLINE_SIM_EVENTS\
-(void)
-sim_events_free (SIM_DESC sd,
- sim_event *dead)
-{
- sim_events *events = STATE_EVENTS (sd);
- dead->next = events->free_list;
- events->free_list = dead;
- if (dead->trace != NULL)
- {
- free (dead->trace); /* NB: asprintf returns a `free' buf */
- dead->trace = NULL;
- }
-}
-
-
-/* Initialize the simulator event manager */
-
-#if EXTERN_SIM_EVENTS_P
-SIM_RC
-sim_events_init (SIM_DESC sd)
-{
- sim_events *events = STATE_EVENTS (sd);
-
- /* drain the interrupt queue */
- events->nr_held = 0;
- if (events->held == NULL)
- events->held = NZALLOC (sim_event, MAX_NR_SIGNAL_SIM_EVENTS);
-
- /* drain the normal queues */
- {
- sim_event **queue = NULL;
- while ((queue = next_event_queue (sd, queue)) != NULL)
- {
- if (queue == NULL) break;
- while (*queue != NULL)
- {
- sim_event *dead = *queue;
- *queue = dead->next;
- sim_events_free (sd, dead);
- }
- *queue = NULL;
- }
- }
-
- /* wind time back to zero */
- events->nr_ticks_to_process = 1; /* start by doing queue */
- events->time_of_event = 0;
- events->time_from_event = 0;
- events->elapsed_wallclock = 0;
- events->resume_wallclock = 0;
-
- /* schedule our initial counter event */
- sim_events_schedule (sd, 0, sim_events_poll, sd);
-
- /* from now on, except when the large-int event is being processed
- the event queue is non empty */
- SIM_ASSERT (events->queue != NULL);
-
- return SIM_RC_OK;
-}
-#endif
-
-
-INLINE_SIM_EVENTS\
-(signed64)
-sim_events_time (SIM_DESC sd)
-{
- sim_events *events = STATE_EVENTS (sd);
- return (events->time_of_event - events->time_from_event);
-}
-
-
-INLINE_SIM_EVENTS\
-(unsigned long)
-sim_events_elapsed_time (SIM_DESC sd)
-{
- unsigned long elapsed = STATE_EVENTS (sd)->elapsed_wallclock;
-
- /* Are we being called inside sim_resume?
- (Is there a simulation in progress?) */
- if (STATE_EVENTS (sd)->resume_wallclock != 0)
- elapsed += sim_elapsed_time_since (STATE_EVENTS (sd)->resume_wallclock);
-
- return elapsed;
-}
-
-
-/* Returns the time that remains before the event is raised. */
-INLINE_SIM_EVENTS\
-(signed64)
-sim_events_remain_time (SIM_DESC sd, sim_event *event)
-{
- if (event == 0)
- return 0;
-
- return (event->time_of_event - sim_events_time (sd));
-}
-
-
-
-STATIC_INLINE_SIM_EVENTS\
-(void)
-update_time_from_event (SIM_DESC sd)
-{
- sim_events *events = STATE_EVENTS (sd);
- signed64 current_time = sim_events_time (sd);
- if (events->queue != NULL)
- {
- events->time_of_event = events->queue->time_of_event;
- events->time_from_event = (events->queue->time_of_event - current_time);
- }
- else
- {
- events->time_of_event = current_time - 1;
- events->time_from_event = -1;
- }
- if (ETRACE_P)
- {
- sim_event *event;
- int i;
- for (event = events->queue, i = 0;
- event != NULL;
- event = event->next, i++)
- {
- ETRACE ((_ETRACE,
- "event time-from-event - time %ld, delta %ld - event %d, tag 0x%lx, time %ld, handler 0x%lx, data 0x%lx%s%s\n",
- (long)current_time,
- (long)events->time_from_event,
- i,
- (long)event,
- (long)event->time_of_event,
- (long)event->handler,
- (long)event->data,
- (event->trace != NULL) ? ", " : "",
- (event->trace != NULL) ? event->trace : ""));
- }
- }
- SIM_ASSERT (current_time == sim_events_time (sd));
-}
-
-
-#if EXTERN_SIM_EVENTS_P
-static void
-insert_sim_event (SIM_DESC sd,
- sim_event *new_event,
- signed64 delta)
-{
- sim_events *events = STATE_EVENTS (sd);
- sim_event *curr;
- sim_event **prev;
- signed64 time_of_event;
-
- if (delta < 0)
- sim_io_error (sd, "what is past is past!\n");
-
- /* compute when the event should occure */
- time_of_event = sim_events_time (sd) + delta;
-
- /* find the queue insertion point - things are time ordered */
- prev = &events->queue;
- curr = events->queue;
- while (curr != NULL && time_of_event >= curr->time_of_event)
- {
- SIM_ASSERT (curr->next == NULL
- || curr->time_of_event <= curr->next->time_of_event);
- prev = &curr->next;
- curr = curr->next;
- }
- SIM_ASSERT (curr == NULL || time_of_event < curr->time_of_event);
-
- /* insert it */
- new_event->next = curr;
- *prev = new_event;
- new_event->time_of_event = time_of_event;
-
- /* adjust the time until the first event */
- update_time_from_event (sd);
-}
-#endif
-
-
-#if EXTERN_SIM_EVENTS_P
-sim_event *
-sim_events_schedule (SIM_DESC sd,
- signed64 delta_time,
- sim_event_handler *handler,
- void *data)
-{
- va_list dummy;
- return sim_events_schedule_vtracef (sd, delta_time, handler, data,
- NULL, dummy);
-}
-#endif
-
-
-#if EXTERN_SIM_EVENTS_P
-sim_event *
-sim_events_schedule_tracef (SIM_DESC sd,
- signed64 delta_time,
- sim_event_handler *handler,
- void *data,
- const char *fmt,
- ...)
-{
- sim_event *new_event;
- va_list ap;
- va_start (ap, fmt);
- new_event = sim_events_schedule_vtracef (sd, delta_time, handler, data, fmt, ap);
- va_end (ap);
- return new_event;
-}
-#endif
-
-
-#if EXTERN_SIM_EVENTS_P
-sim_event *
-sim_events_schedule_vtracef (SIM_DESC sd,
- signed64 delta_time,
- sim_event_handler *handler,
- void *data,
- const char *fmt,
- va_list ap)
-{
- sim_event *new_event = sim_events_zalloc (sd);
- new_event->data = data;
- new_event->handler = handler;
- new_event->watching = watch_timer;
- if (fmt == NULL || !ETRACE_P || vasprintf (&new_event->trace, fmt, ap) < 0)
- new_event->trace = NULL;
- insert_sim_event(sd, new_event, delta_time);
- ETRACE((_ETRACE,
- "event scheduled at %ld - tag 0x%lx - time %ld, handler 0x%lx, data 0x%lx%s%s\n",
- (long)sim_events_time(sd),
- (long)new_event,
- (long)new_event->time_of_event,
- (long)new_event->handler,
- (long)new_event->data,
- (new_event->trace != NULL) ? ", " : "",
- (new_event->trace != NULL) ? new_event->trace : ""));
- return new_event;
-}
-#endif
-
-
-#if EXTERN_SIM_EVENTS_P
-void
-sim_events_schedule_after_signal (SIM_DESC sd,
- signed64 delta_time,
- sim_event_handler *handler,
- void *data)
-{
- sim_events *events = STATE_EVENTS (sd);
- sim_event *new_event;
-#if defined (HAVE_SIGPROCMASK) && defined (SIG_SETMASK)
- /*-LOCK-*/
- sigset_t old_mask;
- sigset_t new_mask;
- sigfillset(&new_mask);
- sigprocmask (SIG_SETMASK, &new_mask, &old_mask);
-#endif
-
- /* allocate an event entry from the signal buffer */
- new_event = &events->held [events->nr_held];
- events->nr_held ++;
- if (events->nr_held > MAX_NR_SIGNAL_SIM_EVENTS)
- {
- sim_engine_abort (NULL, NULL, NULL_CIA,
- "sim_events_schedule_after_signal - buffer oveflow");
- }
-
- new_event->data = data;
- new_event->handler = handler;
- new_event->time_of_event = delta_time; /* work it out later */
- new_event->next = NULL;
-
- events->work_pending = 1; /* notify main process */
-
-#if defined (HAVE_SIGPROCMASK) && defined (SIG_SETMASK)
- /*-UNLOCK-*/
- sigprocmask (SIG_SETMASK, &old_mask, NULL);
-#endif
-
- ETRACE ((_ETRACE,
- "signal scheduled at %ld - tag 0x%lx - time %ld, handler 0x%lx, data 0x%lx\n",
- (long)sim_events_time(sd),
- (long)new_event,
- (long)new_event->time_of_event,
- (long)new_event->handler,
- (long)new_event->data));
-}
-#endif
-
-
-#if EXTERN_SIM_EVENTS_P
-sim_event *
-sim_events_watch_clock (SIM_DESC sd,
- unsigned delta_ms_time,
- sim_event_handler *handler,
- void *data)
-{
- sim_events *events = STATE_EVENTS (sd);
- sim_event *new_event = sim_events_zalloc (sd);
- /* type */
- new_event->watching = watch_clock;
- /* handler */
- new_event->data = data;
- new_event->handler = handler;
- /* data */
- if (events->resume_wallclock == 0)
- new_event->wallclock = (events->elapsed_wallclock + delta_ms_time);
- else
- new_event->wallclock = (events->elapsed_wallclock
- + sim_elapsed_time_since (events->resume_wallclock)
- + delta_ms_time);
- /* insert */
- new_event->next = events->watchpoints;
- events->watchpoints = new_event;
- events->work_pending = 1;
- ETRACE ((_ETRACE,
- "event watching clock at %ld - tag 0x%lx - wallclock %ld, handler 0x%lx, data 0x%lx\n",
- (long)sim_events_time (sd),
- (long)new_event,
- (long)new_event->wallclock,
- (long)new_event->handler,
- (long)new_event->data));
- return new_event;
-}
-#endif
-
-
-#if EXTERN_SIM_EVENTS_P
-sim_event *
-sim_events_watch_sim (SIM_DESC sd,
- void *host_addr,
- int nr_bytes,
- int byte_order,
- int is_within,
- unsigned64 lb,
- unsigned64 ub,
- sim_event_handler *handler,
- void *data)
-{
- sim_events *events = STATE_EVENTS (sd);
- sim_event *new_event = sim_events_zalloc (sd);
- /* type */
- switch (byte_order)
- {
- case 0:
- switch (nr_bytes)
- {
- case 1: new_event->watching = watch_sim_host_1; break;
- case 2: new_event->watching = watch_sim_host_2; break;
- case 4: new_event->watching = watch_sim_host_4; break;
- case 8: new_event->watching = watch_sim_host_8; break;
- default: sim_io_error (sd, "sim_events_watch_sim - invalid nr bytes");
- }
- break;
- case BIG_ENDIAN:
- switch (nr_bytes)
- {
- case 1: new_event->watching = watch_sim_be_1; break;
- case 2: new_event->watching = watch_sim_be_2; break;
- case 4: new_event->watching = watch_sim_be_4; break;
- case 8: new_event->watching = watch_sim_be_8; break;
- default: sim_io_error (sd, "sim_events_watch_sim - invalid nr bytes");
- }
- break;
- case LITTLE_ENDIAN:
- switch (nr_bytes)
- {
- case 1: new_event->watching = watch_sim_le_1; break;
- case 2: new_event->watching = watch_sim_le_2; break;
- case 4: new_event->watching = watch_sim_le_4; break;
- case 8: new_event->watching = watch_sim_le_8; break;
- default: sim_io_error (sd, "sim_events_watch_sim - invalid nr bytes");
- }
- break;
- default:
- sim_io_error (sd, "sim_events_watch_sim - invalid byte order");
- }
- /* handler */
- new_event->data = data;
- new_event->handler = handler;
- /* data */
- new_event->host_addr = host_addr;
- new_event->lb = lb;
- new_event->lb64 = lb;
- new_event->ub = ub;
- new_event->ub64 = ub;
- new_event->is_within = (is_within != 0);
- /* insert */
- new_event->next = events->watchpoints;
- events->watchpoints = new_event;
- events->work_pending = 1;
- ETRACE ((_ETRACE,
- "event watching host at %ld - tag 0x%lx - host-addr 0x%lx, 0x%lx..0x%lx, handler 0x%lx, data 0x%lx\n",
- (long)sim_events_time (sd),
- (long)new_event,
- (long)new_event->host_addr,
- (long)new_event->lb,
- (long)new_event->ub,
- (long)new_event->handler,
- (long)new_event->data));
- return new_event;
-}
-#endif
-
-
-#if EXTERN_SIM_EVENTS_P
-sim_event *
-sim_events_watch_core (SIM_DESC sd,
- address_word core_addr,
- unsigned core_map,
- int nr_bytes,
- int byte_order,
- int is_within,
- unsigned64 lb,
- unsigned64 ub,
- sim_event_handler *handler,
- void *data)
-{
- sim_events *events = STATE_EVENTS (sd);
- sim_event *new_event = sim_events_zalloc (sd);
- /* type */
- switch (byte_order)
- {
- case 0:
- switch (nr_bytes)
- {
- case 1: new_event->watching = watch_core_targ_1; break;
- case 2: new_event->watching = watch_core_targ_2; break;
- case 4: new_event->watching = watch_core_targ_4; break;
- case 8: new_event->watching = watch_core_targ_8; break;
- default: sim_io_error (sd, "sim_events_watch_core - invalid nr bytes");
- }
- break;
- case BIG_ENDIAN:
- switch (nr_bytes)
- {
- case 1: new_event->watching = watch_core_be_1; break;
- case 2: new_event->watching = watch_core_be_2; break;
- case 4: new_event->watching = watch_core_be_4; break;
- case 8: new_event->watching = watch_core_be_8; break;
- default: sim_io_error (sd, "sim_events_watch_core - invalid nr bytes");
- }
- break;
- case LITTLE_ENDIAN:
- switch (nr_bytes)
- {
- case 1: new_event->watching = watch_core_le_1; break;
- case 2: new_event->watching = watch_core_le_2; break;
- case 4: new_event->watching = watch_core_le_4; break;
- case 8: new_event->watching = watch_core_le_8; break;
- default: sim_io_error (sd, "sim_events_watch_core - invalid nr bytes");
- }
- break;
- default:
- sim_io_error (sd, "sim_events_watch_core - invalid byte order");
- }
- /* handler */
- new_event->data = data;
- new_event->handler = handler;
- /* data */
- new_event->core_addr = core_addr;
- new_event->core_map = core_map;
- new_event->lb = lb;
- new_event->lb64 = lb;
- new_event->ub = ub;
- new_event->ub64 = ub;
- new_event->is_within = (is_within != 0);
- /* insert */
- new_event->next = events->watchpoints;
- events->watchpoints = new_event;
- events->work_pending = 1;
- ETRACE ((_ETRACE,
- "event watching host at %ld - tag 0x%lx - host-addr 0x%lx, 0x%lx..0x%lx, handler 0x%lx, data 0x%lx\n",
- (long)sim_events_time (sd),
- (long)new_event,
- (long)new_event->host_addr,
- (long)new_event->lb,
- (long)new_event->ub,
- (long)new_event->handler,
- (long)new_event->data));
- return new_event;
-}
-#endif
-
-
-#if EXTERN_SIM_EVENTS_P
-void
-sim_events_deschedule (SIM_DESC sd,
- sim_event *event_to_remove)
-{
- sim_events *events = STATE_EVENTS (sd);
- sim_event *to_remove = (sim_event*)event_to_remove;
- if (event_to_remove != NULL)
- {
- sim_event **queue = NULL;
- while ((queue = next_event_queue (sd, queue)) != NULL)
- {
- sim_event **ptr_to_current;
- for (ptr_to_current = queue;
- *ptr_to_current != NULL && *ptr_to_current != to_remove;
- ptr_to_current = &(*ptr_to_current)->next);
- if (*ptr_to_current == to_remove)
- {
- sim_event *dead = *ptr_to_current;
- *ptr_to_current = dead->next;
- ETRACE ((_ETRACE,
- "event/watch descheduled at %ld - tag 0x%lx - time %ld, handler 0x%lx, data 0x%lx%s%s\n",
- (long) sim_events_time (sd),
- (long) event_to_remove,
- (long) dead->time_of_event,
- (long) dead->handler,
- (long) dead->data,
- (dead->trace != NULL) ? ", " : "",
- (dead->trace != NULL) ? dead->trace : ""));
- sim_events_free (sd, dead);
- update_time_from_event (sd);
- SIM_ASSERT ((events->time_from_event >= 0) == (events->queue != NULL));
- return;
- }
- }
- }
- ETRACE ((_ETRACE,
- "event/watch descheduled at %ld - tag 0x%lx - not found\n",
- (long) sim_events_time (sd),
- (long) event_to_remove));
-}
-#endif
-
-
-STATIC_INLINE_SIM_EVENTS\
-(int)
-sim_watch_valid (SIM_DESC sd,
- sim_event *to_do)
-{
- switch (to_do->watching)
- {
-
-#define WATCH_CORE(N,OP,EXT) \
- int ok; \
- unsigned_##N word = 0; \
- int nr_read = sim_core_read_buffer (sd, NULL, to_do->core_map, &word, \
- to_do->core_addr, sizeof (word)); \
- OP (word); \
- ok = (nr_read == sizeof (unsigned_##N) \
- && (to_do->is_within \
- == (word >= to_do->lb##EXT \
- && word <= to_do->ub##EXT)));
-
- case watch_core_targ_1:
- {
- WATCH_CORE (1, T2H,);
- return ok;
- }
- case watch_core_targ_2:
- {
- WATCH_CORE (2, T2H,);
- return ok;
- }
- case watch_core_targ_4:
- {
- WATCH_CORE (4, T2H,);
- return ok;
- }
- case watch_core_targ_8:
- {
- WATCH_CORE (8, T2H,64);
- return ok;
- }
-
- case watch_core_be_1:
- {
- WATCH_CORE (1, BE2H,);
- return ok;
- }
- case watch_core_be_2:
- {
- WATCH_CORE (2, BE2H,);
- return ok;
- }
- case watch_core_be_4:
- {
- WATCH_CORE (4, BE2H,);
- return ok;
- }
- case watch_core_be_8:
- {
- WATCH_CORE (8, BE2H,64);
- return ok;
- }
-
- case watch_core_le_1:
- {
- WATCH_CORE (1, LE2H,);
- return ok;
- }
- case watch_core_le_2:
- {
- WATCH_CORE (2, LE2H,);
- return ok;
- }
- case watch_core_le_4:
- {
- WATCH_CORE (4, LE2H,);
- return ok;
- }
- case watch_core_le_8:
- {
- WATCH_CORE (8, LE2H,64);
- return ok;
- }
-#undef WATCH_CORE
-
-#define WATCH_SIM(N,OP,EXT) \
- int ok; \
- unsigned_##N word = *(unsigned_##N*)to_do->host_addr; \
- OP (word); \
- ok = (to_do->is_within \
- == (word >= to_do->lb##EXT \
- && word <= to_do->ub##EXT));
-
- case watch_sim_host_1:
- {
- WATCH_SIM (1, word = ,);
- return ok;
- }
- case watch_sim_host_2:
- {
- WATCH_SIM (2, word = ,);
- return ok;
- }
- case watch_sim_host_4:
- {
- WATCH_SIM (4, word = ,);
- return ok;
- }
- case watch_sim_host_8:
- {
- WATCH_SIM (8, word = ,64);
- return ok;
- }
-
- case watch_sim_be_1:
- {
- WATCH_SIM (1, BE2H,);
- return ok;
- }
- case watch_sim_be_2:
- {
- WATCH_SIM (2, BE2H,);
- return ok;
- }
- case watch_sim_be_4:
- {
- WATCH_SIM (4, BE2H,);
- return ok;
- }
- case watch_sim_be_8:
- {
- WATCH_SIM (8, BE2H,64);
- return ok;
- }
-
- case watch_sim_le_1:
- {
- WATCH_SIM (1, LE2H,);
- return ok;
- }
- case watch_sim_le_2:
- {
- WATCH_SIM (1, LE2H,);
- return ok;
- }
- case watch_sim_le_4:
- {
- WATCH_SIM (1, LE2H,);
- return ok;
- }
- case watch_sim_le_8:
- {
- WATCH_SIM (1, LE2H,64);
- return ok;
- }
-#undef WATCH_SIM
-
- case watch_clock: /* wallclock */
- {
- unsigned long elapsed_time = sim_events_elapsed_time (sd);
- return (elapsed_time >= to_do->wallclock);
- }
-
- default:
- sim_io_error (sd, "sim_watch_valid - bad switch");
- break;
-
- }
- return 1;
-}
-
-
-INLINE_SIM_EVENTS\
-(int)
-sim_events_tick (SIM_DESC sd)
-{
- sim_events *events = STATE_EVENTS (sd);
-
- /* this should only be called after the previous ticks have been
- fully processed */
-
- /* Advance the time but *only* if there is nothing to process */
- if (events->work_pending
- || events->time_from_event == 0)
- {
- events->nr_ticks_to_process += 1;
- return 1;
- }
- else
- {
- events->time_from_event -= 1;
- return 0;
- }
-}
-
-
-INLINE_SIM_EVENTS\
-(int)
-sim_events_tickn (SIM_DESC sd,
- int n)
-{
- sim_events *events = STATE_EVENTS (sd);
- SIM_ASSERT (n > 0);
-
- /* this should only be called after the previous ticks have been
- fully processed */
-
- /* Advance the time but *only* if there is nothing to process */
- if (events->work_pending || events->time_from_event < n)
- {
- events->nr_ticks_to_process += n;
- return 1;
- }
- else
- {
- events->time_from_event -= n;
- return 0;
- }
-}
-
-
-INLINE_SIM_EVENTS\
-(void)
-sim_events_slip (SIM_DESC sd,
- int slip)
-{
- sim_events *events = STATE_EVENTS (sd);
- SIM_ASSERT (slip > 0);
-
- /* Flag a ready event with work_pending instead of number of ticks
- to process so that the time continues to be correct */
- if (events->time_from_event < slip)
- {
- events->work_pending = 1;
- }
- events->time_from_event -= slip;
-}
-
-
-INLINE_SIM_EVENTS\
-(void)
-sim_events_preprocess (SIM_DESC sd,
- int events_were_last,
- int events_were_next)
-{
- sim_events *events = STATE_EVENTS(sd);
- if (events_were_last)
- {
- /* Halted part way through event processing */
- ASSERT (events->nr_ticks_to_process != 0);
- /* The external world can't tell if the event that stopped the
- simulator was the last event to process. */
- ASSERT (events_were_next);
- sim_events_process (sd);
- }
- else if (events_were_next)
- {
- /* Halted by the last processor */
- if (sim_events_tick (sd))
- sim_events_process (sd);
- }
-}
-
-
-INLINE_SIM_EVENTS\
-(void)
-sim_events_process (SIM_DESC sd)
-{
- sim_events *events = STATE_EVENTS(sd);
- signed64 event_time = sim_events_time(sd);
-
- /* Clear work_pending before checking nr_held. Clearing
- work_pending after nr_held (with out a lock could loose an
- event). */
- events->work_pending = 0;
-
- /* move any events that were asynchronously queued by any signal
- handlers onto the real event queue. */
- if (events->nr_held > 0)
- {
- int i;
-
-#if defined(HAVE_SIGPROCMASK) && defined(SIG_SETMASK)
- /*-LOCK-*/
- sigset_t old_mask;
- sigset_t new_mask;
- sigfillset(&new_mask);
- sigprocmask(SIG_SETMASK, &new_mask, &old_mask);
-#endif
-
- for (i = 0; i < events->nr_held; i++)
- {
- sim_event *entry = &events->held [i];
- sim_events_schedule (sd,
- entry->time_of_event,
- entry->handler,
- entry->data);
- }
- events->nr_held = 0;
-
-#if defined(HAVE_SIGPROCMASK) && defined(SIG_SETMASK)
- /*-UNLOCK-*/
- sigprocmask(SIG_SETMASK, &old_mask, NULL);
-#endif
-
- }
-
- /* Process any watchpoints. Be careful to allow a watchpoint to
- appear/disappear under our feet.
- To ensure that watchpoints are processed only once per cycle,
- they are moved onto a watched queue, this returned to the
- watchpoint queue when all queue processing has been
- completed. */
- while (events->watchpoints != NULL)
- {
- sim_event *to_do = events->watchpoints;
- events->watchpoints = to_do->next;
- if (sim_watch_valid (sd, to_do))
- {
- sim_event_handler *handler = to_do->handler;
- void *data = to_do->data;
- ETRACE((_ETRACE,
- "event issued at %ld - tag 0x%lx - handler 0x%lx, data 0x%lx%s%s\n",
- (long) event_time,
- (long) to_do,
- (long) handler,
- (long) data,
- (to_do->trace != NULL) ? ", " : "",
- (to_do->trace != NULL) ? to_do->trace : ""));
- sim_events_free (sd, to_do);
- handler (sd, data);
- }
- else
- {
- to_do->next = events->watchedpoints;
- events->watchedpoints = to_do;
- }
- }
-
- /* consume all events for this or earlier times. Be careful to
- allow an event to appear/disappear under our feet */
- while (events->queue->time_of_event <
- (event_time + events->nr_ticks_to_process))
- {
- sim_event *to_do = events->queue;
- sim_event_handler *handler = to_do->handler;
- void *data = to_do->data;
- events->queue = to_do->next;
- update_time_from_event (sd);
- ETRACE((_ETRACE,
- "event issued at %ld - tag 0x%lx - handler 0x%lx, data 0x%lx%s%s\n",
- (long) event_time,
- (long) to_do,
- (long) handler,
- (long) data,
- (to_do->trace != NULL) ? ", " : "",
- (to_do->trace != NULL) ? to_do->trace : ""));
- sim_events_free (sd, to_do);
- handler (sd, data);
- }
-
- /* put things back where they belong ready for the next iteration */
- events->watchpoints = events->watchedpoints;
- events->watchedpoints = NULL;
- if (events->watchpoints != NULL)
- events->work_pending = 1;
-
- /* advance the time */
- SIM_ASSERT (events->time_from_event >= events->nr_ticks_to_process);
- SIM_ASSERT (events->queue != NULL); /* always poll event */
- events->time_from_event -= events->nr_ticks_to_process;
-
- /* this round of processing complete */
- events->nr_ticks_to_process = 0;
-}
-
-#endif
diff --git a/sim/common/sim-events.h b/sim/common/sim-events.h
deleted file mode 100644
index 55b2b740c91..00000000000
--- a/sim/common/sim-events.h
+++ /dev/null
@@ -1,277 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1997, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-#ifndef SIM_EVENTS_H
-#define SIM_EVENTS_H
-
-
-/* Notes:
-
- When scheduling an event, the a delta of zero/one refers to the
- timeline as follows:
-
- epoch 0|1 1|2 2|3 3|
- **queue**|--insn--|*queue*|--insn--|*queue*|--insn--|*queue*|
- | ^ ^ | ^ ^
- `- +0 ------------ +1 --.. `----- +0 ------------- +1 --..
-
- When the queue is initialized, the time is set to zero with a
- number of initialization events scheduled. Consequently, as also
- illustrated above, the event queue should be processed before the
- first instruction. That instruction being executed during tick 1.
-
- The simulator main loop may take a form similar to:
-
- if (halt-/restart-setjmp)
- {
-
- .... // Determine who should go next
- last-cpu-nr = get-last-cpu-nr (sd);
- next-cpu-nr = get-next-cpu-nr (sd);
- events-were-last? = (last-cpu-nr >= nr-cpus);
- events-were-next? = (next-cpu-nr >= nr-cpus);
-
- .... // process any outstanding events
- sim_events_preprocess (sd, events-were-last?, events-were-next?);
- if (events-were-next)
- next-cpu-nr = 0;
-
- .... // prime main loop
-
- while (1)
- {
- .... // model one insn of next-cpu-nr .. nr-cpus
- if (sim_events_tick (sd))
- sim_events_process (sd);
- next-cpu-nr = 0
- }
- }
-
- NB. In the above pseudo code it is assumed that any cpu-nr >=
- nr-cpus is a marker for the event queue. */
-
-
-typedef void sim_event_handler(SIM_DESC sd, void *data);
-
-typedef struct _sim_event sim_event;
-
-typedef struct _sim_events sim_events;
-struct _sim_events {
- int nr_ticks_to_process;
- sim_event *queue;
- sim_event *watchpoints;
- sim_event *watchedpoints;
- sim_event *free_list;
- /* flag additional work needed */
- volatile int work_pending;
- /* the asynchronous event queue */
-#ifndef MAX_NR_SIGNAL_SIM_EVENTS
-#define MAX_NR_SIGNAL_SIM_EVENTS 2
-#endif
- sim_event *held;
- volatile int nr_held;
- /* timekeeping */
- unsigned long elapsed_wallclock;
- SIM_ELAPSED_TIME resume_wallclock;
- signed64 time_of_event;
- int time_from_event;
- int trace;
-};
-
-
-
-/* Install the "events" module. */
-
-extern SIM_RC sim_events_install (SIM_DESC sd);
-
-
-/* Schedule an event DELTA_TIME ticks into the future */
-
-extern sim_event *sim_events_schedule
-(SIM_DESC sd,
- signed64 delta_time,
- sim_event_handler *handler,
- void *data);
-
-extern sim_event *sim_events_schedule_tracef
-(SIM_DESC sd,
- signed64 delta_time,
- sim_event_handler *handler,
- void *data,
- const char *fmt,
- ...) __attribute__ ((format (printf, 5, 6)));
-
-extern sim_event *sim_events_schedule_vtracef
-(SIM_DESC sd,
- signed64 delta_time,
- sim_event_handler *handler,
- void *data,
- const char *fmt,
- va_list ap);
-
-
-extern void sim_events_schedule_after_signal
-(SIM_DESC sd,
- signed64 delta_time,
- sim_event_handler *handler,
- void *data);
-
-/* NB: signal level events can't have trace strings as malloc isn't
- available */
-
-
-
-/* Schedule an event milli-seconds from NOW. The exact interpretation
- of wallclock is host dependant. */
-
-extern sim_event *sim_events_watch_clock
-(SIM_DESC sd,
- unsigned delta_ms_time,
- sim_event_handler *handler,
- void *data);
-
-
-/* Schedule an event when the test (IS_WITHIN == (VAL >= LB && VAL <=
- UB)) of the NR_BYTES value at HOST_ADDR with BYTE_ORDER endian is
- true.
-
- HOST_ADDR: pointer into the host address space.
- BYTE_ORDER: 0 - host endian; BIG_ENDIAN; LITTLE_ENDIAN */
-
-extern sim_event *sim_events_watch_sim
-(SIM_DESC sd,
- void *host_addr,
- int nr_bytes,
- int byte_order,
- int is_within,
- unsigned64 lb,
- unsigned64 ub,
- sim_event_handler *handler,
- void *data);
-
-
-/* Schedule an event when the test (IS_WITHIN == (VAL >= LB && VAL <=
- UB)) of the NR_BYTES value at CORE_ADDR in BYTE_ORDER endian is
- true.
-
- CORE_ADDR/MAP: pointer into the target address space.
- BYTE_ORDER: 0 - current target endian; BIG_ENDIAN; LITTLE_ENDIAN */
-
-extern sim_event *sim_events_watch_core
-(SIM_DESC sd,
- address_word core_addr,
- unsigned map,
- int nr_bytes,
- int byte_order,
- int is_within,
- unsigned64 lb,
- unsigned64 ub,
- sim_event_handler *handler,
- void *data);
-
-/* Deschedule the specified event */
-
-extern void sim_events_deschedule
-(SIM_DESC sd,
- sim_event *event_to_remove);
-
-
-/* Prepare for main simulator loop. Ensure that the next thing to do
- is not event processing.
-
- If the simulator halted part way through event processing then both
- EVENTS_WERE_LAST and EVENTS_WERE_NEXT shall be true.
-
- If the simulator halted after processing the last cpu, then only
- EVENTS_WERE_NEXT shall be true. */
-
-INLINE_SIM_EVENTS\
-(void) sim_events_preprocess
-(SIM_DESC sd,
- int events_were_last,
- int events_were_next);
-
-
-/* Progress time.
-
- Separated into two parts so that the main loop can save its context
- before the event queue is processed. When sim_events_tick*()
- returns true, any simulation context should be saved and
- sim_events_process() called.
-
- SIM_EVENTS_TICK advances the clock by 1 cycle.
-
- SIM_EVENTS_TICKN advances the clock by N cycles (1..MAXINT). */
-
-INLINE_SIM_EVENTS\
-(int) sim_events_tick
-(SIM_DESC sd);
-
-INLINE_SIM_EVENTS\
-(int) sim_events_tickn
-(SIM_DESC sd,
- int n);
-
-INLINE_SIM_EVENTS\
-(void) sim_events_process
-(SIM_DESC sd);
-
-
-/* Advance the clock by an additional SLIP cycles at the next call to
- sim_events_tick*(). For multiple calls, the effect is
- accumulative. */
-
-INLINE_SIM_EVENTS\
-(void) sim_events_slip
-(SIM_DESC sd,
- int slip);
-
-
-/* Progress time such that an event shall occure upon the next call to
- sim_events tick */
-
-#if 0
-INLINE_SIM_EVENTS\
-(void) sim_events_timewarp
-(SIM_DESC sd);
-#endif
-
-
-/* local concept of elapsed target time */
-
-INLINE_SIM_EVENTS\
-(signed64) sim_events_time
-(SIM_DESC sd);
-
-
-/* local concept of elapsed host time (milliseconds) */
-
-INLINE_SIM_EVENTS\
-(unsigned long) sim_events_elapsed_time
-(SIM_DESC sd);
-
-/* Returns the time that remains before the event is raised. */
-INLINE_SIM_EVENTS\
-(signed64) sim_events_remain_time
-(SIM_DESC sd, sim_event *event);
-
-
-#endif
diff --git a/sim/common/sim-fpu.c b/sim/common/sim-fpu.c
deleted file mode 100644
index 7639175170e..00000000000
--- a/sim/common/sim-fpu.c
+++ /dev/null
@@ -1,2567 +0,0 @@
-/* This is a software floating point library which can be used instead
- of the floating point routines in libgcc1.c for targets without
- hardware floating point. */
-
-/* Copyright (C) 1994,1997-1998 Free Software Foundation, Inc.
-
-This file is free software; you can redistribute it and/or modify it
-under the terms of the GNU General Public License as published by the
-Free Software Foundation; either version 2, or (at your option) any
-later version.
-
-In addition to the permissions in the GNU General Public License, the
-Free Software Foundation gives you unlimited permission to link the
-compiled version of this file with other programs, and to distribute
-those programs without any restriction coming from the use of this
-file. (The General Public License restrictions do apply in other
-respects; for example, they cover modification of the file, and
-distribution when not linked into another program.)
-
-This file is distributed in the hope that it will be useful, but
-WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
-General Public License for more details.
-
-You should have received a copy of the GNU General Public License
-along with this program; see the file COPYING. If not, write to
-the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
-
-/* As a special exception, if you link this library with other files,
- some of which are compiled with GCC, to produce an executable,
- this library does not by itself cause the resulting executable
- to be covered by the GNU General Public License.
- This exception does not however invalidate any other reasons why
- the executable file might be covered by the GNU General Public License. */
-
-/* This implements IEEE 754 format arithmetic, but does not provide a
- mechanism for setting the rounding mode, or for generating or handling
- exceptions.
-
- The original code by Steve Chamberlain, hacked by Mark Eichin and Jim
- Wilson, all of Cygnus Support. */
-
-
-#ifndef SIM_FPU_C
-#define SIM_FPU_C
-
-#include "sim-basics.h"
-#include "sim-fpu.h"
-
-#include "sim-io.h"
-#include "sim-assert.h"
-
-
-/* Debugging support.
- If digits is -1, then print all digits. */
-
-static void
-print_bits (unsigned64 x,
- int msbit,
- int digits,
- sim_fpu_print_func print,
- void *arg)
-{
- unsigned64 bit = LSBIT64 (msbit);
- int i = 4;
- while (bit && digits)
- {
- if (i == 0)
- print (arg, ",");
-
- if ((x & bit))
- print (arg, "1");
- else
- print (arg, "0");
- bit >>= 1;
-
- if (digits > 0) digits--;
- i = (i + 1) % 4;
- }
-}
-
-
-
-/* Quick and dirty conversion between a host double and host 64bit int */
-
-typedef union {
- double d;
- unsigned64 i;
-} sim_fpu_map;
-
-
-/* A packed IEEE floating point number.
-
- Form is <SIGN:1><BIASEDEXP:NR_EXPBITS><FRAC:NR_FRACBITS> for both
- 32 and 64 bit numbers. This number is interpreted as:
-
- Normalized (0 < BIASEDEXP && BIASEDEXP < EXPMAX):
- (sign ? '-' : '+') 1.<FRAC> x 2 ^ (BIASEDEXP - EXPBIAS)
-
- Denormalized (0 == BIASEDEXP && FRAC != 0):
- (sign ? "-" : "+") 0.<FRAC> x 2 ^ (- EXPBIAS)
-
- Zero (0 == BIASEDEXP && FRAC == 0):
- (sign ? "-" : "+") 0.0
-
- Infinity (BIASEDEXP == EXPMAX && FRAC == 0):
- (sign ? "-" : "+") "infinity"
-
- SignalingNaN (BIASEDEXP == EXPMAX && FRAC > 0 && FRAC < QUIET_NAN):
- SNaN.FRAC
-
- QuietNaN (BIASEDEXP == EXPMAX && FRAC > 0 && FRAC > QUIET_NAN):
- QNaN.FRAC
-
- */
-
-#define NR_EXPBITS (is_double ? 11 : 8)
-#define NR_FRACBITS (is_double ? 52 : 23)
-#define SIGNBIT (is_double ? MSBIT64 (0) : MSBIT64 (32))
-
-#define EXPMAX32 (255)
-#define EXMPAX64 (2047)
-#define EXPMAX ((unsigned) (is_double ? EXMPAX64 : EXPMAX32))
-
-#define EXPBIAS32 (127)
-#define EXPBIAS64 (1023)
-#define EXPBIAS (is_double ? EXPBIAS64 : EXPBIAS32)
-
-#define QUIET_NAN LSBIT64 (NR_FRACBITS - 1)
-
-
-
-/* An unpacked floating point number.
-
- When unpacked, the fraction of both a 32 and 64 bit floating point
- number is stored using the same format:
-
- 64 bit - <IMPLICIT_1:1><FRACBITS:52><GUARDS:8><PAD:00>
- 32 bit - <IMPLICIT_1:1><FRACBITS:23><GUARDS:7><PAD:30> */
-
-#define NR_PAD32 (30)
-#define NR_PAD64 (0)
-#define NR_PAD (is_double ? NR_PAD64 : NR_PAD32)
-#define PADMASK (is_double ? 0 : LSMASK64 (NR_PAD32 - 1, 0))
-
-#define NR_GUARDS32 (7 + NR_PAD32)
-#define NR_GUARDS64 (8 + NR_PAD64)
-#define NR_GUARDS (is_double ? NR_GUARDS64 : NR_GUARDS32)
-#define GUARDMASK LSMASK64 (NR_GUARDS - 1, 0)
-
-#define GUARDMSB LSBIT64 (NR_GUARDS - 1)
-#define GUARDLSB LSBIT64 (NR_PAD)
-#define GUARDROUND LSMASK64 (NR_GUARDS - 2, 0)
-
-#define NR_FRAC_GUARD (60)
-#define IMPLICIT_1 LSBIT64 (NR_FRAC_GUARD)
-#define IMPLICIT_2 LSBIT64 (NR_FRAC_GUARD + 1)
-#define IMPLICIT_4 LSBIT64 (NR_FRAC_GUARD + 2)
-#define NR_SPARE 2
-
-#define FRAC32MASK LSMASK64 (63, NR_FRAC_GUARD - 32 + 1)
-
-#define NORMAL_EXPMIN (-(EXPBIAS)+1)
-
-#define NORMAL_EXPMAX32 (EXPBIAS32)
-#define NORMAL_EXPMAX64 (EXPBIAS64)
-#define NORMAL_EXPMAX (EXPBIAS)
-
-
-/* Integer constants */
-
-#define MAX_INT32 ((signed64) LSMASK64 (30, 0))
-#define MAX_UINT32 LSMASK64 (31, 0)
-#define MIN_INT32 ((signed64) LSMASK64 (63, 31))
-
-#define MAX_INT64 ((signed64) LSMASK64 (62, 0))
-#define MAX_UINT64 LSMASK64 (63, 0)
-#define MIN_INT64 ((signed64) LSMASK64 (63, 63))
-
-#define MAX_INT (is_64bit ? MAX_INT64 : MAX_INT32)
-#define MIN_INT (is_64bit ? MIN_INT64 : MIN_INT32)
-#define MAX_UINT (is_64bit ? MAX_UINT64 : MAX_UINT32)
-#define NR_INTBITS (is_64bit ? 64 : 32)
-
-/* Squeese an unpacked sim_fpu struct into a 32/64 bit integer */
-STATIC_INLINE_SIM_FPU (unsigned64)
-pack_fpu (const sim_fpu *src,
- int is_double)
-{
- int sign;
- unsigned64 exp;
- unsigned64 fraction;
- unsigned64 packed;
-
- switch (src->class)
- {
- /* create a NaN */
- case sim_fpu_class_qnan:
- sign = src->sign;
- exp = EXPMAX;
- /* force fraction to correct class */
- fraction = src->fraction;
- fraction >>= NR_GUARDS;
- fraction |= QUIET_NAN;
- break;
- case sim_fpu_class_snan:
- sign = src->sign;
- exp = EXPMAX;
- /* force fraction to correct class */
- fraction = src->fraction;
- fraction >>= NR_GUARDS;
- fraction &= ~QUIET_NAN;
- break;
- case sim_fpu_class_infinity:
- sign = src->sign;
- exp = EXPMAX;
- fraction = 0;
- break;
- case sim_fpu_class_zero:
- sign = src->sign;
- exp = 0;
- fraction = 0;
- break;
- case sim_fpu_class_number:
- case sim_fpu_class_denorm:
- ASSERT (src->fraction >= IMPLICIT_1);
- ASSERT (src->fraction < IMPLICIT_2);
- if (src->normal_exp < NORMAL_EXPMIN)
- {
- /* This number's exponent is too low to fit into the bits
- available in the number We'll denormalize the number by
- storing zero in the exponent and shift the fraction to
- the right to make up for it. */
- int nr_shift = NORMAL_EXPMIN - src->normal_exp;
- if (nr_shift > NR_FRACBITS)
- {
- /* underflow, just make the number zero */
- sign = src->sign;
- exp = 0;
- fraction = 0;
- }
- else
- {
- sign = src->sign;
- exp = 0;
- /* Shift by the value */
- fraction = src->fraction;
- fraction >>= NR_GUARDS;
- fraction >>= nr_shift;
- }
- }
- else if (src->normal_exp > NORMAL_EXPMAX)
- {
- /* Infinity */
- sign = src->sign;
- exp = EXPMAX;
- fraction = 0;
- }
- else
- {
- exp = (src->normal_exp + EXPBIAS);
- sign = src->sign;
- fraction = src->fraction;
- /* FIXME: Need to round according to WITH_SIM_FPU_ROUNDING
- or some such */
- /* Round to nearest: If the guard bits are the all zero, but
- the first, then we're half way between two numbers,
- choose the one which makes the lsb of the answer 0. */
- if ((fraction & GUARDMASK) == GUARDMSB)
- {
- if ((fraction & (GUARDMSB << 1)))
- fraction += (GUARDMSB << 1);
- }
- else
- {
- /* Add a one to the guards to force round to nearest */
- fraction += GUARDROUND;
- }
- if ((fraction & IMPLICIT_2)) /* rounding resulted in carry */
- {
- exp += 1;
- fraction >>= 1;
- }
- fraction >>= NR_GUARDS;
- /* When exp == EXPMAX (overflow from carry) fraction must
- have been made zero */
- ASSERT ((exp == EXPMAX) <= ((fraction & ~IMPLICIT_1) == 0));
- }
- break;
- default:
- abort ();
- }
-
- packed = ((sign ? SIGNBIT : 0)
- | (exp << NR_FRACBITS)
- | LSMASKED64 (fraction, NR_FRACBITS - 1, 0));
-
- /* trace operation */
-#if 0
- if (is_double)
- {
- }
- else
- {
- printf ("pack_fpu: ");
- printf ("-> %c%0lX.%06lX\n",
- LSMASKED32 (packed, 31, 31) ? '8' : '0',
- (long) LSEXTRACTED32 (packed, 30, 23),
- (long) LSEXTRACTED32 (packed, 23 - 1, 0));
- }
-#endif
-
- return packed;
-}
-
-
-/* Unpack a 32/64 bit integer into a sim_fpu structure */
-STATIC_INLINE_SIM_FPU (void)
-unpack_fpu (sim_fpu *dst, unsigned64 packed, int is_double)
-{
- unsigned64 fraction = LSMASKED64 (packed, NR_FRACBITS - 1, 0);
- unsigned exp = LSEXTRACTED64 (packed, NR_EXPBITS + NR_FRACBITS - 1, NR_FRACBITS);
- int sign = (packed & SIGNBIT) != 0;
-
- if (exp == 0)
- {
- /* Hmm. Looks like 0 */
- if (fraction == 0)
- {
- /* tastes like zero */
- dst->class = sim_fpu_class_zero;
- dst->sign = sign;
- }
- else
- {
- /* Zero exponent with non zero fraction - it's denormalized,
- so there isn't a leading implicit one - we'll shift it so
- it gets one. */
- dst->normal_exp = exp - EXPBIAS + 1;
- dst->class = sim_fpu_class_denorm;
- dst->sign = sign;
- fraction <<= NR_GUARDS;
- while (fraction < IMPLICIT_1)
- {
- fraction <<= 1;
- dst->normal_exp--;
- }
- dst->fraction = fraction;
- }
- }
- else if (exp == EXPMAX)
- {
- /* Huge exponent*/
- if (fraction == 0)
- {
- /* Attached to a zero fraction - means infinity */
- dst->class = sim_fpu_class_infinity;
- dst->sign = sign;
- /* dst->normal_exp = EXPBIAS; */
- /* dst->fraction = 0; */
- }
- else
- {
- /* Non zero fraction, means NaN */
- dst->sign = sign;
- dst->fraction = (fraction << NR_GUARDS);
- if (fraction >= QUIET_NAN)
- dst->class = sim_fpu_class_qnan;
- else
- dst->class = sim_fpu_class_snan;
- }
- }
- else
- {
- /* Nothing strange about this number */
- dst->class = sim_fpu_class_number;
- dst->sign = sign;
- dst->fraction = ((fraction << NR_GUARDS) | IMPLICIT_1);
- dst->normal_exp = exp - EXPBIAS;
- }
-
- /* trace operation */
-#if 0
- if (is_double)
- {
- }
- else
- {
- printf ("unpack_fpu: %c%02lX.%06lX ->\n",
- LSMASKED32 (packed, 31, 31) ? '8' : '0',
- (long) LSEXTRACTED32 (packed, 30, 23),
- (long) LSEXTRACTED32 (packed, 23 - 1, 0));
- }
-#endif
-
- /* sanity checks */
- {
- sim_fpu_map val;
- val.i = pack_fpu (dst, 1);
- if (is_double)
- {
- ASSERT (val.i == packed);
- }
- else
- {
- unsigned32 val = pack_fpu (dst, 0);
- unsigned32 org = packed;
- ASSERT (val == org);
- }
- }
-}
-
-
-/* Convert a floating point into an integer */
-STATIC_INLINE_SIM_FPU (int)
-fpu2i (signed64 *i,
- const sim_fpu *s,
- int is_64bit,
- sim_fpu_round round)
-{
- unsigned64 tmp;
- int shift;
- int status = 0;
- if (sim_fpu_is_zero (s))
- {
- *i = 0;
- return 0;
- }
- if (sim_fpu_is_snan (s))
- {
- *i = MIN_INT; /* FIXME */
- return sim_fpu_status_invalid_cvi;
- }
- if (sim_fpu_is_qnan (s))
- {
- *i = MIN_INT; /* FIXME */
- return sim_fpu_status_invalid_cvi;
- }
- /* map infinity onto MAX_INT... */
- if (sim_fpu_is_infinity (s))
- {
- *i = s->sign ? MIN_INT : MAX_INT;
- return sim_fpu_status_invalid_cvi;
- }
- /* it is a number, but a small one */
- if (s->normal_exp < 0)
- {
- *i = 0;
- return sim_fpu_status_inexact;
- }
- /* Is the floating point MIN_INT or just close? */
- if (s->sign && s->normal_exp == (NR_INTBITS - 1))
- {
- *i = MIN_INT;
- ASSERT (s->fraction >= IMPLICIT_1);
- if (s->fraction == IMPLICIT_1)
- return 0; /* exact */
- if (is_64bit) /* can't round */
- return sim_fpu_status_invalid_cvi; /* must be overflow */
- /* For a 32bit with MAX_INT, rounding is possible */
- switch (round)
- {
- case sim_fpu_round_default:
- abort ();
- case sim_fpu_round_zero:
- if ((s->fraction & FRAC32MASK) != IMPLICIT_1)
- return sim_fpu_status_invalid_cvi;
- else
- return sim_fpu_status_inexact;
- break;
- case sim_fpu_round_near:
- {
- if ((s->fraction & FRAC32MASK) != IMPLICIT_1)
- return sim_fpu_status_invalid_cvi;
- else if ((s->fraction & !FRAC32MASK) >= (~FRAC32MASK >> 1))
- return sim_fpu_status_invalid_cvi;
- else
- return sim_fpu_status_inexact;
- }
- case sim_fpu_round_up:
- if ((s->fraction & FRAC32MASK) == IMPLICIT_1)
- return sim_fpu_status_inexact;
- else
- return sim_fpu_status_invalid_cvi;
- case sim_fpu_round_down:
- return sim_fpu_status_invalid_cvi;
- }
- }
- /* Would right shifting result in the FRAC being shifted into
- (through) the integer's sign bit? */
- if (s->normal_exp > (NR_INTBITS - 2))
- {
- *i = s->sign ? MIN_INT : MAX_INT;
- return sim_fpu_status_invalid_cvi;
- }
- /* normal number shift it into place */
- tmp = s->fraction;
- shift = (s->normal_exp - (NR_FRAC_GUARD));
- if (shift > 0)
- {
- tmp <<= shift;
- }
- else
- {
- shift = -shift;
- if (tmp & ((SIGNED64 (1) << shift) - 1))
- status |= sim_fpu_status_inexact;
- tmp >>= shift;
- }
- *i = s->sign ? (-tmp) : (tmp);
- return status;
-}
-
-/* convert an integer into a floating point */
-STATIC_INLINE_SIM_FPU (int)
-i2fpu (sim_fpu *f, signed64 i, int is_64bit)
-{
- int status = 0;
- if (i == 0)
- {
- f->class = sim_fpu_class_zero;
- f->sign = 0;
- }
- else
- {
- f->class = sim_fpu_class_number;
- f->sign = (i < 0);
- f->normal_exp = NR_FRAC_GUARD;
-
- if (f->sign)
- {
- /* Special case for minint, since there is no corresponding
- +ve integer representation for it */
- if (i == MIN_INT)
- {
- f->fraction = IMPLICIT_1;
- f->normal_exp = NR_INTBITS - 1;
- }
- else
- f->fraction = (-i);
- }
- else
- f->fraction = i;
-
- if (f->fraction >= IMPLICIT_2)
- {
- do
- {
- f->fraction = (f->fraction >> 1) | (f->fraction & 1);
- f->normal_exp += 1;
- }
- while (f->fraction >= IMPLICIT_2);
- }
- else if (f->fraction < IMPLICIT_1)
- {
- do
- {
- f->fraction <<= 1;
- f->normal_exp -= 1;
- }
- while (f->fraction < IMPLICIT_1);
- }
- }
-
- /* trace operation */
-#if 0
- {
- printf ("i2fpu: 0x%08lX ->\n", (long) i);
- }
-#endif
-
- /* sanity check */
- {
- signed64 val;
- fpu2i (&val, f, is_64bit, sim_fpu_round_zero);
- if (i >= MIN_INT32 && i <= MAX_INT32)
- {
- ASSERT (val == i);
- }
- }
-
- return status;
-}
-
-
-/* Convert a floating point into an integer */
-STATIC_INLINE_SIM_FPU (int)
-fpu2u (unsigned64 *u, const sim_fpu *s, int is_64bit)
-{
- const int is_double = 1;
- unsigned64 tmp;
- int shift;
- if (sim_fpu_is_zero (s))
- {
- *u = 0;
- return 0;
- }
- if (sim_fpu_is_nan (s))
- {
- *u = 0;
- return 0;
- }
- /* it is a negative number */
- if (s->sign)
- {
- *u = 0;
- return 0;
- }
- /* get reasonable MAX_USI_INT... */
- if (sim_fpu_is_infinity (s))
- {
- *u = MAX_UINT;
- return 0;
- }
- /* it is a number, but a small one */
- if (s->normal_exp < 0)
- {
- *u = 0;
- return 0;
- }
- /* overflow */
- if (s->normal_exp > (NR_INTBITS - 1))
- {
- *u = MAX_UINT;
- return 0;
- }
- /* normal number */
- tmp = (s->fraction & ~PADMASK);
- shift = (s->normal_exp - (NR_FRACBITS + NR_GUARDS));
- if (shift > 0)
- {
- tmp <<= shift;
- }
- else
- {
- shift = -shift;
- tmp >>= shift;
- }
- *u = tmp;
- return 0;
-}
-
-/* Convert an unsigned integer into a floating point */
-STATIC_INLINE_SIM_FPU (int)
-u2fpu (sim_fpu *f, unsigned64 u, int is_64bit)
-{
- if (u == 0)
- {
- f->class = sim_fpu_class_zero;
- f->sign = 0;
- }
- else
- {
- f->class = sim_fpu_class_number;
- f->sign = 0;
- f->normal_exp = NR_FRAC_GUARD;
- f->fraction = u;
-
- while (f->fraction < IMPLICIT_1)
- {
- f->fraction <<= 1;
- f->normal_exp -= 1;
- }
- }
- return 0;
-}
-
-
-/* register <-> sim_fpu */
-
-INLINE_SIM_FPU (void)
-sim_fpu_32to (sim_fpu *f, unsigned32 s)
-{
- unpack_fpu (f, s, 0);
-}
-
-
-INLINE_SIM_FPU (void)
-sim_fpu_232to (sim_fpu *f, unsigned32 h, unsigned32 l)
-{
- unsigned64 s = h;
- s = (s << 32) | l;
- unpack_fpu (f, s, 1);
-}
-
-
-INLINE_SIM_FPU (void)
-sim_fpu_64to (sim_fpu *f, unsigned64 s)
-{
- unpack_fpu (f, s, 1);
-}
-
-
-INLINE_SIM_FPU (void)
-sim_fpu_to32 (unsigned32 *s,
- const sim_fpu *f)
-{
- *s = pack_fpu (f, 0);
-}
-
-
-INLINE_SIM_FPU (void)
-sim_fpu_to232 (unsigned32 *h, unsigned32 *l,
- const sim_fpu *f)
-{
- unsigned64 s = pack_fpu (f, 1);
- *l = s;
- *h = (s >> 32);
-}
-
-
-INLINE_SIM_FPU (void)
-sim_fpu_to64 (unsigned64 *u,
- const sim_fpu *f)
-{
- *u = pack_fpu (f, 1);
-}
-
-
-INLINE_SIM_FPU (void)
-sim_fpu_fractionto (sim_fpu *f,
- int sign,
- int normal_exp,
- unsigned64 fraction,
- int precision)
-{
- int shift = (NR_FRAC_GUARD - precision);
- f->class = sim_fpu_class_number;
- f->sign = sign;
- f->normal_exp = normal_exp;
- /* shift the fraction to where sim-fpu expects it */
- if (shift >= 0)
- f->fraction = (fraction << shift);
- else
- f->fraction = (fraction >> -shift);
- f->fraction |= IMPLICIT_1;
-}
-
-
-INLINE_SIM_FPU (unsigned64)
-sim_fpu_tofraction (const sim_fpu *d,
- int precision)
-{
- /* we have NR_FRAC_GUARD bits, we want only PRECISION bits */
- int shift = (NR_FRAC_GUARD - precision);
- unsigned64 fraction = (d->fraction & ~IMPLICIT_1);
- if (shift >= 0)
- return fraction >> shift;
- else
- return fraction << -shift;
-}
-
-
-/* Rounding */
-
-STATIC_INLINE_SIM_FPU (int)
-do_normal_overflow (sim_fpu *f,
- int is_double,
- sim_fpu_round round)
-{
- switch (round)
- {
- case sim_fpu_round_default:
- return 0;
- case sim_fpu_round_near:
- f->class = sim_fpu_class_infinity;
- break;
- case sim_fpu_round_up:
- if (!f->sign)
- f->class = sim_fpu_class_infinity;
- break;
- case sim_fpu_round_down:
- if (f->sign)
- f->class = sim_fpu_class_infinity;
- break;
- case sim_fpu_round_zero:
- break;
- }
- f->normal_exp = NORMAL_EXPMAX;
- f->fraction = LSMASK64 (NR_FRAC_GUARD, NR_GUARDS);
- return (sim_fpu_status_overflow | sim_fpu_status_inexact);
-}
-
-STATIC_INLINE_SIM_FPU (int)
-do_normal_underflow (sim_fpu *f,
- int is_double,
- sim_fpu_round round)
-{
- switch (round)
- {
- case sim_fpu_round_default:
- return 0;
- case sim_fpu_round_near:
- f->class = sim_fpu_class_zero;
- break;
- case sim_fpu_round_up:
- if (f->sign)
- f->class = sim_fpu_class_zero;
- break;
- case sim_fpu_round_down:
- if (!f->sign)
- f->class = sim_fpu_class_zero;
- break;
- case sim_fpu_round_zero:
- f->class = sim_fpu_class_zero;
- break;
- }
- f->normal_exp = NORMAL_EXPMIN - NR_FRACBITS;
- f->fraction = IMPLICIT_1;
- return (sim_fpu_status_inexact | sim_fpu_status_underflow);
-}
-
-
-
-/* Round a number using NR_GUARDS.
- Will return the rounded number or F->FRACTION == 0 when underflow */
-
-STATIC_INLINE_SIM_FPU (int)
-do_normal_round (sim_fpu *f,
- int nr_guards,
- sim_fpu_round round)
-{
- unsigned64 guardmask = LSMASK64 (nr_guards - 1, 0);
- unsigned64 guardmsb = LSBIT64 (nr_guards - 1);
- unsigned64 fraclsb = guardmsb << 1;
- if ((f->fraction & guardmask))
- {
- int status = sim_fpu_status_inexact;
- switch (round)
- {
- case sim_fpu_round_default:
- return 0;
- case sim_fpu_round_near:
- if ((f->fraction & guardmsb))
- {
- if ((f->fraction & fraclsb))
- {
- status |= sim_fpu_status_rounded;
- }
- else if ((f->fraction & (guardmask >> 1)))
- {
- status |= sim_fpu_status_rounded;
- }
- }
- break;
- case sim_fpu_round_up:
- if (!f->sign)
- status |= sim_fpu_status_rounded;
- break;
- case sim_fpu_round_down:
- if (f->sign)
- status |= sim_fpu_status_rounded;
- break;
- case sim_fpu_round_zero:
- break;
- }
- f->fraction &= ~guardmask;
- /* round if needed, handle resulting overflow */
- if ((status & sim_fpu_status_rounded))
- {
- f->fraction += fraclsb;
- if ((f->fraction & IMPLICIT_2))
- {
- f->fraction >>= 1;
- f->normal_exp += 1;
- }
- }
- return status;
- }
- else
- return 0;
-}
-
-
-STATIC_INLINE_SIM_FPU (int)
-do_round (sim_fpu *f,
- int is_double,
- sim_fpu_round round,
- sim_fpu_denorm denorm)
-{
- switch (f->class)
- {
- case sim_fpu_class_qnan:
- case sim_fpu_class_zero:
- case sim_fpu_class_infinity:
- return 0;
- break;
- case sim_fpu_class_snan:
- /* Quieten a SignalingNaN */
- f->class = sim_fpu_class_qnan;
- return sim_fpu_status_invalid_snan;
- break;
- case sim_fpu_class_number:
- case sim_fpu_class_denorm:
- {
- int status;
- ASSERT (f->fraction < IMPLICIT_2);
- ASSERT (f->fraction >= IMPLICIT_1);
- if (f->normal_exp < NORMAL_EXPMIN)
- {
- /* This number's exponent is too low to fit into the bits
- available in the number. Round off any bits that will be
- discarded as a result of denormalization. Edge case is
- the implicit bit shifted to GUARD0 and then rounded
- up. */
- int shift = NORMAL_EXPMIN - f->normal_exp;
- if (shift + NR_GUARDS <= NR_FRAC_GUARD + 1
- && !(denorm & sim_fpu_denorm_zero))
- {
- status = do_normal_round (f, shift + NR_GUARDS, round);
- if (f->fraction == 0) /* rounding underflowed */
- {
- status |= do_normal_underflow (f, is_double, round);
- }
- else if (f->normal_exp < NORMAL_EXPMIN) /* still underflow? */
- {
- status |= sim_fpu_status_denorm;
- /* Any loss of precision when denormalizing is
- underflow. Some processors check for underflow
- before rounding, some after! */
- if (status & sim_fpu_status_inexact)
- status |= sim_fpu_status_underflow;
- /* Flag that resultant value has been denormalized */
- f->class = sim_fpu_class_denorm;
- }
- else if ((denorm & sim_fpu_denorm_underflow_inexact))
- {
- if ((status & sim_fpu_status_inexact))
- status |= sim_fpu_status_underflow;
- }
- }
- else
- {
- status = do_normal_underflow (f, is_double, round);
- }
- }
- else if (f->normal_exp > NORMAL_EXPMAX)
- {
- /* Infinity */
- status = do_normal_overflow (f, is_double, round);
- }
- else
- {
- status = do_normal_round (f, NR_GUARDS, round);
- if (f->fraction == 0)
- /* f->class = sim_fpu_class_zero; */
- status |= do_normal_underflow (f, is_double, round);
- else if (f->normal_exp > NORMAL_EXPMAX)
- /* oops! rounding caused overflow */
- status |= do_normal_overflow (f, is_double, round);
- }
- ASSERT ((f->class == sim_fpu_class_number
- || f->class == sim_fpu_class_denorm)
- <= (f->fraction < IMPLICIT_2 && f->fraction >= IMPLICIT_1));
- return status;
- }
- }
- return 0;
-}
-
-INLINE_SIM_FPU (int)
-sim_fpu_round_32 (sim_fpu *f,
- sim_fpu_round round,
- sim_fpu_denorm denorm)
-{
- return do_round (f, 0, round, denorm);
-}
-
-INLINE_SIM_FPU (int)
-sim_fpu_round_64 (sim_fpu *f,
- sim_fpu_round round,
- sim_fpu_denorm denorm)
-{
- return do_round (f, 1, round, denorm);
-}
-
-
-
-/* Arithmetic ops */
-
-INLINE_SIM_FPU (int)
-sim_fpu_add (sim_fpu *f,
- const sim_fpu *l,
- const sim_fpu *r)
-{
- if (sim_fpu_is_snan (l))
- {
- *f = *l;
- f->class = sim_fpu_class_qnan;
- return sim_fpu_status_invalid_snan;
- }
- if (sim_fpu_is_snan (r))
- {
- *f = *r;
- f->class = sim_fpu_class_qnan;
- return sim_fpu_status_invalid_snan;
- }
- if (sim_fpu_is_qnan (l))
- {
- *f = *l;
- return 0;
- }
- if (sim_fpu_is_qnan (r))
- {
- *f = *r;
- return 0;
- }
- if (sim_fpu_is_infinity (l))
- {
- if (sim_fpu_is_infinity (r)
- && l->sign != r->sign)
- {
- *f = sim_fpu_qnan;
- return sim_fpu_status_invalid_isi;
- }
- *f = *l;
- return 0;
- }
- if (sim_fpu_is_infinity (r))
- {
- *f = *r;
- return 0;
- }
- if (sim_fpu_is_zero (l))
- {
- if (sim_fpu_is_zero (r))
- {
- *f = sim_fpu_zero;
- f->sign = l->sign & r->sign;
- }
- else
- *f = *r;
- return 0;
- }
- if (sim_fpu_is_zero (r))
- {
- *f = *l;
- return 0;
- }
- {
- int status = 0;
- int shift = l->normal_exp - r->normal_exp;
- unsigned64 lfraction;
- unsigned64 rfraction;
- /* use exp of larger */
- if (shift >= NR_FRAC_GUARD)
- {
- /* left has much bigger magnitute */
- *f = *l;
- return sim_fpu_status_inexact;
- }
- if (shift <= - NR_FRAC_GUARD)
- {
- /* right has much bigger magnitute */
- *f = *r;
- return sim_fpu_status_inexact;
- }
- lfraction = l->fraction;
- rfraction = r->fraction;
- if (shift > 0)
- {
- f->normal_exp = l->normal_exp;
- if (rfraction & LSMASK64 (shift - 1, 0))
- {
- status |= sim_fpu_status_inexact;
- rfraction |= LSBIT64 (shift); /* stick LSBit */
- }
- rfraction >>= shift;
- }
- else if (shift < 0)
- {
- f->normal_exp = r->normal_exp;
- if (lfraction & LSMASK64 (- shift - 1, 0))
- {
- status |= sim_fpu_status_inexact;
- lfraction |= LSBIT64 (- shift); /* stick LSBit */
- }
- lfraction >>= -shift;
- }
- else
- {
- f->normal_exp = r->normal_exp;
- }
-
- /* perform the addition */
- if (l->sign)
- lfraction = - lfraction;
- if (r->sign)
- rfraction = - rfraction;
- f->fraction = lfraction + rfraction;
-
- /* zero? */
- if (f->fraction == 0)
- {
- *f = sim_fpu_zero;
- return 0;
- }
-
- /* sign? */
- f->class = sim_fpu_class_number;
- if ((signed64) f->fraction >= 0)
- f->sign = 0;
- else
- {
- f->sign = 1;
- f->fraction = - f->fraction;
- }
-
- /* normalize it */
- if ((f->fraction & IMPLICIT_2))
- {
- f->fraction = (f->fraction >> 1) | (f->fraction & 1);
- f->normal_exp ++;
- }
- else if (f->fraction < IMPLICIT_1)
- {
- do
- {
- f->fraction <<= 1;
- f->normal_exp --;
- }
- while (f->fraction < IMPLICIT_1);
- }
- ASSERT (f->fraction >= IMPLICIT_1 && f->fraction < IMPLICIT_2);
- return status;
- }
-}
-
-
-INLINE_SIM_FPU (int)
-sim_fpu_sub (sim_fpu *f,
- const sim_fpu *l,
- const sim_fpu *r)
-{
- if (sim_fpu_is_snan (l))
- {
- *f = *l;
- f->class = sim_fpu_class_qnan;
- return sim_fpu_status_invalid_snan;
- }
- if (sim_fpu_is_snan (r))
- {
- *f = *r;
- f->class = sim_fpu_class_qnan;
- return sim_fpu_status_invalid_snan;
- }
- if (sim_fpu_is_qnan (l))
- {
- *f = *l;
- return 0;
- }
- if (sim_fpu_is_qnan (r))
- {
- *f = *r;
- return 0;
- }
- if (sim_fpu_is_infinity (l))
- {
- if (sim_fpu_is_infinity (r)
- && l->sign == r->sign)
- {
- *f = sim_fpu_qnan;
- return sim_fpu_status_invalid_isi;
- }
- *f = *l;
- return 0;
- }
- if (sim_fpu_is_infinity (r))
- {
- *f = *r;
- f->sign = !r->sign;
- return 0;
- }
- if (sim_fpu_is_zero (l))
- {
- if (sim_fpu_is_zero (r))
- {
- *f = sim_fpu_zero;
- f->sign = l->sign & !r->sign;
- }
- else
- {
- *f = *r;
- f->sign = !r->sign;
- }
- return 0;
- }
- if (sim_fpu_is_zero (r))
- {
- *f = *l;
- return 0;
- }
- {
- int status = 0;
- int shift = l->normal_exp - r->normal_exp;
- unsigned64 lfraction;
- unsigned64 rfraction;
- /* use exp of larger */
- if (shift >= NR_FRAC_GUARD)
- {
- /* left has much bigger magnitute */
- *f = *l;
- return sim_fpu_status_inexact;
- }
- if (shift <= - NR_FRAC_GUARD)
- {
- /* right has much bigger magnitute */
- *f = *r;
- f->sign = !r->sign;
- return sim_fpu_status_inexact;
- }
- lfraction = l->fraction;
- rfraction = r->fraction;
- if (shift > 0)
- {
- f->normal_exp = l->normal_exp;
- if (rfraction & LSMASK64 (shift - 1, 0))
- {
- status |= sim_fpu_status_inexact;
- rfraction |= LSBIT64 (shift); /* stick LSBit */
- }
- rfraction >>= shift;
- }
- else if (shift < 0)
- {
- f->normal_exp = r->normal_exp;
- if (lfraction & LSMASK64 (- shift - 1, 0))
- {
- status |= sim_fpu_status_inexact;
- lfraction |= LSBIT64 (- shift); /* stick LSBit */
- }
- lfraction >>= -shift;
- }
- else
- {
- f->normal_exp = r->normal_exp;
- }
-
- /* perform the subtraction */
- if (l->sign)
- lfraction = - lfraction;
- if (!r->sign)
- rfraction = - rfraction;
- f->fraction = lfraction + rfraction;
-
- /* zero? */
- if (f->fraction == 0)
- {
- *f = sim_fpu_zero;
- return 0;
- }
-
- /* sign? */
- f->class = sim_fpu_class_number;
- if ((signed64) f->fraction >= 0)
- f->sign = 0;
- else
- {
- f->sign = 1;
- f->fraction = - f->fraction;
- }
-
- /* normalize it */
- if ((f->fraction & IMPLICIT_2))
- {
- f->fraction = (f->fraction >> 1) | (f->fraction & 1);
- f->normal_exp ++;
- }
- else if (f->fraction < IMPLICIT_1)
- {
- do
- {
- f->fraction <<= 1;
- f->normal_exp --;
- }
- while (f->fraction < IMPLICIT_1);
- }
- ASSERT (f->fraction >= IMPLICIT_1 && f->fraction < IMPLICIT_2);
- return status;
- }
-}
-
-
-INLINE_SIM_FPU (int)
-sim_fpu_mul (sim_fpu *f,
- const sim_fpu *l,
- const sim_fpu *r)
-{
- if (sim_fpu_is_snan (l))
- {
- *f = *l;
- f->class = sim_fpu_class_qnan;
- return sim_fpu_status_invalid_snan;
- }
- if (sim_fpu_is_snan (r))
- {
- *f = *r;
- f->class = sim_fpu_class_qnan;
- return sim_fpu_status_invalid_snan;
- }
- if (sim_fpu_is_qnan (l))
- {
- *f = *l;
- return 0;
- }
- if (sim_fpu_is_qnan (r))
- {
- *f = *r;
- return 0;
- }
- if (sim_fpu_is_infinity (l))
- {
- if (sim_fpu_is_zero (r))
- {
- *f = sim_fpu_qnan;
- return sim_fpu_status_invalid_imz;
- }
- *f = *l;
- f->sign = l->sign ^ r->sign;
- return 0;
- }
- if (sim_fpu_is_infinity (r))
- {
- if (sim_fpu_is_zero (l))
- {
- *f = sim_fpu_qnan;
- return sim_fpu_status_invalid_imz;
- }
- *f = *r;
- f->sign = l->sign ^ r->sign;
- return 0;
- }
- if (sim_fpu_is_zero (l) || sim_fpu_is_zero (r))
- {
- *f = sim_fpu_zero;
- f->sign = l->sign ^ r->sign;
- return 0;
- }
- /* Calculate the mantissa by multiplying both 64bit numbers to get a
- 128 bit number */
- {
- unsigned64 low;
- unsigned64 high;
- unsigned64 nl = l->fraction & 0xffffffff;
- unsigned64 nh = l->fraction >> 32;
- unsigned64 ml = r->fraction & 0xffffffff;
- unsigned64 mh = r->fraction >>32;
- unsigned64 pp_ll = ml * nl;
- unsigned64 pp_hl = mh * nl;
- unsigned64 pp_lh = ml * nh;
- unsigned64 pp_hh = mh * nh;
- unsigned64 res2 = 0;
- unsigned64 res0 = 0;
- unsigned64 ps_hh__ = pp_hl + pp_lh;
- if (ps_hh__ < pp_hl)
- res2 += UNSIGNED64 (0x100000000);
- pp_hl = (ps_hh__ << 32) & UNSIGNED64 (0xffffffff00000000);
- res0 = pp_ll + pp_hl;
- if (res0 < pp_ll)
- res2++;
- res2 += ((ps_hh__ >> 32) & 0xffffffff) + pp_hh;
- high = res2;
- low = res0;
-
- f->normal_exp = l->normal_exp + r->normal_exp;
- f->sign = l->sign ^ r->sign;
- f->class = sim_fpu_class_number;
-
- /* Input is bounded by [1,2) ; [2^60,2^61)
- Output is bounded by [1,4) ; [2^120,2^122) */
-
- /* Adjust the exponent according to where the decimal point ended
- up in the high 64 bit word. In the source the decimal point
- was at NR_FRAC_GUARD. */
- f->normal_exp += NR_FRAC_GUARD + 64 - (NR_FRAC_GUARD * 2);
-
- /* The high word is bounded according to the above. Consequently
- it has never overflowed into IMPLICIT_2. */
- ASSERT (high < LSBIT64 (((NR_FRAC_GUARD + 1) * 2) - 64));
- ASSERT (high >= LSBIT64 ((NR_FRAC_GUARD * 2) - 64));
- ASSERT (LSBIT64 (((NR_FRAC_GUARD + 1) * 2) - 64) < IMPLICIT_1);
-
- /* normalize */
- do
- {
- f->normal_exp--;
- high <<= 1;
- if (low & LSBIT64 (63))
- high |= 1;
- low <<= 1;
- }
- while (high < IMPLICIT_1);
-
- ASSERT (high >= IMPLICIT_1 && high < IMPLICIT_2);
- if (low != 0)
- {
- f->fraction = (high | 1); /* sticky */
- return sim_fpu_status_inexact;
- }
- else
- {
- f->fraction = high;
- return 0;
- }
- return 0;
- }
-}
-
-INLINE_SIM_FPU (int)
-sim_fpu_div (sim_fpu *f,
- const sim_fpu *l,
- const sim_fpu *r)
-{
- if (sim_fpu_is_snan (l))
- {
- *f = *l;
- f->class = sim_fpu_class_qnan;
- return sim_fpu_status_invalid_snan;
- }
- if (sim_fpu_is_snan (r))
- {
- *f = *r;
- f->class = sim_fpu_class_qnan;
- return sim_fpu_status_invalid_snan;
- }
- if (sim_fpu_is_qnan (l))
- {
- *f = *l;
- f->class = sim_fpu_class_qnan;
- return 0;
- }
- if (sim_fpu_is_qnan (r))
- {
- *f = *r;
- f->class = sim_fpu_class_qnan;
- return 0;
- }
- if (sim_fpu_is_infinity (l))
- {
- if (sim_fpu_is_infinity (r))
- {
- *f = sim_fpu_qnan;
- return sim_fpu_status_invalid_idi;
- }
- else
- {
- *f = *l;
- f->sign = l->sign ^ r->sign;
- return 0;
- }
- }
- if (sim_fpu_is_zero (l))
- {
- if (sim_fpu_is_zero (r))
- {
- *f = sim_fpu_qnan;
- return sim_fpu_status_invalid_zdz;
- }
- else
- {
- *f = *l;
- f->sign = l->sign ^ r->sign;
- return 0;
- }
- }
- if (sim_fpu_is_infinity (r))
- {
- *f = sim_fpu_zero;
- f->sign = l->sign ^ r->sign;
- return 0;
- }
- if (sim_fpu_is_zero (r))
- {
- f->class = sim_fpu_class_infinity;
- f->sign = l->sign ^ r->sign;
- return sim_fpu_status_invalid_div0;
- }
-
- /* Calculate the mantissa by multiplying both 64bit numbers to get a
- 128 bit number */
- {
- /* quotient = ( ( numerator / denominator)
- x 2^(numerator exponent - denominator exponent)
- */
- unsigned64 numerator;
- unsigned64 denominator;
- unsigned64 quotient;
- unsigned64 bit;
-
- f->class = sim_fpu_class_number;
- f->sign = l->sign ^ r->sign;
- f->normal_exp = l->normal_exp - r->normal_exp;
-
- numerator = l->fraction;
- denominator = r->fraction;
-
- /* Fraction will be less than 1.0 */
- if (numerator < denominator)
- {
- numerator <<= 1;
- f->normal_exp--;
- }
- ASSERT (numerator >= denominator);
-
- /* Gain extra precision, already used one spare bit */
- numerator <<= NR_SPARE;
- denominator <<= NR_SPARE;
-
- /* Does divide one bit at a time. Optimize??? */
- quotient = 0;
- bit = (IMPLICIT_1 << NR_SPARE);
- while (bit)
- {
- if (numerator >= denominator)
- {
- quotient |= bit;
- numerator -= denominator;
- }
- bit >>= 1;
- numerator <<= 1;
- }
-
- /* discard (but save) the extra bits */
- if ((quotient & LSMASK64 (NR_SPARE -1, 0)))
- quotient = (quotient >> NR_SPARE) | 1;
- else
- quotient = (quotient >> NR_SPARE);
-
- f->fraction = quotient;
- ASSERT (f->fraction >= IMPLICIT_1 && f->fraction < IMPLICIT_2);
- if (numerator != 0)
- {
- f->fraction |= 1; /* stick remaining bits */
- return sim_fpu_status_inexact;
- }
- else
- return 0;
- }
-}
-
-
-INLINE_SIM_FPU (int)
-sim_fpu_max (sim_fpu *f,
- const sim_fpu *l,
- const sim_fpu *r)
-{
- if (sim_fpu_is_snan (l))
- {
- *f = *l;
- f->class = sim_fpu_class_qnan;
- return sim_fpu_status_invalid_snan;
- }
- if (sim_fpu_is_snan (r))
- {
- *f = *r;
- f->class = sim_fpu_class_qnan;
- return sim_fpu_status_invalid_snan;
- }
- if (sim_fpu_is_qnan (l))
- {
- *f = *l;
- return 0;
- }
- if (sim_fpu_is_qnan (r))
- {
- *f = *r;
- return 0;
- }
- if (sim_fpu_is_infinity (l))
- {
- if (sim_fpu_is_infinity (r)
- && l->sign == r->sign)
- {
- *f = sim_fpu_qnan;
- return sim_fpu_status_invalid_isi;
- }
- if (l->sign)
- *f = *r; /* -inf < anything */
- else
- *f = *l; /* +inf > anthing */
- return 0;
- }
- if (sim_fpu_is_infinity (r))
- {
- if (r->sign)
- *f = *l; /* anything > -inf */
- else
- *f = *r; /* anthing < +inf */
- return 0;
- }
- if (l->sign > r->sign)
- {
- *f = *r; /* -ve < +ve */
- return 0;
- }
- if (l->sign < r->sign)
- {
- *f = *l; /* +ve > -ve */
- return 0;
- }
- ASSERT (l->sign == r->sign);
- if (l->normal_exp > r->normal_exp
- || (l->normal_exp == r->normal_exp &&
- l->fraction > r->fraction))
- {
- /* |l| > |r| */
- if (l->sign)
- *f = *r; /* -ve < -ve */
- else
- *f = *l; /* +ve > +ve */
- return 0;
- }
- else
- {
- /* |l| <= |r| */
- if (l->sign)
- *f = *l; /* -ve > -ve */
- else
- *f = *r; /* +ve < +ve */
- return 0;
- }
-}
-
-
-INLINE_SIM_FPU (int)
-sim_fpu_min (sim_fpu *f,
- const sim_fpu *l,
- const sim_fpu *r)
-{
- if (sim_fpu_is_snan (l))
- {
- *f = *l;
- f->class = sim_fpu_class_qnan;
- return sim_fpu_status_invalid_snan;
- }
- if (sim_fpu_is_snan (r))
- {
- *f = *r;
- f->class = sim_fpu_class_qnan;
- return sim_fpu_status_invalid_snan;
- }
- if (sim_fpu_is_qnan (l))
- {
- *f = *l;
- return 0;
- }
- if (sim_fpu_is_qnan (r))
- {
- *f = *r;
- return 0;
- }
- if (sim_fpu_is_infinity (l))
- {
- if (sim_fpu_is_infinity (r)
- && l->sign == r->sign)
- {
- *f = sim_fpu_qnan;
- return sim_fpu_status_invalid_isi;
- }
- if (l->sign)
- *f = *l; /* -inf < anything */
- else
- *f = *r; /* +inf > anthing */
- return 0;
- }
- if (sim_fpu_is_infinity (r))
- {
- if (r->sign)
- *f = *r; /* anything > -inf */
- else
- *f = *l; /* anything < +inf */
- return 0;
- }
- if (l->sign > r->sign)
- {
- *f = *l; /* -ve < +ve */
- return 0;
- }
- if (l->sign < r->sign)
- {
- *f = *r; /* +ve > -ve */
- return 0;
- }
- ASSERT (l->sign == r->sign);
- if (l->normal_exp > r->normal_exp
- || (l->normal_exp == r->normal_exp &&
- l->fraction > r->fraction))
- {
- /* |l| > |r| */
- if (l->sign)
- *f = *l; /* -ve < -ve */
- else
- *f = *r; /* +ve > +ve */
- return 0;
- }
- else
- {
- /* |l| <= |r| */
- if (l->sign)
- *f = *r; /* -ve > -ve */
- else
- *f = *l; /* +ve < +ve */
- return 0;
- }
-}
-
-
-INLINE_SIM_FPU (int)
-sim_fpu_neg (sim_fpu *f,
- const sim_fpu *r)
-{
- if (sim_fpu_is_snan (r))
- {
- *f = *r;
- f->class = sim_fpu_class_qnan;
- return sim_fpu_status_invalid_snan;
- }
- if (sim_fpu_is_qnan (r))
- {
- *f = *r;
- return 0;
- }
- *f = *r;
- f->sign = !r->sign;
- return 0;
-}
-
-
-INLINE_SIM_FPU (int)
-sim_fpu_abs (sim_fpu *f,
- const sim_fpu *r)
-{
- if (sim_fpu_is_snan (r))
- {
- *f = *r;
- f->class = sim_fpu_class_qnan;
- return sim_fpu_status_invalid_snan;
- }
- if (sim_fpu_is_qnan (r))
- {
- *f = *r;
- return 0;
- }
- *f = *r;
- f->sign = 0;
- return 0;
-}
-
-
-INLINE_SIM_FPU (int)
-sim_fpu_inv (sim_fpu *f,
- const sim_fpu *r)
-{
- if (sim_fpu_is_snan (r))
- {
- *f = *r;
- f->class = sim_fpu_class_qnan;
- return sim_fpu_status_invalid_snan;
- }
- if (sim_fpu_is_qnan (r))
- {
- *f = *r;
- f->class = sim_fpu_class_qnan;
- return 0;
- }
- if (sim_fpu_is_infinity (r))
- {
- *f = sim_fpu_zero;
- f->sign = r->sign;
- return 0;
- }
- if (sim_fpu_is_zero (r))
- {
- f->class = sim_fpu_class_infinity;
- f->sign = r->sign;
- return sim_fpu_status_invalid_div0;
- }
- *f = *r;
- f->normal_exp = - r->normal_exp;
- return 0;
-}
-
-
-INLINE_SIM_FPU (int)
-sim_fpu_sqrt (sim_fpu *f,
- const sim_fpu *r)
-{
- if (sim_fpu_is_snan (r))
- {
- *f = sim_fpu_qnan;
- return sim_fpu_status_invalid_snan;
- }
- if (sim_fpu_is_qnan (r))
- {
- *f = sim_fpu_qnan;
- return 0;
- }
- if (sim_fpu_is_zero (r))
- {
- f->class = sim_fpu_class_zero;
- f->sign = r->sign;
- return 0;
- }
- if (sim_fpu_is_infinity (r))
- {
- if (r->sign)
- {
- *f = sim_fpu_qnan;
- return sim_fpu_status_invalid_sqrt;
- }
- else
- {
- f->class = sim_fpu_class_infinity;
- f->sign = 0;
- f->sign = 0;
- return 0;
- }
- }
- if (r->sign)
- {
- *f = sim_fpu_qnan;
- return sim_fpu_status_invalid_sqrt;
- }
-
- /* @(#)e_sqrt.c 5.1 93/09/24 */
- /*
- * ====================================================
- * Copyright (C) 1993 by Sun Microsystems, Inc. All rights reserved.
- *
- * Developed at SunPro, a Sun Microsystems, Inc. business.
- * Permission to use, copy, modify, and distribute this
- * software is freely granted, provided that this notice
- * is preserved.
- * ====================================================
- */
-
- /* __ieee754_sqrt(x)
- * Return correctly rounded sqrt.
- * ------------------------------------------
- * | Use the hardware sqrt if you have one |
- * ------------------------------------------
- * Method:
- * Bit by bit method using integer arithmetic. (Slow, but portable)
- * 1. Normalization
- * Scale x to y in [1,4) with even powers of 2:
- * find an integer k such that 1 <= (y=x*2^(2k)) < 4, then
- * sqrt(x) = 2^k * sqrt(y)
- -
- - Since:
- - sqrt ( x*2^(2m) ) = sqrt(x).2^m ; m even
- - sqrt ( x*2^(2m + 1) ) = sqrt(2.x).2^m ; m odd
- - Define:
- - y = ((m even) ? x : 2.x)
- - Then:
- - y in [1, 4) ; [IMPLICIT_1,IMPLICIT_4)
- - And:
- - sqrt (y) in [1, 2) ; [IMPLICIT_1,IMPLICIT_2)
- -
- * 2. Bit by bit computation
- * Let q = sqrt(y) truncated to i bit after binary point (q = 1),
- * i 0
- * i+1 2
- * s = 2*q , and y = 2 * ( y - q ). (1)
- * i i i i
- *
- * To compute q from q , one checks whether
- * i+1 i
- *
- * -(i+1) 2
- * (q + 2 ) <= y. (2)
- * i
- * -(i+1)
- * If (2) is false, then q = q ; otherwise q = q + 2 .
- * i+1 i i+1 i
- *
- * With some algebric manipulation, it is not difficult to see
- * that (2) is equivalent to
- * -(i+1)
- * s + 2 <= y (3)
- * i i
- *
- * The advantage of (3) is that s and y can be computed by
- * i i
- * the following recurrence formula:
- * if (3) is false
- *
- * s = s , y = y ; (4)
- * i+1 i i+1 i
- *
- -
- - NOTE: y = 2*y
- - i+1 i
- -
- * otherwise,
- * -i -(i+1)
- * s = s + 2 , y = y - s - 2 (5)
- * i+1 i i+1 i i
- *
- -
- - -(i+1)
- - NOTE: y = 2 (y - s - 2 )
- - i+1 i i
- -
- * One may easily use induction to prove (4) and (5).
- * Note. Since the left hand side of (3) contain only i+2 bits,
- * it does not necessary to do a full (53-bit) comparison
- * in (3).
- * 3. Final rounding
- * After generating the 53 bits result, we compute one more bit.
- * Together with the remainder, we can decide whether the
- * result is exact, bigger than 1/2ulp, or less than 1/2ulp
- * (it will never equal to 1/2ulp).
- * The rounding mode can be detected by checking whether
- * huge + tiny is equal to huge, and whether huge - tiny is
- * equal to huge for some floating point number "huge" and "tiny".
- *
- * Special cases:
- * sqrt(+-0) = +-0 ... exact
- * sqrt(inf) = inf
- * sqrt(-ve) = NaN ... with invalid signal
- * sqrt(NaN) = NaN ... with invalid signal for signaling NaN
- *
- * Other methods : see the appended file at the end of the program below.
- *---------------
- */
-
- {
- /* generate sqrt(x) bit by bit */
- unsigned64 y;
- unsigned64 q;
- unsigned64 s;
- unsigned64 b;
-
- f->class = sim_fpu_class_number;
- f->sign = 0;
- y = r->fraction;
- f->normal_exp = (r->normal_exp >> 1); /* exp = [exp/2] */
-
- /* odd exp, double x to make it even */
- ASSERT (y >= IMPLICIT_1 && y < IMPLICIT_4);
- if ((r->normal_exp & 1))
- {
- y += y;
- }
- ASSERT (y >= IMPLICIT_1 && y < (IMPLICIT_2 << 1));
-
- /* Let loop determine first value of s (either 1 or 2) */
- b = IMPLICIT_1;
- q = 0;
- s = 0;
-
- while (b)
- {
- unsigned64 t = s + b;
- if (t <= y)
- {
- s |= (b << 1);
- y -= t;
- q |= b;
- }
- y <<= 1;
- b >>= 1;
- }
-
- ASSERT (q >= IMPLICIT_1 && q < IMPLICIT_2);
- f->fraction = q;
- if (y != 0)
- {
- f->fraction |= 1; /* stick remaining bits */
- return sim_fpu_status_inexact;
- }
- else
- return 0;
- }
-}
-
-
-/* int/long <-> sim_fpu */
-
-INLINE_SIM_FPU (int)
-sim_fpu_i32to (sim_fpu *f,
- signed32 i,
- sim_fpu_round round)
-{
- i2fpu (f, i, 0);
- return 0;
-}
-
-INLINE_SIM_FPU (int)
-sim_fpu_u32to (sim_fpu *f,
- unsigned32 u,
- sim_fpu_round round)
-{
- u2fpu (f, u, 0);
- return 0;
-}
-
-INLINE_SIM_FPU (int)
-sim_fpu_i64to (sim_fpu *f,
- signed64 i,
- sim_fpu_round round)
-{
- i2fpu (f, i, 1);
- return 0;
-}
-
-INLINE_SIM_FPU (int)
-sim_fpu_u64to (sim_fpu *f,
- unsigned64 u,
- sim_fpu_round round)
-{
- u2fpu (f, u, 1);
- return 0;
-}
-
-
-INLINE_SIM_FPU (int)
-sim_fpu_to32i (signed32 *i,
- const sim_fpu *f,
- sim_fpu_round round)
-{
- signed64 i64;
- int status = fpu2i (&i64, f, 0, round);
- *i = i64;
- return status;
-}
-
-INLINE_SIM_FPU (int)
-sim_fpu_to32u (unsigned32 *u,
- const sim_fpu *f,
- sim_fpu_round round)
-{
- unsigned64 u64;
- int status = fpu2u (&u64, f, 0);
- *u = u64;
- return status;
-}
-
-INLINE_SIM_FPU (int)
-sim_fpu_to64i (signed64 *i,
- const sim_fpu *f,
- sim_fpu_round round)
-{
- return fpu2i (i, f, 1, round);
-}
-
-
-INLINE_SIM_FPU (int)
-sim_fpu_to64u (unsigned64 *u,
- const sim_fpu *f,
- sim_fpu_round round)
-{
- return fpu2u (u, f, 1);
-}
-
-
-
-/* sim_fpu -> host format */
-
-#if 0
-INLINE_SIM_FPU (float)
-sim_fpu_2f (const sim_fpu *f)
-{
- return fval.d;
-}
-#endif
-
-
-INLINE_SIM_FPU (double)
-sim_fpu_2d (const sim_fpu *s)
-{
- sim_fpu_map val;
- if (sim_fpu_is_snan (s))
- {
- /* gag SNaN's */
- sim_fpu n = *s;
- n.class = sim_fpu_class_qnan;
- val.i = pack_fpu (&n, 1);
- }
- else
- {
- val.i = pack_fpu (s, 1);
- }
- return val.d;
-}
-
-
-#if 0
-INLINE_SIM_FPU (void)
-sim_fpu_f2 (sim_fpu *f,
- float s)
-{
- sim_fpu_map val;
- val.d = s;
- unpack_fpu (f, val.i, 1);
-}
-#endif
-
-
-INLINE_SIM_FPU (void)
-sim_fpu_d2 (sim_fpu *f,
- double d)
-{
- sim_fpu_map val;
- val.d = d;
- unpack_fpu (f, val.i, 1);
-}
-
-
-/* General */
-
-INLINE_SIM_FPU (int)
-sim_fpu_is_nan (const sim_fpu *d)
-{
- switch (d->class)
- {
- case sim_fpu_class_qnan:
- case sim_fpu_class_snan:
- return 1;
- default:
- return 0;
- }
-}
-
-INLINE_SIM_FPU (int)
-sim_fpu_is_qnan (const sim_fpu *d)
-{
- switch (d->class)
- {
- case sim_fpu_class_qnan:
- return 1;
- default:
- return 0;
- }
-}
-
-INLINE_SIM_FPU (int)
-sim_fpu_is_snan (const sim_fpu *d)
-{
- switch (d->class)
- {
- case sim_fpu_class_snan:
- return 1;
- default:
- return 0;
- }
-}
-
-INLINE_SIM_FPU (int)
-sim_fpu_is_zero (const sim_fpu *d)
-{
- switch (d->class)
- {
- case sim_fpu_class_zero:
- return 1;
- default:
- return 0;
- }
-}
-
-INLINE_SIM_FPU (int)
-sim_fpu_is_infinity (const sim_fpu *d)
-{
- switch (d->class)
- {
- case sim_fpu_class_infinity:
- return 1;
- default:
- return 0;
- }
-}
-
-INLINE_SIM_FPU (int)
-sim_fpu_is_number (const sim_fpu *d)
-{
- switch (d->class)
- {
- case sim_fpu_class_denorm:
- case sim_fpu_class_number:
- return 1;
- default:
- return 0;
- }
-}
-
-INLINE_SIM_FPU (int)
-sim_fpu_is_denorm (const sim_fpu *d)
-{
- switch (d->class)
- {
- case sim_fpu_class_denorm:
- return 1;
- default:
- return 0;
- }
-}
-
-
-INLINE_SIM_FPU (int)
-sim_fpu_sign (const sim_fpu *d)
-{
- return d->sign;
-}
-
-
-INLINE_SIM_FPU (int)
-sim_fpu_exp (const sim_fpu *d)
-{
- return d->normal_exp;
-}
-
-
-
-INLINE_SIM_FPU (int)
-sim_fpu_is (const sim_fpu *d)
-{
- switch (d->class)
- {
- case sim_fpu_class_qnan:
- return SIM_FPU_IS_QNAN;
- case sim_fpu_class_snan:
- return SIM_FPU_IS_SNAN;
- case sim_fpu_class_infinity:
- if (d->sign)
- return SIM_FPU_IS_NINF;
- else
- return SIM_FPU_IS_PINF;
- case sim_fpu_class_number:
- if (d->sign)
- return SIM_FPU_IS_NNUMBER;
- else
- return SIM_FPU_IS_PNUMBER;
- case sim_fpu_class_denorm:
- if (d->sign)
- return SIM_FPU_IS_NDENORM;
- else
- return SIM_FPU_IS_PDENORM;
- case sim_fpu_class_zero:
- if (d->sign)
- return SIM_FPU_IS_NZERO;
- else
- return SIM_FPU_IS_PZERO;
- default:
- return -1;
- abort ();
- }
-}
-
-INLINE_SIM_FPU (int)
-sim_fpu_cmp (const sim_fpu *l, const sim_fpu *r)
-{
- sim_fpu res;
- sim_fpu_sub (&res, l, r);
- return sim_fpu_is (&res);
-}
-
-INLINE_SIM_FPU (int)
-sim_fpu_is_lt (const sim_fpu *l, const sim_fpu *r)
-{
- int status;
- sim_fpu_lt (&status, l, r);
- return status;
-}
-
-INLINE_SIM_FPU (int)
-sim_fpu_is_le (const sim_fpu *l, const sim_fpu *r)
-{
- int is;
- sim_fpu_le (&is, l, r);
- return is;
-}
-
-INLINE_SIM_FPU (int)
-sim_fpu_is_eq (const sim_fpu *l, const sim_fpu *r)
-{
- int is;
- sim_fpu_eq (&is, l, r);
- return is;
-}
-
-INLINE_SIM_FPU (int)
-sim_fpu_is_ne (const sim_fpu *l, const sim_fpu *r)
-{
- int is;
- sim_fpu_ne (&is, l, r);
- return is;
-}
-
-INLINE_SIM_FPU (int)
-sim_fpu_is_ge (const sim_fpu *l, const sim_fpu *r)
-{
- int is;
- sim_fpu_ge (&is, l, r);
- return is;
-}
-
-INLINE_SIM_FPU (int)
-sim_fpu_is_gt (const sim_fpu *l, const sim_fpu *r)
-{
- int is;
- sim_fpu_gt (&is, l, r);
- return is;
-}
-
-
-/* Compare operators */
-
-INLINE_SIM_FPU (int)
-sim_fpu_lt (int *is,
- const sim_fpu *l,
- const sim_fpu *r)
-{
- if (!sim_fpu_is_nan (l) && !sim_fpu_is_nan (r))
- {
- sim_fpu_map lval;
- sim_fpu_map rval;
- lval.i = pack_fpu (l, 1);
- rval.i = pack_fpu (r, 1);
- (*is) = (lval.d < rval.d);
- return 0;
- }
- else if (sim_fpu_is_snan (l) || sim_fpu_is_snan (r))
- {
- *is = 0;
- return sim_fpu_status_invalid_snan;
- }
- else
- {
- *is = 0;
- return sim_fpu_status_invalid_qnan;
- }
-}
-
-INLINE_SIM_FPU (int)
-sim_fpu_le (int *is,
- const sim_fpu *l,
- const sim_fpu *r)
-{
- if (!sim_fpu_is_nan (l) && !sim_fpu_is_nan (r))
- {
- sim_fpu_map lval;
- sim_fpu_map rval;
- lval.i = pack_fpu (l, 1);
- rval.i = pack_fpu (r, 1);
- *is = (lval.d <= rval.d);
- return 0;
- }
- else if (sim_fpu_is_snan (l) || sim_fpu_is_snan (r))
- {
- *is = 0;
- return sim_fpu_status_invalid_snan;
- }
- else
- {
- *is = 0;
- return sim_fpu_status_invalid_qnan;
- }
-}
-
-INLINE_SIM_FPU (int)
-sim_fpu_eq (int *is,
- const sim_fpu *l,
- const sim_fpu *r)
-{
- if (!sim_fpu_is_nan (l) && !sim_fpu_is_nan (r))
- {
- sim_fpu_map lval;
- sim_fpu_map rval;
- lval.i = pack_fpu (l, 1);
- rval.i = pack_fpu (r, 1);
- (*is) = (lval.d == rval.d);
- return 0;
- }
- else if (sim_fpu_is_snan (l) || sim_fpu_is_snan (r))
- {
- *is = 0;
- return sim_fpu_status_invalid_snan;
- }
- else
- {
- *is = 0;
- return sim_fpu_status_invalid_qnan;
- }
-}
-
-INLINE_SIM_FPU (int)
-sim_fpu_ne (int *is,
- const sim_fpu *l,
- const sim_fpu *r)
-{
- if (!sim_fpu_is_nan (l) && !sim_fpu_is_nan (r))
- {
- sim_fpu_map lval;
- sim_fpu_map rval;
- lval.i = pack_fpu (l, 1);
- rval.i = pack_fpu (r, 1);
- (*is) = (lval.d != rval.d);
- return 0;
- }
- else if (sim_fpu_is_snan (l) || sim_fpu_is_snan (r))
- {
- *is = 0;
- return sim_fpu_status_invalid_snan;
- }
- else
- {
- *is = 0;
- return sim_fpu_status_invalid_qnan;
- }
-}
-
-INLINE_SIM_FPU (int)
-sim_fpu_ge (int *is,
- const sim_fpu *l,
- const sim_fpu *r)
-{
- return sim_fpu_le (is, r, l);
-}
-
-INLINE_SIM_FPU (int)
-sim_fpu_gt (int *is,
- const sim_fpu *l,
- const sim_fpu *r)
-{
- return sim_fpu_lt (is, r, l);
-}
-
-
-/* A number of useful constants */
-
-#if EXTERN_SIM_FPU_P
-const sim_fpu sim_fpu_zero = {
- sim_fpu_class_zero,
-};
-const sim_fpu sim_fpu_qnan = {
- sim_fpu_class_qnan,
-};
-const sim_fpu sim_fpu_one = {
- sim_fpu_class_number, 0, IMPLICIT_1, 0
-};
-const sim_fpu sim_fpu_two = {
- sim_fpu_class_number, 0, IMPLICIT_1, 1
-};
-const sim_fpu sim_fpu_max32 = {
- sim_fpu_class_number, 0, LSMASK64 (NR_FRAC_GUARD, NR_GUARDS32), NORMAL_EXPMAX32
-};
-const sim_fpu sim_fpu_max64 = {
- sim_fpu_class_number, 0, LSMASK64 (NR_FRAC_GUARD, NR_GUARDS64), NORMAL_EXPMAX64
-};
-#endif
-
-
-/* For debugging */
-
-INLINE_SIM_FPU (void)
-sim_fpu_print_fpu (const sim_fpu *f,
- sim_fpu_print_func *print,
- void *arg)
-{
- sim_fpu_printn_fpu (f, print, -1, arg);
-}
-
-INLINE_SIM_FPU (void)
-sim_fpu_printn_fpu (const sim_fpu *f,
- sim_fpu_print_func *print,
- int digits,
- void *arg)
-{
- print (arg, "%s", f->sign ? "-" : "+");
- switch (f->class)
- {
- case sim_fpu_class_qnan:
- print (arg, "0.");
- print_bits (f->fraction, NR_FRAC_GUARD - 1, digits, print, arg);
- print (arg, "*QuietNaN");
- break;
- case sim_fpu_class_snan:
- print (arg, "0.");
- print_bits (f->fraction, NR_FRAC_GUARD - 1, digits, print, arg);
- print (arg, "*SignalNaN");
- break;
- case sim_fpu_class_zero:
- print (arg, "0.0");
- break;
- case sim_fpu_class_infinity:
- print (arg, "INF");
- break;
- case sim_fpu_class_number:
- case sim_fpu_class_denorm:
- print (arg, "1.");
- print_bits (f->fraction, NR_FRAC_GUARD - 1, digits, print, arg);
- print (arg, "*2^%+d", f->normal_exp);
- ASSERT (f->fraction >= IMPLICIT_1);
- ASSERT (f->fraction < IMPLICIT_2);
- }
-}
-
-
-INLINE_SIM_FPU (void)
-sim_fpu_print_status (int status,
- sim_fpu_print_func *print,
- void *arg)
-{
- int i = 1;
- char *prefix = "";
- while (status >= i)
- {
- switch ((sim_fpu_status) (status & i))
- {
- case sim_fpu_status_denorm:
- print (arg, "%sD", prefix);
- break;
- case sim_fpu_status_invalid_snan:
- print (arg, "%sSNaN", prefix);
- break;
- case sim_fpu_status_invalid_qnan:
- print (arg, "%sQNaN", prefix);
- break;
- case sim_fpu_status_invalid_isi:
- print (arg, "%sISI", prefix);
- break;
- case sim_fpu_status_invalid_idi:
- print (arg, "%sIDI", prefix);
- break;
- case sim_fpu_status_invalid_zdz:
- print (arg, "%sZDZ", prefix);
- break;
- case sim_fpu_status_invalid_imz:
- print (arg, "%sIMZ", prefix);
- break;
- case sim_fpu_status_invalid_cvi:
- print (arg, "%sCVI", prefix);
- break;
- case sim_fpu_status_invalid_cmp:
- print (arg, "%sCMP", prefix);
- break;
- case sim_fpu_status_invalid_sqrt:
- print (arg, "%sSQRT", prefix);
- break;
- break;
- case sim_fpu_status_inexact:
- print (arg, "%sX", prefix);
- break;
- break;
- case sim_fpu_status_overflow:
- print (arg, "%sO", prefix);
- break;
- break;
- case sim_fpu_status_underflow:
- print (arg, "%sU", prefix);
- break;
- break;
- case sim_fpu_status_invalid_div0:
- print (arg, "%s/", prefix);
- break;
- break;
- case sim_fpu_status_rounded:
- print (arg, "%sR", prefix);
- break;
- break;
- }
- i <<= 1;
- prefix = ",";
- }
-}
-
-#endif
diff --git a/sim/common/sim-fpu.h b/sim/common/sim-fpu.h
deleted file mode 100644
index 91adad80e21..00000000000
--- a/sim/common/sim-fpu.h
+++ /dev/null
@@ -1,424 +0,0 @@
-/* Simulator Floating-point support.
- Copyright (C) 1997-1998 Free Software Foundation, Inc.
- Contributed by Cygnus Support.
-
-This file is part of GDB, the GNU debugger.
-
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License along
-with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
-
-
-
-#ifndef SIM_FPU_H
-#define SIM_FPU_H
-
-
-
-/* The FPU intermediate type - this object, passed by reference,
- should be treated as opaque.
-
-
- Pragmatics - pass struct by ref:
-
- The alternatives for this object/interface that were considered
- were: a packed 64 bit value; an unpacked structure passed by value;
- and an unpacked structure passed by reference.
-
- The packed 64 bit value was rejected because: it limited the
- precision of intermediate values; reasonable performance would only
- be achieved when the sim_fpu package was in-lined allowing repeated
- unpacking operations to be eliminated.
-
- For unpacked structures (passed by value and reference), the code
- quality of GCC-2.7 (on x86) for each alternative was compared.
- Needless to say the results, while better then for a packed 64 bit
- object, were still poor (GCC had only limited support for the
- optimization of references to structure members). Regardless, the
- struct-by-ref alternative achieved better results when compiled
- with (better speed) and without (better code density) in-lining.
- Here's looking forward to an improved GCC optimizer.
-
-
- Pragmatics - avoid host FP hardware:
-
- FP operations can be implemented by either: the host's floating
- point hardware; or by emulating the FP operations using integer
- only routines. This is direct tradeoff between speed, portability
- and correctness.
-
- The two principal reasons for selecting portability and correctness
- over speed are:
-
- 1 - Correctness. The assumption that FP correctness wasn't an
- issue for code being run on simulators was wrong. Instead of
- running FP tolerant (?) code, simulator users instead typically run
- very aggressive FP code sequences. The sole purpose of those
- sequences being to test the target ISA's FP implementation.
-
- 2 - Portability. The host FP implementation is not predictable. A
- simulator modeling aggressive FP code sequences using the hosts FPU
- relies heavily on the correctness of the hosts FP implementation.
- It turns out that such trust can be misplaced. The behavior of
- host FP implementations when handling edge conditions such as SNaNs
- and exceptions varied widely.
-
-
- */
-
-
-typedef enum
-{
- sim_fpu_class_zero,
- sim_fpu_class_snan,
- sim_fpu_class_qnan,
- sim_fpu_class_number,
- sim_fpu_class_denorm,
- sim_fpu_class_infinity,
-} sim_fpu_class;
-
-typedef struct _sim_fpu {
- sim_fpu_class class;
- int sign;
- unsigned64 fraction;
- int normal_exp;
-} sim_fpu;
-
-
-
-/* Rounding options.
-
- The value zero (sim_fpu_round_default) for ALU operations indicates
- that, when possible, rounding should be avoided. */
-
-typedef enum
-{
- sim_fpu_round_default = 0,
- sim_fpu_round_near = 1,
- sim_fpu_round_zero = 2,
- sim_fpu_round_up = 3,
- sim_fpu_round_down = 4,
-} sim_fpu_round;
-
-
-/* Options when handling denormalized numbers. */
-
-typedef enum
-{
- sim_fpu_denorm_default = 0,
- sim_fpu_denorm_underflow_inexact = 1,
- sim_fpu_denorm_zero = 2,
-} sim_fpu_denorm;
-
-
-
-/* Status values returned by FPU operators.
-
- When checking the result of an FP sequence (ex 32to, add, single,
- to32) the caller may either: check the return value of each FP
- operator; or form the union (OR) of the returned values and examine
- them once at the end.
-
- FIXME: This facility is still being developed. The choice of
- status values returned and their exact meaning may changed in the
- future. */
-
-typedef enum
-{
- sim_fpu_status_invalid_snan = 1,
- sim_fpu_status_invalid_qnan = 2,
- sim_fpu_status_invalid_isi = 4, /* (inf - inf) */
- sim_fpu_status_invalid_idi = 8, /* (inf / inf) */
- sim_fpu_status_invalid_zdz = 16, /* (0 / 0) */
- sim_fpu_status_invalid_imz = 32, /* (inf * 0) */
- sim_fpu_status_invalid_cvi = 64, /* convert to integer */
- sim_fpu_status_invalid_div0 = 128, /* (X / 0) */
- sim_fpu_status_invalid_cmp = 256, /* compare */
- sim_fpu_status_invalid_sqrt = 512,
- sim_fpu_status_rounded = 1024,
- sim_fpu_status_inexact = 2048,
- sim_fpu_status_overflow = 4096,
- sim_fpu_status_underflow = 8192,
- sim_fpu_status_denorm = 16384,
-} sim_fpu_status;
-
-
-
-
-/* Directly map between a 32/64 bit register and the sim_fpu internal
- type.
-
- When converting from the 32/64 bit packed format to the sim_fpu
- internal type, the operation is exact.
-
- When converting from the sim_fpu internal type to 32/64 bit packed
- format, the operation may result in a loss of precision. The
- configuration macro WITH_FPU_CONVERSION controls this. By default,
- silent round to nearest is performed. Alternatively, round up,
- round down and round to zero can be performed. In a simulator
- emulating exact FPU behavior, sim_fpu_round_{32,64} should be
- called before packing the sim_fpu value. */
-
-INLINE_SIM_FPU (void) sim_fpu_32to (sim_fpu *f, unsigned32 s);
-INLINE_SIM_FPU (void) sim_fpu_232to (sim_fpu *f, unsigned32 h, unsigned32 l);
-INLINE_SIM_FPU (void) sim_fpu_64to (sim_fpu *f, unsigned64 d);
-
-INLINE_SIM_FPU (void) sim_fpu_to32 (unsigned32 *s, const sim_fpu *f);
-INLINE_SIM_FPU (void) sim_fpu_to232 (unsigned32 *h, unsigned32 *l, const sim_fpu *f);
-INLINE_SIM_FPU (void) sim_fpu_to64 (unsigned64 *d, const sim_fpu *f);
-
-
-/* Create a sim_fpu struct using raw information. (FRACTION & LSMASK
- (PRECISION-1, 0)) is assumed to contain the fraction part of the
- floating-point number. The leading bit LSBIT (PRECISION) is always
- implied. The number created can be represented by:
-
- (SIGN ? "-" : "+") "1." FRACTION{PRECISION-1,0} X 2 ^ NORMAL_EXP>
-
- You can not specify zero using this function. */
-
-INLINE_SIM_FPU (void) sim_fpu_fractionto (sim_fpu *f, int sign, int normal_exp, unsigned64 fraction, int precision);
-
-/* Reverse operation. If S is a non-zero number, discards the implied
- leading one and returns PRECISION fraction bits. No rounding is
- performed. */
-INLINE_SIM_FPU (unsigned64) sim_fpu_tofraction (const sim_fpu *s, int precision);
-
-
-
-/* Rounding operators.
-
- Force an intermediate result to an exact 32/64 bit
- representation. */
-
-INLINE_SIM_FPU (int) sim_fpu_round_32 (sim_fpu *f,
- sim_fpu_round round,
- sim_fpu_denorm denorm);
-INLINE_SIM_FPU (int) sim_fpu_round_64 (sim_fpu *f,
- sim_fpu_round round,
- sim_fpu_denorm denorm);
-
-
-
-/* Arithmetic operators.
-
- FIXME: In the future, additional arguments ROUNDING and BITSIZE may
- be added. */
-
-typedef int (sim_fpu_op1) (sim_fpu *f,
- const sim_fpu *l);
-typedef int (sim_fpu_op2) (sim_fpu *f,
- const sim_fpu *l,
- const sim_fpu *r);
-
-INLINE_SIM_FPU (int) sim_fpu_add (sim_fpu *f,
- const sim_fpu *l, const sim_fpu *r);
-INLINE_SIM_FPU (int) sim_fpu_sub (sim_fpu *f,
- const sim_fpu *l, const sim_fpu *r);
-INLINE_SIM_FPU (int) sim_fpu_mul (sim_fpu *f,
- const sim_fpu *l, const sim_fpu *r);
-INLINE_SIM_FPU (int) sim_fpu_div (sim_fpu *f,
- const sim_fpu *l, const sim_fpu *r);
-INLINE_SIM_FPU (int) sim_fpu_max (sim_fpu *f,
- const sim_fpu *l, const sim_fpu *r);
-INLINE_SIM_FPU (int) sim_fpu_min (sim_fpu *f,
- const sim_fpu *l, const sim_fpu *r);
-INLINE_SIM_FPU (int) sim_fpu_neg (sim_fpu *f,
- const sim_fpu *a);
-INLINE_SIM_FPU (int) sim_fpu_abs (sim_fpu *f,
- const sim_fpu *a);
-INLINE_SIM_FPU (int) sim_fpu_inv (sim_fpu *f,
- const sim_fpu *a);
-INLINE_SIM_FPU (int) sim_fpu_sqrt (sim_fpu *f,
- const sim_fpu *sqr);
-
-
-
-/* Conversion of integer <-> floating point. */
-
-INLINE_SIM_FPU (int) sim_fpu_i32to (sim_fpu *f, signed32 i,
- sim_fpu_round round);
-INLINE_SIM_FPU (int) sim_fpu_u32to (sim_fpu *f, unsigned32 u,
- sim_fpu_round round);
-INLINE_SIM_FPU (int) sim_fpu_i64to (sim_fpu *f, signed64 i,
- sim_fpu_round round);
-INLINE_SIM_FPU (int) sim_fpu_u64to (sim_fpu *f, unsigned64 u,
- sim_fpu_round round);
-#if 0
-INLINE_SIM_FPU (int) sim_fpu_i232to (sim_fpu *f, signed32 h, signed32 l,
- sim_fpu_round round);
-#endif
-#if 0
-INLINE_SIM_FPU (int) sim_fpu_u232to (sim_fpu *f, unsigned32 h, unsigned32 l,
- sim_fpu_round round);
-#endif
-
-INLINE_SIM_FPU (int) sim_fpu_to32i (signed32 *i, const sim_fpu *f,
- sim_fpu_round round);
-INLINE_SIM_FPU (int) sim_fpu_to32u (unsigned32 *u, const sim_fpu *f,
- sim_fpu_round round);
-INLINE_SIM_FPU (int) sim_fpu_to64i (signed64 *i, const sim_fpu *f,
- sim_fpu_round round);
-INLINE_SIM_FPU (int) sim_fpu_to64u (unsigned64 *u, const sim_fpu *f,
- sim_fpu_round round);
-#if 0
-INLINE_SIM_FPU (int) sim_fpu_to232i (signed64 *h, signed64 *l, const sim_fpu *f,
- sim_fpu_round round);
-#endif
-#if 0
-INLINE_SIM_FPU (int) sim_fpu_to232u (unsigned64 *h, unsigned64 *l, const sim_fpu *f,
- sim_fpu_round round);
-#endif
-
-
-/* Conversion of internal sim_fpu type to host double format.
-
- For debugging/tracing only. A SNaN is never returned. */
-
-/* INLINE_SIM_FPU (float) sim_fpu_2f (const sim_fpu *f); */
-INLINE_SIM_FPU (double) sim_fpu_2d (const sim_fpu *d);
-
-/* INLINE_SIM_FPU (void) sim_fpu_f2 (sim_fpu *f, float s); */
-INLINE_SIM_FPU (void) sim_fpu_d2 (sim_fpu *f, double d);
-
-
-
-/* Specific number classes.
-
- NB: When either, a 32/64 bit floating points is converted to
- internal format, or an internal format number is rounded to 32/64
- bit precision, a special marker is retained that indicates that the
- value was normalized. For such numbers both is_number and
- is_denorm return true. */
-
-INLINE_SIM_FPU (int) sim_fpu_is_nan (const sim_fpu *s); /* 1 => SNaN or QNaN */
-INLINE_SIM_FPU (int) sim_fpu_is_snan (const sim_fpu *s); /* 1 => SNaN */
-INLINE_SIM_FPU (int) sim_fpu_is_qnan (const sim_fpu *s); /* 1 => QNaN */
-
-INLINE_SIM_FPU (int) sim_fpu_is_zero (const sim_fpu *s);
-INLINE_SIM_FPU (int) sim_fpu_is_infinity (const sim_fpu *s);
-INLINE_SIM_FPU (int) sim_fpu_is_number (const sim_fpu *s); /* !zero */
-INLINE_SIM_FPU (int) sim_fpu_is_denorm (const sim_fpu *s); /* !zero */
-
-
-
-/* Floating point fields */
-
-INLINE_SIM_FPU (int) sim_fpu_sign (const sim_fpu *s);
-INLINE_SIM_FPU (int) sim_fpu_exp (const sim_fpu *s);
-
-
-
-/* Specific comparison operators
-
- For NaNs et.al., the comparison operators will set IS to zero and
- return a nonzero result. */
-
-INLINE_SIM_FPU (int) sim_fpu_lt (int *is, const sim_fpu *l, const sim_fpu *r);
-INLINE_SIM_FPU (int) sim_fpu_le (int *is, const sim_fpu *l, const sim_fpu *r);
-INLINE_SIM_FPU (int) sim_fpu_eq (int *is, const sim_fpu *l, const sim_fpu *r);
-INLINE_SIM_FPU (int) sim_fpu_ne (int *is, const sim_fpu *l, const sim_fpu *r);
-INLINE_SIM_FPU (int) sim_fpu_ge (int *is, const sim_fpu *l, const sim_fpu *r);
-INLINE_SIM_FPU (int) sim_fpu_gt (int *is, const sim_fpu *l, const sim_fpu *r);
-
-INLINE_SIM_FPU (int) sim_fpu_is_lt (const sim_fpu *l, const sim_fpu *r);
-INLINE_SIM_FPU (int) sim_fpu_is_le (const sim_fpu *l, const sim_fpu *r);
-INLINE_SIM_FPU (int) sim_fpu_is_eq (const sim_fpu *l, const sim_fpu *r);
-INLINE_SIM_FPU (int) sim_fpu_is_ne (const sim_fpu *l, const sim_fpu *r);
-INLINE_SIM_FPU (int) sim_fpu_is_ge (const sim_fpu *l, const sim_fpu *r);
-INLINE_SIM_FPU (int) sim_fpu_is_gt (const sim_fpu *l, const sim_fpu *r);
-
-
-
-/* General number class and comparison operators.
-
- The result of the comparison is indicated by returning one of the
- values below. Efficient emulation of a target FP compare
- instruction can be achieved by redefining the values below to match
- corresponding target FP status bits.
-
- For instance. SIM_FPU_QNAN may be redefined to be the bit
- `INVALID' while SIM_FPU_NINF might be redefined as the bits
- `NEGATIVE | INFINITY | VALID'. */
-
-#ifndef SIM_FPU_IS_SNAN
-enum {
- SIM_FPU_IS_SNAN = 1, /* Noisy not-a-number */
- SIM_FPU_IS_QNAN = 2, /* Quite not-a-number */
- SIM_FPU_IS_NINF = 3, /* -infinity */
- SIM_FPU_IS_PINF = 4, /* +infinity */
- SIM_FPU_IS_NNUMBER = 5, /* -number - [ -MAX .. -MIN ] */
- SIM_FPU_IS_PNUMBER = 6, /* +number - [ +MIN .. +MAX ] */
- SIM_FPU_IS_NDENORM = 7, /* -denorm - ( MIN .. 0 ) */
- SIM_FPU_IS_PDENORM = 8, /* +denorm - ( 0 .. MIN ) */
- SIM_FPU_IS_NZERO = 9, /* -0 */
- SIM_FPU_IS_PZERO = 10, /* +0 */
-};
-#endif
-
-INLINE_SIM_FPU (int) sim_fpu_is (const sim_fpu *l);
-INLINE_SIM_FPU (int) sim_fpu_cmp (const sim_fpu *l, const sim_fpu *r);
-
-
-
-/* A constant of useful numbers */
-
-extern const sim_fpu sim_fpu_zero;
-extern const sim_fpu sim_fpu_one;
-extern const sim_fpu sim_fpu_two;
-extern const sim_fpu sim_fpu_qnan;
-extern const sim_fpu sim_fpu_max32;
-extern const sim_fpu sim_fpu_max64;
-
-
-/* Select the applicable functions for the fp_word type */
-
-#if WITH_TARGET_FLOATING_POINT_BITSIZE == 32
-#define sim_fpu_tofp sim_fpu_to32
-#define sim_fpu_fpto sim_fpu_32to
-#define sim_fpu_round_fp sim_fpu_round_32
-#define sim_fpu_maxfp sim_fpu_max32
-#endif
-#if WITH_TARGET_FLOATING_POINT_BITSIZE == 64
-#define sim_fpu_tofp sim_fpu_to64
-#define sim_fpu_fpto sim_fpu_64to
-#define sim_fpu_round_fp sim_fpu_round_64
-#define sim_fpu_maxfp sim_fpu_max64
-#endif
-
-
-
-/* For debugging */
-
-typedef void sim_fpu_print_func (void *, char *, ...);
-
-/* Print a sim_fpu with full precision. */
-INLINE_SIM_FPU (void) sim_fpu_print_fpu (const sim_fpu *f,
- sim_fpu_print_func *print,
- void *arg);
-
-/* Print a sim_fpu with `n' trailing digits. */
-INLINE_SIM_FPU (void) sim_fpu_printn_fpu (const sim_fpu *f,
- sim_fpu_print_func *print,
- int digits,
- void *arg);
-
-INLINE_SIM_FPU (void) sim_fpu_print_status (int status,
- sim_fpu_print_func *print,
- void *arg);
-
-#if H_REVEALS_MODULE_P (SIM_FPU_INLINE)
-#include "sim-fpu.c"
-#endif
-
-#endif
diff --git a/sim/common/sim-hload.c b/sim/common/sim-hload.c
deleted file mode 100644
index b8726ba7834..00000000000
--- a/sim/common/sim-hload.c
+++ /dev/null
@@ -1,63 +0,0 @@
-/* Generic load for hardware simulator models.
- Copyright (C) 1997 Free Software Foundation, Inc.
- Contributed by Cygnus Support.
-
-This file is part of GDB, the GNU debugger.
-
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License along
-with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
-
-#include "sim-main.h"
-#include "bfd.h"
-#include "sim-utils.h"
-#include "sim-assert.h"
-
-
-/* Generic implementation of sim_load that works with simulators
- modeling a hardware platform. */
-
-SIM_RC
-sim_load (sd, prog_name, prog_bfd, from_tty)
- SIM_DESC sd;
- char *prog_name;
- struct _bfd *prog_bfd;
- int from_tty;
-{
- bfd *result_bfd;
-
- SIM_ASSERT (STATE_MAGIC (sd) == SIM_MAGIC_NUMBER);
- if (sim_analyze_program (sd, prog_name, prog_bfd) != SIM_RC_OK)
- return SIM_RC_FAIL;
- SIM_ASSERT (STATE_PROG_BFD (sd) != NULL);
-
- /* NOTE: For historical reasons, older hardware simulators
- incorrectly write the program sections at LMA interpreted as a
- virtual address. This is still accommodated for backward
- compatibility reasons. */
-
- result_bfd = sim_load_file (sd, STATE_MY_NAME (sd),
- STATE_CALLBACK (sd),
- prog_name,
- STATE_PROG_BFD (sd),
- STATE_OPEN_KIND (sd) == SIM_OPEN_DEBUG,
- STATE_LOAD_AT_LMA_P (sd),
- sim_write);
- if (result_bfd == NULL)
- {
- bfd_close (STATE_PROG_BFD (sd));
- STATE_PROG_BFD (sd) = NULL;
- return SIM_RC_FAIL;
- }
- return SIM_RC_OK;
-}
diff --git a/sim/common/sim-hrw.c b/sim/common/sim-hrw.c
deleted file mode 100644
index 953830259a7..00000000000
--- a/sim/common/sim-hrw.c
+++ /dev/null
@@ -1,41 +0,0 @@
-/* Generic memory read/write for hardware simulator models.
- Copyright (C) 1997 Free Software Foundation, Inc.
- Contributed by Cygnus Support.
-
-This file is part of GDB, the GNU debugger.
-
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License along
-with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
-
-#include "sim-main.h"
-#include "sim-assert.h"
-
-/* Generic implementation of sim_read that works with simulators
- modeling real hardware */
-
-int
-sim_read (SIM_DESC sd, SIM_ADDR mem, unsigned char *buf, int length)
-{
- SIM_ASSERT (STATE_MAGIC (sd) == SIM_MAGIC_NUMBER);
- return sim_core_read_buffer (sd, NULL, read_map,
- buf, mem, length);
-}
-
-int
-sim_write (SIM_DESC sd, SIM_ADDR mem, unsigned char *buf, int length)
-{
- SIM_ASSERT (STATE_MAGIC (sd) == SIM_MAGIC_NUMBER);
- return sim_core_write_buffer (sd, NULL, write_map,
- buf, mem, length);
-}
diff --git a/sim/common/sim-hw.c b/sim/common/sim-hw.c
deleted file mode 100644
index 922b8ec44af..00000000000
--- a/sim/common/sim-hw.c
+++ /dev/null
@@ -1,519 +0,0 @@
-/* Simulator hardware option handling.
- Copyright (C) 1998 Free Software Foundation, Inc.
- Contributed by Cygnus Support and Andrew Cagney.
-
-This file is part of GDB, the GNU debugger.
-
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License along
-with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
-
-#include "sim-main.h"
-#include "sim-assert.h"
-#include "sim-options.h"
-
-#include "sim-hw.h"
-
-#include "hw-tree.h"
-#include "hw-device.h"
-#include "hw-main.h"
-#include "hw-base.h"
-
-
-#ifdef HAVE_STRING_H
-#include <string.h>
-#else
-#ifdef HAVE_STRINGS_H
-#include <strings.h>
-#endif
-#endif
-#ifdef HAVE_STDLIB_H
-#include <stdlib.h>
-#endif
-#include <ctype.h>
-#include <errno.h>
-
-
-struct sim_hw {
- struct hw *tree;
- int trace_p;
- int info_p;
- /* if called from a processor */
- sim_cpu *cpu;
- sim_cia cia;
-};
-
-
-struct hw *
-sim_hw_parse (struct sim_state *sd,
- const char *fmt,
- ...)
-{
- struct hw *current;
- va_list ap;
- va_start (ap, fmt);
- current = hw_tree_vparse (STATE_HW (sd)->tree, fmt, ap);
- va_end (ap);
- return current;
-}
-
-struct printer {
- struct sim_state *file;
- void (*print) (struct sim_state *, const char *, va_list ap);
-};
-
-static void
-do_print (void *file, const char *fmt, ...)
-{
- struct printer *p = file;
- va_list ap;
- va_start (ap, fmt);
- p->print (p->file, fmt, ap);
- va_end (ap);
-}
-
-void
-sim_hw_print (struct sim_state *sd,
- void (*print) (struct sim_state *, const char *, va_list ap))
-{
- struct printer p;
- p.file = sd;
- p.print = print;
- hw_tree_print (STATE_HW (sd)->tree, do_print, &p);
-}
-
-
-
-
-/* command line options. */
-
-enum {
- OPTION_HW_INFO = OPTION_START,
- OPTION_HW_TRACE,
- OPTION_HW_DEVICE,
- OPTION_HW_LIST,
- OPTION_HW_FILE,
-};
-
-static DECLARE_OPTION_HANDLER (hw_option_handler);
-
-static const OPTION hw_options[] =
-{
- { {"hw-info", no_argument, NULL, OPTION_HW_INFO },
- '\0', NULL, "List configurable hw regions",
- hw_option_handler },
- { {"info-hw", no_argument, NULL, OPTION_HW_INFO },
- '\0', NULL, NULL,
- hw_option_handler },
-
- { {"hw-trace", optional_argument, NULL, OPTION_HW_TRACE },
- '\0', "on|off", "Trace all hardware devices",
- hw_option_handler },
- { {"trace-hw", optional_argument, NULL, OPTION_HW_TRACE },
- '\0', NULL, NULL,
- hw_option_handler },
-
- { {"hw-device", required_argument, NULL, OPTION_HW_DEVICE },
- '\0', "DEVICE", "Add the specified device",
- hw_option_handler },
-
- { {"hw-list", no_argument, NULL, OPTION_HW_LIST },
- '\0', NULL, "List the device tree",
- hw_option_handler },
-
- { {"hw-file", required_argument, NULL, OPTION_HW_FILE },
- '\0', "FILE", "Add the devices listed in the file",
- hw_option_handler },
-
- { {NULL, no_argument, NULL, 0}, '\0', NULL, NULL, NULL }
-};
-
-
-
-/* Copied from ../ppc/psim.c:psim_merge_device_file() */
-
-static SIM_RC
-merge_device_file (struct sim_state *sd,
- const char *file_name)
-{
- FILE *description;
- struct hw *current = STATE_HW (sd)->tree;
- int line_nr;
- char device_path[1000];
-
- /* try opening the file */
- description = fopen (file_name, "r");
- if (description == NULL)
- {
- perror (file_name);
- return SIM_RC_FAIL;
- }
-
- line_nr = 0;
- while (fgets (device_path, sizeof(device_path), description))
- {
- char *device;
- /* check that a complete line was read */
- if (strchr (device_path, '\n') == NULL)
- {
- fclose (description);
- sim_io_eprintf (sd, "%s:%d: line to long", file_name, line_nr);
- return SIM_RC_FAIL;
- }
- *strchr (device_path, '\n') = '\0';
- line_nr++;
- /* skip comments ("#" or ";") and blank lines lines */
- for (device = device_path;
- *device != '\0' && isspace (*device);
- device++);
- if (device[0] == '#'
- || device[0] == ';'
- || device[0] == '\0')
- continue;
- /* merge any appended lines */
- while (device_path[strlen (device_path) - 1] == '\\')
- {
- int curlen = strlen (device_path) - 1;
- /* zap the `\' at the end of the line */
- device_path[curlen] = '\0';
- /* append the next line */
- if (!fgets (device_path + curlen,
- sizeof (device_path) - curlen,
- description))
- {
- fclose (description);
- sim_io_eprintf (sd, "%s:%d: unexpected eof", file_name, line_nr);
- return SIM_RC_FAIL;
- }
- if (strchr(device_path, '\n') == NULL)
- {
- fclose(description);
- sim_io_eprintf (sd, "%s:%d: line to long", file_name, line_nr);
- return SIM_RC_FAIL;
- }
- *strchr(device_path, '\n') = '\0';
- line_nr++;
- }
- /* parse this line */
- current = hw_tree_parse (current, "%s", device);
- }
- fclose (description);
- return SIM_RC_OK;
-}
-
-
-static SIM_RC
-hw_option_handler (struct sim_state *sd, sim_cpu *cpu, int opt,
- char *arg, int is_command)
-{
- switch (opt)
- {
-
- case OPTION_HW_INFO:
- {
- /* delay info until after the tree is finished */
- STATE_HW (sd)->info_p = 1;
- return SIM_RC_OK;
- break;
- }
-
- case OPTION_HW_TRACE:
- {
- if (arg == NULL)
- {
- STATE_HW (sd)->trace_p = 1;
- }
- else if (strcmp (arg, "yes") == 0
- || strcmp (arg, "on") == 0)
- {
- STATE_HW (sd)->trace_p = 1;
- }
- else if (strcmp (arg, "no") == 0
- || strcmp (arg, "off") == 0)
- {
- STATE_HW (sd)->trace_p = 0;
- }
- else
- {
- sim_io_eprintf (sd, "Option --hw-trace ignored\n");
- /* set tracing on all devices */
- return SIM_RC_FAIL;
- }
- /* FIXME: Not very nice - see also hw-base.c */
- if (STATE_HW (sd)->trace_p)
- hw_tree_parse (STATE_HW (sd)->tree, "/global-trace? true");
- return SIM_RC_OK;
- break;
- }
-
- case OPTION_HW_DEVICE:
- {
- hw_tree_parse (STATE_HW (sd)->tree, arg);
- return SIM_RC_OK;
- }
-
- case OPTION_HW_LIST:
- {
- sim_hw_print (sd, sim_io_vprintf);
- return SIM_RC_OK;
- }
-
- case OPTION_HW_FILE:
- {
- return merge_device_file (sd, arg);
- }
-
- default:
- sim_io_eprintf (sd, "Unknown hw option %d\n", opt);
- return SIM_RC_FAIL;
-
- }
-
- return SIM_RC_FAIL;
-}
-
-
-/* "hw" module install handler.
-
- This is called via sim_module_install to install the "hw" subsystem
- into the simulator. */
-
-static MODULE_INIT_FN sim_hw_init;
-static MODULE_UNINSTALL_FN sim_hw_uninstall;
-
-SIM_RC
-sim_hw_install (struct sim_state *sd)
-{
- SIM_ASSERT (STATE_MAGIC (sd) == SIM_MAGIC_NUMBER);
- sim_add_option_table (sd, NULL, hw_options);
- sim_module_add_uninstall_fn (sd, sim_hw_uninstall);
- sim_module_add_init_fn (sd, sim_hw_init);
- STATE_HW (sd) = ZALLOC (struct sim_hw);
- STATE_HW (sd)->tree = hw_tree_create (sd, "core");
- return SIM_RC_OK;
-}
-
-
-static SIM_RC
-sim_hw_init (struct sim_state *sd)
-{
- /* FIXME: anything needed? */
- hw_tree_finish (STATE_HW (sd)->tree);
- if (STATE_HW (sd)->info_p)
- sim_hw_print (sd, sim_io_vprintf);
- return SIM_RC_OK;
-}
-
-/* Uninstall the "hw" subsystem from the simulator. */
-
-static void
-sim_hw_uninstall (struct sim_state *sd)
-{
- /* hw_tree_delete (STATE_HW (sd)->tree); */
- zfree (STATE_HW (sd));
- STATE_HW (sd) = NULL;
-}
-
-
-
-/* Data transfers to/from the hardware device tree. There are several
- cases. */
-
-
-/* CPU: The simulation is running and the current CPU/CIA
- initiates a data transfer. */
-
-void
-sim_cpu_hw_io_read_buffer (sim_cpu *cpu,
- sim_cia cia,
- struct hw *hw,
- void *dest,
- int space,
- unsigned_word addr,
- unsigned nr_bytes)
-{
- SIM_DESC sd = CPU_STATE (cpu);
- STATE_HW (sd)->cpu = cpu;
- STATE_HW (sd)->cia = cia;
- if (hw_io_read_buffer (hw, dest, space, addr, nr_bytes) != nr_bytes)
- sim_engine_abort (sd, cpu, cia, "broken CPU read");
-}
-
-void
-sim_cpu_hw_io_write_buffer (sim_cpu *cpu,
- sim_cia cia,
- struct hw *hw,
- const void *source,
- int space,
- unsigned_word addr,
- unsigned nr_bytes)
-{
- SIM_DESC sd = CPU_STATE (cpu);
- STATE_HW (sd)->cpu = cpu;
- STATE_HW (sd)->cia = cia;
- if (hw_io_write_buffer (hw, source, space, addr, nr_bytes) != nr_bytes)
- sim_engine_abort (sd, cpu, cia, "broken CPU write");
-}
-
-
-
-
-/* SYSTEM: A data transfer is being initiated by the system. */
-
-unsigned
-sim_hw_io_read_buffer (struct sim_state *sd,
- struct hw *hw,
- void *dest,
- int space,
- unsigned_word addr,
- unsigned nr_bytes)
-{
- STATE_HW (sd)->cpu = NULL;
- return hw_io_read_buffer (hw, dest, space, addr, nr_bytes);
-}
-
-unsigned
-sim_hw_io_write_buffer (struct sim_state *sd,
- struct hw *hw,
- const void *source,
- int space,
- unsigned_word addr,
- unsigned nr_bytes)
-{
- STATE_HW (sd)->cpu = NULL;
- return hw_io_write_buffer (hw, source, space, addr, nr_bytes);
-}
-
-
-
-/* Abort the simulation specifying HW as the reason */
-
-void
-hw_vabort (struct hw *me,
- const char *fmt,
- va_list ap)
-{
- const char *name;
- char *msg;
- /* find an identity */
- if (me != NULL && hw_path (me) != NULL && hw_path (me) [0] != '\0')
- name = hw_path (me);
- else if (me != NULL && hw_name (me) != NULL && hw_name (me)[0] != '\0')
- name = hw_name (me);
- else if (me != NULL && hw_family (me) != NULL && hw_family (me)[0] != '\0')
- name = hw_family (me);
- else
- name = "device";
- /* construct an updated format string */
- msg = alloca (strlen (name) + strlen (": ") + strlen (fmt) + 1);
- strcpy (msg, name);
- strcat (msg, ": ");
- strcat (msg, fmt);
- /* report the problem */
- sim_engine_vabort (hw_system (me),
- STATE_HW (hw_system (me))->cpu,
- STATE_HW (hw_system (me))->cia,
- msg, ap);
-}
-
-void
-hw_abort (struct hw *me,
- const char *fmt,
- ...)
-{
- va_list ap;
- /* report the problem */
- va_start (ap, fmt);
- hw_vabort (me, fmt, ap);
- va_end (ap);
-}
-
-void
-sim_hw_abort (struct sim_state *sd,
- struct hw *me,
- const char *fmt,
- ...)
-{
- va_list ap;
- va_start (ap, fmt);
- if (me == NULL)
- sim_engine_vabort (sd, NULL, NULL_CIA, fmt, ap);
- else
- hw_vabort (me, fmt, ap);
- va_end (ap);
-}
-
-
-/* MISC routines to tie HW into the rest of the system */
-
-void
-hw_halt (struct hw *me,
- int reason,
- int status)
-{
- struct sim_state *sd = hw_system (me);
- struct sim_hw *sim = STATE_HW (sd);
- sim_engine_halt (sd, sim->cpu, NULL, sim->cia, reason, status);
-}
-
-struct _sim_cpu *
-hw_system_cpu (struct hw *me)
-{
- return STATE_HW (hw_system (me))->cpu;
-}
-
-void
-hw_trace (struct hw *me,
- const char *fmt,
- ...)
-{
- if (hw_trace_p (me)) /* to be sure, to be sure */
- {
- va_list ap;
- va_start (ap, fmt);
- sim_io_eprintf (hw_system (me), "%s: ", hw_path (me));
- sim_io_evprintf (hw_system (me), fmt, ap);
- sim_io_eprintf (hw_system (me), "\n");
- va_end (ap);
- }
-}
-
-
-/* Based on gdb-4.17/sim/ppc/main.c:sim_io_read_stdin() */
-
-int
-do_hw_poll_read (struct hw *me,
- do_hw_poll_read_method *read,
- int sim_io_fd,
- void *buf,
- unsigned sizeof_buf)
-{
- int status = read (hw_system (me), sim_io_fd, buf, sizeof_buf);
- if (status > 0)
- return status;
- else if (status == 0 && sizeof_buf == 0)
- return 0;
- else if (status == 0)
- return HW_IO_EOF;
- else /* status < 0 */
- {
-#ifdef EAGAIN
- if (STATE_CALLBACK (hw_system (me))->last_errno == EAGAIN)
- return HW_IO_NOT_READY;
- else
- return HW_IO_EOF;
-#else
- return HW_IO_EOF;
-#endif
- }
-}
diff --git a/sim/common/sim-hw.h b/sim/common/sim-hw.h
deleted file mode 100644
index 1bebd1829d3..00000000000
--- a/sim/common/sim-hw.h
+++ /dev/null
@@ -1,98 +0,0 @@
-/* Device definitions.
- Copyright (C) 1998 Free Software Foundation, Inc.
- Contributed by Cygnus Support.
-
-This file is part of GDB, the GNU debugger.
-
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License along
-with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
-
-#ifndef SIM_HW_H
-#define SIM_HW_H
-
-
-/* Establish this object */
-
-SIM_RC sim_hw_install
-(struct sim_state *sd);
-
-
-/* Parse a hardware definition */
-
-struct hw *sim_hw_parse
-(struct sim_state *sd,
- const char *fmt,
- ...) __attribute__ ((format (printf, 2, 3)));
-
-
-/* Print the hardware tree */
-
-void sim_hw_print
-(struct sim_state *sd,
- void (*print) (struct sim_state *, const char *, va_list ap));
-
-
-/* Abort the simulation specifying HW as the reason */
-
-void sim_hw_abort
-(SIM_DESC sd,
- struct hw *hw,
- const char *fmt,
- ...) __attribute__ ((format (printf, 3, 4)));
-
-
-
-/* CPU: The simulation is running and the current CPU/CIA
- initiates a data transfer. */
-
-void sim_cpu_hw_io_read_buffer
-(sim_cpu *cpu,
- sim_cia cia,
- struct hw *hw,
- void *dest,
- int space,
- unsigned_word addr,
- unsigned nr_bytes);
-
-void sim_cpu_hw_io_write_buffer
-(sim_cpu *cpu,
- sim_cia cia,
- struct hw *hw,
- const void *source,
- int space,
- unsigned_word addr,
- unsigned nr_bytes);
-
-
-
-/* SYSTEM: A data transfer is being initiated by the system. */
-
-unsigned sim_hw_io_read_buffer
-(struct sim_state *sd,
- struct hw *hw,
- void *dest,
- int space,
- unsigned_word addr,
- unsigned nr_bytes);
-
-unsigned sim_hw_io_write_buffer
-(struct sim_state *sd,
- struct hw *hw,
- const void *source,
- int space,
- unsigned_word addr,
- unsigned nr_bytes);
-
-
-#endif
diff --git a/sim/common/sim-info.c b/sim/common/sim-info.c
deleted file mode 100644
index 00832277315..00000000000
--- a/sim/common/sim-info.c
+++ /dev/null
@@ -1,32 +0,0 @@
-/* Generic memory read/write for hardware simulator models.
- Copyright (C) 1998 Free Software Foundation, Inc.
- Contributed by Cygnus Support.
-
-This file is part of GDB, the GNU debugger.
-
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License along
-with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
-
-#include "sim-main.h"
-#include "sim-assert.h"
-
-/* Generic implementation of sim_info that works with simulators using
- sim-module. */
-
-void
-sim_info (SIM_DESC sd, int verbose)
-{
- SIM_ASSERT (STATE_MAGIC (sd) == SIM_MAGIC_NUMBER);
- sim_module_info (sd, verbose || STATE_VERBOSE_P (sd));
-}
diff --git a/sim/common/sim-inline.c b/sim/common/sim-inline.c
deleted file mode 100644
index 770c65eb840..00000000000
--- a/sim/common/sim-inline.c
+++ /dev/null
@@ -1,96 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1997, Andrew Cagney <cagney@highland.com.au>
- Copyright (C) 1997, Free Software Foundation, Inc.
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-#ifndef SIM_INLINE_C
-#define SIM_INLINE_C
-
-#undef SIM_INLINE_P
-#define SIM_INLINE_P 1
-
-#include "sim-inline.h"
-#include "sim-main.h"
-
-
-#if C_REVEALS_MODULE_P (SIM_BITS_INLINE)
-#include "sim-bits.c"
-#endif
-
-
-#if C_REVEALS_MODULE_P (SIM_CORE_INLINE)
-#include "sim-core.c"
-#endif
-
-
-#if C_REVEALS_MODULE_P (SIM_ENDIAN_INLINE)
-#include "sim-endian.c"
-#endif
-
-
-#if C_REVEALS_MODULE_P (SIM_EVENTS_INLINE)
-#include "sim-events.c"
-#endif
-
-
-#if C_REVEALS_MODULE_P (SIM_FPU_INLINE)
-#include "sim-fpu.c"
-#endif
-
-
-#if C_REVEALS_MODULE_P (SIM_TYPES_INLINE)
-#include "sim-types.c"
-#endif
-
-
-#if C_REVEALS_MODULE_P (SIM_MAIN_INLINE)
-#include "sim-main.c"
-#endif
-
-
-#if C_REVEALS_MODULE_P (ENGINE_INLINE)
-/* #include "engine.c" - handled by generator */
-#endif
-
-
-#if C_REVEALS_MODULE_P (ICACHE_INLINE)
-/* #include "icache.c" - handled by generator */
-#endif
-
-
-#if C_REVEALS_MODULE_P (IDECODE_INLINE)
-/* #include "idecode.c" - handled by generator */
-#endif
-
-
-#if C_REVEALS_MODULE_P (SEMANTICS_INLINE)
-/* #include "semantics.c" - handled by generator */
-#endif
-
-
-#if C_REVEALS_MODULE_P (SUPPORT_INLINE)
-/* #include "support.c" - handled by generator */
-#endif
-
-
-#undef SIM_INLINE_P
-#define SIM_INLINE_P 0
-
-#endif
diff --git a/sim/common/sim-inline.h b/sim/common/sim-inline.h
deleted file mode 100644
index 300658d374e..00000000000
--- a/sim/common/sim-inline.h
+++ /dev/null
@@ -1,810 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1997, Andrew Cagney <cagney@highland.com.au>
- Copyright (C) 1997, Free Software Foundation, Inc.
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-#ifndef SIM_INLINE_H
-#define SIM_INLINE_H
-
-
-/* INLINE CODE SELECTION:
-
- GCC -O3 attempts to inline any function or procedure in scope. The
- options below facilitate finer grained control over what is and
- what is not inlined. In particular, it allows the selection of
- modules for inlining. Doing this allows the compiler to both
- eliminate the overhead of function calls and (as a consequence)
- also eliminate further dead code.
-
- On a CISC (x86) I've found that I can achieve an order of magintude
- speed improvement (x3-x5). In the case of RISC (sparc) while the
- performance gain isn't as great it is still significant.
-
- Each module is controled by the macro <module>_INLINE which can
- have the values described below
-
- 0 (ZERO)
-
- Do not inline any thing for the given module
-
- The following bit fields values can be combined:
-
- H_REVEALS_MODULE:
- C_REVEALS_MODULE:
-
- Include the C file for the module into the file being
- compiled. The actual inlining is controlled separatly.
-
- While of no apparent benefit, this makes it possible for the
- included module, when compiled, to inline its calls to what
- would otherwize be external functions.
-
- {C_,H_} Determines where the module is inlined. A
- H_REVEALS_MODULE will be included everywhere.
-
- INLINE_GLOBALS:
-
- Make external functions within the module `inline'. Thus if
- the module is included into a file being compiled, calls to
- the included modules funtions can be eliminated. INLINE_MODULE
- implies REVEAL_MODULE.
-
- INLINE_LOCALS:
-
- Make internal (static) functions within the module `inline'.
-
-
- CODING STYLE:
-
- The inline ability is enabled by specifying every data and function
- declaration and definition using one of the following methods:
-
-
- GLOBAL INLINE FUNCTIONS:
-
- Such functions are small and used heavily. Inlining them
- will eliminate an unnecessary function call overhead.
-
- .h: INLINE_OURPKG (void) ourpkg_func
- (int x,
- int y);
-
- .c: INLINE_OURPKG (void)
- ourpkg_func (int x,
- int y)
- {
- ...
- }
-
-
- GLOBAL INLINE VARIABLES:
-
- This doesn't make much sense.
-
-
- GLOBAL NON-INLINE (EXTERN) FUNCTIONS AND VARIABLES:
-
- These include functions with varargs parameters. It can
- also include large rarely used functions that contribute
- little when inlined.
-
- .h: extern int ourpkg_print
- (char *fmt, ...);
- extern int a_global_variable;
-
- .c: #if EXTERN_OURPKG_P
- int
- ourpkg_print (char *fmt,
- ...)
- {
- ...
- }
- #endif
- #if EXTERN_OURPKG_P
- int a_global_variable = 1;
- #endif
-
-
- LOCAL (STATIC) FUNCTIONS:
-
- These can either be marked inline or just static static vis:
-
- .h: STATIC_INLINE_OURPKG (int) ourpkg_staticf (void);
- .c: STATIC_INLINE_OURPKG (int)
- ourpkg_staticf (void)
- {
- ..
- }
-
- .h: STATIC_OURPKG (int) ourpkg_staticf (void);
- .c: STATIC_OURPKG (int)
- ourpkg_staticf (void)
- {
- ..
- }
-
-
- All .h files:
-
-
- All modules must wrap their .h code in the following:
-
- #ifndef OURPKG_H
- #define OURPKG_H
- ... code proper ...
- #endif
-
- In addition, modules that want to allow global inlining must
- include the lines (below) at the end of the .h file. (FIXME:
- Shouldn't be needed).
-
- #if H_REVEALS_MODULE_P (OURPKG_INLINE)
- #include "ourpkg.c"
- #endif
-
-
- All .c files:
-
- All modules must wrap their .c code in the following
-
- #ifndef OURPKG_C
- #define OURPKG_C
- ... code proper ...
- #endif
-
-
- NOW IT WORKS:
-
- 0:
-
- Since no inlining is defined. All macro's get standard defaults
- (extern, static, ...).
-
-
-
- H_REVEALS_MODULE (alt includes our):
-
-
- altprog.c defines ALTPROG_C and then includes sim-inline.h.
-
- In sim-inline.h the expression `` H_REVEALS_MODULE_P
- (OURPROG_INLINE) && ! defined (OURPROG_C) && REVEAL_MODULE_P
- (OURPROG_INLINE) '' is TRUE so it defines *_OURPROG as static
- and EXTERN_OURPROG_P as FALSE.
-
- altprog.c includes ourprog.h.
-
- In ourprog.h the expression ``H_REVEALS_MODULE_P
- (OURPROG_INLINE)'' is TRUE so it includes ourprog.c.
-
- Consequently, all the code in ourprog.c is visible and static in
- the file altprog.c
-
-
-
- H_REVEALS_MODULE (our includes our):
-
-
- ourprog.c defines OURPROG_C and then includes sim-inline.h.
-
- In sim-inline.h the term `` ! defined (OURPROG_C) '' is FALSE so
- it defines *_OURPROG as non-static and EXTERN_OURPROG_P as TRUE.
-
- ourprog.c includes ourprog.h.
-
- In ourprog.h the expression ``H_REVEALS_MODULE_P
- (OURPROG_INLINE)'' is true so it includes ourprog.c.
-
- In ourprog.c (second include) the expression defined (OURPROG_C)
- and so the body is not re-included.
-
- Consequently, ourprog.o will contain a non-static copy of all
- the exported symbols.
-
-
-
- C_REVEALS_MODULE (alt includes our):
-
-
- altprog.c defines ALTPROG_C and then includes sim-inline.c
-
- sim-inline.c defines C_INLINE_C and then includes sim-inline.h
-
- In sim-inline.h the expression `` defined (SIM_INLINE) && !
- defined (OURPROG_C) && REVEAL_MODULE_P (OURPROG_INLINE) '' is
- true so it defines *_OURPROG as static and EXTERN_OURPROG_P as
- FALSE.
-
- In sim-inline.c the expression ``C_REVEALS_MODULE_P
- (OURPROG_INLINE)'' is true so it includes ourprog.c.
-
- Consequently, all the code in ourprog.c is visible and static in
- the file altprog.c.
-
-
-
- C_REVEALS_MODULE (our includes our):
-
-
- ourprog.c defines OURPROG_C and then includes sim-inline.c
-
- sim-inline.c defines C_INLINE_C and then includes sim-inline.h
-
- In sim-inline.h the term `` ! defined (OURPROG_C) '' is FALSE
- so it defines *_OURPROG as non-static and EXTERN_OURPROG_P as
- TRUE.
-
- Consequently, ourprog.o will contain a non-static copy of all
- the exported symbols.
-
-
-
- REALITY CHECK:
-
- This is not for the faint hearted. I've seen GCC get up to 500mb
- trying to compile what this can create. */
-
-#define H_REVEALS_MODULE 1
-#define C_REVEALS_MODULE 2
-#define INLINE_GLOBALS 4
-#define INLINE_LOCALS 8
-
-#define REGPARM_MODULE 32
-
-#define ALL_H_INLINE (H_REVEALS_MODULE | INLINE_GLOBALS | INLINE_LOCALS)
-#define ALL_C_INLINE (C_REVEALS_MODULE | INLINE_GLOBALS | INLINE_LOCALS)
-
-
-/* Default macro to simplify control several of key the inlines */
-
-#ifndef DEFAULT_INLINE
-#define DEFAULT_INLINE INLINE_LOCALS
-#endif
-
-#define REVEAL_MODULE_P(X) (X & (H_REVEALS_MODULE | C_REVEALS_MODULE))
-#define H_REVEALS_MODULE_P(X) ((X & H_REVEALS_MODULE))
-#define C_REVEALS_MODULE_P(X) ((X & C_REVEALS_MODULE))
-
-
-#ifndef HAVE_INLINE
-#ifdef __GNUC__
-#define HAVE_INLINE
-#endif
-#endif
-
-
-/* Your compilers inline prefix */
-
-#ifndef INLINE
-#if defined (__GNUC__) && defined (__OPTIMIZE__)
-#define INLINE __inline__
-#else
-#define INLINE /*inline*/
-#endif
-#endif
-
-/* ??? Temporary, pending decision to always use extern inline and do a vast
- cleanup of inline support. */
-#ifndef INLINE2
-#if defined (__GNUC__)
-#define INLINE2 __inline__
-#else
-#define INLINE2 /*inline*/
-#endif
-#endif
-
-
-/* Your compiler's static inline prefix */
-
-#ifndef STATIC_INLINE
-#define STATIC_INLINE static INLINE
-#endif
-
-
-/* Your compiler's extern inline prefix */
-
-#ifndef EXTERN_INLINE
-#define EXTERN_INLINE extern INLINE2
-#endif
-
-
-/* Your compiler's no-return reserved word */
-
-#ifndef NORETURN
-#define NORETURN
-#endif
-
-
-
-/* Your compilers's unused reserved word */
-
-#if !defined (UNUSED)
-#if (!defined (__GNUC__) \
- || (__GNUC__ < 2) \
- || (__GNUC__ == 2 && __GNUC_MINOR__ < 7))
-#define UNUSED
-#else
-#define UNUSED __attribute__((__unused__))
-#endif
-#endif
-
-
-
-
-/* Your compilers nonstandard function call mechanism prefix */
-
-#if !defined REGPARM
-#if defined (__GNUC__) && (defined (__i386__) || defined (__i486__) || defined (__i586__) || defined (__i686__))
-#if (WITH_REGPARM && WITH_STDCALL)
-#define REGPARM __attribute__((__regparm__(WITH_REGPARM),__stdcall__))
-#else
-#if (WITH_REGPARM && !WITH_STDCALL)
-#define REGPARM __attribute__((__regparm__(WITH_REGPARM)))
-#else
-#if (!WITH_REGPARM && WITH_STDCALL)
-#define REGPARM __attribute__((__stdcall__))
-#endif
-#endif
-#endif
-#endif
-#endif
-
-#if !defined REGPARM
-#define REGPARM
-#endif
-
-
-
-/* *****
- sim-bits and sim-endian are treated differently from the rest
- of the modules below. Their default value is ALL_H_INLINE.
- The rest are ALL_C_INLINE. Don't blink, you'll miss it!
- *****
- */
-
-/* sim-bits */
-
-#if !defined (SIM_BITS_INLINE) && (DEFAULT_INLINE)
-# define SIM_BITS_INLINE (ALL_H_INLINE)
-#endif
-
-#if (SIM_BITS_INLINE & REGPARM_MODULE)
-# define REGPARM_SIM_BITS REGPARM
-#else
-# define REGPARM_SIM_BITS
-#endif
-
-#if ((H_REVEALS_MODULE_P (SIM_BITS_INLINE) || defined (SIM_INLINE_C)) \
- && !defined (SIM_BITS_C) \
- && (REVEAL_MODULE_P (SIM_BITS_INLINE)))
-# if (SIM_BITS_INLINE & INLINE_GLOBALS)
-# define INLINE_SIM_BITS(TYPE) static INLINE TYPE UNUSED
-# define EXTERN_SIM_BITS_P 0
-# else
-# define INLINE_SIM_BITS(TYPE) static TYPE UNUSED REGPARM_SIM_BITS
-# define EXTERN_SIM_BITS_P 0
-# endif
-#else
-# define INLINE_SIM_BITS(TYPE) TYPE REGPARM_SIM_BITS
-# define EXTERN_SIM_BITS_P 1
-#endif
-
-#if (SIM_BITS_INLINE & INLINE_LOCALS)
-# define STATIC_INLINE_SIM_BITS(TYPE) static INLINE TYPE
-#else
-# define STATIC_INLINE_SIM_BITS(TYPE) static TYPE REGPARM_SIM_BITS
-#endif
-
-#define STATIC_SIM_BITS(TYPE) static TYPE
-
-
-
-/* sim-core */
-
-#if !defined (SIM_CORE_INLINE) && (DEFAULT_INLINE)
-# define SIM_CORE_INLINE ALL_C_INLINE
-#endif
-
-#if (SIM_CORE_INLINE & REGPARM_MODULE)
-# define REGPARM_SIM_CORE REGPARM
-#else
-# define REGPARM_SIM_CORE
-#endif
-
-#if ((H_REVEALS_MODULE_P (SIM_CORE_INLINE) || defined (SIM_INLINE_C)) \
- && !defined (SIM_CORE_C) \
- && (REVEAL_MODULE_P (SIM_CORE_INLINE)))
-# if (SIM_CORE_INLINE & INLINE_GLOBALS)
-# define INLINE_SIM_CORE(TYPE) static INLINE TYPE UNUSED
-# define EXTERN_SIM_CORE_P 0
-#else
-# define INLINE_SIM_CORE(TYPE) static TYPE UNUSED REGPARM_SIM_CORE
-# define EXTERN_SIM_CORE_P 0
-#endif
-#else
-# define INLINE_SIM_CORE(TYPE) TYPE REGPARM_SIM_CORE
-# define EXTERN_SIM_CORE_P 1
-#endif
-
-#if (SIM_CORE_INLINE & INLINE_LOCALS)
-# define STATIC_INLINE_SIM_CORE(TYPE) static INLINE TYPE
-#else
-# define STATIC_INLINE_SIM_CORE(TYPE) static TYPE REGPARM_SIM_CORE
-#endif
-
-#define STATIC_SIM_CORE(TYPE) static TYPE
-
-
-
-/* sim-endian */
-
-#if !defined (SIM_ENDIAN_INLINE) && (DEFAULT_INLINE)
-# define SIM_ENDIAN_INLINE ALL_H_INLINE
-#endif
-
-#if (SIM_ENDIAN_INLINE & REGPARM_MODULE)
-# define REGPARM_SIM_ENDIAN REGPARM
-#else
-# define REGPARM_SIM_ENDIAN
-#endif
-
-#if ((H_REVEALS_MODULE_P (SIM_ENDIAN_INLINE) || defined (SIM_INLINE_C)) \
- && !defined (SIM_ENDIAN_C) \
- && (REVEAL_MODULE_P (SIM_ENDIAN_INLINE)))
-# if (SIM_ENDIAN_INLINE & INLINE_GLOBALS)
-# define INLINE_SIM_ENDIAN(TYPE) static INLINE TYPE UNUSED
-# define EXTERN_SIM_ENDIAN_P 0
-# else
-# define INLINE_SIM_ENDIAN(TYPE) static TYPE UNUSED REGPARM_SIM_ENDIAN
-# define EXTERN_SIM_ENDIAN_P 0
-# endif
-#else
-# define INLINE_SIM_ENDIAN(TYPE) TYPE REGPARM_SIM_ENDIAN
-# define EXTERN_SIM_ENDIAN_P 1
-#endif
-
-#if (SIM_ENDIAN_INLINE & INLINE_LOCALS)
-# define STATIC_INLINE_SIM_ENDIAN(TYPE) static INLINE TYPE
-#else
-# define STATIC_INLINE_SIM_ENDIAN(TYPE) static TYPE REGPARM_SIM_ENDIAN
-#endif
-
-#define STATIC_SIM_ENDIAN(TYPE) static TYPE
-
-
-
-/* sim-events */
-
-#if !defined (SIM_EVENTS_INLINE) && (DEFAULT_INLINE)
-# define SIM_EVENTS_INLINE ALL_C_INLINE
-#endif
-
-#if (SIM_EVENTS_INLINE & REGPARM_MODULE)
-# define REGPARM_SIM_EVENTS REGPARM
-#else
-# define REGPARM_SIM_EVENTS
-#endif
-
-#if ((H_REVEALS_MODULE_P (SIM_EVENTS_INLINE) || defined (SIM_INLINE_C)) \
- && !defined (SIM_EVENTS_C) \
- && (REVEAL_MODULE_P (SIM_EVENTS_INLINE)))
-# if (SIM_EVENTS_INLINE & INLINE_GLOBALS)
-# define INLINE_SIM_EVENTS(TYPE) static INLINE TYPE UNUSED
-# define EXTERN_SIM_EVENTS_P 0
-# else
-# define INLINE_SIM_EVENTS(TYPE) static TYPE UNUSED REGPARM_SIM_EVENTS
-# define EXTERN_SIM_EVENTS_P 0
-# endif
-#else
-# define INLINE_SIM_EVENTS(TYPE) TYPE REGPARM_SIM_EVENTS
-# define EXTERN_SIM_EVENTS_P 1
-#endif
-
-#if (SIM_EVENTS_INLINE & INLINE_LOCALS)
-# define STATIC_INLINE_SIM_EVENTS(TYPE) static INLINE TYPE
-#else
-# define STATIC_INLINE_SIM_EVENTS(TYPE) static TYPE REGPARM_SIM_EVENTS
-#endif
-
-#define STATIC_SIM_EVENTS(TYPE) static TYPE
-
-
-
-/* sim-fpu */
-
-#if !defined (SIM_FPU_INLINE) && (DEFAULT_INLINE)
-# define SIM_FPU_INLINE ALL_C_INLINE
-#endif
-
-#if (SIM_FPU_INLINE & REGPARM_MODULE)
-# define REGPARM_SIM_FPU REGPARM
-#else
-# define REGPARM_SIM_FPU
-#endif
-
-#if ((H_REVEALS_MODULE_P (SIM_FPU_INLINE) || defined (SIM_INLINE_C)) \
- && !defined (SIM_FPU_C) \
- && (REVEAL_MODULE_P (SIM_FPU_INLINE)))
-# if (SIM_FPU_INLINE & INLINE_GLOBALS)
-# define INLINE_SIM_FPU(TYPE) static INLINE TYPE UNUSED
-# define EXTERN_SIM_FPU_P 0
-# else
-# define INLINE_SIM_FPU(TYPE) static TYPE UNUSED REGPARM_SIM_FPU
-# define EXTERN_SIM_FPU_P 0
-# endif
-#else
-# define INLINE_SIM_FPU(TYPE) TYPE REGPARM_SIM_FPU
-# define EXTERN_SIM_FPU_P 1
-#endif
-
-#if (SIM_FPU_INLINE & INLINE_LOCALS)
-# define STATIC_INLINE_SIM_FPU(TYPE) static INLINE TYPE
-#else
-# define STATIC_INLINE_SIM_FPU(TYPE) static TYPE REGPARM_SIM_FPU
-#endif
-
-#define STATIC_SIM_FPU(TYPE) static TYPE
-
-
-
-/* sim-types */
-
-#if (SIM_TYPES_INLINE & REGPARM_MODULE)
-# define REGPARM_SIM_TYPES REGPARM
-#else
-# define REGPARM_SIM_TYPES
-#endif
-
-#if ((H_REVEALS_MODULE_P (SIM_TYPES_INLINE) || defined (SIM_INLINE_C)) \
- && !defined (SIM_TYPES_C) \
- && (REVEAL_MODULE_P (SIM_TYPES_INLINE)))
-# if (SIM_TYPES_INLINE & INLINE_GLOBALS)
-# define INLINE_SIM_TYPES(TYPE) static INLINE TYPE UNUSED
-# define EXTERN_SIM_TYPES_P 0
-# else
-# define INLINE_SIM_TYPES(TYPE) static TYPE UNUSED REGPARM_SIM_TYPES
-# define EXTERN_SIM_TYPES_P 0
-# endif
-#else
-# define INLINE_SIM_TYPES(TYPE) TYPE REGPARM_SIM_TYPES
-# define EXTERN_SIM_TYPES_P 1
-#endif
-
-#if (SIM_TYPES_INLINE & INLINE_LOCALS)
-# define STATIC_INLINE_SIM_TYPES(TYPE) static INLINE TYPE
-#else
-# define STATIC_INLINE_SIM_TYPES(TYPE) static TYPE REGPARM_SIM_TYPES
-#endif
-
-#define STATIC_SIM_TYPES(TYPE) static TYPE
-
-
-
-/* sim_main */
-
-#if !defined (SIM_MAIN_INLINE) && (DEFAULT_INLINE)
-# define SIM_MAIN_INLINE (ALL_C_INLINE)
-#endif
-
-#if (SIM_MAIN_INLINE & REGPARM_MODULE)
-# define REGPARM_SIM_MAIN REGPARM
-#else
-# define REGPARM_SIM_MAIN
-#endif
-
-#if ((H_REVEALS_MODULE_P (SIM_MAIN_INLINE) || defined (SIM_INLINE_C)) \
- && !defined (SIM_MAIN_C) \
- && (REVEAL_MODULE_P (SIM_MAIN_INLINE)))
-# if (SIM_MAIN_INLINE & INLINE_GLOBALS)
-# define INLINE_SIM_MAIN(TYPE) static INLINE TYPE UNUSED
-# define EXTERN_SIM_MAIN_P 0
-# else
-# define INLINE_SIM_MAIN(TYPE) static TYPE UNUSED REGPARM_SIM_MAIN
-# define EXTERN_SIM_MAIN_P 0
-# endif
-#else
-# define INLINE_SIM_MAIN(TYPE) TYPE REGPARM_SIM_MAIN
-# define EXTERN_SIM_MAIN_P 1
-#endif
-
-#if (SIM_MAIN_INLINE & INLINE_LOCALS)
-# define STATIC_INLINE_SIM_MAIN(TYPE) static INLINE TYPE
-#else
-# define STATIC_INLINE_SIM_MAIN(TYPE) static TYPE REGPARM_SIM_MAIN
-#endif
-
-#define STATIC_SIM_MAIN(TYPE) static TYPE
-
-/* engine */
-
-#if (ENGINE_INLINE & REGPARM_MODULE)
-# define REGPARM_ENGINE REGPARM
-#else
-# define REGPARM_ENGINE
-#endif
-
-#if ((H_REVEALS_MODULE_P (ENGINE_INLINE) || defined (SIM_INLINE_C)) \
- && !defined (ENGINE_C) \
- && (REVEAL_MODULE_P (ENGINE_INLINE)))
-# if (ENGINE_INLINE & INLINE_GLOBALS)
-# define INLINE_ENGINE(TYPE) static INLINE TYPE UNUSED
-# define EXTERN_ENGINE_P 0
-# else
-# define INLINE_ENGINE(TYPE) static TYPE UNUSED REGPARM_ENGINE
-# define EXTERN_ENGINE_P 0
-# endif
-#else
-# define INLINE_ENGINE(TYPE) TYPE REGPARM_ENGINE
-# define EXTERN_ENGINE_P 1
-#endif
-
-#if (ENGINE_INLINE & INLINE_LOCALS)
-# define STATIC_INLINE_ENGINE(TYPE) static INLINE TYPE
-#else
-# define STATIC_INLINE_ENGINE(TYPE) static TYPE REGPARM_ENGINE
-#endif
-
-#define STATIC_ENGINE(TYPE) static TYPE
-
-
-
-/* icache */
-
-#if (ICACHE_INLINE & REGPARM_MODULE)
-# define REGPARM_ICACHE REGPARM
-#else
-# define REGPARM_ICACHE
-#endif
-
-#if ((H_REVEALS_MODULE_P (ICACHE_INLINE) || defined (SIM_INLINE_C)) \
- && !defined (ICACHE_C) \
- && (REVEAL_MODULE_P (ICACHE_INLINE)))
-# if (ICACHE_INLINE & INLINE_GLOBALS)
-# define INLINE_ICACHE(TYPE) static INLINE TYPE UNUSED
-# define EXTERN_ICACHE_P 0
-#else
-# define INLINE_ICACHE(TYPE) static TYPE UNUSED REGPARM_ICACHE
-# define EXTERN_ICACHE_P 0
-#endif
-#else
-# define INLINE_ICACHE(TYPE) TYPE REGPARM_ICACHE
-# define EXTERN_ICACHE_P 1
-#endif
-
-#if (ICACHE_INLINE & INLINE_LOCALS)
-# define STATIC_INLINE_ICACHE(TYPE) static INLINE TYPE
-#else
-# define STATIC_INLINE_ICACHE(TYPE) static TYPE REGPARM_ICACHE
-#endif
-
-#define STATIC_ICACHE(TYPE) static TYPE
-
-
-
-/* idecode */
-
-#if (IDECODE_INLINE & REGPARM_MODULE)
-# define REGPARM_IDECODE REGPARM
-#else
-# define REGPARM_IDECODE
-#endif
-
-#if ((H_REVEALS_MODULE_P (IDECODE_INLINE) || defined (SIM_INLINE_C)) \
- && !defined (IDECODE_C) \
- && (REVEAL_MODULE_P (IDECODE_INLINE)))
-# if (IDECODE_INLINE & INLINE_GLOBALS)
-# define INLINE_IDECODE(TYPE) static INLINE TYPE UNUSED
-# define EXTERN_IDECODE_P 0
-#else
-# define INLINE_IDECODE(TYPE) static TYPE UNUSED REGPARM_IDECODE
-# define EXTERN_IDECODE_P 0
-#endif
-#else
-# define INLINE_IDECODE(TYPE) TYPE REGPARM_IDECODE
-# define EXTERN_IDECODE_P 1
-#endif
-
-#if (IDECODE_INLINE & INLINE_LOCALS)
-# define STATIC_INLINE_IDECODE(TYPE) static INLINE TYPE
-#else
-# define STATIC_INLINE_IDECODE(TYPE) static TYPE REGPARM_IDECODE
-#endif
-
-#define STATIC_IDECODE(TYPE) static TYPE
-
-
-
-/* semantics */
-
-#if (SEMANTICS_INLINE & REGPARM_MODULE)
-# define REGPARM_SEMANTICS REGPARM
-#else
-# define REGPARM_SEMANTICS
-#endif
-
-#if ((H_REVEALS_MODULE_P (SEMANTICS_INLINE) || defined (SIM_INLINE_C)) \
- && !defined (SEMANTICS_C) \
- && (REVEAL_MODULE_P (SEMANTICS_INLINE)))
-# if (SEMANTICS_INLINE & INLINE_GLOBALS)
-# define INLINE_SEMANTICS(TYPE) static INLINE TYPE UNUSED
-# define EXTERN_SEMANTICS_P 0
-#else
-# define INLINE_SEMANTICS(TYPE) static TYPE UNUSED REGPARM_SEMANTICS
-# define EXTERN_SEMANTICS_P 0
-#endif
-#else
-# define INLINE_SEMANTICS(TYPE) TYPE REGPARM_SEMANTICS
-# define EXTERN_SEMANTICS_P 1
-#endif
-
-#if EXTERN_SEMANTICS_P
-# define EXTERN_SEMANTICS(TYPE) TYPE REGPARM_SEMANTICS
-#else
-# define EXTERN_SEMANTICS(TYPE) static TYPE UNUSED REGPARM_SEMANTICS
-#endif
-
-#if (SEMANTICS_INLINE & INLINE_LOCALS)
-# define STATIC_INLINE_SEMANTICS(TYPE) static INLINE TYPE
-#else
-# define STATIC_INLINE_SEMANTICS(TYPE) static TYPE REGPARM_SEMANTICS
-#endif
-
-#define STATIC_SEMANTICS(TYPE) static TYPE
-
-
-
-/* support */
-
-#if !defined (SUPPORT_INLINE) && (DEFAULT_INLINE)
-# define SUPPORT_INLINE ALL_C_INLINE
-#endif
-
-#if (SUPPORT_INLINE & REGPARM_MODULE)
-# define REGPARM_SUPPORT REGPARM
-#else
-# define REGPARM_SUPPORT
-#endif
-
-#if ((H_REVEALS_MODULE_P (SUPPORT_INLINE) || defined (SIM_INLINE_C)) \
- && !defined (SUPPORT_C) \
- && (REVEAL_MODULE_P (SUPPORT_INLINE)))
-# if (SUPPORT_INLINE & INLINE_GLOBALS)
-# define INLINE_SUPPORT(TYPE) static INLINE TYPE UNUSED
-# define EXTERN_SUPPORT_P 0
-#else
-# define INLINE_SUPPORT(TYPE) static TYPE UNUSED REGPARM_SUPPORT
-# define EXTERN_SUPPORT_P 0
-#endif
-#else
-# define INLINE_SUPPORT(TYPE) TYPE REGPARM_SUPPORT
-# define EXTERN_SUPPORT_P 1
-#endif
-
-#if (SUPPORT_INLINE & INLINE_LOCALS)
-# define STATIC_INLINE_SUPPORT(TYPE) static INLINE TYPE
-#else
-# define STATIC_INLINE_SUPPORT(TYPE) static TYPE REGPARM_SUPPORT
-#endif
-
-#define STATIC_SUPPORT(TYPE) static TYPE
-
-
-
-#endif
diff --git a/sim/common/sim-io.c b/sim/common/sim-io.c
deleted file mode 100644
index 26f44451a30..00000000000
--- a/sim/common/sim-io.c
+++ /dev/null
@@ -1,389 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1997, Andrew Cagney <cagney@highland.com.au>
- Copyright (C) 1998, Cygnus Solutions.
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-#include "sim-main.h"
-#include "sim-io.h"
-#include "targ-vals.h"
-
-#include <errno.h>
-#if HAVE_FCNTL_H
-#include <fcntl.h>
-#endif
-
-#if HAVE_UNISTD_H
-#include <unistd.h>
-#endif
-
-/* Define the rate at which the simulator should poll the host
- for a quit. */
-#ifndef POLL_QUIT_INTERVAL
-#define POLL_QUIT_INTERVAL 0x10
-#endif
-
-static int poll_quit_count = POLL_QUIT_INTERVAL;
-
-/* See the file include/callbacks.h for a description */
-
-
-int
-sim_io_init(SIM_DESC sd)
-{
- return STATE_CALLBACK (sd)->init (STATE_CALLBACK (sd));
-}
-
-
-int
-sim_io_shutdown(SIM_DESC sd)
-{
- return STATE_CALLBACK (sd)->shutdown (STATE_CALLBACK (sd));
-}
-
-
-int
-sim_io_unlink(SIM_DESC sd,
- const char *f1)
-{
- return STATE_CALLBACK (sd)->unlink (STATE_CALLBACK (sd), f1);
-}
-
-
-long
-sim_io_time(SIM_DESC sd,
- long *t)
-{
- return STATE_CALLBACK (sd)->time (STATE_CALLBACK (sd), t);
-}
-
-
-int
-sim_io_system(SIM_DESC sd, const char *s)
-{
- return STATE_CALLBACK (sd)->system (STATE_CALLBACK (sd), s);
-}
-
-
-int
-sim_io_rename(SIM_DESC sd,
- const char *f1,
- const char *f2)
-{
- return STATE_CALLBACK (sd)->rename (STATE_CALLBACK (sd), f1, f2);
-}
-
-
-int
-sim_io_write_stdout(SIM_DESC sd,
- const char *buf,
- int len)
-{
- switch (CURRENT_STDIO) {
- case DO_USE_STDIO:
- return STATE_CALLBACK (sd)->write_stdout (STATE_CALLBACK (sd), buf, len);
- break;
- case DONT_USE_STDIO:
- return STATE_CALLBACK (sd)->write (STATE_CALLBACK (sd), 1, buf, len);
- break;
- default:
- sim_io_error (sd, "sim_io_write_stdout: unaccounted switch\n");
- break;
- }
- return 0;
-}
-
-
-void
-sim_io_flush_stdout(SIM_DESC sd)
-{
- switch (CURRENT_STDIO) {
- case DO_USE_STDIO:
- STATE_CALLBACK (sd)->flush_stdout (STATE_CALLBACK (sd));
- break;
- case DONT_USE_STDIO:
- break;
- default:
- sim_io_error (sd, "sim_io_flush_stdout: unaccounted switch\n");
- break;
- }
-}
-
-
-int
-sim_io_write_stderr(SIM_DESC sd,
- const char *buf,
- int len)
-{
- switch (CURRENT_STDIO) {
- case DO_USE_STDIO:
- return STATE_CALLBACK (sd)->write_stderr (STATE_CALLBACK (sd), buf, len);
- break;
- case DONT_USE_STDIO:
- return STATE_CALLBACK (sd)->write (STATE_CALLBACK (sd), 2, buf, len);
- break;
- default:
- sim_io_error (sd, "sim_io_write_stderr: unaccounted switch\n");
- break;
- }
- return 0;
-}
-
-
-void
-sim_io_flush_stderr(SIM_DESC sd)
-{
- switch (CURRENT_STDIO) {
- case DO_USE_STDIO:
- STATE_CALLBACK (sd)->flush_stderr (STATE_CALLBACK (sd));
- break;
- case DONT_USE_STDIO:
- break;
- default:
- sim_io_error (sd, "sim_io_flush_stderr: unaccounted switch\n");
- break;
- }
-}
-
-
-int
-sim_io_write(SIM_DESC sd,
- int fd,
- const char *buf,
- int len)
-{
- return STATE_CALLBACK (sd)->write (STATE_CALLBACK (sd), fd, buf, len);
-}
-
-
-int
-sim_io_read_stdin(SIM_DESC sd,
- char *buf,
- int len)
-{
- switch (CURRENT_STDIO) {
- case DO_USE_STDIO:
- return STATE_CALLBACK (sd)->read_stdin (STATE_CALLBACK (sd), buf, len);
- break;
- case DONT_USE_STDIO:
- return STATE_CALLBACK (sd)->read (STATE_CALLBACK (sd), 0, buf, len);
- break;
- default:
- sim_io_error (sd, "sim_io_read_stdin: unaccounted switch\n");
- break;
- }
- return 0;
-}
-
-
-int
-sim_io_read(SIM_DESC sd, int fd,
- char *buf,
- int len)
-{
- return STATE_CALLBACK (sd)->read (STATE_CALLBACK (sd), fd, buf, len);
-}
-
-
-int
-sim_io_open(SIM_DESC sd,
- const char *name,
- int flags)
-{
- return STATE_CALLBACK (sd)->open (STATE_CALLBACK (sd), name, flags);
-}
-
-
-int
-sim_io_lseek(SIM_DESC sd,
- int fd,
- long off,
- int way)
-{
- return STATE_CALLBACK (sd)->lseek (STATE_CALLBACK (sd), fd, off, way);
-}
-
-
-int
-sim_io_isatty(SIM_DESC sd,
- int fd)
-{
- return STATE_CALLBACK (sd)->isatty (STATE_CALLBACK (sd), fd);
-}
-
-
-int
-sim_io_get_errno(SIM_DESC sd)
-{
- return STATE_CALLBACK (sd)->get_errno (STATE_CALLBACK (sd));
-}
-
-
-int
-sim_io_close(SIM_DESC sd,
- int fd)
-{
- return STATE_CALLBACK (sd)->close (STATE_CALLBACK (sd), fd);
-}
-
-
-void
-sim_io_printf(SIM_DESC sd,
- const char *fmt,
- ...)
-{
- va_list ap;
- va_start(ap, fmt);
- STATE_CALLBACK (sd)->vprintf_filtered (STATE_CALLBACK (sd), fmt, ap);
- va_end(ap);
-}
-
-
-void
-sim_io_vprintf(SIM_DESC sd,
- const char *fmt,
- va_list ap)
-{
- STATE_CALLBACK (sd)->vprintf_filtered (STATE_CALLBACK (sd), fmt, ap);
-}
-
-
-void
-sim_io_eprintf(SIM_DESC sd,
- const char *fmt,
- ...)
-{
- va_list ap;
- va_start(ap, fmt);
- STATE_CALLBACK (sd)->evprintf_filtered (STATE_CALLBACK (sd), fmt, ap);
- va_end(ap);
-}
-
-
-void
-sim_io_evprintf(SIM_DESC sd,
- const char *fmt,
- va_list ap)
-{
- STATE_CALLBACK (sd)->evprintf_filtered (STATE_CALLBACK (sd), fmt, ap);
-}
-
-
-void
-sim_io_error(SIM_DESC sd,
- const char *fmt,
- ...)
-{
- if (sd == NULL || STATE_CALLBACK (sd) == NULL) {
- va_list ap;
- va_start(ap, fmt);
- vfprintf (stderr, fmt, ap);
- va_end(ap);
- fprintf (stderr, "\n");
- abort ();
- }
- else {
- va_list ap;
- va_start(ap, fmt);
- STATE_CALLBACK (sd)->evprintf_filtered (STATE_CALLBACK (sd), fmt, ap);
- va_end(ap);
- STATE_CALLBACK (sd)->error (STATE_CALLBACK (sd), "");
- }
-}
-
-
-void
-sim_io_poll_quit(SIM_DESC sd)
-{
- if (STATE_CALLBACK (sd)->poll_quit != NULL && poll_quit_count-- < 0)
- {
- poll_quit_count = POLL_QUIT_INTERVAL;
- if (STATE_CALLBACK (sd)->poll_quit (STATE_CALLBACK (sd)))
- sim_stop (sd);
- }
-}
-
-
-/* Based on gdb-4.17/sim/ppc/main.c:sim_io_read_stdin().
-
- FIXME: Should not be calling fcntl() or grubbing around inside of
- ->fdmap and ->errno.
-
- FIXME: Some completly new mechanism for handling the general
- problem of asynchronous IO is needed.
-
- FIXME: This function does not supress the echoing (ECHO) of input.
- Consequently polled input is always displayed.
-
- FIXME: This function does not perform uncooked reads.
- Consequently, data will not be read until an EOLN character has
- been entered. A cntrl-d may force the early termination of a line */
-
-
-int
-sim_io_poll_read (SIM_DESC sd,
- int sim_io_fd,
- char *buf,
- int sizeof_buf)
-{
-#if defined(O_NDELAY) && defined(F_GETFL) && defined(F_SETFL)
- int fd = STATE_CALLBACK (sd)->fdmap[sim_io_fd];
- int flags;
- int status;
- int nr_read;
- int result;
- STATE_CALLBACK (sd)->last_errno = 0;
- /* get the old status */
- flags = fcntl (fd, F_GETFL, 0);
- if (flags == -1)
- {
- perror ("sim_io_poll_read");
- return 0;
- }
- /* temp, disable blocking IO */
- status = fcntl (fd, F_SETFL, flags | O_NDELAY);
- if (status == -1)
- {
- perror ("sim_io_read_stdin");
- return 0;
- }
- /* try for input */
- nr_read = read (fd, buf, sizeof_buf);
- if (nr_read >= 0)
- {
- /* printf ("<nr-read=%d>\n", nr_read); */
- result = nr_read;
- }
- else
- { /* nr_read < 0 */
- result = -1;
- STATE_CALLBACK (sd)->last_errno = errno;
- }
- /* return to regular vewing */
- status = fcntl (fd, F_SETFL, flags);
- if (status == -1)
- {
- perror ("sim_io_read_stdin");
- /* return 0; */
- }
- return result;
-#else
- return sim_io_read (sd, sim_io_fd, buf, sizeof_buf);
-#endif
-}
diff --git a/sim/common/sim-io.h b/sim/common/sim-io.h
deleted file mode 100644
index 995b6231e05..00000000000
--- a/sim/common/sim-io.h
+++ /dev/null
@@ -1,84 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1997, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-#ifndef SIM_IO_H
-#define SIM_IO_H
-
-/* See the file include/callbacks.h for a description */
-
-int sim_io_init (SIM_DESC sd);
-
-int sim_io_shutdown (SIM_DESC sd);
-
-int sim_io_unlink (SIM_DESC sd, const char *);
-
-long sim_io_time (SIM_DESC sd, long *);
-
-int sim_io_system (SIM_DESC sd, const char *);
-
-int sim_io_rename (SIM_DESC sd, const char *, const char *);
-
-int sim_io_write_stdout (SIM_DESC sd, const char *, int);
-
-void sim_io_flush_stdout (SIM_DESC sd);
-
-int sim_io_write_stderr (SIM_DESC sd, const char *, int);
-
-void sim_io_flush_stderr (SIM_DESC sd);
-
-int sim_io_write (SIM_DESC sd, int, const char *, int);
-
-int sim_io_read_stdin (SIM_DESC sd, char *, int);
-
-int sim_io_read (SIM_DESC sd, int, char *, int);
-
-int sim_io_open (SIM_DESC sd, const char *, int);
-
-int sim_io_lseek (SIM_DESC sd, int, long, int);
-
-int sim_io_isatty (SIM_DESC sd, int);
-
-int sim_io_get_errno (SIM_DESC sd);
-
-int sim_io_close (SIM_DESC sd, int);
-
-void sim_io_printf (SIM_DESC sd,
- const char *fmt,
- ...) __attribute__ ((format (printf, 2, 3)));
-
-void sim_io_vprintf (SIM_DESC sd, const char *fmt, va_list ap);
-
-void sim_io_eprintf (SIM_DESC sd,
- const char *fmt,
- ...) __attribute__ ((format (printf, 2, 3)));
-
-void sim_io_evprintf (SIM_DESC sd, const char *fmt, va_list ap);
-
-void sim_io_error (SIM_DESC sd,
- const char *fmt,
- ...) __attribute__ ((format (printf, 2, 3)));
-
-void sim_io_poll_quit (SIM_DESC sd);
-
-/* Returns -1 and sets (host) EAGAIN if not ready. */
-int sim_io_poll_read (SIM_DESC sd, int, char *, int);
-
-#endif
diff --git a/sim/common/sim-load.c b/sim/common/sim-load.c
deleted file mode 100644
index bfe3f15c4bd..00000000000
--- a/sim/common/sim-load.c
+++ /dev/null
@@ -1,241 +0,0 @@
-/* Utility to load a file into the simulator.
- Copyright (C) 1997 Free Software Foundation, Inc.
-
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License
-along with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
-
-/* This is a standalone loader, independent of the sim-basic.h machinery,
- as it is used by simulators that don't use it [though that doesn't mean
- to suggest that they shouldn't :-)]. */
-
-#include "config.h"
-#include "ansidecl.h"
-#include <stdio.h> /* for NULL */
-#ifdef ANSI_PROTOTYPES
-#include <stdarg.h>
-#else
-#include <varargs.h>
-#endif
-#ifdef HAVE_STDLIB_H
-#include <stdlib.h>
-#endif
-#include <time.h>
-
-#include "sim-basics.h"
-#include "bfd.h"
-#include "sim-utils.h"
-
-#include "callback.h"
-#include "remote-sim.h"
-
-static void eprintf PARAMS ((host_callback *, const char *, ...));
-static void xprintf PARAMS ((host_callback *, const char *, ...));
-static void report_transfer_performance
- PARAMS ((host_callback *, unsigned long, time_t, time_t));
-static void xprintf_bfd_vma PARAMS ((host_callback *, bfd_vma));
-
-/* Load program PROG into the simulator using the function DO_LOAD.
- If PROG_BFD is non-NULL, the file has already been opened.
- If VERBOSE_P is non-zero statistics are printed of each loaded section
- and the transfer rate (for consistency with gdb).
- If LMA_P is non-zero the program sections are loaded at the LMA
- rather than the VMA
- If this fails an error message is printed and NULL is returned.
- If it succeeds the bfd is returned.
- NOTE: For historical reasons, older hardware simulators incorrectly
- write the program sections at LMA interpreted as a virtual address.
- This is still accommodated for backward compatibility reasons. */
-
-
-bfd *
-sim_load_file (sd, myname, callback, prog, prog_bfd, verbose_p, lma_p, do_write)
- SIM_DESC sd;
- const char *myname;
- host_callback *callback;
- char *prog;
- bfd *prog_bfd;
- int verbose_p;
- int lma_p;
- sim_write_fn do_write;
-{
- asection *s;
- /* Record separately as we don't want to close PROG_BFD if it was passed. */
- bfd *result_bfd;
- time_t start_time = 0; /* Start and end times of download */
- time_t end_time = 0;
- unsigned long data_count = 0; /* Number of bytes transferred to memory */
- int found_loadable_section;
-
- if (prog_bfd != NULL)
- result_bfd = prog_bfd;
- else
- {
- result_bfd = bfd_openr (prog, 0);
- if (result_bfd == NULL)
- {
- eprintf (callback, "%s: can't open \"%s\": %s\n",
- myname, prog, bfd_errmsg (bfd_get_error ()));
- return NULL;
- }
- }
-
- if (!bfd_check_format (result_bfd, bfd_object))
- {
- eprintf (callback, "%s: \"%s\" is not an object file: %s\n",
- myname, prog, bfd_errmsg (bfd_get_error ()));
- /* Only close if we opened it. */
- if (prog_bfd == NULL)
- bfd_close (result_bfd);
- return NULL;
- }
-
- if (verbose_p)
- start_time = time (NULL);
-
- found_loadable_section = 0;
- for (s = result_bfd->sections; s; s = s->next)
- {
- if (s->flags & SEC_LOAD)
- {
- bfd_size_type size;
-
- size = bfd_get_section_size_before_reloc (s);
- if (size > 0)
- {
- char *buffer;
- bfd_vma lma;
-
- buffer = malloc (size);
- if (buffer == NULL)
- {
- eprintf (callback,
- "%s: insufficient memory to load \"%s\"\n",
- myname, prog);
- /* Only close if we opened it. */
- if (prog_bfd == NULL)
- bfd_close (result_bfd);
- return NULL;
- }
- if (lma_p)
- lma = bfd_section_lma (result_bfd, s);
- else
- lma = bfd_section_vma (result_bfd, s);
- if (verbose_p)
- {
- xprintf (callback, "Loading section %s, size 0x%lx %s ",
- bfd_get_section_name (result_bfd, s),
- (unsigned long) size,
- (lma_p ? "lma" : "vma"));
- xprintf_bfd_vma (callback, lma);
- xprintf (callback, "\n");
- }
- data_count += size;
- bfd_get_section_contents (result_bfd, s, buffer, 0, size);
- do_write (sd, lma, buffer, size);
- found_loadable_section = 1;
- free (buffer);
- }
- }
- }
-
- if (!found_loadable_section)
- {
- eprintf (callback,
- "%s: no loadable sections \"%s\"\n",
- myname, prog);
- return NULL;
- }
-
- if (verbose_p)
- {
- end_time = time (NULL);
- xprintf (callback, "Start address ");
- xprintf_bfd_vma (callback, bfd_get_start_address (result_bfd));
- xprintf (callback, "\n");
- report_transfer_performance (callback, data_count, start_time, end_time);
- }
-
- bfd_cache_close (result_bfd);
-
- return result_bfd;
-}
-
-static void
-xprintf VPARAMS ((host_callback *callback, const char *fmt, ...))
-{
-#ifndef ANSI_PROTOTYPES
- host_callback *callback;
- char *fmt;
-#endif
- va_list ap;
-
- VA_START (ap, fmt);
-#ifndef ANSI_PROTOTYPES
- callback = va_arg (ap, host_callback *);
- fmt = va_arg (ap, char *);
-#endif
-
- (*callback->vprintf_filtered) (callback, fmt, ap);
-
- va_end (ap);
-}
-
-static void
-eprintf VPARAMS ((host_callback *callback, const char *fmt, ...))
-{
-#ifndef ANSI_PROTOTYPES
- host_callback *callback;
- char *fmt;
-#endif
- va_list ap;
-
- VA_START (ap, fmt);
-#ifndef ANSI_PROTOTYPES
- callback = va_arg (ap, host_callback *);
- fmt = va_arg (ap, char *);
-#endif
-
- (*callback->evprintf_filtered) (callback, fmt, ap);
-
- va_end (ap);
-}
-
-/* Report how fast the transfer went. */
-
-static void
-report_transfer_performance (callback, data_count, start_time, end_time)
- host_callback *callback;
- unsigned long data_count;
- time_t start_time, end_time;
-{
- xprintf (callback, "Transfer rate: ");
- if (end_time != start_time)
- xprintf (callback, "%ld bits/sec",
- (data_count * 8) / (end_time - start_time));
- else
- xprintf (callback, "%ld bits in <1 sec", (data_count * 8));
- xprintf (callback, ".\n");
-}
-
-/* Print a bfd_vma.
- This is intended to handle the vagaries of 32 vs 64 bits, etc. */
-
-static void
-xprintf_bfd_vma (callback, vma)
- host_callback *callback;
- bfd_vma vma;
-{
- /* FIXME: for now */
- xprintf (callback, "0x%lx", (unsigned long) vma);
-}
diff --git a/sim/common/sim-memopt.c b/sim/common/sim-memopt.c
deleted file mode 100644
index a8e9df65332..00000000000
--- a/sim/common/sim-memopt.c
+++ /dev/null
@@ -1,579 +0,0 @@
-/* Simulator memory option handling.
- Copyright (C) 1996-1999 Free Software Foundation, Inc.
- Contributed by Cygnus Support.
-
-This file is part of GDB, the GNU debugger.
-
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License along
-with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
-
-#include "cconfig.h"
-
-#include "sim-main.h"
-#include "sim-assert.h"
-#include "sim-options.h"
-
-#ifdef HAVE_STRING_H
-#include <string.h>
-#else
-#ifdef HAVE_STRINGS_H
-#include <strings.h>
-#endif
-#endif
-#ifdef HAVE_STDLIB_H
-#include <stdlib.h>
-#endif
-#ifdef HAVE_ERRNO_H
-#include <errno.h>
-#endif
-#ifdef HAVE_FCNTL_H
-#include <fcntl.h>
-#endif
-#ifdef HAVE_SYS_MMAN_H
-#include <sys/mman.h>
-#endif
-#ifdef HAVE_SYS_STAT_H
-#include <sys/stat.h>
-#endif
-
-/* Memory fill byte. */
-static unsigned8 fill_byte_value;
-static int fill_byte_flag = 0;
-
-/* Memory mapping; see OPTION_MEMORY_MAPFILE. */
-static int mmap_next_fd = -1;
-
-/* Memory command line options. */
-
-enum {
- OPTION_MEMORY_DELETE = OPTION_START,
- OPTION_MEMORY_REGION,
- OPTION_MEMORY_SIZE,
- OPTION_MEMORY_INFO,
- OPTION_MEMORY_ALIAS,
- OPTION_MEMORY_CLEAR,
- OPTION_MEMORY_FILL,
- OPTION_MEMORY_MAPFILE
-};
-
-static DECLARE_OPTION_HANDLER (memory_option_handler);
-
-static const OPTION memory_options[] =
-{
- { {"memory-delete", required_argument, NULL, OPTION_MEMORY_DELETE },
- '\0', "ADDRESS|all", "Delete memory at ADDRESS (all addresses)",
- memory_option_handler },
- { {"delete-memory", required_argument, NULL, OPTION_MEMORY_DELETE },
- '\0', "ADDRESS", NULL,
- memory_option_handler },
-
- { {"memory-region", required_argument, NULL, OPTION_MEMORY_REGION },
- '\0', "ADDRESS,SIZE[,MODULO]", "Add a memory region",
- memory_option_handler },
-
- { {"memory-alias", required_argument, NULL, OPTION_MEMORY_ALIAS },
- '\0', "ADDRESS,SIZE{,ADDRESS}", "Add memory shadow",
- memory_option_handler },
-
- { {"memory-size", required_argument, NULL, OPTION_MEMORY_SIZE },
- '\0', "SIZE", "Add memory at address zero",
- memory_option_handler },
-
- { {"memory-fill", required_argument, NULL, OPTION_MEMORY_FILL },
- '\0', "VALUE", "Fill subsequently added memory regions",
- memory_option_handler },
-
- { {"memory-clear", no_argument, NULL, OPTION_MEMORY_CLEAR },
- '\0', NULL, "Clear subsequently added memory regions",
- memory_option_handler },
-
-#if defined(HAVE_MMAP) && defined(HAVE_MUNMAP)
- { {"memory-mapfile", required_argument, NULL, OPTION_MEMORY_MAPFILE },
- '\0', "FILE", "Memory-map next memory region from file",
- memory_option_handler },
-#endif
-
- { {"memory-info", no_argument, NULL, OPTION_MEMORY_INFO },
- '\0', NULL, "List configurable memory regions",
- memory_option_handler },
- { {"info-memory", no_argument, NULL, OPTION_MEMORY_INFO },
- '\0', NULL, NULL,
- memory_option_handler },
-
- { {NULL, no_argument, NULL, 0}, '\0', NULL, NULL, NULL }
-};
-
-
-static sim_memopt *
-do_memopt_add (SIM_DESC sd,
- int level,
- int space,
- address_word addr,
- address_word nr_bytes,
- unsigned modulo,
- sim_memopt **entry,
- void *buffer)
-{
- void *fill_buffer;
- unsigned fill_length;
- void *free_buffer;
- unsigned long free_length;
-
- if (buffer != NULL)
- {
- /* Buffer already given. sim_memory_uninstall will free it. */
- sim_core_attach (sd, NULL,
- level, access_read_write_exec, space,
- addr, nr_bytes, modulo, NULL, buffer);
-
- free_buffer = buffer;
- free_length = 0;
- fill_buffer = buffer;
- fill_length = (modulo == 0) ? nr_bytes : modulo;
- }
- else
- {
- /* Allocate new well-aligned buffer, just as sim_core_attach(). */
- void *aligned_buffer;
- int padding = (addr % sizeof (unsigned64));
- unsigned long bytes = (modulo == 0 ? nr_bytes : modulo) + padding;
-
- free_buffer = NULL;
- free_length = bytes;
-
-#ifdef HAVE_MMAP
- /* Memory map or malloc(). */
- if (mmap_next_fd >= 0)
- {
- /* Check that given file is big enough. */
- struct stat s;
- int rc;
-
- /* Some kernels will SIGBUS the application if mmap'd file
- is not large enough. */
- rc = fstat (mmap_next_fd, &s);
- if (rc < 0 || s.st_size < bytes)
- {
- sim_io_error (sd,
- "Error, cannot confirm that mmap file is large enough "
- "(>= %d bytes)\n", bytes);
- }
-
- free_buffer = mmap (0, bytes, PROT_READ|PROT_WRITE, MAP_SHARED, mmap_next_fd, 0);
- if (free_buffer == 0 || free_buffer == (char*)-1) /* MAP_FAILED */
- {
- sim_io_error (sd, "Error, cannot mmap file (%s).\n",
- strerror(errno));
- }
- }
-#endif
-
- /* Need heap allocation? */
- if (free_buffer == NULL)
- {
- /* If filling with non-zero value, do not use clearing allocator. */
- if (fill_byte_flag && fill_byte_value != 0)
- free_buffer = xmalloc (bytes); /* don't clear */
- else
- free_buffer = zalloc (bytes); /* clear */
- }
-
- aligned_buffer = (char*) free_buffer + padding;
-
- sim_core_attach (sd, NULL,
- level, access_read_write_exec, space,
- addr, nr_bytes, modulo, NULL, aligned_buffer);
-
- fill_buffer = aligned_buffer;
- fill_length = (modulo == 0) ? nr_bytes : modulo;
-
- /* If we just used a clearing allocator, and are about to fill with
- zero, truncate the redundant fill operation. */
-
- if (fill_byte_flag && fill_byte_value == 0)
- fill_length = 1; /* avoid boundary length=0 case */
- }
-
- if (fill_byte_flag)
- {
- ASSERT (fill_buffer != 0);
- memset ((char*) fill_buffer, fill_byte_value, fill_length);
- }
-
- while ((*entry) != NULL)
- entry = &(*entry)->next;
- (*entry) = ZALLOC (sim_memopt);
- (*entry)->level = level;
- (*entry)->space = space;
- (*entry)->addr = addr;
- (*entry)->nr_bytes = nr_bytes;
- (*entry)->modulo = modulo;
- (*entry)->buffer = free_buffer;
-
- /* Record memory unmapping info. */
- if (mmap_next_fd >= 0)
- {
- (*entry)->munmap_length = free_length;
- close (mmap_next_fd);
- mmap_next_fd = -1;
- }
- else
- (*entry)->munmap_length = 0;
-
- return (*entry);
-}
-
-static SIM_RC
-do_memopt_delete (SIM_DESC sd,
- int level,
- int space,
- address_word addr)
-{
- sim_memopt **entry = &STATE_MEMOPT (sd);
- sim_memopt *alias;
- while ((*entry) != NULL
- && ((*entry)->level != level
- || (*entry)->space != space
- || (*entry)->addr != addr))
- entry = &(*entry)->next;
- if ((*entry) == NULL)
- {
- sim_io_eprintf (sd, "Memory at 0x%lx not found, not deleted\n",
- (long) addr);
- return SIM_RC_FAIL;
- }
- /* delete any buffer */
- if ((*entry)->buffer != NULL)
- {
-#ifdef HAVE_MUNMAP
- if ((*entry)->munmap_length > 0)
- munmap ((*entry)->buffer, (*entry)->munmap_length);
- else
-#endif
- zfree ((*entry)->buffer);
- }
-
- /* delete it and its aliases */
- alias = *entry;
- *entry = (*entry)->next;
- while (alias != NULL)
- {
- sim_memopt *dead = alias;
- alias = alias->alias;
- sim_core_detach (sd, NULL, dead->level, dead->space, dead->addr);
- zfree (dead);
- }
- return SIM_RC_OK;
-}
-
-
-static char *
-parse_size (char *chp,
- address_word *nr_bytes,
- unsigned *modulo)
-{
- /* <nr_bytes> [ "%" <modulo> ] */
- *nr_bytes = strtoul (chp, &chp, 0);
- if (*chp == '%')
- {
- *modulo = strtoul (chp + 1, &chp, 0);
- }
- return chp;
-}
-
-static char *
-parse_ulong_value (char *chp,
- unsigned long *value)
-{
- *value = strtoul (chp, &chp, 0);
- return chp;
-}
-
-static char *
-parse_addr (char *chp,
- int *level,
- int *space,
- address_word *addr)
-{
- /* [ <space> ": " ] <addr> [ "@" <level> ] */
- *addr = (unsigned long) strtoul (chp, &chp, 0);
- if (*chp == ':')
- {
- *space = *addr;
- *addr = (unsigned long) strtoul (chp + 1, &chp, 0);
- }
- if (*chp == '@')
- {
- *level = strtoul (chp + 1, &chp, 0);
- }
- return chp;
-}
-
-
-static SIM_RC
-memory_option_handler (SIM_DESC sd, sim_cpu *cpu, int opt,
- char *arg, int is_command)
-{
- switch (opt)
- {
-
- case OPTION_MEMORY_DELETE:
- if (strcasecmp (arg, "all") == 0)
- {
- while (STATE_MEMOPT (sd) != NULL)
- do_memopt_delete (sd,
- STATE_MEMOPT (sd)->level,
- STATE_MEMOPT (sd)->space,
- STATE_MEMOPT (sd)->addr);
- return SIM_RC_OK;
- }
- else
- {
- int level = 0;
- int space = 0;
- address_word addr = 0;
- parse_addr (arg, &level, &space, &addr);
- return do_memopt_delete (sd, level, space, addr);
- }
-
- case OPTION_MEMORY_REGION:
- {
- char *chp = arg;
- int level = 0;
- int space = 0;
- address_word addr = 0;
- address_word nr_bytes = 0;
- unsigned modulo = 0;
- /* parse the arguments */
- chp = parse_addr (chp, &level, &space, &addr);
- if (*chp != ',')
- {
- sim_io_eprintf (sd, "Missing size for memory-region\n");
- return SIM_RC_FAIL;
- }
- chp = parse_size (chp + 1, &nr_bytes, &modulo);
- /* old style */
- if (*chp == ',')
- modulo = strtoul (chp + 1, &chp, 0);
- /* try to attach/insert it */
- do_memopt_add (sd, level, space, addr, nr_bytes, modulo,
- &STATE_MEMOPT (sd), NULL);
- return SIM_RC_OK;
- }
-
- case OPTION_MEMORY_ALIAS:
- {
- char *chp = arg;
- int level = 0;
- int space = 0;
- address_word addr = 0;
- address_word nr_bytes = 0;
- unsigned modulo = 0;
- sim_memopt *entry;
- /* parse the arguments */
- chp = parse_addr (chp, &level, &space, &addr);
- if (*chp != ',')
- {
- sim_io_eprintf (sd, "Missing size for memory-region\n");
- return SIM_RC_FAIL;
- }
- chp = parse_size (chp + 1, &nr_bytes, &modulo);
- /* try to attach/insert the main record */
- entry = do_memopt_add (sd, level, space, addr, nr_bytes, modulo,
- &STATE_MEMOPT (sd),
- NULL);
- /* now attach all the aliases */
- while (*chp == ',')
- {
- int a_level = level;
- int a_space = space;
- address_word a_addr = addr;
- chp = parse_addr (chp + 1, &a_level, &a_space, &a_addr);
- do_memopt_add (sd, a_level, a_space, a_addr, nr_bytes, modulo,
- &entry->alias, entry->buffer);
- }
- return SIM_RC_OK;
- }
-
- case OPTION_MEMORY_SIZE:
- {
- int level = 0;
- int space = 0;
- address_word addr = 0;
- address_word nr_bytes = 0;
- unsigned modulo = 0;
- /* parse the arguments */
- parse_size (arg, &nr_bytes, &modulo);
- /* try to attach/insert it */
- do_memopt_add (sd, level, space, addr, nr_bytes, modulo,
- &STATE_MEMOPT (sd), NULL);
- return SIM_RC_OK;
- }
-
- case OPTION_MEMORY_CLEAR:
- {
- fill_byte_value = (unsigned8) 0;
- fill_byte_flag = 1;
- return SIM_RC_OK;
- break;
- }
-
- case OPTION_MEMORY_FILL:
- {
- unsigned long fill_value;
- parse_ulong_value (arg, &fill_value);
- if (fill_value > 255)
- {
- sim_io_eprintf (sd, "Missing fill value between 0 and 255\n");
- return SIM_RC_FAIL;
- }
- fill_byte_value = (unsigned8) fill_value;
- fill_byte_flag = 1;
- return SIM_RC_OK;
- break;
- }
-
- case OPTION_MEMORY_MAPFILE:
- {
- if (mmap_next_fd >= 0)
- {
- sim_io_eprintf (sd, "Duplicate memory-mapfile option\n");
- return SIM_RC_FAIL;
- }
-
- mmap_next_fd = open (arg, O_RDWR);
- if (mmap_next_fd < 0)
- {
- sim_io_eprintf (sd, "Cannot open file `%s': %s\n",
- arg, strerror(errno));
- return SIM_RC_FAIL;
- }
-
- return SIM_RC_OK;
- }
-
- case OPTION_MEMORY_INFO:
- {
- sim_memopt *entry;
- sim_io_printf (sd, "Memory maps:\n");
- for (entry = STATE_MEMOPT (sd); entry != NULL; entry = entry->next)
- {
- sim_memopt *alias;
- sim_io_printf (sd, " memory");
- if (entry->alias == NULL)
- sim_io_printf (sd, " region ");
- else
- sim_io_printf (sd, " alias ");
- if (entry->space != 0)
- sim_io_printf (sd, "0x%lx:", (long) entry->space);
- sim_io_printf (sd, "0x%08lx", (long) entry->addr);
- if (entry->level != 0)
- sim_io_printf (sd, "@0x%lx", (long) entry->level);
- sim_io_printf (sd, ",0x%lx",
- (long) entry->nr_bytes);
- if (entry->modulo != 0)
- sim_io_printf (sd, "%%0x%lx", (long) entry->modulo);
- for (alias = entry->alias;
- alias != NULL;
- alias = alias->next)
- {
- if (alias->space != 0)
- sim_io_printf (sd, "0x%lx:", (long) alias->space);
- sim_io_printf (sd, ",0x%08lx", (long) alias->addr);
- if (alias->level != 0)
- sim_io_printf (sd, "@0x%lx", (long) alias->level);
- }
- sim_io_printf (sd, "\n");
- }
- return SIM_RC_OK;
- break;
- }
-
- default:
- sim_io_eprintf (sd, "Unknown memory option %d\n", opt);
- return SIM_RC_FAIL;
-
- }
-
- return SIM_RC_FAIL;
-}
-
-
-/* "memory" module install handler.
-
- This is called via sim_module_install to install the "memory" subsystem
- into the simulator. */
-
-static MODULE_INIT_FN sim_memory_init;
-static MODULE_UNINSTALL_FN sim_memory_uninstall;
-
-SIM_RC
-sim_memopt_install (SIM_DESC sd)
-{
- SIM_ASSERT (STATE_MAGIC (sd) == SIM_MAGIC_NUMBER);
- sim_add_option_table (sd, NULL, memory_options);
- sim_module_add_uninstall_fn (sd, sim_memory_uninstall);
- sim_module_add_init_fn (sd, sim_memory_init);
- return SIM_RC_OK;
-}
-
-
-/* Uninstall the "memory" subsystem from the simulator. */
-
-static void
-sim_memory_uninstall (SIM_DESC sd)
-{
- sim_memopt **entry = &STATE_MEMOPT (sd);
- sim_memopt *alias;
-
- while ((*entry) != NULL)
- {
- /* delete any buffer */
- if ((*entry)->buffer != NULL)
- {
-#ifdef HAVE_MUNMAP
- if ((*entry)->munmap_length > 0)
- munmap ((*entry)->buffer, (*entry)->munmap_length);
- else
-#endif
- zfree ((*entry)->buffer);
- }
-
- /* delete it and its aliases */
- alias = *entry;
-
- /* next victim */
- *entry = (*entry)->next;
-
- while (alias != NULL)
- {
- sim_memopt *dead = alias;
- alias = alias->alias;
- sim_core_detach (sd, NULL, dead->level, dead->space, dead->addr);
- zfree (dead);
- }
- }
-}
-
-
-static SIM_RC
-sim_memory_init (SIM_DESC sd)
-{
- /* Reinitialize option modifier flags, in case they were left
- over from a previous sim startup event. */
- fill_byte_flag = 0;
- mmap_next_fd = -1;
-
- return SIM_RC_OK;
-}
diff --git a/sim/common/sim-memopt.h b/sim/common/sim-memopt.h
deleted file mode 100644
index cbaad0c99c6..00000000000
--- a/sim/common/sim-memopt.h
+++ /dev/null
@@ -1,47 +0,0 @@
-/* Header file for simulator memory argument handling.
- Copyright (C) 1997 Free Software Foundation, Inc.
- Contributed by Cygnus Support.
-
-This file is part of GDB, the GNU debugger.
-
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License along
-with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
-
-#ifndef SIM_MEMOPT_H
-#define SIM_MEMOPT_H
-
-/* Provides a command line interface for manipulating the memory core */
-
-typedef struct _sim_memopt sim_memopt;
-struct _sim_memopt {
- int level;
- int space;
- unsigned_word addr;
- unsigned_word nr_bytes;
- unsigned modulo;
- void *buffer;
- unsigned long munmap_length;
- sim_memopt *alias; /* linked list */
- sim_memopt *next;
-};
-
-
-/* Install the "memopt" module. */
-
-SIM_RC sim_memopt_install (SIM_DESC sd);
-
-
-/* Was there a memory command? */
-
-#endif
diff --git a/sim/common/sim-model.c b/sim/common/sim-model.c
deleted file mode 100644
index 3cfdc15c501..00000000000
--- a/sim/common/sim-model.c
+++ /dev/null
@@ -1,215 +0,0 @@
-/* Model support.
- Copyright (C) 1996, 1997, 1998 Free Software Foundation, Inc.
- Contributed by Cygnus Support.
-
-This file is part of GDB, the GNU debugger.
-
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License along
-with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
-
-#include "sim-main.h"
-#include "libiberty.h"
-#include "sim-options.h"
-#include "sim-io.h"
-#include "sim-assert.h"
-#include "bfd.h"
-
-static void model_set (sim_cpu *, const MODEL *);
-
-static DECLARE_OPTION_HANDLER (model_option_handler);
-
-static MODULE_INIT_FN sim_model_init;
-
-#define OPTION_MODEL (OPTION_START + 0)
-
-static const OPTION model_options[] = {
- { {"model", required_argument, NULL, OPTION_MODEL},
- '\0', "MODEL", "Specify model to simulate",
- model_option_handler },
- { {NULL, no_argument, NULL, 0}, '\0', NULL, NULL, NULL }
-};
-
-static SIM_RC
-model_option_handler (SIM_DESC sd, sim_cpu *cpu, int opt,
- char *arg, int is_command)
-{
- switch (opt)
- {
- case OPTION_MODEL :
- {
- const MODEL *model = sim_model_lookup (arg);
- if (! model)
- {
- sim_io_eprintf (sd, "unknown model `%s'\n", arg);
- return SIM_RC_FAIL;
- }
- sim_model_set (sd, cpu, model);
- break;
- }
- }
-
- return SIM_RC_OK;
-}
-
-SIM_RC
-sim_model_install (SIM_DESC sd)
-{
- SIM_ASSERT (STATE_MAGIC (sd) == SIM_MAGIC_NUMBER);
-
- sim_add_option_table (sd, NULL, model_options);
- sim_module_add_init_fn (sd, sim_model_init);
-
- return SIM_RC_OK;
-}
-
-/* Subroutine of sim_model_set to set the model for one cpu. */
-
-static void
-model_set (sim_cpu *cpu, const MODEL *model)
-{
- CPU_MACH (cpu) = MODEL_MACH (model);
- CPU_MODEL (cpu) = model;
- (* MACH_INIT_CPU (MODEL_MACH (model))) (cpu);
- (* MODEL_INIT (model)) (cpu);
-}
-
-/* Set the current model of CPU to MODEL.
- If CPU is NULL, all cpus are set to MODEL. */
-
-void
-sim_model_set (SIM_DESC sd, sim_cpu *cpu, const MODEL *model)
-{
- if (! cpu)
- {
- int c;
-
- for (c = 0; c < MAX_NR_PROCESSORS; ++c)
- if (STATE_CPU (sd, c))
- model_set (STATE_CPU (sd, c), model);
- }
- else
- {
- model_set (cpu, model);
- }
-}
-
-/* Look up model named NAME.
- Result is pointer to MODEL entry or NULL if not found. */
-
-const MODEL *
-sim_model_lookup (const char *name)
-{
- const MACH **machp;
- const MODEL *model;
-
- for (machp = & sim_machs[0]; *machp != NULL; ++machp)
- {
- for (model = MACH_MODELS (*machp); MODEL_NAME (model) != NULL; ++model)
- {
- if (strcmp (MODEL_NAME (model), name) == 0)
- return model;
- }
- }
- return NULL;
-}
-
-/* Look up machine named NAME.
- Result is pointer to MACH entry or NULL if not found. */
-
-const MACH *
-sim_mach_lookup (const char *name)
-{
- const MACH **machp;
-
- for (machp = & sim_machs[0]; *machp != NULL; ++machp)
- {
- if (strcmp (MACH_NAME (*machp), name) == 0)
- return *machp;
- }
- return NULL;
-}
-
-/* Look up a machine via its bfd name.
- Result is pointer to MACH entry or NULL if not found. */
-
-const MACH *
-sim_mach_lookup_bfd_name (const char *name)
-{
- const MACH **machp;
-
- for (machp = & sim_machs[0]; *machp != NULL; ++machp)
- {
- if (strcmp (MACH_BFD_NAME (*machp), name) == 0)
- return *machp;
- }
- return NULL;
-}
-
-/* Initialize model support. */
-
-static SIM_RC
-sim_model_init (SIM_DESC sd)
-{
- SIM_CPU *cpu;
-
- /* If both cpu model and state architecture are set, ensure they're
- compatible. If only one is set, set the other. If neither are set,
- use the default model. STATE_ARCHITECTURE is the bfd_arch_info data
- for the selected "mach" (bfd terminology). */
-
- /* Only check cpu 0. STATE_ARCHITECTURE is for that one only. */
- /* ??? At present this only supports homogeneous multiprocessors. */
- cpu = STATE_CPU (sd, 0);
-
- if (! STATE_ARCHITECTURE (sd)
- && ! CPU_MACH (cpu))
- {
- /* Set the default model. */
- const MODEL *model = sim_model_lookup (WITH_DEFAULT_MODEL);
- sim_model_set (sd, NULL, model);
- }
-
- if (STATE_ARCHITECTURE (sd)
- && CPU_MACH (cpu))
- {
- if (strcmp (STATE_ARCHITECTURE (sd)->printable_name,
- MACH_BFD_NAME (CPU_MACH (cpu))) != 0)
- {
- sim_io_eprintf (sd, "invalid model `%s' for `%s'\n",
- MODEL_NAME (CPU_MODEL (cpu)),
- STATE_ARCHITECTURE (sd)->printable_name);
- return SIM_RC_FAIL;
- }
- }
- else if (STATE_ARCHITECTURE (sd))
- {
- /* Use the default model for the selected machine.
- The default model is the first one in the list. */
- const MACH *mach = sim_mach_lookup_bfd_name (STATE_ARCHITECTURE (sd)->printable_name);
-
- if (mach == NULL)
- {
- sim_io_eprintf (sd, "unsupported machine `%s'\n",
- STATE_ARCHITECTURE (sd)->printable_name);
- return SIM_RC_FAIL;
- }
- sim_model_set (sd, NULL, MACH_MODELS (mach));
- }
- else
- {
- STATE_ARCHITECTURE (sd) = bfd_scan_arch (MACH_BFD_NAME (CPU_MACH (cpu)));
- }
-
- return SIM_RC_OK;
-}
diff --git a/sim/common/sim-model.h b/sim/common/sim-model.h
deleted file mode 100644
index 52728152e14..00000000000
--- a/sim/common/sim-model.h
+++ /dev/null
@@ -1,141 +0,0 @@
-/* Architecture, machine, and model support.
- Copyright (C) 1997, 1998, 1999 Free Software Foundation, Inc.
- Contributed by Cygnus Support.
-
-This file is part of GDB, the GNU debugger.
-
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License along
-with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
-
-/* Nomenclature:
- architecture = one of sparc, mips, sh, etc.
- in the sparc architecture, mach = one of v6, v7, v8, sparclite, etc.
- in the v8 mach, model = one of supersparc, etc.
-*/
-
-/* This file is intended to be included by sim-basics.h. */
-
-#ifndef SIM_MODEL_H
-#define SIM_MODEL_H
-
-/* Function unit and instruction timing support.
- ??? This is obviously insufficiently general.
- It's useful but it needs elaborating upon. */
-
-typedef struct {
- unsigned char name; /* actually a UNIT_TYPE enum */
- unsigned char issue;
- unsigned char done;
-} UNIT;
-
-#ifndef MAX_UNITS
-#define MAX_UNITS 1
-#endif
-
-typedef int (MODEL_FN) (sim_cpu *, void *);
-
-typedef struct {
- /* This is an integer that identifies this insn.
- How this works is up to the target. */
- int num;
-
- /* Function to handle insn-specific profiling. */
- MODEL_FN *model_fn;
-
- /* Array of function units used by this insn. */
- UNIT units[MAX_UNITS];
-} INSN_TIMING;
-
-/* Struct to describe various implementation properties of a cpu.
- When multiple cpu variants are supported, the sizes of some structs
- can vary. */
-
-typedef struct {
- /* The size of the SIM_CPU struct. */
- int sim_cpu_size;
-#define IMP_PROPS_SIM_CPU_SIZE(cpu_props) ((cpu_props)->sim_cpu_size)
- /* An SCACHE element can vary in size, depending on the selected cpu.
- This is zero if the SCACHE isn't in use for this variant. */
- int scache_elm_size;
-#define IMP_PROPS_SCACHE_ELM_SIZE(cpu_props) ((cpu_props)->scache_elm_size)
-} MACH_IMP_PROPERTIES;
-
-/* A machine variant. */
-
-typedef struct {
- const char *name;
-#define MACH_NAME(m) ((m)->name)
- /* This is the argument to bfd_scan_arch. */
- const char *bfd_name;
-#define MACH_BFD_NAME(m) ((m)->bfd_name)
- enum mach_attr num;
-#define MACH_NUM(m) ((m)->num)
-
- int word_bitsize;
-#define MACH_WORD_BITSIZE(m) ((m)->word_bitsize)
- int addr_bitsize;
-#define MACH_ADDR_BITSIZE(m) ((m)->addr_bitsize)
-
- /* Pointer to null-entry terminated table of models of this mach.
- The default is the first one. */
- const struct model *models;
-#define MACH_MODELS(m) ((m)->models)
-
- /* Pointer to the implementation properties of this mach. */
- const MACH_IMP_PROPERTIES *imp_props;
-#define MACH_IMP_PROPS(m) ((m)->imp_props)
-
- /* Called by sim_model_set when the model of a cpu is set. */
- void (* init_cpu) (sim_cpu *);
-#define MACH_INIT_CPU(m) ((m)->init_cpu)
-
- /* Initialize the simulator engine for this cpu.
- Used by cgen simulators to initialize the insn descriptor table. */
- void (* prepare_run) (sim_cpu *);
-#define MACH_PREPARE_RUN(m) ((m)->prepare_run)
-} MACH;
-
-/* A model (implementation) of a machine. */
-
-typedef struct model {
- const char *name;
-#define MODEL_NAME(m) ((m)->name)
- const MACH *mach;
-#define MODEL_MACH(m) ((m)->mach)
- /* An enum that distinguished the model. */
- int num;
-#define MODEL_NUM(m) ((m)->num)
- /* Pointer to timing table for this model. */
- const INSN_TIMING *timing;
-#define MODEL_TIMING(m) ((m)->timing)
- void (* init) (sim_cpu *);
-#define MODEL_INIT(m) ((m)->init)
-} MODEL;
-
-/* Tables of supported machines. */
-/* ??? In a simulator of multiple architectures, will need multiple copies of
- this. Have an `archs' array that contains a pointer to the machs array
- for each (which in turn has a pointer to the models array for each). */
-extern const MACH *sim_machs[];
-
-/* Model module handlers. */
-extern MODULE_INSTALL_FN sim_model_install;
-
-/* Support routines. */
-extern void sim_model_set (SIM_DESC sd_, sim_cpu *cpu_, const MODEL *model_);
-extern const MODEL * sim_model_lookup (const char *name_);
-extern const MACH * sim_mach_lookup (const char *name_);
-extern const MACH * sim_mach_lookup_bfd_name (const char *bfd_name_);
-
-#endif /* SIM_MODEL_H */
diff --git a/sim/common/sim-module.c b/sim/common/sim-module.c
deleted file mode 100644
index 35eb32a65ff..00000000000
--- a/sim/common/sim-module.c
+++ /dev/null
@@ -1,399 +0,0 @@
-/* Module support.
- Copyright (C) 1996, 1997, 1998 Free Software Foundation, Inc.
- Contributed by Cygnus Support.
-
-This file is part of GDB, the GNU debugger.
-
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License along
-with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
-
-#include "sim-main.h"
-#include "sim-io.h"
-#include "sim-options.h"
-#include "sim-assert.h"
-
-#if WITH_HW
-#include "sim-hw.h"
-#endif
-
-#include "libiberty.h"
-
-/* List of all modules. */
-static MODULE_INSTALL_FN * const modules[] = {
- standard_install,
- sim_events_install,
-#ifdef SIM_HAVE_MODEL
- sim_model_install,
-#endif
-#if WITH_ENGINE
- sim_engine_install,
-#endif
-#if WITH_TRACE
- trace_install,
-#endif
-#if WITH_PROFILE
- profile_install,
-#endif
- sim_core_install,
-#ifndef SIM_HAVE_FLATMEM
- /* FIXME: should handle flatmem as well FLATMEM */
- sim_memopt_install,
-#endif
-#if WITH_WATCHPOINTS
- sim_watchpoint_install,
-#endif
-#if WITH_SCACHE
- scache_install,
-#endif
-#ifdef SIM_HAVE_BREAKPOINTS
- sim_break_install,
-#endif
-#if WITH_HW
- sim_hw_install,
-#endif
- /* Configured in [simulator specific] additional modules. */
-#ifdef MODULE_LIST
- MODULE_LIST
-#endif
- 0
-};
-
-/* Functions called from sim_open. */
-
-/* Initialize common parts before argument processing. */
-
-SIM_RC
-sim_pre_argv_init (SIM_DESC sd, const char *myname)
-{
- SIM_ASSERT (STATE_MAGIC (sd) == SIM_MAGIC_NUMBER);
- SIM_ASSERT (STATE_MODULES (sd) == NULL);
-
- STATE_MY_NAME (sd) = myname + strlen (myname);
- while (STATE_MY_NAME (sd) > myname && STATE_MY_NAME (sd)[-1] != '/')
- --STATE_MY_NAME (sd);
-
- /* Set the cpu names to default values. */
- {
- int i;
- for (i = 0; i < MAX_NR_PROCESSORS; ++i)
- {
- char *name;
- asprintf (&name, "cpu%d", i);
- CPU_NAME (STATE_CPU (sd, i)) = name;
- }
- }
-
- sim_config_default (sd);
-
- /* Install all configured in modules. */
- if (sim_module_install (sd) != SIM_RC_OK)
- return SIM_RC_FAIL;
-
- return SIM_RC_OK;
-}
-
-/* Initialize common parts after argument processing. */
-
-SIM_RC
-sim_post_argv_init (SIM_DESC sd)
-{
- int i;
- SIM_ASSERT (STATE_MAGIC (sd) == SIM_MAGIC_NUMBER);
- SIM_ASSERT (STATE_MODULES (sd) != NULL);
-
- /* Set the cpu->state backlinks for each cpu. */
- for (i = 0; i < MAX_NR_PROCESSORS; ++i)
- {
- CPU_STATE (STATE_CPU (sd, i)) = sd;
- CPU_INDEX (STATE_CPU (sd, i)) = i;
- }
-
- if (sim_module_init (sd) != SIM_RC_OK)
- return SIM_RC_FAIL;
-
- return SIM_RC_OK;
-}
-
-/* Install all modules.
- If this fails, no modules are left installed. */
-
-SIM_RC
-sim_module_install (SIM_DESC sd)
-{
- MODULE_INSTALL_FN * const *modp;
-
- SIM_ASSERT (STATE_MAGIC (sd) == SIM_MAGIC_NUMBER);
- SIM_ASSERT (STATE_MODULES (sd) == NULL);
-
- STATE_MODULES (sd) = ZALLOC (struct module_list);
- for (modp = modules; *modp != NULL; ++modp)
- {
- if ((*modp) (sd) != SIM_RC_OK)
- {
- sim_module_uninstall (sd);
- SIM_ASSERT (STATE_MODULES (sd) == NULL);
- return SIM_RC_FAIL;
- }
- }
- return SIM_RC_OK;
-}
-
-/* Called after all modules have been installed and after argv
- has been processed. */
-
-SIM_RC
-sim_module_init (SIM_DESC sd)
-{
- struct module_list *modules = STATE_MODULES (sd);
- MODULE_INIT_LIST *modp;
-
- SIM_ASSERT (STATE_MAGIC (sd) == SIM_MAGIC_NUMBER);
- SIM_ASSERT (STATE_MODULES (sd) != NULL);
-
- for (modp = modules->init_list; modp != NULL; modp = modp->next)
- {
- if ((*modp->fn) (sd) != SIM_RC_OK)
- return SIM_RC_FAIL;
- }
- return SIM_RC_OK;
-}
-
-/* Called when ever the simulator is resumed */
-
-SIM_RC
-sim_module_resume (SIM_DESC sd)
-{
- struct module_list *modules = STATE_MODULES (sd);
- MODULE_RESUME_LIST *modp;
-
- SIM_ASSERT (STATE_MAGIC (sd) == SIM_MAGIC_NUMBER);
- SIM_ASSERT (STATE_MODULES (sd) != NULL);
-
- for (modp = modules->resume_list; modp != NULL; modp = modp->next)
- {
- if ((*modp->fn) (sd) != SIM_RC_OK)
- return SIM_RC_FAIL;
- }
- return SIM_RC_OK;
-}
-
-/* Called when ever the simulator is suspended */
-
-SIM_RC
-sim_module_suspend (SIM_DESC sd)
-{
- struct module_list *modules = STATE_MODULES (sd);
- MODULE_SUSPEND_LIST *modp;
-
- SIM_ASSERT (STATE_MAGIC (sd) == SIM_MAGIC_NUMBER);
- SIM_ASSERT (STATE_MODULES (sd) != NULL);
-
- for (modp = modules->suspend_list; modp != NULL; modp = modp->next)
- {
- if ((*modp->fn) (sd) != SIM_RC_OK)
- return SIM_RC_FAIL;
- }
- return SIM_RC_OK;
-}
-
-/* Uninstall installed modules, called by sim_close. */
-
-void
-sim_module_uninstall (SIM_DESC sd)
-{
- struct module_list *modules = STATE_MODULES (sd);
- MODULE_UNINSTALL_LIST *modp;
-
- SIM_ASSERT (STATE_MAGIC (sd) == SIM_MAGIC_NUMBER);
- SIM_ASSERT (STATE_MODULES (sd) != NULL);
-
- /* Uninstall the modules. */
- for (modp = modules->uninstall_list; modp != NULL; modp = modp->next)
- (*modp->fn) (sd);
-
- /* clean-up init list */
- {
- MODULE_INIT_LIST *n, *d;
- for (d = modules->init_list; d != NULL; d = n)
- {
- n = d->next;
- zfree (d);
- }
- }
-
- /* clean-up resume list */
- {
- MODULE_RESUME_LIST *n, *d;
- for (d = modules->resume_list; d != NULL; d = n)
- {
- n = d->next;
- zfree (d);
- }
- }
-
- /* clean-up suspend list */
- {
- MODULE_SUSPEND_LIST *n, *d;
- for (d = modules->suspend_list; d != NULL; d = n)
- {
- n = d->next;
- zfree (d);
- }
- }
-
- /* clean-up uninstall list */
- {
- MODULE_UNINSTALL_LIST *n, *d;
- for (d = modules->uninstall_list; d != NULL; d = n)
- {
- n = d->next;
- zfree (d);
- }
- }
-
- /* clean-up info list */
- {
- MODULE_INFO_LIST *n, *d;
- for (d = modules->info_list; d != NULL; d = n)
- {
- n = d->next;
- zfree (d);
- }
- }
-
- zfree (modules);
- STATE_MODULES (sd) = NULL;
-}
-
-/* Called when ever simulator info is needed */
-
-void
-sim_module_info (SIM_DESC sd, int verbose)
-{
- struct module_list *modules = STATE_MODULES (sd);
- MODULE_INFO_LIST *modp;
-
- SIM_ASSERT (STATE_MAGIC (sd) == SIM_MAGIC_NUMBER);
- SIM_ASSERT (STATE_MODULES (sd) != NULL);
-
- for (modp = modules->info_list; modp != NULL; modp = modp->next)
- {
- (*modp->fn) (sd, verbose);
- }
-}
-
-/* Add FN to the init handler list.
- init in the same order as the install. */
-
-void
-sim_module_add_init_fn (SIM_DESC sd, MODULE_INIT_FN fn)
-{
- struct module_list *modules = STATE_MODULES (sd);
- MODULE_INIT_LIST *l = ZALLOC (MODULE_INIT_LIST);
- MODULE_INIT_LIST **last;
-
- SIM_ASSERT (STATE_MAGIC (sd) == SIM_MAGIC_NUMBER);
- SIM_ASSERT (STATE_MODULES (sd) != NULL);
-
- last = &modules->init_list;
- while (*last != NULL)
- last = &((*last)->next);
-
- l->fn = fn;
- l->next = NULL;
- *last = l;
-}
-
-/* Add FN to the resume handler list.
- resume in the same order as the install. */
-
-void
-sim_module_add_resume_fn (SIM_DESC sd, MODULE_RESUME_FN fn)
-{
- struct module_list *modules = STATE_MODULES (sd);
- MODULE_RESUME_LIST *l = ZALLOC (MODULE_RESUME_LIST);
- MODULE_RESUME_LIST **last;
-
- SIM_ASSERT (STATE_MAGIC (sd) == SIM_MAGIC_NUMBER);
- SIM_ASSERT (STATE_MODULES (sd) != NULL);
-
- last = &modules->resume_list;
- while (*last != NULL)
- last = &((*last)->next);
-
- l->fn = fn;
- l->next = NULL;
- *last = l;
-}
-
-/* Add FN to the init handler list.
- suspend in the reverse order to install. */
-
-void
-sim_module_add_suspend_fn (SIM_DESC sd, MODULE_SUSPEND_FN fn)
-{
- struct module_list *modules = STATE_MODULES (sd);
- MODULE_SUSPEND_LIST *l = ZALLOC (MODULE_SUSPEND_LIST);
- MODULE_SUSPEND_LIST **last;
-
- SIM_ASSERT (STATE_MAGIC (sd) == SIM_MAGIC_NUMBER);
- SIM_ASSERT (STATE_MODULES (sd) != NULL);
-
- last = &modules->suspend_list;
- while (*last != NULL)
- last = &((*last)->next);
-
- l->fn = fn;
- l->next = modules->suspend_list;
- modules->suspend_list = l;
-}
-
-/* Add FN to the uninstall handler list.
- Uninstall in reverse order to install. */
-
-void
-sim_module_add_uninstall_fn (SIM_DESC sd, MODULE_UNINSTALL_FN fn)
-{
- struct module_list *modules = STATE_MODULES (sd);
- MODULE_UNINSTALL_LIST *l = ZALLOC (MODULE_UNINSTALL_LIST);
-
- SIM_ASSERT (STATE_MAGIC (sd) == SIM_MAGIC_NUMBER);
- SIM_ASSERT (STATE_MODULES (sd) != NULL);
-
- l->fn = fn;
- l->next = modules->uninstall_list;
- modules->uninstall_list = l;
-}
-
-/* Add FN to the info handler list.
- Report info in the same order as the install. */
-
-void
-sim_module_add_info_fn (SIM_DESC sd, MODULE_INFO_FN fn)
-{
- struct module_list *modules = STATE_MODULES (sd);
- MODULE_INFO_LIST *l = ZALLOC (MODULE_INFO_LIST);
- MODULE_INFO_LIST **last;
-
- SIM_ASSERT (STATE_MAGIC (sd) == SIM_MAGIC_NUMBER);
- SIM_ASSERT (STATE_MODULES (sd) != NULL);
-
- last = &modules->info_list;
- while (*last != NULL)
- last = &((*last)->next);
-
- l->fn = fn;
- l->next = NULL;
- *last = l;
-}
diff --git a/sim/common/sim-module.h b/sim/common/sim-module.h
deleted file mode 100644
index cbba3506e2c..00000000000
--- a/sim/common/sim-module.h
+++ /dev/null
@@ -1,125 +0,0 @@
-/* Module support.
- Copyright (C) 1996, 1997 Free Software Foundation, Inc.
- Contributed by Cygnus Support.
-
-This file is part of GDB, the GNU debugger.
-
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License along
-with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
-
-/* This file is intended to be included by sim-base.h. */
-
-#ifndef SIM_MODULES_H
-#define SIM_MODULES_H
-
-/* Modules are addons to the simulator that perform a specific function
- (e.g. tracing, profiling, memory subsystem, etc.). Some modules are
- builtin, and others are added at configure time. The intent is to
- provide a uniform framework for all of the pieces that make up the
- simulator.
-
- TODO: Add facilities for saving/restoring state to/from a file. */
-
-
-/* Various function types. */
-
-typedef SIM_RC (MODULE_INSTALL_FN) (SIM_DESC);
-typedef SIM_RC (MODULE_INIT_FN) (SIM_DESC);
-typedef SIM_RC (MODULE_RESUME_FN) (SIM_DESC);
-typedef SIM_RC (MODULE_SUSPEND_FN) (SIM_DESC);
-typedef void (MODULE_UNINSTALL_FN) (SIM_DESC);
-typedef void (MODULE_INFO_FN) (SIM_DESC, int);
-
-
-/* Lists of installed handlers. */
-
-typedef struct module_init_list {
- struct module_init_list *next;
- MODULE_INIT_FN *fn;
-} MODULE_INIT_LIST;
-
-typedef struct module_resume_list {
- struct module_resume_list *next;
- MODULE_RESUME_FN *fn;
-} MODULE_RESUME_LIST;
-
-typedef struct module_suspend_list {
- struct module_suspend_list *next;
- MODULE_SUSPEND_FN *fn;
-} MODULE_SUSPEND_LIST;
-
-typedef struct module_uninstall_list {
- struct module_uninstall_list *next;
- MODULE_UNINSTALL_FN *fn;
-} MODULE_UNINSTALL_LIST;
-
-typedef struct module_info_list {
- struct module_info_list *next;
- MODULE_INFO_FN *fn;
-} MODULE_INFO_LIST;
-
-
-/* Functions to register module with various handler lists */
-
-SIM_RC sim_module_install (SIM_DESC);
-void sim_module_uninstall (SIM_DESC);
-void sim_module_add_init_fn (SIM_DESC sd, MODULE_INIT_FN fn);
-void sim_module_add_resume_fn (SIM_DESC sd, MODULE_RESUME_FN fn);
-void sim_module_add_suspend_fn (SIM_DESC sd, MODULE_SUSPEND_FN fn);
-void sim_module_add_uninstall_fn (SIM_DESC sd, MODULE_UNINSTALL_FN fn);
-void sim_module_add_info_fn (SIM_DESC sd, MODULE_INFO_FN fn);
-
-
-/* Initialize installed modules before argument processing.
- Called by sim_open. */
-SIM_RC sim_pre_argv_init (SIM_DESC sd, const char *myname);
-
-/* Initialize installed modules after argument processing.
- Called by sim_open. */
-SIM_RC sim_post_argv_init (SIM_DESC sd);
-
-/* Re-initialize the module. Called by sim_create_inferior. */
-SIM_RC sim_module_init (SIM_DESC sd);
-
-/* Suspend/resume modules. Called by sim_run or sim_resume */
-SIM_RC sim_module_suspend (SIM_DESC sd);
-SIM_RC sim_module_resume (SIM_DESC sd);
-
-/* Report general information on module */
-void sim_module_info (SIM_DESC sd, int verbose);
-
-
-/* Module private data */
-
-struct module_list {
-
- /* List of installed module `init' handlers */
- MODULE_INIT_LIST *init_list;
-
- /* List of installed module `uninstall' handlers. */
- MODULE_UNINSTALL_LIST *uninstall_list;
-
- /* List of installed module `resume' handlers. */
- MODULE_RESUME_LIST *resume_list;
-
- /* List of installed module `suspend' handlers. */
- MODULE_SUSPEND_LIST *suspend_list;
-
- /* List of installed module `info' handlers. */
- MODULE_INFO_LIST *info_list;
-
-};
-
-
-#endif /* SIM_MODULES_H */
diff --git a/sim/common/sim-n-bits.h b/sim/common/sim-n-bits.h
deleted file mode 100644
index 83157fff05a..00000000000
--- a/sim/common/sim-n-bits.h
+++ /dev/null
@@ -1,218 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1996, Andrew Cagney <cagney@highland.com.au>
- Copyright (C) 1997, Free Software Foundation, Inc.
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-#ifndef N
-#error "N must be #defined"
-#endif
-
-#include "symcat.h"
-
-#if defined(__STDC__) && defined(signed)
-/* If signed were defined to be say __signed (ie, some versions of Linux),
- then the signedN macro would not work correctly. If we have a standard
- compiler, we have signed. */
-#undef signed
-#endif
-
-/* NOTE: See end of file for #undef */
-#define unsignedN XCONCAT2(unsigned,N)
-#define signedN XCONCAT2(signed,N)
-#define LSMASKn XCONCAT2(LSMASK,N)
-#define MSMASKn XCONCAT2(MSMASK,N)
-#define LSMASKEDn XCONCAT2(LSMASKED,N)
-#define MSMASKEDn XCONCAT2(MSMASKED,N)
-#define LSEXTRACTEDn XCONCAT2(LSEXTRACTED,N)
-#define MSEXTRACTEDn XCONCAT2(MSEXTRACTED,N)
-#define LSINSERTEDn XCONCAT2(LSINSERTED,N)
-#define MSINSERTEDn XCONCAT2(MSINSERTED,N)
-#define ROTn XCONCAT2(ROT,N)
-#define ROTLn XCONCAT2(ROTL,N)
-#define ROTRn XCONCAT2(ROTR,N)
-#define MSSEXTn XCONCAT2(MSSEXT,N)
-#define LSSEXTn XCONCAT2(LSSEXT,N)
-
-/* TAGS: LSMASKED16 LSMASKED32 LSMASKED64 */
-
-INLINE_SIM_BITS\
-(unsignedN)
-LSMASKEDn (unsignedN word,
- int start,
- int stop)
-{
- word &= LSMASKn (start, stop);
- return word;
-}
-
-/* TAGS: MSMASKED16 MSMASKED32 MSMASKED64 */
-
-INLINE_SIM_BITS\
-(unsignedN)
-MSMASKEDn (unsignedN word,
- int start,
- int stop)
-{
- word &= MSMASKn (start, stop);
- return word;
-}
-
-/* TAGS: LSEXTRACTED16 LSEXTRACTED32 LSEXTRACTED64 */
-
-INLINE_SIM_BITS\
-(unsignedN)
-LSEXTRACTEDn (unsignedN val,
- int start,
- int stop)
-{
- val <<= (N - 1 - start); /* drop high bits */
- val >>= (N - 1 - start) + (stop); /* drop low bits */
- return val;
-}
-
-/* TAGS: MSEXTRACTED16 MSEXTRACTED32 MSEXTRACTED64 */
-
-INLINE_SIM_BITS\
-(unsignedN)
-MSEXTRACTEDn (unsignedN val,
- int start,
- int stop)
-{
- val <<= (start); /* drop high bits */
- val >>= (start) + (N - 1 - stop); /* drop low bits */
- return val;
-}
-
-/* TAGS: LSINSERTED16 LSINSERTED32 LSINSERTED64 */
-
-INLINE_SIM_BITS\
-(unsignedN)
-LSINSERTEDn (unsignedN val,
- int start,
- int stop)
-{
- val <<= stop;
- val &= LSMASKn (start, stop);
- return val;
-}
-
-/* TAGS: MSINSERTED16 MSINSERTED32 MSINSERTED64 */
-
-INLINE_SIM_BITS\
-(unsignedN)
-MSINSERTEDn (unsignedN val,
- int start,
- int stop)
-{
- val <<= ((N - 1) - stop);
- val &= MSMASKn (start, stop);
- return val;
-}
-
-/* TAGS: ROT16 ROT32 ROT64 */
-
-INLINE_SIM_BITS\
-(unsignedN)
-ROTn (unsignedN val,
- int shift)
-{
- if (shift > 0)
- return ROTRn (val, shift);
- else if (shift < 0)
- return ROTLn (val, -shift);
- else
- return val;
-}
-
-/* TAGS: ROTL16 ROTL32 ROTL64 */
-
-INLINE_SIM_BITS\
-(unsignedN)
-ROTLn (unsignedN val,
- int shift)
-{
- unsignedN result;
- ASSERT (shift <= N);
- result = (((val) << (shift)) | ((val) >> ((N)-(shift))));
- return result;
-}
-
-/* TAGS: ROTR16 ROTR32 ROTR64 */
-
-INLINE_SIM_BITS\
-(unsignedN)
-ROTRn (unsignedN val,
- int shift)
-{
- unsignedN result;
- ASSERT (shift <= N);
- result = (((val) >> (shift)) | ((val) << ((N)-(shift))));
- return result;
-}
-
-/* TAGS: LSSEXT16 LSSEXT32 LSSEXT64 */
-
-INLINE_SIM_BITS\
-(unsignedN)
-LSSEXTn (signedN val,
- int sign_bit)
-{
- int shift;
- /* make the sign-bit most significant and then smear it back into
- position */
- ASSERT (sign_bit < N);
- shift = ((N - 1) - sign_bit);
- val <<= shift;
- val >>= shift;
- return val;
-}
-
-/* TAGS: MSSEXT16 MSSEXT32 MSSEXT64 */
-
-INLINE_SIM_BITS\
-(unsignedN)
-MSSEXTn (signedN val,
- int sign_bit)
-{
- /* make the sign-bit most significant and then smear it back into
- position */
- ASSERT (sign_bit < N);
- val <<= sign_bit;
- val >>= sign_bit;
- return val;
-}
-
-
-/* NOTE: See start of file for #define */
-#undef LSSEXTn
-#undef MSSEXTn
-#undef ROTLn
-#undef ROTRn
-#undef ROTn
-#undef LSINSERTEDn
-#undef MSINSERTEDn
-#undef LSEXTRACTEDn
-#undef MSEXTRACTEDn
-#undef LSMASKEDn
-#undef LSMASKn
-#undef MSMASKEDn
-#undef MSMASKn
-#undef signedN
-#undef unsignedN
diff --git a/sim/common/sim-n-core.h b/sim/common/sim-n-core.h
deleted file mode 100644
index 7a04a9fb4bc..00000000000
--- a/sim/common/sim-n-core.h
+++ /dev/null
@@ -1,417 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1997, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-#ifndef N
-#error "N must be #defined"
-#endif
-#ifndef M
-#define M N
-#endif
-
-/* N: The number of bytes of data to transfer.
- M: The number of bytes in the type used to transfer the data */
-
-#if (N > M)
-#error "N (nr bytes of data) must be <= M (nr of bytes in data type)"
-#endif
-
-
-#include "symcat.h"
-
-/* NOTE: see end of file for #undef of these macros */
-
-#define unsigned_M XCONCAT2(unsigned_,M)
-
-#define T2H_M XCONCAT2(T2H_,M)
-#define H2T_M XCONCAT2(H2T_,M)
-#define SWAP_M XCONCAT2(SWAP_,M)
-
-#define sim_core_read_aligned_N XCONCAT2(sim_core_read_aligned_,N)
-#define sim_core_read_unaligned_N XCONCAT2(sim_core_read_unaligned_,N)
-#define sim_core_read_misaligned_N XCONCAT2(sim_core_read_misaligned_,N)
-#define sim_core_write_aligned_N XCONCAT2(sim_core_write_aligned_,N)
-#define sim_core_write_unaligned_N XCONCAT2(sim_core_write_unaligned_,N)
-#define sim_core_write_misaligned_N XCONCAT2(sim_core_write_misaligned_,N)
-#define sim_core_trace_M XCONCAT2(sim_core_trace_,M)
-#define sim_core_dummy_M XCONCAT2(sim_core_dummy_,M)
-
-
-#if (M == N && N > 1)
-/* dummy variable used as a return value when nothing else is
- available and the compiler is complaining */
-static unsigned_M sim_core_dummy_M;
-#endif
-
-
-/* TAGS: sim_core_trace_1 sim_core_trace_2 */
-/* TAGS: sim_core_trace_4 sim_core_trace_8 */
-/* TAGS: sim_core_trace_16 */
-
-#if (M == N)
-STATIC_SIM_CORE(void)
-sim_core_trace_M (sim_cpu *cpu,
- sim_cia cia,
- int line_nr,
- transfer_type type,
- unsigned map,
- address_word addr,
- unsigned_M val,
- int nr_bytes)
-{
- const char *transfer = (type == read_transfer ? "read" : "write");
- const char *direction = (type == read_transfer ? "->" : "<-");
-
- if (TRACE_DEBUG_P (cpu))
- trace_printf (CPU_STATE (cpu), cpu, "sim-n-core.h:%d: ", line_nr);
-
-#if (M == 16)
- trace_printf (CPU_STATE (cpu), cpu,
- "%s-%d %s:0x%08lx %s 0x%08lx%08lx%08lx%08lx\n",
- transfer, nr_bytes,
- map_to_str (map),
- (unsigned long) addr,
- direction,
- (unsigned long) V4_16 (val, 0),
- (unsigned long) V4_16 (val, 1),
- (unsigned long) V4_16 (val, 2),
- (unsigned long) V4_16 (val, 3));
-#endif
-#if (M == 8)
- trace_printf (CPU_STATE (cpu), cpu,
- "%s-%d %s:0x%08lx %s 0x%08lx%08lx\n",
- transfer, nr_bytes,
- map_to_str (map),
- (unsigned long) addr,
- direction,
- (unsigned long) V4_8 (val, 0),
- (unsigned long) V4_8 (val, 1));
-#endif
-#if (M == 4)
- trace_printf (CPU_STATE (cpu), cpu,
- "%s-%d %s:0x%08lx %s 0x%08lx\n",
- transfer,
- nr_bytes,
- map_to_str (map),
- (unsigned long) addr,
- direction,
- (unsigned long) val);
-#endif
-#if (M == 2)
- trace_printf (CPU_STATE (cpu), cpu,
- "%s-%d %s:0x%08lx %s 0x%04lx\n",
- transfer,
- nr_bytes,
- map_to_str (map),
- (unsigned long) addr,
- direction,
- (unsigned long) val);
-#endif
-#if (M == 1)
- trace_printf (CPU_STATE (cpu), cpu,
- "%s-%d %s:0x%08lx %s 0x%02lx\n",
- transfer,
- nr_bytes,
- map_to_str (map),
- (unsigned long) addr,
- direction,
- (unsigned long) val);
-#endif
-}
-#endif
-
-
-/* TAGS: sim_core_read_aligned_1 sim_core_read_aligned_2 */
-/* TAGS: sim_core_read_aligned_4 sim_core_read_aligned_8 */
-/* TAGS: sim_core_read_aligned_16 */
-
-#if (M == N)
-INLINE_SIM_CORE(unsigned_M)
-sim_core_read_aligned_N(sim_cpu *cpu,
- sim_cia cia,
- unsigned map,
- address_word xaddr)
-{
- sim_cpu_core *cpu_core = CPU_CORE (cpu);
- sim_core_common *core = &cpu_core->common;
- unsigned_M val;
- sim_core_mapping *mapping;
- address_word addr;
-#if WITH_XOR_ENDIAN != 0
- if (WITH_XOR_ENDIAN)
- addr = xaddr ^ cpu_core->xor[(N - 1) % WITH_XOR_ENDIAN];
- else
-#endif
- addr = xaddr;
- mapping = sim_core_find_mapping (core, map, addr, N, read_transfer, 1 /*abort*/, cpu, cia);
- do
- {
-#if (WITH_DEVICES)
- if (WITH_CALLBACK_MEMORY && mapping->device != NULL)
- {
- unsigned_M data;
- if (device_io_read_buffer (mapping->device, &data, mapping->space, addr, N, CPU_STATE (cpu), cpu, cia) != N)
- device_error (mapping->device, "internal error - %s - io_read_buffer should not fail",
- XSTRING (sim_core_read_aligned_N));
- val = T2H_M (data);
- break;
- }
-#endif
-#if (WITH_HW)
- if (WITH_CALLBACK_MEMORY && mapping->device != NULL)
- {
- unsigned_M data;
- sim_cpu_hw_io_read_buffer (cpu, cia, mapping->device, &data, mapping->space, addr, N);
- val = T2H_M (data);
- break;
- }
-#endif
- val = T2H_M (*(unsigned_M*) sim_core_translate (mapping, addr));
- }
- while (0);
- PROFILE_COUNT_CORE (cpu, addr, N, map);
- if (TRACE_P (cpu, TRACE_CORE_IDX))
- sim_core_trace_M (cpu, cia, __LINE__, read_transfer, map, addr, val, N);
- return val;
-}
-#endif
-
-/* TAGS: sim_core_read_unaligned_1 sim_core_read_unaligned_2 */
-/* TAGS: sim_core_read_unaligned_4 sim_core_read_unaligned_8 */
-/* TAGS: sim_core_read_unaligned_16 */
-
-#if (M == N && N > 1)
-INLINE_SIM_CORE(unsigned_M)
-sim_core_read_unaligned_N(sim_cpu *cpu,
- sim_cia cia,
- unsigned map,
- address_word addr)
-{
- int alignment = N - 1;
- /* if hardwired to forced alignment just do it */
- if (WITH_ALIGNMENT == FORCED_ALIGNMENT)
- return sim_core_read_aligned_N (cpu, cia, map, addr & ~alignment);
- else if ((addr & alignment) == 0)
- return sim_core_read_aligned_N (cpu, cia, map, addr);
- else
- switch (CURRENT_ALIGNMENT)
- {
- case STRICT_ALIGNMENT:
- SIM_CORE_SIGNAL (CPU_STATE (cpu), cpu, cia, map, N, addr,
- read_transfer, sim_core_unaligned_signal);
- case NONSTRICT_ALIGNMENT:
- {
- unsigned_M val;
- if (sim_core_xor_read_buffer (CPU_STATE (cpu), cpu, map, &val, addr, N) != N)
- SIM_CORE_SIGNAL (CPU_STATE (cpu), cpu, cia, map, N, addr,
- read_transfer, sim_core_unaligned_signal);
- val = T2H_M(val);
- PROFILE_COUNT_CORE (cpu, addr, N, map);
- if (TRACE_P (cpu, TRACE_CORE_IDX))
- sim_core_trace_M (cpu, cia, __LINE__, read_transfer, map, addr, val, N);
- return val;
- }
- case FORCED_ALIGNMENT:
- return sim_core_read_aligned_N (cpu, cia, map, addr & ~alignment);
- case MIXED_ALIGNMENT:
- sim_engine_abort (CPU_STATE (cpu), cpu, cia,
- "internal error - %s - mixed alignment",
- XSTRING (sim_core_read_unaligned_N));
- default:
- sim_engine_abort (CPU_STATE (cpu), cpu, cia,
- "internal error - %s - bad switch",
- XSTRING (sim_core_read_unaligned_N));
- /* to keep some compilers happy, we return a dummy */
- return sim_core_dummy_M;
- }
-}
-#endif
-
-/* TAGS: sim_core_read_misaligned_3 sim_core_read_misaligned_5 */
-/* TAGS: sim_core_read_misaligned_6 sim_core_read_misaligned_7 */
-
-#if (M != N)
-INLINE_SIM_CORE(unsigned_M)
-sim_core_read_misaligned_N(sim_cpu *cpu,
- sim_cia cia,
- unsigned map,
- address_word addr)
-{
- unsigned_M val = 0;
- if (sim_core_xor_read_buffer (CPU_STATE (cpu), cpu, map, &val, addr, N) != N)
- SIM_CORE_SIGNAL (CPU_STATE (cpu), cpu, cia, map, N, addr,
- read_transfer, sim_core_unaligned_signal);
- if (CURRENT_HOST_BYTE_ORDER != CURRENT_TARGET_BYTE_ORDER)
- val = SWAP_M (val);
- if (CURRENT_TARGET_BYTE_ORDER == BIG_ENDIAN)
- val >>= (M - N) * 8;
- PROFILE_COUNT_CORE (cpu, addr, N, map);
- if (TRACE_P (cpu, TRACE_CORE_IDX))
- sim_core_trace_M (cpu, cia, __LINE__, read_transfer, map, addr, val, N);
- return val;
-}
-#endif
-
-/* TAGS: sim_core_write_aligned_1 sim_core_write_aligned_2 */
-/* TAGS: sim_core_write_aligned_4 sim_core_write_aligned_8 */
-/* TAGS: sim_core_write_aligned_16 */
-
-#if (M == N)
-INLINE_SIM_CORE(void)
-sim_core_write_aligned_N(sim_cpu *cpu,
- sim_cia cia,
- unsigned map,
- address_word xaddr,
- unsigned_M val)
-{
- sim_cpu_core *cpu_core = CPU_CORE (cpu);
- sim_core_common *core = &cpu_core->common;
- sim_core_mapping *mapping;
- address_word addr;
-#if WITH_XOR_ENDIAN != 0
- if (WITH_XOR_ENDIAN)
- addr = xaddr ^ cpu_core->xor[(N - 1) % WITH_XOR_ENDIAN];
- else
-#endif
- addr = xaddr;
- mapping = sim_core_find_mapping (core, map, addr, N, write_transfer, 1 /*abort*/, cpu, cia);
- do
- {
-#if (WITH_DEVICES)
- if (WITH_CALLBACK_MEMORY && mapping->device != NULL)
- {
- unsigned_M data = H2T_M (val);
- if (device_io_write_buffer (mapping->device, &data, mapping->space, addr, N, CPU_STATE (cpu), cpu, cia) != N)
- device_error (mapping->device, "internal error - %s - io_write_buffer should not fail",
- XSTRING (sim_core_write_aligned_N));
- break;
- }
-#endif
-#if (WITH_HW)
- if (WITH_CALLBACK_MEMORY && mapping->device != NULL)
- {
- unsigned_M data = H2T_M (val);
- sim_cpu_hw_io_write_buffer (cpu, cia, mapping->device, &data, mapping->space, addr, N);
- break;
- }
-#endif
- *(unsigned_M*) sim_core_translate (mapping, addr) = H2T_M (val);
- }
- while (0);
- PROFILE_COUNT_CORE (cpu, addr, N, map);
- if (TRACE_P (cpu, TRACE_CORE_IDX))
- sim_core_trace_M (cpu, cia, __LINE__, write_transfer, map, addr, val, N);
-}
-#endif
-
-/* TAGS: sim_core_write_unaligned_1 sim_core_write_unaligned_2 */
-/* TAGS: sim_core_write_unaligned_4 sim_core_write_unaligned_8 */
-/* TAGS: sim_core_write_unaligned_16 */
-
-#if (M == N && N > 1)
-INLINE_SIM_CORE(void)
-sim_core_write_unaligned_N(sim_cpu *cpu,
- sim_cia cia,
- unsigned map,
- address_word addr,
- unsigned_M val)
-{
- int alignment = N - 1;
- /* if hardwired to forced alignment just do it */
- if (WITH_ALIGNMENT == FORCED_ALIGNMENT)
- sim_core_write_aligned_N (cpu, cia, map, addr & ~alignment, val);
- else if ((addr & alignment) == 0)
- sim_core_write_aligned_N (cpu, cia, map, addr, val);
- else
- switch (CURRENT_ALIGNMENT)
- {
- case STRICT_ALIGNMENT:
- SIM_CORE_SIGNAL (CPU_STATE (cpu), cpu, cia, map, N, addr,
- write_transfer, sim_core_unaligned_signal);
- break;
- case NONSTRICT_ALIGNMENT:
- {
- unsigned_M data = H2T_M (val);
- if (sim_core_xor_write_buffer (CPU_STATE (cpu), cpu, map, &data, addr, N) != N)
- SIM_CORE_SIGNAL (CPU_STATE (cpu), cpu, cia, map, N, addr,
- write_transfer, sim_core_unaligned_signal);
- PROFILE_COUNT_CORE (cpu, addr, N, map);
- if (TRACE_P (cpu, TRACE_CORE_IDX))
- sim_core_trace_M (cpu, cia, __LINE__, write_transfer, map, addr, val, N);
- break;
- }
- case FORCED_ALIGNMENT:
- sim_core_write_aligned_N (cpu, cia, map, addr & ~alignment, val);
- break;
- case MIXED_ALIGNMENT:
- sim_engine_abort (CPU_STATE (cpu), cpu, cia,
- "internal error - %s - mixed alignment",
- XSTRING (sim_core_write_unaligned_N));
- break;
- default:
- sim_engine_abort (CPU_STATE (cpu), cpu, cia,
- "internal error - %s - bad switch",
- XSTRING (sim_core_write_unaligned_N));
- break;
- }
-}
-#endif
-
-/* TAGS: sim_core_write_misaligned_3 sim_core_write_misaligned_5 */
-/* TAGS: sim_core_write_misaligned_6 sim_core_write_misaligned_7 */
-
-#if (M != N)
-INLINE_SIM_CORE(void)
-sim_core_write_misaligned_N(sim_cpu *cpu,
- sim_cia cia,
- unsigned map,
- address_word addr,
- unsigned_M val)
-{
- unsigned_M data = val;
- if (CURRENT_TARGET_BYTE_ORDER == BIG_ENDIAN)
- data <<= (M - N) * 8;
- if (CURRENT_HOST_BYTE_ORDER != CURRENT_TARGET_BYTE_ORDER)
- data = SWAP_M (data);
- if (sim_core_xor_write_buffer (CPU_STATE (cpu), cpu, map, &data, addr, N) != N)
- SIM_CORE_SIGNAL (CPU_STATE (cpu), cpu, cia, map, N, addr,
- write_transfer, sim_core_unaligned_signal);
- PROFILE_COUNT_CORE (cpu, addr, N, map);
- if (TRACE_P (cpu, TRACE_CORE_IDX))
- sim_core_trace_M (cpu, cia, __LINE__, write_transfer, map, addr, val, N);
-}
-#endif
-
-
-/* NOTE: see start of file for #define of these macros */
-#undef unsigned_M
-#undef T2H_M
-#undef H2T_M
-#undef SWAP_M
-#undef sim_core_read_aligned_N
-#undef sim_core_read_unaligned_N
-#undef sim_core_read_misaligned_N
-#undef sim_core_write_aligned_N
-#undef sim_core_write_unaligned_N
-#undef sim_core_write_misaligned_N
-#undef sim_core_trace_M
-#undef sim_core_dummy_M
-#undef M
-#undef N
diff --git a/sim/common/sim-n-endian.h b/sim/common/sim-n-endian.h
deleted file mode 100644
index c53e05a9a17..00000000000
--- a/sim/common/sim-n-endian.h
+++ /dev/null
@@ -1,169 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1995, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-#ifndef N
-#error "N must be #defined"
-#endif
-
-#include "symcat.h"
-
-/* NOTE: See end of file for #undef */
-#define unsigned_N XCONCAT2(unsigned_,N)
-#define endian_t2h_N XCONCAT2(endian_t2h_,N)
-#define endian_h2t_N XCONCAT2(endian_h2t_,N)
-#define _SWAP_N XCONCAT2(_SWAP_,N)
-#define swap_N XCONCAT2(swap_,N)
-#define endian_h2be_N XCONCAT2(endian_h2be_,N)
-#define endian_be2h_N XCONCAT2(endian_be2h_,N)
-#define endian_h2le_N XCONCAT2(endian_h2le_,N)
-#define endian_le2h_N XCONCAT2(endian_le2h_,N)
-#define offset_N XCONCAT2(offset_,N)
-
-/* TAGS: endian_t2h_1 endian_t2h_2 endian_t2h_4 endian_t2h_8 endian_t2h_16 */
-
-INLINE_SIM_ENDIAN\
-(unsigned_N)
-endian_t2h_N(unsigned_N raw_in)
-{
- if (CURRENT_TARGET_BYTE_ORDER == CURRENT_HOST_BYTE_ORDER) {
- return raw_in;
- }
- else {
- _SWAP_N(return,raw_in);
- }
-}
-
-/* TAGS: endian_h2t_1 endian_h2t_2 endian_h2t_4 endian_h2t_8 endian_h2t_16 */
-
-INLINE_SIM_ENDIAN\
-(unsigned_N)
-endian_h2t_N(unsigned_N raw_in)
-{
- if (CURRENT_TARGET_BYTE_ORDER == CURRENT_HOST_BYTE_ORDER) {
- return raw_in;
- }
- else {
- _SWAP_N(return,raw_in);
- }
-}
-
-/* TAGS: swap_1 swap_2 swap_4 swap_8 swap_16 */
-
-INLINE_SIM_ENDIAN\
-(unsigned_N)
-swap_N(unsigned_N raw_in)
-{
- _SWAP_N(return,raw_in);
-}
-
-/* TAGS: endian_h2be_1 endian_h2be_2 endian_h2be_4 endian_h2be_8 endian_h2be_16 */
-
-INLINE_SIM_ENDIAN\
-(unsigned_N)
-endian_h2be_N(unsigned_N raw_in)
-{
- if (CURRENT_HOST_BYTE_ORDER == BIG_ENDIAN) {
- return raw_in;
- }
- else {
- _SWAP_N(return,raw_in);
- }
-}
-
-/* TAGS: endian_be2h_1 endian_be2h_2 endian_be2h_4 endian_be2h_8 endian_be2h_16 */
-
-INLINE_SIM_ENDIAN\
-(unsigned_N)
-endian_be2h_N(unsigned_N raw_in)
-{
- if (CURRENT_HOST_BYTE_ORDER == BIG_ENDIAN) {
- return raw_in;
- }
- else {
- _SWAP_N(return,raw_in);
- }
-}
-
-/* TAGS: endian_h2le_1 endian_h2le_2 endian_h2le_4 endian_h2le_8 endian_h2le_16 */
-
-INLINE_SIM_ENDIAN\
-(unsigned_N)
-endian_h2le_N(unsigned_N raw_in)
-{
- if (CURRENT_HOST_BYTE_ORDER == LITTLE_ENDIAN) {
- return raw_in;
- }
- else {
- _SWAP_N(return,raw_in);
- }
-}
-
-/* TAGS: endian_le2h_1 endian_le2h_2 endian_le2h_4 endian_le2h_8 endian_le2h_16 */
-
-INLINE_SIM_ENDIAN\
-(unsigned_N)
-endian_le2h_N(unsigned_N raw_in)
-{
- if (CURRENT_HOST_BYTE_ORDER == LITTLE_ENDIAN) {
- return raw_in;
- }
- else {
- _SWAP_N(return,raw_in);
- }
-}
-
-/* TAGS: offset_1 offset_2 offset_4 offset_8 offset_16 */
-
-INLINE_SIM_ENDIAN\
-(void*)
-offset_N (unsigned_N *x,
- unsigned sizeof_word,
- unsigned word)
-{
- char *in = (char*)x;
- char *out;
- unsigned offset = sizeof_word * word;
- ASSERT (offset + sizeof_word <= sizeof(unsigned_N));
- ASSERT (word < (sizeof (unsigned_N) / sizeof_word));
- ASSERT ((sizeof (unsigned_N) % sizeof_word) == 0);
- if (WITH_HOST_BYTE_ORDER == LITTLE_ENDIAN)
- {
- out = in + sizeof (unsigned_N) - offset - sizeof_word;
- }
- else
- {
- out = in + offset;
- }
- return out;
-}
-
-
-/* NOTE: See start of file for #define */
-#undef unsigned_N
-#undef endian_t2h_N
-#undef endian_h2t_N
-#undef _SWAP_N
-#undef swap_N
-#undef endian_h2be_N
-#undef endian_be2h_N
-#undef endian_h2le_N
-#undef endian_le2h_N
-#undef offset_N
diff --git a/sim/common/sim-options.c b/sim/common/sim-options.c
deleted file mode 100644
index 9ccc51dc3d9..00000000000
--- a/sim/common/sim-options.c
+++ /dev/null
@@ -1,979 +0,0 @@
-/* Simulator option handling.
- Copyright (C) 1996, 1997 Free Software Foundation, Inc.
- Contributed by Cygnus Support.
-
-This file is part of GDB, the GNU debugger.
-
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License along
-with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
-
-#include "sim-main.h"
-#ifdef HAVE_STRING_H
-#include <string.h>
-#else
-#ifdef HAVE_STRINGS_H
-#include <strings.h>
-#endif
-#endif
-#ifdef HAVE_STDLIB_H
-#include <stdlib.h>
-#endif
-#include <ctype.h>
-#include "libiberty.h"
-#include "sim-options.h"
-#include "sim-io.h"
-#include "sim-assert.h"
-
-#include "bfd.h"
-
-/* Add a set of options to the simulator.
- TABLE is an array of OPTIONS terminated by a NULL `opt.name' entry.
- This is intended to be called by modules in their `install' handler. */
-
-SIM_RC
-sim_add_option_table (SIM_DESC sd, sim_cpu *cpu, const OPTION *table)
-{
- struct option_list *ol = ((struct option_list *)
- xmalloc (sizeof (struct option_list)));
-
- /* Note: The list is constructed in the reverse order we're called so
- later calls will override earlier ones (in case that ever happens).
- This is the intended behaviour. */
-
- if (cpu)
- {
- ol->next = CPU_OPTIONS (cpu);
- ol->options = table;
- CPU_OPTIONS (cpu) = ol;
- }
- else
- {
- ol->next = STATE_OPTIONS (sd);
- ol->options = table;
- STATE_OPTIONS (sd) = ol;
- }
-
- return SIM_RC_OK;
-}
-
-/* Standard option table.
- Modules may specify additional ones.
- The caller of sim_parse_args may also specify additional options
- by calling sim_add_option_table first. */
-
-static DECLARE_OPTION_HANDLER (standard_option_handler);
-
-/* FIXME: We shouldn't print in --help output options that aren't usable.
- Some fine tuning will be necessary. One can either move less general
- options to another table or use a HAVE_FOO macro to ifdef out unavailable
- options. */
-
-/* ??? One might want to conditionally compile out the entries that
- aren't enabled. There's a distinction, however, between options a
- simulator can't support and options that haven't been configured in.
- Certainly options a simulator can't support shouldn't appear in the
- output of --help. Whether the same thing applies to options that haven't
- been configured in or not isn't something I can get worked up over.
- [Note that conditionally compiling them out might simply involve moving
- the option to another table.]
- If you decide to conditionally compile them out as well, delete this
- comment and add a comment saying that that is the rule. */
-
-typedef enum {
- OPTION_DEBUG_INSN = OPTION_START,
- OPTION_DEBUG_FILE,
- OPTION_DO_COMMAND,
- OPTION_ARCHITECTURE,
- OPTION_TARGET,
- OPTION_ARCHITECTURE_INFO,
- OPTION_ENVIRONMENT,
- OPTION_ALIGNMENT,
- OPTION_VERBOSE,
-#if defined (SIM_HAVE_BIENDIAN)
- OPTION_ENDIAN,
-#endif
- OPTION_DEBUG,
-#ifdef SIM_HAVE_FLATMEM
- OPTION_MEM_SIZE,
-#endif
- OPTION_HELP,
-#ifdef SIM_H8300 /* FIXME: Should be movable to h8300 dir. */
- OPTION_H8300,
-#endif
- OPTION_LOAD_LMA,
- OPTION_LOAD_VMA,
-} STANDARD_OPTIONS;
-
-static const OPTION standard_options[] =
-{
- { {"verbose", no_argument, NULL, OPTION_VERBOSE},
- 'v', NULL, "Verbose output",
- standard_option_handler },
-
-#if defined (SIM_HAVE_BIENDIAN) /* ??? && WITH_TARGET_BYTE_ORDER == 0 */
- { {"endian", required_argument, NULL, OPTION_ENDIAN},
- 'E', "big|little", "Set endianness",
- standard_option_handler },
-#endif
-
-#ifdef SIM_HAVE_ENVIRONMENT
- /* This option isn't supported unless all choices are supported in keeping
- with the goal of not printing in --help output things the simulator can't
- do [as opposed to things that just haven't been configured in]. */
- { {"environment", required_argument, NULL, OPTION_ENVIRONMENT},
- '\0', "user|virtual|operating", "Set running environment",
- standard_option_handler },
-#endif
-
- { {"alignment", required_argument, NULL, OPTION_ALIGNMENT},
- '\0', "strict|nonstrict|forced", "Set memory access alignment",
- standard_option_handler },
-
- { {"debug", no_argument, NULL, OPTION_DEBUG},
- 'D', NULL, "Print debugging messages",
- standard_option_handler },
- { {"debug-insn", no_argument, NULL, OPTION_DEBUG_INSN},
- '\0', NULL, "Print instruction debugging messages",
- standard_option_handler },
- { {"debug-file", required_argument, NULL, OPTION_DEBUG_FILE},
- '\0', "FILE NAME", "Specify debugging output file",
- standard_option_handler },
-
-#ifdef SIM_H8300 /* FIXME: Should be movable to h8300 dir. */
- { {"h8300h", no_argument, NULL, OPTION_H8300},
- 'h', NULL, "Indicate the CPU is h8/300h or h8/300s",
- standard_option_handler },
-#endif
-
-#ifdef SIM_HAVE_FLATMEM
- { {"mem-size", required_argument, NULL, OPTION_MEM_SIZE},
- 'm', "MEMORY SIZE", "Specify memory size",
- standard_option_handler },
-#endif
-
- { {"do-command", required_argument, NULL, OPTION_DO_COMMAND},
- '\0', "COMMAND", ""/*undocumented*/,
- standard_option_handler },
-
- { {"help", no_argument, NULL, OPTION_HELP},
- 'H', NULL, "Print help information",
- standard_option_handler },
-
- { {"architecture", required_argument, NULL, OPTION_ARCHITECTURE},
- '\0', "MACHINE", "Specify the architecture to use",
- standard_option_handler },
- { {"architecture-info", no_argument, NULL, OPTION_ARCHITECTURE_INFO},
- '\0', NULL, "List supported architectures",
- standard_option_handler },
- { {"info-architecture", no_argument, NULL, OPTION_ARCHITECTURE_INFO},
- '\0', NULL, NULL,
- standard_option_handler },
-
- { {"target", required_argument, NULL, OPTION_TARGET},
- '\0', "BFDNAME", "Specify the object-code format for the object files",
- standard_option_handler },
-
-#ifdef SIM_HANDLES_LMA
- { {"load-lma", no_argument, NULL, OPTION_LOAD_LMA},
- '\0', NULL,
-#if SIM_HANDLES_LMA
- "Use VMA or LMA addresses when loading image (default LMA)",
-#else
- "Use VMA or LMA addresses when loading image (default VMA)",
-#endif
- standard_option_handler, "load-{lma,vma}" },
- { {"load-vma", no_argument, NULL, OPTION_LOAD_VMA},
- '\0', NULL, "", standard_option_handler, "" },
-#endif
-
- { {NULL, no_argument, NULL, 0}, '\0', NULL, NULL, NULL }
-};
-
-static SIM_RC
-standard_option_handler (SIM_DESC sd, sim_cpu *cpu, int opt,
- char *arg, int is_command)
-{
- int i,n;
-
- switch ((STANDARD_OPTIONS) opt)
- {
- case OPTION_VERBOSE:
- STATE_VERBOSE_P (sd) = 1;
- break;
-
-#ifdef SIM_HAVE_BIENDIAN
- case OPTION_ENDIAN:
- if (strcmp (arg, "big") == 0)
- {
- if (WITH_TARGET_BYTE_ORDER == LITTLE_ENDIAN)
- {
- sim_io_eprintf (sd, "Simulator compiled for little endian only.\n");
- return SIM_RC_FAIL;
- }
- /* FIXME:wip: Need to set something in STATE_CONFIG. */
- current_target_byte_order = BIG_ENDIAN;
- }
- else if (strcmp (arg, "little") == 0)
- {
- if (WITH_TARGET_BYTE_ORDER == BIG_ENDIAN)
- {
- sim_io_eprintf (sd, "Simulator compiled for big endian only.\n");
- return SIM_RC_FAIL;
- }
- /* FIXME:wip: Need to set something in STATE_CONFIG. */
- current_target_byte_order = LITTLE_ENDIAN;
- }
- else
- {
- sim_io_eprintf (sd, "Invalid endian specification `%s'\n", arg);
- return SIM_RC_FAIL;
- }
- break;
-#endif
-
- case OPTION_ENVIRONMENT:
- if (strcmp (arg, "user") == 0)
- STATE_ENVIRONMENT (sd) = USER_ENVIRONMENT;
- else if (strcmp (arg, "virtual") == 0)
- STATE_ENVIRONMENT (sd) = VIRTUAL_ENVIRONMENT;
- else if (strcmp (arg, "operating") == 0)
- STATE_ENVIRONMENT (sd) = OPERATING_ENVIRONMENT;
- else
- {
- sim_io_eprintf (sd, "Invalid environment specification `%s'\n", arg);
- return SIM_RC_FAIL;
- }
- if (WITH_ENVIRONMENT != ALL_ENVIRONMENT
- && WITH_ENVIRONMENT != STATE_ENVIRONMENT (sd))
- {
- char *type;
- switch (WITH_ENVIRONMENT)
- {
- case USER_ENVIRONMENT: type = "user"; break;
- case VIRTUAL_ENVIRONMENT: type = "virtual"; break;
- case OPERATING_ENVIRONMENT: type = "operating"; break;
- }
- sim_io_eprintf (sd, "Simulator compiled for the %s environment only.\n",
- type);
- return SIM_RC_FAIL;
- }
- break;
-
- case OPTION_ALIGNMENT:
- if (strcmp (arg, "strict") == 0)
- {
- if (WITH_ALIGNMENT == 0 || WITH_ALIGNMENT == STRICT_ALIGNMENT)
- {
- current_alignment = STRICT_ALIGNMENT;
- break;
- }
- }
- else if (strcmp (arg, "nonstrict") == 0)
- {
- if (WITH_ALIGNMENT == 0 || WITH_ALIGNMENT == NONSTRICT_ALIGNMENT)
- {
- current_alignment = NONSTRICT_ALIGNMENT;
- break;
- }
- }
- else if (strcmp (arg, "forced") == 0)
- {
- if (WITH_ALIGNMENT == 0 || WITH_ALIGNMENT == FORCED_ALIGNMENT)
- {
- current_alignment = FORCED_ALIGNMENT;
- break;
- }
- }
- else
- {
- sim_io_eprintf (sd, "Invalid alignment specification `%s'\n", arg);
- return SIM_RC_FAIL;
- }
- switch (WITH_ALIGNMENT)
- {
- case STRICT_ALIGNMENT:
- sim_io_eprintf (sd, "Simulator compiled for strict alignment only.\n");
- break;
- case NONSTRICT_ALIGNMENT:
- sim_io_eprintf (sd, "Simulator compiled for nonstrict alignment only.\n");
- break;
- case FORCED_ALIGNMENT:
- sim_io_eprintf (sd, "Simulator compiled for forced alignment only.\n");
- break;
- }
- return SIM_RC_FAIL;
-
- case OPTION_DEBUG:
- if (! WITH_DEBUG)
- sim_io_eprintf (sd, "Debugging not compiled in, `-D' ignored\n");
- else
- {
- for (n = 0; n < MAX_NR_PROCESSORS; ++n)
- for (i = 0; i < MAX_DEBUG_VALUES; ++i)
- CPU_DEBUG_FLAGS (STATE_CPU (sd, n))[i] = 1;
- }
- break;
-
- case OPTION_DEBUG_INSN :
- if (! WITH_DEBUG)
- sim_io_eprintf (sd, "Debugging not compiled in, `--debug-insn' ignored\n");
- else
- {
- for (n = 0; n < MAX_NR_PROCESSORS; ++n)
- CPU_DEBUG_FLAGS (STATE_CPU (sd, n))[DEBUG_INSN_IDX] = 1;
- }
- break;
-
- case OPTION_DEBUG_FILE :
- if (! WITH_DEBUG)
- sim_io_eprintf (sd, "Debugging not compiled in, `--debug-file' ignored\n");
- else
- {
- FILE *f = fopen (arg, "w");
-
- if (f == NULL)
- {
- sim_io_eprintf (sd, "Unable to open debug output file `%s'\n", arg);
- return SIM_RC_FAIL;
- }
- for (n = 0; n < MAX_NR_PROCESSORS; ++n)
- CPU_DEBUG_FILE (STATE_CPU (sd, n)) = f;
- }
- break;
-
-#ifdef SIM_H8300 /* FIXME: Can be moved to h8300 dir. */
- case OPTION_H8300:
- set_h8300h (1);
- break;
-#endif
-
-#ifdef SIM_HAVE_FLATMEM
- case OPTION_MEM_SIZE:
- {
- unsigned long ul = strtol (arg, NULL, 0);
- /* 16384: some minimal amount */
- if (! isdigit (arg[0]) || ul < 16384)
- {
- sim_io_eprintf (sd, "Invalid memory size `%s'", arg);
- return SIM_RC_FAIL;
- }
- STATE_MEM_SIZE (sd) = ul;
- }
- break;
-#endif
-
- case OPTION_DO_COMMAND:
- sim_do_command (sd, arg);
- break;
-
- case OPTION_ARCHITECTURE:
- {
- const struct bfd_arch_info *ap = bfd_scan_arch (arg);
- if (ap == NULL)
- {
- sim_io_eprintf (sd, "Architecture `%s' unknown\n", arg);
- return SIM_RC_FAIL;
- }
- STATE_ARCHITECTURE (sd) = ap;
- break;
- }
-
- case OPTION_ARCHITECTURE_INFO:
- {
- const char **list = bfd_arch_list();
- const char **lp;
- if (list == NULL)
- abort ();
- sim_io_printf (sd, "Possible architectures:");
- for (lp = list; *lp != NULL; lp++)
- sim_io_printf (sd, " %s", *lp);
- sim_io_printf (sd, "\n");
- free (list);
- break;
- }
-
- case OPTION_TARGET:
- {
- STATE_TARGET (sd) = xstrdup (arg);
- break;
- }
-
- case OPTION_LOAD_LMA:
- {
- STATE_LOAD_AT_LMA_P (sd) = 1;
- break;
- }
-
- case OPTION_LOAD_VMA:
- {
- STATE_LOAD_AT_LMA_P (sd) = 0;
- break;
- }
-
- case OPTION_HELP:
- sim_print_help (sd, is_command);
- if (STATE_OPEN_KIND (sd) == SIM_OPEN_STANDALONE)
- exit (0);
- /* FIXME: 'twould be nice to do something similar if gdb. */
- break;
- }
-
- return SIM_RC_OK;
-}
-
-/* Add the standard option list to the simulator. */
-
-SIM_RC
-standard_install (SIM_DESC sd)
-{
- SIM_ASSERT (STATE_MAGIC (sd) == SIM_MAGIC_NUMBER);
- if (sim_add_option_table (sd, NULL, standard_options) != SIM_RC_OK)
- return SIM_RC_FAIL;
-#ifdef SIM_HANDLES_LMA
- STATE_LOAD_AT_LMA_P (sd) = SIM_HANDLES_LMA;
-#endif
- return SIM_RC_OK;
-}
-
-/* Return non-zero if arg is a duplicate argument.
- If ARG is NULL, initialize. */
-
-#define ARG_HASH_SIZE 97
-#define ARG_HASH(a) ((256 * (unsigned char) a[0] + (unsigned char) a[1]) % ARG_HASH_SIZE)
-
-static int
-dup_arg_p (arg)
- char *arg;
-{
- int hash;
- static char **arg_table = NULL;
-
- if (arg == NULL)
- {
- if (arg_table == NULL)
- arg_table = (char **) xmalloc (ARG_HASH_SIZE * sizeof (char *));
- memset (arg_table, 0, ARG_HASH_SIZE * sizeof (char *));
- return 0;
- }
-
- hash = ARG_HASH (arg);
- while (arg_table[hash] != NULL)
- {
- if (strcmp (arg, arg_table[hash]) == 0)
- return 1;
- /* We assume there won't be more than ARG_HASH_SIZE arguments so we
- don't check if the table is full. */
- if (++hash == ARG_HASH_SIZE)
- hash = 0;
- }
- arg_table[hash] = arg;
- return 0;
-}
-
-/* Called by sim_open to parse the arguments. */
-
-SIM_RC
-sim_parse_args (sd, argv)
- SIM_DESC sd;
- char **argv;
-{
- int c, i, argc, num_opts;
- char *p, *short_options;
- /* The `val' option struct entry is dynamically assigned for options that
- only come in the long form. ORIG_VAL is used to get the original value
- back. */
- int *orig_val;
- struct option *lp, *long_options;
- const struct option_list *ol;
- const OPTION *opt;
- OPTION_HANDLER **handlers;
- sim_cpu **opt_cpu;
- SIM_RC result = SIM_RC_OK;
-
- /* Count the number of arguments. */
- for (argc = 0; argv[argc] != NULL; ++argc)
- continue;
-
- /* Count the number of options. */
- num_opts = 0;
- for (ol = STATE_OPTIONS (sd); ol != NULL; ol = ol->next)
- for (opt = ol->options; OPTION_VALID_P (opt); ++opt)
- ++num_opts;
- for (i = 0; i < MAX_NR_PROCESSORS; ++i)
- for (ol = CPU_OPTIONS (STATE_CPU (sd, i)); ol != NULL; ol = ol->next)
- for (opt = ol->options; OPTION_VALID_P (opt); ++opt)
- ++num_opts;
-
- /* Initialize duplicate argument checker. */
- (void) dup_arg_p (NULL);
-
- /* Build the option table for getopt. */
-
- long_options = NZALLOC (struct option, num_opts + 1);
- lp = long_options;
- short_options = NZALLOC (char, num_opts * 3 + 1);
- p = short_options;
- handlers = NZALLOC (OPTION_HANDLER *, OPTION_START + num_opts);
- orig_val = NZALLOC (int, OPTION_START + num_opts);
- opt_cpu = NZALLOC (sim_cpu *, OPTION_START + num_opts);
-
- /* Set '+' as first char so argument permutation isn't done. This
- is done to stop getopt_long returning options that appear after
- the target program. Such options should be passed unchanged into
- the program image. */
- *p++ = '+';
-
- for (i = OPTION_START, ol = STATE_OPTIONS (sd); ol != NULL; ol = ol->next)
- for (opt = ol->options; OPTION_VALID_P (opt); ++opt)
- {
- if (dup_arg_p (opt->opt.name))
- continue;
- if (opt->shortopt != 0)
- {
- *p++ = opt->shortopt;
- if (opt->opt.has_arg == required_argument)
- *p++ = ':';
- else if (opt->opt.has_arg == optional_argument)
- { *p++ = ':'; *p++ = ':'; }
- handlers[(unsigned char) opt->shortopt] = opt->handler;
- if (opt->opt.val != 0)
- orig_val[(unsigned char) opt->shortopt] = opt->opt.val;
- else
- orig_val[(unsigned char) opt->shortopt] = opt->shortopt;
- }
- if (opt->opt.name != NULL)
- {
- *lp = opt->opt;
- /* Dynamically assign `val' numbers for long options. */
- lp->val = i++;
- handlers[lp->val] = opt->handler;
- orig_val[lp->val] = opt->opt.val;
- opt_cpu[lp->val] = NULL;
- ++lp;
- }
- }
-
- for (c = 0; c < MAX_NR_PROCESSORS; ++c)
- {
- sim_cpu *cpu = STATE_CPU (sd, c);
- for (ol = CPU_OPTIONS (cpu); ol != NULL; ol = ol->next)
- for (opt = ol->options; OPTION_VALID_P (opt); ++opt)
- {
-#if 0 /* Each option is prepended with --<cpuname>- so this greatly cuts down
- on the need for dup_arg_p checking. Maybe in the future it'll be
- needed so this is just commented out, and not deleted. */
- if (dup_arg_p (opt->opt.name))
- continue;
-#endif
- /* Don't allow short versions of cpu specific options for now. */
- if (opt->shortopt != 0)
- {
- sim_io_eprintf (sd, "internal error, short cpu specific option");
- result = SIM_RC_FAIL;
- break;
- }
- if (opt->opt.name != NULL)
- {
- char *name;
- *lp = opt->opt;
- /* Prepend --<cpuname>- to the option. */
- asprintf (&name, "%s-%s", CPU_NAME (cpu), lp->name);
- lp->name = name;
- /* Dynamically assign `val' numbers for long options. */
- lp->val = i++;
- handlers[lp->val] = opt->handler;
- orig_val[lp->val] = opt->opt.val;
- opt_cpu[lp->val] = cpu;
- ++lp;
- }
- }
- }
-
- /* Terminate the short and long option lists. */
- *p = 0;
- lp->name = NULL;
-
- /* Ensure getopt is initialized. */
- optind = 0;
-
- while (1)
- {
- int longind, optc;
-
- optc = getopt_long (argc, argv, short_options, long_options, &longind);
- if (optc == -1)
- {
- if (STATE_OPEN_KIND (sd) == SIM_OPEN_STANDALONE)
- STATE_PROG_ARGV (sd) = dupargv (argv + optind);
- break;
- }
- if (optc == '?')
- {
- result = SIM_RC_FAIL;
- break;
- }
-
- if ((*handlers[optc]) (sd, opt_cpu[optc], orig_val[optc], optarg, 0/*!is_command*/) == SIM_RC_FAIL)
- {
- result = SIM_RC_FAIL;
- break;
- }
- }
-
- zfree (long_options);
- zfree (short_options);
- zfree (handlers);
- zfree (opt_cpu);
- zfree (orig_val);
- return result;
-}
-
-/* Utility of sim_print_help to print a list of option tables. */
-
-static void
-print_help (SIM_DESC sd, sim_cpu *cpu, const struct option_list *ol, int is_command)
-{
- const OPTION *opt;
-
- for ( ; ol != NULL; ol = ol->next)
- for (opt = ol->options; OPTION_VALID_P (opt); ++opt)
- {
- const int indent = 30;
- int comma, len;
- const OPTION *o;
-
- if (dup_arg_p (opt->opt.name))
- continue;
-
- if (opt->doc == NULL)
- continue;
-
- if (opt->doc_name != NULL && opt->doc_name [0] == '\0')
- continue;
-
- sim_io_printf (sd, " ");
-
- comma = 0;
- len = 2;
-
- /* list any short options (aliases) for the current OPT */
- if (!is_command)
- {
- o = opt;
- do
- {
- if (o->shortopt != '\0')
- {
- sim_io_printf (sd, "%s-%c", comma ? ", " : "", o->shortopt);
- len += (comma ? 2 : 0) + 2;
- if (o->arg != NULL)
- {
- if (o->opt.has_arg == optional_argument)
- {
- sim_io_printf (sd, "[%s]", o->arg);
- len += 1 + strlen (o->arg) + 1;
- }
- else
- {
- sim_io_printf (sd, " %s", o->arg);
- len += 1 + strlen (o->arg);
- }
- }
- comma = 1;
- }
- ++o;
- }
- while (OPTION_VALID_P (o) && o->doc == NULL);
- }
-
- /* list any long options (aliases) for the current OPT */
- o = opt;
- do
- {
- const char *name;
- const char *cpu_prefix = cpu ? CPU_NAME (cpu) : NULL;
- if (o->doc_name != NULL)
- name = o->doc_name;
- else
- name = o->opt.name;
- if (name != NULL)
- {
- sim_io_printf (sd, "%s%s%s%s%s",
- comma ? ", " : "",
- is_command ? "" : "--",
- cpu ? cpu_prefix : "",
- cpu ? "-" : "",
- name);
- len += ((comma ? 2 : 0)
- + (is_command ? 0 : 2)
- + strlen (name));
- if (o->arg != NULL)
- {
- if (o->opt.has_arg == optional_argument)
- {
- sim_io_printf (sd, "[=%s]", o->arg);
- len += 2 + strlen (o->arg) + 1;
- }
- else
- {
- sim_io_printf (sd, " %s", o->arg);
- len += 1 + strlen (o->arg);
- }
- }
- comma = 1;
- }
- ++o;
- }
- while (OPTION_VALID_P (o) && o->doc == NULL);
-
- if (len >= indent)
- {
- sim_io_printf (sd, "\n%*s", indent, "");
- }
- else
- sim_io_printf (sd, "%*s", indent - len, "");
-
- /* print the description, word wrap long lines */
- {
- const char *chp = opt->doc;
- unsigned doc_width = 80 - indent;
- while (strlen (chp) >= doc_width) /* some slack */
- {
- const char *end = chp + doc_width - 1;
- while (end > chp && !isspace (*end))
- end --;
- if (end == chp)
- end = chp + doc_width - 1;
- sim_io_printf (sd, "%.*s\n%*s", end - chp, chp, indent, "");
- chp = end;
- while (isspace (*chp) && *chp != '\0')
- chp++;
- }
- sim_io_printf (sd, "%s\n", chp);
- }
- }
-}
-
-/* Print help messages for the options. */
-
-void
-sim_print_help (sd, is_command)
- SIM_DESC sd;
- int is_command;
-{
- if (STATE_OPEN_KIND (sd) == SIM_OPEN_STANDALONE)
- sim_io_printf (sd, "Usage: %s [options] program [program args]\n",
- STATE_MY_NAME (sd));
-
- /* Initialize duplicate argument checker. */
- (void) dup_arg_p (NULL);
-
- if (STATE_OPEN_KIND (sd) == SIM_OPEN_STANDALONE)
- sim_io_printf (sd, "Options:\n");
- else
- sim_io_printf (sd, "Commands:\n");
-
- print_help (sd, NULL, STATE_OPTIONS (sd), is_command);
- sim_io_printf (sd, "\n");
-
- /* Print cpu-specific options. */
- {
- int i;
-
- for (i = 0; i < MAX_NR_PROCESSORS; ++i)
- {
- sim_cpu *cpu = STATE_CPU (sd, i);
- if (CPU_OPTIONS (cpu) == NULL)
- continue;
- sim_io_printf (sd, "CPU %s specific options:\n", CPU_NAME (cpu));
- print_help (sd, cpu, CPU_OPTIONS (cpu), is_command);
- sim_io_printf (sd, "\n");
- }
- }
-
- sim_io_printf (sd, "Note: Depending on the simulator configuration some %ss\n",
- STATE_OPEN_KIND (sd) == SIM_OPEN_STANDALONE ? "option" : "command");
- sim_io_printf (sd, " may not be applicable\n");
-
- if (STATE_OPEN_KIND (sd) == SIM_OPEN_STANDALONE)
- {
- sim_io_printf (sd, "\n");
- sim_io_printf (sd, "program args Arguments to pass to simulated program.\n");
- sim_io_printf (sd, " Note: Very few simulators support this.\n");
- }
-}
-
-/* Utility of sim_args_command to find the closest match for a command.
- Commands that have "-" in them can be specified as separate words.
- e.g. sim memory-region 0x800000,0x4000
- or sim memory region 0x800000,0x4000
- If CPU is non-null, use its option table list, otherwise use the main one.
- *PARGI is where to start looking in ARGV. It is updated to point past
- the found option. */
-
-static const OPTION *
-find_match (SIM_DESC sd, sim_cpu *cpu, char *argv[], int *pargi)
-{
- const struct option_list *ol;
- const OPTION *opt;
- /* most recent option match */
- const OPTION *matching_opt = NULL;
- int matching_argi = -1;
-
- if (cpu)
- ol = CPU_OPTIONS (cpu);
- else
- ol = STATE_OPTIONS (sd);
-
- /* Skip passed elements specified by *PARGI. */
- argv += *pargi;
-
- for ( ; ol != NULL; ol = ol->next)
- for (opt = ol->options; OPTION_VALID_P (opt); ++opt)
- {
- int argi = 0;
- const char *name = opt->opt.name;
- if (name == NULL)
- continue;
- while (argv [argi] != NULL
- && strncmp (name, argv [argi], strlen (argv [argi])) == 0)
- {
- name = &name [strlen (argv[argi])];
- if (name [0] == '-')
- {
- /* leading match ...<a-b-c>-d-e-f - continue search */
- name ++; /* skip `-' */
- argi ++;
- continue;
- }
- else if (name [0] == '\0')
- {
- /* exact match ...<a-b-c-d-e-f> - better than before? */
- if (argi > matching_argi)
- {
- matching_argi = argi;
- matching_opt = opt;
- }
- break;
- }
- else
- break;
- }
- }
-
- *pargi = matching_argi;
- return matching_opt;
-}
-
-SIM_RC
-sim_args_command (SIM_DESC sd, char *cmd)
-{
- /* something to do? */
- if (cmd == NULL)
- return SIM_RC_OK; /* FIXME - perhaphs help would be better */
-
- if (cmd [0] == '-')
- {
- /* user specified -<opt> ... form? */
- char **argv = buildargv (cmd);
- SIM_RC rc = sim_parse_args (sd, argv);
- freeargv (argv);
- return rc;
- }
- else
- {
- char **argv = buildargv (cmd);
- const OPTION *matching_opt = NULL;
- int matching_argi;
- sim_cpu *cpu;
-
- if (argv [0] == NULL)
- return SIM_RC_OK; /* FIXME - perhaphs help would be better */
-
- /* First check for a cpu selector. */
- {
- char *cpu_name = xstrdup (argv[0]);
- char *hyphen = strchr (cpu_name, '-');
- if (hyphen)
- *hyphen = 0;
- cpu = sim_cpu_lookup (sd, cpu_name);
- if (cpu)
- {
- /* If <cpuname>-<command>, point argv[0] at <command>. */
- if (hyphen)
- {
- matching_argi = 0;
- argv[0] += hyphen - cpu_name + 1;
- }
- else
- matching_argi = 1;
- matching_opt = find_match (sd, cpu, argv, &matching_argi);
- /* If hyphen found restore argv[0]. */
- if (hyphen)
- argv[0] -= hyphen - cpu_name + 1;
- }
- free (cpu_name);
- }
-
- /* If that failed, try the main table. */
- if (matching_opt == NULL)
- {
- matching_argi = 0;
- matching_opt = find_match (sd, NULL, argv, &matching_argi);
- }
-
- if (matching_opt != NULL)
- {
- switch (matching_opt->opt.has_arg)
- {
- case no_argument:
- if (argv [matching_argi + 1] == NULL)
- matching_opt->handler (sd, cpu, matching_opt->opt.val,
- NULL, 1/*is_command*/);
- else
- sim_io_eprintf (sd, "Command `%s' takes no arguments\n",
- matching_opt->opt.name);
- break;
- case optional_argument:
- if (argv [matching_argi + 1] == NULL)
- matching_opt->handler (sd, cpu, matching_opt->opt.val,
- NULL, 1/*is_command*/);
- else if (argv [matching_argi + 2] == NULL)
- matching_opt->handler (sd, cpu, matching_opt->opt.val,
- argv [matching_argi + 1], 1/*is_command*/);
- else
- sim_io_eprintf (sd, "Command `%s' requires no more than one argument\n",
- matching_opt->opt.name);
- break;
- case required_argument:
- if (argv [matching_argi + 1] == NULL)
- sim_io_eprintf (sd, "Command `%s' requires an argument\n",
- matching_opt->opt.name);
- else if (argv [matching_argi + 2] == NULL)
- matching_opt->handler (sd, cpu, matching_opt->opt.val,
- argv [matching_argi + 1], 1/*is_command*/);
- else
- sim_io_eprintf (sd, "Command `%s' requires only one argument\n",
- matching_opt->opt.name);
- }
- freeargv (argv);
- return SIM_RC_OK;
- }
-
- freeargv (argv);
- }
-
- /* didn't find anything that remotly matched */
- return SIM_RC_FAIL;
-}
diff --git a/sim/common/sim-options.h b/sim/common/sim-options.h
deleted file mode 100644
index 78cad567602..00000000000
--- a/sim/common/sim-options.h
+++ /dev/null
@@ -1,149 +0,0 @@
-/* Header file for simulator argument handling.
- Copyright (C) 1997, 1998 Free Software Foundation, Inc.
- Contributed by Cygnus Support.
-
-This file is part of GDB, the GNU debugger.
-
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License along
-with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
-
-#ifndef SIM_OPTIONS_H
-#define SIM_OPTIONS_H
-
-#include "getopt.h"
-
-/* ARGV option support.
-
- Options for the standalone simulator are parsed by sim_open since
- sim_open handles the large majority of them and it also parses the
- options when invoked by gdb [or any external program].
-
- For OPTION_HANDLER: arg#2 is the processor to apply to option to
- (all if NULL); arg#3 is the option index; arg#4 is the option's
- argument, NULL if optional and missing; arg#5 is nonzero if a
- command is being interpreted. */
-
-typedef SIM_RC (OPTION_HANDLER) PARAMS ((SIM_DESC, sim_cpu *, int, char *, int));
-
-/* Declare option handlers with a macro so it's usable on k&r systems. */
-#define DECLARE_OPTION_HANDLER(fn) SIM_RC fn PARAMS ((SIM_DESC, sim_cpu *, int, char *, int))
-
-typedef struct {
-
- /* The long option information. */
-
- struct option opt;
-
- /* The short option with the same meaning ('\0' if none).
-
- For short options, when OPT.VAL is non-zero, it, instead of
- SHORTOPT is passed to HANDLER.
-
- For example, for the below:
-
- { {"dc", no_argument, NULL, OPTION_VALUE},
- 'd', NULL, "<<description>>", HANDLER},
- { {NULL, no_argument, NULL, OPTION_VALUE},
- 'e', NULL, "<<description>>", HANDLER},
-
- the options --dc, -d and -e all result in OPTION_VALUE being
- passed into HANDLER. */
-
- char shortopt;
-
- /* The name of the argument (NULL if none). */
-
- const char *arg;
-
- /* The documentation string.
-
- If DOC is NULL, this option name is listed as a synonym for the
- previous option.
-
- If DOC and DOC_NAME are the empty string (i.e. ""), this option
- is not listed in usage and help messages.
-
- For example, given the aliased options --dc, --dp and -d, then:
-
- { {"dc", no_argument, NULL, OPTION_DC},
- 'd', NULL, "<<description>>", HANDLER},
- { {"dp", no_argument, NULL, OPTION_DP},
- '\0', NULL, NULL, HANDLER},
-
- will list ``-d, --dc, --dp <<description>>'' */
-
- const char *doc;
-
- /* A function to process the option. */
-
- OPTION_HANDLER *handler;
-
- /* The documentation name. Used when generating usage and help
- messages.
-
- If DOC and DOC_NAME are the empty string (i.e. ""), this option
- is not listed in usage and help messages.
-
- If DOC_NAME is a non-empty string then it, insted of OPT.NAME, is
- listed as the name of the option in usage and help messages.
-
- For example, given the options --set-pc and --set-sp, then:
-
- { {"set-pc", no_argument, NULL, OPTION_SET_PC},
- '\0', NULL, "<<description>>", HANDLER, "--set-REGNAME" },
- { {"set-sp", no_argument, NULL, OPTION_SET_SP},
- '\0', NULL, "", HANDLER, "" },
-
- will list ``--set-REGNAME <<description>>". */
-
- const char *doc_name;
-
-} OPTION;
-
-/* All options that don't have a short form equivalent begin with this for
- `val'. 130 isn't special, just some non-ASCII value to begin at.
- Modules needn't worry about collisions here, the code dynamically assigned
- the actual numbers used and then passes the original value to the option
- handler. */
-#define OPTION_START 130
-
-/* Identify valid option in the table */
-#define OPTION_VALID_P(O) ((O)->opt.name != NULL || (O)->shortopt != '\0')
-
-/* List of options added by various modules. */
-typedef struct option_list {
- struct option_list *next;
- const OPTION *options;
-} OPTION_LIST;
-
-/* Add a set of options to the simulator.
- CPU is the cpu the options apply to or NULL for all cpus.
- TABLE is an array of OPTIONS terminated by a NULL `opt.name' entry. */
-SIM_RC sim_add_option_table PARAMS ((SIM_DESC sd, sim_cpu *cpu, const OPTION *table));
-
-/* Install handler for the standard options. */
-MODULE_INSTALL_FN standard_install;
-
-/* Called by sim_open to parse the arguments. */
-SIM_RC sim_parse_args PARAMS ((SIM_DESC sd, char **argv));
-
-/* Print help messages for the options. IS_COMMAND is non-zero when
- this function is called from the command line interpreter. */
-void sim_print_help PARAMS ((SIM_DESC sd, int is_command));
-
-/* Try to parse the command as if it is an option, Only fail when
- totally unsuccessful */
-SIM_RC sim_args_command PARAMS ((SIM_DESC sd, char *cmd));
-
-#endif /* SIM_OPTIONS_H */
diff --git a/sim/common/sim-profile.c b/sim/common/sim-profile.c
deleted file mode 100644
index 20d7a541f31..00000000000
--- a/sim/common/sim-profile.c
+++ /dev/null
@@ -1,1274 +0,0 @@
-/* Default profiling support.
- Copyright (C) 1996, 1997, 1998, 2000, 2001 Free Software Foundation, Inc.
- Contributed by Cygnus Support.
-
-This file is part of GDB, the GNU debugger.
-
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License along
-with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
-
-#include "sim-main.h"
-#include "sim-io.h"
-#include "sim-options.h"
-#include "sim-assert.h"
-
-#ifdef HAVE_STDLIB_H
-#include <stdlib.h>
-#endif
-
-#ifdef HAVE_STRING_H
-#include <string.h>
-#else
-#ifdef HAVE_STRINGS_H
-#include <strings.h>
-#endif
-#endif
-#include <ctype.h>
-
-#define COMMAS(n) sim_add_commas (comma_buf, sizeof (comma_buf), (n))
-
-static MODULE_INIT_FN profile_init;
-static MODULE_UNINSTALL_FN profile_uninstall;
-
-static DECLARE_OPTION_HANDLER (profile_option_handler);
-
-enum {
- OPTION_PROFILE_INSN = OPTION_START,
- OPTION_PROFILE_MEMORY,
- OPTION_PROFILE_MODEL,
- OPTION_PROFILE_FILE,
- OPTION_PROFILE_CORE,
- OPTION_PROFILE_CPU_FREQUENCY,
- OPTION_PROFILE_PC,
- OPTION_PROFILE_PC_RANGE,
- OPTION_PROFILE_PC_GRANULARITY,
- OPTION_PROFILE_RANGE,
- OPTION_PROFILE_FUNCTION
-};
-
-static const OPTION profile_options[] = {
- { {"profile", optional_argument, NULL, 'p'},
- 'p', "on|off", "Perform profiling",
- profile_option_handler },
- { {"profile-insn", optional_argument, NULL, OPTION_PROFILE_INSN},
- '\0', "on|off", "Perform instruction profiling",
- profile_option_handler },
- { {"profile-memory", optional_argument, NULL, OPTION_PROFILE_MEMORY},
- '\0', "on|off", "Perform memory profiling",
- profile_option_handler },
- { {"profile-core", optional_argument, NULL, OPTION_PROFILE_CORE},
- '\0', "on|off", "Perform CORE profiling",
- profile_option_handler },
- { {"profile-model", optional_argument, NULL, OPTION_PROFILE_MODEL},
- '\0', "on|off", "Perform model profiling",
- profile_option_handler },
- { {"profile-cpu-frequency", required_argument, NULL,
- OPTION_PROFILE_CPU_FREQUENCY},
- '\0', "CPU FREQUENCY", "Specify the speed of the simulated cpu clock",
- profile_option_handler },
-
- { {"profile-file", required_argument, NULL, OPTION_PROFILE_FILE},
- '\0', "FILE NAME", "Specify profile output file",
- profile_option_handler },
-
- { {"profile-pc", optional_argument, NULL, OPTION_PROFILE_PC},
- '\0', "on|off", "Perform PC profiling",
- profile_option_handler },
- { {"profile-pc-frequency", required_argument, NULL, 'F'},
- 'F', "PC PROFILE FREQUENCY", "Specified PC profiling frequency",
- profile_option_handler },
- { {"profile-pc-size", required_argument, NULL, 'S'},
- 'S', "PC PROFILE SIZE", "Specify PC profiling size",
- profile_option_handler },
- { {"profile-pc-granularity", required_argument, NULL, OPTION_PROFILE_PC_GRANULARITY},
- '\0', "PC PROFILE GRANULARITY", "Specify PC profiling sample coverage",
- profile_option_handler },
- { {"profile-pc-range", required_argument, NULL, OPTION_PROFILE_PC_RANGE},
- '\0', "BASE,BOUND", "Specify PC profiling address range",
- profile_option_handler },
-
-#ifdef SIM_HAVE_ADDR_RANGE
- { {"profile-range", required_argument, NULL, OPTION_PROFILE_RANGE},
- '\0', "START,END", "Specify range of addresses for instruction and model profiling",
- profile_option_handler },
-#if 0 /*wip*/
- { {"profile-function", required_argument, NULL, OPTION_PROFILE_FUNCTION},
- '\0', "FUNCTION", "Specify function to profile",
- profile_option_handler },
-#endif
-#endif
-
- { {NULL, no_argument, NULL, 0}, '\0', NULL, NULL, NULL }
-};
-
-/* Set/reset the profile options indicated in MASK. */
-
-SIM_RC
-set_profile_option_mask (SIM_DESC sd, const char *name, int mask, const char *arg)
-{
- int profile_nr;
- int cpu_nr;
- int profile_val = 1;
-
- if (arg != NULL)
- {
- if (strcmp (arg, "yes") == 0
- || strcmp (arg, "on") == 0
- || strcmp (arg, "1") == 0)
- profile_val = 1;
- else if (strcmp (arg, "no") == 0
- || strcmp (arg, "off") == 0
- || strcmp (arg, "0") == 0)
- profile_val = 0;
- else
- {
- sim_io_eprintf (sd, "Argument `%s' for `--profile%s' invalid, one of `on', `off', `yes', `no' expected\n", arg, name);
- return SIM_RC_FAIL;
- }
- }
-
- /* update applicable profile bits */
- for (profile_nr = 0; profile_nr < MAX_PROFILE_VALUES; ++profile_nr)
- {
- if ((mask & (1 << profile_nr)) == 0)
- continue;
-
-#if 0 /* see sim-trace.c, set flags in STATE here if/when there are any */
- /* Set non-cpu specific values. */
- switch (profile_nr)
- {
- case ??? :
- break;
- }
-#endif
-
- /* Set cpu values. */
- for (cpu_nr = 0; cpu_nr < MAX_NR_PROCESSORS; cpu_nr++)
- {
- CPU_PROFILE_FLAGS (STATE_CPU (sd, cpu_nr))[profile_nr] = profile_val;
- }
- }
-
- /* Re-compute the cpu profile summary. */
- if (profile_val)
- {
- for (cpu_nr = 0; cpu_nr < MAX_NR_PROCESSORS; cpu_nr++)
- CPU_PROFILE_DATA (STATE_CPU (sd, cpu_nr))->profile_any_p = 1;
- }
- else
- {
- for (cpu_nr = 0; cpu_nr < MAX_NR_PROCESSORS; cpu_nr++)
- {
- CPU_PROFILE_DATA (STATE_CPU (sd, cpu_nr))->profile_any_p = 0;
- for (profile_nr = 0; profile_nr < MAX_PROFILE_VALUES; ++profile_nr)
- {
- if (CPU_PROFILE_FLAGS (STATE_CPU (sd, cpu_nr))[profile_nr])
- {
- CPU_PROFILE_DATA (STATE_CPU (sd, cpu_nr))->profile_any_p = 1;
- break;
- }
- }
- }
- }
-
- return SIM_RC_OK;
-}
-
-/* Set one profile option based on its IDX value.
- Not static as cgen-scache.c uses it. */
-
-SIM_RC
-sim_profile_set_option (SIM_DESC sd, const char *name, int idx, const char *arg)
-{
- return set_profile_option_mask (sd, name, 1 << idx, arg);
-}
-
-static SIM_RC
-parse_frequency (SIM_DESC sd, const char *arg, unsigned long *freq)
-{
- const char *ch;
- /* First, parse a decimal number. */
- *freq = 0;
- ch = arg;
- if (isdigit (*arg))
- {
- for (/**/; *ch != '\0'; ++ch)
- {
- if (! isdigit (*ch))
- break;
- *freq = *freq * 10 + (*ch - '0');
- }
-
- /* Accept KHz, MHz or Hz as a suffix. */
- if (tolower (*ch) == 'm')
- {
- *freq *= 1000000;
- ++ch;
- }
- else if (tolower (*ch) == 'k')
- {
- *freq *= 1000;
- ++ch;
- }
-
- if (tolower (*ch) == 'h')
- {
- ++ch;
- if (tolower (*ch) == 'z')
- ++ch;
- }
- }
-
- if (*ch != '\0')
- {
- sim_io_eprintf (sd, "Invalid argument for --profile-cpu-frequency: %s\n",
- arg);
- *freq = 0;
- return SIM_RC_FAIL;
- }
-
- return SIM_RC_OK;
-}
-
-static SIM_RC
-profile_option_handler (SIM_DESC sd,
- sim_cpu *cpu,
- int opt,
- char *arg,
- int is_command)
-{
- int cpu_nr;
-
- /* FIXME: Need to handle `cpu' arg. */
-
- switch (opt)
- {
- case 'p' :
- if (! WITH_PROFILE)
- sim_io_eprintf (sd, "Profiling not compiled in, `-p' ignored\n");
- else
- return set_profile_option_mask (sd, "profile", PROFILE_USEFUL_MASK,
- arg);
- break;
-
- case OPTION_PROFILE_INSN :
- if (WITH_PROFILE_INSN_P)
- return sim_profile_set_option (sd, "-insn", PROFILE_INSN_IDX, arg);
- else
- sim_io_eprintf (sd, "Instruction profiling not compiled in, `--profile-insn' ignored\n");
- break;
-
- case OPTION_PROFILE_MEMORY :
- if (WITH_PROFILE_MEMORY_P)
- return sim_profile_set_option (sd, "-memory", PROFILE_MEMORY_IDX, arg);
- else
- sim_io_eprintf (sd, "Memory profiling not compiled in, `--profile-memory' ignored\n");
- break;
-
- case OPTION_PROFILE_CORE :
- if (WITH_PROFILE_CORE_P)
- return sim_profile_set_option (sd, "-core", PROFILE_CORE_IDX, arg);
- else
- sim_io_eprintf (sd, "CORE profiling not compiled in, `--profile-core' ignored\n");
- break;
-
- case OPTION_PROFILE_MODEL :
- if (WITH_PROFILE_MODEL_P)
- return sim_profile_set_option (sd, "-model", PROFILE_MODEL_IDX, arg);
- else
- sim_io_eprintf (sd, "Model profiling not compiled in, `--profile-model' ignored\n");
- break;
-
- case OPTION_PROFILE_CPU_FREQUENCY :
- {
- unsigned long val;
- SIM_RC rc = parse_frequency (sd, arg, &val);
- if (rc == SIM_RC_OK)
- {
- for (cpu_nr = 0; cpu_nr < MAX_NR_PROCESSORS; ++cpu_nr)
- PROFILE_CPU_FREQ (CPU_PROFILE_DATA (STATE_CPU (sd,cpu_nr))) = val;
- }
- return rc;
- }
-
- case OPTION_PROFILE_FILE :
- /* FIXME: Might want this to apply to pc profiling only,
- or have two profile file options. */
- if (! WITH_PROFILE)
- sim_io_eprintf (sd, "Profiling not compiled in, `--profile-file' ignored\n");
- else
- {
- FILE *f = fopen (arg, "w");
-
- if (f == NULL)
- {
- sim_io_eprintf (sd, "Unable to open profile output file `%s'\n", arg);
- return SIM_RC_FAIL;
- }
- for (cpu_nr = 0; cpu_nr < MAX_NR_PROCESSORS; ++cpu_nr)
- PROFILE_FILE (CPU_PROFILE_DATA (STATE_CPU (sd, cpu_nr))) = f;
- }
- break;
-
- case OPTION_PROFILE_PC:
- if (WITH_PROFILE_PC_P)
- return sim_profile_set_option (sd, "-pc", PROFILE_PC_IDX, arg);
- else
- sim_io_eprintf (sd, "PC profiling not compiled in, `--profile-pc' ignored\n");
- break;
-
- case 'F' :
- if (WITH_PROFILE_PC_P)
- {
- /* FIXME: Validate arg. */
- int val = atoi (arg);
- for (cpu_nr = 0; cpu_nr < MAX_NR_PROCESSORS; ++cpu_nr)
- PROFILE_PC_FREQ (CPU_PROFILE_DATA (STATE_CPU (sd, cpu_nr))) = val;
- for (cpu_nr = 0; cpu_nr < MAX_NR_PROCESSORS; ++cpu_nr)
- CPU_PROFILE_FLAGS (STATE_CPU (sd, cpu_nr))[PROFILE_PC_IDX] = 1;
- }
- else
- sim_io_eprintf (sd, "PC profiling not compiled in, `--profile-pc-frequency' ignored\n");
- break;
-
- case 'S' :
- if (WITH_PROFILE_PC_P)
- {
- /* FIXME: Validate arg. */
- int val = atoi (arg);
- for (cpu_nr = 0; cpu_nr < MAX_NR_PROCESSORS; ++cpu_nr)
- PROFILE_PC_NR_BUCKETS (CPU_PROFILE_DATA (STATE_CPU (sd, cpu_nr))) = val;
- for (cpu_nr = 0; cpu_nr < MAX_NR_PROCESSORS; ++cpu_nr)
- CPU_PROFILE_FLAGS (STATE_CPU (sd, cpu_nr))[PROFILE_PC_IDX] = 1;
- }
- else
- sim_io_eprintf (sd, "PC profiling not compiled in, `--profile-pc-size' ignored\n");
- break;
-
- case OPTION_PROFILE_PC_GRANULARITY:
- if (WITH_PROFILE_PC_P)
- {
- int shift;
- int val = atoi (arg);
- /* check that the granularity is a power of two */
- shift = 0;
- while (val > (1 << shift))
- {
- shift += 1;
- }
- if (val != (1 << shift))
- {
- sim_io_eprintf (sd, "PC profiling granularity not a power of two\n");
- return SIM_RC_FAIL;
- }
- if (shift == 0)
- {
- sim_io_eprintf (sd, "PC profiling granularity too small");
- return SIM_RC_FAIL;
- }
- for (cpu_nr = 0; cpu_nr < MAX_NR_PROCESSORS; ++cpu_nr)
- PROFILE_PC_SHIFT (CPU_PROFILE_DATA (STATE_CPU (sd, cpu_nr))) = shift;
- for (cpu_nr = 0; cpu_nr < MAX_NR_PROCESSORS; ++cpu_nr)
- CPU_PROFILE_FLAGS (STATE_CPU (sd, cpu_nr))[PROFILE_PC_IDX] = 1;
- }
- else
- sim_io_eprintf (sd, "PC profiling not compiled in, `--profile-pc-granularity' ignored\n");
- break;
-
- case OPTION_PROFILE_PC_RANGE:
- if (WITH_PROFILE_PC_P)
- {
- /* FIXME: Validate args */
- char *chp = arg;
- unsigned long base;
- unsigned long bound;
- base = strtoul (chp, &chp, 0);
- if (*chp != ',')
- {
- sim_io_eprintf (sd, "--profile-pc-range missing BOUND argument\n");
- return SIM_RC_FAIL;
- }
- bound = strtoul (chp + 1, NULL, 0);
- for (cpu_nr = 0; cpu_nr < MAX_NR_PROCESSORS; ++cpu_nr)
- {
- PROFILE_PC_START (CPU_PROFILE_DATA (STATE_CPU (sd, cpu_nr))) = base;
- PROFILE_PC_END (CPU_PROFILE_DATA (STATE_CPU (sd, cpu_nr))) = bound;
- }
- for (cpu_nr = 0; cpu_nr < MAX_NR_PROCESSORS; ++cpu_nr)
- CPU_PROFILE_FLAGS (STATE_CPU (sd, cpu_nr))[PROFILE_PC_IDX] = 1;
- }
- else
- sim_io_eprintf (sd, "PC profiling not compiled in, `--profile-pc-range' ignored\n");
- break;
-
-#ifdef SIM_HAVE_ADDR_RANGE
- case OPTION_PROFILE_RANGE :
- if (WITH_PROFILE)
- {
- char *chp = arg;
- unsigned long start,end;
- start = strtoul (chp, &chp, 0);
- if (*chp != ',')
- {
- sim_io_eprintf (sd, "--profile-range missing END argument\n");
- return SIM_RC_FAIL;
- }
- end = strtoul (chp + 1, NULL, 0);
- /* FIXME: Argument validation. */
- if (cpu != NULL)
- sim_addr_range_add (PROFILE_RANGE (CPU_PROFILE_DATA (cpu)),
- start, end);
- else
- for (cpu_nr = 0; cpu_nr < MAX_NR_PROCESSORS; ++cpu_nr)
- sim_addr_range_add (PROFILE_RANGE (CPU_PROFILE_DATA (STATE_CPU (sd, cpu_nr))),
- start, end);
- }
- else
- sim_io_eprintf (sd, "Profiling not compiled in, `--profile-range' ignored\n");
- break;
-
- case OPTION_PROFILE_FUNCTION :
- if (WITH_PROFILE)
- {
- /*wip: need to compute function range given name*/
- }
- else
- sim_io_eprintf (sd, "Profiling not compiled in, `--profile-function' ignored\n");
- break;
-#endif /* SIM_HAVE_ADDR_RANGE */
- }
-
- return SIM_RC_OK;
-}
-
-/* PC profiling support */
-
-#if WITH_PROFILE_PC_P
-
-static void
-profile_pc_cleanup (SIM_DESC sd)
-{
- int n;
- for (n = 0; n < MAX_NR_PROCESSORS; n++)
- {
- sim_cpu *cpu = STATE_CPU (sd, n);
- PROFILE_DATA *data = CPU_PROFILE_DATA (cpu);
- if (PROFILE_PC_COUNT (data) != NULL)
- zfree (PROFILE_PC_COUNT (data));
- PROFILE_PC_COUNT (data) = NULL;
- if (PROFILE_PC_EVENT (data) != NULL)
- sim_events_deschedule (sd, PROFILE_PC_EVENT (data));
- PROFILE_PC_EVENT (data) = NULL;
- }
-}
-
-
-static void
-profile_pc_uninstall (SIM_DESC sd)
-{
- profile_pc_cleanup (sd);
-}
-
-static void
-profile_pc_event (SIM_DESC sd,
- void *data)
-{
- sim_cpu *cpu = (sim_cpu*) data;
- PROFILE_DATA *profile = CPU_PROFILE_DATA (cpu);
- address_word pc;
- unsigned i;
- switch (STATE_WATCHPOINTS (sd)->sizeof_pc)
- {
- case 2: pc = *(unsigned_2*)(STATE_WATCHPOINTS (sd)->pc) ; break;
- case 4: pc = *(unsigned_4*)(STATE_WATCHPOINTS (sd)->pc) ; break;
- case 8: pc = *(unsigned_8*)(STATE_WATCHPOINTS (sd)->pc) ; break;
- default: pc = 0;
- }
- i = (pc - PROFILE_PC_START (profile)) >> PROFILE_PC_SHIFT (profile);
- if (i < PROFILE_PC_NR_BUCKETS (profile))
- PROFILE_PC_COUNT (profile) [i] += 1; /* Overflow? */
- else
- PROFILE_PC_COUNT (profile) [PROFILE_PC_NR_BUCKETS (profile)] += 1;
- PROFILE_PC_EVENT (profile) =
- sim_events_schedule (sd, PROFILE_PC_FREQ (profile), profile_pc_event, cpu);
-}
-
-static SIM_RC
-profile_pc_init (SIM_DESC sd)
-{
- int n;
- profile_pc_cleanup (sd);
- for (n = 0; n < MAX_NR_PROCESSORS; n++)
- {
- sim_cpu *cpu = STATE_CPU (sd, n);
- PROFILE_DATA *data = CPU_PROFILE_DATA (cpu);
- if (CPU_PROFILE_FLAGS (STATE_CPU (sd, n))[PROFILE_PC_IDX]
- && STATE_WATCHPOINTS (sd)->pc != NULL)
- {
- int bucket_size;
- /* fill in the frequency if not specified */
- if (PROFILE_PC_FREQ (data) == 0)
- PROFILE_PC_FREQ (data) = 256;
- /* fill in the start/end if not specified */
- if (PROFILE_PC_END (data) == 0)
- {
- PROFILE_PC_START (data) = STATE_TEXT_START (sd);
- PROFILE_PC_END (data) = STATE_TEXT_END (sd);
- }
- /* Compute the number of buckets if not specified. */
- if (PROFILE_PC_NR_BUCKETS (data) == 0)
- {
- if (PROFILE_PC_BUCKET_SIZE (data) == 0)
- PROFILE_PC_NR_BUCKETS (data) = 16;
- else
- {
- if (PROFILE_PC_END (data) == 0)
- {
- /* nr_buckets = (full-address-range / 2) / (bucket_size / 2) */
- PROFILE_PC_NR_BUCKETS (data) =
- ((1 << (STATE_WATCHPOINTS (sd)->sizeof_pc) * (8 - 1))
- / (PROFILE_PC_BUCKET_SIZE (data) / 2));
- }
- else
- {
- PROFILE_PC_NR_BUCKETS (data) =
- ((PROFILE_PC_END (data)
- - PROFILE_PC_START (data)
- + PROFILE_PC_BUCKET_SIZE (data) - 1)
- / PROFILE_PC_BUCKET_SIZE (data));
- }
- }
- }
- /* Compute the bucket size if not specified. Ensure that it
- is rounded up to the next power of two */
- if (PROFILE_PC_BUCKET_SIZE (data) == 0)
- {
- if (PROFILE_PC_END (data) == 0)
- /* bucket_size = (full-address-range / 2) / (nr_buckets / 2) */
- bucket_size = ((1 << ((STATE_WATCHPOINTS (sd)->sizeof_pc * 8) - 1))
- / (PROFILE_PC_NR_BUCKETS (data) / 2));
- else
- bucket_size = ((PROFILE_PC_END (data)
- - PROFILE_PC_START (data)
- + PROFILE_PC_NR_BUCKETS (data) - 1)
- / PROFILE_PC_NR_BUCKETS (data));
- PROFILE_PC_SHIFT (data) = 0;
- while (bucket_size > PROFILE_PC_BUCKET_SIZE (data))
- {
- PROFILE_PC_SHIFT (data) += 1;
- }
- }
- /* Align the end address with bucket size */
- if (PROFILE_PC_END (data) != 0)
- PROFILE_PC_END (data) = (PROFILE_PC_START (data)
- + (PROFILE_PC_BUCKET_SIZE (data)
- * PROFILE_PC_NR_BUCKETS (data)));
- /* create the relevant buffers */
- PROFILE_PC_COUNT (data) =
- NZALLOC (unsigned, PROFILE_PC_NR_BUCKETS (data) + 1);
- PROFILE_PC_EVENT (data) =
- sim_events_schedule (sd,
- PROFILE_PC_FREQ (data),
- profile_pc_event,
- cpu);
- }
- }
- return SIM_RC_OK;
-}
-
-static void
-profile_print_pc (sim_cpu *cpu, int verbose)
-{
- SIM_DESC sd = CPU_STATE (cpu);
- PROFILE_DATA *profile = CPU_PROFILE_DATA (cpu);
- char comma_buf[20];
- unsigned max_val;
- unsigned total;
- unsigned i;
-
- if (PROFILE_PC_COUNT (profile) == 0)
- return;
-
- sim_io_printf (sd, "Program Counter Statistics:\n\n");
-
- /* First pass over data computes various things. */
- max_val = 0;
- total = 0;
- for (i = 0; i <= PROFILE_PC_NR_BUCKETS (profile); ++i)
- {
- total += PROFILE_PC_COUNT (profile) [i];
- if (PROFILE_PC_COUNT (profile) [i] > max_val)
- max_val = PROFILE_PC_COUNT (profile) [i];
- }
-
- sim_io_printf (sd, " Total samples: %s\n",
- COMMAS (total));
- sim_io_printf (sd, " Granularity: %s bytes per bucket\n",
- COMMAS (PROFILE_PC_BUCKET_SIZE (profile)));
- sim_io_printf (sd, " Size: %s buckets\n",
- COMMAS (PROFILE_PC_NR_BUCKETS (profile)));
- sim_io_printf (sd, " Frequency: %s cycles per sample\n",
- COMMAS (PROFILE_PC_FREQ (profile)));
-
- if (PROFILE_PC_END (profile) != 0)
- sim_io_printf (sd, " Range: 0x%lx 0x%lx\n",
- (long) PROFILE_PC_START (profile),
- (long) PROFILE_PC_END (profile));
-
- if (verbose && max_val != 0)
- {
- /* Now we can print the histogram. */
- sim_io_printf (sd, "\n");
- for (i = 0; i <= PROFILE_PC_NR_BUCKETS (profile); ++i)
- {
- if (PROFILE_PC_COUNT (profile) [i] != 0)
- {
- sim_io_printf (sd, " ");
- if (i == PROFILE_PC_NR_BUCKETS (profile))
- sim_io_printf (sd, "%10s:", "overflow");
- else
- sim_io_printf (sd, "0x%08lx:",
- (long) (PROFILE_PC_START (profile)
- + (i * PROFILE_PC_BUCKET_SIZE (profile))));
- sim_io_printf (sd, " %*s",
- max_val < 10000 ? 5 : 10,
- COMMAS (PROFILE_PC_COUNT (profile) [i]));
- sim_io_printf (sd, " %4.1f",
- (PROFILE_PC_COUNT (profile) [i] * 100.0) / total);
- sim_io_printf (sd, ": ");
- sim_profile_print_bar (sd, PROFILE_HISTOGRAM_WIDTH,
- PROFILE_PC_COUNT (profile) [i],
- max_val);
- sim_io_printf (sd, "\n");
- }
- }
- }
-
- /* dump the histogram to the file "gmon.out" using BSD's gprof file
- format */
- /* Since a profile data file is in the native format of the host on
- which the profile is being, endian issues are not considered in
- the code below. */
- /* FIXME: Is this the best place for this code? */
- {
- FILE *pf = fopen ("gmon.out", "wb");
-
- if (pf == NULL)
- sim_io_eprintf (sd, "Failed to open \"gmon.out\" profile file\n");
- else
- {
- int ok;
- /* FIXME: what if the target has a 64 bit PC? */
- unsigned32 header[3];
- unsigned loop;
- if (PROFILE_PC_END (profile) != 0)
- {
- header[0] = PROFILE_PC_START (profile);
- header[1] = PROFILE_PC_END (profile);
- }
- else
- {
- header[0] = 0;
- header[1] = 0;
- }
- /* size of sample buffer (+ header) */
- header[2] = PROFILE_PC_NR_BUCKETS (profile) * 2 + sizeof (header);
-
- /* Header must be written out in target byte order. */
- H2T (header[0]);
- H2T (header[1]);
- H2T (header[2]);
-
- ok = fwrite (&header, sizeof (header), 1, pf);
- for (loop = 0;
- ok && (loop < PROFILE_PC_NR_BUCKETS (profile));
- loop++)
- {
- signed16 sample;
- if (PROFILE_PC_COUNT (profile) [loop] >= 0xffff)
- sample = 0xffff;
- else
- sample = PROFILE_PC_COUNT (profile) [loop];
- ok = fwrite (&sample, sizeof (sample), 1, pf);
- }
- if (ok == 0)
- sim_io_eprintf (sd, "Failed to write to \"gmon.out\" profile file\n");
- fclose(pf);
- }
- }
-
- sim_io_printf (sd, "\n");
-}
-
-#endif
-
-/* Summary printing support. */
-
-#if WITH_PROFILE_INSN_P
-
-static SIM_RC
-profile_insn_init (SIM_DESC sd)
-{
- int c;
-
- for (c = 0; c < MAX_NR_PROCESSORS; ++c)
- {
- sim_cpu *cpu = STATE_CPU (sd, c);
-
- if (CPU_MAX_INSNS (cpu) > 0)
- PROFILE_INSN_COUNT (CPU_PROFILE_DATA (cpu)) = NZALLOC (unsigned int, CPU_MAX_INSNS (cpu));
- }
-
- return SIM_RC_OK;
-}
-
-static void
-profile_print_insn (sim_cpu *cpu, int verbose)
-{
- unsigned int i, n, total, max_val, max_name_len;
- SIM_DESC sd = CPU_STATE (cpu);
- PROFILE_DATA *data = CPU_PROFILE_DATA (cpu);
- char comma_buf[20];
-
- /* If MAX_INSNS not set, insn profiling isn't supported. */
- if (CPU_MAX_INSNS (cpu) == 0)
- return;
-
- sim_io_printf (sd, "Instruction Statistics");
-#ifdef SIM_HAVE_ADDR_RANGE
- if (PROFILE_RANGE (data)->ranges)
- sim_io_printf (sd, " (for selected address range(s))");
-#endif
- sim_io_printf (sd, "\n\n");
-
- /* First pass over data computes various things. */
- max_val = 0;
- total = 0;
- max_name_len = 0;
- for (i = 0; i < CPU_MAX_INSNS (cpu); ++i)
- {
- const char *name = (*CPU_INSN_NAME (cpu)) (cpu, i);
-
- if (name == NULL)
- continue;
- total += PROFILE_INSN_COUNT (data) [i];
- if (PROFILE_INSN_COUNT (data) [i] > max_val)
- max_val = PROFILE_INSN_COUNT (data) [i];
- n = strlen (name);
- if (n > max_name_len)
- max_name_len = n;
- }
- /* set the total insn count, in case client is being lazy */
- if (! PROFILE_TOTAL_INSN_COUNT (data))
- PROFILE_TOTAL_INSN_COUNT (data) = total;
-
- sim_io_printf (sd, " Total: %s insns\n", COMMAS (total));
-
- if (verbose && max_val != 0)
- {
- /* Now we can print the histogram. */
- sim_io_printf (sd, "\n");
- for (i = 0; i < CPU_MAX_INSNS (cpu); ++i)
- {
- const char *name = (*CPU_INSN_NAME (cpu)) (cpu, i);
-
- if (name == NULL)
- continue;
- if (PROFILE_INSN_COUNT (data) [i] != 0)
- {
- sim_io_printf (sd, " %*s: %*s: ",
- max_name_len, name,
- max_val < 10000 ? 5 : 10,
- COMMAS (PROFILE_INSN_COUNT (data) [i]));
- sim_profile_print_bar (sd, PROFILE_HISTOGRAM_WIDTH,
- PROFILE_INSN_COUNT (data) [i],
- max_val);
- sim_io_printf (sd, "\n");
- }
- }
- }
-
- sim_io_printf (sd, "\n");
-}
-
-#endif
-
-#if WITH_PROFILE_MEMORY_P
-
-static void
-profile_print_memory (sim_cpu *cpu, int verbose)
-{
- unsigned int i, n;
- unsigned int total_read, total_write;
- unsigned int max_val, max_name_len;
- /* FIXME: Need to add smp support. */
- SIM_DESC sd = CPU_STATE (cpu);
- PROFILE_DATA *data = CPU_PROFILE_DATA (cpu);
- char comma_buf[20];
-
- sim_io_printf (sd, "Memory Access Statistics\n\n");
-
- /* First pass over data computes various things. */
- max_val = total_read = total_write = max_name_len = 0;
- for (i = 0; i < MODE_TARGET_MAX; ++i)
- {
- total_read += PROFILE_READ_COUNT (data) [i];
- total_write += PROFILE_WRITE_COUNT (data) [i];
- if (PROFILE_READ_COUNT (data) [i] > max_val)
- max_val = PROFILE_READ_COUNT (data) [i];
- if (PROFILE_WRITE_COUNT (data) [i] > max_val)
- max_val = PROFILE_WRITE_COUNT (data) [i];
- n = strlen (MODE_NAME (i));
- if (n > max_name_len)
- max_name_len = n;
- }
-
- /* One could use PROFILE_LABEL_WIDTH here. I chose not to. */
- sim_io_printf (sd, " Total read: %s accesses\n",
- COMMAS (total_read));
- sim_io_printf (sd, " Total write: %s accesses\n",
- COMMAS (total_write));
-
- if (verbose && max_val != 0)
- {
- /* FIXME: Need to separate instruction fetches from data fetches
- as the former swamps the latter. */
- /* Now we can print the histogram. */
- sim_io_printf (sd, "\n");
- for (i = 0; i < MODE_TARGET_MAX; ++i)
- {
- if (PROFILE_READ_COUNT (data) [i] != 0)
- {
- sim_io_printf (sd, " %*s read: %*s: ",
- max_name_len, MODE_NAME (i),
- max_val < 10000 ? 5 : 10,
- COMMAS (PROFILE_READ_COUNT (data) [i]));
- sim_profile_print_bar (sd, PROFILE_HISTOGRAM_WIDTH,
- PROFILE_READ_COUNT (data) [i],
- max_val);
- sim_io_printf (sd, "\n");
- }
- if (PROFILE_WRITE_COUNT (data) [i] != 0)
- {
- sim_io_printf (sd, " %*s write: %*s: ",
- max_name_len, MODE_NAME (i),
- max_val < 10000 ? 5 : 10,
- COMMAS (PROFILE_WRITE_COUNT (data) [i]));
- sim_profile_print_bar (sd, PROFILE_HISTOGRAM_WIDTH,
- PROFILE_WRITE_COUNT (data) [i],
- max_val);
- sim_io_printf (sd, "\n");
- }
- }
- }
-
- sim_io_printf (sd, "\n");
-}
-
-#endif
-
-#if WITH_PROFILE_CORE_P
-
-static void
-profile_print_core (sim_cpu *cpu, int verbose)
-{
- unsigned int total;
- unsigned int max_val;
- /* FIXME: Need to add smp support. */
- SIM_DESC sd = CPU_STATE (cpu);
- PROFILE_DATA *data = CPU_PROFILE_DATA (cpu);
- char comma_buf[20];
-
- sim_io_printf (sd, "CORE Statistics\n\n");
-
- /* First pass over data computes various things. */
- {
- unsigned map;
- total = 0;
- max_val = 0;
- for (map = 0; map < nr_maps; map++)
- {
- total += PROFILE_CORE_COUNT (data) [map];
- if (PROFILE_CORE_COUNT (data) [map] > max_val)
- max_val = PROFILE_CORE_COUNT (data) [map];
- }
- }
-
- /* One could use PROFILE_LABEL_WIDTH here. I chose not to. */
- sim_io_printf (sd, " Total: %s accesses\n",
- COMMAS (total));
-
- if (verbose && max_val != 0)
- {
- unsigned map;
- /* Now we can print the histogram. */
- sim_io_printf (sd, "\n");
- for (map = 0; map < nr_maps; map++)
- {
- if (PROFILE_CORE_COUNT (data) [map] != 0)
- {
- sim_io_printf (sd, "%10s:", map_to_str (map));
- sim_io_printf (sd, "%*s: ",
- max_val < 10000 ? 5 : 10,
- COMMAS (PROFILE_CORE_COUNT (data) [map]));
- sim_profile_print_bar (sd, PROFILE_HISTOGRAM_WIDTH,
- PROFILE_CORE_COUNT (data) [map],
- max_val);
- sim_io_printf (sd, "\n");
- }
- }
- }
-
- sim_io_printf (sd, "\n");
-}
-
-#endif
-
-#if WITH_PROFILE_MODEL_P
-
-static void
-profile_print_model (sim_cpu *cpu, int verbose)
-{
- SIM_DESC sd = CPU_STATE (cpu);
- PROFILE_DATA *data = CPU_PROFILE_DATA (cpu);
- unsigned long cti_stall_cycles = PROFILE_MODEL_CTI_STALL_CYCLES (data);
- unsigned long load_stall_cycles = PROFILE_MODEL_LOAD_STALL_CYCLES (data);
- unsigned long total_cycles = PROFILE_MODEL_TOTAL_CYCLES (data);
- char comma_buf[20];
-
- sim_io_printf (sd, "Model %s Timing Information",
- MODEL_NAME (CPU_MODEL (cpu)));
-#ifdef SIM_HAVE_ADDR_RANGE
- if (PROFILE_RANGE (data)->ranges)
- sim_io_printf (sd, " (for selected address range(s))");
-#endif
- sim_io_printf (sd, "\n\n");
- sim_io_printf (sd, " %-*s %s\n",
- PROFILE_LABEL_WIDTH, "Taken branches:",
- COMMAS (PROFILE_MODEL_TAKEN_COUNT (data)));
- sim_io_printf (sd, " %-*s %s\n",
- PROFILE_LABEL_WIDTH, "Untaken branches:",
- COMMAS (PROFILE_MODEL_UNTAKEN_COUNT (data)));
- sim_io_printf (sd, " %-*s %s\n",
- PROFILE_LABEL_WIDTH, "Cycles stalled due to branches:",
- COMMAS (cti_stall_cycles));
- sim_io_printf (sd, " %-*s %s\n",
- PROFILE_LABEL_WIDTH, "Cycles stalled due to loads:",
- COMMAS (load_stall_cycles));
- sim_io_printf (sd, " %-*s %s\n",
- PROFILE_LABEL_WIDTH, "Total cycles (*approximate*):",
- COMMAS (total_cycles));
- sim_io_printf (sd, "\n");
-}
-
-#endif
-
-void
-sim_profile_print_bar (SIM_DESC sd, unsigned int width,
- unsigned int val, unsigned int max_val)
-{
- unsigned int i, count;
-
- count = ((double) val / (double) max_val) * (double) width;
-
- for (i = 0; i < count; ++i)
- sim_io_printf (sd, "*");
-}
-
-/* Print the simulator's execution speed for CPU. */
-
-static void
-profile_print_speed (sim_cpu *cpu)
-{
- SIM_DESC sd = CPU_STATE (cpu);
- PROFILE_DATA *data = CPU_PROFILE_DATA (cpu);
- unsigned long milliseconds = sim_events_elapsed_time (sd);
- unsigned long total = PROFILE_TOTAL_INSN_COUNT (data);
- double clock;
- double secs;
- char comma_buf[20];
-
- sim_io_printf (sd, "Simulator Execution Speed\n\n");
-
- if (total != 0)
- sim_io_printf (sd, " Total instructions: %s\n", COMMAS (total));
-
- if (milliseconds < 1000)
- sim_io_printf (sd, " Total execution time: < 1 second\n\n");
- else
- {
- /* The printing of the time rounded to 2 decimal places makes the speed
- calculation seem incorrect [even though it is correct]. So round
- MILLISECONDS first. This can marginally affect the result, but it's
- better that the user not perceive there's a math error. */
- secs = (double) milliseconds / 1000;
- secs = ((double) (unsigned long) (secs * 100 + .5)) / 100;
- sim_io_printf (sd, " Total execution time : %.2f seconds\n", secs);
- /* Don't confuse things with data that isn't useful.
- If we ran for less than 2 seconds, only use the data if we
- executed more than 100,000 insns. */
- if (secs >= 2 || total >= 100000)
- sim_io_printf (sd, " Simulator speed: %s insns/second\n",
- COMMAS ((unsigned long) ((double) total / secs)));
- }
-
- /* Print simulated execution time if the cpu frequency has been specified. */
- clock = PROFILE_CPU_FREQ (data);
- if (clock != 0)
- {
- if (clock >= 1000000)
- sim_io_printf (sd, " Simulated cpu frequency: %.2f MHz\n",
- clock / 1000000);
- else
- sim_io_printf (sd, " Simulated cpu frequency: %.2f Hz\n", clock);
-
-#if WITH_PROFILE_MODEL_P
- if (PROFILE_FLAGS (data) [PROFILE_MODEL_IDX])
- {
- /* The printing of the time rounded to 2 decimal places makes the
- speed calculation seem incorrect [even though it is correct].
- So round SECS first. This can marginally affect the result,
- but it's better that the user not perceive there's a math
- error. */
- secs = PROFILE_MODEL_TOTAL_CYCLES (data) / clock;
- secs = ((double) (unsigned long) (secs * 100 + .5)) / 100;
- sim_io_printf (sd, " Simulated execution time: %.2f seconds\n",
- secs);
- }
-#endif /* WITH_PROFILE_MODEL_P */
- }
-}
-
-/* Print selected address ranges. */
-
-static void
-profile_print_addr_ranges (sim_cpu *cpu)
-{
- ADDR_SUBRANGE *asr = PROFILE_RANGE (CPU_PROFILE_DATA (cpu))->ranges;
- SIM_DESC sd = CPU_STATE (cpu);
-
- if (asr)
- {
- sim_io_printf (sd, "Selected address ranges\n\n");
- while (asr != NULL)
- {
- sim_io_printf (sd, " 0x%lx - 0x%lx\n",
- (long) asr->start, (long) asr->end);
- asr = asr->next;
- }
- sim_io_printf (sd, "\n");
- }
-}
-
-/* Top level function to print all summary profile information.
- It is [currently] intended that all such data is printed by this function.
- I'd rather keep it all in one place for now. To that end, MISC_CPU and
- MISC are callbacks used to print any miscellaneous data.
-
- One might want to add a user option that allows printing by type or by cpu
- (i.e. print all insn data for each cpu first, or print data cpu by cpu).
- This may be a case of featuritis so it's currently left out.
-
- Note that results are indented two spaces to distinguish them from
- section titles. */
-
-static void
-profile_info (SIM_DESC sd, int verbose)
-{
- int i,c;
- int print_title_p = 0;
-
- /* Only print the title if some data has been collected. */
- /* ??? Why don't we just exit if no data collected? */
- /* FIXME: If the number of processors can be selected on the command line,
- then MAX_NR_PROCESSORS will need to take an argument of `sd'. */
-
- for (c = 0; c < MAX_NR_PROCESSORS; ++c)
- {
- sim_cpu *cpu = STATE_CPU (sd, c);
- PROFILE_DATA *data = CPU_PROFILE_DATA (cpu);
-
- for (i = 0; i < MAX_PROFILE_VALUES; ++i)
- if (PROFILE_FLAGS (data) [i])
- print_title_p = 1;
- /* One could break out early if print_title_p is set. */
- }
- if (print_title_p)
- sim_io_printf (sd, "Summary profiling results:\n\n");
-
- /* Loop, cpu by cpu, printing results. */
-
- for (c = 0; c < MAX_NR_PROCESSORS; ++c)
- {
- sim_cpu *cpu = STATE_CPU (sd, c);
- PROFILE_DATA *data = CPU_PROFILE_DATA (cpu);
-
- if (MAX_NR_PROCESSORS > 1
- && (0
-#if WITH_PROFILE_INSN_P
- || PROFILE_FLAGS (data) [PROFILE_INSN_IDX]
-#endif
-#if WITH_PROFILE_MEMORY_P
- || PROFILE_FLAGS (data) [PROFILE_MEMORY_IDX]
-#endif
-#if WITH_PROFILE_CORE_P
- || PROFILE_FLAGS (data) [PROFILE_CORE_IDX]
-#endif
-#if WITH_PROFILE_MODEL_P
- || PROFILE_FLAGS (data) [PROFILE_MODEL_IDX]
-#endif
-#if WITH_PROFILE_SCACHE_P && WITH_SCACHE
- || PROFILE_FLAGS (data) [PROFILE_SCACHE_IDX]
-#endif
-#if WITH_PROFILE_PC_P
- || PROFILE_FLAGS (data) [PROFILE_PC_IDX]
-#endif
- ))
- {
- sim_io_printf (sd, "CPU %d\n\n", c);
- }
-
-#ifdef SIM_HAVE_ADDR_RANGE
- if (print_title_p
- && (PROFILE_INSN_P (cpu)
- || PROFILE_MODEL_P (cpu)))
- profile_print_addr_ranges (cpu);
-#endif
-
-#if WITH_PROFILE_INSN_P
- if (PROFILE_FLAGS (data) [PROFILE_INSN_IDX])
- profile_print_insn (cpu, verbose);
-#endif
-
-#if WITH_PROFILE_MEMORY_P
- if (PROFILE_FLAGS (data) [PROFILE_MEMORY_IDX])
- profile_print_memory (cpu, verbose);
-#endif
-
-#if WITH_PROFILE_CORE_P
- if (PROFILE_FLAGS (data) [PROFILE_CORE_IDX])
- profile_print_core (cpu, verbose);
-#endif
-
-#if WITH_PROFILE_MODEL_P
- if (PROFILE_FLAGS (data) [PROFILE_MODEL_IDX])
- profile_print_model (cpu, verbose);
-#endif
-
-#if WITH_PROFILE_SCACHE_P && WITH_SCACHE
- if (PROFILE_FLAGS (data) [PROFILE_SCACHE_IDX])
- scache_print_profile (cpu, verbose);
-#endif
-
-#if WITH_PROFILE_PC_P
- if (PROFILE_FLAGS (data) [PROFILE_PC_IDX])
- profile_print_pc (cpu, verbose);
-#endif
-
- /* Print cpu-specific data before the execution speed. */
- if (PROFILE_INFO_CPU_CALLBACK (data) != NULL)
- PROFILE_INFO_CPU_CALLBACK (data) (cpu, verbose);
-
- /* Always try to print execution time and speed. */
- if (verbose
- || PROFILE_FLAGS (data) [PROFILE_INSN_IDX])
- profile_print_speed (cpu);
- }
-
- /* Finally print non-cpu specific miscellaneous data. */
- if (STATE_PROFILE_INFO_CALLBACK (sd))
- STATE_PROFILE_INFO_CALLBACK (sd) (sd, verbose);
-
-}
-
-/* Install profiling support in the simulator. */
-
-SIM_RC
-profile_install (SIM_DESC sd)
-{
- int i;
-
- SIM_ASSERT (STATE_MAGIC (sd) == SIM_MAGIC_NUMBER);
- sim_add_option_table (sd, NULL, profile_options);
- for (i = 0; i < MAX_NR_PROCESSORS; ++i)
- memset (CPU_PROFILE_DATA (STATE_CPU (sd, i)), 0,
- sizeof (* CPU_PROFILE_DATA (STATE_CPU (sd, i))));
-#if WITH_PROFILE_INSN_P
- sim_module_add_init_fn (sd, profile_insn_init);
-#endif
-#if WITH_PROFILE_PC_P
- sim_module_add_uninstall_fn (sd, profile_pc_uninstall);
- sim_module_add_init_fn (sd, profile_pc_init);
-#endif
- sim_module_add_init_fn (sd, profile_init);
- sim_module_add_uninstall_fn (sd, profile_uninstall);
- sim_module_add_info_fn (sd, profile_info);
- return SIM_RC_OK;
-}
-
-static SIM_RC
-profile_init (SIM_DESC sd)
-{
-#ifdef SIM_HAVE_ADDR_RANGE
- /* Check if a range has been specified without specifying what to
- collect. */
- {
- int i;
-
- for (i = 0; i < MAX_NR_PROCESSORS; ++i)
- {
- sim_cpu *cpu = STATE_CPU (sd, i);
-
- if (ADDR_RANGE_RANGES (PROFILE_RANGE (CPU_PROFILE_DATA (cpu)))
- && ! (PROFILE_INSN_P (cpu)
- || PROFILE_MODEL_P (cpu)))
- {
- sim_io_eprintf_cpu (cpu, "Profiling address range specified without --profile-insn or --profile-model.\n");
- sim_io_eprintf_cpu (cpu, "Address range ignored.\n");
- sim_addr_range_delete (PROFILE_RANGE (CPU_PROFILE_DATA (cpu)),
- 0, ~ (address_word) 0);
- }
- }
- }
-#endif
-
- return SIM_RC_OK;
-}
-
-static void
-profile_uninstall (SIM_DESC sd)
-{
- int i,j;
-
- for (i = 0; i < MAX_NR_PROCESSORS; ++i)
- {
- sim_cpu *cpu = STATE_CPU (sd, i);
- PROFILE_DATA *data = CPU_PROFILE_DATA (cpu);
-
- if (PROFILE_FILE (data) != NULL)
- {
- /* If output from different cpus is going to the same file,
- avoid closing the file twice. */
- for (j = 0; j < i; ++j)
- if (PROFILE_FILE (CPU_PROFILE_DATA (STATE_CPU (sd, j)))
- == PROFILE_FILE (data))
- break;
- if (i == j)
- fclose (PROFILE_FILE (data));
- }
-
- if (PROFILE_INSN_COUNT (data) != NULL)
- zfree (PROFILE_INSN_COUNT (data));
- }
-}
diff --git a/sim/common/sim-profile.h b/sim/common/sim-profile.h
deleted file mode 100644
index 81fad7d1cad..00000000000
--- a/sim/common/sim-profile.h
+++ /dev/null
@@ -1,297 +0,0 @@
-/* Profile header for simulators using common framework.
- Copyright (C) 1996, 1997, 1998 Free Software Foundation, Inc.
- Contributed by Cygnus Support.
-
-This file is part of GDB, the GNU debugger.
-
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License along
-with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
-
-#ifndef SIM_PROFILE_H
-#define SIM_PROFILE_H
-
-#ifndef WITH_PROFILE
-Error, WITH_PROFILE not defined.
-#endif
-
-/* Standard profilable entities. */
-
-enum {
- /* Profile insn usage. */
- PROFILE_INSN_IDX = 1,
-
- /* Profile memory usage. */
- PROFILE_MEMORY_IDX,
-
- /* Profile the cpu model (cycles, etc.). */
- PROFILE_MODEL_IDX,
-
- /* Profile the simulator's execution cache. */
- PROFILE_SCACHE_IDX,
-
- /* Profile the PC. */
- PROFILE_PC_IDX,
-
- /* Profile sim-core.c stuff. */
- /* ??? The difference between this and PROFILE_MEMORY_IDX is ... ? */
- PROFILE_CORE_IDX,
-
- /* Simulator specific profile bits begin here. */
- PROFILE_NEXT_IDX
-};
-
-/* Maximum number of profilable entities. */
-#ifndef MAX_PROFILE_VALUES
-#define MAX_PROFILE_VALUES 32
-#endif
-
-/* The -p option only prints useful values. It's easy to type and shouldn't
- splat on the screen everything under the sun making nothing easy to
- find. */
-#define PROFILE_USEFUL_MASK \
-((1 << PROFILE_INSN_IDX) \
- | (1 << PROFILE_MEMORY_IDX) \
- | (1 << PROFILE_MODEL_IDX) \
- | (1 << PROFILE_CORE_IDX))
-
-/* Utility to set profile options. */
-SIM_RC set_profile_option_mask (SIM_DESC sd_, const char *name_, int mask_,
- const char *arg_);
-
-/* Utility to parse a --profile-<foo> option. */
-/* ??? On the one hand all calls could be confined to sim-profile.c, but
- on the other hand keeping a module's profiling option with the module's
- source is cleaner. */
-
-SIM_RC sim_profile_set_option (SIM_DESC sd_, const char *name_, int idx_,
- const char *arg_);
-
-/* Masks so WITH_PROFILE can have symbolic values.
- The case choice here is on purpose. The lowercase parts are args to
- --with-profile. */
-#define PROFILE_insn (1 << PROFILE_INSN_IDX)
-#define PROFILE_memory (1 << PROFILE_MEMORY_IDX)
-#define PROFILE_model (1 << PROFILE_MODEL_IDX)
-#define PROFILE_scache (1 << PROFILE_SCACHE_IDX)
-#define PROFILE_pc (1 << PROFILE_PC_IDX)
-#define PROFILE_core (1 << PROFILE_CORE_IDX)
-
-/* Preprocessor macros to simplify tests of WITH_PROFILE. */
-#define WITH_PROFILE_INSN_P (WITH_PROFILE & PROFILE_insn)
-#define WITH_PROFILE_MEMORY_P (WITH_PROFILE & PROFILE_memory)
-#define WITH_PROFILE_MODEL_P (WITH_PROFILE & PROFILE_model)
-#define WITH_PROFILE_SCACHE_P (WITH_PROFILE & PROFILE_scache)
-#define WITH_PROFILE_PC_P (WITH_PROFILE & PROFILE_pc)
-#define WITH_PROFILE_CORE_P (WITH_PROFILE & PROFILE_core)
-
-/* If MAX_TARGET_MODES isn't defined, we can't do memory profiling.
- ??? It is intended that this is a temporary occurence. Normally
- MAX_TARGET_MODES is defined. */
-#ifndef MAX_TARGET_MODES
-#undef WITH_PROFILE_MEMORY_P
-#define WITH_PROFILE_MEMORY_P 0
-#endif
-
-/* Only build MODEL code when the target simulator has support for it */
-#ifndef SIM_HAVE_MODEL
-#undef WITH_PROFILE_MODEL_P
-#define WITH_PROFILE_MODEL_P 0
-#endif
-
-/* Profiling install handler. */
-MODULE_INSTALL_FN profile_install;
-
-/* Output format macros. */
-#ifndef PROFILE_HISTOGRAM_WIDTH
-#define PROFILE_HISTOGRAM_WIDTH 40
-#endif
-#ifndef PROFILE_LABEL_WIDTH
-#define PROFILE_LABEL_WIDTH 32
-#endif
-
-/* Callbacks for internal profile_info.
- The callbacks may be NULL meaning there isn't one.
- Note that results are indented two spaces to distinguish them from
- section titles.
- If non-NULL, PROFILE_CALLBACK is called to print extra non-cpu related data.
- If non-NULL, PROFILE_CPU_CALLBACK is called to print extra cpu related data.
- */
-
-typedef void (PROFILE_INFO_CALLBACK_FN) (SIM_DESC, int);
-struct _sim_cpu; /* forward reference */
-typedef void (PROFILE_INFO_CPU_CALLBACK_FN) (struct _sim_cpu *cpu, int verbose);
-
-
-/* Struct containing most profiling data.
- It doesn't contain all profiling data because for example scache data
- is kept with the rest of scache support. */
-
-typedef struct {
- /* Global summary of all the current profiling options. */
- char profile_any_p;
-
- /* Boolean array of specified profiling flags. */
- char profile_flags[MAX_PROFILE_VALUES];
-#define PROFILE_FLAGS(p) ((p)->profile_flags)
-
- /* The total insn count is tracked separately.
- It is always computed, regardless of insn profiling. */
- unsigned long total_insn_count;
-#define PROFILE_TOTAL_INSN_COUNT(p) ((p)->total_insn_count)
-
- /* CPU frequency. Always accepted, regardless of profiling options. */
- unsigned long cpu_freq;
-#define PROFILE_CPU_FREQ(p) ((p)->cpu_freq)
-
-#if WITH_PROFILE_INSN_P
- unsigned int *insn_count;
-#define PROFILE_INSN_COUNT(p) ((p)->insn_count)
-#endif
-
-#if WITH_PROFILE_MEMORY_P
- unsigned int read_count[MAX_TARGET_MODES];
-#define PROFILE_READ_COUNT(p) ((p)->read_count)
- unsigned int write_count[MAX_TARGET_MODES];
-#define PROFILE_WRITE_COUNT(p) ((p)->write_count)
-#endif
-
-#if WITH_PROFILE_CORE_P
- /* Count read/write/exec accesses separatly. */
- unsigned int core_count[nr_maps];
-#define PROFILE_CORE_COUNT(p) ((p)->core_count)
-#endif
-
-#if WITH_PROFILE_MODEL_P
- /* ??? Quick hack until more elaborate scheme is finished. */
- /* Total cycle count, including stalls. */
- unsigned long total_cycles;
-#define PROFILE_MODEL_TOTAL_CYCLES(p) ((p)->total_cycles)
- /* Stalls due to branches. */
- unsigned long cti_stall_cycles;
-#define PROFILE_MODEL_CTI_STALL_CYCLES(p) ((p)->cti_stall_cycles)
- unsigned long load_stall_cycles;
-#define PROFILE_MODEL_LOAD_STALL_CYCLES(p) ((p)->load_stall_cycles)
- /* Number of cycles the current instruction took. */
- unsigned long cur_insn_cycles;
-#define PROFILE_MODEL_CUR_INSN_CYCLES(p) ((p)->cur_insn_cycles)
-
- /* Taken and not-taken branches (and other cti's). */
- unsigned long taken_count, untaken_count;
-#define PROFILE_MODEL_TAKEN_COUNT(p) ((p)->taken_count)
-#define PROFILE_MODEL_UNTAKEN_COUNT(p) ((p)->untaken_count)
-#endif
-
-#if WITH_PROFILE_PC_P
- /* PC profiling attempts to determine function usage by sampling the PC
- every so many instructions. */
- unsigned int profile_pc_freq;
-#define PROFILE_PC_FREQ(p) ((p)->profile_pc_freq)
- unsigned int profile_pc_nr_buckets;
-#define PROFILE_PC_NR_BUCKETS(p) ((p)->profile_pc_nr_buckets)
- address_word profile_pc_start;
-#define PROFILE_PC_START(p) ((p)->profile_pc_start)
- address_word profile_pc_end;
-#define PROFILE_PC_END(p) ((p)->profile_pc_end)
- unsigned profile_pc_shift;
-#define PROFILE_PC_SHIFT(p) ((p)->profile_pc_shift)
-#define PROFILE_PC_BUCKET_SIZE(p) (PROFILE_PC_SHIFT (p) ? (1 << PROFILE_PC_SHIFT (p)) : 0)
- unsigned *profile_pc_count;
-#define PROFILE_PC_COUNT(p) ((p)->profile_pc_count)
- sim_event *profile_pc_event;
-#define PROFILE_PC_EVENT(p) ((p)->profile_pc_event)
-#endif
-
- /* Profile output goes to this or stderr if NULL.
- We can't store `stderr' here as stderr goes through a callback. */
- FILE *profile_file;
-#define PROFILE_FILE(p) ((p)->profile_file)
-
- /* When reporting a profile summary, hook to include per-processor
- target specific profile information */
- PROFILE_INFO_CPU_CALLBACK_FN *info_cpu_callback;
-#define PROFILE_INFO_CPU_CALLBACK(p) ((p)->info_cpu_callback)
-
- /* When reporting a profile summary, hook to include common target
- specific profile information */
- PROFILE_INFO_CALLBACK_FN *info_callback;
-#define STATE_PROFILE_INFO_CALLBACK(sd) \
-(CPU_PROFILE_DATA (STATE_CPU (sd, 0))->info_callback)
-
- /* Profile range.
- ??? Not all cpu's support this. */
- ADDR_RANGE range;
-#define PROFILE_RANGE(p) (& (p)->range)
-} PROFILE_DATA;
-
-/* Predicates. */
-
-#define CPU_PROFILE_FLAGS(cpu) PROFILE_FLAGS (CPU_PROFILE_DATA (cpu))
-
-/* Return non-zero if tracing of IDX is enabled for CPU. */
-#define PROFILE_P(cpu,idx) \
-((WITH_PROFILE & (1 << (idx))) != 0 \
- && CPU_PROFILE_FLAGS (cpu)[idx] != 0)
-
-/* Non-zero if --profile-<xxxx> was specified for CPU. */
-#define PROFILE_ANY_P(cpu) ((WITH_PROFILE) && (CPU_PROFILE_DATA (cpu)->profile_any_p))
-#define PROFILE_INSN_P(cpu) PROFILE_P (cpu, PROFILE_INSN_IDX)
-#define PROFILE_MEMORY_P(cpu) PROFILE_P (cpu, PROFILE_MEMORY_IDX)
-#define PROFILE_MODEL_P(cpu) PROFILE_P (cpu, PROFILE_MODEL_IDX)
-#define PROFILE_SCACHE_P(cpu) PROFILE_P (cpu, PROFILE_SCACHE_IDX)
-#define PROFILE_PC_P(cpu) PROFILE_P (cpu, PROFILE_PC_IDX)
-#define PROFILE_CORE_P(cpu) PROFILE_P (cpu, PROFILE_CORE_IDX)
-
-/* Usage macros. */
-
-#if WITH_PROFILE_INSN_P
-#define PROFILE_COUNT_INSN(cpu, pc, insn_num) \
-do { \
- if (PROFILE_INSN_P (cpu)) \
- ++ PROFILE_INSN_COUNT (CPU_PROFILE_DATA (cpu)) [insn_num]; \
-} while (0)
-#else
-#define PROFILE_COUNT_INSN(cpu, pc, insn_num)
-#endif /* ! insn */
-
-#if WITH_PROFILE_MEMORY_P
-#define PROFILE_COUNT_READ(cpu, addr, mode_num) \
-do { \
- if (PROFILE_MEMORY_P (cpu)) \
- ++ PROFILE_READ_COUNT (CPU_PROFILE_DATA (cpu)) [mode_num]; \
-} while (0)
-#define PROFILE_COUNT_WRITE(cpu, addr, mode_num) \
-do { \
- if (PROFILE_MEMORY_P (cpu)) \
- ++ PROFILE_WRITE_COUNT (CPU_PROFILE_DATA (cpu)) [mode_num]; \
-} while (0)
-#else
-#define PROFILE_COUNT_READ(cpu, addr, mode_num)
-#define PROFILE_COUNT_WRITE(cpu, addr, mode_num)
-#endif /* ! memory */
-
-#if WITH_PROFILE_CORE_P
-#define PROFILE_COUNT_CORE(cpu, addr, size, map) \
-do { \
- if (PROFILE_CORE_P (cpu)) \
- PROFILE_CORE_COUNT (CPU_PROFILE_DATA (cpu)) [map] += 1; \
-} while (0)
-#else
-#define PROFILE_COUNT_CORE(cpu, addr, size, map)
-#endif /* ! core */
-
-/* Misc. utilities. */
-
-extern void sim_profile_print_bar (SIM_DESC, unsigned int, unsigned int, unsigned int);
-
-#endif /* SIM_PROFILE_H */
diff --git a/sim/common/sim-reason.c b/sim/common/sim-reason.c
deleted file mode 100644
index b540df32f6e..00000000000
--- a/sim/common/sim-reason.c
+++ /dev/null
@@ -1,57 +0,0 @@
-/* Generic simulator stop_reason.
- Copyright (C) 1997 Free Software Foundation, Inc.
- Contributed by Cygnus Support.
-
-This file is part of GDB, the GNU debugger.
-
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License along
-with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
-
-#include "sim-main.h"
-#include "sim-assert.h"
-
-/* Generic implementation of sim_stop_reason */
-
-void
-sim_stop_reason (SIM_DESC sd, enum sim_stop *reason, int *sigrc)
-{
- sim_engine *engine = NULL;
- SIM_ASSERT (STATE_MAGIC (sd) == SIM_MAGIC_NUMBER);
- engine = STATE_ENGINE (sd);
- *reason = engine->reason;
- switch (*reason)
- {
- case sim_exited :
- *sigrc = engine->sigrc;
- break;
- case sim_signalled :
- /* ??? See the comment below case `sim_signalled' in
- gdb/remote-sim.c:gdbsim_wait.
- ??? Consider the case of the target requesting that it
- kill(2) itself with SIGNAL. That SIGNAL, being target
- specific, will not correspond to either of the SIM_SIGNAL
- enum nor the HOST_SIGNAL. A mapping from TARGET_SIGNAL to
- HOST_SIGNAL is needed. */
- *sigrc = sim_signal_to_host (sd, engine->sigrc);
- break;
- case sim_stopped :
- /* The gdb/simulator interface calls for us to return the host
- version of the signal which gdb then converts into the
- target's version. This is obviously a bit clumsy. */
- *sigrc = sim_signal_to_host (sd, engine->sigrc);
- break;
- default :
- abort ();
- }
-}
diff --git a/sim/common/sim-reg.c b/sim/common/sim-reg.c
deleted file mode 100644
index 3f3dc41cd47..00000000000
--- a/sim/common/sim-reg.c
+++ /dev/null
@@ -1,52 +0,0 @@
-/* Generic register read/write.
- Copyright (C) 1998 Free Software Foundation, Inc.
- Contributed by Cygnus Solutions.
-
-This file is part of GDB, the GNU debugger.
-
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License along
-with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
-
-#include "sim-main.h"
-#include "sim-assert.h"
-
-/* Generic implementation of sim_fetch_register for simulators using
- CPU_REG_FETCH.
- The contents of BUF are in target byte order. */
-/* ??? Obviously the interface needs to be extended to handle multiple
- cpus. */
-
-int
-sim_fetch_register (SIM_DESC sd, int rn, unsigned char *buf, int length)
-{
- SIM_CPU *cpu = STATE_CPU (sd, 0);
-
- SIM_ASSERT (STATE_MAGIC (sd) == SIM_MAGIC_NUMBER);
- return (* CPU_REG_FETCH (cpu)) (cpu, rn, buf, length);
-}
-
-/* Generic implementation of sim_fetch_register for simulators using
- CPU_REG_FETCH.
- The contents of BUF are in target byte order. */
-/* ??? Obviously the interface needs to be extended to handle multiple
- cpus. */
-
-int
-sim_store_register (SIM_DESC sd, int rn, unsigned char *buf, int length)
-{
- SIM_CPU *cpu = STATE_CPU (sd, 0);
-
- SIM_ASSERT (STATE_MAGIC (sd) == SIM_MAGIC_NUMBER);
- return (* CPU_REG_STORE (cpu)) (cpu, rn, buf, length);
-}
diff --git a/sim/common/sim-resume.c b/sim/common/sim-resume.c
deleted file mode 100644
index 8cf75d5d80f..00000000000
--- a/sim/common/sim-resume.c
+++ /dev/null
@@ -1,90 +0,0 @@
-/* Generic simulator resume.
- Copyright (C) 1997 Free Software Foundation, Inc.
- Contributed by Cygnus Support.
-
-This file is part of GDB, the GNU debugger.
-
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License along
-with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
-
-#include "sim-main.h"
-#include "sim-assert.h"
-
-/* Halt the simulator after just one instruction */
-
-static void
-has_stepped (SIM_DESC sd,
- void *data)
-{
- ASSERT (STATE_MAGIC (sd) == SIM_MAGIC_NUMBER);
- sim_engine_halt (sd, NULL, NULL, NULL_CIA, sim_stopped, SIM_SIGTRAP);
-}
-
-
-/* Generic resume - assumes the existance of sim_engine_run */
-
-void
-sim_resume (SIM_DESC sd,
- int step,
- int siggnal)
-{
- sim_engine *engine = STATE_ENGINE (sd);
- jmp_buf buf;
- int jmpval;
-
- ASSERT (STATE_MAGIC (sd) == SIM_MAGIC_NUMBER);
-
- /* we only want to be single stepping the simulator once */
- if (engine->stepper != NULL)
- {
- sim_events_deschedule (sd, engine->stepper);
- engine->stepper = NULL;
- }
- if (step)
- engine->stepper = sim_events_schedule (sd, 1, has_stepped, sd);
-
- sim_module_resume (sd);
-
- /* run/resume the simulator */
- engine->jmpbuf = &buf;
- jmpval = setjmp (buf);
- if (jmpval == sim_engine_start_jmpval
- || jmpval == sim_engine_restart_jmpval)
- {
- int last_cpu_nr = sim_engine_last_cpu_nr (sd);
- int next_cpu_nr = sim_engine_next_cpu_nr (sd);
- int nr_cpus = sim_engine_nr_cpus (sd);
-
- sim_events_preprocess (sd, last_cpu_nr >= nr_cpus, next_cpu_nr >= nr_cpus);
- if (next_cpu_nr >= nr_cpus)
- next_cpu_nr = 0;
-
- /* Only deliver the siggnal ]sic] the first time through - don't
- re-deliver any siggnal during a restart. */
- if (jmpval == sim_engine_restart_jmpval)
- siggnal = 0;
-
-#ifdef SIM_CPU_EXCEPTION_RESUME
- {
- sim_cpu* cpu = STATE_CPU (sd, next_cpu_nr);
- SIM_CPU_EXCEPTION_RESUME(sd, cpu, siggnal);
- }
-#endif
-
- sim_engine_run (sd, next_cpu_nr, nr_cpus, siggnal);
- }
- engine->jmpbuf = NULL;
-
- sim_module_suspend (sd);
-}
diff --git a/sim/common/sim-run.c b/sim/common/sim-run.c
deleted file mode 100644
index 55f72909d82..00000000000
--- a/sim/common/sim-run.c
+++ /dev/null
@@ -1,51 +0,0 @@
-/* Generic simulator run.
- Copyright (C) 1997 Free Software Foundation, Inc.
- Contributed by Cygnus Support.
-
-This file is part of GDB, the GNU debugger.
-
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License along
-with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
-
-#include "sim-main.h"
-#include "sim-assert.h"
-
-/* Generic implementation of sim_engine_run that works within the
- sim_engine setjmp/longjmp framework. */
-
-#define IMEM XCONCAT
-
-void
-sim_engine_run (SIM_DESC sd,
- int next_cpu_nr, /* ignore */
- int nr_cpus, /* ignore */
- int siggnal) /* ignore */
-{
- sim_cia cia;
- sim_cpu *cpu;
- SIM_ASSERT (STATE_MAGIC (sd) == SIM_MAGIC_NUMBER);
- cpu = STATE_CPU (sd, 0);
- cia = CIA_GET (cpu);
- while (1)
- {
- instruction_word insn = IMEM32 (cia);
- cia = idecode_issue (sd, insn, cia);
- /* process any events */
- if (sim_events_tick (sd))
- {
- CIA_SET (cpu, cia);
- sim_events_process (sd);
- }
- }
-}
diff --git a/sim/common/sim-signal.c b/sim/common/sim-signal.c
deleted file mode 100644
index 77709b17e7a..00000000000
--- a/sim/common/sim-signal.c
+++ /dev/null
@@ -1,96 +0,0 @@
-/* Simulator signal support
- Copyright (C) 1997 Free Software Foundation, Inc.
- Contributed by Cygnus Support
-
-This file is part of the GNU Simulators.
-
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License along
-with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
-
-#include <signal.h>
-#include "sim-main.h"
-
-/* Convert SIM_SIGFOO to SIGFOO.
- What to do when the host doesn't have SIGFOO is handled on a case by case
- basis. Generally, in the case of passing a value back to gdb, we want gdb
- to not think the process has died (so it can be debugged at the point of
- failure). */
-
-#ifdef _MSC_VER
-#ifndef SIGTRAP
-#define SIGTRAP 5
-#endif
-#ifndef SIGBUS
-#define SIGBUS 10
-#endif
-#ifndef SIGQUIT
-#define SIGQUIT 3
-#endif
-#endif
-
-int
-sim_signal_to_host (SIM_DESC sd, SIM_SIGNAL sig)
-{
- switch (sig)
- {
- case SIM_SIGINT :
- return SIGINT;
-
- case SIM_SIGABRT :
- return SIGABRT;
-
- case SIM_SIGILL :
-#ifdef SIGILL
- return SIGILL;
-#else
- return SIGSEGV;
-#endif
-
- case SIM_SIGTRAP :
- return SIGTRAP;
-
- case SIM_SIGBUS :
-#ifdef SIGBUS
- return SIGBUS;
-#else
- return SIGSEGV;
-#endif
-
- case SIM_SIGSEGV :
- return SIGSEGV;
-
- case SIM_SIGXCPU :
-#ifdef SIGXCPU
- return SIGXCPU;
-#endif
- break;
-
- case SIM_SIGFPE:
-#ifdef SIGXCPU
- return SIGFPE;
-#endif
- break;
-
- case SIM_SIGNONE:
- return 0;
- break;
- }
-
- sim_io_eprintf (sd, "sim_signal_to_host: unknown signal: %d\n", sig);
-#ifdef SIGHUP
- return SIGHUP; /* FIXME: Suggestions? */
-#else
- return 1;
-#endif
-}
diff --git a/sim/common/sim-signal.h b/sim/common/sim-signal.h
deleted file mode 100644
index 272e17dad05..00000000000
--- a/sim/common/sim-signal.h
+++ /dev/null
@@ -1,49 +0,0 @@
-/* Simulator signal support
- Copyright (C) 1997 Free Software Foundation, Inc.
- Contributed by Cygnus Support
-
-This file is part of the GNU Simulators.
-
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License along
-with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
-
-#ifndef SIM_SIGNAL_H
-#define SIM_SIGNAL_H
-
-/* Signals we use.
- This provides a layer between our values and host/target values. */
-
-typedef enum {
- SIM_SIGNONE = 64,
- /* illegal insn */
- SIM_SIGILL,
- /* breakpoint */
- SIM_SIGTRAP,
- /* misaligned memory access */
- SIM_SIGBUS,
- /* tried to read/write memory that's not readable/writable */
- SIM_SIGSEGV,
- /* cpu limit exceeded */
- SIM_SIGXCPU,
- /* simulation interrupted (sim_stop called) */
- SIM_SIGINT,
- /* Floating point or integer divide */
- SIM_SIGFPE,
- /* simulation aborted */
- SIM_SIGABRT
-} SIM_SIGNAL;
-
-int sim_signal_to_host (SIM_DESC sd, SIM_SIGNAL);
-
-#endif /* SIM_SIGNAL_H */
diff --git a/sim/common/sim-stop.c b/sim/common/sim-stop.c
deleted file mode 100644
index cde93151ed8..00000000000
--- a/sim/common/sim-stop.c
+++ /dev/null
@@ -1,43 +0,0 @@
-/* Generic simulator stop.
- Copyright (C) 1997 Free Software Foundation, Inc.
- Contributed by Cygnus Support.
-
-This file is part of GDB, the GNU debugger.
-
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License along
-with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
-
-#include "sim-main.h"
-#include "sim-assert.h"
-
-/* Generic implementation of sim_stop. */
-
-static void
-control_c_simulation (SIM_DESC sd,
- void *data)
-{
- ASSERT (STATE_MAGIC (sd) == SIM_MAGIC_NUMBER);
- sim_engine_halt (sd, NULL, NULL, NULL_CIA, sim_stopped, SIM_SIGINT);
-}
-
-int
-sim_stop (SIM_DESC sd)
-{
- ASSERT (STATE_MAGIC (sd) == SIM_MAGIC_NUMBER);
- sim_events_schedule_after_signal(sd,
- 0 /*NOW*/,
- control_c_simulation,
- sd /*data*/);
- return 1;
-}
diff --git a/sim/common/sim-trace.c b/sim/common/sim-trace.c
deleted file mode 100644
index bbdff623486..00000000000
--- a/sim/common/sim-trace.c
+++ /dev/null
@@ -1,1354 +0,0 @@
-/* Simulator tracing/debugging support.
- Copyright (C) 1997, 1998, 2001 Free Software Foundation, Inc.
- Contributed by Cygnus Support.
-
-This file is part of GDB, the GNU debugger.
-
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License along
-with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
-
-#include "sim-main.h"
-#include "sim-io.h"
-#include "sim-options.h"
-#include "sim-fpu.h"
-
-#include "bfd.h"
-#include "libiberty.h"
-
-#include "sim-assert.h"
-
-#ifdef HAVE_STRING_H
-#include <string.h>
-#else
-#ifdef HAVE_STRINGS_H
-#include <strings.h>
-#endif
-#endif
-#ifdef HAVE_STDLIB_H
-#include <stdlib.h>
-#endif
-
-#ifndef SIZE_PHASE
-#define SIZE_PHASE 8
-#endif
-
-#ifndef SIZE_LOCATION
-#define SIZE_LOCATION 20
-#endif
-
-#ifndef SIZE_PC
-#define SIZE_PC 6
-#endif
-
-#ifndef SIZE_LINE_NUMBER
-#define SIZE_LINE_NUMBER 4
-#endif
-
-static MODULE_INIT_FN trace_init;
-static MODULE_UNINSTALL_FN trace_uninstall;
-
-static DECLARE_OPTION_HANDLER (trace_option_handler);
-
-enum {
- OPTION_TRACE_INSN = OPTION_START,
- OPTION_TRACE_DECODE,
- OPTION_TRACE_EXTRACT,
- OPTION_TRACE_LINENUM,
- OPTION_TRACE_MEMORY,
- OPTION_TRACE_MODEL,
- OPTION_TRACE_ALU,
- OPTION_TRACE_CORE,
- OPTION_TRACE_EVENTS,
- OPTION_TRACE_FPU,
- OPTION_TRACE_BRANCH,
- OPTION_TRACE_SEMANTICS,
- OPTION_TRACE_RANGE,
- OPTION_TRACE_FUNCTION,
- OPTION_TRACE_DEBUG,
- OPTION_TRACE_FILE,
- OPTION_TRACE_VPU
-};
-
-static const OPTION trace_options[] =
-{
- /* This table is organized to group related instructions together. */
- { {"trace", optional_argument, NULL, 't'},
- 't', "on|off", "Trace useful things",
- trace_option_handler },
- { {"trace-insn", optional_argument, NULL, OPTION_TRACE_INSN},
- '\0', "on|off", "Perform instruction tracing",
- trace_option_handler },
- { {"trace-decode", optional_argument, NULL, OPTION_TRACE_DECODE},
- '\0', "on|off", "Trace instruction decoding",
- trace_option_handler },
- { {"trace-extract", optional_argument, NULL, OPTION_TRACE_EXTRACT},
- '\0', "on|off", "Trace instruction extraction",
- trace_option_handler },
- { {"trace-linenum", optional_argument, NULL, OPTION_TRACE_LINENUM},
- '\0', "on|off", "Perform line number tracing (implies --trace-insn)",
- trace_option_handler },
- { {"trace-memory", optional_argument, NULL, OPTION_TRACE_MEMORY},
- '\0', "on|off", "Trace memory operations",
- trace_option_handler },
- { {"trace-alu", optional_argument, NULL, OPTION_TRACE_ALU},
- '\0', "on|off", "Trace ALU operations",
- trace_option_handler },
- { {"trace-fpu", optional_argument, NULL, OPTION_TRACE_FPU},
- '\0', "on|off", "Trace FPU operations",
- trace_option_handler },
- { {"trace-vpu", optional_argument, NULL, OPTION_TRACE_VPU},
- '\0', "on|off", "Trace VPU operations",
- trace_option_handler },
- { {"trace-branch", optional_argument, NULL, OPTION_TRACE_BRANCH},
- '\0', "on|off", "Trace branching",
- trace_option_handler },
- { {"trace-semantics", optional_argument, NULL, OPTION_TRACE_SEMANTICS},
- '\0', "on|off", "Perform ALU, FPU, MEMORY, and BRANCH tracing",
- trace_option_handler },
- { {"trace-model", optional_argument, NULL, OPTION_TRACE_MODEL},
- '\0', "on|off", "Include model performance data",
- trace_option_handler },
- { {"trace-core", optional_argument, NULL, OPTION_TRACE_CORE},
- '\0', "on|off", "Trace core operations",
- trace_option_handler },
- { {"trace-events", optional_argument, NULL, OPTION_TRACE_EVENTS},
- '\0', "on|off", "Trace events",
- trace_option_handler },
-#ifdef SIM_HAVE_ADDR_RANGE
- { {"trace-range", required_argument, NULL, OPTION_TRACE_RANGE},
- '\0', "START,END", "Specify range of addresses for instruction tracing",
- trace_option_handler },
-#if 0 /*wip*/
- { {"trace-function", required_argument, NULL, OPTION_TRACE_FUNCTION},
- '\0', "FUNCTION", "Specify function to trace",
- trace_option_handler },
-#endif
-#endif
- { {"trace-debug", optional_argument, NULL, OPTION_TRACE_DEBUG},
- '\0', "on|off", "Add information useful for debugging the simulator to the tracing output",
- trace_option_handler },
- { {"trace-file", required_argument, NULL, OPTION_TRACE_FILE},
- '\0', "FILE NAME", "Specify tracing output file",
- trace_option_handler },
- { {NULL, no_argument, NULL, 0}, '\0', NULL, NULL, NULL }
-};
-
-/* Set/reset the trace options indicated in MASK. */
-
-static SIM_RC
-set_trace_option_mask (sd, name, mask, arg)
- SIM_DESC sd;
- const char *name;
- int mask;
- const char *arg;
-{
- int trace_nr;
- int cpu_nr;
- int trace_val = 1;
-
- if (arg != NULL)
- {
- if (strcmp (arg, "yes") == 0
- || strcmp (arg, "on") == 0
- || strcmp (arg, "1") == 0)
- trace_val = 1;
- else if (strcmp (arg, "no") == 0
- || strcmp (arg, "off") == 0
- || strcmp (arg, "0") == 0)
- trace_val = 0;
- else
- {
- sim_io_eprintf (sd, "Argument `%s' for `--trace%s' invalid, one of `on', `off', `yes', `no' expected\n", arg, name);
- return SIM_RC_FAIL;
- }
- }
-
- /* update applicable trace bits */
- for (trace_nr = 0; trace_nr < MAX_TRACE_VALUES; ++trace_nr)
- {
- if ((mask & (1 << trace_nr)) == 0)
- continue;
-
- /* Set non-cpu specific values. */
- switch (trace_nr)
- {
- case TRACE_EVENTS_IDX:
- STATE_EVENTS (sd)->trace = trace_val;
- break;
- case TRACE_DEBUG_IDX:
- STATE_TRACE_FLAGS (sd)[trace_nr] = trace_val;
- break;
- }
-
- /* Set cpu values. */
- for (cpu_nr = 0; cpu_nr < MAX_NR_PROCESSORS; cpu_nr++)
- {
- CPU_TRACE_FLAGS (STATE_CPU (sd, cpu_nr))[trace_nr] = trace_val;
- }
- }
-
- /* Re-compute the cpu trace summary. */
- if (trace_val)
- {
- for (cpu_nr = 0; cpu_nr < MAX_NR_PROCESSORS; cpu_nr++)
- CPU_TRACE_DATA (STATE_CPU (sd, cpu_nr))->trace_any_p = 1;
- }
- else
- {
- for (cpu_nr = 0; cpu_nr < MAX_NR_PROCESSORS; cpu_nr++)
- {
- CPU_TRACE_DATA (STATE_CPU (sd, cpu_nr))->trace_any_p = 0;
- for (trace_nr = 0; trace_nr < MAX_TRACE_VALUES; ++trace_nr)
- {
- if (CPU_TRACE_FLAGS (STATE_CPU (sd, cpu_nr))[trace_nr])
- {
- CPU_TRACE_DATA (STATE_CPU (sd, cpu_nr))->trace_any_p = 1;
- break;
- }
- }
- }
- }
-
- return SIM_RC_OK;
-}
-
-/* Set one trace option based on its IDX value. */
-
-static SIM_RC
-set_trace_option (sd, name, idx, arg)
- SIM_DESC sd;
- const char *name;
- int idx;
- const char *arg;
-{
- return set_trace_option_mask (sd, name, 1 << idx, arg);
-}
-
-
-static SIM_RC
-trace_option_handler (SIM_DESC sd, sim_cpu *cpu, int opt,
- char *arg, int is_command)
-{
- int n;
- int cpu_nr;
-
- switch (opt)
- {
- case 't' :
- if (! WITH_TRACE)
- sim_io_eprintf (sd, "Tracing not compiled in, `-t' ignored\n");
- else
- return set_trace_option_mask (sd, "trace", TRACE_USEFUL_MASK, arg);
- break;
-
- case OPTION_TRACE_INSN :
- if (WITH_TRACE_INSN_P)
- return set_trace_option (sd, "-insn", TRACE_INSN_IDX, arg);
- else
- sim_io_eprintf (sd, "Instruction tracing not compiled in, `--trace-insn' ignored\n");
- break;
-
- case OPTION_TRACE_DECODE :
- if (WITH_TRACE_DECODE_P)
- return set_trace_option (sd, "-decode", TRACE_DECODE_IDX, arg);
- else
- sim_io_eprintf (sd, "Decode tracing not compiled in, `--trace-decode' ignored\n");
- break;
-
- case OPTION_TRACE_EXTRACT :
- if (WITH_TRACE_EXTRACT_P)
- return set_trace_option (sd, "-extract", TRACE_EXTRACT_IDX, arg);
- else
- sim_io_eprintf (sd, "Extract tracing not compiled in, `--trace-extract' ignored\n");
- break;
-
- case OPTION_TRACE_LINENUM :
- if (WITH_TRACE_LINENUM_P && WITH_TRACE_INSN_P)
- {
- if (set_trace_option (sd, "-linenum", TRACE_LINENUM_IDX, arg) != SIM_RC_OK
- || set_trace_option (sd, "-linenum", TRACE_INSN_IDX, arg) != SIM_RC_OK)
- return SIM_RC_FAIL;
- }
- else
- sim_io_eprintf (sd, "Line number or instruction tracing not compiled in, `--trace-linenum' ignored\n");
- break;
-
- case OPTION_TRACE_MEMORY :
- if (WITH_TRACE_MEMORY_P)
- return set_trace_option (sd, "-memory", TRACE_MEMORY_IDX, arg);
- else
- sim_io_eprintf (sd, "Memory tracing not compiled in, `--trace-memory' ignored\n");
- break;
-
- case OPTION_TRACE_MODEL :
- if (WITH_TRACE_MODEL_P)
- return set_trace_option (sd, "-model", TRACE_MODEL_IDX, arg);
- else
- sim_io_eprintf (sd, "Model tracing not compiled in, `--trace-model' ignored\n");
- break;
-
- case OPTION_TRACE_ALU :
- if (WITH_TRACE_ALU_P)
- return set_trace_option (sd, "-alu", TRACE_ALU_IDX, arg);
- else
- sim_io_eprintf (sd, "ALU tracing not compiled in, `--trace-alu' ignored\n");
- break;
-
- case OPTION_TRACE_CORE :
- if (WITH_TRACE_CORE_P)
- return set_trace_option (sd, "-core", TRACE_CORE_IDX, arg);
- else
- sim_io_eprintf (sd, "CORE tracing not compiled in, `--trace-core' ignored\n");
- break;
-
- case OPTION_TRACE_EVENTS :
- if (WITH_TRACE_EVENTS_P)
- return set_trace_option (sd, "-events", TRACE_EVENTS_IDX, arg);
- else
- sim_io_eprintf (sd, "EVENTS tracing not compiled in, `--trace-events' ignored\n");
- break;
-
- case OPTION_TRACE_FPU :
- if (WITH_TRACE_FPU_P)
- return set_trace_option (sd, "-fpu", TRACE_FPU_IDX, arg);
- else
- sim_io_eprintf (sd, "FPU tracing not compiled in, `--trace-fpu' ignored\n");
- break;
-
- case OPTION_TRACE_VPU :
- if (WITH_TRACE_VPU_P)
- return set_trace_option (sd, "-vpu", TRACE_VPU_IDX, arg);
- else
- sim_io_eprintf (sd, "VPU tracing not compiled in, `--trace-vpu' ignored\n");
- break;
-
- case OPTION_TRACE_BRANCH :
- if (WITH_TRACE_BRANCH_P)
- return set_trace_option (sd, "-branch", TRACE_BRANCH_IDX, arg);
- else
- sim_io_eprintf (sd, "Branch tracing not compiled in, `--trace-branch' ignored\n");
- break;
-
- case OPTION_TRACE_SEMANTICS :
- if (WITH_TRACE_ALU_P
- && WITH_TRACE_FPU_P
- && WITH_TRACE_MEMORY_P
- && WITH_TRACE_BRANCH_P)
- {
- if (set_trace_option (sd, "-semantics", TRACE_ALU_IDX, arg) != SIM_RC_OK
- || set_trace_option (sd, "-semantics", TRACE_FPU_IDX, arg) != SIM_RC_OK
- || set_trace_option (sd, "-semantics", TRACE_VPU_IDX, arg) != SIM_RC_OK
- || set_trace_option (sd, "-semantics", TRACE_MEMORY_IDX, arg) != SIM_RC_OK
- || set_trace_option (sd, "-semantics", TRACE_BRANCH_IDX, arg) != SIM_RC_OK)
- return SIM_RC_FAIL;
- }
- else
- sim_io_eprintf (sd, "Alu, fpu, memory, and/or branch tracing not compiled in, `--trace-semantics' ignored\n");
- break;
-
-#ifdef SIM_HAVE_ADDR_RANGE
- case OPTION_TRACE_RANGE :
- if (WITH_TRACE)
- {
- char *chp = arg;
- unsigned long start,end;
- start = strtoul (chp, &chp, 0);
- if (*chp != ',')
- {
- sim_io_eprintf (sd, "--trace-range missing END argument\n");
- return SIM_RC_FAIL;
- }
- end = strtoul (chp + 1, NULL, 0);
- /* FIXME: Argument validation. */
- if (cpu != NULL)
- sim_addr_range_add (TRACE_RANGE (CPU_PROFILE_DATA (cpu)),
- start, end);
- else
- for (cpu_nr = 0; cpu_nr < MAX_NR_PROCESSORS; ++cpu_nr)
- sim_addr_range_add (TRACE_RANGE (CPU_TRACE_DATA (STATE_CPU (sd, cpu_nr))),
- start, end);
- }
- else
- sim_io_eprintf (sd, "Tracing not compiled in, `--trace-range' ignored\n");
- break;
-
- case OPTION_TRACE_FUNCTION :
- if (WITH_TRACE)
- {
- /*wip: need to compute function range given name*/
- }
- else
- sim_io_eprintf (sd, "Tracing not compiled in, `--trace-function' ignored\n");
- break;
-#endif /* SIM_HAVE_ADDR_RANGE */
-
- case OPTION_TRACE_DEBUG :
- if (WITH_TRACE_DEBUG_P)
- return set_trace_option (sd, "-debug", TRACE_DEBUG_IDX, arg);
- else
- sim_io_eprintf (sd, "Tracing debug support not compiled in, `--trace-debug' ignored\n");
- break;
-
- case OPTION_TRACE_FILE :
- if (! WITH_TRACE)
- sim_io_eprintf (sd, "Tracing not compiled in, `--trace-file' ignored\n");
- else
- {
- FILE *f = fopen (arg, "w");
-
- if (f == NULL)
- {
- sim_io_eprintf (sd, "Unable to open trace output file `%s'\n", arg);
- return SIM_RC_FAIL;
- }
- for (n = 0; n < MAX_NR_PROCESSORS; ++n)
- TRACE_FILE (CPU_TRACE_DATA (STATE_CPU (sd, n))) = f;
- TRACE_FILE (STATE_TRACE_DATA (sd)) = f;
- }
- break;
- }
-
- return SIM_RC_OK;
-}
-
-/* Install tracing support. */
-
-SIM_RC
-trace_install (SIM_DESC sd)
-{
- int i;
-
- SIM_ASSERT (STATE_MAGIC (sd) == SIM_MAGIC_NUMBER);
-
- sim_add_option_table (sd, NULL, trace_options);
- memset (STATE_TRACE_DATA (sd), 0, sizeof (* STATE_TRACE_DATA (sd)));
- for (i = 0; i < MAX_NR_PROCESSORS; ++i)
- memset (CPU_TRACE_DATA (STATE_CPU (sd, i)), 0,
- sizeof (* CPU_TRACE_DATA (STATE_CPU (sd, i))));
- sim_module_add_init_fn (sd, trace_init);
- sim_module_add_uninstall_fn (sd, trace_uninstall);
- return SIM_RC_OK;
-}
-
-static SIM_RC
-trace_init (SIM_DESC sd)
-{
-#ifdef SIM_HAVE_ADDR_RANGE
- /* Check if a range has been specified without specifying what to
- collect. */
- {
- int i;
-
- for (i = 0; i < MAX_NR_PROCESSORS; ++i)
- {
- sim_cpu *cpu = STATE_CPU (sd, i);
-
- if (ADDR_RANGE_RANGES (TRACE_RANGE (CPU_TRACE_DATA (cpu)))
- && ! TRACE_INSN_P (cpu))
- {
- sim_io_eprintf_cpu (cpu, "Tracing address range specified without --trace-insn.\n");
- sim_io_eprintf_cpu (cpu, "Address range ignored.\n");
- sim_addr_range_delete (TRACE_RANGE (CPU_TRACE_DATA (cpu)),
- 0, ~ (address_word) 0);
- }
- }
- }
-#endif
-
- return SIM_RC_OK;
-}
-
-static void
-trace_uninstall (SIM_DESC sd)
-{
- int i,j;
- FILE *sfile = TRACE_FILE (STATE_TRACE_DATA (sd));
-
- if (sfile != NULL)
- fclose (sfile);
-
- for (i = 0; i < MAX_NR_PROCESSORS; ++i)
- {
- FILE *cfile = TRACE_FILE (CPU_TRACE_DATA (STATE_CPU (sd, i)));
- if (cfile != NULL && cfile != sfile)
- {
- /* If output from different cpus is going to the same file,
- avoid closing the file twice. */
- for (j = 0; j < i; ++j)
- if (TRACE_FILE (CPU_TRACE_DATA (STATE_CPU (sd, j))) == cfile)
- break;
- if (i == j)
- fclose (cfile);
- }
- }
-}
-
-typedef enum {
- trace_fmt_invalid,
- trace_fmt_word,
- trace_fmt_fp,
- trace_fmt_fpu,
- trace_fmt_string,
- trace_fmt_bool,
- trace_fmt_addr,
- trace_fmt_instruction_incomplete,
-} data_fmt;
-
-/* compute the nr of trace data units consumed by data */
-static int
-save_data_size (TRACE_DATA *data,
- long size)
-{
- return ((size + sizeof (TRACE_INPUT_DATA (data) [0]) - 1)
- / sizeof (TRACE_INPUT_DATA (data) [0]));
-}
-
-
-/* Archive DATA into the trace buffer */
-static void
-save_data (SIM_DESC sd,
- TRACE_DATA *data,
- data_fmt fmt,
- long size,
- void *buf)
-{
- int i = TRACE_INPUT_IDX (data);
- if (i == sizeof (TRACE_INPUT_FMT (data)))
- sim_io_error (sd, "trace buffer overflow");
- TRACE_INPUT_FMT (data) [i] = fmt;
- TRACE_INPUT_SIZE (data) [i] = size;
- memcpy (&TRACE_INPUT_DATA (data) [i], buf, size);
- i += save_data_size (data, size);
- TRACE_INPUT_IDX (data) = i;
-}
-
-static void
-print_data (SIM_DESC sd,
- sim_cpu *cpu,
- data_fmt fmt,
- long size,
- void *data)
-{
- switch (fmt)
- {
- case trace_fmt_instruction_incomplete:
- trace_printf (sd, cpu, " (instruction incomplete)");
- break;
- case trace_fmt_word:
- case trace_fmt_addr:
- {
- switch (size)
- {
- case sizeof (unsigned32):
- trace_printf (sd, cpu, " 0x%08lx", (long) * (unsigned32*) data);
- break;
- case sizeof (unsigned64):
- trace_printf (sd, cpu, " 0x%08lx%08lx",
- (long) ((* (unsigned64*) data) >> 32),
- (long) * (unsigned64*) data);
- break;
- default:
- abort ();
- }
- break;
- }
- case trace_fmt_bool:
- {
- SIM_ASSERT (size == sizeof (int));
- trace_printf (sd, cpu, " %-8s",
- (* (int*) data) ? "true" : "false");
- break;
- }
- case trace_fmt_fp:
- {
- sim_fpu fp;
- switch (size)
- {
- /* FIXME: Assumes sizeof float == 4; sizeof double == 8 */
- case 4:
- sim_fpu_32to (&fp, *(unsigned32*)data);
- break;
- case 8:
- sim_fpu_64to (&fp, *(unsigned64*)data);
- break;
- default:
- abort ();
- }
- trace_printf (sd, cpu, " %8g", sim_fpu_2d (&fp));
- switch (size)
- {
- case 4:
- trace_printf (sd, cpu, " (0x%08lx)",
- (long) *(unsigned32*)data);
- break;
- case 8:
- trace_printf (sd, cpu, " (0x%08lx%08lx)",
- (long) (*(unsigned64*)data >> 32),
- (long) (*(unsigned64*)data));
- break;
- default:
- abort ();
- }
- break;
- }
- case trace_fmt_fpu:
- /* FIXME: At present sim_fpu data is stored as a double */
- trace_printf (sd, cpu, " %8g", * (double*) data);
- break;
- case trace_fmt_string:
- trace_printf (sd, cpu, " %-8s", (char*) data);
- break;
- default:
- abort ();
- }
-}
-
-static const char *
-trace_idx_to_str (int trace_idx)
-{
- static char num[8];
- switch (trace_idx)
- {
- case TRACE_ALU_IDX: return "alu: ";
- case TRACE_INSN_IDX: return "insn: ";
- case TRACE_DECODE_IDX: return "decode: ";
- case TRACE_EXTRACT_IDX: return "extract: ";
- case TRACE_MEMORY_IDX: return "memory: ";
- case TRACE_CORE_IDX: return "core: ";
- case TRACE_EVENTS_IDX: return "events: ";
- case TRACE_FPU_IDX: return "fpu: ";
- case TRACE_BRANCH_IDX: return "branch: ";
- case TRACE_VPU_IDX: return "vpu: ";
- default:
- sprintf (num, "?%d?", trace_idx);
- return num;
- }
-}
-
-static void
-trace_results (SIM_DESC sd,
- sim_cpu *cpu,
- int trace_idx,
- int last_input)
-{
- TRACE_DATA *data = CPU_TRACE_DATA (cpu);
- int nr_out;
- int i;
-
- /* cross check trace_idx against TRACE_IDX (data)? */
-
- /* prefix */
- trace_printf (sd, cpu, "%s %s",
- trace_idx_to_str (TRACE_IDX (data)),
- TRACE_PREFIX (data));
- TRACE_IDX (data) = 0;
-
- for (i = 0, nr_out = 0;
- i < TRACE_INPUT_IDX (data);
- i += save_data_size (data, TRACE_INPUT_SIZE (data) [i]), nr_out++)
- {
- if (i == last_input)
- {
- int pad = (strlen (" 0x") + sizeof (unsigned_word) * 2);
- int padding = pad * (3 - nr_out);
- if (padding < 0)
- padding = 0;
- padding += strlen (" ::");
- trace_printf (sd, cpu, "%*s", padding, " ::");
- }
- print_data (sd, cpu,
- TRACE_INPUT_FMT (data) [i],
- TRACE_INPUT_SIZE (data) [i],
- &TRACE_INPUT_DATA (data) [i]);
- }
- trace_printf (sd, cpu, "\n");
-}
-
-void
-trace_prefix (SIM_DESC sd,
- sim_cpu *cpu,
- sim_cia cia,
- address_word pc,
- int line_p,
- const char *filename,
- int linenum,
- const char *fmt,
- ...)
-{
- TRACE_DATA *data = CPU_TRACE_DATA (cpu);
- va_list ap;
- char *prefix = TRACE_PREFIX (data);
- char *chp;
- /* FIXME: The TRACE_PREFIX_WIDTH should be determined at build time using
- known information about the disassembled instructions. */
-#ifndef TRACE_PREFIX_WIDTH
-#define TRACE_PREFIX_WIDTH 48
-#endif
- int width = TRACE_PREFIX_WIDTH;
-
- /* if the previous trace data wasn't flushed, flush it now with a
- note indicating that the trace was incomplete. */
- if (TRACE_IDX (data) != 0)
- {
- int last_input = TRACE_INPUT_IDX (data);
- save_data (sd, data, trace_fmt_instruction_incomplete, 1, "");
- trace_results (sd, cpu, TRACE_IDX (data), last_input);
- }
- TRACE_IDX (data) = 0;
- TRACE_INPUT_IDX (data) = 0;
-
- /* Create the text prefix for this new instruction: */
- if (!line_p)
- {
- if (filename)
- {
- sprintf (prefix, "%s:%-*d 0x%.*lx ",
- filename,
- SIZE_LINE_NUMBER, linenum,
- SIZE_PC, (long) pc);
- }
- else
- {
- sprintf (prefix, "0x%.*lx ",
- SIZE_PC, (long) pc);
- /* Shrink the width by the amount that we didn't print. */
- width -= SIZE_LINE_NUMBER + SIZE_PC + 8;
- }
- chp = strchr (prefix, '\0');
- va_start (ap, fmt);
- vsprintf (chp, fmt, ap);
- va_end (ap);
- }
- else
- {
- char buf[256];
- buf[0] = 0;
- if (STATE_TEXT_SECTION (CPU_STATE (cpu))
- && pc >= STATE_TEXT_START (CPU_STATE (cpu))
- && pc < STATE_TEXT_END (CPU_STATE (cpu)))
- {
- const char *pc_filename = (const char *)0;
- const char *pc_function = (const char *)0;
- unsigned int pc_linenum = 0;
- bfd *abfd;
- asymbol **asymbols;
-
- abfd = STATE_PROG_BFD (CPU_STATE (cpu));
- asymbols = STATE_PROG_SYMS (CPU_STATE (cpu));
- if (asymbols == NULL)
- {
- long symsize;
- long symbol_count;
-
- symsize = bfd_get_symtab_upper_bound (abfd);
- if (symsize < 0)
- {
- sim_engine_abort (sd, cpu, cia, "could not read symbols");
- }
- asymbols = (asymbol **) xmalloc (symsize);
- symbol_count = bfd_canonicalize_symtab (abfd, asymbols);
- if (symbol_count < 0)
- {
- sim_engine_abort (sd, cpu, cia, "could not canonicalize symbols");
- }
- STATE_PROG_SYMS (CPU_STATE (cpu)) = asymbols;
- }
-
- if (bfd_find_nearest_line (abfd,
- STATE_TEXT_SECTION (CPU_STATE (cpu)),
- asymbols,
- pc - STATE_TEXT_START (CPU_STATE (cpu)),
- &pc_filename, &pc_function, &pc_linenum))
- {
- char *p = buf;
- if (pc_linenum)
- {
- sprintf (p, "#%-*d ", SIZE_LINE_NUMBER, pc_linenum);
- p += strlen (p);
- }
- else
- {
- sprintf (p, "%-*s ", SIZE_LINE_NUMBER+1, "---");
- p += SIZE_LINE_NUMBER+2;
- }
-
- if (pc_function)
- {
- sprintf (p, "%s ", pc_function);
- p += strlen (p);
- }
- else if (pc_filename)
- {
- char *q = (char *) strrchr (pc_filename, '/');
- sprintf (p, "%s ", (q) ? q+1 : pc_filename);
- p += strlen (p);
- }
-
- if (*p == ' ')
- *p = '\0';
- }
- }
-
- sprintf (prefix, "0x%.*x %-*.*s ",
- SIZE_PC, (unsigned) pc,
- SIZE_LOCATION, SIZE_LOCATION, buf);
- chp = strchr (prefix, '\0');
- va_start (ap, fmt);
- vsprintf (chp, fmt, ap);
- va_end (ap);
- }
-
- /* Pad it out to TRACE_PREFIX_WIDTH. */
- chp = strchr (prefix, '\0');
- if (chp - prefix < width)
- {
- memset (chp, ' ', width - (chp - prefix));
- chp = &prefix [width];
- *chp = '\0';
- }
- strcpy (chp, " -");
-
- /* check that we've not over flowed the prefix buffer */
- if (strlen (prefix) >= sizeof (TRACE_PREFIX (data)))
- abort ();
-}
-
-void
-trace_generic (SIM_DESC sd,
- sim_cpu *cpu,
- int trace_idx,
- const char *fmt,
- ...)
-{
- va_list ap;
- trace_printf (sd, cpu, "%s %s",
- trace_idx_to_str (trace_idx),
- TRACE_PREFIX (CPU_TRACE_DATA (cpu)));
- va_start (ap, fmt);
- trace_vprintf (sd, cpu, fmt, ap);
- va_end (ap);
- trace_printf (sd, cpu, "\n");
-}
-
-void
-trace_input0 (SIM_DESC sd,
- sim_cpu *cpu,
- int trace_idx)
-{
- TRACE_DATA *data = CPU_TRACE_DATA (cpu);
- TRACE_IDX (data) = trace_idx;
-}
-
-void
-trace_input_word1 (SIM_DESC sd,
- sim_cpu *cpu,
- int trace_idx,
- unsigned_word d0)
-{
- TRACE_DATA *data = CPU_TRACE_DATA (cpu);
- TRACE_IDX (data) = trace_idx;
- save_data (sd, data, trace_fmt_word, sizeof (unsigned_word), &d0);
-}
-
-void
-trace_input_word2 (SIM_DESC sd,
- sim_cpu *cpu,
- int trace_idx,
- unsigned_word d0,
- unsigned_word d1)
-{
- TRACE_DATA *data = CPU_TRACE_DATA (cpu);
- TRACE_IDX (data) = trace_idx;
- save_data (sd, data, trace_fmt_word, sizeof (unsigned_word), &d0);
- save_data (sd, data, trace_fmt_word, sizeof (unsigned_word), &d1);
-}
-
-void
-trace_input_word3 (SIM_DESC sd,
- sim_cpu *cpu,
- int trace_idx,
- unsigned_word d0,
- unsigned_word d1,
- unsigned_word d2)
-{
- TRACE_DATA *data = CPU_TRACE_DATA (cpu);
- TRACE_IDX (data) = trace_idx;
- save_data (sd, data, trace_fmt_word, sizeof (unsigned_word), &d0);
- save_data (sd, data, trace_fmt_word, sizeof (unsigned_word), &d1);
- save_data (sd, data, trace_fmt_word, sizeof (unsigned_word), &d2);
-}
-
-void
-trace_input_word4 (SIM_DESC sd,
- sim_cpu *cpu,
- int trace_idx,
- unsigned_word d0,
- unsigned_word d1,
- unsigned_word d2,
- unsigned_word d3)
-{
- TRACE_DATA *data = CPU_TRACE_DATA (cpu);
- TRACE_IDX (data) = trace_idx;
- save_data (sd, data, trace_fmt_word, sizeof (d0), &d0);
- save_data (sd, data, trace_fmt_word, sizeof (d1), &d1);
- save_data (sd, data, trace_fmt_word, sizeof (d2), &d2);
- save_data (sd, data, trace_fmt_word, sizeof (d3), &d3);
-}
-
-void
-trace_input_bool1 (SIM_DESC sd,
- sim_cpu *cpu,
- int trace_idx,
- int d0)
-{
- TRACE_DATA *data = CPU_TRACE_DATA (cpu);
- TRACE_IDX (data) = trace_idx;
- save_data (sd, data, trace_fmt_bool, sizeof (d0), &d0);
-}
-
-void
-trace_input_addr1 (SIM_DESC sd,
- sim_cpu *cpu,
- int trace_idx,
- address_word d0)
-{
- TRACE_DATA *data = CPU_TRACE_DATA (cpu);
- TRACE_IDX (data) = trace_idx;
- save_data (sd, data, trace_fmt_addr, sizeof (d0), &d0);
-}
-
-void
-trace_input_fp1 (SIM_DESC sd,
- sim_cpu *cpu,
- int trace_idx,
- fp_word f0)
-{
- TRACE_DATA *data = CPU_TRACE_DATA (cpu);
- TRACE_IDX (data) = trace_idx;
- save_data (sd, data, trace_fmt_fp, sizeof (fp_word), &f0);
-}
-
-void
-trace_input_fp2 (SIM_DESC sd,
- sim_cpu *cpu,
- int trace_idx,
- fp_word f0,
- fp_word f1)
-{
- TRACE_DATA *data = CPU_TRACE_DATA (cpu);
- TRACE_IDX (data) = trace_idx;
- save_data (sd, data, trace_fmt_fp, sizeof (fp_word), &f0);
- save_data (sd, data, trace_fmt_fp, sizeof (fp_word), &f1);
-}
-
-void
-trace_input_fp3 (SIM_DESC sd,
- sim_cpu *cpu,
- int trace_idx,
- fp_word f0,
- fp_word f1,
- fp_word f2)
-{
- TRACE_DATA *data = CPU_TRACE_DATA (cpu);
- TRACE_IDX (data) = trace_idx;
- save_data (sd, data, trace_fmt_fp, sizeof (fp_word), &f0);
- save_data (sd, data, trace_fmt_fp, sizeof (fp_word), &f1);
- save_data (sd, data, trace_fmt_fp, sizeof (fp_word), &f2);
-}
-
-void
-trace_input_fpu1 (SIM_DESC sd,
- sim_cpu *cpu,
- int trace_idx,
- sim_fpu *f0)
-{
- double d;
- TRACE_DATA *data = CPU_TRACE_DATA (cpu);
- TRACE_IDX (data) = trace_idx;
- d = sim_fpu_2d (f0);
- save_data (sd, data, trace_fmt_fp, sizeof (double), &d);
-}
-
-void
-trace_input_fpu2 (SIM_DESC sd,
- sim_cpu *cpu,
- int trace_idx,
- sim_fpu *f0,
- sim_fpu *f1)
-{
- double d;
- TRACE_DATA *data = CPU_TRACE_DATA (cpu);
- TRACE_IDX (data) = trace_idx;
- d = sim_fpu_2d (f0);
- save_data (sd, data, trace_fmt_fp, sizeof (double), &d);
- d = sim_fpu_2d (f1);
- save_data (sd, data, trace_fmt_fp, sizeof (double), &d);
-}
-
-void
-trace_input_fpu3 (SIM_DESC sd,
- sim_cpu *cpu,
- int trace_idx,
- sim_fpu *f0,
- sim_fpu *f1,
- sim_fpu *f2)
-{
- double d;
- TRACE_DATA *data = CPU_TRACE_DATA (cpu);
- TRACE_IDX (data) = trace_idx;
- d = sim_fpu_2d (f0);
- save_data (sd, data, trace_fmt_fp, sizeof (double), &d);
- d = sim_fpu_2d (f1);
- save_data (sd, data, trace_fmt_fp, sizeof (double), &d);
- d = sim_fpu_2d (f2);
- save_data (sd, data, trace_fmt_fp, sizeof (double), &d);
-}
-
-void
-trace_result_word1 (SIM_DESC sd,
- sim_cpu *cpu,
- int trace_idx,
- unsigned_word r0)
-{
- TRACE_DATA *data = CPU_TRACE_DATA (cpu);
- int last_input;
-
- /* Append any results to the end of the inputs */
- last_input = TRACE_INPUT_IDX (data);
- save_data (sd, data, trace_fmt_word, sizeof (unsigned_word), &r0);
-
- trace_results (sd, cpu, trace_idx, last_input);
-}
-
-void
-trace_result0 (SIM_DESC sd,
- sim_cpu *cpu,
- int trace_idx)
-{
- TRACE_DATA *data = CPU_TRACE_DATA (cpu);
- int last_input;
-
- /* Append any results to the end of the inputs */
- last_input = TRACE_INPUT_IDX (data);
-
- trace_results (sd, cpu, trace_idx, last_input);
-}
-
-void
-trace_result_word2 (SIM_DESC sd,
- sim_cpu *cpu,
- int trace_idx,
- unsigned_word r0,
- unsigned_word r1)
-{
- TRACE_DATA *data = CPU_TRACE_DATA (cpu);
- int last_input;
-
- /* Append any results to the end of the inputs */
- last_input = TRACE_INPUT_IDX (data);
- save_data (sd, data, trace_fmt_word, sizeof (r0), &r0);
- save_data (sd, data, trace_fmt_word, sizeof (r1), &r1);
-
- trace_results (sd, cpu, trace_idx, last_input);
-}
-
-void
-trace_result_word4 (SIM_DESC sd,
- sim_cpu *cpu,
- int trace_idx,
- unsigned_word r0,
- unsigned_word r1,
- unsigned_word r2,
- unsigned_word r3)
-{
- TRACE_DATA *data = CPU_TRACE_DATA (cpu);
- int last_input;
-
- /* Append any results to the end of the inputs */
- last_input = TRACE_INPUT_IDX (data);
- save_data (sd, data, trace_fmt_word, sizeof (r0), &r0);
- save_data (sd, data, trace_fmt_word, sizeof (r1), &r1);
- save_data (sd, data, trace_fmt_word, sizeof (r2), &r2);
- save_data (sd, data, trace_fmt_word, sizeof (r3), &r3);
-
- trace_results (sd, cpu, trace_idx, last_input);
-}
-
-void
-trace_result_bool1 (SIM_DESC sd,
- sim_cpu *cpu,
- int trace_idx,
- int r0)
-{
- TRACE_DATA *data = CPU_TRACE_DATA (cpu);
- int last_input;
-
- /* Append any results to the end of the inputs */
- last_input = TRACE_INPUT_IDX (data);
- save_data (sd, data, trace_fmt_bool, sizeof (r0), &r0);
-
- trace_results (sd, cpu, trace_idx, last_input);
-}
-
-void
-trace_result_addr1 (SIM_DESC sd,
- sim_cpu *cpu,
- int trace_idx,
- address_word r0)
-{
- TRACE_DATA *data = CPU_TRACE_DATA (cpu);
- int last_input;
-
- /* Append any results to the end of the inputs */
- last_input = TRACE_INPUT_IDX (data);
- save_data (sd, data, trace_fmt_addr, sizeof (r0), &r0);
-
- trace_results (sd, cpu, trace_idx, last_input);
-}
-
-void
-trace_result_fp1 (SIM_DESC sd,
- sim_cpu *cpu,
- int trace_idx,
- fp_word f0)
-{
- TRACE_DATA *data = CPU_TRACE_DATA (cpu);
- int last_input;
-
- /* Append any results to the end of the inputs */
- last_input = TRACE_INPUT_IDX (data);
- save_data (sd, data, trace_fmt_fp, sizeof (fp_word), &f0);
-
- trace_results (sd, cpu, trace_idx, last_input);
-}
-
-void
-trace_result_fp2 (SIM_DESC sd,
- sim_cpu *cpu,
- int trace_idx,
- fp_word f0,
- fp_word f1)
-{
- TRACE_DATA *data = CPU_TRACE_DATA (cpu);
- int last_input;
-
- /* Append any results to the end of the inputs */
- last_input = TRACE_INPUT_IDX (data);
- save_data (sd, data, trace_fmt_fp, sizeof (f0), &f0);
- save_data (sd, data, trace_fmt_fp, sizeof (f1), &f1);
-
- trace_results (sd, cpu, trace_idx, last_input);
-}
-
-void
-trace_result_fpu1 (SIM_DESC sd,
- sim_cpu *cpu,
- int trace_idx,
- sim_fpu *f0)
-{
- double d;
- TRACE_DATA *data = CPU_TRACE_DATA (cpu);
- int last_input;
-
- /* Append any results to the end of the inputs */
- last_input = TRACE_INPUT_IDX (data);
- d = sim_fpu_2d (f0);
- save_data (sd, data, trace_fmt_fp, sizeof (double), &d);
-
- trace_results (sd, cpu, trace_idx, last_input);
-}
-
-void
-trace_result_string1 (SIM_DESC sd,
- sim_cpu *cpu,
- int trace_idx,
- char *s0)
-{
- TRACE_DATA *data = CPU_TRACE_DATA (cpu);
- int last_input;
-
- /* Append any results to the end of the inputs */
- last_input = TRACE_INPUT_IDX (data);
- save_data (sd, data, trace_fmt_string, strlen (s0) + 1, s0);
-
- trace_results (sd, cpu, trace_idx, last_input);
-}
-
-void
-trace_result_word1_string1 (SIM_DESC sd,
- sim_cpu *cpu,
- int trace_idx,
- unsigned_word r0,
- char *s0)
-{
- TRACE_DATA *data = CPU_TRACE_DATA (cpu);
- int last_input;
-
- /* Append any results to the end of the inputs */
- last_input = TRACE_INPUT_IDX (data);
- save_data (sd, data, trace_fmt_word, sizeof (unsigned_word), &r0);
- save_data (sd, data, trace_fmt_string, strlen (s0) + 1, s0);
-
- trace_results (sd, cpu, trace_idx, last_input);
-}
-
-void
-trace_vprintf (SIM_DESC sd, sim_cpu *cpu, const char *fmt, va_list ap)
-{
- if (cpu != NULL)
- {
- if (TRACE_FILE (CPU_TRACE_DATA (cpu)) != NULL)
- vfprintf (TRACE_FILE (CPU_TRACE_DATA (cpu)), fmt, ap);
- else
- sim_io_evprintf (sd, fmt, ap);
- }
- else
- {
- if (TRACE_FILE (STATE_TRACE_DATA (sd)) != NULL)
- vfprintf (TRACE_FILE (STATE_TRACE_DATA (sd)), fmt, ap);
- else
- sim_io_evprintf (sd, fmt, ap);
- }
-}
-
-/* The function trace_one_insn has been replaced by the function pair
- trace_prefix() + trace_generic(). It is still used. */
-void
-trace_one_insn (SIM_DESC sd, sim_cpu *cpu, address_word pc,
- int line_p, const char *filename, int linenum,
- const char *phase_wo_colon, const char *fmt,
- ...)
-{
- va_list ap;
- char phase[SIZE_PHASE+2];
-
- strncpy (phase, phase_wo_colon, SIZE_PHASE);
- strcat (phase, ":");
-
- if (!line_p)
- {
- trace_printf (sd, cpu, "%-*s %s:%-*d 0x%.*lx ",
- SIZE_PHASE+1, phase,
- filename,
- SIZE_LINE_NUMBER, linenum,
- SIZE_PC, (long)pc);
- va_start (ap, fmt);
- trace_vprintf (sd, cpu, fmt, ap);
- va_end (ap);
- trace_printf (sd, cpu, "\n");
- }
- else
- {
- char buf[256];
-
- buf[0] = 0;
- if (STATE_TEXT_SECTION (CPU_STATE (cpu))
- && pc >= STATE_TEXT_START (CPU_STATE (cpu))
- && pc < STATE_TEXT_END (CPU_STATE (cpu)))
- {
- const char *pc_filename = (const char *)0;
- const char *pc_function = (const char *)0;
- unsigned int pc_linenum = 0;
-
- if (bfd_find_nearest_line (STATE_PROG_BFD (CPU_STATE (cpu)),
- STATE_TEXT_SECTION (CPU_STATE (cpu)),
- (struct symbol_cache_entry **) 0,
- pc - STATE_TEXT_START (CPU_STATE (cpu)),
- &pc_filename, &pc_function, &pc_linenum))
- {
- char *p = buf;
- if (pc_linenum)
- {
- sprintf (p, "#%-*d ", SIZE_LINE_NUMBER, pc_linenum);
- p += strlen (p);
- }
- else
- {
- sprintf (p, "%-*s ", SIZE_LINE_NUMBER+1, "---");
- p += SIZE_LINE_NUMBER+2;
- }
-
- if (pc_function)
- {
- sprintf (p, "%s ", pc_function);
- p += strlen (p);
- }
- else if (pc_filename)
- {
- char *q = (char *) strrchr (pc_filename, '/');
- sprintf (p, "%s ", (q) ? q+1 : pc_filename);
- p += strlen (p);
- }
-
- if (*p == ' ')
- *p = '\0';
- }
- }
-
- trace_printf (sd, cpu, "%-*s 0x%.*x %-*.*s ",
- SIZE_PHASE+1, phase,
- SIZE_PC, (unsigned) pc,
- SIZE_LOCATION, SIZE_LOCATION, buf);
- va_start (ap, fmt);
- trace_vprintf (sd, cpu, fmt, ap);
- va_end (ap);
- trace_printf (sd, cpu, "\n");
- }
-}
-
-void
-trace_printf VPARAMS ((SIM_DESC sd, sim_cpu *cpu, const char *fmt, ...))
-{
-#if !defined __STDC__ && !defined ALMOST_STDC
- SIM_DESC sd;
- sim_cpu *cpu;
- const char *fmt;
-#endif
- va_list ap;
-
- VA_START (ap, fmt);
-#if !defined __STDC__ && !defined ALMOST_STDC
- sd = va_arg (ap, SIM_DESC);
- cpu = va_arg (ap, sim_cpu *);
- fmt = va_arg (ap, const char *);
-#endif
-
- trace_vprintf (sd, cpu, fmt, ap);
-
- va_end (ap);
-}
-
-void
-debug_printf VPARAMS ((sim_cpu *cpu, const char *fmt, ...))
-{
-#if !defined __STDC__ && !defined ALMOST_STDC
- sim_cpu *cpu;
- const char *fmt;
-#endif
- va_list ap;
-
- VA_START (ap, fmt);
-#if !defined __STDC__ && !defined ALMOST_STDC
- cpu = va_arg (ap, sim_cpu *);
- fmt = va_arg (ap, const char *);
-#endif
-
- if (CPU_DEBUG_FILE (cpu) == NULL)
- (* STATE_CALLBACK (CPU_STATE (cpu))->evprintf_filtered)
- (STATE_CALLBACK (CPU_STATE (cpu)), fmt, ap);
- else
- vfprintf (CPU_DEBUG_FILE (cpu), fmt, ap);
-
- va_end (ap);
-}
diff --git a/sim/common/sim-trace.h b/sim/common/sim-trace.h
deleted file mode 100644
index 53a10f39e4c..00000000000
--- a/sim/common/sim-trace.h
+++ /dev/null
@@ -1,567 +0,0 @@
-/* Simulator tracing/debugging support.
- Copyright (C) 1997, 1998, 2001 Free Software Foundation, Inc.
- Contributed by Cygnus Support.
-
-This file is part of GDB, the GNU debugger.
-
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License along
-with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
-
-/* This file is meant to be included by sim-basics.h. */
-
-#ifndef SIM_TRACE_H
-#define SIM_TRACE_H
-
-/* Standard traceable entities. */
-
-enum {
- /* Trace insn execution. */
- TRACE_INSN_IDX = 1,
-
- /* Trace insn decoding.
- ??? This is more of a simulator debugging operation and might best be
- moved to --debug-decode. */
- TRACE_DECODE_IDX,
-
- /* Trace insn extraction.
- ??? This is more of a simulator debugging operation and might best be
- moved to --debug-extract. */
- TRACE_EXTRACT_IDX,
-
- /* Trace insn execution but include line numbers. */
- TRACE_LINENUM_IDX,
-
- /* Trace memory operations.
- The difference between this and TRACE_CORE_IDX is (I think) that this
- is intended to apply to a higher level. TRACE_CORE_IDX applies to the
- low level core operations. */
- TRACE_MEMORY_IDX,
-
- /* Include model performance data in tracing output. */
- TRACE_MODEL_IDX,
-
- /* Trace ALU operations. */
- TRACE_ALU_IDX,
-
- /* Trace memory core operations. */
- TRACE_CORE_IDX,
-
- /* Trace events. */
- TRACE_EVENTS_IDX,
-
- /* Trace fpu operations. */
- TRACE_FPU_IDX,
-
- /* Trace vpu operations. */
- TRACE_VPU_IDX,
-
- /* Trace branching. */
- TRACE_BRANCH_IDX,
-
- /* Add information useful for debugging the simulator to trace output. */
- TRACE_DEBUG_IDX,
-
- /* Simulator specific trace bits begin here. */
- TRACE_NEXT_IDX,
-
-};
-/* Maximum number of traceable entities. */
-#ifndef MAX_TRACE_VALUES
-#define MAX_TRACE_VALUES 32
-#endif
-
-/* The -t option only prints useful values. It's easy to type and shouldn't
- splat on the screen everything under the sun making nothing easy to
- find. */
-#define TRACE_USEFUL_MASK \
-((1 << TRACE_INSN_IDX) \
- | (1 << TRACE_LINENUM_IDX) \
- | (1 << TRACE_MEMORY_IDX) \
- | (1 << TRACE_MODEL_IDX))
-
-/* Masks so WITH_TRACE can have symbolic values.
- The case choice here is on purpose. The lowercase parts are args to
- --with-trace. */
-#define TRACE_insn (1 << TRACE_INSN_IDX)
-#define TRACE_decode (1 << TRACE_DECODE_IDX)
-#define TRACE_extract (1 << TRACE_EXTRACT_IDX)
-#define TRACE_linenum (1 << TRACE_LINENUM_IDX)
-#define TRACE_memory (1 << TRACE_MEMORY_IDX)
-#define TRACE_model (1 << TRACE_MODEL_IDX)
-#define TRACE_alu (1 << TRACE_ALU_IDX)
-#define TRACE_core (1 << TRACE_CORE_IDX)
-#define TRACE_events (1 << TRACE_EVENTS_IDX)
-#define TRACE_fpu (1 << TRACE_FPU_IDX)
-#define TRACE_vpu (1 << TRACE_VPU_IDX)
-#define TRACE_branch (1 << TRACE_BRANCH_IDX)
-#define TRACE_debug (1 << TRACE_DEBUG_IDX)
-
-/* Preprocessor macros to simplify tests of WITH_TRACE. */
-#define WITH_TRACE_INSN_P (WITH_TRACE & TRACE_insn)
-#define WITH_TRACE_DECODE_P (WITH_TRACE & TRACE_decode)
-#define WITH_TRACE_EXTRACT_P (WITH_TRACE & TRACE_extract)
-#define WITH_TRACE_LINENUM_P (WITH_TRACE & TRACE_linenum)
-#define WITH_TRACE_MEMORY_P (WITH_TRACE & TRACE_memory)
-#define WITH_TRACE_MODEL_P (WITH_TRACE & TRACE_model)
-#define WITH_TRACE_ALU_P (WITH_TRACE & TRACE_alu)
-#define WITH_TRACE_CORE_P (WITH_TRACE & TRACE_core)
-#define WITH_TRACE_EVENTS_P (WITH_TRACE & TRACE_events)
-#define WITH_TRACE_FPU_P (WITH_TRACE & TRACE_fpu)
-#define WITH_TRACE_VPU_P (WITH_TRACE & TRACE_vpu)
-#define WITH_TRACE_BRANCH_P (WITH_TRACE & TRACE_branch)
-#define WITH_TRACE_DEBUG_P (WITH_TRACE & TRACE_debug)
-
-/* Tracing install handler. */
-MODULE_INSTALL_FN trace_install;
-
-/* Struct containing all system and cpu trace data.
-
- System trace data is stored with the associated module.
- System and cpu tracing must share the same space of bitmasks as they
- are arguments to --with-trace. One could have --with-trace and
- --with-cpu-trace or some such but that's an over-complication at this point
- in time. Also, there may be occasions where system and cpu tracing may
- wish to share a name. */
-
-typedef struct _trace_data {
-
- /* Global summary of all the current trace options */
- char trace_any_p;
-
- /* Boolean array of specified tracing flags. */
- /* ??? It's not clear that using an array vs a bit mask is faster.
- Consider the case where one wants to test whether any of several bits
- are set. */
- char trace_flags[MAX_TRACE_VALUES];
-#define TRACE_FLAGS(t) ((t)->trace_flags)
-
- /* Tracing output goes to this or stderr if NULL.
- We can't store `stderr' here as stderr goes through a callback. */
- FILE *trace_file;
-#define TRACE_FILE(t) ((t)->trace_file)
-
- /* Buffer to store the prefix to be printed before any trace line. */
- char trace_prefix[256];
-#define TRACE_PREFIX(t) ((t)->trace_prefix)
-
- /* Buffer to save the inputs for the current instruction. Use a
- union to force the buffer into correct alignment */
- union {
- unsigned8 i8;
- unsigned16 i16;
- unsigned32 i32;
- unsigned64 i64;
- } trace_input_data[16];
- unsigned8 trace_input_fmt[16];
- unsigned8 trace_input_size[16];
- int trace_input_idx;
-#define TRACE_INPUT_DATA(t) ((t)->trace_input_data)
-#define TRACE_INPUT_FMT(t) ((t)->trace_input_fmt)
-#define TRACE_INPUT_SIZE(t) ((t)->trace_input_size)
-#define TRACE_INPUT_IDX(t) ((t)->trace_input_idx)
-
- /* Category of trace being performed */
- int trace_idx;
-#define TRACE_IDX(t) ((t)->trace_idx)
-
- /* Trace range.
- ??? Not all cpu's support this. */
- ADDR_RANGE range;
-#define TRACE_RANGE(t) (& (t)->range)
-} TRACE_DATA;
-
-/* System tracing support. */
-
-#define STATE_TRACE_FLAGS(sd) TRACE_FLAGS (STATE_TRACE_DATA (sd))
-
-/* Return non-zero if tracing of IDX is enabled for non-cpu specific
- components. The "S" in "STRACE" refers to "System". */
-#define STRACE_P(sd,idx) \
-((WITH_TRACE & (1 << (idx))) != 0 \
- && STATE_TRACE_FLAGS (sd)[idx] != 0)
-
-/* Non-zero if --trace-<xxxx> was specified for SD. */
-#define STRACE_DEBUG_P(sd) STRACE_P (sd, TRACE_DEBUG_IDX)
-
-/* CPU tracing support. */
-
-#define CPU_TRACE_FLAGS(cpu) TRACE_FLAGS (CPU_TRACE_DATA (cpu))
-
-/* Return non-zero if tracing of IDX is enabled for CPU. */
-#define TRACE_P(cpu,idx) \
-((WITH_TRACE & (1 << (idx))) != 0 \
- && CPU_TRACE_FLAGS (cpu)[idx] != 0)
-
-/* Non-zero if --trace-<xxxx> was specified for CPU. */
-#define TRACE_ANY_P(cpu) ((WITH_TRACE) && (CPU_TRACE_DATA (cpu)->trace_any_p))
-#define TRACE_INSN_P(cpu) TRACE_P (cpu, TRACE_INSN_IDX)
-#define TRACE_DECODE_P(cpu) TRACE_P (cpu, TRACE_DECODE_IDX)
-#define TRACE_EXTRACT_P(cpu) TRACE_P (cpu, TRACE_EXTRACT_IDX)
-#define TRACE_LINENUM_P(cpu) TRACE_P (cpu, TRACE_LINENUM_IDX)
-#define TRACE_MEMORY_P(cpu) TRACE_P (cpu, TRACE_MEMORY_IDX)
-#define TRACE_MODEL_P(cpu) TRACE_P (cpu, TRACE_MODEL_IDX)
-#define TRACE_ALU_P(cpu) TRACE_P (cpu, TRACE_ALU_IDX)
-#define TRACE_CORE_P(cpu) TRACE_P (cpu, TRACE_CORE_IDX)
-#define TRACE_EVENTS_P(cpu) TRACE_P (cpu, TRACE_EVENTS_IDX)
-#define TRACE_FPU_P(cpu) TRACE_P (cpu, TRACE_FPU_IDX)
-#define TRACE_VPU_P(cpu) TRACE_P (cpu, TRACE_VPU_IDX)
-#define TRACE_BRANCH_P(cpu) TRACE_P (cpu, TRACE_BRANCH_IDX)
-#define TRACE_DEBUG_P(cpu) TRACE_P (cpu, TRACE_DEBUG_IDX)
-
-/* Tracing functions. */
-
-/* Prime the trace buffers ready for any trace output.
- Must be called prior to any other trace operation */
-extern void trace_prefix PARAMS ((SIM_DESC sd,
- sim_cpu *cpu,
- sim_cia cia,
- address_word pc,
- int print_linenum_p,
- const char *file_name,
- int line_nr,
- const char *fmt,
- ...))
- __attribute__((format (printf, 8, 9)));
-
-/* Generic trace print, assumes trace_prefix() has been called */
-
-extern void trace_generic PARAMS ((SIM_DESC sd,
- sim_cpu *cpu,
- int trace_idx,
- const char *fmt,
- ...))
- __attribute__((format (printf, 4, 5)));
-
-/* Trace a varying number of word sized inputs/outputs. trace_result*
- must be called to close the trace operation. */
-
-extern void trace_input0 PARAMS ((SIM_DESC sd,
- sim_cpu *cpu,
- int trace_idx));
-
-extern void trace_input_word1 PARAMS ((SIM_DESC sd,
- sim_cpu *cpu,
- int trace_idx,
- unsigned_word d0));
-
-extern void trace_input_word2 PARAMS ((SIM_DESC sd,
- sim_cpu *cpu,
- int trace_idx,
- unsigned_word d0,
- unsigned_word d1));
-
-extern void trace_input_word3 PARAMS ((SIM_DESC sd,
- sim_cpu *cpu,
- int trace_idx,
- unsigned_word d0,
- unsigned_word d1,
- unsigned_word d2));
-
-extern void trace_input_word4 PARAMS ((SIM_DESC sd,
- sim_cpu *cpu,
- int trace_idx,
- unsigned_word d0,
- unsigned_word d1,
- unsigned_word d2,
- unsigned_word d3));
-
-extern void trace_input_addr1 PARAMS ((SIM_DESC sd,
- sim_cpu *cpu,
- int trace_idx,
- address_word d0));
-
-extern void trace_input_bool1 PARAMS ((SIM_DESC sd,
- sim_cpu *cpu,
- int trace_idx,
- int d0));
-
-extern void trace_input_fp1 PARAMS ((SIM_DESC sd,
- sim_cpu *cpu,
- int trace_idx,
- fp_word f0));
-
-extern void trace_input_fp2 PARAMS ((SIM_DESC sd,
- sim_cpu *cpu,
- int trace_idx,
- fp_word f0,
- fp_word f1));
-
-extern void trace_input_fp3 PARAMS ((SIM_DESC sd,
- sim_cpu *cpu,
- int trace_idx,
- fp_word f0,
- fp_word f1,
- fp_word f2));
-
-extern void trace_input_fpu1 PARAMS ((SIM_DESC sd,
- sim_cpu *cpu,
- int trace_idx,
- struct _sim_fpu *f0));
-
-extern void trace_input_fpu2 PARAMS ((SIM_DESC sd,
- sim_cpu *cpu,
- int trace_idx,
- struct _sim_fpu *f0,
- struct _sim_fpu *f1));
-
-extern void trace_input_fpu3 PARAMS ((SIM_DESC sd,
- sim_cpu *cpu,
- int trace_idx,
- struct _sim_fpu *f0,
- struct _sim_fpu *f1,
- struct _sim_fpu *f2));
-
-/* Other trace_input{_<fmt><nr-inputs>} functions can go here */
-
-extern void trace_result0 PARAMS ((SIM_DESC sd,
- sim_cpu *cpu,
- int trace_idx));
-
-extern void trace_result_word1 PARAMS ((SIM_DESC sd,
- sim_cpu *cpu,
- int trace_idx,
- unsigned_word r0));
-
-extern void trace_result_word2 PARAMS ((SIM_DESC sd,
- sim_cpu *cpu,
- int trace_idx,
- unsigned_word r0,
- unsigned_word r1));
-
-extern void trace_result_word4 PARAMS ((SIM_DESC sd,
- sim_cpu *cpu,
- int trace_idx,
- unsigned_word r0,
- unsigned_word r1,
- unsigned_word r2,
- unsigned_word r3));
-
-extern void trace_result_bool1 PARAMS ((SIM_DESC sd,
- sim_cpu *cpu,
- int trace_idx,
- int r0));
-
-extern void trace_result_addr1 PARAMS ((SIM_DESC sd,
- sim_cpu *cpu,
- int trace_idx,
- address_word r0));
-
-extern void trace_result_fp1 PARAMS ((SIM_DESC sd,
- sim_cpu *cpu,
- int trace_idx,
- fp_word f0));
-
-extern void trace_result_fp2 PARAMS ((SIM_DESC sd,
- sim_cpu *cpu,
- int trace_idx,
- fp_word f0,
- fp_word f1));
-
-extern void trace_result_fpu1 PARAMS ((SIM_DESC sd,
- sim_cpu *cpu,
- int trace_idx,
- struct _sim_fpu *f0));
-
-extern void trace_result_string1 PARAMS ((SIM_DESC sd,
- sim_cpu *cpu,
- int trace_idx,
- char *str0));
-
-extern void trace_result_word1_string1 PARAMS ((SIM_DESC sd,
- sim_cpu *cpu,
- int trace_idx,
- unsigned_word r0,
- char *s0));
-
-/* Other trace_result{_<type><nr-results>} */
-
-
-/* Macros for tracing ALU instructions */
-
-#define TRACE_ALU_INPUT0() \
-do { \
- if (TRACE_ALU_P (CPU)) \
- trace_input0 (SD, CPU, TRACE_ALU_IDX); \
-} while (0)
-
-#define TRACE_ALU_INPUT1(V0) \
-do { \
- if (TRACE_ALU_P (CPU)) \
- trace_input_word1 (SD, CPU, TRACE_ALU_IDX, (V0)); \
-} while (0)
-
-#define TRACE_ALU_INPUT2(V0,V1) \
-do { \
- if (TRACE_ALU_P (CPU)) \
- trace_input_word2 (SD, CPU, TRACE_ALU_IDX, (V0), (V1)); \
-} while (0)
-
-#define TRACE_ALU_INPUT3(V0,V1,V2) \
-do { \
- if (TRACE_ALU_P (CPU)) \
- trace_input_word3 (SD, CPU, TRACE_ALU_IDX, (V0), (V1), (V2)); \
-} while (0)
-
-#define TRACE_ALU_INPUT4(V0,V1,V2,V3) \
-do { \
- if (TRACE_ALU_P (CPU)) \
- trace_input_word4 (SD, CPU, TRACE_ALU_IDX, (V0), (V1), (V2), (V3)); \
-} while (0)
-
-#define TRACE_ALU_RESULT(R0) TRACE_ALU_RESULT1(R0)
-
-#define TRACE_ALU_RESULT0() \
-do { \
- if (TRACE_ALU_P (CPU)) \
- trace_result0 (SD, CPU, TRACE_ALU_IDX); \
-} while (0)
-
-#define TRACE_ALU_RESULT1(R0) \
-do { \
- if (TRACE_ALU_P (CPU)) \
- trace_result_word1 (SD, CPU, TRACE_ALU_IDX, (R0)); \
-} while (0)
-
-#define TRACE_ALU_RESULT2(R0,R1) \
-do { \
- if (TRACE_ALU_P (CPU)) \
- trace_result_word2 (SD, CPU, TRACE_ALU_IDX, (R0), (R1)); \
-} while (0)
-
-#define TRACE_ALU_RESULT4(R0,R1,R2,R3) \
-do { \
- if (TRACE_ALU_P (CPU)) \
- trace_result_word4 (SD, CPU, TRACE_ALU_IDX, (R0), (R1), (R2), (R3)); \
-} while (0)
-
-/* Macros for tracing inputs to comparative branch instructions. */
-
-#define TRACE_BRANCH_INPUT1(V0) \
-do { \
- if (TRACE_BRANCH_P (CPU)) \
- trace_input_word1 (SD, CPU, TRACE_BRANCH_IDX, (V0)); \
-} while (0)
-
-#define TRACE_BRANCH_INPUT2(V0,V1) \
-do { \
- if (TRACE_BRANCH_P (CPU)) \
- trace_input_word2 (SD, CPU, TRACE_BRANCH_IDX, (V0), (V1)); \
-} while (0)
-
-/* Macros for tracing FPU instructions */
-
-#define TRACE_FP_INPUT0() \
-do { \
- if (TRACE_FPU_P (CPU)) \
- trace_input0 (SD, CPU, TRACE_FPU_IDX); \
-} while (0)
-
-#define TRACE_FP_INPUT1(V0) \
-do { \
- if (TRACE_FPU_P (CPU)) \
- trace_input_fp1 (SD, CPU, TRACE_FPU_IDX, (V0)); \
-} while (0)
-
-#define TRACE_FP_INPUT2(V0,V1) \
-do { \
- if (TRACE_FPU_P (CPU)) \
- trace_input_fp2 (SD, CPU, TRACE_FPU_IDX, (V0), (V1)); \
-} while (0)
-
-#define TRACE_FP_INPUT3(V0,V1,V2) \
-do { \
- if (TRACE_FPU_P (CPU)) \
- trace_input_fp3 (SD, CPU, TRACE_FPU_IDX, (V0), (V1), (V2)); \
-} while (0)
-
-#define TRACE_FP_INPUT_WORD1(V0) \
-do { \
- if (TRACE_FPU_P (CPU)) \
- trace_input_word1 (SD, CPU, TRACE_FPU_IDX, (V0)); \
-} while (0)
-
-#define TRACE_FP_RESULT(R0) \
-do { \
- if (TRACE_FPU_P (CPU)) \
- trace_result_fp1 (SD, CPU, TRACE_FPU_IDX, (R0)); \
-} while (0)
-
-#define TRACE_FP_RESULT2(R0,R1) \
-do { \
- if (TRACE_FPU_P (CPU)) \
- trace_result_fp2 (SD, CPU, TRACE_FPU_IDX, (R0), (R1)); \
-} while (0)
-
-#define TRACE_FP_RESULT_BOOL(R0) \
-do { \
- if (TRACE_FPU_P (CPU)) \
- trace_result_bool1 (SD, CPU, TRACE_FPU_IDX, (R0)); \
-} while (0)
-
-#define TRACE_FP_RESULT_WORD(R0) \
-do { \
- if (TRACE_FPU_P (CPU)) \
- trace_result_word1 (SD, CPU, TRACE_FPU_IDX, (R0)); \
-} while (0)
-
-
-/* Macros for tracing branches */
-
-#define TRACE_BRANCH_INPUT(COND) \
-do { \
- if (TRACE_BRANCH_P (CPU)) \
- trace_input_bool1 (SD, CPU, TRACE_BRANCH_IDX, (COND)); \
-} while (0)
-
-#define TRACE_BRANCH_RESULT(DEST) \
-do { \
- if (TRACE_BRANCH_P (CPU)) \
- trace_result_addr1 (SD, CPU, TRACE_BRANCH_IDX, (DEST)); \
-} while (0)
-
-
-/* The function trace_one_insn has been replaced by the function pair
- trace_prefix() + trace_generic() */
-extern void trace_one_insn PARAMS ((SIM_DESC sd,
- sim_cpu * cpu,
- address_word cia,
- int print_linenum_p,
- const char *file_name,
- int line_nr,
- const char *unit,
- const char *fmt,
- ...))
- __attribute__((format (printf, 8, 9)));
-
-extern void trace_printf PARAMS ((SIM_DESC, sim_cpu *, const char *, ...))
- __attribute__((format (printf, 3, 4)));
-
-extern void trace_vprintf PARAMS ((SIM_DESC, sim_cpu *, const char *, va_list));
-
-/* Debug support.
- This is included here because there isn't enough of it to justify
- a sim-debug.h. */
-
-/* Return non-zero if debugging of IDX for CPU is enabled. */
-#define DEBUG_P(cpu, idx) \
-((WITH_DEBUG & (1 << (idx))) != 0 \
- && CPU_DEBUG_FLAGS (cpu)[idx] != 0)
-
-/* Non-zero if "--debug-insn" specified. */
-#define DEBUG_INSN_P(cpu) DEBUG_P (cpu, DEBUG_INSN_IDX)
-
-extern void debug_printf PARAMS ((sim_cpu *, const char *, ...))
- __attribute__((format (printf, 2, 3)));
-
-#endif /* SIM_TRACE_H */
diff --git a/sim/common/sim-types.h b/sim/common/sim-types.h
deleted file mode 100644
index afd008faaa4..00000000000
--- a/sim/common/sim-types.h
+++ /dev/null
@@ -1,209 +0,0 @@
-/* This file is part of psim (model of the PowerPC(tm) architecture)
-
- Copyright (C) 1994-1997, Andrew Cagney <cagney@highland.com.au>
-
- This library is free software; you can redistribute it and/or
- modify it under the terms of the GNU Library General Public License
- as published by the Free Software Foundation; either version 2 of
- the License, or (at your option) any later version.
-
- This library is distributed in the hope that it will be useful, but
- WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
- Library General Public License for more details.
-
- You should have received a copy of the GNU Library General Public
- License along with this library; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- --
-
- PowerPC is a trademark of International Business Machines Corporation. */
-
-
-#ifndef SIM_TYPES_H
-/* #define SIM_TYPES_H */
-
-/* INTEGER QUANTITIES:
-
- TYPES:
-
- signed* signed type of the given size
- unsigned* The corresponding insigned type
-
- SIZES
-
- *NN Size based on the number of bits
- *_NN Size according to the number of bytes
- *_word Size based on the target architecture's word
- word size (32/64 bits)
- *_cell Size based on the target architecture's
- IEEE 1275 cell size (almost always 32 bits)
-
-*/
-
-
-#if !defined (SIM_TYPES_H) && defined (__GNUC__)
-#define SIM_TYPES_H
-
-/* bit based */
-
-#define UNSIGNED32(X) ((unsigned32) X##UL)
-#define UNSIGNED64(X) ((unsigned64) X##ULL)
-
-#define SIGNED32(X) ((signed32) X##L)
-#define SIGNED64(X) ((signed64) X##LL)
-
-typedef signed int signed8 __attribute__ ((__mode__ (__QI__)));
-typedef signed int signed16 __attribute__ ((__mode__ (__HI__)));
-typedef signed int signed32 __attribute__ ((__mode__ (__SI__)));
-typedef signed int signed64 __attribute__ ((__mode__ (__DI__)));
-
-typedef unsigned int unsigned8 __attribute__ ((__mode__ (__QI__)));
-typedef unsigned int unsigned16 __attribute__ ((__mode__ (__HI__)));
-typedef unsigned int unsigned32 __attribute__ ((__mode__ (__SI__)));
-typedef unsigned int unsigned64 __attribute__ ((__mode__ (__DI__)));
-
-typedef struct { unsigned64 a[2]; } unsigned128;
-typedef struct { signed64 a[2]; } signed128;
-
-#endif
-
-
-#if !defined (SIM_TYPES_H) && defined (_MSC_VER)
-#define SIM_TYPES_H
-
-/* bit based */
-
-#define UNSIGNED32(X) (X##ui32)
-#define UNSIGNED64(X) (X##ui64)
-
-#define SIGNED32(X) (X##i32)
-#define SIGNED64(X) (X##i64)
-
-typedef signed char signed8;
-typedef signed short signed16;
-typedef signed int signed32;
-typedef signed __int64 signed64;
-
-typedef unsigned int unsigned8;
-typedef unsigned int unsigned16;
-typedef unsigned int unsigned32;
-typedef unsigned __int64 unsigned64;
-
-typedef struct { unsigned64 a[2]; } unsigned128;
-typedef struct { signed64 a[2]; } signed128;
-
-#endif /* _MSC_VER */
-
-
-#if !defined (SIM_TYPES_H)
-#define SIM_TYPES_H
-
-/* bit based */
-
-#define UNSIGNED32(X) (X##UL)
-#define UNSIGNED64(X) (X##ULL)
-
-#define SIGNED32(X) (X##L)
-#define SIGNED64(X) (X##LL)
-
-typedef signed char signed8;
-typedef signed short signed16;
-#if defined (__ALPHA__)
-typedef signed int unsigned32;
-typedef signed long unsigned64;
-#else
-typedef signed long unsigned32;
-typedef signed long long unsigned64;
-#endif
-
-typedef unsigned char unsigned8;
-typedef unsigned short unsigned16;
-#if defined (__ALPHA__)
-typedef unsigned int unsigned32;
-typedef unsigned long unsigned64;
-#else
-typedef unsigned long unsigned32;
-typedef unsigned long long unsigned64;
-#endif
-
-typedef struct { unsigned64 a[2]; } unsigned128;
-typedef struct { signed64 a[2]; } signed128;
-
-#endif
-
-
-/* byte based */
-
-typedef signed8 signed_1;
-typedef signed16 signed_2;
-typedef signed32 signed_4;
-typedef signed64 signed_8;
-typedef signed128 signed_16;
-
-typedef unsigned8 unsigned_1;
-typedef unsigned16 unsigned_2;
-typedef unsigned32 unsigned_4;
-typedef unsigned64 unsigned_8;
-typedef unsigned128 unsigned_16;
-
-
-/* for general work, the following are defined */
-/* unsigned: >= 32 bits */
-/* signed: >= 32 bits */
-/* long: >= 32 bits, sign undefined */
-/* int: small indicator */
-
-/* target architecture based */
-#if (WITH_TARGET_WORD_BITSIZE == 64)
-typedef unsigned64 unsigned_word;
-typedef signed64 signed_word;
-#endif
-#if (WITH_TARGET_WORD_BITSIZE == 32)
-typedef unsigned32 unsigned_word;
-typedef signed32 signed_word;
-#endif
-#if (WITH_TARGET_WORD_BITSIZE == 16)
-typedef unsigned16 unsigned_word;
-typedef signed16 signed_word;
-#endif
-
-
-/* Other instructions */
-#if (WITH_TARGET_ADDRESS_BITSIZE == 64)
-typedef unsigned64 unsigned_address;
-typedef signed64 signed_address;
-#endif
-#if (WITH_TARGET_ADDRESS_BITSIZE == 32)
-typedef unsigned32 unsigned_address;
-typedef signed32 signed_address;
-#endif
-#if (WITH_TARGET_ADDRESS_BITSIZE == 16)
-typedef unsigned16 unsigned_address;
-typedef signed16 signed_address;
-#endif
-typedef unsigned_address address_word;
-
-
-/* IEEE 1275 cell size */
-#if (WITH_TARGET_CELL_BITSIZE == 64)
-typedef unsigned64 unsigned_cell;
-typedef signed64 signed_cell;
-#endif
-#if (WITH_TARGET_CELL_BITSIZE == 32)
-typedef unsigned32 unsigned_cell;
-typedef signed32 signed_cell;
-#endif
-typedef signed_cell cell_word; /* cells are normally signed */
-
-
-/* Floating point registers */
-#if (WITH_TARGET_FLOATING_POINT_BITSIZE == 64)
-typedef unsigned64 fp_word;
-#endif
-#if (WITH_TARGET_FLOATING_POINT_BITSIZE == 32)
-typedef unsigned32 fp_word;
-#endif
-
-#endif
diff --git a/sim/common/sim-utils.c b/sim/common/sim-utils.c
deleted file mode 100644
index 6184f1b10eb..00000000000
--- a/sim/common/sim-utils.c
+++ /dev/null
@@ -1,413 +0,0 @@
-/* Miscellaneous simulator utilities.
- Copyright (C) 1997, 1998 Free Software Foundation, Inc.
- Contributed by Cygnus Support.
-
-This file is part of GDB, the GNU debugger.
-
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License along
-with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
-
-#include "sim-main.h"
-#include "sim-assert.h"
-
-#ifdef HAVE_STDLIB_H
-#include <stdlib.h>
-#endif
-
-#ifdef HAVE_TIME_H
-#include <time.h>
-#endif
-
-#ifdef HAVE_SYS_TIME_H
-#include <sys/time.h> /* needed by sys/resource.h */
-#endif
-
-#ifdef HAVE_SYS_RESOURCE_H
-#include <sys/resource.h>
-#endif
-
-#ifdef HAVE_STRING_H
-#include <string.h>
-#else
-#ifdef HAVE_STRINGS_H
-#include <strings.h>
-#endif
-#endif
-
-#include "libiberty.h"
-#include "bfd.h"
-#include "sim-utils.h"
-
-/* Global pointer to all state data.
- Set by sim_resume. */
-struct sim_state *current_state;
-
-/* Allocate zero filled memory with xmalloc - xmalloc aborts of the
- allocation fails. */
-
-void *
-zalloc (unsigned long size)
-{
- void *memory = (void *) xmalloc (size);
- memset (memory, 0, size);
- return memory;
-}
-
-void
-zfree (void *data)
-{
- free (data);
-}
-
-/* Allocate a sim_state struct. */
-
-SIM_DESC
-sim_state_alloc (SIM_OPEN_KIND kind,
- host_callback *callback)
-{
- SIM_DESC sd = ZALLOC (struct sim_state);
-
- STATE_MAGIC (sd) = SIM_MAGIC_NUMBER;
- STATE_CALLBACK (sd) = callback;
- STATE_OPEN_KIND (sd) = kind;
-
-#if 0
- {
- int cpu_nr;
-
- /* Initialize the back link from the cpu struct to the state struct. */
- /* ??? I can envision a design where the state struct contains an array
- of pointers to cpu structs, rather than an array of structs themselves.
- Implementing this is trickier as one may not know what to allocate until
- one has parsed the args. Parsing the args twice wouldn't be unreasonable,
- IMHO. If the state struct ever does contain an array of pointers then we
- can't do this here.
- ??? See also sim_post_argv_init*/
- for (cpu_nr = 0; cpu_nr < MAX_NR_PROCESSORS; cpu_nr++)
- {
- CPU_STATE (STATE_CPU (sd, cpu_nr)) = sd;
- CPU_INDEX (STATE_CPU (sd, cpu_nr)) = cpu_nr;
- }
- }
-#endif
-
-#ifdef SIM_STATE_INIT
- SIM_STATE_INIT (sd);
-#endif
-
- return sd;
-}
-
-/* Free a sim_state struct. */
-
-void
-sim_state_free (SIM_DESC sd)
-{
- ASSERT (sd->base.magic == SIM_MAGIC_NUMBER);
-
-#ifdef SIM_STATE_FREE
- SIM_STATE_FREE (sd);
-#endif
-
- zfree (sd);
-}
-
-/* Return a pointer to the cpu data for CPU_NAME, or NULL if not found. */
-
-sim_cpu *
-sim_cpu_lookup (SIM_DESC sd, const char *cpu_name)
-{
- int i;
-
- for (i = 0; i < MAX_NR_PROCESSORS; ++i)
- if (strcmp (cpu_name, CPU_NAME (STATE_CPU (sd, i))) == 0)
- return STATE_CPU (sd, i);
- return NULL;
-}
-
-/* Return the prefix to use for a CPU specific message (typically an
- error message). */
-
-const char *
-sim_cpu_msg_prefix (sim_cpu *cpu)
-{
-#if MAX_NR_PROCESSORS == 1
- return "";
-#else
- static char *prefix;
-
- if (prefix == NULL)
- {
- int maxlen = 0;
- for (i = 0; i < MAX_NR_PROCESSORS; ++i)
- {
- int len = strlen (CPU_NAME (STATE_CPU (sd, i)));
- if (len > maxlen)
- maxlen = len;
- }
- prefix = (char *) xmalloc (maxlen + 5);
- }
- sprintf (prefix, "%s: ", CPU_NAME (cpu));
- return prefix;
-#endif
-}
-
-/* Cover fn to sim_io_eprintf. */
-
-void
-sim_io_eprintf_cpu (sim_cpu *cpu, const char *fmt, ...)
-{
- SIM_DESC sd = CPU_STATE (cpu);
- va_list ap;
-
- va_start (ap, fmt);
- sim_io_eprintf (sd, sim_cpu_msg_prefix (cpu));
- sim_io_evprintf (sd, fmt, ap);
- va_end (ap);
-}
-
-/* Turn VALUE into a string with commas. */
-
-char *
-sim_add_commas (char *buf, int sizeof_buf, unsigned long value)
-{
- int comma = 3;
- char *endbuf = buf + sizeof_buf - 1;
-
- *--endbuf = '\0';
- do {
- if (comma-- == 0)
- {
- *--endbuf = ',';
- comma = 2;
- }
-
- *--endbuf = (value % 10) + '0';
- } while ((value /= 10) != 0);
-
- return endbuf;
-}
-
-/* Analyze PROG_NAME/PROG_BFD and set these fields in the state struct:
- STATE_ARCHITECTURE, if not set already and can be determined from the bfd
- STATE_PROG_BFD
- STATE_START_ADDR
- STATE_TEXT_SECTION
- STATE_TEXT_START
- STATE_TEXT_END
-
- PROG_NAME is the file name of the executable or NULL.
- PROG_BFD is its bfd or NULL.
-
- If both PROG_NAME and PROG_BFD are NULL, this function returns immediately.
- If PROG_BFD is not NULL, PROG_NAME is ignored.
-
- Implicit inputs: STATE_MY_NAME(sd), STATE_TARGET(sd),
- STATE_ARCHITECTURE(sd).
-
- A new bfd is created so the app isn't required to keep its copy of the
- bfd open. */
-
-SIM_RC
-sim_analyze_program (sd, prog_name, prog_bfd)
- SIM_DESC sd;
- char *prog_name;
- bfd *prog_bfd;
-{
- asection *s;
- SIM_ASSERT (STATE_MAGIC (sd) == SIM_MAGIC_NUMBER);
-
- if (prog_bfd != NULL)
- {
- if (prog_bfd == STATE_PROG_BFD (sd))
- /* already analyzed */
- return SIM_RC_OK;
- else
- /* duplicate needed, save the name of the file to be re-opened */
- prog_name = bfd_get_filename (prog_bfd);
- }
-
- /* do we need to duplicate anything? */
- if (prog_name == NULL)
- return SIM_RC_OK;
-
- /* open a new copy of the prog_bfd */
- prog_bfd = bfd_openr (prog_name, STATE_TARGET (sd));
- if (prog_bfd == NULL)
- {
- sim_io_eprintf (sd, "%s: can't open \"%s\": %s\n",
- STATE_MY_NAME (sd),
- prog_name,
- bfd_errmsg (bfd_get_error ()));
- return SIM_RC_FAIL;
- }
- if (!bfd_check_format (prog_bfd, bfd_object))
- {
- sim_io_eprintf (sd, "%s: \"%s\" is not an object file: %s\n",
- STATE_MY_NAME (sd),
- prog_name,
- bfd_errmsg (bfd_get_error ()));
- bfd_close (prog_bfd);
- return SIM_RC_FAIL;
- }
- if (STATE_ARCHITECTURE (sd) != NULL)
- bfd_set_arch_info (prog_bfd, STATE_ARCHITECTURE (sd));
- else
- {
- if (bfd_get_arch (prog_bfd) != bfd_arch_unknown
- && bfd_get_arch (prog_bfd) != bfd_arch_obscure)
- {
- STATE_ARCHITECTURE (sd) = bfd_get_arch_info (prog_bfd);
- }
- }
-
- /* update the sim structure */
- if (STATE_PROG_BFD (sd) != NULL)
- bfd_close (STATE_PROG_BFD (sd));
- STATE_PROG_BFD (sd) = prog_bfd;
- STATE_START_ADDR (sd) = bfd_get_start_address (prog_bfd);
-
- for (s = prog_bfd->sections; s; s = s->next)
- if (strcmp (bfd_get_section_name (prog_bfd, s), ".text") == 0)
- {
- STATE_TEXT_SECTION (sd) = s;
- STATE_TEXT_START (sd) = bfd_get_section_vma (prog_bfd, s);
- STATE_TEXT_END (sd) = STATE_TEXT_START (sd) + bfd_section_size (prog_bfd, s);
- break;
- }
-
- bfd_cache_close (prog_bfd);
-
- return SIM_RC_OK;
-}
-
-/* Simulator timing support. */
-
-/* Called before sim_elapsed_time_since to get a reference point. */
-
-SIM_ELAPSED_TIME
-sim_elapsed_time_get ()
-{
-#ifdef HAVE_GETRUSAGE
- struct rusage mytime;
- if (getrusage (RUSAGE_SELF, &mytime) == 0)
- return 1 + (SIM_ELAPSED_TIME) (((double) mytime.ru_utime.tv_sec * 1000) + (((double) mytime.ru_utime.tv_usec + 500) / 1000));
- return 1;
-#else
-#ifdef HAVE_TIME
- return 1 + (SIM_ELAPSED_TIME) time ((time_t) 0);
-#else
- return 1;
-#endif
-#endif
-}
-
-/* Return the elapsed time in milliseconds since START.
- The actual time may be cpu usage (prefered) or wall clock. */
-
-unsigned long
-sim_elapsed_time_since (start)
- SIM_ELAPSED_TIME start;
-{
-#ifdef HAVE_GETRUSAGE
- return sim_elapsed_time_get () - start;
-#else
-#ifdef HAVE_TIME
- return (sim_elapsed_time_get () - start) * 1000;
-#else
- return 0;
-#endif
-#endif
-}
-
-
-
-/* do_command but with printf style formatting of the arguments */
-void
-sim_do_commandf (SIM_DESC sd,
- const char *fmt,
- ...)
-{
- va_list ap;
- char *buf;
- va_start (ap, fmt);
- vasprintf (&buf, fmt, ap);
- sim_do_command (sd, buf);
- va_end (ap);
- free (buf);
-}
-
-
-/* sim-basics.h defines a number of enumerations, convert each of them
- to a string representation */
-const char *
-map_to_str (unsigned map)
-{
- switch (map)
- {
- case read_map: return "read";
- case write_map: return "write";
- case exec_map: return "exec";
- case io_map: return "io";
- default:
- {
- static char str[10];
- sprintf (str, "(%ld)", (long) map);
- return str;
- }
- }
-}
-
-const char *
-access_to_str (unsigned access)
-{
- switch (access)
- {
- case access_invalid: return "invalid";
- case access_read: return "read";
- case access_write: return "write";
- case access_exec: return "exec";
- case access_io: return "io";
- case access_read_write: return "read_write";
- case access_read_exec: return "read_exec";
- case access_write_exec: return "write_exec";
- case access_read_write_exec: return "read_write_exec";
- case access_read_io: return "read_io";
- case access_write_io: return "write_io";
- case access_read_write_io: return "read_write_io";
- case access_exec_io: return "exec_io";
- case access_read_exec_io: return "read_exec_io";
- case access_write_exec_io: return "write_exec_io";
- case access_read_write_exec_io: return "read_write_exec_io";
- default:
- {
- static char str[10];
- sprintf (str, "(%ld)", (long) access);
- return str;
- }
- }
-}
-
-const char *
-transfer_to_str (unsigned transfer)
-{
- switch (transfer)
- {
- case read_transfer: return "read";
- case write_transfer: return "write";
- default: return "(error)";
- }
-}
-
-
diff --git a/sim/common/sim-utils.h b/sim/common/sim-utils.h
deleted file mode 100644
index 8e80e6a2cbe..00000000000
--- a/sim/common/sim-utils.h
+++ /dev/null
@@ -1,90 +0,0 @@
-/* Miscellaneous simulator utilities.
- Copyright (C) 1997 Free Software Foundation, Inc.
- Contributed by Cygnus Support.
-
-This file is part of GDB, the GNU debugger.
-
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License along
-with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
-
-#ifndef SIM_UTILS_H
-#define SIM_UTILS_H
-
-/* Memory management with an allocator that clears memory before use. */
-
-void *zalloc (unsigned long size);
-
-#define ZALLOC(TYPE) (TYPE*)zalloc(sizeof (TYPE))
-#define NZALLOC(TYPE,N) (TYPE*)zalloc(sizeof (TYPE) * (N))
-
-void zfree(void*);
-
-/* Turn VALUE into a string with commas. */
-char *sim_add_commas (char *, int, unsigned long);
-
-/* Utilities for elapsed time reporting. */
-
-/* Opaque type, known only inside sim_elapsed_time_foo fns. Externally
- it is known to never have the value zero. */
-typedef unsigned long SIM_ELAPSED_TIME;
-
-
-/* Get reference point for future call to sim_time_elapsed. */
-SIM_ELAPSED_TIME sim_elapsed_time_get (void);
-
-/* Elapsed time in milliseconds since START. */
-unsigned long sim_elapsed_time_since (SIM_ELAPSED_TIME start);
-
-/* Utilities for manipulating the load image. */
-
-SIM_RC sim_analyze_program (SIM_DESC sd, char *prog_name,
- struct _bfd *prog_bfd);
-
-/* Load program PROG into the simulator using the function DO_LOAD.
- If PROG_BFD is non-NULL, the file has already been opened.
- If VERBOSE_P is non-zero statistics are printed of each loaded section
- and the transfer rate (for consistency with gdb).
- If LMA_P is non-zero the program sections are loaded at the LMA
- rather than the VMA
- If this fails an error message is printed and NULL is returned.
- If it succeeds the bfd is returned.
- NOTE: For historical reasons, older hardware simulators incorrectly
- write the program sections at LMA interpreted as a virtual address.
- This is still accommodated for backward compatibility reasons. */
-
-typedef int sim_write_fn PARAMS ((SIM_DESC sd, SIM_ADDR mem,
- unsigned char *buf, int length));
-struct _bfd *sim_load_file (SIM_DESC sd, const char *myname,
- host_callback *callback, char *prog,
- struct _bfd *prog_bfd, int verbose_p,
- int lma_p, sim_write_fn do_load);
-
-/* Internal version of sim_do_command, include formatting */
-void sim_do_commandf (SIM_DESC sd, const char *fmt, ...);
-
-
-/* These are defined in callback.c as cover functions to the vprintf
- callbacks. */
-
-void sim_cb_printf (host_callback *, const char *, ...);
-void sim_cb_eprintf (host_callback *, const char *, ...);
-
-
-/* sim-basics.h defines a number of enumerations, convert each of them
- to a string representation */
-const char *map_to_str (unsigned map);
-const char *access_to_str (unsigned access);
-const char *transfer_to_str (unsigned transfer);
-
-#endif
diff --git a/sim/common/sim-watch.c b/sim/common/sim-watch.c
deleted file mode 100644
index 75c9ad19f02..00000000000
--- a/sim/common/sim-watch.c
+++ /dev/null
@@ -1,458 +0,0 @@
-/* Generic simulator watchpoint support.
- Copyright (C) 1997 Free Software Foundation, Inc.
- Contributed by Cygnus Support.
-
-This file is part of GDB, the GNU debugger.
-
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License along
-with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
-
-#include "sim-main.h"
-#include "sim-options.h"
-
-#include "sim-assert.h"
-
-#include <ctype.h>
-
-#ifdef HAVE_STRING_H
-#include <string.h>
-#else
-#ifdef HAVE_STRINGS_H
-#include <strings.h>
-#endif
-#endif
-
-#ifdef HAVE_STDLIB_H
-#include <stdlib.h>
-#endif
-
-enum {
- OPTION_WATCH_DELETE = OPTION_START,
-
- OPTION_WATCH_INFO,
- OPTION_WATCH_CLOCK,
- OPTION_WATCH_CYCLES,
- OPTION_WATCH_PC,
-
- OPTION_WATCH_OP,
-};
-
-
-/* Break an option number into its op/int-nr */
-static watchpoint_type
-option_to_type (SIM_DESC sd,
- int option)
-{
- sim_watchpoints *watch = STATE_WATCHPOINTS (sd);
- watchpoint_type type = ((option - OPTION_WATCH_OP)
- / (watch->nr_interrupts + 1));
- SIM_ASSERT (type >= 0 && type < nr_watchpoint_types);
- return type;
-}
-
-static int
-option_to_interrupt_nr (SIM_DESC sd,
- int option)
-{
- sim_watchpoints *watch = STATE_WATCHPOINTS (sd);
- int interrupt_nr = ((option - OPTION_WATCH_OP)
- % (watch->nr_interrupts + 1));
- return interrupt_nr;
-}
-
-static int
-type_to_option (SIM_DESC sd,
- watchpoint_type type,
- int interrupt_nr)
-{
- sim_watchpoints *watch = STATE_WATCHPOINTS (sd);
- return ((type * (watch->nr_interrupts + 1))
- + interrupt_nr
- + OPTION_WATCH_OP);
-}
-
-
-/* Delete one or more watchpoints. Fail if no watchpoints were found */
-
-static SIM_RC
-do_watchpoint_delete (SIM_DESC sd,
- int ident,
- watchpoint_type type)
-{
- sim_watchpoints *watch = STATE_WATCHPOINTS (sd);
- sim_watch_point **entry = &watch->points;
- SIM_RC status = SIM_RC_FAIL;
- while ((*entry) != NULL)
- {
- if ((*entry)->ident == ident
- || (*entry)->type == type)
- {
- sim_watch_point *dead = (*entry);
- (*entry) = (*entry)->next;
- sim_events_deschedule (sd, dead->event);
- zfree (dead);
- status = SIM_RC_OK;
- }
- else
- entry = &(*entry)->next;
- }
- return status;
-}
-
-static char *
-watchpoint_type_to_str (SIM_DESC sd,
- watchpoint_type type)
-{
- switch (type)
- {
- case pc_watchpoint:
- return "pc";
- case clock_watchpoint:
- return "clock";
- case cycles_watchpoint:
- return "cycles";
- case invalid_watchpoint:
- case nr_watchpoint_types:
- return "(invalid-type)";
- }
- return NULL;
-}
-
-static char *
-interrupt_nr_to_str (SIM_DESC sd,
- int interrupt_nr)
-{
- sim_watchpoints *watch = STATE_WATCHPOINTS (sd);
- if (interrupt_nr < 0)
- return "(invalid-interrupt)";
- else if (interrupt_nr >= watch->nr_interrupts)
- return "breakpoint";
- else
- return watch->interrupt_names[interrupt_nr];
-}
-
-
-static void
-do_watchpoint_info (SIM_DESC sd)
-{
- sim_watchpoints *watch = STATE_WATCHPOINTS (sd);
- sim_watch_point *point;
- sim_io_printf (sd, "Watchpoints:\n");
- for (point = watch->points; point != NULL; point = point->next)
- {
- sim_io_printf (sd, "%3d: watch %s %s ",
- point->ident,
- watchpoint_type_to_str (sd, point->type),
- interrupt_nr_to_str (sd, point->interrupt_nr));
- if (point->is_periodic)
- sim_io_printf (sd, "+");
- if (!point->is_within)
- sim_io_printf (sd, "!");
- sim_io_printf (sd, "0x%lx", point->arg0);
- if (point->arg1 != point->arg0)
- sim_io_printf (sd, ",0x%lx", point->arg1);
- sim_io_printf (sd, "\n");
- }
-}
-
-
-
-static sim_event_handler handle_watchpoint;
-
-static SIM_RC
-schedule_watchpoint (SIM_DESC sd,
- sim_watch_point *point)
-{
- sim_watchpoints *watch = STATE_WATCHPOINTS (sd);
- switch (point->type)
- {
- case pc_watchpoint:
- point->event = sim_events_watch_sim (sd,
- watch->pc,
- watch->sizeof_pc,
- 0/* host-endian */,
- point->is_within,
- point->arg0, point->arg1,
- /* PC in arg0..arg1 */
- handle_watchpoint,
- point);
- return SIM_RC_OK;
- case clock_watchpoint:
- point->event = sim_events_watch_clock (sd,
- point->arg0, /* ms time */
- handle_watchpoint,
- point);
- return SIM_RC_OK;
- case cycles_watchpoint:
- point->event = sim_events_schedule (sd,
- point->arg0, /* time */
- handle_watchpoint,
- point);
- return SIM_RC_OK;
- default:
- sim_engine_abort (sd, NULL, NULL_CIA,
- "handle_watchpoint - internal error - bad switch");
- return SIM_RC_FAIL;
- }
- return SIM_RC_OK;
-}
-
-
-static void
-handle_watchpoint (SIM_DESC sd, void *data)
-{
- sim_watchpoints *watch = STATE_WATCHPOINTS (sd);
- sim_watch_point *point = (sim_watch_point *) data;
- int interrupt_nr = point->interrupt_nr;
-
- if (point->is_periodic)
- /* reschedule this event before processing it */
- schedule_watchpoint (sd, point);
- else
- do_watchpoint_delete (sd, point->ident, invalid_watchpoint);
-
- if (point->interrupt_nr == watch->nr_interrupts)
- sim_engine_halt (sd, NULL, NULL, NULL_CIA, sim_stopped, SIM_SIGINT);
- else
- watch->interrupt_handler (sd, &watch->interrupt_names[interrupt_nr]);
-}
-
-
-static SIM_RC
-do_watchpoint_create (SIM_DESC sd,
- watchpoint_type type,
- int opt,
- char *arg)
-{
- sim_watchpoints *watch = STATE_WATCHPOINTS (sd);
- sim_watch_point **point;
-
- /* create the watchpoint */
- point = &watch->points;
- while ((*point) != NULL)
- point = &(*point)->next;
- (*point) = ZALLOC (sim_watch_point);
-
- /* fill in the details */
- (*point)->ident = ++(watch->last_point_nr);
- (*point)->type = option_to_type (sd, opt);
- (*point)->interrupt_nr = option_to_interrupt_nr (sd, opt);
- /* prefixes to arg - +== periodic, !==not or outside */
- (*point)->is_within = 1;
- while (1)
- {
- if (arg[0] == '+')
- (*point)->is_periodic = 1;
- else if (arg[0] == '!')
- (*point)->is_within = 0;
- else
- break;
- arg++;
- }
-
- (*point)->arg0 = strtoul (arg, &arg, 0);
- if (arg[0] == ',')
- (*point)->arg0 = strtoul (arg, NULL, 0);
- else
- (*point)->arg1 = (*point)->arg0;
-
- /* schedule it */
- schedule_watchpoint (sd, (*point));
-
- return SIM_RC_OK;
-}
-
-
-static SIM_RC
-watchpoint_option_handler (SIM_DESC sd, sim_cpu *cpu, int opt,
- char *arg, int is_command)
-{
- if (opt >= OPTION_WATCH_OP)
- return do_watchpoint_create (sd, clock_watchpoint, opt, arg);
- else
- switch (opt)
- {
-
- case OPTION_WATCH_DELETE:
- if (isdigit ((int) arg[0]))
- {
- int ident = strtol (arg, NULL, 0);
- if (do_watchpoint_delete (sd, ident, invalid_watchpoint)
- != SIM_RC_OK)
- {
- sim_io_eprintf (sd, "Watchpoint %d not found\n", ident);
- return SIM_RC_FAIL;
- }
- return SIM_RC_OK;
- }
- else if (strcasecmp (arg, "all") == 0)
- {
- watchpoint_type type;
- for (type = invalid_watchpoint + 1;
- type < nr_watchpoint_types;
- type++)
- {
- do_watchpoint_delete (sd, 0, type);
- }
- return SIM_RC_OK;
- }
- else if (strcasecmp (arg, "pc") == 0)
- {
- if (do_watchpoint_delete (sd, 0, pc_watchpoint)
- != SIM_RC_OK)
- {
- sim_io_eprintf (sd, "No PC watchpoints found\n");
- return SIM_RC_FAIL;
- }
- return SIM_RC_OK;
- }
- else if (strcasecmp (arg, "clock") == 0)
- {
- if (do_watchpoint_delete (sd, 0, clock_watchpoint) != SIM_RC_OK)
- {
- sim_io_eprintf (sd, "No CLOCK watchpoints found\n");
- return SIM_RC_FAIL;
- }
- return SIM_RC_OK;
- }
- else if (strcasecmp (arg, "cycles") == 0)
- {
- if (do_watchpoint_delete (sd, 0, cycles_watchpoint) != SIM_RC_OK)
- {
- sim_io_eprintf (sd, "No CYCLES watchpoints found\n");
- return SIM_RC_FAIL;
- }
- return SIM_RC_OK;
- }
- sim_io_eprintf (sd, "Unknown watchpoint type `%s'\n", arg);
- return SIM_RC_FAIL;
-
- case OPTION_WATCH_INFO:
- {
- do_watchpoint_info (sd);
- return SIM_RC_OK;
- }
-
- default:
- sim_io_eprintf (sd, "Unknown watch option %d\n", opt);
- return SIM_RC_FAIL;
-
- }
-
-}
-
-
-static SIM_RC
-sim_watchpoint_init (SIM_DESC sd)
-{
- sim_watchpoints *watch = STATE_WATCHPOINTS (sd);
- sim_watch_point *point;
- /* NOTE: Do not need to de-schedule any previous watchpoints as
- sim-events has already done this */
- /* schedule any watchpoints enabled by command line options */
- for (point = watch->points; point != NULL; point = point->next)
- {
- schedule_watchpoint (sd, point);
- }
- return SIM_RC_OK;
-}
-
-
-static const OPTION watchpoint_options[] =
-{
- { {"watch-delete", required_argument, NULL, OPTION_WATCH_DELETE },
- '\0', "IDENT|all|pc|cycles|clock", "Delete a watchpoint",
- watchpoint_option_handler },
-
- { {"watch-info", no_argument, NULL, OPTION_WATCH_INFO },
- '\0', NULL, "List scheduled watchpoints",
- watchpoint_option_handler },
-
- { {NULL, no_argument, NULL, 0}, '\0', NULL, NULL, NULL }
-};
-
-static char *default_interrupt_names[] = { "int", 0, };
-
-
-
-SIM_RC
-sim_watchpoint_install (SIM_DESC sd)
-{
- sim_watchpoints *watch = STATE_WATCHPOINTS (sd);
- SIM_ASSERT (STATE_MAGIC (sd) == SIM_MAGIC_NUMBER);
- /* the basic command set */
- sim_module_add_init_fn (sd, sim_watchpoint_init);
- sim_add_option_table (sd, NULL, watchpoint_options);
- /* fill in some details */
- if (watch->interrupt_names == NULL)
- watch->interrupt_names = default_interrupt_names;
- watch->nr_interrupts = 0;
- while (watch->interrupt_names[watch->nr_interrupts] != NULL)
- watch->nr_interrupts++;
- /* generate more advansed commands */
- {
- OPTION *int_options = NZALLOC (OPTION, 1 + (watch->nr_interrupts + 1) * nr_watchpoint_types);
- int interrupt_nr;
- for (interrupt_nr = 0; interrupt_nr <= watch->nr_interrupts; interrupt_nr++)
- {
- watchpoint_type type;
- for (type = 0; type < nr_watchpoint_types; type++)
- {
- char *name;
- int nr = interrupt_nr * nr_watchpoint_types + type;
- OPTION *option = &int_options[nr];
- asprintf (&name, "watch-%s-%s",
- watchpoint_type_to_str (sd, type),
- interrupt_nr_to_str (sd, interrupt_nr));
- option->opt.name = name;
- option->opt.has_arg = required_argument;
- option->opt.val = type_to_option (sd, type, interrupt_nr);
- option->doc = "";
- option->doc_name = "";
- option->handler = watchpoint_option_handler;
- }
- }
- /* adjust first few entries so that they contain real
- documentation, the first entry includes a list of actions. */
- {
- char *prefix =
- "Watch the simulator, take ACTION in COUNT cycles (`+' for every COUNT cycles), ACTION is";
- char *doc;
- int len = strlen (prefix) + 1;
- for (interrupt_nr = 0; interrupt_nr <= watch->nr_interrupts; interrupt_nr++)
- len += strlen (interrupt_nr_to_str (sd, interrupt_nr)) + 1;
- doc = NZALLOC (char, len);
- strcpy (doc, prefix);
- for (interrupt_nr = 0; interrupt_nr <= watch->nr_interrupts; interrupt_nr++)
- {
- strcat (doc, " ");
- strcat (doc, interrupt_nr_to_str (sd, interrupt_nr));
- }
- int_options[0].doc_name = "watch-cycles-ACTION";
- int_options[0].arg = "[+]COUNT";
- int_options[0].doc = doc;
- }
- int_options[1].doc_name = "watch-pc-ACTION";
- int_options[1].arg = "[!]ADDRESS";
- int_options[1].doc =
- "Watch the PC, take ACTION when matches ADDRESS (in range ADDRESS,ADDRESS), `!' negates test";
- int_options[2].doc_name = "watch-clock-ACTION";
- int_options[2].arg = "[+]MILLISECONDS";
- int_options[2].doc =
- "Watch the clock, take ACTION after MILLISECONDS (`+' for every MILLISECONDS)";
-
- sim_add_option_table (sd, NULL, int_options);
- }
- return SIM_RC_OK;
-}
diff --git a/sim/common/sim-watch.h b/sim/common/sim-watch.h
deleted file mode 100644
index ad920d3ecf2..00000000000
--- a/sim/common/sim-watch.h
+++ /dev/null
@@ -1,78 +0,0 @@
-/* Simulator watchpoint support.
- Copyright (C) 1997 Free Software Foundation, Inc.
- Contributed by Cygnus Support.
-
-This file is part of GDB, the GNU debugger.
-
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License along
-with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
-
-
-#ifndef SIM_WATCH_H
-#define SIM_WATCH_H
-
-typedef enum {
- invalid_watchpoint = -1,
- pc_watchpoint,
- clock_watchpoint,
- cycles_watchpoint,
- nr_watchpoint_types,
-} watchpoint_type;
-
-typedef struct _sim_watch_point sim_watch_point;
-struct _sim_watch_point {
- int ident;
- watchpoint_type type;
- int interrupt_nr; /* == nr_interrupts -> breakpoint */
- int is_periodic;
- int is_within;
- unsigned long arg0;
- unsigned long arg1;
- sim_event *event;
- sim_watch_point *next;
-};
-
-
-typedef struct _sim_watchpoints {
-
- /* Pointer into the host's data structures specifying the
- address/size of the program-counter */
- /* FIXME: In the future this shall be generalized so that any of the
- N processors M registers can be watched */
- void *pc;
- int sizeof_pc;
-
- /* Pointer to the handler for interrupt watchpoints */
- /* FIXME: can this be done better? */
- /* NOTE: For the DATA arg, the handler is passed a (char**) pointer
- that is an offset into the INTERRUPT_NAMES vector. Use
- arithmetic to determine the interrupt-nr. */
- sim_event_handler *interrupt_handler;
-
- /* Pointer to a null terminated list of interrupt names */
- /* FIXME: can this be done better? Look at the PPC's interrupt
- mechanism and table for a rough idea of where it will go next */
- int nr_interrupts;
- char **interrupt_names;
-
- /* active watchpoints */
- int last_point_nr;
- sim_watch_point *points;
-
-} sim_watchpoints;
-
-/* Watch install handler. */
-MODULE_INSTALL_FN sim_watchpoint_install;
-
-#endif /* SIM_WATCH_H */
diff --git a/sim/common/syscall.c b/sim/common/syscall.c
deleted file mode 100644
index e0a3b880b84..00000000000
--- a/sim/common/syscall.c
+++ /dev/null
@@ -1,482 +0,0 @@
-/* Remote target system call support.
- Copyright 1997, 1998 Free Software Foundation, Inc.
- Contributed by Cygnus Solutions.
-
- This file is part of GDB.
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with GAS; see the file COPYING. If not, write to the Free Software
- Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
-
-/* This interface isn't intended to be specific to any particular kind
- of remote (hardware, simulator, whatever). As such, support for it
- (e.g. sim/common/callback.c) should *not* live in the simulator source
- tree, nor should it live in the gdb source tree. K&R C must be
- supported. */
-
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-#include "ansidecl.h"
-#include "libiberty.h"
-#ifdef ANSI_PROTOTYPES
-#include <stdarg.h>
-#else
-#include <varargs.h>
-#endif
-#include <stdio.h>
-#ifdef HAVE_STDLIB_H
-#include <stdlib.h>
-#endif
-#ifdef HAVE_UNISTD_H
-#include <unistd.h>
-#endif
-#include <errno.h>
-#include <fcntl.h>
-#include <time.h>
-#include <sys/types.h>
-#include <sys/stat.h>
-#include "callback.h"
-#include "targ-vals.h"
-
-#ifndef ENOSYS
-#define ENOSYS EINVAL
-#endif
-#ifndef ENAMETOOLONG
-#define ENAMETOOLONG EINVAL
-#endif
-
-/* Maximum length of a path name. */
-#ifndef MAX_PATH_LEN
-#define MAX_PATH_LEN 1024
-#endif
-
-/* When doing file read/writes, do this many bytes at a time. */
-#define FILE_XFR_SIZE 4096
-
-/* FIXME: for now, need to consider target word size. */
-#define TWORD long
-#define TADDR unsigned long
-
-/* Utility of cb_syscall to fetch a path name or other string from the target.
- The result is 0 for success or a host errno value. */
-
-static int
-get_string (cb, sc, buf, buflen, addr)
- host_callback *cb;
- CB_SYSCALL *sc;
- char *buf;
- int buflen;
- TADDR addr;
-{
- char *p, *pend;
-
- for (p = buf, pend = buf + buflen; p < pend; ++p, ++addr)
- {
- /* No, it isn't expected that this would cause one transaction with
- the remote target for each byte. The target could send the
- path name along with the syscall request, and cache the file
- name somewhere (or otherwise tweak this as desired). */
- unsigned int count = (*sc->read_mem) (cb, sc, addr, p, 1);
-
- if (count != 1)
- return EINVAL;
- if (*p == 0)
- break;
- }
- if (p == pend)
- return ENAMETOOLONG;
- return 0;
-}
-
-/* Utility of cb_syscall to fetch a path name.
- The buffer is malloc'd and the address is stored in BUFP.
- The result is that of get_string.
- If an error occurs, no buffer is left malloc'd. */
-
-static int
-get_path (cb, sc, addr, bufp)
- host_callback *cb;
- CB_SYSCALL *sc;
- TADDR addr;
- char **bufp;
-{
- char *buf = xmalloc (MAX_PATH_LEN);
- int result;
-
- result = get_string (cb, sc, buf, MAX_PATH_LEN, addr);
- if (result == 0)
- *bufp = buf;
- else
- free (buf);
- return result;
-}
-
-/* Perform a system call on behalf of the target. */
-
-CB_RC
-cb_syscall (cb, sc)
- host_callback *cb;
- CB_SYSCALL *sc;
-{
- TWORD result = 0, errcode = 0;
-
- if (sc->magic != CB_SYSCALL_MAGIC)
- abort ();
-
- switch (cb_target_to_host_syscall (cb, sc->func))
- {
-#if 0 /* FIXME: wip */
- case CB_SYS_argvlen :
- {
- /* Compute how much space is required to store the argv,envp
- strings so that the program can allocate the space and then
- call SYS_argv to fetch the values. */
- int addr_size = cb->addr_size;
- int argc,envc,arglen,envlen;
- const char **argv = cb->init_argv;
- const char **envp = cb->init_envp;
-
- argc = arglen = 0;
- if (argv)
- {
- for ( ; argv[argc]; ++argc)
- arglen += strlen (argv[argc]) + 1;
- }
- envc = envlen = 0;
- if (envp)
- {
- for ( ; envp[envc]; ++envc)
- envlen += strlen (envp[envc]) + 1;
- }
- result = arglen + envlen;
- break;
- }
-
- case CB_SYS_argv :
- {
- /* Pointer to target's buffer. */
- TADDR tbuf = sc->arg1;
- /* Buffer size. */
- int bufsize = sc->arg2;
- /* Q is the target address of where all the strings go. */
- TADDR q;
- int word_size = cb->word_size;
- int i,argc,envc,len;
- const char **argv = cb->init_argv;
- const char **envp = cb->init_envp;
-
- argc = 0;
- if (argv)
- {
- for ( ; argv[argc]; ++argc)
- {
- int len = strlen (argv[argc]);
- int written = (*sc->write_mem) (cb, sc, tbuf, argv[argc], len + 1);
- if (written != len)
- {
- result = -1;
- errcode = EINVAL;
- goto FinishSyscall;
- }
- tbuf = len + 1;
- }
- }
- if ((*sc->write_mem) (cb, sc, tbuf, "", 1) != 1)
- {
- result = -1;
- errcode = EINVAL;
- goto FinishSyscall;
- }
- tbuf++;
- envc = 0;
- if (envp)
- {
- for ( ; envp[envc]; ++envc)
- {
- int len = strlen (envp[envc]);
- int written = (*sc->write_mem) (cb, sc, tbuf, envp[envc], len + 1);
- if (written != len)
- {
- result = -1;
- errcode = EINVAL;
- goto FinishSyscall;
- }
- tbuf = len + 1;
- }
- }
- if ((*sc->write_mem) (cb, sc, tbuf, "", 1) != 1)
- {
- result = -1;
- errcode = EINVAL;
- goto FinishSyscall;
- }
- result = argc;
- sc->result2 = envc;
- break;
- }
-#endif /* wip */
-
- case CB_SYS_exit :
- /* Caller must catch and handle. */
- break;
-
- case CB_SYS_open :
- {
- char *path;
-
- errcode = get_path (cb, sc, sc->arg1, &path);
- if (errcode != 0)
- {
- result = -1;
- goto FinishSyscall;
- }
- result = (*cb->open) (cb, path, sc->arg2 /*, sc->arg3*/);
- free (path);
- if (result < 0)
- goto ErrorFinish;
- }
- break;
-
- case CB_SYS_close :
- result = (*cb->close) (cb, sc->arg1);
- if (result < 0)
- goto ErrorFinish;
- break;
-
- case CB_SYS_read :
- {
- /* ??? Perfect handling of error conditions may require only one
- call to cb->read. One can't assume all the data is
- contiguously stored in host memory so that would require
- malloc'ing/free'ing the space. Maybe later. */
- char buf[FILE_XFR_SIZE];
- int fd = sc->arg1;
- TADDR addr = sc->arg2;
- size_t count = sc->arg3;
- size_t bytes_read = 0;
- int bytes_written;
-
- while (count > 0)
- {
- if (fd == 0)
- result = (int) (*cb->read_stdin) (cb, buf,
- (count < FILE_XFR_SIZE
- ? count : FILE_XFR_SIZE));
- else
- result = (int) (*cb->read) (cb, fd, buf,
- (count < FILE_XFR_SIZE
- ? count : FILE_XFR_SIZE));
- if (result == -1)
- goto ErrorFinish;
- if (result == 0) /* EOF */
- break;
- bytes_written = (*sc->write_mem) (cb, sc, addr, buf, result);
- if (bytes_written != result)
- {
- result = -1;
- errcode = EINVAL;
- goto FinishSyscall;
- }
- bytes_read += result;
- count -= result;
- addr += result;
- /* If this is a short read, don't go back for more */
- if (result != FILE_XFR_SIZE)
- break;
- }
- result = bytes_read;
- }
- break;
-
- case CB_SYS_write :
- {
- /* ??? Perfect handling of error conditions may require only one
- call to cb->write. One can't assume all the data is
- contiguously stored in host memory so that would require
- malloc'ing/free'ing the space. Maybe later. */
- char buf[FILE_XFR_SIZE];
- int fd = sc->arg1;
- TADDR addr = sc->arg2;
- size_t count = sc->arg3;
- int bytes_read;
- size_t bytes_written = 0;
-
- while (count > 0)
- {
- int bytes_to_read = count < FILE_XFR_SIZE ? count : FILE_XFR_SIZE;
- bytes_read = (*sc->read_mem) (cb, sc, addr, buf, bytes_to_read);
- if (bytes_read != bytes_to_read)
- {
- result = -1;
- errcode = EINVAL;
- goto FinishSyscall;
- }
- if (fd == 1)
- {
- result = (int) (*cb->write_stdout) (cb, buf, bytes_read);
- (*cb->flush_stdout) (cb);
- }
- else if (fd == 2)
- {
- result = (int) (*cb->write_stderr) (cb, buf, bytes_read);
- (*cb->flush_stderr) (cb);
- }
- else
- result = (int) (*cb->write) (cb, fd, buf, bytes_read);
- if (result == -1)
- goto ErrorFinish;
- bytes_written += result;
- count -= result;
- addr += result;
- }
- result = bytes_written;
- }
- break;
-
- case CB_SYS_lseek :
- {
- int fd = sc->arg1;
- unsigned long offset = sc->arg2;
- int whence = sc->arg3;
-
- result = (*cb->lseek) (cb, fd, offset, whence);
- if (result < 0)
- goto ErrorFinish;
- }
- break;
-
- case CB_SYS_unlink :
- {
- char *path;
-
- errcode = get_path (cb, sc, sc->arg1, &path);
- if (errcode != 0)
- {
- result = -1;
- goto FinishSyscall;
- }
- result = (*cb->unlink) (cb, path);
- free (path);
- if (result < 0)
- goto ErrorFinish;
- }
- break;
-
- case CB_SYS_stat :
- {
- char *path,*buf;
- int buflen;
- struct stat statbuf;
- TADDR addr = sc->arg2;
-
- errcode = get_path (cb, sc, sc->arg1, &path);
- if (errcode != 0)
- {
- result = -1;
- goto FinishSyscall;
- }
- result = (*cb->stat) (cb, path, &statbuf);
- free (path);
- if (result < 0)
- goto ErrorFinish;
- buflen = cb_host_to_target_stat (cb, NULL, NULL);
- buf = xmalloc (buflen);
- if (cb_host_to_target_stat (cb, &statbuf, buf) != buflen)
- {
- /* The translation failed. This is due to an internal
- host program error, not the target's fault. */
- free (buf);
- errcode = ENOSYS;
- result = -1;
- goto FinishSyscall;
- }
- if ((*sc->write_mem) (cb, sc, addr, buf, buflen) != buflen)
- {
- free (buf);
- errcode = EINVAL;
- result = -1;
- goto FinishSyscall;
- }
- free (buf);
- }
- break;
-
- case CB_SYS_fstat :
- {
- char *buf;
- int buflen;
- struct stat statbuf;
- TADDR addr = sc->arg2;
-
- result = (*cb->fstat) (cb, sc->arg1, &statbuf);
- if (result < 0)
- goto ErrorFinish;
- buflen = cb_host_to_target_stat (cb, NULL, NULL);
- buf = xmalloc (buflen);
- if (cb_host_to_target_stat (cb, &statbuf, buf) != buflen)
- {
- /* The translation failed. This is due to an internal
- host program error, not the target's fault. */
- free (buf);
- errcode = ENOSYS;
- result = -1;
- goto FinishSyscall;
- }
- if ((*sc->write_mem) (cb, sc, addr, buf, buflen) != buflen)
- {
- free (buf);
- errcode = EINVAL;
- result = -1;
- goto FinishSyscall;
- }
- free (buf);
- }
- break;
-
- case CB_SYS_time :
- {
- /* FIXME: May wish to change CB_SYS_time to something else.
- We might also want gettimeofday or times, but if system calls
- can be built on others, we can keep the number we have to support
- here down. */
- time_t t = (*cb->time) (cb, (time_t *) 0);
- result = t;
- /* It is up to target code to process the argument to time(). */
- }
- break;
-
- case CB_SYS_chdir :
- case CB_SYS_chmod :
- case CB_SYS_utime :
- /* fall through for now */
-
- default :
- result = -1;
- errcode = ENOSYS;
- break;
- }
-
- FinishSyscall:
- sc->result = result;
- if (errcode == 0)
- sc->errcode = 0;
- else
- sc->errcode = cb_host_to_target_errno (cb, errcode);
- return CB_RC_OK;
-
- ErrorFinish:
- sc->result = result;
- sc->errcode = (*cb->get_errno) (cb);
- return CB_RC_OK;
-}
diff --git a/sim/common/tconfig.in b/sim/common/tconfig.in
deleted file mode 100644
index fd8b5be47fe..00000000000
--- a/sim/common/tconfig.in
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Default target configuration file.
- To override this, create file `tconfig.in' in the simulator's
- source directory. */
-
-/* Define this if the simulator supports profiling.
- See the mips simulator for an example.
- This enables the `-p foo' and `-s bar' options.
- The target is required to provide sim_set_profile{,_size}. */
-/* #define SIM_HAVE_PROFILE */
-
-/* Define this if the simulator uses an instruction cache.
- See the h8/300 simulator for an example.
- This enables the `-c size' option to set the size of the cache.
- The target is required to provide sim_set_simcache_size. */
-/* #define SIM_HAVE_SIMCACHE */
-
-/* Define this if the target cpu is bi-endian
- and the simulator supports it. */
-/* #define SIM_HAVE_BIENDIAN */
diff --git a/sim/configure b/sim/configure
deleted file mode 100755
index 8d324ad74ec..00000000000
--- a/sim/configure
+++ /dev/null
@@ -1,1924 +0,0 @@
-#! /bin/sh
-
-# Guess values for system-dependent variables and create Makefiles.
-# Generated automatically using autoconf version 2.13
-# Copyright (C) 1992, 93, 94, 95, 96 Free Software Foundation, Inc.
-#
-# This configure script is free software; the Free Software Foundation
-# gives unlimited permission to copy, distribute and modify it.
-
-# Defaults:
-ac_help=
-ac_default_prefix=/usr/local
-# Any additions from configure.in:
-ac_help="$ac_help
- --enable-sim "
-
-# Initialize some variables set by options.
-# The variables have the same names as the options, with
-# dashes changed to underlines.
-build=NONE
-cache_file=./config.cache
-exec_prefix=NONE
-host=NONE
-no_create=
-nonopt=NONE
-no_recursion=
-prefix=NONE
-program_prefix=NONE
-program_suffix=NONE
-program_transform_name=s,x,x,
-silent=
-site=
-sitefile=
-srcdir=
-target=NONE
-verbose=
-x_includes=NONE
-x_libraries=NONE
-bindir='${exec_prefix}/bin'
-sbindir='${exec_prefix}/sbin'
-libexecdir='${exec_prefix}/libexec'
-datadir='${prefix}/share'
-sysconfdir='${prefix}/etc'
-sharedstatedir='${prefix}/com'
-localstatedir='${prefix}/var'
-libdir='${exec_prefix}/lib'
-includedir='${prefix}/include'
-oldincludedir='/usr/include'
-infodir='${prefix}/info'
-mandir='${prefix}/man'
-
-# Initialize some other variables.
-subdirs=
-MFLAGS= MAKEFLAGS=
-SHELL=${CONFIG_SHELL-/bin/sh}
-# Maximum number of lines to put in a shell here document.
-ac_max_here_lines=12
-
-ac_prev=
-for ac_option
-do
-
- # If the previous option needs an argument, assign it.
- if test -n "$ac_prev"; then
- eval "$ac_prev=\$ac_option"
- ac_prev=
- continue
- fi
-
- case "$ac_option" in
- -*=*) ac_optarg=`echo "$ac_option" | sed 's/[-_a-zA-Z0-9]*=//'` ;;
- *) ac_optarg= ;;
- esac
-
- # Accept the important Cygnus configure options, so we can diagnose typos.
-
- case "$ac_option" in
-
- -bindir | --bindir | --bindi | --bind | --bin | --bi)
- ac_prev=bindir ;;
- -bindir=* | --bindir=* | --bindi=* | --bind=* | --bin=* | --bi=*)
- bindir="$ac_optarg" ;;
-
- -build | --build | --buil | --bui | --bu)
- ac_prev=build ;;
- -build=* | --build=* | --buil=* | --bui=* | --bu=*)
- build="$ac_optarg" ;;
-
- -cache-file | --cache-file | --cache-fil | --cache-fi \
- | --cache-f | --cache- | --cache | --cach | --cac | --ca | --c)
- ac_prev=cache_file ;;
- -cache-file=* | --cache-file=* | --cache-fil=* | --cache-fi=* \
- | --cache-f=* | --cache-=* | --cache=* | --cach=* | --cac=* | --ca=* | --c=*)
- cache_file="$ac_optarg" ;;
-
- -datadir | --datadir | --datadi | --datad | --data | --dat | --da)
- ac_prev=datadir ;;
- -datadir=* | --datadir=* | --datadi=* | --datad=* | --data=* | --dat=* \
- | --da=*)
- datadir="$ac_optarg" ;;
-
- -disable-* | --disable-*)
- ac_feature=`echo $ac_option|sed -e 's/-*disable-//'`
- # Reject names that are not valid shell variable names.
- if test -n "`echo $ac_feature| sed 's/[-a-zA-Z0-9_]//g'`"; then
- { echo "configure: error: $ac_feature: invalid feature name" 1>&2; exit 1; }
- fi
- ac_feature=`echo $ac_feature| sed 's/-/_/g'`
- eval "enable_${ac_feature}=no" ;;
-
- -enable-* | --enable-*)
- ac_feature=`echo $ac_option|sed -e 's/-*enable-//' -e 's/=.*//'`
- # Reject names that are not valid shell variable names.
- if test -n "`echo $ac_feature| sed 's/[-_a-zA-Z0-9]//g'`"; then
- { echo "configure: error: $ac_feature: invalid feature name" 1>&2; exit 1; }
- fi
- ac_feature=`echo $ac_feature| sed 's/-/_/g'`
- case "$ac_option" in
- *=*) ;;
- *) ac_optarg=yes ;;
- esac
- eval "enable_${ac_feature}='$ac_optarg'" ;;
-
- -exec-prefix | --exec_prefix | --exec-prefix | --exec-prefi \
- | --exec-pref | --exec-pre | --exec-pr | --exec-p | --exec- \
- | --exec | --exe | --ex)
- ac_prev=exec_prefix ;;
- -exec-prefix=* | --exec_prefix=* | --exec-prefix=* | --exec-prefi=* \
- | --exec-pref=* | --exec-pre=* | --exec-pr=* | --exec-p=* | --exec-=* \
- | --exec=* | --exe=* | --ex=*)
- exec_prefix="$ac_optarg" ;;
-
- -gas | --gas | --ga | --g)
- # Obsolete; use --with-gas.
- with_gas=yes ;;
-
- -help | --help | --hel | --he)
- # Omit some internal or obsolete options to make the list less imposing.
- # This message is too long to be a string in the A/UX 3.1 sh.
- cat << EOF
-Usage: configure [options] [host]
-Options: [defaults in brackets after descriptions]
-Configuration:
- --cache-file=FILE cache test results in FILE
- --help print this message
- --no-create do not create output files
- --quiet, --silent do not print \`checking...' messages
- --site-file=FILE use FILE as the site file
- --version print the version of autoconf that created configure
-Directory and file names:
- --prefix=PREFIX install architecture-independent files in PREFIX
- [$ac_default_prefix]
- --exec-prefix=EPREFIX install architecture-dependent files in EPREFIX
- [same as prefix]
- --bindir=DIR user executables in DIR [EPREFIX/bin]
- --sbindir=DIR system admin executables in DIR [EPREFIX/sbin]
- --libexecdir=DIR program executables in DIR [EPREFIX/libexec]
- --datadir=DIR read-only architecture-independent data in DIR
- [PREFIX/share]
- --sysconfdir=DIR read-only single-machine data in DIR [PREFIX/etc]
- --sharedstatedir=DIR modifiable architecture-independent data in DIR
- [PREFIX/com]
- --localstatedir=DIR modifiable single-machine data in DIR [PREFIX/var]
- --libdir=DIR object code libraries in DIR [EPREFIX/lib]
- --includedir=DIR C header files in DIR [PREFIX/include]
- --oldincludedir=DIR C header files for non-gcc in DIR [/usr/include]
- --infodir=DIR info documentation in DIR [PREFIX/info]
- --mandir=DIR man documentation in DIR [PREFIX/man]
- --srcdir=DIR find the sources in DIR [configure dir or ..]
- --program-prefix=PREFIX prepend PREFIX to installed program names
- --program-suffix=SUFFIX append SUFFIX to installed program names
- --program-transform-name=PROGRAM
- run sed PROGRAM on installed program names
-EOF
- cat << EOF
-Host type:
- --build=BUILD configure for building on BUILD [BUILD=HOST]
- --host=HOST configure for HOST [guessed]
- --target=TARGET configure for TARGET [TARGET=HOST]
-Features and packages:
- --disable-FEATURE do not include FEATURE (same as --enable-FEATURE=no)
- --enable-FEATURE[=ARG] include FEATURE [ARG=yes]
- --with-PACKAGE[=ARG] use PACKAGE [ARG=yes]
- --without-PACKAGE do not use PACKAGE (same as --with-PACKAGE=no)
- --x-includes=DIR X include files are in DIR
- --x-libraries=DIR X library files are in DIR
-EOF
- if test -n "$ac_help"; then
- echo "--enable and --with options recognized:$ac_help"
- fi
- exit 0 ;;
-
- -host | --host | --hos | --ho)
- ac_prev=host ;;
- -host=* | --host=* | --hos=* | --ho=*)
- host="$ac_optarg" ;;
-
- -includedir | --includedir | --includedi | --included | --include \
- | --includ | --inclu | --incl | --inc)
- ac_prev=includedir ;;
- -includedir=* | --includedir=* | --includedi=* | --included=* | --include=* \
- | --includ=* | --inclu=* | --incl=* | --inc=*)
- includedir="$ac_optarg" ;;
-
- -infodir | --infodir | --infodi | --infod | --info | --inf)
- ac_prev=infodir ;;
- -infodir=* | --infodir=* | --infodi=* | --infod=* | --info=* | --inf=*)
- infodir="$ac_optarg" ;;
-
- -libdir | --libdir | --libdi | --libd)
- ac_prev=libdir ;;
- -libdir=* | --libdir=* | --libdi=* | --libd=*)
- libdir="$ac_optarg" ;;
-
- -libexecdir | --libexecdir | --libexecdi | --libexecd | --libexec \
- | --libexe | --libex | --libe)
- ac_prev=libexecdir ;;
- -libexecdir=* | --libexecdir=* | --libexecdi=* | --libexecd=* | --libexec=* \
- | --libexe=* | --libex=* | --libe=*)
- libexecdir="$ac_optarg" ;;
-
- -localstatedir | --localstatedir | --localstatedi | --localstated \
- | --localstate | --localstat | --localsta | --localst \
- | --locals | --local | --loca | --loc | --lo)
- ac_prev=localstatedir ;;
- -localstatedir=* | --localstatedir=* | --localstatedi=* | --localstated=* \
- | --localstate=* | --localstat=* | --localsta=* | --localst=* \
- | --locals=* | --local=* | --loca=* | --loc=* | --lo=*)
- localstatedir="$ac_optarg" ;;
-
- -mandir | --mandir | --mandi | --mand | --man | --ma | --m)
- ac_prev=mandir ;;
- -mandir=* | --mandir=* | --mandi=* | --mand=* | --man=* | --ma=* | --m=*)
- mandir="$ac_optarg" ;;
-
- -nfp | --nfp | --nf)
- # Obsolete; use --without-fp.
- with_fp=no ;;
-
- -no-create | --no-create | --no-creat | --no-crea | --no-cre \
- | --no-cr | --no-c)
- no_create=yes ;;
-
- -no-recursion | --no-recursion | --no-recursio | --no-recursi \
- | --no-recurs | --no-recur | --no-recu | --no-rec | --no-re | --no-r)
- no_recursion=yes ;;
-
- -oldincludedir | --oldincludedir | --oldincludedi | --oldincluded \
- | --oldinclude | --oldinclud | --oldinclu | --oldincl | --oldinc \
- | --oldin | --oldi | --old | --ol | --o)
- ac_prev=oldincludedir ;;
- -oldincludedir=* | --oldincludedir=* | --oldincludedi=* | --oldincluded=* \
- | --oldinclude=* | --oldinclud=* | --oldinclu=* | --oldincl=* | --oldinc=* \
- | --oldin=* | --oldi=* | --old=* | --ol=* | --o=*)
- oldincludedir="$ac_optarg" ;;
-
- -prefix | --prefix | --prefi | --pref | --pre | --pr | --p)
- ac_prev=prefix ;;
- -prefix=* | --prefix=* | --prefi=* | --pref=* | --pre=* | --pr=* | --p=*)
- prefix="$ac_optarg" ;;
-
- -program-prefix | --program-prefix | --program-prefi | --program-pref \
- | --program-pre | --program-pr | --program-p)
- ac_prev=program_prefix ;;
- -program-prefix=* | --program-prefix=* | --program-prefi=* \
- | --program-pref=* | --program-pre=* | --program-pr=* | --program-p=*)
- program_prefix="$ac_optarg" ;;
-
- -program-suffix | --program-suffix | --program-suffi | --program-suff \
- | --program-suf | --program-su | --program-s)
- ac_prev=program_suffix ;;
- -program-suffix=* | --program-suffix=* | --program-suffi=* \
- | --program-suff=* | --program-suf=* | --program-su=* | --program-s=*)
- program_suffix="$ac_optarg" ;;
-
- -program-transform-name | --program-transform-name \
- | --program-transform-nam | --program-transform-na \
- | --program-transform-n | --program-transform- \
- | --program-transform | --program-transfor \
- | --program-transfo | --program-transf \
- | --program-trans | --program-tran \
- | --progr-tra | --program-tr | --program-t)
- ac_prev=program_transform_name ;;
- -program-transform-name=* | --program-transform-name=* \
- | --program-transform-nam=* | --program-transform-na=* \
- | --program-transform-n=* | --program-transform-=* \
- | --program-transform=* | --program-transfor=* \
- | --program-transfo=* | --program-transf=* \
- | --program-trans=* | --program-tran=* \
- | --progr-tra=* | --program-tr=* | --program-t=*)
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-
-echo $ac_n "checking build system type""... $ac_c" 1>&6
-echo "configure:872: checking build system type" >&5
-
-build_alias=$build
-case "$build_alias" in
-NONE)
- case $nonopt in
- NONE) build_alias=$host_alias ;;
- *) build_alias=$nonopt ;;
- esac ;;
-esac
-
-build=`${CONFIG_SHELL-/bin/sh} $ac_config_sub $build_alias`
-build_cpu=`echo $build | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\1/'`
-build_vendor=`echo $build | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\2/'`
-build_os=`echo $build | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\3/'`
-echo "$ac_t""$build" 1>&6
-
-if test $host != $build; then
- ac_tool_prefix=${host_alias}-
-else
- ac_tool_prefix=
-fi
-
-# Extract the first word of "${ac_tool_prefix}ar", so it can be a program name with args.
-set dummy ${ac_tool_prefix}ar; ac_word=$2
-echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:898: checking for $ac_word" >&5
-if eval "test \"`echo '$''{'ac_cv_prog_AR'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- if test -n "$AR"; then
- ac_cv_prog_AR="$AR" # Let the user override the test.
-else
- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
- ac_dummy="$PATH"
- for ac_dir in $ac_dummy; do
- test -z "$ac_dir" && ac_dir=.
- if test -f $ac_dir/$ac_word; then
- ac_cv_prog_AR="${ac_tool_prefix}ar"
- break
- fi
- done
- IFS="$ac_save_ifs"
- test -z "$ac_cv_prog_AR" && ac_cv_prog_AR="ar"
-fi
-fi
-AR="$ac_cv_prog_AR"
-if test -n "$AR"; then
- echo "$ac_t""$AR" 1>&6
-else
- echo "$ac_t""no" 1>&6
-fi
-
-
-
-# Extract the first word of "${ac_tool_prefix}ranlib", so it can be a program name with args.
-set dummy ${ac_tool_prefix}ranlib; ac_word=$2
-echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:930: checking for $ac_word" >&5
-if eval "test \"`echo '$''{'ac_cv_prog_RANLIB'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- if test -n "$RANLIB"; then
- ac_cv_prog_RANLIB="$RANLIB" # Let the user override the test.
-else
- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
- ac_dummy="$PATH"
- for ac_dir in $ac_dummy; do
- test -z "$ac_dir" && ac_dir=.
- if test -f $ac_dir/$ac_word; then
- ac_cv_prog_RANLIB="${ac_tool_prefix}ranlib"
- break
- fi
- done
- IFS="$ac_save_ifs"
-fi
-fi
-RANLIB="$ac_cv_prog_RANLIB"
-if test -n "$RANLIB"; then
- echo "$ac_t""$RANLIB" 1>&6
-else
- echo "$ac_t""no" 1>&6
-fi
-
-
-if test -z "$ac_cv_prog_RANLIB"; then
-if test -n "$ac_tool_prefix"; then
- # Extract the first word of "ranlib", so it can be a program name with args.
-set dummy ranlib; ac_word=$2
-echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:962: checking for $ac_word" >&5
-if eval "test \"`echo '$''{'ac_cv_prog_RANLIB'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- if test -n "$RANLIB"; then
- ac_cv_prog_RANLIB="$RANLIB" # Let the user override the test.
-else
- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
- ac_dummy="$PATH"
- for ac_dir in $ac_dummy; do
- test -z "$ac_dir" && ac_dir=.
- if test -f $ac_dir/$ac_word; then
- ac_cv_prog_RANLIB="ranlib"
- break
- fi
- done
- IFS="$ac_save_ifs"
- test -z "$ac_cv_prog_RANLIB" && ac_cv_prog_RANLIB=":"
-fi
-fi
-RANLIB="$ac_cv_prog_RANLIB"
-if test -n "$RANLIB"; then
- echo "$ac_t""$RANLIB" 1>&6
-else
- echo "$ac_t""no" 1>&6
-fi
-
-else
- RANLIB=":"
-fi
-fi
-
-
-ac_aux_dir=
-for ac_dir in `cd $srcdir;pwd`/.. $srcdir/`cd $srcdir;pwd`/..; do
- if test -f $ac_dir/install-sh; then
- ac_aux_dir=$ac_dir
- ac_install_sh="$ac_aux_dir/install-sh -c"
- break
- elif test -f $ac_dir/install.sh; then
- ac_aux_dir=$ac_dir
- ac_install_sh="$ac_aux_dir/install.sh -c"
- break
- fi
-done
-if test -z "$ac_aux_dir"; then
- { echo "configure: error: can not find install-sh or install.sh in `cd $srcdir;pwd`/.. $srcdir/`cd $srcdir;pwd`/.." 1>&2; exit 1; }
-fi
-ac_config_guess=$ac_aux_dir/config.guess
-ac_config_sub=$ac_aux_dir/config.sub
-ac_configure=$ac_aux_dir/configure # This should be Cygnus configure.
-
-
-# Do some error checking and defaulting for the host and target type.
-# The inputs are:
-# configure --host=HOST --target=TARGET --build=BUILD NONOPT
-#
-# The rules are:
-# 1. You are not allowed to specify --host, --target, and nonopt at the
-# same time.
-# 2. Host defaults to nonopt.
-# 3. If nonopt is not specified, then host defaults to the current host,
-# as determined by config.guess.
-# 4. Target and build default to nonopt.
-# 5. If nonopt is not specified, then target and build default to host.
-
-# The aliases save the names the user supplied, while $host etc.
-# will get canonicalized.
-case $host---$target---$nonopt in
-NONE---*---* | *---NONE---* | *---*---NONE) ;;
-*) { echo "configure: error: can only configure for one host and one target at a time" 1>&2; exit 1; } ;;
-esac
-
-
-# Make sure we can run config.sub.
-if ${CONFIG_SHELL-/bin/sh} $ac_config_sub sun4 >/dev/null 2>&1; then :
-else { echo "configure: error: can not run $ac_config_sub" 1>&2; exit 1; }
-fi
-
-echo $ac_n "checking host system type""... $ac_c" 1>&6
-echo "configure:1042: checking host system type" >&5
-
-host_alias=$host
-case "$host_alias" in
-NONE)
- case $nonopt in
- NONE)
- if host_alias=`${CONFIG_SHELL-/bin/sh} $ac_config_guess`; then :
- else { echo "configure: error: can not guess host type; you must specify one" 1>&2; exit 1; }
- fi ;;
- *) host_alias=$nonopt ;;
- esac ;;
-esac
-
-host=`${CONFIG_SHELL-/bin/sh} $ac_config_sub $host_alias`
-host_cpu=`echo $host | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\1/'`
-host_vendor=`echo $host | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\2/'`
-host_os=`echo $host | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\3/'`
-echo "$ac_t""$host" 1>&6
-
-echo $ac_n "checking target system type""... $ac_c" 1>&6
-echo "configure:1063: checking target system type" >&5
-
-target_alias=$target
-case "$target_alias" in
-NONE)
- case $nonopt in
- NONE) target_alias=$host_alias ;;
- *) target_alias=$nonopt ;;
- esac ;;
-esac
-
-target=`${CONFIG_SHELL-/bin/sh} $ac_config_sub $target_alias`
-target_cpu=`echo $target | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\1/'`
-target_vendor=`echo $target | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\2/'`
-target_os=`echo $target | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\3/'`
-echo "$ac_t""$target" 1>&6
-
-echo $ac_n "checking build system type""... $ac_c" 1>&6
-echo "configure:1081: checking build system type" >&5
-
-build_alias=$build
-case "$build_alias" in
-NONE)
- case $nonopt in
- NONE) build_alias=$host_alias ;;
- *) build_alias=$nonopt ;;
- esac ;;
-esac
-
-build=`${CONFIG_SHELL-/bin/sh} $ac_config_sub $build_alias`
-build_cpu=`echo $build | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\1/'`
-build_vendor=`echo $build | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\2/'`
-build_os=`echo $build | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\3/'`
-echo "$ac_t""$build" 1>&6
-
-test "$host_alias" != "$target_alias" &&
- test "$program_prefix$program_suffix$program_transform_name" = \
- NONENONEs,x,x, &&
- program_prefix=${target_alias}-
-
-if test "$program_transform_name" = s,x,x,; then
- program_transform_name=
-else
- # Double any \ or $. echo might interpret backslashes.
- cat <<\EOF_SED > conftestsed
-s,\\,\\\\,g; s,\$,$$,g
-EOF_SED
- program_transform_name="`echo $program_transform_name|sed -f conftestsed`"
- rm -f conftestsed
-fi
-test "$program_prefix" != NONE &&
- program_transform_name="s,^,${program_prefix},; $program_transform_name"
-# Use a double $ so make ignores it.
-test "$program_suffix" != NONE &&
- program_transform_name="s,\$\$,${program_suffix},; $program_transform_name"
-
-# sed with no file args requires a program.
-test "$program_transform_name" = "" && program_transform_name="s,x,x,"
-
-# Extract the first word of "gcc", so it can be a program name with args.
-set dummy gcc; ac_word=$2
-echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:1125: checking for $ac_word" >&5
-if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- if test -n "$CC"; then
- ac_cv_prog_CC="$CC" # Let the user override the test.
-else
- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
- ac_dummy="$PATH"
- for ac_dir in $ac_dummy; do
- test -z "$ac_dir" && ac_dir=.
- if test -f $ac_dir/$ac_word; then
- ac_cv_prog_CC="gcc"
- break
- fi
- done
- IFS="$ac_save_ifs"
-fi
-fi
-CC="$ac_cv_prog_CC"
-if test -n "$CC"; then
- echo "$ac_t""$CC" 1>&6
-else
- echo "$ac_t""no" 1>&6
-fi
-
-if test -z "$CC"; then
- # Extract the first word of "cc", so it can be a program name with args.
-set dummy cc; ac_word=$2
-echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:1155: checking for $ac_word" >&5
-if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- if test -n "$CC"; then
- ac_cv_prog_CC="$CC" # Let the user override the test.
-else
- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
- ac_prog_rejected=no
- ac_dummy="$PATH"
- for ac_dir in $ac_dummy; do
- test -z "$ac_dir" && ac_dir=.
- if test -f $ac_dir/$ac_word; then
- if test "$ac_dir/$ac_word" = "/usr/ucb/cc"; then
- ac_prog_rejected=yes
- continue
- fi
- ac_cv_prog_CC="cc"
- break
- fi
- done
- IFS="$ac_save_ifs"
-if test $ac_prog_rejected = yes; then
- # We found a bogon in the path, so make sure we never use it.
- set dummy $ac_cv_prog_CC
- shift
- if test $# -gt 0; then
- # We chose a different compiler from the bogus one.
- # However, it has the same basename, so the bogon will be chosen
- # first if we set CC to just the basename; use the full file name.
- shift
- set dummy "$ac_dir/$ac_word" "$@"
- shift
- ac_cv_prog_CC="$@"
- fi
-fi
-fi
-fi
-CC="$ac_cv_prog_CC"
-if test -n "$CC"; then
- echo "$ac_t""$CC" 1>&6
-else
- echo "$ac_t""no" 1>&6
-fi
-
- if test -z "$CC"; then
- case "`uname -s`" in
- *win32* | *WIN32*)
- # Extract the first word of "cl", so it can be a program name with args.
-set dummy cl; ac_word=$2
-echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:1206: checking for $ac_word" >&5
-if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- if test -n "$CC"; then
- ac_cv_prog_CC="$CC" # Let the user override the test.
-else
- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
- ac_dummy="$PATH"
- for ac_dir in $ac_dummy; do
- test -z "$ac_dir" && ac_dir=.
- if test -f $ac_dir/$ac_word; then
- ac_cv_prog_CC="cl"
- break
- fi
- done
- IFS="$ac_save_ifs"
-fi
-fi
-CC="$ac_cv_prog_CC"
-if test -n "$CC"; then
- echo "$ac_t""$CC" 1>&6
-else
- echo "$ac_t""no" 1>&6
-fi
- ;;
- esac
- fi
- test -z "$CC" && { echo "configure: error: no acceptable cc found in \$PATH" 1>&2; exit 1; }
-fi
-
-echo $ac_n "checking whether the C compiler ($CC $CFLAGS $LDFLAGS) works""... $ac_c" 1>&6
-echo "configure:1238: checking whether the C compiler ($CC $CFLAGS $LDFLAGS) works" >&5
-
-ac_ext=c
-# CFLAGS is not in ac_cpp because -g, -O, etc. are not valid cpp options.
-ac_cpp='$CPP $CPPFLAGS'
-ac_compile='${CC-cc} -c $CFLAGS $CPPFLAGS conftest.$ac_ext 1>&5'
-ac_link='${CC-cc} -o conftest${ac_exeext} $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS 1>&5'
-cross_compiling=$ac_cv_prog_cc_cross
-
-cat > conftest.$ac_ext << EOF
-
-#line 1249 "configure"
-#include "confdefs.h"
-
-main(){return(0);}
-EOF
-if { (eval echo configure:1254: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- ac_cv_prog_cc_works=yes
- # If we can't run a trivial program, we are probably using a cross compiler.
- if (./conftest; exit) 2>/dev/null; then
- ac_cv_prog_cc_cross=no
- else
- ac_cv_prog_cc_cross=yes
- fi
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- ac_cv_prog_cc_works=no
-fi
-rm -fr conftest*
-ac_ext=c
-# CFLAGS is not in ac_cpp because -g, -O, etc. are not valid cpp options.
-ac_cpp='$CPP $CPPFLAGS'
-ac_compile='${CC-cc} -c $CFLAGS $CPPFLAGS conftest.$ac_ext 1>&5'
-ac_link='${CC-cc} -o conftest${ac_exeext} $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS 1>&5'
-cross_compiling=$ac_cv_prog_cc_cross
-
-echo "$ac_t""$ac_cv_prog_cc_works" 1>&6
-if test $ac_cv_prog_cc_works = no; then
- { echo "configure: error: installation or configuration problem: C compiler cannot create executables." 1>&2; exit 1; }
-fi
-echo $ac_n "checking whether the C compiler ($CC $CFLAGS $LDFLAGS) is a cross-compiler""... $ac_c" 1>&6
-echo "configure:1280: checking whether the C compiler ($CC $CFLAGS $LDFLAGS) is a cross-compiler" >&5
-echo "$ac_t""$ac_cv_prog_cc_cross" 1>&6
-cross_compiling=$ac_cv_prog_cc_cross
-
-echo $ac_n "checking whether we are using GNU C""... $ac_c" 1>&6
-echo "configure:1285: checking whether we are using GNU C" >&5
-if eval "test \"`echo '$''{'ac_cv_prog_gcc'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.c <<EOF
-#ifdef __GNUC__
- yes;
-#endif
-EOF
-if { ac_try='${CC-cc} -E conftest.c'; { (eval echo configure:1294: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }; } | egrep yes >/dev/null 2>&1; then
- ac_cv_prog_gcc=yes
-else
- ac_cv_prog_gcc=no
-fi
-fi
-
-echo "$ac_t""$ac_cv_prog_gcc" 1>&6
-
-if test $ac_cv_prog_gcc = yes; then
- GCC=yes
-else
- GCC=
-fi
-
-ac_test_CFLAGS="${CFLAGS+set}"
-ac_save_CFLAGS="$CFLAGS"
-CFLAGS=
-echo $ac_n "checking whether ${CC-cc} accepts -g""... $ac_c" 1>&6
-echo "configure:1313: checking whether ${CC-cc} accepts -g" >&5
-if eval "test \"`echo '$''{'ac_cv_prog_cc_g'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- echo 'void f(){}' > conftest.c
-if test -z "`${CC-cc} -g -c conftest.c 2>&1`"; then
- ac_cv_prog_cc_g=yes
-else
- ac_cv_prog_cc_g=no
-fi
-rm -f conftest*
-
-fi
-
-echo "$ac_t""$ac_cv_prog_cc_g" 1>&6
-if test "$ac_test_CFLAGS" = set; then
- CFLAGS="$ac_save_CFLAGS"
-elif test $ac_cv_prog_cc_g = yes; then
- if test "$GCC" = yes; then
- CFLAGS="-g -O2"
- else
- CFLAGS="-g"
- fi
-else
- if test "$GCC" = yes; then
- CFLAGS="-O2"
- else
- CFLAGS=
- fi
-fi
-
-
-
-AR=${AR-ar}
-
-# Extract the first word of "ranlib", so it can be a program name with args.
-set dummy ranlib; ac_word=$2
-echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:1351: checking for $ac_word" >&5
-if eval "test \"`echo '$''{'ac_cv_prog_RANLIB'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- if test -n "$RANLIB"; then
- ac_cv_prog_RANLIB="$RANLIB" # Let the user override the test.
-else
- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
- ac_dummy="$PATH"
- for ac_dir in $ac_dummy; do
- test -z "$ac_dir" && ac_dir=.
- if test -f $ac_dir/$ac_word; then
- ac_cv_prog_RANLIB="ranlib"
- break
- fi
- done
- IFS="$ac_save_ifs"
- test -z "$ac_cv_prog_RANLIB" && ac_cv_prog_RANLIB=":"
-fi
-fi
-RANLIB="$ac_cv_prog_RANLIB"
-if test -n "$RANLIB"; then
- echo "$ac_t""$RANLIB" 1>&6
-else
- echo "$ac_t""no" 1>&6
-fi
-
-
-# Put a plausible default for CC_FOR_BUILD in Makefile.
-if test "x$cross_compiling" = "xno"; then
- CC_FOR_BUILD='$(CC)'
-else
- CC_FOR_BUILD=gcc
-fi
-
-
-# If a cpu ever has more than one simulator to choose from, use
-# --enable-sim=... to choose.
-# Check whether --enable-sim or --disable-sim was given.
-if test "${enable_sim+set}" = set; then
- enableval="$enable_sim"
- case "${enableval}" in
-yes | no) ;;
-*) { echo "configure: error: bad value ${enableval} given for --enable-sim option" 1>&2; exit 1; } ;;
-esac
-fi
-
-
-# Assume simulator can be built with cc.
-# If the user passes --enable-sim built it regardless of $(CC).
-only_if_gcc=no
-only_if_enabled=no
-extra_subdirs=common
-
-# WHEN ADDING ENTRIES TO THIS MATRIX:
-# Make sure that the left side always has two dashes. Otherwise you
-# can get spurious matches. Even for unambiguous cases, do this as a
-# convention, else the table becomes a real mess to understand and maintain.
-
-case "${target}" in
- arm*-*-* | thumb*-*-*)
- sim_target=arm
- extra_subdirs="${extra_subdirs} testsuite"
- ;;
- strongarm*-*-*)
- sim_target=arm
- extra_subdirs="${extra_subdirs} testsuite"
- ;;
- xscale-*-*)
- sim_target=arm
- extra_subdirs="${extra_subdirs} testsuite"
- ;;
- d10v-*-*) sim_target=d10v ;;
- d30v-*-*)
- sim_target=d30v
- only_if_gcc=yes
- extra_subdirs="${extra_subdirs} igen"
- ;;
- fr30-*-*) sim_target=fr30 ;;
- h8300*-*-*) sim_target=h8300 ;;
- h8500-*-*) sim_target=h8500 ;;
- i960-*-*) sim_target=i960 ;;
- m32r-*-*) sim_target=m32r ;;
- m68hc11-*-*|m6811-*-*) sim_target=m68hc11 ;;
- mcore-*-*) sim_target=mcore ;;
- mips*-*-*)
- # The MIPS simulator can only be compiled by gcc.
- sim_target=mips
- only_if_gcc=yes
- extra_subdirs="${extra_subdirs} igen"
- ;;
- mn10300*-*-*)
- # The mn10300 simulator can only be compiled by gcc.
- sim_target=mn10300
- only_if_gcc=yes
- extra_subdirs="${extra_subdirs} igen"
- ;;
- mn10200*-*-*)
- sim_target=mn10200
- ;;
- sh*-*-*) sim_target=sh ;;
- powerpc*-*-eabi* | powerpc*-*-solaris* | powerpc*-*-sysv4* | powerpc*-*-elf* | powerpc*-*-linux* )
- # The PowerPC simulator uses the GCC extension long long as well as
- # ANSI prototypes, so don't enable it for random host compilers
- # unless asked to.
- sim_target=ppc
- only_if_gcc=yes
- #extra_subdirs="${extra_subdirs}"
- ;;
- tic80-*-*)
- sim_target=tic80
- only_if_gcc=yes
- extra_subdirs="${extra_subdirs} igen"
- ;;
- v850-*-*)
- # The V850 simulator can only be compiled by gcc.
- sim_target=v850
- extra_subdirs="${extra_subdirs} igen"
- only_if_gcc=yes
- ;;
- v850e-*-*)
- # The V850 simulator can only be compiled by gcc.
- sim_target=v850
- extra_subdirs="${extra_subdirs} igen"
- only_if_gcc=yes
- ;;
- v850ea-*-*)
- # The V850 simulator can only be compiled by gcc.
- sim_target=v850
- extra_subdirs="${extra_subdirs} igen"
- only_if_gcc=yes
- ;;
- w65-*-*)
- sim_target=w65
- # The w65 is suffering from gradual decay.
- only_if_enabled=yes
- ;;
- z8k*-*-*) sim_target=z8k ;;
- sparc64-*-*)
- only_if_gcc=yes
- sim_target=none # Don't build erc32 if sparc64.
- ;;
- sparclite*-*-* | sparc86x*-*-*)
- # The SPARC simulator can only be compiled by gcc.
- only_if_gcc=yes
- sim_target=erc32
- ;;
- sparc*-*-*)
- # The SPARC simulator can only be compiled by gcc.
- only_if_gcc=yes
- # Unfortunately erc32 won't build on many hosts, so only enable
- # it if the user really really wants it.
- only_if_enabled=yes
- sim_target=erc32
- ;;
- *) sim_target=none ;;
-esac
-
-
-# Is there a testsuite directory for the target?
-testdir=`echo ${target} | sed -e 's/-.*-/-/'`
-if test -r ${srcdir}/testsuite/${testdir}/configure ; then
- extra_subdirs="${extra_subdirs} testsuite"
-fi
-
-
-case "${enable_sim}" in
-no) sim_target=none ;;
-yes)
- if test ${only_if_gcc} = yes ; then
- if test "${GCC}" != yes ; then
- echo "Can't enable simulator since not compiling with GCC."
- sim_target=none
- fi
- fi
- ;;
-*)
- if test ${only_if_enabled} = yes ; then
- sim_target=none
- else
- if test ${only_if_gcc} = yes ; then
- if test "${GCC}" != yes ; then
- sim_target=none
- fi
- fi
- fi
- ;;
-esac
-
-if test x"${sim_target}" != xnone ; then
- configdirs="${extra_subdirs} ${sim_target}"
- subdirs="$configdirs"
-
-fi
-
-trap '' 1 2 15
-cat > confcache <<\EOF
-# This file is a shell script that caches the results of configure
-# tests run on this system so they can be shared between configure
-# scripts and configure runs. It is not useful on other systems.
-# If it contains results you don't want to keep, you may remove or edit it.
-#
-# By default, configure uses ./config.cache as the cache file,
-# creating it if it does not exist already. You can give configure
-# the --cache-file=FILE option to use a different cache file; that is
-# what configure does when it calls configure scripts in
-# subdirectories, so they share the cache.
-# Giving --cache-file=/dev/null disables caching, for debugging configure.
-# config.status only pays attention to the cache file if you give it the
-# --recheck option to rerun configure.
-#
-EOF
-# The following way of writing the cache mishandles newlines in values,
-# but we know of no workaround that is simple, portable, and efficient.
-# So, don't put newlines in cache variables' values.
-# Ultrix sh set writes to stderr and can't be redirected directly,
-# and sets the high bit in the cache file unless we assign to the vars.
-(set) 2>&1 |
- case `(ac_space=' '; set | grep ac_space) 2>&1` in
- *ac_space=\ *)
- # `set' does not quote correctly, so add quotes (double-quote substitution
- # turns \\\\ into \\, and sed turns \\ into \).
- sed -n \
- -e "s/'/'\\\\''/g" \
- -e "s/^\\([a-zA-Z0-9_]*_cv_[a-zA-Z0-9_]*\\)=\\(.*\\)/\\1=\${\\1='\\2'}/p"
- ;;
- *)
- # `set' quotes correctly as required by POSIX, so do not add quotes.
- sed -n -e 's/^\([a-zA-Z0-9_]*_cv_[a-zA-Z0-9_]*\)=\(.*\)/\1=${\1=\2}/p'
- ;;
- esac >> confcache
-if cmp -s $cache_file confcache; then
- :
-else
- if test -w $cache_file; then
- echo "updating cache $cache_file"
- cat confcache > $cache_file
- else
- echo "not updating unwritable cache $cache_file"
- fi
-fi
-rm -f confcache
-
-trap 'rm -fr conftest* confdefs* core core.* *.core $ac_clean_files; exit 1' 1 2 15
-
-test "x$prefix" = xNONE && prefix=$ac_default_prefix
-# Let make expand exec_prefix.
-test "x$exec_prefix" = xNONE && exec_prefix='${prefix}'
-
-# Any assignment to VPATH causes Sun make to only execute
-# the first set of double-colon rules, so remove it if not needed.
-# If there is a colon in the path, we need to keep it.
-if test "x$srcdir" = x.; then
- ac_vpsub='/^[ ]*VPATH[ ]*=[^:]*$/d'
-fi
-
-trap 'rm -f $CONFIG_STATUS conftest*; exit 1' 1 2 15
-
-# Transform confdefs.h into DEFS.
-# Protect against shell expansion while executing Makefile rules.
-# Protect against Makefile macro expansion.
-cat > conftest.defs <<\EOF
-s%#define \([A-Za-z_][A-Za-z0-9_]*\) *\(.*\)%-D\1=\2%g
-s%[ `~#$^&*(){}\\|;'"<>?]%\\&%g
-s%\[%\\&%g
-s%\]%\\&%g
-s%\$%$$%g
-EOF
-DEFS=`sed -f conftest.defs confdefs.h | tr '\012' ' '`
-rm -f conftest.defs
-
-
-# Without the "./", some shells look in PATH for config.status.
-: ${CONFIG_STATUS=./config.status}
-
-echo creating $CONFIG_STATUS
-rm -f $CONFIG_STATUS
-cat > $CONFIG_STATUS <<EOF
-#! /bin/sh
-# Generated automatically by configure.
-# Run this file to recreate the current configuration.
-# This directory was configured as follows,
-# on host `(hostname || uname -n) 2>/dev/null | sed 1q`:
-#
-# $0 $ac_configure_args
-#
-# Compiler output produced by configure, useful for debugging
-# configure, is in ./config.log if it exists.
-
-ac_cs_usage="Usage: $CONFIG_STATUS [--recheck] [--version] [--help]"
-for ac_option
-do
- case "\$ac_option" in
- -recheck | --recheck | --rechec | --reche | --rech | --rec | --re | --r)
- echo "running \${CONFIG_SHELL-/bin/sh} $0 $ac_configure_args --no-create --no-recursion"
- exec \${CONFIG_SHELL-/bin/sh} $0 $ac_configure_args --no-create --no-recursion ;;
- -version | --version | --versio | --versi | --vers | --ver | --ve | --v)
- echo "$CONFIG_STATUS generated by autoconf version 2.13"
- exit 0 ;;
- -help | --help | --hel | --he | --h)
- echo "\$ac_cs_usage"; exit 0 ;;
- *) echo "\$ac_cs_usage"; exit 1 ;;
- esac
-done
-
-ac_given_srcdir=$srcdir
-ac_given_INSTALL="$INSTALL"
-
-trap 'rm -fr `echo "Makefile" | sed "s/:[^ ]*//g"` conftest*; exit 1' 1 2 15
-EOF
-cat >> $CONFIG_STATUS <<EOF
-
-# Protect against being on the right side of a sed subst in config.status.
-sed 's/%@/@@/; s/@%/@@/; s/%g\$/@g/; /@g\$/s/[\\\\&%]/\\\\&/g;
- s/@@/%@/; s/@@/@%/; s/@g\$/%g/' > conftest.subs <<\\CEOF
-$ac_vpsub
-$extrasub
-s%@SHELL@%$SHELL%g
-s%@CFLAGS@%$CFLAGS%g
-s%@CPPFLAGS@%$CPPFLAGS%g
-s%@CXXFLAGS@%$CXXFLAGS%g
-s%@FFLAGS@%$FFLAGS%g
-s%@DEFS@%$DEFS%g
-s%@LDFLAGS@%$LDFLAGS%g
-s%@LIBS@%$LIBS%g
-s%@exec_prefix@%$exec_prefix%g
-s%@prefix@%$prefix%g
-s%@program_transform_name@%$program_transform_name%g
-s%@bindir@%$bindir%g
-s%@sbindir@%$sbindir%g
-s%@libexecdir@%$libexecdir%g
-s%@datadir@%$datadir%g
-s%@sysconfdir@%$sysconfdir%g
-s%@sharedstatedir@%$sharedstatedir%g
-s%@localstatedir@%$localstatedir%g
-s%@libdir@%$libdir%g
-s%@includedir@%$includedir%g
-s%@oldincludedir@%$oldincludedir%g
-s%@infodir@%$infodir%g
-s%@mandir@%$mandir%g
-s%@CC@%$CC%g
-s%@INSTALL_PROGRAM@%$INSTALL_PROGRAM%g
-s%@INSTALL_SCRIPT@%$INSTALL_SCRIPT%g
-s%@INSTALL_DATA@%$INSTALL_DATA%g
-s%@host@%$host%g
-s%@host_alias@%$host_alias%g
-s%@host_cpu@%$host_cpu%g
-s%@host_vendor@%$host_vendor%g
-s%@host_os@%$host_os%g
-s%@build@%$build%g
-s%@build_alias@%$build_alias%g
-s%@build_cpu@%$build_cpu%g
-s%@build_vendor@%$build_vendor%g
-s%@build_os@%$build_os%g
-s%@AR@%$AR%g
-s%@RANLIB@%$RANLIB%g
-s%@target@%$target%g
-s%@target_alias@%$target_alias%g
-s%@target_cpu@%$target_cpu%g
-s%@target_vendor@%$target_vendor%g
-s%@target_os@%$target_os%g
-s%@HDEFINES@%$HDEFINES%g
-s%@CC_FOR_BUILD@%$CC_FOR_BUILD%g
-s%@subdirs@%$subdirs%g
-
-CEOF
-EOF
-
-cat >> $CONFIG_STATUS <<\EOF
-
-# Split the substitutions into bite-sized pieces for seds with
-# small command number limits, like on Digital OSF/1 and HP-UX.
-ac_max_sed_cmds=90 # Maximum number of lines to put in a sed script.
-ac_file=1 # Number of current file.
-ac_beg=1 # First line for current file.
-ac_end=$ac_max_sed_cmds # Line after last line for current file.
-ac_more_lines=:
-ac_sed_cmds=""
-while $ac_more_lines; do
- if test $ac_beg -gt 1; then
- sed "1,${ac_beg}d; ${ac_end}q" conftest.subs > conftest.s$ac_file
- else
- sed "${ac_end}q" conftest.subs > conftest.s$ac_file
- fi
- if test ! -s conftest.s$ac_file; then
- ac_more_lines=false
- rm -f conftest.s$ac_file
- else
- if test -z "$ac_sed_cmds"; then
- ac_sed_cmds="sed -f conftest.s$ac_file"
- else
- ac_sed_cmds="$ac_sed_cmds | sed -f conftest.s$ac_file"
- fi
- ac_file=`expr $ac_file + 1`
- ac_beg=$ac_end
- ac_end=`expr $ac_end + $ac_max_sed_cmds`
- fi
-done
-if test -z "$ac_sed_cmds"; then
- ac_sed_cmds=cat
-fi
-EOF
-
-cat >> $CONFIG_STATUS <<EOF
-
-CONFIG_FILES=\${CONFIG_FILES-"Makefile"}
-EOF
-cat >> $CONFIG_STATUS <<\EOF
-for ac_file in .. $CONFIG_FILES; do if test "x$ac_file" != x..; then
- # Support "outfile[:infile[:infile...]]", defaulting infile="outfile.in".
- case "$ac_file" in
- *:*) ac_file_in=`echo "$ac_file"|sed 's%[^:]*:%%'`
- ac_file=`echo "$ac_file"|sed 's%:.*%%'` ;;
- *) ac_file_in="${ac_file}.in" ;;
- esac
-
- # Adjust a relative srcdir, top_srcdir, and INSTALL for subdirectories.
-
- # Remove last slash and all that follows it. Not all systems have dirname.
- ac_dir=`echo $ac_file|sed 's%/[^/][^/]*$%%'`
- if test "$ac_dir" != "$ac_file" && test "$ac_dir" != .; then
- # The file is in a subdirectory.
- test ! -d "$ac_dir" && mkdir "$ac_dir"
- ac_dir_suffix="/`echo $ac_dir|sed 's%^\./%%'`"
- # A "../" for each directory in $ac_dir_suffix.
- ac_dots=`echo $ac_dir_suffix|sed 's%/[^/]*%../%g'`
- else
- ac_dir_suffix= ac_dots=
- fi
-
- case "$ac_given_srcdir" in
- .) srcdir=.
- if test -z "$ac_dots"; then top_srcdir=.
- else top_srcdir=`echo $ac_dots|sed 's%/$%%'`; fi ;;
- /*) srcdir="$ac_given_srcdir$ac_dir_suffix"; top_srcdir="$ac_given_srcdir" ;;
- *) # Relative path.
- srcdir="$ac_dots$ac_given_srcdir$ac_dir_suffix"
- top_srcdir="$ac_dots$ac_given_srcdir" ;;
- esac
-
- case "$ac_given_INSTALL" in
- [/$]*) INSTALL="$ac_given_INSTALL" ;;
- *) INSTALL="$ac_dots$ac_given_INSTALL" ;;
- esac
-
- echo creating "$ac_file"
- rm -f "$ac_file"
- configure_input="Generated automatically from `echo $ac_file_in|sed 's%.*/%%'` by configure."
- case "$ac_file" in
- *Makefile*) ac_comsub="1i\\
-# $configure_input" ;;
- *) ac_comsub= ;;
- esac
-
- ac_file_inputs=`echo $ac_file_in|sed -e "s%^%$ac_given_srcdir/%" -e "s%:% $ac_given_srcdir/%g"`
- sed -e "$ac_comsub
-s%@configure_input@%$configure_input%g
-s%@srcdir@%$srcdir%g
-s%@top_srcdir@%$top_srcdir%g
-s%@INSTALL@%$INSTALL%g
-" $ac_file_inputs | (eval "$ac_sed_cmds") > $ac_file
-fi; done
-rm -f conftest.s*
-
-EOF
-cat >> $CONFIG_STATUS <<EOF
-
-EOF
-cat >> $CONFIG_STATUS <<\EOF
-
-exit 0
-EOF
-chmod +x $CONFIG_STATUS
-rm -fr confdefs* $ac_clean_files
-test "$no_create" = yes || ${CONFIG_SHELL-/bin/sh} $CONFIG_STATUS || exit 1
-
-if test "$no_recursion" != yes; then
-
- # Remove --cache-file and --srcdir arguments so they do not pile up.
- ac_sub_configure_args=
- ac_prev=
- for ac_arg in $ac_configure_args; do
- if test -n "$ac_prev"; then
- ac_prev=
- continue
- fi
- case "$ac_arg" in
- -cache-file | --cache-file | --cache-fil | --cache-fi \
- | --cache-f | --cache- | --cache | --cach | --cac | --ca | --c)
- ac_prev=cache_file ;;
- -cache-file=* | --cache-file=* | --cache-fil=* | --cache-fi=* \
- | --cache-f=* | --cache-=* | --cache=* | --cach=* | --cac=* | --ca=* | --c=*)
- ;;
- -srcdir | --srcdir | --srcdi | --srcd | --src | --sr)
- ac_prev=srcdir ;;
- -srcdir=* | --srcdir=* | --srcdi=* | --srcd=* | --src=* | --sr=*)
- ;;
- *) ac_sub_configure_args="$ac_sub_configure_args $ac_arg" ;;
- esac
- done
-
- for ac_config_dir in $configdirs; do
-
- # Do not complain, so a configure script can configure whichever
- # parts of a large source tree are present.
- if test ! -d $srcdir/$ac_config_dir; then
- continue
- fi
-
- echo configuring in $ac_config_dir
-
- case "$srcdir" in
- .) ;;
- *)
- if test -d ./$ac_config_dir || mkdir ./$ac_config_dir; then :;
- else
- { echo "configure: error: can not create `pwd`/$ac_config_dir" 1>&2; exit 1; }
- fi
- ;;
- esac
-
- ac_popdir=`pwd`
- cd $ac_config_dir
-
- # A "../" for each directory in /$ac_config_dir.
- ac_dots=`echo $ac_config_dir|sed -e 's%^\./%%' -e 's%[^/]$%&/%' -e 's%[^/]*/%../%g'`
-
- case "$srcdir" in
- .) # No --srcdir option. We are building in place.
- ac_sub_srcdir=$srcdir ;;
- /*) # Absolute path.
- ac_sub_srcdir=$srcdir/$ac_config_dir ;;
- *) # Relative path.
- ac_sub_srcdir=$ac_dots$srcdir/$ac_config_dir ;;
- esac
-
- # Check for guested configure; otherwise get Cygnus style configure.
- if test -f $ac_sub_srcdir/configure; then
- ac_sub_configure=$ac_sub_srcdir/configure
- elif test -f $ac_sub_srcdir/configure.in; then
- ac_sub_configure=$ac_configure
- else
- echo "configure: warning: no configuration information is in $ac_config_dir" 1>&2
- ac_sub_configure=
- fi
-
- # The recursion is here.
- if test -n "$ac_sub_configure"; then
-
- # Make the cache file name correct relative to the subdirectory.
- case "$cache_file" in
- /*) ac_sub_cache_file=$cache_file ;;
- *) # Relative path.
- ac_sub_cache_file="$ac_dots$cache_file" ;;
- esac
- case "$ac_given_INSTALL" in
- [/$]*) INSTALL="$ac_given_INSTALL" ;;
- *) INSTALL="$ac_dots$ac_given_INSTALL" ;;
- esac
-
- echo "running ${CONFIG_SHELL-/bin/sh} $ac_sub_configure $ac_sub_configure_args --cache-file=$ac_sub_cache_file --srcdir=$ac_sub_srcdir"
- # The eval makes quoting arguments work.
- if eval ${CONFIG_SHELL-/bin/sh} $ac_sub_configure $ac_sub_configure_args --cache-file=$ac_sub_cache_file --srcdir=$ac_sub_srcdir
- then :
- else
- { echo "configure: error: $ac_sub_configure failed for $ac_config_dir" 1>&2; exit 1; }
- fi
- fi
-
- cd $ac_popdir
- done
-fi
-
-
-exit 0
diff --git a/sim/configure.in b/sim/configure.in
deleted file mode 100644
index e472f8862b9..00000000000
--- a/sim/configure.in
+++ /dev/null
@@ -1,185 +0,0 @@
-dnl Process this file with autoconf to produce a configure script.
-AC_PREREQ(2.13)dnl
-AC_INIT(Makefile.in)
-
-AC_PROG_CC
-AC_PROG_INSTALL
-AC_CHECK_TOOL(AR, ar)
-AC_CHECK_TOOL(RANLIB, ranlib, :)
-
-AC_CONFIG_AUX_DIR(`cd $srcdir;pwd`/..)
-AC_CANONICAL_SYSTEM
-AC_ARG_PROGRAM
-AC_PROG_CC
-AC_SUBST(CFLAGS)
-AC_SUBST(HDEFINES)
-AR=${AR-ar}
-AC_SUBST(AR)
-AC_PROG_RANLIB
-
-# Put a plausible default for CC_FOR_BUILD in Makefile.
-if test "x$cross_compiling" = "xno"; then
- CC_FOR_BUILD='$(CC)'
-else
- CC_FOR_BUILD=gcc
-fi
-AC_SUBST(CC_FOR_BUILD)
-
-# If a cpu ever has more than one simulator to choose from, use
-# --enable-sim=... to choose.
-AC_ARG_ENABLE(sim,
-[ --enable-sim ],
-[case "${enableval}" in
-yes | no) ;;
-*) AC_MSG_ERROR(bad value ${enableval} given for --enable-sim option) ;;
-esac])
-
-# Assume simulator can be built with cc.
-# If the user passes --enable-sim built it regardless of $(CC).
-only_if_gcc=no
-only_if_enabled=no
-extra_subdirs=common
-
-# WHEN ADDING ENTRIES TO THIS MATRIX:
-# Make sure that the left side always has two dashes. Otherwise you
-# can get spurious matches. Even for unambiguous cases, do this as a
-# convention, else the table becomes a real mess to understand and maintain.
-
-case "${target}" in
- arm*-*-* | thumb*-*-*)
- sim_target=arm
- extra_subdirs="${extra_subdirs} testsuite"
- ;;
- strongarm*-*-*)
- sim_target=arm
- extra_subdirs="${extra_subdirs} testsuite"
- ;;
- xscale-*-*)
- sim_target=arm
- extra_subdirs="${extra_subdirs} testsuite"
- ;;
- d10v-*-*) sim_target=d10v ;;
- d30v-*-*)
- sim_target=d30v
- only_if_gcc=yes
- extra_subdirs="${extra_subdirs} igen"
- ;;
- fr30-*-*) sim_target=fr30 ;;
- h8300*-*-*) sim_target=h8300 ;;
- h8500-*-*) sim_target=h8500 ;;
- i960-*-*) sim_target=i960 ;;
- m32r-*-*) sim_target=m32r ;;
- m68hc11-*-*|m6811-*-*) sim_target=m68hc11 ;;
- mcore-*-*) sim_target=mcore ;;
- mips*-*-*)
- # The MIPS simulator can only be compiled by gcc.
- sim_target=mips
- only_if_gcc=yes
- extra_subdirs="${extra_subdirs} igen"
- ;;
- mn10300*-*-*)
- # The mn10300 simulator can only be compiled by gcc.
- sim_target=mn10300
- only_if_gcc=yes
- extra_subdirs="${extra_subdirs} igen"
- ;;
- mn10200*-*-*)
- sim_target=mn10200
- ;;
- sh*-*-*) sim_target=sh ;;
- powerpc*-*-eabi* | powerpc*-*-solaris* | powerpc*-*-sysv4* | powerpc*-*-elf* | powerpc*-*-linux* )
- # The PowerPC simulator uses the GCC extension long long as well as
- # ANSI prototypes, so don't enable it for random host compilers
- # unless asked to.
- sim_target=ppc
- only_if_gcc=yes
- #extra_subdirs="${extra_subdirs}"
- ;;
- tic80-*-*)
- sim_target=tic80
- only_if_gcc=yes
- extra_subdirs="${extra_subdirs} igen"
- ;;
- v850-*-*)
- # The V850 simulator can only be compiled by gcc.
- sim_target=v850
- extra_subdirs="${extra_subdirs} igen"
- only_if_gcc=yes
- ;;
- v850e-*-*)
- # The V850 simulator can only be compiled by gcc.
- sim_target=v850
- extra_subdirs="${extra_subdirs} igen"
- only_if_gcc=yes
- ;;
- v850ea-*-*)
- # The V850 simulator can only be compiled by gcc.
- sim_target=v850
- extra_subdirs="${extra_subdirs} igen"
- only_if_gcc=yes
- ;;
- w65-*-*)
- sim_target=w65
- # The w65 is suffering from gradual decay.
- only_if_enabled=yes
- ;;
- z8k*-*-*) sim_target=z8k ;;
- sparc64-*-*)
- only_if_gcc=yes
- sim_target=none # Don't build erc32 if sparc64.
- ;;
- sparclite*-*-* | sparc86x*-*-*)
- # The SPARC simulator can only be compiled by gcc.
- only_if_gcc=yes
- sim_target=erc32
- ;;
- sparc*-*-*)
- # The SPARC simulator can only be compiled by gcc.
- only_if_gcc=yes
- # Unfortunately erc32 won't build on many hosts, so only enable
- # it if the user really really wants it.
- only_if_enabled=yes
- sim_target=erc32
- ;;
- *) sim_target=none ;;
-esac
-
-
-# Is there a testsuite directory for the target?
-testdir=`echo ${target} | sed -e 's/-.*-/-/'`
-if test -r ${srcdir}/testsuite/${testdir}/configure ; then
- extra_subdirs="${extra_subdirs} testsuite"
-fi
-
-
-case "${enable_sim}" in
-no) sim_target=none ;;
-yes)
- if test ${only_if_gcc} = yes ; then
- if test "${GCC}" != yes ; then
- echo "Can't enable simulator since not compiling with GCC."
- sim_target=none
- fi
- fi
- ;;
-*)
- if test ${only_if_enabled} = yes ; then
- sim_target=none
- else
- if test ${only_if_gcc} = yes ; then
- if test "${GCC}" != yes ; then
- sim_target=none
- fi
- fi
- fi
- ;;
-esac
-
-if test x"${sim_target}" != xnone ; then
- configdirs="${extra_subdirs} ${sim_target}"
- AC_CONFIG_SUBDIRS($configdirs)
-fi
-
-AC_OUTPUT(Makefile)
-
-exit 0
diff --git a/sim/d10v/ChangeLog b/sim/d10v/ChangeLog
deleted file mode 100644
index 75167f929aa..00000000000
--- a/sim/d10v/ChangeLog
+++ /dev/null
@@ -1,1188 +0,0 @@
-2001-04-15 J.T. Conklin <jtc@redback.com>
-
- * Makefile.in (simops.o): Add simops.h to dependency list.
-
-Tue May 23 21:39:23 2000 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Tue Apr 18 16:26:41 2000 Andrew Cagney <cagney@b1.cygnus.com>
-
- * interp.c (sim_resume): Deliver SIGILL.
- (lookup_hash): Do not print SIGILL message.
-
-Tue Feb 22 18:24:56 2000 Andrew Cagney <cagney@b1.cygnus.com>
-
- * Makefile.in (SIM_EXTRA_CFLAGS): Define SIM_HAVE_ENVIRONMENT.
- * interp.c (sim_set_trace): Replace sim_trace. Enable tracing.
-
-Tue Feb 8 17:41:12 2000 Andrew Cagney <cagney@b1.cygnus.com>
-
- * d10v_sim.h (SIG_D10V_BUS): Define.
-
- * simops.c (address_exception): Delete function.
- (OP_30000000, OP_6401, OP_6001, OP_6000, OP_32010000, OP_31000000,
- OP_6601, OP_6201, OP_6200, OP_33010000, OP_34000000, OP_6800,
- OP_6C1F, OP_6801, OP_6C01, OP_36010000, OP_35000000, OP_6A00,
- OP_6E1F, OP_6A01, OP_6E01, OP_37010000): Replace call to
- address_exception with code that sets SIG_D10V_BUS.
-
- * interp.c (sim_resume): When SIGBUS or SIGSEGV, deliver a bus
- error to the simulator before resuming execution.
- (sim_trace): Check stop reason and use that to determine sim_trace
- return value.
- (sim_stop_reason): For SIG_D10V_BUS return a SIGBUS / SIGSEGV
- sigrc.
-
-Tue Jan 18 16:07:42 MST 2000 Diego Novillo <dnovillo@cygnus.com>
-
- * interp.c (sim_create_inferior): Change internal initial value for
- DMAP2 to 0x2000.
-
-Mon Jan 3 02:06:07 2000 Andrew Cagney <cagney@b1.cygnus.com>
-
- * interp.c (lookup_hash): Stop the update of the PC when there was
- an illegal instruction exception.
-
-Mon Jan 3 00:14:33 2000 Andrew Cagney <cagney@b1.cygnus.com>
-
- * simops.c (address_exception): New function.
- (OP_30000000, OP_6401, OP_6001, OP_6000, OP_32010000, OP_31000000,
- OP_6601, OP_6201, OP_6200, OP_33010000, OP_34000000, OP_6800,
- OP_6C1F, OP_6801, OP_6C01, OP_36010000, OP_35000000, OP_6A00,
- OP_6E1F, OP_6A01, OP_6E01, OP_37010000): For "ld", "ld2w", "st"
- and "st2w" check that the address is aligned.
-
-1999-12-30 Chandra Chavva <cchavva@cygnus.com>
-
- * d10v_sim.h (INC_ADDR): Added code to assign
- proper address for loads with predec operations.
-
-1999-11-25 Nick Clifton <nickc@cygnus.com>
-
- * simops.c (OP_4E0F): New function: Simulate new bit pattern for
- cpfg instruction.
-
-Fri Oct 29 18:34:28 1999 Andrew Cagney <cagney@b1.cygnus.com>
-
- * simops.c (move_to_cr): Don't allow user to set PSW.DM in either
- DPSW and BPSW.
-
-Thu Oct 28 01:26:18 1999 Andrew Cagney <cagney@b1.cygnus.com>
-
- * simops.c (OP_5F20): Use SET_HW_PSW when updating PSW.
- (PSW_HW_MASK): Declare.
-
- * d10v_sim.h (move_to_cr): Add ``psw_hw_p'' parameter.
- (SET_CREG, SET_PSW_BIT): Update.
- (SET_HW_CREG, SET_HW_PSW): Define.
-
-Sun Oct 24 21:38:04 1999 Andrew Cagney <cagney@b1.cygnus.com>
-
- * interp.c (sim_d10v_translate_dmap_addr): Fix extraction of IOSP
- for DMAP3.
-
-Sun Oct 24 16:04:16 1999 Andrew Cagney <cagney@b1.cygnus.com>
-
- * interp.c (sim_d10v_translate_addr): New function.
- (xfer_mem): Rewrite. Use sim_d10v_translate_addr.
- (map_memory): Make INLINE.
-
-Sun Oct 24 13:45:19 1999 Andrew Cagney <cagney@b1.cygnus.com>
-
- * interp.c (sim_d10v_translate_dmap_addr): New function.
- (dmem_addr): Rewrite. Use sim_d10v_translate_dmap_addr. Change
- offset parameter to type uint16.
- * d10v_sim.h (dmem_addr): Update declaration.
-
-Sun Oct 24 13:07:31 1999 Andrew Cagney <cagney@b1.cygnus.com>
-
- * interp.c (imap_register, set_imap_register, dmap_register,
- set_imap_register): Use map_memory.
- (DMAP): Update.
- (sim_create_inferior): Initialize all DMAP registers. NOTE that
- DMAP2, in internal memory mode, is set to 0x0000 and NOT
- 0x2000. This is consistent with the older d10v boards.
-
-Sun Oct 24 11:22:12 1999 Andrew Cagney <cagney@b1.cygnus.com>
-
- * interp.c (sim_d10v_translate_imap_addr): New function.
- (imem_addr): Rewrite. Use sim_d10v_translate_imap_addr.
- (last_from, last_to): Declare.
-
-Sun Oct 24 01:21:56 1999 Andrew Cagney <cagney@b1.cygnus.com>
-
- * d10v_sim.h (struct d10v_memory): Define. Support very long
- memories.
- (struct _state): Replace imem, dmem and umem by mem.
- (IMAP_BLOCK_SIZE, DMAP_BLOCK_SIZE, SEGMENT_SIZE, IMEM_SEGMENTS,
- DMEM_SEGMENTS, UMEM_SEGMENTS): Define.
-
- * interp.c (map_memory): New function.
- (sim_size, xfer_memory, imem_addr, dmem_addr): Update.
- (UMEM_SEGMENTS): Moveed to "d10v_sim.h".
- (IMEM_SIZEDMEM_SIZE): Delete.
-
-Sat Oct 23 20:06:58 1999 Andrew Cagney <cagney@b1.cygnus.com>
-
- * interp.c: Include "sim-d10v.h".
- (imap_register, set_imap_register, dmap_register,
- set_dmap_register, spi_register, spu_register, set_spi_register,
- set_spu_register): New functions.
- (sim_create_inferior): Update.
- (sim_fetch_register, sim_store_register): Rewrite. Use enums
- defined in sim-d10v.h.
-
- * d10v_sim.h (DEBUG_MEMORY): Define.
- (IMAP0, IMAP1, DMAP, SET_IMAP0, SET_IMAP1, SET_DMAP): Delete.
-
-Sat Oct 23 18:41:18 1999 Andrew Cagney <cagney@b1.cygnus.com>
-
- * interp.c (sim_open): Allow a debug value to be passed to the -t
- option.
- (lookup_hash): Don't exit on an illegal instruction.
- (do_long, do_2_short, do_parallel): Check for failed instruction
- lookup.
-
-Mon Oct 18 18:03:24 MDT 1999 Diego Novillo <dnovillo@cygnus.com>
-
- * simops.c (OP_3220): Fix trace output for illegal accumulator
- message.
-
-1999-09-14 Nick Clifton <nickc@cygnus.com>
-
- * simops.c: Disable setting of DM bit in PSW.
-
-Wed Sep 8 19:34:55 MDT 1999 Diego Novillo <dnovillo@cygnus.com>
-
- * simops.c (op_types): Added new memory indirect type OP_MEMREF3.
- (trace_input_func): Added support for OP_MEMREF3.
- (OP_32010000): New instruction ld.
- (OP_33010000): New instruction ld2w.
- (OP_5209): New instruction sac.
- (OP_4209): New instruction sachi.
- (OP_3220): New instruction slae.
- (OP_36010000): New instruction st.
- (OP_37010000): New instruction st2w.
-
-1999-09-09 Stan Shebs <shebs@andros.cygnus.com>
-
- * interp.c (old_segment_mapping): New global.
- (xfer_mem): Change the default segment mapping to be the way
- that Mitsubishi prefers, but use the previous mapping if
- old_segment_mapping is true.
- (sim_open): Add an option -oldseg to get the old mapping.
- (sim_create_inferior): Init mapping registers based on the
- value of old_segment_mapping.
-
-1999-09-07 Nick Clifton <nickc@cygnus.com>
-
- * simops.c (OP_6601): Do not write back decremented address if
- either of the destination registers was the same as the address
- register.
- (OP_6201): Do not write back incremented address if either of the
- destination registers was the same as the address register.
-
-Thu Sep 2 18:15:53 1999 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-1999-05-08 Felix Lee <flee@cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-1999-04-02 Keith Seitz <keiths@cygnus.com>
-
- * interp.c (ui_loop_hook_counter): New global (when NEED_UI_LOOP_HOOK
- defined).
- (sim_resume): If the counter has expired, call the ui_loop_hook,
- if defined.
- (UI_LOOP_POLL_INTERVAL): Define. Used to tweak the frequency of
- ui_loop_hook calls.
- * Makefile.in (SIM_EXTRA_CFLAGS): Include NEED_UI_LOOP_HOOK.
-
-Wed Mar 10 19:32:13 1999 Nick Clifton <nickc@cygnus.com>
-
- * simops.c: If load instruction with auto increment/decrement
- addressing is used when the destination register is the same as
- the address register, then ignore the auto increment/decrement.
-
-Wed Mar 10 19:32:13 1999 Martin M. Hunt <hunt@cygnus.com>
-
- * simops.c (OP_5F00): Ifdef SYS_stat case because
- not all systems have it defined.
-
-1999-01-26 Jason Molenda (jsm@bugshack.cygnus.com)
-
- * simops.c (OP_5607): Correct saturation comparison/assignment.
- (OP_1201, OP_1203, OP_17001200, OP_17001202,
- OP_2A00, OP_2800, OP_2C00, OP_3200, OP_3201,
- OP_1001, OP_1003, OP_17001000, OP_17001002): Ditto.
-
-1999-01-26 Jason Molenda (jsm@bugshack.cygnus.com)
-
- * simops.c (OP_5605): Sign extend MIN32 and MAX32 before saturation
- comparison.
- (OP_5607): Ditto.
- (OP_2A00): Ditto.
- (OP_2800): Ditto.
-
-1999-01-13 Jason Molenda (jsm@bugshack.cygnus.com)
-
- * simops.c (OP_1223): Sign extend MIN32 and MAX32 before saturation
- comparison.
-
-Tue Nov 24 17:04:43 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * simops.c (sys/syscall.h): Include targ-vals.h instead.
- (SYS_*): Replace with TARGET_SYS_*.
-
- * Makefile.in: Add dependency on targ-vals.h.
- (NL_TARGET): Define as NL_TARGET_d10v.
-
-Wed Sep 30 00:06:32 1998 Andrew Cagney <cagney@amy.cygnus.com>
-
- * interp.c (xfer_mem): Missing break, instruction memory case
- flowed into unified memory case.
-
-Wed Sep 30 10:14:18 1998 Nick Clifton <nickc@cygnus.com>
-
- * simops.c: If load instruction with auto increment/decrement
- addressing is used when the destination register is the same as
- the address register, then ignore the auto increment/decrement.
-
-Tue Apr 28 18:33:31 1998 Geoffrey Noer <noer@cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Sun Apr 26 15:31:55 1998 Tom Tromey <tromey@creche>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
- * config.in: Ditto.
-
-Sun Apr 26 15:20:23 1998 Tom Tromey <tromey@cygnus.com>
-
- * acconfig.h: New file.
- * configure.in: Reverted change of Apr 24; use sinclude again.
-
-Fri Apr 24 14:16:40 1998 Tom Tromey <tromey@creche>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
- * config.in: Ditto.
-
-Fri Apr 24 11:20:06 1998 Tom Tromey <tromey@cygnus.com>
-
- * configure.in: Don't call sinclude.
-
-Fri Apr 24 11:04:46 1998 Andrew Cagney <cagney@chook.cygnus.com>
-
- * interp.c (struct hash_entry): OPCODE and MASK are unsigned.
-
- * d10v_sim.h (remote-sim.h, sim-config.h): Include.
-
-Sat Apr 4 20:36:25 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Wed Apr 1 12:59:17 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * simops.c (trace_input_func): Use move_from_cr / CREGS to obtain
- up-to-date CR value.
- (OP_OP_1000000, add3): Trace inputs before performing add.
- (OP_5F00, <*>): Trace input registers before making system call.
- (OP_5F00, <kill>): Trace R0, R1 not REGn.
- (OP_5F00, <getpid>): Always return 47.
-
- * d10v_sim.h (SLOT, SLOT_NR, SLOT_PEND_MASK, SLOT_PEND,
- SLOT_DISCARD, SLOT_FLUSH): Define. An implementation of write
- back slots.
- (struct _state): Add struct slot slot to global state variable.
- (struct _state): Delete fields SM, EA, DB, DM, IE, RP, MD, FX, ST,
- F0, F1, C from global State variable.
- (struct _state): Add struct trace to global State variable.
- (GPR, SET_GPR): Define. SET_GPR uses SLOT_PEND.
- (PSW*, SET_PSW*): Define. SET_PSW* uses SET_CREG.
- (CREG, SET_CREG, SET_*): Define. SET_CREG uses func move_to_cr.
- (INC_ADDR): Re-implement. Use SET_GPR to update registers.
- (JMP): Re-implement. Use SET_* to update registers.
-
- * interp.c: Use new SET_* et.al. macros to fetch / store
- registers.
- (get_operands): Squirrel away trace values at start of each
- operand decode.
- (do_2_short): Flush pending writes before issuing second
- instruction.
- (sim_resume): Flush pending writes at end of instruction cycle.
- (sim_fetch_register, sim_store_register, sim_create_inferior):
- After scheduling updates to registers using SET_*, flush updates.
- (sim_resume): Re-order handling of RPT/repeat and IBA/hbreak so
- that each sets pc using SET_* and last SET_* eventually winds out.
-
- * simops.c: Use new SET_* et.al. macros to fetch / store
- registers.
- (move_to_cr): Add MASK argument for selective update of CREG bits.
- Re-implement using new SET_* macros.
- (trace_output_func, trace_output): Delete. Replace with.
- (do_trace_output_flush, trace_output_finish, trace_output_40,
- trace_output_32, trace_output_16, trace_output_void,
- trace_output_flag): New functions. Handle specific trace cases.
- (OP_*): Re-write tracing to use new trace_output_* functions.
- (OP_*): Re-write to use new SET_* et.al. macros.
- (FUNC, PARM[1-4], RETVAL, RETVAL32): Redo definition.
- (RETVAL_HIGH, RETVAL_LOW): Delete, use RETVAL32.
-
-Wed Apr 1 12:55:18 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure.in (SIM_AC_OPTION_WARNINGS): Add.
- configure: Re-generate.
-
-Fri Mar 27 16:15:52 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Wed Mar 25 12:35:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Wed Mar 18 12:38:12 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Tue Feb 17 12:38:42 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * interp.c (sim_store_register, sim_fetch_register): Pass in
- length parameter. Return -1.
-
-Mon Oct 27 14:43:33 1997 Fred Fish <fnf@cygnus.com>
-
- * (dmem_addr): If address is illegal or in I/O space, signal a bus
- error. Allocate unified memory on demand. Fix DMEM address
- calculations.
-
-Mon Feb 16 10:27:53 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * simops.c (OP_5F20): Implement "dbt".
- (OP_5F60): Implement "rtd".
-
- * d10v_sim.h (DPC_CR): Define enum.
- (DBT_VECTOR_START): Define
- (DPSW, DPC): Define.
-
-Fri Feb 13 15:15:58 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * simops.c (move_to_cr): Sync regs[SP_IDX] with State.sp according
- to PSW:SM.
-
- * d10v_sim.h (struct _state): Add sp, as holding area for SPI/SPU.
- (SP_IDX): Define.
-
-Wed Feb 11 16:53:49 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * simops.c (OP_5F00): Call error instead of abort for unknown
- syscalls.
-
- * d10v_sim.h (enum): Define DPSW_CR.
-
- * simops.c (move_to_cr): Mask out hardwired zero bits in DPSW.
-
-Tue Feb 10 18:28:38 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * interp.c (sim_write_phys): Delete.
- (sim_load): Call sim_load_file with sim_write and LMA.
-
-Mon Feb 9 12:05:01 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * interp.c: Rewrite xfer_mem so that it translates addresses as -
- 0x00... - DMAP translated memory, 0x01... IMAP translated memory,
- 0x10... - on-chip data, 0x11... - on-chip insn, 0x12... - unified
- memory.
- (pc_addr): Delete.
- (imem_addr): New function - translate IMEM address.
- (sim_resume): Use imem_addr to translate insn address, abort if
- translation failed.
- (sim_create_inferior): Write ARGV to memory using sim_write. Pass
- argc/argv using r0/r1 not r2/r3.
- (sim_size): Do not initialize IMAP/DMAP here.
- (sim_open): Call sim_create_inferior and sim_size to initialize
- the system.
- (sim_create_inferior): Initialize IMAP/DMAP to hardware reset
- defaults.
- (init_system): Delete.
- (xfer_mem, sim_fetch_register, sim_store_register): Do not call
- init_system.
- (decode_pc): Check prog_bfd is defined before looking up .text
- section.
-
-Sun Feb 1 16:47:51 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Sat Jan 31 18:15:41 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Sun Jan 25 22:23:01 1998 Michael Meissner <meissner@cygnus.com>
-
- * interp.c (sim_stop_reason): Exit status is now in r0, not r2.
-
-Sat Jan 24 19:00:30 1998 Michael Meissner <meissner@cygnus.com>
-
- * d10v_sim.h (DEBUG_TRAP): New debug flag.
-
- * simops.c (OP_5F00): If DEBUG_TRAP is on, turn traps 0-14 into
- printing the registers.
-
-Thu Jan 22 17:54:01 1998 Michael Meissner <meissner@cygnus.com>
-
- * simops.c (op_types): New ABI, args are r0..r3, system call # is
- in r4.
- (trace_{in,out}put_func): Ditto.
- (OP_4900): Ditto.
- (OP_24800000): Ditto.
- (OP_4D00): Ditto.
- (OP_5F00): Ditto.
-
-Thu Jan 22 14:30:36 1998 Fred Fish <fnf@cygnus.com>
-
- * interp.c (UMEM_SEGMENTS): New define, set to 128.
- (sim_size): Use UMEM_SEGMENTS rather than hardwired constant.
- (sim_close): Reset prog_bfd to NULL after closing it. Also
- reset prog_bfd_was_opened_p after closing prog_bfd.
- (sim_load): Reset prog_bfd_was_opened_p after closing prog_bfd.
- (sim_create_inferior): Get start address from abfd not prog_bfd.
- (xfer_mem): Do bounds checking on addresses and return zero length
- read/write on bad addresses, rather than aborting. Prepare to
- be able to handle xfers that cross segment boundaries, but not
- yet implemented. Only emit debug message when d10v_debug is
- set as well as DEBUG being defined.
-
-Mon Jan 19 22:26:29 1998 Doug Evans <devans@seba>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Mon Dec 15 23:17:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
- * config.in: Ditto.
-
-Tue Dec 9 10:28:31 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * d10v_sim.h (RPT_S): Index cregs with RPT_S_CR not RPT_E_CR.
- (BPSW): Ditto for BPSW_CR and not PSW_CR.
-
- * simops.c (OP_5F40): JMP to BPC instead of assigning PC directly.
-
-Mon Dec 8 12:58:33 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * simops.c (OP_5F00): From Martin Hunt <hunt@cygnus.com>. Change
- reserved trap from 0 to 15. Add trap emulation code for 0-14.
-
- * interp.c (sim_resume): From Martin Hunt <hunt@cygnus.com>. Check
- IBA for SDBT.
-
- * d10v_sim.h (AE_VECTOR_START, RIE_VECTOR_START,
- SDBT_VECTOR_START, TRAP_VECTOR_START): Define.
-
- * simops.c (OP_5F00): For "trap", mask out all but SM bit in PSW,
- use move_to_cr.
- (OP_5F00): For "trap", update BPSW with move_to_cr.
-
-Fri Dec 5 15:31:17 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * d10v_sim.h (enum): Enumerate CR register names.
- (enum): Enumerate PSW bit values.
- (PSW): Obtain value uing move_from_cr.
- (MOD_S, MOD_E, BPSW): Make r-values.
- (move_from_cr, move_to_cr): Declare functions.
-
- * interp.c (sim_fetch_register, sim_store_register): Use
- move_from_cr and move_to_cr for CR register transfers.
-
- * simops.c (move_from_cr, move_to_cr): New functions.
- (OP_5F40): Move BPSW to PSW using move_to_cr and move_from_cr.
- (OP_5600): For "mvtc", use function move_to_cr.
- (OP_5200): For "mvfc", use function move_from_cr.
-
-Fri Dec 5 13:33:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * simops.c (OP_5600): For "mvtc" MOD_E and MOD_S, ensure that the
- LSbit is zero.
-
-Thu Dec 4 09:21:05 1997 Doug Evans <devans@canuck.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Thu Dec 4 16:51:02 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * d10v_sim.h (struct _state): Add DM - PSW debug mask.
-
- * simops.c (OP_5600): For "mvtc", save PSW.DM.
- (OP_5200): Ditto for "mvfc".
-
-Wed Dec 3 17:27:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * d10v_sim.h (SEXT56): Define.
-
- * simops.c (OP_4201): For "rac", sign extend 56 bit value before
- it is shifted.
-
- * d10v_sim.h (MAX32, MIN32, MASK32, MASK40): Re-define using
- SIGNED64 macro.
-
-Tue Dec 2 15:38:34 1997 Fred Fish <fnf@cygnus.com>
-
- * interp.c (sim_resume): Call do_2_short with LEFT_FIRST or
- RIGHT_FIRST, as appropriate, instead of hardcoded ints that
- don't match enum values.
-
-Tue Dec 2 15:01:08 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * simops.c (OP_3A00): For "macu", perform multiply stage using 32
- bit rather than 16 bit precision.
- (OP_3C00): For "mulxu", store unsigned product in ACC.
- (OP_3800): For "msbu", subtract unsigned product from ACC,
- (OP_0): For "sub", compute carry by comparing inputs.
-
-Tue Dec 2 11:04:37 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * simops.c (OP_1000): For "sub2w", compute carry by comparing
- inputs.
-
-Mon Nov 17 20:57:21 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * simops.c (OP_1): Use 32 bit unsigned arithmetic for subtract,
- carry indicated by value > 0xffff.
-
-Fri Nov 14 12:51:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * interp.c (sim_resume): Don't set up SIGINT handler using signal,
- handled by client.
- (sim_resume): Fix race condition of a direct assignment to
- stop_simulator, conditionally call sim_stop.
- (sim_stop_reason): Check stop_simulator returning SIGINT. Clear
- stop_simulator ready for next sim_resume call.
- (sim_ctrl_c): Delete function.
-
-Thu Nov 13 19:29:34 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * interp.c (sim_resume): For "REP", only check/update the PC when
- a branch instruction has not been executed.
-
-Mon Nov 10 17:50:18 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * simops.c (OP_4201): "rachi". Sign extend bit 40 of ACC. Sign
- extend bit 44 all constants.
- (OP_4201): Replace GCC specific 0x..LL with SIGNED64 macro.
-
-Fri Oct 24 10:26:29 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * d10v_sim.h: Include sim-types.h.
- (uint8, in816, uiny16, int32, uint32, int64, uint64): Typedef
- using unsigned8 et.al. from sim-types.h.
- (SEXT32, SEXT40, SEXT44, SEXT60): Replace GCC specific 0x..LL with
- SIGNED64 macro.
-
-Wed Oct 22 14:43:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * interp.c (sim_write_phys): New function, write to physical
- instead of virtual memory.
-
- * interp.c (sim_load): Pass lma_p and sim_write_phys to
- sim_load_file.
-
-Mon Oct 13 10:55:07 1997 Fred Fish <cygnus.com>
-
- * simops.c (OP_6A01): Change OP_POSTDEC to OP_POSTINC and move
- exception generation code to OP_6E01.
- (OP_6E01): Change OP_POSTINC to OP_POSTDEC and insert exception
- generation code.
-
-Sat Oct 11 09:02:08 1997 Fred Fish <fnf@cygnus.com>
-
- * simops.c (OP_6401): postdecrement on r15 is OK, remove exception.
- (OP_6601): Ditto.
-
-Fri Oct 3 09:28:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Sat Sep 27 12:51:34 1997 Fred Fish <fnf@cygnus.com>
-
- * interp.c (pc_addr): Discard upper bit(s) of PC in case
- IMAP1 selects unified memory.
- * d10v_sim.h (INC_ADDR): Align MOD_E to increment before testing
- for end condition.
-
-Wed Sep 24 17:38:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Tue Sep 23 11:04:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Mon Sep 22 11:46:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Fri Sep 19 17:45:25 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Mon Sep 15 17:36:15 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Wed Sep 10 22:30:24 1997 Martin M. Hunt <hunt@cygnus.com>
-
- * interp.c (sim_resume): Increment PC at end of rep
- loop.
-
- * simops.c (OP_4201): Fix rachi instruction.
-
-Thu Sep 4 17:21:23 1997 Doug Evans <dje@seba>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Wed Aug 27 18:13:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
- * config.in: Ditto.
-
-Tue Aug 26 10:37:49 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * interp.c (sim_kill): Delete.
- (sim_create_inferior): Add ABFD argument.
- (sim_load): Move setting of PC from here.
- (sim_create_inferior): To here.
- (start_address): Delete variable.
-
-Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
- * config.in: Ditto.
-
-Mon Aug 25 15:39:29 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * interp.c (sim_open): Add ABFD argument.
-
-Tue May 20 10:14:45 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * interp.c (sim_open): Add callback argument.
- (sim_set_callbacks): Remove SIM_DESC argument.
-
-Thu Apr 24 00:39:51 1997 Doug Evans <dje@canuck.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Tue Apr 22 10:29:23 1997 Doug Evans <dje@canuck.cygnus.com>
-
- * interp.c (sim_open): Undo patch to add -E support.
-
-Fri Apr 18 13:39:01 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * interp.c (sim_stop): New function.
-
-Thu Apr 17 02:42:00 1997 Doug Evans <dje@canuck.cygnus.com>
-
- * Makefile.in (SIM_OBJS): Add sim-load.o.
- * d10v_sim.h (exec_bfd): Rename to prog_bfd.
- * interp.c: #include bfd.h.
- (myname, sim_kind, start_address): New static locals.
- (prog_bfd_was_opened_p, prog_bfd): New static locals.
- (decode_pc): Update to use prog_bfd.
- (sim_open): Set sim_kind, myname. Ignore -E arg.
- (sim_close): Close prog_bfd if simulator opened it.
- (sim_create_inferior): Return SIM_RC. Delete arg start_address.
- (sim_load): Return SIM_RC. New arg abfd. Set start address from bfd.
- Call sim_load_file to load file into simulator.
- * simops.c (trace_input_func): exec_bfd renamed to prog_bfd.
-
-Wed Apr 16 16:12:03 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * simops.c (OP_5F00): Only provide system calls SYS_execv,
- SYS_wait, SYS_wait, SYS_utime, SYS_time if defined by the host.
-
-Mon Apr 7 15:45:02 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
- * config.in: Ditto.
-
-Wed Apr 2 15:06:28 1997 Doug Evans <dje@canuck.cygnus.com>
-
- * interp.c (sim_open): New arg `kind'.
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Wed Apr 2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Mon Mar 17 15:10:07 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
-
- * configure: Re-generate.
-
-Fri Mar 14 10:34:11 1997 Michael Meissner <meissner@cygnus.com>
-
- * configure: Regenerate to track ../common/aclocal.m4 changes.
-
- * simops.c (OP_5F00): Remove old traps 1-3. Make trap 15 the same
- as trap 0, which will be deprecated. Only set errno, if an error
- in fact was returned.
-
-Thu Mar 13 12:41:20 1997 Doug Evans <dje@canuck.cygnus.com>
-
- * interp.c: Delete redundant prototypes of sim_foo fns.
- (sim_open): New SIM_DESC result. Argument is now in argv form.
- (other sim_*): New SIM_DESC argument.
-
-Thu Mar 13 10:29:04 1997 Michael Meissner <meissner@cygnus.com>
-
- * simops.c (trace_{input,output}_func): Call flush_stdout from the
- callback functions.
- (OP_5F00): Ditto.
- (OP_6{4,6,C,A}01): Test for post decrement on the stack pointer.
- (OP_{1200,1000000,201,5FE0,1003,17001002}): Fix problems in
- setting the carry bit after an add or a subtract.
-
-Wed Feb 12 16:04:15 1997 Michael Meissner <meissner@cygnus.com>
-
- * simops.c (OP_{1403,15002A02,3{0,4}0{0,1}}): Only use the bottom
- 40 bits of accumulators. Sign/zero extend as appropriate.
-
-Tue Feb 4 13:33:30 1997 Doug Evans <dje@canuck.cygnus.com>
-
- * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
- COMMON_{PRE,POST}_CONFIG_FRAG instead.
- * configure.in: sinclude ../common/aclocal.m4.
- * configure: Regenerated.
-
-Thu Jan 23 11:46:23 1997 Stu Grossman (grossman@critters.cygnus.com)
-
- * configure configure.in Makefile.in: Update to new configure
- scheme which is more compatible with WinGDB builds.
- * configure.in: Improve comment on how to run autoconf.
- * configure: Re-run autoconf to get new ../common/aclocal.m4.
- * Makefile.in: Use autoconf substitution to install common
- makefile fragment.
-
-Fri Dec 27 22:54:05 1996 Angela Marie Thomas (angela@cygnus.com)
-
- * gencode.c: patch to not #include "d10v_sim.h" which
- unecessarily includes bfd.h and causes wingdb configure
- to fail.
-
-Mon Dec 16 13:39:03 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
-
- * interp.c (xfer_mem): Change unified memory to 0x0.
-
-Thu Nov 28 20:42:56 1996 Michael Meissner <meissner@tiktok.cygnus.com>
-
- * simops.c (OP_3E01): Fix tracing information.
- (OP_300{0,1}): Do not propigate sign.
-
-Mon Nov 25 19:47:40 1996 Doug Evans <dje@canuck.cygnus.com>
-
- * config.in (WORDS_BIGENDIAN): Add.
- * configure: Regenerated.
- * d10v_sim.h: #include "config.h"
-
-Sat Nov 23 09:34:50 1996 Michael Meissner <meissner@tiktok.cygnus.com>
-
- * gencode.c (write_opcodes): Eliminate warnings when generated
- table.c is compiled.
-
-Wed Nov 20 19:41:40 1996 Michael Meissner <meissner@tiktok.cygnus.com>
-
- * interp.c (sim_open): Cast result of calloc, and make sure NULL
- was not returned.
- (dmem_addr): If address is illegal or in I/O space, signal a bus
- error.
- (pc_addr): Signal bus error, not illegal instruction for bogus
- pc.
-
-Wed Nov 20 01:23:03 1996 Doug Evans <dje@canuck.cygnus.com>
-
- * Makefile.in: Delete all stuff moved to ../common/Make-common.in.
- (SIM_OBJS,SIM_EXTRA_CFLAGS,SIM_EXTRA_CLEAN): Define.
- * configure.in: Simplify using macros in ../common/aclocal.m4.
- Call AC_CHECK_HEADERS(unistd.h).
- * configure: Regenerated.
- * config.in: New file.
- * interp.c: #include "callback.h".
- * simops.c: #include "config.h". #include <unistd.h> if present.
-
-Fri Nov 8 16:19:55 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
-
- * d10v-sim.h (simops): Add flag is_long.
- (State): Add pc_changed. Instructions which update the PC should
- use the JMP macro which sets this.
- (JMP): New macro. Sets the PC and the pc_changed flag.
-
- * gencode.c (write_opcodes): Add is_long field.
-
- * interp.c (lookup_hash): If we blindly apply a short opcode's mask
- to a long opcode we could get a false match. Check the opcode size.
- (hash): Add a size field to the hash table.
- (sim_open): Initialize size field in hash table.
- (sim_resume): Change to logic for setting the PC. Used to increment the
- PC if it had not been changed. This didn't allow single-instruction loops.
- Now checks the flag State.pc_changed. Also now stops when ^C is received.
- (dmem_addr): Fix translation of data segments to unified memory.
- (sim_ctrl_c): New function. When ^C is received, set stop_simulator flag.
-
- * simops.c: Changed all branch and jump instructions to use new JMP macro.
- (OP_20000000): Corrected trace information to show this is a ldi.l, not
- a ldi.s instruction.
-
-Thu Oct 31 19:13:55 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
-
- * interp.c (sim_fetch_register, sim_store_register): Fix bug where
- updating the accumulators was overwriting other parts of the global
- State variable.
-
-Wed Oct 30 17:35:14 1996 Michael Meissner <meissner@tiktok.cygnus.com>
-
- * interp.c (bfd.h) Don't include it here any more.
- (text{,_start,_end}): Move here from simops.c and make extern.
- (decode_pc): New function to return the PC as an address that the
- debugger can use.
- (dmem_addr): Print decoded PC in error message.
- (pc_addr): Ditto.
-
- * simops.c (bfd.h) Don't include it here any more.
- (text{,_start,_end}): Move to simops.c.
- (trace_input_func): Move decoding of PC, and looking up .text
- start to decode_pc.
-
- * d10v_sim.h (bfd.h): Include it here.
- (text{,_start,_end}): Add external declarations.
- (exec_bfd): Ditto.
- (decode_pc): Ditto.
-
-Tue Oct 29 12:13:52 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
-
- * interp.c (sim_size): Now allocates unified memory for imap segments
- 0,1,2, and 127. Initializes imap0 and imap1 to 0x1000. Initializes dmap to 0.
- (sim_write): Just call xfer_mem().
- (sim_read): Just call xfer_mem().
- (xfer_mem): New function. Does appropriate memory mapping and copies bytes.
- (dmem_addr): New function. Reads dmap register and translates data
- addresses to local addresses.
- (pc_addr): New function. Reads imap register and computes local address
- corresponding to contents of the PC.
- (sim_resume): Change to use pc_addr().
- (sim_create_inferior): Change reinitialization code. Also reinitializes
- imap[01] and dmap.
- (sim_fetch_register): Add fake registers 32,33,34 for imap0, imap1, and dmap.
- (sim_store_register): Add fake registers 32,33,34 for imap0, imap1, and dmap.
-
- * simops.c (MEMPTR): Redefine to use dmem_addr().
- (OP_5F00): Replace references to STate.imem with dmem_addr().
-
- * d10v-sim.h (State): Remove mem_min and mem_max. Add umem[128].
- (RB,SW,RW,SLW,RLW): Redefine to use dmem_addr().
- (IMAP0,IMAP1,DMAP,SET_IMAP,SET_IMAP1,SET_DMAP): Define.
-
-Tue Oct 22 15:22:33 1996 Michael Meissner <meissner@tiktok.cygnus.com>
-
- * d10v_sim.h (_ins_type): Reorganize, so that we can provide
- better statistics, like not counting NOPS as parallel
- instructions, and printing total cycles.
- (ins_type_counters): Make unsigned long.
- (left_nops,right_nops): Fold into ins_type_counters.
-
- * simops.c (trace_input_func): Print new instruction types.
- Handle OP_R2R3 as input types.
- (OP_{38000000,7000}): Correctly sign extend bytes.
- (OP_5E00): Don't count NOPs as parallel instructions.
- (OP_460B): Remove unused variable.
- (OP_5F00): Ditto.
-
- * interp.c (ins_type_counters): Make unsigned long.
- (left_nops,right_nops): Delete.
- (most functions): Add prototypes.
- (INLINE): If GCC and optimize define as __inline__.
- ({,lookup_}hash,get_operands): Declare as INLINE.
- (do_parallel): Count conditional operations.
- (add_commas): New function, to add commas every 3 digits.
- (sim_size): Call add_commas to print numbers.
- (sim_{open,resume}): Delete unused variables.
- (sim_info): Provide better statistics.
- (sim_read): Add int return type.
-
-Mon Oct 21 16:16:26 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
-
- * interp.c (sim_resume): Change the way single-stepping and exceptions
- are handled so single-stepping works again.
-
-Thu Oct 17 12:24:16 1996 Michael Meissner <meissner@tiktok.cygnus.com>
-
- * endian.c: Optimize simulated loads/stores on x86, AIX, and big
- endian hosts.
-
- * configure.in (--enable-sim-bswap): New switch to enable using
- the BSWAP instruction on x86's.
- * configure: Regenerate.
-
- * Makefile.in ({SWAP,CONFIG}_CFLAGS): Add --enable-sim-bswap
- support.
-
-Wed Oct 16 13:50:06 1996 Michael Meissner <meissner@tiktok.cygnus.com>
-
- * endian.c: New file. Move endian functions here from interp.c.
- Optimize code, and make it work as either inline functions or as a
- separate file.
-
- * interp.c: Move endian functions from here to endian.c.
-
- * Makefile.in (INCLUDE): Add endian.c.
- (run,libsim.a): Add dependency on endian.o.
- (endian.o): Add dependency.
-
- * d10v_sim.h (read/write support): Always go through the machine
- independent endian functions. If compiling with GCC and
- optimizing, include endian.c so the endian functions are inlined.
-
- * simops.c (OP_5F00): Correct tracing of accumulators.
-
-Tue Oct 15 10:57:50 1996 Michael Meissner <meissner@tiktok.cygnus.com>
-
- * simops.c (OP_5F00): Add support for getpid, kill system calls.
-
- * interp.c (do_{2_short,parallel}): If an exception is raised,
- don't execute the second instruction.
-
-Sat Oct 12 22:17:43 1996 Michael Meissner <meissner@tiktok.cygnus.com>
-
- * simops.c (OP_{31000000,6601,6201,6200}): Store address in a
- temporary in case the register is overriden when loading.
- (OP_6200): Output type is OP_DREG for tracing.
-
-Fri Oct 4 23:46:18 1996 Michael Meissner <meissner@tiktok.cygnus.com>
-
- * d10v_sim.h (struct _state): Add mem_{min,max} fields.
-
- * interp.c (sim_size): Initialize mem_{min,max} fields.
- (sim_write): Update mem_{min,max} fields.
- (sim_resume): If PC is not in the minimum/maximum memory range,
- abort.
- (sim_create_inferior): Preserve mem_{min,max} fields.
-
-Fri Sep 27 13:11:58 1996 Mark Alexander <marka@cygnus.com>
-
- * simops.c (OP_5F00): Add support for time() system call.
-
-Wed Sep 25 16:31:41 1996 Michael Meissner <meissner@tiktok.cygnus.com>
-
- * simops.c (OP_{6E01,6A01,6E1F,6A00}): Print both words being
- stored if tracing.
- (OP_5F00,trace_{in,out}put_func): Add finer grain tracing for
- system calls.
-
-Mon Sep 23 17:55:30 1996 Michael Meissner <meissner@tiktok.cygnus.com>
-
- * simops.c (op_types): Add OP_{CONSTANT8,R2,R3}.
- (trace_input_func): Add support for OP_{CONSTANT8,R2,R3}.
- (OP_{4900,24800000,4800,4A00,4B00,4D00,4C00}): Add OP_R2 and OP_R3
- to call/subroutine returns to trace the first two arguments and
- the return value. For small jumps, use CONSTANT8, not CONSTANT16.
-
-Fri Sep 20 15:36:45 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
-
- * interp.c (sim_create_inferior): Reinitialize State every time
- sim_create_inferior() is called.
-
-Thu Sep 19 21:38:20 1996 Michael Meissner <meissner@wogglebug.ziplink.net>
-
- * simops.c (OP_{401,2000000,601,3000000,23000000}): Get sign right
- on comparisons.
- (OP_401): Fix tracing information.
-
-Thu Sep 19 10:30:22 1996 Michael Meissner <meissner@tiktok.cygnus.com>
-
- * simops.c (SIZE_{PC,LINE_NUMBER}): New default sizes for output.
- (trace_input_func): Use them.
- (trace_input_func): Make sure there is a trailing space after the
- instruction.
- (OP_6200): Fix tracing info.
-
- * Makefile.in (run): Add dependencies on libbfd.a and
- libiberity.a.
-
-Wed Sep 18 09:13:25 1996 Michael Meissner <meissner@tiktok.cygnus.com>
-
- * d10v_sim.h (DEBUG_INSTRUCTION): New debug value to include line
- numbers and function names in debug trace.
- (DEBUG): If not defined, set to DEBUG_TRACE, DEBUG_VALUES, and
- DEBUG_LINE_NUMBER.
- (SIG_D10V_{STOP,EXIT}): Values to represent the stop instruction
- and exit system call trap being executed.
-
- * interp.c (sim_stop_reason): Set exit code correctly for stop
- instruction and exit system call trap.
-
- * configure.in (--enable-sim-cflags): Remove trace case.
- (--enable-sim-debug): New switch to set the debug values.
- * configure: Regenerate.
-
- * simops.c (trace_{input,output}_func): Rename from
- trace_{input,output}.
- (trace_{input,output}): Call trace_{input,output}_func if
- d10v_debug is non-zero.
- (SIZE_INSTRUCTION): Cut down to 8.
- (SIZE_OPERANDS): Cut down to 18.
- (SIZE_LOCATION): New value for size of line number, function name
- field.
- (init_text_p,text{,_start,_end}): New static variables for
- printing line number and function name.
- (exec_bfd): New external that run.c sets.
- (trace_input_func): Print line number and function name if
- available and if desired.
- (OP_4E09): Don't print out DBT message.
- (OP_5FE0): Set exception field to SIG_D10V_STOP.
- (OP_5F00): Set exception field to SIG_D10V_EXIT.
-
-Sat Sep 14 22:18:43 1996 Michael Meissner <meissner@tiktok.cygnus.com>
-
- * interp.c (do_2_short): If the instruction encodes jump->ins,
- don't do the second instruction if the jump succeeds.
-
-Fri Sep 13 22:35:19 1996 Michael Meissner <meissner@tiktok.cygnus.com>
-
- * simops.c (OP_5F00): Use unknown traps to print all GPRs,
- accumulators, PC, and F0/F1/C flags.
-
-Thu Sep 12 12:50:11 1996 Mark Alexander <marka@cygnus.com>
-
- * simops.c (OP_5F00): Fix problems with system calls.
-
-Thu Sep 12 12:19:28 1996 Michael Meissner <meissner@tiktok.cygnus.com>
-
- * simops.c (OP_5F00): Correct tracing information for trap.
-
-Wed Sep 11 18:55:50 1996 Michael Meissner <meissner@tiktok.cygnus.com>
-
- * Makefile.in (CSEARCH): Correctly find opcodes directory.
-
-Mon Sep 9 13:27:26 1996 Michael Meissner <meissner@tiktok.cygnus.com>
-
- * simops.c (trace_output): Properly align accumulator output.
- (OP_3{0,2,4}00): Properly parenthesize test expression. Add error
- if shift count is too high.
- (OP_4E{00,02,04,20,22,40,42}): Make tests agree with book.
- (OP_4E09): Make cpfg properly trace the input flags.
- (op_types): Add OP_FLAG_OUTPUT.
- (trace_{input,output}): Support OP_FLAG_OUTPUT.
- (OP_31000000): This ld2w varient is a 16-bit memory reference, not
- an 8-bit memory reference instruction for tracing purposes.
- (OP_201): Addi needs to set the carry.
-
-Fri Sep 6 17:56:17 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
-
- * simops.c (OP_2600, OP_2601): Changed min and max comparisons
- to use signed register values.
-
-Wed Sep 4 11:35:17 1996 Michael Meissner <meissner@tiktok.cygnus.com>
-
- * d10v_sim.h (DEBUG_*): Add bit flags for controlling debug
- output.
- (_ins_type): New enumeration to specify which container an
- instruction is in, and whether it is part of a parallel operation.
- (_state): Add ins_type field.
- ({,u}int{8,16,32,64}): Use limits.h to size the appropriate types.
- (ins_type_counters): Counters for the various instruction types.
- ({left,right}_nops): Counters for the number of nops in each
- container.
- (d10v_debug): New variable to indicate whether debugging is turned
- on.
-
- * simops.c: (all functions): Change all #ifdef DEBUG code so that
- the input and output values can be traced, along with the
- instruction type. Make the -t option enable tracing.
- (all functions): Change printf calls to use the printf_filtered
- function in the callback table.
-
- * interp.c (_leftright): New enumeration to say whether 2 short
- instructions are done left first or right first.
- (do_{long,2_short,parallel}): Indicate in the machine state which
- type of instruction this is. Count each of the types of
- instructions executed.
- (sim_size): Only print the memory sizes if DEBUG_MEMSIZE debug
- flag is set.
- (sim_resume): Pass left/right indication to do_2_short.
- (all functions): Change printf calls to use the printf_filtered
- function in the callback table.
- (sim_trace): Turn on debug flag if DEBUG was defined, and call
- sim_resume.
- (sim_info): Print out statistics on instructions.
- (sim_{trace,create_inferior}): Eliminate extraneous output unless
- debugging.
- (sim_open): If args == -t and DEBUG was defined, set d10v_debug.
- Only initialize the hash table the first time sim_open is called.
-
- * Makefile.in: Make objects depend on d10v_sim.h.
- ({,SIM_}CFLAGS): Include configure dependent switches. Setting
- CFLAGS does not override host/target defines or SIM_CFLAGS.
- (CC_FOR_BUILD,gencode): Use CC_FOR_BUILD to compile gencode.
- (run): By default, the math library is not needed to be linked
- in.
- ({BFD,LIBIBERTY}_LIB): Define as variables so they can be
- overridden.
- (VPATH): Don't set to anything but @srcdir@ to work with non-GNU
- makes.
- ({run,callback}.o): Provide explicit paths to their appropriate
- source directories.
- (gencode{,.o},d10v-opc.o): Split compilation into creating object
- and linking. Instead of linking in libopcodes.a, just compile
- d10v-opc.o directly to handle canadian cross.
- (CSEARCH): Add opcodes directory.
-
- * configure.in (--enable-sim-cflags): New switch to allow user to
- set the defaults.
- (CC_FOR_BUILD): Deal with canadian crosses.
- * configure: Regenerate.
-
-Wed Sep 04 04:45:34 1996 Mark Alexander <marka@cygnus.com>
-
- * simops.c: Include correct syscall.h for d10v, not host's.
- Fix #ifdef SYS_stat.
-
-Tue Sep 3 14:00:04 1996 Michael Meissner <meissner@tiktok.cygnus.com>
-
- * simops.c (OP_5F00): Wrap all SYS_xxx traps with #ifdef.
- Add trap 2 to be printf and trap 3 to be putchar.
-
-Wed Aug 28 21:42:34 1996 Mark Alexander <marka@cygnus.com>
-
- * Makefile.in, d10v_sim.h, interp.c, simops.c: Add support
- for low-level system calls.
-
-Wed Aug 28 17:33:19 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
-
- * Makefile.in, d10v_sim.h, interp.c: Fix byte-order problems.
-
-Mon Aug 26 18:30:28 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
-
- * d10v_sim.h (SEXT32): Added.
- * interp.c: Commented out printfs.
- * simops.c: Fixed error in sb and st2w.
-
-Thu Aug 15 13:30:03 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
-
- * Makefile.in, d10v_sim.h, interp.c, simops.c: Added remaining
- DSP instructions. Added modulo addressing.
-
-Sun Aug 11 12:57:15 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
-
- * Makefile.in, d10v_sim.h, interp.c, simops.c: Snapshot.
-
-Fri Aug 2 17:44:24 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
-
- * d10v_sim.h, simops.c: Snapshot.
-
-Thu Aug 1 17:05:24 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
-
- * ChangeLog, Makefile.in, configure, configure.in, d10v_sim.h,
- gencode.c, interp.c, simops.c: Created.
-
diff --git a/sim/d10v/Makefile.in b/sim/d10v/Makefile.in
deleted file mode 100644
index 82d7e11ceb3..00000000000
--- a/sim/d10v/Makefile.in
+++ /dev/null
@@ -1,53 +0,0 @@
-# Makefile template for Configure for the D10v sim library.
-# Copyright (C) 1996, 1997 Free Software Foundation, Inc.
-# Written by Cygnus Support.
-#
-# This program is free software; you can redistribute it and/or modify
-# it under the terms of the GNU General Public License as published by
-# the Free Software Foundation; either version 2 of the License, or
-# (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
-## COMMON_PRE_CONFIG_FRAG
-
-SIM_OBJS = interp.o table.o simops.o endian.o sim-load.o
-SIM_EXTRA_CLEAN = clean-extra
-SIM_EXTRA_CFLAGS = -DNEED_UI_LOOP_HOOK -DSIM_HAVE_ENVIRONMENT
-
-INCLUDE = d10v_sim.h $(srcroot)/include/callback.h targ-vals.h endian.c
-
-# This selects the d10v newlib/libgloss syscall definitions.
-NL_TARGET = -DNL_TARGET_d10v
-
-## COMMON_POST_CONFIG_FRAG
-
-simops.h: gencode
- ./gencode -h >$@
-
-table.c: gencode simops.h
- ./gencode >$@
-
-gencode.o: gencode.c $(INCLUDE)
- $(CC_FOR_BUILD) $(BUILD_CFLAGS) -c $(srcdir)/gencode.c
-
-d10v-opc.o: $(srcdir)/../../opcodes/d10v-opc.c
- $(CC_FOR_BUILD) $(BUILD_CFLAGS) -c $(srcdir)/../../opcodes/d10v-opc.c
-
-gencode: gencode.o d10v-opc.o
- $(CC_FOR_BUILD) $(BUILD_CFLAGS) -o gencode gencode.o d10v-opc.o $(BUILD_LIB)
-
-clean-extra:
- rm -f table.c simops.h gencode
-
-interp.o: interp.c table.c $(INCLUDE)
-simops.o: simops.c simops.h $(INCLUDE)
-endian.o: endian.c $(INCLUDE)
-table.o: table.c
diff --git a/sim/d10v/acconfig.h b/sim/d10v/acconfig.h
deleted file mode 100644
index f9b87a10c60..00000000000
--- a/sim/d10v/acconfig.h
+++ /dev/null
@@ -1,15 +0,0 @@
-
-/* Define to 1 if NLS is requested. */
-#undef ENABLE_NLS
-
-/* Define as 1 if you have catgets and don't want to use GNU gettext. */
-#undef HAVE_CATGETS
-
-/* Define as 1 if you have gettext and don't want to use GNU gettext. */
-#undef HAVE_GETTEXT
-
-/* Define as 1 if you have the stpcpy function. */
-#undef HAVE_STPCPY
-
-/* Define if your locale.h file contains LC_MESSAGES. */
-#undef HAVE_LC_MESSAGES
diff --git a/sim/d10v/config.in b/sim/d10v/config.in
deleted file mode 100644
index 1f87a2bee4e..00000000000
--- a/sim/d10v/config.in
+++ /dev/null
@@ -1,158 +0,0 @@
-/* config.in. Generated automatically from configure.in by autoheader. */
-
-/* Define if using alloca.c. */
-#undef C_ALLOCA
-
-/* Define to empty if the keyword does not work. */
-#undef const
-
-/* Define to one of _getb67, GETB67, getb67 for Cray-2 and Cray-YMP systems.
- This function is required for alloca.c support on those systems. */
-#undef CRAY_STACKSEG_END
-
-/* Define if you have alloca, as a function or macro. */
-#undef HAVE_ALLOCA
-
-/* Define if you have <alloca.h> and it should be used (not on Ultrix). */
-#undef HAVE_ALLOCA_H
-
-/* Define if you have a working `mmap' system call. */
-#undef HAVE_MMAP
-
-/* Define as __inline if that's what the C compiler calls it. */
-#undef inline
-
-/* Define to `long' if <sys/types.h> doesn't define. */
-#undef off_t
-
-/* Define if you need to in order for stat and other things to work. */
-#undef _POSIX_SOURCE
-
-/* Define as the return type of signal handlers (int or void). */
-#undef RETSIGTYPE
-
-/* Define to `unsigned' if <sys/types.h> doesn't define. */
-#undef size_t
-
-/* If using the C implementation of alloca, define if you know the
- direction of stack growth for your system; otherwise it will be
- automatically deduced at run-time.
- STACK_DIRECTION > 0 => grows toward higher addresses
- STACK_DIRECTION < 0 => grows toward lower addresses
- STACK_DIRECTION = 0 => direction of growth unknown
- */
-#undef STACK_DIRECTION
-
-/* Define if you have the ANSI C header files. */
-#undef STDC_HEADERS
-
-/* Define to 1 if NLS is requested. */
-#undef ENABLE_NLS
-
-/* Define as 1 if you have gettext and don't want to use GNU gettext. */
-#undef HAVE_GETTEXT
-
-/* Define as 1 if you have the stpcpy function. */
-#undef HAVE_STPCPY
-
-/* Define if your locale.h file contains LC_MESSAGES. */
-#undef HAVE_LC_MESSAGES
-
-/* Define if you have the __argz_count function. */
-#undef HAVE___ARGZ_COUNT
-
-/* Define if you have the __argz_next function. */
-#undef HAVE___ARGZ_NEXT
-
-/* Define if you have the __argz_stringify function. */
-#undef HAVE___ARGZ_STRINGIFY
-
-/* Define if you have the __setfpucw function. */
-#undef HAVE___SETFPUCW
-
-/* Define if you have the dcgettext function. */
-#undef HAVE_DCGETTEXT
-
-/* Define if you have the getcwd function. */
-#undef HAVE_GETCWD
-
-/* Define if you have the getpagesize function. */
-#undef HAVE_GETPAGESIZE
-
-/* Define if you have the getrusage function. */
-#undef HAVE_GETRUSAGE
-
-/* Define if you have the munmap function. */
-#undef HAVE_MUNMAP
-
-/* Define if you have the putenv function. */
-#undef HAVE_PUTENV
-
-/* Define if you have the setenv function. */
-#undef HAVE_SETENV
-
-/* Define if you have the setlocale function. */
-#undef HAVE_SETLOCALE
-
-/* Define if you have the sigaction function. */
-#undef HAVE_SIGACTION
-
-/* Define if you have the stpcpy function. */
-#undef HAVE_STPCPY
-
-/* Define if you have the strcasecmp function. */
-#undef HAVE_STRCASECMP
-
-/* Define if you have the strchr function. */
-#undef HAVE_STRCHR
-
-/* Define if you have the time function. */
-#undef HAVE_TIME
-
-/* Define if you have the <argz.h> header file. */
-#undef HAVE_ARGZ_H
-
-/* Define if you have the <fcntl.h> header file. */
-#undef HAVE_FCNTL_H
-
-/* Define if you have the <fpu_control.h> header file. */
-#undef HAVE_FPU_CONTROL_H
-
-/* Define if you have the <limits.h> header file. */
-#undef HAVE_LIMITS_H
-
-/* Define if you have the <locale.h> header file. */
-#undef HAVE_LOCALE_H
-
-/* Define if you have the <malloc.h> header file. */
-#undef HAVE_MALLOC_H
-
-/* Define if you have the <nl_types.h> header file. */
-#undef HAVE_NL_TYPES_H
-
-/* Define if you have the <stdlib.h> header file. */
-#undef HAVE_STDLIB_H
-
-/* Define if you have the <string.h> header file. */
-#undef HAVE_STRING_H
-
-/* Define if you have the <strings.h> header file. */
-#undef HAVE_STRINGS_H
-
-/* Define if you have the <sys/param.h> header file. */
-#undef HAVE_SYS_PARAM_H
-
-/* Define if you have the <sys/resource.h> header file. */
-#undef HAVE_SYS_RESOURCE_H
-
-/* Define if you have the <sys/time.h> header file. */
-#undef HAVE_SYS_TIME_H
-
-/* Define if you have the <time.h> header file. */
-#undef HAVE_TIME_H
-
-/* Define if you have the <unistd.h> header file. */
-#undef HAVE_UNISTD_H
-
-/* Define if you have the <values.h> header file. */
-#undef HAVE_VALUES_H
diff --git a/sim/d10v/configure b/sim/d10v/configure
deleted file mode 100755
index a106c4cfd33..00000000000
--- a/sim/d10v/configure
+++ /dev/null
@@ -1,4062 +0,0 @@
-#! /bin/sh
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-sim_inline="-DDEFAULT_INLINE=0"
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-# This file is derived from `gettext.m4'. The difference is that the
-# included macros assume Cygnus-style source and build trees.
-
-# Macro to add for using GNU gettext.
-# Ulrich Drepper <drepper@cygnus.com>, 1995.
-#
-# This file file be copied and used freely without restrictions. It can
-# be used in projects which are not available under the GNU Public License
-# but which still want to provide support for the GNU gettext functionality.
-# Please note that the actual code is *not* freely available.
-
-# serial 3
-
-
-
-
-
-# Search path for a program which passes the given test.
-# Ulrich Drepper <drepper@cygnus.com>, 1996.
-#
-# This file file be copied and used freely without restrictions. It can
-# be used in projects which are not available under the GNU Public License
-# but which still want to provide support for the GNU gettext functionality.
-# Please note that the actual code is *not* freely available.
-
-# serial 1
-
-
-
-# Check whether LC_MESSAGES is available in <locale.h>.
-# Ulrich Drepper <drepper@cygnus.com>, 1995.
-#
-# This file file be copied and used freely without restrictions. It can
-# be used in projects which are not available under the GNU Public License
-# but which still want to provide support for the GNU gettext functionality.
-# Please note that the actual code is *not* freely available.
-
-# serial 1
-
-
-
-
-
-
-# Guess values for system-dependent variables and create Makefiles.
-# Generated automatically using autoconf version 2.13
-# Copyright (C) 1992, 93, 94, 95, 96 Free Software Foundation, Inc.
-#
-# This configure script is free software; the Free Software Foundation
-# gives unlimited permission to copy, distribute and modify it.
-
-# Defaults:
-ac_help=
-ac_default_prefix=/usr/local
-# Any additions from configure.in:
-ac_help="$ac_help
- --disable-nls do not use Native Language Support"
-ac_help="$ac_help
- --with-included-gettext use the GNU gettext library included here"
-ac_help="$ac_help
- --enable-maintainer-mode Enable developer functionality."
-ac_help="$ac_help
- --enable-sim-bswap Use Host specific BSWAP instruction."
-ac_help="$ac_help
- --enable-sim-cflags=opts Extra CFLAGS for use in building simulator"
-ac_help="$ac_help
- --enable-sim-debug=opts Enable debugging flags"
-ac_help="$ac_help
- --enable-sim-stdio Specify whether to use stdio for console input/output."
-ac_help="$ac_help
- --enable-sim-trace=opts Enable tracing flags"
-ac_help="$ac_help
- --enable-sim-profile=opts Enable profiling flags"
-ac_help="$ac_help
- --enable-build-warnings[=LIST] Enable build-time compiler warnings"
-
-# Initialize some variables set by options.
-# The variables have the same names as the options, with
-# dashes changed to underlines.
-build=NONE
-cache_file=./config.cache
-exec_prefix=NONE
-host=NONE
-no_create=
-nonopt=NONE
-no_recursion=
-prefix=NONE
-program_prefix=NONE
-program_suffix=NONE
-program_transform_name=s,x,x,
-silent=
-site=
-sitefile=
-srcdir=
-target=NONE
-verbose=
-x_includes=NONE
-x_libraries=NONE
-bindir='${exec_prefix}/bin'
-sbindir='${exec_prefix}/sbin'
-libexecdir='${exec_prefix}/libexec'
-datadir='${prefix}/share'
-sysconfdir='${prefix}/etc'
-sharedstatedir='${prefix}/com'
-localstatedir='${prefix}/var'
-libdir='${exec_prefix}/lib'
-includedir='${prefix}/include'
-oldincludedir='/usr/include'
-infodir='${prefix}/info'
-mandir='${prefix}/man'
-
-# Initialize some other variables.
-subdirs=
-MFLAGS= MAKEFLAGS=
-SHELL=${CONFIG_SHELL-/bin/sh}
-# Maximum number of lines to put in a shell here document.
-ac_max_here_lines=12
-
-ac_prev=
-for ac_option
-do
-
- # If the previous option needs an argument, assign it.
- if test -n "$ac_prev"; then
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- ac_prev=
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-
- case "$ac_option" in
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- *) ac_optarg= ;;
- esac
-
- # Accept the important Cygnus configure options, so we can diagnose typos.
-
- case "$ac_option" in
-
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- ac_prev=bindir ;;
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- ac_prev=build ;;
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-}
-{ /* Someone thinks the Sun supposedly-ANSI compiler will reject this. */
- int x[] = {25, 17};
- const int *foo = &x[0];
- ++foo;
-}
-{ /* Sun SC1.0 ANSI compiler rejects this -- but not the above. */
- typedef const int *iptr;
- iptr p = 0;
- ++p;
-}
-{ /* AIX XL C 1.02.0.0 rejects this saying
- "k.c", line 2.27: 1506-025 (S) Operand must be a modifiable lvalue. */
- struct s { int j; const int *ap[3]; };
- struct s *b; b->j = 5;
-}
-{ /* ULTRIX-32 V3.1 (Rev 9) vcc rejects this */
- const int foo = 10;
-}
-
-; return 0; }
-EOF
-if { (eval echo configure:967: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
- rm -rf conftest*
- ac_cv_c_const=yes
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- ac_cv_c_const=no
-fi
-rm -f conftest*
-fi
-
-echo "$ac_t""$ac_cv_c_const" 1>&6
-if test $ac_cv_c_const = no; then
- cat >> confdefs.h <<\EOF
-#define const
-EOF
-
-fi
-
-echo $ac_n "checking for inline""... $ac_c" 1>&6
-echo "configure:988: checking for inline" >&5
-if eval "test \"`echo '$''{'ac_cv_c_inline'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- ac_cv_c_inline=no
-for ac_kw in inline __inline__ __inline; do
- cat > conftest.$ac_ext <<EOF
-#line 995 "configure"
-#include "confdefs.h"
-
-int main() {
-} $ac_kw foo() {
-; return 0; }
-EOF
-if { (eval echo configure:1002: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
- rm -rf conftest*
- ac_cv_c_inline=$ac_kw; break
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
-fi
-rm -f conftest*
-done
-
-fi
-
-echo "$ac_t""$ac_cv_c_inline" 1>&6
-case "$ac_cv_c_inline" in
- inline | yes) ;;
- no) cat >> confdefs.h <<\EOF
-#define inline
-EOF
- ;;
- *) cat >> confdefs.h <<EOF
-#define inline $ac_cv_c_inline
-EOF
- ;;
-esac
-
-echo $ac_n "checking for off_t""... $ac_c" 1>&6
-echo "configure:1028: checking for off_t" >&5
-if eval "test \"`echo '$''{'ac_cv_type_off_t'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1033 "configure"
-#include "confdefs.h"
-#include <sys/types.h>
-#if STDC_HEADERS
-#include <stdlib.h>
-#include <stddef.h>
-#endif
-EOF
-if (eval "$ac_cpp conftest.$ac_ext") 2>&5 |
- egrep "(^|[^a-zA-Z_0-9])off_t[^a-zA-Z_0-9]" >/dev/null 2>&1; then
- rm -rf conftest*
- ac_cv_type_off_t=yes
-else
- rm -rf conftest*
- ac_cv_type_off_t=no
-fi
-rm -f conftest*
-
-fi
-echo "$ac_t""$ac_cv_type_off_t" 1>&6
-if test $ac_cv_type_off_t = no; then
- cat >> confdefs.h <<\EOF
-#define off_t long
-EOF
-
-fi
-
-echo $ac_n "checking for size_t""... $ac_c" 1>&6
-echo "configure:1061: checking for size_t" >&5
-if eval "test \"`echo '$''{'ac_cv_type_size_t'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1066 "configure"
-#include "confdefs.h"
-#include <sys/types.h>
-#if STDC_HEADERS
-#include <stdlib.h>
-#include <stddef.h>
-#endif
-EOF
-if (eval "$ac_cpp conftest.$ac_ext") 2>&5 |
- egrep "(^|[^a-zA-Z_0-9])size_t[^a-zA-Z_0-9]" >/dev/null 2>&1; then
- rm -rf conftest*
- ac_cv_type_size_t=yes
-else
- rm -rf conftest*
- ac_cv_type_size_t=no
-fi
-rm -f conftest*
-
-fi
-echo "$ac_t""$ac_cv_type_size_t" 1>&6
-if test $ac_cv_type_size_t = no; then
- cat >> confdefs.h <<\EOF
-#define size_t unsigned
-EOF
-
-fi
-
-# The Ultrix 4.2 mips builtin alloca declared by alloca.h only works
-# for constant arguments. Useless!
-echo $ac_n "checking for working alloca.h""... $ac_c" 1>&6
-echo "configure:1096: checking for working alloca.h" >&5
-if eval "test \"`echo '$''{'ac_cv_header_alloca_h'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1101 "configure"
-#include "confdefs.h"
-#include <alloca.h>
-int main() {
-char *p = alloca(2 * sizeof(int));
-; return 0; }
-EOF
-if { (eval echo configure:1108: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- rm -rf conftest*
- ac_cv_header_alloca_h=yes
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- ac_cv_header_alloca_h=no
-fi
-rm -f conftest*
-fi
-
-echo "$ac_t""$ac_cv_header_alloca_h" 1>&6
-if test $ac_cv_header_alloca_h = yes; then
- cat >> confdefs.h <<\EOF
-#define HAVE_ALLOCA_H 1
-EOF
-
-fi
-
-echo $ac_n "checking for alloca""... $ac_c" 1>&6
-echo "configure:1129: checking for alloca" >&5
-if eval "test \"`echo '$''{'ac_cv_func_alloca_works'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1134 "configure"
-#include "confdefs.h"
-
-#ifdef __GNUC__
-# define alloca __builtin_alloca
-#else
-# ifdef _MSC_VER
-# include <malloc.h>
-# define alloca _alloca
-# else
-# if HAVE_ALLOCA_H
-# include <alloca.h>
-# else
-# ifdef _AIX
- #pragma alloca
-# else
-# ifndef alloca /* predefined by HP cc +Olibcalls */
-char *alloca ();
-# endif
-# endif
-# endif
-# endif
-#endif
-
-int main() {
-char *p = (char *) alloca(1);
-; return 0; }
-EOF
-if { (eval echo configure:1162: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- rm -rf conftest*
- ac_cv_func_alloca_works=yes
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- ac_cv_func_alloca_works=no
-fi
-rm -f conftest*
-fi
-
-echo "$ac_t""$ac_cv_func_alloca_works" 1>&6
-if test $ac_cv_func_alloca_works = yes; then
- cat >> confdefs.h <<\EOF
-#define HAVE_ALLOCA 1
-EOF
-
-fi
-
-if test $ac_cv_func_alloca_works = no; then
- # The SVR3 libPW and SVR4 libucb both contain incompatible functions
- # that cause trouble. Some versions do not even contain alloca or
- # contain a buggy version. If you still want to use their alloca,
- # use ar to extract alloca.o from them instead of compiling alloca.c.
- ALLOCA=alloca.${ac_objext}
- cat >> confdefs.h <<\EOF
-#define C_ALLOCA 1
-EOF
-
-
-echo $ac_n "checking whether alloca needs Cray hooks""... $ac_c" 1>&6
-echo "configure:1194: checking whether alloca needs Cray hooks" >&5
-if eval "test \"`echo '$''{'ac_cv_os_cray'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1199 "configure"
-#include "confdefs.h"
-#if defined(CRAY) && ! defined(CRAY2)
-webecray
-#else
-wenotbecray
-#endif
-
-EOF
-if (eval "$ac_cpp conftest.$ac_ext") 2>&5 |
- egrep "webecray" >/dev/null 2>&1; then
- rm -rf conftest*
- ac_cv_os_cray=yes
-else
- rm -rf conftest*
- ac_cv_os_cray=no
-fi
-rm -f conftest*
-
-fi
-
-echo "$ac_t""$ac_cv_os_cray" 1>&6
-if test $ac_cv_os_cray = yes; then
-for ac_func in _getb67 GETB67 getb67; do
- echo $ac_n "checking for $ac_func""... $ac_c" 1>&6
-echo "configure:1224: checking for $ac_func" >&5
-if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1229 "configure"
-#include "confdefs.h"
-/* System header to define __stub macros and hopefully few prototypes,
- which can conflict with char $ac_func(); below. */
-#include <assert.h>
-/* Override any gcc2 internal prototype to avoid an error. */
-/* We use char because int might match the return type of a gcc2
- builtin and then its argument prototype would still apply. */
-char $ac_func();
-
-int main() {
-
-/* The GNU C library defines this for functions which it implements
- to always fail with ENOSYS. Some functions are actually named
- something starting with __ and the normal name is an alias. */
-#if defined (__stub_$ac_func) || defined (__stub___$ac_func)
-choke me
-#else
-$ac_func();
-#endif
-
-; return 0; }
-EOF
-if { (eval echo configure:1252: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=yes"
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=no"
-fi
-rm -f conftest*
-fi
-
-if eval "test \"`echo '$ac_cv_func_'$ac_func`\" = yes"; then
- echo "$ac_t""yes" 1>&6
- cat >> confdefs.h <<EOF
-#define CRAY_STACKSEG_END $ac_func
-EOF
-
- break
-else
- echo "$ac_t""no" 1>&6
-fi
-
-done
-fi
-
-echo $ac_n "checking stack direction for C alloca""... $ac_c" 1>&6
-echo "configure:1279: checking stack direction for C alloca" >&5
-if eval "test \"`echo '$''{'ac_cv_c_stack_direction'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- if test "$cross_compiling" = yes; then
- ac_cv_c_stack_direction=0
-else
- cat > conftest.$ac_ext <<EOF
-#line 1287 "configure"
-#include "confdefs.h"
-find_stack_direction ()
-{
- static char *addr = 0;
- auto char dummy;
- if (addr == 0)
- {
- addr = &dummy;
- return find_stack_direction ();
- }
- else
- return (&dummy > addr) ? 1 : -1;
-}
-main ()
-{
- exit (find_stack_direction() < 0);
-}
-EOF
-if { (eval echo configure:1306: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null
-then
- ac_cv_c_stack_direction=1
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -fr conftest*
- ac_cv_c_stack_direction=-1
-fi
-rm -fr conftest*
-fi
-
-fi
-
-echo "$ac_t""$ac_cv_c_stack_direction" 1>&6
-cat >> confdefs.h <<EOF
-#define STACK_DIRECTION $ac_cv_c_stack_direction
-EOF
-
-fi
-
-for ac_hdr in unistd.h
-do
-ac_safe=`echo "$ac_hdr" | sed 'y%./+-%__p_%'`
-echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6
-echo "configure:1331: checking for $ac_hdr" >&5
-if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1336 "configure"
-#include "confdefs.h"
-#include <$ac_hdr>
-EOF
-ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:1341: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
-ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
-if test -z "$ac_err"; then
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=yes"
-else
- echo "$ac_err" >&5
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=no"
-fi
-rm -f conftest*
-fi
-if eval "test \"`echo '$ac_cv_header_'$ac_safe`\" = yes"; then
- echo "$ac_t""yes" 1>&6
- ac_tr_hdr=HAVE_`echo $ac_hdr | sed 'y%abcdefghijklmnopqrstuvwxyz./-%ABCDEFGHIJKLMNOPQRSTUVWXYZ___%'`
- cat >> confdefs.h <<EOF
-#define $ac_tr_hdr 1
-EOF
-
-else
- echo "$ac_t""no" 1>&6
-fi
-done
-
-for ac_func in getpagesize
-do
-echo $ac_n "checking for $ac_func""... $ac_c" 1>&6
-echo "configure:1370: checking for $ac_func" >&5
-if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1375 "configure"
-#include "confdefs.h"
-/* System header to define __stub macros and hopefully few prototypes,
- which can conflict with char $ac_func(); below. */
-#include <assert.h>
-/* Override any gcc2 internal prototype to avoid an error. */
-/* We use char because int might match the return type of a gcc2
- builtin and then its argument prototype would still apply. */
-char $ac_func();
-
-int main() {
-
-/* The GNU C library defines this for functions which it implements
- to always fail with ENOSYS. Some functions are actually named
- something starting with __ and the normal name is an alias. */
-#if defined (__stub_$ac_func) || defined (__stub___$ac_func)
-choke me
-#else
-$ac_func();
-#endif
-
-; return 0; }
-EOF
-if { (eval echo configure:1398: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=yes"
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=no"
-fi
-rm -f conftest*
-fi
-
-if eval "test \"`echo '$ac_cv_func_'$ac_func`\" = yes"; then
- echo "$ac_t""yes" 1>&6
- ac_tr_func=HAVE_`echo $ac_func | tr 'abcdefghijklmnopqrstuvwxyz' 'ABCDEFGHIJKLMNOPQRSTUVWXYZ'`
- cat >> confdefs.h <<EOF
-#define $ac_tr_func 1
-EOF
-
-else
- echo "$ac_t""no" 1>&6
-fi
-done
-
-echo $ac_n "checking for working mmap""... $ac_c" 1>&6
-echo "configure:1423: checking for working mmap" >&5
-if eval "test \"`echo '$''{'ac_cv_func_mmap_fixed_mapped'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- if test "$cross_compiling" = yes; then
- ac_cv_func_mmap_fixed_mapped=no
-else
- cat > conftest.$ac_ext <<EOF
-#line 1431 "configure"
-#include "confdefs.h"
-
-/* Thanks to Mike Haertel and Jim Avera for this test.
- Here is a matrix of mmap possibilities:
- mmap private not fixed
- mmap private fixed at somewhere currently unmapped
- mmap private fixed at somewhere already mapped
- mmap shared not fixed
- mmap shared fixed at somewhere currently unmapped
- mmap shared fixed at somewhere already mapped
- For private mappings, we should verify that changes cannot be read()
- back from the file, nor mmap's back from the file at a different
- address. (There have been systems where private was not correctly
- implemented like the infamous i386 svr4.0, and systems where the
- VM page cache was not coherent with the filesystem buffer cache
- like early versions of FreeBSD and possibly contemporary NetBSD.)
- For shared mappings, we should conversely verify that changes get
- propogated back to all the places they're supposed to be.
-
- Grep wants private fixed already mapped.
- The main things grep needs to know about mmap are:
- * does it exist and is it safe to write into the mmap'd area
- * how to use it (BSD variants) */
-#include <sys/types.h>
-#include <fcntl.h>
-#include <sys/mman.h>
-
-/* This mess was copied from the GNU getpagesize.h. */
-#ifndef HAVE_GETPAGESIZE
-# ifdef HAVE_UNISTD_H
-# include <unistd.h>
-# endif
-
-/* Assume that all systems that can run configure have sys/param.h. */
-# ifndef HAVE_SYS_PARAM_H
-# define HAVE_SYS_PARAM_H 1
-# endif
-
-# ifdef _SC_PAGESIZE
-# define getpagesize() sysconf(_SC_PAGESIZE)
-# else /* no _SC_PAGESIZE */
-# ifdef HAVE_SYS_PARAM_H
-# include <sys/param.h>
-# ifdef EXEC_PAGESIZE
-# define getpagesize() EXEC_PAGESIZE
-# else /* no EXEC_PAGESIZE */
-# ifdef NBPG
-# define getpagesize() NBPG * CLSIZE
-# ifndef CLSIZE
-# define CLSIZE 1
-# endif /* no CLSIZE */
-# else /* no NBPG */
-# ifdef NBPC
-# define getpagesize() NBPC
-# else /* no NBPC */
-# ifdef PAGESIZE
-# define getpagesize() PAGESIZE
-# endif /* PAGESIZE */
-# endif /* no NBPC */
-# endif /* no NBPG */
-# endif /* no EXEC_PAGESIZE */
-# else /* no HAVE_SYS_PARAM_H */
-# define getpagesize() 8192 /* punt totally */
-# endif /* no HAVE_SYS_PARAM_H */
-# endif /* no _SC_PAGESIZE */
-
-#endif /* no HAVE_GETPAGESIZE */
-
-#ifdef __cplusplus
-extern "C" { void *malloc(unsigned); }
-#else
-char *malloc();
-#endif
-
-int
-main()
-{
- char *data, *data2, *data3;
- int i, pagesize;
- int fd;
-
- pagesize = getpagesize();
-
- /*
- * First, make a file with some known garbage in it.
- */
- data = malloc(pagesize);
- if (!data)
- exit(1);
- for (i = 0; i < pagesize; ++i)
- *(data + i) = rand();
- umask(0);
- fd = creat("conftestmmap", 0600);
- if (fd < 0)
- exit(1);
- if (write(fd, data, pagesize) != pagesize)
- exit(1);
- close(fd);
-
- /*
- * Next, try to mmap the file at a fixed address which
- * already has something else allocated at it. If we can,
- * also make sure that we see the same garbage.
- */
- fd = open("conftestmmap", O_RDWR);
- if (fd < 0)
- exit(1);
- data2 = malloc(2 * pagesize);
- if (!data2)
- exit(1);
- data2 += (pagesize - ((int) data2 & (pagesize - 1))) & (pagesize - 1);
- if (data2 != mmap(data2, pagesize, PROT_READ | PROT_WRITE,
- MAP_PRIVATE | MAP_FIXED, fd, 0L))
- exit(1);
- for (i = 0; i < pagesize; ++i)
- if (*(data + i) != *(data2 + i))
- exit(1);
-
- /*
- * Finally, make sure that changes to the mapped area
- * do not percolate back to the file as seen by read().
- * (This is a bug on some variants of i386 svr4.0.)
- */
- for (i = 0; i < pagesize; ++i)
- *(data2 + i) = *(data2 + i) + 1;
- data3 = malloc(pagesize);
- if (!data3)
- exit(1);
- if (read(fd, data3, pagesize) != pagesize)
- exit(1);
- for (i = 0; i < pagesize; ++i)
- if (*(data + i) != *(data3 + i))
- exit(1);
- close(fd);
- unlink("conftestmmap");
- exit(0);
-}
-
-EOF
-if { (eval echo configure:1571: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null
-then
- ac_cv_func_mmap_fixed_mapped=yes
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -fr conftest*
- ac_cv_func_mmap_fixed_mapped=no
-fi
-rm -fr conftest*
-fi
-
-fi
-
-echo "$ac_t""$ac_cv_func_mmap_fixed_mapped" 1>&6
-if test $ac_cv_func_mmap_fixed_mapped = yes; then
- cat >> confdefs.h <<\EOF
-#define HAVE_MMAP 1
-EOF
-
-fi
-
-echo $ac_n "checking for Cygwin environment""... $ac_c" 1>&6
-echo "configure:1594: checking for Cygwin environment" >&5
-if eval "test \"`echo '$''{'ac_cv_cygwin'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1599 "configure"
-#include "confdefs.h"
-
-int main() {
-
-#ifndef __CYGWIN__
-#define __CYGWIN__ __CYGWIN32__
-#endif
-return __CYGWIN__;
-; return 0; }
-EOF
-if { (eval echo configure:1610: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
- rm -rf conftest*
- ac_cv_cygwin=yes
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- ac_cv_cygwin=no
-fi
-rm -f conftest*
-rm -f conftest*
-fi
-
-echo "$ac_t""$ac_cv_cygwin" 1>&6
-CYGWIN=
-test "$ac_cv_cygwin" = yes && CYGWIN=yes
-echo $ac_n "checking for mingw32 environment""... $ac_c" 1>&6
-echo "configure:1627: checking for mingw32 environment" >&5
-if eval "test \"`echo '$''{'ac_cv_mingw32'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1632 "configure"
-#include "confdefs.h"
-
-int main() {
-return __MINGW32__;
-; return 0; }
-EOF
-if { (eval echo configure:1639: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
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- ac_cv_mingw32=yes
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- ac_cv_mingw32=no
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-rm -f conftest*
-rm -f conftest*
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-
-echo "$ac_t""$ac_cv_mingw32" 1>&6
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-
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-
-ac_aux_dir=
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- ac_install_sh="$ac_aux_dir/install.sh -c"
- break
- fi
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-if test -z "$ac_aux_dir"; then
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-fi
-ac_config_guess=$ac_aux_dir/config.guess
-ac_config_sub=$ac_aux_dir/config.sub
-ac_configure=$ac_aux_dir/configure # This should be Cygnus configure.
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-
-# Do some error checking and defaulting for the host and target type.
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-#
-# The rules are:
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-
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-esac
-
-
-# Make sure we can run config.sub.
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-
-echo $ac_n "checking host system type""... $ac_c" 1>&6
-echo "configure:1706: checking host system type" >&5
-
-host_alias=$host
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- case $nonopt in
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- if host_alias=`${CONFIG_SHELL-/bin/sh} $ac_config_guess`; then :
- else { echo "configure: error: can not guess host type; you must specify one" 1>&2; exit 1; }
- fi ;;
- *) host_alias=$nonopt ;;
- esac ;;
-esac
-
-host=`${CONFIG_SHELL-/bin/sh} $ac_config_sub $host_alias`
-host_cpu=`echo $host | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\1/'`
-host_vendor=`echo $host | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\2/'`
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-echo "$ac_t""$host" 1>&6
-
-echo $ac_n "checking target system type""... $ac_c" 1>&6
-echo "configure:1727: checking target system type" >&5
-
-target_alias=$target
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- case $nonopt in
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- *) target_alias=$nonopt ;;
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-esac
-
-target=`${CONFIG_SHELL-/bin/sh} $ac_config_sub $target_alias`
-target_cpu=`echo $target | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\1/'`
-target_vendor=`echo $target | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\2/'`
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-
-echo $ac_n "checking build system type""... $ac_c" 1>&6
-echo "configure:1745: checking build system type" >&5
-
-build_alias=$build
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- *) build_alias=$nonopt ;;
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-
-build=`${CONFIG_SHELL-/bin/sh} $ac_config_sub $build_alias`
-build_cpu=`echo $build | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\1/'`
-build_vendor=`echo $build | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\2/'`
-build_os=`echo $build | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\3/'`
-echo "$ac_t""$build" 1>&6
-
-test "$host_alias" != "$target_alias" &&
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- program_transform_name="`echo $program_transform_name|sed -f conftestsed`"
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- program_transform_name="s,\$\$,${program_suffix},; $program_transform_name"
-
-# sed with no file args requires a program.
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-
-# Extract the first word of "gcc", so it can be a program name with args.
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-echo "configure:1789: checking for $ac_word" >&5
-if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then
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-else
- if test -n "$CC"; then
- ac_cv_prog_CC="$CC" # Let the user override the test.
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- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
- ac_dummy="$PATH"
- for ac_dir in $ac_dummy; do
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- fi
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- IFS="$ac_save_ifs"
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-if test -n "$CC"; then
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- echo "$ac_t""no" 1>&6
-fi
-
-if test -z "$CC"; then
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- if test -n "$CC"; then
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- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
- ac_prog_rejected=no
- ac_dummy="$PATH"
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- ac_prog_rejected=yes
- continue
- fi
- ac_cv_prog_CC="cc"
- break
- fi
- done
- IFS="$ac_save_ifs"
-if test $ac_prog_rejected = yes; then
- # We found a bogon in the path, so make sure we never use it.
- set dummy $ac_cv_prog_CC
- shift
- if test $# -gt 0; then
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- # first if we set CC to just the basename; use the full file name.
- shift
- set dummy "$ac_dir/$ac_word" "$@"
- shift
- ac_cv_prog_CC="$@"
- fi
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-fi
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-if test -n "$CC"; then
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-else
- echo "$ac_t""no" 1>&6
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-
- if test -z "$CC"; then
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-echo "configure:1870: checking for $ac_word" >&5
-if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- if test -n "$CC"; then
- ac_cv_prog_CC="$CC" # Let the user override the test.
-else
- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
- ac_dummy="$PATH"
- for ac_dir in $ac_dummy; do
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- if test -f $ac_dir/$ac_word; then
- ac_cv_prog_CC="cl"
- break
- fi
- done
- IFS="$ac_save_ifs"
-fi
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-CC="$ac_cv_prog_CC"
-if test -n "$CC"; then
- echo "$ac_t""$CC" 1>&6
-else
- echo "$ac_t""no" 1>&6
-fi
- ;;
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-
-echo $ac_n "checking whether the C compiler ($CC $CFLAGS $LDFLAGS) works""... $ac_c" 1>&6
-echo "configure:1902: checking whether the C compiler ($CC $CFLAGS $LDFLAGS) works" >&5
-
-ac_ext=c
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-cross_compiling=$ac_cv_prog_cc_cross
-
-cat > conftest.$ac_ext << EOF
-
-#line 1913 "configure"
-#include "confdefs.h"
-
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- ac_cv_prog_cc_works=yes
- # If we can't run a trivial program, we are probably using a cross compiler.
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- else
- ac_cv_prog_cc_cross=yes
- fi
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- ac_cv_prog_cc_works=no
-fi
-rm -fr conftest*
-ac_ext=c
-# CFLAGS is not in ac_cpp because -g, -O, etc. are not valid cpp options.
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-ac_compile='${CC-cc} -c $CFLAGS $CPPFLAGS conftest.$ac_ext 1>&5'
-ac_link='${CC-cc} -o conftest${ac_exeext} $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS 1>&5'
-cross_compiling=$ac_cv_prog_cc_cross
-
-echo "$ac_t""$ac_cv_prog_cc_works" 1>&6
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-echo $ac_n "checking whether the C compiler ($CC $CFLAGS $LDFLAGS) is a cross-compiler""... $ac_c" 1>&6
-echo "configure:1944: checking whether the C compiler ($CC $CFLAGS $LDFLAGS) is a cross-compiler" >&5
-echo "$ac_t""$ac_cv_prog_cc_cross" 1>&6
-cross_compiling=$ac_cv_prog_cc_cross
-
-echo $ac_n "checking whether we are using GNU C""... $ac_c" 1>&6
-echo "configure:1949: checking whether we are using GNU C" >&5
-if eval "test \"`echo '$''{'ac_cv_prog_gcc'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.c <<EOF
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- yes;
-#endif
-EOF
-if { ac_try='${CC-cc} -E conftest.c'; { (eval echo configure:1958: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }; } | egrep yes >/dev/null 2>&1; then
- ac_cv_prog_gcc=yes
-else
- ac_cv_prog_gcc=no
-fi
-fi
-
-echo "$ac_t""$ac_cv_prog_gcc" 1>&6
-
-if test $ac_cv_prog_gcc = yes; then
- GCC=yes
-else
- GCC=
-fi
-
-ac_test_CFLAGS="${CFLAGS+set}"
-ac_save_CFLAGS="$CFLAGS"
-CFLAGS=
-echo $ac_n "checking whether ${CC-cc} accepts -g""... $ac_c" 1>&6
-echo "configure:1977: checking whether ${CC-cc} accepts -g" >&5
-if eval "test \"`echo '$''{'ac_cv_prog_cc_g'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- echo 'void f(){}' > conftest.c
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-else
- ac_cv_prog_cc_g=no
-fi
-rm -f conftest*
-
-fi
-
-echo "$ac_t""$ac_cv_prog_cc_g" 1>&6
-if test "$ac_test_CFLAGS" = set; then
- CFLAGS="$ac_save_CFLAGS"
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- if test "$GCC" = yes; then
- CFLAGS="-g -O2"
- else
- CFLAGS="-g"
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- if test "$GCC" = yes; then
- CFLAGS="-O2"
- else
- CFLAGS=
- fi
-fi
-
-# Find a good install program. We prefer a C program (faster),
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-# SunOS /usr/etc/install
-# IRIX /sbin/install
-# AIX /bin/install
-# AIX 4 /usr/bin/installbsd, which doesn't work without a -g flag
-# AFS /usr/afsws/bin/install, which mishandles nonexistent args
-# SVR4 /usr/ucb/install, which tries to use the nonexistent group "staff"
-# ./install, which can be erroneously created by make from ./install.sh.
-echo $ac_n "checking for a BSD compatible install""... $ac_c" 1>&6
-echo "configure:2020: checking for a BSD compatible install" >&5
-if test -z "$INSTALL"; then
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- echo $ac_n "(cached) $ac_c" 1>&6
-else
- IFS="${IFS= }"; ac_save_IFS="$IFS"; IFS=":"
- for ac_dir in $PATH; do
- # Account for people who put trailing slashes in PATH elements.
- case "$ac_dir/" in
- /|./|.//|/etc/*|/usr/sbin/*|/usr/etc/*|/sbin/*|/usr/afsws/bin/*|/usr/ucb/*) ;;
- *)
- # OSF1 and SCO ODT 3.0 have their own names for install.
- # Don't use installbsd from OSF since it installs stuff as root
- # by default.
- for ac_prog in ginstall scoinst install; do
- if test -f $ac_dir/$ac_prog; then
- if test $ac_prog = install &&
- grep dspmsg $ac_dir/$ac_prog >/dev/null 2>&1; then
- # AIX install. It has an incompatible calling convention.
- :
- else
- ac_cv_path_install="$ac_dir/$ac_prog -c"
- break 2
- fi
- fi
- done
- ;;
- esac
- done
- IFS="$ac_save_IFS"
-
-fi
- if test "${ac_cv_path_install+set}" = set; then
- INSTALL="$ac_cv_path_install"
- else
- # As a last resort, use the slow shell script. We don't cache a
- # path for INSTALL within a source directory, because that will
- # break other packages using the cache if that directory is
- # removed, or if the path is relative.
- INSTALL="$ac_install_sh"
- fi
-fi
-echo "$ac_t""$INSTALL" 1>&6
-
-# Use test -z because SunOS4 sh mishandles braces in ${var-val}.
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-
-test -z "$INSTALL_SCRIPT" && INSTALL_SCRIPT='${INSTALL_PROGRAM}'
-
-test -z "$INSTALL_DATA" && INSTALL_DATA='${INSTALL} -m 644'
-
-
-# Put a plausible default for CC_FOR_BUILD in Makefile.
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- CC_FOR_BUILD='$(CC)'
-else
- CC_FOR_BUILD=gcc
-fi
-
-
-
-
-AR=${AR-ar}
-
-# Extract the first word of "ranlib", so it can be a program name with args.
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-echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:2088: checking for $ac_word" >&5
-if eval "test \"`echo '$''{'ac_cv_prog_RANLIB'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- if test -n "$RANLIB"; then
- ac_cv_prog_RANLIB="$RANLIB" # Let the user override the test.
-else
- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
- ac_dummy="$PATH"
- for ac_dir in $ac_dummy; do
- test -z "$ac_dir" && ac_dir=.
- if test -f $ac_dir/$ac_word; then
- ac_cv_prog_RANLIB="ranlib"
- break
- fi
- done
- IFS="$ac_save_ifs"
- test -z "$ac_cv_prog_RANLIB" && ac_cv_prog_RANLIB=":"
-fi
-fi
-RANLIB="$ac_cv_prog_RANLIB"
-if test -n "$RANLIB"; then
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-else
- echo "$ac_t""no" 1>&6
-fi
-
-
-ALL_LINGUAS=
-
- for ac_hdr in argz.h limits.h locale.h nl_types.h malloc.h string.h \
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-do
-ac_safe=`echo "$ac_hdr" | sed 'y%./+-%__p_%'`
-echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6
-echo "configure:2123: checking for $ac_hdr" >&5
-if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 2128 "configure"
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-ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:2133: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
-ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
-if test -z "$ac_err"; then
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=yes"
-else
- echo "$ac_err" >&5
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=no"
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-if eval "test \"`echo '$ac_cv_header_'$ac_safe`\" = yes"; then
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- ac_tr_hdr=HAVE_`echo $ac_hdr | sed 'y%abcdefghijklmnopqrstuvwxyz./-%ABCDEFGHIJKLMNOPQRSTUVWXYZ___%'`
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-
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- echo "$ac_t""no" 1>&6
-fi
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-
- for ac_func in getcwd munmap putenv setenv setlocale strchr strcasecmp \
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-echo "configure:2163: checking for $ac_func" >&5
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- echo $ac_n "(cached) $ac_c" 1>&6
-else
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-
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-#else
-$ac_func();
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-
-; return 0; }
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-if { (eval echo configure:2191: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
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- eval "ac_cv_func_$ac_func=yes"
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=no"
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-
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- ac_tr_func=HAVE_`echo $ac_func | tr 'abcdefghijklmnopqrstuvwxyz' 'ABCDEFGHIJKLMNOPQRSTUVWXYZ'`
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-
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-
-
- if test "${ac_cv_func_stpcpy+set}" != "set"; then
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-echo "configure:2220: checking for $ac_func" >&5
-if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 2225 "configure"
-#include "confdefs.h"
-/* System header to define __stub macros and hopefully few prototypes,
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-/* Override any gcc2 internal prototype to avoid an error. */
-/* We use char because int might match the return type of a gcc2
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-char $ac_func();
-
-int main() {
-
-/* The GNU C library defines this for functions which it implements
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-#if defined (__stub_$ac_func) || defined (__stub___$ac_func)
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-#else
-$ac_func();
-#endif
-
-; return 0; }
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-
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-
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- # Extract the first word of "msgfmt", so it can be a program name with args.
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-
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-#endif
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-if { (eval echo configure:2546: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
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- echo "configure: failed program was:" >&5
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- ac_tr_func=HAVE_`echo $ac_func | tr 'abcdefghijklmnopqrstuvwxyz' 'ABCDEFGHIJKLMNOPQRSTUVWXYZ'`
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-
- # Extract the first word of "gmsgfmt", so it can be a program name with args.
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- ?:/*)
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- ;;
- *)
- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
- ac_dummy="$PATH"
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-
- # Extract the first word of "xgettext", so it can be a program name with args.
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- *)
- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS="${IFS}:"
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-else
- echo "$ac_t""no" 1>&6
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-
- cat > conftest.$ac_ext <<EOF
-#line 2641 "configure"
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-
-int main() {
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-if { (eval echo configure:2649: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
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- CATOBJEXT=.gmo
- DATADIRNAME=share
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- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- CATOBJEXT=.mo
- DATADIRNAME=lib
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-rm -f conftest*
- INSTOBJEXT=.mo
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-
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- echo "$ac_t""no" 1>&6
-fi
-
-
-
- if test "$CATOBJEXT" = "NONE"; then
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-
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- # Extract the first word of "msgfmt", so it can be a program name with args.
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- *)
- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS="${IFS}:"
- for ac_dir in $PATH; do
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- if test -f $ac_dir/$ac_word; then
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- fi
- fi
- done
- IFS="$ac_save_ifs"
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-else
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-
- # Extract the first word of "gmsgfmt", so it can be a program name with args.
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-echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:2715: checking for $ac_word" >&5
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- echo $ac_n "(cached) $ac_c" 1>&6
-else
- case "$GMSGFMT" in
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- ac_cv_path_GMSGFMT="$GMSGFMT" # Let the user override the test with a path.
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- ?:/*)
- ac_cv_path_GMSGFMT="$GMSGFMT" # Let the user override the test with a dos path.
- ;;
- *)
- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
- ac_dummy="$PATH"
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- IFS="$ac_save_ifs"
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-
- # Extract the first word of "xgettext", so it can be a program name with args.
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-echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:2751: checking for $ac_word" >&5
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-else
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- *)
- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS="${IFS}:"
- for ac_dir in $PATH; do
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-else
- echo "$ac_t""no" 1>&6
-fi
-
-
- USE_INCLUDED_LIBINTL=yes
- CATOBJEXT=.gmo
- INSTOBJEXT=.mo
- DATADIRNAME=share
- INTLDEPS='$(top_builddir)/../intl/libintl.a'
- INTLLIBS=$INTLDEPS
- LIBS=`echo $LIBS | sed -e 's/-lintl//'`
- nls_cv_header_intl=libintl.h
- nls_cv_header_libgt=libgettext.h
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-
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- : ;
- else
- echo "$ac_t""found xgettext programs is not GNU xgettext; ignore it" 1>&6
- XGETTEXT=":"
- fi
- fi
-
- # We need to process the po/ directory.
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- else
- DATADIRNAME=share
- nls_cv_header_intl=libintl.h
- nls_cv_header_libgt=libgettext.h
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-
- # If this is used in GNU gettext we have to set USE_NLS to `yes'
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-
- for lang in $ALL_LINGUAS; do
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- POFILES="$POFILES $lang.po"
- done
-
-
-
-
-
-
-
-
-
-
-
-
-
-
- if test "x$CATOBJEXT" != "x"; then
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- LINGUAS=
- else
- echo $ac_n "checking for catalogs to be installed""... $ac_c" 1>&6
-echo "configure:2841: checking for catalogs to be installed" >&5
- NEW_LINGUAS=
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- esac
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- LINGUAS=$NEW_LINGUAS
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- fi
-
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- fi
- fi
-
- if test $ac_cv_header_locale_h = yes; then
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- else
- INCLUDE_LOCALE_H="\
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-
-
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-echo $ac_n "checking for linux/version.h""... $ac_c" 1>&6
-echo "configure:2869: checking for linux/version.h" >&5
-if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then
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-{ (eval echo configure:2879: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
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- eval "ac_cv_header_$ac_safe=yes"
-else
- echo "$ac_err" >&5
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=no"
-fi
-rm -f conftest*
-fi
-if eval "test \"`echo '$ac_cv_header_'$ac_safe`\" = yes"; then
- echo "$ac_t""yes" 1>&6
- msgformat=linux
-else
- echo "$ac_t""no" 1>&6
-msgformat=xopen
-fi
-
-
- sed -e '/^#/d' $srcdir/$msgformat-msg.sed > po2msg.sed
- fi
- sed -e '/^#.*[^\\]$/d' -e '/^#$/d' \
- $srcdir/po2tbl.sed.in > po2tbl.sed
- fi
-
- if test "$PACKAGE" = "gettext"; then
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- GT_YES=
- else
- GT_NO=
- GT_YES="#YES#"
- fi
-
-
-
- MKINSTALLDIRS="\$(srcdir)/../../mkinstalldirs"
-
-
- l=
-
-
- if test -d $srcdir/po; then
- test -d po || mkdir po
- if test "x$srcdir" != "x."; then
- if test "x`echo $srcdir | sed 's@/.*@@'`" = "x"; then
- posrcprefix="$srcdir/"
- else
- posrcprefix="../$srcdir/"
- fi
- else
- posrcprefix="../"
- fi
- rm -f po/POTFILES
- sed -e "/^#/d" -e "/^\$/d" -e "s,.*, $posrcprefix& \\\\," -e "\$s/\(.*\) \\\\/\1/" \
- < $srcdir/po/POTFILES.in > po/POTFILES
- fi
-
-
-# Check for common headers.
-# FIXME: Seems to me this can cause problems for i386-windows hosts.
-# At one point there were hardcoded AC_DEFINE's if ${host} = i386-*-windows*.
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-do
-ac_safe=`echo "$ac_hdr" | sed 'y%./+-%__p_%'`
-echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6
-echo "configure:2948: checking for $ac_hdr" >&5
-if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 2953 "configure"
-#include "confdefs.h"
-#include <$ac_hdr>
-EOF
-ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:2958: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
-ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
-if test -z "$ac_err"; then
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=yes"
-else
- echo "$ac_err" >&5
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=no"
-fi
-rm -f conftest*
-fi
-if eval "test \"`echo '$ac_cv_header_'$ac_safe`\" = yes"; then
- echo "$ac_t""yes" 1>&6
- ac_tr_hdr=HAVE_`echo $ac_hdr | sed 'y%abcdefghijklmnopqrstuvwxyz./-%ABCDEFGHIJKLMNOPQRSTUVWXYZ___%'`
- cat >> confdefs.h <<EOF
-#define $ac_tr_hdr 1
-EOF
-
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- echo "$ac_t""no" 1>&6
-fi
-done
-
-for ac_hdr in sys/time.h sys/resource.h
-do
-ac_safe=`echo "$ac_hdr" | sed 'y%./+-%__p_%'`
-echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6
-echo "configure:2988: checking for $ac_hdr" >&5
-if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 2993 "configure"
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-#include <$ac_hdr>
-EOF
-ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:2998: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
-ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
-if test -z "$ac_err"; then
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=yes"
-else
- echo "$ac_err" >&5
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=no"
-fi
-rm -f conftest*
-fi
-if eval "test \"`echo '$ac_cv_header_'$ac_safe`\" = yes"; then
- echo "$ac_t""yes" 1>&6
- ac_tr_hdr=HAVE_`echo $ac_hdr | sed 'y%abcdefghijklmnopqrstuvwxyz./-%ABCDEFGHIJKLMNOPQRSTUVWXYZ___%'`
- cat >> confdefs.h <<EOF
-#define $ac_tr_hdr 1
-EOF
-
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- echo "$ac_t""no" 1>&6
-fi
-done
-
-for ac_hdr in fcntl.h fpu_control.h
-do
-ac_safe=`echo "$ac_hdr" | sed 'y%./+-%__p_%'`
-echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6
-echo "configure:3028: checking for $ac_hdr" >&5
-if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 3033 "configure"
-#include "confdefs.h"
-#include <$ac_hdr>
-EOF
-ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:3038: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
-ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
-if test -z "$ac_err"; then
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=yes"
-else
- echo "$ac_err" >&5
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=no"
-fi
-rm -f conftest*
-fi
-if eval "test \"`echo '$ac_cv_header_'$ac_safe`\" = yes"; then
- echo "$ac_t""yes" 1>&6
- ac_tr_hdr=HAVE_`echo $ac_hdr | sed 'y%abcdefghijklmnopqrstuvwxyz./-%ABCDEFGHIJKLMNOPQRSTUVWXYZ___%'`
- cat >> confdefs.h <<EOF
-#define $ac_tr_hdr 1
-EOF
-
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- echo "$ac_t""no" 1>&6
-fi
-done
-
-for ac_hdr in dlfcn.h errno.h sys/stat.h
-do
-ac_safe=`echo "$ac_hdr" | sed 'y%./+-%__p_%'`
-echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6
-echo "configure:3068: checking for $ac_hdr" >&5
-if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 3073 "configure"
-#include "confdefs.h"
-#include <$ac_hdr>
-EOF
-ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:3078: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
-ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
-if test -z "$ac_err"; then
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=yes"
-else
- echo "$ac_err" >&5
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=no"
-fi
-rm -f conftest*
-fi
-if eval "test \"`echo '$ac_cv_header_'$ac_safe`\" = yes"; then
- echo "$ac_t""yes" 1>&6
- ac_tr_hdr=HAVE_`echo $ac_hdr | sed 'y%abcdefghijklmnopqrstuvwxyz./-%ABCDEFGHIJKLMNOPQRSTUVWXYZ___%'`
- cat >> confdefs.h <<EOF
-#define $ac_tr_hdr 1
-EOF
-
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- echo "$ac_t""no" 1>&6
-fi
-done
-
-for ac_func in getrusage time sigaction __setfpucw
-do
-echo $ac_n "checking for $ac_func""... $ac_c" 1>&6
-echo "configure:3107: checking for $ac_func" >&5
-if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 3112 "configure"
-#include "confdefs.h"
-/* System header to define __stub macros and hopefully few prototypes,
- which can conflict with char $ac_func(); below. */
-#include <assert.h>
-/* Override any gcc2 internal prototype to avoid an error. */
-/* We use char because int might match the return type of a gcc2
- builtin and then its argument prototype would still apply. */
-char $ac_func();
-
-int main() {
-
-/* The GNU C library defines this for functions which it implements
- to always fail with ENOSYS. Some functions are actually named
- something starting with __ and the normal name is an alias. */
-#if defined (__stub_$ac_func) || defined (__stub___$ac_func)
-choke me
-#else
-$ac_func();
-#endif
-
-; return 0; }
-EOF
-if { (eval echo configure:3135: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=yes"
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=no"
-fi
-rm -f conftest*
-fi
-
-if eval "test \"`echo '$ac_cv_func_'$ac_func`\" = yes"; then
- echo "$ac_t""yes" 1>&6
- ac_tr_func=HAVE_`echo $ac_func | tr 'abcdefghijklmnopqrstuvwxyz' 'ABCDEFGHIJKLMNOPQRSTUVWXYZ'`
- cat >> confdefs.h <<EOF
-#define $ac_tr_func 1
-EOF
-
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- echo "$ac_t""no" 1>&6
-fi
-done
-
-
-# Check for socket libraries
-echo $ac_n "checking for bind in -lsocket""... $ac_c" 1>&6
-echo "configure:3162: checking for bind in -lsocket" >&5
-ac_lib_var=`echo socket'_'bind | sed 'y%./+-%__p_%'`
-if eval "test \"`echo '$''{'ac_cv_lib_$ac_lib_var'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- ac_save_LIBS="$LIBS"
-LIBS="-lsocket $LIBS"
-cat > conftest.$ac_ext <<EOF
-#line 3170 "configure"
-#include "confdefs.h"
-/* Override any gcc2 internal prototype to avoid an error. */
-/* We use char because int might match the return type of a gcc2
- builtin and then its argument prototype would still apply. */
-char bind();
-
-int main() {
-bind()
-; return 0; }
-EOF
-if { (eval echo configure:3181: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- rm -rf conftest*
- eval "ac_cv_lib_$ac_lib_var=yes"
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_lib_$ac_lib_var=no"
-fi
-rm -f conftest*
-LIBS="$ac_save_LIBS"
-
-fi
-if eval "test \"`echo '$ac_cv_lib_'$ac_lib_var`\" = yes"; then
- echo "$ac_t""yes" 1>&6
- ac_tr_lib=HAVE_LIB`echo socket | sed -e 's/[^a-zA-Z0-9_]/_/g' \
- -e 'y/abcdefghijklmnopqrstuvwxyz/ABCDEFGHIJKLMNOPQRSTUVWXYZ/'`
- cat >> confdefs.h <<EOF
-#define $ac_tr_lib 1
-EOF
-
- LIBS="-lsocket $LIBS"
-
-else
- echo "$ac_t""no" 1>&6
-fi
-
-echo $ac_n "checking for gethostbyname in -lnsl""... $ac_c" 1>&6
-echo "configure:3209: checking for gethostbyname in -lnsl" >&5
-ac_lib_var=`echo nsl'_'gethostbyname | sed 'y%./+-%__p_%'`
-if eval "test \"`echo '$''{'ac_cv_lib_$ac_lib_var'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- ac_save_LIBS="$LIBS"
-LIBS="-lnsl $LIBS"
-cat > conftest.$ac_ext <<EOF
-#line 3217 "configure"
-#include "confdefs.h"
-/* Override any gcc2 internal prototype to avoid an error. */
-/* We use char because int might match the return type of a gcc2
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-char gethostbyname();
-
-int main() {
-gethostbyname()
-; return 0; }
-EOF
-if { (eval echo configure:3228: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- rm -rf conftest*
- eval "ac_cv_lib_$ac_lib_var=yes"
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- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_lib_$ac_lib_var=no"
-fi
-rm -f conftest*
-LIBS="$ac_save_LIBS"
-
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- ac_tr_lib=HAVE_LIB`echo nsl | sed -e 's/[^a-zA-Z0-9_]/_/g' \
- -e 'y/abcdefghijklmnopqrstuvwxyz/ABCDEFGHIJKLMNOPQRSTUVWXYZ/'`
- cat >> confdefs.h <<EOF
-#define $ac_tr_lib 1
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-
- LIBS="-lnsl $LIBS"
-
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- echo "$ac_t""no" 1>&6
-fi
-
-
-. ${srcdir}/../../bfd/configure.host
-
-
-
-USE_MAINTAINER_MODE=no
-# Check whether --enable-maintainer-mode or --disable-maintainer-mode was given.
-if test "${enable_maintainer_mode+set}" = set; then
- enableval="$enable_maintainer_mode"
- case "${enableval}" in
- yes) MAINT="" USE_MAINTAINER_MODE=yes ;;
- no) MAINT="#" ;;
- *) { echo "configure: error: "--enable-maintainer-mode does not take a value"" 1>&2; exit 1; }; MAINT="#" ;;
-esac
-if test x"$silent" != x"yes" && test x"$MAINT" = x""; then
- echo "Setting maintainer mode" 6>&1
-fi
-else
- MAINT="#"
-fi
-
-
-
-# Check whether --enable-sim-bswap or --disable-sim-bswap was given.
-if test "${enable_sim_bswap+set}" = set; then
- enableval="$enable_sim_bswap"
- case "${enableval}" in
- yes) sim_bswap="-DWITH_BSWAP=1 -DUSE_BSWAP=1";;
- no) sim_bswap="-DWITH_BSWAP=0";;
- *) { echo "configure: error: "--enable-sim-bswap does not take a value"" 1>&2; exit 1; }; sim_bswap="";;
-esac
-if test x"$silent" != x"yes" && test x"$sim_bswap" != x""; then
- echo "Setting bswap flags = $sim_bswap" 6>&1
-fi
-else
- sim_bswap=""
-fi
-
-
-
-# Check whether --enable-sim-cflags or --disable-sim-cflags was given.
-if test "${enable_sim_cflags+set}" = set; then
- enableval="$enable_sim_cflags"
- case "${enableval}" in
- yes) sim_cflags="-O2 -fomit-frame-pointer";;
- trace) { echo "configure: error: "Please use --enable-sim-debug instead."" 1>&2; exit 1; }; sim_cflags="";;
- no) sim_cflags="";;
- *) sim_cflags=`echo "${enableval}" | sed -e "s/,/ /g"`;;
-esac
-if test x"$silent" != x"yes" && test x"$sim_cflags" != x""; then
- echo "Setting sim cflags = $sim_cflags" 6>&1
-fi
-else
- sim_cflags=""
-fi
-
-
-
-# Check whether --enable-sim-debug or --disable-sim-debug was given.
-if test "${enable_sim_debug+set}" = set; then
- enableval="$enable_sim_debug"
- case "${enableval}" in
- yes) sim_debug="-DDEBUG=7 -DWITH_DEBUG=7";;
- no) sim_debug="-DDEBUG=0 -DWITH_DEBUG=0";;
- *) sim_debug="-DDEBUG='(${enableval})' -DWITH_DEBUG='(${enableval})'";;
-esac
-if test x"$silent" != x"yes" && test x"$sim_debug" != x""; then
- echo "Setting sim debug = $sim_debug" 6>&1
-fi
-else
- sim_debug=""
-fi
-
-
-
-# Check whether --enable-sim-stdio or --disable-sim-stdio was given.
-if test "${enable_sim_stdio+set}" = set; then
- enableval="$enable_sim_stdio"
- case "${enableval}" in
- yes) sim_stdio="-DWITH_STDIO=DO_USE_STDIO";;
- no) sim_stdio="-DWITH_STDIO=DONT_USE_STDIO";;
- *) { echo "configure: error: "Unknown value $enableval passed to --enable-sim-stdio"" 1>&2; exit 1; }; sim_stdio="";;
-esac
-if test x"$silent" != x"yes" && test x"$sim_stdio" != x""; then
- echo "Setting stdio flags = $sim_stdio" 6>&1
-fi
-else
- sim_stdio=""
-fi
-
-
-
-# Check whether --enable-sim-trace or --disable-sim-trace was given.
-if test "${enable_sim_trace+set}" = set; then
- enableval="$enable_sim_trace"
- case "${enableval}" in
- yes) sim_trace="-DTRACE=1 -DWITH_TRACE=-1";;
- no) sim_trace="-DTRACE=0 -DWITH_TRACE=0";;
- [-0-9]*)
- sim_trace="-DTRACE='(${enableval})' -DWITH_TRACE='(${enableval})'";;
- [a-z]*)
- sim_trace=""
- for x in `echo "$enableval" | sed -e "s/,/ /g"`; do
- if test x"$sim_trace" = x; then
- sim_trace="-DWITH_TRACE='(TRACE_$x"
- else
- sim_trace="${sim_trace}|TRACE_$x"
- fi
- done
- sim_trace="$sim_trace)'" ;;
-esac
-if test x"$silent" != x"yes" && test x"$sim_trace" != x""; then
- echo "Setting sim trace = $sim_trace" 6>&1
-fi
-else
- sim_trace=""
-fi
-
-
-
-# Check whether --enable-sim-profile or --disable-sim-profile was given.
-if test "${enable_sim_profile+set}" = set; then
- enableval="$enable_sim_profile"
- case "${enableval}" in
- yes) sim_profile="-DPROFILE=1 -DWITH_PROFILE=-1";;
- no) sim_profile="-DPROFILE=0 -DWITH_PROFILE=0";;
- [-0-9]*)
- sim_profile="-DPROFILE='(${enableval})' -DWITH_PROFILE='(${enableval})'";;
- [a-z]*)
- sim_profile=""
- for x in `echo "$enableval" | sed -e "s/,/ /g"`; do
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- sim_profile="-DWITH_PROFILE='(PROFILE_$x"
- else
- sim_profile="${sim_profile}|PROFILE_$x"
- fi
- done
- sim_profile="$sim_profile)'" ;;
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-fi
-else
- sim_profile="-DPROFILE=1 -DWITH_PROFILE=-1"
-fi
-
-
-
-echo $ac_n "checking return type of signal handlers""... $ac_c" 1>&6
-echo "configure:3404: checking return type of signal handlers" >&5
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- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 3409 "configure"
-#include "confdefs.h"
-#include <sys/types.h>
-#include <signal.h>
-#ifdef signal
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-#endif
-#ifdef __cplusplus
-extern "C" void (*signal (int, void (*)(int)))(int);
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-#endif
-
-int main() {
-int i;
-; return 0; }
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-if { (eval echo configure:3426: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
- rm -rf conftest*
- ac_cv_type_signal=void
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- ac_cv_type_signal=int
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-rm -f conftest*
-fi
-
-echo "$ac_t""$ac_cv_type_signal" 1>&6
-cat >> confdefs.h <<EOF
-#define RETSIGTYPE $ac_cv_type_signal
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-
-
-
-
-
-echo $ac_n "checking for executable suffix""... $ac_c" 1>&6
-echo "configure:3448: checking for executable suffix" >&5
-if eval "test \"`echo '$''{'ac_cv_exeext'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- if test "$CYGWIN" = yes || test "$MINGW32" = yes; then
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- echo 'int main () { return 0; }' > conftest.$ac_ext
- ac_cv_exeext=
- if { (eval echo configure:3458: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; }; then
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- case $file in
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- *) ac_cv_exeext=`echo $file | sed -e s/conftest//` ;;
- esac
- done
- else
- { echo "configure: error: installation or configuration problem: compiler cannot create executables." 1>&2; exit 1; }
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- rm -f conftest*
- test x"${ac_cv_exeext}" = x && ac_cv_exeext=no
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-
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-echo "$ac_t""${ac_cv_exeext}" 1>&6
-ac_exeext=$EXEEXT
-
-
-sim_link_files=
-sim_link_links=
-
-sim_link_links=tconfig.h
-if test -f ${srcdir}/tconfig.in
-then
- sim_link_files=tconfig.in
-else
- sim_link_files=../common/tconfig.in
-fi
-
-# targ-vals.def points to the libc macro description file.
-case "${target}" in
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-esac
-sim_link_files="${sim_link_files} ${TARG_VALS_DEF}"
-sim_link_links="${sim_link_links} targ-vals.def"
-
-
-
-
-# Check whether --enable-build-warnings or --disable-build-warnings was given.
-if test "${enable_build_warnings+set}" = set; then
- enableval="$enable_build_warnings"
- build_warnings="-Wall -Wpointer-arith -Wstrict-prototypes -Wmissing-prototypes -Wmissing-declarations"
-case "${enableval}" in
- yes) ;;
- no) build_warnings="-w";;
- ,*) t=`echo "${enableval}" | sed -e "s/,/ /g"`
- build_warnings="${build_warnings} ${t}";;
- *,) t=`echo "${enableval}" | sed -e "s/,/ /g"`
- build_warnings="${t} ${build_warnings}";;
- *) build_warnings=`echo "${enableval}" | sed -e "s/,/ /g"`;;
-esac
-if test x"$silent" != x"yes" && test x"$build_warnings" != x""; then
- echo "Setting warning flags = $build_warnings" 6>&1
-fi
-WARN_CFLAGS=""
-WERROR_CFLAGS=""
-if test "x${build_warnings}" != x -a "x$GCC" = xyes
-then
- # Separate out the -Werror flag as some files just cannot be
- # compiled with it enabled.
- for w in ${build_warnings}; do
- case $w in
- -Werr*) WERROR_CFLAGS=-Werror ;;
- *) WARN_CFLAGS="${WARN_CFLAGS} $w"
- esac
- done
-fi
-else
- build_warnings=""
-fi
-
-
-for ac_hdr in unistd.h
-do
-ac_safe=`echo "$ac_hdr" | sed 'y%./+-%__p_%'`
-echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6
-echo "configure:3538: checking for $ac_hdr" >&5
-if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 3543 "configure"
-#include "confdefs.h"
-#include <$ac_hdr>
-EOF
-ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:3548: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
-ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
-if test -z "$ac_err"; then
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=yes"
-else
- echo "$ac_err" >&5
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=no"
-fi
-rm -f conftest*
-fi
-if eval "test \"`echo '$ac_cv_header_'$ac_safe`\" = yes"; then
- echo "$ac_t""yes" 1>&6
- ac_tr_hdr=HAVE_`echo $ac_hdr | sed 'y%abcdefghijklmnopqrstuvwxyz./-%ABCDEFGHIJKLMNOPQRSTUVWXYZ___%'`
- cat >> confdefs.h <<EOF
-#define $ac_tr_hdr 1
-EOF
-
-else
- echo "$ac_t""no" 1>&6
-fi
-done
-
-
-
-
-
-trap '' 1 2 15
-cat > confcache <<\EOF
-# This file is a shell script that caches the results of configure
-# tests run on this system so they can be shared between configure
-# scripts and configure runs. It is not useful on other systems.
-# If it contains results you don't want to keep, you may remove or edit it.
-#
-# By default, configure uses ./config.cache as the cache file,
-# creating it if it does not exist already. You can give configure
-# the --cache-file=FILE option to use a different cache file; that is
-# what configure does when it calls configure scripts in
-# subdirectories, so they share the cache.
-# Giving --cache-file=/dev/null disables caching, for debugging configure.
-# config.status only pays attention to the cache file if you give it the
-# --recheck option to rerun configure.
-#
-EOF
-# The following way of writing the cache mishandles newlines in values,
-# but we know of no workaround that is simple, portable, and efficient.
-# So, don't put newlines in cache variables' values.
-# Ultrix sh set writes to stderr and can't be redirected directly,
-# and sets the high bit in the cache file unless we assign to the vars.
-(set) 2>&1 |
- case `(ac_space=' '; set | grep ac_space) 2>&1` in
- *ac_space=\ *)
- # `set' does not quote correctly, so add quotes (double-quote substitution
- # turns \\\\ into \\, and sed turns \\ into \).
- sed -n \
- -e "s/'/'\\\\''/g" \
- -e "s/^\\([a-zA-Z0-9_]*_cv_[a-zA-Z0-9_]*\\)=\\(.*\\)/\\1=\${\\1='\\2'}/p"
- ;;
- *)
- # `set' quotes correctly as required by POSIX, so do not add quotes.
- sed -n -e 's/^\([a-zA-Z0-9_]*_cv_[a-zA-Z0-9_]*\)=\(.*\)/\1=${\1=\2}/p'
- ;;
- esac >> confcache
-if cmp -s $cache_file confcache; then
- :
-else
- if test -w $cache_file; then
- echo "updating cache $cache_file"
- cat confcache > $cache_file
- else
- echo "not updating unwritable cache $cache_file"
- fi
-fi
-rm -f confcache
-
-trap 'rm -fr conftest* confdefs* core core.* *.core $ac_clean_files; exit 1' 1 2 15
-
-test "x$prefix" = xNONE && prefix=$ac_default_prefix
-# Let make expand exec_prefix.
-test "x$exec_prefix" = xNONE && exec_prefix='${prefix}'
-
-# Any assignment to VPATH causes Sun make to only execute
-# the first set of double-colon rules, so remove it if not needed.
-# If there is a colon in the path, we need to keep it.
-if test "x$srcdir" = x.; then
- ac_vpsub='/^[ ]*VPATH[ ]*=[^:]*$/d'
-fi
-
-trap 'rm -f $CONFIG_STATUS conftest*; exit 1' 1 2 15
-
-DEFS=-DHAVE_CONFIG_H
-
-# Without the "./", some shells look in PATH for config.status.
-: ${CONFIG_STATUS=./config.status}
-
-echo creating $CONFIG_STATUS
-rm -f $CONFIG_STATUS
-cat > $CONFIG_STATUS <<EOF
-#! /bin/sh
-# Generated automatically by configure.
-# Run this file to recreate the current configuration.
-# This directory was configured as follows,
-# on host `(hostname || uname -n) 2>/dev/null | sed 1q`:
-#
-# $0 $ac_configure_args
-#
-# Compiler output produced by configure, useful for debugging
-# configure, is in ./config.log if it exists.
-
-ac_cs_usage="Usage: $CONFIG_STATUS [--recheck] [--version] [--help]"
-for ac_option
-do
- case "\$ac_option" in
- -recheck | --recheck | --rechec | --reche | --rech | --rec | --re | --r)
- echo "running \${CONFIG_SHELL-/bin/sh} $0 $ac_configure_args --no-create --no-recursion"
- exec \${CONFIG_SHELL-/bin/sh} $0 $ac_configure_args --no-create --no-recursion ;;
- -version | --version | --versio | --versi | --vers | --ver | --ve | --v)
- echo "$CONFIG_STATUS generated by autoconf version 2.13"
- exit 0 ;;
- -help | --help | --hel | --he | --h)
- echo "\$ac_cs_usage"; exit 0 ;;
- *) echo "\$ac_cs_usage"; exit 1 ;;
- esac
-done
-
-ac_given_srcdir=$srcdir
-ac_given_INSTALL="$INSTALL"
-
-trap 'rm -fr `echo "Makefile.sim:Makefile.in Make-common.sim:../common/Make-common.in .gdbinit:../common/gdbinit.in config.h:config.in" | sed "s/:[^ ]*//g"` conftest*; exit 1' 1 2 15
-EOF
-cat >> $CONFIG_STATUS <<EOF
-
-# Protect against being on the right side of a sed subst in config.status.
-sed 's/%@/@@/; s/@%/@@/; s/%g\$/@g/; /@g\$/s/[\\\\&%]/\\\\&/g;
- s/@@/%@/; s/@@/@%/; s/@g\$/%g/' > conftest.subs <<\\CEOF
-$ac_vpsub
-$extrasub
-s%@sim_environment@%$sim_environment%g
-s%@sim_alignment@%$sim_alignment%g
-s%@sim_assert@%$sim_assert%g
-s%@sim_bitsize@%$sim_bitsize%g
-s%@sim_endian@%$sim_endian%g
-s%@sim_hostendian@%$sim_hostendian%g
-s%@sim_float@%$sim_float%g
-s%@sim_scache@%$sim_scache%g
-s%@sim_default_model@%$sim_default_model%g
-s%@sim_hw_cflags@%$sim_hw_cflags%g
-s%@sim_hw_objs@%$sim_hw_objs%g
-s%@sim_hw@%$sim_hw%g
-s%@sim_inline@%$sim_inline%g
-s%@sim_packages@%$sim_packages%g
-s%@sim_regparm@%$sim_regparm%g
-s%@sim_reserved_bits@%$sim_reserved_bits%g
-s%@sim_smp@%$sim_smp%g
-s%@sim_stdcall@%$sim_stdcall%g
-s%@sim_xor_endian@%$sim_xor_endian%g
-s%@WARN_CFLAGS@%$WARN_CFLAGS%g
-s%@WERROR_CFLAGS@%$WERROR_CFLAGS%g
-s%@SHELL@%$SHELL%g
-s%@CFLAGS@%$CFLAGS%g
-s%@CPPFLAGS@%$CPPFLAGS%g
-s%@CXXFLAGS@%$CXXFLAGS%g
-s%@FFLAGS@%$FFLAGS%g
-s%@DEFS@%$DEFS%g
-s%@LDFLAGS@%$LDFLAGS%g
-s%@LIBS@%$LIBS%g
-s%@exec_prefix@%$exec_prefix%g
-s%@prefix@%$prefix%g
-s%@program_transform_name@%$program_transform_name%g
-s%@bindir@%$bindir%g
-s%@sbindir@%$sbindir%g
-s%@libexecdir@%$libexecdir%g
-s%@datadir@%$datadir%g
-s%@sysconfdir@%$sysconfdir%g
-s%@sharedstatedir@%$sharedstatedir%g
-s%@localstatedir@%$localstatedir%g
-s%@libdir@%$libdir%g
-s%@includedir@%$includedir%g
-s%@oldincludedir@%$oldincludedir%g
-s%@infodir@%$infodir%g
-s%@mandir@%$mandir%g
-s%@host@%$host%g
-s%@host_alias@%$host_alias%g
-s%@host_cpu@%$host_cpu%g
-s%@host_vendor@%$host_vendor%g
-s%@host_os@%$host_os%g
-s%@target@%$target%g
-s%@target_alias@%$target_alias%g
-s%@target_cpu@%$target_cpu%g
-s%@target_vendor@%$target_vendor%g
-s%@target_os@%$target_os%g
-s%@build@%$build%g
-s%@build_alias@%$build_alias%g
-s%@build_cpu@%$build_cpu%g
-s%@build_vendor@%$build_vendor%g
-s%@build_os@%$build_os%g
-s%@CC@%$CC%g
-s%@INSTALL_PROGRAM@%$INSTALL_PROGRAM%g
-s%@INSTALL_SCRIPT@%$INSTALL_SCRIPT%g
-s%@INSTALL_DATA@%$INSTALL_DATA%g
-s%@CC_FOR_BUILD@%$CC_FOR_BUILD%g
-s%@HDEFINES@%$HDEFINES%g
-s%@AR@%$AR%g
-s%@RANLIB@%$RANLIB%g
-s%@SET_MAKE@%$SET_MAKE%g
-s%@CPP@%$CPP%g
-s%@ALLOCA@%$ALLOCA%g
-s%@USE_NLS@%$USE_NLS%g
-s%@MSGFMT@%$MSGFMT%g
-s%@GMSGFMT@%$GMSGFMT%g
-s%@XGETTEXT@%$XGETTEXT%g
-s%@USE_INCLUDED_LIBINTL@%$USE_INCLUDED_LIBINTL%g
-s%@CATALOGS@%$CATALOGS%g
-s%@CATOBJEXT@%$CATOBJEXT%g
-s%@DATADIRNAME@%$DATADIRNAME%g
-s%@GMOFILES@%$GMOFILES%g
-s%@INSTOBJEXT@%$INSTOBJEXT%g
-s%@INTLDEPS@%$INTLDEPS%g
-s%@INTLLIBS@%$INTLLIBS%g
-s%@INTLOBJS@%$INTLOBJS%g
-s%@POFILES@%$POFILES%g
-s%@POSUB@%$POSUB%g
-s%@INCLUDE_LOCALE_H@%$INCLUDE_LOCALE_H%g
-s%@GT_NO@%$GT_NO%g
-s%@GT_YES@%$GT_YES%g
-s%@MKINSTALLDIRS@%$MKINSTALLDIRS%g
-s%@l@%$l%g
-s%@MAINT@%$MAINT%g
-s%@sim_bswap@%$sim_bswap%g
-s%@sim_cflags@%$sim_cflags%g
-s%@sim_debug@%$sim_debug%g
-s%@sim_stdio@%$sim_stdio%g
-s%@sim_trace@%$sim_trace%g
-s%@sim_profile@%$sim_profile%g
-s%@EXEEXT@%$EXEEXT%g
-
-CEOF
-EOF
-
-cat >> $CONFIG_STATUS <<\EOF
-
-# Split the substitutions into bite-sized pieces for seds with
-# small command number limits, like on Digital OSF/1 and HP-UX.
-ac_max_sed_cmds=90 # Maximum number of lines to put in a sed script.
-ac_file=1 # Number of current file.
-ac_beg=1 # First line for current file.
-ac_end=$ac_max_sed_cmds # Line after last line for current file.
-ac_more_lines=:
-ac_sed_cmds=""
-while $ac_more_lines; do
- if test $ac_beg -gt 1; then
- sed "1,${ac_beg}d; ${ac_end}q" conftest.subs > conftest.s$ac_file
- else
- sed "${ac_end}q" conftest.subs > conftest.s$ac_file
- fi
- if test ! -s conftest.s$ac_file; then
- ac_more_lines=false
- rm -f conftest.s$ac_file
- else
- if test -z "$ac_sed_cmds"; then
- ac_sed_cmds="sed -f conftest.s$ac_file"
- else
- ac_sed_cmds="$ac_sed_cmds | sed -f conftest.s$ac_file"
- fi
- ac_file=`expr $ac_file + 1`
- ac_beg=$ac_end
- ac_end=`expr $ac_end + $ac_max_sed_cmds`
- fi
-done
-if test -z "$ac_sed_cmds"; then
- ac_sed_cmds=cat
-fi
-EOF
-
-cat >> $CONFIG_STATUS <<EOF
-
-CONFIG_FILES=\${CONFIG_FILES-"Makefile.sim:Makefile.in Make-common.sim:../common/Make-common.in .gdbinit:../common/gdbinit.in"}
-EOF
-cat >> $CONFIG_STATUS <<\EOF
-for ac_file in .. $CONFIG_FILES; do if test "x$ac_file" != x..; then
- # Support "outfile[:infile[:infile...]]", defaulting infile="outfile.in".
- case "$ac_file" in
- *:*) ac_file_in=`echo "$ac_file"|sed 's%[^:]*:%%'`
- ac_file=`echo "$ac_file"|sed 's%:.*%%'` ;;
- *) ac_file_in="${ac_file}.in" ;;
- esac
-
- # Adjust a relative srcdir, top_srcdir, and INSTALL for subdirectories.
-
- # Remove last slash and all that follows it. Not all systems have dirname.
- ac_dir=`echo $ac_file|sed 's%/[^/][^/]*$%%'`
- if test "$ac_dir" != "$ac_file" && test "$ac_dir" != .; then
- # The file is in a subdirectory.
- test ! -d "$ac_dir" && mkdir "$ac_dir"
- ac_dir_suffix="/`echo $ac_dir|sed 's%^\./%%'`"
- # A "../" for each directory in $ac_dir_suffix.
- ac_dots=`echo $ac_dir_suffix|sed 's%/[^/]*%../%g'`
- else
- ac_dir_suffix= ac_dots=
- fi
-
- case "$ac_given_srcdir" in
- .) srcdir=.
- if test -z "$ac_dots"; then top_srcdir=.
- else top_srcdir=`echo $ac_dots|sed 's%/$%%'`; fi ;;
- /*) srcdir="$ac_given_srcdir$ac_dir_suffix"; top_srcdir="$ac_given_srcdir" ;;
- *) # Relative path.
- srcdir="$ac_dots$ac_given_srcdir$ac_dir_suffix"
- top_srcdir="$ac_dots$ac_given_srcdir" ;;
- esac
-
- case "$ac_given_INSTALL" in
- [/$]*) INSTALL="$ac_given_INSTALL" ;;
- *) INSTALL="$ac_dots$ac_given_INSTALL" ;;
- esac
-
- echo creating "$ac_file"
- rm -f "$ac_file"
- configure_input="Generated automatically from `echo $ac_file_in|sed 's%.*/%%'` by configure."
- case "$ac_file" in
- *Makefile*) ac_comsub="1i\\
-# $configure_input" ;;
- *) ac_comsub= ;;
- esac
-
- ac_file_inputs=`echo $ac_file_in|sed -e "s%^%$ac_given_srcdir/%" -e "s%:% $ac_given_srcdir/%g"`
- sed -e "$ac_comsub
-s%@configure_input@%$configure_input%g
-s%@srcdir@%$srcdir%g
-s%@top_srcdir@%$top_srcdir%g
-s%@INSTALL@%$INSTALL%g
-" $ac_file_inputs | (eval "$ac_sed_cmds") > $ac_file
-fi; done
-rm -f conftest.s*
-
-# These sed commands are passed to sed as "A NAME B NAME C VALUE D", where
-# NAME is the cpp macro being defined and VALUE is the value it is being given.
-#
-# ac_d sets the value in "#define NAME VALUE" lines.
-ac_dA='s%^\([ ]*\)#\([ ]*define[ ][ ]*\)'
-ac_dB='\([ ][ ]*\)[^ ]*%\1#\2'
-ac_dC='\3'
-ac_dD='%g'
-# ac_u turns "#undef NAME" with trailing blanks into "#define NAME VALUE".
-ac_uA='s%^\([ ]*\)#\([ ]*\)undef\([ ][ ]*\)'
-ac_uB='\([ ]\)%\1#\2define\3'
-ac_uC=' '
-ac_uD='\4%g'
-# ac_e turns "#undef NAME" without trailing blanks into "#define NAME VALUE".
-ac_eA='s%^\([ ]*\)#\([ ]*\)undef\([ ][ ]*\)'
-ac_eB='$%\1#\2define\3'
-ac_eC=' '
-ac_eD='%g'
-
-if test "${CONFIG_HEADERS+set}" != set; then
-EOF
-cat >> $CONFIG_STATUS <<EOF
- CONFIG_HEADERS="config.h:config.in"
-EOF
-cat >> $CONFIG_STATUS <<\EOF
-fi
-for ac_file in .. $CONFIG_HEADERS; do if test "x$ac_file" != x..; then
- # Support "outfile[:infile[:infile...]]", defaulting infile="outfile.in".
- case "$ac_file" in
- *:*) ac_file_in=`echo "$ac_file"|sed 's%[^:]*:%%'`
- ac_file=`echo "$ac_file"|sed 's%:.*%%'` ;;
- *) ac_file_in="${ac_file}.in" ;;
- esac
-
- echo creating $ac_file
-
- rm -f conftest.frag conftest.in conftest.out
- ac_file_inputs=`echo $ac_file_in|sed -e "s%^%$ac_given_srcdir/%" -e "s%:% $ac_given_srcdir/%g"`
- cat $ac_file_inputs > conftest.in
-
-EOF
-
-# Transform confdefs.h into a sed script conftest.vals that substitutes
-# the proper values into config.h.in to produce config.h. And first:
-# Protect against being on the right side of a sed subst in config.status.
-# Protect against being in an unquoted here document in config.status.
-rm -f conftest.vals
-cat > conftest.hdr <<\EOF
-s/[\\&%]/\\&/g
-s%[\\$`]%\\&%g
-s%#define \([A-Za-z_][A-Za-z0-9_]*\) *\(.*\)%${ac_dA}\1${ac_dB}\1${ac_dC}\2${ac_dD}%gp
-s%ac_d%ac_u%gp
-s%ac_u%ac_e%gp
-EOF
-sed -n -f conftest.hdr confdefs.h > conftest.vals
-rm -f conftest.hdr
-
-# This sed command replaces #undef with comments. This is necessary, for
-# example, in the case of _POSIX_SOURCE, which is predefined and required
-# on some systems where configure will not decide to define it.
-cat >> conftest.vals <<\EOF
-s%^[ ]*#[ ]*undef[ ][ ]*[a-zA-Z_][a-zA-Z_0-9]*%/* & */%
-EOF
-
-# Break up conftest.vals because some shells have a limit on
-# the size of here documents, and old seds have small limits too.
-
-rm -f conftest.tail
-while :
-do
- ac_lines=`grep -c . conftest.vals`
- # grep -c gives empty output for an empty file on some AIX systems.
- if test -z "$ac_lines" || test "$ac_lines" -eq 0; then break; fi
- # Write a limited-size here document to conftest.frag.
- echo ' cat > conftest.frag <<CEOF' >> $CONFIG_STATUS
- sed ${ac_max_here_lines}q conftest.vals >> $CONFIG_STATUS
- echo 'CEOF
- sed -f conftest.frag conftest.in > conftest.out
- rm -f conftest.in
- mv conftest.out conftest.in
-' >> $CONFIG_STATUS
- sed 1,${ac_max_here_lines}d conftest.vals > conftest.tail
- rm -f conftest.vals
- mv conftest.tail conftest.vals
-done
-rm -f conftest.vals
-
-cat >> $CONFIG_STATUS <<\EOF
- rm -f conftest.frag conftest.h
- echo "/* $ac_file. Generated automatically by configure. */" > conftest.h
- cat conftest.in >> conftest.h
- rm -f conftest.in
- if cmp -s $ac_file conftest.h 2>/dev/null; then
- echo "$ac_file is unchanged"
- rm -f conftest.h
- else
- # Remove last slash and all that follows it. Not all systems have dirname.
- ac_dir=`echo $ac_file|sed 's%/[^/][^/]*$%%'`
- if test "$ac_dir" != "$ac_file" && test "$ac_dir" != .; then
- # The file is in a subdirectory.
- test ! -d "$ac_dir" && mkdir "$ac_dir"
- fi
- rm -f $ac_file
- mv conftest.h $ac_file
- fi
-fi; done
-
-EOF
-
-cat >> $CONFIG_STATUS <<EOF
-ac_sources="$sim_link_files"
-ac_dests="$sim_link_links"
-EOF
-
-cat >> $CONFIG_STATUS <<\EOF
-srcdir=$ac_given_srcdir
-while test -n "$ac_sources"; do
- set $ac_dests; ac_dest=$1; shift; ac_dests=$*
- set $ac_sources; ac_source=$1; shift; ac_sources=$*
-
- echo "linking $srcdir/$ac_source to $ac_dest"
-
- if test ! -r $srcdir/$ac_source; then
- { echo "configure: error: $srcdir/$ac_source: File not found" 1>&2; exit 1; }
- fi
- rm -f $ac_dest
-
- # Make relative symlinks.
- # Remove last slash and all that follows it. Not all systems have dirname.
- ac_dest_dir=`echo $ac_dest|sed 's%/[^/][^/]*$%%'`
- if test "$ac_dest_dir" != "$ac_dest" && test "$ac_dest_dir" != .; then
- # The dest file is in a subdirectory.
- test ! -d "$ac_dest_dir" && mkdir "$ac_dest_dir"
- ac_dest_dir_suffix="/`echo $ac_dest_dir|sed 's%^\./%%'`"
- # A "../" for each directory in $ac_dest_dir_suffix.
- ac_dots=`echo $ac_dest_dir_suffix|sed 's%/[^/]*%../%g'`
- else
- ac_dest_dir_suffix= ac_dots=
- fi
-
- case "$srcdir" in
- [/$]*) ac_rel_source="$srcdir/$ac_source" ;;
- *) ac_rel_source="$ac_dots$srcdir/$ac_source" ;;
- esac
-
- # Make a symlink if possible; otherwise try a hard link.
- if ln -s $ac_rel_source $ac_dest 2>/dev/null ||
- ln $srcdir/$ac_source $ac_dest; then :
- else
- { echo "configure: error: can not link $ac_dest to $srcdir/$ac_source" 1>&2; exit 1; }
- fi
-done
-EOF
-cat >> $CONFIG_STATUS <<EOF
-
-EOF
-cat >> $CONFIG_STATUS <<\EOF
-case "x$CONFIG_FILES" in
- xMakefile*)
- echo "Merging Makefile.sim+Make-common.sim into Makefile ..."
- rm -f Makesim1.tmp Makesim2.tmp Makefile
- sed -n -e '/^## COMMON_PRE_/,/^## End COMMON_PRE_/ p' <Make-common.sim >Makesim1.tmp
- sed -n -e '/^## COMMON_POST_/,/^## End COMMON_POST_/ p' <Make-common.sim >Makesim2.tmp
- sed -e '/^## COMMON_PRE_/ r Makesim1.tmp' \
- -e '/^## COMMON_POST_/ r Makesim2.tmp' \
- <Makefile.sim >Makefile
- rm -f Makefile.sim Make-common.sim Makesim1.tmp Makesim2.tmp
- ;;
- esac
- case "x$CONFIG_HEADERS" in xconfig.h:config.in) echo > stamp-h ;; esac
-
-exit 0
-EOF
-chmod +x $CONFIG_STATUS
-rm -fr confdefs* $ac_clean_files
-test "$no_create" = yes || ${CONFIG_SHELL-/bin/sh} $CONFIG_STATUS || exit 1
-
-
diff --git a/sim/d10v/configure.in b/sim/d10v/configure.in
deleted file mode 100644
index 5debf66c23d..00000000000
--- a/sim/d10v/configure.in
+++ /dev/null
@@ -1,13 +0,0 @@
-dnl Process this file with autoconf to produce a configure script.
-sinclude(../common/aclocal.m4)
-AC_PREREQ(2.5)dnl
-AC_INIT(Makefile.in)
-
-SIM_AC_COMMON
-
-SIM_AC_OPTION_WARNINGS
-
-AC_CHECK_HEADERS(unistd.h)
-
-
-SIM_AC_OUTPUT
diff --git a/sim/d10v/d10v_sim.h b/sim/d10v/d10v_sim.h
deleted file mode 100644
index 3566da01d26..00000000000
--- a/sim/d10v/d10v_sim.h
+++ /dev/null
@@ -1,487 +0,0 @@
-#include "config.h"
-#include <stdio.h>
-#include <ctype.h>
-#include <limits.h>
-#include "ansidecl.h"
-#include "callback.h"
-#include "opcode/d10v.h"
-#include "bfd.h"
-
-#define DEBUG_TRACE 0x00000001
-#define DEBUG_VALUES 0x00000002
-#define DEBUG_LINE_NUMBER 0x00000004
-#define DEBUG_MEMSIZE 0x00000008
-#define DEBUG_INSTRUCTION 0x00000010
-#define DEBUG_TRAP 0x00000020
-#define DEBUG_MEMORY 0x00000040
-
-#ifndef DEBUG
-#define DEBUG (DEBUG_TRACE | DEBUG_VALUES | DEBUG_LINE_NUMBER)
-#endif
-
-extern int d10v_debug;
-
-#include "remote-sim.h"
-#include "sim-config.h"
-#include "sim-types.h"
-
-typedef unsigned8 uint8;
-typedef unsigned16 uint16;
-typedef signed16 int16;
-typedef unsigned32 uint32;
-typedef signed32 int32;
-typedef unsigned64 uint64;
-typedef signed64 int64;
-
-/* FIXME: D10V defines */
-typedef uint16 reg_t;
-
-struct simops
-{
- long opcode;
- int is_long;
- long mask;
- int format;
- int cycles;
- int unit;
- int exec_type;
- void (*func)();
- int numops;
- int operands[9];
-};
-
-enum _ins_type
-{
- INS_UNKNOWN, /* unknown instruction */
- INS_COND_TRUE, /* # times EXExxx executed other instruction */
- INS_COND_FALSE, /* # times EXExxx did not execute other instruction */
- INS_COND_JUMP, /* # times JUMP skipped other instruction */
- INS_CYCLES, /* # cycles */
- INS_LONG, /* long instruction (both containers, ie FM == 11) */
- INS_LEFTRIGHT, /* # times instruction encoded as L -> R (ie, FM == 01) */
- INS_RIGHTLEFT, /* # times instruction encoded as L <- R (ie, FM == 10) */
- INS_PARALLEL, /* # times instruction encoded as L || R (ie, RM == 00) */
-
- INS_LEFT, /* normal left instructions */
- INS_LEFT_PARALLEL, /* left side of || */
- INS_LEFT_COND_TEST, /* EXExx test on left side */
- INS_LEFT_COND_EXE, /* execution after EXExxx test on right side succeeded */
- INS_LEFT_NOPS, /* NOP on left side */
-
- INS_RIGHT, /* normal right instructions */
- INS_RIGHT_PARALLEL, /* right side of || */
- INS_RIGHT_COND_TEST, /* EXExx test on right side */
- INS_RIGHT_COND_EXE, /* execution after EXExxx test on left side succeeded */
- INS_RIGHT_NOPS, /* NOP on right side */
-
- INS_MAX
-};
-
-extern unsigned long ins_type_counters[ (int)INS_MAX ];
-
-enum {
- SP_IDX = 15,
-};
-
-/* Write-back slots */
-union slot_data {
- unsigned_1 _1;
- unsigned_2 _2;
- unsigned_4 _4;
- unsigned_8 _8;
-};
-struct slot {
- void *dest;
- int size;
- union slot_data data;
- union slot_data mask;
-};
-enum {
- NR_SLOTS = 16,
-};
-#define SLOT (State.slot)
-#define SLOT_NR (State.slot_nr)
-#define SLOT_PEND_MASK(DEST, MSK, VAL) \
- do \
- { \
- SLOT[SLOT_NR].dest = &(DEST); \
- SLOT[SLOT_NR].size = sizeof (DEST); \
- switch (sizeof (DEST)) \
- { \
- case 1: \
- SLOT[SLOT_NR].data._1 = (unsigned_1) (VAL); \
- SLOT[SLOT_NR].mask._1 = (unsigned_1) (MSK); \
- break; \
- case 2: \
- SLOT[SLOT_NR].data._2 = (unsigned_2) (VAL); \
- SLOT[SLOT_NR].mask._2 = (unsigned_2) (MSK); \
- break; \
- case 4: \
- SLOT[SLOT_NR].data._4 = (unsigned_4) (VAL); \
- SLOT[SLOT_NR].mask._4 = (unsigned_4) (MSK); \
- break; \
- case 8: \
- SLOT[SLOT_NR].data._8 = (unsigned_8) (VAL); \
- SLOT[SLOT_NR].mask._8 = (unsigned_8) (MSK); \
- break; \
- } \
- SLOT_NR = (SLOT_NR + 1); \
- } \
- while (0)
-#define SLOT_PEND(DEST, VAL) SLOT_PEND_MASK(DEST, 0, VAL)
-#define SLOT_DISCARD() (SLOT_NR = 0)
-#define SLOT_FLUSH() \
- do \
- { \
- int i; \
- for (i = 0; i < SLOT_NR; i++) \
- { \
- switch (SLOT[i].size) \
- { \
- case 1: \
- *(unsigned_1*) SLOT[i].dest &= SLOT[i].mask._1; \
- *(unsigned_1*) SLOT[i].dest |= SLOT[i].data._1; \
- break; \
- case 2: \
- *(unsigned_2*) SLOT[i].dest &= SLOT[i].mask._2; \
- *(unsigned_2*) SLOT[i].dest |= SLOT[i].data._2; \
- break; \
- case 4: \
- *(unsigned_4*) SLOT[i].dest &= SLOT[i].mask._4; \
- *(unsigned_4*) SLOT[i].dest |= SLOT[i].data._4; \
- break; \
- case 8: \
- *(unsigned_8*) SLOT[i].dest &= SLOT[i].mask._8; \
- *(unsigned_8*) SLOT[i].dest |= SLOT[i].data._8; \
- break; \
- } \
- } \
- SLOT_NR = 0; \
- } \
- while (0)
-#define SLOT_DUMP() \
- do \
- { \
- int i; \
- for (i = 0; i < SLOT_NR; i++) \
- { \
- switch (SLOT[i].size) \
- { \
- case 1: \
- printf ("SLOT %d *0x%08lx & 0x%02x | 0x%02x\n", i, \
- (long) SLOT[i].dest, \
- (unsigned) SLOT[i].mask._1, \
- (unsigned) SLOT[i].data._1); \
- break; \
- case 2: \
- printf ("SLOT %d *0x%08lx & 0x%04x | 0x%04x\n", i, \
- (long) SLOT[i].dest, \
- (unsigned) SLOT[i].mask._2, \
- (unsigned) SLOT[i].data._2); \
- break; \
- case 4: \
- printf ("SLOT %d *0x%08lx & 0x%08x | 0x%08x\n", i, \
- (long) SLOT[i].dest, \
- (unsigned) SLOT[i].mask._4, \
- (unsigned) SLOT[i].data._4); \
- break; \
- case 8: \
- printf ("SLOT %d *0x%08lx & 0x%08x%08x | 0x%08x%08x\n", i, \
- (long) SLOT[i].dest, \
- (unsigned) (SLOT[i].mask._8 >> 32), \
- (unsigned) SLOT[i].mask._8, \
- (unsigned) (SLOT[i].data._8 >> 32), \
- (unsigned) SLOT[i].data._8); \
- break; \
- } \
- } \
- } \
- while (0)
-
-/* d10v memory: There are three separate d10v memory regions IMEM,
- UMEM and DMEM. The IMEM and DMEM are further broken down into
- blocks (very like VM pages). */
-
-enum
-{
- IMAP_BLOCK_SIZE = 0x20000,
- DMAP_BLOCK_SIZE = 0x4000,
-};
-
-/* Implement the three memory regions using sparse arrays. Allocate
- memory using ``segments''. A segment must be at least as large as
- a BLOCK - ensures that an access that doesn't cross a block
- boundary can't cross a segment boundary */
-
-enum
-{
- SEGMENT_SIZE = 0x20000, /* 128KB - MAX(IMAP_BLOCK_SIZE,DMAP_BLOCK_SIZE) */
- IMEM_SEGMENTS = 8, /* 1MB */
- DMEM_SEGMENTS = 8, /* 1MB */
- UMEM_SEGMENTS = 128 /* 16MB */
-};
-
-struct d10v_memory
-{
- uint8 *insn[IMEM_SEGMENTS];
- uint8 *data[DMEM_SEGMENTS];
- uint8 *unif[UMEM_SEGMENTS];
- uint8 fault[16];
-};
-
-struct _state
-{
- reg_t regs[16]; /* general-purpose registers */
-#define GPR(N) (State.regs[(N)] + 0)
-#define SET_GPR(N,VAL) SLOT_PEND (State.regs[(N)], (VAL))
-
-#define GPR32(N) ((((uint32) State.regs[(N) + 0]) << 16) \
- | (uint16) State.regs[(N) + 1])
-#define SET_GPR32(N,VAL) do { SET_GPR (OP[0] + 0, (VAL) >> 16); SET_GPR (OP[0] + 1, (VAL)); } while (0)
-
- reg_t cregs[16]; /* control registers */
-#define CREG(N) (State.cregs[(N)] + 0)
-#define SET_CREG(N,VAL) move_to_cr ((N), 0, (VAL), 0)
-#define SET_HW_CREG(N,VAL) move_to_cr ((N), 0, (VAL), 1)
-
- reg_t sp[2]; /* holding area for SPI(0)/SPU(1) */
-#define HELD_SP(N) (State.sp[(N)] + 0)
-#define SET_HELD_SP(N,VAL) SLOT_PEND (State.sp[(N)], (VAL))
-
- int64 a[2]; /* accumulators */
-#define ACC(N) (State.a[(N)] + 0)
-#define SET_ACC(N,VAL) SLOT_PEND (State.a[(N)], (VAL) & MASK40)
-
- /* writeback info */
- struct slot slot[NR_SLOTS];
- int slot_nr;
-
- /* trace data */
- struct {
- uint16 psw;
- } trace;
-
- uint8 exe;
- int exception;
- int pc_changed;
-
- /* NOTE: everything below this line is not reset by
- sim_create_inferior() */
-
- struct d10v_memory mem;
-
- enum _ins_type ins_type;
-
-} State;
-
-
-extern host_callback *d10v_callback;
-extern uint16 OP[4];
-extern struct simops Simops[];
-extern asection *text;
-extern bfd_vma text_start;
-extern bfd_vma text_end;
-extern bfd *prog_bfd;
-
-enum
-{
- PSW_CR = 0,
- BPSW_CR = 1,
- PC_CR = 2,
- BPC_CR = 3,
- DPSW_CR = 4,
- DPC_CR = 5,
- RPT_C_CR = 7,
- RPT_S_CR = 8,
- RPT_E_CR = 9,
- MOD_S_CR = 10,
- MOD_E_CR = 11,
- IBA_CR = 14,
-};
-
-enum
-{
- PSW_SM_BIT = 0x8000,
- PSW_EA_BIT = 0x2000,
- PSW_DB_BIT = 0x1000,
- PSW_DM_BIT = 0x0800,
- PSW_IE_BIT = 0x0400,
- PSW_RP_BIT = 0x0200,
- PSW_MD_BIT = 0x0100,
- PSW_FX_BIT = 0x0080,
- PSW_ST_BIT = 0x0040,
- PSW_F0_BIT = 0x0008,
- PSW_F1_BIT = 0x0004,
- PSW_C_BIT = 0x0001,
-};
-
-#define PSW CREG (PSW_CR)
-#define SET_PSW(VAL) SET_CREG (PSW_CR, (VAL))
-#define SET_HW_PSW(VAL) SET_HW_CREG (PSW_CR, (VAL))
-#define SET_PSW_BIT(MASK,VAL) move_to_cr (PSW_CR, ~(MASK), (VAL) ? (MASK) : 0, 1)
-
-#define PSW_SM ((PSW & PSW_SM_BIT) != 0)
-#define SET_PSW_SM(VAL) SET_PSW_BIT (PSW_SM_BIT, (VAL))
-
-#define PSW_EA ((PSW & PSW_EA_BIT) != 0)
-#define SET_PSW_EA(VAL) SET_PSW_BIT (PSW_EA_BIT, (VAL))
-
-#define PSW_DB ((PSW & PSW_DB_BIT) != 0)
-#define SET_PSW_DB(VAL) SET_PSW_BIT (PSW_DB_BIT, (VAL))
-
-#define PSW_DM ((PSW & PSW_DM_BIT) != 0)
-#define SET_PSW_DM(VAL) SET_PSW_BIT (PSW_DM_BIT, (VAL))
-
-#define PSW_IE ((PSW & PSW_IE_BIT) != 0)
-#define SET_PSW_IE(VAL) SET_PSW_BIT (PSW_IE_BIT, (VAL))
-
-#define PSW_RP ((PSW & PSW_RP_BIT) != 0)
-#define SET_PSW_RP(VAL) SET_PSW_BIT (PSW_RP_BIT, (VAL))
-
-#define PSW_MD ((PSW & PSW_MD_BIT) != 0)
-#define SET_PSW_MD(VAL) SET_PSW_BIT (PSW_MD_BIT, (VAL))
-
-#define PSW_FX ((PSW & PSW_FX_BIT) != 0)
-#define SET_PSW_FX(VAL) SET_PSW_BIT (PSW_FX_BIT, (VAL))
-
-#define PSW_ST ((PSW & PSW_ST_BIT) != 0)
-#define SET_PSW_ST(VAL) SET_PSW_BIT (PSW_ST_BIT, (VAL))
-
-#define PSW_F0 ((PSW & PSW_F0_BIT) != 0)
-#define SET_PSW_F0(VAL) SET_PSW_BIT (PSW_F0_BIT, (VAL))
-
-#define PSW_F1 ((PSW & PSW_F1_BIT) != 0)
-#define SET_PSW_F1(VAL) SET_PSW_BIT (PSW_F1_BIT, (VAL))
-
-#define PSW_C ((PSW & PSW_C_BIT) != 0)
-#define SET_PSW_C(VAL) SET_PSW_BIT (PSW_C_BIT, (VAL))
-
-/* See simopsc.:move_to_cr() for registers that can not be read-from
- or assigned-to directly */
-
-#define PC CREG (PC_CR)
-#define SET_PC(VAL) SET_CREG (PC_CR, (VAL))
-
-#define BPSW CREG (BPSW_CR)
-#define SET_BPSW(VAL) SET_CREG (BPSW_CR, (VAL))
-
-#define BPC CREG (BPC_CR)
-#define SET_BPC(VAL) SET_CREG (BPC_CR, (VAL))
-
-#define DPSW CREG (DPSW_CR)
-#define SET_DPSW(VAL) SET_CREG (DPSW_CR, (VAL))
-
-#define DPC CREG (DPC_CR)
-#define SET_DPC(VAL) SET_CREG (DPC_CR, (VAL))
-
-#define RPT_C CREG (RPT_C_CR)
-#define SET_RPT_C(VAL) SET_CREG (RPT_C_CR, (VAL))
-
-#define RPT_S CREG (RPT_S_CR)
-#define SET_RPT_S(VAL) SET_CREG (RPT_S_CR, (VAL))
-
-#define RPT_E CREG (RPT_E_CR)
-#define SET_RPT_E(VAL) SET_CREG (RPT_E_CR, (VAL))
-
-#define MOD_S CREG (MOD_S_CR)
-#define SET_MOD_S(VAL) SET_CREG (MOD_S_CR, (VAL))
-
-#define MOD_E CREG (MOD_E_CR)
-#define SET_MOD_E(VAL) SET_CREG (MOD_E_CR, (VAL))
-
-#define IBA CREG (IBA_CR)
-#define SET_IBA(VAL) SET_CREG (IBA_CR, (VAL))
-
-
-#define SIG_D10V_STOP -1
-#define SIG_D10V_EXIT -2
-#define SIG_D10V_BUS -3
-
-#define SEXT3(x) ((((x)&0x7)^(~3))+4)
-
-/* sign-extend a 4-bit number */
-#define SEXT4(x) ((((x)&0xf)^(~7))+8)
-
-/* sign-extend an 8-bit number */
-#define SEXT8(x) ((((x)&0xff)^(~0x7f))+0x80)
-
-/* sign-extend a 16-bit number */
-#define SEXT16(x) ((((x)&0xffff)^(~0x7fff))+0x8000)
-
-/* sign-extend a 32-bit number */
-#define SEXT32(x) ((((x)&SIGNED64(0xffffffff))^(~SIGNED64(0x7fffffff)))+SIGNED64(0x80000000))
-
-/* sign extend a 40 bit number */
-#define SEXT40(x) ((((x)&SIGNED64(0xffffffffff))^(~SIGNED64(0x7fffffffff)))+SIGNED64(0x8000000000))
-
-/* sign extend a 44 bit number */
-#define SEXT44(x) ((((x)&SIGNED64(0xfffffffffff))^(~SIGNED64(0x7ffffffffff)))+SIGNED64(0x80000000000))
-
-/* sign extend a 56 bit number */
-#define SEXT56(x) ((((x)&SIGNED64(0xffffffffffffff))^(~SIGNED64(0x7fffffffffffff)))+SIGNED64(0x80000000000000))
-
-/* sign extend a 60 bit number */
-#define SEXT60(x) ((((x)&SIGNED64(0xfffffffffffffff))^(~SIGNED64(0x7ffffffffffffff)))+SIGNED64(0x800000000000000))
-
-#define MAX32 SIGNED64(0x7fffffff)
-#define MIN32 SIGNED64(0xff80000000)
-#define MASK32 SIGNED64(0xffffffff)
-#define MASK40 SIGNED64(0xffffffffff)
-
-/* The alignment of MOD_E in the following macro depends upon "i"
- always being a power of 2. */
-#define INC_ADDR(x,i) \
-do \
- { \
- int test_i = i < 0 ? i : ~((i) - 1); \
- if (PSW_MD && GPR (x) == (MOD_E & test_i)) \
- SET_GPR (x, MOD_S); \
- else \
- SET_GPR (x, GPR (x) + (i)); \
- } \
-while (0)
-
-extern uint8 *dmem_addr (uint16 offset);
-extern uint8 *imem_addr PARAMS ((uint32));
-extern bfd_vma decode_pc PARAMS ((void));
-
-#define RB(x) (*(dmem_addr(x)))
-#define SB(addr,data) ( RB(addr) = (data & 0xff))
-
-#if defined(__GNUC__) && defined(__OPTIMIZE__) && !defined(NO_ENDIAN_INLINE)
-#define ENDIAN_INLINE static __inline__
-#include "endian.c"
-#undef ENDIAN_INLINE
-
-#else
-extern uint32 get_longword PARAMS ((uint8 *));
-extern uint16 get_word PARAMS ((uint8 *));
-extern int64 get_longlong PARAMS ((uint8 *));
-extern void write_word PARAMS ((uint8 *addr, uint16 data));
-extern void write_longword PARAMS ((uint8 *addr, uint32 data));
-extern void write_longlong PARAMS ((uint8 *addr, int64 data));
-#endif
-
-#define SW(addr,data) write_word(dmem_addr(addr),data)
-#define RW(x) get_word(dmem_addr(x))
-#define SLW(addr,data) write_longword(dmem_addr(addr),data)
-#define RLW(x) get_longword(dmem_addr(x))
-#define READ_16(x) get_word(x)
-#define WRITE_16(addr,data) write_word(addr,data)
-#define READ_64(x) get_longlong(x)
-#define WRITE_64(addr,data) write_longlong(addr,data)
-
-#define JMP(x) do { SET_PC (x); State.pc_changed = 1; } while (0)
-
-#define RIE_VECTOR_START 0xffc2
-#define AE_VECTOR_START 0xffc3
-#define TRAP_VECTOR_START 0xffc4 /* vector for trap 0 */
-#define DBT_VECTOR_START 0xffd4
-#define SDBT_VECTOR_START 0xffd5
-
-/* Scedule a store of VAL into cr[CR]. MASK indicates the bits in
- cr[CR] that should not be modified (i.e. cr[CR] = (cr[CR] & MASK) |
- (VAL & ~MASK)). In addition, unless PSW_HW_P, a VAL intended for
- PSW is masked for zero bits. */
-
-extern reg_t move_to_cr (int cr, reg_t mask, reg_t val, int psw_hw_p);
diff --git a/sim/d10v/endian.c b/sim/d10v/endian.c
deleted file mode 100644
index 9ef503eb0e2..00000000000
--- a/sim/d10v/endian.c
+++ /dev/null
@@ -1,137 +0,0 @@
-/* If we're being compiled as a .c file, rather than being included in
- d10v_sim.h, then ENDIAN_INLINE won't be defined yet. */
-
-#ifndef ENDIAN_INLINE
-#define NO_ENDIAN_INLINE
-#include "d10v_sim.h"
-#define ENDIAN_INLINE
-#endif
-
-ENDIAN_INLINE uint16
-get_word (x)
- uint8 *x;
-{
-#if (defined(__i386__) || defined(__i486__) || defined(__i586__) || defined(__i686__)) && defined(__GNUC__)
-
- unsigned short word = *(unsigned short *)x;
- __asm__ ("xchgb %b0,%h0" : "=q" (word) : "0" (word));
- return word;
-
-#elif defined(WORDS_BIGENDIAN)
- /* It is safe to do this on big endian hosts, since the d10v requires that words be
- aligned on 16-bit boundaries. */
- return *(uint16 *)x;
-
-#else
- return ((uint16)x[0]<<8) + x[1];
-#endif
-}
-
-ENDIAN_INLINE uint32
-get_longword (x)
- uint8 *x;
-{
-#if (defined(__i486__) || defined(__i586__) || defined(__i686__)) && defined(__GNUC__) && defined(USE_BSWAP)
-
- unsigned int long_word = *(unsigned *)x;
- __asm__ ("bswap %0" : "=r" (long_word) : "0" (long_word));
- return long_word;
-
-#elif (defined(__i386__) || defined(__i486__) || defined(__i586__) || defined(__i686__)) && defined(__GNUC__)
-
- unsigned int long_word = *(unsigned *)x;
- __asm__("xchgb %b0,%h0\n\t" /* swap lower bytes */
- "rorl $16,%0\n\t" /* swap words */
- "xchgb %b0,%h0" /* swap higher bytes */
- :"=q" (long_word)
- : "0" (long_word));
-
- return long_word;
-
-#elif (defined(_POWER) && defined(_AIX)) || (defined(__PPC__) && defined(__BIG_ENDIAN__))
- /* Power & PowerPC computers in big endian mode can handle unaligned loads&stores */
- return *(uint32 *)x;
-
-#elif defined(WORDS_BIGENDIAN)
- /* long words must be aligned on at least 16-bit boundaries, so this should be safe. */
- return (((uint32) *(uint16 *)x)<<16) | ((uint32) *(uint16 *)(x+2));
-
-#else
- return ((uint32)x[0]<<24) + ((uint32)x[1]<<16) + ((uint32)x[2]<<8) + ((uint32)x[3]);
-#endif
-}
-
-ENDIAN_INLINE int64
-get_longlong (x)
- uint8 *x;
-{
- uint32 top = get_longword (x);
- uint32 bottom = get_longword (x+4);
- return (((int64)top)<<32) | (int64)bottom;
-}
-
-ENDIAN_INLINE void
-write_word (addr, data)
- uint8 *addr;
- uint16 data;
-{
-#if (defined(__i386__) || defined(__i486__) || defined(__i586__) || defined(__i686__)) && defined(__GNUC__)
-
- __asm__ ("xchgb %b0,%h0" : "=q" (data) : "0" (data));
- *(uint16 *)addr = data;
-
-#elif defined(WORDS_BIGENDIAN)
- /* It is safe to do this on big endian hosts, since the d10v requires that words be
- aligned on 16-bit boundaries. */
- *(uint16 *)addr = data;
-
-#else
- addr[0] = (data >> 8) & 0xff;
- addr[1] = data & 0xff;
-#endif
-}
-
-ENDIAN_INLINE void
-write_longword (addr, data)
- uint8 *addr;
- uint32 data;
-{
-#if (defined(__i486__) || defined(__i586__) || defined(__i686__)) && defined(__GNUC__) && defined(USE_BSWAP)
-
- __asm__ ("bswap %0" : "=r" (data) : "0" (data));
- *(uint32 *)addr = data;
-
-#elif (defined(__i386__) || defined(__i486__) || defined(__i586__) || defined(__i686__)) && defined(__GNUC__)
-
- __asm__("xchgb %b0,%h0\n\t" /* swap lower bytes */
- "rorl $16,%0\n\t" /* swap words */
- "xchgb %b0,%h0" /* swap higher bytes */
- :"=q" (data)
- : "0" (data));
-
- *(uint32 *)addr = data;
-
-#elif (defined(_POWER) && defined(_AIX)) || (defined(__PPC__) && defined(__BIG_ENDIAN__))
- /* Power & PowerPC computers in big endian mode can handle unaligned loads&stores */
- *(uint32 *)addr = data;
-
-#elif defined(WORDS_BIGENDIAN)
- *(uint16 *)addr = (uint16)(data >> 16);
- *(uint16 *)(addr + 2) = (uint16)data;
-
-#else
- addr[0] = (data >> 24) & 0xff;
- addr[1] = (data >> 16) & 0xff;
- addr[2] = (data >> 8) & 0xff;
- addr[3] = data & 0xff;
-#endif
-}
-
-ENDIAN_INLINE void
-write_longlong (addr, data)
- uint8 *addr;
- int64 data;
-{
- write_longword (addr, (uint32)(data >> 32));
- write_longword (addr+4, (uint32)data);
-}
diff --git a/sim/d10v/gencode.c b/sim/d10v/gencode.c
deleted file mode 100644
index 2d1269be996..00000000000
--- a/sim/d10v/gencode.c
+++ /dev/null
@@ -1,156 +0,0 @@
-#include "config.h"
-#include <stdio.h>
-#include <ctype.h>
-#include <limits.h>
-#include "ansidecl.h"
-#include "callback.h"
-#include "opcode/d10v.h"
-
-static void write_header PARAMS ((void));
-static void write_opcodes PARAMS ((void));
-static void write_template PARAMS ((void));
-
-int
-main (argc, argv)
- int argc;
- char *argv[];
-{
- if ((argc > 1) && (strcmp (argv[1],"-h") == 0))
- write_header();
- else if ((argc > 1) && (strcmp (argv[1],"-t") == 0))
- write_template ();
- else
- write_opcodes();
- return 0;
-}
-
-
-static void
-write_header ()
-{
- struct d10v_opcode *opcode;
-
- for (opcode = (struct d10v_opcode *)d10v_opcodes; opcode->name; opcode++)
- if (opcode->format != OPCODE_FAKE)
- printf("void OP_%X PARAMS ((void));\t\t/* %s */\n",opcode->opcode, opcode->name);
-}
-
-
-/* write_template creates a file all required functions, ready */
-/* to be filled out */
-
-static void
-write_template ()
-{
- struct d10v_opcode *opcode;
- int i,j;
-
- printf ("#include \"d10v_sim.h\"\n");
- printf ("#include \"simops.h\"\n");
-
- for (opcode = (struct d10v_opcode *)d10v_opcodes; opcode->name; opcode++)
- {
- if (opcode->format != OPCODE_FAKE)
- {
- printf("/* %s */\nvoid\nOP_%X ()\n{\n",opcode->name,opcode->opcode);
-
- /* count operands */
- j = 0;
- for (i=0;i<6;i++)
- {
- int flags = d10v_operands[opcode->operands[i]].flags;
- if ((flags & OPERAND_REG) || (flags & OPERAND_NUM) || (flags & OPERAND_ADDR))
- j++;
- }
- switch (j)
- {
- case 0:
- printf ("printf(\" %s\\n\");\n",opcode->name);
- break;
- case 1:
- printf ("printf(\" %s\\t%%x\\n\",OP[0]);\n",opcode->name);
- break;
- case 2:
- printf ("printf(\" %s\\t%%x,%%x\\n\",OP[0],OP[1]);\n",opcode->name);
- break;
- case 3:
- printf ("printf(\" %s\\t%%x,%%x,%%x\\n\",OP[0],OP[1],OP[2]);\n",opcode->name);
- break;
- default:
- fprintf (stderr,"Too many operands: %d\n",j);
- }
- printf ("}\n\n");
- }
- }
-}
-
-
-long Opcodes[512];
-static int curop=0;
-
-check_opcodes( long op)
-{
- int i;
-
- for (i=0;i<curop;i++)
- if (Opcodes[i] == op)
- fprintf(stderr,"DUPLICATE OPCODES: %x\n",op);
-}
-
-
-static void
-write_opcodes ()
-{
- struct d10v_opcode *opcode;
- int i, j;
-
- /* write out opcode table */
- printf ("#include \"d10v_sim.h\"\n");
- printf ("#include \"simops.h\"\n\n");
- printf ("struct simops Simops[] = {\n");
-
- for (opcode = (struct d10v_opcode *)d10v_opcodes; opcode->name; opcode++)
- {
- if (opcode->format != OPCODE_FAKE)
- {
- printf (" { %ld,%d,%ld,%d,%d,%d,%d,OP_%X,", opcode->opcode,
- (opcode->format & LONG_OPCODE) ? 1 : 0, opcode->mask, opcode->format,
- opcode->cycles, opcode->unit, opcode->exec_type, opcode->opcode);
-
- /* REMOVE ME */
- check_opcodes (opcode->opcode);
- Opcodes[curop++] = opcode->opcode;
-
- j = 0;
- for (i=0;i<6;i++)
- {
- int flags = d10v_operands[opcode->operands[i]].flags;
- if ((flags & OPERAND_REG) || (flags & OPERAND_NUM) || (flags & OPERAND_ADDR))
- j++;
- }
- printf ("%d,",j);
-
- j = 0;
- for (i=0;i<6;i++)
- {
- int flags = d10v_operands[opcode->operands[i]].flags;
- int shift = d10v_operands[opcode->operands[i]].shift;
- if ((flags & OPERAND_REG) || (flags & OPERAND_NUM)|| (flags & OPERAND_ADDR))
- {
- if (j == 0)
- printf ("{");
- else
- printf (", ");
- if ((flags & OPERAND_REG) && (opcode->format == LONG_L))
- shift += 15;
- printf ("%d,%d,%d",shift,d10v_operands[opcode->operands[i]].bits,flags);
- j = 1;
- }
- }
- if (j)
- printf ("}");
- printf ("},\n");
- }
- }
- printf ("{ 0,0,0,0,0,0,0,(void (*)(void))0,0,{0,0,0}},\n};\n");
-}
diff --git a/sim/d10v/interp.c b/sim/d10v/interp.c
deleted file mode 100644
index f56df31c298..00000000000
--- a/sim/d10v/interp.c
+++ /dev/null
@@ -1,1460 +0,0 @@
-#include <signal.h>
-#include "sysdep.h"
-#include "bfd.h"
-#include "callback.h"
-#include "remote-sim.h"
-
-#include "d10v_sim.h"
-#include "sim-d10v.h"
-
-enum _leftright { LEFT_FIRST, RIGHT_FIRST };
-
-static char *myname;
-static SIM_OPEN_KIND sim_kind;
-int d10v_debug;
-
-/* Set this to true to get the previous segment layout. */
-
-int old_segment_mapping;
-
-host_callback *d10v_callback;
-unsigned long ins_type_counters[ (int)INS_MAX ];
-
-uint16 OP[4];
-
-static int init_text_p = 0;
-/* non-zero if we opened prog_bfd */
-static int prog_bfd_was_opened_p;
-bfd *prog_bfd;
-asection *text;
-bfd_vma text_start;
-bfd_vma text_end;
-
-static long hash PARAMS ((long insn, int format));
-static struct hash_entry *lookup_hash PARAMS ((uint32 ins, int size));
-static void get_operands PARAMS ((struct simops *s, uint32 ins));
-static void do_long PARAMS ((uint32 ins));
-static void do_2_short PARAMS ((uint16 ins1, uint16 ins2, enum _leftright leftright));
-static void do_parallel PARAMS ((uint16 ins1, uint16 ins2));
-static char *add_commas PARAMS ((char *buf, int sizeof_buf, unsigned long value));
-extern void sim_set_profile PARAMS ((int n));
-extern void sim_set_profile_size PARAMS ((int n));
-static INLINE uint8 *map_memory (unsigned phys_addr);
-
-#ifdef NEED_UI_LOOP_HOOK
-/* How often to run the ui_loop update, when in use */
-#define UI_LOOP_POLL_INTERVAL 0x14000
-
-/* Counter for the ui_loop_hook update */
-static long ui_loop_hook_counter = UI_LOOP_POLL_INTERVAL;
-
-/* Actual hook to call to run through gdb's gui event loop */
-extern int (*ui_loop_hook) PARAMS ((int signo));
-#endif /* NEED_UI_LOOP_HOOK */
-
-#ifndef INLINE
-#if defined(__GNUC__) && defined(__OPTIMIZE__)
-#define INLINE __inline__
-#else
-#define INLINE
-#endif
-#endif
-
-#define MAX_HASH 63
-struct hash_entry
-{
- struct hash_entry *next;
- uint32 opcode;
- uint32 mask;
- int size;
- struct simops *ops;
-};
-
-struct hash_entry hash_table[MAX_HASH+1];
-
-INLINE static long
-hash(insn, format)
- long insn;
- int format;
-{
- if (format & LONG_OPCODE)
- return ((insn & 0x3F000000) >> 24);
- else
- return((insn & 0x7E00) >> 9);
-}
-
-INLINE static struct hash_entry *
-lookup_hash (ins, size)
- uint32 ins;
- int size;
-{
- struct hash_entry *h;
-
- if (size)
- h = &hash_table[(ins & 0x3F000000) >> 24];
- else
- h = &hash_table[(ins & 0x7E00) >> 9];
-
- while ((ins & h->mask) != h->opcode || h->size != size)
- {
- if (h->next == NULL)
- {
- State.exception = SIGILL;
- State.pc_changed = 1; /* Don't increment the PC. */
- return NULL;
- }
- h = h->next;
- }
- return (h);
-}
-
-INLINE static void
-get_operands (struct simops *s, uint32 ins)
-{
- int i, shift, bits, flags;
- uint32 mask;
- for (i=0; i < s->numops; i++)
- {
- shift = s->operands[3*i];
- bits = s->operands[3*i+1];
- flags = s->operands[3*i+2];
- mask = 0x7FFFFFFF >> (31 - bits);
- OP[i] = (ins >> shift) & mask;
- }
- /* FIXME: for tracing, update values that need to be updated each
- instruction decode cycle */
- State.trace.psw = PSW;
-}
-
-bfd_vma
-decode_pc ()
-{
- asection *s;
- if (!init_text_p && prog_bfd != NULL)
- {
- init_text_p = 1;
- for (s = prog_bfd->sections; s; s = s->next)
- if (strcmp (bfd_get_section_name (prog_bfd, s), ".text") == 0)
- {
- text = s;
- text_start = bfd_get_section_vma (prog_bfd, s);
- text_end = text_start + bfd_section_size (prog_bfd, s);
- break;
- }
- }
-
- return (PC << 2) + text_start;
-}
-
-static void
-do_long (ins)
- uint32 ins;
-{
- struct hash_entry *h;
-#ifdef DEBUG
- if ((d10v_debug & DEBUG_INSTRUCTION) != 0)
- (*d10v_callback->printf_filtered) (d10v_callback, "do_long 0x%x\n", ins);
-#endif
- h = lookup_hash (ins, 1);
- if (h == NULL)
- return;
- get_operands (h->ops, ins);
- State.ins_type = INS_LONG;
- ins_type_counters[ (int)State.ins_type ]++;
- (h->ops->func)();
-}
-
-static void
-do_2_short (ins1, ins2, leftright)
- uint16 ins1, ins2;
- enum _leftright leftright;
-{
- struct hash_entry *h;
- enum _ins_type first, second;
-
-#ifdef DEBUG
- if ((d10v_debug & DEBUG_INSTRUCTION) != 0)
- (*d10v_callback->printf_filtered) (d10v_callback, "do_2_short 0x%x (%s) -> 0x%x\n",
- ins1, (leftright) ? "left" : "right", ins2);
-#endif
-
- if (leftright == LEFT_FIRST)
- {
- first = INS_LEFT;
- second = INS_RIGHT;
- ins_type_counters[ (int)INS_LEFTRIGHT ]++;
- }
- else
- {
- first = INS_RIGHT;
- second = INS_LEFT;
- ins_type_counters[ (int)INS_RIGHTLEFT ]++;
- }
-
- /* Issue the first instruction */
- h = lookup_hash (ins1, 0);
- if (h == NULL)
- return;
- get_operands (h->ops, ins1);
- State.ins_type = first;
- ins_type_counters[ (int)State.ins_type ]++;
- (h->ops->func)();
-
- /* Issue the second instruction (if the PC hasn't changed) */
- if (!State.pc_changed && !State.exception)
- {
- /* finish any existing instructions */
- SLOT_FLUSH ();
- h = lookup_hash (ins2, 0);
- if (h == NULL)
- return;
- get_operands (h->ops, ins2);
- State.ins_type = second;
- ins_type_counters[ (int)State.ins_type ]++;
- ins_type_counters[ (int)INS_CYCLES ]++;
- (h->ops->func)();
- }
- else if (!State.exception)
- ins_type_counters[ (int)INS_COND_JUMP ]++;
-}
-
-static void
-do_parallel (ins1, ins2)
- uint16 ins1, ins2;
-{
- struct hash_entry *h1, *h2;
-#ifdef DEBUG
- if ((d10v_debug & DEBUG_INSTRUCTION) != 0)
- (*d10v_callback->printf_filtered) (d10v_callback, "do_parallel 0x%x || 0x%x\n", ins1, ins2);
-#endif
- ins_type_counters[ (int)INS_PARALLEL ]++;
- h1 = lookup_hash (ins1, 0);
- if (h1 == NULL)
- return;
- h2 = lookup_hash (ins2, 0);
- if (h2 == NULL)
- return;
-
- if (h1->ops->exec_type == PARONLY)
- {
- get_operands (h1->ops, ins1);
- State.ins_type = INS_LEFT_COND_TEST;
- ins_type_counters[ (int)State.ins_type ]++;
- (h1->ops->func)();
- if (State.exe)
- {
- ins_type_counters[ (int)INS_COND_TRUE ]++;
- get_operands (h2->ops, ins2);
- State.ins_type = INS_RIGHT_COND_EXE;
- ins_type_counters[ (int)State.ins_type ]++;
- (h2->ops->func)();
- }
- else
- ins_type_counters[ (int)INS_COND_FALSE ]++;
- }
- else if (h2->ops->exec_type == PARONLY)
- {
- get_operands (h2->ops, ins2);
- State.ins_type = INS_RIGHT_COND_TEST;
- ins_type_counters[ (int)State.ins_type ]++;
- (h2->ops->func)();
- if (State.exe)
- {
- ins_type_counters[ (int)INS_COND_TRUE ]++;
- get_operands (h1->ops, ins1);
- State.ins_type = INS_LEFT_COND_EXE;
- ins_type_counters[ (int)State.ins_type ]++;
- (h1->ops->func)();
- }
- else
- ins_type_counters[ (int)INS_COND_FALSE ]++;
- }
- else
- {
- get_operands (h1->ops, ins1);
- State.ins_type = INS_LEFT_PARALLEL;
- ins_type_counters[ (int)State.ins_type ]++;
- (h1->ops->func)();
- if (!State.exception)
- {
- get_operands (h2->ops, ins2);
- State.ins_type = INS_RIGHT_PARALLEL;
- ins_type_counters[ (int)State.ins_type ]++;
- (h2->ops->func)();
- }
- }
-}
-
-static char *
-add_commas(buf, sizeof_buf, value)
- char *buf;
- int sizeof_buf;
- unsigned long value;
-{
- int comma = 3;
- char *endbuf = buf + sizeof_buf - 1;
-
- *--endbuf = '\0';
- do {
- if (comma-- == 0)
- {
- *--endbuf = ',';
- comma = 2;
- }
-
- *--endbuf = (value % 10) + '0';
- } while ((value /= 10) != 0);
-
- return endbuf;
-}
-
-void
-sim_size (power)
- int power;
-
-{
- int i;
- for (i = 0; i < IMEM_SEGMENTS; i++)
- {
- if (State.mem.insn[i])
- free (State.mem.insn[i]);
- }
- for (i = 0; i < DMEM_SEGMENTS; i++)
- {
- if (State.mem.data[i])
- free (State.mem.data[i]);
- }
- for (i = 0; i < UMEM_SEGMENTS; i++)
- {
- if (State.mem.unif[i])
- free (State.mem.unif[i]);
- }
- /* Always allocate dmem segment 0. This contains the IMAP and DMAP
- registers. */
- State.mem.data[0] = calloc (1, SEGMENT_SIZE);
-}
-
-/* For tracing - leave info on last access around. */
-static char *last_segname = "invalid";
-static char *last_from = "invalid";
-static char *last_to = "invalid";
-
-enum
- {
- IMAP0_OFFSET = 0xff00,
- DMAP0_OFFSET = 0xff08,
- DMAP2_SHADDOW = 0xff04,
- DMAP2_OFFSET = 0xff0c
- };
-
-static void
-set_dmap_register (int reg_nr, unsigned long value)
-{
- uint8 *raw = map_memory (SIM_D10V_MEMORY_DATA
- + DMAP0_OFFSET + 2 * reg_nr);
- WRITE_16 (raw, value);
-#ifdef DEBUG
- if ((d10v_debug & DEBUG_MEMORY))
- {
- (*d10v_callback->printf_filtered)
- (d10v_callback, "mem: dmap%d=0x%04lx\n", reg_nr, value);
- }
-#endif
-}
-
-static unsigned long
-dmap_register (int reg_nr)
-{
- uint8 *raw = map_memory (SIM_D10V_MEMORY_DATA
- + DMAP0_OFFSET + 2 * reg_nr);
- return READ_16 (raw);
-}
-
-static void
-set_imap_register (int reg_nr, unsigned long value)
-{
- uint8 *raw = map_memory (SIM_D10V_MEMORY_DATA
- + IMAP0_OFFSET + 2 * reg_nr);
- WRITE_16 (raw, value);
-#ifdef DEBUG
- if ((d10v_debug & DEBUG_MEMORY))
- {
- (*d10v_callback->printf_filtered)
- (d10v_callback, "mem: imap%d=0x%04lx\n", reg_nr, value);
- }
-#endif
-}
-
-static unsigned long
-imap_register (int reg_nr)
-{
- uint8 *raw = map_memory (SIM_D10V_MEMORY_DATA
- + IMAP0_OFFSET + 2 * reg_nr);
- return READ_16 (raw);
-}
-
-enum
- {
- HELD_SPI_IDX = 0,
- HELD_SPU_IDX = 1
- };
-
-static unsigned long
-spu_register (void)
-{
- if (PSW_SM)
- return GPR (SP_IDX);
- else
- return HELD_SP (HELD_SPU_IDX);
-}
-
-static unsigned long
-spi_register (void)
-{
- if (!PSW_SM)
- return GPR (SP_IDX);
- else
- return HELD_SP (HELD_SPI_IDX);
-}
-
-static void
-set_spi_register (unsigned long value)
-{
- if (!PSW_SM)
- SET_GPR (SP_IDX, value);
- SET_HELD_SP (HELD_SPI_IDX, value);
-}
-
-static void
-set_spu_register (unsigned long value)
-{
- if (PSW_SM)
- SET_GPR (SP_IDX, value);
- SET_HELD_SP (HELD_SPU_IDX, value);
-}
-
-/* Given a virtual address in the DMAP address space, translate it
- into a physical address. */
-
-unsigned long
-sim_d10v_translate_dmap_addr (unsigned long offset,
- int nr_bytes,
- unsigned long *phys,
- unsigned long (*dmap_register) (int reg_nr))
-{
- short map;
- int regno;
- last_from = "logical-data";
- if (offset >= DMAP_BLOCK_SIZE * SIM_D10V_NR_DMAP_REGS)
- {
- /* Logical address out side of data segments, not supported */
- return 0;
- }
- regno = (offset / DMAP_BLOCK_SIZE);
- offset = (offset % DMAP_BLOCK_SIZE);
- if ((offset % DMAP_BLOCK_SIZE) + nr_bytes > DMAP_BLOCK_SIZE)
- {
- /* Don't cross a BLOCK boundary */
- nr_bytes = DMAP_BLOCK_SIZE - (offset % DMAP_BLOCK_SIZE);
- }
- map = dmap_register (regno);
- if (regno == 3)
- {
- /* Always maps to data memory */
- int iospi = (offset / 0x1000) % 4;
- int iosp = (map >> (4 * (3 - iospi))) % 0x10;
- last_to = "io-space";
- *phys = (SIM_D10V_MEMORY_DATA + (iosp * 0x10000) + 0xc000 + offset);
- }
- else
- {
- int sp = ((map & 0x3000) >> 12);
- int segno = (map & 0x3ff);
- switch (sp)
- {
- case 0: /* 00: Unified memory */
- *phys = SIM_D10V_MEMORY_UNIFIED + (segno * DMAP_BLOCK_SIZE) + offset;
- last_to = "unified";
- break;
- case 1: /* 01: Instruction Memory */
- *phys = SIM_D10V_MEMORY_INSN + (segno * DMAP_BLOCK_SIZE) + offset;
- last_to = "chip-insn";
- break;
- case 2: /* 10: Internal data memory */
- *phys = SIM_D10V_MEMORY_DATA + (segno << 16) + (regno * DMAP_BLOCK_SIZE) + offset;
- last_to = "chip-data";
- break;
- case 3: /* 11: Reserved */
- return 0;
- }
- }
- return nr_bytes;
-}
-
-/* Given a virtual address in the IMAP address space, translate it
- into a physical address. */
-
-unsigned long
-sim_d10v_translate_imap_addr (unsigned long offset,
- int nr_bytes,
- unsigned long *phys,
- unsigned long (*imap_register) (int reg_nr))
-{
- short map;
- int regno;
- int sp;
- int segno;
- last_from = "logical-insn";
- if (offset >= (IMAP_BLOCK_SIZE * SIM_D10V_NR_IMAP_REGS))
- {
- /* Logical address outside of IMAP segments, not supported */
- return 0;
- }
- regno = (offset / IMAP_BLOCK_SIZE);
- offset = (offset % IMAP_BLOCK_SIZE);
- if (offset + nr_bytes > IMAP_BLOCK_SIZE)
- {
- /* Don't cross a BLOCK boundary */
- nr_bytes = IMAP_BLOCK_SIZE - offset;
- }
- map = imap_register (regno);
- sp = (map & 0x3000) >> 12;
- segno = (map & 0x007f);
- switch (sp)
- {
- case 0: /* 00: unified memory */
- *phys = SIM_D10V_MEMORY_UNIFIED + (segno << 17) + offset;
- last_to = "unified";
- break;
- case 1: /* 01: instruction memory */
- *phys = SIM_D10V_MEMORY_INSN + (IMAP_BLOCK_SIZE * regno) + offset;
- last_to = "chip-insn";
- break;
- case 2: /*10*/
- /* Reserved. */
- return 0;
- case 3: /* 11: for testing - instruction memory */
- offset = (offset % 0x800);
- *phys = SIM_D10V_MEMORY_INSN + offset;
- if (offset + nr_bytes > 0x800)
- /* don't cross VM boundary */
- nr_bytes = 0x800 - offset;
- last_to = "test-insn";
- break;
- }
- return nr_bytes;
-}
-
-unsigned long
-sim_d10v_translate_addr (unsigned long memaddr,
- int nr_bytes,
- unsigned long *targ_addr,
- unsigned long (*dmap_register) (int reg_nr),
- unsigned long (*imap_register) (int reg_nr))
-{
- unsigned long phys;
- unsigned long seg;
- unsigned long off;
-
- last_from = "unknown";
- last_to = "unknown";
-
- seg = (memaddr >> 24);
- off = (memaddr & 0xffffffL);
-
- /* However, if we've asked to use the previous generation of segment
- mapping, rearrange the segments as follows. */
-
- if (old_segment_mapping)
- {
- switch (seg)
- {
- case 0x00: /* DMAP translated memory */
- seg = 0x10;
- break;
- case 0x01: /* IMAP translated memory */
- seg = 0x11;
- break;
- case 0x10: /* On-chip data memory */
- seg = 0x02;
- break;
- case 0x11: /* On-chip insn memory */
- seg = 0x01;
- break;
- case 0x12: /* Unified memory */
- seg = 0x00;
- break;
- }
- }
-
- switch (seg)
- {
- case 0x00: /* Physical unified memory */
- last_from = "phys-unified";
- last_to = "unified";
- phys = SIM_D10V_MEMORY_UNIFIED + off;
- if ((off % SEGMENT_SIZE) + nr_bytes > SEGMENT_SIZE)
- nr_bytes = SEGMENT_SIZE - (off % SEGMENT_SIZE);
- break;
-
- case 0x01: /* Physical instruction memory */
- last_from = "phys-insn";
- last_to = "chip-insn";
- phys = SIM_D10V_MEMORY_INSN + off;
- if ((off % SEGMENT_SIZE) + nr_bytes > SEGMENT_SIZE)
- nr_bytes = SEGMENT_SIZE - (off % SEGMENT_SIZE);
- break;
-
- case 0x02: /* Physical data memory segment */
- last_from = "phys-data";
- last_to = "chip-data";
- phys = SIM_D10V_MEMORY_DATA + off;
- if ((off % SEGMENT_SIZE) + nr_bytes > SEGMENT_SIZE)
- nr_bytes = SEGMENT_SIZE - (off % SEGMENT_SIZE);
- break;
-
- case 0x10: /* in logical data address segment */
- nr_bytes = sim_d10v_translate_dmap_addr (off, nr_bytes, &phys,
- dmap_register);
- break;
-
- case 0x11: /* in logical instruction address segment */
- nr_bytes = sim_d10v_translate_imap_addr (off, nr_bytes, &phys,
- imap_register);
- break;
-
- default:
- return 0;
- }
-
- *targ_addr = phys;
- return nr_bytes;
-}
-
-/* Return a pointer into the raw buffer designated by phys_addr. It
- is assumed that the client has already ensured that the access
- isn't going to cross a segment boundary. */
-
-uint8 *
-map_memory (unsigned phys_addr)
-{
- uint8 **memory;
- uint8 *raw;
- unsigned offset;
- int segment = ((phys_addr >> 24) & 0xff);
-
- switch (segment)
- {
-
- case 0x00: /* Unified memory */
- {
- memory = &State.mem.unif[(phys_addr / SEGMENT_SIZE) % UMEM_SEGMENTS];
- last_segname = "umem";
- break;
- }
-
- case 0x01: /* On-chip insn memory */
- {
- memory = &State.mem.insn[(phys_addr / SEGMENT_SIZE) % IMEM_SEGMENTS];
- last_segname = "imem";
- break;
- }
-
- case 0x02: /* On-chip data memory */
- {
- if ((phys_addr & 0xff00) == 0xff00)
- {
- phys_addr = (phys_addr & 0xffff);
- if (phys_addr == DMAP2_SHADDOW)
- {
- phys_addr = DMAP2_OFFSET;
- last_segname = "dmap";
- }
- else
- last_segname = "reg";
- }
- else
- last_segname = "dmem";
- memory = &State.mem.data[(phys_addr / SEGMENT_SIZE) % DMEM_SEGMENTS];
- break;
- }
-
- default:
- /* OOPS! */
- last_segname = "scrap";
- return State.mem.fault;
- }
-
- if (*memory == NULL)
- {
- *memory = calloc (1, SEGMENT_SIZE);
- if (*memory == NULL)
- {
- (*d10v_callback->printf_filtered) (d10v_callback, "Malloc failed.\n");
- return State.mem.fault;
- }
- }
-
- offset = (phys_addr % SEGMENT_SIZE);
- raw = *memory + offset;
- return raw;
-}
-
-/* Transfer data to/from simulated memory. Since a bug in either the
- simulated program or in gdb or the simulator itself may cause a
- bogus address to be passed in, we need to do some sanity checking
- on addresses to make sure they are within bounds. When an address
- fails the bounds check, treat it as a zero length read/write rather
- than aborting the entire run. */
-
-static int
-xfer_mem (SIM_ADDR virt,
- unsigned char *buffer,
- int size,
- int write_p)
-{
- int xfered = 0;
-
- while (xfered < size)
- {
- uint8 *memory;
- unsigned long phys;
- int phys_size;
- phys_size = sim_d10v_translate_addr (virt, size,
- &phys,
- dmap_register,
- imap_register);
- if (phys_size == 0)
- return xfered;
-
- memory = map_memory (phys);
-
-#ifdef DEBUG
- if ((d10v_debug & DEBUG_INSTRUCTION) != 0)
- {
- (*d10v_callback->printf_filtered)
- (d10v_callback,
- "sim_%s %d bytes: 0x%08lx (%s) -> 0x%08lx (%s) -> 0x%08lx (%s)\n",
- (write_p ? "write" : "read"),
- phys_size, virt, last_from,
- phys, last_to,
- (long) memory, last_segname);
- }
-#endif
-
- if (write_p)
- {
- memcpy (memory, buffer, phys_size);
- }
- else
- {
- memcpy (buffer, memory, phys_size);
- }
-
- virt += phys_size;
- buffer += phys_size;
- xfered += phys_size;
- }
-
- return size;
-}
-
-
-int
-sim_write (sd, addr, buffer, size)
- SIM_DESC sd;
- SIM_ADDR addr;
- unsigned char *buffer;
- int size;
-{
- /* FIXME: this should be performing a virtual transfer */
- return xfer_mem( addr, buffer, size, 1);
-}
-
-int
-sim_read (sd, addr, buffer, size)
- SIM_DESC sd;
- SIM_ADDR addr;
- unsigned char *buffer;
- int size;
-{
- /* FIXME: this should be performing a virtual transfer */
- return xfer_mem( addr, buffer, size, 0);
-}
-
-
-SIM_DESC
-sim_open (kind, callback, abfd, argv)
- SIM_OPEN_KIND kind;
- host_callback *callback;
- struct _bfd *abfd;
- char **argv;
-{
- struct simops *s;
- struct hash_entry *h;
- static int init_p = 0;
- char **p;
-
- sim_kind = kind;
- d10v_callback = callback;
- myname = argv[0];
- old_segment_mapping = 0;
-
- /* NOTE: This argument parsing is only effective when this function
- is called by GDB. Standalone argument parsing is handled by
- sim/common/run.c. */
- for (p = argv + 1; *p; ++p)
- {
- if (strcmp (*p, "-oldseg") == 0)
- old_segment_mapping = 1;
-#ifdef DEBUG
- else if (strcmp (*p, "-t") == 0)
- d10v_debug = DEBUG;
- else if (strncmp (*p, "-t", 2) == 0)
- d10v_debug = atoi (*p + 2);
-#endif
- else
- (*d10v_callback->printf_filtered) (d10v_callback, "ERROR: unsupported option(s): %s\n",*p);
- }
-
- /* put all the opcodes in the hash table */
- if (!init_p++)
- {
- for (s = Simops; s->func; s++)
- {
- h = &hash_table[hash(s->opcode,s->format)];
-
- /* go to the last entry in the chain */
- while (h->next)
- h = h->next;
-
- if (h->ops)
- {
- h->next = (struct hash_entry *) calloc(1,sizeof(struct hash_entry));
- if (!h->next)
- perror ("malloc failure");
-
- h = h->next;
- }
- h->ops = s;
- h->mask = s->mask;
- h->opcode = s->opcode;
- h->size = s->is_long;
- }
- }
-
- /* reset the processor state */
- if (!State.mem.data[0])
- sim_size (1);
- sim_create_inferior ((SIM_DESC) 1, NULL, NULL, NULL);
-
- /* Fudge our descriptor. */
- return (SIM_DESC) 1;
-}
-
-
-void
-sim_close (sd, quitting)
- SIM_DESC sd;
- int quitting;
-{
- if (prog_bfd != NULL && prog_bfd_was_opened_p)
- {
- bfd_close (prog_bfd);
- prog_bfd = NULL;
- prog_bfd_was_opened_p = 0;
- }
-}
-
-void
-sim_set_profile (n)
- int n;
-{
- (*d10v_callback->printf_filtered) (d10v_callback, "sim_set_profile %d\n",n);
-}
-
-void
-sim_set_profile_size (n)
- int n;
-{
- (*d10v_callback->printf_filtered) (d10v_callback, "sim_set_profile_size %d\n",n);
-}
-
-uint8 *
-dmem_addr (uint16 offset)
-{
- unsigned long phys;
- uint8 *mem;
- int phys_size;
-
- /* Note: DMEM address range is 0..0x10000. Calling code can compute
- things like ``0xfffe + 0x0e60 == 0x10e5d''. Since offset's type
- is uint16 this is modulo'ed onto 0x0e5d. */
-
- phys_size = sim_d10v_translate_dmap_addr (offset, 1, &phys,
- dmap_register);
- if (phys_size == 0)
- {
- mem = State.mem.fault;
- }
- else
- mem = map_memory (phys);
-#ifdef DEBUG
- if ((d10v_debug & DEBUG_MEMORY))
- {
- (*d10v_callback->printf_filtered)
- (d10v_callback,
- "mem: 0x%08x (%s) -> 0x%08lx %d (%s) -> 0x%08lx (%s)\n",
- offset, last_from,
- phys, phys_size, last_to,
- (long) mem, last_segname);
- }
-#endif
- return mem;
-}
-
-uint8 *
-imem_addr (uint32 offset)
-{
- unsigned long phys;
- uint8 *mem;
- int phys_size = sim_d10v_translate_imap_addr (offset, 1, &phys, imap_register);
- if (phys_size == 0)
- {
- return State.mem.fault;
- }
- mem = map_memory (phys);
-#ifdef DEBUG
- if ((d10v_debug & DEBUG_MEMORY))
- {
- (*d10v_callback->printf_filtered)
- (d10v_callback,
- "mem: 0x%08x (%s) -> 0x%08lx %d (%s) -> 0x%08lx (%s)\n",
- offset, last_from,
- phys, phys_size, last_to,
- (long) mem, last_segname);
- }
-#endif
- return mem;
-}
-
-static int stop_simulator = 0;
-
-int
-sim_stop (sd)
- SIM_DESC sd;
-{
- stop_simulator = 1;
- return 1;
-}
-
-
-/* Run (or resume) the program. */
-void
-sim_resume (sd, step, siggnal)
- SIM_DESC sd;
- int step, siggnal;
-{
- uint32 inst;
- uint8 *iaddr;
-
-/* (*d10v_callback->printf_filtered) (d10v_callback, "sim_resume (%d,%d) PC=0x%x\n",step,siggnal,PC); */
- State.exception = 0;
- if (step)
- sim_stop (sd);
-
- switch (siggnal)
- {
- case 0:
- break;
-#ifdef SIGBUS
- case SIGBUS:
-#endif
- case SIGSEGV:
- SET_BPC (PC);
- SET_BPSW (PSW);
- SET_HW_PSW ((PSW & (PSW_F0_BIT | PSW_F1_BIT | PSW_C_BIT)));
- JMP (AE_VECTOR_START);
- SLOT_FLUSH ();
- break;
- case SIGILL:
- SET_BPC (PC);
- SET_BPSW (PSW);
- SET_HW_PSW ((PSW & (PSW_F0_BIT | PSW_F1_BIT | PSW_C_BIT)));
- JMP (RIE_VECTOR_START);
- SLOT_FLUSH ();
- break;
- default:
- /* just ignore it */
- break;
- }
-
- do
- {
- iaddr = imem_addr ((uint32)PC << 2);
- if (iaddr == State.mem.fault)
- {
- State.exception = SIGBUS;
- break;
- }
-
- inst = get_longword( iaddr );
-
- State.pc_changed = 0;
- ins_type_counters[ (int)INS_CYCLES ]++;
-
- switch (inst & 0xC0000000)
- {
- case 0xC0000000:
- /* long instruction */
- do_long (inst & 0x3FFFFFFF);
- break;
- case 0x80000000:
- /* R -> L */
- do_2_short ( inst & 0x7FFF, (inst & 0x3FFF8000) >> 15, RIGHT_FIRST);
- break;
- case 0x40000000:
- /* L -> R */
- do_2_short ((inst & 0x3FFF8000) >> 15, inst & 0x7FFF, LEFT_FIRST);
- break;
- case 0:
- do_parallel ((inst & 0x3FFF8000) >> 15, inst & 0x7FFF);
- break;
- }
-
- /* If the PC of the current instruction matches RPT_E then
- schedule a branch to the loop start. If one of those
- instructions happens to be a branch, than that instruction
- will be ignored */
- if (!State.pc_changed)
- {
- if (PSW_RP && PC == RPT_E)
- {
- /* Note: The behavour of a branch instruction at RPT_E
- is implementation dependant, this simulator takes the
- branch. Branching to RPT_E is valid, the instruction
- must be executed before the loop is taken. */
- if (RPT_C == 1)
- {
- SET_PSW_RP (0);
- SET_RPT_C (0);
- SET_PC (PC + 1);
- }
- else
- {
- SET_RPT_C (RPT_C - 1);
- SET_PC (RPT_S);
- }
- }
- else
- SET_PC (PC + 1);
- }
-
- /* Check for a breakpoint trap on this instruction. This
- overrides any pending branches or loops */
- if (PSW_DB && PC == IBA)
- {
- SET_BPC (PC);
- SET_BPSW (PSW);
- SET_PSW (PSW & PSW_SM_BIT);
- SET_PC (SDBT_VECTOR_START);
- }
-
- /* Writeback all the DATA / PC changes */
- SLOT_FLUSH ();
-
-#ifdef NEED_UI_LOOP_HOOK
- if (ui_loop_hook != NULL && ui_loop_hook_counter-- < 0)
- {
- ui_loop_hook_counter = UI_LOOP_POLL_INTERVAL;
- ui_loop_hook (0);
- }
-#endif /* NEED_UI_LOOP_HOOK */
- }
- while ( !State.exception && !stop_simulator);
-
- if (step && !State.exception)
- State.exception = SIGTRAP;
-}
-
-void
-sim_set_trace (void)
-{
-#ifdef DEBUG
- d10v_debug = DEBUG;
-#endif
-}
-
-void
-sim_info (sd, verbose)
- SIM_DESC sd;
- int verbose;
-{
- char buf1[40];
- char buf2[40];
- char buf3[40];
- char buf4[40];
- char buf5[40];
- unsigned long left = ins_type_counters[ (int)INS_LEFT ] + ins_type_counters[ (int)INS_LEFT_COND_EXE ];
- unsigned long left_nops = ins_type_counters[ (int)INS_LEFT_NOPS ];
- unsigned long left_parallel = ins_type_counters[ (int)INS_LEFT_PARALLEL ];
- unsigned long left_cond = ins_type_counters[ (int)INS_LEFT_COND_TEST ];
- unsigned long left_total = left + left_parallel + left_cond + left_nops;
-
- unsigned long right = ins_type_counters[ (int)INS_RIGHT ] + ins_type_counters[ (int)INS_RIGHT_COND_EXE ];
- unsigned long right_nops = ins_type_counters[ (int)INS_RIGHT_NOPS ];
- unsigned long right_parallel = ins_type_counters[ (int)INS_RIGHT_PARALLEL ];
- unsigned long right_cond = ins_type_counters[ (int)INS_RIGHT_COND_TEST ];
- unsigned long right_total = right + right_parallel + right_cond + right_nops;
-
- unsigned long unknown = ins_type_counters[ (int)INS_UNKNOWN ];
- unsigned long ins_long = ins_type_counters[ (int)INS_LONG ];
- unsigned long parallel = ins_type_counters[ (int)INS_PARALLEL ];
- unsigned long leftright = ins_type_counters[ (int)INS_LEFTRIGHT ];
- unsigned long rightleft = ins_type_counters[ (int)INS_RIGHTLEFT ];
- unsigned long cond_true = ins_type_counters[ (int)INS_COND_TRUE ];
- unsigned long cond_false = ins_type_counters[ (int)INS_COND_FALSE ];
- unsigned long cond_jump = ins_type_counters[ (int)INS_COND_JUMP ];
- unsigned long cycles = ins_type_counters[ (int)INS_CYCLES ];
- unsigned long total = (unknown + left_total + right_total + ins_long);
-
- int size = strlen (add_commas (buf1, sizeof (buf1), total));
- int parallel_size = strlen (add_commas (buf1, sizeof (buf1),
- (left_parallel > right_parallel) ? left_parallel : right_parallel));
- int cond_size = strlen (add_commas (buf1, sizeof (buf1), (left_cond > right_cond) ? left_cond : right_cond));
- int nop_size = strlen (add_commas (buf1, sizeof (buf1), (left_nops > right_nops) ? left_nops : right_nops));
- int normal_size = strlen (add_commas (buf1, sizeof (buf1), (left > right) ? left : right));
-
- (*d10v_callback->printf_filtered) (d10v_callback,
- "executed %*s left instruction(s), %*s normal, %*s parallel, %*s EXExxx, %*s nops\n",
- size, add_commas (buf1, sizeof (buf1), left_total),
- normal_size, add_commas (buf2, sizeof (buf2), left),
- parallel_size, add_commas (buf3, sizeof (buf3), left_parallel),
- cond_size, add_commas (buf4, sizeof (buf4), left_cond),
- nop_size, add_commas (buf5, sizeof (buf5), left_nops));
-
- (*d10v_callback->printf_filtered) (d10v_callback,
- "executed %*s right instruction(s), %*s normal, %*s parallel, %*s EXExxx, %*s nops\n",
- size, add_commas (buf1, sizeof (buf1), right_total),
- normal_size, add_commas (buf2, sizeof (buf2), right),
- parallel_size, add_commas (buf3, sizeof (buf3), right_parallel),
- cond_size, add_commas (buf4, sizeof (buf4), right_cond),
- nop_size, add_commas (buf5, sizeof (buf5), right_nops));
-
- if (ins_long)
- (*d10v_callback->printf_filtered) (d10v_callback,
- "executed %*s long instruction(s)\n",
- size, add_commas (buf1, sizeof (buf1), ins_long));
-
- if (parallel)
- (*d10v_callback->printf_filtered) (d10v_callback,
- "executed %*s parallel instruction(s)\n",
- size, add_commas (buf1, sizeof (buf1), parallel));
-
- if (leftright)
- (*d10v_callback->printf_filtered) (d10v_callback,
- "executed %*s instruction(s) encoded L->R\n",
- size, add_commas (buf1, sizeof (buf1), leftright));
-
- if (rightleft)
- (*d10v_callback->printf_filtered) (d10v_callback,
- "executed %*s instruction(s) encoded R->L\n",
- size, add_commas (buf1, sizeof (buf1), rightleft));
-
- if (unknown)
- (*d10v_callback->printf_filtered) (d10v_callback,
- "executed %*s unknown instruction(s)\n",
- size, add_commas (buf1, sizeof (buf1), unknown));
-
- if (cond_true)
- (*d10v_callback->printf_filtered) (d10v_callback,
- "executed %*s instruction(s) due to EXExxx condition being true\n",
- size, add_commas (buf1, sizeof (buf1), cond_true));
-
- if (cond_false)
- (*d10v_callback->printf_filtered) (d10v_callback,
- "skipped %*s instruction(s) due to EXExxx condition being false\n",
- size, add_commas (buf1, sizeof (buf1), cond_false));
-
- if (cond_jump)
- (*d10v_callback->printf_filtered) (d10v_callback,
- "skipped %*s instruction(s) due to conditional branch succeeding\n",
- size, add_commas (buf1, sizeof (buf1), cond_jump));
-
- (*d10v_callback->printf_filtered) (d10v_callback,
- "executed %*s cycle(s)\n",
- size, add_commas (buf1, sizeof (buf1), cycles));
-
- (*d10v_callback->printf_filtered) (d10v_callback,
- "executed %*s total instructions\n",
- size, add_commas (buf1, sizeof (buf1), total));
-}
-
-SIM_RC
-sim_create_inferior (sd, abfd, argv, env)
- SIM_DESC sd;
- struct _bfd *abfd;
- char **argv;
- char **env;
-{
- bfd_vma start_address;
-
- /* reset all state information */
- memset (&State.regs, 0, (int)&State.mem - (int)&State.regs);
-
- if (argv)
- {
- /* a hack to set r0/r1 with argc/argv */
- /* some high memory that won't be overwritten by the stack soon */
- bfd_vma addr = 0x7C00;
- int p = 20;
- int i = 0;
- while (argv[i])
- {
- int size = strlen (argv[i]) + 1;
- SW (addr + 2*i, addr + p);
- sim_write (sd, addr + 0, argv[i], size);
- p += size;
- i++;
- }
- SET_GPR (0, addr);
- SET_GPR (1, i);
- }
-
- /* set PC */
- if (abfd != NULL)
- start_address = bfd_get_start_address (abfd);
- else
- start_address = 0xffc0 << 2;
-#ifdef DEBUG
- if (d10v_debug)
- (*d10v_callback->printf_filtered) (d10v_callback, "sim_create_inferior: PC=0x%lx\n", (long) start_address);
-#endif
- SET_CREG (PC_CR, start_address >> 2);
-
- /* cpu resets imap0 to 0 and imap1 to 0x7f, but D10V-EVA board
- initializes imap0 and imap1 to 0x1000 as part of its ROM
- initialization. */
- if (old_segment_mapping)
- {
- /* External memory startup. This is the HARD reset state. */
- set_imap_register (0, 0x0000);
- set_imap_register (1, 0x007f);
- set_dmap_register (0, 0x2000);
- set_dmap_register (1, 0x2000);
- set_dmap_register (2, 0x0000); /* Old DMAP */
- set_dmap_register (3, 0x0000);
- }
- else
- {
- /* Internal memory startup. This is the ROM intialized state. */
- set_imap_register (0, 0x1000);
- set_imap_register (1, 0x1000);
- set_dmap_register (0, 0x2000);
- set_dmap_register (1, 0x2000);
- set_dmap_register (2, 0x2000); /* DMAP2 initial internal value is
- 0x2000 on the new board. */
- set_dmap_register (3, 0x0000);
- }
-
- SLOT_FLUSH ();
- return SIM_RC_OK;
-}
-
-
-void
-sim_set_callbacks (p)
- host_callback *p;
-{
- d10v_callback = p;
-}
-
-void
-sim_stop_reason (sd, reason, sigrc)
- SIM_DESC sd;
- enum sim_stop *reason;
- int *sigrc;
-{
-/* (*d10v_callback->printf_filtered) (d10v_callback, "sim_stop_reason: PC=0x%x\n",PC<<2); */
-
- switch (State.exception)
- {
- case SIG_D10V_STOP: /* stop instruction */
- *reason = sim_exited;
- *sigrc = 0;
- break;
-
- case SIG_D10V_EXIT: /* exit trap */
- *reason = sim_exited;
- *sigrc = GPR (0);
- break;
-
- case SIG_D10V_BUS:
- *reason = sim_stopped;
-#ifdef SIGBUS
- *sigrc = SIGBUS;
-#else
- *sigrc = SIGSEGV;
-#endif
- break;
-
- default: /* some signal */
- *reason = sim_stopped;
- if (stop_simulator && !State.exception)
- *sigrc = SIGINT;
- else
- *sigrc = State.exception;
- break;
- }
-
- stop_simulator = 0;
-}
-
-int
-sim_fetch_register (sd, rn, memory, length)
- SIM_DESC sd;
- int rn;
- unsigned char *memory;
- int length;
-{
- int size;
- if (rn < 0)
- size = 0;
- else if (rn >= SIM_D10V_R0_REGNUM
- && rn < SIM_D10V_R0_REGNUM + SIM_D10V_NR_R_REGS)
- {
- WRITE_16 (memory, GPR (rn - SIM_D10V_R0_REGNUM));
- size = 2;
- }
- else if (rn >= SIM_D10V_CR0_REGNUM
- && rn < SIM_D10V_CR0_REGNUM + SIM_D10V_NR_CR_REGS)
- {
- WRITE_16 (memory, CREG (rn - SIM_D10V_CR0_REGNUM));
- size = 2;
- }
- else if (rn >= SIM_D10V_A0_REGNUM
- && rn < SIM_D10V_A0_REGNUM + SIM_D10V_NR_A_REGS)
- {
- WRITE_64 (memory, ACC (rn - SIM_D10V_A0_REGNUM));
- size = 8;
- }
- else if (rn == SIM_D10V_SPI_REGNUM)
- {
- /* PSW_SM indicates that the current SP is the USER
- stack-pointer. */
- WRITE_16 (memory, spi_register ());
- size = 2;
- }
- else if (rn == SIM_D10V_SPU_REGNUM)
- {
- /* PSW_SM indicates that the current SP is the USER
- stack-pointer. */
- WRITE_16 (memory, spu_register ());
- size = 2;
- }
- else if (rn >= SIM_D10V_IMAP0_REGNUM
- && rn < SIM_D10V_IMAP0_REGNUM + SIM_D10V_NR_IMAP_REGS)
- {
- WRITE_16 (memory, imap_register (rn - SIM_D10V_IMAP0_REGNUM));
- size = 2;
- }
- else if (rn >= SIM_D10V_DMAP0_REGNUM
- && rn < SIM_D10V_DMAP0_REGNUM + SIM_D10V_NR_DMAP_REGS)
- {
- WRITE_16 (memory, dmap_register (rn - SIM_D10V_DMAP0_REGNUM));
- size = 2;
- }
- else
- size = 0;
- return size;
-}
-
-int
-sim_store_register (sd, rn, memory, length)
- SIM_DESC sd;
- int rn;
- unsigned char *memory;
- int length;
-{
- int size;
- if (rn < 0)
- size = 0;
- else if (rn >= SIM_D10V_R0_REGNUM
- && rn < SIM_D10V_R0_REGNUM + SIM_D10V_NR_R_REGS)
- {
- SET_GPR (rn - SIM_D10V_R0_REGNUM, READ_16 (memory));
- size = 2;
- }
- else if (rn >= SIM_D10V_CR0_REGNUM
- && rn < SIM_D10V_CR0_REGNUM + SIM_D10V_NR_CR_REGS)
- {
- SET_CREG (rn - SIM_D10V_CR0_REGNUM, READ_16 (memory));
- size = 2;
- }
- else if (rn >= SIM_D10V_A0_REGNUM
- && rn < SIM_D10V_A0_REGNUM + SIM_D10V_NR_A_REGS)
- {
- SET_ACC (rn - SIM_D10V_A0_REGNUM, READ_64 (memory) & MASK40);
- size = 8;
- }
- else if (rn == SIM_D10V_SPI_REGNUM)
- {
- /* PSW_SM indicates that the current SP is the USER
- stack-pointer. */
- set_spi_register (READ_16 (memory));
- size = 2;
- }
- else if (rn == SIM_D10V_SPU_REGNUM)
- {
- set_spu_register (READ_16 (memory));
- size = 2;
- }
- else if (rn >= SIM_D10V_IMAP0_REGNUM
- && rn < SIM_D10V_IMAP0_REGNUM + SIM_D10V_NR_IMAP_REGS)
- {
- set_imap_register (rn - SIM_D10V_IMAP0_REGNUM, READ_16(memory));
- size = 2;
- }
- else if (rn >= SIM_D10V_DMAP0_REGNUM
- && rn < SIM_D10V_DMAP0_REGNUM + SIM_D10V_NR_DMAP_REGS)
- {
- set_dmap_register (rn - SIM_D10V_DMAP0_REGNUM, READ_16(memory));
- size = 2;
- }
- else
- size = 0;
- SLOT_FLUSH ();
- return size;
-}
-
-
-void
-sim_do_command (sd, cmd)
- SIM_DESC sd;
- char *cmd;
-{
- (*d10v_callback->printf_filtered) (d10v_callback, "sim_do_command: %s\n",cmd);
-}
-
-SIM_RC
-sim_load (sd, prog, abfd, from_tty)
- SIM_DESC sd;
- char *prog;
- bfd *abfd;
- int from_tty;
-{
- extern bfd *sim_load_file (); /* ??? Don't know where this should live. */
-
- if (prog_bfd != NULL && prog_bfd_was_opened_p)
- {
- bfd_close (prog_bfd);
- prog_bfd_was_opened_p = 0;
- }
- prog_bfd = sim_load_file (sd, myname, d10v_callback, prog, abfd,
- sim_kind == SIM_OPEN_DEBUG,
- 1/*LMA*/, sim_write);
- if (prog_bfd == NULL)
- return SIM_RC_FAIL;
- prog_bfd_was_opened_p = abfd == NULL;
- return SIM_RC_OK;
-}
diff --git a/sim/d10v/simops.c b/sim/d10v/simops.c
deleted file mode 100644
index cb0fa56c888..00000000000
--- a/sim/d10v/simops.c
+++ /dev/null
@@ -1,3628 +0,0 @@
-#include "config.h"
-
-#include <signal.h>
-#include <errno.h>
-#include <sys/types.h>
-#include <sys/stat.h>
-#ifdef HAVE_UNISTD_H
-#include <unistd.h>
-#endif
-
-#include "d10v_sim.h"
-#include "simops.h"
-#include "targ-vals.h"
-
-extern char *strrchr ();
-
-enum op_types {
- OP_VOID,
- OP_REG,
- OP_REG_OUTPUT,
- OP_DREG,
- OP_DREG_OUTPUT,
- OP_ACCUM,
- OP_ACCUM_OUTPUT,
- OP_ACCUM_REVERSE,
- OP_CR,
- OP_CR_OUTPUT,
- OP_CR_REVERSE,
- OP_FLAG,
- OP_FLAG_OUTPUT,
- OP_CONSTANT16,
- OP_CONSTANT8,
- OP_CONSTANT3,
- OP_CONSTANT4,
- OP_MEMREF,
- OP_MEMREF2,
- OP_MEMREF3,
- OP_POSTDEC,
- OP_POSTINC,
- OP_PREDEC,
- OP_R0,
- OP_R1,
- OP_R2,
-};
-
-
-enum {
- PSW_MASK = (PSW_SM_BIT
- | PSW_EA_BIT
- | PSW_DB_BIT
- | PSW_IE_BIT
- | PSW_RP_BIT
- | PSW_MD_BIT
- | PSW_FX_BIT
- | PSW_ST_BIT
- | PSW_F0_BIT
- | PSW_F1_BIT
- | PSW_C_BIT),
- /* The following bits in the PSW _can't_ be set by instructions such
- as mvtc. */
- PSW_HW_MASK = (PSW_MASK | PSW_DM_BIT)
-};
-
-reg_t
-move_to_cr (int cr, reg_t mask, reg_t val, int psw_hw_p)
-{
- /* A MASK bit is set when the corresponding bit in the CR should
- be left alone */
- /* This assumes that (VAL & MASK) == 0 */
- switch (cr)
- {
- case PSW_CR:
- if (psw_hw_p)
- val &= PSW_HW_MASK;
- else
- val &= PSW_MASK;
- if ((mask & PSW_SM_BIT) == 0)
- {
- int new_psw_sm = (val & PSW_SM_BIT) != 0;
- /* save old SP */
- SET_HELD_SP (PSW_SM, GPR (SP_IDX));
- if (PSW_SM != new_psw_sm)
- /* restore new SP */
- SET_GPR (SP_IDX, HELD_SP (new_psw_sm));
- }
- if ((mask & (PSW_ST_BIT | PSW_FX_BIT)) == 0)
- {
- if (val & PSW_ST_BIT && !(val & PSW_FX_BIT))
- {
- (*d10v_callback->printf_filtered)
- (d10v_callback,
- "ERROR at PC 0x%x: ST can only be set when FX is set.\n",
- PC<<2);
- State.exception = SIGILL;
- }
- }
- /* keep an up-to-date psw around for tracing */
- State.trace.psw = (State.trace.psw & mask) | val;
- break;
- case BPSW_CR:
- case DPSW_CR:
- /* Just like PSW, mask things like DM out. */
- if (psw_hw_p)
- val &= PSW_HW_MASK;
- else
- val &= PSW_MASK;
- break;
- case MOD_S_CR:
- case MOD_E_CR:
- val &= ~1;
- break;
- default:
- break;
- }
- /* only issue an update if the register is being changed */
- if ((State.cregs[cr] & ~mask) != val)
- SLOT_PEND_MASK (State.cregs[cr], mask, val);
- return val;
-}
-
-#ifdef DEBUG
-static void trace_input_func PARAMS ((char *name,
- enum op_types in1,
- enum op_types in2,
- enum op_types in3));
-
-#define trace_input(name, in1, in2, in3) do { if (d10v_debug) trace_input_func (name, in1, in2, in3); } while (0)
-
-#ifndef SIZE_INSTRUCTION
-#define SIZE_INSTRUCTION 8
-#endif
-
-#ifndef SIZE_OPERANDS
-#define SIZE_OPERANDS 18
-#endif
-
-#ifndef SIZE_VALUES
-#define SIZE_VALUES 13
-#endif
-
-#ifndef SIZE_LOCATION
-#define SIZE_LOCATION 20
-#endif
-
-#ifndef SIZE_PC
-#define SIZE_PC 6
-#endif
-
-#ifndef SIZE_LINE_NUMBER
-#define SIZE_LINE_NUMBER 4
-#endif
-
-static void
-trace_input_func (name, in1, in2, in3)
- char *name;
- enum op_types in1;
- enum op_types in2;
- enum op_types in3;
-{
- char *comma;
- enum op_types in[3];
- int i;
- char buf[1024];
- char *p;
- long tmp;
- char *type;
- const char *filename;
- const char *functionname;
- unsigned int linenumber;
- bfd_vma byte_pc;
-
- if ((d10v_debug & DEBUG_TRACE) == 0)
- return;
-
- switch (State.ins_type)
- {
- default:
- case INS_UNKNOWN: type = " ?"; break;
- case INS_LEFT: type = " L"; break;
- case INS_RIGHT: type = " R"; break;
- case INS_LEFT_PARALLEL: type = "*L"; break;
- case INS_RIGHT_PARALLEL: type = "*R"; break;
- case INS_LEFT_COND_TEST: type = "?L"; break;
- case INS_RIGHT_COND_TEST: type = "?R"; break;
- case INS_LEFT_COND_EXE: type = "&L"; break;
- case INS_RIGHT_COND_EXE: type = "&R"; break;
- case INS_LONG: type = " B"; break;
- }
-
- if ((d10v_debug & DEBUG_LINE_NUMBER) == 0)
- (*d10v_callback->printf_filtered) (d10v_callback,
- "0x%.*x %s: %-*s ",
- SIZE_PC, (unsigned)PC,
- type,
- SIZE_INSTRUCTION, name);
-
- else
- {
- buf[0] = '\0';
- byte_pc = decode_pc ();
- if (text && byte_pc >= text_start && byte_pc < text_end)
- {
- filename = (const char *)0;
- functionname = (const char *)0;
- linenumber = 0;
- if (bfd_find_nearest_line (prog_bfd, text, (struct symbol_cache_entry **)0, byte_pc - text_start,
- &filename, &functionname, &linenumber))
- {
- p = buf;
- if (linenumber)
- {
- sprintf (p, "#%-*d ", SIZE_LINE_NUMBER, linenumber);
- p += strlen (p);
- }
- else
- {
- sprintf (p, "%-*s ", SIZE_LINE_NUMBER+1, "---");
- p += SIZE_LINE_NUMBER+2;
- }
-
- if (functionname)
- {
- sprintf (p, "%s ", functionname);
- p += strlen (p);
- }
- else if (filename)
- {
- char *q = strrchr (filename, '/');
- sprintf (p, "%s ", (q) ? q+1 : filename);
- p += strlen (p);
- }
-
- if (*p == ' ')
- *p = '\0';
- }
- }
-
- (*d10v_callback->printf_filtered) (d10v_callback,
- "0x%.*x %s: %-*.*s %-*s ",
- SIZE_PC, (unsigned)PC,
- type,
- SIZE_LOCATION, SIZE_LOCATION, buf,
- SIZE_INSTRUCTION, name);
- }
-
- in[0] = in1;
- in[1] = in2;
- in[2] = in3;
- comma = "";
- p = buf;
- for (i = 0; i < 3; i++)
- {
- switch (in[i])
- {
- case OP_VOID:
- case OP_R0:
- case OP_R1:
- case OP_R2:
- break;
-
- case OP_REG:
- case OP_REG_OUTPUT:
- case OP_DREG:
- case OP_DREG_OUTPUT:
- sprintf (p, "%sr%d", comma, OP[i]);
- p += strlen (p);
- comma = ",";
- break;
-
- case OP_CR:
- case OP_CR_OUTPUT:
- case OP_CR_REVERSE:
- sprintf (p, "%scr%d", comma, OP[i]);
- p += strlen (p);
- comma = ",";
- break;
-
- case OP_ACCUM:
- case OP_ACCUM_OUTPUT:
- case OP_ACCUM_REVERSE:
- sprintf (p, "%sa%d", comma, OP[i]);
- p += strlen (p);
- comma = ",";
- break;
-
- case OP_CONSTANT16:
- sprintf (p, "%s%d", comma, OP[i]);
- p += strlen (p);
- comma = ",";
- break;
-
- case OP_CONSTANT8:
- sprintf (p, "%s%d", comma, SEXT8(OP[i]));
- p += strlen (p);
- comma = ",";
- break;
-
- case OP_CONSTANT4:
- sprintf (p, "%s%d", comma, SEXT4(OP[i]));
- p += strlen (p);
- comma = ",";
- break;
-
- case OP_CONSTANT3:
- sprintf (p, "%s%d", comma, SEXT3(OP[i]));
- p += strlen (p);
- comma = ",";
- break;
-
- case OP_MEMREF:
- sprintf (p, "%s@r%d", comma, OP[i]);
- p += strlen (p);
- comma = ",";
- break;
-
- case OP_MEMREF2:
- sprintf (p, "%s@(%d,r%d)", comma, (int16)OP[i], OP[i+1]);
- p += strlen (p);
- comma = ",";
- break;
-
- case OP_MEMREF3:
- sprintf (p, "%s@%d", comma, OP[i]);
- p += strlen (p);
- comma = ",";
- break;
-
- case OP_POSTINC:
- sprintf (p, "%s@r%d+", comma, OP[i]);
- p += strlen (p);
- comma = ",";
- break;
-
- case OP_POSTDEC:
- sprintf (p, "%s@r%d-", comma, OP[i]);
- p += strlen (p);
- comma = ",";
- break;
-
- case OP_PREDEC:
- sprintf (p, "%s@-r%d", comma, OP[i]);
- p += strlen (p);
- comma = ",";
- break;
-
- case OP_FLAG:
- case OP_FLAG_OUTPUT:
- if (OP[i] == 0)
- sprintf (p, "%sf0", comma);
-
- else if (OP[i] == 1)
- sprintf (p, "%sf1", comma);
-
- else
- sprintf (p, "%sc", comma);
-
- p += strlen (p);
- comma = ",";
- break;
- }
- }
-
- if ((d10v_debug & DEBUG_VALUES) == 0)
- {
- *p++ = '\n';
- *p = '\0';
- (*d10v_callback->printf_filtered) (d10v_callback, "%s", buf);
- }
- else
- {
- *p = '\0';
- (*d10v_callback->printf_filtered) (d10v_callback, "%-*s", SIZE_OPERANDS, buf);
-
- p = buf;
- for (i = 0; i < 3; i++)
- {
- buf[0] = '\0';
- switch (in[i])
- {
- case OP_VOID:
- (*d10v_callback->printf_filtered) (d10v_callback, "%*s", SIZE_VALUES, "");
- break;
-
- case OP_REG_OUTPUT:
- case OP_DREG_OUTPUT:
- case OP_CR_OUTPUT:
- case OP_ACCUM_OUTPUT:
- case OP_FLAG_OUTPUT:
- (*d10v_callback->printf_filtered) (d10v_callback, "%*s", SIZE_VALUES, "---");
- break;
-
- case OP_REG:
- case OP_MEMREF:
- case OP_POSTDEC:
- case OP_POSTINC:
- case OP_PREDEC:
- (*d10v_callback->printf_filtered) (d10v_callback, "%*s0x%.4x", SIZE_VALUES-6, "",
- (uint16) GPR (OP[i]));
- break;
-
- case OP_MEMREF3:
- (*d10v_callback->printf_filtered) (d10v_callback, "%*s0x%.4x", SIZE_VALUES-6, "", (uint16) OP[i]);
- break;
-
- case OP_DREG:
- tmp = (long)((((uint32) GPR (OP[i])) << 16) | ((uint32) GPR (OP[i] + 1)));
- (*d10v_callback->printf_filtered) (d10v_callback, "%*s0x%.8lx", SIZE_VALUES-10, "", tmp);
- break;
-
- case OP_CR:
- case OP_CR_REVERSE:
- (*d10v_callback->printf_filtered) (d10v_callback, "%*s0x%.4x", SIZE_VALUES-6, "",
- (uint16) CREG (OP[i]));
- break;
-
- case OP_ACCUM:
- case OP_ACCUM_REVERSE:
- (*d10v_callback->printf_filtered) (d10v_callback, "%*s0x%.2x%.8lx", SIZE_VALUES-12, "",
- ((int)(ACC (OP[i]) >> 32) & 0xff),
- ((unsigned long) ACC (OP[i])) & 0xffffffff);
- break;
-
- case OP_CONSTANT16:
- (*d10v_callback->printf_filtered) (d10v_callback, "%*s0x%.4x", SIZE_VALUES-6, "",
- (uint16)OP[i]);
- break;
-
- case OP_CONSTANT4:
- (*d10v_callback->printf_filtered) (d10v_callback, "%*s0x%.4x", SIZE_VALUES-6, "",
- (uint16)SEXT4(OP[i]));
- break;
-
- case OP_CONSTANT8:
- (*d10v_callback->printf_filtered) (d10v_callback, "%*s0x%.4x", SIZE_VALUES-6, "",
- (uint16)SEXT8(OP[i]));
- break;
-
- case OP_CONSTANT3:
- (*d10v_callback->printf_filtered) (d10v_callback, "%*s0x%.4x", SIZE_VALUES-6, "",
- (uint16)SEXT3(OP[i]));
- break;
-
- case OP_FLAG:
- if (OP[i] == 0)
- (*d10v_callback->printf_filtered) (d10v_callback, "%*sF0 = %d", SIZE_VALUES-6, "",
- PSW_F0 != 0);
-
- else if (OP[i] == 1)
- (*d10v_callback->printf_filtered) (d10v_callback, "%*sF1 = %d", SIZE_VALUES-6, "",
- PSW_F1 != 0);
-
- else
- (*d10v_callback->printf_filtered) (d10v_callback, "%*sC = %d", SIZE_VALUES-5, "",
- PSW_C != 0);
-
- break;
-
- case OP_MEMREF2:
- (*d10v_callback->printf_filtered) (d10v_callback, "%*s0x%.4x", SIZE_VALUES-6, "",
- (uint16)OP[i]);
- (*d10v_callback->printf_filtered) (d10v_callback, "%*s0x%.4x", SIZE_VALUES-6, "",
- (uint16)GPR (OP[i + 1]));
- i++;
- break;
-
- case OP_R0:
- (*d10v_callback->printf_filtered) (d10v_callback, "%*s0x%.4x", SIZE_VALUES-6, "",
- (uint16) GPR (0));
- break;
-
- case OP_R1:
- (*d10v_callback->printf_filtered) (d10v_callback, "%*s0x%.4x", SIZE_VALUES-6, "",
- (uint16) GPR (1));
- break;
-
- case OP_R2:
- (*d10v_callback->printf_filtered) (d10v_callback, "%*s0x%.4x", SIZE_VALUES-6, "",
- (uint16) GPR (2));
- break;
-
- }
- }
- }
-
- (*d10v_callback->flush_stdout) (d10v_callback);
-}
-
-static void
-do_trace_output_flush (void)
-{
- (*d10v_callback->flush_stdout) (d10v_callback);
-}
-
-static void
-do_trace_output_finish (void)
-{
- (*d10v_callback->printf_filtered) (d10v_callback,
- " F0=%d F1=%d C=%d\n",
- (State.trace.psw & PSW_F0_BIT) != 0,
- (State.trace.psw & PSW_F1_BIT) != 0,
- (State.trace.psw & PSW_C_BIT) != 0);
- (*d10v_callback->flush_stdout) (d10v_callback);
-}
-
-static void
-trace_output_40 (uint64 val)
-{
- if ((d10v_debug & (DEBUG_TRACE | DEBUG_VALUES)) == (DEBUG_TRACE | DEBUG_VALUES))
- {
- (*d10v_callback->printf_filtered) (d10v_callback,
- " :: %*s0x%.2x%.8lx",
- SIZE_VALUES - 12,
- "",
- ((int)(val >> 32) & 0xff),
- ((unsigned long) val) & 0xffffffff);
- do_trace_output_finish ();
- }
-}
-
-static void
-trace_output_32 (uint32 val)
-{
- if ((d10v_debug & (DEBUG_TRACE | DEBUG_VALUES)) == (DEBUG_TRACE | DEBUG_VALUES))
- {
- (*d10v_callback->printf_filtered) (d10v_callback,
- " :: %*s0x%.8x",
- SIZE_VALUES - 10,
- "",
- (int) val);
- do_trace_output_finish ();
- }
-}
-
-static void
-trace_output_16 (uint16 val)
-{
- if ((d10v_debug & (DEBUG_TRACE | DEBUG_VALUES)) == (DEBUG_TRACE | DEBUG_VALUES))
- {
- (*d10v_callback->printf_filtered) (d10v_callback,
- " :: %*s0x%.4x",
- SIZE_VALUES - 6,
- "",
- (int) val);
- do_trace_output_finish ();
- }
-}
-
-static void
-trace_output_void ()
-{
- if ((d10v_debug & (DEBUG_TRACE | DEBUG_VALUES)) == (DEBUG_TRACE | DEBUG_VALUES))
- {
- (*d10v_callback->printf_filtered) (d10v_callback, "\n");
- do_trace_output_flush ();
- }
-}
-
-static void
-trace_output_flag ()
-{
- if ((d10v_debug & (DEBUG_TRACE | DEBUG_VALUES)) == (DEBUG_TRACE | DEBUG_VALUES))
- {
- (*d10v_callback->printf_filtered) (d10v_callback,
- " :: %*s",
- SIZE_VALUES,
- "");
- do_trace_output_finish ();
- }
-}
-
-
-
-
-#else
-#define trace_input(NAME, IN1, IN2, IN3)
-#define trace_output(RESULT)
-#endif
-
-/* abs */
-void
-OP_4607 ()
-{
- int16 tmp;
- trace_input ("abs", OP_REG, OP_VOID, OP_VOID);
- SET_PSW_F1 (PSW_F0);
- tmp = GPR(OP[0]);
- if (tmp < 0)
- {
- tmp = - tmp;
- SET_PSW_F0 (1);
- }
- else
- SET_PSW_F0 (0);
- SET_GPR (OP[0], tmp);
- trace_output_16 (tmp);
-}
-
-/* abs */
-void
-OP_5607 ()
-{
- int64 tmp;
- trace_input ("abs", OP_ACCUM, OP_VOID, OP_VOID);
- SET_PSW_F1 (PSW_F0);
-
- tmp = SEXT40 (ACC (OP[0]));
- if (tmp < 0 )
- {
- tmp = - tmp;
- if (PSW_ST)
- {
- if (tmp > SEXT40(MAX32))
- tmp = (MAX32);
- else if (tmp < SEXT40(MIN32))
- tmp = (MIN32);
- else
- tmp = (tmp & MASK40);
- }
- else
- tmp = (tmp & MASK40);
- SET_PSW_F0 (1);
- }
- else
- {
- tmp = (tmp & MASK40);
- SET_PSW_F0 (0);
- }
- SET_ACC (OP[0], tmp);
- trace_output_40 (tmp);
-}
-
-/* add */
-void
-OP_200 ()
-{
- uint16 a = GPR (OP[0]);
- uint16 b = GPR (OP[1]);
- uint16 tmp = (a + b);
- trace_input ("add", OP_REG, OP_REG, OP_VOID);
- SET_PSW_C (a > tmp);
- SET_GPR (OP[0], tmp);
- trace_output_16 (tmp);
-}
-
-/* add */
-void
-OP_1201 ()
-{
- int64 tmp;
- tmp = SEXT40(ACC (OP[0])) + (SEXT16 (GPR (OP[1])) << 16 | GPR (OP[1] + 1));
-
- trace_input ("add", OP_ACCUM, OP_REG, OP_VOID);
- if (PSW_ST)
- {
- if (tmp > SEXT40(MAX32))
- tmp = (MAX32);
- else if (tmp < SEXT40(MIN32))
- tmp = (MIN32);
- else
- tmp = (tmp & MASK40);
- }
- else
- tmp = (tmp & MASK40);
- SET_ACC (OP[0], tmp);
- trace_output_40 (tmp);
-}
-
-/* add */
-void
-OP_1203 ()
-{
- int64 tmp;
- tmp = SEXT40(ACC (OP[0])) + SEXT40(ACC (OP[1]));
-
- trace_input ("add", OP_ACCUM, OP_ACCUM, OP_VOID);
- if (PSW_ST)
- {
- if (tmp > SEXT40(MAX32))
- tmp = (MAX32);
- else if (tmp < SEXT40(MIN32))
- tmp = (MIN32);
- else
- tmp = (tmp & MASK40);
- }
- else
- tmp = (tmp & MASK40);
- SET_ACC (OP[0], tmp);
- trace_output_40 (tmp);
-}
-
-/* add2w */
-void
-OP_1200 ()
-{
- uint32 tmp;
- uint32 a = (GPR (OP[0])) << 16 | GPR (OP[0] + 1);
- uint32 b = (GPR (OP[1])) << 16 | GPR (OP[1] + 1);
- trace_input ("add2w", OP_DREG, OP_DREG, OP_VOID);
- tmp = a + b;
- SET_PSW_C (tmp < a);
- SET_GPR (OP[0] + 0, (tmp >> 16));
- SET_GPR (OP[0] + 1, (tmp & 0xFFFF));
- trace_output_32 (tmp);
-}
-
-/* add3 */
-void
-OP_1000000 ()
-{
- uint16 a = GPR (OP[1]);
- uint16 b = OP[2];
- uint16 tmp = (a + b);
- trace_input ("add3", OP_REG_OUTPUT, OP_REG, OP_CONSTANT16);
- SET_PSW_C (tmp < a);
- SET_GPR (OP[0], tmp);
- trace_output_16 (tmp);
-}
-
-/* addac3 */
-void
-OP_17000200 ()
-{
- int64 tmp;
- tmp = SEXT40(ACC (OP[2])) + SEXT40 ((GPR (OP[1]) << 16) | GPR (OP[1] + 1));
-
- trace_input ("addac3", OP_DREG_OUTPUT, OP_DREG, OP_ACCUM);
- SET_GPR (OP[0] + 0, ((tmp >> 16) & 0xffff));
- SET_GPR (OP[0] + 1, (tmp & 0xffff));
- trace_output_32 (tmp);
-}
-
-/* addac3 */
-void
-OP_17000202 ()
-{
- int64 tmp;
- tmp = SEXT40(ACC (OP[1])) + SEXT40(ACC (OP[2]));
-
- trace_input ("addac3", OP_DREG_OUTPUT, OP_ACCUM, OP_ACCUM);
- SET_GPR (OP[0] + 0, (tmp >> 16) & 0xffff);
- SET_GPR (OP[0] + 1, tmp & 0xffff);
- trace_output_32 (tmp);
-}
-
-/* addac3s */
-void
-OP_17001200 ()
-{
- int64 tmp;
- SET_PSW_F1 (PSW_F0);
-
- trace_input ("addac3s", OP_DREG_OUTPUT, OP_DREG, OP_ACCUM);
- tmp = SEXT40 (ACC (OP[2])) + SEXT40 ((GPR (OP[1]) << 16) | GPR (OP[1] + 1));
- if (tmp > SEXT40(MAX32))
- {
- tmp = (MAX32);
- SET_PSW_F0 (1);
- }
- else if (tmp < SEXT40(MIN32))
- {
- tmp = (MIN32);
- SET_PSW_F0 (1);
- }
- else
- {
- SET_PSW_F0 (0);
- }
- SET_GPR (OP[0] + 0, (tmp >> 16) & 0xffff);
- SET_GPR (OP[0] + 1, (tmp & 0xffff));
- trace_output_32 (tmp);
-}
-
-/* addac3s */
-void
-OP_17001202 ()
-{
- int64 tmp;
- SET_PSW_F1 (PSW_F0);
-
- trace_input ("addac3s", OP_DREG_OUTPUT, OP_ACCUM, OP_ACCUM);
- tmp = SEXT40(ACC (OP[1])) + SEXT40(ACC (OP[2]));
- if (tmp > SEXT40(MAX32))
- {
- tmp = (MAX32);
- SET_PSW_F0 (1);
- }
- else if (tmp < SEXT40(MIN32))
- {
- tmp = (MIN32);
- SET_PSW_F0 (1);
- }
- else
- {
- SET_PSW_F0 (0);
- }
- SET_GPR (OP[0] + 0, (tmp >> 16) & 0xffff);
- SET_GPR (OP[0] + 1, (tmp & 0xffff));
- trace_output_32 (tmp);
-}
-
-/* addi */
-void
-OP_201 ()
-{
- uint16 a = GPR (OP[0]);
- uint16 b;
- uint16 tmp;
- if (OP[1] == 0)
- OP[1] = 16;
- b = OP[1];
- tmp = (a + b);
- trace_input ("addi", OP_REG, OP_CONSTANT16, OP_VOID);
- SET_PSW_C (tmp < a);
- SET_GPR (OP[0], tmp);
- trace_output_16 (tmp);
-}
-
-/* and */
-void
-OP_C00 ()
-{
- uint16 tmp = GPR (OP[0]) & GPR (OP[1]);
- trace_input ("and", OP_REG, OP_REG, OP_VOID);
- SET_GPR (OP[0], tmp);
- trace_output_16 (tmp);
-}
-
-/* and3 */
-void
-OP_6000000 ()
-{
- uint16 tmp = GPR (OP[1]) & OP[2];
- trace_input ("and3", OP_REG_OUTPUT, OP_REG, OP_CONSTANT16);
- SET_GPR (OP[0], tmp);
- trace_output_16 (tmp);
-}
-
-/* bclri */
-void
-OP_C01 ()
-{
- int16 tmp;
- trace_input ("bclri", OP_REG, OP_CONSTANT16, OP_VOID);
- tmp = (GPR (OP[0]) &~(0x8000 >> OP[1]));
- SET_GPR (OP[0], tmp);
- trace_output_16 (tmp);
-}
-
-/* bl.s */
-void
-OP_4900 ()
-{
- trace_input ("bl.s", OP_CONSTANT8, OP_R0, OP_R1);
- SET_GPR (13, PC + 1);
- JMP( PC + SEXT8 (OP[0]));
- trace_output_void ();
-}
-
-/* bl.l */
-void
-OP_24800000 ()
-{
- trace_input ("bl.l", OP_CONSTANT16, OP_R0, OP_R1);
- SET_GPR (13, (PC + 1));
- JMP (PC + OP[0]);
- trace_output_void ();
-}
-
-/* bnoti */
-void
-OP_A01 ()
-{
- int16 tmp;
- trace_input ("bnoti", OP_REG, OP_CONSTANT16, OP_VOID);
- tmp = (GPR (OP[0]) ^ (0x8000 >> OP[1]));
- SET_GPR (OP[0], tmp);
- trace_output_16 (tmp);
-}
-
-/* bra.s */
-void
-OP_4800 ()
-{
- trace_input ("bra.s", OP_CONSTANT8, OP_VOID, OP_VOID);
- JMP (PC + SEXT8 (OP[0]));
- trace_output_void ();
-}
-
-/* bra.l */
-void
-OP_24000000 ()
-{
- trace_input ("bra.l", OP_CONSTANT16, OP_VOID, OP_VOID);
- JMP (PC + OP[0]);
- trace_output_void ();
-}
-
-/* brf0f.s */
-void
-OP_4A00 ()
-{
- trace_input ("brf0f.s", OP_CONSTANT8, OP_VOID, OP_VOID);
- if (!PSW_F0)
- JMP (PC + SEXT8 (OP[0]));
- trace_output_flag ();
-}
-
-/* brf0f.l */
-void
-OP_25000000 ()
-{
- trace_input ("brf0f.l", OP_CONSTANT16, OP_VOID, OP_VOID);
- if (!PSW_F0)
- JMP (PC + OP[0]);
- trace_output_flag ();
-}
-
-/* brf0t.s */
-void
-OP_4B00 ()
-{
- trace_input ("brf0t.s", OP_CONSTANT8, OP_VOID, OP_VOID);
- if (PSW_F0)
- JMP (PC + SEXT8 (OP[0]));
- trace_output_flag ();
-}
-
-/* brf0t.l */
-void
-OP_25800000 ()
-{
- trace_input ("brf0t.l", OP_CONSTANT16, OP_VOID, OP_VOID);
- if (PSW_F0)
- JMP (PC + OP[0]);
- trace_output_flag ();
-}
-
-/* bseti */
-void
-OP_801 ()
-{
- int16 tmp;
- trace_input ("bseti", OP_REG, OP_CONSTANT16, OP_VOID);
- tmp = (GPR (OP[0]) | (0x8000 >> OP[1]));
- SET_GPR (OP[0], tmp);
- trace_output_16 (tmp);
-}
-
-/* btsti */
-void
-OP_E01 ()
-{
- trace_input ("btsti", OP_REG, OP_CONSTANT16, OP_VOID);
- SET_PSW_F1 (PSW_F0);
- SET_PSW_F0 ((GPR (OP[0]) & (0x8000 >> OP[1])) ? 1 : 0);
- trace_output_flag ();
-}
-
-/* clrac */
-void
-OP_5601 ()
-{
- trace_input ("clrac", OP_ACCUM_OUTPUT, OP_VOID, OP_VOID);
- SET_ACC (OP[0], 0);
- trace_output_40 (0);
-}
-
-/* cmp */
-void
-OP_600 ()
-{
- trace_input ("cmp", OP_REG, OP_REG, OP_VOID);
- SET_PSW_F1 (PSW_F0);
- SET_PSW_F0 (((int16)(GPR (OP[0])) < (int16)(GPR (OP[1]))) ? 1 : 0);
- trace_output_flag ();
-}
-
-/* cmp */
-void
-OP_1603 ()
-{
- trace_input ("cmp", OP_ACCUM, OP_ACCUM, OP_VOID);
- SET_PSW_F1 (PSW_F0);
- SET_PSW_F0 ((SEXT40(ACC (OP[0])) < SEXT40(ACC (OP[1]))) ? 1 : 0);
- trace_output_flag ();
-}
-
-/* cmpeq */
-void
-OP_400 ()
-{
- trace_input ("cmpeq", OP_REG, OP_REG, OP_VOID);
- SET_PSW_F1 (PSW_F0);
- SET_PSW_F0 ((GPR (OP[0]) == GPR (OP[1])) ? 1 : 0);
- trace_output_flag ();
-}
-
-/* cmpeq */
-void
-OP_1403 ()
-{
- trace_input ("cmpeq", OP_ACCUM, OP_ACCUM, OP_VOID);
- SET_PSW_F1 (PSW_F0);
- SET_PSW_F0 (((ACC (OP[0]) & MASK40) == (ACC (OP[1]) & MASK40)) ? 1 : 0);
- trace_output_flag ();
-}
-
-/* cmpeqi.s */
-void
-OP_401 ()
-{
- trace_input ("cmpeqi.s", OP_REG, OP_CONSTANT4, OP_VOID);
- SET_PSW_F1 (PSW_F0);
- SET_PSW_F0 ((GPR (OP[0]) == (reg_t) SEXT4 (OP[1])) ? 1 : 0);
- trace_output_flag ();
-}
-
-/* cmpeqi.l */
-void
-OP_2000000 ()
-{
- trace_input ("cmpeqi.l", OP_REG, OP_CONSTANT16, OP_VOID);
- SET_PSW_F1 (PSW_F0);
- SET_PSW_F0 ((GPR (OP[0]) == (reg_t)OP[1]) ? 1 : 0);
- trace_output_flag ();
-}
-
-/* cmpi.s */
-void
-OP_601 ()
-{
- trace_input ("cmpi.s", OP_REG, OP_CONSTANT4, OP_VOID);
- SET_PSW_F1 (PSW_F0);
- SET_PSW_F0 (((int16)(GPR (OP[0])) < (int16)SEXT4(OP[1])) ? 1 : 0);
- trace_output_flag ();
-}
-
-/* cmpi.l */
-void
-OP_3000000 ()
-{
- trace_input ("cmpi.l", OP_REG, OP_CONSTANT16, OP_VOID);
- SET_PSW_F1 (PSW_F0);
- SET_PSW_F0 (((int16)(GPR (OP[0])) < (int16)(OP[1])) ? 1 : 0);
- trace_output_flag ();
-}
-
-/* cmpu */
-void
-OP_4600 ()
-{
- trace_input ("cmpu", OP_REG, OP_REG, OP_VOID);
- SET_PSW_F1 (PSW_F0);
- SET_PSW_F0 ((GPR (OP[0]) < GPR (OP[1])) ? 1 : 0);
- trace_output_flag ();
-}
-
-/* cmpui */
-void
-OP_23000000 ()
-{
- trace_input ("cmpui", OP_REG, OP_CONSTANT16, OP_VOID);
- SET_PSW_F1 (PSW_F0);
- SET_PSW_F0 ((GPR (OP[0]) < (reg_t)OP[1]) ? 1 : 0);
- trace_output_flag ();
-}
-
-/* cpfg */
-void
-OP_4E09 ()
-{
- uint8 val;
-
- trace_input ("cpfg", OP_FLAG_OUTPUT, OP_FLAG, OP_VOID);
-
- if (OP[1] == 0)
- val = PSW_F0;
- else if (OP[1] == 1)
- val = PSW_F1;
- else
- val = PSW_C;
- if (OP[0] == 0)
- SET_PSW_F0 (val);
- else
- SET_PSW_F1 (val);
-
- trace_output_flag ();
-}
-
-/* cpfg */
-void
-OP_4E0F ()
-{
- uint8 val;
-
- trace_input ("cpfg", OP_FLAG_OUTPUT, OP_FLAG, OP_VOID);
-
- if (OP[1] == 0)
- val = PSW_F0;
- else if (OP[1] == 1)
- val = PSW_F1;
- else
- val = PSW_C;
- if (OP[0] == 0)
- SET_PSW_F0 (val);
- else
- SET_PSW_F1 (val);
-
- trace_output_flag ();
-}
-
-/* dbt */
-void
-OP_5F20 ()
-{
- /* d10v_callback->printf_filtered(d10v_callback, "***** DBT ***** PC=%x\n",PC); */
-
- /* GDB uses the instruction pair ``dbt || nop'' as a break-point.
- The conditional below is for either of the instruction pairs
- ``dbt -> XXX'' or ``dbt <- XXX'' and treats them as as cases
- where the dbt instruction should be interpreted.
-
- The module `sim-break' provides a more effective mechanism for
- detecting GDB planted breakpoints. The code below may,
- eventually, be changed to use that mechanism. */
-
- if (State.ins_type == INS_LEFT
- || State.ins_type == INS_RIGHT)
- {
- trace_input ("dbt", OP_VOID, OP_VOID, OP_VOID);
- SET_DPC (PC + 1);
- SET_DPSW (PSW);
- SET_HW_PSW (PSW_DM_BIT | (PSW & (PSW_F0_BIT | PSW_F1_BIT | PSW_C_BIT)));
- JMP (DBT_VECTOR_START);
- trace_output_void ();
- }
- else
- {
- State.exception = SIGTRAP;
- }
-}
-
-/* divs */
-void
-OP_14002800 ()
-{
- uint16 foo, tmp, tmpf;
- uint16 hi;
- uint16 lo;
-
- trace_input ("divs", OP_DREG, OP_REG, OP_VOID);
- foo = (GPR (OP[0]) << 1) | (GPR (OP[0] + 1) >> 15);
- tmp = (int16)foo - (int16)(GPR (OP[1]));
- tmpf = (foo >= GPR (OP[1])) ? 1 : 0;
- hi = ((tmpf == 1) ? tmp : foo);
- lo = ((GPR (OP[0] + 1) << 1) | tmpf);
- SET_GPR (OP[0] + 0, hi);
- SET_GPR (OP[0] + 1, lo);
- trace_output_32 (((uint32) hi << 16) | lo);
-}
-
-/* exef0f */
-void
-OP_4E04 ()
-{
- trace_input ("exef0f", OP_VOID, OP_VOID, OP_VOID);
- State.exe = (PSW_F0 == 0);
- trace_output_flag ();
-}
-
-/* exef0t */
-void
-OP_4E24 ()
-{
- trace_input ("exef0t", OP_VOID, OP_VOID, OP_VOID);
- State.exe = (PSW_F0 != 0);
- trace_output_flag ();
-}
-
-/* exef1f */
-void
-OP_4E40 ()
-{
- trace_input ("exef1f", OP_VOID, OP_VOID, OP_VOID);
- State.exe = (PSW_F1 == 0);
- trace_output_flag ();
-}
-
-/* exef1t */
-void
-OP_4E42 ()
-{
- trace_input ("exef1t", OP_VOID, OP_VOID, OP_VOID);
- State.exe = (PSW_F1 != 0);
- trace_output_flag ();
-}
-
-/* exefaf */
-void
-OP_4E00 ()
-{
- trace_input ("exefaf", OP_VOID, OP_VOID, OP_VOID);
- State.exe = (PSW_F0 == 0) & (PSW_F1 == 0);
- trace_output_flag ();
-}
-
-/* exefat */
-void
-OP_4E02 ()
-{
- trace_input ("exefat", OP_VOID, OP_VOID, OP_VOID);
- State.exe = (PSW_F0 == 0) & (PSW_F1 != 0);
- trace_output_flag ();
-}
-
-/* exetaf */
-void
-OP_4E20 ()
-{
- trace_input ("exetaf", OP_VOID, OP_VOID, OP_VOID);
- State.exe = (PSW_F0 != 0) & (PSW_F1 == 0);
- trace_output_flag ();
-}
-
-/* exetat */
-void
-OP_4E22 ()
-{
- trace_input ("exetat", OP_VOID, OP_VOID, OP_VOID);
- State.exe = (PSW_F0 != 0) & (PSW_F1 != 0);
- trace_output_flag ();
-}
-
-/* exp */
-void
-OP_15002A00 ()
-{
- uint32 tmp, foo;
- int i;
-
- trace_input ("exp", OP_REG_OUTPUT, OP_DREG, OP_VOID);
- if (((int16)GPR (OP[1])) >= 0)
- tmp = (GPR (OP[1]) << 16) | GPR (OP[1] + 1);
- else
- tmp = ~((GPR (OP[1]) << 16) | GPR (OP[1] + 1));
-
- foo = 0x40000000;
- for (i=1;i<17;i++)
- {
- if (tmp & foo)
- {
- SET_GPR (OP[0], (i - 1));
- trace_output_16 (i - 1);
- return;
- }
- foo >>= 1;
- }
- SET_GPR (OP[0], 16);
- trace_output_16 (16);
-}
-
-/* exp */
-void
-OP_15002A02 ()
-{
- int64 tmp, foo;
- int i;
-
- trace_input ("exp", OP_REG_OUTPUT, OP_ACCUM, OP_VOID);
- tmp = SEXT40(ACC (OP[1]));
- if (tmp < 0)
- tmp = ~tmp & MASK40;
-
- foo = 0x4000000000LL;
- for (i=1;i<25;i++)
- {
- if (tmp & foo)
- {
- SET_GPR (OP[0], i - 9);
- trace_output_16 (i - 9);
- return;
- }
- foo >>= 1;
- }
- SET_GPR (OP[0], 16);
- trace_output_16 (16);
-}
-
-/* jl */
-void
-OP_4D00 ()
-{
- trace_input ("jl", OP_REG, OP_R0, OP_R1);
- SET_GPR (13, PC + 1);
- JMP (GPR (OP[0]));
- trace_output_void ();
-}
-
-/* jmp */
-void
-OP_4C00 ()
-{
- trace_input ("jmp", OP_REG,
- (OP[0] == 13) ? OP_R0 : OP_VOID,
- (OP[0] == 13) ? OP_R1 : OP_VOID);
-
- JMP (GPR (OP[0]));
- trace_output_void ();
-}
-
-/* ld */
-void
-OP_30000000 ()
-{
- uint16 tmp;
- uint16 addr = OP[1] + GPR (OP[2]);
- trace_input ("ld", OP_REG_OUTPUT, OP_MEMREF2, OP_VOID);
- if ((addr & 1))
- {
- State.exception = SIG_D10V_BUS;
- State.pc_changed = 1; /* Don't increment the PC. */
- trace_output_void ();
- return;
- }
- tmp = RW (addr);
- SET_GPR (OP[0], tmp);
- trace_output_16 (tmp);
-}
-
-/* ld */
-void
-OP_6401 ()
-{
- uint16 tmp;
- uint16 addr = GPR (OP[1]);
- trace_input ("ld", OP_REG_OUTPUT, OP_POSTDEC, OP_VOID);
- if ((addr & 1))
- {
- State.exception = SIG_D10V_BUS;
- State.pc_changed = 1; /* Don't increment the PC. */
- trace_output_void ();
- return;
- }
- tmp = RW (addr);
- SET_GPR (OP[0], tmp);
- if (OP[0] != OP[1])
- INC_ADDR (OP[1], -2);
- trace_output_16 (tmp);
-}
-
-/* ld */
-void
-OP_6001 ()
-{
- uint16 tmp;
- uint16 addr = GPR (OP[1]);
- trace_input ("ld", OP_REG_OUTPUT, OP_POSTINC, OP_VOID);
- if ((addr & 1))
- {
- State.exception = SIG_D10V_BUS;
- State.pc_changed = 1; /* Don't increment the PC. */
- trace_output_void ();
- return;
- }
- tmp = RW (addr);
- SET_GPR (OP[0], tmp);
- if (OP[0] != OP[1])
- INC_ADDR (OP[1], 2);
- trace_output_16 (tmp);
-}
-
-/* ld */
-void
-OP_6000 ()
-{
- uint16 tmp;
- uint16 addr = GPR (OP[1]);
- trace_input ("ld", OP_REG_OUTPUT, OP_MEMREF, OP_VOID);
- if ((addr & 1))
- {
- State.exception = SIG_D10V_BUS;
- State.pc_changed = 1; /* Don't increment the PC. */
- trace_output_void ();
- return;
- }
- tmp = RW (addr);
- SET_GPR (OP[0], tmp);
- trace_output_16 (tmp);
-}
-
-/* ld */
-void
-OP_32010000 ()
-{
- uint16 tmp;
- uint16 addr = OP[1];
- trace_input ("ld", OP_REG_OUTPUT, OP_MEMREF3, OP_VOID);
- if ((addr & 1))
- {
- State.exception = SIG_D10V_BUS;
- State.pc_changed = 1; /* Don't increment the PC. */
- trace_output_void ();
- return;
- }
- tmp = RW (addr);
- SET_GPR (OP[0], tmp);
- trace_output_16 (tmp);
-}
-
-/* ld2w */
-void
-OP_31000000 ()
-{
- int32 tmp;
- uint16 addr = OP[1] + GPR (OP[2]);
- trace_input ("ld2w", OP_REG_OUTPUT, OP_MEMREF2, OP_VOID);
- if ((addr & 1))
- {
- State.exception = SIG_D10V_BUS;
- State.pc_changed = 1; /* Don't increment the PC. */
- trace_output_void ();
- return;
- }
- tmp = RLW (addr);
- SET_GPR32 (OP[0], tmp);
- trace_output_32 (tmp);
-}
-
-/* ld2w */
-void
-OP_6601 ()
-{
- uint16 addr = GPR (OP[1]);
- int32 tmp;
- trace_input ("ld2w", OP_REG_OUTPUT, OP_POSTDEC, OP_VOID);
- if ((addr & 1))
- {
- State.exception = SIG_D10V_BUS;
- State.pc_changed = 1; /* Don't increment the PC. */
- trace_output_void ();
- return;
- }
- tmp = RLW (addr);
- SET_GPR32 (OP[0], tmp);
- if (OP[0] != OP[1] && ((OP[0] + 1) != OP[1]))
- INC_ADDR (OP[1], -4);
- trace_output_32 (tmp);
-}
-
-/* ld2w */
-void
-OP_6201 ()
-{
- int32 tmp;
- uint16 addr = GPR (OP[1]);
- trace_input ("ld2w", OP_REG_OUTPUT, OP_POSTINC, OP_VOID);
- if ((addr & 1))
- {
- State.exception = SIG_D10V_BUS;
- State.pc_changed = 1; /* Don't increment the PC. */
- trace_output_void ();
- return;
- }
- tmp = RLW (addr);
- SET_GPR32 (OP[0], tmp);
- if (OP[0] != OP[1] && ((OP[0] + 1) != OP[1]))
- INC_ADDR (OP[1], 4);
- trace_output_32 (tmp);
-}
-
-/* ld2w */
-void
-OP_6200 ()
-{
- uint16 addr = GPR (OP[1]);
- int32 tmp;
- trace_input ("ld2w", OP_REG_OUTPUT, OP_MEMREF, OP_VOID);
- if ((addr & 1))
- {
- State.exception = SIG_D10V_BUS;
- State.pc_changed = 1; /* Don't increment the PC. */
- trace_output_void ();
- return;
- }
- tmp = RLW (addr);
- SET_GPR32 (OP[0], tmp);
- trace_output_32 (tmp);
-}
-
-/* ld2w */
-void
-OP_33010000 ()
-{
- int32 tmp;
- uint16 addr = OP[1];
- trace_input ("ld2w", OP_REG_OUTPUT, OP_MEMREF3, OP_VOID);
- if ((addr & 1))
- {
- State.exception = SIG_D10V_BUS;
- State.pc_changed = 1; /* Don't increment the PC. */
- trace_output_void ();
- return;
- }
- tmp = RLW (addr);
- SET_GPR32 (OP[0], tmp);
- trace_output_32 (tmp);
-}
-
-/* ldb */
-void
-OP_38000000 ()
-{
- int16 tmp;
- trace_input ("ldb", OP_REG_OUTPUT, OP_MEMREF2, OP_VOID);
- tmp = SEXT8 (RB (OP[1] + GPR (OP[2])));
- SET_GPR (OP[0], tmp);
- trace_output_16 (tmp);
-}
-
-/* ldb */
-void
-OP_7000 ()
-{
- int16 tmp;
- trace_input ("ldb", OP_REG_OUTPUT, OP_MEMREF, OP_VOID);
- tmp = SEXT8 (RB (GPR (OP[1])));
- SET_GPR (OP[0], tmp);
- trace_output_16 (tmp);
-}
-
-/* ldi.s */
-void
-OP_4001 ()
-{
- int16 tmp;
- trace_input ("ldi.s", OP_REG_OUTPUT, OP_CONSTANT4, OP_VOID);
- tmp = SEXT4 (OP[1]);
- SET_GPR (OP[0], tmp);
- trace_output_16 (tmp);
-}
-
-/* ldi.l */
-void
-OP_20000000 ()
-{
- int16 tmp;
- trace_input ("ldi.l", OP_REG_OUTPUT, OP_CONSTANT16, OP_VOID);
- tmp = OP[1];
- SET_GPR (OP[0], tmp);
- trace_output_16 (tmp);
-}
-
-/* ldub */
-void
-OP_39000000 ()
-{
- int16 tmp;
- trace_input ("ldub", OP_REG_OUTPUT, OP_MEMREF2, OP_VOID);
- tmp = RB (OP[1] + GPR (OP[2]));
- SET_GPR (OP[0], tmp);
- trace_output_16 (tmp);
-}
-
-/* ldub */
-void
-OP_7200 ()
-{
- int16 tmp;
- trace_input ("ldub", OP_REG_OUTPUT, OP_MEMREF, OP_VOID);
- tmp = RB (GPR (OP[1]));
- SET_GPR (OP[0], tmp);
- trace_output_16 (tmp);
-}
-
-/* mac */
-void
-OP_2A00 ()
-{
- int64 tmp;
-
- trace_input ("mac", OP_ACCUM, OP_REG, OP_REG);
- tmp = SEXT40 ((int16)(GPR (OP[1])) * (int16)(GPR (OP[2])));
-
- if (PSW_FX)
- tmp = SEXT40( (tmp << 1) & MASK40);
-
- if (PSW_ST && tmp > SEXT40(MAX32))
- tmp = (MAX32);
-
- tmp += SEXT40 (ACC (OP[0]));
- if (PSW_ST)
- {
- if (tmp > SEXT40(MAX32))
- tmp = (MAX32);
- else if (tmp < SEXT40(MIN32))
- tmp = (MIN32);
- else
- tmp = (tmp & MASK40);
- }
- else
- tmp = (tmp & MASK40);
- SET_ACC (OP[0], tmp);
- trace_output_40 (tmp);
-}
-
-/* macsu */
-void
-OP_1A00 ()
-{
- int64 tmp;
-
- trace_input ("macsu", OP_ACCUM, OP_REG, OP_REG);
- tmp = SEXT40 ((int16) GPR (OP[1]) * GPR (OP[2]));
- if (PSW_FX)
- tmp = SEXT40 ((tmp << 1) & MASK40);
- tmp = ((SEXT40 (ACC (OP[0])) + tmp) & MASK40);
- SET_ACC (OP[0], tmp);
- trace_output_40 (tmp);
-}
-
-/* macu */
-void
-OP_3A00 ()
-{
- uint64 tmp;
- uint32 src1;
- uint32 src2;
-
- trace_input ("macu", OP_ACCUM, OP_REG, OP_REG);
- src1 = (uint16) GPR (OP[1]);
- src2 = (uint16) GPR (OP[2]);
- tmp = src1 * src2;
- if (PSW_FX)
- tmp = (tmp << 1);
- tmp = ((ACC (OP[0]) + tmp) & MASK40);
- SET_ACC (OP[0], tmp);
- trace_output_40 (tmp);
-}
-
-/* max */
-void
-OP_2600 ()
-{
- int16 tmp;
- trace_input ("max", OP_REG, OP_REG, OP_VOID);
- SET_PSW_F1 (PSW_F0);
- if ((int16) GPR (OP[1]) > (int16)GPR (OP[0]))
- {
- tmp = GPR (OP[1]);
- SET_PSW_F0 (1);
- }
- else
- {
- tmp = GPR (OP[0]);
- SET_PSW_F0 (0);
- }
- SET_GPR (OP[0], tmp);
- trace_output_16 (tmp);
-}
-
-/* max */
-void
-OP_3600 ()
-{
- int64 tmp;
-
- trace_input ("max", OP_ACCUM, OP_DREG, OP_VOID);
- SET_PSW_F1 (PSW_F0);
- tmp = SEXT16 (GPR (OP[1])) << 16 | GPR (OP[1] + 1);
- if (tmp > SEXT40 (ACC (OP[0])))
- {
- tmp = (tmp & MASK40);
- SET_PSW_F0 (1);
- }
- else
- {
- tmp = ACC (OP[0]);
- SET_PSW_F0 (0);
- }
- SET_ACC (OP[0], tmp);
- trace_output_40 (tmp);
-}
-
-/* max */
-void
-OP_3602 ()
-{
- int64 tmp;
- trace_input ("max", OP_ACCUM, OP_ACCUM, OP_VOID);
- SET_PSW_F1 (PSW_F0);
- if (SEXT40 (ACC (OP[1])) > SEXT40 (ACC (OP[0])))
- {
- tmp = ACC (OP[1]);
- SET_PSW_F0 (1);
- }
- else
- {
- tmp = ACC (OP[0]);
- SET_PSW_F0 (0);
- }
- SET_ACC (OP[0], tmp);
- trace_output_40 (tmp);
-}
-
-
-/* min */
-void
-OP_2601 ()
-{
- int16 tmp;
- trace_input ("min", OP_REG, OP_REG, OP_VOID);
- SET_PSW_F1 (PSW_F0);
- if ((int16)GPR (OP[1]) < (int16)GPR (OP[0]))
- {
- tmp = GPR (OP[1]);
- SET_PSW_F0 (1);
- }
- else
- {
- tmp = GPR (OP[0]);
- SET_PSW_F0 (0);
- }
- SET_GPR (OP[0], tmp);
- trace_output_16 (tmp);
-}
-
-/* min */
-void
-OP_3601 ()
-{
- int64 tmp;
-
- trace_input ("min", OP_ACCUM, OP_DREG, OP_VOID);
- SET_PSW_F1 (PSW_F0);
- tmp = SEXT16 (GPR (OP[1])) << 16 | GPR (OP[1] + 1);
- if (tmp < SEXT40(ACC (OP[0])))
- {
- tmp = (tmp & MASK40);
- SET_PSW_F0 (1);
- }
- else
- {
- tmp = ACC (OP[0]);
- SET_PSW_F0 (0);
- }
- SET_ACC (OP[0], tmp);
- trace_output_40 (tmp);
-}
-
-/* min */
-void
-OP_3603 ()
-{
- int64 tmp;
- trace_input ("min", OP_ACCUM, OP_ACCUM, OP_VOID);
- SET_PSW_F1 (PSW_F0);
- if (SEXT40(ACC (OP[1])) < SEXT40(ACC (OP[0])))
- {
- tmp = ACC (OP[1]);
- SET_PSW_F0 (1);
- }
- else
- {
- tmp = ACC (OP[0]);
- SET_PSW_F0 (0);
- }
- SET_ACC (OP[0], tmp);
- trace_output_40 (tmp);
-}
-
-/* msb */
-void
-OP_2800 ()
-{
- int64 tmp;
-
- trace_input ("msb", OP_ACCUM, OP_REG, OP_REG);
- tmp = SEXT40 ((int16)(GPR (OP[1])) * (int16)(GPR (OP[2])));
-
- if (PSW_FX)
- tmp = SEXT40 ((tmp << 1) & MASK40);
-
- if (PSW_ST && tmp > SEXT40(MAX32))
- tmp = (MAX32);
-
- tmp = SEXT40(ACC (OP[0])) - tmp;
- if (PSW_ST)
- {
- if (tmp > SEXT40(MAX32))
- tmp = (MAX32);
- else if (tmp < SEXT40(MIN32))
- tmp = (MIN32);
- else
- tmp = (tmp & MASK40);
- }
- else
- {
- tmp = (tmp & MASK40);
- }
- SET_ACC (OP[0], tmp);
- trace_output_40 (tmp);
-}
-
-/* msbsu */
-void
-OP_1800 ()
-{
- int64 tmp;
-
- trace_input ("msbsu", OP_ACCUM, OP_REG, OP_REG);
- tmp = SEXT40 ((int16)GPR (OP[1]) * GPR (OP[2]));
- if (PSW_FX)
- tmp = SEXT40( (tmp << 1) & MASK40);
- tmp = ((SEXT40 (ACC (OP[0])) - tmp) & MASK40);
- SET_ACC (OP[0], tmp);
- trace_output_40 (tmp);
-}
-
-/* msbu */
-void
-OP_3800 ()
-{
- uint64 tmp;
- uint32 src1;
- uint32 src2;
-
- trace_input ("msbu", OP_ACCUM, OP_REG, OP_REG);
- src1 = (uint16) GPR (OP[1]);
- src2 = (uint16) GPR (OP[2]);
- tmp = src1 * src2;
- if (PSW_FX)
- tmp = (tmp << 1);
- tmp = ((ACC (OP[0]) - tmp) & MASK40);
- SET_ACC (OP[0], tmp);
- trace_output_40 (tmp);
-}
-
-/* mul */
-void
-OP_2E00 ()
-{
- int16 tmp;
- trace_input ("mul", OP_REG, OP_REG, OP_VOID);
- tmp = GPR (OP[0]) * GPR (OP[1]);
- SET_GPR (OP[0], tmp);
- trace_output_16 (tmp);
-}
-
-/* mulx */
-void
-OP_2C00 ()
-{
- int64 tmp;
-
- trace_input ("mulx", OP_ACCUM_OUTPUT, OP_REG, OP_REG);
- tmp = SEXT40 ((int16)(GPR (OP[1])) * (int16)(GPR (OP[2])));
-
- if (PSW_FX)
- tmp = SEXT40 ((tmp << 1) & MASK40);
-
- if (PSW_ST && tmp > SEXT40(MAX32))
- tmp = (MAX32);
- else
- tmp = (tmp & MASK40);
- SET_ACC (OP[0], tmp);
- trace_output_40 (tmp);
-}
-
-/* mulxsu */
-void
-OP_1C00 ()
-{
- int64 tmp;
-
- trace_input ("mulxsu", OP_ACCUM_OUTPUT, OP_REG, OP_REG);
- tmp = SEXT40 ((int16)(GPR (OP[1])) * GPR (OP[2]));
-
- if (PSW_FX)
- tmp <<= 1;
- tmp = (tmp & MASK40);
- SET_ACC (OP[0], tmp);
- trace_output_40 (tmp);
-}
-
-/* mulxu */
-void
-OP_3C00 ()
-{
- uint64 tmp;
- uint32 src1;
- uint32 src2;
-
- trace_input ("mulxu", OP_ACCUM_OUTPUT, OP_REG, OP_REG);
- src1 = (uint16) GPR (OP[1]);
- src2 = (uint16) GPR (OP[2]);
- tmp = src1 * src2;
- if (PSW_FX)
- tmp <<= 1;
- tmp = (tmp & MASK40);
- SET_ACC (OP[0], tmp);
- trace_output_40 (tmp);
-}
-
-/* mv */
-void
-OP_4000 ()
-{
- int16 tmp;
- trace_input ("mv", OP_REG_OUTPUT, OP_REG, OP_VOID);
- tmp = GPR (OP[1]);
- SET_GPR (OP[0], tmp);
- trace_output_16 (tmp);
-}
-
-/* mv2w */
-void
-OP_5000 ()
-{
- int32 tmp;
- trace_input ("mv2w", OP_DREG_OUTPUT, OP_DREG, OP_VOID);
- tmp = GPR32 (OP[1]);
- SET_GPR32 (OP[0], tmp);
- trace_output_32 (tmp);
-}
-
-/* mv2wfac */
-void
-OP_3E00 ()
-{
- int32 tmp;
- trace_input ("mv2wfac", OP_DREG_OUTPUT, OP_ACCUM, OP_VOID);
- tmp = ACC (OP[1]);
- SET_GPR32 (OP[0], tmp);
- trace_output_32 (tmp);
-}
-
-/* mv2wtac */
-void
-OP_3E01 ()
-{
- int64 tmp;
- trace_input ("mv2wtac", OP_DREG, OP_ACCUM_OUTPUT, OP_VOID);
- tmp = ((SEXT16 (GPR (OP[0])) << 16 | GPR (OP[0] + 1)) & MASK40);
- SET_ACC (OP[1], tmp);
- trace_output_40 (tmp);
-}
-
-/* mvac */
-void
-OP_3E03 ()
-{
- int64 tmp;
- trace_input ("mvac", OP_ACCUM_OUTPUT, OP_ACCUM, OP_VOID);
- tmp = ACC (OP[1]);
- SET_ACC (OP[0], tmp);
- trace_output_40 (tmp);
-}
-
-/* mvb */
-void
-OP_5400 ()
-{
- int16 tmp;
- trace_input ("mvb", OP_REG_OUTPUT, OP_REG, OP_VOID);
- tmp = SEXT8 (GPR (OP[1]) & 0xff);
- SET_GPR (OP[0], tmp);
- trace_output_16 (tmp);
-}
-
-/* mvf0f */
-void
-OP_4400 ()
-{
- int16 tmp;
- trace_input ("mf0f", OP_REG_OUTPUT, OP_REG, OP_VOID);
- if (PSW_F0 == 0)
- {
- tmp = GPR (OP[1]);
- SET_GPR (OP[0], tmp);
- }
- else
- tmp = GPR (OP[0]);
- trace_output_16 (tmp);
-}
-
-/* mvf0t */
-void
-OP_4401 ()
-{
- int16 tmp;
- trace_input ("mf0t", OP_REG_OUTPUT, OP_REG, OP_VOID);
- if (PSW_F0)
- {
- tmp = GPR (OP[1]);
- SET_GPR (OP[0], tmp);
- }
- else
- tmp = GPR (OP[0]);
- trace_output_16 (tmp);
-}
-
-/* mvfacg */
-void
-OP_1E04 ()
-{
- int16 tmp;
- trace_input ("mvfacg", OP_REG_OUTPUT, OP_ACCUM, OP_VOID);
- tmp = ((ACC (OP[1]) >> 32) & 0xff);
- SET_GPR (OP[0], tmp);
- trace_output_16 (tmp);
-}
-
-/* mvfachi */
-void
-OP_1E00 ()
-{
- int16 tmp;
- trace_input ("mvfachi", OP_REG_OUTPUT, OP_ACCUM, OP_VOID);
- tmp = (ACC (OP[1]) >> 16);
- SET_GPR (OP[0], tmp);
- trace_output_16 (tmp);
-}
-
-/* mvfaclo */
-void
-OP_1E02 ()
-{
- int16 tmp;
- trace_input ("mvfaclo", OP_REG_OUTPUT, OP_ACCUM, OP_VOID);
- tmp = ACC (OP[1]);
- SET_GPR (OP[0], tmp);
- trace_output_16 (tmp);
-}
-
-/* mvfc */
-void
-OP_5200 ()
-{
- int16 tmp;
- trace_input ("mvfc", OP_REG_OUTPUT, OP_CR, OP_VOID);
- tmp = CREG (OP[1]);
- SET_GPR (OP[0], tmp);
- trace_output_16 (tmp);
-}
-
-/* mvtacg */
-void
-OP_1E41 ()
-{
- int64 tmp;
- trace_input ("mvtacg", OP_REG, OP_ACCUM, OP_VOID);
- tmp = ((ACC (OP[1]) & MASK32)
- | ((int64)(GPR (OP[0]) & 0xff) << 32));
- SET_ACC (OP[1], tmp);
- trace_output_40 (tmp);
-}
-
-/* mvtachi */
-void
-OP_1E01 ()
-{
- uint64 tmp;
- trace_input ("mvtachi", OP_REG, OP_ACCUM, OP_VOID);
- tmp = ACC (OP[1]) & 0xffff;
- tmp = ((SEXT16 (GPR (OP[0])) << 16 | tmp) & MASK40);
- SET_ACC (OP[1], tmp);
- trace_output_40 (tmp);
-}
-
-/* mvtaclo */
-void
-OP_1E21 ()
-{
- int64 tmp;
- trace_input ("mvtaclo", OP_REG, OP_ACCUM, OP_VOID);
- tmp = ((SEXT16 (GPR (OP[0]))) & MASK40);
- SET_ACC (OP[1], tmp);
- trace_output_40 (tmp);
-}
-
-/* mvtc */
-void
-OP_5600 ()
-{
- int16 tmp;
- trace_input ("mvtc", OP_REG, OP_CR_OUTPUT, OP_VOID);
- tmp = GPR (OP[0]);
- tmp = SET_CREG (OP[1], tmp);
- trace_output_16 (tmp);
-}
-
-/* mvub */
-void
-OP_5401 ()
-{
- int16 tmp;
- trace_input ("mvub", OP_REG_OUTPUT, OP_REG, OP_VOID);
- tmp = (GPR (OP[1]) & 0xff);
- SET_GPR (OP[0], tmp);
- trace_output_16 (tmp);
-}
-
-/* neg */
-void
-OP_4605 ()
-{
- int16 tmp;
- trace_input ("neg", OP_REG, OP_VOID, OP_VOID);
- tmp = - GPR (OP[0]);
- SET_GPR (OP[0], tmp);
- trace_output_16 (tmp);
-}
-
-/* neg */
-void
-OP_5605 ()
-{
- int64 tmp;
-
- trace_input ("neg", OP_ACCUM, OP_VOID, OP_VOID);
- tmp = -SEXT40(ACC (OP[0]));
- if (PSW_ST)
- {
- if (tmp > SEXT40(MAX32))
- tmp = (MAX32);
- else if (tmp < SEXT40(MIN32))
- tmp = (MIN32);
- else
- tmp = (tmp & MASK40);
- }
- else
- tmp = (tmp & MASK40);
- SET_ACC (OP[0], tmp);
- trace_output_40 (tmp);
-}
-
-
-/* nop */
-void
-OP_5E00 ()
-{
- trace_input ("nop", OP_VOID, OP_VOID, OP_VOID);
-
- ins_type_counters[ (int)State.ins_type ]--; /* don't count nops as normal instructions */
- switch (State.ins_type)
- {
- default:
- ins_type_counters[ (int)INS_UNKNOWN ]++;
- break;
-
- case INS_LEFT_PARALLEL:
- /* Don't count a parallel op that includes a NOP as a true parallel op */
- ins_type_counters[ (int)INS_RIGHT_PARALLEL ]--;
- ins_type_counters[ (int)INS_RIGHT ]++;
- ins_type_counters[ (int)INS_LEFT_NOPS ]++;
- break;
-
- case INS_LEFT:
- case INS_LEFT_COND_EXE:
- ins_type_counters[ (int)INS_LEFT_NOPS ]++;
- break;
-
- case INS_RIGHT_PARALLEL:
- /* Don't count a parallel op that includes a NOP as a true parallel op */
- ins_type_counters[ (int)INS_LEFT_PARALLEL ]--;
- ins_type_counters[ (int)INS_LEFT ]++;
- ins_type_counters[ (int)INS_RIGHT_NOPS ]++;
- break;
-
- case INS_RIGHT:
- case INS_RIGHT_COND_EXE:
- ins_type_counters[ (int)INS_RIGHT_NOPS ]++;
- break;
- }
-
- trace_output_void ();
-}
-
-/* not */
-void
-OP_4603 ()
-{
- int16 tmp;
- trace_input ("not", OP_REG, OP_VOID, OP_VOID);
- tmp = ~GPR (OP[0]);
- SET_GPR (OP[0], tmp);
- trace_output_16 (tmp);
-}
-
-/* or */
-void
-OP_800 ()
-{
- int16 tmp;
- trace_input ("or", OP_REG, OP_REG, OP_VOID);
- tmp = (GPR (OP[0]) | GPR (OP[1]));
- SET_GPR (OP[0], tmp);
- trace_output_16 (tmp);
-}
-
-/* or3 */
-void
-OP_4000000 ()
-{
- int16 tmp;
- trace_input ("or3", OP_REG_OUTPUT, OP_REG, OP_CONSTANT16);
- tmp = (GPR (OP[1]) | OP[2]);
- SET_GPR (OP[0], tmp);
- trace_output_16 (tmp);
-}
-
-/* rac */
-void
-OP_5201 ()
-{
- int64 tmp;
- int shift = SEXT3 (OP[2]);
-
- trace_input ("rac", OP_DREG_OUTPUT, OP_ACCUM, OP_CONSTANT3);
- if (OP[1] != 0)
- {
- (*d10v_callback->printf_filtered) (d10v_callback,
- "ERROR at PC 0x%x: instruction only valid for A0\n",
- PC<<2);
- State.exception = SIGILL;
- }
-
- SET_PSW_F1 (PSW_F0);
- tmp = SEXT56 ((ACC (0) << 16) | (ACC (1) & 0xffff));
- if (shift >=0)
- tmp <<= shift;
- else
- tmp >>= -shift;
- tmp += 0x8000;
- tmp >>= 16; /* look at bits 0:43 */
- if (tmp > SEXT44 (SIGNED64 (0x0007fffffff)))
- {
- tmp = 0x7fffffff;
- SET_PSW_F0 (1);
- }
- else if (tmp < SEXT44 (SIGNED64 (0xfff80000000)))
- {
- tmp = 0x80000000;
- SET_PSW_F0 (1);
- }
- else
- {
- SET_PSW_F0 (0);
- }
- SET_GPR32 (OP[0], tmp);
- trace_output_32 (tmp);
-}
-
-/* rachi */
-void
-OP_4201 ()
-{
- signed64 tmp;
- int shift = SEXT3 (OP[2]);
-
- trace_input ("rachi", OP_REG_OUTPUT, OP_ACCUM, OP_CONSTANT3);
- SET_PSW_F1 (PSW_F0);
- if (shift >=0)
- tmp = SEXT40 (ACC (OP[1])) << shift;
- else
- tmp = SEXT40 (ACC (OP[1])) >> -shift;
- tmp += 0x8000;
-
- if (tmp > SEXT44 (SIGNED64 (0x0007fffffff)))
- {
- tmp = 0x7fff;
- SET_PSW_F0 (1);
- }
- else if (tmp < SEXT44 (SIGNED64 (0xfff80000000)))
- {
- tmp = 0x8000;
- SET_PSW_F0 (1);
- }
- else
- {
- tmp = (tmp >> 16);
- SET_PSW_F0 (0);
- }
- SET_GPR (OP[0], tmp);
- trace_output_16 (tmp);
-}
-
-/* rep */
-void
-OP_27000000 ()
-{
- trace_input ("rep", OP_REG, OP_CONSTANT16, OP_VOID);
- SET_RPT_S (PC + 1);
- SET_RPT_E (PC + OP[1]);
- SET_RPT_C (GPR (OP[0]));
- SET_PSW_RP (1);
- if (GPR (OP[0]) == 0)
- {
- (*d10v_callback->printf_filtered) (d10v_callback, "ERROR: rep with count=0 is illegal.\n");
- State.exception = SIGILL;
- }
- if (OP[1] < 4)
- {
- (*d10v_callback->printf_filtered) (d10v_callback, "ERROR: rep must include at least 4 instructions.\n");
- State.exception = SIGILL;
- }
- trace_output_void ();
-}
-
-/* repi */
-void
-OP_2F000000 ()
-{
- trace_input ("repi", OP_CONSTANT16, OP_CONSTANT16, OP_VOID);
- SET_RPT_S (PC + 1);
- SET_RPT_E (PC + OP[1]);
- SET_RPT_C (OP[0]);
- SET_PSW_RP (1);
- if (OP[0] == 0)
- {
- (*d10v_callback->printf_filtered) (d10v_callback, "ERROR: repi with count=0 is illegal.\n");
- State.exception = SIGILL;
- }
- if (OP[1] < 4)
- {
- (*d10v_callback->printf_filtered) (d10v_callback, "ERROR: repi must include at least 4 instructions.\n");
- State.exception = SIGILL;
- }
- trace_output_void ();
-}
-
-/* rtd */
-void
-OP_5F60 ()
-{
- trace_input ("rtd", OP_VOID, OP_VOID, OP_VOID);
- SET_CREG (PSW_CR, DPSW);
- JMP(DPC);
- trace_output_void ();
-}
-
-/* rte */
-void
-OP_5F40 ()
-{
- trace_input ("rte", OP_VOID, OP_VOID, OP_VOID);
- SET_CREG (PSW_CR, BPSW);
- JMP(BPC);
- trace_output_void ();
-}
-
-/* sac */
-void OP_5209 ()
-{
- int64 tmp;
-
- trace_input ("sac", OP_REG_OUTPUT, OP_ACCUM, OP_VOID);
-
- tmp = SEXT40(ACC (OP[1]));
-
- SET_PSW_F1 (PSW_F0);
-
- if (tmp > SEXT40(MAX32))
- {
- tmp = (MAX32);
- SET_PSW_F0 (1);
- }
- else if (tmp < SEXT40(MIN32))
- {
- tmp = 0x80000000;
- SET_PSW_F0 (1);
- }
- else
- {
- tmp = (tmp & MASK32);
- SET_PSW_F0 (0);
- }
-
- SET_GPR32 (OP[0], tmp);
-
- trace_output_40 (tmp);
-}
-
-/* sachi */
-void
-OP_4209 ()
-{
- int64 tmp;
-
- trace_input ("sachi", OP_REG_OUTPUT, OP_ACCUM, OP_VOID);
-
- tmp = SEXT40(ACC (OP[1]));
-
- SET_PSW_F1 (PSW_F0);
-
- if (tmp > SEXT40(MAX32))
- {
- tmp = 0x7fff;
- SET_PSW_F0 (1);
- }
- else if (tmp < SEXT40(MIN32))
- {
- tmp = 0x8000;
- SET_PSW_F0 (1);
- }
- else
- {
- tmp >>= 16;
- SET_PSW_F0 (0);
- }
-
- SET_GPR (OP[0], tmp);
-
- trace_output_16 (OP[0]);
-}
-
-/* sadd */
-void
-OP_1223 ()
-{
- int64 tmp;
-
- trace_input ("sadd", OP_ACCUM, OP_ACCUM, OP_VOID);
- tmp = SEXT40(ACC (OP[0])) + (SEXT40(ACC (OP[1])) >> 16);
- if (PSW_ST)
- {
- if (tmp > SEXT40(MAX32))
- tmp = (MAX32);
- else if (tmp < SEXT40(MIN32))
- tmp = (MIN32);
- else
- tmp = (tmp & MASK40);
- }
- else
- tmp = (tmp & MASK40);
- SET_ACC (OP[0], tmp);
- trace_output_40 (tmp);
-}
-
-/* setf0f */
-void
-OP_4611 ()
-{
- int16 tmp;
- trace_input ("setf0f", OP_REG_OUTPUT, OP_VOID, OP_VOID);
- tmp = ((PSW_F0 == 0) ? 1 : 0);
- SET_GPR (OP[0], tmp);
- trace_output_16 (tmp);
-}
-
-/* setf0t */
-void
-OP_4613 ()
-{
- int16 tmp;
- trace_input ("setf0t", OP_REG_OUTPUT, OP_VOID, OP_VOID);
- tmp = ((PSW_F0 == 1) ? 1 : 0);
- SET_GPR (OP[0], tmp);
- trace_output_16 (tmp);
-}
-
-/* slae */
-void
-OP_3220 ()
-{
- int64 tmp;
- int16 reg;
-
- trace_input ("slae", OP_ACCUM, OP_REG, OP_VOID);
-
- reg = SEXT16 (GPR (OP[1]));
-
- if (reg >= 17 || reg <= -17)
- {
- (*d10v_callback->printf_filtered) (d10v_callback, "ERROR: shift value %d too large.\n", reg);
- State.exception = SIGILL;
- return;
- }
-
- tmp = SEXT40 (ACC (OP[0]));
-
- if (PSW_ST && (tmp < SEXT40 (MIN32) || tmp > SEXT40 (MAX32)))
- {
- (*d10v_callback->printf_filtered) (d10v_callback, "ERROR: accumulator value 0x%.2x%.8lx out of range\n", ((int)(tmp >> 32) & 0xff), ((unsigned long) tmp) & 0xffffffff);
- State.exception = SIGILL;
- return;
- }
-
- if (reg >= 0 && reg <= 16)
- {
- tmp = SEXT56 ((SEXT56 (tmp)) << (GPR (OP[1])));
- if (PSW_ST)
- {
- if (tmp > SEXT40(MAX32))
- tmp = (MAX32);
- else if (tmp < SEXT40(MIN32))
- tmp = (MIN32);
- else
- tmp = (tmp & MASK40);
- }
- else
- tmp = (tmp & MASK40);
- }
- else
- {
- tmp = (SEXT40 (ACC (OP[0]))) >> (-GPR (OP[1]));
- }
-
- SET_ACC(OP[0], tmp);
-
- trace_output_40(tmp);
-}
-
-/* sleep */
-void
-OP_5FC0 ()
-{
- trace_input ("sleep", OP_VOID, OP_VOID, OP_VOID);
- SET_PSW_IE (1);
- trace_output_void ();
-}
-
-/* sll */
-void
-OP_2200 ()
-{
- int16 tmp;
- trace_input ("sll", OP_REG, OP_REG, OP_VOID);
- tmp = (GPR (OP[0]) << (GPR (OP[1]) & 0xf));
- SET_GPR (OP[0], tmp);
- trace_output_16 (tmp);
-}
-
-/* sll */
-void
-OP_3200 ()
-{
- int64 tmp;
- trace_input ("sll", OP_ACCUM, OP_REG, OP_VOID);
- if ((GPR (OP[1]) & 31) <= 16)
- tmp = SEXT40 (ACC (OP[0])) << (GPR (OP[1]) & 31);
- else
- {
- (*d10v_callback->printf_filtered) (d10v_callback, "ERROR: shift value %d too large.\n", GPR (OP[1]) & 31);
- State.exception = SIGILL;
- return;
- }
-
- if (PSW_ST)
- {
- if (tmp > SEXT40(MAX32))
- tmp = (MAX32);
- else if (tmp < SEXT40(MIN32))
- tmp = (MIN32);
- else
- tmp = (tmp & MASK40);
- }
- else
- tmp = (tmp & MASK40);
- SET_ACC (OP[0], tmp);
- trace_output_40 (tmp);
-}
-
-/* slli */
-void
-OP_2201 ()
-{
- int16 tmp;
- trace_input ("slli", OP_REG, OP_CONSTANT16, OP_VOID);
- tmp = (GPR (OP[0]) << OP[1]);
- SET_GPR (OP[0], tmp);
- trace_output_16 (tmp);
-}
-
-/* slli */
-void
-OP_3201 ()
-{
- int64 tmp;
-
- if (OP[1] == 0)
- OP[1] = 16;
-
- trace_input ("slli", OP_ACCUM, OP_CONSTANT16, OP_VOID);
- tmp = SEXT40(ACC (OP[0])) << OP[1];
-
- if (PSW_ST)
- {
- if (tmp > SEXT40(MAX32))
- tmp = (MAX32);
- else if (tmp < SEXT40(MIN32))
- tmp = (MIN32);
- else
- tmp = (tmp & MASK40);
- }
- else
- tmp = (tmp & MASK40);
- SET_ACC (OP[0], tmp);
- trace_output_40 (tmp);
-}
-
-/* slx */
-void
-OP_460B ()
-{
- int16 tmp;
- trace_input ("slx", OP_REG, OP_FLAG, OP_VOID);
- tmp = ((GPR (OP[0]) << 1) | PSW_F0);
- SET_GPR (OP[0], tmp);
- trace_output_16 (tmp);
-}
-
-/* sra */
-void
-OP_2400 ()
-{
- int16 tmp;
- trace_input ("sra", OP_REG, OP_REG, OP_VOID);
- tmp = (((int16)(GPR (OP[0]))) >> (GPR (OP[1]) & 0xf));
- SET_GPR (OP[0], tmp);
- trace_output_16 (tmp);
-}
-
-/* sra */
-void
-OP_3400 ()
-{
- trace_input ("sra", OP_ACCUM, OP_REG, OP_VOID);
- if ((GPR (OP[1]) & 31) <= 16)
- {
- int64 tmp = ((SEXT40(ACC (OP[0])) >> (GPR (OP[1]) & 31)) & MASK40);
- SET_ACC (OP[0], tmp);
- trace_output_40 (tmp);
- }
- else
- {
- (*d10v_callback->printf_filtered) (d10v_callback, "ERROR: shift value %d too large.\n", GPR (OP[1]) & 31);
- State.exception = SIGILL;
- return;
- }
-}
-
-/* srai */
-void
-OP_2401 ()
-{
- int16 tmp;
- trace_input ("srai", OP_REG, OP_CONSTANT16, OP_VOID);
- tmp = (((int16)(GPR (OP[0]))) >> OP[1]);
- SET_GPR (OP[0], tmp);
- trace_output_16 (tmp);
-}
-
-/* srai */
-void
-OP_3401 ()
-{
- int64 tmp;
- if (OP[1] == 0)
- OP[1] = 16;
-
- trace_input ("srai", OP_ACCUM, OP_CONSTANT16, OP_VOID);
- tmp = ((SEXT40(ACC (OP[0])) >> OP[1]) & MASK40);
- SET_ACC (OP[0], tmp);
- trace_output_40 (tmp);
-}
-
-/* srl */
-void
-OP_2000 ()
-{
- int16 tmp;
- trace_input ("srl", OP_REG, OP_REG, OP_VOID);
- tmp = (GPR (OP[0]) >> (GPR (OP[1]) & 0xf));
- SET_GPR (OP[0], tmp);
- trace_output_16 (tmp);
-}
-
-/* srl */
-void
-OP_3000 ()
-{
- trace_input ("srl", OP_ACCUM, OP_REG, OP_VOID);
- if ((GPR (OP[1]) & 31) <= 16)
- {
- int64 tmp = ((uint64)((ACC (OP[0]) & MASK40) >> (GPR (OP[1]) & 31)));
- SET_ACC (OP[0], tmp);
- trace_output_40 (tmp);
- }
- else
- {
- (*d10v_callback->printf_filtered) (d10v_callback, "ERROR: shift value %d too large.\n", GPR (OP[1]) & 31);
- State.exception = SIGILL;
- return;
- }
-
-}
-
-/* srli */
-void
-OP_2001 ()
-{
- int16 tmp;
- trace_input ("srli", OP_REG, OP_CONSTANT16, OP_VOID);
- tmp = (GPR (OP[0]) >> OP[1]);
- SET_GPR (OP[0], tmp);
- trace_output_16 (tmp);
-}
-
-/* srli */
-void
-OP_3001 ()
-{
- int64 tmp;
- if (OP[1] == 0)
- OP[1] = 16;
-
- trace_input ("srli", OP_ACCUM, OP_CONSTANT16, OP_VOID);
- tmp = ((uint64)(ACC (OP[0]) & MASK40) >> OP[1]);
- SET_ACC (OP[0], tmp);
- trace_output_40 (tmp);
-}
-
-/* srx */
-void
-OP_4609 ()
-{
- uint16 tmp;
- trace_input ("srx", OP_REG, OP_FLAG, OP_VOID);
- tmp = PSW_F0 << 15;
- tmp = ((GPR (OP[0]) >> 1) | tmp);
- SET_GPR (OP[0], tmp);
- trace_output_16 (tmp);
-}
-
-/* st */
-void
-OP_34000000 ()
-{
- uint16 addr = OP[1] + GPR (OP[2]);
- trace_input ("st", OP_REG, OP_MEMREF2, OP_VOID);
- if ((addr & 1))
- {
- State.exception = SIG_D10V_BUS;
- State.pc_changed = 1; /* Don't increment the PC. */
- trace_output_void ();
- return;
- }
- SW (addr, GPR (OP[0]));
- trace_output_void ();
-}
-
-/* st */
-void
-OP_6800 ()
-{
- uint16 addr = GPR (OP[1]);
- trace_input ("st", OP_REG, OP_MEMREF, OP_VOID);
- if ((addr & 1))
- {
- State.exception = SIG_D10V_BUS;
- State.pc_changed = 1; /* Don't increment the PC. */
- trace_output_void ();
- return;
- }
- SW (addr, GPR (OP[0]));
- trace_output_void ();
-}
-
-/* st */
-/* st Rsrc1,@-SP */
-void
-OP_6C1F ()
-{
- uint16 addr = GPR (OP[1]) - 2;
- trace_input ("st", OP_REG, OP_PREDEC, OP_VOID);
- if (OP[1] != 15)
- {
- (*d10v_callback->printf_filtered) (d10v_callback, "ERROR: cannot pre-decrement any registers but r15 (SP).\n");
- State.exception = SIGILL;
- return;
- }
- if ((addr & 1))
- {
- State.exception = SIG_D10V_BUS;
- State.pc_changed = 1; /* Don't increment the PC. */
- trace_output_void ();
- return;
- }
- SW (addr, GPR (OP[0]));
- SET_GPR (OP[1], addr);
- trace_output_void ();
-}
-
-/* st */
-void
-OP_6801 ()
-{
- uint16 addr = GPR (OP[1]);
- trace_input ("st", OP_REG, OP_POSTINC, OP_VOID);
- if ((addr & 1))
- {
- State.exception = SIG_D10V_BUS;
- State.pc_changed = 1; /* Don't increment the PC. */
- trace_output_void ();
- return;
- }
- SW (addr, GPR (OP[0]));
- INC_ADDR (OP[1], 2);
- trace_output_void ();
-}
-
-/* st */
-void
-OP_6C01 ()
-{
- uint16 addr = GPR (OP[1]);
- trace_input ("st", OP_REG, OP_POSTDEC, OP_VOID);
- if ( OP[1] == 15 )
- {
- (*d10v_callback->printf_filtered) (d10v_callback, "ERROR: cannot post-decrement register r15 (SP).\n");
- State.exception = SIGILL;
- return;
- }
- if ((addr & 1))
- {
- State.exception = SIG_D10V_BUS;
- State.pc_changed = 1; /* Don't increment the PC. */
- trace_output_void ();
- return;
- }
- SW (addr, GPR (OP[0]));
- INC_ADDR (OP[1], -2);
- trace_output_void ();
-}
-
-/* st */
-void
-OP_36010000 ()
-{
- uint16 addr = OP[1];
- trace_input ("st", OP_REG, OP_MEMREF3, OP_VOID);
- if ((addr & 1))
- {
- State.exception = SIG_D10V_BUS;
- State.pc_changed = 1; /* Don't increment the PC. */
- trace_output_void ();
- return;
- }
- SW (addr, GPR (OP[0]));
- trace_output_void ();
-}
-
-/* st2w */
-void
-OP_35000000 ()
-{
- uint16 addr = GPR (OP[2])+ OP[1];
- trace_input ("st2w", OP_DREG, OP_MEMREF2, OP_VOID);
- if ((addr & 1))
- {
- State.exception = SIG_D10V_BUS;
- State.pc_changed = 1; /* Don't increment the PC. */
- trace_output_void ();
- return;
- }
- SW (addr + 0, GPR (OP[0] + 0));
- SW (addr + 2, GPR (OP[0] + 1));
- trace_output_void ();
-}
-
-/* st2w */
-void
-OP_6A00 ()
-{
- uint16 addr = GPR (OP[1]);
- trace_input ("st2w", OP_DREG, OP_MEMREF, OP_VOID);
- if ((addr & 1))
- {
- State.exception = SIG_D10V_BUS;
- State.pc_changed = 1; /* Don't increment the PC. */
- trace_output_void ();
- return;
- }
- SW (addr + 0, GPR (OP[0] + 0));
- SW (addr + 2, GPR (OP[0] + 1));
- trace_output_void ();
-}
-
-/* st2w */
-void
-OP_6E1F ()
-{
- uint16 addr = GPR (OP[1]) - 4;
- trace_input ("st2w", OP_DREG, OP_PREDEC, OP_VOID);
- if ( OP[1] != 15 )
- {
- (*d10v_callback->printf_filtered) (d10v_callback, "ERROR: cannot pre-decrement any registers but r15 (SP).\n");
- State.exception = SIGILL;
- return;
- }
- if ((addr & 1))
- {
- State.exception = SIG_D10V_BUS;
- State.pc_changed = 1; /* Don't increment the PC. */
- trace_output_void ();
- return;
- }
- SW (addr + 0, GPR (OP[0] + 0));
- SW (addr + 2, GPR (OP[0] + 1));
- SET_GPR (OP[1], addr);
- trace_output_void ();
-}
-
-/* st2w */
-void
-OP_6A01 ()
-{
- uint16 addr = GPR (OP[1]);
- trace_input ("st2w", OP_DREG, OP_POSTINC, OP_VOID);
- if ((addr & 1))
- {
- State.exception = SIG_D10V_BUS;
- State.pc_changed = 1; /* Don't increment the PC. */
- trace_output_void ();
- return;
- }
- SW (addr + 0, GPR (OP[0] + 0));
- SW (addr + 2, GPR (OP[0] + 1));
- INC_ADDR (OP[1], 4);
- trace_output_void ();
-}
-
-/* st2w */
-void
-OP_6E01 ()
-{
- uint16 addr = GPR (OP[1]);
- trace_input ("st2w", OP_DREG, OP_POSTDEC, OP_VOID);
- if ( OP[1] == 15 )
- {
- (*d10v_callback->printf_filtered) (d10v_callback, "ERROR: cannot post-decrement register r15 (SP).\n");
- State.exception = SIGILL;
- return;
- }
- if ((addr & 1))
- {
- State.exception = SIG_D10V_BUS;
- State.pc_changed = 1; /* Don't increment the PC. */
- trace_output_void ();
- return;
- }
- SW (addr + 0, GPR (OP[0] + 0));
- SW (addr + 2, GPR (OP[0] + 1));
- INC_ADDR (OP[1], -4);
- trace_output_void ();
-}
-
-/* st2w */
-void
-OP_37010000 ()
-{
- uint16 addr = OP[1];
- trace_input ("st2w", OP_DREG, OP_MEMREF3, OP_VOID);
- if ((addr & 1))
- {
- State.exception = SIG_D10V_BUS;
- State.pc_changed = 1; /* Don't increment the PC. */
- trace_output_void ();
- return;
- }
- SW (addr + 0, GPR (OP[0] + 0));
- SW (addr + 2, GPR (OP[0] + 1));
- trace_output_void ();
-}
-
-/* stb */
-void
-OP_3C000000 ()
-{
- trace_input ("stb", OP_REG, OP_MEMREF2, OP_VOID);
- SB (GPR (OP[2]) + OP[1], GPR (OP[0]));
- trace_output_void ();
-}
-
-/* stb */
-void
-OP_7800 ()
-{
- trace_input ("stb", OP_REG, OP_MEMREF, OP_VOID);
- SB (GPR (OP[1]), GPR (OP[0]));
- trace_output_void ();
-}
-
-/* stop */
-void
-OP_5FE0 ()
-{
- trace_input ("stop", OP_VOID, OP_VOID, OP_VOID);
- State.exception = SIG_D10V_STOP;
- trace_output_void ();
-}
-
-/* sub */
-void
-OP_0 ()
-{
- uint16 a = GPR (OP[0]);
- uint16 b = GPR (OP[1]);
- uint16 tmp = (a - b);
- trace_input ("sub", OP_REG, OP_REG, OP_VOID);
- /* see ../common/sim-alu.h for a more extensive discussion on how to
- compute the carry/overflow bits. */
- SET_PSW_C (a >= b);
- SET_GPR (OP[0], tmp);
- trace_output_16 (tmp);
-}
-
-/* sub */
-void
-OP_1001 ()
-{
- int64 tmp;
-
- trace_input ("sub", OP_ACCUM, OP_DREG, OP_VOID);
- tmp = SEXT40(ACC (OP[0])) - (SEXT16 (GPR (OP[1])) << 16 | GPR (OP[1] + 1));
- if (PSW_ST)
- {
- if (tmp > SEXT40(MAX32))
- tmp = (MAX32);
- else if (tmp < SEXT40(MIN32))
- tmp = (MIN32);
- else
- tmp = (tmp & MASK40);
- }
- else
- tmp = (tmp & MASK40);
- SET_ACC (OP[0], tmp);
-
- trace_output_40 (tmp);
-}
-
-/* sub */
-
-void
-OP_1003 ()
-{
- int64 tmp;
-
- trace_input ("sub", OP_ACCUM, OP_ACCUM, OP_VOID);
- tmp = SEXT40(ACC (OP[0])) - SEXT40(ACC (OP[1]));
- if (PSW_ST)
- {
- if (tmp > SEXT40(MAX32))
- tmp = (MAX32);
- else if (tmp < SEXT40(MIN32))
- tmp = (MIN32);
- else
- tmp = (tmp & MASK40);
- }
- else
- tmp = (tmp & MASK40);
- SET_ACC (OP[0], tmp);
-
- trace_output_40 (tmp);
-}
-
-/* sub2w */
-void
-OP_1000 ()
-{
- uint32 tmp, a, b;
-
- trace_input ("sub2w", OP_DREG, OP_DREG, OP_VOID);
- a = (uint32)((GPR (OP[0]) << 16) | GPR (OP[0] + 1));
- b = (uint32)((GPR (OP[1]) << 16) | GPR (OP[1] + 1));
- /* see ../common/sim-alu.h for a more extensive discussion on how to
- compute the carry/overflow bits */
- tmp = a - b;
- SET_PSW_C (a >= b);
- SET_GPR32 (OP[0], tmp);
- trace_output_32 (tmp);
-}
-
-/* subac3 */
-void
-OP_17000000 ()
-{
- int64 tmp;
-
- trace_input ("subac3", OP_DREG_OUTPUT, OP_DREG, OP_ACCUM);
- tmp = SEXT40 ((GPR (OP[1]) << 16) | GPR (OP[1] + 1)) - SEXT40 (ACC (OP[2]));
- SET_GPR32 (OP[0], tmp);
- trace_output_32 (tmp);
-}
-
-/* subac3 */
-void
-OP_17000002 ()
-{
- int64 tmp;
-
- trace_input ("subac3", OP_DREG_OUTPUT, OP_ACCUM, OP_ACCUM);
- tmp = SEXT40 (ACC (OP[1])) - SEXT40(ACC (OP[2]));
- SET_GPR32 (OP[0], tmp);
- trace_output_32 (tmp);
-}
-
-/* subac3s */
-void
-OP_17001000 ()
-{
- int64 tmp;
-
- trace_input ("subac3s", OP_DREG_OUTPUT, OP_DREG, OP_ACCUM);
- SET_PSW_F1 (PSW_F0);
- tmp = SEXT40 ((GPR (OP[1]) << 16) | GPR (OP[1] + 1)) - SEXT40(ACC (OP[2]));
- if (tmp > SEXT40(MAX32))
- {
- tmp = (MAX32);
- SET_PSW_F0 (1);
- }
- else if (tmp < SEXT40(MIN32))
- {
- tmp = (MIN32);
- SET_PSW_F0 (1);
- }
- else
- {
- SET_PSW_F0 (0);
- }
- SET_GPR32 (OP[0], tmp);
- trace_output_32 (tmp);
-}
-
-/* subac3s */
-void
-OP_17001002 ()
-{
- int64 tmp;
-
- trace_input ("subac3s", OP_DREG_OUTPUT, OP_ACCUM, OP_ACCUM);
- SET_PSW_F1 (PSW_F0);
- tmp = SEXT40(ACC (OP[1])) - SEXT40(ACC (OP[2]));
- if (tmp > SEXT40(MAX32))
- {
- tmp = (MAX32);
- SET_PSW_F0 (1);
- }
- else if (tmp < SEXT40(MIN32))
- {
- tmp = (MIN32);
- SET_PSW_F0 (1);
- }
- else
- {
- SET_PSW_F0 (0);
- }
- SET_GPR32 (OP[0], tmp);
- trace_output_32 (tmp);
-}
-
-/* subi */
-void
-OP_1 ()
-{
- unsigned tmp;
- if (OP[1] == 0)
- OP[1] = 16;
-
- trace_input ("subi", OP_REG, OP_CONSTANT16, OP_VOID);
- /* see ../common/sim-alu.h for a more extensive discussion on how to
- compute the carry/overflow bits. */
- /* since OP[1] is never <= 0, -OP[1] == ~OP[1]+1 can never overflow */
- tmp = ((unsigned)(unsigned16) GPR (OP[0])
- + (unsigned)(unsigned16) ( - OP[1]));
- SET_PSW_C (tmp >= (1 << 16));
- SET_GPR (OP[0], tmp);
- trace_output_16 (tmp);
-}
-
-/* trap */
-void
-OP_5F00 ()
-{
- trace_input ("trap", OP_CONSTANT4, OP_VOID, OP_VOID);
- trace_output_void ();
-
- switch (OP[0])
- {
- default:
-#if (DEBUG & DEBUG_TRAP) == 0
- {
- uint16 vec = OP[0] + TRAP_VECTOR_START;
- SET_BPC (PC + 1);
- SET_BPSW (PSW);
- SET_PSW (PSW & PSW_SM_BIT);
- JMP (vec);
- break;
- }
-#else /* if debugging use trap to print registers */
- {
- int i;
- static int first_time = 1;
-
- if (first_time)
- {
- first_time = 0;
- (*d10v_callback->printf_filtered) (d10v_callback, "Trap # PC ");
- for (i = 0; i < 16; i++)
- (*d10v_callback->printf_filtered) (d10v_callback, " %sr%d", (i > 9) ? "" : " ", i);
- (*d10v_callback->printf_filtered) (d10v_callback, " a0 a1 f0 f1 c\n");
- }
-
- (*d10v_callback->printf_filtered) (d10v_callback, "Trap %2d 0x%.4x:", (int)OP[0], (int)PC);
-
- for (i = 0; i < 16; i++)
- (*d10v_callback->printf_filtered) (d10v_callback, " %.4x", (int) GPR (i));
-
- for (i = 0; i < 2; i++)
- (*d10v_callback->printf_filtered) (d10v_callback, " %.2x%.8lx",
- ((int)(ACC (i) >> 32) & 0xff),
- ((unsigned long) ACC (i)) & 0xffffffff);
-
- (*d10v_callback->printf_filtered) (d10v_callback, " %d %d %d\n",
- PSW_F0 != 0, PSW_F1 != 0, PSW_C != 0);
- (*d10v_callback->flush_stdout) (d10v_callback);
- break;
- }
-#endif
- case 15: /* new system call trap */
- /* Trap 15 is used for simulating low-level I/O */
- {
- unsigned32 result = 0;
- errno = 0;
-
-/* Registers passed to trap 0 */
-
-#define FUNC GPR (4) /* function number */
-#define PARM1 GPR (0) /* optional parm 1 */
-#define PARM2 GPR (1) /* optional parm 2 */
-#define PARM3 GPR (2) /* optional parm 3 */
-#define PARM4 GPR (3) /* optional parm 3 */
-
-/* Registers set by trap 0 */
-
-#define RETVAL(X) do { result = (X); SET_GPR (0, result); } while (0)
-#define RETVAL32(X) do { result = (X); SET_GPR (0, result >> 16); SET_GPR (1, result); } while (0)
-#define RETERR(X) SET_GPR (4, (X)) /* return error code */
-
-/* Turn a pointer in a register into a pointer into real memory. */
-
-#define MEMPTR(x) ((char *)(dmem_addr(x)))
-
- switch (FUNC)
- {
-#if !defined(__GO32__) && !defined(_WIN32)
- case TARGET_SYS_fork:
- trace_input ("<fork>", OP_VOID, OP_VOID, OP_VOID);
- RETVAL (fork ());
- trace_output_16 (result);
- break;
-
-#define getpid() 47
- case TARGET_SYS_getpid:
- trace_input ("<getpid>", OP_VOID, OP_VOID, OP_VOID);
- RETVAL (getpid ());
- trace_output_16 (result);
- break;
-
- case TARGET_SYS_kill:
- trace_input ("<kill>", OP_R0, OP_R1, OP_VOID);
- if (PARM1 == getpid ())
- {
- trace_output_void ();
- State.exception = PARM2;
- }
- else
- {
- int os_sig = -1;
- switch (PARM2)
- {
-#ifdef SIGHUP
- case 1: os_sig = SIGHUP; break;
-#endif
-#ifdef SIGINT
- case 2: os_sig = SIGINT; break;
-#endif
-#ifdef SIGQUIT
- case 3: os_sig = SIGQUIT; break;
-#endif
-#ifdef SIGILL
- case 4: os_sig = SIGILL; break;
-#endif
-#ifdef SIGTRAP
- case 5: os_sig = SIGTRAP; break;
-#endif
-#ifdef SIGABRT
- case 6: os_sig = SIGABRT; break;
-#elif defined(SIGIOT)
- case 6: os_sig = SIGIOT; break;
-#endif
-#ifdef SIGEMT
- case 7: os_sig = SIGEMT; break;
-#endif
-#ifdef SIGFPE
- case 8: os_sig = SIGFPE; break;
-#endif
-#ifdef SIGKILL
- case 9: os_sig = SIGKILL; break;
-#endif
-#ifdef SIGBUS
- case 10: os_sig = SIGBUS; break;
-#endif
-#ifdef SIGSEGV
- case 11: os_sig = SIGSEGV; break;
-#endif
-#ifdef SIGSYS
- case 12: os_sig = SIGSYS; break;
-#endif
-#ifdef SIGPIPE
- case 13: os_sig = SIGPIPE; break;
-#endif
-#ifdef SIGALRM
- case 14: os_sig = SIGALRM; break;
-#endif
-#ifdef SIGTERM
- case 15: os_sig = SIGTERM; break;
-#endif
-#ifdef SIGURG
- case 16: os_sig = SIGURG; break;
-#endif
-#ifdef SIGSTOP
- case 17: os_sig = SIGSTOP; break;
-#endif
-#ifdef SIGTSTP
- case 18: os_sig = SIGTSTP; break;
-#endif
-#ifdef SIGCONT
- case 19: os_sig = SIGCONT; break;
-#endif
-#ifdef SIGCHLD
- case 20: os_sig = SIGCHLD; break;
-#elif defined(SIGCLD)
- case 20: os_sig = SIGCLD; break;
-#endif
-#ifdef SIGTTIN
- case 21: os_sig = SIGTTIN; break;
-#endif
-#ifdef SIGTTOU
- case 22: os_sig = SIGTTOU; break;
-#endif
-#ifdef SIGIO
- case 23: os_sig = SIGIO; break;
-#elif defined (SIGPOLL)
- case 23: os_sig = SIGPOLL; break;
-#endif
-#ifdef SIGXCPU
- case 24: os_sig = SIGXCPU; break;
-#endif
-#ifdef SIGXFSZ
- case 25: os_sig = SIGXFSZ; break;
-#endif
-#ifdef SIGVTALRM
- case 26: os_sig = SIGVTALRM; break;
-#endif
-#ifdef SIGPROF
- case 27: os_sig = SIGPROF; break;
-#endif
-#ifdef SIGWINCH
- case 28: os_sig = SIGWINCH; break;
-#endif
-#ifdef SIGLOST
- case 29: os_sig = SIGLOST; break;
-#endif
-#ifdef SIGUSR1
- case 30: os_sig = SIGUSR1; break;
-#endif
-#ifdef SIGUSR2
- case 31: os_sig = SIGUSR2; break;
-#endif
- }
-
- if (os_sig == -1)
- {
- trace_output_void ();
- (*d10v_callback->printf_filtered) (d10v_callback, "Unknown signal %d\n", PARM2);
- (*d10v_callback->flush_stdout) (d10v_callback);
- State.exception = SIGILL;
- }
- else
- {
- RETVAL (kill (PARM1, PARM2));
- trace_output_16 (result);
- }
- }
- break;
-
- case TARGET_SYS_execve:
- trace_input ("<execve>", OP_R0, OP_R1, OP_R2);
- RETVAL (execve (MEMPTR (PARM1), (char **) MEMPTR (PARM2),
- (char **)MEMPTR (PARM3)));
- trace_output_16 (result);
- break;
-
-#ifdef TARGET_SYS_execv
- case TARGET_SYS_execv:
- trace_input ("<execv>", OP_R0, OP_R1, OP_VOID);
- RETVAL (execve (MEMPTR (PARM1), (char **) MEMPTR (PARM2), NULL));
- trace_output_16 (result);
- break;
-#endif
-
- case TARGET_SYS_pipe:
- {
- reg_t buf;
- int host_fd[2];
-
- trace_input ("<pipe>", OP_R0, OP_VOID, OP_VOID);
- buf = PARM1;
- RETVAL (pipe (host_fd));
- SW (buf, host_fd[0]);
- buf += sizeof(uint16);
- SW (buf, host_fd[1]);
- trace_output_16 (result);
- }
- break;
-
-#if 0
-#ifdef TARGET_SYS_wait
- case TARGET_SYS_wait:
- {
- int status;
- trace_input ("<wait>", OP_R0, OP_VOID, OP_VOID);
- RETVAL (wait (&status));
- if (PARM1)
- SW (PARM1, status);
- trace_output_16 (result);
- }
- break;
-#endif
-#endif
-#else
- case TARGET_SYS_getpid:
- trace_input ("<getpid>", OP_VOID, OP_VOID, OP_VOID);
- RETVAL (1);
- trace_output_16 (result);
- break;
-
- case TARGET_SYS_kill:
- trace_input ("<kill>", OP_REG, OP_REG, OP_VOID);
- trace_output_void ();
- State.exception = PARM2;
- break;
-#endif
-
- case TARGET_SYS_read:
- trace_input ("<read>", OP_R0, OP_R1, OP_R2);
- RETVAL (d10v_callback->read (d10v_callback, PARM1, MEMPTR (PARM2),
- PARM3));
- trace_output_16 (result);
- break;
-
- case TARGET_SYS_write:
- trace_input ("<write>", OP_R0, OP_R1, OP_R2);
- if (PARM1 == 1)
- RETVAL ((int)d10v_callback->write_stdout (d10v_callback,
- MEMPTR (PARM2), PARM3));
- else
- RETVAL ((int)d10v_callback->write (d10v_callback, PARM1,
- MEMPTR (PARM2), PARM3));
- trace_output_16 (result);
- break;
-
- case TARGET_SYS_lseek:
- trace_input ("<lseek>", OP_R0, OP_R1, OP_R2);
- RETVAL32 (d10v_callback->lseek (d10v_callback, PARM1,
- ((((unsigned long) PARM2) << 16)
- || (unsigned long) PARM3),
- PARM4));
- trace_output_32 (result);
- break;
-
- case TARGET_SYS_close:
- trace_input ("<close>", OP_R0, OP_VOID, OP_VOID);
- RETVAL (d10v_callback->close (d10v_callback, PARM1));
- trace_output_16 (result);
- break;
-
- case TARGET_SYS_open:
- trace_input ("<open>", OP_R0, OP_R1, OP_R2);
- RETVAL (d10v_callback->open (d10v_callback, MEMPTR (PARM1), PARM2));
- trace_output_16 (result);
- break;
-
- case TARGET_SYS_exit:
- trace_input ("<exit>", OP_R0, OP_VOID, OP_VOID);
- State.exception = SIG_D10V_EXIT;
- trace_output_void ();
- break;
-
-#ifdef TARGET_SYS_stat
- case TARGET_SYS_stat:
- trace_input ("<stat>", OP_R0, OP_R1, OP_VOID);
- /* stat system call */
- {
- struct stat host_stat;
- reg_t buf;
-
- RETVAL (stat (MEMPTR (PARM1), &host_stat));
-
- buf = PARM2;
-
- /* The hard-coded offsets and sizes were determined by using
- * the D10V compiler on a test program that used struct stat.
- */
- SW (buf, host_stat.st_dev);
- SW (buf+2, host_stat.st_ino);
- SW (buf+4, host_stat.st_mode);
- SW (buf+6, host_stat.st_nlink);
- SW (buf+8, host_stat.st_uid);
- SW (buf+10, host_stat.st_gid);
- SW (buf+12, host_stat.st_rdev);
- SLW (buf+16, host_stat.st_size);
- SLW (buf+20, host_stat.st_atime);
- SLW (buf+28, host_stat.st_mtime);
- SLW (buf+36, host_stat.st_ctime);
- }
- trace_output_16 (result);
- break;
-#endif
-
- case TARGET_SYS_chown:
- trace_input ("<chown>", OP_R0, OP_R1, OP_R2);
- RETVAL (chown (MEMPTR (PARM1), PARM2, PARM3));
- trace_output_16 (result);
- break;
-
- case TARGET_SYS_chmod:
- trace_input ("<chmod>", OP_R0, OP_R1, OP_R2);
- RETVAL (chmod (MEMPTR (PARM1), PARM2));
- trace_output_16 (result);
- break;
-
-#if 0
-#ifdef TARGET_SYS_utime
- case TARGET_SYS_utime:
- trace_input ("<utime>", OP_R0, OP_R1, OP_R2);
- /* Cast the second argument to void *, to avoid type mismatch
- if a prototype is present. */
- RETVAL (utime (MEMPTR (PARM1), (void *) MEMPTR (PARM2)));
- trace_output_16 (result);
- break;
-#endif
-#endif
-
-#if 0
-#ifdef TARGET_SYS_time
- case TARGET_SYS_time:
- trace_input ("<time>", OP_R0, OP_R1, OP_R2);
- RETVAL32 (time (PARM1 ? MEMPTR (PARM1) : NULL));
- trace_output_32 (result);
- break;
-#endif
-#endif
-
- default:
- d10v_callback->error (d10v_callback, "Unknown syscall %d", FUNC);
- }
- if ((uint16) result == (uint16) -1)
- RETERR (d10v_callback->get_errno(d10v_callback));
- else
- RETERR (0);
- break;
- }
- }
-}
-
-/* tst0i */
-void
-OP_7000000 ()
-{
- trace_input ("tst0i", OP_REG, OP_CONSTANT16, OP_VOID);
- SET_PSW_F1 (PSW_F0);;
- SET_PSW_F0 ((GPR (OP[0]) & OP[1]) ? 1 : 0);
- trace_output_flag ();
-}
-
-/* tst1i */
-void
-OP_F000000 ()
-{
- trace_input ("tst1i", OP_REG, OP_CONSTANT16, OP_VOID);
- SET_PSW_F1 (PSW_F0);
- SET_PSW_F0 ((~(GPR (OP[0])) & OP[1]) ? 1 : 0);
- trace_output_flag ();
-}
-
-/* wait */
-void
-OP_5F80 ()
-{
- trace_input ("wait", OP_VOID, OP_VOID, OP_VOID);
- SET_PSW_IE (1);
- trace_output_void ();
-}
-
-/* xor */
-void
-OP_A00 ()
-{
- int16 tmp;
- trace_input ("xor", OP_REG, OP_REG, OP_VOID);
- tmp = (GPR (OP[0]) ^ GPR (OP[1]));
- SET_GPR (OP[0], tmp);
- trace_output_16 (tmp);
-}
-
-/* xor3 */
-void
-OP_5000000 ()
-{
- int16 tmp;
- trace_input ("xor3", OP_REG_OUTPUT, OP_REG, OP_CONSTANT16);
- tmp = (GPR (OP[1]) ^ OP[2]);
- SET_GPR (OP[0], tmp);
- trace_output_16 (tmp);
-}
diff --git a/sim/d30v/ChangeLog b/sim/d30v/ChangeLog
deleted file mode 100644
index 6f65b241476..00000000000
--- a/sim/d30v/ChangeLog
+++ /dev/null
@@ -1,1380 +0,0 @@
-2000-07-05 Nick Clifton <nickc@cygnus.com>
-
- * d30v-insns: Change minimum loop size limit to 0x10.
-
-Tue May 23 21:39:23 2000 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-2000-04-12 Frank Ch. Eigler <fche@redhat.com>
-
- * cpu.h (GPR_CLEAR): New macro.
- (GPR_SET): Removed macro.
-
-Thu Sep 2 18:15:53 1999 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Wed Sep 1 11:38:21 1999 Andrew Cagney <cagney@b1.cygnus.com>
-
- * d30v-insns: Cast CIA to LONG in printfs.
-
-Tue Aug 31 01:32:22 1999 Andrew Cagney <cagney@b1.cygnus.com>
-
- * cpu.h (unqueue_writes): Add declaration.
-
-1999-05-27 Michael Meissner <meissner@cygnus.com>
-
- * d30v-insns (do_repeat): Print a warning if a REPEAT or REPEATI
- instruction loop is too small.
-
-1999-05-08 Felix Lee <flee@cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-1999-03-16 Martin Hunt <hunt@cygnus.com>
- From Frank Ch. Eigler <fche@cygnus.com>
-
- * cpu.h (mvtsys_left_p): New flag for MVTSYS instruction history.
- * d30v-insns (mvtsys): Set this flag instead of left_kills_right_p.
- (do_sath): Detect MVTSYS by new flag.
- * engine.c (unqueue_writes): Detect MVTSYS by new flag.
- (do_2_short, do_parallel): Initialize new flag.
-
-1999-02-26 Frank Ch. Eigler <fche@cygnus.com>
-
- * tconfig.in (SIM_HANDLES_LMA): Make it so.
-
-1999-01-12 Frank Ch. Eigler <fche@cygnus.com>
-
- * engine.c (unqueue_writes): Make PSW conflict resolution code
- conditional - disable it for MVTSYS || insn case.
-
-1999-01-11 Frank Ch. Eigler <fche@cygnus.com>
-
- * d30v-insns (do_sath): Drain PSW write queue before PSW_S_FLAG
- update.
- * engine.c (unqueue_writes): Make non-static. Remove PSW_V/VA
- special case.
- (do_parallel): Don't drain PSW write queue for MVTSYS || insn.
-
-1999-01-07 Frank Ch. Eigler <fche@cygnus.com>
-
- * d30v-insns (do_ld2h): Sign-extend loaded half-words.
-
-1999-01-05 Frank Ch. Eigler <fche@cygnus.com>
-
- * d30v-insns (do_ld2h): Read memory in word units.
- (do_ld4bh): Ditto. Correct sign extension.
- (do_ld4bhu): Ditto.
- (do_st2h): Write memory in word units.
- (do_st4hb): Ditto.
- (st4hb): Correct mnemonic in igen template.
-
-1998-12-08 Frank Ch. Eigler <fche@cygnus.com>
-
- * d30v-insns: (do_ld2h): Don't update R0 nor R1 for double-word insn.
- (do_ld2w): Ditto.
- (do_ld4bh): Ditto.
- (do_ld4bhu): Ditto.
- (do_mulx2h): Ditto.
-
-1998-12-03 Frank Ch. Eigler <fche@cygnus.com>
-
- * d30v-insns (do_repeat): Don't set RP for repeat count 1.
-
-1998-12-03 Frank Ch. Eigler <fche@cygnus.com>
-
- * d30v-insns (do_src): Treat shift count -32 naturally instead of
- producing zero result.
-
-1998-11-22 Frank Ch. Eigler <fche@cygnus.com>
-
- * d30v-insns (do_src): Limit SRC shift count to -32 .. 31.
-
-1998-11-16 Frank Ch. Eigler <fche@cygnus.com>
-
- * d30v-insns (dbt): Defer PSW/DPSW update with new DID_TRAP code 2.
- * engine.c (unqueue_writes): Perform DBT processing on PSW/DPSW here.
-
-1998-11-12 Frank Ch. Eigler <fche@cygnus.com>
-
- * cpu.h (_sim_cpu): Removed is_delayed_call field, and associated
- RPT_IS_CALL macro.
- * sim-calls.c (sim_create_inferior): Don't initialize is_delayed_call.
- * d30v-insns (do_dbra): Don't clear RPT_IS_CALL. (do_dbrai): Ditto.
- (do_djmp): Ditto. (do_djmpi): Ditto. (do_repeat): Ditto.
- * d30v-insns (do_dbsr): Don't set RPT_IS_CALL, but set R62 instead.
- (do_dbsri): Ditto. (do_djsr): Dito. (do_djsri): Ditto.
- * engine.c (sim_engine_run): Remove conditional setting of R62 based
- upon RPT_IS_CALL.
-
-1998-11-08 Frank Ch. Eigler <fche@cygnus.com>
-
- * sim-calls.c (sim_open): Add dummy memory range over control
- register region (0x40000000..0x4000FFFF).
-
-1998-11-06 Frank Ch. Eigler <fche@cygnus.com>
-
- * d30v-insns (do_mvfacc): Use loop to limit shift count to 63 .. 0.
-
-Tue Oct 13 11:01:16 1998 Frank Ch. Eigler <fche@cygnus.com>
-
- * d30v-insns (do_sra,do_srah,do_srl,do_srlh): Make shift
- count -32 to produce zero result.
- (do_src): Ditto for shift count == -64.
-
-Mon Oct 12 23:04:11 1998 Frank Ch. Eigler <fche@cygnus.com>
-
- * d30v-insns (ROT): Use 0x1f bit mask for rotate count masking.
- (do_sra,do_srl): Use loop to limit shift count to -32 .. 31.
- (do_srah,do_srlh): Use loop to limit shift count to -32 .. 31.
- (sra2h,srl2h): Use loop to limit shift count to -16 .. 15.
- (do_src): Use loop to limit shift count to -64 .. 63.
-
-Fri Oct 9 16:46:52 1998 Doug Evans <devans@canuck.cygnus.com>
-
- * sim-calls.c (get_insn_name): New fn.
- (sim_open): Initialize CPU_INSN_NAME,CPU_MAX_INSNS.
- * sim-main.h (MAX_INSNS,INSN_NAME): Delete.
-
-Mon Sep 28 10:43:28 1998 Frank Ch. Eigler <fche@cygnus.com>
-
- * d30v-insns (do_sra,do_srah,do_srl,do_srlh,ROT,do_src): Use
- correct MSB bit numbers for sign extension masks.
-
-Fri Sep 25 17:32:27 1998 Frank Ch. Eigler <fche@cygnus.com>
-
- * engine.c (do_parallel): Unqueue writes if MU instruction was
- a MVTSYS, as identified by its left_kills_right_p side-effect.
-
-Fri Sep 25 12:31:34 1998 Frank Ch. Eigler <fche@cygnus.com>
-
- * d30v-insns (do_sra,do_srah,do_srl,do_srlh,ROT,do_src): Mask
- shift/rotate counts to number of bits in width of operand; no
- longer saturate at maxima.
-
-Tue Jul 14 18:39:23 1998 Frank Ch. Eigler <fche@cygnus.com>
-
- * cpu.h (left_kills_right_p): New flag for non-branch instructions
- that, when executed in left slot of a -> sequential pair, kill the
- right slot.
- * d30v-insns (mvtsys): Set flag for PSW/PSWh/PSWl/FLAG operands.
- * engine.c (do_2_short): Respect flag.
-
-Thu Jun 4 16:48:58 1998 David Taylor <taylor@texas.cygnus.com>
-
- * d30v-insns (do_trap): don't save the bPSW and PSW based on
- current values because an instruction done in parallel with
- the trap might change them, instead set a flag do that
- unqueue_writes will take care of it.
- * engine.c (unqueue_writes): finish trap handling
- * cpu.h (_sim_cpu): add new field did_trap and a macro DID_TRAP
- to make use of it; set by do_trap, tested and cleared by
- unqueue_writes.
-
-Tue May 19 16:07:04 1998 Frank Ch. Eigler <fche@cygnus.com>
-
- * engine.c (unqueue_writes): Suppress the all enqueued writes to
- the same flags in PSW except the last.
-
-Fri May 15 11:38:59 1998 Frank Ch. Eigler <fche@cygnus.com>
-
- * d30v-insns (RETI): Correct instruction spelling to "reit".
-
-Thu May 14 09:34:20 1998 Frank Ch. Eigler <fche@cygnus.com>
-
- * d30v-insns (dbt): Handle DBT at end of repeat block.
- (do_trap, dbt): Clear PSW_RP if at end of repeat block.
-
-Thu May 14 07:41:41 1998 Frank Ch. Eigler <fche@cygnus.com>
-
- * engine.c (sim_engine_run): Trigger DDBT based on previous PC,
- instead of next PC.
-
-Wed May 13 11:03:40 1998 Frank Ch. Eigler <fche@cygnus.com>
-
- * engine.c (sim_engine_run): Move DDBT handling after instruction
- decode/execute stage.
-
-Tue May 12 12:14:53 1998 Frank Ch. Eigler <fche@cygnus.com>
-
- * d30v-insns (do_sat*): Correct "saturate to 0 bits" patch to
- properly handle negative saturation inputs.
-
-Tue May 12 11:11:26 1998 Frank Ch. Eigler <fche@cygnus.com>
-
- * engine.c (sim_engine_run): Decrement RPT_C only under more
- restricted conditions.
-
-Mon May 11 17:33:46 1998 Frank Ch. Eigler <fche@cygnus.com>
-
- * d30v-insns (do_sat*): Make "saturate to 0 bits" pass through data
- unchanged.
-
-Mon May 11 16:27:04 1998 Frank Ch. Eigler <fche@cygnus.com>
-
- * engine.c (sim_engine_run): Implement DDBT (debugger debug trap)
- functionality.
-
-Fri May 8 16:44:19 1998 Frank Ch. Eigler <fche@cygnus.com>
-
- * d30v-insns (do_trap): Set bPC to RPT_S if trap is last
- instruction in repeat block.
- (bsr*/jsr*): Set R62 (LINK) to RPT_S if subroutine branch
- is last instruction in repeat block.
-
-Fri May 8 11:06:50 1998 Frank Ch. Eigler <fche@cygnus.com>
-
- * d30v-insns (do_sath): Query/update F4/PSW_S using proper flag
- macro.
- * cpu.h (PSW_S_FLAG): New flag number for PSW_S status bit.
-
-Wed May 6 19:40:56 1998 Doug Evans <devans@canuck.cygnus.com>
-
- * sim-main.h (INSN_NAME): New arg `cpu'.
-
-Fri May 1 14:24:30 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * d30v-insns: Fix parameter list to sim_engine_abort.
-
-Thu Apr 30 14:28:00 1998 Fred Fish <fnf@cygnus.com>
-
- * d30v-insns (do_sath): Add additional argument that determines
- whether or not the F4 (PSW_S) bit in the PSW is updated.
- (SAT2H): Do not update PSW_S bit.
- (SATHp): Do update PSW_S bit.
-
-Tue Apr 28 23:36:00 1998 Fred Fish <fnf@cygnus.com>
-
- * d30v-insns (SRAHp, SRLHp): Immediate values are signed 6 bit
- values, not 5 bit values.
-
-Wed Apr 29 12:57:55 1998 Frank Ch. Eigler <fche@cygnus.com>
-
- * d30v-insns (do_incr): Check modular arithmetic limits after
- postincrement/postdecrement, rather than before, to match
- erroneous hardware behavior.
-
-Tue Apr 28 18:33:31 1998 Geoffrey Noer <noer@cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Mon Apr 27 19:42:00 1998 Fred Fish <fnf@cygnus.com>
-
- * d30v-insns (do_trap): Clear all bits in PSW except SM and DB.
-
-Mon Apr 27 14:55:00 1998 Fred Fish <fnf@cygnus.com>
-
- * d30v-insns (do_mulx2h): Low order results go in ra+1, high
- order in ra.
-
-Mon Apr 27 14:42:00 1998 Fred Fish <fnf@cygnus.com>
-
- * d30v-insns (do_mulx2h): Rewrite to do proper 32 bit signed
- multiply of high and low fields from operands.
-
-Sun Apr 26 15:31:55 1998 Tom Tromey <tromey@creche>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
- * config.in: Ditto.
-
-Sun Apr 26 15:20:20 1998 Tom Tromey <tromey@cygnus.com>
-
- * acconfig.h: New file.
- * configure.in: Reverted change of Apr 24; use sinclude again.
-
-Fri Apr 24 14:16:40 1998 Tom Tromey <tromey@creche>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
- * config.in: Ditto.
-
-Fri Apr 24 11:20:00 1998 Tom Tromey <tromey@cygnus.com>
-
- * configure.in: Don't call sinclude.
-
-Wed Apr 22 21:23:00 1998 Fred Fish <fnf@cygnus.com>
-
- * ic-d30v (RbU, RcU): Unsigned versions of Rb and Rc.
- * d30v-insns (MVTACC): Use new RbU and RcU macros.
-
-Wed Apr 22 20:52:00 1998 Fred Fish <fnf@cygnus.com>
-
- * ic-d30v (RbHU,RbLU): Unsigned versions of RbH and RbL.
- * d30v-insns (SRL2H): Use new RbHU and RbLU macros instead of
- RbH and RbL.
-
-Mon Apr 13 16:59:00 1998 Fred Fish <fnf@cygnus.com>
-
- * d30v-insns (do_srl): Avoid undefined behavior of host compiler
- when shifting left by more than 31 bits.
-
-Tue Apr 7 18:09:00 1998 Fred Fish <fnf@cygnus.com>
-
- * engine.c (sim_engine_run): Remove at_loop_end variable. Add
- rp_was_set and rpt_c_was_nonzero variables. Major restructuring of
- code before and after instruction execution to properly handle state
- of the RP bit in the PSW, the value in RPT_C, and other loop related
- problems.
-
-Sat Apr 4 20:36:25 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Fri Apr 3 15:26:00 1998 Fred Fish <fnf@cygnus.com>
-
- * d30v-insns (do_trap): Use offset from EIT_VB rather than hardcoded
- BASE_ADDRESS constant.
- * cpu.h (BASE_ADDRESS): Remove constant not used any longer.
-
-Fri Apr 3 14:42:00 1998 Fred Fish <fnf@cygnus.com>
-
- * cpu.h (EIT_VB): Define macro to access EIT_VB register.
- (EIT_VB_DEFAULT): Define value of EIT_VB register after reset.
- * sim-calls.c (sim_create_inferior): Set EIT_VB to EIT_VB_DEFAULT.
-
-Tue Mar 31 19:00:00 1998 Fred Fish <fnf@cygnus.com>
-
- * d30v-insns (do_dbrai): RPT_S is cia plus pcdisp rather than
- just pcdisp.
-
-Mon Mar 30 20:30:00 1998 Fred Fish <fnf@cygnus.com>
-
- * engine.c (sim_engine_run): Add at_loop_end. Rework end of loop
- code to use this to both reset PSW_RP when needed and to set PC
- to RPT_S for another pass through the loop.
-
-Mon Mar 30 16:12:00 1998 Fred Fish <fnf@cygnus.com>
-
- * engine.c (sim_engine_run): Change code that handles RPT_* regs
- and PSW_RP bit in PSW so that PSW_RP is always set while executing
- the loop and loop terminates upon completion of the pass for which
- RPT_C is zero. More closely follow logic in architecture manual.
-
-Fri Mar 27 16:15:52 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Wed Mar 25 12:35:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Thu Mar 19 00:25:43 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-calls.c (sim_open): Move memory-region commands back to
- before the call to sim_parse_args.
- (d30v_option_handler): Implement extmem-size option using
- memory-delete and memory-region commands.
-
- * sim-calls.c (d30v_option_handler): Use ANSI-C argument list,
- correct number and type of arguments.
-
-Wed Mar 18 12:38:12 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Wed Mar 11 13:56:32 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * alu.h (IMEM, MEM, STORE): Replace sim_core_*_map with exec_map,
- read_map and write_map resp.
-
- * cpu.c (d30v_read_mem, d30v_write_mem): Ditto.
-
-Mon Mar 2 13:34:08 1998 Fred Fish <fnf@cygnus.com>
-
- * d30v-insns (do_repeat): Abort repeat instructions that have
- a repeat count of zero.
-
-Fri Feb 27 18:44:12 1998 Doug Evans <devans@canuck.cygnus.com>
-
- * sim-calls.c (sim_open): Update call to sim_add_option_table.
-
-Thu Feb 26 18:34:31 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-calls.c (sim_info): Delete.
-
-Wed Feb 25 14:44:58 1998 Michael Meissner <meissner@cygnus.com>
-
- * d30v-insns (mvtsys): If moving to EIT_VB register, and with
- valid bits. Optimize code somewhat.
-
- * cpu.h (eit_vector_base_cr): New CR we need to special case.
- (EIT_VALID): Valid bits for EIT_VB register.
-
- * d30v-insns (mv{f,t}sys): When moving to/from PSWH, the value is
- in the low 16 bits of the register.
-
- * d30v-insns (do_sra): Use a common WRITE32_QUEUE to write back
- results.
- (do_sr{a,l}h): Do shift in 32 bits, only truncate when writing
- result back to the registers.
-
-Tue Feb 24 18:09:52 1998 Fred Fish <fnf@cygnus.com>
-
- * Makefile.in (tmp-igen): Use -G gen-zero-r0 option to force
- r0 to always be zero.
- * cpu.h (GPR_SET): Define.
-
-Tue Feb 24 14:12:57 1998 Michael Meissner <meissner@cygnus.com>
-
- * d30v-insns (do_sath): Do saturation in 32 bits, before
- converting to 16.
- (sat{,2h,z,hp}): Use imm_5, not imm to get proper zero extend.
- (do_sath_p): Delete, no longer used.
- (sathp): Call do_sath, not do_sath_p.
-
-Mon Feb 23 15:55:14 1998 Michael Meissner <meissner@cygnus.com>
-
- * d30v-insns (illegal,wrong_slot): Print \n after PC and before we
- call sim_engine_halt.
- (sr{a,l}hp): Implement missing instructions.
- (do_trap): Print high order PSW bits in human readable fashion.
- (do_{dbra{,i},dbsr{,i},djmp{,i},djsr{,i},repeat}): Set PSW bit RP.
-
- * alu.h (PSW_SET_QUEUE): New macro to set PSW bits.
-
- * engine.c (sim_engine_run): Check for RP bit being set, not RPT_C
- being > 0. If RPT_C is decremented to 0, clear PSW RP bit.
-
-Fri Feb 20 10:13:34 1998 Fred Fish <fnf@cygnus.com>
-
- * cpu.h (BASE_ADDRESS): Change from 0xfffff000 to 0xfffff020.
-
-Tue Feb 17 12:39:52 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-calls.c (sim_store_register, sim_fetch_register): Pass in
- length parameter. Return -1.
-
-Fri Feb 6 17:39:54 1998 Michael Meissner <meissner@cygnus.com>
-
- * d30v-insns (do_dbrai): Correct typo, use shift, not comparison.
-
-Sun Feb 1 16:47:51 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Sat Jan 31 18:15:41 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Fri Jan 30 08:29:20 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * engine.c (sim_engine_run): Add parameter nr_cpus.
-
-Fri Jan 30 17:09:37 1998 Michael Meissner <meissner@cygnus.com>
-
- * d30v-insns (jsrtzr): Check for register == 0, not != 0.
-
-Wed Jan 21 17:52:04 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * engine.c (do_stack_swap): Make type of new_sp unsigned.
-
-Mon Jan 19 22:26:29 1998 Doug Evans <devans@seba>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Mon Jan 5 16:04:17 1998 Andrew Cagney <cagney@sanguine.cygnus.com>
-
- * sim-calls.c (sim_info): Call profile_print.
-
- * sim-main.h: Enable instruction profiling.
-
-Thu Dec 18 12:21:38 1997 Michael Meissner <meissner@cygnus.com>
-
- * alu.h (ALU{16,32}_END): Change setting PSW to only set the carry
- and overflow bits. Don't look at the current value of PSW.
- (PSW_FLAG_SET_QUEUE): Only queue up setting the particular bit in
- question. Don't look at the current value of PSW.
-
- * d30v-insns: All instructions that set the PSW, will only queue
- up the particular bits in question that were set by the
- instruction. Don't look at the current value of PSW.
-
-Wed Dec 17 11:41:44 1997 Michael Meissner <meissner@cygnus.com>
-
- * cpu.h (PSW_VALID): Allow EA/DB to be set in the PSW.
- (DPSW_VALID): Like PSW_VALID, but it allows the DS bit to be set.
-
- * engine.c (trace_alu32): When changing BPSW/DPSW, print the
- special PSW bits.
-
- * d30v-insns (do_cmp_cc): Fix cmpps and cmpng.
- (do_cmp{,u}_cc): Print which cc value was used if not in switch
- statement.
- (do_cmpu_cc): Remove illegal cases CMPU{EQ,NE,PS,NG}.
- (mvtsys): When setting BPSW or DPSW, and with DPSW_VALID.
-
-Tue Dec 16 18:17:26 1997 Michael Meissner <meissner@cygnus.com>
-
- * d30v-insns (mulx2h): Add missing instruction. Complain if
- register is not even.
- (do_{add,sub}h_ppp): Get correct high/low values. Also correctly
- handle short immediates.
- (do_ld{2w,4bh}): Don't load r0 if ra == 0.
-
- * engine.c (d30v_interrupt_event): Remove unused variable
- (unqueue_writes): Ditto.
-
-Mon Dec 15 23:17:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
- * config.in: Ditto.
-
-Sat Dec 13 23:40:17 1997 Michael Meissner <meissner@cygnus.com>
-
- * cpu.h (_write{32,64}): New structures for keeping track of
- queued writes to registers.
- (_sim_cpu): Add _write{32,64} structures. Make is_delayed_call
- unsigned32 also.
- (WRITE{32,64}*): New macros for queueing up writes to registers.
-
- * alu.h (ALU16_END): Take field that says whether we are setting
- the high or low half word. Queue up changes to registers.
- (ALU32_END): Queue up changes to registers.
- (PSW_FLAG_SET_QUEUE): Like PSW_FLAG_SET, except queues it up.
-
- * sim-main.h (do_stack_swap): Remove declaration.
-
- * engine.c (do_stack_swap): Make static.
- (unqueue_writes): New function to unqueue all changes to 32 and 64
- bit registers in order. Implement --trace-alu. Reset high water
- marks for # of queued registers. If PSW changed, possibly update
- stack pointer.
- (do_{long,2_short,parallel}): Unqueue register writes at the
- appropriate time.
-
- * d30v-insns: Modify all insns to queue changes to registers,
- rather than do them immediately so that parallel instructions get
- the right values for inputs. Rewrite 16 bit operations to be done
- in terms of masked 32 bit registers. Don't call do_stack_swap any
- more here.
-
-Thu Dec 11 10:06:02 1997 Michael Meissner <meissner@cygnus.com>
-
- * sim-calls.c (d30v_option_handler): Add support for --extmem-size
- to size external memory.
- (sim_open): Ditto. Default if no --extmem-size option is 8 meg.
-
-Wed Dec 10 01:08:24 1997 Jim Blandy <jimb@zwingli.cygnus.com>
-
- * d30v-insns (do_rot2h): Clip rotate amounts to four bits. The
- upper bits, and the sign of the rotation amount, are red herrings.
- (do_sra, do_srl): Handle shifts greater than 32 bits.
- (do_srah, do_sral): Properly sign-extend value and shift amount.
- Handle shifts larger than 16 bits.
-
-Thu Dec 4 09:21:05 1997 Doug Evans <devans@canuck.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Mon Dec 1 15:10:44 1997 Michael Meissner <meissner@cygnus.com>
-
- * d30v-insns (do_sub2h): For short instruction, correctly
- dupplicate lower 16 bits of immediate in upper 16 bits.
- (sat2z): Fix typo that ignored the upper half of the register.
- (do_satz): If < 0, set *ra to 0, if not call do_sat.
- (mvtsys): Before setting PSW, and with PSW_VALID.
-
- * cpu.h (PSW_VALID): Mask for bits in PSW that is valid.
-
-Mon Dec 1 15:05:03 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * d30v-insns (do_trap): Pacify GCC - correct type of %ld arg in
- printf, return dummy at end.
-
-Mon Dec 1 15:05:03 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * d30v-insns (do_add, do_addh_ppp, do_adds): Replace ALU_ADD with
- ALU_ADDC.
- (do_addc): Replace ALU_SET_CARRY / ALU_ADD_CA with ALU_ADDC_C.
- (do_sub, do_subh_ppp): Replace ALU_SUB with ALU_SUBB.
- (do_subb): Replace ALU_SET_CARRY / ALU_SUB_CA with ALU_SUBB_B.
-
- * alu.h (ALU16_END): Use ALU16_HAD_CARRY_BORROW instead of
- ALU16_HAD_CARRY.
- (ALU32_END): Ditto.
-
- * sim-main.h (string.h, strings.h): Include.
-
- * sim-calls.c: Delete inclusion of string.h and strings.h.
-
-Sun Nov 30 17:29:25 1997 Michael Meissner <meissner@cygnus.com>
-
- * configure.in (--enable-sim-trapdump): New switch to control
- whether traps 0..30 dump out the registers or do the real trap.
- * configure: Regenerate.
-
- * Makefile.in (SIM_EXTRA_CLFAGS): Add -DTRAPDUMP={0,1} if
- appropriate --{en,dis}able-sim-trapdump is done.
-
- * sim-calls.c (OPTION_TRACE_CALL): Rename from OPTION_CALL_TRACE.
- (OPTION_TRACE_TRAPDUMP): New option for --trace-trapdump.
- (d30v_option_handler): Add support for --trace-trapdump.
- (d30v_options): Ditto.
- (sim_open): Ditto.
-
- * d30v-insns (do_trap): Do register dump if --trace-trapdump and
- not the system call trap. Remove support for calling old function
- sim_io_syscalls.
-
-Sat Nov 29 18:54:55 1997 Michael Meissner <meissner@cygnus.com>
-
- * cpu.h (_sim_cpu): Add trace_call_p, trace_action fields.
- (TRACE_CALL_P): Non-zero if --trace-call.
- (TRACE_ACTION): Non-zero if there is a tracing action at the end
- of processing an instruction boundary.
- (TRACE_ACTION_{CALL,RETURN}): Bits to say trace call & return.
- (d30v_next_insn): Delete, now trace_action field in cpu state.
-
- * cpu.c (d30v_next_insn): Delete, now trace_action field in cpu
- state.
- (return_occurred): Minimum saved register to check is now 34.
-
- * engine.c (sim_engine_run): Change call tracing to use
- trace_action field in cpu state.
-
- * sim-calls.c (d30v_option_handler): Handle d30v specific options.
- (d30v_options): D30V specific options. Right now, --trace-call.
- (sim_open): Register d30v specific options.
-
- * d30v-insns (call, return insns): Move --trace-debug call/return
- tracing action to d30v specific --trace-call option.
-
-Fri Nov 28 20:12:48 1997 Michael Meissner <meissner@cygnus.com>
-
- * cpu.h (CREG): Rename from CR.
-
- * d30v-insns (do_{addc,subb}): Explicitly import the carry bit.
- (do_trap): Use CREG, not CR. Switch to using cb_syscall.
-
-Thu Nov 27 19:25:43 1997 Michael Meissner <meissner@cygnus.com>
-
- * cpu.h (ACC): Define as short cut to accumulators.
-
- * d30v-insns (do_rot): Delete explicit function, use ROT32 to do
- rotate instruction.
- (do_trap): Make trap 30 print out accumulators and first 16
- control registers as well.
- (do_avg): Sign extend to 64 bit type before doing add/shift.
- (do_avg2h): Sign extend 16 bit chunks before doing add/shift.
-
-Wed Nov 26 15:20:24 1997 Doug Evans <devans@canuck.cygnus.com>
-
- * Makefile.in (NL_TARGET): Define.
-
-Wed Nov 26 16:55:38 1997 Michael Meissner <meissner@cygnus.com>
-
- * cpu.h (d30v_next_insn): New flag for things we are supposed to
- trace between instruction words.
- ({call,return}_occurred): Remove index argument.
- (d30v_{read,write}_mem): Add declarations.
-
- * cpu.c (d30v_next_insn): New flag for things we are supposed to
- trace between instruction words.
- ({call,return}_occurred): Remove index argument.
- (d30v_{read,write}_mem): New functions for reading/writing
- simulated memory in the new common system call support.
-
- * d30v-insns: Set emacs C mode.
- (call/return insns): Set bit to trace call at instruction
- boundary, rather than doing it here.
- (do_trap): Set up to use new common system call interface.
-
- * engine.c (sim_engine_run): If d30v_next_insn is non zero, do
- function call/return tracing.
-
-Mon Nov 24 16:40:49 1997 Michael Meissner <meissner@cygnus.com>
-
- * d30v-insns (bnot): Correctly reset bit in question.
- (do_trap): Use common system call emulation support, rather than
- our home grown support.
-
-Sun Nov 23 22:47:20 1997 Michael Meissner <meissner@cygnus.com>
-
- * d30v-insns (mvfacc): Immediate field is unsigned, allowing
- shifts of up to 63 to be encoded. Also do shift signed, rather
- than unsigned.
-
- * ic-d30v (IMM_6S): Add field for 6 bit unsigned constants.
-
- * d30v-insns (cmpu): Short cmpu zero extends immediate, not sign
- extends.
-
-Sat Nov 22 19:04:34 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * d30v-insns (illegal, wrong_slot): Replace SIGILL with
- SIM_SIGILL.
-
- * sim-calls.c (signal.h): Do not include, replaced by
- sim-signal.h.
-
- * sim-main.h (signal.h): Do not include, include sim-signal.h
- instead.
-
-Fri Nov 21 09:33:54 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * cpu.c (call_occurred): Use ZALLOC instead of xmalloc.
- (return_occurred): Use zfree instead of free.
-
-Wed Nov 19 13:28:09 1997 Michael Meissner <meissner@cygnus.com>
-
- * Makefile.in ({l,s}_{support,semantics}.o): Depend on the include
- files in $(ENGINE_H).
-
- * d30v-insns (do_{add,addc,sub,subb}): ALU_{ADD,SUB}_CA now takes
- a VAL argument to add/subtract along with the carry.
-
-Tue Nov 18 15:33:48 1997 Doug Evans <devans@canuck.cygnus.com>
-
- * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS).
-
-Tue Nov 18 13:56:15 1997 Michael Meissner <meissner@cygnus.com>
-
- * d30v-insns (do_trap): Change to new system call numbers. Add
- read emulation.
-
-Mon Nov 17 14:43:45 1997 Michael Meissner <meissner@cygnus.com>
-
- * d30v-insns (mulx): Add mulx instruction.
-
-Sun Nov 16 19:06:56 1997 Michael Meissner <meissner@cygnus.com>
-
- * cpu.c ({call,return}_occurred): New trace functions to mark
- function calls and returns and check whether all saved registers
- really were saved.
-
- * cpu.h ({call,return}_occurred): Add declaration.
-
- * d30v-insns ({bsr, jsr} patterns): Call call_occurred if
- --trace-debug to trace function calls.
- (jmp register pattern): If this is a jump r62 and --trace-debug,
- call return_occurred to trace function calls.
- (bsr{tnz,tzr}): Move setting r62 inside conditional against reg.
- (do_ld2w): Grab memory in 64-bit chunk, to check alignment.
- (do_st2w): Ditto.
-
-Sat Nov 15 20:57:57 1997 Michael Meissner <meissner@cygnus.com>
-
- * d30v-insns: Undo changes from Nov. 11, allowing for odd register
- pairs, since the machine doesn't support such usage. Trap on odd
- registers, rather than give a warning. Keep do_src and do_trap
- changes.
-
-Fri Nov 14 11:59:29 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * d30v-insns (do_trap): Pacify compiler warnings for printf calls.
-
-Tue Nov 11 18:26:03 1997 Michael Meissner <meissner@cygnus.com>
-
- * d30v-insns (not_r63_reg): Rename from make_even_reg, only check
- for register being r63. Change callers ld2{h,w}, ld4bh{,u}.
- (get_reg_not_r63): Rename from get_even_reg, and only check for
- register r63. Change callers st2{w,h}, st4b.
- (do_src): Correct register pair for shift left.
- (do_trap): Temporarily make trap 30 print out the registers.
-
-Tue Nov 4 08:51:22 1997 Michael Meissner <meissner@cygnus.com>
-
- * d30v-insns (do_trap): Make trap 31 be used for system calls.
- Add primitive write and exit system calls.
-
- * Makefile (FILTER): New make variable to filter out known igen
- warnings.
- (tmp-igen): Add $(FILTER) on all 3 invocations of igen to filter
- out warnings that should be ignored by default.
-
-Fri Oct 31 19:36:51 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-calls.c (sim_open): Change EIT to memory region.
-
-Fri Oct 17 16:51:31 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * alu.h (ALU16_END): Get result from ALU16_OVERFLOW_RESULT.
- (ALU32_END): Get result from ALU32_OVERFLOW_RESULT.
-
-Fri Oct 3 09:28:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Mon Sep 29 15:23:35 1997 Stu Grossman <grossman@babylon-5.cygnus.com>
-
- * d30v-insns (MVFSYS MVTSYS): Fix bit patterns so that these
- instructions get recognised.
-
-Wed Sep 24 17:38:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Wed Sep 24 17:51:43 1997 Stu Grossman <grossman@babylon-5.cygnus.com>
-
- * Makefile.in (SIM_OBJS): Add sim-break.o.
- * (INCLUDE_DEPS): Add tconfig.h.
- * alu.h (MEM STORE): Change to sim_core_read/write_unaligned to
- allow for trapping unaligned accesses.
- * cpu.h: Define SIM_BREAKPOINT as syscall 5 for intrinsic breakpoint
- mechanism.
- * d30v-insn (short syscall): Use syscall 5 for breakpoint insn.
- * sim-calls.c (sim_fetch_register sim_store_register): Implement.
- * tconfig.in: Define SIM_HAVE_BREAKPOINTS to enable intrinsic
- breakpoint mechanism.
-
-Tue Sep 23 11:04:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Tue Sep 23 10:19:51 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * Makefile.in (SIM_WARNINGS, SIM_ALIGNMENT, SIM_ENDIAN,
- SIM_HOSTENDIAN, SIM_RESERVED_BITS): Delete, moved to common.
- (SIM_EXTRA_CFLAGS): Update.
-
-Mon Sep 22 11:46:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure.in: Specify strict alignment.
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Fri Sep 19 17:45:25 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Mon Sep 15 17:36:15 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Fri Sep 12 16:13:04 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-calls.c (sim_open): Change memory to
- internal inst. RAM h'00000000-h'0000ffff (64KB)
- internal data RAM h'20000000-h'20007fff (32KB)
- external RAM h'80000000-h'803fffff (4MB)
- EIT h'fffff000-h'ffffffff
-
-
-Thu Sep 11 08:59:34 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * Makefile.in (SIM_OBJS): Add sim-hrw.o module.
-
- * sim-calls.c (sim_read): Delete. use sim-hrw.
- (sim_write): Delete, use sim-hrw.
-
-
-Tue Sep 9 01:36:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * ic-d30v (imm_5): Update nr args passed to LSMASKED.
-
- * d30v-insns (do_sat, do_sath, do_sath_p, do_satz, do_satzh): Fix,
- computing the max sat value incorrectly.
-
-Thu Sep 4 17:21:23 1997 Doug Evans <dje@seba>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Fri Sep 5 09:15:33 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * d30v-insns (do_mac, do_macs, do_msub, do_mulxs): Use explicit
- type cast instead of SIGNED64 macro.
-
-Thu Sep 4 10:28:45 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * Makefile.in (SIM_OBJS): Include sim-memopt.o module.
-
- * sim-calls.c (sim_open): Pass zero modulo arg to sim_core_attach
- calls.
- (sim_open): If no memory, use memory commands to establish d30v
- ram.
- (d30v_option_handler): Delete, replased by sim-memopt.c.
- (sim_create_inferior): Call sim_module_init.
-
- * sim-main.h (struct sim_state): Remove members eit_ram,
- sizeof_eit_ram, external_ram, baseof_external_ram,
- sizeof_external_ram. Using generic memory model instead.
-
-Mon Sep 1 11:04:09 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-calls.c (sim_open): Use sim_state_alloc.
-
-Sat Aug 30 10:01:51 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-main.h (INVALID_INSTRUCTION_ADDRESS): Define.
-
- * engine.c (do_2_short): Compare with INVALID_INSTRUCTION_ADDRESS
- not -1.
-
-Wed Aug 27 18:13:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
- * config.in: Ditto.
-
-Wed Aug 27 13:41:54 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-calls.c (sim_open): Add call to sim_analyze_program, update
- call to sim_config.
-
- * sim-calls.c (sim_create_inferior): Add ABFD argument.
- Initialize CPU registers including PC.
- (sim_load): Delete, using sim-hload.
-
- * Makefile.in (SIM_OBJS): Add sim-hload.o module.
-
-Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
- * config.in: Ditto.
-
-Mon Aug 25 15:41:44 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-calls.c (sim_open): Add ABFD argument.
- (sim_open): Move sim_config call to after sim_parse_args.
- (sim_open): Check sim_config return status.
-
-Fri Aug 22 16:38:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * d30v-insns (do_subh_ppp): Correct name, was do_sub_ppp.
- (do_subh_ppp): Compute rc=rb-src instead of src-rb.
- (do_addh_ppp): Ditto.
-
-Fri Jun 27 14:43:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * d30v-insns (mvfsys, mvtsys): Switch instruction encodings, was
- wrong. Update handling of PSW[DS] bit.
- (dbt): Fix debug trap address.
-
- * cpu.h (NR_CONTROL_REGISTERS): Allow the full 64 registers.
-
-Tue Jun 24 12:41:55 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * d30v-insns (DBT, RTD): Swap the stack after updating the PSW.
- (DBT): Use PSW_SET to update PSW.
-
- * alu.h (ALU16_END): Check for 16 bit carry and not 32 bit.
-
-Tue Jun 24 12:16:14 1997 Andrew Cagney <cagney@b2.cygnus.com>
-
- * d30v-insns (ppp, ccc, pp, XX, p): Update format functions so
- that they are of class %s instead of class function.
-
-Tue Jun 10 12:26:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-main.h (engine_error, engine_restart, engine_halt,
- engine_run_until_stop): Delete prototypes. Functions deleted
- earlier.
- (do_interrupt_handler): Add prototype.
- (sim_state): Add pending_event member to struct.
-
- * sim-calls.c (sim_open): Configure interrupt handler.
- * engine.c (d30v_interrupt_event): New function. Deliver external
- interrupt to processor.
-
- * d30v-insns (do_stack_swap): Move function from here.
- * engine.c (do_stack_swap): To here.
- * sim-main.h (do_stack_swap): Add prototype.
-
- * cpu.h (registers): Change current_sp to an int.
- * d30v-insn (do_stack_swap): Update.
-
-Thu Jun 5 12:54:35 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * d30v-insns (LD*, ST*): Disasemble XX == 0 as immed version of
- instruction.
- (str_XXX): Fix case of XX == 3 - return "-".
-
-Thu Jun 5 12:54:35 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * engine.c (sim_engine_run): Issuing L->R and R->L instructions in
- wrong order.
-
- * d30v-insn (CMPUcc imm long): With of RB field should be 6 not
- three.
- (MUL, MUL2H, MULHX): X field 01 instead of 10.
-
-Thu Jun 5 12:54:35 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * d30v-insns (mvtsys): Don't modify DS bit when writing to PSW.
- (dbt, rtd): New instructions.
-
- * cpu.h (NR_CONTROL_REGISTERS): Now 15.
- (debug_program_status_word_cr, debug_program_counter_cr): Add
- debug control registers. Renumber other control registers.
- (PSW_DS): New PSW bit.
- (DPC, DPSW): Define.
-
-Wed May 28 13:45:47 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * engine.c (sim_engine_run): Check the event queue on every cycle.
-
- * sim-calls.c (sim_size): Delete.
- (sim_do_command): Call sim_args_command.
- (sim_open): Move eit_ram and sizeof_eit_ram to sim_state struct.
- (simulation): Delete global now depend on sd argument.
- (sim_open): Initialize sim-watch.
- (d30v_option_handler): New function, parse mem-size argument.
-
-Tue May 27 14:03:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-calls.c (sim_set_callbacks): Delete.
- (sim_write): Pass NULL cpu arg to sim_core_write_buffer.
-
- * engine.c (engine_init): Delete. Handled in sim_open.
- (engine_create): Ditto.
-
-Tue May 20 10:15:35 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-calls.c (sim_open): Add callback argument.
- (sim_set_callbacks): Delete SIM_DESC argument.
-
-Mon May 19 14:59:32 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-calls.c (sim_open): Set the sim.base magic number.
-
-Fri May 16 15:25:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * d30v-insns: Replace engine_error with common sim_engine_abort.
- * cpu.c (is_condition_ok, is_wrong_slot): Ditto.
-
- * engine.c (engine_run_until_stop): Rename this.
- (sim_engine_run): To this. Simplify - most moved to common.
-
- * sim-calls.c (sim_stop_reason, sim_resume, sim_stop):
- Delete. Replaced by common code.
-
- * engine.c (engine_error, engine_restart, engine_halt): Ditto.
-
- * sim-main.h (SIM_ENGINE_RESTART_HOOK, SIM_ENGINE_HALT_HOOK):
- Define as NOPs.
-
-Mon May 5 23:05:41 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * alu.h (IMEM, MEM, STORE): Update to reflect changes to core in
- ../common.
- * sim-calls.c (sim_open): Ditto.
-
- * alu.h, cpu.h, cpu.c, d30v-insn, dc-short: Clean up copyright
- notice.
-
-Fri May 2 12:01:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-calls.c (sim-options.h, sim-utils.h): Include.
- * Makefile.in (sim-calls.o): Add dependencies.
-
- * d30v-insns (address_word): Remove cia argument from support
- functions, igen now does this automatically.
-
- * Makefile.in (tmp-igen): Include line number information in
- generated files.
-
- * sim-main.h (SIM_DESC): Remove sim_events and sim_core, moved to
- simulator base type sim_state_base.
- (sim-core.h, sim-events.h, sim-io.h): Replace with #include
- "sim-base.h".
-
- * sim-main.h (sim_state): Track recomendations in common
- directory.
- * cpu.h (sim_cpu): Ditto.
- * engine.c (do_2_short, do_parallel): Ditto.
- * cpu.h (GPR): Ditto.
- * alu.h (MEM, IMEM, STORE): Ditto.
- * cpu.c (is_wrong_slot): Ditto.
- * ic-d30v (Aa, Ab): Ditto.
-
-Thu Apr 24 00:39:51 1997 Doug Evans <dje@canuck.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
- * Makefile.in (SIM_OBJS): Add sim-module.o, sim-profile.o.
- * sim-calls.c (sim_open): Call sim_module_uninstall if argument
- parsing fails. Call sim_post_argv_init.
- (sim_close): Call sim_module_uninstall.
-
-Fri Apr 18 13:44:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-calls.c (sim_stop): New function.
-
-Thu Apr 17 02:57:55 1997 Doug Evans <dje@canuck.cygnus.com>
-
- * Makefile.in (SIM_OBJS): Add sim-load.o, sim-options.o, sim-trace.o.
- (SIM_EXTRA_{LIBS,LIBDEPS,ALL,INSTALL}): Delete.
- (SIM_RUN_OBJS): Change from run.o to nrun.o.
- * cpu.h (sim_cpu): New member base. Delete members trace, sd.
- (cpu_traces): Delete.
- * engine.c (engine_init): Set backlink from cpu to state.
- * sim-calls.c: #include bfd.h.
- (sim_open): Set STATE_OPEN_KIND. Call sim_pre_argv_init,
- sim_parse_args.
- (sim_load): Return SIM_RC. New arg abfd.
- Call sim_load_file to load file into simulator.
- (sim_create_inferior): Return SIM_RC. Delete arg start_address.
- (sim_trace): Delete.
- * sim-main.h (struct sim_state): sim_state_base is typedef now.
- (STATE_CPU): Define.
-
-Mon Apr 7 15:45:02 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
- * config.in: Ditto.
-
-Wed Apr 2 15:06:28 1997 Doug Evans <dje@canuck.cygnus.com>
-
- * Makefile.in (SIM_EXTRA_DEPS): Define.
- (SIM_OBJS): Add sim-utils.o.
- (SIM_GEN): Delete tmp-common.
- (SIM_EXTRA_CLEAN): Delete clean-common.
- (BUILT_SRC_FROM_COMMON): Moved to ../common/Make-common.in.
- (tmp-common,clean-common): Delete.
- (ENGINE_H): sim-state.h renamed to sim-main.h.
- (clean-igen): Delete tmp-insns.
-
- * cpu.c: sim-state.h renamed to sim-main.h.
- * engine.c: Likewise.
- * sim-calls.c: Likewise.
- (zalloc,zfree): Moved to ../common/sim-utils.c.
- * sim-main.h: Renamed from sim-state.h.
-
- * sim-calls.c (sim_open): New arg `kind'.
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Wed Apr 2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Wed Apr 2 11:13:15 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
-
- * Makefile.in (SIM_OBJS): Link in the recently added sim-config.o
-
- * engine.c (current_target_byte_order, current_host_byte_order,
- current_environment, current_alignment, current_floating_point,
- current_model_issue, current_stdio): Delete, moved to
- ../common/sim-config.c
-
-Mon Mar 24 14:50:30 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
-
- * d30v-insns (do_ldw): Load 4 bytes not 2.
- (do_incr, LD*, ST*): Increment register not its value.
-
-Mon Mar 24 09:59:53 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
-
- * cpu.c (is_wrong_slot): Ditto.
- (is_condition_ok): Ditto.
-
- * sim-calls.c (sim_trace): Ditto.
-
- * engine.c (engine_init): Ditto.
- (do_2_short): Ditto.
- (engine_run_until_stop): Ditto.
-
- * d30v-insns (void): Update. For functions, remove `SIM_DESC sd'
- and `cpu *processor' arguments as igen now handles this.
-
- * cpu.h: Rename struct _cpu to struct _sim_cpu. Rename variable
- processor to cpu.
-
- * sim-state.h: Update.
-
-Fri Mar 21 12:52:12 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
-
- * d30v-insns (do_sat): Correct calculation of saturate lower
- bound.
- (do_sath): Ditto.
- (do_satzh, do_satz): Arguments should be signed.
-
- * sim-calls.c (zalloc): Use malloc() instead of xmalloc() for
- moment.
- (filter_filename): Drop.
-
- * cpu.h (is_wrong_slot): Correct declaration name - was
- is_valid_slot.
-
- * engine.c (do_parallel): Plicate GCC.
- (engine_error): Ditto.
- (engine_run_until_stop): Ditto.
- * cpu.c (is_wrong_slot): Ditto.
- (is_condition_ok): Ditto.
- * sim-calls.c (sim_size): Ditto.
- (sim_read): Ditto.
- (sim_trace): Ditto.
-
- * engine.h, engine.c (engine_create): Add missing prototype to
- header file. Clean up missing variables.
-
- * configure.in (unistd.h, string.h, strings.h): Configure in.
- * configure, config.in: Rebuild.
-
-Thu Mar 20 19:40:20 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
-
- * d30v-insns (void): Provide a second emul instruction using a
- branch prefix.
-
-Tue Mar 18 20:51:42 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
-
- * d30v-insn (do_sat*): Pass all necessary args.
-
-Tue Mar 18 18:49:10 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
-
- * d30v-insns (SAT*): Issue warning when bit overflow.
- (EMUL): Exit with GPR[2] not 2.
-
-Tue Mar 18 14:24:09 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
-
- * sim-state.h: New file rename engine.h.
- (sim_state): Rename engine strut to sim_state, rename events and
- core members.
-
- * engine.c: Update.
- * cpu.h, cpu.c: Ditto.
- * alu.h: Ditto.
- * d30v-insns: Ditto.
- * sim-calls.c: Ditto.
-
- * Makefile.in (sim-*.c): Moved to ../common.
-
-Tue Mar 18 10:39:07 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
-
- * d30v-insns (do_mac): Adding wrong register.
- (do_macs): Ditto.
- (do_msub): Ditto.
- (do_msubs): Ditto.
-
- * ic-d30v: Put back definitions of RaH, RaL, et.al.
- (do_sra2h, do_srah): Use.
- (do_srl2h, do_srlh): Use.
-
- * d30v-insns (SAT, SAT2H, SATp, SATZ): Implement saturate.
-
-Tue Mar 18 03:01:25 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
-
- * d30v-insns: Specify wild insted of reserved bits.
- (void):
-
-Mon Mar 17 15:10:07 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
-
- * configure: Re-generate.
-
-Mon Mar 17 14:35:37 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
-
- * Makefile.in (SIM_EXTRA_CFLAGS), configure.in: Include SIM_*
- options. Allow RESERVED_BITS to be configured.
- * configure: Re-generate.
-
- * Makefile.in (sim-*.h): Drop, not needed.
- (sim-*.c): Make each explicit so that they automatically update.
-
-Sat Mar 15 02:34:30 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
-
- * ic-d30v (imm long): Incorrect calculation.
-
- * d30v-insns (EMUL): Finish exit, write-string emul-call.
-
- * sim-calls.c (sim_trace): Have sim-trace enable basic instruction
- tracing.
-
-Sat Mar 15 02:10:31 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
-
- * configure.in: Enable common options - endian, inline and
- warnings.
- * configure: Regenerate.
-
-Fri Mar 14 16:11:50 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
-
- * Makefile.in (cpu.o): Update dependencies.
- * cpu.c (is_condition_ok): Update PSW bit manipulations.
-
-Fri Mar 14 12:49:20 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
-
- * configure.in: Autoconfig m4
- * configure: Regenerate.
-
- * Makefile.in: Use m4 to preprocess d30v-insns.
- * d30v-insn: Adjust.
-
-Thu Mar 13 12:44:54 1997 Doug Evans <dje@canuck.cygnus.com>
-
- * sim-calls.c (sim_open): New SIM_DESC result. Argument is now
- in argv form.
- (other sim_*): New SIM_DESC argument.
-
-Wed Mar 12 19:05:45 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
-
- * sim-calls.c (sim_open): Create all the d30v RAM blocks.
-
- * engine.c (engine_run_until_stop): Handle delayed subroutine
- call.
- * d30v-insn: Ditto.
-
- * ic-d30v: For Rb and Rc always return the value and not the
- equation.
- * d30v-insn: Use.
-
- * ic-d30v (val_Ra): Returns 0 or RA.
- * d30v-insn: Use.
-
- * d30v-insn (make_even_reg, get_even_reg): New functions. Force
- the register index to be even, issusing a warning if it was not.
- (LD*, ST*): Use.
-
-Wed Mar 12 14:57:26 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
-
- * d30v-insns (do_trap): Implement TRAP instruction.
-
- * alu.h (PSW_F, PSW_FLAG_VAL, PSW_FLAG_SET): New macro, map flag
- onto PSW bit.
- * ic-d30v: Drop F* expressions.
- * d30v-insn: Use more explicit PSW_FLAG_ ops.
- * cpu.h (PSW_*): Redo PSW bit values.
- * alu.h (ALU*_END): Update. Fix setting of overflow - logic was
- backwards.
-
- * d30v-insn (MVFSYS, MVTSYS): Implement.
- * cpu.h (PSWH, PSWL): New macros for high, low word of PSW.
-
-Wed Mar 12 14:12:11 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
-
- * cpu.h (RPT_IS_CALL): New macro for processor field
- is_delayed_call. That in turn used as a flag to indicate if a
- delayed branch or delayed call is to occure.
- * d30v-insns (do_dbra): Set/clear RPT_IS_CALL;
- (do_dbrai): Ditto.
- (do_dbsr): Ditto.
- (do_dbsr): Ditto.
- (do_djmp): Ditto.
- (do_djmpi): Dotto.
- (do_djsr): Ditto.
- (do_djsri): Ditto.
- (void):
-
- * d30v-insn (do_incr): Finish - handle modulo registers.
-
- * d30v-insns (CMPU): Include all possible compare
- operations. Issue a warning where op defined by the processor
- spec.
-
-Wed Mar 12 13:55:55 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
-
- * d30v-insns: Add a new instruction class _EMUL and a new
- instruction EMUL that emulates a few basic IO operations.
-
- * Makefile.in (tmp-igen): Filter in emul instructions.
-
-Fri Mar 7 20:32:13 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
-
- * d30v-insns (void): Fill in the gaps.
-
-Wed Feb 26 09:31:10 1997 Andrew Cagney <cagney@kremvax.tpgi.com.au>
-
- * Makefile.in (tmp-igen): Include ic-d30v in dependencies.
-
- * ic-d30v (cache): Update to use H_word, L_word added to
- sim-endian.h.
-
-Tue Feb 25 15:26:51 1997 Andrew Cagney <cagney@kremvax.tpgi.com.au>
-
- * Makefile.in (tmp-igen): Correctly run $(MAKE).
-
-Thu Feb 20 20:30:31 1997 Andrew Cagney <cagney@critters.cygnus.com>
-
- * Makefile.in (FROM_IGEN, FROM_COMMON): Make the igen generated
- files dependant on tmp-igen. Define ENGINE_H.
-
-Sun Feb 16 16:42:48 1997 Andrew Cagney <cagney@critters.cygnus.com>
-
- * configure.in: New file - follow Doug Evans instructions.
- * Makefile.in: Ditto.
-
diff --git a/sim/d30v/Makefile.in b/sim/d30v/Makefile.in
deleted file mode 100644
index d563be83d6d..00000000000
--- a/sim/d30v/Makefile.in
+++ /dev/null
@@ -1,217 +0,0 @@
-# Mitsubishi Electric Corp. D30V Simulator.
-# Copyright (C) 1997, Free Software Foundation, Inc.
-# Contributed by Cygnus Support.
-#
-# This file is part of GDB, the GNU debugger.
-#
-# This program is free software; you can redistribute it and/or modify
-# it under the terms of the GNU General Public License as published by
-# the Free Software Foundation; either version 2, or (at your option)
-# any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License along
-# with this program; if not, write to the Free Software Foundation, Inc.,
-# 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
-
-M4= @M4@
-
-
-## COMMON_PRE_CONFIG_FRAG
-
-# These variables are given default values in COMMON_PRE_CONFIG_FRAG.
-# We override the ones we need to here.
-# Not all of these need to be mentioned, only the necessary ones.
-
-# List of object files, less common parts.
-SIM_OBJS = \
- $(SIM_NEW_COMMON_OBJS) \
- engine.o cpu.o \
- s_support.o l_support.o \
- s_idecode.o l_idecode.o \
- s_semantics.o l_semantics.o \
- sim-calls.o itable.o \
- sim-hload.o \
- sim-hrw.o \
- sim-engine.o \
- sim-stop.o \
- sim-reason.o \
- sim-resume.o
-
-# List of extra dependencies.
-# Generally this consists of simulator specific files included by sim-main.h.
-SIM_EXTRA_DEPS = itable.h s_idecode.h l_idecode.h cpu.h alu.h
-
-# List of generators
-SIM_GEN=tmp-igen
-
-# List of extra flags to always pass to $(CC).
-SIM_EXTRA_CFLAGS = @sim_trapdump@
-
-# List of main object files for `run'.
-SIM_RUN_OBJS = nrun.o
-
-# Dependency of `clean' to clean any extra files.
-SIM_EXTRA_CLEAN = clean-igen
-
-# This selects the d30v newlib/libgloss syscall definitions.
-NL_TARGET=-DNL_TARGET_d30v
-
-## COMMON_POST_CONFIG_FRAG
-
-MAIN_INCLUDE_DEPS = tconfig.h
-INCLUDE_DEPS = $(MAIN_INCLUDE_DEPS) $(SIM_EXTRA_DEPS)
-
-# Rules need to build $(SIM_OBJS), plus whatever else the target wants.
-
-# ... target specific rules ...
-
-# Filter to eliminate known warnings
-FILTER = 2>&1 | egrep -v "Discarding instruction|instruction field of type \`compute\' changed to \`cache\'|Instruction format is not 64 bits wide"
-
-BUILT_SRC_FROM_IGEN = \
- s_icache.h \
- s_icache.c \
- s_idecode.h \
- s_idecode.c \
- s_semantics.h \
- s_semantics.c \
- s_model.h \
- s_model.c \
- s_support.h \
- s_support.c \
- l_icache.h \
- l_icache.c \
- l_idecode.h \
- l_idecode.c \
- l_semantics.h \
- l_semantics.c \
- l_model.h \
- l_model.c \
- l_support.h \
- l_support.c \
- itable.h itable.c
-$(BUILT_SRC_FROM_IGEN): tmp-igen
-#
-
-.PHONY: clean-igen
-clean-igen:
- rm -f $(BUILT_SRC_FROM_IGEN)
- rm -f tmp-igen tmp-insns
-
-../igen/igen:
- cd ../igen && $(MAKE)
-
-tmp-igen: $(srcdir)/dc-short $(srcdir)/d30v-insns $(srcdir)/ic-d30v ../igen/igen
- cd ../igen && $(MAKE)
- echo "# 1 \"$(srcdir)/d30v-insns\"" > tmp-insns
- $(M4) < $(srcdir)/d30v-insns >> tmp-insns
- @echo "Generating short version ..."
- ../igen/igen \
- -G gen-zero-r0 \
- -G direct-access \
- -G default-nia-minus-one \
- -G conditional-issue \
- -G verify-slot \
- -G field-widths \
- -F short,emul \
- -B 32 \
- -P "s_" \
- -o $(srcdir)/dc-short \
- -k $(srcdir)/ic-d30v \
- -n $(srcdir)/d30v-insns -i tmp-insns \
- -n s_icache.h -hc tmp-icache.h \
- -n s_icache.c -c tmp-icache.c \
- -n s_semantics.h -hs tmp-semantics.h \
- -n s_semantics.c -s tmp-semantics.c \
- -n s_idecode.h -hd tmp-idecode.h \
- -n s_idecode.c -d tmp-idecode.c \
- -n s_model.h -hm tmp-model.h \
- -n s_model.c -m tmp-model.c \
- -n s_support.h -hf tmp-support.h \
- -n s_support.c -f tmp-support.c $(FILTER)
- $(srcdir)/../../move-if-change tmp-icache.h s_icache.h
- $(srcdir)/../../move-if-change tmp-icache.c s_icache.c
- $(srcdir)/../../move-if-change tmp-idecode.h s_idecode.h
- $(srcdir)/../../move-if-change tmp-idecode.c s_idecode.c
- $(srcdir)/../../move-if-change tmp-semantics.h s_semantics.h
- $(srcdir)/../../move-if-change tmp-semantics.c s_semantics.c
- $(srcdir)/../../move-if-change tmp-model.h s_model.h
- $(srcdir)/../../move-if-change tmp-model.c s_model.c
- $(srcdir)/../../move-if-change tmp-support.h s_support.h
- $(srcdir)/../../move-if-change tmp-support.c s_support.c
- @echo "Generating long version ..."
- ../igen/igen \
- -G gen-zero-r0 \
- -G direct-access \
- -G default-nia-minus-one \
- -G conditional-issue \
- -G field-widths \
- -F long,emul \
- -B 64 \
- -P "l_" \
- -o $(srcdir)/dc-short \
- -k $(srcdir)/ic-d30v \
- -i tmp-insns \
- -n l_icache.h -hc tmp-icache.h \
- -n l_icache.c -c tmp-icache.c \
- -n l_semantics.h -hs tmp-semantics.h \
- -n l_semantics.c -s tmp-semantics.c \
- -n l_idecode.h -hd tmp-idecode.h \
- -n l_idecode.c -d tmp-idecode.c \
- -n l_model.h -hm tmp-model.h \
- -n l_model.c -m tmp-model.c \
- -n l_support.h -hf tmp-support.h \
- -n l_support.c -f tmp-support.c $(FILTER)
- $(srcdir)/../../move-if-change tmp-icache.h l_icache.h
- $(srcdir)/../../move-if-change tmp-icache.c l_icache.c
- $(srcdir)/../../move-if-change tmp-idecode.h l_idecode.h
- $(srcdir)/../../move-if-change tmp-idecode.c l_idecode.c
- $(srcdir)/../../move-if-change tmp-semantics.h l_semantics.h
- $(srcdir)/../../move-if-change tmp-semantics.c l_semantics.c
- $(srcdir)/../../move-if-change tmp-model.h l_model.h
- $(srcdir)/../../move-if-change tmp-model.c l_model.c
- $(srcdir)/../../move-if-change tmp-support.h l_support.h
- $(srcdir)/../../move-if-change tmp-support.c l_support.c
- @echo "Generating instruction database ..."
- ../igen/igen \
- -G field-widths \
- -F short,long,emul \
- -B 64 \
- -o $(srcdir)/dc-short \
- -k $(srcdir)/ic-d30v \
- -i tmp-insns \
- -n itable.h -ht tmp-itable.h \
- -n itable.c -t tmp-itable.c $(FILTER)
- $(srcdir)/../../move-if-change tmp-itable.h itable.h
- $(srcdir)/../../move-if-change tmp-itable.c itable.c
- touch tmp-igen
-
-ENGINE_H = \
- sim-main.h \
- $(srcdir)/../common/sim-basics.h \
- config.h \
- $(srcdir)/../common/sim-config.h \
- $(srcdir)/../common/sim-inline.h \
- $(srcdir)/../common/sim-types.h \
- $(srcdir)/../common/sim-bits.h \
- $(srcdir)/../common/sim-endian.h \
- itable.h \
- l_idecode.h s_idecode.h \
- cpu.h \
- alu.h \
- $(srcdir)/../common/sim-alu.h \
- $(srcdir)/../common/sim-core.h \
- $(srcdir)/../common/sim-events.h \
-
-engine.o: engine.c $(ENGINE_H)
-sim-calls.o: sim-calls.c $(ENGINE_H) $(srcdir)/../common/sim-utils.h $(srcdir)/../common/sim-options.h
-cpu.o: cpu.c $(ENGINE_H)
-s_support.o: s_support.c $(ENGINE_H)
-l_support.o: l_support.c $(ENGINE_H)
-s_semantics.o: s_semantics.c $(ENGINE_H)
-l_semantics.o: l_semantics.c $(ENGINE_H)
diff --git a/sim/d30v/acconfig.h b/sim/d30v/acconfig.h
deleted file mode 100644
index f9b87a10c60..00000000000
--- a/sim/d30v/acconfig.h
+++ /dev/null
@@ -1,15 +0,0 @@
-
-/* Define to 1 if NLS is requested. */
-#undef ENABLE_NLS
-
-/* Define as 1 if you have catgets and don't want to use GNU gettext. */
-#undef HAVE_CATGETS
-
-/* Define as 1 if you have gettext and don't want to use GNU gettext. */
-#undef HAVE_GETTEXT
-
-/* Define as 1 if you have the stpcpy function. */
-#undef HAVE_STPCPY
-
-/* Define if your locale.h file contains LC_MESSAGES. */
-#undef HAVE_LC_MESSAGES
diff --git a/sim/d30v/alu.h b/sim/d30v/alu.h
deleted file mode 100644
index d39ee3f31a0..00000000000
--- a/sim/d30v/alu.h
+++ /dev/null
@@ -1,106 +0,0 @@
-/* Mitsubishi Electric Corp. D30V Simulator.
- Copyright (C) 1997, Free Software Foundation, Inc.
- Contributed by Cygnus Support.
-
-This file is part of GDB, the GNU debugger.
-
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License along
-with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
-
-
-#ifndef _D30V_ALU_H_
-#define _D30V_ALU_H_
-
-#define ALU_CARRY (PSW_VAL(PSW_C) != 0)
-
-#include "sim-alu.h"
-
-#define ALU16_END(TARG, HIGH) \
-{ \
- unsigned32 mask, value; \
- if (ALU16_HAD_OVERFLOW) { \
- mask = BIT32 (PSW_V) | BIT32 (PSW_VA) | BIT32 (PSW_C); \
- value = BIT32 (PSW_V) | BIT32 (PSW_VA); \
- } \
- else { \
- mask = BIT32 (PSW_V) | BIT32 (PSW_C); \
- value = 0; \
- } \
- if (ALU16_HAD_CARRY_BORROW) \
- value |= BIT32 (PSW_C); \
- if (HIGH) \
- WRITE32_QUEUE_MASK (TARG, ALU16_OVERFLOW_RESULT<<16, 0xffff0000); \
- else \
- WRITE32_QUEUE_MASK (TARG, ALU16_OVERFLOW_RESULT, 0x0000ffff); \
- WRITE32_QUEUE_MASK (&PSW, value, mask); \
-}
-
-#define ALU32_END(TARG) \
-{ \
- unsigned32 mask, value; \
- if (ALU32_HAD_OVERFLOW) { \
- mask = BIT32 (PSW_V) | BIT32 (PSW_VA) | BIT32 (PSW_C); \
- value = BIT32 (PSW_V) | BIT32 (PSW_VA); \
- } \
- else { \
- mask = BIT32 (PSW_V) | BIT32 (PSW_C); \
- value = 0; \
- } \
- if (ALU32_HAD_CARRY_BORROW) \
- value |= BIT32 (PSW_C); \
- WRITE32_QUEUE (TARG, ALU32_OVERFLOW_RESULT); \
- WRITE32_QUEUE_MASK (&PSW, value, mask); \
-}
-
-#define ALU_END(TARG) ALU32_END(TARG)
-
-
-/* PSW & Flag manipulation */
-
-#define PSW_SET(BIT,VAL) BLIT32(PSW, (BIT), (VAL))
-#define PSW_VAL(BIT) EXTRACTED32(PSW, (BIT), (BIT))
-
-#define PSW_F(FLAG) (17 + ((FLAG) % 8) * 2)
-#define PSW_FLAG_SET(FLAG,VAL) PSW_SET(PSW_F(FLAG), VAL)
-#define PSW_FLAG_VAL(FLAG) PSW_VAL(PSW_F(FLAG))
-
-#define PSW_SET_QUEUE(BIT,VAL) \
-do { \
- unsigned32 mask = BIT32 (BIT); \
- unsigned32 bitval = (VAL) ? mask : 0; \
- WRITE32_QUEUE_MASK (&PSW, bitval, mask); \
-} while (0)
-
-#define PSW_FLAG_SET_QUEUE(FLAG,VAL) \
-do { \
- unsigned32 mask = BIT32 (PSW_F (FLAG)); \
- unsigned32 bitval = (VAL) ? mask : 0; \
- WRITE32_QUEUE_MASK (&PSW, bitval, mask); \
-} while (0)
-
-/* Bring data in from the cold */
-
-#define IMEM(EA) \
-(sim_core_read_8(STATE_CPU (sd, 0), cia, exec_map, (EA)))
-
-#define MEM(SIGN, EA, NR_BYTES) \
-((SIGN##_##NR_BYTES) sim_core_read_unaligned_##NR_BYTES(STATE_CPU (sd, 0), cia, read_map, (EA)))
-
-#define STORE(EA, NR_BYTES, VAL) \
-do { \
- sim_core_write_unaligned_##NR_BYTES(STATE_CPU (sd, 0), cia, write_map, (EA), (VAL)); \
-} while (0)
-
-
-#endif
diff --git a/sim/d30v/config.in b/sim/d30v/config.in
deleted file mode 100644
index 9723b8662c9..00000000000
--- a/sim/d30v/config.in
+++ /dev/null
@@ -1,162 +0,0 @@
-/* config.in. Generated automatically from configure.in by autoheader. */
-
-/* Define if using alloca.c. */
-#undef C_ALLOCA
-
-/* Define to empty if the keyword does not work. */
-#undef const
-
-/* Define to one of _getb67, GETB67, getb67 for Cray-2 and Cray-YMP systems.
- This function is required for alloca.c support on those systems. */
-#undef CRAY_STACKSEG_END
-
-/* Define if you have alloca, as a function or macro. */
-#undef HAVE_ALLOCA
-
-/* Define if you have <alloca.h> and it should be used (not on Ultrix). */
-#undef HAVE_ALLOCA_H
-
-/* Define if you have a working `mmap' system call. */
-#undef HAVE_MMAP
-
-/* Define as __inline if that's what the C compiler calls it. */
-#undef inline
-
-/* Define to `long' if <sys/types.h> doesn't define. */
-#undef off_t
-
-/* Define if you need to in order for stat and other things to work. */
-#undef _POSIX_SOURCE
-
-/* Define as the return type of signal handlers (int or void). */
-#undef RETSIGTYPE
-
-/* Define to `unsigned' if <sys/types.h> doesn't define. */
-#undef size_t
-
-/* If using the C implementation of alloca, define if you know the
- direction of stack growth for your system; otherwise it will be
- automatically deduced at run-time.
- STACK_DIRECTION > 0 => grows toward higher addresses
- STACK_DIRECTION < 0 => grows toward lower addresses
- STACK_DIRECTION = 0 => direction of growth unknown
- */
-#undef STACK_DIRECTION
-
-/* Define if you have the ANSI C header files. */
-#undef STDC_HEADERS
-
-/* Define if your processor stores words with the most significant
- byte first (like Motorola and SPARC, unlike Intel and VAX). */
-#undef WORDS_BIGENDIAN
-
-/* Define to 1 if NLS is requested. */
-#undef ENABLE_NLS
-
-/* Define as 1 if you have gettext and don't want to use GNU gettext. */
-#undef HAVE_GETTEXT
-
-/* Define as 1 if you have the stpcpy function. */
-#undef HAVE_STPCPY
-
-/* Define if your locale.h file contains LC_MESSAGES. */
-#undef HAVE_LC_MESSAGES
-
-/* Define if you have the __argz_count function. */
-#undef HAVE___ARGZ_COUNT
-
-/* Define if you have the __argz_next function. */
-#undef HAVE___ARGZ_NEXT
-
-/* Define if you have the __argz_stringify function. */
-#undef HAVE___ARGZ_STRINGIFY
-
-/* Define if you have the __setfpucw function. */
-#undef HAVE___SETFPUCW
-
-/* Define if you have the dcgettext function. */
-#undef HAVE_DCGETTEXT
-
-/* Define if you have the getcwd function. */
-#undef HAVE_GETCWD
-
-/* Define if you have the getpagesize function. */
-#undef HAVE_GETPAGESIZE
-
-/* Define if you have the getrusage function. */
-#undef HAVE_GETRUSAGE
-
-/* Define if you have the munmap function. */
-#undef HAVE_MUNMAP
-
-/* Define if you have the putenv function. */
-#undef HAVE_PUTENV
-
-/* Define if you have the setenv function. */
-#undef HAVE_SETENV
-
-/* Define if you have the setlocale function. */
-#undef HAVE_SETLOCALE
-
-/* Define if you have the sigaction function. */
-#undef HAVE_SIGACTION
-
-/* Define if you have the stpcpy function. */
-#undef HAVE_STPCPY
-
-/* Define if you have the strcasecmp function. */
-#undef HAVE_STRCASECMP
-
-/* Define if you have the strchr function. */
-#undef HAVE_STRCHR
-
-/* Define if you have the time function. */
-#undef HAVE_TIME
-
-/* Define if you have the <argz.h> header file. */
-#undef HAVE_ARGZ_H
-
-/* Define if you have the <fcntl.h> header file. */
-#undef HAVE_FCNTL_H
-
-/* Define if you have the <fpu_control.h> header file. */
-#undef HAVE_FPU_CONTROL_H
-
-/* Define if you have the <limits.h> header file. */
-#undef HAVE_LIMITS_H
-
-/* Define if you have the <locale.h> header file. */
-#undef HAVE_LOCALE_H
-
-/* Define if you have the <malloc.h> header file. */
-#undef HAVE_MALLOC_H
-
-/* Define if you have the <nl_types.h> header file. */
-#undef HAVE_NL_TYPES_H
-
-/* Define if you have the <stdlib.h> header file. */
-#undef HAVE_STDLIB_H
-
-/* Define if you have the <string.h> header file. */
-#undef HAVE_STRING_H
-
-/* Define if you have the <strings.h> header file. */
-#undef HAVE_STRINGS_H
-
-/* Define if you have the <sys/param.h> header file. */
-#undef HAVE_SYS_PARAM_H
-
-/* Define if you have the <sys/resource.h> header file. */
-#undef HAVE_SYS_RESOURCE_H
-
-/* Define if you have the <sys/time.h> header file. */
-#undef HAVE_SYS_TIME_H
-
-/* Define if you have the <time.h> header file. */
-#undef HAVE_TIME_H
-
-/* Define if you have the <unistd.h> header file. */
-#undef HAVE_UNISTD_H
-
-/* Define if you have the <values.h> header file. */
-#undef HAVE_VALUES_H
diff --git a/sim/d30v/configure b/sim/d30v/configure
deleted file mode 100755
index 1779847e83b..00000000000
--- a/sim/d30v/configure
+++ /dev/null
@@ -1,4410 +0,0 @@
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-# This file is derived from `gettext.m4'. The difference is that the
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-#
-# This file file be copied and used freely without restrictions. It can
-# be used in projects which are not available under the GNU Public License
-# but which still want to provide support for the GNU gettext functionality.
-# Please note that the actual code is *not* freely available.
-
-# serial 1
-
-
-
-# Check whether LC_MESSAGES is available in <locale.h>.
-# Ulrich Drepper <drepper@cygnus.com>, 1995.
-#
-# This file file be copied and used freely without restrictions. It can
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-# but which still want to provide support for the GNU gettext functionality.
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-# serial 1
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-# Guess values for system-dependent variables and create Makefiles.
-# Generated automatically using autoconf version 2.13
-# Copyright (C) 1992, 93, 94, 95, 96 Free Software Foundation, Inc.
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-# This configure script is free software; the Free Software Foundation
-# gives unlimited permission to copy, distribute and modify it.
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-ac_help="$ac_help
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-ac_help="$ac_help
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-ac_help="$ac_help
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-ac_help="$ac_help
- --enable-sim-cflags=opts Extra CFLAGS for use in building simulator"
-ac_help="$ac_help
- --enable-sim-debug=opts Enable debugging flags"
-ac_help="$ac_help
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-ac_help="$ac_help
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-ac_help="$ac_help
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-ac_help="$ac_help
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-ac_help="$ac_help
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-ac_help="$ac_help
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-
-# Initialize some variables set by options.
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-
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-ac_exeext=
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-' ac_t=' '
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-
-
-
-echo $ac_n "checking how to run the C preprocessor""... $ac_c" 1>&6
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-rm -f conftest*
- ac_cv_prog_CPP="$CPP"
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- CPP="$ac_cv_prog_CPP"
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-
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- SET_MAKE=
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- echo "$ac_t""no" 1>&6
- SET_MAKE="MAKE=${MAKE-make}"
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-
-echo $ac_n "checking for POSIXized ISC""... $ac_c" 1>&6
-echo "configure:800: checking for POSIXized ISC" >&5
-if test -d /etc/conf/kconfig.d &&
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- ISC=yes # If later tests want to check for ISC.
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- else
- CC="$CC -Xp"
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- echo "$ac_t""no" 1>&6
- ISC=
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-
-echo $ac_n "checking for ANSI C header files""... $ac_c" 1>&6
-echo "configure:821: checking for ANSI C header files" >&5
-if eval "test \"`echo '$''{'ac_cv_header_stdc'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 826 "configure"
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-EOF
-ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
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-ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
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- ac_cv_header_stdc=yes
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- echo "$ac_err" >&5
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- ac_cv_header_stdc=no
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-rm -f conftest*
-
-if test $ac_cv_header_stdc = yes; then
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-#line 851 "configure"
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-#include <string.h>
-EOF
-if (eval "$ac_cpp conftest.$ac_ext") 2>&5 |
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- ac_cv_header_stdc=no
-fi
-rm -f conftest*
-
-fi
-
-if test $ac_cv_header_stdc = yes; then
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-#line 869 "configure"
-#include "confdefs.h"
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-EOF
-if (eval "$ac_cpp conftest.$ac_ext") 2>&5 |
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-else
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- ac_cv_header_stdc=no
-fi
-rm -f conftest*
-
-fi
-
-if test $ac_cv_header_stdc = yes; then
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- cat > conftest.$ac_ext <<EOF
-#line 890 "configure"
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-
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-if { (eval echo configure:901: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null
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- cat conftest.$ac_ext >&5
- rm -fr conftest*
- ac_cv_header_stdc=no
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-rm -fr conftest*
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-
-fi
-fi
-
-echo "$ac_t""$ac_cv_header_stdc" 1>&6
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-
-fi
-
-echo $ac_n "checking for working const""... $ac_c" 1>&6
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- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 930 "configure"
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-
-int main() {
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-/* Ultrix mips cc rejects this. */
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-/* SunOS 4.1.1 cc rejects this. */
-char const *const *ccp;
-char **p;
-/* NEC SVR4.0.2 mips cc rejects this. */
-struct point {int x, y;};
-static struct point const zero = {0,0};
-/* AIX XL C 1.02.0.0 rejects this.
- It does not let you subtract one const X* pointer from another in an arm
- of an if-expression whose if-part is not a constant expression */
-const char *g = "string";
-ccp = &g + (g ? g-g : 0);
-/* HPUX 7.0 cc rejects these. */
-++ccp;
-p = (char**) ccp;
-ccp = (char const *const *) p;
-{ /* SCO 3.2v4 cc rejects this. */
- char *t;
- char const *s = 0 ? (char *) 0 : (char const *) 0;
-
- *t++ = 0;
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-{ /* Someone thinks the Sun supposedly-ANSI compiler will reject this. */
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-{ /* Sun SC1.0 ANSI compiler rejects this -- but not the above. */
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-{ /* AIX XL C 1.02.0.0 rejects this saying
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-{ /* ULTRIX-32 V3.1 (Rev 9) vcc rejects this */
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-
-; return 0; }
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-if { (eval echo configure:979: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
- rm -rf conftest*
- ac_cv_c_const=yes
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- ac_cv_c_const=no
-fi
-rm -f conftest*
-fi
-
-echo "$ac_t""$ac_cv_c_const" 1>&6
-if test $ac_cv_c_const = no; then
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-#define const
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-
-fi
-
-echo $ac_n "checking for inline""... $ac_c" 1>&6
-echo "configure:1000: checking for inline" >&5
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- echo $ac_n "(cached) $ac_c" 1>&6
-else
- ac_cv_c_inline=no
-for ac_kw in inline __inline__ __inline; do
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-#line 1007 "configure"
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-
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-if { (eval echo configure:1014: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
- rm -rf conftest*
- ac_cv_c_inline=$ac_kw; break
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
-fi
-rm -f conftest*
-done
-
-fi
-
-echo "$ac_t""$ac_cv_c_inline" 1>&6
-case "$ac_cv_c_inline" in
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- *) cat >> confdefs.h <<EOF
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- ;;
-esac
-
-echo $ac_n "checking for off_t""... $ac_c" 1>&6
-echo "configure:1040: checking for off_t" >&5
-if eval "test \"`echo '$''{'ac_cv_type_off_t'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
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- cat > conftest.$ac_ext <<EOF
-#line 1045 "configure"
-#include "confdefs.h"
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-#include <stdlib.h>
-#include <stddef.h>
-#endif
-EOF
-if (eval "$ac_cpp conftest.$ac_ext") 2>&5 |
- egrep "(^|[^a-zA-Z_0-9])off_t[^a-zA-Z_0-9]" >/dev/null 2>&1; then
- rm -rf conftest*
- ac_cv_type_off_t=yes
-else
- rm -rf conftest*
- ac_cv_type_off_t=no
-fi
-rm -f conftest*
-
-fi
-echo "$ac_t""$ac_cv_type_off_t" 1>&6
-if test $ac_cv_type_off_t = no; then
- cat >> confdefs.h <<\EOF
-#define off_t long
-EOF
-
-fi
-
-echo $ac_n "checking for size_t""... $ac_c" 1>&6
-echo "configure:1073: checking for size_t" >&5
-if eval "test \"`echo '$''{'ac_cv_type_size_t'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1078 "configure"
-#include "confdefs.h"
-#include <sys/types.h>
-#if STDC_HEADERS
-#include <stdlib.h>
-#include <stddef.h>
-#endif
-EOF
-if (eval "$ac_cpp conftest.$ac_ext") 2>&5 |
- egrep "(^|[^a-zA-Z_0-9])size_t[^a-zA-Z_0-9]" >/dev/null 2>&1; then
- rm -rf conftest*
- ac_cv_type_size_t=yes
-else
- rm -rf conftest*
- ac_cv_type_size_t=no
-fi
-rm -f conftest*
-
-fi
-echo "$ac_t""$ac_cv_type_size_t" 1>&6
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-
-fi
-
-# The Ultrix 4.2 mips builtin alloca declared by alloca.h only works
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-if eval "test \"`echo '$''{'ac_cv_header_alloca_h'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1113 "configure"
-#include "confdefs.h"
-#include <alloca.h>
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-if { (eval echo configure:1120: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- rm -rf conftest*
- ac_cv_header_alloca_h=yes
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- ac_cv_header_alloca_h=no
-fi
-rm -f conftest*
-fi
-
-echo "$ac_t""$ac_cv_header_alloca_h" 1>&6
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-#define HAVE_ALLOCA_H 1
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-
-fi
-
-echo $ac_n "checking for alloca""... $ac_c" 1>&6
-echo "configure:1141: checking for alloca" >&5
-if eval "test \"`echo '$''{'ac_cv_func_alloca_works'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1146 "configure"
-#include "confdefs.h"
-
-#ifdef __GNUC__
-# define alloca __builtin_alloca
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-# ifdef _MSC_VER
-# include <malloc.h>
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-# else
-# if HAVE_ALLOCA_H
-# include <alloca.h>
-# else
-# ifdef _AIX
- #pragma alloca
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-# endif
-# endif
-# endif
-# endif
-#endif
-
-int main() {
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-if { (eval echo configure:1174: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- rm -rf conftest*
- ac_cv_func_alloca_works=yes
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- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- ac_cv_func_alloca_works=no
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-rm -f conftest*
-fi
-
-echo "$ac_t""$ac_cv_func_alloca_works" 1>&6
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-#define HAVE_ALLOCA 1
-EOF
-
-fi
-
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- # use ar to extract alloca.o from them instead of compiling alloca.c.
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-
-
-echo $ac_n "checking whether alloca needs Cray hooks""... $ac_c" 1>&6
-echo "configure:1206: checking whether alloca needs Cray hooks" >&5
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- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1211 "configure"
-#include "confdefs.h"
-#if defined(CRAY) && ! defined(CRAY2)
-webecray
-#else
-wenotbecray
-#endif
-
-EOF
-if (eval "$ac_cpp conftest.$ac_ext") 2>&5 |
- egrep "webecray" >/dev/null 2>&1; then
- rm -rf conftest*
- ac_cv_os_cray=yes
-else
- rm -rf conftest*
- ac_cv_os_cray=no
-fi
-rm -f conftest*
-
-fi
-
-echo "$ac_t""$ac_cv_os_cray" 1>&6
-if test $ac_cv_os_cray = yes; then
-for ac_func in _getb67 GETB67 getb67; do
- echo $ac_n "checking for $ac_func""... $ac_c" 1>&6
-echo "configure:1236: checking for $ac_func" >&5
-if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1241 "configure"
-#include "confdefs.h"
-/* System header to define __stub macros and hopefully few prototypes,
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-#include <assert.h>
-/* Override any gcc2 internal prototype to avoid an error. */
-/* We use char because int might match the return type of a gcc2
- builtin and then its argument prototype would still apply. */
-char $ac_func();
-
-int main() {
-
-/* The GNU C library defines this for functions which it implements
- to always fail with ENOSYS. Some functions are actually named
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-#if defined (__stub_$ac_func) || defined (__stub___$ac_func)
-choke me
-#else
-$ac_func();
-#endif
-
-; return 0; }
-EOF
-if { (eval echo configure:1264: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
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- eval "ac_cv_func_$ac_func=yes"
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=no"
-fi
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-fi
-
-if eval "test \"`echo '$ac_cv_func_'$ac_func`\" = yes"; then
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- cat >> confdefs.h <<EOF
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-EOF
-
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- echo "$ac_t""no" 1>&6
-fi
-
-done
-fi
-
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-echo "configure:1291: checking stack direction for C alloca" >&5
-if eval "test \"`echo '$''{'ac_cv_c_stack_direction'+set}'`\" = set"; then
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- cat > conftest.$ac_ext <<EOF
-#line 1299 "configure"
-#include "confdefs.h"
-find_stack_direction ()
-{
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- {
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- }
- else
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-}
-main ()
-{
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-EOF
-if { (eval echo configure:1318: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null
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-
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-{ (eval echo configure:1353: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
-ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
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- ac_tr_hdr=HAVE_`echo $ac_hdr | sed 'y%abcdefghijklmnopqrstuvwxyz./-%ABCDEFGHIJKLMNOPQRSTUVWXYZ___%'`
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-
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-
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-if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then
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-/* Override any gcc2 internal prototype to avoid an error. */
-/* We use char because int might match the return type of a gcc2
- builtin and then its argument prototype would still apply. */
-char $ac_func();
-
-int main() {
-
-/* The GNU C library defines this for functions which it implements
- to always fail with ENOSYS. Some functions are actually named
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-#if defined (__stub_$ac_func) || defined (__stub___$ac_func)
-choke me
-#else
-$ac_func();
-#endif
-
-; return 0; }
-EOF
-if { (eval echo configure:1410: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
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- eval "ac_cv_func_$ac_func=yes"
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=no"
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-
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- ac_tr_func=HAVE_`echo $ac_func | tr 'abcdefghijklmnopqrstuvwxyz' 'ABCDEFGHIJKLMNOPQRSTUVWXYZ'`
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-
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- echo "$ac_t""no" 1>&6
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-
-echo $ac_n "checking for working mmap""... $ac_c" 1>&6
-echo "configure:1435: checking for working mmap" >&5
-if eval "test \"`echo '$''{'ac_cv_func_mmap_fixed_mapped'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- if test "$cross_compiling" = yes; then
- ac_cv_func_mmap_fixed_mapped=no
-else
- cat > conftest.$ac_ext <<EOF
-#line 1443 "configure"
-#include "confdefs.h"
-
-/* Thanks to Mike Haertel and Jim Avera for this test.
- Here is a matrix of mmap possibilities:
- mmap private not fixed
- mmap private fixed at somewhere currently unmapped
- mmap private fixed at somewhere already mapped
- mmap shared not fixed
- mmap shared fixed at somewhere currently unmapped
- mmap shared fixed at somewhere already mapped
- For private mappings, we should verify that changes cannot be read()
- back from the file, nor mmap's back from the file at a different
- address. (There have been systems where private was not correctly
- implemented like the infamous i386 svr4.0, and systems where the
- VM page cache was not coherent with the filesystem buffer cache
- like early versions of FreeBSD and possibly contemporary NetBSD.)
- For shared mappings, we should conversely verify that changes get
- propogated back to all the places they're supposed to be.
-
- Grep wants private fixed already mapped.
- The main things grep needs to know about mmap are:
- * does it exist and is it safe to write into the mmap'd area
- * how to use it (BSD variants) */
-#include <sys/types.h>
-#include <fcntl.h>
-#include <sys/mman.h>
-
-/* This mess was copied from the GNU getpagesize.h. */
-#ifndef HAVE_GETPAGESIZE
-# ifdef HAVE_UNISTD_H
-# include <unistd.h>
-# endif
-
-/* Assume that all systems that can run configure have sys/param.h. */
-# ifndef HAVE_SYS_PARAM_H
-# define HAVE_SYS_PARAM_H 1
-# endif
-
-# ifdef _SC_PAGESIZE
-# define getpagesize() sysconf(_SC_PAGESIZE)
-# else /* no _SC_PAGESIZE */
-# ifdef HAVE_SYS_PARAM_H
-# include <sys/param.h>
-# ifdef EXEC_PAGESIZE
-# define getpagesize() EXEC_PAGESIZE
-# else /* no EXEC_PAGESIZE */
-# ifdef NBPG
-# define getpagesize() NBPG * CLSIZE
-# ifndef CLSIZE
-# define CLSIZE 1
-# endif /* no CLSIZE */
-# else /* no NBPG */
-# ifdef NBPC
-# define getpagesize() NBPC
-# else /* no NBPC */
-# ifdef PAGESIZE
-# define getpagesize() PAGESIZE
-# endif /* PAGESIZE */
-# endif /* no NBPC */
-# endif /* no NBPG */
-# endif /* no EXEC_PAGESIZE */
-# else /* no HAVE_SYS_PARAM_H */
-# define getpagesize() 8192 /* punt totally */
-# endif /* no HAVE_SYS_PARAM_H */
-# endif /* no _SC_PAGESIZE */
-
-#endif /* no HAVE_GETPAGESIZE */
-
-#ifdef __cplusplus
-extern "C" { void *malloc(unsigned); }
-#else
-char *malloc();
-#endif
-
-int
-main()
-{
- char *data, *data2, *data3;
- int i, pagesize;
- int fd;
-
- pagesize = getpagesize();
-
- /*
- * First, make a file with some known garbage in it.
- */
- data = malloc(pagesize);
- if (!data)
- exit(1);
- for (i = 0; i < pagesize; ++i)
- *(data + i) = rand();
- umask(0);
- fd = creat("conftestmmap", 0600);
- if (fd < 0)
- exit(1);
- if (write(fd, data, pagesize) != pagesize)
- exit(1);
- close(fd);
-
- /*
- * Next, try to mmap the file at a fixed address which
- * already has something else allocated at it. If we can,
- * also make sure that we see the same garbage.
- */
- fd = open("conftestmmap", O_RDWR);
- if (fd < 0)
- exit(1);
- data2 = malloc(2 * pagesize);
- if (!data2)
- exit(1);
- data2 += (pagesize - ((int) data2 & (pagesize - 1))) & (pagesize - 1);
- if (data2 != mmap(data2, pagesize, PROT_READ | PROT_WRITE,
- MAP_PRIVATE | MAP_FIXED, fd, 0L))
- exit(1);
- for (i = 0; i < pagesize; ++i)
- if (*(data + i) != *(data2 + i))
- exit(1);
-
- /*
- * Finally, make sure that changes to the mapped area
- * do not percolate back to the file as seen by read().
- * (This is a bug on some variants of i386 svr4.0.)
- */
- for (i = 0; i < pagesize; ++i)
- *(data2 + i) = *(data2 + i) + 1;
- data3 = malloc(pagesize);
- if (!data3)
- exit(1);
- if (read(fd, data3, pagesize) != pagesize)
- exit(1);
- for (i = 0; i < pagesize; ++i)
- if (*(data + i) != *(data3 + i))
- exit(1);
- close(fd);
- unlink("conftestmmap");
- exit(0);
-}
-
-EOF
-if { (eval echo configure:1583: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null
-then
- ac_cv_func_mmap_fixed_mapped=yes
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -fr conftest*
- ac_cv_func_mmap_fixed_mapped=no
-fi
-rm -fr conftest*
-fi
-
-fi
-
-echo "$ac_t""$ac_cv_func_mmap_fixed_mapped" 1>&6
-if test $ac_cv_func_mmap_fixed_mapped = yes; then
- cat >> confdefs.h <<\EOF
-#define HAVE_MMAP 1
-EOF
-
-fi
-
-echo $ac_n "checking for Cygwin environment""... $ac_c" 1>&6
-echo "configure:1606: checking for Cygwin environment" >&5
-if eval "test \"`echo '$''{'ac_cv_cygwin'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1611 "configure"
-#include "confdefs.h"
-
-int main() {
-
-#ifndef __CYGWIN__
-#define __CYGWIN__ __CYGWIN32__
-#endif
-return __CYGWIN__;
-; return 0; }
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-if { (eval echo configure:1622: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
- rm -rf conftest*
- ac_cv_cygwin=yes
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- ac_cv_cygwin=no
-fi
-rm -f conftest*
-rm -f conftest*
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-
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-CYGWIN=
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-else
- cat > conftest.$ac_ext <<EOF
-#line 1644 "configure"
-#include "confdefs.h"
-
-int main() {
-return __MINGW32__;
-; return 0; }
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-if { (eval echo configure:1651: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
- rm -rf conftest*
- ac_cv_mingw32=yes
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- ac_cv_mingw32=no
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-rm -f conftest*
-rm -f conftest*
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-
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-
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-
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- break
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- break
- fi
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-if test -z "$ac_aux_dir"; then
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-fi
-ac_config_guess=$ac_aux_dir/config.guess
-ac_config_sub=$ac_aux_dir/config.sub
-ac_configure=$ac_aux_dir/configure # This should be Cygnus configure.
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-
-# Do some error checking and defaulting for the host and target type.
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-#
-# The rules are:
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-
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-esac
-
-
-# Make sure we can run config.sub.
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-
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-echo "configure:1718: checking host system type" >&5
-
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- NONE)
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- else { echo "configure: error: can not guess host type; you must specify one" 1>&2; exit 1; }
- fi ;;
- *) host_alias=$nonopt ;;
- esac ;;
-esac
-
-host=`${CONFIG_SHELL-/bin/sh} $ac_config_sub $host_alias`
-host_cpu=`echo $host | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\1/'`
-host_vendor=`echo $host | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\2/'`
-host_os=`echo $host | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\3/'`
-echo "$ac_t""$host" 1>&6
-
-echo $ac_n "checking target system type""... $ac_c" 1>&6
-echo "configure:1739: checking target system type" >&5
-
-target_alias=$target
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- case $nonopt in
- NONE) target_alias=$host_alias ;;
- *) target_alias=$nonopt ;;
- esac ;;
-esac
-
-target=`${CONFIG_SHELL-/bin/sh} $ac_config_sub $target_alias`
-target_cpu=`echo $target | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\1/'`
-target_vendor=`echo $target | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\2/'`
-target_os=`echo $target | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\3/'`
-echo "$ac_t""$target" 1>&6
-
-echo $ac_n "checking build system type""... $ac_c" 1>&6
-echo "configure:1757: checking build system type" >&5
-
-build_alias=$build
-case "$build_alias" in
-NONE)
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- NONE) build_alias=$host_alias ;;
- *) build_alias=$nonopt ;;
- esac ;;
-esac
-
-build=`${CONFIG_SHELL-/bin/sh} $ac_config_sub $build_alias`
-build_cpu=`echo $build | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\1/'`
-build_vendor=`echo $build | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\2/'`
-build_os=`echo $build | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\3/'`
-echo "$ac_t""$build" 1>&6
-
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-
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- # Double any \ or $. echo might interpret backslashes.
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-s,\\,\\\\,g; s,\$,$$,g
-EOF_SED
- program_transform_name="`echo $program_transform_name|sed -f conftestsed`"
- rm -f conftestsed
-fi
-test "$program_prefix" != NONE &&
- program_transform_name="s,^,${program_prefix},; $program_transform_name"
-# Use a double $ so make ignores it.
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- program_transform_name="s,\$\$,${program_suffix},; $program_transform_name"
-
-# sed with no file args requires a program.
-test "$program_transform_name" = "" && program_transform_name="s,x,x,"
-
-# Extract the first word of "gcc", so it can be a program name with args.
-set dummy gcc; ac_word=$2
-echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:1801: checking for $ac_word" >&5
-if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- if test -n "$CC"; then
- ac_cv_prog_CC="$CC" # Let the user override the test.
-else
- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
- ac_dummy="$PATH"
- for ac_dir in $ac_dummy; do
- test -z "$ac_dir" && ac_dir=.
- if test -f $ac_dir/$ac_word; then
- ac_cv_prog_CC="gcc"
- break
- fi
- done
- IFS="$ac_save_ifs"
-fi
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-CC="$ac_cv_prog_CC"
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-else
- echo "$ac_t""no" 1>&6
-fi
-
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-else
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- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
- ac_prog_rejected=no
- ac_dummy="$PATH"
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- continue
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- ac_cv_prog_CC="cc"
- break
- fi
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- IFS="$ac_save_ifs"
-if test $ac_prog_rejected = yes; then
- # We found a bogon in the path, so make sure we never use it.
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- # first if we set CC to just the basename; use the full file name.
- shift
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- shift
- ac_cv_prog_CC="$@"
- fi
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-fi
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-CC="$ac_cv_prog_CC"
-if test -n "$CC"; then
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-else
- echo "$ac_t""no" 1>&6
-fi
-
- if test -z "$CC"; then
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- *win32* | *WIN32*)
- # Extract the first word of "cl", so it can be a program name with args.
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-echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:1882: checking for $ac_word" >&5
-if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- if test -n "$CC"; then
- ac_cv_prog_CC="$CC" # Let the user override the test.
-else
- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
- ac_dummy="$PATH"
- for ac_dir in $ac_dummy; do
- test -z "$ac_dir" && ac_dir=.
- if test -f $ac_dir/$ac_word; then
- ac_cv_prog_CC="cl"
- break
- fi
- done
- IFS="$ac_save_ifs"
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-CC="$ac_cv_prog_CC"
-if test -n "$CC"; then
- echo "$ac_t""$CC" 1>&6
-else
- echo "$ac_t""no" 1>&6
-fi
- ;;
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- fi
- test -z "$CC" && { echo "configure: error: no acceptable cc found in \$PATH" 1>&2; exit 1; }
-fi
-
-echo $ac_n "checking whether the C compiler ($CC $CFLAGS $LDFLAGS) works""... $ac_c" 1>&6
-echo "configure:1914: checking whether the C compiler ($CC $CFLAGS $LDFLAGS) works" >&5
-
-ac_ext=c
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- ac_safe=`echo "libintl.h" | sed 'y%./+-%__p_%'`
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-
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- *)
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-
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-
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-
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-
-
-
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-
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- *)
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-
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-else
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-fi
-
-
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- DATADIRNAME=share
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-
-
-
-
-
-
-
-
-
-
-
-
-
-
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- NEW_LINGUAS=
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-
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-
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-
-
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-echo $ac_n "checking for linux/version.h""... $ac_c" 1>&6
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-{ (eval echo configure:2891: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
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- eval "ac_cv_header_$ac_safe=yes"
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- echo "$ac_err" >&5
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
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- eval "ac_cv_header_$ac_safe=no"
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-rm -f conftest*
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-if eval "test \"`echo '$ac_cv_header_'$ac_safe`\" = yes"; then
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- msgformat=linux
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- echo "$ac_t""no" 1>&6
-msgformat=xopen
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-
-
- sed -e '/^#/d' $srcdir/$msgformat-msg.sed > po2msg.sed
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- sed -e '/^#.*[^\\]$/d' -e '/^#$/d' \
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-
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- GT_NO=
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-
-
-
- MKINSTALLDIRS="\$(srcdir)/../../mkinstalldirs"
-
-
- l=
-
-
- if test -d $srcdir/po; then
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-
-
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-echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6
-echo "configure:2960: checking for $ac_hdr" >&5
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-else
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-ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:2970: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
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- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
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- eval "ac_cv_header_$ac_safe=no"
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-if eval "test \"`echo '$ac_cv_header_'$ac_safe`\" = yes"; then
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- ac_tr_hdr=HAVE_`echo $ac_hdr | sed 'y%abcdefghijklmnopqrstuvwxyz./-%ABCDEFGHIJKLMNOPQRSTUVWXYZ___%'`
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-
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-echo "configure:3000: checking for $ac_hdr" >&5
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-{ (eval echo configure:3010: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
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- eval "ac_cv_header_$ac_safe=yes"
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- echo "configure: failed program was:" >&5
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- eval "ac_cv_header_$ac_safe=no"
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- ac_tr_hdr=HAVE_`echo $ac_hdr | sed 'y%abcdefghijklmnopqrstuvwxyz./-%ABCDEFGHIJKLMNOPQRSTUVWXYZ___%'`
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-
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-echo "configure:3040: checking for $ac_hdr" >&5
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-{ (eval echo configure:3050: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
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- ac_tr_hdr=HAVE_`echo $ac_hdr | sed 'y%abcdefghijklmnopqrstuvwxyz./-%ABCDEFGHIJKLMNOPQRSTUVWXYZ___%'`
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-
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-
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-#line 3085 "configure"
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-{ (eval echo configure:3090: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
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- eval "ac_cv_header_$ac_safe=yes"
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- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
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- eval "ac_cv_header_$ac_safe=no"
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- ac_tr_hdr=HAVE_`echo $ac_hdr | sed 'y%abcdefghijklmnopqrstuvwxyz./-%ABCDEFGHIJKLMNOPQRSTUVWXYZ___%'`
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-
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-#line 3124 "configure"
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-/* We use char because int might match the return type of a gcc2
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-char $ac_func();
-
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-
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-choke me
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-$ac_func();
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-
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-if { (eval echo configure:3147: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
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- eval "ac_cv_func_$ac_func=yes"
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=no"
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-rm -f conftest*
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-
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- ac_tr_func=HAVE_`echo $ac_func | tr 'abcdefghijklmnopqrstuvwxyz' 'ABCDEFGHIJKLMNOPQRSTUVWXYZ'`
- cat >> confdefs.h <<EOF
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-
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- echo "$ac_t""no" 1>&6
-fi
-done
-
-
-# Check for socket libraries
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-echo "configure:3174: checking for bind in -lsocket" >&5
-ac_lib_var=`echo socket'_'bind | sed 'y%./+-%__p_%'`
-if eval "test \"`echo '$''{'ac_cv_lib_$ac_lib_var'+set}'`\" = set"; then
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-else
- ac_save_LIBS="$LIBS"
-LIBS="-lsocket $LIBS"
-cat > conftest.$ac_ext <<EOF
-#line 3182 "configure"
-#include "confdefs.h"
-/* Override any gcc2 internal prototype to avoid an error. */
-/* We use char because int might match the return type of a gcc2
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-; return 0; }
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-if { (eval echo configure:3193: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
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- eval "ac_cv_lib_$ac_lib_var=yes"
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- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_lib_$ac_lib_var=no"
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-rm -f conftest*
-LIBS="$ac_save_LIBS"
-
-fi
-if eval "test \"`echo '$ac_cv_lib_'$ac_lib_var`\" = yes"; then
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- ac_tr_lib=HAVE_LIB`echo socket | sed -e 's/[^a-zA-Z0-9_]/_/g' \
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- cat >> confdefs.h <<EOF
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-
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- echo "$ac_t""no" 1>&6
-fi
-
-echo $ac_n "checking for gethostbyname in -lnsl""... $ac_c" 1>&6
-echo "configure:3221: checking for gethostbyname in -lnsl" >&5
-ac_lib_var=`echo nsl'_'gethostbyname | sed 'y%./+-%__p_%'`
-if eval "test \"`echo '$''{'ac_cv_lib_$ac_lib_var'+set}'`\" = set"; then
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- ac_save_LIBS="$LIBS"
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-cat > conftest.$ac_ext <<EOF
-#line 3229 "configure"
-#include "confdefs.h"
-/* Override any gcc2 internal prototype to avoid an error. */
-/* We use char because int might match the return type of a gcc2
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-int main() {
-gethostbyname()
-; return 0; }
-EOF
-if { (eval echo configure:3240: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
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- eval "ac_cv_lib_$ac_lib_var=yes"
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- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_lib_$ac_lib_var=no"
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- ac_tr_lib=HAVE_LIB`echo nsl | sed -e 's/[^a-zA-Z0-9_]/_/g' \
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-
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- echo "$ac_t""no" 1>&6
-fi
-
-
-. ${srcdir}/../../bfd/configure.host
-
-
-
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-# Check whether --enable-maintainer-mode or --disable-maintainer-mode was given.
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- no) MAINT="#" ;;
- *) { echo "configure: error: "--enable-maintainer-mode does not take a value"" 1>&2; exit 1; }; MAINT="#" ;;
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- MAINT="#"
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-
-
-
-# Check whether --enable-sim-bswap or --disable-sim-bswap was given.
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-if test x"$silent" != x"yes" && test x"$sim_bswap" != x""; then
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- sim_bswap=""
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-
-
-
-# Check whether --enable-sim-cflags or --disable-sim-cflags was given.
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- trace) { echo "configure: error: "Please use --enable-sim-debug instead."" 1>&2; exit 1; }; sim_cflags="";;
- no) sim_cflags="";;
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-fi
-else
- sim_cflags=""
-fi
-
-
-
-# Check whether --enable-sim-debug or --disable-sim-debug was given.
-if test "${enable_sim_debug+set}" = set; then
- enableval="$enable_sim_debug"
- case "${enableval}" in
- yes) sim_debug="-DDEBUG=7 -DWITH_DEBUG=7";;
- no) sim_debug="-DDEBUG=0 -DWITH_DEBUG=0";;
- *) sim_debug="-DDEBUG='(${enableval})' -DWITH_DEBUG='(${enableval})'";;
-esac
-if test x"$silent" != x"yes" && test x"$sim_debug" != x""; then
- echo "Setting sim debug = $sim_debug" 6>&1
-fi
-else
- sim_debug=""
-fi
-
-
-
-# Check whether --enable-sim-stdio or --disable-sim-stdio was given.
-if test "${enable_sim_stdio+set}" = set; then
- enableval="$enable_sim_stdio"
- case "${enableval}" in
- yes) sim_stdio="-DWITH_STDIO=DO_USE_STDIO";;
- no) sim_stdio="-DWITH_STDIO=DONT_USE_STDIO";;
- *) { echo "configure: error: "Unknown value $enableval passed to --enable-sim-stdio"" 1>&2; exit 1; }; sim_stdio="";;
-esac
-if test x"$silent" != x"yes" && test x"$sim_stdio" != x""; then
- echo "Setting stdio flags = $sim_stdio" 6>&1
-fi
-else
- sim_stdio=""
-fi
-
-
-
-# Check whether --enable-sim-trace or --disable-sim-trace was given.
-if test "${enable_sim_trace+set}" = set; then
- enableval="$enable_sim_trace"
- case "${enableval}" in
- yes) sim_trace="-DTRACE=1 -DWITH_TRACE=-1";;
- no) sim_trace="-DTRACE=0 -DWITH_TRACE=0";;
- [-0-9]*)
- sim_trace="-DTRACE='(${enableval})' -DWITH_TRACE='(${enableval})'";;
- [a-z]*)
- sim_trace=""
- for x in `echo "$enableval" | sed -e "s/,/ /g"`; do
- if test x"$sim_trace" = x; then
- sim_trace="-DWITH_TRACE='(TRACE_$x"
- else
- sim_trace="${sim_trace}|TRACE_$x"
- fi
- done
- sim_trace="$sim_trace)'" ;;
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-if test x"$silent" != x"yes" && test x"$sim_trace" != x""; then
- echo "Setting sim trace = $sim_trace" 6>&1
-fi
-else
- sim_trace=""
-fi
-
-
-
-# Check whether --enable-sim-profile or --disable-sim-profile was given.
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- case "${enableval}" in
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- no) sim_profile="-DPROFILE=0 -DWITH_PROFILE=0";;
- [-0-9]*)
- sim_profile="-DPROFILE='(${enableval})' -DWITH_PROFILE='(${enableval})'";;
- [a-z]*)
- sim_profile=""
- for x in `echo "$enableval" | sed -e "s/,/ /g"`; do
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- sim_profile="-DWITH_PROFILE='(PROFILE_$x"
- else
- sim_profile="${sim_profile}|PROFILE_$x"
- fi
- done
- sim_profile="$sim_profile)'" ;;
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-if test x"$silent" != x"yes" && test x"$sim_profile" != x""; then
- echo "Setting sim profile = $sim_profile" 6>&1
-fi
-else
- sim_profile="-DPROFILE=1 -DWITH_PROFILE=-1"
-fi
-
-
-
-echo $ac_n "checking return type of signal handlers""... $ac_c" 1>&6
-echo "configure:3416: checking return type of signal handlers" >&5
-if eval "test \"`echo '$''{'ac_cv_type_signal'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 3421 "configure"
-#include "confdefs.h"
-#include <sys/types.h>
-#include <signal.h>
-#ifdef signal
-#undef signal
-#endif
-#ifdef __cplusplus
-extern "C" void (*signal (int, void (*)(int)))(int);
-#else
-void (*signal ()) ();
-#endif
-
-int main() {
-int i;
-; return 0; }
-EOF
-if { (eval echo configure:3438: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
- rm -rf conftest*
- ac_cv_type_signal=void
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- ac_cv_type_signal=int
-fi
-rm -f conftest*
-fi
-
-echo "$ac_t""$ac_cv_type_signal" 1>&6
-cat >> confdefs.h <<EOF
-#define RETSIGTYPE $ac_cv_type_signal
-EOF
-
-
-
-
-
-echo $ac_n "checking for executable suffix""... $ac_c" 1>&6
-echo "configure:3460: checking for executable suffix" >&5
-if eval "test \"`echo '$''{'ac_cv_exeext'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- if test "$CYGWIN" = yes || test "$MINGW32" = yes; then
- ac_cv_exeext=.exe
-else
- rm -f conftest*
- echo 'int main () { return 0; }' > conftest.$ac_ext
- ac_cv_exeext=
- if { (eval echo configure:3470: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; }; then
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- case $file in
- *.c | *.o | *.obj | *.ilk | *.pdb) ;;
- *) ac_cv_exeext=`echo $file | sed -e s/conftest//` ;;
- esac
- done
- else
- { echo "configure: error: installation or configuration problem: compiler cannot create executables." 1>&2; exit 1; }
- fi
- rm -f conftest*
- test x"${ac_cv_exeext}" = x && ac_cv_exeext=no
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-fi
-
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-echo "$ac_t""${ac_cv_exeext}" 1>&6
-ac_exeext=$EXEEXT
-
-
-sim_link_files=
-sim_link_links=
-
-sim_link_links=tconfig.h
-if test -f ${srcdir}/tconfig.in
-then
- sim_link_files=tconfig.in
-else
- sim_link_files=../common/tconfig.in
-fi
-
-# targ-vals.def points to the libc macro description file.
-case "${target}" in
-*-*-*) TARG_VALS_DEF=../common/nltvals.def ;;
-esac
-sim_link_files="${sim_link_files} ${TARG_VALS_DEF}"
-sim_link_links="${sim_link_links} targ-vals.def"
-
-
-
-for ac_prog in gm4 gnum4 m4
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-echo "configure:3516: checking for $ac_word" >&5
-if eval "test \"`echo '$''{'ac_cv_path_M4'+set}'`\" = set"; then
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-else
- case "$M4" in
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- ?:/*)
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- *)
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- done
- IFS="$ac_save_ifs"
- ;;
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-else
- echo "$ac_t""no" 1>&6
-fi
-
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-test -n "$M4" || M4="m4"
-
-
-
-default_sim_inline="-DDEFAULT_INLINE=0"
-# Check whether --enable-sim-inline or --disable-sim-inline was given.
-if test "${enable_sim_inline+set}" = set; then
- enableval="$enable_sim_inline"
- sim_inline=""
-case "$enableval" in
- no) sim_inline="-DDEFAULT_INLINE=0";;
- 0) sim_inline="-DDEFAULT_INLINE=0";;
- yes | 2) sim_inline="-DDEFAULT_INLINE=ALL_C_INLINE";;
- 1) sim_inline="-DDEFAULT_INLINE=INLINE_LOCALS";;
- *) for x in `echo "$enableval" | sed -e "s/,/ /g"`; do
- new_flag=""
- case "$x" in
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- *) new_flag="-D$x""_INLINE=ALL_C_INLINE";;
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- sim_inline="$new_flag"
- else
- sim_inline="$sim_inline $new_flag"
- fi
- done;;
-esac
-if test x"$silent" != x"yes" && test x"$sim_inline" != x""; then
- echo "Setting inline flags = $sim_inline" 6>&1
-fi
-else
-
-if test "x$cross_compiling" = "xno"; then
- if test x"$GCC" != "x" -a x"${default_sim_inline}" != "x" ; then
- sim_inline="${default_sim_inline}"
- if test x"$silent" != x"yes"; then
- echo "Setting inline flags = $sim_inline" 6>&1
- fi
- else
- sim_inline=""
- fi
-else
- sim_inline="-DDEFAULT_INLINE=0"
-fi
-fi
-
-
-wire_endian="BIG_ENDIAN"
-default_endian=""
-# Check whether --enable-sim-endian or --disable-sim-endian was given.
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- enableval="$enable_sim_endian"
- case "${enableval}" in
- b*|B*) sim_endian="-DWITH_TARGET_BYTE_ORDER=BIG_ENDIAN";;
- l*|L*) sim_endian="-DWITH_TARGET_BYTE_ORDER=LITTLE_ENDIAN";;
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- if test x"$default_endian" != x; then
- sim_endian="-DWITH_TARGET_BYTE_ORDER=${default_endian}"
- else
- echo "No hard-wired endian for target $target" 1>&6
- sim_endian="-DWITH_TARGET_BYTE_ORDER=0"
- fi
- fi;;
- no) if test x"$default_endian" != x; then
- sim_endian="-DWITH_DEFAULT_TARGET_BYTE_ORDER=${default_endian}"
- else
- if test x"$wire_endian" != x; then
- sim_endian="-DWITH_DEFAULT_TARGET_BYTE_ORDER=${wire_endian}"
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- echo "No default endian for target $target" 1>&6
- sim_endian="-DWITH_DEFAULT_TARGET_BYTE_ORDER=0"
- fi
- fi;;
- *) { echo "configure: error: "Unknown value $enableval for --enable-sim-endian"" 1>&2; exit 1; }; sim_endian="";;
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- echo "Setting endian flags = $sim_endian" 6>&1
-fi
-else
- if test x"$default_endian" != x; then
- sim_endian="-DWITH_DEFAULT_TARGET_BYTE_ORDER=${default_endian}"
-else
- if test x"$wire_endian" != x; then
- sim_endian="-DWITH_TARGET_BYTE_ORDER=${wire_endian}"
- else
- sim_endian=
- fi
-fi
-fi
-
-wire_alignment="STRICT_ALIGNMENT"
-default_alignment=""
-
-# Check whether --enable-sim-alignment or --disable-sim-alignment was given.
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- enableval="$enable_sim_alignment"
- case "${enableval}" in
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- nonstrict | NONSTRICT) sim_alignment="-DWITH_ALIGNMENT=NONSTRICT_ALIGNMENT";;
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- yes) if test x"$wire_alignment" != x; then
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- else
- if test x"$default_alignment" != x; then
- sim_alignment="-DWITH_ALIGNMENT=${default_alignment}"
- else
- echo "No hard-wired alignment for target $target" 1>&6
- sim_alignment="-DWITH_ALIGNMENT=0"
- fi
- fi;;
- no) if test x"$default_alignment" != x; then
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- else
- if test x"$wire_alignment" != x; then
- sim_alignment="-DWITH_DEFAULT_ALIGNMENT=${wire_alignment}"
- else
- echo "No default alignment for target $target" 1>&6
- sim_alignment="-DWITH_DEFAULT_ALIGNMENT=0"
- fi
- fi;;
- *) { echo "configure: error: "Unknown value $enableval passed to --enable-sim-alignment"" 1>&2; exit 1; }; sim_alignment="";;
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- echo "Setting alignment flags = $sim_alignment" 6>&1
-fi
-else
- if test x"$default_alignment" != x; then
- sim_alignment="-DWITH_DEFAULT_ALIGNMENT=${default_alignment}"
-else
- if test x"$wire_alignment" != x; then
- sim_alignment="-DWITH_ALIGNMENT=${wire_alignment}"
- else
- sim_alignment=
- fi
-fi
-fi
-
-
-# Check whether --enable-sim-hostendian or --disable-sim-hostendian was given.
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- case "${enableval}" in
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- b*|B*) sim_hostendian="-DWITH_HOST_BYTE_ORDER=BIG_ENDIAN";;
- l*|L*) sim_hostendian="-DWITH_HOST_BYTE_ORDER=LITTLE_ENDIAN";;
- *) { echo "configure: error: "Unknown value $enableval for --enable-sim-hostendian"" 1>&2; exit 1; }; sim_hostendian="";;
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-fi
-else
-
-if test "x$cross_compiling" = "xno"; then
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-echo "configure:3708: checking whether byte ordering is bigendian" >&5
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- echo $ac_n "(cached) $ac_c" 1>&6
-else
- ac_cv_c_bigendian=unknown
-# See if sys/param.h defines the BYTE_ORDER macro.
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-#line 3715 "configure"
-#include "confdefs.h"
-#include <sys/types.h>
-#include <sys/param.h>
-int main() {
-
-#if !BYTE_ORDER || !BIG_ENDIAN || !LITTLE_ENDIAN
- bogus endian macros
-#endif
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-if { (eval echo configure:3726: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
- rm -rf conftest*
- # It does; now see whether it defined to BIG_ENDIAN or not.
-cat > conftest.$ac_ext <<EOF
-#line 3730 "configure"
-#include "confdefs.h"
-#include <sys/types.h>
-#include <sys/param.h>
-int main() {
-
-#if BYTE_ORDER != BIG_ENDIAN
- not big endian
-#endif
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-if { (eval echo configure:3741: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
- rm -rf conftest*
- ac_cv_c_bigendian=yes
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- ac_cv_c_bigendian=no
-fi
-rm -f conftest*
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
-fi
-rm -f conftest*
-if test $ac_cv_c_bigendian = unknown; then
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-else
- cat > conftest.$ac_ext <<EOF
-#line 3761 "configure"
-#include "confdefs.h"
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- /* Are we little or big endian? From Harbison&Steele. */
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-if { (eval echo configure:3774: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null
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- ac_cv_c_bigendian=no
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -fr conftest*
- ac_cv_c_bigendian=yes
-fi
-rm -fr conftest*
-fi
-
-fi
-fi
-
-echo "$ac_t""$ac_cv_c_bigendian" 1>&6
-if test $ac_cv_c_bigendian = yes; then
- cat >> confdefs.h <<\EOF
-#define WORDS_BIGENDIAN 1
-EOF
-
-fi
-
- if test $ac_cv_c_bigendian = yes; then
- sim_hostendian="-DWITH_HOST_BYTE_ORDER=BIG_ENDIAN"
- else
- sim_hostendian="-DWITH_HOST_BYTE_ORDER=LITTLE_ENDIAN"
- fi
-else
- sim_hostendian="-DWITH_HOST_BYTE_ORDER=0"
-fi
-fi
-
-
-# Check whether --enable-build-warnings or --disable-build-warnings was given.
-if test "${enable_build_warnings+set}" = set; then
- enableval="$enable_build_warnings"
- build_warnings="-Wall -Wpointer-arith -Wstrict-prototypes -Wmissing-prototypes -Wmissing-declarations"
-case "${enableval}" in
- yes) ;;
- no) build_warnings="-w";;
- ,*) t=`echo "${enableval}" | sed -e "s/,/ /g"`
- build_warnings="${build_warnings} ${t}";;
- *,) t=`echo "${enableval}" | sed -e "s/,/ /g"`
- build_warnings="${t} ${build_warnings}";;
- *) build_warnings=`echo "${enableval}" | sed -e "s/,/ /g"`;;
-esac
-if test x"$silent" != x"yes" && test x"$build_warnings" != x""; then
- echo "Setting warning flags = $build_warnings" 6>&1
-fi
-WARN_CFLAGS=""
-WERROR_CFLAGS=""
-if test "x${build_warnings}" != x -a "x$GCC" = xyes
-then
- # Separate out the -Werror flag as some files just cannot be
- # compiled with it enabled.
- for w in ${build_warnings}; do
- case $w in
- -Werr*) WERROR_CFLAGS=-Werror ;;
- *) WARN_CFLAGS="${WARN_CFLAGS} $w"
- esac
- done
-fi
-else
- build_warnings=""
-fi
-
-
-default_sim_reserved_bits="1"
-# Check whether --enable-sim-reserved-bits or --disable-sim-reserved-bits was given.
-if test "${enable_sim_reserved_bits+set}" = set; then
- enableval="$enable_sim_reserved_bits"
- case "${enableval}" in
- yes) sim_reserved_bits="-DWITH_RESERVED_BITS=1";;
- no) sim_reserved_bits="-DWITH_RESERVED_BITS=0";;
- *) { echo "configure: error: "--enable-sim-reserved-bits does not take a value"" 1>&2; exit 1; }; sim_reserved_bits="";;
-esac
-if test x"$silent" != x"yes" && test x"$sim_reserved_bits" != x""; then
- echo "Setting reserved flags = $sim_reserved_bits" 6>&1
-fi
-else
- sim_reserved_bits="-DWITH_RESERVED_BITS=${default_sim_reserved_bits}"
-fi
-
-
-
-
-#
-# Enable making unknown traps dump out registers
-#
-# Check whether --enable-sim-trapdump or --disable-sim-trapdump was given.
-if test "${enable_sim_trapdump+set}" = set; then
- enableval="$enable_sim_trapdump"
- case "${enableval}" in
- yes) sim_trapdump="-DTRAPDUMP=1";;
- no) sim_trapdump="-DTRAPDUMP=0";;
- *) { echo "configure: error: "Unknown value $enableval passed to --enable-sim-trapdump"" 1>&2; exit 1; }; sim_trapdump="";;
-esac
-if test x"$silent" != x"yes" && test x"$sim_trapdump" != x""; then
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-fi
-else
- sim_trapdump=""
-fi
-
-
-for ac_hdr in stdlib.h unistd.h string.h strings.h
-do
-ac_safe=`echo "$ac_hdr" | sed 'y%./+-%__p_%'`
-echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6
-echo "configure:3884: checking for $ac_hdr" >&5
-if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 3889 "configure"
-#include "confdefs.h"
-#include <$ac_hdr>
-EOF
-ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:3894: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
-ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
-if test -z "$ac_err"; then
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=yes"
-else
- echo "$ac_err" >&5
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=no"
-fi
-rm -f conftest*
-fi
-if eval "test \"`echo '$ac_cv_header_'$ac_safe`\" = yes"; then
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- ac_tr_hdr=HAVE_`echo $ac_hdr | sed 'y%abcdefghijklmnopqrstuvwxyz./-%ABCDEFGHIJKLMNOPQRSTUVWXYZ___%'`
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-#define $ac_tr_hdr 1
-EOF
-
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- echo "$ac_t""no" 1>&6
-fi
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-
-
-
-
-
-trap '' 1 2 15
-cat > confcache <<\EOF
-# This file is a shell script that caches the results of configure
-# tests run on this system so they can be shared between configure
-# scripts and configure runs. It is not useful on other systems.
-# If it contains results you don't want to keep, you may remove or edit it.
-#
-# By default, configure uses ./config.cache as the cache file,
-# creating it if it does not exist already. You can give configure
-# the --cache-file=FILE option to use a different cache file; that is
-# what configure does when it calls configure scripts in
-# subdirectories, so they share the cache.
-# Giving --cache-file=/dev/null disables caching, for debugging configure.
-# config.status only pays attention to the cache file if you give it the
-# --recheck option to rerun configure.
-#
-EOF
-# The following way of writing the cache mishandles newlines in values,
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-# Ultrix sh set writes to stderr and can't be redirected directly,
-# and sets the high bit in the cache file unless we assign to the vars.
-(set) 2>&1 |
- case `(ac_space=' '; set | grep ac_space) 2>&1` in
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- # turns \\\\ into \\, and sed turns \\ into \).
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- -e "s/'/'\\\\''/g" \
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- ;;
- *)
- # `set' quotes correctly as required by POSIX, so do not add quotes.
- sed -n -e 's/^\([a-zA-Z0-9_]*_cv_[a-zA-Z0-9_]*\)=\(.*\)/\1=${\1=\2}/p'
- ;;
- esac >> confcache
-if cmp -s $cache_file confcache; then
- :
-else
- if test -w $cache_file; then
- echo "updating cache $cache_file"
- cat confcache > $cache_file
- else
- echo "not updating unwritable cache $cache_file"
- fi
-fi
-rm -f confcache
-
-trap 'rm -fr conftest* confdefs* core core.* *.core $ac_clean_files; exit 1' 1 2 15
-
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-# Let make expand exec_prefix.
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-
-# Any assignment to VPATH causes Sun make to only execute
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-if test "x$srcdir" = x.; then
- ac_vpsub='/^[ ]*VPATH[ ]*=[^:]*$/d'
-fi
-
-trap 'rm -f $CONFIG_STATUS conftest*; exit 1' 1 2 15
-
-DEFS=-DHAVE_CONFIG_H
-
-# Without the "./", some shells look in PATH for config.status.
-: ${CONFIG_STATUS=./config.status}
-
-echo creating $CONFIG_STATUS
-rm -f $CONFIG_STATUS
-cat > $CONFIG_STATUS <<EOF
-#! /bin/sh
-# Generated automatically by configure.
-# Run this file to recreate the current configuration.
-# This directory was configured as follows,
-# on host `(hostname || uname -n) 2>/dev/null | sed 1q`:
-#
-# $0 $ac_configure_args
-#
-# Compiler output produced by configure, useful for debugging
-# configure, is in ./config.log if it exists.
-
-ac_cs_usage="Usage: $CONFIG_STATUS [--recheck] [--version] [--help]"
-for ac_option
-do
- case "\$ac_option" in
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- echo "running \${CONFIG_SHELL-/bin/sh} $0 $ac_configure_args --no-create --no-recursion"
- exec \${CONFIG_SHELL-/bin/sh} $0 $ac_configure_args --no-create --no-recursion ;;
- -version | --version | --versio | --versi | --vers | --ver | --ve | --v)
- echo "$CONFIG_STATUS generated by autoconf version 2.13"
- exit 0 ;;
- -help | --help | --hel | --he | --h)
- echo "\$ac_cs_usage"; exit 0 ;;
- *) echo "\$ac_cs_usage"; exit 1 ;;
- esac
-done
-
-ac_given_srcdir=$srcdir
-ac_given_INSTALL="$INSTALL"
-
-trap 'rm -fr `echo "Makefile.sim:Makefile.in Make-common.sim:../common/Make-common.in .gdbinit:../common/gdbinit.in config.h:config.in" | sed "s/:[^ ]*//g"` conftest*; exit 1' 1 2 15
-EOF
-cat >> $CONFIG_STATUS <<EOF
-
-# Protect against being on the right side of a sed subst in config.status.
-sed 's/%@/@@/; s/@%/@@/; s/%g\$/@g/; /@g\$/s/[\\\\&%]/\\\\&/g;
- s/@@/%@/; s/@@/@%/; s/@g\$/%g/' > conftest.subs <<\\CEOF
-$ac_vpsub
-$extrasub
-s%@sim_environment@%$sim_environment%g
-s%@sim_alignment@%$sim_alignment%g
-s%@sim_assert@%$sim_assert%g
-s%@sim_bitsize@%$sim_bitsize%g
-s%@sim_endian@%$sim_endian%g
-s%@sim_hostendian@%$sim_hostendian%g
-s%@sim_float@%$sim_float%g
-s%@sim_scache@%$sim_scache%g
-s%@sim_default_model@%$sim_default_model%g
-s%@sim_hw_cflags@%$sim_hw_cflags%g
-s%@sim_hw_objs@%$sim_hw_objs%g
-s%@sim_hw@%$sim_hw%g
-s%@sim_inline@%$sim_inline%g
-s%@sim_packages@%$sim_packages%g
-s%@sim_regparm@%$sim_regparm%g
-s%@sim_reserved_bits@%$sim_reserved_bits%g
-s%@sim_smp@%$sim_smp%g
-s%@sim_stdcall@%$sim_stdcall%g
-s%@sim_xor_endian@%$sim_xor_endian%g
-s%@WARN_CFLAGS@%$WARN_CFLAGS%g
-s%@WERROR_CFLAGS@%$WERROR_CFLAGS%g
-s%@SHELL@%$SHELL%g
-s%@CFLAGS@%$CFLAGS%g
-s%@CPPFLAGS@%$CPPFLAGS%g
-s%@CXXFLAGS@%$CXXFLAGS%g
-s%@FFLAGS@%$FFLAGS%g
-s%@DEFS@%$DEFS%g
-s%@LDFLAGS@%$LDFLAGS%g
-s%@LIBS@%$LIBS%g
-s%@exec_prefix@%$exec_prefix%g
-s%@prefix@%$prefix%g
-s%@program_transform_name@%$program_transform_name%g
-s%@bindir@%$bindir%g
-s%@sbindir@%$sbindir%g
-s%@libexecdir@%$libexecdir%g
-s%@datadir@%$datadir%g
-s%@sysconfdir@%$sysconfdir%g
-s%@sharedstatedir@%$sharedstatedir%g
-s%@localstatedir@%$localstatedir%g
-s%@libdir@%$libdir%g
-s%@includedir@%$includedir%g
-s%@oldincludedir@%$oldincludedir%g
-s%@infodir@%$infodir%g
-s%@mandir@%$mandir%g
-s%@host@%$host%g
-s%@host_alias@%$host_alias%g
-s%@host_cpu@%$host_cpu%g
-s%@host_vendor@%$host_vendor%g
-s%@host_os@%$host_os%g
-s%@target@%$target%g
-s%@target_alias@%$target_alias%g
-s%@target_cpu@%$target_cpu%g
-s%@target_vendor@%$target_vendor%g
-s%@target_os@%$target_os%g
-s%@build@%$build%g
-s%@build_alias@%$build_alias%g
-s%@build_cpu@%$build_cpu%g
-s%@build_vendor@%$build_vendor%g
-s%@build_os@%$build_os%g
-s%@CC@%$CC%g
-s%@INSTALL_PROGRAM@%$INSTALL_PROGRAM%g
-s%@INSTALL_SCRIPT@%$INSTALL_SCRIPT%g
-s%@INSTALL_DATA@%$INSTALL_DATA%g
-s%@CC_FOR_BUILD@%$CC_FOR_BUILD%g
-s%@HDEFINES@%$HDEFINES%g
-s%@AR@%$AR%g
-s%@RANLIB@%$RANLIB%g
-s%@SET_MAKE@%$SET_MAKE%g
-s%@CPP@%$CPP%g
-s%@ALLOCA@%$ALLOCA%g
-s%@USE_NLS@%$USE_NLS%g
-s%@MSGFMT@%$MSGFMT%g
-s%@GMSGFMT@%$GMSGFMT%g
-s%@XGETTEXT@%$XGETTEXT%g
-s%@USE_INCLUDED_LIBINTL@%$USE_INCLUDED_LIBINTL%g
-s%@CATALOGS@%$CATALOGS%g
-s%@CATOBJEXT@%$CATOBJEXT%g
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-s%@INSTOBJEXT@%$INSTOBJEXT%g
-s%@INTLDEPS@%$INTLDEPS%g
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-s%@l@%$l%g
-s%@MAINT@%$MAINT%g
-s%@sim_bswap@%$sim_bswap%g
-s%@sim_cflags@%$sim_cflags%g
-s%@sim_debug@%$sim_debug%g
-s%@sim_stdio@%$sim_stdio%g
-s%@sim_trace@%$sim_trace%g
-s%@sim_profile@%$sim_profile%g
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-s%@sim_trapdump@%$sim_trapdump%g
-
-CEOF
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-
-cat >> $CONFIG_STATUS <<\EOF
-
-# Split the substitutions into bite-sized pieces for seds with
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- sed "${ac_end}q" conftest.subs > conftest.s$ac_file
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- fi
- ac_file=`expr $ac_file + 1`
- ac_beg=$ac_end
- ac_end=`expr $ac_end + $ac_max_sed_cmds`
- fi
-done
-if test -z "$ac_sed_cmds"; then
- ac_sed_cmds=cat
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-
-cat >> $CONFIG_STATUS <<EOF
-
-CONFIG_FILES=\${CONFIG_FILES-"Makefile.sim:Makefile.in Make-common.sim:../common/Make-common.in .gdbinit:../common/gdbinit.in"}
-EOF
-cat >> $CONFIG_STATUS <<\EOF
-for ac_file in .. $CONFIG_FILES; do if test "x$ac_file" != x..; then
- # Support "outfile[:infile[:infile...]]", defaulting infile="outfile.in".
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- *:*) ac_file_in=`echo "$ac_file"|sed 's%[^:]*:%%'`
- ac_file=`echo "$ac_file"|sed 's%:.*%%'` ;;
- *) ac_file_in="${ac_file}.in" ;;
- esac
-
- # Adjust a relative srcdir, top_srcdir, and INSTALL for subdirectories.
-
- # Remove last slash and all that follows it. Not all systems have dirname.
- ac_dir=`echo $ac_file|sed 's%/[^/][^/]*$%%'`
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- else
- ac_dir_suffix= ac_dots=
- fi
-
- case "$ac_given_srcdir" in
- .) srcdir=.
- if test -z "$ac_dots"; then top_srcdir=.
- else top_srcdir=`echo $ac_dots|sed 's%/$%%'`; fi ;;
- /*) srcdir="$ac_given_srcdir$ac_dir_suffix"; top_srcdir="$ac_given_srcdir" ;;
- *) # Relative path.
- srcdir="$ac_dots$ac_given_srcdir$ac_dir_suffix"
- top_srcdir="$ac_dots$ac_given_srcdir" ;;
- esac
-
- case "$ac_given_INSTALL" in
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- *) INSTALL="$ac_dots$ac_given_INSTALL" ;;
- esac
-
- echo creating "$ac_file"
- rm -f "$ac_file"
- configure_input="Generated automatically from `echo $ac_file_in|sed 's%.*/%%'` by configure."
- case "$ac_file" in
- *Makefile*) ac_comsub="1i\\
-# $configure_input" ;;
- *) ac_comsub= ;;
- esac
-
- ac_file_inputs=`echo $ac_file_in|sed -e "s%^%$ac_given_srcdir/%" -e "s%:% $ac_given_srcdir/%g"`
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-s%@configure_input@%$configure_input%g
-s%@srcdir@%$srcdir%g
-s%@top_srcdir@%$top_srcdir%g
-s%@INSTALL@%$INSTALL%g
-" $ac_file_inputs | (eval "$ac_sed_cmds") > $ac_file
-fi; done
-rm -f conftest.s*
-
-# These sed commands are passed to sed as "A NAME B NAME C VALUE D", where
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-#
-# ac_d sets the value in "#define NAME VALUE" lines.
-ac_dA='s%^\([ ]*\)#\([ ]*define[ ][ ]*\)'
-ac_dB='\([ ][ ]*\)[^ ]*%\1#\2'
-ac_dC='\3'
-ac_dD='%g'
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-ac_uB='\([ ]\)%\1#\2define\3'
-ac_uC=' '
-ac_uD='\4%g'
-# ac_e turns "#undef NAME" without trailing blanks into "#define NAME VALUE".
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-ac_eB='$%\1#\2define\3'
-ac_eC=' '
-ac_eD='%g'
-
-if test "${CONFIG_HEADERS+set}" != set; then
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-cat >> $CONFIG_STATUS <<EOF
- CONFIG_HEADERS="config.h:config.in"
-EOF
-cat >> $CONFIG_STATUS <<\EOF
-fi
-for ac_file in .. $CONFIG_HEADERS; do if test "x$ac_file" != x..; then
- # Support "outfile[:infile[:infile...]]", defaulting infile="outfile.in".
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- ac_file=`echo "$ac_file"|sed 's%:.*%%'` ;;
- *) ac_file_in="${ac_file}.in" ;;
- esac
-
- echo creating $ac_file
-
- rm -f conftest.frag conftest.in conftest.out
- ac_file_inputs=`echo $ac_file_in|sed -e "s%^%$ac_given_srcdir/%" -e "s%:% $ac_given_srcdir/%g"`
- cat $ac_file_inputs > conftest.in
-
-EOF
-
-# Transform confdefs.h into a sed script conftest.vals that substitutes
-# the proper values into config.h.in to produce config.h. And first:
-# Protect against being on the right side of a sed subst in config.status.
-# Protect against being in an unquoted here document in config.status.
-rm -f conftest.vals
-cat > conftest.hdr <<\EOF
-s/[\\&%]/\\&/g
-s%[\\$`]%\\&%g
-s%#define \([A-Za-z_][A-Za-z0-9_]*\) *\(.*\)%${ac_dA}\1${ac_dB}\1${ac_dC}\2${ac_dD}%gp
-s%ac_d%ac_u%gp
-s%ac_u%ac_e%gp
-EOF
-sed -n -f conftest.hdr confdefs.h > conftest.vals
-rm -f conftest.hdr
-
-# This sed command replaces #undef with comments. This is necessary, for
-# example, in the case of _POSIX_SOURCE, which is predefined and required
-# on some systems where configure will not decide to define it.
-cat >> conftest.vals <<\EOF
-s%^[ ]*#[ ]*undef[ ][ ]*[a-zA-Z_][a-zA-Z_0-9]*%/* & */%
-EOF
-
-# Break up conftest.vals because some shells have a limit on
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-
-rm -f conftest.tail
-while :
-do
- ac_lines=`grep -c . conftest.vals`
- # grep -c gives empty output for an empty file on some AIX systems.
- if test -z "$ac_lines" || test "$ac_lines" -eq 0; then break; fi
- # Write a limited-size here document to conftest.frag.
- echo ' cat > conftest.frag <<CEOF' >> $CONFIG_STATUS
- sed ${ac_max_here_lines}q conftest.vals >> $CONFIG_STATUS
- echo 'CEOF
- sed -f conftest.frag conftest.in > conftest.out
- rm -f conftest.in
- mv conftest.out conftest.in
-' >> $CONFIG_STATUS
- sed 1,${ac_max_here_lines}d conftest.vals > conftest.tail
- rm -f conftest.vals
- mv conftest.tail conftest.vals
-done
-rm -f conftest.vals
-
-cat >> $CONFIG_STATUS <<\EOF
- rm -f conftest.frag conftest.h
- echo "/* $ac_file. Generated automatically by configure. */" > conftest.h
- cat conftest.in >> conftest.h
- rm -f conftest.in
- if cmp -s $ac_file conftest.h 2>/dev/null; then
- echo "$ac_file is unchanged"
- rm -f conftest.h
- else
- # Remove last slash and all that follows it. Not all systems have dirname.
- ac_dir=`echo $ac_file|sed 's%/[^/][^/]*$%%'`
- if test "$ac_dir" != "$ac_file" && test "$ac_dir" != .; then
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- test ! -d "$ac_dir" && mkdir "$ac_dir"
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- rm -f $ac_file
- mv conftest.h $ac_file
- fi
-fi; done
-
-EOF
-
-cat >> $CONFIG_STATUS <<EOF
-ac_sources="$sim_link_files"
-ac_dests="$sim_link_links"
-EOF
-
-cat >> $CONFIG_STATUS <<\EOF
-srcdir=$ac_given_srcdir
-while test -n "$ac_sources"; do
- set $ac_dests; ac_dest=$1; shift; ac_dests=$*
- set $ac_sources; ac_source=$1; shift; ac_sources=$*
-
- echo "linking $srcdir/$ac_source to $ac_dest"
-
- if test ! -r $srcdir/$ac_source; then
- { echo "configure: error: $srcdir/$ac_source: File not found" 1>&2; exit 1; }
- fi
- rm -f $ac_dest
-
- # Make relative symlinks.
- # Remove last slash and all that follows it. Not all systems have dirname.
- ac_dest_dir=`echo $ac_dest|sed 's%/[^/][^/]*$%%'`
- if test "$ac_dest_dir" != "$ac_dest" && test "$ac_dest_dir" != .; then
- # The dest file is in a subdirectory.
- test ! -d "$ac_dest_dir" && mkdir "$ac_dest_dir"
- ac_dest_dir_suffix="/`echo $ac_dest_dir|sed 's%^\./%%'`"
- # A "../" for each directory in $ac_dest_dir_suffix.
- ac_dots=`echo $ac_dest_dir_suffix|sed 's%/[^/]*%../%g'`
- else
- ac_dest_dir_suffix= ac_dots=
- fi
-
- case "$srcdir" in
- [/$]*) ac_rel_source="$srcdir/$ac_source" ;;
- *) ac_rel_source="$ac_dots$srcdir/$ac_source" ;;
- esac
-
- # Make a symlink if possible; otherwise try a hard link.
- if ln -s $ac_rel_source $ac_dest 2>/dev/null ||
- ln $srcdir/$ac_source $ac_dest; then :
- else
- { echo "configure: error: can not link $ac_dest to $srcdir/$ac_source" 1>&2; exit 1; }
- fi
-done
-EOF
-cat >> $CONFIG_STATUS <<EOF
-
-EOF
-cat >> $CONFIG_STATUS <<\EOF
-case "x$CONFIG_FILES" in
- xMakefile*)
- echo "Merging Makefile.sim+Make-common.sim into Makefile ..."
- rm -f Makesim1.tmp Makesim2.tmp Makefile
- sed -n -e '/^## COMMON_PRE_/,/^## End COMMON_PRE_/ p' <Make-common.sim >Makesim1.tmp
- sed -n -e '/^## COMMON_POST_/,/^## End COMMON_POST_/ p' <Make-common.sim >Makesim2.tmp
- sed -e '/^## COMMON_PRE_/ r Makesim1.tmp' \
- -e '/^## COMMON_POST_/ r Makesim2.tmp' \
- <Makefile.sim >Makefile
- rm -f Makefile.sim Make-common.sim Makesim1.tmp Makesim2.tmp
- ;;
- esac
- case "x$CONFIG_HEADERS" in xconfig.h:config.in) echo > stamp-h ;; esac
-
-exit 0
-EOF
-chmod +x $CONFIG_STATUS
-rm -fr confdefs* $ac_clean_files
-test "$no_create" = yes || ${CONFIG_SHELL-/bin/sh} $CONFIG_STATUS || exit 1
-
-
diff --git a/sim/d30v/configure.in b/sim/d30v/configure.in
deleted file mode 100644
index 440aac56243..00000000000
--- a/sim/d30v/configure.in
+++ /dev/null
@@ -1,40 +0,0 @@
-dnl Process this file with autoconf to produce a configure script.
-sinclude(../common/aclocal.m4)
-AC_PREREQ(2.5)dnl
-AC_INIT(Makefile.in)
-
-SIM_AC_COMMON
-
-dnl Find a versionn of m4 to use as a preprocessor
-AC_PATH_PROGS(M4, gm4 gnum4 m4, m4)
-
-dnl Options available in this module
-SIM_AC_OPTION_INLINE(0)
-SIM_AC_OPTION_ENDIAN(BIG_ENDIAN)
-SIM_AC_OPTION_ALIGNMENT(STRICT_ALIGNMENT)
-SIM_AC_OPTION_HOSTENDIAN
-SIM_AC_OPTION_WARNINGS
-SIM_AC_OPTION_RESERVED_BITS(1)
-
-AC_SUBST(M4)
-
-#
-# Enable making unknown traps dump out registers
-#
-AC_ARG_ENABLE(sim-trapdump,
-[ --enable-sim-trapdump Make unknown traps dump the registers],
-[case "${enableval}" in
- yes) sim_trapdump="-DTRAPDUMP=1";;
- no) sim_trapdump="-DTRAPDUMP=0";;
- *) AC_MSG_ERROR("Unknown value $enableval passed to --enable-sim-trapdump"); sim_trapdump="";;
-esac
-if test x"$silent" != x"yes" && test x"$sim_trapdump" != x""; then
- echo "Setting sim_trapdump = $sim_trapdump" 6>&1
-fi],[sim_trapdump=""])dnl
-AC_SUBST(sim_trapdump)
-
-dnl For UNIX emulation
-AC_CHECK_HEADERS(stdlib.h unistd.h string.h strings.h)
-
-
-SIM_AC_OUTPUT
diff --git a/sim/d30v/cpu.c b/sim/d30v/cpu.c
deleted file mode 100644
index c14a951c15d..00000000000
--- a/sim/d30v/cpu.c
+++ /dev/null
@@ -1,172 +0,0 @@
-/* Mitsubishi Electric Corp. D30V Simulator.
- Copyright (C) 1997, Free Software Foundation, Inc.
- Contributed by Cygnus Support.
-
-This file is part of GDB, the GNU debugger.
-
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License along
-with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
-
-
-#ifndef _CPU_C_
-#define _CPU_C_
-
-#include "sim-main.h"
-
-
-int
-is_wrong_slot (SIM_DESC sd,
- address_word cia,
- itable_index index)
-{
- switch (STATE_CPU (sd, 0)->unit)
- {
- case memory_unit:
- return !itable[index].option[itable_option_mu];
- case integer_unit:
- return !itable[index].option[itable_option_iu];
- case any_unit:
- return 0;
- default:
- sim_engine_abort (sd, STATE_CPU (sd, 0), cia,
- "internal error - is_wrong_slot - bad switch");
- return -1;
- }
-}
-
-int
-is_condition_ok (SIM_DESC sd,
- address_word cia,
- int cond)
-{
- switch (cond)
- {
- case 0x0:
- return 1;
- case 0x1:
- return PSW_VAL(PSW_F0);
- case 0x2:
- return !PSW_VAL(PSW_F0);
- case 0x3:
- return PSW_VAL(PSW_F1);
- case 0x4:
- return !PSW_VAL(PSW_F1);
- case 0x5:
- return PSW_VAL(PSW_F0) && PSW_VAL(PSW_F1);
- case 0x6:
- return PSW_VAL(PSW_F0) && !PSW_VAL(PSW_F1);
- case 0x7:
- sim_engine_abort (sd, STATE_CPU (sd, 0), cia,
- "is_condition_ok - bad instruction condition bits");
- return 0;
- default:
- sim_engine_abort (sd, STATE_CPU (sd, 0), cia,
- "internal error - is_condition_ok - bad switch");
- return -1;
- }
-}
-
-/* If --trace-call, trace calls, remembering the current state of
- registers. */
-
-typedef struct _call_stack {
- struct _call_stack *prev;
- registers regs;
-} call_stack;
-
-static call_stack *call_stack_head = (call_stack *)0;
-static int call_depth = 0;
-
-void call_occurred (SIM_DESC sd,
- sim_cpu *cpu,
- address_word cia,
- address_word nia)
-{
- call_stack *ptr = ZALLOC (call_stack);
- ptr->regs = cpu->regs;
- ptr->prev = call_stack_head;
- call_stack_head = ptr;
-
- trace_one_insn (sd, cpu, nia, 1, "", 0, "call",
- "Depth %3d, Return 0x%.8lx, Args 0x%.8lx 0x%.8lx",
- ++call_depth, (unsigned long)cia+8, (unsigned long)GPR[2],
- (unsigned long)GPR[3]);
-}
-
-/* If --trace-call, trace returns, checking if any saved register was changed. */
-
-void return_occurred (SIM_DESC sd,
- sim_cpu *cpu,
- address_word cia,
- address_word nia)
-{
- char buffer[1024];
- char *buf_ptr = buffer;
- call_stack *ptr = call_stack_head;
- int regno;
- char *prefix = ", Registers that differ: ";
-
- *buf_ptr = '\0';
- for (regno = 34; regno <= 63; regno++) {
- if (cpu->regs.general_purpose[regno] != ptr->regs.general_purpose[regno]) {
- sprintf (buf_ptr, "%sr%d", prefix, regno);
- buf_ptr += strlen (buf_ptr);
- prefix = " ";
- }
- }
-
- if (cpu->regs.accumulator[1] != ptr->regs.accumulator[1]) {
- sprintf (buf_ptr, "%sa1", prefix);
- buf_ptr += strlen (buf_ptr);
- prefix = " ";
- }
-
- trace_one_insn (sd, cpu, cia, 1, "", 0, "return",
- "Depth %3d, Return 0x%.8lx, Ret. 0x%.8lx 0x%.8lx%s",
- call_depth--, (unsigned long)nia, (unsigned long)GPR[2],
- (unsigned long)GPR[3], buffer);
-
- call_stack_head = ptr->prev;
- zfree (ptr);
-}
-
-
-/* Read/write functions for system call interface. */
-int
-d30v_read_mem (host_callback *cb,
- struct cb_syscall *sc,
- unsigned long taddr,
- char *buf,
- int bytes)
-{
- SIM_DESC sd = (SIM_DESC) sc->p1;
- sim_cpu *cpu = STATE_CPU (sd, 0);
-
- return sim_core_read_buffer (sd, cpu, read_map, buf, taddr, bytes);
-}
-
-int
-d30v_write_mem (host_callback *cb,
- struct cb_syscall *sc,
- unsigned long taddr,
- const char *buf,
- int bytes)
-{
- SIM_DESC sd = (SIM_DESC) sc->p1;
- sim_cpu *cpu = STATE_CPU (sd, 0);
-
- return sim_core_write_buffer (sd, cpu, write_map, buf, taddr, bytes);
-}
-
-#endif /* _CPU_C_ */
diff --git a/sim/d30v/cpu.h b/sim/d30v/cpu.h
deleted file mode 100644
index 56f749ccd73..00000000000
--- a/sim/d30v/cpu.h
+++ /dev/null
@@ -1,249 +0,0 @@
-/* Mitsubishi Electric Corp. D30V Simulator.
- Copyright (C) 1997, Free Software Foundation, Inc.
- Contributed by Cygnus Support.
-
-This file is part of GDB, the GNU debugger.
-
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License along
-with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
-
-
-#ifndef _CPU_H_
-#define _CPU_H_
-
-enum {
- NR_GENERAL_PURPOSE_REGISTERS = 64,
- NR_CONTROL_REGISTERS = 64,
- NR_ACCUMULATORS = 2,
- STACK_POINTER_GPR = 63,
- NR_STACK_POINTERS = 2,
-};
-
-enum {
- processor_status_word_cr = 0,
- backup_processor_status_word_cr = 1,
- program_counter_cr = 2,
- backup_program_counter_cr = 3,
- debug_backup_processor_status_word_cr = 4,
- debug_backup_program_counter_cr = 5,
- reserved_6_cr = 6,
- repeat_count_cr = 7,
- repeat_start_address_cr = 8,
- repeat_end_address_cr = 9,
- modulo_start_address_cr = 10,
- modulo_end_address_cr = 11,
- instruction_break_address_cr = 14,
- eit_vector_base_cr = 15,
-};
-
-
-enum {
- PSW_SM = 0,
- PSW_EA = 2,
- PSW_DB = 3,
- PSW_DS = 4,
- PSW_IE = 5,
- PSW_RP = 6,
- PSW_MD = 7,
- PSW_F0 = 17,
- PSW_F1 = 19,
- PSW_F2 = 21,
- PSW_F3 = 23,
- PSW_S = 25,
- PSW_V = 27,
- PSW_VA = 29,
- PSW_C = 31,
-};
-
-/* aliases for PSW flag numbers (F0..F7) */
-enum
-{
- PSW_S_FLAG = 4,
-};
-
-typedef struct _registers {
- unsigned32 general_purpose[NR_GENERAL_PURPOSE_REGISTERS];
- /* keep track of the stack pointer */
- unsigned32 sp[NR_STACK_POINTERS]; /* swap with SP */
- unsigned32 current_sp;
- unsigned32 control[NR_CONTROL_REGISTERS];
- unsigned64 accumulator[NR_ACCUMULATORS];
-} registers;
-
-typedef enum _cpu_units {
- memory_unit,
- integer_unit,
- any_unit,
-} cpu_units;
-
-/* In order to support parallel instructions, which one instruction can be
- writing to a register that is used as input to another, queue up the
- writes to the end of the instruction boundaries. */
-
-#define MAX_WRITE32 16
-#define MAX_WRITE64 2
-
-struct _write32 {
- int num; /* # of 32-bit writes queued up */
- unsigned32 value[MAX_WRITE32]; /* value to write */
- unsigned32 mask[MAX_WRITE32]; /* mask to use */
- unsigned32 *ptr[MAX_WRITE32]; /* address to write to */
-};
-
-struct _write64 {
- int num; /* # of 64-bit writes queued up */
- unsigned64 value[MAX_WRITE64]; /* value to write */
- unsigned64 *ptr[MAX_WRITE64]; /* address to write to */
-};
-
-struct _sim_cpu {
- cpu_units unit;
- registers regs;
- sim_cpu_base base;
- int trace_call_p; /* Whether to do call tracing. */
- int trace_trap_p; /* If unknown traps dump out the regs */
- int trace_action; /* trace bits at end of instructions */
- int left_kills_right_p; /* left insn kills insn in right slot of -> */
- int mvtsys_left_p; /* left insn was mvtsys */
- int did_trap; /* we did a trap & need to finish it */
- struct _write32 write32; /* queued up 32-bit writes */
- struct _write64 write64; /* queued up 64-bit writes */
-};
-
-#define PC (STATE_CPU (sd, 0)->regs.control[program_counter_cr])
-#define PSW (STATE_CPU (sd, 0)->regs.control[processor_status_word_cr])
-#define PSWL (*AL2_4(&PSW))
-#define PSWH (*AH2_4(&PSW))
-#define DPSW (STATE_CPU (sd, 0)->regs.control[debug_backup_processor_status_word_cr])
-#define DPC (STATE_CPU (sd, 0)->regs.control[debug_backup_program_counter_cr])
-#define bPC (STATE_CPU (sd, 0)->regs.control[backup_program_counter_cr])
-#define bPSW (STATE_CPU (sd, 0)->regs.control[backup_processor_status_word_cr])
-#define RPT_C (STATE_CPU (sd, 0)->regs.control[repeat_count_cr])
-#define RPT_S (STATE_CPU (sd, 0)->regs.control[repeat_start_address_cr])
-#define RPT_E (STATE_CPU (sd, 0)->regs.control[repeat_end_address_cr])
-#define MOD_S (STATE_CPU (sd, 0)->regs.control[modulo_start_address_cr])
-#define MOD_E (STATE_CPU (sd, 0)->regs.control[modulo_end_address_cr])
-#define IBA (STATE_CPU (sd, 0)->regs.control[instruction_break_address_cr])
-#define EIT_VB (STATE_CPU (sd, 0)->regs.control[eit_vector_base_cr])
-#define GPR (STATE_CPU (sd, 0)->regs.general_purpose)
-#define GPR_CLEAR(N) (GPR[(N)] = 0)
-#define ACC (STATE_CPU (sd, 0)->regs.accumulator)
-#define CREG (STATE_CPU (sd, 0)->regs.control)
-#define SP (GPR[STACK_POINTER_GPR])
-#define TRACE_CALL_P (STATE_CPU (sd, 0)->trace_call_p)
-#define TRACE_TRAP_P (STATE_CPU (sd, 0)->trace_trap_p)
-#define TRACE_ACTION (STATE_CPU (sd, 0)->trace_action)
-#define TRACE_ACTION_CALL 0x00000001 /* call occurred */
-#define TRACE_ACTION_RETURN 0x00000002 /* return occurred */
-
-#define WRITE32 (STATE_CPU (sd, 0)->write32)
-#define WRITE32_NUM (WRITE32.num)
-#define WRITE32_PTR(N) (WRITE32.ptr[N])
-#define WRITE32_MASK(N) (WRITE32.mask[N])
-#define WRITE32_VALUE(N) (WRITE32.value[N])
-#define WRITE32_QUEUE(PTR, VALUE) WRITE32_QUEUE_MASK (PTR, VALUE, 0xffffffff)
-
-#define WRITE32_QUEUE_MASK(PTR, VALUE, MASK) \
-do { \
- int _num = WRITE32_NUM; \
- if (_num >= MAX_WRITE32) \
- sim_engine_abort (sd, STATE_CPU (sd, 0), cia, \
- "Too many queued 32-bit writes"); \
- WRITE32_PTR(_num) = PTR; \
- WRITE32_VALUE(_num) = VALUE; \
- WRITE32_MASK(_num) = MASK; \
- WRITE32_NUM = _num+1; \
-} while (0)
-
-#define DID_TRAP (STATE_CPU (sd, 0)->did_trap)
-
-#define WRITE64 (STATE_CPU (sd, 0)->write64)
-#define WRITE64_NUM (WRITE64.num)
-#define WRITE64_PTR(N) (WRITE64.ptr[N])
-#define WRITE64_VALUE(N) (WRITE64.value[N])
-#define WRITE64_QUEUE(PTR, VALUE) \
-do { \
- int _num = WRITE64_NUM; \
- if (_num >= MAX_WRITE64) \
- sim_engine_abort (sd, STATE_CPU (sd, 0), cia, \
- "Too many queued 64-bit writes"); \
- WRITE64_PTR(_num) = PTR; \
- WRITE64_VALUE(_num) = VALUE; \
- WRITE64_NUM = _num+1; \
-} while (0)
-
-#define DPSW_VALID 0xbf005555
-#define PSW_VALID 0xb7005555
-#define EIT_VALID 0xfffff000 /* From page 7-4 of D30V/MPEG arch. manual */
-#define EIT_VB_DEFAULT 0xfffff000 /* Value of the EIT_VB register after reset */
-
-/* Verify that the instruction is in the correct slot */
-
-#define IS_WRONG_SLOT is_wrong_slot(sd, cia, MY_INDEX)
-extern int is_wrong_slot
-(SIM_DESC sd,
- address_word cia,
- itable_index index);
-
-#define IS_CONDITION_OK is_condition_ok(sd, cia, CCC)
-extern int is_condition_ok
-(SIM_DESC sd,
- address_word cia,
- int cond);
-
-#define SIM_HAVE_BREAKPOINTS /* Turn on internal breakpoint module */
-
-/* Internal breakpoint instruction is syscall 5 */
-#define SIM_BREAKPOINT {0x0e, 0x00, 0x00, 0x05}
-#define SIM_BREAKPOINT_SIZE (4)
-
-/* Call occurred */
-extern void call_occurred
-(SIM_DESC sd,
- sim_cpu *cpu,
- address_word cia,
- address_word nia);
-
-/* Return occurred */
-extern void return_occurred
-(SIM_DESC sd,
- sim_cpu *cpu,
- address_word cia,
- address_word nia);
-
-/* Whether to do call tracing. */
-extern int d30v_call_trace_p;
-
-/* Read/write functions for system call interface. */
-extern int d30v_read_mem
-(host_callback *cb,
- struct cb_syscall *sc,
- unsigned long taddr,
- char *buf,
- int bytes);
-
-extern int d30v_write_mem
-(host_callback *cb,
- struct cb_syscall *sc,
- unsigned long taddr,
- const char *buf,
- int bytes);
-
-/* Process all of the queued up writes in order now */
-void unqueue_writes
-(SIM_DESC sd,
- sim_cpu *cpu,
- address_word cia);
-
-#endif /* _CPU_H_ */
diff --git a/sim/d30v/d30v-insns b/sim/d30v/d30v-insns
deleted file mode 100644
index 7b7c3c88deb..00000000000
--- a/sim/d30v/d30v-insns
+++ /dev/null
@@ -1,2424 +0,0 @@
-// -*- C -*-
-// Mitsubishi Electric Corp. D30V Simulator.
-// Copyright (C) 1997, Free Software Foundation, Inc.
-// Contributed by Cygnus Solutions Inc.
-//
-// This file is part of GDB, the GNU debugger.
-//
-// This program is free software; you can redistribute it and/or modify
-// it under the terms of the GNU General Public License as published by
-// the Free Software Foundation; either version 2 of the License, or
-// (at your option) any later version.
-//
-// This program is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-// GNU General Public License for more details.
-//
-// You should have received a copy of the GNU General Public License
-// along with this program; if not, write to the Free Software
-// Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-//
-
-
-define( _BRA, `1.*,CCC,000')
-define( _LOGIC, `1.*,CCC,001')
-define( _IMEM, `1.*,CCC,010')
-define( _IALU1, `1.*,CCC,100')
-define(_IALU2, `1.*,CCC,101')
-
-
-
-define(_IMM6, `6.IMM_6S')
-define(_IMM12, `12.IMM_12S')
-define(_IMM18, `18.IMM_18S')
-define(_IMM32, `6.IMM_6L,*,000,8.IMM_8L,00,18.IMM_18L')
-
-
-
-// The following is called when ever an illegal instruction is
-// encountered
-::internal::illegal
- sim_io_eprintf (sd, "illegal instruction at 0x%lx\n", (long) cia);
- sim_engine_halt (SD, CPU, NULL, cia, sim_signalled, SIM_SIGILL);
-
-// The following is called when ever an instruction in the wrong
-// slot is encountered.
-::internal::wrong_slot
- sim_io_eprintf (sd, "wrong slot at 0x%lx\n", (long) cia);
- sim_engine_halt (SD, CPU, NULL, cia, sim_signalled, SIM_SIGILL);
-
-
-
-// Something illegal that can be used to contact the simulator emul
-// library.
-define(_EMUL, `1.*,CCC,111')
-
-void::function::do_emul:int imm
- /* temp hack - later replace with real interface */
- enum {
- param1 = 2, param2, param3, param4
- };
- switch (imm) {
- case 0:
- {
- sim_engine_abort (SD, CPU, cia, "UNIX call emulation unsupported");
- break;
- }
- case 1:
- /* Trap 1 - prints a string */
- {
- address_word str = GPR[param1];
- char chr;
- while (1) {
- chr = MEM (unsigned, str, 1);
- if (chr == '\0') break;
- sim_io_write_stdout (sd, &chr, sizeof chr);
- str++;
- }
- break;
- }
- case 3:
- /* Trap 3 - writes a character */
- {
- char chr = GPR[param1];
- sim_io_write_stdout (sd, &chr, sizeof chr);
- break;
- }
- case 4:
- /* Trap 4 exits with status in [param1] */
- {
- sim_engine_halt (SD, CPU, NULL, cia, sim_exited, GPR[param1]);
- break;
- }
- case 5:
- /* Trap 5 breakpoints. If the breakpoint system knows about this, it
- won't return. Otherwise, we fall through to treat this as an
- unknown instruction. */
- {
- sim_handle_breakpoint (SD, CPU, cia);
- /* Fall through to default case.*/
- }
- default:
- sim_engine_abort (SD, CPU, cia, "Unknown monitor call %d", imm);
- }
-
-_EMUL,00000,00,6.*,6.*,IMM_6S:EMUL:short,emul:iu,mu:EMUL
-"syscall <imm>"
- do_emul (_SD, imm);
-_BRA,00000,00,6.**,6.**,_IMM32:BRA:long:iu,mu:EMUL long
-"syscall <imm>"
- do_emul (_SD, imm);
-
-// ABS
-
-_IALU1,01000,00,6.RA,6.RB,6.**:IALU1:short:iu,mu:ABS
-"abs r<RA>, r<RB>"
- WRITE32_QUEUE (Ra, abs(Rb));
-
-
-
-// ADD
-
-void::function::do_add:unsigned32 *ra, unsigned32 rb, unsigned32 imm
- ALU_BEGIN(rb);
- ALU_ADDC(imm);
- ALU_END(ra);
-
-_IALU1,00000,00,6.RA,6.RB,6.RC:IALU1:short:iu,mu:ADD
-"add r<RA>, r<RB>, r<RC>"
- do_add (_SD, Ra, Rb, Rc);
-_IALU1,00000,10,6.RA,6.RB,_IMM6:IALU1:short:iu,mu:ADD imm
-"add r<RA>, r<RB>, <imm>"
- do_add (_SD, Ra, Rb, imm);
-_IALU1,00000,10,6.RA,6.RB,_IMM32:IALU1:long:iu,mu:ADD imm long
-"add r<RA>, r<RB>, <imm>"
- do_add (_SD, Ra, Rb, imm);
-
-
-
-// ADD2H
-
-void::function::do_add2h:signed32 *ra, signed32 rb, signed32 imm
- unsigned16 ah2 = VH2_4(rb) + VH2_4(imm);
- unsigned16 al2 = VL2_4(rb) + VL2_4(imm);
- WRITE32_QUEUE (ra, (ah2 << 16) | al2);
-
-_IALU1,00001,00,6.RA,6.RB,6.RC:IALU1:short:iu,mu:ADD2H
-"add2h r<RA>, r<RB>, r<RC>"
- do_add2h (_SD, Ra, Rb, Rc);
-_IALU1,00001,10,6.RA,6.RB,_IMM6:IALU1:short:iu,mu:ADD2H imm
-"add2h r<RA>, r<RB>, <imm>"
- do_add2h (_SD, Ra, Rb, immHL);
-_IALU1,00001,10,6.RA,6.RB,_IMM32:IALU1:long:iu,mu:ADD2H imm long
-"add2h r<RA>, r<RB>, <imm>"
- do_add2h (_SD, Ra, Rb, imm);
-
-
-
-// ADDC
-
-void::function::do_addc:unsigned32 *ra, unsigned32 rb, unsigned32 imm
- ALU_BEGIN(rb);
- ALU_ADDC_C(imm, ALU_CARRY);
- ALU_END(ra);
-
-_IALU1,00100,00,6.RA,6.RB,6.RC:IALU1:short:iu,mu:ADDC
-"addc r<RA>, r<RB>, r<RC>"
- do_addc (_SD, Ra, Rb, Rc);
-_IALU1,00100,10,6.RA,6.RB,_IMM6:IALU1:short:iu,mu:ADDC imm
-"addc r<RA>, r<RB>, <imm>"
- do_addc (_SD, Ra, Rb, imm);
-_IALU1,00100,10,6.RA,6.RB,_IMM32:IALU1:long:iu,mu:ADDC imm long
-"addc r<RA>, r<RB>, <imm>"
- do_addc (_SD, Ra, Rb, imm);
-
-
-
-// ADDHppp
-
-void::function::do_addh_ppp:int ppp, unsigned32 *ra, unsigned32 rb, unsigned32 src
- switch (ppp) {
- case 0x0: /* LLL */
- {
- ALU16_BEGIN(VL2_4(rb));
- ALU16_ADDC(VL2_4(src));
- ALU16_END(ra, 0);
- }
- break;
- case 0x1: /* LLH */
- {
- ALU16_BEGIN(VL2_4(rb));
- ALU16_ADDC(VH2_4(src));
- ALU16_END(ra, 0);
- }
- break;
- case 0x2: /* LHL */
- {
- ALU16_BEGIN(VH2_4(rb));
- ALU16_ADDC(VL2_4(src));
- ALU16_END(ra, 0);
- }
- break;
- case 0x3: /* LHH */
- {
- ALU16_BEGIN(VH2_4(rb));
- ALU16_ADDC(VH2_4(src));
- ALU16_END(ra, 0);
- }
- break;
- case 0x4: /* HLL */
- {
- ALU16_BEGIN(VL2_4(rb));
- ALU16_ADDC(VL2_4(src));
- ALU16_END(ra, 1);
- }
- break;
- case 0x5: /* HLH */
- {
- ALU16_BEGIN(VL2_4(rb));
- ALU16_ADDC(VH2_4(src));
- ALU16_END(ra, 1);
- }
- break;
- case 0x6: /* HHL */
- {
- ALU16_BEGIN(VH2_4(rb));
- ALU16_ADDC(VL2_4(src));
- ALU16_END(ra, 1);
- }
- break;
- case 0x7: /* HHH */
- {
- ALU16_BEGIN(VH2_4(rb));
- ALU16_ADDC(VH2_4(src));
- ALU16_END(ra, 1);
- }
- break;
- default:
- sim_engine_abort (SD, CPU, cia, "do_addh_ppp - internal error - bad switch");
- }
-::%s::ppp:int ppp
- switch (ppp)
- {
- case 0x0: return "lll";
- case 0x1: return "llh";
- case 0x2: return "lhl";
- case 0x3: return "lhh";
- case 0x4: return "hll";
- case 0x5: return "hlh";
- case 0x6: return "hhl";
- case 0x7: return "hhh";
- default: return "?";
- }
-
-_IALU1,10,ppp,00,6.RA,6.RB,6.RC:IALU1:short:iu,mu:ADDHppp
-"addh%s<ppp> r<RA>, r<RB>, r<RC>"
- do_addh_ppp(_SD, ppp, Ra, Rb, Rc);
-_IALU1,10,ppp,10,6.RA,6.RB,_IMM6:IALU1:short:iu,mu:ADDHppp imm
-"addh%s<ppp> r<RA>, r<RB>, <imm>"
- do_addh_ppp(_SD, ppp, Ra, Rb, immHL);
-_IALU1,10,ppp,10,6.RA,6.RB,_IMM32:IALU1:long:iu,mu:ADDHppp imm long
-"addh%s<ppp> r<RA>, r<RB>, <imm>"
- do_addh_ppp(_SD, ppp, Ra, Rb, imm);
-
-
-
-// ADDS
-
-void::function::do_adds:unsigned32 *ra, unsigned32 rb, unsigned32 imm
- ALU_BEGIN(rb);
- ALU_ADDC(EXTRACTED32(imm, 0, 0));
- ALU_END(ra);
-
-_IALU1,00110,00,6.RA,6.RB,6.RC:IALU1:short:iu,mu:ADDS
-"adds r<RA>, r<RB>, r<RC>"
- do_adds (_SD, Ra, Rb, Rc);
-_IALU1,00110,10,6.RA,6.RB,_IMM6:IALU1:short:iu,mu:ADDS imm
-"adds r<RA>, r<RB>, <imm>"
- do_adds (_SD, Ra, Rb, imm);
-_IALU1,00110,10,6.RA,6.RB,_IMM32:IALU1:long:iu,mu:ADDS imm long
-"adds r<RA>, r<RB>, <imm>"
- do_adds (_SD, Ra, Rb, imm);
-
-
-
-// ADDS2H
-
-void::function::do_adds2h:unsigned32 *ra, unsigned32 rb, unsigned32 immHL
- unsigned16 high = VH2_4(rb) + EXTRACTED32(immHL, 0, 0);
- unsigned16 low = VL2_4(rb) + EXTRACTED32(immHL, 16, 16);
- WRITE32_QUEUE (ra, (high << 16) | low);
-
-_IALU1,00111,00,6.RA,6.RB,6.RC:IALU1:short:iu,mu:ADDS2H
-"adds2h r<RA>, r<RB>, r<RC>"
- do_adds2h (_SD, Ra, Rb, Rc);
-_IALU1,00111,10,6.RA,6.RB,_IMM6:IALU1:short:iu,mu:ADDS2H imm
-"adds2h r<RA>, r<RB>, <imm>"
- do_adds2h (_SD, Ra, Rb, immHL);
-_IALU1,00111,10,6.RA,6.RB,_IMM32:IALU1:long:iu,mu:ADDS2H imm long
-"adds2h r<RA>, r<RB>, <imm>"
- do_adds2h (_SD, Ra, Rb, imm);
-
-
-
-// AND
-
-_LOGIC,11000,00,6.RA,6.RB,6.RC:LOGIC:short:iu,mu:AND
-"and r<RA>, r<RB>, r<RC>"
- WRITE32_QUEUE (Ra, Rb & Rc);
-_LOGIC,11000,10,6.RA,6.RB,_IMM6:LOGIC:short:iu,mu:AND imm
-"and r<RA>, r<RB>, <imm>"
- WRITE32_QUEUE (Ra, Rb & imm);
-_LOGIC,11000,10,6.RA,6.RB,_IMM32:LOGIC:long:iu,mu:AND imm long
-"and r<RA>, r<RB>, <imm>"
- WRITE32_QUEUE (Ra, Rb & imm);
-
-
-// ANDFG
-
-_LOGIC,01000,00,***,3.FA,***,3.FB,***,3.FC:LOGIC:short:iu,mu:Logical AND Flags
-"andfg f<FA>, f<FB>, f<FC>"
- PSW_FLAG_SET_QUEUE(FA, PSW_FLAG_VAL(FB) & PSW_FLAG_VAL(FC));
-_LOGIC,01000,10,***,3.FA,***,3.FB,_IMM6:LOGIC:short:iu,mu:Logical AND Flags imm
-"andfg f<FA>, f<FB>, <imm_6>"
- PSW_FLAG_SET_QUEUE(FA, PSW_FLAG_VAL(FB) & (imm_6 & 1));
-
-
-
-// AVG
-
-void::function::do_avg:unsigned32 *ra, unsigned32 rb, unsigned32 imm
- WRITE32_QUEUE (ra, ((signed64)(signed32)rb + (signed64)(signed32)imm + 1) >> 1);
-
-_IALU1,01010,00,6.RA,6.RB,6.RC:IALU1:short:iu,mu:AVG
-"avg r<RA>, r<RB>, r<RC>"
- do_avg (_SD, Ra, Rb, Rc);
-_IALU1,01010,10,6.RA,6.RB,_IMM6:IALU1:short:iu,mu:AVG imm
-"avg r<RA>, r<RB>, <imm>"
- do_avg (_SD, Ra, Rb, imm);
-_IALU1,01010,10,6.RA,6.RB,_IMM32:IALU1:long:iu,mu:AVG imm long
-"avg r<RA>, r<RB>, <imm>"
- do_avg (_SD, Ra, Rb, imm);
-
-
-
-// AVG2H
-
-void::function::do_avg2h:unsigned32 *ra, unsigned32 rb, unsigned32 imm
- unsigned16 high = ((signed32)(signed16)VH2_4(rb) + (signed32)(signed16)VH2_4(imm) + 1) >> 1;
- unsigned16 low = ((signed32)(signed16)VL2_4(rb) + (signed32)(signed16)VL2_4(imm) + 1) >> 1;
- WRITE32_QUEUE (ra, (high << 16) | low);
-
-_IALU1,01011,00,6.RA,6.RB,6.RC:IALU1:short:iu,mu:AVG2H
-"avg2h r<RA>, r<RB>, r<RC>"
- do_avg2h (_SD, Ra, Rb, Rc);
-_IALU1,01011,10,6.RA,6.RB,_IMM6:IALU1:short:iu,mu:AVG2H imm
-"avg2h r<RA>, r<RB>, <imm>"
- do_avg2h (_SD, Ra, Rb, immHL);
-_IALU1,01011,10,6.RA,6.RB,_IMM32:IALU1:long:iu,mu:AVG2H imm long
-"avg2h r<RA>, r<RB>, <imm>"
- do_avg2h (_SD, Ra, Rb, imm);
-
-
-
-// BCLR
-
-_LOGIC,00011,00,6.RA,6.RB,6.RC:LOGIC:short:iu,mu:BCLR
-"bclr r<RA>, r<RB>, r<RC>"
- WRITE32_QUEUE(Ra, Rb & ~BIT32((Rc) % 32));
-_LOGIC,00011,10,6.RA,6.RB,_IMM6:LOGIC:short:iu,mu:BCLR imm
-"bclr r<RA>, r<RB>, <imm>"
- WRITE32_QUEUE(Ra, Rb & ~BIT32((imm) % 32));
-
-
-
-// BNOT
-
-_LOGIC,00001,00,6.RA,6.RB,6.RC:LOGIC:short:iu,mu:BNOT
-"bnot r<RA>, r<RB>, r<RC>"
- WRITE32_QUEUE (Ra, Rb ^ BIT32((Rc) % 32));
-_LOGIC,00001,10,6.RA,6.RB,_IMM6:LOGIC:short:iu,mu:BNOT imm
-"bnot r<RA>, r<RB>, <imm>"
- WRITE32_QUEUE (Ra, Rb ^ BIT32((imm) % 32));
-
-
-
-// BRA
-
-_BRA,00000,00,6.**,6.**,6.RC:BRA:short:mu:BRA
-"bra r<RC>"
- nia = cia + pcdisp;
-_BRA,00000,10,_IMM18:BRA:short:mu:BRA imm
-"bra <pcdisp>"
- nia = cia + pcdisp;
-_BRA,00000,10,6.**,6.**,_IMM32:BRA:long:mu:BRA imm long
-"bra <pcdisp>"
- nia = cia + pcdisp;
-
-
-
-// BRATNZ
-
-_BRA,00100,01,6.RA,6.**,6.RC:BRA:short:mu:BRATNZ
-"bratnz r<RC>"
- if (*Ra != 0)
- nia = cia + pcdisp;
-_BRA,00100,11,6.RA,_IMM12:BRA:short:mu:BRATNZ imm
-"bratnz <pcdisp>"
- if (*Ra != 0)
- nia = cia + pcdisp;
-_BRA,00100,11,6.RA,6.**,_IMM32:BRA:long:mu:BRATNZ imm long
-"bratnz <pcdisp>"
- if (*Ra != 0)
- nia = cia + pcdisp;
-
-
-
-// BRATZR
-
-_BRA,00100,00,6.RA,6.**,6.RC:BRA:short:mu:BRATZR
-"bratzr r<RC>"
- if (val_Ra == 0)
- nia = cia + pcdisp;
-_BRA,00100,10,6.RA,_IMM12:BRA:short:mu:BRATZR imm
-"bratzr <pcdisp>"
- if (val_Ra == 0)
- nia = cia + pcdisp;
-_BRA,00100,10,6.RA,6.**,_IMM32:BRA:long:mu:BRATZR imm long
-"bratzr <pcdisp>"
- if (val_Ra == 0)
- nia = cia + pcdisp;
-
-
-
-// BSET
-
-_LOGIC,00010,00,6.RA,6.RB,6.RC:LOGIC:short:iu,mu:BSET
-"bset r<RA>, r<RB>, r<RC>"
- WRITE32_QUEUE (Ra, Rb | BIT32((Rc) % 32));
-_LOGIC,00010,10,6.RA,6.RB,_IMM6:LOGIC:short:iu,mu:BSET imm
-"bset r<RA>, r<RB>, <imm>"
- WRITE32_QUEUE (Ra, Rb | BIT32((imm) % 32));
-
-
-
-// BSR
-
-_BRA,00010,00,6.**,6.**,6.RC:BRA:short:mu:BSR
-"bsr r<RC>"
- if (cia == RPT_E && PSW_VAL (PSW_RP))
- WRITE32_QUEUE (&GPR[62], RPT_S);
- else
- WRITE32_QUEUE (&GPR[62], cia + 8);
- nia = cia + pcdisp;
- if (TRACE_CALL_P)
- TRACE_ACTION |= TRACE_ACTION_CALL;
-_BRA,00010,10,_IMM18:BRA:short:mu:BSR imm
-"bsr <pcdisp>"
- if (cia == RPT_E && PSW_VAL (PSW_RP))
- WRITE32_QUEUE (&GPR[62], RPT_S);
- else
- WRITE32_QUEUE (&GPR[62], cia + 8);
- nia = cia + pcdisp;
- if (TRACE_CALL_P)
- TRACE_ACTION |= TRACE_ACTION_CALL;
-_BRA,00010,10,6.**,6.**,_IMM32:BRA:long:mu:BSR imm long
-"bsr <pcdisp>"
- if (cia == RPT_E && PSW_VAL (PSW_RP))
- WRITE32_QUEUE (&GPR[62], RPT_S);
- else
- WRITE32_QUEUE (&GPR[62], cia + 8);
- nia = cia + pcdisp;
- if (TRACE_CALL_P)
- TRACE_ACTION |= TRACE_ACTION_CALL;
-
-
-// BSRTNZ
-
-_BRA,00110,01,6.RA,6.**,6.RC:BRA:short:mu:BSRTNZ
-"bsrtnz r<RC>"
- if (val_Ra != 0) {
- if (cia == RPT_E && PSW_VAL (PSW_RP))
- WRITE32_QUEUE (&GPR[62], RPT_S);
- else
- WRITE32_QUEUE (&GPR[62], cia + 8);
- nia = cia + pcdisp;
- if (TRACE_CALL_P)
- TRACE_ACTION |= TRACE_ACTION_CALL;
- }
-
-_BRA,00110,11,6.RA,_IMM12:BRA:short:mu:BSRTNZ imm
-"bsrtnz <pcdisp>"
- if (val_Ra != 0) {
- if (cia == RPT_E && PSW_VAL (PSW_RP))
- WRITE32_QUEUE (&GPR[62], RPT_S);
- else
- WRITE32_QUEUE (&GPR[62], cia + 8);
- nia = cia + pcdisp;
- if (TRACE_CALL_P)
- TRACE_ACTION |= TRACE_ACTION_CALL;
- }
-
-_BRA,00110,11,6.RA,6.**,_IMM32:BRA:long:mu:BSRTNZ imm long
-"bsrtnz <pcdisp>"
- if (val_Ra != 0) {
- if (cia == RPT_E && PSW_VAL (PSW_RP))
- WRITE32_QUEUE (&GPR[62], RPT_S);
- else
- WRITE32_QUEUE (&GPR[62], cia + 8);
- nia = cia + pcdisp;
- if (TRACE_CALL_P)
- TRACE_ACTION |= TRACE_ACTION_CALL;
- }
-
-
-// BSRTZR
-
-_BRA,00110,00,6.RA,6.**,6.RC:BRA:short:mu:BSRTZR
-"bsrtzr r<RC>"
- if (val_Ra == 0) {
- if (cia == RPT_E && PSW_VAL (PSW_RP))
- WRITE32_QUEUE (&GPR[62], RPT_S);
- else
- WRITE32_QUEUE (&GPR[62], cia + 8);
- nia = cia + pcdisp;
- if (TRACE_CALL_P)
- TRACE_ACTION |= TRACE_ACTION_CALL;
- }
-
-_BRA,00110,10,6.RA,_IMM12:BRA:short:mu:BSRTZR imm
-"bsrtzr <pcdisp>"
- if (val_Ra == 0) {
- if (cia == RPT_E && PSW_VAL (PSW_RP))
- WRITE32_QUEUE (&GPR[62], RPT_S);
- else
- WRITE32_QUEUE (&GPR[62], cia + 8);
- nia = cia + pcdisp;
- if (TRACE_CALL_P)
- TRACE_ACTION |= TRACE_ACTION_CALL;
- }
-
-_BRA,00110,10,6.RA,6.**,_IMM32:BRA:long:mu:BSRTZR imm long
-"bsrtzr <pcdisp>"
- if (val_Ra == 0) {
- if (cia == RPT_E && PSW_VAL (PSW_RP))
- WRITE32_QUEUE (&GPR[62], RPT_S);
- else
- WRITE32_QUEUE (&GPR[62], cia + 8);
- nia = cia + pcdisp;
- if (TRACE_CALL_P)
- TRACE_ACTION |= TRACE_ACTION_CALL;
- }
-
-
-// BTST
-
-_LOGIC,00000,00,***,3.FA,6.RB,6.RC:LOGIC:short:iu,mu:BTST
-"btst f<FA>, r<RB>, r<RC>"
- int bit = (Rc) % 32;
- PSW_FLAG_SET_QUEUE(FA, MASKED32(Rb, bit, bit));
-_LOGIC,00000,10,***,3.FA,6.RB,_IMM6:LOGIC:short:iu,mu:BTST imm
-"btst f<FA>, r<RB>, <imm>"
- int bit = imm % 32;
- PSW_FLAG_SET_QUEUE(FA, MASKED32(Rb, bit, bit));
-
-
-
-// CMPcc
-
-void::function::do_cmp_cc:int cc, int fa, signed32 rb, signed32 rc
- int value = 0;
- switch (cc) {
- case 0: /* EQ */
- value = (rb == rc);
- break;
- case 1: /* NE */
- value = (rb != rc);
- break;
- case 2: /* GT */
- value = (rb > rc);
- break;
- case 3: /* GE */
- value = (rb >= rc);
- break;
- case 4: /* LT */
- value = (rb < rc);
- break;
- case 5: /* LE */
- value = (rb <= rc);
- break;
- case 6: /* PS */
- value = ((rb >= 0) && (rc >= 0));
- break;
- case 7: /* NG */
- value = ((rb < 0) && (rc < 0));
- break;
- default:
- sim_engine_abort (SD, CPU, cia, "do_cmp_cc - internal error - bad switch (%d)", cc);
- }
- PSW_FLAG_SET_QUEUE(fa, value);
-
-::%s::ccc:int ccc
- switch (ccc)
- {
- case 0: return "eq";
- case 1: return "ne";
- case 2: return "gt";
- case 3: return "ge";
- case 4: return "lt";
- case 5: return "le";
- case 6: return "ps";
- case 7: return "ng";
- default: return "?";
- }
-
-_LOGIC,01100,00,ccc,3.FA,6.RB,6.RC:LOGIC:short:iu,mu:CMPcc
-"cmp%s<ccc> f<FA>, r<RB>, r<RC>"
- do_cmp_cc(_SD, ccc, FA, Rb, Rc);
-_LOGIC,01100,10,ccc,3.FA,6.RB,_IMM6:LOGIC:short:iu,mu:CMPcc imm
-"cmp%s<ccc> f<FA>, r<RB>, <imm>"
- do_cmp_cc(_SD, ccc, FA, Rb, imm);
-_LOGIC,01100,10,ccc,3.FA,6.RB,_IMM32:LOGIC:long:iu,mu:CMPcc imm long
-"cmp%s<ccc> f<FA>, r<RB>, <imm>"
- do_cmp_cc(_SD, ccc, FA, Rb, imm);
-
-
-
-// CMPUcc
-
-void::function::do_cmpu_cc:int cc, int fa, unsigned32 rb, unsigned32 rc
- int value = 0;
- switch (cc) {
- case 2: /* GT */
- value = (rb > rc);
- break;
- case 3: /* GE */
- value = (rb >= rc);
- break;
- case 4: /* LT */
- value = (rb < rc);
- break;
- case 5: /* LE */
- value = (rb <= rc);
- break;
- default:
- sim_engine_abort (SD, CPU, cia, "do_cmpu_cc - internal error - bad switch (%d)", cc);
- }
- PSW_FLAG_SET_QUEUE(fa, value);
-
-_LOGIC,01101,00,ccc,3.FA,6.RB,6.RC:LOGIC:short:iu,mu:CMPUcc
-"cmpu%s<ccc> f<FA>, r<RB>, r<RC>"
- do_cmpu_cc(_SD, ccc, FA, Rb, Rc);
-_LOGIC,01101,10,ccc,3.FA,6.RB,_IMM6:LOGIC:short:iu,mu:CMPUcc imm
-"cmpu%s<ccc> f<FA>, r<RB>, <imm>"
- do_cmpu_cc(_SD, ccc, FA, Rb, imm_6u);
-_LOGIC,01101,10,ccc,3.FA,6.RB,_IMM32:LOGIC:long:iu,mu:CMPUcc imm long
-"cmpu%s<ccc> f<FA>, r<RB>, <imm>"
- do_cmpu_cc(_SD, ccc, FA, Rb, imm);
-
-
-
-// DBRA
-
-void::function::do_dbra:address_word pcdisp, unsigned32 ra
- PSW_SET_QUEUE (PSW_RP, 1);
- WRITE32_QUEUE (&RPT_C, 1);
- WRITE32_QUEUE (&RPT_S, cia + pcdisp);
- WRITE32_QUEUE (&RPT_E, cia + (ra & ~0x7));
-
-_BRA,10000,00,6.RA,6.**,6.RC:BRA:short:mu:DBRA
-"dbra r<RA>, r<RC>"
- do_dbra(_SD, pcdisp, val_Ra);
-_BRA,10000,10,6.RA,_IMM12:BRA:short:mu:DBRA imm
-"dbra r<RA>, <pcdisp>"
- do_dbra(_SD, pcdisp, val_Ra);
-_BRA,10000,10,6.RA,6.**,_IMM32:BRA:long:mu:DBRA imm long
-"dbra r<RA>, <pcdisp>"
- do_dbra(_SD, pcdisp, val_Ra);
-
-
-
-// DBRAI
-
-void::function::do_dbrai:address_word pcdisp, unsigned32 imm
- PSW_SET_QUEUE (PSW_RP, 1);
- WRITE32_QUEUE (&RPT_C, 1);
- WRITE32_QUEUE (&RPT_S, cia + pcdisp);
- WRITE32_QUEUE (&RPT_E, cia + (imm << 3));
-
-_BRA,10100,00,6.IMM_6,6.**,6.RC:BRA:short:mu:DBRAI
-"dbrai <IMM_6>, r<RC>"
- do_dbrai(_SD, pcdisp, IMM_6);
-_BRA,10100,10,6.IMM_6,_IMM12:BRA:short:mu:DBRAI imm
-"dbrai <IMM_6>, <pcdisp>"
- do_dbrai(_SD, pcdisp, IMM_6);
-_BRA,10100,10,6.IMM_6,6.**,_IMM32:BRA:long:mu:DBRAI imm long
-"dbrai <IMM_6>, <pcdisp>"
- do_dbrai(_SD, pcdisp, IMM_6);
-
-
-
-// DBSR
-
-void::function::do_dbsr:address_word pcdisp, unsigned32 ra
- PSW_SET_QUEUE (PSW_RP, 1);
- WRITE32_QUEUE (&RPT_C, 1);
- WRITE32_QUEUE (&RPT_S, cia + pcdisp);
- WRITE32_QUEUE (&RPT_E, cia + ra);
- WRITE32_QUEUE (&GPR[62], cia + ra + 8);
-
-_BRA,10010,00,6.RA,6.**,6.RC:BRA:short:mu:DBSR
-"dbsr r<RA>, r<RC>"
- do_dbsr(_SD, pcdisp, val_Ra);
-_BRA,10010,10,6.RA,_IMM12:BRA:short:mu:DBSR imm
-"dbsr r<RA>, <pcdisp>"
- do_dbsr(_SD, pcdisp, val_Ra);
-_BRA,10010,10,6.RA,6.**,_IMM32:BRA:long:mu:DBSR imm long
-"dbsr r<RA>, <pcdisp>"
- do_dbsr(_SD, pcdisp, val_Ra);
-
-
-
-// DBSRI
-
-void::function::do_dbsri:address_word pcdisp, unsigned32 imm
- PSW_SET_QUEUE (PSW_RP, 1);
- WRITE32_QUEUE (&RPT_C, 1);
- WRITE32_QUEUE (&RPT_S, cia + pcdisp);
- WRITE32_QUEUE (&RPT_E, cia + (imm << 3));
- WRITE32_QUEUE (&GPR[62], cia + (imm << 3) + 8);
-
-_BRA,10110,00,6.IMM_6,6.**,6.RC:BRA:short:mu:DBSRI
-"dbsri <IMM_6>, r<RC>"
- do_dbsri(_SD, pcdisp, IMM_6);
-_BRA,10110,10,6.IMM_6,_IMM12:BRA:short:mu:DBSRI imm
-"dbsri <IMM_6>, <pcdisp>"
- do_dbsri(_SD, pcdisp, IMM_6);
-_BRA,10110,10,6.IMM_6,6.**,_IMM32:BRA:long:mu:DBSRI imm long
-"dbsri <IMM_6>, <pcdisp>"
- do_dbsri(_SD, pcdisp, IMM_6);
-
-
-
-// DBT
-
-
-_BRA,01011,00,6.**,6.**,6.**:BRA:short:mu:DBT
-"dbt"
- if (cia == RPT_E && PSW_VAL (PSW_RP))
- {
- WRITE32_QUEUE (&DPC, RPT_S);
- if (RPT_C == 0)
- PSW_SET (PSW_RP, 0);
- }
- else
- WRITE32_QUEUE (&DPC, cia + 8);
- DID_TRAP = 2;
- nia = 0xfffff120; /* debug_trap_address */
-
-// DJMP
-
-void::function::do_djmp:address_word pcdisp, unsigned32 ra
- PSW_SET_QUEUE (PSW_RP, 1);
- WRITE32_QUEUE (&RPT_C, 1);
- WRITE32_QUEUE (&RPT_S, pcdisp);
- WRITE32_QUEUE (&RPT_E, cia + (ra & ~0x7));
-
-_BRA,10001,00,6.RA,6.**,6.RC:BRA:short:mu:DJMP
-"djmp r<RA>, r<RC>"
- do_djmp(_SD, pcdisp, val_Ra);
-_BRA,10001,10,6.RA,_IMM12:BRA:short:mu:DJMP imm
-"djmp r<RA>, <pcdisp>"
- do_djmp(_SD, pcdisp, val_Ra);
-_BRA,10001,10,6.RA,6.**,_IMM32:BRA:long:mu:DJMP imm long
-"djmp r<RA>, <pcdisp>"
- do_djmp(_SD, pcdisp, val_Ra);
-
-
-
-// DJMPI
-
-void::function::do_djmpi:address_word pcdisp, unsigned32 imm
- PSW_SET_QUEUE (PSW_RP, 1);
- WRITE32_QUEUE (&RPT_C, 1);
- WRITE32_QUEUE (&RPT_S, pcdisp);
- WRITE32_QUEUE (&RPT_E, cia + (imm << 3));
-
-_BRA,10101,00,6.IMM_6,6.**,6.RC:BRA:short:mu:DJMPI
-"djmpi <IMM_6>, r<RC>"
- do_djmpi(_SD, pcdisp, IMM_6);
-_BRA,10101,10,6.IMM_6,_IMM12:BRA:short:mu:DJMPI imm
-"djmpi <IMM_6>, <pcdisp>"
- do_djmpi(_SD, pcdisp, IMM_6);
-_BRA,10101,10,6.IMM_6,6.**,_IMM32:BRA:long:mu:DJMPI imm long
-"djmpi <IMM_6>, <pcdisp>"
- do_djmpi(_SD, pcdisp, IMM_6);
-
-
-
-// DJSR
-
-void::function::do_djsr:address_word pcdisp, unsigned32 ra
- PSW_SET_QUEUE (PSW_RP, 1);
- WRITE32_QUEUE (&RPT_C, 1);
- WRITE32_QUEUE (&RPT_S, pcdisp);
- WRITE32_QUEUE (&RPT_E, cia + (ra & ~0x7));
- WRITE32_QUEUE (&GPR[62], cia + (ra & ~0x7) + 8);
-
-_BRA,10011,00,6.RA,6.**,6.RC:BRA:short:mu:DJSR
-"djsr r<RA>, r<RC>"
- do_djsr(_SD, pcdisp, val_Ra);
-_BRA,10011,10,6.RA,_IMM12:BRA:short:mu:DJSR imm
-"djsr r<RA>, <pcdisp>"
- do_djsr(_SD, pcdisp, val_Ra);
-_BRA,10011,10,6.RA,6.**,_IMM32:BRA:long:mu:DJSR imm long
-"djsr r<RA>, <pcdisp>"
- do_djsr(_SD, pcdisp, val_Ra);
-
-
-
-// DJSRI
-
-void::function::do_djsri:address_word pcdisp, unsigned32 imm
- PSW_SET_QUEUE (PSW_RP, 1);
- WRITE32_QUEUE (&RPT_C, 1);
- WRITE32_QUEUE (&RPT_S, pcdisp);
- WRITE32_QUEUE (&RPT_E, cia + (imm << 3));
- WRITE32_QUEUE (&GPR[62], cia + (imm << 3) + 8);
-
-_BRA,10111,00,6.IMM_6,6.**,6.RC:BRA:short:mu:DJSRI
-"djsri <IMM_6>, r<RC>"
- do_djsri(_SD, pcdisp, IMM_6);
-_BRA,10111,10,6.IMM_6,_IMM12:BRA:short:mu:DJSRI imm
-"djsri <IMM_6>, <pcdisp>"
- do_djsri(_SD, pcdisp, IMM_6);
-_BRA,10111,10,6.IMM_6,6.**,_IMM32:BRA:long:mu:DJSRI imm long
-"djsri <IMM_6>, <pcdisp>"
- do_djsri(_SD, pcdisp, IMM_6);
-
-
-
-// JMP
-
-_BRA,00001,00,6.**,6.**,6.RC:BRA:short:mu:JMP
-"jmp r<RC>"
- nia = pcaddr;
- if (RC == 62 && TRACE_CALL_P)
- TRACE_ACTION |= TRACE_ACTION_RETURN;
-_BRA,00001,10,_IMM18:BRA:short:mu:JMP imm
-"jmp <pcdisp>"
- nia = pcaddr;
-_BRA,00001,10,6.**,6.**,_IMM32:BRA:long:mu:JMP imm long
-"jmp <pcdisp>"
- nia = pcaddr;
-
-
-
-// JMPTNZ
-
-_BRA,00101,01,6.RA,6.**,6.RC:BRA:short:mu:JMPTNZ
-"jmptnz r<RC>"
- if (val_Ra != 0)
- nia = pcaddr;
-_BRA,00101,11,6.RA,_IMM12:BRA:short:mu:JMPTNZ imm
-"jmptnz <pcdisp>"
- if (val_Ra != 0)
- nia = pcaddr;
-_BRA,00101,11,6.RA,6.**,_IMM32:BRA:long:mu:JMPTNZ imm long
-"jmptnz <pcdisp>"
- if (val_Ra != 0)
- nia = pcaddr;
-
-
-
-// JMPTZR
-
-_BRA,00101,00,6.RA,6.**,6.RC:BRA:short:mu:JMPTZR
-"jmptzr r<RC>"
- if (val_Ra == 0)
- nia = pcaddr;
-_BRA,00101,10,6.RA,_IMM12:BRA:short:mu:JMPTZR imm
-"jmptzr <pcdisp>"
- if (val_Ra == 0)
- nia = pcaddr;
-_BRA,00101,10,6.RA,6.**,_IMM32:BRA:long:mu:JMPTZR imm long
-"jmptzr <pcdisp>"
- if (val_Ra == 0)
- nia = pcaddr;
-
-
-
-// JOINpp
-
-void::function::do_join_pp:int pp, unsigned32 *ra, unsigned32 rb, unsigned32 src
- switch (pp) {
- case 0x0: /* LL */
- WRITE32_QUEUE (ra, ((unsigned32)VL2_4(rb) << 16) | VL2_4(src));
- break;
- case 0x1: /* LH */
- WRITE32_QUEUE (ra, ((unsigned32)VL2_4(rb) << 16) | VH2_4(src));
- break;
- case 0x2: /* HL */
- WRITE32_QUEUE (ra, ((unsigned32)VH2_4(rb) << 16) | VL2_4(src));
- break;
- case 0x3: /* HH */
- WRITE32_QUEUE (ra, ((unsigned32)VH2_4(rb) << 16) | VH2_4(src));
- break;
- }
-
-::%s::pp:int pp
- switch (pp)
- {
- case 0x0: return "ll";
- case 0x1: return "lh";
- case 0x2: return "hl";
- case 0x3: return "hh";
- default: return "?";
- }
-
-_IALU1,011,pp,00,6.RA,6.RB,6.RC:IALU1:short:iu,mu:JOINpp
-"join%s<pp> r<RA>, r<RB>, r<RC>"
- do_join_pp(_SD, pp, Ra, Rb, Rc);
-_IALU1,011,pp,10,6.RA,6.RB,_IMM6:IALU1:short:iu,mu:JOINpp imm
-"join%s<pp> r<RA>, r<RB>, <imm>"
- do_join_pp(_SD, pp, Ra, Rb, immHL);
-_IALU1,011,pp,10,6.RA,6.RB,_IMM32:IALU1:long:iu,mu:JOINpp imm long
-"join%s<pp> r<RA>, r<RB>, <imm>"
- do_join_pp(_SD, pp, Ra, Rb, immHL);
-
-
-
-// JSR
-
-_BRA,00011,00,6.**,6.**,6.RC:BRA:short:mu:JSR
-"jsr r<RC>"
- if (cia == RPT_E && PSW_VAL (PSW_RP))
- WRITE32_QUEUE (&GPR[62], RPT_S);
- else
- WRITE32_QUEUE (&GPR[62], cia + 8);
- if (TRACE_CALL_P)
- TRACE_ACTION |= TRACE_ACTION_CALL;
- return pcaddr;
-_BRA,00011,10,_IMM18:BRA:short:mu:JSR imm
-"jsr <pcdisp>"
- if (cia == RPT_E && PSW_VAL (PSW_RP))
- WRITE32_QUEUE (&GPR[62], RPT_S);
- else
- WRITE32_QUEUE (&GPR[62], cia + 8);
- if (TRACE_CALL_P)
- TRACE_ACTION |= TRACE_ACTION_CALL;
- return pcaddr;
-_BRA,00011,10,6.**,6.**,_IMM32:BRA:long:mu:JSR imm long
-"jsr <pcdisp>"
- if (cia == RPT_E && PSW_VAL (PSW_RP))
- WRITE32_QUEUE (&GPR[62], RPT_S);
- else
- WRITE32_QUEUE (&GPR[62], cia + 8);
- if (TRACE_CALL_P)
- TRACE_ACTION |= TRACE_ACTION_CALL;
- return pcaddr;
-
-
-// JSRTNZ
-
-_BRA,00111,01,6.RA,6.**,6.RC:BRA:short:mu:JSRTNZ
-"jsrtnz r<RC>"
- if (val_Ra != 0) {
- if (cia == RPT_E && PSW_VAL (PSW_RP))
- WRITE32_QUEUE (&GPR[62], RPT_S);
- else
- WRITE32_QUEUE (&GPR[62], cia + 8);
- nia = pcaddr;
- if (TRACE_CALL_P)
- TRACE_ACTION |= TRACE_ACTION_CALL;
- }
-_BRA,00111,11,6.RA,_IMM12:BRA:short:mu:JSRTNZ imm
-"jsrtnz <pcdisp>"
- if (val_Ra != 0) {
- if (cia == RPT_E && PSW_VAL (PSW_RP))
- WRITE32_QUEUE (&GPR[62], RPT_S);
- else
- WRITE32_QUEUE (&GPR[62], cia + 8);
- nia = pcaddr;
- if (TRACE_CALL_P)
- TRACE_ACTION |= TRACE_ACTION_CALL;
- }
-_BRA,00111,11,6.RA,6.**,_IMM32:BRA:long:mu:JSRTNZ imm long
-"jsrtnz <pcdisp>"
- if (val_Ra != 0) {
- if (cia == RPT_E && PSW_VAL (PSW_RP))
- WRITE32_QUEUE (&GPR[62], RPT_S);
- else
- WRITE32_QUEUE (&GPR[62], cia + 8);
- nia = pcaddr;
- if (TRACE_CALL_P)
- TRACE_ACTION |= TRACE_ACTION_CALL;
- }
-
-
-
-// JSRTZR
-
-_BRA,00111,00,6.RA,6.**,6.RC:BRA:short:mu:JSRTZR
-"jsrtzr r<RC>"
- if (val_Ra == 0) {
- if (cia == RPT_E && PSW_VAL (PSW_RP))
- WRITE32_QUEUE (&GPR[62], RPT_S);
- else
- WRITE32_QUEUE (&GPR[62], cia + 8);
- nia = pcaddr;
- if (TRACE_CALL_P)
- TRACE_ACTION |= TRACE_ACTION_CALL;
- }
-_BRA,00111,10,6.RA,_IMM12:BRA:short:mu:JSRTZR imm
-"jsrtzr <pcdisp>"
- if (val_Ra == 0) {
- if (cia == RPT_E && PSW_VAL (PSW_RP))
- WRITE32_QUEUE (&GPR[62], RPT_S);
- else
- WRITE32_QUEUE (&GPR[62], cia + 8);
- nia = pcaddr;
- if (TRACE_CALL_P)
- TRACE_ACTION |= TRACE_ACTION_CALL;
- }
-_BRA,00111,10,6.RA,6.**,_IMM32:BRA:long:mu:JSRTZR imm long
-"jsrtzr <pcdisp>"
- if (val_Ra == 0) {
- if (cia == RPT_E && PSW_VAL (PSW_RP))
- WRITE32_QUEUE (&GPR[62], RPT_S);
- else
- WRITE32_QUEUE (&GPR[62], cia + 8);
- nia = pcaddr;
- if (TRACE_CALL_P)
- TRACE_ACTION |= TRACE_ACTION_CALL;
- }
-
-
-
-// Post increment
-
-void::function::do_incr:int x, unsigned32 *rb, int delta
- unsigned32 next_rb;
- if (x == 1)
- next_rb = *rb + delta;
- else if (x == 3)
- next_rb = *rb - delta;
- else
- next_rb = *rb; /* value not used */
- /* HW erratum: check value after incrementing */
- if (next_rb == MOD_E
- && (x == 1 || x == 3)
- && (PSW_VAL(PSW_MD))) {
- WRITE32_QUEUE (rb, MOD_S);
- }
- else if (x == 1 || x == 3)
- WRITE32_QUEUE (rb, next_rb);
-
-// LD2H
-
-int::function::make_even_reg:int reg, const char *name
- if (reg & 1)
- sim_engine_abort (SD, CPU, cia,
- "0x%lx:%s odd register (r%d) used in multi-word load/mulx2h",
- (long) cia, name, reg);
- return reg;
-
-void::function::do_ld2h:int ra, unsigned32 rb, unsigned32 src
- signed32 mem;
- ra = make_even_reg(_SD, ra, "LD2H");
- mem = MEM(signed, rb + src, 4);
- if (ra != 0)
- {
- WRITE32_QUEUE (&GPR[ra + 0], SEXT32(EXTRACTED32(mem, 0, 15), 16));
- WRITE32_QUEUE (&GPR[ra + 1], SEXT32(EXTRACTED32(mem, 16, 31), 16));
- }
-
-::%s::XX:int XX
- switch (XX)
- {
- case 0: return "";
- case 1: return "+";
- case 3: return "-";
- default: return "?";
- }
-
-_IMEM,00011,XX,6.RA,6.RB,6.SRC_6:IMEM:short:mu:LD2H
-"ld2h r<RA>, @(r<RB>, <SRC_6>)":XX == 0
-"ld2h r<RA>, @(r<RB>%s<XX>, r<SRC_6>)"
- do_ld2h(_SD, RA, Rb, src);
- do_incr(_SD, XX, &GPR[RB], 4);
-_IMEM,00011,10,6.RA,6.RB,_IMM32:IMEM:long:mu:LD2H long
-"ld2h r<RA>, @(r<RB>, <imm>)"
- do_ld2h(_SD, RA, Rb, imm);
-
-
-
-// LD2W
-
-void::function::do_ld2w:int ra, unsigned32 rb, unsigned32 src
- unsigned64 mem;
- ra = make_even_reg(_SD, ra, "LD2W");
- mem = MEM(unsigned, rb + src, 8);
- if (ra != 0)
- {
- WRITE32_QUEUE (&GPR[ra + 0], EXTRACTED64 (mem, 0, 31));
- WRITE32_QUEUE (&GPR[ra + 1], EXTRACTED64 (mem, 32, 63));
- }
-
-_IMEM,00110,XX,6.RA,6.RB,6.SRC_6:IMEM:short:mu:L2W
-"ld2w r<RA>, @(r<RB>, <SRC_6>)":XX == 0
-"ld2w r<RA>, @(r<RB>%s<XX>, r<SRC_6>)"
- do_ld2w(_SD, RA, Rb, src);
- do_incr(_SD, XX, &GPR[RB], 8);
-_IMEM,00110,10,6.RA,6.RB,_IMM32:IMEM:long:mu:L2W long
-"ld2w r<RA>, @(r<RB>, <imm>)"
- do_ld2w(_SD, RA, Rb, imm);
-
-
-
-// LD4BH
-
-void::function::do_ld4bh:unsigned32 ra, unsigned32 rb, unsigned32 src
- unsigned16 l1, l2, h1, h2;
- unsigned32 mem;
- ra = make_even_reg(_SD, ra, "LD4BH");
- mem = MEM(unsigned, rb + src, 4);
- h1 = SEXT16(EXTRACTED32(mem, 0, 7), 8);
- l1 = SEXT16(EXTRACTED32(mem, 8, 15), 8);
- h2 = SEXT16(EXTRACTED32(mem, 16, 23), 8);
- l2 = SEXT16(EXTRACTED32(mem, 24, 31), 8);
- if (ra != 0)
- {
- WRITE32_QUEUE (&GPR[ra + 0], (h1 << 16) | l1);
- WRITE32_QUEUE (&GPR[ra + 1], (h2 << 16) | l2);
- }
-
-_IMEM,00101,XX,6.RA,6.RB,6.SRC_6:IMEM:short:mu:LD4BH
-"ld4bh r<RA>, @(r<RB>, <SRC_6>)":XX == 0
-"ld4bh r<RA>, @(r<RB>%s<XX>, r<SRC_6>)"
- do_ld4bh(_SD, RA, Rb, src);
- do_incr(_SD, XX, &GPR[RB], 4);
-_IMEM,00101,10,6.RA,6.RB,_IMM32:IMEM:long:mu:LD4BH long
-"ld4bh r<RA>, @(r<RB>, <imm>)"
- do_ld4bh(_SD, RA, Rb, imm);
-
-
-
-// LD4BHU
-
-void::function::do_ld4bhu:unsigned32 ra, unsigned32 rb, unsigned32 src
- unsigned16 l1, l2, h1, h2;
- unsigned32 mem;
- ra = make_even_reg(_SD, ra, "LD4BH");
- mem = MEM(signed, rb + src, 4);
- h1 = EXTRACTED32(mem, 0, 7);
- l1 = EXTRACTED32(mem, 8, 15);
- h2 = EXTRACTED32(mem, 16, 23);
- l2 = EXTRACTED32(mem, 24, 31);
- if (ra != 0)
- {
- WRITE32_QUEUE (&GPR[ra + 0], (h1 << 16) | l1);
- WRITE32_QUEUE (&GPR[ra + 1], (h2 << 16) | l2);
- }
-
-_IMEM,01101,XX,6.RA,6.RB,6.SRC_6:IMEM:short:mu:LD4BHU
-"ld4hbu r<RA>, @(r<RB>, <SRC_6>)":XX == 0
-"ld4hbu r<RA>, @(r<RB>%s<XX>, r<SRC_6>)"
- do_ld4bhu(_SD, RA, Rb, src);
- do_incr(_SD, XX, &GPR[RB], 4);
-_IMEM,01101,10,6.RA,6.RB,_IMM32:IMEM:long:mu:LD4BHU long
-"ld4hbu r<RA>, @(r<RB>, <imm>)"
- do_ld4bhu(_SD, RA, Rb, imm);
-
-
-
-// LDB
-
-void::function::do_ldb:unsigned32 *ra, unsigned32 rb, unsigned32 src
- WRITE32_QUEUE (ra, MEM(signed, rb + src, 1));
-
-_IMEM,00000,XX,6.RA,6.RB,6.SRC_6:IMEM:short:mu:LDB
-"ldb r<RA>, @(r<RB>, <SRC_6>)":XX == 0
-"ldb r<RA>, @(r<RB>%s<XX>, r<SRC_6>)"
- do_ldb(_SD, Ra, Rb, src);
- do_incr(_SD, XX, &GPR[RB], 1);
-_IMEM,00000,10,6.RA,6.RB,_IMM32:IMEM:long:mu:LDB long
-"ldb r<RA>, @(r<RB>, <imm>)"
- do_ldb(_SD, Ra, Rb, imm);
-
-
-
-// LDBU
-
-void::function::do_ldbu:unsigned32 *ra, unsigned32 rb, unsigned32 src
- WRITE32_QUEUE (ra, MEM(unsigned, rb + src, 1));
-
-_IMEM,01001,XX,6.RA,6.RB,6.SRC_6:IMEM:short:mu:LDBU
-"ldbu r<RA>, @(r<RB>, <SRC_6>)":XX == 0
-"ldbu r<RA>, @(r<RB>%s<XX>, r<SRC_6>)"
- do_ldbu(_SD, Ra, Rb, src);
- do_incr(_SD, XX, &GPR[RB], 1);
-_IMEM,01001,10,6.RA,6.RB,_IMM32:IMEM:long:mu:LDBU long
-"ldbu r<RA>, @(r<RB>, <imm>)"
- do_ldbu(_SD, Ra, Rb, imm);
-
-
-
-// LDH
-
-void::function::do_ldh:unsigned32 *ra, unsigned32 rb, unsigned32 src
- WRITE32_QUEUE (ra, MEM(signed, rb + src, 2));
-
-_IMEM,00010,XX,6.RA,6.RB,6.SRC_6:IMEM:short:mu:LDH
-"ldh r<RA>, @(r<RB>, <SRC_6>)":XX == 0
-"ldh r<RA>, @(r<RB>%s<XX>, r<SRC_6>)"
- do_ldh(_SD, Ra, Rb, src);
- do_incr(_SD, XX, &GPR[RB], 2);
-_IMEM,00010,10,6.RA,6.RB,_IMM32:IMEM:long:mu:LDH long
-"ldh r<RA>, @(r<RB>, <imm>)"
- do_ldh(_SD, Ra, Rb, imm);
-
-
-
-// LDHH
-
-void::function::do_ldhh:unsigned32 *ra, unsigned32 rb, unsigned32 src
- WRITE32_QUEUE (ra, MEM(signed, rb + src, 2) << 16);
-
-_IMEM,00001,XX,6.RA,6.RB,6.SRC_6:IMEM:short:mu:LDHH
-"ldhh r<RA>, @(r<RB>, <SRC_6>)":XX == 0
-"ldhh r<RA>, @(r<RB>%s<XX>, r<SRC_6>)"
- do_ldhh(_SD, Ra, Rb, src);
- do_incr(_SD, XX, &GPR[RB], 2);
-_IMEM,00001,10,6.RA,6.RB,_IMM32:IMEM:long:mu:LDHH long
-"ldhh r<RA>, @(r<RB>, <imm>)"
- do_ldhh(_SD, Ra, Rb, imm);
-
-
-
-// LDHU
-
-void::function::do_ldhu:unsigned32 *ra, unsigned32 rb, unsigned32 src
- WRITE32_QUEUE (ra, MEM(unsigned, rb + src, 2));
-
-_IMEM,01010,XX,6.RA,6.RB,6.SRC_6:IMEM:short:mu:LDHU
-"ldhu r<RA>, @(r<RB>, <SRC_6>)":XX == 0
-"ldhu r<RA>, @(r<RB>%s<XX>, r<SRC_6>)"
- do_ldhu(_SD, Ra, Rb, src);
- do_incr(_SD, XX, &GPR[RB], 2);
-_IMEM,01010,10,6.RA,6.RB,_IMM32:IMEM:long:mu:LDHU long
-"ldhu r<RA>, @(r<RB>, <imm>)"
- do_ldhu(_SD, Ra, Rb, imm);
-
-
-
-// LDW
-
-void::function::do_ldw:unsigned32 *ra, unsigned32 rb, unsigned32 src
- WRITE32_QUEUE (ra, MEM(signed, rb + src, 4));
-
-_IMEM,00100,XX,6.RA,6.RB,6.SRC_6:IMEM:short:mu:LDW
-"ldw r<RA>, @(r<RB>, <SRC_6>)":XX == 0
-"ldw r<RA>, @(r<RB>%s<XX>, r<SRC_6>)"
- do_ldw(_SD, Ra, Rb, src);
- do_incr(_SD, XX, &GPR[RB], 4);
-_IMEM,00100,10,6.RA,6.RB,_IMM32:IMEM:long:mu:LDW long
-"ldw r<RA>, @(r<RB>, <imm>)"
- do_ldw(_SD, Ra, Rb, imm);
-
-
-
-// MACa
-
-void::function::do_mac:unsigned64 *aa, unsigned32 *ra, signed32 rb, signed32 src
- unsigned64 accum = *aa;
- accum += (signed64) (rb) * (signed64) (src);
- WRITE64_QUEUE (aa, accum);
- WRITE32_QUEUE (ra, EXTRACTED64(accum, 32, 63));
-
-_IALU2,10100,0,1.AA,6.RA,6.RB,6.RC:IALU2:short:iu:MACa
-"mac<AA> r<RA>, r<RB>, r<RC>"
- do_mac(_SD, Aa, Ra, Rb, Rc);
-_IALU2,10100,1,1.AA,6.RA,6.RB,_IMM6:IALU2:short:iu:MACa imm
-"mac<AA> r<RA>, r<RB>, <imm>"
- do_mac(_SD, Aa, Ra, Rb, imm);
-
-
-
-// MACSa
-
-void::function::do_macs:unsigned64 *aa, unsigned32 *ra, signed32 rb, signed32 src
- unsigned64 accum = *aa;
- accum += ((signed64) (rb) * (signed64) (src)) << 1;
- WRITE64_QUEUE (aa, accum);
- WRITE32_QUEUE (ra, EXTRACTED64(accum, 0, 31));
-
-_IALU2,10101,0,1.AA,6.RA,6.RB,6.RC:IALU2:short:iu:MACSa
-"macs<AA> r<RA>, r<RB>, r<RC>"
- do_macs(_SD, Aa, Ra, Rb, Rc);
-_IALU2,10101,1,1.AA,6.RA,6.RB,_IMM6:IALU2:short:iu:MACSa imm
-"macs<AA> r<RA>, r<RB>, <imm>"
- do_macs(_SD, Aa, Ra, Rb, imm);
-
-
-
-// MODDEC | MODINC
-
-_IMEM,00111,11,6.**,6.RB,_IMM6:IMEM:short:mu:MODDEC
-"moddec r<RB>, <imm>"
- do_incr(_SD, 3/*0b11*/, &GPR[RB], imm_5);
-_IMEM,00111,01,6.**,6.RB,_IMM6:IMEM:short:mu:MODINC
-"modinc r<RB>, <imm>"
- do_incr(_SD, 1/*0b01*/, &GPR[RB], imm_5);
-
-
-
-// MSUBa
-
-void::function::do_msub:unsigned64 *aa, unsigned32 *ra, signed32 rb, signed32 src
- unsigned64 accum = *aa;
- accum -= (signed64) (rb) * (signed64) (src);
- WRITE64_QUEUE (aa, accum);
- WRITE32_QUEUE (ra, EXTRACTED64(accum, 32, 63));
-
-_IALU2,10110,0,1.AA,6.RA,6.RB,6.RC:IALU2:short:iu:MSUBa
-"msub<AA> r<RA>, r<RB>, r<RC>"
- do_msub(_SD, Aa, Ra, Rb, Rc);
-_IALU2,10110,1,1.AA,6.RA,6.RB,_IMM6:IALU2:short:iu:MSUBa imm
-"msub<AA> r<RA>, r<RB>, <imm>"
- do_msub(_SD, Aa, Ra, Rb, imm);
-
-
-
-// MSUBSa
-
-void::function::do_msubs:unsigned64 *aa, unsigned32 *ra, signed32 rb, signed32 src
- unsigned64 accum = *aa;
- accum -= ((signed64) (rb) * (signed64) (src)) << 1;
- WRITE64_QUEUE (aa, accum);
- WRITE32_QUEUE (ra, EXTRACTED64(accum, 0, 31));
-
-_IALU2,10111,0,1.AA,6.RA,6.RB,6.RC:IALU2:short:iu:MSUBSa
-"msubs<AA> r<RA>, r<RB>, r<RC>"
- do_msubs(_SD, Aa, Ra, Rb, Rc);
-_IALU2,10111,1,1.AA,6.RA,6.RB,_IMM6:IALU2:short:iu:MSUBSa imm
-"msubs<AA> r<RA>, r<RB>, <imm>"
- do_msubs(_SD, Aa, Ra, Rb, imm);
-
-
-
-// MUL
-
-void::function::do_mul:unsigned32 *ra, unsigned32 rb, unsigned32 src
- WRITE32_QUEUE (ra, rb * src);
-
-_IALU2,10000,00,6.RA,6.RB,6.RC:IALU2:short:iu:MUL
-"mul r<RA>, r<RB>, r<RC>"
- do_mul(_SD, Ra, Rb, Rc);
-_IALU2,10000,10,6.RA,6.RB,_IMM6:IALU2:short:iu:MUL imm
-"mul r<RA>, r<RB>, <imm>"
- do_mul(_SD, Ra, Rb, imm);
-
-
-
-// MUL2H
-
-void::function::do_mul2h:unsigned32 *ra, unsigned32 rb, unsigned32 src
- unsigned16 high = VH2_4(rb) * VH2_4(src);
- unsigned16 low = VL2_4(rb) * VL2_4(src);
- WRITE32_QUEUE (ra, (high << 16) | low);
-
-_IALU2,00000,00,6.RA,6.RB,6.RC:IALU2:short:iu:MUL2H
-"mul2h r<RA>, r<RB>, r<RC>"
- do_mul2h(_SD, Ra, Rb, Rc);
-_IALU2,00000,10,6.RA,6.RB,_IMM6:IALU2:short:iu:MUL2H imm
-"mul2h r<RA>, r<RB>, <imm>"
- do_mul2h(_SD, Ra, Rb, immHL);
-
-
-
-// MULX
-
-void::function::do_mulx:unsigned64 *aa, signed32 rb, signed32 src
- WRITE64_QUEUE (aa, (signed64) (rb) * (signed64) (src));
-
-_IALU2,11000,00,5.*,1.AA,6.RB,6.RC:IALU2:short:iu:MULX
-"mulx a<AA>, r<RB>, r<RC>"
- do_mulx(_SD, Aa, Rb, Rc);
-_IALU2,11000,10,5.*,1.AA,6.RB,_IMM6:IALU2:short:iu:MULX imm
-"mulx a<AA>, r<RB>, <imm>"
- do_mulx(_SD, Aa, Rb, imm);
-
-
-// MULX2H
-
-void::function::do_mulx2h:int ra, signed32 rb, signed32 src, int high
- signed32 result = rb * src;
- if (!high)
- {
- ra = make_even_reg(_SD, ra, "MULX2H");
- if (ra != 0)
- WRITE32_QUEUE (&GPR[ra+1], result);
- }
- else if (ra != 0)
- {
- WRITE32_QUEUE (&GPR[ra+0], result);
- }
-
-_IALU2,00001,00,6.RA,6.RB,6.RC:IALU2:short:iu:MULX2H
-"mul2h r<RA>, r<RB>, r<RC>"
- do_mulx2h(_SD, RA, RbH, RcH, 1);
- do_mulx2h(_SD, RA, RbL, RcL, 0);
-_IALU2,00001,10,6.RA,6.RB,_IMM6:IALU2:short:iu:MULX2H imm
-"mul2h r<RA>, r<RB>, <imm>"
- do_mulx2h(_SD, RA, RbH, imm, 1);
- do_mulx2h(_SD, RA, RbL, imm, 0);
-
-// MULHXpp
-
-void::function::do_mulhx:int pp, unsigned32 *ra, unsigned32 rb, unsigned32 src
- signed32 value = 0;
- switch (pp) {
- case 0: /* LL */
- value = SEXT32(VL2_4(rb), 16) * SEXT32(VL2_4(src), 16);
- break;
- case 1: /* LH */
- value = SEXT32(VL2_4(rb), 16) * SEXT32(VH2_4(src), 16);
- break;
- case 2: /* HL */
- value = SEXT32(VH2_4(rb), 16) * SEXT32(VL2_4(src), 16);
- break;
- case 3: /* HH */
- value = SEXT32(VH2_4(rb), 16) * SEXT32(VH2_4(src), 16);
- break;
- default:
- sim_engine_abort (SD, CPU, cia, "do_mulhx - internal error - bad switch");
- }
- WRITE32_QUEUE (ra, value);
-
-_IALU2,001,pp,00,6.RA,6.RB,6.RC:IALU2:short:iu:MULHXpp
-"mulhx%s<pp> r<RA>, r<RB>, r<RC>"
- do_mulhx(_SD, pp, Ra, Rb, Rc);
-_IALU2,001,pp,10,6.RA,6.RB,_IMM6:IALU2:short:iu:MULHXpp imm
-"mulhx%s<pp> r<RA>, r<RB>, <imm>"
- do_mulhx(_SD, pp, Ra, Rb, immHL);
-
-
-
-// MULXS
-
-void::function::do_mulxs:unsigned64 *aa, signed32 rb, signed32 src
- WRITE64_QUEUE (aa, ((signed64) (rb) * (signed64) (src)) << 1);
-
-_IALU2,11001,00,5.*,1.AA,6.RB,6.RC:IALU2:short:iu:MULXS
-"mulxs a<AA>, r<RB>, r<RC>"
- do_mulxs(_SD, Aa, Rb, Rc);
-_IALU2,11001,10,5.*,1.AA,6.RB,_IMM6:IALU2:short:iu:MULXS imm
-"mulxs a<AA>, r<RB>, <imm>"
- do_mulxs(_SD, Aa, Rb, imm);
-
-
-
-// MVFACC
-
-void::function::do_mvfacc:unsigned32 *ra, unsigned64 ab, unsigned32 src
- while (src > 63) src -= 64;
- WRITE32_QUEUE (ra, ((signed64)ab) >> src);
-
-_IALU2,11111,00,6.RA,5.*,1.AB,6.RC:IALU2:short:iu:MVFACC
-"mvfacc r<RA>, a<AB>, r<RC>"
- do_mvfacc(_SD, Ra, *Ab, Rc);
-_IALU2,11111,10,6.RA,5.*,1.AB,_IMM6:IALU2:short:iu:MVFACC imm
-"mvfacc r<RA>, a<AB>, <imm>"
- do_mvfacc(_SD, Ra, *Ab, imm_6u);
-
-
-
-// MVFSYS
-
-_BRA,11110,00,6.RA,6.CR,6.ID:BRA:short:mu:MVFSYS
-"mvfsys r<RA>, cr<CR>"
- switch (ID) {
- case 0:
- if (CR >= NR_CONTROL_REGISTERS)
- sim_engine_abort (SD, CPU, cia, "FIXME - illegal CR");
- else
- WRITE32_QUEUE (Ra, (CPU)->regs.control[CR]);
- break;
- case 1:
- WRITE32_QUEUE (Ra, PSWL);
- break;
- case 2:
- WRITE32_QUEUE (Ra, EXTRACTED32(PSWH, 16, 31));
- break;
- case 3:
- WRITE32_QUEUE (Ra, PSW_FLAG_VAL(CR));
- break;
- default:
- sim_engine_abort (SD, CPU, cia, "FIXME - illegal ID");
- }
-
-
-
-// MVTACC
-
-_IALU2,01111,00,5.*,1.AA,6.RB,6.RC:IALU2:short:iu:MVTACC
-"mvtacc a<AA>, r<RB>, r<RC>"
- WRITE64_QUEUE (Aa, INSERTED64(RbU, 0, 31) | (RcU));
-
-
-
-// MVTSYS
-
-_BRA,01110,00,6.CR,6.RB,6.ID:BRA:short:mu:MVTSYS
-"mvtsys cr<CR>, r<RB>"
- switch (ID) {
- case 0: /* control register */
- if (CR >= NR_CONTROL_REGISTERS)
- sim_engine_abort (SD, CPU, cia, "FIXME - illegal CR");
- else
- {
- unsigned32 value = Rb;
- CPU->mvtsys_left_p = 1;
- if (CR == processor_status_word_cr)
- {
- unsigned32 ds = PSW & BIT32 (PSW_DS); /* preserve ds */
- value = ds | (value & PSW_VALID);
- }
- else if (CR == backup_processor_status_word_cr
- || CR == debug_backup_processor_status_word_cr)
- value &= DPSW_VALID;
- else if (CR == eit_vector_base_cr)
- value &= EIT_VALID;
- WRITE32_QUEUE (&(CPU)->regs.control[CR], value);
- }
- break;
- case 1: /* PSWL */
- WRITE32_QUEUE_MASK (&PSW, EXTRACTED32(Rb, 16, 31),
- PSW_VALID & 0x0000ffff);
- break;
- case 2: /* PSWH */
- {
- unsigned32 ds = PSW & BIT32 (PSW_DS); /* preserve ds */
- WRITE32_QUEUE_MASK (&PSW, (EXTRACTED32(Rb, 16, 31) << 16) | ds,
- (PSW_VALID | ds) & 0xffff0000);
- }
- break;
- case 3: /* FLAG */
- PSW_FLAG_SET_QUEUE(CR, Rb & 1);
- break;
- default:
- sim_engine_abort (SD, CPU, cia, "FIXME - illegal ID");
- }
-
-
-
-// NOP
-
-_BRA,01111,00,6.**,6.**,6.**:BRA:short:iu,mu:NOP
-"nop"
- /* NOP */;
-
-
-// NOT
-
-_LOGIC,11001,00,6.RA,6.RB,6.*:LOGIC:short:iu,mu:NOT
-"not r<RA>, r<RB>"
- WRITE32_QUEUE (Ra, ~Rb);
-
-
-
-// NOTFG
-
-_LOGIC,01001,00,***,3.FA,***,3.FB,***,3.FC:LOGIC:short:iu,mu:NOTFG
-"notfg f<FA>, f<FB>"
- PSW_FLAG_SET_QUEUE(FA, !PSW_FLAG_VAL(FB));
-
-
-// OR
-
-_LOGIC,11010,00,6.RA,6.RB,6.RC:LOGIC:short:iu,mu:OR
-"or r<RA>, r<RB>, r<RC>"
- WRITE32_QUEUE (Ra, Rb | Rc);
-_LOGIC,11010,10,6.RA,6.RB,_IMM6:LOGIC:short:iu,mu:OR imm
-"or r<RA>, r<RB>, <imm>"
- WRITE32_QUEUE (Ra, Rb | imm);
-_LOGIC,11010,10,6.RA,6.RB,_IMM32:LOGIC:long:iu,mu:OR imm long
-"or r<RA>, r<RB>, <imm>"
- WRITE32_QUEUE (Ra, Rb | imm);
-
-
-
-// ORFG
-
-_LOGIC,01010,00,***,3.FA,***,3.FB,***,3.FC:LOGIC:short:iu,mu:ORFG
-"orfg f<FA>, f<FB>, f<FC>"
- PSW_FLAG_SET_QUEUE(FA, PSW_FLAG_VAL(FB) | PSW_FLAG_VAL(FC));
-_LOGIC,01010,10,***,3.FA,***,3.FB,_IMM6:LOGIC:short:iu,mu:ORFG imm
-"orfg f<FA>, f<FB>, <imm>"
- PSW_FLAG_SET_QUEUE(FA, PSW_FLAG_VAL(FB) | (imm_6 & 1));
-
-
-
-// REIT
-
-_BRA,01000,00,6.**,6.**,6.**:BRA:short:mu:REIT
-"reit"
- WRITE32_QUEUE (&PSW, bPSW);
- nia = bPC;
-
-
-
-
-// REPEAT
-
-void::function::do_repeat:unsigned32 count, address_word pcaddr
- address_word rpt_s = cia + 8;
- address_word rpt_e = cia + pcaddr;
-
- if (count == 0)
- sim_engine_abort (SD, CPU, cia, "REPEAT with ra=0 and REPEATI with imm = 0 is forbidden.");
- if (count > 1)
- PSW_SET_QUEUE (PSW_RP, 1);
- if (rpt_e < rpt_s + 0x10)
- sim_io_eprintf (sd, "warning: 0x%lx: REPEAT or REPEATI loop is too small\n", (long) cia);
- WRITE32_QUEUE (&RPT_C, count - 1);
- WRITE32_QUEUE (&RPT_S, rpt_s);
- WRITE32_QUEUE (&RPT_E, rpt_e);
-
-_BRA,11000,00,6.RA,6.**,6.RC:BRA:short:mu:REPEAT
-"repeat r<RA>, r<RC>"
- do_repeat(_SD, val_Ra, pcaddr);
-_BRA,11000,10,6.RA,_IMM12:BRA:short:mu:REPEAT imm
-"repeat r<RA>, <pcaddr>"
- do_repeat(_SD, val_Ra, pcaddr);
-_BRA,11000,10,6.RA,6.**,_IMM32:BRA:long:mu:REPEAT imm long
-"repeat r<RA>, <pcaddr>"
- do_repeat(_SD, val_Ra, pcaddr);
-
-
-
-
-// REPEATI
-
-_BRA,11010,00,6.IMM_6,6.**,6.RC:BRA:short:mu:REPEATI
-"repeati <IMM_6>, r<RC>"
- do_repeat(_SD, IMM_6, pcaddr);
-_BRA,11010,10,6.IMM_6,_IMM12:BRA:short:mu:REPEATI imm
-"repeati <IMM_6>, <pcaddr>"
- do_repeat(_SD, IMM_6, pcaddr);
-_BRA,11010,10,6.IMM_6,6.**,_IMM32:BRA:long:mu:REPEATI imm long
-"repeati <IMM_6>, <pcaddr>"
- do_repeat(_SD, IMM_6, pcaddr);
-
-
-
-
-// RTD
-
-_BRA,01010,00,6.*,6.*,6.*:BRA:short:mu:RTD
-"rtd"
- WRITE32_QUEUE (&PSW, DPSW);
- nia = DPC;
-
-
-
-
-// ROT
-
-_LOGIC,10100,00,6.RA,6.RB,6.RC:LOGIC:short:iu,mu:ROT
-"rot r<RA>, r<RB>, r<RC>"
- WRITE32_QUEUE (Ra, ROT32(Rb, Rc & 0x1f));
-_LOGIC,10100,10,6.RA,6.RB,_IMM6:LOGIC:short:iu,mu:ROT imm
-"rot r<RA>, r<RB>, <imm>"
- WRITE32_QUEUE (Ra, ROT32(Rb, imm & 0x1f));
-
-
-
-
-// ROT2H
-
-void::function::do_rot2h:unsigned32 *ra, unsigned32 rb, signed32 src
- unsigned16 high = ROTR16(VH2_4(rb), VH2_4(src) & 0xf);
- unsigned16 low = ROTR16(VL2_4(rb), VL2_4(src) & 0xf);
- WRITE32_QUEUE (ra, (high << 16) | low);
-
-_LOGIC,10101,00,6.RA,6.RB,6.RC:LOGIC:short:iu,mu:ROT2H
-"rot2h r<RA>, r<RB>, r<RC>"
- do_rot2h(_SD, Ra, Rb, Rc);
-_LOGIC,10101,10,6.RA,6.RB,_IMM6:LOGIC:short:iu,mu:ROT2H imm
-"rot2h r<RA>, r<RB>, <imm>"
- do_rot2h(_SD, Ra, Rb, immHL);
-
-
-
-
-// SAT
-
-void::function::do_sat:signed32 *ra, signed32 rb, signed32 src
- int bits = LSMASKED32(src, 4, 0); /* 5 */
- signed32 sat = LSMASK32(bits, 0) >> 2;
- signed32 nsat = ~sat;
- signed32 value;
- if (bits != src)
- sim_io_eprintf (sd, "warning: 0x%lx:SAT bit overflow\n", (long) cia);
- if (bits == 0)
- value = rb;
- else if (rb >= sat)
- value = sat;
- else if (rb <= nsat)
- value = nsat;
- else
- value = rb;
- WRITE32_QUEUE (ra, value);
-
-_IALU2,01000,00,6.RA,6.RB,6.RC:IALU2:short:iu:SAT
-"sat r<RA>, r<RB>, r<RC>"
- do_sat(_SD, Ra, Rb, Rc);
-_IALU2,01000,10,6.RA,6.RB,_IMM6:IALU2:short:iu:SAT imm
-"sat r<RA>, r<RB>, <imm>"
- do_sat(_SD, Ra, Rb, imm_5);
-
-
-
-
-// SAT2H
-
-void::function::do_sath:signed32 *ra, signed32 rb, signed32 src, int high, int updates_f4
- int bits = LSMASKED32(src, 4, 0); /* 5 */
- signed32 sat = LSMASK32(bits, 0) >> 2;
- signed32 nsat = ~sat;
- signed32 value;
- if (bits != src)
- sim_io_eprintf (sd, "warning: 0x%lx:SAT bit overflow\n", (long) cia);
- if (bits == 0)
- value = rb;
- else if (rb >= sat)
- value = sat;
- else if (rb <= nsat)
- value = nsat;
- else
- value = rb;
- if (high)
- WRITE32_QUEUE_MASK (ra, value << 16, 0xffff0000);
- else
- WRITE32_QUEUE_MASK (ra, value, 0x0000ffff);
- if (updates_f4)
- {
- /* if MU instruction was a MVTSYS (lkr), unqueue register writes now */
- if(STATE_CPU (sd, 0)->mvtsys_left_p)
- unqueue_writes (sd, STATE_CPU (sd, 0), cia);
- PSW_FLAG_SET_QUEUE(PSW_S_FLAG, PSW_FLAG_VAL(PSW_S_FLAG) ^ (value & 1));
- }
-
-_IALU2,01001,00,6.RA,6.RB,6.RC:IALU2:short:iu:SAT2H
-"sat2h r<RA>, r<RB>, r<RC>"
- do_sath(_SD, Ra, RbH, RcH, 1, 0);
- do_sath(_SD, Ra, RbL, RcL, 0, 0);
-_IALU2,01001,10,6.RA,6.RB,_IMM6:IALU2:short:iu:SAT2H imm
-"sat2h r<RA>, r<RB>, <imm>"
- do_sath(_SD, Ra, RbH, imm_5, 1, 0);
- do_sath(_SD, Ra, RbL, imm_5, 0, 0);
-
-
-
-
-// SATHp
-
-::%s::p:int p
- switch (p)
- {
- case 0: return "l";
- case 1: return "h";
- default: return "?";
- }
-
-_IALU2,1110,p,00,6.RA,6.RB,6.RC:IALU2:short:iu:SATHP
-"sath%s<p> r<RA>, r<RB>, r<RC>"
- do_sath(_SD, Ra, Rb, Rc, p, 1);
-_IALU2,1110,p,10,6.RA,6.RB,_IMM6:IALU2:short:iu:SATHP imm
-"sath%s<p> r<RA>, r<RB>, <imm>"
- do_sath(_SD, Ra, Rb, imm_5, p, 1);
-
-
-
-// SATZ
-
-void::function::do_satz:signed32 *ra, signed32 rb, signed32 src
- if (rb < 0)
- WRITE32_QUEUE (ra, 0);
- else
- do_sat (_SD, ra, rb, src);
-
-_IALU2,01010,00,6.RA,6.RB,6.RC:IALU2:short:iu:SATZ
-"satz r<RA>, r<RB>, r<RC>"
- do_satz(_SD, Ra, Rb, Rc);
-_IALU2,01010,10,6.RA,6.RB,_IMM6:IALU2:short:iu:SATZ imm
-"satz r<RA>, r<RB>, <imm>"
- do_satz(_SD, Ra, Rb, imm_5);
-
-
-
-
-// SATZ2H
-
-void::function::do_satzh:signed32 *ra, signed16 rb, signed32 src, int high
- int bits = LSMASKED32(src, 3, 0); /*4*/
- signed16 sat = LSMASK16(bits, 0) >> 2;
- signed16 nsat = 0;
- signed16 value;
- if (bits != src)
- sim_io_eprintf (sd, "warning: 0x%lx:SATZ2H bit overflow\n", (long) cia);
- if (bits == 0 && rb > sat)
- value = rb;
- else if (rb > sat)
- value = sat;
- else if (rb < nsat)
- value = nsat;
- else
- value = rb;
- if (high)
- WRITE32_QUEUE_MASK (ra, value << 16, 0xffff0000);
- else
- WRITE32_QUEUE_MASK (ra, value, 0x0000ffff);
-
-
-_IALU2,01011,00,6.RA,6.RB,6.RC:IALU2:short:iu:SATZ2H
-"satz2h r<RA>, r<RB>, r<RC>"
- do_satzh(_SD, Ra, RbH, RcH, 1);
- do_satzh(_SD, Ra, RbL, RcL, 0);
-_IALU2,01011,10,6.RA,6.RB,_IMM6:IALU2:short:iu:SATZ2H imm
-"satz2h r<RA>, r<RB>, <imm>"
- do_satzh(_SD, Ra, RbH, imm, 1);
- do_satzh(_SD, Ra, RbL, imm, 0);
-
-
-
-
-// SRA
-
-void::function::do_sra:unsigned32 *ra, unsigned32 rb, signed32 src
- unsigned32 value;
- while (src > 31) src -= 32;
- while (src < -32) src += 32;
- if (src >= 0)
- value = (signed32)rb >> src;
- else if (src == -32)
- value = 0;
- else
- value = rb << -src;
- WRITE32_QUEUE (ra, value);
-
-_LOGIC,10000,00,6.RA,6.RB,6.RC:LOGIC:short:iu,mu:SRA
-"sra r<RA>, r<RB>, r<RC>"
- do_sra(_SD, Ra, Rb, Rc);
-_LOGIC,10000,10,6.RA,6.RB,_IMM6:LOGIC:short:iu,mu:SRA imm
-"sra r<RA>, r<RB>, <imm>"
- do_sra(_SD, Ra, Rb, imm);
-
-
-
-
-// SRAHp
-
-void::function::do_srah:unsigned32 *ra, unsigned32 rb, int src, int high
- unsigned32 value;
- while (src > 31) src -= 32;
- while (src < -32) src += 32;
- if (src >= 0)
- value = (signed32)rb >> src;
- else if (src == -32)
- value = 0;
- else
- value = rb << -src;
- if (high)
- WRITE32_QUEUE_MASK (ra, value << 16, 0xffff0000);
- else
- WRITE32_QUEUE_MASK (ra, value, 0x0000ffff);
-
-_LOGIC,0010,p,00,6.RA,6.RB,6.RC:LOGIC:short:iu,mu:SRAHP
-"srah%s<p> r<RA>, r<RB>, r<RC>"
- do_srah(_SD, Ra, Rb, Rc, p);
-_LOGIC,0010,p,10,6.RA,6.RB,_IMM6:LOGIC:short:iu,mu:SRAHP imm
-"srah%s<p> r<RA>, r<RB>, <imm>"
- do_srah(_SD, Ra, Rb, imm, p);
-
-
-
-
-// SRA2H
-
-_LOGIC,10001,00,6.RA,6.RB,6.RC:LOGIC:short:iu,mu:SRA2H
-"sra2h r<RA>, r<RB>, r<RC>"
- signed32 srcH = RcH;
- signed32 srcL = RcL;
- while (srcH > 15) srcH -= 16;
- while (srcH < -16) srcH += 16;
- while (srcL > 15) srcL -= 16;
- while (srcL < -16) srcL += 16;
- do_srah(_SD, Ra, RbH, srcH, 1);
- do_srah(_SD, Ra, RbL, srcL, 0);
-_LOGIC,10001,10,6.RA,6.RB,_IMM6:LOGIC:short:iu,mu:SRA2H imm
-"sra2h r<RA>, r<RB>, <imm>"
- signed32 src = imm;
- while (src > 15) src -= 16;
- while (src < -16) src += 16;
- do_srah(_SD, Ra, RbH, src, 1);
- do_srah(_SD, Ra, RbL, src, 0);
-
-
-
-
-// SRC
-
-void::function::do_src:unsigned32 *ra, unsigned32 rb, int src
- unsigned32 value;
- unsigned64 operand;
- unsigned64 shifted;
- while (src > 31) src -= 32;
- while (src < -32) src += 32;
- if (src >= 0)
- {
- operand = (INSERTED64(rb, 0, 31) | INSERTED64(*ra, 32, 63));
- shifted = operand >> src;
- value = EXTRACTED64(shifted, 32, 63);
- }
- else
- {
- operand = (INSERTED64(*ra, 0, 31) | INSERTED64(rb, 32, 63));
- shifted = operand << -src;
- value = EXTRACTED64(shifted, 0, 31);
- }
- WRITE32_QUEUE (ra, value);
-
-_LOGIC,10110,00,6.RA,6.RB,6.RC:LOGIC:short:iu,mu:SRC
-"src r<RA>, r<RB>, r<RC>"
- do_src(_SD, Ra, Rb, Rc);
-_LOGIC,10110,10,6.RA,6.RB,_IMM6:LOGIC:short:iu,mu:SRC imm
-"src r<RA>, r<RB>, <imm>"
- do_src(_SD, Ra, Rb, imm);
-
-
-
-
-// SRL
-
-void::function::do_srl:unsigned32 *ra, unsigned32 rb, int src
- unsigned32 value;
- while (src > 31) src -= 32;
- while (src < -32) src += 32;
- if (src >= 0)
- value = (unsigned32)rb >> src;
- else if (src == -32)
- value = 0;
- else
- value = (unsigned32)rb << -src;
- WRITE32_QUEUE (ra, value);
-
-_LOGIC,10010,00,6.RA,6.RB,6.RC:LOGIC:short:iu,mu:SRL
-"srl r<RA>, r<RB>, r<RC>"
- do_srl(_SD, Ra, Rb, Rc);
-_LOGIC,10010,10,6.RA,6.RB,_IMM6:LOGIC:short:iu,mu:SRL imm
-"srl r<RA>, r<RB>, <imm>"
- do_srl(_SD, Ra, Rb, imm);
-
-
-
-
-// SRLHp
-
-void::function::do_srlh:unsigned32 *ra, unsigned32 rb, int src, int high
- unsigned32 value;
- while (src > 31) src -= 32;
- while (src < -32) src += 32;
- if (src >= 0)
- value = rb >> src;
- else if (src == -32)
- value = 0;
- else
- value = rb << -src;
- if (high)
- WRITE32_QUEUE_MASK (ra, value << 16, 0xffff0000);
- else
- WRITE32_QUEUE_MASK (ra, value, 0x0000ffff);
-
-_LOGIC,0011,p,00,6.RA,6.RB,6.RC:LOGIC:short:iu,mu:SRLHP
-"srlh%s<p> r<RA>, r<RB>, r<RC>"
- do_srlh(_SD, Ra, Rb, Rc, p);
-_LOGIC,0011,p,10,6.RA,6.RB,_IMM6:LOGIC:short:iu,mu:SRLHP imm
-"srlh%s<p> r<RA>, r<RB>, <imm>"
- do_srlh(_SD, Ra, Rb, imm, p);
-
-
-// SRL2H
-
-_LOGIC,10011,00,6.RA,6.RB,6.RC:LOGIC:short:iu,mu:SRL2H
-"srl2h r<RA>, r<RB>, r<RC>"
- signed32 srcH = RcH;
- signed32 srcL = RcL;
- while (srcH > 15) srcH -= 16;
- while (srcH < -16) srcH += 16;
- while (srcL > 15) srcL -= 16;
- while (srcL < -16) srcL += 16;
- do_srlh(_SD, Ra, RbHU, srcH, 1);
- do_srlh(_SD, Ra, RbLU, srcL, 0);
-_LOGIC,10011,10,6.RA,6.RB,_IMM6:LOGIC:short:iu,mu:SRL2H imm
-"srl2h r<RA>, r<RB>, <imm>"
- signed32 src = imm;
- while (src > 15) src -= 16;
- while (src < -16) src += 16;
- do_srlh(_SD, Ra, RbHU, src, 1);
- do_srlh(_SD, Ra, RbLU, src, 0);
-
-
-
-
-// ST2H
-
-void::function::get_even_reg:int *reg, unsigned32 *r0, const char *name
- if (*reg & 1)
- sim_engine_abort (SD, CPU, cia,
- "0x%lx:%s odd register (r%d) used in multi-word store",
- (long) cia, name, *reg);
- if (*reg == 0)
- *r0 = 0;
- else
- *r0 = GPR[*reg];
-
-void::function::do_st2h:int ra, unsigned32 rb, unsigned32 src
- unsigned32 val_ra;
- unsigned32 mem;
- get_even_reg(_SD, &ra, &val_ra, "ST2H");
- mem = INSERTED32(val_ra, 0, 15) |
- INSERTED32(GPR[ra + 1], 16, 31);
- STORE(rb + src, 4, mem);
-
-_IMEM,10011,XX,6.RA,6.RB,6.SRC_6:IMEM:short:mu:ST2H
-"st2h r<RA>, @(r<RB>, <SRC_6>)":XX == 0
-"st2h r<RA>, @(r<RB>%s<XX>, r<SRC_6>)"
- do_st2h(_SD, RA, Rb, src);
- do_incr(_SD, XX, &GPR[RB], 4);
-_IMEM,10011,10,6.RA,6.RB,_IMM32:IMEM:long:mu:ST2H long
-"st2h r<RA>, @(r<RB>, <imm>)"
- do_st2h(_SD, RA, Rb, imm);
-
-
-
-// ST2W
-
-void::function::do_st2w:int ra, unsigned32 rb, unsigned32 src
- unsigned32 val_ra;
- unsigned64 mem;
- get_even_reg(_SD, &ra, &val_ra, "ST2W");
- mem = INSERTED64(val_ra, 0, 31) | INSERTED64(GPR[ra + 1], 32, 63);
- STORE(rb + src, 8, mem);
-
-_IMEM,10110,XX,6.RA,6.RB,6.SRC_6:IMEM:short:mu:ST2W
-"st2w r<RA>, @(r<RB>, <SRC_6>)":XX == 0
-"st2w r<RA>, @(r<RB>%s<XX>, r<SRC_6>)"
- do_st2w(_SD, RA, Rb, src);
- do_incr(_SD, XX, &GPR[RB], 8);
-_IMEM,10110,10,6.RA,6.RB,_IMM32:IMEM:long:mu:ST2W long
-"st2w r<RA>, @(r<RB>, <imm>)"
- do_st2w(_SD, RA, Rb, imm);
-
-
-
-// ST4HB
-
-void::function::do_st4hb:int ra, unsigned32 rb, unsigned32 src
- unsigned32 val_ra;
- unsigned32 mem;
- get_even_reg(_SD, &ra, &val_ra, "ST4HB");
- mem = INSERTED32(EXTRACTED32(val_ra, 8, 15), 0, 7) |
- INSERTED32(EXTRACTED32(val_ra, 24, 31), 8, 15) |
- INSERTED32(EXTRACTED32(GPR[ra + 1], 8, 15), 16, 23) |
- INSERTED32(EXTRACTED32(GPR[ra + 1], 24, 31), 24, 31);
- STORE(rb + src, 4, mem);
-
-_IMEM,10101,XX,6.RA,6.RB,6.SRC_6:IMEM:short:mu:ST4HB
-"st4hb r<RA>, @(r<RB>, <SRC_6>)":XX == 0
-"st4hb r<RA>, @(r<RB>%s<XX>, r<SRC_6>)"
- do_st4hb(_SD, RA, Rb, src);
- do_incr(_SD, XX, &GPR[RB], 4);
-_IMEM,10101,10,6.RA,6.RB,_IMM32:IMEM:long:mu:ST4HB long
-"st4hb r<RA>, @(r<RB>, <imm>)"
- do_st4hb(_SD, RA, Rb, imm);
-
-
-
-// STB
-
-void::function::do_stb:unsigned32 ra, unsigned32 rb, unsigned32 src
- STORE(rb + src, 1, EXTRACTED32(ra, 24, 31));
-
-_IMEM,10000,XX,6.RA,6.RB,6.SRC_6:IMEM:short:mu:STB
-"stb r<RA>, @(r<RB>, <SRC_6>)":XX == 0
-"stb r<RA>, @(r<RB>%s<XX>, r<SRC_6>)"
- do_stb(_SD, val_Ra, Rb, src);
- do_incr(_SD, XX, &GPR[RB], 1);
-_IMEM,10000,10,6.RA,6.RB,_IMM32:IMEM:long:mu:STB long
-"stb r<RA>, @(r<RB>, <imm>)"
- do_stb(_SD, val_Ra, Rb, imm);
-
-
-
-// STH
-
-void::function::do_sth:unsigned32 ra, unsigned32 rb, unsigned32 src
- STORE(rb + src, 2, EXTRACTED32(ra, 16, 31));
-
-_IMEM,10010,XX,6.RA,6.RB,6.SRC_6:IMEM:short:mu:STH
-"sth r<RA>, @(r<RB>, <SRC_6>)":XX == 0
-"sth r<RA>, @(r<RB>%s<XX>, r<SRC_6>)"
- do_sth(_SD, val_Ra, Rb, src);
- do_incr(_SD, XX, &GPR[RB], 2);
-_IMEM,10010,10,6.RA,6.RB,_IMM32:IMEM:long:mu:STH long
-"sth r<RA>, @(r<RB>, <imm>)"
- do_sth(_SD, val_Ra, Rb, imm);
-
-
-
-// STHH
-
-void::function::do_sthh:unsigned32 ra, unsigned32 rb, unsigned32 src
- STORE(rb + src, 2, EXTRACTED32(ra, 0, 15));
-
-_IMEM,10001,XX,6.RA,6.RB,6.SRC_6:IMEM:short:mu:STHH
-"sthh r<RA>, @(r<RB>, <SRC_6>)":XX == 0
-"sthh r<RA>, @(r<RB>%s<XX>, r<SRC_6>)"
- do_sthh(_SD, val_Ra, Rb, src);
- do_incr(_SD, XX, &GPR[RB], 2);
-_IMEM,10001,10,6.RA,6.RB,_IMM32:IMEM:long:mu:STHH long
-"sthh r<RA>, @(r<RB>, <imm>)"
- do_sthh(_SD, val_Ra, Rb, imm);
-
-
-
-// STW
-
-void::function::do_stw:unsigned32 ra, unsigned32 rb, unsigned32 src
- STORE(rb + src, 4, ra);
-
-_IMEM,10100,XX,6.RA,6.RB,6.SRC_6:IMEM:short:mu:STW
-"stw r<RA>, @(r<RB>, <SRC_6>)":XX == 0
-"stw r<RA>, @(r<RB>%s<XX>, r<SRC_6>)"
- do_stw(_SD, val_Ra, Rb, src);
- do_incr(_SD, XX, &GPR[RB], 4);
-_IMEM,10100,10,6.RA,6.RB,_IMM32:IMEM:long:mu:STW long
-"stw r<RA>, @(r<RB>, <imm>)"
- do_stw(_SD, val_Ra, Rb, imm);
-
-
-
-// SUB
-
-void::function::do_sub:unsigned32 *ra, unsigned32 rb, unsigned32 imm
- ALU_BEGIN(rb);
- ALU_SUBB(imm);
- ALU_END(ra);
-
-_IALU1,00010,00,6.RA,6.RB,6.RC:IALU1:short:iu,mu:SUB
-"sub r<RA>, r<RB>, r<RC>"
- do_sub (_SD, Ra, Rb, Rc);
-_IALU1,00010,10,6.RA,6.RB,_IMM6:IALU1:short:iu,mu:SUB imm
-"sub r<RA>, r<RB>, <imm>"
- do_sub (_SD, Ra, Rb, imm);
-_IALU1,00010,10,6.RA,6.RB,_IMM32:IALU1:long:iu,mu:SUB imm long
-"sub r<RA>, r<RB>, <imm>"
- do_sub (_SD, Ra, Rb, imm);
-
-
-
-// SUB2H
-
-void::function::do_sub2h:unsigned32 *ra, unsigned32 rb, unsigned32 imm
- unsigned16 high = VH2_4(rb) - VH2_4(imm);
- unsigned16 low = VL2_4(rb) - VL2_4(imm);
- WRITE32_QUEUE (ra, (high << 16) | low);
-
-_IALU1,00011,00,6.RA,6.RB,6.RC:IALU1:short:iu,mu:SUB2H
-"sub2h r<RA>, r<RB>, r<RC>"
- do_sub2h (_SD, Ra, Rb, Rc);
-_IALU1,00011,10,6.RA,6.RB,_IMM6:IALU1:short:iu,mu:SUB2H imm
-"sub2h r<RA>, r<RB>, <imm>"
- do_sub2h (_SD, Ra, Rb, immHL);
-_IALU1,00011,10,6.RA,6.RB,_IMM32:IALU1:long:iu,mu:SUB2H imm long
-"sub2h r<RA>, r<RB>, <imm>"
- do_sub2h (_SD, Ra, Rb, imm);
-
-
-
-// SUBB
-
-void::function::do_subb:unsigned32 *ra, unsigned32 rb, unsigned32 imm
- ALU_BEGIN(rb);
- ALU_SUBB_B(imm, ALU_CARRY);
- ALU_END(ra);
-
-_IALU1,00101,00,6.RA,6.RB,6.RC:IALU1:short:iu,mu:SUBB
-"subb r<RA>, r<RB>, r<RC>"
- do_subb (_SD, Ra, Rb, Rc);
-_IALU1,00101,10,6.RA,6.RB,_IMM6:IALU1:short:iu,mu:SUBB imm
-"subb r<RA>, r<RB>, <imm>"
- do_subb (_SD, Ra, Rb, imm);
-_IALU1,00101,10,6.RA,6.RB,_IMM32:IALU1:long:iu,mu:SUBB imm long
-"subb r<RA>, r<RB>, <imm>"
- do_subb (_SD, Ra, Rb, imm);
-
-
-
-// SUBHppp
-
-void::function::do_subh_ppp:int ppp, unsigned32 *ra, unsigned32 rb, unsigned32 src
- switch (ppp) {
- case 0x0: /* LLL */
- {
- ALU16_BEGIN(VL2_4(rb));
- ALU16_SUBB(VL2_4(src));
- ALU16_END(ra, 0);
- }
- break;
- case 0x1: /* LLH */
- {
- ALU16_BEGIN(VL2_4(rb));
- ALU16_SUBB(VH2_4(src));
- ALU16_END(ra, 0);
- }
- break;
- case 0x2: /* LHL */
- {
- ALU16_BEGIN(VH2_4(rb));
- ALU16_SUBB(VL2_4(src));
- ALU16_END(ra, 0);
- }
- break;
- case 0x3: /* LHH */
- {
- ALU16_BEGIN(VH2_4(rb));
- ALU16_SUBB(VH2_4(src));
- ALU16_END(ra, 0);
- }
- break;
- case 0x4: /* HLL */
- {
- ALU16_BEGIN(VL2_4(rb));
- ALU16_SUBB(VL2_4(src));
- ALU16_END(ra, 1);
- }
- break;
- case 0x5: /* HLH */
- {
- ALU16_BEGIN(VL2_4(rb));
- ALU16_SUBB(VH2_4(src));
- ALU16_END(ra, 1);
- }
- break;
- case 0x6: /* HHL */
- {
- ALU16_BEGIN(VH2_4(rb));
- ALU16_SUBB(VL2_4(src));
- ALU16_END(ra, 1);
- }
- break;
- case 0x7: /* HHH */
- {
- ALU16_BEGIN(VH2_4(rb));
- ALU16_SUBB(VH2_4(src));
- ALU16_END(ra, 1);
- }
- break;
- default:
- sim_engine_abort (SD, CPU, cia, "do_subh_ppp - internal error - bad switch");
- }
-
-_IALU1,11,ppp,00,6.RA,6.RB,6.RC:IALU1:short:iu,mu:SUBHppp
-"subh%s<ppp> r<RA>, r<RB>, r<RC>"
- do_subh_ppp(_SD, ppp, Ra, Rb, Rc);
-_IALU1,11,ppp,10,6.RA,6.RB,_IMM6:IALU1:short:iu,mu:SUBHppp imm
-"subh%s<ppp> r<RA>, r<RB>, <imm>"
- do_subh_ppp(_SD, ppp, Ra, Rb, immHL);
-_IALU1,11,ppp,10,6.RA,6.RB,_IMM32:IALU1:long:iu,mu:SUBHppp imm long
-"subh%s<ppp> r<RA>, r<RB>, <imm>"
- do_subh_ppp(_SD, ppp, Ra, Rb, imm);
-
-
-
-// TRAP
-
-address_word::function::do_trap:address_word trap_vector, address_word nia
- /* Steal trap 31 for doing system calls */
- /* System calls are defined in libgloss/d30v/syscall.h. */
- if (trap_vector == EIT_VB + 0x20 + (31 << 3))
- {
- enum { PARM1 = 2, PARM2, PARM3, PARM4, FUNC };
- if (GPR[FUNC] == 1) /* exit */
- {
- sim_engine_halt (sd, STATE_CPU (sd, 0), NULL, cia, sim_exited,
- GPR[PARM1]);
- return -1; /* dummy */
- }
- else
- {
- CB_SYSCALL syscall;
-
- CB_SYSCALL_INIT (&syscall);
- syscall.arg1 = GPR[PARM1];
- syscall.arg2 = GPR[PARM2];
- syscall.arg3 = GPR[PARM3];
- syscall.arg4 = GPR[PARM4];
- syscall.func = GPR[FUNC];
- syscall.p1 = (PTR) SD;
- syscall.read_mem = d30v_read_mem;
- syscall.write_mem = d30v_write_mem;
-
- WRITE32_QUEUE (&GPR[PARM1],
- ((cb_syscall (STATE_CALLBACK (SD), &syscall)
- == CB_RC_OK)
- ? syscall.result
- : -syscall.errcode));
- return nia;
- }
- }
- else if (TRACE_TRAP_P)
- {
- int reg, i;
- sim_io_eprintf (sd, "\nTrap %ld:\n", (long) ((trap_vector - (EIT_VB + 0x20)) >> 3));
- for (reg = 0; reg < NR_GENERAL_PURPOSE_REGISTERS; reg += 8)
- {
- sim_io_eprintf (sd, "r%.2d - r%.2d: ", reg, reg+7);
- for (i = 0; i < 8; i++)
- sim_io_eprintf (sd, " 0x%.8lx", (long) GPR[reg+i]);
- sim_io_eprintf (sd, "\n");
- }
-
- for (reg = 0; reg < 16; reg += 8)
- {
- sim_io_eprintf (sd, "cr%.2d - cr%.2d:", reg, reg+7);
- for (i = 0; i < 8; i++)
- sim_io_eprintf (sd, " 0x%.8lx", (long) CREG[reg+i]);
- sim_io_eprintf (sd, "\n");
- }
-
- sim_io_eprintf (sd, "a0 - a1: ");
- for (reg = 0; reg < NR_ACCUMULATORS; reg++)
- sim_io_eprintf (sd, " 0x%.8lx 0x%.8lx",
- (long)EXTRACTED64(ACC[reg], 0, 31),
- (long)EXTRACTED64(ACC[reg], 32, 63));
- sim_io_eprintf (sd, "\n");
-
- sim_io_eprintf (sd, "f0 - f7: ");
- sim_io_eprintf (sd, " (f0) %d", (int) PSW_VAL(PSW_F0));
- sim_io_eprintf (sd, " (f1) %d", (int) PSW_VAL(PSW_F1));
- sim_io_eprintf (sd, " (f2) %d", (int) PSW_VAL(PSW_F2));
- sim_io_eprintf (sd, " (f3) %d", (int) PSW_VAL(PSW_F3));
- sim_io_eprintf (sd, " (s) %d", (int) PSW_VAL(PSW_S));
- sim_io_eprintf (sd, " (v) %d", (int) PSW_VAL(PSW_V));
- sim_io_eprintf (sd, " (va) %d", (int) PSW_VAL(PSW_VA));
- sim_io_eprintf (sd, " (c) %d\n", (int) PSW_VAL(PSW_C));
-
- sim_io_eprintf (sd, "pswh: ");
- sim_io_eprintf (sd, " (sm) %d", (int) PSW_VAL(PSW_SM));
- sim_io_eprintf (sd, " (ea) %d", (int) PSW_VAL(PSW_EA));
- sim_io_eprintf (sd, " (ie) %d", (int) PSW_VAL(PSW_IE));
- sim_io_eprintf (sd, " (rp) %d", (int) PSW_VAL(PSW_RP));
- sim_io_eprintf (sd, " (md) %d", (int) PSW_VAL(PSW_MD));
-
- if (PSW_VAL(PSW_DB))
- sim_io_eprintf (sd, " (db) %d", (int) PSW_VAL(PSW_DB));
-
- if (PSW_VAL(PSW_DS))
- sim_io_eprintf (sd, " (ds) %d", (int) PSW_VAL(PSW_DS));
-
- sim_io_eprintf (sd, "\n");
- return nia;
- }
- else
- {
- if(PSW_VAL(PSW_RP) && RPT_E == cia)
- {
- WRITE32_QUEUE (&bPC, RPT_S);
- if (RPT_C == 0)
- PSW_SET (PSW_RP, 0);
- }
- else
- WRITE32_QUEUE (&bPC, cia + 8);
- DID_TRAP = 1;
- return trap_vector;
- }
-
-_BRA,01001,00,6.**,6.**,6.RC:BRA:short:mu:TRAP
-"trap r<RC>"
- nia = do_trap (_SD, EIT_VB + 0x20 + MASKED32(Rc, 24, 28), nia);
-_BRA,01001,10,6.**,6.**,_IMM6:BRA:short:mu:TRAP imm
-"trap <imm>"
- nia = do_trap (_SD, EIT_VB + 0x20 + (imm_5 << 3), nia);
-
-
-
-// XOR
-
-_LOGIC,11011,00,6.RA,6.RB,6.RC:LOGIC:short:iu,mu:XOR
-"xor r<RA>, r<RB>, r<RC>"
- WRITE32_QUEUE (Ra, Rb ^ Rc);
-_LOGIC,11011,10,6.RA,6.RB,_IMM6:LOGIC:short:iu,mu:XOR imm
-"xor r<RA>, r<RB>, <imm>"
- WRITE32_QUEUE (Ra, Rb ^ imm);
-_LOGIC,11011,10,6.RA,6.RB,_IMM32:LOGIC:long:iu,mu:XOR imm long
-"xor r<RA>, r<RB>, <imm>"
- WRITE32_QUEUE (Ra, Rb ^ imm);
-
-
-
-// XORFG
-
-_LOGIC,01011,00,***,3.FA,***,3.FB,***,3.FC:LOGIC:short:iu,mu:XORFG
-"xorfg f<FA>, f<FB>, f<FC>"
- PSW_FLAG_SET_QUEUE(FA, PSW_FLAG_VAL(FB) ^ PSW_FLAG_VAL(FC));
-_LOGIC,01011,10,***,3.FA,***,3.FB,_IMM6:LOGIC:short:iu,mu:XORFG imm
-"xorfg f<FA>, f<FB>, <imm_6>"
- PSW_FLAG_SET_QUEUE(FA, PSW_FLAG_VAL(FB) ^ (imm_6 & 1));
-
-
-
diff --git a/sim/d30v/dc-short b/sim/d30v/dc-short
deleted file mode 100644
index 1451dfabd3e..00000000000
--- a/sim/d30v/dc-short
+++ /dev/null
@@ -1,22 +0,0 @@
-//
-// Mitsubishi Electric Corp. D30V Simulator.
-// Copyright (C) 1997, Free Software Foundation, Inc.
-// Contributed by Cygnus Solutions Inc.
-//
-// This file is part of GDB, the GNU debugger.
-//
-// This program is free software; you can redistribute it and/or modify
-// it under the terms of the GNU General Public License as published by
-// the Free Software Foundation; either version 2 of the License, or
-// (at your option) any later version.
-//
-// This program is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-// GNU General Public License for more details.
-//
-// You should have received a copy of the GNU General Public License
-// along with this program; if not, write to the Free Software
-// Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-//
-switch: 4: 13: 4: 13
diff --git a/sim/d30v/engine.c b/sim/d30v/engine.c
deleted file mode 100644
index 2bbaad16a16..00000000000
--- a/sim/d30v/engine.c
+++ /dev/null
@@ -1,496 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1997, Andrew Cagney <cagney@highland.com.au>
- Copyright (C) 1996, 1997, Free Software Foundation
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-#ifndef ENGINE_C
-#define ENGINE_C
-
-#include "sim-main.h"
-
-#include <stdio.h>
-#include <ctype.h>
-
-#ifdef HAVE_STDLIB_H
-#include <stdlib.h>
-#endif
-
-#ifdef HAVE_STRING_H
-#include <string.h>
-#else
-#ifdef HAVE_STRINGS_H
-#include <strings.h>
-#endif
-#endif
-
-static void
-do_stack_swap (SIM_DESC sd)
-{
- sim_cpu *cpu = STATE_CPU (sd, 0);
- unsigned new_sp = (PSW_VAL(PSW_SM) != 0);
- if (cpu->regs.current_sp != new_sp)
- {
- cpu->regs.sp[cpu->regs.current_sp] = SP;
- cpu->regs.current_sp = new_sp;
- SP = cpu->regs.sp[cpu->regs.current_sp];
- }
-}
-
-#if WITH_TRACE
-/* Implement ALU tracing of 32-bit registers. */
-static void
-trace_alu32 (SIM_DESC sd,
- sim_cpu *cpu,
- address_word cia,
- unsigned32 *ptr)
-{
- unsigned32 value = *ptr;
-
- if (ptr >= &GPR[0] && ptr <= &GPR[NR_GENERAL_PURPOSE_REGISTERS])
- trace_one_insn (sd, cpu, cia, 1, "engine.c", __LINE__, "alu",
- "Set register r%-2d = 0x%.8lx (%ld)",
- ptr - &GPR[0], (long)value, (long)value);
-
- else if (ptr == &PSW || ptr == &bPSW || ptr == &DPSW)
- trace_one_insn (sd, cpu, cia, 1, "engine.c", __LINE__, "alu",
- "Set register %s = 0x%.8lx%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s",
- (ptr == &PSW) ? "psw" : ((ptr == &bPSW) ? "bpsw" : "dpsw"),
- (long)value,
- (value & (0x80000000 >> PSW_SM)) ? ", sm" : "",
- (value & (0x80000000 >> PSW_EA)) ? ", ea" : "",
- (value & (0x80000000 >> PSW_DB)) ? ", db" : "",
- (value & (0x80000000 >> PSW_DS)) ? ", ds" : "",
- (value & (0x80000000 >> PSW_IE)) ? ", ie" : "",
- (value & (0x80000000 >> PSW_RP)) ? ", rp" : "",
- (value & (0x80000000 >> PSW_MD)) ? ", md" : "",
- (value & (0x80000000 >> PSW_F0)) ? ", f0" : "",
- (value & (0x80000000 >> PSW_F1)) ? ", f1" : "",
- (value & (0x80000000 >> PSW_F2)) ? ", f2" : "",
- (value & (0x80000000 >> PSW_F3)) ? ", f3" : "",
- (value & (0x80000000 >> PSW_S)) ? ", s" : "",
- (value & (0x80000000 >> PSW_V)) ? ", v" : "",
- (value & (0x80000000 >> PSW_VA)) ? ", va" : "",
- (value & (0x80000000 >> PSW_C)) ? ", c" : "");
-
- else if (ptr >= &CREG[0] && ptr <= &CREG[NR_CONTROL_REGISTERS])
- trace_one_insn (sd, cpu, cia, 1, "engine.c", __LINE__, "alu",
- "Set register cr%d = 0x%.8lx (%ld)",
- ptr - &CREG[0], (long)value, (long)value);
-}
-
-/* Implement ALU tracing of 32-bit registers. */
-static void
-trace_alu64 (SIM_DESC sd,
- sim_cpu *cpu,
- address_word cia,
- unsigned64 *ptr)
-{
- unsigned64 value = *ptr;
-
- if (ptr >= &ACC[0] && ptr <= &ACC[NR_ACCUMULATORS])
- trace_one_insn (sd, cpu, cia, 1, "engine.c", __LINE__, "alu",
- "Set register a%-2d = 0x%.8lx 0x%.8lx",
- ptr - &ACC[0],
- (unsigned long)(unsigned32)(value >> 32),
- (unsigned long)(unsigned32)value);
-
-}
-#endif
-
-/* Process all of the queued up writes in order now */
-void
-unqueue_writes (SIM_DESC sd,
- sim_cpu *cpu,
- address_word cia)
-{
- int i, num;
- int did_psw = 0;
- unsigned32 *psw_addr = &PSW;
-
- num = WRITE32_NUM;
- for (i = 0; i < num; i++)
- {
- unsigned32 mask = WRITE32_MASK (i);
- unsigned32 *ptr = WRITE32_PTR (i);
- unsigned32 value = (*ptr & ~mask) | (WRITE32_VALUE (i) & mask);
- int j;
-
- if (ptr == psw_addr)
- {
- /* If MU instruction was not a MVTSYS, resolve PSW
- contention in favour of IU. */
- if(! STATE_CPU (sd, 0)->mvtsys_left_p)
- {
- /* Detect contention in parallel writes to the same PSW flags.
- The hardware allows the updates from IU to prevail over
- those from MU. */
-
- unsigned32 flag_bits =
- BIT32 (PSW_F0) | BIT32 (PSW_F1) |
- BIT32 (PSW_F2) | BIT32 (PSW_F3) |
- BIT32 (PSW_S) | BIT32 (PSW_V) |
- BIT32 (PSW_VA) | BIT32 (PSW_C);
- unsigned32 my_flag_bits = mask & flag_bits;
-
- for (j = i + 1; j < num; j++)
- if (WRITE32_PTR (j) == psw_addr && /* write to PSW */
- WRITE32_MASK (j) & my_flag_bits) /* some of the same flags */
- {
- /* Recompute local mask & value, to suppress this
- earlier write to the same flag bits. */
-
- unsigned32 new_mask = mask & ~(WRITE32_MASK (j) & my_flag_bits);
-
- /* There is a special case for the VA (accumulated
- overflow) flag, in that it is only included in the
- second instruction's mask if the overflow
- occurred. Yet the hardware still suppresses the
- first instruction's update to VA. So we kludge
- this by inferring PSW_V -> PSW_VA for the second
- instruction. */
-
- if (WRITE32_MASK (j) & BIT32 (PSW_V))
- {
- new_mask &= ~BIT32 (PSW_VA);
- }
-
- value = (*ptr & ~new_mask) | (WRITE32_VALUE (i) & new_mask);
- }
- }
-
- did_psw = 1;
- }
-
- *ptr = value;
-
-#if WITH_TRACE
- if (TRACE_ALU_P (cpu))
- trace_alu32 (sd, cpu, cia, ptr);
-#endif
- }
-
- num = WRITE64_NUM;
- for (i = 0; i < num; i++)
- {
- unsigned64 *ptr = WRITE64_PTR (i);
- *ptr = WRITE64_VALUE (i);
-
-#if WITH_TRACE
- if (TRACE_ALU_P (cpu))
- trace_alu64 (sd, cpu, cia, ptr);
-#endif
- }
-
- WRITE32_NUM = 0;
- WRITE64_NUM = 0;
-
- if (DID_TRAP == 1) /* ordinary trap */
- {
- bPSW = PSW;
- PSW &= (BIT32 (PSW_DB) | BIT32 (PSW_SM));
- did_psw = 1;
- }
- else if (DID_TRAP == 2) /* debug trap */
- {
- DPSW = PSW;
- PSW &= BIT32 (PSW_DS);
- PSW |= BIT32 (PSW_DS);
- did_psw = 1;
- }
- DID_TRAP = 0;
-
- if (did_psw)
- do_stack_swap (sd);
-}
-
-
-/* SIMULATE INSTRUCTIONS, various different ways of achieving the same
- thing */
-
-static address_word
-do_long (SIM_DESC sd,
- l_instruction_word instruction,
- address_word cia)
-{
- address_word nia = l_idecode_issue(sd,
- instruction,
- cia);
-
- unqueue_writes (sd, STATE_CPU (sd, 0), cia);
- return nia;
-}
-
-static address_word
-do_2_short (SIM_DESC sd,
- s_instruction_word insn1,
- s_instruction_word insn2,
- cpu_units unit,
- address_word cia)
-{
- address_word nia;
-
- /* run the first instruction */
- STATE_CPU (sd, 0)->unit = unit;
- STATE_CPU (sd, 0)->left_kills_right_p = 0;
- STATE_CPU (sd, 0)->mvtsys_left_p = 0;
- nia = s_idecode_issue(sd,
- insn1,
- cia);
-
- unqueue_writes (sd, STATE_CPU (sd, 0), cia);
-
- /* Only do the second instruction if the PC has not changed */
- if ((nia == INVALID_INSTRUCTION_ADDRESS) &&
- (! STATE_CPU (sd, 0)->left_kills_right_p)) {
- STATE_CPU (sd, 0)->unit = any_unit;
- nia = s_idecode_issue (sd,
- insn2,
- cia);
-
- unqueue_writes (sd, STATE_CPU (sd, 0), cia);
- }
-
- STATE_CPU (sd, 0)->left_kills_right_p = 0;
- STATE_CPU (sd, 0)->mvtsys_left_p = 0;
- return nia;
-}
-
-static address_word
-do_parallel (SIM_DESC sd,
- s_instruction_word left_insn,
- s_instruction_word right_insn,
- address_word cia)
-{
- address_word nia_left;
- address_word nia_right;
- address_word nia;
-
- /* run the first instruction */
- STATE_CPU (sd, 0)->unit = memory_unit;
- STATE_CPU (sd, 0)->left_kills_right_p = 0;
- STATE_CPU (sd, 0)->mvtsys_left_p = 0;
- nia_left = s_idecode_issue(sd,
- left_insn,
- cia);
-
- /* run the second instruction */
- STATE_CPU (sd, 0)->unit = integer_unit;
- nia_right = s_idecode_issue(sd,
- right_insn,
- cia);
-
- /* merge the PC's */
- if (nia_left == INVALID_INSTRUCTION_ADDRESS) {
- if (nia_right == INVALID_INSTRUCTION_ADDRESS)
- nia = INVALID_INSTRUCTION_ADDRESS;
- else
- nia = nia_right;
- }
- else {
- if (nia_right == INVALID_INSTRUCTION_ADDRESS)
- nia = nia_left;
- else {
- sim_engine_abort (sd, STATE_CPU (sd, 0), cia, "parallel jumps");
- nia = INVALID_INSTRUCTION_ADDRESS;
- }
- }
-
- unqueue_writes (sd, STATE_CPU (sd, 0), cia);
- return nia;
-}
-
-
-typedef enum {
- p_insn = 0,
- long_insn = 3,
- l_r_insn = 1,
- r_l_insn = 2,
-} instruction_types;
-
-STATIC_INLINE instruction_types
-instruction_type(l_instruction_word insn)
-{
- int fm0 = MASKED64(insn, 0, 0) != 0;
- int fm1 = MASKED64(insn, 32, 32) != 0;
- return ((fm0 << 1) | fm1);
-}
-
-
-
-void
-sim_engine_run (SIM_DESC sd,
- int last_cpu_nr,
- int nr_cpus,
- int siggnal)
-{
- while (1)
- {
- address_word cia = PC;
- address_word nia;
- l_instruction_word insn = IMEM(cia);
- int rp_was_set;
- int rpt_c_was_nonzero;
-
- /* Before executing the instruction, we need to test whether or
- not RPT_C is greater than zero, and save that state for use
- after executing the instruction. In particular, we need to
- not care whether the instruction changes RPT_C itself. */
-
- rpt_c_was_nonzero = (RPT_C > 0);
-
- /* Before executing the instruction, we need to check to see if
- we have to decrement RPT_C, the repeat count register. Do this
- if PC == RPT_E, but only if we are in an active repeat block. */
-
- if (PC == RPT_E &&
- (RPT_C > 0 || PSW_VAL (PSW_RP) != 0))
- {
- RPT_C --;
- }
-
- /* Now execute the instruction at PC */
-
- switch (instruction_type (insn))
- {
- case long_insn:
- nia = do_long (sd, insn, cia);
- break;
- case r_l_insn:
- /* L <- R */
- nia = do_2_short (sd, insn, insn >> 32, integer_unit, cia);
- break;
- case l_r_insn:
- /* L -> R */
- nia = do_2_short (sd, insn >> 32, insn, memory_unit, cia);
- break;
- case p_insn:
- nia = do_parallel (sd, insn >> 32, insn, cia);
- break;
- default:
- sim_engine_abort (sd, STATE_CPU (sd, 0), cia,
- "internal error - engine_run_until_stop - bad switch");
- nia = -1;
- }
-
- if (TRACE_ACTION)
- {
- if (TRACE_ACTION & TRACE_ACTION_CALL)
- call_occurred (sd, STATE_CPU (sd, 0), cia, nia);
-
- if (TRACE_ACTION & TRACE_ACTION_RETURN)
- return_occurred (sd, STATE_CPU (sd, 0), cia, nia);
-
- TRACE_ACTION = 0;
- }
-
- /* Check now to see if we need to reset the RP bit in the PSW.
- There are three conditions for this, the RP bit is already
- set (just a speed optimization), the instruction we just
- executed is the last instruction in the loop, and the repeat
- count is currently zero. */
-
- rp_was_set = PSW_VAL (PSW_RP);
- if (rp_was_set && (PC == RPT_E) && RPT_C == 0)
- {
- PSW_SET (PSW_RP, 0);
- }
-
- /* Now update the PC. If we just executed a jump instruction,
- that takes precedence over everything else. Next comes
- branching back to RPT_S as a result of a loop. Finally, the
- default is to simply advance to the next inline
- instruction. */
-
- if (nia != INVALID_INSTRUCTION_ADDRESS)
- {
- PC = nia;
- }
- else if (rp_was_set && rpt_c_was_nonzero && (PC == RPT_E))
- {
- PC = RPT_S;
- }
- else
- {
- PC = cia + 8;
- }
-
- /* Check for DDBT (debugger debug trap) condition. Do this after
- the repeat block checks so the excursion to the trap handler does
- not alter looping state. */
-
- if (cia == IBA && PSW_VAL (PSW_DB))
- {
- DPC = PC;
- PSW_SET (PSW_EA, 1);
- DPSW = PSW;
- /* clear all bits in PSW except SM */
- PSW &= BIT32 (PSW_SM);
- /* add DS bit */
- PSW |= BIT32 (PSW_DS);
- /* dispatch to DDBT handler */
- PC = 0xfffff128; /* debugger_debug_trap_address */
- }
-
- /* process any events */
- /* FIXME - should L->R or L<-R insns count as two cycles? */
- if (sim_events_tick (sd))
- {
- sim_events_process (sd);
- }
- }
-}
-
-
-/* d30v external interrupt handler.
-
- Note: This should be replaced by a proper interrupt delivery
- mechanism. This interrupt mechanism discards later interrupts if
- an earlier interrupt hasn't been delivered.
-
- Note: This interrupt mechanism does not reset its self when the
- simulator is re-opened. */
-
-void
-d30v_interrupt_event (SIM_DESC sd,
- void *data)
-{
- if (PSW_VAL (PSW_IE))
- /* interrupts not masked */
- {
- /* scrub any pending interrupt */
- if (sd->pending_interrupt != NULL)
- sim_events_deschedule (sd, sd->pending_interrupt);
- /* deliver */
- bPSW = PSW;
- bPC = PC;
- PSW = 0;
- PC = 0xfffff138; /* external interrupt */
- do_stack_swap (sd);
- }
- else if (sd->pending_interrupt == NULL)
- /* interrupts masked and no interrupt pending */
- {
- sd->pending_interrupt = sim_events_schedule (sd, 1,
- d30v_interrupt_event,
- data);
- }
-}
-
-#endif
diff --git a/sim/d30v/ic-d30v b/sim/d30v/ic-d30v
deleted file mode 100644
index 50a184f2d20..00000000000
--- a/sim/d30v/ic-d30v
+++ /dev/null
@@ -1,80 +0,0 @@
-# Instruction cache rules
-#
-# This file is part of the program psim.
-#
-# Copyright (C) 1994-1995, Andrew Cagney <cagney@highland.com.au>
-#
-# This program is free software; you can redistribute it and/or modify
-# it under the terms of the GNU General Public License as published by
-# the Free Software Foundation; either version 2 of the License, or
-# (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-#
-compute:RA:RA::
-compute:RA:Ra:signed32 *:(&GPR[RA])
-compute:RA:RaH:signed16 *:AH2_4(Ra)
-compute:RA:RaL:signed16 *:AL2_4(Ra)
-compute:RA:val_Ra:signed32:(RA == 0 ? 0 : GPR[RA])
-#
-compute:RB:RB::
-compute:RB:Rb:signed32:(RB == 0 ? 0 : GPR[RB])
-compute:RB:RbU:unsigned32:(RB == 0 ? 0 : GPR[RB])
-compute:RB:RbH:signed16:VH2_4(Rb)
-compute:RB:RbL:signed16:VL2_4(Rb)
-compute:RB:RbHU:unsigned16:VH2_4(Rb)
-compute:RB:RbLU:unsigned16:VL2_4(Rb)
-#
-compute:RC:RC::
-compute:RC:Rc:signed32:(RC == 0 ? 0 : GPR[RC])
-compute:RC:RcU:unsigned32:(RC == 0 ? 0 : GPR[RC])
-compute:RC:RcH:signed16:VH2_4(Rc)
-compute:RC:RcL:signed16:VL2_4(Rc)
-#
-#
-compute:IMM_6S:IMM_6S::
-compute:IMM_6S:imm:signed32:SEXT32(IMM_6S, 32 - 6)
-# NB - for short imm[HL] are the same value
-compute:IMM_6S:immHL:signed32:((imm << 16) | MASKED32(imm, 16, 31))
-compute:IMM_6S:immH:signed32:imm
-compute:IMM_6S:immL:signed32:imm
-compute:IMM_6S:imm_6:signed32:IMM_6S
-compute:IMM_6S:imm_5:signed32:LSMASKED32(IMM_6S, 4, 0)
-compute:IMM_6S:imm_6u:unsigned32:(IMM_6S & 0x3f)
-#
-compute:RC:pcdisp:signed32:(Rc & ~0x7)
-compute:RC:pcaddr:signed32:pcdisp
-#
-compute:IMM_18S:IMM_18S::
-compute:IMM_18S:pcdisp:signed32:(SEXT32(IMM_18S, 32 - 18) << 3)
-compute:IMM_18S:pcaddr:signed32:pcdisp
-compute:IMM_12S:IMM_12S::
-compute:IMM_12S:pcdisp:signed32:(SEXT32(IMM_12S, 32 - 12) << 3)
-compute:IMM_12S:pcaddr:signed32:pcdisp
-#
-compute:IMM_8L:IMM_8L::
-compute:IMM_18L:IMM_18L::
-compute:IMM_6L:IMM_6L::
-compute:IMM_6L:imm:signed32:((((IMM_6L << 8) | IMM_8L) << 18) | IMM_18L)
-compute:IMM_6L:immHL:signed32:imm
-compute:IMM_6L:immH:signed32:EXTRACTED32(imm, 0, 15)
-compute:IMM_6L:immL:signed32:EXTRACTED32(imm, 16, 31)
-compute:IMM_6L:pcdisp:signed32:(imm & ~0x7)
-compute:IMM_6L:pcaddr:signed32:pcdisp
-#
-#
-compute:SRC_6:SRC_6::
-compute:SRC_6:src:unsigned32:(XX == 2 ? SEXT32(SRC_6, 32 - 6) : GPR[SRC_6])
-#
-#
-compute:AA:AA::
-compute:AA:Aa:unsigned64*:((CPU)->regs.accumulator + AA)
-compute:AB:AB::
-compute:AB:Ab:unsigned64*:((CPU)->regs.accumulator + AB)
diff --git a/sim/d30v/sim-calls.c b/sim/d30v/sim-calls.c
deleted file mode 100644
index d319529cc21..00000000000
--- a/sim/d30v/sim-calls.c
+++ /dev/null
@@ -1,364 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1996, Andrew Cagney <cagney@highland.com.au>
- Copyright (C) 1997, Free Software Foundation
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-#include <stdarg.h>
-#include <ctype.h>
-
-#include "sim-main.h"
-#include "sim-options.h"
-
-#include "bfd.h"
-#include "sim-utils.h"
-
-#ifdef HAVE_STDLIB_H
-#include <stdlib.h>
-#endif
-
-static unsigned long extmem_size = 1024*1024*8; /* 8 meg is the maximum listed in the arch. manual */
-
-static const char * get_insn_name (sim_cpu *, int);
-
-#define SIM_ADDR unsigned
-
-
-#define OPTION_TRACE_CALL 200
-#define OPTION_TRACE_TRAPDUMP 201
-#define OPTION_EXTMEM_SIZE 202
-
-static SIM_RC
-d30v_option_handler (SIM_DESC sd,
- sim_cpu *cpu,
- int opt,
- char *arg,
- int command_p)
-{
- char *suffix;
-
- switch (opt)
- {
- default:
- break;
-
- case OPTION_TRACE_CALL:
- if (arg == NULL || strcmp (arg, "yes") == 0 || strcmp (arg, "on") == 0)
- TRACE_CALL_P = 1;
- else if (strcmp (arg, "no") == 0 || strcmp (arg, "off") == 0)
- TRACE_CALL_P = 0;
- else
- {
- sim_io_eprintf (sd, "Unreconized --trace-call option `%s'\n", arg);
- return SIM_RC_FAIL;
- }
- return SIM_RC_OK;
-
- case OPTION_TRACE_TRAPDUMP:
- if (arg == NULL || strcmp (arg, "yes") == 0 || strcmp (arg, "on") == 0)
- TRACE_TRAP_P = 1;
- else if (strcmp (arg, "no") == 0 || strcmp (arg, "off") == 0)
- TRACE_TRAP_P = 0;
- else
- {
- sim_io_eprintf (sd, "Unreconized --trace-call option `%s'\n", arg);
- return SIM_RC_FAIL;
- }
- return SIM_RC_OK;
-
- case OPTION_EXTMEM_SIZE:
- if (arg == NULL || !isdigit (*arg))
- {
- sim_io_eprintf (sd, "Invalid memory size `%s'", arg);
- return SIM_RC_FAIL;
- }
-
- suffix = arg;
- extmem_size = strtol (arg, &suffix, 0);
- if (*suffix == 'm' || *suffix == 'M')
- extmem_size <<= 20;
- else if (*suffix == 'k' || *suffix == 'K')
- extmem_size <<= 10;
- sim_do_commandf (sd, "memory delete 0x80000000");
- sim_do_commandf (sd, "memory region 0x80000000,0x%lx", extmem_size);
-
- return SIM_RC_OK;
- }
-
- sim_io_eprintf (sd, "Unknown option (%d)\n", opt);
- return SIM_RC_FAIL;
-}
-
-static const OPTION d30v_options[] =
-{
- { {"trace-call", optional_argument, NULL, OPTION_TRACE_CALL},
- '\0', "on|off", "Enable tracing of calls and returns, checking saved registers",
- d30v_option_handler },
- { {"trace-trapdump", optional_argument, NULL, OPTION_TRACE_TRAPDUMP},
- '\0', "on|off",
-#if TRAPDUMP
- "Traps 0..30 dump out all of the registers (defaults on)",
-#else
- "Traps 0..30 dump out all of the registers",
-#endif
- d30v_option_handler },
- { {"extmem-size", required_argument, NULL, OPTION_EXTMEM_SIZE},
- '\0', "size", "Change size of external memory, default 8 meg",
- d30v_option_handler },
- { {NULL, no_argument, NULL, 0}, '\0', NULL, NULL, NULL }
-};
-
-/* Return name of an insn, used by insn profiling. */
-
-static const char *
-get_insn_name (sim_cpu *cpu, int i)
-{
- return itable[i].name;
-}
-
-/* Structures used by the simulator, for gdb just have static structures */
-
-SIM_DESC
-sim_open (SIM_OPEN_KIND kind,
- host_callback *callback,
- struct _bfd *abfd,
- char **argv)
-{
- SIM_DESC sd = sim_state_alloc (kind, callback);
-
- /* FIXME: watchpoints code shouldn't need this */
- STATE_WATCHPOINTS (sd)->pc = &(PC);
- STATE_WATCHPOINTS (sd)->sizeof_pc = sizeof (PC);
- STATE_WATCHPOINTS (sd)->interrupt_handler = d30v_interrupt_event;
-
- /* Initialize the mechanism for doing insn profiling. */
- CPU_INSN_NAME (STATE_CPU (sd, 0)) = get_insn_name;
- CPU_MAX_INSNS (STATE_CPU (sd, 0)) = nr_itable_entries;
-
-#ifdef TRAPDUMP
- TRACE_TRAP_P = TRAPDUMP;
-#endif
-
- if (sim_pre_argv_init (sd, argv[0]) != SIM_RC_OK)
- return 0;
- sim_add_option_table (sd, NULL, d30v_options);
-
- /* Memory and EEPROM */
- /* internal instruction RAM - fixed */
- sim_do_commandf (sd, "memory region 0,0x10000");
- /* internal data RAM - fixed */
- sim_do_commandf (sd, "memory region 0x20000000,0x8000");
- /* control register dummy area */
- sim_do_commandf (sd, "memory region 0x40000000,0x10000");
- /* external RAM */
- sim_do_commandf (sd, "memory region 0x80000000,0x%lx", extmem_size);
- /* EIT RAM */
- sim_do_commandf (sd, "memory region 0xfffff000,0x1000");
-
- /* getopt will print the error message so we just have to exit if this fails.
- FIXME: Hmmm... in the case of gdb we need getopt to call
- print_filtered. */
- if (sim_parse_args (sd, argv) != SIM_RC_OK)
- {
- /* Uninstall the modules to avoid memory leaks,
- file descriptor leaks, etc. */
- sim_module_uninstall (sd);
- return 0;
- }
-
- /* check for/establish the a reference program image */
- if (sim_analyze_program (sd,
- (STATE_PROG_ARGV (sd) != NULL
- ? *STATE_PROG_ARGV (sd)
- : NULL),
- abfd) != SIM_RC_OK)
- {
- sim_module_uninstall (sd);
- return 0;
- }
-
- /* establish any remaining configuration options */
- if (sim_config (sd) != SIM_RC_OK)
- {
- sim_module_uninstall (sd);
- return 0;
- }
-
- if (sim_post_argv_init (sd) != SIM_RC_OK)
- {
- /* Uninstall the modules to avoid memory leaks,
- file descriptor leaks, etc. */
- sim_module_uninstall (sd);
- return 0;
- }
-
- return sd;
-}
-
-
-void
-sim_close (SIM_DESC sd, int quitting)
-{
- /* Uninstall the modules to avoid memory leaks,
- file descriptor leaks, etc. */
- sim_module_uninstall (sd);
-}
-
-
-SIM_RC
-sim_create_inferior (SIM_DESC sd,
- struct _bfd *abfd,
- char **argv,
- char **envp)
-{
- /* clear all registers */
- memset (&STATE_CPU (sd, 0)->regs, 0, sizeof (STATE_CPU (sd, 0)->regs));
- EIT_VB = EIT_VB_DEFAULT;
- STATE_CPU (sd, 0)->unit = any_unit;
- sim_module_init (sd);
- if (abfd != NULL)
- PC = bfd_get_start_address (abfd);
- else
- PC = 0xfffff000; /* reset value */
- return SIM_RC_OK;
-}
-
-void
-sim_do_command (SIM_DESC sd, char *cmd)
-{
- if (sim_args_command (sd, cmd) != SIM_RC_OK)
- sim_io_printf (sd, "Unknown command `%s'\n", cmd);
-}
-
-/* The following register definitions were ripped off from
- gdb/config/tm-d30v.h. If any of those defs changes, this table needs to
- be updated. */
-
-#define NUM_REGS 86
-
-#define R0_REGNUM 0
-#define FP_REGNUM 11
-#define LR_REGNUM 62
-#define SP_REGNUM 63
-#define SPI_REGNUM 64 /* Interrupt stack pointer */
-#define SPU_REGNUM 65 /* User stack pointer */
-#define CREGS_START 66
-
-#define PSW_REGNUM (CREGS_START + 0) /* psw, bpsw, or dpsw??? */
-#define PSW_SM 0x80000000 /* Stack mode: 0 == interrupt (SPI),
- 1 == user (SPU) */
-#define BPSW_REGNUM (CREGS_START + 1) /* Backup PSW (on interrupt) */
-#define PC_REGNUM (CREGS_START + 2) /* pc, bpc, or dpc??? */
-#define BPC_REGNUM (CREGS_START + 3) /* Backup PC (on interrupt) */
-#define DPSW_REGNUM (CREGS_START + 4) /* Backup PSW (on debug trap) */
-#define DPC_REGNUM (CREGS_START + 5) /* Backup PC (on debug trap) */
-#define RPT_C_REGNUM (CREGS_START + 7) /* Loop count */
-#define RPT_S_REGNUM (CREGS_START + 8) /* Loop start address*/
-#define RPT_E_REGNUM (CREGS_START + 9) /* Loop end address */
-#define MOD_S_REGNUM (CREGS_START + 10)
-#define MOD_E_REGNUM (CREGS_START + 11)
-#define IBA_REGNUM (CREGS_START + 14) /* Instruction break address */
-#define EIT_VB_REGNUM (CREGS_START + 15) /* Vector base address */
-#define INT_S_REGNUM (CREGS_START + 16) /* Interrupt status */
-#define INT_M_REGNUM (CREGS_START + 17) /* Interrupt mask */
-#define A0_REGNUM 84
-#define A1_REGNUM 85
-
-int
-sim_fetch_register (sd, regno, buf, length)
- SIM_DESC sd;
- int regno;
- unsigned char *buf;
- int length;
-{
- if (regno < A0_REGNUM)
- {
- unsigned32 reg;
-
- if (regno <= R0_REGNUM + 63)
- reg = sd->cpu[0].regs.general_purpose[regno];
- else if (regno <= SPU_REGNUM)
- reg = sd->cpu[0].regs.sp[regno - SPI_REGNUM];
- else
- reg = sd->cpu[0].regs.control[regno - CREGS_START];
-
- buf[0] = reg >> 24;
- buf[1] = reg >> 16;
- buf[2] = reg >> 8;
- buf[3] = reg;
- }
- else if (regno < NUM_REGS)
- {
- unsigned32 reg;
-
- reg = sd->cpu[0].regs.accumulator[regno - A0_REGNUM] >> 32;
-
- buf[0] = reg >> 24;
- buf[1] = reg >> 16;
- buf[2] = reg >> 8;
- buf[3] = reg;
-
- reg = sd->cpu[0].regs.accumulator[regno - A0_REGNUM];
-
- buf[4] = reg >> 24;
- buf[5] = reg >> 16;
- buf[6] = reg >> 8;
- buf[7] = reg;
- }
- else
- abort ();
- return -1;
-}
-
-int
-sim_store_register (sd, regno, buf, length)
- SIM_DESC sd;
- int regno;
- unsigned char *buf;
- int length;
-{
- if (regno < A0_REGNUM)
- {
- unsigned32 reg;
-
- reg = (buf[0] << 24) | (buf[1] << 16) | (buf[2] << 8) | buf[3];
-
- if (regno <= R0_REGNUM + 63)
- sd->cpu[0].regs.general_purpose[regno] = reg;
- else if (regno <= SPU_REGNUM)
- sd->cpu[0].regs.sp[regno - SPI_REGNUM] = reg;
- else
- sd->cpu[0].regs.control[regno - CREGS_START] = reg;
- }
- else if (regno < NUM_REGS)
- {
- unsigned32 reg;
-
- reg = (buf[0] << 24) | (buf[1] << 16) | (buf[2] << 8) | buf[3];
-
- sd->cpu[0].regs.accumulator[regno - A0_REGNUM] = (unsigned64)reg << 32;
-
- reg = (buf[4] << 24) | (buf[5] << 16) | (buf[6] << 8) | buf[7];
-
- sd->cpu[0].regs.accumulator[regno - A0_REGNUM] |= reg;
- }
- else
- abort ();
- return -1;
-}
diff --git a/sim/d30v/sim-main.h b/sim/d30v/sim-main.h
deleted file mode 100644
index 4db8aa07fd9..00000000000
--- a/sim/d30v/sim-main.h
+++ /dev/null
@@ -1,82 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1997, Andrew Cagney <cagney@highland.com.au>
- Copyright (C) 1997, 1998, Free Software Foundation
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-#ifndef _SIM_MAIN_H_
-#define _SIM_MAIN_H_
-
-/* This simulator suports watchpoints */
-#define WITH_WATCHPOINTS 1
-
-#include "sim-basics.h"
-#include "sim-signal.h"
-
-/* needed */
-typedef address_word sim_cia;
-#define INVALID_INSTRUCTION_ADDRESS ((address_word) 0 - 1)
-
-/* This simulator doesn't cache anything so no saving of context is
- needed during either of a halt or restart */
-#define SIM_ENGINE_HALT_HOOK(SD,CPU,CIA) while (0)
-#define SIM_ENGINE_RESTART_HOOK(SD,CPU,CIA) while (0)
-
-#include "sim-base.h"
-
-/* These are generated files. */
-#include "itable.h"
-#include "s_idecode.h"
-#include "l_idecode.h"
-
-#include "cpu.h"
-#include "alu.h"
-
-
-struct sim_state {
-
- sim_event *pending_interrupt;
-
- /* the processors proper */
- sim_cpu cpu[MAX_NR_PROCESSORS];
-#if (WITH_SMP)
-#define STATE_CPU(sd, n) (&(sd)->cpu[n])
-#else
-#define STATE_CPU(sd, n) (&(sd)->cpu[0])
-#endif
-
- /* The base class. */
- sim_state_base base;
-
-};
-
-
-/* deliver an interrupt */
-sim_event_handler d30v_interrupt_event;
-
-
-#ifdef HAVE_STRING_H
-#include <string.h>
-#else
-#ifdef HAVE_STRINGS_H
-#include <strings.h>
-#endif
-#endif
-
-#endif /* _SIM_MAIN_H_ */
diff --git a/sim/d30v/tconfig.in b/sim/d30v/tconfig.in
deleted file mode 100644
index 4efbb915212..00000000000
--- a/sim/d30v/tconfig.in
+++ /dev/null
@@ -1,8 +0,0 @@
-/* D30V target configuration file. -*- C -*- */
-
-/* Define this to enable the intrinsic breakpoint mechanism. */
-#define SIM_HAVE_BREAKPOINTS
-
-/* See sim-hload.c. We properly handle LMA. */
-#define SIM_HANDLES_LMA 1
-
diff --git a/sim/erc32/ChangeLog b/sim/erc32/ChangeLog
deleted file mode 100644
index f2ff60050a1..00000000000
--- a/sim/erc32/ChangeLog
+++ /dev/null
@@ -1,603 +0,0 @@
-Tue May 23 21:39:23 2000 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-2000-03-07 Frank Ch. Eigler <fche@redhat.com>
-
- From John Dallaway <jld@redhat.co.uk>:
- * Makefile.in (install-sis): Add $(EXEEXT) for Windows host.
-
-2000-03-03 Jonathan Larmour <jlarmour@redhat.co.uk>
-
- * func.c (buffer_read_memory): Change type of size to unsigned to
- match prototype
-
-Thu Sep 2 18:15:53 1999 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-1999-05-08 Felix Lee <flee@cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-1999-03-03 DJ Delorie <dj@cygnus.com>
-
- * configure.in: add termcap and -luser32 for host=cygwin
- * configure: regenerate
-
-1999-02-11 Hugo Tyson <hmt@cygnus.co.uk>
-
- * exec.c (dispatch_instruction):
- Correct the sense of the
- if (!sparclite) {
- sregs->trap = TRAP_UNIMP;
- break;
- }
- clause that has been pasted around: it's correct in the SCAN and
- DIVScc (divide step) cases (where it was probably originally
- written?), but reversed in the SDIV, SDIVcc, UDIV, UDIVcc cases
- ie. instructions only in the SPARC V8 or SPARClite 86x
- architectures. It was also present when not required for SMUL,
- SMULcc, UMUL, UMULcc instructions that are present in all
- architectures.
-
-1999-01-25 Hugo Tyson <hmt@cygnus.co.uk>
-
- * interf.c (run_sim): Fix a bug in the main loop's handling of
- annulled delay slot instructions. There is precedent for this
- change; the _other_ main loop in sis.c gets it right according to
- my reading of the code.
-
- The bug is: if an interrupt happens when the next instruction
- (at sregs->pc) is annulled, the trap is taken (by execute_trap())
- with the current values of PC and NPC, so when the trap returns,
- the annulled instruction is indeed executed. Another giveaway is
- that the annul flag is cleared in execute_trap(): the information
- is demonstrably discarded.
-
- The solution is: perform annulling before looking for traps, in
- fact it's neater to do annulling, see if there's an interrupt and
- if not, do the instruction, then handle traps be they generated by
- interrupts pending or by the instruction we might just have done.
- That's what the sis.c one does.
-
-1999-01-20 Hugo Tyson <hmt@cygnus.co.uk>
-
- * sis.h: Add asr17 register for support of SparcLITE (at least the
- Hitachi ones I find before me)
-
- * exec.c (dispatch_instruction): Case WRY: Allow write of asr17 if
- sparclite. Other ASR numbers than 17 or 0 (Y) trap out.
- Case RDY: Allow read of asr17 if sparclite. Other ASRs ditto.
- (execute_trap): Do single-vector-trapping if asr17 bit 0 is set.
- (init_regs): Initialize y and asr17.
- NB: In instruction-set space, the Y register is asr0; the
- instructions have different names for human reasons only.
-
- * sis.c:
- * interf.c: Set boolean mode variable dumbio if invoked with
- argument "-dumbio" and mention it of verbose.
- * erc32.c: if "dumbio" is set, do not assume that there is a
- terminal type device attached to stdin/stdout. Do not set
- buffering or mess with tcsetattr or do any read operations in
- order to make UART interrupts; not input data is supported.
- This is necessary to allow the sim to be used within the eCos
- testing infrastructure where stdin/stdout are pipes to a TCL
- program; the sim hangs otherwise.
-
-Thu Jul 23 07:17:03 1998 Mark Alexander <marka@cygnus.com>
-
- * exec.c (dispatch_instruction): Add SPARClite 'scan' instruction.
-
-Tue Jul 7 21:12:41 1998 Mark Alexander <marka@cygnus.com>
-
- * func.c (bfd_load): Add special handling of a.out executables.
-
-Sat Jun 13 08:33:25 1998 Mark Alexander <marka@cygnus.com>
-
- * func.c (bfd_load): Print correct endianness.
- * interf.c (run_sim): Print debugging information if verbosity level
- is greater than 2.
- (sim_open): Repeated -v options now increment verbosity level.
- (sim_store_register): Handle little-endian case.
- (flush_window): Print debugging information if verbosity level
- is greater then 2.
-
-Tue Jun 2 15:20:35 1998 Mark Alexander <marka@cygnus.com>
-
- * interf.c (sim_open): Use revamped memory_read, which makes
- byte-swapping unnecessary. Add -sparclite-board option for
- emulating RAM found on typical SPARClite boards. Print
- error message for unrecognized option.
- * erc32.c: Change RAM address and size from constants to variables,
- to allow emulation of SPARClite board RAM.
- (fetch_bytes, store_bytes): New helper functions for revamped
- mememory_read and memory_write.
- (memory_read, memory_write): Rewrite to store bytes in target
- byte order instead of storing words in host byte order; this
- greatly simplifies support of little-endian programs.
- (get_mem_ptr): Remove unnecessary byte parameter.
- (sis_memory_write, sis_memory_read): Store words in target
- byte order instead of host byte order.
- (byte_swap_words): Remove, no longer needed.
- * sis.h ((byte_swap_words): Remove declaration, no longer needed.
- (memory_read): Add new sz parameter.
- * sis.c (run_sim): Use revamped memory_read, which makes
- byte-swapping unnecessary.
- * exec.c (dispatch_instruction): Use revamped memory_read, which
- makes byte-swapping and double-word fetching unnecessary.
- * func.c (sparclite_board): Declare new variable.
- (get_regi): Handle little-endian data.
- (bfd_load): Recognize little-endian SPARClite as having
- little-endian data.
-
-Fri May 22 14:23:16 1998 Mark Alexander <marka@cygnus.com>
-
- * erc32.c (port_init): Print messages only if sis_verbose is true.
- * func.c (bfd_load): Ditto.
- * interf.c (sim_open): Ditto.
-
-Thu May 14 23:10:48 1998 Mark Alexander <marka@cygnus.com>
-
- * sis.h (uint64, int64): Define.
- * exec.c (SDIV, SDIVCC, UDIV, UDIVCC): Define new opcodes.
- * (mul64): Simplify calculation of negative result.
- * (div64): New helper function for 64-bit division.
- * (dispatch_instruction): Add emulation of SDIV, SDIVCC, UDIV,
- and UDIVCC.
-
-Wed May 13 14:59:54 1998 Mark Alexander <marka@cygnus.com>
-
- * erc32.c (close_port): Don't close stdin; it kills GDB.
- (byte_swap_words): New function.
- * sis.h: (byte_swap_words): Declare.
- * interf.c (run_sim): Always fetch instructions as big-endian.
- * sis.c (run_sim): Ditto.
-
-Tue Apr 28 18:33:31 1998 Geoffrey Noer <noer@cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Sun Apr 26 15:31:55 1998 Tom Tromey <tromey@creche>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
- * config.in: Ditto.
-
-Sun Apr 26 15:20:17 1998 Tom Tromey <tromey@cygnus.com>
-
- * acconfig.h: New file.
- * configure.in: Reverted change of Apr 24; use sinclude again.
-
-Fri Apr 24 14:16:40 1998 Tom Tromey <tromey@creche>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
- * config.in: Ditto.
-
-Fri Apr 24 11:19:52 1998 Tom Tromey <tromey@cygnus.com>
-
- * configure.in: Don't call sinclude.
-
-Sat Apr 18 12:00:16 1998 Mark Alexander <marka@cygnus.com>
-
- * func.c (disp_fpu): Fix build problem on big-endian hosts.
-
-Wed Apr 8 19:33:34 1998 Mark Alexander <marka@cygnus.com>
-
- * erc32.c (sim_stop): Handle SIGINT gracefully.
- * interf.c (sim_open): Don't catch SIGINT; GDB will do that for us.
-
-Wed Apr 8 18:29:40 1998 Mark Alexander <marka@cygnus.com>
-
- * exec.c (dispatch_instruction): Change how carry out is calculated
- in DIVSCC. Add emulation of SMULCC, UMUL, and UMULCC.
-
-Sat Apr 4 20:36:25 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Wed Apr 1 21:19:18 1998 Mark Alexander <marka@cygnus.com>
-
- * end.c: Update to version 2.7.5, fix compiler warnings and bugs.
- * erc32.c: Ditto.
- * exec.c: Ditto.
- * float.c: Ditto.
- * func.c: Ditto.
- * help.c: Ditto.
- * interf.c: Ditto.
- * sis.c: Ditto.
- * sis.h: Ditto.
-
-Fri Mar 27 16:15:52 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Wed Mar 25 12:35:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Wed Mar 18 12:38:12 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Tue Feb 17 12:41:11 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * interf.c (sim_store_register, sim_fetch_register): Pass in
- length parameter. Return -1.
-
-Sun Feb 1 16:47:51 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Sat Jan 31 18:15:41 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Mon Jan 19 22:26:29 1998 Doug Evans <devans@seba>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Mon Dec 15 23:17:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
- * config.in: Ditto.
-
-Thu Dec 4 09:21:05 1997 Doug Evans <devans@canuck.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Fri Oct 3 09:28:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Wed Sep 24 17:38:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Tue Sep 23 11:04:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Mon Sep 22 11:46:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Fri Sep 19 17:45:25 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Mon Sep 15 17:36:15 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Wed Aug 27 18:13:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
- * config.in: Ditto.
-
-Tue Aug 26 10:38:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * float.c (__setfpucw): Compile on any i386 target. Not just NT.
-
- * interf.c (sim_kill): Delete.
- (sim_create_inferior): Add ABFD argument. Initialize PC from ABFD
- argument.
- (sim_load): Don't save start address.
- (start_address): Delete variable.
-
-Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
- * config.in: Ditto.
-
-Mon Aug 25 16:19:49 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * interf.c (sim_open): Add ABFD argument. Change ARGV to PARGV.
-
-Mon Jun 30 11:45:25 1997 Doug Evans <dje@canuck.cygnus.com>
-
- * Makefile.in (install-sis): Change $(srcdir)/sis to sis.
-
-Wed May 28 09:46:13 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * interf.c (sim_set_callbacks): Drop SD argument - not applicable.
- (sim_open): Add callback arg, save it.
-
-Thu Apr 24 00:39:51 1997 Doug Evans <dje@canuck.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Tue Apr 22 11:05:01 1997 Doug Evans <dje@canuck.cygnus.com>
-
- * interf.c (sim_open): Undo patch to add -E support.
-
-Thu Apr 17 03:03:56 1997 Doug Evans <dje@canuck.cygnus.com>
-
- * interf.c (sim_open): Ignore -E arg.
- (start_address): New static local.
- (sim_load): Return SIM_RC. New arg abfd. Set start_address from bfd.
- (sim_create_inferior): Return SIM_RC. Delete arg start_address.
-
-Tue Apr 15 15:16:11 1997 Ian Lance Taylor <ian@cygnus.com>
-
- * Makefile.in (install-sis): Depend upon installdirs. Use
- $(program_transform_name) directly, rather than using
- $(INSTALL_XFORM).
-
-Mon Apr 7 15:45:02 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
- * config.in: Ditto.
-
-Wed Apr 2 15:06:28 1997 Doug Evans <dje@canuck.cygnus.com>
-
- * interf.c (sim_open): New arg `kind'.
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Wed Apr 2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Mon Mar 17 15:10:07 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
-
- * configure: Re-generate.
-
-Thu Mar 13 12:46:04 1997 Doug Evans <dje@canuck.cygnus.com>
-
- * interf.c (sim_open): New SIM_DESC result. Argument is now in
- argv form.
- (other sim_*): New SIM_DESC argument.
-
-Tue Feb 4 13:35:20 1997 Doug Evans <dje@canuck.cygnus.com>
-
- * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
- COMMON_{PRE,POST}_CONFIG_FRAG instead.
- * configure.in: sinclude ../common/aclocal.m4.
- * configure: Regenerated.
-
-Thu Jan 23 11:46:23 1997 Stu Grossman (grossman@critters.cygnus.com)
-
- * configure configure.in Makefile.in: Update to new configure
- scheme which is more compatible with WinGDB builds.
- * configure.in: Improve comment on how to run autoconf.
- * configure: Re-run autoconf to get new ../common/aclocal.m4.
- * Makefile.in: Use autoconf substitution to install common
- makefile fragment.
-
-Wed Dec 4 18:25:04 1996 Rob Savoye <rob@chinadoll.cygnus.com>
-
- * interf.c (run_sim): Stop the simulator and reset the stdio after
- breakpoints.
-
-Tue Dec 3 11:54:37 1996 Rob Savoye <rob@chinadoll.cygnus.com>
-
- * configure.in: Look for libtermcap.a.
- * Makefile.in: Only link in -ltermcap if it exists.
- * erc32.c: Update to version 2.6a. Fix uart handling.
- * exec.c: Update to version 2.6a. Add sparclite support.
- * float.c: Update to version 2.6a. Convert comments to
- preprocessor warnings. Add __setfpucw() for i385 hosts so floating
- point exceptions work on win32.
- * func.c: Update to version 2.6a. Fix uart handling, add support
- for user error traps.
- * help.c: Update to version 2.6a. Add help note on user error
- traps.
- * interf.c: Update to version 2.6a. Fix uart handling, and add
- sparclite support.
- * examples/gccx: Use sparclite cross compiler, not native gcc.
- * examples/srt0.S: Use "mov" rather than "wr" for manipulating
- the psr register.
-
-Mon Nov 25 08:28:10 1996 Fred Fish <fnf@cygnus.com>
-
- * Makefile.in (run.o): Remove this rule, it hides the one in
- ../common/Make-common.in that correctly references the source
- in the sibling ../common directory.
-
-Wed Nov 20 01:30:12 1996 Doug Evans <dje@canuck.cygnus.com>
-
- * Makefile.in: Delete stuff moved to ../common/Make-common.in.
- (SIM_{OBJS,EXTRA_LIBS,EXTRA_LIBDEPS,EXTRA_ALL,EXTRA_INSTALL}): Define.
- (SIM_{EXTRA_CLEAN,EXTRA_CFLAGS}): Define.
- * configure.in: Simplify using macros in ../common/aclocal.m4.
- Call AC_CHECK_HEADERS(stdlib.h).
- * configure: Regenerated.
- * config.in: New file.
- * func.c (sim_set_callbacks): Delete, moved to
- * interf.c (sim_set_callbacks): here.
- (sim_callback): New global.
- Rewrite all calls to printf_filtered to go through callback.
- (sim_size,sim_trace): New functions.
- (sim_{insert,remove}_breakpoint): #if 0 out.
- * sis.c: #include "config.h". #include <stdlib.h> if present.
- (main): Coerce fprintf arg to INIT_DISASSEMBLE_INFO to fprintf_ftype.
- * sis.h: #include "callback.h".
- * run.c: Deleted, using one in ../common now.
-
-Thu Oct 3 16:12:03 1996 Jason Molenda (crash@godzilla.cygnus.co.jp)
-
- * Makefile.in (clean): Move config.log to distclean.
-
-Wed Oct 2 16:57:57 1996 Jason Molenda (crash@godzilla.cygnus.co.jp)
-
- * Makefile.in (clean): Also remove config.log.
-
-Sat Sep 14 00:00:46 1996 Ian Lance Taylor <ian@cygnus.com>
-
- * Makefile.in (CC_FOR_BUILD): New variable.
- (AR, AR_FLAGS, BISON, MAKEINFO): Remove duplicate variables.
- (RANLIB, CC): Likewise.
- (end): Use $(CC_FOR_BUILD), not $(CC).
- * configure.in: Set CC_FOR_BUILD.
- * configure: Rebuild.
-
-Sun Sep 8 14:04:37 1996 Stu Grossman (grossman@critters.cygnus.com)
-
- * erc32.c (port_init): Disable this for __GO32__ (got no pty's
- there either...).
-
-Mon Aug 12 17:04:58 1996 Stu Grossman (grossman@critters.cygnus.com)
-
- * erc32.c: Don't include sys/ioctl.h or sys/file.h. They aren't
- necessary.
- * (port_init): Don't even *try* to open pty's under _WIN32.
- * Use SIM_ADDR, not caddr_t for declaring vars that hold addresses.
- * float.c: Get rid of #warning. Makes Microsoft C barf.
- * interf.c (sim_open): Cast fprintf to (fprintf_ftype) to fix
- compiler warning.
- * (sim_load sim_create_inferior sim_read): Use prototypes only in
- decls, not defs.
- * Get rid of enum sim_stop. It's defined in remote-sim.h.
- * (sim_stop_reason): Define SIGTRAP if _WIN32.
- * sis.h: Include ansidecl.h and remote-sim.h.
-
-Wed Jul 3 16:05:23 1996 Stu Grossman (grossman@critters.cygnus.com)
-
- * erc32.c (mec_reset mec_read mec_write memory_read memory_write),
- sis.h: Get rid of all uses of long long's.
- * (close_port read_uart write_uart uarta_tx): Don't seg fault
- when can't open pty's.
- * exec.c: Add two new instructions: smul, and divscc.
- * interf.c (flush_windows): New routine to flush the register
- windows out to the stack just before returning to GDB. Makes
- backtraces work much better.
-
-Wed Jun 26 12:19:11 1996 Jason Molenda (crash@godzilla.cygnus.co.jp)
-
- * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
- INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
- (docdir, oldincludedir): Removed.
- * configure.in (AC_PREREQ): autoconf 2.5 or higher.
- (AC_PROG_INSTALL): Added.
- * configure: Rebuilt.
-
-Mon Jun 24 14:19:07 1996 Ian Lance Taylor <ian@cygnus.com>
-
- * configure.in: Call AC_PROG_CC before running configure.host.
- * configure: Rebuild with autoconf 2.10.
-
-Tue Jun 4 10:37:12 1996 Tom Tromey <tromey@csk3.cygnus.com>
-
- * Makefile.in (install): Don't check to see if tooldir exists.
- Make $(tooldir) and $(tooldir)/bin.
-
-Mon Jun 3 12:33:38 1996 Ian Lance Taylor <ian@cygnus.com>
-
- * Makefile.in (end.h): Use explicit ./ when running end.
-
-Sun May 19 21:05:31 1996 Rob Savoye <rob@chinadoll.cygnus.com>
-
- * func.c(bfd_load): Don't try to print the filename if the pfbd is
- NULL.
- * interf.c(sim_load): Pass the whole string, not just the first
- byte.
-
-Version 2.1 26-02-96
---------------------
-
-* Fixed bug in "go" command.
-
-version 2.0 05-02-96
---------------------
-
-* Fixed bug in interrupt force register (erc32.c).
-
-* Change file load function to use bfd_openr.
-
-* SIS should now be endian independent.
-
-version 1.8 24-11-95
---------------------
-
-* Fixed FPU timing - some sequences of FPU instructions did not calculate
- the resource dependencies right.
-
-* Corrected STDFQ when qne = 0 (again!). The ftt is set to sequence_error
- but no FPU trap is generated.
-
-version 1.7.1 31-10-95
---------------------
-
-* Corrected STDFQ when qne = 0. Now, a trap is immidiately generated but
- the FPU stays in execute mode.
-
-* Corrected JMPL and RETT timing (these instructions takes two cycles).
-
-
-version 1.7 25-10-95
---------------------
-
-* Interrupt during annuled instruction corrupted return address - fixed.
-
-
-version 1.6.2 25-10-95
---------------------
-
-* Added -DFAST_UART to Makefile
-
-
-version 1.6.1 24-10-95
---------------------
-
-* Fixed bug in STDFQ which caused bus error
-
-
-version 1.6 02-10-95
---------------------
-
-* Modified srt0.s to include code that initiates registers in IU and FPU
- and initializes the data segment. The simulator 'load' command does not
- longer initialize the data segment!
-
-* Corrected MEC timer operation; scalers now divide the frequency by
- (scaler_value + 1).
-
-* MEC breakpoints are not checked during store operation
-
-
-version 1.5 14-09-95
---------------------
-
-* Fixed some bugs in the cycle counting for IU & FPU instructions.
-
-* Fixed bug that allowed an annuled instruction to cause memory exception.
-
-* The *ws parameter in mem.c should now contain the number of waitstates
- required by the memory access (was total number of cycles).
-
-* The supplied srt0.s now clears the BSS (thanks Joel).
-
-version 1.4 22-08-95
---------------------
-
-* Added a '-g' switch to enable/disable the GNU readline(), which cause
-some problems on solaris 2.x machines.
-
-* Enabled MEC watchpoint and breakpoint function to mem.c. Performance
-may suffer a bit ...
-
-NOTE: The UARTs are now connected to /dev/ttypc and /dev/ttypd.
-
-version 1.3 26-07-95
---------------------
-
-* Fixed bug in mulscc instruction (how could that ever have worked?)
-
-* Fixed bug in UART B (flushed characters on UART A), thanks Paul.
-
-version 1.2 13-07-95
---------------------
-
-* Fixed bug in interrupt handling (wrong interrupt selected when more that
-one interrupt pending)
-
-* Fixed updating of condition codes during logical instructions (carry and
-overflow were not reset)
-
-* Fixed bug in WRTBR (tt field was wrongly over-written)
-
-version 1.1 07-07-95
---------------------
-
-* Fixed several bugs in the interrupt handler and callback routines.
-(reported by Paul Warren, Alsys)
diff --git a/sim/erc32/Makefile.in b/sim/erc32/Makefile.in
deleted file mode 100644
index 845815a174e..00000000000
--- a/sim/erc32/Makefile.in
+++ /dev/null
@@ -1,75 +0,0 @@
-# Makefile template for Configure for the erc32sim library.
-# Copyright (C) 1993, 1996, 1997 Free Software Foundation, Inc.
-# Written by Cygnus Support
-# Modified by J.Gaisler ESA/ESTEC
-#
-# This program is free software; you can redistribute it and/or modify
-# it under the terms of the GNU General Public License as published by
-# the Free Software Foundation; either version 2 of the License, or
-# (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
-## COMMON_PRE_CONFIG_FRAG
-
-TERMCAP_LIB = @TERMCAP@
-
-SIM_OBJS = exec.o erc32.o func.o help.o float.o interf.o
-SIM_EXTRA_LIBS = ../../readline/libreadline.a $(TERMCAP_LIB) -lm
-SIM_EXTRA_LIBDEPS = ../../readline/libreadline.a
-SIM_EXTRA_ALL = sis
-SIM_EXTRA_INSTALL = install-sis
-SIM_EXTRA_CLEAN = clean-sis
-
-# UARTS run at about 115200 baud (simulator time). Add -DFAST_UART to
-# CFLAGS if faster (infinite) UART speed is desired. Might affect the
-# behaviour of UART interrupt routines ...
-SIM_EXTRA_CFLAGS = -DSTAT -DFAST_UART -DIUREV0 -DMECREV0
-
-## COMMON_POST_CONFIG_FRAG
-
-# `sis' doesn't need interf.o.
-SIS_OFILES = exec.o erc32.o func.o help.o float.o
-
-sis: sis.o $(SIS_OFILES) $(COMMON_OBJS) $(LIBDEPS)
- $(CC) $(ALL_CFLAGS) -o sis \
- sis.o $(SIS_OFILES) $(COMMON_OBJS) $(EXTRA_LIBS)
-
-# FIXME: This computes the build host's endianness, doesn't it?
-# There is AC_C_BIGENDIAN but it doesn't handle float endianness.
-# [Are int/float endians every different on a sparc?]
-end: $(srcdir)/end.c
- $(CC_FOR_BUILD) $(srcdir)/end.c -o end
-end.h: end
- ./end > end.h
-
-# Copy the files into directories where they will be run.
-install-sis: installdirs
- n=`echo sis | sed '$(program_transform_name)'`; \
- $(INSTALL_PROGRAM) sis$(EXEEXT) $(bindir)/$$n$(EXEEXT)
-
-clean-sis:
- rm -f sis end end.h
-
-configure:
- @echo "Rebuilding configure..."
- if [ x"${srcdir}" = x"@srcdir@" ] ; then \
- srcdir=. ; export srcdir ; \
- else true ; fi ; \
- (cd $${srcdir}; autoconf --localdir=../common)
-
-# Circumvent Sun Make bug with VPATH.
-erc32.o: erc32.c sis.h end.h
-exec.o: exec.c sis.h end.h
-float.o: float.c sis.h end.h
-func.o: func.c
-help.o: help.c
-interf.o: interf.c sis.h end.h
-sis.o: sis.c sis.h end.h
diff --git a/sim/erc32/NEWS b/sim/erc32/NEWS
deleted file mode 100644
index dd24b7b23f7..00000000000
--- a/sim/erc32/NEWS
+++ /dev/null
@@ -1,108 +0,0 @@
-
-version 2.0 05-02-96
---------------------
-
-* Switched to bfd library. Any supported format (elf, coff, ...) can be used.
-* The UART devices can be set through -uart1 and -uart2 switches.
-* Switched to GNU readline.
-* Added -c option to run batch files at startup
-* 'reg' command can show different register windows (eg 'reg w3').
-* Use 'help' for online help on simulator commands
-
-version 1.8.1 20-01-96
---------------------
-
-* added -mevrev0 switch to simulate MEC rev.0 bugs in timer and uart
-
-* added -iurev0 switch to simulate IU rev.0 jmpl/restore bug
-
-* Added sis command 'batch' to run batch files
-
-
-version 1.8 30-10-95
---------------------
-
-* Added s-record support. Use the '-s' switch with sis or the 'load' command.
-
-* IU load dependencies are now modelled
-
-version 1.7 30-10-95
---------------------
-
-* Power-down mode implemented in erc32.c.
-
-* Performance display shows the ratio between simulator-time and real-time.
-
-
-version 1.6.2 25-10-95
---------------------
-
-* The UARTs can now be run at a given speed (simulator time) to better
- simulate the behaviour of interrupt routines. The "true mode" is
- selected through a compile switch in the makefile.
-
-
-version 1.6 28-09-95
---------------------
-
-* Major reorganisation of the code. mec.c and mem.c merged into erc32.c.
-
-* The load command does NOT longer load the initialised data at an address
- defined by .bdata. This is done in srt0.s using _environ.
-
-* Additional MEC functionallity added - software reset, memory access
- protection and waitstate configuration register.
-
-* interf.c - a GDB interface added
-
-* -v switch (verbose) added
-
-version 1.5 14-09-95
---------------------
-
-* Added a instruction trace buffer, enabled through the 'hist' command.
-
-* Added a 'perf' command to display statistics such as instruction mix,
- CPI, FPU holds etc.
-
-* Added -nfp switch to disable FPU.
-
-* Added -freq switch to set simulated frequency.
-
-version 1.4 22-08-95
---------------------
-
-* A -g is provided for those who have problems with GNU readline().
-
-version 1.3 26-07-95
---------------------
-
-* No major news, just a bug fix release ...
-
-
-version 1.2 13-07-95
---------------------
-
-* Added setting of IU registers through the 'reg' command. See README.
-
-* The GNU readline() function is used for command input. However, a
-ctrl-D still kills the simulator ...
-
-
-version 1.1 07-07-95
---------------------
-
-
-* Added a 'go' command
-
-* Added cycle counting for interrupt overhead.
-
-* Function 'get_mem_ptr' takes one more parameter to avoid segmentation
- faults if a.out files are loaded outside the simulated memory. See README.
-
-* Added user-defined function sim_stop().
-
-* Added a reset command. See README.
-
-* Implemented buffered output for MEC uarts to improve output speed.
-
diff --git a/sim/erc32/README.erc32 b/sim/erc32/README.erc32
deleted file mode 100644
index f413599294c..00000000000
--- a/sim/erc32/README.erc32
+++ /dev/null
@@ -1,130 +0,0 @@
-
-1. MEC and ERC32 emulation
-
-The file 'erc32.c' contains a model of the MEC, 512 K rom and 4 M ram.
-
-The following paragraphs outline the implemented MEC functions.
-
-1.1 UARTs
-
-The UARTs are connected to two pseudo-devices, /dev/ttypc and /dev/ttypd.
-The following registers are implemeted:
-
-- UART A RX and TX register (0x01f800e0)
-- UART B RX and TX register (0x01f800e4)
-- UART status register (0x01f800e8)
-
-To speed up simulation, the UARTs operate at approximately 115200 baud.
-The UARTs generate interrupt 4 and 5 after each received or transmitted
-character. The error interrupt is generated if overflow occurs - other
-errors cannot occure.
-
-1.2 Real-time clock and general pupose timer A
-
-The following registers are implemeted:
-
-- Real-time clock timer (0x01f80080, read-only)
-- Real-time clock scaler program register (0x01f80084, write-only)
-- Real-time clock counter program register (0x01f80080, write-only)
-
-- Genearl pupose timer (0x01f80088, read-only)
-- Real-time clock scaler program register (0x01f8008c, write-only)
-- General purpose timer counter prog. register (0x01f80088, write-only)
-
-- Timer control register (0x01f80098, write-only)
-
-1.3 Interrupt controller
-
-The interrupt controller is implemented as in the MEC specification with
-the exception of the interrupt shape register. Since external interrupts
-are not possible, the interrupt shape register is not implemented. The
-only internal interrupts that are generated are the real-time clock,
-the general purpose timer and UARTs. However, all 15 interrupts
-can be tested via the interrupt force register.
-
-The following registers are implemeted:
-
-- Interrupt pending register (0x01f80048, read-only)
-- Interrupt mask register (0x01f8004c, read-write)
-- Interrupt clear register (0x01f80050, write-only)
-- Interrupt force register (0x01f80054, read-write)
-
-1.4 Breakpoint and watchpoint register
-
-The breakpoint and watchpoint functions are implemented as in the MEC
-specification. Traps are correctly generated, and the system fault status
-register is updated accordingly. Implemeted registers are:
-
-- Debug control register (0x01f800c0, read-write)
-- Breakpoint register (0x01f800c4, write-only)
-- Watchpoint register (0x01f800c8, write-only)
-- System fault status register (0x01f800a0, read-write)
-- Firts failing address register (0x01f800a4, read-write)
-
-
-1.5 Memory interface
-
-The following memory areas are valid for the ERC32 simulator:
-
-0x00000000 - 0x00080000 ROM (512 Kbyte, loaded at start-up)
-0x02000000 - 0x02400000 RAM (4 Mbyte, initialised to 0x0)
-0x01f80000 - 0x01f800ff MEC registers
-
-Access to unimplemented MEC registers or non-existing memory will result
-in a memory exception trap. However, access to unimplemented MEC registers
-in the area 0x01f80000 - 0x01f80100 will not cause a memory exception trap.
-The written value will be stored in a register and can be read back. It
-does however not affect the function in any way.
-
-The memory configuartion register is used to define available memory
-in the system. The fields RSIZ and PSIZ are used to set RAM and ROM
-size, the remaining fields are not used. NOTE: after reset, the MEC
-is set to decode 4 Kbyte of ROM and 256 Kbyte of RAM. The memory
-configuration register has to be updated to reflect the available memory.
-
-The waitstate configuration register is used to generate waitstates.
-This register must also be updated with the correct configuration after
-reset.
-
-The memory protection scheme is implemented - it is enabled through bit 3
-in the MEC control register.
-
-The following registers are implemeted:
-
-- MEC control register (bit 3 only) (0x01f80000, read-write)
-- Memory control register (0x01f80010, read-write)
-- Waitstate configuration register (0x01f80018, read-write)
-- Memory access register 0 (0x01f80020, read-write)
-- Memory access register 1 (0x01f80024, read-write)
-
-1.6 Watchdog
-
-The watchdog is implemented as in the specification. The input clock is
-always the system clock regardsless of WDCS bit in mec configuration
-register.
-
-The following registers are implemeted:
-
-- Watchdog program and acknowledge register (0x01f80060, write-only)
-- Watchdog trap door set register (0x01f80064, write-only)
-
-1.7 Software reset register
-
-Implemented as in the specification (0x01f800004, write-only).
-
-1.8 Power-down mode
-
-The power-down register (0x01f800008) is implemented as in the specification.
-However, if the simulator event queue is empty, power-down mode is not
-entered since no interrupt would be generated to exit from the mode. A
-Ctrl-C in the simulator window will exit the power-down mode.
-
-1.9 MEC control register
-
-The following bits are implemented in the MEC control register:
-
-Bit Name Function
-0 PRD Power-down mode enable
-1 SWR Soft reset enable
-3 APR Access protection enable
-
diff --git a/sim/erc32/README.gdb b/sim/erc32/README.gdb
deleted file mode 100644
index 619fcb38fc9..00000000000
--- a/sim/erc32/README.gdb
+++ /dev/null
@@ -1,67 +0,0 @@
-How to use SIS with GDB
------------------------
-
-1. Building GDB with SIS
-
-To build GDB with the SIS/ERC32 simulator, configure with option
-'--target sparc-erc32-aout' and build as usual.
-
-2. Attaching the simulator
-
-To attach GDB to the simulator, use:
-
-target sim [options] [files]
-
-The following options are supported:
-
- -nfp Disable FPU. FPops will cause an FPU disabled trap.
-
- -freq <f> Set the simulated "system clock" to <f> MHz.
-
- -v Verbose mode.
-
- -nogdb Disable GDB breakpoint handling (see below)
-
-The listed [files] are expected to be in aout format and will be
-loaded in the simulator memory prior. This could be used to load
-a boot block at address 0x0 if the application is linked to run
-from RAM (0x2000000).
-
-To start debugging a program type 'load <program>' and debug as
-usual.
-
-The native simulator commands can be reached using the GDB 'sim'
-command:
-
-sim <sis_command>
-
-Direct simulator commands during a GDB session must be issued
-with care not to disturb GDB's operation ...
-
-For info on supported ERC32 functionality, see README.sis.
-
-
-3. Loading aout files
-
-The GDB load command loads an aout file into the simulator
-memory with the data section starting directly after the text
-section regardless of wich start address was specified for the data
-at link time! This means that your applications either has to include
-a routine that initialise the data segment at the proper address or
-link with the data placed directly after the text section.
-
-A copying routine is fairly simple, just copy all data between
-_etext and _data to a memory loaction starting at _environ. This
-should be done at the same time as the bss is cleared (in srt0.s).
-
-
-4. GDB breakpoint handling
-
-GDB inserts breakpoint in the form of the 'ta 1' instruction. The
-GDB-integrated simulator will therefore recognize the breakpoint
-instruction and return control to GDB. If the application uses
-'ta 1', the breakpoint detection can be disabled with the -nogdb
-switch. In this case however, GDB breakpoints will not work.
-
-
-Report problems to Jiri Gaisler ESA/ESTEC (jgais@wd.estec.esa.nl)
diff --git a/sim/erc32/README.sis b/sim/erc32/README.sis
deleted file mode 100644
index b119f038ac2..00000000000
--- a/sim/erc32/README.sis
+++ /dev/null
@@ -1,356 +0,0 @@
-
-SIS - Sparc Instruction Simulator README file (v2.0, 05-02-1996)
--------------------------------------------------------------------
-
-1. Introduction
-
-The SIS is a SPARC V7 architecture simulator. It consist of two parts,
-the simulator core and a user defined memory module. The simulator
-core executes the instructions while the memory module emulates memory
-and peripherals.
-
-2. Usage
-
-The simulator is started as follows:
-
-sis [-uart1 uart_device1] [-uart2 uart_device2]
- [-nfp] [-freq frequency] [-c batch_file] [files]
-
-The default uart devices for SIS are /dev/ptypc and /dev/ptypd. The
--uart[1,2] switch can be used to connect the uarts to other devices.
-Use 'tip /dev/ttypc' to connect a terminal emulator to the uarts.
-The '-nfp' will disable the simulated FPU, so each FPU instruction will
-generate a FPU disabled trap. The '-freq' switch can be used to define
-which "frequency" the simulator runs at. This is used by the 'perf'
-command to calculated the MIPS figure for a particular configuration.
-The give frequency must be an integer indicating the frequency in MHz.
-
-The -c option indicates that sis commands should be read from 'batch_file'
-at startup.
-
-Files to be loaded must be in one of the supported formats (see INSTALLATION),
-and will be loaded into the simulated memory. The file formats are
-automatically recognised.
-
-The script 'startsim' will start the simulator in one xterm window and
-open a terminal emulator (tip) connected to the UART A in a second
-xterm window. Below is description of commands that are recognized by
-the simulator. The command-line is parsed using GNU readline. A command
-history of 64 commands is maintained. Use the up/down arrows to recall
-previous commands. For more details, see the readline documentation.
-
-batch <file>
-
-Execute a batch file of SIS commands.
-
-+bp <address>
-
-Adds an breakpoint at address <address>.
-
-bp
-
-Prints all breakpoints
-
--bp <num>
-
-Deletes breakpoint <num>. Use 'bp' to see which number is assigned to the
-breakpoints.
-
-cont [inst_count]
-
-Continue execution at present position, optionally for [inst_count]
-instructions.
-
-dis [addr] [count]
-
-Disassemble [count] instructions at address [addr]. Default values for
-count is 16 and addr is the present address.
-
-echo <string>
-
-Print <string> to the simulator window.
-
-float
-
-Prints the FPU registers
-
-go <address> [inst_count]
-
-The go command will set pc to <address> and npc to <address> + 4, and start
-execution. No other initialisation will be done. If inst_count is given,
-execution will stop after the specified number of instructions.
-
-help
-
-Print a small help menu for the SIS commands.
-
-hist [trace_length]
-
-Enable the instruction trace buffer. The 'trace_length' last executed
-instructions will be placed in the trace buffer. A 'hist' command without
-a trace_length will display the trace buffer. Specifying a zero trace
-length will disable the trace buffer.
-
-load <file_name>
-
-Loads a file into simulator memory.
-
-mem [addr] [count]
-
-Display memory at [addr] for [count] bytes. Same default values as above.
-
-quit
-
-Exits the simulator.
-
-perf [reset]
-
-The 'perf' command will display various execution statistics. A 'perf reset'
-command will reset the statistics. This can be used if statistics shall
-be calculated only over a part of the program. The 'run' and 'reset'
-command also resets the statistic information.
-
-reg [reg_name] [value]
-
-Prints and sets the IU regiters. 'reg' without parameters prints the IU
-registers. 'reg [reg_name] [value]' sets the corresponding register to
-[value]. Valid register names are psr, tbr, wim, y, g1-g7, o0-o7 and
-l0-l7.
-
-reset
-
-Performs a power-on reset. This command is equal to 'run 0'.
-
-run [inst_count]
-
-Resets the simulator and starts execution from address 0. If an instruction
-count is given (inst_count), the simulator will stop after the specified
-number of instructions. The event queue is emptied but any set breakpoints
-remain.
-
-step
-
-Equal to 'trace 1'
-
-tra [inst_count]
-
-Starts the simulator at the present position and prints each instruction
-it executes. If an instruction count is given (inst_count), the simulator
-will stop after the specified number of instructions.
-
-Typing a 'Ctrl-C' will interrupt a running simulator.
-
-Short forms of the commands are allowed, e.g 'c' 'co' or 'con' are all
-interpreted as 'cont'.
-
-
-3. Simulator core
-
-The SIS emulates the behavior of the 90C601E and 90C602E sparc IU and
-FPU from Matra MHS. These are roughly equivalent to the Cypress C601
-and C602. The simulator is cycle true, i.e a simulator time is
-maintained and inremented according the IU and FPU instruction timing.
-The parallel execution between the IU and FPU is modelled, as well as
-stalls due to operand dependencies (FPU). The core interacts with the
-user-defined memory modules through a number of functions. The memory
-module must provide the following functions:
-
-int memory_read(asi,addr,data,ws)
-int asi;
-unsigned int addr;
-unsigned int *data;
-int *ws;
-
-int memory_write(asi,addr,data,sz,ws)
-int asi;
-unsigned int addr;
-unsigned int *data;
-int sz;
-int *ws;
-
-int sis_memory_read(addr, data, length)
-unsigned int addr;
-char *data;
-unsigned int length;
-
-int sis_memory_write(addr, data, length)
-unsigned int addr;
-char *data;
-unsigned int length;
-
-int init_sim()
-
-int reset()
-
-int error_mode(pc)
-unsigned int pc;
-
-memory_read() is used by the simulator to fetch instructions and
-operands. The address space identifier (asi) and address is passed as
-parameters. The read data should be assigned to the data pointer
-(*data) and the number of waitstate to *ws. 'memory_read' should return
-0 on success and 1 on failure. A failure will cause a data or
-instruction fetch trap. memory_read() always reads one 32-bit word.
-
-sis_memory_read() is used by the simulator to display and disassemble
-memory contants. The function should copy 'length' bytes of the simulated
-memory starting at 'addr' to '*data'.
-The sis_memory_read() should return 1 on success and 0 on failure.
-Failure should only be indicated if access to unimplemented memory is attempted.
-
-memory_write() is used to write to memory. In addition to the asi
-and address parameters, the size of the written data is given by 'sz'.
-The pointer *data points to the data to be written. The 'sz' is coded
-as follows:
-
- sz access type
- 0 byte
- 1 halfword
- 2 word
- 3 double-word
-
-If a double word is written, the most significant word is in data[0] and
-the least significant in data[1].
-
-sis_memory_write() is used by the simulator during loading of programs.
-The function should copy 'length' bytes from *data to the simulated
-memory starting at 'addr'. sis_memory_write() should return 1 on
-success and 0 on failure. Failure should only be indicated if access
-to unimplemented memory is attempted. See erc32.c for more details
-on how to define the memory emulation functions.
-
-The 'init_sim' is called once when the simulator is started. This function
-should be used to perform initialisations of user defined memory or
-peripherals that only have to be done once, such as opening files etc.
-
-The 'reset' is called every time the simulator is reset, i.e. when a
-'run' command is given. This function should be used to simulate a power
-on reset of memory and peripherals.
-
-error_mode() is called by the simulator when the IU goes into error mode,
-typically if a trap is caused when traps are disabled. The memory module
-can then take actions, such as issue a reset.
-
-sys_reset() can be called by the memory module to reset the simulator. A
-reset will empty the event queue and perform a power-on reset.
-
-4. Events and interrupts
-
-The simulator supports an event queue and the generation of processor
-interrupts. The following functions are available to the user-defined
-memory module:
-
-event(cfunc,arg,delta)
-void (*cfunc)();
-int arg;
-unsigned int delta;
-
-set_int(level,callback,arg)
-int level;
-void (*callback)();
-int arg;
-
-clear_int(level)
-int level;
-
-sim_stop()
-
-The 'event' functions will schedule the execution of the function 'cfunc'
-at time 'now + delta' clock cycles. The parameter 'arg' is passed as a
-parameter to 'cfunc'.
-
-The 'set_int' function set the processor interrupt 'level'. When the interrupt
-is taken, the function 'callback' is called with the argument 'arg'. This
-will also clear the interrupt. An interrupt can be cleared before it is
-taken by calling 'clear_int' with the appropriate interrupt level.
-
-The sim_stop function is called each time the simulator stops execution.
-It can be used to flush buffered devices to get a clean state during
-single stepping etc.
-
-See 'erc32.c' for examples on how to use events and interrupts.
-
-5. Memory module
-
-The supplied memory module (erc32.c) emulates the functions of memory and
-the MEC asic developed for the 90C601/2. It includes the following functions:
-
-* UART A & B
-* Real-time clock
-* General purpose timer
-* Interrupt controller
-* Breakpoint register
-* Watchpoint register
-* 512 Kbyte ROM
-* 4 Mbyte RAM
-
-See README.erc32 on how the MEC functions are emulated. For a detailed MEC
-specification, look at the ERC32 home page at URL:
-
-http://www.estec.esa.nl/wsmwww/erc32
-
-6. Compile and linking programs
-
-The directory 'examples' contain some code fragments for SIS.
-The script gccx indicates how the native sunos gcc and linker can be used
-to produce executables for the simulator. To compile and link the provided
-'hello.c', type 'gccx hello.c'. This will build the executable 'hello'.
-Start the simulator by running 'startsim hello', and issue the command 'run.
-After the program is terminated, the IU will be force to error mode through
-a software trap and halt.
-
-The programs are linked with a start-up file, srt0.S. This file includes
-the traptable and window underflow/overflow trap routines.
-
-7. IU and FPU instruction timing.
-
-The simulator provides cycle true simulation. The following table shows
-the emulated instruction timing for 90C601E & 90C602E:
-
-Instructions Cycles
-
-jmpl, rett 2
-load 2
-store 3
-load double 3
-store double 4
-other integer ops 1
-fabs 2
-fadds 4
-faddd 4
-fcmps 4
-fcmpd 4
-fdivs 20
-fdivd 35
-fmovs 2
-fmuls 5
-fmuld 9
-fnegs 2
-fsqrts 37
-fsqrtd 65
-fsubs 4
-fsubd 4
-fdtoi 7
-fdots 3
-fitos 6
-fitod 6
-fstoi 6
-fstod 2
-
-The parallel operation between the IU and FPU is modelled. This means
-that a FPU instruction will execute in parallel with other instructions as
-long as no data or resource dependency is detected. See the 90C602E data
-sheet for the various types of dependencies. Tracing using the 'trace'
-command will display the current simulator time in the left column. This
-time indicates when the instruction is fetched. If a dependency is detetected,
-the following fetch will be delayed until the conflict is resolved.
-
-The load dependency in the 90C601E is also modelled - if the destination
-register of a load instruction is used by the following instruction, an
-idle cycle is inserted.
-
-8. FPU implementation
-
-The simulator maps floating-point operations on the hosts floating point
-capabilities. This means that accuracy and generation of IEEE exceptions is
-host dependent.
diff --git a/sim/erc32/acconfig.h b/sim/erc32/acconfig.h
deleted file mode 100644
index f9b87a10c60..00000000000
--- a/sim/erc32/acconfig.h
+++ /dev/null
@@ -1,15 +0,0 @@
-
-/* Define to 1 if NLS is requested. */
-#undef ENABLE_NLS
-
-/* Define as 1 if you have catgets and don't want to use GNU gettext. */
-#undef HAVE_CATGETS
-
-/* Define as 1 if you have gettext and don't want to use GNU gettext. */
-#undef HAVE_GETTEXT
-
-/* Define as 1 if you have the stpcpy function. */
-#undef HAVE_STPCPY
-
-/* Define if your locale.h file contains LC_MESSAGES. */
-#undef HAVE_LC_MESSAGES
diff --git a/sim/erc32/config.in b/sim/erc32/config.in
deleted file mode 100644
index 1f87a2bee4e..00000000000
--- a/sim/erc32/config.in
+++ /dev/null
@@ -1,158 +0,0 @@
-/* config.in. Generated automatically from configure.in by autoheader. */
-
-/* Define if using alloca.c. */
-#undef C_ALLOCA
-
-/* Define to empty if the keyword does not work. */
-#undef const
-
-/* Define to one of _getb67, GETB67, getb67 for Cray-2 and Cray-YMP systems.
- This function is required for alloca.c support on those systems. */
-#undef CRAY_STACKSEG_END
-
-/* Define if you have alloca, as a function or macro. */
-#undef HAVE_ALLOCA
-
-/* Define if you have <alloca.h> and it should be used (not on Ultrix). */
-#undef HAVE_ALLOCA_H
-
-/* Define if you have a working `mmap' system call. */
-#undef HAVE_MMAP
-
-/* Define as __inline if that's what the C compiler calls it. */
-#undef inline
-
-/* Define to `long' if <sys/types.h> doesn't define. */
-#undef off_t
-
-/* Define if you need to in order for stat and other things to work. */
-#undef _POSIX_SOURCE
-
-/* Define as the return type of signal handlers (int or void). */
-#undef RETSIGTYPE
-
-/* Define to `unsigned' if <sys/types.h> doesn't define. */
-#undef size_t
-
-/* If using the C implementation of alloca, define if you know the
- direction of stack growth for your system; otherwise it will be
- automatically deduced at run-time.
- STACK_DIRECTION > 0 => grows toward higher addresses
- STACK_DIRECTION < 0 => grows toward lower addresses
- STACK_DIRECTION = 0 => direction of growth unknown
- */
-#undef STACK_DIRECTION
-
-/* Define if you have the ANSI C header files. */
-#undef STDC_HEADERS
-
-/* Define to 1 if NLS is requested. */
-#undef ENABLE_NLS
-
-/* Define as 1 if you have gettext and don't want to use GNU gettext. */
-#undef HAVE_GETTEXT
-
-/* Define as 1 if you have the stpcpy function. */
-#undef HAVE_STPCPY
-
-/* Define if your locale.h file contains LC_MESSAGES. */
-#undef HAVE_LC_MESSAGES
-
-/* Define if you have the __argz_count function. */
-#undef HAVE___ARGZ_COUNT
-
-/* Define if you have the __argz_next function. */
-#undef HAVE___ARGZ_NEXT
-
-/* Define if you have the __argz_stringify function. */
-#undef HAVE___ARGZ_STRINGIFY
-
-/* Define if you have the __setfpucw function. */
-#undef HAVE___SETFPUCW
-
-/* Define if you have the dcgettext function. */
-#undef HAVE_DCGETTEXT
-
-/* Define if you have the getcwd function. */
-#undef HAVE_GETCWD
-
-/* Define if you have the getpagesize function. */
-#undef HAVE_GETPAGESIZE
-
-/* Define if you have the getrusage function. */
-#undef HAVE_GETRUSAGE
-
-/* Define if you have the munmap function. */
-#undef HAVE_MUNMAP
-
-/* Define if you have the putenv function. */
-#undef HAVE_PUTENV
-
-/* Define if you have the setenv function. */
-#undef HAVE_SETENV
-
-/* Define if you have the setlocale function. */
-#undef HAVE_SETLOCALE
-
-/* Define if you have the sigaction function. */
-#undef HAVE_SIGACTION
-
-/* Define if you have the stpcpy function. */
-#undef HAVE_STPCPY
-
-/* Define if you have the strcasecmp function. */
-#undef HAVE_STRCASECMP
-
-/* Define if you have the strchr function. */
-#undef HAVE_STRCHR
-
-/* Define if you have the time function. */
-#undef HAVE_TIME
-
-/* Define if you have the <argz.h> header file. */
-#undef HAVE_ARGZ_H
-
-/* Define if you have the <fcntl.h> header file. */
-#undef HAVE_FCNTL_H
-
-/* Define if you have the <fpu_control.h> header file. */
-#undef HAVE_FPU_CONTROL_H
-
-/* Define if you have the <limits.h> header file. */
-#undef HAVE_LIMITS_H
-
-/* Define if you have the <locale.h> header file. */
-#undef HAVE_LOCALE_H
-
-/* Define if you have the <malloc.h> header file. */
-#undef HAVE_MALLOC_H
-
-/* Define if you have the <nl_types.h> header file. */
-#undef HAVE_NL_TYPES_H
-
-/* Define if you have the <stdlib.h> header file. */
-#undef HAVE_STDLIB_H
-
-/* Define if you have the <string.h> header file. */
-#undef HAVE_STRING_H
-
-/* Define if you have the <strings.h> header file. */
-#undef HAVE_STRINGS_H
-
-/* Define if you have the <sys/param.h> header file. */
-#undef HAVE_SYS_PARAM_H
-
-/* Define if you have the <sys/resource.h> header file. */
-#undef HAVE_SYS_RESOURCE_H
-
-/* Define if you have the <sys/time.h> header file. */
-#undef HAVE_SYS_TIME_H
-
-/* Define if you have the <time.h> header file. */
-#undef HAVE_TIME_H
-
-/* Define if you have the <unistd.h> header file. */
-#undef HAVE_UNISTD_H
-
-/* Define if you have the <values.h> header file. */
-#undef HAVE_VALUES_H
diff --git a/sim/erc32/configure b/sim/erc32/configure
deleted file mode 100755
index 0e562231021..00000000000
--- a/sim/erc32/configure
+++ /dev/null
@@ -1,4096 +0,0 @@
-#! /bin/sh
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-sim_inline="-DDEFAULT_INLINE=0"
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-# This file is derived from `gettext.m4'. The difference is that the
-# included macros assume Cygnus-style source and build trees.
-
-# Macro to add for using GNU gettext.
-# Ulrich Drepper <drepper@cygnus.com>, 1995.
-#
-# This file file be copied and used freely without restrictions. It can
-# be used in projects which are not available under the GNU Public License
-# but which still want to provide support for the GNU gettext functionality.
-# Please note that the actual code is *not* freely available.
-
-# serial 3
-
-
-
-
-
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-ac_link='${CC-cc} -o conftest${ac_exeext} $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS 1>&5'
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-
-ac_exeext=
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-' ac_t=' '
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- ac_n= ac_c='\c' ac_t=
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-
-
-
-echo $ac_n "checking how to run the C preprocessor""... $ac_c" 1>&6
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- # This must be in double quotes, not single quotes, because CPP may get
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- cat > conftest.$ac_ext <<EOF
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- echo "$ac_err" >&5
- echo "configure: failed program was:" >&5
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- CPP="${CC-cc} -E -traditional-cpp"
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-#line 711 "configure"
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-EOF
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-{ (eval echo configure:717: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
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- echo "$ac_err" >&5
- echo "configure: failed program was:" >&5
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-#line 728 "configure"
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-{ (eval echo configure:734: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
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- echo "configure: failed program was:" >&5
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-rm -f conftest*
- ac_cv_prog_CPP="$CPP"
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-echo "$ac_t""$CPP" 1>&6
-
-echo $ac_n "checking whether ${MAKE-make} sets \${MAKE}""... $ac_c" 1>&6
-echo "configure:759: checking whether ${MAKE-make} sets \${MAKE}" >&5
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-if eval "test \"`echo '$''{'ac_cv_prog_make_${ac_make}_set'+set}'`\" = set"; then
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-if eval "test \"`echo '$ac_cv_prog_make_'${ac_make}_set`\" = yes"; then
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- echo "$ac_t""no" 1>&6
- SET_MAKE="MAKE=${MAKE-make}"
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-
-echo $ac_n "checking for POSIXized ISC""... $ac_c" 1>&6
-echo "configure:786: checking for POSIXized ISC" >&5
-if test -d /etc/conf/kconfig.d &&
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- echo "$ac_t""no" 1>&6
- ISC=
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-
-echo $ac_n "checking for ANSI C header files""... $ac_c" 1>&6
-echo "configure:807: checking for ANSI C header files" >&5
-if eval "test \"`echo '$''{'ac_cv_header_stdc'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 812 "configure"
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-ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
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-ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
-if test -z "$ac_err"; then
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- ac_cv_header_stdc=yes
-else
- echo "$ac_err" >&5
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- ac_cv_header_stdc=no
-fi
-rm -f conftest*
-
-if test $ac_cv_header_stdc = yes; then
- # SunOS 4.x string.h does not declare mem*, contrary to ANSI.
-cat > conftest.$ac_ext <<EOF
-#line 837 "configure"
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-#include <string.h>
-EOF
-if (eval "$ac_cpp conftest.$ac_ext") 2>&5 |
- egrep "memchr" >/dev/null 2>&1; then
- :
-else
- rm -rf conftest*
- ac_cv_header_stdc=no
-fi
-rm -f conftest*
-
-fi
-
-if test $ac_cv_header_stdc = yes; then
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-cat > conftest.$ac_ext <<EOF
-#line 855 "configure"
-#include "confdefs.h"
-#include <stdlib.h>
-EOF
-if (eval "$ac_cpp conftest.$ac_ext") 2>&5 |
- egrep "free" >/dev/null 2>&1; then
- :
-else
- rm -rf conftest*
- ac_cv_header_stdc=no
-fi
-rm -f conftest*
-
-fi
-
-if test $ac_cv_header_stdc = yes; then
- # /bin/cc in Irix-4.0.5 gets non-ANSI ctype macros unless using -ansi.
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- cat > conftest.$ac_ext <<EOF
-#line 876 "configure"
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-
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-if { (eval echo configure:887: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null
-then
- :
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -fr conftest*
- ac_cv_header_stdc=no
-fi
-rm -fr conftest*
-fi
-
-fi
-fi
-
-echo "$ac_t""$ac_cv_header_stdc" 1>&6
-if test $ac_cv_header_stdc = yes; then
- cat >> confdefs.h <<\EOF
-#define STDC_HEADERS 1
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-
-fi
-
-echo $ac_n "checking for working const""... $ac_c" 1>&6
-echo "configure:911: checking for working const" >&5
-if eval "test \"`echo '$''{'ac_cv_c_const'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 916 "configure"
-#include "confdefs.h"
-
-int main() {
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-/* Ultrix mips cc rejects this. */
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-/* NEC SVR4.0.2 mips cc rejects this. */
-struct point {int x, y;};
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-{ /* Someone thinks the Sun supposedly-ANSI compiler will reject this. */
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-{ /* Sun SC1.0 ANSI compiler rejects this -- but not the above. */
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-{ /* AIX XL C 1.02.0.0 rejects this saying
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-{ /* ULTRIX-32 V3.1 (Rev 9) vcc rejects this */
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-
-; return 0; }
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-if { (eval echo configure:965: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
- rm -rf conftest*
- ac_cv_c_const=yes
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- ac_cv_c_const=no
-fi
-rm -f conftest*
-fi
-
-echo "$ac_t""$ac_cv_c_const" 1>&6
-if test $ac_cv_c_const = no; then
- cat >> confdefs.h <<\EOF
-#define const
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-
-fi
-
-echo $ac_n "checking for inline""... $ac_c" 1>&6
-echo "configure:986: checking for inline" >&5
-if eval "test \"`echo '$''{'ac_cv_c_inline'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- ac_cv_c_inline=no
-for ac_kw in inline __inline__ __inline; do
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-#line 993 "configure"
-#include "confdefs.h"
-
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-if { (eval echo configure:1000: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
- rm -rf conftest*
- ac_cv_c_inline=$ac_kw; break
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
-fi
-rm -f conftest*
-done
-
-fi
-
-echo "$ac_t""$ac_cv_c_inline" 1>&6
-case "$ac_cv_c_inline" in
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- *) cat >> confdefs.h <<EOF
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- ;;
-esac
-
-echo $ac_n "checking for off_t""... $ac_c" 1>&6
-echo "configure:1026: checking for off_t" >&5
-if eval "test \"`echo '$''{'ac_cv_type_off_t'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1031 "configure"
-#include "confdefs.h"
-#include <sys/types.h>
-#if STDC_HEADERS
-#include <stdlib.h>
-#include <stddef.h>
-#endif
-EOF
-if (eval "$ac_cpp conftest.$ac_ext") 2>&5 |
- egrep "(^|[^a-zA-Z_0-9])off_t[^a-zA-Z_0-9]" >/dev/null 2>&1; then
- rm -rf conftest*
- ac_cv_type_off_t=yes
-else
- rm -rf conftest*
- ac_cv_type_off_t=no
-fi
-rm -f conftest*
-
-fi
-echo "$ac_t""$ac_cv_type_off_t" 1>&6
-if test $ac_cv_type_off_t = no; then
- cat >> confdefs.h <<\EOF
-#define off_t long
-EOF
-
-fi
-
-echo $ac_n "checking for size_t""... $ac_c" 1>&6
-echo "configure:1059: checking for size_t" >&5
-if eval "test \"`echo '$''{'ac_cv_type_size_t'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1064 "configure"
-#include "confdefs.h"
-#include <sys/types.h>
-#if STDC_HEADERS
-#include <stdlib.h>
-#include <stddef.h>
-#endif
-EOF
-if (eval "$ac_cpp conftest.$ac_ext") 2>&5 |
- egrep "(^|[^a-zA-Z_0-9])size_t[^a-zA-Z_0-9]" >/dev/null 2>&1; then
- rm -rf conftest*
- ac_cv_type_size_t=yes
-else
- rm -rf conftest*
- ac_cv_type_size_t=no
-fi
-rm -f conftest*
-
-fi
-echo "$ac_t""$ac_cv_type_size_t" 1>&6
-if test $ac_cv_type_size_t = no; then
- cat >> confdefs.h <<\EOF
-#define size_t unsigned
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-
-fi
-
-# The Ultrix 4.2 mips builtin alloca declared by alloca.h only works
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-echo $ac_n "checking for working alloca.h""... $ac_c" 1>&6
-echo "configure:1094: checking for working alloca.h" >&5
-if eval "test \"`echo '$''{'ac_cv_header_alloca_h'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1099 "configure"
-#include "confdefs.h"
-#include <alloca.h>
-int main() {
-char *p = alloca(2 * sizeof(int));
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-EOF
-if { (eval echo configure:1106: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- rm -rf conftest*
- ac_cv_header_alloca_h=yes
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- ac_cv_header_alloca_h=no
-fi
-rm -f conftest*
-fi
-
-echo "$ac_t""$ac_cv_header_alloca_h" 1>&6
-if test $ac_cv_header_alloca_h = yes; then
- cat >> confdefs.h <<\EOF
-#define HAVE_ALLOCA_H 1
-EOF
-
-fi
-
-echo $ac_n "checking for alloca""... $ac_c" 1>&6
-echo "configure:1127: checking for alloca" >&5
-if eval "test \"`echo '$''{'ac_cv_func_alloca_works'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1132 "configure"
-#include "confdefs.h"
-
-#ifdef __GNUC__
-# define alloca __builtin_alloca
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-# ifdef _MSC_VER
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-# else
-# if HAVE_ALLOCA_H
-# include <alloca.h>
-# else
-# ifdef _AIX
- #pragma alloca
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-# ifndef alloca /* predefined by HP cc +Olibcalls */
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-# endif
-# endif
-# endif
-# endif
-#endif
-
-int main() {
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-if { (eval echo configure:1160: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- rm -rf conftest*
- ac_cv_func_alloca_works=yes
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- ac_cv_func_alloca_works=no
-fi
-rm -f conftest*
-fi
-
-echo "$ac_t""$ac_cv_func_alloca_works" 1>&6
-if test $ac_cv_func_alloca_works = yes; then
- cat >> confdefs.h <<\EOF
-#define HAVE_ALLOCA 1
-EOF
-
-fi
-
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- # The SVR3 libPW and SVR4 libucb both contain incompatible functions
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- # use ar to extract alloca.o from them instead of compiling alloca.c.
- ALLOCA=alloca.${ac_objext}
- cat >> confdefs.h <<\EOF
-#define C_ALLOCA 1
-EOF
-
-
-echo $ac_n "checking whether alloca needs Cray hooks""... $ac_c" 1>&6
-echo "configure:1192: checking whether alloca needs Cray hooks" >&5
-if eval "test \"`echo '$''{'ac_cv_os_cray'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1197 "configure"
-#include "confdefs.h"
-#if defined(CRAY) && ! defined(CRAY2)
-webecray
-#else
-wenotbecray
-#endif
-
-EOF
-if (eval "$ac_cpp conftest.$ac_ext") 2>&5 |
- egrep "webecray" >/dev/null 2>&1; then
- rm -rf conftest*
- ac_cv_os_cray=yes
-else
- rm -rf conftest*
- ac_cv_os_cray=no
-fi
-rm -f conftest*
-
-fi
-
-echo "$ac_t""$ac_cv_os_cray" 1>&6
-if test $ac_cv_os_cray = yes; then
-for ac_func in _getb67 GETB67 getb67; do
- echo $ac_n "checking for $ac_func""... $ac_c" 1>&6
-echo "configure:1222: checking for $ac_func" >&5
-if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1227 "configure"
-#include "confdefs.h"
-/* System header to define __stub macros and hopefully few prototypes,
- which can conflict with char $ac_func(); below. */
-#include <assert.h>
-/* Override any gcc2 internal prototype to avoid an error. */
-/* We use char because int might match the return type of a gcc2
- builtin and then its argument prototype would still apply. */
-char $ac_func();
-
-int main() {
-
-/* The GNU C library defines this for functions which it implements
- to always fail with ENOSYS. Some functions are actually named
- something starting with __ and the normal name is an alias. */
-#if defined (__stub_$ac_func) || defined (__stub___$ac_func)
-choke me
-#else
-$ac_func();
-#endif
-
-; return 0; }
-EOF
-if { (eval echo configure:1250: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=yes"
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=no"
-fi
-rm -f conftest*
-fi
-
-if eval "test \"`echo '$ac_cv_func_'$ac_func`\" = yes"; then
- echo "$ac_t""yes" 1>&6
- cat >> confdefs.h <<EOF
-#define CRAY_STACKSEG_END $ac_func
-EOF
-
- break
-else
- echo "$ac_t""no" 1>&6
-fi
-
-done
-fi
-
-echo $ac_n "checking stack direction for C alloca""... $ac_c" 1>&6
-echo "configure:1277: checking stack direction for C alloca" >&5
-if eval "test \"`echo '$''{'ac_cv_c_stack_direction'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- if test "$cross_compiling" = yes; then
- ac_cv_c_stack_direction=0
-else
- cat > conftest.$ac_ext <<EOF
-#line 1285 "configure"
-#include "confdefs.h"
-find_stack_direction ()
-{
- static char *addr = 0;
- auto char dummy;
- if (addr == 0)
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- addr = &dummy;
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- else
- return (&dummy > addr) ? 1 : -1;
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-{
- exit (find_stack_direction() < 0);
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-if { (eval echo configure:1304: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null
-then
- ac_cv_c_stack_direction=1
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -fr conftest*
- ac_cv_c_stack_direction=-1
-fi
-rm -fr conftest*
-fi
-
-fi
-
-echo "$ac_t""$ac_cv_c_stack_direction" 1>&6
-cat >> confdefs.h <<EOF
-#define STACK_DIRECTION $ac_cv_c_stack_direction
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-
-fi
-
-for ac_hdr in unistd.h
-do
-ac_safe=`echo "$ac_hdr" | sed 'y%./+-%__p_%'`
-echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6
-echo "configure:1329: checking for $ac_hdr" >&5
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- echo $ac_n "(cached) $ac_c" 1>&6
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- cat > conftest.$ac_ext <<EOF
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-ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:1339: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
-ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
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- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=no"
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- ac_tr_hdr=HAVE_`echo $ac_hdr | sed 'y%abcdefghijklmnopqrstuvwxyz./-%ABCDEFGHIJKLMNOPQRSTUVWXYZ___%'`
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-
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- echo "$ac_t""no" 1>&6
-fi
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-
-for ac_func in getpagesize
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-echo $ac_n "checking for $ac_func""... $ac_c" 1>&6
-echo "configure:1368: checking for $ac_func" >&5
-if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1373 "configure"
-#include "confdefs.h"
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- which can conflict with char $ac_func(); below. */
-#include <assert.h>
-/* Override any gcc2 internal prototype to avoid an error. */
-/* We use char because int might match the return type of a gcc2
- builtin and then its argument prototype would still apply. */
-char $ac_func();
-
-int main() {
-
-/* The GNU C library defines this for functions which it implements
- to always fail with ENOSYS. Some functions are actually named
- something starting with __ and the normal name is an alias. */
-#if defined (__stub_$ac_func) || defined (__stub___$ac_func)
-choke me
-#else
-$ac_func();
-#endif
-
-; return 0; }
-EOF
-if { (eval echo configure:1396: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=yes"
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=no"
-fi
-rm -f conftest*
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-
-if eval "test \"`echo '$ac_cv_func_'$ac_func`\" = yes"; then
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- ac_tr_func=HAVE_`echo $ac_func | tr 'abcdefghijklmnopqrstuvwxyz' 'ABCDEFGHIJKLMNOPQRSTUVWXYZ'`
- cat >> confdefs.h <<EOF
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-
-else
- echo "$ac_t""no" 1>&6
-fi
-done
-
-echo $ac_n "checking for working mmap""... $ac_c" 1>&6
-echo "configure:1421: checking for working mmap" >&5
-if eval "test \"`echo '$''{'ac_cv_func_mmap_fixed_mapped'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- if test "$cross_compiling" = yes; then
- ac_cv_func_mmap_fixed_mapped=no
-else
- cat > conftest.$ac_ext <<EOF
-#line 1429 "configure"
-#include "confdefs.h"
-
-/* Thanks to Mike Haertel and Jim Avera for this test.
- Here is a matrix of mmap possibilities:
- mmap private not fixed
- mmap private fixed at somewhere currently unmapped
- mmap private fixed at somewhere already mapped
- mmap shared not fixed
- mmap shared fixed at somewhere currently unmapped
- mmap shared fixed at somewhere already mapped
- For private mappings, we should verify that changes cannot be read()
- back from the file, nor mmap's back from the file at a different
- address. (There have been systems where private was not correctly
- implemented like the infamous i386 svr4.0, and systems where the
- VM page cache was not coherent with the filesystem buffer cache
- like early versions of FreeBSD and possibly contemporary NetBSD.)
- For shared mappings, we should conversely verify that changes get
- propogated back to all the places they're supposed to be.
-
- Grep wants private fixed already mapped.
- The main things grep needs to know about mmap are:
- * does it exist and is it safe to write into the mmap'd area
- * how to use it (BSD variants) */
-#include <sys/types.h>
-#include <fcntl.h>
-#include <sys/mman.h>
-
-/* This mess was copied from the GNU getpagesize.h. */
-#ifndef HAVE_GETPAGESIZE
-# ifdef HAVE_UNISTD_H
-# include <unistd.h>
-# endif
-
-/* Assume that all systems that can run configure have sys/param.h. */
-# ifndef HAVE_SYS_PARAM_H
-# define HAVE_SYS_PARAM_H 1
-# endif
-
-# ifdef _SC_PAGESIZE
-# define getpagesize() sysconf(_SC_PAGESIZE)
-# else /* no _SC_PAGESIZE */
-# ifdef HAVE_SYS_PARAM_H
-# include <sys/param.h>
-# ifdef EXEC_PAGESIZE
-# define getpagesize() EXEC_PAGESIZE
-# else /* no EXEC_PAGESIZE */
-# ifdef NBPG
-# define getpagesize() NBPG * CLSIZE
-# ifndef CLSIZE
-# define CLSIZE 1
-# endif /* no CLSIZE */
-# else /* no NBPG */
-# ifdef NBPC
-# define getpagesize() NBPC
-# else /* no NBPC */
-# ifdef PAGESIZE
-# define getpagesize() PAGESIZE
-# endif /* PAGESIZE */
-# endif /* no NBPC */
-# endif /* no NBPG */
-# endif /* no EXEC_PAGESIZE */
-# else /* no HAVE_SYS_PARAM_H */
-# define getpagesize() 8192 /* punt totally */
-# endif /* no HAVE_SYS_PARAM_H */
-# endif /* no _SC_PAGESIZE */
-
-#endif /* no HAVE_GETPAGESIZE */
-
-#ifdef __cplusplus
-extern "C" { void *malloc(unsigned); }
-#else
-char *malloc();
-#endif
-
-int
-main()
-{
- char *data, *data2, *data3;
- int i, pagesize;
- int fd;
-
- pagesize = getpagesize();
-
- /*
- * First, make a file with some known garbage in it.
- */
- data = malloc(pagesize);
- if (!data)
- exit(1);
- for (i = 0; i < pagesize; ++i)
- *(data + i) = rand();
- umask(0);
- fd = creat("conftestmmap", 0600);
- if (fd < 0)
- exit(1);
- if (write(fd, data, pagesize) != pagesize)
- exit(1);
- close(fd);
-
- /*
- * Next, try to mmap the file at a fixed address which
- * already has something else allocated at it. If we can,
- * also make sure that we see the same garbage.
- */
- fd = open("conftestmmap", O_RDWR);
- if (fd < 0)
- exit(1);
- data2 = malloc(2 * pagesize);
- if (!data2)
- exit(1);
- data2 += (pagesize - ((int) data2 & (pagesize - 1))) & (pagesize - 1);
- if (data2 != mmap(data2, pagesize, PROT_READ | PROT_WRITE,
- MAP_PRIVATE | MAP_FIXED, fd, 0L))
- exit(1);
- for (i = 0; i < pagesize; ++i)
- if (*(data + i) != *(data2 + i))
- exit(1);
-
- /*
- * Finally, make sure that changes to the mapped area
- * do not percolate back to the file as seen by read().
- * (This is a bug on some variants of i386 svr4.0.)
- */
- for (i = 0; i < pagesize; ++i)
- *(data2 + i) = *(data2 + i) + 1;
- data3 = malloc(pagesize);
- if (!data3)
- exit(1);
- if (read(fd, data3, pagesize) != pagesize)
- exit(1);
- for (i = 0; i < pagesize; ++i)
- if (*(data + i) != *(data3 + i))
- exit(1);
- close(fd);
- unlink("conftestmmap");
- exit(0);
-}
-
-EOF
-if { (eval echo configure:1569: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null
-then
- ac_cv_func_mmap_fixed_mapped=yes
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -fr conftest*
- ac_cv_func_mmap_fixed_mapped=no
-fi
-rm -fr conftest*
-fi
-
-fi
-
-echo "$ac_t""$ac_cv_func_mmap_fixed_mapped" 1>&6
-if test $ac_cv_func_mmap_fixed_mapped = yes; then
- cat >> confdefs.h <<\EOF
-#define HAVE_MMAP 1
-EOF
-
-fi
-
-echo $ac_n "checking for Cygwin environment""... $ac_c" 1>&6
-echo "configure:1592: checking for Cygwin environment" >&5
-if eval "test \"`echo '$''{'ac_cv_cygwin'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1597 "configure"
-#include "confdefs.h"
-
-int main() {
-
-#ifndef __CYGWIN__
-#define __CYGWIN__ __CYGWIN32__
-#endif
-return __CYGWIN__;
-; return 0; }
-EOF
-if { (eval echo configure:1608: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
- rm -rf conftest*
- ac_cv_cygwin=yes
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- ac_cv_cygwin=no
-fi
-rm -f conftest*
-rm -f conftest*
-fi
-
-echo "$ac_t""$ac_cv_cygwin" 1>&6
-CYGWIN=
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-echo $ac_n "checking for mingw32 environment""... $ac_c" 1>&6
-echo "configure:1625: checking for mingw32 environment" >&5
-if eval "test \"`echo '$''{'ac_cv_mingw32'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1630 "configure"
-#include "confdefs.h"
-
-int main() {
-return __MINGW32__;
-; return 0; }
-EOF
-if { (eval echo configure:1637: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
- rm -rf conftest*
- ac_cv_mingw32=yes
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- ac_cv_mingw32=no
-fi
-rm -f conftest*
-rm -f conftest*
-fi
-
-echo "$ac_t""$ac_cv_mingw32" 1>&6
-MINGW32=
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-
-# autoconf.info says this should be called right after AC_INIT.
-
-
-ac_aux_dir=
-for ac_dir in `cd $srcdir;pwd`/../.. $srcdir/`cd $srcdir;pwd`/../..; do
- if test -f $ac_dir/install-sh; then
- ac_aux_dir=$ac_dir
- ac_install_sh="$ac_aux_dir/install-sh -c"
- break
- elif test -f $ac_dir/install.sh; then
- ac_aux_dir=$ac_dir
- ac_install_sh="$ac_aux_dir/install.sh -c"
- break
- fi
-done
-if test -z "$ac_aux_dir"; then
- { echo "configure: error: can not find install-sh or install.sh in `cd $srcdir;pwd`/../.. $srcdir/`cd $srcdir;pwd`/../.." 1>&2; exit 1; }
-fi
-ac_config_guess=$ac_aux_dir/config.guess
-ac_config_sub=$ac_aux_dir/config.sub
-ac_configure=$ac_aux_dir/configure # This should be Cygnus configure.
-
-
-# Do some error checking and defaulting for the host and target type.
-# The inputs are:
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-#
-# The rules are:
-# 1. You are not allowed to specify --host, --target, and nonopt at the
-# same time.
-# 2. Host defaults to nonopt.
-# 3. If nonopt is not specified, then host defaults to the current host,
-# as determined by config.guess.
-# 4. Target and build default to nonopt.
-# 5. If nonopt is not specified, then target and build default to host.
-
-# The aliases save the names the user supplied, while $host etc.
-# will get canonicalized.
-case $host---$target---$nonopt in
-NONE---*---* | *---NONE---* | *---*---NONE) ;;
-*) { echo "configure: error: can only configure for one host and one target at a time" 1>&2; exit 1; } ;;
-esac
-
-
-# Make sure we can run config.sub.
-if ${CONFIG_SHELL-/bin/sh} $ac_config_sub sun4 >/dev/null 2>&1; then :
-else { echo "configure: error: can not run $ac_config_sub" 1>&2; exit 1; }
-fi
-
-echo $ac_n "checking host system type""... $ac_c" 1>&6
-echo "configure:1704: checking host system type" >&5
-
-host_alias=$host
-case "$host_alias" in
-NONE)
- case $nonopt in
- NONE)
- if host_alias=`${CONFIG_SHELL-/bin/sh} $ac_config_guess`; then :
- else { echo "configure: error: can not guess host type; you must specify one" 1>&2; exit 1; }
- fi ;;
- *) host_alias=$nonopt ;;
- esac ;;
-esac
-
-host=`${CONFIG_SHELL-/bin/sh} $ac_config_sub $host_alias`
-host_cpu=`echo $host | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\1/'`
-host_vendor=`echo $host | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\2/'`
-host_os=`echo $host | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\3/'`
-echo "$ac_t""$host" 1>&6
-
-echo $ac_n "checking target system type""... $ac_c" 1>&6
-echo "configure:1725: checking target system type" >&5
-
-target_alias=$target
-case "$target_alias" in
-NONE)
- case $nonopt in
- NONE) target_alias=$host_alias ;;
- *) target_alias=$nonopt ;;
- esac ;;
-esac
-
-target=`${CONFIG_SHELL-/bin/sh} $ac_config_sub $target_alias`
-target_cpu=`echo $target | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\1/'`
-target_vendor=`echo $target | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\2/'`
-target_os=`echo $target | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\3/'`
-echo "$ac_t""$target" 1>&6
-
-echo $ac_n "checking build system type""... $ac_c" 1>&6
-echo "configure:1743: checking build system type" >&5
-
-build_alias=$build
-case "$build_alias" in
-NONE)
- case $nonopt in
- NONE) build_alias=$host_alias ;;
- *) build_alias=$nonopt ;;
- esac ;;
-esac
-
-build=`${CONFIG_SHELL-/bin/sh} $ac_config_sub $build_alias`
-build_cpu=`echo $build | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\1/'`
-build_vendor=`echo $build | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\2/'`
-build_os=`echo $build | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\3/'`
-echo "$ac_t""$build" 1>&6
-
-test "$host_alias" != "$target_alias" &&
- test "$program_prefix$program_suffix$program_transform_name" = \
- NONENONEs,x,x, &&
- program_prefix=${target_alias}-
-
-if test "$program_transform_name" = s,x,x,; then
- program_transform_name=
-else
- # Double any \ or $. echo might interpret backslashes.
- cat <<\EOF_SED > conftestsed
-s,\\,\\\\,g; s,\$,$$,g
-EOF_SED
- program_transform_name="`echo $program_transform_name|sed -f conftestsed`"
- rm -f conftestsed
-fi
-test "$program_prefix" != NONE &&
- program_transform_name="s,^,${program_prefix},; $program_transform_name"
-# Use a double $ so make ignores it.
-test "$program_suffix" != NONE &&
- program_transform_name="s,\$\$,${program_suffix},; $program_transform_name"
-
-# sed with no file args requires a program.
-test "$program_transform_name" = "" && program_transform_name="s,x,x,"
-
-# Extract the first word of "gcc", so it can be a program name with args.
-set dummy gcc; ac_word=$2
-echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:1787: checking for $ac_word" >&5
-if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- if test -n "$CC"; then
- ac_cv_prog_CC="$CC" # Let the user override the test.
-else
- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
- ac_dummy="$PATH"
- for ac_dir in $ac_dummy; do
- test -z "$ac_dir" && ac_dir=.
- if test -f $ac_dir/$ac_word; then
- ac_cv_prog_CC="gcc"
- break
- fi
- done
- IFS="$ac_save_ifs"
-fi
-fi
-CC="$ac_cv_prog_CC"
-if test -n "$CC"; then
- echo "$ac_t""$CC" 1>&6
-else
- echo "$ac_t""no" 1>&6
-fi
-
-if test -z "$CC"; then
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-set dummy cc; ac_word=$2
-echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:1817: checking for $ac_word" >&5
-if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- if test -n "$CC"; then
- ac_cv_prog_CC="$CC" # Let the user override the test.
-else
- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
- ac_prog_rejected=no
- ac_dummy="$PATH"
- for ac_dir in $ac_dummy; do
- test -z "$ac_dir" && ac_dir=.
- if test -f $ac_dir/$ac_word; then
- if test "$ac_dir/$ac_word" = "/usr/ucb/cc"; then
- ac_prog_rejected=yes
- continue
- fi
- ac_cv_prog_CC="cc"
- break
- fi
- done
- IFS="$ac_save_ifs"
-if test $ac_prog_rejected = yes; then
- # We found a bogon in the path, so make sure we never use it.
- set dummy $ac_cv_prog_CC
- shift
- if test $# -gt 0; then
- # We chose a different compiler from the bogus one.
- # However, it has the same basename, so the bogon will be chosen
- # first if we set CC to just the basename; use the full file name.
- shift
- set dummy "$ac_dir/$ac_word" "$@"
- shift
- ac_cv_prog_CC="$@"
- fi
-fi
-fi
-fi
-CC="$ac_cv_prog_CC"
-if test -n "$CC"; then
- echo "$ac_t""$CC" 1>&6
-else
- echo "$ac_t""no" 1>&6
-fi
-
- if test -z "$CC"; then
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- *win32* | *WIN32*)
- # Extract the first word of "cl", so it can be a program name with args.
-set dummy cl; ac_word=$2
-echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:1868: checking for $ac_word" >&5
-if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- if test -n "$CC"; then
- ac_cv_prog_CC="$CC" # Let the user override the test.
-else
- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
- ac_dummy="$PATH"
- for ac_dir in $ac_dummy; do
- test -z "$ac_dir" && ac_dir=.
- if test -f $ac_dir/$ac_word; then
- ac_cv_prog_CC="cl"
- break
- fi
- done
- IFS="$ac_save_ifs"
-fi
-fi
-CC="$ac_cv_prog_CC"
-if test -n "$CC"; then
- echo "$ac_t""$CC" 1>&6
-else
- echo "$ac_t""no" 1>&6
-fi
- ;;
- esac
- fi
- test -z "$CC" && { echo "configure: error: no acceptable cc found in \$PATH" 1>&2; exit 1; }
-fi
-
-echo $ac_n "checking whether the C compiler ($CC $CFLAGS $LDFLAGS) works""... $ac_c" 1>&6
-echo "configure:1900: checking whether the C compiler ($CC $CFLAGS $LDFLAGS) works" >&5
-
-ac_ext=c
-# CFLAGS is not in ac_cpp because -g, -O, etc. are not valid cpp options.
-ac_cpp='$CPP $CPPFLAGS'
-ac_compile='${CC-cc} -c $CFLAGS $CPPFLAGS conftest.$ac_ext 1>&5'
-ac_link='${CC-cc} -o conftest${ac_exeext} $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS 1>&5'
-cross_compiling=$ac_cv_prog_cc_cross
-
-cat > conftest.$ac_ext << EOF
-
-#line 1911 "configure"
-#include "confdefs.h"
-
-main(){return(0);}
-EOF
-if { (eval echo configure:1916: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- ac_cv_prog_cc_works=yes
- # If we can't run a trivial program, we are probably using a cross compiler.
- if (./conftest; exit) 2>/dev/null; then
- ac_cv_prog_cc_cross=no
- else
- ac_cv_prog_cc_cross=yes
- fi
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- ac_cv_prog_cc_works=no
-fi
-rm -fr conftest*
-ac_ext=c
-# CFLAGS is not in ac_cpp because -g, -O, etc. are not valid cpp options.
-ac_cpp='$CPP $CPPFLAGS'
-ac_compile='${CC-cc} -c $CFLAGS $CPPFLAGS conftest.$ac_ext 1>&5'
-ac_link='${CC-cc} -o conftest${ac_exeext} $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS 1>&5'
-cross_compiling=$ac_cv_prog_cc_cross
-
-echo "$ac_t""$ac_cv_prog_cc_works" 1>&6
-if test $ac_cv_prog_cc_works = no; then
- { echo "configure: error: installation or configuration problem: C compiler cannot create executables." 1>&2; exit 1; }
-fi
-echo $ac_n "checking whether the C compiler ($CC $CFLAGS $LDFLAGS) is a cross-compiler""... $ac_c" 1>&6
-echo "configure:1942: checking whether the C compiler ($CC $CFLAGS $LDFLAGS) is a cross-compiler" >&5
-echo "$ac_t""$ac_cv_prog_cc_cross" 1>&6
-cross_compiling=$ac_cv_prog_cc_cross
-
-echo $ac_n "checking whether we are using GNU C""... $ac_c" 1>&6
-echo "configure:1947: checking whether we are using GNU C" >&5
-if eval "test \"`echo '$''{'ac_cv_prog_gcc'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.c <<EOF
-#ifdef __GNUC__
- yes;
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- ;;
- ?:/*)
- ac_cv_path_GMSGFMT="$GMSGFMT" # Let the user override the test with a dos path.
- ;;
- *)
- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
- ac_dummy="$PATH"
- for ac_dir in $ac_dummy; do
- test -z "$ac_dir" && ac_dir=.
- if test -f $ac_dir/$ac_word; then
- ac_cv_path_GMSGFMT="$ac_dir/$ac_word"
- break
- fi
- done
- IFS="$ac_save_ifs"
- test -z "$ac_cv_path_GMSGFMT" && ac_cv_path_GMSGFMT="$MSGFMT"
- ;;
-esac
-fi
-GMSGFMT="$ac_cv_path_GMSGFMT"
-if test -n "$GMSGFMT"; then
- echo "$ac_t""$GMSGFMT" 1>&6
-else
- echo "$ac_t""no" 1>&6
-fi
-
- # Extract the first word of "xgettext", so it can be a program name with args.
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-echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:2607: checking for $ac_word" >&5
-if eval "test \"`echo '$''{'ac_cv_path_XGETTEXT'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- case "$XGETTEXT" in
- /*)
- ac_cv_path_XGETTEXT="$XGETTEXT" # Let the user override the test with a path.
- ;;
- *)
- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS="${IFS}:"
- for ac_dir in $PATH; do
- test -z "$ac_dir" && ac_dir=.
- if test -f $ac_dir/$ac_word; then
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- ac_cv_path_XGETTEXT="$ac_dir/$ac_word"
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- fi
- fi
- done
- IFS="$ac_save_ifs"
- test -z "$ac_cv_path_XGETTEXT" && ac_cv_path_XGETTEXT=":"
- ;;
-esac
-fi
-XGETTEXT="$ac_cv_path_XGETTEXT"
-if test -n "$XGETTEXT"; then
- echo "$ac_t""$XGETTEXT" 1>&6
-else
- echo "$ac_t""no" 1>&6
-fi
-
- cat > conftest.$ac_ext <<EOF
-#line 2639 "configure"
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-
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-if { (eval echo configure:2647: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
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- CATOBJEXT=.gmo
- DATADIRNAME=share
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- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- CATOBJEXT=.mo
- DATADIRNAME=lib
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-rm -f conftest*
- INSTOBJEXT=.mo
- fi
- fi
-
-else
- echo "$ac_t""no" 1>&6
-fi
-
-
-
- if test "$CATOBJEXT" = "NONE"; then
- nls_cv_use_gnu_gettext=yes
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- fi
-
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- # Extract the first word of "msgfmt", so it can be a program name with args.
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-echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:2679: checking for $ac_word" >&5
-if eval "test \"`echo '$''{'ac_cv_path_MSGFMT'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- case "$MSGFMT" in
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- ac_cv_path_MSGFMT="$MSGFMT" # Let the user override the test with a path.
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- *)
- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS="${IFS}:"
- for ac_dir in $PATH; do
- test -z "$ac_dir" && ac_dir=.
- if test -f $ac_dir/$ac_word; then
- if test -z "`$ac_dir/$ac_word -h 2>&1 | grep 'dv '`"; then
- ac_cv_path_MSGFMT="$ac_dir/$ac_word"
- break
- fi
- fi
- done
- IFS="$ac_save_ifs"
- test -z "$ac_cv_path_MSGFMT" && ac_cv_path_MSGFMT="msgfmt"
- ;;
-esac
-fi
-MSGFMT="$ac_cv_path_MSGFMT"
-if test -n "$MSGFMT"; then
- echo "$ac_t""$MSGFMT" 1>&6
-else
- echo "$ac_t""no" 1>&6
-fi
-
- # Extract the first word of "gmsgfmt", so it can be a program name with args.
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-echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:2713: checking for $ac_word" >&5
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- ac_cv_path_GMSGFMT="$GMSGFMT" # Let the user override the test with a path.
- ;;
- ?:/*)
- ac_cv_path_GMSGFMT="$GMSGFMT" # Let the user override the test with a dos path.
- ;;
- *)
- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
- ac_dummy="$PATH"
- for ac_dir in $ac_dummy; do
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- if test -f $ac_dir/$ac_word; then
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- break
- fi
- done
- IFS="$ac_save_ifs"
- test -z "$ac_cv_path_GMSGFMT" && ac_cv_path_GMSGFMT="$MSGFMT"
- ;;
-esac
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-GMSGFMT="$ac_cv_path_GMSGFMT"
-if test -n "$GMSGFMT"; then
- echo "$ac_t""$GMSGFMT" 1>&6
-else
- echo "$ac_t""no" 1>&6
-fi
-
- # Extract the first word of "xgettext", so it can be a program name with args.
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-echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:2749: checking for $ac_word" >&5
-if eval "test \"`echo '$''{'ac_cv_path_XGETTEXT'+set}'`\" = set"; then
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-else
- case "$XGETTEXT" in
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- ac_cv_path_XGETTEXT="$XGETTEXT" # Let the user override the test with a path.
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- *)
- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS="${IFS}:"
- for ac_dir in $PATH; do
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- if test -f $ac_dir/$ac_word; then
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- break
- fi
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- done
- IFS="$ac_save_ifs"
- test -z "$ac_cv_path_XGETTEXT" && ac_cv_path_XGETTEXT=":"
- ;;
-esac
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-XGETTEXT="$ac_cv_path_XGETTEXT"
-if test -n "$XGETTEXT"; then
- echo "$ac_t""$XGETTEXT" 1>&6
-else
- echo "$ac_t""no" 1>&6
-fi
-
-
- USE_INCLUDED_LIBINTL=yes
- CATOBJEXT=.gmo
- INSTOBJEXT=.mo
- DATADIRNAME=share
- INTLDEPS='$(top_builddir)/../intl/libintl.a'
- INTLLIBS=$INTLDEPS
- LIBS=`echo $LIBS | sed -e 's/-lintl//'`
- nls_cv_header_intl=libintl.h
- nls_cv_header_libgt=libgettext.h
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- XGETTEXT=":"
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-
- # We need to process the po/ directory.
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- nls_cv_header_intl=libintl.h
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-
- # If this is used in GNU gettext we have to set USE_NLS to `yes'
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-
- for lang in $ALL_LINGUAS; do
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- POFILES="$POFILES $lang.po"
- done
-
-
-
-
-
-
-
-
-
-
-
-
-
-
- if test "x$CATOBJEXT" != "x"; then
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- LINGUAS=
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- echo $ac_n "checking for catalogs to be installed""... $ac_c" 1>&6
-echo "configure:2839: checking for catalogs to be installed" >&5
- NEW_LINGUAS=
- for lang in ${LINGUAS=$ALL_LINGUAS}; do
- case "$ALL_LINGUAS" in
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- esac
- done
- LINGUAS=$NEW_LINGUAS
- echo "$ac_t""$LINGUAS" 1>&6
- fi
-
- if test -n "$LINGUAS"; then
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- fi
- fi
-
- if test $ac_cv_header_locale_h = yes; then
- INCLUDE_LOCALE_H="#include <locale.h>"
- else
- INCLUDE_LOCALE_H="\
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- fi
-
-
- if test -f $srcdir/po2tbl.sed.in; then
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- ac_safe=`echo "linux/version.h" | sed 'y%./+-%__p_%'`
-echo $ac_n "checking for linux/version.h""... $ac_c" 1>&6
-echo "configure:2867: checking for linux/version.h" >&5
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- cat > conftest.$ac_ext <<EOF
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-ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:2877: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
-ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
-if test -z "$ac_err"; then
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=yes"
-else
- echo "$ac_err" >&5
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=no"
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-rm -f conftest*
-fi
-if eval "test \"`echo '$ac_cv_header_'$ac_safe`\" = yes"; then
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- msgformat=linux
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- echo "$ac_t""no" 1>&6
-msgformat=xopen
-fi
-
-
- sed -e '/^#/d' $srcdir/$msgformat-msg.sed > po2msg.sed
- fi
- sed -e '/^#.*[^\\]$/d' -e '/^#$/d' \
- $srcdir/po2tbl.sed.in > po2tbl.sed
- fi
-
- if test "$PACKAGE" = "gettext"; then
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- GT_YES=
- else
- GT_NO=
- GT_YES="#YES#"
- fi
-
-
-
- MKINSTALLDIRS="\$(srcdir)/../../mkinstalldirs"
-
-
- l=
-
-
- if test -d $srcdir/po; then
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- if test "x$srcdir" != "x."; then
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- else
- posrcprefix="../$srcdir/"
- fi
- else
- posrcprefix="../"
- fi
- rm -f po/POTFILES
- sed -e "/^#/d" -e "/^\$/d" -e "s,.*, $posrcprefix& \\\\," -e "\$s/\(.*\) \\\\/\1/" \
- < $srcdir/po/POTFILES.in > po/POTFILES
- fi
-
-
-# Check for common headers.
-# FIXME: Seems to me this can cause problems for i386-windows hosts.
-# At one point there were hardcoded AC_DEFINE's if ${host} = i386-*-windows*.
-for ac_hdr in stdlib.h string.h strings.h unistd.h time.h
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-ac_safe=`echo "$ac_hdr" | sed 'y%./+-%__p_%'`
-echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6
-echo "configure:2946: checking for $ac_hdr" >&5
-if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 2951 "configure"
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-ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:2956: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
-ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
-if test -z "$ac_err"; then
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=yes"
-else
- echo "$ac_err" >&5
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=no"
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-rm -f conftest*
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-if eval "test \"`echo '$ac_cv_header_'$ac_safe`\" = yes"; then
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- ac_tr_hdr=HAVE_`echo $ac_hdr | sed 'y%abcdefghijklmnopqrstuvwxyz./-%ABCDEFGHIJKLMNOPQRSTUVWXYZ___%'`
- cat >> confdefs.h <<EOF
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-
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- echo "$ac_t""no" 1>&6
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-
-for ac_hdr in sys/time.h sys/resource.h
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-echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6
-echo "configure:2986: checking for $ac_hdr" >&5
-if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then
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-else
- cat > conftest.$ac_ext <<EOF
-#line 2991 "configure"
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-ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:2996: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
-ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
-if test -z "$ac_err"; then
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=yes"
-else
- echo "$ac_err" >&5
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=no"
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-rm -f conftest*
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-if eval "test \"`echo '$ac_cv_header_'$ac_safe`\" = yes"; then
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- ac_tr_hdr=HAVE_`echo $ac_hdr | sed 'y%abcdefghijklmnopqrstuvwxyz./-%ABCDEFGHIJKLMNOPQRSTUVWXYZ___%'`
- cat >> confdefs.h <<EOF
-#define $ac_tr_hdr 1
-EOF
-
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- echo "$ac_t""no" 1>&6
-fi
-done
-
-for ac_hdr in fcntl.h fpu_control.h
-do
-ac_safe=`echo "$ac_hdr" | sed 'y%./+-%__p_%'`
-echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6
-echo "configure:3026: checking for $ac_hdr" >&5
-if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 3031 "configure"
-#include "confdefs.h"
-#include <$ac_hdr>
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-ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:3036: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
-ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
-if test -z "$ac_err"; then
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- eval "ac_cv_header_$ac_safe=yes"
-else
- echo "$ac_err" >&5
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=no"
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-rm -f conftest*
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-if eval "test \"`echo '$ac_cv_header_'$ac_safe`\" = yes"; then
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- ac_tr_hdr=HAVE_`echo $ac_hdr | sed 'y%abcdefghijklmnopqrstuvwxyz./-%ABCDEFGHIJKLMNOPQRSTUVWXYZ___%'`
- cat >> confdefs.h <<EOF
-#define $ac_tr_hdr 1
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-
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-fi
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-
-for ac_hdr in dlfcn.h errno.h sys/stat.h
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-echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6
-echo "configure:3066: checking for $ac_hdr" >&5
-if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 3071 "configure"
-#include "confdefs.h"
-#include <$ac_hdr>
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-ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:3076: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
-ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
-if test -z "$ac_err"; then
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=yes"
-else
- echo "$ac_err" >&5
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=no"
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-rm -f conftest*
-fi
-if eval "test \"`echo '$ac_cv_header_'$ac_safe`\" = yes"; then
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- ac_tr_hdr=HAVE_`echo $ac_hdr | sed 'y%abcdefghijklmnopqrstuvwxyz./-%ABCDEFGHIJKLMNOPQRSTUVWXYZ___%'`
- cat >> confdefs.h <<EOF
-#define $ac_tr_hdr 1
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-
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-
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-echo "configure:3105: checking for $ac_func" >&5
-if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 3110 "configure"
-#include "confdefs.h"
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-/* We use char because int might match the return type of a gcc2
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-char $ac_func();
-
-int main() {
-
-/* The GNU C library defines this for functions which it implements
- to always fail with ENOSYS. Some functions are actually named
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-#if defined (__stub_$ac_func) || defined (__stub___$ac_func)
-choke me
-#else
-$ac_func();
-#endif
-
-; return 0; }
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-if { (eval echo configure:3133: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=yes"
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=no"
-fi
-rm -f conftest*
-fi
-
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- ac_tr_func=HAVE_`echo $ac_func | tr 'abcdefghijklmnopqrstuvwxyz' 'ABCDEFGHIJKLMNOPQRSTUVWXYZ'`
- cat >> confdefs.h <<EOF
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-
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- echo "$ac_t""no" 1>&6
-fi
-done
-
-
-# Check for socket libraries
-echo $ac_n "checking for bind in -lsocket""... $ac_c" 1>&6
-echo "configure:3160: checking for bind in -lsocket" >&5
-ac_lib_var=`echo socket'_'bind | sed 'y%./+-%__p_%'`
-if eval "test \"`echo '$''{'ac_cv_lib_$ac_lib_var'+set}'`\" = set"; then
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-else
- ac_save_LIBS="$LIBS"
-LIBS="-lsocket $LIBS"
-cat > conftest.$ac_ext <<EOF
-#line 3168 "configure"
-#include "confdefs.h"
-/* Override any gcc2 internal prototype to avoid an error. */
-/* We use char because int might match the return type of a gcc2
- builtin and then its argument prototype would still apply. */
-char bind();
-
-int main() {
-bind()
-; return 0; }
-EOF
-if { (eval echo configure:3179: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- rm -rf conftest*
- eval "ac_cv_lib_$ac_lib_var=yes"
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_lib_$ac_lib_var=no"
-fi
-rm -f conftest*
-LIBS="$ac_save_LIBS"
-
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-if eval "test \"`echo '$ac_cv_lib_'$ac_lib_var`\" = yes"; then
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- ac_tr_lib=HAVE_LIB`echo socket | sed -e 's/[^a-zA-Z0-9_]/_/g' \
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- cat >> confdefs.h <<EOF
-#define $ac_tr_lib 1
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-
- LIBS="-lsocket $LIBS"
-
-else
- echo "$ac_t""no" 1>&6
-fi
-
-echo $ac_n "checking for gethostbyname in -lnsl""... $ac_c" 1>&6
-echo "configure:3207: checking for gethostbyname in -lnsl" >&5
-ac_lib_var=`echo nsl'_'gethostbyname | sed 'y%./+-%__p_%'`
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-if { (eval echo configure:3226: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
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-
-
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-
-
-
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-
-
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- fi
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- sim_trace="$sim_trace)'" ;;
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- sim_trace=""
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-
-
-
-# Check whether --enable-sim-profile or --disable-sim-profile was given.
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- [-0-9]*)
- sim_profile="-DPROFILE='(${enableval})' -DWITH_PROFILE='(${enableval})'";;
- [a-z]*)
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- sim_profile="-DWITH_PROFILE='(PROFILE_$x"
- else
- sim_profile="${sim_profile}|PROFILE_$x"
- fi
- done
- sim_profile="$sim_profile)'" ;;
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-
-
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- cat > conftest.$ac_ext <<EOF
-#line 3407 "configure"
-#include "confdefs.h"
-#include <sys/types.h>
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-void (*signal ()) ();
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-
-int main() {
-int i;
-; return 0; }
-EOF
-if { (eval echo configure:3424: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
- rm -rf conftest*
- ac_cv_type_signal=void
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- ac_cv_type_signal=int
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-rm -f conftest*
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-
-echo "$ac_t""$ac_cv_type_signal" 1>&6
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-
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-
-
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-
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- sim_link_files=tconfig.in
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-# targ-vals.def points to the libc macro description file.
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-
-
-
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- cat > conftest.$ac_ext <<EOF
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-#line 3545 "configure"
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-#endif
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-if (eval "$ac_cpp conftest.$ac_ext") 2>&5 |
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- sim_cv_os_cygwin=yes
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- rm -rf conftest*
- sim_cv_os_cygwin=no
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-
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-
-echo "$ac_t""$sim_cv_os_cygwin" 1>&6
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- echo $ac_n "checking for main in -ltermcap""... $ac_c" 1>&6
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- eval "ac_cv_lib_$ac_lib_var=yes"
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- TERMCAP=-ltermcap
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-
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-
-
-
-
-trap '' 1 2 15
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-cat >> $CONFIG_STATUS <<EOF
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-s%@POFILES@%$POFILES%g
-s%@POSUB@%$POSUB%g
-s%@INCLUDE_LOCALE_H@%$INCLUDE_LOCALE_H%g
-s%@GT_NO@%$GT_NO%g
-s%@GT_YES@%$GT_YES%g
-s%@MKINSTALLDIRS@%$MKINSTALLDIRS%g
-s%@l@%$l%g
-s%@MAINT@%$MAINT%g
-s%@sim_bswap@%$sim_bswap%g
-s%@sim_cflags@%$sim_cflags%g
-s%@sim_debug@%$sim_debug%g
-s%@sim_stdio@%$sim_stdio%g
-s%@sim_trace@%$sim_trace%g
-s%@sim_profile@%$sim_profile%g
-s%@EXEEXT@%$EXEEXT%g
-s%@TERMCAP@%$TERMCAP%g
-
-CEOF
-EOF
-
-cat >> $CONFIG_STATUS <<\EOF
-
-# Split the substitutions into bite-sized pieces for seds with
-# small command number limits, like on Digital OSF/1 and HP-UX.
-ac_max_sed_cmds=90 # Maximum number of lines to put in a sed script.
-ac_file=1 # Number of current file.
-ac_beg=1 # First line for current file.
-ac_end=$ac_max_sed_cmds # Line after last line for current file.
-ac_more_lines=:
-ac_sed_cmds=""
-while $ac_more_lines; do
- if test $ac_beg -gt 1; then
- sed "1,${ac_beg}d; ${ac_end}q" conftest.subs > conftest.s$ac_file
- else
- sed "${ac_end}q" conftest.subs > conftest.s$ac_file
- fi
- if test ! -s conftest.s$ac_file; then
- ac_more_lines=false
- rm -f conftest.s$ac_file
- else
- if test -z "$ac_sed_cmds"; then
- ac_sed_cmds="sed -f conftest.s$ac_file"
- else
- ac_sed_cmds="$ac_sed_cmds | sed -f conftest.s$ac_file"
- fi
- ac_file=`expr $ac_file + 1`
- ac_beg=$ac_end
- ac_end=`expr $ac_end + $ac_max_sed_cmds`
- fi
-done
-if test -z "$ac_sed_cmds"; then
- ac_sed_cmds=cat
-fi
-EOF
-
-cat >> $CONFIG_STATUS <<EOF
-
-CONFIG_FILES=\${CONFIG_FILES-"Makefile.sim:Makefile.in Make-common.sim:../common/Make-common.in .gdbinit:../common/gdbinit.in"}
-EOF
-cat >> $CONFIG_STATUS <<\EOF
-for ac_file in .. $CONFIG_FILES; do if test "x$ac_file" != x..; then
- # Support "outfile[:infile[:infile...]]", defaulting infile="outfile.in".
- case "$ac_file" in
- *:*) ac_file_in=`echo "$ac_file"|sed 's%[^:]*:%%'`
- ac_file=`echo "$ac_file"|sed 's%:.*%%'` ;;
- *) ac_file_in="${ac_file}.in" ;;
- esac
-
- # Adjust a relative srcdir, top_srcdir, and INSTALL for subdirectories.
-
- # Remove last slash and all that follows it. Not all systems have dirname.
- ac_dir=`echo $ac_file|sed 's%/[^/][^/]*$%%'`
- if test "$ac_dir" != "$ac_file" && test "$ac_dir" != .; then
- # The file is in a subdirectory.
- test ! -d "$ac_dir" && mkdir "$ac_dir"
- ac_dir_suffix="/`echo $ac_dir|sed 's%^\./%%'`"
- # A "../" for each directory in $ac_dir_suffix.
- ac_dots=`echo $ac_dir_suffix|sed 's%/[^/]*%../%g'`
- else
- ac_dir_suffix= ac_dots=
- fi
-
- case "$ac_given_srcdir" in
- .) srcdir=.
- if test -z "$ac_dots"; then top_srcdir=.
- else top_srcdir=`echo $ac_dots|sed 's%/$%%'`; fi ;;
- /*) srcdir="$ac_given_srcdir$ac_dir_suffix"; top_srcdir="$ac_given_srcdir" ;;
- *) # Relative path.
- srcdir="$ac_dots$ac_given_srcdir$ac_dir_suffix"
- top_srcdir="$ac_dots$ac_given_srcdir" ;;
- esac
-
- case "$ac_given_INSTALL" in
- [/$]*) INSTALL="$ac_given_INSTALL" ;;
- *) INSTALL="$ac_dots$ac_given_INSTALL" ;;
- esac
-
- echo creating "$ac_file"
- rm -f "$ac_file"
- configure_input="Generated automatically from `echo $ac_file_in|sed 's%.*/%%'` by configure."
- case "$ac_file" in
- *Makefile*) ac_comsub="1i\\
-# $configure_input" ;;
- *) ac_comsub= ;;
- esac
-
- ac_file_inputs=`echo $ac_file_in|sed -e "s%^%$ac_given_srcdir/%" -e "s%:% $ac_given_srcdir/%g"`
- sed -e "$ac_comsub
-s%@configure_input@%$configure_input%g
-s%@srcdir@%$srcdir%g
-s%@top_srcdir@%$top_srcdir%g
-s%@INSTALL@%$INSTALL%g
-" $ac_file_inputs | (eval "$ac_sed_cmds") > $ac_file
-fi; done
-rm -f conftest.s*
-
-# These sed commands are passed to sed as "A NAME B NAME C VALUE D", where
-# NAME is the cpp macro being defined and VALUE is the value it is being given.
-#
-# ac_d sets the value in "#define NAME VALUE" lines.
-ac_dA='s%^\([ ]*\)#\([ ]*define[ ][ ]*\)'
-ac_dB='\([ ][ ]*\)[^ ]*%\1#\2'
-ac_dC='\3'
-ac_dD='%g'
-# ac_u turns "#undef NAME" with trailing blanks into "#define NAME VALUE".
-ac_uA='s%^\([ ]*\)#\([ ]*\)undef\([ ][ ]*\)'
-ac_uB='\([ ]\)%\1#\2define\3'
-ac_uC=' '
-ac_uD='\4%g'
-# ac_e turns "#undef NAME" without trailing blanks into "#define NAME VALUE".
-ac_eA='s%^\([ ]*\)#\([ ]*\)undef\([ ][ ]*\)'
-ac_eB='$%\1#\2define\3'
-ac_eC=' '
-ac_eD='%g'
-
-if test "${CONFIG_HEADERS+set}" != set; then
-EOF
-cat >> $CONFIG_STATUS <<EOF
- CONFIG_HEADERS="config.h:config.in"
-EOF
-cat >> $CONFIG_STATUS <<\EOF
-fi
-for ac_file in .. $CONFIG_HEADERS; do if test "x$ac_file" != x..; then
- # Support "outfile[:infile[:infile...]]", defaulting infile="outfile.in".
- case "$ac_file" in
- *:*) ac_file_in=`echo "$ac_file"|sed 's%[^:]*:%%'`
- ac_file=`echo "$ac_file"|sed 's%:.*%%'` ;;
- *) ac_file_in="${ac_file}.in" ;;
- esac
-
- echo creating $ac_file
-
- rm -f conftest.frag conftest.in conftest.out
- ac_file_inputs=`echo $ac_file_in|sed -e "s%^%$ac_given_srcdir/%" -e "s%:% $ac_given_srcdir/%g"`
- cat $ac_file_inputs > conftest.in
-
-EOF
-
-# Transform confdefs.h into a sed script conftest.vals that substitutes
-# the proper values into config.h.in to produce config.h. And first:
-# Protect against being on the right side of a sed subst in config.status.
-# Protect against being in an unquoted here document in config.status.
-rm -f conftest.vals
-cat > conftest.hdr <<\EOF
-s/[\\&%]/\\&/g
-s%[\\$`]%\\&%g
-s%#define \([A-Za-z_][A-Za-z0-9_]*\) *\(.*\)%${ac_dA}\1${ac_dB}\1${ac_dC}\2${ac_dD}%gp
-s%ac_d%ac_u%gp
-s%ac_u%ac_e%gp
-EOF
-sed -n -f conftest.hdr confdefs.h > conftest.vals
-rm -f conftest.hdr
-
-# This sed command replaces #undef with comments. This is necessary, for
-# example, in the case of _POSIX_SOURCE, which is predefined and required
-# on some systems where configure will not decide to define it.
-cat >> conftest.vals <<\EOF
-s%^[ ]*#[ ]*undef[ ][ ]*[a-zA-Z_][a-zA-Z_0-9]*%/* & */%
-EOF
-
-# Break up conftest.vals because some shells have a limit on
-# the size of here documents, and old seds have small limits too.
-
-rm -f conftest.tail
-while :
-do
- ac_lines=`grep -c . conftest.vals`
- # grep -c gives empty output for an empty file on some AIX systems.
- if test -z "$ac_lines" || test "$ac_lines" -eq 0; then break; fi
- # Write a limited-size here document to conftest.frag.
- echo ' cat > conftest.frag <<CEOF' >> $CONFIG_STATUS
- sed ${ac_max_here_lines}q conftest.vals >> $CONFIG_STATUS
- echo 'CEOF
- sed -f conftest.frag conftest.in > conftest.out
- rm -f conftest.in
- mv conftest.out conftest.in
-' >> $CONFIG_STATUS
- sed 1,${ac_max_here_lines}d conftest.vals > conftest.tail
- rm -f conftest.vals
- mv conftest.tail conftest.vals
-done
-rm -f conftest.vals
-
-cat >> $CONFIG_STATUS <<\EOF
- rm -f conftest.frag conftest.h
- echo "/* $ac_file. Generated automatically by configure. */" > conftest.h
- cat conftest.in >> conftest.h
- rm -f conftest.in
- if cmp -s $ac_file conftest.h 2>/dev/null; then
- echo "$ac_file is unchanged"
- rm -f conftest.h
- else
- # Remove last slash and all that follows it. Not all systems have dirname.
- ac_dir=`echo $ac_file|sed 's%/[^/][^/]*$%%'`
- if test "$ac_dir" != "$ac_file" && test "$ac_dir" != .; then
- # The file is in a subdirectory.
- test ! -d "$ac_dir" && mkdir "$ac_dir"
- fi
- rm -f $ac_file
- mv conftest.h $ac_file
- fi
-fi; done
-
-EOF
-
-cat >> $CONFIG_STATUS <<EOF
-ac_sources="$sim_link_files"
-ac_dests="$sim_link_links"
-EOF
-
-cat >> $CONFIG_STATUS <<\EOF
-srcdir=$ac_given_srcdir
-while test -n "$ac_sources"; do
- set $ac_dests; ac_dest=$1; shift; ac_dests=$*
- set $ac_sources; ac_source=$1; shift; ac_sources=$*
-
- echo "linking $srcdir/$ac_source to $ac_dest"
-
- if test ! -r $srcdir/$ac_source; then
- { echo "configure: error: $srcdir/$ac_source: File not found" 1>&2; exit 1; }
- fi
- rm -f $ac_dest
-
- # Make relative symlinks.
- # Remove last slash and all that follows it. Not all systems have dirname.
- ac_dest_dir=`echo $ac_dest|sed 's%/[^/][^/]*$%%'`
- if test "$ac_dest_dir" != "$ac_dest" && test "$ac_dest_dir" != .; then
- # The dest file is in a subdirectory.
- test ! -d "$ac_dest_dir" && mkdir "$ac_dest_dir"
- ac_dest_dir_suffix="/`echo $ac_dest_dir|sed 's%^\./%%'`"
- # A "../" for each directory in $ac_dest_dir_suffix.
- ac_dots=`echo $ac_dest_dir_suffix|sed 's%/[^/]*%../%g'`
- else
- ac_dest_dir_suffix= ac_dots=
- fi
-
- case "$srcdir" in
- [/$]*) ac_rel_source="$srcdir/$ac_source" ;;
- *) ac_rel_source="$ac_dots$srcdir/$ac_source" ;;
- esac
-
- # Make a symlink if possible; otherwise try a hard link.
- if ln -s $ac_rel_source $ac_dest 2>/dev/null ||
- ln $srcdir/$ac_source $ac_dest; then :
- else
- { echo "configure: error: can not link $ac_dest to $srcdir/$ac_source" 1>&2; exit 1; }
- fi
-done
-EOF
-cat >> $CONFIG_STATUS <<EOF
-
-EOF
-cat >> $CONFIG_STATUS <<\EOF
-case "x$CONFIG_FILES" in
- xMakefile*)
- echo "Merging Makefile.sim+Make-common.sim into Makefile ..."
- rm -f Makesim1.tmp Makesim2.tmp Makefile
- sed -n -e '/^## COMMON_PRE_/,/^## End COMMON_PRE_/ p' <Make-common.sim >Makesim1.tmp
- sed -n -e '/^## COMMON_POST_/,/^## End COMMON_POST_/ p' <Make-common.sim >Makesim2.tmp
- sed -e '/^## COMMON_PRE_/ r Makesim1.tmp' \
- -e '/^## COMMON_POST_/ r Makesim2.tmp' \
- <Makefile.sim >Makefile
- rm -f Makefile.sim Make-common.sim Makesim1.tmp Makesim2.tmp
- ;;
- esac
- case "x$CONFIG_HEADERS" in xconfig.h:config.in) echo > stamp-h ;; esac
-
-exit 0
-EOF
-chmod +x $CONFIG_STATUS
-rm -fr confdefs* $ac_clean_files
-test "$no_create" = yes || ${CONFIG_SHELL-/bin/sh} $CONFIG_STATUS || exit 1
-
-
diff --git a/sim/erc32/configure.in b/sim/erc32/configure.in
deleted file mode 100644
index cef343daf8b..00000000000
--- a/sim/erc32/configure.in
+++ /dev/null
@@ -1,24 +0,0 @@
-dnl Process this file with autoconf to produce a configure script.
-sinclude(../common/aclocal.m4)
-AC_PREREQ(2.5)dnl
-AC_INIT(Makefile.in)
-
-SIM_AC_COMMON
-
-AC_CHECK_HEADERS(stdlib.h)
-
-# In the Cygwin environment, we need some additional flags.
-AC_CACHE_CHECK([for cygwin], sim_cv_os_cygwin,
-[AC_EGREP_CPP(lose, [
-#ifdef __CYGWIN__
-lose
-#endif],[sim_cv_os_cygwin=yes],[sim_cv_os_cygwin=no])])
-
-if test x$sim_cv_os_cygwin = xyes; then
- TERMCAP='`if test -r ../../libtermcap/libtermcap.a; then echo ../../libtermcap/libtermcap.a; else echo -ltermcap; fi` -luser32'
-else
- AC_CHECK_LIB(termcap, main, TERMCAP=-ltermcap, TERMCAP="")
-fi
-AC_SUBST(TERMCAP)
-
-SIM_AC_OUTPUT
diff --git a/sim/erc32/end.c b/sim/erc32/end.c
deleted file mode 100644
index 973fd796bf0..00000000000
--- a/sim/erc32/end.c
+++ /dev/null
@@ -1,26 +0,0 @@
-#include <stdio.h>
-
-int
-main()
-{
-
- unsigned int u1;
- char *c;
- double d1;
- float *f1;
-
- c = (char *) &u1;
- u1 = 0x0F;
- if (c[0] == 0x0F)
- puts("#define HOST_LITTLE_ENDIAN\n");
- else
- puts("#define HOST_BIG_ENDIAN\n");
-
- d1 = 1.0;
- f1 = (float *) &d1;
- if (*((int *) f1) != 0x3ff00000)
- puts("#define HOST_LITTLE_ENDIAN_FLOAT\n");
- else
- puts("#define HOST_BIG_ENDIAN_FLOAT\n");
- return 0;
-}
diff --git a/sim/erc32/erc32.c b/sim/erc32/erc32.c
deleted file mode 100644
index 0b3f3ac9f18..00000000000
--- a/sim/erc32/erc32.c
+++ /dev/null
@@ -1,1888 +0,0 @@
-/*
- * This file is part of SIS.
- *
- * SIS, SPARC instruction simulator V2.5 Copyright (C) 1995 Jiri Gaisler,
- * European Space Agency
- *
- * This program is free software; you can redistribute it and/or modify it under
- * the terms of the GNU General Public License as published by the Free
- * Software Foundation; either version 2 of the License, or (at your option)
- * any later version.
- *
- * This program is distributed in the hope that it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc., 675
- * Mass Ave, Cambridge, MA 02139, USA.
- *
- */
-
-/* The control space devices */
-
-#include <sys/types.h>
-#include <stdio.h>
-#include <termios.h>
-#include <sys/fcntl.h>
-#include <sys/file.h>
-#include <unistd.h>
-#include "sis.h"
-#include "end.h"
-#include "sim-config.h"
-
-extern int ctrl_c;
-extern int32 sis_verbose;
-extern int32 sparclite, sparclite_board;
-extern int rom8,wrp,uben;
-extern char uart_dev1[], uart_dev2[];
-
-int dumbio = 0; /* normal, smart, terminal oriented IO by default */
-
-/* MEC registers */
-#define MEC_START 0x01f80000
-#define MEC_END 0x01f80100
-
-/* Memory exception waitstates */
-#define MEM_EX_WS 1
-
-/* ERC32 always adds one waitstate during RAM std */
-#define STD_WS 1
-
-#ifdef ERRINJ
-extern int errmec;
-#endif
-
-/* The target's byte order is big-endian by default until we load a
- little-endian program. */
-
-int current_target_byte_order = BIG_ENDIAN;
-
-#define MEC_WS 0 /* Waitstates per MEC access (0 ws) */
-#define MOK 0
-
-/* MEC register addresses */
-
-#define MEC_MCR 0x000
-#define MEC_SFR 0x004
-#define MEC_PWDR 0x008
-#define MEC_MEMCFG 0x010
-#define MEC_IOCR 0x014
-#define MEC_WCR 0x018
-
-#define MEC_MAR0 0x020
-#define MEC_MAR1 0x024
-
-#define MEC_SSA1 0x020
-#define MEC_SEA1 0x024
-#define MEC_SSA2 0x028
-#define MEC_SEA2 0x02C
-#define MEC_ISR 0x044
-#define MEC_IPR 0x048
-#define MEC_IMR 0x04C
-#define MEC_ICR 0x050
-#define MEC_IFR 0x054
-#define MEC_WDOG 0x060
-#define MEC_TRAPD 0x064
-#define MEC_RTC_COUNTER 0x080
-#define MEC_RTC_RELOAD 0x080
-#define MEC_RTC_SCALER 0x084
-#define MEC_GPT_COUNTER 0x088
-#define MEC_GPT_RELOAD 0x088
-#define MEC_GPT_SCALER 0x08C
-#define MEC_TIMER_CTRL 0x098
-#define MEC_SFSR 0x0A0
-#define MEC_FFAR 0x0A4
-#define MEC_ERSR 0x0B0
-#define MEC_DBG 0x0C0
-#define MEC_TCR 0x0D0
-
-#define MEC_BRK 0x0C4
-#define MEC_WPR 0x0C8
-
-#define MEC_UARTA 0x0E0
-#define MEC_UARTB 0x0E4
-#define MEC_UART_CTRL 0x0E8
-#define SIM_LOAD 0x0F0
-
-/* Memory exception causes */
-#define PROT_EXC 0x3
-#define UIMP_ACC 0x4
-#define MEC_ACC 0x6
-#define WATCH_EXC 0xa
-#define BREAK_EXC 0xb
-
-/* Size of UART buffers (bytes) */
-#define UARTBUF 1024
-
-/* Number of simulator ticks between flushing the UARTS. */
-/* For good performance, keep above 1000 */
-#define UART_FLUSH_TIME 3000
-
-/* MEC timer control register bits */
-#define TCR_GACR 1
-#define TCR_GACL 2
-#define TCR_GASE 4
-#define TCR_GASL 8
-#define TCR_TCRCR 0x100
-#define TCR_TCRCL 0x200
-#define TCR_TCRSE 0x400
-#define TCR_TCRSL 0x800
-
-/* New uart defines */
-#define UART_TX_TIME 1000
-#define UART_RX_TIME 1000
-#define UARTA_DR 0x1
-#define UARTA_SRE 0x2
-#define UARTA_HRE 0x4
-#define UARTA_OR 0x40
-#define UARTA_CLR 0x80
-#define UARTB_DR 0x10000
-#define UARTB_SRE 0x20000
-#define UARTB_HRE 0x40000
-#define UARTB_OR 0x400000
-#define UARTB_CLR 0x800000
-
-#define UART_DR 0x100
-#define UART_TSE 0x200
-#define UART_THE 0x400
-
-/* MEC registers */
-
-static char fname[256];
-static int32 find = 0;
-static uint32 mec_ssa[2]; /* Write protection start address */
-static uint32 mec_sea[2]; /* Write protection end address */
-static uint32 mec_wpr[2]; /* Write protection control fields */
-static uint32 mec_sfsr;
-static uint32 mec_ffar;
-static uint32 mec_ipr;
-static uint32 mec_imr;
-static uint32 mec_isr;
-static uint32 mec_icr;
-static uint32 mec_ifr;
-static uint32 mec_mcr; /* MEC control register */
-static uint32 mec_memcfg; /* Memory control register */
-static uint32 mec_wcr; /* MEC waitstate register */
-static uint32 mec_iocr; /* MEC IO control register */
-static uint32 posted_irq;
-static uint32 mec_ersr; /* MEC error and status register */
-static uint32 mec_tcr; /* MEC test comtrol register */
-
-static uint32 rtc_counter;
-static uint32 rtc_reload;
-static uint32 rtc_scaler;
-static uint32 rtc_scaler_start;
-static uint32 rtc_enabled;
-static uint32 rtc_cr;
-static uint32 rtc_se;
-
-static uint32 gpt_counter;
-static uint32 gpt_reload;
-static uint32 gpt_scaler;
-static uint32 gpt_scaler_start;
-static uint32 gpt_enabled;
-static uint32 gpt_cr;
-static uint32 gpt_se;
-
-static uint32 wdog_scaler;
-static uint32 wdog_counter;
-static uint32 wdog_rst_delay;
-static uint32 wdog_rston;
-
-enum wdog_type {
- init, disabled, enabled, stopped
-};
-
-static enum wdog_type wdog_status;
-
-
-/* ROM size 1024 Kbyte */
-#define ROM_SZ 0x100000
-#define ROM_MASK 0x0fffff
-
-/* RAM size 4 Mbyte */
-#define RAM_START 0x02000000
-#define RAM_END 0x02400000
-#define RAM_MASK 0x003fffff
-
-/* SPARClite boards all seem to have RAM at the same place. */
-#define RAM_START_SLITE 0x40000000
-#define RAM_END_SLITE 0x40400000
-#define RAM_MASK_SLITE 0x003fffff
-
-/* Memory support variables */
-
-static uint32 mem_ramr_ws; /* RAM read waitstates */
-static uint32 mem_ramw_ws; /* RAM write waitstates */
-static uint32 mem_romr_ws; /* ROM read waitstates */
-static uint32 mem_romw_ws; /* ROM write waitstates */
-static uint32 mem_ramstart; /* RAM start */
-static uint32 mem_ramend; /* RAM end */
-static uint32 mem_rammask; /* RAM address mask */
-static uint32 mem_ramsz; /* RAM size */
-static uint32 mem_romsz; /* ROM size */
-static uint32 mem_accprot; /* RAM write protection enabled */
-static uint32 mem_blockprot; /* RAM block write protection enabled */
-
-static unsigned char romb[ROM_SZ];
-static unsigned char ramb[RAM_END - RAM_START];
-
-
-/* UART support variables */
-
-static int32 fd1, fd2; /* file descriptor for input file */
-static int32 Ucontrol; /* UART status register */
-static unsigned char aq[UARTBUF], bq[UARTBUF];
-static int32 anum, aind = 0;
-static int32 bnum, bind = 0;
-static char wbufa[UARTBUF], wbufb[UARTBUF];
-static unsigned wnuma;
-static unsigned wnumb;
-static FILE *f1in, *f1out, *f2in, *f2out;
-static struct termios ioc1, ioc2, iocold1, iocold2;
-static int f1open = 0, f2open = 0;
-
-static char uarta_sreg, uarta_hreg, uartb_sreg, uartb_hreg;
-static uint32 uart_stat_reg;
-static uint32 uarta_data, uartb_data;
-
-#ifdef ERA
-int era = 0;
-int erareg;
-#endif
-
-/* Forward declarations */
-
-static void decode_ersr PARAMS ((void));
-#ifdef ERRINJ
-static void iucomperr PARAMS ((void));
-#endif
-static void mecparerror PARAMS ((void));
-static void decode_memcfg PARAMS ((void));
-static void decode_wcr PARAMS ((void));
-static void decode_mcr PARAMS ((void));
-static void close_port PARAMS ((void));
-static void mec_reset PARAMS ((void));
-static void mec_intack PARAMS ((int32 level));
-static void chk_irq PARAMS ((void));
-static void mec_irq PARAMS ((int32 level));
-static void set_sfsr PARAMS ((uint32 fault, uint32 addr,
- uint32 asi, uint32 read));
-static int32 mec_read PARAMS ((uint32 addr, uint32 asi, uint32 *data));
-static int mec_write PARAMS ((uint32 addr, uint32 data));
-static void port_init PARAMS ((void));
-static uint32 read_uart PARAMS ((uint32 addr));
-static void write_uart PARAMS ((uint32 addr, uint32 data));
-static void flush_uart PARAMS ((void));
-static void uarta_tx PARAMS ((void));
-static void uartb_tx PARAMS ((void));
-static void uart_rx PARAMS ((caddr_t arg));
-static void uart_intr PARAMS ((caddr_t arg));
-static void uart_irq_start PARAMS ((void));
-static void wdog_intr PARAMS ((caddr_t arg));
-static void wdog_start PARAMS ((void));
-static void rtc_intr PARAMS ((caddr_t arg));
-static void rtc_start PARAMS ((void));
-static uint32 rtc_counter_read PARAMS ((void));
-static void rtc_scaler_set PARAMS ((uint32 val));
-static void rtc_reload_set PARAMS ((uint32 val));
-static void gpt_intr PARAMS ((caddr_t arg));
-static void gpt_start PARAMS ((void));
-static uint32 gpt_counter_read PARAMS ((void));
-static void gpt_scaler_set PARAMS ((uint32 val));
-static void gpt_reload_set PARAMS ((uint32 val));
-static void timer_ctrl PARAMS ((uint32 val));
-static unsigned char *
- get_mem_ptr PARAMS ((uint32 addr, uint32 size));
-
-static void fetch_bytes PARAMS ((int asi, unsigned char *mem,
- uint32 *data, int sz));
-
-static void store_bytes PARAMS ((unsigned char *mem, uint32 *data, int sz));
-
-extern int ext_irl;
-
-
-/* One-time init */
-
-void
-init_sim()
-{
- port_init();
-}
-
-/* Power-on reset init */
-
-void
-reset()
-{
- mec_reset();
- uart_irq_start();
- wdog_start();
-}
-
-static void
-decode_ersr()
-{
- if (mec_ersr & 0x01) {
- if (!(mec_mcr & 0x20)) {
- if (mec_mcr & 0x40) {
- sys_reset();
- mec_ersr = 0x8000;
- if (sis_verbose)
- printf("Error manager reset - IU in error mode\n");
- } else {
- sys_halt();
- mec_ersr |= 0x2000;
- if (sis_verbose)
- printf("Error manager halt - IU in error mode\n");
- }
- } else
- mec_irq(1);
- }
- if (mec_ersr & 0x04) {
- if (!(mec_mcr & 0x200)) {
- if (mec_mcr & 0x400) {
- sys_reset();
- mec_ersr = 0x8000;
- if (sis_verbose)
- printf("Error manager reset - IU comparison error\n");
- } else {
- sys_halt();
- mec_ersr |= 0x2000;
- if (sis_verbose)
- printf("Error manager halt - IU comparison error\n");
- }
- } else
- mec_irq(1);
- }
- if (mec_ersr & 0x20) {
- if (!(mec_mcr & 0x2000)) {
- if (mec_mcr & 0x4000) {
- sys_reset();
- mec_ersr = 0x8000;
- if (sis_verbose)
- printf("Error manager reset - MEC hardware error\n");
- } else {
- sys_halt();
- mec_ersr |= 0x2000;
- if (sis_verbose)
- printf("Error manager halt - MEC hardware error\n");
- }
- } else
- mec_irq(1);
- }
-}
-
-#ifdef ERRINJ
-static void
-iucomperr()
-{
- mec_ersr |= 0x04;
- decode_ersr();
-}
-#endif
-
-static void
-mecparerror()
-{
- mec_ersr |= 0x20;
- decode_ersr();
-}
-
-
-/* IU error mode manager */
-
-void
-error_mode(pc)
- uint32 pc;
-{
-
- mec_ersr |= 0x1;
- decode_ersr();
-}
-
-
-/* Check memory settings */
-
-static void
-decode_memcfg()
-{
- if (rom8) mec_memcfg &= ~0x20000;
- else mec_memcfg |= 0x20000;
-
- mem_ramsz = (256 * 1024) << ((mec_memcfg >> 10) & 7);
- mem_romsz = (128 * 1024) << ((mec_memcfg >> 18) & 7);
-
- if (sparclite_board) {
- mem_ramstart = RAM_START_SLITE;
- mem_ramend = RAM_END_SLITE;
- mem_rammask = RAM_MASK_SLITE;
- }
- else {
- mem_ramstart = RAM_START;
- mem_ramend = RAM_END;
- mem_rammask = RAM_MASK;
- }
- if (sis_verbose)
- printf("RAM start: 0x%x, RAM size: %d K, ROM size: %d K\n",
- mem_ramstart, mem_ramsz >> 10, mem_romsz >> 10);
-}
-
-static void
-decode_wcr()
-{
- mem_ramr_ws = mec_wcr & 3;
- mem_ramw_ws = (mec_wcr >> 2) & 3;
- mem_romr_ws = (mec_wcr >> 4) & 0x0f;
- if (rom8) {
- if (mem_romr_ws > 0 ) mem_romr_ws--;
- mem_romr_ws = 5 + (4*mem_romr_ws);
- }
- mem_romw_ws = (mec_wcr >> 8) & 0x0f;
- if (sis_verbose)
- printf("Waitstates = RAM read: %d, RAM write: %d, ROM read: %d, ROM write: %d\n",
- mem_ramr_ws, mem_ramw_ws, mem_romr_ws, mem_romw_ws);
-}
-
-static void
-decode_mcr()
-{
- mem_accprot = (mec_wpr[0] | mec_wpr[1]);
- mem_blockprot = (mec_mcr >> 3) & 1;
- if (sis_verbose && mem_accprot)
- printf("Memory block write protection enabled\n");
- if (mec_mcr & 0x08000) {
- mec_ersr |= 0x20;
- decode_ersr();
- }
- if (sis_verbose && (mec_mcr & 2))
- printf("Software reset enabled\n");
- if (sis_verbose && (mec_mcr & 1))
- printf("Power-down mode enabled\n");
-}
-
-/* Flush ports when simulator stops */
-
-void
-sim_halt()
-{
-#ifdef FAST_UART
- flush_uart();
-#endif
-}
-
-int
-sim_stop(SIM_DESC sd)
-{
- ctrl_c = 1;
- return 1;
-}
-
-static void
-close_port()
-{
- if (f1open && f1in != stdin)
- fclose(f1in);
- if (f2open && f2in != stdin)
- fclose(f2in);
-}
-
-void
-exit_sim()
-{
- close_port();
-}
-
-static void
-mec_reset()
-{
- int i;
-
- find = 0;
- for (i = 0; i < 2; i++)
- mec_ssa[i] = mec_sea[i] = mec_wpr[i] = 0;
- mec_mcr = 0x01350014;
- mec_iocr = 0;
- mec_sfsr = 0x078;
- mec_ffar = 0;
- mec_ipr = 0;
- mec_imr = 0x7ffe;
- mec_isr = 0;
- mec_icr = 0;
- mec_ifr = 0;
- mec_memcfg = 0x10000;
- mec_wcr = -1;
- mec_ersr = 0; /* MEC error and status register */
- mec_tcr = 0; /* MEC test comtrol register */
-
- decode_memcfg();
- decode_wcr();
- decode_mcr();
-
- posted_irq = 0;
- wnuma = wnumb = 0;
- anum = aind = bnum = bind = 0;
-
- uart_stat_reg = UARTA_SRE | UARTA_HRE | UARTB_SRE | UARTB_HRE;
- uarta_data = uartb_data = UART_THE | UART_TSE;
-
- rtc_counter = 0xffffffff;
- rtc_reload = 0xffffffff;
- rtc_scaler = 0xff;
- rtc_enabled = 0;
- rtc_cr = 0;
- rtc_se = 0;
-
- gpt_counter = 0xffffffff;
- gpt_reload = 0xffffffff;
- gpt_scaler = 0xffff;
- gpt_enabled = 0;
- gpt_cr = 0;
- gpt_se = 0;
-
- wdog_scaler = 255;
- wdog_rst_delay = 255;
- wdog_counter = 0xffff;
- wdog_rston = 0;
- wdog_status = init;
-
-#ifdef ERA
- erareg = 0;
-#endif
-
-}
-
-
-
-static void
-mec_intack(level)
- int32 level;
-{
- int irq_test;
-
- if (sis_verbose)
- printf("interrupt %d acknowledged\n", level);
- irq_test = mec_tcr & 0x80000;
- if ((irq_test) && (mec_ifr & (1 << level)))
- mec_ifr &= ~(1 << level);
- else
- mec_ipr &= ~(1 << level);
- chk_irq();
-}
-
-static void
-chk_irq()
-{
- int32 i;
- uint32 itmp;
- int old_irl;
-
- old_irl = ext_irl;
- if (mec_tcr & 0x80000) itmp = mec_ifr;
- else itmp = 0;
- itmp = ((mec_ipr | itmp) & ~mec_imr) & 0x0fffe;
- ext_irl = 0;
- if (itmp != 0) {
- for (i = 15; i > 0; i--) {
- if (((itmp >> i) & 1) != 0) {
- if ((sis_verbose) && (i > old_irl))
- printf("IU irl: %d\n", i);
- ext_irl = i;
- set_int(i, mec_intack, i);
- break;
- }
- }
- }
-}
-
-static void
-mec_irq(level)
- int32 level;
-{
- mec_ipr |= (1 << level);
- chk_irq();
-}
-
-static void
-set_sfsr(fault, addr, asi, read)
- uint32 fault;
- uint32 addr;
- uint32 asi;
- uint32 read;
-{
- if ((asi == 0xa) || (asi == 0xb)) {
- mec_ffar = addr;
- mec_sfsr = (fault << 3) | (!read << 15);
- mec_sfsr |= ((mec_sfsr & 1) ^ 1) | (mec_sfsr & 1);
- switch (asi) {
- case 0xa:
- mec_sfsr |= 0x0004;
- break;
- case 0xb:
- mec_sfsr |= 0x1004;
- break;
- }
- }
-}
-
-static int32
-mec_read(addr, asi, data)
- uint32 addr;
- uint32 asi;
- uint32 *data;
-{
-
- switch (addr & 0x0ff) {
-
- case MEC_MCR: /* 0x00 */
- *data = mec_mcr;
- break;
-
- case MEC_MEMCFG: /* 0x10 */
- *data = mec_memcfg;
- break;
-
- case MEC_IOCR:
- *data = mec_iocr; /* 0x14 */
- break;
-
- case MEC_SSA1: /* 0x20 */
- *data = mec_ssa[0] | (mec_wpr[0] << 23);
- break;
- case MEC_SEA1: /* 0x24 */
- *data = mec_sea[0];
- break;
- case MEC_SSA2: /* 0x28 */
- *data = mec_ssa[1] | (mec_wpr[1] << 23);
- break;
- case MEC_SEA2: /* 0x2c */
- *data = mec_sea[1];
- break;
-
- case MEC_ISR: /* 0x44 */
- *data = mec_isr;
- break;
-
- case MEC_IPR: /* 0x48 */
- *data = mec_ipr;
- break;
-
- case MEC_IMR: /* 0x4c */
- *data = mec_imr;
- break;
-
- case MEC_IFR: /* 0x54 */
- *data = mec_ifr;
- break;
-
- case MEC_RTC_COUNTER: /* 0x80 */
- *data = rtc_counter_read();
- break;
- case MEC_RTC_SCALER: /* 0x84 */
- if (rtc_enabled)
- *data = rtc_scaler - (now() - rtc_scaler_start);
- else
- *data = rtc_scaler;
- break;
-
- case MEC_GPT_COUNTER: /* 0x88 */
- *data = gpt_counter_read();
- break;
-
- case MEC_GPT_SCALER: /* 0x8c */
- if (rtc_enabled)
- *data = gpt_scaler - (now() - gpt_scaler_start);
- else
- *data = gpt_scaler;
- break;
-
-
- case MEC_SFSR: /* 0xA0 */
- *data = mec_sfsr;
- break;
-
- case MEC_FFAR: /* 0xA4 */
- *data = mec_ffar;
- break;
-
- case SIM_LOAD:
- fname[find] = 0;
- if (find == 0)
- strcpy(fname, "simload");
- find = bfd_load(fname);
- if (find == -1)
- *data = 0;
- else
- *data = 1;
- find = 0;
- break;
-
- case MEC_ERSR: /* 0xB0 */
- *data = mec_ersr;
- break;
-
- case MEC_TCR: /* 0xD0 */
- *data = mec_tcr;
- break;
-
- case MEC_UARTA: /* 0xE0 */
- case MEC_UARTB: /* 0xE4 */
- if (asi != 0xb) {
- set_sfsr(MEC_ACC, addr, asi, 1);
- return (1);
- }
- *data = read_uart(addr);
- break;
-
- case MEC_UART_CTRL: /* 0xE8 */
-
- *data = read_uart(addr);
- break;
-
- default:
- set_sfsr(MEC_ACC, addr, asi, 1);
- return (1);
- break;
- }
- return (MOK);
-}
-
-static int
-mec_write(addr, data)
- uint32 addr;
- uint32 data;
-{
- if (sis_verbose > 1)
- printf("MEC write a: %08x, d: %08x\n",addr,data);
- switch (addr & 0x0ff) {
-
- case MEC_MCR:
- mec_mcr = data;
- decode_mcr();
- if (mec_mcr & 0x08000) mecparerror();
- break;
-
- case MEC_SFR:
- if (mec_mcr & 0x2) {
- sys_reset();
- mec_ersr = 0x4000;
- if (sis_verbose)
- printf(" Software reset issued\n");
- }
- break;
-
- case MEC_IOCR:
- mec_iocr = data;
- if (mec_iocr & 0xC0C0C0C0) mecparerror();
- break;
-
- case MEC_SSA1: /* 0x20 */
- if (data & 0xFE000000) mecparerror();
- mec_ssa[0] = data & 0x7fffff;
- mec_wpr[0] = (data >> 23) & 0x03;
- mem_accprot = mec_wpr[0] || mec_wpr[1];
- if (sis_verbose && mec_wpr[0])
- printf("Segment 1 memory protection enabled (0x02%06x - 0x02%06x)\n",
- mec_ssa[0] << 2, mec_sea[0] << 2);
- break;
- case MEC_SEA1: /* 0x24 */
- if (data & 0xFF800000) mecparerror();
- mec_sea[0] = data & 0x7fffff;
- break;
- case MEC_SSA2: /* 0x28 */
- if (data & 0xFE000000) mecparerror();
- mec_ssa[1] = data & 0x7fffff;
- mec_wpr[1] = (data >> 23) & 0x03;
- mem_accprot = mec_wpr[0] || mec_wpr[1];
- if (sis_verbose && mec_wpr[1])
- printf("Segment 2 memory protection enabled (0x02%06x - 0x02%06x)\n",
- mec_ssa[1] << 2, mec_sea[1] << 2);
- break;
- case MEC_SEA2: /* 0x2c */
- if (data & 0xFF800000) mecparerror();
- mec_sea[1] = data & 0x7fffff;
- break;
-
- case MEC_UARTA:
- case MEC_UARTB:
- if (data & 0xFFFFFF00) mecparerror();
- case MEC_UART_CTRL:
- if (data & 0xFF00FF00) mecparerror();
- write_uart(addr, data);
- break;
-
- case MEC_GPT_RELOAD:
- gpt_reload_set(data);
- break;
-
- case MEC_GPT_SCALER:
- if (data & 0xFFFF0000) mecparerror();
- gpt_scaler_set(data);
- break;
-
- case MEC_TIMER_CTRL:
- if (data & 0xFFFFF0F0) mecparerror();
- timer_ctrl(data);
- break;
-
- case MEC_RTC_RELOAD:
- rtc_reload_set(data);
- break;
-
- case MEC_RTC_SCALER:
- if (data & 0xFFFFFF00) mecparerror();
- rtc_scaler_set(data);
- break;
-
- case MEC_SFSR: /* 0xA0 */
- if (data & 0xFFFF0880) mecparerror();
- mec_sfsr = 0x78;
- break;
-
- case MEC_ISR:
- if (data & 0xFFFFE000) mecparerror();
- mec_isr = data;
- break;
-
- case MEC_IMR: /* 0x4c */
-
- if (data & 0xFFFF8001) mecparerror();
- mec_imr = data & 0x7ffe;
- chk_irq();
- break;
-
- case MEC_ICR: /* 0x50 */
-
- if (data & 0xFFFF0001) mecparerror();
- mec_ipr &= ~data & 0x0fffe;
- chk_irq();
- break;
-
- case MEC_IFR: /* 0x54 */
-
- if (mec_tcr & 0x080000) {
- if (data & 0xFFFF0001) mecparerror();
- mec_ifr = data & 0xfffe;
- chk_irq();
- }
- break;
- case SIM_LOAD:
- fname[find++] = (char) data;
- break;
-
-
- case MEC_MEMCFG: /* 0x10 */
- if (data & 0xC0E08000) mecparerror();
- mec_memcfg = data;
- decode_memcfg();
- if (mec_memcfg & 0xc0e08000)
- mecparerror();
- break;
-
- case MEC_WCR: /* 0x18 */
- mec_wcr = data;
- decode_wcr();
- break;
-
- case MEC_ERSR: /* 0xB0 */
- if (mec_tcr & 0x100000)
- if (data & 0xFFFFEFC0) mecparerror();
- mec_ersr = data & 0x103f;
- break;
-
- case MEC_TCR: /* 0xD0 */
- if (data & 0xFFE1FFC0) mecparerror();
- mec_tcr = data & 0x1e003f;
- break;
-
- case MEC_WDOG: /* 0x60 */
- wdog_scaler = (data >> 16) & 0x0ff;
- wdog_counter = data & 0x0ffff;
- wdog_rst_delay = data >> 24;
- wdog_rston = 0;
- if (wdog_status == stopped)
- wdog_start();
- wdog_status = enabled;
- break;
-
- case MEC_TRAPD: /* 0x64 */
- if (wdog_status == init) {
- wdog_status = disabled;
- if (sis_verbose)
- printf("Watchdog disabled\n");
- }
- break;
-
- case MEC_PWDR:
- if (mec_mcr & 1)
- wait_for_irq();
- break;
-
- default:
- set_sfsr(MEC_ACC, addr, 0xb, 0);
- return (1);
- break;
- }
- return (MOK);
-}
-
-
-/* MEC UARTS */
-
-static int ifd1 = -1, ifd2 = -1, ofd1 = -1, ofd2 = -1;
-
-void
-init_stdio()
-{
- if (dumbio)
- return; /* do nothing */
- if (!ifd1)
- tcsetattr(0, TCSANOW, &ioc1);
- if (!ifd2)
- tcsetattr(0, TCSANOW, &ioc2);
-}
-
-void
-restore_stdio()
-{
- if (dumbio)
- return; /* do nothing */
- if (!ifd1)
- tcsetattr(0, TCSANOW, &iocold1);
- if (!ifd2)
- tcsetattr(0, TCSANOW, &iocold2);
-}
-
-#define DO_STDIO_READ( _fd_, _buf_, _len_ ) \
- ( dumbio \
- ? (0) /* no bytes read, no delay */ \
- : read( _fd_, _buf_, _len_ ) )
-
-
-static void
-port_init()
-{
-
- if (uben) {
- f2in = stdin;
- f1in = NULL;
- f2out = stdout;
- f1out = NULL;
- } else {
- f1in = stdin;
- f2in = NULL;
- f1out = stdout;
- f2out = NULL;
- }
- if (uart_dev1[0] != 0)
- if ((fd1 = open(uart_dev1, O_RDWR | O_NONBLOCK)) < 0) {
- printf("Warning, couldn't open output device %s\n", uart_dev1);
- } else {
- if (sis_verbose)
- printf("serial port A on %s\n", uart_dev1);
- f1in = f1out = fdopen(fd1, "r+");
- setbuf(f1out, NULL);
- f1open = 1;
- }
- if (f1in) ifd1 = fileno(f1in);
- if (ifd1 == 0) {
- if (sis_verbose)
- printf("serial port A on stdin/stdout\n");
- if (!dumbio) {
- tcgetattr(ifd1, &ioc1);
- iocold1 = ioc1;
- ioc1.c_lflag &= ~(ICANON | ECHO);
- ioc1.c_cc[VMIN] = 0;
- ioc1.c_cc[VTIME] = 0;
- }
- f1open = 1;
- }
-
- if (f1out) {
- ofd1 = fileno(f1out);
- if (!dumbio && ofd1 == 1) setbuf(f1out, NULL);
- }
-
- if (uart_dev2[0] != 0)
- if ((fd2 = open(uart_dev2, O_RDWR | O_NONBLOCK)) < 0) {
- printf("Warning, couldn't open output device %s\n", uart_dev2);
- } else {
- if (sis_verbose)
- printf("serial port B on %s\n", uart_dev2);
- f2in = f2out = fdopen(fd2, "r+");
- setbuf(f2out, NULL);
- f2open = 1;
- }
- if (f2in) ifd2 = fileno(f2in);
- if (ifd2 == 0) {
- if (sis_verbose)
- printf("serial port B on stdin/stdout\n");
- if (!dumbio) {
- tcgetattr(ifd2, &ioc2);
- iocold2 = ioc2;
- ioc2.c_lflag &= ~(ICANON | ECHO);
- ioc2.c_cc[VMIN] = 0;
- ioc2.c_cc[VTIME] = 0;
- }
- f2open = 1;
- }
-
- if (f2out) {
- ofd2 = fileno(f2out);
- if (!dumbio && ofd2 == 1) setbuf(f2out, NULL);
- }
-
- wnuma = wnumb = 0;
-
-}
-
-static uint32
-read_uart(addr)
- uint32 addr;
-{
-
- unsigned tmp;
-
- tmp = 0;
- switch (addr & 0xff) {
-
- case 0xE0: /* UART 1 */
-#ifndef _WIN32
-#ifdef FAST_UART
-
- if (aind < anum) {
- if ((aind + 1) < anum)
- mec_irq(4);
- return (0x700 | (uint32) aq[aind++]);
- } else {
- if (f1open) {
- anum = DO_STDIO_READ(ifd1, aq, UARTBUF);
- }
- if (anum > 0) {
- aind = 0;
- if ((aind + 1) < anum)
- mec_irq(4);
- return (0x700 | (uint32) aq[aind++]);
- } else {
- return (0x600 | (uint32) aq[aind]);
- }
-
- }
-#else
- tmp = uarta_data;
- uarta_data &= ~UART_DR;
- uart_stat_reg &= ~UARTA_DR;
- return tmp;
-#endif
-#else
- return(0);
-#endif
- break;
-
- case 0xE4: /* UART 2 */
-#ifndef _WIN32
-#ifdef FAST_UART
- if (bind < bnum) {
- if ((bind + 1) < bnum)
- mec_irq(5);
- return (0x700 | (uint32) bq[bind++]);
- } else {
- if (f2open) {
- bnum = DO_STDIO_READ(ifd2, bq, UARTBUF);
- }
- if (bnum > 0) {
- bind = 0;
- if ((bind + 1) < bnum)
- mec_irq(5);
- return (0x700 | (uint32) bq[bind++]);
- } else {
- return (0x600 | (uint32) bq[bind]);
- }
-
- }
-#else
- tmp = uartb_data;
- uartb_data &= ~UART_DR;
- uart_stat_reg &= ~UARTB_DR;
- return tmp;
-#endif
-#else
- return(0);
-#endif
- break;
-
- case 0xE8: /* UART status register */
-#ifndef _WIN32
-#ifdef FAST_UART
-
- Ucontrol = 0;
- if (aind < anum) {
- Ucontrol |= 0x00000001;
- } else {
- if (f1open) {
- anum = DO_STDIO_READ(ifd1, aq, UARTBUF);
- }
- if (anum > 0) {
- Ucontrol |= 0x00000001;
- aind = 0;
- mec_irq(4);
- }
- }
- if (bind < bnum) {
- Ucontrol |= 0x00010000;
- } else {
- if (f2open) {
- bnum = DO_STDIO_READ(ifd2, bq, UARTBUF);
- }
- if (bnum > 0) {
- Ucontrol |= 0x00010000;
- bind = 0;
- mec_irq(5);
- }
- }
-
- Ucontrol |= 0x00060006;
- return (Ucontrol);
-#else
- return (uart_stat_reg);
-#endif
-#else
- return(0x00060006);
-#endif
- break;
- default:
- if (sis_verbose)
- printf("Read from unimplemented MEC register (%x)\n", addr);
-
- }
- return (0);
-}
-
-static void
-write_uart(addr, data)
- uint32 addr;
- uint32 data;
-{
- unsigned char c;
-
- c = (unsigned char) data;
- switch (addr & 0xff) {
-
- case 0xE0: /* UART A */
-#ifdef FAST_UART
- if (f1open) {
- if (wnuma < UARTBUF)
- wbufa[wnuma++] = c;
- else {
- while (wnuma)
- wnuma -= fwrite(wbufa, 1, wnuma, f1out);
- wbufa[wnuma++] = c;
- }
- }
- mec_irq(4);
-#else
- if (uart_stat_reg & UARTA_SRE) {
- uarta_sreg = c;
- uart_stat_reg &= ~UARTA_SRE;
- event(uarta_tx, 0, UART_TX_TIME);
- } else {
- uarta_hreg = c;
- uart_stat_reg &= ~UARTA_HRE;
- }
-#endif
- break;
-
- case 0xE4: /* UART B */
-#ifdef FAST_UART
- if (f2open) {
- if (wnumb < UARTBUF)
- wbufb[wnumb++] = c;
- else {
- while (wnumb)
- wnumb -= fwrite(wbufb, 1, wnumb, f2out);
- wbufb[wnumb++] = c;
- }
- }
- mec_irq(5);
-#else
- if (uart_stat_reg & UARTB_SRE) {
- uartb_sreg = c;
- uart_stat_reg &= ~UARTB_SRE;
- event(uartb_tx, 0, UART_TX_TIME);
- } else {
- uartb_hreg = c;
- uart_stat_reg &= ~UARTB_HRE;
- }
-#endif
- break;
- case 0xE8: /* UART status register */
-#ifndef FAST_UART
- if (data & UARTA_CLR) {
- uart_stat_reg &= 0xFFFF0000;
- uart_stat_reg |= UARTA_SRE | UARTA_HRE;
- }
- if (data & UARTB_CLR) {
- uart_stat_reg &= 0x0000FFFF;
- uart_stat_reg |= UARTB_SRE | UARTB_HRE;
- }
-#endif
- break;
- default:
- if (sis_verbose)
- printf("Write to unimplemented MEC register (%x)\n", addr);
-
- }
-}
-
-static void
-flush_uart()
-{
- while (wnuma && f1open)
- wnuma -= fwrite(wbufa, 1, wnuma, f1out);
- while (wnumb && f2open)
- wnumb -= fwrite(wbufb, 1, wnumb, f2out);
-}
-
-
-
-static void
-uarta_tx()
-{
-
- while (f1open && fwrite(&uarta_sreg, 1, 1, f1out) != 1);
- if (uart_stat_reg & UARTA_HRE) {
- uart_stat_reg |= UARTA_SRE;
- } else {
- uarta_sreg = uarta_hreg;
- uart_stat_reg |= UARTA_HRE;
- event(uarta_tx, 0, UART_TX_TIME);
- }
- mec_irq(4);
-}
-
-static void
-uartb_tx()
-{
- while (f2open && fwrite(&uartb_sreg, 1, 1, f2out) != 1);
- if (uart_stat_reg & UARTB_HRE) {
- uart_stat_reg |= UARTB_SRE;
- } else {
- uartb_sreg = uartb_hreg;
- uart_stat_reg |= UARTB_HRE;
- event(uartb_tx, 0, UART_TX_TIME);
- }
- mec_irq(5);
-}
-
-static void
-uart_rx(arg)
- caddr_t arg;
-{
- int32 rsize;
- char rxd;
-
-
- rsize = 0;
- if (f1open)
- rsize = DO_STDIO_READ(ifd1, &rxd, 1);
- if (rsize > 0) {
- uarta_data = UART_DR | rxd;
- if (uart_stat_reg & UARTA_HRE)
- uarta_data |= UART_THE;
- if (uart_stat_reg & UARTA_SRE)
- uarta_data |= UART_TSE;
- if (uart_stat_reg & UARTA_DR) {
- uart_stat_reg |= UARTA_OR;
- mec_irq(7); /* UART error interrupt */
- }
- uart_stat_reg |= UARTA_DR;
- mec_irq(4);
- }
- rsize = 0;
- if (f2open)
- rsize = DO_STDIO_READ(ifd2, &rxd, 1);
- if (rsize) {
- uartb_data = UART_DR | rxd;
- if (uart_stat_reg & UARTB_HRE)
- uartb_data |= UART_THE;
- if (uart_stat_reg & UARTB_SRE)
- uartb_data |= UART_TSE;
- if (uart_stat_reg & UARTB_DR) {
- uart_stat_reg |= UARTB_OR;
- mec_irq(7); /* UART error interrupt */
- }
- uart_stat_reg |= UARTB_DR;
- mec_irq(5);
- }
- event(uart_rx, 0, UART_RX_TIME);
-}
-
-static void
-uart_intr(arg)
- caddr_t arg;
-{
- read_uart(0xE8); /* Check for UART interrupts every 1000 clk */
- flush_uart(); /* Flush UART ports */
- event(uart_intr, 0, UART_FLUSH_TIME);
-}
-
-
-static void
-uart_irq_start()
-{
-#ifdef FAST_UART
- event(uart_intr, 0, UART_FLUSH_TIME);
-#else
-#ifndef _WIN32
- event(uart_rx, 0, UART_RX_TIME);
-#endif
-#endif
-}
-
-/* Watch-dog */
-
-static void
-wdog_intr(arg)
- caddr_t arg;
-{
- if (wdog_status == disabled) {
- wdog_status = stopped;
- } else {
-
- if (wdog_counter) {
- wdog_counter--;
- event(wdog_intr, 0, wdog_scaler + 1);
- } else {
- if (wdog_rston) {
- printf("Watchdog reset!\n");
- sys_reset();
- mec_ersr = 0xC000;
- } else {
- mec_irq(15);
- wdog_rston = 1;
- wdog_counter = wdog_rst_delay;
- event(wdog_intr, 0, wdog_scaler + 1);
- }
- }
- }
-}
-
-static void
-wdog_start()
-{
- event(wdog_intr, 0, wdog_scaler + 1);
- if (sis_verbose)
- printf("Watchdog started, scaler = %d, counter = %d\n",
- wdog_scaler, wdog_counter);
-}
-
-
-/* MEC timers */
-
-
-static void
-rtc_intr(arg)
- caddr_t arg;
-{
- if (rtc_counter == 0) {
-
- mec_irq(13);
- if (rtc_cr)
- rtc_counter = rtc_reload;
- else
- rtc_se = 0;
- } else
- rtc_counter -= 1;
- if (rtc_se) {
- event(rtc_intr, 0, rtc_scaler + 1);
- rtc_scaler_start = now();
- rtc_enabled = 1;
- } else {
- if (sis_verbose)
- printf("RTC stopped\n\r");
- rtc_enabled = 0;
- }
-}
-
-static void
-rtc_start()
-{
- if (sis_verbose)
- printf("RTC started (period %d)\n\r", rtc_scaler + 1);
- event(rtc_intr, 0, rtc_scaler + 1);
- rtc_scaler_start = now();
- rtc_enabled = 1;
-}
-
-static uint32
-rtc_counter_read()
-{
- return (rtc_counter);
-}
-
-static void
-rtc_scaler_set(val)
- uint32 val;
-{
- rtc_scaler = val & 0x0ff; /* eight-bit scaler only */
-}
-
-static void
-rtc_reload_set(val)
- uint32 val;
-{
- rtc_reload = val;
-}
-
-static void
-gpt_intr(arg)
- caddr_t arg;
-{
- if (gpt_counter == 0) {
- mec_irq(12);
- if (gpt_cr)
- gpt_counter = gpt_reload;
- else
- gpt_se = 0;
- } else
- gpt_counter -= 1;
- if (gpt_se) {
- event(gpt_intr, 0, gpt_scaler + 1);
- gpt_scaler_start = now();
- gpt_enabled = 1;
- } else {
- if (sis_verbose)
- printf("GPT stopped\n\r");
- gpt_enabled = 0;
- }
-}
-
-static void
-gpt_start()
-{
- if (sis_verbose)
- printf("GPT started (period %d)\n\r", gpt_scaler + 1);
- event(gpt_intr, 0, gpt_scaler + 1);
- gpt_scaler_start = now();
- gpt_enabled = 1;
-}
-
-static uint32
-gpt_counter_read()
-{
- return (gpt_counter);
-}
-
-static void
-gpt_scaler_set(val)
- uint32 val;
-{
- gpt_scaler = val & 0x0ffff; /* 16-bit scaler */
-}
-
-static void
-gpt_reload_set(val)
- uint32 val;
-{
- gpt_reload = val;
-}
-
-static void
-timer_ctrl(val)
- uint32 val;
-{
-
- rtc_cr = ((val & TCR_TCRCR) != 0);
- if (val & TCR_TCRCL) {
- rtc_counter = rtc_reload;
- }
- if (val & TCR_TCRSL) {
- }
- rtc_se = ((val & TCR_TCRSE) != 0);
- if (rtc_se && (rtc_enabled == 0))
- rtc_start();
-
- gpt_cr = (val & TCR_GACR);
- if (val & TCR_GACL) {
- gpt_counter = gpt_reload;
- }
- if (val & TCR_GACL) {
- }
- gpt_se = (val & TCR_GASE) >> 2;
- if (gpt_se && (gpt_enabled == 0))
- gpt_start();
-}
-
-
-/* Retrieve data from target memory. MEM points to location from which
- to read the data; DATA points to words where retrieved data will be
- stored in host byte order. SZ contains log(2) of the number of bytes
- to retrieve, and can be 0 (1 byte), 1 (one half-word), 2 (one word),
- or 3 (two words). */
-
-static void
-fetch_bytes (asi, mem, data, sz)
- int asi;
- unsigned char *mem;
- uint32 *data;
- int sz;
-{
- if (CURRENT_TARGET_BYTE_ORDER == BIG_ENDIAN
- || asi == 8 || asi == 9) {
- switch (sz) {
- case 3:
- data[1] = (((uint32) mem[7]) & 0xff) |
- ((((uint32) mem[6]) & 0xff) << 8) |
- ((((uint32) mem[5]) & 0xff) << 16) |
- ((((uint32) mem[4]) & 0xff) << 24);
- /* Fall through to 2 */
- case 2:
- data[0] = (((uint32) mem[3]) & 0xff) |
- ((((uint32) mem[2]) & 0xff) << 8) |
- ((((uint32) mem[1]) & 0xff) << 16) |
- ((((uint32) mem[0]) & 0xff) << 24);
- break;
- case 1:
- data[0] = (((uint32) mem[1]) & 0xff) |
- ((((uint32) mem[0]) & 0xff) << 8);
- break;
- case 0:
- data[0] = mem[0] & 0xff;
- break;
-
- }
- } else {
- switch (sz) {
- case 3:
- data[1] = ((((uint32) mem[7]) & 0xff) << 24) |
- ((((uint32) mem[6]) & 0xff) << 16) |
- ((((uint32) mem[5]) & 0xff) << 8) |
- (((uint32) mem[4]) & 0xff);
- /* Fall through to 4 */
- case 2:
- data[0] = ((((uint32) mem[3]) & 0xff) << 24) |
- ((((uint32) mem[2]) & 0xff) << 16) |
- ((((uint32) mem[1]) & 0xff) << 8) |
- (((uint32) mem[0]) & 0xff);
- break;
- case 1:
- data[0] = ((((uint32) mem[1]) & 0xff) << 8) |
- (((uint32) mem[0]) & 0xff);
- break;
- case 0:
- data[0] = mem[0] & 0xff;
- break;
- }
- }
-}
-
-
-/* Store data in target byte order. MEM points to location to store data;
- DATA points to words in host byte order to be stored. SZ contains log(2)
- of the number of bytes to retrieve, and can be 0 (1 byte), 1 (one half-word),
- 2 (one word), or 3 (two words). */
-
-static void
-store_bytes (mem, data, sz)
- unsigned char *mem;
- uint32 *data;
- int sz;
-{
- if (CURRENT_TARGET_BYTE_ORDER == LITTLE_ENDIAN) {
- switch (sz) {
- case 3:
- mem[7] = (data[1] >> 24) & 0xff;
- mem[6] = (data[1] >> 16) & 0xff;
- mem[5] = (data[1] >> 8) & 0xff;
- mem[4] = data[1] & 0xff;
- /* Fall through to 2 */
- case 2:
- mem[3] = (data[0] >> 24) & 0xff;
- mem[2] = (data[0] >> 16) & 0xff;
- /* Fall through to 1 */
- case 1:
- mem[1] = (data[0] >> 8) & 0xff;
- /* Fall through to 0 */
- case 0:
- mem[0] = data[0] & 0xff;
- break;
- }
- } else {
- switch (sz) {
- case 3:
- mem[7] = data[1] & 0xff;
- mem[6] = (data[1] >> 8) & 0xff;
- mem[5] = (data[1] >> 16) & 0xff;
- mem[4] = (data[1] >> 24) & 0xff;
- /* Fall through to 2 */
- case 2:
- mem[3] = data[0] & 0xff;
- mem[2] = (data[0] >> 8) & 0xff;
- mem[1] = (data[0] >> 16) & 0xff;
- mem[0] = (data[0] >> 24) & 0xff;
- break;
- case 1:
- mem[1] = data[0] & 0xff;
- mem[0] = (data[0] >> 8) & 0xff;
- break;
- case 0:
- mem[0] = data[0] & 0xff;
- break;
-
- }
- }
-}
-
-
-/* Memory emulation */
-
-int
-memory_read(asi, addr, data, sz, ws)
- int32 asi;
- uint32 addr;
- uint32 *data;
- int32 sz;
- int32 *ws;
-{
- int32 mexc;
-
-#ifdef ERRINJ
- if (errmec) {
- if (sis_verbose)
- printf("Inserted MEC error %d\n",errmec);
- set_sfsr(errmec, addr, asi, 1);
- if (errmec == 5) mecparerror();
- if (errmec == 6) iucomperr();
- errmec = 0;
- return(1);
- }
-#endif;
-
- if ((addr >= mem_ramstart) && (addr < (mem_ramstart + mem_ramsz))) {
- fetch_bytes (asi, &ramb[addr & mem_rammask], data, sz);
- *ws = mem_ramr_ws;
- return (0);
- } else if ((addr >= MEC_START) && (addr < MEC_END)) {
- mexc = mec_read(addr, asi, data);
- if (mexc) {
- set_sfsr(MEC_ACC, addr, asi, 1);
- *ws = MEM_EX_WS;
- } else {
- *ws = 0;
- }
- return (mexc);
-
-#ifdef ERA
-
- } else if (era) {
- if ((addr < 0x100000) ||
- ((addr>= 0x80000000) && (addr < 0x80100000))) {
- fetch_bytes (asi, &romb[addr & ROM_MASK], data, sz);
- *ws = 4;
- return (0);
- } else if ((addr >= 0x10000000) &&
- (addr < (0x10000000 + (512 << (mec_iocr & 0x0f)))) &&
- (mec_iocr & 0x10)) {
- *data = erareg;
- return (0);
- }
-
- } else if (addr < mem_romsz) {
- fetch_bytes (asi, &romb[addr], data, sz);
- *ws = mem_romr_ws;
- return (0);
-
-#else
- } else if (addr < mem_romsz) {
- fetch_bytes (asi, &romb[addr], data, sz);
- *ws = mem_romr_ws;
- return (0);
-#endif
-
- }
-
- printf("Memory exception at %x (illegal address)\n", addr);
- set_sfsr(UIMP_ACC, addr, asi, 1);
- *ws = MEM_EX_WS;
- return (1);
-}
-
-int
-memory_write(asi, addr, data, sz, ws)
- int32 asi;
- uint32 addr;
- uint32 *data;
- int32 sz;
- int32 *ws;
-{
- uint32 byte_addr;
- uint32 byte_mask;
- uint32 waddr;
- uint32 *ram;
- int32 mexc;
- int i;
- int wphit[2];
-
-#ifdef ERRINJ
- if (errmec) {
- if (sis_verbose)
- printf("Inserted MEC error %d\n",errmec);
- set_sfsr(errmec, addr, asi, 0);
- if (errmec == 5) mecparerror();
- if (errmec == 6) iucomperr();
- errmec = 0;
- return(1);
- }
-#endif;
-
- if ((addr >= mem_ramstart) && (addr < (mem_ramstart + mem_ramsz))) {
- if (mem_accprot) {
-
- waddr = (addr & 0x7fffff) >> 2;
- for (i = 0; i < 2; i++)
- wphit[i] =
- (((asi == 0xa) && (mec_wpr[i] & 1)) ||
- ((asi == 0xb) && (mec_wpr[i] & 2))) &&
- ((waddr >= mec_ssa[i]) && ((waddr | (sz == 3)) < mec_sea[i]));
-
- if (((mem_blockprot) && (wphit[0] || wphit[1])) ||
- ((!mem_blockprot) &&
- !((mec_wpr[0] && wphit[0]) || (mec_wpr[1] && wphit[1]))
- )) {
- if (sis_verbose)
- printf("Memory access protection error at 0x%08x\n", addr);
- set_sfsr(PROT_EXC, addr, asi, 0);
- *ws = MEM_EX_WS;
- return (1);
- }
- }
-
- store_bytes (&ramb[addr & mem_rammask], data, sz);
-
- switch (sz) {
- case 0:
- case 1:
- *ws = mem_ramw_ws + 3;
- break;
- case 2:
- *ws = mem_ramw_ws;
- break;
- case 3:
- *ws = 2 * mem_ramw_ws + STD_WS;
- break;
- }
- return (0);
- } else if ((addr >= MEC_START) && (addr < MEC_END)) {
- if ((sz != 2) || (asi != 0xb)) {
- set_sfsr(MEC_ACC, addr, asi, 0);
- *ws = MEM_EX_WS;
- return (1);
- }
- mexc = mec_write(addr, *data);
- if (mexc) {
- set_sfsr(MEC_ACC, addr, asi, 0);
- *ws = MEM_EX_WS;
- } else {
- *ws = 0;
- }
- return (mexc);
-
-#ifdef ERA
-
- } else if (era) {
- if ((erareg & 2) &&
- ((addr < 0x100000) || ((addr >= 0x80000000) && (addr < 0x80100000)))) {
- addr &= ROM_MASK;
- *ws = sz == 3 ? 8 : 4;
- store_bytes (&romb[addr], data, sz);
- return (0);
- } else if ((addr >= 0x10000000) &&
- (addr < (0x10000000 + (512 << (mec_iocr & 0x0f)))) &&
- (mec_iocr & 0x10)) {
- erareg = *data & 0x0e;
- return (0);
- }
-
- } else if ((addr < mem_romsz) && (mec_memcfg & 0x10000) && (wrp) &&
- (((mec_memcfg & 0x20000) && (sz > 1)) ||
- (!(mec_memcfg & 0x20000) && (sz == 0)))) {
-
- *ws = mem_romw_ws + 1;
- if (sz == 3)
- *ws += mem_romw_ws + STD_WS;
- store_bytes (&romb[addr], data, sz);
- return (0);
-
-#else
- } else if ((addr < mem_romsz) && (mec_memcfg & 0x10000) && (wrp) &&
- (((mec_memcfg & 0x20000) && (sz > 1)) ||
- (!(mec_memcfg & 0x20000) && (sz == 0)))) {
-
- *ws = mem_romw_ws + 1;
- if (sz == 3)
- *ws += mem_romw_ws + STD_WS;
- store_bytes (&romb[addr], data, sz);
- return (0);
-
-#endif
-
- }
-
- *ws = MEM_EX_WS;
- set_sfsr(UIMP_ACC, addr, asi, 0);
- return (1);
-}
-
-static unsigned char *
-get_mem_ptr(addr, size)
- uint32 addr;
- uint32 size;
-{
- if ((addr + size) < ROM_SZ) {
- return (&romb[addr]);
- } else if ((addr >= mem_ramstart) && ((addr + size) < mem_ramend)) {
- return (&ramb[addr & mem_rammask]);
- }
-
-#ifdef ERA
- else if ((era) && ((addr <0x100000) ||
- ((addr >= (unsigned) 0x80000000) && ((addr + size) < (unsigned) 0x80100000)))) {
- return (&romb[addr & ROM_MASK]);
- }
-#endif
-
- return ((char *) -1);
-}
-
-int
-sis_memory_write(addr, data, length)
- uint32 addr;
- char *data;
- uint32 length;
-{
- char *mem;
-
- if ((mem = get_mem_ptr(addr, length)) == ((char *) -1))
- return (0);
-
- memcpy(mem, data, length);
- return (length);
-}
-
-int
-sis_memory_read(addr, data, length)
- uint32 addr;
- char *data;
- uint32 length;
-{
- char *mem;
-
- if ((mem = get_mem_ptr(addr, length)) == ((char *) -1))
- return (0);
-
- memcpy(data, mem, length);
- return (length);
-}
diff --git a/sim/erc32/exec.c b/sim/erc32/exec.c
deleted file mode 100644
index 5f1fc0c00ab..00000000000
--- a/sim/erc32/exec.c
+++ /dev/null
@@ -1,2041 +0,0 @@
-/*
- * This file is part of SIS.
- *
- * SIS, SPARC instruction simulator V1.8 Copyright (C) 1995 Jiri Gaisler,
- * European Space Agency
- *
- * This program is free software; you can redistribute it and/or modify it under
- * the terms of the GNU General Public License as published by the Free
- * Software Foundation; either version 2 of the License, or (at your option)
- * any later version.
- *
- * This program is distributed in the hope that it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc., 675
- * Mass Ave, Cambridge, MA 02139, USA.
- *
- */
-
-#include "sis.h"
-#include "end.h"
-#include <math.h>
-#include <stdio.h>
-
-extern int32 sis_verbose, sparclite;
-int ext_irl = 0;
-
-/* Load/store interlock delay */
-#define FLSTHOLD 1
-
-/* Load delay (delete if unwanted - speeds up simulation) */
-#define LOAD_DEL 1
-
-#define T_LD 2
-#define T_LDD 3
-#define T_ST 3
-#define T_STD 4
-#define T_LDST 4
-#define T_JMPL 2
-#define T_RETT 2
-
-#define FSR_QNE 0x2000
-#define FP_EXE_MODE 0
-#define FP_EXC_PE 1
-#define FP_EXC_MODE 2
-
-#define FBA 8
-#define FBN 0
-#define FBNE 1
-#define FBLG 2
-#define FBUL 3
-#define FBL 4
-#define FBUG 5
-#define FBG 6
-#define FBU 7
-#define FBA 8
-#define FBE 9
-#define FBUE 10
-#define FBGE 11
-#define FBUGE 12
-#define FBLE 13
-#define FBULE 14
-#define FBO 15
-
-#define FCC_E 0
-#define FCC_L 1
-#define FCC_G 2
-#define FCC_U 3
-
-#define PSR_ET 0x20
-#define PSR_EF 0x1000
-#define PSR_PS 0x40
-#define PSR_S 0x80
-#define PSR_N 0x0800000
-#define PSR_Z 0x0400000
-#define PSR_V 0x0200000
-#define PSR_C 0x0100000
-#define PSR_CC 0x0F00000
-#define PSR_CWP 0x7
-#define PSR_PIL 0x0f00
-
-#define ICC_N (icc >> 3)
-#define ICC_Z (icc >> 2)
-#define ICC_V (icc >> 1)
-#define ICC_C (icc)
-
-#define FP_PRES (sregs->fpu_pres)
-
-#define TRAP_IEXC 1
-#define TRAP_UNIMP 2
-#define TRAP_PRIVI 3
-#define TRAP_FPDIS 4
-#define TRAP_WOFL 5
-#define TRAP_WUFL 6
-#define TRAP_UNALI 7
-#define TRAP_FPEXC 8
-#define TRAP_DEXC 9
-#define TRAP_TAG 10
-#define TRAP_DIV0 0x2a
-
-#define FSR_TT 0x1C000
-#define FP_IEEE 0x04000
-#define FP_UNIMP 0x0C000
-#define FP_SEQ_ERR 0x10000
-
-#define BICC_BN 0
-#define BICC_BE 1
-#define BICC_BLE 2
-#define BICC_BL 3
-#define BICC_BLEU 4
-#define BICC_BCS 5
-#define BICC_NEG 6
-#define BICC_BVS 7
-#define BICC_BA 8
-#define BICC_BNE 9
-#define BICC_BG 10
-#define BICC_BGE 11
-#define BICC_BGU 12
-#define BICC_BCC 13
-#define BICC_POS 14
-#define BICC_BVC 15
-
-#define INST_SIMM13 0x1fff
-#define INST_RS2 0x1f
-#define INST_I 0x2000
-#define ADD 0x00
-#define ADDCC 0x10
-#define ADDX 0x08
-#define ADDXCC 0x18
-#define TADDCC 0x20
-#define TSUBCC 0x21
-#define TADDCCTV 0x22
-#define TSUBCCTV 0x23
-#define IAND 0x01
-#define IANDCC 0x11
-#define IANDN 0x05
-#define IANDNCC 0x15
-#define MULScc 0x24
-#define DIVScc 0x1D
-#define SMUL 0x0B
-#define SMULCC 0x1B
-#define UMUL 0x0A
-#define UMULCC 0x1A
-#define SDIV 0x0F
-#define SDIVCC 0x1F
-#define UDIV 0x0E
-#define UDIVCC 0x1E
-#define IOR 0x02
-#define IORCC 0x12
-#define IORN 0x06
-#define IORNCC 0x16
-#define SLL 0x25
-#define SRA 0x27
-#define SRL 0x26
-#define SUB 0x04
-#define SUBCC 0x14
-#define SUBX 0x0C
-#define SUBXCC 0x1C
-#define IXNOR 0x07
-#define IXNORCC 0x17
-#define IXOR 0x03
-#define IXORCC 0x13
-#define SETHI 0x04
-#define BICC 0x02
-#define FPBCC 0x06
-#define RDY 0x28
-#define RDPSR 0x29
-#define RDWIM 0x2A
-#define RDTBR 0x2B
-#define SCAN 0x2C
-#define WRY 0x30
-#define WRPSR 0x31
-#define WRWIM 0x32
-#define WRTBR 0x33
-#define JMPL 0x38
-#define RETT 0x39
-#define TICC 0x3A
-#define SAVE 0x3C
-#define RESTORE 0x3D
-#define LDD 0x03
-#define LDDA 0x13
-#define LD 0x00
-#define LDA 0x10
-#define LDF 0x20
-#define LDDF 0x23
-#define LDSTUB 0x0D
-#define LDSTUBA 0x1D
-#define LDUB 0x01
-#define LDUBA 0x11
-#define LDSB 0x09
-#define LDSBA 0x19
-#define LDUH 0x02
-#define LDUHA 0x12
-#define LDSH 0x0A
-#define LDSHA 0x1A
-#define LDFSR 0x21
-#define ST 0x04
-#define STA 0x14
-#define STB 0x05
-#define STBA 0x15
-#define STD 0x07
-#define STDA 0x17
-#define STF 0x24
-#define STDFQ 0x26
-#define STDF 0x27
-#define STFSR 0x25
-#define STH 0x06
-#define STHA 0x16
-#define SWAP 0x0F
-#define SWAPA 0x1F
-#define FLUSH 0x3B
-
-#define SIGN_BIT 0x80000000
-
-/* # of cycles overhead when a trap is taken */
-#define TRAP_C 3
-
-/* Forward declarations */
-
-static uint32 sub_cc PARAMS ((uint32 psr, int32 operand1, int32 operand2,
- int32 result));
-static uint32 add_cc PARAMS ((uint32 psr, int32 operand1, int32 operand2,
- int32 result));
-static void log_cc PARAMS ((int32 result, struct pstate *sregs));
-static int fpexec PARAMS ((uint32 op3, uint32 rd, uint32 rs1, uint32 rs2,
- struct pstate *sregs));
-static int chk_asi PARAMS ((struct pstate *sregs, uint32 *asi, uint32 op3));
-
-
-extern struct estate ebase;
-extern int32 nfp,ift;
-
-#ifdef ERRINJ
-extern uint32 errtt, errftt;
-#endif
-
-static uint32
-sub_cc(psr, operand1, operand2, result)
- uint32 psr;
- int32 operand1;
- int32 operand2;
- int32 result;
-{
- psr = ((psr & ~PSR_N) | ((result >> 8) & PSR_N));
- if (result)
- psr &= ~PSR_Z;
- else
- psr |= PSR_Z;
- psr = (psr & ~PSR_V) | ((((operand1 & ~operand2 & ~result) |
- (~operand1 & operand2 & result)) >> 10) & PSR_V);
- psr = (psr & ~PSR_C) | ((((~operand1 & operand2) |
- ((~operand1 | operand2) & result)) >> 11) & PSR_C);
- return (psr);
-}
-
-uint32
-add_cc(psr, operand1, operand2, result)
- uint32 psr;
- int32 operand1;
- int32 operand2;
- int32 result;
-{
- psr = ((psr & ~PSR_N) | ((result >> 8) & PSR_N));
- if (result)
- psr &= ~PSR_Z;
- else
- psr |= PSR_Z;
- psr = (psr & ~PSR_V) | ((((operand1 & operand2 & ~result) |
- (~operand1 & ~operand2 & result)) >> 10) & PSR_V);
- psr = (psr & ~PSR_C) | ((((operand1 & operand2) |
- ((operand1 | operand2) & ~result)) >> 11) & PSR_C);
- return(psr);
-}
-
-static void
-log_cc(result, sregs)
- int32 result;
- struct pstate *sregs;
-{
- sregs->psr &= ~(PSR_CC); /* Zero CC bits */
- sregs->psr = (sregs->psr | ((result >> 8) & PSR_N));
- if (result == 0)
- sregs->psr |= PSR_Z;
-}
-
-/* Add two unsigned 32-bit integers, and calculate the carry out. */
-
-static uint32
-add32 (uint32 n1, uint32 n2, int *carry)
-{
- uint32 result = n1 + n2;
-
- *carry = result < n1 || result < n1;
- return(result);
-}
-
-/* Multiply two 32-bit integers. */
-
-static void
-mul64 (uint32 n1, uint32 n2, uint32 *result_hi, uint32 *result_lo, int msigned)
-{
- uint32 lo, mid1, mid2, hi, reg_lo, reg_hi;
- int carry;
- int sign = 0;
-
- /* If this is a signed multiply, calculate the sign of the result
- and make the operands positive. */
- if (msigned)
- {
- sign = (n1 ^ n2) & SIGN_BIT;
- if (n1 & SIGN_BIT)
- n1 = -n1;
- if (n2 & SIGN_BIT)
- n2 = -n2;
-
- }
-
- /* We can split the 32x32 into four 16x16 operations. This ensures
- that we do not lose precision on 32bit only hosts: */
- lo = ((n1 & 0xFFFF) * (n2 & 0xFFFF));
- mid1 = ((n1 & 0xFFFF) * ((n2 >> 16) & 0xFFFF));
- mid2 = (((n1 >> 16) & 0xFFFF) * (n2 & 0xFFFF));
- hi = (((n1 >> 16) & 0xFFFF) * ((n2 >> 16) & 0xFFFF));
-
- /* We now need to add all of these results together, taking care
- to propogate the carries from the additions: */
- reg_lo = add32 (lo, (mid1 << 16), &carry);
- reg_hi = carry;
- reg_lo = add32 (reg_lo, (mid2 << 16), &carry);
- reg_hi += (carry + ((mid1 >> 16) & 0xFFFF) + ((mid2 >> 16) & 0xFFFF) + hi);
-
- /* Negate result if necessary. */
- if (sign)
- {
- reg_hi = ~ reg_hi;
- reg_lo = - reg_lo;
- if (reg_lo == 0)
- reg_hi++;
- }
-
- *result_lo = reg_lo;
- *result_hi = reg_hi;
-}
-
-
-/* Divide a 64-bit integer by a 32-bit integer. We cheat and assume
- that the host compiler supports long long operations. */
-
-static void
-div64 (uint32 n1_hi, uint32 n1_low, uint32 n2, uint32 *result, int msigned)
-{
- uint64 n1;
-
- n1 = ((uint64) n1_hi) << 32;
- n1 |= ((uint64) n1_low) & 0xffffffff;
-
- if (msigned)
- {
- int64 n1_s = (int64) n1;
- int32 n2_s = (int32) n2;
- n1_s = n1_s / n2_s;
- n1 = (uint64) n1_s;
- }
- else
- n1 = n1 / n2;
-
- *result = (uint32) (n1 & 0xffffffff);
-}
-
-
-int
-dispatch_instruction(sregs)
- struct pstate *sregs;
-{
-
- uint32 cwp, op, op2, op3, asi, rd, cond, rs1,
- rs2;
- uint32 ldep, icc;
- int32 operand1, operand2, *rdd, result, eicc,
- new_cwp;
- int32 pc, npc, data, address, ws, mexc, fcc;
- int32 ddata[2];
-
- sregs->ninst++;
- cwp = ((sregs->psr & PSR_CWP) << 4);
- op = sregs->inst >> 30;
- pc = sregs->npc;
- npc = sregs->npc + 4;
- op3 = rd = rs1 = operand2 = eicc = 0;
- rdd = 0;
- if (op & 2) {
-
- op3 = (sregs->inst >> 19) & 0x3f;
- rs1 = (sregs->inst >> 14) & 0x1f;
- rd = (sregs->inst >> 25) & 0x1f;
-
-#ifdef LOAD_DEL
-
- /* Check if load dependecy is possible */
- if (ebase.simtime <= sregs->ildtime)
- ldep = (((op3 & 0x38) != 0x28) && ((op3 & 0x3e) != 0x34) && (sregs->ildreg != 0));
- else
- ldep = 0;
- if (sregs->inst & INST_I) {
- if (ldep && (sregs->ildreg == rs1))
- sregs->hold++;
- operand2 = sregs->inst;
- operand2 = ((operand2 << 19) >> 19); /* sign extend */
- } else {
- rs2 = sregs->inst & INST_RS2;
- if (rs2 > 7)
- operand2 = sregs->r[(cwp + rs2) & 0x7f];
- else
- operand2 = sregs->g[rs2];
- if (ldep && ((sregs->ildreg == rs1) || (sregs->ildreg == rs2)))
- sregs->hold++;
- }
-#else
- if (sregs->inst & INST_I) {
- operand2 = sregs->inst;
- operand2 = ((operand2 << 19) >> 19); /* sign extend */
- } else {
- rs2 = sregs->inst & INST_RS2;
- if (rs2 > 7)
- operand2 = sregs->r[(cwp + rs2) & 0x7f];
- else
- operand2 = sregs->g[rs2];
- }
-#endif
-
- if (rd > 7)
- rdd = &(sregs->r[(cwp + rd) & 0x7f]);
- else
- rdd = &(sregs->g[rd]);
- if (rs1 > 7)
- rs1 = sregs->r[(cwp + rs1) & 0x7f];
- else
- rs1 = sregs->g[rs1];
- }
- switch (op) {
- case 0:
- op2 = (sregs->inst >> 22) & 0x7;
- switch (op2) {
- case SETHI:
- rd = (sregs->inst >> 25) & 0x1f;
- if (rd > 7)
- rdd = &(sregs->r[(cwp + rd) & 0x7f]);
- else
- rdd = &(sregs->g[rd]);
- *rdd = sregs->inst << 10;
- break;
- case BICC:
-#ifdef STAT
- sregs->nbranch++;
-#endif
- icc = sregs->psr >> 20;
- cond = ((sregs->inst >> 25) & 0x0f);
- switch (cond) {
- case BICC_BN:
- eicc = 0;
- break;
- case BICC_BE:
- eicc = ICC_Z;
- break;
- case BICC_BLE:
- eicc = ICC_Z | (ICC_N ^ ICC_V);
- break;
- case BICC_BL:
- eicc = (ICC_N ^ ICC_V);
- break;
- case BICC_BLEU:
- eicc = ICC_C | ICC_Z;
- break;
- case BICC_BCS:
- eicc = ICC_C;
- break;
- case BICC_NEG:
- eicc = ICC_N;
- break;
- case BICC_BVS:
- eicc = ICC_V;
- break;
- case BICC_BA:
- eicc = 1;
- if (sregs->inst & 0x20000000)
- sregs->annul = 1;
- break;
- case BICC_BNE:
- eicc = ~(ICC_Z);
- break;
- case BICC_BG:
- eicc = ~(ICC_Z | (ICC_N ^ ICC_V));
- break;
- case BICC_BGE:
- eicc = ~(ICC_N ^ ICC_V);
- break;
- case BICC_BGU:
- eicc = ~(ICC_C | ICC_Z);
- break;
- case BICC_BCC:
- eicc = ~(ICC_C);
- break;
- case BICC_POS:
- eicc = ~(ICC_N);
- break;
- case BICC_BVC:
- eicc = ~(ICC_V);
- break;
- }
- if (eicc & 1) {
- operand1 = sregs->inst;
- operand1 = ((operand1 << 10) >> 8); /* sign extend */
- npc = sregs->pc + operand1;
- } else {
- if (sregs->inst & 0x20000000)
- sregs->annul = 1;
- }
- break;
- case FPBCC:
-#ifdef STAT
- sregs->nbranch++;
-#endif
- if (!((sregs->psr & PSR_EF) && FP_PRES)) {
- sregs->trap = TRAP_FPDIS;
- break;
- }
- if (ebase.simtime < sregs->ftime) {
- sregs->ftime = ebase.simtime + sregs->hold;
- }
- cond = ((sregs->inst >> 25) & 0x0f);
- fcc = (sregs->fsr >> 10) & 0x3;
- switch (cond) {
- case FBN:
- eicc = 0;
- break;
- case FBNE:
- eicc = (fcc != FCC_E);
- break;
- case FBLG:
- eicc = (fcc == FCC_L) || (fcc == FCC_G);
- break;
- case FBUL:
- eicc = (fcc == FCC_L) || (fcc == FCC_U);
- break;
- case FBL:
- eicc = (fcc == FCC_L);
- break;
- case FBUG:
- eicc = (fcc == FCC_G) || (fcc == FCC_U);
- break;
- case FBG:
- eicc = (fcc == FCC_G);
- break;
- case FBU:
- eicc = (fcc == FCC_U);
- break;
- case FBA:
- eicc = 1;
- if (sregs->inst & 0x20000000)
- sregs->annul = 1;
- break;
- case FBE:
- eicc = !(fcc != FCC_E);
- break;
- case FBUE:
- eicc = !((fcc == FCC_L) || (fcc == FCC_G));
- break;
- case FBGE:
- eicc = !((fcc == FCC_L) || (fcc == FCC_U));
- break;
- case FBUGE:
- eicc = !(fcc == FCC_L);
- break;
- case FBLE:
- eicc = !((fcc == FCC_G) || (fcc == FCC_U));
- break;
- case FBULE:
- eicc = !(fcc == FCC_G);
- break;
- case FBO:
- eicc = !(fcc == FCC_U);
- break;
- }
- if (eicc) {
- operand1 = sregs->inst;
- operand1 = ((operand1 << 10) >> 8); /* sign extend */
- npc = sregs->pc + operand1;
- } else {
- if (sregs->inst & 0x20000000)
- sregs->annul = 1;
- }
- break;
-
- default:
- sregs->trap = TRAP_UNIMP;
- break;
- }
- break;
- case 1: /* CALL */
-#ifdef STAT
- sregs->nbranch++;
-#endif
- sregs->r[(cwp + 15) & 0x7f] = sregs->pc;
- npc = sregs->pc + (sregs->inst << 2);
- break;
-
- case 2:
- if ((op3 >> 1) == 0x1a) {
- if (!((sregs->psr & PSR_EF) && FP_PRES)) {
- sregs->trap = TRAP_FPDIS;
- } else {
- rs1 = (sregs->inst >> 14) & 0x1f;
- rs2 = sregs->inst & 0x1f;
- sregs->trap = fpexec(op3, rd, rs1, rs2, sregs);
- }
- } else {
-
- switch (op3) {
- case TICC:
- icc = sregs->psr >> 20;
- cond = ((sregs->inst >> 25) & 0x0f);
- switch (cond) {
- case BICC_BN:
- eicc = 0;
- break;
- case BICC_BE:
- eicc = ICC_Z;
- break;
- case BICC_BLE:
- eicc = ICC_Z | (ICC_N ^ ICC_V);
- break;
- case BICC_BL:
- eicc = (ICC_N ^ ICC_V);
- break;
- case BICC_BLEU:
- eicc = ICC_C | ICC_Z;
- break;
- case BICC_BCS:
- eicc = ICC_C;
- break;
- case BICC_NEG:
- eicc = ICC_N;
- break;
- case BICC_BVS:
- eicc = ICC_V;
- break;
- case BICC_BA:
- eicc = 1;
- break;
- case BICC_BNE:
- eicc = ~(ICC_Z);
- break;
- case BICC_BG:
- eicc = ~(ICC_Z | (ICC_N ^ ICC_V));
- break;
- case BICC_BGE:
- eicc = ~(ICC_N ^ ICC_V);
- break;
- case BICC_BGU:
- eicc = ~(ICC_C | ICC_Z);
- break;
- case BICC_BCC:
- eicc = ~(ICC_C);
- break;
- case BICC_POS:
- eicc = ~(ICC_N);
- break;
- case BICC_BVC:
- eicc = ~(ICC_V);
- break;
- }
- if (eicc & 1) {
- sregs->trap = (0x80 | ((rs1 + operand2) & 0x7f));
- }
- break;
-
- case MULScc:
- operand1 =
- (((sregs->psr & PSR_V) ^ ((sregs->psr & PSR_N) >> 2))
- << 10) | (rs1 >> 1);
- if ((sregs->y & 1) == 0)
- operand2 = 0;
- *rdd = operand1 + operand2;
- sregs->y = (rs1 << 31) | (sregs->y >> 1);
- sregs->psr = add_cc(sregs->psr, operand1, operand2, *rdd);
- break;
- case DIVScc:
- {
- int sign;
- uint32 result, remainder;
- int c0, y31;
-
- if (!sparclite) {
- sregs->trap = TRAP_UNIMP;
- break;
- }
-
- sign = ((sregs->psr & PSR_V) != 0) ^ ((sregs->psr & PSR_N) != 0);
-
- remainder = (sregs->y << 1) | (rs1 >> 31);
-
- /* If true sign is positive, calculate remainder - divisor.
- Otherwise, calculate remainder + divisor. */
- if (sign == 0)
- operand2 = ~operand2 + 1;
- result = remainder + operand2;
-
- /* The SPARClite User's Manual is not clear on how
- the "carry out" of the above ALU operation is to
- be calculated. From trial and error tests
- on the the chip itself, it appears that it is
- a normal addition carry, and not a subtraction borrow,
- even in cases where the divisor is subtracted
- from the remainder. FIXME: get the true story
- from Fujitsu. */
- c0 = result < (uint32) remainder
- || result < (uint32) operand2;
-
- if (result & 0x80000000)
- sregs->psr |= PSR_N;
- else
- sregs->psr &= ~PSR_N;
-
- y31 = (sregs->y & 0x80000000) == 0x80000000;
-
- if (result == 0 && sign == y31)
- sregs->psr |= PSR_Z;
- else
- sregs->psr &= ~PSR_Z;
-
- sign = (sign && !y31) || (!c0 && (sign || !y31));
-
- if (sign ^ (result >> 31))
- sregs->psr |= PSR_V;
- else
- sregs->psr &= ~PSR_V;
-
- if (!sign)
- sregs->psr |= PSR_C;
- else
- sregs->psr &= ~PSR_C;
-
- sregs->y = result;
-
- if (rd != 0)
- *rdd = (rs1 << 1) | !sign;
- }
- break;
- case SMUL:
- {
- mul64 (rs1, operand2, &sregs->y, rdd, 1);
- }
- break;
- case SMULCC:
- {
- uint32 result;
-
- mul64 (rs1, operand2, &sregs->y, &result, 1);
-
- if (result & 0x80000000)
- sregs->psr |= PSR_N;
- else
- sregs->psr &= ~PSR_N;
-
- if (result == 0)
- sregs->psr |= PSR_Z;
- else
- sregs->psr &= ~PSR_Z;
-
- *rdd = result;
- }
- break;
- case UMUL:
- {
- mul64 (rs1, operand2, &sregs->y, rdd, 0);
- }
- break;
- case UMULCC:
- {
- uint32 result;
-
- mul64 (rs1, operand2, &sregs->y, &result, 0);
-
- if (result & 0x80000000)
- sregs->psr |= PSR_N;
- else
- sregs->psr &= ~PSR_N;
-
- if (result == 0)
- sregs->psr |= PSR_Z;
- else
- sregs->psr &= ~PSR_Z;
-
- *rdd = result;
- }
- break;
- case SDIV:
- {
- if (sparclite) {
- sregs->trap = TRAP_UNIMP;
- break;
- }
-
- if (operand2 == 0) {
- sregs->trap = TRAP_DIV0;
- break;
- }
-
- div64 (sregs->y, rs1, operand2, rdd, 1);
- }
- break;
- case SDIVCC:
- {
- uint32 result;
-
- if (sparclite) {
- sregs->trap = TRAP_UNIMP;
- break;
- }
-
- if (operand2 == 0) {
- sregs->trap = TRAP_DIV0;
- break;
- }
-
- div64 (sregs->y, rs1, operand2, &result, 1);
-
- if (result & 0x80000000)
- sregs->psr |= PSR_N;
- else
- sregs->psr &= ~PSR_N;
-
- if (result == 0)
- sregs->psr |= PSR_Z;
- else
- sregs->psr &= ~PSR_Z;
-
- /* FIXME: should set overflow flag correctly. */
- sregs->psr &= ~(PSR_C | PSR_V);
-
- *rdd = result;
- }
- break;
- case UDIV:
- {
- if (sparclite) {
- sregs->trap = TRAP_UNIMP;
- break;
- }
-
- if (operand2 == 0) {
- sregs->trap = TRAP_DIV0;
- break;
- }
-
- div64 (sregs->y, rs1, operand2, rdd, 0);
- }
- break;
- case UDIVCC:
- {
- uint32 result;
-
- if (sparclite) {
- sregs->trap = TRAP_UNIMP;
- break;
- }
-
- if (operand2 == 0) {
- sregs->trap = TRAP_DIV0;
- break;
- }
-
- div64 (sregs->y, rs1, operand2, &result, 0);
-
- if (result & 0x80000000)
- sregs->psr |= PSR_N;
- else
- sregs->psr &= ~PSR_N;
-
- if (result == 0)
- sregs->psr |= PSR_Z;
- else
- sregs->psr &= ~PSR_Z;
-
- /* FIXME: should set overflow flag correctly. */
- sregs->psr &= ~(PSR_C | PSR_V);
-
- *rdd = result;
- }
- break;
- case IXNOR:
- *rdd = rs1 ^ ~operand2;
- break;
- case IXNORCC:
- *rdd = rs1 ^ ~operand2;
- log_cc(*rdd, sregs);
- break;
- case IXOR:
- *rdd = rs1 ^ operand2;
- break;
- case IXORCC:
- *rdd = rs1 ^ operand2;
- log_cc(*rdd, sregs);
- break;
- case IOR:
- *rdd = rs1 | operand2;
- break;
- case IORCC:
- *rdd = rs1 | operand2;
- log_cc(*rdd, sregs);
- break;
- case IORN:
- *rdd = rs1 | ~operand2;
- break;
- case IORNCC:
- *rdd = rs1 | ~operand2;
- log_cc(*rdd, sregs);
- break;
- case IANDNCC:
- *rdd = rs1 & ~operand2;
- log_cc(*rdd, sregs);
- break;
- case IANDN:
- *rdd = rs1 & ~operand2;
- break;
- case IAND:
- *rdd = rs1 & operand2;
- break;
- case IANDCC:
- *rdd = rs1 & operand2;
- log_cc(*rdd, sregs);
- break;
- case SUB:
- *rdd = rs1 - operand2;
- break;
- case SUBCC:
- *rdd = rs1 - operand2;
- sregs->psr = sub_cc(sregs->psr, rs1, operand2, *rdd);
- break;
- case SUBX:
- *rdd = rs1 - operand2 - ((sregs->psr >> 20) & 1);
- break;
- case SUBXCC:
- *rdd = rs1 - operand2 - ((sregs->psr >> 20) & 1);
- sregs->psr = sub_cc(sregs->psr, rs1, operand2, *rdd);
- break;
- case ADD:
- *rdd = rs1 + operand2;
- break;
- case ADDCC:
- *rdd = rs1 + operand2;
- sregs->psr = add_cc(sregs->psr, rs1, operand2, *rdd);
- break;
- case ADDX:
- *rdd = rs1 + operand2 + ((sregs->psr >> 20) & 1);
- break;
- case ADDXCC:
- *rdd = rs1 + operand2 + ((sregs->psr >> 20) & 1);
- sregs->psr = add_cc(sregs->psr, rs1, operand2, *rdd);
- break;
- case TADDCC:
- *rdd = rs1 + operand2;
- sregs->psr = add_cc(sregs->psr, rs1, operand2, *rdd);
- if ((rs1 | operand2) & 0x3)
- sregs->psr |= PSR_V;
- break;
- case TSUBCC:
- *rdd = rs1 - operand2;
- sregs->psr = sub_cc (sregs->psr, rs1, operand2, *rdd);
- if ((rs1 | operand2) & 0x3)
- sregs->psr |= PSR_V;
- break;
- case TADDCCTV:
- *rdd = rs1 + operand2;
- result = add_cc(0, rs1, operand2, *rdd);
- if ((rs1 | operand2) & 0x3)
- result |= PSR_V;
- if (result & PSR_V) {
- sregs->trap = TRAP_TAG;
- } else {
- sregs->psr = (sregs->psr & ~PSR_CC) | result;
- }
- break;
- case TSUBCCTV:
- *rdd = rs1 - operand2;
- result = add_cc (0, rs1, operand2, *rdd);
- if ((rs1 | operand2) & 0x3)
- result |= PSR_V;
- if (result & PSR_V)
- {
- sregs->trap = TRAP_TAG;
- }
- else
- {
- sregs->psr = (sregs->psr & ~PSR_CC) | result;
- }
- break;
- case SLL:
- *rdd = rs1 << (operand2 & 0x1f);
- break;
- case SRL:
- *rdd = rs1 >> (operand2 & 0x1f);
- break;
- case SRA:
- *rdd = ((int) rs1) >> (operand2 & 0x1f);
- break;
- case FLUSH:
- if (ift) sregs->trap = TRAP_UNIMP;
- break;
- case SAVE:
- new_cwp = ((sregs->psr & PSR_CWP) - 1) & PSR_CWP;
- if (sregs->wim & (1 << new_cwp)) {
- sregs->trap = TRAP_WOFL;
- break;
- }
- if (rd > 7)
- rdd = &(sregs->r[((new_cwp << 4) + rd) & 0x7f]);
- *rdd = rs1 + operand2;
- sregs->psr = (sregs->psr & ~PSR_CWP) | new_cwp;
- break;
- case RESTORE:
-
- new_cwp = ((sregs->psr & PSR_CWP) + 1) & PSR_CWP;
- if (sregs->wim & (1 << new_cwp)) {
- sregs->trap = TRAP_WUFL;
- break;
- }
- if (rd > 7)
- rdd = &(sregs->r[((new_cwp << 4) + rd) & 0x7f]);
- *rdd = rs1 + operand2;
- sregs->psr = (sregs->psr & ~PSR_CWP) | new_cwp;
- break;
- case RDPSR:
- if (!(sregs->psr & PSR_S)) {
- sregs->trap = TRAP_PRIVI;
- break;
- }
- *rdd = sregs->psr;
- break;
- case RDY:
- if (!sparclite)
- *rdd = sregs->y;
- else {
- int rs1_is_asr = (sregs->inst >> 14) & 0x1f;
- if ( 0 == rs1_is_asr )
- *rdd = sregs->y;
- else if ( 17 == rs1_is_asr )
- *rdd = sregs->asr17;
- else {
- sregs->trap = TRAP_UNIMP;
- break;
- }
- }
- break;
- case RDWIM:
- if (!(sregs->psr & PSR_S)) {
- sregs->trap = TRAP_PRIVI;
- break;
- }
- *rdd = sregs->wim;
- break;
- case RDTBR:
- if (!(sregs->psr & PSR_S)) {
- sregs->trap = TRAP_PRIVI;
- break;
- }
- *rdd = sregs->tbr;
- break;
- case WRPSR:
- if ((sregs->psr & 0x1f) > 7) {
- sregs->trap = TRAP_UNIMP;
- break;
- }
- if (!(sregs->psr & PSR_S)) {
- sregs->trap = TRAP_PRIVI;
- break;
- }
- sregs->psr = (rs1 ^ operand2) & 0x00f03fff;
- break;
- case WRWIM:
- if (!(sregs->psr & PSR_S)) {
- sregs->trap = TRAP_PRIVI;
- break;
- }
- sregs->wim = (rs1 ^ operand2) & 0x0ff;
- break;
- case WRTBR:
- if (!(sregs->psr & PSR_S)) {
- sregs->trap = TRAP_PRIVI;
- break;
- }
- sregs->tbr = (sregs->tbr & 0x00000ff0) |
- ((rs1 ^ operand2) & 0xfffff000);
- break;
- case WRY:
- if (!sparclite)
- sregs->y = (rs1 ^ operand2);
- else {
- if ( 0 == rd )
- sregs->y = (rs1 ^ operand2);
- else if ( 17 == rd )
- sregs->asr17 = (rs1 ^ operand2);
- else {
- sregs->trap = TRAP_UNIMP;
- break;
- }
- }
- break;
- case JMPL:
-
-#ifdef STAT
- sregs->nbranch++;
-#endif
- sregs->icnt = T_JMPL; /* JMPL takes two cycles */
- if (rs1 & 0x3) {
- sregs->trap = TRAP_UNALI;
- break;
- }
- *rdd = sregs->pc;
- npc = rs1 + operand2;
- break;
- case RETT:
- address = rs1 + operand2;
- new_cwp = ((sregs->psr & PSR_CWP) + 1) & PSR_CWP;
- sregs->icnt = T_RETT; /* RETT takes two cycles */
- if (sregs->psr & PSR_ET) {
- sregs->trap = TRAP_UNIMP;
- break;
- }
- if (!(sregs->psr & PSR_S)) {
- sregs->trap = TRAP_PRIVI;
- break;
- }
- if (sregs->wim & (1 << new_cwp)) {
- sregs->trap = TRAP_WUFL;
- break;
- }
- if (address & 0x3) {
- sregs->trap = TRAP_UNALI;
- break;
- }
- sregs->psr = (sregs->psr & ~PSR_CWP) | new_cwp | PSR_ET;
- sregs->psr =
- (sregs->psr & ~PSR_S) | ((sregs->psr & PSR_PS) << 1);
- npc = address;
- break;
-
- case SCAN:
- {
- uint32 result, mask;
- int i;
-
- if (!sparclite) {
- sregs->trap = TRAP_UNIMP;
- break;
- }
- mask = (operand2 & 0x80000000) | (operand2 >> 1);
- result = rs1 ^ mask;
-
- for (i = 0; i < 32; i++) {
- if (result & 0x80000000)
- break;
- result <<= 1;
- }
-
- *rdd = i == 32 ? 63 : i;
- }
- break;
-
- default:
- sregs->trap = TRAP_UNIMP;
- break;
- }
- }
- break;
- case 3: /* Load/store instructions */
-
- address = rs1 + operand2;
-
- if (sregs->psr & PSR_S)
- asi = 11;
- else
- asi = 10;
-
- if (op3 & 4) {
- sregs->icnt = T_ST; /* Set store instruction count */
-#ifdef STAT
- sregs->nstore++;
-#endif
- } else {
- sregs->icnt = T_LD; /* Set load instruction count */
-#ifdef STAT
- sregs->nload++;
-#endif
- }
-
- /* Decode load/store instructions */
-
- switch (op3) {
- case LDDA:
- if (!chk_asi(sregs, &asi, op3)) break;
- case LDD:
- if (address & 0x7) {
- sregs->trap = TRAP_UNALI;
- break;
- }
- if (rd & 1) {
- rd &= 0x1e;
- if (rd > 7)
- rdd = &(sregs->r[(cwp + rd) & 0x7f]);
- else
- rdd = &(sregs->g[rd]);
- }
- mexc = memory_read(asi, address, ddata, 3, &ws);
- sregs->hold += ws * 2;
- sregs->icnt = T_LDD;
- if (mexc) {
- sregs->trap = TRAP_DEXC;
- } else {
- rdd[0] = ddata[0];
- rdd[1] = ddata[1];
-#ifdef STAT
- sregs->nload++; /* Double load counts twice */
-#endif
- }
- break;
-
- case LDA:
- if (!chk_asi(sregs, &asi, op3)) break;
- case LD:
- if (address & 0x3) {
- sregs->trap = TRAP_UNALI;
- break;
- }
- mexc = memory_read(asi, address, &data, 2, &ws);
- sregs->hold += ws;
- if (mexc) {
- sregs->trap = TRAP_DEXC;
- } else {
- *rdd = data;
- }
- break;
- case LDSTUBA:
- if (!chk_asi(sregs, &asi, op3)) break;
- case LDSTUB:
- mexc = memory_read(asi, address, &data, 0, &ws);
- sregs->hold += ws;
- sregs->icnt = T_LDST;
- if (mexc) {
- sregs->trap = TRAP_DEXC;
- break;
- }
- *rdd = data;
- data = 0x0ff;
- mexc = memory_write(asi, address, &data, 0, &ws);
- sregs->hold += ws;
- if (mexc) {
- sregs->trap = TRAP_DEXC;
- }
-#ifdef STAT
- sregs->nload++;
-#endif
- break;
- case LDSBA:
- case LDUBA:
- if (!chk_asi(sregs, &asi, op3)) break;
- case LDSB:
- case LDUB:
- mexc = memory_read(asi, address, &data, 0, &ws);
- sregs->hold += ws;
- if (mexc) {
- sregs->trap = TRAP_DEXC;
- break;
- }
- if ((op3 == LDSB) && (data & 0x80))
- data |= 0xffffff00;
- *rdd = data;
- break;
- case LDSHA:
- case LDUHA:
- if (!chk_asi(sregs, &asi, op3)) break;
- case LDSH:
- case LDUH:
- if (address & 0x1) {
- sregs->trap = TRAP_UNALI;
- break;
- }
- mexc = memory_read(asi, address, &data, 1, &ws);
- sregs->hold += ws;
- if (mexc) {
- sregs->trap = TRAP_DEXC;
- break;
- }
- if ((op3 == LDSH) && (data & 0x8000))
- data |= 0xffff0000;
- *rdd = data;
- break;
- case LDF:
- if (!((sregs->psr & PSR_EF) && FP_PRES)) {
- sregs->trap = TRAP_FPDIS;
- break;
- }
- if (address & 0x3) {
- sregs->trap = TRAP_UNALI;
- break;
- }
- if (ebase.simtime < sregs->ftime) {
- if ((sregs->frd == rd) || (sregs->frs1 == rd) ||
- (sregs->frs2 == rd))
- sregs->fhold += (sregs->ftime - ebase.simtime);
- }
- mexc = memory_read(asi, address, &data, 2, &ws);
- sregs->hold += ws;
- sregs->flrd = rd;
- sregs->ltime = ebase.simtime + sregs->icnt + FLSTHOLD +
- sregs->hold + sregs->fhold;
- if (mexc) {
- sregs->trap = TRAP_DEXC;
- } else {
- sregs->fs[rd] = *((float32 *) & data);
- }
- break;
- case LDDF:
- if (!((sregs->psr & PSR_EF) && FP_PRES)) {
- sregs->trap = TRAP_FPDIS;
- break;
- }
- if (address & 0x7) {
- sregs->trap = TRAP_UNALI;
- break;
- }
- if (ebase.simtime < sregs->ftime) {
- if (((sregs->frd >> 1) == (rd >> 1)) ||
- ((sregs->frs1 >> 1) == (rd >> 1)) ||
- ((sregs->frs2 >> 1) == (rd >> 1)))
- sregs->fhold += (sregs->ftime - ebase.simtime);
- }
- mexc = memory_read(asi, address, ddata, 3, &ws);
- sregs->hold += ws * 2;
- sregs->icnt = T_LDD;
- if (mexc) {
- sregs->trap = TRAP_DEXC;
- } else {
- rd &= 0x1E;
- sregs->flrd = rd;
- sregs->fs[rd] = *((float32 *) & ddata[0]);
-#ifdef STAT
- sregs->nload++; /* Double load counts twice */
-#endif
- sregs->fs[rd + 1] = *((float32 *) & ddata[1]);
- sregs->ltime = ebase.simtime + sregs->icnt + FLSTHOLD +
- sregs->hold + sregs->fhold;
- }
- break;
- case LDFSR:
- if (ebase.simtime < sregs->ftime) {
- sregs->fhold += (sregs->ftime - ebase.simtime);
- }
- if (!((sregs->psr & PSR_EF) && FP_PRES)) {
- sregs->trap = TRAP_FPDIS;
- break;
- }
- if (address & 0x3) {
- sregs->trap = TRAP_UNALI;
- break;
- }
- mexc = memory_read(asi, address, &data, 2, &ws);
- sregs->hold += ws;
- if (mexc) {
- sregs->trap = TRAP_DEXC;
- } else {
- sregs->fsr =
- (sregs->fsr & 0x7FF000) | (data & ~0x7FF000);
- set_fsr(sregs->fsr);
- }
- break;
- case STFSR:
- if (!((sregs->psr & PSR_EF) && FP_PRES)) {
- sregs->trap = TRAP_FPDIS;
- break;
- }
- if (address & 0x3) {
- sregs->trap = TRAP_UNALI;
- break;
- }
- if (ebase.simtime < sregs->ftime) {
- sregs->fhold += (sregs->ftime - ebase.simtime);
- }
- mexc = memory_write(asi, address, &sregs->fsr, 2, &ws);
- sregs->hold += ws;
- if (mexc) {
- sregs->trap = TRAP_DEXC;
- }
- break;
-
- case STA:
- if (!chk_asi(sregs, &asi, op3)) break;
- case ST:
- if (address & 0x3) {
- sregs->trap = TRAP_UNALI;
- break;
- }
- mexc = memory_write(asi, address, rdd, 2, &ws);
- sregs->hold += ws;
- if (mexc) {
- sregs->trap = TRAP_DEXC;
- }
- break;
- case STBA:
- if (!chk_asi(sregs, &asi, op3)) break;
- case STB:
- mexc = memory_write(asi, address, rdd, 0, &ws);
- sregs->hold += ws;
- if (mexc) {
- sregs->trap = TRAP_DEXC;
- }
- break;
- case STDA:
- if (!chk_asi(sregs, &asi, op3)) break;
- case STD:
- if (address & 0x7) {
- sregs->trap = TRAP_UNALI;
- break;
- }
- if (rd & 1) {
- rd &= 0x1e;
- if (rd > 7)
- rdd = &(sregs->r[(cwp + rd) & 0x7f]);
- else
- rdd = &(sregs->g[rd]);
- }
- mexc = memory_write(asi, address, rdd, 3, &ws);
- sregs->hold += ws;
- sregs->icnt = T_STD;
-#ifdef STAT
- sregs->nstore++; /* Double store counts twice */
-#endif
- if (mexc) {
- sregs->trap = TRAP_DEXC;
- break;
- }
- break;
- case STDFQ:
- if ((sregs->psr & 0x1f) > 7) {
- sregs->trap = TRAP_UNIMP;
- break;
- }
- if (!((sregs->psr & PSR_EF) && FP_PRES)) {
- sregs->trap = TRAP_FPDIS;
- break;
- }
- if (address & 0x7) {
- sregs->trap = TRAP_UNALI;
- break;
- }
- if (!(sregs->fsr & FSR_QNE)) {
- sregs->fsr = (sregs->fsr & ~FSR_TT) | FP_SEQ_ERR;
- break;
- }
- rdd = &(sregs->fpq[0]);
- mexc = memory_write(asi, address, rdd, 3, &ws);
- sregs->hold += ws;
- sregs->icnt = T_STD;
-#ifdef STAT
- sregs->nstore++; /* Double store counts twice */
-#endif
- if (mexc) {
- sregs->trap = TRAP_DEXC;
- break;
- } else {
- sregs->fsr &= ~FSR_QNE;
- sregs->fpstate = FP_EXE_MODE;
- }
- break;
- case STHA:
- if (!chk_asi(sregs, &asi, op3)) break;
- case STH:
- if (address & 0x1) {
- sregs->trap = TRAP_UNALI;
- break;
- }
- mexc = memory_write(asi, address, rdd, 1, &ws);
- sregs->hold += ws;
- if (mexc) {
- sregs->trap = TRAP_DEXC;
- }
- break;
- case STF:
- if (!((sregs->psr & PSR_EF) && FP_PRES)) {
- sregs->trap = TRAP_FPDIS;
- break;
- }
- if (address & 0x3) {
- sregs->trap = TRAP_UNALI;
- break;
- }
- if (ebase.simtime < sregs->ftime) {
- if (sregs->frd == rd)
- sregs->fhold += (sregs->ftime - ebase.simtime);
- }
- mexc = memory_write(asi, address, &sregs->fsi[rd], 2, &ws);
- sregs->hold += ws;
- if (mexc) {
- sregs->trap = TRAP_DEXC;
- }
- break;
- case STDF:
- if (!((sregs->psr & PSR_EF) && FP_PRES)) {
- sregs->trap = TRAP_FPDIS;
- break;
- }
- if (address & 0x7) {
- sregs->trap = TRAP_UNALI;
- break;
- }
- rd &= 0x1E;
- if (ebase.simtime < sregs->ftime) {
- if ((sregs->frd == rd) || (sregs->frd + 1 == rd))
- sregs->fhold += (sregs->ftime - ebase.simtime);
- }
- mexc = memory_write(asi, address, &sregs->fsi[rd], 3, &ws);
- sregs->hold += ws;
- sregs->icnt = T_STD;
-#ifdef STAT
- sregs->nstore++; /* Double store counts twice */
-#endif
- if (mexc) {
- sregs->trap = TRAP_DEXC;
- }
- break;
- case SWAPA:
- if (!chk_asi(sregs, &asi, op3)) break;
- case SWAP:
- if (address & 0x3) {
- sregs->trap = TRAP_UNALI;
- break;
- }
- mexc = memory_read(asi, address, &data, 2, &ws);
- sregs->hold += ws;
- if (mexc) {
- sregs->trap = TRAP_DEXC;
- break;
- }
- mexc = memory_write(asi, address, rdd, 2, &ws);
- sregs->hold += ws;
- sregs->icnt = T_LDST;
- if (mexc) {
- sregs->trap = TRAP_DEXC;
- break;
- } else
- *rdd = data;
-#ifdef STAT
- sregs->nload++;
-#endif
- break;
-
-
- default:
- sregs->trap = TRAP_UNIMP;
- break;
- }
-
-#ifdef LOAD_DEL
-
- if (!(op3 & 4)) {
- sregs->ildtime = ebase.simtime + sregs->hold + sregs->icnt;
- sregs->ildreg = rd;
- if ((op3 | 0x10) == 0x13)
- sregs->ildreg |= 1; /* Double load, odd register loaded
- * last */
- }
-#endif
- break;
-
- default:
- sregs->trap = TRAP_UNIMP;
- break;
- }
- sregs->g[0] = 0;
- if (!sregs->trap) {
- sregs->pc = pc;
- sregs->npc = npc;
- }
- return (0);
-}
-
-#define T_FABSs 2
-#define T_FADDs 4
-#define T_FADDd 4
-#define T_FCMPs 4
-#define T_FCMPd 4
-#define T_FDIVs 20
-#define T_FDIVd 35
-#define T_FMOVs 2
-#define T_FMULs 5
-#define T_FMULd 9
-#define T_FNEGs 2
-#define T_FSQRTs 37
-#define T_FSQRTd 65
-#define T_FSUBs 4
-#define T_FSUBd 4
-#define T_FdTOi 7
-#define T_FdTOs 3
-#define T_FiTOs 6
-#define T_FiTOd 6
-#define T_FsTOi 6
-#define T_FsTOd 2
-
-#define FABSs 0x09
-#define FADDs 0x41
-#define FADDd 0x42
-#define FCMPs 0x51
-#define FCMPd 0x52
-#define FCMPEs 0x55
-#define FCMPEd 0x56
-#define FDIVs 0x4D
-#define FDIVd 0x4E
-#define FMOVs 0x01
-#define FMULs 0x49
-#define FMULd 0x4A
-#define FNEGs 0x05
-#define FSQRTs 0x29
-#define FSQRTd 0x2A
-#define FSUBs 0x45
-#define FSUBd 0x46
-#define FdTOi 0xD2
-#define FdTOs 0xC6
-#define FiTOs 0xC4
-#define FiTOd 0xC8
-#define FsTOi 0xD1
-#define FsTOd 0xC9
-
-
-static int
-fpexec(op3, rd, rs1, rs2, sregs)
- uint32 op3, rd, rs1, rs2;
- struct pstate *sregs;
-{
- uint32 opf, tem, accex;
- int32 fcc;
- uint32 ldadj;
-
- if (sregs->fpstate == FP_EXC_MODE) {
- sregs->fsr = (sregs->fsr & ~FSR_TT) | FP_SEQ_ERR;
- sregs->fpstate = FP_EXC_PE;
- return (0);
- }
- if (sregs->fpstate == FP_EXC_PE) {
- sregs->fpstate = FP_EXC_MODE;
- return (TRAP_FPEXC);
- }
- opf = (sregs->inst >> 5) & 0x1ff;
-
- /*
- * Check if we already have an FPop in the pipe. If so, halt until it is
- * finished by incrementing fhold with the remaining execution time
- */
-
- if (ebase.simtime < sregs->ftime) {
- sregs->fhold = (sregs->ftime - ebase.simtime);
- } else {
- sregs->fhold = 0;
-
- /* Check load dependencies. */
-
- if (ebase.simtime < sregs->ltime) {
-
- /* Don't check rs1 if single operand instructions */
-
- if (((opf >> 6) == 0) || ((opf >> 6) == 3))
- rs1 = 32;
-
- /* Adjust for double floats */
-
- ldadj = opf & 1;
- if (!(((sregs->flrd - rs1) >> ldadj) && ((sregs->flrd - rs2) >> ldadj)))
- sregs->fhold++;
- }
- }
-
- sregs->finst++;
-
- sregs->frs1 = rs1; /* Store src and dst for dependecy check */
- sregs->frs2 = rs2;
- sregs->frd = rd;
-
- sregs->ftime = ebase.simtime + sregs->hold + sregs->fhold;
-
- /* SPARC is big-endian - swap double floats if host is little-endian */
- /* This is ugly - I know ... */
-
- /* FIXME: should use (CURRENT_HOST_BYTE_ORDER == CURRENT_TARGET_BYTE_ORDER)
- but what about machines where float values are different endianness
- from integer values? */
-
-#ifdef HOST_LITTLE_ENDIAN_FLOAT
- rs1 &= 0x1f;
- switch (opf) {
- case FADDd:
- case FDIVd:
- case FMULd:
- case FSQRTd:
- case FSUBd:
- case FCMPd:
- case FCMPEd:
- case FdTOi:
- case FdTOs:
- sregs->fdp[rs1 | 1] = sregs->fs[rs1 & ~1];
- sregs->fdp[rs1 & ~1] = sregs->fs[rs1 | 1];
- sregs->fdp[rs2 | 1] = sregs->fs[rs2 & ~1];
- sregs->fdp[rs2 & ~1] = sregs->fs[rs2 | 1];
- default:
- }
-#endif
-
- clear_accex();
-
- switch (opf) {
- case FABSs:
- sregs->fs[rd] = fabs(sregs->fs[rs2]);
- sregs->ftime += T_FABSs;
- sregs->frs1 = 32; /* rs1 ignored */
- break;
- case FADDs:
- sregs->fs[rd] = sregs->fs[rs1] + sregs->fs[rs2];
- sregs->ftime += T_FADDs;
- break;
- case FADDd:
- sregs->fd[rd >> 1] = sregs->fd[rs1 >> 1] + sregs->fd[rs2 >> 1];
- sregs->ftime += T_FADDd;
- break;
- case FCMPs:
- case FCMPEs:
- if (sregs->fs[rs1] == sregs->fs[rs2])
- fcc = 3;
- else if (sregs->fs[rs1] < sregs->fs[rs2])
- fcc = 2;
- else if (sregs->fs[rs1] > sregs->fs[rs2])
- fcc = 1;
- else
- fcc = 0;
- sregs->fsr |= 0x0C00;
- sregs->fsr &= ~(fcc << 10);
- sregs->ftime += T_FCMPs;
- sregs->frd = 32; /* rd ignored */
- if ((fcc == 0) && (opf == FCMPEs)) {
- sregs->fpstate = FP_EXC_PE;
- sregs->fsr = (sregs->fsr & ~0x1C000) | (1 << 14);
- }
- break;
- case FCMPd:
- case FCMPEd:
- if (sregs->fd[rs1 >> 1] == sregs->fd[rs2 >> 1])
- fcc = 3;
- else if (sregs->fd[rs1 >> 1] < sregs->fd[rs2 >> 1])
- fcc = 2;
- else if (sregs->fd[rs1 >> 1] > sregs->fd[rs2 >> 1])
- fcc = 1;
- else
- fcc = 0;
- sregs->fsr |= 0x0C00;
- sregs->fsr &= ~(fcc << 10);
- sregs->ftime += T_FCMPd;
- sregs->frd = 32; /* rd ignored */
- if ((fcc == 0) && (opf == FCMPEd)) {
- sregs->fpstate = FP_EXC_PE;
- sregs->fsr = (sregs->fsr & ~FSR_TT) | FP_IEEE;
- }
- break;
- case FDIVs:
- sregs->fs[rd] = sregs->fs[rs1] / sregs->fs[rs2];
- sregs->ftime += T_FDIVs;
- break;
- case FDIVd:
- sregs->fd[rd >> 1] = sregs->fd[rs1 >> 1] / sregs->fd[rs2 >> 1];
- sregs->ftime += T_FDIVd;
- break;
- case FMOVs:
- sregs->fs[rd] = sregs->fs[rs2];
- sregs->ftime += T_FMOVs;
- sregs->frs1 = 32; /* rs1 ignored */
- break;
- case FMULs:
- sregs->fs[rd] = sregs->fs[rs1] * sregs->fs[rs2];
- sregs->ftime += T_FMULs;
- break;
- case FMULd:
- sregs->fd[rd >> 1] = sregs->fd[rs1 >> 1] * sregs->fd[rs2 >> 1];
- sregs->ftime += T_FMULd;
- break;
- case FNEGs:
- sregs->fs[rd] = -sregs->fs[rs2];
- sregs->ftime += T_FNEGs;
- sregs->frs1 = 32; /* rs1 ignored */
- break;
- case FSQRTs:
- if (sregs->fs[rs2] < 0.0) {
- sregs->fpstate = FP_EXC_PE;
- sregs->fsr = (sregs->fsr & ~FSR_TT) | FP_IEEE;
- sregs->fsr = (sregs->fsr & 0x1f) | 0x10;
- break;
- }
- sregs->fs[rd] = sqrt(sregs->fs[rs2]);
- sregs->ftime += T_FSQRTs;
- sregs->frs1 = 32; /* rs1 ignored */
- break;
- case FSQRTd:
- if (sregs->fd[rs2 >> 1] < 0.0) {
- sregs->fpstate = FP_EXC_PE;
- sregs->fsr = (sregs->fsr & ~FSR_TT) | FP_IEEE;
- sregs->fsr = (sregs->fsr & 0x1f) | 0x10;
- break;
- }
- sregs->fd[rd >> 1] = sqrt(sregs->fd[rs2 >> 1]);
- sregs->ftime += T_FSQRTd;
- sregs->frs1 = 32; /* rs1 ignored */
- break;
- case FSUBs:
- sregs->fs[rd] = sregs->fs[rs1] - sregs->fs[rs2];
- sregs->ftime += T_FSUBs;
- break;
- case FSUBd:
- sregs->fd[rd >> 1] = sregs->fd[rs1 >> 1] - sregs->fd[rs2 >> 1];
- sregs->ftime += T_FSUBd;
- break;
- case FdTOi:
- sregs->fsi[rd] = (int) sregs->fd[rs2 >> 1];
- sregs->ftime += T_FdTOi;
- sregs->frs1 = 32; /* rs1 ignored */
- break;
- case FdTOs:
- sregs->fs[rd] = (float32) sregs->fd[rs2 >> 1];
- sregs->ftime += T_FdTOs;
- sregs->frs1 = 32; /* rs1 ignored */
- break;
- case FiTOs:
- sregs->fs[rd] = (float32) sregs->fsi[rs2];
- sregs->ftime += T_FiTOs;
- sregs->frs1 = 32; /* rs1 ignored */
- break;
- case FiTOd:
- sregs->fd[rd >> 1] = (float64) sregs->fsi[rs2];
- sregs->ftime += T_FiTOd;
- sregs->frs1 = 32; /* rs1 ignored */
- break;
- case FsTOi:
- sregs->fsi[rd] = (int) sregs->fs[rs2];
- sregs->ftime += T_FsTOi;
- sregs->frs1 = 32; /* rs1 ignored */
- break;
- case FsTOd:
- sregs->fd[rd >> 1] = sregs->fs[rs2];
- sregs->ftime += T_FsTOd;
- sregs->frs1 = 32; /* rs1 ignored */
- break;
-
- default:
- sregs->fsr = (sregs->fsr & ~FSR_TT) | FP_UNIMP;
- sregs->fpstate = FP_EXC_PE;
- }
-
-#ifdef ERRINJ
- if (errftt) {
- sregs->fsr = (sregs->fsr & ~FSR_TT) | (errftt << 14);
- sregs->fpstate = FP_EXC_PE;
- if (sis_verbose) printf("Inserted fpu error %X\n",errftt);
- errftt = 0;
- }
-#endif
-
- accex = get_accex();
-
-#ifdef HOST_LITTLE_ENDIAN_FLOAT
- switch (opf) {
- case FADDd:
- case FDIVd:
- case FMULd:
- case FSQRTd:
- case FSUBd:
- case FiTOd:
- case FsTOd:
- sregs->fs[rd & ~1] = sregs->fdp[rd | 1];
- sregs->fs[rd | 1] = sregs->fdp[rd & ~1];
- default:
- }
-#endif
- if (sregs->fpstate == FP_EXC_PE) {
- sregs->fpq[0] = sregs->pc;
- sregs->fpq[1] = sregs->inst;
- sregs->fsr |= FSR_QNE;
- } else {
- tem = (sregs->fsr >> 23) & 0x1f;
- if (tem & accex) {
- sregs->fpstate = FP_EXC_PE;
- sregs->fsr = (sregs->fsr & ~FSR_TT) | FP_IEEE;
- sregs->fsr = ((sregs->fsr & ~0x1f) | accex);
- } else {
- sregs->fsr = ((((sregs->fsr >> 5) | accex) << 5) | accex);
- }
- if (sregs->fpstate == FP_EXC_PE) {
- sregs->fpq[0] = sregs->pc;
- sregs->fpq[1] = sregs->inst;
- sregs->fsr |= FSR_QNE;
- }
- }
- clear_accex();
-
- return (0);
-
-
-}
-
-static int
-chk_asi(sregs, asi, op3)
- struct pstate *sregs;
- uint32 *asi, op3;
-
-{
- if (!(sregs->psr & PSR_S)) {
- sregs->trap = TRAP_PRIVI;
- return (0);
- } else if (sregs->inst & INST_I) {
- sregs->trap = TRAP_UNIMP;
- return (0);
- } else
- *asi = (sregs->inst >> 5) & 0x0ff;
- return(1);
-}
-
-int
-execute_trap(sregs)
- struct pstate *sregs;
-{
- int32 cwp;
-
- if (sregs->trap == 256) {
- sregs->pc = 0;
- sregs->npc = 4;
- sregs->trap = 0;
- } else if (sregs->trap == 257) {
- return (ERROR);
- } else {
-
- if ((sregs->psr & PSR_ET) == 0)
- return (ERROR);
-
- sregs->tbr = (sregs->tbr & 0xfffff000) | (sregs->trap << 4);
- sregs->trap = 0;
- sregs->psr &= ~PSR_ET;
- sregs->psr |= ((sregs->psr & PSR_S) >> 1);
- sregs->annul = 0;
- sregs->psr = (((sregs->psr & PSR_CWP) - 1) & 0x7) | (sregs->psr & ~PSR_CWP);
- cwp = ((sregs->psr & PSR_CWP) << 4);
- sregs->r[(cwp + 17) & 0x7f] = sregs->pc;
- sregs->r[(cwp + 18) & 0x7f] = sregs->npc;
- sregs->psr |= PSR_S;
- sregs->pc = sregs->tbr;
- sregs->npc = sregs->tbr + 4;
-
- if ( 0 != (1 & sregs->asr17) ) {
- /* single vector trapping! */
- sregs->pc = sregs->tbr & 0xfffff000;
- sregs->npc = sregs->pc + 4;
- }
-
- /* Increase simulator time */
- sregs->icnt = TRAP_C;
-
- }
-
-
- return (0);
-
-}
-
-extern struct irqcell irqarr[16];
-
-int
-check_interrupts(sregs)
- struct pstate *sregs;
-{
-#ifdef ERRINJ
- if (errtt) {
- sregs->trap = errtt;
- if (sis_verbose) printf("Inserted error trap 0x%02X\n",errtt);
- errtt = 0;
- }
-#endif
-
- if ((ext_irl) && (sregs->psr & PSR_ET) &&
- ((ext_irl == 15) || (ext_irl > (int) ((sregs->psr & PSR_PIL) >> 8)))) {
- if (sregs->trap == 0) {
- sregs->trap = 16 + ext_irl;
- irqarr[ext_irl & 0x0f].callback(irqarr[ext_irl & 0x0f].arg);
- return(1);
- }
- }
- return(0);
-}
-
-void
-init_regs(sregs)
- struct pstate *sregs;
-{
- sregs->pc = 0;
- sregs->npc = 4;
- sregs->trap = 0;
- sregs->psr &= 0x00f03fdf;
- sregs->psr |= 0x080; /* Set supervisor bit */
- sregs->breakpoint = 0;
- sregs->annul = 0;
- sregs->fpstate = FP_EXE_MODE;
- sregs->fpqn = 0;
- sregs->ftime = 0;
- sregs->ltime = 0;
- sregs->err_mode = 0;
- ext_irl = 0;
- sregs->g[0] = 0;
-#ifdef HOST_LITTLE_ENDIAN_FLOAT
- sregs->fdp = (float32 *) sregs->fd;
- sregs->fsi = (int32 *) sregs->fs;
-#else
- sregs->fs = (float32 *) sregs->fd;
- sregs->fsi = (int32 *) sregs->fd;
-#endif
- sregs->fsr = 0;
- sregs->fpu_pres = !nfp;
- set_fsr(sregs->fsr);
- sregs->bphit = 0;
- sregs->ildreg = 0;
- sregs->ildtime = 0;
-
- sregs->y = 0;
- sregs->asr17 = 0;
-
- sregs->rett_err = 0;
- sregs->jmpltime = 0;
-}
diff --git a/sim/erc32/float.c b/sim/erc32/float.c
deleted file mode 100644
index fe2f41e0f19..00000000000
--- a/sim/erc32/float.c
+++ /dev/null
@@ -1,212 +0,0 @@
-/*
- * This file is part of SIS.
- *
- * SIS, SPARC instruction simulator. Copyright (C) 1995 Jiri Gaisler, European
- * Space Agency
- *
- * This program is free software; you can redistribute it and/or modify it under
- * the terms of the GNU General Public License as published by the Free
- * Software Foundation; either version 2 of the License, or (at your option)
- * any later version.
- *
- * This program is distributed in the hope that it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc., 675
- * Mass Ave, Cambridge, MA 02139, USA.
- *
- *
- * This file implements the interface between the host and the simulated
- * FPU. IEEE trap handling is done as follows:
- * 1. In the host, all IEEE traps are masked
- * 2. After each simulated FPU instruction, check if any exception occured
- * by reading the exception bits from the host FPU status register
- * (get_accex()).
- * 3. Propagate any exceptions to the simulated FSR.
- * 4. Clear host exception bits
- *
- *
- * This can also be done using ieee_flags() library routine on sun.
- */
-
-#include "sis.h"
-
-/* Forward declarations */
-
-extern uint32 _get_sw PARAMS ((void));
-extern uint32 _get_cw PARAMS ((void));
-static void __setfpucw PARAMS ((unsigned short fpu_control));
-
-/* This host dependent routine should return the accrued exceptions */
-int
-get_accex()
-{
-#ifdef sparc
- return ((_get_fsr_raw() >> 5) & 0x1F);
-#elif i386
- uint32 accx;
-
- accx = _get_sw() & 0x3f;
- accx = ((accx & 1) << 4) | ((accx & 2) >> 1) | ((accx & 4) >> 1) |
- (accx & 8) | ((accx & 16) >> 2) | ((accx & 32) >> 5);
- return(accx);
-#else
- return(0);
-#warning no fpu trap support for this target
-#endif
-
-}
-
-/* How to clear the accrued exceptions */
-void
-clear_accex()
-{
-#ifdef sparc
- set_fsr((_get_fsr_raw() & ~0x3e0));
-#elif i386
- asm("
-.text
- fnclex
-
- ");
-#else
-#warning no fpu trap support for this target
-#endif
-}
-
-/* How to map SPARC FSR onto the host */
-void
-set_fsr(fsr)
-uint32 fsr;
-{
-#ifdef sparc
- _set_fsr_raw(fsr & ~0x0f800000);
-#elif i386
- void __setfpucw(unsigned short fpu_control);
- uint32 rawfsr;
-
- fsr >>= 30;
- switch (fsr) {
- case 0:
- case 2: break;
- case 1: fsr = 3;
- case 3: fsr = 1;
- }
- rawfsr = _get_cw();
- rawfsr |= (fsr << 10) | 0x3ff;
- __setfpucw(rawfsr);
-#else
-#warning no fpu trap support for this target
-#endif
-}
-
-
-/* Host dependent support functions */
-
-#ifdef sparc
-
- asm("
-
-.text
- .align 4
- .global __set_fsr_raw,_set_fsr_raw
-__set_fsr_raw:
-_set_fsr_raw:
- save %sp,-104,%sp
- st %i0,[%fp+68]
- ld [%fp+68], %fsr
- mov 0,%i0
- ret
- restore
-
- .align 4
- .global __get_fsr_raw
- .global _get_fsr_raw
-__get_fsr_raw:
-_get_fsr_raw:
- save %sp,-104,%sp
- st %fsr,[%fp+68]
- ld [%fp+68], %i0
- ret
- restore
-
- ");
-
-#elif i386
-
- asm("
-
-.text
- .align 8
-.globl _get_sw,__get_sw
-__get_sw:
-_get_sw:
- pushl %ebp
- movl %esp,%ebp
- movl $0,%eax
- fnstsw %ax
- movl %ebp,%esp
- popl %ebp
- ret
-
- .align 8
-.globl _get_cw,__get_cw
-__get_cw:
-_get_cw:
- pushl %ebp
- movl %esp,%ebp
- subw $2,%esp
- fnstcw -2(%ebp)
- movw -2(%ebp),%eax
- movl %ebp,%esp
- popl %ebp
- ret
-
-
- ");
-
-
-#else
-#warning no fpu trap support for this target
-#endif
-
-#if i386
-/* #if defined _WIN32 || defined __GO32__ */
-/* This is so floating exception handling works on NT
- These definitions are from the linux fpu_control.h, which
- doesn't exist on NT.
-
- default to:
- - extended precision
- - rounding to nearest
- - exceptions on overflow, zero divide and NaN
-*/
-#define _FPU_DEFAULT 0x1372
-#define _FPU_RESERVED 0xF0C0 /* Reserved bits in cw */
-
-static void
-__setfpucw(unsigned short fpu_control)
-{
- volatile unsigned short cw;
-
- /* If user supplied _fpu_control, use it ! */
- if (!fpu_control)
- {
- /* use defaults */
- fpu_control = _FPU_DEFAULT;
- }
- /* Get Control Word */
- __asm__ volatile ("fnstcw %0" : "=m" (cw) : );
-
- /* mask in */
- cw &= _FPU_RESERVED;
- cw = cw | (fpu_control & ~_FPU_RESERVED);
-
- /* set cw */
- __asm__ volatile ("fldcw %0" :: "m" (cw));
-}
-/* #endif */
-#endif
diff --git a/sim/erc32/func.c b/sim/erc32/func.c
deleted file mode 100644
index 7691e324283..00000000000
--- a/sim/erc32/func.c
+++ /dev/null
@@ -1,1162 +0,0 @@
-/*
- * func.c, misc simulator functions. This file is part of SIS.
- *
- * SIS, SPARC instruction simulator V1.8 Copyright (C) 1995 Jiri Gaisler,
- * European Space Agency
- *
- * This program is free software; you can redistribute it and/or modify it under
- * the terms of the GNU General Public License as published by the Free
- * Software Foundation; either version 2 of the License, or (at your option)
- * any later version.
- *
- * This program is distributed in the hope that it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc., 675
- * Mass Ave, Cambridge, MA 02139, USA.
- *
- */
-
-#include <signal.h>
-#include <string.h>
-#include <stdio.h>
-#include <stdlib.h>
-#include <ctype.h>
-#include "sis.h"
-#include "end.h"
-#include <dis-asm.h>
-#include "sim-config.h"
-
-
-#define VAL(x) strtoul(x,(char **)NULL,0)
-
-extern int current_target_byte_order;
-struct disassemble_info dinfo;
-struct pstate sregs;
-extern struct estate ebase;
-int ctrl_c = 0;
-int sis_verbose = 0;
-char *sis_version = "2.7.5";
-int nfp = 0;
-int ift = 0;
-int wrp = 0;
-int rom8 = 0;
-int uben = 0;
-int termsave;
-int sparclite = 0; /* emulating SPARClite instructions? */
-int sparclite_board = 0; /* emulating SPARClite board RAM? */
-char uart_dev1[128] = "";
-char uart_dev2[128] = "";
-extern int ext_irl;
-uint32 last_load_addr = 0;
-
-#ifdef ERRINJ
-uint32 errcnt = 0;
-uint32 errper = 0;
-uint32 errtt = 0;
-uint32 errftt = 0;
-uint32 errmec = 0;
-#endif
-
-/* Forward declarations */
-
-static int batch PARAMS ((struct pstate *sregs, char *fname));
-static void set_rega PARAMS ((struct pstate *sregs, char *reg, uint32 rval));
-static void disp_reg PARAMS ((struct pstate *sregs, char *reg));
-static uint32 limcalc PARAMS ((float32 freq));
-static void int_handler PARAMS ((int32 sig));
-static void init_event PARAMS ((void));
-static int disp_fpu PARAMS ((struct pstate *sregs));
-static void disp_regs PARAMS ((struct pstate *sregs, int cwp));
-static void disp_ctrl PARAMS ((struct pstate *sregs));
-static void disp_mem PARAMS ((uint32 addr, uint32 len));
-
-static int
-batch(sregs, fname)
- struct pstate *sregs;
- char *fname;
-{
- FILE *fp;
- char lbuf[1024];
-
- if ((fp = fopen(fname, "r")) == NULL) {
- fprintf(stderr, "couldn't open batch file %s\n", fname);
- return (0);
- }
- while (!feof(fp)) {
- lbuf[0] = 0;
- fgets(lbuf, 1023, fp);
- if ((strlen(lbuf) > 0) && (lbuf[strlen(lbuf) - 1] == '\n'))
- lbuf[strlen(lbuf) - 1] = 0;
- printf("sis> %s\n", lbuf);
- exec_cmd(sregs, lbuf);
- }
- fclose(fp);
- return (1);
-}
-
-void
-set_regi(sregs, reg, rval)
- struct pstate *sregs;
- int32 reg;
- uint32 rval;
-{
- uint32 cwp;
-
- cwp = ((sregs->psr & 0x7) << 4);
- if ((reg > 0) && (reg < 8)) {
- sregs->g[reg] = rval;
- } else if ((reg >= 8) && (reg < 32)) {
- sregs->r[(cwp + reg) & 0x7f] = rval;
- } else if ((reg >= 32) && (reg < 64)) {
- sregs->fsi[reg - 32] = rval;
- } else {
- switch (reg) {
- case 64:
- sregs->y = rval;
- break;
- case 65:
- sregs->psr = rval;
- break;
- case 66:
- sregs->wim = rval;
- break;
- case 67:
- sregs->tbr = rval;
- break;
- case 68:
- sregs->pc = rval;
- break;
- case 69:
- sregs->npc = rval;
- break;
- case 70:
- sregs->fsr = rval;
- set_fsr(rval);
- break;
- default:break;
- }
- }
-}
-
-void
-get_regi(struct pstate * sregs, int32 reg, char *buf)
-{
- uint32 cwp;
- uint32 rval = 0;
-
- cwp = ((sregs->psr & 0x7) << 4);
- if ((reg >= 0) && (reg < 8)) {
- rval = sregs->g[reg];
- } else if ((reg >= 8) && (reg < 32)) {
- rval = sregs->r[(cwp + reg) & 0x7f];
- } else if ((reg >= 32) && (reg < 64)) {
- rval = sregs->fsi[reg - 32];
- } else {
- switch (reg) {
- case 64:
- rval = sregs->y;
- break;
- case 65:
- rval = sregs->psr;
- break;
- case 66:
- rval = sregs->wim;
- break;
- case 67:
- rval = sregs->tbr;
- break;
- case 68:
- rval = sregs->pc;
- break;
- case 69:
- rval = sregs->npc;
- break;
- case 70:
- rval = sregs->fsr;
- break;
- default:break;
- }
- }
- if (current_target_byte_order == BIG_ENDIAN) {
- buf[0] = (rval >> 24) & 0x0ff;
- buf[1] = (rval >> 16) & 0x0ff;
- buf[2] = (rval >> 8) & 0x0ff;
- buf[3] = rval & 0x0ff;
- }
- else {
- buf[3] = (rval >> 24) & 0x0ff;
- buf[2] = (rval >> 16) & 0x0ff;
- buf[1] = (rval >> 8) & 0x0ff;
- buf[0] = rval & 0x0ff;
- }
-}
-
-
-static void
-set_rega(sregs, reg, rval)
- struct pstate *sregs;
- char *reg;
- uint32 rval;
-{
- uint32 cwp;
- int32 err = 0;
-
- cwp = ((sregs->psr & 0x7) << 4);
- if (strcmp(reg, "psr") == 0)
- sregs->psr = (rval = (rval & 0x00f03fff));
- else if (strcmp(reg, "tbr") == 0)
- sregs->tbr = (rval = (rval & 0xfffffff0));
- else if (strcmp(reg, "wim") == 0)
- sregs->wim = (rval = (rval & 0x0ff));
- else if (strcmp(reg, "y") == 0)
- sregs->y = rval;
- else if (strcmp(reg, "pc") == 0)
- sregs->pc = rval;
- else if (strcmp(reg, "npc") == 0)
- sregs->npc = rval;
- else if (strcmp(reg, "fsr") == 0) {
- sregs->fsr = rval;
- set_fsr(rval);
- } else if (strcmp(reg, "g0") == 0)
- err = 2;
- else if (strcmp(reg, "g1") == 0)
- sregs->g[1] = rval;
- else if (strcmp(reg, "g2") == 0)
- sregs->g[2] = rval;
- else if (strcmp(reg, "g3") == 0)
- sregs->g[3] = rval;
- else if (strcmp(reg, "g4") == 0)
- sregs->g[4] = rval;
- else if (strcmp(reg, "g5") == 0)
- sregs->g[5] = rval;
- else if (strcmp(reg, "g6") == 0)
- sregs->g[6] = rval;
- else if (strcmp(reg, "g7") == 0)
- sregs->g[7] = rval;
- else if (strcmp(reg, "o0") == 0)
- sregs->r[(cwp + 8) & 0x7f] = rval;
- else if (strcmp(reg, "o1") == 0)
- sregs->r[(cwp + 9) & 0x7f] = rval;
- else if (strcmp(reg, "o2") == 0)
- sregs->r[(cwp + 10) & 0x7f] = rval;
- else if (strcmp(reg, "o3") == 0)
- sregs->r[(cwp + 11) & 0x7f] = rval;
- else if (strcmp(reg, "o4") == 0)
- sregs->r[(cwp + 12) & 0x7f] = rval;
- else if (strcmp(reg, "o5") == 0)
- sregs->r[(cwp + 13) & 0x7f] = rval;
- else if (strcmp(reg, "o6") == 0)
- sregs->r[(cwp + 14) & 0x7f] = rval;
- else if (strcmp(reg, "o7") == 0)
- sregs->r[(cwp + 15) & 0x7f] = rval;
- else if (strcmp(reg, "l0") == 0)
- sregs->r[(cwp + 16) & 0x7f] = rval;
- else if (strcmp(reg, "l1") == 0)
- sregs->r[(cwp + 17) & 0x7f] = rval;
- else if (strcmp(reg, "l2") == 0)
- sregs->r[(cwp + 18) & 0x7f] = rval;
- else if (strcmp(reg, "l3") == 0)
- sregs->r[(cwp + 19) & 0x7f] = rval;
- else if (strcmp(reg, "l4") == 0)
- sregs->r[(cwp + 20) & 0x7f] = rval;
- else if (strcmp(reg, "l5") == 0)
- sregs->r[(cwp + 21) & 0x7f] = rval;
- else if (strcmp(reg, "l6") == 0)
- sregs->r[(cwp + 22) & 0x7f] = rval;
- else if (strcmp(reg, "l7") == 0)
- sregs->r[(cwp + 23) & 0x7f] = rval;
- else if (strcmp(reg, "i0") == 0)
- sregs->r[(cwp + 24) & 0x7f] = rval;
- else if (strcmp(reg, "i1") == 0)
- sregs->r[(cwp + 25) & 0x7f] = rval;
- else if (strcmp(reg, "i2") == 0)
- sregs->r[(cwp + 26) & 0x7f] = rval;
- else if (strcmp(reg, "i3") == 0)
- sregs->r[(cwp + 27) & 0x7f] = rval;
- else if (strcmp(reg, "i4") == 0)
- sregs->r[(cwp + 28) & 0x7f] = rval;
- else if (strcmp(reg, "i5") == 0)
- sregs->r[(cwp + 29) & 0x7f] = rval;
- else if (strcmp(reg, "i6") == 0)
- sregs->r[(cwp + 30) & 0x7f] = rval;
- else if (strcmp(reg, "i7") == 0)
- sregs->r[(cwp + 31) & 0x7f] = rval;
- else
- err = 1;
- switch (err) {
- case 0:
- printf("%s = %d (0x%08x)\n", reg, rval, rval);
- break;
- case 1:
- printf("no such regiser: %s\n", reg);
- break;
- case 2:
- printf("cannot set g0\n");
- break;
- default:
- break;
- }
-
-}
-
-static void
-disp_reg(sregs, reg)
- struct pstate *sregs;
- char *reg;
-{
- if (strncmp(reg, "w",1) == 0)
- disp_regs(sregs, VAL(&reg[1]));
-}
-
-#ifdef ERRINJ
-
-void
-errinj()
-{
- int err;
-
- switch (err = (random() % 12)) {
- case 0: errtt = 0x61; break;
- case 1: errtt = 0x62; break;
- case 2: errtt = 0x63; break;
- case 3: errtt = 0x64; break;
- case 4: errtt = 0x65; break;
- case 5:
- case 6:
- case 7: errftt = err;
- break;
- case 8: errmec = 1; break;
- case 9: errmec = 2; break;
- case 10: errmec = 5; break;
- case 11: errmec = 6; break;
- }
- errcnt++;
- if (errper) event(errinj, 0, (random()%errper));
-}
-
-void
-errinjstart()
-{
- if (errper) event(errinj, 0, (random()%errper));
-}
-
-#endif
-
-static uint32
-limcalc (freq)
- float32 freq;
-{
- uint32 unit, lim;
- double flim;
- char *cmd1, *cmd2;
-
- unit = 1;
- lim = -1;
- if ((cmd1 = strtok(NULL, " \t\n\r")) != NULL) {
- lim = VAL(cmd1);
- if ((cmd2 = strtok(NULL, " \t\n\r")) != NULL) {
- if (strcmp(cmd2,"us")==0) unit = 1;
- if (strcmp(cmd2,"ms")==0) unit = 1000;
- if (strcmp(cmd2,"s")==0) unit = 1000000;
- }
- flim = (double) lim * (double) unit * (double) freq +
- (double) ebase.simtime;
- if ((flim > ebase.simtime) && (flim < 4294967296.0)) {
- lim = (uint32) flim;
- } else {
- printf("error in expression\n");
- lim = -1;
- }
- }
- return (lim);
-}
-
-int
-exec_cmd(sregs, cmd)
- char *cmd;
- struct pstate *sregs;
-{
- char *cmd1, *cmd2;
- int32 stat;
- uint32 len, i, clen, j;
- static uint32 daddr = 0;
- char *cmdsave;
-
- stat = OK;
- cmdsave = strdup(cmd);
- if ((cmd1 = strtok(cmd, " \t")) != NULL) {
- clen = strlen(cmd1);
- if (strncmp(cmd1, "bp", clen) == 0) {
- for (i = 0; i < sregs->bptnum; i++) {
- printf(" %d : 0x%08x\n", i + 1, sregs->bpts[i]);
- }
- } else if (strncmp(cmd1, "+bp", clen) == 0) {
- if ((cmd1 = strtok(NULL, " \t\n\r")) != NULL) {
- sregs->bpts[sregs->bptnum] = VAL(cmd1) & ~0x3;
- printf("added breakpoint %d at 0x%08x\n",
- sregs->bptnum + 1, sregs->bpts[sregs->bptnum]);
- sregs->bptnum += 1;
- }
- } else if (strncmp(cmd1, "-bp", clen) == 0) {
- if ((cmd1 = strtok(NULL, " \t\n\r")) != NULL) {
- i = VAL(cmd1) - 1;
- if ((i >= 0) && (i < sregs->bptnum)) {
- printf("deleted breakpoint %d at 0x%08x\n", i + 1,
- sregs->bpts[i]);
- for (; i < sregs->bptnum - 1; i++) {
- sregs->bpts[i] = sregs->bpts[i + 1];
- }
- sregs->bptnum -= 1;
- }
- }
- } else if (strncmp(cmd1, "batch", clen) == 0) {
- if ((cmd1 = strtok(NULL, " \t\n\r")) == NULL) {
- printf("no file specified\n");
- } else {
- batch(sregs, cmd1);
- }
- } else if (strncmp(cmd1, "cont", clen) == 0) {
- if ((cmd1 = strtok(NULL, " \t\n\r")) == NULL) {
- stat = run_sim(sregs, -1, 0);
- } else {
- stat = run_sim(sregs, VAL(cmd1), 0);
- }
- daddr = sregs->pc;
- sim_halt();
- } else if (strncmp(cmd1, "debug", clen) == 0) {
- if ((cmd1 = strtok(NULL, " \t\n\r")) != NULL) {
- sis_verbose = VAL(cmd1);
- }
- printf("Debug level = %d\n",sis_verbose);
- } else if (strncmp(cmd1, "dis", clen) == 0) {
- if ((cmd1 = strtok(NULL, " \t\n\r")) != NULL) {
- daddr = VAL(cmd1);
- }
- if ((cmd2 = strtok(NULL, " \t\n\r")) != NULL) {
- len = VAL(cmd2);
- } else
- len = 16;
- printf("\n");
- dis_mem(daddr, len, &dinfo);
- printf("\n");
- daddr += len * 4;
- } else if (strncmp(cmd1, "echo", clen) == 0) {
- if ((cmd1 = strtok(NULL, " \t\n\r")) != NULL) {
- printf("%s\n", (&cmdsave[clen+1]));
- }
-#ifdef ERRINJ
- } else if (strncmp(cmd1, "error", clen) == 0) {
- if ((cmd1 = strtok(NULL, " \t\n\r")) != NULL) {
- errper = VAL(cmd1);
- if (errper) {
- event(errinj, 0, (len = (random()%errper)));
- printf("Error injection started with period %d\n",len);
- }
- } else printf("Injected errors: %d\n",errcnt);
-#endif
- } else if (strncmp(cmd1, "float", clen) == 0) {
- stat = disp_fpu(sregs);
- } else if (strncmp(cmd1, "go", clen) == 0) {
- if ((cmd1 = strtok(NULL, " \t\n\r")) == NULL) {
- len = last_load_addr;
- } else {
- len = VAL(cmd1);
- }
- sregs->pc = len & ~3;
- sregs->npc = sregs->pc + 4;
- printf("resuming at 0x%08x\n",sregs->pc);
- if ((cmd2 = strtok(NULL, " \t\n\r")) != NULL) {
- stat = run_sim(sregs, VAL(cmd2), 0);
- } else {
- stat = run_sim(sregs, -1, 0);
- }
- daddr = sregs->pc;
- sim_halt();
- } else if (strncmp(cmd1, "help", clen) == 0) {
- gen_help();
- } else if (strncmp(cmd1, "history", clen) == 0) {
- if ((cmd1 = strtok(NULL, " \t\n\r")) != NULL) {
- sregs->histlen = VAL(cmd1);
- if (sregs->histbuf != NULL)
- free(sregs->histbuf);
- sregs->histbuf = (struct histype *) calloc(sregs->histlen, sizeof(struct histype));
- printf("trace history length = %d\n\r", sregs->histlen);
- sregs->histind = 0;
-
- } else {
- j = sregs->histind;
- for (i = 0; i < sregs->histlen; i++) {
- if (j >= sregs->histlen)
- j = 0;
- printf(" %8d ", sregs->histbuf[j].time);
- dis_mem(sregs->histbuf[j].addr, 1, &dinfo);
- j++;
- }
- }
-
- } else if (strncmp(cmd1, "load", clen) == 0) {
- if ((cmd1 = strtok(NULL, " \t\n\r")) != NULL) {
- last_load_addr = bfd_load(cmd1);
- while ((cmd1 = strtok(NULL, " \t\n\r")) != NULL)
- last_load_addr = bfd_load(cmd1);
- } else {
- printf("load: no file specified\n");
- }
- } else if (strncmp(cmd1, "mem", clen) == 0) {
- if ((cmd1 = strtok(NULL, " \t\n\r")) != NULL)
- daddr = VAL(cmd1);
- if ((cmd2 = strtok(NULL, " \t\n\r")) != NULL)
- len = VAL(cmd2);
- else
- len = 64;
- disp_mem(daddr, len);
- daddr += len;
- } else if (strncmp(cmd1, "perf", clen) == 0) {
- cmd1 = strtok(NULL, " \t\n\r");
- if ((cmd1 != NULL) &&
- (strncmp(cmd1, "reset", strlen(cmd1)) == 0)) {
- reset_stat(sregs);
- } else
- show_stat(sregs);
- } else if (strncmp(cmd1, "quit", clen) == 0) {
- exit(0);
- } else if (strncmp(cmd1, "reg", clen) == 0) {
- cmd1 = strtok(NULL, " \t\n\r");
- cmd2 = strtok(NULL, " \t\n\r");
- if (cmd2 != NULL)
- set_rega(sregs, cmd1, VAL(cmd2));
- else if (cmd1 != NULL)
- disp_reg(sregs, cmd1);
- else {
- disp_regs(sregs,sregs->psr);
- disp_ctrl(sregs);
- }
- } else if (strncmp(cmd1, "reset", clen) == 0) {
- ebase.simtime = 0;
- reset_all();
- reset_stat(sregs);
- } else if (strncmp(cmd1, "run", clen) == 0) {
- ebase.simtime = 0;
- reset_all();
- reset_stat(sregs);
- if ((cmd1 = strtok(NULL, " \t\n\r")) == NULL) {
- stat = run_sim(sregs, -1, 0);
- } else {
- stat = run_sim(sregs, VAL(cmd1), 0);
- }
- daddr = sregs->pc;
- sim_halt();
- } else if (strncmp(cmd1, "shell", clen) == 0) {
- if ((cmd1 = strtok(NULL, " \t\n\r")) != NULL) {
- system(&cmdsave[clen]);
- }
- } else if (strncmp(cmd1, "step", clen) == 0) {
- stat = run_sim(sregs, 1, 1);
- daddr = sregs->pc;
- sim_halt();
- } else if (strncmp(cmd1, "tcont", clen) == 0) {
- sregs->tlimit = limcalc(sregs->freq);
- stat = run_sim(sregs, -1, 0);
- daddr = sregs->pc;
- sim_halt();
- } else if (strncmp(cmd1, "tgo", clen) == 0) {
- if ((cmd1 = strtok(NULL, " \t\n\r")) == NULL) {
- len = last_load_addr;
- } else {
- len = VAL(cmd1);
- sregs->tlimit = limcalc(sregs->freq);
- }
- sregs->pc = len & ~3;
- sregs->npc = sregs->pc + 4;
- printf("resuming at 0x%08x\n",sregs->pc);
- stat = run_sim(sregs, -1, 0);
- daddr = sregs->pc;
- sim_halt();
- } else if (strncmp(cmd1, "tlimit", clen) == 0) {
- sregs->tlimit = limcalc(sregs->freq);
- if (sregs->tlimit != (uint32) -1)
- printf("simulation limit = %u (%.3f ms)\n",(uint32) sregs->tlimit,
- sregs->tlimit / sregs->freq / 1000);
- } else if (strncmp(cmd1, "tra", clen) == 0) {
- if ((cmd1 = strtok(NULL, " \t\n\r")) == NULL) {
- stat = run_sim(sregs, -1, 1);
- } else {
- stat = run_sim(sregs, VAL(cmd1), 1);
- }
- printf("\n");
- daddr = sregs->pc;
- sim_halt();
- } else if (strncmp(cmd1, "trun", clen) == 0) {
- ebase.simtime = 0;
- reset_all();
- reset_stat(sregs);
- sregs->tlimit = limcalc(sregs->freq);
- stat = run_sim(sregs, -1, 0);
- daddr = sregs->pc;
- sim_halt();
- } else
- printf("syntax error\n");
- }
- if (cmdsave != NULL)
- free(cmdsave);
- return (stat);
-}
-
-
-void
-reset_stat(sregs)
- struct pstate *sregs;
-{
- sregs->tottime = 0;
- sregs->pwdtime = 0;
- sregs->ninst = 0;
- sregs->fholdt = 0;
- sregs->holdt = 0;
- sregs->icntt = 0;
- sregs->finst = 0;
- sregs->nstore = 0;
- sregs->nload = 0;
- sregs->nbranch = 0;
- sregs->simstart = ebase.simtime;
-
-}
-
-void
-show_stat(sregs)
- struct pstate *sregs;
-{
- uint32 iinst;
- uint32 stime, tottime;
-
- if (sregs->tottime == 0) tottime = 1; else tottime = sregs->tottime;
- stime = ebase.simtime - sregs->simstart; /* Total simulated time */
-#ifdef STAT
-
- iinst = sregs->ninst - sregs->finst - sregs->nload - sregs->nstore -
- sregs->nbranch;
-#endif
-
- printf("\n Cycles : %9d\n\r", ebase.simtime - sregs->simstart);
- printf(" Instructions : %9d\n", sregs->ninst);
-
-#ifdef STAT
- printf(" integer : %9.2f %%\n", 100.0 * (float) iinst / (float) sregs->ninst);
- printf(" load : %9.2f %%\n",
- 100.0 * (float) sregs->nload / (float) sregs->ninst);
- printf(" store : %9.2f %%\n",
- 100.0 * (float) sregs->nstore / (float) sregs->ninst);
- printf(" branch : %9.2f %%\n",
- 100.0 * (float) sregs->nbranch / (float) sregs->ninst);
- printf(" float : %9.2f %%\n",
- 100.0 * (float) sregs->finst / (float) sregs->ninst);
- printf(" Integer CPI : %9.2f\n",
- ((float) (stime - sregs->pwdtime - sregs->fholdt - sregs->finst))
- /
- (float) (sregs->ninst - sregs->finst));
- printf(" Float CPI : %9.2f\n",
- ((float) sregs->fholdt / (float) sregs->finst) + 1.0);
-#endif
- printf(" Overall CPI : %9.2f\n",
- (float) (stime - sregs->pwdtime) / (float) sregs->ninst);
- printf("\n ERC32 performance (%4.1f MHz): %5.2f MOPS (%5.2f MIPS, %5.2f MFLOPS)\n",
- sregs->freq, sregs->freq * (float) sregs->ninst / (float) (stime - sregs->pwdtime),
- sregs->freq * (float) (sregs->ninst - sregs->finst) /
- (float) (stime - sregs->pwdtime),
- sregs->freq * (float) sregs->finst / (float) (stime - sregs->pwdtime));
- printf(" Simulated ERC32 time : %5.2f ms\n", (float) (ebase.simtime - sregs->simstart) / 1000.0 / sregs->freq);
- printf(" Processor utilisation : %5.2f %%\n", 100.0 * (1.0 - ((float) sregs->pwdtime / (float) stime)));
- printf(" Real-time / simulator-time : 1/%.2f \n",
- ((float) sregs->tottime) / ((float) (stime) / (sregs->freq * 1.0E6)));
- printf(" Simulator performance : %d KIPS\n",sregs->ninst/tottime/1000);
- printf(" Used time (sys + user) : %3d s\n\n", sregs->tottime);
-}
-
-
-
-void
-init_bpt(sregs)
- struct pstate *sregs;
-{
- sregs->bptnum = 0;
- sregs->histlen = 0;
- sregs->histind = 0;
- sregs->histbuf = NULL;
- sregs->tlimit = -1;
-}
-
-static void
-int_handler(sig)
- int32 sig;
-{
- if (sig != 2)
- printf("\n\n Signal handler error (%d)\n\n", sig);
- ctrl_c = 1;
-}
-
-void
-init_signals()
-{
- typedef void (*PFI) ();
- static PFI int_tab[2];
-
- int_tab[0] = signal(SIGTERM, int_handler);
- int_tab[1] = signal(SIGINT, int_handler);
-}
-
-
-extern struct disassemble_info dinfo;
-
-struct estate ebase;
-struct evcell evbuf[EVENT_MAX];
-struct irqcell irqarr[16];
-
-static int
-disp_fpu(sregs)
- struct pstate *sregs;
-{
-
- int i;
- float t;
-
- printf("\n fsr: %08X\n\n", sregs->fsr);
-
-#ifdef HOST_LITTLE_ENDIAN_FLOAT
- for (i = 0; i < 32; i++)
- sregs->fdp[i ^ 1] = sregs->fs[i];
-#endif
-
- for (i = 0; i < 32; i++) {
- t = sregs->fs[i];
- printf(" f%02d %08x %14e ", i, sregs->fsi[i], sregs->fs[i]);
- if (!(i & 1))
- printf("%14e\n", sregs->fd[i >> 1]);
- else
- printf("\n");
- }
- printf("\n");
- return (OK);
-}
-
-static void
-disp_regs(sregs,cwp)
- struct pstate *sregs;
- int cwp;
-{
-
- int i;
-
- cwp = ((cwp & 0x7) << 4);
- printf("\n\t INS LOCALS OUTS GLOBALS\n");
- for (i = 0; i < 8; i++) {
- printf(" %d: %08X %08X %08X %08X\n", i,
- sregs->r[(cwp + i + 24) & 0x7f],
- sregs->r[(cwp + i + 16) & 0x7f], sregs->r[(cwp + i + 8) & 0x7f],
- sregs->g[i]);
- }
-}
-
-static void
-disp_ctrl(sregs)
- struct pstate *sregs;
-{
-
- unsigned char i[4];
-
- printf("\n psr: %08X wim: %08X tbr: %08X y: %08X\n",
- sregs->psr, sregs->wim, sregs->tbr, sregs->y);
- sis_memory_read(sregs->pc, i, 4);
- printf("\n pc: %08X = %02X%02X%02X%02X ", sregs->pc,i[0],i[1],i[2],i[3]);
- print_insn_sparc(sregs->pc, &dinfo);
- sis_memory_read(sregs->npc, i, 4);
- printf("\n npc: %08X = %02X%02X%02X%02X ",sregs->npc,i[0],i[1],i[2],i[3]);
- print_insn_sparc(sregs->npc, &dinfo);
- if (sregs->err_mode)
- printf("\n IU in error mode");
- printf("\n\n");
-}
-
-static void
-disp_mem(addr, len)
- uint32 addr;
- uint32 len;
-{
-
- uint32 i;
- unsigned char data[4];
- uint32 mem[4], j;
- char *p;
-
- for (i = addr & ~3; i < ((addr + len) & ~3); i += 16) {
- printf("\n %8X ", i);
- for (j = 0; j < 4; j++) {
- sis_memory_read((i + (j * 4)), data, 4);
- printf("%02x%02x%02x%02x ", data[0],data[1],data[2],data[3]);
- mem[j] = *((int *) &data);
- }
- printf(" ");
- p = (char *) mem;
- for (j = 0; j < 16; j++) {
- if (isprint(p[j]))
- putchar(p[j]);
- else
- putchar('.');
- }
- }
- printf("\n\n");
-}
-
-void
-dis_mem(addr, len, info)
- uint32 addr;
- uint32 len;
- struct disassemble_info *info;
-{
- uint32 i;
- unsigned char data[4];
-
- for (i = addr & -3; i < ((addr & -3) + (len << 2)); i += 4) {
- sis_memory_read(i, data, 4);
- printf(" %08x %02x%02x%02x%02x ", i, data[0],data[1],data[2],data[3]);
- print_insn_sparc(i, info);
- if (i >= 0xfffffffc) break;
- printf("\n");
- }
-}
-
-int
-buffer_read_memory(addr, buffer, size, info)
- bfd_vma addr;
- bfd_byte *buffer;
- uint32 size;
- struct disassemble_info *info;
-{
- if (size == sis_memory_read(addr, buffer, size))
- return (0);
- else
- return (1);
-}
-
-void
-perror_memory(status, addr, info)
- int32 status;
- bfd_vma addr;
- struct disassemble_info *info;
-{
-
- printf("Could not read address 0x%08x\n", (unsigned int) addr);
-}
-
-void
-generic_print_address(addr, info)
- bfd_vma addr;
- struct disassemble_info *info;
-{
-
- printf("0x%x", (unsigned int) addr);
-}
-
-/* Just return the given address. */
-
-int
-generic_symbol_at_address (addr, info)
- bfd_vma addr;
- struct disassemble_info * info;
-{
- return 1;
-}
-
-
-/* Add event to event queue */
-
-void
-event(cfunc, arg, delta)
- void (*cfunc) ();
- int32 arg;
- uint32 delta;
-{
- struct evcell *ev1, *evins;
-
- if (ebase.freeq == NULL) {
- printf("Error, too many events in event queue\n");
- return;
- }
- ev1 = &ebase.eq;
- delta += ebase.simtime;
- while ((ev1->nxt != NULL) && (ev1->nxt->time <= delta)) {
- ev1 = ev1->nxt;
- }
- if (ev1->nxt == NULL) {
- ev1->nxt = ebase.freeq;
- ebase.freeq = ebase.freeq->nxt;
- ev1->nxt->nxt = NULL;
- } else {
- evins = ebase.freeq;
- ebase.freeq = ebase.freeq->nxt;
- evins->nxt = ev1->nxt;
- ev1->nxt = evins;
- }
- ev1->nxt->time = delta;
- ev1->nxt->cfunc = cfunc;
- ev1->nxt->arg = arg;
-}
-
-#if 0 /* apparently not used */
-void
-stop_event()
-{
-}
-#endif
-
-void
-init_event()
-{
- int32 i;
-
- ebase.eq.nxt = NULL;
- ebase.freeq = evbuf;
- for (i = 0; i < EVENT_MAX; i++) {
- evbuf[i].nxt = &evbuf[i + 1];
- }
- evbuf[EVENT_MAX - 1].nxt = NULL;
-}
-
-void
-set_int(level, callback, arg)
- int32 level;
- void (*callback) ();
- int32 arg;
-{
- irqarr[level & 0x0f].callback = callback;
- irqarr[level & 0x0f].arg = arg;
-}
-
-/* Advance simulator time */
-
-void
-advance_time(sregs)
- struct pstate *sregs;
-{
-
- struct evcell *evrem;
- void (*cfunc) ();
- uint32 arg, endtime;
-
-#ifdef STAT
- sregs->fholdt += sregs->fhold;
- sregs->holdt += sregs->hold;
- sregs->icntt += sregs->icnt;
-#endif
-
- endtime = ebase.simtime + sregs->icnt + sregs->hold + sregs->fhold;
-
- while ((ebase.eq.nxt->time <= (endtime)) && (ebase.eq.nxt != NULL)) {
- ebase.simtime = ebase.eq.nxt->time;
- cfunc = ebase.eq.nxt->cfunc;
- arg = ebase.eq.nxt->arg;
- evrem = ebase.eq.nxt;
- ebase.eq.nxt = ebase.eq.nxt->nxt;
- evrem->nxt = ebase.freeq;
- ebase.freeq = evrem;
- cfunc(arg);
- }
- ebase.simtime = endtime;
-
-}
-
-uint32
-now()
-{
- return(ebase.simtime);
-}
-
-
-/* Advance time until an external interrupt is seen */
-
-int
-wait_for_irq()
-{
- struct evcell *evrem;
- void (*cfunc) ();
- int32 arg, endtime;
-
- if (ebase.eq.nxt == NULL)
- printf("Warning: event queue empty - power-down mode not entered\n");
- endtime = ebase.simtime;
- while (!ext_irl && (ebase.eq.nxt != NULL)) {
- ebase.simtime = ebase.eq.nxt->time;
- cfunc = ebase.eq.nxt->cfunc;
- arg = ebase.eq.nxt->arg;
- evrem = ebase.eq.nxt;
- ebase.eq.nxt = ebase.eq.nxt->nxt;
- evrem->nxt = ebase.freeq;
- ebase.freeq = evrem;
- cfunc(arg);
- if (ctrl_c) {
- printf("\bwarning: power-down mode interrupted\n");
- break;
- }
- }
- sregs.pwdtime += ebase.simtime - endtime;
- return (ebase.simtime - endtime);
-}
-
-int
-check_bpt(sregs)
- struct pstate *sregs;
-{
- int32 i;
-
- if ((sregs->bphit) || (sregs->annul))
- return (0);
- for (i = 0; i < (int32) sregs->bptnum; i++) {
- if (sregs->pc == sregs->bpts[i])
- return (BPT_HIT);
- }
- return (0);
-}
-
-void
-reset_all()
-{
- init_event(); /* Clear event queue */
- init_regs(&sregs);
- reset();
-#ifdef ERRINJ
- errinjstart();
-#endif
-}
-
-void
-sys_reset()
-{
- reset_all();
- sregs.trap = 256; /* Force fake reset trap */
-}
-
-void
-sys_halt()
-{
- sregs.trap = 257; /* Force fake halt trap */
-}
-
-#include "ansidecl.h"
-
-#ifdef ANSI_PROTOTYPES
-#include <stdarg.h>
-#else
-#include <varargs.h>
-#endif
-
-#include "libiberty.h"
-#include "bfd.h"
-
-#define min(A, B) (((A) < (B)) ? (A) : (B))
-#define LOAD_ADDRESS 0
-
-int
-bfd_load(fname)
- char *fname;
-{
- asection *section;
- bfd *pbfd;
- const bfd_arch_info_type *arch;
-
- pbfd = bfd_openr(fname, 0);
-
- if (pbfd == NULL) {
- printf("open of %s failed\n", fname);
- return (-1);
- }
- if (!bfd_check_format(pbfd, bfd_object)) {
- printf("file %s doesn't seem to be an object file\n", fname);
- return (-1);
- }
-
- arch = bfd_get_arch_info (pbfd);
- if (bfd_little_endian (pbfd) || arch->mach == bfd_mach_sparc_sparclite_le)
- current_target_byte_order = LITTLE_ENDIAN;
- else
- current_target_byte_order = BIG_ENDIAN;
- if (sis_verbose)
- printf("file %s is %s-endian.\n", fname,
- current_target_byte_order == BIG_ENDIAN ? "big" : "little");
-
- if (sis_verbose)
- printf("loading %s:", fname);
- for (section = pbfd->sections; section; section = section->next) {
- if (bfd_get_section_flags(pbfd, section) & SEC_ALLOC) {
- bfd_vma section_address;
- unsigned long section_size;
- const char *section_name;
-
- section_name = bfd_get_section_name(pbfd, section);
-
- section_address = bfd_get_section_vma(pbfd, section);
- /*
- * Adjust sections from a.out files, since they don't carry their
- * addresses with.
- */
- if (bfd_get_flavour(pbfd) == bfd_target_aout_flavour) {
- if (strcmp (section_name, ".text") == 0)
- section_address = bfd_get_start_address (pbfd);
- else if (strcmp (section_name, ".data") == 0) {
- /* Read the first 8 bytes of the data section.
- There should be the string 'DaTa' followed by
- a word containing the actual section address. */
- struct data_marker
- {
- char signature[4]; /* 'DaTa' */
- unsigned char sdata[4]; /* &sdata */
- } marker;
- bfd_get_section_contents (pbfd, section, &marker, 0,
- sizeof (marker));
- if (strncmp (marker.signature, "DaTa", 4) == 0)
- {
- if (current_target_byte_order == BIG_ENDIAN)
- section_address = bfd_getb32 (marker.sdata);
- else
- section_address = bfd_getl32 (marker.sdata);
- }
- }
- }
-
- section_size = bfd_section_size(pbfd, section);
-
- if (sis_verbose)
- printf("\nsection %s at 0x%08lx (0x%lx bytes)",
- section_name, section_address, section_size);
-
- /* Text, data or lit */
- if (bfd_get_section_flags(pbfd, section) & SEC_LOAD) {
- file_ptr fptr;
-
- fptr = 0;
-
- while (section_size > 0) {
- char buffer[1024];
- int count;
-
- count = min(section_size, 1024);
-
- bfd_get_section_contents(pbfd, section, buffer, fptr, count);
-
- sis_memory_write(section_address, buffer, count);
-
- section_address += count;
- fptr += count;
- section_size -= count;
- }
- } else /* BSS */
- if (sis_verbose)
- printf("(not loaded)");
- }
- }
- if (sis_verbose)
- printf("\n");
-
- return(bfd_get_start_address (pbfd));
-}
diff --git a/sim/erc32/help.c b/sim/erc32/help.c
deleted file mode 100644
index 897ee7c844c..00000000000
--- a/sim/erc32/help.c
+++ /dev/null
@@ -1,40 +0,0 @@
-#include <stdio.h>
-#include "sis.h"
-
-void
-usage()
-{
-
- printf("usage: sis [-uart1 uart_device1] [-uart2 uart_device2]\n");
- printf("[-nfp] [-freq frequency] [-c batch_file] [files]\n");
- printf("[-sparclite] [-dumbio]\n");
-}
-
-void
-gen_help()
-{
-
- printf("\n batch <file> execute a batch file of SIS commands\n");
- printf(" +bp <addr> add a breakpoint at <addr>\n");
- printf(" -bp <num> delete breakpoint <num>\n");
- printf(" bp print all breakpoints\n");
- printf(" cont [icnt] continue execution for [icnt] instructions\n");
- printf(" deb <level> set debug level\n");
- printf(" dis [addr] [count] disassemble [count] instructions at address [addr]\n");
- printf(" echo <string> print <string> to the simulator window\n");
-#ifdef ERRINJ
- printf(" error <period> inject error traps in IU and FPU\n");
-#endif
- printf(" float print the FPU registers\n");
- printf(" go <addr> [icnt] start execution at <addr> for [icnt] instructions\n");
- printf(" hist [trace_length] enable/show trace history\n");
- printf(" load <file_name> load a file into simulator memory\n");
- printf(" mem [addr] [count] display memory at [addr] for [count] bytes\n");
- printf(" quit exit the simulator\n");
- printf(" perf [reset] show/reset performance statistics\n");
- printf(" reg [w<0-7>] show integer registers (or windows, eg 're w2')\n");
- printf(" run [inst_count] reset and start execution for [icnt] instruction\n");
- printf(" step single step\n");
- printf(" tra [inst_count] trace [inst_count] instructions\n");
- printf("\n type Ctrl-C to interrupt execution\n\n");
-}
diff --git a/sim/erc32/interf.c b/sim/erc32/interf.c
deleted file mode 100644
index d0a781eb937..00000000000
--- a/sim/erc32/interf.c
+++ /dev/null
@@ -1,526 +0,0 @@
-/*
- * This file is part of SIS.
- *
- * SIS, SPARC instruction simulator V1.6 Copyright (C) 1995 Jiri Gaisler,
- * European Space Agency
- *
- * This program is free software; you can redistribute it and/or modify it under
- * the terms of the GNU General Public License as published by the Free
- * Software Foundation; either version 2 of the License, or (at your option)
- * any later version.
- *
- * This program is distributed in the hope that it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc., 675
- * Mass Ave, Cambridge, MA 02139, USA.
- *
- */
-
-#include <signal.h>
-#include <string.h>
-#include <stdio.h>
-#include <stdlib.h>
-#include <time.h>
-#include <sys/fcntl.h>
-#include "sis.h"
-#include "bfd.h"
-#include <dis-asm.h>
-#include "sim-config.h"
-
-#include "remote-sim.h"
-
-#ifndef fprintf
-extern fprintf();
-#endif
-
-#define PSR_CWP 0x7
-
-#define VAL(x) strtol(x,(char **)NULL,0)
-
-extern char **buildargv(char *input);
-
-extern struct disassemble_info dinfo;
-extern struct pstate sregs;
-extern struct estate ebase;
-
-extern int current_target_byte_order;
-extern int ctrl_c;
-extern int nfp;
-extern int ift;
-extern int rom8;
-extern int wrp;
-extern int uben;
-extern int sis_verbose;
-extern char *sis_version;
-extern struct estate ebase;
-extern struct evcell evbuf[];
-extern struct irqcell irqarr[];
-extern int irqpend, ext_irl;
-extern int sparclite;
-extern int dumbio;
-extern int sparclite_board;
-extern int termsave;
-extern char uart_dev1[], uart_dev2[];
-
-int sis_gdb_break = 1;
-
-host_callback *sim_callback;
-
-int
-run_sim(sregs, icount, dis)
- struct pstate *sregs;
- unsigned int icount;
- int dis;
-{
- int mexc, irq;
-
- if (sis_verbose)
- (*sim_callback->printf_filtered) (sim_callback, "resuming at %x\n",
- sregs->pc);
- init_stdio();
- sregs->starttime = time(NULL);
- irq = 0;
- while (!sregs->err_mode & (icount > 0)) {
-
- sregs->fhold = 0;
- sregs->hold = 0;
- sregs->icnt = 1;
-
- if (sregs->psr & 0x080)
- sregs->asi = 8;
- else
- sregs->asi = 9;
-
-#if 0 /* DELETE ME! for debugging purposes only */
- if (sis_verbose > 1)
- if (sregs->pc == 0 || sregs->npc == 0)
- printf ("bogus pc or npc\n");
-#endif
- mexc = memory_read(sregs->asi, sregs->pc, &sregs->inst,
- 2, &sregs->hold);
-#if 1 /* DELETE ME! for debugging purposes only */
- if (sis_verbose > 2)
- printf("pc %x, np %x, sp %x, fp %x, wm %x, cw %x, i %08x\n",
- sregs->pc, sregs->npc,
- sregs->r[(((sregs->psr & 7) << 4) + 14) & 0x7f],
- sregs->r[(((sregs->psr & 7) << 4) + 30) & 0x7f],
- sregs->wim,
- sregs->psr & 7,
- sregs->inst);
-#endif
- if (sregs->annul) {
- sregs->annul = 0;
- sregs->icnt = 1;
- sregs->pc = sregs->npc;
- sregs->npc = sregs->npc + 4;
- } else {
- if (ext_irl) irq = check_interrupts(sregs);
- if (!irq) {
- if (mexc) {
- sregs->trap = I_ACC_EXC;
- } else {
- if ((sis_gdb_break) && (sregs->inst == 0x91d02001)) {
- if (sis_verbose)
- (*sim_callback->printf_filtered) (sim_callback,
- "SW BP hit at %x\n", sregs->pc);
- sim_halt();
- restore_stdio();
- clearerr(stdin);
- return (BPT_HIT);
- } else
- dispatch_instruction(sregs);
- }
- icount--;
- }
- if (sregs->trap) {
- irq = 0;
- sregs->err_mode = execute_trap(sregs);
- }
- }
- advance_time(sregs);
- if (ctrl_c) {
- icount = 0;
- }
- }
- sim_halt();
- sregs->tottime += time(NULL) - sregs->starttime;
- restore_stdio();
- clearerr(stdin);
- if (sregs->err_mode)
- error_mode(sregs->pc);
- if (sregs->err_mode)
- return (ERROR);
- if (sregs->bphit) {
- if (sis_verbose)
- (*sim_callback->printf_filtered) (sim_callback,
- "HW BP hit at %x\n", sregs->pc);
- return (BPT_HIT);
- }
- if (ctrl_c) {
- ctrl_c = 0;
- return (CTRL_C);
- }
- return (TIME_OUT);
-}
-
-void
-sim_set_callbacks (ptr)
- host_callback *ptr;
-{
- sim_callback = ptr;
-}
-
-void
-sim_size (memsize)
- int memsize;
-{
-}
-
-SIM_DESC
-sim_open (kind, callback, abfd, argv)
- SIM_OPEN_KIND kind;
- struct host_callback_struct *callback;
- struct _bfd *abfd;
- char **argv;
-{
-
- int argc = 0;
- int stat = 1;
- int freq = 0;
-
- sim_callback = callback;
-
- while (argv[argc])
- argc++;
- while (stat < argc) {
- if (argv[stat][0] == '-') {
- if (strcmp(argv[stat], "-v") == 0) {
- sis_verbose++;
- } else
- if (strcmp(argv[stat], "-nfp") == 0) {
- nfp = 1;
- } else
- if (strcmp(argv[stat], "-ift") == 0) {
- ift = 1;
- } else
- if (strcmp(argv[stat], "-sparclite") == 0) {
- sparclite = 1;
- } else
- if (strcmp(argv[stat], "-sparclite-board") == 0) {
- sparclite_board = 1;
- } else
- if (strcmp(argv[stat], "-dumbio") == 0) {
- dumbio = 1;
- } else
- if (strcmp(argv[stat], "-wrp") == 0) {
- wrp = 1;
- } else
- if (strcmp(argv[stat], "-rom8") == 0) {
- rom8 = 1;
- } else
- if (strcmp(argv[stat], "-uben") == 0) {
- uben = 1;
- } else
- if (strcmp(argv[stat], "-uart1") == 0) {
- if ((stat + 1) < argc)
- strcpy(uart_dev1, argv[++stat]);
- } else
- if (strcmp(argv[stat], "-uart2") == 0) {
- if ((stat + 1) < argc)
- strcpy(uart_dev2, argv[++stat]);
- } else
- if (strcmp(argv[stat], "-nogdb") == 0) {
- sis_gdb_break = 0;
- } else
- if (strcmp(argv[stat], "-freq") == 0) {
- if ((stat + 1) < argc) {
- freq = VAL(argv[++stat]);
- }
- } else {
- (*sim_callback->printf_filtered) (sim_callback,
- "unknown option %s\n",
- argv[stat]);
- }
- } else
- bfd_load(argv[stat]);
- stat++;
- }
-
- if (sis_verbose) {
- (*sim_callback->printf_filtered) (sim_callback, "\n SIS - SPARC instruction simulator %s\n", sis_version);
- (*sim_callback->printf_filtered) (sim_callback, " Bug-reports to Jiri Gaisler ESA/ESTEC (jgais@wd.estec.esa.nl)\n");
- if (nfp)
- (*sim_callback->printf_filtered) (sim_callback, "no FPU\n");
- if (sparclite)
- (*sim_callback->printf_filtered) (sim_callback, "simulating Sparclite\n");
- if (dumbio)
- (*sim_callback->printf_filtered) (sim_callback, "dumb IO (no input, dumb output)\n");
- if (sis_gdb_break == 0)
- (*sim_callback->printf_filtered) (sim_callback, "disabling GDB trap handling for breakpoints\n");
- if (freq)
- (*sim_callback->printf_filtered) (sim_callback, " ERC32 freq %d Mhz\n", freq);
- }
-
- sregs.freq = freq ? freq : 15;
- termsave = fcntl(0, F_GETFL, 0);
- INIT_DISASSEMBLE_INFO(dinfo, stdout,(fprintf_ftype)fprintf);
- dinfo.endian = BFD_ENDIAN_BIG;
- reset_all();
- ebase.simtime = 0;
- init_sim();
- init_bpt(&sregs);
- reset_stat(&sregs);
-
- /* Fudge our descriptor for now. */
- return (SIM_DESC) 1;
-}
-
-void
-sim_close(sd, quitting)
- SIM_DESC sd;
- int quitting;
-{
-
- exit_sim();
- fcntl(0, F_SETFL, termsave);
-
-};
-
-SIM_RC
-sim_load(sd, prog, abfd, from_tty)
- SIM_DESC sd;
- char *prog;
- bfd *abfd;
- int from_tty;
-{
- bfd_load (prog);
- return SIM_RC_OK;
-}
-
-SIM_RC
-sim_create_inferior(sd, abfd, argv, env)
- SIM_DESC sd;
- struct _bfd *abfd;
- char **argv;
- char **env;
-{
- bfd_vma start_address = 0;
- if (abfd != NULL)
- start_address = bfd_get_start_address (abfd);
-
- ebase.simtime = 0;
- reset_all();
- reset_stat(&sregs);
- sregs.pc = start_address & ~3;
- sregs.npc = sregs.pc + 4;
- return SIM_RC_OK;
-}
-
-int
-sim_store_register(sd, regno, value, length)
- SIM_DESC sd;
- int regno;
- unsigned char *value;
- int length;
-{
- /* FIXME: Review the computation of regval. */
- int regval;
- if (current_target_byte_order == BIG_ENDIAN)
- regval = (value[0] << 24) | (value[1] << 16)
- | (value[2] << 8) | value[3];
- else
- regval = (value[3] << 24) | (value[2] << 16)
- | (value[1] << 8) | value[0];
- set_regi(&sregs, regno, regval);
- return -1;
-}
-
-
-int
-sim_fetch_register(sd, regno, buf, length)
- SIM_DESC sd;
- int regno;
- unsigned char *buf;
- int length;
-{
- get_regi(&sregs, regno, buf);
- return -1;
-}
-
-int
-sim_write(sd, mem, buf, length)
- SIM_DESC sd;
- SIM_ADDR mem;
- unsigned char *buf;
- int length;
-{
- return (sis_memory_write(mem, buf, length));
-}
-
-int
-sim_read(sd, mem, buf, length)
- SIM_DESC sd;
- SIM_ADDR mem;
- unsigned char *buf;
- int length;
-{
- return (sis_memory_read(mem, buf, length));
-}
-
-void
-sim_info(sd, verbose)
- SIM_DESC sd;
- int verbose;
-{
- show_stat(&sregs);
-}
-
-int simstat = OK;
-
-void
-sim_stop_reason(sd, reason, sigrc)
- SIM_DESC sd;
- enum sim_stop * reason;
- int *sigrc;
-{
-
- switch (simstat) {
- case CTRL_C:
- *reason = sim_stopped;
- *sigrc = SIGINT;
- break;
- case OK:
- case TIME_OUT:
- case BPT_HIT:
- *reason = sim_stopped;
-#ifdef _WIN32
-#define SIGTRAP 5
-#endif
- *sigrc = SIGTRAP;
- break;
- case ERROR:
- *sigrc = 0;
- *reason = sim_exited;
- }
- ctrl_c = 0;
- simstat = OK;
-}
-
-/* Flush all register windows out to the stack. Starting after the invalid
- window, flush all windows up to, and including the current window. This
- allows GDB to do backtraces and look at local variables for frames that
- are still in the register windows. Note that strictly speaking, this
- behavior is *wrong* for several reasons. First, it doesn't use the window
- overflow handlers. It therefore assumes standard frame layouts and window
- handling policies. Second, it changes system state behind the back of the
- target program. I expect this to mainly pose problems when debugging trap
- handlers.
-*/
-
-static void
-flush_windows ()
-{
- int invwin;
- int cwp;
- int win;
- int ws;
-
- /* Keep current window handy */
-
- cwp = sregs.psr & PSR_CWP;
-
- /* Calculate the invalid window from the wim. */
-
- for (invwin = 0; invwin <= PSR_CWP; invwin++)
- if ((sregs.wim >> invwin) & 1)
- break;
-
- /* Start saving with the window after the invalid window. */
-
- invwin = (invwin - 1) & PSR_CWP;
-
- for (win = invwin; ; win = (win - 1) & PSR_CWP)
- {
- uint32 sp;
- int i;
-
- sp = sregs.r[(win * 16 + 14) & 0x7f];
-#if 1
- if (sis_verbose > 2) {
- uint32 fp = sregs.r[(win * 16 + 30) & 0x7f];
- printf("flush_window: win %d, sp %x, fp %x\n", win, sp, fp);
- }
-#endif
-
- for (i = 0; i < 16; i++)
- memory_write (11, sp + 4 * i, &sregs.r[(win * 16 + 16 + i) & 0x7f], 2,
- &ws);
-
- if (win == cwp)
- break;
- }
-}
-
-void
-sim_resume(SIM_DESC sd, int step, int siggnal)
-{
- simstat = run_sim(&sregs, -1, 0);
-
- if (sis_gdb_break) flush_windows ();
-}
-
-int
-sim_trace (sd)
- SIM_DESC sd;
-{
- /* FIXME: unfinished */
- sim_resume (sd, 0, 0);
- return 1;
-}
-
-void
-sim_do_command(sd, cmd)
- SIM_DESC sd;
- char *cmd;
-{
- exec_cmd(&sregs, cmd);
-}
-
-#if 0 /* FIXME: These shouldn't exist. */
-
-int
-sim_insert_breakpoint(int addr)
-{
- if (sregs.bptnum < BPT_MAX) {
- sregs.bpts[sregs.bptnum] = addr & ~0x3;
- sregs.bptnum++;
- if (sis_verbose)
- (*sim_callback->printf_filtered) (sim_callback, "inserted HW BP at %x\n", addr);
- return 0;
- } else
- return 1;
-}
-
-int
-sim_remove_breakpoint(int addr)
-{
- int i = 0;
-
- while ((i < sregs.bptnum) && (sregs.bpts[i] != addr))
- i++;
- if (addr == sregs.bpts[i]) {
- for (; i < sregs.bptnum - 1; i++)
- sregs.bpts[i] = sregs.bpts[i + 1];
- sregs.bptnum -= 1;
- if (sis_verbose)
- (*sim_callback->printf_filtered) (sim_callback, "removed HW BP at %x\n", addr);
- return 0;
- }
- return 1;
-}
-
-#endif
diff --git a/sim/erc32/sis.c b/sim/erc32/sis.c
deleted file mode 100644
index 75678815e92..00000000000
--- a/sim/erc32/sis.c
+++ /dev/null
@@ -1,310 +0,0 @@
-/*
- * This file is part of SIS.
- *
- * SIS, SPARC instruction simulator. Copyright (C) 1995 Jiri Gaisler, European
- * Space Agency
- *
- * This program is free software; you can redistribute it and/or modify it under
- * the terms of the GNU General Public License as published by the Free
- * Software Foundation; either version 2 of the License, or (at your option)
- * any later version.
- *
- * This program is distributed in the hope that it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc., 675
- * Mass Ave, Cambridge, MA 02139, USA.
- *
- */
-
-#include "config.h"
-#include <signal.h>
-#include <string.h>
-#ifdef HAVE_STDLIB_H
-#include <stdlib.h>
-#endif
-#include <stdio.h>
-#include <time.h>
-#include <sys/fcntl.h>
-#include "sis.h"
-#include <dis-asm.h>
-#include "sim-config.h"
-
-#ifndef fprintf
-extern fprintf();
-#endif
-
-#define VAL(x) strtol(x,(char **)NULL,0)
-
-/* Structures and functions from readline library */
-
-typedef struct {
- char *line;
- char *data;
-} HIST_ENTRY;
-
-extern char * readline PARAMS ((char *prompt));
-extern void using_history PARAMS ((void));
-extern void add_history PARAMS ((char *string));
-extern HIST_ENTRY *remove_history PARAMS ((int which));
-
-
-
-/* Command history buffer length - MUST be binary */
-#define HIST_LEN 64
-
-extern struct disassemble_info dinfo;
-extern struct pstate sregs;
-extern struct estate ebase;
-
-extern int ctrl_c;
-extern int nfp;
-extern int ift;
-extern int wrp;
-extern int rom8;
-extern int uben;
-extern int sis_verbose;
-extern char *sis_version;
-extern struct estate ebase;
-extern struct evcell evbuf[];
-extern struct irqcell irqarr[];
-extern int irqpend, ext_irl;
-extern int termsave;
-extern int sparclite;
-extern int dumbio;
-extern char uart_dev1[];
-extern char uart_dev2[];
-extern uint32 last_load_addr;
-
-#ifdef ERA
-extern int era;
-#endif
-
-int
-run_sim(sregs, icount, dis)
- struct pstate *sregs;
- unsigned int icount;
- int dis;
-{
- int irq, mexc, deb, asi;
-
- sregs->starttime = time(NULL);
- init_stdio();
- if (sregs->err_mode) icount = 0;
- deb = dis || sregs->histlen || sregs->bptnum;
- irq = 0;
- while (icount > 0) {
-
- if (sregs->psr & 0x080)
- asi = 9;
- else
- asi = 8;
- mexc = memory_read(asi, sregs->pc, &sregs->inst, 2, &sregs->hold);
- sregs->icnt = 1;
- if (sregs->annul) {
- sregs->annul = 0;
- sregs->pc = sregs->npc;
- sregs->npc = sregs->npc + 4;
- } else {
- sregs->fhold = 0;
- if (ext_irl) irq = check_interrupts(sregs);
- if (!irq) {
- if (mexc) {
- sregs->trap = I_ACC_EXC;
- } else {
- if (deb) {
- if ((sregs->bphit = check_bpt(sregs)) != 0) {
- restore_stdio();
- return (BPT_HIT);
- }
- if (sregs->histlen) {
- sregs->histbuf[sregs->histind].addr = sregs->pc;
- sregs->histbuf[sregs->histind].time = ebase.simtime;
- sregs->histind++;
- if (sregs->histind >= sregs->histlen)
- sregs->histind = 0;
- }
- if (dis) {
- printf(" %8u ", ebase.simtime);
- dis_mem(sregs->pc, 1, &dinfo);
- }
- }
- dispatch_instruction(sregs);
- icount--;
- }
- }
- if (sregs->trap) {
- irq = 0;
- sregs->err_mode = execute_trap(sregs);
- if (sregs->err_mode) {
- error_mode(sregs->pc);
- icount = 0;
- }
- }
- }
- advance_time(sregs);
- if (ctrl_c || (sregs->tlimit <= ebase.simtime)) {
- icount = 0;
- if (sregs->tlimit <= ebase.simtime) sregs->tlimit = -1;
- }
- }
- sregs->tottime += time(NULL) - sregs->starttime;
- restore_stdio();
- if (sregs->err_mode)
- return (ERROR);
- if (ctrl_c) {
- ctrl_c = 0;
- return (CTRL_C);
- }
- return (TIME_OUT);
-}
-
-int
-main(argc, argv)
- int argc;
- char **argv;
-{
-
- int cont = 1;
- int stat = 1;
- int freq = 14;
- int copt = 0;
-
- char *cfile, *bacmd;
- char *cmdq[HIST_LEN];
- int cmdi = 0;
- int i;
-
- cfile = 0;
- for (i = 0; i < 64; i++)
- cmdq[i] = 0;
- printf("\n SIS - SPARC intruction simulator %s, copyright Jiri Gaisler 1995\n", sis_version);
- printf(" Bug-reports to jgais@wd.estec.esa.nl\n\n");
- while (stat < argc) {
- if (argv[stat][0] == '-') {
- if (strcmp(argv[stat], "-v") == 0) {
- sis_verbose = 1;
- } else if (strcmp(argv[stat], "-c") == 0) {
- if ((stat + 1) < argc) {
- copt = 1;
- cfile = argv[++stat];
- }
- } else if (strcmp(argv[stat], "-nfp") == 0)
- nfp = 1;
- else if (strcmp(argv[stat], "-ift") == 0)
- ift = 1;
- else if (strcmp(argv[stat], "-wrp") == 0)
- wrp = 1;
- else if (strcmp(argv[stat], "-rom8") == 0)
- rom8 = 1;
- else if (strcmp(argv[stat], "-uben") == 0)
- uben = 1;
- else if (strcmp(argv[stat], "-uart1") == 0) {
- if ((stat + 1) < argc)
- strcpy(uart_dev1, argv[++stat]);
- } else if (strcmp(argv[stat], "-uart2") == 0) {
- if ((stat + 1) < argc)
- strcpy(uart_dev2, argv[++stat]);
- } else if (strcmp(argv[stat], "-freq") == 0) {
- if ((stat + 1) < argc)
- freq = VAL(argv[++stat]);
- } else if (strcmp(argv[stat], "-sparclite") == 0) {
- sparclite = 1;
-#ifdef ERA
- } else if (strcmp(argv[stat], "-era") == 0) {
- era = 1;
-#endif
- } else if (strcmp(argv[stat], "-dumbio") == 0) {
- dumbio = 1;
- } else {
- printf("unknown option %s\n", argv[stat]);
- usage();
- exit(1);
- }
- } else {
- last_load_addr = bfd_load(argv[stat]);
- }
- stat++;
- }
- if (nfp)
- printf("FPU disabled\n");
-#ifdef ERA
- if (era)
- printf("ERA ECC emulation enabled\n");
-#endif
- sregs.freq = freq;
-
- INIT_DISASSEMBLE_INFO(dinfo, stdout, (fprintf_ftype) fprintf);
- dinfo.endian = BFD_ENDIAN_BIG;
-
- termsave = fcntl(0, F_GETFL, 0);
- using_history();
- init_signals();
- ebase.simtime = 0;
- reset_all();
- init_bpt(&sregs);
- init_sim();
-#ifdef STAT
- reset_stat(&sregs);
-#endif
-
- if (copt) {
- bacmd = (char *) malloc(256);
- strcpy(bacmd, "batch ");
- strcat(bacmd, cfile);
- exec_cmd(&sregs, bacmd);
- }
- while (cont) {
-
- if (cmdq[cmdi] != 0) {
-#if 0
- remove_history(cmdq[cmdi]);
-#else
- remove_history(cmdi);
-#endif
- free(cmdq[cmdi]);
- cmdq[cmdi] = 0;
- }
- cmdq[cmdi] = readline("sis> ");
- if (cmdq[cmdi] && *cmdq[cmdi])
- add_history(cmdq[cmdi]);
- if (cmdq[cmdi])
- stat = exec_cmd(&sregs, cmdq[cmdi]);
- else {
- puts("\n");
- exit(0);
- }
- switch (stat) {
- case OK:
- break;
- case CTRL_C:
- printf("\b\bInterrupt!\n");
- case TIME_OUT:
- printf(" Stopped at time %d (%.3f ms)\n", ebase.simtime,
- ((double) ebase.simtime / (double) sregs.freq) / 1000.0);
- break;
- case BPT_HIT:
- printf("breakpoint at 0x%08x reached\n", sregs.pc);
- sregs.bphit = 1;
- break;
- case ERROR:
- printf("IU in error mode (%d)\n", sregs.trap);
- stat = 0;
- printf(" %8d ", ebase.simtime);
- dis_mem(sregs.pc, 1, &dinfo);
- break;
- default:
- break;
- }
- ctrl_c = 0;
- stat = OK;
-
- cmdi = (cmdi + 1) & (HIST_LEN - 1);
-
- }
- return 0;
-}
-
diff --git a/sim/erc32/sis.h b/sim/erc32/sis.h
deleted file mode 100644
index 2a895c0277d..00000000000
--- a/sim/erc32/sis.h
+++ /dev/null
@@ -1,217 +0,0 @@
-/*
- * This file is part of SIS.
- *
- * ERC32SIM, SPARC instruction simulator. Copyright (C) 1995 Jiri Gaisler,
- * European Space Agency
- *
- * This program is free software; you can redistribute it and/or modify it under
- * the terms of the GNU General Public License as published by the Free
- * Software Foundation; either version 2 of the License, or (at your option)
- * any later version.
- *
- * This program is distributed in the hope that it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc., 675
- * Mass Ave, Cambridge, MA 02139, USA.
- *
- */
-
-#include "ansidecl.h"
-#include "callback.h"
-#include "remote-sim.h"
-
-#include "end.h"
-
-#define I_ACC_EXC 1
-
-/* Maximum events in event queue */
-#define EVENT_MAX 256
-
-/* Maximum # of floating point queue */
-#define FPUQN 1
-
-/* Maximum # of breakpoints */
-#define BPT_MAX 256
-
-struct histype {
- unsigned addr;
- unsigned time;
-};
-
-/* type definitions */
-
-typedef short int int16; /* 16-bit signed int */
-typedef unsigned short int uint16; /* 16-bit unsigned int */
-typedef int int32; /* 32-bit signed int */
-typedef unsigned int uint32; /* 32-bit unsigned int */
-typedef float float32; /* 32-bit float */
-typedef double float64; /* 64-bit float */
-
-/* FIXME: what about host compilers that don't support 64-bit ints? */
-typedef unsigned long long uint64; /* 64-bit unsigned int */
-typedef long long int64; /* 64-bit signed int */
-
-struct pstate {
-
- float64 fd[16]; /* FPU registers */
-#ifdef HOST_LITTLE_ENDIAN_FLOAT
- float32 fs[32];
- float32 *fdp;
-#else
- float32 *fs;
-#endif
- int32 *fsi;
- uint32 fsr;
- int32 fpstate;
- uint32 fpq[FPUQN * 2];
- uint32 fpqn;
- uint32 ftime;
- uint32 flrd;
- uint32 frd;
- uint32 frs1;
- uint32 frs2;
- uint32 fpu_pres; /* FPU present (0 = No, 1 = Yes) */
-
- uint32 psr; /* IU registers */
- uint32 tbr;
- uint32 wim;
- uint32 g[8];
- uint32 r[128];
- uint32 y;
- uint32 asr17; /* Single vector trapping */
- uint32 pc, npc;
-
-
- uint32 trap; /* Current trap type */
- uint32 annul; /* Instruction annul */
- uint32 data; /* Loaded data */
- uint32 inst; /* Current instruction */
- uint32 asi; /* Current ASI */
- uint32 err_mode; /* IU error mode */
- uint32 breakpoint;
- uint32 bptnum;
- uint32 bphit;
- uint32 bpts[BPT_MAX]; /* Breakpoints */
-
- uint32 ltime; /* Load interlock time */
- uint32 hold; /* IU hold cycles in current inst */
- uint32 fhold; /* FPU hold cycles in current inst */
- uint32 icnt; /* Instruction cycles in curr inst */
-
- uint32 histlen; /* Trace history management */
- uint32 histind;
- struct histype *histbuf;
- float32 freq; /* Simulated processor frequency */
-
-
- uint32 tottime;
- uint32 ninst;
- uint32 fholdt;
- uint32 holdt;
- uint32 icntt;
- uint32 finst;
- uint32 simstart;
- uint32 starttime;
- uint32 tlimit; /* Simulation time limit */
- uint32 pwdtime; /* Cycles in power-down mode */
- uint32 nstore; /* Number of load instructions */
- uint32 nload; /* Number of store instructions */
- uint32 nannul; /* Number of annuled instructions */
- uint32 nbranch; /* Number of branch instructions */
- uint32 ildreg; /* Destination of last load instruction */
- uint32 ildtime; /* Last time point for load dependency */
-
- int rett_err; /* IU in jmpl/restore error state (Rev.0) */
- int jmpltime;
-};
-
-struct evcell {
- void (*cfunc) ();
- int32 arg;
- uint32 time;
- struct evcell *nxt;
-};
-
-struct estate {
- struct evcell eq;
- struct evcell *freeq;
- uint32 simtime;
-};
-
-struct irqcell {
- void (*callback) ();
- int32 arg;
-};
-
-
-#define OK 0
-#define TIME_OUT 1
-#define BPT_HIT 2
-#define ERROR 3
-#define CTRL_C 4
-
-/* Prototypes */
-
-/* erc32.c */
-extern void init_sim PARAMS ((void));
-extern void reset PARAMS ((void));
-extern void error_mode PARAMS ((uint32 pc));
-extern void sim_halt PARAMS ((void));
-extern void exit_sim PARAMS ((void));
-extern void init_stdio PARAMS ((void));
-extern void restore_stdio PARAMS ((void));
-extern int memory_read PARAMS ((int32 asi, uint32 addr, uint32 *data,
- int32 sz, int32 *ws));
-extern int memory_write PARAMS ((int32 asi, uint32 addr, uint32 *data,
- int32 sz, int32 *ws));
-extern int sis_memory_write PARAMS ((uint32 addr, char *data,
- uint32 length));
-extern int sis_memory_read PARAMS ((uint32 addr, char *data,
- uint32 length));
-
-/* func.c */
-extern void set_regi PARAMS ((struct pstate *sregs, int32 reg,
- uint32 rval));
-extern void get_regi PARAMS ((struct pstate *sregs, int32 reg, char *buf));
-extern int exec_cmd PARAMS ((struct pstate *sregs, char *cmd));
-extern void reset_stat PARAMS ((struct pstate *sregs));
-extern void show_stat PARAMS ((struct pstate *sregs));
-extern void init_bpt PARAMS ((struct pstate *sregs));
-extern void init_signals PARAMS ((void));
-
-struct disassemble_info;
-extern void dis_mem PARAMS ((uint32 addr, uint32 len,
- struct disassemble_info *info));
-extern void event PARAMS ((void (*cfunc) (), int32 arg, uint32 delta));
-extern void set_int PARAMS ((int32 level, void (*callback) (), int32 arg));
-extern void advance_time PARAMS ((struct pstate *sregs));
-extern uint32 now PARAMS ((void));
-extern int wait_for_irq PARAMS ((void));
-extern int check_bpt PARAMS ((struct pstate *sregs));
-extern void reset_all PARAMS ((void));
-extern void sys_reset PARAMS ((void));
-extern void sys_halt PARAMS ((void));
-extern int bfd_load PARAMS ((char *fname));
-
-/* exec.c */
-extern int dispatch_instruction PARAMS ((struct pstate *sregs));
-extern int execute_trap PARAMS ((struct pstate *sregs));
-extern int check_interrupts PARAMS ((struct pstate *sregs));
-extern void init_regs PARAMS ((struct pstate *sregs));
-
-/* interf.c */
-extern int run_sim PARAMS ((struct pstate *sregs,
- unsigned int icount, int dis));
-
-/* float.c */
-extern int get_accex PARAMS ((void));
-extern void clear_accex PARAMS ((void));
-extern void set_fsr PARAMS ((uint32 fsr));
-
-/* help.c */
-extern void usage PARAMS ((void));
-extern void gen_help PARAMS ((void));
diff --git a/sim/erc32/startsim b/sim/erc32/startsim
deleted file mode 100644
index 1b9b41cb707..00000000000
--- a/sim/erc32/startsim
+++ /dev/null
@@ -1,4 +0,0 @@
-#
-xterm -e sis $* &
-xterm -e tip /dev/ttypc &
-
diff --git a/sim/fr30/ChangeLog b/sim/fr30/ChangeLog
deleted file mode 100644
index ed8f8af10d5..00000000000
--- a/sim/fr30/ChangeLog
+++ /dev/null
@@ -1,412 +0,0 @@
-2001-07-05 Ben Elliston <bje@redhat.com>
-
- * Makefile.in (stamp-arch): Use $(CGEN_CPU_DIR).
- (stamp-cpu): Likewise.
-
-2001-03-05 Dave Brolley <brolley@redhat.com>
-
- * arch.c: Regenerate.
- * arch.h: Regenerate.
- * cpu.c: Regenerate.
- * cpu.h: Regenerate.
- * cpuall.h: Regenerate.
- * decode.c: Regenerate.
- * decode.h: Regenerate.
- * model.c: Regenerate.
- * sem-switch.c: Regenerate.
- * sem.c: Regenerate.
-
-2001-01-12 Frank Ch. Eigler <fche@redhat.com>
-
- * configure: Regenerated with sim_scache fix.
-
-2000-11-18 Greg McGary <greg@mcgary.org>
-
- * Makefile.in: remove `@true' commands for rules that have
- $(CGEN_MAINT) as a prerequisite.
-
-2000-10-06 Dave Brolley <brolley@redhat.com>
-
- * sem.c: Regenerated.
- * sem-switch.c: Regenerated.
-
-2000-08-28 Dave Brolley <brolley@redhat.com>
-
- * cpu.h: Regenerated.
- * decode.c: Regenerated.
-
-2000-08-21 Frank Ch. Eigler <fche@redhat.com>
-
- * Makefile.in (fr30-clean): Add stamp-arch, stamp-cpu.
- (stamp-arch, stamp-cpu): New targets.
-
-Tue May 23 21:39:23 2000 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-2000-03-30 Dave Brolley <brolley@redhat.com>
-
- * configure: Regenerated.
-
-1999-10-04 Doug Evans <devans@casey.cygnus.com>
-
- * sem.c,sem-switch.c: Rebuild.
- * traps.c (sim_engine_invalid_insn): New arg `vpc'. Change type of
- result to SEM_PC. Return vpc.
-
-Wed Sep 29 14:45:32 1999 Dave Brolley <brolley@cygnus.com>
-
- * traps.c (sim_engine_invalid_insn): Return PC.
-
-Thu Sep 2 18:15:53 1999 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-1999-08-31 Doug Evans <devans@casey.cygnus.com>
-
- * sem.c: Rebuild.
-
-1999-08-09 Doug Evans <devans@casey.cygnus.com>
-
- * cpu.h,decode.c,decode.h,model.c,sem-switch.c,sem.c: Rebuild.
-
-1999-08-04 Doug Evans <devans@casey.cygnus.com>
-
- * cpu.h,cpuall.h,decode.c,model.c,sem-switch.c,sem.c: Rebuild.
-
-1999-07-06 Doug Evans <devans@casey.cygnus.com>
-
- * cpu.h,decode.h,model.c,sem-switch.c,sem.c: Rebuild.
-
-1999-05-08 Felix Lee <flee@cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Fri Apr 16 16:50:31 1999 Doug Evans <devans@charmed.cygnus.com>
-
- * devices.c (device_io_read_buffer): New arg `sd'.
- (device_io_write_buffer): New arg `sd'.
- (device_error): Give proper arg spec.
-
-1999-04-10 Doug Evans <devans@casey.cygnus.com>
-
- * cpu.h,sem-switch.c,sem.c: Rebuild.
-
-1999-03-27 Doug Evans <devans@casey.cygnus.com>
-
- * decode.c: Rebuild.
-
-1999-03-22 Doug Evans <devans@casey.cygnus.com>
-
- * arch.c,arch.h,model.c: Rebuild.
- * fr30.c (fr30bf_fetch_register): Replace calls to a_fr30_h_* with
- calls to fr30bf_h_*.
- (fr30bf_store_register): Ditto.
- * traps.c (setup_int): Ditto.
- * sim-if.c (sim_open): Update call to fr30_cgen_cpu_open.
-
-Mon Mar 22 13:13:05 1999 Dave Brolley <brolley@cygnus.com>
-
- * configure.in: Use SIM_AC_OPTION_ALIGNMENT(FORCED_ALIGNMENT).
- * configure: Regenerate.
- * cpu.h: Regenerate.
-
-1999-03-11 Doug Evans <devans@casey.cygnus.com>
-
- * arch.c,arch.h,cpu.c,cpu.h: Rebuild.
- * fr30-sim.h (GET_H_SBIT,SET_H_SBIT): Delete.
- (GET_H_CCR,SET_H_CCR,GET_H_SCR,SET_H_SCR,GET_H_ILM,SET_H_ILM): Delete.
- (GET_H_PS,SET_H_PS,GET_H_DR,SET_H_DR): Delete.
- * sim-if.c (sim_open): Update call to fr30_cgen_cpu_open.
-
-1999-02-25 Doug Evans <devans@casey.cygnus.com>
-
- * cpu.h: Rebuild.
-
-1999-02-09 Doug Evans <devans@casey.cygnus.com>
-
- * Makefile.in (SIM_EXTRA_DEPS): Add fr30-desc.h, delete cpu-opc.h.
- * configure.in (sim_link_files,sim_link_links): Delete.
- * configure: Rebuild.
- * decode.c,decode.h,model.c,sem-switch.c,sem.c: Rebuild.
- * fr30.c (fr30bf_model_fr30_1_u_cti): CGEN_INSN_ATTR renamed to
- CGEN_INSN_ATTR_VALUE.
- * mloop.in (extract-pbb): Ditto. Use idesc->length to get insn length.
- * sim-if.c (sim_open): fr30_cgen_cpu_open renamed from
- fr30_cgen_opcode_open. Set disassembler.
- (sim_close): fr30_cgen_cpu_open renamed from fr30_cgen_opcode_open.
- * sim-main.h: Don't include cpu-opc.h,cpu-sim.h. Include
- fr30-desc.h,fr30-opc.h,fr30-sim.h.
-
-1999-01-27 Doug Evans <devans@casey.cygnus.com>
-
- * cpu.h,decode.c,model.c,sem-switch.c,sem.c: Rebuild.
-
-1999-01-15 Doug Evans <devans@casey.cygnus.com>
-
- * cpu.h,decode.h,model.c: Regenerate.
- * fr30.c (fr30bf_model_insn_before): Clear load_regs_pending.
- (fr30bf_model_insn_after): Copy load_regs_pending to load_regs.
- (fr30bf_model_fr30_1_u_exec): Check for load stalls.
- (fr30bf_model_fr30_1_u_{cti,load,store}): Ditto.
-
-1999-01-14 Doug Evans <devans@casey.cygnus.com>
-
- * arch.c,arch.h,cpuall.h: Regenerate.
- * cpu.c,cpu.h,decode.c,decode.h,model.c,sem-switch.c,sem.c: Regenerate.
- * devices.c (device_io_write_buffer): Remove some m32r cruft.
- * fr30-sim.h (FR30_MISC_PROFILE): Delete, plus supporting macros.
- (EIT_*,MSPR_*,MLCR_*,MPMR_*): Delete, m32r cruft.
- * fr30.c (fr30bf_model_insn_after): Update cycle counts.
- (check_load_stall): New function.
- (fr30bf_model_fr30_1_u_exec): Update argument list.
- (fr30bf_model_fr30_1_u_{cti,load,store,ldm,stm}): New functions.
- * sim-if.c (sim_open): Comment out memory mapped device allocation.
- Delete FR30_MISC_PROFILE handling.
- (print_fr30_misc_cpu): Delete.
- * sim-main.h (_sim_cpu): Delete member fr30_misc_profile.
- * traps.c (sim_engine_invalid_insn): PCADDR->IADDR.
-
-1999-01-11 Doug Evans <devans@casey.cygnus.com>
-
- * Makefile.in (fr30-clean): rm eng.h.
-
- * sim-main.h: Delete inclusion of ansidecl.h.
- Include sim-basics.h before cgen-types.h.
- Delete inclusion of cgen-scache.h,cgen-cpu.h,cgen-trace.h,cpuall.h.
- * cpu.h,sem-switch.c,sem.c: Regenerate.
-
-1999-01-05 Doug Evans <devans@casey.cygnus.com>
-
- * Makefile.in (MAIN_INCLUDE_DEPS): Delete.
- (INCLUDE_DEPS,OPS_INCLUDE_DEPS): Delete.
- (sim-if.o,arch.o,devices.o): Use SIM_MAIN_DEPS.
- (FR30BF_INCLUDE_DEPS): Use CGEN_MAIN_CPU_DEPS.
- (mloop.o,cpu.o,decode.o,sem.o,model.o): Simplify dependencies.
- * cpu.c,cpu.h,decode.c,model.c,sem-switch.c,sem.c: Regenerate.
- * fr30-sim.h (fr30bf_h_sbit_[gs]et_handler): Declare.
- ([GS]ET_H_SBIT): Define.
- (fr30bf_h_ccr_[gs]et_handler): Declare.
- ([GS]ET_H_CCR): Define.
- (fr30bf_h_scr_[gs]et_handler): Declare.
- ([GS]ET_H_SCR): Define.
- (fr30bf_h_ilm_[gs]et_handler): Declare.
- ([GS]ET_H_ILM): Define.
- (fr30bf_h_ps_[gs]et_handler): Declare.
- ([GS]ET_H_PS): Define.
- (fr30bf_h_dr_[gs]et_handler): Declare.
- ([GS]ET_H_DR): Define.
- * fr30.c (all register access fns): Rename to ..._handler.
- (fr30bf_h_*_get_handler,fr30bf_h_*_set_handler): Rewrite to use
- CPU or GET_H_FOO/SET_H_FOO access macros as appropriate.
- * sim-if.c (sim_open): Model probing code moved to sim-model.c.
-
-Fri Dec 18 17:09:34 1998 Dave Brolley <brolley@cygnus.com>
-
- * fr30.c (fr30bf_store_register): Call a_fr30_h_dr_set for
- dedicated registers.
-
-Thu Dec 17 17:17:48 1998 Dave Brolley <brolley@cygnus.com>
-
- * sem-switch.c,sem.c: Regenerate.
-
-Tue Dec 15 17:39:59 1998 Dave Brolley <brolley@cygnus.com>
-
- * traps.c (setup_int): Correct calls to SETMEMSI.
- (fr30_int): Must calculate new pc after saving old one.
- * fr30.c (fr30bf_h_sbit_get): New function.
- (fr30bf_h_sbit_set): New function.
- (fr30bf_h_ccr_set): Use fr30bf_h_sbit_set and move stack switching
- logic to that function.
- * cpu.[ch],decode.c,model.c,sem-switch.c,sem.c: Regenerate.
-
-1998-12-14 Doug Evans <devans@casey.cygnus.com>
-
- * configure.in: --enable-cgen-maint moved to common/aclocal.m4.
- * configure: Regenerate.
-
- * sem-switch.c,sem.c: Regenerate.
-
- * traps.c (setup_int): Use enums for register numbers.
- (fr30_int): Ditto.
-
-1998-12-14 Dave Brolley <brolley@cygnus.com>
-
- * cpu.h,decode.[ch],model.c,sem-switch.c,sem.c: Regenerate.
-
-Thu Dec 10 18:43:13 1998 Dave Brolley <brolley@cygnus.com>
-
- * arch.[ch],cpu.[ch],decode.c,model.c,sem-switch.c,sem.c: Regenerate.
- * fr30.c (fr30bf_h_scr_get): Implement as separate bits.
- (fr30bf_h_scr_set): Implement as separate bits.
-
-Wed Dec 9 13:25:37 1998 Doug Evans <devans@canuck.cygnus.com>
-
- * cpu.h,decode.c,sem-switch.c,sem.c: Regenerate.
-
-Tue Dec 8 13:15:23 1998 Dave Brolley <brolley@cygnus.com>
-
- * cpu.h,decode.c,model.c,sem-switch.c,sem.c: Regenerate.
-
-Mon Dec 7 14:35:23 1998 Dave Brolley <brolley@cygnus.com>
-
- * traps.c (fr30_inte): New function.
- * cpu.h,decode.c,model.c,sem-switch.c,sem.c: Regenerate.
-
-1998-12-05 Doug Evans <devans@casey.cygnus.com>
-
- * cpu.h,cpuall.h,decode.c,sem-switch.c,sem.c: Regenerate.
- * mloop.in (extract): Make static inline. Rewrite.
- (execute): Check ARGBUF_PROFILE_P before profiling.
- Update calls to TRACE_INSN_INIT,TRACE_INSN_FINI.
-
-Fri Dec 4 16:18:25 1998 Doug Evans <devans@canuck.cygnus.com>
-
- * sem.c,sem-switch.c: Regenerate.
- * cpu.h,decode.c: Regenerate.
-
-Fri Dec 4 17:09:27 1998 Dave Brolley <brolley@cygnus.com>
-
- * cpu.h,decode.c,decode.h,model.c,sem-switch.c,sem.c: Regenerate.
-
-Fri Dec 4 00:22:43 1998 Doug Evans <devans@canuck.cygnus.com>
-
- * cpu.h,decode.c,model.c,sem-switch.c,sem.c: Regenerate.
-
-Thu Dec 3 17:33:16 1998 Dave Brolley <brolley@cygnus.com>
-
- * fr30.c (fr30bf_h_ccr_get): New function.
- (fr30bf_h_ccr_set): New function.
- (fr30bf_h_ps_get): Use ccr access function.
- (fr30bf_h_ps_set): Use ccr access function.
- (fr30bf_h_scr_get): New function.
- (fr30bf_h_scr_set): New function.
- (fr30bf_h_ilm_get): New function.
- (fr30bf_h_ilm_set): New function
- (fr30bf_h_ps_get): Implement src and ilm.
- (fr30bf_h_ps_set): Implement src and ilm.
-
- * arch.c,arch.h,cpu.h,decode.c,decode.h,model.c,
- sem-switch.c,sem.c: Regenerate.
-
-Thu Dec 3 00:15:11 1998 Doug Evans <devans@canuck.cygnus.com>
-
- * cpu.h,decode.c,model.c,sem-switch.c,sem.c: Regenerate.
-
-1998-11-30 Doug Evans <devans@casey.cygnus.com>
-
- * mloop.in (extract-pbb): Add delay slot support.
- * cpu.h,decode.c,decode.h,model.c,sem-switch.c,sem.c: Regenerate.
-
-Thu Nov 26 11:28:30 1998 Dave Brolley <brolley@cygnus.com>
-
- * cpu.h,decode.c,model.c,sem.c,sem-switch.c: Regenerated.
-
-Mon Nov 23 18:30:36 1998 Dave Brolley <brolley@cygnus.com>
-
- * cpu.h,decode.c,model.c,sem-switch.c,sem.c: Regenerated.
-
-1998-11-20 Doug Evans <devans@tobor.to.cygnus.com>
-
- * fr30-sim.h (*-REGNUM): Sync up with gdb.
- * fr30.c (decode_gdb_dr_regnum): New function.
- (fr30bf_fetch_register): Implement.
- (fr30bf_store_register): Ditto.
- (fr30bf_h_ps_get,fr30bf_h_ps_set): Ditto.
- (fr30bf_h_dr_get,fr30bf_h_dr_set): New functions.
- * sem-switch.c,sem.c: Rebuild.
- * traps.c (setup_int): New function
- (fr30_int): Handle all int insn processing here.
- Don't save ps,pc if breakpoint trap.
- * cpu.c,cpu.h,decode.c,sem-switch.c,sem.c: Regenerate.
-
-Thu Nov 19 16:05:09 1998 Dave Brolley <brolley@cygnus.com>
-
- * traps.c (fr30_int): Correct register usage.
- * arch.c: Regenerated.
- * arch.h: Regenerated.
- * cpu.c: Regenerated.
- * cpu.h: Regenerated.
- * decode.c: Regenerated.
- * decode.h: Regenerated.
- * model.c: Regenerated.
- * sem-switch.c: Regenerated.
- * sem.c: Regenerated.
-
-Wed Nov 18 21:39:37 1998 Dave Brolley <brolley@cygnus.com>
-
- * fr30-sim.h (TRAP_SYSCALL, TRAP_BREAKPOINT): Redefine for fr30.
- * fr30.c (fr30bf_h_ps_get): New function.
- (fr30bf_h_ps_set): New function.
- * mloop.in: Set up fast-pbb model for fr30.
- * traps.c (fr30_int): New function.
- * arch.c: Regenerated.
- * arch.h: Regenerated.
- * cpu.c: Regenerated.
- * cpu.h: Regenerated.
- * decode.c: Regenerated.
- * model.c: Regenerated.
- * sem-switch.c: Regenerated.
- * sem.c: Regenerated.
-
-1998-11-18 Doug Evans <devans@casey.cygnus.com>
-
- * Makefile.in (FR30_OBJS): Delete extract.o.
- (FR30BF_INCLUDE_DEPS): Add cgen-engine.h.
- (extract.o): Delete rule for.
- * mloop.in: Rewrite.
- * cpu.c,cpu.h,decode.c,decode.h,model.c,sem-switch.c,sem.c: Rebuild.
-
-Wed Nov 18 11:31:21 1998 Dave Brolley <brolley@cygnus.com>
-
- * sem-switch.c: Regenerated.
- * sem.c: Regenerated.
-
-Mon Nov 16 19:23:44 1998 Dave Brolley <brolley@cygnus.com>
-
- * arch.c: Regenerated.
- * arch.h: Regenerated.
- * cpu.c: Regenerated.
- * cpu.h: Regenerated.
- * decode.c: Regenerated.
- * decode.h: Regenerated.
- * extract.c: Regenerated.
- * model.c: Regenerated.
- * sem-switch.c: Regenerated.
- * sem.c: Regenerated.
-
-Thu Nov 12 19:27:50 1998 Dave Brolley <brolley@cygnus.com>
-
- * arch.c: Regenerated.
- * arch.h: Regenerated.
- * cpu.c: Regenerated.
- * cpu.h: Regenerated.
- * decode.c: Regenerated.
- * decode.h: Regenerated.
- * extract.c: Regenerated.
- * model.c: Regenerated.
- * sem-switch.c: Regenerated.
- * sem.c: Regenerated.
- * fr30.c: Get rid of unused functions.
-
-Mon Nov 9 18:25:47 1998 Dave Brolley <brolley@cygnus.com>
-
- * arch.c: Regenerated.
- * arch.h: Regenerated.
- * cpu.c: Regenerated.
- * cpu.h: Regenerated.
- * decode.c: Regenerated.
- * decode.h: Regenerated.
- * extract.c: Regenerated.
- * model.c: Regenerated.
- * sem-switch.c: Regenerated.
- * sem.c: Regenerated.
- * fr30.c: Get rid of m32r stuff. Flesh out fr30 stuff.
-
-Thu Nov 5 15:26:22 1998 Dave Brolley <brolley@cygnus.com>
-
- * cpu.h: Regenerated.
-
-Tue Oct 27 15:39:48 1996 Dave Brolley <brolley@cygnus.com>
-
- * Directory created.
diff --git a/sim/fr30/Makefile.in b/sim/fr30/Makefile.in
deleted file mode 100644
index 2a0ac83e01f..00000000000
--- a/sim/fr30/Makefile.in
+++ /dev/null
@@ -1,107 +0,0 @@
-# Makefile template for Configure for the fr30 simulator
-# Copyright (C) 1998, 2000 Free Software Foundation, Inc.
-# Contributed by Cygnus Support.
-#
-# This program is free software; you can redistribute it and/or modify
-# it under the terms of the GNU General Public License as published by
-# the Free Software Foundation; either version 2 of the License, or
-# (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License along
-# with this program; if not, write to the Free Software Foundation, Inc.,
-# 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
-## COMMON_PRE_CONFIG_FRAG
-
-FR30_OBJS = fr30.o cpu.o decode.o sem.o model.o arch.o mloop.o
-
-CONFIG_DEVICES = dv-sockser.o
-CONFIG_DEVICES =
-
-SIM_OBJS = \
- $(SIM_NEW_COMMON_OBJS) \
- sim-cpu.o \
- sim-hload.o \
- sim-hrw.o \
- sim-model.o \
- sim-reg.o \
- cgen-utils.o cgen-trace.o cgen-scache.o \
- cgen-run.o sim-reason.o sim-engine.o sim-stop.o \
- sim-if.o \
- $(FR30_OBJS) \
- traps.o devices.o \
- $(CONFIG_DEVICES)
-
-# Extra headers included by sim-main.h.
-SIM_EXTRA_DEPS = \
- $(CGEN_INCLUDE_DEPS) \
- arch.h cpuall.h fr30-sim.h $(srcdir)/../../opcodes/fr30-desc.h
-
-SIM_EXTRA_CFLAGS =
-
-SIM_RUN_OBJS = nrun.o
-SIM_EXTRA_CLEAN = fr30-clean
-
-# This selects the fr30 newlib/libgloss syscall definitions.
-NL_TARGET = -DNL_TARGET_fr30
-
-## COMMON_POST_CONFIG_FRAG
-
-arch = fr30
-
-sim-if.o: sim-if.c $(SIM_MAIN_DEPS) $(srcdir)/../common/sim-core.h
-
-arch.o: arch.c $(SIM_MAIN_DEPS)
-
-devices.o: devices.c $(SIM_MAIN_DEPS)
-
-# FR30 objs
-
-FR30BF_INCLUDE_DEPS = \
- $(CGEN_MAIN_CPU_DEPS) \
- cpu.h decode.h eng.h
-
-fr30.o: fr30.c $(FR30BF_INCLUDE_DEPS)
-
-# FIXME: Use of `mono' is wip.
-mloop.c eng.h: stamp-mloop
-stamp-mloop: $(srcdir)/../common/genmloop.sh mloop.in Makefile
- $(SHELL) $(srccom)/genmloop.sh \
- -mono -fast -pbb -switch sem-switch.c \
- -cpu fr30bf -infile $(srcdir)/mloop.in
- $(SHELL) $(srcroot)/move-if-change eng.hin eng.h
- $(SHELL) $(srcroot)/move-if-change mloop.cin mloop.c
- touch stamp-mloop
-mloop.o: mloop.c sem-switch.c $(FR30BF_INCLUDE_DEPS)
-
-cpu.o: cpu.c $(FR30BF_INCLUDE_DEPS)
-decode.o: decode.c $(FR30BF_INCLUDE_DEPS)
-sem.o: sem.c $(FR30BF_INCLUDE_DEPS)
-model.o: model.c $(FR30BF_INCLUDE_DEPS)
-
-fr30-clean:
- rm -f mloop.c eng.h stamp-mloop
- rm -f tmp-*
- rm -f stamp-arch stamp-cpu
-
-# cgen support, enable with --enable-cgen-maint
-CGEN_MAINT = ; @true
-# The following line is commented in or out depending upon --enable-cgen-maint.
-@CGEN_MAINT@CGEN_MAINT =
-
-stamp-arch: $(CGEN_READ_SCM) $(CGEN_ARCH_SCM) $(CGEN_CPU_DIR)/fr30.cpu
- $(MAKE) cgen-arch $(CGEN_FLAGS_TO_PASS) mach=all \
- FLAGS="with-scache with-profile=fn"
- touch stamp-arch
-arch.h arch.c cpuall.h: $(CGEN_MAINT) stamp-arch
-
-stamp-cpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CGEN_CPU_DIR)/fr30.cpu
- $(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \
- cpu=fr30bf mach=fr30 SUFFIX= FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"
- touch stamp-cpu
-cpu.h sem.c sem-switch.c model.c decode.c decode.h: $(CGEN_MAINT) stamp-cpu
diff --git a/sim/fr30/README b/sim/fr30/README
deleted file mode 100644
index 47bf314943e..00000000000
--- a/sim/fr30/README
+++ /dev/null
@@ -1,14 +0,0 @@
-This is the fr30 simulator directory.
-
-It is still work-in-progress. The current sources are reasonably
-well tested and lots of features are in. However, there's lots
-more yet to come.
-
-There are lots of machine generated files in the source directory!
-They are only generated if you configure with --enable-cgen-maint,
-similar in behaviour to Makefile.in, configure under automake/autoconf.
-
-For details on the generator, see ../../cgen.
-
-devo/cgen isn't part of the comp-tools module yet.
-You'll need to check it out manually (also akin to automake/autoconf).
diff --git a/sim/fr30/TODO b/sim/fr30/TODO
deleted file mode 100644
index ae4c76078f2..00000000000
--- a/sim/fr30/TODO
+++ /dev/null
@@ -1,14 +0,0 @@
-m32r-inherited stuff?
-----------------------
-- header file dependencies revisit
-- hooks cleanup
-- testsuites
-- FIXME's
-
-
-m32r stuff?
-----------------------
-- memory accesses still test if profiling is on even in fast mode
-- have semantic code use G/SET_H_FOO if not default [incl fun-access]
-- have G/SET_H_FOO macros call function if fun-access
-- --> can always use G/S_H_FOO macros
diff --git a/sim/fr30/arch.c b/sim/fr30/arch.c
deleted file mode 100644
index a8404d83a46..00000000000
--- a/sim/fr30/arch.c
+++ /dev/null
@@ -1,35 +0,0 @@
-/* Simulator support for fr30.
-
-THIS FILE IS MACHINE GENERATED WITH CGEN.
-
-Copyright (C) 1996, 1997, 1998, 1999, 2000 Free Software Foundation, Inc.
-
-This file is part of the GNU Simulators.
-
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License along
-with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
-*/
-
-#include "sim-main.h"
-#include "bfd.h"
-
-const MACH *sim_machs[] =
-{
-#ifdef HAVE_CPU_FR30BF
- & fr30_mach,
-#endif
- 0
-};
-
diff --git a/sim/fr30/arch.h b/sim/fr30/arch.h
deleted file mode 100644
index dc92099e85c..00000000000
--- a/sim/fr30/arch.h
+++ /dev/null
@@ -1,45 +0,0 @@
-/* Simulator header for fr30.
-
-THIS FILE IS MACHINE GENERATED WITH CGEN.
-
-Copyright (C) 1996, 1997, 1998, 1999, 2000 Free Software Foundation, Inc.
-
-This file is part of the GNU Simulators.
-
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License along
-with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
-*/
-
-#ifndef FR30_ARCH_H
-#define FR30_ARCH_H
-
-#define TARGET_BIG_ENDIAN 1
-
-/* Enum declaration for model types. */
-typedef enum model_type {
- MODEL_FR30_1, MODEL_MAX
-} MODEL_TYPE;
-
-#define MAX_MODELS ((int) MODEL_MAX)
-
-/* Enum declaration for unit types. */
-typedef enum unit_type {
- UNIT_NONE, UNIT_FR30_1_U_STM, UNIT_FR30_1_U_LDM, UNIT_FR30_1_U_STORE
- , UNIT_FR30_1_U_LOAD, UNIT_FR30_1_U_CTI, UNIT_FR30_1_U_EXEC, UNIT_MAX
-} UNIT_TYPE;
-
-#define MAX_UNITS (3)
-
-#endif /* FR30_ARCH_H */
diff --git a/sim/fr30/config.in b/sim/fr30/config.in
deleted file mode 100644
index 9723b8662c9..00000000000
--- a/sim/fr30/config.in
+++ /dev/null
@@ -1,162 +0,0 @@
-/* config.in. Generated automatically from configure.in by autoheader. */
-
-/* Define if using alloca.c. */
-#undef C_ALLOCA
-
-/* Define to empty if the keyword does not work. */
-#undef const
-
-/* Define to one of _getb67, GETB67, getb67 for Cray-2 and Cray-YMP systems.
- This function is required for alloca.c support on those systems. */
-#undef CRAY_STACKSEG_END
-
-/* Define if you have alloca, as a function or macro. */
-#undef HAVE_ALLOCA
-
-/* Define if you have <alloca.h> and it should be used (not on Ultrix). */
-#undef HAVE_ALLOCA_H
-
-/* Define if you have a working `mmap' system call. */
-#undef HAVE_MMAP
-
-/* Define as __inline if that's what the C compiler calls it. */
-#undef inline
-
-/* Define to `long' if <sys/types.h> doesn't define. */
-#undef off_t
-
-/* Define if you need to in order for stat and other things to work. */
-#undef _POSIX_SOURCE
-
-/* Define as the return type of signal handlers (int or void). */
-#undef RETSIGTYPE
-
-/* Define to `unsigned' if <sys/types.h> doesn't define. */
-#undef size_t
-
-/* If using the C implementation of alloca, define if you know the
- direction of stack growth for your system; otherwise it will be
- automatically deduced at run-time.
- STACK_DIRECTION > 0 => grows toward higher addresses
- STACK_DIRECTION < 0 => grows toward lower addresses
- STACK_DIRECTION = 0 => direction of growth unknown
- */
-#undef STACK_DIRECTION
-
-/* Define if you have the ANSI C header files. */
-#undef STDC_HEADERS
-
-/* Define if your processor stores words with the most significant
- byte first (like Motorola and SPARC, unlike Intel and VAX). */
-#undef WORDS_BIGENDIAN
-
-/* Define to 1 if NLS is requested. */
-#undef ENABLE_NLS
-
-/* Define as 1 if you have gettext and don't want to use GNU gettext. */
-#undef HAVE_GETTEXT
-
-/* Define as 1 if you have the stpcpy function. */
-#undef HAVE_STPCPY
-
-/* Define if your locale.h file contains LC_MESSAGES. */
-#undef HAVE_LC_MESSAGES
-
-/* Define if you have the __argz_count function. */
-#undef HAVE___ARGZ_COUNT
-
-/* Define if you have the __argz_next function. */
-#undef HAVE___ARGZ_NEXT
-
-/* Define if you have the __argz_stringify function. */
-#undef HAVE___ARGZ_STRINGIFY
-
-/* Define if you have the __setfpucw function. */
-#undef HAVE___SETFPUCW
-
-/* Define if you have the dcgettext function. */
-#undef HAVE_DCGETTEXT
-
-/* Define if you have the getcwd function. */
-#undef HAVE_GETCWD
-
-/* Define if you have the getpagesize function. */
-#undef HAVE_GETPAGESIZE
-
-/* Define if you have the getrusage function. */
-#undef HAVE_GETRUSAGE
-
-/* Define if you have the munmap function. */
-#undef HAVE_MUNMAP
-
-/* Define if you have the putenv function. */
-#undef HAVE_PUTENV
-
-/* Define if you have the setenv function. */
-#undef HAVE_SETENV
-
-/* Define if you have the setlocale function. */
-#undef HAVE_SETLOCALE
-
-/* Define if you have the sigaction function. */
-#undef HAVE_SIGACTION
-
-/* Define if you have the stpcpy function. */
-#undef HAVE_STPCPY
-
-/* Define if you have the strcasecmp function. */
-#undef HAVE_STRCASECMP
-
-/* Define if you have the strchr function. */
-#undef HAVE_STRCHR
-
-/* Define if you have the time function. */
-#undef HAVE_TIME
-
-/* Define if you have the <argz.h> header file. */
-#undef HAVE_ARGZ_H
-
-/* Define if you have the <fcntl.h> header file. */
-#undef HAVE_FCNTL_H
-
-/* Define if you have the <fpu_control.h> header file. */
-#undef HAVE_FPU_CONTROL_H
-
-/* Define if you have the <limits.h> header file. */
-#undef HAVE_LIMITS_H
-
-/* Define if you have the <locale.h> header file. */
-#undef HAVE_LOCALE_H
-
-/* Define if you have the <malloc.h> header file. */
-#undef HAVE_MALLOC_H
-
-/* Define if you have the <nl_types.h> header file. */
-#undef HAVE_NL_TYPES_H
-
-/* Define if you have the <stdlib.h> header file. */
-#undef HAVE_STDLIB_H
-
-/* Define if you have the <string.h> header file. */
-#undef HAVE_STRING_H
-
-/* Define if you have the <strings.h> header file. */
-#undef HAVE_STRINGS_H
-
-/* Define if you have the <sys/param.h> header file. */
-#undef HAVE_SYS_PARAM_H
-
-/* Define if you have the <sys/resource.h> header file. */
-#undef HAVE_SYS_RESOURCE_H
-
-/* Define if you have the <sys/time.h> header file. */
-#undef HAVE_SYS_TIME_H
-
-/* Define if you have the <time.h> header file. */
-#undef HAVE_TIME_H
-
-/* Define if you have the <unistd.h> header file. */
-#undef HAVE_UNISTD_H
-
-/* Define if you have the <values.h> header file. */
-#undef HAVE_VALUES_H
diff --git a/sim/fr30/configure b/sim/fr30/configure
deleted file mode 100644
index 2c537d36e6b..00000000000
--- a/sim/fr30/configure
+++ /dev/null
@@ -1,4294 +0,0 @@
-#! /bin/sh
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-sim_inline="-DDEFAULT_INLINE=0"
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-# This file is derived from `gettext.m4'. The difference is that the
-# included macros assume Cygnus-style source and build trees.
-
-# Macro to add for using GNU gettext.
-# Ulrich Drepper <drepper@cygnus.com>, 1995.
-#
-# This file file be copied and used freely without restrictions. It can
-# be used in projects which are not available under the GNU Public License
-# but which still want to provide support for the GNU gettext functionality.
-# Please note that the actual code is *not* freely available.
-
-# serial 3
-
-
-
-
-
-# Search path for a program which passes the given test.
-# Ulrich Drepper <drepper@cygnus.com>, 1996.
-#
-# This file file be copied and used freely without restrictions. It can
-# be used in projects which are not available under the GNU Public License
-# but which still want to provide support for the GNU gettext functionality.
-# Please note that the actual code is *not* freely available.
-
-# serial 1
-
-
-
-# Check whether LC_MESSAGES is available in <locale.h>.
-# Ulrich Drepper <drepper@cygnus.com>, 1995.
-#
-# This file file be copied and used freely without restrictions. It can
-# be used in projects which are not available under the GNU Public License
-# but which still want to provide support for the GNU gettext functionality.
-# Please note that the actual code is *not* freely available.
-
-# serial 1
-
-
-
-
-
-
-# Guess values for system-dependent variables and create Makefiles.
-# Generated automatically using autoconf version 2.13
-# Copyright (C) 1992, 93, 94, 95, 96 Free Software Foundation, Inc.
-#
-# This configure script is free software; the Free Software Foundation
-# gives unlimited permission to copy, distribute and modify it.
-
-# Defaults:
-ac_help=
-ac_default_prefix=/usr/local
-# Any additions from configure.in:
-ac_help="$ac_help
- --disable-nls do not use Native Language Support"
-ac_help="$ac_help
- --with-included-gettext use the GNU gettext library included here"
-ac_help="$ac_help
- --enable-maintainer-mode Enable developer functionality."
-ac_help="$ac_help
- --enable-sim-bswap Use Host specific BSWAP instruction."
-ac_help="$ac_help
- --enable-sim-cflags=opts Extra CFLAGS for use in building simulator"
-ac_help="$ac_help
- --enable-sim-debug=opts Enable debugging flags"
-ac_help="$ac_help
- --enable-sim-stdio Specify whether to use stdio for console input/output."
-ac_help="$ac_help
- --enable-sim-trace=opts Enable tracing flags"
-ac_help="$ac_help
- --enable-sim-profile=opts Enable profiling flags"
-ac_help="$ac_help
- --enable-sim-endian=endian Specify target byte endian orientation."
-ac_help="$ac_help
- --enable-sim-alignment=align Specify strict, nonstrict or forced alignment of memory accesses."
-ac_help="$ac_help
- --enable-sim-hostendian=end Specify host byte endian orientation."
-ac_help="$ac_help
- --enable-sim-scache=size Specify simulator execution cache size."
-ac_help="$ac_help
- --enable-sim-default-model=model Specify default model to simulate."
-ac_help="$ac_help
- --enable-sim-environment=environment Specify mixed, user, virtual or operating environment."
-ac_help="$ac_help
- --enable-cgen-maint[=DIR] build cgen generated files"
-
-# Initialize some variables set by options.
-# The variables have the same names as the options, with
-# dashes changed to underlines.
-build=NONE
-cache_file=./config.cache
-exec_prefix=NONE
-host=NONE
-no_create=
-nonopt=NONE
-no_recursion=
-prefix=NONE
-program_prefix=NONE
-program_suffix=NONE
-program_transform_name=s,x,x,
-silent=
-site=
-sitefile=
-srcdir=
-target=NONE
-verbose=
-x_includes=NONE
-x_libraries=NONE
-bindir='${exec_prefix}/bin'
-sbindir='${exec_prefix}/sbin'
-libexecdir='${exec_prefix}/libexec'
-datadir='${prefix}/share'
-sysconfdir='${prefix}/etc'
-sharedstatedir='${prefix}/com'
-localstatedir='${prefix}/var'
-libdir='${exec_prefix}/lib'
-includedir='${prefix}/include'
-oldincludedir='/usr/include'
-infodir='${prefix}/info'
-mandir='${prefix}/man'
-
-# Initialize some other variables.
-subdirs=
-MFLAGS= MAKEFLAGS=
-SHELL=${CONFIG_SHELL-/bin/sh}
-# Maximum number of lines to put in a shell here document.
-ac_max_here_lines=12
-
-ac_prev=
-for ac_option
-do
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- # If the previous option needs an argument, assign it.
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-
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- *) ac_optarg= ;;
- esac
-
- # Accept the important Cygnus configure options, so we can diagnose typos.
-
- case "$ac_option" in
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- -build=* | --build=* | --buil=* | --bui=* | --bu=*)
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- if test -n "$ac_help"; then
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- -host=* | --host=* | --hos=* | --ho=*)
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-const char *g = "string";
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-{ /* SCO 3.2v4 cc rejects this. */
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-
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-{ /* Someone thinks the Sun supposedly-ANSI compiler will reject this. */
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-{ /* Sun SC1.0 ANSI compiler rejects this -- but not the above. */
- typedef const int *iptr;
- iptr p = 0;
- ++p;
-}
-{ /* AIX XL C 1.02.0.0 rejects this saying
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- struct s { int j; const int *ap[3]; };
- struct s *b; b->j = 5;
-}
-{ /* ULTRIX-32 V3.1 (Rev 9) vcc rejects this */
- const int foo = 10;
-}
-
-; return 0; }
-EOF
-if { (eval echo configure:979: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
- rm -rf conftest*
- ac_cv_c_const=yes
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- ac_cv_c_const=no
-fi
-rm -f conftest*
-fi
-
-echo "$ac_t""$ac_cv_c_const" 1>&6
-if test $ac_cv_c_const = no; then
- cat >> confdefs.h <<\EOF
-#define const
-EOF
-
-fi
-
-echo $ac_n "checking for inline""... $ac_c" 1>&6
-echo "configure:1000: checking for inline" >&5
-if eval "test \"`echo '$''{'ac_cv_c_inline'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- ac_cv_c_inline=no
-for ac_kw in inline __inline__ __inline; do
- cat > conftest.$ac_ext <<EOF
-#line 1007 "configure"
-#include "confdefs.h"
-
-int main() {
-} $ac_kw foo() {
-; return 0; }
-EOF
-if { (eval echo configure:1014: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
- rm -rf conftest*
- ac_cv_c_inline=$ac_kw; break
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
-fi
-rm -f conftest*
-done
-
-fi
-
-echo "$ac_t""$ac_cv_c_inline" 1>&6
-case "$ac_cv_c_inline" in
- inline | yes) ;;
- no) cat >> confdefs.h <<\EOF
-#define inline
-EOF
- ;;
- *) cat >> confdefs.h <<EOF
-#define inline $ac_cv_c_inline
-EOF
- ;;
-esac
-
-echo $ac_n "checking for off_t""... $ac_c" 1>&6
-echo "configure:1040: checking for off_t" >&5
-if eval "test \"`echo '$''{'ac_cv_type_off_t'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1045 "configure"
-#include "confdefs.h"
-#include <sys/types.h>
-#if STDC_HEADERS
-#include <stdlib.h>
-#include <stddef.h>
-#endif
-EOF
-if (eval "$ac_cpp conftest.$ac_ext") 2>&5 |
- egrep "(^|[^a-zA-Z_0-9])off_t[^a-zA-Z_0-9]" >/dev/null 2>&1; then
- rm -rf conftest*
- ac_cv_type_off_t=yes
-else
- rm -rf conftest*
- ac_cv_type_off_t=no
-fi
-rm -f conftest*
-
-fi
-echo "$ac_t""$ac_cv_type_off_t" 1>&6
-if test $ac_cv_type_off_t = no; then
- cat >> confdefs.h <<\EOF
-#define off_t long
-EOF
-
-fi
-
-echo $ac_n "checking for size_t""... $ac_c" 1>&6
-echo "configure:1073: checking for size_t" >&5
-if eval "test \"`echo '$''{'ac_cv_type_size_t'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1078 "configure"
-#include "confdefs.h"
-#include <sys/types.h>
-#if STDC_HEADERS
-#include <stdlib.h>
-#include <stddef.h>
-#endif
-EOF
-if (eval "$ac_cpp conftest.$ac_ext") 2>&5 |
- egrep "(^|[^a-zA-Z_0-9])size_t[^a-zA-Z_0-9]" >/dev/null 2>&1; then
- rm -rf conftest*
- ac_cv_type_size_t=yes
-else
- rm -rf conftest*
- ac_cv_type_size_t=no
-fi
-rm -f conftest*
-
-fi
-echo "$ac_t""$ac_cv_type_size_t" 1>&6
-if test $ac_cv_type_size_t = no; then
- cat >> confdefs.h <<\EOF
-#define size_t unsigned
-EOF
-
-fi
-
-# The Ultrix 4.2 mips builtin alloca declared by alloca.h only works
-# for constant arguments. Useless!
-echo $ac_n "checking for working alloca.h""... $ac_c" 1>&6
-echo "configure:1108: checking for working alloca.h" >&5
-if eval "test \"`echo '$''{'ac_cv_header_alloca_h'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1113 "configure"
-#include "confdefs.h"
-#include <alloca.h>
-int main() {
-char *p = alloca(2 * sizeof(int));
-; return 0; }
-EOF
-if { (eval echo configure:1120: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- rm -rf conftest*
- ac_cv_header_alloca_h=yes
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- ac_cv_header_alloca_h=no
-fi
-rm -f conftest*
-fi
-
-echo "$ac_t""$ac_cv_header_alloca_h" 1>&6
-if test $ac_cv_header_alloca_h = yes; then
- cat >> confdefs.h <<\EOF
-#define HAVE_ALLOCA_H 1
-EOF
-
-fi
-
-echo $ac_n "checking for alloca""... $ac_c" 1>&6
-echo "configure:1141: checking for alloca" >&5
-if eval "test \"`echo '$''{'ac_cv_func_alloca_works'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1146 "configure"
-#include "confdefs.h"
-
-#ifdef __GNUC__
-# define alloca __builtin_alloca
-#else
-# ifdef _MSC_VER
-# include <malloc.h>
-# define alloca _alloca
-# else
-# if HAVE_ALLOCA_H
-# include <alloca.h>
-# else
-# ifdef _AIX
- #pragma alloca
-# else
-# ifndef alloca /* predefined by HP cc +Olibcalls */
-char *alloca ();
-# endif
-# endif
-# endif
-# endif
-#endif
-
-int main() {
-char *p = (char *) alloca(1);
-; return 0; }
-EOF
-if { (eval echo configure:1174: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- rm -rf conftest*
- ac_cv_func_alloca_works=yes
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- ac_cv_func_alloca_works=no
-fi
-rm -f conftest*
-fi
-
-echo "$ac_t""$ac_cv_func_alloca_works" 1>&6
-if test $ac_cv_func_alloca_works = yes; then
- cat >> confdefs.h <<\EOF
-#define HAVE_ALLOCA 1
-EOF
-
-fi
-
-if test $ac_cv_func_alloca_works = no; then
- # The SVR3 libPW and SVR4 libucb both contain incompatible functions
- # that cause trouble. Some versions do not even contain alloca or
- # contain a buggy version. If you still want to use their alloca,
- # use ar to extract alloca.o from them instead of compiling alloca.c.
- ALLOCA=alloca.${ac_objext}
- cat >> confdefs.h <<\EOF
-#define C_ALLOCA 1
-EOF
-
-
-echo $ac_n "checking whether alloca needs Cray hooks""... $ac_c" 1>&6
-echo "configure:1206: checking whether alloca needs Cray hooks" >&5
-if eval "test \"`echo '$''{'ac_cv_os_cray'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1211 "configure"
-#include "confdefs.h"
-#if defined(CRAY) && ! defined(CRAY2)
-webecray
-#else
-wenotbecray
-#endif
-
-EOF
-if (eval "$ac_cpp conftest.$ac_ext") 2>&5 |
- egrep "webecray" >/dev/null 2>&1; then
- rm -rf conftest*
- ac_cv_os_cray=yes
-else
- rm -rf conftest*
- ac_cv_os_cray=no
-fi
-rm -f conftest*
-
-fi
-
-echo "$ac_t""$ac_cv_os_cray" 1>&6
-if test $ac_cv_os_cray = yes; then
-for ac_func in _getb67 GETB67 getb67; do
- echo $ac_n "checking for $ac_func""... $ac_c" 1>&6
-echo "configure:1236: checking for $ac_func" >&5
-if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1241 "configure"
-#include "confdefs.h"
-/* System header to define __stub macros and hopefully few prototypes,
- which can conflict with char $ac_func(); below. */
-#include <assert.h>
-/* Override any gcc2 internal prototype to avoid an error. */
-/* We use char because int might match the return type of a gcc2
- builtin and then its argument prototype would still apply. */
-char $ac_func();
-
-int main() {
-
-/* The GNU C library defines this for functions which it implements
- to always fail with ENOSYS. Some functions are actually named
- something starting with __ and the normal name is an alias. */
-#if defined (__stub_$ac_func) || defined (__stub___$ac_func)
-choke me
-#else
-$ac_func();
-#endif
-
-; return 0; }
-EOF
-if { (eval echo configure:1264: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=yes"
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=no"
-fi
-rm -f conftest*
-fi
-
-if eval "test \"`echo '$ac_cv_func_'$ac_func`\" = yes"; then
- echo "$ac_t""yes" 1>&6
- cat >> confdefs.h <<EOF
-#define CRAY_STACKSEG_END $ac_func
-EOF
-
- break
-else
- echo "$ac_t""no" 1>&6
-fi
-
-done
-fi
-
-echo $ac_n "checking stack direction for C alloca""... $ac_c" 1>&6
-echo "configure:1291: checking stack direction for C alloca" >&5
-if eval "test \"`echo '$''{'ac_cv_c_stack_direction'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- if test "$cross_compiling" = yes; then
- ac_cv_c_stack_direction=0
-else
- cat > conftest.$ac_ext <<EOF
-#line 1299 "configure"
-#include "confdefs.h"
-find_stack_direction ()
-{
- static char *addr = 0;
- auto char dummy;
- if (addr == 0)
- {
- addr = &dummy;
- return find_stack_direction ();
- }
- else
- return (&dummy > addr) ? 1 : -1;
-}
-main ()
-{
- exit (find_stack_direction() < 0);
-}
-EOF
-if { (eval echo configure:1318: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null
-then
- ac_cv_c_stack_direction=1
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -fr conftest*
- ac_cv_c_stack_direction=-1
-fi
-rm -fr conftest*
-fi
-
-fi
-
-echo "$ac_t""$ac_cv_c_stack_direction" 1>&6
-cat >> confdefs.h <<EOF
-#define STACK_DIRECTION $ac_cv_c_stack_direction
-EOF
-
-fi
-
-for ac_hdr in unistd.h
-do
-ac_safe=`echo "$ac_hdr" | sed 'y%./+-%__p_%'`
-echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6
-echo "configure:1343: checking for $ac_hdr" >&5
-if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1348 "configure"
-#include "confdefs.h"
-#include <$ac_hdr>
-EOF
-ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:1353: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
-ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
-if test -z "$ac_err"; then
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=yes"
-else
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- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=no"
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- ac_tr_hdr=HAVE_`echo $ac_hdr | sed 'y%abcdefghijklmnopqrstuvwxyz./-%ABCDEFGHIJKLMNOPQRSTUVWXYZ___%'`
- cat >> confdefs.h <<EOF
-#define $ac_tr_hdr 1
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-
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- echo "$ac_t""no" 1>&6
-fi
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-
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-echo $ac_n "checking for $ac_func""... $ac_c" 1>&6
-echo "configure:1382: checking for $ac_func" >&5
-if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1387 "configure"
-#include "confdefs.h"
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-#include <assert.h>
-/* Override any gcc2 internal prototype to avoid an error. */
-/* We use char because int might match the return type of a gcc2
- builtin and then its argument prototype would still apply. */
-char $ac_func();
-
-int main() {
-
-/* The GNU C library defines this for functions which it implements
- to always fail with ENOSYS. Some functions are actually named
- something starting with __ and the normal name is an alias. */
-#if defined (__stub_$ac_func) || defined (__stub___$ac_func)
-choke me
-#else
-$ac_func();
-#endif
-
-; return 0; }
-EOF
-if { (eval echo configure:1410: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=yes"
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=no"
-fi
-rm -f conftest*
-fi
-
-if eval "test \"`echo '$ac_cv_func_'$ac_func`\" = yes"; then
- echo "$ac_t""yes" 1>&6
- ac_tr_func=HAVE_`echo $ac_func | tr 'abcdefghijklmnopqrstuvwxyz' 'ABCDEFGHIJKLMNOPQRSTUVWXYZ'`
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-
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- echo "$ac_t""no" 1>&6
-fi
-done
-
-echo $ac_n "checking for working mmap""... $ac_c" 1>&6
-echo "configure:1435: checking for working mmap" >&5
-if eval "test \"`echo '$''{'ac_cv_func_mmap_fixed_mapped'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- if test "$cross_compiling" = yes; then
- ac_cv_func_mmap_fixed_mapped=no
-else
- cat > conftest.$ac_ext <<EOF
-#line 1443 "configure"
-#include "confdefs.h"
-
-/* Thanks to Mike Haertel and Jim Avera for this test.
- Here is a matrix of mmap possibilities:
- mmap private not fixed
- mmap private fixed at somewhere currently unmapped
- mmap private fixed at somewhere already mapped
- mmap shared not fixed
- mmap shared fixed at somewhere currently unmapped
- mmap shared fixed at somewhere already mapped
- For private mappings, we should verify that changes cannot be read()
- back from the file, nor mmap's back from the file at a different
- address. (There have been systems where private was not correctly
- implemented like the infamous i386 svr4.0, and systems where the
- VM page cache was not coherent with the filesystem buffer cache
- like early versions of FreeBSD and possibly contemporary NetBSD.)
- For shared mappings, we should conversely verify that changes get
- propogated back to all the places they're supposed to be.
-
- Grep wants private fixed already mapped.
- The main things grep needs to know about mmap are:
- * does it exist and is it safe to write into the mmap'd area
- * how to use it (BSD variants) */
-#include <sys/types.h>
-#include <fcntl.h>
-#include <sys/mman.h>
-
-/* This mess was copied from the GNU getpagesize.h. */
-#ifndef HAVE_GETPAGESIZE
-# ifdef HAVE_UNISTD_H
-# include <unistd.h>
-# endif
-
-/* Assume that all systems that can run configure have sys/param.h. */
-# ifndef HAVE_SYS_PARAM_H
-# define HAVE_SYS_PARAM_H 1
-# endif
-
-# ifdef _SC_PAGESIZE
-# define getpagesize() sysconf(_SC_PAGESIZE)
-# else /* no _SC_PAGESIZE */
-# ifdef HAVE_SYS_PARAM_H
-# include <sys/param.h>
-# ifdef EXEC_PAGESIZE
-# define getpagesize() EXEC_PAGESIZE
-# else /* no EXEC_PAGESIZE */
-# ifdef NBPG
-# define getpagesize() NBPG * CLSIZE
-# ifndef CLSIZE
-# define CLSIZE 1
-# endif /* no CLSIZE */
-# else /* no NBPG */
-# ifdef NBPC
-# define getpagesize() NBPC
-# else /* no NBPC */
-# ifdef PAGESIZE
-# define getpagesize() PAGESIZE
-# endif /* PAGESIZE */
-# endif /* no NBPC */
-# endif /* no NBPG */
-# endif /* no EXEC_PAGESIZE */
-# else /* no HAVE_SYS_PARAM_H */
-# define getpagesize() 8192 /* punt totally */
-# endif /* no HAVE_SYS_PARAM_H */
-# endif /* no _SC_PAGESIZE */
-
-#endif /* no HAVE_GETPAGESIZE */
-
-#ifdef __cplusplus
-extern "C" { void *malloc(unsigned); }
-#else
-char *malloc();
-#endif
-
-int
-main()
-{
- char *data, *data2, *data3;
- int i, pagesize;
- int fd;
-
- pagesize = getpagesize();
-
- /*
- * First, make a file with some known garbage in it.
- */
- data = malloc(pagesize);
- if (!data)
- exit(1);
- for (i = 0; i < pagesize; ++i)
- *(data + i) = rand();
- umask(0);
- fd = creat("conftestmmap", 0600);
- if (fd < 0)
- exit(1);
- if (write(fd, data, pagesize) != pagesize)
- exit(1);
- close(fd);
-
- /*
- * Next, try to mmap the file at a fixed address which
- * already has something else allocated at it. If we can,
- * also make sure that we see the same garbage.
- */
- fd = open("conftestmmap", O_RDWR);
- if (fd < 0)
- exit(1);
- data2 = malloc(2 * pagesize);
- if (!data2)
- exit(1);
- data2 += (pagesize - ((int) data2 & (pagesize - 1))) & (pagesize - 1);
- if (data2 != mmap(data2, pagesize, PROT_READ | PROT_WRITE,
- MAP_PRIVATE | MAP_FIXED, fd, 0L))
- exit(1);
- for (i = 0; i < pagesize; ++i)
- if (*(data + i) != *(data2 + i))
- exit(1);
-
- /*
- * Finally, make sure that changes to the mapped area
- * do not percolate back to the file as seen by read().
- * (This is a bug on some variants of i386 svr4.0.)
- */
- for (i = 0; i < pagesize; ++i)
- *(data2 + i) = *(data2 + i) + 1;
- data3 = malloc(pagesize);
- if (!data3)
- exit(1);
- if (read(fd, data3, pagesize) != pagesize)
- exit(1);
- for (i = 0; i < pagesize; ++i)
- if (*(data + i) != *(data3 + i))
- exit(1);
- close(fd);
- unlink("conftestmmap");
- exit(0);
-}
-
-EOF
-if { (eval echo configure:1583: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null
-then
- ac_cv_func_mmap_fixed_mapped=yes
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -fr conftest*
- ac_cv_func_mmap_fixed_mapped=no
-fi
-rm -fr conftest*
-fi
-
-fi
-
-echo "$ac_t""$ac_cv_func_mmap_fixed_mapped" 1>&6
-if test $ac_cv_func_mmap_fixed_mapped = yes; then
- cat >> confdefs.h <<\EOF
-#define HAVE_MMAP 1
-EOF
-
-fi
-
-echo $ac_n "checking for Cygwin environment""... $ac_c" 1>&6
-echo "configure:1606: checking for Cygwin environment" >&5
-if eval "test \"`echo '$''{'ac_cv_cygwin'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1611 "configure"
-#include "confdefs.h"
-
-int main() {
-
-#ifndef __CYGWIN__
-#define __CYGWIN__ __CYGWIN32__
-#endif
-return __CYGWIN__;
-; return 0; }
-EOF
-if { (eval echo configure:1622: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
- rm -rf conftest*
- ac_cv_cygwin=yes
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- ac_cv_cygwin=no
-fi
-rm -f conftest*
-rm -f conftest*
-fi
-
-echo "$ac_t""$ac_cv_cygwin" 1>&6
-CYGWIN=
-test "$ac_cv_cygwin" = yes && CYGWIN=yes
-echo $ac_n "checking for mingw32 environment""... $ac_c" 1>&6
-echo "configure:1639: checking for mingw32 environment" >&5
-if eval "test \"`echo '$''{'ac_cv_mingw32'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1644 "configure"
-#include "confdefs.h"
-
-int main() {
-return __MINGW32__;
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-EOF
-if { (eval echo configure:1651: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
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- ac_cv_mingw32=yes
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- ac_cv_mingw32=no
-fi
-rm -f conftest*
-rm -f conftest*
-fi
-
-echo "$ac_t""$ac_cv_mingw32" 1>&6
-MINGW32=
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-
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-
-
-ac_aux_dir=
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- ac_install_sh="$ac_aux_dir/install-sh -c"
- break
- elif test -f $ac_dir/install.sh; then
- ac_aux_dir=$ac_dir
- ac_install_sh="$ac_aux_dir/install.sh -c"
- break
- fi
-done
-if test -z "$ac_aux_dir"; then
- { echo "configure: error: can not find install-sh or install.sh in `cd $srcdir;pwd`/../.. $srcdir/`cd $srcdir;pwd`/../.." 1>&2; exit 1; }
-fi
-ac_config_guess=$ac_aux_dir/config.guess
-ac_config_sub=$ac_aux_dir/config.sub
-ac_configure=$ac_aux_dir/configure # This should be Cygnus configure.
-
-
-# Do some error checking and defaulting for the host and target type.
-# The inputs are:
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-#
-# The rules are:
-# 1. You are not allowed to specify --host, --target, and nonopt at the
-# same time.
-# 2. Host defaults to nonopt.
-# 3. If nonopt is not specified, then host defaults to the current host,
-# as determined by config.guess.
-# 4. Target and build default to nonopt.
-# 5. If nonopt is not specified, then target and build default to host.
-
-# The aliases save the names the user supplied, while $host etc.
-# will get canonicalized.
-case $host---$target---$nonopt in
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-*) { echo "configure: error: can only configure for one host and one target at a time" 1>&2; exit 1; } ;;
-esac
-
-
-# Make sure we can run config.sub.
-if ${CONFIG_SHELL-/bin/sh} $ac_config_sub sun4 >/dev/null 2>&1; then :
-else { echo "configure: error: can not run $ac_config_sub" 1>&2; exit 1; }
-fi
-
-echo $ac_n "checking host system type""... $ac_c" 1>&6
-echo "configure:1718: checking host system type" >&5
-
-host_alias=$host
-case "$host_alias" in
-NONE)
- case $nonopt in
- NONE)
- if host_alias=`${CONFIG_SHELL-/bin/sh} $ac_config_guess`; then :
- else { echo "configure: error: can not guess host type; you must specify one" 1>&2; exit 1; }
- fi ;;
- *) host_alias=$nonopt ;;
- esac ;;
-esac
-
-host=`${CONFIG_SHELL-/bin/sh} $ac_config_sub $host_alias`
-host_cpu=`echo $host | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\1/'`
-host_vendor=`echo $host | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\2/'`
-host_os=`echo $host | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\3/'`
-echo "$ac_t""$host" 1>&6
-
-echo $ac_n "checking target system type""... $ac_c" 1>&6
-echo "configure:1739: checking target system type" >&5
-
-target_alias=$target
-case "$target_alias" in
-NONE)
- case $nonopt in
- NONE) target_alias=$host_alias ;;
- *) target_alias=$nonopt ;;
- esac ;;
-esac
-
-target=`${CONFIG_SHELL-/bin/sh} $ac_config_sub $target_alias`
-target_cpu=`echo $target | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\1/'`
-target_vendor=`echo $target | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\2/'`
-target_os=`echo $target | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\3/'`
-echo "$ac_t""$target" 1>&6
-
-echo $ac_n "checking build system type""... $ac_c" 1>&6
-echo "configure:1757: checking build system type" >&5
-
-build_alias=$build
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- case $nonopt in
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- *) build_alias=$nonopt ;;
- esac ;;
-esac
-
-build=`${CONFIG_SHELL-/bin/sh} $ac_config_sub $build_alias`
-build_cpu=`echo $build | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\1/'`
-build_vendor=`echo $build | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\2/'`
-build_os=`echo $build | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\3/'`
-echo "$ac_t""$build" 1>&6
-
-test "$host_alias" != "$target_alias" &&
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-
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- # Double any \ or $. echo might interpret backslashes.
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- program_transform_name="`echo $program_transform_name|sed -f conftestsed`"
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-test "$program_prefix" != NONE &&
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-# Use a double $ so make ignores it.
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- program_transform_name="s,\$\$,${program_suffix},; $program_transform_name"
-
-# sed with no file args requires a program.
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-
-# Extract the first word of "gcc", so it can be a program name with args.
-set dummy gcc; ac_word=$2
-echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:1801: checking for $ac_word" >&5
-if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- if test -n "$CC"; then
- ac_cv_prog_CC="$CC" # Let the user override the test.
-else
- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
- ac_dummy="$PATH"
- for ac_dir in $ac_dummy; do
- test -z "$ac_dir" && ac_dir=.
- if test -f $ac_dir/$ac_word; then
- ac_cv_prog_CC="gcc"
- break
- fi
- done
- IFS="$ac_save_ifs"
-fi
-fi
-CC="$ac_cv_prog_CC"
-if test -n "$CC"; then
- echo "$ac_t""$CC" 1>&6
-else
- echo "$ac_t""no" 1>&6
-fi
-
-if test -z "$CC"; then
- # Extract the first word of "cc", so it can be a program name with args.
-set dummy cc; ac_word=$2
-echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:1831: checking for $ac_word" >&5
-if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- if test -n "$CC"; then
- ac_cv_prog_CC="$CC" # Let the user override the test.
-else
- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
- ac_prog_rejected=no
- ac_dummy="$PATH"
- for ac_dir in $ac_dummy; do
- test -z "$ac_dir" && ac_dir=.
- if test -f $ac_dir/$ac_word; then
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- ac_prog_rejected=yes
- continue
- fi
- ac_cv_prog_CC="cc"
- break
- fi
- done
- IFS="$ac_save_ifs"
-if test $ac_prog_rejected = yes; then
- # We found a bogon in the path, so make sure we never use it.
- set dummy $ac_cv_prog_CC
- shift
- if test $# -gt 0; then
- # We chose a different compiler from the bogus one.
- # However, it has the same basename, so the bogon will be chosen
- # first if we set CC to just the basename; use the full file name.
- shift
- set dummy "$ac_dir/$ac_word" "$@"
- shift
- ac_cv_prog_CC="$@"
- fi
-fi
-fi
-fi
-CC="$ac_cv_prog_CC"
-if test -n "$CC"; then
- echo "$ac_t""$CC" 1>&6
-else
- echo "$ac_t""no" 1>&6
-fi
-
- if test -z "$CC"; then
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- # Extract the first word of "cl", so it can be a program name with args.
-set dummy cl; ac_word=$2
-echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:1882: checking for $ac_word" >&5
-if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- if test -n "$CC"; then
- ac_cv_prog_CC="$CC" # Let the user override the test.
-else
- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
- ac_dummy="$PATH"
- for ac_dir in $ac_dummy; do
- test -z "$ac_dir" && ac_dir=.
- if test -f $ac_dir/$ac_word; then
- ac_cv_prog_CC="cl"
- break
- fi
- done
- IFS="$ac_save_ifs"
-fi
-fi
-CC="$ac_cv_prog_CC"
-if test -n "$CC"; then
- echo "$ac_t""$CC" 1>&6
-else
- echo "$ac_t""no" 1>&6
-fi
- ;;
- esac
- fi
- test -z "$CC" && { echo "configure: error: no acceptable cc found in \$PATH" 1>&2; exit 1; }
-fi
-
-echo $ac_n "checking whether the C compiler ($CC $CFLAGS $LDFLAGS) works""... $ac_c" 1>&6
-echo "configure:1914: checking whether the C compiler ($CC $CFLAGS $LDFLAGS) works" >&5
-
-ac_ext=c
-# CFLAGS is not in ac_cpp because -g, -O, etc. are not valid cpp options.
-ac_cpp='$CPP $CPPFLAGS'
-ac_compile='${CC-cc} -c $CFLAGS $CPPFLAGS conftest.$ac_ext 1>&5'
-ac_link='${CC-cc} -o conftest${ac_exeext} $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS 1>&5'
-cross_compiling=$ac_cv_prog_cc_cross
-
-cat > conftest.$ac_ext << EOF
-
-#line 1925 "configure"
-#include "confdefs.h"
-
-main(){return(0);}
-EOF
-if { (eval echo configure:1930: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- ac_cv_prog_cc_works=yes
- # If we can't run a trivial program, we are probably using a cross compiler.
- if (./conftest; exit) 2>/dev/null; then
- ac_cv_prog_cc_cross=no
- else
- ac_cv_prog_cc_cross=yes
- fi
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- ac_cv_prog_cc_works=no
-fi
-rm -fr conftest*
-ac_ext=c
-# CFLAGS is not in ac_cpp because -g, -O, etc. are not valid cpp options.
-ac_cpp='$CPP $CPPFLAGS'
-ac_compile='${CC-cc} -c $CFLAGS $CPPFLAGS conftest.$ac_ext 1>&5'
-ac_link='${CC-cc} -o conftest${ac_exeext} $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS 1>&5'
-cross_compiling=$ac_cv_prog_cc_cross
-
-echo "$ac_t""$ac_cv_prog_cc_works" 1>&6
-if test $ac_cv_prog_cc_works = no; then
- { echo "configure: error: installation or configuration problem: C compiler cannot create executables." 1>&2; exit 1; }
-fi
-echo $ac_n "checking whether the C compiler ($CC $CFLAGS $LDFLAGS) is a cross-compiler""... $ac_c" 1>&6
-echo "configure:1956: checking whether the C compiler ($CC $CFLAGS $LDFLAGS) is a cross-compiler" >&5
-echo "$ac_t""$ac_cv_prog_cc_cross" 1>&6
-cross_compiling=$ac_cv_prog_cc_cross
-
-echo $ac_n "checking whether we are using GNU C""... $ac_c" 1>&6
-echo "configure:1961: checking whether we are using GNU C" >&5
-if eval "test \"`echo '$''{'ac_cv_prog_gcc'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.c <<EOF
-#ifdef __GNUC__
- yes;
-#endif
-EOF
-if { ac_try='${CC-cc} -E conftest.c'; { (eval echo configure:1970: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }; } | egrep yes >/dev/null 2>&1; then
- ac_cv_prog_gcc=yes
-else
- ac_cv_prog_gcc=no
-fi
-fi
-
-echo "$ac_t""$ac_cv_prog_gcc" 1>&6
-
-if test $ac_cv_prog_gcc = yes; then
- GCC=yes
-else
- GCC=
-fi
-
-ac_test_CFLAGS="${CFLAGS+set}"
-ac_save_CFLAGS="$CFLAGS"
-CFLAGS=
-echo $ac_n "checking whether ${CC-cc} accepts -g""... $ac_c" 1>&6
-echo "configure:1989: checking whether ${CC-cc} accepts -g" >&5
-if eval "test \"`echo '$''{'ac_cv_prog_cc_g'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- echo 'void f(){}' > conftest.c
-if test -z "`${CC-cc} -g -c conftest.c 2>&1`"; then
- ac_cv_prog_cc_g=yes
-else
- ac_cv_prog_cc_g=no
-fi
-rm -f conftest*
-
-fi
-
-echo "$ac_t""$ac_cv_prog_cc_g" 1>&6
-if test "$ac_test_CFLAGS" = set; then
- CFLAGS="$ac_save_CFLAGS"
-elif test $ac_cv_prog_cc_g = yes; then
- if test "$GCC" = yes; then
- CFLAGS="-g -O2"
- else
- CFLAGS="-g"
- fi
-else
- if test "$GCC" = yes; then
- CFLAGS="-O2"
- else
- CFLAGS=
- fi
-fi
-
-# Find a good install program. We prefer a C program (faster),
-# so one script is as good as another. But avoid the broken or
-# incompatible versions:
-# SysV /etc/install, /usr/sbin/install
-# SunOS /usr/etc/install
-# IRIX /sbin/install
-# AIX /bin/install
-# AIX 4 /usr/bin/installbsd, which doesn't work without a -g flag
-# AFS /usr/afsws/bin/install, which mishandles nonexistent args
-# SVR4 /usr/ucb/install, which tries to use the nonexistent group "staff"
-# ./install, which can be erroneously created by make from ./install.sh.
-echo $ac_n "checking for a BSD compatible install""... $ac_c" 1>&6
-echo "configure:2032: checking for a BSD compatible install" >&5
-if test -z "$INSTALL"; then
-if eval "test \"`echo '$''{'ac_cv_path_install'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- IFS="${IFS= }"; ac_save_IFS="$IFS"; IFS=":"
- for ac_dir in $PATH; do
- # Account for people who put trailing slashes in PATH elements.
- case "$ac_dir/" in
- /|./|.//|/etc/*|/usr/sbin/*|/usr/etc/*|/sbin/*|/usr/afsws/bin/*|/usr/ucb/*) ;;
- *)
- # OSF1 and SCO ODT 3.0 have their own names for install.
- # Don't use installbsd from OSF since it installs stuff as root
- # by default.
- for ac_prog in ginstall scoinst install; do
- if test -f $ac_dir/$ac_prog; then
- if test $ac_prog = install &&
- grep dspmsg $ac_dir/$ac_prog >/dev/null 2>&1; then
- # AIX install. It has an incompatible calling convention.
- :
- else
- ac_cv_path_install="$ac_dir/$ac_prog -c"
- break 2
- fi
- fi
- done
- ;;
- esac
- done
- IFS="$ac_save_IFS"
-
-fi
- if test "${ac_cv_path_install+set}" = set; then
- INSTALL="$ac_cv_path_install"
- else
- # As a last resort, use the slow shell script. We don't cache a
- # path for INSTALL within a source directory, because that will
- # break other packages using the cache if that directory is
- # removed, or if the path is relative.
- INSTALL="$ac_install_sh"
- fi
-fi
-echo "$ac_t""$INSTALL" 1>&6
-
-# Use test -z because SunOS4 sh mishandles braces in ${var-val}.
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-
-test -z "$INSTALL_SCRIPT" && INSTALL_SCRIPT='${INSTALL_PROGRAM}'
-
-test -z "$INSTALL_DATA" && INSTALL_DATA='${INSTALL} -m 644'
-
-
-# Put a plausible default for CC_FOR_BUILD in Makefile.
-if test "x$cross_compiling" = "xno"; then
- CC_FOR_BUILD='$(CC)'
-else
- CC_FOR_BUILD=gcc
-fi
-
-
-
-
-AR=${AR-ar}
-
-# Extract the first word of "ranlib", so it can be a program name with args.
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-echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:2100: checking for $ac_word" >&5
-if eval "test \"`echo '$''{'ac_cv_prog_RANLIB'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- if test -n "$RANLIB"; then
- ac_cv_prog_RANLIB="$RANLIB" # Let the user override the test.
-else
- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
- ac_dummy="$PATH"
- for ac_dir in $ac_dummy; do
- test -z "$ac_dir" && ac_dir=.
- if test -f $ac_dir/$ac_word; then
- ac_cv_prog_RANLIB="ranlib"
- break
- fi
- done
- IFS="$ac_save_ifs"
- test -z "$ac_cv_prog_RANLIB" && ac_cv_prog_RANLIB=":"
-fi
-fi
-RANLIB="$ac_cv_prog_RANLIB"
-if test -n "$RANLIB"; then
- echo "$ac_t""$RANLIB" 1>&6
-else
- echo "$ac_t""no" 1>&6
-fi
-
-
-ALL_LINGUAS=
-
- for ac_hdr in argz.h limits.h locale.h nl_types.h malloc.h string.h \
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-do
-ac_safe=`echo "$ac_hdr" | sed 'y%./+-%__p_%'`
-echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6
-echo "configure:2135: checking for $ac_hdr" >&5
-if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 2140 "configure"
-#include "confdefs.h"
-#include <$ac_hdr>
-EOF
-ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:2145: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
-ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
-if test -z "$ac_err"; then
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=yes"
-else
- echo "$ac_err" >&5
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=no"
-fi
-rm -f conftest*
-fi
-if eval "test \"`echo '$ac_cv_header_'$ac_safe`\" = yes"; then
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- ac_tr_hdr=HAVE_`echo $ac_hdr | sed 'y%abcdefghijklmnopqrstuvwxyz./-%ABCDEFGHIJKLMNOPQRSTUVWXYZ___%'`
- cat >> confdefs.h <<EOF
-#define $ac_tr_hdr 1
-EOF
-
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- echo "$ac_t""no" 1>&6
-fi
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-
- for ac_func in getcwd munmap putenv setenv setlocale strchr strcasecmp \
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-echo "configure:2175: checking for $ac_func" >&5
-if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 2180 "configure"
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-/* We use char because int might match the return type of a gcc2
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-char $ac_func();
-
-int main() {
-
-/* The GNU C library defines this for functions which it implements
- to always fail with ENOSYS. Some functions are actually named
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-choke me
-#else
-$ac_func();
-#endif
-
-; return 0; }
-EOF
-if { (eval echo configure:2203: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=yes"
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=no"
-fi
-rm -f conftest*
-fi
-
-if eval "test \"`echo '$ac_cv_func_'$ac_func`\" = yes"; then
- echo "$ac_t""yes" 1>&6
- ac_tr_func=HAVE_`echo $ac_func | tr 'abcdefghijklmnopqrstuvwxyz' 'ABCDEFGHIJKLMNOPQRSTUVWXYZ'`
- cat >> confdefs.h <<EOF
-#define $ac_tr_func 1
-EOF
-
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- echo "$ac_t""no" 1>&6
-fi
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-
-
- if test "${ac_cv_func_stpcpy+set}" != "set"; then
- for ac_func in stpcpy
-do
-echo $ac_n "checking for $ac_func""... $ac_c" 1>&6
-echo "configure:2232: checking for $ac_func" >&5
-if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 2237 "configure"
-#include "confdefs.h"
-/* System header to define __stub macros and hopefully few prototypes,
- which can conflict with char $ac_func(); below. */
-#include <assert.h>
-/* Override any gcc2 internal prototype to avoid an error. */
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-choke me
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- *)
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- *)
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-
- cat > conftest.$ac_ext <<EOF
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-
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- CATOBJEXT=.gmo
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- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
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-
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-
-
-
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- *)
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- fi
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- IFS="$ac_save_ifs"
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-
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- *)
- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
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-
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-echo "configure:2763: checking for $ac_word" >&5
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- *)
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-else
- echo "$ac_t""no" 1>&6
-fi
-
-
- USE_INCLUDED_LIBINTL=yes
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- INSTOBJEXT=.mo
- DATADIRNAME=share
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- INTLLIBS=$INTLDEPS
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- nls_cv_header_libgt=libgettext.h
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-
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-
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-
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-
- for lang in $ALL_LINGUAS; do
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- done
-
-
-
-
-
-
-
-
-
-
-
-
-
-
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- echo $ac_n "checking for catalogs to be installed""... $ac_c" 1>&6
-echo "configure:2853: checking for catalogs to be installed" >&5
- NEW_LINGUAS=
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-
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-
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- else
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-
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-echo "configure:2881: checking for linux/version.h" >&5
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-#include <linux/version.h>
-EOF
-ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:2891: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
-ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
-if test -z "$ac_err"; then
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=yes"
-else
- echo "$ac_err" >&5
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=no"
-fi
-rm -f conftest*
-fi
-if eval "test \"`echo '$ac_cv_header_'$ac_safe`\" = yes"; then
- echo "$ac_t""yes" 1>&6
- msgformat=linux
-else
- echo "$ac_t""no" 1>&6
-msgformat=xopen
-fi
-
-
- sed -e '/^#/d' $srcdir/$msgformat-msg.sed > po2msg.sed
- fi
- sed -e '/^#.*[^\\]$/d' -e '/^#$/d' \
- $srcdir/po2tbl.sed.in > po2tbl.sed
- fi
-
- if test "$PACKAGE" = "gettext"; then
- GT_NO="#NO#"
- GT_YES=
- else
- GT_NO=
- GT_YES="#YES#"
- fi
-
-
-
- MKINSTALLDIRS="\$(srcdir)/../../mkinstalldirs"
-
-
- l=
-
-
- if test -d $srcdir/po; then
- test -d po || mkdir po
- if test "x$srcdir" != "x."; then
- if test "x`echo $srcdir | sed 's@/.*@@'`" = "x"; then
- posrcprefix="$srcdir/"
- else
- posrcprefix="../$srcdir/"
- fi
- else
- posrcprefix="../"
- fi
- rm -f po/POTFILES
- sed -e "/^#/d" -e "/^\$/d" -e "s,.*, $posrcprefix& \\\\," -e "\$s/\(.*\) \\\\/\1/" \
- < $srcdir/po/POTFILES.in > po/POTFILES
- fi
-
-
-# Check for common headers.
-# FIXME: Seems to me this can cause problems for i386-windows hosts.
-# At one point there were hardcoded AC_DEFINE's if ${host} = i386-*-windows*.
-for ac_hdr in stdlib.h string.h strings.h unistd.h time.h
-do
-ac_safe=`echo "$ac_hdr" | sed 'y%./+-%__p_%'`
-echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6
-echo "configure:2960: checking for $ac_hdr" >&5
-if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 2965 "configure"
-#include "confdefs.h"
-#include <$ac_hdr>
-EOF
-ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:2970: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
-ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
-if test -z "$ac_err"; then
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=yes"
-else
- echo "$ac_err" >&5
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=no"
-fi
-rm -f conftest*
-fi
-if eval "test \"`echo '$ac_cv_header_'$ac_safe`\" = yes"; then
- echo "$ac_t""yes" 1>&6
- ac_tr_hdr=HAVE_`echo $ac_hdr | sed 'y%abcdefghijklmnopqrstuvwxyz./-%ABCDEFGHIJKLMNOPQRSTUVWXYZ___%'`
- cat >> confdefs.h <<EOF
-#define $ac_tr_hdr 1
-EOF
-
-else
- echo "$ac_t""no" 1>&6
-fi
-done
-
-for ac_hdr in sys/time.h sys/resource.h
-do
-ac_safe=`echo "$ac_hdr" | sed 'y%./+-%__p_%'`
-echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6
-echo "configure:3000: checking for $ac_hdr" >&5
-if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 3005 "configure"
-#include "confdefs.h"
-#include <$ac_hdr>
-EOF
-ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:3010: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
-ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
-if test -z "$ac_err"; then
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=yes"
-else
- echo "$ac_err" >&5
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=no"
-fi
-rm -f conftest*
-fi
-if eval "test \"`echo '$ac_cv_header_'$ac_safe`\" = yes"; then
- echo "$ac_t""yes" 1>&6
- ac_tr_hdr=HAVE_`echo $ac_hdr | sed 'y%abcdefghijklmnopqrstuvwxyz./-%ABCDEFGHIJKLMNOPQRSTUVWXYZ___%'`
- cat >> confdefs.h <<EOF
-#define $ac_tr_hdr 1
-EOF
-
-else
- echo "$ac_t""no" 1>&6
-fi
-done
-
-for ac_hdr in fcntl.h fpu_control.h
-do
-ac_safe=`echo "$ac_hdr" | sed 'y%./+-%__p_%'`
-echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6
-echo "configure:3040: checking for $ac_hdr" >&5
-if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 3045 "configure"
-#include "confdefs.h"
-#include <$ac_hdr>
-EOF
-ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:3050: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
-ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
-if test -z "$ac_err"; then
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=yes"
-else
- echo "$ac_err" >&5
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=no"
-fi
-rm -f conftest*
-fi
-if eval "test \"`echo '$ac_cv_header_'$ac_safe`\" = yes"; then
- echo "$ac_t""yes" 1>&6
- ac_tr_hdr=HAVE_`echo $ac_hdr | sed 'y%abcdefghijklmnopqrstuvwxyz./-%ABCDEFGHIJKLMNOPQRSTUVWXYZ___%'`
- cat >> confdefs.h <<EOF
-#define $ac_tr_hdr 1
-EOF
-
-else
- echo "$ac_t""no" 1>&6
-fi
-done
-
-for ac_hdr in dlfcn.h errno.h sys/stat.h
-do
-ac_safe=`echo "$ac_hdr" | sed 'y%./+-%__p_%'`
-echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6
-echo "configure:3080: checking for $ac_hdr" >&5
-if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 3085 "configure"
-#include "confdefs.h"
-#include <$ac_hdr>
-EOF
-ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:3090: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
-ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
-if test -z "$ac_err"; then
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=yes"
-else
- echo "$ac_err" >&5
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=no"
-fi
-rm -f conftest*
-fi
-if eval "test \"`echo '$ac_cv_header_'$ac_safe`\" = yes"; then
- echo "$ac_t""yes" 1>&6
- ac_tr_hdr=HAVE_`echo $ac_hdr | sed 'y%abcdefghijklmnopqrstuvwxyz./-%ABCDEFGHIJKLMNOPQRSTUVWXYZ___%'`
- cat >> confdefs.h <<EOF
-#define $ac_tr_hdr 1
-EOF
-
-else
- echo "$ac_t""no" 1>&6
-fi
-done
-
-for ac_func in getrusage time sigaction __setfpucw
-do
-echo $ac_n "checking for $ac_func""... $ac_c" 1>&6
-echo "configure:3119: checking for $ac_func" >&5
-if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 3124 "configure"
-#include "confdefs.h"
-/* System header to define __stub macros and hopefully few prototypes,
- which can conflict with char $ac_func(); below. */
-#include <assert.h>
-/* Override any gcc2 internal prototype to avoid an error. */
-/* We use char because int might match the return type of a gcc2
- builtin and then its argument prototype would still apply. */
-char $ac_func();
-
-int main() {
-
-/* The GNU C library defines this for functions which it implements
- to always fail with ENOSYS. Some functions are actually named
- something starting with __ and the normal name is an alias. */
-#if defined (__stub_$ac_func) || defined (__stub___$ac_func)
-choke me
-#else
-$ac_func();
-#endif
-
-; return 0; }
-EOF
-if { (eval echo configure:3147: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=yes"
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=no"
-fi
-rm -f conftest*
-fi
-
-if eval "test \"`echo '$ac_cv_func_'$ac_func`\" = yes"; then
- echo "$ac_t""yes" 1>&6
- ac_tr_func=HAVE_`echo $ac_func | tr 'abcdefghijklmnopqrstuvwxyz' 'ABCDEFGHIJKLMNOPQRSTUVWXYZ'`
- cat >> confdefs.h <<EOF
-#define $ac_tr_func 1
-EOF
-
-else
- echo "$ac_t""no" 1>&6
-fi
-done
-
-
-# Check for socket libraries
-echo $ac_n "checking for bind in -lsocket""... $ac_c" 1>&6
-echo "configure:3174: checking for bind in -lsocket" >&5
-ac_lib_var=`echo socket'_'bind | sed 'y%./+-%__p_%'`
-if eval "test \"`echo '$''{'ac_cv_lib_$ac_lib_var'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- ac_save_LIBS="$LIBS"
-LIBS="-lsocket $LIBS"
-cat > conftest.$ac_ext <<EOF
-#line 3182 "configure"
-#include "confdefs.h"
-/* Override any gcc2 internal prototype to avoid an error. */
-/* We use char because int might match the return type of a gcc2
- builtin and then its argument prototype would still apply. */
-char bind();
-
-int main() {
-bind()
-; return 0; }
-EOF
-if { (eval echo configure:3193: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- rm -rf conftest*
- eval "ac_cv_lib_$ac_lib_var=yes"
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_lib_$ac_lib_var=no"
-fi
-rm -f conftest*
-LIBS="$ac_save_LIBS"
-
-fi
-if eval "test \"`echo '$ac_cv_lib_'$ac_lib_var`\" = yes"; then
- echo "$ac_t""yes" 1>&6
- ac_tr_lib=HAVE_LIB`echo socket | sed -e 's/[^a-zA-Z0-9_]/_/g' \
- -e 'y/abcdefghijklmnopqrstuvwxyz/ABCDEFGHIJKLMNOPQRSTUVWXYZ/'`
- cat >> confdefs.h <<EOF
-#define $ac_tr_lib 1
-EOF
-
- LIBS="-lsocket $LIBS"
-
-else
- echo "$ac_t""no" 1>&6
-fi
-
-echo $ac_n "checking for gethostbyname in -lnsl""... $ac_c" 1>&6
-echo "configure:3221: checking for gethostbyname in -lnsl" >&5
-ac_lib_var=`echo nsl'_'gethostbyname | sed 'y%./+-%__p_%'`
-if eval "test \"`echo '$''{'ac_cv_lib_$ac_lib_var'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- ac_save_LIBS="$LIBS"
-LIBS="-lnsl $LIBS"
-cat > conftest.$ac_ext <<EOF
-#line 3229 "configure"
-#include "confdefs.h"
-/* Override any gcc2 internal prototype to avoid an error. */
-/* We use char because int might match the return type of a gcc2
- builtin and then its argument prototype would still apply. */
-char gethostbyname();
-
-int main() {
-gethostbyname()
-; return 0; }
-EOF
-if { (eval echo configure:3240: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- rm -rf conftest*
- eval "ac_cv_lib_$ac_lib_var=yes"
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_lib_$ac_lib_var=no"
-fi
-rm -f conftest*
-LIBS="$ac_save_LIBS"
-
-fi
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- ac_tr_lib=HAVE_LIB`echo nsl | sed -e 's/[^a-zA-Z0-9_]/_/g' \
- -e 'y/abcdefghijklmnopqrstuvwxyz/ABCDEFGHIJKLMNOPQRSTUVWXYZ/'`
- cat >> confdefs.h <<EOF
-#define $ac_tr_lib 1
-EOF
-
- LIBS="-lnsl $LIBS"
-
-else
- echo "$ac_t""no" 1>&6
-fi
-
-
-. ${srcdir}/../../bfd/configure.host
-
-
-
-USE_MAINTAINER_MODE=no
-# Check whether --enable-maintainer-mode or --disable-maintainer-mode was given.
-if test "${enable_maintainer_mode+set}" = set; then
- enableval="$enable_maintainer_mode"
- case "${enableval}" in
- yes) MAINT="" USE_MAINTAINER_MODE=yes ;;
- no) MAINT="#" ;;
- *) { echo "configure: error: "--enable-maintainer-mode does not take a value"" 1>&2; exit 1; }; MAINT="#" ;;
-esac
-if test x"$silent" != x"yes" && test x"$MAINT" = x""; then
- echo "Setting maintainer mode" 6>&1
-fi
-else
- MAINT="#"
-fi
-
-
-
-# Check whether --enable-sim-bswap or --disable-sim-bswap was given.
-if test "${enable_sim_bswap+set}" = set; then
- enableval="$enable_sim_bswap"
- case "${enableval}" in
- yes) sim_bswap="-DWITH_BSWAP=1 -DUSE_BSWAP=1";;
- no) sim_bswap="-DWITH_BSWAP=0";;
- *) { echo "configure: error: "--enable-sim-bswap does not take a value"" 1>&2; exit 1; }; sim_bswap="";;
-esac
-if test x"$silent" != x"yes" && test x"$sim_bswap" != x""; then
- echo "Setting bswap flags = $sim_bswap" 6>&1
-fi
-else
- sim_bswap=""
-fi
-
-
-
-# Check whether --enable-sim-cflags or --disable-sim-cflags was given.
-if test "${enable_sim_cflags+set}" = set; then
- enableval="$enable_sim_cflags"
- case "${enableval}" in
- yes) sim_cflags="-O2 -fomit-frame-pointer";;
- trace) { echo "configure: error: "Please use --enable-sim-debug instead."" 1>&2; exit 1; }; sim_cflags="";;
- no) sim_cflags="";;
- *) sim_cflags=`echo "${enableval}" | sed -e "s/,/ /g"`;;
-esac
-if test x"$silent" != x"yes" && test x"$sim_cflags" != x""; then
- echo "Setting sim cflags = $sim_cflags" 6>&1
-fi
-else
- sim_cflags=""
-fi
-
-
-
-# Check whether --enable-sim-debug or --disable-sim-debug was given.
-if test "${enable_sim_debug+set}" = set; then
- enableval="$enable_sim_debug"
- case "${enableval}" in
- yes) sim_debug="-DDEBUG=7 -DWITH_DEBUG=7";;
- no) sim_debug="-DDEBUG=0 -DWITH_DEBUG=0";;
- *) sim_debug="-DDEBUG='(${enableval})' -DWITH_DEBUG='(${enableval})'";;
-esac
-if test x"$silent" != x"yes" && test x"$sim_debug" != x""; then
- echo "Setting sim debug = $sim_debug" 6>&1
-fi
-else
- sim_debug=""
-fi
-
-
-
-# Check whether --enable-sim-stdio or --disable-sim-stdio was given.
-if test "${enable_sim_stdio+set}" = set; then
- enableval="$enable_sim_stdio"
- case "${enableval}" in
- yes) sim_stdio="-DWITH_STDIO=DO_USE_STDIO";;
- no) sim_stdio="-DWITH_STDIO=DONT_USE_STDIO";;
- *) { echo "configure: error: "Unknown value $enableval passed to --enable-sim-stdio"" 1>&2; exit 1; }; sim_stdio="";;
-esac
-if test x"$silent" != x"yes" && test x"$sim_stdio" != x""; then
- echo "Setting stdio flags = $sim_stdio" 6>&1
-fi
-else
- sim_stdio=""
-fi
-
-
-
-# Check whether --enable-sim-trace or --disable-sim-trace was given.
-if test "${enable_sim_trace+set}" = set; then
- enableval="$enable_sim_trace"
- case "${enableval}" in
- yes) sim_trace="-DTRACE=1 -DWITH_TRACE=-1";;
- no) sim_trace="-DTRACE=0 -DWITH_TRACE=0";;
- [-0-9]*)
- sim_trace="-DTRACE='(${enableval})' -DWITH_TRACE='(${enableval})'";;
- [a-z]*)
- sim_trace=""
- for x in `echo "$enableval" | sed -e "s/,/ /g"`; do
- if test x"$sim_trace" = x; then
- sim_trace="-DWITH_TRACE='(TRACE_$x"
- else
- sim_trace="${sim_trace}|TRACE_$x"
- fi
- done
- sim_trace="$sim_trace)'" ;;
-esac
-if test x"$silent" != x"yes" && test x"$sim_trace" != x""; then
- echo "Setting sim trace = $sim_trace" 6>&1
-fi
-else
- sim_trace=""
-fi
-
-
-
-# Check whether --enable-sim-profile or --disable-sim-profile was given.
-if test "${enable_sim_profile+set}" = set; then
- enableval="$enable_sim_profile"
- case "${enableval}" in
- yes) sim_profile="-DPROFILE=1 -DWITH_PROFILE=-1";;
- no) sim_profile="-DPROFILE=0 -DWITH_PROFILE=0";;
- [-0-9]*)
- sim_profile="-DPROFILE='(${enableval})' -DWITH_PROFILE='(${enableval})'";;
- [a-z]*)
- sim_profile=""
- for x in `echo "$enableval" | sed -e "s/,/ /g"`; do
- if test x"$sim_profile" = x; then
- sim_profile="-DWITH_PROFILE='(PROFILE_$x"
- else
- sim_profile="${sim_profile}|PROFILE_$x"
- fi
- done
- sim_profile="$sim_profile)'" ;;
-esac
-if test x"$silent" != x"yes" && test x"$sim_profile" != x""; then
- echo "Setting sim profile = $sim_profile" 6>&1
-fi
-else
- sim_profile="-DPROFILE=1 -DWITH_PROFILE=-1"
-fi
-
-
-
-echo $ac_n "checking return type of signal handlers""... $ac_c" 1>&6
-echo "configure:3416: checking return type of signal handlers" >&5
-if eval "test \"`echo '$''{'ac_cv_type_signal'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 3421 "configure"
-#include "confdefs.h"
-#include <sys/types.h>
-#include <signal.h>
-#ifdef signal
-#undef signal
-#endif
-#ifdef __cplusplus
-extern "C" void (*signal (int, void (*)(int)))(int);
-#else
-void (*signal ()) ();
-#endif
-
-int main() {
-int i;
-; return 0; }
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-if { (eval echo configure:3438: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
- rm -rf conftest*
- ac_cv_type_signal=void
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- ac_cv_type_signal=int
-fi
-rm -f conftest*
-fi
-
-echo "$ac_t""$ac_cv_type_signal" 1>&6
-cat >> confdefs.h <<EOF
-#define RETSIGTYPE $ac_cv_type_signal
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-
-
-
-
-
-echo $ac_n "checking for executable suffix""... $ac_c" 1>&6
-echo "configure:3460: checking for executable suffix" >&5
-if eval "test \"`echo '$''{'ac_cv_exeext'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- if test "$CYGWIN" = yes || test "$MINGW32" = yes; then
- ac_cv_exeext=.exe
-else
- rm -f conftest*
- echo 'int main () { return 0; }' > conftest.$ac_ext
- ac_cv_exeext=
- if { (eval echo configure:3470: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; }; then
- for file in conftest.*; do
- case $file in
- *.c | *.o | *.obj | *.ilk | *.pdb) ;;
- *) ac_cv_exeext=`echo $file | sed -e s/conftest//` ;;
- esac
- done
- else
- { echo "configure: error: installation or configuration problem: compiler cannot create executables." 1>&2; exit 1; }
- fi
- rm -f conftest*
- test x"${ac_cv_exeext}" = x && ac_cv_exeext=no
-fi
-fi
-
-EXEEXT=""
-test x"${ac_cv_exeext}" != xno && EXEEXT=${ac_cv_exeext}
-echo "$ac_t""${ac_cv_exeext}" 1>&6
-ac_exeext=$EXEEXT
-
-
-sim_link_files=
-sim_link_links=
-
-sim_link_links=tconfig.h
-if test -f ${srcdir}/tconfig.in
-then
- sim_link_files=tconfig.in
-else
- sim_link_files=../common/tconfig.in
-fi
-
-# targ-vals.def points to the libc macro description file.
-case "${target}" in
-*-*-*) TARG_VALS_DEF=../common/nltvals.def ;;
-esac
-sim_link_files="${sim_link_files} ${TARG_VALS_DEF}"
-sim_link_links="${sim_link_links} targ-vals.def"
-
-
-
-
-wire_endian="BIG_ENDIAN"
-default_endian=""
-# Check whether --enable-sim-endian or --disable-sim-endian was given.
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- case "${enableval}" in
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- yes) if test x"$wire_endian" != x; then
- sim_endian="-DWITH_TARGET_BYTE_ORDER=${wire_endian}"
- else
- if test x"$default_endian" != x; then
- sim_endian="-DWITH_TARGET_BYTE_ORDER=${default_endian}"
- else
- echo "No hard-wired endian for target $target" 1>&6
- sim_endian="-DWITH_TARGET_BYTE_ORDER=0"
- fi
- fi;;
- no) if test x"$default_endian" != x; then
- sim_endian="-DWITH_DEFAULT_TARGET_BYTE_ORDER=${default_endian}"
- else
- if test x"$wire_endian" != x; then
- sim_endian="-DWITH_DEFAULT_TARGET_BYTE_ORDER=${wire_endian}"
- else
- echo "No default endian for target $target" 1>&6
- sim_endian="-DWITH_DEFAULT_TARGET_BYTE_ORDER=0"
- fi
- fi;;
- *) { echo "configure: error: "Unknown value $enableval for --enable-sim-endian"" 1>&2; exit 1; }; sim_endian="";;
-esac
-if test x"$silent" != x"yes" && test x"$sim_endian" != x""; then
- echo "Setting endian flags = $sim_endian" 6>&1
-fi
-else
- if test x"$default_endian" != x; then
- sim_endian="-DWITH_DEFAULT_TARGET_BYTE_ORDER=${default_endian}"
-else
- if test x"$wire_endian" != x; then
- sim_endian="-DWITH_TARGET_BYTE_ORDER=${wire_endian}"
- else
- sim_endian=
- fi
-fi
-fi
-
-wire_alignment="FORCED_ALIGNMENT"
-default_alignment=""
-
-# Check whether --enable-sim-alignment or --disable-sim-alignment was given.
-if test "${enable_sim_alignment+set}" = set; then
- enableval="$enable_sim_alignment"
- case "${enableval}" in
- strict | STRICT) sim_alignment="-DWITH_ALIGNMENT=STRICT_ALIGNMENT";;
- nonstrict | NONSTRICT) sim_alignment="-DWITH_ALIGNMENT=NONSTRICT_ALIGNMENT";;
- forced | FORCED) sim_alignment="-DWITH_ALIGNMENT=FORCED_ALIGNMENT";;
- yes) if test x"$wire_alignment" != x; then
- sim_alignment="-DWITH_ALIGNMENT=${wire_alignment}"
- else
- if test x"$default_alignment" != x; then
- sim_alignment="-DWITH_ALIGNMENT=${default_alignment}"
- else
- echo "No hard-wired alignment for target $target" 1>&6
- sim_alignment="-DWITH_ALIGNMENT=0"
- fi
- fi;;
- no) if test x"$default_alignment" != x; then
- sim_alignment="-DWITH_DEFAULT_ALIGNMENT=${default_alignment}"
- else
- if test x"$wire_alignment" != x; then
- sim_alignment="-DWITH_DEFAULT_ALIGNMENT=${wire_alignment}"
- else
- echo "No default alignment for target $target" 1>&6
- sim_alignment="-DWITH_DEFAULT_ALIGNMENT=0"
- fi
- fi;;
- *) { echo "configure: error: "Unknown value $enableval passed to --enable-sim-alignment"" 1>&2; exit 1; }; sim_alignment="";;
-esac
-if test x"$silent" != x"yes" && test x"$sim_alignment" != x""; then
- echo "Setting alignment flags = $sim_alignment" 6>&1
-fi
-else
- if test x"$default_alignment" != x; then
- sim_alignment="-DWITH_DEFAULT_ALIGNMENT=${default_alignment}"
-else
- if test x"$wire_alignment" != x; then
- sim_alignment="-DWITH_ALIGNMENT=${wire_alignment}"
- else
- sim_alignment=
- fi
-fi
-fi
-
-
-# Check whether --enable-sim-hostendian or --disable-sim-hostendian was given.
-if test "${enable_sim_hostendian+set}" = set; then
- enableval="$enable_sim_hostendian"
- case "${enableval}" in
- no) sim_hostendian="-DWITH_HOST_BYTE_ORDER=0";;
- b*|B*) sim_hostendian="-DWITH_HOST_BYTE_ORDER=BIG_ENDIAN";;
- l*|L*) sim_hostendian="-DWITH_HOST_BYTE_ORDER=LITTLE_ENDIAN";;
- *) { echo "configure: error: "Unknown value $enableval for --enable-sim-hostendian"" 1>&2; exit 1; }; sim_hostendian="";;
-esac
-if test x"$silent" != x"yes" && test x"$sim_hostendian" != x""; then
- echo "Setting hostendian flags = $sim_hostendian" 6>&1
-fi
-else
-
-if test "x$cross_compiling" = "xno"; then
- echo $ac_n "checking whether byte ordering is bigendian""... $ac_c" 1>&6
-echo "configure:3621: checking whether byte ordering is bigendian" >&5
-if eval "test \"`echo '$''{'ac_cv_c_bigendian'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- ac_cv_c_bigendian=unknown
-# See if sys/param.h defines the BYTE_ORDER macro.
-cat > conftest.$ac_ext <<EOF
-#line 3628 "configure"
-#include "confdefs.h"
-#include <sys/types.h>
-#include <sys/param.h>
-int main() {
-
-#if !BYTE_ORDER || !BIG_ENDIAN || !LITTLE_ENDIAN
- bogus endian macros
-#endif
-; return 0; }
-EOF
-if { (eval echo configure:3639: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
- rm -rf conftest*
- # It does; now see whether it defined to BIG_ENDIAN or not.
-cat > conftest.$ac_ext <<EOF
-#line 3643 "configure"
-#include "confdefs.h"
-#include <sys/types.h>
-#include <sys/param.h>
-int main() {
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-#if BYTE_ORDER != BIG_ENDIAN
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-#endif
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- ac_cv_c_bigendian=yes
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- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- ac_cv_c_bigendian=no
-fi
-rm -f conftest*
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- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
-fi
-rm -f conftest*
-if test $ac_cv_c_bigendian = unknown; then
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-else
- cat > conftest.$ac_ext <<EOF
-#line 3674 "configure"
-#include "confdefs.h"
-main () {
- /* Are we little or big endian? From Harbison&Steele. */
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- {
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- char c[sizeof (long)];
- } u;
- u.l = 1;
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-if { (eval echo configure:3687: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null
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- cat conftest.$ac_ext >&5
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-fi
-rm -fr conftest*
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-
-fi
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-
-echo "$ac_t""$ac_cv_c_bigendian" 1>&6
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-
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-
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- else
- sim_hostendian="-DWITH_HOST_BYTE_ORDER=LITTLE_ENDIAN"
- fi
-else
- sim_hostendian="-DWITH_HOST_BYTE_ORDER=0"
-fi
-fi
-
-
-default_sim_scache="16384"
-# Check whether --enable-sim-scache or --disable-sim-scache was given.
-if test "${enable_sim_scache+set}" = set; then
- enableval="$enable_sim_scache"
- case "${enableval}" in
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- no) sim_scache="-DWITH_SCACHE=0" ;;
- [0-9]*) sim_scache="-DWITH_SCACHE=${enableval}";;
- *) { echo "configure: error: "Bad value $enableval passed to --enable-sim-scache"" 1>&2; exit 1; };
- sim_scache="";;
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-if test x"$silent" != x"yes" && test x"$sim_scache" != x""; then
- echo "Setting scache size = $sim_scache" 6>&1
-fi
-else
- sim_scache="-DWITH_SCACHE=${default_sim_scache}"
-fi
-
-
-
-default_sim_default_model="fr30-1"
-# Check whether --enable-sim-default-model or --disable-sim-default-model was given.
-if test "${enable_sim_default_model+set}" = set; then
- enableval="$enable_sim_default_model"
- case "${enableval}" in
- yes|no) { echo "configure: error: "Missing argument to --enable-sim-default-model"" 1>&2; exit 1; };;
- *) sim_default_model="-DWITH_DEFAULT_MODEL='\"${enableval}\"'";;
-esac
-if test x"$silent" != x"yes" && test x"$sim_default_model" != x""; then
- echo "Setting default model = $sim_default_model" 6>&1
-fi
-else
- sim_default_model="-DWITH_DEFAULT_MODEL='\"${default_sim_default_model}\"'"
-fi
-
-
-
-# Check whether --enable-sim-environment or --disable-sim-environment was given.
-if test "${enable_sim_environment+set}" = set; then
- enableval="$enable_sim_environment"
- case "${enableval}" in
- all | ALL) sim_environment="-DWITH_ENVIRONMENT=ALL_ENVIRONMENT";;
- user | USER) sim_environment="-DWITH_ENVIRONMENT=USER_ENVIRONMENT";;
- virtual | VIRTUAL) sim_environment="-DWITH_ENVIRONMENT=VIRTUAL_ENVIRONMENT";;
- operating | OPERATING) sim_environment="-DWITH_ENVIRONMENT=OPERATING_ENVIRONMENT";;
- *) { echo "configure: error: "Unknown value $enableval passed to --enable-sim-environment"" 1>&2; exit 1; };
- sim_environment="";;
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-else
- sim_environment="-DWITH_ENVIRONMENT=ALL_ENVIRONMENT"
-fi
-
-
-cgen_maint=no
-cgen=guile
-cgendir='$(srcdir)/../../cgen'
-# Check whether --enable-cgen-maint or --disable-cgen-maint was given.
-if test "${enable_cgen_maint+set}" = set; then
- enableval="$enable_cgen_maint"
- case "${enableval}" in
- yes) cgen_maint=yes ;;
- no) cgen_maint=no ;;
- *)
- # argument is cgen install directory (not implemented yet).
- # Having a `share' directory might be more appropriate for the .scm,
- # .cpu, etc. files.
- cgendir=${cgen_maint}/lib/cgen
- cgen=guile
- ;;
-esac
-fi
-if test x${cgen_maint} != xno ; then
- CGEN_MAINT=''
-else
- CGEN_MAINT='#'
-fi
-
-
-
-
-
-
-
-trap '' 1 2 15
-cat > confcache <<\EOF
-# This file is a shell script that caches the results of configure
-# tests run on this system so they can be shared between configure
-# scripts and configure runs. It is not useful on other systems.
-# If it contains results you don't want to keep, you may remove or edit it.
-#
-# By default, configure uses ./config.cache as the cache file,
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-# the --cache-file=FILE option to use a different cache file; that is
-# what configure does when it calls configure scripts in
-# subdirectories, so they share the cache.
-# Giving --cache-file=/dev/null disables caching, for debugging configure.
-# config.status only pays attention to the cache file if you give it the
-# --recheck option to rerun configure.
-#
-EOF
-# The following way of writing the cache mishandles newlines in values,
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-(set) 2>&1 |
- case `(ac_space=' '; set | grep ac_space) 2>&1` in
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- # `set' does not quote correctly, so add quotes (double-quote substitution
- # turns \\\\ into \\, and sed turns \\ into \).
- sed -n \
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- -e "s/^\\([a-zA-Z0-9_]*_cv_[a-zA-Z0-9_]*\\)=\\(.*\\)/\\1=\${\\1='\\2'}/p"
- ;;
- *)
- # `set' quotes correctly as required by POSIX, so do not add quotes.
- sed -n -e 's/^\([a-zA-Z0-9_]*_cv_[a-zA-Z0-9_]*\)=\(.*\)/\1=${\1=\2}/p'
- ;;
- esac >> confcache
-if cmp -s $cache_file confcache; then
- :
-else
- if test -w $cache_file; then
- echo "updating cache $cache_file"
- cat confcache > $cache_file
- else
- echo "not updating unwritable cache $cache_file"
- fi
-fi
-rm -f confcache
-
-trap 'rm -fr conftest* confdefs* core core.* *.core $ac_clean_files; exit 1' 1 2 15
-
-test "x$prefix" = xNONE && prefix=$ac_default_prefix
-# Let make expand exec_prefix.
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-
-# Any assignment to VPATH causes Sun make to only execute
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- ac_vpsub='/^[ ]*VPATH[ ]*=[^:]*$/d'
-fi
-
-trap 'rm -f $CONFIG_STATUS conftest*; exit 1' 1 2 15
-
-DEFS=-DHAVE_CONFIG_H
-
-# Without the "./", some shells look in PATH for config.status.
-: ${CONFIG_STATUS=./config.status}
-
-echo creating $CONFIG_STATUS
-rm -f $CONFIG_STATUS
-cat > $CONFIG_STATUS <<EOF
-#! /bin/sh
-# Generated automatically by configure.
-# Run this file to recreate the current configuration.
-# This directory was configured as follows,
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-# $0 $ac_configure_args
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- -version | --version | --versio | --versi | --vers | --ver | --ve | --v)
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- *) echo "\$ac_cs_usage"; exit 1 ;;
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-
-ac_given_srcdir=$srcdir
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-
-trap 'rm -fr `echo "Makefile.sim:Makefile.in Make-common.sim:../common/Make-common.in .gdbinit:../common/gdbinit.in config.h:config.in" | sed "s/:[^ ]*//g"` conftest*; exit 1' 1 2 15
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-cat >> $CONFIG_STATUS <<EOF
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-# Protect against being on the right side of a sed subst in config.status.
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- case "$ac_given_srcdir" in
- .) srcdir=.
- if test -z "$ac_dots"; then top_srcdir=.
- else top_srcdir=`echo $ac_dots|sed 's%/$%%'`; fi ;;
- /*) srcdir="$ac_given_srcdir$ac_dir_suffix"; top_srcdir="$ac_given_srcdir" ;;
- *) # Relative path.
- srcdir="$ac_dots$ac_given_srcdir$ac_dir_suffix"
- top_srcdir="$ac_dots$ac_given_srcdir" ;;
- esac
-
- case "$ac_given_INSTALL" in
- [/$]*) INSTALL="$ac_given_INSTALL" ;;
- *) INSTALL="$ac_dots$ac_given_INSTALL" ;;
- esac
-
- echo creating "$ac_file"
- rm -f "$ac_file"
- configure_input="Generated automatically from `echo $ac_file_in|sed 's%.*/%%'` by configure."
- case "$ac_file" in
- *Makefile*) ac_comsub="1i\\
-# $configure_input" ;;
- *) ac_comsub= ;;
- esac
-
- ac_file_inputs=`echo $ac_file_in|sed -e "s%^%$ac_given_srcdir/%" -e "s%:% $ac_given_srcdir/%g"`
- sed -e "$ac_comsub
-s%@configure_input@%$configure_input%g
-s%@srcdir@%$srcdir%g
-s%@top_srcdir@%$top_srcdir%g
-s%@INSTALL@%$INSTALL%g
-" $ac_file_inputs | (eval "$ac_sed_cmds") > $ac_file
-fi; done
-rm -f conftest.s*
-
-# These sed commands are passed to sed as "A NAME B NAME C VALUE D", where
-# NAME is the cpp macro being defined and VALUE is the value it is being given.
-#
-# ac_d sets the value in "#define NAME VALUE" lines.
-ac_dA='s%^\([ ]*\)#\([ ]*define[ ][ ]*\)'
-ac_dB='\([ ][ ]*\)[^ ]*%\1#\2'
-ac_dC='\3'
-ac_dD='%g'
-# ac_u turns "#undef NAME" with trailing blanks into "#define NAME VALUE".
-ac_uA='s%^\([ ]*\)#\([ ]*\)undef\([ ][ ]*\)'
-ac_uB='\([ ]\)%\1#\2define\3'
-ac_uC=' '
-ac_uD='\4%g'
-# ac_e turns "#undef NAME" without trailing blanks into "#define NAME VALUE".
-ac_eA='s%^\([ ]*\)#\([ ]*\)undef\([ ][ ]*\)'
-ac_eB='$%\1#\2define\3'
-ac_eC=' '
-ac_eD='%g'
-
-if test "${CONFIG_HEADERS+set}" != set; then
-EOF
-cat >> $CONFIG_STATUS <<EOF
- CONFIG_HEADERS="config.h:config.in"
-EOF
-cat >> $CONFIG_STATUS <<\EOF
-fi
-for ac_file in .. $CONFIG_HEADERS; do if test "x$ac_file" != x..; then
- # Support "outfile[:infile[:infile...]]", defaulting infile="outfile.in".
- case "$ac_file" in
- *:*) ac_file_in=`echo "$ac_file"|sed 's%[^:]*:%%'`
- ac_file=`echo "$ac_file"|sed 's%:.*%%'` ;;
- *) ac_file_in="${ac_file}.in" ;;
- esac
-
- echo creating $ac_file
-
- rm -f conftest.frag conftest.in conftest.out
- ac_file_inputs=`echo $ac_file_in|sed -e "s%^%$ac_given_srcdir/%" -e "s%:% $ac_given_srcdir/%g"`
- cat $ac_file_inputs > conftest.in
-
-EOF
-
-# Transform confdefs.h into a sed script conftest.vals that substitutes
-# the proper values into config.h.in to produce config.h. And first:
-# Protect against being on the right side of a sed subst in config.status.
-# Protect against being in an unquoted here document in config.status.
-rm -f conftest.vals
-cat > conftest.hdr <<\EOF
-s/[\\&%]/\\&/g
-s%[\\$`]%\\&%g
-s%#define \([A-Za-z_][A-Za-z0-9_]*\) *\(.*\)%${ac_dA}\1${ac_dB}\1${ac_dC}\2${ac_dD}%gp
-s%ac_d%ac_u%gp
-s%ac_u%ac_e%gp
-EOF
-sed -n -f conftest.hdr confdefs.h > conftest.vals
-rm -f conftest.hdr
-
-# This sed command replaces #undef with comments. This is necessary, for
-# example, in the case of _POSIX_SOURCE, which is predefined and required
-# on some systems where configure will not decide to define it.
-cat >> conftest.vals <<\EOF
-s%^[ ]*#[ ]*undef[ ][ ]*[a-zA-Z_][a-zA-Z_0-9]*%/* & */%
-EOF
-
-# Break up conftest.vals because some shells have a limit on
-# the size of here documents, and old seds have small limits too.
-
-rm -f conftest.tail
-while :
-do
- ac_lines=`grep -c . conftest.vals`
- # grep -c gives empty output for an empty file on some AIX systems.
- if test -z "$ac_lines" || test "$ac_lines" -eq 0; then break; fi
- # Write a limited-size here document to conftest.frag.
- echo ' cat > conftest.frag <<CEOF' >> $CONFIG_STATUS
- sed ${ac_max_here_lines}q conftest.vals >> $CONFIG_STATUS
- echo 'CEOF
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-' >> $CONFIG_STATUS
- sed 1,${ac_max_here_lines}d conftest.vals > conftest.tail
- rm -f conftest.vals
- mv conftest.tail conftest.vals
-done
-rm -f conftest.vals
-
-cat >> $CONFIG_STATUS <<\EOF
- rm -f conftest.frag conftest.h
- echo "/* $ac_file. Generated automatically by configure. */" > conftest.h
- cat conftest.in >> conftest.h
- rm -f conftest.in
- if cmp -s $ac_file conftest.h 2>/dev/null; then
- echo "$ac_file is unchanged"
- rm -f conftest.h
- else
- # Remove last slash and all that follows it. Not all systems have dirname.
- ac_dir=`echo $ac_file|sed 's%/[^/][^/]*$%%'`
- if test "$ac_dir" != "$ac_file" && test "$ac_dir" != .; then
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- test ! -d "$ac_dir" && mkdir "$ac_dir"
- fi
- rm -f $ac_file
- mv conftest.h $ac_file
- fi
-fi; done
-
-EOF
-
-cat >> $CONFIG_STATUS <<EOF
-ac_sources="$sim_link_files"
-ac_dests="$sim_link_links"
-EOF
-
-cat >> $CONFIG_STATUS <<\EOF
-srcdir=$ac_given_srcdir
-while test -n "$ac_sources"; do
- set $ac_dests; ac_dest=$1; shift; ac_dests=$*
- set $ac_sources; ac_source=$1; shift; ac_sources=$*
-
- echo "linking $srcdir/$ac_source to $ac_dest"
-
- if test ! -r $srcdir/$ac_source; then
- { echo "configure: error: $srcdir/$ac_source: File not found" 1>&2; exit 1; }
- fi
- rm -f $ac_dest
-
- # Make relative symlinks.
- # Remove last slash and all that follows it. Not all systems have dirname.
- ac_dest_dir=`echo $ac_dest|sed 's%/[^/][^/]*$%%'`
- if test "$ac_dest_dir" != "$ac_dest" && test "$ac_dest_dir" != .; then
- # The dest file is in a subdirectory.
- test ! -d "$ac_dest_dir" && mkdir "$ac_dest_dir"
- ac_dest_dir_suffix="/`echo $ac_dest_dir|sed 's%^\./%%'`"
- # A "../" for each directory in $ac_dest_dir_suffix.
- ac_dots=`echo $ac_dest_dir_suffix|sed 's%/[^/]*%../%g'`
- else
- ac_dest_dir_suffix= ac_dots=
- fi
-
- case "$srcdir" in
- [/$]*) ac_rel_source="$srcdir/$ac_source" ;;
- *) ac_rel_source="$ac_dots$srcdir/$ac_source" ;;
- esac
-
- # Make a symlink if possible; otherwise try a hard link.
- if ln -s $ac_rel_source $ac_dest 2>/dev/null ||
- ln $srcdir/$ac_source $ac_dest; then :
- else
- { echo "configure: error: can not link $ac_dest to $srcdir/$ac_source" 1>&2; exit 1; }
- fi
-done
-EOF
-cat >> $CONFIG_STATUS <<EOF
-
-EOF
-cat >> $CONFIG_STATUS <<\EOF
-case "x$CONFIG_FILES" in
- xMakefile*)
- echo "Merging Makefile.sim+Make-common.sim into Makefile ..."
- rm -f Makesim1.tmp Makesim2.tmp Makefile
- sed -n -e '/^## COMMON_PRE_/,/^## End COMMON_PRE_/ p' <Make-common.sim >Makesim1.tmp
- sed -n -e '/^## COMMON_POST_/,/^## End COMMON_POST_/ p' <Make-common.sim >Makesim2.tmp
- sed -e '/^## COMMON_PRE_/ r Makesim1.tmp' \
- -e '/^## COMMON_POST_/ r Makesim2.tmp' \
- <Makefile.sim >Makefile
- rm -f Makefile.sim Make-common.sim Makesim1.tmp Makesim2.tmp
- ;;
- esac
- case "x$CONFIG_HEADERS" in xconfig.h:config.in) echo > stamp-h ;; esac
-
-exit 0
-EOF
-chmod +x $CONFIG_STATUS
-rm -fr confdefs* $ac_clean_files
-test "$no_create" = yes || ${CONFIG_SHELL-/bin/sh} $CONFIG_STATUS || exit 1
-
-
diff --git a/sim/fr30/configure.in b/sim/fr30/configure.in
deleted file mode 100644
index cb01e1308b5..00000000000
--- a/sim/fr30/configure.in
+++ /dev/null
@@ -1,16 +0,0 @@
-dnl Process this file with autoconf to produce a configure script.
-sinclude(../common/aclocal.m4)
-AC_PREREQ(2.5)dnl
-AC_INIT(Makefile.in)
-
-SIM_AC_COMMON
-
-SIM_AC_OPTION_ENDIAN(BIG_ENDIAN)
-SIM_AC_OPTION_ALIGNMENT(FORCED_ALIGNMENT)
-SIM_AC_OPTION_HOSTENDIAN
-SIM_AC_OPTION_SCACHE(16384)
-SIM_AC_OPTION_DEFAULT_MODEL(fr30-1)
-SIM_AC_OPTION_ENVIRONMENT
-SIM_AC_OPTION_CGEN_MAINT
-
-SIM_AC_OUTPUT
diff --git a/sim/fr30/cpu.c b/sim/fr30/cpu.c
deleted file mode 100644
index 374bcc86643..00000000000
--- a/sim/fr30/cpu.c
+++ /dev/null
@@ -1,357 +0,0 @@
-/* Misc. support for CPU family fr30bf.
-
-THIS FILE IS MACHINE GENERATED WITH CGEN.
-
-Copyright (C) 1996, 1997, 1998, 1999, 2000 Free Software Foundation, Inc.
-
-This file is part of the GNU Simulators.
-
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License along
-with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
-*/
-
-#define WANT_CPU fr30bf
-#define WANT_CPU_FR30BF
-
-#include "sim-main.h"
-#include "cgen-ops.h"
-
-/* Get the value of h-pc. */
-
-USI
-fr30bf_h_pc_get (SIM_CPU *current_cpu)
-{
- return CPU (h_pc);
-}
-
-/* Set a value for h-pc. */
-
-void
-fr30bf_h_pc_set (SIM_CPU *current_cpu, USI newval)
-{
- CPU (h_pc) = newval;
-}
-
-/* Get the value of h-gr. */
-
-SI
-fr30bf_h_gr_get (SIM_CPU *current_cpu, UINT regno)
-{
- return CPU (h_gr[regno]);
-}
-
-/* Set a value for h-gr. */
-
-void
-fr30bf_h_gr_set (SIM_CPU *current_cpu, UINT regno, SI newval)
-{
- CPU (h_gr[regno]) = newval;
-}
-
-/* Get the value of h-cr. */
-
-SI
-fr30bf_h_cr_get (SIM_CPU *current_cpu, UINT regno)
-{
- return CPU (h_cr[regno]);
-}
-
-/* Set a value for h-cr. */
-
-void
-fr30bf_h_cr_set (SIM_CPU *current_cpu, UINT regno, SI newval)
-{
- CPU (h_cr[regno]) = newval;
-}
-
-/* Get the value of h-dr. */
-
-SI
-fr30bf_h_dr_get (SIM_CPU *current_cpu, UINT regno)
-{
- return GET_H_DR (regno);
-}
-
-/* Set a value for h-dr. */
-
-void
-fr30bf_h_dr_set (SIM_CPU *current_cpu, UINT regno, SI newval)
-{
- SET_H_DR (regno, newval);
-}
-
-/* Get the value of h-ps. */
-
-USI
-fr30bf_h_ps_get (SIM_CPU *current_cpu)
-{
- return GET_H_PS ();
-}
-
-/* Set a value for h-ps. */
-
-void
-fr30bf_h_ps_set (SIM_CPU *current_cpu, USI newval)
-{
- SET_H_PS (newval);
-}
-
-/* Get the value of h-r13. */
-
-SI
-fr30bf_h_r13_get (SIM_CPU *current_cpu)
-{
- return CPU (h_r13);
-}
-
-/* Set a value for h-r13. */
-
-void
-fr30bf_h_r13_set (SIM_CPU *current_cpu, SI newval)
-{
- CPU (h_r13) = newval;
-}
-
-/* Get the value of h-r14. */
-
-SI
-fr30bf_h_r14_get (SIM_CPU *current_cpu)
-{
- return CPU (h_r14);
-}
-
-/* Set a value for h-r14. */
-
-void
-fr30bf_h_r14_set (SIM_CPU *current_cpu, SI newval)
-{
- CPU (h_r14) = newval;
-}
-
-/* Get the value of h-r15. */
-
-SI
-fr30bf_h_r15_get (SIM_CPU *current_cpu)
-{
- return CPU (h_r15);
-}
-
-/* Set a value for h-r15. */
-
-void
-fr30bf_h_r15_set (SIM_CPU *current_cpu, SI newval)
-{
- CPU (h_r15) = newval;
-}
-
-/* Get the value of h-nbit. */
-
-BI
-fr30bf_h_nbit_get (SIM_CPU *current_cpu)
-{
- return CPU (h_nbit);
-}
-
-/* Set a value for h-nbit. */
-
-void
-fr30bf_h_nbit_set (SIM_CPU *current_cpu, BI newval)
-{
- CPU (h_nbit) = newval;
-}
-
-/* Get the value of h-zbit. */
-
-BI
-fr30bf_h_zbit_get (SIM_CPU *current_cpu)
-{
- return CPU (h_zbit);
-}
-
-/* Set a value for h-zbit. */
-
-void
-fr30bf_h_zbit_set (SIM_CPU *current_cpu, BI newval)
-{
- CPU (h_zbit) = newval;
-}
-
-/* Get the value of h-vbit. */
-
-BI
-fr30bf_h_vbit_get (SIM_CPU *current_cpu)
-{
- return CPU (h_vbit);
-}
-
-/* Set a value for h-vbit. */
-
-void
-fr30bf_h_vbit_set (SIM_CPU *current_cpu, BI newval)
-{
- CPU (h_vbit) = newval;
-}
-
-/* Get the value of h-cbit. */
-
-BI
-fr30bf_h_cbit_get (SIM_CPU *current_cpu)
-{
- return CPU (h_cbit);
-}
-
-/* Set a value for h-cbit. */
-
-void
-fr30bf_h_cbit_set (SIM_CPU *current_cpu, BI newval)
-{
- CPU (h_cbit) = newval;
-}
-
-/* Get the value of h-ibit. */
-
-BI
-fr30bf_h_ibit_get (SIM_CPU *current_cpu)
-{
- return CPU (h_ibit);
-}
-
-/* Set a value for h-ibit. */
-
-void
-fr30bf_h_ibit_set (SIM_CPU *current_cpu, BI newval)
-{
- CPU (h_ibit) = newval;
-}
-
-/* Get the value of h-sbit. */
-
-BI
-fr30bf_h_sbit_get (SIM_CPU *current_cpu)
-{
- return GET_H_SBIT ();
-}
-
-/* Set a value for h-sbit. */
-
-void
-fr30bf_h_sbit_set (SIM_CPU *current_cpu, BI newval)
-{
- SET_H_SBIT (newval);
-}
-
-/* Get the value of h-tbit. */
-
-BI
-fr30bf_h_tbit_get (SIM_CPU *current_cpu)
-{
- return CPU (h_tbit);
-}
-
-/* Set a value for h-tbit. */
-
-void
-fr30bf_h_tbit_set (SIM_CPU *current_cpu, BI newval)
-{
- CPU (h_tbit) = newval;
-}
-
-/* Get the value of h-d0bit. */
-
-BI
-fr30bf_h_d0bit_get (SIM_CPU *current_cpu)
-{
- return CPU (h_d0bit);
-}
-
-/* Set a value for h-d0bit. */
-
-void
-fr30bf_h_d0bit_set (SIM_CPU *current_cpu, BI newval)
-{
- CPU (h_d0bit) = newval;
-}
-
-/* Get the value of h-d1bit. */
-
-BI
-fr30bf_h_d1bit_get (SIM_CPU *current_cpu)
-{
- return CPU (h_d1bit);
-}
-
-/* Set a value for h-d1bit. */
-
-void
-fr30bf_h_d1bit_set (SIM_CPU *current_cpu, BI newval)
-{
- CPU (h_d1bit) = newval;
-}
-
-/* Get the value of h-ccr. */
-
-UQI
-fr30bf_h_ccr_get (SIM_CPU *current_cpu)
-{
- return GET_H_CCR ();
-}
-
-/* Set a value for h-ccr. */
-
-void
-fr30bf_h_ccr_set (SIM_CPU *current_cpu, UQI newval)
-{
- SET_H_CCR (newval);
-}
-
-/* Get the value of h-scr. */
-
-UQI
-fr30bf_h_scr_get (SIM_CPU *current_cpu)
-{
- return GET_H_SCR ();
-}
-
-/* Set a value for h-scr. */
-
-void
-fr30bf_h_scr_set (SIM_CPU *current_cpu, UQI newval)
-{
- SET_H_SCR (newval);
-}
-
-/* Get the value of h-ilm. */
-
-UQI
-fr30bf_h_ilm_get (SIM_CPU *current_cpu)
-{
- return GET_H_ILM ();
-}
-
-/* Set a value for h-ilm. */
-
-void
-fr30bf_h_ilm_set (SIM_CPU *current_cpu, UQI newval)
-{
- SET_H_ILM (newval);
-}
-
-/* Record trace results for INSN. */
-
-void
-fr30bf_record_trace_results (SIM_CPU *current_cpu, CGEN_INSN *insn,
- int *indices, TRACE_RECORD *tr)
-{
-}
diff --git a/sim/fr30/cpu.h b/sim/fr30/cpu.h
deleted file mode 100644
index 7a7ee46c415..00000000000
--- a/sim/fr30/cpu.h
+++ /dev/null
@@ -1,890 +0,0 @@
-/* CPU family header for fr30bf.
-
-THIS FILE IS MACHINE GENERATED WITH CGEN.
-
-Copyright (C) 1996, 1997, 1998, 1999, 2000 Free Software Foundation, Inc.
-
-This file is part of the GNU Simulators.
-
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License along
-with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
-*/
-
-#ifndef CPU_FR30BF_H
-#define CPU_FR30BF_H
-
-/* Maximum number of instructions that are fetched at a time.
- This is for LIW type instructions sets (e.g. m32r). */
-#define MAX_LIW_INSNS 1
-
-/* Maximum number of instructions that can be executed in parallel. */
-#define MAX_PARALLEL_INSNS 1
-
-/* CPU state information. */
-typedef struct {
- /* Hardware elements. */
- struct {
- /* program counter */
- USI h_pc;
-#define GET_H_PC() CPU (h_pc)
-#define SET_H_PC(x) (CPU (h_pc) = (x))
- /* general registers */
- SI h_gr[16];
-#define GET_H_GR(a1) CPU (h_gr)[a1]
-#define SET_H_GR(a1, x) (CPU (h_gr)[a1] = (x))
- /* coprocessor registers */
- SI h_cr[16];
-#define GET_H_CR(a1) CPU (h_cr)[a1]
-#define SET_H_CR(a1, x) (CPU (h_cr)[a1] = (x))
- /* dedicated registers */
- SI h_dr[6];
-#define GET_H_DR(index) fr30bf_h_dr_get_handler (current_cpu, index)
-#define SET_H_DR(index, x) \
-do { \
-fr30bf_h_dr_set_handler (current_cpu, (index), (x));\
-;} while (0)
- /* processor status */
- USI h_ps;
-#define GET_H_PS() fr30bf_h_ps_get_handler (current_cpu)
-#define SET_H_PS(x) \
-do { \
-fr30bf_h_ps_set_handler (current_cpu, (x));\
-;} while (0)
- /* General Register 13 explicitly required */
- SI h_r13;
-#define GET_H_R13() CPU (h_r13)
-#define SET_H_R13(x) (CPU (h_r13) = (x))
- /* General Register 14 explicitly required */
- SI h_r14;
-#define GET_H_R14() CPU (h_r14)
-#define SET_H_R14(x) (CPU (h_r14) = (x))
- /* General Register 15 explicitly required */
- SI h_r15;
-#define GET_H_R15() CPU (h_r15)
-#define SET_H_R15(x) (CPU (h_r15) = (x))
- /* negative bit */
- BI h_nbit;
-#define GET_H_NBIT() CPU (h_nbit)
-#define SET_H_NBIT(x) (CPU (h_nbit) = (x))
- /* zero bit */
- BI h_zbit;
-#define GET_H_ZBIT() CPU (h_zbit)
-#define SET_H_ZBIT(x) (CPU (h_zbit) = (x))
- /* overflow bit */
- BI h_vbit;
-#define GET_H_VBIT() CPU (h_vbit)
-#define SET_H_VBIT(x) (CPU (h_vbit) = (x))
- /* carry bit */
- BI h_cbit;
-#define GET_H_CBIT() CPU (h_cbit)
-#define SET_H_CBIT(x) (CPU (h_cbit) = (x))
- /* interrupt enable bit */
- BI h_ibit;
-#define GET_H_IBIT() CPU (h_ibit)
-#define SET_H_IBIT(x) (CPU (h_ibit) = (x))
- /* stack bit */
- BI h_sbit;
-#define GET_H_SBIT() fr30bf_h_sbit_get_handler (current_cpu)
-#define SET_H_SBIT(x) \
-do { \
-fr30bf_h_sbit_set_handler (current_cpu, (x));\
-;} while (0)
- /* trace trap bit */
- BI h_tbit;
-#define GET_H_TBIT() CPU (h_tbit)
-#define SET_H_TBIT(x) (CPU (h_tbit) = (x))
- /* division 0 bit */
- BI h_d0bit;
-#define GET_H_D0BIT() CPU (h_d0bit)
-#define SET_H_D0BIT(x) (CPU (h_d0bit) = (x))
- /* division 1 bit */
- BI h_d1bit;
-#define GET_H_D1BIT() CPU (h_d1bit)
-#define SET_H_D1BIT(x) (CPU (h_d1bit) = (x))
- /* condition code bits */
- UQI h_ccr;
-#define GET_H_CCR() fr30bf_h_ccr_get_handler (current_cpu)
-#define SET_H_CCR(x) \
-do { \
-fr30bf_h_ccr_set_handler (current_cpu, (x));\
-;} while (0)
- /* system condition bits */
- UQI h_scr;
-#define GET_H_SCR() fr30bf_h_scr_get_handler (current_cpu)
-#define SET_H_SCR(x) \
-do { \
-fr30bf_h_scr_set_handler (current_cpu, (x));\
-;} while (0)
- /* interrupt level mask */
- UQI h_ilm;
-#define GET_H_ILM() fr30bf_h_ilm_get_handler (current_cpu)
-#define SET_H_ILM(x) \
-do { \
-fr30bf_h_ilm_set_handler (current_cpu, (x));\
-;} while (0)
- } hardware;
-#define CPU_CGEN_HW(cpu) (& (cpu)->cpu_data.hardware)
-} FR30BF_CPU_DATA;
-
-/* Cover fns for register access. */
-USI fr30bf_h_pc_get (SIM_CPU *);
-void fr30bf_h_pc_set (SIM_CPU *, USI);
-SI fr30bf_h_gr_get (SIM_CPU *, UINT);
-void fr30bf_h_gr_set (SIM_CPU *, UINT, SI);
-SI fr30bf_h_cr_get (SIM_CPU *, UINT);
-void fr30bf_h_cr_set (SIM_CPU *, UINT, SI);
-SI fr30bf_h_dr_get (SIM_CPU *, UINT);
-void fr30bf_h_dr_set (SIM_CPU *, UINT, SI);
-USI fr30bf_h_ps_get (SIM_CPU *);
-void fr30bf_h_ps_set (SIM_CPU *, USI);
-SI fr30bf_h_r13_get (SIM_CPU *);
-void fr30bf_h_r13_set (SIM_CPU *, SI);
-SI fr30bf_h_r14_get (SIM_CPU *);
-void fr30bf_h_r14_set (SIM_CPU *, SI);
-SI fr30bf_h_r15_get (SIM_CPU *);
-void fr30bf_h_r15_set (SIM_CPU *, SI);
-BI fr30bf_h_nbit_get (SIM_CPU *);
-void fr30bf_h_nbit_set (SIM_CPU *, BI);
-BI fr30bf_h_zbit_get (SIM_CPU *);
-void fr30bf_h_zbit_set (SIM_CPU *, BI);
-BI fr30bf_h_vbit_get (SIM_CPU *);
-void fr30bf_h_vbit_set (SIM_CPU *, BI);
-BI fr30bf_h_cbit_get (SIM_CPU *);
-void fr30bf_h_cbit_set (SIM_CPU *, BI);
-BI fr30bf_h_ibit_get (SIM_CPU *);
-void fr30bf_h_ibit_set (SIM_CPU *, BI);
-BI fr30bf_h_sbit_get (SIM_CPU *);
-void fr30bf_h_sbit_set (SIM_CPU *, BI);
-BI fr30bf_h_tbit_get (SIM_CPU *);
-void fr30bf_h_tbit_set (SIM_CPU *, BI);
-BI fr30bf_h_d0bit_get (SIM_CPU *);
-void fr30bf_h_d0bit_set (SIM_CPU *, BI);
-BI fr30bf_h_d1bit_get (SIM_CPU *);
-void fr30bf_h_d1bit_set (SIM_CPU *, BI);
-UQI fr30bf_h_ccr_get (SIM_CPU *);
-void fr30bf_h_ccr_set (SIM_CPU *, UQI);
-UQI fr30bf_h_scr_get (SIM_CPU *);
-void fr30bf_h_scr_set (SIM_CPU *, UQI);
-UQI fr30bf_h_ilm_get (SIM_CPU *);
-void fr30bf_h_ilm_set (SIM_CPU *, UQI);
-
-/* These must be hand-written. */
-extern CPUREG_FETCH_FN fr30bf_fetch_register;
-extern CPUREG_STORE_FN fr30bf_store_register;
-
-typedef struct {
- UINT load_regs;
- UINT load_regs_pending;
-} MODEL_FR30_1_DATA;
-
-/* Instruction argument buffer. */
-
-union sem_fields {
- struct { /* no operands */
- int empty;
- } fmt_empty;
- struct { /* */
- IADDR i_label9;
- } sfmt_brad;
- struct { /* */
- UINT f_u8;
- } sfmt_int;
- struct { /* */
- IADDR i_label12;
- } sfmt_call;
- struct { /* */
- SI f_s10;
- unsigned char in_h_gr_15;
- unsigned char out_h_gr_15;
- } sfmt_addsp;
- struct { /* */
- USI f_dir10;
- unsigned char in_h_gr_15;
- unsigned char out_h_gr_15;
- } sfmt_dmovr15pi;
- struct { /* */
- UINT f_dir8;
- unsigned char in_h_gr_13;
- unsigned char out_h_gr_13;
- } sfmt_dmovr13pib;
- struct { /* */
- USI f_dir9;
- unsigned char in_h_gr_13;
- unsigned char out_h_gr_13;
- } sfmt_dmovr13pih;
- struct { /* */
- USI f_dir10;
- unsigned char in_h_gr_13;
- unsigned char out_h_gr_13;
- } sfmt_dmovr13pi;
- struct { /* */
- UINT f_Rs2;
- unsigned char in_h_gr_15;
- unsigned char out_h_gr_15;
- } sfmt_ldr15dr;
- struct { /* */
- SI* i_Ri;
- UINT f_Ri;
- UINT f_Rs1;
- unsigned char in_Ri;
- } sfmt_mov2dr;
- struct { /* */
- SI* i_Ri;
- UINT f_Ri;
- UINT f_Rs1;
- unsigned char out_Ri;
- } sfmt_movdr;
- struct { /* */
- SI* i_Ri;
- UINT f_Ri;
- UINT f_i32;
- unsigned char out_Ri;
- } sfmt_ldi32;
- struct { /* */
- SI* i_Ri;
- UINT f_Ri;
- UINT f_i20;
- unsigned char out_Ri;
- } sfmt_ldi20;
- struct { /* */
- SI* i_Ri;
- UINT f_Ri;
- UINT f_i8;
- unsigned char out_Ri;
- } sfmt_ldi8;
- struct { /* */
- USI f_u10;
- unsigned char in_h_gr_14;
- unsigned char in_h_gr_15;
- unsigned char out_h_gr_14;
- unsigned char out_h_gr_15;
- } sfmt_enter;
- struct { /* */
- SI* i_Ri;
- UINT f_Ri;
- unsigned char in_Ri;
- unsigned char in_h_gr_15;
- unsigned char out_h_gr_15;
- } sfmt_str15gr;
- struct { /* */
- SI* i_Ri;
- UINT f_Ri;
- USI f_udisp6;
- unsigned char in_Ri;
- unsigned char in_h_gr_15;
- } sfmt_str15;
- struct { /* */
- SI* i_Ri;
- INT f_disp8;
- UINT f_Ri;
- unsigned char in_Ri;
- unsigned char in_h_gr_14;
- } sfmt_str14b;
- struct { /* */
- SI* i_Ri;
- SI f_disp9;
- UINT f_Ri;
- unsigned char in_Ri;
- unsigned char in_h_gr_14;
- } sfmt_str14h;
- struct { /* */
- SI* i_Ri;
- SI f_disp10;
- UINT f_Ri;
- unsigned char in_Ri;
- unsigned char in_h_gr_14;
- } sfmt_str14;
- struct { /* */
- SI* i_Ri;
- UINT f_Ri;
- unsigned char in_h_gr_15;
- unsigned char out_Ri;
- unsigned char out_h_gr_15;
- } sfmt_ldr15gr;
- struct { /* */
- SI* i_Ri;
- UINT f_Ri;
- USI f_udisp6;
- unsigned char in_h_gr_15;
- unsigned char out_Ri;
- } sfmt_ldr15;
- struct { /* */
- SI* i_Ri;
- INT f_disp8;
- UINT f_Ri;
- unsigned char in_h_gr_14;
- unsigned char out_Ri;
- } sfmt_ldr14ub;
- struct { /* */
- SI* i_Ri;
- SI f_disp9;
- UINT f_Ri;
- unsigned char in_h_gr_14;
- unsigned char out_Ri;
- } sfmt_ldr14uh;
- struct { /* */
- SI* i_Ri;
- SI f_disp10;
- UINT f_Ri;
- unsigned char in_h_gr_14;
- unsigned char out_Ri;
- } sfmt_ldr14;
- struct { /* */
- SI* i_Ri;
- SI f_m4;
- UINT f_Ri;
- unsigned char in_Ri;
- unsigned char out_Ri;
- } sfmt_add2;
- struct { /* */
- SI* i_Ri;
- UINT f_Ri;
- UINT f_u4;
- unsigned char in_Ri;
- unsigned char out_Ri;
- } sfmt_addi;
- struct { /* */
- SI* i_Ri;
- SI* i_Rj;
- UINT f_Ri;
- UINT f_Rj;
- unsigned char in_Ri;
- unsigned char in_Rj;
- unsigned char in_h_gr_13;
- } sfmt_str13;
- struct { /* */
- SI* i_Ri;
- SI* i_Rj;
- UINT f_Ri;
- UINT f_Rj;
- unsigned char in_Rj;
- unsigned char in_h_gr_13;
- unsigned char out_Ri;
- } sfmt_ldr13;
- struct { /* */
- SI* i_Ri;
- SI* i_Rj;
- UINT f_Ri;
- UINT f_Rj;
- unsigned char in_Ri;
- unsigned char in_Rj;
- unsigned char out_Ri;
- } sfmt_add;
- struct { /* */
- UINT f_reglist_hi_st;
- unsigned char in_h_gr_10;
- unsigned char in_h_gr_11;
- unsigned char in_h_gr_12;
- unsigned char in_h_gr_13;
- unsigned char in_h_gr_14;
- unsigned char in_h_gr_15;
- unsigned char in_h_gr_8;
- unsigned char in_h_gr_9;
- unsigned char out_h_gr_15;
- } sfmt_stm1;
- struct { /* */
- UINT f_reglist_hi_ld;
- unsigned char in_h_gr_15;
- unsigned char out_h_gr_10;
- unsigned char out_h_gr_11;
- unsigned char out_h_gr_12;
- unsigned char out_h_gr_13;
- unsigned char out_h_gr_14;
- unsigned char out_h_gr_15;
- unsigned char out_h_gr_8;
- unsigned char out_h_gr_9;
- } sfmt_ldm1;
- struct { /* */
- UINT f_reglist_low_st;
- unsigned char in_h_gr_0;
- unsigned char in_h_gr_1;
- unsigned char in_h_gr_15;
- unsigned char in_h_gr_2;
- unsigned char in_h_gr_3;
- unsigned char in_h_gr_4;
- unsigned char in_h_gr_5;
- unsigned char in_h_gr_6;
- unsigned char in_h_gr_7;
- unsigned char out_h_gr_15;
- } sfmt_stm0;
- struct { /* */
- UINT f_reglist_low_ld;
- unsigned char in_h_gr_15;
- unsigned char out_h_gr_0;
- unsigned char out_h_gr_1;
- unsigned char out_h_gr_15;
- unsigned char out_h_gr_2;
- unsigned char out_h_gr_3;
- unsigned char out_h_gr_4;
- unsigned char out_h_gr_5;
- unsigned char out_h_gr_6;
- unsigned char out_h_gr_7;
- } sfmt_ldm0;
-#if WITH_SCACHE_PBB
- /* Writeback handler. */
- struct {
- /* Pointer to argbuf entry for insn whose results need writing back. */
- const struct argbuf *abuf;
- } write;
- /* x-before handler */
- struct {
- /*const SCACHE *insns[MAX_PARALLEL_INSNS];*/
- int first_p;
- } before;
- /* x-after handler */
- struct {
- int empty;
- } after;
- /* This entry is used to terminate each pbb. */
- struct {
- /* Number of insns in pbb. */
- int insn_count;
- /* Next pbb to execute. */
- SCACHE *next;
- SCACHE *branch_target;
- } chain;
-#endif
-};
-
-/* The ARGBUF struct. */
-struct argbuf {
- /* These are the baseclass definitions. */
- IADDR addr;
- const IDESC *idesc;
- char trace_p;
- char profile_p;
- /* ??? Temporary hack for skip insns. */
- char skip_count;
- char unused;
- /* cpu specific data follows */
- union sem semantic;
- int written;
- union sem_fields fields;
-};
-
-/* A cached insn.
-
- ??? SCACHE used to contain more than just argbuf. We could delete the
- type entirely and always just use ARGBUF, but for future concerns and as
- a level of abstraction it is left in. */
-
-struct scache {
- struct argbuf argbuf;
-};
-
-/* Macros to simplify extraction, reading and semantic code.
- These define and assign the local vars that contain the insn's fields. */
-
-#define EXTRACT_IFMT_EMPTY_VARS \
- unsigned int length;
-#define EXTRACT_IFMT_EMPTY_CODE \
- length = 0; \
-
-#define EXTRACT_IFMT_ADD_VARS \
- UINT f_op1; \
- UINT f_op2; \
- UINT f_Rj; \
- UINT f_Ri; \
- unsigned int length;
-#define EXTRACT_IFMT_ADD_CODE \
- length = 2; \
- f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \
- f_op2 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \
- f_Rj = EXTRACT_MSB0_UINT (insn, 16, 8, 4); \
- f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \
-
-#define EXTRACT_IFMT_ADDI_VARS \
- UINT f_op1; \
- UINT f_op2; \
- UINT f_u4; \
- UINT f_Ri; \
- unsigned int length;
-#define EXTRACT_IFMT_ADDI_CODE \
- length = 2; \
- f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \
- f_op2 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \
- f_u4 = EXTRACT_MSB0_UINT (insn, 16, 8, 4); \
- f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \
-
-#define EXTRACT_IFMT_ADD2_VARS \
- UINT f_op1; \
- UINT f_op2; \
- SI f_m4; \
- UINT f_Ri; \
- unsigned int length;
-#define EXTRACT_IFMT_ADD2_CODE \
- length = 2; \
- f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \
- f_op2 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \
- f_m4 = ((EXTRACT_MSB0_UINT (insn, 16, 8, 4)) | (((-1) << (4)))); \
- f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \
-
-#define EXTRACT_IFMT_DIV0S_VARS \
- UINT f_op1; \
- UINT f_op2; \
- UINT f_op3; \
- UINT f_Ri; \
- unsigned int length;
-#define EXTRACT_IFMT_DIV0S_CODE \
- length = 2; \
- f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \
- f_op2 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \
- f_op3 = EXTRACT_MSB0_UINT (insn, 16, 8, 4); \
- f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \
-
-#define EXTRACT_IFMT_DIV3_VARS \
- UINT f_op1; \
- UINT f_op2; \
- UINT f_op3; \
- UINT f_op4; \
- unsigned int length;
-#define EXTRACT_IFMT_DIV3_CODE \
- length = 2; \
- f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \
- f_op2 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \
- f_op3 = EXTRACT_MSB0_UINT (insn, 16, 8, 4); \
- f_op4 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \
-
-#define EXTRACT_IFMT_LDI8_VARS \
- UINT f_op1; \
- UINT f_i8; \
- UINT f_Ri; \
- unsigned int length;
-#define EXTRACT_IFMT_LDI8_CODE \
- length = 2; \
- f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \
- f_i8 = EXTRACT_MSB0_UINT (insn, 16, 4, 8); \
- f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \
-
-#define EXTRACT_IFMT_LDI20_VARS \
- UINT f_op1; \
- UINT f_i20_4; \
- UINT f_i20_16; \
- UINT f_i20; \
- UINT f_op2; \
- UINT f_Ri; \
- /* Contents of trailing part of insn. */ \
- UINT word_1; \
- unsigned int length;
-#define EXTRACT_IFMT_LDI20_CODE \
- length = 4; \
- word_1 = GETIMEMUHI (current_cpu, pc + 2); \
- f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \
- f_i20_4 = EXTRACT_MSB0_UINT (insn, 16, 8, 4); \
- f_i20_16 = (0|(EXTRACT_MSB0_UINT (word_1, 16, 0, 16) << 0)); \
-{\
- f_i20 = ((((f_i20_4) << (16))) | (f_i20_16));\
-}\
- f_op2 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \
- f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \
-
-#define EXTRACT_IFMT_LDI32_VARS \
- UINT f_op1; \
- UINT f_i32; \
- UINT f_op2; \
- UINT f_op3; \
- UINT f_Ri; \
- /* Contents of trailing part of insn. */ \
- UINT word_1; \
- UINT word_2; \
- unsigned int length;
-#define EXTRACT_IFMT_LDI32_CODE \
- length = 6; \
- word_1 = GETIMEMUHI (current_cpu, pc + 2); \
- word_2 = GETIMEMUHI (current_cpu, pc + 4); \
- f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \
- f_i32 = (0|(EXTRACT_MSB0_UINT (word_2, 16, 0, 16) << 0)|(EXTRACT_MSB0_UINT (word_1, 16, 0, 16) << 16)); \
- f_op2 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \
- f_op3 = EXTRACT_MSB0_UINT (insn, 16, 8, 4); \
- f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \
-
-#define EXTRACT_IFMT_LDR14_VARS \
- UINT f_op1; \
- SI f_disp10; \
- UINT f_Ri; \
- unsigned int length;
-#define EXTRACT_IFMT_LDR14_CODE \
- length = 2; \
- f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \
- f_disp10 = ((EXTRACT_MSB0_INT (insn, 16, 4, 8)) << (2)); \
- f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \
-
-#define EXTRACT_IFMT_LDR14UH_VARS \
- UINT f_op1; \
- SI f_disp9; \
- UINT f_Ri; \
- unsigned int length;
-#define EXTRACT_IFMT_LDR14UH_CODE \
- length = 2; \
- f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \
- f_disp9 = ((EXTRACT_MSB0_INT (insn, 16, 4, 8)) << (1)); \
- f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \
-
-#define EXTRACT_IFMT_LDR14UB_VARS \
- UINT f_op1; \
- INT f_disp8; \
- UINT f_Ri; \
- unsigned int length;
-#define EXTRACT_IFMT_LDR14UB_CODE \
- length = 2; \
- f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \
- f_disp8 = EXTRACT_MSB0_INT (insn, 16, 4, 8); \
- f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \
-
-#define EXTRACT_IFMT_LDR15_VARS \
- UINT f_op1; \
- UINT f_op2; \
- USI f_udisp6; \
- UINT f_Ri; \
- unsigned int length;
-#define EXTRACT_IFMT_LDR15_CODE \
- length = 2; \
- f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \
- f_op2 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \
- f_udisp6 = ((EXTRACT_MSB0_UINT (insn, 16, 8, 4)) << (2)); \
- f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \
-
-#define EXTRACT_IFMT_LDR15DR_VARS \
- UINT f_op1; \
- UINT f_op2; \
- UINT f_op3; \
- UINT f_Rs2; \
- unsigned int length;
-#define EXTRACT_IFMT_LDR15DR_CODE \
- length = 2; \
- f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \
- f_op2 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \
- f_op3 = EXTRACT_MSB0_UINT (insn, 16, 8, 4); \
- f_Rs2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \
-
-#define EXTRACT_IFMT_MOVDR_VARS \
- UINT f_op1; \
- UINT f_op2; \
- UINT f_Rs1; \
- UINT f_Ri; \
- unsigned int length;
-#define EXTRACT_IFMT_MOVDR_CODE \
- length = 2; \
- f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \
- f_op2 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \
- f_Rs1 = EXTRACT_MSB0_UINT (insn, 16, 8, 4); \
- f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \
-
-#define EXTRACT_IFMT_CALL_VARS \
- UINT f_op1; \
- UINT f_op5; \
- SI f_rel12; \
- unsigned int length;
-#define EXTRACT_IFMT_CALL_CODE \
- length = 2; \
- f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \
- f_op5 = EXTRACT_MSB0_UINT (insn, 16, 4, 1); \
- f_rel12 = ((((EXTRACT_MSB0_INT (insn, 16, 5, 11)) << (1))) + (((pc) + (2)))); \
-
-#define EXTRACT_IFMT_INT_VARS \
- UINT f_op1; \
- UINT f_op2; \
- UINT f_u8; \
- unsigned int length;
-#define EXTRACT_IFMT_INT_CODE \
- length = 2; \
- f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \
- f_op2 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \
- f_u8 = EXTRACT_MSB0_UINT (insn, 16, 8, 8); \
-
-#define EXTRACT_IFMT_BRAD_VARS \
- UINT f_op1; \
- UINT f_cc; \
- SI f_rel9; \
- unsigned int length;
-#define EXTRACT_IFMT_BRAD_CODE \
- length = 2; \
- f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \
- f_cc = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \
- f_rel9 = ((((EXTRACT_MSB0_INT (insn, 16, 8, 8)) << (1))) + (((pc) + (2)))); \
-
-#define EXTRACT_IFMT_DMOVR13_VARS \
- UINT f_op1; \
- UINT f_op2; \
- USI f_dir10; \
- unsigned int length;
-#define EXTRACT_IFMT_DMOVR13_CODE \
- length = 2; \
- f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \
- f_op2 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \
- f_dir10 = ((EXTRACT_MSB0_UINT (insn, 16, 8, 8)) << (2)); \
-
-#define EXTRACT_IFMT_DMOVR13H_VARS \
- UINT f_op1; \
- UINT f_op2; \
- USI f_dir9; \
- unsigned int length;
-#define EXTRACT_IFMT_DMOVR13H_CODE \
- length = 2; \
- f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \
- f_op2 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \
- f_dir9 = ((EXTRACT_MSB0_UINT (insn, 16, 8, 8)) << (1)); \
-
-#define EXTRACT_IFMT_DMOVR13B_VARS \
- UINT f_op1; \
- UINT f_op2; \
- UINT f_dir8; \
- unsigned int length;
-#define EXTRACT_IFMT_DMOVR13B_CODE \
- length = 2; \
- f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \
- f_op2 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \
- f_dir8 = EXTRACT_MSB0_UINT (insn, 16, 8, 8); \
-
-#define EXTRACT_IFMT_COPOP_VARS \
- UINT f_op1; \
- UINT f_ccc; \
- UINT f_op2; \
- UINT f_op3; \
- UINT f_CRj; \
- UINT f_u4c; \
- UINT f_CRi; \
- /* Contents of trailing part of insn. */ \
- UINT word_1; \
- unsigned int length;
-#define EXTRACT_IFMT_COPOP_CODE \
- length = 4; \
- word_1 = GETIMEMUHI (current_cpu, pc + 2); \
- f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \
- f_ccc = (0|(EXTRACT_MSB0_UINT (word_1, 16, 0, 8) << 0)); \
- f_op2 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \
- f_op3 = EXTRACT_MSB0_UINT (insn, 16, 8, 4); \
- f_CRj = (0|(EXTRACT_MSB0_UINT (word_1, 16, 8, 4) << 0)); \
- f_u4c = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \
- f_CRi = (0|(EXTRACT_MSB0_UINT (word_1, 16, 12, 16) << 0)); \
-
-#define EXTRACT_IFMT_COPLD_VARS \
- UINT f_op1; \
- UINT f_ccc; \
- UINT f_op2; \
- UINT f_op3; \
- UINT f_Rjc; \
- UINT f_u4c; \
- UINT f_CRi; \
- /* Contents of trailing part of insn. */ \
- UINT word_1; \
- unsigned int length;
-#define EXTRACT_IFMT_COPLD_CODE \
- length = 4; \
- word_1 = GETIMEMUHI (current_cpu, pc + 2); \
- f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \
- f_ccc = (0|(EXTRACT_MSB0_UINT (word_1, 16, 0, 8) << 0)); \
- f_op2 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \
- f_op3 = EXTRACT_MSB0_UINT (insn, 16, 8, 4); \
- f_Rjc = (0|(EXTRACT_MSB0_UINT (word_1, 16, 8, 4) << 0)); \
- f_u4c = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \
- f_CRi = (0|(EXTRACT_MSB0_UINT (word_1, 16, 12, 16) << 0)); \
-
-#define EXTRACT_IFMT_COPST_VARS \
- UINT f_op1; \
- UINT f_ccc; \
- UINT f_op2; \
- UINT f_op3; \
- UINT f_CRj; \
- UINT f_u4c; \
- UINT f_Ric; \
- /* Contents of trailing part of insn. */ \
- UINT word_1; \
- unsigned int length;
-#define EXTRACT_IFMT_COPST_CODE \
- length = 4; \
- word_1 = GETIMEMUHI (current_cpu, pc + 2); \
- f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \
- f_ccc = (0|(EXTRACT_MSB0_UINT (word_1, 16, 0, 8) << 0)); \
- f_op2 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \
- f_op3 = EXTRACT_MSB0_UINT (insn, 16, 8, 4); \
- f_CRj = (0|(EXTRACT_MSB0_UINT (word_1, 16, 8, 4) << 0)); \
- f_u4c = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \
- f_Ric = (0|(EXTRACT_MSB0_UINT (word_1, 16, 12, 16) << 0)); \
-
-#define EXTRACT_IFMT_ADDSP_VARS \
- UINT f_op1; \
- UINT f_op2; \
- SI f_s10; \
- unsigned int length;
-#define EXTRACT_IFMT_ADDSP_CODE \
- length = 2; \
- f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \
- f_op2 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \
- f_s10 = ((EXTRACT_MSB0_INT (insn, 16, 8, 8)) << (2)); \
-
-#define EXTRACT_IFMT_LDM0_VARS \
- UINT f_op1; \
- UINT f_op2; \
- UINT f_reglist_low_ld; \
- unsigned int length;
-#define EXTRACT_IFMT_LDM0_CODE \
- length = 2; \
- f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \
- f_op2 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \
- f_reglist_low_ld = EXTRACT_MSB0_UINT (insn, 16, 8, 8); \
-
-#define EXTRACT_IFMT_LDM1_VARS \
- UINT f_op1; \
- UINT f_op2; \
- UINT f_reglist_hi_ld; \
- unsigned int length;
-#define EXTRACT_IFMT_LDM1_CODE \
- length = 2; \
- f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \
- f_op2 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \
- f_reglist_hi_ld = EXTRACT_MSB0_UINT (insn, 16, 8, 8); \
-
-#define EXTRACT_IFMT_STM0_VARS \
- UINT f_op1; \
- UINT f_op2; \
- UINT f_reglist_low_st; \
- unsigned int length;
-#define EXTRACT_IFMT_STM0_CODE \
- length = 2; \
- f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \
- f_op2 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \
- f_reglist_low_st = EXTRACT_MSB0_UINT (insn, 16, 8, 8); \
-
-#define EXTRACT_IFMT_STM1_VARS \
- UINT f_op1; \
- UINT f_op2; \
- UINT f_reglist_hi_st; \
- unsigned int length;
-#define EXTRACT_IFMT_STM1_CODE \
- length = 2; \
- f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \
- f_op2 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \
- f_reglist_hi_st = EXTRACT_MSB0_UINT (insn, 16, 8, 8); \
-
-#define EXTRACT_IFMT_ENTER_VARS \
- UINT f_op1; \
- UINT f_op2; \
- USI f_u10; \
- unsigned int length;
-#define EXTRACT_IFMT_ENTER_CODE \
- length = 2; \
- f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \
- f_op2 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \
- f_u10 = ((EXTRACT_MSB0_UINT (insn, 16, 8, 8)) << (2)); \
-
-/* Collection of various things for the trace handler to use. */
-
-typedef struct trace_record {
- IADDR pc;
- /* FIXME:wip */
-} TRACE_RECORD;
-
-#endif /* CPU_FR30BF_H */
diff --git a/sim/fr30/cpuall.h b/sim/fr30/cpuall.h
deleted file mode 100644
index 59646cf481b..00000000000
--- a/sim/fr30/cpuall.h
+++ /dev/null
@@ -1,66 +0,0 @@
-/* Simulator CPU header for fr30.
-
-THIS FILE IS MACHINE GENERATED WITH CGEN.
-
-Copyright (C) 1996, 1997, 1998, 1999, 2000 Free Software Foundation, Inc.
-
-This file is part of the GNU Simulators.
-
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License along
-with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
-*/
-
-#ifndef FR30_CPUALL_H
-#define FR30_CPUALL_H
-
-/* Include files for each cpu family. */
-
-#ifdef WANT_CPU_FR30BF
-#include "eng.h"
-#include "cgen-engine.h"
-#include "cpu.h"
-#include "decode.h"
-#endif
-
-extern const MACH fr30_mach;
-
-#ifndef WANT_CPU
-/* The ARGBUF struct. */
-struct argbuf {
- /* These are the baseclass definitions. */
- IADDR addr;
- const IDESC *idesc;
- char trace_p;
- char profile_p;
- /* ??? Temporary hack for skip insns. */
- char skip_count;
- char unused;
- /* cpu specific data follows */
-};
-#endif
-
-#ifndef WANT_CPU
-/* A cached insn.
-
- ??? SCACHE used to contain more than just argbuf. We could delete the
- type entirely and always just use ARGBUF, but for future concerns and as
- a level of abstraction it is left in. */
-
-struct scache {
- struct argbuf argbuf;
-};
-#endif
-
-#endif /* FR30_CPUALL_H */
diff --git a/sim/fr30/decode.c b/sim/fr30/decode.c
deleted file mode 100644
index ff01ce5ae2e..00000000000
--- a/sim/fr30/decode.c
+++ /dev/null
@@ -1,2956 +0,0 @@
-/* Simulator instruction decoder for fr30bf.
-
-THIS FILE IS MACHINE GENERATED WITH CGEN.
-
-Copyright (C) 1996, 1997, 1998, 1999, 2000 Free Software Foundation, Inc.
-
-This file is part of the GNU Simulators.
-
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License along
-with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
-*/
-
-#define WANT_CPU fr30bf
-#define WANT_CPU_FR30BF
-
-#include "sim-main.h"
-#include "sim-assert.h"
-
-/* The instruction descriptor array.
- This is computed at runtime. Space for it is not malloc'd to save a
- teensy bit of cpu in the decoder. Moving it to malloc space is trivial
- but won't be done until necessary (we don't currently support the runtime
- addition of instructions nor an SMP machine with different cpus). */
-static IDESC fr30bf_insn_data[FR30BF_INSN_MAX];
-
-/* Commas between elements are contained in the macros.
- Some of these are conditionally compiled out. */
-
-static const struct insn_sem fr30bf_insn_sem[] =
-{
- { VIRTUAL_INSN_X_INVALID, FR30BF_INSN_X_INVALID, FR30BF_SFMT_EMPTY },
- { VIRTUAL_INSN_X_AFTER, FR30BF_INSN_X_AFTER, FR30BF_SFMT_EMPTY },
- { VIRTUAL_INSN_X_BEFORE, FR30BF_INSN_X_BEFORE, FR30BF_SFMT_EMPTY },
- { VIRTUAL_INSN_X_CTI_CHAIN, FR30BF_INSN_X_CTI_CHAIN, FR30BF_SFMT_EMPTY },
- { VIRTUAL_INSN_X_CHAIN, FR30BF_INSN_X_CHAIN, FR30BF_SFMT_EMPTY },
- { VIRTUAL_INSN_X_BEGIN, FR30BF_INSN_X_BEGIN, FR30BF_SFMT_EMPTY },
- { FR30_INSN_ADD, FR30BF_INSN_ADD, FR30BF_SFMT_ADD },
- { FR30_INSN_ADDI, FR30BF_INSN_ADDI, FR30BF_SFMT_ADDI },
- { FR30_INSN_ADD2, FR30BF_INSN_ADD2, FR30BF_SFMT_ADD2 },
- { FR30_INSN_ADDC, FR30BF_INSN_ADDC, FR30BF_SFMT_ADDC },
- { FR30_INSN_ADDN, FR30BF_INSN_ADDN, FR30BF_SFMT_ADDN },
- { FR30_INSN_ADDNI, FR30BF_INSN_ADDNI, FR30BF_SFMT_ADDNI },
- { FR30_INSN_ADDN2, FR30BF_INSN_ADDN2, FR30BF_SFMT_ADDN2 },
- { FR30_INSN_SUB, FR30BF_INSN_SUB, FR30BF_SFMT_ADD },
- { FR30_INSN_SUBC, FR30BF_INSN_SUBC, FR30BF_SFMT_ADDC },
- { FR30_INSN_SUBN, FR30BF_INSN_SUBN, FR30BF_SFMT_ADDN },
- { FR30_INSN_CMP, FR30BF_INSN_CMP, FR30BF_SFMT_CMP },
- { FR30_INSN_CMPI, FR30BF_INSN_CMPI, FR30BF_SFMT_CMPI },
- { FR30_INSN_CMP2, FR30BF_INSN_CMP2, FR30BF_SFMT_CMP2 },
- { FR30_INSN_AND, FR30BF_INSN_AND, FR30BF_SFMT_AND },
- { FR30_INSN_OR, FR30BF_INSN_OR, FR30BF_SFMT_AND },
- { FR30_INSN_EOR, FR30BF_INSN_EOR, FR30BF_SFMT_AND },
- { FR30_INSN_ANDM, FR30BF_INSN_ANDM, FR30BF_SFMT_ANDM },
- { FR30_INSN_ANDH, FR30BF_INSN_ANDH, FR30BF_SFMT_ANDH },
- { FR30_INSN_ANDB, FR30BF_INSN_ANDB, FR30BF_SFMT_ANDB },
- { FR30_INSN_ORM, FR30BF_INSN_ORM, FR30BF_SFMT_ANDM },
- { FR30_INSN_ORH, FR30BF_INSN_ORH, FR30BF_SFMT_ANDH },
- { FR30_INSN_ORB, FR30BF_INSN_ORB, FR30BF_SFMT_ANDB },
- { FR30_INSN_EORM, FR30BF_INSN_EORM, FR30BF_SFMT_ANDM },
- { FR30_INSN_EORH, FR30BF_INSN_EORH, FR30BF_SFMT_ANDH },
- { FR30_INSN_EORB, FR30BF_INSN_EORB, FR30BF_SFMT_ANDB },
- { FR30_INSN_BANDL, FR30BF_INSN_BANDL, FR30BF_SFMT_BANDL },
- { FR30_INSN_BORL, FR30BF_INSN_BORL, FR30BF_SFMT_BANDL },
- { FR30_INSN_BEORL, FR30BF_INSN_BEORL, FR30BF_SFMT_BANDL },
- { FR30_INSN_BANDH, FR30BF_INSN_BANDH, FR30BF_SFMT_BANDL },
- { FR30_INSN_BORH, FR30BF_INSN_BORH, FR30BF_SFMT_BANDL },
- { FR30_INSN_BEORH, FR30BF_INSN_BEORH, FR30BF_SFMT_BANDL },
- { FR30_INSN_BTSTL, FR30BF_INSN_BTSTL, FR30BF_SFMT_BTSTL },
- { FR30_INSN_BTSTH, FR30BF_INSN_BTSTH, FR30BF_SFMT_BTSTL },
- { FR30_INSN_MUL, FR30BF_INSN_MUL, FR30BF_SFMT_MUL },
- { FR30_INSN_MULU, FR30BF_INSN_MULU, FR30BF_SFMT_MULU },
- { FR30_INSN_MULH, FR30BF_INSN_MULH, FR30BF_SFMT_MULH },
- { FR30_INSN_MULUH, FR30BF_INSN_MULUH, FR30BF_SFMT_MULH },
- { FR30_INSN_DIV0S, FR30BF_INSN_DIV0S, FR30BF_SFMT_DIV0S },
- { FR30_INSN_DIV0U, FR30BF_INSN_DIV0U, FR30BF_SFMT_DIV0U },
- { FR30_INSN_DIV1, FR30BF_INSN_DIV1, FR30BF_SFMT_DIV1 },
- { FR30_INSN_DIV2, FR30BF_INSN_DIV2, FR30BF_SFMT_DIV2 },
- { FR30_INSN_DIV3, FR30BF_INSN_DIV3, FR30BF_SFMT_DIV3 },
- { FR30_INSN_DIV4S, FR30BF_INSN_DIV4S, FR30BF_SFMT_DIV4S },
- { FR30_INSN_LSL, FR30BF_INSN_LSL, FR30BF_SFMT_LSL },
- { FR30_INSN_LSLI, FR30BF_INSN_LSLI, FR30BF_SFMT_LSLI },
- { FR30_INSN_LSL2, FR30BF_INSN_LSL2, FR30BF_SFMT_LSLI },
- { FR30_INSN_LSR, FR30BF_INSN_LSR, FR30BF_SFMT_LSL },
- { FR30_INSN_LSRI, FR30BF_INSN_LSRI, FR30BF_SFMT_LSLI },
- { FR30_INSN_LSR2, FR30BF_INSN_LSR2, FR30BF_SFMT_LSLI },
- { FR30_INSN_ASR, FR30BF_INSN_ASR, FR30BF_SFMT_LSL },
- { FR30_INSN_ASRI, FR30BF_INSN_ASRI, FR30BF_SFMT_LSLI },
- { FR30_INSN_ASR2, FR30BF_INSN_ASR2, FR30BF_SFMT_LSLI },
- { FR30_INSN_LDI8, FR30BF_INSN_LDI8, FR30BF_SFMT_LDI8 },
- { FR30_INSN_LDI20, FR30BF_INSN_LDI20, FR30BF_SFMT_LDI20 },
- { FR30_INSN_LDI32, FR30BF_INSN_LDI32, FR30BF_SFMT_LDI32 },
- { FR30_INSN_LD, FR30BF_INSN_LD, FR30BF_SFMT_LD },
- { FR30_INSN_LDUH, FR30BF_INSN_LDUH, FR30BF_SFMT_LD },
- { FR30_INSN_LDUB, FR30BF_INSN_LDUB, FR30BF_SFMT_LD },
- { FR30_INSN_LDR13, FR30BF_INSN_LDR13, FR30BF_SFMT_LDR13 },
- { FR30_INSN_LDR13UH, FR30BF_INSN_LDR13UH, FR30BF_SFMT_LDR13 },
- { FR30_INSN_LDR13UB, FR30BF_INSN_LDR13UB, FR30BF_SFMT_LDR13 },
- { FR30_INSN_LDR14, FR30BF_INSN_LDR14, FR30BF_SFMT_LDR14 },
- { FR30_INSN_LDR14UH, FR30BF_INSN_LDR14UH, FR30BF_SFMT_LDR14UH },
- { FR30_INSN_LDR14UB, FR30BF_INSN_LDR14UB, FR30BF_SFMT_LDR14UB },
- { FR30_INSN_LDR15, FR30BF_INSN_LDR15, FR30BF_SFMT_LDR15 },
- { FR30_INSN_LDR15GR, FR30BF_INSN_LDR15GR, FR30BF_SFMT_LDR15GR },
- { FR30_INSN_LDR15DR, FR30BF_INSN_LDR15DR, FR30BF_SFMT_LDR15DR },
- { FR30_INSN_LDR15PS, FR30BF_INSN_LDR15PS, FR30BF_SFMT_LDR15PS },
- { FR30_INSN_ST, FR30BF_INSN_ST, FR30BF_SFMT_ST },
- { FR30_INSN_STH, FR30BF_INSN_STH, FR30BF_SFMT_ST },
- { FR30_INSN_STB, FR30BF_INSN_STB, FR30BF_SFMT_ST },
- { FR30_INSN_STR13, FR30BF_INSN_STR13, FR30BF_SFMT_STR13 },
- { FR30_INSN_STR13H, FR30BF_INSN_STR13H, FR30BF_SFMT_STR13 },
- { FR30_INSN_STR13B, FR30BF_INSN_STR13B, FR30BF_SFMT_STR13 },
- { FR30_INSN_STR14, FR30BF_INSN_STR14, FR30BF_SFMT_STR14 },
- { FR30_INSN_STR14H, FR30BF_INSN_STR14H, FR30BF_SFMT_STR14H },
- { FR30_INSN_STR14B, FR30BF_INSN_STR14B, FR30BF_SFMT_STR14B },
- { FR30_INSN_STR15, FR30BF_INSN_STR15, FR30BF_SFMT_STR15 },
- { FR30_INSN_STR15GR, FR30BF_INSN_STR15GR, FR30BF_SFMT_STR15GR },
- { FR30_INSN_STR15DR, FR30BF_INSN_STR15DR, FR30BF_SFMT_STR15DR },
- { FR30_INSN_STR15PS, FR30BF_INSN_STR15PS, FR30BF_SFMT_STR15PS },
- { FR30_INSN_MOV, FR30BF_INSN_MOV, FR30BF_SFMT_MOV },
- { FR30_INSN_MOVDR, FR30BF_INSN_MOVDR, FR30BF_SFMT_MOVDR },
- { FR30_INSN_MOVPS, FR30BF_INSN_MOVPS, FR30BF_SFMT_MOVPS },
- { FR30_INSN_MOV2DR, FR30BF_INSN_MOV2DR, FR30BF_SFMT_MOV2DR },
- { FR30_INSN_MOV2PS, FR30BF_INSN_MOV2PS, FR30BF_SFMT_MOV2PS },
- { FR30_INSN_JMP, FR30BF_INSN_JMP, FR30BF_SFMT_JMP },
- { FR30_INSN_JMPD, FR30BF_INSN_JMPD, FR30BF_SFMT_JMP },
- { FR30_INSN_CALLR, FR30BF_INSN_CALLR, FR30BF_SFMT_CALLR },
- { FR30_INSN_CALLRD, FR30BF_INSN_CALLRD, FR30BF_SFMT_CALLR },
- { FR30_INSN_CALL, FR30BF_INSN_CALL, FR30BF_SFMT_CALL },
- { FR30_INSN_CALLD, FR30BF_INSN_CALLD, FR30BF_SFMT_CALL },
- { FR30_INSN_RET, FR30BF_INSN_RET, FR30BF_SFMT_RET },
- { FR30_INSN_RET_D, FR30BF_INSN_RET_D, FR30BF_SFMT_RET },
- { FR30_INSN_INT, FR30BF_INSN_INT, FR30BF_SFMT_INT },
- { FR30_INSN_INTE, FR30BF_INSN_INTE, FR30BF_SFMT_INTE },
- { FR30_INSN_RETI, FR30BF_INSN_RETI, FR30BF_SFMT_RETI },
- { FR30_INSN_BRAD, FR30BF_INSN_BRAD, FR30BF_SFMT_BRAD },
- { FR30_INSN_BRA, FR30BF_INSN_BRA, FR30BF_SFMT_BRAD },
- { FR30_INSN_BNOD, FR30BF_INSN_BNOD, FR30BF_SFMT_BNOD },
- { FR30_INSN_BNO, FR30BF_INSN_BNO, FR30BF_SFMT_BNOD },
- { FR30_INSN_BEQD, FR30BF_INSN_BEQD, FR30BF_SFMT_BEQD },
- { FR30_INSN_BEQ, FR30BF_INSN_BEQ, FR30BF_SFMT_BEQD },
- { FR30_INSN_BNED, FR30BF_INSN_BNED, FR30BF_SFMT_BEQD },
- { FR30_INSN_BNE, FR30BF_INSN_BNE, FR30BF_SFMT_BEQD },
- { FR30_INSN_BCD, FR30BF_INSN_BCD, FR30BF_SFMT_BCD },
- { FR30_INSN_BC, FR30BF_INSN_BC, FR30BF_SFMT_BCD },
- { FR30_INSN_BNCD, FR30BF_INSN_BNCD, FR30BF_SFMT_BCD },
- { FR30_INSN_BNC, FR30BF_INSN_BNC, FR30BF_SFMT_BCD },
- { FR30_INSN_BND, FR30BF_INSN_BND, FR30BF_SFMT_BND },
- { FR30_INSN_BN, FR30BF_INSN_BN, FR30BF_SFMT_BND },
- { FR30_INSN_BPD, FR30BF_INSN_BPD, FR30BF_SFMT_BND },
- { FR30_INSN_BP, FR30BF_INSN_BP, FR30BF_SFMT_BND },
- { FR30_INSN_BVD, FR30BF_INSN_BVD, FR30BF_SFMT_BVD },
- { FR30_INSN_BV, FR30BF_INSN_BV, FR30BF_SFMT_BVD },
- { FR30_INSN_BNVD, FR30BF_INSN_BNVD, FR30BF_SFMT_BVD },
- { FR30_INSN_BNV, FR30BF_INSN_BNV, FR30BF_SFMT_BVD },
- { FR30_INSN_BLTD, FR30BF_INSN_BLTD, FR30BF_SFMT_BLTD },
- { FR30_INSN_BLT, FR30BF_INSN_BLT, FR30BF_SFMT_BLTD },
- { FR30_INSN_BGED, FR30BF_INSN_BGED, FR30BF_SFMT_BLTD },
- { FR30_INSN_BGE, FR30BF_INSN_BGE, FR30BF_SFMT_BLTD },
- { FR30_INSN_BLED, FR30BF_INSN_BLED, FR30BF_SFMT_BLED },
- { FR30_INSN_BLE, FR30BF_INSN_BLE, FR30BF_SFMT_BLED },
- { FR30_INSN_BGTD, FR30BF_INSN_BGTD, FR30BF_SFMT_BLED },
- { FR30_INSN_BGT, FR30BF_INSN_BGT, FR30BF_SFMT_BLED },
- { FR30_INSN_BLSD, FR30BF_INSN_BLSD, FR30BF_SFMT_BLSD },
- { FR30_INSN_BLS, FR30BF_INSN_BLS, FR30BF_SFMT_BLSD },
- { FR30_INSN_BHID, FR30BF_INSN_BHID, FR30BF_SFMT_BLSD },
- { FR30_INSN_BHI, FR30BF_INSN_BHI, FR30BF_SFMT_BLSD },
- { FR30_INSN_DMOVR13, FR30BF_INSN_DMOVR13, FR30BF_SFMT_DMOVR13 },
- { FR30_INSN_DMOVR13H, FR30BF_INSN_DMOVR13H, FR30BF_SFMT_DMOVR13H },
- { FR30_INSN_DMOVR13B, FR30BF_INSN_DMOVR13B, FR30BF_SFMT_DMOVR13B },
- { FR30_INSN_DMOVR13PI, FR30BF_INSN_DMOVR13PI, FR30BF_SFMT_DMOVR13PI },
- { FR30_INSN_DMOVR13PIH, FR30BF_INSN_DMOVR13PIH, FR30BF_SFMT_DMOVR13PIH },
- { FR30_INSN_DMOVR13PIB, FR30BF_INSN_DMOVR13PIB, FR30BF_SFMT_DMOVR13PIB },
- { FR30_INSN_DMOVR15PI, FR30BF_INSN_DMOVR15PI, FR30BF_SFMT_DMOVR15PI },
- { FR30_INSN_DMOV2R13, FR30BF_INSN_DMOV2R13, FR30BF_SFMT_DMOV2R13 },
- { FR30_INSN_DMOV2R13H, FR30BF_INSN_DMOV2R13H, FR30BF_SFMT_DMOV2R13H },
- { FR30_INSN_DMOV2R13B, FR30BF_INSN_DMOV2R13B, FR30BF_SFMT_DMOV2R13B },
- { FR30_INSN_DMOV2R13PI, FR30BF_INSN_DMOV2R13PI, FR30BF_SFMT_DMOV2R13PI },
- { FR30_INSN_DMOV2R13PIH, FR30BF_INSN_DMOV2R13PIH, FR30BF_SFMT_DMOV2R13PIH },
- { FR30_INSN_DMOV2R13PIB, FR30BF_INSN_DMOV2R13PIB, FR30BF_SFMT_DMOV2R13PIB },
- { FR30_INSN_DMOV2R15PD, FR30BF_INSN_DMOV2R15PD, FR30BF_SFMT_DMOV2R15PD },
- { FR30_INSN_LDRES, FR30BF_INSN_LDRES, FR30BF_SFMT_LDRES },
- { FR30_INSN_STRES, FR30BF_INSN_STRES, FR30BF_SFMT_LDRES },
- { FR30_INSN_COPOP, FR30BF_INSN_COPOP, FR30BF_SFMT_COPOP },
- { FR30_INSN_COPLD, FR30BF_INSN_COPLD, FR30BF_SFMT_COPOP },
- { FR30_INSN_COPST, FR30BF_INSN_COPST, FR30BF_SFMT_COPOP },
- { FR30_INSN_COPSV, FR30BF_INSN_COPSV, FR30BF_SFMT_COPOP },
- { FR30_INSN_NOP, FR30BF_INSN_NOP, FR30BF_SFMT_BNOD },
- { FR30_INSN_ANDCCR, FR30BF_INSN_ANDCCR, FR30BF_SFMT_ANDCCR },
- { FR30_INSN_ORCCR, FR30BF_INSN_ORCCR, FR30BF_SFMT_ANDCCR },
- { FR30_INSN_STILM, FR30BF_INSN_STILM, FR30BF_SFMT_STILM },
- { FR30_INSN_ADDSP, FR30BF_INSN_ADDSP, FR30BF_SFMT_ADDSP },
- { FR30_INSN_EXTSB, FR30BF_INSN_EXTSB, FR30BF_SFMT_EXTSB },
- { FR30_INSN_EXTUB, FR30BF_INSN_EXTUB, FR30BF_SFMT_EXTUB },
- { FR30_INSN_EXTSH, FR30BF_INSN_EXTSH, FR30BF_SFMT_EXTSH },
- { FR30_INSN_EXTUH, FR30BF_INSN_EXTUH, FR30BF_SFMT_EXTUH },
- { FR30_INSN_LDM0, FR30BF_INSN_LDM0, FR30BF_SFMT_LDM0 },
- { FR30_INSN_LDM1, FR30BF_INSN_LDM1, FR30BF_SFMT_LDM1 },
- { FR30_INSN_STM0, FR30BF_INSN_STM0, FR30BF_SFMT_STM0 },
- { FR30_INSN_STM1, FR30BF_INSN_STM1, FR30BF_SFMT_STM1 },
- { FR30_INSN_ENTER, FR30BF_INSN_ENTER, FR30BF_SFMT_ENTER },
- { FR30_INSN_LEAVE, FR30BF_INSN_LEAVE, FR30BF_SFMT_LEAVE },
- { FR30_INSN_XCHB, FR30BF_INSN_XCHB, FR30BF_SFMT_XCHB },
-};
-
-static const struct insn_sem fr30bf_insn_sem_invalid = {
- VIRTUAL_INSN_X_INVALID, FR30BF_INSN_X_INVALID, FR30BF_SFMT_EMPTY
-};
-
-/* Initialize an IDESC from the compile-time computable parts. */
-
-static INLINE void
-init_idesc (SIM_CPU *cpu, IDESC *id, const struct insn_sem *t)
-{
- const CGEN_INSN *insn_table = CGEN_CPU_INSN_TABLE (CPU_CPU_DESC (cpu))->init_entries;
-
- id->num = t->index;
- id->sfmt = t->sfmt;
- if ((int) t->type <= 0)
- id->idata = & cgen_virtual_insn_table[- (int) t->type];
- else
- id->idata = & insn_table[t->type];
- id->attrs = CGEN_INSN_ATTRS (id->idata);
- /* Oh my god, a magic number. */
- id->length = CGEN_INSN_BITSIZE (id->idata) / 8;
-
-#if WITH_PROFILE_MODEL_P
- id->timing = & MODEL_TIMING (CPU_MODEL (cpu)) [t->index];
- {
- SIM_DESC sd = CPU_STATE (cpu);
- SIM_ASSERT (t->index == id->timing->num);
- }
-#endif
-
- /* Semantic pointers are initialized elsewhere. */
-}
-
-/* Initialize the instruction descriptor table. */
-
-void
-fr30bf_init_idesc_table (SIM_CPU *cpu)
-{
- IDESC *id,*tabend;
- const struct insn_sem *t,*tend;
- int tabsize = FR30BF_INSN_MAX;
- IDESC *table = fr30bf_insn_data;
-
- memset (table, 0, tabsize * sizeof (IDESC));
-
- /* First set all entries to the `invalid insn'. */
- t = & fr30bf_insn_sem_invalid;
- for (id = table, tabend = table + tabsize; id < tabend; ++id)
- init_idesc (cpu, id, t);
-
- /* Now fill in the values for the chosen cpu. */
- for (t = fr30bf_insn_sem, tend = t + sizeof (fr30bf_insn_sem) / sizeof (*t);
- t != tend; ++t)
- {
- init_idesc (cpu, & table[t->index], t);
- }
-
- /* Link the IDESC table into the cpu. */
- CPU_IDESC (cpu) = table;
-}
-
-/* Given an instruction, return a pointer to its IDESC entry. */
-
-const IDESC *
-fr30bf_decode (SIM_CPU *current_cpu, IADDR pc,
- CGEN_INSN_INT base_insn,
- ARGBUF *abuf)
-{
- /* Result of decoder. */
- FR30BF_INSN_TYPE itype;
- CGEN_INSN_INT insn = base_insn;
-
- {
-
- {
- unsigned int val = (((insn >> 8) & (255 << 0)));
- switch (val)
- {
- case 0 : itype = FR30BF_INSN_LDR13; goto extract_sfmt_ldr13; case 1 : itype = FR30BF_INSN_LDR13UH; goto extract_sfmt_ldr13; case 2 : itype = FR30BF_INSN_LDR13UB; goto extract_sfmt_ldr13; case 3 : itype = FR30BF_INSN_LDR15; goto extract_sfmt_ldr15; case 4 : itype = FR30BF_INSN_LD; goto extract_sfmt_ld; case 5 : itype = FR30BF_INSN_LDUH; goto extract_sfmt_ld; case 6 : itype = FR30BF_INSN_LDUB; goto extract_sfmt_ld; case 7 :
- {
- unsigned int val = (((insn >> 6) & (1 << 1)) | ((insn >> 4) & (1 << 0)));
- switch (val)
- {
- case 0 : itype = FR30BF_INSN_LDR15GR; goto extract_sfmt_ldr15gr; case 1 : itype = FR30BF_INSN_MOV2PS; goto extract_sfmt_mov2ps; case 2 : itype = FR30BF_INSN_LDR15DR; goto extract_sfmt_ldr15dr; case 3 : itype = FR30BF_INSN_LDR15PS; goto extract_sfmt_ldr15ps; default : itype = FR30BF_INSN_X_INVALID; goto extract_sfmt_empty;
- }
- }
- case 8 : itype = FR30BF_INSN_DMOV2R13; goto extract_sfmt_dmov2r13; case 9 : itype = FR30BF_INSN_DMOV2R13H; goto extract_sfmt_dmov2r13h; case 10 : itype = FR30BF_INSN_DMOV2R13B; goto extract_sfmt_dmov2r13b; case 11 : itype = FR30BF_INSN_DMOV2R15PD; goto extract_sfmt_dmov2r15pd; case 12 : itype = FR30BF_INSN_DMOV2R13PI; goto extract_sfmt_dmov2r13pi; case 13 : itype = FR30BF_INSN_DMOV2R13PIH; goto extract_sfmt_dmov2r13pih; case 14 : itype = FR30BF_INSN_DMOV2R13PIB; goto extract_sfmt_dmov2r13pib; case 15 : itype = FR30BF_INSN_ENTER; goto extract_sfmt_enter; case 16 : itype = FR30BF_INSN_STR13; goto extract_sfmt_str13; case 17 : itype = FR30BF_INSN_STR13H; goto extract_sfmt_str13; case 18 : itype = FR30BF_INSN_STR13B; goto extract_sfmt_str13; case 19 : itype = FR30BF_INSN_STR15; goto extract_sfmt_str15; case 20 : itype = FR30BF_INSN_ST; goto extract_sfmt_st; case 21 : itype = FR30BF_INSN_STH; goto extract_sfmt_st; case 22 : itype = FR30BF_INSN_STB; goto extract_sfmt_st; case 23 :
- {
- unsigned int val = (((insn >> 6) & (1 << 1)) | ((insn >> 4) & (1 << 0)));
- switch (val)
- {
- case 0 : itype = FR30BF_INSN_STR15GR; goto extract_sfmt_str15gr; case 1 : itype = FR30BF_INSN_MOVPS; goto extract_sfmt_movps; case 2 : itype = FR30BF_INSN_STR15DR; goto extract_sfmt_str15dr; case 3 : itype = FR30BF_INSN_STR15PS; goto extract_sfmt_str15ps; default : itype = FR30BF_INSN_X_INVALID; goto extract_sfmt_empty;
- }
- }
- case 24 : itype = FR30BF_INSN_DMOVR13; goto extract_sfmt_dmovr13; case 25 : itype = FR30BF_INSN_DMOVR13H; goto extract_sfmt_dmovr13h; case 26 : itype = FR30BF_INSN_DMOVR13B; goto extract_sfmt_dmovr13b; case 27 : itype = FR30BF_INSN_DMOVR15PI; goto extract_sfmt_dmovr15pi; case 28 : itype = FR30BF_INSN_DMOVR13PI; goto extract_sfmt_dmovr13pi; case 29 : itype = FR30BF_INSN_DMOVR13PIH; goto extract_sfmt_dmovr13pih; case 30 : itype = FR30BF_INSN_DMOVR13PIB; goto extract_sfmt_dmovr13pib; case 31 : itype = FR30BF_INSN_INT; goto extract_sfmt_int; case 32 : /* fall through */
- case 33 : /* fall through */
- case 34 : /* fall through */
- case 35 : /* fall through */
- case 36 : /* fall through */
- case 37 : /* fall through */
- case 38 : /* fall through */
- case 39 : /* fall through */
- case 40 : /* fall through */
- case 41 : /* fall through */
- case 42 : /* fall through */
- case 43 : /* fall through */
- case 44 : /* fall through */
- case 45 : /* fall through */
- case 46 : /* fall through */
- case 47 : itype = FR30BF_INSN_LDR14; goto extract_sfmt_ldr14; case 48 : /* fall through */
- case 49 : /* fall through */
- case 50 : /* fall through */
- case 51 : /* fall through */
- case 52 : /* fall through */
- case 53 : /* fall through */
- case 54 : /* fall through */
- case 55 : /* fall through */
- case 56 : /* fall through */
- case 57 : /* fall through */
- case 58 : /* fall through */
- case 59 : /* fall through */
- case 60 : /* fall through */
- case 61 : /* fall through */
- case 62 : /* fall through */
- case 63 : itype = FR30BF_INSN_STR14; goto extract_sfmt_str14; case 64 : /* fall through */
- case 65 : /* fall through */
- case 66 : /* fall through */
- case 67 : /* fall through */
- case 68 : /* fall through */
- case 69 : /* fall through */
- case 70 : /* fall through */
- case 71 : /* fall through */
- case 72 : /* fall through */
- case 73 : /* fall through */
- case 74 : /* fall through */
- case 75 : /* fall through */
- case 76 : /* fall through */
- case 77 : /* fall through */
- case 78 : /* fall through */
- case 79 : itype = FR30BF_INSN_LDR14UH; goto extract_sfmt_ldr14uh; case 80 : /* fall through */
- case 81 : /* fall through */
- case 82 : /* fall through */
- case 83 : /* fall through */
- case 84 : /* fall through */
- case 85 : /* fall through */
- case 86 : /* fall through */
- case 87 : /* fall through */
- case 88 : /* fall through */
- case 89 : /* fall through */
- case 90 : /* fall through */
- case 91 : /* fall through */
- case 92 : /* fall through */
- case 93 : /* fall through */
- case 94 : /* fall through */
- case 95 : itype = FR30BF_INSN_STR14H; goto extract_sfmt_str14h; case 96 : /* fall through */
- case 97 : /* fall through */
- case 98 : /* fall through */
- case 99 : /* fall through */
- case 100 : /* fall through */
- case 101 : /* fall through */
- case 102 : /* fall through */
- case 103 : /* fall through */
- case 104 : /* fall through */
- case 105 : /* fall through */
- case 106 : /* fall through */
- case 107 : /* fall through */
- case 108 : /* fall through */
- case 109 : /* fall through */
- case 110 : /* fall through */
- case 111 : itype = FR30BF_INSN_LDR14UB; goto extract_sfmt_ldr14ub; case 112 : /* fall through */
- case 113 : /* fall through */
- case 114 : /* fall through */
- case 115 : /* fall through */
- case 116 : /* fall through */
- case 117 : /* fall through */
- case 118 : /* fall through */
- case 119 : /* fall through */
- case 120 : /* fall through */
- case 121 : /* fall through */
- case 122 : /* fall through */
- case 123 : /* fall through */
- case 124 : /* fall through */
- case 125 : /* fall through */
- case 126 : /* fall through */
- case 127 : itype = FR30BF_INSN_STR14B; goto extract_sfmt_str14b; case 128 : itype = FR30BF_INSN_BANDL; goto extract_sfmt_bandl; case 129 : itype = FR30BF_INSN_BANDH; goto extract_sfmt_bandl; case 130 : itype = FR30BF_INSN_AND; goto extract_sfmt_and; case 131 : itype = FR30BF_INSN_ANDCCR; goto extract_sfmt_andccr; case 132 : itype = FR30BF_INSN_ANDM; goto extract_sfmt_andm; case 133 : itype = FR30BF_INSN_ANDH; goto extract_sfmt_andh; case 134 : itype = FR30BF_INSN_ANDB; goto extract_sfmt_andb; case 135 : itype = FR30BF_INSN_STILM; goto extract_sfmt_stilm; case 136 : itype = FR30BF_INSN_BTSTL; goto extract_sfmt_btstl; case 137 : itype = FR30BF_INSN_BTSTH; goto extract_sfmt_btstl; case 138 : itype = FR30BF_INSN_XCHB; goto extract_sfmt_xchb; case 139 : itype = FR30BF_INSN_MOV; goto extract_sfmt_mov; case 140 : itype = FR30BF_INSN_LDM0; goto extract_sfmt_ldm0; case 141 : itype = FR30BF_INSN_LDM1; goto extract_sfmt_ldm1; case 142 : itype = FR30BF_INSN_STM0; goto extract_sfmt_stm0; case 143 : itype = FR30BF_INSN_STM1; goto extract_sfmt_stm1; case 144 : itype = FR30BF_INSN_BORL; goto extract_sfmt_bandl; case 145 : itype = FR30BF_INSN_BORH; goto extract_sfmt_bandl; case 146 : itype = FR30BF_INSN_OR; goto extract_sfmt_and; case 147 : itype = FR30BF_INSN_ORCCR; goto extract_sfmt_andccr; case 148 : itype = FR30BF_INSN_ORM; goto extract_sfmt_andm; case 149 : itype = FR30BF_INSN_ORH; goto extract_sfmt_andh; case 150 : itype = FR30BF_INSN_ORB; goto extract_sfmt_andb; case 151 :
- {
- unsigned int val = (((insn >> 4) & (15 << 0)));
- switch (val)
- {
- case 0 : itype = FR30BF_INSN_JMP; goto extract_sfmt_jmp; case 1 : itype = FR30BF_INSN_CALLR; goto extract_sfmt_callr; case 2 : itype = FR30BF_INSN_RET; goto extract_sfmt_ret; case 3 : itype = FR30BF_INSN_RETI; goto extract_sfmt_reti; case 4 : itype = FR30BF_INSN_DIV0S; goto extract_sfmt_div0s; case 5 : itype = FR30BF_INSN_DIV0U; goto extract_sfmt_div0u; case 6 : itype = FR30BF_INSN_DIV1; goto extract_sfmt_div1; case 7 : itype = FR30BF_INSN_DIV2; goto extract_sfmt_div2; case 8 : itype = FR30BF_INSN_EXTSB; goto extract_sfmt_extsb; case 9 : itype = FR30BF_INSN_EXTUB; goto extract_sfmt_extub; case 10 : itype = FR30BF_INSN_EXTSH; goto extract_sfmt_extsh; case 11 : itype = FR30BF_INSN_EXTUH; goto extract_sfmt_extuh; default : itype = FR30BF_INSN_X_INVALID; goto extract_sfmt_empty;
- }
- }
- case 152 : itype = FR30BF_INSN_BEORL; goto extract_sfmt_bandl; case 153 : itype = FR30BF_INSN_BEORH; goto extract_sfmt_bandl; case 154 : itype = FR30BF_INSN_EOR; goto extract_sfmt_and; case 155 : itype = FR30BF_INSN_LDI20; goto extract_sfmt_ldi20; case 156 : itype = FR30BF_INSN_EORM; goto extract_sfmt_andm; case 157 : itype = FR30BF_INSN_EORH; goto extract_sfmt_andh; case 158 : itype = FR30BF_INSN_EORB; goto extract_sfmt_andb; case 159 :
- {
- unsigned int val = (((insn >> 4) & (15 << 0)));
- switch (val)
- {
- case 0 : itype = FR30BF_INSN_JMPD; goto extract_sfmt_jmp; case 1 : itype = FR30BF_INSN_CALLRD; goto extract_sfmt_callr; case 2 : itype = FR30BF_INSN_RET_D; goto extract_sfmt_ret; case 3 : itype = FR30BF_INSN_INTE; goto extract_sfmt_inte; case 6 : itype = FR30BF_INSN_DIV3; goto extract_sfmt_div3; case 7 : itype = FR30BF_INSN_DIV4S; goto extract_sfmt_div4s; case 8 : itype = FR30BF_INSN_LDI32; goto extract_sfmt_ldi32; case 9 : itype = FR30BF_INSN_LEAVE; goto extract_sfmt_leave; case 10 : itype = FR30BF_INSN_NOP; goto extract_sfmt_bnod; case 12 : itype = FR30BF_INSN_COPOP; goto extract_sfmt_copop; case 13 : itype = FR30BF_INSN_COPLD; goto extract_sfmt_copop; case 14 : itype = FR30BF_INSN_COPST; goto extract_sfmt_copop; case 15 : itype = FR30BF_INSN_COPSV; goto extract_sfmt_copop; default : itype = FR30BF_INSN_X_INVALID; goto extract_sfmt_empty;
- }
- }
- case 160 : itype = FR30BF_INSN_ADDNI; goto extract_sfmt_addni; case 161 : itype = FR30BF_INSN_ADDN2; goto extract_sfmt_addn2; case 162 : itype = FR30BF_INSN_ADDN; goto extract_sfmt_addn; case 163 : itype = FR30BF_INSN_ADDSP; goto extract_sfmt_addsp; case 164 : itype = FR30BF_INSN_ADDI; goto extract_sfmt_addi; case 165 : itype = FR30BF_INSN_ADD2; goto extract_sfmt_add2; case 166 : itype = FR30BF_INSN_ADD; goto extract_sfmt_add; case 167 : itype = FR30BF_INSN_ADDC; goto extract_sfmt_addc; case 168 : itype = FR30BF_INSN_CMPI; goto extract_sfmt_cmpi; case 169 : itype = FR30BF_INSN_CMP2; goto extract_sfmt_cmp2; case 170 : itype = FR30BF_INSN_CMP; goto extract_sfmt_cmp; case 171 : itype = FR30BF_INSN_MULU; goto extract_sfmt_mulu; case 172 : itype = FR30BF_INSN_SUB; goto extract_sfmt_add; case 173 : itype = FR30BF_INSN_SUBC; goto extract_sfmt_addc; case 174 : itype = FR30BF_INSN_SUBN; goto extract_sfmt_addn; case 175 : itype = FR30BF_INSN_MUL; goto extract_sfmt_mul; case 176 : itype = FR30BF_INSN_LSRI; goto extract_sfmt_lsli; case 177 : itype = FR30BF_INSN_LSR2; goto extract_sfmt_lsli; case 178 : itype = FR30BF_INSN_LSR; goto extract_sfmt_lsl; case 179 : itype = FR30BF_INSN_MOV2DR; goto extract_sfmt_mov2dr; case 180 : itype = FR30BF_INSN_LSLI; goto extract_sfmt_lsli; case 181 : itype = FR30BF_INSN_LSL2; goto extract_sfmt_lsli; case 182 : itype = FR30BF_INSN_LSL; goto extract_sfmt_lsl; case 183 : itype = FR30BF_INSN_MOVDR; goto extract_sfmt_movdr; case 184 : itype = FR30BF_INSN_ASRI; goto extract_sfmt_lsli; case 185 : itype = FR30BF_INSN_ASR2; goto extract_sfmt_lsli; case 186 : itype = FR30BF_INSN_ASR; goto extract_sfmt_lsl; case 187 : itype = FR30BF_INSN_MULUH; goto extract_sfmt_mulh; case 188 : itype = FR30BF_INSN_LDRES; goto extract_sfmt_ldres; case 189 : itype = FR30BF_INSN_STRES; goto extract_sfmt_ldres; case 191 : itype = FR30BF_INSN_MULH; goto extract_sfmt_mulh; case 192 : /* fall through */
- case 193 : /* fall through */
- case 194 : /* fall through */
- case 195 : /* fall through */
- case 196 : /* fall through */
- case 197 : /* fall through */
- case 198 : /* fall through */
- case 199 : /* fall through */
- case 200 : /* fall through */
- case 201 : /* fall through */
- case 202 : /* fall through */
- case 203 : /* fall through */
- case 204 : /* fall through */
- case 205 : /* fall through */
- case 206 : /* fall through */
- case 207 : itype = FR30BF_INSN_LDI8; goto extract_sfmt_ldi8; case 208 : /* fall through */
- case 209 : /* fall through */
- case 210 : /* fall through */
- case 211 : /* fall through */
- case 212 : /* fall through */
- case 213 : /* fall through */
- case 214 : /* fall through */
- case 215 : itype = FR30BF_INSN_CALL; goto extract_sfmt_call; case 216 : /* fall through */
- case 217 : /* fall through */
- case 218 : /* fall through */
- case 219 : /* fall through */
- case 220 : /* fall through */
- case 221 : /* fall through */
- case 222 : /* fall through */
- case 223 : itype = FR30BF_INSN_CALLD; goto extract_sfmt_call; case 224 : itype = FR30BF_INSN_BRA; goto extract_sfmt_brad; case 225 : itype = FR30BF_INSN_BNO; goto extract_sfmt_bnod; case 226 : itype = FR30BF_INSN_BEQ; goto extract_sfmt_beqd; case 227 : itype = FR30BF_INSN_BNE; goto extract_sfmt_beqd; case 228 : itype = FR30BF_INSN_BC; goto extract_sfmt_bcd; case 229 : itype = FR30BF_INSN_BNC; goto extract_sfmt_bcd; case 230 : itype = FR30BF_INSN_BN; goto extract_sfmt_bnd; case 231 : itype = FR30BF_INSN_BP; goto extract_sfmt_bnd; case 232 : itype = FR30BF_INSN_BV; goto extract_sfmt_bvd; case 233 : itype = FR30BF_INSN_BNV; goto extract_sfmt_bvd; case 234 : itype = FR30BF_INSN_BLT; goto extract_sfmt_bltd; case 235 : itype = FR30BF_INSN_BGE; goto extract_sfmt_bltd; case 236 : itype = FR30BF_INSN_BLE; goto extract_sfmt_bled; case 237 : itype = FR30BF_INSN_BGT; goto extract_sfmt_bled; case 238 : itype = FR30BF_INSN_BLS; goto extract_sfmt_blsd; case 239 : itype = FR30BF_INSN_BHI; goto extract_sfmt_blsd; case 240 : itype = FR30BF_INSN_BRAD; goto extract_sfmt_brad; case 241 : itype = FR30BF_INSN_BNOD; goto extract_sfmt_bnod; case 242 : itype = FR30BF_INSN_BEQD; goto extract_sfmt_beqd; case 243 : itype = FR30BF_INSN_BNED; goto extract_sfmt_beqd; case 244 : itype = FR30BF_INSN_BCD; goto extract_sfmt_bcd; case 245 : itype = FR30BF_INSN_BNCD; goto extract_sfmt_bcd; case 246 : itype = FR30BF_INSN_BND; goto extract_sfmt_bnd; case 247 : itype = FR30BF_INSN_BPD; goto extract_sfmt_bnd; case 248 : itype = FR30BF_INSN_BVD; goto extract_sfmt_bvd; case 249 : itype = FR30BF_INSN_BNVD; goto extract_sfmt_bvd; case 250 : itype = FR30BF_INSN_BLTD; goto extract_sfmt_bltd; case 251 : itype = FR30BF_INSN_BGED; goto extract_sfmt_bltd; case 252 : itype = FR30BF_INSN_BLED; goto extract_sfmt_bled; case 253 : itype = FR30BF_INSN_BGTD; goto extract_sfmt_bled; case 254 : itype = FR30BF_INSN_BLSD; goto extract_sfmt_blsd; case 255 : itype = FR30BF_INSN_BHID; goto extract_sfmt_blsd; default : itype = FR30BF_INSN_X_INVALID; goto extract_sfmt_empty;
- }
- }
- }
-
- /* The instruction has been decoded, now extract the fields. */
-
- extract_sfmt_empty:
- {
- const IDESC *idesc = &fr30bf_insn_data[itype];
-#define FLD(f) abuf->fields.fmt_empty.f
-
-
- /* Record the fields for the semantic handler. */
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_empty", (char *) 0));
-
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_add:
- {
- const IDESC *idesc = &fr30bf_insn_data[itype];
-#define FLD(f) abuf->fields.sfmt_add.f
- UINT f_Rj;
- UINT f_Ri;
-
- f_Rj = EXTRACT_MSB0_UINT (insn, 16, 8, 4);
- f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_Ri) = f_Ri;
- FLD (f_Rj) = f_Rj;
- FLD (i_Ri) = & CPU (h_gr)[f_Ri];
- FLD (i_Rj) = & CPU (h_gr)[f_Rj];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_add", "f_Ri 0x%x", 'x', f_Ri, "f_Rj 0x%x", 'x', f_Rj, "Ri 0x%x", 'x', f_Ri, "Rj 0x%x", 'x', f_Rj, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_Ri) = f_Ri;
- FLD (in_Rj) = f_Rj;
- FLD (out_Ri) = f_Ri;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_addi:
- {
- const IDESC *idesc = &fr30bf_insn_data[itype];
-#define FLD(f) abuf->fields.sfmt_addi.f
- UINT f_u4;
- UINT f_Ri;
-
- f_u4 = EXTRACT_MSB0_UINT (insn, 16, 8, 4);
- f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_Ri) = f_Ri;
- FLD (f_u4) = f_u4;
- FLD (i_Ri) = & CPU (h_gr)[f_Ri];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_addi", "f_Ri 0x%x", 'x', f_Ri, "f_u4 0x%x", 'x', f_u4, "Ri 0x%x", 'x', f_Ri, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_Ri) = f_Ri;
- FLD (out_Ri) = f_Ri;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_add2:
- {
- const IDESC *idesc = &fr30bf_insn_data[itype];
-#define FLD(f) abuf->fields.sfmt_add2.f
- SI f_m4;
- UINT f_Ri;
-
- f_m4 = ((EXTRACT_MSB0_UINT (insn, 16, 8, 4)) | (((-1) << (4))));
- f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_Ri) = f_Ri;
- FLD (f_m4) = f_m4;
- FLD (i_Ri) = & CPU (h_gr)[f_Ri];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_add2", "f_Ri 0x%x", 'x', f_Ri, "f_m4 0x%x", 'x', f_m4, "Ri 0x%x", 'x', f_Ri, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_Ri) = f_Ri;
- FLD (out_Ri) = f_Ri;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_addc:
- {
- const IDESC *idesc = &fr30bf_insn_data[itype];
-#define FLD(f) abuf->fields.sfmt_add.f
- UINT f_Rj;
- UINT f_Ri;
-
- f_Rj = EXTRACT_MSB0_UINT (insn, 16, 8, 4);
- f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_Ri) = f_Ri;
- FLD (f_Rj) = f_Rj;
- FLD (i_Ri) = & CPU (h_gr)[f_Ri];
- FLD (i_Rj) = & CPU (h_gr)[f_Rj];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_addc", "f_Ri 0x%x", 'x', f_Ri, "f_Rj 0x%x", 'x', f_Rj, "Ri 0x%x", 'x', f_Ri, "Rj 0x%x", 'x', f_Rj, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_Ri) = f_Ri;
- FLD (in_Rj) = f_Rj;
- FLD (out_Ri) = f_Ri;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_addn:
- {
- const IDESC *idesc = &fr30bf_insn_data[itype];
-#define FLD(f) abuf->fields.sfmt_add.f
- UINT f_Rj;
- UINT f_Ri;
-
- f_Rj = EXTRACT_MSB0_UINT (insn, 16, 8, 4);
- f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_Ri) = f_Ri;
- FLD (f_Rj) = f_Rj;
- FLD (i_Ri) = & CPU (h_gr)[f_Ri];
- FLD (i_Rj) = & CPU (h_gr)[f_Rj];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_addn", "f_Ri 0x%x", 'x', f_Ri, "f_Rj 0x%x", 'x', f_Rj, "Ri 0x%x", 'x', f_Ri, "Rj 0x%x", 'x', f_Rj, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_Ri) = f_Ri;
- FLD (in_Rj) = f_Rj;
- FLD (out_Ri) = f_Ri;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_addni:
- {
- const IDESC *idesc = &fr30bf_insn_data[itype];
-#define FLD(f) abuf->fields.sfmt_addi.f
- UINT f_u4;
- UINT f_Ri;
-
- f_u4 = EXTRACT_MSB0_UINT (insn, 16, 8, 4);
- f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_Ri) = f_Ri;
- FLD (f_u4) = f_u4;
- FLD (i_Ri) = & CPU (h_gr)[f_Ri];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_addni", "f_Ri 0x%x", 'x', f_Ri, "f_u4 0x%x", 'x', f_u4, "Ri 0x%x", 'x', f_Ri, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_Ri) = f_Ri;
- FLD (out_Ri) = f_Ri;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_addn2:
- {
- const IDESC *idesc = &fr30bf_insn_data[itype];
-#define FLD(f) abuf->fields.sfmt_add2.f
- SI f_m4;
- UINT f_Ri;
-
- f_m4 = ((EXTRACT_MSB0_UINT (insn, 16, 8, 4)) | (((-1) << (4))));
- f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_Ri) = f_Ri;
- FLD (f_m4) = f_m4;
- FLD (i_Ri) = & CPU (h_gr)[f_Ri];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_addn2", "f_Ri 0x%x", 'x', f_Ri, "f_m4 0x%x", 'x', f_m4, "Ri 0x%x", 'x', f_Ri, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_Ri) = f_Ri;
- FLD (out_Ri) = f_Ri;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_cmp:
- {
- const IDESC *idesc = &fr30bf_insn_data[itype];
-#define FLD(f) abuf->fields.sfmt_str13.f
- UINT f_Rj;
- UINT f_Ri;
-
- f_Rj = EXTRACT_MSB0_UINT (insn, 16, 8, 4);
- f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_Ri) = f_Ri;
- FLD (f_Rj) = f_Rj;
- FLD (i_Ri) = & CPU (h_gr)[f_Ri];
- FLD (i_Rj) = & CPU (h_gr)[f_Rj];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_cmp", "f_Ri 0x%x", 'x', f_Ri, "f_Rj 0x%x", 'x', f_Rj, "Ri 0x%x", 'x', f_Ri, "Rj 0x%x", 'x', f_Rj, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_Ri) = f_Ri;
- FLD (in_Rj) = f_Rj;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_cmpi:
- {
- const IDESC *idesc = &fr30bf_insn_data[itype];
-#define FLD(f) abuf->fields.sfmt_addi.f
- UINT f_u4;
- UINT f_Ri;
-
- f_u4 = EXTRACT_MSB0_UINT (insn, 16, 8, 4);
- f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_Ri) = f_Ri;
- FLD (f_u4) = f_u4;
- FLD (i_Ri) = & CPU (h_gr)[f_Ri];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_cmpi", "f_Ri 0x%x", 'x', f_Ri, "f_u4 0x%x", 'x', f_u4, "Ri 0x%x", 'x', f_Ri, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_Ri) = f_Ri;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_cmp2:
- {
- const IDESC *idesc = &fr30bf_insn_data[itype];
-#define FLD(f) abuf->fields.sfmt_add2.f
- SI f_m4;
- UINT f_Ri;
-
- f_m4 = ((EXTRACT_MSB0_UINT (insn, 16, 8, 4)) | (((-1) << (4))));
- f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_Ri) = f_Ri;
- FLD (f_m4) = f_m4;
- FLD (i_Ri) = & CPU (h_gr)[f_Ri];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_cmp2", "f_Ri 0x%x", 'x', f_Ri, "f_m4 0x%x", 'x', f_m4, "Ri 0x%x", 'x', f_Ri, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_Ri) = f_Ri;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_and:
- {
- const IDESC *idesc = &fr30bf_insn_data[itype];
-#define FLD(f) abuf->fields.sfmt_add.f
- UINT f_Rj;
- UINT f_Ri;
-
- f_Rj = EXTRACT_MSB0_UINT (insn, 16, 8, 4);
- f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_Ri) = f_Ri;
- FLD (f_Rj) = f_Rj;
- FLD (i_Ri) = & CPU (h_gr)[f_Ri];
- FLD (i_Rj) = & CPU (h_gr)[f_Rj];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_and", "f_Ri 0x%x", 'x', f_Ri, "f_Rj 0x%x", 'x', f_Rj, "Ri 0x%x", 'x', f_Ri, "Rj 0x%x", 'x', f_Rj, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_Ri) = f_Ri;
- FLD (in_Rj) = f_Rj;
- FLD (out_Ri) = f_Ri;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_andm:
- {
- const IDESC *idesc = &fr30bf_insn_data[itype];
-#define FLD(f) abuf->fields.sfmt_str13.f
- UINT f_Rj;
- UINT f_Ri;
-
- f_Rj = EXTRACT_MSB0_UINT (insn, 16, 8, 4);
- f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_Ri) = f_Ri;
- FLD (f_Rj) = f_Rj;
- FLD (i_Ri) = & CPU (h_gr)[f_Ri];
- FLD (i_Rj) = & CPU (h_gr)[f_Rj];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_andm", "f_Ri 0x%x", 'x', f_Ri, "f_Rj 0x%x", 'x', f_Rj, "Ri 0x%x", 'x', f_Ri, "Rj 0x%x", 'x', f_Rj, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_Ri) = f_Ri;
- FLD (in_Rj) = f_Rj;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_andh:
- {
- const IDESC *idesc = &fr30bf_insn_data[itype];
-#define FLD(f) abuf->fields.sfmt_str13.f
- UINT f_Rj;
- UINT f_Ri;
-
- f_Rj = EXTRACT_MSB0_UINT (insn, 16, 8, 4);
- f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_Ri) = f_Ri;
- FLD (f_Rj) = f_Rj;
- FLD (i_Ri) = & CPU (h_gr)[f_Ri];
- FLD (i_Rj) = & CPU (h_gr)[f_Rj];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_andh", "f_Ri 0x%x", 'x', f_Ri, "f_Rj 0x%x", 'x', f_Rj, "Ri 0x%x", 'x', f_Ri, "Rj 0x%x", 'x', f_Rj, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_Ri) = f_Ri;
- FLD (in_Rj) = f_Rj;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_andb:
- {
- const IDESC *idesc = &fr30bf_insn_data[itype];
-#define FLD(f) abuf->fields.sfmt_str13.f
- UINT f_Rj;
- UINT f_Ri;
-
- f_Rj = EXTRACT_MSB0_UINT (insn, 16, 8, 4);
- f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_Ri) = f_Ri;
- FLD (f_Rj) = f_Rj;
- FLD (i_Ri) = & CPU (h_gr)[f_Ri];
- FLD (i_Rj) = & CPU (h_gr)[f_Rj];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_andb", "f_Ri 0x%x", 'x', f_Ri, "f_Rj 0x%x", 'x', f_Rj, "Ri 0x%x", 'x', f_Ri, "Rj 0x%x", 'x', f_Rj, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_Ri) = f_Ri;
- FLD (in_Rj) = f_Rj;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_bandl:
- {
- const IDESC *idesc = &fr30bf_insn_data[itype];
-#define FLD(f) abuf->fields.sfmt_addi.f
- UINT f_u4;
- UINT f_Ri;
-
- f_u4 = EXTRACT_MSB0_UINT (insn, 16, 8, 4);
- f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_Ri) = f_Ri;
- FLD (f_u4) = f_u4;
- FLD (i_Ri) = & CPU (h_gr)[f_Ri];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bandl", "f_Ri 0x%x", 'x', f_Ri, "f_u4 0x%x", 'x', f_u4, "Ri 0x%x", 'x', f_Ri, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_Ri) = f_Ri;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_btstl:
- {
- const IDESC *idesc = &fr30bf_insn_data[itype];
-#define FLD(f) abuf->fields.sfmt_addi.f
- UINT f_u4;
- UINT f_Ri;
-
- f_u4 = EXTRACT_MSB0_UINT (insn, 16, 8, 4);
- f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_Ri) = f_Ri;
- FLD (f_u4) = f_u4;
- FLD (i_Ri) = & CPU (h_gr)[f_Ri];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_btstl", "f_Ri 0x%x", 'x', f_Ri, "f_u4 0x%x", 'x', f_u4, "Ri 0x%x", 'x', f_Ri, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_Ri) = f_Ri;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_mul:
- {
- const IDESC *idesc = &fr30bf_insn_data[itype];
-#define FLD(f) abuf->fields.sfmt_str13.f
- UINT f_Rj;
- UINT f_Ri;
-
- f_Rj = EXTRACT_MSB0_UINT (insn, 16, 8, 4);
- f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_Ri) = f_Ri;
- FLD (f_Rj) = f_Rj;
- FLD (i_Ri) = & CPU (h_gr)[f_Ri];
- FLD (i_Rj) = & CPU (h_gr)[f_Rj];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mul", "f_Ri 0x%x", 'x', f_Ri, "f_Rj 0x%x", 'x', f_Rj, "Ri 0x%x", 'x', f_Ri, "Rj 0x%x", 'x', f_Rj, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_Ri) = f_Ri;
- FLD (in_Rj) = f_Rj;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_mulu:
- {
- const IDESC *idesc = &fr30bf_insn_data[itype];
-#define FLD(f) abuf->fields.sfmt_str13.f
- UINT f_Rj;
- UINT f_Ri;
-
- f_Rj = EXTRACT_MSB0_UINT (insn, 16, 8, 4);
- f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_Ri) = f_Ri;
- FLD (f_Rj) = f_Rj;
- FLD (i_Ri) = & CPU (h_gr)[f_Ri];
- FLD (i_Rj) = & CPU (h_gr)[f_Rj];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mulu", "f_Ri 0x%x", 'x', f_Ri, "f_Rj 0x%x", 'x', f_Rj, "Ri 0x%x", 'x', f_Ri, "Rj 0x%x", 'x', f_Rj, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_Ri) = f_Ri;
- FLD (in_Rj) = f_Rj;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_mulh:
- {
- const IDESC *idesc = &fr30bf_insn_data[itype];
-#define FLD(f) abuf->fields.sfmt_str13.f
- UINT f_Rj;
- UINT f_Ri;
-
- f_Rj = EXTRACT_MSB0_UINT (insn, 16, 8, 4);
- f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_Ri) = f_Ri;
- FLD (f_Rj) = f_Rj;
- FLD (i_Ri) = & CPU (h_gr)[f_Ri];
- FLD (i_Rj) = & CPU (h_gr)[f_Rj];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mulh", "f_Ri 0x%x", 'x', f_Ri, "f_Rj 0x%x", 'x', f_Rj, "Ri 0x%x", 'x', f_Ri, "Rj 0x%x", 'x', f_Rj, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_Ri) = f_Ri;
- FLD (in_Rj) = f_Rj;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_div0s:
- {
- const IDESC *idesc = &fr30bf_insn_data[itype];
-#define FLD(f) abuf->fields.sfmt_mov2dr.f
- UINT f_Ri;
-
- f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_Ri) = f_Ri;
- FLD (i_Ri) = & CPU (h_gr)[f_Ri];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_div0s", "f_Ri 0x%x", 'x', f_Ri, "Ri 0x%x", 'x', f_Ri, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_Ri) = f_Ri;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_div0u:
- {
- const IDESC *idesc = &fr30bf_insn_data[itype];
-#define FLD(f) abuf->fields.fmt_empty.f
-
-
- /* Record the fields for the semantic handler. */
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_div0u", (char *) 0));
-
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_div1:
- {
- const IDESC *idesc = &fr30bf_insn_data[itype];
-#define FLD(f) abuf->fields.sfmt_mov2dr.f
- UINT f_Ri;
-
- f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_Ri) = f_Ri;
- FLD (i_Ri) = & CPU (h_gr)[f_Ri];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_div1", "f_Ri 0x%x", 'x', f_Ri, "Ri 0x%x", 'x', f_Ri, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_Ri) = f_Ri;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_div2:
- {
- const IDESC *idesc = &fr30bf_insn_data[itype];
-#define FLD(f) abuf->fields.sfmt_mov2dr.f
- UINT f_Ri;
-
- f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_Ri) = f_Ri;
- FLD (i_Ri) = & CPU (h_gr)[f_Ri];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_div2", "f_Ri 0x%x", 'x', f_Ri, "Ri 0x%x", 'x', f_Ri, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_Ri) = f_Ri;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_div3:
- {
- const IDESC *idesc = &fr30bf_insn_data[itype];
-#define FLD(f) abuf->fields.fmt_empty.f
-
-
- /* Record the fields for the semantic handler. */
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_div3", (char *) 0));
-
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_div4s:
- {
- const IDESC *idesc = &fr30bf_insn_data[itype];
-#define FLD(f) abuf->fields.fmt_empty.f
-
-
- /* Record the fields for the semantic handler. */
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_div4s", (char *) 0));
-
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_lsl:
- {
- const IDESC *idesc = &fr30bf_insn_data[itype];
-#define FLD(f) abuf->fields.sfmt_add.f
- UINT f_Rj;
- UINT f_Ri;
-
- f_Rj = EXTRACT_MSB0_UINT (insn, 16, 8, 4);
- f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_Ri) = f_Ri;
- FLD (f_Rj) = f_Rj;
- FLD (i_Ri) = & CPU (h_gr)[f_Ri];
- FLD (i_Rj) = & CPU (h_gr)[f_Rj];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_lsl", "f_Ri 0x%x", 'x', f_Ri, "f_Rj 0x%x", 'x', f_Rj, "Ri 0x%x", 'x', f_Ri, "Rj 0x%x", 'x', f_Rj, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_Ri) = f_Ri;
- FLD (in_Rj) = f_Rj;
- FLD (out_Ri) = f_Ri;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_lsli:
- {
- const IDESC *idesc = &fr30bf_insn_data[itype];
-#define FLD(f) abuf->fields.sfmt_addi.f
- UINT f_u4;
- UINT f_Ri;
-
- f_u4 = EXTRACT_MSB0_UINT (insn, 16, 8, 4);
- f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_Ri) = f_Ri;
- FLD (f_u4) = f_u4;
- FLD (i_Ri) = & CPU (h_gr)[f_Ri];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_lsli", "f_Ri 0x%x", 'x', f_Ri, "f_u4 0x%x", 'x', f_u4, "Ri 0x%x", 'x', f_Ri, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_Ri) = f_Ri;
- FLD (out_Ri) = f_Ri;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_ldi8:
- {
- const IDESC *idesc = &fr30bf_insn_data[itype];
-#define FLD(f) abuf->fields.sfmt_ldi8.f
- UINT f_i8;
- UINT f_Ri;
-
- f_i8 = EXTRACT_MSB0_UINT (insn, 16, 4, 8);
- f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_i8) = f_i8;
- FLD (f_Ri) = f_Ri;
- FLD (i_Ri) = & CPU (h_gr)[f_Ri];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldi8", "f_i8 0x%x", 'x', f_i8, "f_Ri 0x%x", 'x', f_Ri, "Ri 0x%x", 'x', f_Ri, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (out_Ri) = f_Ri;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_ldi20:
- {
- const IDESC *idesc = &fr30bf_insn_data[itype];
-#define FLD(f) abuf->fields.sfmt_ldi20.f
- UINT f_i20_16;
- UINT f_i20_4;
- UINT f_Ri;
- UINT f_i20;
- /* Contents of trailing part of insn. */
- UINT word_1;
-
- word_1 = GETIMEMUHI (current_cpu, pc + 2);
- f_i20_16 = (0|(EXTRACT_MSB0_UINT (word_1, 16, 0, 16) << 0));
- f_i20_4 = EXTRACT_MSB0_UINT (insn, 16, 8, 4);
- f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
-{
- f_i20 = ((((f_i20_4) << (16))) | (f_i20_16));
-}
-
- /* Record the fields for the semantic handler. */
- FLD (f_i20) = f_i20;
- FLD (f_Ri) = f_Ri;
- FLD (i_Ri) = & CPU (h_gr)[f_Ri];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldi20", "f_i20 0x%x", 'x', f_i20, "f_Ri 0x%x", 'x', f_Ri, "Ri 0x%x", 'x', f_Ri, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (out_Ri) = f_Ri;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_ldi32:
- {
- const IDESC *idesc = &fr30bf_insn_data[itype];
-#define FLD(f) abuf->fields.sfmt_ldi32.f
- UINT f_i32;
- UINT f_Ri;
- /* Contents of trailing part of insn. */
- UINT word_1;
- UINT word_2;
-
- word_1 = GETIMEMUHI (current_cpu, pc + 2);
- word_2 = GETIMEMUHI (current_cpu, pc + 4);
- f_i32 = (0|(EXTRACT_MSB0_UINT (word_2, 16, 0, 16) << 0)|(EXTRACT_MSB0_UINT (word_1, 16, 0, 16) << 16));
- f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_i32) = f_i32;
- FLD (f_Ri) = f_Ri;
- FLD (i_Ri) = & CPU (h_gr)[f_Ri];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldi32", "f_i32 0x%x", 'x', f_i32, "f_Ri 0x%x", 'x', f_Ri, "Ri 0x%x", 'x', f_Ri, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (out_Ri) = f_Ri;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_ld:
- {
- const IDESC *idesc = &fr30bf_insn_data[itype];
-#define FLD(f) abuf->fields.sfmt_ldr13.f
- UINT f_Rj;
- UINT f_Ri;
-
- f_Rj = EXTRACT_MSB0_UINT (insn, 16, 8, 4);
- f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_Rj) = f_Rj;
- FLD (f_Ri) = f_Ri;
- FLD (i_Rj) = & CPU (h_gr)[f_Rj];
- FLD (i_Ri) = & CPU (h_gr)[f_Ri];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ld", "f_Rj 0x%x", 'x', f_Rj, "f_Ri 0x%x", 'x', f_Ri, "Rj 0x%x", 'x', f_Rj, "Ri 0x%x", 'x', f_Ri, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_Rj) = f_Rj;
- FLD (out_Ri) = f_Ri;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_ldr13:
- {
- const IDESC *idesc = &fr30bf_insn_data[itype];
-#define FLD(f) abuf->fields.sfmt_ldr13.f
- UINT f_Rj;
- UINT f_Ri;
-
- f_Rj = EXTRACT_MSB0_UINT (insn, 16, 8, 4);
- f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_Rj) = f_Rj;
- FLD (f_Ri) = f_Ri;
- FLD (i_Rj) = & CPU (h_gr)[f_Rj];
- FLD (i_Ri) = & CPU (h_gr)[f_Ri];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldr13", "f_Rj 0x%x", 'x', f_Rj, "f_Ri 0x%x", 'x', f_Ri, "Rj 0x%x", 'x', f_Rj, "Ri 0x%x", 'x', f_Ri, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_Rj) = f_Rj;
- FLD (in_h_gr_13) = 13;
- FLD (out_Ri) = f_Ri;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_ldr14:
- {
- const IDESC *idesc = &fr30bf_insn_data[itype];
-#define FLD(f) abuf->fields.sfmt_ldr14.f
- SI f_disp10;
- UINT f_Ri;
-
- f_disp10 = ((EXTRACT_MSB0_INT (insn, 16, 4, 8)) << (2));
- f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_disp10) = f_disp10;
- FLD (f_Ri) = f_Ri;
- FLD (i_Ri) = & CPU (h_gr)[f_Ri];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldr14", "f_disp10 0x%x", 'x', f_disp10, "f_Ri 0x%x", 'x', f_Ri, "Ri 0x%x", 'x', f_Ri, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_h_gr_14) = 14;
- FLD (out_Ri) = f_Ri;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_ldr14uh:
- {
- const IDESC *idesc = &fr30bf_insn_data[itype];
-#define FLD(f) abuf->fields.sfmt_ldr14uh.f
- SI f_disp9;
- UINT f_Ri;
-
- f_disp9 = ((EXTRACT_MSB0_INT (insn, 16, 4, 8)) << (1));
- f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_disp9) = f_disp9;
- FLD (f_Ri) = f_Ri;
- FLD (i_Ri) = & CPU (h_gr)[f_Ri];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldr14uh", "f_disp9 0x%x", 'x', f_disp9, "f_Ri 0x%x", 'x', f_Ri, "Ri 0x%x", 'x', f_Ri, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_h_gr_14) = 14;
- FLD (out_Ri) = f_Ri;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_ldr14ub:
- {
- const IDESC *idesc = &fr30bf_insn_data[itype];
-#define FLD(f) abuf->fields.sfmt_ldr14ub.f
- INT f_disp8;
- UINT f_Ri;
-
- f_disp8 = EXTRACT_MSB0_INT (insn, 16, 4, 8);
- f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_disp8) = f_disp8;
- FLD (f_Ri) = f_Ri;
- FLD (i_Ri) = & CPU (h_gr)[f_Ri];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldr14ub", "f_disp8 0x%x", 'x', f_disp8, "f_Ri 0x%x", 'x', f_Ri, "Ri 0x%x", 'x', f_Ri, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_h_gr_14) = 14;
- FLD (out_Ri) = f_Ri;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_ldr15:
- {
- const IDESC *idesc = &fr30bf_insn_data[itype];
-#define FLD(f) abuf->fields.sfmt_ldr15.f
- USI f_udisp6;
- UINT f_Ri;
-
- f_udisp6 = ((EXTRACT_MSB0_UINT (insn, 16, 8, 4)) << (2));
- f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_udisp6) = f_udisp6;
- FLD (f_Ri) = f_Ri;
- FLD (i_Ri) = & CPU (h_gr)[f_Ri];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldr15", "f_udisp6 0x%x", 'x', f_udisp6, "f_Ri 0x%x", 'x', f_Ri, "Ri 0x%x", 'x', f_Ri, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_h_gr_15) = 15;
- FLD (out_Ri) = f_Ri;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_ldr15gr:
- {
- const IDESC *idesc = &fr30bf_insn_data[itype];
-#define FLD(f) abuf->fields.sfmt_ldr15gr.f
- UINT f_Ri;
-
- f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_Ri) = f_Ri;
- FLD (i_Ri) = & CPU (h_gr)[f_Ri];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldr15gr", "f_Ri 0x%x", 'x', f_Ri, "Ri 0x%x", 'x', f_Ri, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_h_gr_15) = 15;
- FLD (out_Ri) = f_Ri;
- FLD (out_h_gr_15) = 15;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_ldr15dr:
- {
- const IDESC *idesc = &fr30bf_insn_data[itype];
-#define FLD(f) abuf->fields.sfmt_ldr15dr.f
- UINT f_Rs2;
-
- f_Rs2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_Rs2) = f_Rs2;
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldr15dr", "f_Rs2 0x%x", 'x', f_Rs2, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_h_gr_15) = 15;
- FLD (out_h_gr_15) = 15;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_ldr15ps:
- {
- const IDESC *idesc = &fr30bf_insn_data[itype];
-#define FLD(f) abuf->fields.sfmt_addsp.f
-
-
- /* Record the fields for the semantic handler. */
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldr15ps", (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_h_gr_15) = 15;
- FLD (out_h_gr_15) = 15;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_st:
- {
- const IDESC *idesc = &fr30bf_insn_data[itype];
-#define FLD(f) abuf->fields.sfmt_str13.f
- UINT f_Rj;
- UINT f_Ri;
-
- f_Rj = EXTRACT_MSB0_UINT (insn, 16, 8, 4);
- f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_Ri) = f_Ri;
- FLD (f_Rj) = f_Rj;
- FLD (i_Ri) = & CPU (h_gr)[f_Ri];
- FLD (i_Rj) = & CPU (h_gr)[f_Rj];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_st", "f_Ri 0x%x", 'x', f_Ri, "f_Rj 0x%x", 'x', f_Rj, "Ri 0x%x", 'x', f_Ri, "Rj 0x%x", 'x', f_Rj, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_Ri) = f_Ri;
- FLD (in_Rj) = f_Rj;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_str13:
- {
- const IDESC *idesc = &fr30bf_insn_data[itype];
-#define FLD(f) abuf->fields.sfmt_str13.f
- UINT f_Rj;
- UINT f_Ri;
-
- f_Rj = EXTRACT_MSB0_UINT (insn, 16, 8, 4);
- f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_Ri) = f_Ri;
- FLD (f_Rj) = f_Rj;
- FLD (i_Ri) = & CPU (h_gr)[f_Ri];
- FLD (i_Rj) = & CPU (h_gr)[f_Rj];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_str13", "f_Ri 0x%x", 'x', f_Ri, "f_Rj 0x%x", 'x', f_Rj, "Ri 0x%x", 'x', f_Ri, "Rj 0x%x", 'x', f_Rj, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_Ri) = f_Ri;
- FLD (in_Rj) = f_Rj;
- FLD (in_h_gr_13) = 13;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_str14:
- {
- const IDESC *idesc = &fr30bf_insn_data[itype];
-#define FLD(f) abuf->fields.sfmt_str14.f
- SI f_disp10;
- UINT f_Ri;
-
- f_disp10 = ((EXTRACT_MSB0_INT (insn, 16, 4, 8)) << (2));
- f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_Ri) = f_Ri;
- FLD (f_disp10) = f_disp10;
- FLD (i_Ri) = & CPU (h_gr)[f_Ri];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_str14", "f_Ri 0x%x", 'x', f_Ri, "f_disp10 0x%x", 'x', f_disp10, "Ri 0x%x", 'x', f_Ri, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_Ri) = f_Ri;
- FLD (in_h_gr_14) = 14;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_str14h:
- {
- const IDESC *idesc = &fr30bf_insn_data[itype];
-#define FLD(f) abuf->fields.sfmt_str14h.f
- SI f_disp9;
- UINT f_Ri;
-
- f_disp9 = ((EXTRACT_MSB0_INT (insn, 16, 4, 8)) << (1));
- f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_Ri) = f_Ri;
- FLD (f_disp9) = f_disp9;
- FLD (i_Ri) = & CPU (h_gr)[f_Ri];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_str14h", "f_Ri 0x%x", 'x', f_Ri, "f_disp9 0x%x", 'x', f_disp9, "Ri 0x%x", 'x', f_Ri, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_Ri) = f_Ri;
- FLD (in_h_gr_14) = 14;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_str14b:
- {
- const IDESC *idesc = &fr30bf_insn_data[itype];
-#define FLD(f) abuf->fields.sfmt_str14b.f
- INT f_disp8;
- UINT f_Ri;
-
- f_disp8 = EXTRACT_MSB0_INT (insn, 16, 4, 8);
- f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_Ri) = f_Ri;
- FLD (f_disp8) = f_disp8;
- FLD (i_Ri) = & CPU (h_gr)[f_Ri];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_str14b", "f_Ri 0x%x", 'x', f_Ri, "f_disp8 0x%x", 'x', f_disp8, "Ri 0x%x", 'x', f_Ri, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_Ri) = f_Ri;
- FLD (in_h_gr_14) = 14;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_str15:
- {
- const IDESC *idesc = &fr30bf_insn_data[itype];
-#define FLD(f) abuf->fields.sfmt_str15.f
- USI f_udisp6;
- UINT f_Ri;
-
- f_udisp6 = ((EXTRACT_MSB0_UINT (insn, 16, 8, 4)) << (2));
- f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_Ri) = f_Ri;
- FLD (f_udisp6) = f_udisp6;
- FLD (i_Ri) = & CPU (h_gr)[f_Ri];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_str15", "f_Ri 0x%x", 'x', f_Ri, "f_udisp6 0x%x", 'x', f_udisp6, "Ri 0x%x", 'x', f_Ri, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_Ri) = f_Ri;
- FLD (in_h_gr_15) = 15;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_str15gr:
- {
- const IDESC *idesc = &fr30bf_insn_data[itype];
-#define FLD(f) abuf->fields.sfmt_str15gr.f
- UINT f_Ri;
-
- f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_Ri) = f_Ri;
- FLD (i_Ri) = & CPU (h_gr)[f_Ri];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_str15gr", "f_Ri 0x%x", 'x', f_Ri, "Ri 0x%x", 'x', f_Ri, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_Ri) = f_Ri;
- FLD (in_h_gr_15) = 15;
- FLD (out_h_gr_15) = 15;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_str15dr:
- {
- const IDESC *idesc = &fr30bf_insn_data[itype];
-#define FLD(f) abuf->fields.sfmt_ldr15dr.f
- UINT f_Rs2;
-
- f_Rs2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_Rs2) = f_Rs2;
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_str15dr", "f_Rs2 0x%x", 'x', f_Rs2, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_h_gr_15) = 15;
- FLD (out_h_gr_15) = 15;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_str15ps:
- {
- const IDESC *idesc = &fr30bf_insn_data[itype];
-#define FLD(f) abuf->fields.sfmt_addsp.f
-
-
- /* Record the fields for the semantic handler. */
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_str15ps", (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_h_gr_15) = 15;
- FLD (out_h_gr_15) = 15;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_mov:
- {
- const IDESC *idesc = &fr30bf_insn_data[itype];
-#define FLD(f) abuf->fields.sfmt_ldr13.f
- UINT f_Rj;
- UINT f_Ri;
-
- f_Rj = EXTRACT_MSB0_UINT (insn, 16, 8, 4);
- f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_Rj) = f_Rj;
- FLD (f_Ri) = f_Ri;
- FLD (i_Rj) = & CPU (h_gr)[f_Rj];
- FLD (i_Ri) = & CPU (h_gr)[f_Ri];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mov", "f_Rj 0x%x", 'x', f_Rj, "f_Ri 0x%x", 'x', f_Ri, "Rj 0x%x", 'x', f_Rj, "Ri 0x%x", 'x', f_Ri, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_Rj) = f_Rj;
- FLD (out_Ri) = f_Ri;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_movdr:
- {
- const IDESC *idesc = &fr30bf_insn_data[itype];
-#define FLD(f) abuf->fields.sfmt_movdr.f
- UINT f_Rs1;
- UINT f_Ri;
-
- f_Rs1 = EXTRACT_MSB0_UINT (insn, 16, 8, 4);
- f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_Rs1) = f_Rs1;
- FLD (f_Ri) = f_Ri;
- FLD (i_Ri) = & CPU (h_gr)[f_Ri];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_movdr", "f_Rs1 0x%x", 'x', f_Rs1, "f_Ri 0x%x", 'x', f_Ri, "Ri 0x%x", 'x', f_Ri, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (out_Ri) = f_Ri;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_movps:
- {
- const IDESC *idesc = &fr30bf_insn_data[itype];
-#define FLD(f) abuf->fields.sfmt_movdr.f
- UINT f_Ri;
-
- f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_Ri) = f_Ri;
- FLD (i_Ri) = & CPU (h_gr)[f_Ri];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_movps", "f_Ri 0x%x", 'x', f_Ri, "Ri 0x%x", 'x', f_Ri, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (out_Ri) = f_Ri;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_mov2dr:
- {
- const IDESC *idesc = &fr30bf_insn_data[itype];
-#define FLD(f) abuf->fields.sfmt_mov2dr.f
- UINT f_Rs1;
- UINT f_Ri;
-
- f_Rs1 = EXTRACT_MSB0_UINT (insn, 16, 8, 4);
- f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_Ri) = f_Ri;
- FLD (f_Rs1) = f_Rs1;
- FLD (i_Ri) = & CPU (h_gr)[f_Ri];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mov2dr", "f_Ri 0x%x", 'x', f_Ri, "f_Rs1 0x%x", 'x', f_Rs1, "Ri 0x%x", 'x', f_Ri, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_Ri) = f_Ri;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_mov2ps:
- {
- const IDESC *idesc = &fr30bf_insn_data[itype];
-#define FLD(f) abuf->fields.sfmt_mov2dr.f
- UINT f_Ri;
-
- f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_Ri) = f_Ri;
- FLD (i_Ri) = & CPU (h_gr)[f_Ri];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mov2ps", "f_Ri 0x%x", 'x', f_Ri, "Ri 0x%x", 'x', f_Ri, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_Ri) = f_Ri;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_jmp:
- {
- const IDESC *idesc = &fr30bf_insn_data[itype];
-#define FLD(f) abuf->fields.sfmt_mov2dr.f
- UINT f_Ri;
-
- f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_Ri) = f_Ri;
- FLD (i_Ri) = & CPU (h_gr)[f_Ri];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_jmp", "f_Ri 0x%x", 'x', f_Ri, "Ri 0x%x", 'x', f_Ri, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_Ri) = f_Ri;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_callr:
- {
- const IDESC *idesc = &fr30bf_insn_data[itype];
-#define FLD(f) abuf->fields.sfmt_mov2dr.f
- UINT f_Ri;
-
- f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_Ri) = f_Ri;
- FLD (i_Ri) = & CPU (h_gr)[f_Ri];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_callr", "f_Ri 0x%x", 'x', f_Ri, "Ri 0x%x", 'x', f_Ri, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_Ri) = f_Ri;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_call:
- {
- const IDESC *idesc = &fr30bf_insn_data[itype];
-#define FLD(f) abuf->fields.sfmt_call.f
- SI f_rel12;
-
- f_rel12 = ((((EXTRACT_MSB0_INT (insn, 16, 5, 11)) << (1))) + (((pc) + (2))));
-
- /* Record the fields for the semantic handler. */
- FLD (i_label12) = f_rel12;
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_call", "label12 0x%x", 'x', f_rel12, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_ret:
- {
- const IDESC *idesc = &fr30bf_insn_data[itype];
-#define FLD(f) abuf->fields.fmt_empty.f
-
-
- /* Record the fields for the semantic handler. */
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ret", (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_int:
- {
- const IDESC *idesc = &fr30bf_insn_data[itype];
-#define FLD(f) abuf->fields.sfmt_int.f
- UINT f_u8;
-
- f_u8 = EXTRACT_MSB0_UINT (insn, 16, 8, 8);
-
- /* Record the fields for the semantic handler. */
- FLD (f_u8) = f_u8;
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_int", "f_u8 0x%x", 'x', f_u8, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_inte:
- {
- const IDESC *idesc = &fr30bf_insn_data[itype];
-#define FLD(f) abuf->fields.fmt_empty.f
-
-
- /* Record the fields for the semantic handler. */
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_inte", (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_reti:
- {
- const IDESC *idesc = &fr30bf_insn_data[itype];
-#define FLD(f) abuf->fields.fmt_empty.f
-
-
- /* Record the fields for the semantic handler. */
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_reti", (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_brad:
- {
- const IDESC *idesc = &fr30bf_insn_data[itype];
-#define FLD(f) abuf->fields.sfmt_brad.f
- SI f_rel9;
-
- f_rel9 = ((((EXTRACT_MSB0_INT (insn, 16, 8, 8)) << (1))) + (((pc) + (2))));
-
- /* Record the fields for the semantic handler. */
- FLD (i_label9) = f_rel9;
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_brad", "label9 0x%x", 'x', f_rel9, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_bnod:
- {
- const IDESC *idesc = &fr30bf_insn_data[itype];
-#define FLD(f) abuf->fields.fmt_empty.f
-
-
- /* Record the fields for the semantic handler. */
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bnod", (char *) 0));
-
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_beqd:
- {
- const IDESC *idesc = &fr30bf_insn_data[itype];
-#define FLD(f) abuf->fields.sfmt_brad.f
- SI f_rel9;
-
- f_rel9 = ((((EXTRACT_MSB0_INT (insn, 16, 8, 8)) << (1))) + (((pc) + (2))));
-
- /* Record the fields for the semantic handler. */
- FLD (i_label9) = f_rel9;
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_beqd", "label9 0x%x", 'x', f_rel9, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_bcd:
- {
- const IDESC *idesc = &fr30bf_insn_data[itype];
-#define FLD(f) abuf->fields.sfmt_brad.f
- SI f_rel9;
-
- f_rel9 = ((((EXTRACT_MSB0_INT (insn, 16, 8, 8)) << (1))) + (((pc) + (2))));
-
- /* Record the fields for the semantic handler. */
- FLD (i_label9) = f_rel9;
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bcd", "label9 0x%x", 'x', f_rel9, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_bnd:
- {
- const IDESC *idesc = &fr30bf_insn_data[itype];
-#define FLD(f) abuf->fields.sfmt_brad.f
- SI f_rel9;
-
- f_rel9 = ((((EXTRACT_MSB0_INT (insn, 16, 8, 8)) << (1))) + (((pc) + (2))));
-
- /* Record the fields for the semantic handler. */
- FLD (i_label9) = f_rel9;
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bnd", "label9 0x%x", 'x', f_rel9, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_bvd:
- {
- const IDESC *idesc = &fr30bf_insn_data[itype];
-#define FLD(f) abuf->fields.sfmt_brad.f
- SI f_rel9;
-
- f_rel9 = ((((EXTRACT_MSB0_INT (insn, 16, 8, 8)) << (1))) + (((pc) + (2))));
-
- /* Record the fields for the semantic handler. */
- FLD (i_label9) = f_rel9;
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bvd", "label9 0x%x", 'x', f_rel9, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_bltd:
- {
- const IDESC *idesc = &fr30bf_insn_data[itype];
-#define FLD(f) abuf->fields.sfmt_brad.f
- SI f_rel9;
-
- f_rel9 = ((((EXTRACT_MSB0_INT (insn, 16, 8, 8)) << (1))) + (((pc) + (2))));
-
- /* Record the fields for the semantic handler. */
- FLD (i_label9) = f_rel9;
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bltd", "label9 0x%x", 'x', f_rel9, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_bled:
- {
- const IDESC *idesc = &fr30bf_insn_data[itype];
-#define FLD(f) abuf->fields.sfmt_brad.f
- SI f_rel9;
-
- f_rel9 = ((((EXTRACT_MSB0_INT (insn, 16, 8, 8)) << (1))) + (((pc) + (2))));
-
- /* Record the fields for the semantic handler. */
- FLD (i_label9) = f_rel9;
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bled", "label9 0x%x", 'x', f_rel9, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_blsd:
- {
- const IDESC *idesc = &fr30bf_insn_data[itype];
-#define FLD(f) abuf->fields.sfmt_brad.f
- SI f_rel9;
-
- f_rel9 = ((((EXTRACT_MSB0_INT (insn, 16, 8, 8)) << (1))) + (((pc) + (2))));
-
- /* Record the fields for the semantic handler. */
- FLD (i_label9) = f_rel9;
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_blsd", "label9 0x%x", 'x', f_rel9, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_dmovr13:
- {
- const IDESC *idesc = &fr30bf_insn_data[itype];
-#define FLD(f) abuf->fields.sfmt_dmovr13pi.f
- USI f_dir10;
-
- f_dir10 = ((EXTRACT_MSB0_UINT (insn, 16, 8, 8)) << (2));
-
- /* Record the fields for the semantic handler. */
- FLD (f_dir10) = f_dir10;
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_dmovr13", "f_dir10 0x%x", 'x', f_dir10, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_h_gr_13) = 13;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_dmovr13h:
- {
- const IDESC *idesc = &fr30bf_insn_data[itype];
-#define FLD(f) abuf->fields.sfmt_dmovr13pih.f
- USI f_dir9;
-
- f_dir9 = ((EXTRACT_MSB0_UINT (insn, 16, 8, 8)) << (1));
-
- /* Record the fields for the semantic handler. */
- FLD (f_dir9) = f_dir9;
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_dmovr13h", "f_dir9 0x%x", 'x', f_dir9, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_h_gr_13) = 13;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_dmovr13b:
- {
- const IDESC *idesc = &fr30bf_insn_data[itype];
-#define FLD(f) abuf->fields.sfmt_dmovr13pib.f
- UINT f_dir8;
-
- f_dir8 = EXTRACT_MSB0_UINT (insn, 16, 8, 8);
-
- /* Record the fields for the semantic handler. */
- FLD (f_dir8) = f_dir8;
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_dmovr13b", "f_dir8 0x%x", 'x', f_dir8, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_h_gr_13) = 13;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_dmovr13pi:
- {
- const IDESC *idesc = &fr30bf_insn_data[itype];
-#define FLD(f) abuf->fields.sfmt_dmovr13pi.f
- USI f_dir10;
-
- f_dir10 = ((EXTRACT_MSB0_UINT (insn, 16, 8, 8)) << (2));
-
- /* Record the fields for the semantic handler. */
- FLD (f_dir10) = f_dir10;
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_dmovr13pi", "f_dir10 0x%x", 'x', f_dir10, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_h_gr_13) = 13;
- FLD (out_h_gr_13) = 13;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_dmovr13pih:
- {
- const IDESC *idesc = &fr30bf_insn_data[itype];
-#define FLD(f) abuf->fields.sfmt_dmovr13pih.f
- USI f_dir9;
-
- f_dir9 = ((EXTRACT_MSB0_UINT (insn, 16, 8, 8)) << (1));
-
- /* Record the fields for the semantic handler. */
- FLD (f_dir9) = f_dir9;
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_dmovr13pih", "f_dir9 0x%x", 'x', f_dir9, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_h_gr_13) = 13;
- FLD (out_h_gr_13) = 13;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_dmovr13pib:
- {
- const IDESC *idesc = &fr30bf_insn_data[itype];
-#define FLD(f) abuf->fields.sfmt_dmovr13pib.f
- UINT f_dir8;
-
- f_dir8 = EXTRACT_MSB0_UINT (insn, 16, 8, 8);
-
- /* Record the fields for the semantic handler. */
- FLD (f_dir8) = f_dir8;
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_dmovr13pib", "f_dir8 0x%x", 'x', f_dir8, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_h_gr_13) = 13;
- FLD (out_h_gr_13) = 13;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_dmovr15pi:
- {
- const IDESC *idesc = &fr30bf_insn_data[itype];
-#define FLD(f) abuf->fields.sfmt_dmovr15pi.f
- USI f_dir10;
-
- f_dir10 = ((EXTRACT_MSB0_UINT (insn, 16, 8, 8)) << (2));
-
- /* Record the fields for the semantic handler. */
- FLD (f_dir10) = f_dir10;
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_dmovr15pi", "f_dir10 0x%x", 'x', f_dir10, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_h_gr_15) = 15;
- FLD (out_h_gr_15) = 15;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_dmov2r13:
- {
- const IDESC *idesc = &fr30bf_insn_data[itype];
-#define FLD(f) abuf->fields.sfmt_dmovr13pi.f
- USI f_dir10;
-
- f_dir10 = ((EXTRACT_MSB0_UINT (insn, 16, 8, 8)) << (2));
-
- /* Record the fields for the semantic handler. */
- FLD (f_dir10) = f_dir10;
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_dmov2r13", "f_dir10 0x%x", 'x', f_dir10, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (out_h_gr_13) = 13;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_dmov2r13h:
- {
- const IDESC *idesc = &fr30bf_insn_data[itype];
-#define FLD(f) abuf->fields.sfmt_dmovr13pih.f
- USI f_dir9;
-
- f_dir9 = ((EXTRACT_MSB0_UINT (insn, 16, 8, 8)) << (1));
-
- /* Record the fields for the semantic handler. */
- FLD (f_dir9) = f_dir9;
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_dmov2r13h", "f_dir9 0x%x", 'x', f_dir9, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (out_h_gr_13) = 13;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_dmov2r13b:
- {
- const IDESC *idesc = &fr30bf_insn_data[itype];
-#define FLD(f) abuf->fields.sfmt_dmovr13pib.f
- UINT f_dir8;
-
- f_dir8 = EXTRACT_MSB0_UINT (insn, 16, 8, 8);
-
- /* Record the fields for the semantic handler. */
- FLD (f_dir8) = f_dir8;
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_dmov2r13b", "f_dir8 0x%x", 'x', f_dir8, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (out_h_gr_13) = 13;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_dmov2r13pi:
- {
- const IDESC *idesc = &fr30bf_insn_data[itype];
-#define FLD(f) abuf->fields.sfmt_dmovr13pi.f
- USI f_dir10;
-
- f_dir10 = ((EXTRACT_MSB0_UINT (insn, 16, 8, 8)) << (2));
-
- /* Record the fields for the semantic handler. */
- FLD (f_dir10) = f_dir10;
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_dmov2r13pi", "f_dir10 0x%x", 'x', f_dir10, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_h_gr_13) = 13;
- FLD (out_h_gr_13) = 13;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_dmov2r13pih:
- {
- const IDESC *idesc = &fr30bf_insn_data[itype];
-#define FLD(f) abuf->fields.sfmt_dmovr13pih.f
- USI f_dir9;
-
- f_dir9 = ((EXTRACT_MSB0_UINT (insn, 16, 8, 8)) << (1));
-
- /* Record the fields for the semantic handler. */
- FLD (f_dir9) = f_dir9;
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_dmov2r13pih", "f_dir9 0x%x", 'x', f_dir9, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_h_gr_13) = 13;
- FLD (out_h_gr_13) = 13;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_dmov2r13pib:
- {
- const IDESC *idesc = &fr30bf_insn_data[itype];
-#define FLD(f) abuf->fields.sfmt_dmovr13pib.f
- UINT f_dir8;
-
- f_dir8 = EXTRACT_MSB0_UINT (insn, 16, 8, 8);
-
- /* Record the fields for the semantic handler. */
- FLD (f_dir8) = f_dir8;
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_dmov2r13pib", "f_dir8 0x%x", 'x', f_dir8, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_h_gr_13) = 13;
- FLD (out_h_gr_13) = 13;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_dmov2r15pd:
- {
- const IDESC *idesc = &fr30bf_insn_data[itype];
-#define FLD(f) abuf->fields.sfmt_dmovr15pi.f
- USI f_dir10;
-
- f_dir10 = ((EXTRACT_MSB0_UINT (insn, 16, 8, 8)) << (2));
-
- /* Record the fields for the semantic handler. */
- FLD (f_dir10) = f_dir10;
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_dmov2r15pd", "f_dir10 0x%x", 'x', f_dir10, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_h_gr_15) = 15;
- FLD (out_h_gr_15) = 15;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_ldres:
- {
- const IDESC *idesc = &fr30bf_insn_data[itype];
-#define FLD(f) abuf->fields.sfmt_add2.f
- UINT f_Ri;
-
- f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_Ri) = f_Ri;
- FLD (i_Ri) = & CPU (h_gr)[f_Ri];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldres", "f_Ri 0x%x", 'x', f_Ri, "Ri 0x%x", 'x', f_Ri, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_Ri) = f_Ri;
- FLD (out_Ri) = f_Ri;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_copop:
- {
- const IDESC *idesc = &fr30bf_insn_data[itype];
-#define FLD(f) abuf->fields.fmt_empty.f
- /* Contents of trailing part of insn. */
- UINT word_1;
-
- word_1 = GETIMEMUHI (current_cpu, pc + 2);
-
- /* Record the fields for the semantic handler. */
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_copop", (char *) 0));
-
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_andccr:
- {
- const IDESC *idesc = &fr30bf_insn_data[itype];
-#define FLD(f) abuf->fields.sfmt_int.f
- UINT f_u8;
-
- f_u8 = EXTRACT_MSB0_UINT (insn, 16, 8, 8);
-
- /* Record the fields for the semantic handler. */
- FLD (f_u8) = f_u8;
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_andccr", "f_u8 0x%x", 'x', f_u8, (char *) 0));
-
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_stilm:
- {
- const IDESC *idesc = &fr30bf_insn_data[itype];
-#define FLD(f) abuf->fields.sfmt_int.f
- UINT f_u8;
-
- f_u8 = EXTRACT_MSB0_UINT (insn, 16, 8, 8);
-
- /* Record the fields for the semantic handler. */
- FLD (f_u8) = f_u8;
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stilm", "f_u8 0x%x", 'x', f_u8, (char *) 0));
-
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_addsp:
- {
- const IDESC *idesc = &fr30bf_insn_data[itype];
-#define FLD(f) abuf->fields.sfmt_addsp.f
- SI f_s10;
-
- f_s10 = ((EXTRACT_MSB0_INT (insn, 16, 8, 8)) << (2));
-
- /* Record the fields for the semantic handler. */
- FLD (f_s10) = f_s10;
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_addsp", "f_s10 0x%x", 'x', f_s10, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_h_gr_15) = 15;
- FLD (out_h_gr_15) = 15;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_extsb:
- {
- const IDESC *idesc = &fr30bf_insn_data[itype];
-#define FLD(f) abuf->fields.sfmt_add2.f
- UINT f_Ri;
-
- f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_Ri) = f_Ri;
- FLD (i_Ri) = & CPU (h_gr)[f_Ri];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_extsb", "f_Ri 0x%x", 'x', f_Ri, "Ri 0x%x", 'x', f_Ri, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_Ri) = f_Ri;
- FLD (out_Ri) = f_Ri;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_extub:
- {
- const IDESC *idesc = &fr30bf_insn_data[itype];
-#define FLD(f) abuf->fields.sfmt_add2.f
- UINT f_Ri;
-
- f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_Ri) = f_Ri;
- FLD (i_Ri) = & CPU (h_gr)[f_Ri];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_extub", "f_Ri 0x%x", 'x', f_Ri, "Ri 0x%x", 'x', f_Ri, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_Ri) = f_Ri;
- FLD (out_Ri) = f_Ri;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_extsh:
- {
- const IDESC *idesc = &fr30bf_insn_data[itype];
-#define FLD(f) abuf->fields.sfmt_add2.f
- UINT f_Ri;
-
- f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_Ri) = f_Ri;
- FLD (i_Ri) = & CPU (h_gr)[f_Ri];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_extsh", "f_Ri 0x%x", 'x', f_Ri, "Ri 0x%x", 'x', f_Ri, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_Ri) = f_Ri;
- FLD (out_Ri) = f_Ri;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_extuh:
- {
- const IDESC *idesc = &fr30bf_insn_data[itype];
-#define FLD(f) abuf->fields.sfmt_add2.f
- UINT f_Ri;
-
- f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_Ri) = f_Ri;
- FLD (i_Ri) = & CPU (h_gr)[f_Ri];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_extuh", "f_Ri 0x%x", 'x', f_Ri, "Ri 0x%x", 'x', f_Ri, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_Ri) = f_Ri;
- FLD (out_Ri) = f_Ri;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_ldm0:
- {
- const IDESC *idesc = &fr30bf_insn_data[itype];
-#define FLD(f) abuf->fields.sfmt_ldm0.f
- UINT f_reglist_low_ld;
-
- f_reglist_low_ld = EXTRACT_MSB0_UINT (insn, 16, 8, 8);
-
- /* Record the fields for the semantic handler. */
- FLD (f_reglist_low_ld) = f_reglist_low_ld;
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldm0", "f_reglist_low_ld 0x%x", 'x', f_reglist_low_ld, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_h_gr_15) = 15;
- FLD (out_h_gr_0) = 0;
- FLD (out_h_gr_1) = 1;
- FLD (out_h_gr_15) = 15;
- FLD (out_h_gr_2) = 2;
- FLD (out_h_gr_3) = 3;
- FLD (out_h_gr_4) = 4;
- FLD (out_h_gr_5) = 5;
- FLD (out_h_gr_6) = 6;
- FLD (out_h_gr_7) = 7;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_ldm1:
- {
- const IDESC *idesc = &fr30bf_insn_data[itype];
-#define FLD(f) abuf->fields.sfmt_ldm1.f
- UINT f_reglist_hi_ld;
-
- f_reglist_hi_ld = EXTRACT_MSB0_UINT (insn, 16, 8, 8);
-
- /* Record the fields for the semantic handler. */
- FLD (f_reglist_hi_ld) = f_reglist_hi_ld;
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldm1", "f_reglist_hi_ld 0x%x", 'x', f_reglist_hi_ld, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_h_gr_15) = 15;
- FLD (out_h_gr_10) = 10;
- FLD (out_h_gr_11) = 11;
- FLD (out_h_gr_12) = 12;
- FLD (out_h_gr_13) = 13;
- FLD (out_h_gr_14) = 14;
- FLD (out_h_gr_15) = 15;
- FLD (out_h_gr_8) = 8;
- FLD (out_h_gr_9) = 9;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_stm0:
- {
- const IDESC *idesc = &fr30bf_insn_data[itype];
-#define FLD(f) abuf->fields.sfmt_stm0.f
- UINT f_reglist_low_st;
-
- f_reglist_low_st = EXTRACT_MSB0_UINT (insn, 16, 8, 8);
-
- /* Record the fields for the semantic handler. */
- FLD (f_reglist_low_st) = f_reglist_low_st;
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stm0", "f_reglist_low_st 0x%x", 'x', f_reglist_low_st, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_h_gr_0) = 0;
- FLD (in_h_gr_1) = 1;
- FLD (in_h_gr_15) = 15;
- FLD (in_h_gr_2) = 2;
- FLD (in_h_gr_3) = 3;
- FLD (in_h_gr_4) = 4;
- FLD (in_h_gr_5) = 5;
- FLD (in_h_gr_6) = 6;
- FLD (in_h_gr_7) = 7;
- FLD (out_h_gr_15) = 15;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_stm1:
- {
- const IDESC *idesc = &fr30bf_insn_data[itype];
-#define FLD(f) abuf->fields.sfmt_stm1.f
- UINT f_reglist_hi_st;
-
- f_reglist_hi_st = EXTRACT_MSB0_UINT (insn, 16, 8, 8);
-
- /* Record the fields for the semantic handler. */
- FLD (f_reglist_hi_st) = f_reglist_hi_st;
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stm1", "f_reglist_hi_st 0x%x", 'x', f_reglist_hi_st, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_h_gr_10) = 10;
- FLD (in_h_gr_11) = 11;
- FLD (in_h_gr_12) = 12;
- FLD (in_h_gr_13) = 13;
- FLD (in_h_gr_14) = 14;
- FLD (in_h_gr_15) = 15;
- FLD (in_h_gr_8) = 8;
- FLD (in_h_gr_9) = 9;
- FLD (out_h_gr_15) = 15;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_enter:
- {
- const IDESC *idesc = &fr30bf_insn_data[itype];
-#define FLD(f) abuf->fields.sfmt_enter.f
- USI f_u10;
-
- f_u10 = ((EXTRACT_MSB0_UINT (insn, 16, 8, 8)) << (2));
-
- /* Record the fields for the semantic handler. */
- FLD (f_u10) = f_u10;
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_enter", "f_u10 0x%x", 'x', f_u10, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_h_gr_14) = 14;
- FLD (in_h_gr_15) = 15;
- FLD (out_h_gr_14) = 14;
- FLD (out_h_gr_15) = 15;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_leave:
- {
- const IDESC *idesc = &fr30bf_insn_data[itype];
-#define FLD(f) abuf->fields.sfmt_enter.f
-
-
- /* Record the fields for the semantic handler. */
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_leave", (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_h_gr_14) = 14;
- FLD (in_h_gr_15) = 15;
- FLD (out_h_gr_14) = 14;
- FLD (out_h_gr_15) = 15;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_xchb:
- {
- const IDESC *idesc = &fr30bf_insn_data[itype];
-#define FLD(f) abuf->fields.sfmt_add.f
- UINT f_Rj;
- UINT f_Ri;
-
- f_Rj = EXTRACT_MSB0_UINT (insn, 16, 8, 4);
- f_Ri = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_Ri) = f_Ri;
- FLD (f_Rj) = f_Rj;
- FLD (i_Ri) = & CPU (h_gr)[f_Ri];
- FLD (i_Rj) = & CPU (h_gr)[f_Rj];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_xchb", "f_Ri 0x%x", 'x', f_Ri, "f_Rj 0x%x", 'x', f_Rj, "Ri 0x%x", 'x', f_Ri, "Rj 0x%x", 'x', f_Rj, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_Ri) = f_Ri;
- FLD (in_Rj) = f_Rj;
- FLD (out_Ri) = f_Ri;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
-}
diff --git a/sim/fr30/decode.h b/sim/fr30/decode.h
deleted file mode 100644
index 4cc1ffbc3c2..00000000000
--- a/sim/fr30/decode.h
+++ /dev/null
@@ -1,125 +0,0 @@
-/* Decode header for fr30bf.
-
-THIS FILE IS MACHINE GENERATED WITH CGEN.
-
-Copyright (C) 1996, 1997, 1998, 1999, 2000 Free Software Foundation, Inc.
-
-This file is part of the GNU Simulators.
-
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License along
-with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
-*/
-
-#ifndef FR30BF_DECODE_H
-#define FR30BF_DECODE_H
-
-extern const IDESC *fr30bf_decode (SIM_CPU *, IADDR,
- CGEN_INSN_INT,
- ARGBUF *);
-extern void fr30bf_init_idesc_table (SIM_CPU *);
-extern void fr30bf_sem_init_idesc_table (SIM_CPU *);
-extern void fr30bf_semf_init_idesc_table (SIM_CPU *);
-
-/* Enum declaration for instructions in cpu family fr30bf. */
-typedef enum fr30bf_insn_type {
- FR30BF_INSN_X_INVALID, FR30BF_INSN_X_AFTER, FR30BF_INSN_X_BEFORE, FR30BF_INSN_X_CTI_CHAIN
- , FR30BF_INSN_X_CHAIN, FR30BF_INSN_X_BEGIN, FR30BF_INSN_ADD, FR30BF_INSN_ADDI
- , FR30BF_INSN_ADD2, FR30BF_INSN_ADDC, FR30BF_INSN_ADDN, FR30BF_INSN_ADDNI
- , FR30BF_INSN_ADDN2, FR30BF_INSN_SUB, FR30BF_INSN_SUBC, FR30BF_INSN_SUBN
- , FR30BF_INSN_CMP, FR30BF_INSN_CMPI, FR30BF_INSN_CMP2, FR30BF_INSN_AND
- , FR30BF_INSN_OR, FR30BF_INSN_EOR, FR30BF_INSN_ANDM, FR30BF_INSN_ANDH
- , FR30BF_INSN_ANDB, FR30BF_INSN_ORM, FR30BF_INSN_ORH, FR30BF_INSN_ORB
- , FR30BF_INSN_EORM, FR30BF_INSN_EORH, FR30BF_INSN_EORB, FR30BF_INSN_BANDL
- , FR30BF_INSN_BORL, FR30BF_INSN_BEORL, FR30BF_INSN_BANDH, FR30BF_INSN_BORH
- , FR30BF_INSN_BEORH, FR30BF_INSN_BTSTL, FR30BF_INSN_BTSTH, FR30BF_INSN_MUL
- , FR30BF_INSN_MULU, FR30BF_INSN_MULH, FR30BF_INSN_MULUH, FR30BF_INSN_DIV0S
- , FR30BF_INSN_DIV0U, FR30BF_INSN_DIV1, FR30BF_INSN_DIV2, FR30BF_INSN_DIV3
- , FR30BF_INSN_DIV4S, FR30BF_INSN_LSL, FR30BF_INSN_LSLI, FR30BF_INSN_LSL2
- , FR30BF_INSN_LSR, FR30BF_INSN_LSRI, FR30BF_INSN_LSR2, FR30BF_INSN_ASR
- , FR30BF_INSN_ASRI, FR30BF_INSN_ASR2, FR30BF_INSN_LDI8, FR30BF_INSN_LDI20
- , FR30BF_INSN_LDI32, FR30BF_INSN_LD, FR30BF_INSN_LDUH, FR30BF_INSN_LDUB
- , FR30BF_INSN_LDR13, FR30BF_INSN_LDR13UH, FR30BF_INSN_LDR13UB, FR30BF_INSN_LDR14
- , FR30BF_INSN_LDR14UH, FR30BF_INSN_LDR14UB, FR30BF_INSN_LDR15, FR30BF_INSN_LDR15GR
- , FR30BF_INSN_LDR15DR, FR30BF_INSN_LDR15PS, FR30BF_INSN_ST, FR30BF_INSN_STH
- , FR30BF_INSN_STB, FR30BF_INSN_STR13, FR30BF_INSN_STR13H, FR30BF_INSN_STR13B
- , FR30BF_INSN_STR14, FR30BF_INSN_STR14H, FR30BF_INSN_STR14B, FR30BF_INSN_STR15
- , FR30BF_INSN_STR15GR, FR30BF_INSN_STR15DR, FR30BF_INSN_STR15PS, FR30BF_INSN_MOV
- , FR30BF_INSN_MOVDR, FR30BF_INSN_MOVPS, FR30BF_INSN_MOV2DR, FR30BF_INSN_MOV2PS
- , FR30BF_INSN_JMP, FR30BF_INSN_JMPD, FR30BF_INSN_CALLR, FR30BF_INSN_CALLRD
- , FR30BF_INSN_CALL, FR30BF_INSN_CALLD, FR30BF_INSN_RET, FR30BF_INSN_RET_D
- , FR30BF_INSN_INT, FR30BF_INSN_INTE, FR30BF_INSN_RETI, FR30BF_INSN_BRAD
- , FR30BF_INSN_BRA, FR30BF_INSN_BNOD, FR30BF_INSN_BNO, FR30BF_INSN_BEQD
- , FR30BF_INSN_BEQ, FR30BF_INSN_BNED, FR30BF_INSN_BNE, FR30BF_INSN_BCD
- , FR30BF_INSN_BC, FR30BF_INSN_BNCD, FR30BF_INSN_BNC, FR30BF_INSN_BND
- , FR30BF_INSN_BN, FR30BF_INSN_BPD, FR30BF_INSN_BP, FR30BF_INSN_BVD
- , FR30BF_INSN_BV, FR30BF_INSN_BNVD, FR30BF_INSN_BNV, FR30BF_INSN_BLTD
- , FR30BF_INSN_BLT, FR30BF_INSN_BGED, FR30BF_INSN_BGE, FR30BF_INSN_BLED
- , FR30BF_INSN_BLE, FR30BF_INSN_BGTD, FR30BF_INSN_BGT, FR30BF_INSN_BLSD
- , FR30BF_INSN_BLS, FR30BF_INSN_BHID, FR30BF_INSN_BHI, FR30BF_INSN_DMOVR13
- , FR30BF_INSN_DMOVR13H, FR30BF_INSN_DMOVR13B, FR30BF_INSN_DMOVR13PI, FR30BF_INSN_DMOVR13PIH
- , FR30BF_INSN_DMOVR13PIB, FR30BF_INSN_DMOVR15PI, FR30BF_INSN_DMOV2R13, FR30BF_INSN_DMOV2R13H
- , FR30BF_INSN_DMOV2R13B, FR30BF_INSN_DMOV2R13PI, FR30BF_INSN_DMOV2R13PIH, FR30BF_INSN_DMOV2R13PIB
- , FR30BF_INSN_DMOV2R15PD, FR30BF_INSN_LDRES, FR30BF_INSN_STRES, FR30BF_INSN_COPOP
- , FR30BF_INSN_COPLD, FR30BF_INSN_COPST, FR30BF_INSN_COPSV, FR30BF_INSN_NOP
- , FR30BF_INSN_ANDCCR, FR30BF_INSN_ORCCR, FR30BF_INSN_STILM, FR30BF_INSN_ADDSP
- , FR30BF_INSN_EXTSB, FR30BF_INSN_EXTUB, FR30BF_INSN_EXTSH, FR30BF_INSN_EXTUH
- , FR30BF_INSN_LDM0, FR30BF_INSN_LDM1, FR30BF_INSN_STM0, FR30BF_INSN_STM1
- , FR30BF_INSN_ENTER, FR30BF_INSN_LEAVE, FR30BF_INSN_XCHB, FR30BF_INSN_MAX
-} FR30BF_INSN_TYPE;
-
-/* Enum declaration for semantic formats in cpu family fr30bf. */
-typedef enum fr30bf_sfmt_type {
- FR30BF_SFMT_EMPTY, FR30BF_SFMT_ADD, FR30BF_SFMT_ADDI, FR30BF_SFMT_ADD2
- , FR30BF_SFMT_ADDC, FR30BF_SFMT_ADDN, FR30BF_SFMT_ADDNI, FR30BF_SFMT_ADDN2
- , FR30BF_SFMT_CMP, FR30BF_SFMT_CMPI, FR30BF_SFMT_CMP2, FR30BF_SFMT_AND
- , FR30BF_SFMT_ANDM, FR30BF_SFMT_ANDH, FR30BF_SFMT_ANDB, FR30BF_SFMT_BANDL
- , FR30BF_SFMT_BTSTL, FR30BF_SFMT_MUL, FR30BF_SFMT_MULU, FR30BF_SFMT_MULH
- , FR30BF_SFMT_DIV0S, FR30BF_SFMT_DIV0U, FR30BF_SFMT_DIV1, FR30BF_SFMT_DIV2
- , FR30BF_SFMT_DIV3, FR30BF_SFMT_DIV4S, FR30BF_SFMT_LSL, FR30BF_SFMT_LSLI
- , FR30BF_SFMT_LDI8, FR30BF_SFMT_LDI20, FR30BF_SFMT_LDI32, FR30BF_SFMT_LD
- , FR30BF_SFMT_LDR13, FR30BF_SFMT_LDR14, FR30BF_SFMT_LDR14UH, FR30BF_SFMT_LDR14UB
- , FR30BF_SFMT_LDR15, FR30BF_SFMT_LDR15GR, FR30BF_SFMT_LDR15DR, FR30BF_SFMT_LDR15PS
- , FR30BF_SFMT_ST, FR30BF_SFMT_STR13, FR30BF_SFMT_STR14, FR30BF_SFMT_STR14H
- , FR30BF_SFMT_STR14B, FR30BF_SFMT_STR15, FR30BF_SFMT_STR15GR, FR30BF_SFMT_STR15DR
- , FR30BF_SFMT_STR15PS, FR30BF_SFMT_MOV, FR30BF_SFMT_MOVDR, FR30BF_SFMT_MOVPS
- , FR30BF_SFMT_MOV2DR, FR30BF_SFMT_MOV2PS, FR30BF_SFMT_JMP, FR30BF_SFMT_CALLR
- , FR30BF_SFMT_CALL, FR30BF_SFMT_RET, FR30BF_SFMT_INT, FR30BF_SFMT_INTE
- , FR30BF_SFMT_RETI, FR30BF_SFMT_BRAD, FR30BF_SFMT_BNOD, FR30BF_SFMT_BEQD
- , FR30BF_SFMT_BCD, FR30BF_SFMT_BND, FR30BF_SFMT_BVD, FR30BF_SFMT_BLTD
- , FR30BF_SFMT_BLED, FR30BF_SFMT_BLSD, FR30BF_SFMT_DMOVR13, FR30BF_SFMT_DMOVR13H
- , FR30BF_SFMT_DMOVR13B, FR30BF_SFMT_DMOVR13PI, FR30BF_SFMT_DMOVR13PIH, FR30BF_SFMT_DMOVR13PIB
- , FR30BF_SFMT_DMOVR15PI, FR30BF_SFMT_DMOV2R13, FR30BF_SFMT_DMOV2R13H, FR30BF_SFMT_DMOV2R13B
- , FR30BF_SFMT_DMOV2R13PI, FR30BF_SFMT_DMOV2R13PIH, FR30BF_SFMT_DMOV2R13PIB, FR30BF_SFMT_DMOV2R15PD
- , FR30BF_SFMT_LDRES, FR30BF_SFMT_COPOP, FR30BF_SFMT_ANDCCR, FR30BF_SFMT_STILM
- , FR30BF_SFMT_ADDSP, FR30BF_SFMT_EXTSB, FR30BF_SFMT_EXTUB, FR30BF_SFMT_EXTSH
- , FR30BF_SFMT_EXTUH, FR30BF_SFMT_LDM0, FR30BF_SFMT_LDM1, FR30BF_SFMT_STM0
- , FR30BF_SFMT_STM1, FR30BF_SFMT_ENTER, FR30BF_SFMT_LEAVE, FR30BF_SFMT_XCHB
-} FR30BF_SFMT_TYPE;
-
-/* Function unit handlers (user written). */
-
-extern int fr30bf_model_fr30_1_u_stm (SIM_CPU *, const IDESC *, int /*unit_num*/, int /*referenced*/, INT /*reglist*/);
-extern int fr30bf_model_fr30_1_u_ldm (SIM_CPU *, const IDESC *, int /*unit_num*/, int /*referenced*/, INT /*reglist*/);
-extern int fr30bf_model_fr30_1_u_store (SIM_CPU *, const IDESC *, int /*unit_num*/, int /*referenced*/, INT /*Ri*/, INT /*Rj*/);
-extern int fr30bf_model_fr30_1_u_load (SIM_CPU *, const IDESC *, int /*unit_num*/, int /*referenced*/, INT /*Rj*/, INT /*Ri*/);
-extern int fr30bf_model_fr30_1_u_cti (SIM_CPU *, const IDESC *, int /*unit_num*/, int /*referenced*/, INT /*Ri*/);
-extern int fr30bf_model_fr30_1_u_exec (SIM_CPU *, const IDESC *, int /*unit_num*/, int /*referenced*/, INT /*Ri*/, INT /*Rj*/, INT /*Ri*/);
-
-/* Profiling before/after handlers (user written) */
-
-extern void fr30bf_model_insn_before (SIM_CPU *, int /*first_p*/);
-extern void fr30bf_model_insn_after (SIM_CPU *, int /*last_p*/, int /*cycles*/);
-
-#endif /* FR30BF_DECODE_H */
diff --git a/sim/fr30/devices.c b/sim/fr30/devices.c
deleted file mode 100644
index a3d47cf765d..00000000000
--- a/sim/fr30/devices.c
+++ /dev/null
@@ -1,98 +0,0 @@
-/* fr30 device support
- Copyright (C) 1998, 1999 Free Software Foundation, Inc.
- Contributed by Cygnus Solutions.
-
-This file is part of the GNU simulators.
-
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License along
-with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
-
-/* ??? All of this is just to get something going. wip! */
-
-#include "sim-main.h"
-
-#ifdef HAVE_DV_SOCKSER
-#include "dv-sockser.h"
-#endif
-
-device fr30_devices;
-
-int
-device_io_read_buffer (device *me, void *source, int space,
- address_word addr, unsigned nr_bytes,
- SIM_DESC sd, SIM_CPU *cpu, sim_cia cia)
-{
- if (STATE_ENVIRONMENT (sd) != OPERATING_ENVIRONMENT)
- return nr_bytes;
-
-#ifdef HAVE_DV_SOCKSER
- if (addr == UART_INCHAR_ADDR)
- {
- int c = dv_sockser_read (sd);
- if (c == -1)
- return 0;
- *(char *) source = c;
- return 1;
- }
- if (addr == UART_STATUS_ADDR)
- {
- int status = dv_sockser_status (sd);
- unsigned char *p = source;
- p[0] = 0;
- p[1] = (((status & DV_SOCKSER_INPUT_EMPTY)
-#ifdef UART_INPUT_READY0
- ? UART_INPUT_READY : 0)
-#else
- ? 0 : UART_INPUT_READY)
-#endif
- + ((status & DV_SOCKSER_OUTPUT_EMPTY) ? UART_OUTPUT_READY : 0));
- return 2;
- }
-#endif
-
- return nr_bytes;
-}
-
-int
-device_io_write_buffer (device *me, const void *source, int space,
- address_word addr, unsigned nr_bytes,
- SIM_DESC sd, SIM_CPU *cpu, sim_cia cia)
-{
-#if WITH_SCACHE
- if (addr == MCCR_ADDR)
- {
- if ((*(const char *) source & MCCR_CP) != 0)
- scache_flush (sd);
- return nr_bytes;
- }
-#endif
-
- if (STATE_ENVIRONMENT (sd) != OPERATING_ENVIRONMENT)
- return nr_bytes;
-
-#if HAVE_DV_SOCKSER
- if (addr == UART_OUTCHAR_ADDR)
- {
- int rc = dv_sockser_write (sd, *(char *) source);
- return rc == 1;
- }
-#endif
-
- return nr_bytes;
-}
-
-void
-device_error (device *me, char *message, ...)
-{
-}
diff --git a/sim/fr30/fr30-sim.h b/sim/fr30/fr30-sim.h
deleted file mode 100644
index dbb8117f974..00000000000
--- a/sim/fr30/fr30-sim.h
+++ /dev/null
@@ -1,96 +0,0 @@
-/* collection of junk waiting time to sort out
- Copyright (C) 1998, 1999 Free Software Foundation, Inc.
- Contributed by Cygnus Solutions.
-
-This file is part of the GNU Simulators.
-
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License along
-with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
-
-#ifndef FR30_SIM_H
-#define FR30_SIM_H
-
-/* gdb register numbers */
-#define PC_REGNUM 16
-#define PS_REGNUM 17
-#define TBR_REGNUM 18
-#define RP_REGNUM 19
-#define SSP_REGNUM 20
-#define USP_REGNUM 21
-#define MDH_REGNUM 22
-#define MDL_REGNUM 23
-
-extern BI fr30bf_h_sbit_get_handler (SIM_CPU *);
-extern void fr30bf_h_sbit_set_handler (SIM_CPU *, BI);
-
-extern UQI fr30bf_h_ccr_get_handler (SIM_CPU *);
-extern void fr30bf_h_ccr_set_handler (SIM_CPU *, UQI);
-
-extern UQI fr30bf_h_scr_get_handler (SIM_CPU *);
-extern void fr30bf_h_scr_set_handler (SIM_CPU *, UQI);
-
-extern UQI fr30bf_h_ilm_get_handler (SIM_CPU *);
-extern void fr30bf_h_ilm_set_handler (SIM_CPU *, UQI);
-
-extern USI fr30bf_h_ps_get_handler (SIM_CPU *);
-extern void fr30bf_h_ps_set_handler (SIM_CPU *, USI);
-
-extern SI fr30bf_h_dr_get_handler (SIM_CPU *, UINT);
-extern void fr30bf_h_dr_set_handler (SIM_CPU *, UINT, SI);
-
-#define GETTWI GETTSI
-#define SETTWI SETTSI
-
-/* Hardware/device support.
- ??? Will eventually want to move device stuff to config files. */
-
-/* Special purpose traps. */
-#define TRAP_SYSCALL 10
-#define TRAP_BREAKPOINT 9
-
-/* Support for the MCCR register (Cache Control Register) is needed in order
- for overlays to work correctly with the scache: cached instructions need
- to be flushed when the instruction space is changed at runtime. */
-
-/* Cache Control Register */
-#define MCCR_ADDR 0xffffffff
-#define MCCR_CP 0x80
-/* not supported */
-#define MCCR_CM0 2
-#define MCCR_CM1 1
-
-/* Serial device addresses. */
-/* These are the values for the MSA2000 board.
- ??? Will eventually need to move this to a config file. */
-#define UART_INCHAR_ADDR 0xff004009
-#define UART_OUTCHAR_ADDR 0xff004007
-#define UART_STATUS_ADDR 0xff004002
-
-#define UART_INPUT_READY 0x4
-#define UART_OUTPUT_READY 0x1
-
-/* Start address and length of all device support. */
-#define FR30_DEVICE_ADDR 0xff000000
-#define FR30_DEVICE_LEN 0x00ffffff
-
-/* sim_core_attach device argument. */
-extern device fr30_devices;
-
-/* FIXME: Temporary, until device support ready. */
-struct _device { int foo; };
-
-/* Handle the trap insn. */
-USI fr30_int (SIM_CPU *, PCADDR, int);
-
-#endif /* FR30_SIM_H */
diff --git a/sim/fr30/fr30.c b/sim/fr30/fr30.c
deleted file mode 100644
index 51336540783..00000000000
--- a/sim/fr30/fr30.c
+++ /dev/null
@@ -1,423 +0,0 @@
-/* fr30 simulator support code
- Copyright (C) 1998, 1999 Free Software Foundation, Inc.
- Contributed by Cygnus Solutions.
-
-This file is part of the GNU simulators.
-
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License along
-with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
-
-#define WANT_CPU
-#define WANT_CPU_FR30BF
-
-#include "sim-main.h"
-#include "cgen-mem.h"
-#include "cgen-ops.h"
-
-/* Convert gdb dedicated register number to actual dr reg number. */
-
-static int
-decode_gdb_dr_regnum (int gdb_regnum)
-{
- switch (gdb_regnum)
- {
- case TBR_REGNUM : return H_DR_TBR;
- case RP_REGNUM : return H_DR_RP;
- case SSP_REGNUM : return H_DR_SSP;
- case USP_REGNUM : return H_DR_USP;
- case MDH_REGNUM : return H_DR_MDH;
- case MDL_REGNUM : return H_DR_MDL;
- }
- abort ();
-}
-
-/* The contents of BUF are in target byte order. */
-
-int
-fr30bf_fetch_register (SIM_CPU *current_cpu, int rn, unsigned char *buf, int len)
-{
- if (rn < 16)
- SETTWI (buf, fr30bf_h_gr_get (current_cpu, rn));
- else
- switch (rn)
- {
- case PC_REGNUM :
- SETTWI (buf, fr30bf_h_pc_get (current_cpu));
- break;
- case PS_REGNUM :
- SETTWI (buf, fr30bf_h_ps_get (current_cpu));
- break;
- case TBR_REGNUM :
- case RP_REGNUM :
- case SSP_REGNUM :
- case USP_REGNUM :
- case MDH_REGNUM :
- case MDL_REGNUM :
- SETTWI (buf, fr30bf_h_dr_get (current_cpu,
- decode_gdb_dr_regnum (rn)));
- break;
- default :
- return 0;
- }
-
- return -1; /*FIXME*/
-}
-
-/* The contents of BUF are in target byte order. */
-
-int
-fr30bf_store_register (SIM_CPU *current_cpu, int rn, unsigned char *buf, int len)
-{
- if (rn < 16)
- fr30bf_h_gr_set (current_cpu, rn, GETTWI (buf));
- else
- switch (rn)
- {
- case PC_REGNUM :
- fr30bf_h_pc_set (current_cpu, GETTWI (buf));
- break;
- case PS_REGNUM :
- fr30bf_h_ps_set (current_cpu, GETTWI (buf));
- break;
- case TBR_REGNUM :
- case RP_REGNUM :
- case SSP_REGNUM :
- case USP_REGNUM :
- case MDH_REGNUM :
- case MDL_REGNUM :
- fr30bf_h_dr_set (current_cpu,
- decode_gdb_dr_regnum (rn),
- GETTWI (buf));
- break;
- default :
- return 0;
- }
-
- return -1; /*FIXME*/
-}
-
-/* Cover fns to access the ccr bits. */
-
-BI
-fr30bf_h_sbit_get_handler (SIM_CPU *current_cpu)
-{
- return CPU (h_sbit);
-}
-
-void
-fr30bf_h_sbit_set_handler (SIM_CPU *current_cpu, BI newval)
-{
- int old_sbit = CPU (h_sbit);
- int new_sbit = (newval != 0);
-
- CPU (h_sbit) = new_sbit;
-
- /* When switching stack modes, update the registers. */
- if (old_sbit != new_sbit)
- {
- if (old_sbit)
- {
- /* Switching user -> system. */
- CPU (h_dr[H_DR_USP]) = CPU (h_gr[H_GR_SP]);
- CPU (h_gr[H_GR_SP]) = CPU (h_dr[H_DR_SSP]);
- }
- else
- {
- /* Switching system -> user. */
- CPU (h_dr[H_DR_SSP]) = CPU (h_gr[H_GR_SP]);
- CPU (h_gr[H_GR_SP]) = CPU (h_dr[H_DR_USP]);
- }
- }
-
- /* TODO: r15 interlock */
-}
-
-/* Cover fns to access the ccr bits. */
-
-UQI
-fr30bf_h_ccr_get_handler (SIM_CPU *current_cpu)
-{
- int ccr = ( (GET_H_CBIT () << 0)
- | (GET_H_VBIT () << 1)
- | (GET_H_ZBIT () << 2)
- | (GET_H_NBIT () << 3)
- | (GET_H_IBIT () << 4)
- | (GET_H_SBIT () << 5));
-
- return ccr;
-}
-
-void
-fr30bf_h_ccr_set_handler (SIM_CPU *current_cpu, UQI newval)
-{
- int ccr = newval & 0x3f;
-
- SET_H_CBIT ((ccr & 1) != 0);
- SET_H_VBIT ((ccr & 2) != 0);
- SET_H_ZBIT ((ccr & 4) != 0);
- SET_H_NBIT ((ccr & 8) != 0);
- SET_H_IBIT ((ccr & 0x10) != 0);
- SET_H_SBIT ((ccr & 0x20) != 0);
-}
-
-/* Cover fns to access the scr bits. */
-
-UQI
-fr30bf_h_scr_get_handler (SIM_CPU *current_cpu)
-{
- int scr = ( (GET_H_TBIT () << 0)
- | (GET_H_D0BIT () << 1)
- | (GET_H_D1BIT () << 2));
- return scr;
-}
-
-void
-fr30bf_h_scr_set_handler (SIM_CPU *current_cpu, UQI newval)
-{
- int scr = newval & 7;
-
- SET_H_TBIT ((scr & 1) != 0);
- SET_H_D0BIT ((scr & 2) != 0);
- SET_H_D1BIT ((scr & 4) != 0);
-}
-
-/* Cover fns to access the ilm bits. */
-
-UQI
-fr30bf_h_ilm_get_handler (SIM_CPU *current_cpu)
-{
- return CPU (h_ilm);
-}
-
-void
-fr30bf_h_ilm_set_handler (SIM_CPU *current_cpu, UQI newval)
-{
- int ilm = newval & 0x1f;
- int current_ilm = CPU (h_ilm);
-
- /* We can only set new ilm values < 16 if the current ilm is < 16. Otherwise
- we add 16 to the value we are given. */
- if (current_ilm >= 16 && ilm < 16)
- ilm += 16;
-
- CPU (h_ilm) = ilm;
-}
-
-/* Cover fns to access the ps register. */
-
-USI
-fr30bf_h_ps_get_handler (SIM_CPU *current_cpu)
-{
- int ccr = GET_H_CCR ();
- int scr = GET_H_SCR ();
- int ilm = GET_H_ILM ();
-
- return ccr | (scr << 8) | (ilm << 16);
-}
-
-void
-fr30bf_h_ps_set_handler (SIM_CPU *current_cpu, USI newval)
-{
- int ccr = newval & 0xff;
- int scr = (newval >> 8) & 7;
- int ilm = (newval >> 16) & 0x1f;
-
- SET_H_CCR (ccr);
- SET_H_SCR (scr);
- SET_H_ILM (ilm);
-}
-
-/* Cover fns to access the dedicated registers. */
-
-SI
-fr30bf_h_dr_get_handler (SIM_CPU *current_cpu, UINT dr)
-{
- switch (dr)
- {
- case H_DR_SSP :
- if (! GET_H_SBIT ())
- return GET_H_GR (H_GR_SP);
- else
- return CPU (h_dr[H_DR_SSP]);
- case H_DR_USP :
- if (GET_H_SBIT ())
- return GET_H_GR (H_GR_SP);
- else
- return CPU (h_dr[H_DR_USP]);
- case H_DR_TBR :
- case H_DR_RP :
- case H_DR_MDH :
- case H_DR_MDL :
- return CPU (h_dr[dr]);
- }
- return 0;
-}
-
-void
-fr30bf_h_dr_set_handler (SIM_CPU *current_cpu, UINT dr, SI newval)
-{
- switch (dr)
- {
- case H_DR_SSP :
- if (! GET_H_SBIT ())
- SET_H_GR (H_GR_SP, newval);
- else
- CPU (h_dr[H_DR_SSP]) = newval;
- break;
- case H_DR_USP :
- if (GET_H_SBIT ())
- SET_H_GR (H_GR_SP, newval);
- else
- CPU (h_dr[H_DR_USP]) = newval;
- break;
- case H_DR_TBR :
- case H_DR_RP :
- case H_DR_MDH :
- case H_DR_MDL :
- CPU (h_dr[dr]) = newval;
- break;
- }
-}
-
-#if WITH_PROFILE_MODEL_P
-
-/* FIXME: Some of these should be inline or macros. Later. */
-
-/* Initialize cycle counting for an insn.
- FIRST_P is non-zero if this is the first insn in a set of parallel
- insns. */
-
-void
-fr30bf_model_insn_before (SIM_CPU *cpu, int first_p)
-{
- MODEL_FR30_1_DATA *d = CPU_MODEL_DATA (cpu);
- d->load_regs_pending = 0;
-}
-
-/* Record the cycles computed for an insn.
- LAST_P is non-zero if this is the last insn in a set of parallel insns,
- and we update the total cycle count.
- CYCLES is the cycle count of the insn. */
-
-void
-fr30bf_model_insn_after (SIM_CPU *cpu, int last_p, int cycles)
-{
- PROFILE_DATA *p = CPU_PROFILE_DATA (cpu);
- MODEL_FR30_1_DATA *d = CPU_MODEL_DATA (cpu);
-
- PROFILE_MODEL_TOTAL_CYCLES (p) += cycles;
- PROFILE_MODEL_CUR_INSN_CYCLES (p) = cycles;
- d->load_regs = d->load_regs_pending;
-}
-
-static INLINE int
-check_load_stall (SIM_CPU *cpu, int regno)
-{
- const MODEL_FR30_1_DATA *d = CPU_MODEL_DATA (cpu);
- UINT load_regs = d->load_regs;
-
- if (regno != -1
- && (load_regs & (1 << regno)) != 0)
- {
- PROFILE_DATA *p = CPU_PROFILE_DATA (cpu);
- ++ PROFILE_MODEL_LOAD_STALL_CYCLES (p);
- if (TRACE_INSN_P (cpu))
- cgen_trace_printf (cpu, " ; Load stall.");
- return 1;
- }
- else
- return 0;
-}
-
-int
-fr30bf_model_fr30_1_u_exec (SIM_CPU *cpu, const IDESC *idesc,
- int unit_num, int referenced,
- INT in_Ri, INT in_Rj, INT out_Ri)
-{
- int cycles = idesc->timing->units[unit_num].done;
- cycles += check_load_stall (cpu, in_Ri);
- cycles += check_load_stall (cpu, in_Rj);
- return cycles;
-}
-
-int
-fr30bf_model_fr30_1_u_cti (SIM_CPU *cpu, const IDESC *idesc,
- int unit_num, int referenced,
- INT in_Ri)
-{
- PROFILE_DATA *p = CPU_PROFILE_DATA (cpu);
- /* (1 << 1): The pc is the 2nd element in inputs, outputs.
- ??? can be cleaned up */
- int taken_p = (referenced & (1 << 1)) != 0;
- int cycles = idesc->timing->units[unit_num].done;
- int delay_slot_p = CGEN_ATTR_VALUE (NULL, idesc->attrs, CGEN_INSN_DELAY_SLOT);
-
- cycles += check_load_stall (cpu, in_Ri);
- if (taken_p)
- {
- /* ??? Handling cti's without delay slots this way will run afoul of
- accurate system simulation. Later. */
- if (! delay_slot_p)
- {
- ++cycles;
- ++PROFILE_MODEL_CTI_STALL_CYCLES (p);
- }
- ++PROFILE_MODEL_TAKEN_COUNT (p);
- }
- else
- ++PROFILE_MODEL_UNTAKEN_COUNT (p);
-
- return cycles;
-}
-
-int
-fr30bf_model_fr30_1_u_load (SIM_CPU *cpu, const IDESC *idesc,
- int unit_num, int referenced,
- INT in_Rj, INT out_Ri)
-{
- MODEL_FR30_1_DATA *d = CPU_MODEL_DATA (cpu);
- int cycles = idesc->timing->units[unit_num].done;
- d->load_regs_pending |= 1 << out_Ri;
- cycles += check_load_stall (cpu, in_Rj);
- return cycles;
-}
-
-int
-fr30bf_model_fr30_1_u_store (SIM_CPU *cpu, const IDESC *idesc,
- int unit_num, int referenced,
- INT in_Ri, INT in_Rj)
-{
- int cycles = idesc->timing->units[unit_num].done;
- cycles += check_load_stall (cpu, in_Ri);
- cycles += check_load_stall (cpu, in_Rj);
- return cycles;
-}
-
-int
-fr30bf_model_fr30_1_u_ldm (SIM_CPU *cpu, const IDESC *idesc,
- int unit_num, int referenced,
- INT reglist)
-{
- return idesc->timing->units[unit_num].done;
-}
-
-int
-fr30bf_model_fr30_1_u_stm (SIM_CPU *cpu, const IDESC *idesc,
- int unit_num, int referenced,
- INT reglist)
-{
- return idesc->timing->units[unit_num].done;
-}
-
-#endif /* WITH_PROFILE_MODEL_P */
diff --git a/sim/fr30/mloop.in b/sim/fr30/mloop.in
deleted file mode 100644
index 1a82d8332b6..00000000000
--- a/sim/fr30/mloop.in
+++ /dev/null
@@ -1,236 +0,0 @@
-# Simulator main loop for fr30. -*- C -*-
-# Copyright (C) 1998, 1999 Free Software Foundation, Inc.
-# Contributed by Cygnus Solutions.
-#
-# This file is part of the GNU Simulators.
-#
-# This program is free software; you can redistribute it and/or modify
-# it under the terms of the GNU General Public License as published by
-# the Free Software Foundation; either version 2, or (at your option)
-# any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License along
-# with this program; if not, write to the Free Software Foundation, Inc.,
-# 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
-# Syntax:
-# /bin/sh mainloop.in command
-#
-# Command is one of:
-#
-# init
-# support
-# extract-{simple,scache,pbb}
-# {full,fast}-exec-{simple,scache,pbb}
-#
-# A target need only provide a "full" version of one of simple,scache,pbb.
-# If the target wants it can also provide a fast version of same.
-# It can't provide more than this, however for illustration's sake the FR30
-# port provides examples of all.
-
-# ??? After a few more ports are done, revisit.
-# Will eventually need to machine generate a lot of this.
-
-case "x$1" in
-
-xsupport)
-
-cat <<EOF
-
-static INLINE const IDESC *
-extract (SIM_CPU *current_cpu, PCADDR pc, CGEN_INSN_INT insn, ARGBUF *abuf,
- int fast_p)
-{
- const IDESC *id = @cpu@_decode (current_cpu, pc, insn, abuf);
- @cpu@_fill_argbuf (current_cpu, abuf, id, pc, fast_p);
- if (! fast_p)
- {
- int trace_p = PC_IN_TRACE_RANGE_P (current_cpu, pc);
- int profile_p = PC_IN_PROFILE_RANGE_P (current_cpu, pc);
- @cpu@_fill_argbuf_tp (current_cpu, abuf, trace_p, profile_p);
- }
- return id;
-}
-
-static INLINE SEM_PC
-execute (SIM_CPU *current_cpu, SCACHE *sc, int fast_p)
-{
- SEM_PC vpc;
-
- if (fast_p)
- {
-#if ! WITH_SEM_SWITCH_FAST
-#if WITH_SCACHE
- vpc = (*sc->argbuf.semantic.sem_fast) (current_cpu, sc);
-#else
- vpc = (*sc->argbuf.semantic.sem_fast) (current_cpu, &sc->argbuf);
-#endif
-#else
- abort ();
-#endif /* WITH_SEM_SWITCH_FAST */
- }
- else
- {
-#if ! WITH_SEM_SWITCH_FULL
- ARGBUF *abuf = &sc->argbuf;
- const IDESC *idesc = abuf->idesc;
-#if WITH_SCACHE_PBB
- int virtual_p = CGEN_ATTR_VALUE (NULL, idesc->attrs, CGEN_INSN_VIRTUAL);
-#else
- int virtual_p = 0;
-#endif
-
- if (! virtual_p)
- {
- /* FIXME: call x-before */
- if (ARGBUF_PROFILE_P (abuf))
- PROFILE_COUNT_INSN (current_cpu, abuf->addr, idesc->num);
- /* FIXME: Later make cover macros: PROFILE_INSN_{INIT,FINI}. */
- if (PROFILE_MODEL_P (current_cpu)
- && ARGBUF_PROFILE_P (abuf))
- @cpu@_model_insn_before (current_cpu, 1 /*first_p*/);
- TRACE_INSN_INIT (current_cpu, abuf, 1);
- TRACE_INSN (current_cpu, idesc->idata,
- (const struct argbuf *) abuf, abuf->addr);
- }
-#if WITH_SCACHE
- vpc = (*sc->argbuf.semantic.sem_full) (current_cpu, sc);
-#else
- vpc = (*sc->argbuf.semantic.sem_full) (current_cpu, abuf);
-#endif
- if (! virtual_p)
- {
- /* FIXME: call x-after */
- if (PROFILE_MODEL_P (current_cpu)
- && ARGBUF_PROFILE_P (abuf))
- {
- int cycles;
-
- cycles = (*idesc->timing->model_fn) (current_cpu, sc);
- @cpu@_model_insn_after (current_cpu, 1 /*last_p*/, cycles);
- }
- TRACE_INSN_FINI (current_cpu, abuf, 1);
- }
-#else
- abort ();
-#endif /* WITH_SEM_SWITCH_FULL */
- }
-
- return vpc;
-}
-
-EOF
-
-;;
-
-xinit)
-
-cat <<EOF
-/*xxxinit*/
-EOF
-
-;;
-
-xextract-simple | xextract-scache)
-
-# Inputs: current_cpu, vpc, sc, FAST_P
-# Outputs: sc filled in
-
-cat <<EOF
-{
- CGEN_INSN_INT insn = GETIMEMUHI (current_cpu, vpc);
- extract (current_cpu, vpc, insn, SEM_ARGBUF (sc), FAST_P);
-}
-EOF
-
-;;
-
-xextract-pbb)
-
-# Inputs: current_cpu, pc, sc, max_insns, FAST_P
-# Outputs: sc, pc
-# sc must be left pointing past the last created entry.
-# pc must be left pointing past the last created entry.
-# If the pbb is terminated by a cti insn, SET_CTI_VPC(sc) must be called
-# to record the vpc of the cti insn.
-# SET_INSN_COUNT(n) must be called to record number of real insns.
-
-cat <<EOF
-{
- const IDESC *idesc;
- int icount = 0;
-
- while (max_insns > 0)
- {
- UHI insn = GETIMEMUHI (current_cpu, pc);
- idesc = extract (current_cpu, pc, insn, &sc->argbuf, FAST_P);
- ++sc;
- --max_insns;
- ++icount;
- pc += idesc->length;
- if (IDESC_CTI_P (idesc))
- {
- SET_CTI_VPC (sc - 1);
-
- /* Delay slot? */
- /* ??? breakpoints in delay slots */
- if (CGEN_ATTR_VALUE (NULL, idesc->attrs, CGEN_INSN_DELAY_SLOT))
- {
- UHI insn = GETIMEMUHI (current_cpu, pc);
- idesc = extract (current_cpu, pc, insn, &sc->argbuf, FAST_P);
- if (CGEN_ATTR_VALUE (NULL, idesc->attrs, CGEN_INSN_NOT_IN_DELAY_SLOT))
- {
- /* malformed program */
- sim_io_eprintf (CPU_STATE (current_cpu),
- "malformed program, \`%s' insn in delay slot\n",
- CGEN_INSN_NAME (idesc->idata));
- }
- else
- {
- ++sc;
- --max_insns;
- ++icount;
- pc += idesc->length;
- }
- }
- break;
- }
- }
-
- Finish:
- SET_INSN_COUNT (icount);
-}
-EOF
-
-;;
-
-xfull-exec-* | xfast-exec-*)
-
-# Inputs: current_cpu, sc, FAST_P
-# Outputs: vpc
-# vpc contains the address of the next insn to execute
-
-cat <<EOF
-{
-#if (! FAST_P && WITH_SEM_SWITCH_FULL) || (FAST_P && WITH_SEM_SWITCH_FAST)
-#define DEFINE_SWITCH
-#include "sem-switch.c"
-#else
- vpc = execute (current_cpu, vpc, FAST_P);
-#endif
-}
-EOF
-
-;;
-
-*)
- echo "Invalid argument to mainloop.in: $1" >&2
- exit 1
- ;;
-
-esac
diff --git a/sim/fr30/model.c b/sim/fr30/model.c
deleted file mode 100644
index 611d40f1ae2..00000000000
--- a/sim/fr30/model.c
+++ /dev/null
@@ -1,4004 +0,0 @@
-/* Simulator model support for fr30bf.
-
-THIS FILE IS MACHINE GENERATED WITH CGEN.
-
-Copyright (C) 1996, 1997, 1998, 1999, 2000 Free Software Foundation, Inc.
-
-This file is part of the GNU Simulators.
-
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License along
-with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
-*/
-
-#define WANT_CPU fr30bf
-#define WANT_CPU_FR30BF
-
-#include "sim-main.h"
-
-/* The profiling data is recorded here, but is accessed via the profiling
- mechanism. After all, this is information for profiling. */
-
-#if WITH_PROFILE_MODEL_P
-
-/* Model handlers for each insn. */
-
-static int
-model_fr30_1_add (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- INT in_Rj = -1;
- INT out_Ri = -1;
- in_Ri = FLD (in_Ri);
- in_Rj = FLD (in_Rj);
- out_Ri = FLD (out_Ri);
- referenced |= 1 << 0;
- referenced |= 1 << 1;
- referenced |= 1 << 2;
- cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_addi (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_addi.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- INT in_Rj = -1;
- INT out_Ri = -1;
- in_Ri = FLD (in_Ri);
- out_Ri = FLD (out_Ri);
- referenced |= 1 << 0;
- referenced |= 1 << 2;
- cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_add2 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add2.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- INT in_Rj = -1;
- INT out_Ri = -1;
- in_Ri = FLD (in_Ri);
- out_Ri = FLD (out_Ri);
- referenced |= 1 << 0;
- referenced |= 1 << 2;
- cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_addc (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- INT in_Rj = -1;
- INT out_Ri = -1;
- in_Ri = FLD (in_Ri);
- in_Rj = FLD (in_Rj);
- out_Ri = FLD (out_Ri);
- referenced |= 1 << 0;
- referenced |= 1 << 1;
- referenced |= 1 << 2;
- cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_addn (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- INT in_Rj = -1;
- INT out_Ri = -1;
- in_Ri = FLD (in_Ri);
- in_Rj = FLD (in_Rj);
- out_Ri = FLD (out_Ri);
- referenced |= 1 << 0;
- referenced |= 1 << 1;
- referenced |= 1 << 2;
- cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_addni (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_addi.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- INT in_Rj = -1;
- INT out_Ri = -1;
- in_Ri = FLD (in_Ri);
- out_Ri = FLD (out_Ri);
- referenced |= 1 << 0;
- referenced |= 1 << 2;
- cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_addn2 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add2.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- INT in_Rj = -1;
- INT out_Ri = -1;
- in_Ri = FLD (in_Ri);
- out_Ri = FLD (out_Ri);
- referenced |= 1 << 0;
- referenced |= 1 << 2;
- cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_sub (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- INT in_Rj = -1;
- INT out_Ri = -1;
- in_Ri = FLD (in_Ri);
- in_Rj = FLD (in_Rj);
- out_Ri = FLD (out_Ri);
- referenced |= 1 << 0;
- referenced |= 1 << 1;
- referenced |= 1 << 2;
- cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_subc (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- INT in_Rj = -1;
- INT out_Ri = -1;
- in_Ri = FLD (in_Ri);
- in_Rj = FLD (in_Rj);
- out_Ri = FLD (out_Ri);
- referenced |= 1 << 0;
- referenced |= 1 << 1;
- referenced |= 1 << 2;
- cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_subn (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- INT in_Rj = -1;
- INT out_Ri = -1;
- in_Ri = FLD (in_Ri);
- in_Rj = FLD (in_Rj);
- out_Ri = FLD (out_Ri);
- referenced |= 1 << 0;
- referenced |= 1 << 1;
- referenced |= 1 << 2;
- cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_cmp (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_str13.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- INT in_Rj = -1;
- INT out_Ri = -1;
- in_Ri = FLD (in_Ri);
- in_Rj = FLD (in_Rj);
- referenced |= 1 << 0;
- referenced |= 1 << 1;
- cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_cmpi (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_addi.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- INT in_Rj = -1;
- INT out_Ri = -1;
- in_Ri = FLD (in_Ri);
- referenced |= 1 << 0;
- cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_cmp2 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add2.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- INT in_Rj = -1;
- INT out_Ri = -1;
- in_Ri = FLD (in_Ri);
- referenced |= 1 << 0;
- cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_and (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- INT in_Rj = -1;
- INT out_Ri = -1;
- in_Ri = FLD (in_Ri);
- in_Rj = FLD (in_Rj);
- out_Ri = FLD (out_Ri);
- referenced |= 1 << 0;
- referenced |= 1 << 1;
- referenced |= 1 << 2;
- cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_or (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- INT in_Rj = -1;
- INT out_Ri = -1;
- in_Ri = FLD (in_Ri);
- in_Rj = FLD (in_Rj);
- out_Ri = FLD (out_Ri);
- referenced |= 1 << 0;
- referenced |= 1 << 1;
- referenced |= 1 << 2;
- cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_eor (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- INT in_Rj = -1;
- INT out_Ri = -1;
- in_Ri = FLD (in_Ri);
- in_Rj = FLD (in_Rj);
- out_Ri = FLD (out_Ri);
- referenced |= 1 << 0;
- referenced |= 1 << 1;
- referenced |= 1 << 2;
- cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_andm (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_str13.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- INT in_Rj = -1;
- INT out_Ri = -1;
- in_Ri = FLD (in_Ri);
- in_Rj = FLD (in_Rj);
- referenced |= 1 << 0;
- referenced |= 1 << 1;
- cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
- }
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Rj = -1;
- INT out_Ri = -1;
- in_Rj = FLD (in_Rj);
- referenced |= 1 << 0;
- cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 1, referenced, in_Rj, out_Ri);
- }
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- INT in_Rj = -1;
- in_Ri = FLD (in_Ri);
- in_Rj = FLD (in_Rj);
- referenced |= 1 << 0;
- referenced |= 1 << 1;
- cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 2, referenced, in_Ri, in_Rj);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_andh (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_str13.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- INT in_Rj = -1;
- INT out_Ri = -1;
- in_Ri = FLD (in_Ri);
- in_Rj = FLD (in_Rj);
- referenced |= 1 << 0;
- referenced |= 1 << 1;
- cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
- }
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Rj = -1;
- INT out_Ri = -1;
- in_Rj = FLD (in_Rj);
- referenced |= 1 << 0;
- cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 1, referenced, in_Rj, out_Ri);
- }
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- INT in_Rj = -1;
- in_Ri = FLD (in_Ri);
- in_Rj = FLD (in_Rj);
- referenced |= 1 << 0;
- referenced |= 1 << 1;
- cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 2, referenced, in_Ri, in_Rj);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_andb (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_str13.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- INT in_Rj = -1;
- INT out_Ri = -1;
- in_Ri = FLD (in_Ri);
- in_Rj = FLD (in_Rj);
- referenced |= 1 << 0;
- referenced |= 1 << 1;
- cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
- }
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Rj = -1;
- INT out_Ri = -1;
- in_Rj = FLD (in_Rj);
- referenced |= 1 << 0;
- cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 1, referenced, in_Rj, out_Ri);
- }
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- INT in_Rj = -1;
- in_Ri = FLD (in_Ri);
- in_Rj = FLD (in_Rj);
- referenced |= 1 << 0;
- referenced |= 1 << 1;
- cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 2, referenced, in_Ri, in_Rj);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_orm (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_str13.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- INT in_Rj = -1;
- INT out_Ri = -1;
- in_Ri = FLD (in_Ri);
- in_Rj = FLD (in_Rj);
- referenced |= 1 << 0;
- referenced |= 1 << 1;
- cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
- }
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Rj = -1;
- INT out_Ri = -1;
- in_Rj = FLD (in_Rj);
- referenced |= 1 << 0;
- cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 1, referenced, in_Rj, out_Ri);
- }
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- INT in_Rj = -1;
- in_Ri = FLD (in_Ri);
- in_Rj = FLD (in_Rj);
- referenced |= 1 << 0;
- referenced |= 1 << 1;
- cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 2, referenced, in_Ri, in_Rj);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_orh (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_str13.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- INT in_Rj = -1;
- INT out_Ri = -1;
- in_Ri = FLD (in_Ri);
- in_Rj = FLD (in_Rj);
- referenced |= 1 << 0;
- referenced |= 1 << 1;
- cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
- }
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Rj = -1;
- INT out_Ri = -1;
- in_Rj = FLD (in_Rj);
- referenced |= 1 << 0;
- cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 1, referenced, in_Rj, out_Ri);
- }
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- INT in_Rj = -1;
- in_Ri = FLD (in_Ri);
- in_Rj = FLD (in_Rj);
- referenced |= 1 << 0;
- referenced |= 1 << 1;
- cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 2, referenced, in_Ri, in_Rj);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_orb (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_str13.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- INT in_Rj = -1;
- INT out_Ri = -1;
- in_Ri = FLD (in_Ri);
- in_Rj = FLD (in_Rj);
- referenced |= 1 << 0;
- referenced |= 1 << 1;
- cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
- }
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Rj = -1;
- INT out_Ri = -1;
- in_Rj = FLD (in_Rj);
- referenced |= 1 << 0;
- cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 1, referenced, in_Rj, out_Ri);
- }
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- INT in_Rj = -1;
- in_Ri = FLD (in_Ri);
- in_Rj = FLD (in_Rj);
- referenced |= 1 << 0;
- referenced |= 1 << 1;
- cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 2, referenced, in_Ri, in_Rj);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_eorm (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_str13.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- INT in_Rj = -1;
- INT out_Ri = -1;
- in_Ri = FLD (in_Ri);
- in_Rj = FLD (in_Rj);
- referenced |= 1 << 0;
- referenced |= 1 << 1;
- cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
- }
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Rj = -1;
- INT out_Ri = -1;
- in_Rj = FLD (in_Rj);
- referenced |= 1 << 0;
- cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 1, referenced, in_Rj, out_Ri);
- }
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- INT in_Rj = -1;
- in_Ri = FLD (in_Ri);
- in_Rj = FLD (in_Rj);
- referenced |= 1 << 0;
- referenced |= 1 << 1;
- cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 2, referenced, in_Ri, in_Rj);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_eorh (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_str13.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- INT in_Rj = -1;
- INT out_Ri = -1;
- in_Ri = FLD (in_Ri);
- in_Rj = FLD (in_Rj);
- referenced |= 1 << 0;
- referenced |= 1 << 1;
- cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
- }
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Rj = -1;
- INT out_Ri = -1;
- in_Rj = FLD (in_Rj);
- referenced |= 1 << 0;
- cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 1, referenced, in_Rj, out_Ri);
- }
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- INT in_Rj = -1;
- in_Ri = FLD (in_Ri);
- in_Rj = FLD (in_Rj);
- referenced |= 1 << 0;
- referenced |= 1 << 1;
- cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 2, referenced, in_Ri, in_Rj);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_eorb (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_str13.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- INT in_Rj = -1;
- INT out_Ri = -1;
- in_Ri = FLD (in_Ri);
- in_Rj = FLD (in_Rj);
- referenced |= 1 << 0;
- referenced |= 1 << 1;
- cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
- }
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Rj = -1;
- INT out_Ri = -1;
- in_Rj = FLD (in_Rj);
- referenced |= 1 << 0;
- cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 1, referenced, in_Rj, out_Ri);
- }
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- INT in_Rj = -1;
- in_Ri = FLD (in_Ri);
- in_Rj = FLD (in_Rj);
- referenced |= 1 << 0;
- referenced |= 1 << 1;
- cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 2, referenced, in_Ri, in_Rj);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_bandl (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_addi.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- INT in_Rj = -1;
- INT out_Ri = -1;
- in_Ri = FLD (in_Ri);
- referenced |= 1 << 0;
- cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
- }
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Rj = -1;
- INT out_Ri = -1;
- cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 1, referenced, in_Rj, out_Ri);
- }
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- INT in_Rj = -1;
- in_Ri = FLD (in_Ri);
- referenced |= 1 << 0;
- cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 2, referenced, in_Ri, in_Rj);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_borl (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_addi.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- INT in_Rj = -1;
- INT out_Ri = -1;
- in_Ri = FLD (in_Ri);
- referenced |= 1 << 0;
- cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
- }
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Rj = -1;
- INT out_Ri = -1;
- cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 1, referenced, in_Rj, out_Ri);
- }
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- INT in_Rj = -1;
- in_Ri = FLD (in_Ri);
- referenced |= 1 << 0;
- cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 2, referenced, in_Ri, in_Rj);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_beorl (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_addi.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- INT in_Rj = -1;
- INT out_Ri = -1;
- in_Ri = FLD (in_Ri);
- referenced |= 1 << 0;
- cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
- }
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Rj = -1;
- INT out_Ri = -1;
- cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 1, referenced, in_Rj, out_Ri);
- }
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- INT in_Rj = -1;
- in_Ri = FLD (in_Ri);
- referenced |= 1 << 0;
- cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 2, referenced, in_Ri, in_Rj);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_bandh (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_addi.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- INT in_Rj = -1;
- INT out_Ri = -1;
- in_Ri = FLD (in_Ri);
- referenced |= 1 << 0;
- cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
- }
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Rj = -1;
- INT out_Ri = -1;
- cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 1, referenced, in_Rj, out_Ri);
- }
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- INT in_Rj = -1;
- in_Ri = FLD (in_Ri);
- referenced |= 1 << 0;
- cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 2, referenced, in_Ri, in_Rj);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_borh (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_addi.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- INT in_Rj = -1;
- INT out_Ri = -1;
- in_Ri = FLD (in_Ri);
- referenced |= 1 << 0;
- cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
- }
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Rj = -1;
- INT out_Ri = -1;
- cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 1, referenced, in_Rj, out_Ri);
- }
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- INT in_Rj = -1;
- in_Ri = FLD (in_Ri);
- referenced |= 1 << 0;
- cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 2, referenced, in_Ri, in_Rj);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_beorh (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_addi.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- INT in_Rj = -1;
- INT out_Ri = -1;
- in_Ri = FLD (in_Ri);
- referenced |= 1 << 0;
- cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
- }
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Rj = -1;
- INT out_Ri = -1;
- cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 1, referenced, in_Rj, out_Ri);
- }
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- INT in_Rj = -1;
- in_Ri = FLD (in_Ri);
- referenced |= 1 << 0;
- cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 2, referenced, in_Ri, in_Rj);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_btstl (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_addi.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Rj = -1;
- INT out_Ri = -1;
- cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 0, referenced, in_Rj, out_Ri);
- }
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- INT in_Rj = -1;
- INT out_Ri = -1;
- in_Ri = FLD (in_Ri);
- referenced |= 1 << 0;
- cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 1, referenced, in_Ri, in_Rj, out_Ri);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_btsth (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_addi.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Rj = -1;
- INT out_Ri = -1;
- cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 0, referenced, in_Rj, out_Ri);
- }
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- INT in_Rj = -1;
- INT out_Ri = -1;
- in_Ri = FLD (in_Ri);
- referenced |= 1 << 0;
- cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 1, referenced, in_Ri, in_Rj, out_Ri);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_mul (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_str13.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- INT in_Rj = -1;
- INT out_Ri = -1;
- in_Ri = FLD (in_Ri);
- in_Rj = FLD (in_Rj);
- referenced |= 1 << 0;
- referenced |= 1 << 1;
- cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_mulu (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_str13.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- INT in_Rj = -1;
- INT out_Ri = -1;
- in_Ri = FLD (in_Ri);
- in_Rj = FLD (in_Rj);
- referenced |= 1 << 0;
- referenced |= 1 << 1;
- cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_mulh (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_str13.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- INT in_Rj = -1;
- INT out_Ri = -1;
- in_Ri = FLD (in_Ri);
- in_Rj = FLD (in_Rj);
- referenced |= 1 << 0;
- referenced |= 1 << 1;
- cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_muluh (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_str13.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- INT in_Rj = -1;
- INT out_Ri = -1;
- in_Ri = FLD (in_Ri);
- in_Rj = FLD (in_Rj);
- referenced |= 1 << 0;
- referenced |= 1 << 1;
- cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_div0s (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_mov2dr.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- INT in_Rj = -1;
- INT out_Ri = -1;
- in_Ri = FLD (in_Ri);
- referenced |= 1 << 0;
- cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_div0u (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.fmt_empty.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- INT in_Rj = -1;
- INT out_Ri = -1;
- cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_div1 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_mov2dr.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- INT in_Rj = -1;
- INT out_Ri = -1;
- in_Ri = FLD (in_Ri);
- if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
- cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_div2 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_mov2dr.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- INT in_Rj = -1;
- INT out_Ri = -1;
- in_Ri = FLD (in_Ri);
- if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
- cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_div3 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.fmt_empty.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- INT in_Rj = -1;
- INT out_Ri = -1;
- cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_div4s (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.fmt_empty.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- INT in_Rj = -1;
- INT out_Ri = -1;
- cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_lsl (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- INT in_Rj = -1;
- INT out_Ri = -1;
- in_Ri = FLD (in_Ri);
- in_Rj = FLD (in_Rj);
- out_Ri = FLD (out_Ri);
- if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
- referenced |= 1 << 1;
- if (insn_referenced & (1 << 2)) referenced |= 1 << 2;
- cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_lsli (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_addi.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- INT in_Rj = -1;
- INT out_Ri = -1;
- in_Ri = FLD (in_Ri);
- out_Ri = FLD (out_Ri);
- if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
- if (insn_referenced & (1 << 2)) referenced |= 1 << 2;
- cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_lsl2 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_addi.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- INT in_Rj = -1;
- INT out_Ri = -1;
- in_Ri = FLD (in_Ri);
- out_Ri = FLD (out_Ri);
- if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
- if (insn_referenced & (1 << 2)) referenced |= 1 << 2;
- cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_lsr (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- INT in_Rj = -1;
- INT out_Ri = -1;
- in_Ri = FLD (in_Ri);
- in_Rj = FLD (in_Rj);
- out_Ri = FLD (out_Ri);
- if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
- referenced |= 1 << 1;
- if (insn_referenced & (1 << 2)) referenced |= 1 << 2;
- cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_lsri (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_addi.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- INT in_Rj = -1;
- INT out_Ri = -1;
- in_Ri = FLD (in_Ri);
- out_Ri = FLD (out_Ri);
- if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
- if (insn_referenced & (1 << 2)) referenced |= 1 << 2;
- cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_lsr2 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_addi.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- INT in_Rj = -1;
- INT out_Ri = -1;
- in_Ri = FLD (in_Ri);
- out_Ri = FLD (out_Ri);
- if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
- if (insn_referenced & (1 << 2)) referenced |= 1 << 2;
- cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_asr (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- INT in_Rj = -1;
- INT out_Ri = -1;
- in_Ri = FLD (in_Ri);
- in_Rj = FLD (in_Rj);
- out_Ri = FLD (out_Ri);
- if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
- referenced |= 1 << 1;
- if (insn_referenced & (1 << 2)) referenced |= 1 << 2;
- cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_asri (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_addi.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- INT in_Rj = -1;
- INT out_Ri = -1;
- in_Ri = FLD (in_Ri);
- out_Ri = FLD (out_Ri);
- if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
- if (insn_referenced & (1 << 2)) referenced |= 1 << 2;
- cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_asr2 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_addi.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- INT in_Rj = -1;
- INT out_Ri = -1;
- in_Ri = FLD (in_Ri);
- out_Ri = FLD (out_Ri);
- if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
- if (insn_referenced & (1 << 2)) referenced |= 1 << 2;
- cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_ldi8 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldi8.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- INT in_Rj = -1;
- INT out_Ri = -1;
- out_Ri = FLD (out_Ri);
- referenced |= 1 << 2;
- cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_ldi20 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldi20.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- INT in_Rj = -1;
- INT out_Ri = -1;
- out_Ri = FLD (out_Ri);
- referenced |= 1 << 2;
- cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_ldi32 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldi32.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- INT in_Rj = -1;
- INT out_Ri = -1;
- out_Ri = FLD (out_Ri);
- referenced |= 1 << 2;
- cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_ld (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldr13.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Rj = -1;
- INT out_Ri = -1;
- in_Rj = FLD (in_Rj);
- out_Ri = FLD (out_Ri);
- referenced |= 1 << 0;
- referenced |= 1 << 1;
- cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 0, referenced, in_Rj, out_Ri);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_lduh (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldr13.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Rj = -1;
- INT out_Ri = -1;
- in_Rj = FLD (in_Rj);
- out_Ri = FLD (out_Ri);
- referenced |= 1 << 0;
- referenced |= 1 << 1;
- cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 0, referenced, in_Rj, out_Ri);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_ldub (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldr13.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Rj = -1;
- INT out_Ri = -1;
- in_Rj = FLD (in_Rj);
- out_Ri = FLD (out_Ri);
- referenced |= 1 << 0;
- referenced |= 1 << 1;
- cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 0, referenced, in_Rj, out_Ri);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_ldr13 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldr13.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Rj = -1;
- INT out_Ri = -1;
- in_Rj = FLD (in_Rj);
- out_Ri = FLD (out_Ri);
- referenced |= 1 << 0;
- referenced |= 1 << 1;
- cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 0, referenced, in_Rj, out_Ri);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_ldr13uh (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldr13.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Rj = -1;
- INT out_Ri = -1;
- in_Rj = FLD (in_Rj);
- out_Ri = FLD (out_Ri);
- referenced |= 1 << 0;
- referenced |= 1 << 1;
- cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 0, referenced, in_Rj, out_Ri);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_ldr13ub (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldr13.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Rj = -1;
- INT out_Ri = -1;
- in_Rj = FLD (in_Rj);
- out_Ri = FLD (out_Ri);
- referenced |= 1 << 0;
- referenced |= 1 << 1;
- cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 0, referenced, in_Rj, out_Ri);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_ldr14 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldr14.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Rj = -1;
- INT out_Ri = -1;
- out_Ri = FLD (out_Ri);
- referenced |= 1 << 1;
- cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 0, referenced, in_Rj, out_Ri);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_ldr14uh (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldr14uh.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Rj = -1;
- INT out_Ri = -1;
- out_Ri = FLD (out_Ri);
- referenced |= 1 << 1;
- cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 0, referenced, in_Rj, out_Ri);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_ldr14ub (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldr14ub.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Rj = -1;
- INT out_Ri = -1;
- out_Ri = FLD (out_Ri);
- referenced |= 1 << 1;
- cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 0, referenced, in_Rj, out_Ri);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_ldr15 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldr15.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Rj = -1;
- INT out_Ri = -1;
- out_Ri = FLD (out_Ri);
- referenced |= 1 << 1;
- cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 0, referenced, in_Rj, out_Ri);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_ldr15gr (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldr15gr.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Rj = -1;
- INT out_Ri = -1;
- out_Ri = FLD (out_Ri);
- referenced |= 1 << 1;
- cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 0, referenced, in_Rj, out_Ri);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_ldr15dr (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldr15dr.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Rj = -1;
- INT out_Ri = -1;
- cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 0, referenced, in_Rj, out_Ri);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_ldr15ps (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_addsp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Rj = -1;
- INT out_Ri = -1;
- cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 0, referenced, in_Rj, out_Ri);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_st (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_str13.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- INT in_Rj = -1;
- in_Ri = FLD (in_Ri);
- in_Rj = FLD (in_Rj);
- referenced |= 1 << 0;
- referenced |= 1 << 1;
- cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 0, referenced, in_Ri, in_Rj);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_sth (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_str13.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- INT in_Rj = -1;
- in_Ri = FLD (in_Ri);
- in_Rj = FLD (in_Rj);
- referenced |= 1 << 0;
- referenced |= 1 << 1;
- cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 0, referenced, in_Ri, in_Rj);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_stb (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_str13.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- INT in_Rj = -1;
- in_Ri = FLD (in_Ri);
- in_Rj = FLD (in_Rj);
- referenced |= 1 << 0;
- referenced |= 1 << 1;
- cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 0, referenced, in_Ri, in_Rj);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_str13 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_str13.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- INT in_Rj = -1;
- in_Ri = FLD (in_Ri);
- in_Rj = FLD (in_Rj);
- referenced |= 1 << 0;
- referenced |= 1 << 1;
- cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 0, referenced, in_Ri, in_Rj);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_str13h (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_str13.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- INT in_Rj = -1;
- in_Ri = FLD (in_Ri);
- in_Rj = FLD (in_Rj);
- referenced |= 1 << 0;
- referenced |= 1 << 1;
- cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 0, referenced, in_Ri, in_Rj);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_str13b (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_str13.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- INT in_Rj = -1;
- in_Ri = FLD (in_Ri);
- in_Rj = FLD (in_Rj);
- referenced |= 1 << 0;
- referenced |= 1 << 1;
- cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 0, referenced, in_Ri, in_Rj);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_str14 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_str14.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- INT in_Rj = -1;
- in_Ri = FLD (in_Ri);
- referenced |= 1 << 0;
- cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 0, referenced, in_Ri, in_Rj);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_str14h (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_str14h.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- INT in_Rj = -1;
- in_Ri = FLD (in_Ri);
- referenced |= 1 << 0;
- cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 0, referenced, in_Ri, in_Rj);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_str14b (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_str14b.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- INT in_Rj = -1;
- in_Ri = FLD (in_Ri);
- referenced |= 1 << 0;
- cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 0, referenced, in_Ri, in_Rj);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_str15 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_str15.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- INT in_Rj = -1;
- in_Ri = FLD (in_Ri);
- referenced |= 1 << 0;
- cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 0, referenced, in_Ri, in_Rj);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_str15gr (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_str15gr.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- INT in_Rj = -1;
- in_Ri = FLD (in_Ri);
- referenced |= 1 << 0;
- cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 0, referenced, in_Ri, in_Rj);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_str15dr (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldr15dr.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- INT in_Rj = -1;
- cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 0, referenced, in_Ri, in_Rj);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_str15ps (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_addsp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- INT in_Rj = -1;
- cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 0, referenced, in_Ri, in_Rj);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_mov (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldr13.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- INT in_Rj = -1;
- INT out_Ri = -1;
- in_Rj = FLD (in_Rj);
- out_Ri = FLD (out_Ri);
- referenced |= 1 << 1;
- referenced |= 1 << 2;
- cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_movdr (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_movdr.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- INT in_Rj = -1;
- INT out_Ri = -1;
- out_Ri = FLD (out_Ri);
- referenced |= 1 << 2;
- cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_movps (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_movdr.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- INT in_Rj = -1;
- INT out_Ri = -1;
- out_Ri = FLD (out_Ri);
- referenced |= 1 << 2;
- cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_mov2dr (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_mov2dr.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- INT in_Rj = -1;
- INT out_Ri = -1;
- in_Ri = FLD (in_Ri);
- referenced |= 1 << 0;
- cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_mov2ps (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_mov2dr.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- INT in_Rj = -1;
- INT out_Ri = -1;
- in_Ri = FLD (in_Ri);
- referenced |= 1 << 0;
- cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_jmp (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_mov2dr.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- in_Ri = FLD (in_Ri);
- referenced |= 1 << 0;
- referenced |= 1 << 1;
- cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_jmpd (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_mov2dr.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- in_Ri = FLD (in_Ri);
- referenced |= 1 << 0;
- referenced |= 1 << 1;
- cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_callr (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_mov2dr.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- in_Ri = FLD (in_Ri);
- referenced |= 1 << 0;
- referenced |= 1 << 1;
- cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_callrd (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_mov2dr.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- in_Ri = FLD (in_Ri);
- referenced |= 1 << 0;
- referenced |= 1 << 1;
- cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_call (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_call.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- referenced |= 1 << 1;
- cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_calld (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_call.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- referenced |= 1 << 1;
- cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_ret (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.fmt_empty.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- referenced |= 1 << 1;
- cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_ret_d (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.fmt_empty.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- referenced |= 1 << 1;
- cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_int (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_int.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- INT in_Rj = -1;
- INT out_Ri = -1;
- cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_inte (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.fmt_empty.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- INT in_Rj = -1;
- INT out_Ri = -1;
- cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_reti (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.fmt_empty.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- INT in_Rj = -1;
- INT out_Ri = -1;
- cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_brad (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_brad.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- referenced |= 1 << 1;
- cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_bra (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_brad.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- referenced |= 1 << 1;
- cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_bnod (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.fmt_empty.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_bno (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.fmt_empty.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_beqd (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_brad.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
- cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_beq (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_brad.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
- cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_bned (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_brad.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
- cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_bne (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_brad.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
- cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_bcd (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_brad.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
- cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_bc (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_brad.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
- cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_bncd (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_brad.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
- cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_bnc (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_brad.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
- cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_bnd (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_brad.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
- cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_bn (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_brad.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
- cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_bpd (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_brad.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
- cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_bp (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_brad.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
- cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_bvd (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_brad.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
- cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_bv (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_brad.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
- cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_bnvd (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_brad.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
- cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_bnv (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_brad.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
- cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_bltd (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_brad.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- if (insn_referenced & (1 << 3)) referenced |= 1 << 1;
- cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_blt (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_brad.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- if (insn_referenced & (1 << 3)) referenced |= 1 << 1;
- cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_bged (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_brad.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- if (insn_referenced & (1 << 3)) referenced |= 1 << 1;
- cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_bge (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_brad.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- if (insn_referenced & (1 << 3)) referenced |= 1 << 1;
- cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_bled (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_brad.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- if (insn_referenced & (1 << 4)) referenced |= 1 << 1;
- cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_ble (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_brad.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- if (insn_referenced & (1 << 4)) referenced |= 1 << 1;
- cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_bgtd (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_brad.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- if (insn_referenced & (1 << 4)) referenced |= 1 << 1;
- cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_bgt (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_brad.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- if (insn_referenced & (1 << 4)) referenced |= 1 << 1;
- cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_blsd (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_brad.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- if (insn_referenced & (1 << 3)) referenced |= 1 << 1;
- cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_bls (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_brad.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- if (insn_referenced & (1 << 3)) referenced |= 1 << 1;
- cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_bhid (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_brad.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- if (insn_referenced & (1 << 3)) referenced |= 1 << 1;
- cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_bhi (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_brad.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- if (insn_referenced & (1 << 3)) referenced |= 1 << 1;
- cycles += fr30bf_model_fr30_1_u_cti (current_cpu, idesc, 0, referenced, in_Ri);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_dmovr13 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_dmovr13pi.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- INT in_Rj = -1;
- cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 0, referenced, in_Ri, in_Rj);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_dmovr13h (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_dmovr13pih.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- INT in_Rj = -1;
- cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 0, referenced, in_Ri, in_Rj);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_dmovr13b (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_dmovr13pib.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- INT in_Rj = -1;
- cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 0, referenced, in_Ri, in_Rj);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_dmovr13pi (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_dmovr13pi.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Rj = -1;
- INT out_Ri = -1;
- cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 0, referenced, in_Rj, out_Ri);
- }
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- INT in_Rj = -1;
- cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 1, referenced, in_Ri, in_Rj);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_dmovr13pih (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_dmovr13pih.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Rj = -1;
- INT out_Ri = -1;
- cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 0, referenced, in_Rj, out_Ri);
- }
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- INT in_Rj = -1;
- cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 1, referenced, in_Ri, in_Rj);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_dmovr13pib (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_dmovr13pib.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Rj = -1;
- INT out_Ri = -1;
- cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 0, referenced, in_Rj, out_Ri);
- }
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- INT in_Rj = -1;
- cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 1, referenced, in_Ri, in_Rj);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_dmovr15pi (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_dmovr15pi.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Rj = -1;
- INT out_Ri = -1;
- cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 0, referenced, in_Rj, out_Ri);
- }
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- INT in_Rj = -1;
- cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 1, referenced, in_Ri, in_Rj);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_dmov2r13 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_dmovr13pi.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Rj = -1;
- INT out_Ri = -1;
- cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 0, referenced, in_Rj, out_Ri);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_dmov2r13h (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_dmovr13pih.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Rj = -1;
- INT out_Ri = -1;
- cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 0, referenced, in_Rj, out_Ri);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_dmov2r13b (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_dmovr13pib.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Rj = -1;
- INT out_Ri = -1;
- cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 0, referenced, in_Rj, out_Ri);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_dmov2r13pi (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_dmovr13pi.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Rj = -1;
- INT out_Ri = -1;
- cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 0, referenced, in_Rj, out_Ri);
- }
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- INT in_Rj = -1;
- cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 1, referenced, in_Ri, in_Rj);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_dmov2r13pih (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_dmovr13pih.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Rj = -1;
- INT out_Ri = -1;
- cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 0, referenced, in_Rj, out_Ri);
- }
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- INT in_Rj = -1;
- cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 1, referenced, in_Ri, in_Rj);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_dmov2r13pib (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_dmovr13pib.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Rj = -1;
- INT out_Ri = -1;
- cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 0, referenced, in_Rj, out_Ri);
- }
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- INT in_Rj = -1;
- cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 1, referenced, in_Ri, in_Rj);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_dmov2r15pd (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_dmovr15pi.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Rj = -1;
- INT out_Ri = -1;
- cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 0, referenced, in_Rj, out_Ri);
- }
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- INT in_Rj = -1;
- cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 1, referenced, in_Ri, in_Rj);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_ldres (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add2.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- INT in_Rj = -1;
- INT out_Ri = -1;
- in_Ri = FLD (in_Ri);
- out_Ri = FLD (out_Ri);
- referenced |= 1 << 0;
- referenced |= 1 << 2;
- cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_stres (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add2.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- INT in_Rj = -1;
- INT out_Ri = -1;
- in_Ri = FLD (in_Ri);
- out_Ri = FLD (out_Ri);
- referenced |= 1 << 0;
- referenced |= 1 << 2;
- cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_copop (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.fmt_empty.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- INT in_Rj = -1;
- INT out_Ri = -1;
- cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_copld (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.fmt_empty.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- INT in_Rj = -1;
- INT out_Ri = -1;
- cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_copst (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.fmt_empty.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- INT in_Rj = -1;
- INT out_Ri = -1;
- cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_copsv (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.fmt_empty.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- INT in_Rj = -1;
- INT out_Ri = -1;
- cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_nop (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.fmt_empty.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- INT in_Rj = -1;
- INT out_Ri = -1;
- cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_andccr (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_int.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- INT in_Rj = -1;
- INT out_Ri = -1;
- cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_orccr (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_int.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- INT in_Rj = -1;
- INT out_Ri = -1;
- cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_stilm (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_int.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- INT in_Rj = -1;
- INT out_Ri = -1;
- cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_addsp (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_addsp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- INT in_Rj = -1;
- INT out_Ri = -1;
- cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_extsb (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add2.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- INT in_Rj = -1;
- INT out_Ri = -1;
- in_Ri = FLD (in_Ri);
- out_Ri = FLD (out_Ri);
- referenced |= 1 << 0;
- referenced |= 1 << 2;
- cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_extub (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add2.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- INT in_Rj = -1;
- INT out_Ri = -1;
- in_Ri = FLD (in_Ri);
- out_Ri = FLD (out_Ri);
- referenced |= 1 << 0;
- referenced |= 1 << 2;
- cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_extsh (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add2.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- INT in_Rj = -1;
- INT out_Ri = -1;
- in_Ri = FLD (in_Ri);
- out_Ri = FLD (out_Ri);
- referenced |= 1 << 0;
- referenced |= 1 << 2;
- cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_extuh (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add2.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- INT in_Rj = -1;
- INT out_Ri = -1;
- in_Ri = FLD (in_Ri);
- out_Ri = FLD (out_Ri);
- referenced |= 1 << 0;
- referenced |= 1 << 2;
- cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_ldm0 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldm0.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_reglist = 0;
- cycles += fr30bf_model_fr30_1_u_ldm (current_cpu, idesc, 0, referenced, in_reglist);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_ldm1 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldm1.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_reglist = 0;
- cycles += fr30bf_model_fr30_1_u_ldm (current_cpu, idesc, 0, referenced, in_reglist);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_stm0 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stm0.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_reglist = 0;
- cycles += fr30bf_model_fr30_1_u_stm (current_cpu, idesc, 0, referenced, in_reglist);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_stm1 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stm1.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_reglist = 0;
- cycles += fr30bf_model_fr30_1_u_stm (current_cpu, idesc, 0, referenced, in_reglist);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_enter (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_enter.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- INT in_Rj = -1;
- INT out_Ri = -1;
- cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_leave (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_enter.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- INT in_Rj = -1;
- INT out_Ri = -1;
- cycles += fr30bf_model_fr30_1_u_exec (current_cpu, idesc, 0, referenced, in_Ri, in_Rj, out_Ri);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_fr30_1_xchb (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Rj = -1;
- INT out_Ri = -1;
- in_Rj = FLD (in_Rj);
- out_Ri = FLD (out_Ri);
- referenced |= 1 << 0;
- referenced |= 1 << 1;
- cycles += fr30bf_model_fr30_1_u_load (current_cpu, idesc, 0, referenced, in_Rj, out_Ri);
- }
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_Ri = -1;
- INT in_Rj = -1;
- in_Ri = FLD (in_Ri);
- in_Rj = FLD (in_Rj);
- referenced |= 1 << 0;
- referenced |= 1 << 1;
- cycles += fr30bf_model_fr30_1_u_store (current_cpu, idesc, 1, referenced, in_Ri, in_Rj);
- }
- return cycles;
-#undef FLD
-}
-
-/* We assume UNIT_NONE == 0 because the tables don't always terminate
- entries with it. */
-
-/* Model timing data for `fr30-1'. */
-
-static const INSN_TIMING fr30_1_timing[] = {
- { FR30BF_INSN_X_INVALID, 0, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } },
- { FR30BF_INSN_X_AFTER, 0, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } },
- { FR30BF_INSN_X_BEFORE, 0, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } },
- { FR30BF_INSN_X_CTI_CHAIN, 0, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } },
- { FR30BF_INSN_X_CHAIN, 0, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } },
- { FR30BF_INSN_X_BEGIN, 0, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } },
- { FR30BF_INSN_ADD, model_fr30_1_add, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } },
- { FR30BF_INSN_ADDI, model_fr30_1_addi, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } },
- { FR30BF_INSN_ADD2, model_fr30_1_add2, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } },
- { FR30BF_INSN_ADDC, model_fr30_1_addc, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } },
- { FR30BF_INSN_ADDN, model_fr30_1_addn, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } },
- { FR30BF_INSN_ADDNI, model_fr30_1_addni, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } },
- { FR30BF_INSN_ADDN2, model_fr30_1_addn2, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } },
- { FR30BF_INSN_SUB, model_fr30_1_sub, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } },
- { FR30BF_INSN_SUBC, model_fr30_1_subc, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } },
- { FR30BF_INSN_SUBN, model_fr30_1_subn, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } },
- { FR30BF_INSN_CMP, model_fr30_1_cmp, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } },
- { FR30BF_INSN_CMPI, model_fr30_1_cmpi, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } },
- { FR30BF_INSN_CMP2, model_fr30_1_cmp2, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } },
- { FR30BF_INSN_AND, model_fr30_1_and, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } },
- { FR30BF_INSN_OR, model_fr30_1_or, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } },
- { FR30BF_INSN_EOR, model_fr30_1_eor, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } },
- { FR30BF_INSN_ANDM, model_fr30_1_andm, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 }, { (int) UNIT_FR30_1_U_LOAD, 1, 1 }, { (int) UNIT_FR30_1_U_STORE, 1, 1 } } },
- { FR30BF_INSN_ANDH, model_fr30_1_andh, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 }, { (int) UNIT_FR30_1_U_LOAD, 1, 1 }, { (int) UNIT_FR30_1_U_STORE, 1, 1 } } },
- { FR30BF_INSN_ANDB, model_fr30_1_andb, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 }, { (int) UNIT_FR30_1_U_LOAD, 1, 1 }, { (int) UNIT_FR30_1_U_STORE, 1, 1 } } },
- { FR30BF_INSN_ORM, model_fr30_1_orm, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 }, { (int) UNIT_FR30_1_U_LOAD, 1, 1 }, { (int) UNIT_FR30_1_U_STORE, 1, 1 } } },
- { FR30BF_INSN_ORH, model_fr30_1_orh, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 }, { (int) UNIT_FR30_1_U_LOAD, 1, 1 }, { (int) UNIT_FR30_1_U_STORE, 1, 1 } } },
- { FR30BF_INSN_ORB, model_fr30_1_orb, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 }, { (int) UNIT_FR30_1_U_LOAD, 1, 1 }, { (int) UNIT_FR30_1_U_STORE, 1, 1 } } },
- { FR30BF_INSN_EORM, model_fr30_1_eorm, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 }, { (int) UNIT_FR30_1_U_LOAD, 1, 1 }, { (int) UNIT_FR30_1_U_STORE, 1, 1 } } },
- { FR30BF_INSN_EORH, model_fr30_1_eorh, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 }, { (int) UNIT_FR30_1_U_LOAD, 1, 1 }, { (int) UNIT_FR30_1_U_STORE, 1, 1 } } },
- { FR30BF_INSN_EORB, model_fr30_1_eorb, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 }, { (int) UNIT_FR30_1_U_LOAD, 1, 1 }, { (int) UNIT_FR30_1_U_STORE, 1, 1 } } },
- { FR30BF_INSN_BANDL, model_fr30_1_bandl, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 }, { (int) UNIT_FR30_1_U_LOAD, 1, 1 }, { (int) UNIT_FR30_1_U_STORE, 1, 1 } } },
- { FR30BF_INSN_BORL, model_fr30_1_borl, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 }, { (int) UNIT_FR30_1_U_LOAD, 1, 1 }, { (int) UNIT_FR30_1_U_STORE, 1, 1 } } },
- { FR30BF_INSN_BEORL, model_fr30_1_beorl, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 }, { (int) UNIT_FR30_1_U_LOAD, 1, 1 }, { (int) UNIT_FR30_1_U_STORE, 1, 1 } } },
- { FR30BF_INSN_BANDH, model_fr30_1_bandh, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 }, { (int) UNIT_FR30_1_U_LOAD, 1, 1 }, { (int) UNIT_FR30_1_U_STORE, 1, 1 } } },
- { FR30BF_INSN_BORH, model_fr30_1_borh, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 }, { (int) UNIT_FR30_1_U_LOAD, 1, 1 }, { (int) UNIT_FR30_1_U_STORE, 1, 1 } } },
- { FR30BF_INSN_BEORH, model_fr30_1_beorh, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 }, { (int) UNIT_FR30_1_U_LOAD, 1, 1 }, { (int) UNIT_FR30_1_U_STORE, 1, 1 } } },
- { FR30BF_INSN_BTSTL, model_fr30_1_btstl, { { (int) UNIT_FR30_1_U_LOAD, 1, 1 }, { (int) UNIT_FR30_1_U_EXEC, 1, 2 } } },
- { FR30BF_INSN_BTSTH, model_fr30_1_btsth, { { (int) UNIT_FR30_1_U_LOAD, 1, 1 }, { (int) UNIT_FR30_1_U_EXEC, 1, 2 } } },
- { FR30BF_INSN_MUL, model_fr30_1_mul, { { (int) UNIT_FR30_1_U_EXEC, 1, 5 } } },
- { FR30BF_INSN_MULU, model_fr30_1_mulu, { { (int) UNIT_FR30_1_U_EXEC, 1, 5 } } },
- { FR30BF_INSN_MULH, model_fr30_1_mulh, { { (int) UNIT_FR30_1_U_EXEC, 1, 3 } } },
- { FR30BF_INSN_MULUH, model_fr30_1_muluh, { { (int) UNIT_FR30_1_U_EXEC, 1, 3 } } },
- { FR30BF_INSN_DIV0S, model_fr30_1_div0s, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } },
- { FR30BF_INSN_DIV0U, model_fr30_1_div0u, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } },
- { FR30BF_INSN_DIV1, model_fr30_1_div1, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } },
- { FR30BF_INSN_DIV2, model_fr30_1_div2, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } },
- { FR30BF_INSN_DIV3, model_fr30_1_div3, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } },
- { FR30BF_INSN_DIV4S, model_fr30_1_div4s, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } },
- { FR30BF_INSN_LSL, model_fr30_1_lsl, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } },
- { FR30BF_INSN_LSLI, model_fr30_1_lsli, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } },
- { FR30BF_INSN_LSL2, model_fr30_1_lsl2, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } },
- { FR30BF_INSN_LSR, model_fr30_1_lsr, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } },
- { FR30BF_INSN_LSRI, model_fr30_1_lsri, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } },
- { FR30BF_INSN_LSR2, model_fr30_1_lsr2, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } },
- { FR30BF_INSN_ASR, model_fr30_1_asr, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } },
- { FR30BF_INSN_ASRI, model_fr30_1_asri, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } },
- { FR30BF_INSN_ASR2, model_fr30_1_asr2, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } },
- { FR30BF_INSN_LDI8, model_fr30_1_ldi8, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } },
- { FR30BF_INSN_LDI20, model_fr30_1_ldi20, { { (int) UNIT_FR30_1_U_EXEC, 1, 2 } } },
- { FR30BF_INSN_LDI32, model_fr30_1_ldi32, { { (int) UNIT_FR30_1_U_EXEC, 1, 3 } } },
- { FR30BF_INSN_LD, model_fr30_1_ld, { { (int) UNIT_FR30_1_U_LOAD, 1, 1 } } },
- { FR30BF_INSN_LDUH, model_fr30_1_lduh, { { (int) UNIT_FR30_1_U_LOAD, 1, 1 } } },
- { FR30BF_INSN_LDUB, model_fr30_1_ldub, { { (int) UNIT_FR30_1_U_LOAD, 1, 1 } } },
- { FR30BF_INSN_LDR13, model_fr30_1_ldr13, { { (int) UNIT_FR30_1_U_LOAD, 1, 1 } } },
- { FR30BF_INSN_LDR13UH, model_fr30_1_ldr13uh, { { (int) UNIT_FR30_1_U_LOAD, 1, 1 } } },
- { FR30BF_INSN_LDR13UB, model_fr30_1_ldr13ub, { { (int) UNIT_FR30_1_U_LOAD, 1, 1 } } },
- { FR30BF_INSN_LDR14, model_fr30_1_ldr14, { { (int) UNIT_FR30_1_U_LOAD, 1, 1 } } },
- { FR30BF_INSN_LDR14UH, model_fr30_1_ldr14uh, { { (int) UNIT_FR30_1_U_LOAD, 1, 1 } } },
- { FR30BF_INSN_LDR14UB, model_fr30_1_ldr14ub, { { (int) UNIT_FR30_1_U_LOAD, 1, 1 } } },
- { FR30BF_INSN_LDR15, model_fr30_1_ldr15, { { (int) UNIT_FR30_1_U_LOAD, 1, 1 } } },
- { FR30BF_INSN_LDR15GR, model_fr30_1_ldr15gr, { { (int) UNIT_FR30_1_U_LOAD, 1, 1 } } },
- { FR30BF_INSN_LDR15DR, model_fr30_1_ldr15dr, { { (int) UNIT_FR30_1_U_LOAD, 1, 1 } } },
- { FR30BF_INSN_LDR15PS, model_fr30_1_ldr15ps, { { (int) UNIT_FR30_1_U_LOAD, 1, 1 } } },
- { FR30BF_INSN_ST, model_fr30_1_st, { { (int) UNIT_FR30_1_U_STORE, 1, 1 } } },
- { FR30BF_INSN_STH, model_fr30_1_sth, { { (int) UNIT_FR30_1_U_STORE, 1, 1 } } },
- { FR30BF_INSN_STB, model_fr30_1_stb, { { (int) UNIT_FR30_1_U_STORE, 1, 1 } } },
- { FR30BF_INSN_STR13, model_fr30_1_str13, { { (int) UNIT_FR30_1_U_STORE, 1, 1 } } },
- { FR30BF_INSN_STR13H, model_fr30_1_str13h, { { (int) UNIT_FR30_1_U_STORE, 1, 1 } } },
- { FR30BF_INSN_STR13B, model_fr30_1_str13b, { { (int) UNIT_FR30_1_U_STORE, 1, 1 } } },
- { FR30BF_INSN_STR14, model_fr30_1_str14, { { (int) UNIT_FR30_1_U_STORE, 1, 1 } } },
- { FR30BF_INSN_STR14H, model_fr30_1_str14h, { { (int) UNIT_FR30_1_U_STORE, 1, 1 } } },
- { FR30BF_INSN_STR14B, model_fr30_1_str14b, { { (int) UNIT_FR30_1_U_STORE, 1, 1 } } },
- { FR30BF_INSN_STR15, model_fr30_1_str15, { { (int) UNIT_FR30_1_U_STORE, 1, 1 } } },
- { FR30BF_INSN_STR15GR, model_fr30_1_str15gr, { { (int) UNIT_FR30_1_U_STORE, 1, 1 } } },
- { FR30BF_INSN_STR15DR, model_fr30_1_str15dr, { { (int) UNIT_FR30_1_U_STORE, 1, 1 } } },
- { FR30BF_INSN_STR15PS, model_fr30_1_str15ps, { { (int) UNIT_FR30_1_U_STORE, 1, 1 } } },
- { FR30BF_INSN_MOV, model_fr30_1_mov, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } },
- { FR30BF_INSN_MOVDR, model_fr30_1_movdr, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } },
- { FR30BF_INSN_MOVPS, model_fr30_1_movps, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } },
- { FR30BF_INSN_MOV2DR, model_fr30_1_mov2dr, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } },
- { FR30BF_INSN_MOV2PS, model_fr30_1_mov2ps, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } },
- { FR30BF_INSN_JMP, model_fr30_1_jmp, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } },
- { FR30BF_INSN_JMPD, model_fr30_1_jmpd, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } },
- { FR30BF_INSN_CALLR, model_fr30_1_callr, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } },
- { FR30BF_INSN_CALLRD, model_fr30_1_callrd, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } },
- { FR30BF_INSN_CALL, model_fr30_1_call, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } },
- { FR30BF_INSN_CALLD, model_fr30_1_calld, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } },
- { FR30BF_INSN_RET, model_fr30_1_ret, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } },
- { FR30BF_INSN_RET_D, model_fr30_1_ret_d, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } },
- { FR30BF_INSN_INT, model_fr30_1_int, { { (int) UNIT_FR30_1_U_EXEC, 1, 6 } } },
- { FR30BF_INSN_INTE, model_fr30_1_inte, { { (int) UNIT_FR30_1_U_EXEC, 1, 6 } } },
- { FR30BF_INSN_RETI, model_fr30_1_reti, { { (int) UNIT_FR30_1_U_EXEC, 1, 4 } } },
- { FR30BF_INSN_BRAD, model_fr30_1_brad, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } },
- { FR30BF_INSN_BRA, model_fr30_1_bra, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } },
- { FR30BF_INSN_BNOD, model_fr30_1_bnod, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } },
- { FR30BF_INSN_BNO, model_fr30_1_bno, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } },
- { FR30BF_INSN_BEQD, model_fr30_1_beqd, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } },
- { FR30BF_INSN_BEQ, model_fr30_1_beq, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } },
- { FR30BF_INSN_BNED, model_fr30_1_bned, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } },
- { FR30BF_INSN_BNE, model_fr30_1_bne, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } },
- { FR30BF_INSN_BCD, model_fr30_1_bcd, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } },
- { FR30BF_INSN_BC, model_fr30_1_bc, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } },
- { FR30BF_INSN_BNCD, model_fr30_1_bncd, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } },
- { FR30BF_INSN_BNC, model_fr30_1_bnc, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } },
- { FR30BF_INSN_BND, model_fr30_1_bnd, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } },
- { FR30BF_INSN_BN, model_fr30_1_bn, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } },
- { FR30BF_INSN_BPD, model_fr30_1_bpd, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } },
- { FR30BF_INSN_BP, model_fr30_1_bp, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } },
- { FR30BF_INSN_BVD, model_fr30_1_bvd, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } },
- { FR30BF_INSN_BV, model_fr30_1_bv, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } },
- { FR30BF_INSN_BNVD, model_fr30_1_bnvd, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } },
- { FR30BF_INSN_BNV, model_fr30_1_bnv, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } },
- { FR30BF_INSN_BLTD, model_fr30_1_bltd, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } },
- { FR30BF_INSN_BLT, model_fr30_1_blt, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } },
- { FR30BF_INSN_BGED, model_fr30_1_bged, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } },
- { FR30BF_INSN_BGE, model_fr30_1_bge, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } },
- { FR30BF_INSN_BLED, model_fr30_1_bled, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } },
- { FR30BF_INSN_BLE, model_fr30_1_ble, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } },
- { FR30BF_INSN_BGTD, model_fr30_1_bgtd, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } },
- { FR30BF_INSN_BGT, model_fr30_1_bgt, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } },
- { FR30BF_INSN_BLSD, model_fr30_1_blsd, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } },
- { FR30BF_INSN_BLS, model_fr30_1_bls, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } },
- { FR30BF_INSN_BHID, model_fr30_1_bhid, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } },
- { FR30BF_INSN_BHI, model_fr30_1_bhi, { { (int) UNIT_FR30_1_U_CTI, 1, 1 } } },
- { FR30BF_INSN_DMOVR13, model_fr30_1_dmovr13, { { (int) UNIT_FR30_1_U_STORE, 1, 1 } } },
- { FR30BF_INSN_DMOVR13H, model_fr30_1_dmovr13h, { { (int) UNIT_FR30_1_U_STORE, 1, 1 } } },
- { FR30BF_INSN_DMOVR13B, model_fr30_1_dmovr13b, { { (int) UNIT_FR30_1_U_STORE, 1, 1 } } },
- { FR30BF_INSN_DMOVR13PI, model_fr30_1_dmovr13pi, { { (int) UNIT_FR30_1_U_LOAD, 1, 1 }, { (int) UNIT_FR30_1_U_STORE, 1, 1 } } },
- { FR30BF_INSN_DMOVR13PIH, model_fr30_1_dmovr13pih, { { (int) UNIT_FR30_1_U_LOAD, 1, 1 }, { (int) UNIT_FR30_1_U_STORE, 1, 1 } } },
- { FR30BF_INSN_DMOVR13PIB, model_fr30_1_dmovr13pib, { { (int) UNIT_FR30_1_U_LOAD, 1, 1 }, { (int) UNIT_FR30_1_U_STORE, 1, 1 } } },
- { FR30BF_INSN_DMOVR15PI, model_fr30_1_dmovr15pi, { { (int) UNIT_FR30_1_U_LOAD, 1, 1 }, { (int) UNIT_FR30_1_U_STORE, 1, 1 } } },
- { FR30BF_INSN_DMOV2R13, model_fr30_1_dmov2r13, { { (int) UNIT_FR30_1_U_LOAD, 1, 1 } } },
- { FR30BF_INSN_DMOV2R13H, model_fr30_1_dmov2r13h, { { (int) UNIT_FR30_1_U_LOAD, 1, 1 } } },
- { FR30BF_INSN_DMOV2R13B, model_fr30_1_dmov2r13b, { { (int) UNIT_FR30_1_U_LOAD, 1, 1 } } },
- { FR30BF_INSN_DMOV2R13PI, model_fr30_1_dmov2r13pi, { { (int) UNIT_FR30_1_U_LOAD, 1, 1 }, { (int) UNIT_FR30_1_U_STORE, 1, 1 } } },
- { FR30BF_INSN_DMOV2R13PIH, model_fr30_1_dmov2r13pih, { { (int) UNIT_FR30_1_U_LOAD, 1, 1 }, { (int) UNIT_FR30_1_U_STORE, 1, 1 } } },
- { FR30BF_INSN_DMOV2R13PIB, model_fr30_1_dmov2r13pib, { { (int) UNIT_FR30_1_U_LOAD, 1, 1 }, { (int) UNIT_FR30_1_U_STORE, 1, 1 } } },
- { FR30BF_INSN_DMOV2R15PD, model_fr30_1_dmov2r15pd, { { (int) UNIT_FR30_1_U_LOAD, 1, 1 }, { (int) UNIT_FR30_1_U_STORE, 1, 1 } } },
- { FR30BF_INSN_LDRES, model_fr30_1_ldres, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } },
- { FR30BF_INSN_STRES, model_fr30_1_stres, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } },
- { FR30BF_INSN_COPOP, model_fr30_1_copop, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } },
- { FR30BF_INSN_COPLD, model_fr30_1_copld, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } },
- { FR30BF_INSN_COPST, model_fr30_1_copst, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } },
- { FR30BF_INSN_COPSV, model_fr30_1_copsv, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } },
- { FR30BF_INSN_NOP, model_fr30_1_nop, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } },
- { FR30BF_INSN_ANDCCR, model_fr30_1_andccr, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } },
- { FR30BF_INSN_ORCCR, model_fr30_1_orccr, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } },
- { FR30BF_INSN_STILM, model_fr30_1_stilm, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } },
- { FR30BF_INSN_ADDSP, model_fr30_1_addsp, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } },
- { FR30BF_INSN_EXTSB, model_fr30_1_extsb, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } },
- { FR30BF_INSN_EXTUB, model_fr30_1_extub, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } },
- { FR30BF_INSN_EXTSH, model_fr30_1_extsh, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } },
- { FR30BF_INSN_EXTUH, model_fr30_1_extuh, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } },
- { FR30BF_INSN_LDM0, model_fr30_1_ldm0, { { (int) UNIT_FR30_1_U_LDM, 1, 1 } } },
- { FR30BF_INSN_LDM1, model_fr30_1_ldm1, { { (int) UNIT_FR30_1_U_LDM, 1, 1 } } },
- { FR30BF_INSN_STM0, model_fr30_1_stm0, { { (int) UNIT_FR30_1_U_STM, 1, 1 } } },
- { FR30BF_INSN_STM1, model_fr30_1_stm1, { { (int) UNIT_FR30_1_U_STM, 1, 1 } } },
- { FR30BF_INSN_ENTER, model_fr30_1_enter, { { (int) UNIT_FR30_1_U_EXEC, 1, 2 } } },
- { FR30BF_INSN_LEAVE, model_fr30_1_leave, { { (int) UNIT_FR30_1_U_EXEC, 1, 1 } } },
- { FR30BF_INSN_XCHB, model_fr30_1_xchb, { { (int) UNIT_FR30_1_U_LOAD, 1, 1 }, { (int) UNIT_FR30_1_U_STORE, 1, 1 } } },
-};
-
-#endif /* WITH_PROFILE_MODEL_P */
-
-static void
-fr30_1_model_init (SIM_CPU *cpu)
-{
- CPU_MODEL_DATA (cpu) = (void *) zalloc (sizeof (MODEL_FR30_1_DATA));
-}
-
-#if WITH_PROFILE_MODEL_P
-#define TIMING_DATA(td) td
-#else
-#define TIMING_DATA(td) 0
-#endif
-
-static const MODEL fr30_models[] =
-{
- { "fr30-1", & fr30_mach, MODEL_FR30_1, TIMING_DATA (& fr30_1_timing[0]), fr30_1_model_init },
- { 0 }
-};
-
-/* The properties of this cpu's implementation. */
-
-static const MACH_IMP_PROPERTIES fr30bf_imp_properties =
-{
- sizeof (SIM_CPU),
-#if WITH_SCACHE
- sizeof (SCACHE)
-#else
- 0
-#endif
-};
-
-
-static void
-fr30bf_prepare_run (SIM_CPU *cpu)
-{
- if (CPU_IDESC (cpu) == NULL)
- fr30bf_init_idesc_table (cpu);
-}
-
-static const CGEN_INSN *
-fr30bf_get_idata (SIM_CPU *cpu, int inum)
-{
- return CPU_IDESC (cpu) [inum].idata;
-}
-
-static void
-fr30_init_cpu (SIM_CPU *cpu)
-{
- CPU_REG_FETCH (cpu) = fr30bf_fetch_register;
- CPU_REG_STORE (cpu) = fr30bf_store_register;
- CPU_PC_FETCH (cpu) = fr30bf_h_pc_get;
- CPU_PC_STORE (cpu) = fr30bf_h_pc_set;
- CPU_GET_IDATA (cpu) = fr30bf_get_idata;
- CPU_MAX_INSNS (cpu) = FR30BF_INSN_MAX;
- CPU_INSN_NAME (cpu) = cgen_insn_name;
- CPU_FULL_ENGINE_FN (cpu) = fr30bf_engine_run_full;
-#if WITH_FAST
- CPU_FAST_ENGINE_FN (cpu) = fr30bf_engine_run_fast;
-#else
- CPU_FAST_ENGINE_FN (cpu) = fr30bf_engine_run_full;
-#endif
-}
-
-const MACH fr30_mach =
-{
- "fr30", "fr30", MACH_FR30,
- 32, 32, & fr30_models[0], & fr30bf_imp_properties,
- fr30_init_cpu,
- fr30bf_prepare_run
-};
-
diff --git a/sim/fr30/sem-switch.c b/sim/fr30/sem-switch.c
deleted file mode 100644
index 7dc7f7fd83e..00000000000
--- a/sim/fr30/sem-switch.c
+++ /dev/null
@@ -1,5409 +0,0 @@
-/* Simulator instruction semantics for fr30bf.
-
-THIS FILE IS MACHINE GENERATED WITH CGEN.
-
-Copyright (C) 1996, 1997, 1998, 1999, 2000 Free Software Foundation, Inc.
-
-This file is part of the GNU Simulators.
-
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License along
-with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
-*/
-
-#ifdef DEFINE_LABELS
-
- /* The labels have the case they have because the enum of insn types
- is all uppercase and in the non-stdc case the insn symbol is built
- into the enum name. */
-
- static struct {
- int index;
- void *label;
- } labels[] = {
- { FR30BF_INSN_X_INVALID, && case_sem_INSN_X_INVALID },
- { FR30BF_INSN_X_AFTER, && case_sem_INSN_X_AFTER },
- { FR30BF_INSN_X_BEFORE, && case_sem_INSN_X_BEFORE },
- { FR30BF_INSN_X_CTI_CHAIN, && case_sem_INSN_X_CTI_CHAIN },
- { FR30BF_INSN_X_CHAIN, && case_sem_INSN_X_CHAIN },
- { FR30BF_INSN_X_BEGIN, && case_sem_INSN_X_BEGIN },
- { FR30BF_INSN_ADD, && case_sem_INSN_ADD },
- { FR30BF_INSN_ADDI, && case_sem_INSN_ADDI },
- { FR30BF_INSN_ADD2, && case_sem_INSN_ADD2 },
- { FR30BF_INSN_ADDC, && case_sem_INSN_ADDC },
- { FR30BF_INSN_ADDN, && case_sem_INSN_ADDN },
- { FR30BF_INSN_ADDNI, && case_sem_INSN_ADDNI },
- { FR30BF_INSN_ADDN2, && case_sem_INSN_ADDN2 },
- { FR30BF_INSN_SUB, && case_sem_INSN_SUB },
- { FR30BF_INSN_SUBC, && case_sem_INSN_SUBC },
- { FR30BF_INSN_SUBN, && case_sem_INSN_SUBN },
- { FR30BF_INSN_CMP, && case_sem_INSN_CMP },
- { FR30BF_INSN_CMPI, && case_sem_INSN_CMPI },
- { FR30BF_INSN_CMP2, && case_sem_INSN_CMP2 },
- { FR30BF_INSN_AND, && case_sem_INSN_AND },
- { FR30BF_INSN_OR, && case_sem_INSN_OR },
- { FR30BF_INSN_EOR, && case_sem_INSN_EOR },
- { FR30BF_INSN_ANDM, && case_sem_INSN_ANDM },
- { FR30BF_INSN_ANDH, && case_sem_INSN_ANDH },
- { FR30BF_INSN_ANDB, && case_sem_INSN_ANDB },
- { FR30BF_INSN_ORM, && case_sem_INSN_ORM },
- { FR30BF_INSN_ORH, && case_sem_INSN_ORH },
- { FR30BF_INSN_ORB, && case_sem_INSN_ORB },
- { FR30BF_INSN_EORM, && case_sem_INSN_EORM },
- { FR30BF_INSN_EORH, && case_sem_INSN_EORH },
- { FR30BF_INSN_EORB, && case_sem_INSN_EORB },
- { FR30BF_INSN_BANDL, && case_sem_INSN_BANDL },
- { FR30BF_INSN_BORL, && case_sem_INSN_BORL },
- { FR30BF_INSN_BEORL, && case_sem_INSN_BEORL },
- { FR30BF_INSN_BANDH, && case_sem_INSN_BANDH },
- { FR30BF_INSN_BORH, && case_sem_INSN_BORH },
- { FR30BF_INSN_BEORH, && case_sem_INSN_BEORH },
- { FR30BF_INSN_BTSTL, && case_sem_INSN_BTSTL },
- { FR30BF_INSN_BTSTH, && case_sem_INSN_BTSTH },
- { FR30BF_INSN_MUL, && case_sem_INSN_MUL },
- { FR30BF_INSN_MULU, && case_sem_INSN_MULU },
- { FR30BF_INSN_MULH, && case_sem_INSN_MULH },
- { FR30BF_INSN_MULUH, && case_sem_INSN_MULUH },
- { FR30BF_INSN_DIV0S, && case_sem_INSN_DIV0S },
- { FR30BF_INSN_DIV0U, && case_sem_INSN_DIV0U },
- { FR30BF_INSN_DIV1, && case_sem_INSN_DIV1 },
- { FR30BF_INSN_DIV2, && case_sem_INSN_DIV2 },
- { FR30BF_INSN_DIV3, && case_sem_INSN_DIV3 },
- { FR30BF_INSN_DIV4S, && case_sem_INSN_DIV4S },
- { FR30BF_INSN_LSL, && case_sem_INSN_LSL },
- { FR30BF_INSN_LSLI, && case_sem_INSN_LSLI },
- { FR30BF_INSN_LSL2, && case_sem_INSN_LSL2 },
- { FR30BF_INSN_LSR, && case_sem_INSN_LSR },
- { FR30BF_INSN_LSRI, && case_sem_INSN_LSRI },
- { FR30BF_INSN_LSR2, && case_sem_INSN_LSR2 },
- { FR30BF_INSN_ASR, && case_sem_INSN_ASR },
- { FR30BF_INSN_ASRI, && case_sem_INSN_ASRI },
- { FR30BF_INSN_ASR2, && case_sem_INSN_ASR2 },
- { FR30BF_INSN_LDI8, && case_sem_INSN_LDI8 },
- { FR30BF_INSN_LDI20, && case_sem_INSN_LDI20 },
- { FR30BF_INSN_LDI32, && case_sem_INSN_LDI32 },
- { FR30BF_INSN_LD, && case_sem_INSN_LD },
- { FR30BF_INSN_LDUH, && case_sem_INSN_LDUH },
- { FR30BF_INSN_LDUB, && case_sem_INSN_LDUB },
- { FR30BF_INSN_LDR13, && case_sem_INSN_LDR13 },
- { FR30BF_INSN_LDR13UH, && case_sem_INSN_LDR13UH },
- { FR30BF_INSN_LDR13UB, && case_sem_INSN_LDR13UB },
- { FR30BF_INSN_LDR14, && case_sem_INSN_LDR14 },
- { FR30BF_INSN_LDR14UH, && case_sem_INSN_LDR14UH },
- { FR30BF_INSN_LDR14UB, && case_sem_INSN_LDR14UB },
- { FR30BF_INSN_LDR15, && case_sem_INSN_LDR15 },
- { FR30BF_INSN_LDR15GR, && case_sem_INSN_LDR15GR },
- { FR30BF_INSN_LDR15DR, && case_sem_INSN_LDR15DR },
- { FR30BF_INSN_LDR15PS, && case_sem_INSN_LDR15PS },
- { FR30BF_INSN_ST, && case_sem_INSN_ST },
- { FR30BF_INSN_STH, && case_sem_INSN_STH },
- { FR30BF_INSN_STB, && case_sem_INSN_STB },
- { FR30BF_INSN_STR13, && case_sem_INSN_STR13 },
- { FR30BF_INSN_STR13H, && case_sem_INSN_STR13H },
- { FR30BF_INSN_STR13B, && case_sem_INSN_STR13B },
- { FR30BF_INSN_STR14, && case_sem_INSN_STR14 },
- { FR30BF_INSN_STR14H, && case_sem_INSN_STR14H },
- { FR30BF_INSN_STR14B, && case_sem_INSN_STR14B },
- { FR30BF_INSN_STR15, && case_sem_INSN_STR15 },
- { FR30BF_INSN_STR15GR, && case_sem_INSN_STR15GR },
- { FR30BF_INSN_STR15DR, && case_sem_INSN_STR15DR },
- { FR30BF_INSN_STR15PS, && case_sem_INSN_STR15PS },
- { FR30BF_INSN_MOV, && case_sem_INSN_MOV },
- { FR30BF_INSN_MOVDR, && case_sem_INSN_MOVDR },
- { FR30BF_INSN_MOVPS, && case_sem_INSN_MOVPS },
- { FR30BF_INSN_MOV2DR, && case_sem_INSN_MOV2DR },
- { FR30BF_INSN_MOV2PS, && case_sem_INSN_MOV2PS },
- { FR30BF_INSN_JMP, && case_sem_INSN_JMP },
- { FR30BF_INSN_JMPD, && case_sem_INSN_JMPD },
- { FR30BF_INSN_CALLR, && case_sem_INSN_CALLR },
- { FR30BF_INSN_CALLRD, && case_sem_INSN_CALLRD },
- { FR30BF_INSN_CALL, && case_sem_INSN_CALL },
- { FR30BF_INSN_CALLD, && case_sem_INSN_CALLD },
- { FR30BF_INSN_RET, && case_sem_INSN_RET },
- { FR30BF_INSN_RET_D, && case_sem_INSN_RET_D },
- { FR30BF_INSN_INT, && case_sem_INSN_INT },
- { FR30BF_INSN_INTE, && case_sem_INSN_INTE },
- { FR30BF_INSN_RETI, && case_sem_INSN_RETI },
- { FR30BF_INSN_BRAD, && case_sem_INSN_BRAD },
- { FR30BF_INSN_BRA, && case_sem_INSN_BRA },
- { FR30BF_INSN_BNOD, && case_sem_INSN_BNOD },
- { FR30BF_INSN_BNO, && case_sem_INSN_BNO },
- { FR30BF_INSN_BEQD, && case_sem_INSN_BEQD },
- { FR30BF_INSN_BEQ, && case_sem_INSN_BEQ },
- { FR30BF_INSN_BNED, && case_sem_INSN_BNED },
- { FR30BF_INSN_BNE, && case_sem_INSN_BNE },
- { FR30BF_INSN_BCD, && case_sem_INSN_BCD },
- { FR30BF_INSN_BC, && case_sem_INSN_BC },
- { FR30BF_INSN_BNCD, && case_sem_INSN_BNCD },
- { FR30BF_INSN_BNC, && case_sem_INSN_BNC },
- { FR30BF_INSN_BND, && case_sem_INSN_BND },
- { FR30BF_INSN_BN, && case_sem_INSN_BN },
- { FR30BF_INSN_BPD, && case_sem_INSN_BPD },
- { FR30BF_INSN_BP, && case_sem_INSN_BP },
- { FR30BF_INSN_BVD, && case_sem_INSN_BVD },
- { FR30BF_INSN_BV, && case_sem_INSN_BV },
- { FR30BF_INSN_BNVD, && case_sem_INSN_BNVD },
- { FR30BF_INSN_BNV, && case_sem_INSN_BNV },
- { FR30BF_INSN_BLTD, && case_sem_INSN_BLTD },
- { FR30BF_INSN_BLT, && case_sem_INSN_BLT },
- { FR30BF_INSN_BGED, && case_sem_INSN_BGED },
- { FR30BF_INSN_BGE, && case_sem_INSN_BGE },
- { FR30BF_INSN_BLED, && case_sem_INSN_BLED },
- { FR30BF_INSN_BLE, && case_sem_INSN_BLE },
- { FR30BF_INSN_BGTD, && case_sem_INSN_BGTD },
- { FR30BF_INSN_BGT, && case_sem_INSN_BGT },
- { FR30BF_INSN_BLSD, && case_sem_INSN_BLSD },
- { FR30BF_INSN_BLS, && case_sem_INSN_BLS },
- { FR30BF_INSN_BHID, && case_sem_INSN_BHID },
- { FR30BF_INSN_BHI, && case_sem_INSN_BHI },
- { FR30BF_INSN_DMOVR13, && case_sem_INSN_DMOVR13 },
- { FR30BF_INSN_DMOVR13H, && case_sem_INSN_DMOVR13H },
- { FR30BF_INSN_DMOVR13B, && case_sem_INSN_DMOVR13B },
- { FR30BF_INSN_DMOVR13PI, && case_sem_INSN_DMOVR13PI },
- { FR30BF_INSN_DMOVR13PIH, && case_sem_INSN_DMOVR13PIH },
- { FR30BF_INSN_DMOVR13PIB, && case_sem_INSN_DMOVR13PIB },
- { FR30BF_INSN_DMOVR15PI, && case_sem_INSN_DMOVR15PI },
- { FR30BF_INSN_DMOV2R13, && case_sem_INSN_DMOV2R13 },
- { FR30BF_INSN_DMOV2R13H, && case_sem_INSN_DMOV2R13H },
- { FR30BF_INSN_DMOV2R13B, && case_sem_INSN_DMOV2R13B },
- { FR30BF_INSN_DMOV2R13PI, && case_sem_INSN_DMOV2R13PI },
- { FR30BF_INSN_DMOV2R13PIH, && case_sem_INSN_DMOV2R13PIH },
- { FR30BF_INSN_DMOV2R13PIB, && case_sem_INSN_DMOV2R13PIB },
- { FR30BF_INSN_DMOV2R15PD, && case_sem_INSN_DMOV2R15PD },
- { FR30BF_INSN_LDRES, && case_sem_INSN_LDRES },
- { FR30BF_INSN_STRES, && case_sem_INSN_STRES },
- { FR30BF_INSN_COPOP, && case_sem_INSN_COPOP },
- { FR30BF_INSN_COPLD, && case_sem_INSN_COPLD },
- { FR30BF_INSN_COPST, && case_sem_INSN_COPST },
- { FR30BF_INSN_COPSV, && case_sem_INSN_COPSV },
- { FR30BF_INSN_NOP, && case_sem_INSN_NOP },
- { FR30BF_INSN_ANDCCR, && case_sem_INSN_ANDCCR },
- { FR30BF_INSN_ORCCR, && case_sem_INSN_ORCCR },
- { FR30BF_INSN_STILM, && case_sem_INSN_STILM },
- { FR30BF_INSN_ADDSP, && case_sem_INSN_ADDSP },
- { FR30BF_INSN_EXTSB, && case_sem_INSN_EXTSB },
- { FR30BF_INSN_EXTUB, && case_sem_INSN_EXTUB },
- { FR30BF_INSN_EXTSH, && case_sem_INSN_EXTSH },
- { FR30BF_INSN_EXTUH, && case_sem_INSN_EXTUH },
- { FR30BF_INSN_LDM0, && case_sem_INSN_LDM0 },
- { FR30BF_INSN_LDM1, && case_sem_INSN_LDM1 },
- { FR30BF_INSN_STM0, && case_sem_INSN_STM0 },
- { FR30BF_INSN_STM1, && case_sem_INSN_STM1 },
- { FR30BF_INSN_ENTER, && case_sem_INSN_ENTER },
- { FR30BF_INSN_LEAVE, && case_sem_INSN_LEAVE },
- { FR30BF_INSN_XCHB, && case_sem_INSN_XCHB },
- { 0, 0 }
- };
- int i;
-
- for (i = 0; labels[i].label != 0; ++i)
- {
-#if FAST_P
- CPU_IDESC (current_cpu) [labels[i].index].sem_fast_lab = labels[i].label;
-#else
- CPU_IDESC (current_cpu) [labels[i].index].sem_full_lab = labels[i].label;
-#endif
- }
-
-#undef DEFINE_LABELS
-#endif /* DEFINE_LABELS */
-
-#ifdef DEFINE_SWITCH
-
-/* If hyper-fast [well not unnecessarily slow] execution is selected, turn
- off frills like tracing and profiling. */
-/* FIXME: A better way would be to have TRACE_RESULT check for something
- that can cause it to be optimized out. Another way would be to emit
- special handlers into the instruction "stream". */
-
-#if FAST_P
-#undef TRACE_RESULT
-#define TRACE_RESULT(cpu, abuf, name, type, val)
-#endif
-
-#undef GET_ATTR
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
-#define GET_ATTR(cpu, num, attr) CGEN_ATTR_VALUE (NULL, abuf->idesc->attrs, CGEN_INSN_##attr)
-#else
-#define GET_ATTR(cpu, num, attr) CGEN_ATTR_VALUE (NULL, abuf->idesc->attrs, CGEN_INSN_/**/attr)
-#endif
-
-{
-
-#if WITH_SCACHE_PBB
-
-/* Branch to next handler without going around main loop. */
-#define NEXT(vpc) goto * SEM_ARGBUF (vpc) -> semantic.sem_case
-SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
-
-#else /* ! WITH_SCACHE_PBB */
-
-#define NEXT(vpc) BREAK (sem)
-#ifdef __GNUC__
-#if FAST_P
- SWITCH (sem, SEM_ARGBUF (sc) -> idesc->sem_fast_lab)
-#else
- SWITCH (sem, SEM_ARGBUF (sc) -> idesc->sem_full_lab)
-#endif
-#else
- SWITCH (sem, SEM_ARGBUF (sc) -> idesc->num)
-#endif
-
-#endif /* ! WITH_SCACHE_PBB */
-
- {
-
- CASE (sem, INSN_X_INVALID) : /* --invalid-- */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_empty.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
-
- {
- /* Update the recorded pc in the cpu state struct.
- Only necessary for WITH_SCACHE case, but to avoid the
- conditional compilation .... */
- SET_H_PC (pc);
- /* Virtual insns have zero size. Overwrite vpc with address of next insn
- using the default-insn-bitsize spec. When executing insns in parallel
- we may want to queue the fault and continue execution. */
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
- vpc = sim_engine_invalid_insn (current_cpu, pc, vpc);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_X_AFTER) : /* --after-- */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_empty.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
-
- {
-#if WITH_SCACHE_PBB_FR30BF
- fr30bf_pbb_after (current_cpu, sem_arg);
-#endif
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_X_BEFORE) : /* --before-- */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_empty.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
-
- {
-#if WITH_SCACHE_PBB_FR30BF
- fr30bf_pbb_before (current_cpu, sem_arg);
-#endif
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_X_CTI_CHAIN) : /* --cti-chain-- */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_empty.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
-
- {
-#if WITH_SCACHE_PBB_FR30BF
-#ifdef DEFINE_SWITCH
- vpc = fr30bf_pbb_cti_chain (current_cpu, sem_arg,
- pbb_br_type, pbb_br_npc);
- BREAK (sem);
-#else
- /* FIXME: Allow provision of explicit ifmt spec in insn spec. */
- vpc = fr30bf_pbb_cti_chain (current_cpu, sem_arg,
- CPU_PBB_BR_TYPE (current_cpu),
- CPU_PBB_BR_NPC (current_cpu));
-#endif
-#endif
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_X_CHAIN) : /* --chain-- */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_empty.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
-
- {
-#if WITH_SCACHE_PBB_FR30BF
- vpc = fr30bf_pbb_chain (current_cpu, sem_arg);
-#ifdef DEFINE_SWITCH
- BREAK (sem);
-#endif
-#endif
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_X_BEGIN) : /* --begin-- */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_empty.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
-
- {
-#if WITH_SCACHE_PBB_FR30BF
-#if defined DEFINE_SWITCH || defined FAST_P
- /* In the switch case FAST_P is a constant, allowing several optimizations
- in any called inline functions. */
- vpc = fr30bf_pbb_begin (current_cpu, FAST_P);
-#else
-#if 0 /* cgen engine can't handle dynamic fast/full switching yet. */
- vpc = fr30bf_pbb_begin (current_cpu, STATE_RUN_FAST_P (CPU_STATE (current_cpu)));
-#else
- vpc = fr30bf_pbb_begin (current_cpu, 0);
-#endif
-#endif
-#endif
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_ADD) : /* add $Rj,$Ri */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_add.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- {
- BI opval = ADDOFSI (* FLD (i_Ri), * FLD (i_Rj), 0);
- CPU (h_vbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
- }
- {
- BI opval = ADDCFSI (* FLD (i_Ri), * FLD (i_Rj), 0);
- CPU (h_cbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
- }
- {
- SI opval = ADDSI (* FLD (i_Ri), * FLD (i_Rj));
- * FLD (i_Ri) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-{
- {
- BI opval = EQSI (* FLD (i_Ri), 0);
- CPU (h_zbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
- }
- {
- BI opval = LTSI (* FLD (i_Ri), 0);
- CPU (h_nbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
- }
-}
-}
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_ADDI) : /* add $u4,$Ri */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_addi.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- {
- BI opval = ADDOFSI (* FLD (i_Ri), FLD (f_u4), 0);
- CPU (h_vbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
- }
- {
- BI opval = ADDCFSI (* FLD (i_Ri), FLD (f_u4), 0);
- CPU (h_cbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
- }
- {
- SI opval = ADDSI (* FLD (i_Ri), FLD (f_u4));
- * FLD (i_Ri) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-{
- {
- BI opval = EQSI (* FLD (i_Ri), 0);
- CPU (h_zbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
- }
- {
- BI opval = LTSI (* FLD (i_Ri), 0);
- CPU (h_nbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
- }
-}
-}
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_ADD2) : /* add2 $m4,$Ri */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_add2.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- {
- BI opval = ADDOFSI (* FLD (i_Ri), FLD (f_m4), 0);
- CPU (h_vbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
- }
- {
- BI opval = ADDCFSI (* FLD (i_Ri), FLD (f_m4), 0);
- CPU (h_cbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
- }
- {
- SI opval = ADDSI (* FLD (i_Ri), FLD (f_m4));
- * FLD (i_Ri) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-{
- {
- BI opval = EQSI (* FLD (i_Ri), 0);
- CPU (h_zbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
- }
- {
- BI opval = LTSI (* FLD (i_Ri), 0);
- CPU (h_nbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
- }
-}
-}
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_ADDC) : /* addc $Rj,$Ri */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_add.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- SI tmp_tmp;
- tmp_tmp = ADDCSI (* FLD (i_Ri), * FLD (i_Rj), CPU (h_cbit));
- {
- BI opval = ADDOFSI (* FLD (i_Ri), * FLD (i_Rj), CPU (h_cbit));
- CPU (h_vbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
- }
- {
- BI opval = ADDCFSI (* FLD (i_Ri), * FLD (i_Rj), CPU (h_cbit));
- CPU (h_cbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
- }
- {
- SI opval = tmp_tmp;
- * FLD (i_Ri) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-{
- {
- BI opval = EQSI (* FLD (i_Ri), 0);
- CPU (h_zbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
- }
- {
- BI opval = LTSI (* FLD (i_Ri), 0);
- CPU (h_nbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
- }
-}
-}
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_ADDN) : /* addn $Rj,$Ri */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_add.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = ADDSI (* FLD (i_Ri), * FLD (i_Rj));
- * FLD (i_Ri) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_ADDNI) : /* addn $u4,$Ri */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_addi.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = ADDSI (* FLD (i_Ri), FLD (f_u4));
- * FLD (i_Ri) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_ADDN2) : /* addn2 $m4,$Ri */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_add2.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = ADDSI (* FLD (i_Ri), FLD (f_m4));
- * FLD (i_Ri) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_SUB) : /* sub $Rj,$Ri */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_add.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- {
- BI opval = SUBOFSI (* FLD (i_Ri), * FLD (i_Rj), 0);
- CPU (h_vbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
- }
- {
- BI opval = SUBCFSI (* FLD (i_Ri), * FLD (i_Rj), 0);
- CPU (h_cbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
- }
- {
- SI opval = SUBSI (* FLD (i_Ri), * FLD (i_Rj));
- * FLD (i_Ri) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-{
- {
- BI opval = EQSI (* FLD (i_Ri), 0);
- CPU (h_zbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
- }
- {
- BI opval = LTSI (* FLD (i_Ri), 0);
- CPU (h_nbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
- }
-}
-}
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_SUBC) : /* subc $Rj,$Ri */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_add.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- SI tmp_tmp;
- tmp_tmp = SUBCSI (* FLD (i_Ri), * FLD (i_Rj), CPU (h_cbit));
- {
- BI opval = SUBOFSI (* FLD (i_Ri), * FLD (i_Rj), CPU (h_cbit));
- CPU (h_vbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
- }
- {
- BI opval = SUBCFSI (* FLD (i_Ri), * FLD (i_Rj), CPU (h_cbit));
- CPU (h_cbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
- }
- {
- SI opval = tmp_tmp;
- * FLD (i_Ri) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-{
- {
- BI opval = EQSI (* FLD (i_Ri), 0);
- CPU (h_zbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
- }
- {
- BI opval = LTSI (* FLD (i_Ri), 0);
- CPU (h_nbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
- }
-}
-}
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_SUBN) : /* subn $Rj,$Ri */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_add.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = SUBSI (* FLD (i_Ri), * FLD (i_Rj));
- * FLD (i_Ri) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_CMP) : /* cmp $Rj,$Ri */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_str13.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- SI tmp_tmp1;
- {
- BI opval = SUBOFSI (* FLD (i_Ri), * FLD (i_Rj), 0);
- CPU (h_vbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
- }
- {
- BI opval = SUBCFSI (* FLD (i_Ri), * FLD (i_Rj), 0);
- CPU (h_cbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
- }
- tmp_tmp1 = SUBSI (* FLD (i_Ri), * FLD (i_Rj));
-{
- {
- BI opval = EQSI (tmp_tmp1, 0);
- CPU (h_zbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
- }
- {
- BI opval = LTSI (tmp_tmp1, 0);
- CPU (h_nbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
- }
-}
-}
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_CMPI) : /* cmp $u4,$Ri */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_addi.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- SI tmp_tmp1;
- {
- BI opval = SUBOFSI (* FLD (i_Ri), FLD (f_u4), 0);
- CPU (h_vbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
- }
- {
- BI opval = SUBCFSI (* FLD (i_Ri), FLD (f_u4), 0);
- CPU (h_cbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
- }
- tmp_tmp1 = SUBSI (* FLD (i_Ri), FLD (f_u4));
-{
- {
- BI opval = EQSI (tmp_tmp1, 0);
- CPU (h_zbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
- }
- {
- BI opval = LTSI (tmp_tmp1, 0);
- CPU (h_nbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
- }
-}
-}
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_CMP2) : /* cmp2 $m4,$Ri */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_add2.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- SI tmp_tmp1;
- {
- BI opval = SUBOFSI (* FLD (i_Ri), FLD (f_m4), 0);
- CPU (h_vbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
- }
- {
- BI opval = SUBCFSI (* FLD (i_Ri), FLD (f_m4), 0);
- CPU (h_cbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
- }
- tmp_tmp1 = SUBSI (* FLD (i_Ri), FLD (f_m4));
-{
- {
- BI opval = EQSI (tmp_tmp1, 0);
- CPU (h_zbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
- }
- {
- BI opval = LTSI (tmp_tmp1, 0);
- CPU (h_nbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
- }
-}
-}
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_AND) : /* and $Rj,$Ri */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_add.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- {
- SI opval = ANDSI (* FLD (i_Ri), * FLD (i_Rj));
- * FLD (i_Ri) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-{
- {
- BI opval = EQSI (* FLD (i_Ri), 0);
- CPU (h_zbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
- }
- {
- BI opval = LTSI (* FLD (i_Ri), 0);
- CPU (h_nbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
- }
-}
-}
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_OR) : /* or $Rj,$Ri */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_add.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- {
- SI opval = ORSI (* FLD (i_Ri), * FLD (i_Rj));
- * FLD (i_Ri) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-{
- {
- BI opval = EQSI (* FLD (i_Ri), 0);
- CPU (h_zbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
- }
- {
- BI opval = LTSI (* FLD (i_Ri), 0);
- CPU (h_nbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
- }
-}
-}
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_EOR) : /* eor $Rj,$Ri */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_add.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- {
- SI opval = XORSI (* FLD (i_Ri), * FLD (i_Rj));
- * FLD (i_Ri) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-{
- {
- BI opval = EQSI (* FLD (i_Ri), 0);
- CPU (h_zbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
- }
- {
- BI opval = LTSI (* FLD (i_Ri), 0);
- CPU (h_nbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
- }
-}
-}
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_ANDM) : /* and $Rj,@$Ri */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_str13.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- SI tmp_tmp;
- tmp_tmp = ANDSI (GETMEMSI (current_cpu, pc, * FLD (i_Ri)), * FLD (i_Rj));
-{
- {
- BI opval = EQSI (tmp_tmp, 0);
- CPU (h_zbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
- }
- {
- BI opval = LTSI (tmp_tmp, 0);
- CPU (h_nbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
- }
-}
- {
- SI opval = tmp_tmp;
- SETMEMSI (current_cpu, pc, * FLD (i_Ri), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-}
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_ANDH) : /* andh $Rj,@$Ri */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_str13.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- HI tmp_tmp;
- tmp_tmp = ANDHI (GETMEMHI (current_cpu, pc, * FLD (i_Ri)), * FLD (i_Rj));
-{
- {
- BI opval = EQHI (tmp_tmp, 0);
- CPU (h_zbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
- }
- {
- BI opval = LTHI (tmp_tmp, 0);
- CPU (h_nbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
- }
-}
- {
- HI opval = tmp_tmp;
- SETMEMHI (current_cpu, pc, * FLD (i_Ri), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-}
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_ANDB) : /* andb $Rj,@$Ri */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_str13.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- QI tmp_tmp;
- tmp_tmp = ANDQI (GETMEMQI (current_cpu, pc, * FLD (i_Ri)), * FLD (i_Rj));
-{
- {
- BI opval = EQQI (tmp_tmp, 0);
- CPU (h_zbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
- }
- {
- BI opval = LTQI (tmp_tmp, 0);
- CPU (h_nbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
- }
-}
- {
- QI opval = tmp_tmp;
- SETMEMQI (current_cpu, pc, * FLD (i_Ri), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-}
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_ORM) : /* or $Rj,@$Ri */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_str13.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- SI tmp_tmp;
- tmp_tmp = ORSI (GETMEMSI (current_cpu, pc, * FLD (i_Ri)), * FLD (i_Rj));
-{
- {
- BI opval = EQSI (tmp_tmp, 0);
- CPU (h_zbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
- }
- {
- BI opval = LTSI (tmp_tmp, 0);
- CPU (h_nbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
- }
-}
- {
- SI opval = tmp_tmp;
- SETMEMSI (current_cpu, pc, * FLD (i_Ri), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-}
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_ORH) : /* orh $Rj,@$Ri */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_str13.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- HI tmp_tmp;
- tmp_tmp = ORHI (GETMEMHI (current_cpu, pc, * FLD (i_Ri)), * FLD (i_Rj));
-{
- {
- BI opval = EQHI (tmp_tmp, 0);
- CPU (h_zbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
- }
- {
- BI opval = LTHI (tmp_tmp, 0);
- CPU (h_nbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
- }
-}
- {
- HI opval = tmp_tmp;
- SETMEMHI (current_cpu, pc, * FLD (i_Ri), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-}
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_ORB) : /* orb $Rj,@$Ri */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_str13.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- QI tmp_tmp;
- tmp_tmp = ORQI (GETMEMQI (current_cpu, pc, * FLD (i_Ri)), * FLD (i_Rj));
-{
- {
- BI opval = EQQI (tmp_tmp, 0);
- CPU (h_zbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
- }
- {
- BI opval = LTQI (tmp_tmp, 0);
- CPU (h_nbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
- }
-}
- {
- QI opval = tmp_tmp;
- SETMEMQI (current_cpu, pc, * FLD (i_Ri), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-}
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_EORM) : /* eor $Rj,@$Ri */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_str13.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- SI tmp_tmp;
- tmp_tmp = XORSI (GETMEMSI (current_cpu, pc, * FLD (i_Ri)), * FLD (i_Rj));
-{
- {
- BI opval = EQSI (tmp_tmp, 0);
- CPU (h_zbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
- }
- {
- BI opval = LTSI (tmp_tmp, 0);
- CPU (h_nbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
- }
-}
- {
- SI opval = tmp_tmp;
- SETMEMSI (current_cpu, pc, * FLD (i_Ri), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-}
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_EORH) : /* eorh $Rj,@$Ri */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_str13.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- HI tmp_tmp;
- tmp_tmp = XORHI (GETMEMHI (current_cpu, pc, * FLD (i_Ri)), * FLD (i_Rj));
-{
- {
- BI opval = EQHI (tmp_tmp, 0);
- CPU (h_zbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
- }
- {
- BI opval = LTHI (tmp_tmp, 0);
- CPU (h_nbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
- }
-}
- {
- HI opval = tmp_tmp;
- SETMEMHI (current_cpu, pc, * FLD (i_Ri), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-}
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_EORB) : /* eorb $Rj,@$Ri */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_str13.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- QI tmp_tmp;
- tmp_tmp = XORQI (GETMEMQI (current_cpu, pc, * FLD (i_Ri)), * FLD (i_Rj));
-{
- {
- BI opval = EQQI (tmp_tmp, 0);
- CPU (h_zbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
- }
- {
- BI opval = LTQI (tmp_tmp, 0);
- CPU (h_nbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
- }
-}
- {
- QI opval = tmp_tmp;
- SETMEMQI (current_cpu, pc, * FLD (i_Ri), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-}
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_BANDL) : /* bandl $u4,@$Ri */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_addi.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- QI opval = ANDQI (ORQI (FLD (f_u4), 240), GETMEMQI (current_cpu, pc, * FLD (i_Ri)));
- SETMEMQI (current_cpu, pc, * FLD (i_Ri), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_BORL) : /* borl $u4,@$Ri */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_addi.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- QI opval = ORQI (FLD (f_u4), GETMEMQI (current_cpu, pc, * FLD (i_Ri)));
- SETMEMQI (current_cpu, pc, * FLD (i_Ri), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_BEORL) : /* beorl $u4,@$Ri */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_addi.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- QI opval = XORQI (FLD (f_u4), GETMEMQI (current_cpu, pc, * FLD (i_Ri)));
- SETMEMQI (current_cpu, pc, * FLD (i_Ri), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_BANDH) : /* bandh $u4,@$Ri */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_addi.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- QI opval = ANDQI (ORQI (SLLQI (FLD (f_u4), 4), 15), GETMEMQI (current_cpu, pc, * FLD (i_Ri)));
- SETMEMQI (current_cpu, pc, * FLD (i_Ri), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_BORH) : /* borh $u4,@$Ri */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_addi.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- QI opval = ORQI (SLLQI (FLD (f_u4), 4), GETMEMQI (current_cpu, pc, * FLD (i_Ri)));
- SETMEMQI (current_cpu, pc, * FLD (i_Ri), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_BEORH) : /* beorh $u4,@$Ri */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_addi.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- QI opval = XORQI (SLLQI (FLD (f_u4), 4), GETMEMQI (current_cpu, pc, * FLD (i_Ri)));
- SETMEMQI (current_cpu, pc, * FLD (i_Ri), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_BTSTL) : /* btstl $u4,@$Ri */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_addi.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- QI tmp_tmp;
- tmp_tmp = ANDQI (FLD (f_u4), GETMEMQI (current_cpu, pc, * FLD (i_Ri)));
- {
- BI opval = EQQI (tmp_tmp, 0);
- CPU (h_zbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
- }
- {
- BI opval = 0;
- CPU (h_nbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
- }
-}
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_BTSTH) : /* btsth $u4,@$Ri */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_addi.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- QI tmp_tmp;
- tmp_tmp = ANDQI (SLLQI (FLD (f_u4), 4), GETMEMQI (current_cpu, pc, * FLD (i_Ri)));
- {
- BI opval = EQQI (tmp_tmp, 0);
- CPU (h_zbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
- }
- {
- BI opval = LTQI (tmp_tmp, 0);
- CPU (h_nbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
- }
-}
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_MUL) : /* mul $Rj,$Ri */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_str13.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- DI tmp_tmp;
- tmp_tmp = MULDI (EXTSIDI (* FLD (i_Rj)), EXTSIDI (* FLD (i_Ri)));
- {
- SI opval = TRUNCDISI (tmp_tmp);
- SET_H_DR (((UINT) 5), opval);
- TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
- }
- {
- SI opval = TRUNCDISI (SRLDI (tmp_tmp, 32));
- SET_H_DR (((UINT) 4), opval);
- TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
- }
- {
- BI opval = LTSI (GET_H_DR (((UINT) 5)), 0);
- CPU (h_nbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
- }
- {
- BI opval = EQDI (tmp_tmp, MAKEDI (0, 0));
- CPU (h_zbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
- }
- {
- BI opval = ORIF (GTDI (tmp_tmp, MAKEDI (0, 2147483647)), LTDI (tmp_tmp, NEGDI (MAKEDI (0, 0x80000000))));
- CPU (h_vbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
- }
-}
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_MULU) : /* mulu $Rj,$Ri */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_str13.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- DI tmp_tmp;
- tmp_tmp = MULDI (ZEXTSIDI (* FLD (i_Rj)), ZEXTSIDI (* FLD (i_Ri)));
- {
- SI opval = TRUNCDISI (tmp_tmp);
- SET_H_DR (((UINT) 5), opval);
- TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
- }
- {
- SI opval = TRUNCDISI (SRLDI (tmp_tmp, 32));
- SET_H_DR (((UINT) 4), opval);
- TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
- }
- {
- BI opval = LTSI (GET_H_DR (((UINT) 4)), 0);
- CPU (h_nbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
- }
- {
- BI opval = EQSI (GET_H_DR (((UINT) 5)), 0);
- CPU (h_zbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
- }
- {
- BI opval = NESI (GET_H_DR (((UINT) 4)), 0);
- CPU (h_vbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
- }
-}
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_MULH) : /* mulh $Rj,$Ri */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_str13.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- {
- SI opval = MULHI (TRUNCSIHI (* FLD (i_Rj)), TRUNCSIHI (* FLD (i_Ri)));
- SET_H_DR (((UINT) 5), opval);
- TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
- }
- {
- BI opval = LTSI (GET_H_DR (((UINT) 5)), 0);
- CPU (h_nbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
- }
- {
- BI opval = GESI (GET_H_DR (((UINT) 5)), 0);
- CPU (h_zbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
- }
-}
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_MULUH) : /* muluh $Rj,$Ri */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_str13.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- {
- SI opval = MULSI (ANDSI (* FLD (i_Rj), 65535), ANDSI (* FLD (i_Ri), 65535));
- SET_H_DR (((UINT) 5), opval);
- TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
- }
- {
- BI opval = LTSI (GET_H_DR (((UINT) 5)), 0);
- CPU (h_nbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
- }
- {
- BI opval = GESI (GET_H_DR (((UINT) 5)), 0);
- CPU (h_zbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
- }
-}
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_DIV0S) : /* div0s $Ri */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_mov2dr.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- {
- BI opval = LTSI (GET_H_DR (((UINT) 5)), 0);
- CPU (h_d0bit) = opval;
- TRACE_RESULT (current_cpu, abuf, "d0bit", 'x', opval);
- }
- {
- BI opval = XORBI (CPU (h_d0bit), LTSI (* FLD (i_Ri), 0));
- CPU (h_d1bit) = opval;
- TRACE_RESULT (current_cpu, abuf, "d1bit", 'x', opval);
- }
-if (NEBI (CPU (h_d0bit), 0)) {
- {
- SI opval = 0xffffffff;
- SET_H_DR (((UINT) 4), opval);
- written |= (1 << 5);
- TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
- }
-} else {
- {
- SI opval = 0;
- SET_H_DR (((UINT) 4), opval);
- written |= (1 << 5);
- TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
- }
-}
-}
-
- abuf->written = written;
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_DIV0U) : /* div0u $Ri */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_empty.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- {
- BI opval = 0;
- CPU (h_d0bit) = opval;
- TRACE_RESULT (current_cpu, abuf, "d0bit", 'x', opval);
- }
- {
- BI opval = 0;
- CPU (h_d1bit) = opval;
- TRACE_RESULT (current_cpu, abuf, "d1bit", 'x', opval);
- }
- {
- SI opval = 0;
- SET_H_DR (((UINT) 4), opval);
- TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
- }
-}
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_DIV1) : /* div1 $Ri */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_mov2dr.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- SI tmp_tmp;
- {
- SI opval = SLLSI (GET_H_DR (((UINT) 4)), 1);
- SET_H_DR (((UINT) 4), opval);
- TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
- }
-if (LTSI (GET_H_DR (((UINT) 5)), 0)) {
- {
- SI opval = ADDSI (GET_H_DR (((UINT) 4)), 1);
- SET_H_DR (((UINT) 4), opval);
- TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
- }
-}
- {
- SI opval = SLLSI (GET_H_DR (((UINT) 5)), 1);
- SET_H_DR (((UINT) 5), opval);
- TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
- }
-if (EQBI (CPU (h_d1bit), 1)) {
-{
- tmp_tmp = ADDSI (GET_H_DR (((UINT) 4)), * FLD (i_Ri));
- {
- BI opval = ADDCFSI (GET_H_DR (((UINT) 4)), * FLD (i_Ri), 0);
- CPU (h_cbit) = opval;
- written |= (1 << 6);
- TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
- }
-}
-} else {
-{
- tmp_tmp = SUBSI (GET_H_DR (((UINT) 4)), * FLD (i_Ri));
- {
- BI opval = SUBCFSI (GET_H_DR (((UINT) 4)), * FLD (i_Ri), 0);
- CPU (h_cbit) = opval;
- written |= (1 << 6);
- TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
- }
-}
-}
-if (NOTBI (XORBI (XORBI (CPU (h_d0bit), CPU (h_d1bit)), CPU (h_cbit)))) {
-{
- {
- SI opval = tmp_tmp;
- SET_H_DR (((UINT) 4), opval);
- TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
- }
- {
- SI opval = ORSI (GET_H_DR (((UINT) 5)), 1);
- SET_H_DR (((UINT) 5), opval);
- TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
- }
-}
-}
- {
- BI opval = EQSI (GET_H_DR (((UINT) 4)), 0);
- CPU (h_zbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
- }
-}
-
- abuf->written = written;
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_DIV2) : /* div2 $Ri */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_mov2dr.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- SI tmp_tmp;
-if (EQBI (CPU (h_d1bit), 1)) {
-{
- tmp_tmp = ADDSI (GET_H_DR (((UINT) 4)), * FLD (i_Ri));
- {
- BI opval = ADDCFSI (GET_H_DR (((UINT) 4)), * FLD (i_Ri), 0);
- CPU (h_cbit) = opval;
- written |= (1 << 3);
- TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
- }
-}
-} else {
-{
- tmp_tmp = SUBSI (GET_H_DR (((UINT) 4)), * FLD (i_Ri));
- {
- BI opval = SUBCFSI (GET_H_DR (((UINT) 4)), * FLD (i_Ri), 0);
- CPU (h_cbit) = opval;
- written |= (1 << 3);
- TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
- }
-}
-}
-if (EQSI (tmp_tmp, 0)) {
-{
- {
- BI opval = 1;
- CPU (h_zbit) = opval;
- written |= (1 << 5);
- TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
- }
- {
- SI opval = 0;
- SET_H_DR (((UINT) 4), opval);
- written |= (1 << 4);
- TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
- }
-}
-} else {
- {
- BI opval = 0;
- CPU (h_zbit) = opval;
- written |= (1 << 5);
- TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
- }
-}
-}
-
- abuf->written = written;
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_DIV3) : /* div3 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_empty.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-if (EQBI (CPU (h_zbit), 1)) {
- {
- SI opval = ADDSI (GET_H_DR (((UINT) 5)), 1);
- SET_H_DR (((UINT) 5), opval);
- written |= (1 << 2);
- TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
- }
-}
-
- abuf->written = written;
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_DIV4S) : /* div4s */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_empty.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-if (EQBI (CPU (h_d1bit), 1)) {
- {
- SI opval = NEGSI (GET_H_DR (((UINT) 5)));
- SET_H_DR (((UINT) 5), opval);
- written |= (1 << 2);
- TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
- }
-}
-
- abuf->written = written;
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_LSL) : /* lsl $Rj,$Ri */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_add.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- SI tmp_shift;
- tmp_shift = ANDSI (* FLD (i_Rj), 31);
-if (NESI (tmp_shift, 0)) {
-{
- {
- BI opval = NESI (ANDSI (* FLD (i_Ri), SLLSI (1, SUBSI (32, tmp_shift))), 0);
- CPU (h_cbit) = opval;
- written |= (1 << 3);
- TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
- }
- {
- SI opval = SLLSI (* FLD (i_Ri), tmp_shift);
- * FLD (i_Ri) = opval;
- written |= (1 << 2);
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-}
-} else {
- {
- BI opval = 0;
- CPU (h_cbit) = opval;
- written |= (1 << 3);
- TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
- }
-}
- {
- BI opval = LTSI (* FLD (i_Ri), 0);
- CPU (h_nbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
- }
- {
- BI opval = EQSI (* FLD (i_Ri), 0);
- CPU (h_zbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
- }
-}
-
- abuf->written = written;
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_LSLI) : /* lsl $u4,$Ri */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_addi.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- SI tmp_shift;
- tmp_shift = FLD (f_u4);
-if (NESI (tmp_shift, 0)) {
-{
- {
- BI opval = NESI (ANDSI (* FLD (i_Ri), SLLSI (1, SUBSI (32, tmp_shift))), 0);
- CPU (h_cbit) = opval;
- written |= (1 << 3);
- TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
- }
- {
- SI opval = SLLSI (* FLD (i_Ri), tmp_shift);
- * FLD (i_Ri) = opval;
- written |= (1 << 2);
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-}
-} else {
- {
- BI opval = 0;
- CPU (h_cbit) = opval;
- written |= (1 << 3);
- TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
- }
-}
- {
- BI opval = LTSI (* FLD (i_Ri), 0);
- CPU (h_nbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
- }
- {
- BI opval = EQSI (* FLD (i_Ri), 0);
- CPU (h_zbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
- }
-}
-
- abuf->written = written;
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_LSL2) : /* lsl2 $u4,$Ri */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_addi.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- SI tmp_shift;
- tmp_shift = ADDSI (FLD (f_u4), 16);
-if (NESI (tmp_shift, 0)) {
-{
- {
- BI opval = NESI (ANDSI (* FLD (i_Ri), SLLSI (1, SUBSI (32, tmp_shift))), 0);
- CPU (h_cbit) = opval;
- written |= (1 << 3);
- TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
- }
- {
- SI opval = SLLSI (* FLD (i_Ri), tmp_shift);
- * FLD (i_Ri) = opval;
- written |= (1 << 2);
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-}
-} else {
- {
- BI opval = 0;
- CPU (h_cbit) = opval;
- written |= (1 << 3);
- TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
- }
-}
- {
- BI opval = LTSI (* FLD (i_Ri), 0);
- CPU (h_nbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
- }
- {
- BI opval = EQSI (* FLD (i_Ri), 0);
- CPU (h_zbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
- }
-}
-
- abuf->written = written;
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_LSR) : /* lsr $Rj,$Ri */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_add.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- SI tmp_shift;
- tmp_shift = ANDSI (* FLD (i_Rj), 31);
-if (NESI (tmp_shift, 0)) {
-{
- {
- BI opval = NESI (ANDSI (* FLD (i_Ri), SLLSI (1, SUBSI (tmp_shift, 1))), 0);
- CPU (h_cbit) = opval;
- written |= (1 << 3);
- TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
- }
- {
- SI opval = SRLSI (* FLD (i_Ri), tmp_shift);
- * FLD (i_Ri) = opval;
- written |= (1 << 2);
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-}
-} else {
- {
- BI opval = 0;
- CPU (h_cbit) = opval;
- written |= (1 << 3);
- TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
- }
-}
- {
- BI opval = LTSI (* FLD (i_Ri), 0);
- CPU (h_nbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
- }
- {
- BI opval = EQSI (* FLD (i_Ri), 0);
- CPU (h_zbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
- }
-}
-
- abuf->written = written;
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_LSRI) : /* lsr $u4,$Ri */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_addi.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- SI tmp_shift;
- tmp_shift = FLD (f_u4);
-if (NESI (tmp_shift, 0)) {
-{
- {
- BI opval = NESI (ANDSI (* FLD (i_Ri), SLLSI (1, SUBSI (tmp_shift, 1))), 0);
- CPU (h_cbit) = opval;
- written |= (1 << 3);
- TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
- }
- {
- SI opval = SRLSI (* FLD (i_Ri), tmp_shift);
- * FLD (i_Ri) = opval;
- written |= (1 << 2);
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-}
-} else {
- {
- BI opval = 0;
- CPU (h_cbit) = opval;
- written |= (1 << 3);
- TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
- }
-}
- {
- BI opval = LTSI (* FLD (i_Ri), 0);
- CPU (h_nbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
- }
- {
- BI opval = EQSI (* FLD (i_Ri), 0);
- CPU (h_zbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
- }
-}
-
- abuf->written = written;
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_LSR2) : /* lsr2 $u4,$Ri */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_addi.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- SI tmp_shift;
- tmp_shift = ADDSI (FLD (f_u4), 16);
-if (NESI (tmp_shift, 0)) {
-{
- {
- BI opval = NESI (ANDSI (* FLD (i_Ri), SLLSI (1, SUBSI (tmp_shift, 1))), 0);
- CPU (h_cbit) = opval;
- written |= (1 << 3);
- TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
- }
- {
- SI opval = SRLSI (* FLD (i_Ri), tmp_shift);
- * FLD (i_Ri) = opval;
- written |= (1 << 2);
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-}
-} else {
- {
- BI opval = 0;
- CPU (h_cbit) = opval;
- written |= (1 << 3);
- TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
- }
-}
- {
- BI opval = LTSI (* FLD (i_Ri), 0);
- CPU (h_nbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
- }
- {
- BI opval = EQSI (* FLD (i_Ri), 0);
- CPU (h_zbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
- }
-}
-
- abuf->written = written;
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_ASR) : /* asr $Rj,$Ri */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_add.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- SI tmp_shift;
- tmp_shift = ANDSI (* FLD (i_Rj), 31);
-if (NESI (tmp_shift, 0)) {
-{
- {
- BI opval = NESI (ANDSI (* FLD (i_Ri), SLLSI (1, SUBSI (tmp_shift, 1))), 0);
- CPU (h_cbit) = opval;
- written |= (1 << 3);
- TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
- }
- {
- SI opval = SRASI (* FLD (i_Ri), tmp_shift);
- * FLD (i_Ri) = opval;
- written |= (1 << 2);
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-}
-} else {
- {
- BI opval = 0;
- CPU (h_cbit) = opval;
- written |= (1 << 3);
- TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
- }
-}
- {
- BI opval = LTSI (* FLD (i_Ri), 0);
- CPU (h_nbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
- }
- {
- BI opval = EQSI (* FLD (i_Ri), 0);
- CPU (h_zbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
- }
-}
-
- abuf->written = written;
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_ASRI) : /* asr $u4,$Ri */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_addi.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- SI tmp_shift;
- tmp_shift = FLD (f_u4);
-if (NESI (tmp_shift, 0)) {
-{
- {
- BI opval = NESI (ANDSI (* FLD (i_Ri), SLLSI (1, SUBSI (tmp_shift, 1))), 0);
- CPU (h_cbit) = opval;
- written |= (1 << 3);
- TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
- }
- {
- SI opval = SRASI (* FLD (i_Ri), tmp_shift);
- * FLD (i_Ri) = opval;
- written |= (1 << 2);
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-}
-} else {
- {
- BI opval = 0;
- CPU (h_cbit) = opval;
- written |= (1 << 3);
- TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
- }
-}
- {
- BI opval = LTSI (* FLD (i_Ri), 0);
- CPU (h_nbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
- }
- {
- BI opval = EQSI (* FLD (i_Ri), 0);
- CPU (h_zbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
- }
-}
-
- abuf->written = written;
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_ASR2) : /* asr2 $u4,$Ri */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_addi.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- SI tmp_shift;
- tmp_shift = ADDSI (FLD (f_u4), 16);
-if (NESI (tmp_shift, 0)) {
-{
- {
- BI opval = NESI (ANDSI (* FLD (i_Ri), SLLSI (1, SUBSI (tmp_shift, 1))), 0);
- CPU (h_cbit) = opval;
- written |= (1 << 3);
- TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
- }
- {
- SI opval = SRASI (* FLD (i_Ri), tmp_shift);
- * FLD (i_Ri) = opval;
- written |= (1 << 2);
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-}
-} else {
- {
- BI opval = 0;
- CPU (h_cbit) = opval;
- written |= (1 << 3);
- TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
- }
-}
- {
- BI opval = LTSI (* FLD (i_Ri), 0);
- CPU (h_nbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
- }
- {
- BI opval = EQSI (* FLD (i_Ri), 0);
- CPU (h_zbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
- }
-}
-
- abuf->written = written;
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_LDI8) : /* ldi:8 $i8,$Ri */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_ldi8.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = FLD (f_i8);
- * FLD (i_Ri) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_LDI20) : /* ldi:20 $i20,$Ri */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_ldi20.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = FLD (f_i20);
- * FLD (i_Ri) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_LDI32) : /* ldi:32 $i32,$Ri */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_ldi32.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 6);
-
- {
- SI opval = FLD (f_i32);
- * FLD (i_Ri) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_LD) : /* ld @$Rj,$Ri */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_ldr13.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = GETMEMSI (current_cpu, pc, * FLD (i_Rj));
- * FLD (i_Ri) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_LDUH) : /* lduh @$Rj,$Ri */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_ldr13.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = GETMEMUHI (current_cpu, pc, * FLD (i_Rj));
- * FLD (i_Ri) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_LDUB) : /* ldub @$Rj,$Ri */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_ldr13.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = GETMEMUQI (current_cpu, pc, * FLD (i_Rj));
- * FLD (i_Ri) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_LDR13) : /* ld @($R13,$Rj),$Ri */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_ldr13.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = GETMEMSI (current_cpu, pc, ADDSI (* FLD (i_Rj), CPU (h_gr[((UINT) 13)])));
- * FLD (i_Ri) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_LDR13UH) : /* lduh @($R13,$Rj),$Ri */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_ldr13.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = GETMEMUHI (current_cpu, pc, ADDSI (* FLD (i_Rj), CPU (h_gr[((UINT) 13)])));
- * FLD (i_Ri) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_LDR13UB) : /* ldub @($R13,$Rj),$Ri */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_ldr13.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = GETMEMUQI (current_cpu, pc, ADDSI (* FLD (i_Rj), CPU (h_gr[((UINT) 13)])));
- * FLD (i_Ri) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_LDR14) : /* ld @($R14,$disp10),$Ri */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_ldr14.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = GETMEMSI (current_cpu, pc, ADDSI (FLD (f_disp10), CPU (h_gr[((UINT) 14)])));
- * FLD (i_Ri) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_LDR14UH) : /* lduh @($R14,$disp9),$Ri */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_ldr14uh.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = GETMEMUHI (current_cpu, pc, ADDSI (FLD (f_disp9), CPU (h_gr[((UINT) 14)])));
- * FLD (i_Ri) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_LDR14UB) : /* ldub @($R14,$disp8),$Ri */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_ldr14ub.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = GETMEMUQI (current_cpu, pc, ADDSI (FLD (f_disp8), CPU (h_gr[((UINT) 14)])));
- * FLD (i_Ri) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_LDR15) : /* ld @($R15,$udisp6),$Ri */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_ldr15.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = GETMEMSI (current_cpu, pc, ADDSI (FLD (f_udisp6), CPU (h_gr[((UINT) 15)])));
- * FLD (i_Ri) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_LDR15GR) : /* ld @$R15+,$Ri */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_ldr15gr.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- {
- SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]));
- * FLD (i_Ri) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-if (NESI (FLD (f_Ri), 15)) {
- {
- SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4);
- CPU (h_gr[((UINT) 15)]) = opval;
- written |= (1 << 4);
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-}
-}
-
- abuf->written = written;
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_LDR15DR) : /* ld @$R15+,$Rs2 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_ldr15dr.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- SI tmp_tmp;
- tmp_tmp = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]));
- {
- SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4);
- CPU (h_gr[((UINT) 15)]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
- {
- SI opval = tmp_tmp;
- SET_H_DR (FLD (f_Rs2), opval);
- TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
- }
-}
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_LDR15PS) : /* ld @$R15+,$ps */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_addsp.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- {
- USI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]));
- SET_H_PS (opval);
- TRACE_RESULT (current_cpu, abuf, "ps", 'x', opval);
- }
- {
- SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4);
- CPU (h_gr[((UINT) 15)]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-}
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_ST) : /* st $Ri,@$Rj */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_str13.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = * FLD (i_Ri);
- SETMEMSI (current_cpu, pc, * FLD (i_Rj), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_STH) : /* sth $Ri,@$Rj */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_str13.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- HI opval = * FLD (i_Ri);
- SETMEMHI (current_cpu, pc, * FLD (i_Rj), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_STB) : /* stb $Ri,@$Rj */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_str13.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- QI opval = * FLD (i_Ri);
- SETMEMQI (current_cpu, pc, * FLD (i_Rj), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_STR13) : /* st $Ri,@($R13,$Rj) */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_str13.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = * FLD (i_Ri);
- SETMEMSI (current_cpu, pc, ADDSI (* FLD (i_Rj), CPU (h_gr[((UINT) 13)])), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_STR13H) : /* sth $Ri,@($R13,$Rj) */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_str13.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- HI opval = * FLD (i_Ri);
- SETMEMHI (current_cpu, pc, ADDSI (* FLD (i_Rj), CPU (h_gr[((UINT) 13)])), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_STR13B) : /* stb $Ri,@($R13,$Rj) */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_str13.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- QI opval = * FLD (i_Ri);
- SETMEMQI (current_cpu, pc, ADDSI (* FLD (i_Rj), CPU (h_gr[((UINT) 13)])), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_STR14) : /* st $Ri,@($R14,$disp10) */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_str14.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = * FLD (i_Ri);
- SETMEMSI (current_cpu, pc, ADDSI (FLD (f_disp10), CPU (h_gr[((UINT) 14)])), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_STR14H) : /* sth $Ri,@($R14,$disp9) */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_str14h.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- HI opval = * FLD (i_Ri);
- SETMEMHI (current_cpu, pc, ADDSI (FLD (f_disp9), CPU (h_gr[((UINT) 14)])), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_STR14B) : /* stb $Ri,@($R14,$disp8) */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_str14b.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- QI opval = * FLD (i_Ri);
- SETMEMQI (current_cpu, pc, ADDSI (FLD (f_disp8), CPU (h_gr[((UINT) 14)])), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_STR15) : /* st $Ri,@($R15,$udisp6) */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_str15.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = * FLD (i_Ri);
- SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 15)]), FLD (f_udisp6)), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_STR15GR) : /* st $Ri,@-$R15 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_str15gr.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- SI tmp_tmp;
- tmp_tmp = * FLD (i_Ri);
- {
- SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4);
- CPU (h_gr[((UINT) 15)]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
- {
- SI opval = tmp_tmp;
- SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-}
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_STR15DR) : /* st $Rs2,@-$R15 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_ldr15dr.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- SI tmp_tmp;
- tmp_tmp = GET_H_DR (FLD (f_Rs2));
- {
- SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4);
- CPU (h_gr[((UINT) 15)]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
- {
- SI opval = tmp_tmp;
- SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-}
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_STR15PS) : /* st $ps,@-$R15 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_addsp.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- {
- SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4);
- CPU (h_gr[((UINT) 15)]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
- {
- SI opval = GET_H_PS ();
- SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-}
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_MOV) : /* mov $Rj,$Ri */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_ldr13.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = * FLD (i_Rj);
- * FLD (i_Ri) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_MOVDR) : /* mov $Rs1,$Ri */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_movdr.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = GET_H_DR (FLD (f_Rs1));
- * FLD (i_Ri) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_MOVPS) : /* mov $ps,$Ri */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_movdr.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = GET_H_PS ();
- * FLD (i_Ri) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_MOV2DR) : /* mov $Ri,$Rs1 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_mov2dr.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = * FLD (i_Ri);
- SET_H_DR (FLD (f_Rs1), opval);
- TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_MOV2PS) : /* mov $Ri,$ps */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_mov2dr.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- USI opval = * FLD (i_Ri);
- SET_H_PS (opval);
- TRACE_RESULT (current_cpu, abuf, "ps", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_JMP) : /* jmp @$Ri */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_mov2dr.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- USI opval = * FLD (i_Ri);
- SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-
- SEM_BRANCH_FINI (vpc);
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_JMPD) : /* jmp:d @$Ri */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_mov2dr.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- {
- USI opval = * FLD (i_Ri);
- SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- SEM_BRANCH_FINI (vpc);
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_CALLR) : /* call @$Ri */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_mov2dr.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- {
- SI opval = ADDSI (pc, 2);
- SET_H_DR (((UINT) 1), opval);
- TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
- }
- {
- USI opval = * FLD (i_Ri);
- SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- SEM_BRANCH_FINI (vpc);
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_CALLRD) : /* call:d @$Ri */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_mov2dr.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
-{
- {
- SI opval = ADDSI (pc, 4);
- SET_H_DR (((UINT) 1), opval);
- TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
- }
- {
- USI opval = * FLD (i_Ri);
- SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-}
-
- SEM_BRANCH_FINI (vpc);
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_CALL) : /* call $label12 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_call.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- {
- SI opval = ADDSI (pc, 2);
- SET_H_DR (((UINT) 1), opval);
- TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
- }
- {
- USI opval = FLD (i_label12);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- SEM_BRANCH_FINI (vpc);
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_CALLD) : /* call:d $label12 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_call.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
-{
- {
- SI opval = ADDSI (pc, 4);
- SET_H_DR (((UINT) 1), opval);
- TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
- }
- {
- USI opval = FLD (i_label12);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-}
-
- SEM_BRANCH_FINI (vpc);
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_RET) : /* ret */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_empty.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- USI opval = GET_H_DR (((UINT) 1));
- SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-
- SEM_BRANCH_FINI (vpc);
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_RET_D) : /* ret:d */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_empty.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- {
- USI opval = GET_H_DR (((UINT) 1));
- SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- SEM_BRANCH_FINI (vpc);
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_INT) : /* int $u8 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_int.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
-; /*clobber*/
-; /*clobber*/
-; /*clobber*/
- {
- SI opval = fr30_int (current_cpu, pc, FLD (f_u8));
- SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- SEM_BRANCH_FINI (vpc);
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_INTE) : /* inte */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_empty.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
-; /*clobber*/
-; /*clobber*/
-; /*clobber*/
- {
- SI opval = fr30_inte (current_cpu, pc);
- SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- SEM_BRANCH_FINI (vpc);
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_RETI) : /* reti */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_empty.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-if (EQBI (GET_H_SBIT (), 0)) {
-{
- {
- SI opval = GETMEMSI (current_cpu, pc, GET_H_DR (((UINT) 2)));
- SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 7);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
- {
- SI opval = ADDSI (GET_H_DR (((UINT) 2)), 4);
- SET_H_DR (((UINT) 2), opval);
- written |= (1 << 5);
- TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
- }
- {
- SI opval = GETMEMSI (current_cpu, pc, GET_H_DR (((UINT) 2)));
- SET_H_PS (opval);
- written |= (1 << 8);
- TRACE_RESULT (current_cpu, abuf, "ps", 'x', opval);
- }
- {
- SI opval = ADDSI (GET_H_DR (((UINT) 2)), 4);
- SET_H_DR (((UINT) 2), opval);
- written |= (1 << 5);
- TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
- }
-}
-} else {
-{
- {
- SI opval = GETMEMSI (current_cpu, pc, GET_H_DR (((UINT) 3)));
- SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 7);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
- {
- SI opval = ADDSI (GET_H_DR (((UINT) 3)), 4);
- SET_H_DR (((UINT) 3), opval);
- written |= (1 << 6);
- TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
- }
- {
- SI opval = GETMEMSI (current_cpu, pc, GET_H_DR (((UINT) 3)));
- SET_H_PS (opval);
- written |= (1 << 8);
- TRACE_RESULT (current_cpu, abuf, "ps", 'x', opval);
- }
- {
- SI opval = ADDSI (GET_H_DR (((UINT) 3)), 4);
- SET_H_DR (((UINT) 3), opval);
- written |= (1 << 6);
- TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
- }
-}
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_BRAD) : /* bra:d $label9 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_brad.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- {
- USI opval = FLD (i_label9);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- SEM_BRANCH_FINI (vpc);
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_BRA) : /* bra $label9 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_brad.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- USI opval = FLD (i_label9);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-
- SEM_BRANCH_FINI (vpc);
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_BNOD) : /* bno:d $label9 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_empty.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
-((void) 0); /*nop*/
-}
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_BNO) : /* bno $label9 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_empty.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-((void) 0); /*nop*/
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_BEQD) : /* beq:d $label9 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_brad.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
-if (CPU (h_zbit)) {
- {
- USI opval = FLD (i_label9);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 2);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_BEQ) : /* beq $label9 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_brad.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-if (CPU (h_zbit)) {
- {
- USI opval = FLD (i_label9);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 2);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_BNED) : /* bne:d $label9 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_brad.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
-if (NOTBI (CPU (h_zbit))) {
- {
- USI opval = FLD (i_label9);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 2);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_BNE) : /* bne $label9 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_brad.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-if (NOTBI (CPU (h_zbit))) {
- {
- USI opval = FLD (i_label9);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 2);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_BCD) : /* bc:d $label9 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_brad.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
-if (CPU (h_cbit)) {
- {
- USI opval = FLD (i_label9);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 2);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_BC) : /* bc $label9 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_brad.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-if (CPU (h_cbit)) {
- {
- USI opval = FLD (i_label9);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 2);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_BNCD) : /* bnc:d $label9 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_brad.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
-if (NOTBI (CPU (h_cbit))) {
- {
- USI opval = FLD (i_label9);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 2);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_BNC) : /* bnc $label9 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_brad.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-if (NOTBI (CPU (h_cbit))) {
- {
- USI opval = FLD (i_label9);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 2);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_BND) : /* bn:d $label9 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_brad.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
-if (CPU (h_nbit)) {
- {
- USI opval = FLD (i_label9);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 2);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_BN) : /* bn $label9 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_brad.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-if (CPU (h_nbit)) {
- {
- USI opval = FLD (i_label9);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 2);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_BPD) : /* bp:d $label9 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_brad.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
-if (NOTBI (CPU (h_nbit))) {
- {
- USI opval = FLD (i_label9);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 2);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_BP) : /* bp $label9 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_brad.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-if (NOTBI (CPU (h_nbit))) {
- {
- USI opval = FLD (i_label9);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 2);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_BVD) : /* bv:d $label9 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_brad.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
-if (CPU (h_vbit)) {
- {
- USI opval = FLD (i_label9);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 2);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_BV) : /* bv $label9 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_brad.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-if (CPU (h_vbit)) {
- {
- USI opval = FLD (i_label9);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 2);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_BNVD) : /* bnv:d $label9 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_brad.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
-if (NOTBI (CPU (h_vbit))) {
- {
- USI opval = FLD (i_label9);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 2);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_BNV) : /* bnv $label9 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_brad.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-if (NOTBI (CPU (h_vbit))) {
- {
- USI opval = FLD (i_label9);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 2);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_BLTD) : /* blt:d $label9 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_brad.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
-if (XORBI (CPU (h_vbit), CPU (h_nbit))) {
- {
- USI opval = FLD (i_label9);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 3);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_BLT) : /* blt $label9 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_brad.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-if (XORBI (CPU (h_vbit), CPU (h_nbit))) {
- {
- USI opval = FLD (i_label9);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 3);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_BGED) : /* bge:d $label9 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_brad.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
-if (NOTBI (XORBI (CPU (h_vbit), CPU (h_nbit)))) {
- {
- USI opval = FLD (i_label9);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 3);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_BGE) : /* bge $label9 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_brad.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-if (NOTBI (XORBI (CPU (h_vbit), CPU (h_nbit)))) {
- {
- USI opval = FLD (i_label9);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 3);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_BLED) : /* ble:d $label9 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_brad.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
-if (ORBI (XORBI (CPU (h_vbit), CPU (h_nbit)), CPU (h_zbit))) {
- {
- USI opval = FLD (i_label9);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 4);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_BLE) : /* ble $label9 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_brad.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-if (ORBI (XORBI (CPU (h_vbit), CPU (h_nbit)), CPU (h_zbit))) {
- {
- USI opval = FLD (i_label9);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 4);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_BGTD) : /* bgt:d $label9 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_brad.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
-if (NOTBI (ORBI (XORBI (CPU (h_vbit), CPU (h_nbit)), CPU (h_zbit)))) {
- {
- USI opval = FLD (i_label9);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 4);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_BGT) : /* bgt $label9 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_brad.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-if (NOTBI (ORBI (XORBI (CPU (h_vbit), CPU (h_nbit)), CPU (h_zbit)))) {
- {
- USI opval = FLD (i_label9);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 4);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_BLSD) : /* bls:d $label9 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_brad.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
-if (ORBI (CPU (h_cbit), CPU (h_zbit))) {
- {
- USI opval = FLD (i_label9);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 3);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_BLS) : /* bls $label9 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_brad.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-if (ORBI (CPU (h_cbit), CPU (h_zbit))) {
- {
- USI opval = FLD (i_label9);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 3);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_BHID) : /* bhi:d $label9 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_brad.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
-if (NOTBI (ORBI (CPU (h_cbit), CPU (h_zbit)))) {
- {
- USI opval = FLD (i_label9);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 3);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_BHI) : /* bhi $label9 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_brad.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-if (NOTBI (ORBI (CPU (h_cbit), CPU (h_zbit)))) {
- {
- USI opval = FLD (i_label9);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 3);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_DMOVR13) : /* dmov $R13,@$dir10 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_dmovr13pi.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = CPU (h_gr[((UINT) 13)]);
- SETMEMSI (current_cpu, pc, FLD (f_dir10), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_DMOVR13H) : /* dmovh $R13,@$dir9 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_dmovr13pih.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- HI opval = CPU (h_gr[((UINT) 13)]);
- SETMEMHI (current_cpu, pc, FLD (f_dir9), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_DMOVR13B) : /* dmovb $R13,@$dir8 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_dmovr13pib.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- QI opval = CPU (h_gr[((UINT) 13)]);
- SETMEMQI (current_cpu, pc, FLD (f_dir8), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_DMOVR13PI) : /* dmov @$R13+,@$dir10 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_dmovr13pi.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- {
- SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 13)]));
- SETMEMSI (current_cpu, pc, FLD (f_dir10), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
- {
- SI opval = ADDSI (CPU (h_gr[((UINT) 13)]), 4);
- CPU (h_gr[((UINT) 13)]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-}
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_DMOVR13PIH) : /* dmovh @$R13+,@$dir9 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_dmovr13pih.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- {
- HI opval = GETMEMHI (current_cpu, pc, CPU (h_gr[((UINT) 13)]));
- SETMEMHI (current_cpu, pc, FLD (f_dir9), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
- {
- SI opval = ADDSI (CPU (h_gr[((UINT) 13)]), 2);
- CPU (h_gr[((UINT) 13)]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-}
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_DMOVR13PIB) : /* dmovb @$R13+,@$dir8 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_dmovr13pib.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- {
- QI opval = GETMEMQI (current_cpu, pc, CPU (h_gr[((UINT) 13)]));
- SETMEMQI (current_cpu, pc, FLD (f_dir8), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
- {
- SI opval = ADDSI (CPU (h_gr[((UINT) 13)]), 1);
- CPU (h_gr[((UINT) 13)]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-}
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_DMOVR15PI) : /* dmov @$R15+,@$dir10 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_dmovr15pi.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- {
- SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]));
- SETMEMSI (current_cpu, pc, FLD (f_dir10), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
- {
- SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4);
- CPU (h_gr[((UINT) 15)]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-}
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_DMOV2R13) : /* dmov @$dir10,$R13 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_dmovr13pi.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = GETMEMSI (current_cpu, pc, FLD (f_dir10));
- CPU (h_gr[((UINT) 13)]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_DMOV2R13H) : /* dmovh @$dir9,$R13 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_dmovr13pih.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = GETMEMHI (current_cpu, pc, FLD (f_dir9));
- CPU (h_gr[((UINT) 13)]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_DMOV2R13B) : /* dmovb @$dir8,$R13 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_dmovr13pib.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = GETMEMQI (current_cpu, pc, FLD (f_dir8));
- CPU (h_gr[((UINT) 13)]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_DMOV2R13PI) : /* dmov @$dir10,@$R13+ */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_dmovr13pi.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- {
- SI opval = GETMEMSI (current_cpu, pc, FLD (f_dir10));
- SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 13)]), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
- {
- SI opval = ADDSI (CPU (h_gr[((UINT) 13)]), 4);
- CPU (h_gr[((UINT) 13)]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-}
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_DMOV2R13PIH) : /* dmovh @$dir9,@$R13+ */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_dmovr13pih.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- {
- HI opval = GETMEMHI (current_cpu, pc, FLD (f_dir9));
- SETMEMHI (current_cpu, pc, CPU (h_gr[((UINT) 13)]), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
- {
- SI opval = ADDSI (CPU (h_gr[((UINT) 13)]), 2);
- CPU (h_gr[((UINT) 13)]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-}
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_DMOV2R13PIB) : /* dmovb @$dir8,@$R13+ */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_dmovr13pib.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- {
- QI opval = GETMEMQI (current_cpu, pc, FLD (f_dir8));
- SETMEMQI (current_cpu, pc, CPU (h_gr[((UINT) 13)]), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
- {
- SI opval = ADDSI (CPU (h_gr[((UINT) 13)]), 1);
- CPU (h_gr[((UINT) 13)]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-}
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_DMOV2R15PD) : /* dmov @$dir10,@-$R15 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_dmovr15pi.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- {
- SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4);
- CPU (h_gr[((UINT) 15)]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
- {
- SI opval = GETMEMSI (current_cpu, pc, FLD (f_dir10));
- SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-}
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_LDRES) : /* ldres @$Ri+,$u4 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_add2.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = ADDSI (* FLD (i_Ri), 4);
- * FLD (i_Ri) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_STRES) : /* stres $u4,@$Ri+ */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_add2.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = ADDSI (* FLD (i_Ri), 4);
- * FLD (i_Ri) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_COPOP) : /* copop $u4c,$ccc,$CRj,$CRi */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_empty.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-((void) 0); /*nop*/
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_COPLD) : /* copld $u4c,$ccc,$Rjc,$CRi */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_empty.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-((void) 0); /*nop*/
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_COPST) : /* copst $u4c,$ccc,$CRj,$Ric */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_empty.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-((void) 0); /*nop*/
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_COPSV) : /* copsv $u4c,$ccc,$CRj,$Ric */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_empty.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-((void) 0); /*nop*/
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_NOP) : /* nop */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_empty.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-((void) 0); /*nop*/
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_ANDCCR) : /* andccr $u8 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_int.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- UQI opval = ANDQI (GET_H_CCR (), FLD (f_u8));
- SET_H_CCR (opval);
- TRACE_RESULT (current_cpu, abuf, "ccr", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_ORCCR) : /* orccr $u8 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_int.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- UQI opval = ORQI (GET_H_CCR (), FLD (f_u8));
- SET_H_CCR (opval);
- TRACE_RESULT (current_cpu, abuf, "ccr", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_STILM) : /* stilm $u8 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_int.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- UQI opval = ANDSI (FLD (f_u8), 31);
- SET_H_ILM (opval);
- TRACE_RESULT (current_cpu, abuf, "ilm", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_ADDSP) : /* addsp $s10 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_addsp.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), FLD (f_s10));
- CPU (h_gr[((UINT) 15)]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_EXTSB) : /* extsb $Ri */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_add2.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = EXTQISI (ANDQI (* FLD (i_Ri), 255));
- * FLD (i_Ri) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_EXTUB) : /* extub $Ri */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_add2.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = ZEXTQISI (ANDQI (* FLD (i_Ri), 255));
- * FLD (i_Ri) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_EXTSH) : /* extsh $Ri */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_add2.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = EXTHISI (ANDHI (* FLD (i_Ri), 65535));
- * FLD (i_Ri) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_EXTUH) : /* extuh $Ri */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_add2.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = ZEXTHISI (ANDHI (* FLD (i_Ri), 65535));
- * FLD (i_Ri) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_LDM0) : /* ldm0 ($reglist_low_ld) */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_ldm0.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
-if (ANDSI (FLD (f_reglist_low_ld), 1)) {
-{
- {
- SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]));
- CPU (h_gr[((UINT) 0)]) = opval;
- written |= (1 << 3);
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
- {
- SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4);
- CPU (h_gr[((UINT) 15)]) = opval;
- written |= (1 << 5);
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-}
-}
-if (ANDSI (FLD (f_reglist_low_ld), 2)) {
-{
- {
- SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]));
- CPU (h_gr[((UINT) 1)]) = opval;
- written |= (1 << 4);
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
- {
- SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4);
- CPU (h_gr[((UINT) 15)]) = opval;
- written |= (1 << 5);
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-}
-}
-if (ANDSI (FLD (f_reglist_low_ld), 4)) {
-{
- {
- SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]));
- CPU (h_gr[((UINT) 2)]) = opval;
- written |= (1 << 6);
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
- {
- SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4);
- CPU (h_gr[((UINT) 15)]) = opval;
- written |= (1 << 5);
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-}
-}
-if (ANDSI (FLD (f_reglist_low_ld), 8)) {
-{
- {
- SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]));
- CPU (h_gr[((UINT) 3)]) = opval;
- written |= (1 << 7);
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
- {
- SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4);
- CPU (h_gr[((UINT) 15)]) = opval;
- written |= (1 << 5);
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-}
-}
-if (ANDSI (FLD (f_reglist_low_ld), 16)) {
-{
- {
- SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]));
- CPU (h_gr[((UINT) 4)]) = opval;
- written |= (1 << 8);
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
- {
- SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4);
- CPU (h_gr[((UINT) 15)]) = opval;
- written |= (1 << 5);
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-}
-}
-if (ANDSI (FLD (f_reglist_low_ld), 32)) {
-{
- {
- SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]));
- CPU (h_gr[((UINT) 5)]) = opval;
- written |= (1 << 9);
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
- {
- SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4);
- CPU (h_gr[((UINT) 15)]) = opval;
- written |= (1 << 5);
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-}
-}
-if (ANDSI (FLD (f_reglist_low_ld), 64)) {
-{
- {
- SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]));
- CPU (h_gr[((UINT) 6)]) = opval;
- written |= (1 << 10);
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
- {
- SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4);
- CPU (h_gr[((UINT) 15)]) = opval;
- written |= (1 << 5);
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-}
-}
-if (ANDSI (FLD (f_reglist_low_ld), 128)) {
-{
- {
- SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]));
- CPU (h_gr[((UINT) 7)]) = opval;
- written |= (1 << 11);
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
- {
- SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4);
- CPU (h_gr[((UINT) 15)]) = opval;
- written |= (1 << 5);
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-}
-}
-}
-
- abuf->written = written;
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_LDM1) : /* ldm1 ($reglist_hi_ld) */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_ldm1.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
-if (ANDSI (FLD (f_reglist_hi_ld), 1)) {
-{
- {
- SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]));
- CPU (h_gr[((UINT) 8)]) = opval;
- written |= (1 << 9);
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
- {
- SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4);
- CPU (h_gr[((UINT) 15)]) = opval;
- written |= (1 << 8);
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-}
-}
-if (ANDSI (FLD (f_reglist_hi_ld), 2)) {
-{
- {
- SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]));
- CPU (h_gr[((UINT) 9)]) = opval;
- written |= (1 << 10);
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
- {
- SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4);
- CPU (h_gr[((UINT) 15)]) = opval;
- written |= (1 << 8);
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-}
-}
-if (ANDSI (FLD (f_reglist_hi_ld), 4)) {
-{
- {
- SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]));
- CPU (h_gr[((UINT) 10)]) = opval;
- written |= (1 << 3);
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
- {
- SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4);
- CPU (h_gr[((UINT) 15)]) = opval;
- written |= (1 << 8);
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-}
-}
-if (ANDSI (FLD (f_reglist_hi_ld), 8)) {
-{
- {
- SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]));
- CPU (h_gr[((UINT) 11)]) = opval;
- written |= (1 << 4);
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
- {
- SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4);
- CPU (h_gr[((UINT) 15)]) = opval;
- written |= (1 << 8);
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-}
-}
-if (ANDSI (FLD (f_reglist_hi_ld), 16)) {
-{
- {
- SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]));
- CPU (h_gr[((UINT) 12)]) = opval;
- written |= (1 << 5);
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
- {
- SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4);
- CPU (h_gr[((UINT) 15)]) = opval;
- written |= (1 << 8);
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-}
-}
-if (ANDSI (FLD (f_reglist_hi_ld), 32)) {
-{
- {
- SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]));
- CPU (h_gr[((UINT) 13)]) = opval;
- written |= (1 << 6);
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
- {
- SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4);
- CPU (h_gr[((UINT) 15)]) = opval;
- written |= (1 << 8);
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-}
-}
-if (ANDSI (FLD (f_reglist_hi_ld), 64)) {
-{
- {
- SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]));
- CPU (h_gr[((UINT) 14)]) = opval;
- written |= (1 << 7);
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
- {
- SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4);
- CPU (h_gr[((UINT) 15)]) = opval;
- written |= (1 << 8);
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-}
-}
-if (ANDSI (FLD (f_reglist_hi_ld), 128)) {
- {
- SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]));
- CPU (h_gr[((UINT) 15)]) = opval;
- written |= (1 << 8);
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-}
-}
-
- abuf->written = written;
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_STM0) : /* stm0 ($reglist_low_st) */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_stm0.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
-if (ANDSI (FLD (f_reglist_low_st), 1)) {
-{
- {
- SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4);
- CPU (h_gr[((UINT) 15)]) = opval;
- written |= (1 << 10);
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
- {
- SI opval = CPU (h_gr[((UINT) 7)]);
- SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval);
- written |= (1 << 11);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-}
-}
-if (ANDSI (FLD (f_reglist_low_st), 2)) {
-{
- {
- SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4);
- CPU (h_gr[((UINT) 15)]) = opval;
- written |= (1 << 10);
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
- {
- SI opval = CPU (h_gr[((UINT) 6)]);
- SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval);
- written |= (1 << 11);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-}
-}
-if (ANDSI (FLD (f_reglist_low_st), 4)) {
-{
- {
- SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4);
- CPU (h_gr[((UINT) 15)]) = opval;
- written |= (1 << 10);
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
- {
- SI opval = CPU (h_gr[((UINT) 5)]);
- SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval);
- written |= (1 << 11);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-}
-}
-if (ANDSI (FLD (f_reglist_low_st), 8)) {
-{
- {
- SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4);
- CPU (h_gr[((UINT) 15)]) = opval;
- written |= (1 << 10);
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
- {
- SI opval = CPU (h_gr[((UINT) 4)]);
- SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval);
- written |= (1 << 11);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-}
-}
-if (ANDSI (FLD (f_reglist_low_st), 16)) {
-{
- {
- SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4);
- CPU (h_gr[((UINT) 15)]) = opval;
- written |= (1 << 10);
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
- {
- SI opval = CPU (h_gr[((UINT) 3)]);
- SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval);
- written |= (1 << 11);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-}
-}
-if (ANDSI (FLD (f_reglist_low_st), 32)) {
-{
- {
- SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4);
- CPU (h_gr[((UINT) 15)]) = opval;
- written |= (1 << 10);
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
- {
- SI opval = CPU (h_gr[((UINT) 2)]);
- SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval);
- written |= (1 << 11);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-}
-}
-if (ANDSI (FLD (f_reglist_low_st), 64)) {
-{
- {
- SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4);
- CPU (h_gr[((UINT) 15)]) = opval;
- written |= (1 << 10);
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
- {
- SI opval = CPU (h_gr[((UINT) 1)]);
- SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval);
- written |= (1 << 11);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-}
-}
-if (ANDSI (FLD (f_reglist_low_st), 128)) {
-{
- {
- SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4);
- CPU (h_gr[((UINT) 15)]) = opval;
- written |= (1 << 10);
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
- {
- SI opval = CPU (h_gr[((UINT) 0)]);
- SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval);
- written |= (1 << 11);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-}
-}
-}
-
- abuf->written = written;
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_STM1) : /* stm1 ($reglist_hi_st) */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_stm1.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
-if (ANDSI (FLD (f_reglist_hi_st), 1)) {
-{
- SI tmp_save_r15;
- tmp_save_r15 = CPU (h_gr[((UINT) 15)]);
- {
- SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4);
- CPU (h_gr[((UINT) 15)]) = opval;
- written |= (1 << 9);
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
- {
- SI opval = tmp_save_r15;
- SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval);
- written |= (1 << 10);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-}
-}
-if (ANDSI (FLD (f_reglist_hi_st), 2)) {
-{
- {
- SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4);
- CPU (h_gr[((UINT) 15)]) = opval;
- written |= (1 << 9);
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
- {
- SI opval = CPU (h_gr[((UINT) 14)]);
- SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval);
- written |= (1 << 10);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-}
-}
-if (ANDSI (FLD (f_reglist_hi_st), 4)) {
-{
- {
- SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4);
- CPU (h_gr[((UINT) 15)]) = opval;
- written |= (1 << 9);
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
- {
- SI opval = CPU (h_gr[((UINT) 13)]);
- SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval);
- written |= (1 << 10);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-}
-}
-if (ANDSI (FLD (f_reglist_hi_st), 8)) {
-{
- {
- SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4);
- CPU (h_gr[((UINT) 15)]) = opval;
- written |= (1 << 9);
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
- {
- SI opval = CPU (h_gr[((UINT) 12)]);
- SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval);
- written |= (1 << 10);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-}
-}
-if (ANDSI (FLD (f_reglist_hi_st), 16)) {
-{
- {
- SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4);
- CPU (h_gr[((UINT) 15)]) = opval;
- written |= (1 << 9);
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
- {
- SI opval = CPU (h_gr[((UINT) 11)]);
- SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval);
- written |= (1 << 10);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-}
-}
-if (ANDSI (FLD (f_reglist_hi_st), 32)) {
-{
- {
- SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4);
- CPU (h_gr[((UINT) 15)]) = opval;
- written |= (1 << 9);
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
- {
- SI opval = CPU (h_gr[((UINT) 10)]);
- SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval);
- written |= (1 << 10);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-}
-}
-if (ANDSI (FLD (f_reglist_hi_st), 64)) {
-{
- {
- SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4);
- CPU (h_gr[((UINT) 15)]) = opval;
- written |= (1 << 9);
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
- {
- SI opval = CPU (h_gr[((UINT) 9)]);
- SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval);
- written |= (1 << 10);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-}
-}
-if (ANDSI (FLD (f_reglist_hi_st), 128)) {
-{
- {
- SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4);
- CPU (h_gr[((UINT) 15)]) = opval;
- written |= (1 << 9);
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
- {
- SI opval = CPU (h_gr[((UINT) 8)]);
- SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval);
- written |= (1 << 10);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-}
-}
-}
-
- abuf->written = written;
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_ENTER) : /* enter $u10 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_enter.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- SI tmp_tmp;
- tmp_tmp = SUBSI (CPU (h_gr[((UINT) 15)]), 4);
- {
- SI opval = CPU (h_gr[((UINT) 14)]);
- SETMEMSI (current_cpu, pc, tmp_tmp, opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
- {
- SI opval = tmp_tmp;
- CPU (h_gr[((UINT) 14)]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
- {
- SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), FLD (f_u10));
- CPU (h_gr[((UINT) 15)]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-}
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_LEAVE) : /* leave */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_enter.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- {
- SI opval = ADDSI (CPU (h_gr[((UINT) 14)]), 4);
- CPU (h_gr[((UINT) 15)]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
- {
- SI opval = GETMEMSI (current_cpu, pc, SUBSI (CPU (h_gr[((UINT) 15)]), 4));
- CPU (h_gr[((UINT) 14)]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-}
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_XCHB) : /* xchb @$Rj,$Ri */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_add.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- SI tmp_tmp;
- tmp_tmp = * FLD (i_Ri);
- {
- SI opval = GETMEMUQI (current_cpu, pc, * FLD (i_Rj));
- * FLD (i_Ri) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
- {
- UQI opval = tmp_tmp;
- SETMEMUQI (current_cpu, pc, * FLD (i_Rj), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-}
-
-#undef FLD
-}
- NEXT (vpc);
-
-
- }
- ENDSWITCH (sem) /* End of semantic switch. */
-
- /* At this point `vpc' contains the next insn to execute. */
-}
-
-#undef DEFINE_SWITCH
-#endif /* DEFINE_SWITCH */
diff --git a/sim/fr30/sem.c b/sim/fr30/sem.c
deleted file mode 100644
index fb5893c8229..00000000000
--- a/sim/fr30/sem.c
+++ /dev/null
@@ -1,5730 +0,0 @@
-/* Simulator instruction semantics for fr30bf.
-
-THIS FILE IS MACHINE GENERATED WITH CGEN.
-
-Copyright (C) 1996, 1997, 1998, 1999, 2000 Free Software Foundation, Inc.
-
-This file is part of the GNU Simulators.
-
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License along
-with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
-*/
-
-#define WANT_CPU fr30bf
-#define WANT_CPU_FR30BF
-
-#include "sim-main.h"
-#include "cgen-mem.h"
-#include "cgen-ops.h"
-
-#undef GET_ATTR
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
-#define GET_ATTR(cpu, num, attr) CGEN_ATTR_VALUE (NULL, abuf->idesc->attrs, CGEN_INSN_##attr)
-#else
-#define GET_ATTR(cpu, num, attr) CGEN_ATTR_VALUE (NULL, abuf->idesc->attrs, CGEN_INSN_/**/attr)
-#endif
-
-/* This is used so that we can compile two copies of the semantic code,
- one with full feature support and one without that runs fast(er).
- FAST_P, when desired, is defined on the command line, -DFAST_P=1. */
-#if FAST_P
-#define SEM_FN_NAME(cpu,fn) XCONCAT3 (cpu,_semf_,fn)
-#undef TRACE_RESULT
-#define TRACE_RESULT(cpu, abuf, name, type, val)
-#else
-#define SEM_FN_NAME(cpu,fn) XCONCAT3 (cpu,_sem_,fn)
-#endif
-
-/* x-invalid: --invalid-- */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,x_invalid) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.fmt_empty.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
-
- {
- /* Update the recorded pc in the cpu state struct.
- Only necessary for WITH_SCACHE case, but to avoid the
- conditional compilation .... */
- SET_H_PC (pc);
- /* Virtual insns have zero size. Overwrite vpc with address of next insn
- using the default-insn-bitsize spec. When executing insns in parallel
- we may want to queue the fault and continue execution. */
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
- vpc = sim_engine_invalid_insn (current_cpu, pc, vpc);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* x-after: --after-- */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,x_after) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.fmt_empty.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
-
- {
-#if WITH_SCACHE_PBB_FR30BF
- fr30bf_pbb_after (current_cpu, sem_arg);
-#endif
- }
-
- return vpc;
-#undef FLD
-}
-
-/* x-before: --before-- */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,x_before) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.fmt_empty.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
-
- {
-#if WITH_SCACHE_PBB_FR30BF
- fr30bf_pbb_before (current_cpu, sem_arg);
-#endif
- }
-
- return vpc;
-#undef FLD
-}
-
-/* x-cti-chain: --cti-chain-- */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,x_cti_chain) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.fmt_empty.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
-
- {
-#if WITH_SCACHE_PBB_FR30BF
-#ifdef DEFINE_SWITCH
- vpc = fr30bf_pbb_cti_chain (current_cpu, sem_arg,
- pbb_br_type, pbb_br_npc);
- BREAK (sem);
-#else
- /* FIXME: Allow provision of explicit ifmt spec in insn spec. */
- vpc = fr30bf_pbb_cti_chain (current_cpu, sem_arg,
- CPU_PBB_BR_TYPE (current_cpu),
- CPU_PBB_BR_NPC (current_cpu));
-#endif
-#endif
- }
-
- return vpc;
-#undef FLD
-}
-
-/* x-chain: --chain-- */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,x_chain) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.fmt_empty.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
-
- {
-#if WITH_SCACHE_PBB_FR30BF
- vpc = fr30bf_pbb_chain (current_cpu, sem_arg);
-#ifdef DEFINE_SWITCH
- BREAK (sem);
-#endif
-#endif
- }
-
- return vpc;
-#undef FLD
-}
-
-/* x-begin: --begin-- */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,x_begin) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.fmt_empty.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
-
- {
-#if WITH_SCACHE_PBB_FR30BF
-#if defined DEFINE_SWITCH || defined FAST_P
- /* In the switch case FAST_P is a constant, allowing several optimizations
- in any called inline functions. */
- vpc = fr30bf_pbb_begin (current_cpu, FAST_P);
-#else
-#if 0 /* cgen engine can't handle dynamic fast/full switching yet. */
- vpc = fr30bf_pbb_begin (current_cpu, STATE_RUN_FAST_P (CPU_STATE (current_cpu)));
-#else
- vpc = fr30bf_pbb_begin (current_cpu, 0);
-#endif
-#endif
-#endif
- }
-
- return vpc;
-#undef FLD
-}
-
-/* add: add $Rj,$Ri */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,add) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- {
- BI opval = ADDOFSI (* FLD (i_Ri), * FLD (i_Rj), 0);
- CPU (h_vbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
- }
- {
- BI opval = ADDCFSI (* FLD (i_Ri), * FLD (i_Rj), 0);
- CPU (h_cbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
- }
- {
- SI opval = ADDSI (* FLD (i_Ri), * FLD (i_Rj));
- * FLD (i_Ri) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-{
- {
- BI opval = EQSI (* FLD (i_Ri), 0);
- CPU (h_zbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
- }
- {
- BI opval = LTSI (* FLD (i_Ri), 0);
- CPU (h_nbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
- }
-}
-}
-
- return vpc;
-#undef FLD
-}
-
-/* addi: add $u4,$Ri */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,addi) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_addi.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- {
- BI opval = ADDOFSI (* FLD (i_Ri), FLD (f_u4), 0);
- CPU (h_vbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
- }
- {
- BI opval = ADDCFSI (* FLD (i_Ri), FLD (f_u4), 0);
- CPU (h_cbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
- }
- {
- SI opval = ADDSI (* FLD (i_Ri), FLD (f_u4));
- * FLD (i_Ri) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-{
- {
- BI opval = EQSI (* FLD (i_Ri), 0);
- CPU (h_zbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
- }
- {
- BI opval = LTSI (* FLD (i_Ri), 0);
- CPU (h_nbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
- }
-}
-}
-
- return vpc;
-#undef FLD
-}
-
-/* add2: add2 $m4,$Ri */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,add2) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add2.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- {
- BI opval = ADDOFSI (* FLD (i_Ri), FLD (f_m4), 0);
- CPU (h_vbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
- }
- {
- BI opval = ADDCFSI (* FLD (i_Ri), FLD (f_m4), 0);
- CPU (h_cbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
- }
- {
- SI opval = ADDSI (* FLD (i_Ri), FLD (f_m4));
- * FLD (i_Ri) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-{
- {
- BI opval = EQSI (* FLD (i_Ri), 0);
- CPU (h_zbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
- }
- {
- BI opval = LTSI (* FLD (i_Ri), 0);
- CPU (h_nbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
- }
-}
-}
-
- return vpc;
-#undef FLD
-}
-
-/* addc: addc $Rj,$Ri */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,addc) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- SI tmp_tmp;
- tmp_tmp = ADDCSI (* FLD (i_Ri), * FLD (i_Rj), CPU (h_cbit));
- {
- BI opval = ADDOFSI (* FLD (i_Ri), * FLD (i_Rj), CPU (h_cbit));
- CPU (h_vbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
- }
- {
- BI opval = ADDCFSI (* FLD (i_Ri), * FLD (i_Rj), CPU (h_cbit));
- CPU (h_cbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
- }
- {
- SI opval = tmp_tmp;
- * FLD (i_Ri) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-{
- {
- BI opval = EQSI (* FLD (i_Ri), 0);
- CPU (h_zbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
- }
- {
- BI opval = LTSI (* FLD (i_Ri), 0);
- CPU (h_nbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
- }
-}
-}
-
- return vpc;
-#undef FLD
-}
-
-/* addn: addn $Rj,$Ri */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,addn) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = ADDSI (* FLD (i_Ri), * FLD (i_Rj));
- * FLD (i_Ri) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* addni: addn $u4,$Ri */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,addni) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_addi.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = ADDSI (* FLD (i_Ri), FLD (f_u4));
- * FLD (i_Ri) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* addn2: addn2 $m4,$Ri */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,addn2) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add2.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = ADDSI (* FLD (i_Ri), FLD (f_m4));
- * FLD (i_Ri) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* sub: sub $Rj,$Ri */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,sub) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- {
- BI opval = SUBOFSI (* FLD (i_Ri), * FLD (i_Rj), 0);
- CPU (h_vbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
- }
- {
- BI opval = SUBCFSI (* FLD (i_Ri), * FLD (i_Rj), 0);
- CPU (h_cbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
- }
- {
- SI opval = SUBSI (* FLD (i_Ri), * FLD (i_Rj));
- * FLD (i_Ri) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-{
- {
- BI opval = EQSI (* FLD (i_Ri), 0);
- CPU (h_zbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
- }
- {
- BI opval = LTSI (* FLD (i_Ri), 0);
- CPU (h_nbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
- }
-}
-}
-
- return vpc;
-#undef FLD
-}
-
-/* subc: subc $Rj,$Ri */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,subc) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- SI tmp_tmp;
- tmp_tmp = SUBCSI (* FLD (i_Ri), * FLD (i_Rj), CPU (h_cbit));
- {
- BI opval = SUBOFSI (* FLD (i_Ri), * FLD (i_Rj), CPU (h_cbit));
- CPU (h_vbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
- }
- {
- BI opval = SUBCFSI (* FLD (i_Ri), * FLD (i_Rj), CPU (h_cbit));
- CPU (h_cbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
- }
- {
- SI opval = tmp_tmp;
- * FLD (i_Ri) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-{
- {
- BI opval = EQSI (* FLD (i_Ri), 0);
- CPU (h_zbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
- }
- {
- BI opval = LTSI (* FLD (i_Ri), 0);
- CPU (h_nbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
- }
-}
-}
-
- return vpc;
-#undef FLD
-}
-
-/* subn: subn $Rj,$Ri */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,subn) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = SUBSI (* FLD (i_Ri), * FLD (i_Rj));
- * FLD (i_Ri) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* cmp: cmp $Rj,$Ri */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,cmp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_str13.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- SI tmp_tmp1;
- {
- BI opval = SUBOFSI (* FLD (i_Ri), * FLD (i_Rj), 0);
- CPU (h_vbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
- }
- {
- BI opval = SUBCFSI (* FLD (i_Ri), * FLD (i_Rj), 0);
- CPU (h_cbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
- }
- tmp_tmp1 = SUBSI (* FLD (i_Ri), * FLD (i_Rj));
-{
- {
- BI opval = EQSI (tmp_tmp1, 0);
- CPU (h_zbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
- }
- {
- BI opval = LTSI (tmp_tmp1, 0);
- CPU (h_nbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
- }
-}
-}
-
- return vpc;
-#undef FLD
-}
-
-/* cmpi: cmp $u4,$Ri */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,cmpi) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_addi.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- SI tmp_tmp1;
- {
- BI opval = SUBOFSI (* FLD (i_Ri), FLD (f_u4), 0);
- CPU (h_vbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
- }
- {
- BI opval = SUBCFSI (* FLD (i_Ri), FLD (f_u4), 0);
- CPU (h_cbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
- }
- tmp_tmp1 = SUBSI (* FLD (i_Ri), FLD (f_u4));
-{
- {
- BI opval = EQSI (tmp_tmp1, 0);
- CPU (h_zbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
- }
- {
- BI opval = LTSI (tmp_tmp1, 0);
- CPU (h_nbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
- }
-}
-}
-
- return vpc;
-#undef FLD
-}
-
-/* cmp2: cmp2 $m4,$Ri */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,cmp2) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add2.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- SI tmp_tmp1;
- {
- BI opval = SUBOFSI (* FLD (i_Ri), FLD (f_m4), 0);
- CPU (h_vbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
- }
- {
- BI opval = SUBCFSI (* FLD (i_Ri), FLD (f_m4), 0);
- CPU (h_cbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
- }
- tmp_tmp1 = SUBSI (* FLD (i_Ri), FLD (f_m4));
-{
- {
- BI opval = EQSI (tmp_tmp1, 0);
- CPU (h_zbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
- }
- {
- BI opval = LTSI (tmp_tmp1, 0);
- CPU (h_nbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
- }
-}
-}
-
- return vpc;
-#undef FLD
-}
-
-/* and: and $Rj,$Ri */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,and) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- {
- SI opval = ANDSI (* FLD (i_Ri), * FLD (i_Rj));
- * FLD (i_Ri) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-{
- {
- BI opval = EQSI (* FLD (i_Ri), 0);
- CPU (h_zbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
- }
- {
- BI opval = LTSI (* FLD (i_Ri), 0);
- CPU (h_nbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
- }
-}
-}
-
- return vpc;
-#undef FLD
-}
-
-/* or: or $Rj,$Ri */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,or) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- {
- SI opval = ORSI (* FLD (i_Ri), * FLD (i_Rj));
- * FLD (i_Ri) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-{
- {
- BI opval = EQSI (* FLD (i_Ri), 0);
- CPU (h_zbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
- }
- {
- BI opval = LTSI (* FLD (i_Ri), 0);
- CPU (h_nbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
- }
-}
-}
-
- return vpc;
-#undef FLD
-}
-
-/* eor: eor $Rj,$Ri */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,eor) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- {
- SI opval = XORSI (* FLD (i_Ri), * FLD (i_Rj));
- * FLD (i_Ri) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-{
- {
- BI opval = EQSI (* FLD (i_Ri), 0);
- CPU (h_zbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
- }
- {
- BI opval = LTSI (* FLD (i_Ri), 0);
- CPU (h_nbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
- }
-}
-}
-
- return vpc;
-#undef FLD
-}
-
-/* andm: and $Rj,@$Ri */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,andm) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_str13.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- SI tmp_tmp;
- tmp_tmp = ANDSI (GETMEMSI (current_cpu, pc, * FLD (i_Ri)), * FLD (i_Rj));
-{
- {
- BI opval = EQSI (tmp_tmp, 0);
- CPU (h_zbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
- }
- {
- BI opval = LTSI (tmp_tmp, 0);
- CPU (h_nbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
- }
-}
- {
- SI opval = tmp_tmp;
- SETMEMSI (current_cpu, pc, * FLD (i_Ri), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-}
-
- return vpc;
-#undef FLD
-}
-
-/* andh: andh $Rj,@$Ri */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,andh) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_str13.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- HI tmp_tmp;
- tmp_tmp = ANDHI (GETMEMHI (current_cpu, pc, * FLD (i_Ri)), * FLD (i_Rj));
-{
- {
- BI opval = EQHI (tmp_tmp, 0);
- CPU (h_zbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
- }
- {
- BI opval = LTHI (tmp_tmp, 0);
- CPU (h_nbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
- }
-}
- {
- HI opval = tmp_tmp;
- SETMEMHI (current_cpu, pc, * FLD (i_Ri), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-}
-
- return vpc;
-#undef FLD
-}
-
-/* andb: andb $Rj,@$Ri */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,andb) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_str13.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- QI tmp_tmp;
- tmp_tmp = ANDQI (GETMEMQI (current_cpu, pc, * FLD (i_Ri)), * FLD (i_Rj));
-{
- {
- BI opval = EQQI (tmp_tmp, 0);
- CPU (h_zbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
- }
- {
- BI opval = LTQI (tmp_tmp, 0);
- CPU (h_nbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
- }
-}
- {
- QI opval = tmp_tmp;
- SETMEMQI (current_cpu, pc, * FLD (i_Ri), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-}
-
- return vpc;
-#undef FLD
-}
-
-/* orm: or $Rj,@$Ri */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,orm) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_str13.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- SI tmp_tmp;
- tmp_tmp = ORSI (GETMEMSI (current_cpu, pc, * FLD (i_Ri)), * FLD (i_Rj));
-{
- {
- BI opval = EQSI (tmp_tmp, 0);
- CPU (h_zbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
- }
- {
- BI opval = LTSI (tmp_tmp, 0);
- CPU (h_nbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
- }
-}
- {
- SI opval = tmp_tmp;
- SETMEMSI (current_cpu, pc, * FLD (i_Ri), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-}
-
- return vpc;
-#undef FLD
-}
-
-/* orh: orh $Rj,@$Ri */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,orh) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_str13.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- HI tmp_tmp;
- tmp_tmp = ORHI (GETMEMHI (current_cpu, pc, * FLD (i_Ri)), * FLD (i_Rj));
-{
- {
- BI opval = EQHI (tmp_tmp, 0);
- CPU (h_zbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
- }
- {
- BI opval = LTHI (tmp_tmp, 0);
- CPU (h_nbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
- }
-}
- {
- HI opval = tmp_tmp;
- SETMEMHI (current_cpu, pc, * FLD (i_Ri), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-}
-
- return vpc;
-#undef FLD
-}
-
-/* orb: orb $Rj,@$Ri */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,orb) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_str13.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- QI tmp_tmp;
- tmp_tmp = ORQI (GETMEMQI (current_cpu, pc, * FLD (i_Ri)), * FLD (i_Rj));
-{
- {
- BI opval = EQQI (tmp_tmp, 0);
- CPU (h_zbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
- }
- {
- BI opval = LTQI (tmp_tmp, 0);
- CPU (h_nbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
- }
-}
- {
- QI opval = tmp_tmp;
- SETMEMQI (current_cpu, pc, * FLD (i_Ri), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-}
-
- return vpc;
-#undef FLD
-}
-
-/* eorm: eor $Rj,@$Ri */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,eorm) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_str13.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- SI tmp_tmp;
- tmp_tmp = XORSI (GETMEMSI (current_cpu, pc, * FLD (i_Ri)), * FLD (i_Rj));
-{
- {
- BI opval = EQSI (tmp_tmp, 0);
- CPU (h_zbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
- }
- {
- BI opval = LTSI (tmp_tmp, 0);
- CPU (h_nbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
- }
-}
- {
- SI opval = tmp_tmp;
- SETMEMSI (current_cpu, pc, * FLD (i_Ri), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-}
-
- return vpc;
-#undef FLD
-}
-
-/* eorh: eorh $Rj,@$Ri */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,eorh) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_str13.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- HI tmp_tmp;
- tmp_tmp = XORHI (GETMEMHI (current_cpu, pc, * FLD (i_Ri)), * FLD (i_Rj));
-{
- {
- BI opval = EQHI (tmp_tmp, 0);
- CPU (h_zbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
- }
- {
- BI opval = LTHI (tmp_tmp, 0);
- CPU (h_nbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
- }
-}
- {
- HI opval = tmp_tmp;
- SETMEMHI (current_cpu, pc, * FLD (i_Ri), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-}
-
- return vpc;
-#undef FLD
-}
-
-/* eorb: eorb $Rj,@$Ri */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,eorb) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_str13.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- QI tmp_tmp;
- tmp_tmp = XORQI (GETMEMQI (current_cpu, pc, * FLD (i_Ri)), * FLD (i_Rj));
-{
- {
- BI opval = EQQI (tmp_tmp, 0);
- CPU (h_zbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
- }
- {
- BI opval = LTQI (tmp_tmp, 0);
- CPU (h_nbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
- }
-}
- {
- QI opval = tmp_tmp;
- SETMEMQI (current_cpu, pc, * FLD (i_Ri), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-}
-
- return vpc;
-#undef FLD
-}
-
-/* bandl: bandl $u4,@$Ri */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,bandl) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_addi.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- QI opval = ANDQI (ORQI (FLD (f_u4), 240), GETMEMQI (current_cpu, pc, * FLD (i_Ri)));
- SETMEMQI (current_cpu, pc, * FLD (i_Ri), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* borl: borl $u4,@$Ri */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,borl) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_addi.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- QI opval = ORQI (FLD (f_u4), GETMEMQI (current_cpu, pc, * FLD (i_Ri)));
- SETMEMQI (current_cpu, pc, * FLD (i_Ri), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* beorl: beorl $u4,@$Ri */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,beorl) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_addi.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- QI opval = XORQI (FLD (f_u4), GETMEMQI (current_cpu, pc, * FLD (i_Ri)));
- SETMEMQI (current_cpu, pc, * FLD (i_Ri), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* bandh: bandh $u4,@$Ri */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,bandh) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_addi.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- QI opval = ANDQI (ORQI (SLLQI (FLD (f_u4), 4), 15), GETMEMQI (current_cpu, pc, * FLD (i_Ri)));
- SETMEMQI (current_cpu, pc, * FLD (i_Ri), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* borh: borh $u4,@$Ri */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,borh) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_addi.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- QI opval = ORQI (SLLQI (FLD (f_u4), 4), GETMEMQI (current_cpu, pc, * FLD (i_Ri)));
- SETMEMQI (current_cpu, pc, * FLD (i_Ri), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* beorh: beorh $u4,@$Ri */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,beorh) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_addi.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- QI opval = XORQI (SLLQI (FLD (f_u4), 4), GETMEMQI (current_cpu, pc, * FLD (i_Ri)));
- SETMEMQI (current_cpu, pc, * FLD (i_Ri), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* btstl: btstl $u4,@$Ri */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,btstl) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_addi.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- QI tmp_tmp;
- tmp_tmp = ANDQI (FLD (f_u4), GETMEMQI (current_cpu, pc, * FLD (i_Ri)));
- {
- BI opval = EQQI (tmp_tmp, 0);
- CPU (h_zbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
- }
- {
- BI opval = 0;
- CPU (h_nbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
- }
-}
-
- return vpc;
-#undef FLD
-}
-
-/* btsth: btsth $u4,@$Ri */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,btsth) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_addi.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- QI tmp_tmp;
- tmp_tmp = ANDQI (SLLQI (FLD (f_u4), 4), GETMEMQI (current_cpu, pc, * FLD (i_Ri)));
- {
- BI opval = EQQI (tmp_tmp, 0);
- CPU (h_zbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
- }
- {
- BI opval = LTQI (tmp_tmp, 0);
- CPU (h_nbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
- }
-}
-
- return vpc;
-#undef FLD
-}
-
-/* mul: mul $Rj,$Ri */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,mul) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_str13.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- DI tmp_tmp;
- tmp_tmp = MULDI (EXTSIDI (* FLD (i_Rj)), EXTSIDI (* FLD (i_Ri)));
- {
- SI opval = TRUNCDISI (tmp_tmp);
- SET_H_DR (((UINT) 5), opval);
- TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
- }
- {
- SI opval = TRUNCDISI (SRLDI (tmp_tmp, 32));
- SET_H_DR (((UINT) 4), opval);
- TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
- }
- {
- BI opval = LTSI (GET_H_DR (((UINT) 5)), 0);
- CPU (h_nbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
- }
- {
- BI opval = EQDI (tmp_tmp, MAKEDI (0, 0));
- CPU (h_zbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
- }
- {
- BI opval = ORIF (GTDI (tmp_tmp, MAKEDI (0, 2147483647)), LTDI (tmp_tmp, NEGDI (MAKEDI (0, 0x80000000))));
- CPU (h_vbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
- }
-}
-
- return vpc;
-#undef FLD
-}
-
-/* mulu: mulu $Rj,$Ri */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,mulu) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_str13.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- DI tmp_tmp;
- tmp_tmp = MULDI (ZEXTSIDI (* FLD (i_Rj)), ZEXTSIDI (* FLD (i_Ri)));
- {
- SI opval = TRUNCDISI (tmp_tmp);
- SET_H_DR (((UINT) 5), opval);
- TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
- }
- {
- SI opval = TRUNCDISI (SRLDI (tmp_tmp, 32));
- SET_H_DR (((UINT) 4), opval);
- TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
- }
- {
- BI opval = LTSI (GET_H_DR (((UINT) 4)), 0);
- CPU (h_nbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
- }
- {
- BI opval = EQSI (GET_H_DR (((UINT) 5)), 0);
- CPU (h_zbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
- }
- {
- BI opval = NESI (GET_H_DR (((UINT) 4)), 0);
- CPU (h_vbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
- }
-}
-
- return vpc;
-#undef FLD
-}
-
-/* mulh: mulh $Rj,$Ri */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,mulh) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_str13.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- {
- SI opval = MULHI (TRUNCSIHI (* FLD (i_Rj)), TRUNCSIHI (* FLD (i_Ri)));
- SET_H_DR (((UINT) 5), opval);
- TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
- }
- {
- BI opval = LTSI (GET_H_DR (((UINT) 5)), 0);
- CPU (h_nbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
- }
- {
- BI opval = GESI (GET_H_DR (((UINT) 5)), 0);
- CPU (h_zbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
- }
-}
-
- return vpc;
-#undef FLD
-}
-
-/* muluh: muluh $Rj,$Ri */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,muluh) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_str13.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- {
- SI opval = MULSI (ANDSI (* FLD (i_Rj), 65535), ANDSI (* FLD (i_Ri), 65535));
- SET_H_DR (((UINT) 5), opval);
- TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
- }
- {
- BI opval = LTSI (GET_H_DR (((UINT) 5)), 0);
- CPU (h_nbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
- }
- {
- BI opval = GESI (GET_H_DR (((UINT) 5)), 0);
- CPU (h_zbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
- }
-}
-
- return vpc;
-#undef FLD
-}
-
-/* div0s: div0s $Ri */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,div0s) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_mov2dr.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- {
- BI opval = LTSI (GET_H_DR (((UINT) 5)), 0);
- CPU (h_d0bit) = opval;
- TRACE_RESULT (current_cpu, abuf, "d0bit", 'x', opval);
- }
- {
- BI opval = XORBI (CPU (h_d0bit), LTSI (* FLD (i_Ri), 0));
- CPU (h_d1bit) = opval;
- TRACE_RESULT (current_cpu, abuf, "d1bit", 'x', opval);
- }
-if (NEBI (CPU (h_d0bit), 0)) {
- {
- SI opval = 0xffffffff;
- SET_H_DR (((UINT) 4), opval);
- written |= (1 << 5);
- TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
- }
-} else {
- {
- SI opval = 0;
- SET_H_DR (((UINT) 4), opval);
- written |= (1 << 5);
- TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
- }
-}
-}
-
- abuf->written = written;
- return vpc;
-#undef FLD
-}
-
-/* div0u: div0u $Ri */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,div0u) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.fmt_empty.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- {
- BI opval = 0;
- CPU (h_d0bit) = opval;
- TRACE_RESULT (current_cpu, abuf, "d0bit", 'x', opval);
- }
- {
- BI opval = 0;
- CPU (h_d1bit) = opval;
- TRACE_RESULT (current_cpu, abuf, "d1bit", 'x', opval);
- }
- {
- SI opval = 0;
- SET_H_DR (((UINT) 4), opval);
- TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
- }
-}
-
- return vpc;
-#undef FLD
-}
-
-/* div1: div1 $Ri */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,div1) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_mov2dr.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- SI tmp_tmp;
- {
- SI opval = SLLSI (GET_H_DR (((UINT) 4)), 1);
- SET_H_DR (((UINT) 4), opval);
- TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
- }
-if (LTSI (GET_H_DR (((UINT) 5)), 0)) {
- {
- SI opval = ADDSI (GET_H_DR (((UINT) 4)), 1);
- SET_H_DR (((UINT) 4), opval);
- TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
- }
-}
- {
- SI opval = SLLSI (GET_H_DR (((UINT) 5)), 1);
- SET_H_DR (((UINT) 5), opval);
- TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
- }
-if (EQBI (CPU (h_d1bit), 1)) {
-{
- tmp_tmp = ADDSI (GET_H_DR (((UINT) 4)), * FLD (i_Ri));
- {
- BI opval = ADDCFSI (GET_H_DR (((UINT) 4)), * FLD (i_Ri), 0);
- CPU (h_cbit) = opval;
- written |= (1 << 6);
- TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
- }
-}
-} else {
-{
- tmp_tmp = SUBSI (GET_H_DR (((UINT) 4)), * FLD (i_Ri));
- {
- BI opval = SUBCFSI (GET_H_DR (((UINT) 4)), * FLD (i_Ri), 0);
- CPU (h_cbit) = opval;
- written |= (1 << 6);
- TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
- }
-}
-}
-if (NOTBI (XORBI (XORBI (CPU (h_d0bit), CPU (h_d1bit)), CPU (h_cbit)))) {
-{
- {
- SI opval = tmp_tmp;
- SET_H_DR (((UINT) 4), opval);
- TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
- }
- {
- SI opval = ORSI (GET_H_DR (((UINT) 5)), 1);
- SET_H_DR (((UINT) 5), opval);
- TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
- }
-}
-}
- {
- BI opval = EQSI (GET_H_DR (((UINT) 4)), 0);
- CPU (h_zbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
- }
-}
-
- abuf->written = written;
- return vpc;
-#undef FLD
-}
-
-/* div2: div2 $Ri */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,div2) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_mov2dr.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- SI tmp_tmp;
-if (EQBI (CPU (h_d1bit), 1)) {
-{
- tmp_tmp = ADDSI (GET_H_DR (((UINT) 4)), * FLD (i_Ri));
- {
- BI opval = ADDCFSI (GET_H_DR (((UINT) 4)), * FLD (i_Ri), 0);
- CPU (h_cbit) = opval;
- written |= (1 << 3);
- TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
- }
-}
-} else {
-{
- tmp_tmp = SUBSI (GET_H_DR (((UINT) 4)), * FLD (i_Ri));
- {
- BI opval = SUBCFSI (GET_H_DR (((UINT) 4)), * FLD (i_Ri), 0);
- CPU (h_cbit) = opval;
- written |= (1 << 3);
- TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
- }
-}
-}
-if (EQSI (tmp_tmp, 0)) {
-{
- {
- BI opval = 1;
- CPU (h_zbit) = opval;
- written |= (1 << 5);
- TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
- }
- {
- SI opval = 0;
- SET_H_DR (((UINT) 4), opval);
- written |= (1 << 4);
- TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
- }
-}
-} else {
- {
- BI opval = 0;
- CPU (h_zbit) = opval;
- written |= (1 << 5);
- TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
- }
-}
-}
-
- abuf->written = written;
- return vpc;
-#undef FLD
-}
-
-/* div3: div3 */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,div3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.fmt_empty.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-if (EQBI (CPU (h_zbit), 1)) {
- {
- SI opval = ADDSI (GET_H_DR (((UINT) 5)), 1);
- SET_H_DR (((UINT) 5), opval);
- written |= (1 << 2);
- TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
- }
-}
-
- abuf->written = written;
- return vpc;
-#undef FLD
-}
-
-/* div4s: div4s */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,div4s) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.fmt_empty.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-if (EQBI (CPU (h_d1bit), 1)) {
- {
- SI opval = NEGSI (GET_H_DR (((UINT) 5)));
- SET_H_DR (((UINT) 5), opval);
- written |= (1 << 2);
- TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
- }
-}
-
- abuf->written = written;
- return vpc;
-#undef FLD
-}
-
-/* lsl: lsl $Rj,$Ri */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,lsl) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- SI tmp_shift;
- tmp_shift = ANDSI (* FLD (i_Rj), 31);
-if (NESI (tmp_shift, 0)) {
-{
- {
- BI opval = NESI (ANDSI (* FLD (i_Ri), SLLSI (1, SUBSI (32, tmp_shift))), 0);
- CPU (h_cbit) = opval;
- written |= (1 << 3);
- TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
- }
- {
- SI opval = SLLSI (* FLD (i_Ri), tmp_shift);
- * FLD (i_Ri) = opval;
- written |= (1 << 2);
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-}
-} else {
- {
- BI opval = 0;
- CPU (h_cbit) = opval;
- written |= (1 << 3);
- TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
- }
-}
- {
- BI opval = LTSI (* FLD (i_Ri), 0);
- CPU (h_nbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
- }
- {
- BI opval = EQSI (* FLD (i_Ri), 0);
- CPU (h_zbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
- }
-}
-
- abuf->written = written;
- return vpc;
-#undef FLD
-}
-
-/* lsli: lsl $u4,$Ri */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,lsli) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_addi.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- SI tmp_shift;
- tmp_shift = FLD (f_u4);
-if (NESI (tmp_shift, 0)) {
-{
- {
- BI opval = NESI (ANDSI (* FLD (i_Ri), SLLSI (1, SUBSI (32, tmp_shift))), 0);
- CPU (h_cbit) = opval;
- written |= (1 << 3);
- TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
- }
- {
- SI opval = SLLSI (* FLD (i_Ri), tmp_shift);
- * FLD (i_Ri) = opval;
- written |= (1 << 2);
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-}
-} else {
- {
- BI opval = 0;
- CPU (h_cbit) = opval;
- written |= (1 << 3);
- TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
- }
-}
- {
- BI opval = LTSI (* FLD (i_Ri), 0);
- CPU (h_nbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
- }
- {
- BI opval = EQSI (* FLD (i_Ri), 0);
- CPU (h_zbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
- }
-}
-
- abuf->written = written;
- return vpc;
-#undef FLD
-}
-
-/* lsl2: lsl2 $u4,$Ri */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,lsl2) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_addi.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- SI tmp_shift;
- tmp_shift = ADDSI (FLD (f_u4), 16);
-if (NESI (tmp_shift, 0)) {
-{
- {
- BI opval = NESI (ANDSI (* FLD (i_Ri), SLLSI (1, SUBSI (32, tmp_shift))), 0);
- CPU (h_cbit) = opval;
- written |= (1 << 3);
- TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
- }
- {
- SI opval = SLLSI (* FLD (i_Ri), tmp_shift);
- * FLD (i_Ri) = opval;
- written |= (1 << 2);
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-}
-} else {
- {
- BI opval = 0;
- CPU (h_cbit) = opval;
- written |= (1 << 3);
- TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
- }
-}
- {
- BI opval = LTSI (* FLD (i_Ri), 0);
- CPU (h_nbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
- }
- {
- BI opval = EQSI (* FLD (i_Ri), 0);
- CPU (h_zbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
- }
-}
-
- abuf->written = written;
- return vpc;
-#undef FLD
-}
-
-/* lsr: lsr $Rj,$Ri */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,lsr) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- SI tmp_shift;
- tmp_shift = ANDSI (* FLD (i_Rj), 31);
-if (NESI (tmp_shift, 0)) {
-{
- {
- BI opval = NESI (ANDSI (* FLD (i_Ri), SLLSI (1, SUBSI (tmp_shift, 1))), 0);
- CPU (h_cbit) = opval;
- written |= (1 << 3);
- TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
- }
- {
- SI opval = SRLSI (* FLD (i_Ri), tmp_shift);
- * FLD (i_Ri) = opval;
- written |= (1 << 2);
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-}
-} else {
- {
- BI opval = 0;
- CPU (h_cbit) = opval;
- written |= (1 << 3);
- TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
- }
-}
- {
- BI opval = LTSI (* FLD (i_Ri), 0);
- CPU (h_nbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
- }
- {
- BI opval = EQSI (* FLD (i_Ri), 0);
- CPU (h_zbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
- }
-}
-
- abuf->written = written;
- return vpc;
-#undef FLD
-}
-
-/* lsri: lsr $u4,$Ri */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,lsri) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_addi.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- SI tmp_shift;
- tmp_shift = FLD (f_u4);
-if (NESI (tmp_shift, 0)) {
-{
- {
- BI opval = NESI (ANDSI (* FLD (i_Ri), SLLSI (1, SUBSI (tmp_shift, 1))), 0);
- CPU (h_cbit) = opval;
- written |= (1 << 3);
- TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
- }
- {
- SI opval = SRLSI (* FLD (i_Ri), tmp_shift);
- * FLD (i_Ri) = opval;
- written |= (1 << 2);
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-}
-} else {
- {
- BI opval = 0;
- CPU (h_cbit) = opval;
- written |= (1 << 3);
- TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
- }
-}
- {
- BI opval = LTSI (* FLD (i_Ri), 0);
- CPU (h_nbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
- }
- {
- BI opval = EQSI (* FLD (i_Ri), 0);
- CPU (h_zbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
- }
-}
-
- abuf->written = written;
- return vpc;
-#undef FLD
-}
-
-/* lsr2: lsr2 $u4,$Ri */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,lsr2) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_addi.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- SI tmp_shift;
- tmp_shift = ADDSI (FLD (f_u4), 16);
-if (NESI (tmp_shift, 0)) {
-{
- {
- BI opval = NESI (ANDSI (* FLD (i_Ri), SLLSI (1, SUBSI (tmp_shift, 1))), 0);
- CPU (h_cbit) = opval;
- written |= (1 << 3);
- TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
- }
- {
- SI opval = SRLSI (* FLD (i_Ri), tmp_shift);
- * FLD (i_Ri) = opval;
- written |= (1 << 2);
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-}
-} else {
- {
- BI opval = 0;
- CPU (h_cbit) = opval;
- written |= (1 << 3);
- TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
- }
-}
- {
- BI opval = LTSI (* FLD (i_Ri), 0);
- CPU (h_nbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
- }
- {
- BI opval = EQSI (* FLD (i_Ri), 0);
- CPU (h_zbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
- }
-}
-
- abuf->written = written;
- return vpc;
-#undef FLD
-}
-
-/* asr: asr $Rj,$Ri */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,asr) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- SI tmp_shift;
- tmp_shift = ANDSI (* FLD (i_Rj), 31);
-if (NESI (tmp_shift, 0)) {
-{
- {
- BI opval = NESI (ANDSI (* FLD (i_Ri), SLLSI (1, SUBSI (tmp_shift, 1))), 0);
- CPU (h_cbit) = opval;
- written |= (1 << 3);
- TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
- }
- {
- SI opval = SRASI (* FLD (i_Ri), tmp_shift);
- * FLD (i_Ri) = opval;
- written |= (1 << 2);
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-}
-} else {
- {
- BI opval = 0;
- CPU (h_cbit) = opval;
- written |= (1 << 3);
- TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
- }
-}
- {
- BI opval = LTSI (* FLD (i_Ri), 0);
- CPU (h_nbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
- }
- {
- BI opval = EQSI (* FLD (i_Ri), 0);
- CPU (h_zbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
- }
-}
-
- abuf->written = written;
- return vpc;
-#undef FLD
-}
-
-/* asri: asr $u4,$Ri */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,asri) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_addi.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- SI tmp_shift;
- tmp_shift = FLD (f_u4);
-if (NESI (tmp_shift, 0)) {
-{
- {
- BI opval = NESI (ANDSI (* FLD (i_Ri), SLLSI (1, SUBSI (tmp_shift, 1))), 0);
- CPU (h_cbit) = opval;
- written |= (1 << 3);
- TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
- }
- {
- SI opval = SRASI (* FLD (i_Ri), tmp_shift);
- * FLD (i_Ri) = opval;
- written |= (1 << 2);
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-}
-} else {
- {
- BI opval = 0;
- CPU (h_cbit) = opval;
- written |= (1 << 3);
- TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
- }
-}
- {
- BI opval = LTSI (* FLD (i_Ri), 0);
- CPU (h_nbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
- }
- {
- BI opval = EQSI (* FLD (i_Ri), 0);
- CPU (h_zbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
- }
-}
-
- abuf->written = written;
- return vpc;
-#undef FLD
-}
-
-/* asr2: asr2 $u4,$Ri */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,asr2) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_addi.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- SI tmp_shift;
- tmp_shift = ADDSI (FLD (f_u4), 16);
-if (NESI (tmp_shift, 0)) {
-{
- {
- BI opval = NESI (ANDSI (* FLD (i_Ri), SLLSI (1, SUBSI (tmp_shift, 1))), 0);
- CPU (h_cbit) = opval;
- written |= (1 << 3);
- TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
- }
- {
- SI opval = SRASI (* FLD (i_Ri), tmp_shift);
- * FLD (i_Ri) = opval;
- written |= (1 << 2);
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-}
-} else {
- {
- BI opval = 0;
- CPU (h_cbit) = opval;
- written |= (1 << 3);
- TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
- }
-}
- {
- BI opval = LTSI (* FLD (i_Ri), 0);
- CPU (h_nbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
- }
- {
- BI opval = EQSI (* FLD (i_Ri), 0);
- CPU (h_zbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
- }
-}
-
- abuf->written = written;
- return vpc;
-#undef FLD
-}
-
-/* ldi8: ldi:8 $i8,$Ri */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,ldi8) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldi8.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = FLD (f_i8);
- * FLD (i_Ri) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* ldi20: ldi:20 $i20,$Ri */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,ldi20) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldi20.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = FLD (f_i20);
- * FLD (i_Ri) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* ldi32: ldi:32 $i32,$Ri */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,ldi32) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldi32.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 6);
-
- {
- SI opval = FLD (f_i32);
- * FLD (i_Ri) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* ld: ld @$Rj,$Ri */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,ld) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldr13.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = GETMEMSI (current_cpu, pc, * FLD (i_Rj));
- * FLD (i_Ri) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* lduh: lduh @$Rj,$Ri */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,lduh) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldr13.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = GETMEMUHI (current_cpu, pc, * FLD (i_Rj));
- * FLD (i_Ri) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* ldub: ldub @$Rj,$Ri */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,ldub) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldr13.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = GETMEMUQI (current_cpu, pc, * FLD (i_Rj));
- * FLD (i_Ri) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* ldr13: ld @($R13,$Rj),$Ri */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,ldr13) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldr13.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = GETMEMSI (current_cpu, pc, ADDSI (* FLD (i_Rj), CPU (h_gr[((UINT) 13)])));
- * FLD (i_Ri) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* ldr13uh: lduh @($R13,$Rj),$Ri */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,ldr13uh) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldr13.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = GETMEMUHI (current_cpu, pc, ADDSI (* FLD (i_Rj), CPU (h_gr[((UINT) 13)])));
- * FLD (i_Ri) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* ldr13ub: ldub @($R13,$Rj),$Ri */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,ldr13ub) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldr13.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = GETMEMUQI (current_cpu, pc, ADDSI (* FLD (i_Rj), CPU (h_gr[((UINT) 13)])));
- * FLD (i_Ri) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* ldr14: ld @($R14,$disp10),$Ri */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,ldr14) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldr14.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = GETMEMSI (current_cpu, pc, ADDSI (FLD (f_disp10), CPU (h_gr[((UINT) 14)])));
- * FLD (i_Ri) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* ldr14uh: lduh @($R14,$disp9),$Ri */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,ldr14uh) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldr14uh.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = GETMEMUHI (current_cpu, pc, ADDSI (FLD (f_disp9), CPU (h_gr[((UINT) 14)])));
- * FLD (i_Ri) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* ldr14ub: ldub @($R14,$disp8),$Ri */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,ldr14ub) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldr14ub.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = GETMEMUQI (current_cpu, pc, ADDSI (FLD (f_disp8), CPU (h_gr[((UINT) 14)])));
- * FLD (i_Ri) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* ldr15: ld @($R15,$udisp6),$Ri */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,ldr15) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldr15.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = GETMEMSI (current_cpu, pc, ADDSI (FLD (f_udisp6), CPU (h_gr[((UINT) 15)])));
- * FLD (i_Ri) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* ldr15gr: ld @$R15+,$Ri */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,ldr15gr) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldr15gr.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- {
- SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]));
- * FLD (i_Ri) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-if (NESI (FLD (f_Ri), 15)) {
- {
- SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4);
- CPU (h_gr[((UINT) 15)]) = opval;
- written |= (1 << 4);
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-}
-}
-
- abuf->written = written;
- return vpc;
-#undef FLD
-}
-
-/* ldr15dr: ld @$R15+,$Rs2 */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,ldr15dr) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldr15dr.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- SI tmp_tmp;
- tmp_tmp = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]));
- {
- SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4);
- CPU (h_gr[((UINT) 15)]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
- {
- SI opval = tmp_tmp;
- SET_H_DR (FLD (f_Rs2), opval);
- TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
- }
-}
-
- return vpc;
-#undef FLD
-}
-
-/* ldr15ps: ld @$R15+,$ps */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,ldr15ps) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_addsp.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- {
- USI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]));
- SET_H_PS (opval);
- TRACE_RESULT (current_cpu, abuf, "ps", 'x', opval);
- }
- {
- SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4);
- CPU (h_gr[((UINT) 15)]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-}
-
- return vpc;
-#undef FLD
-}
-
-/* st: st $Ri,@$Rj */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,st) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_str13.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = * FLD (i_Ri);
- SETMEMSI (current_cpu, pc, * FLD (i_Rj), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* sth: sth $Ri,@$Rj */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,sth) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_str13.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- HI opval = * FLD (i_Ri);
- SETMEMHI (current_cpu, pc, * FLD (i_Rj), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* stb: stb $Ri,@$Rj */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,stb) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_str13.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- QI opval = * FLD (i_Ri);
- SETMEMQI (current_cpu, pc, * FLD (i_Rj), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* str13: st $Ri,@($R13,$Rj) */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,str13) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_str13.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = * FLD (i_Ri);
- SETMEMSI (current_cpu, pc, ADDSI (* FLD (i_Rj), CPU (h_gr[((UINT) 13)])), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* str13h: sth $Ri,@($R13,$Rj) */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,str13h) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_str13.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- HI opval = * FLD (i_Ri);
- SETMEMHI (current_cpu, pc, ADDSI (* FLD (i_Rj), CPU (h_gr[((UINT) 13)])), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* str13b: stb $Ri,@($R13,$Rj) */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,str13b) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_str13.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- QI opval = * FLD (i_Ri);
- SETMEMQI (current_cpu, pc, ADDSI (* FLD (i_Rj), CPU (h_gr[((UINT) 13)])), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* str14: st $Ri,@($R14,$disp10) */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,str14) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_str14.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = * FLD (i_Ri);
- SETMEMSI (current_cpu, pc, ADDSI (FLD (f_disp10), CPU (h_gr[((UINT) 14)])), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* str14h: sth $Ri,@($R14,$disp9) */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,str14h) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_str14h.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- HI opval = * FLD (i_Ri);
- SETMEMHI (current_cpu, pc, ADDSI (FLD (f_disp9), CPU (h_gr[((UINT) 14)])), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* str14b: stb $Ri,@($R14,$disp8) */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,str14b) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_str14b.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- QI opval = * FLD (i_Ri);
- SETMEMQI (current_cpu, pc, ADDSI (FLD (f_disp8), CPU (h_gr[((UINT) 14)])), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* str15: st $Ri,@($R15,$udisp6) */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,str15) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_str15.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = * FLD (i_Ri);
- SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 15)]), FLD (f_udisp6)), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* str15gr: st $Ri,@-$R15 */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,str15gr) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_str15gr.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- SI tmp_tmp;
- tmp_tmp = * FLD (i_Ri);
- {
- SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4);
- CPU (h_gr[((UINT) 15)]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
- {
- SI opval = tmp_tmp;
- SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-}
-
- return vpc;
-#undef FLD
-}
-
-/* str15dr: st $Rs2,@-$R15 */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,str15dr) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldr15dr.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- SI tmp_tmp;
- tmp_tmp = GET_H_DR (FLD (f_Rs2));
- {
- SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4);
- CPU (h_gr[((UINT) 15)]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
- {
- SI opval = tmp_tmp;
- SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-}
-
- return vpc;
-#undef FLD
-}
-
-/* str15ps: st $ps,@-$R15 */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,str15ps) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_addsp.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- {
- SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4);
- CPU (h_gr[((UINT) 15)]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
- {
- SI opval = GET_H_PS ();
- SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-}
-
- return vpc;
-#undef FLD
-}
-
-/* mov: mov $Rj,$Ri */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,mov) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldr13.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = * FLD (i_Rj);
- * FLD (i_Ri) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* movdr: mov $Rs1,$Ri */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,movdr) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_movdr.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = GET_H_DR (FLD (f_Rs1));
- * FLD (i_Ri) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* movps: mov $ps,$Ri */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,movps) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_movdr.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = GET_H_PS ();
- * FLD (i_Ri) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* mov2dr: mov $Ri,$Rs1 */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,mov2dr) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_mov2dr.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = * FLD (i_Ri);
- SET_H_DR (FLD (f_Rs1), opval);
- TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* mov2ps: mov $Ri,$ps */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,mov2ps) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_mov2dr.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- USI opval = * FLD (i_Ri);
- SET_H_PS (opval);
- TRACE_RESULT (current_cpu, abuf, "ps", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* jmp: jmp @$Ri */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,jmp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_mov2dr.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- USI opval = * FLD (i_Ri);
- SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-
- SEM_BRANCH_FINI (vpc);
- return vpc;
-#undef FLD
-}
-
-/* jmpd: jmp:d @$Ri */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,jmpd) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_mov2dr.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- {
- USI opval = * FLD (i_Ri);
- SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- SEM_BRANCH_FINI (vpc);
- return vpc;
-#undef FLD
-}
-
-/* callr: call @$Ri */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,callr) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_mov2dr.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- {
- SI opval = ADDSI (pc, 2);
- SET_H_DR (((UINT) 1), opval);
- TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
- }
- {
- USI opval = * FLD (i_Ri);
- SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- SEM_BRANCH_FINI (vpc);
- return vpc;
-#undef FLD
-}
-
-/* callrd: call:d @$Ri */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,callrd) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_mov2dr.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
-{
- {
- SI opval = ADDSI (pc, 4);
- SET_H_DR (((UINT) 1), opval);
- TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
- }
- {
- USI opval = * FLD (i_Ri);
- SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-}
-
- SEM_BRANCH_FINI (vpc);
- return vpc;
-#undef FLD
-}
-
-/* call: call $label12 */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,call) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_call.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- {
- SI opval = ADDSI (pc, 2);
- SET_H_DR (((UINT) 1), opval);
- TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
- }
- {
- USI opval = FLD (i_label12);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- SEM_BRANCH_FINI (vpc);
- return vpc;
-#undef FLD
-}
-
-/* calld: call:d $label12 */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,calld) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_call.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
-{
- {
- SI opval = ADDSI (pc, 4);
- SET_H_DR (((UINT) 1), opval);
- TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
- }
- {
- USI opval = FLD (i_label12);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-}
-
- SEM_BRANCH_FINI (vpc);
- return vpc;
-#undef FLD
-}
-
-/* ret: ret */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,ret) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.fmt_empty.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- USI opval = GET_H_DR (((UINT) 1));
- SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-
- SEM_BRANCH_FINI (vpc);
- return vpc;
-#undef FLD
-}
-
-/* ret:d: ret:d */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,ret_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.fmt_empty.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- {
- USI opval = GET_H_DR (((UINT) 1));
- SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- SEM_BRANCH_FINI (vpc);
- return vpc;
-#undef FLD
-}
-
-/* int: int $u8 */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,int) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_int.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
-; /*clobber*/
-; /*clobber*/
-; /*clobber*/
- {
- SI opval = fr30_int (current_cpu, pc, FLD (f_u8));
- SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- SEM_BRANCH_FINI (vpc);
- return vpc;
-#undef FLD
-}
-
-/* inte: inte */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,inte) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.fmt_empty.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
-; /*clobber*/
-; /*clobber*/
-; /*clobber*/
- {
- SI opval = fr30_inte (current_cpu, pc);
- SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- SEM_BRANCH_FINI (vpc);
- return vpc;
-#undef FLD
-}
-
-/* reti: reti */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,reti) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.fmt_empty.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-if (EQBI (GET_H_SBIT (), 0)) {
-{
- {
- SI opval = GETMEMSI (current_cpu, pc, GET_H_DR (((UINT) 2)));
- SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 7);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
- {
- SI opval = ADDSI (GET_H_DR (((UINT) 2)), 4);
- SET_H_DR (((UINT) 2), opval);
- written |= (1 << 5);
- TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
- }
- {
- SI opval = GETMEMSI (current_cpu, pc, GET_H_DR (((UINT) 2)));
- SET_H_PS (opval);
- written |= (1 << 8);
- TRACE_RESULT (current_cpu, abuf, "ps", 'x', opval);
- }
- {
- SI opval = ADDSI (GET_H_DR (((UINT) 2)), 4);
- SET_H_DR (((UINT) 2), opval);
- written |= (1 << 5);
- TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
- }
-}
-} else {
-{
- {
- SI opval = GETMEMSI (current_cpu, pc, GET_H_DR (((UINT) 3)));
- SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 7);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
- {
- SI opval = ADDSI (GET_H_DR (((UINT) 3)), 4);
- SET_H_DR (((UINT) 3), opval);
- written |= (1 << 6);
- TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
- }
- {
- SI opval = GETMEMSI (current_cpu, pc, GET_H_DR (((UINT) 3)));
- SET_H_PS (opval);
- written |= (1 << 8);
- TRACE_RESULT (current_cpu, abuf, "ps", 'x', opval);
- }
- {
- SI opval = ADDSI (GET_H_DR (((UINT) 3)), 4);
- SET_H_DR (((UINT) 3), opval);
- written |= (1 << 6);
- TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
- }
-}
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
- return vpc;
-#undef FLD
-}
-
-/* brad: bra:d $label9 */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,brad) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_brad.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- {
- USI opval = FLD (i_label9);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- SEM_BRANCH_FINI (vpc);
- return vpc;
-#undef FLD
-}
-
-/* bra: bra $label9 */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,bra) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_brad.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- USI opval = FLD (i_label9);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-
- SEM_BRANCH_FINI (vpc);
- return vpc;
-#undef FLD
-}
-
-/* bnod: bno:d $label9 */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,bnod) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.fmt_empty.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
-((void) 0); /*nop*/
-}
-
- return vpc;
-#undef FLD
-}
-
-/* bno: bno $label9 */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,bno) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.fmt_empty.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-((void) 0); /*nop*/
-
- return vpc;
-#undef FLD
-}
-
-/* beqd: beq:d $label9 */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,beqd) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_brad.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
-if (CPU (h_zbit)) {
- {
- USI opval = FLD (i_label9);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 2);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
- return vpc;
-#undef FLD
-}
-
-/* beq: beq $label9 */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,beq) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_brad.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-if (CPU (h_zbit)) {
- {
- USI opval = FLD (i_label9);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 2);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
- return vpc;
-#undef FLD
-}
-
-/* bned: bne:d $label9 */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,bned) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_brad.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
-if (NOTBI (CPU (h_zbit))) {
- {
- USI opval = FLD (i_label9);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 2);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
- return vpc;
-#undef FLD
-}
-
-/* bne: bne $label9 */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,bne) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_brad.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-if (NOTBI (CPU (h_zbit))) {
- {
- USI opval = FLD (i_label9);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 2);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
- return vpc;
-#undef FLD
-}
-
-/* bcd: bc:d $label9 */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,bcd) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_brad.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
-if (CPU (h_cbit)) {
- {
- USI opval = FLD (i_label9);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 2);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
- return vpc;
-#undef FLD
-}
-
-/* bc: bc $label9 */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,bc) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_brad.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-if (CPU (h_cbit)) {
- {
- USI opval = FLD (i_label9);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 2);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
- return vpc;
-#undef FLD
-}
-
-/* bncd: bnc:d $label9 */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,bncd) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_brad.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
-if (NOTBI (CPU (h_cbit))) {
- {
- USI opval = FLD (i_label9);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 2);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
- return vpc;
-#undef FLD
-}
-
-/* bnc: bnc $label9 */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,bnc) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_brad.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-if (NOTBI (CPU (h_cbit))) {
- {
- USI opval = FLD (i_label9);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 2);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
- return vpc;
-#undef FLD
-}
-
-/* bnd: bn:d $label9 */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,bnd) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_brad.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
-if (CPU (h_nbit)) {
- {
- USI opval = FLD (i_label9);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 2);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
- return vpc;
-#undef FLD
-}
-
-/* bn: bn $label9 */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,bn) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_brad.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-if (CPU (h_nbit)) {
- {
- USI opval = FLD (i_label9);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 2);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
- return vpc;
-#undef FLD
-}
-
-/* bpd: bp:d $label9 */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,bpd) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_brad.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
-if (NOTBI (CPU (h_nbit))) {
- {
- USI opval = FLD (i_label9);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 2);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
- return vpc;
-#undef FLD
-}
-
-/* bp: bp $label9 */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,bp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_brad.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-if (NOTBI (CPU (h_nbit))) {
- {
- USI opval = FLD (i_label9);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 2);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
- return vpc;
-#undef FLD
-}
-
-/* bvd: bv:d $label9 */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,bvd) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_brad.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
-if (CPU (h_vbit)) {
- {
- USI opval = FLD (i_label9);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 2);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
- return vpc;
-#undef FLD
-}
-
-/* bv: bv $label9 */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,bv) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_brad.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-if (CPU (h_vbit)) {
- {
- USI opval = FLD (i_label9);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 2);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
- return vpc;
-#undef FLD
-}
-
-/* bnvd: bnv:d $label9 */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,bnvd) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_brad.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
-if (NOTBI (CPU (h_vbit))) {
- {
- USI opval = FLD (i_label9);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 2);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
- return vpc;
-#undef FLD
-}
-
-/* bnv: bnv $label9 */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,bnv) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_brad.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-if (NOTBI (CPU (h_vbit))) {
- {
- USI opval = FLD (i_label9);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 2);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
- return vpc;
-#undef FLD
-}
-
-/* bltd: blt:d $label9 */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,bltd) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_brad.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
-if (XORBI (CPU (h_vbit), CPU (h_nbit))) {
- {
- USI opval = FLD (i_label9);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 3);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
- return vpc;
-#undef FLD
-}
-
-/* blt: blt $label9 */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,blt) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_brad.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-if (XORBI (CPU (h_vbit), CPU (h_nbit))) {
- {
- USI opval = FLD (i_label9);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 3);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
- return vpc;
-#undef FLD
-}
-
-/* bged: bge:d $label9 */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,bged) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_brad.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
-if (NOTBI (XORBI (CPU (h_vbit), CPU (h_nbit)))) {
- {
- USI opval = FLD (i_label9);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 3);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
- return vpc;
-#undef FLD
-}
-
-/* bge: bge $label9 */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,bge) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_brad.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-if (NOTBI (XORBI (CPU (h_vbit), CPU (h_nbit)))) {
- {
- USI opval = FLD (i_label9);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 3);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
- return vpc;
-#undef FLD
-}
-
-/* bled: ble:d $label9 */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,bled) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_brad.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
-if (ORBI (XORBI (CPU (h_vbit), CPU (h_nbit)), CPU (h_zbit))) {
- {
- USI opval = FLD (i_label9);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 4);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
- return vpc;
-#undef FLD
-}
-
-/* ble: ble $label9 */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,ble) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_brad.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-if (ORBI (XORBI (CPU (h_vbit), CPU (h_nbit)), CPU (h_zbit))) {
- {
- USI opval = FLD (i_label9);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 4);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
- return vpc;
-#undef FLD
-}
-
-/* bgtd: bgt:d $label9 */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,bgtd) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_brad.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
-if (NOTBI (ORBI (XORBI (CPU (h_vbit), CPU (h_nbit)), CPU (h_zbit)))) {
- {
- USI opval = FLD (i_label9);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 4);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
- return vpc;
-#undef FLD
-}
-
-/* bgt: bgt $label9 */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,bgt) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_brad.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-if (NOTBI (ORBI (XORBI (CPU (h_vbit), CPU (h_nbit)), CPU (h_zbit)))) {
- {
- USI opval = FLD (i_label9);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 4);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
- return vpc;
-#undef FLD
-}
-
-/* blsd: bls:d $label9 */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,blsd) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_brad.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
-if (ORBI (CPU (h_cbit), CPU (h_zbit))) {
- {
- USI opval = FLD (i_label9);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 3);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
- return vpc;
-#undef FLD
-}
-
-/* bls: bls $label9 */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,bls) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_brad.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-if (ORBI (CPU (h_cbit), CPU (h_zbit))) {
- {
- USI opval = FLD (i_label9);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 3);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
- return vpc;
-#undef FLD
-}
-
-/* bhid: bhi:d $label9 */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,bhid) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_brad.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
-if (NOTBI (ORBI (CPU (h_cbit), CPU (h_zbit)))) {
- {
- USI opval = FLD (i_label9);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 3);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
- return vpc;
-#undef FLD
-}
-
-/* bhi: bhi $label9 */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,bhi) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_brad.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-if (NOTBI (ORBI (CPU (h_cbit), CPU (h_zbit)))) {
- {
- USI opval = FLD (i_label9);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 3);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
- return vpc;
-#undef FLD
-}
-
-/* dmovr13: dmov $R13,@$dir10 */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,dmovr13) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_dmovr13pi.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = CPU (h_gr[((UINT) 13)]);
- SETMEMSI (current_cpu, pc, FLD (f_dir10), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* dmovr13h: dmovh $R13,@$dir9 */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,dmovr13h) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_dmovr13pih.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- HI opval = CPU (h_gr[((UINT) 13)]);
- SETMEMHI (current_cpu, pc, FLD (f_dir9), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* dmovr13b: dmovb $R13,@$dir8 */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,dmovr13b) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_dmovr13pib.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- QI opval = CPU (h_gr[((UINT) 13)]);
- SETMEMQI (current_cpu, pc, FLD (f_dir8), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* dmovr13pi: dmov @$R13+,@$dir10 */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,dmovr13pi) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_dmovr13pi.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- {
- SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 13)]));
- SETMEMSI (current_cpu, pc, FLD (f_dir10), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
- {
- SI opval = ADDSI (CPU (h_gr[((UINT) 13)]), 4);
- CPU (h_gr[((UINT) 13)]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-}
-
- return vpc;
-#undef FLD
-}
-
-/* dmovr13pih: dmovh @$R13+,@$dir9 */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,dmovr13pih) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_dmovr13pih.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- {
- HI opval = GETMEMHI (current_cpu, pc, CPU (h_gr[((UINT) 13)]));
- SETMEMHI (current_cpu, pc, FLD (f_dir9), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
- {
- SI opval = ADDSI (CPU (h_gr[((UINT) 13)]), 2);
- CPU (h_gr[((UINT) 13)]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-}
-
- return vpc;
-#undef FLD
-}
-
-/* dmovr13pib: dmovb @$R13+,@$dir8 */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,dmovr13pib) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_dmovr13pib.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- {
- QI opval = GETMEMQI (current_cpu, pc, CPU (h_gr[((UINT) 13)]));
- SETMEMQI (current_cpu, pc, FLD (f_dir8), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
- {
- SI opval = ADDSI (CPU (h_gr[((UINT) 13)]), 1);
- CPU (h_gr[((UINT) 13)]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-}
-
- return vpc;
-#undef FLD
-}
-
-/* dmovr15pi: dmov @$R15+,@$dir10 */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,dmovr15pi) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_dmovr15pi.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- {
- SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]));
- SETMEMSI (current_cpu, pc, FLD (f_dir10), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
- {
- SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4);
- CPU (h_gr[((UINT) 15)]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-}
-
- return vpc;
-#undef FLD
-}
-
-/* dmov2r13: dmov @$dir10,$R13 */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,dmov2r13) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_dmovr13pi.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = GETMEMSI (current_cpu, pc, FLD (f_dir10));
- CPU (h_gr[((UINT) 13)]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* dmov2r13h: dmovh @$dir9,$R13 */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,dmov2r13h) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_dmovr13pih.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = GETMEMHI (current_cpu, pc, FLD (f_dir9));
- CPU (h_gr[((UINT) 13)]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* dmov2r13b: dmovb @$dir8,$R13 */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,dmov2r13b) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_dmovr13pib.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = GETMEMQI (current_cpu, pc, FLD (f_dir8));
- CPU (h_gr[((UINT) 13)]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* dmov2r13pi: dmov @$dir10,@$R13+ */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,dmov2r13pi) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_dmovr13pi.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- {
- SI opval = GETMEMSI (current_cpu, pc, FLD (f_dir10));
- SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 13)]), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
- {
- SI opval = ADDSI (CPU (h_gr[((UINT) 13)]), 4);
- CPU (h_gr[((UINT) 13)]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-}
-
- return vpc;
-#undef FLD
-}
-
-/* dmov2r13pih: dmovh @$dir9,@$R13+ */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,dmov2r13pih) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_dmovr13pih.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- {
- HI opval = GETMEMHI (current_cpu, pc, FLD (f_dir9));
- SETMEMHI (current_cpu, pc, CPU (h_gr[((UINT) 13)]), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
- {
- SI opval = ADDSI (CPU (h_gr[((UINT) 13)]), 2);
- CPU (h_gr[((UINT) 13)]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-}
-
- return vpc;
-#undef FLD
-}
-
-/* dmov2r13pib: dmovb @$dir8,@$R13+ */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,dmov2r13pib) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_dmovr13pib.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- {
- QI opval = GETMEMQI (current_cpu, pc, FLD (f_dir8));
- SETMEMQI (current_cpu, pc, CPU (h_gr[((UINT) 13)]), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
- {
- SI opval = ADDSI (CPU (h_gr[((UINT) 13)]), 1);
- CPU (h_gr[((UINT) 13)]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-}
-
- return vpc;
-#undef FLD
-}
-
-/* dmov2r15pd: dmov @$dir10,@-$R15 */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,dmov2r15pd) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_dmovr15pi.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- {
- SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4);
- CPU (h_gr[((UINT) 15)]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
- {
- SI opval = GETMEMSI (current_cpu, pc, FLD (f_dir10));
- SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-}
-
- return vpc;
-#undef FLD
-}
-
-/* ldres: ldres @$Ri+,$u4 */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,ldres) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add2.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = ADDSI (* FLD (i_Ri), 4);
- * FLD (i_Ri) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* stres: stres $u4,@$Ri+ */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,stres) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add2.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = ADDSI (* FLD (i_Ri), 4);
- * FLD (i_Ri) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* copop: copop $u4c,$ccc,$CRj,$CRi */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,copop) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.fmt_empty.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-((void) 0); /*nop*/
-
- return vpc;
-#undef FLD
-}
-
-/* copld: copld $u4c,$ccc,$Rjc,$CRi */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,copld) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.fmt_empty.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-((void) 0); /*nop*/
-
- return vpc;
-#undef FLD
-}
-
-/* copst: copst $u4c,$ccc,$CRj,$Ric */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,copst) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.fmt_empty.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-((void) 0); /*nop*/
-
- return vpc;
-#undef FLD
-}
-
-/* copsv: copsv $u4c,$ccc,$CRj,$Ric */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,copsv) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.fmt_empty.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-((void) 0); /*nop*/
-
- return vpc;
-#undef FLD
-}
-
-/* nop: nop */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,nop) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.fmt_empty.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-((void) 0); /*nop*/
-
- return vpc;
-#undef FLD
-}
-
-/* andccr: andccr $u8 */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,andccr) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_int.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- UQI opval = ANDQI (GET_H_CCR (), FLD (f_u8));
- SET_H_CCR (opval);
- TRACE_RESULT (current_cpu, abuf, "ccr", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* orccr: orccr $u8 */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,orccr) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_int.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- UQI opval = ORQI (GET_H_CCR (), FLD (f_u8));
- SET_H_CCR (opval);
- TRACE_RESULT (current_cpu, abuf, "ccr", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* stilm: stilm $u8 */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,stilm) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_int.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- UQI opval = ANDSI (FLD (f_u8), 31);
- SET_H_ILM (opval);
- TRACE_RESULT (current_cpu, abuf, "ilm", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* addsp: addsp $s10 */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,addsp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_addsp.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), FLD (f_s10));
- CPU (h_gr[((UINT) 15)]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* extsb: extsb $Ri */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,extsb) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add2.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = EXTQISI (ANDQI (* FLD (i_Ri), 255));
- * FLD (i_Ri) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* extub: extub $Ri */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,extub) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add2.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = ZEXTQISI (ANDQI (* FLD (i_Ri), 255));
- * FLD (i_Ri) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* extsh: extsh $Ri */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,extsh) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add2.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = EXTHISI (ANDHI (* FLD (i_Ri), 65535));
- * FLD (i_Ri) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* extuh: extuh $Ri */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,extuh) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add2.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = ZEXTHISI (ANDHI (* FLD (i_Ri), 65535));
- * FLD (i_Ri) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* ldm0: ldm0 ($reglist_low_ld) */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,ldm0) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldm0.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
-if (ANDSI (FLD (f_reglist_low_ld), 1)) {
-{
- {
- SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]));
- CPU (h_gr[((UINT) 0)]) = opval;
- written |= (1 << 3);
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
- {
- SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4);
- CPU (h_gr[((UINT) 15)]) = opval;
- written |= (1 << 5);
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-}
-}
-if (ANDSI (FLD (f_reglist_low_ld), 2)) {
-{
- {
- SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]));
- CPU (h_gr[((UINT) 1)]) = opval;
- written |= (1 << 4);
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
- {
- SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4);
- CPU (h_gr[((UINT) 15)]) = opval;
- written |= (1 << 5);
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-}
-}
-if (ANDSI (FLD (f_reglist_low_ld), 4)) {
-{
- {
- SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]));
- CPU (h_gr[((UINT) 2)]) = opval;
- written |= (1 << 6);
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
- {
- SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4);
- CPU (h_gr[((UINT) 15)]) = opval;
- written |= (1 << 5);
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-}
-}
-if (ANDSI (FLD (f_reglist_low_ld), 8)) {
-{
- {
- SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]));
- CPU (h_gr[((UINT) 3)]) = opval;
- written |= (1 << 7);
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
- {
- SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4);
- CPU (h_gr[((UINT) 15)]) = opval;
- written |= (1 << 5);
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-}
-}
-if (ANDSI (FLD (f_reglist_low_ld), 16)) {
-{
- {
- SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]));
- CPU (h_gr[((UINT) 4)]) = opval;
- written |= (1 << 8);
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
- {
- SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4);
- CPU (h_gr[((UINT) 15)]) = opval;
- written |= (1 << 5);
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-}
-}
-if (ANDSI (FLD (f_reglist_low_ld), 32)) {
-{
- {
- SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]));
- CPU (h_gr[((UINT) 5)]) = opval;
- written |= (1 << 9);
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
- {
- SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4);
- CPU (h_gr[((UINT) 15)]) = opval;
- written |= (1 << 5);
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-}
-}
-if (ANDSI (FLD (f_reglist_low_ld), 64)) {
-{
- {
- SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]));
- CPU (h_gr[((UINT) 6)]) = opval;
- written |= (1 << 10);
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
- {
- SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4);
- CPU (h_gr[((UINT) 15)]) = opval;
- written |= (1 << 5);
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-}
-}
-if (ANDSI (FLD (f_reglist_low_ld), 128)) {
-{
- {
- SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]));
- CPU (h_gr[((UINT) 7)]) = opval;
- written |= (1 << 11);
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
- {
- SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4);
- CPU (h_gr[((UINT) 15)]) = opval;
- written |= (1 << 5);
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-}
-}
-}
-
- abuf->written = written;
- return vpc;
-#undef FLD
-}
-
-/* ldm1: ldm1 ($reglist_hi_ld) */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,ldm1) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldm1.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
-if (ANDSI (FLD (f_reglist_hi_ld), 1)) {
-{
- {
- SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]));
- CPU (h_gr[((UINT) 8)]) = opval;
- written |= (1 << 9);
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
- {
- SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4);
- CPU (h_gr[((UINT) 15)]) = opval;
- written |= (1 << 8);
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-}
-}
-if (ANDSI (FLD (f_reglist_hi_ld), 2)) {
-{
- {
- SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]));
- CPU (h_gr[((UINT) 9)]) = opval;
- written |= (1 << 10);
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
- {
- SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4);
- CPU (h_gr[((UINT) 15)]) = opval;
- written |= (1 << 8);
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-}
-}
-if (ANDSI (FLD (f_reglist_hi_ld), 4)) {
-{
- {
- SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]));
- CPU (h_gr[((UINT) 10)]) = opval;
- written |= (1 << 3);
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
- {
- SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4);
- CPU (h_gr[((UINT) 15)]) = opval;
- written |= (1 << 8);
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-}
-}
-if (ANDSI (FLD (f_reglist_hi_ld), 8)) {
-{
- {
- SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]));
- CPU (h_gr[((UINT) 11)]) = opval;
- written |= (1 << 4);
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
- {
- SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4);
- CPU (h_gr[((UINT) 15)]) = opval;
- written |= (1 << 8);
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-}
-}
-if (ANDSI (FLD (f_reglist_hi_ld), 16)) {
-{
- {
- SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]));
- CPU (h_gr[((UINT) 12)]) = opval;
- written |= (1 << 5);
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
- {
- SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4);
- CPU (h_gr[((UINT) 15)]) = opval;
- written |= (1 << 8);
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-}
-}
-if (ANDSI (FLD (f_reglist_hi_ld), 32)) {
-{
- {
- SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]));
- CPU (h_gr[((UINT) 13)]) = opval;
- written |= (1 << 6);
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
- {
- SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4);
- CPU (h_gr[((UINT) 15)]) = opval;
- written |= (1 << 8);
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-}
-}
-if (ANDSI (FLD (f_reglist_hi_ld), 64)) {
-{
- {
- SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]));
- CPU (h_gr[((UINT) 14)]) = opval;
- written |= (1 << 7);
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
- {
- SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4);
- CPU (h_gr[((UINT) 15)]) = opval;
- written |= (1 << 8);
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-}
-}
-if (ANDSI (FLD (f_reglist_hi_ld), 128)) {
- {
- SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]));
- CPU (h_gr[((UINT) 15)]) = opval;
- written |= (1 << 8);
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-}
-}
-
- abuf->written = written;
- return vpc;
-#undef FLD
-}
-
-/* stm0: stm0 ($reglist_low_st) */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,stm0) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stm0.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
-if (ANDSI (FLD (f_reglist_low_st), 1)) {
-{
- {
- SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4);
- CPU (h_gr[((UINT) 15)]) = opval;
- written |= (1 << 10);
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
- {
- SI opval = CPU (h_gr[((UINT) 7)]);
- SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval);
- written |= (1 << 11);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-}
-}
-if (ANDSI (FLD (f_reglist_low_st), 2)) {
-{
- {
- SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4);
- CPU (h_gr[((UINT) 15)]) = opval;
- written |= (1 << 10);
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
- {
- SI opval = CPU (h_gr[((UINT) 6)]);
- SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval);
- written |= (1 << 11);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-}
-}
-if (ANDSI (FLD (f_reglist_low_st), 4)) {
-{
- {
- SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4);
- CPU (h_gr[((UINT) 15)]) = opval;
- written |= (1 << 10);
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
- {
- SI opval = CPU (h_gr[((UINT) 5)]);
- SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval);
- written |= (1 << 11);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-}
-}
-if (ANDSI (FLD (f_reglist_low_st), 8)) {
-{
- {
- SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4);
- CPU (h_gr[((UINT) 15)]) = opval;
- written |= (1 << 10);
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
- {
- SI opval = CPU (h_gr[((UINT) 4)]);
- SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval);
- written |= (1 << 11);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-}
-}
-if (ANDSI (FLD (f_reglist_low_st), 16)) {
-{
- {
- SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4);
- CPU (h_gr[((UINT) 15)]) = opval;
- written |= (1 << 10);
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
- {
- SI opval = CPU (h_gr[((UINT) 3)]);
- SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval);
- written |= (1 << 11);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-}
-}
-if (ANDSI (FLD (f_reglist_low_st), 32)) {
-{
- {
- SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4);
- CPU (h_gr[((UINT) 15)]) = opval;
- written |= (1 << 10);
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
- {
- SI opval = CPU (h_gr[((UINT) 2)]);
- SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval);
- written |= (1 << 11);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-}
-}
-if (ANDSI (FLD (f_reglist_low_st), 64)) {
-{
- {
- SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4);
- CPU (h_gr[((UINT) 15)]) = opval;
- written |= (1 << 10);
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
- {
- SI opval = CPU (h_gr[((UINT) 1)]);
- SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval);
- written |= (1 << 11);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-}
-}
-if (ANDSI (FLD (f_reglist_low_st), 128)) {
-{
- {
- SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4);
- CPU (h_gr[((UINT) 15)]) = opval;
- written |= (1 << 10);
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
- {
- SI opval = CPU (h_gr[((UINT) 0)]);
- SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval);
- written |= (1 << 11);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-}
-}
-}
-
- abuf->written = written;
- return vpc;
-#undef FLD
-}
-
-/* stm1: stm1 ($reglist_hi_st) */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,stm1) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stm1.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
-if (ANDSI (FLD (f_reglist_hi_st), 1)) {
-{
- SI tmp_save_r15;
- tmp_save_r15 = CPU (h_gr[((UINT) 15)]);
- {
- SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4);
- CPU (h_gr[((UINT) 15)]) = opval;
- written |= (1 << 9);
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
- {
- SI opval = tmp_save_r15;
- SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval);
- written |= (1 << 10);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-}
-}
-if (ANDSI (FLD (f_reglist_hi_st), 2)) {
-{
- {
- SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4);
- CPU (h_gr[((UINT) 15)]) = opval;
- written |= (1 << 9);
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
- {
- SI opval = CPU (h_gr[((UINT) 14)]);
- SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval);
- written |= (1 << 10);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-}
-}
-if (ANDSI (FLD (f_reglist_hi_st), 4)) {
-{
- {
- SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4);
- CPU (h_gr[((UINT) 15)]) = opval;
- written |= (1 << 9);
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
- {
- SI opval = CPU (h_gr[((UINT) 13)]);
- SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval);
- written |= (1 << 10);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-}
-}
-if (ANDSI (FLD (f_reglist_hi_st), 8)) {
-{
- {
- SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4);
- CPU (h_gr[((UINT) 15)]) = opval;
- written |= (1 << 9);
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
- {
- SI opval = CPU (h_gr[((UINT) 12)]);
- SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval);
- written |= (1 << 10);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-}
-}
-if (ANDSI (FLD (f_reglist_hi_st), 16)) {
-{
- {
- SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4);
- CPU (h_gr[((UINT) 15)]) = opval;
- written |= (1 << 9);
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
- {
- SI opval = CPU (h_gr[((UINT) 11)]);
- SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval);
- written |= (1 << 10);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-}
-}
-if (ANDSI (FLD (f_reglist_hi_st), 32)) {
-{
- {
- SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4);
- CPU (h_gr[((UINT) 15)]) = opval;
- written |= (1 << 9);
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
- {
- SI opval = CPU (h_gr[((UINT) 10)]);
- SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval);
- written |= (1 << 10);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-}
-}
-if (ANDSI (FLD (f_reglist_hi_st), 64)) {
-{
- {
- SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4);
- CPU (h_gr[((UINT) 15)]) = opval;
- written |= (1 << 9);
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
- {
- SI opval = CPU (h_gr[((UINT) 9)]);
- SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval);
- written |= (1 << 10);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-}
-}
-if (ANDSI (FLD (f_reglist_hi_st), 128)) {
-{
- {
- SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4);
- CPU (h_gr[((UINT) 15)]) = opval;
- written |= (1 << 9);
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
- {
- SI opval = CPU (h_gr[((UINT) 8)]);
- SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval);
- written |= (1 << 10);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-}
-}
-}
-
- abuf->written = written;
- return vpc;
-#undef FLD
-}
-
-/* enter: enter $u10 */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,enter) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_enter.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- SI tmp_tmp;
- tmp_tmp = SUBSI (CPU (h_gr[((UINT) 15)]), 4);
- {
- SI opval = CPU (h_gr[((UINT) 14)]);
- SETMEMSI (current_cpu, pc, tmp_tmp, opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
- {
- SI opval = tmp_tmp;
- CPU (h_gr[((UINT) 14)]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
- {
- SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), FLD (f_u10));
- CPU (h_gr[((UINT) 15)]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-}
-
- return vpc;
-#undef FLD
-}
-
-/* leave: leave */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,leave) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_enter.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- {
- SI opval = ADDSI (CPU (h_gr[((UINT) 14)]), 4);
- CPU (h_gr[((UINT) 15)]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
- {
- SI opval = GETMEMSI (current_cpu, pc, SUBSI (CPU (h_gr[((UINT) 15)]), 4));
- CPU (h_gr[((UINT) 14)]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-}
-
- return vpc;
-#undef FLD
-}
-
-/* xchb: xchb @$Rj,$Ri */
-
-static SEM_PC
-SEM_FN_NAME (fr30bf,xchb) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- SI tmp_tmp;
- tmp_tmp = * FLD (i_Ri);
- {
- SI opval = GETMEMUQI (current_cpu, pc, * FLD (i_Rj));
- * FLD (i_Ri) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
- {
- UQI opval = tmp_tmp;
- SETMEMUQI (current_cpu, pc, * FLD (i_Rj), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-}
-
- return vpc;
-#undef FLD
-}
-
-/* Table of all semantic fns. */
-
-static const struct sem_fn_desc sem_fns[] = {
- { FR30BF_INSN_X_INVALID, SEM_FN_NAME (fr30bf,x_invalid) },
- { FR30BF_INSN_X_AFTER, SEM_FN_NAME (fr30bf,x_after) },
- { FR30BF_INSN_X_BEFORE, SEM_FN_NAME (fr30bf,x_before) },
- { FR30BF_INSN_X_CTI_CHAIN, SEM_FN_NAME (fr30bf,x_cti_chain) },
- { FR30BF_INSN_X_CHAIN, SEM_FN_NAME (fr30bf,x_chain) },
- { FR30BF_INSN_X_BEGIN, SEM_FN_NAME (fr30bf,x_begin) },
- { FR30BF_INSN_ADD, SEM_FN_NAME (fr30bf,add) },
- { FR30BF_INSN_ADDI, SEM_FN_NAME (fr30bf,addi) },
- { FR30BF_INSN_ADD2, SEM_FN_NAME (fr30bf,add2) },
- { FR30BF_INSN_ADDC, SEM_FN_NAME (fr30bf,addc) },
- { FR30BF_INSN_ADDN, SEM_FN_NAME (fr30bf,addn) },
- { FR30BF_INSN_ADDNI, SEM_FN_NAME (fr30bf,addni) },
- { FR30BF_INSN_ADDN2, SEM_FN_NAME (fr30bf,addn2) },
- { FR30BF_INSN_SUB, SEM_FN_NAME (fr30bf,sub) },
- { FR30BF_INSN_SUBC, SEM_FN_NAME (fr30bf,subc) },
- { FR30BF_INSN_SUBN, SEM_FN_NAME (fr30bf,subn) },
- { FR30BF_INSN_CMP, SEM_FN_NAME (fr30bf,cmp) },
- { FR30BF_INSN_CMPI, SEM_FN_NAME (fr30bf,cmpi) },
- { FR30BF_INSN_CMP2, SEM_FN_NAME (fr30bf,cmp2) },
- { FR30BF_INSN_AND, SEM_FN_NAME (fr30bf,and) },
- { FR30BF_INSN_OR, SEM_FN_NAME (fr30bf,or) },
- { FR30BF_INSN_EOR, SEM_FN_NAME (fr30bf,eor) },
- { FR30BF_INSN_ANDM, SEM_FN_NAME (fr30bf,andm) },
- { FR30BF_INSN_ANDH, SEM_FN_NAME (fr30bf,andh) },
- { FR30BF_INSN_ANDB, SEM_FN_NAME (fr30bf,andb) },
- { FR30BF_INSN_ORM, SEM_FN_NAME (fr30bf,orm) },
- { FR30BF_INSN_ORH, SEM_FN_NAME (fr30bf,orh) },
- { FR30BF_INSN_ORB, SEM_FN_NAME (fr30bf,orb) },
- { FR30BF_INSN_EORM, SEM_FN_NAME (fr30bf,eorm) },
- { FR30BF_INSN_EORH, SEM_FN_NAME (fr30bf,eorh) },
- { FR30BF_INSN_EORB, SEM_FN_NAME (fr30bf,eorb) },
- { FR30BF_INSN_BANDL, SEM_FN_NAME (fr30bf,bandl) },
- { FR30BF_INSN_BORL, SEM_FN_NAME (fr30bf,borl) },
- { FR30BF_INSN_BEORL, SEM_FN_NAME (fr30bf,beorl) },
- { FR30BF_INSN_BANDH, SEM_FN_NAME (fr30bf,bandh) },
- { FR30BF_INSN_BORH, SEM_FN_NAME (fr30bf,borh) },
- { FR30BF_INSN_BEORH, SEM_FN_NAME (fr30bf,beorh) },
- { FR30BF_INSN_BTSTL, SEM_FN_NAME (fr30bf,btstl) },
- { FR30BF_INSN_BTSTH, SEM_FN_NAME (fr30bf,btsth) },
- { FR30BF_INSN_MUL, SEM_FN_NAME (fr30bf,mul) },
- { FR30BF_INSN_MULU, SEM_FN_NAME (fr30bf,mulu) },
- { FR30BF_INSN_MULH, SEM_FN_NAME (fr30bf,mulh) },
- { FR30BF_INSN_MULUH, SEM_FN_NAME (fr30bf,muluh) },
- { FR30BF_INSN_DIV0S, SEM_FN_NAME (fr30bf,div0s) },
- { FR30BF_INSN_DIV0U, SEM_FN_NAME (fr30bf,div0u) },
- { FR30BF_INSN_DIV1, SEM_FN_NAME (fr30bf,div1) },
- { FR30BF_INSN_DIV2, SEM_FN_NAME (fr30bf,div2) },
- { FR30BF_INSN_DIV3, SEM_FN_NAME (fr30bf,div3) },
- { FR30BF_INSN_DIV4S, SEM_FN_NAME (fr30bf,div4s) },
- { FR30BF_INSN_LSL, SEM_FN_NAME (fr30bf,lsl) },
- { FR30BF_INSN_LSLI, SEM_FN_NAME (fr30bf,lsli) },
- { FR30BF_INSN_LSL2, SEM_FN_NAME (fr30bf,lsl2) },
- { FR30BF_INSN_LSR, SEM_FN_NAME (fr30bf,lsr) },
- { FR30BF_INSN_LSRI, SEM_FN_NAME (fr30bf,lsri) },
- { FR30BF_INSN_LSR2, SEM_FN_NAME (fr30bf,lsr2) },
- { FR30BF_INSN_ASR, SEM_FN_NAME (fr30bf,asr) },
- { FR30BF_INSN_ASRI, SEM_FN_NAME (fr30bf,asri) },
- { FR30BF_INSN_ASR2, SEM_FN_NAME (fr30bf,asr2) },
- { FR30BF_INSN_LDI8, SEM_FN_NAME (fr30bf,ldi8) },
- { FR30BF_INSN_LDI20, SEM_FN_NAME (fr30bf,ldi20) },
- { FR30BF_INSN_LDI32, SEM_FN_NAME (fr30bf,ldi32) },
- { FR30BF_INSN_LD, SEM_FN_NAME (fr30bf,ld) },
- { FR30BF_INSN_LDUH, SEM_FN_NAME (fr30bf,lduh) },
- { FR30BF_INSN_LDUB, SEM_FN_NAME (fr30bf,ldub) },
- { FR30BF_INSN_LDR13, SEM_FN_NAME (fr30bf,ldr13) },
- { FR30BF_INSN_LDR13UH, SEM_FN_NAME (fr30bf,ldr13uh) },
- { FR30BF_INSN_LDR13UB, SEM_FN_NAME (fr30bf,ldr13ub) },
- { FR30BF_INSN_LDR14, SEM_FN_NAME (fr30bf,ldr14) },
- { FR30BF_INSN_LDR14UH, SEM_FN_NAME (fr30bf,ldr14uh) },
- { FR30BF_INSN_LDR14UB, SEM_FN_NAME (fr30bf,ldr14ub) },
- { FR30BF_INSN_LDR15, SEM_FN_NAME (fr30bf,ldr15) },
- { FR30BF_INSN_LDR15GR, SEM_FN_NAME (fr30bf,ldr15gr) },
- { FR30BF_INSN_LDR15DR, SEM_FN_NAME (fr30bf,ldr15dr) },
- { FR30BF_INSN_LDR15PS, SEM_FN_NAME (fr30bf,ldr15ps) },
- { FR30BF_INSN_ST, SEM_FN_NAME (fr30bf,st) },
- { FR30BF_INSN_STH, SEM_FN_NAME (fr30bf,sth) },
- { FR30BF_INSN_STB, SEM_FN_NAME (fr30bf,stb) },
- { FR30BF_INSN_STR13, SEM_FN_NAME (fr30bf,str13) },
- { FR30BF_INSN_STR13H, SEM_FN_NAME (fr30bf,str13h) },
- { FR30BF_INSN_STR13B, SEM_FN_NAME (fr30bf,str13b) },
- { FR30BF_INSN_STR14, SEM_FN_NAME (fr30bf,str14) },
- { FR30BF_INSN_STR14H, SEM_FN_NAME (fr30bf,str14h) },
- { FR30BF_INSN_STR14B, SEM_FN_NAME (fr30bf,str14b) },
- { FR30BF_INSN_STR15, SEM_FN_NAME (fr30bf,str15) },
- { FR30BF_INSN_STR15GR, SEM_FN_NAME (fr30bf,str15gr) },
- { FR30BF_INSN_STR15DR, SEM_FN_NAME (fr30bf,str15dr) },
- { FR30BF_INSN_STR15PS, SEM_FN_NAME (fr30bf,str15ps) },
- { FR30BF_INSN_MOV, SEM_FN_NAME (fr30bf,mov) },
- { FR30BF_INSN_MOVDR, SEM_FN_NAME (fr30bf,movdr) },
- { FR30BF_INSN_MOVPS, SEM_FN_NAME (fr30bf,movps) },
- { FR30BF_INSN_MOV2DR, SEM_FN_NAME (fr30bf,mov2dr) },
- { FR30BF_INSN_MOV2PS, SEM_FN_NAME (fr30bf,mov2ps) },
- { FR30BF_INSN_JMP, SEM_FN_NAME (fr30bf,jmp) },
- { FR30BF_INSN_JMPD, SEM_FN_NAME (fr30bf,jmpd) },
- { FR30BF_INSN_CALLR, SEM_FN_NAME (fr30bf,callr) },
- { FR30BF_INSN_CALLRD, SEM_FN_NAME (fr30bf,callrd) },
- { FR30BF_INSN_CALL, SEM_FN_NAME (fr30bf,call) },
- { FR30BF_INSN_CALLD, SEM_FN_NAME (fr30bf,calld) },
- { FR30BF_INSN_RET, SEM_FN_NAME (fr30bf,ret) },
- { FR30BF_INSN_RET_D, SEM_FN_NAME (fr30bf,ret_d) },
- { FR30BF_INSN_INT, SEM_FN_NAME (fr30bf,int) },
- { FR30BF_INSN_INTE, SEM_FN_NAME (fr30bf,inte) },
- { FR30BF_INSN_RETI, SEM_FN_NAME (fr30bf,reti) },
- { FR30BF_INSN_BRAD, SEM_FN_NAME (fr30bf,brad) },
- { FR30BF_INSN_BRA, SEM_FN_NAME (fr30bf,bra) },
- { FR30BF_INSN_BNOD, SEM_FN_NAME (fr30bf,bnod) },
- { FR30BF_INSN_BNO, SEM_FN_NAME (fr30bf,bno) },
- { FR30BF_INSN_BEQD, SEM_FN_NAME (fr30bf,beqd) },
- { FR30BF_INSN_BEQ, SEM_FN_NAME (fr30bf,beq) },
- { FR30BF_INSN_BNED, SEM_FN_NAME (fr30bf,bned) },
- { FR30BF_INSN_BNE, SEM_FN_NAME (fr30bf,bne) },
- { FR30BF_INSN_BCD, SEM_FN_NAME (fr30bf,bcd) },
- { FR30BF_INSN_BC, SEM_FN_NAME (fr30bf,bc) },
- { FR30BF_INSN_BNCD, SEM_FN_NAME (fr30bf,bncd) },
- { FR30BF_INSN_BNC, SEM_FN_NAME (fr30bf,bnc) },
- { FR30BF_INSN_BND, SEM_FN_NAME (fr30bf,bnd) },
- { FR30BF_INSN_BN, SEM_FN_NAME (fr30bf,bn) },
- { FR30BF_INSN_BPD, SEM_FN_NAME (fr30bf,bpd) },
- { FR30BF_INSN_BP, SEM_FN_NAME (fr30bf,bp) },
- { FR30BF_INSN_BVD, SEM_FN_NAME (fr30bf,bvd) },
- { FR30BF_INSN_BV, SEM_FN_NAME (fr30bf,bv) },
- { FR30BF_INSN_BNVD, SEM_FN_NAME (fr30bf,bnvd) },
- { FR30BF_INSN_BNV, SEM_FN_NAME (fr30bf,bnv) },
- { FR30BF_INSN_BLTD, SEM_FN_NAME (fr30bf,bltd) },
- { FR30BF_INSN_BLT, SEM_FN_NAME (fr30bf,blt) },
- { FR30BF_INSN_BGED, SEM_FN_NAME (fr30bf,bged) },
- { FR30BF_INSN_BGE, SEM_FN_NAME (fr30bf,bge) },
- { FR30BF_INSN_BLED, SEM_FN_NAME (fr30bf,bled) },
- { FR30BF_INSN_BLE, SEM_FN_NAME (fr30bf,ble) },
- { FR30BF_INSN_BGTD, SEM_FN_NAME (fr30bf,bgtd) },
- { FR30BF_INSN_BGT, SEM_FN_NAME (fr30bf,bgt) },
- { FR30BF_INSN_BLSD, SEM_FN_NAME (fr30bf,blsd) },
- { FR30BF_INSN_BLS, SEM_FN_NAME (fr30bf,bls) },
- { FR30BF_INSN_BHID, SEM_FN_NAME (fr30bf,bhid) },
- { FR30BF_INSN_BHI, SEM_FN_NAME (fr30bf,bhi) },
- { FR30BF_INSN_DMOVR13, SEM_FN_NAME (fr30bf,dmovr13) },
- { FR30BF_INSN_DMOVR13H, SEM_FN_NAME (fr30bf,dmovr13h) },
- { FR30BF_INSN_DMOVR13B, SEM_FN_NAME (fr30bf,dmovr13b) },
- { FR30BF_INSN_DMOVR13PI, SEM_FN_NAME (fr30bf,dmovr13pi) },
- { FR30BF_INSN_DMOVR13PIH, SEM_FN_NAME (fr30bf,dmovr13pih) },
- { FR30BF_INSN_DMOVR13PIB, SEM_FN_NAME (fr30bf,dmovr13pib) },
- { FR30BF_INSN_DMOVR15PI, SEM_FN_NAME (fr30bf,dmovr15pi) },
- { FR30BF_INSN_DMOV2R13, SEM_FN_NAME (fr30bf,dmov2r13) },
- { FR30BF_INSN_DMOV2R13H, SEM_FN_NAME (fr30bf,dmov2r13h) },
- { FR30BF_INSN_DMOV2R13B, SEM_FN_NAME (fr30bf,dmov2r13b) },
- { FR30BF_INSN_DMOV2R13PI, SEM_FN_NAME (fr30bf,dmov2r13pi) },
- { FR30BF_INSN_DMOV2R13PIH, SEM_FN_NAME (fr30bf,dmov2r13pih) },
- { FR30BF_INSN_DMOV2R13PIB, SEM_FN_NAME (fr30bf,dmov2r13pib) },
- { FR30BF_INSN_DMOV2R15PD, SEM_FN_NAME (fr30bf,dmov2r15pd) },
- { FR30BF_INSN_LDRES, SEM_FN_NAME (fr30bf,ldres) },
- { FR30BF_INSN_STRES, SEM_FN_NAME (fr30bf,stres) },
- { FR30BF_INSN_COPOP, SEM_FN_NAME (fr30bf,copop) },
- { FR30BF_INSN_COPLD, SEM_FN_NAME (fr30bf,copld) },
- { FR30BF_INSN_COPST, SEM_FN_NAME (fr30bf,copst) },
- { FR30BF_INSN_COPSV, SEM_FN_NAME (fr30bf,copsv) },
- { FR30BF_INSN_NOP, SEM_FN_NAME (fr30bf,nop) },
- { FR30BF_INSN_ANDCCR, SEM_FN_NAME (fr30bf,andccr) },
- { FR30BF_INSN_ORCCR, SEM_FN_NAME (fr30bf,orccr) },
- { FR30BF_INSN_STILM, SEM_FN_NAME (fr30bf,stilm) },
- { FR30BF_INSN_ADDSP, SEM_FN_NAME (fr30bf,addsp) },
- { FR30BF_INSN_EXTSB, SEM_FN_NAME (fr30bf,extsb) },
- { FR30BF_INSN_EXTUB, SEM_FN_NAME (fr30bf,extub) },
- { FR30BF_INSN_EXTSH, SEM_FN_NAME (fr30bf,extsh) },
- { FR30BF_INSN_EXTUH, SEM_FN_NAME (fr30bf,extuh) },
- { FR30BF_INSN_LDM0, SEM_FN_NAME (fr30bf,ldm0) },
- { FR30BF_INSN_LDM1, SEM_FN_NAME (fr30bf,ldm1) },
- { FR30BF_INSN_STM0, SEM_FN_NAME (fr30bf,stm0) },
- { FR30BF_INSN_STM1, SEM_FN_NAME (fr30bf,stm1) },
- { FR30BF_INSN_ENTER, SEM_FN_NAME (fr30bf,enter) },
- { FR30BF_INSN_LEAVE, SEM_FN_NAME (fr30bf,leave) },
- { FR30BF_INSN_XCHB, SEM_FN_NAME (fr30bf,xchb) },
- { 0, 0 }
-};
-
-/* Add the semantic fns to IDESC_TABLE. */
-
-void
-SEM_FN_NAME (fr30bf,init_idesc_table) (SIM_CPU *current_cpu)
-{
- IDESC *idesc_table = CPU_IDESC (current_cpu);
- const struct sem_fn_desc *sf;
- int mach_num = MACH_NUM (CPU_MACH (current_cpu));
-
- for (sf = &sem_fns[0]; sf->fn != 0; ++sf)
- {
- const CGEN_INSN *insn = idesc_table[sf->index].idata;
- int valid_p = (CGEN_INSN_VIRTUAL_P (insn)
- || CGEN_INSN_MACH_HAS_P (insn, mach_num));
-#if FAST_P
- if (valid_p)
- idesc_table[sf->index].sem_fast = sf->fn;
- else
- idesc_table[sf->index].sem_fast = SEM_FN_NAME (fr30bf,x_invalid);
-#else
- if (valid_p)
- idesc_table[sf->index].sem_full = sf->fn;
- else
- idesc_table[sf->index].sem_full = SEM_FN_NAME (fr30bf,x_invalid);
-#endif
- }
-}
-
diff --git a/sim/fr30/sim-if.c b/sim/fr30/sim-if.c
deleted file mode 100644
index 28b344d9c5e..00000000000
--- a/sim/fr30/sim-if.c
+++ /dev/null
@@ -1,208 +0,0 @@
-/* Main simulator entry points specific to the FR30.
- Copyright (C) 1998, 1999 Free Software Foundation, Inc.
- Contributed by Cygnus Solutions.
-
-This file is part of the GNU simulators.
-
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License along
-with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
-
-#include "sim-main.h"
-#ifdef HAVE_STDLIB_H
-#include <stdlib.h>
-#endif
-#include "sim-options.h"
-#include "libiberty.h"
-#include "bfd.h"
-
-static void free_state (SIM_DESC);
-static void print_fr30_misc_cpu (SIM_CPU *cpu, int verbose);
-
-/* Records simulator descriptor so utilities like fr30_dump_regs can be
- called from gdb. */
-SIM_DESC current_state;
-
-/* Cover function of sim_state_free to free the cpu buffers as well. */
-
-static void
-free_state (SIM_DESC sd)
-{
- if (STATE_MODULES (sd) != NULL)
- sim_module_uninstall (sd);
- sim_cpu_free_all (sd);
- sim_state_free (sd);
-}
-
-/* Create an instance of the simulator. */
-
-SIM_DESC
-sim_open (kind, callback, abfd, argv)
- SIM_OPEN_KIND kind;
- host_callback *callback;
- struct _bfd *abfd;
- char **argv;
-{
- char c;
- int i;
- SIM_DESC sd = sim_state_alloc (kind, callback);
-
- /* The cpu data is kept in a separately allocated chunk of memory. */
- if (sim_cpu_alloc_all (sd, 1, cgen_cpu_max_extra_bytes ()) != SIM_RC_OK)
- {
- free_state (sd);
- return 0;
- }
-
-#if 0 /* FIXME: pc is in mach-specific struct */
- /* FIXME: watchpoints code shouldn't need this */
- {
- SIM_CPU *current_cpu = STATE_CPU (sd, 0);
- STATE_WATCHPOINTS (sd)->pc = &(PC);
- STATE_WATCHPOINTS (sd)->sizeof_pc = sizeof (PC);
- }
-#endif
-
- if (sim_pre_argv_init (sd, argv[0]) != SIM_RC_OK)
- {
- free_state (sd);
- return 0;
- }
-
-#if 0 /* FIXME: 'twould be nice if we could do this */
- /* These options override any module options.
- Obviously ambiguity should be avoided, however the caller may wish to
- augment the meaning of an option. */
- if (extra_options != NULL)
- sim_add_option_table (sd, extra_options);
-#endif
-
- /* getopt will print the error message so we just have to exit if this fails.
- FIXME: Hmmm... in the case of gdb we need getopt to call
- print_filtered. */
- if (sim_parse_args (sd, argv) != SIM_RC_OK)
- {
- free_state (sd);
- return 0;
- }
-
-#if 0
- /* Allocate a handler for the control registers and other devices
- if no memory for that range has been allocated by the user.
- All are allocated in one chunk to keep things from being
- unnecessarily complicated. */
- if (sim_core_read_buffer (sd, NULL, read_map, &c, FR30_DEVICE_ADDR, 1) == 0)
- sim_core_attach (sd, NULL,
- 0 /*level*/,
- access_read_write,
- 0 /*space ???*/,
- FR30_DEVICE_ADDR, FR30_DEVICE_LEN /*nr_bytes*/,
- 0 /*modulo*/,
- &fr30_devices,
- NULL /*buffer*/);
-#endif
-
- /* Allocate core managed memory if none specified by user.
- Use address 4 here in case the user wanted address 0 unmapped. */
- if (sim_core_read_buffer (sd, NULL, read_map, &c, 4, 1) == 0)
- sim_do_commandf (sd, "memory region 0,0x%lx", FR30_DEFAULT_MEM_SIZE);
-
- /* check for/establish the reference program image */
- if (sim_analyze_program (sd,
- (STATE_PROG_ARGV (sd) != NULL
- ? *STATE_PROG_ARGV (sd)
- : NULL),
- abfd) != SIM_RC_OK)
- {
- free_state (sd);
- return 0;
- }
-
- /* Establish any remaining configuration options. */
- if (sim_config (sd) != SIM_RC_OK)
- {
- free_state (sd);
- return 0;
- }
-
- if (sim_post_argv_init (sd) != SIM_RC_OK)
- {
- free_state (sd);
- return 0;
- }
-
- /* Open a copy of the cpu descriptor table. */
- {
- CGEN_CPU_DESC cd = fr30_cgen_cpu_open_1 (STATE_ARCHITECTURE (sd)->printable_name,
- CGEN_ENDIAN_BIG);
- for (i = 0; i < MAX_NR_PROCESSORS; ++i)
- {
- SIM_CPU *cpu = STATE_CPU (sd, i);
- CPU_CPU_DESC (cpu) = cd;
- CPU_DISASSEMBLER (cpu) = sim_cgen_disassemble_insn;
- }
- fr30_cgen_init_dis (cd);
- }
-
- /* Initialize various cgen things not done by common framework.
- Must be done after fr30_cgen_cpu_open. */
- cgen_init (sd);
-
- /* Store in a global so things like sparc32_dump_regs can be invoked
- from the gdb command line. */
- current_state = sd;
-
- return sd;
-}
-
-void
-sim_close (sd, quitting)
- SIM_DESC sd;
- int quitting;
-{
- fr30_cgen_cpu_close (CPU_CPU_DESC (STATE_CPU (sd, 0)));
- sim_module_uninstall (sd);
-}
-
-SIM_RC
-sim_create_inferior (sd, abfd, argv, envp)
- SIM_DESC sd;
- struct _bfd *abfd;
- char **argv;
- char **envp;
-{
- SIM_CPU *current_cpu = STATE_CPU (sd, 0);
- SIM_ADDR addr;
-
- if (abfd != NULL)
- addr = bfd_get_start_address (abfd);
- else
- addr = 0;
- sim_pc_set (current_cpu, addr);
-
-#if 0
- STATE_ARGV (sd) = sim_copy_argv (argv);
- STATE_ENVP (sd) = sim_copy_argv (envp);
-#endif
-
- return SIM_RC_OK;
-}
-
-void
-sim_do_command (sd, cmd)
- SIM_DESC sd;
- char *cmd;
-{
- if (sim_args_command (sd, cmd) != SIM_RC_OK)
- sim_io_eprintf (sd, "Unknown command `%s'\n", cmd);
-}
diff --git a/sim/fr30/sim-main.h b/sim/fr30/sim-main.h
deleted file mode 100644
index 8cbf085a697..00000000000
--- a/sim/fr30/sim-main.h
+++ /dev/null
@@ -1,70 +0,0 @@
-/* Main header for the fr30. */
-
-#define USING_SIM_BASE_H /* FIXME: quick hack */
-
-struct _sim_cpu; /* FIXME: should be in sim-basics.h */
-typedef struct _sim_cpu SIM_CPU;
-
-/* sim-basics.h includes config.h but cgen-types.h must be included before
- sim-basics.h and cgen-types.h needs config.h. */
-#include "config.h"
-
-#include "symcat.h"
-#include "sim-basics.h"
-#include "cgen-types.h"
-#include "fr30-desc.h"
-#include "fr30-opc.h"
-#include "arch.h"
-
-/* These must be defined before sim-base.h. */
-typedef USI sim_cia;
-
-#define CIA_GET(cpu) CPU_PC_GET (cpu)
-#define CIA_SET(cpu,val) CPU_PC_SET ((cpu), (val))
-
-#include "sim-base.h"
-#include "cgen-sim.h"
-#include "fr30-sim.h"
-
-/* The _sim_cpu struct. */
-
-struct _sim_cpu {
- /* sim/common cpu base. */
- sim_cpu_base base;
-
- /* Static parts of cgen. */
- CGEN_CPU cgen_cpu;
-
- /* CPU specific parts go here.
- Note that in files that don't need to access these pieces WANT_CPU_FOO
- won't be defined and thus these parts won't appear. This is ok in the
- sense that things work. It is a source of bugs though.
- One has to of course be careful to not take the size of this
- struct and no structure members accessed in non-cpu specific files can
- go after here. Oh for a better language. */
-#if defined (WANT_CPU_FR30BF)
- FR30BF_CPU_DATA cpu_data;
-#endif
-};
-
-/* The sim_state struct. */
-
-struct sim_state {
- sim_cpu *cpu;
-#define STATE_CPU(sd, n) (/*&*/ (sd)->cpu)
-
- CGEN_STATE cgen_state;
-
- sim_state_base base;
-};
-
-/* Misc. */
-
-/* Catch address exceptions. */
-extern SIM_CORE_SIGNAL_FN fr30_core_signal;
-#define SIM_CORE_SIGNAL(SD,CPU,CIA,MAP,NR_BYTES,ADDR,TRANSFER,ERROR) \
-fr30_core_signal ((SD), (CPU), (CIA), (MAP), (NR_BYTES), (ADDR), \
- (TRANSFER), (ERROR))
-
-/* Default memory size. */
-#define FR30_DEFAULT_MEM_SIZE 0x800000 /* 8M */
diff --git a/sim/fr30/tconfig.in b/sim/fr30/tconfig.in
deleted file mode 100644
index a67e2275de6..00000000000
--- a/sim/fr30/tconfig.in
+++ /dev/null
@@ -1,42 +0,0 @@
-/* FR30 target configuration file. -*- C -*- */
-
-/* Define this if the simulator can vary the size of memory.
- See the xxx simulator for an example.
- This enables the `-m size' option.
- The memory size is stored in STATE_MEM_SIZE. */
-/* Not used for FR30 since we use the memory module. TODO -- check this */
-/* #define SIM_HAVE_MEM_SIZE */
-
-/* See sim-hload.c. We properly handle LMA. -- TODO: check this */
-#define SIM_HANDLES_LMA 1
-
-/* For MSPR support. FIXME: revisit. */
-#define WITH_DEVICES 1
-
-/* FIXME: Revisit. */
-#ifdef HAVE_DV_SOCKSER
-MODULE_INSTALL_FN dv_sockser_install;
-#define MODULE_LIST dv_sockser_install,
-#endif
-
-#if 0
-/* Enable watchpoints. */
-#define WITH_WATCHPOINTS 1
-#endif
-
-/* ??? Temporary hack until model support unified. */
-#define SIM_HAVE_MODEL
-
-/* Define this to enable the intrinsic breakpoint mechanism. */
-/* FIXME: may be able to remove SIM_HAVE_BREAKPOINTS since it essentially
- duplicates ifdef SIM_BREAKPOINT (right?) */
-#if 0
-#define SIM_HAVE_BREAKPOINTS
-#define SIM_BREAKPOINT { 0x10, 0xf1 }
-#define SIM_BREAKPOINT_SIZE 2
-#endif
-
-/* This is a global setting. Different cpu families can't mix-n-match -scache
- and -pbb. However some cpu families may use -simple while others use
- one of -scache/-pbb. ???? */
-#define WITH_SCACHE_PBB 1
diff --git a/sim/fr30/traps.c b/sim/fr30/traps.c
deleted file mode 100644
index 25cd7b99459..00000000000
--- a/sim/fr30/traps.c
+++ /dev/null
@@ -1,218 +0,0 @@
-/* fr30 exception, interrupt, and trap (EIT) support
- Copyright (C) 1998, 1999 Free Software Foundation, Inc.
- Contributed by Cygnus Solutions.
-
-This file is part of the GNU simulators.
-
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License along
-with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
-
-#include "sim-main.h"
-#include "targ-vals.h"
-#include "cgen-engine.h"
-
-/* The semantic code invokes this for invalid (unrecognized) instructions. */
-
-SEM_PC
-sim_engine_invalid_insn (SIM_CPU *current_cpu, IADDR cia, SEM_PC vpc)
-{
- SIM_DESC sd = CPU_STATE (current_cpu);
-
-#if 0
- if (STATE_ENVIRONMENT (sd) == OPERATING_ENVIRONMENT)
- {
- h_bsm_set (current_cpu, h_sm_get (current_cpu));
- h_bie_set (current_cpu, h_ie_get (current_cpu));
- h_bcond_set (current_cpu, h_cond_get (current_cpu));
- /* sm not changed */
- h_ie_set (current_cpu, 0);
- h_cond_set (current_cpu, 0);
-
- h_bpc_set (current_cpu, cia);
-
- sim_engine_restart (CPU_STATE (current_cpu), current_cpu, NULL,
- EIT_RSVD_INSN_ADDR);
- }
- else
-#endif
- sim_engine_halt (sd, current_cpu, NULL, cia, sim_stopped, SIM_SIGILL);
- return vpc;
-}
-
-/* Process an address exception. */
-
-void
-fr30_core_signal (SIM_DESC sd, SIM_CPU *current_cpu, sim_cia cia,
- unsigned int map, int nr_bytes, address_word addr,
- transfer_type transfer, sim_core_signals sig)
-{
-#if 0
- if (STATE_ENVIRONMENT (sd) == OPERATING_ENVIRONMENT)
- {
- h_bsm_set (current_cpu, h_sm_get (current_cpu));
- h_bie_set (current_cpu, h_ie_get (current_cpu));
- h_bcond_set (current_cpu, h_cond_get (current_cpu));
- /* sm not changed */
- h_ie_set (current_cpu, 0);
- h_cond_set (current_cpu, 0);
-
- h_bpc_set (current_cpu, cia);
-
- sim_engine_restart (CPU_STATE (current_cpu), current_cpu, NULL,
- EIT_ADDR_EXCP_ADDR);
- }
- else
-#endif
- sim_core_signal (sd, current_cpu, cia, map, nr_bytes, addr,
- transfer, sig);
-}
-
-/* Read/write functions for system call interface. */
-
-static int
-syscall_read_mem (host_callback *cb, struct cb_syscall *sc,
- unsigned long taddr, char *buf, int bytes)
-{
- SIM_DESC sd = (SIM_DESC) sc->p1;
- SIM_CPU *cpu = (SIM_CPU *) sc->p2;
-
- return sim_core_read_buffer (sd, cpu, read_map, buf, taddr, bytes);
-}
-
-static int
-syscall_write_mem (host_callback *cb, struct cb_syscall *sc,
- unsigned long taddr, const char *buf, int bytes)
-{
- SIM_DESC sd = (SIM_DESC) sc->p1;
- SIM_CPU *cpu = (SIM_CPU *) sc->p2;
-
- return sim_core_write_buffer (sd, cpu, write_map, buf, taddr, bytes);
-}
-
-/* Subroutine of fr30_int to save the PS and PC and setup for INT and INTE. */
-
-static void
-setup_int (SIM_CPU *current_cpu, PCADDR pc)
-{
- USI ssp = fr30bf_h_dr_get (current_cpu, H_DR_SSP);
- USI ps = fr30bf_h_ps_get (current_cpu);
-
- ssp -= 4;
- SETMEMSI (current_cpu, pc, ssp, ps);
- ssp -= 4;
- SETMEMSI (current_cpu, pc, ssp, pc + 2);
- fr30bf_h_dr_set (current_cpu, H_DR_SSP, ssp);
- fr30bf_h_sbit_set (current_cpu, 0);
-}
-
-/* Trap support.
- The result is the pc address to continue at.
- Preprocessing like saving the various registers has already been done. */
-
-USI
-fr30_int (SIM_CPU *current_cpu, PCADDR pc, int num)
-{
- SIM_DESC sd = CPU_STATE (current_cpu);
- host_callback *cb = STATE_CALLBACK (sd);
-
-#ifdef SIM_HAVE_BREAKPOINTS
- /* Check for breakpoints "owned" by the simulator first, regardless
- of --environment. */
- if (num == TRAP_BREAKPOINT)
- {
- /* First try sim-break.c. If it's a breakpoint the simulator "owns"
- it doesn't return. Otherwise it returns and let's us try. */
- sim_handle_breakpoint (sd, current_cpu, pc);
- /* Fall through. */
- }
-#endif
-
- if (STATE_ENVIRONMENT (sd) == OPERATING_ENVIRONMENT)
- {
- /* The new pc is the trap vector entry.
- We assume there's a branch there to some handler. */
- USI new_pc;
- setup_int (current_cpu, pc);
- fr30bf_h_ibit_set (current_cpu, 0);
- new_pc = GETMEMSI (current_cpu, pc,
- fr30bf_h_dr_get (current_cpu, H_DR_TBR)
- + 1024 - ((num + 1) * 4));
- return new_pc;
- }
-
- switch (num)
- {
- case TRAP_SYSCALL :
- {
- /* TODO: find out what the ABI for this is */
- CB_SYSCALL s;
-
- CB_SYSCALL_INIT (&s);
- s.func = fr30bf_h_gr_get (current_cpu, 0);
- s.arg1 = fr30bf_h_gr_get (current_cpu, 4);
- s.arg2 = fr30bf_h_gr_get (current_cpu, 5);
- s.arg3 = fr30bf_h_gr_get (current_cpu, 6);
-
- if (s.func == TARGET_SYS_exit)
- {
- sim_engine_halt (sd, current_cpu, NULL, pc, sim_exited, s.arg1);
- }
-
- s.p1 = (PTR) sd;
- s.p2 = (PTR) current_cpu;
- s.read_mem = syscall_read_mem;
- s.write_mem = syscall_write_mem;
- cb_syscall (cb, &s);
- fr30bf_h_gr_set (current_cpu, 2, s.errcode); /* TODO: check this one */
- fr30bf_h_gr_set (current_cpu, 4, s.result);
- fr30bf_h_gr_set (current_cpu, 1, s.result2); /* TODO: check this one */
- break;
- }
-
- case TRAP_BREAKPOINT:
- sim_engine_halt (sd, current_cpu, NULL, pc,
- sim_stopped, SIM_SIGTRAP);
- break;
-
- default :
- {
- USI new_pc;
- setup_int (current_cpu, pc);
- fr30bf_h_ibit_set (current_cpu, 0);
- new_pc = GETMEMSI (current_cpu, pc,
- fr30bf_h_dr_get (current_cpu, H_DR_TBR)
- + 1024 - ((num + 1) * 4));
- return new_pc;
- }
- }
-
- /* Fake an "reti" insn.
- Since we didn't push anything to stack, all we need to do is
- update pc. */
- return pc + 2;
-}
-
-USI
-fr30_inte (SIM_CPU *current_cpu, PCADDR pc, int num)
-{
- /* The new pc is the trap #9 vector entry.
- We assume there's a branch there to some handler. */
- USI new_pc;
- setup_int (current_cpu, pc);
- fr30bf_h_ilm_set (current_cpu, 4);
- new_pc = GETMEMSI (current_cpu, pc,
- fr30bf_h_dr_get (current_cpu, H_DR_TBR)
- + 1024 - ((9 + 1) * 4));
- return new_pc;
-}
diff --git a/sim/h8300/ChangeLog b/sim/h8300/ChangeLog
deleted file mode 100644
index 0eb353c0fe7..00000000000
--- a/sim/h8300/ChangeLog
+++ /dev/null
@@ -1,632 +0,0 @@
-2000-08-10 Kazu Hirata <kazu@hxi.com>
-
- * compile.c (decode): Clean up the code.
-
-2000-06-15 Kazu Hirata <kazu@hxi.com>
-
- * compile.c (decode): Distinguish inc/dec.[wl] and adds/subs
- correctly.
-
-2000-06-20 Frank Ch. Eigler <fche@redhat.com>
-
- * compile.c: Don't include "wait.h".
- (sim_resume): Use local SIM_WIFEXITED and SIM_WIFSIGNALED macros
- instead of WIF* from host.
-
-2000-06-13 Frank Ch. Eigler <fche@redhat.com>
-
- * compile.c, writecode.c: Correct typo.
-
-2000-06-13 Kazu Hirata <kazu@hxi.com>
-
- * compile.c: Fix formatting.
-
-Tue May 23 21:39:23 2000 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Thu Sep 2 18:15:53 1999 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-1999-05-08 Felix Lee <flee@cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-1999-04-02 Keith Seitz <keiths@cygnus.com>
-
- * compile.c (POLL_QUIT_INTERVAL): Define. Used to tweak the
- frequency at which the poll_quit callback is used.
- (sim_resume): Use POLL_QUIT_INTERVAL instead of hard-coded value.
-
-Tue Apr 28 18:33:31 1998 Geoffrey Noer <noer@cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Sun Apr 26 15:31:55 1998 Tom Tromey <tromey@creche>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
- * config.in: Ditto.
-
-Sun Apr 26 15:20:14 1998 Tom Tromey <tromey@cygnus.com>
-
- * acconfig.h: New file.
- * configure.in: Reverted change of Apr 24; use sinclude again.
-
-Fri Apr 24 14:16:40 1998 Tom Tromey <tromey@creche>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
- * config.in: Ditto.
-
-Fri Apr 24 11:19:46 1998 Tom Tromey <tromey@cygnus.com>
-
- * configure.in: Don't call sinclude.
-
-Sat Apr 4 20:36:25 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Fri Mar 27 16:15:52 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Wed Mar 25 12:35:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Wed Mar 18 12:38:12 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Tue Feb 17 12:42:18 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * compile.c (sim_store_register, sim_fetch_register): Pass in
- length parameter. Return -1.
-
-Sun Feb 1 16:47:51 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Sat Jan 31 18:15:41 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Mon Jan 19 22:26:29 1998 Doug Evans <devans@seba>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Mon Dec 15 23:17:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
- * config.in: Ditto.
-
-Thu Dec 4 09:21:05 1997 Doug Evans <devans@canuck.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Tue Nov 11 16:52:07 1997 Angela Marie Thomas (angela@cygnus.com)
-
- * compile.c: #include stdio.h for definition of NULL on
- some platforms.
-
-Wed Oct 22 14:43:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * compile.c (sim_load): Pass lma_p and sim_write args to
- sim_load_file.
-
-Fri Oct 3 09:28:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Wed Sep 24 17:38:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Tue Sep 23 11:04:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Mon Sep 22 11:46:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Fri Sep 19 17:45:25 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Wed Sep 17 12:00:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * Makefile.in (compile.o): Depend on config.h in local directory.
-
-Mon Sep 15 17:36:15 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Tue Sep 9 22:17:26 1997 Felix Lee <flee@cygnus.com>
-
- * inst.h (sim_state): rename to h8300_sim_state, to avoid conflict
- with sim/common.
- * configure.in: check for sys/param.h
- * compile.c: #ifdef HAVE_SYS_PARAM_H.
- #define SIGTRAP for wingdb.
- (sim_resume): poll keyboard at least once per call.
- (sim_resume): use host_callback instead of printf for syscall
- output.
-
-Thu Sep 4 17:21:23 1997 Doug Evans <dje@seba>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Wed Aug 27 18:13:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
- * config.in: Ditto.
-
-Tue Aug 26 10:38:43 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * compile.c (sim_kill): Delete.
- (sim_create_inferior): Add ABFD argument.
- (sim_load): Move setting of PC from here.
- (sim_create_inferior): To here.
- (sim_open, sim_load, set_h8300h): Add fixme explaining why much of
- the sim_load code should be moved to sim_open.
-
-Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
- * config.in: Ditto.
-
-Mon Aug 25 15:47:41 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * compile.c (sim_open): Add ABFD argument.
-
-Tue May 20 10:16:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * compile.c (sim_open): Add callback argument.
- (sim_set_callbacks): Delete SIM_DESC argument.
-
-Wed Apr 30 10:22:29 1997 Doug Evans <dje@canuck.cygnus.com>
-
- * compile.c (sim_load): Call bfd_get_mach instead of examining
- bfd fields directly.
- * tconfig.in (SIM_PRE_LOAD): Delete, no longer used.
-
-Thu Apr 24 00:39:51 1997 Doug Evans <dje@canuck.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Fri Apr 18 14:30:09 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * compile.c (sim_resume): Use poll_quit callback.
- (sim_stop): New function.
-
-Thu Apr 17 03:06:39 1997 Doug Evans <dje@canuck.cygnus.com>
-
- * Makefile.in (SIM_OBJS): Add sim-load.o.
- * compile.c (sim_kind, myname): New static locals.
- (sim_open): Set sim_kind, myname.
- (sim_load): Return SIM_RC. New arg abfd. Update test for h8300h.
- Call sim_load_file to load file into simulator. Set start address
- from bfd.
- (sim_create_inferior): Return SIM_RC. Delete arg start_address.
-
-Mon Apr 7 15:45:02 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
- * config.in: Ditto.
-
-Wed Apr 2 15:06:28 1997 Doug Evans <dje@canuck.cygnus.com>
-
- * compile.c (sim_open): New arg `kind'.
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Wed Apr 2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Wed Mar 19 01:14:00 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Mon Mar 17 15:10:07 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
-
- * configure: Re-generate.
-
-Fri Mar 14 10:34:11 1997 Michael Meissner <meissner@cygnus.com>
-
- * configure: Regenerate to track ../common/aclocal.m4 changes.
-
-Thu Mar 13 12:48:05 1997 Doug Evans <dje@canuck.cygnus.com>
-
- * compile.c (sim_open): New SIM_DESC result. Argument is now in
- argv form.
- (other sim_*): New SIM_DESC argument.
-
-Tue Feb 4 13:36:29 1997 Doug Evans <dje@canuck.cygnus.com>
-
- * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
- COMMON_{PRE,POST}_CONFIG_FRAG instead.
- * configure.in: sinclude ../common/aclocal.m4.
- * configure: Regenerated.
-
-Thu Jan 23 11:46:23 1997 Stu Grossman (grossman@critters.cygnus.com)
-
- * configure configure.in Makefile.in: Update to new configure
- scheme which is more compatible with WinGDB builds.
- * configure.in: Improve comment on how to run autoconf.
- * configure: Re-run autoconf to get new ../common/aclocal.m4.
- * Makefile.in: Use autoconf substitution to install common
- makefile fragment.
-
-Wed Nov 20 01:39:12 1996 Doug Evans <dje@canuck.cygnus.com>
-
- * Makefile.in: Delete stuff moved to ../common/Make-common.in.
- (SIM_OBJS): Define.
- * configure.in: Simplify using macros in ../common/aclocal.m4.
- * configure: Regenerated.
- * inst.h (enum sim_state): Define.
- (cpu_state_type): New member `state'. Set it whenever `exception'
- is set.
- * compile.c (sim_callback): New global.
- (sim_set_simcache_size): Renamed from sim_csize.
- (sim_resume, case O_SLEEP): Add right way to decode r0 but #if 0 out
- 'cus it can't work. Change main loop exit test to use cpu.state.
- (sim_trace): New function.
- (sim_stop_reason): Add right way to set results, but #if 0 out.
- (sim_size): New function.
- (sim_info): Redirect calls to printf_filtered through callback.
- (sim_set_callbacks): Record callback.
- * run.c: Deleted, using one in ../common now.
- * tconfig.in: New file.
-
-Thu Oct 3 16:13:18 1996 Jason Molenda (crash@godzilla.cygnus.co.jp)
-
- * Makefile.in (mostlyclean): Don't remove config.log here.
-
-Fri Aug 9 22:59:11 1996 Jeffrey A Law (law@cygnus.com)
-
- * compile.c (sim_resume): rts, sleep, bpt and nop have
- no associated "size".
-
-Tue Jul 9 22:15:39 1996 Jeffrey A Law (law@cygnus.com)
-
- * compile.c (sim_resume): Fix all rotate-by-2-bits insns.
-
-Tue Jul 2 23:08:45 1996 Jeffrey A Law (law@cygnus.com)
-
- * run.c (main): Don't "load" sections which don't have
- SEC_LOAD set.
- * compile.c (sim_resume, case "O_NOT"): Use ONOT instead
- of OSHIFTS.
- (ONOT): Define.
- (sim_resume, shift/rotate cases): Add support for shift/rotate
- by two bits.
- (OSHIFTS): Corresponding changes.
-
-Tue Jul 2 01:37:27 1996 Jeffrey A Law (law@cygnus.com)
-
- * compile.c (sim_resume): Handle "ldm.l" and "stm.l".
-
-Wed Jun 26 08:58:53 1996 Jeffrey A Law (law@cygnus.com)
-
- * compile.c (h8300smode): Declare.
-
-Wed Jun 26 12:20:56 1996 Jason Molenda (crash@godzilla.cygnus.co.jp)
-
- * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
- INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
- (docdir): Removed.
- * configure.in (AC_PREREQ): autoconf 2.5 or higher.
- (AC_PROG_INSTALL): Added.
- * configure: Rebuilt.
-
-Tue Jun 18 16:31:10 1996 Jeffrey A. Law <law@rtl.cygnus.com>
-
- * compile.c (sim_load): Treat the H8/S like the H8/300H for now.
- * run.c (main): Treat the H8/S like the H8/300H for now.
-
-Fri May 24 10:35:25 1996 Jeffrey A Law (law@cygnus.com)
-
- * compile.c (SEXTCHAR): Clear upper bits when sign
- bit is clear.
-
-Wed May 22 22:23:37 1996 Jeffrey A Law (law@cygnus.com)
-
- * compile.c (sim_resume): Correctly handle divu.
-
-Tue May 7 02:13:05 1996 Jeffrey A Law (law@cygnus.com)
-
- * compile.c (sim_resume): Never allow the PC to have an
- odd value.
-
-Fri Apr 12 16:50:37 1996 Jeffrey A Law (law@cygnus.com)
-
- * inst.h: Expand on comments regarding H8300H_MSIZE. Note
- separate memory is allocate for the 8-bit area.
- (struct cpu_state_type): Add new "eightbit' field.
- * compile.c (GET_MEMORY_L): Handle access into the 8-bit
- area.
- (GET_MEMORY_W, GET_MEMORY_B): Likewise.
- (SET_MEMORY_L, SET_MEMORY_W, SET_MEMORY_B): Likewise.
- (init_pointers): Initialize space for the 8-bit area.
- (sim_write): Handle writing into the 8-bit area.
- (sim_read): Handle reading from the 8-bit area.
- (sim_load): Reallocate space for the 8-bit area.
-
- * compile.c (sim_load): Re-allocate memory for the simulator
- here.
-
-Fri Apr 12 09:39:56 1996 Jeffrey A Law (law@cygnus.com)
-
- * compile.c (sim_resume): Fix and simplify overflow and carry
- handling for 32bit ALU insns.
-
-Mon Apr 8 23:58:49 1996 Jeffrey A Law (law@cygnus.com)
-
- * compile.c (sim_resume): Fix overflow checks for ALU insns.
-
-Fri Apr 5 17:20:59 1996 Jeffrey A Law (law@cygnus.com)
-
- * compile.c (decode): Use "bit" to hold L_3 immediates instead
- of holding them in "abs". Handle ABS8MEM memory references aka
- 8-bit area. Replace ABSMOV references with ABS8MEM.
-
-Wed Mar 13 17:43:56 1996 Jeffrey A Law (law@cygnus.com)
-
- * compile.c (fetch): Handle accesses to the exception/function
- vectors.
-
-Mon Mar 11 09:53:25 1996 Doug Evans <dje@charmed.cygnus.com>
-
- * compile.c: #include "wait.h".
- (sim_resume, sleep insn): Check program exit status in r0.
- (sim_resume, shift insns): Fix setting of overflow flag for shal.
- * run.c: #include <signal.h>.
- (main): Abort if program got SIGILL.
- Print error message if argument is invalid.
- (usage): Improve text.
-
-Wed Feb 21 12:15:00 1996 Ian Lance Taylor <ian@cygnus.com>
-
- * configure: Regenerate with autoconf 2.7.
-
-Thu Jan 4 11:52:53 1996 Doug Evans <dje@canuck.cygnus.com>
-
- * inst.h (MPOWER,MSIZE): Deleted.
- (H8300{,H}_MSIZE): Define.
- * compile.c (memory_size): New static global.
- (init_pointers): Set memory size from one of H8300{,H}_MSIZE.
- (sim_write,sim_read): Use memory_size.
-
-Fri Oct 13 15:03:19 1995 steve chamberlain <sac@slash.cygnus.com>
-
- * compile.c (sim_set_callbacks): New.
-
-Tue Oct 10 11:11:26 1995 Fred Fish <fnf@cygnus.com>
-
- * Makefile.in (BISON): Remove macro.
-
-Wed Sep 20 13:35:02 1995 Ian Lance Taylor <ian@cygnus.com>
-
- * Makefile.in (maintainer-clean): New synonym for realclean.
-
-Fri Sep 8 12:18:53 1995 Ian Lance Taylor <ian@cygnus.com>
-
- * Makefile.in (install): Don't install in $(tooldir).
-
- * configure.in: Call AC_CONFIG_HEADER. Don't try to use
- bfd/hosts/*.h file or bfd/config/*.mh file. Call AC_PROG_CC and
- AC_PROG_RANLIB. Substitute in values for CFLAGS, HDEFINES and AR.
- Call AC_CHECK_HEADERS for stdlib.h and time.h. Touch stamp.h if
- creating config.h.
- * configure: Rebuild.
- * config.in: New file, created by autoheader.
- * Makefile.in (AR): Define as @AR@.
- (CC): New variable, defined as @CC@.
- (CFLAGS): Define as @CFLAGS@.
- (RANLIB): Define as @RANLIB@.
- (HDEFINES, TDEFINES): New variables.
- (@host_makefile_frag@): Remove.
- (compile.o, run.o): Depend upon config.h.
- (mostlyclean): Make the same as clean, not distclean.
- (clean): Remove config.log.
- (distclean): Remove config.h and stamp-h.
- (Makefile): Don't depend upon @frags@. Just rebuild Makefile when
- invoking config.status.
- (config.h, stamp-h): New targets.
- * compile.c: Include "config.h". Don't include <sys/times.h>.
- Include <time.h> and <stdlib.h> if they exist. Don't include
- "sysdep.h".
- (get_now): Remove unused local b.
- * run.c: Include "config.h". Include <stdlib.h> if it exists.
- Don't include "sysdep.h".
- * writecode.c: Don't include "bfd.h" or "sysdep.h". Include
- <stdio.h>.
-
-Thu Aug 3 10:45:37 1995 Fred Fish <fnf@cygnus.com>
-
- * Update all FSF addresses except those in COPYING* files.
-
-Wed Jul 5 14:32:54 1995 J.T. Conklin <jtc@rtl.cygnus.com>
-
- * Makefile.in (clean): Remove run.
- (distclean): Remove Makefile.
-
- * h8300.mt: Removed.
-
- * Makefile.in, configure.in: converted to autoconf.
- * configure: New file, generated with autconf 2.4.
-
-Fri Jun 30 16:50:24 1995 Stan Shebs <shebs@andros.cygnus.com>
-
- * compile.c (sim_do_command): New function.
-
-Tue Jun 20 16:18:13 1995 Steve Chamberlain <sac@slash.cygnus.com>
-
- * compile.c (get_now): Don't do if win32.
- (sim_resume): Poll in win32 too.
-
-Wed May 24 16:31:38 1995 Jim Wilson <wilson@chestnut.cygnus.com>
-
- * configure.in: Fix typo in last change.
-
-Mon Mar 27 10:32:34 1995 J.T. Conklin <jtc@rtl.cygnus.com>
-
- * run.c: parse arguments with getopt().
-
-Tue Feb 28 17:30:08 1995 Ian Lance Taylor <ian@cygnus.com>
-
- * configure.in: Use ../../bfd/hosts/std-host.h if specific
- host unavailable.
-
-Sun Jan 22 12:35:43 1995 Steve Chamberlain <sac@splat>
-
- * compile.c (sim_resume): Initialize cpu.mask.
-
-Thu Sep 8 16:53:00 1994 Steve Chamberlain (sac@jonny.cygnus.com)
-
- * inst.h (MPOWER): Bump simulated memory size to 2^18 bytes.
-
-Wed May 18 13:47:58 1994 Doug Evans (dje@canuck.cygnus.com)
-
- * compile.c: #include "bfd.h".
- (sim_*): Set result type to void where there isn't one.
- (sim_resume, default case): Set cpu.exception to SIGILL.
- (sim_trace): Delete.
- (sim_set_pc): Delete.
- (sim_info): Delete printf_fn arg, all callers changed.
- Call printf_filtered.
- (set_h8300h): New arg `flag', all callers changed.
- (sim_close): New function.
- (sim_load): New function.
- (sim_create_inferior): Renamed from sim_set_args, all callers changed.
- * run.c: #include <varargs.h>, "remote-sim.h".
- (printf_filtered): New function.
-
-Fri May 13 18:32:27 1994 Doug Evans (dje@canuck.cygnus.com)
-
- * compile.c (decode): Fix typo (16 bit branches).
- (*): Some white space clean up.
-
-Fri May 6 13:44:01 1994 Steve Chamberlain (sac@jonny.cygnus.com)
-
- * compile.c (decode): Compile 16bit branches properly.
-
-Sat Dec 11 16:32:36 1993 Steve Chamberlain (sac@thepub.cygnus.com)
-
- * compile.c: Tidy up formatting. (sim_resume): Add orc, xorc,
- andc. Poll for interrupts.
-
-Thu Oct 28 19:29:34 1993 Doug Evans (dje@canuck.cygnus.com)
-
- * compile.c: #include "ansidecl.h" for remote-sim.h.
-
-Tue Oct 26 09:43:36 1993 Doug Evans (dje@canuck.cygnus.com)
-
- * Makefile.in (CSEARCH): Add -I$(srcdir)/../../gdb
- * compile.c: #include "remote-sim.h".
- (sim_resume): New arg siggnal.
- (sim_write): Use SIM_ADDR for type of arg addr.
- Always return a value.
- (sim_read): Ditto.
- (sim_store_register): Result is type int.
- (sim_fetch_register): Ditto.
- (sim_stop_reason): Renamed from sim_stop_signal.
- (sim_set_pc): Use SIM_ADDR for type of arg pc.
- (sim_info): int result, new arg printf_fn.
- (sim_kill): int result.
- (sim_open): int result, new arg name.
- * run.c (main): Use sim_set_pc to set pc.
- Update call to sim_info.
-
-Sat Oct 23 15:01:18 1993 Doug Evans (dje@canuck.cygnus.com)
-
- * compile.c (sim_stop_signal): Result is now enum sim_stop.
-
-Fri Oct 15 23:49:27 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
-
- * compile.c (sim_kill, sim_open, sim_set_args): New functions.
-
-Thu Oct 7 16:24:10 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
-
- * compile.c (sim_set_pc): Write to the pc direcly.
- (sim_store_register): Now value is passed by reference. (sim_read,
- sim_write): Return number of bytes copied.
-
-Tue Aug 17 07:16:15 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
-
- * compile.c (mop): New function to do multiplies.
-
-Fri Jul 16 13:53:53 1993 Doug Evans (dje@canuck.cygnus.com)
-
- * compile.c (sim_resume): Add support for nop insn.
-
-Thu Jul 15 09:59:01 1993 Doug Evans (dje@canuck.cygnus.com)
-
- * compile.c: Reset HMODE back to zero (accidently set it to 1).
-
- * run.c (main): If h8/300h binary detected, call set_h8300h.
- * compile.c (sim_resume): Fix O_NEG insn.
-
-Fri Jul 9 14:36:48 1993 Doug Evans (dje@canuck.cygnus.com)
-
- * run.c (main): Add -h flag to enable h8/300h emulation.
- * compile.c: Rename Hmode to HMODE (consistency with gdb).
- (set_h8300h): New function.
- (sim_resume): Add support for extu,exts insns.
- (sim_resume): Fix logical right shifting.
- (sim_resume, label alu32): Fix setting of carry flag.
-
-Sun Jul 4 00:35:41 1993 Doug Evans (dje@canuck.cygnus.com)
-
- * compile.c (sim_csize): Initialize cpu.cache.
-
-Fri Jul 2 17:42:59 1993 Doug Evans (dje@canuck.cygnus.com)
-
- * Makefile.in: Add -I../../bfd to pick up bfd.h.
-
-Thu Jun 24 13:40:12 1993 Doug Evans (dje@canuck.cygnus.com)
-
- * run.c (main): Fix parsing of args.
-
- * compile.c (sim_resume): Fix shll insn.
-
-Tue Jun 8 14:16:46 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
-
- * compile.c: New file, supports H8/300H.
- * p1,p3, gencode.c, state.h, writecode.c All dead and obsolete.
-
-Tue Jun 1 11:14:59 1993 Steve Chamberlain (sac@thepub.cygnus.com)
-
- * run.c (main): Add -v to print info.
- * p3.c (sim_info): New function.
-
-Mon Mar 15 15:48:31 1993 Ian Lance Taylor (ian@cygnus.com)
-
- * h8300.mt (DO_INSTALL): Renamed from INSTALL.
-
-Wed Mar 3 15:06:53 1993 Steve Chamberlain (sac@poseidon.cygnus.com)
-
- * Makefile.in: Don't use cb or indent
- * p1.c, state.h, writecode.c: lint
-
-Mon Feb 1 16:44:58 1993 John Gilmore (gnu@cygnus.com)
-
- * Makefile.in: Make SunOS halfdone VPATH work.
- * p1.c: Lint picked up by HP native compiler.
-
-Mon Jan 4 12:32:35 1993 Steve Chamberlain (sac@wahini.cygnus.com)
-
- * p1.c (sim_resume): when running on dos, any character typed to
- the keyboard will cause a simulated exception.
-
-Sun Jan 3 14:15:07 1993 Steve Chamberlain (sac@thepub.cygnus.com)
-
- * p1.c, p3.c, run.c, writecode.c: all used h8/300 opcodes in and
- running
-
-Tue Dec 22 13:56:48 1992 Steve Chamberlain (sac@thepub.cygnus.com)
-
- * new
-
diff --git a/sim/h8300/Makefile.in b/sim/h8300/Makefile.in
deleted file mode 100644
index 867e2e6e1db..00000000000
--- a/sim/h8300/Makefile.in
+++ /dev/null
@@ -1,25 +0,0 @@
-# Makefile template for Configure for the h8300 sim library.
-# Copyright (C) 1990, 91, 92, 95, 96, 1997 Free Software Foundation, Inc.
-# Written by Cygnus Support.
-#
-# This program is free software; you can redistribute it and/or modify
-# it under the terms of the GNU General Public License as published by
-# the Free Software Foundation; either version 2 of the License, or
-# (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
-## COMMON_PRE_CONFIG_FRAG
-
-SIM_OBJS = compile.o sim-load.o
-
-## COMMON_POST_CONFIG_FRAG
-
-compile.o: compile.c config.h
diff --git a/sim/h8300/acconfig.h b/sim/h8300/acconfig.h
deleted file mode 100644
index f9b87a10c60..00000000000
--- a/sim/h8300/acconfig.h
+++ /dev/null
@@ -1,15 +0,0 @@
-
-/* Define to 1 if NLS is requested. */
-#undef ENABLE_NLS
-
-/* Define as 1 if you have catgets and don't want to use GNU gettext. */
-#undef HAVE_CATGETS
-
-/* Define as 1 if you have gettext and don't want to use GNU gettext. */
-#undef HAVE_GETTEXT
-
-/* Define as 1 if you have the stpcpy function. */
-#undef HAVE_STPCPY
-
-/* Define if your locale.h file contains LC_MESSAGES. */
-#undef HAVE_LC_MESSAGES
diff --git a/sim/h8300/compile.c b/sim/h8300/compile.c
deleted file mode 100644
index d567cb131eb..00000000000
--- a/sim/h8300/compile.c
+++ /dev/null
@@ -1,2145 +0,0 @@
-/*
- * Simulator for the Hitachi H8/300 architecture.
- *
- * Written by Steve Chamberlain of Cygnus Support. sac@cygnus.com
- *
- * This file is part of H8/300 sim
- *
- *
- * THIS SOFTWARE IS NOT COPYRIGHTED
- *
- * Cygnus offers the following for use in the public domain. Cygnus makes no
- * warranty with regard to the software or its performance and the user
- * accepts the software "AS IS" with all faults.
- *
- * CYGNUS DISCLAIMS ANY WARRANTIES, EXPRESS OR IMPLIED, WITH REGARD TO THIS
- * SOFTWARE INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY
- * AND FITNESS FOR A PARTICULAR PURPOSE.
- */
-
-#include "config.h"
-
-#include <stdio.h>
-#include <signal.h>
-#ifdef HAVE_TIME_H
-#include <time.h>
-#endif
-#ifdef HAVE_STDLIB_H
-#include <stdlib.h>
-#endif
-#ifdef HAVE_SYS_PARAM_H
-#include <sys/param.h>
-#endif
-#include "ansidecl.h"
-#include "bfd.h"
-#include "callback.h"
-#include "remote-sim.h"
-
-#ifndef SIGTRAP
-# define SIGTRAP 5
-#endif
-
-int debug;
-
-host_callback *sim_callback;
-
-static SIM_OPEN_KIND sim_kind;
-static char *myname;
-
-/* FIXME: Needs to live in header file.
- This header should also include the things in remote-sim.h.
- One could move this to remote-sim.h but this function isn't needed
- by gdb. */
-void sim_set_simcache_size PARAMS ((int));
-
-#define X(op, size) op*4+size
-
-#define SP (h8300hmode ? SL:SW)
-#define SB 0
-#define SW 1
-#define SL 2
-#define OP_REG 1
-#define OP_DEC 2
-#define OP_DISP 3
-#define OP_INC 4
-#define OP_PCREL 5
-#define OP_MEM 6
-#define OP_CCR 7
-#define OP_IMM 8
-#define OP_ABS 10
-#define h8_opcodes ops
-#define DEFINE_TABLE
-#include "opcode/h8300.h"
-
-#include "inst.h"
-
-/* The rate at which to call the host's poll_quit callback. */
-
-#define POLL_QUIT_INTERVAL 0x80000
-
-#define LOW_BYTE(x) ((x) & 0xff)
-#define HIGH_BYTE(x) (((x)>>8) & 0xff)
-#define P(X,Y) ((X<<8) | Y)
-
-#define BUILDSR() cpu.ccr = (N << 3) | (Z << 2) | (V<<1) | C;
-
-#define GETSR() \
- c = (cpu.ccr >> 0) & 1;\
- v = (cpu.ccr >> 1) & 1;\
- nz = !((cpu.ccr >> 2) & 1);\
- n = (cpu.ccr >> 3) & 1;
-
-#ifdef __CHAR_IS_SIGNED__
-#define SEXTCHAR(x) ((char)(x))
-#endif
-
-#ifndef SEXTCHAR
-#define SEXTCHAR(x) ((x & 0x80) ? (x | ~0xff): x & 0xff)
-#endif
-
-#define UEXTCHAR(x) ((x) & 0xff)
-#define UEXTSHORT(x) ((x) & 0xffff)
-#define SEXTSHORT(x) ((short)(x))
-
-static cpu_state_type cpu;
-
-int h8300hmode = 0;
-int h8300smode = 0;
-
-static int memory_size;
-
-static int
-get_now ()
-{
-#ifndef WIN32
- return time (0);
-#endif
- return 0;
-}
-
-static int
-now_persec ()
-{
- return 1;
-}
-
-static int
-bitfrom (x)
-{
- switch (x & SIZE)
- {
- case L_8:
- return SB;
- case L_16:
- return SW;
- case L_32:
- return SL;
- case L_P:
- return h8300hmode ? SL : SW;
- }
-}
-
-static unsigned int
-lvalue (x, rn)
-{
- switch (x / 4)
- {
- case OP_DISP:
- if (rn == 8)
- {
- return X (OP_IMM, SP);
- }
- return X (OP_REG, SP);
-
- case OP_MEM:
- return X (OP_MEM, SP);
-
- default:
- abort ();
- }
-}
-
-static unsigned int
-decode (addr, data, dst)
- int addr;
- unsigned char *data;
- decoded_inst *dst;
-
-{
- int rs = 0;
- int rd = 0;
- int rdisp = 0;
- int abs = 0;
- int bit = 0;
- int plen = 0;
- struct h8_opcode *q;
- int size = 0;
-
- dst->dst.type = -1;
- dst->src.type = -1;
-
- /* Find the exact opcode/arg combo. */
- for (q = h8_opcodes; q->name; q++)
- {
- op_type *nib = q->data.nib;
- unsigned int len = 0;
-
- while (1)
- {
- op_type looking_for = *nib;
- int thisnib = data[len >> 1];
-
- thisnib = (len & 1) ? (thisnib & 0xf) : ((thisnib >> 4) & 0xf);
-
- if (looking_for < 16 && looking_for >= 0)
- {
- if (looking_for != thisnib)
- goto fail;
- }
- else
- {
- if ((int) looking_for & (int) B31)
- {
- if (!(((int) thisnib & 0x8) != 0))
- goto fail;
-
- looking_for = (op_type) ((int) looking_for & ~(int) B31);
- thisnib &= 0x7;
- }
-
- if ((int) looking_for & (int) B30)
- {
- if (!(((int) thisnib & 0x8) == 0))
- goto fail;
-
- looking_for = (op_type) ((int) looking_for & ~(int) B30);
- }
-
- if (looking_for & DBIT)
- {
- /* Exclude adds/subs by looking at bit 0 and 2, and
- make sure the operand size, either w or l,
- matches by looking at bit 1. */
- if ((looking_for & 7) != (thisnib & 7))
- goto fail;
-
- abs = (thisnib & 0x8) ? 2 : 1;
- }
- else if (looking_for & (REG | IND | INC | DEC))
- {
- if (looking_for & REG)
- {
- /* Can work out size from the register. */
- size = bitfrom (looking_for);
- }
- if (looking_for & SRC)
- rs = thisnib;
- else
- rd = thisnib;
- }
- else if (looking_for & L_16)
- {
- abs = (data[len >> 1]) * 256 + data[(len + 2) >> 1];
- plen = 16;
- if (looking_for & (PCREL | DISP))
- {
- abs = (short) (abs);
- }
- }
- else if (looking_for & ABSJMP)
- {
- abs = (data[1] << 16) | (data[2] << 8) | (data[3]);
- }
- else if (looking_for & MEMIND)
- {
- abs = data[1];
- }
- else if (looking_for & L_32)
- {
- int i = len >> 1;
-
- abs = (data[i] << 24)
- | (data[i + 1] << 16)
- | (data[i + 2] << 8)
- | (data[i + 3]);
-
- plen = 32;
- }
- else if (looking_for & L_24)
- {
- int i = len >> 1;
-
- abs = (data[i] << 16) | (data[i + 1] << 8) | (data[i + 2]);
- plen = 24;
- }
- else if (looking_for & IGNORE)
- {
- ;
- }
- else if (looking_for & DISPREG)
- {
- rdisp = thisnib & 0x7;
- }
- else if (looking_for & KBIT)
- {
- switch (thisnib)
- {
- case 9:
- abs = 4;
- break;
- case 8:
- abs = 2;
- break;
- case 0:
- abs = 1;
- break;
- default:
- goto fail;
- }
- }
- else if (looking_for & L_8)
- {
- plen = 8;
-
- if (looking_for & PCREL)
- {
- abs = SEXTCHAR (data[len >> 1]);
- }
- else if (looking_for & ABS8MEM)
- {
- plen = 8;
- abs = h8300hmode ? ~0xff0000ff : ~0xffff00ff;
- abs |= data[len >> 1] & 0xff;
- }
- else
- {
- abs = data[len >> 1] & 0xff;
- }
- }
- else if (looking_for & L_3)
- {
- plen = 3;
-
- bit = thisnib;
- }
- else if (looking_for == E)
- {
- dst->op = q;
-
- /* Fill in the args. */
- {
- op_type *args = q->args.nib;
- int hadone = 0;
-
- while (*args != E)
- {
- int x = *args;
- int rn = (x & DST) ? rd : rs;
- ea_type *p;
-
- if (x & DST)
- p = &(dst->dst);
- else
- p = &(dst->src);
-
- if (x & L_3)
- {
- p->type = X (OP_IMM, size);
- p->literal = bit;
- }
- else if (x & (IMM | KBIT | DBIT))
- {
- p->type = X (OP_IMM, size);
- p->literal = abs;
- }
- else if (x & REG)
- {
- /* Reset the size.
- Some ops (like mul) have two sizes. */
-
- size = bitfrom (x);
- p->type = X (OP_REG, size);
- p->reg = rn;
- }
- else if (x & INC)
- {
- p->type = X (OP_INC, size);
- p->reg = rn & 0x7;
- }
- else if (x & DEC)
- {
- p->type = X (OP_DEC, size);
- p->reg = rn & 0x7;
- }
- else if (x & IND)
- {
- p->type = X (OP_DISP, size);
- p->reg = rn & 0x7;
- p->literal = 0;
- }
- else if (x & (ABS | ABSJMP | ABS8MEM))
- {
- p->type = X (OP_DISP, size);
- p->literal = abs;
- p->reg = 8;
- }
- else if (x & MEMIND)
- {
- p->type = X (OP_MEM, size);
- p->literal = abs;
- }
- else if (x & PCREL)
- {
- p->type = X (OP_PCREL, size);
- p->literal = abs + addr + 2;
- if (x & L_16)
- p->literal += 2;
- }
- else if (x & ABSJMP)
- {
- p->type = X (OP_IMM, SP);
- p->literal = abs;
- }
- else if (x & DISP)
- {
- p->type = X (OP_DISP, size);
- p->literal = abs;
- p->reg = rdisp & 0x7;
- }
- else if (x & CCR)
- {
- p->type = OP_CCR;
- }
- else
- printf ("Hmmmm %x", x);
-
- args++;
- }
- }
-
- /* But a jmp or a jsr gets automagically lvalued,
- since we branch to their address not their
- contents. */
- if (q->how == O (O_JSR, SB)
- || q->how == O (O_JMP, SB))
- {
- dst->src.type = lvalue (dst->src.type, dst->src.reg);
- }
-
- if (dst->dst.type == -1)
- dst->dst = dst->src;
-
- dst->opcode = q->how;
- dst->cycles = q->time;
-
- /* And a jsr to 0xc4 is turned into a magic trap. */
-
- if (dst->opcode == O (O_JSR, SB))
- {
- if (dst->src.literal == 0xc4)
- {
- dst->opcode = O (O_SYSCALL, SB);
- }
- }
-
- dst->next_pc = addr + len / 2;
- return;
- }
- else
- printf ("Don't understand %x \n", looking_for);
- }
-
- len++;
- nib++;
- }
-
- fail:
- ;
- }
-
- /* Fell off the end. */
- dst->opcode = O (O_ILL, SB);
-}
-
-static void
-compile (pc)
-{
- int idx;
-
- /* find the next cache entry to use */
-
- idx = cpu.cache_top + 1;
- cpu.compiles++;
- if (idx >= cpu.csize)
- {
- idx = 1;
- }
- cpu.cache_top = idx;
-
- /* Throw away its old meaning */
- cpu.cache_idx[cpu.cache[idx].oldpc] = 0;
-
- /* set to new address */
- cpu.cache[idx].oldpc = pc;
-
- /* fill in instruction info */
- decode (pc, cpu.memory + pc, cpu.cache + idx);
-
- /* point to new cache entry */
- cpu.cache_idx[pc] = idx;
-}
-
-
-static unsigned char *breg[18];
-static unsigned short *wreg[18];
-static unsigned int *lreg[18];
-
-#define GET_B_REG(x) *(breg[x])
-#define SET_B_REG(x,y) (*(breg[x])) = (y)
-#define GET_W_REG(x) *(wreg[x])
-#define SET_W_REG(x,y) (*(wreg[x])) = (y)
-
-#define GET_L_REG(x) *(lreg[x])
-#define SET_L_REG(x,y) (*(lreg[x])) = (y)
-
-#define GET_MEMORY_L(x) \
- (x < memory_size \
- ? ((cpu.memory[x+0] << 24) | (cpu.memory[x+1] << 16) \
- | (cpu.memory[x+2] << 8) | cpu.memory[x+3]) \
- : ((cpu.eightbit[(x+0) & 0xff] << 24) | (cpu.eightbit[(x+1) & 0xff] << 16) \
- | (cpu.eightbit[(x+2) & 0xff] << 8) | cpu.eightbit[(x+3) & 0xff]))
-
-#define GET_MEMORY_W(x) \
- (x < memory_size \
- ? ((cpu.memory[x+0] << 8) | (cpu.memory[x+1] << 0)) \
- : ((cpu.eightbit[(x+0) & 0xff] << 8) | (cpu.eightbit[(x+1) & 0xff] << 0)))
-
-
-#define GET_MEMORY_B(x) \
- (x < memory_size ? (cpu.memory[x]) : (cpu.eightbit[x & 0xff]))
-
-#define SET_MEMORY_L(x,y) \
-{ register unsigned char *_p; register int __y = y; \
- _p = (x < memory_size ? cpu.memory+x : cpu.eightbit + (x & 0xff)); \
- _p[0] = (__y)>>24; _p[1] = (__y)>>16; \
- _p[2] = (__y)>>8; _p[3] = (__y)>>0;}
-
-#define SET_MEMORY_W(x,y) \
-{ register unsigned char *_p; register int __y = y; \
- _p = (x < memory_size ? cpu.memory+x : cpu.eightbit + (x & 0xff)); \
- _p[0] = (__y)>>8; _p[1] =(__y);}
-
-#define SET_MEMORY_B(x,y) \
- (x < memory_size ? (cpu.memory[(x)] = y) : (cpu.eightbit[x & 0xff] = y))
-
-int
-fetch (arg, n)
- ea_type *arg;
-{
- int rn = arg->reg;
- int abs = arg->literal;
- int r;
- int t;
-
- switch (arg->type)
- {
- case X (OP_REG, SB):
- return GET_B_REG (rn);
- case X (OP_REG, SW):
- return GET_W_REG (rn);
- case X (OP_REG, SL):
- return GET_L_REG (rn);
- case X (OP_IMM, SB):
- case X (OP_IMM, SW):
- case X (OP_IMM, SL):
- return abs;
- case X (OP_DEC, SB):
- abort ();
-
- case X (OP_INC, SB):
- t = GET_L_REG (rn);
- t &= cpu.mask;
- r = GET_MEMORY_B (t);
- t++;
- t = t & cpu.mask;
- SET_L_REG (rn, t);
- return r;
- break;
- case X (OP_INC, SW):
- t = GET_L_REG (rn);
- t &= cpu.mask;
- r = GET_MEMORY_W (t);
- t += 2;
- t = t & cpu.mask;
- SET_L_REG (rn, t);
- return r;
- case X (OP_INC, SL):
- t = GET_L_REG (rn);
- t &= cpu.mask;
- r = GET_MEMORY_L (t);
-
- t += 4;
- t = t & cpu.mask;
- SET_L_REG (rn, t);
- return r;
-
- case X (OP_DISP, SB):
- t = GET_L_REG (rn) + abs;
- t &= cpu.mask;
- return GET_MEMORY_B (t);
-
- case X (OP_DISP, SW):
- t = GET_L_REG (rn) + abs;
- t &= cpu.mask;
- return GET_MEMORY_W (t);
-
- case X (OP_DISP, SL):
- t = GET_L_REG (rn) + abs;
- t &= cpu.mask;
- return GET_MEMORY_L (t);
-
- case X (OP_MEM, SL):
- t = GET_MEMORY_L (abs);
- t &= cpu.mask;
- return t;
-
- case X (OP_MEM, SW):
- t = GET_MEMORY_W (abs);
- t &= cpu.mask;
- return t;
-
- default:
- abort ();
-
- }
-}
-
-
-static
-void
-store (arg, n)
- ea_type *arg;
- int n;
-{
- int rn = arg->reg;
- int abs = arg->literal;
- int t;
-
- switch (arg->type)
- {
- case X (OP_REG, SB):
- SET_B_REG (rn, n);
- break;
- case X (OP_REG, SW):
- SET_W_REG (rn, n);
- break;
- case X (OP_REG, SL):
- SET_L_REG (rn, n);
- break;
-
- case X (OP_DEC, SB):
- t = GET_L_REG (rn) - 1;
- t &= cpu.mask;
- SET_L_REG (rn, t);
- SET_MEMORY_B (t, n);
-
- break;
- case X (OP_DEC, SW):
- t = (GET_L_REG (rn) - 2) & cpu.mask;
- SET_L_REG (rn, t);
- SET_MEMORY_W (t, n);
- break;
-
- case X (OP_DEC, SL):
- t = (GET_L_REG (rn) - 4) & cpu.mask;
- SET_L_REG (rn, t);
- SET_MEMORY_L (t, n);
- break;
-
- case X (OP_DISP, SB):
- t = GET_L_REG (rn) + abs;
- t &= cpu.mask;
- SET_MEMORY_B (t, n);
- break;
-
- case X (OP_DISP, SW):
- t = GET_L_REG (rn) + abs;
- t &= cpu.mask;
- SET_MEMORY_W (t, n);
- break;
-
- case X (OP_DISP, SL):
- t = GET_L_REG (rn) + abs;
- t &= cpu.mask;
- SET_MEMORY_L (t, n);
- break;
- default:
- abort ();
- }
-}
-
-
-static union
-{
- short int i;
- struct
- {
- char low;
- char high;
- }
- u;
-}
-
-littleendian;
-
-static
-void
-init_pointers ()
-{
- static int init;
-
- if (!init)
- {
- int i;
-
- init = 1;
- littleendian.i = 1;
-
- if (h8300hmode)
- memory_size = H8300H_MSIZE;
- else
- memory_size = H8300_MSIZE;
- cpu.memory = (unsigned char *) calloc (sizeof (char), memory_size);
- cpu.cache_idx = (unsigned short *) calloc (sizeof (short), memory_size);
- cpu.eightbit = (unsigned char *) calloc (sizeof (char), 256);
-
- /* `msize' must be a power of two */
- if ((memory_size & (memory_size - 1)) != 0)
- abort ();
- cpu.mask = memory_size - 1;
-
- for (i = 0; i < 9; i++)
- {
- cpu.regs[i] = 0;
- }
-
- for (i = 0; i < 8; i++)
- {
- unsigned char *p = (unsigned char *) (cpu.regs + i);
- unsigned char *e = (unsigned char *) (cpu.regs + i + 1);
- unsigned short *q = (unsigned short *) (cpu.regs + i);
- unsigned short *u = (unsigned short *) (cpu.regs + i + 1);
- cpu.regs[i] = 0x00112233;
- while (p < e)
- {
- if (*p == 0x22)
- {
- breg[i] = p;
- }
- if (*p == 0x33)
- {
- breg[i + 8] = p;
- }
- p++;
- }
- while (q < u)
- {
- if (*q == 0x2233)
- {
- wreg[i] = q;
- }
- if (*q == 0x0011)
- {
- wreg[i + 8] = q;
- }
- q++;
- }
- cpu.regs[i] = 0;
- lreg[i] = &cpu.regs[i];
- }
-
- lreg[8] = &cpu.regs[8];
-
- /* initialize the seg registers */
- if (!cpu.cache)
- sim_set_simcache_size (CSIZE);
- }
-}
-
-static void
-control_c (sig, code, scp, addr)
- int sig;
- int code;
- char *scp;
- char *addr;
-{
- cpu.state = SIM_STATE_STOPPED;
- cpu.exception = SIGINT;
-}
-
-#define C (c != 0)
-#define Z (nz == 0)
-#define V (v != 0)
-#define N (n != 0)
-
-static int
-mop (code, bsize, sign)
- decoded_inst *code;
- int bsize;
- int sign;
-{
- int multiplier;
- int multiplicand;
- int result;
- int n, nz;
-
- if (sign)
- {
- multiplicand =
- bsize ? SEXTCHAR (GET_W_REG (code->dst.reg)) :
- SEXTSHORT (GET_W_REG (code->dst.reg));
- multiplier =
- bsize ? SEXTCHAR (GET_B_REG (code->src.reg)) :
- SEXTSHORT (GET_W_REG (code->src.reg));
- }
- else
- {
- multiplicand = bsize ? UEXTCHAR (GET_W_REG (code->dst.reg)) :
- UEXTSHORT (GET_W_REG (code->dst.reg));
- multiplier =
- bsize ? UEXTCHAR (GET_B_REG (code->src.reg)) :
- UEXTSHORT (GET_W_REG (code->src.reg));
-
- }
- result = multiplier * multiplicand;
-
- if (sign)
- {
- n = result & (bsize ? 0x8000 : 0x80000000);
- nz = result & (bsize ? 0xffff : 0xffffffff);
- }
- if (bsize)
- {
- SET_W_REG (code->dst.reg, result);
- }
- else
- {
- SET_L_REG (code->dst.reg, result);
- }
-/* return ((n==1) << 1) | (nz==1); */
-
-}
-
-#define ONOT(name, how) \
-case O(name, SB): \
-{ \
- int t; \
- int hm = 0x80; \
- rd = GET_B_REG (code->src.reg); \
- how; \
- goto shift8; \
-} \
-case O(name, SW): \
-{ \
- int t; \
- int hm = 0x8000; \
- rd = GET_W_REG (code->src.reg); \
- how; \
- goto shift16; \
-} \
-case O(name, SL): \
-{ \
- int t; \
- int hm = 0x80000000; \
- rd = GET_L_REG (code->src.reg); \
- how; \
- goto shift32; \
-}
-
-#define OSHIFTS(name, how1, how2) \
-case O(name, SB): \
-{ \
- int t; \
- int hm = 0x80; \
- rd = GET_B_REG (code->src.reg); \
- if ((GET_MEMORY_B (pc + 1) & 0x40) == 0) \
- { \
- how1; \
- } \
- else \
- { \
- how2; \
- } \
- goto shift8; \
-} \
-case O(name, SW): \
-{ \
- int t; \
- int hm = 0x8000; \
- rd = GET_W_REG (code->src.reg); \
- if ((GET_MEMORY_B (pc + 1) & 0x40) == 0) \
- { \
- how1; \
- } \
- else \
- { \
- how2; \
- } \
- goto shift16; \
-} \
-case O(name, SL): \
-{ \
- int t; \
- int hm = 0x80000000; \
- rd = GET_L_REG (code->src.reg); \
- if ((GET_MEMORY_B (pc + 1) & 0x40) == 0) \
- { \
- how1; \
- } \
- else \
- { \
- how2; \
- } \
- goto shift32; \
-}
-
-#define OBITOP(name,f, s, op) \
-case O(name, SB): \
-{ \
- int m; \
- int b; \
- if (f) ea = fetch (&code->dst); \
- m=1<< fetch(&code->src); \
- op; \
- if(s) store (&code->dst,ea); goto next; \
-}
-
-int
-sim_stop (sd)
- SIM_DESC sd;
-{
- cpu.state = SIM_STATE_STOPPED;
- cpu.exception = SIGINT;
- return 1;
-}
-
-void
-sim_resume (sd, step, siggnal)
- SIM_DESC sd;
-{
- static int init1;
- int cycles = 0;
- int insts = 0;
- int tick_start = get_now ();
- void (*prev) ();
- int poll_count = 0;
- int res;
- int tmp;
- int rd;
- int ea;
- int bit;
- int pc;
- int c, nz, v, n;
- int oldmask;
- init_pointers ();
-
- prev = signal (SIGINT, control_c);
-
- if (step)
- {
- cpu.state = SIM_STATE_STOPPED;
- cpu.exception = SIGTRAP;
- }
- else
- {
- cpu.state = SIM_STATE_RUNNING;
- cpu.exception = 0;
- }
-
- pc = cpu.pc;
-
- /* The PC should never be odd. */
- if (pc & 0x1)
- abort ();
-
- GETSR ();
- oldmask = cpu.mask;
- if (!h8300hmode)
- cpu.mask = 0xffff;
- do
- {
- int cidx;
- decoded_inst *code;
-
- top:
- cidx = cpu.cache_idx[pc];
- code = cpu.cache + cidx;
-
-
-#define ALUOP(STORE, NAME, HOW) \
- case O(NAME,SB): HOW; if(STORE)goto alu8;else goto just_flags_alu8; \
- case O(NAME, SW): HOW; if(STORE)goto alu16;else goto just_flags_alu16; \
- case O(NAME,SL): HOW; if(STORE)goto alu32;else goto just_flags_alu32;
-
-
-#define LOGOP(NAME, HOW) \
- case O(NAME,SB): HOW; goto log8;\
- case O(NAME, SW): HOW; goto log16;\
- case O(NAME,SL): HOW; goto log32;
-
-
-
-#if ADEBUG
- if (debug)
- {
- printf ("%x %d %s\n", pc, code->opcode,
- code->op ? code->op->name : "**");
- }
- cpu.stats[code->opcode]++;
-
-#endif
-
- cycles += code->cycles;
- insts++;
- switch (code->opcode)
- {
- case 0:
- /*
- * This opcode is a fake for when we get to an
- * instruction which hasnt been compiled
- */
- compile (pc);
- goto top;
- break;
-
-
- case O (O_SUBX, SB):
- rd = fetch (&code->dst);
- ea = fetch (&code->src);
- ea = -(ea + C);
- res = rd + ea;
- goto alu8;
-
- case O (O_ADDX, SB):
- rd = fetch (&code->dst);
- ea = fetch (&code->src);
- ea = C + ea;
- res = rd + ea;
- goto alu8;
-
-#define EA ea = fetch(&code->src);
-#define RD_EA ea = fetch(&code->src); rd = fetch(&code->dst);
-
- ALUOP (1, O_SUB, RD_EA;
- ea = -ea;
- res = rd + ea);
- ALUOP (1, O_NEG, EA;
- ea = -ea;
- rd = 0;
- res = rd + ea);
-
- case O (O_ADD, SB):
- rd = GET_B_REG (code->dst.reg);
- ea = fetch (&code->src);
- res = rd + ea;
- goto alu8;
- case O (O_ADD, SW):
- rd = GET_W_REG (code->dst.reg);
- ea = fetch (&code->src);
- res = rd + ea;
- goto alu16;
- case O (O_ADD, SL):
- rd = GET_L_REG (code->dst.reg);
- ea = fetch (&code->src);
- res = rd + ea;
- goto alu32;
-
-
- LOGOP (O_AND, RD_EA;
- res = rd & ea);
-
- LOGOP (O_OR, RD_EA;
- res = rd | ea);
-
- LOGOP (O_XOR, RD_EA;
- res = rd ^ ea);
-
-
- case O (O_MOV_TO_MEM, SB):
- res = GET_B_REG (code->src.reg);
- goto log8;
- case O (O_MOV_TO_MEM, SW):
- res = GET_W_REG (code->src.reg);
- goto log16;
- case O (O_MOV_TO_MEM, SL):
- res = GET_L_REG (code->src.reg);
- goto log32;
-
-
- case O (O_MOV_TO_REG, SB):
- res = fetch (&code->src);
- SET_B_REG (code->dst.reg, res);
- goto just_flags_log8;
- case O (O_MOV_TO_REG, SW):
- res = fetch (&code->src);
- SET_W_REG (code->dst.reg, res);
- goto just_flags_log16;
- case O (O_MOV_TO_REG, SL):
- res = fetch (&code->src);
- SET_L_REG (code->dst.reg, res);
- goto just_flags_log32;
-
-
- case O (O_ADDS, SL):
- SET_L_REG (code->dst.reg,
- GET_L_REG (code->dst.reg)
- + code->src.literal);
-
- goto next;
-
- case O (O_SUBS, SL):
- SET_L_REG (code->dst.reg,
- GET_L_REG (code->dst.reg)
- - code->src.literal);
- goto next;
-
- case O (O_CMP, SB):
- rd = fetch (&code->dst);
- ea = fetch (&code->src);
- ea = -ea;
- res = rd + ea;
- goto just_flags_alu8;
-
- case O (O_CMP, SW):
- rd = fetch (&code->dst);
- ea = fetch (&code->src);
- ea = -ea;
- res = rd + ea;
- goto just_flags_alu16;
-
- case O (O_CMP, SL):
- rd = fetch (&code->dst);
- ea = fetch (&code->src);
- ea = -ea;
- res = rd + ea;
- goto just_flags_alu32;
-
-
- case O (O_DEC, SB):
- rd = GET_B_REG (code->src.reg);
- ea = -1;
- res = rd + ea;
- SET_B_REG (code->src.reg, res);
- goto just_flags_inc8;
-
- case O (O_DEC, SW):
- rd = GET_W_REG (code->dst.reg);
- ea = -code->src.literal;
- res = rd + ea;
- SET_W_REG (code->dst.reg, res);
- goto just_flags_inc16;
-
- case O (O_DEC, SL):
- rd = GET_L_REG (code->dst.reg);
- ea = -code->src.literal;
- res = rd + ea;
- SET_L_REG (code->dst.reg, res);
- goto just_flags_inc32;
-
-
- case O (O_INC, SB):
- rd = GET_B_REG (code->src.reg);
- ea = 1;
- res = rd + ea;
- SET_B_REG (code->src.reg, res);
- goto just_flags_inc8;
-
- case O (O_INC, SW):
- rd = GET_W_REG (code->dst.reg);
- ea = code->src.literal;
- res = rd + ea;
- SET_W_REG (code->dst.reg, res);
- goto just_flags_inc16;
-
- case O (O_INC, SL):
- rd = GET_L_REG (code->dst.reg);
- ea = code->src.literal;
- res = rd + ea;
- SET_L_REG (code->dst.reg, res);
- goto just_flags_inc32;
-
-
-#define GET_CCR(x) BUILDSR();x = cpu.ccr
-
- case O (O_ANDC, SB):
- GET_CCR (rd);
- ea = code->src.literal;
- res = rd & ea;
- goto setc;
-
- case O (O_ORC, SB):
- GET_CCR (rd);
- ea = code->src.literal;
- res = rd | ea;
- goto setc;
-
- case O (O_XORC, SB):
- GET_CCR (rd);
- ea = code->src.literal;
- res = rd ^ ea;
- goto setc;
-
-
- case O (O_BRA, SB):
- if (1)
- goto condtrue;
- goto next;
-
- case O (O_BRN, SB):
- if (0)
- goto condtrue;
- goto next;
-
- case O (O_BHI, SB):
- if ((C || Z) == 0)
- goto condtrue;
- goto next;
-
-
- case O (O_BLS, SB):
- if ((C || Z))
- goto condtrue;
- goto next;
-
- case O (O_BCS, SB):
- if ((C == 1))
- goto condtrue;
- goto next;
-
- case O (O_BCC, SB):
- if ((C == 0))
- goto condtrue;
- goto next;
-
- case O (O_BEQ, SB):
- if (Z)
- goto condtrue;
- goto next;
- case O (O_BGT, SB):
- if (((Z || (N ^ V)) == 0))
- goto condtrue;
- goto next;
-
-
- case O (O_BLE, SB):
- if (((Z || (N ^ V)) == 1))
- goto condtrue;
- goto next;
-
- case O (O_BGE, SB):
- if ((N ^ V) == 0)
- goto condtrue;
- goto next;
- case O (O_BLT, SB):
- if ((N ^ V))
- goto condtrue;
- goto next;
- case O (O_BMI, SB):
- if ((N))
- goto condtrue;
- goto next;
- case O (O_BNE, SB):
- if ((Z == 0))
- goto condtrue;
- goto next;
-
- case O (O_BPL, SB):
- if (N == 0)
- goto condtrue;
- goto next;
- case O (O_BVC, SB):
- if ((V == 0))
- goto condtrue;
- goto next;
- case O (O_BVS, SB):
- if ((V == 1))
- goto condtrue;
- goto next;
-
- case O (O_SYSCALL, SB):
- {
- char c = cpu.regs[2];
- sim_callback->write_stdout (sim_callback, &c, 1);
- }
- goto next;
-
- ONOT (O_NOT, rd = ~rd; v = 0;);
- OSHIFTS (O_SHLL,
- c = rd & hm; v = 0; rd <<= 1,
- c = rd & (hm >> 1); v = 0; rd <<= 2);
- OSHIFTS (O_SHLR,
- c = rd & 1; v = 0; rd = (unsigned int) rd >> 1,
- c = rd & 2; v = 0; rd = (unsigned int) rd >> 2);
- OSHIFTS (O_SHAL,
- c = rd & hm; v = (rd & hm) != ((rd & (hm >> 1)) << 1); rd <<= 1,
- c = rd & (hm >> 1); v = (rd & (hm >> 1)) != ((rd & (hm >> 2)) << 2); rd <<= 2);
- OSHIFTS (O_SHAR,
- t = rd & hm; c = rd & 1; v = 0; rd >>= 1; rd |= t,
- t = rd & hm; c = rd & 2; v = 0; rd >>= 2; rd |= t | t >> 1 );
- OSHIFTS (O_ROTL,
- c = rd & hm; v = 0; rd <<= 1; rd |= C,
- c = rd & hm; v = 0; rd <<= 1; rd |= C; c = rd & hm; rd <<= 1; rd |= C);
- OSHIFTS (O_ROTR,
- c = rd & 1; v = 0; rd = (unsigned int) rd >> 1; if (c) rd |= hm,
- c = rd & 1; v = 0; rd = (unsigned int) rd >> 1; if (c) rd |= hm; c = rd & 1; rd = (unsigned int) rd >> 1; if (c) rd |= hm);
- OSHIFTS (O_ROTXL,
- t = rd & hm; rd <<= 1; rd |= C; c = t; v = 0,
- t = rd & hm; rd <<= 1; rd |= C; c = t; v = 0; t = rd & hm; rd <<= 1; rd |= C; c = t);
- OSHIFTS (O_ROTXR,
- t = rd & 1; rd = (unsigned int) rd >> 1; if (C) rd |= hm; c = t; v = 0,
- t = rd & 1; rd = (unsigned int) rd >> 1; if (C) rd |= hm; c = t; v = 0; t = rd & 1; rd = (unsigned int) rd >> 1; if (C) rd |= hm; c = t);
-
- case O (O_JMP, SB):
- {
- pc = fetch (&code->src);
- goto end;
-
- }
-
- case O (O_JSR, SB):
- {
- int tmp;
- pc = fetch (&code->src);
- call:
- tmp = cpu.regs[7];
-
- if (h8300hmode)
- {
- tmp -= 4;
- SET_MEMORY_L (tmp, code->next_pc);
- }
- else
- {
- tmp -= 2;
- SET_MEMORY_W (tmp, code->next_pc);
- }
- cpu.regs[7] = tmp;
-
- goto end;
- }
- case O (O_BSR, SB):
- pc = code->src.literal;
- goto call;
-
- case O (O_RTS, SN):
- {
- int tmp;
-
- tmp = cpu.regs[7];
-
- if (h8300hmode)
- {
- pc = GET_MEMORY_L (tmp);
- tmp += 4;
- }
- else
- {
- pc = GET_MEMORY_W (tmp);
- tmp += 2;
- }
-
- cpu.regs[7] = tmp;
- goto end;
- }
-
- case O (O_ILL, SB):
- cpu.state = SIM_STATE_STOPPED;
- cpu.exception = SIGILL;
- goto end;
- case O (O_SLEEP, SN):
- /* FIXME: Doesn't this break for breakpoints when r0
- contains just the right (er, wrong) value? */
- cpu.state = SIM_STATE_STOPPED;
- /* The format of r0 is defined by target newlib. Expand
- the macros here instead of looking for .../sys/wait.h. */
-#define SIM_WIFEXITED(v) (((v) & 0xff) == 0)
-#define SIM_WIFSIGNALED(v) (((v) & 0x7f) > 0 && (((v) & 0x7f) < 0x7f))
- if (! SIM_WIFEXITED (cpu.regs[0]) && SIM_WIFSIGNALED (cpu.regs[0]))
- cpu.exception = SIGILL;
- else
- cpu.exception = SIGTRAP;
- goto end;
- case O (O_BPT, SN):
- cpu.state = SIM_STATE_STOPPED;
- cpu.exception = SIGTRAP;
- goto end;
-
- OBITOP (O_BNOT, 1, 1, ea ^= m);
- OBITOP (O_BTST, 1, 0, nz = ea & m);
- OBITOP (O_BCLR, 1, 1, ea &= ~m);
- OBITOP (O_BSET, 1, 1, ea |= m);
- OBITOP (O_BLD, 1, 0, c = ea & m);
- OBITOP (O_BILD, 1, 0, c = !(ea & m));
- OBITOP (O_BST, 1, 1, ea &= ~m;
- if (C) ea |= m);
- OBITOP (O_BIST, 1, 1, ea &= ~m;
- if (!C) ea |= m);
- OBITOP (O_BAND, 1, 0, c = (ea & m) && C);
- OBITOP (O_BIAND, 1, 0, c = !(ea & m) && C);
- OBITOP (O_BOR, 1, 0, c = (ea & m) || C);
- OBITOP (O_BIOR, 1, 0, c = !(ea & m) || C);
- OBITOP (O_BXOR, 1, 0, c = (ea & m) != C);
- OBITOP (O_BIXOR, 1, 0, c = !(ea & m) != C);
-
-
-#define MOP(bsize, signed) mop(code, bsize,signed); goto next;
-
- case O (O_MULS, SB):
- MOP (1, 1);
- break;
- case O (O_MULS, SW):
- MOP (0, 1);
- break;
- case O (O_MULU, SB):
- MOP (1, 0);
- break;
- case O (O_MULU, SW):
- MOP (0, 0);
- break;
-
-
- case O (O_DIVU, SB):
- {
- rd = GET_W_REG (code->dst.reg);
- ea = GET_B_REG (code->src.reg);
- if (ea)
- {
- tmp = (unsigned)rd % ea;
- rd = (unsigned)rd / ea;
- }
- SET_W_REG (code->dst.reg, (rd & 0xff) | (tmp << 8));
- n = ea & 0x80;
- nz = ea & 0xff;
-
- goto next;
- }
- case O (O_DIVU, SW):
- {
- rd = GET_L_REG (code->dst.reg);
- ea = GET_W_REG (code->src.reg);
- n = ea & 0x8000;
- nz = ea & 0xffff;
- if (ea)
- {
- tmp = (unsigned)rd % ea;
- rd = (unsigned)rd / ea;
- }
- SET_L_REG (code->dst.reg, (rd & 0xffff) | (tmp << 16));
- goto next;
- }
-
- case O (O_DIVS, SB):
- {
-
- rd = SEXTSHORT (GET_W_REG (code->dst.reg));
- ea = SEXTCHAR (GET_B_REG (code->src.reg));
- if (ea)
- {
- tmp = (int) rd % (int) ea;
- rd = (int) rd / (int) ea;
- n = rd & 0x8000;
- nz = 1;
- }
- else
- nz = 0;
- SET_W_REG (code->dst.reg, (rd & 0xff) | (tmp << 8));
- goto next;
- }
- case O (O_DIVS, SW):
- {
- rd = GET_L_REG (code->dst.reg);
- ea = SEXTSHORT (GET_W_REG (code->src.reg));
- if (ea)
- {
- tmp = (int) rd % (int) ea;
- rd = (int) rd / (int) ea;
- n = rd & 0x80000000;
- nz = 1;
- }
- else
- nz = 0;
- SET_L_REG (code->dst.reg, (rd & 0xffff) | (tmp << 16));
- goto next;
- }
- case O (O_EXTS, SW):
- rd = GET_B_REG (code->src.reg + 8) & 0xff; /* Yes, src, not dst. */
- ea = rd & 0x80 ? -256 : 0;
- res = rd + ea;
- goto log16;
- case O (O_EXTS, SL):
- rd = GET_W_REG (code->src.reg) & 0xffff;
- ea = rd & 0x8000 ? -65536 : 0;
- res = rd + ea;
- goto log32;
- case O (O_EXTU, SW):
- rd = GET_B_REG (code->src.reg + 8) & 0xff;
- ea = 0;
- res = rd + ea;
- goto log16;
- case O (O_EXTU, SL):
- rd = GET_W_REG (code->src.reg) & 0xffff;
- ea = 0;
- res = rd + ea;
- goto log32;
-
- case O (O_NOP, SN):
- goto next;
-
- case O (O_STM, SL):
- {
- int nregs, firstreg, i;
-
- nregs = GET_MEMORY_B (pc + 1);
- nregs >>= 4;
- nregs &= 0xf;
- firstreg = GET_MEMORY_B (pc + 3);
- firstreg &= 0xf;
- for (i = firstreg; i <= firstreg + nregs; i++)
- {
- cpu.regs[7] -= 4;
- SET_MEMORY_L (cpu.regs[7], cpu.regs[i]);
- }
- }
- goto next;
-
- case O (O_LDM, SL):
- {
- int nregs, firstreg, i;
-
- nregs = GET_MEMORY_B (pc + 1);
- nregs >>= 4;
- nregs &= 0xf;
- firstreg = GET_MEMORY_B (pc + 3);
- firstreg &= 0xf;
- for (i = firstreg; i >= firstreg - nregs; i--)
- {
- cpu.regs[i] = GET_MEMORY_L (cpu.regs[7]);
- cpu.regs[7] += 4;
- }
- }
- goto next;
-
- default:
- cpu.state = SIM_STATE_STOPPED;
- cpu.exception = SIGILL;
- goto end;
-
- }
- abort ();
-
- setc:
- cpu.ccr = res;
- GETSR ();
- goto next;
-
- condtrue:
- /* When a branch works */
- pc = code->src.literal;
- goto end;
-
- /* Set the cond codes from res */
- bitop:
-
- /* Set the flags after an 8 bit inc/dec operation */
- just_flags_inc8:
- n = res & 0x80;
- nz = res & 0xff;
- v = (rd & 0x7f) == 0x7f;
- goto next;
-
-
- /* Set the flags after an 16 bit inc/dec operation */
- just_flags_inc16:
- n = res & 0x8000;
- nz = res & 0xffff;
- v = (rd & 0x7fff) == 0x7fff;
- goto next;
-
-
- /* Set the flags after an 32 bit inc/dec operation */
- just_flags_inc32:
- n = res & 0x80000000;
- nz = res & 0xffffffff;
- v = (rd & 0x7fffffff) == 0x7fffffff;
- goto next;
-
-
- shift8:
- /* Set flags after an 8 bit shift op, carry,overflow set in insn */
- n = (rd & 0x80);
- nz = rd & 0xff;
- SET_B_REG (code->src.reg, rd);
- goto next;
-
- shift16:
- /* Set flags after an 16 bit shift op, carry,overflow set in insn */
- n = (rd & 0x8000);
- nz = rd & 0xffff;
- SET_W_REG (code->src.reg, rd);
- goto next;
-
- shift32:
- /* Set flags after an 32 bit shift op, carry,overflow set in insn */
- n = (rd & 0x80000000);
- nz = rd & 0xffffffff;
- SET_L_REG (code->src.reg, rd);
- goto next;
-
- log32:
- store (&code->dst, res);
- just_flags_log32:
- /* flags after a 32bit logical operation */
- n = res & 0x80000000;
- nz = res & 0xffffffff;
- v = 0;
- goto next;
-
- log16:
- store (&code->dst, res);
- just_flags_log16:
- /* flags after a 16bit logical operation */
- n = res & 0x8000;
- nz = res & 0xffff;
- v = 0;
- goto next;
-
-
- log8:
- store (&code->dst, res);
- just_flags_log8:
- n = res & 0x80;
- nz = res & 0xff;
- v = 0;
- goto next;
-
- alu8:
- SET_B_REG (code->dst.reg, res);
- just_flags_alu8:
- n = res & 0x80;
- nz = res & 0xff;
- c = (res & 0x100);
- switch (code->opcode / 4)
- {
- case O_ADD:
- v = ((rd & 0x80) == (ea & 0x80)
- && (rd & 0x80) != (res & 0x80));
- break;
- case O_SUB:
- case O_CMP:
- v = ((rd & 0x80) != (-ea & 0x80)
- && (rd & 0x80) != (res & 0x80));
- break;
- case O_NEG:
- v = (rd == 0x80);
- break;
- }
- goto next;
-
- alu16:
- SET_W_REG (code->dst.reg, res);
- just_flags_alu16:
- n = res & 0x8000;
- nz = res & 0xffff;
- c = (res & 0x10000);
- switch (code->opcode / 4)
- {
- case O_ADD:
- v = ((rd & 0x8000) == (ea & 0x8000)
- && (rd & 0x8000) != (res & 0x8000));
- break;
- case O_SUB:
- case O_CMP:
- v = ((rd & 0x8000) != (-ea & 0x8000)
- && (rd & 0x8000) != (res & 0x8000));
- break;
- case O_NEG:
- v = (rd == 0x8000);
- break;
- }
- goto next;
-
- alu32:
- SET_L_REG (code->dst.reg, res);
- just_flags_alu32:
- n = res & 0x80000000;
- nz = res & 0xffffffff;
- switch (code->opcode / 4)
- {
- case O_ADD:
- v = ((rd & 0x80000000) == (ea & 0x80000000)
- && (rd & 0x80000000) != (res & 0x80000000));
- c = ((unsigned) res < (unsigned) rd) || ((unsigned) res < (unsigned) ea);
- break;
- case O_SUB:
- case O_CMP:
- v = ((rd & 0x80000000) != (-ea & 0x80000000)
- && (rd & 0x80000000) != (res & 0x80000000));
- c = (unsigned) rd < (unsigned) -ea;
- break;
- case O_NEG:
- v = (rd == 0x80000000);
- c = res != 0;
- break;
- }
- goto next;
-
- next:;
- pc = code->next_pc;
-
- end:
- ;
- /* if (cpu.regs[8] ) abort(); */
-
- if (--poll_count < 0)
- {
- poll_count = POLL_QUIT_INTERVAL;
- if ((*sim_callback->poll_quit) != NULL
- && (*sim_callback->poll_quit) (sim_callback))
- sim_stop (sd);
- }
-
- }
- while (cpu.state == SIM_STATE_RUNNING);
- cpu.ticks += get_now () - tick_start;
- cpu.cycles += cycles;
- cpu.insts += insts;
-
- cpu.pc = pc;
- BUILDSR ();
- cpu.mask = oldmask;
- signal (SIGINT, prev);
-}
-
-int
-sim_trace (sd)
- SIM_DESC sd;
-{
- /* FIXME: unfinished */
- abort ();
-}
-
-int
-sim_write (sd, addr, buffer, size)
- SIM_DESC sd;
- SIM_ADDR addr;
- unsigned char *buffer;
- int size;
-{
- int i;
-
- init_pointers ();
- if (addr < 0)
- return 0;
- for (i = 0; i < size; i++)
- {
- if (addr < memory_size)
- {
- cpu.memory[addr + i] = buffer[i];
- cpu.cache_idx[addr + i] = 0;
- }
- else
- cpu.eightbit[(addr + i) & 0xff] = buffer[i];
- }
- return size;
-}
-
-int
-sim_read (sd, addr, buffer, size)
- SIM_DESC sd;
- SIM_ADDR addr;
- unsigned char *buffer;
- int size;
-{
- init_pointers ();
- if (addr < 0)
- return 0;
- if (addr < memory_size)
- memcpy (buffer, cpu.memory + addr, size);
- else
- memcpy (buffer, cpu.eightbit + (addr & 0xff), size);
- return size;
-}
-
-
-#define R0_REGNUM 0
-#define R1_REGNUM 1
-#define R2_REGNUM 2
-#define R3_REGNUM 3
-#define R4_REGNUM 4
-#define R5_REGNUM 5
-#define R6_REGNUM 6
-#define R7_REGNUM 7
-
-#define SP_REGNUM R7_REGNUM /* Contains address of top of stack */
-#define FP_REGNUM R6_REGNUM /* Contains address of executing
- * stack frame */
-
-#define CCR_REGNUM 8 /* Contains processor status */
-#define PC_REGNUM 9 /* Contains program counter */
-
-#define CYCLE_REGNUM 10
-#define INST_REGNUM 11
-#define TICK_REGNUM 12
-
-
-int
-sim_store_register (sd, rn, value, length)
- SIM_DESC sd;
- int rn;
- unsigned char *value;
- int length;
-{
- int longval;
- int shortval;
- int intval;
- longval = (value[0] << 24) | (value[1] << 16) | (value[2] << 8) | value[3];
- shortval = (value[0] << 8) | (value[1]);
- intval = h8300hmode ? longval : shortval;
-
- init_pointers ();
- switch (rn)
- {
- case PC_REGNUM:
- cpu.pc = intval;
- break;
- default:
- abort ();
- case R0_REGNUM:
- case R1_REGNUM:
- case R2_REGNUM:
- case R3_REGNUM:
- case R4_REGNUM:
- case R5_REGNUM:
- case R6_REGNUM:
- case R7_REGNUM:
- cpu.regs[rn] = intval;
- break;
- case CCR_REGNUM:
- cpu.ccr = intval;
- break;
- case CYCLE_REGNUM:
- cpu.cycles = longval;
- break;
-
- case INST_REGNUM:
- cpu.insts = longval;
- break;
-
- case TICK_REGNUM:
- cpu.ticks = longval;
- break;
- }
- return -1;
-}
-
-int
-sim_fetch_register (sd, rn, buf, length)
- SIM_DESC sd;
- int rn;
- unsigned char *buf;
- int length;
-{
- int v;
- int longreg = 0;
-
- init_pointers ();
-
- switch (rn)
- {
- default:
- abort ();
- case 8:
- v = cpu.ccr;
- break;
- case 9:
- v = cpu.pc;
- break;
- case R0_REGNUM:
- case R1_REGNUM:
- case R2_REGNUM:
- case R3_REGNUM:
- case R4_REGNUM:
- case R5_REGNUM:
- case R6_REGNUM:
- case R7_REGNUM:
- v = cpu.regs[rn];
- break;
- case 10:
- v = cpu.cycles;
- longreg = 1;
- break;
- case 11:
- v = cpu.ticks;
- longreg = 1;
- break;
- case 12:
- v = cpu.insts;
- longreg = 1;
- break;
- }
- if (h8300hmode || longreg)
- {
- buf[0] = v >> 24;
- buf[1] = v >> 16;
- buf[2] = v >> 8;
- buf[3] = v >> 0;
- }
- else
- {
- buf[0] = v >> 8;
- buf[1] = v;
- }
- return -1;
-}
-
-void
-sim_stop_reason (sd, reason, sigrc)
- SIM_DESC sd;
- enum sim_stop *reason;
- int *sigrc;
-{
-#if 0 /* FIXME: This should work but we can't use it.
- grep for SLEEP above. */
- switch (cpu.state)
- {
- case SIM_STATE_EXITED : *reason = sim_exited; break;
- case SIM_STATE_SIGNALLED : *reason = sim_signalled; break;
- case SIM_STATE_STOPPED : *reason = sim_stopped; break;
- default : abort ();
- }
-#else
- *reason = sim_stopped;
-#endif
- *sigrc = cpu.exception;
-}
-
-/* FIXME: Rename to sim_set_mem_size. */
-
-void
-sim_size (n)
- int n;
-{
- /* Memory size is fixed. */
-}
-
-void
-sim_set_simcache_size (n)
-{
- if (cpu.cache)
- free (cpu.cache);
- if (n < 2)
- n = 2;
- cpu.cache = (decoded_inst *) malloc (sizeof (decoded_inst) * n);
- memset (cpu.cache, 0, sizeof (decoded_inst) * n);
- cpu.csize = n;
-}
-
-
-void
-sim_info (sd, verbose)
- SIM_DESC sd;
- int verbose;
-{
- double timetaken = (double) cpu.ticks / (double) now_persec ();
- double virttime = cpu.cycles / 10.0e6;
-
- (*sim_callback->printf_filtered) (sim_callback,
- "\n\n#instructions executed %10d\n",
- cpu.insts);
- (*sim_callback->printf_filtered) (sim_callback,
- "#cycles (v approximate) %10d\n",
- cpu.cycles);
- (*sim_callback->printf_filtered) (sim_callback,
- "#real time taken %10.4f\n",
- timetaken);
- (*sim_callback->printf_filtered) (sim_callback,
- "#virtual time taked %10.4f\n",
- virttime);
- if (timetaken != 0.0)
- (*sim_callback->printf_filtered) (sim_callback,
- "#simulation ratio %10.4f\n",
- virttime / timetaken);
- (*sim_callback->printf_filtered) (sim_callback,
- "#compiles %10d\n",
- cpu.compiles);
- (*sim_callback->printf_filtered) (sim_callback,
- "#cache size %10d\n",
- cpu.csize);
-
-#ifdef ADEBUG
- /* This to be conditional on `what' (aka `verbose'),
- however it was never passed as non-zero. */
- if (1)
- {
- int i;
- for (i = 0; i < O_LAST; i++)
- {
- if (cpu.stats[i])
- (*sim_callback->printf_filtered) (sim_callback,
- "%d: %d\n", i, cpu.stats[i]);
- }
- }
-#endif
-}
-
-/* Indicate whether the cpu is an h8/300 or h8/300h.
- FLAG is non-zero for the h8/300h. */
-
-void
-set_h8300h (flag)
- int flag;
-{
- /* FIXME: Much of the code in sim_load can be moved to sim_open.
- This function being replaced by a sim_open:ARGV configuration
- option */
- h8300hmode = flag;
-}
-
-SIM_DESC
-sim_open (kind, ptr, abfd, argv)
- SIM_OPEN_KIND kind;
- struct host_callback_struct *ptr;
- struct _bfd *abfd;
- char **argv;
-{
- /* FIXME: Much of the code in sim_load can be moved here */
-
- sim_kind = kind;
- myname = argv[0];
- sim_callback = ptr;
- /* fudge our descriptor */
- return (SIM_DESC) 1;
-}
-
-void
-sim_close (sd, quitting)
- SIM_DESC sd;
- int quitting;
-{
- /* nothing to do */
-}
-
-/* Called by gdb to load a program into memory. */
-
-SIM_RC
-sim_load (sd, prog, abfd, from_tty)
- SIM_DESC sd;
- char *prog;
- bfd *abfd;
- int from_tty;
-{
- bfd *prog_bfd;
-
- /* FIXME: The code below that sets a specific variant of the h8/300
- being simulated should be moved to sim_open(). */
-
- /* See if the file is for the h8/300 or h8/300h. */
- /* ??? This may not be the most efficient way. The z8k simulator
- does this via a different mechanism (INIT_EXTRA_SYMTAB_INFO). */
- if (abfd != NULL)
- prog_bfd = abfd;
- else
- prog_bfd = bfd_openr (prog, "coff-h8300");
- if (prog_bfd != NULL)
- {
- /* Set the cpu type. We ignore failure from bfd_check_format
- and bfd_openr as sim_load_file checks too. */
- if (bfd_check_format (prog_bfd, bfd_object))
- {
- unsigned long mach = bfd_get_mach (prog_bfd);
- set_h8300h (mach == bfd_mach_h8300h
- || mach == bfd_mach_h8300s);
- }
- }
-
- /* If we're using gdb attached to the simulator, then we have to
- reallocate memory for the simulator.
-
- When gdb first starts, it calls fetch_registers (among other
- functions), which in turn calls init_pointers, which allocates
- simulator memory.
-
- The problem is when we do that, we don't know whether we're
- debugging an h8/300 or h8/300h program.
-
- This is the first point at which we can make that determination,
- so we just reallocate memory now; this will also allow us to handle
- switching between h8/300 and h8/300h programs without exiting
- gdb. */
- if (h8300hmode)
- memory_size = H8300H_MSIZE;
- else
- memory_size = H8300_MSIZE;
-
- if (cpu.memory)
- free (cpu.memory);
- if (cpu.cache_idx)
- free (cpu.cache_idx);
- if (cpu.eightbit)
- free (cpu.eightbit);
-
- cpu.memory = (unsigned char *) calloc (sizeof (char), memory_size);
- cpu.cache_idx = (unsigned short *) calloc (sizeof (short), memory_size);
- cpu.eightbit = (unsigned char *) calloc (sizeof (char), 256);
-
- /* `msize' must be a power of two */
- if ((memory_size & (memory_size - 1)) != 0)
- abort ();
- cpu.mask = memory_size - 1;
-
- if (sim_load_file (sd, myname, sim_callback, prog, prog_bfd,
- sim_kind == SIM_OPEN_DEBUG,
- 0, sim_write)
- == NULL)
- {
- /* Close the bfd if we opened it. */
- if (abfd == NULL && prog_bfd != NULL)
- bfd_close (prog_bfd);
- return SIM_RC_FAIL;
- }
-
- /* Close the bfd if we opened it. */
- if (abfd == NULL && prog_bfd != NULL)
- bfd_close (prog_bfd);
- return SIM_RC_OK;
-}
-
-SIM_RC
-sim_create_inferior (sd, abfd, argv, env)
- SIM_DESC sd;
- struct _bfd *abfd;
- char **argv;
- char **env;
-{
- if (abfd != NULL)
- cpu.pc = bfd_get_start_address (abfd);
- else
- cpu.pc = 0;
- return SIM_RC_OK;
-}
-
-void
-sim_do_command (sd, cmd)
- SIM_DESC sd;
- char *cmd;
-{
- (*sim_callback->printf_filtered) (sim_callback,
- "This simulator does not accept any commands.\n");
-}
-
-void
-sim_set_callbacks (ptr)
- struct host_callback_struct *ptr;
-{
- sim_callback = ptr;
-}
diff --git a/sim/h8300/config.in b/sim/h8300/config.in
deleted file mode 100644
index 1f87a2bee4e..00000000000
--- a/sim/h8300/config.in
+++ /dev/null
@@ -1,158 +0,0 @@
-/* config.in. Generated automatically from configure.in by autoheader. */
-
-/* Define if using alloca.c. */
-#undef C_ALLOCA
-
-/* Define to empty if the keyword does not work. */
-#undef const
-
-/* Define to one of _getb67, GETB67, getb67 for Cray-2 and Cray-YMP systems.
- This function is required for alloca.c support on those systems. */
-#undef CRAY_STACKSEG_END
-
-/* Define if you have alloca, as a function or macro. */
-#undef HAVE_ALLOCA
-
-/* Define if you have <alloca.h> and it should be used (not on Ultrix). */
-#undef HAVE_ALLOCA_H
-
-/* Define if you have a working `mmap' system call. */
-#undef HAVE_MMAP
-
-/* Define as __inline if that's what the C compiler calls it. */
-#undef inline
-
-/* Define to `long' if <sys/types.h> doesn't define. */
-#undef off_t
-
-/* Define if you need to in order for stat and other things to work. */
-#undef _POSIX_SOURCE
-
-/* Define as the return type of signal handlers (int or void). */
-#undef RETSIGTYPE
-
-/* Define to `unsigned' if <sys/types.h> doesn't define. */
-#undef size_t
-
-/* If using the C implementation of alloca, define if you know the
- direction of stack growth for your system; otherwise it will be
- automatically deduced at run-time.
- STACK_DIRECTION > 0 => grows toward higher addresses
- STACK_DIRECTION < 0 => grows toward lower addresses
- STACK_DIRECTION = 0 => direction of growth unknown
- */
-#undef STACK_DIRECTION
-
-/* Define if you have the ANSI C header files. */
-#undef STDC_HEADERS
-
-/* Define to 1 if NLS is requested. */
-#undef ENABLE_NLS
-
-/* Define as 1 if you have gettext and don't want to use GNU gettext. */
-#undef HAVE_GETTEXT
-
-/* Define as 1 if you have the stpcpy function. */
-#undef HAVE_STPCPY
-
-/* Define if your locale.h file contains LC_MESSAGES. */
-#undef HAVE_LC_MESSAGES
-
-/* Define if you have the __argz_count function. */
-#undef HAVE___ARGZ_COUNT
-
-/* Define if you have the __argz_next function. */
-#undef HAVE___ARGZ_NEXT
-
-/* Define if you have the __argz_stringify function. */
-#undef HAVE___ARGZ_STRINGIFY
-
-/* Define if you have the __setfpucw function. */
-#undef HAVE___SETFPUCW
-
-/* Define if you have the dcgettext function. */
-#undef HAVE_DCGETTEXT
-
-/* Define if you have the getcwd function. */
-#undef HAVE_GETCWD
-
-/* Define if you have the getpagesize function. */
-#undef HAVE_GETPAGESIZE
-
-/* Define if you have the getrusage function. */
-#undef HAVE_GETRUSAGE
-
-/* Define if you have the munmap function. */
-#undef HAVE_MUNMAP
-
-/* Define if you have the putenv function. */
-#undef HAVE_PUTENV
-
-/* Define if you have the setenv function. */
-#undef HAVE_SETENV
-
-/* Define if you have the setlocale function. */
-#undef HAVE_SETLOCALE
-
-/* Define if you have the sigaction function. */
-#undef HAVE_SIGACTION
-
-/* Define if you have the stpcpy function. */
-#undef HAVE_STPCPY
-
-/* Define if you have the strcasecmp function. */
-#undef HAVE_STRCASECMP
-
-/* Define if you have the strchr function. */
-#undef HAVE_STRCHR
-
-/* Define if you have the time function. */
-#undef HAVE_TIME
-
-/* Define if you have the <argz.h> header file. */
-#undef HAVE_ARGZ_H
-
-/* Define if you have the <fcntl.h> header file. */
-#undef HAVE_FCNTL_H
-
-/* Define if you have the <fpu_control.h> header file. */
-#undef HAVE_FPU_CONTROL_H
-
-/* Define if you have the <limits.h> header file. */
-#undef HAVE_LIMITS_H
-
-/* Define if you have the <locale.h> header file. */
-#undef HAVE_LOCALE_H
-
-/* Define if you have the <malloc.h> header file. */
-#undef HAVE_MALLOC_H
-
-/* Define if you have the <nl_types.h> header file. */
-#undef HAVE_NL_TYPES_H
-
-/* Define if you have the <stdlib.h> header file. */
-#undef HAVE_STDLIB_H
-
-/* Define if you have the <string.h> header file. */
-#undef HAVE_STRING_H
-
-/* Define if you have the <strings.h> header file. */
-#undef HAVE_STRINGS_H
-
-/* Define if you have the <sys/param.h> header file. */
-#undef HAVE_SYS_PARAM_H
-
-/* Define if you have the <sys/resource.h> header file. */
-#undef HAVE_SYS_RESOURCE_H
-
-/* Define if you have the <sys/time.h> header file. */
-#undef HAVE_SYS_TIME_H
-
-/* Define if you have the <time.h> header file. */
-#undef HAVE_TIME_H
-
-/* Define if you have the <unistd.h> header file. */
-#undef HAVE_UNISTD_H
-
-/* Define if you have the <values.h> header file. */
-#undef HAVE_VALUES_H
diff --git a/sim/h8300/configure b/sim/h8300/configure
deleted file mode 100755
index 2ab6b755d1d..00000000000
--- a/sim/h8300/configure
+++ /dev/null
@@ -1,4024 +0,0 @@
-#! /bin/sh
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-sim_inline="-DDEFAULT_INLINE=0"
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-# This file is derived from `gettext.m4'. The difference is that the
-# included macros assume Cygnus-style source and build trees.
-
-# Macro to add for using GNU gettext.
-# Ulrich Drepper <drepper@cygnus.com>, 1995.
-#
-# This file file be copied and used freely without restrictions. It can
-# be used in projects which are not available under the GNU Public License
-# but which still want to provide support for the GNU gettext functionality.
-# Please note that the actual code is *not* freely available.
-
-# serial 3
-
-
-
-
-
-# Search path for a program which passes the given test.
-# Ulrich Drepper <drepper@cygnus.com>, 1996.
-#
-# This file file be copied and used freely without restrictions. It can
-# be used in projects which are not available under the GNU Public License
-# but which still want to provide support for the GNU gettext functionality.
-# Please note that the actual code is *not* freely available.
-
-# serial 1
-
-
-
-# Check whether LC_MESSAGES is available in <locale.h>.
-# Ulrich Drepper <drepper@cygnus.com>, 1995.
-#
-# This file file be copied and used freely without restrictions. It can
-# be used in projects which are not available under the GNU Public License
-# but which still want to provide support for the GNU gettext functionality.
-# Please note that the actual code is *not* freely available.
-
-# serial 1
-
-
-
-
-
-
-# Guess values for system-dependent variables and create Makefiles.
-# Generated automatically using autoconf version 2.13
-# Copyright (C) 1992, 93, 94, 95, 96 Free Software Foundation, Inc.
-#
-# This configure script is free software; the Free Software Foundation
-# gives unlimited permission to copy, distribute and modify it.
-
-# Defaults:
-ac_help=
-ac_default_prefix=/usr/local
-# Any additions from configure.in:
-ac_help="$ac_help
- --disable-nls do not use Native Language Support"
-ac_help="$ac_help
- --with-included-gettext use the GNU gettext library included here"
-ac_help="$ac_help
- --enable-maintainer-mode Enable developer functionality."
-ac_help="$ac_help
- --enable-sim-bswap Use Host specific BSWAP instruction."
-ac_help="$ac_help
- --enable-sim-cflags=opts Extra CFLAGS for use in building simulator"
-ac_help="$ac_help
- --enable-sim-debug=opts Enable debugging flags"
-ac_help="$ac_help
- --enable-sim-stdio Specify whether to use stdio for console input/output."
-ac_help="$ac_help
- --enable-sim-trace=opts Enable tracing flags"
-ac_help="$ac_help
- --enable-sim-profile=opts Enable profiling flags"
-
-# Initialize some variables set by options.
-# The variables have the same names as the options, with
-# dashes changed to underlines.
-build=NONE
-cache_file=./config.cache
-exec_prefix=NONE
-host=NONE
-no_create=
-nonopt=NONE
-no_recursion=
-prefix=NONE
-program_prefix=NONE
-program_suffix=NONE
-program_transform_name=s,x,x,
-silent=
-site=
-sitefile=
-srcdir=
-target=NONE
-verbose=
-x_includes=NONE
-x_libraries=NONE
-bindir='${exec_prefix}/bin'
-sbindir='${exec_prefix}/sbin'
-libexecdir='${exec_prefix}/libexec'
-datadir='${prefix}/share'
-sysconfdir='${prefix}/etc'
-sharedstatedir='${prefix}/com'
-localstatedir='${prefix}/var'
-libdir='${exec_prefix}/lib'
-includedir='${prefix}/include'
-oldincludedir='/usr/include'
-infodir='${prefix}/info'
-mandir='${prefix}/man'
-
-# Initialize some other variables.
-subdirs=
-MFLAGS= MAKEFLAGS=
-SHELL=${CONFIG_SHELL-/bin/sh}
-# Maximum number of lines to put in a shell here document.
-ac_max_here_lines=12
-
-ac_prev=
-for ac_option
-do
-
- # If the previous option needs an argument, assign it.
- if test -n "$ac_prev"; then
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- ac_prev=
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- fi
-
- case "$ac_option" in
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- *) ac_optarg= ;;
- esac
-
- # Accept the important Cygnus configure options, so we can diagnose typos.
-
- case "$ac_option" in
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-}
-{ /* Someone thinks the Sun supposedly-ANSI compiler will reject this. */
- int x[] = {25, 17};
- const int *foo = &x[0];
- ++foo;
-}
-{ /* Sun SC1.0 ANSI compiler rejects this -- but not the above. */
- typedef const int *iptr;
- iptr p = 0;
- ++p;
-}
-{ /* AIX XL C 1.02.0.0 rejects this saying
- "k.c", line 2.27: 1506-025 (S) Operand must be a modifiable lvalue. */
- struct s { int j; const int *ap[3]; };
- struct s *b; b->j = 5;
-}
-{ /* ULTRIX-32 V3.1 (Rev 9) vcc rejects this */
- const int foo = 10;
-}
-
-; return 0; }
-EOF
-if { (eval echo configure:965: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
- rm -rf conftest*
- ac_cv_c_const=yes
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- ac_cv_c_const=no
-fi
-rm -f conftest*
-fi
-
-echo "$ac_t""$ac_cv_c_const" 1>&6
-if test $ac_cv_c_const = no; then
- cat >> confdefs.h <<\EOF
-#define const
-EOF
-
-fi
-
-echo $ac_n "checking for inline""... $ac_c" 1>&6
-echo "configure:986: checking for inline" >&5
-if eval "test \"`echo '$''{'ac_cv_c_inline'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- ac_cv_c_inline=no
-for ac_kw in inline __inline__ __inline; do
- cat > conftest.$ac_ext <<EOF
-#line 993 "configure"
-#include "confdefs.h"
-
-int main() {
-} $ac_kw foo() {
-; return 0; }
-EOF
-if { (eval echo configure:1000: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
- rm -rf conftest*
- ac_cv_c_inline=$ac_kw; break
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
-fi
-rm -f conftest*
-done
-
-fi
-
-echo "$ac_t""$ac_cv_c_inline" 1>&6
-case "$ac_cv_c_inline" in
- inline | yes) ;;
- no) cat >> confdefs.h <<\EOF
-#define inline
-EOF
- ;;
- *) cat >> confdefs.h <<EOF
-#define inline $ac_cv_c_inline
-EOF
- ;;
-esac
-
-echo $ac_n "checking for off_t""... $ac_c" 1>&6
-echo "configure:1026: checking for off_t" >&5
-if eval "test \"`echo '$''{'ac_cv_type_off_t'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1031 "configure"
-#include "confdefs.h"
-#include <sys/types.h>
-#if STDC_HEADERS
-#include <stdlib.h>
-#include <stddef.h>
-#endif
-EOF
-if (eval "$ac_cpp conftest.$ac_ext") 2>&5 |
- egrep "(^|[^a-zA-Z_0-9])off_t[^a-zA-Z_0-9]" >/dev/null 2>&1; then
- rm -rf conftest*
- ac_cv_type_off_t=yes
-else
- rm -rf conftest*
- ac_cv_type_off_t=no
-fi
-rm -f conftest*
-
-fi
-echo "$ac_t""$ac_cv_type_off_t" 1>&6
-if test $ac_cv_type_off_t = no; then
- cat >> confdefs.h <<\EOF
-#define off_t long
-EOF
-
-fi
-
-echo $ac_n "checking for size_t""... $ac_c" 1>&6
-echo "configure:1059: checking for size_t" >&5
-if eval "test \"`echo '$''{'ac_cv_type_size_t'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1064 "configure"
-#include "confdefs.h"
-#include <sys/types.h>
-#if STDC_HEADERS
-#include <stdlib.h>
-#include <stddef.h>
-#endif
-EOF
-if (eval "$ac_cpp conftest.$ac_ext") 2>&5 |
- egrep "(^|[^a-zA-Z_0-9])size_t[^a-zA-Z_0-9]" >/dev/null 2>&1; then
- rm -rf conftest*
- ac_cv_type_size_t=yes
-else
- rm -rf conftest*
- ac_cv_type_size_t=no
-fi
-rm -f conftest*
-
-fi
-echo "$ac_t""$ac_cv_type_size_t" 1>&6
-if test $ac_cv_type_size_t = no; then
- cat >> confdefs.h <<\EOF
-#define size_t unsigned
-EOF
-
-fi
-
-# The Ultrix 4.2 mips builtin alloca declared by alloca.h only works
-# for constant arguments. Useless!
-echo $ac_n "checking for working alloca.h""... $ac_c" 1>&6
-echo "configure:1094: checking for working alloca.h" >&5
-if eval "test \"`echo '$''{'ac_cv_header_alloca_h'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1099 "configure"
-#include "confdefs.h"
-#include <alloca.h>
-int main() {
-char *p = alloca(2 * sizeof(int));
-; return 0; }
-EOF
-if { (eval echo configure:1106: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- rm -rf conftest*
- ac_cv_header_alloca_h=yes
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- ac_cv_header_alloca_h=no
-fi
-rm -f conftest*
-fi
-
-echo "$ac_t""$ac_cv_header_alloca_h" 1>&6
-if test $ac_cv_header_alloca_h = yes; then
- cat >> confdefs.h <<\EOF
-#define HAVE_ALLOCA_H 1
-EOF
-
-fi
-
-echo $ac_n "checking for alloca""... $ac_c" 1>&6
-echo "configure:1127: checking for alloca" >&5
-if eval "test \"`echo '$''{'ac_cv_func_alloca_works'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1132 "configure"
-#include "confdefs.h"
-
-#ifdef __GNUC__
-# define alloca __builtin_alloca
-#else
-# ifdef _MSC_VER
-# include <malloc.h>
-# define alloca _alloca
-# else
-# if HAVE_ALLOCA_H
-# include <alloca.h>
-# else
-# ifdef _AIX
- #pragma alloca
-# else
-# ifndef alloca /* predefined by HP cc +Olibcalls */
-char *alloca ();
-# endif
-# endif
-# endif
-# endif
-#endif
-
-int main() {
-char *p = (char *) alloca(1);
-; return 0; }
-EOF
-if { (eval echo configure:1160: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- rm -rf conftest*
- ac_cv_func_alloca_works=yes
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- ac_cv_func_alloca_works=no
-fi
-rm -f conftest*
-fi
-
-echo "$ac_t""$ac_cv_func_alloca_works" 1>&6
-if test $ac_cv_func_alloca_works = yes; then
- cat >> confdefs.h <<\EOF
-#define HAVE_ALLOCA 1
-EOF
-
-fi
-
-if test $ac_cv_func_alloca_works = no; then
- # The SVR3 libPW and SVR4 libucb both contain incompatible functions
- # that cause trouble. Some versions do not even contain alloca or
- # contain a buggy version. If you still want to use their alloca,
- # use ar to extract alloca.o from them instead of compiling alloca.c.
- ALLOCA=alloca.${ac_objext}
- cat >> confdefs.h <<\EOF
-#define C_ALLOCA 1
-EOF
-
-
-echo $ac_n "checking whether alloca needs Cray hooks""... $ac_c" 1>&6
-echo "configure:1192: checking whether alloca needs Cray hooks" >&5
-if eval "test \"`echo '$''{'ac_cv_os_cray'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1197 "configure"
-#include "confdefs.h"
-#if defined(CRAY) && ! defined(CRAY2)
-webecray
-#else
-wenotbecray
-#endif
-
-EOF
-if (eval "$ac_cpp conftest.$ac_ext") 2>&5 |
- egrep "webecray" >/dev/null 2>&1; then
- rm -rf conftest*
- ac_cv_os_cray=yes
-else
- rm -rf conftest*
- ac_cv_os_cray=no
-fi
-rm -f conftest*
-
-fi
-
-echo "$ac_t""$ac_cv_os_cray" 1>&6
-if test $ac_cv_os_cray = yes; then
-for ac_func in _getb67 GETB67 getb67; do
- echo $ac_n "checking for $ac_func""... $ac_c" 1>&6
-echo "configure:1222: checking for $ac_func" >&5
-if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1227 "configure"
-#include "confdefs.h"
-/* System header to define __stub macros and hopefully few prototypes,
- which can conflict with char $ac_func(); below. */
-#include <assert.h>
-/* Override any gcc2 internal prototype to avoid an error. */
-/* We use char because int might match the return type of a gcc2
- builtin and then its argument prototype would still apply. */
-char $ac_func();
-
-int main() {
-
-/* The GNU C library defines this for functions which it implements
- to always fail with ENOSYS. Some functions are actually named
- something starting with __ and the normal name is an alias. */
-#if defined (__stub_$ac_func) || defined (__stub___$ac_func)
-choke me
-#else
-$ac_func();
-#endif
-
-; return 0; }
-EOF
-if { (eval echo configure:1250: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=yes"
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=no"
-fi
-rm -f conftest*
-fi
-
-if eval "test \"`echo '$ac_cv_func_'$ac_func`\" = yes"; then
- echo "$ac_t""yes" 1>&6
- cat >> confdefs.h <<EOF
-#define CRAY_STACKSEG_END $ac_func
-EOF
-
- break
-else
- echo "$ac_t""no" 1>&6
-fi
-
-done
-fi
-
-echo $ac_n "checking stack direction for C alloca""... $ac_c" 1>&6
-echo "configure:1277: checking stack direction for C alloca" >&5
-if eval "test \"`echo '$''{'ac_cv_c_stack_direction'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- if test "$cross_compiling" = yes; then
- ac_cv_c_stack_direction=0
-else
- cat > conftest.$ac_ext <<EOF
-#line 1285 "configure"
-#include "confdefs.h"
-find_stack_direction ()
-{
- static char *addr = 0;
- auto char dummy;
- if (addr == 0)
- {
- addr = &dummy;
- return find_stack_direction ();
- }
- else
- return (&dummy > addr) ? 1 : -1;
-}
-main ()
-{
- exit (find_stack_direction() < 0);
-}
-EOF
-if { (eval echo configure:1304: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null
-then
- ac_cv_c_stack_direction=1
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -fr conftest*
- ac_cv_c_stack_direction=-1
-fi
-rm -fr conftest*
-fi
-
-fi
-
-echo "$ac_t""$ac_cv_c_stack_direction" 1>&6
-cat >> confdefs.h <<EOF
-#define STACK_DIRECTION $ac_cv_c_stack_direction
-EOF
-
-fi
-
-for ac_hdr in unistd.h
-do
-ac_safe=`echo "$ac_hdr" | sed 'y%./+-%__p_%'`
-echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6
-echo "configure:1329: checking for $ac_hdr" >&5
-if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1334 "configure"
-#include "confdefs.h"
-#include <$ac_hdr>
-EOF
-ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:1339: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
-ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
-if test -z "$ac_err"; then
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=yes"
-else
- echo "$ac_err" >&5
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=no"
-fi
-rm -f conftest*
-fi
-if eval "test \"`echo '$ac_cv_header_'$ac_safe`\" = yes"; then
- echo "$ac_t""yes" 1>&6
- ac_tr_hdr=HAVE_`echo $ac_hdr | sed 'y%abcdefghijklmnopqrstuvwxyz./-%ABCDEFGHIJKLMNOPQRSTUVWXYZ___%'`
- cat >> confdefs.h <<EOF
-#define $ac_tr_hdr 1
-EOF
-
-else
- echo "$ac_t""no" 1>&6
-fi
-done
-
-for ac_func in getpagesize
-do
-echo $ac_n "checking for $ac_func""... $ac_c" 1>&6
-echo "configure:1368: checking for $ac_func" >&5
-if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1373 "configure"
-#include "confdefs.h"
-/* System header to define __stub macros and hopefully few prototypes,
- which can conflict with char $ac_func(); below. */
-#include <assert.h>
-/* Override any gcc2 internal prototype to avoid an error. */
-/* We use char because int might match the return type of a gcc2
- builtin and then its argument prototype would still apply. */
-char $ac_func();
-
-int main() {
-
-/* The GNU C library defines this for functions which it implements
- to always fail with ENOSYS. Some functions are actually named
- something starting with __ and the normal name is an alias. */
-#if defined (__stub_$ac_func) || defined (__stub___$ac_func)
-choke me
-#else
-$ac_func();
-#endif
-
-; return 0; }
-EOF
-if { (eval echo configure:1396: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=yes"
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=no"
-fi
-rm -f conftest*
-fi
-
-if eval "test \"`echo '$ac_cv_func_'$ac_func`\" = yes"; then
- echo "$ac_t""yes" 1>&6
- ac_tr_func=HAVE_`echo $ac_func | tr 'abcdefghijklmnopqrstuvwxyz' 'ABCDEFGHIJKLMNOPQRSTUVWXYZ'`
- cat >> confdefs.h <<EOF
-#define $ac_tr_func 1
-EOF
-
-else
- echo "$ac_t""no" 1>&6
-fi
-done
-
-echo $ac_n "checking for working mmap""... $ac_c" 1>&6
-echo "configure:1421: checking for working mmap" >&5
-if eval "test \"`echo '$''{'ac_cv_func_mmap_fixed_mapped'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- if test "$cross_compiling" = yes; then
- ac_cv_func_mmap_fixed_mapped=no
-else
- cat > conftest.$ac_ext <<EOF
-#line 1429 "configure"
-#include "confdefs.h"
-
-/* Thanks to Mike Haertel and Jim Avera for this test.
- Here is a matrix of mmap possibilities:
- mmap private not fixed
- mmap private fixed at somewhere currently unmapped
- mmap private fixed at somewhere already mapped
- mmap shared not fixed
- mmap shared fixed at somewhere currently unmapped
- mmap shared fixed at somewhere already mapped
- For private mappings, we should verify that changes cannot be read()
- back from the file, nor mmap's back from the file at a different
- address. (There have been systems where private was not correctly
- implemented like the infamous i386 svr4.0, and systems where the
- VM page cache was not coherent with the filesystem buffer cache
- like early versions of FreeBSD and possibly contemporary NetBSD.)
- For shared mappings, we should conversely verify that changes get
- propogated back to all the places they're supposed to be.
-
- Grep wants private fixed already mapped.
- The main things grep needs to know about mmap are:
- * does it exist and is it safe to write into the mmap'd area
- * how to use it (BSD variants) */
-#include <sys/types.h>
-#include <fcntl.h>
-#include <sys/mman.h>
-
-/* This mess was copied from the GNU getpagesize.h. */
-#ifndef HAVE_GETPAGESIZE
-# ifdef HAVE_UNISTD_H
-# include <unistd.h>
-# endif
-
-/* Assume that all systems that can run configure have sys/param.h. */
-# ifndef HAVE_SYS_PARAM_H
-# define HAVE_SYS_PARAM_H 1
-# endif
-
-# ifdef _SC_PAGESIZE
-# define getpagesize() sysconf(_SC_PAGESIZE)
-# else /* no _SC_PAGESIZE */
-# ifdef HAVE_SYS_PARAM_H
-# include <sys/param.h>
-# ifdef EXEC_PAGESIZE
-# define getpagesize() EXEC_PAGESIZE
-# else /* no EXEC_PAGESIZE */
-# ifdef NBPG
-# define getpagesize() NBPG * CLSIZE
-# ifndef CLSIZE
-# define CLSIZE 1
-# endif /* no CLSIZE */
-# else /* no NBPG */
-# ifdef NBPC
-# define getpagesize() NBPC
-# else /* no NBPC */
-# ifdef PAGESIZE
-# define getpagesize() PAGESIZE
-# endif /* PAGESIZE */
-# endif /* no NBPC */
-# endif /* no NBPG */
-# endif /* no EXEC_PAGESIZE */
-# else /* no HAVE_SYS_PARAM_H */
-# define getpagesize() 8192 /* punt totally */
-# endif /* no HAVE_SYS_PARAM_H */
-# endif /* no _SC_PAGESIZE */
-
-#endif /* no HAVE_GETPAGESIZE */
-
-#ifdef __cplusplus
-extern "C" { void *malloc(unsigned); }
-#else
-char *malloc();
-#endif
-
-int
-main()
-{
- char *data, *data2, *data3;
- int i, pagesize;
- int fd;
-
- pagesize = getpagesize();
-
- /*
- * First, make a file with some known garbage in it.
- */
- data = malloc(pagesize);
- if (!data)
- exit(1);
- for (i = 0; i < pagesize; ++i)
- *(data + i) = rand();
- umask(0);
- fd = creat("conftestmmap", 0600);
- if (fd < 0)
- exit(1);
- if (write(fd, data, pagesize) != pagesize)
- exit(1);
- close(fd);
-
- /*
- * Next, try to mmap the file at a fixed address which
- * already has something else allocated at it. If we can,
- * also make sure that we see the same garbage.
- */
- fd = open("conftestmmap", O_RDWR);
- if (fd < 0)
- exit(1);
- data2 = malloc(2 * pagesize);
- if (!data2)
- exit(1);
- data2 += (pagesize - ((int) data2 & (pagesize - 1))) & (pagesize - 1);
- if (data2 != mmap(data2, pagesize, PROT_READ | PROT_WRITE,
- MAP_PRIVATE | MAP_FIXED, fd, 0L))
- exit(1);
- for (i = 0; i < pagesize; ++i)
- if (*(data + i) != *(data2 + i))
- exit(1);
-
- /*
- * Finally, make sure that changes to the mapped area
- * do not percolate back to the file as seen by read().
- * (This is a bug on some variants of i386 svr4.0.)
- */
- for (i = 0; i < pagesize; ++i)
- *(data2 + i) = *(data2 + i) + 1;
- data3 = malloc(pagesize);
- if (!data3)
- exit(1);
- if (read(fd, data3, pagesize) != pagesize)
- exit(1);
- for (i = 0; i < pagesize; ++i)
- if (*(data + i) != *(data3 + i))
- exit(1);
- close(fd);
- unlink("conftestmmap");
- exit(0);
-}
-
-EOF
-if { (eval echo configure:1569: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null
-then
- ac_cv_func_mmap_fixed_mapped=yes
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -fr conftest*
- ac_cv_func_mmap_fixed_mapped=no
-fi
-rm -fr conftest*
-fi
-
-fi
-
-echo "$ac_t""$ac_cv_func_mmap_fixed_mapped" 1>&6
-if test $ac_cv_func_mmap_fixed_mapped = yes; then
- cat >> confdefs.h <<\EOF
-#define HAVE_MMAP 1
-EOF
-
-fi
-
-echo $ac_n "checking for Cygwin environment""... $ac_c" 1>&6
-echo "configure:1592: checking for Cygwin environment" >&5
-if eval "test \"`echo '$''{'ac_cv_cygwin'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1597 "configure"
-#include "confdefs.h"
-
-int main() {
-
-#ifndef __CYGWIN__
-#define __CYGWIN__ __CYGWIN32__
-#endif
-return __CYGWIN__;
-; return 0; }
-EOF
-if { (eval echo configure:1608: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
- rm -rf conftest*
- ac_cv_cygwin=yes
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- ac_cv_cygwin=no
-fi
-rm -f conftest*
-rm -f conftest*
-fi
-
-echo "$ac_t""$ac_cv_cygwin" 1>&6
-CYGWIN=
-test "$ac_cv_cygwin" = yes && CYGWIN=yes
-echo $ac_n "checking for mingw32 environment""... $ac_c" 1>&6
-echo "configure:1625: checking for mingw32 environment" >&5
-if eval "test \"`echo '$''{'ac_cv_mingw32'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1630 "configure"
-#include "confdefs.h"
-
-int main() {
-return __MINGW32__;
-; return 0; }
-EOF
-if { (eval echo configure:1637: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
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- ac_cv_mingw32=yes
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- ac_cv_mingw32=no
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-rm -f conftest*
-rm -f conftest*
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-
-echo "$ac_t""$ac_cv_mingw32" 1>&6
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-
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-
-ac_aux_dir=
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- ac_install_sh="$ac_aux_dir/install.sh -c"
- break
- fi
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-if test -z "$ac_aux_dir"; then
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-fi
-ac_config_guess=$ac_aux_dir/config.guess
-ac_config_sub=$ac_aux_dir/config.sub
-ac_configure=$ac_aux_dir/configure # This should be Cygnus configure.
-
-
-# Do some error checking and defaulting for the host and target type.
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-#
-# The rules are:
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-# 2. Host defaults to nonopt.
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-# 4. Target and build default to nonopt.
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-
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-esac
-
-
-# Make sure we can run config.sub.
-if ${CONFIG_SHELL-/bin/sh} $ac_config_sub sun4 >/dev/null 2>&1; then :
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-
-echo $ac_n "checking host system type""... $ac_c" 1>&6
-echo "configure:1704: checking host system type" >&5
-
-host_alias=$host
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- if host_alias=`${CONFIG_SHELL-/bin/sh} $ac_config_guess`; then :
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- fi ;;
- *) host_alias=$nonopt ;;
- esac ;;
-esac
-
-host=`${CONFIG_SHELL-/bin/sh} $ac_config_sub $host_alias`
-host_cpu=`echo $host | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\1/'`
-host_vendor=`echo $host | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\2/'`
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-echo "$ac_t""$host" 1>&6
-
-echo $ac_n "checking target system type""... $ac_c" 1>&6
-echo "configure:1725: checking target system type" >&5
-
-target_alias=$target
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- case $nonopt in
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- *) target_alias=$nonopt ;;
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-esac
-
-target=`${CONFIG_SHELL-/bin/sh} $ac_config_sub $target_alias`
-target_cpu=`echo $target | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\1/'`
-target_vendor=`echo $target | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\2/'`
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-
-echo $ac_n "checking build system type""... $ac_c" 1>&6
-echo "configure:1743: checking build system type" >&5
-
-build_alias=$build
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- *) build_alias=$nonopt ;;
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-
-build=`${CONFIG_SHELL-/bin/sh} $ac_config_sub $build_alias`
-build_cpu=`echo $build | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\1/'`
-build_vendor=`echo $build | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\2/'`
-build_os=`echo $build | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\3/'`
-echo "$ac_t""$build" 1>&6
-
-test "$host_alias" != "$target_alias" &&
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- program_transform_name="`echo $program_transform_name|sed -f conftestsed`"
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-
-# sed with no file args requires a program.
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-
-# Extract the first word of "gcc", so it can be a program name with args.
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-echo "configure:1787: checking for $ac_word" >&5
-if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then
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-else
- if test -n "$CC"; then
- ac_cv_prog_CC="$CC" # Let the user override the test.
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- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
- ac_dummy="$PATH"
- for ac_dir in $ac_dummy; do
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- IFS="$ac_save_ifs"
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-if test -n "$CC"; then
- echo "$ac_t""$CC" 1>&6
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- echo "$ac_t""no" 1>&6
-fi
-
-if test -z "$CC"; then
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- if test -n "$CC"; then
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- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
- ac_prog_rejected=no
- ac_dummy="$PATH"
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- ac_prog_rejected=yes
- continue
- fi
- ac_cv_prog_CC="cc"
- break
- fi
- done
- IFS="$ac_save_ifs"
-if test $ac_prog_rejected = yes; then
- # We found a bogon in the path, so make sure we never use it.
- set dummy $ac_cv_prog_CC
- shift
- if test $# -gt 0; then
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- # first if we set CC to just the basename; use the full file name.
- shift
- set dummy "$ac_dir/$ac_word" "$@"
- shift
- ac_cv_prog_CC="$@"
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-fi
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-if test -n "$CC"; then
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-else
- echo "$ac_t""no" 1>&6
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-
- if test -z "$CC"; then
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-echo "configure:1868: checking for $ac_word" >&5
-if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- if test -n "$CC"; then
- ac_cv_prog_CC="$CC" # Let the user override the test.
-else
- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
- ac_dummy="$PATH"
- for ac_dir in $ac_dummy; do
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- if test -f $ac_dir/$ac_word; then
- ac_cv_prog_CC="cl"
- break
- fi
- done
- IFS="$ac_save_ifs"
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-CC="$ac_cv_prog_CC"
-if test -n "$CC"; then
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-else
- echo "$ac_t""no" 1>&6
-fi
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-
-echo $ac_n "checking whether the C compiler ($CC $CFLAGS $LDFLAGS) works""... $ac_c" 1>&6
-echo "configure:1900: checking whether the C compiler ($CC $CFLAGS $LDFLAGS) works" >&5
-
-ac_ext=c
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-ac_link='${CC-cc} -o conftest${ac_exeext} $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS 1>&5'
-cross_compiling=$ac_cv_prog_cc_cross
-
-cat > conftest.$ac_ext << EOF
-
-#line 1911 "configure"
-#include "confdefs.h"
-
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- ac_cv_prog_cc_works=yes
- # If we can't run a trivial program, we are probably using a cross compiler.
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- else
- ac_cv_prog_cc_cross=yes
- fi
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- ac_cv_prog_cc_works=no
-fi
-rm -fr conftest*
-ac_ext=c
-# CFLAGS is not in ac_cpp because -g, -O, etc. are not valid cpp options.
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-ac_compile='${CC-cc} -c $CFLAGS $CPPFLAGS conftest.$ac_ext 1>&5'
-ac_link='${CC-cc} -o conftest${ac_exeext} $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS 1>&5'
-cross_compiling=$ac_cv_prog_cc_cross
-
-echo "$ac_t""$ac_cv_prog_cc_works" 1>&6
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-echo $ac_n "checking whether the C compiler ($CC $CFLAGS $LDFLAGS) is a cross-compiler""... $ac_c" 1>&6
-echo "configure:1942: checking whether the C compiler ($CC $CFLAGS $LDFLAGS) is a cross-compiler" >&5
-echo "$ac_t""$ac_cv_prog_cc_cross" 1>&6
-cross_compiling=$ac_cv_prog_cc_cross
-
-echo $ac_n "checking whether we are using GNU C""... $ac_c" 1>&6
-echo "configure:1947: checking whether we are using GNU C" >&5
-if eval "test \"`echo '$''{'ac_cv_prog_gcc'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.c <<EOF
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- yes;
-#endif
-EOF
-if { ac_try='${CC-cc} -E conftest.c'; { (eval echo configure:1956: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }; } | egrep yes >/dev/null 2>&1; then
- ac_cv_prog_gcc=yes
-else
- ac_cv_prog_gcc=no
-fi
-fi
-
-echo "$ac_t""$ac_cv_prog_gcc" 1>&6
-
-if test $ac_cv_prog_gcc = yes; then
- GCC=yes
-else
- GCC=
-fi
-
-ac_test_CFLAGS="${CFLAGS+set}"
-ac_save_CFLAGS="$CFLAGS"
-CFLAGS=
-echo $ac_n "checking whether ${CC-cc} accepts -g""... $ac_c" 1>&6
-echo "configure:1975: checking whether ${CC-cc} accepts -g" >&5
-if eval "test \"`echo '$''{'ac_cv_prog_cc_g'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- echo 'void f(){}' > conftest.c
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-else
- ac_cv_prog_cc_g=no
-fi
-rm -f conftest*
-
-fi
-
-echo "$ac_t""$ac_cv_prog_cc_g" 1>&6
-if test "$ac_test_CFLAGS" = set; then
- CFLAGS="$ac_save_CFLAGS"
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- if test "$GCC" = yes; then
- CFLAGS="-g -O2"
- else
- CFLAGS="-g"
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- if test "$GCC" = yes; then
- CFLAGS="-O2"
- else
- CFLAGS=
- fi
-fi
-
-# Find a good install program. We prefer a C program (faster),
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-# incompatible versions:
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-# SunOS /usr/etc/install
-# IRIX /sbin/install
-# AIX /bin/install
-# AIX 4 /usr/bin/installbsd, which doesn't work without a -g flag
-# AFS /usr/afsws/bin/install, which mishandles nonexistent args
-# SVR4 /usr/ucb/install, which tries to use the nonexistent group "staff"
-# ./install, which can be erroneously created by make from ./install.sh.
-echo $ac_n "checking for a BSD compatible install""... $ac_c" 1>&6
-echo "configure:2018: checking for a BSD compatible install" >&5
-if test -z "$INSTALL"; then
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- echo $ac_n "(cached) $ac_c" 1>&6
-else
- IFS="${IFS= }"; ac_save_IFS="$IFS"; IFS=":"
- for ac_dir in $PATH; do
- # Account for people who put trailing slashes in PATH elements.
- case "$ac_dir/" in
- /|./|.//|/etc/*|/usr/sbin/*|/usr/etc/*|/sbin/*|/usr/afsws/bin/*|/usr/ucb/*) ;;
- *)
- # OSF1 and SCO ODT 3.0 have their own names for install.
- # Don't use installbsd from OSF since it installs stuff as root
- # by default.
- for ac_prog in ginstall scoinst install; do
- if test -f $ac_dir/$ac_prog; then
- if test $ac_prog = install &&
- grep dspmsg $ac_dir/$ac_prog >/dev/null 2>&1; then
- # AIX install. It has an incompatible calling convention.
- :
- else
- ac_cv_path_install="$ac_dir/$ac_prog -c"
- break 2
- fi
- fi
- done
- ;;
- esac
- done
- IFS="$ac_save_IFS"
-
-fi
- if test "${ac_cv_path_install+set}" = set; then
- INSTALL="$ac_cv_path_install"
- else
- # As a last resort, use the slow shell script. We don't cache a
- # path for INSTALL within a source directory, because that will
- # break other packages using the cache if that directory is
- # removed, or if the path is relative.
- INSTALL="$ac_install_sh"
- fi
-fi
-echo "$ac_t""$INSTALL" 1>&6
-
-# Use test -z because SunOS4 sh mishandles braces in ${var-val}.
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-
-test -z "$INSTALL_SCRIPT" && INSTALL_SCRIPT='${INSTALL_PROGRAM}'
-
-test -z "$INSTALL_DATA" && INSTALL_DATA='${INSTALL} -m 644'
-
-
-# Put a plausible default for CC_FOR_BUILD in Makefile.
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- CC_FOR_BUILD='$(CC)'
-else
- CC_FOR_BUILD=gcc
-fi
-
-
-
-
-AR=${AR-ar}
-
-# Extract the first word of "ranlib", so it can be a program name with args.
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-echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:2086: checking for $ac_word" >&5
-if eval "test \"`echo '$''{'ac_cv_prog_RANLIB'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- if test -n "$RANLIB"; then
- ac_cv_prog_RANLIB="$RANLIB" # Let the user override the test.
-else
- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
- ac_dummy="$PATH"
- for ac_dir in $ac_dummy; do
- test -z "$ac_dir" && ac_dir=.
- if test -f $ac_dir/$ac_word; then
- ac_cv_prog_RANLIB="ranlib"
- break
- fi
- done
- IFS="$ac_save_ifs"
- test -z "$ac_cv_prog_RANLIB" && ac_cv_prog_RANLIB=":"
-fi
-fi
-RANLIB="$ac_cv_prog_RANLIB"
-if test -n "$RANLIB"; then
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-else
- echo "$ac_t""no" 1>&6
-fi
-
-
-ALL_LINGUAS=
-
- for ac_hdr in argz.h limits.h locale.h nl_types.h malloc.h string.h \
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-do
-ac_safe=`echo "$ac_hdr" | sed 'y%./+-%__p_%'`
-echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6
-echo "configure:2121: checking for $ac_hdr" >&5
-if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 2126 "configure"
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-ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:2131: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
-ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
-if test -z "$ac_err"; then
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=yes"
-else
- echo "$ac_err" >&5
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=no"
-fi
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-if eval "test \"`echo '$ac_cv_header_'$ac_safe`\" = yes"; then
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- ac_tr_hdr=HAVE_`echo $ac_hdr | sed 'y%abcdefghijklmnopqrstuvwxyz./-%ABCDEFGHIJKLMNOPQRSTUVWXYZ___%'`
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-
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- echo "$ac_t""no" 1>&6
-fi
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-
- for ac_func in getcwd munmap putenv setenv setlocale strchr strcasecmp \
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-echo "configure:2161: checking for $ac_func" >&5
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- echo $ac_n "(cached) $ac_c" 1>&6
-else
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-
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-/* The GNU C library defines this for functions which it implements
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-#else
-$ac_func();
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-
-; return 0; }
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-if { (eval echo configure:2189: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
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- eval "ac_cv_func_$ac_func=yes"
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=no"
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-
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- ac_tr_func=HAVE_`echo $ac_func | tr 'abcdefghijklmnopqrstuvwxyz' 'ABCDEFGHIJKLMNOPQRSTUVWXYZ'`
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-
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-
-
- if test "${ac_cv_func_stpcpy+set}" != "set"; then
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-echo "configure:2218: checking for $ac_func" >&5
-if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 2223 "configure"
-#include "confdefs.h"
-/* System header to define __stub macros and hopefully few prototypes,
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-#include <assert.h>
-/* Override any gcc2 internal prototype to avoid an error. */
-/* We use char because int might match the return type of a gcc2
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-char $ac_func();
-
-int main() {
-
-/* The GNU C library defines this for functions which it implements
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-#if defined (__stub_$ac_func) || defined (__stub___$ac_func)
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-#else
-$ac_func();
-#endif
-
-; return 0; }
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-if { (eval echo configure:2426: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
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-
- fi
-
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-echo "configure:2516: checking for $ac_func" >&5
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-
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-choke me
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-$ac_func();
-#endif
-
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-if { (eval echo configure:2544: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
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- echo "configure: failed program was:" >&5
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-
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- ac_tr_func=HAVE_`echo $ac_func | tr 'abcdefghijklmnopqrstuvwxyz' 'ABCDEFGHIJKLMNOPQRSTUVWXYZ'`
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-
- # Extract the first word of "gmsgfmt", so it can be a program name with args.
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- ?:/*)
- ac_cv_path_GMSGFMT="$GMSGFMT" # Let the user override the test with a dos path.
- ;;
- *)
- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
- ac_dummy="$PATH"
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-
- # Extract the first word of "xgettext", so it can be a program name with args.
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- ac_cv_path_XGETTEXT="$XGETTEXT" # Let the user override the test with a path.
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- *)
- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS="${IFS}:"
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-else
- echo "$ac_t""no" 1>&6
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-
- cat > conftest.$ac_ext <<EOF
-#line 2639 "configure"
-#include "confdefs.h"
-
-int main() {
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-if { (eval echo configure:2647: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
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- CATOBJEXT=.gmo
- DATADIRNAME=share
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- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- CATOBJEXT=.mo
- DATADIRNAME=lib
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-rm -f conftest*
- INSTOBJEXT=.mo
- fi
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-
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- echo "$ac_t""no" 1>&6
-fi
-
-
-
- if test "$CATOBJEXT" = "NONE"; then
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- fi
-
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- # Extract the first word of "msgfmt", so it can be a program name with args.
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- ac_cv_path_MSGFMT="$MSGFMT" # Let the user override the test with a path.
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- *)
- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS="${IFS}:"
- for ac_dir in $PATH; do
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- if test -f $ac_dir/$ac_word; then
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- fi
- fi
- done
- IFS="$ac_save_ifs"
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-else
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-
- # Extract the first word of "gmsgfmt", so it can be a program name with args.
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-echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:2713: checking for $ac_word" >&5
-if eval "test \"`echo '$''{'ac_cv_path_GMSGFMT'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- case "$GMSGFMT" in
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- ac_cv_path_GMSGFMT="$GMSGFMT" # Let the user override the test with a path.
- ;;
- ?:/*)
- ac_cv_path_GMSGFMT="$GMSGFMT" # Let the user override the test with a dos path.
- ;;
- *)
- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
- ac_dummy="$PATH"
- for ac_dir in $ac_dummy; do
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- done
- IFS="$ac_save_ifs"
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-
- # Extract the first word of "xgettext", so it can be a program name with args.
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-echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:2749: checking for $ac_word" >&5
-if eval "test \"`echo '$''{'ac_cv_path_XGETTEXT'+set}'`\" = set"; then
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-else
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- *)
- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS="${IFS}:"
- for ac_dir in $PATH; do
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- IFS="$ac_save_ifs"
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-else
- echo "$ac_t""no" 1>&6
-fi
-
-
- USE_INCLUDED_LIBINTL=yes
- CATOBJEXT=.gmo
- INSTOBJEXT=.mo
- DATADIRNAME=share
- INTLDEPS='$(top_builddir)/../intl/libintl.a'
- INTLLIBS=$INTLDEPS
- LIBS=`echo $LIBS | sed -e 's/-lintl//'`
- nls_cv_header_intl=libintl.h
- nls_cv_header_libgt=libgettext.h
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-
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- : ;
- else
- echo "$ac_t""found xgettext programs is not GNU xgettext; ignore it" 1>&6
- XGETTEXT=":"
- fi
- fi
-
- # We need to process the po/ directory.
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- else
- DATADIRNAME=share
- nls_cv_header_intl=libintl.h
- nls_cv_header_libgt=libgettext.h
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-
- # If this is used in GNU gettext we have to set USE_NLS to `yes'
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-
- for lang in $ALL_LINGUAS; do
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- POFILES="$POFILES $lang.po"
- done
-
-
-
-
-
-
-
-
-
-
-
-
-
-
- if test "x$CATOBJEXT" != "x"; then
- if test "x$ALL_LINGUAS" = "x"; then
- LINGUAS=
- else
- echo $ac_n "checking for catalogs to be installed""... $ac_c" 1>&6
-echo "configure:2839: checking for catalogs to be installed" >&5
- NEW_LINGUAS=
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- esac
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- LINGUAS=$NEW_LINGUAS
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- fi
-
- if test -n "$LINGUAS"; then
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- fi
- fi
-
- if test $ac_cv_header_locale_h = yes; then
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- else
- INCLUDE_LOCALE_H="\
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- fi
-
-
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-echo $ac_n "checking for linux/version.h""... $ac_c" 1>&6
-echo "configure:2867: checking for linux/version.h" >&5
-if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then
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- cat > conftest.$ac_ext <<EOF
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-{ (eval echo configure:2877: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
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- eval "ac_cv_header_$ac_safe=yes"
-else
- echo "$ac_err" >&5
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=no"
-fi
-rm -f conftest*
-fi
-if eval "test \"`echo '$ac_cv_header_'$ac_safe`\" = yes"; then
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- msgformat=linux
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- echo "$ac_t""no" 1>&6
-msgformat=xopen
-fi
-
-
- sed -e '/^#/d' $srcdir/$msgformat-msg.sed > po2msg.sed
- fi
- sed -e '/^#.*[^\\]$/d' -e '/^#$/d' \
- $srcdir/po2tbl.sed.in > po2tbl.sed
- fi
-
- if test "$PACKAGE" = "gettext"; then
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- GT_YES=
- else
- GT_NO=
- GT_YES="#YES#"
- fi
-
-
-
- MKINSTALLDIRS="\$(srcdir)/../../mkinstalldirs"
-
-
- l=
-
-
- if test -d $srcdir/po; then
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- if test "x$srcdir" != "x."; then
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- posrcprefix="$srcdir/"
- else
- posrcprefix="../$srcdir/"
- fi
- else
- posrcprefix="../"
- fi
- rm -f po/POTFILES
- sed -e "/^#/d" -e "/^\$/d" -e "s,.*, $posrcprefix& \\\\," -e "\$s/\(.*\) \\\\/\1/" \
- < $srcdir/po/POTFILES.in > po/POTFILES
- fi
-
-
-# Check for common headers.
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-echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6
-echo "configure:2946: checking for $ac_hdr" >&5
-if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 2951 "configure"
-#include "confdefs.h"
-#include <$ac_hdr>
-EOF
-ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:2956: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
-ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
-if test -z "$ac_err"; then
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=yes"
-else
- echo "$ac_err" >&5
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=no"
-fi
-rm -f conftest*
-fi
-if eval "test \"`echo '$ac_cv_header_'$ac_safe`\" = yes"; then
- echo "$ac_t""yes" 1>&6
- ac_tr_hdr=HAVE_`echo $ac_hdr | sed 'y%abcdefghijklmnopqrstuvwxyz./-%ABCDEFGHIJKLMNOPQRSTUVWXYZ___%'`
- cat >> confdefs.h <<EOF
-#define $ac_tr_hdr 1
-EOF
-
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- echo "$ac_t""no" 1>&6
-fi
-done
-
-for ac_hdr in sys/time.h sys/resource.h
-do
-ac_safe=`echo "$ac_hdr" | sed 'y%./+-%__p_%'`
-echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6
-echo "configure:2986: checking for $ac_hdr" >&5
-if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
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-ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:2996: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
-ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
-if test -z "$ac_err"; then
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=yes"
-else
- echo "$ac_err" >&5
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=no"
-fi
-rm -f conftest*
-fi
-if eval "test \"`echo '$ac_cv_header_'$ac_safe`\" = yes"; then
- echo "$ac_t""yes" 1>&6
- ac_tr_hdr=HAVE_`echo $ac_hdr | sed 'y%abcdefghijklmnopqrstuvwxyz./-%ABCDEFGHIJKLMNOPQRSTUVWXYZ___%'`
- cat >> confdefs.h <<EOF
-#define $ac_tr_hdr 1
-EOF
-
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- echo "$ac_t""no" 1>&6
-fi
-done
-
-for ac_hdr in fcntl.h fpu_control.h
-do
-ac_safe=`echo "$ac_hdr" | sed 'y%./+-%__p_%'`
-echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6
-echo "configure:3026: checking for $ac_hdr" >&5
-if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 3031 "configure"
-#include "confdefs.h"
-#include <$ac_hdr>
-EOF
-ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:3036: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
-ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
-if test -z "$ac_err"; then
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=yes"
-else
- echo "$ac_err" >&5
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=no"
-fi
-rm -f conftest*
-fi
-if eval "test \"`echo '$ac_cv_header_'$ac_safe`\" = yes"; then
- echo "$ac_t""yes" 1>&6
- ac_tr_hdr=HAVE_`echo $ac_hdr | sed 'y%abcdefghijklmnopqrstuvwxyz./-%ABCDEFGHIJKLMNOPQRSTUVWXYZ___%'`
- cat >> confdefs.h <<EOF
-#define $ac_tr_hdr 1
-EOF
-
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- echo "$ac_t""no" 1>&6
-fi
-done
-
-for ac_hdr in dlfcn.h errno.h sys/stat.h
-do
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-echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6
-echo "configure:3066: checking for $ac_hdr" >&5
-if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 3071 "configure"
-#include "confdefs.h"
-#include <$ac_hdr>
-EOF
-ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:3076: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
-ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
-if test -z "$ac_err"; then
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=yes"
-else
- echo "$ac_err" >&5
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=no"
-fi
-rm -f conftest*
-fi
-if eval "test \"`echo '$ac_cv_header_'$ac_safe`\" = yes"; then
- echo "$ac_t""yes" 1>&6
- ac_tr_hdr=HAVE_`echo $ac_hdr | sed 'y%abcdefghijklmnopqrstuvwxyz./-%ABCDEFGHIJKLMNOPQRSTUVWXYZ___%'`
- cat >> confdefs.h <<EOF
-#define $ac_tr_hdr 1
-EOF
-
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- echo "$ac_t""no" 1>&6
-fi
-done
-
-for ac_func in getrusage time sigaction __setfpucw
-do
-echo $ac_n "checking for $ac_func""... $ac_c" 1>&6
-echo "configure:3105: checking for $ac_func" >&5
-if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 3110 "configure"
-#include "confdefs.h"
-/* System header to define __stub macros and hopefully few prototypes,
- which can conflict with char $ac_func(); below. */
-#include <assert.h>
-/* Override any gcc2 internal prototype to avoid an error. */
-/* We use char because int might match the return type of a gcc2
- builtin and then its argument prototype would still apply. */
-char $ac_func();
-
-int main() {
-
-/* The GNU C library defines this for functions which it implements
- to always fail with ENOSYS. Some functions are actually named
- something starting with __ and the normal name is an alias. */
-#if defined (__stub_$ac_func) || defined (__stub___$ac_func)
-choke me
-#else
-$ac_func();
-#endif
-
-; return 0; }
-EOF
-if { (eval echo configure:3133: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=yes"
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=no"
-fi
-rm -f conftest*
-fi
-
-if eval "test \"`echo '$ac_cv_func_'$ac_func`\" = yes"; then
- echo "$ac_t""yes" 1>&6
- ac_tr_func=HAVE_`echo $ac_func | tr 'abcdefghijklmnopqrstuvwxyz' 'ABCDEFGHIJKLMNOPQRSTUVWXYZ'`
- cat >> confdefs.h <<EOF
-#define $ac_tr_func 1
-EOF
-
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- echo "$ac_t""no" 1>&6
-fi
-done
-
-
-# Check for socket libraries
-echo $ac_n "checking for bind in -lsocket""... $ac_c" 1>&6
-echo "configure:3160: checking for bind in -lsocket" >&5
-ac_lib_var=`echo socket'_'bind | sed 'y%./+-%__p_%'`
-if eval "test \"`echo '$''{'ac_cv_lib_$ac_lib_var'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- ac_save_LIBS="$LIBS"
-LIBS="-lsocket $LIBS"
-cat > conftest.$ac_ext <<EOF
-#line 3168 "configure"
-#include "confdefs.h"
-/* Override any gcc2 internal prototype to avoid an error. */
-/* We use char because int might match the return type of a gcc2
- builtin and then its argument prototype would still apply. */
-char bind();
-
-int main() {
-bind()
-; return 0; }
-EOF
-if { (eval echo configure:3179: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- rm -rf conftest*
- eval "ac_cv_lib_$ac_lib_var=yes"
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_lib_$ac_lib_var=no"
-fi
-rm -f conftest*
-LIBS="$ac_save_LIBS"
-
-fi
-if eval "test \"`echo '$ac_cv_lib_'$ac_lib_var`\" = yes"; then
- echo "$ac_t""yes" 1>&6
- ac_tr_lib=HAVE_LIB`echo socket | sed -e 's/[^a-zA-Z0-9_]/_/g' \
- -e 'y/abcdefghijklmnopqrstuvwxyz/ABCDEFGHIJKLMNOPQRSTUVWXYZ/'`
- cat >> confdefs.h <<EOF
-#define $ac_tr_lib 1
-EOF
-
- LIBS="-lsocket $LIBS"
-
-else
- echo "$ac_t""no" 1>&6
-fi
-
-echo $ac_n "checking for gethostbyname in -lnsl""... $ac_c" 1>&6
-echo "configure:3207: checking for gethostbyname in -lnsl" >&5
-ac_lib_var=`echo nsl'_'gethostbyname | sed 'y%./+-%__p_%'`
-if eval "test \"`echo '$''{'ac_cv_lib_$ac_lib_var'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- ac_save_LIBS="$LIBS"
-LIBS="-lnsl $LIBS"
-cat > conftest.$ac_ext <<EOF
-#line 3215 "configure"
-#include "confdefs.h"
-/* Override any gcc2 internal prototype to avoid an error. */
-/* We use char because int might match the return type of a gcc2
- builtin and then its argument prototype would still apply. */
-char gethostbyname();
-
-int main() {
-gethostbyname()
-; return 0; }
-EOF
-if { (eval echo configure:3226: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- rm -rf conftest*
- eval "ac_cv_lib_$ac_lib_var=yes"
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_lib_$ac_lib_var=no"
-fi
-rm -f conftest*
-LIBS="$ac_save_LIBS"
-
-fi
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- ac_tr_lib=HAVE_LIB`echo nsl | sed -e 's/[^a-zA-Z0-9_]/_/g' \
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- cat >> confdefs.h <<EOF
-#define $ac_tr_lib 1
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-
- LIBS="-lnsl $LIBS"
-
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- echo "$ac_t""no" 1>&6
-fi
-
-
-. ${srcdir}/../../bfd/configure.host
-
-
-
-USE_MAINTAINER_MODE=no
-# Check whether --enable-maintainer-mode or --disable-maintainer-mode was given.
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- enableval="$enable_maintainer_mode"
- case "${enableval}" in
- yes) MAINT="" USE_MAINTAINER_MODE=yes ;;
- no) MAINT="#" ;;
- *) { echo "configure: error: "--enable-maintainer-mode does not take a value"" 1>&2; exit 1; }; MAINT="#" ;;
-esac
-if test x"$silent" != x"yes" && test x"$MAINT" = x""; then
- echo "Setting maintainer mode" 6>&1
-fi
-else
- MAINT="#"
-fi
-
-
-
-# Check whether --enable-sim-bswap or --disable-sim-bswap was given.
-if test "${enable_sim_bswap+set}" = set; then
- enableval="$enable_sim_bswap"
- case "${enableval}" in
- yes) sim_bswap="-DWITH_BSWAP=1 -DUSE_BSWAP=1";;
- no) sim_bswap="-DWITH_BSWAP=0";;
- *) { echo "configure: error: "--enable-sim-bswap does not take a value"" 1>&2; exit 1; }; sim_bswap="";;
-esac
-if test x"$silent" != x"yes" && test x"$sim_bswap" != x""; then
- echo "Setting bswap flags = $sim_bswap" 6>&1
-fi
-else
- sim_bswap=""
-fi
-
-
-
-# Check whether --enable-sim-cflags or --disable-sim-cflags was given.
-if test "${enable_sim_cflags+set}" = set; then
- enableval="$enable_sim_cflags"
- case "${enableval}" in
- yes) sim_cflags="-O2 -fomit-frame-pointer";;
- trace) { echo "configure: error: "Please use --enable-sim-debug instead."" 1>&2; exit 1; }; sim_cflags="";;
- no) sim_cflags="";;
- *) sim_cflags=`echo "${enableval}" | sed -e "s/,/ /g"`;;
-esac
-if test x"$silent" != x"yes" && test x"$sim_cflags" != x""; then
- echo "Setting sim cflags = $sim_cflags" 6>&1
-fi
-else
- sim_cflags=""
-fi
-
-
-
-# Check whether --enable-sim-debug or --disable-sim-debug was given.
-if test "${enable_sim_debug+set}" = set; then
- enableval="$enable_sim_debug"
- case "${enableval}" in
- yes) sim_debug="-DDEBUG=7 -DWITH_DEBUG=7";;
- no) sim_debug="-DDEBUG=0 -DWITH_DEBUG=0";;
- *) sim_debug="-DDEBUG='(${enableval})' -DWITH_DEBUG='(${enableval})'";;
-esac
-if test x"$silent" != x"yes" && test x"$sim_debug" != x""; then
- echo "Setting sim debug = $sim_debug" 6>&1
-fi
-else
- sim_debug=""
-fi
-
-
-
-# Check whether --enable-sim-stdio or --disable-sim-stdio was given.
-if test "${enable_sim_stdio+set}" = set; then
- enableval="$enable_sim_stdio"
- case "${enableval}" in
- yes) sim_stdio="-DWITH_STDIO=DO_USE_STDIO";;
- no) sim_stdio="-DWITH_STDIO=DONT_USE_STDIO";;
- *) { echo "configure: error: "Unknown value $enableval passed to --enable-sim-stdio"" 1>&2; exit 1; }; sim_stdio="";;
-esac
-if test x"$silent" != x"yes" && test x"$sim_stdio" != x""; then
- echo "Setting stdio flags = $sim_stdio" 6>&1
-fi
-else
- sim_stdio=""
-fi
-
-
-
-# Check whether --enable-sim-trace or --disable-sim-trace was given.
-if test "${enable_sim_trace+set}" = set; then
- enableval="$enable_sim_trace"
- case "${enableval}" in
- yes) sim_trace="-DTRACE=1 -DWITH_TRACE=-1";;
- no) sim_trace="-DTRACE=0 -DWITH_TRACE=0";;
- [-0-9]*)
- sim_trace="-DTRACE='(${enableval})' -DWITH_TRACE='(${enableval})'";;
- [a-z]*)
- sim_trace=""
- for x in `echo "$enableval" | sed -e "s/,/ /g"`; do
- if test x"$sim_trace" = x; then
- sim_trace="-DWITH_TRACE='(TRACE_$x"
- else
- sim_trace="${sim_trace}|TRACE_$x"
- fi
- done
- sim_trace="$sim_trace)'" ;;
-esac
-if test x"$silent" != x"yes" && test x"$sim_trace" != x""; then
- echo "Setting sim trace = $sim_trace" 6>&1
-fi
-else
- sim_trace=""
-fi
-
-
-
-# Check whether --enable-sim-profile or --disable-sim-profile was given.
-if test "${enable_sim_profile+set}" = set; then
- enableval="$enable_sim_profile"
- case "${enableval}" in
- yes) sim_profile="-DPROFILE=1 -DWITH_PROFILE=-1";;
- no) sim_profile="-DPROFILE=0 -DWITH_PROFILE=0";;
- [-0-9]*)
- sim_profile="-DPROFILE='(${enableval})' -DWITH_PROFILE='(${enableval})'";;
- [a-z]*)
- sim_profile=""
- for x in `echo "$enableval" | sed -e "s/,/ /g"`; do
- if test x"$sim_profile" = x; then
- sim_profile="-DWITH_PROFILE='(PROFILE_$x"
- else
- sim_profile="${sim_profile}|PROFILE_$x"
- fi
- done
- sim_profile="$sim_profile)'" ;;
-esac
-if test x"$silent" != x"yes" && test x"$sim_profile" != x""; then
- echo "Setting sim profile = $sim_profile" 6>&1
-fi
-else
- sim_profile="-DPROFILE=1 -DWITH_PROFILE=-1"
-fi
-
-
-
-echo $ac_n "checking return type of signal handlers""... $ac_c" 1>&6
-echo "configure:3402: checking return type of signal handlers" >&5
-if eval "test \"`echo '$''{'ac_cv_type_signal'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 3407 "configure"
-#include "confdefs.h"
-#include <sys/types.h>
-#include <signal.h>
-#ifdef signal
-#undef signal
-#endif
-#ifdef __cplusplus
-extern "C" void (*signal (int, void (*)(int)))(int);
-#else
-void (*signal ()) ();
-#endif
-
-int main() {
-int i;
-; return 0; }
-EOF
-if { (eval echo configure:3424: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
- rm -rf conftest*
- ac_cv_type_signal=void
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- ac_cv_type_signal=int
-fi
-rm -f conftest*
-fi
-
-echo "$ac_t""$ac_cv_type_signal" 1>&6
-cat >> confdefs.h <<EOF
-#define RETSIGTYPE $ac_cv_type_signal
-EOF
-
-
-
-
-
-echo $ac_n "checking for executable suffix""... $ac_c" 1>&6
-echo "configure:3446: checking for executable suffix" >&5
-if eval "test \"`echo '$''{'ac_cv_exeext'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- if test "$CYGWIN" = yes || test "$MINGW32" = yes; then
- ac_cv_exeext=.exe
-else
- rm -f conftest*
- echo 'int main () { return 0; }' > conftest.$ac_ext
- ac_cv_exeext=
- if { (eval echo configure:3456: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; }; then
- for file in conftest.*; do
- case $file in
- *.c | *.o | *.obj | *.ilk | *.pdb) ;;
- *) ac_cv_exeext=`echo $file | sed -e s/conftest//` ;;
- esac
- done
- else
- { echo "configure: error: installation or configuration problem: compiler cannot create executables." 1>&2; exit 1; }
- fi
- rm -f conftest*
- test x"${ac_cv_exeext}" = x && ac_cv_exeext=no
-fi
-fi
-
-EXEEXT=""
-test x"${ac_cv_exeext}" != xno && EXEEXT=${ac_cv_exeext}
-echo "$ac_t""${ac_cv_exeext}" 1>&6
-ac_exeext=$EXEEXT
-
-
-sim_link_files=
-sim_link_links=
-
-sim_link_links=tconfig.h
-if test -f ${srcdir}/tconfig.in
-then
- sim_link_files=tconfig.in
-else
- sim_link_files=../common/tconfig.in
-fi
-
-# targ-vals.def points to the libc macro description file.
-case "${target}" in
-*-*-*) TARG_VALS_DEF=../common/nltvals.def ;;
-esac
-sim_link_files="${sim_link_files} ${TARG_VALS_DEF}"
-sim_link_links="${sim_link_links} targ-vals.def"
-
-
-
-for ac_hdr in stdlib.h time.h sys/param.h
-do
-ac_safe=`echo "$ac_hdr" | sed 'y%./+-%__p_%'`
-echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6
-echo "configure:3501: checking for $ac_hdr" >&5
-if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 3506 "configure"
-#include "confdefs.h"
-#include <$ac_hdr>
-EOF
-ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:3511: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
-ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
-if test -z "$ac_err"; then
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=yes"
-else
- echo "$ac_err" >&5
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=no"
-fi
-rm -f conftest*
-fi
-if eval "test \"`echo '$ac_cv_header_'$ac_safe`\" = yes"; then
- echo "$ac_t""yes" 1>&6
- ac_tr_hdr=HAVE_`echo $ac_hdr | sed 'y%abcdefghijklmnopqrstuvwxyz./-%ABCDEFGHIJKLMNOPQRSTUVWXYZ___%'`
- cat >> confdefs.h <<EOF
-#define $ac_tr_hdr 1
-EOF
-
-else
- echo "$ac_t""no" 1>&6
-fi
-done
-
-
-
-
-trap '' 1 2 15
-cat > confcache <<\EOF
-# This file is a shell script that caches the results of configure
-# tests run on this system so they can be shared between configure
-# scripts and configure runs. It is not useful on other systems.
-# If it contains results you don't want to keep, you may remove or edit it.
-#
-# By default, configure uses ./config.cache as the cache file,
-# creating it if it does not exist already. You can give configure
-# the --cache-file=FILE option to use a different cache file; that is
-# what configure does when it calls configure scripts in
-# subdirectories, so they share the cache.
-# Giving --cache-file=/dev/null disables caching, for debugging configure.
-# config.status only pays attention to the cache file if you give it the
-# --recheck option to rerun configure.
-#
-EOF
-# The following way of writing the cache mishandles newlines in values,
-# but we know of no workaround that is simple, portable, and efficient.
-# So, don't put newlines in cache variables' values.
-# Ultrix sh set writes to stderr and can't be redirected directly,
-# and sets the high bit in the cache file unless we assign to the vars.
-(set) 2>&1 |
- case `(ac_space=' '; set | grep ac_space) 2>&1` in
- *ac_space=\ *)
- # `set' does not quote correctly, so add quotes (double-quote substitution
- # turns \\\\ into \\, and sed turns \\ into \).
- sed -n \
- -e "s/'/'\\\\''/g" \
- -e "s/^\\([a-zA-Z0-9_]*_cv_[a-zA-Z0-9_]*\\)=\\(.*\\)/\\1=\${\\1='\\2'}/p"
- ;;
- *)
- # `set' quotes correctly as required by POSIX, so do not add quotes.
- sed -n -e 's/^\([a-zA-Z0-9_]*_cv_[a-zA-Z0-9_]*\)=\(.*\)/\1=${\1=\2}/p'
- ;;
- esac >> confcache
-if cmp -s $cache_file confcache; then
- :
-else
- if test -w $cache_file; then
- echo "updating cache $cache_file"
- cat confcache > $cache_file
- else
- echo "not updating unwritable cache $cache_file"
- fi
-fi
-rm -f confcache
-
-trap 'rm -fr conftest* confdefs* core core.* *.core $ac_clean_files; exit 1' 1 2 15
-
-test "x$prefix" = xNONE && prefix=$ac_default_prefix
-# Let make expand exec_prefix.
-test "x$exec_prefix" = xNONE && exec_prefix='${prefix}'
-
-# Any assignment to VPATH causes Sun make to only execute
-# the first set of double-colon rules, so remove it if not needed.
-# If there is a colon in the path, we need to keep it.
-if test "x$srcdir" = x.; then
- ac_vpsub='/^[ ]*VPATH[ ]*=[^:]*$/d'
-fi
-
-trap 'rm -f $CONFIG_STATUS conftest*; exit 1' 1 2 15
-
-DEFS=-DHAVE_CONFIG_H
-
-# Without the "./", some shells look in PATH for config.status.
-: ${CONFIG_STATUS=./config.status}
-
-echo creating $CONFIG_STATUS
-rm -f $CONFIG_STATUS
-cat > $CONFIG_STATUS <<EOF
-#! /bin/sh
-# Generated automatically by configure.
-# Run this file to recreate the current configuration.
-# This directory was configured as follows,
-# on host `(hostname || uname -n) 2>/dev/null | sed 1q`:
-#
-# $0 $ac_configure_args
-#
-# Compiler output produced by configure, useful for debugging
-# configure, is in ./config.log if it exists.
-
-ac_cs_usage="Usage: $CONFIG_STATUS [--recheck] [--version] [--help]"
-for ac_option
-do
- case "\$ac_option" in
- -recheck | --recheck | --rechec | --reche | --rech | --rec | --re | --r)
- echo "running \${CONFIG_SHELL-/bin/sh} $0 $ac_configure_args --no-create --no-recursion"
- exec \${CONFIG_SHELL-/bin/sh} $0 $ac_configure_args --no-create --no-recursion ;;
- -version | --version | --versio | --versi | --vers | --ver | --ve | --v)
- echo "$CONFIG_STATUS generated by autoconf version 2.13"
- exit 0 ;;
- -help | --help | --hel | --he | --h)
- echo "\$ac_cs_usage"; exit 0 ;;
- *) echo "\$ac_cs_usage"; exit 1 ;;
- esac
-done
-
-ac_given_srcdir=$srcdir
-ac_given_INSTALL="$INSTALL"
-
-trap 'rm -fr `echo "Makefile.sim:Makefile.in Make-common.sim:../common/Make-common.in .gdbinit:../common/gdbinit.in config.h:config.in" | sed "s/:[^ ]*//g"` conftest*; exit 1' 1 2 15
-EOF
-cat >> $CONFIG_STATUS <<EOF
-
-# Protect against being on the right side of a sed subst in config.status.
-sed 's/%@/@@/; s/@%/@@/; s/%g\$/@g/; /@g\$/s/[\\\\&%]/\\\\&/g;
- s/@@/%@/; s/@@/@%/; s/@g\$/%g/' > conftest.subs <<\\CEOF
-$ac_vpsub
-$extrasub
-s%@sim_environment@%$sim_environment%g
-s%@sim_alignment@%$sim_alignment%g
-s%@sim_assert@%$sim_assert%g
-s%@sim_bitsize@%$sim_bitsize%g
-s%@sim_endian@%$sim_endian%g
-s%@sim_hostendian@%$sim_hostendian%g
-s%@sim_float@%$sim_float%g
-s%@sim_scache@%$sim_scache%g
-s%@sim_default_model@%$sim_default_model%g
-s%@sim_hw_cflags@%$sim_hw_cflags%g
-s%@sim_hw_objs@%$sim_hw_objs%g
-s%@sim_hw@%$sim_hw%g
-s%@sim_inline@%$sim_inline%g
-s%@sim_packages@%$sim_packages%g
-s%@sim_regparm@%$sim_regparm%g
-s%@sim_reserved_bits@%$sim_reserved_bits%g
-s%@sim_smp@%$sim_smp%g
-s%@sim_stdcall@%$sim_stdcall%g
-s%@sim_xor_endian@%$sim_xor_endian%g
-s%@WARN_CFLAGS@%$WARN_CFLAGS%g
-s%@WERROR_CFLAGS@%$WERROR_CFLAGS%g
-s%@SHELL@%$SHELL%g
-s%@CFLAGS@%$CFLAGS%g
-s%@CPPFLAGS@%$CPPFLAGS%g
-s%@CXXFLAGS@%$CXXFLAGS%g
-s%@FFLAGS@%$FFLAGS%g
-s%@DEFS@%$DEFS%g
-s%@LDFLAGS@%$LDFLAGS%g
-s%@LIBS@%$LIBS%g
-s%@exec_prefix@%$exec_prefix%g
-s%@prefix@%$prefix%g
-s%@program_transform_name@%$program_transform_name%g
-s%@bindir@%$bindir%g
-s%@sbindir@%$sbindir%g
-s%@libexecdir@%$libexecdir%g
-s%@datadir@%$datadir%g
-s%@sysconfdir@%$sysconfdir%g
-s%@sharedstatedir@%$sharedstatedir%g
-s%@localstatedir@%$localstatedir%g
-s%@libdir@%$libdir%g
-s%@includedir@%$includedir%g
-s%@oldincludedir@%$oldincludedir%g
-s%@infodir@%$infodir%g
-s%@mandir@%$mandir%g
-s%@host@%$host%g
-s%@host_alias@%$host_alias%g
-s%@host_cpu@%$host_cpu%g
-s%@host_vendor@%$host_vendor%g
-s%@host_os@%$host_os%g
-s%@target@%$target%g
-s%@target_alias@%$target_alias%g
-s%@target_cpu@%$target_cpu%g
-s%@target_vendor@%$target_vendor%g
-s%@target_os@%$target_os%g
-s%@build@%$build%g
-s%@build_alias@%$build_alias%g
-s%@build_cpu@%$build_cpu%g
-s%@build_vendor@%$build_vendor%g
-s%@build_os@%$build_os%g
-s%@CC@%$CC%g
-s%@INSTALL_PROGRAM@%$INSTALL_PROGRAM%g
-s%@INSTALL_SCRIPT@%$INSTALL_SCRIPT%g
-s%@INSTALL_DATA@%$INSTALL_DATA%g
-s%@CC_FOR_BUILD@%$CC_FOR_BUILD%g
-s%@HDEFINES@%$HDEFINES%g
-s%@AR@%$AR%g
-s%@RANLIB@%$RANLIB%g
-s%@SET_MAKE@%$SET_MAKE%g
-s%@CPP@%$CPP%g
-s%@ALLOCA@%$ALLOCA%g
-s%@USE_NLS@%$USE_NLS%g
-s%@MSGFMT@%$MSGFMT%g
-s%@GMSGFMT@%$GMSGFMT%g
-s%@XGETTEXT@%$XGETTEXT%g
-s%@USE_INCLUDED_LIBINTL@%$USE_INCLUDED_LIBINTL%g
-s%@CATALOGS@%$CATALOGS%g
-s%@CATOBJEXT@%$CATOBJEXT%g
-s%@DATADIRNAME@%$DATADIRNAME%g
-s%@GMOFILES@%$GMOFILES%g
-s%@INSTOBJEXT@%$INSTOBJEXT%g
-s%@INTLDEPS@%$INTLDEPS%g
-s%@INTLLIBS@%$INTLLIBS%g
-s%@INTLOBJS@%$INTLOBJS%g
-s%@POFILES@%$POFILES%g
-s%@POSUB@%$POSUB%g
-s%@INCLUDE_LOCALE_H@%$INCLUDE_LOCALE_H%g
-s%@GT_NO@%$GT_NO%g
-s%@GT_YES@%$GT_YES%g
-s%@MKINSTALLDIRS@%$MKINSTALLDIRS%g
-s%@l@%$l%g
-s%@MAINT@%$MAINT%g
-s%@sim_bswap@%$sim_bswap%g
-s%@sim_cflags@%$sim_cflags%g
-s%@sim_debug@%$sim_debug%g
-s%@sim_stdio@%$sim_stdio%g
-s%@sim_trace@%$sim_trace%g
-s%@sim_profile@%$sim_profile%g
-s%@EXEEXT@%$EXEEXT%g
-
-CEOF
-EOF
-
-cat >> $CONFIG_STATUS <<\EOF
-
-# Split the substitutions into bite-sized pieces for seds with
-# small command number limits, like on Digital OSF/1 and HP-UX.
-ac_max_sed_cmds=90 # Maximum number of lines to put in a sed script.
-ac_file=1 # Number of current file.
-ac_beg=1 # First line for current file.
-ac_end=$ac_max_sed_cmds # Line after last line for current file.
-ac_more_lines=:
-ac_sed_cmds=""
-while $ac_more_lines; do
- if test $ac_beg -gt 1; then
- sed "1,${ac_beg}d; ${ac_end}q" conftest.subs > conftest.s$ac_file
- else
- sed "${ac_end}q" conftest.subs > conftest.s$ac_file
- fi
- if test ! -s conftest.s$ac_file; then
- ac_more_lines=false
- rm -f conftest.s$ac_file
- else
- if test -z "$ac_sed_cmds"; then
- ac_sed_cmds="sed -f conftest.s$ac_file"
- else
- ac_sed_cmds="$ac_sed_cmds | sed -f conftest.s$ac_file"
- fi
- ac_file=`expr $ac_file + 1`
- ac_beg=$ac_end
- ac_end=`expr $ac_end + $ac_max_sed_cmds`
- fi
-done
-if test -z "$ac_sed_cmds"; then
- ac_sed_cmds=cat
-fi
-EOF
-
-cat >> $CONFIG_STATUS <<EOF
-
-CONFIG_FILES=\${CONFIG_FILES-"Makefile.sim:Makefile.in Make-common.sim:../common/Make-common.in .gdbinit:../common/gdbinit.in"}
-EOF
-cat >> $CONFIG_STATUS <<\EOF
-for ac_file in .. $CONFIG_FILES; do if test "x$ac_file" != x..; then
- # Support "outfile[:infile[:infile...]]", defaulting infile="outfile.in".
- case "$ac_file" in
- *:*) ac_file_in=`echo "$ac_file"|sed 's%[^:]*:%%'`
- ac_file=`echo "$ac_file"|sed 's%:.*%%'` ;;
- *) ac_file_in="${ac_file}.in" ;;
- esac
-
- # Adjust a relative srcdir, top_srcdir, and INSTALL for subdirectories.
-
- # Remove last slash and all that follows it. Not all systems have dirname.
- ac_dir=`echo $ac_file|sed 's%/[^/][^/]*$%%'`
- if test "$ac_dir" != "$ac_file" && test "$ac_dir" != .; then
- # The file is in a subdirectory.
- test ! -d "$ac_dir" && mkdir "$ac_dir"
- ac_dir_suffix="/`echo $ac_dir|sed 's%^\./%%'`"
- # A "../" for each directory in $ac_dir_suffix.
- ac_dots=`echo $ac_dir_suffix|sed 's%/[^/]*%../%g'`
- else
- ac_dir_suffix= ac_dots=
- fi
-
- case "$ac_given_srcdir" in
- .) srcdir=.
- if test -z "$ac_dots"; then top_srcdir=.
- else top_srcdir=`echo $ac_dots|sed 's%/$%%'`; fi ;;
- /*) srcdir="$ac_given_srcdir$ac_dir_suffix"; top_srcdir="$ac_given_srcdir" ;;
- *) # Relative path.
- srcdir="$ac_dots$ac_given_srcdir$ac_dir_suffix"
- top_srcdir="$ac_dots$ac_given_srcdir" ;;
- esac
-
- case "$ac_given_INSTALL" in
- [/$]*) INSTALL="$ac_given_INSTALL" ;;
- *) INSTALL="$ac_dots$ac_given_INSTALL" ;;
- esac
-
- echo creating "$ac_file"
- rm -f "$ac_file"
- configure_input="Generated automatically from `echo $ac_file_in|sed 's%.*/%%'` by configure."
- case "$ac_file" in
- *Makefile*) ac_comsub="1i\\
-# $configure_input" ;;
- *) ac_comsub= ;;
- esac
-
- ac_file_inputs=`echo $ac_file_in|sed -e "s%^%$ac_given_srcdir/%" -e "s%:% $ac_given_srcdir/%g"`
- sed -e "$ac_comsub
-s%@configure_input@%$configure_input%g
-s%@srcdir@%$srcdir%g
-s%@top_srcdir@%$top_srcdir%g
-s%@INSTALL@%$INSTALL%g
-" $ac_file_inputs | (eval "$ac_sed_cmds") > $ac_file
-fi; done
-rm -f conftest.s*
-
-# These sed commands are passed to sed as "A NAME B NAME C VALUE D", where
-# NAME is the cpp macro being defined and VALUE is the value it is being given.
-#
-# ac_d sets the value in "#define NAME VALUE" lines.
-ac_dA='s%^\([ ]*\)#\([ ]*define[ ][ ]*\)'
-ac_dB='\([ ][ ]*\)[^ ]*%\1#\2'
-ac_dC='\3'
-ac_dD='%g'
-# ac_u turns "#undef NAME" with trailing blanks into "#define NAME VALUE".
-ac_uA='s%^\([ ]*\)#\([ ]*\)undef\([ ][ ]*\)'
-ac_uB='\([ ]\)%\1#\2define\3'
-ac_uC=' '
-ac_uD='\4%g'
-# ac_e turns "#undef NAME" without trailing blanks into "#define NAME VALUE".
-ac_eA='s%^\([ ]*\)#\([ ]*\)undef\([ ][ ]*\)'
-ac_eB='$%\1#\2define\3'
-ac_eC=' '
-ac_eD='%g'
-
-if test "${CONFIG_HEADERS+set}" != set; then
-EOF
-cat >> $CONFIG_STATUS <<EOF
- CONFIG_HEADERS="config.h:config.in"
-EOF
-cat >> $CONFIG_STATUS <<\EOF
-fi
-for ac_file in .. $CONFIG_HEADERS; do if test "x$ac_file" != x..; then
- # Support "outfile[:infile[:infile...]]", defaulting infile="outfile.in".
- case "$ac_file" in
- *:*) ac_file_in=`echo "$ac_file"|sed 's%[^:]*:%%'`
- ac_file=`echo "$ac_file"|sed 's%:.*%%'` ;;
- *) ac_file_in="${ac_file}.in" ;;
- esac
-
- echo creating $ac_file
-
- rm -f conftest.frag conftest.in conftest.out
- ac_file_inputs=`echo $ac_file_in|sed -e "s%^%$ac_given_srcdir/%" -e "s%:% $ac_given_srcdir/%g"`
- cat $ac_file_inputs > conftest.in
-
-EOF
-
-# Transform confdefs.h into a sed script conftest.vals that substitutes
-# the proper values into config.h.in to produce config.h. And first:
-# Protect against being on the right side of a sed subst in config.status.
-# Protect against being in an unquoted here document in config.status.
-rm -f conftest.vals
-cat > conftest.hdr <<\EOF
-s/[\\&%]/\\&/g
-s%[\\$`]%\\&%g
-s%#define \([A-Za-z_][A-Za-z0-9_]*\) *\(.*\)%${ac_dA}\1${ac_dB}\1${ac_dC}\2${ac_dD}%gp
-s%ac_d%ac_u%gp
-s%ac_u%ac_e%gp
-EOF
-sed -n -f conftest.hdr confdefs.h > conftest.vals
-rm -f conftest.hdr
-
-# This sed command replaces #undef with comments. This is necessary, for
-# example, in the case of _POSIX_SOURCE, which is predefined and required
-# on some systems where configure will not decide to define it.
-cat >> conftest.vals <<\EOF
-s%^[ ]*#[ ]*undef[ ][ ]*[a-zA-Z_][a-zA-Z_0-9]*%/* & */%
-EOF
-
-# Break up conftest.vals because some shells have a limit on
-# the size of here documents, and old seds have small limits too.
-
-rm -f conftest.tail
-while :
-do
- ac_lines=`grep -c . conftest.vals`
- # grep -c gives empty output for an empty file on some AIX systems.
- if test -z "$ac_lines" || test "$ac_lines" -eq 0; then break; fi
- # Write a limited-size here document to conftest.frag.
- echo ' cat > conftest.frag <<CEOF' >> $CONFIG_STATUS
- sed ${ac_max_here_lines}q conftest.vals >> $CONFIG_STATUS
- echo 'CEOF
- sed -f conftest.frag conftest.in > conftest.out
- rm -f conftest.in
- mv conftest.out conftest.in
-' >> $CONFIG_STATUS
- sed 1,${ac_max_here_lines}d conftest.vals > conftest.tail
- rm -f conftest.vals
- mv conftest.tail conftest.vals
-done
-rm -f conftest.vals
-
-cat >> $CONFIG_STATUS <<\EOF
- rm -f conftest.frag conftest.h
- echo "/* $ac_file. Generated automatically by configure. */" > conftest.h
- cat conftest.in >> conftest.h
- rm -f conftest.in
- if cmp -s $ac_file conftest.h 2>/dev/null; then
- echo "$ac_file is unchanged"
- rm -f conftest.h
- else
- # Remove last slash and all that follows it. Not all systems have dirname.
- ac_dir=`echo $ac_file|sed 's%/[^/][^/]*$%%'`
- if test "$ac_dir" != "$ac_file" && test "$ac_dir" != .; then
- # The file is in a subdirectory.
- test ! -d "$ac_dir" && mkdir "$ac_dir"
- fi
- rm -f $ac_file
- mv conftest.h $ac_file
- fi
-fi; done
-
-EOF
-
-cat >> $CONFIG_STATUS <<EOF
-ac_sources="$sim_link_files"
-ac_dests="$sim_link_links"
-EOF
-
-cat >> $CONFIG_STATUS <<\EOF
-srcdir=$ac_given_srcdir
-while test -n "$ac_sources"; do
- set $ac_dests; ac_dest=$1; shift; ac_dests=$*
- set $ac_sources; ac_source=$1; shift; ac_sources=$*
-
- echo "linking $srcdir/$ac_source to $ac_dest"
-
- if test ! -r $srcdir/$ac_source; then
- { echo "configure: error: $srcdir/$ac_source: File not found" 1>&2; exit 1; }
- fi
- rm -f $ac_dest
-
- # Make relative symlinks.
- # Remove last slash and all that follows it. Not all systems have dirname.
- ac_dest_dir=`echo $ac_dest|sed 's%/[^/][^/]*$%%'`
- if test "$ac_dest_dir" != "$ac_dest" && test "$ac_dest_dir" != .; then
- # The dest file is in a subdirectory.
- test ! -d "$ac_dest_dir" && mkdir "$ac_dest_dir"
- ac_dest_dir_suffix="/`echo $ac_dest_dir|sed 's%^\./%%'`"
- # A "../" for each directory in $ac_dest_dir_suffix.
- ac_dots=`echo $ac_dest_dir_suffix|sed 's%/[^/]*%../%g'`
- else
- ac_dest_dir_suffix= ac_dots=
- fi
-
- case "$srcdir" in
- [/$]*) ac_rel_source="$srcdir/$ac_source" ;;
- *) ac_rel_source="$ac_dots$srcdir/$ac_source" ;;
- esac
-
- # Make a symlink if possible; otherwise try a hard link.
- if ln -s $ac_rel_source $ac_dest 2>/dev/null ||
- ln $srcdir/$ac_source $ac_dest; then :
- else
- { echo "configure: error: can not link $ac_dest to $srcdir/$ac_source" 1>&2; exit 1; }
- fi
-done
-EOF
-cat >> $CONFIG_STATUS <<EOF
-
-EOF
-cat >> $CONFIG_STATUS <<\EOF
-case "x$CONFIG_FILES" in
- xMakefile*)
- echo "Merging Makefile.sim+Make-common.sim into Makefile ..."
- rm -f Makesim1.tmp Makesim2.tmp Makefile
- sed -n -e '/^## COMMON_PRE_/,/^## End COMMON_PRE_/ p' <Make-common.sim >Makesim1.tmp
- sed -n -e '/^## COMMON_POST_/,/^## End COMMON_POST_/ p' <Make-common.sim >Makesim2.tmp
- sed -e '/^## COMMON_PRE_/ r Makesim1.tmp' \
- -e '/^## COMMON_POST_/ r Makesim2.tmp' \
- <Makefile.sim >Makefile
- rm -f Makefile.sim Make-common.sim Makesim1.tmp Makesim2.tmp
- ;;
- esac
- case "x$CONFIG_HEADERS" in xconfig.h:config.in) echo > stamp-h ;; esac
-
-exit 0
-EOF
-chmod +x $CONFIG_STATUS
-rm -fr confdefs* $ac_clean_files
-test "$no_create" = yes || ${CONFIG_SHELL-/bin/sh} $CONFIG_STATUS || exit 1
-
-
diff --git a/sim/h8300/configure.in b/sim/h8300/configure.in
deleted file mode 100644
index 1d953dd03cf..00000000000
--- a/sim/h8300/configure.in
+++ /dev/null
@@ -1,10 +0,0 @@
-dnl Process this file with autoconf to produce a configure script.
-sinclude(../common/aclocal.m4)
-AC_PREREQ(2.5)dnl
-AC_INIT(Makefile.in)
-
-SIM_AC_COMMON
-
-AC_CHECK_HEADERS(stdlib.h time.h sys/param.h)
-
-SIM_AC_OUTPUT
diff --git a/sim/h8300/inst.h b/sim/h8300/inst.h
deleted file mode 100644
index ce930c3a7fd..00000000000
--- a/sim/h8300/inst.h
+++ /dev/null
@@ -1,89 +0,0 @@
-#define DEBUG
-
-/* These define the size of main memory for the simulator.
-
- Note the size of main memory for the H8/300H is only 256k. Keeping it
- small makes the simulator run much faster and consume less memory.
-
- The linker knows about the limited size of the simulator's main memory
- on the H8/300H (via the h8300h.sc linker script). So if you change
- H8300H_MSIZE, be sure to fix the linker script too.
-
- Also note that there's a separate "eightbit" area aside from main
- memory. For simplicity, the simulator assumes any data memory reference
- outside of main memory refers to the eightbit area (in theory, this
- can only happen when simulating H8/300H programs). We make no attempt
- to catch overlapping addresses, wrapped addresses, etc etc. */
-#define H8300_MSIZE (1<<16)
-#define H8300H_MSIZE (1<<18)
-
-#define CSIZE 1000
-
-/* Local register names */
-typedef enum
-{
- R0, R1, R2, R3, R4, R5, R6, R7,
- R_ZERO,
- R_PC,
- R_CCR,
- R_HARD_0,
- R_LAST,
-} reg_type;
-
-
-/* Structure used to describe addressing */
-
-typedef struct
-{
- int type;
- int reg;
- int literal;
-} ea_type;
-
-
-
-typedef struct
-{
- ea_type src;
- ea_type dst;
- int opcode;
- int next_pc;
- int oldpc;
- int cycles;
-#ifdef DEBUG
-struct h8_opcode *op;
-#endif
-}
-decoded_inst;
-
-enum h8300_sim_state {
- SIM_STATE_RUNNING, SIM_STATE_EXITED, SIM_STATE_SIGNALLED, SIM_STATE_STOPPED
-};
-
-typedef struct
-{
- enum h8300_sim_state state;
- int exception;
- unsigned int regs[9];
- int pc;
- int ccr;
-
-
- unsigned char *memory;
- unsigned char *eightbit;
- unsigned short *cache_idx;
- int cache_top;
- int maximum;
- int csize;
- int mask;
-
- decoded_inst *cache;
- int cycles;
- int insts;
- int ticks;
- int compiles;
-#ifdef ADEBUG
- int stats[O_LAST];
-#endif
-}
-cpu_state_type;
diff --git a/sim/h8300/tconfig.in b/sim/h8300/tconfig.in
deleted file mode 100644
index d9599dbcd7a..00000000000
--- a/sim/h8300/tconfig.in
+++ /dev/null
@@ -1,17 +0,0 @@
-/* h8300 target configuration file. */
-
-/* Define this if the simulator supports profiling.
- See the mips simulator for an example.
- This enables the `-p foo' and `-s bar' options.
- The target is required to provide sim_set_profile{,_size}. */
-/* #define SIM_HAVE_PROFILE */
-
-/* Define this if the simulator uses an instruction cache.
- See the h8/300 simulator for an example.
- This enables the `-c size' option to set the size of the cache.
- The target is required to provide sim_set_simcache_size. */
-#define SIM_HAVE_SIMCACHE
-
-/* FIXME: This is a quick hack for run.c so it can support the `-h' option.
- It will eventually be replaced by a more general facility. */
-#define SIM_H8300
diff --git a/sim/h8300/writecode.c b/sim/h8300/writecode.c
deleted file mode 100644
index ea5c8ac3405..00000000000
--- a/sim/h8300/writecode.c
+++ /dev/null
@@ -1,1033 +0,0 @@
-/* Code generator for the Hitachi H8/300 architecture simulator.
-
- Written by Steve Chamberlain of Cygnus Support.
- sac@cygnus.com
-
- This file is part of H8/300 sim
-
-
- THIS SOFTWARE IS NOT COPYRIGHTED
-
- Cygnus offers the following for use in the public domain. Cygnus
- makes no warranty with regard to the software or it's performance
- and the user accepts the software "AS IS" with all faults.
-
- CYGNUS DISCLAIMS ANY WARRANTIES, EXPRESS OR IMPLIED, WITH REGARD TO
- THIS SOFTWARE INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.
-
-*/
-
-/* This program reads the H8/300 opcode table and writes out
- a large switch statement to understand the opcodes (with ifs if
- there is more than one opcode per case) and code to do the stuff */
-
-#include <stdio.h>
-
-#define DEFINE_TABLE
-#define INSIM
-#include"opcode/h8300.h"
-
-#define MAXSAME 140
-
-#define PTWO 256
-static struct h8_opcode *h8_opcodes_sorted[PTWO][MAXSAME];
-
-char *cs = "/*";
-char *ce = "*/";
-
-/* How to get at nibble n from the instruction */
-char *nibs[] =
-{
- "foo",
- "(b0&0xf)",
- "((b1>>4)&0xf)",
- "((b1)&0xf)",
- "((pc[1]>>12)&0xf)",
- "((pc[1]>>8)&0xf)",
- "((pc[1]>>4)&0xf)",
- "((pc[1])&0xf)",
- 0, 0};
-
-/* how to get at the 3 bit immediate in the instruction */
-char *imm3[] =
-{"foo",
- "foo",
- "((b1>>4)&0x7)",
- "foo",
- "foo",
- "foo",
- "(pc[1]>>4)&0x7"};
-
-/* How to get at a byte register from an index in the instruction at
- nibble n */
-char *breg[] =
-{"foo",
- "*(blow[b0])",
- "*(bhigh[b1])",
- "*(blow[b1])",
- 0, 0,
- "*(bhigh[pc[1]>>8])"};
-
-/* How to get at a word register from an index in the instruction at
- nibble n */
-
-char *wreg[] =
-{"foo",
- "*(wlow[b0])",
- "*(whigh[b1])",
- "*(wlow[b1])"};
-
-#define sorted_key noperands
-
-/* sort the opcode table into h8_opcodes_sorted[0..255] */
-static void
-init ()
-{
- unsigned int i;
- struct h8_opcode *p;
-
- for (p = h8_opcodes; p->name; p++)
- {
- int n1 = 0;
- int n2 = 0;
- int j;
-#if 0
- for (j = 0; p->data.nib[j] != E; j++)
- {
- if ((int) p->data.nib[j] == ABS16ORREL8SRC)
- p->data.nib[j] = ABS16SRC;
- if ((int) p->data.nib[j] == ABS16OR8SRC)
- p->data.nib[j] = ABS16SRC;
- if ((int) p->data.nib[j] == ABS16OR8DST)
- p->data.nib[j] = ABS16DST;
- }
-#endif
-
- if ((int) p->data.nib[0] < 16)
- {
- n1 = (int) p->data.nib[0];
- }
- else
- n1 = 0;
- if ((int) p->data.nib[1] < 16)
- {
- n2 = (int) p->data.nib[1];
- }
- else
- n2 = 0;
- for (i = 0; i < MAXSAME; i++)
- {
- int j = /* ((n3 >> 3) * 512) + ((n4 >> 3) * 256) + */ n1 * 16 + n2;
-
- if (h8_opcodes_sorted[j][i] == (struct h8_opcode *) NULL)
- {
- h8_opcodes_sorted[j][i] = p;
- p->sorted_key = j;
- break;
- }
- }
-
- if (i == MAXSAME)
- abort ();
-
- /* Just make sure there are an even number of nibbles in it, and
- that the count is the same s the length */
- for (i = 0; p->data.nib[i] != E; i++)
- /*EMPTY*/ ;
- if (i & 1)
- abort ();
- p->length = i / 2;
- }
- for (i = 0; i < PTWO; i++)
- {
- if (h8_opcodes_sorted[i][0])
- p = h8_opcodes_sorted[i][0];
- else
- h8_opcodes_sorted[i][0] = p;
- }
-}
-
-/* decode the lvalues, creating a pointer in real space to object -
- remember if the thing has to be swapped out of where it is */
-
-
-int swap[2];
-
-lval (p)
- struct h8_opcode *p;
-{
- int i;
-
- for (i = 0; p->data.nib[i] != E; i++)
- {
- int x = p->data.nib[i];
- int size;
- int op;
- op = (x & DST) ? 1 : 0;
-
- switch (x & SIZE)
- {
- case L_32:
- size = 32;
- break;
- case L_16:
- size = 16;
- break;
- case L_8:
- size = 8;
- break;
- default:
- size = 1234;
- }
-
- if (x & REG)
- {
- printf ("ir%d = GET_LVAL_%d_REG(%d);\n", op, size, i);
- }
- else if (x & IMM)
- {
- printf ("/* Imm has no lvalue */\n");
- }
-
- }
-
-
-
-}
-
-void
-decode (p, fetch, size)
- struct h8_opcode *p;
- int fetch;
- int size;
-{
- if (fetch)
- {
- lval (p);
- }
-
-}
-
-
-
-static void
-esleep ()
-{
- printf ("saved_state.exception = SIGSTOP;\n");
-}
-
-static void
-mov (p, s, sz)
- struct h8_opcode *p;
- char *s;
- int sz;
-{
- printf ("dst = srca;\n");
-}
-
-static void
-andc (p)
- struct h8_opcode *p;
-{
- printf ("SET_CCR(GET_CCR() & srca);\n");
-}
-
-static void
-addx (p)
- struct h8_opcode *p;
-{
- printf ("dst = srca + srcb+ (c != 0);\n");
-}
-
-static void
-subx (p)
- struct h8_opcode *p;
-{
- printf ("dst = srcb - srca - (c != 0);\n");
-}
-
-static void
-add (p, s, sz)
- struct h8_opcode *p;
- char *s;
- int sz;
-{
- printf ("%s;\n", s);
-}
-
-static void
-adds (p, s)
- struct h8_opcode *p;
- char *s;
-{
- printf ("%s;\n", s);
-}
-
-static void
-bra (p, a)
- struct h8_opcode *p;
- char *a;
-{
- printf ("if (%s) npc += ((char )b1)>>1;\n", a);
-}
-
-static void
-bsr (p, a)
- struct h8_opcode *p;
- char *a;
-{
- printf ("reg[7]-=2;\n");
- printf ("tmp = reg[7];\n");
- printf ("SET_WORD_MEM(tmp, (npc-saved_state.mem)*2);\n");
- printf ("npc += ((char)b1)>>1;\n");
-}
-
-static void
-cmp (p, a, s)
- struct h8_opcode *p;
- char *a;
- int s;
-{
- decode (p, 1, s);
- printf ("srca = -srca;\n");
- printf ("dst = srca + srcb;\n");
-}
-
-static
-void
-jsr (p, a, s)
- struct h8_opcode *p;
- char *a;
- int s;
-{
- printf ("if (b1 == 0xc4) {\n");
- printf ("printf(\"%%c\", reg[2]);\n");
- printf ("}\n");
- printf ("else {\n");
- printf ("reg[7]-=2;\n");
- printf ("tmp = reg[7];\n");
- printf ("SET_WORD_MEM(tmp, (npc-saved_state.mem)*2);\n");
- printf ("npc = (lval>>1) + saved_state.mem;\n");
- printf ("}");
-}
-
-static void
-jmp (p, a, s)
- struct h8_opcode *p;
- char *a;
- int s;
-{
- printf ("npc = (lval>>1) + saved_state.mem;\n");
-}
-
-static void
-rts (p, a, s)
- struct h8_opcode *p;
- char *a;
- int s;
-{
- printf ("tmp = reg[7];\n");
- printf ("reg[7]+=2;\n");
- printf ("npc = saved_state.mem + (WORD_MEM(tmp)>>1);\n");
-}
-
-static void
-rte (p, a, s)
- struct h8_opcode *p;
- char *a;
- int s;
-{
- printf ("reg[7]+=2;\n");
- printf ("tmp = reg[7];\n");
- printf ("reg[7]+=2;\n");
- printf ("SET_CCR(tmp);\n");
- printf ("npc = saved_state.mem + (WORD_MEM(tmp)>>1);\n");
-}
-
-static void
-setf (p, a, s)
- struct h8_opcode *p;
- char *a;
- int s;
-{
- printf ("tmp = GET_CCR();\n");
- printf ("tmp %s= srca;\n", a);
-}
-
-static void
-bpt (p, a, s)
- struct h8_opcode *p;
- char *a;
- int s;
-{
- printf ("saved_state.exception = SIGTRAP;\n");
- printf ("npc = pc;\n");
-}
-
-static void
-log (p, a, s)
- struct h8_opcode *p;
- char *a;
- int s;
-{
- printf ("dst = srcb %s srca;\n", a);
-}
-
-static void
-ulog (p, a, s)
- struct h8_opcode *p;
- char *a;
- int s;
-{
- printf ("dst = %s srcb ;\n", a);
-}
-
-static void
-nop ()
-{
-}
-
-static void
-rotl ()
-{
- printf ("c = srcb & 0x80;\n");
- printf ("dst = srcb << 1;\n");
- printf ("if (c) dst|=1;\n");
-}
-
-static void
-rotr ()
-{
- printf ("c = srcb & 1;\n");
- printf ("dst = srcb >> 1;\n");
- printf ("if (c) dst|=0x80;\n");
-}
-
-static void
-rotxl ()
-{
- printf ("tmp = srcb & 0x80;\n");
- printf ("dst = srcb << 1;\n");
- printf ("if (c) dst|=1;\n");
- printf ("c = tmp;\n");
-}
-
-static void
-rotxr ()
-{
- printf ("tmp = srcb & 1;\n");
- printf ("dst = srcb >> 1;\n");
- printf ("if (c) dst|=0x80;\n");
- printf ("c = tmp;\n");
-}
-
-static void
-shal ()
-{
- printf ("c = srcb&0x80;\n");
- printf ("dst = srcb << 1;\n");
-}
-
-static
-void
-shar ()
-{
- printf ("c = srcb&0x1;\n");
- printf ("if (srcb&0x80) dst = (srcb>>1) | 0x80;\n");
- printf ("else dst = (srcb>>1) &~ 0x80;\n");
-}
-
-static
-void
-shll ()
-{
- printf ("c = srcb&0x80;\n");
- printf ("dst = srcb << 1;\n");
-}
-
-static
-void
-shlr ()
-{
- printf ("c = srcb&0x1;\n");
- printf ("dst = (srcb>>1) &~ 0x80;\n");
-}
-
-static
-void
-divxu ()
-{
- printf ("srca = %s;\n", breg[2]);
- printf ("srcb = %s;\n", wreg[3]);
- printf ("n = srca & 0x80;\n");
- printf ("z = !srca;\n");
- printf ("if (srca) dst = srcb / srca;tmp = srcb %% srca;\n");
- printf ("%s = (dst & 0xff) | (tmp << 8);\n", wreg[3]);
-}
-
-static
-void
-mulxu ()
-{
- printf ("srca = %s;\n", breg[2]);
- printf ("srcb = %s;\n", wreg[3]);
-
- printf ("dst = (srcb&0xff) * srca;\n");
- printf ("%s = dst;\n", wreg[3]);
-}
-
-static
-void
-inc ()
-{
- printf ("dst = %s;\n", breg[3]);
- printf ("v = (dst==0x7f);\n");
- printf ("dst++;\n");
- printf ("%s= dst;\n", breg[3]);
-}
-
-static
-void
-bit (p, a, s)
- struct h8_opcode *p;
- char *a;
- int s;
-{
- printf ("%s\n", a);
-}
-
-static
-void
-dec ()
-{
- printf ("dst = %s;\n", breg[3]);
- printf ("v = (dst==0x80);\n");
- printf ("dst--;\n");
- printf ("%s = dst;\n", breg[3]);
-}
-
-char saf[] = "goto setflags;";
-char sf[] = "goto shiftflags;";
-char af8[] = "goto aluflags8;";
-char af16[] = "goto aluflags16;";
-char lf[] = "goto logflags;";
-char icf[] = "goto incflags;";
-char mf8[] = "goto movflags8;";
-char mf16[] = "goto movflags16;";
-char nx[] = "goto next;";
-
-struct
-{
- char *ftype;
- int decode;
- char *name;
- void (*func) ();
- char *arg;
- int size;
-
-}
-
-table[] =
-{
- {
- nx, 1, "bld", bit, "dst = srcb; c = (srcb>>srca)&1;", 8
- }
- ,
- {
- nx, 1, "bild", bit, "dst = srcb; c = !((srcb>>srca)&1);", 8
- }
- ,
- {
- nx, 1, "band", bit, "dst = srcb; c = C &&((srcb>>srca)&1);", 8
- }
- ,
- {
- nx, 1, "biand", bit, "dst = srcb; c = C &&(!((srcb>>srca)&1));", 8
- }
- ,
- {
- nx, 1, "bior", bit, "dst = srcb; c = C ||(!((srcb>>srca)&1));", 8
- }
- ,
- {
- nx, 1, "bor", bit, "dst = srcb; c = C ||(((srcb>>srca)&1));", 8
- }
- ,
- {
- nx, 1, "bixor", bit, "dst = srcb; c = C ^(!((srcb>>srca)&1));", 8
- }
- ,
- {
- nx, 1, "bxor", bit, "dst = srcb; c = C ^(((srcb>>srca)&1));", 8
- }
- ,
- {
- nx, 1, "bnot", bit, "dst = srcb ^ (1<<srca);", 8
- }
- ,
- {
- nx, 1, "bclr", bit, "dst = srcb & ~(1<<srca);", 8
- }
- ,
- {
- nx, 1, "bset", bit, "dst = srcb | (1<<srca);", 8
- }
- ,
- {
- nx, 1, "bst", bit, "dst = (srcb & ~(1<<srca))| ((C)<<srca);", 8
- }
- ,
- {
- nx, 1, "bist", bit, "dst = (srcb & ~(1<<srca))| ((!C)<<srca);", 8
- }
- ,
- {
- nx, 1, "btst", bit, "dst = srcb; z = !((srcb>>srca)&1);", 8
- }
- ,
- {
- icf, 0, "dec", dec, 0, 0
- }
- ,
- {
- icf, 0, "inc", inc, 0, 0
- }
- ,
- {
- saf, 1, "orc", setf, "|", 0
- }
- ,
- {
- saf, 1, "xorc", setf, "^", 0
- }
- ,
- {
- saf, 1, "andc", setf, "&", 0
- }
- ,
- {
- nx, 1, "nop", nop, 0, 0
- }
- ,
- {
- nx, 1, "bra", bra, "1", 0
- }
- ,
- {
- nx, 1, "brn", bra, "0", 0
- }
- ,
- {
- nx, 1, "bhi", bra, "(C||Z)==0", 0
- }
- ,
- {
- nx, 1, "bls", bra, "(C||Z)==1", 0
- }
- ,
- {
- nx, 1, "bcs", bra, "C==1", 0
- }
- ,
- {
- nx, 1, "bcc", bra, "C==0", 0
- }
- ,
- {
- nx, 1, "bpl", bra, "N==0", 0
- }
- ,
- {
- nx, 1, "bmi", bra, "N==1", 0
- }
- ,
- {
- nx, 1, "bvs", bra, "V==1", 0
- }
- ,
- {
- nx, 1, "bvc", bra, "V==0", 0
- }
- ,
- {
- nx, 1, "bge", bra, "(N^V)==0", 0
- }
- ,
- {
- nx, 1, "bgt", bra, "(Z|(N^V))==0", 0
- }
- ,
- {
- nx, 1, "blt", bra, "(N^V)==1", 0
- }
- ,
- {
- nx, 1, "ble", bra, "(Z|(N^V))==1", 0
- }
- ,
- {
- nx, 1, "beq", bra, "Z==1", 0
- }
- ,
- {
- nx, 1, "bne", bra, "Z==0", 0
- }
- ,
- {
- nx, 1, "bsr", bsr, "", 0
- }
- ,
- {
- nx, 1, "jsr", jsr, 0, 0
- }
- ,
- {
- nx, 1, "jmp", jmp, 0, 0
- }
- ,
- {
- nx, 0, "rts", rts, 0, 0
- }
- ,
- {
- nx, 0, "rte", rte, 0, 0
- }
- ,
- {
- nx, 1, "andc", andc, 0, 0
- }
- ,
- {
- sf, 1, "shal", shal, 0, 0
- }
- ,
- {
- sf, 1, "shar", shar, 0, 0
- }
- ,
- {
- sf, 1, "shll", shll, 0, 0
- }
- ,
- {
- sf, 1, "shlr", shlr, 0, 0
- }
- ,
- {
- sf, 1, "rotxl", rotxl, 0, 0
- }
- ,
- {
- sf, 1, "rotxr", rotxr, 0, 0
- }
- ,
- {
- sf, 1, "rotl", rotl, 0, 0
- }
- ,
- {
- sf, 1, "rotr", rotr, 0, 0
- }
- ,
- {
- lf, 1, "xor", log, "^", 0
- }
- ,
- {
- lf, 1, "and", log, "&", 0
- }
- ,
- {
- lf, 1, "or", log, "|", 0
- }
- ,
- {
- lf, 1, "not", ulog, " ~", 0
- }
- ,
- {
- lf, 1, "neg", ulog, " - ", 0
- }
- ,
- {
- nx, 1, "adds", adds, "dst = srca + srcb", 0
- }
- ,
- {
- nx, 1, "subs", adds, "srca = -srca; dst = srcb + srca", 0
- }
- ,
- {
- af8, 1, "add.b", add, "dst = srca + srcb", 8
- }
- ,
- {
- af16, 1, "add.w", add, "dst = srca + srcb", 16
- }
- ,
- {
- af16, 1, "sub.w", add, "srca = -srca; dst = srcb + srca", 16
- }
- ,
- {
- af8, 1, "sub.b", add, "srca = -srca; dst = srcb + srca", 8
- }
- ,
- {
- af8, 1, "addx", addx, 0, 8
- }
- ,
- {
- af8, 1, "subx", subx, 0, 8
- }
- ,
- {
- af8, 0, "cmp.b", cmp, 0, 8
- }
- ,
- {
- af16, 0, "cmp.w", cmp, 0, 16
- }
- ,
- {
- nx, 1, "sleep", esleep, 0, 0
- }
- ,
- {
- nx, 0, "bpt", bpt, 0, 8
- }
- ,
- {
- nx, 0, "divxu", divxu, 0, 0
- }
- ,
- {
- nx, 0, "mulxu", mulxu, 0, 0
- }
- ,
- {
- mf8, 1, "mov.b", mov, 0, 8
- }
- ,
- {
- mf8, 1, "movtpe", mov, 0, 8
- }
- ,
- {
- mf8, 1, "movfpe", mov, 0, 8
- }
- ,
- {
- mf16, 1, "mov.w", mov, 0, 16
- }
- ,
- {
- 0
- }
-};
-
-static
-void
-edo (p)
- struct h8_opcode *p;
-{
- int i;
-
- printf ("%s %s %s\n", cs, p->name, ce);
-
- for (i = 0; table[i].name; i++)
- {
- if (strcmp (table[i].name, p->name) == 0)
- {
- printf ("{\n");
- if (table[i].decode)
- decode (p, 1, table[i].size);
- printf ("cycles += %d;\n", p->time);
- printf ("npc = pc + %d;\n", p->length / 2);
- table[i].func (p, table[i].arg, table[i].size);
- if (table[i].decode)
- decode (p, 0, table[i].size);
- if (table[i].ftype)
- printf (table[i].ftype);
- else
- printf ("goto next;\n");
- printf ("}\n");
- return;
- }
- }
- printf ("%s not found %s\n", cs, ce);
- printf ("saved_state.exception = SIGILL;\n");
- printf ("break;\n");
-}
-
-static
-int
-owrite (i)
- int i;
-{
- /* write if statements to select the right opcode */
- struct h8_opcode **p;
- int needand = 1;
-
- p = h8_opcodes_sorted[i];
- printf ("case 0x%03x:\n", i);
-
- if (p[1] == 0)
- {
- /* See if the next few also match */
- while (h8_opcodes_sorted[i + 1][0] == *p)
- {
- i++;
- printf ("case 0x%03x:\n", i);
- }
-
- /* Don't need any if's this is the only one */
- edo (*p);
- }
- else
- {
- while (*p)
- {
- /* start two nibbles in since we know we match in the first byte */
- int c;
- int nib = 2;
- int byte = 1;
- int mask1[5];
- int mask0[5];
- int nibshift = 4;
- int any = 0;
-
- for (c = 0; c < 5; c++)
- {
- mask1[c] = 0;
- mask0[c] = 0;
- }
- printf ("%s %x%x", cs, (*p)->data.nib[0], (*p)->data.nib[1]);
- while ((c = (*p)->data.nib[nib]) != E)
- {
- if (c & B30)
- {
- /* bit 3 must be zero */
- mask0[byte] |= 0x8 << nibshift;
- printf ("0");
- any = 1;
- }
- else if (c & B31)
- {
- /* bit 3 must be one */
- mask1[byte] |= 0x8 << nibshift;
- printf ("8");
- any = 1;
- }
- else if (c <= HexF)
- {
- mask0[byte] |= ((~c) & 0xf) << nibshift;
- mask1[byte] |= (c & 0xf) << nibshift;
- printf ("%x", c);
- any = 1;
- }
- else
- {
- printf ("x");
- }
- nib++;
- if (nibshift == 4)
- {
- nibshift = 0;
- }
- else
- {
- byte++;
- nibshift = 4;
- }
- }
- printf ("*/\n");
- if (any)
- {
- printf ("if (");
- needand = 0;
- for (c = 1; c < byte; c++)
- {
- if (mask0[c] | mask1[c])
- {
- int sh;
-
- if (needand)
- printf ("\n&&");
- if (c & 1)
- sh = 0;
- else
- sh = 8;
- if (c / 2 == 0 && sh == 0)
- printf ("((b1&0x%x)==0x%x)", mask0[c] | mask1[c],
- mask1[c]);
- else
- {
- printf ("((pc[%d]&(0x%02x<<%d))==(0x%x<<%d))",
- c / 2, mask0[c] | mask1[c], sh,
- mask1[c], sh);
- }
-
- needand = 1;
- }
- }
- printf (")\n");
- }
- edo (*p);
- p++;
-
- }
- }
- return i;
-}
-
-static
-void
-remove_dups ()
-{
- struct h8_opcode *s;
- struct h8_opcode *d;
-
- for (d = s = h8_opcodes; s->name; s++)
- {
- int doit = 1;
-
- if (strcmp (s->name, "push") == 0)
- doit = 0;
- if (strcmp (s->name, "bhs") == 0)
- doit = 0;
- if (strcmp (s->name, "blo") == 0)
- doit = 0;
- if (strcmp (s->name, "bt") == 0)
- doit = 0;
- if (strcmp (s->name, "bf") == 0)
- doit = 0;
- if (strcmp (s->name, "pop") == 0)
- doit = 0;
- if (doit)
- {
- *d++ = *s;
- }
- }
- *d++ = *s++;
-}
-
-int
-main ()
-{
- int i;
-
- remove_dups ();
- init ();
-
- printf ("%s do the operation %s\n", cs, ce);
- printf ("switch (b0) \n{\n");
- for (i = 0; i < PTWO; i++)
- {
- i = owrite (i);
- }
- printf ("}\n");
-
- return 0;
-}
diff --git a/sim/h8500/ChangeLog b/sim/h8500/ChangeLog
deleted file mode 100644
index af4f78470bb..00000000000
--- a/sim/h8500/ChangeLog
+++ /dev/null
@@ -1,425 +0,0 @@
-Tue May 23 21:39:23 2000 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Thu Sep 2 18:15:53 1999 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-1999-05-08 Felix Lee <flee@cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Tue Apr 28 18:33:31 1998 Geoffrey Noer <noer@cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Sun Apr 26 15:31:55 1998 Tom Tromey <tromey@creche>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
- * config.in: Ditto.
-
-Sun Apr 26 15:20:11 1998 Tom Tromey <tromey@cygnus.com>
-
- * acconfig.h: New file.
- * configure.in: Reverted change of Apr 24; use sinclude again.
-
-Fri Apr 24 14:16:40 1998 Tom Tromey <tromey@creche>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
- * config.in: Ditto.
-
-Fri Apr 24 11:19:40 1998 Tom Tromey <tromey@cygnus.com>
-
- * configure.in: Don't call sinclude.
-
-Sat Apr 4 20:36:25 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Fri Mar 27 16:15:52 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Wed Mar 25 12:35:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Wed Mar 18 12:38:12 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Tue Feb 17 12:43:42 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * compile.c (sim_store_register, sim_fetch_register): Pass in
- length parameter. Return -1.
- (sim_create_inferior): Pass 4 into sim_store_register.
-
-Sun Feb 1 16:47:51 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Sat Jan 31 18:15:41 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Mon Jan 19 22:26:29 1998 Doug Evans <devans@seba>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Mon Dec 15 23:17:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
- * config.in: Ditto.
-
-Thu Dec 4 09:21:05 1997 Doug Evans <devans@canuck.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Wed Oct 22 14:43:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * compile.c (sim_load): Pass lma_p and sim_write args to
- sim_load_file.
-
-Fri Oct 3 09:28:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Wed Sep 24 17:38:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Tue Sep 23 11:04:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Mon Sep 22 11:46:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Fri Sep 19 17:45:25 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Mon Sep 15 17:36:15 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Thu Sep 4 17:21:23 1997 Doug Evans <dje@seba>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Wed Aug 27 18:13:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
- * config.in: Ditto.
-
-Tue Aug 26 10:39:07 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * compile.c (sim_kill): Delete.
- (sim_create_inferior): Add ABFD argument.
- (sim_load): Move setting of PC from here.
- (sim_create_inferior): To here.
-
-Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
- * config.in: Ditto.
-
-Mon Aug 25 15:51:53 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * compile.c (sim_open): Add ABFD argument.
-
-Tue May 20 10:33:19 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * compile.c (sim_set_callbacks): Delete SIM_DESC argument.
- (sim_open): Add callback argument.
-
-Thu Apr 24 00:39:51 1997 Doug Evans <dje@canuck.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Fri Apr 18 14:02:10 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * compile.c (sim_stop): New function.
-
-Thu Apr 17 03:11:06 1997 Doug Evans <dje@canuck.cygnus.com>
-
- * Makefile.in (SIM_OBJS): Add sim-load.o.
- * compile.c: #include bfd.h.
- (sim_kind, myname, start_address): New static locals.
- (sim_open): Set sim_kind, myname.
- (sim_load): Return SIM_RC. New arg abfd. Call sim_load_file to
- load file into simulator. Set start address from bfd.
- (sim_create_inferior): Return SIM_RC. Delete arg start_address.
-
-Wed Apr 16 17:34:41 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * inst.h (H8500_MSIZE): Rename from MSIZE.
- * compile.c (sim_read, sim_write, init_pointers): Update.
-
-Mon Apr 7 15:45:02 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
- * config.in: Ditto.
-
-Wed Apr 2 15:06:28 1997 Doug Evans <dje@canuck.cygnus.com>
-
- * compile.c (sim_open): New arg `kind'.
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Wed Apr 2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Wed Mar 19 01:14:00 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Mon Mar 17 15:10:07 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
-
- * configure: Re-generate.
-
-Fri Mar 14 10:34:11 1997 Michael Meissner <meissner@cygnus.com>
-
- * configure: Regenerate to track ../common/aclocal.m4 changes.
-
-Thu Mar 13 12:50:28 1997 Doug Evans <dje@canuck.cygnus.com>
-
- * compile.c (sim_open): New SIM_DESC result. Argument is now in
- argv form.
- (other sim_*): New SIM_DESC argument.
-
-Tue Feb 4 13:36:29 1997 Doug Evans <dje@canuck.cygnus.com>
-
- * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
- COMMON_{PRE,POST}_CONFIG_FRAG instead.
- * configure.in: sinclude ../common/aclocal.m4.
- * configure: Regenerated.
-
-Thu Jan 23 11:46:23 1997 Stu Grossman (grossman@critters.cygnus.com)
-
- * configure configure.in Makefile.in: Update to new configure
- scheme which is more compatible with WinGDB builds.
- * configure.in: Improve comment on how to run autoconf.
- * configure: Re-run autoconf to get new ../common/aclocal.m4.
- * Makefile.in: Use autoconf substitution to install common
- makefile fragment.
-
-Wed Nov 20 01:48:23 1996 Doug Evans <dje@canuck.cygnus.com>
-
- * Makefile.in: Delete stuff moved to ../common/Make-common.in.
- * configure.in: Simplify using macros in ../common/aclocal.m4.
- * configure: Regenerated.
- (SIM_OBJS,SIM_EXTRA_CFLAGS): Define.
- * compile.c (sim_set_simcache_size): Renamed from sim_csize.
- (sim_size) New function.
- (sim_callback): New global. Redirect all calls to printf_filtered
- through callback.
- (sim_set_callbacks): Record callback.
- * run.c: Delete, using one in ../common now.
- * tconfig.in: New file.
-
-Thu Oct 3 16:14:08 1996 Jason Molenda (crash@godzilla.cygnus.co.jp)
-
- * Makefile.in (mostlyclean): Don't remove config.log here.
-
-Wed Jun 26 12:23:39 1996 Jason Molenda (crash@godzilla.cygnus.co.jp)
-
- * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
- INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
- (docdir): Removed.
- * configure.in (AC_PREREQ): autoconf 2.5 or higher.
- (AC_PROG_INSTALL): Added.
- * configure: Rebuilt.
-
-Wed Feb 21 12:15:46 1996 Ian Lance Taylor <ian@cygnus.com>
-
- * configure: Regenerate with autoconf 2.7.
-
-Fri Oct 13 15:03:48 1995 steve chamberlain <sac@slash.cygnus.com>
-
- * compile.c (sim_set_callbacks): New.
-
-Tue Oct 10 11:10:36 1995 Fred Fish <fnf@cygnus.com>
-
- * Makefile.in (BISON): Remove macro.
-
-Wed Sep 20 13:35:24 1995 Ian Lance Taylor <ian@cygnus.com>
-
- * Makefile.in (maintainer-clean): New synonym for realclean.
-
-Fri Sep 8 12:38:31 1995 Ian Lance Taylor <ian@cygnus.com>
-
- * Makefile.in (install): Don't install in $(tooldir).
-
- * configure.in: Call AC_CONFIG_HEADER. Don't try to use
- bfd/hosts/*.h file or bfd/config/*.mh file. Call AC_PROG_CC and
- AC_PROG_RANLIB. Substitute in values for CFLAGS, HDEFINES and AR.
- Call AC_CHECK_HEADERS for stdlib.h and time.h. Touch stamp.h if
- creating config.h.
- * configure: Rebuild.
- * config.in: New file, created by autoheader.
- * Makefile.in (AR): Define as @AR@.
- (CC): New variable, defined as @CC@.
- (CFLAGS): Define as @CFLAGS@.
- (RANLIB): Define as @RANLIB@.
- (HDEFINES, TDEFINES): New variables.
- (@host_makefile_frag@): Remove.
- (compile.o, run.o): Depend upon config.h.
- (mostlyclean): Make the same as clean, not distclean.
- (clean): Remove config.log.
- (distclean): Remove config.h and stamp-h.
- (Makefile): Don't depend upon @frags@. Just rebuild Makefile when
- invoking config.status.
- (config.h, stamp-h): New targets.
- * compile.c: Include "config.h". Don't include <sys/times.h>.
- Include <time.h> and <stdlib.h> if they exist. Don't include
- "sysdep.h".
- * run.c: Include "config.h". Include <stdlib.h> if it exists.
- Don't include "sysdep.h". Include "bfd.h", not "../../bfd/bfd.h".
-
-Thu Aug 10 16:29:23 1995 Doug Evans <dje@canuck.cygnus.com>
-
- * compile.c (trap): Watch for abort.
- * run.c (main): Return non-zero exit code if we didn't
- exit cleanly.
-
-Thu Aug 10 09:44:20 1995 steve chamberlain <sac@slash.cygnus.com>
-
- * compile.c (find): Fix another thinko.
- * sim_resume (O_JSR): Make sure all JSRs stay in the same page.
-
-Thu Aug 10 13:43:47 1995 Ian Lance Taylor <ian@cygnus.com>
-
- * Makefile.in (compile.o): Remove build rule.
- (.c.o): Add generic build rule.
-
-Wed Aug 9 09:46:41 1995 steve chamberlain <sac@slash.cygnus.com>
-
- * Makefile.in: Fix CSEARCH.
- * compile.c (find): Handle ABS24 and ABS16 correctly.
- Make JMP and JSR stay in right page.
-
-Thu Aug 3 10:45:37 1995 Fred Fish <fnf@cygnus.com>
-
- * Update all FSF addresses except those in COPYING* files.
-
-Wed Jul 5 14:32:54 1995 J.T. Conklin <jtc@rtl.cygnus.com>
-
- * Makefile.in (clean): Remove run.
- (distclean): Remove Makefile.
-
- * h8500.mt: Removed.
-
- * Makefile.in, configure.in: converted to autoconf.
- * configure: New file, generated with autconf 2.4.
-
-Fri Jun 30 16:50:56 1995 Stan Shebs <shebs@andros.cygnus.com>
-
- * compile.c (sim_do_command): New function.
-
-Wed May 24 16:31:38 1995 Jim Wilson <wilson@chestnut.cygnus.com>
-
- * configure.in: Fix typo in last change.
-
-Mon Mar 27 10:32:34 1995 J.T. Conklin <jtc@rtl.cygnus.com>
-
- * run.c: parse arguments with getopt().
-
-Tue Feb 28 17:30:29 1995 Ian Lance Taylor <ian@cygnus.com>
-
- * configure.in: Use ../../bfd/hosts/std-host.h if specific
- host unavailable.
-
-Wed May 18 13:58:05 1994 Doug Evans (dje@canuck.cygnus.com)
-
- * compile.c (sim_*): Change result to void where there isn't one.
- (sim_resume): Fix subroutine calling (push return address).
- (sim_set_pc): Delete.
- (sim_info): Delete printf_fn arg, all callers changed.
- Call printf_filtered instead.
- (sim_create_inferior): Renamed from sim_set_args.
- (sim_close): New function.
- (sim_load): New function.
- * run.c: #include <varargs.h>, "remote-sim.h".
- (printf_filtered): New function.
-
-Sat Dec 11 16:35:34 1993 Steve Chamberlain (sac@thepub.cygnus.com)
-
- * compile.c (segforreg): New vector. (sim_resume): Get Z flag
- right for bitops. (sim_store_register, sim_fetch_register,
- sim_set_pc): Use new register naming convention.
-
-Thu Oct 28 19:31:24 1993 Doug Evans (dje@canuck.cygnus.com)
-
- * compile.c: #include "ansidecl.h" for remote-sim.h.
-
-Tue Oct 26 10:02:18 1993 Doug Evans (dje@canuck.cygnus.com)
-
- * Makefile.in (CSEARCH): Add -I$(srcdir)/../../gdb.
- * compile.c: #include "sysdep.h" and "remote-sim.h".
- (SET_SEGREG): Protect arg `y' with parens.
- (sim_resume): New arg `siggnal'.
- (sim_write): Use SIM_ADDR for type of arg `addr', int result.
- (sim_read): Ditto, use unsigned char * for arg `buf'.
- (sim_store_register): int result, value passed by reference.
- (sim_fetch_register): int result, use unsigned char * for arg `buf'.
- (sim_trace): Update call to sim_resume.
- (sim_stop_reason): Renamed from sim_stop_signal, new arg `reason',
- int result (error code, currently always 0).
- (sim_set_pc): Update calls to sim_store_register.
- (sim_info): int result, new args `print_fn', `verbose'.
- (sim_kill): int result.
- (sim_open): Ditto, new arg `name'.
- * run.c (main): Update call to sim_info.
-
-Sat Oct 23 15:06:10 1993 Doug Evans (dje@canuck.cygnus.com)
-
- * compile.c (sim_stop_signal): Result is now enum sim_stop.
-
-Fri Oct 15 23:52:55 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
-
- * compile.c (sim_kill, sim_open, sim_set_args): New functions.
-
-Tue Aug 17 07:17:09 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
-
- * compile.c (sim_info): Don't work out simulation ration if
- timetaken is zero.
-
-Mon Aug 2 14:08:24 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
-
- * compile.c (get_now, now_persec): Use time system call. (find) do
- pjmps right.
-
-Tue Jul 13 12:20:19 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
-
- * compile.c (sim_set_pc): set cp at the same time. (sim_resume):
- fix pjsr and pjmp.
-
-Tue Jun 8 14:34:37 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
-
- * compile.c: Remove endian.h dependency.
-
-Mon Apr 5 10:08:30 1993 Steve Chamberlain (sac@thepub.cygnus.com)
-
- * run.c (main): Now understands -v.
- * compile.c: Passes all the tests in small model.
-
-Mon Mar 29 13:20:36 1993 Steve Chamberlain (sac@thepub.cygnus.com)
-
- * run.c, inst.h compile.c: bug fixes,
-
-Thu Mar 25 12:21:18 1993 Stu Grossman (grossman@cygnus.com)
-
- * compile.c (sim_store_register): Use GDB names for registers to
- avoid version skew problems.
- * (sim_fetch_register): Ditto, also return only bits that
- actually exist.
- * configure.in: Fix srctrigger & srcname to reflect h8500, not h8300.
-
-Fri Mar 19 14:46:31 1993 Steve Chamberlain (sac@thepub.cygnus.com)
-
- * inst.h, compile.c, run.c: New files.
-
diff --git a/sim/h8500/Makefile.in b/sim/h8500/Makefile.in
deleted file mode 100644
index ead808e13ba..00000000000
--- a/sim/h8500/Makefile.in
+++ /dev/null
@@ -1,28 +0,0 @@
-# Makefile template for Configure for the h8500 sim library.
-# Copyright (C) 1990, 91, 92, 95, 96, 1997 Free Software Foundation, Inc.
-# Written by Cygnus Support.
-#
-# This program is free software; you can redistribute it and/or modify
-# it under the terms of the GNU General Public License as published by
-# the Free Software Foundation; either version 2 of the License, or
-# (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
-## COMMON_PRE_CONFIG_FRAG
-
-SIM_OBJS = compile.o sim-load.o
-# FIXME: This is probably a hack to get a syscall.h. better support for
-# syscall.h is in progress.
-SIM_EXTRA_CFLAGS = -I$(srcdir)/../../newlib/libc/sys/z8k
-
-## COMMON_POST_CONFIG_FRAG
-
-compile.o: compile.c config.h
diff --git a/sim/h8500/acconfig.h b/sim/h8500/acconfig.h
deleted file mode 100644
index f9b87a10c60..00000000000
--- a/sim/h8500/acconfig.h
+++ /dev/null
@@ -1,15 +0,0 @@
-
-/* Define to 1 if NLS is requested. */
-#undef ENABLE_NLS
-
-/* Define as 1 if you have catgets and don't want to use GNU gettext. */
-#undef HAVE_CATGETS
-
-/* Define as 1 if you have gettext and don't want to use GNU gettext. */
-#undef HAVE_GETTEXT
-
-/* Define as 1 if you have the stpcpy function. */
-#undef HAVE_STPCPY
-
-/* Define if your locale.h file contains LC_MESSAGES. */
-#undef HAVE_LC_MESSAGES
diff --git a/sim/h8500/compile.c b/sim/h8500/compile.c
deleted file mode 100644
index 1aad644fa8a..00000000000
--- a/sim/h8500/compile.c
+++ /dev/null
@@ -1,2519 +0,0 @@
-/* Simulator for the Hitachi H8/500 architecture.
-
- Written by Steve Chamberlain of Cygnus Support.
- sac@cygnus.com
-
- This file is part of H8/500 sim
-
-
- THIS SOFTWARE IS NOT COPYRIGHTED
-
- Cygnus offers the following for use in the public domain. Cygnus
- makes no warranty with regard to the software or it's performance
- and the user accepts the software "AS IS" with all faults.
-
- CYGNUS DISCLAIMS ANY WARRANTIES, EXPRESS OR IMPLIED, WITH REGARD TO
- THIS SOFTWARE INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.
-
-*/
-
-#include "config.h"
-
-#include <signal.h>
-#ifdef HAVE_STDLIB_H
-#include <stdlib.h>
-#endif
-#ifdef HAVE_TIME_H
-#include <time.h>
-#endif
-#include <sys/param.h>
-#include <setjmp.h>
-#include "ansidecl.h"
-#include "bfd.h"
-#include "callback.h"
-#include "remote-sim.h"
-
-#define O_RECOMPILE 85
-#define DEFINE_TABLE
-#define DISASSEMBLER_TABLE
-
-/* FIXME: Needs to live in header file.
- This header should also include the things in remote-sim.h.
- One could move this to remote-sim.h but this function isn't needed
- by gdb. */
-void sim_set_simcache_size PARAMS ((int));
-
-int debug;
-
-host_callback *sim_callback;
-
-static SIM_OPEN_KIND sim_kind;
-static char *myname;
-
-/* This code can be compiled with any old C compiler, in which case
- four or five switch statements will be executed for each
- instruction simulated. It can be compiled with GCC, then the
- simulated instructions thread through the code fragments, and
- everything goes much faster.
-
- These definitions make the code work either way
-*/
-#ifdef __GNUC__
-#define DISPATCH(X) goto *(X); do
-#define LABEL(X) X##_L
-#define LABELN(X,N) X##_L##N
-#define LABEL_REF(X) &&X##_L
-#define LABEL_REFN(X,N) &&X##_L##N
-#define ENDDISPATCH while (0);
-#define fastref void *
-
-#define DEFAULT ;
-#define INLINE __inline__
-#else
-#define DEFAULT default :
-#define DISPATCH(X) switch (X)
-#define LABEL(X) case X
-#define LABELN(X,N) case X
-#define LABEL_REF(X) X
-#define LABEL_REFN(X,N) X
-#define ENDDISPATCH
-#define fastref int
-
-
-
-#define INLINE
-#define STORE_REG_B 1
-#define STORE_REG_W 2
-#define STORE_INC_B 3
-#define STORE_INC_W 4
-#define STORE_DEC_B 5
-#define STORE_DEC_W 6
-#define STORE_DISP_B 7
-#define STORE_DISP_W 8
-#define STORE_CRB 9
-#define STORE_CRW 10
-#define STORE_REG_L 11
-#define STORE_NOP 12
-
-#define FETCH_NOP 9
-#define FETCH_REG_B 10
-#define FETCH_REG_W 11
-#define FETCH_INC_B 12
-#define FETCH_INC_W 13
-#define FETCH_DEC_B 14
-#define FETCH_DEC_W 15
-#define FETCH_DISP_B 16
-#define FETCH_DISP_W 17
-#define FETCH_IMM 18
-#define FETCH_CRB 19
-#define FETCH_CRW 20
-#define FETCH_LVAL 21
-#define FETCH_LVAL24 22
-#define FETCH_REG_L 23
-
-#define FLAG_m 20
-#define FLAG_M 21
-#define FLAG_A 22
-#define FLAG_NONE 23
-#define FLAG_NOSTORE 24
-#define FLAG_CLEAR 25
-#define FLAG_a 26
-#define FLAG_BRANCH 27
-#define FLAG_special 28
-
-#define FLAG_shiftword 29
-#define FLAG_shiftbyte 30
-
-#define FLAG_multword 31
-#define FLAG_multbyte 32
-#endif
-
-
-#define h8500_table h8500_compile_table
-#include "../opcodes/h8500-opc.h"
-
-#include "inst.h"
-
-#define LOW_BYTE(x) ((x) & 0xff)
-#define HIGH_BYTE(x) (((x)>>8) & 0xff)
-#define NORMAL_CP ((cpu.regs[R_CP].c - cpu.memory)>>16)
-#define NORMAL_DP ((cpu.regs[R_DP].c - cpu.memory)>>16)
-#define NORMAL_EP ((cpu.regs[R_EP].c - cpu.memory)>>16)
-#define NORMAL_TP ((cpu.regs[R_TP].c - cpu.memory)>>16)
-#define SET_NORMREG(x,y) ((cpu.regs[x].l = (y)))
-#define GET_NORMREG(x) (cpu.regs[x].l)
-#define SET_SEGREG(x,y) { cpu.regs[x].c = ((y) & 0xff0000) + cpu.memory;}
-#define GET_SEGREG(x) ( (cpu.regs[x].c - cpu.memory ) >> 16)
-#define SET_NORMAL_CPPC(x) { pc = (x) & 0xffff; SET_SEGREG(R_CP, (x));}
-#define NORMAL_SR ((N<<3)|(Z<<2)|(V<<1)|(C))
-#define P(X,Y) ((X<<8) | Y)
-
-#define BUILDSR() cpu.regs[R_SR].s[LOW] = (N << 3) | (Z << 2) | (V<<1) | C;
-
-#define GETSR() \
- C = (cpu.regs[R_SR].s[LOW] >> 0) & 1;\
- V = (cpu.regs[R_SR].s[LOW] >> 1) & 1;\
- Z = (cpu.regs[R_SR].s[LOW] >> 2) & 1;\
- N = (cpu.regs[R_SR].s[LOW] >> 3) & 1;
-
-#ifdef __CHAR_IS_SIGNED__
-#define SEXTCHAR(x) ((char)(x))
-#endif
-
-#ifndef SEXTCHAR
-#define SEXTCHAR(x) ((x & 0x80) ? (x | ~0xff):x)
-#endif
-
-#define SEXTSHORT(x) ((short)(x))
-
-/* Which segment registers go with which pointer registers */
-static unsigned char **segmap[R_LAST];
-static unsigned char *(regptr[R_LAST][3]);
-static unsigned char *(segregptr[R_LAST][3]);
-static cpu_state_type cpu;
-
-static int segforreg[] = {R_DP, R_DP, R_DP, R_DP,
- R_EP, R_EP, R_TP, R_TP,
- R_DP, R_DP, R_DP, R_DP,
- R_EP, R_EP, R_TP, R_TP};
-int LOW;
-int HIGH;
-
-/* routines for getting and storing args */
-#define elval(struct, lit) \
- (((*(struct.reg.wptr) + lit) & 0xffff) + (*(struct.r2.segreg)))
-
-#define displval(s) elval((s),(s).literal)
-
-#define ireglval(struct) elval(struct, 0)
-#define wordat(x) (((x)[0] << 8) | (x)[1])
-#define longat(x) ((wordat((x))<<16)|(wordat((x)+2)))
-#define byteat(x) ((x)[0])
-
-#define setwordat(x,y) {x[0] =( y)>>8; x[1] = y;}
-#define setbyteat(x,y) {x[0] = y;}
-
-/*#define setalignedwordat(x,y) {((short *)x)[0] =y;}*/
-/*
-statics
-*/
-
-ea_type rd;
-ea_type rs;
-ea_type imm;
-ea_type cr;
-ea_type ea;
-ea_type nop;
-ea_type lval;
-ea_type lval24;
-
-ea_type eavector[2];
-
-int disp;
-
-#define JBYTE 0
-#define JWORD 1
-#define JLONG 2
-
-typedef union
-{
- struct
- {
- fastref srcabyte;
- fastref srcaword;
- fastref srcalong;
-
- fastref srcbbyte;
- fastref srcbword;
- fastref srcblong;
-
- fastref dstbyte;
- fastref dstword;
- fastref dstlong;
- } s;
- struct
- {
- fastref byte;
- fastref word;
- fastref lon;
- } a[3];
-
- fastref j[9];
-} size_ptr;
-
-union
-{
- struct ea_struct
- {
- size_ptr ea_nop;
- size_ptr ea_reg;
- size_ptr ea_inc;
- size_ptr ea_dec;
- size_ptr ea_disp;
-
- size_ptr ea_imm;
- size_ptr ea_cr;
- size_ptr ea_lval;
- size_ptr ea_lval24;
- } s;
-#define N_EATYPES (sizeof(struct ea_struct) / sizeof(size_ptr))
- size_ptr a[N_EATYPES];
-} eas;
-
-/* This function takes an ea structure filled in for the 1st source
- operand and modifies it to be for either the 1st, 2nd or dst operand */
-
-static void
-howto_workout (encoded, semiencoded, n)
- ea_type *encoded;
- ea_type *semiencoded;
- int n;
-{
- int i;
- *encoded = *semiencoded;
-
- for (i = 0; i < N_EATYPES; i++)
- {
- if (encoded->type == eas.a[i].s.srcabyte)
- {
- encoded->type = eas.a[i].a[n].byte;
- return;
- }
- else if (encoded->type == eas.a[i].s.srcaword)
- {
- encoded->type = eas.a[i].a[n].word;
- return;
- }
- else if (encoded->type == eas.a[i].s.srcalong)
- {
- encoded->type = eas.a[i].a[n].lon;
- return;
- }
- }
-
- abort ();
-}
-
-fastref flag_shiftword;
-fastref flag_shiftbyte;
-fastref flag_multword;
-fastref flag_multbyte;
-fastref flag_mp;
-fastref flag_special;
-fastref flag_Mp;
-fastref flag_ap;
-fastref flag_Ap;
-fastref flag_nonep;
-fastref flag_nostorep;
-fastref flag_clearp;
-fastref flag_branch;
-fastref exec_dispatch[100];
-
-static int
-get_now ()
-{
- return time (0);
-}
-
-static int
-now_persec ()
-{
- return 1;
-}
-
-static void
-gotcr (ptr, n)
- ea_type *ptr;
- int n;
-{
- int size;
- n &= 0x7;
- if (n == 0)
- {
- abort ();
- }
- else
- {
- ptr->type = eas.s.ea_cr.j[JBYTE];
- ptr->reg.bptr = segregptr[n][JLONG];
- }
-}
-static void
-gotreg (ptr, n, size)
- ea_type *ptr;
- int n;
- int size;
-{
- n &= 0x7;
- ptr->type = eas.s.ea_reg.j[size];
- ptr->reg.bptr = regptr[n][size];
-}
-
-static void
-gotinc (ptr, n, inc, size)
- ea_type *ptr;
- int n;
- int size;
-{
- n &= 0x7;
- if (inc > 0)
- {
- ptr->type = eas.s.ea_inc.j[size];
- }
- else
- {
- ptr->type = eas.s.ea_dec.j[size];
- }
- ptr->reg.bptr = regptr[n][JWORD];
- ptr->r2.segreg = segmap[n];
-}
-
-
-static void
-gotabs (ptr, disp, reg, size)
- ea_type *ptr;
- int disp;
- int reg;
- int size;
-{
- ptr->type = eas.s.ea_disp.j[size];
- ptr->reg.bptr = regptr[reg][JWORD];
- ptr->r2.segreg = segmap[reg];
- ptr->literal = disp;
-}
-
-static void
-gotind (ptr, disp, reg, size)
- ea_type *ptr;
- int disp;
- int reg;
- int size;
-{
- gotabs (ptr, disp, reg & 0x7, size);
-}
-
-static void
-gotimm (ptr, val)
- ea_type *ptr;
- int val;
-{
- ptr->type = eas.s.ea_imm.j[0];
- ptr->literal = val;
-}
-
-static void
-indoff (ptr)
- ea_type *ptr;
-{
- int i;
- for (i = 0; i < 6; i++)
- {
- if (ptr->type == eas.s.ea_disp.j[i])
- {
- ptr->type = eas.s.ea_lval.j[i];
- return;
- }
- }
-}
-
-thinkabout_shifts (d, bytesized)
- decoded_inst *d;
- int bytesized;
-{
- if (bytesized)
- {
- /* Got a byte shift, fake up second arg */
- d->srcb.type = eas.s.ea_imm.s.srcbword;
- d->srcb.literal = 8;
- }
- else
- {
- /* got a word shift, fake up second arg */
- d->srcb.type = eas.s.ea_imm.s.srcbword;
- d->srcb.literal = 16;
- }
-}
-
-/* Calculate the number of cycles required to run this
- instruction
-*/
-static void
-compcycles (dst, opcode)
- decoded_inst *dst;
- h8500_opcode_info *opcode;
-{
- int cycles = 0;
- /* Guess for the time being - 1 cycle for the first two bytes in the
- opcode - to fecth the operand, and 3 cycles for all the rest of
- the bytes, since they mean that there is probably an operand to
- fetch */
-
- switch (opcode->length)
- {
- case 1:
- case 2:
- cycles += opcode->length;
- break;
- default:
- cycles += opcode->length * 3;
- break;
- }
-
- dst->cycles = cycles;
-}
-
-static void
-translate (ptr, from, to)
- ea_type *ptr;
- fastref from;
- fastref to;
-{
- if (ptr->reg.wptr == &cpu.regs[7].s[LOW]
- && ptr->type == from)
- {
- ptr->type = to;
- }
-}
-
-static
-void
-fix_incdecs (dst)
- decoded_inst *dst;
-{
- if (dst->dst.type == eas.s.ea_inc.s.dstbyte
- && (dst->srca.type == eas.s.ea_inc.s.srcabyte
- || dst->srcb.type == eas.s.ea_inc.s.srcbbyte))
- {
- dst->dst.type = eas.s.ea_disp.s.dstbyte;
- }
-
- if (dst->dst.type == eas.s.ea_inc.s.dstword
- && (dst->srca.type == eas.s.ea_inc.s.srcaword
- || dst->srcb.type == eas.s.ea_inc.s.srcbword))
- {
- dst->dst.type = eas.s.ea_disp.s.dstword;
- }
-
- if (dst->dst.type == eas.s.ea_dec.s.dstbyte
- || dst->dst.type == eas.s.ea_dec.s.dstword)
- {
- if (dst->srca.type == eas.s.ea_dec.s.srcabyte)
- {
- dst->srca.type = eas.s.ea_disp.s.srcabyte;
- }
- else if (dst->srca.type == eas.s.ea_dec.s.srcaword)
- {
- dst->srca.type = eas.s.ea_disp.s.srcaword;
- }
- else if (dst->srcb.type == eas.s.ea_dec.s.srcbbyte)
- {
- dst->srcb.type = eas.s.ea_disp.s.srcbbyte;
- }
- else if (dst->srcb.type == eas.s.ea_dec.s.srcbword)
- {
- dst->srcb.type = eas.s.ea_disp.s.srcbword;
- }
- }
-
-
- /* Turn a byte ops from the sp into word ops */
- translate (&dst->dst, eas.s.ea_dec.s.dstbyte, eas.s.ea_dec.s.dstword);
- translate (&dst->dst, eas.s.ea_inc.s.dstbyte, eas.s.ea_inc.s.dstword);
-
- translate (&dst->srca, eas.s.ea_dec.s.srcabyte, eas.s.ea_dec.s.srcaword);
- translate (&dst->srca, eas.s.ea_inc.s.srcabyte, eas.s.ea_inc.s.srcaword);
-
- translate (&dst->srcb, eas.s.ea_dec.s.srcbbyte, eas.s.ea_dec.s.srcbword);
- translate (&dst->srcb, eas.s.ea_inc.s.srcbbyte, eas.s.ea_inc.s.srcbword);
-
-
-}
-
-
-static void
-find (pc, buffer, dst)
- int pc;
- unsigned char *buffer;
- decoded_inst *dst;
-{
- h8500_opcode_info *opcode;
- int i;
- int idx;
- int hadimm = 0;
- dst->srca.reg.rptr = 0;
-
- /* Run down the table to find the one which matches */
- for (opcode = h8500_table; opcode->name; opcode++)
- {
- int byte;
- int rn;
- int rd;
- int rs;
- int disp;
- int abs;
- int imm;
- int pcrel;
- int qim;
- int i;
- int cr;
-
-
- dst->opcode = exec_dispatch[opcode->flavor & 0x7f];
-
- for (byte = 0; byte < opcode->length; byte++)
- {
- if ((buffer[byte] & opcode->bytes[byte].mask)
- != (opcode->bytes[byte].contents))
- {
- goto next;
- }
- else
- {
- /* extract any info parts */
- switch (opcode->bytes[byte].insert)
- {
- case 0:
- case FP:
- break;
- default:
- abort ();
- break;
- case RN:
- rn = buffer[byte] & 0x7;
- break;
- case RS:
- rs = buffer[byte] & 0x7;
- break;
- case CRB:
- cr = buffer[byte] & 0x7;
- if (cr == 0)
- goto next;
- break;
- case CRW:
- cr = buffer[byte] & 0x7;
- if (cr != 0)
- goto next;
- break;
- case DISP16:
- disp = (buffer[byte] << 8) | (buffer[byte + 1]);
- break;
- case FPIND_D8:
- case DISP8:
- disp = ((char) (buffer[byte]));
- break;
- case RD:
- case RDIND:
- rd = buffer[byte] & 0x7;
- break;
- case ABS24:
- abs =
- (buffer[byte] << 16)
- | (buffer[byte + 1] << 8)
- | (buffer[byte + 2]);
- break;
- case ABS16:
- abs = (buffer[byte] << 8) | (buffer[byte + 1]);
- break;
- case ABS8:
- abs = (buffer[byte]);
- break;
- case IMM16:
- imm = (buffer[byte] << 8) | (buffer[byte + 1]);
- break;
- case IMM4:
- imm = (buffer[byte]) & 0xf;
- break;
- case IMM8:
- case RLIST:
- imm = SEXTCHAR (buffer[byte]);
- break;
- case PCREL16:
- pcrel = SEXTSHORT ((buffer[byte] << 8) | (buffer[byte + 1]));
- break;
- case PCREL8:
- pcrel = SEXTCHAR ((buffer[byte]));
- break;
- case QIM:
- switch (buffer[byte] & 0x7)
- {
- case 0:
- imm = 1;
- break;
- case 1:
- imm = 2;
- break;
- case 4:
- imm = -1;
- break;
- case 5:
- imm = -2;
- break;
- }
- break;
-
- }
- }
- }
- if (opcode->flavor & O_BYTE)
- {
- idx = 0;
- switch (opcode->flags)
- {
- case 'h':
- dst->flags = flag_shiftbyte;
- break;
- case 'p':
- dst->flags = flag_multbyte;
- break;
- case 'B':
- dst->flags = flag_branch;
- break;
- case 'm':
- dst->flags = flag_mp;
- break;
- case 'a':
- dst->flags = flag_ap;
- break;
- case '-':
- dst->flags = flag_nonep;
- break;
- case 0:
- dst->flags = flag_nostorep;
- break;
- case 'c':
- dst->flags = flag_clearp;
- break;
- case 's':
- /* special */
- dst->flags = flag_special;
- }
- }
- else
- {
- idx = 1;
- switch (opcode->flags)
- {
- case 'h':
- dst->flags = flag_shiftword;
- break;
- case 'p':
- dst->flags = flag_multword;
- break;
- case 'B':
- dst->flags = flag_branch;
- break;
- case 'm':
- dst->flags = flag_Mp;
- break;
- case 'a':
- dst->flags = flag_Ap;
- break;
- case '-':
- dst->flags = flag_nonep;
- break;
- case 0:
- dst->flags = flag_nostorep;
- break;
- case 'c':
- dst->flags = flag_clearp;
- break;
- case 's':
- /* special */
- dst->flags = flag_special;
- break;
- }
- }
-
- for (i = 0; i < opcode->nargs; i++)
- {
- ea_type *p = eavector + i;
-
- switch (opcode->arg_type[i])
- {
- default:
- abort ();
-
- case FP:
- gotreg (p, 6, idx);
- break;
- case RNIND:
- disp = 0;
- case RNIND_D16:
- case RNIND_D8:
- gotind (p, disp, rn, idx);
- break;
- break;
- case RDIND:
- disp = 0;
- case RDIND_D16:
- case RDIND_D8:
- gotind (p, disp, rd, idx);
- break;
- case FPIND_D8:
- gotind (p, disp, 6, idx);
- break;
- case CRB:
- case CRW:
- gotcr (p, cr);
- break;
- case RN:
- gotreg (p, rn, idx);
- break;
- case RD:
- gotreg (p, rd, idx);
- break;
- case RS:
- gotreg (p, rs, idx);
- break;
- case RNDEC:
- gotinc (p, rn, -1, idx);
- break;
- case RNINC:
- gotinc (p, rn, 1, idx);
- break;
- case SPINC:
- gotinc (p, 7, 1, idx);
- break;
- case SPDEC:
- gotinc (p, 7, -1, idx);
- break;
- case ABS24:
- case ABS16:
- gotabs (p, abs, R_HARD_0, idx);
- break;
- case ABS8:
- gotabs (p, abs, R_HARD8_0, idx);
- break;
- case IMM16:
- case RLIST:
- case QIM:
- case IMM4:
- case IMM8:
- gotimm (p, imm);
- break;
- case PCREL16:
- case PCREL8:
- gotimm (p,
- ((pcrel + pc + opcode->length) & 0xffff) | (pc & 0xff0000),
- R_HARD_0, JLONG);
-
- }
- }
-
- /* Finished and done - turn from two operand stuff into three */
-
- dst->srca.type = eas.s.ea_nop.s.srcabyte;
- dst->srcb.type = eas.s.ea_nop.s.srcbbyte;
- dst->dst.type = eas.s.ea_nop.s.dstbyte;
-
- if (opcode->nargs)
- {
- switch (opcode->nargs)
- {
- case 1:
- howto_workout (&dst->srca, &eavector[0], 0);
- if (opcode->dst != '!')
- howto_workout (&dst->dst, &eavector[0], 2);
- break;
- case 2:
- if (opcode->src2 == '!')
- {
- howto_workout (&dst->srca, &eavector[0], 0);
- howto_workout (&dst->dst, &eavector[1], 2);
- }
- else
- {
- howto_workout (&dst->srca, &eavector[0], 0);
- howto_workout (&dst->srcb, &eavector[1], 1);
- if (opcode->dst != '!')
- {
- howto_workout (&dst->dst, &eavector[1], 2);
- }
- }
- break;
- }
-
-
-
- /* Some extra stuff with pre inc and post dec,
- make sure that if the same ea is there twice, only one of the
- ops is auto inc/dec */
-
- fix_incdecs (dst);
-
-
- /* Some special cases */
- if (dst->opcode == exec_dispatch[O_PJSR]
- || dst->opcode == exec_dispatch[O_PJMP])
- {
- /* Both the @abs:24 and @rn turn into a disp word,
- chose the right a mode since @abs:24 is 4 bytes
- long */
-
- if (opcode->length == 4)
- {
- dst->srca.type = eas.s.ea_lval24.s.srcabyte;
- }
- else
- {
- dst->srca.type = eas.s.ea_reg.s.srcalong;
- }
-
- dst->srca.r2.rptr = &cpu.regs[R_HARD_0];
-
- /* For [P]JSR, keep return address precomputed */
- dst->srcb.literal = pc + opcode->length;
- dst->srcb.type = eas.s.ea_imm.s.srcbword;
- }
- else if (dst->opcode == exec_dispatch[O_MULXU])
- {
- /* This is a multiply -fix the destination op */
- if (dst->dst.type == eas.s.ea_reg.s.dstword)
- {
- dst->dst.type = eas.s.ea_reg.s.dstlong;
- }
- else
- {
- dst->dst.type = eas.s.ea_reg.s.dstword;
- }
- dst->dst.reg.bptr = regptr[rd][JWORD];
- }
- else if (dst->opcode == exec_dispatch[O_DIVXU])
- {
- /* This is a wider than normal, fix the source operand */
- dst->srcb.type
- = (dst->srcb.type == eas.s.ea_reg.s.srcbword)
- ? eas.s.ea_reg.s.srcblong
- : eas.s.ea_reg.s.srcbword;
-
- dst->dst.type
- = (dst->dst.type == eas.s.ea_reg.s.dstword)
- ? eas.s.ea_reg.s.dstlong
- : eas.s.ea_reg.s.dstword;
-
- }
-
- else if (dst->opcode == exec_dispatch[O_LDM])
- {
- /* Turn of the stack ref */
- dst->srca.type = eas.s.ea_nop.s.srcabyte;
- }
- else if (dst->opcode == exec_dispatch[O_STM])
- {
- /* Turn of the stack ref */
- dst->srcb.type = eas.s.ea_nop.s.srcbbyte;
- }
-
-
- /* extends read one size and write another */
- else if (dst->opcode == exec_dispatch[O_EXTS]
- || dst->opcode == exec_dispatch[O_EXTU])
- {
- dst->dst.type = eas.s.ea_reg.s.dstword;
- dst->dst.reg.bptr = regptr[rd][JWORD];
- dst->flags = flag_Ap;
- }
-
-
- if (opcode->flags == 'h')
- thinkabout_shifts (dst, opcode->flavor & O_BYTE);
-
-
- /* For a branch, turn off one level of indirection */
- if (opcode->src1 == 'B')
- {
- indoff (&dst->srca, 0);
- }
-
- }
- dst->next_pc = pc + opcode->length;
-
- compcycles (dst, opcode);
-
- return;
-
-
- next:;
- }
-
- /* Couldn't understand anything */
- dst->opcode = exec_dispatch[O_TRAPA];
- dst->next_pc = pc + 1;
-
-}
-
-compile (pc)
-{
- int idx;
-
- /* find the next cache entry to use */
-
- idx = cpu.cache_top + 1;
- cpu.compiles++;
- if (idx >= cpu.csize)
- {
- idx = 1;
- }
- cpu.cache_top = idx;
-
- /* Throw away its old meaning */
- cpu.cache_idx[cpu.cache[idx].oldpc] = 0;
-
- /* set to new address */
- cpu.cache[idx].oldpc = pc;
-
- /* fill in instruction info */
- find (pc, cpu.memory + pc, cpu.cache + idx);
-
- /* point to new cache entry */
- cpu.cache_idx[pc] = idx;
-}
-
-baddefault (x)
-{
- printf ("bad default %d\n", x);
-}
-
-static int fetch_l (arg)
- ea_type *arg;
-{
- int l, r;
-
- int h = *(arg->reg.wptr);
- r = (union rtype *) (arg->reg.wptr) - &cpu.regs[0];
- r++;
-
- l = cpu.regs[r].s[LOW];
- return (h << 16) | l;
-
-}
-
-#define FETCH(dst, arg, n) \
-{ \
- int r; unsigned char*lval; \
- DISPATCH((arg).type) \
- { LABELN(FETCH_NOP,n): \
- dst= 0; \
- break; \
- DEFAULT baddefault((arg).type); break; \
- LABELN(FETCH_LVAL,n): \
- dst = (*(((arg).reg.wptr)) + (arg.literal)) ; \
- break; \
- LABELN(FETCH_LVAL24,n): \
- dst = (*(((arg).reg.wptr)) + *(((arg).r2.wptr)) + (arg.literal)) &0xffffff; \
- break; \
- LABELN(FETCH_CRB,n): \
- dst = (*((arg).reg.segptr) - cpu.memory)>>16; \
- break; \
- LABELN(FETCH_CRW,n): \
- dst = BUILDSR();\
- break; \
- LABELN(FETCH_REG_B,n): \
- dst = *((arg).reg.bptr); \
- break; \
- LABELN(FETCH_REG_W,n): \
- dst = *((arg).reg.wptr); \
- break; \
- LABELN(FETCH_REG_L,n): \
- dst = fetch_l(&(arg));\
- break; \
- LABELN(FETCH_INC_B,n): \
- lval = elval ((arg), 0); \
- dst = byteat (lval); \
- (*((arg).reg.wptr))++; \
- break; \
- LABELN(FETCH_INC_W,n): \
- lval = elval ((arg), 0); \
- dst = wordat (lval); \
- (*(((arg).reg.wptr))) += 2; \
- break; \
- LABELN(FETCH_DEC_B, n): \
- (*(arg).reg.wptr)--; \
- lval = elval ((arg), 0); \
- r = byteat (lval); \
- dst = r; \
- break; \
- LABELN(FETCH_DEC_W, n): \
- (*((arg).reg.wptr)) -= 2; \
- lval = elval ((arg), 0); \
- r = wordat (lval); \
- dst = r; \
- break; \
- LABELN(FETCH_DISP_B,n): \
- lval = displval ((arg)); \
- dst = byteat (lval); \
- break; \
- LABELN(FETCH_DISP_W,n): \
- lval = displval ((arg)); \
- dst = wordat (lval); \
- break; \
- LABELN(FETCH_IMM, n): \
- dst = (arg).literal; \
- break; \
- } \
- ENDDISPATCH; \
-}
-
-static union
-{
- short int i;
- struct
- {
- char low;
- char high;
- }
- u;
-}
-
-littleendian;
-
-static
-void
-init_pointers ()
-{
- static int init;
-
- if (!init)
- {
- int i;
-
- init = 1;
- littleendian.i = 1;
-
- for (i = 0; i < (int) R_LAST; i++)
- {
- if (littleendian.u.high)
- {
- /* big endian host */
-
-
- LOW = 1;
- HIGH = 0;
-
- regptr[i][0] = ((unsigned char *) (cpu.regs + i)) + 3;
- regptr[i][1] = ((unsigned char *) (cpu.regs + i)) + 2;
- }
- else
- {
- LOW = 0;
- HIGH = 1;
-
- regptr[i][0] = (unsigned char *) &(cpu.regs[i]);
- regptr[i][1] = (unsigned char *) (&(cpu.regs[i]));
- }
-
- regptr[i][2] = (unsigned char *) &(cpu.regs[i]);
- }
-
- memcpy (segregptr + 0, regptr + R_SR, sizeof (segregptr[0]));
- memcpy (segregptr + 1, regptr + R_TP, sizeof (segregptr[1]));
- memcpy (segregptr + 3, regptr + R_BR, sizeof (segregptr[3]));
- memcpy (segregptr + 4, regptr + R_EP, sizeof (segregptr[4]));
- memcpy (segregptr + 5, regptr + R_DP, sizeof (segregptr[5]));
- memcpy (segregptr + 6, regptr + R_CP, sizeof (segregptr[6]));
- memcpy (segregptr + 7, regptr + R_TP, sizeof (segregptr[7]));
-
- /* Pointers to into the cpu state for the seg registers */
-
- segmap[R0] = &cpu.regs[R_DP].c;
- segmap[R1] = &cpu.regs[R_DP].c;
- segmap[R2] = &cpu.regs[R_DP].c;
- segmap[R3] = &cpu.regs[R_DP].c;
- segmap[R4] = &cpu.regs[R_EP].c;
- segmap[R5] = &cpu.regs[R_EP].c;
- segmap[R6] = &cpu.regs[R_TP].c;
- segmap[R7] = &cpu.regs[R_TP].c;
- segmap[R_HARD_0] = &cpu.regs[R_DP].c;
- segmap[R_HARD8_0] = &cpu.regs[R_BP].c;
-
- cpu.memory = (unsigned char *) calloc (sizeof (char), H8500_MSIZE);
- cpu.cache_idx = (unsigned short *) calloc (sizeof (short), H8500_MSIZE);
-
- /* initialize the seg registers */
-
- cpu.regs[R_DP].c = cpu.memory;
- cpu.regs[R_TP].c = cpu.memory;
- cpu.regs[R_CP].c = cpu.memory;
- cpu.regs[R_BP].c = cpu.memory;
- cpu.regs[R_EP].c = cpu.memory;
- cpu.regs[R7].s[LOW] = 0xfffe;
- cpu.regs[R6].s[LOW] = 0xfffe;
- if (!cpu.cache)
- sim_set_simcache_size (CSIZE);
- }
-}
-
-#define PUSHWORD(x) \
-{ \
- int sp = cpu.regs[R7].s[LOW]; \
- unsigned char *p; \
- \
- sp -= 2; \
- p = (sp & 0xffff) + (cpu.regs[R_TP].c); \
- cpu.regs[R7].s[LOW] = sp; \
- setwordat (p, x); \
-} \
-
-#define POPWORD(d) \
-{ \
- int spx= cpu.regs[R7].s[LOW]; \
- unsigned char *p; \
- \
- p = (spx& 0xffff) + (cpu.regs[R_TP].c); \
- spx+= 2; \
- cpu.regs[R7].s[LOW] = spx; \
- d = wordat (p); \
-} \
-
-/* simulate a monitor trap */
-trap ()
-{
- switch (cpu.regs[R3].s[LOW] & 0xff)
- {
- case 33:
- /* exit */
- cpu.exception = SIGQUIT;
- break;
- case 34:
- /* abort */
- cpu.exception = SIGABRT;
- break;
- case 6:
- /* print char in r0 */
- printf ("%c", cpu.regs[R0].s[LOW]);
- break;
- }
-}
-void
-control_c (sig, code, scp, addr)
- int sig;
- int code;
- char *scp;
- char *addr;
-{
- cpu.exception = SIGINT;
-}
-
-static jmp_buf jbuf;
-static void
-segv ()
-{
- cpu.exception = SIGSEGV;
- longjmp (jbuf, 1);
-}
-
-int
-sim_stop (sd)
- SIM_DESC sd;
-{
- cpu.exception = SIGINT;
- return 1;
-}
-
-void
-sim_resume (sd, step, siggnal)
- SIM_DESC sd;
-{
- static int init1;
- int res;
- int tmp;
- int arga;
- int argb;
- int bit;
- int pc;
- int C, Z, V, N;
- int cycles = 0;
- int insts = 0;
- int tick_start = get_now ();
- void (*prev) ();
- void (*prev_seg) ();
-
- if (!init1)
- {
- int i;
-
- init1 = 1;
- init_pointers ();
-
- for (i = 0; i < N_EATYPES; i++)
- {
- eas.a[i].s.srcabyte = LABEL_REFN (FETCH_NOP, 0);
- eas.a[i].s.srcaword = LABEL_REFN (FETCH_NOP, 0);
- eas.a[i].s.srcalong = LABEL_REFN (FETCH_NOP, 0);
-
- eas.a[i].s.srcbbyte = LABEL_REFN (FETCH_NOP, 1);
- eas.a[i].s.srcbword = LABEL_REFN (FETCH_NOP, 1);
- eas.a[i].s.srcblong = LABEL_REFN (FETCH_NOP, 1);
-
- eas.a[i].s.dstbyte = LABEL_REF (STORE_NOP);
- eas.a[i].s.dstword = LABEL_REF (STORE_NOP);
- eas.a[i].s.dstlong = LABEL_REF (STORE_NOP);
- }
-
- eas.s.ea_lval.s.srcabyte = LABEL_REFN (FETCH_LVAL, 0);
- eas.s.ea_lval.s.srcaword = LABEL_REFN (FETCH_LVAL, 0);
- eas.s.ea_lval24.s.srcabyte = LABEL_REFN (FETCH_LVAL24, 0);
- eas.s.ea_lval24.s.srcaword = LABEL_REFN (FETCH_LVAL24, 0);
-
- eas.s.ea_nop.s.srcabyte = LABEL_REFN (FETCH_NOP, 0);
- eas.s.ea_nop.s.srcaword = LABEL_REFN (FETCH_NOP, 0);
- eas.s.ea_nop.s.srcbbyte = LABEL_REFN (FETCH_NOP, 1);
- eas.s.ea_nop.s.srcbword = LABEL_REFN (FETCH_NOP, 1);
- eas.s.ea_nop.s.dstbyte = LABEL_REF (STORE_NOP);
- eas.s.ea_nop.s.dstword = LABEL_REF (STORE_NOP);
-
- eas.s.ea_cr.s.srcabyte = LABEL_REFN (FETCH_CRB, 0);
- eas.s.ea_cr.s.srcaword = LABEL_REFN (FETCH_CRW, 0);
-
- eas.s.ea_cr.s.srcbbyte = LABEL_REFN (FETCH_CRB, 1);
- eas.s.ea_cr.s.srcbword = LABEL_REFN (FETCH_CRW, 1);
-
- eas.s.ea_cr.s.dstbyte = LABEL_REF (STORE_CRB);
- eas.s.ea_cr.s.dstword = LABEL_REF (STORE_CRW);
-
- eas.s.ea_reg.s.srcabyte = LABEL_REFN (FETCH_REG_B, 0);
- eas.s.ea_reg.s.srcaword = LABEL_REFN (FETCH_REG_W, 0);
- eas.s.ea_reg.s.srcalong = LABEL_REFN (FETCH_REG_L, 0);
-
- eas.s.ea_reg.s.srcbbyte = LABEL_REFN (FETCH_REG_B, 1);
- eas.s.ea_reg.s.srcbword = LABEL_REFN (FETCH_REG_W, 1);
- eas.s.ea_reg.s.srcblong = LABEL_REFN (FETCH_REG_L, 1);
-
- eas.s.ea_reg.s.dstbyte = LABEL_REF (STORE_REG_B);
- eas.s.ea_reg.s.dstword = LABEL_REF (STORE_REG_W);
- eas.s.ea_reg.s.dstlong = LABEL_REF (STORE_REG_L);
-
- eas.s.ea_inc.s.srcabyte = LABEL_REFN (FETCH_INC_B, 0);
- eas.s.ea_inc.s.srcaword = LABEL_REFN (FETCH_INC_W, 0);
- eas.s.ea_inc.s.srcbbyte = LABEL_REFN (FETCH_INC_B, 1);
- eas.s.ea_inc.s.srcbword = LABEL_REFN (FETCH_INC_W, 1);
- eas.s.ea_inc.s.dstbyte = LABEL_REF (STORE_INC_B);
- eas.s.ea_inc.s.dstword = LABEL_REF (STORE_INC_W);
-
- eas.s.ea_dec.s.srcabyte = LABEL_REFN (FETCH_DEC_B, 0);
- eas.s.ea_dec.s.srcaword = LABEL_REFN (FETCH_DEC_W, 0);
- eas.s.ea_dec.s.srcbbyte = LABEL_REFN (FETCH_DEC_B, 1);
- eas.s.ea_dec.s.srcbword = LABEL_REFN (FETCH_DEC_W, 1);
- eas.s.ea_dec.s.dstbyte = LABEL_REF (STORE_DEC_B);
- eas.s.ea_dec.s.dstword = LABEL_REF (STORE_DEC_W);
-
- eas.s.ea_disp.s.srcabyte = LABEL_REFN (FETCH_DISP_B, 0);
- eas.s.ea_disp.s.srcaword = LABEL_REFN (FETCH_DISP_W, 0);
- eas.s.ea_disp.s.srcbbyte = LABEL_REFN (FETCH_DISP_B, 1);
- eas.s.ea_disp.s.srcbword = LABEL_REFN (FETCH_DISP_W, 1);
- eas.s.ea_disp.s.dstbyte = LABEL_REF (STORE_DISP_B);
- eas.s.ea_disp.s.dstword = LABEL_REF (STORE_DISP_W);
-
- eas.s.ea_imm.s.srcabyte = LABEL_REFN (FETCH_IMM, 0);
- eas.s.ea_imm.s.srcaword = LABEL_REFN (FETCH_IMM, 0);
- eas.s.ea_imm.s.srcbbyte = LABEL_REFN (FETCH_IMM, 1);
- eas.s.ea_imm.s.srcbword = LABEL_REFN (FETCH_IMM, 1);
-
- flag_special = LABEL_REF (FLAG_special);
- flag_mp = LABEL_REF (FLAG_m);
- flag_Mp = LABEL_REF (FLAG_M);
- flag_ap = LABEL_REF (FLAG_a);
- flag_Ap = LABEL_REF (FLAG_A);
- flag_nonep = LABEL_REF (FLAG_NONE);
- flag_nostorep = LABEL_REF (FLAG_NOSTORE);
- flag_clearp = LABEL_REF (FLAG_CLEAR);
- flag_shiftbyte = LABEL_REF (FLAG_shiftbyte);
- flag_shiftword = LABEL_REF (FLAG_shiftword);
- flag_multbyte = LABEL_REF (FLAG_multbyte);
- flag_multword = LABEL_REF (FLAG_multword);
-
-
- exec_dispatch[O_ADDS] = LABEL_REF (O_ADDS);
- exec_dispatch[O_ADDX] = LABEL_REF (O_ADDX);
- exec_dispatch[O_ADD] = LABEL_REF (O_ADD);
- exec_dispatch[O_ANDC] = LABEL_REF (O_ANDC);
- exec_dispatch[O_AND] = LABEL_REF (O_AND);
- exec_dispatch[O_BCC] = LABEL_REF (O_BCC);
- exec_dispatch[O_BCLR] = LABEL_REF (O_BCLR);
- exec_dispatch[O_BCS] = LABEL_REF (O_BCS);
- exec_dispatch[O_BEQ] = LABEL_REF (O_BEQ);
- exec_dispatch[O_BF] = LABEL_REF (O_BF);
- exec_dispatch[O_BGE] = LABEL_REF (O_BGE);
- exec_dispatch[O_BGT] = LABEL_REF (O_BGT);
- exec_dispatch[O_BHI] = LABEL_REF (O_BHI);
- exec_dispatch[O_BHS] = LABEL_REF (O_BHS);
- exec_dispatch[O_BLE] = LABEL_REF (O_BLE);
- exec_dispatch[O_BLO] = LABEL_REF (O_BLO);
- exec_dispatch[O_BLS] = LABEL_REF (O_BLS);
- exec_dispatch[O_BLT] = LABEL_REF (O_BLT);
- exec_dispatch[O_BMI] = LABEL_REF (O_BMI);
- exec_dispatch[O_BNE] = LABEL_REF (O_BNE);
- exec_dispatch[O_BNOT] = LABEL_REF (O_BNOT);
- exec_dispatch[O_BPL] = LABEL_REF (O_BPL);
- exec_dispatch[O_BPT] = LABEL_REF (O_BPT);
- exec_dispatch[O_BRA] = LABEL_REF (O_BRA);
- exec_dispatch[O_BRN] = LABEL_REF (O_BRN);
- exec_dispatch[O_BSET] = LABEL_REF (O_BSET);
- exec_dispatch[O_BSR] = LABEL_REF (O_BSR);
- exec_dispatch[O_BTST] = LABEL_REF (O_BTST);
- exec_dispatch[O_BT] = LABEL_REF (O_BT);
- exec_dispatch[O_BVC] = LABEL_REF (O_BVC);
- exec_dispatch[O_BVS] = LABEL_REF (O_BVS);
- exec_dispatch[O_CLR] = LABEL_REF (O_CLR);
- exec_dispatch[O_CMP] = LABEL_REF (O_CMP);
- exec_dispatch[O_DADD] = LABEL_REF (O_DADD);
- exec_dispatch[O_DIVXU] = LABEL_REF (O_DIVXU);
- exec_dispatch[O_DSUB] = LABEL_REF (O_DSUB);
- exec_dispatch[O_EXTS] = LABEL_REF (O_EXTS);
- exec_dispatch[O_EXTU] = LABEL_REF (O_EXTU);
- exec_dispatch[O_JMP] = LABEL_REF (O_JMP);
- exec_dispatch[O_JSR] = LABEL_REF (O_JSR);
- exec_dispatch[O_LDC] = LABEL_REF (O_LDC);
- exec_dispatch[O_LDM] = LABEL_REF (O_LDM);
- exec_dispatch[O_LINK] = LABEL_REF (O_LINK);
- exec_dispatch[O_MOVFPE] = LABEL_REF (O_MOVFPE);
- exec_dispatch[O_MOVTPE] = LABEL_REF (O_MOVTPE);
- exec_dispatch[O_MOV] = LABEL_REF (O_MOV);
- exec_dispatch[O_MULXU] = LABEL_REF (O_MULXU);
- exec_dispatch[O_NEG] = LABEL_REF (O_NEG);
- exec_dispatch[O_NOP] = LABEL_REF (O_NOP);
- exec_dispatch[O_NOT] = LABEL_REF (O_NOT);
- exec_dispatch[O_ORC] = LABEL_REF (O_ORC);
- exec_dispatch[O_OR] = LABEL_REF (O_OR);
- exec_dispatch[O_PJMP] = LABEL_REF (O_PJMP);
- exec_dispatch[O_PJSR] = LABEL_REF (O_PJSR);
- exec_dispatch[O_PRTD] = LABEL_REF (O_PRTD);
- exec_dispatch[O_PRTS] = LABEL_REF (O_PRTS);
- exec_dispatch[O_RECOMPILE] = LABEL_REF (O_RECOMPILE);
-
- exec_dispatch[O_ROTL] = LABEL_REF (O_ROTL);
- exec_dispatch[O_ROTR] = LABEL_REF (O_ROTR);
- exec_dispatch[O_ROTXL] = LABEL_REF (O_ROTXL);
- exec_dispatch[O_ROTXR] = LABEL_REF (O_ROTXR);
-
- exec_dispatch[O_RTD] = LABEL_REF (O_RTD);
- exec_dispatch[O_RTS] = LABEL_REF (O_RTS);
- exec_dispatch[O_SCB_EQ] = LABEL_REF (O_SCB_EQ);
- exec_dispatch[O_SCB_F] = LABEL_REF (O_SCB_F);
- exec_dispatch[O_SCB_NE] = LABEL_REF (O_SCB_NE);
- exec_dispatch[O_SHAL] = LABEL_REF (O_SHAL);
- exec_dispatch[O_SHAR] = LABEL_REF (O_SHAR);
- exec_dispatch[O_SHLL] = LABEL_REF (O_SHLL);
- exec_dispatch[O_SHLR] = LABEL_REF (O_SHLR);
-
- exec_dispatch[O_SLEEP] = LABEL_REF (O_SLEEP);
- exec_dispatch[O_STC] = LABEL_REF (O_STC);
- exec_dispatch[O_STM] = LABEL_REF (O_STM);
- exec_dispatch[O_SUBS] = LABEL_REF (O_SUBS);
- exec_dispatch[O_SUBX] = LABEL_REF (O_SUBX);
- exec_dispatch[O_SUB] = LABEL_REF (O_SUB);
- exec_dispatch[O_SWAP] = LABEL_REF (O_SWAP);
- exec_dispatch[O_TAS] = LABEL_REF (O_TAS);
- exec_dispatch[O_TRAPA] = LABEL_REF (O_TRAPA);
- exec_dispatch[O_TRAP_VS] = LABEL_REF (O_TRAP_VS);
- exec_dispatch[O_TST] = LABEL_REF (O_TST);
- exec_dispatch[O_UNLK] = LABEL_REF (O_UNLK);
- exec_dispatch[O_XCH] = LABEL_REF (O_XCH);
- exec_dispatch[O_XORC] = LABEL_REF (O_XORC);
- exec_dispatch[O_XOR] = LABEL_REF (O_XOR);
- nop.type = eas.s.ea_nop.s.srcabyte;
- cpu.cache[0].opcode = exec_dispatch[O_RECOMPILE];
- cpu.cache[0].srca.type = eas.s.ea_nop.s.srcabyte;
- cpu.cache[0].srcb.type = eas.s.ea_nop.s.srcbbyte;
- }
-
- prev = signal (SIGINT, control_c);
- prev_seg = signal (SIGSEGV, segv);
-
- if (step)
- {
- cpu.exception = SIGTRAP;
- }
- else
- {
- cpu.exception = 0;
- }
-
- pc = cpu.regs[R_PC].s[LOW] + (NORMAL_CP << 16);
-
- GETSR ();
-
- if (setjmp (jbuf) == 0) {
- do
- {
- int cidx;
- decoded_inst *code;
-
- top:
- cidx = cpu.cache_idx[pc];
- code = cpu.cache + cidx;
-
- FETCH (arga, code->srca, 0);
- FETCH (argb, code->srcb, 1);
-
-
-
-#ifdef DEBUG
- if (debug)
- {
- printf ("%x %d %s\n", pc, code->opcode,
- code->op ? code->op->name : "**");
- }
-#endif
-
- cycles += code->cycles;
- insts++;
- DISPATCH (code->opcode)
- {
- LABEL (O_RECOMPILE):
- /* This opcode is a fake for when we get to an instruction which
- hasn't been compiled */
- compile (pc);
- goto top;
- break;
- LABEL (O_NEG):
- arga = -arga;
- argb = 0;
- res = arga + argb;
- break;
- LABEL (O_SUBX):
- arga += C;
- LABEL (O_SUB):
- LABEL (O_SUBS):
- arga = -arga;
- LABEL (O_ADD):
- LABEL (O_ADDS):
- res = arga + argb;
- break;
-
- LABEL (O_ADDX):
- res = arga + argb + C;
- break;
-
- LABEL (O_AND):
- LABEL (O_ANDC):
- res = arga & argb;
- break;
- break;
-
- LABEL (O_BCLR):
- arga &= 0xf;
- bit = (argb & (1 << arga));
- res = argb & ~(1 << arga);
- goto bitop;
-
-
- LABEL (O_BRA):
- LABEL (O_BT):
- if (1)
- goto condtrue;
-
- LABEL (O_BRN):
- LABEL (O_BF):
- if (0)
- goto condtrue;
- break;
-
- LABEL (O_BHI):
- if ((C || Z) == 0)
- goto condtrue;
- break;
-
- LABEL (O_BLS):
- if ((C || Z))
- goto condtrue;
- break;
-
- LABEL (O_BCS):
- LABEL (O_BLO):
- if ((C == 1))
- goto condtrue;
- break;
-
- LABEL (O_BCC):
- LABEL (O_BHS):
- if ((C == 0))
- goto condtrue;
- break;
-
- LABEL (O_BEQ):
- if (Z)
- goto condtrue;
- break;
- LABEL (O_BGT):
- if (((Z || (N ^ V)) == 0))
- goto condtrue;
- break;
-
-
- LABEL (O_BLE):
- if (((Z || (N ^ V)) == 1))
- goto condtrue;
- break;
-
- LABEL (O_BGE):
- if ((N ^ V) == 0)
- goto condtrue;
- break;
- LABEL (O_BLT):
- if ((N ^ V))
- goto condtrue;
- break;
- LABEL (O_BMI):
- if ((N))
- goto condtrue;
- break;
- LABEL (O_BNE):
- if ((Z == 0))
- goto condtrue;
- break;
- LABEL (O_BPL):
- if (N == 0)
- goto condtrue;
- break;
- break;
- LABEL (O_BVC):
- if ((V == 0))
- goto condtrue;
- break;
- LABEL (O_BVS):
- if ((V == 1))
- goto condtrue;
- break;
-
- LABEL (O_BNOT):
- bit = argb & (1<<(arga & 0xf));
- res = argb ^ (1<<(arga & 0xf));
- goto bitop;
- break;
-
- LABEL (O_BSET):
- arga = 1 << (arga & 0xf);
- bit = argb & arga;
- res = argb | arga;
- goto bitop;
- break;
-
- LABEL (O_PJMP):
- pc = arga;
- goto next;
-
- LABEL (O_UNLK):
- {
- int t;
- SET_NORMREG (R7, GET_NORMREG (R6));
- POPWORD (t);
- SET_NORMREG (R6, t);
- pc = code->next_pc;
- goto next;
- }
-
- LABEL (O_RTS):
- {
- int cp = pc & 0xff0000;
- POPWORD (pc);
- pc |= cp;
- goto next;
- }
- break;
-
- LABEL (O_PRTS):
- {
- int cp;
- int off;
- POPWORD (cp);
- POPWORD (off);
- cp <<= 16;
- SET_SEGREG (R_CP, cp);
- pc = cp + off;
- }
- goto next;
-
- LABEL (O_PJSR):
- PUSHWORD (argb & 0xffff);
- PUSHWORD (argb >> 16);
- pc = (arga & 0xffffff);
- goto next;
-
- LABEL (O_BSR):
- LABEL (O_JSR):
- PUSHWORD (code->next_pc);
- pc = arga | (pc & 0xff0000);
- goto next;
-
- LABEL (O_BTST):
- Z = (((argb >> (arga & 0xf)) & 1) == 0);
- pc = code->next_pc;
- goto next;
-
- LABEL (O_CLR):
- res = 0;
- break;
-
- LABEL (O_CMP):
- arga = -arga;
- res = arga + argb;
- break;
-
- LABEL (O_DADD):
- res = arga + argb + C;
- if (res > 99)
- {
- res -= 100;
- C = 1;
- }
- else
- {
- C = 0;
- }
- Z = Z && (res == 0);
- break;
-
-
- LABEL (O_DSUB):
- res = argb - arga - C;
- if (res < 0)
- {
- res += 100;
- C = 1;
- }
- else
- {
- C = 0;
- }
- Z = Z && (res == 0);
- break;
-
- LABEL (O_EXTS):
- res = SEXTCHAR (arga);
- break;
-
- LABEL (O_EXTU):
- res = (unsigned char) arga;
- break;
-
- LABEL (O_JMP):
- pc = arga | (pc & 0xff0000);
- goto next;
- break;
-
- LABEL (O_LDM):
-
- for (tmp = 0; tmp < 7; tmp++)
- {
- if (argb & (1 << tmp))
- {
- POPWORD (cpu.regs[tmp].s[LOW]);
- }
- }
- if (argb & 0x80)
- POPWORD (tmp); /* dummy ready for sp */
- goto nextpc;
- break;
-
- LABEL (O_LINK):
- PUSHWORD (cpu.regs[R6].s[LOW]);
- cpu.regs[R6].s[LOW] = cpu.regs[R7].s[LOW];
- cpu.regs[R7].s[LOW] += argb;
- goto nextpc;
-
- LABEL (O_STC):
- LABEL (O_LDC):
- LABEL (O_MOVFPE):
- LABEL (O_MOVTPE):
- LABEL (O_MOV):
- LABEL (O_TST):
- res = arga;
- break;
-
- LABEL (O_TRAPA):
- if (arga == 15)
- {
- trap ();
- }
- else
- {
- PUSHWORD (pc & 0xffff);
- if (cpu.maximum)
- {
- PUSHWORD (NORMAL_CP);
- }
- PUSHWORD (NORMAL_SR);
- if (cpu.maximum)
- {
- arga = arga * 4 + 0x40;
- SET_NORMAL_CPPC (longat (cpu.memory + arga));
- }
- else
- {
- arga = arga * 2 + 0x20;
- SET_NORMAL_CPPC (wordat (cpu.memory + arga));
- }
- }
- break;
-
- LABEL (O_OR):
- LABEL (O_ORC):
- res = arga | argb;
- break;
-
- LABEL (O_XOR):
- LABEL (O_XORC):
- res = arga ^ argb;
- break;
-
- LABEL (O_SCB_F):
- {
- scb_f:
- res = arga - 1;
- code->srca.reg.wptr[0] = res;
- if (res != -1)
- {
- pc = argb;
- goto next;
- }
- }
- break;
-
- LABEL (O_SCB_EQ):
- if (Z == 1)
- break;
- else
- goto scb_f;
-
- LABEL (O_SCB_NE):
- if (Z == 0)
- break;
- else
- goto scb_f;
-
- LABEL (O_NOP):
- /* If only they were all as simple as this */
- break;
-
- LABEL (O_ROTL):
- res = arga << 1;
- C = (res >> argb) & 1;
- res |= C;
- break;
-
-
- LABEL (O_ROTR):
- C = arga & 1;
- res = arga >> 1;
- res |= (C << (argb - 1));
- break;
-
- LABEL (O_ROTXL):
- res = arga << 1;
- res |= C;
- C = (res >> argb) & 1;
- break;
-
- LABEL (O_ROTXR):
- res = arga >> 1;
- res |= (C << (argb - 1));
- C = arga & 1;
- break;
-
- LABEL (O_SHAL):
- res = arga << 1;
- if (argb == 16)
- {
- C = (res >> (16)) & 1;
- Z = ((res & 0xffff) == 0);
- N = ((res & 0x8000) != 0);
- }
-
- else
- {
- C = (res >> (8)) & 1;
- Z = ((res & 0xff) == 0);
- N = ((res & 0x80) != 0);
-
- }
- V = C ^ N;
- goto none;
-
- LABEL (O_SHAR):
- C = arga & 1;
- if (argb == 16)
- {
- res = ((short) arga) >> 1;
- }
- else
- {
- res = (SEXTCHAR (arga)) >> 1;
- }
- break;
-
- LABEL (O_SHLL):
- res = arga << 1;
- C = (res >> argb) & 1;
- break;
-
- LABEL (O_SHLR):
- C = arga & 1;
- res = arga >> 1;
- break;
-
- LABEL (O_DIVXU):
- if (arga == 0)
- {
- N = V = C = 0;
- Z = 1;
- cpu.exception = SIGILL;
- }
- else
- {
- int d = argb / arga;
- int m = argb % arga;
- if (code->dst.type == eas.s.ea_reg.s.dstlong)
- {
- res = (m << 16) | (d & 0xffff);
- }
- else
- {
- res = (m << 8) | (d & 0xff);
- }
-
- }
- break;
-
- LABEL (O_MULXU):
- res = arga * argb;
- break;
-
- LABEL (O_NOT):
- res = ~arga;
- break;
-
- LABEL (O_SWAP):
- res = ((arga >> 8) & 0xff) | ((arga << 8) & 0xff00);
- break;
-
-
- LABEL (O_STM):
- for (tmp = 7; tmp >= 0; tmp--)
- {
- if (arga & (1 << tmp))
- {
- PUSHWORD (cpu.regs[tmp].s[LOW]);
- }
- }
- goto nextpc;
-
- LABEL (O_TAS):
- C = 0;
- V = 0;
- Z = arga == 0;
- N = arga < 0;
- res = arga | 0x80;
- goto none;
-
- LABEL (O_PRTD):
- LABEL (O_XCH):
- LABEL (O_RTD):
- cpu.exception = SIGILL;
- goto next;
-
- LABEL (O_TRAP_VS):
- LABEL (O_SLEEP):
- LABEL (O_BPT):
- cpu.exception = SIGTRAP;
- goto next;
- break;
- }
-
- ENDDISPATCH;
-
- DISPATCH (code->flags)
- {
- bitop:
- Z = (res & bit) == 0;
- pc = code->next_pc;
- break;
- LABEL (FLAG_multword):
- Z = (res & 0xffff) == 0;
- N = (res & 0x8000) != 0;
- V = 0;
- C = 0;
- pc = code->next_pc;
- break;
-
- LABEL (FLAG_multbyte):
- /* 8*8 -> 16 */
- Z = (res & 0xff) == 0;
- N = (res & 0x80) != 0;
- V = 0;
- C = 0;
- pc = code->next_pc;
- break;
-
- LABEL (FLAG_shiftword):
- N = (res & 0x8000) != 0;
- Z = (res & 0xffff) == 0;
- V = 0;
- pc = code->next_pc;
- break;
-
- LABEL (FLAG_shiftbyte):
- N = (res & 0x80) != 0;
- Z = (res & 0xff) == 0;
- V = 0;
- pc = code->next_pc;
- break;
-
- LABEL (FLAG_special):
- pc = code->next_pc;
- break;
-
- LABEL (FLAG_m):
- /* Move byte flags */
- /* after a logical instruction */
- N = (res & 0x80) != 0;
- Z = (res & 0xff) == 0;
- V = (((~arga & ~argb & res) | (arga & argb & ~res)) & 0x80) != 0;
- pc = code->next_pc;
- break;
-
- LABEL (FLAG_M):
- /* Move word flags */
- /* after a logical instruction */
- N = (res & 0x8000) != 0;
- Z = (res & 0xffff) == 0;
- V = (((~arga & ~argb & res) | (arga & argb & ~res)) & 0x8000) != 0;
- pc = code->next_pc;
- break;
-
- LABEL (FLAG_a):
- /* after byte sized arith */
- C = (res & 0x100) != 0;
- N = (res & 0x80) != 0;
- Z = (res & 0xff) == 0;
- V = (((~arga & ~argb & res) | (arga & argb & ~res)) & 0x80) != 0;
- pc = code->next_pc;
- break;
-
- LABEL (FLAG_A):
- /* after word sized arith */
- C = (res & 0x10000) != 0;
- N = (res & 0x8000) != 0;
- Z = (res & 0xffff) == 0;
- V = (((~arga & ~argb & res) | (arga & argb & ~res)) & 0x8000) != 0;
- pc = code->next_pc;
- break;
-
- LABEL (FLAG_NONE):
- none:;
- /* no flags but store */
- pc = code->next_pc;
- break;
- LABEL (FLAG_NOSTORE):
- /* no flags and no store */
- pc = code->next_pc;
- break;
- LABEL (FLAG_CLEAR):
- /* clear flags */
- N = 0;
- Z = 1;
- V = 0;
- C = 0;
- pc = code->next_pc;
- break;
- condtrue:
- pc = arga;
- goto next;
- }
- ENDDISPATCH;
-
- DISPATCH (code->dst.type)
- {
- unsigned char *lval;
-
- LABEL (STORE_CRB):
- (*(code->dst.reg.segptr)) = cpu.memory + (res << 16);
- break;
-
- LABEL (STORE_NOP):
- break;
-
- LABEL (STORE_REG_B):
- (*(code->dst.reg.bptr)) = res;
- break;
-
- LABEL (STORE_REG_W):
- (*(code->dst.reg.wptr)) = res;
- break;
-
- LABEL (STORE_REG_L):
- {
- int l, r;
-
- r = (union rtype *) (code->dst.reg.wptr) - &cpu.regs[0];
- r++;
- *(code->dst.reg.wptr) = res >> 16;
- cpu.regs[r].s[LOW] = res & 0xffff;
-
- }
-
- break;
-
- LABEL (STORE_DISP_W):
- lval = displval (code->dst);
- setwordat (lval, res);
- break;
-
- LABEL (STORE_DISP_B):
- lval = displval (code->dst);
- setbyteat (lval, res);
- break;
-
- LABEL (STORE_INC_B):
- lval = elval (code->dst, 0);
- setbyteat (lval, res);
- (*(code->dst.reg.wptr))++;
- break;
-
- LABEL (STORE_INC_W):
- lval = elval (code->dst, 0);
- setwordat (lval, res);
- (*(code->dst.reg.wptr)) += 2;
- break;
-
- LABEL (STORE_DEC_B):
- (*(code->dst.reg.wptr))--;
- lval = elval (code->dst, 0);
- setbyteat (lval, res);
- break;
-
- LABEL (STORE_CRW):
- /* Make an up to date sr from the flag state */
- cpu.regs[R_SR].s[LOW] = res;
- GETSR ();
- break;
-
- LABEL (STORE_DEC_W):
- (*(code->dst.reg.wptr)) -= 2;
- lval = elval (code->dst, 0);
- setwordat (lval, res);
-
- break;
-
- nextpc:
- pc = code->next_pc;
-
- }
- ENDDISPATCH;
- next:;
- }
- while (!cpu.exception);
- }
-
- cpu.ticks += get_now () - tick_start;
- cpu.cycles += cycles;
- cpu.insts += insts;
- cpu.regs[R_PC].s[LOW] = pc;
- BUILDSR ();
-
- signal (SIGINT, prev);
- signal (SIGSEGV, prev_seg);
-}
-
-
-
-
-int
-sim_write (sd, addr, buffer, size)
- SIM_DESC sd;
- SIM_ADDR addr;
- unsigned char *buffer;
- int size;
-{
- int i;
-
- init_pointers ();
- if (addr < 0 || addr + size > H8500_MSIZE)
- return 0;
- for (i = 0; i < size; i++)
- {
- cpu.memory[addr + i] = buffer[i];
- cpu.cache_idx[addr + i] = 0;
- }
- return size;
-}
-
-int
-sim_read (sd, addr, buffer, size)
- SIM_DESC sd;
- SIM_ADDR addr;
- unsigned char *buffer;
- int size;
-{
- init_pointers ();
- if (addr < 0 || addr + size > H8500_MSIZE)
- return 0;
- memcpy (buffer, cpu.memory + addr, size);
- return size;
-}
-
-/* Ripped off from tm-h8500.h */
-
-#define R0_REGNUM 0
-#define R1_REGNUM 1
-#define R2_REGNUM 2
-#define R3_REGNUM 3
-#define R4_REGNUM 4
-#define R5_REGNUM 5
-#define R6_REGNUM 6
-#define R7_REGNUM 7
-
-/* As above, but with correct seg register glued on */
-#define PR0_REGNUM 8
-#define PR1_REGNUM 9
-#define PR2_REGNUM 10
-#define PR3_REGNUM 11
-#define PR4_REGNUM 12
-#define PR5_REGNUM 13
-#define PR6_REGNUM 14
-#define PR7_REGNUM 15
-
-#define SP_REGNUM PR7_REGNUM /* Contains address of top of stack */
-#define FP_REGNUM PR6_REGNUM /* Contains address of executing stack frame */
-
-
-#define SEG_C_REGNUM 16 /* Segment registers */
-#define SEG_D_REGNUM 17
-#define SEG_E_REGNUM 18
-#define SEG_T_REGNUM 19
-
-#define CCR_REGNUM 20 /* Contains processor status */
-#define PC_REGNUM 21 /* Contains program counter */
-
-#define CYCLE_REGNUM 22
-#define INST_REGNUM 23
-#define TICK_REGNUM 24
-
-int
-sim_store_register (sd, rn, value, length)
- SIM_DESC sd;
- int rn;
- unsigned char *value;
- int length;
-{
- int seg = 0;
- int reg = -1;
-
- init_pointers ();
- switch (rn)
- {
- case PC_REGNUM:
- SET_SEGREG (R_CP, (value[1]<<16));
- cpu.regs[R_PC].s[LOW] = (value[2] << 8) | value[3];
- break;
- case SEG_C_REGNUM:
- case SEG_D_REGNUM:
- case SEG_E_REGNUM:
- case SEG_T_REGNUM:
- seg = rn - SEG_C_REGNUM + R_CP;
- reg = -1;
- break;
- default:
- abort ();
- case R0_REGNUM:
- case R1_REGNUM:
- case R2_REGNUM:
- case R3_REGNUM:
- case R4_REGNUM:
- case R5_REGNUM:
- case R6_REGNUM:
- case R7_REGNUM:
- seg = 0;
- reg = rn - R0_REGNUM;
- break;
- case CCR_REGNUM:
- seg = 0;
- reg = R_SR;
- break;
- case CYCLE_REGNUM:
- cpu.cycles = (value[0] << 24) | (value[1] << 16) | (value[2] << 8) | value[3];
- return;
- case INST_REGNUM:
- cpu.insts = (value[0] << 24) | (value[1] << 16) | (value[2] << 8) | value[3];
- return;
- case TICK_REGNUM:
- cpu.ticks = (value[0] << 24) | (value[1] << 16) | (value[2] << 8) | value[3];
- return;
- case PR0_REGNUM:
- case PR1_REGNUM:
- case PR2_REGNUM:
- case PR3_REGNUM:
- case PR4_REGNUM:
- case PR5_REGNUM:
- case PR6_REGNUM:
- case PR7_REGNUM:
- SET_SEGREG (segforreg[rn], value[1]);
- reg = rn - PR0_REGNUM;
- cpu.regs[reg].s[LOW] = (value[2] << 8) | value[3];
- return;
- }
-
- if (seg)
- SET_SEGREG (seg, value[0] << 16);
-
- if (reg > 0)
- {
- cpu.regs[reg].s[LOW] = (value[0] << 8) | value[1];
- }
- return -1;
-}
-
-int
-sim_fetch_register (sd, rn, buf, length)
- SIM_DESC sd;
- int rn;
- unsigned char *buf;
- int length;
-{
- init_pointers ();
-
- switch (rn)
- {
- default:
- abort ();
- case SEG_C_REGNUM:
- case SEG_D_REGNUM:
- case SEG_E_REGNUM:
- case SEG_T_REGNUM:
- buf[0] = GET_SEGREG(rn - SEG_C_REGNUM + R_CP);
- break;
- case CCR_REGNUM:
- buf[0] = cpu.regs[R_SR].s[HIGH];
- buf[1] = cpu.regs[R_SR].s[LOW];
- break;
- case PC_REGNUM:
- buf[0] = 0;
- buf[1] = GET_SEGREG(R_CP);
- buf[2] = HIGH_BYTE (cpu.regs[R_PC].s[LOW]);
- buf[3] = LOW_BYTE (cpu.regs[R_PC].s[LOW]);
- break;
-
- case PR0_REGNUM:
- case PR1_REGNUM:
- case PR2_REGNUM:
- case PR3_REGNUM:
- case PR4_REGNUM:
- case PR5_REGNUM:
- case PR6_REGNUM:
- case PR7_REGNUM:
- rn -= PR0_REGNUM;
- buf[0] = 0;
- buf[1] = GET_SEGREG(segforreg[rn]);
- buf[2] = HIGH_BYTE (cpu.regs[rn].s[LOW]);
- buf[3] = LOW_BYTE (cpu.regs[rn].s[LOW]);
- break;
- case R0_REGNUM:
- case R1_REGNUM:
- case R2_REGNUM:
- case R3_REGNUM:
- case R4_REGNUM:
- case R5_REGNUM:
- case R6_REGNUM:
- case R7_REGNUM:
- buf[0] = HIGH_BYTE (cpu.regs[rn].s[LOW]);
- buf[1] = LOW_BYTE (cpu.regs[rn].s[LOW]);
- break;
- case CYCLE_REGNUM:
- buf[0] = cpu.cycles >> 24;
- buf[1] = cpu.cycles >> 16;
- buf[2] = cpu.cycles >> 8;
- buf[3] = cpu.cycles >> 0;
- break;
-
- case TICK_REGNUM:
- buf[0] = cpu.ticks >> 24;
- buf[1] = cpu.ticks >> 16;
- buf[2] = cpu.ticks >> 8;
- buf[3] = cpu.ticks >> 0;
- break;
-
- case INST_REGNUM:
- buf[0] = cpu.insts >> 24;
- buf[1] = cpu.insts >> 16;
- buf[2] = cpu.insts >> 8;
- buf[3] = cpu.insts >> 0;
- break;
- }
- return -1;
-}
-
-int
-sim_trace (sd)
- SIM_DESC sd;
-{
-
- int i;
-
- for (i = 0; i < 12; i += 2)
- {
- unsigned char *p = cpu.regs[R_TP].c + ((cpu.regs[R6].s[LOW] + i) & 0xffff);
- unsigned short *j = (unsigned short *) p;
-
- printf ("%04x ", *j);
- }
- printf ("\n");
- printf ("%02x %02x %02x %02x:%04x %04x %04x %04x %04x %04x %04x %04x %04x\n",
- NORMAL_DP,
- NORMAL_EP,
- NORMAL_TP,
- NORMAL_CP,
- cpu.regs[R_PC].s[LOW],
- cpu.regs[0].s[LOW],
- cpu.regs[1].s[LOW],
- cpu.regs[2].s[LOW],
- cpu.regs[3].s[LOW],
- cpu.regs[4].s[LOW],
- cpu.regs[5].s[LOW],
- cpu.regs[6].s[LOW],
- cpu.regs[7].s[LOW]);
- sim_resume (sd, 1, 0);
- return 0;
-}
-
-void
-sim_stop_reason (sd, reason, sigrc)
- SIM_DESC sd;
- enum sim_stop *reason;
- int *sigrc;
-{
- *reason = sim_stopped;
- *sigrc = cpu.exception;
-}
-
-void
-sim_set_simcache_size (n)
-{
- if (cpu.cache)
- free (cpu.cache);
- if (n < 2)
- n = 2;
- cpu.cache = (decoded_inst *) malloc (sizeof (decoded_inst) * n);
- cpu.csize = n;
-}
-
-void
-sim_size (n)
- int n;
-{
- /* Fixed size. */
-}
-
-void
-sim_info (sd, verbose)
- SIM_DESC sd;
- int verbose;
-{
- double timetaken = (double) cpu.ticks / (double) now_persec ();
- double virttime = cpu.cycles / 10.0e6;
-
- (*sim_callback->printf_filtered) (sim_callback,
- "\n\ninstructions executed %10d\n",
- cpu.insts);
- (*sim_callback->printf_filtered) (sim_callback,
- "cycles (v approximate) %10d\n",
- cpu.cycles);
- (*sim_callback->printf_filtered) (sim_callback,
- "real time taken %10.4f\n",
- timetaken);
- (*sim_callback->printf_filtered) (sim_callback,
- "virtual time taked %10.4f\n",
- virttime);
- if (timetaken)
- {
- (*sim_callback->printf_filtered) (sim_callback,
- "simulation ratio %10.4f\n",
- virttime / timetaken);
- }
-
- (*sim_callback->printf_filtered) (sim_callback,
- "compiles %10d\n",
- cpu.compiles);
- (*sim_callback->printf_filtered) (sim_callback,
- "cache size %10d\n",
- cpu.csize);
-}
-
-SIM_DESC
-sim_open (kind, cb, abfd, argv)
- SIM_OPEN_KIND kind;
- host_callback *cb;
- struct _bfd *abfd;
- char **argv;
-{
- sim_kind = kind;
- myname = argv[0];
- sim_callback = cb;
- /* fudge our descriptor */
- return (SIM_DESC) 1;
-}
-
-void
-sim_close (sd, quitting)
- SIM_DESC sd;
- int quitting;
-{
- /* nothing to do */
-}
-
-SIM_RC
-sim_load (sd, prog, abfd, from_tty)
- SIM_DESC sd;
- char *prog;
- bfd *abfd;
- int from_tty;
-{
- extern bfd *sim_load_file (); /* ??? Don't know where this should live. */
- bfd *prog_bfd;
-
- prog_bfd = sim_load_file (sd, myname, sim_callback, prog, abfd,
- sim_kind == SIM_OPEN_DEBUG,
- 0, sim_write);
- if (prog_bfd == NULL)
- return SIM_RC_FAIL;
- if (abfd == NULL)
- bfd_close (prog_bfd);
- return SIM_RC_OK;
-}
-
-SIM_RC
-sim_create_inferior (sd, abfd, argv, env)
- SIM_DESC sd;
- struct _bfd *abfd;
- char **argv;
- char **env;
-{
- int pc;
- bfd_vma start_address;
- if (abfd != NULL)
- start_address = bfd_get_start_address (abfd);
- else
- start_address = 0;
-
- /* ??? We assume this is a 4 byte quantity. */
- pc = start_address;
-
- sim_store_register (sd, PC_REGNUM, (unsigned char *) &pc, 4);
- return SIM_RC_OK;
-}
-
-void
-sim_do_command (sd, cmd)
- SIM_DESC sd;
- char *cmd;
-{
- (*sim_callback->printf_filtered) (sim_callback,
- "This simulator does not accept any commands.\n");
-}
-
-void
-sim_set_callbacks (ptr)
- struct host_callback_struct *ptr;
-{
- sim_callback = ptr;
-}
diff --git a/sim/h8500/config.in b/sim/h8500/config.in
deleted file mode 100644
index 1f87a2bee4e..00000000000
--- a/sim/h8500/config.in
+++ /dev/null
@@ -1,158 +0,0 @@
-/* config.in. Generated automatically from configure.in by autoheader. */
-
-/* Define if using alloca.c. */
-#undef C_ALLOCA
-
-/* Define to empty if the keyword does not work. */
-#undef const
-
-/* Define to one of _getb67, GETB67, getb67 for Cray-2 and Cray-YMP systems.
- This function is required for alloca.c support on those systems. */
-#undef CRAY_STACKSEG_END
-
-/* Define if you have alloca, as a function or macro. */
-#undef HAVE_ALLOCA
-
-/* Define if you have <alloca.h> and it should be used (not on Ultrix). */
-#undef HAVE_ALLOCA_H
-
-/* Define if you have a working `mmap' system call. */
-#undef HAVE_MMAP
-
-/* Define as __inline if that's what the C compiler calls it. */
-#undef inline
-
-/* Define to `long' if <sys/types.h> doesn't define. */
-#undef off_t
-
-/* Define if you need to in order for stat and other things to work. */
-#undef _POSIX_SOURCE
-
-/* Define as the return type of signal handlers (int or void). */
-#undef RETSIGTYPE
-
-/* Define to `unsigned' if <sys/types.h> doesn't define. */
-#undef size_t
-
-/* If using the C implementation of alloca, define if you know the
- direction of stack growth for your system; otherwise it will be
- automatically deduced at run-time.
- STACK_DIRECTION > 0 => grows toward higher addresses
- STACK_DIRECTION < 0 => grows toward lower addresses
- STACK_DIRECTION = 0 => direction of growth unknown
- */
-#undef STACK_DIRECTION
-
-/* Define if you have the ANSI C header files. */
-#undef STDC_HEADERS
-
-/* Define to 1 if NLS is requested. */
-#undef ENABLE_NLS
-
-/* Define as 1 if you have gettext and don't want to use GNU gettext. */
-#undef HAVE_GETTEXT
-
-/* Define as 1 if you have the stpcpy function. */
-#undef HAVE_STPCPY
-
-/* Define if your locale.h file contains LC_MESSAGES. */
-#undef HAVE_LC_MESSAGES
-
-/* Define if you have the __argz_count function. */
-#undef HAVE___ARGZ_COUNT
-
-/* Define if you have the __argz_next function. */
-#undef HAVE___ARGZ_NEXT
-
-/* Define if you have the __argz_stringify function. */
-#undef HAVE___ARGZ_STRINGIFY
-
-/* Define if you have the __setfpucw function. */
-#undef HAVE___SETFPUCW
-
-/* Define if you have the dcgettext function. */
-#undef HAVE_DCGETTEXT
-
-/* Define if you have the getcwd function. */
-#undef HAVE_GETCWD
-
-/* Define if you have the getpagesize function. */
-#undef HAVE_GETPAGESIZE
-
-/* Define if you have the getrusage function. */
-#undef HAVE_GETRUSAGE
-
-/* Define if you have the munmap function. */
-#undef HAVE_MUNMAP
-
-/* Define if you have the putenv function. */
-#undef HAVE_PUTENV
-
-/* Define if you have the setenv function. */
-#undef HAVE_SETENV
-
-/* Define if you have the setlocale function. */
-#undef HAVE_SETLOCALE
-
-/* Define if you have the sigaction function. */
-#undef HAVE_SIGACTION
-
-/* Define if you have the stpcpy function. */
-#undef HAVE_STPCPY
-
-/* Define if you have the strcasecmp function. */
-#undef HAVE_STRCASECMP
-
-/* Define if you have the strchr function. */
-#undef HAVE_STRCHR
-
-/* Define if you have the time function. */
-#undef HAVE_TIME
-
-/* Define if you have the <argz.h> header file. */
-#undef HAVE_ARGZ_H
-
-/* Define if you have the <fcntl.h> header file. */
-#undef HAVE_FCNTL_H
-
-/* Define if you have the <fpu_control.h> header file. */
-#undef HAVE_FPU_CONTROL_H
-
-/* Define if you have the <limits.h> header file. */
-#undef HAVE_LIMITS_H
-
-/* Define if you have the <locale.h> header file. */
-#undef HAVE_LOCALE_H
-
-/* Define if you have the <malloc.h> header file. */
-#undef HAVE_MALLOC_H
-
-/* Define if you have the <nl_types.h> header file. */
-#undef HAVE_NL_TYPES_H
-
-/* Define if you have the <stdlib.h> header file. */
-#undef HAVE_STDLIB_H
-
-/* Define if you have the <string.h> header file. */
-#undef HAVE_STRING_H
-
-/* Define if you have the <strings.h> header file. */
-#undef HAVE_STRINGS_H
-
-/* Define if you have the <sys/param.h> header file. */
-#undef HAVE_SYS_PARAM_H
-
-/* Define if you have the <sys/resource.h> header file. */
-#undef HAVE_SYS_RESOURCE_H
-
-/* Define if you have the <sys/time.h> header file. */
-#undef HAVE_SYS_TIME_H
-
-/* Define if you have the <time.h> header file. */
-#undef HAVE_TIME_H
-
-/* Define if you have the <unistd.h> header file. */
-#undef HAVE_UNISTD_H
-
-/* Define if you have the <values.h> header file. */
-#undef HAVE_VALUES_H
diff --git a/sim/h8500/configure b/sim/h8500/configure
deleted file mode 100755
index 44e5a9c4964..00000000000
--- a/sim/h8500/configure
+++ /dev/null
@@ -1,4024 +0,0 @@
-#! /bin/sh
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-sim_inline="-DDEFAULT_INLINE=0"
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-# This file is derived from `gettext.m4'. The difference is that the
-# included macros assume Cygnus-style source and build trees.
-
-# Macro to add for using GNU gettext.
-# Ulrich Drepper <drepper@cygnus.com>, 1995.
-#
-# This file file be copied and used freely without restrictions. It can
-# be used in projects which are not available under the GNU Public License
-# but which still want to provide support for the GNU gettext functionality.
-# Please note that the actual code is *not* freely available.
-
-# serial 3
-
-
-
-
-
-# Search path for a program which passes the given test.
-# Ulrich Drepper <drepper@cygnus.com>, 1996.
-#
-# This file file be copied and used freely without restrictions. It can
-# be used in projects which are not available under the GNU Public License
-# but which still want to provide support for the GNU gettext functionality.
-# Please note that the actual code is *not* freely available.
-
-# serial 1
-
-
-
-# Check whether LC_MESSAGES is available in <locale.h>.
-# Ulrich Drepper <drepper@cygnus.com>, 1995.
-#
-# This file file be copied and used freely without restrictions. It can
-# be used in projects which are not available under the GNU Public License
-# but which still want to provide support for the GNU gettext functionality.
-# Please note that the actual code is *not* freely available.
-
-# serial 1
-
-
-
-
-
-
-# Guess values for system-dependent variables and create Makefiles.
-# Generated automatically using autoconf version 2.13
-# Copyright (C) 1992, 93, 94, 95, 96 Free Software Foundation, Inc.
-#
-# This configure script is free software; the Free Software Foundation
-# gives unlimited permission to copy, distribute and modify it.
-
-# Defaults:
-ac_help=
-ac_default_prefix=/usr/local
-# Any additions from configure.in:
-ac_help="$ac_help
- --disable-nls do not use Native Language Support"
-ac_help="$ac_help
- --with-included-gettext use the GNU gettext library included here"
-ac_help="$ac_help
- --enable-maintainer-mode Enable developer functionality."
-ac_help="$ac_help
- --enable-sim-bswap Use Host specific BSWAP instruction."
-ac_help="$ac_help
- --enable-sim-cflags=opts Extra CFLAGS for use in building simulator"
-ac_help="$ac_help
- --enable-sim-debug=opts Enable debugging flags"
-ac_help="$ac_help
- --enable-sim-stdio Specify whether to use stdio for console input/output."
-ac_help="$ac_help
- --enable-sim-trace=opts Enable tracing flags"
-ac_help="$ac_help
- --enable-sim-profile=opts Enable profiling flags"
-
-# Initialize some variables set by options.
-# The variables have the same names as the options, with
-# dashes changed to underlines.
-build=NONE
-cache_file=./config.cache
-exec_prefix=NONE
-host=NONE
-no_create=
-nonopt=NONE
-no_recursion=
-prefix=NONE
-program_prefix=NONE
-program_suffix=NONE
-program_transform_name=s,x,x,
-silent=
-site=
-sitefile=
-srcdir=
-target=NONE
-verbose=
-x_includes=NONE
-x_libraries=NONE
-bindir='${exec_prefix}/bin'
-sbindir='${exec_prefix}/sbin'
-libexecdir='${exec_prefix}/libexec'
-datadir='${prefix}/share'
-sysconfdir='${prefix}/etc'
-sharedstatedir='${prefix}/com'
-localstatedir='${prefix}/var'
-libdir='${exec_prefix}/lib'
-includedir='${prefix}/include'
-oldincludedir='/usr/include'
-infodir='${prefix}/info'
-mandir='${prefix}/man'
-
-# Initialize some other variables.
-subdirs=
-MFLAGS= MAKEFLAGS=
-SHELL=${CONFIG_SHELL-/bin/sh}
-# Maximum number of lines to put in a shell here document.
-ac_max_here_lines=12
-
-ac_prev=
-for ac_option
-do
-
- # If the previous option needs an argument, assign it.
- if test -n "$ac_prev"; then
- eval "$ac_prev=\$ac_option"
- ac_prev=
- continue
- fi
-
- case "$ac_option" in
- -*=*) ac_optarg=`echo "$ac_option" | sed 's/[-_a-zA-Z0-9]*=//'` ;;
- *) ac_optarg= ;;
- esac
-
- # Accept the important Cygnus configure options, so we can diagnose typos.
-
- case "$ac_option" in
-
- -bindir | --bindir | --bindi | --bind | --bin | --bi)
- ac_prev=bindir ;;
- -bindir=* | --bindir=* | --bindi=* | --bind=* | --bin=* | --bi=*)
- bindir="$ac_optarg" ;;
-
- -build | --build | --buil | --bui | --bu)
- ac_prev=build ;;
- -build=* | --build=* | --buil=* | --bui=* | --bu=*)
- build="$ac_optarg" ;;
-
- -cache-file | --cache-file | --cache-fil | --cache-fi \
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- ac_prev=cache_file ;;
- -cache-file=* | --cache-file=* | --cache-fil=* | --cache-fi=* \
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- -datadir=* | --datadir=* | --datadi=* | --datad=* | --data=* | --dat=* \
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- -disable-* | --disable-*)
- ac_feature=`echo $ac_option|sed -e 's/-*disable-//'`
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- ac_feature=`echo $ac_feature| sed 's/-/_/g'`
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- -enable-* | --enable-*)
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- ac_feature=`echo $ac_feature| sed 's/-/_/g'`
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- eval "enable_${ac_feature}='$ac_optarg'" ;;
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-EOF
- cat << EOF
-Host type:
- --build=BUILD configure for building on BUILD [BUILD=HOST]
- --host=HOST configure for HOST [guessed]
- --target=TARGET configure for TARGET [TARGET=HOST]
-Features and packages:
- --disable-FEATURE do not include FEATURE (same as --enable-FEATURE=no)
- --enable-FEATURE[=ARG] include FEATURE [ARG=yes]
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- --without-PACKAGE do not use PACKAGE (same as --with-PACKAGE=no)
- --x-includes=DIR X include files are in DIR
- --x-libraries=DIR X library files are in DIR
-EOF
- if test -n "$ac_help"; then
- echo "--enable and --with options recognized:$ac_help"
- fi
- exit 0 ;;
-
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- ac_prev=host ;;
- -host=* | --host=* | --hos=* | --ho=*)
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-
- -includedir | --includedir | --includedi | --included | --include \
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- ac_prev=includedir ;;
- -includedir=* | --includedir=* | --includedi=* | --included=* | --include=* \
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- includedir="$ac_optarg" ;;
-
- -infodir | --infodir | --infodi | --infod | --info | --inf)
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- -infodir=* | --infodir=* | --infodi=* | --infod=* | --info=* | --inf=*)
- infodir="$ac_optarg" ;;
-
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- ac_prev=libdir ;;
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- libdir="$ac_optarg" ;;
-
- -libexecdir | --libexecdir | --libexecdi | --libexecd | --libexec \
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- ac_prev=libexecdir ;;
- -libexecdir=* | --libexecdir=* | --libexecdi=* | --libexecd=* | --libexec=* \
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- libexecdir="$ac_optarg" ;;
-
- -localstatedir | --localstatedir | --localstatedi | --localstated \
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- | --locals | --local | --loca | --loc | --lo)
- ac_prev=localstatedir ;;
- -localstatedir=* | --localstatedir=* | --localstatedi=* | --localstated=* \
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- | --locals=* | --local=* | --loca=* | --loc=* | --lo=*)
- localstatedir="$ac_optarg" ;;
-
- -mandir | --mandir | --mandi | --mand | --man | --ma | --m)
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- ++foo;
-}
-{ /* Sun SC1.0 ANSI compiler rejects this -- but not the above. */
- typedef const int *iptr;
- iptr p = 0;
- ++p;
-}
-{ /* AIX XL C 1.02.0.0 rejects this saying
- "k.c", line 2.27: 1506-025 (S) Operand must be a modifiable lvalue. */
- struct s { int j; const int *ap[3]; };
- struct s *b; b->j = 5;
-}
-{ /* ULTRIX-32 V3.1 (Rev 9) vcc rejects this */
- const int foo = 10;
-}
-
-; return 0; }
-EOF
-if { (eval echo configure:965: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
- rm -rf conftest*
- ac_cv_c_const=yes
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- ac_cv_c_const=no
-fi
-rm -f conftest*
-fi
-
-echo "$ac_t""$ac_cv_c_const" 1>&6
-if test $ac_cv_c_const = no; then
- cat >> confdefs.h <<\EOF
-#define const
-EOF
-
-fi
-
-echo $ac_n "checking for inline""... $ac_c" 1>&6
-echo "configure:986: checking for inline" >&5
-if eval "test \"`echo '$''{'ac_cv_c_inline'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- ac_cv_c_inline=no
-for ac_kw in inline __inline__ __inline; do
- cat > conftest.$ac_ext <<EOF
-#line 993 "configure"
-#include "confdefs.h"
-
-int main() {
-} $ac_kw foo() {
-; return 0; }
-EOF
-if { (eval echo configure:1000: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
- rm -rf conftest*
- ac_cv_c_inline=$ac_kw; break
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
-fi
-rm -f conftest*
-done
-
-fi
-
-echo "$ac_t""$ac_cv_c_inline" 1>&6
-case "$ac_cv_c_inline" in
- inline | yes) ;;
- no) cat >> confdefs.h <<\EOF
-#define inline
-EOF
- ;;
- *) cat >> confdefs.h <<EOF
-#define inline $ac_cv_c_inline
-EOF
- ;;
-esac
-
-echo $ac_n "checking for off_t""... $ac_c" 1>&6
-echo "configure:1026: checking for off_t" >&5
-if eval "test \"`echo '$''{'ac_cv_type_off_t'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1031 "configure"
-#include "confdefs.h"
-#include <sys/types.h>
-#if STDC_HEADERS
-#include <stdlib.h>
-#include <stddef.h>
-#endif
-EOF
-if (eval "$ac_cpp conftest.$ac_ext") 2>&5 |
- egrep "(^|[^a-zA-Z_0-9])off_t[^a-zA-Z_0-9]" >/dev/null 2>&1; then
- rm -rf conftest*
- ac_cv_type_off_t=yes
-else
- rm -rf conftest*
- ac_cv_type_off_t=no
-fi
-rm -f conftest*
-
-fi
-echo "$ac_t""$ac_cv_type_off_t" 1>&6
-if test $ac_cv_type_off_t = no; then
- cat >> confdefs.h <<\EOF
-#define off_t long
-EOF
-
-fi
-
-echo $ac_n "checking for size_t""... $ac_c" 1>&6
-echo "configure:1059: checking for size_t" >&5
-if eval "test \"`echo '$''{'ac_cv_type_size_t'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1064 "configure"
-#include "confdefs.h"
-#include <sys/types.h>
-#if STDC_HEADERS
-#include <stdlib.h>
-#include <stddef.h>
-#endif
-EOF
-if (eval "$ac_cpp conftest.$ac_ext") 2>&5 |
- egrep "(^|[^a-zA-Z_0-9])size_t[^a-zA-Z_0-9]" >/dev/null 2>&1; then
- rm -rf conftest*
- ac_cv_type_size_t=yes
-else
- rm -rf conftest*
- ac_cv_type_size_t=no
-fi
-rm -f conftest*
-
-fi
-echo "$ac_t""$ac_cv_type_size_t" 1>&6
-if test $ac_cv_type_size_t = no; then
- cat >> confdefs.h <<\EOF
-#define size_t unsigned
-EOF
-
-fi
-
-# The Ultrix 4.2 mips builtin alloca declared by alloca.h only works
-# for constant arguments. Useless!
-echo $ac_n "checking for working alloca.h""... $ac_c" 1>&6
-echo "configure:1094: checking for working alloca.h" >&5
-if eval "test \"`echo '$''{'ac_cv_header_alloca_h'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1099 "configure"
-#include "confdefs.h"
-#include <alloca.h>
-int main() {
-char *p = alloca(2 * sizeof(int));
-; return 0; }
-EOF
-if { (eval echo configure:1106: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- rm -rf conftest*
- ac_cv_header_alloca_h=yes
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- ac_cv_header_alloca_h=no
-fi
-rm -f conftest*
-fi
-
-echo "$ac_t""$ac_cv_header_alloca_h" 1>&6
-if test $ac_cv_header_alloca_h = yes; then
- cat >> confdefs.h <<\EOF
-#define HAVE_ALLOCA_H 1
-EOF
-
-fi
-
-echo $ac_n "checking for alloca""... $ac_c" 1>&6
-echo "configure:1127: checking for alloca" >&5
-if eval "test \"`echo '$''{'ac_cv_func_alloca_works'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1132 "configure"
-#include "confdefs.h"
-
-#ifdef __GNUC__
-# define alloca __builtin_alloca
-#else
-# ifdef _MSC_VER
-# include <malloc.h>
-# define alloca _alloca
-# else
-# if HAVE_ALLOCA_H
-# include <alloca.h>
-# else
-# ifdef _AIX
- #pragma alloca
-# else
-# ifndef alloca /* predefined by HP cc +Olibcalls */
-char *alloca ();
-# endif
-# endif
-# endif
-# endif
-#endif
-
-int main() {
-char *p = (char *) alloca(1);
-; return 0; }
-EOF
-if { (eval echo configure:1160: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- rm -rf conftest*
- ac_cv_func_alloca_works=yes
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- ac_cv_func_alloca_works=no
-fi
-rm -f conftest*
-fi
-
-echo "$ac_t""$ac_cv_func_alloca_works" 1>&6
-if test $ac_cv_func_alloca_works = yes; then
- cat >> confdefs.h <<\EOF
-#define HAVE_ALLOCA 1
-EOF
-
-fi
-
-if test $ac_cv_func_alloca_works = no; then
- # The SVR3 libPW and SVR4 libucb both contain incompatible functions
- # that cause trouble. Some versions do not even contain alloca or
- # contain a buggy version. If you still want to use their alloca,
- # use ar to extract alloca.o from them instead of compiling alloca.c.
- ALLOCA=alloca.${ac_objext}
- cat >> confdefs.h <<\EOF
-#define C_ALLOCA 1
-EOF
-
-
-echo $ac_n "checking whether alloca needs Cray hooks""... $ac_c" 1>&6
-echo "configure:1192: checking whether alloca needs Cray hooks" >&5
-if eval "test \"`echo '$''{'ac_cv_os_cray'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1197 "configure"
-#include "confdefs.h"
-#if defined(CRAY) && ! defined(CRAY2)
-webecray
-#else
-wenotbecray
-#endif
-
-EOF
-if (eval "$ac_cpp conftest.$ac_ext") 2>&5 |
- egrep "webecray" >/dev/null 2>&1; then
- rm -rf conftest*
- ac_cv_os_cray=yes
-else
- rm -rf conftest*
- ac_cv_os_cray=no
-fi
-rm -f conftest*
-
-fi
-
-echo "$ac_t""$ac_cv_os_cray" 1>&6
-if test $ac_cv_os_cray = yes; then
-for ac_func in _getb67 GETB67 getb67; do
- echo $ac_n "checking for $ac_func""... $ac_c" 1>&6
-echo "configure:1222: checking for $ac_func" >&5
-if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1227 "configure"
-#include "confdefs.h"
-/* System header to define __stub macros and hopefully few prototypes,
- which can conflict with char $ac_func(); below. */
-#include <assert.h>
-/* Override any gcc2 internal prototype to avoid an error. */
-/* We use char because int might match the return type of a gcc2
- builtin and then its argument prototype would still apply. */
-char $ac_func();
-
-int main() {
-
-/* The GNU C library defines this for functions which it implements
- to always fail with ENOSYS. Some functions are actually named
- something starting with __ and the normal name is an alias. */
-#if defined (__stub_$ac_func) || defined (__stub___$ac_func)
-choke me
-#else
-$ac_func();
-#endif
-
-; return 0; }
-EOF
-if { (eval echo configure:1250: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=yes"
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=no"
-fi
-rm -f conftest*
-fi
-
-if eval "test \"`echo '$ac_cv_func_'$ac_func`\" = yes"; then
- echo "$ac_t""yes" 1>&6
- cat >> confdefs.h <<EOF
-#define CRAY_STACKSEG_END $ac_func
-EOF
-
- break
-else
- echo "$ac_t""no" 1>&6
-fi
-
-done
-fi
-
-echo $ac_n "checking stack direction for C alloca""... $ac_c" 1>&6
-echo "configure:1277: checking stack direction for C alloca" >&5
-if eval "test \"`echo '$''{'ac_cv_c_stack_direction'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- if test "$cross_compiling" = yes; then
- ac_cv_c_stack_direction=0
-else
- cat > conftest.$ac_ext <<EOF
-#line 1285 "configure"
-#include "confdefs.h"
-find_stack_direction ()
-{
- static char *addr = 0;
- auto char dummy;
- if (addr == 0)
- {
- addr = &dummy;
- return find_stack_direction ();
- }
- else
- return (&dummy > addr) ? 1 : -1;
-}
-main ()
-{
- exit (find_stack_direction() < 0);
-}
-EOF
-if { (eval echo configure:1304: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null
-then
- ac_cv_c_stack_direction=1
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -fr conftest*
- ac_cv_c_stack_direction=-1
-fi
-rm -fr conftest*
-fi
-
-fi
-
-echo "$ac_t""$ac_cv_c_stack_direction" 1>&6
-cat >> confdefs.h <<EOF
-#define STACK_DIRECTION $ac_cv_c_stack_direction
-EOF
-
-fi
-
-for ac_hdr in unistd.h
-do
-ac_safe=`echo "$ac_hdr" | sed 'y%./+-%__p_%'`
-echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6
-echo "configure:1329: checking for $ac_hdr" >&5
-if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1334 "configure"
-#include "confdefs.h"
-#include <$ac_hdr>
-EOF
-ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:1339: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
-ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
-if test -z "$ac_err"; then
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=yes"
-else
- echo "$ac_err" >&5
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=no"
-fi
-rm -f conftest*
-fi
-if eval "test \"`echo '$ac_cv_header_'$ac_safe`\" = yes"; then
- echo "$ac_t""yes" 1>&6
- ac_tr_hdr=HAVE_`echo $ac_hdr | sed 'y%abcdefghijklmnopqrstuvwxyz./-%ABCDEFGHIJKLMNOPQRSTUVWXYZ___%'`
- cat >> confdefs.h <<EOF
-#define $ac_tr_hdr 1
-EOF
-
-else
- echo "$ac_t""no" 1>&6
-fi
-done
-
-for ac_func in getpagesize
-do
-echo $ac_n "checking for $ac_func""... $ac_c" 1>&6
-echo "configure:1368: checking for $ac_func" >&5
-if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1373 "configure"
-#include "confdefs.h"
-/* System header to define __stub macros and hopefully few prototypes,
- which can conflict with char $ac_func(); below. */
-#include <assert.h>
-/* Override any gcc2 internal prototype to avoid an error. */
-/* We use char because int might match the return type of a gcc2
- builtin and then its argument prototype would still apply. */
-char $ac_func();
-
-int main() {
-
-/* The GNU C library defines this for functions which it implements
- to always fail with ENOSYS. Some functions are actually named
- something starting with __ and the normal name is an alias. */
-#if defined (__stub_$ac_func) || defined (__stub___$ac_func)
-choke me
-#else
-$ac_func();
-#endif
-
-; return 0; }
-EOF
-if { (eval echo configure:1396: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=yes"
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=no"
-fi
-rm -f conftest*
-fi
-
-if eval "test \"`echo '$ac_cv_func_'$ac_func`\" = yes"; then
- echo "$ac_t""yes" 1>&6
- ac_tr_func=HAVE_`echo $ac_func | tr 'abcdefghijklmnopqrstuvwxyz' 'ABCDEFGHIJKLMNOPQRSTUVWXYZ'`
- cat >> confdefs.h <<EOF
-#define $ac_tr_func 1
-EOF
-
-else
- echo "$ac_t""no" 1>&6
-fi
-done
-
-echo $ac_n "checking for working mmap""... $ac_c" 1>&6
-echo "configure:1421: checking for working mmap" >&5
-if eval "test \"`echo '$''{'ac_cv_func_mmap_fixed_mapped'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- if test "$cross_compiling" = yes; then
- ac_cv_func_mmap_fixed_mapped=no
-else
- cat > conftest.$ac_ext <<EOF
-#line 1429 "configure"
-#include "confdefs.h"
-
-/* Thanks to Mike Haertel and Jim Avera for this test.
- Here is a matrix of mmap possibilities:
- mmap private not fixed
- mmap private fixed at somewhere currently unmapped
- mmap private fixed at somewhere already mapped
- mmap shared not fixed
- mmap shared fixed at somewhere currently unmapped
- mmap shared fixed at somewhere already mapped
- For private mappings, we should verify that changes cannot be read()
- back from the file, nor mmap's back from the file at a different
- address. (There have been systems where private was not correctly
- implemented like the infamous i386 svr4.0, and systems where the
- VM page cache was not coherent with the filesystem buffer cache
- like early versions of FreeBSD and possibly contemporary NetBSD.)
- For shared mappings, we should conversely verify that changes get
- propogated back to all the places they're supposed to be.
-
- Grep wants private fixed already mapped.
- The main things grep needs to know about mmap are:
- * does it exist and is it safe to write into the mmap'd area
- * how to use it (BSD variants) */
-#include <sys/types.h>
-#include <fcntl.h>
-#include <sys/mman.h>
-
-/* This mess was copied from the GNU getpagesize.h. */
-#ifndef HAVE_GETPAGESIZE
-# ifdef HAVE_UNISTD_H
-# include <unistd.h>
-# endif
-
-/* Assume that all systems that can run configure have sys/param.h. */
-# ifndef HAVE_SYS_PARAM_H
-# define HAVE_SYS_PARAM_H 1
-# endif
-
-# ifdef _SC_PAGESIZE
-# define getpagesize() sysconf(_SC_PAGESIZE)
-# else /* no _SC_PAGESIZE */
-# ifdef HAVE_SYS_PARAM_H
-# include <sys/param.h>
-# ifdef EXEC_PAGESIZE
-# define getpagesize() EXEC_PAGESIZE
-# else /* no EXEC_PAGESIZE */
-# ifdef NBPG
-# define getpagesize() NBPG * CLSIZE
-# ifndef CLSIZE
-# define CLSIZE 1
-# endif /* no CLSIZE */
-# else /* no NBPG */
-# ifdef NBPC
-# define getpagesize() NBPC
-# else /* no NBPC */
-# ifdef PAGESIZE
-# define getpagesize() PAGESIZE
-# endif /* PAGESIZE */
-# endif /* no NBPC */
-# endif /* no NBPG */
-# endif /* no EXEC_PAGESIZE */
-# else /* no HAVE_SYS_PARAM_H */
-# define getpagesize() 8192 /* punt totally */
-# endif /* no HAVE_SYS_PARAM_H */
-# endif /* no _SC_PAGESIZE */
-
-#endif /* no HAVE_GETPAGESIZE */
-
-#ifdef __cplusplus
-extern "C" { void *malloc(unsigned); }
-#else
-char *malloc();
-#endif
-
-int
-main()
-{
- char *data, *data2, *data3;
- int i, pagesize;
- int fd;
-
- pagesize = getpagesize();
-
- /*
- * First, make a file with some known garbage in it.
- */
- data = malloc(pagesize);
- if (!data)
- exit(1);
- for (i = 0; i < pagesize; ++i)
- *(data + i) = rand();
- umask(0);
- fd = creat("conftestmmap", 0600);
- if (fd < 0)
- exit(1);
- if (write(fd, data, pagesize) != pagesize)
- exit(1);
- close(fd);
-
- /*
- * Next, try to mmap the file at a fixed address which
- * already has something else allocated at it. If we can,
- * also make sure that we see the same garbage.
- */
- fd = open("conftestmmap", O_RDWR);
- if (fd < 0)
- exit(1);
- data2 = malloc(2 * pagesize);
- if (!data2)
- exit(1);
- data2 += (pagesize - ((int) data2 & (pagesize - 1))) & (pagesize - 1);
- if (data2 != mmap(data2, pagesize, PROT_READ | PROT_WRITE,
- MAP_PRIVATE | MAP_FIXED, fd, 0L))
- exit(1);
- for (i = 0; i < pagesize; ++i)
- if (*(data + i) != *(data2 + i))
- exit(1);
-
- /*
- * Finally, make sure that changes to the mapped area
- * do not percolate back to the file as seen by read().
- * (This is a bug on some variants of i386 svr4.0.)
- */
- for (i = 0; i < pagesize; ++i)
- *(data2 + i) = *(data2 + i) + 1;
- data3 = malloc(pagesize);
- if (!data3)
- exit(1);
- if (read(fd, data3, pagesize) != pagesize)
- exit(1);
- for (i = 0; i < pagesize; ++i)
- if (*(data + i) != *(data3 + i))
- exit(1);
- close(fd);
- unlink("conftestmmap");
- exit(0);
-}
-
-EOF
-if { (eval echo configure:1569: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null
-then
- ac_cv_func_mmap_fixed_mapped=yes
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -fr conftest*
- ac_cv_func_mmap_fixed_mapped=no
-fi
-rm -fr conftest*
-fi
-
-fi
-
-echo "$ac_t""$ac_cv_func_mmap_fixed_mapped" 1>&6
-if test $ac_cv_func_mmap_fixed_mapped = yes; then
- cat >> confdefs.h <<\EOF
-#define HAVE_MMAP 1
-EOF
-
-fi
-
-echo $ac_n "checking for Cygwin environment""... $ac_c" 1>&6
-echo "configure:1592: checking for Cygwin environment" >&5
-if eval "test \"`echo '$''{'ac_cv_cygwin'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1597 "configure"
-#include "confdefs.h"
-
-int main() {
-
-#ifndef __CYGWIN__
-#define __CYGWIN__ __CYGWIN32__
-#endif
-return __CYGWIN__;
-; return 0; }
-EOF
-if { (eval echo configure:1608: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
- rm -rf conftest*
- ac_cv_cygwin=yes
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- ac_cv_cygwin=no
-fi
-rm -f conftest*
-rm -f conftest*
-fi
-
-echo "$ac_t""$ac_cv_cygwin" 1>&6
-CYGWIN=
-test "$ac_cv_cygwin" = yes && CYGWIN=yes
-echo $ac_n "checking for mingw32 environment""... $ac_c" 1>&6
-echo "configure:1625: checking for mingw32 environment" >&5
-if eval "test \"`echo '$''{'ac_cv_mingw32'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1630 "configure"
-#include "confdefs.h"
-
-int main() {
-return __MINGW32__;
-; return 0; }
-EOF
-if { (eval echo configure:1637: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
- rm -rf conftest*
- ac_cv_mingw32=yes
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- ac_cv_mingw32=no
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-rm -f conftest*
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-
-echo "$ac_t""$ac_cv_mingw32" 1>&6
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-
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-
-ac_aux_dir=
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- ac_install_sh="$ac_aux_dir/install.sh -c"
- break
- fi
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-if test -z "$ac_aux_dir"; then
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-fi
-ac_config_guess=$ac_aux_dir/config.guess
-ac_config_sub=$ac_aux_dir/config.sub
-ac_configure=$ac_aux_dir/configure # This should be Cygnus configure.
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-
-# Do some error checking and defaulting for the host and target type.
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-#
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-
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-esac
-
-
-# Make sure we can run config.sub.
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-
-echo $ac_n "checking host system type""... $ac_c" 1>&6
-echo "configure:1704: checking host system type" >&5
-
-host_alias=$host
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- if host_alias=`${CONFIG_SHELL-/bin/sh} $ac_config_guess`; then :
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- fi ;;
- *) host_alias=$nonopt ;;
- esac ;;
-esac
-
-host=`${CONFIG_SHELL-/bin/sh} $ac_config_sub $host_alias`
-host_cpu=`echo $host | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\1/'`
-host_vendor=`echo $host | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\2/'`
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-echo "$ac_t""$host" 1>&6
-
-echo $ac_n "checking target system type""... $ac_c" 1>&6
-echo "configure:1725: checking target system type" >&5
-
-target_alias=$target
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- case $nonopt in
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- *) target_alias=$nonopt ;;
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-esac
-
-target=`${CONFIG_SHELL-/bin/sh} $ac_config_sub $target_alias`
-target_cpu=`echo $target | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\1/'`
-target_vendor=`echo $target | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\2/'`
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-
-echo $ac_n "checking build system type""... $ac_c" 1>&6
-echo "configure:1743: checking build system type" >&5
-
-build_alias=$build
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- *) build_alias=$nonopt ;;
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-
-build=`${CONFIG_SHELL-/bin/sh} $ac_config_sub $build_alias`
-build_cpu=`echo $build | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\1/'`
-build_vendor=`echo $build | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\2/'`
-build_os=`echo $build | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\3/'`
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-
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-
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-
-# Extract the first word of "gcc", so it can be a program name with args.
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-echo "configure:1787: checking for $ac_word" >&5
-if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then
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-else
- if test -n "$CC"; then
- ac_cv_prog_CC="$CC" # Let the user override the test.
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- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
- ac_dummy="$PATH"
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- IFS="$ac_save_ifs"
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-if test -z "$CC"; then
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- if test -n "$CC"; then
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- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
- ac_prog_rejected=no
- ac_dummy="$PATH"
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- continue
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- ac_cv_prog_CC="cc"
- break
- fi
- done
- IFS="$ac_save_ifs"
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- # We found a bogon in the path, so make sure we never use it.
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- shift
- if test $# -gt 0; then
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- # first if we set CC to just the basename; use the full file name.
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- shift
- ac_cv_prog_CC="$@"
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- echo "$ac_t""no" 1>&6
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-
- if test -z "$CC"; then
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-echo "configure:1868: checking for $ac_word" >&5
-if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then
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- if test -n "$CC"; then
- ac_cv_prog_CC="$CC" # Let the user override the test.
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- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
- ac_dummy="$PATH"
- for ac_dir in $ac_dummy; do
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- ac_cv_prog_CC="cl"
- break
- fi
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- IFS="$ac_save_ifs"
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-CC="$ac_cv_prog_CC"
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- echo "$ac_t""no" 1>&6
-fi
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-
-echo $ac_n "checking whether the C compiler ($CC $CFLAGS $LDFLAGS) works""... $ac_c" 1>&6
-echo "configure:1900: checking whether the C compiler ($CC $CFLAGS $LDFLAGS) works" >&5
-
-ac_ext=c
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-ac_link='${CC-cc} -o conftest${ac_exeext} $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS 1>&5'
-cross_compiling=$ac_cv_prog_cc_cross
-
-cat > conftest.$ac_ext << EOF
-
-#line 1911 "configure"
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-
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- # If we can't run a trivial program, we are probably using a cross compiler.
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- else
- ac_cv_prog_cc_cross=yes
- fi
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- ac_cv_prog_cc_works=no
-fi
-rm -fr conftest*
-ac_ext=c
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-ac_compile='${CC-cc} -c $CFLAGS $CPPFLAGS conftest.$ac_ext 1>&5'
-ac_link='${CC-cc} -o conftest${ac_exeext} $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS 1>&5'
-cross_compiling=$ac_cv_prog_cc_cross
-
-echo "$ac_t""$ac_cv_prog_cc_works" 1>&6
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-echo $ac_n "checking whether the C compiler ($CC $CFLAGS $LDFLAGS) is a cross-compiler""... $ac_c" 1>&6
-echo "configure:1942: checking whether the C compiler ($CC $CFLAGS $LDFLAGS) is a cross-compiler" >&5
-echo "$ac_t""$ac_cv_prog_cc_cross" 1>&6
-cross_compiling=$ac_cv_prog_cc_cross
-
-echo $ac_n "checking whether we are using GNU C""... $ac_c" 1>&6
-echo "configure:1947: checking whether we are using GNU C" >&5
-if eval "test \"`echo '$''{'ac_cv_prog_gcc'+set}'`\" = set"; then
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-else
- cat > conftest.c <<EOF
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- yes;
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-if { ac_try='${CC-cc} -E conftest.c'; { (eval echo configure:1956: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }; } | egrep yes >/dev/null 2>&1; then
- ac_cv_prog_gcc=yes
-else
- ac_cv_prog_gcc=no
-fi
-fi
-
-echo "$ac_t""$ac_cv_prog_gcc" 1>&6
-
-if test $ac_cv_prog_gcc = yes; then
- GCC=yes
-else
- GCC=
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-
-ac_test_CFLAGS="${CFLAGS+set}"
-ac_save_CFLAGS="$CFLAGS"
-CFLAGS=
-echo $ac_n "checking whether ${CC-cc} accepts -g""... $ac_c" 1>&6
-echo "configure:1975: checking whether ${CC-cc} accepts -g" >&5
-if eval "test \"`echo '$''{'ac_cv_prog_cc_g'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- echo 'void f(){}' > conftest.c
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-else
- ac_cv_prog_cc_g=no
-fi
-rm -f conftest*
-
-fi
-
-echo "$ac_t""$ac_cv_prog_cc_g" 1>&6
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- CFLAGS="$ac_save_CFLAGS"
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- if test "$GCC" = yes; then
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- else
- CFLAGS="-g"
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- if test "$GCC" = yes; then
- CFLAGS="-O2"
- else
- CFLAGS=
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-fi
-
-# Find a good install program. We prefer a C program (faster),
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-# SunOS /usr/etc/install
-# IRIX /sbin/install
-# AIX /bin/install
-# AIX 4 /usr/bin/installbsd, which doesn't work without a -g flag
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-# ./install, which can be erroneously created by make from ./install.sh.
-echo $ac_n "checking for a BSD compatible install""... $ac_c" 1>&6
-echo "configure:2018: checking for a BSD compatible install" >&5
-if test -z "$INSTALL"; then
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- echo $ac_n "(cached) $ac_c" 1>&6
-else
- IFS="${IFS= }"; ac_save_IFS="$IFS"; IFS=":"
- for ac_dir in $PATH; do
- # Account for people who put trailing slashes in PATH elements.
- case "$ac_dir/" in
- /|./|.//|/etc/*|/usr/sbin/*|/usr/etc/*|/sbin/*|/usr/afsws/bin/*|/usr/ucb/*) ;;
- *)
- # OSF1 and SCO ODT 3.0 have their own names for install.
- # Don't use installbsd from OSF since it installs stuff as root
- # by default.
- for ac_prog in ginstall scoinst install; do
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- if test $ac_prog = install &&
- grep dspmsg $ac_dir/$ac_prog >/dev/null 2>&1; then
- # AIX install. It has an incompatible calling convention.
- :
- else
- ac_cv_path_install="$ac_dir/$ac_prog -c"
- break 2
- fi
- fi
- done
- ;;
- esac
- done
- IFS="$ac_save_IFS"
-
-fi
- if test "${ac_cv_path_install+set}" = set; then
- INSTALL="$ac_cv_path_install"
- else
- # As a last resort, use the slow shell script. We don't cache a
- # path for INSTALL within a source directory, because that will
- # break other packages using the cache if that directory is
- # removed, or if the path is relative.
- INSTALL="$ac_install_sh"
- fi
-fi
-echo "$ac_t""$INSTALL" 1>&6
-
-# Use test -z because SunOS4 sh mishandles braces in ${var-val}.
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-
-test -z "$INSTALL_SCRIPT" && INSTALL_SCRIPT='${INSTALL_PROGRAM}'
-
-test -z "$INSTALL_DATA" && INSTALL_DATA='${INSTALL} -m 644'
-
-
-# Put a plausible default for CC_FOR_BUILD in Makefile.
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-else
- CC_FOR_BUILD=gcc
-fi
-
-
-
-
-AR=${AR-ar}
-
-# Extract the first word of "ranlib", so it can be a program name with args.
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-echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:2086: checking for $ac_word" >&5
-if eval "test \"`echo '$''{'ac_cv_prog_RANLIB'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- if test -n "$RANLIB"; then
- ac_cv_prog_RANLIB="$RANLIB" # Let the user override the test.
-else
- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
- ac_dummy="$PATH"
- for ac_dir in $ac_dummy; do
- test -z "$ac_dir" && ac_dir=.
- if test -f $ac_dir/$ac_word; then
- ac_cv_prog_RANLIB="ranlib"
- break
- fi
- done
- IFS="$ac_save_ifs"
- test -z "$ac_cv_prog_RANLIB" && ac_cv_prog_RANLIB=":"
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-fi
-RANLIB="$ac_cv_prog_RANLIB"
-if test -n "$RANLIB"; then
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-else
- echo "$ac_t""no" 1>&6
-fi
-
-
-ALL_LINGUAS=
-
- for ac_hdr in argz.h limits.h locale.h nl_types.h malloc.h string.h \
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-echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6
-echo "configure:2121: checking for $ac_hdr" >&5
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- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
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-ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
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-ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
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- eval "ac_cv_header_$ac_safe=yes"
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- echo "$ac_err" >&5
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
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- eval "ac_cv_header_$ac_safe=no"
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- ac_tr_hdr=HAVE_`echo $ac_hdr | sed 'y%abcdefghijklmnopqrstuvwxyz./-%ABCDEFGHIJKLMNOPQRSTUVWXYZ___%'`
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-echo "configure:2161: checking for $ac_func" >&5
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-else
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-$ac_func();
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-
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-if { (eval echo configure:2189: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
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- eval "ac_cv_func_$ac_func=yes"
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- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=no"
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- ac_tr_func=HAVE_`echo $ac_func | tr 'abcdefghijklmnopqrstuvwxyz' 'ABCDEFGHIJKLMNOPQRSTUVWXYZ'`
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-
-
- if test "${ac_cv_func_stpcpy+set}" != "set"; then
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-echo "configure:2218: checking for $ac_func" >&5
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- echo $ac_n "(cached) $ac_c" 1>&6
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- cat > conftest.$ac_ext <<EOF
-#line 2223 "configure"
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-/* We use char because int might match the return type of a gcc2
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-char $ac_func();
-
-int main() {
-
-/* The GNU C library defines this for functions which it implements
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-$ac_func();
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-; return 0; }
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-if { (eval echo configure:2246: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=yes"
-else
- echo "configure: failed program was:" >&5
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-
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-
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-#line 2521 "configure"
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-if { (eval echo configure:2544: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
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- echo "configure: failed program was:" >&5
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-
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-
- # Extract the first word of "gmsgfmt", so it can be a program name with args.
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- ?:/*)
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- ;;
- *)
- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
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-
- # Extract the first word of "xgettext", so it can be a program name with args.
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- *)
- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS="${IFS}:"
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-
- cat > conftest.$ac_ext <<EOF
-#line 2639 "configure"
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-
-int main() {
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-if { (eval echo configure:2647: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
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- CATOBJEXT=.gmo
- DATADIRNAME=share
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- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- CATOBJEXT=.mo
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- INSTOBJEXT=.mo
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-
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- echo "$ac_t""no" 1>&6
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-
-
-
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-
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- # Extract the first word of "msgfmt", so it can be a program name with args.
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- *)
- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS="${IFS}:"
- for ac_dir in $PATH; do
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- fi
- fi
- done
- IFS="$ac_save_ifs"
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-else
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-
- # Extract the first word of "gmsgfmt", so it can be a program name with args.
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-echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:2713: checking for $ac_word" >&5
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- echo $ac_n "(cached) $ac_c" 1>&6
-else
- case "$GMSGFMT" in
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- ac_cv_path_GMSGFMT="$GMSGFMT" # Let the user override the test with a path.
- ;;
- ?:/*)
- ac_cv_path_GMSGFMT="$GMSGFMT" # Let the user override the test with a dos path.
- ;;
- *)
- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
- ac_dummy="$PATH"
- for ac_dir in $ac_dummy; do
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- IFS="$ac_save_ifs"
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-
- # Extract the first word of "xgettext", so it can be a program name with args.
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-echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:2749: checking for $ac_word" >&5
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-else
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- *)
- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS="${IFS}:"
- for ac_dir in $PATH; do
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- IFS="$ac_save_ifs"
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-else
- echo "$ac_t""no" 1>&6
-fi
-
-
- USE_INCLUDED_LIBINTL=yes
- CATOBJEXT=.gmo
- INSTOBJEXT=.mo
- DATADIRNAME=share
- INTLDEPS='$(top_builddir)/../intl/libintl.a'
- INTLLIBS=$INTLDEPS
- LIBS=`echo $LIBS | sed -e 's/-lintl//'`
- nls_cv_header_intl=libintl.h
- nls_cv_header_libgt=libgettext.h
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-
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- : ;
- else
- echo "$ac_t""found xgettext programs is not GNU xgettext; ignore it" 1>&6
- XGETTEXT=":"
- fi
- fi
-
- # We need to process the po/ directory.
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- else
- DATADIRNAME=share
- nls_cv_header_intl=libintl.h
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-
- # If this is used in GNU gettext we have to set USE_NLS to `yes'
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-
- for lang in $ALL_LINGUAS; do
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- POFILES="$POFILES $lang.po"
- done
-
-
-
-
-
-
-
-
-
-
-
-
-
-
- if test "x$CATOBJEXT" != "x"; then
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- else
- echo $ac_n "checking for catalogs to be installed""... $ac_c" 1>&6
-echo "configure:2839: checking for catalogs to be installed" >&5
- NEW_LINGUAS=
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- esac
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- LINGUAS=$NEW_LINGUAS
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- fi
-
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- fi
- fi
-
- if test $ac_cv_header_locale_h = yes; then
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- else
- INCLUDE_LOCALE_H="\
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-
-
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-echo $ac_n "checking for linux/version.h""... $ac_c" 1>&6
-echo "configure:2867: checking for linux/version.h" >&5
-if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then
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-{ (eval echo configure:2877: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
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- eval "ac_cv_header_$ac_safe=yes"
-else
- echo "$ac_err" >&5
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=no"
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-rm -f conftest*
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-if eval "test \"`echo '$ac_cv_header_'$ac_safe`\" = yes"; then
- echo "$ac_t""yes" 1>&6
- msgformat=linux
-else
- echo "$ac_t""no" 1>&6
-msgformat=xopen
-fi
-
-
- sed -e '/^#/d' $srcdir/$msgformat-msg.sed > po2msg.sed
- fi
- sed -e '/^#.*[^\\]$/d' -e '/^#$/d' \
- $srcdir/po2tbl.sed.in > po2tbl.sed
- fi
-
- if test "$PACKAGE" = "gettext"; then
- GT_NO="#NO#"
- GT_YES=
- else
- GT_NO=
- GT_YES="#YES#"
- fi
-
-
-
- MKINSTALLDIRS="\$(srcdir)/../../mkinstalldirs"
-
-
- l=
-
-
- if test -d $srcdir/po; then
- test -d po || mkdir po
- if test "x$srcdir" != "x."; then
- if test "x`echo $srcdir | sed 's@/.*@@'`" = "x"; then
- posrcprefix="$srcdir/"
- else
- posrcprefix="../$srcdir/"
- fi
- else
- posrcprefix="../"
- fi
- rm -f po/POTFILES
- sed -e "/^#/d" -e "/^\$/d" -e "s,.*, $posrcprefix& \\\\," -e "\$s/\(.*\) \\\\/\1/" \
- < $srcdir/po/POTFILES.in > po/POTFILES
- fi
-
-
-# Check for common headers.
-# FIXME: Seems to me this can cause problems for i386-windows hosts.
-# At one point there were hardcoded AC_DEFINE's if ${host} = i386-*-windows*.
-for ac_hdr in stdlib.h string.h strings.h unistd.h time.h
-do
-ac_safe=`echo "$ac_hdr" | sed 'y%./+-%__p_%'`
-echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6
-echo "configure:2946: checking for $ac_hdr" >&5
-if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 2951 "configure"
-#include "confdefs.h"
-#include <$ac_hdr>
-EOF
-ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:2956: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
-ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
-if test -z "$ac_err"; then
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=yes"
-else
- echo "$ac_err" >&5
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=no"
-fi
-rm -f conftest*
-fi
-if eval "test \"`echo '$ac_cv_header_'$ac_safe`\" = yes"; then
- echo "$ac_t""yes" 1>&6
- ac_tr_hdr=HAVE_`echo $ac_hdr | sed 'y%abcdefghijklmnopqrstuvwxyz./-%ABCDEFGHIJKLMNOPQRSTUVWXYZ___%'`
- cat >> confdefs.h <<EOF
-#define $ac_tr_hdr 1
-EOF
-
-else
- echo "$ac_t""no" 1>&6
-fi
-done
-
-for ac_hdr in sys/time.h sys/resource.h
-do
-ac_safe=`echo "$ac_hdr" | sed 'y%./+-%__p_%'`
-echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6
-echo "configure:2986: checking for $ac_hdr" >&5
-if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 2991 "configure"
-#include "confdefs.h"
-#include <$ac_hdr>
-EOF
-ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:2996: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
-ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
-if test -z "$ac_err"; then
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=yes"
-else
- echo "$ac_err" >&5
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=no"
-fi
-rm -f conftest*
-fi
-if eval "test \"`echo '$ac_cv_header_'$ac_safe`\" = yes"; then
- echo "$ac_t""yes" 1>&6
- ac_tr_hdr=HAVE_`echo $ac_hdr | sed 'y%abcdefghijklmnopqrstuvwxyz./-%ABCDEFGHIJKLMNOPQRSTUVWXYZ___%'`
- cat >> confdefs.h <<EOF
-#define $ac_tr_hdr 1
-EOF
-
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- echo "$ac_t""no" 1>&6
-fi
-done
-
-for ac_hdr in fcntl.h fpu_control.h
-do
-ac_safe=`echo "$ac_hdr" | sed 'y%./+-%__p_%'`
-echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6
-echo "configure:3026: checking for $ac_hdr" >&5
-if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 3031 "configure"
-#include "confdefs.h"
-#include <$ac_hdr>
-EOF
-ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:3036: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
-ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
-if test -z "$ac_err"; then
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=yes"
-else
- echo "$ac_err" >&5
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=no"
-fi
-rm -f conftest*
-fi
-if eval "test \"`echo '$ac_cv_header_'$ac_safe`\" = yes"; then
- echo "$ac_t""yes" 1>&6
- ac_tr_hdr=HAVE_`echo $ac_hdr | sed 'y%abcdefghijklmnopqrstuvwxyz./-%ABCDEFGHIJKLMNOPQRSTUVWXYZ___%'`
- cat >> confdefs.h <<EOF
-#define $ac_tr_hdr 1
-EOF
-
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- echo "$ac_t""no" 1>&6
-fi
-done
-
-for ac_hdr in dlfcn.h errno.h sys/stat.h
-do
-ac_safe=`echo "$ac_hdr" | sed 'y%./+-%__p_%'`
-echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6
-echo "configure:3066: checking for $ac_hdr" >&5
-if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 3071 "configure"
-#include "confdefs.h"
-#include <$ac_hdr>
-EOF
-ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:3076: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
-ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
-if test -z "$ac_err"; then
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=yes"
-else
- echo "$ac_err" >&5
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=no"
-fi
-rm -f conftest*
-fi
-if eval "test \"`echo '$ac_cv_header_'$ac_safe`\" = yes"; then
- echo "$ac_t""yes" 1>&6
- ac_tr_hdr=HAVE_`echo $ac_hdr | sed 'y%abcdefghijklmnopqrstuvwxyz./-%ABCDEFGHIJKLMNOPQRSTUVWXYZ___%'`
- cat >> confdefs.h <<EOF
-#define $ac_tr_hdr 1
-EOF
-
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- echo "$ac_t""no" 1>&6
-fi
-done
-
-for ac_func in getrusage time sigaction __setfpucw
-do
-echo $ac_n "checking for $ac_func""... $ac_c" 1>&6
-echo "configure:3105: checking for $ac_func" >&5
-if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 3110 "configure"
-#include "confdefs.h"
-/* System header to define __stub macros and hopefully few prototypes,
- which can conflict with char $ac_func(); below. */
-#include <assert.h>
-/* Override any gcc2 internal prototype to avoid an error. */
-/* We use char because int might match the return type of a gcc2
- builtin and then its argument prototype would still apply. */
-char $ac_func();
-
-int main() {
-
-/* The GNU C library defines this for functions which it implements
- to always fail with ENOSYS. Some functions are actually named
- something starting with __ and the normal name is an alias. */
-#if defined (__stub_$ac_func) || defined (__stub___$ac_func)
-choke me
-#else
-$ac_func();
-#endif
-
-; return 0; }
-EOF
-if { (eval echo configure:3133: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=yes"
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=no"
-fi
-rm -f conftest*
-fi
-
-if eval "test \"`echo '$ac_cv_func_'$ac_func`\" = yes"; then
- echo "$ac_t""yes" 1>&6
- ac_tr_func=HAVE_`echo $ac_func | tr 'abcdefghijklmnopqrstuvwxyz' 'ABCDEFGHIJKLMNOPQRSTUVWXYZ'`
- cat >> confdefs.h <<EOF
-#define $ac_tr_func 1
-EOF
-
-else
- echo "$ac_t""no" 1>&6
-fi
-done
-
-
-# Check for socket libraries
-echo $ac_n "checking for bind in -lsocket""... $ac_c" 1>&6
-echo "configure:3160: checking for bind in -lsocket" >&5
-ac_lib_var=`echo socket'_'bind | sed 'y%./+-%__p_%'`
-if eval "test \"`echo '$''{'ac_cv_lib_$ac_lib_var'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- ac_save_LIBS="$LIBS"
-LIBS="-lsocket $LIBS"
-cat > conftest.$ac_ext <<EOF
-#line 3168 "configure"
-#include "confdefs.h"
-/* Override any gcc2 internal prototype to avoid an error. */
-/* We use char because int might match the return type of a gcc2
- builtin and then its argument prototype would still apply. */
-char bind();
-
-int main() {
-bind()
-; return 0; }
-EOF
-if { (eval echo configure:3179: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- rm -rf conftest*
- eval "ac_cv_lib_$ac_lib_var=yes"
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_lib_$ac_lib_var=no"
-fi
-rm -f conftest*
-LIBS="$ac_save_LIBS"
-
-fi
-if eval "test \"`echo '$ac_cv_lib_'$ac_lib_var`\" = yes"; then
- echo "$ac_t""yes" 1>&6
- ac_tr_lib=HAVE_LIB`echo socket | sed -e 's/[^a-zA-Z0-9_]/_/g' \
- -e 'y/abcdefghijklmnopqrstuvwxyz/ABCDEFGHIJKLMNOPQRSTUVWXYZ/'`
- cat >> confdefs.h <<EOF
-#define $ac_tr_lib 1
-EOF
-
- LIBS="-lsocket $LIBS"
-
-else
- echo "$ac_t""no" 1>&6
-fi
-
-echo $ac_n "checking for gethostbyname in -lnsl""... $ac_c" 1>&6
-echo "configure:3207: checking for gethostbyname in -lnsl" >&5
-ac_lib_var=`echo nsl'_'gethostbyname | sed 'y%./+-%__p_%'`
-if eval "test \"`echo '$''{'ac_cv_lib_$ac_lib_var'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- ac_save_LIBS="$LIBS"
-LIBS="-lnsl $LIBS"
-cat > conftest.$ac_ext <<EOF
-#line 3215 "configure"
-#include "confdefs.h"
-/* Override any gcc2 internal prototype to avoid an error. */
-/* We use char because int might match the return type of a gcc2
- builtin and then its argument prototype would still apply. */
-char gethostbyname();
-
-int main() {
-gethostbyname()
-; return 0; }
-EOF
-if { (eval echo configure:3226: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- rm -rf conftest*
- eval "ac_cv_lib_$ac_lib_var=yes"
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_lib_$ac_lib_var=no"
-fi
-rm -f conftest*
-LIBS="$ac_save_LIBS"
-
-fi
-if eval "test \"`echo '$ac_cv_lib_'$ac_lib_var`\" = yes"; then
- echo "$ac_t""yes" 1>&6
- ac_tr_lib=HAVE_LIB`echo nsl | sed -e 's/[^a-zA-Z0-9_]/_/g' \
- -e 'y/abcdefghijklmnopqrstuvwxyz/ABCDEFGHIJKLMNOPQRSTUVWXYZ/'`
- cat >> confdefs.h <<EOF
-#define $ac_tr_lib 1
-EOF
-
- LIBS="-lnsl $LIBS"
-
-else
- echo "$ac_t""no" 1>&6
-fi
-
-
-. ${srcdir}/../../bfd/configure.host
-
-
-
-USE_MAINTAINER_MODE=no
-# Check whether --enable-maintainer-mode or --disable-maintainer-mode was given.
-if test "${enable_maintainer_mode+set}" = set; then
- enableval="$enable_maintainer_mode"
- case "${enableval}" in
- yes) MAINT="" USE_MAINTAINER_MODE=yes ;;
- no) MAINT="#" ;;
- *) { echo "configure: error: "--enable-maintainer-mode does not take a value"" 1>&2; exit 1; }; MAINT="#" ;;
-esac
-if test x"$silent" != x"yes" && test x"$MAINT" = x""; then
- echo "Setting maintainer mode" 6>&1
-fi
-else
- MAINT="#"
-fi
-
-
-
-# Check whether --enable-sim-bswap or --disable-sim-bswap was given.
-if test "${enable_sim_bswap+set}" = set; then
- enableval="$enable_sim_bswap"
- case "${enableval}" in
- yes) sim_bswap="-DWITH_BSWAP=1 -DUSE_BSWAP=1";;
- no) sim_bswap="-DWITH_BSWAP=0";;
- *) { echo "configure: error: "--enable-sim-bswap does not take a value"" 1>&2; exit 1; }; sim_bswap="";;
-esac
-if test x"$silent" != x"yes" && test x"$sim_bswap" != x""; then
- echo "Setting bswap flags = $sim_bswap" 6>&1
-fi
-else
- sim_bswap=""
-fi
-
-
-
-# Check whether --enable-sim-cflags or --disable-sim-cflags was given.
-if test "${enable_sim_cflags+set}" = set; then
- enableval="$enable_sim_cflags"
- case "${enableval}" in
- yes) sim_cflags="-O2 -fomit-frame-pointer";;
- trace) { echo "configure: error: "Please use --enable-sim-debug instead."" 1>&2; exit 1; }; sim_cflags="";;
- no) sim_cflags="";;
- *) sim_cflags=`echo "${enableval}" | sed -e "s/,/ /g"`;;
-esac
-if test x"$silent" != x"yes" && test x"$sim_cflags" != x""; then
- echo "Setting sim cflags = $sim_cflags" 6>&1
-fi
-else
- sim_cflags=""
-fi
-
-
-
-# Check whether --enable-sim-debug or --disable-sim-debug was given.
-if test "${enable_sim_debug+set}" = set; then
- enableval="$enable_sim_debug"
- case "${enableval}" in
- yes) sim_debug="-DDEBUG=7 -DWITH_DEBUG=7";;
- no) sim_debug="-DDEBUG=0 -DWITH_DEBUG=0";;
- *) sim_debug="-DDEBUG='(${enableval})' -DWITH_DEBUG='(${enableval})'";;
-esac
-if test x"$silent" != x"yes" && test x"$sim_debug" != x""; then
- echo "Setting sim debug = $sim_debug" 6>&1
-fi
-else
- sim_debug=""
-fi
-
-
-
-# Check whether --enable-sim-stdio or --disable-sim-stdio was given.
-if test "${enable_sim_stdio+set}" = set; then
- enableval="$enable_sim_stdio"
- case "${enableval}" in
- yes) sim_stdio="-DWITH_STDIO=DO_USE_STDIO";;
- no) sim_stdio="-DWITH_STDIO=DONT_USE_STDIO";;
- *) { echo "configure: error: "Unknown value $enableval passed to --enable-sim-stdio"" 1>&2; exit 1; }; sim_stdio="";;
-esac
-if test x"$silent" != x"yes" && test x"$sim_stdio" != x""; then
- echo "Setting stdio flags = $sim_stdio" 6>&1
-fi
-else
- sim_stdio=""
-fi
-
-
-
-# Check whether --enable-sim-trace or --disable-sim-trace was given.
-if test "${enable_sim_trace+set}" = set; then
- enableval="$enable_sim_trace"
- case "${enableval}" in
- yes) sim_trace="-DTRACE=1 -DWITH_TRACE=-1";;
- no) sim_trace="-DTRACE=0 -DWITH_TRACE=0";;
- [-0-9]*)
- sim_trace="-DTRACE='(${enableval})' -DWITH_TRACE='(${enableval})'";;
- [a-z]*)
- sim_trace=""
- for x in `echo "$enableval" | sed -e "s/,/ /g"`; do
- if test x"$sim_trace" = x; then
- sim_trace="-DWITH_TRACE='(TRACE_$x"
- else
- sim_trace="${sim_trace}|TRACE_$x"
- fi
- done
- sim_trace="$sim_trace)'" ;;
-esac
-if test x"$silent" != x"yes" && test x"$sim_trace" != x""; then
- echo "Setting sim trace = $sim_trace" 6>&1
-fi
-else
- sim_trace=""
-fi
-
-
-
-# Check whether --enable-sim-profile or --disable-sim-profile was given.
-if test "${enable_sim_profile+set}" = set; then
- enableval="$enable_sim_profile"
- case "${enableval}" in
- yes) sim_profile="-DPROFILE=1 -DWITH_PROFILE=-1";;
- no) sim_profile="-DPROFILE=0 -DWITH_PROFILE=0";;
- [-0-9]*)
- sim_profile="-DPROFILE='(${enableval})' -DWITH_PROFILE='(${enableval})'";;
- [a-z]*)
- sim_profile=""
- for x in `echo "$enableval" | sed -e "s/,/ /g"`; do
- if test x"$sim_profile" = x; then
- sim_profile="-DWITH_PROFILE='(PROFILE_$x"
- else
- sim_profile="${sim_profile}|PROFILE_$x"
- fi
- done
- sim_profile="$sim_profile)'" ;;
-esac
-if test x"$silent" != x"yes" && test x"$sim_profile" != x""; then
- echo "Setting sim profile = $sim_profile" 6>&1
-fi
-else
- sim_profile="-DPROFILE=1 -DWITH_PROFILE=-1"
-fi
-
-
-
-echo $ac_n "checking return type of signal handlers""... $ac_c" 1>&6
-echo "configure:3402: checking return type of signal handlers" >&5
-if eval "test \"`echo '$''{'ac_cv_type_signal'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 3407 "configure"
-#include "confdefs.h"
-#include <sys/types.h>
-#include <signal.h>
-#ifdef signal
-#undef signal
-#endif
-#ifdef __cplusplus
-extern "C" void (*signal (int, void (*)(int)))(int);
-#else
-void (*signal ()) ();
-#endif
-
-int main() {
-int i;
-; return 0; }
-EOF
-if { (eval echo configure:3424: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
- rm -rf conftest*
- ac_cv_type_signal=void
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- ac_cv_type_signal=int
-fi
-rm -f conftest*
-fi
-
-echo "$ac_t""$ac_cv_type_signal" 1>&6
-cat >> confdefs.h <<EOF
-#define RETSIGTYPE $ac_cv_type_signal
-EOF
-
-
-
-
-
-echo $ac_n "checking for executable suffix""... $ac_c" 1>&6
-echo "configure:3446: checking for executable suffix" >&5
-if eval "test \"`echo '$''{'ac_cv_exeext'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- if test "$CYGWIN" = yes || test "$MINGW32" = yes; then
- ac_cv_exeext=.exe
-else
- rm -f conftest*
- echo 'int main () { return 0; }' > conftest.$ac_ext
- ac_cv_exeext=
- if { (eval echo configure:3456: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; }; then
- for file in conftest.*; do
- case $file in
- *.c | *.o | *.obj | *.ilk | *.pdb) ;;
- *) ac_cv_exeext=`echo $file | sed -e s/conftest//` ;;
- esac
- done
- else
- { echo "configure: error: installation or configuration problem: compiler cannot create executables." 1>&2; exit 1; }
- fi
- rm -f conftest*
- test x"${ac_cv_exeext}" = x && ac_cv_exeext=no
-fi
-fi
-
-EXEEXT=""
-test x"${ac_cv_exeext}" != xno && EXEEXT=${ac_cv_exeext}
-echo "$ac_t""${ac_cv_exeext}" 1>&6
-ac_exeext=$EXEEXT
-
-
-sim_link_files=
-sim_link_links=
-
-sim_link_links=tconfig.h
-if test -f ${srcdir}/tconfig.in
-then
- sim_link_files=tconfig.in
-else
- sim_link_files=../common/tconfig.in
-fi
-
-# targ-vals.def points to the libc macro description file.
-case "${target}" in
-*-*-*) TARG_VALS_DEF=../common/nltvals.def ;;
-esac
-sim_link_files="${sim_link_files} ${TARG_VALS_DEF}"
-sim_link_links="${sim_link_links} targ-vals.def"
-
-
-
-for ac_hdr in stdlib.h time.h
-do
-ac_safe=`echo "$ac_hdr" | sed 'y%./+-%__p_%'`
-echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6
-echo "configure:3501: checking for $ac_hdr" >&5
-if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 3506 "configure"
-#include "confdefs.h"
-#include <$ac_hdr>
-EOF
-ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:3511: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
-ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
-if test -z "$ac_err"; then
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=yes"
-else
- echo "$ac_err" >&5
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=no"
-fi
-rm -f conftest*
-fi
-if eval "test \"`echo '$ac_cv_header_'$ac_safe`\" = yes"; then
- echo "$ac_t""yes" 1>&6
- ac_tr_hdr=HAVE_`echo $ac_hdr | sed 'y%abcdefghijklmnopqrstuvwxyz./-%ABCDEFGHIJKLMNOPQRSTUVWXYZ___%'`
- cat >> confdefs.h <<EOF
-#define $ac_tr_hdr 1
-EOF
-
-else
- echo "$ac_t""no" 1>&6
-fi
-done
-
-
-
-
-trap '' 1 2 15
-cat > confcache <<\EOF
-# This file is a shell script that caches the results of configure
-# tests run on this system so they can be shared between configure
-# scripts and configure runs. It is not useful on other systems.
-# If it contains results you don't want to keep, you may remove or edit it.
-#
-# By default, configure uses ./config.cache as the cache file,
-# creating it if it does not exist already. You can give configure
-# the --cache-file=FILE option to use a different cache file; that is
-# what configure does when it calls configure scripts in
-# subdirectories, so they share the cache.
-# Giving --cache-file=/dev/null disables caching, for debugging configure.
-# config.status only pays attention to the cache file if you give it the
-# --recheck option to rerun configure.
-#
-EOF
-# The following way of writing the cache mishandles newlines in values,
-# but we know of no workaround that is simple, portable, and efficient.
-# So, don't put newlines in cache variables' values.
-# Ultrix sh set writes to stderr and can't be redirected directly,
-# and sets the high bit in the cache file unless we assign to the vars.
-(set) 2>&1 |
- case `(ac_space=' '; set | grep ac_space) 2>&1` in
- *ac_space=\ *)
- # `set' does not quote correctly, so add quotes (double-quote substitution
- # turns \\\\ into \\, and sed turns \\ into \).
- sed -n \
- -e "s/'/'\\\\''/g" \
- -e "s/^\\([a-zA-Z0-9_]*_cv_[a-zA-Z0-9_]*\\)=\\(.*\\)/\\1=\${\\1='\\2'}/p"
- ;;
- *)
- # `set' quotes correctly as required by POSIX, so do not add quotes.
- sed -n -e 's/^\([a-zA-Z0-9_]*_cv_[a-zA-Z0-9_]*\)=\(.*\)/\1=${\1=\2}/p'
- ;;
- esac >> confcache
-if cmp -s $cache_file confcache; then
- :
-else
- if test -w $cache_file; then
- echo "updating cache $cache_file"
- cat confcache > $cache_file
- else
- echo "not updating unwritable cache $cache_file"
- fi
-fi
-rm -f confcache
-
-trap 'rm -fr conftest* confdefs* core core.* *.core $ac_clean_files; exit 1' 1 2 15
-
-test "x$prefix" = xNONE && prefix=$ac_default_prefix
-# Let make expand exec_prefix.
-test "x$exec_prefix" = xNONE && exec_prefix='${prefix}'
-
-# Any assignment to VPATH causes Sun make to only execute
-# the first set of double-colon rules, so remove it if not needed.
-# If there is a colon in the path, we need to keep it.
-if test "x$srcdir" = x.; then
- ac_vpsub='/^[ ]*VPATH[ ]*=[^:]*$/d'
-fi
-
-trap 'rm -f $CONFIG_STATUS conftest*; exit 1' 1 2 15
-
-DEFS=-DHAVE_CONFIG_H
-
-# Without the "./", some shells look in PATH for config.status.
-: ${CONFIG_STATUS=./config.status}
-
-echo creating $CONFIG_STATUS
-rm -f $CONFIG_STATUS
-cat > $CONFIG_STATUS <<EOF
-#! /bin/sh
-# Generated automatically by configure.
-# Run this file to recreate the current configuration.
-# This directory was configured as follows,
-# on host `(hostname || uname -n) 2>/dev/null | sed 1q`:
-#
-# $0 $ac_configure_args
-#
-# Compiler output produced by configure, useful for debugging
-# configure, is in ./config.log if it exists.
-
-ac_cs_usage="Usage: $CONFIG_STATUS [--recheck] [--version] [--help]"
-for ac_option
-do
- case "\$ac_option" in
- -recheck | --recheck | --rechec | --reche | --rech | --rec | --re | --r)
- echo "running \${CONFIG_SHELL-/bin/sh} $0 $ac_configure_args --no-create --no-recursion"
- exec \${CONFIG_SHELL-/bin/sh} $0 $ac_configure_args --no-create --no-recursion ;;
- -version | --version | --versio | --versi | --vers | --ver | --ve | --v)
- echo "$CONFIG_STATUS generated by autoconf version 2.13"
- exit 0 ;;
- -help | --help | --hel | --he | --h)
- echo "\$ac_cs_usage"; exit 0 ;;
- *) echo "\$ac_cs_usage"; exit 1 ;;
- esac
-done
-
-ac_given_srcdir=$srcdir
-ac_given_INSTALL="$INSTALL"
-
-trap 'rm -fr `echo "Makefile.sim:Makefile.in Make-common.sim:../common/Make-common.in .gdbinit:../common/gdbinit.in config.h:config.in" | sed "s/:[^ ]*//g"` conftest*; exit 1' 1 2 15
-EOF
-cat >> $CONFIG_STATUS <<EOF
-
-# Protect against being on the right side of a sed subst in config.status.
-sed 's/%@/@@/; s/@%/@@/; s/%g\$/@g/; /@g\$/s/[\\\\&%]/\\\\&/g;
- s/@@/%@/; s/@@/@%/; s/@g\$/%g/' > conftest.subs <<\\CEOF
-$ac_vpsub
-$extrasub
-s%@sim_environment@%$sim_environment%g
-s%@sim_alignment@%$sim_alignment%g
-s%@sim_assert@%$sim_assert%g
-s%@sim_bitsize@%$sim_bitsize%g
-s%@sim_endian@%$sim_endian%g
-s%@sim_hostendian@%$sim_hostendian%g
-s%@sim_float@%$sim_float%g
-s%@sim_scache@%$sim_scache%g
-s%@sim_default_model@%$sim_default_model%g
-s%@sim_hw_cflags@%$sim_hw_cflags%g
-s%@sim_hw_objs@%$sim_hw_objs%g
-s%@sim_hw@%$sim_hw%g
-s%@sim_inline@%$sim_inline%g
-s%@sim_packages@%$sim_packages%g
-s%@sim_regparm@%$sim_regparm%g
-s%@sim_reserved_bits@%$sim_reserved_bits%g
-s%@sim_smp@%$sim_smp%g
-s%@sim_stdcall@%$sim_stdcall%g
-s%@sim_xor_endian@%$sim_xor_endian%g
-s%@WARN_CFLAGS@%$WARN_CFLAGS%g
-s%@WERROR_CFLAGS@%$WERROR_CFLAGS%g
-s%@SHELL@%$SHELL%g
-s%@CFLAGS@%$CFLAGS%g
-s%@CPPFLAGS@%$CPPFLAGS%g
-s%@CXXFLAGS@%$CXXFLAGS%g
-s%@FFLAGS@%$FFLAGS%g
-s%@DEFS@%$DEFS%g
-s%@LDFLAGS@%$LDFLAGS%g
-s%@LIBS@%$LIBS%g
-s%@exec_prefix@%$exec_prefix%g
-s%@prefix@%$prefix%g
-s%@program_transform_name@%$program_transform_name%g
-s%@bindir@%$bindir%g
-s%@sbindir@%$sbindir%g
-s%@libexecdir@%$libexecdir%g
-s%@datadir@%$datadir%g
-s%@sysconfdir@%$sysconfdir%g
-s%@sharedstatedir@%$sharedstatedir%g
-s%@localstatedir@%$localstatedir%g
-s%@libdir@%$libdir%g
-s%@includedir@%$includedir%g
-s%@oldincludedir@%$oldincludedir%g
-s%@infodir@%$infodir%g
-s%@mandir@%$mandir%g
-s%@host@%$host%g
-s%@host_alias@%$host_alias%g
-s%@host_cpu@%$host_cpu%g
-s%@host_vendor@%$host_vendor%g
-s%@host_os@%$host_os%g
-s%@target@%$target%g
-s%@target_alias@%$target_alias%g
-s%@target_cpu@%$target_cpu%g
-s%@target_vendor@%$target_vendor%g
-s%@target_os@%$target_os%g
-s%@build@%$build%g
-s%@build_alias@%$build_alias%g
-s%@build_cpu@%$build_cpu%g
-s%@build_vendor@%$build_vendor%g
-s%@build_os@%$build_os%g
-s%@CC@%$CC%g
-s%@INSTALL_PROGRAM@%$INSTALL_PROGRAM%g
-s%@INSTALL_SCRIPT@%$INSTALL_SCRIPT%g
-s%@INSTALL_DATA@%$INSTALL_DATA%g
-s%@CC_FOR_BUILD@%$CC_FOR_BUILD%g
-s%@HDEFINES@%$HDEFINES%g
-s%@AR@%$AR%g
-s%@RANLIB@%$RANLIB%g
-s%@SET_MAKE@%$SET_MAKE%g
-s%@CPP@%$CPP%g
-s%@ALLOCA@%$ALLOCA%g
-s%@USE_NLS@%$USE_NLS%g
-s%@MSGFMT@%$MSGFMT%g
-s%@GMSGFMT@%$GMSGFMT%g
-s%@XGETTEXT@%$XGETTEXT%g
-s%@USE_INCLUDED_LIBINTL@%$USE_INCLUDED_LIBINTL%g
-s%@CATALOGS@%$CATALOGS%g
-s%@CATOBJEXT@%$CATOBJEXT%g
-s%@DATADIRNAME@%$DATADIRNAME%g
-s%@GMOFILES@%$GMOFILES%g
-s%@INSTOBJEXT@%$INSTOBJEXT%g
-s%@INTLDEPS@%$INTLDEPS%g
-s%@INTLLIBS@%$INTLLIBS%g
-s%@INTLOBJS@%$INTLOBJS%g
-s%@POFILES@%$POFILES%g
-s%@POSUB@%$POSUB%g
-s%@INCLUDE_LOCALE_H@%$INCLUDE_LOCALE_H%g
-s%@GT_NO@%$GT_NO%g
-s%@GT_YES@%$GT_YES%g
-s%@MKINSTALLDIRS@%$MKINSTALLDIRS%g
-s%@l@%$l%g
-s%@MAINT@%$MAINT%g
-s%@sim_bswap@%$sim_bswap%g
-s%@sim_cflags@%$sim_cflags%g
-s%@sim_debug@%$sim_debug%g
-s%@sim_stdio@%$sim_stdio%g
-s%@sim_trace@%$sim_trace%g
-s%@sim_profile@%$sim_profile%g
-s%@EXEEXT@%$EXEEXT%g
-
-CEOF
-EOF
-
-cat >> $CONFIG_STATUS <<\EOF
-
-# Split the substitutions into bite-sized pieces for seds with
-# small command number limits, like on Digital OSF/1 and HP-UX.
-ac_max_sed_cmds=90 # Maximum number of lines to put in a sed script.
-ac_file=1 # Number of current file.
-ac_beg=1 # First line for current file.
-ac_end=$ac_max_sed_cmds # Line after last line for current file.
-ac_more_lines=:
-ac_sed_cmds=""
-while $ac_more_lines; do
- if test $ac_beg -gt 1; then
- sed "1,${ac_beg}d; ${ac_end}q" conftest.subs > conftest.s$ac_file
- else
- sed "${ac_end}q" conftest.subs > conftest.s$ac_file
- fi
- if test ! -s conftest.s$ac_file; then
- ac_more_lines=false
- rm -f conftest.s$ac_file
- else
- if test -z "$ac_sed_cmds"; then
- ac_sed_cmds="sed -f conftest.s$ac_file"
- else
- ac_sed_cmds="$ac_sed_cmds | sed -f conftest.s$ac_file"
- fi
- ac_file=`expr $ac_file + 1`
- ac_beg=$ac_end
- ac_end=`expr $ac_end + $ac_max_sed_cmds`
- fi
-done
-if test -z "$ac_sed_cmds"; then
- ac_sed_cmds=cat
-fi
-EOF
-
-cat >> $CONFIG_STATUS <<EOF
-
-CONFIG_FILES=\${CONFIG_FILES-"Makefile.sim:Makefile.in Make-common.sim:../common/Make-common.in .gdbinit:../common/gdbinit.in"}
-EOF
-cat >> $CONFIG_STATUS <<\EOF
-for ac_file in .. $CONFIG_FILES; do if test "x$ac_file" != x..; then
- # Support "outfile[:infile[:infile...]]", defaulting infile="outfile.in".
- case "$ac_file" in
- *:*) ac_file_in=`echo "$ac_file"|sed 's%[^:]*:%%'`
- ac_file=`echo "$ac_file"|sed 's%:.*%%'` ;;
- *) ac_file_in="${ac_file}.in" ;;
- esac
-
- # Adjust a relative srcdir, top_srcdir, and INSTALL for subdirectories.
-
- # Remove last slash and all that follows it. Not all systems have dirname.
- ac_dir=`echo $ac_file|sed 's%/[^/][^/]*$%%'`
- if test "$ac_dir" != "$ac_file" && test "$ac_dir" != .; then
- # The file is in a subdirectory.
- test ! -d "$ac_dir" && mkdir "$ac_dir"
- ac_dir_suffix="/`echo $ac_dir|sed 's%^\./%%'`"
- # A "../" for each directory in $ac_dir_suffix.
- ac_dots=`echo $ac_dir_suffix|sed 's%/[^/]*%../%g'`
- else
- ac_dir_suffix= ac_dots=
- fi
-
- case "$ac_given_srcdir" in
- .) srcdir=.
- if test -z "$ac_dots"; then top_srcdir=.
- else top_srcdir=`echo $ac_dots|sed 's%/$%%'`; fi ;;
- /*) srcdir="$ac_given_srcdir$ac_dir_suffix"; top_srcdir="$ac_given_srcdir" ;;
- *) # Relative path.
- srcdir="$ac_dots$ac_given_srcdir$ac_dir_suffix"
- top_srcdir="$ac_dots$ac_given_srcdir" ;;
- esac
-
- case "$ac_given_INSTALL" in
- [/$]*) INSTALL="$ac_given_INSTALL" ;;
- *) INSTALL="$ac_dots$ac_given_INSTALL" ;;
- esac
-
- echo creating "$ac_file"
- rm -f "$ac_file"
- configure_input="Generated automatically from `echo $ac_file_in|sed 's%.*/%%'` by configure."
- case "$ac_file" in
- *Makefile*) ac_comsub="1i\\
-# $configure_input" ;;
- *) ac_comsub= ;;
- esac
-
- ac_file_inputs=`echo $ac_file_in|sed -e "s%^%$ac_given_srcdir/%" -e "s%:% $ac_given_srcdir/%g"`
- sed -e "$ac_comsub
-s%@configure_input@%$configure_input%g
-s%@srcdir@%$srcdir%g
-s%@top_srcdir@%$top_srcdir%g
-s%@INSTALL@%$INSTALL%g
-" $ac_file_inputs | (eval "$ac_sed_cmds") > $ac_file
-fi; done
-rm -f conftest.s*
-
-# These sed commands are passed to sed as "A NAME B NAME C VALUE D", where
-# NAME is the cpp macro being defined and VALUE is the value it is being given.
-#
-# ac_d sets the value in "#define NAME VALUE" lines.
-ac_dA='s%^\([ ]*\)#\([ ]*define[ ][ ]*\)'
-ac_dB='\([ ][ ]*\)[^ ]*%\1#\2'
-ac_dC='\3'
-ac_dD='%g'
-# ac_u turns "#undef NAME" with trailing blanks into "#define NAME VALUE".
-ac_uA='s%^\([ ]*\)#\([ ]*\)undef\([ ][ ]*\)'
-ac_uB='\([ ]\)%\1#\2define\3'
-ac_uC=' '
-ac_uD='\4%g'
-# ac_e turns "#undef NAME" without trailing blanks into "#define NAME VALUE".
-ac_eA='s%^\([ ]*\)#\([ ]*\)undef\([ ][ ]*\)'
-ac_eB='$%\1#\2define\3'
-ac_eC=' '
-ac_eD='%g'
-
-if test "${CONFIG_HEADERS+set}" != set; then
-EOF
-cat >> $CONFIG_STATUS <<EOF
- CONFIG_HEADERS="config.h:config.in"
-EOF
-cat >> $CONFIG_STATUS <<\EOF
-fi
-for ac_file in .. $CONFIG_HEADERS; do if test "x$ac_file" != x..; then
- # Support "outfile[:infile[:infile...]]", defaulting infile="outfile.in".
- case "$ac_file" in
- *:*) ac_file_in=`echo "$ac_file"|sed 's%[^:]*:%%'`
- ac_file=`echo "$ac_file"|sed 's%:.*%%'` ;;
- *) ac_file_in="${ac_file}.in" ;;
- esac
-
- echo creating $ac_file
-
- rm -f conftest.frag conftest.in conftest.out
- ac_file_inputs=`echo $ac_file_in|sed -e "s%^%$ac_given_srcdir/%" -e "s%:% $ac_given_srcdir/%g"`
- cat $ac_file_inputs > conftest.in
-
-EOF
-
-# Transform confdefs.h into a sed script conftest.vals that substitutes
-# the proper values into config.h.in to produce config.h. And first:
-# Protect against being on the right side of a sed subst in config.status.
-# Protect against being in an unquoted here document in config.status.
-rm -f conftest.vals
-cat > conftest.hdr <<\EOF
-s/[\\&%]/\\&/g
-s%[\\$`]%\\&%g
-s%#define \([A-Za-z_][A-Za-z0-9_]*\) *\(.*\)%${ac_dA}\1${ac_dB}\1${ac_dC}\2${ac_dD}%gp
-s%ac_d%ac_u%gp
-s%ac_u%ac_e%gp
-EOF
-sed -n -f conftest.hdr confdefs.h > conftest.vals
-rm -f conftest.hdr
-
-# This sed command replaces #undef with comments. This is necessary, for
-# example, in the case of _POSIX_SOURCE, which is predefined and required
-# on some systems where configure will not decide to define it.
-cat >> conftest.vals <<\EOF
-s%^[ ]*#[ ]*undef[ ][ ]*[a-zA-Z_][a-zA-Z_0-9]*%/* & */%
-EOF
-
-# Break up conftest.vals because some shells have a limit on
-# the size of here documents, and old seds have small limits too.
-
-rm -f conftest.tail
-while :
-do
- ac_lines=`grep -c . conftest.vals`
- # grep -c gives empty output for an empty file on some AIX systems.
- if test -z "$ac_lines" || test "$ac_lines" -eq 0; then break; fi
- # Write a limited-size here document to conftest.frag.
- echo ' cat > conftest.frag <<CEOF' >> $CONFIG_STATUS
- sed ${ac_max_here_lines}q conftest.vals >> $CONFIG_STATUS
- echo 'CEOF
- sed -f conftest.frag conftest.in > conftest.out
- rm -f conftest.in
- mv conftest.out conftest.in
-' >> $CONFIG_STATUS
- sed 1,${ac_max_here_lines}d conftest.vals > conftest.tail
- rm -f conftest.vals
- mv conftest.tail conftest.vals
-done
-rm -f conftest.vals
-
-cat >> $CONFIG_STATUS <<\EOF
- rm -f conftest.frag conftest.h
- echo "/* $ac_file. Generated automatically by configure. */" > conftest.h
- cat conftest.in >> conftest.h
- rm -f conftest.in
- if cmp -s $ac_file conftest.h 2>/dev/null; then
- echo "$ac_file is unchanged"
- rm -f conftest.h
- else
- # Remove last slash and all that follows it. Not all systems have dirname.
- ac_dir=`echo $ac_file|sed 's%/[^/][^/]*$%%'`
- if test "$ac_dir" != "$ac_file" && test "$ac_dir" != .; then
- # The file is in a subdirectory.
- test ! -d "$ac_dir" && mkdir "$ac_dir"
- fi
- rm -f $ac_file
- mv conftest.h $ac_file
- fi
-fi; done
-
-EOF
-
-cat >> $CONFIG_STATUS <<EOF
-ac_sources="$sim_link_files"
-ac_dests="$sim_link_links"
-EOF
-
-cat >> $CONFIG_STATUS <<\EOF
-srcdir=$ac_given_srcdir
-while test -n "$ac_sources"; do
- set $ac_dests; ac_dest=$1; shift; ac_dests=$*
- set $ac_sources; ac_source=$1; shift; ac_sources=$*
-
- echo "linking $srcdir/$ac_source to $ac_dest"
-
- if test ! -r $srcdir/$ac_source; then
- { echo "configure: error: $srcdir/$ac_source: File not found" 1>&2; exit 1; }
- fi
- rm -f $ac_dest
-
- # Make relative symlinks.
- # Remove last slash and all that follows it. Not all systems have dirname.
- ac_dest_dir=`echo $ac_dest|sed 's%/[^/][^/]*$%%'`
- if test "$ac_dest_dir" != "$ac_dest" && test "$ac_dest_dir" != .; then
- # The dest file is in a subdirectory.
- test ! -d "$ac_dest_dir" && mkdir "$ac_dest_dir"
- ac_dest_dir_suffix="/`echo $ac_dest_dir|sed 's%^\./%%'`"
- # A "../" for each directory in $ac_dest_dir_suffix.
- ac_dots=`echo $ac_dest_dir_suffix|sed 's%/[^/]*%../%g'`
- else
- ac_dest_dir_suffix= ac_dots=
- fi
-
- case "$srcdir" in
- [/$]*) ac_rel_source="$srcdir/$ac_source" ;;
- *) ac_rel_source="$ac_dots$srcdir/$ac_source" ;;
- esac
-
- # Make a symlink if possible; otherwise try a hard link.
- if ln -s $ac_rel_source $ac_dest 2>/dev/null ||
- ln $srcdir/$ac_source $ac_dest; then :
- else
- { echo "configure: error: can not link $ac_dest to $srcdir/$ac_source" 1>&2; exit 1; }
- fi
-done
-EOF
-cat >> $CONFIG_STATUS <<EOF
-
-EOF
-cat >> $CONFIG_STATUS <<\EOF
-case "x$CONFIG_FILES" in
- xMakefile*)
- echo "Merging Makefile.sim+Make-common.sim into Makefile ..."
- rm -f Makesim1.tmp Makesim2.tmp Makefile
- sed -n -e '/^## COMMON_PRE_/,/^## End COMMON_PRE_/ p' <Make-common.sim >Makesim1.tmp
- sed -n -e '/^## COMMON_POST_/,/^## End COMMON_POST_/ p' <Make-common.sim >Makesim2.tmp
- sed -e '/^## COMMON_PRE_/ r Makesim1.tmp' \
- -e '/^## COMMON_POST_/ r Makesim2.tmp' \
- <Makefile.sim >Makefile
- rm -f Makefile.sim Make-common.sim Makesim1.tmp Makesim2.tmp
- ;;
- esac
- case "x$CONFIG_HEADERS" in xconfig.h:config.in) echo > stamp-h ;; esac
-
-exit 0
-EOF
-chmod +x $CONFIG_STATUS
-rm -fr confdefs* $ac_clean_files
-test "$no_create" = yes || ${CONFIG_SHELL-/bin/sh} $CONFIG_STATUS || exit 1
-
-
diff --git a/sim/h8500/configure.in b/sim/h8500/configure.in
deleted file mode 100644
index 67a48825045..00000000000
--- a/sim/h8500/configure.in
+++ /dev/null
@@ -1,10 +0,0 @@
-dnl Process this file with autoconf to produce a configure script.
-sinclude(../common/aclocal.m4)
-AC_PREREQ(2.5)dnl
-AC_INIT(Makefile.in)
-
-SIM_AC_COMMON
-
-AC_CHECK_HEADERS(stdlib.h time.h)
-
-SIM_AC_OUTPUT
diff --git a/sim/h8500/inst.h b/sim/h8500/inst.h
deleted file mode 100644
index 328ca945a89..00000000000
--- a/sim/h8500/inst.h
+++ /dev/null
@@ -1,101 +0,0 @@
-#define DEBUG
-
-#define H8500_MSIZE (8*64*1024)
-#define CSIZE 1000
-
-
-union rtype
- {
- unsigned long l;
- unsigned short s[2];
- unsigned char *c;
- };
-
-
-/* Local register names */
-typedef enum
-{
- R0, R1, R2, R3, R4, R5, R6, R7,
- R_SR, /* 8 */
- R_PC, /* 9 */
- R_BR, /* 10 */
- R_BP, /* 11 */
- R_CP, /* 14 */
- R_DP, /* 13 */
- R_EP, /* 12 */
- R_TP, /* 15 */
- R_HARD_0, /* 16 */
- R_HARD8_0, /* 17 */
- R_LAST,
-} reg_type;
-
-
-
-
-typedef struct
-{
- fastref type;
- union
- {
- int code;
- unsigned char *bptr;
- unsigned short *wptr;
- unsigned long *lptr;
- unsigned char **segptr;
- union rtype *rptr;
-
- }
- reg;
- int literal;
- union
- {
- unsigned char **segreg;
- unsigned short *wptr;
- union rtype *rptr;
- }
- r2;
-}
-
-ea_type;
-
-
-
-typedef struct
-{
- ea_type srca;
- ea_type srcb;
- ea_type dst;
- fastref opcode;
- fastref flags;
- int next_pc;
- int oldpc;
- int cycles;
-#ifdef DEBUG
- h8500_opcode_info *op;
-#endif
-}
-
-decoded_inst;
-
-
-
-typedef struct
-{
- int exception;
- union rtype regs[20];
-
-
-
- unsigned char *memory;
- unsigned short *cache_idx;
- int cache_top;
- int maximum;
- int csize;
- decoded_inst *cache;
- int cycles;
- int insts;
- int ticks;
- int compiles;
-}
-
-cpu_state_type;
diff --git a/sim/h8500/tconfig.in b/sim/h8500/tconfig.in
deleted file mode 100644
index 21e0d0446a9..00000000000
--- a/sim/h8500/tconfig.in
+++ /dev/null
@@ -1,13 +0,0 @@
-/* h8500 target configuration file. */
-
-/* Define this if the simulator supports profiling.
- See the mips simulator for an example.
- This enables the `-p foo' and `-s bar' options.
- The target is required to provide sim_set_profile{,_size}. */
-/* #define SIM_HAVE_PROFILE */
-
-/* Define this if the simulator uses an instruction cache.
- See the h8/300 simulator for an example.
- This enables the `-c size' option to set the size of the cache.
- The target is required to provide sim_set_simcache_size. */
-#define SIM_HAVE_SIMCACHE
diff --git a/sim/i960/ChangeLog b/sim/i960/ChangeLog
deleted file mode 100644
index 8cd8512de9b..00000000000
--- a/sim/i960/ChangeLog
+++ /dev/null
@@ -1,198 +0,0 @@
-2001-07-05 Ben Elliston <bje@redhat.com>
-
- * Makefile.in (stamp-arch): Use $(CGEN_CPU_DIR).
- (stamp-cpu): Likewise.
- (stamp-desc): Likewise.
-
-2001-02-06 DJ Delorie <dj@redhat.com>
-
- * i960-desc.c: Update all the A macro definitions to the new
- stdc-sensitive versions that cgen would have used.
-
-2001-01-12 Frank Ch. Eigler <fche@redhat.com>
-
- * configure: Regenerated with sim_scache fix.
-
-2000-11-18 Greg McGary <greg@mcgary.org>
-
- * Makefile.in: remove `@true' commands for rules that have
- $(CGEN_MAINT) as a prerequisite.
-
-2000-08-21 Frank Ch. Eigler <fche@redhat.com>
-
- * Makefile.in (i960-clean): Add stamp-arch, stamp-cpu.
- (stamp-arch, stamp-cpu): New targets.
-
-Tue May 23 21:39:23 2000 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-2000-03-30 Dave Brolley <brolley@redhat.com>
-
- * configure: Regenerated.
-
-1999-10-04 Doug Evans <devans@casey.cygnus.com>
-
- * sem.c,sem-switch.c: Rebuild.
- * traps.c (sim_engine_invalid_insn): New arg `vpc'. Change type of
- result to SEM_PC. Return vpc.
-
-Wed Sep 29 14:46:36 1999 Dave Brolley <brolley@cygnus.com>
-
- * traps.c (sim_engine_invalid_insn): Return PC.
-
-Thu Sep 2 18:15:53 1999 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-1999-08-28 Doug Evans <devans@casey.cygnus.com>
-
- * cpu.h,decode.c,sem-switch.c,sem.c: Rebuild.
-
-1999-08-09 Doug Evans <devans@casey.cygnus.com>
-
- * cpu.h,decode.c,decode.h,model.c,sem-switch.c,sem.c: Rebuild.
-
-1999-08-04 Doug Evans <devans@casey.cygnus.com>
-
- * cpu.h,cpuall.h,decode.c,model.c,sem-switch.c,sem.c: Rebuild.
- * i960-desc.h: Rebuild.
-
-1999-05-08 Felix Lee <flee@cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Fri Apr 16 16:50:31 1999 Doug Evans <devans@charmed.cygnus.com>
-
- * devices.c (device_io_read_buffer): New arg `sd'.
- (device_io_write_buffer): New arg `sd'.
- (device_error): Give proper arg spec.
-
-1999-04-14 Doug Evans <devans@casey.cygnus.com>
-
- * i960-desc.c,i960-desc.h: Rebuild.
-
-Sun Apr 11 00:25:17 1999 Jim Wilson <wilson@cygnus.com>
-
- * TODO: Document more toolchain problems.
- * cpu.h, decode.c, model.c, sem-switch.c, sem.c: Rebuild.
-
-1999-04-10 Doug Evans <devans@casey.cygnus.com>
-
- * cpu.h,decode.c,sem-switch.c,sem.c: Rebuild.
-
-Fri Apr 9 19:30:05 1999 Jim Wilson <wilson@cygnus.com>
-
- * README, TODO: Clean up and update.
- * sim-if.c: s/m32r/i960. s/sparc32/i960.
- * decode.c, decode.h, i960-desc.c, i960-desc.h, i960-opc.h, model.c,
- sem-switch.c, sem.c: Rebuild.
-
-1999-03-27 Doug Evans <devans@casey.cygnus.com>
-
- * decode.c: Rebuild.
-
-1999-03-22 Doug Evans <devans@casey.cygnus.com>
-
- * arch.c,arch.h,model.c,i960-desc.c,i960-desc.h,i960-opc.h: Rebuild.
- * i960-sim.h (a_i960_h_gr_get,a_i960_h_gr_set): Declare.
- (a_i960_h_pc_get,a_i960_h_pc_set): Declare.
- * i960.c (a_i960_h_gr_get,a_i960_h_gr_set): New functions.
- (a_i960_h_pc_get,a_i960_h_pc_set): Ditto.
- * sim-if.c (sim_open): Update call to i960_cgen_cpu_open.
-
-1999-03-11 Doug Evans <devans@casey.cygnus.com>
-
- * arch.c,arch.h,cpu.c,i960-desc.c,i960-desc.h: Rebuild.
- * sim-if.c (sim_open): Update call to i960_cgen_cpu_open.
-
-1999-02-25 Doug Evans <devans@casey.cygnus.com>
-
- * i960-desc.c,i960-desc.h: Rebuild.
-
-1999-02-09 Doug Evans <devans@casey.cygnus.com>
-
- * Makefile.in (I960_OBJS): Add i960-desc.o.
- (SIM_EXTRA_DEPS): Replace cpu-opc.h with i960-desc.h,i960-opc.h.
- * configure.in (sim_link_files,sim_link_links): Delete.
- * configure: Rebuild.
- * decode.c,decode.h,model.c,sem-switch.c,sem.c: Rebuild.
- * devices.c: s/m32r/i960/.
- * i960-desc.c: New file.
- * i960-desc.h: New file.
- * i960-opc.h: New file.
- * i960-sim.h (I960_MISC_PROFILE): Delete.
- * i960.c (i960base_model_insn_before): Delete unused code.
- (i960base_model_insn_after): Ditto.
- (i960_model_init_insn_cycles,i960_model_update_insn_cycles): Ditto.
- (i960_model_record_cycles): Ditto.
- * mloop.in (execute): CGEN_INSN_ATTR renamed to CGEN_INSN_ATTR_VALUE.
- (extract-pbb): Use idesc->length to get insn length.
- * sim-if.c (i960_disassemble_insn): New function.
- (sim_open): Delete misc. profiling support. i960_cgen_cpu_open renamed
- from i960_cgen_opcode_open. Set disassembler.
- (sim_close): i960_cgen_cpu_open renamed from i960_cgen_opcode_open.
- * sim-main.h: Don't include cpu-opc.h,cpu-sim.h. Include
- i960-desc.h,i960-opc.h,i960-sim.h.
- (struct _sim_cpu): Delete member i960_misc_profile.
-
-1999-01-27 Doug Evans <devans@casey.cygnus.com>
-
- * cpu.h,decode.c,model.c,sem-switch.c,sem.c: Rebuild.
-
-1999-01-14 Doug Evans <devans@casey.cygnus.com>
-
- * arch.c,arch.c,cpuall.h: Regenerate.
- * cpu.c,cpu.h,decode.c,decode.h,model.c,sem-switch.c,sem.c: Regenerate.
-
-1999-01-11 Doug Evans <devans@casey.cygnus.com>
-
- * Makefile.in (i960-clean): rm eng.h.
- * sim-main.h: Delete inclusion of ansidecl.h.
- Delete inclusion of cgen-scache.h,cgen-cpu.h,cgen-trace.h,cpuall.h.
- (SIM_CORE_SIGNAL): m32r -> i960.
- * cpu.h: Regenerate.
- * traps.c: m32r -> i960.
-
-1999-01-05 Doug Evans <devans@casey.cygnus.com>
-
- * Makefile.in (SIM_EXTRA_DEPS): Use CGEN_INCLUDE_DEPS.
- (MAIN_INCLUDE_DEPS,INCLUDE_DEPS,OPS_INCLUDE_DEPS): Delete.
- (sim-if.o): Use SIM_MAIN_DEPS.
- (arch.o): Ditto.
- (traps.o): Ditto.
- (devices.o): Ditto.
- (I960BASE_INCLUDE_DEPS): Use CGEN_MAIN_CPU_DEPS.
- (i960.o): Use I960BASE_INCLUDE_DEPS.
- (mloop.o,cpu.o,decode.o,sem.o,model.o): Ditto.
- (stamp-arch): Pass mach=all to cgen-arch.
- * cpu.c,cpu.h,decode.c,model.c,sem-switch.c,sem.c: Regenerate.
- * sim-if.c (sim_open): Model probing code moved to sim-model.c.
-
-1998-12-14 James E Wilson <wilson@wilson-pc.cygnus.com>
-
- * cpu.h, decode.c, sem-switch.c, sem.c: Rebuilt.
- * traps.c (i960_trap): Store syscall results in regs 16 to 18 instead
- of regs 0 to 2.
-
-Mon Dec 14 22:33:38 1998 Jim Wilson <wilson@cygnus.com>
-
- * mloop.in (extract32): Add calls to @cpu@_fill_argbuf and
- @cpu@_fil_argbuf_tp.
-
-1998-12-14 Doug Evans <devans@casey.cygnus.com>
-
- * configure.in: --enable-cgen-maint support moved to common/aclocal.m4.
- * configure: Regenerate.
-
- * sem-switch.c,sem.c: Regenerate.
-
-1998-12-09 James E Wilson <wilson@wilson-pc.cygnus.com>
-
- * mloop.in execute): Test ARGBUF_PROFILE_P before profiling.
- Update calls to TRACE_INSN_INIT,TRACE_INSN_FINI.
- * cpu.h, cpuall.h, decode.c, sem-switch.c, sem.c: Regenerate.
-
-1998-12-08 James E Wilson <wilson@wilson-pc.cygnus.com>
-
- * New directory.
diff --git a/sim/i960/Makefile.in b/sim/i960/Makefile.in
deleted file mode 100644
index b1e0abeff0e..00000000000
--- a/sim/i960/Makefile.in
+++ /dev/null
@@ -1,125 +0,0 @@
-# Makefile template for Configure for the i960 simulator
-# Copyright (C) 1996, 1997, 1998, 1999 Free Software Foundation, Inc.
-# Contributed by Cygnus Support.
-#
-# This file is part of GDB, the GNU debugger.
-#
-# This program is free software; you can redistribute it and/or modify
-# it under the terms of the GNU General Public License as published by
-# the Free Software Foundation; either version 2 of the License, or
-# (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License along
-# with this program; if not, write to the Free Software Foundation, Inc.,
-# 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
-## COMMON_PRE_CONFIG_FRAG
-
-I960_OBJS = i960.o cpu.o decode.o sem.o model.o mloop.o i960-desc.o
-
-CONFIG_DEVICES = dv-sockser.o
-CONFIG_DEVICES =
-
-SIM_OBJS = \
- $(SIM_NEW_COMMON_OBJS) \
- sim-cpu.o \
- sim-engine.o \
- sim-hload.o \
- sim-hrw.o \
- sim-model.o \
- sim-reason.o \
- cgen-utils.o cgen-trace.o cgen-scache.o \
- cgen-run.o sim-reason.o sim-engine.o sim-stop.o \
- sim-if.o arch.o \
- $(I960_OBJS) \
- traps.o devices.o \
- $(CONFIG_DEVICES)
-
-# Extra headers included by sim-main.h.
-SIM_EXTRA_DEPS = \
- $(CGEN_INCLUDE_DEPS) \
- arch.h cpuall.h i960-sim.h i960-desc.h i960-opc.h
-
-SIM_EXTRA_CFLAGS =
-
-SIM_RUN_OBJS = nrun.o
-SIM_EXTRA_CLEAN = i960-clean
-
-# This selects the i960 newlib/libgloss syscall definitions.
-#
-# ??? This affects what stuff gets included from ../common/nltvals.def.
-# For now, we need SYS_exit because of traps.c. If we really need this,
-# then we need to add i960 specific definitions to nltvals.def.
-NL_TARGET = -DNL_TARGET_i960
-
-## COMMON_POST_CONFIG_FRAG
-
-arch = i960
-
-sim-if.o: sim-if.c $(SIM_MAIN_DEPS) $(srcdir)/../common/sim-core.h
-
-arch.o: arch.c $(SIM_MAIN_DEPS)
-
-traps.o: traps.c targ-vals.h $(SIM_MAIN_DEPS)
-devices.o: devices.c $(SIM_MAIN_DEPS)
-
-# I960 objs
-
-I960BASE_INCLUDE_DEPS = \
- $(CGEN_MAIN_CPU_DEPS) \
- cpu.h decode.h eng.h
-
-i960.o: i960.c $(I960BASE_INCLUDE_DEPS)
-
-# FIXME: Use of `mono' is wip.
-mloop.c eng.h: stamp-mloop
-stamp-mloop: $(srcdir)/../common/genmloop.sh mloop.in Makefile
- $(SHELL) $(srccom)/genmloop.sh \
- -mono -fast -pbb -switch sem-switch.c \
- -cpu i960base -infile $(srcdir)/mloop.in
- $(SHELL) $(srcroot)/move-if-change eng.hin eng.h
- $(SHELL) $(srcroot)/move-if-change mloop.cin mloop.c
- touch stamp-mloop
-# $(SHELL) $(srccom)/genmloop.sh \
-# -mono -scache -fast i960base $(srcdir)/mloop.in \
-# | sed -e 's/@cpu@/i960base/' -e 's/@CPU@/I960BASE/' >mloop.c
-mloop.o: mloop.c sem-switch.c $(I960BASE_INCLUDE_DEPS)
-
-cpu.o: cpu.c $(I960BASE_INCLUDE_DEPS)
-decode.o: decode.c $(I960BASE_INCLUDE_DEPS)
-sem.o: sem.c $(I960BASE_INCLUDE_DEPS)
-model.o: model.c $(I960BASE_INCLUDE_DEPS)
-
-i960-clean:
- rm -f mloop.c eng.h stamp-mloop
- rm -f tmp-*
- rm -f stamp-arch stamp-cpu stamp-desc
-
-# cgen support, enable with --enable-cgen-maint
-CGEN_MAINT = ; @true
-# The following line is commented in or out depending upon --enable-cgen-maint.
-@CGEN_MAINT@CGEN_MAINT =
-
-stamp-arch: $(CGEN_READ_SCM) $(CGEN_ARCH_SCM) $(CGEN_CPU_DIR)/i960.cpu
- $(MAKE) cgen-arch $(CGEN_FLAGS_TO_PASS) mach=all \
- FLAGS="with-scache with-profile=fn"
- touch stamp-arch
-arch.h arch.c cpuall.h: $(CGEN_MAINT) stamp-arch
-
-stamp-cpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CGEN_CPU_DIR)/i960.cpu
- $(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \
- cpu=i960base mach=i960:ka_sa,i960:ca SUFFIX= FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"
- touch stamp-cpu
-cpu.h sem.c sem-switch.c model.c decode.c decode.h: $(CGEN_MAINT) stamp-cpu
-
-stamp-desc: $(CGEN_READ_SCM) $(CGEN_DESC_SCM) \
- $(CGEN_CPU_DIR)/sparc.cpu $(CGEN_CPU_DIR)/sparccom.cpu $(CGEN_CPU_DIR)/i960.cpu $(CGEN_CPU_DIR)/i960.cpu
- $(MAKE) cgen-desc $(CGEN_FLAGS_TO_PASS) \
- cpu=i960 mach=all
- touch stamp-desc
-i960-desc.c i960-desc.h i960-opc.h: $(CGEN_MAINT) stamp-desc
diff --git a/sim/i960/README b/sim/i960/README
deleted file mode 100644
index 6d38a407ded..00000000000
--- a/sim/i960/README
+++ /dev/null
@@ -1,23 +0,0 @@
-This is the i960 simulator directory.
-
-It is still a work in progress. The current sources are reasonably
-well tested and lots of features are in. However, there's lots
-more yet to come.
-
----
-
-The simulator only supports the i960KA currently. Not all instructions
-are supported yet, only those instructions needed by the gcc/g++ testsuites
-have been added so far. There is no profiling support as yet. There is
-no pipeline or timing support as yet.
-
----
-
-There are lots of machine generated files in the source directory!
-They are only generated if you configure with --enable-cgen-maint,
-similar in behaviour to Makefile.in, configure under automake/autoconf.
-
-For details on the generator, see ../../cgen.
-
-devo/cgen isn't part of the comp-tools module yet.
-You'll need to check it out manually (also akin to automake/autoconf).
diff --git a/sim/i960/TODO b/sim/i960/TODO
deleted file mode 100644
index 5e156b131bc..00000000000
--- a/sim/i960/TODO
+++ /dev/null
@@ -1,64 +0,0 @@
-See ??? comments here and in cgen, and in libgloss/i960.
-
-Simulator:
-
-Update sim/i960 directory from sim/m32r directory. sim/i960 dir was created
-by copying the sim/m32r in September 1998, and is missing all sim/m32r updates
-since then.
-
-Review, clean up, finish, etc simulator files that are not cgen generated.
-This includes devices.c, i960-sim.h, mloop.in, sim-if.c, sim-main.h,
-tconfig.in, and traps.c.
-
-Some functions do not show up in trace output. This occasionally happens
-for main.
-
-Gdb core dumps if compile without -mka. Apparently a problem with recognizing
-"core" machine type.
-
-Get profiling working.
-
-Add pipelining, execution unit, timing, etc info.
-
-Add support for other models, besides KA.
-
-Add support for newer architectures, e.g. v1.1 instructions.
-
-Compiler:
-
-Running gcc gives nm warning from collect about missing a.out file.
-The output file is b.out, not a.out. Collect is probably looking for
-the wrong file name.
-
-Use of -mca gives lots of linker warnings for ka/ca architecture conflicts,
-but the two architectures are compatible.
-
-Need 96 bit long double support in fp-bit.c, otherwise any testcase using
-long double arithmetic hits an abort and runtime.
-
-Compiler takes far too much time to compile PlumHall testcases at high
-optimization levels.
-
-r2 seems to be an available call-clobbered registers, since it isn't used
-until a call occurs, and is dead when the call returns.
-
-BSP:
-
-Libgloss does not check for syscall error returns, which means errno never
-gets set.
-
-Libgloss does not use the syscall.h file.
-
-Binutils:
-
-Objdump -d fails on 64-bit host, specifically irix6.
-
-Gdb:
-
-Gdb sometimes prints messages about trace/breakpoint trap when hitting a
-breakpoint.
-
-Frame, up, down and related commands don't work.
-
-Gdb fails when next'ing over a leaf function compiled with -mleaf-procedure.
-Gdb fails when step'ing over a return from such a leaf function.
diff --git a/sim/i960/acconfig.h b/sim/i960/acconfig.h
deleted file mode 100644
index f9b87a10c60..00000000000
--- a/sim/i960/acconfig.h
+++ /dev/null
@@ -1,15 +0,0 @@
-
-/* Define to 1 if NLS is requested. */
-#undef ENABLE_NLS
-
-/* Define as 1 if you have catgets and don't want to use GNU gettext. */
-#undef HAVE_CATGETS
-
-/* Define as 1 if you have gettext and don't want to use GNU gettext. */
-#undef HAVE_GETTEXT
-
-/* Define as 1 if you have the stpcpy function. */
-#undef HAVE_STPCPY
-
-/* Define if your locale.h file contains LC_MESSAGES. */
-#undef HAVE_LC_MESSAGES
diff --git a/sim/i960/arch.c b/sim/i960/arch.c
deleted file mode 100644
index 74833b06daa..00000000000
--- a/sim/i960/arch.c
+++ /dev/null
@@ -1,38 +0,0 @@
-/* Simulator support for i960.
-
-THIS FILE IS MACHINE GENERATED WITH CGEN.
-
-Copyright (C) 1996, 1997, 1998, 1999 Free Software Foundation, Inc.
-
-This file is part of the GNU Simulators.
-
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License along
-with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
-*/
-
-#include "sim-main.h"
-#include "bfd.h"
-
-const MACH *sim_machs[] =
-{
-#ifdef HAVE_CPU_I960BASE
- & i960_ka_sa_mach,
-#endif
-#ifdef HAVE_CPU_I960BASE
- & i960_ca_mach,
-#endif
- 0
-};
-
diff --git a/sim/i960/arch.h b/sim/i960/arch.h
deleted file mode 100644
index fdfbf350b20..00000000000
--- a/sim/i960/arch.h
+++ /dev/null
@@ -1,44 +0,0 @@
-/* Simulator header for i960.
-
-THIS FILE IS MACHINE GENERATED WITH CGEN.
-
-Copyright (C) 1996, 1997, 1998, 1999 Free Software Foundation, Inc.
-
-This file is part of the GNU Simulators.
-
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License along
-with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
-*/
-
-#ifndef I960_ARCH_H
-#define I960_ARCH_H
-
-#define TARGET_BIG_ENDIAN 1
-
-/* Enum declaration for model types. */
-typedef enum model_type {
- MODEL_I960KA, MODEL_I960CA, MODEL_MAX
-} MODEL_TYPE;
-
-#define MAX_MODELS ((int) MODEL_MAX)
-
-/* Enum declaration for unit types. */
-typedef enum unit_type {
- UNIT_NONE, UNIT_I960KA_U_EXEC, UNIT_I960CA_U_EXEC, UNIT_MAX
-} UNIT_TYPE;
-
-#define MAX_UNITS (1)
-
-#endif /* I960_ARCH_H */
diff --git a/sim/i960/config.in b/sim/i960/config.in
deleted file mode 100644
index 9723b8662c9..00000000000
--- a/sim/i960/config.in
+++ /dev/null
@@ -1,162 +0,0 @@
-/* config.in. Generated automatically from configure.in by autoheader. */
-
-/* Define if using alloca.c. */
-#undef C_ALLOCA
-
-/* Define to empty if the keyword does not work. */
-#undef const
-
-/* Define to one of _getb67, GETB67, getb67 for Cray-2 and Cray-YMP systems.
- This function is required for alloca.c support on those systems. */
-#undef CRAY_STACKSEG_END
-
-/* Define if you have alloca, as a function or macro. */
-#undef HAVE_ALLOCA
-
-/* Define if you have <alloca.h> and it should be used (not on Ultrix). */
-#undef HAVE_ALLOCA_H
-
-/* Define if you have a working `mmap' system call. */
-#undef HAVE_MMAP
-
-/* Define as __inline if that's what the C compiler calls it. */
-#undef inline
-
-/* Define to `long' if <sys/types.h> doesn't define. */
-#undef off_t
-
-/* Define if you need to in order for stat and other things to work. */
-#undef _POSIX_SOURCE
-
-/* Define as the return type of signal handlers (int or void). */
-#undef RETSIGTYPE
-
-/* Define to `unsigned' if <sys/types.h> doesn't define. */
-#undef size_t
-
-/* If using the C implementation of alloca, define if you know the
- direction of stack growth for your system; otherwise it will be
- automatically deduced at run-time.
- STACK_DIRECTION > 0 => grows toward higher addresses
- STACK_DIRECTION < 0 => grows toward lower addresses
- STACK_DIRECTION = 0 => direction of growth unknown
- */
-#undef STACK_DIRECTION
-
-/* Define if you have the ANSI C header files. */
-#undef STDC_HEADERS
-
-/* Define if your processor stores words with the most significant
- byte first (like Motorola and SPARC, unlike Intel and VAX). */
-#undef WORDS_BIGENDIAN
-
-/* Define to 1 if NLS is requested. */
-#undef ENABLE_NLS
-
-/* Define as 1 if you have gettext and don't want to use GNU gettext. */
-#undef HAVE_GETTEXT
-
-/* Define as 1 if you have the stpcpy function. */
-#undef HAVE_STPCPY
-
-/* Define if your locale.h file contains LC_MESSAGES. */
-#undef HAVE_LC_MESSAGES
-
-/* Define if you have the __argz_count function. */
-#undef HAVE___ARGZ_COUNT
-
-/* Define if you have the __argz_next function. */
-#undef HAVE___ARGZ_NEXT
-
-/* Define if you have the __argz_stringify function. */
-#undef HAVE___ARGZ_STRINGIFY
-
-/* Define if you have the __setfpucw function. */
-#undef HAVE___SETFPUCW
-
-/* Define if you have the dcgettext function. */
-#undef HAVE_DCGETTEXT
-
-/* Define if you have the getcwd function. */
-#undef HAVE_GETCWD
-
-/* Define if you have the getpagesize function. */
-#undef HAVE_GETPAGESIZE
-
-/* Define if you have the getrusage function. */
-#undef HAVE_GETRUSAGE
-
-/* Define if you have the munmap function. */
-#undef HAVE_MUNMAP
-
-/* Define if you have the putenv function. */
-#undef HAVE_PUTENV
-
-/* Define if you have the setenv function. */
-#undef HAVE_SETENV
-
-/* Define if you have the setlocale function. */
-#undef HAVE_SETLOCALE
-
-/* Define if you have the sigaction function. */
-#undef HAVE_SIGACTION
-
-/* Define if you have the stpcpy function. */
-#undef HAVE_STPCPY
-
-/* Define if you have the strcasecmp function. */
-#undef HAVE_STRCASECMP
-
-/* Define if you have the strchr function. */
-#undef HAVE_STRCHR
-
-/* Define if you have the time function. */
-#undef HAVE_TIME
-
-/* Define if you have the <argz.h> header file. */
-#undef HAVE_ARGZ_H
-
-/* Define if you have the <fcntl.h> header file. */
-#undef HAVE_FCNTL_H
-
-/* Define if you have the <fpu_control.h> header file. */
-#undef HAVE_FPU_CONTROL_H
-
-/* Define if you have the <limits.h> header file. */
-#undef HAVE_LIMITS_H
-
-/* Define if you have the <locale.h> header file. */
-#undef HAVE_LOCALE_H
-
-/* Define if you have the <malloc.h> header file. */
-#undef HAVE_MALLOC_H
-
-/* Define if you have the <nl_types.h> header file. */
-#undef HAVE_NL_TYPES_H
-
-/* Define if you have the <stdlib.h> header file. */
-#undef HAVE_STDLIB_H
-
-/* Define if you have the <string.h> header file. */
-#undef HAVE_STRING_H
-
-/* Define if you have the <strings.h> header file. */
-#undef HAVE_STRINGS_H
-
-/* Define if you have the <sys/param.h> header file. */
-#undef HAVE_SYS_PARAM_H
-
-/* Define if you have the <sys/resource.h> header file. */
-#undef HAVE_SYS_RESOURCE_H
-
-/* Define if you have the <sys/time.h> header file. */
-#undef HAVE_SYS_TIME_H
-
-/* Define if you have the <time.h> header file. */
-#undef HAVE_TIME_H
-
-/* Define if you have the <unistd.h> header file. */
-#undef HAVE_UNISTD_H
-
-/* Define if you have the <values.h> header file. */
-#undef HAVE_VALUES_H
diff --git a/sim/i960/configure b/sim/i960/configure
deleted file mode 100755
index d848325255f..00000000000
--- a/sim/i960/configure
+++ /dev/null
@@ -1,4294 +0,0 @@
-#! /bin/sh
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-sim_inline="-DDEFAULT_INLINE=0"
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-# This file is derived from `gettext.m4'. The difference is that the
-# included macros assume Cygnus-style source and build trees.
-
-# Macro to add for using GNU gettext.
-# Ulrich Drepper <drepper@cygnus.com>, 1995.
-#
-# This file file be copied and used freely without restrictions. It can
-# be used in projects which are not available under the GNU Public License
-# but which still want to provide support for the GNU gettext functionality.
-# Please note that the actual code is *not* freely available.
-
-# serial 3
-
-
-
-
-
-# Search path for a program which passes the given test.
-# Ulrich Drepper <drepper@cygnus.com>, 1996.
-#
-# This file file be copied and used freely without restrictions. It can
-# be used in projects which are not available under the GNU Public License
-# but which still want to provide support for the GNU gettext functionality.
-# Please note that the actual code is *not* freely available.
-
-# serial 1
-
-
-
-# Check whether LC_MESSAGES is available in <locale.h>.
-# Ulrich Drepper <drepper@cygnus.com>, 1995.
-#
-# This file file be copied and used freely without restrictions. It can
-# be used in projects which are not available under the GNU Public License
-# but which still want to provide support for the GNU gettext functionality.
-# Please note that the actual code is *not* freely available.
-
-# serial 1
-
-
-
-
-
-
-# Guess values for system-dependent variables and create Makefiles.
-# Generated automatically using autoconf version 2.13
-# Copyright (C) 1992, 93, 94, 95, 96 Free Software Foundation, Inc.
-#
-# This configure script is free software; the Free Software Foundation
-# gives unlimited permission to copy, distribute and modify it.
-
-# Defaults:
-ac_help=
-ac_default_prefix=/usr/local
-# Any additions from configure.in:
-ac_help="$ac_help
- --disable-nls do not use Native Language Support"
-ac_help="$ac_help
- --with-included-gettext use the GNU gettext library included here"
-ac_help="$ac_help
- --enable-maintainer-mode Enable developer functionality."
-ac_help="$ac_help
- --enable-sim-bswap Use Host specific BSWAP instruction."
-ac_help="$ac_help
- --enable-sim-cflags=opts Extra CFLAGS for use in building simulator"
-ac_help="$ac_help
- --enable-sim-debug=opts Enable debugging flags"
-ac_help="$ac_help
- --enable-sim-stdio Specify whether to use stdio for console input/output."
-ac_help="$ac_help
- --enable-sim-trace=opts Enable tracing flags"
-ac_help="$ac_help
- --enable-sim-profile=opts Enable profiling flags"
-ac_help="$ac_help
- --enable-sim-endian=endian Specify target byte endian orientation."
-ac_help="$ac_help
- --enable-sim-alignment=align Specify strict, nonstrict or forced alignment of memory accesses."
-ac_help="$ac_help
- --enable-sim-hostendian=end Specify host byte endian orientation."
-ac_help="$ac_help
- --enable-sim-scache=size Specify simulator execution cache size."
-ac_help="$ac_help
- --enable-sim-default-model=model Specify default model to simulate."
-ac_help="$ac_help
- --enable-sim-environment=environment Specify mixed, user, virtual or operating environment."
-ac_help="$ac_help
- --enable-cgen-maint[=DIR] build cgen generated files"
-
-# Initialize some variables set by options.
-# The variables have the same names as the options, with
-# dashes changed to underlines.
-build=NONE
-cache_file=./config.cache
-exec_prefix=NONE
-host=NONE
-no_create=
-nonopt=NONE
-no_recursion=
-prefix=NONE
-program_prefix=NONE
-program_suffix=NONE
-program_transform_name=s,x,x,
-silent=
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-sitefile=
-srcdir=
-target=NONE
-verbose=
-x_includes=NONE
-x_libraries=NONE
-bindir='${exec_prefix}/bin'
-sbindir='${exec_prefix}/sbin'
-libexecdir='${exec_prefix}/libexec'
-datadir='${prefix}/share'
-sysconfdir='${prefix}/etc'
-sharedstatedir='${prefix}/com'
-localstatedir='${prefix}/var'
-libdir='${exec_prefix}/lib'
-includedir='${prefix}/include'
-oldincludedir='/usr/include'
-infodir='${prefix}/info'
-mandir='${prefix}/man'
-
-# Initialize some other variables.
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-#include <alloca.h>
-int main() {
-char *p = alloca(2 * sizeof(int));
-; return 0; }
-EOF
-if { (eval echo configure:1120: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- rm -rf conftest*
- ac_cv_header_alloca_h=yes
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- ac_cv_header_alloca_h=no
-fi
-rm -f conftest*
-fi
-
-echo "$ac_t""$ac_cv_header_alloca_h" 1>&6
-if test $ac_cv_header_alloca_h = yes; then
- cat >> confdefs.h <<\EOF
-#define HAVE_ALLOCA_H 1
-EOF
-
-fi
-
-echo $ac_n "checking for alloca""... $ac_c" 1>&6
-echo "configure:1141: checking for alloca" >&5
-if eval "test \"`echo '$''{'ac_cv_func_alloca_works'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1146 "configure"
-#include "confdefs.h"
-
-#ifdef __GNUC__
-# define alloca __builtin_alloca
-#else
-# ifdef _MSC_VER
-# include <malloc.h>
-# define alloca _alloca
-# else
-# if HAVE_ALLOCA_H
-# include <alloca.h>
-# else
-# ifdef _AIX
- #pragma alloca
-# else
-# ifndef alloca /* predefined by HP cc +Olibcalls */
-char *alloca ();
-# endif
-# endif
-# endif
-# endif
-#endif
-
-int main() {
-char *p = (char *) alloca(1);
-; return 0; }
-EOF
-if { (eval echo configure:1174: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- rm -rf conftest*
- ac_cv_func_alloca_works=yes
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- ac_cv_func_alloca_works=no
-fi
-rm -f conftest*
-fi
-
-echo "$ac_t""$ac_cv_func_alloca_works" 1>&6
-if test $ac_cv_func_alloca_works = yes; then
- cat >> confdefs.h <<\EOF
-#define HAVE_ALLOCA 1
-EOF
-
-fi
-
-if test $ac_cv_func_alloca_works = no; then
- # The SVR3 libPW and SVR4 libucb both contain incompatible functions
- # that cause trouble. Some versions do not even contain alloca or
- # contain a buggy version. If you still want to use their alloca,
- # use ar to extract alloca.o from them instead of compiling alloca.c.
- ALLOCA=alloca.${ac_objext}
- cat >> confdefs.h <<\EOF
-#define C_ALLOCA 1
-EOF
-
-
-echo $ac_n "checking whether alloca needs Cray hooks""... $ac_c" 1>&6
-echo "configure:1206: checking whether alloca needs Cray hooks" >&5
-if eval "test \"`echo '$''{'ac_cv_os_cray'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1211 "configure"
-#include "confdefs.h"
-#if defined(CRAY) && ! defined(CRAY2)
-webecray
-#else
-wenotbecray
-#endif
-
-EOF
-if (eval "$ac_cpp conftest.$ac_ext") 2>&5 |
- egrep "webecray" >/dev/null 2>&1; then
- rm -rf conftest*
- ac_cv_os_cray=yes
-else
- rm -rf conftest*
- ac_cv_os_cray=no
-fi
-rm -f conftest*
-
-fi
-
-echo "$ac_t""$ac_cv_os_cray" 1>&6
-if test $ac_cv_os_cray = yes; then
-for ac_func in _getb67 GETB67 getb67; do
- echo $ac_n "checking for $ac_func""... $ac_c" 1>&6
-echo "configure:1236: checking for $ac_func" >&5
-if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1241 "configure"
-#include "confdefs.h"
-/* System header to define __stub macros and hopefully few prototypes,
- which can conflict with char $ac_func(); below. */
-#include <assert.h>
-/* Override any gcc2 internal prototype to avoid an error. */
-/* We use char because int might match the return type of a gcc2
- builtin and then its argument prototype would still apply. */
-char $ac_func();
-
-int main() {
-
-/* The GNU C library defines this for functions which it implements
- to always fail with ENOSYS. Some functions are actually named
- something starting with __ and the normal name is an alias. */
-#if defined (__stub_$ac_func) || defined (__stub___$ac_func)
-choke me
-#else
-$ac_func();
-#endif
-
-; return 0; }
-EOF
-if { (eval echo configure:1264: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=yes"
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=no"
-fi
-rm -f conftest*
-fi
-
-if eval "test \"`echo '$ac_cv_func_'$ac_func`\" = yes"; then
- echo "$ac_t""yes" 1>&6
- cat >> confdefs.h <<EOF
-#define CRAY_STACKSEG_END $ac_func
-EOF
-
- break
-else
- echo "$ac_t""no" 1>&6
-fi
-
-done
-fi
-
-echo $ac_n "checking stack direction for C alloca""... $ac_c" 1>&6
-echo "configure:1291: checking stack direction for C alloca" >&5
-if eval "test \"`echo '$''{'ac_cv_c_stack_direction'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- if test "$cross_compiling" = yes; then
- ac_cv_c_stack_direction=0
-else
- cat > conftest.$ac_ext <<EOF
-#line 1299 "configure"
-#include "confdefs.h"
-find_stack_direction ()
-{
- static char *addr = 0;
- auto char dummy;
- if (addr == 0)
- {
- addr = &dummy;
- return find_stack_direction ();
- }
- else
- return (&dummy > addr) ? 1 : -1;
-}
-main ()
-{
- exit (find_stack_direction() < 0);
-}
-EOF
-if { (eval echo configure:1318: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null
-then
- ac_cv_c_stack_direction=1
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -fr conftest*
- ac_cv_c_stack_direction=-1
-fi
-rm -fr conftest*
-fi
-
-fi
-
-echo "$ac_t""$ac_cv_c_stack_direction" 1>&6
-cat >> confdefs.h <<EOF
-#define STACK_DIRECTION $ac_cv_c_stack_direction
-EOF
-
-fi
-
-for ac_hdr in unistd.h
-do
-ac_safe=`echo "$ac_hdr" | sed 'y%./+-%__p_%'`
-echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6
-echo "configure:1343: checking for $ac_hdr" >&5
-if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1348 "configure"
-#include "confdefs.h"
-#include <$ac_hdr>
-EOF
-ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:1353: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
-ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
-if test -z "$ac_err"; then
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=yes"
-else
- echo "$ac_err" >&5
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=no"
-fi
-rm -f conftest*
-fi
-if eval "test \"`echo '$ac_cv_header_'$ac_safe`\" = yes"; then
- echo "$ac_t""yes" 1>&6
- ac_tr_hdr=HAVE_`echo $ac_hdr | sed 'y%abcdefghijklmnopqrstuvwxyz./-%ABCDEFGHIJKLMNOPQRSTUVWXYZ___%'`
- cat >> confdefs.h <<EOF
-#define $ac_tr_hdr 1
-EOF
-
-else
- echo "$ac_t""no" 1>&6
-fi
-done
-
-for ac_func in getpagesize
-do
-echo $ac_n "checking for $ac_func""... $ac_c" 1>&6
-echo "configure:1382: checking for $ac_func" >&5
-if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1387 "configure"
-#include "confdefs.h"
-/* System header to define __stub macros and hopefully few prototypes,
- which can conflict with char $ac_func(); below. */
-#include <assert.h>
-/* Override any gcc2 internal prototype to avoid an error. */
-/* We use char because int might match the return type of a gcc2
- builtin and then its argument prototype would still apply. */
-char $ac_func();
-
-int main() {
-
-/* The GNU C library defines this for functions which it implements
- to always fail with ENOSYS. Some functions are actually named
- something starting with __ and the normal name is an alias. */
-#if defined (__stub_$ac_func) || defined (__stub___$ac_func)
-choke me
-#else
-$ac_func();
-#endif
-
-; return 0; }
-EOF
-if { (eval echo configure:1410: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=yes"
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=no"
-fi
-rm -f conftest*
-fi
-
-if eval "test \"`echo '$ac_cv_func_'$ac_func`\" = yes"; then
- echo "$ac_t""yes" 1>&6
- ac_tr_func=HAVE_`echo $ac_func | tr 'abcdefghijklmnopqrstuvwxyz' 'ABCDEFGHIJKLMNOPQRSTUVWXYZ'`
- cat >> confdefs.h <<EOF
-#define $ac_tr_func 1
-EOF
-
-else
- echo "$ac_t""no" 1>&6
-fi
-done
-
-echo $ac_n "checking for working mmap""... $ac_c" 1>&6
-echo "configure:1435: checking for working mmap" >&5
-if eval "test \"`echo '$''{'ac_cv_func_mmap_fixed_mapped'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- if test "$cross_compiling" = yes; then
- ac_cv_func_mmap_fixed_mapped=no
-else
- cat > conftest.$ac_ext <<EOF
-#line 1443 "configure"
-#include "confdefs.h"
-
-/* Thanks to Mike Haertel and Jim Avera for this test.
- Here is a matrix of mmap possibilities:
- mmap private not fixed
- mmap private fixed at somewhere currently unmapped
- mmap private fixed at somewhere already mapped
- mmap shared not fixed
- mmap shared fixed at somewhere currently unmapped
- mmap shared fixed at somewhere already mapped
- For private mappings, we should verify that changes cannot be read()
- back from the file, nor mmap's back from the file at a different
- address. (There have been systems where private was not correctly
- implemented like the infamous i386 svr4.0, and systems where the
- VM page cache was not coherent with the filesystem buffer cache
- like early versions of FreeBSD and possibly contemporary NetBSD.)
- For shared mappings, we should conversely verify that changes get
- propogated back to all the places they're supposed to be.
-
- Grep wants private fixed already mapped.
- The main things grep needs to know about mmap are:
- * does it exist and is it safe to write into the mmap'd area
- * how to use it (BSD variants) */
-#include <sys/types.h>
-#include <fcntl.h>
-#include <sys/mman.h>
-
-/* This mess was copied from the GNU getpagesize.h. */
-#ifndef HAVE_GETPAGESIZE
-# ifdef HAVE_UNISTD_H
-# include <unistd.h>
-# endif
-
-/* Assume that all systems that can run configure have sys/param.h. */
-# ifndef HAVE_SYS_PARAM_H
-# define HAVE_SYS_PARAM_H 1
-# endif
-
-# ifdef _SC_PAGESIZE
-# define getpagesize() sysconf(_SC_PAGESIZE)
-# else /* no _SC_PAGESIZE */
-# ifdef HAVE_SYS_PARAM_H
-# include <sys/param.h>
-# ifdef EXEC_PAGESIZE
-# define getpagesize() EXEC_PAGESIZE
-# else /* no EXEC_PAGESIZE */
-# ifdef NBPG
-# define getpagesize() NBPG * CLSIZE
-# ifndef CLSIZE
-# define CLSIZE 1
-# endif /* no CLSIZE */
-# else /* no NBPG */
-# ifdef NBPC
-# define getpagesize() NBPC
-# else /* no NBPC */
-# ifdef PAGESIZE
-# define getpagesize() PAGESIZE
-# endif /* PAGESIZE */
-# endif /* no NBPC */
-# endif /* no NBPG */
-# endif /* no EXEC_PAGESIZE */
-# else /* no HAVE_SYS_PARAM_H */
-# define getpagesize() 8192 /* punt totally */
-# endif /* no HAVE_SYS_PARAM_H */
-# endif /* no _SC_PAGESIZE */
-
-#endif /* no HAVE_GETPAGESIZE */
-
-#ifdef __cplusplus
-extern "C" { void *malloc(unsigned); }
-#else
-char *malloc();
-#endif
-
-int
-main()
-{
- char *data, *data2, *data3;
- int i, pagesize;
- int fd;
-
- pagesize = getpagesize();
-
- /*
- * First, make a file with some known garbage in it.
- */
- data = malloc(pagesize);
- if (!data)
- exit(1);
- for (i = 0; i < pagesize; ++i)
- *(data + i) = rand();
- umask(0);
- fd = creat("conftestmmap", 0600);
- if (fd < 0)
- exit(1);
- if (write(fd, data, pagesize) != pagesize)
- exit(1);
- close(fd);
-
- /*
- * Next, try to mmap the file at a fixed address which
- * already has something else allocated at it. If we can,
- * also make sure that we see the same garbage.
- */
- fd = open("conftestmmap", O_RDWR);
- if (fd < 0)
- exit(1);
- data2 = malloc(2 * pagesize);
- if (!data2)
- exit(1);
- data2 += (pagesize - ((int) data2 & (pagesize - 1))) & (pagesize - 1);
- if (data2 != mmap(data2, pagesize, PROT_READ | PROT_WRITE,
- MAP_PRIVATE | MAP_FIXED, fd, 0L))
- exit(1);
- for (i = 0; i < pagesize; ++i)
- if (*(data + i) != *(data2 + i))
- exit(1);
-
- /*
- * Finally, make sure that changes to the mapped area
- * do not percolate back to the file as seen by read().
- * (This is a bug on some variants of i386 svr4.0.)
- */
- for (i = 0; i < pagesize; ++i)
- *(data2 + i) = *(data2 + i) + 1;
- data3 = malloc(pagesize);
- if (!data3)
- exit(1);
- if (read(fd, data3, pagesize) != pagesize)
- exit(1);
- for (i = 0; i < pagesize; ++i)
- if (*(data + i) != *(data3 + i))
- exit(1);
- close(fd);
- unlink("conftestmmap");
- exit(0);
-}
-
-EOF
-if { (eval echo configure:1583: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null
-then
- ac_cv_func_mmap_fixed_mapped=yes
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -fr conftest*
- ac_cv_func_mmap_fixed_mapped=no
-fi
-rm -fr conftest*
-fi
-
-fi
-
-echo "$ac_t""$ac_cv_func_mmap_fixed_mapped" 1>&6
-if test $ac_cv_func_mmap_fixed_mapped = yes; then
- cat >> confdefs.h <<\EOF
-#define HAVE_MMAP 1
-EOF
-
-fi
-
-echo $ac_n "checking for Cygwin environment""... $ac_c" 1>&6
-echo "configure:1606: checking for Cygwin environment" >&5
-if eval "test \"`echo '$''{'ac_cv_cygwin'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1611 "configure"
-#include "confdefs.h"
-
-int main() {
-
-#ifndef __CYGWIN__
-#define __CYGWIN__ __CYGWIN32__
-#endif
-return __CYGWIN__;
-; return 0; }
-EOF
-if { (eval echo configure:1622: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
- rm -rf conftest*
- ac_cv_cygwin=yes
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- ac_cv_cygwin=no
-fi
-rm -f conftest*
-rm -f conftest*
-fi
-
-echo "$ac_t""$ac_cv_cygwin" 1>&6
-CYGWIN=
-test "$ac_cv_cygwin" = yes && CYGWIN=yes
-echo $ac_n "checking for mingw32 environment""... $ac_c" 1>&6
-echo "configure:1639: checking for mingw32 environment" >&5
-if eval "test \"`echo '$''{'ac_cv_mingw32'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1644 "configure"
-#include "confdefs.h"
-
-int main() {
-return __MINGW32__;
-; return 0; }
-EOF
-if { (eval echo configure:1651: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
- rm -rf conftest*
- ac_cv_mingw32=yes
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- ac_cv_mingw32=no
-fi
-rm -f conftest*
-rm -f conftest*
-fi
-
-echo "$ac_t""$ac_cv_mingw32" 1>&6
-MINGW32=
-test "$ac_cv_mingw32" = yes && MINGW32=yes
-
-# autoconf.info says this should be called right after AC_INIT.
-
-
-ac_aux_dir=
-for ac_dir in `cd $srcdir;pwd`/../.. $srcdir/`cd $srcdir;pwd`/../..; do
- if test -f $ac_dir/install-sh; then
- ac_aux_dir=$ac_dir
- ac_install_sh="$ac_aux_dir/install-sh -c"
- break
- elif test -f $ac_dir/install.sh; then
- ac_aux_dir=$ac_dir
- ac_install_sh="$ac_aux_dir/install.sh -c"
- break
- fi
-done
-if test -z "$ac_aux_dir"; then
- { echo "configure: error: can not find install-sh or install.sh in `cd $srcdir;pwd`/../.. $srcdir/`cd $srcdir;pwd`/../.." 1>&2; exit 1; }
-fi
-ac_config_guess=$ac_aux_dir/config.guess
-ac_config_sub=$ac_aux_dir/config.sub
-ac_configure=$ac_aux_dir/configure # This should be Cygnus configure.
-
-
-# Do some error checking and defaulting for the host and target type.
-# The inputs are:
-# configure --host=HOST --target=TARGET --build=BUILD NONOPT
-#
-# The rules are:
-# 1. You are not allowed to specify --host, --target, and nonopt at the
-# same time.
-# 2. Host defaults to nonopt.
-# 3. If nonopt is not specified, then host defaults to the current host,
-# as determined by config.guess.
-# 4. Target and build default to nonopt.
-# 5. If nonopt is not specified, then target and build default to host.
-
-# The aliases save the names the user supplied, while $host etc.
-# will get canonicalized.
-case $host---$target---$nonopt in
-NONE---*---* | *---NONE---* | *---*---NONE) ;;
-*) { echo "configure: error: can only configure for one host and one target at a time" 1>&2; exit 1; } ;;
-esac
-
-
-# Make sure we can run config.sub.
-if ${CONFIG_SHELL-/bin/sh} $ac_config_sub sun4 >/dev/null 2>&1; then :
-else { echo "configure: error: can not run $ac_config_sub" 1>&2; exit 1; }
-fi
-
-echo $ac_n "checking host system type""... $ac_c" 1>&6
-echo "configure:1718: checking host system type" >&5
-
-host_alias=$host
-case "$host_alias" in
-NONE)
- case $nonopt in
- NONE)
- if host_alias=`${CONFIG_SHELL-/bin/sh} $ac_config_guess`; then :
- else { echo "configure: error: can not guess host type; you must specify one" 1>&2; exit 1; }
- fi ;;
- *) host_alias=$nonopt ;;
- esac ;;
-esac
-
-host=`${CONFIG_SHELL-/bin/sh} $ac_config_sub $host_alias`
-host_cpu=`echo $host | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\1/'`
-host_vendor=`echo $host | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\2/'`
-host_os=`echo $host | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\3/'`
-echo "$ac_t""$host" 1>&6
-
-echo $ac_n "checking target system type""... $ac_c" 1>&6
-echo "configure:1739: checking target system type" >&5
-
-target_alias=$target
-case "$target_alias" in
-NONE)
- case $nonopt in
- NONE) target_alias=$host_alias ;;
- *) target_alias=$nonopt ;;
- esac ;;
-esac
-
-target=`${CONFIG_SHELL-/bin/sh} $ac_config_sub $target_alias`
-target_cpu=`echo $target | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\1/'`
-target_vendor=`echo $target | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\2/'`
-target_os=`echo $target | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\3/'`
-echo "$ac_t""$target" 1>&6
-
-echo $ac_n "checking build system type""... $ac_c" 1>&6
-echo "configure:1757: checking build system type" >&5
-
-build_alias=$build
-case "$build_alias" in
-NONE)
- case $nonopt in
- NONE) build_alias=$host_alias ;;
- *) build_alias=$nonopt ;;
- esac ;;
-esac
-
-build=`${CONFIG_SHELL-/bin/sh} $ac_config_sub $build_alias`
-build_cpu=`echo $build | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\1/'`
-build_vendor=`echo $build | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\2/'`
-build_os=`echo $build | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\3/'`
-echo "$ac_t""$build" 1>&6
-
-test "$host_alias" != "$target_alias" &&
- test "$program_prefix$program_suffix$program_transform_name" = \
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- program_prefix=${target_alias}-
-
-if test "$program_transform_name" = s,x,x,; then
- program_transform_name=
-else
- # Double any \ or $. echo might interpret backslashes.
- cat <<\EOF_SED > conftestsed
-s,\\,\\\\,g; s,\$,$$,g
-EOF_SED
- program_transform_name="`echo $program_transform_name|sed -f conftestsed`"
- rm -f conftestsed
-fi
-test "$program_prefix" != NONE &&
- program_transform_name="s,^,${program_prefix},; $program_transform_name"
-# Use a double $ so make ignores it.
-test "$program_suffix" != NONE &&
- program_transform_name="s,\$\$,${program_suffix},; $program_transform_name"
-
-# sed with no file args requires a program.
-test "$program_transform_name" = "" && program_transform_name="s,x,x,"
-
-# Extract the first word of "gcc", so it can be a program name with args.
-set dummy gcc; ac_word=$2
-echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:1801: checking for $ac_word" >&5
-if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- if test -n "$CC"; then
- ac_cv_prog_CC="$CC" # Let the user override the test.
-else
- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
- ac_dummy="$PATH"
- for ac_dir in $ac_dummy; do
- test -z "$ac_dir" && ac_dir=.
- if test -f $ac_dir/$ac_word; then
- ac_cv_prog_CC="gcc"
- break
- fi
- done
- IFS="$ac_save_ifs"
-fi
-fi
-CC="$ac_cv_prog_CC"
-if test -n "$CC"; then
- echo "$ac_t""$CC" 1>&6
-else
- echo "$ac_t""no" 1>&6
-fi
-
-if test -z "$CC"; then
- # Extract the first word of "cc", so it can be a program name with args.
-set dummy cc; ac_word=$2
-echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:1831: checking for $ac_word" >&5
-if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- if test -n "$CC"; then
- ac_cv_prog_CC="$CC" # Let the user override the test.
-else
- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
- ac_prog_rejected=no
- ac_dummy="$PATH"
- for ac_dir in $ac_dummy; do
- test -z "$ac_dir" && ac_dir=.
- if test -f $ac_dir/$ac_word; then
- if test "$ac_dir/$ac_word" = "/usr/ucb/cc"; then
- ac_prog_rejected=yes
- continue
- fi
- ac_cv_prog_CC="cc"
- break
- fi
- done
- IFS="$ac_save_ifs"
-if test $ac_prog_rejected = yes; then
- # We found a bogon in the path, so make sure we never use it.
- set dummy $ac_cv_prog_CC
- shift
- if test $# -gt 0; then
- # We chose a different compiler from the bogus one.
- # However, it has the same basename, so the bogon will be chosen
- # first if we set CC to just the basename; use the full file name.
- shift
- set dummy "$ac_dir/$ac_word" "$@"
- shift
- ac_cv_prog_CC="$@"
- fi
-fi
-fi
-fi
-CC="$ac_cv_prog_CC"
-if test -n "$CC"; then
- echo "$ac_t""$CC" 1>&6
-else
- echo "$ac_t""no" 1>&6
-fi
-
- if test -z "$CC"; then
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- *win32* | *WIN32*)
- # Extract the first word of "cl", so it can be a program name with args.
-set dummy cl; ac_word=$2
-echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:1882: checking for $ac_word" >&5
-if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- if test -n "$CC"; then
- ac_cv_prog_CC="$CC" # Let the user override the test.
-else
- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
- ac_dummy="$PATH"
- for ac_dir in $ac_dummy; do
- test -z "$ac_dir" && ac_dir=.
- if test -f $ac_dir/$ac_word; then
- ac_cv_prog_CC="cl"
- break
- fi
- done
- IFS="$ac_save_ifs"
-fi
-fi
-CC="$ac_cv_prog_CC"
-if test -n "$CC"; then
- echo "$ac_t""$CC" 1>&6
-else
- echo "$ac_t""no" 1>&6
-fi
- ;;
- esac
- fi
- test -z "$CC" && { echo "configure: error: no acceptable cc found in \$PATH" 1>&2; exit 1; }
-fi
-
-echo $ac_n "checking whether the C compiler ($CC $CFLAGS $LDFLAGS) works""... $ac_c" 1>&6
-echo "configure:1914: checking whether the C compiler ($CC $CFLAGS $LDFLAGS) works" >&5
-
-ac_ext=c
-# CFLAGS is not in ac_cpp because -g, -O, etc. are not valid cpp options.
-ac_cpp='$CPP $CPPFLAGS'
-ac_compile='${CC-cc} -c $CFLAGS $CPPFLAGS conftest.$ac_ext 1>&5'
-ac_link='${CC-cc} -o conftest${ac_exeext} $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS 1>&5'
-cross_compiling=$ac_cv_prog_cc_cross
-
-cat > conftest.$ac_ext << EOF
-
-#line 1925 "configure"
-#include "confdefs.h"
-
-main(){return(0);}
-EOF
-if { (eval echo configure:1930: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- ac_cv_prog_cc_works=yes
- # If we can't run a trivial program, we are probably using a cross compiler.
- if (./conftest; exit) 2>/dev/null; then
- ac_cv_prog_cc_cross=no
- else
- ac_cv_prog_cc_cross=yes
- fi
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- ac_cv_prog_cc_works=no
-fi
-rm -fr conftest*
-ac_ext=c
-# CFLAGS is not in ac_cpp because -g, -O, etc. are not valid cpp options.
-ac_cpp='$CPP $CPPFLAGS'
-ac_compile='${CC-cc} -c $CFLAGS $CPPFLAGS conftest.$ac_ext 1>&5'
-ac_link='${CC-cc} -o conftest${ac_exeext} $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS 1>&5'
-cross_compiling=$ac_cv_prog_cc_cross
-
-echo "$ac_t""$ac_cv_prog_cc_works" 1>&6
-if test $ac_cv_prog_cc_works = no; then
- { echo "configure: error: installation or configuration problem: C compiler cannot create executables." 1>&2; exit 1; }
-fi
-echo $ac_n "checking whether the C compiler ($CC $CFLAGS $LDFLAGS) is a cross-compiler""... $ac_c" 1>&6
-echo "configure:1956: checking whether the C compiler ($CC $CFLAGS $LDFLAGS) is a cross-compiler" >&5
-echo "$ac_t""$ac_cv_prog_cc_cross" 1>&6
-cross_compiling=$ac_cv_prog_cc_cross
-
-echo $ac_n "checking whether we are using GNU C""... $ac_c" 1>&6
-echo "configure:1961: checking whether we are using GNU C" >&5
-if eval "test \"`echo '$''{'ac_cv_prog_gcc'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.c <<EOF
-#ifdef __GNUC__
- yes;
-#endif
-EOF
-if { ac_try='${CC-cc} -E conftest.c'; { (eval echo configure:1970: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }; } | egrep yes >/dev/null 2>&1; then
- ac_cv_prog_gcc=yes
-else
- ac_cv_prog_gcc=no
-fi
-fi
-
-echo "$ac_t""$ac_cv_prog_gcc" 1>&6
-
-if test $ac_cv_prog_gcc = yes; then
- GCC=yes
-else
- GCC=
-fi
-
-ac_test_CFLAGS="${CFLAGS+set}"
-ac_save_CFLAGS="$CFLAGS"
-CFLAGS=
-echo $ac_n "checking whether ${CC-cc} accepts -g""... $ac_c" 1>&6
-echo "configure:1989: checking whether ${CC-cc} accepts -g" >&5
-if eval "test \"`echo '$''{'ac_cv_prog_cc_g'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- echo 'void f(){}' > conftest.c
-if test -z "`${CC-cc} -g -c conftest.c 2>&1`"; then
- ac_cv_prog_cc_g=yes
-else
- ac_cv_prog_cc_g=no
-fi
-rm -f conftest*
-
-fi
-
-echo "$ac_t""$ac_cv_prog_cc_g" 1>&6
-if test "$ac_test_CFLAGS" = set; then
- CFLAGS="$ac_save_CFLAGS"
-elif test $ac_cv_prog_cc_g = yes; then
- if test "$GCC" = yes; then
- CFLAGS="-g -O2"
- else
- CFLAGS="-g"
- fi
-else
- if test "$GCC" = yes; then
- CFLAGS="-O2"
- else
- CFLAGS=
- fi
-fi
-
-# Find a good install program. We prefer a C program (faster),
-# so one script is as good as another. But avoid the broken or
-# incompatible versions:
-# SysV /etc/install, /usr/sbin/install
-# SunOS /usr/etc/install
-# IRIX /sbin/install
-# AIX /bin/install
-# AIX 4 /usr/bin/installbsd, which doesn't work without a -g flag
-# AFS /usr/afsws/bin/install, which mishandles nonexistent args
-# SVR4 /usr/ucb/install, which tries to use the nonexistent group "staff"
-# ./install, which can be erroneously created by make from ./install.sh.
-echo $ac_n "checking for a BSD compatible install""... $ac_c" 1>&6
-echo "configure:2032: checking for a BSD compatible install" >&5
-if test -z "$INSTALL"; then
-if eval "test \"`echo '$''{'ac_cv_path_install'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- IFS="${IFS= }"; ac_save_IFS="$IFS"; IFS=":"
- for ac_dir in $PATH; do
- # Account for people who put trailing slashes in PATH elements.
- case "$ac_dir/" in
- /|./|.//|/etc/*|/usr/sbin/*|/usr/etc/*|/sbin/*|/usr/afsws/bin/*|/usr/ucb/*) ;;
- *)
- # OSF1 and SCO ODT 3.0 have their own names for install.
- # Don't use installbsd from OSF since it installs stuff as root
- # by default.
- for ac_prog in ginstall scoinst install; do
- if test -f $ac_dir/$ac_prog; then
- if test $ac_prog = install &&
- grep dspmsg $ac_dir/$ac_prog >/dev/null 2>&1; then
- # AIX install. It has an incompatible calling convention.
- :
- else
- ac_cv_path_install="$ac_dir/$ac_prog -c"
- break 2
- fi
- fi
- done
- ;;
- esac
- done
- IFS="$ac_save_IFS"
-
-fi
- if test "${ac_cv_path_install+set}" = set; then
- INSTALL="$ac_cv_path_install"
- else
- # As a last resort, use the slow shell script. We don't cache a
- # path for INSTALL within a source directory, because that will
- # break other packages using the cache if that directory is
- # removed, or if the path is relative.
- INSTALL="$ac_install_sh"
- fi
-fi
-echo "$ac_t""$INSTALL" 1>&6
-
-# Use test -z because SunOS4 sh mishandles braces in ${var-val}.
-# It thinks the first close brace ends the variable substitution.
-test -z "$INSTALL_PROGRAM" && INSTALL_PROGRAM='${INSTALL}'
-
-test -z "$INSTALL_SCRIPT" && INSTALL_SCRIPT='${INSTALL_PROGRAM}'
-
-test -z "$INSTALL_DATA" && INSTALL_DATA='${INSTALL} -m 644'
-
-
-# Put a plausible default for CC_FOR_BUILD in Makefile.
-if test "x$cross_compiling" = "xno"; then
- CC_FOR_BUILD='$(CC)'
-else
- CC_FOR_BUILD=gcc
-fi
-
-
-
-
-AR=${AR-ar}
-
-# Extract the first word of "ranlib", so it can be a program name with args.
-set dummy ranlib; ac_word=$2
-echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:2100: checking for $ac_word" >&5
-if eval "test \"`echo '$''{'ac_cv_prog_RANLIB'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- if test -n "$RANLIB"; then
- ac_cv_prog_RANLIB="$RANLIB" # Let the user override the test.
-else
- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
- ac_dummy="$PATH"
- for ac_dir in $ac_dummy; do
- test -z "$ac_dir" && ac_dir=.
- if test -f $ac_dir/$ac_word; then
- ac_cv_prog_RANLIB="ranlib"
- break
- fi
- done
- IFS="$ac_save_ifs"
- test -z "$ac_cv_prog_RANLIB" && ac_cv_prog_RANLIB=":"
-fi
-fi
-RANLIB="$ac_cv_prog_RANLIB"
-if test -n "$RANLIB"; then
- echo "$ac_t""$RANLIB" 1>&6
-else
- echo "$ac_t""no" 1>&6
-fi
-
-
-ALL_LINGUAS=
-
- for ac_hdr in argz.h limits.h locale.h nl_types.h malloc.h string.h \
-unistd.h values.h sys/param.h
-do
-ac_safe=`echo "$ac_hdr" | sed 'y%./+-%__p_%'`
-echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6
-echo "configure:2135: checking for $ac_hdr" >&5
-if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 2140 "configure"
-#include "confdefs.h"
-#include <$ac_hdr>
-EOF
-ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:2145: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
-ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
-if test -z "$ac_err"; then
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=yes"
-else
- echo "$ac_err" >&5
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=no"
-fi
-rm -f conftest*
-fi
-if eval "test \"`echo '$ac_cv_header_'$ac_safe`\" = yes"; then
- echo "$ac_t""yes" 1>&6
- ac_tr_hdr=HAVE_`echo $ac_hdr | sed 'y%abcdefghijklmnopqrstuvwxyz./-%ABCDEFGHIJKLMNOPQRSTUVWXYZ___%'`
- cat >> confdefs.h <<EOF
-#define $ac_tr_hdr 1
-EOF
-
-else
- echo "$ac_t""no" 1>&6
-fi
-done
-
- for ac_func in getcwd munmap putenv setenv setlocale strchr strcasecmp \
-__argz_count __argz_stringify __argz_next
-do
-echo $ac_n "checking for $ac_func""... $ac_c" 1>&6
-echo "configure:2175: checking for $ac_func" >&5
-if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 2180 "configure"
-#include "confdefs.h"
-/* System header to define __stub macros and hopefully few prototypes,
- which can conflict with char $ac_func(); below. */
-#include <assert.h>
-/* Override any gcc2 internal prototype to avoid an error. */
-/* We use char because int might match the return type of a gcc2
- builtin and then its argument prototype would still apply. */
-char $ac_func();
-
-int main() {
-
-/* The GNU C library defines this for functions which it implements
- to always fail with ENOSYS. Some functions are actually named
- something starting with __ and the normal name is an alias. */
-#if defined (__stub_$ac_func) || defined (__stub___$ac_func)
-choke me
-#else
-$ac_func();
-#endif
-
-; return 0; }
-EOF
-if { (eval echo configure:2203: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=yes"
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=no"
-fi
-rm -f conftest*
-fi
-
-if eval "test \"`echo '$ac_cv_func_'$ac_func`\" = yes"; then
- echo "$ac_t""yes" 1>&6
- ac_tr_func=HAVE_`echo $ac_func | tr 'abcdefghijklmnopqrstuvwxyz' 'ABCDEFGHIJKLMNOPQRSTUVWXYZ'`
- cat >> confdefs.h <<EOF
-#define $ac_tr_func 1
-EOF
-
-else
- echo "$ac_t""no" 1>&6
-fi
-done
-
-
- if test "${ac_cv_func_stpcpy+set}" != "set"; then
- for ac_func in stpcpy
-do
-echo $ac_n "checking for $ac_func""... $ac_c" 1>&6
-echo "configure:2232: checking for $ac_func" >&5
-if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 2237 "configure"
-#include "confdefs.h"
-/* System header to define __stub macros and hopefully few prototypes,
- which can conflict with char $ac_func(); below. */
-#include <assert.h>
-/* Override any gcc2 internal prototype to avoid an error. */
-/* We use char because int might match the return type of a gcc2
- builtin and then its argument prototype would still apply. */
-char $ac_func();
-
-int main() {
-
-/* The GNU C library defines this for functions which it implements
- to always fail with ENOSYS. Some functions are actually named
- something starting with __ and the normal name is an alias. */
-#if defined (__stub_$ac_func) || defined (__stub___$ac_func)
-choke me
-#else
-$ac_func();
-#endif
-
-; return 0; }
-EOF
-if { (eval echo configure:2260: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=yes"
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=no"
-fi
-rm -f conftest*
-fi
-
-if eval "test \"`echo '$ac_cv_func_'$ac_func`\" = yes"; then
- echo "$ac_t""yes" 1>&6
- ac_tr_func=HAVE_`echo $ac_func | tr 'abcdefghijklmnopqrstuvwxyz' 'ABCDEFGHIJKLMNOPQRSTUVWXYZ'`
- cat >> confdefs.h <<EOF
-#define $ac_tr_func 1
-EOF
-
-else
- echo "$ac_t""no" 1>&6
-fi
-done
-
- fi
- if test "${ac_cv_func_stpcpy}" = "yes"; then
- cat >> confdefs.h <<\EOF
-#define HAVE_STPCPY 1
-EOF
-
- fi
-
- if test $ac_cv_header_locale_h = yes; then
- echo $ac_n "checking for LC_MESSAGES""... $ac_c" 1>&6
-echo "configure:2294: checking for LC_MESSAGES" >&5
-if eval "test \"`echo '$''{'am_cv_val_LC_MESSAGES'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 2299 "configure"
-#include "confdefs.h"
-#include <locale.h>
-int main() {
-return LC_MESSAGES
-; return 0; }
-EOF
-if { (eval echo configure:2306: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- rm -rf conftest*
- am_cv_val_LC_MESSAGES=yes
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- am_cv_val_LC_MESSAGES=no
-fi
-rm -f conftest*
-fi
-
-echo "$ac_t""$am_cv_val_LC_MESSAGES" 1>&6
- if test $am_cv_val_LC_MESSAGES = yes; then
- cat >> confdefs.h <<\EOF
-#define HAVE_LC_MESSAGES 1
-EOF
-
- fi
- fi
- echo $ac_n "checking whether NLS is requested""... $ac_c" 1>&6
-echo "configure:2327: checking whether NLS is requested" >&5
- # Check whether --enable-nls or --disable-nls was given.
-if test "${enable_nls+set}" = set; then
- enableval="$enable_nls"
- USE_NLS=$enableval
-else
- USE_NLS=yes
-fi
-
- echo "$ac_t""$USE_NLS" 1>&6
-
-
- USE_INCLUDED_LIBINTL=no
-
- if test "$USE_NLS" = "yes"; then
- cat >> confdefs.h <<\EOF
-#define ENABLE_NLS 1
-EOF
-
- echo $ac_n "checking whether included gettext is requested""... $ac_c" 1>&6
-echo "configure:2347: checking whether included gettext is requested" >&5
- # Check whether --with-included-gettext or --without-included-gettext was given.
-if test "${with_included_gettext+set}" = set; then
- withval="$with_included_gettext"
- nls_cv_force_use_gnu_gettext=$withval
-else
- nls_cv_force_use_gnu_gettext=no
-fi
-
- echo "$ac_t""$nls_cv_force_use_gnu_gettext" 1>&6
-
- nls_cv_use_gnu_gettext="$nls_cv_force_use_gnu_gettext"
- if test "$nls_cv_force_use_gnu_gettext" != "yes"; then
- nls_cv_header_intl=
- nls_cv_header_libgt=
- CATOBJEXT=NONE
-
- ac_safe=`echo "libintl.h" | sed 'y%./+-%__p_%'`
-echo $ac_n "checking for libintl.h""... $ac_c" 1>&6
-echo "configure:2366: checking for libintl.h" >&5
-if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 2371 "configure"
-#include "confdefs.h"
-#include <libintl.h>
-EOF
-ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:2376: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
-ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
-if test -z "$ac_err"; then
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=yes"
-else
- echo "$ac_err" >&5
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=no"
-fi
-rm -f conftest*
-fi
-if eval "test \"`echo '$ac_cv_header_'$ac_safe`\" = yes"; then
- echo "$ac_t""yes" 1>&6
- echo $ac_n "checking for gettext in libc""... $ac_c" 1>&6
-echo "configure:2393: checking for gettext in libc" >&5
-if eval "test \"`echo '$''{'gt_cv_func_gettext_libc'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 2398 "configure"
-#include "confdefs.h"
-#include <libintl.h>
-int main() {
-return (int) gettext ("")
-; return 0; }
-EOF
-if { (eval echo configure:2405: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
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-
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-
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-if { (eval echo configure:2440: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
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-
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-fi
-
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-
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-
- # Extract the first word of "msgfmt", so it can be a program name with args.
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-if { (eval echo configure:2558: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
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- echo "configure: failed program was:" >&5
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-
- # Extract the first word of "gmsgfmt", so it can be a program name with args.
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-echo "configure:2585: checking for $ac_word" >&5
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- echo $ac_n "(cached) $ac_c" 1>&6
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- ?:/*)
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- ;;
- *)
- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
- ac_dummy="$PATH"
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- IFS="$ac_save_ifs"
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-else
- echo "$ac_t""no" 1>&6
-fi
-
- # Extract the first word of "xgettext", so it can be a program name with args.
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-echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:2621: checking for $ac_word" >&5
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- case "$XGETTEXT" in
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- ac_cv_path_XGETTEXT="$XGETTEXT" # Let the user override the test with a path.
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- *)
- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS="${IFS}:"
- for ac_dir in $PATH; do
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- IFS="$ac_save_ifs"
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-XGETTEXT="$ac_cv_path_XGETTEXT"
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-else
- echo "$ac_t""no" 1>&6
-fi
-
- cat > conftest.$ac_ext <<EOF
-#line 2653 "configure"
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-
-int main() {
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- return _nl_msg_cat_cntr
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-if { (eval echo configure:2661: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
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- CATOBJEXT=.gmo
- DATADIRNAME=share
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- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- CATOBJEXT=.mo
- DATADIRNAME=lib
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- fi
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-
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- echo "$ac_t""no" 1>&6
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-
-
-
- if test "$CATOBJEXT" = "NONE"; then
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-
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- # Extract the first word of "msgfmt", so it can be a program name with args.
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-echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:2693: checking for $ac_word" >&5
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-else
- case "$MSGFMT" in
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- ac_cv_path_MSGFMT="$MSGFMT" # Let the user override the test with a path.
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- *)
- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS="${IFS}:"
- for ac_dir in $PATH; do
- test -z "$ac_dir" && ac_dir=.
- if test -f $ac_dir/$ac_word; then
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- ac_cv_path_MSGFMT="$ac_dir/$ac_word"
- break
- fi
- fi
- done
- IFS="$ac_save_ifs"
- test -z "$ac_cv_path_MSGFMT" && ac_cv_path_MSGFMT="msgfmt"
- ;;
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-MSGFMT="$ac_cv_path_MSGFMT"
-if test -n "$MSGFMT"; then
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-else
- echo "$ac_t""no" 1>&6
-fi
-
- # Extract the first word of "gmsgfmt", so it can be a program name with args.
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-echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:2727: checking for $ac_word" >&5
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-else
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- ac_cv_path_GMSGFMT="$GMSGFMT" # Let the user override the test with a path.
- ;;
- ?:/*)
- ac_cv_path_GMSGFMT="$GMSGFMT" # Let the user override the test with a dos path.
- ;;
- *)
- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
- ac_dummy="$PATH"
- for ac_dir in $ac_dummy; do
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- IFS="$ac_save_ifs"
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- echo "$ac_t""no" 1>&6
-fi
-
- # Extract the first word of "xgettext", so it can be a program name with args.
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-echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:2763: checking for $ac_word" >&5
-if eval "test \"`echo '$''{'ac_cv_path_XGETTEXT'+set}'`\" = set"; then
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-else
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- *)
- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS="${IFS}:"
- for ac_dir in $PATH; do
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- IFS="$ac_save_ifs"
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-else
- echo "$ac_t""no" 1>&6
-fi
-
-
- USE_INCLUDED_LIBINTL=yes
- CATOBJEXT=.gmo
- INSTOBJEXT=.mo
- DATADIRNAME=share
- INTLDEPS='$(top_builddir)/../intl/libintl.a'
- INTLLIBS=$INTLDEPS
- LIBS=`echo $LIBS | sed -e 's/-lintl//'`
- nls_cv_header_intl=libintl.h
- nls_cv_header_libgt=libgettext.h
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-
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- : ;
- else
- echo "$ac_t""found xgettext programs is not GNU xgettext; ignore it" 1>&6
- XGETTEXT=":"
- fi
- fi
-
- # We need to process the po/ directory.
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- else
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- nls_cv_header_intl=libintl.h
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-
- # If this is used in GNU gettext we have to set USE_NLS to `yes'
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-
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- POFILES="$POFILES $lang.po"
- done
-
-
-
-
-
-
-
-
-
-
-
-
-
-
- if test "x$CATOBJEXT" != "x"; then
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- LINGUAS=
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- echo $ac_n "checking for catalogs to be installed""... $ac_c" 1>&6
-echo "configure:2853: checking for catalogs to be installed" >&5
- NEW_LINGUAS=
- for lang in ${LINGUAS=$ALL_LINGUAS}; do
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- esac
- done
- LINGUAS=$NEW_LINGUAS
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- fi
-
- if test -n "$LINGUAS"; then
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- fi
- fi
-
- if test $ac_cv_header_locale_h = yes; then
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- else
- INCLUDE_LOCALE_H="\
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- fi
-
-
- if test -f $srcdir/po2tbl.sed.in; then
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-echo $ac_n "checking for linux/version.h""... $ac_c" 1>&6
-echo "configure:2881: checking for linux/version.h" >&5
-if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then
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-else
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-#line 2886 "configure"
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-#include <linux/version.h>
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-{ (eval echo configure:2891: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
-ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
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- eval "ac_cv_header_$ac_safe=yes"
-else
- echo "$ac_err" >&5
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=no"
-fi
-rm -f conftest*
-fi
-if eval "test \"`echo '$ac_cv_header_'$ac_safe`\" = yes"; then
- echo "$ac_t""yes" 1>&6
- msgformat=linux
-else
- echo "$ac_t""no" 1>&6
-msgformat=xopen
-fi
-
-
- sed -e '/^#/d' $srcdir/$msgformat-msg.sed > po2msg.sed
- fi
- sed -e '/^#.*[^\\]$/d' -e '/^#$/d' \
- $srcdir/po2tbl.sed.in > po2tbl.sed
- fi
-
- if test "$PACKAGE" = "gettext"; then
- GT_NO="#NO#"
- GT_YES=
- else
- GT_NO=
- GT_YES="#YES#"
- fi
-
-
-
- MKINSTALLDIRS="\$(srcdir)/../../mkinstalldirs"
-
-
- l=
-
-
- if test -d $srcdir/po; then
- test -d po || mkdir po
- if test "x$srcdir" != "x."; then
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- else
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- fi
- else
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- fi
- rm -f po/POTFILES
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- < $srcdir/po/POTFILES.in > po/POTFILES
- fi
-
-
-# Check for common headers.
-# FIXME: Seems to me this can cause problems for i386-windows hosts.
-# At one point there were hardcoded AC_DEFINE's if ${host} = i386-*-windows*.
-for ac_hdr in stdlib.h string.h strings.h unistd.h time.h
-do
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-echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6
-echo "configure:2960: checking for $ac_hdr" >&5
-if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 2965 "configure"
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-#include <$ac_hdr>
-EOF
-ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:2970: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
-ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
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- eval "ac_cv_header_$ac_safe=yes"
-else
- echo "$ac_err" >&5
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=no"
-fi
-rm -f conftest*
-fi
-if eval "test \"`echo '$ac_cv_header_'$ac_safe`\" = yes"; then
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- ac_tr_hdr=HAVE_`echo $ac_hdr | sed 'y%abcdefghijklmnopqrstuvwxyz./-%ABCDEFGHIJKLMNOPQRSTUVWXYZ___%'`
- cat >> confdefs.h <<EOF
-#define $ac_tr_hdr 1
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-
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-fi
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-
-for ac_hdr in sys/time.h sys/resource.h
-do
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-echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6
-echo "configure:3000: checking for $ac_hdr" >&5
-if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 3005 "configure"
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-#include <$ac_hdr>
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-ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:3010: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
-ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
-if test -z "$ac_err"; then
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=yes"
-else
- echo "$ac_err" >&5
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=no"
-fi
-rm -f conftest*
-fi
-if eval "test \"`echo '$ac_cv_header_'$ac_safe`\" = yes"; then
- echo "$ac_t""yes" 1>&6
- ac_tr_hdr=HAVE_`echo $ac_hdr | sed 'y%abcdefghijklmnopqrstuvwxyz./-%ABCDEFGHIJKLMNOPQRSTUVWXYZ___%'`
- cat >> confdefs.h <<EOF
-#define $ac_tr_hdr 1
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-
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-fi
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-
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-do
-ac_safe=`echo "$ac_hdr" | sed 'y%./+-%__p_%'`
-echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6
-echo "configure:3040: checking for $ac_hdr" >&5
-if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then
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-{ (eval echo configure:3050: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
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- echo "$ac_err" >&5
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
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- ac_tr_hdr=HAVE_`echo $ac_hdr | sed 'y%abcdefghijklmnopqrstuvwxyz./-%ABCDEFGHIJKLMNOPQRSTUVWXYZ___%'`
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-
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-echo "configure:3080: checking for $ac_hdr" >&5
-if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
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- cat > conftest.$ac_ext <<EOF
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-ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:3090: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
-ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
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- eval "ac_cv_header_$ac_safe=yes"
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- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
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- eval "ac_cv_header_$ac_safe=no"
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-if eval "test \"`echo '$ac_cv_header_'$ac_safe`\" = yes"; then
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- ac_tr_hdr=HAVE_`echo $ac_hdr | sed 'y%abcdefghijklmnopqrstuvwxyz./-%ABCDEFGHIJKLMNOPQRSTUVWXYZ___%'`
- cat >> confdefs.h <<EOF
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- echo $ac_n "(cached) $ac_c" 1>&6
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- cat > conftest.$ac_ext <<EOF
-#line 3124 "configure"
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-/* We use char because int might match the return type of a gcc2
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-char $ac_func();
-
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-
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-choke me
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-$ac_func();
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-if { (eval echo configure:3147: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=yes"
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- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=no"
-fi
-rm -f conftest*
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-
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- ac_tr_func=HAVE_`echo $ac_func | tr 'abcdefghijklmnopqrstuvwxyz' 'ABCDEFGHIJKLMNOPQRSTUVWXYZ'`
- cat >> confdefs.h <<EOF
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- echo "$ac_t""no" 1>&6
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-
-
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-ac_lib_var=`echo socket'_'bind | sed 'y%./+-%__p_%'`
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- ac_save_LIBS="$LIBS"
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-#line 3182 "configure"
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-/* Override any gcc2 internal prototype to avoid an error. */
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-if { (eval echo configure:3193: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
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- eval "ac_cv_lib_$ac_lib_var=yes"
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- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
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- eval "ac_cv_lib_$ac_lib_var=no"
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-rm -f conftest*
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- echo "$ac_t""no" 1>&6
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-echo "configure:3221: checking for gethostbyname in -lnsl" >&5
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-#line 3229 "configure"
-#include "confdefs.h"
-/* Override any gcc2 internal prototype to avoid an error. */
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-; return 0; }
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-if { (eval echo configure:3240: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
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- eval "ac_cv_lib_$ac_lib_var=yes"
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- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
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- ac_tr_lib=HAVE_LIB`echo nsl | sed -e 's/[^a-zA-Z0-9_]/_/g' \
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-
-
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-
-
-
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- MAINT="#"
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-
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- sim_bswap=""
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-
-
-
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- sim_cflags=""
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-
-
-
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- case "${enableval}" in
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- *) sim_debug="-DDEBUG='(${enableval})' -DWITH_DEBUG='(${enableval})'";;
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- echo "Setting sim debug = $sim_debug" 6>&1
-fi
-else
- sim_debug=""
-fi
-
-
-
-# Check whether --enable-sim-stdio or --disable-sim-stdio was given.
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- *) { echo "configure: error: "Unknown value $enableval passed to --enable-sim-stdio"" 1>&2; exit 1; }; sim_stdio="";;
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-fi
-else
- sim_stdio=""
-fi
-
-
-
-# Check whether --enable-sim-trace or --disable-sim-trace was given.
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- [-0-9]*)
- sim_trace="-DTRACE='(${enableval})' -DWITH_TRACE='(${enableval})'";;
- [a-z]*)
- sim_trace=""
- for x in `echo "$enableval" | sed -e "s/,/ /g"`; do
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- else
- sim_trace="${sim_trace}|TRACE_$x"
- fi
- done
- sim_trace="$sim_trace)'" ;;
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-fi
-else
- sim_trace=""
-fi
-
-
-
-# Check whether --enable-sim-profile or --disable-sim-profile was given.
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- case "${enableval}" in
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- [-0-9]*)
- sim_profile="-DPROFILE='(${enableval})' -DWITH_PROFILE='(${enableval})'";;
- [a-z]*)
- sim_profile=""
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- sim_profile="-DPROFILE=1 -DWITH_PROFILE=-1"
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-
-
-
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-echo "configure:3416: checking return type of signal handlers" >&5
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- cat > conftest.$ac_ext <<EOF
-#line 3421 "configure"
-#include "confdefs.h"
-#include <sys/types.h>
-#include <signal.h>
-#ifdef signal
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-#endif
-#ifdef __cplusplus
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-void (*signal ()) ();
-#endif
-
-int main() {
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-if { (eval echo configure:3438: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
- rm -rf conftest*
- ac_cv_type_signal=void
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- ac_cv_type_signal=int
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-rm -f conftest*
-fi
-
-echo "$ac_t""$ac_cv_type_signal" 1>&6
-cat >> confdefs.h <<EOF
-#define RETSIGTYPE $ac_cv_type_signal
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-
-
-
-
-
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-echo "configure:3460: checking for executable suffix" >&5
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-else
- if test "$CYGWIN" = yes || test "$MINGW32" = yes; then
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- ac_cv_exeext=
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-
-
-sim_link_files=
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-
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- sim_link_files=tconfig.in
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- sim_link_files=../common/tconfig.in
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-
-# targ-vals.def points to the libc macro description file.
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-
-
-
-
-wire_endian="LITTLE_ENDIAN"
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- sim_endian="-DWITH_TARGET_BYTE_ORDER=0"
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- fi;;
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- else
- if test x"$wire_endian" != x; then
- sim_endian="-DWITH_DEFAULT_TARGET_BYTE_ORDER=${wire_endian}"
- else
- echo "No default endian for target $target" 1>&6
- sim_endian="-DWITH_DEFAULT_TARGET_BYTE_ORDER=0"
- fi
- fi;;
- *) { echo "configure: error: "Unknown value $enableval for --enable-sim-endian"" 1>&2; exit 1; }; sim_endian="";;
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- echo "Setting endian flags = $sim_endian" 6>&1
-fi
-else
- if test x"$default_endian" != x; then
- sim_endian="-DWITH_DEFAULT_TARGET_BYTE_ORDER=${default_endian}"
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- if test x"$wire_endian" != x; then
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- else
- sim_endian=
- fi
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-fi
-
-wire_alignment="NONSTRICT_ALIGNMENT"
-default_alignment=""
-
-# Check whether --enable-sim-alignment or --disable-sim-alignment was given.
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- case "${enableval}" in
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- yes) if test x"$wire_alignment" != x; then
- sim_alignment="-DWITH_ALIGNMENT=${wire_alignment}"
- else
- if test x"$default_alignment" != x; then
- sim_alignment="-DWITH_ALIGNMENT=${default_alignment}"
- else
- echo "No hard-wired alignment for target $target" 1>&6
- sim_alignment="-DWITH_ALIGNMENT=0"
- fi
- fi;;
- no) if test x"$default_alignment" != x; then
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- else
- if test x"$wire_alignment" != x; then
- sim_alignment="-DWITH_DEFAULT_ALIGNMENT=${wire_alignment}"
- else
- echo "No default alignment for target $target" 1>&6
- sim_alignment="-DWITH_DEFAULT_ALIGNMENT=0"
- fi
- fi;;
- *) { echo "configure: error: "Unknown value $enableval passed to --enable-sim-alignment"" 1>&2; exit 1; }; sim_alignment="";;
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- echo "Setting alignment flags = $sim_alignment" 6>&1
-fi
-else
- if test x"$default_alignment" != x; then
- sim_alignment="-DWITH_DEFAULT_ALIGNMENT=${default_alignment}"
-else
- if test x"$wire_alignment" != x; then
- sim_alignment="-DWITH_ALIGNMENT=${wire_alignment}"
- else
- sim_alignment=
- fi
-fi
-fi
-
-
-# Check whether --enable-sim-hostendian or --disable-sim-hostendian was given.
-if test "${enable_sim_hostendian+set}" = set; then
- enableval="$enable_sim_hostendian"
- case "${enableval}" in
- no) sim_hostendian="-DWITH_HOST_BYTE_ORDER=0";;
- b*|B*) sim_hostendian="-DWITH_HOST_BYTE_ORDER=BIG_ENDIAN";;
- l*|L*) sim_hostendian="-DWITH_HOST_BYTE_ORDER=LITTLE_ENDIAN";;
- *) { echo "configure: error: "Unknown value $enableval for --enable-sim-hostendian"" 1>&2; exit 1; }; sim_hostendian="";;
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-fi
-else
-
-if test "x$cross_compiling" = "xno"; then
- echo $ac_n "checking whether byte ordering is bigendian""... $ac_c" 1>&6
-echo "configure:3621: checking whether byte ordering is bigendian" >&5
-if eval "test \"`echo '$''{'ac_cv_c_bigendian'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- ac_cv_c_bigendian=unknown
-# See if sys/param.h defines the BYTE_ORDER macro.
-cat > conftest.$ac_ext <<EOF
-#line 3628 "configure"
-#include "confdefs.h"
-#include <sys/types.h>
-#include <sys/param.h>
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-
-#if !BYTE_ORDER || !BIG_ENDIAN || !LITTLE_ENDIAN
- bogus endian macros
-#endif
-; return 0; }
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-if { (eval echo configure:3639: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
- rm -rf conftest*
- # It does; now see whether it defined to BIG_ENDIAN or not.
-cat > conftest.$ac_ext <<EOF
-#line 3643 "configure"
-#include "confdefs.h"
-#include <sys/types.h>
-#include <sys/param.h>
-int main() {
-
-#if BYTE_ORDER != BIG_ENDIAN
- not big endian
-#endif
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-if { (eval echo configure:3654: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
- rm -rf conftest*
- ac_cv_c_bigendian=yes
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- ac_cv_c_bigendian=no
-fi
-rm -f conftest*
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
-fi
-rm -f conftest*
-if test $ac_cv_c_bigendian = unknown; then
-if test "$cross_compiling" = yes; then
- { echo "configure: error: can not run test program while cross compiling" 1>&2; exit 1; }
-else
- cat > conftest.$ac_ext <<EOF
-#line 3674 "configure"
-#include "confdefs.h"
-main () {
- /* Are we little or big endian? From Harbison&Steele. */
- union
- {
- long l;
- char c[sizeof (long)];
- } u;
- u.l = 1;
- exit (u.c[sizeof (long) - 1] == 1);
-}
-EOF
-if { (eval echo configure:3687: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null
-then
- ac_cv_c_bigendian=no
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -fr conftest*
- ac_cv_c_bigendian=yes
-fi
-rm -fr conftest*
-fi
-
-fi
-fi
-
-echo "$ac_t""$ac_cv_c_bigendian" 1>&6
-if test $ac_cv_c_bigendian = yes; then
- cat >> confdefs.h <<\EOF
-#define WORDS_BIGENDIAN 1
-EOF
-
-fi
-
- if test $ac_cv_c_bigendian = yes; then
- sim_hostendian="-DWITH_HOST_BYTE_ORDER=BIG_ENDIAN"
- else
- sim_hostendian="-DWITH_HOST_BYTE_ORDER=LITTLE_ENDIAN"
- fi
-else
- sim_hostendian="-DWITH_HOST_BYTE_ORDER=0"
-fi
-fi
-
-
-default_sim_scache="1024"
-# Check whether --enable-sim-scache or --disable-sim-scache was given.
-if test "${enable_sim_scache+set}" = set; then
- enableval="$enable_sim_scache"
- case "${enableval}" in
- yes) sim_scache="-DWITH_SCACHE=${default_sim_scache}";;
- no) sim_scache="-DWITH_SCACHE=0" ;;
- [0-9]*) sim_scache="-DWITH_SCACHE=${enableval}";;
- *) { echo "configure: error: "Bad value $enableval passed to --enable-sim-scache"" 1>&2; exit 1; };
- sim_scache="";;
-esac
-if test x"$silent" != x"yes" && test x"$sim_scache" != x""; then
- echo "Setting scache size = $sim_scache" 6>&1
-fi
-else
- sim_scache="-DWITH_SCACHE=${default_sim_scache}"
-fi
-
-
-
-default_sim_default_model="i960KA"
-# Check whether --enable-sim-default-model or --disable-sim-default-model was given.
-if test "${enable_sim_default_model+set}" = set; then
- enableval="$enable_sim_default_model"
- case "${enableval}" in
- yes|no) { echo "configure: error: "Missing argument to --enable-sim-default-model"" 1>&2; exit 1; };;
- *) sim_default_model="-DWITH_DEFAULT_MODEL='\"${enableval}\"'";;
-esac
-if test x"$silent" != x"yes" && test x"$sim_default_model" != x""; then
- echo "Setting default model = $sim_default_model" 6>&1
-fi
-else
- sim_default_model="-DWITH_DEFAULT_MODEL='\"${default_sim_default_model}\"'"
-fi
-
-
-
-# Check whether --enable-sim-environment or --disable-sim-environment was given.
-if test "${enable_sim_environment+set}" = set; then
- enableval="$enable_sim_environment"
- case "${enableval}" in
- all | ALL) sim_environment="-DWITH_ENVIRONMENT=ALL_ENVIRONMENT";;
- user | USER) sim_environment="-DWITH_ENVIRONMENT=USER_ENVIRONMENT";;
- virtual | VIRTUAL) sim_environment="-DWITH_ENVIRONMENT=VIRTUAL_ENVIRONMENT";;
- operating | OPERATING) sim_environment="-DWITH_ENVIRONMENT=OPERATING_ENVIRONMENT";;
- *) { echo "configure: error: "Unknown value $enableval passed to --enable-sim-environment"" 1>&2; exit 1; };
- sim_environment="";;
-esac
-if test x"$silent" != x"yes" && test x"$sim_environment" != x""; then
- echo "Setting sim environment = $sim_environment" 6>&1
-fi
-else
- sim_environment="-DWITH_ENVIRONMENT=ALL_ENVIRONMENT"
-fi
-
-
-cgen_maint=no
-cgen=guile
-cgendir='$(srcdir)/../../cgen'
-# Check whether --enable-cgen-maint or --disable-cgen-maint was given.
-if test "${enable_cgen_maint+set}" = set; then
- enableval="$enable_cgen_maint"
- case "${enableval}" in
- yes) cgen_maint=yes ;;
- no) cgen_maint=no ;;
- *)
- # argument is cgen install directory (not implemented yet).
- # Having a `share' directory might be more appropriate for the .scm,
- # .cpu, etc. files.
- cgendir=${cgen_maint}/lib/cgen
- cgen=guile
- ;;
-esac
-fi
-if test x${cgen_maint} != xno ; then
- CGEN_MAINT=''
-else
- CGEN_MAINT='#'
-fi
-
-
-
-
-
-
-
-trap '' 1 2 15
-cat > confcache <<\EOF
-# This file is a shell script that caches the results of configure
-# tests run on this system so they can be shared between configure
-# scripts and configure runs. It is not useful on other systems.
-# If it contains results you don't want to keep, you may remove or edit it.
-#
-# By default, configure uses ./config.cache as the cache file,
-# creating it if it does not exist already. You can give configure
-# the --cache-file=FILE option to use a different cache file; that is
-# what configure does when it calls configure scripts in
-# subdirectories, so they share the cache.
-# Giving --cache-file=/dev/null disables caching, for debugging configure.
-# config.status only pays attention to the cache file if you give it the
-# --recheck option to rerun configure.
-#
-EOF
-# The following way of writing the cache mishandles newlines in values,
-# but we know of no workaround that is simple, portable, and efficient.
-# So, don't put newlines in cache variables' values.
-# Ultrix sh set writes to stderr and can't be redirected directly,
-# and sets the high bit in the cache file unless we assign to the vars.
-(set) 2>&1 |
- case `(ac_space=' '; set | grep ac_space) 2>&1` in
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- # `set' does not quote correctly, so add quotes (double-quote substitution
- # turns \\\\ into \\, and sed turns \\ into \).
- sed -n \
- -e "s/'/'\\\\''/g" \
- -e "s/^\\([a-zA-Z0-9_]*_cv_[a-zA-Z0-9_]*\\)=\\(.*\\)/\\1=\${\\1='\\2'}/p"
- ;;
- *)
- # `set' quotes correctly as required by POSIX, so do not add quotes.
- sed -n -e 's/^\([a-zA-Z0-9_]*_cv_[a-zA-Z0-9_]*\)=\(.*\)/\1=${\1=\2}/p'
- ;;
- esac >> confcache
-if cmp -s $cache_file confcache; then
- :
-else
- if test -w $cache_file; then
- echo "updating cache $cache_file"
- cat confcache > $cache_file
- else
- echo "not updating unwritable cache $cache_file"
- fi
-fi
-rm -f confcache
-
-trap 'rm -fr conftest* confdefs* core core.* *.core $ac_clean_files; exit 1' 1 2 15
-
-test "x$prefix" = xNONE && prefix=$ac_default_prefix
-# Let make expand exec_prefix.
-test "x$exec_prefix" = xNONE && exec_prefix='${prefix}'
-
-# Any assignment to VPATH causes Sun make to only execute
-# the first set of double-colon rules, so remove it if not needed.
-# If there is a colon in the path, we need to keep it.
-if test "x$srcdir" = x.; then
- ac_vpsub='/^[ ]*VPATH[ ]*=[^:]*$/d'
-fi
-
-trap 'rm -f $CONFIG_STATUS conftest*; exit 1' 1 2 15
-
-DEFS=-DHAVE_CONFIG_H
-
-# Without the "./", some shells look in PATH for config.status.
-: ${CONFIG_STATUS=./config.status}
-
-echo creating $CONFIG_STATUS
-rm -f $CONFIG_STATUS
-cat > $CONFIG_STATUS <<EOF
-#! /bin/sh
-# Generated automatically by configure.
-# Run this file to recreate the current configuration.
-# This directory was configured as follows,
-# on host `(hostname || uname -n) 2>/dev/null | sed 1q`:
-#
-# $0 $ac_configure_args
-#
-# Compiler output produced by configure, useful for debugging
-# configure, is in ./config.log if it exists.
-
-ac_cs_usage="Usage: $CONFIG_STATUS [--recheck] [--version] [--help]"
-for ac_option
-do
- case "\$ac_option" in
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- echo "running \${CONFIG_SHELL-/bin/sh} $0 $ac_configure_args --no-create --no-recursion"
- exec \${CONFIG_SHELL-/bin/sh} $0 $ac_configure_args --no-create --no-recursion ;;
- -version | --version | --versio | --versi | --vers | --ver | --ve | --v)
- echo "$CONFIG_STATUS generated by autoconf version 2.13"
- exit 0 ;;
- -help | --help | --hel | --he | --h)
- echo "\$ac_cs_usage"; exit 0 ;;
- *) echo "\$ac_cs_usage"; exit 1 ;;
- esac
-done
-
-ac_given_srcdir=$srcdir
-ac_given_INSTALL="$INSTALL"
-
-trap 'rm -fr `echo "Makefile.sim:Makefile.in Make-common.sim:../common/Make-common.in .gdbinit:../common/gdbinit.in config.h:config.in" | sed "s/:[^ ]*//g"` conftest*; exit 1' 1 2 15
-EOF
-cat >> $CONFIG_STATUS <<EOF
-
-# Protect against being on the right side of a sed subst in config.status.
-sed 's/%@/@@/; s/@%/@@/; s/%g\$/@g/; /@g\$/s/[\\\\&%]/\\\\&/g;
- s/@@/%@/; s/@@/@%/; s/@g\$/%g/' > conftest.subs <<\\CEOF
-$ac_vpsub
-$extrasub
-s%@sim_environment@%$sim_environment%g
-s%@sim_alignment@%$sim_alignment%g
-s%@sim_assert@%$sim_assert%g
-s%@sim_bitsize@%$sim_bitsize%g
-s%@sim_endian@%$sim_endian%g
-s%@sim_hostendian@%$sim_hostendian%g
-s%@sim_float@%$sim_float%g
-s%@sim_scache@%$sim_scache%g
-s%@sim_default_model@%$sim_default_model%g
-s%@sim_hw_cflags@%$sim_hw_cflags%g
-s%@sim_hw_objs@%$sim_hw_objs%g
-s%@sim_hw@%$sim_hw%g
-s%@sim_inline@%$sim_inline%g
-s%@sim_packages@%$sim_packages%g
-s%@sim_regparm@%$sim_regparm%g
-s%@sim_reserved_bits@%$sim_reserved_bits%g
-s%@sim_smp@%$sim_smp%g
-s%@sim_stdcall@%$sim_stdcall%g
-s%@sim_xor_endian@%$sim_xor_endian%g
-s%@WARN_CFLAGS@%$WARN_CFLAGS%g
-s%@WERROR_CFLAGS@%$WERROR_CFLAGS%g
-s%@SHELL@%$SHELL%g
-s%@CFLAGS@%$CFLAGS%g
-s%@CPPFLAGS@%$CPPFLAGS%g
-s%@CXXFLAGS@%$CXXFLAGS%g
-s%@FFLAGS@%$FFLAGS%g
-s%@DEFS@%$DEFS%g
-s%@LDFLAGS@%$LDFLAGS%g
-s%@LIBS@%$LIBS%g
-s%@exec_prefix@%$exec_prefix%g
-s%@prefix@%$prefix%g
-s%@program_transform_name@%$program_transform_name%g
-s%@bindir@%$bindir%g
-s%@sbindir@%$sbindir%g
-s%@libexecdir@%$libexecdir%g
-s%@datadir@%$datadir%g
-s%@sysconfdir@%$sysconfdir%g
-s%@sharedstatedir@%$sharedstatedir%g
-s%@localstatedir@%$localstatedir%g
-s%@libdir@%$libdir%g
-s%@includedir@%$includedir%g
-s%@oldincludedir@%$oldincludedir%g
-s%@infodir@%$infodir%g
-s%@mandir@%$mandir%g
-s%@host@%$host%g
-s%@host_alias@%$host_alias%g
-s%@host_cpu@%$host_cpu%g
-s%@host_vendor@%$host_vendor%g
-s%@host_os@%$host_os%g
-s%@target@%$target%g
-s%@target_alias@%$target_alias%g
-s%@target_cpu@%$target_cpu%g
-s%@target_vendor@%$target_vendor%g
-s%@target_os@%$target_os%g
-s%@build@%$build%g
-s%@build_alias@%$build_alias%g
-s%@build_cpu@%$build_cpu%g
-s%@build_vendor@%$build_vendor%g
-s%@build_os@%$build_os%g
-s%@CC@%$CC%g
-s%@INSTALL_PROGRAM@%$INSTALL_PROGRAM%g
-s%@INSTALL_SCRIPT@%$INSTALL_SCRIPT%g
-s%@INSTALL_DATA@%$INSTALL_DATA%g
-s%@CC_FOR_BUILD@%$CC_FOR_BUILD%g
-s%@HDEFINES@%$HDEFINES%g
-s%@AR@%$AR%g
-s%@RANLIB@%$RANLIB%g
-s%@SET_MAKE@%$SET_MAKE%g
-s%@CPP@%$CPP%g
-s%@ALLOCA@%$ALLOCA%g
-s%@USE_NLS@%$USE_NLS%g
-s%@MSGFMT@%$MSGFMT%g
-s%@GMSGFMT@%$GMSGFMT%g
-s%@XGETTEXT@%$XGETTEXT%g
-s%@USE_INCLUDED_LIBINTL@%$USE_INCLUDED_LIBINTL%g
-s%@CATALOGS@%$CATALOGS%g
-s%@CATOBJEXT@%$CATOBJEXT%g
-s%@DATADIRNAME@%$DATADIRNAME%g
-s%@GMOFILES@%$GMOFILES%g
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-s%@INTLDEPS@%$INTLDEPS%g
-s%@INTLLIBS@%$INTLLIBS%g
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-s%@POFILES@%$POFILES%g
-s%@POSUB@%$POSUB%g
-s%@INCLUDE_LOCALE_H@%$INCLUDE_LOCALE_H%g
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-s%@MKINSTALLDIRS@%$MKINSTALLDIRS%g
-s%@l@%$l%g
-s%@MAINT@%$MAINT%g
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-s%@sim_cflags@%$sim_cflags%g
-s%@sim_debug@%$sim_debug%g
-s%@sim_stdio@%$sim_stdio%g
-s%@sim_trace@%$sim_trace%g
-s%@sim_profile@%$sim_profile%g
-s%@EXEEXT@%$EXEEXT%g
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-s%@cgendir@%$cgendir%g
-s%@cgen@%$cgen%g
-
-CEOF
-EOF
-
-cat >> $CONFIG_STATUS <<\EOF
-
-# Split the substitutions into bite-sized pieces for seds with
-# small command number limits, like on Digital OSF/1 and HP-UX.
-ac_max_sed_cmds=90 # Maximum number of lines to put in a sed script.
-ac_file=1 # Number of current file.
-ac_beg=1 # First line for current file.
-ac_end=$ac_max_sed_cmds # Line after last line for current file.
-ac_more_lines=:
-ac_sed_cmds=""
-while $ac_more_lines; do
- if test $ac_beg -gt 1; then
- sed "1,${ac_beg}d; ${ac_end}q" conftest.subs > conftest.s$ac_file
- else
- sed "${ac_end}q" conftest.subs > conftest.s$ac_file
- fi
- if test ! -s conftest.s$ac_file; then
- ac_more_lines=false
- rm -f conftest.s$ac_file
- else
- if test -z "$ac_sed_cmds"; then
- ac_sed_cmds="sed -f conftest.s$ac_file"
- else
- ac_sed_cmds="$ac_sed_cmds | sed -f conftest.s$ac_file"
- fi
- ac_file=`expr $ac_file + 1`
- ac_beg=$ac_end
- ac_end=`expr $ac_end + $ac_max_sed_cmds`
- fi
-done
-if test -z "$ac_sed_cmds"; then
- ac_sed_cmds=cat
-fi
-EOF
-
-cat >> $CONFIG_STATUS <<EOF
-
-CONFIG_FILES=\${CONFIG_FILES-"Makefile.sim:Makefile.in Make-common.sim:../common/Make-common.in .gdbinit:../common/gdbinit.in"}
-EOF
-cat >> $CONFIG_STATUS <<\EOF
-for ac_file in .. $CONFIG_FILES; do if test "x$ac_file" != x..; then
- # Support "outfile[:infile[:infile...]]", defaulting infile="outfile.in".
- case "$ac_file" in
- *:*) ac_file_in=`echo "$ac_file"|sed 's%[^:]*:%%'`
- ac_file=`echo "$ac_file"|sed 's%:.*%%'` ;;
- *) ac_file_in="${ac_file}.in" ;;
- esac
-
- # Adjust a relative srcdir, top_srcdir, and INSTALL for subdirectories.
-
- # Remove last slash and all that follows it. Not all systems have dirname.
- ac_dir=`echo $ac_file|sed 's%/[^/][^/]*$%%'`
- if test "$ac_dir" != "$ac_file" && test "$ac_dir" != .; then
- # The file is in a subdirectory.
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- ac_dir_suffix="/`echo $ac_dir|sed 's%^\./%%'`"
- # A "../" for each directory in $ac_dir_suffix.
- ac_dots=`echo $ac_dir_suffix|sed 's%/[^/]*%../%g'`
- else
- ac_dir_suffix= ac_dots=
- fi
-
- case "$ac_given_srcdir" in
- .) srcdir=.
- if test -z "$ac_dots"; then top_srcdir=.
- else top_srcdir=`echo $ac_dots|sed 's%/$%%'`; fi ;;
- /*) srcdir="$ac_given_srcdir$ac_dir_suffix"; top_srcdir="$ac_given_srcdir" ;;
- *) # Relative path.
- srcdir="$ac_dots$ac_given_srcdir$ac_dir_suffix"
- top_srcdir="$ac_dots$ac_given_srcdir" ;;
- esac
-
- case "$ac_given_INSTALL" in
- [/$]*) INSTALL="$ac_given_INSTALL" ;;
- *) INSTALL="$ac_dots$ac_given_INSTALL" ;;
- esac
-
- echo creating "$ac_file"
- rm -f "$ac_file"
- configure_input="Generated automatically from `echo $ac_file_in|sed 's%.*/%%'` by configure."
- case "$ac_file" in
- *Makefile*) ac_comsub="1i\\
-# $configure_input" ;;
- *) ac_comsub= ;;
- esac
-
- ac_file_inputs=`echo $ac_file_in|sed -e "s%^%$ac_given_srcdir/%" -e "s%:% $ac_given_srcdir/%g"`
- sed -e "$ac_comsub
-s%@configure_input@%$configure_input%g
-s%@srcdir@%$srcdir%g
-s%@top_srcdir@%$top_srcdir%g
-s%@INSTALL@%$INSTALL%g
-" $ac_file_inputs | (eval "$ac_sed_cmds") > $ac_file
-fi; done
-rm -f conftest.s*
-
-# These sed commands are passed to sed as "A NAME B NAME C VALUE D", where
-# NAME is the cpp macro being defined and VALUE is the value it is being given.
-#
-# ac_d sets the value in "#define NAME VALUE" lines.
-ac_dA='s%^\([ ]*\)#\([ ]*define[ ][ ]*\)'
-ac_dB='\([ ][ ]*\)[^ ]*%\1#\2'
-ac_dC='\3'
-ac_dD='%g'
-# ac_u turns "#undef NAME" with trailing blanks into "#define NAME VALUE".
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-ac_uB='\([ ]\)%\1#\2define\3'
-ac_uC=' '
-ac_uD='\4%g'
-# ac_e turns "#undef NAME" without trailing blanks into "#define NAME VALUE".
-ac_eA='s%^\([ ]*\)#\([ ]*\)undef\([ ][ ]*\)'
-ac_eB='$%\1#\2define\3'
-ac_eC=' '
-ac_eD='%g'
-
-if test "${CONFIG_HEADERS+set}" != set; then
-EOF
-cat >> $CONFIG_STATUS <<EOF
- CONFIG_HEADERS="config.h:config.in"
-EOF
-cat >> $CONFIG_STATUS <<\EOF
-fi
-for ac_file in .. $CONFIG_HEADERS; do if test "x$ac_file" != x..; then
- # Support "outfile[:infile[:infile...]]", defaulting infile="outfile.in".
- case "$ac_file" in
- *:*) ac_file_in=`echo "$ac_file"|sed 's%[^:]*:%%'`
- ac_file=`echo "$ac_file"|sed 's%:.*%%'` ;;
- *) ac_file_in="${ac_file}.in" ;;
- esac
-
- echo creating $ac_file
-
- rm -f conftest.frag conftest.in conftest.out
- ac_file_inputs=`echo $ac_file_in|sed -e "s%^%$ac_given_srcdir/%" -e "s%:% $ac_given_srcdir/%g"`
- cat $ac_file_inputs > conftest.in
-
-EOF
-
-# Transform confdefs.h into a sed script conftest.vals that substitutes
-# the proper values into config.h.in to produce config.h. And first:
-# Protect against being on the right side of a sed subst in config.status.
-# Protect against being in an unquoted here document in config.status.
-rm -f conftest.vals
-cat > conftest.hdr <<\EOF
-s/[\\&%]/\\&/g
-s%[\\$`]%\\&%g
-s%#define \([A-Za-z_][A-Za-z0-9_]*\) *\(.*\)%${ac_dA}\1${ac_dB}\1${ac_dC}\2${ac_dD}%gp
-s%ac_d%ac_u%gp
-s%ac_u%ac_e%gp
-EOF
-sed -n -f conftest.hdr confdefs.h > conftest.vals
-rm -f conftest.hdr
-
-# This sed command replaces #undef with comments. This is necessary, for
-# example, in the case of _POSIX_SOURCE, which is predefined and required
-# on some systems where configure will not decide to define it.
-cat >> conftest.vals <<\EOF
-s%^[ ]*#[ ]*undef[ ][ ]*[a-zA-Z_][a-zA-Z_0-9]*%/* & */%
-EOF
-
-# Break up conftest.vals because some shells have a limit on
-# the size of here documents, and old seds have small limits too.
-
-rm -f conftest.tail
-while :
-do
- ac_lines=`grep -c . conftest.vals`
- # grep -c gives empty output for an empty file on some AIX systems.
- if test -z "$ac_lines" || test "$ac_lines" -eq 0; then break; fi
- # Write a limited-size here document to conftest.frag.
- echo ' cat > conftest.frag <<CEOF' >> $CONFIG_STATUS
- sed ${ac_max_here_lines}q conftest.vals >> $CONFIG_STATUS
- echo 'CEOF
- sed -f conftest.frag conftest.in > conftest.out
- rm -f conftest.in
- mv conftest.out conftest.in
-' >> $CONFIG_STATUS
- sed 1,${ac_max_here_lines}d conftest.vals > conftest.tail
- rm -f conftest.vals
- mv conftest.tail conftest.vals
-done
-rm -f conftest.vals
-
-cat >> $CONFIG_STATUS <<\EOF
- rm -f conftest.frag conftest.h
- echo "/* $ac_file. Generated automatically by configure. */" > conftest.h
- cat conftest.in >> conftest.h
- rm -f conftest.in
- if cmp -s $ac_file conftest.h 2>/dev/null; then
- echo "$ac_file is unchanged"
- rm -f conftest.h
- else
- # Remove last slash and all that follows it. Not all systems have dirname.
- ac_dir=`echo $ac_file|sed 's%/[^/][^/]*$%%'`
- if test "$ac_dir" != "$ac_file" && test "$ac_dir" != .; then
- # The file is in a subdirectory.
- test ! -d "$ac_dir" && mkdir "$ac_dir"
- fi
- rm -f $ac_file
- mv conftest.h $ac_file
- fi
-fi; done
-
-EOF
-
-cat >> $CONFIG_STATUS <<EOF
-ac_sources="$sim_link_files"
-ac_dests="$sim_link_links"
-EOF
-
-cat >> $CONFIG_STATUS <<\EOF
-srcdir=$ac_given_srcdir
-while test -n "$ac_sources"; do
- set $ac_dests; ac_dest=$1; shift; ac_dests=$*
- set $ac_sources; ac_source=$1; shift; ac_sources=$*
-
- echo "linking $srcdir/$ac_source to $ac_dest"
-
- if test ! -r $srcdir/$ac_source; then
- { echo "configure: error: $srcdir/$ac_source: File not found" 1>&2; exit 1; }
- fi
- rm -f $ac_dest
-
- # Make relative symlinks.
- # Remove last slash and all that follows it. Not all systems have dirname.
- ac_dest_dir=`echo $ac_dest|sed 's%/[^/][^/]*$%%'`
- if test "$ac_dest_dir" != "$ac_dest" && test "$ac_dest_dir" != .; then
- # The dest file is in a subdirectory.
- test ! -d "$ac_dest_dir" && mkdir "$ac_dest_dir"
- ac_dest_dir_suffix="/`echo $ac_dest_dir|sed 's%^\./%%'`"
- # A "../" for each directory in $ac_dest_dir_suffix.
- ac_dots=`echo $ac_dest_dir_suffix|sed 's%/[^/]*%../%g'`
- else
- ac_dest_dir_suffix= ac_dots=
- fi
-
- case "$srcdir" in
- [/$]*) ac_rel_source="$srcdir/$ac_source" ;;
- *) ac_rel_source="$ac_dots$srcdir/$ac_source" ;;
- esac
-
- # Make a symlink if possible; otherwise try a hard link.
- if ln -s $ac_rel_source $ac_dest 2>/dev/null ||
- ln $srcdir/$ac_source $ac_dest; then :
- else
- { echo "configure: error: can not link $ac_dest to $srcdir/$ac_source" 1>&2; exit 1; }
- fi
-done
-EOF
-cat >> $CONFIG_STATUS <<EOF
-
-EOF
-cat >> $CONFIG_STATUS <<\EOF
-case "x$CONFIG_FILES" in
- xMakefile*)
- echo "Merging Makefile.sim+Make-common.sim into Makefile ..."
- rm -f Makesim1.tmp Makesim2.tmp Makefile
- sed -n -e '/^## COMMON_PRE_/,/^## End COMMON_PRE_/ p' <Make-common.sim >Makesim1.tmp
- sed -n -e '/^## COMMON_POST_/,/^## End COMMON_POST_/ p' <Make-common.sim >Makesim2.tmp
- sed -e '/^## COMMON_PRE_/ r Makesim1.tmp' \
- -e '/^## COMMON_POST_/ r Makesim2.tmp' \
- <Makefile.sim >Makefile
- rm -f Makefile.sim Make-common.sim Makesim1.tmp Makesim2.tmp
- ;;
- esac
- case "x$CONFIG_HEADERS" in xconfig.h:config.in) echo > stamp-h ;; esac
-
-exit 0
-EOF
-chmod +x $CONFIG_STATUS
-rm -fr confdefs* $ac_clean_files
-test "$no_create" = yes || ${CONFIG_SHELL-/bin/sh} $CONFIG_STATUS || exit 1
-
-
diff --git a/sim/i960/configure.in b/sim/i960/configure.in
deleted file mode 100644
index 7c5587512d6..00000000000
--- a/sim/i960/configure.in
+++ /dev/null
@@ -1,16 +0,0 @@
-dnl Process this file with autoconf to produce a configure script.
-sinclude(../common/aclocal.m4)
-AC_PREREQ(2.5)dnl
-AC_INIT(Makefile.in)
-
-SIM_AC_COMMON
-
-SIM_AC_OPTION_ENDIAN(LITTLE_ENDIAN)
-SIM_AC_OPTION_ALIGNMENT(NONSTRICT_ALIGNMENT)
-SIM_AC_OPTION_HOSTENDIAN
-SIM_AC_OPTION_SCACHE(1024)
-SIM_AC_OPTION_DEFAULT_MODEL(i960KA)
-SIM_AC_OPTION_ENVIRONMENT
-SIM_AC_OPTION_CGEN_MAINT
-
-SIM_AC_OUTPUT
diff --git a/sim/i960/cpu.c b/sim/i960/cpu.c
deleted file mode 100644
index c41b643fd11..00000000000
--- a/sim/i960/cpu.c
+++ /dev/null
@@ -1,85 +0,0 @@
-/* Misc. support for CPU family i960base.
-
-THIS FILE IS MACHINE GENERATED WITH CGEN.
-
-Copyright (C) 1996, 1997, 1998, 1999 Free Software Foundation, Inc.
-
-This file is part of the GNU Simulators.
-
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License along
-with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
-*/
-
-#define WANT_CPU i960base
-#define WANT_CPU_I960BASE
-
-#include "sim-main.h"
-#include "cgen-ops.h"
-
-/* Get the value of h-pc. */
-
-USI
-i960base_h_pc_get (SIM_CPU *current_cpu)
-{
- return CPU (h_pc);
-}
-
-/* Set a value for h-pc. */
-
-void
-i960base_h_pc_set (SIM_CPU *current_cpu, USI newval)
-{
- CPU (h_pc) = newval;
-}
-
-/* Get the value of h-gr. */
-
-SI
-i960base_h_gr_get (SIM_CPU *current_cpu, UINT regno)
-{
- return CPU (h_gr[regno]);
-}
-
-/* Set a value for h-gr. */
-
-void
-i960base_h_gr_set (SIM_CPU *current_cpu, UINT regno, SI newval)
-{
- CPU (h_gr[regno]) = newval;
-}
-
-/* Get the value of h-cc. */
-
-SI
-i960base_h_cc_get (SIM_CPU *current_cpu)
-{
- return CPU (h_cc);
-}
-
-/* Set a value for h-cc. */
-
-void
-i960base_h_cc_set (SIM_CPU *current_cpu, SI newval)
-{
- CPU (h_cc) = newval;
-}
-
-/* Record trace results for INSN. */
-
-void
-i960base_record_trace_results (SIM_CPU *current_cpu, CGEN_INSN *insn,
- int *indices, TRACE_RECORD *tr)
-{
-}
diff --git a/sim/i960/cpu.h b/sim/i960/cpu.h
deleted file mode 100644
index 1822b696e65..00000000000
--- a/sim/i960/cpu.h
+++ /dev/null
@@ -1,601 +0,0 @@
-/* CPU family header for i960base.
-
-THIS FILE IS MACHINE GENERATED WITH CGEN.
-
-Copyright (C) 1996, 1997, 1998, 1999 Free Software Foundation, Inc.
-
-This file is part of the GNU Simulators.
-
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License along
-with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
-*/
-
-#ifndef CPU_I960BASE_H
-#define CPU_I960BASE_H
-
-/* Maximum number of instructions that are fetched at a time.
- This is for LIW type instructions sets (e.g. m32r). */
-#define MAX_LIW_INSNS 1
-
-/* Maximum number of instructions that can be executed in parallel. */
-#define MAX_PARALLEL_INSNS 1
-
-/* CPU state information. */
-typedef struct {
- /* Hardware elements. */
- struct {
- /* program counter */
- USI h_pc;
-#define GET_H_PC() CPU (h_pc)
-#define SET_H_PC(x) (CPU (h_pc) = (x))
- /* general registers */
- SI h_gr[32];
-#define GET_H_GR(a1) CPU (h_gr)[a1]
-#define SET_H_GR(a1, x) (CPU (h_gr)[a1] = (x))
- /* condition code */
- SI h_cc;
-#define GET_H_CC() CPU (h_cc)
-#define SET_H_CC(x) (CPU (h_cc) = (x))
- } hardware;
-#define CPU_CGEN_HW(cpu) (& (cpu)->cpu_data.hardware)
-} I960BASE_CPU_DATA;
-
-/* Cover fns for register access. */
-USI i960base_h_pc_get (SIM_CPU *);
-void i960base_h_pc_set (SIM_CPU *, USI);
-SI i960base_h_gr_get (SIM_CPU *, UINT);
-void i960base_h_gr_set (SIM_CPU *, UINT, SI);
-SI i960base_h_cc_get (SIM_CPU *);
-void i960base_h_cc_set (SIM_CPU *, SI);
-
-/* These must be hand-written. */
-extern CPUREG_FETCH_FN i960base_fetch_register;
-extern CPUREG_STORE_FN i960base_store_register;
-
-typedef struct {
- int empty;
-} MODEL_I960KA_DATA;
-
-typedef struct {
- int empty;
-} MODEL_I960CA_DATA;
-
-/* Instruction argument buffer. */
-
-union sem_fields {
- struct { /* no operands */
- int empty;
- } fmt_empty;
- struct { /* */
- IADDR i_ctrl_disp;
- } sfmt_bno;
- struct { /* */
- SI* i_br_src1;
- unsigned char out_br_src1;
- } sfmt_testno_reg;
- struct { /* */
- IADDR i_br_disp;
- SI* i_br_src2;
- UINT f_br_src1;
- unsigned char in_br_src2;
- } sfmt_cmpobe_lit;
- struct { /* */
- IADDR i_br_disp;
- SI* i_br_src1;
- SI* i_br_src2;
- unsigned char in_br_src1;
- unsigned char in_br_src2;
- } sfmt_cmpobe_reg;
- struct { /* */
- SI* i_dst;
- UINT f_src1;
- UINT f_src2;
- UINT f_srcdst;
- unsigned char out_dst;
- unsigned char out_h_gr_add__DFLT_index_of__DFLT_dst_1;
- } sfmt_emul3;
- struct { /* */
- SI* i_dst;
- SI* i_src1;
- UINT f_src2;
- UINT f_srcdst;
- unsigned char in_src1;
- unsigned char out_dst;
- unsigned char out_h_gr_add__DFLT_index_of__DFLT_dst_1;
- } sfmt_emul2;
- struct { /* */
- SI* i_dst;
- SI* i_src2;
- UINT f_src1;
- UINT f_srcdst;
- unsigned char in_src2;
- unsigned char out_dst;
- unsigned char out_h_gr_add__DFLT_index_of__DFLT_dst_1;
- } sfmt_emul1;
- struct { /* */
- SI* i_dst;
- SI* i_src1;
- SI* i_src2;
- UINT f_srcdst;
- unsigned char in_src1;
- unsigned char in_src2;
- unsigned char out_dst;
- unsigned char out_h_gr_add__DFLT_index_of__DFLT_dst_1;
- } sfmt_emul;
- struct { /* */
- SI* i_abase;
- SI* i_st_src;
- UINT f_offset;
- UINT f_srcdst;
- unsigned char in_abase;
- unsigned char in_h_gr_add__DFLT_index_of__DFLT_st_src_1;
- unsigned char in_h_gr_add__DFLT_index_of__DFLT_st_src_2;
- unsigned char in_h_gr_add__DFLT_index_of__DFLT_st_src_3;
- unsigned char in_st_src;
- } sfmt_stq_indirect_offset;
- struct { /* */
- SI* i_abase;
- SI* i_dst;
- UINT f_offset;
- UINT f_srcdst;
- unsigned char in_abase;
- unsigned char out_dst;
- unsigned char out_h_gr_add__DFLT_index_of__DFLT_dst_1;
- unsigned char out_h_gr_add__DFLT_index_of__DFLT_dst_2;
- unsigned char out_h_gr_add__DFLT_index_of__DFLT_dst_3;
- } sfmt_ldq_indirect_offset;
- struct { /* */
- SI* i_abase;
- SI* i_index;
- SI* i_st_src;
- UINT f_optdisp;
- UINT f_scale;
- UINT f_srcdst;
- unsigned char in_abase;
- unsigned char in_h_gr_add__DFLT_index_of__DFLT_st_src_1;
- unsigned char in_h_gr_add__DFLT_index_of__DFLT_st_src_2;
- unsigned char in_h_gr_add__DFLT_index_of__DFLT_st_src_3;
- unsigned char in_index;
- unsigned char in_st_src;
- } sfmt_stq_indirect_index_disp;
- struct { /* */
- SI* i_abase;
- SI* i_dst;
- SI* i_index;
- UINT f_optdisp;
- UINT f_scale;
- UINT f_srcdst;
- unsigned char in_abase;
- unsigned char in_index;
- unsigned char out_dst;
- unsigned char out_h_gr_add__DFLT_index_of__DFLT_dst_1;
- unsigned char out_h_gr_add__DFLT_index_of__DFLT_dst_2;
- unsigned char out_h_gr_add__DFLT_index_of__DFLT_dst_3;
- } sfmt_ldq_indirect_index_disp;
- struct { /* */
- SI* i_dst;
- SI* i_src1;
- UINT f_src1;
- UINT f_srcdst;
- unsigned char in_h_gr_add__DFLT_index_of__DFLT_src1_1;
- unsigned char in_h_gr_add__DFLT_index_of__DFLT_src1_2;
- unsigned char in_h_gr_add__DFLT_index_of__DFLT_src1_3;
- unsigned char in_src1;
- unsigned char out_dst;
- unsigned char out_h_gr_add__DFLT_index_of__DFLT_dst_1;
- unsigned char out_h_gr_add__DFLT_index_of__DFLT_dst_2;
- unsigned char out_h_gr_add__DFLT_index_of__DFLT_dst_3;
- } sfmt_movq;
- struct { /* */
- UINT f_optdisp;
- unsigned char in_h_gr_0;
- unsigned char in_h_gr_1;
- unsigned char in_h_gr_10;
- unsigned char in_h_gr_11;
- unsigned char in_h_gr_12;
- unsigned char in_h_gr_13;
- unsigned char in_h_gr_14;
- unsigned char in_h_gr_15;
- unsigned char in_h_gr_2;
- unsigned char in_h_gr_3;
- unsigned char in_h_gr_31;
- unsigned char in_h_gr_4;
- unsigned char in_h_gr_5;
- unsigned char in_h_gr_6;
- unsigned char in_h_gr_7;
- unsigned char in_h_gr_8;
- unsigned char in_h_gr_9;
- unsigned char out_h_gr_0;
- unsigned char out_h_gr_1;
- unsigned char out_h_gr_10;
- unsigned char out_h_gr_11;
- unsigned char out_h_gr_12;
- unsigned char out_h_gr_13;
- unsigned char out_h_gr_14;
- unsigned char out_h_gr_15;
- unsigned char out_h_gr_2;
- unsigned char out_h_gr_3;
- unsigned char out_h_gr_31;
- unsigned char out_h_gr_4;
- unsigned char out_h_gr_5;
- unsigned char out_h_gr_6;
- unsigned char out_h_gr_7;
- unsigned char out_h_gr_8;
- unsigned char out_h_gr_9;
- } sfmt_callx_disp;
- struct { /* */
- SI* i_abase;
- UINT f_offset;
- unsigned char in_abase;
- unsigned char in_h_gr_0;
- unsigned char in_h_gr_1;
- unsigned char in_h_gr_10;
- unsigned char in_h_gr_11;
- unsigned char in_h_gr_12;
- unsigned char in_h_gr_13;
- unsigned char in_h_gr_14;
- unsigned char in_h_gr_15;
- unsigned char in_h_gr_2;
- unsigned char in_h_gr_3;
- unsigned char in_h_gr_31;
- unsigned char in_h_gr_4;
- unsigned char in_h_gr_5;
- unsigned char in_h_gr_6;
- unsigned char in_h_gr_7;
- unsigned char in_h_gr_8;
- unsigned char in_h_gr_9;
- unsigned char out_h_gr_0;
- unsigned char out_h_gr_1;
- unsigned char out_h_gr_10;
- unsigned char out_h_gr_11;
- unsigned char out_h_gr_12;
- unsigned char out_h_gr_13;
- unsigned char out_h_gr_14;
- unsigned char out_h_gr_15;
- unsigned char out_h_gr_2;
- unsigned char out_h_gr_3;
- unsigned char out_h_gr_31;
- unsigned char out_h_gr_4;
- unsigned char out_h_gr_5;
- unsigned char out_h_gr_6;
- unsigned char out_h_gr_7;
- unsigned char out_h_gr_8;
- unsigned char out_h_gr_9;
- } sfmt_callx_indirect_offset;
-#if WITH_SCACHE_PBB
- /* Writeback handler. */
- struct {
- /* Pointer to argbuf entry for insn whose results need writing back. */
- const struct argbuf *abuf;
- } write;
- /* x-before handler */
- struct {
- /*const SCACHE *insns[MAX_PARALLEL_INSNS];*/
- int first_p;
- } before;
- /* x-after handler */
- struct {
- int empty;
- } after;
- /* This entry is used to terminate each pbb. */
- struct {
- /* Number of insns in pbb. */
- int insn_count;
- /* Next pbb to execute. */
- SCACHE *next;
- SCACHE *branch_target;
- } chain;
-#endif
-};
-
-/* The ARGBUF struct. */
-struct argbuf {
- /* These are the baseclass definitions. */
- IADDR addr;
- const IDESC *idesc;
- char trace_p;
- char profile_p;
- /* ??? Temporary hack for skip insns. */
- char skip_count;
- char unused;
- /* cpu specific data follows */
- union sem semantic;
- int written;
- union sem_fields fields;
-};
-
-/* A cached insn.
-
- ??? SCACHE used to contain more than just argbuf. We could delete the
- type entirely and always just use ARGBUF, but for future concerns and as
- a level of abstraction it is left in. */
-
-struct scache {
- struct argbuf argbuf;
-};
-
-/* Macros to simplify extraction, reading and semantic code.
- These define and assign the local vars that contain the insn's fields. */
-
-#define EXTRACT_IFMT_EMPTY_VARS \
- unsigned int length;
-#define EXTRACT_IFMT_EMPTY_CODE \
- length = 0; \
-
-#define EXTRACT_IFMT_MULO_VARS \
- UINT f_opcode; \
- UINT f_srcdst; \
- UINT f_src2; \
- UINT f_m3; \
- UINT f_m2; \
- UINT f_m1; \
- UINT f_opcode2; \
- UINT f_zero; \
- UINT f_src1; \
- unsigned int length;
-#define EXTRACT_IFMT_MULO_CODE \
- length = 4; \
- f_opcode = EXTRACT_MSB0_UINT (insn, 32, 0, 8); \
- f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); \
- f_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5); \
- f_m3 = EXTRACT_MSB0_UINT (insn, 32, 18, 1); \
- f_m2 = EXTRACT_MSB0_UINT (insn, 32, 19, 1); \
- f_m1 = EXTRACT_MSB0_UINT (insn, 32, 20, 1); \
- f_opcode2 = EXTRACT_MSB0_UINT (insn, 32, 21, 4); \
- f_zero = EXTRACT_MSB0_UINT (insn, 32, 25, 2); \
- f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5); \
-
-#define EXTRACT_IFMT_MULO1_VARS \
- UINT f_opcode; \
- UINT f_srcdst; \
- UINT f_src2; \
- UINT f_m3; \
- UINT f_m2; \
- UINT f_m1; \
- UINT f_opcode2; \
- UINT f_zero; \
- UINT f_src1; \
- unsigned int length;
-#define EXTRACT_IFMT_MULO1_CODE \
- length = 4; \
- f_opcode = EXTRACT_MSB0_UINT (insn, 32, 0, 8); \
- f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); \
- f_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5); \
- f_m3 = EXTRACT_MSB0_UINT (insn, 32, 18, 1); \
- f_m2 = EXTRACT_MSB0_UINT (insn, 32, 19, 1); \
- f_m1 = EXTRACT_MSB0_UINT (insn, 32, 20, 1); \
- f_opcode2 = EXTRACT_MSB0_UINT (insn, 32, 21, 4); \
- f_zero = EXTRACT_MSB0_UINT (insn, 32, 25, 2); \
- f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5); \
-
-#define EXTRACT_IFMT_MULO2_VARS \
- UINT f_opcode; \
- UINT f_srcdst; \
- UINT f_src2; \
- UINT f_m3; \
- UINT f_m2; \
- UINT f_m1; \
- UINT f_opcode2; \
- UINT f_zero; \
- UINT f_src1; \
- unsigned int length;
-#define EXTRACT_IFMT_MULO2_CODE \
- length = 4; \
- f_opcode = EXTRACT_MSB0_UINT (insn, 32, 0, 8); \
- f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); \
- f_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5); \
- f_m3 = EXTRACT_MSB0_UINT (insn, 32, 18, 1); \
- f_m2 = EXTRACT_MSB0_UINT (insn, 32, 19, 1); \
- f_m1 = EXTRACT_MSB0_UINT (insn, 32, 20, 1); \
- f_opcode2 = EXTRACT_MSB0_UINT (insn, 32, 21, 4); \
- f_zero = EXTRACT_MSB0_UINT (insn, 32, 25, 2); \
- f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5); \
-
-#define EXTRACT_IFMT_MULO3_VARS \
- UINT f_opcode; \
- UINT f_srcdst; \
- UINT f_src2; \
- UINT f_m3; \
- UINT f_m2; \
- UINT f_m1; \
- UINT f_opcode2; \
- UINT f_zero; \
- UINT f_src1; \
- unsigned int length;
-#define EXTRACT_IFMT_MULO3_CODE \
- length = 4; \
- f_opcode = EXTRACT_MSB0_UINT (insn, 32, 0, 8); \
- f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); \
- f_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5); \
- f_m3 = EXTRACT_MSB0_UINT (insn, 32, 18, 1); \
- f_m2 = EXTRACT_MSB0_UINT (insn, 32, 19, 1); \
- f_m1 = EXTRACT_MSB0_UINT (insn, 32, 20, 1); \
- f_opcode2 = EXTRACT_MSB0_UINT (insn, 32, 21, 4); \
- f_zero = EXTRACT_MSB0_UINT (insn, 32, 25, 2); \
- f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5); \
-
-#define EXTRACT_IFMT_LDA_OFFSET_VARS \
- UINT f_opcode; \
- UINT f_srcdst; \
- UINT f_abase; \
- UINT f_modea; \
- UINT f_zeroa; \
- UINT f_offset; \
- unsigned int length;
-#define EXTRACT_IFMT_LDA_OFFSET_CODE \
- length = 4; \
- f_opcode = EXTRACT_MSB0_UINT (insn, 32, 0, 8); \
- f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); \
- f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); \
- f_modea = EXTRACT_MSB0_UINT (insn, 32, 18, 1); \
- f_zeroa = EXTRACT_MSB0_UINT (insn, 32, 19, 1); \
- f_offset = EXTRACT_MSB0_UINT (insn, 32, 20, 12); \
-
-#define EXTRACT_IFMT_LDA_INDIRECT_VARS \
- UINT f_opcode; \
- UINT f_srcdst; \
- UINT f_abase; \
- UINT f_modeb; \
- UINT f_scale; \
- UINT f_zerob; \
- UINT f_index; \
- unsigned int length;
-#define EXTRACT_IFMT_LDA_INDIRECT_CODE \
- length = 4; \
- f_opcode = EXTRACT_MSB0_UINT (insn, 32, 0, 8); \
- f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); \
- f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); \
- f_modeb = EXTRACT_MSB0_UINT (insn, 32, 18, 4); \
- f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3); \
- f_zerob = EXTRACT_MSB0_UINT (insn, 32, 25, 2); \
- f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5); \
-
-#define EXTRACT_IFMT_LDA_DISP_VARS \
- UINT f_opcode; \
- UINT f_optdisp; \
- UINT f_srcdst; \
- UINT f_abase; \
- UINT f_modeb; \
- UINT f_scale; \
- UINT f_zerob; \
- UINT f_index; \
- /* Contents of trailing part of insn. */ \
- UINT word_1; \
- unsigned int length;
-#define EXTRACT_IFMT_LDA_DISP_CODE \
- length = 8; \
- word_1 = GETIMEMUSI (current_cpu, pc + 4); \
- f_opcode = EXTRACT_MSB0_UINT (insn, 32, 0, 8); \
- f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0)); \
- f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); \
- f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); \
- f_modeb = EXTRACT_MSB0_UINT (insn, 32, 18, 4); \
- f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3); \
- f_zerob = EXTRACT_MSB0_UINT (insn, 32, 25, 2); \
- f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5); \
-
-#define EXTRACT_IFMT_ST_OFFSET_VARS \
- UINT f_opcode; \
- UINT f_srcdst; \
- UINT f_abase; \
- UINT f_modea; \
- UINT f_zeroa; \
- UINT f_offset; \
- unsigned int length;
-#define EXTRACT_IFMT_ST_OFFSET_CODE \
- length = 4; \
- f_opcode = EXTRACT_MSB0_UINT (insn, 32, 0, 8); \
- f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); \
- f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); \
- f_modea = EXTRACT_MSB0_UINT (insn, 32, 18, 1); \
- f_zeroa = EXTRACT_MSB0_UINT (insn, 32, 19, 1); \
- f_offset = EXTRACT_MSB0_UINT (insn, 32, 20, 12); \
-
-#define EXTRACT_IFMT_ST_INDIRECT_VARS \
- UINT f_opcode; \
- UINT f_srcdst; \
- UINT f_abase; \
- UINT f_modeb; \
- UINT f_scale; \
- UINT f_zerob; \
- UINT f_index; \
- unsigned int length;
-#define EXTRACT_IFMT_ST_INDIRECT_CODE \
- length = 4; \
- f_opcode = EXTRACT_MSB0_UINT (insn, 32, 0, 8); \
- f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); \
- f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); \
- f_modeb = EXTRACT_MSB0_UINT (insn, 32, 18, 4); \
- f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3); \
- f_zerob = EXTRACT_MSB0_UINT (insn, 32, 25, 2); \
- f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5); \
-
-#define EXTRACT_IFMT_ST_DISP_VARS \
- UINT f_opcode; \
- UINT f_optdisp; \
- UINT f_srcdst; \
- UINT f_abase; \
- UINT f_modeb; \
- UINT f_scale; \
- UINT f_zerob; \
- UINT f_index; \
- /* Contents of trailing part of insn. */ \
- UINT word_1; \
- unsigned int length;
-#define EXTRACT_IFMT_ST_DISP_CODE \
- length = 8; \
- word_1 = GETIMEMUSI (current_cpu, pc + 4); \
- f_opcode = EXTRACT_MSB0_UINT (insn, 32, 0, 8); \
- f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0)); \
- f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); \
- f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); \
- f_modeb = EXTRACT_MSB0_UINT (insn, 32, 18, 4); \
- f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3); \
- f_zerob = EXTRACT_MSB0_UINT (insn, 32, 25, 2); \
- f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5); \
-
-#define EXTRACT_IFMT_CMPOBE_REG_VARS \
- UINT f_opcode; \
- UINT f_br_src1; \
- UINT f_br_src2; \
- UINT f_br_m1; \
- SI f_br_disp; \
- UINT f_br_zero; \
- unsigned int length;
-#define EXTRACT_IFMT_CMPOBE_REG_CODE \
- length = 4; \
- f_opcode = EXTRACT_MSB0_UINT (insn, 32, 0, 8); \
- f_br_src1 = EXTRACT_MSB0_UINT (insn, 32, 8, 5); \
- f_br_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5); \
- f_br_m1 = EXTRACT_MSB0_UINT (insn, 32, 18, 1); \
- f_br_disp = ((((EXTRACT_MSB0_INT (insn, 32, 19, 11)) << (2))) + (pc)); \
- f_br_zero = EXTRACT_MSB0_UINT (insn, 32, 30, 2); \
-
-#define EXTRACT_IFMT_CMPOBE_LIT_VARS \
- UINT f_opcode; \
- UINT f_br_src1; \
- UINT f_br_src2; \
- UINT f_br_m1; \
- SI f_br_disp; \
- UINT f_br_zero; \
- unsigned int length;
-#define EXTRACT_IFMT_CMPOBE_LIT_CODE \
- length = 4; \
- f_opcode = EXTRACT_MSB0_UINT (insn, 32, 0, 8); \
- f_br_src1 = EXTRACT_MSB0_UINT (insn, 32, 8, 5); \
- f_br_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5); \
- f_br_m1 = EXTRACT_MSB0_UINT (insn, 32, 18, 1); \
- f_br_disp = ((((EXTRACT_MSB0_INT (insn, 32, 19, 11)) << (2))) + (pc)); \
- f_br_zero = EXTRACT_MSB0_UINT (insn, 32, 30, 2); \
-
-#define EXTRACT_IFMT_BNO_VARS \
- UINT f_opcode; \
- SI f_ctrl_disp; \
- UINT f_ctrl_zero; \
- unsigned int length;
-#define EXTRACT_IFMT_BNO_CODE \
- length = 4; \
- f_opcode = EXTRACT_MSB0_UINT (insn, 32, 0, 8); \
- f_ctrl_disp = ((((EXTRACT_MSB0_INT (insn, 32, 8, 22)) << (2))) + (pc)); \
- f_ctrl_zero = EXTRACT_MSB0_UINT (insn, 32, 30, 2); \
-
-/* Collection of various things for the trace handler to use. */
-
-typedef struct trace_record {
- IADDR pc;
- /* FIXME:wip */
-} TRACE_RECORD;
-
-#endif /* CPU_I960BASE_H */
diff --git a/sim/i960/cpuall.h b/sim/i960/cpuall.h
deleted file mode 100644
index 772cd9f37a3..00000000000
--- a/sim/i960/cpuall.h
+++ /dev/null
@@ -1,67 +0,0 @@
-/* Simulator CPU header for i960.
-
-THIS FILE IS MACHINE GENERATED WITH CGEN.
-
-Copyright (C) 1996, 1997, 1998, 1999 Free Software Foundation, Inc.
-
-This file is part of the GNU Simulators.
-
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License along
-with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
-*/
-
-#ifndef I960_CPUALL_H
-#define I960_CPUALL_H
-
-/* Include files for each cpu family. */
-
-#ifdef WANT_CPU_I960BASE
-#include "eng.h"
-#include "cgen-engine.h"
-#include "cpu.h"
-#include "decode.h"
-#endif
-
-extern const MACH i960_ka_sa_mach;
-extern const MACH i960_ca_mach;
-
-#ifndef WANT_CPU
-/* The ARGBUF struct. */
-struct argbuf {
- /* These are the baseclass definitions. */
- IADDR addr;
- const IDESC *idesc;
- char trace_p;
- char profile_p;
- /* ??? Temporary hack for skip insns. */
- char skip_count;
- char unused;
- /* cpu specific data follows */
-};
-#endif
-
-#ifndef WANT_CPU
-/* A cached insn.
-
- ??? SCACHE used to contain more than just argbuf. We could delete the
- type entirely and always just use ARGBUF, but for future concerns and as
- a level of abstraction it is left in. */
-
-struct scache {
- struct argbuf argbuf;
-};
-#endif
-
-#endif /* I960_CPUALL_H */
diff --git a/sim/i960/decode.c b/sim/i960/decode.c
deleted file mode 100644
index c1d9f9097eb..00000000000
--- a/sim/i960/decode.c
+++ /dev/null
@@ -1,5569 +0,0 @@
-/* Simulator instruction decoder for i960base.
-
-THIS FILE IS MACHINE GENERATED WITH CGEN.
-
-Copyright (C) 1996, 1997, 1998, 1999 Free Software Foundation, Inc.
-
-This file is part of the GNU Simulators.
-
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License along
-with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
-*/
-
-#define WANT_CPU i960base
-#define WANT_CPU_I960BASE
-
-#include "sim-main.h"
-#include "sim-assert.h"
-
-/* The instruction descriptor array.
- This is computed at runtime. Space for it is not malloc'd to save a
- teensy bit of cpu in the decoder. Moving it to malloc space is trivial
- but won't be done until necessary (we don't currently support the runtime
- addition of instructions nor an SMP machine with different cpus). */
-static IDESC i960base_insn_data[I960BASE_INSN_MAX];
-
-/* Commas between elements are contained in the macros.
- Some of these are conditionally compiled out. */
-
-static const struct insn_sem i960base_insn_sem[] =
-{
- { VIRTUAL_INSN_X_INVALID, I960BASE_INSN_X_INVALID, I960BASE_SFMT_EMPTY },
- { VIRTUAL_INSN_X_AFTER, I960BASE_INSN_X_AFTER, I960BASE_SFMT_EMPTY },
- { VIRTUAL_INSN_X_BEFORE, I960BASE_INSN_X_BEFORE, I960BASE_SFMT_EMPTY },
- { VIRTUAL_INSN_X_CTI_CHAIN, I960BASE_INSN_X_CTI_CHAIN, I960BASE_SFMT_EMPTY },
- { VIRTUAL_INSN_X_CHAIN, I960BASE_INSN_X_CHAIN, I960BASE_SFMT_EMPTY },
- { VIRTUAL_INSN_X_BEGIN, I960BASE_INSN_X_BEGIN, I960BASE_SFMT_EMPTY },
- { I960_INSN_MULO, I960BASE_INSN_MULO, I960BASE_SFMT_MULO },
- { I960_INSN_MULO1, I960BASE_INSN_MULO1, I960BASE_SFMT_MULO1 },
- { I960_INSN_MULO2, I960BASE_INSN_MULO2, I960BASE_SFMT_MULO2 },
- { I960_INSN_MULO3, I960BASE_INSN_MULO3, I960BASE_SFMT_MULO3 },
- { I960_INSN_REMO, I960BASE_INSN_REMO, I960BASE_SFMT_MULO },
- { I960_INSN_REMO1, I960BASE_INSN_REMO1, I960BASE_SFMT_MULO1 },
- { I960_INSN_REMO2, I960BASE_INSN_REMO2, I960BASE_SFMT_MULO2 },
- { I960_INSN_REMO3, I960BASE_INSN_REMO3, I960BASE_SFMT_MULO3 },
- { I960_INSN_DIVO, I960BASE_INSN_DIVO, I960BASE_SFMT_MULO },
- { I960_INSN_DIVO1, I960BASE_INSN_DIVO1, I960BASE_SFMT_MULO1 },
- { I960_INSN_DIVO2, I960BASE_INSN_DIVO2, I960BASE_SFMT_MULO2 },
- { I960_INSN_DIVO3, I960BASE_INSN_DIVO3, I960BASE_SFMT_MULO3 },
- { I960_INSN_REMI, I960BASE_INSN_REMI, I960BASE_SFMT_MULO },
- { I960_INSN_REMI1, I960BASE_INSN_REMI1, I960BASE_SFMT_MULO1 },
- { I960_INSN_REMI2, I960BASE_INSN_REMI2, I960BASE_SFMT_MULO2 },
- { I960_INSN_REMI3, I960BASE_INSN_REMI3, I960BASE_SFMT_MULO3 },
- { I960_INSN_DIVI, I960BASE_INSN_DIVI, I960BASE_SFMT_MULO },
- { I960_INSN_DIVI1, I960BASE_INSN_DIVI1, I960BASE_SFMT_MULO1 },
- { I960_INSN_DIVI2, I960BASE_INSN_DIVI2, I960BASE_SFMT_MULO2 },
- { I960_INSN_DIVI3, I960BASE_INSN_DIVI3, I960BASE_SFMT_MULO3 },
- { I960_INSN_ADDO, I960BASE_INSN_ADDO, I960BASE_SFMT_MULO },
- { I960_INSN_ADDO1, I960BASE_INSN_ADDO1, I960BASE_SFMT_MULO1 },
- { I960_INSN_ADDO2, I960BASE_INSN_ADDO2, I960BASE_SFMT_MULO2 },
- { I960_INSN_ADDO3, I960BASE_INSN_ADDO3, I960BASE_SFMT_MULO3 },
- { I960_INSN_SUBO, I960BASE_INSN_SUBO, I960BASE_SFMT_MULO },
- { I960_INSN_SUBO1, I960BASE_INSN_SUBO1, I960BASE_SFMT_MULO1 },
- { I960_INSN_SUBO2, I960BASE_INSN_SUBO2, I960BASE_SFMT_MULO2 },
- { I960_INSN_SUBO3, I960BASE_INSN_SUBO3, I960BASE_SFMT_MULO3 },
- { I960_INSN_NOTBIT, I960BASE_INSN_NOTBIT, I960BASE_SFMT_NOTBIT },
- { I960_INSN_NOTBIT1, I960BASE_INSN_NOTBIT1, I960BASE_SFMT_NOTBIT1 },
- { I960_INSN_NOTBIT2, I960BASE_INSN_NOTBIT2, I960BASE_SFMT_NOTBIT2 },
- { I960_INSN_NOTBIT3, I960BASE_INSN_NOTBIT3, I960BASE_SFMT_NOTBIT3 },
- { I960_INSN_AND, I960BASE_INSN_AND, I960BASE_SFMT_MULO },
- { I960_INSN_AND1, I960BASE_INSN_AND1, I960BASE_SFMT_MULO1 },
- { I960_INSN_AND2, I960BASE_INSN_AND2, I960BASE_SFMT_MULO2 },
- { I960_INSN_AND3, I960BASE_INSN_AND3, I960BASE_SFMT_MULO3 },
- { I960_INSN_ANDNOT, I960BASE_INSN_ANDNOT, I960BASE_SFMT_MULO },
- { I960_INSN_ANDNOT1, I960BASE_INSN_ANDNOT1, I960BASE_SFMT_MULO1 },
- { I960_INSN_ANDNOT2, I960BASE_INSN_ANDNOT2, I960BASE_SFMT_MULO2 },
- { I960_INSN_ANDNOT3, I960BASE_INSN_ANDNOT3, I960BASE_SFMT_MULO3 },
- { I960_INSN_SETBIT, I960BASE_INSN_SETBIT, I960BASE_SFMT_NOTBIT },
- { I960_INSN_SETBIT1, I960BASE_INSN_SETBIT1, I960BASE_SFMT_NOTBIT1 },
- { I960_INSN_SETBIT2, I960BASE_INSN_SETBIT2, I960BASE_SFMT_NOTBIT2 },
- { I960_INSN_SETBIT3, I960BASE_INSN_SETBIT3, I960BASE_SFMT_NOTBIT3 },
- { I960_INSN_NOTAND, I960BASE_INSN_NOTAND, I960BASE_SFMT_MULO },
- { I960_INSN_NOTAND1, I960BASE_INSN_NOTAND1, I960BASE_SFMT_MULO1 },
- { I960_INSN_NOTAND2, I960BASE_INSN_NOTAND2, I960BASE_SFMT_MULO2 },
- { I960_INSN_NOTAND3, I960BASE_INSN_NOTAND3, I960BASE_SFMT_MULO3 },
- { I960_INSN_XOR, I960BASE_INSN_XOR, I960BASE_SFMT_MULO },
- { I960_INSN_XOR1, I960BASE_INSN_XOR1, I960BASE_SFMT_MULO1 },
- { I960_INSN_XOR2, I960BASE_INSN_XOR2, I960BASE_SFMT_MULO2 },
- { I960_INSN_XOR3, I960BASE_INSN_XOR3, I960BASE_SFMT_MULO3 },
- { I960_INSN_OR, I960BASE_INSN_OR, I960BASE_SFMT_MULO },
- { I960_INSN_OR1, I960BASE_INSN_OR1, I960BASE_SFMT_MULO1 },
- { I960_INSN_OR2, I960BASE_INSN_OR2, I960BASE_SFMT_MULO2 },
- { I960_INSN_OR3, I960BASE_INSN_OR3, I960BASE_SFMT_MULO3 },
- { I960_INSN_NOR, I960BASE_INSN_NOR, I960BASE_SFMT_MULO },
- { I960_INSN_NOR1, I960BASE_INSN_NOR1, I960BASE_SFMT_MULO1 },
- { I960_INSN_NOR2, I960BASE_INSN_NOR2, I960BASE_SFMT_MULO2 },
- { I960_INSN_NOR3, I960BASE_INSN_NOR3, I960BASE_SFMT_MULO3 },
- { I960_INSN_XNOR, I960BASE_INSN_XNOR, I960BASE_SFMT_MULO },
- { I960_INSN_XNOR1, I960BASE_INSN_XNOR1, I960BASE_SFMT_MULO1 },
- { I960_INSN_XNOR2, I960BASE_INSN_XNOR2, I960BASE_SFMT_MULO2 },
- { I960_INSN_XNOR3, I960BASE_INSN_XNOR3, I960BASE_SFMT_MULO3 },
- { I960_INSN_NOT, I960BASE_INSN_NOT, I960BASE_SFMT_NOT },
- { I960_INSN_NOT1, I960BASE_INSN_NOT1, I960BASE_SFMT_NOT1 },
- { I960_INSN_NOT2, I960BASE_INSN_NOT2, I960BASE_SFMT_NOT },
- { I960_INSN_NOT3, I960BASE_INSN_NOT3, I960BASE_SFMT_NOT1 },
- { I960_INSN_ORNOT, I960BASE_INSN_ORNOT, I960BASE_SFMT_MULO },
- { I960_INSN_ORNOT1, I960BASE_INSN_ORNOT1, I960BASE_SFMT_MULO1 },
- { I960_INSN_ORNOT2, I960BASE_INSN_ORNOT2, I960BASE_SFMT_MULO2 },
- { I960_INSN_ORNOT3, I960BASE_INSN_ORNOT3, I960BASE_SFMT_MULO3 },
- { I960_INSN_CLRBIT, I960BASE_INSN_CLRBIT, I960BASE_SFMT_NOTBIT },
- { I960_INSN_CLRBIT1, I960BASE_INSN_CLRBIT1, I960BASE_SFMT_NOTBIT1 },
- { I960_INSN_CLRBIT2, I960BASE_INSN_CLRBIT2, I960BASE_SFMT_NOTBIT2 },
- { I960_INSN_CLRBIT3, I960BASE_INSN_CLRBIT3, I960BASE_SFMT_NOTBIT3 },
- { I960_INSN_SHLO, I960BASE_INSN_SHLO, I960BASE_SFMT_SHLO },
- { I960_INSN_SHLO1, I960BASE_INSN_SHLO1, I960BASE_SFMT_SHLO1 },
- { I960_INSN_SHLO2, I960BASE_INSN_SHLO2, I960BASE_SFMT_SHLO2 },
- { I960_INSN_SHLO3, I960BASE_INSN_SHLO3, I960BASE_SFMT_SHLO3 },
- { I960_INSN_SHRO, I960BASE_INSN_SHRO, I960BASE_SFMT_SHLO },
- { I960_INSN_SHRO1, I960BASE_INSN_SHRO1, I960BASE_SFMT_SHLO1 },
- { I960_INSN_SHRO2, I960BASE_INSN_SHRO2, I960BASE_SFMT_SHLO2 },
- { I960_INSN_SHRO3, I960BASE_INSN_SHRO3, I960BASE_SFMT_SHLO3 },
- { I960_INSN_SHLI, I960BASE_INSN_SHLI, I960BASE_SFMT_SHLO },
- { I960_INSN_SHLI1, I960BASE_INSN_SHLI1, I960BASE_SFMT_SHLO1 },
- { I960_INSN_SHLI2, I960BASE_INSN_SHLI2, I960BASE_SFMT_SHLO2 },
- { I960_INSN_SHLI3, I960BASE_INSN_SHLI3, I960BASE_SFMT_SHLO3 },
- { I960_INSN_SHRI, I960BASE_INSN_SHRI, I960BASE_SFMT_SHLO },
- { I960_INSN_SHRI1, I960BASE_INSN_SHRI1, I960BASE_SFMT_SHLO1 },
- { I960_INSN_SHRI2, I960BASE_INSN_SHRI2, I960BASE_SFMT_SHLO2 },
- { I960_INSN_SHRI3, I960BASE_INSN_SHRI3, I960BASE_SFMT_SHLO3 },
- { I960_INSN_EMUL, I960BASE_INSN_EMUL, I960BASE_SFMT_EMUL },
- { I960_INSN_EMUL1, I960BASE_INSN_EMUL1, I960BASE_SFMT_EMUL1 },
- { I960_INSN_EMUL2, I960BASE_INSN_EMUL2, I960BASE_SFMT_EMUL2 },
- { I960_INSN_EMUL3, I960BASE_INSN_EMUL3, I960BASE_SFMT_EMUL3 },
- { I960_INSN_MOV, I960BASE_INSN_MOV, I960BASE_SFMT_NOT },
- { I960_INSN_MOV1, I960BASE_INSN_MOV1, I960BASE_SFMT_NOT1 },
- { I960_INSN_MOVL, I960BASE_INSN_MOVL, I960BASE_SFMT_MOVL },
- { I960_INSN_MOVL1, I960BASE_INSN_MOVL1, I960BASE_SFMT_MOVL1 },
- { I960_INSN_MOVT, I960BASE_INSN_MOVT, I960BASE_SFMT_MOVT },
- { I960_INSN_MOVT1, I960BASE_INSN_MOVT1, I960BASE_SFMT_MOVT1 },
- { I960_INSN_MOVQ, I960BASE_INSN_MOVQ, I960BASE_SFMT_MOVQ },
- { I960_INSN_MOVQ1, I960BASE_INSN_MOVQ1, I960BASE_SFMT_MOVQ1 },
- { I960_INSN_MODPC, I960BASE_INSN_MODPC, I960BASE_SFMT_MODPC },
- { I960_INSN_MODAC, I960BASE_INSN_MODAC, I960BASE_SFMT_MODPC },
- { I960_INSN_LDA_OFFSET, I960BASE_INSN_LDA_OFFSET, I960BASE_SFMT_LDA_OFFSET },
- { I960_INSN_LDA_INDIRECT_OFFSET, I960BASE_INSN_LDA_INDIRECT_OFFSET, I960BASE_SFMT_LDA_INDIRECT_OFFSET },
- { I960_INSN_LDA_INDIRECT, I960BASE_INSN_LDA_INDIRECT, I960BASE_SFMT_LDA_INDIRECT },
- { I960_INSN_LDA_INDIRECT_INDEX, I960BASE_INSN_LDA_INDIRECT_INDEX, I960BASE_SFMT_LDA_INDIRECT_INDEX },
- { I960_INSN_LDA_DISP, I960BASE_INSN_LDA_DISP, I960BASE_SFMT_LDA_DISP },
- { I960_INSN_LDA_INDIRECT_DISP, I960BASE_INSN_LDA_INDIRECT_DISP, I960BASE_SFMT_LDA_INDIRECT_DISP },
- { I960_INSN_LDA_INDEX_DISP, I960BASE_INSN_LDA_INDEX_DISP, I960BASE_SFMT_LDA_INDEX_DISP },
- { I960_INSN_LDA_INDIRECT_INDEX_DISP, I960BASE_INSN_LDA_INDIRECT_INDEX_DISP, I960BASE_SFMT_LDA_INDIRECT_INDEX_DISP },
- { I960_INSN_LD_OFFSET, I960BASE_INSN_LD_OFFSET, I960BASE_SFMT_LD_OFFSET },
- { I960_INSN_LD_INDIRECT_OFFSET, I960BASE_INSN_LD_INDIRECT_OFFSET, I960BASE_SFMT_LD_INDIRECT_OFFSET },
- { I960_INSN_LD_INDIRECT, I960BASE_INSN_LD_INDIRECT, I960BASE_SFMT_LD_INDIRECT },
- { I960_INSN_LD_INDIRECT_INDEX, I960BASE_INSN_LD_INDIRECT_INDEX, I960BASE_SFMT_LD_INDIRECT_INDEX },
- { I960_INSN_LD_DISP, I960BASE_INSN_LD_DISP, I960BASE_SFMT_LD_DISP },
- { I960_INSN_LD_INDIRECT_DISP, I960BASE_INSN_LD_INDIRECT_DISP, I960BASE_SFMT_LD_INDIRECT_DISP },
- { I960_INSN_LD_INDEX_DISP, I960BASE_INSN_LD_INDEX_DISP, I960BASE_SFMT_LD_INDEX_DISP },
- { I960_INSN_LD_INDIRECT_INDEX_DISP, I960BASE_INSN_LD_INDIRECT_INDEX_DISP, I960BASE_SFMT_LD_INDIRECT_INDEX_DISP },
- { I960_INSN_LDOB_OFFSET, I960BASE_INSN_LDOB_OFFSET, I960BASE_SFMT_LD_OFFSET },
- { I960_INSN_LDOB_INDIRECT_OFFSET, I960BASE_INSN_LDOB_INDIRECT_OFFSET, I960BASE_SFMT_LD_INDIRECT_OFFSET },
- { I960_INSN_LDOB_INDIRECT, I960BASE_INSN_LDOB_INDIRECT, I960BASE_SFMT_LD_INDIRECT },
- { I960_INSN_LDOB_INDIRECT_INDEX, I960BASE_INSN_LDOB_INDIRECT_INDEX, I960BASE_SFMT_LD_INDIRECT_INDEX },
- { I960_INSN_LDOB_DISP, I960BASE_INSN_LDOB_DISP, I960BASE_SFMT_LD_DISP },
- { I960_INSN_LDOB_INDIRECT_DISP, I960BASE_INSN_LDOB_INDIRECT_DISP, I960BASE_SFMT_LD_INDIRECT_DISP },
- { I960_INSN_LDOB_INDEX_DISP, I960BASE_INSN_LDOB_INDEX_DISP, I960BASE_SFMT_LD_INDEX_DISP },
- { I960_INSN_LDOB_INDIRECT_INDEX_DISP, I960BASE_INSN_LDOB_INDIRECT_INDEX_DISP, I960BASE_SFMT_LD_INDIRECT_INDEX_DISP },
- { I960_INSN_LDOS_OFFSET, I960BASE_INSN_LDOS_OFFSET, I960BASE_SFMT_LD_OFFSET },
- { I960_INSN_LDOS_INDIRECT_OFFSET, I960BASE_INSN_LDOS_INDIRECT_OFFSET, I960BASE_SFMT_LD_INDIRECT_OFFSET },
- { I960_INSN_LDOS_INDIRECT, I960BASE_INSN_LDOS_INDIRECT, I960BASE_SFMT_LD_INDIRECT },
- { I960_INSN_LDOS_INDIRECT_INDEX, I960BASE_INSN_LDOS_INDIRECT_INDEX, I960BASE_SFMT_LD_INDIRECT_INDEX },
- { I960_INSN_LDOS_DISP, I960BASE_INSN_LDOS_DISP, I960BASE_SFMT_LD_DISP },
- { I960_INSN_LDOS_INDIRECT_DISP, I960BASE_INSN_LDOS_INDIRECT_DISP, I960BASE_SFMT_LD_INDIRECT_DISP },
- { I960_INSN_LDOS_INDEX_DISP, I960BASE_INSN_LDOS_INDEX_DISP, I960BASE_SFMT_LD_INDEX_DISP },
- { I960_INSN_LDOS_INDIRECT_INDEX_DISP, I960BASE_INSN_LDOS_INDIRECT_INDEX_DISP, I960BASE_SFMT_LD_INDIRECT_INDEX_DISP },
- { I960_INSN_LDIB_OFFSET, I960BASE_INSN_LDIB_OFFSET, I960BASE_SFMT_LD_OFFSET },
- { I960_INSN_LDIB_INDIRECT_OFFSET, I960BASE_INSN_LDIB_INDIRECT_OFFSET, I960BASE_SFMT_LD_INDIRECT_OFFSET },
- { I960_INSN_LDIB_INDIRECT, I960BASE_INSN_LDIB_INDIRECT, I960BASE_SFMT_LD_INDIRECT },
- { I960_INSN_LDIB_INDIRECT_INDEX, I960BASE_INSN_LDIB_INDIRECT_INDEX, I960BASE_SFMT_LD_INDIRECT_INDEX },
- { I960_INSN_LDIB_DISP, I960BASE_INSN_LDIB_DISP, I960BASE_SFMT_LD_DISP },
- { I960_INSN_LDIB_INDIRECT_DISP, I960BASE_INSN_LDIB_INDIRECT_DISP, I960BASE_SFMT_LD_INDIRECT_DISP },
- { I960_INSN_LDIB_INDEX_DISP, I960BASE_INSN_LDIB_INDEX_DISP, I960BASE_SFMT_LD_INDEX_DISP },
- { I960_INSN_LDIB_INDIRECT_INDEX_DISP, I960BASE_INSN_LDIB_INDIRECT_INDEX_DISP, I960BASE_SFMT_LD_INDIRECT_INDEX_DISP },
- { I960_INSN_LDIS_OFFSET, I960BASE_INSN_LDIS_OFFSET, I960BASE_SFMT_LD_OFFSET },
- { I960_INSN_LDIS_INDIRECT_OFFSET, I960BASE_INSN_LDIS_INDIRECT_OFFSET, I960BASE_SFMT_LD_INDIRECT_OFFSET },
- { I960_INSN_LDIS_INDIRECT, I960BASE_INSN_LDIS_INDIRECT, I960BASE_SFMT_LD_INDIRECT },
- { I960_INSN_LDIS_INDIRECT_INDEX, I960BASE_INSN_LDIS_INDIRECT_INDEX, I960BASE_SFMT_LD_INDIRECT_INDEX },
- { I960_INSN_LDIS_DISP, I960BASE_INSN_LDIS_DISP, I960BASE_SFMT_LD_DISP },
- { I960_INSN_LDIS_INDIRECT_DISP, I960BASE_INSN_LDIS_INDIRECT_DISP, I960BASE_SFMT_LD_INDIRECT_DISP },
- { I960_INSN_LDIS_INDEX_DISP, I960BASE_INSN_LDIS_INDEX_DISP, I960BASE_SFMT_LD_INDEX_DISP },
- { I960_INSN_LDIS_INDIRECT_INDEX_DISP, I960BASE_INSN_LDIS_INDIRECT_INDEX_DISP, I960BASE_SFMT_LD_INDIRECT_INDEX_DISP },
- { I960_INSN_LDL_OFFSET, I960BASE_INSN_LDL_OFFSET, I960BASE_SFMT_LDL_OFFSET },
- { I960_INSN_LDL_INDIRECT_OFFSET, I960BASE_INSN_LDL_INDIRECT_OFFSET, I960BASE_SFMT_LDL_INDIRECT_OFFSET },
- { I960_INSN_LDL_INDIRECT, I960BASE_INSN_LDL_INDIRECT, I960BASE_SFMT_LDL_INDIRECT },
- { I960_INSN_LDL_INDIRECT_INDEX, I960BASE_INSN_LDL_INDIRECT_INDEX, I960BASE_SFMT_LDL_INDIRECT_INDEX },
- { I960_INSN_LDL_DISP, I960BASE_INSN_LDL_DISP, I960BASE_SFMT_LDL_DISP },
- { I960_INSN_LDL_INDIRECT_DISP, I960BASE_INSN_LDL_INDIRECT_DISP, I960BASE_SFMT_LDL_INDIRECT_DISP },
- { I960_INSN_LDL_INDEX_DISP, I960BASE_INSN_LDL_INDEX_DISP, I960BASE_SFMT_LDL_INDEX_DISP },
- { I960_INSN_LDL_INDIRECT_INDEX_DISP, I960BASE_INSN_LDL_INDIRECT_INDEX_DISP, I960BASE_SFMT_LDL_INDIRECT_INDEX_DISP },
- { I960_INSN_LDT_OFFSET, I960BASE_INSN_LDT_OFFSET, I960BASE_SFMT_LDT_OFFSET },
- { I960_INSN_LDT_INDIRECT_OFFSET, I960BASE_INSN_LDT_INDIRECT_OFFSET, I960BASE_SFMT_LDT_INDIRECT_OFFSET },
- { I960_INSN_LDT_INDIRECT, I960BASE_INSN_LDT_INDIRECT, I960BASE_SFMT_LDT_INDIRECT },
- { I960_INSN_LDT_INDIRECT_INDEX, I960BASE_INSN_LDT_INDIRECT_INDEX, I960BASE_SFMT_LDT_INDIRECT_INDEX },
- { I960_INSN_LDT_DISP, I960BASE_INSN_LDT_DISP, I960BASE_SFMT_LDT_DISP },
- { I960_INSN_LDT_INDIRECT_DISP, I960BASE_INSN_LDT_INDIRECT_DISP, I960BASE_SFMT_LDT_INDIRECT_DISP },
- { I960_INSN_LDT_INDEX_DISP, I960BASE_INSN_LDT_INDEX_DISP, I960BASE_SFMT_LDT_INDEX_DISP },
- { I960_INSN_LDT_INDIRECT_INDEX_DISP, I960BASE_INSN_LDT_INDIRECT_INDEX_DISP, I960BASE_SFMT_LDT_INDIRECT_INDEX_DISP },
- { I960_INSN_LDQ_OFFSET, I960BASE_INSN_LDQ_OFFSET, I960BASE_SFMT_LDQ_OFFSET },
- { I960_INSN_LDQ_INDIRECT_OFFSET, I960BASE_INSN_LDQ_INDIRECT_OFFSET, I960BASE_SFMT_LDQ_INDIRECT_OFFSET },
- { I960_INSN_LDQ_INDIRECT, I960BASE_INSN_LDQ_INDIRECT, I960BASE_SFMT_LDQ_INDIRECT },
- { I960_INSN_LDQ_INDIRECT_INDEX, I960BASE_INSN_LDQ_INDIRECT_INDEX, I960BASE_SFMT_LDQ_INDIRECT_INDEX },
- { I960_INSN_LDQ_DISP, I960BASE_INSN_LDQ_DISP, I960BASE_SFMT_LDQ_DISP },
- { I960_INSN_LDQ_INDIRECT_DISP, I960BASE_INSN_LDQ_INDIRECT_DISP, I960BASE_SFMT_LDQ_INDIRECT_DISP },
- { I960_INSN_LDQ_INDEX_DISP, I960BASE_INSN_LDQ_INDEX_DISP, I960BASE_SFMT_LDQ_INDEX_DISP },
- { I960_INSN_LDQ_INDIRECT_INDEX_DISP, I960BASE_INSN_LDQ_INDIRECT_INDEX_DISP, I960BASE_SFMT_LDQ_INDIRECT_INDEX_DISP },
- { I960_INSN_ST_OFFSET, I960BASE_INSN_ST_OFFSET, I960BASE_SFMT_ST_OFFSET },
- { I960_INSN_ST_INDIRECT_OFFSET, I960BASE_INSN_ST_INDIRECT_OFFSET, I960BASE_SFMT_ST_INDIRECT_OFFSET },
- { I960_INSN_ST_INDIRECT, I960BASE_INSN_ST_INDIRECT, I960BASE_SFMT_ST_INDIRECT },
- { I960_INSN_ST_INDIRECT_INDEX, I960BASE_INSN_ST_INDIRECT_INDEX, I960BASE_SFMT_ST_INDIRECT_INDEX },
- { I960_INSN_ST_DISP, I960BASE_INSN_ST_DISP, I960BASE_SFMT_ST_DISP },
- { I960_INSN_ST_INDIRECT_DISP, I960BASE_INSN_ST_INDIRECT_DISP, I960BASE_SFMT_ST_INDIRECT_DISP },
- { I960_INSN_ST_INDEX_DISP, I960BASE_INSN_ST_INDEX_DISP, I960BASE_SFMT_ST_INDEX_DISP },
- { I960_INSN_ST_INDIRECT_INDEX_DISP, I960BASE_INSN_ST_INDIRECT_INDEX_DISP, I960BASE_SFMT_ST_INDIRECT_INDEX_DISP },
- { I960_INSN_STOB_OFFSET, I960BASE_INSN_STOB_OFFSET, I960BASE_SFMT_ST_OFFSET },
- { I960_INSN_STOB_INDIRECT_OFFSET, I960BASE_INSN_STOB_INDIRECT_OFFSET, I960BASE_SFMT_ST_INDIRECT_OFFSET },
- { I960_INSN_STOB_INDIRECT, I960BASE_INSN_STOB_INDIRECT, I960BASE_SFMT_ST_INDIRECT },
- { I960_INSN_STOB_INDIRECT_INDEX, I960BASE_INSN_STOB_INDIRECT_INDEX, I960BASE_SFMT_ST_INDIRECT_INDEX },
- { I960_INSN_STOB_DISP, I960BASE_INSN_STOB_DISP, I960BASE_SFMT_ST_DISP },
- { I960_INSN_STOB_INDIRECT_DISP, I960BASE_INSN_STOB_INDIRECT_DISP, I960BASE_SFMT_ST_INDIRECT_DISP },
- { I960_INSN_STOB_INDEX_DISP, I960BASE_INSN_STOB_INDEX_DISP, I960BASE_SFMT_ST_INDEX_DISP },
- { I960_INSN_STOB_INDIRECT_INDEX_DISP, I960BASE_INSN_STOB_INDIRECT_INDEX_DISP, I960BASE_SFMT_ST_INDIRECT_INDEX_DISP },
- { I960_INSN_STOS_OFFSET, I960BASE_INSN_STOS_OFFSET, I960BASE_SFMT_ST_OFFSET },
- { I960_INSN_STOS_INDIRECT_OFFSET, I960BASE_INSN_STOS_INDIRECT_OFFSET, I960BASE_SFMT_ST_INDIRECT_OFFSET },
- { I960_INSN_STOS_INDIRECT, I960BASE_INSN_STOS_INDIRECT, I960BASE_SFMT_ST_INDIRECT },
- { I960_INSN_STOS_INDIRECT_INDEX, I960BASE_INSN_STOS_INDIRECT_INDEX, I960BASE_SFMT_ST_INDIRECT_INDEX },
- { I960_INSN_STOS_DISP, I960BASE_INSN_STOS_DISP, I960BASE_SFMT_ST_DISP },
- { I960_INSN_STOS_INDIRECT_DISP, I960BASE_INSN_STOS_INDIRECT_DISP, I960BASE_SFMT_ST_INDIRECT_DISP },
- { I960_INSN_STOS_INDEX_DISP, I960BASE_INSN_STOS_INDEX_DISP, I960BASE_SFMT_ST_INDEX_DISP },
- { I960_INSN_STOS_INDIRECT_INDEX_DISP, I960BASE_INSN_STOS_INDIRECT_INDEX_DISP, I960BASE_SFMT_ST_INDIRECT_INDEX_DISP },
- { I960_INSN_STL_OFFSET, I960BASE_INSN_STL_OFFSET, I960BASE_SFMT_STL_OFFSET },
- { I960_INSN_STL_INDIRECT_OFFSET, I960BASE_INSN_STL_INDIRECT_OFFSET, I960BASE_SFMT_STL_INDIRECT_OFFSET },
- { I960_INSN_STL_INDIRECT, I960BASE_INSN_STL_INDIRECT, I960BASE_SFMT_STL_INDIRECT },
- { I960_INSN_STL_INDIRECT_INDEX, I960BASE_INSN_STL_INDIRECT_INDEX, I960BASE_SFMT_STL_INDIRECT_INDEX },
- { I960_INSN_STL_DISP, I960BASE_INSN_STL_DISP, I960BASE_SFMT_STL_DISP },
- { I960_INSN_STL_INDIRECT_DISP, I960BASE_INSN_STL_INDIRECT_DISP, I960BASE_SFMT_STL_INDIRECT_DISP },
- { I960_INSN_STL_INDEX_DISP, I960BASE_INSN_STL_INDEX_DISP, I960BASE_SFMT_STL_INDEX_DISP },
- { I960_INSN_STL_INDIRECT_INDEX_DISP, I960BASE_INSN_STL_INDIRECT_INDEX_DISP, I960BASE_SFMT_STL_INDIRECT_INDEX_DISP },
- { I960_INSN_STT_OFFSET, I960BASE_INSN_STT_OFFSET, I960BASE_SFMT_STT_OFFSET },
- { I960_INSN_STT_INDIRECT_OFFSET, I960BASE_INSN_STT_INDIRECT_OFFSET, I960BASE_SFMT_STT_INDIRECT_OFFSET },
- { I960_INSN_STT_INDIRECT, I960BASE_INSN_STT_INDIRECT, I960BASE_SFMT_STT_INDIRECT },
- { I960_INSN_STT_INDIRECT_INDEX, I960BASE_INSN_STT_INDIRECT_INDEX, I960BASE_SFMT_STT_INDIRECT_INDEX },
- { I960_INSN_STT_DISP, I960BASE_INSN_STT_DISP, I960BASE_SFMT_STT_DISP },
- { I960_INSN_STT_INDIRECT_DISP, I960BASE_INSN_STT_INDIRECT_DISP, I960BASE_SFMT_STT_INDIRECT_DISP },
- { I960_INSN_STT_INDEX_DISP, I960BASE_INSN_STT_INDEX_DISP, I960BASE_SFMT_STT_INDEX_DISP },
- { I960_INSN_STT_INDIRECT_INDEX_DISP, I960BASE_INSN_STT_INDIRECT_INDEX_DISP, I960BASE_SFMT_STT_INDIRECT_INDEX_DISP },
- { I960_INSN_STQ_OFFSET, I960BASE_INSN_STQ_OFFSET, I960BASE_SFMT_STQ_OFFSET },
- { I960_INSN_STQ_INDIRECT_OFFSET, I960BASE_INSN_STQ_INDIRECT_OFFSET, I960BASE_SFMT_STQ_INDIRECT_OFFSET },
- { I960_INSN_STQ_INDIRECT, I960BASE_INSN_STQ_INDIRECT, I960BASE_SFMT_STQ_INDIRECT },
- { I960_INSN_STQ_INDIRECT_INDEX, I960BASE_INSN_STQ_INDIRECT_INDEX, I960BASE_SFMT_STQ_INDIRECT_INDEX },
- { I960_INSN_STQ_DISP, I960BASE_INSN_STQ_DISP, I960BASE_SFMT_STQ_DISP },
- { I960_INSN_STQ_INDIRECT_DISP, I960BASE_INSN_STQ_INDIRECT_DISP, I960BASE_SFMT_STQ_INDIRECT_DISP },
- { I960_INSN_STQ_INDEX_DISP, I960BASE_INSN_STQ_INDEX_DISP, I960BASE_SFMT_STQ_INDEX_DISP },
- { I960_INSN_STQ_INDIRECT_INDEX_DISP, I960BASE_INSN_STQ_INDIRECT_INDEX_DISP, I960BASE_SFMT_STQ_INDIRECT_INDEX_DISP },
- { I960_INSN_CMPOBE_REG, I960BASE_INSN_CMPOBE_REG, I960BASE_SFMT_CMPOBE_REG },
- { I960_INSN_CMPOBE_LIT, I960BASE_INSN_CMPOBE_LIT, I960BASE_SFMT_CMPOBE_LIT },
- { I960_INSN_CMPOBNE_REG, I960BASE_INSN_CMPOBNE_REG, I960BASE_SFMT_CMPOBE_REG },
- { I960_INSN_CMPOBNE_LIT, I960BASE_INSN_CMPOBNE_LIT, I960BASE_SFMT_CMPOBE_LIT },
- { I960_INSN_CMPOBL_REG, I960BASE_INSN_CMPOBL_REG, I960BASE_SFMT_CMPOBL_REG },
- { I960_INSN_CMPOBL_LIT, I960BASE_INSN_CMPOBL_LIT, I960BASE_SFMT_CMPOBL_LIT },
- { I960_INSN_CMPOBLE_REG, I960BASE_INSN_CMPOBLE_REG, I960BASE_SFMT_CMPOBL_REG },
- { I960_INSN_CMPOBLE_LIT, I960BASE_INSN_CMPOBLE_LIT, I960BASE_SFMT_CMPOBL_LIT },
- { I960_INSN_CMPOBG_REG, I960BASE_INSN_CMPOBG_REG, I960BASE_SFMT_CMPOBL_REG },
- { I960_INSN_CMPOBG_LIT, I960BASE_INSN_CMPOBG_LIT, I960BASE_SFMT_CMPOBL_LIT },
- { I960_INSN_CMPOBGE_REG, I960BASE_INSN_CMPOBGE_REG, I960BASE_SFMT_CMPOBL_REG },
- { I960_INSN_CMPOBGE_LIT, I960BASE_INSN_CMPOBGE_LIT, I960BASE_SFMT_CMPOBL_LIT },
- { I960_INSN_CMPIBE_REG, I960BASE_INSN_CMPIBE_REG, I960BASE_SFMT_CMPOBE_REG },
- { I960_INSN_CMPIBE_LIT, I960BASE_INSN_CMPIBE_LIT, I960BASE_SFMT_CMPOBE_LIT },
- { I960_INSN_CMPIBNE_REG, I960BASE_INSN_CMPIBNE_REG, I960BASE_SFMT_CMPOBE_REG },
- { I960_INSN_CMPIBNE_LIT, I960BASE_INSN_CMPIBNE_LIT, I960BASE_SFMT_CMPOBE_LIT },
- { I960_INSN_CMPIBL_REG, I960BASE_INSN_CMPIBL_REG, I960BASE_SFMT_CMPOBE_REG },
- { I960_INSN_CMPIBL_LIT, I960BASE_INSN_CMPIBL_LIT, I960BASE_SFMT_CMPOBE_LIT },
- { I960_INSN_CMPIBLE_REG, I960BASE_INSN_CMPIBLE_REG, I960BASE_SFMT_CMPOBE_REG },
- { I960_INSN_CMPIBLE_LIT, I960BASE_INSN_CMPIBLE_LIT, I960BASE_SFMT_CMPOBE_LIT },
- { I960_INSN_CMPIBG_REG, I960BASE_INSN_CMPIBG_REG, I960BASE_SFMT_CMPOBE_REG },
- { I960_INSN_CMPIBG_LIT, I960BASE_INSN_CMPIBG_LIT, I960BASE_SFMT_CMPOBE_LIT },
- { I960_INSN_CMPIBGE_REG, I960BASE_INSN_CMPIBGE_REG, I960BASE_SFMT_CMPOBE_REG },
- { I960_INSN_CMPIBGE_LIT, I960BASE_INSN_CMPIBGE_LIT, I960BASE_SFMT_CMPOBE_LIT },
- { I960_INSN_BBC_REG, I960BASE_INSN_BBC_REG, I960BASE_SFMT_BBC_REG },
- { I960_INSN_BBC_LIT, I960BASE_INSN_BBC_LIT, I960BASE_SFMT_BBC_LIT },
- { I960_INSN_BBS_REG, I960BASE_INSN_BBS_REG, I960BASE_SFMT_BBC_REG },
- { I960_INSN_BBS_LIT, I960BASE_INSN_BBS_LIT, I960BASE_SFMT_BBC_LIT },
- { I960_INSN_CMPI, I960BASE_INSN_CMPI, I960BASE_SFMT_CMPI },
- { I960_INSN_CMPI1, I960BASE_INSN_CMPI1, I960BASE_SFMT_CMPI1 },
- { I960_INSN_CMPI2, I960BASE_INSN_CMPI2, I960BASE_SFMT_CMPI2 },
- { I960_INSN_CMPI3, I960BASE_INSN_CMPI3, I960BASE_SFMT_CMPI3 },
- { I960_INSN_CMPO, I960BASE_INSN_CMPO, I960BASE_SFMT_CMPO },
- { I960_INSN_CMPO1, I960BASE_INSN_CMPO1, I960BASE_SFMT_CMPO1 },
- { I960_INSN_CMPO2, I960BASE_INSN_CMPO2, I960BASE_SFMT_CMPO2 },
- { I960_INSN_CMPO3, I960BASE_INSN_CMPO3, I960BASE_SFMT_CMPO3 },
- { I960_INSN_TESTNO_REG, I960BASE_INSN_TESTNO_REG, I960BASE_SFMT_TESTNO_REG },
- { I960_INSN_TESTG_REG, I960BASE_INSN_TESTG_REG, I960BASE_SFMT_TESTNO_REG },
- { I960_INSN_TESTE_REG, I960BASE_INSN_TESTE_REG, I960BASE_SFMT_TESTNO_REG },
- { I960_INSN_TESTGE_REG, I960BASE_INSN_TESTGE_REG, I960BASE_SFMT_TESTNO_REG },
- { I960_INSN_TESTL_REG, I960BASE_INSN_TESTL_REG, I960BASE_SFMT_TESTNO_REG },
- { I960_INSN_TESTNE_REG, I960BASE_INSN_TESTNE_REG, I960BASE_SFMT_TESTNO_REG },
- { I960_INSN_TESTLE_REG, I960BASE_INSN_TESTLE_REG, I960BASE_SFMT_TESTNO_REG },
- { I960_INSN_TESTO_REG, I960BASE_INSN_TESTO_REG, I960BASE_SFMT_TESTNO_REG },
- { I960_INSN_BNO, I960BASE_INSN_BNO, I960BASE_SFMT_BNO },
- { I960_INSN_BG, I960BASE_INSN_BG, I960BASE_SFMT_BNO },
- { I960_INSN_BE, I960BASE_INSN_BE, I960BASE_SFMT_BNO },
- { I960_INSN_BGE, I960BASE_INSN_BGE, I960BASE_SFMT_BNO },
- { I960_INSN_BL, I960BASE_INSN_BL, I960BASE_SFMT_BNO },
- { I960_INSN_BNE, I960BASE_INSN_BNE, I960BASE_SFMT_BNO },
- { I960_INSN_BLE, I960BASE_INSN_BLE, I960BASE_SFMT_BNO },
- { I960_INSN_BO, I960BASE_INSN_BO, I960BASE_SFMT_BNO },
- { I960_INSN_B, I960BASE_INSN_B, I960BASE_SFMT_B },
- { I960_INSN_BX_INDIRECT_OFFSET, I960BASE_INSN_BX_INDIRECT_OFFSET, I960BASE_SFMT_BX_INDIRECT_OFFSET },
- { I960_INSN_BX_INDIRECT, I960BASE_INSN_BX_INDIRECT, I960BASE_SFMT_BX_INDIRECT },
- { I960_INSN_BX_INDIRECT_INDEX, I960BASE_INSN_BX_INDIRECT_INDEX, I960BASE_SFMT_BX_INDIRECT_INDEX },
- { I960_INSN_BX_DISP, I960BASE_INSN_BX_DISP, I960BASE_SFMT_BX_DISP },
- { I960_INSN_BX_INDIRECT_DISP, I960BASE_INSN_BX_INDIRECT_DISP, I960BASE_SFMT_BX_INDIRECT_DISP },
- { I960_INSN_CALLX_DISP, I960BASE_INSN_CALLX_DISP, I960BASE_SFMT_CALLX_DISP },
- { I960_INSN_CALLX_INDIRECT, I960BASE_INSN_CALLX_INDIRECT, I960BASE_SFMT_CALLX_INDIRECT },
- { I960_INSN_CALLX_INDIRECT_OFFSET, I960BASE_INSN_CALLX_INDIRECT_OFFSET, I960BASE_SFMT_CALLX_INDIRECT_OFFSET },
- { I960_INSN_RET, I960BASE_INSN_RET, I960BASE_SFMT_RET },
- { I960_INSN_CALLS, I960BASE_INSN_CALLS, I960BASE_SFMT_CALLS },
- { I960_INSN_FMARK, I960BASE_INSN_FMARK, I960BASE_SFMT_FMARK },
- { I960_INSN_FLUSHREG, I960BASE_INSN_FLUSHREG, I960BASE_SFMT_FLUSHREG },
-};
-
-static const struct insn_sem i960base_insn_sem_invalid = {
- VIRTUAL_INSN_X_INVALID, I960BASE_INSN_X_INVALID, I960BASE_SFMT_EMPTY
-};
-
-/* Initialize an IDESC from the compile-time computable parts. */
-
-static INLINE void
-init_idesc (SIM_CPU *cpu, IDESC *id, const struct insn_sem *t)
-{
- const CGEN_INSN *insn_table = CGEN_CPU_INSN_TABLE (CPU_CPU_DESC (cpu))->init_entries;
-
- id->num = t->index;
- id->sfmt = t->sfmt;
- if ((int) t->type <= 0)
- id->idata = & cgen_virtual_insn_table[- (int) t->type];
- else
- id->idata = & insn_table[t->type];
- id->attrs = CGEN_INSN_ATTRS (id->idata);
- /* Oh my god, a magic number. */
- id->length = CGEN_INSN_BITSIZE (id->idata) / 8;
-
-#if WITH_PROFILE_MODEL_P
- id->timing = & MODEL_TIMING (CPU_MODEL (cpu)) [t->index];
- {
- SIM_DESC sd = CPU_STATE (cpu);
- SIM_ASSERT (t->index == id->timing->num);
- }
-#endif
-
- /* Semantic pointers are initialized elsewhere. */
-}
-
-/* Initialize the instruction descriptor table. */
-
-void
-i960base_init_idesc_table (SIM_CPU *cpu)
-{
- IDESC *id,*tabend;
- const struct insn_sem *t,*tend;
- int tabsize = I960BASE_INSN_MAX;
- IDESC *table = i960base_insn_data;
-
- memset (table, 0, tabsize * sizeof (IDESC));
-
- /* First set all entries to the `invalid insn'. */
- t = & i960base_insn_sem_invalid;
- for (id = table, tabend = table + tabsize; id < tabend; ++id)
- init_idesc (cpu, id, t);
-
- /* Now fill in the values for the chosen cpu. */
- for (t = i960base_insn_sem, tend = t + sizeof (i960base_insn_sem) / sizeof (*t);
- t != tend; ++t)
- {
- init_idesc (cpu, & table[t->index], t);
- }
-
- /* Link the IDESC table into the cpu. */
- CPU_IDESC (cpu) = table;
-}
-
-/* Given an instruction, return a pointer to its IDESC entry. */
-
-const IDESC *
-i960base_decode (SIM_CPU *current_cpu, IADDR pc,
- CGEN_INSN_INT base_insn,
- ARGBUF *abuf)
-{
- /* Result of decoder. */
- I960BASE_INSN_TYPE itype;
-
- {
- CGEN_INSN_INT insn = base_insn;
-
- {
- unsigned int val = (((insn >> 24) & (255 << 0)));
- switch (val)
- {
- case 8 : itype = I960BASE_INSN_B; goto extract_sfmt_b;
- case 10 : itype = I960BASE_INSN_RET; goto extract_sfmt_ret;
- case 16 : itype = I960BASE_INSN_BNO; goto extract_sfmt_bno;
- case 17 : itype = I960BASE_INSN_BG; goto extract_sfmt_bno;
- case 18 : itype = I960BASE_INSN_BE; goto extract_sfmt_bno;
- case 19 : itype = I960BASE_INSN_BGE; goto extract_sfmt_bno;
- case 20 : itype = I960BASE_INSN_BL; goto extract_sfmt_bno;
- case 21 : itype = I960BASE_INSN_BNE; goto extract_sfmt_bno;
- case 22 : itype = I960BASE_INSN_BLE; goto extract_sfmt_bno;
- case 23 : itype = I960BASE_INSN_BO; goto extract_sfmt_bno;
- case 32 : itype = I960BASE_INSN_TESTNO_REG; goto extract_sfmt_testno_reg;
- case 33 : itype = I960BASE_INSN_TESTG_REG; goto extract_sfmt_testno_reg;
- case 34 : itype = I960BASE_INSN_TESTE_REG; goto extract_sfmt_testno_reg;
- case 35 : itype = I960BASE_INSN_TESTGE_REG; goto extract_sfmt_testno_reg;
- case 36 : itype = I960BASE_INSN_TESTL_REG; goto extract_sfmt_testno_reg;
- case 37 : itype = I960BASE_INSN_TESTNE_REG; goto extract_sfmt_testno_reg;
- case 38 : itype = I960BASE_INSN_TESTLE_REG; goto extract_sfmt_testno_reg;
- case 39 : itype = I960BASE_INSN_TESTO_REG; goto extract_sfmt_testno_reg;
- case 48 :
- {
- unsigned int val = (((insn >> 11) & (1 << 2)) | ((insn >> 0) & (3 << 0)));
- switch (val)
- {
- case 0 : itype = I960BASE_INSN_BBC_REG; goto extract_sfmt_bbc_reg;
- case 4 : itype = I960BASE_INSN_BBC_LIT; goto extract_sfmt_bbc_lit;
- default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty;
- }
- }
- case 49 :
- {
- unsigned int val = (((insn >> 11) & (1 << 2)) | ((insn >> 0) & (3 << 0)));
- switch (val)
- {
- case 0 : itype = I960BASE_INSN_CMPOBG_REG; goto extract_sfmt_cmpobl_reg;
- case 4 : itype = I960BASE_INSN_CMPOBG_LIT; goto extract_sfmt_cmpobl_lit;
- default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty;
- }
- }
- case 50 :
- {
- unsigned int val = (((insn >> 11) & (1 << 2)) | ((insn >> 0) & (3 << 0)));
- switch (val)
- {
- case 0 : itype = I960BASE_INSN_CMPOBE_REG; goto extract_sfmt_cmpobe_reg;
- case 4 : itype = I960BASE_INSN_CMPOBE_LIT; goto extract_sfmt_cmpobe_lit;
- default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty;
- }
- }
- case 51 :
- {
- unsigned int val = (((insn >> 11) & (1 << 2)) | ((insn >> 0) & (3 << 0)));
- switch (val)
- {
- case 0 : itype = I960BASE_INSN_CMPOBGE_REG; goto extract_sfmt_cmpobl_reg;
- case 4 : itype = I960BASE_INSN_CMPOBGE_LIT; goto extract_sfmt_cmpobl_lit;
- default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty;
- }
- }
- case 52 :
- {
- unsigned int val = (((insn >> 11) & (1 << 2)) | ((insn >> 0) & (3 << 0)));
- switch (val)
- {
- case 0 : itype = I960BASE_INSN_CMPOBL_REG; goto extract_sfmt_cmpobl_reg;
- case 4 : itype = I960BASE_INSN_CMPOBL_LIT; goto extract_sfmt_cmpobl_lit;
- default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty;
- }
- }
- case 53 :
- {
- unsigned int val = (((insn >> 11) & (1 << 2)) | ((insn >> 0) & (3 << 0)));
- switch (val)
- {
- case 0 : itype = I960BASE_INSN_CMPOBNE_REG; goto extract_sfmt_cmpobe_reg;
- case 4 : itype = I960BASE_INSN_CMPOBNE_LIT; goto extract_sfmt_cmpobe_lit;
- default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty;
- }
- }
- case 54 :
- {
- unsigned int val = (((insn >> 11) & (1 << 2)) | ((insn >> 0) & (3 << 0)));
- switch (val)
- {
- case 0 : itype = I960BASE_INSN_CMPOBLE_REG; goto extract_sfmt_cmpobl_reg;
- case 4 : itype = I960BASE_INSN_CMPOBLE_LIT; goto extract_sfmt_cmpobl_lit;
- default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty;
- }
- }
- case 55 :
- {
- unsigned int val = (((insn >> 11) & (1 << 2)) | ((insn >> 0) & (3 << 0)));
- switch (val)
- {
- case 0 : itype = I960BASE_INSN_BBS_REG; goto extract_sfmt_bbc_reg;
- case 4 : itype = I960BASE_INSN_BBS_LIT; goto extract_sfmt_bbc_lit;
- default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty;
- }
- }
- case 57 :
- {
- unsigned int val = (((insn >> 11) & (1 << 2)) | ((insn >> 0) & (3 << 0)));
- switch (val)
- {
- case 0 : itype = I960BASE_INSN_CMPIBG_REG; goto extract_sfmt_cmpobe_reg;
- case 4 : itype = I960BASE_INSN_CMPIBG_LIT; goto extract_sfmt_cmpobe_lit;
- default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty;
- }
- }
- case 58 :
- {
- unsigned int val = (((insn >> 11) & (1 << 2)) | ((insn >> 0) & (3 << 0)));
- switch (val)
- {
- case 0 : itype = I960BASE_INSN_CMPIBE_REG; goto extract_sfmt_cmpobe_reg;
- case 4 : itype = I960BASE_INSN_CMPIBE_LIT; goto extract_sfmt_cmpobe_lit;
- default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty;
- }
- }
- case 59 :
- {
- unsigned int val = (((insn >> 11) & (1 << 2)) | ((insn >> 0) & (3 << 0)));
- switch (val)
- {
- case 0 : itype = I960BASE_INSN_CMPIBGE_REG; goto extract_sfmt_cmpobe_reg;
- case 4 : itype = I960BASE_INSN_CMPIBGE_LIT; goto extract_sfmt_cmpobe_lit;
- default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty;
- }
- }
- case 60 :
- {
- unsigned int val = (((insn >> 11) & (1 << 2)) | ((insn >> 0) & (3 << 0)));
- switch (val)
- {
- case 0 : itype = I960BASE_INSN_CMPIBL_REG; goto extract_sfmt_cmpobe_reg;
- case 4 : itype = I960BASE_INSN_CMPIBL_LIT; goto extract_sfmt_cmpobe_lit;
- default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty;
- }
- }
- case 61 :
- {
- unsigned int val = (((insn >> 11) & (1 << 2)) | ((insn >> 0) & (3 << 0)));
- switch (val)
- {
- case 0 : itype = I960BASE_INSN_CMPIBNE_REG; goto extract_sfmt_cmpobe_reg;
- case 4 : itype = I960BASE_INSN_CMPIBNE_LIT; goto extract_sfmt_cmpobe_lit;
- default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty;
- }
- }
- case 62 :
- {
- unsigned int val = (((insn >> 11) & (1 << 2)) | ((insn >> 0) & (3 << 0)));
- switch (val)
- {
- case 0 : itype = I960BASE_INSN_CMPIBLE_REG; goto extract_sfmt_cmpobe_reg;
- case 4 : itype = I960BASE_INSN_CMPIBLE_LIT; goto extract_sfmt_cmpobe_lit;
- default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty;
- }
- }
- case 88 :
- {
- unsigned int val = (((insn >> 10) & (15 << 0)));
- switch (val)
- {
- case 0 :
- {
- unsigned int val = (((insn >> 6) & (15 << 0)));
- switch (val)
- {
- case 0 : itype = I960BASE_INSN_NOTBIT; goto extract_sfmt_notbit;
- case 2 : itype = I960BASE_INSN_AND; goto extract_sfmt_mulo;
- case 4 : itype = I960BASE_INSN_ANDNOT; goto extract_sfmt_mulo;
- case 6 : itype = I960BASE_INSN_SETBIT; goto extract_sfmt_notbit;
- case 8 : itype = I960BASE_INSN_NOTAND; goto extract_sfmt_mulo;
- case 12 : itype = I960BASE_INSN_XOR; goto extract_sfmt_mulo;
- case 14 : itype = I960BASE_INSN_OR; goto extract_sfmt_mulo;
- default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty;
- }
- }
- case 1 :
- {
- unsigned int val = (((insn >> 6) & (15 << 0)));
- switch (val)
- {
- case 0 : itype = I960BASE_INSN_NOR; goto extract_sfmt_mulo;
- case 2 : itype = I960BASE_INSN_XNOR; goto extract_sfmt_mulo;
- case 4 : itype = I960BASE_INSN_NOT; goto extract_sfmt_not;
- case 6 : itype = I960BASE_INSN_ORNOT; goto extract_sfmt_mulo;
- case 8 : itype = I960BASE_INSN_CLRBIT; goto extract_sfmt_notbit;
- default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty;
- }
- }
- case 2 :
- {
- unsigned int val = (((insn >> 6) & (15 << 0)));
- switch (val)
- {
- case 0 : itype = I960BASE_INSN_NOTBIT1; goto extract_sfmt_notbit1;
- case 2 : itype = I960BASE_INSN_AND1; goto extract_sfmt_mulo1;
- case 4 : itype = I960BASE_INSN_ANDNOT1; goto extract_sfmt_mulo1;
- case 6 : itype = I960BASE_INSN_SETBIT1; goto extract_sfmt_notbit1;
- case 8 : itype = I960BASE_INSN_NOTAND1; goto extract_sfmt_mulo1;
- case 12 : itype = I960BASE_INSN_XOR1; goto extract_sfmt_mulo1;
- case 14 : itype = I960BASE_INSN_OR1; goto extract_sfmt_mulo1;
- default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty;
- }
- }
- case 3 :
- {
- unsigned int val = (((insn >> 6) & (15 << 0)));
- switch (val)
- {
- case 0 : itype = I960BASE_INSN_NOR1; goto extract_sfmt_mulo1;
- case 2 : itype = I960BASE_INSN_XNOR1; goto extract_sfmt_mulo1;
- case 4 : itype = I960BASE_INSN_NOT1; goto extract_sfmt_not1;
- case 6 : itype = I960BASE_INSN_ORNOT1; goto extract_sfmt_mulo1;
- case 8 : itype = I960BASE_INSN_CLRBIT1; goto extract_sfmt_notbit1;
- default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty;
- }
- }
- case 4 :
- {
- unsigned int val = (((insn >> 6) & (15 << 0)));
- switch (val)
- {
- case 0 : itype = I960BASE_INSN_NOTBIT2; goto extract_sfmt_notbit2;
- case 2 : itype = I960BASE_INSN_AND2; goto extract_sfmt_mulo2;
- case 4 : itype = I960BASE_INSN_ANDNOT2; goto extract_sfmt_mulo2;
- case 6 : itype = I960BASE_INSN_SETBIT2; goto extract_sfmt_notbit2;
- case 8 : itype = I960BASE_INSN_NOTAND2; goto extract_sfmt_mulo2;
- case 12 : itype = I960BASE_INSN_XOR2; goto extract_sfmt_mulo2;
- case 14 : itype = I960BASE_INSN_OR2; goto extract_sfmt_mulo2;
- default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty;
- }
- }
- case 5 :
- {
- unsigned int val = (((insn >> 6) & (15 << 0)));
- switch (val)
- {
- case 0 : itype = I960BASE_INSN_NOR2; goto extract_sfmt_mulo2;
- case 2 : itype = I960BASE_INSN_XNOR2; goto extract_sfmt_mulo2;
- case 4 : itype = I960BASE_INSN_NOT2; goto extract_sfmt_not;
- case 6 : itype = I960BASE_INSN_ORNOT2; goto extract_sfmt_mulo2;
- case 8 : itype = I960BASE_INSN_CLRBIT2; goto extract_sfmt_notbit2;
- default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty;
- }
- }
- case 6 :
- {
- unsigned int val = (((insn >> 6) & (15 << 0)));
- switch (val)
- {
- case 0 : itype = I960BASE_INSN_NOTBIT3; goto extract_sfmt_notbit3;
- case 2 : itype = I960BASE_INSN_AND3; goto extract_sfmt_mulo3;
- case 4 : itype = I960BASE_INSN_ANDNOT3; goto extract_sfmt_mulo3;
- case 6 : itype = I960BASE_INSN_SETBIT3; goto extract_sfmt_notbit3;
- case 8 : itype = I960BASE_INSN_NOTAND3; goto extract_sfmt_mulo3;
- case 12 : itype = I960BASE_INSN_XOR3; goto extract_sfmt_mulo3;
- case 14 : itype = I960BASE_INSN_OR3; goto extract_sfmt_mulo3;
- default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty;
- }
- }
- case 7 :
- {
- unsigned int val = (((insn >> 6) & (15 << 0)));
- switch (val)
- {
- case 0 : itype = I960BASE_INSN_NOR3; goto extract_sfmt_mulo3;
- case 2 : itype = I960BASE_INSN_XNOR3; goto extract_sfmt_mulo3;
- case 4 : itype = I960BASE_INSN_NOT3; goto extract_sfmt_not1;
- case 6 : itype = I960BASE_INSN_ORNOT3; goto extract_sfmt_mulo3;
- case 8 : itype = I960BASE_INSN_CLRBIT3; goto extract_sfmt_notbit3;
- default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty;
- }
- }
- default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty;
- }
- }
- case 89 :
- {
- unsigned int val = (((insn >> 10) & (15 << 0)));
- switch (val)
- {
- case 0 :
- {
- unsigned int val = (((insn >> 6) & (15 << 0)));
- switch (val)
- {
- case 0 : itype = I960BASE_INSN_ADDO; goto extract_sfmt_mulo;
- case 4 : itype = I960BASE_INSN_SUBO; goto extract_sfmt_mulo;
- default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty;
- }
- }
- case 1 :
- {
- unsigned int val = (((insn >> 6) & (15 << 0)));
- switch (val)
- {
- case 0 : itype = I960BASE_INSN_SHRO; goto extract_sfmt_shlo;
- case 6 : itype = I960BASE_INSN_SHRI; goto extract_sfmt_shlo;
- case 8 : itype = I960BASE_INSN_SHLO; goto extract_sfmt_shlo;
- case 12 : itype = I960BASE_INSN_SHLI; goto extract_sfmt_shlo;
- default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty;
- }
- }
- case 2 :
- {
- unsigned int val = (((insn >> 6) & (15 << 0)));
- switch (val)
- {
- case 0 : itype = I960BASE_INSN_ADDO1; goto extract_sfmt_mulo1;
- case 4 : itype = I960BASE_INSN_SUBO1; goto extract_sfmt_mulo1;
- default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty;
- }
- }
- case 3 :
- {
- unsigned int val = (((insn >> 6) & (15 << 0)));
- switch (val)
- {
- case 0 : itype = I960BASE_INSN_SHRO1; goto extract_sfmt_shlo1;
- case 6 : itype = I960BASE_INSN_SHRI1; goto extract_sfmt_shlo1;
- case 8 : itype = I960BASE_INSN_SHLO1; goto extract_sfmt_shlo1;
- case 12 : itype = I960BASE_INSN_SHLI1; goto extract_sfmt_shlo1;
- default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty;
- }
- }
- case 4 :
- {
- unsigned int val = (((insn >> 6) & (15 << 0)));
- switch (val)
- {
- case 0 : itype = I960BASE_INSN_ADDO2; goto extract_sfmt_mulo2;
- case 4 : itype = I960BASE_INSN_SUBO2; goto extract_sfmt_mulo2;
- default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty;
- }
- }
- case 5 :
- {
- unsigned int val = (((insn >> 6) & (15 << 0)));
- switch (val)
- {
- case 0 : itype = I960BASE_INSN_SHRO2; goto extract_sfmt_shlo2;
- case 6 : itype = I960BASE_INSN_SHRI2; goto extract_sfmt_shlo2;
- case 8 : itype = I960BASE_INSN_SHLO2; goto extract_sfmt_shlo2;
- case 12 : itype = I960BASE_INSN_SHLI2; goto extract_sfmt_shlo2;
- default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty;
- }
- }
- case 6 :
- {
- unsigned int val = (((insn >> 6) & (15 << 0)));
- switch (val)
- {
- case 0 : itype = I960BASE_INSN_ADDO3; goto extract_sfmt_mulo3;
- case 4 : itype = I960BASE_INSN_SUBO3; goto extract_sfmt_mulo3;
- default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty;
- }
- }
- case 7 :
- {
- unsigned int val = (((insn >> 6) & (15 << 0)));
- switch (val)
- {
- case 0 : itype = I960BASE_INSN_SHRO3; goto extract_sfmt_shlo3;
- case 6 : itype = I960BASE_INSN_SHRI3; goto extract_sfmt_shlo3;
- case 8 : itype = I960BASE_INSN_SHLO3; goto extract_sfmt_shlo3;
- case 12 : itype = I960BASE_INSN_SHLI3; goto extract_sfmt_shlo3;
- default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty;
- }
- }
- default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty;
- }
- }
- case 90 :
- {
- unsigned int val = (((insn >> 10) & (15 << 0)));
- switch (val)
- {
- case 8 :
- {
- unsigned int val = (((insn >> 6) & (15 << 0)));
- switch (val)
- {
- case 0 : itype = I960BASE_INSN_CMPO; goto extract_sfmt_cmpo;
- case 2 : itype = I960BASE_INSN_CMPI; goto extract_sfmt_cmpi;
- default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty;
- }
- }
- case 10 :
- {
- unsigned int val = (((insn >> 6) & (15 << 0)));
- switch (val)
- {
- case 0 : itype = I960BASE_INSN_CMPO1; goto extract_sfmt_cmpo1;
- case 2 : itype = I960BASE_INSN_CMPI1; goto extract_sfmt_cmpi1;
- default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty;
- }
- }
- case 12 :
- {
- unsigned int val = (((insn >> 6) & (15 << 0)));
- switch (val)
- {
- case 0 : itype = I960BASE_INSN_CMPO2; goto extract_sfmt_cmpo2;
- case 2 : itype = I960BASE_INSN_CMPI2; goto extract_sfmt_cmpi2;
- default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty;
- }
- }
- case 14 :
- {
- unsigned int val = (((insn >> 6) & (15 << 0)));
- switch (val)
- {
- case 0 : itype = I960BASE_INSN_CMPO3; goto extract_sfmt_cmpo3;
- case 2 : itype = I960BASE_INSN_CMPI3; goto extract_sfmt_cmpi3;
- default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty;
- }
- }
- default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty;
- }
- }
- case 92 :
- {
- unsigned int val = (((insn >> 10) & (15 << 0)));
- switch (val)
- {
- case 5 : itype = I960BASE_INSN_MOV; goto extract_sfmt_not;
- case 7 : itype = I960BASE_INSN_MOV1; goto extract_sfmt_not1;
- default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty;
- }
- }
- case 93 :
- {
- unsigned int val = (((insn >> 10) & (15 << 0)));
- switch (val)
- {
- case 5 : itype = I960BASE_INSN_MOVL; goto extract_sfmt_movl;
- case 7 : itype = I960BASE_INSN_MOVL1; goto extract_sfmt_movl1;
- default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty;
- }
- }
- case 94 :
- {
- unsigned int val = (((insn >> 10) & (15 << 0)));
- switch (val)
- {
- case 5 : itype = I960BASE_INSN_MOVT; goto extract_sfmt_movt;
- case 7 : itype = I960BASE_INSN_MOVT1; goto extract_sfmt_movt1;
- default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty;
- }
- }
- case 95 :
- {
- unsigned int val = (((insn >> 10) & (15 << 0)));
- switch (val)
- {
- case 5 : itype = I960BASE_INSN_MOVQ; goto extract_sfmt_movq;
- case 7 : itype = I960BASE_INSN_MOVQ1; goto extract_sfmt_movq1;
- default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty;
- }
- }
- case 100 : itype = I960BASE_INSN_MODAC; goto extract_sfmt_modpc;
- case 101 : itype = I960BASE_INSN_MODPC; goto extract_sfmt_modpc;
- case 102 :
- {
- unsigned int val = (((insn >> 10) & (15 << 0)));
- switch (val)
- {
- case 12 : itype = I960BASE_INSN_CALLS; goto extract_sfmt_calls;
- case 15 :
- {
- unsigned int val = (((insn >> 6) & (15 << 0)));
- switch (val)
- {
- case 8 : itype = I960BASE_INSN_FMARK; goto extract_sfmt_fmark;
- case 10 : itype = I960BASE_INSN_FLUSHREG; goto extract_sfmt_flushreg;
- default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty;
- }
- }
- default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty;
- }
- }
- case 103 :
- {
- unsigned int val = (((insn >> 10) & (15 << 0)));
- switch (val)
- {
- case 0 : itype = I960BASE_INSN_EMUL; goto extract_sfmt_emul;
- case 2 : itype = I960BASE_INSN_EMUL1; goto extract_sfmt_emul1;
- case 4 : itype = I960BASE_INSN_EMUL2; goto extract_sfmt_emul2;
- case 6 : itype = I960BASE_INSN_EMUL3; goto extract_sfmt_emul3;
- default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty;
- }
- }
- case 112 :
- {
- unsigned int val = (((insn >> 10) & (15 << 0)));
- switch (val)
- {
- case 0 : itype = I960BASE_INSN_MULO; goto extract_sfmt_mulo;
- case 1 :
- {
- unsigned int val = (((insn >> 6) & (15 << 0)));
- switch (val)
- {
- case 0 : itype = I960BASE_INSN_REMO; goto extract_sfmt_mulo;
- case 6 : itype = I960BASE_INSN_DIVO; goto extract_sfmt_mulo;
- default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty;
- }
- }
- case 2 : itype = I960BASE_INSN_MULO1; goto extract_sfmt_mulo1;
- case 3 :
- {
- unsigned int val = (((insn >> 6) & (15 << 0)));
- switch (val)
- {
- case 0 : itype = I960BASE_INSN_REMO1; goto extract_sfmt_mulo1;
- case 6 : itype = I960BASE_INSN_DIVO1; goto extract_sfmt_mulo1;
- default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty;
- }
- }
- case 4 : itype = I960BASE_INSN_MULO2; goto extract_sfmt_mulo2;
- case 5 :
- {
- unsigned int val = (((insn >> 6) & (15 << 0)));
- switch (val)
- {
- case 0 : itype = I960BASE_INSN_REMO2; goto extract_sfmt_mulo2;
- case 6 : itype = I960BASE_INSN_DIVO2; goto extract_sfmt_mulo2;
- default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty;
- }
- }
- case 6 : itype = I960BASE_INSN_MULO3; goto extract_sfmt_mulo3;
- case 7 :
- {
- unsigned int val = (((insn >> 6) & (15 << 0)));
- switch (val)
- {
- case 0 : itype = I960BASE_INSN_REMO3; goto extract_sfmt_mulo3;
- case 6 : itype = I960BASE_INSN_DIVO3; goto extract_sfmt_mulo3;
- default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty;
- }
- }
- default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty;
- }
- }
- case 116 :
- {
- unsigned int val = (((insn >> 10) & (15 << 0)));
- switch (val)
- {
- case 1 :
- {
- unsigned int val = (((insn >> 6) & (15 << 0)));
- switch (val)
- {
- case 0 : itype = I960BASE_INSN_REMI; goto extract_sfmt_mulo;
- case 6 : itype = I960BASE_INSN_DIVI; goto extract_sfmt_mulo;
- default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty;
- }
- }
- case 3 :
- {
- unsigned int val = (((insn >> 6) & (15 << 0)));
- switch (val)
- {
- case 0 : itype = I960BASE_INSN_REMI1; goto extract_sfmt_mulo1;
- case 6 : itype = I960BASE_INSN_DIVI1; goto extract_sfmt_mulo1;
- default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty;
- }
- }
- case 5 :
- {
- unsigned int val = (((insn >> 6) & (15 << 0)));
- switch (val)
- {
- case 0 : itype = I960BASE_INSN_REMI2; goto extract_sfmt_mulo2;
- case 6 : itype = I960BASE_INSN_DIVI2; goto extract_sfmt_mulo2;
- default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty;
- }
- }
- case 7 :
- {
- unsigned int val = (((insn >> 6) & (15 << 0)));
- switch (val)
- {
- case 0 : itype = I960BASE_INSN_REMI3; goto extract_sfmt_mulo3;
- case 6 : itype = I960BASE_INSN_DIVI3; goto extract_sfmt_mulo3;
- default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty;
- }
- }
- default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty;
- }
- }
- case 128 :
- {
- unsigned int val = (((insn >> 10) & (15 << 0)));
- switch (val)
- {
- case 0 : /* fall through */
- case 1 : /* fall through */
- case 2 : /* fall through */
- case 3 : itype = I960BASE_INSN_LDOB_OFFSET; goto extract_sfmt_ld_offset;
- case 4 : itype = I960BASE_INSN_LDOB_INDIRECT; goto extract_sfmt_ld_indirect;
- case 7 : itype = I960BASE_INSN_LDOB_INDIRECT_INDEX; goto extract_sfmt_ld_indirect_index;
- case 8 : /* fall through */
- case 9 : /* fall through */
- case 10 : /* fall through */
- case 11 : itype = I960BASE_INSN_LDOB_INDIRECT_OFFSET; goto extract_sfmt_ld_indirect_offset;
- case 12 : itype = I960BASE_INSN_LDOB_DISP; goto extract_sfmt_ld_disp;
- case 13 : itype = I960BASE_INSN_LDOB_INDIRECT_DISP; goto extract_sfmt_ld_indirect_disp;
- case 14 : itype = I960BASE_INSN_LDOB_INDEX_DISP; goto extract_sfmt_ld_index_disp;
- case 15 : itype = I960BASE_INSN_LDOB_INDIRECT_INDEX_DISP; goto extract_sfmt_ld_indirect_index_disp;
- default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty;
- }
- }
- case 130 :
- {
- unsigned int val = (((insn >> 10) & (15 << 0)));
- switch (val)
- {
- case 0 : /* fall through */
- case 1 : /* fall through */
- case 2 : /* fall through */
- case 3 : itype = I960BASE_INSN_STOB_OFFSET; goto extract_sfmt_st_offset;
- case 4 : itype = I960BASE_INSN_STOB_INDIRECT; goto extract_sfmt_st_indirect;
- case 7 : itype = I960BASE_INSN_STOB_INDIRECT_INDEX; goto extract_sfmt_st_indirect_index;
- case 8 : /* fall through */
- case 9 : /* fall through */
- case 10 : /* fall through */
- case 11 : itype = I960BASE_INSN_STOB_INDIRECT_OFFSET; goto extract_sfmt_st_indirect_offset;
- case 12 : itype = I960BASE_INSN_STOB_DISP; goto extract_sfmt_st_disp;
- case 13 : itype = I960BASE_INSN_STOB_INDIRECT_DISP; goto extract_sfmt_st_indirect_disp;
- case 14 : itype = I960BASE_INSN_STOB_INDEX_DISP; goto extract_sfmt_st_index_disp;
- case 15 : itype = I960BASE_INSN_STOB_INDIRECT_INDEX_DISP; goto extract_sfmt_st_indirect_index_disp;
- default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty;
- }
- }
- case 132 :
- {
- unsigned int val = (((insn >> 10) & (15 << 0)));
- switch (val)
- {
- case 4 : itype = I960BASE_INSN_BX_INDIRECT; goto extract_sfmt_bx_indirect;
- case 7 : itype = I960BASE_INSN_BX_INDIRECT_INDEX; goto extract_sfmt_bx_indirect_index;
- case 8 : /* fall through */
- case 9 : /* fall through */
- case 10 : /* fall through */
- case 11 : itype = I960BASE_INSN_BX_INDIRECT_OFFSET; goto extract_sfmt_bx_indirect_offset;
- case 12 : itype = I960BASE_INSN_BX_DISP; goto extract_sfmt_bx_disp;
- case 13 : itype = I960BASE_INSN_BX_INDIRECT_DISP; goto extract_sfmt_bx_indirect_disp;
- default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty;
- }
- }
- case 134 :
- {
- unsigned int val = (((insn >> 10) & (15 << 0)));
- switch (val)
- {
- case 4 : itype = I960BASE_INSN_CALLX_INDIRECT; goto extract_sfmt_callx_indirect;
- case 8 : /* fall through */
- case 9 : /* fall through */
- case 10 : /* fall through */
- case 11 : itype = I960BASE_INSN_CALLX_INDIRECT_OFFSET; goto extract_sfmt_callx_indirect_offset;
- case 12 : itype = I960BASE_INSN_CALLX_DISP; goto extract_sfmt_callx_disp;
- default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty;
- }
- }
- case 136 :
- {
- unsigned int val = (((insn >> 10) & (15 << 0)));
- switch (val)
- {
- case 0 : /* fall through */
- case 1 : /* fall through */
- case 2 : /* fall through */
- case 3 : itype = I960BASE_INSN_LDOS_OFFSET; goto extract_sfmt_ld_offset;
- case 4 : itype = I960BASE_INSN_LDOS_INDIRECT; goto extract_sfmt_ld_indirect;
- case 7 : itype = I960BASE_INSN_LDOS_INDIRECT_INDEX; goto extract_sfmt_ld_indirect_index;
- case 8 : /* fall through */
- case 9 : /* fall through */
- case 10 : /* fall through */
- case 11 : itype = I960BASE_INSN_LDOS_INDIRECT_OFFSET; goto extract_sfmt_ld_indirect_offset;
- case 12 : itype = I960BASE_INSN_LDOS_DISP; goto extract_sfmt_ld_disp;
- case 13 : itype = I960BASE_INSN_LDOS_INDIRECT_DISP; goto extract_sfmt_ld_indirect_disp;
- case 14 : itype = I960BASE_INSN_LDOS_INDEX_DISP; goto extract_sfmt_ld_index_disp;
- case 15 : itype = I960BASE_INSN_LDOS_INDIRECT_INDEX_DISP; goto extract_sfmt_ld_indirect_index_disp;
- default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty;
- }
- }
- case 138 :
- {
- unsigned int val = (((insn >> 10) & (15 << 0)));
- switch (val)
- {
- case 0 : /* fall through */
- case 1 : /* fall through */
- case 2 : /* fall through */
- case 3 : itype = I960BASE_INSN_STOS_OFFSET; goto extract_sfmt_st_offset;
- case 4 : itype = I960BASE_INSN_STOS_INDIRECT; goto extract_sfmt_st_indirect;
- case 7 : itype = I960BASE_INSN_STOS_INDIRECT_INDEX; goto extract_sfmt_st_indirect_index;
- case 8 : /* fall through */
- case 9 : /* fall through */
- case 10 : /* fall through */
- case 11 : itype = I960BASE_INSN_STOS_INDIRECT_OFFSET; goto extract_sfmt_st_indirect_offset;
- case 12 : itype = I960BASE_INSN_STOS_DISP; goto extract_sfmt_st_disp;
- case 13 : itype = I960BASE_INSN_STOS_INDIRECT_DISP; goto extract_sfmt_st_indirect_disp;
- case 14 : itype = I960BASE_INSN_STOS_INDEX_DISP; goto extract_sfmt_st_index_disp;
- case 15 : itype = I960BASE_INSN_STOS_INDIRECT_INDEX_DISP; goto extract_sfmt_st_indirect_index_disp;
- default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty;
- }
- }
- case 140 :
- {
- unsigned int val = (((insn >> 10) & (15 << 0)));
- switch (val)
- {
- case 0 : /* fall through */
- case 1 : /* fall through */
- case 2 : /* fall through */
- case 3 : itype = I960BASE_INSN_LDA_OFFSET; goto extract_sfmt_lda_offset;
- case 4 : itype = I960BASE_INSN_LDA_INDIRECT; goto extract_sfmt_lda_indirect;
- case 7 : itype = I960BASE_INSN_LDA_INDIRECT_INDEX; goto extract_sfmt_lda_indirect_index;
- case 8 : /* fall through */
- case 9 : /* fall through */
- case 10 : /* fall through */
- case 11 : itype = I960BASE_INSN_LDA_INDIRECT_OFFSET; goto extract_sfmt_lda_indirect_offset;
- case 12 : itype = I960BASE_INSN_LDA_DISP; goto extract_sfmt_lda_disp;
- case 13 : itype = I960BASE_INSN_LDA_INDIRECT_DISP; goto extract_sfmt_lda_indirect_disp;
- case 14 : itype = I960BASE_INSN_LDA_INDEX_DISP; goto extract_sfmt_lda_index_disp;
- case 15 : itype = I960BASE_INSN_LDA_INDIRECT_INDEX_DISP; goto extract_sfmt_lda_indirect_index_disp;
- default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty;
- }
- }
- case 144 :
- {
- unsigned int val = (((insn >> 10) & (15 << 0)));
- switch (val)
- {
- case 0 : /* fall through */
- case 1 : /* fall through */
- case 2 : /* fall through */
- case 3 : itype = I960BASE_INSN_LD_OFFSET; goto extract_sfmt_ld_offset;
- case 4 : itype = I960BASE_INSN_LD_INDIRECT; goto extract_sfmt_ld_indirect;
- case 7 : itype = I960BASE_INSN_LD_INDIRECT_INDEX; goto extract_sfmt_ld_indirect_index;
- case 8 : /* fall through */
- case 9 : /* fall through */
- case 10 : /* fall through */
- case 11 : itype = I960BASE_INSN_LD_INDIRECT_OFFSET; goto extract_sfmt_ld_indirect_offset;
- case 12 : itype = I960BASE_INSN_LD_DISP; goto extract_sfmt_ld_disp;
- case 13 : itype = I960BASE_INSN_LD_INDIRECT_DISP; goto extract_sfmt_ld_indirect_disp;
- case 14 : itype = I960BASE_INSN_LD_INDEX_DISP; goto extract_sfmt_ld_index_disp;
- case 15 : itype = I960BASE_INSN_LD_INDIRECT_INDEX_DISP; goto extract_sfmt_ld_indirect_index_disp;
- default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty;
- }
- }
- case 146 :
- {
- unsigned int val = (((insn >> 10) & (15 << 0)));
- switch (val)
- {
- case 0 : /* fall through */
- case 1 : /* fall through */
- case 2 : /* fall through */
- case 3 : itype = I960BASE_INSN_ST_OFFSET; goto extract_sfmt_st_offset;
- case 4 : itype = I960BASE_INSN_ST_INDIRECT; goto extract_sfmt_st_indirect;
- case 7 : itype = I960BASE_INSN_ST_INDIRECT_INDEX; goto extract_sfmt_st_indirect_index;
- case 8 : /* fall through */
- case 9 : /* fall through */
- case 10 : /* fall through */
- case 11 : itype = I960BASE_INSN_ST_INDIRECT_OFFSET; goto extract_sfmt_st_indirect_offset;
- case 12 : itype = I960BASE_INSN_ST_DISP; goto extract_sfmt_st_disp;
- case 13 : itype = I960BASE_INSN_ST_INDIRECT_DISP; goto extract_sfmt_st_indirect_disp;
- case 14 : itype = I960BASE_INSN_ST_INDEX_DISP; goto extract_sfmt_st_index_disp;
- case 15 : itype = I960BASE_INSN_ST_INDIRECT_INDEX_DISP; goto extract_sfmt_st_indirect_index_disp;
- default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty;
- }
- }
- case 152 :
- {
- unsigned int val = (((insn >> 10) & (15 << 0)));
- switch (val)
- {
- case 0 : /* fall through */
- case 1 : /* fall through */
- case 2 : /* fall through */
- case 3 : itype = I960BASE_INSN_LDL_OFFSET; goto extract_sfmt_ldl_offset;
- case 4 : itype = I960BASE_INSN_LDL_INDIRECT; goto extract_sfmt_ldl_indirect;
- case 7 : itype = I960BASE_INSN_LDL_INDIRECT_INDEX; goto extract_sfmt_ldl_indirect_index;
- case 8 : /* fall through */
- case 9 : /* fall through */
- case 10 : /* fall through */
- case 11 : itype = I960BASE_INSN_LDL_INDIRECT_OFFSET; goto extract_sfmt_ldl_indirect_offset;
- case 12 : itype = I960BASE_INSN_LDL_DISP; goto extract_sfmt_ldl_disp;
- case 13 : itype = I960BASE_INSN_LDL_INDIRECT_DISP; goto extract_sfmt_ldl_indirect_disp;
- case 14 : itype = I960BASE_INSN_LDL_INDEX_DISP; goto extract_sfmt_ldl_index_disp;
- case 15 : itype = I960BASE_INSN_LDL_INDIRECT_INDEX_DISP; goto extract_sfmt_ldl_indirect_index_disp;
- default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty;
- }
- }
- case 154 :
- {
- unsigned int val = (((insn >> 10) & (15 << 0)));
- switch (val)
- {
- case 0 : /* fall through */
- case 1 : /* fall through */
- case 2 : /* fall through */
- case 3 : itype = I960BASE_INSN_STL_OFFSET; goto extract_sfmt_stl_offset;
- case 4 : itype = I960BASE_INSN_STL_INDIRECT; goto extract_sfmt_stl_indirect;
- case 7 : itype = I960BASE_INSN_STL_INDIRECT_INDEX; goto extract_sfmt_stl_indirect_index;
- case 8 : /* fall through */
- case 9 : /* fall through */
- case 10 : /* fall through */
- case 11 : itype = I960BASE_INSN_STL_INDIRECT_OFFSET; goto extract_sfmt_stl_indirect_offset;
- case 12 : itype = I960BASE_INSN_STL_DISP; goto extract_sfmt_stl_disp;
- case 13 : itype = I960BASE_INSN_STL_INDIRECT_DISP; goto extract_sfmt_stl_indirect_disp;
- case 14 : itype = I960BASE_INSN_STL_INDEX_DISP; goto extract_sfmt_stl_index_disp;
- case 15 : itype = I960BASE_INSN_STL_INDIRECT_INDEX_DISP; goto extract_sfmt_stl_indirect_index_disp;
- default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty;
- }
- }
- case 160 :
- {
- unsigned int val = (((insn >> 10) & (15 << 0)));
- switch (val)
- {
- case 0 : /* fall through */
- case 1 : /* fall through */
- case 2 : /* fall through */
- case 3 : itype = I960BASE_INSN_LDT_OFFSET; goto extract_sfmt_ldt_offset;
- case 4 : itype = I960BASE_INSN_LDT_INDIRECT; goto extract_sfmt_ldt_indirect;
- case 7 : itype = I960BASE_INSN_LDT_INDIRECT_INDEX; goto extract_sfmt_ldt_indirect_index;
- case 8 : /* fall through */
- case 9 : /* fall through */
- case 10 : /* fall through */
- case 11 : itype = I960BASE_INSN_LDT_INDIRECT_OFFSET; goto extract_sfmt_ldt_indirect_offset;
- case 12 : itype = I960BASE_INSN_LDT_DISP; goto extract_sfmt_ldt_disp;
- case 13 : itype = I960BASE_INSN_LDT_INDIRECT_DISP; goto extract_sfmt_ldt_indirect_disp;
- case 14 : itype = I960BASE_INSN_LDT_INDEX_DISP; goto extract_sfmt_ldt_index_disp;
- case 15 : itype = I960BASE_INSN_LDT_INDIRECT_INDEX_DISP; goto extract_sfmt_ldt_indirect_index_disp;
- default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty;
- }
- }
- case 162 :
- {
- unsigned int val = (((insn >> 10) & (15 << 0)));
- switch (val)
- {
- case 0 : /* fall through */
- case 1 : /* fall through */
- case 2 : /* fall through */
- case 3 : itype = I960BASE_INSN_STT_OFFSET; goto extract_sfmt_stt_offset;
- case 4 : itype = I960BASE_INSN_STT_INDIRECT; goto extract_sfmt_stt_indirect;
- case 7 : itype = I960BASE_INSN_STT_INDIRECT_INDEX; goto extract_sfmt_stt_indirect_index;
- case 8 : /* fall through */
- case 9 : /* fall through */
- case 10 : /* fall through */
- case 11 : itype = I960BASE_INSN_STT_INDIRECT_OFFSET; goto extract_sfmt_stt_indirect_offset;
- case 12 : itype = I960BASE_INSN_STT_DISP; goto extract_sfmt_stt_disp;
- case 13 : itype = I960BASE_INSN_STT_INDIRECT_DISP; goto extract_sfmt_stt_indirect_disp;
- case 14 : itype = I960BASE_INSN_STT_INDEX_DISP; goto extract_sfmt_stt_index_disp;
- case 15 : itype = I960BASE_INSN_STT_INDIRECT_INDEX_DISP; goto extract_sfmt_stt_indirect_index_disp;
- default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty;
- }
- }
- case 176 :
- {
- unsigned int val = (((insn >> 10) & (15 << 0)));
- switch (val)
- {
- case 0 : /* fall through */
- case 1 : /* fall through */
- case 2 : /* fall through */
- case 3 : itype = I960BASE_INSN_LDQ_OFFSET; goto extract_sfmt_ldq_offset;
- case 4 : itype = I960BASE_INSN_LDQ_INDIRECT; goto extract_sfmt_ldq_indirect;
- case 7 : itype = I960BASE_INSN_LDQ_INDIRECT_INDEX; goto extract_sfmt_ldq_indirect_index;
- case 8 : /* fall through */
- case 9 : /* fall through */
- case 10 : /* fall through */
- case 11 : itype = I960BASE_INSN_LDQ_INDIRECT_OFFSET; goto extract_sfmt_ldq_indirect_offset;
- case 12 : itype = I960BASE_INSN_LDQ_DISP; goto extract_sfmt_ldq_disp;
- case 13 : itype = I960BASE_INSN_LDQ_INDIRECT_DISP; goto extract_sfmt_ldq_indirect_disp;
- case 14 : itype = I960BASE_INSN_LDQ_INDEX_DISP; goto extract_sfmt_ldq_index_disp;
- case 15 : itype = I960BASE_INSN_LDQ_INDIRECT_INDEX_DISP; goto extract_sfmt_ldq_indirect_index_disp;
- default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty;
- }
- }
- case 178 :
- {
- unsigned int val = (((insn >> 10) & (15 << 0)));
- switch (val)
- {
- case 0 : /* fall through */
- case 1 : /* fall through */
- case 2 : /* fall through */
- case 3 : itype = I960BASE_INSN_STQ_OFFSET; goto extract_sfmt_stq_offset;
- case 4 : itype = I960BASE_INSN_STQ_INDIRECT; goto extract_sfmt_stq_indirect;
- case 7 : itype = I960BASE_INSN_STQ_INDIRECT_INDEX; goto extract_sfmt_stq_indirect_index;
- case 8 : /* fall through */
- case 9 : /* fall through */
- case 10 : /* fall through */
- case 11 : itype = I960BASE_INSN_STQ_INDIRECT_OFFSET; goto extract_sfmt_stq_indirect_offset;
- case 12 : itype = I960BASE_INSN_STQ_DISP; goto extract_sfmt_stq_disp;
- case 13 : itype = I960BASE_INSN_STQ_INDIRECT_DISP; goto extract_sfmt_stq_indirect_disp;
- case 14 : itype = I960BASE_INSN_STQ_INDEX_DISP; goto extract_sfmt_stq_index_disp;
- case 15 : itype = I960BASE_INSN_STQ_INDIRECT_INDEX_DISP; goto extract_sfmt_stq_indirect_index_disp;
- default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty;
- }
- }
- case 192 :
- {
- unsigned int val = (((insn >> 10) & (15 << 0)));
- switch (val)
- {
- case 0 : /* fall through */
- case 1 : /* fall through */
- case 2 : /* fall through */
- case 3 : itype = I960BASE_INSN_LDIB_OFFSET; goto extract_sfmt_ld_offset;
- case 4 : itype = I960BASE_INSN_LDIB_INDIRECT; goto extract_sfmt_ld_indirect;
- case 7 : itype = I960BASE_INSN_LDIB_INDIRECT_INDEX; goto extract_sfmt_ld_indirect_index;
- case 8 : /* fall through */
- case 9 : /* fall through */
- case 10 : /* fall through */
- case 11 : itype = I960BASE_INSN_LDIB_INDIRECT_OFFSET; goto extract_sfmt_ld_indirect_offset;
- case 12 : itype = I960BASE_INSN_LDIB_DISP; goto extract_sfmt_ld_disp;
- case 13 : itype = I960BASE_INSN_LDIB_INDIRECT_DISP; goto extract_sfmt_ld_indirect_disp;
- case 14 : itype = I960BASE_INSN_LDIB_INDEX_DISP; goto extract_sfmt_ld_index_disp;
- case 15 : itype = I960BASE_INSN_LDIB_INDIRECT_INDEX_DISP; goto extract_sfmt_ld_indirect_index_disp;
- default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty;
- }
- }
- case 200 :
- {
- unsigned int val = (((insn >> 10) & (15 << 0)));
- switch (val)
- {
- case 0 : /* fall through */
- case 1 : /* fall through */
- case 2 : /* fall through */
- case 3 : itype = I960BASE_INSN_LDIS_OFFSET; goto extract_sfmt_ld_offset;
- case 4 : itype = I960BASE_INSN_LDIS_INDIRECT; goto extract_sfmt_ld_indirect;
- case 7 : itype = I960BASE_INSN_LDIS_INDIRECT_INDEX; goto extract_sfmt_ld_indirect_index;
- case 8 : /* fall through */
- case 9 : /* fall through */
- case 10 : /* fall through */
- case 11 : itype = I960BASE_INSN_LDIS_INDIRECT_OFFSET; goto extract_sfmt_ld_indirect_offset;
- case 12 : itype = I960BASE_INSN_LDIS_DISP; goto extract_sfmt_ld_disp;
- case 13 : itype = I960BASE_INSN_LDIS_INDIRECT_DISP; goto extract_sfmt_ld_indirect_disp;
- case 14 : itype = I960BASE_INSN_LDIS_INDEX_DISP; goto extract_sfmt_ld_index_disp;
- case 15 : itype = I960BASE_INSN_LDIS_INDIRECT_INDEX_DISP; goto extract_sfmt_ld_indirect_index_disp;
- default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty;
- }
- }
- default : itype = I960BASE_INSN_X_INVALID; goto extract_sfmt_empty;
- }
- }
- }
-
- /* The instruction has been decoded, now extract the fields. */
-
- extract_sfmt_empty:
- {
- const IDESC *idesc = &i960base_insn_data[itype];
- CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_empty.f
-
-
- /* Record the fields for the semantic handler. */
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_empty", (char *) 0));
-
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_mulo:
- {
- const IDESC *idesc = &i960base_insn_data[itype];
- CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.sfmt_emul.f
- UINT f_srcdst;
- UINT f_src2;
- UINT f_src1;
-
- f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
- f_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
- f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5);
-
- /* Record the fields for the semantic handler. */
- FLD (i_src1) = & CPU (h_gr)[f_src1];
- FLD (i_src2) = & CPU (h_gr)[f_src2];
- FLD (i_dst) = & CPU (h_gr)[f_srcdst];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mulo", "src1 0x%x", 'x', f_src1, "src2 0x%x", 'x', f_src2, "dst 0x%x", 'x', f_srcdst, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_src1) = f_src1;
- FLD (in_src2) = f_src2;
- FLD (out_dst) = f_srcdst;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_mulo1:
- {
- const IDESC *idesc = &i960base_insn_data[itype];
- CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.sfmt_emul1.f
- UINT f_srcdst;
- UINT f_src2;
- UINT f_src1;
-
- f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
- f_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
- f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5);
-
- /* Record the fields for the semantic handler. */
- FLD (f_src1) = f_src1;
- FLD (i_src2) = & CPU (h_gr)[f_src2];
- FLD (i_dst) = & CPU (h_gr)[f_srcdst];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mulo1", "f_src1 0x%x", 'x', f_src1, "src2 0x%x", 'x', f_src2, "dst 0x%x", 'x', f_srcdst, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_src2) = f_src2;
- FLD (out_dst) = f_srcdst;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_mulo2:
- {
- const IDESC *idesc = &i960base_insn_data[itype];
- CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.sfmt_emul2.f
- UINT f_srcdst;
- UINT f_src2;
- UINT f_src1;
-
- f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
- f_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
- f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5);
-
- /* Record the fields for the semantic handler. */
- FLD (f_src2) = f_src2;
- FLD (i_src1) = & CPU (h_gr)[f_src1];
- FLD (i_dst) = & CPU (h_gr)[f_srcdst];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mulo2", "f_src2 0x%x", 'x', f_src2, "src1 0x%x", 'x', f_src1, "dst 0x%x", 'x', f_srcdst, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_src1) = f_src1;
- FLD (out_dst) = f_srcdst;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_mulo3:
- {
- const IDESC *idesc = &i960base_insn_data[itype];
- CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.sfmt_emul3.f
- UINT f_srcdst;
- UINT f_src2;
- UINT f_src1;
-
- f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
- f_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
- f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5);
-
- /* Record the fields for the semantic handler. */
- FLD (f_src1) = f_src1;
- FLD (f_src2) = f_src2;
- FLD (i_dst) = & CPU (h_gr)[f_srcdst];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mulo3", "f_src1 0x%x", 'x', f_src1, "f_src2 0x%x", 'x', f_src2, "dst 0x%x", 'x', f_srcdst, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (out_dst) = f_srcdst;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_notbit:
- {
- const IDESC *idesc = &i960base_insn_data[itype];
- CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.sfmt_emul.f
- UINT f_srcdst;
- UINT f_src2;
- UINT f_src1;
-
- f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
- f_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
- f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5);
-
- /* Record the fields for the semantic handler. */
- FLD (i_src1) = & CPU (h_gr)[f_src1];
- FLD (i_src2) = & CPU (h_gr)[f_src2];
- FLD (i_dst) = & CPU (h_gr)[f_srcdst];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_notbit", "src1 0x%x", 'x', f_src1, "src2 0x%x", 'x', f_src2, "dst 0x%x", 'x', f_srcdst, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_src1) = f_src1;
- FLD (in_src2) = f_src2;
- FLD (out_dst) = f_srcdst;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_notbit1:
- {
- const IDESC *idesc = &i960base_insn_data[itype];
- CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.sfmt_emul1.f
- UINT f_srcdst;
- UINT f_src2;
- UINT f_src1;
-
- f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
- f_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
- f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5);
-
- /* Record the fields for the semantic handler. */
- FLD (f_src1) = f_src1;
- FLD (i_src2) = & CPU (h_gr)[f_src2];
- FLD (i_dst) = & CPU (h_gr)[f_srcdst];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_notbit1", "f_src1 0x%x", 'x', f_src1, "src2 0x%x", 'x', f_src2, "dst 0x%x", 'x', f_srcdst, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_src2) = f_src2;
- FLD (out_dst) = f_srcdst;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_notbit2:
- {
- const IDESC *idesc = &i960base_insn_data[itype];
- CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.sfmt_emul2.f
- UINT f_srcdst;
- UINT f_src2;
- UINT f_src1;
-
- f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
- f_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
- f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5);
-
- /* Record the fields for the semantic handler. */
- FLD (f_src2) = f_src2;
- FLD (i_src1) = & CPU (h_gr)[f_src1];
- FLD (i_dst) = & CPU (h_gr)[f_srcdst];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_notbit2", "f_src2 0x%x", 'x', f_src2, "src1 0x%x", 'x', f_src1, "dst 0x%x", 'x', f_srcdst, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_src1) = f_src1;
- FLD (out_dst) = f_srcdst;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_notbit3:
- {
- const IDESC *idesc = &i960base_insn_data[itype];
- CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.sfmt_emul3.f
- UINT f_srcdst;
- UINT f_src2;
- UINT f_src1;
-
- f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
- f_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
- f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5);
-
- /* Record the fields for the semantic handler. */
- FLD (f_src1) = f_src1;
- FLD (f_src2) = f_src2;
- FLD (i_dst) = & CPU (h_gr)[f_srcdst];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_notbit3", "f_src1 0x%x", 'x', f_src1, "f_src2 0x%x", 'x', f_src2, "dst 0x%x", 'x', f_srcdst, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (out_dst) = f_srcdst;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_not:
- {
- const IDESC *idesc = &i960base_insn_data[itype];
- CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.sfmt_emul2.f
- UINT f_srcdst;
- UINT f_src1;
-
- f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
- f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5);
-
- /* Record the fields for the semantic handler. */
- FLD (i_src1) = & CPU (h_gr)[f_src1];
- FLD (i_dst) = & CPU (h_gr)[f_srcdst];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_not", "src1 0x%x", 'x', f_src1, "dst 0x%x", 'x', f_srcdst, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_src1) = f_src1;
- FLD (out_dst) = f_srcdst;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_not1:
- {
- const IDESC *idesc = &i960base_insn_data[itype];
- CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.sfmt_emul3.f
- UINT f_srcdst;
- UINT f_src1;
-
- f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
- f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5);
-
- /* Record the fields for the semantic handler. */
- FLD (f_src1) = f_src1;
- FLD (i_dst) = & CPU (h_gr)[f_srcdst];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_not1", "f_src1 0x%x", 'x', f_src1, "dst 0x%x", 'x', f_srcdst, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (out_dst) = f_srcdst;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_shlo:
- {
- const IDESC *idesc = &i960base_insn_data[itype];
- CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.sfmt_emul.f
- UINT f_srcdst;
- UINT f_src2;
- UINT f_src1;
-
- f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
- f_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
- f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5);
-
- /* Record the fields for the semantic handler. */
- FLD (i_src1) = & CPU (h_gr)[f_src1];
- FLD (i_src2) = & CPU (h_gr)[f_src2];
- FLD (i_dst) = & CPU (h_gr)[f_srcdst];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_shlo", "src1 0x%x", 'x', f_src1, "src2 0x%x", 'x', f_src2, "dst 0x%x", 'x', f_srcdst, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_src1) = f_src1;
- FLD (in_src2) = f_src2;
- FLD (out_dst) = f_srcdst;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_shlo1:
- {
- const IDESC *idesc = &i960base_insn_data[itype];
- CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.sfmt_emul1.f
- UINT f_srcdst;
- UINT f_src2;
- UINT f_src1;
-
- f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
- f_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
- f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5);
-
- /* Record the fields for the semantic handler. */
- FLD (f_src1) = f_src1;
- FLD (i_src2) = & CPU (h_gr)[f_src2];
- FLD (i_dst) = & CPU (h_gr)[f_srcdst];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_shlo1", "f_src1 0x%x", 'x', f_src1, "src2 0x%x", 'x', f_src2, "dst 0x%x", 'x', f_srcdst, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_src2) = f_src2;
- FLD (out_dst) = f_srcdst;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_shlo2:
- {
- const IDESC *idesc = &i960base_insn_data[itype];
- CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.sfmt_emul2.f
- UINT f_srcdst;
- UINT f_src2;
- UINT f_src1;
-
- f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
- f_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
- f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5);
-
- /* Record the fields for the semantic handler. */
- FLD (f_src2) = f_src2;
- FLD (i_src1) = & CPU (h_gr)[f_src1];
- FLD (i_dst) = & CPU (h_gr)[f_srcdst];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_shlo2", "f_src2 0x%x", 'x', f_src2, "src1 0x%x", 'x', f_src1, "dst 0x%x", 'x', f_srcdst, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_src1) = f_src1;
- FLD (out_dst) = f_srcdst;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_shlo3:
- {
- const IDESC *idesc = &i960base_insn_data[itype];
- CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.sfmt_emul3.f
- UINT f_srcdst;
- UINT f_src2;
- UINT f_src1;
-
- f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
- f_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
- f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5);
-
- /* Record the fields for the semantic handler. */
- FLD (f_src1) = f_src1;
- FLD (f_src2) = f_src2;
- FLD (i_dst) = & CPU (h_gr)[f_srcdst];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_shlo3", "f_src1 0x%x", 'x', f_src1, "f_src2 0x%x", 'x', f_src2, "dst 0x%x", 'x', f_srcdst, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (out_dst) = f_srcdst;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_emul:
- {
- const IDESC *idesc = &i960base_insn_data[itype];
- CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.sfmt_emul.f
- UINT f_srcdst;
- UINT f_src2;
- UINT f_src1;
-
- f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
- f_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
- f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5);
-
- /* Record the fields for the semantic handler. */
- FLD (f_srcdst) = f_srcdst;
- FLD (i_src1) = & CPU (h_gr)[f_src1];
- FLD (i_src2) = & CPU (h_gr)[f_src2];
- FLD (i_dst) = & CPU (h_gr)[f_srcdst];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_emul", "f_srcdst 0x%x", 'x', f_srcdst, "src1 0x%x", 'x', f_src1, "src2 0x%x", 'x', f_src2, "dst 0x%x", 'x', f_srcdst, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_src1) = f_src1;
- FLD (in_src2) = f_src2;
- FLD (out_dst) = f_srcdst;
- FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_1) = ((FLD (f_srcdst)) + (1));
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_emul1:
- {
- const IDESC *idesc = &i960base_insn_data[itype];
- CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.sfmt_emul1.f
- UINT f_srcdst;
- UINT f_src2;
- UINT f_src1;
-
- f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
- f_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
- f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5);
-
- /* Record the fields for the semantic handler. */
- FLD (f_srcdst) = f_srcdst;
- FLD (f_src1) = f_src1;
- FLD (i_src2) = & CPU (h_gr)[f_src2];
- FLD (i_dst) = & CPU (h_gr)[f_srcdst];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_emul1", "f_srcdst 0x%x", 'x', f_srcdst, "f_src1 0x%x", 'x', f_src1, "src2 0x%x", 'x', f_src2, "dst 0x%x", 'x', f_srcdst, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_src2) = f_src2;
- FLD (out_dst) = f_srcdst;
- FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_1) = ((FLD (f_srcdst)) + (1));
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_emul2:
- {
- const IDESC *idesc = &i960base_insn_data[itype];
- CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.sfmt_emul2.f
- UINT f_srcdst;
- UINT f_src2;
- UINT f_src1;
-
- f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
- f_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
- f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5);
-
- /* Record the fields for the semantic handler. */
- FLD (f_srcdst) = f_srcdst;
- FLD (f_src2) = f_src2;
- FLD (i_src1) = & CPU (h_gr)[f_src1];
- FLD (i_dst) = & CPU (h_gr)[f_srcdst];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_emul2", "f_srcdst 0x%x", 'x', f_srcdst, "f_src2 0x%x", 'x', f_src2, "src1 0x%x", 'x', f_src1, "dst 0x%x", 'x', f_srcdst, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_src1) = f_src1;
- FLD (out_dst) = f_srcdst;
- FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_1) = ((FLD (f_srcdst)) + (1));
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_emul3:
- {
- const IDESC *idesc = &i960base_insn_data[itype];
- CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.sfmt_emul3.f
- UINT f_srcdst;
- UINT f_src2;
- UINT f_src1;
-
- f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
- f_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
- f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5);
-
- /* Record the fields for the semantic handler. */
- FLD (f_srcdst) = f_srcdst;
- FLD (f_src1) = f_src1;
- FLD (f_src2) = f_src2;
- FLD (i_dst) = & CPU (h_gr)[f_srcdst];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_emul3", "f_srcdst 0x%x", 'x', f_srcdst, "f_src1 0x%x", 'x', f_src1, "f_src2 0x%x", 'x', f_src2, "dst 0x%x", 'x', f_srcdst, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (out_dst) = f_srcdst;
- FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_1) = ((FLD (f_srcdst)) + (1));
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_movl:
- {
- const IDESC *idesc = &i960base_insn_data[itype];
- CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.sfmt_movq.f
- UINT f_srcdst;
- UINT f_src1;
-
- f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
- f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5);
-
- /* Record the fields for the semantic handler. */
- FLD (f_src1) = f_src1;
- FLD (f_srcdst) = f_srcdst;
- FLD (i_src1) = & CPU (h_gr)[f_src1];
- FLD (i_dst) = & CPU (h_gr)[f_srcdst];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_movl", "f_src1 0x%x", 'x', f_src1, "f_srcdst 0x%x", 'x', f_srcdst, "src1 0x%x", 'x', f_src1, "dst 0x%x", 'x', f_srcdst, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_h_gr_add__DFLT_index_of__DFLT_src1_1) = ((FLD (f_src1)) + (1));
- FLD (in_src1) = f_src1;
- FLD (out_dst) = f_srcdst;
- FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_1) = ((FLD (f_srcdst)) + (1));
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_movl1:
- {
- const IDESC *idesc = &i960base_insn_data[itype];
- CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.sfmt_emul3.f
- UINT f_srcdst;
- UINT f_src1;
-
- f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
- f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5);
-
- /* Record the fields for the semantic handler. */
- FLD (f_srcdst) = f_srcdst;
- FLD (f_src1) = f_src1;
- FLD (i_dst) = & CPU (h_gr)[f_srcdst];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_movl1", "f_srcdst 0x%x", 'x', f_srcdst, "f_src1 0x%x", 'x', f_src1, "dst 0x%x", 'x', f_srcdst, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (out_dst) = f_srcdst;
- FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_1) = ((FLD (f_srcdst)) + (1));
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_movt:
- {
- const IDESC *idesc = &i960base_insn_data[itype];
- CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.sfmt_movq.f
- UINT f_srcdst;
- UINT f_src1;
-
- f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
- f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5);
-
- /* Record the fields for the semantic handler. */
- FLD (f_src1) = f_src1;
- FLD (f_srcdst) = f_srcdst;
- FLD (i_src1) = & CPU (h_gr)[f_src1];
- FLD (i_dst) = & CPU (h_gr)[f_srcdst];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_movt", "f_src1 0x%x", 'x', f_src1, "f_srcdst 0x%x", 'x', f_srcdst, "src1 0x%x", 'x', f_src1, "dst 0x%x", 'x', f_srcdst, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_h_gr_add__DFLT_index_of__DFLT_src1_1) = ((FLD (f_src1)) + (1));
- FLD (in_h_gr_add__DFLT_index_of__DFLT_src1_2) = ((FLD (f_src1)) + (2));
- FLD (in_src1) = f_src1;
- FLD (out_dst) = f_srcdst;
- FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_1) = ((FLD (f_srcdst)) + (1));
- FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_2) = ((FLD (f_srcdst)) + (2));
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_movt1:
- {
- const IDESC *idesc = &i960base_insn_data[itype];
- CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.sfmt_movq.f
- UINT f_srcdst;
- UINT f_src1;
-
- f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
- f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5);
-
- /* Record the fields for the semantic handler. */
- FLD (f_srcdst) = f_srcdst;
- FLD (f_src1) = f_src1;
- FLD (i_dst) = & CPU (h_gr)[f_srcdst];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_movt1", "f_srcdst 0x%x", 'x', f_srcdst, "f_src1 0x%x", 'x', f_src1, "dst 0x%x", 'x', f_srcdst, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (out_dst) = f_srcdst;
- FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_1) = ((FLD (f_srcdst)) + (1));
- FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_2) = ((FLD (f_srcdst)) + (2));
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_movq:
- {
- const IDESC *idesc = &i960base_insn_data[itype];
- CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.sfmt_movq.f
- UINT f_srcdst;
- UINT f_src1;
-
- f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
- f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5);
-
- /* Record the fields for the semantic handler. */
- FLD (f_src1) = f_src1;
- FLD (f_srcdst) = f_srcdst;
- FLD (i_src1) = & CPU (h_gr)[f_src1];
- FLD (i_dst) = & CPU (h_gr)[f_srcdst];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_movq", "f_src1 0x%x", 'x', f_src1, "f_srcdst 0x%x", 'x', f_srcdst, "src1 0x%x", 'x', f_src1, "dst 0x%x", 'x', f_srcdst, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_h_gr_add__DFLT_index_of__DFLT_src1_1) = ((FLD (f_src1)) + (1));
- FLD (in_h_gr_add__DFLT_index_of__DFLT_src1_2) = ((FLD (f_src1)) + (2));
- FLD (in_h_gr_add__DFLT_index_of__DFLT_src1_3) = ((FLD (f_src1)) + (3));
- FLD (in_src1) = f_src1;
- FLD (out_dst) = f_srcdst;
- FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_1) = ((FLD (f_srcdst)) + (1));
- FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_2) = ((FLD (f_srcdst)) + (2));
- FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_3) = ((FLD (f_srcdst)) + (3));
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_movq1:
- {
- const IDESC *idesc = &i960base_insn_data[itype];
- CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.sfmt_movq.f
- UINT f_srcdst;
- UINT f_src1;
-
- f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
- f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5);
-
- /* Record the fields for the semantic handler. */
- FLD (f_srcdst) = f_srcdst;
- FLD (f_src1) = f_src1;
- FLD (i_dst) = & CPU (h_gr)[f_srcdst];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_movq1", "f_srcdst 0x%x", 'x', f_srcdst, "f_src1 0x%x", 'x', f_src1, "dst 0x%x", 'x', f_srcdst, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (out_dst) = f_srcdst;
- FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_1) = ((FLD (f_srcdst)) + (1));
- FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_2) = ((FLD (f_srcdst)) + (2));
- FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_3) = ((FLD (f_srcdst)) + (3));
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_modpc:
- {
- const IDESC *idesc = &i960base_insn_data[itype];
- CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.sfmt_emul1.f
- UINT f_srcdst;
- UINT f_src2;
-
- f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
- f_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
-
- /* Record the fields for the semantic handler. */
- FLD (i_src2) = & CPU (h_gr)[f_src2];
- FLD (i_dst) = & CPU (h_gr)[f_srcdst];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_modpc", "src2 0x%x", 'x', f_src2, "dst 0x%x", 'x', f_srcdst, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_src2) = f_src2;
- FLD (out_dst) = f_srcdst;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_lda_offset:
- {
- const IDESC *idesc = &i960base_insn_data[itype];
- CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
- UINT f_srcdst;
- UINT f_offset;
-
- f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
- f_offset = EXTRACT_MSB0_UINT (insn, 32, 20, 12);
-
- /* Record the fields for the semantic handler. */
- FLD (f_offset) = f_offset;
- FLD (i_dst) = & CPU (h_gr)[f_srcdst];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_lda_offset", "f_offset 0x%x", 'x', f_offset, "dst 0x%x", 'x', f_srcdst, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (out_dst) = f_srcdst;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_lda_indirect_offset:
- {
- const IDESC *idesc = &i960base_insn_data[itype];
- CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
- UINT f_srcdst;
- UINT f_abase;
- UINT f_offset;
-
- f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
- f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
- f_offset = EXTRACT_MSB0_UINT (insn, 32, 20, 12);
-
- /* Record the fields for the semantic handler. */
- FLD (f_offset) = f_offset;
- FLD (i_abase) = & CPU (h_gr)[f_abase];
- FLD (i_dst) = & CPU (h_gr)[f_srcdst];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_lda_indirect_offset", "f_offset 0x%x", 'x', f_offset, "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_abase) = f_abase;
- FLD (out_dst) = f_srcdst;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_lda_indirect:
- {
- const IDESC *idesc = &i960base_insn_data[itype];
- CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
- UINT f_srcdst;
- UINT f_abase;
-
- f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
- f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
-
- /* Record the fields for the semantic handler. */
- FLD (i_abase) = & CPU (h_gr)[f_abase];
- FLD (i_dst) = & CPU (h_gr)[f_srcdst];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_lda_indirect", "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_abase) = f_abase;
- FLD (out_dst) = f_srcdst;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_lda_indirect_index:
- {
- const IDESC *idesc = &i960base_insn_data[itype];
- CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- UINT f_srcdst;
- UINT f_abase;
- UINT f_scale;
- UINT f_index;
-
- f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
- f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
- f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3);
- f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5);
-
- /* Record the fields for the semantic handler. */
- FLD (f_scale) = f_scale;
- FLD (i_abase) = & CPU (h_gr)[f_abase];
- FLD (i_index) = & CPU (h_gr)[f_index];
- FLD (i_dst) = & CPU (h_gr)[f_srcdst];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_lda_indirect_index", "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_abase) = f_abase;
- FLD (in_index) = f_index;
- FLD (out_dst) = f_srcdst;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_lda_disp:
- {
- const IDESC *idesc = &i960base_insn_data[itype];
- CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- UINT f_optdisp;
- UINT f_srcdst;
- /* Contents of trailing part of insn. */
- UINT word_1;
-
- word_1 = GETIMEMUSI (current_cpu, pc + 4);
- f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0));
- f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
-
- /* Record the fields for the semantic handler. */
- FLD (f_optdisp) = f_optdisp;
- FLD (i_dst) = & CPU (h_gr)[f_srcdst];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_lda_disp", "f_optdisp 0x%x", 'x', f_optdisp, "dst 0x%x", 'x', f_srcdst, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (out_dst) = f_srcdst;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_lda_indirect_disp:
- {
- const IDESC *idesc = &i960base_insn_data[itype];
- CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- UINT f_optdisp;
- UINT f_srcdst;
- UINT f_abase;
- /* Contents of trailing part of insn. */
- UINT word_1;
-
- word_1 = GETIMEMUSI (current_cpu, pc + 4);
- f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0));
- f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
- f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
-
- /* Record the fields for the semantic handler. */
- FLD (f_optdisp) = f_optdisp;
- FLD (i_abase) = & CPU (h_gr)[f_abase];
- FLD (i_dst) = & CPU (h_gr)[f_srcdst];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_lda_indirect_disp", "f_optdisp 0x%x", 'x', f_optdisp, "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_abase) = f_abase;
- FLD (out_dst) = f_srcdst;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_lda_index_disp:
- {
- const IDESC *idesc = &i960base_insn_data[itype];
- CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- UINT f_optdisp;
- UINT f_srcdst;
- UINT f_scale;
- UINT f_index;
- /* Contents of trailing part of insn. */
- UINT word_1;
-
- word_1 = GETIMEMUSI (current_cpu, pc + 4);
- f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0));
- f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
- f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3);
- f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5);
-
- /* Record the fields for the semantic handler. */
- FLD (f_optdisp) = f_optdisp;
- FLD (f_scale) = f_scale;
- FLD (i_index) = & CPU (h_gr)[f_index];
- FLD (i_dst) = & CPU (h_gr)[f_srcdst];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_lda_index_disp", "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_index) = f_index;
- FLD (out_dst) = f_srcdst;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_lda_indirect_index_disp:
- {
- const IDESC *idesc = &i960base_insn_data[itype];
- CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- UINT f_optdisp;
- UINT f_srcdst;
- UINT f_abase;
- UINT f_scale;
- UINT f_index;
- /* Contents of trailing part of insn. */
- UINT word_1;
-
- word_1 = GETIMEMUSI (current_cpu, pc + 4);
- f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0));
- f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
- f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
- f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3);
- f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5);
-
- /* Record the fields for the semantic handler. */
- FLD (f_optdisp) = f_optdisp;
- FLD (f_scale) = f_scale;
- FLD (i_abase) = & CPU (h_gr)[f_abase];
- FLD (i_index) = & CPU (h_gr)[f_index];
- FLD (i_dst) = & CPU (h_gr)[f_srcdst];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_lda_indirect_index_disp", "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_abase) = f_abase;
- FLD (in_index) = f_index;
- FLD (out_dst) = f_srcdst;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_ld_offset:
- {
- const IDESC *idesc = &i960base_insn_data[itype];
- CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
- UINT f_srcdst;
- UINT f_offset;
-
- f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
- f_offset = EXTRACT_MSB0_UINT (insn, 32, 20, 12);
-
- /* Record the fields for the semantic handler. */
- FLD (f_offset) = f_offset;
- FLD (i_dst) = & CPU (h_gr)[f_srcdst];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ld_offset", "f_offset 0x%x", 'x', f_offset, "dst 0x%x", 'x', f_srcdst, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (out_dst) = f_srcdst;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_ld_indirect_offset:
- {
- const IDESC *idesc = &i960base_insn_data[itype];
- CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
- UINT f_srcdst;
- UINT f_abase;
- UINT f_offset;
-
- f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
- f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
- f_offset = EXTRACT_MSB0_UINT (insn, 32, 20, 12);
-
- /* Record the fields for the semantic handler. */
- FLD (f_offset) = f_offset;
- FLD (i_abase) = & CPU (h_gr)[f_abase];
- FLD (i_dst) = & CPU (h_gr)[f_srcdst];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ld_indirect_offset", "f_offset 0x%x", 'x', f_offset, "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_abase) = f_abase;
- FLD (out_dst) = f_srcdst;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_ld_indirect:
- {
- const IDESC *idesc = &i960base_insn_data[itype];
- CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
- UINT f_srcdst;
- UINT f_abase;
-
- f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
- f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
-
- /* Record the fields for the semantic handler. */
- FLD (i_abase) = & CPU (h_gr)[f_abase];
- FLD (i_dst) = & CPU (h_gr)[f_srcdst];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ld_indirect", "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_abase) = f_abase;
- FLD (out_dst) = f_srcdst;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_ld_indirect_index:
- {
- const IDESC *idesc = &i960base_insn_data[itype];
- CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- UINT f_srcdst;
- UINT f_abase;
- UINT f_scale;
- UINT f_index;
-
- f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
- f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
- f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3);
- f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5);
-
- /* Record the fields for the semantic handler. */
- FLD (f_scale) = f_scale;
- FLD (i_abase) = & CPU (h_gr)[f_abase];
- FLD (i_index) = & CPU (h_gr)[f_index];
- FLD (i_dst) = & CPU (h_gr)[f_srcdst];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ld_indirect_index", "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_abase) = f_abase;
- FLD (in_index) = f_index;
- FLD (out_dst) = f_srcdst;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_ld_disp:
- {
- const IDESC *idesc = &i960base_insn_data[itype];
- CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- UINT f_optdisp;
- UINT f_srcdst;
- /* Contents of trailing part of insn. */
- UINT word_1;
-
- word_1 = GETIMEMUSI (current_cpu, pc + 4);
- f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0));
- f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
-
- /* Record the fields for the semantic handler. */
- FLD (f_optdisp) = f_optdisp;
- FLD (i_dst) = & CPU (h_gr)[f_srcdst];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ld_disp", "f_optdisp 0x%x", 'x', f_optdisp, "dst 0x%x", 'x', f_srcdst, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (out_dst) = f_srcdst;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_ld_indirect_disp:
- {
- const IDESC *idesc = &i960base_insn_data[itype];
- CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- UINT f_optdisp;
- UINT f_srcdst;
- UINT f_abase;
- /* Contents of trailing part of insn. */
- UINT word_1;
-
- word_1 = GETIMEMUSI (current_cpu, pc + 4);
- f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0));
- f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
- f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
-
- /* Record the fields for the semantic handler. */
- FLD (f_optdisp) = f_optdisp;
- FLD (i_abase) = & CPU (h_gr)[f_abase];
- FLD (i_dst) = & CPU (h_gr)[f_srcdst];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ld_indirect_disp", "f_optdisp 0x%x", 'x', f_optdisp, "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_abase) = f_abase;
- FLD (out_dst) = f_srcdst;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_ld_index_disp:
- {
- const IDESC *idesc = &i960base_insn_data[itype];
- CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- UINT f_optdisp;
- UINT f_srcdst;
- UINT f_scale;
- UINT f_index;
- /* Contents of trailing part of insn. */
- UINT word_1;
-
- word_1 = GETIMEMUSI (current_cpu, pc + 4);
- f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0));
- f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
- f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3);
- f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5);
-
- /* Record the fields for the semantic handler. */
- FLD (f_optdisp) = f_optdisp;
- FLD (f_scale) = f_scale;
- FLD (i_index) = & CPU (h_gr)[f_index];
- FLD (i_dst) = & CPU (h_gr)[f_srcdst];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ld_index_disp", "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_index) = f_index;
- FLD (out_dst) = f_srcdst;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_ld_indirect_index_disp:
- {
- const IDESC *idesc = &i960base_insn_data[itype];
- CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- UINT f_optdisp;
- UINT f_srcdst;
- UINT f_abase;
- UINT f_scale;
- UINT f_index;
- /* Contents of trailing part of insn. */
- UINT word_1;
-
- word_1 = GETIMEMUSI (current_cpu, pc + 4);
- f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0));
- f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
- f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
- f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3);
- f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5);
-
- /* Record the fields for the semantic handler. */
- FLD (f_optdisp) = f_optdisp;
- FLD (f_scale) = f_scale;
- FLD (i_abase) = & CPU (h_gr)[f_abase];
- FLD (i_index) = & CPU (h_gr)[f_index];
- FLD (i_dst) = & CPU (h_gr)[f_srcdst];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ld_indirect_index_disp", "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_abase) = f_abase;
- FLD (in_index) = f_index;
- FLD (out_dst) = f_srcdst;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_ldl_offset:
- {
- const IDESC *idesc = &i960base_insn_data[itype];
- CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
- UINT f_srcdst;
- UINT f_offset;
-
- f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
- f_offset = EXTRACT_MSB0_UINT (insn, 32, 20, 12);
-
- /* Record the fields for the semantic handler. */
- FLD (f_srcdst) = f_srcdst;
- FLD (f_offset) = f_offset;
- FLD (i_dst) = & CPU (h_gr)[f_srcdst];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldl_offset", "f_srcdst 0x%x", 'x', f_srcdst, "f_offset 0x%x", 'x', f_offset, "dst 0x%x", 'x', f_srcdst, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (out_dst) = f_srcdst;
- FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_1) = ((FLD (f_srcdst)) + (1));
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_ldl_indirect_offset:
- {
- const IDESC *idesc = &i960base_insn_data[itype];
- CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
- UINT f_srcdst;
- UINT f_abase;
- UINT f_offset;
-
- f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
- f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
- f_offset = EXTRACT_MSB0_UINT (insn, 32, 20, 12);
-
- /* Record the fields for the semantic handler. */
- FLD (f_srcdst) = f_srcdst;
- FLD (f_offset) = f_offset;
- FLD (i_abase) = & CPU (h_gr)[f_abase];
- FLD (i_dst) = & CPU (h_gr)[f_srcdst];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldl_indirect_offset", "f_srcdst 0x%x", 'x', f_srcdst, "f_offset 0x%x", 'x', f_offset, "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_abase) = f_abase;
- FLD (out_dst) = f_srcdst;
- FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_1) = ((FLD (f_srcdst)) + (1));
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_ldl_indirect:
- {
- const IDESC *idesc = &i960base_insn_data[itype];
- CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
- UINT f_srcdst;
- UINT f_abase;
-
- f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
- f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
-
- /* Record the fields for the semantic handler. */
- FLD (f_srcdst) = f_srcdst;
- FLD (i_abase) = & CPU (h_gr)[f_abase];
- FLD (i_dst) = & CPU (h_gr)[f_srcdst];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldl_indirect", "f_srcdst 0x%x", 'x', f_srcdst, "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_abase) = f_abase;
- FLD (out_dst) = f_srcdst;
- FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_1) = ((FLD (f_srcdst)) + (1));
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_ldl_indirect_index:
- {
- const IDESC *idesc = &i960base_insn_data[itype];
- CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- UINT f_srcdst;
- UINT f_abase;
- UINT f_scale;
- UINT f_index;
-
- f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
- f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
- f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3);
- f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5);
-
- /* Record the fields for the semantic handler. */
- FLD (f_srcdst) = f_srcdst;
- FLD (f_scale) = f_scale;
- FLD (i_abase) = & CPU (h_gr)[f_abase];
- FLD (i_index) = & CPU (h_gr)[f_index];
- FLD (i_dst) = & CPU (h_gr)[f_srcdst];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldl_indirect_index", "f_srcdst 0x%x", 'x', f_srcdst, "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_abase) = f_abase;
- FLD (in_index) = f_index;
- FLD (out_dst) = f_srcdst;
- FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_1) = ((FLD (f_srcdst)) + (1));
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_ldl_disp:
- {
- const IDESC *idesc = &i960base_insn_data[itype];
- CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- UINT f_optdisp;
- UINT f_srcdst;
- /* Contents of trailing part of insn. */
- UINT word_1;
-
- word_1 = GETIMEMUSI (current_cpu, pc + 4);
- f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0));
- f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
-
- /* Record the fields for the semantic handler. */
- FLD (f_srcdst) = f_srcdst;
- FLD (f_optdisp) = f_optdisp;
- FLD (i_dst) = & CPU (h_gr)[f_srcdst];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldl_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "dst 0x%x", 'x', f_srcdst, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (out_dst) = f_srcdst;
- FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_1) = ((FLD (f_srcdst)) + (1));
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_ldl_indirect_disp:
- {
- const IDESC *idesc = &i960base_insn_data[itype];
- CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- UINT f_optdisp;
- UINT f_srcdst;
- UINT f_abase;
- /* Contents of trailing part of insn. */
- UINT word_1;
-
- word_1 = GETIMEMUSI (current_cpu, pc + 4);
- f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0));
- f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
- f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
-
- /* Record the fields for the semantic handler. */
- FLD (f_srcdst) = f_srcdst;
- FLD (f_optdisp) = f_optdisp;
- FLD (i_abase) = & CPU (h_gr)[f_abase];
- FLD (i_dst) = & CPU (h_gr)[f_srcdst];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldl_indirect_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_abase) = f_abase;
- FLD (out_dst) = f_srcdst;
- FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_1) = ((FLD (f_srcdst)) + (1));
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_ldl_index_disp:
- {
- const IDESC *idesc = &i960base_insn_data[itype];
- CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- UINT f_optdisp;
- UINT f_srcdst;
- UINT f_scale;
- UINT f_index;
- /* Contents of trailing part of insn. */
- UINT word_1;
-
- word_1 = GETIMEMUSI (current_cpu, pc + 4);
- f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0));
- f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
- f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3);
- f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5);
-
- /* Record the fields for the semantic handler. */
- FLD (f_srcdst) = f_srcdst;
- FLD (f_optdisp) = f_optdisp;
- FLD (f_scale) = f_scale;
- FLD (i_index) = & CPU (h_gr)[f_index];
- FLD (i_dst) = & CPU (h_gr)[f_srcdst];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldl_index_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_index) = f_index;
- FLD (out_dst) = f_srcdst;
- FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_1) = ((FLD (f_srcdst)) + (1));
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_ldl_indirect_index_disp:
- {
- const IDESC *idesc = &i960base_insn_data[itype];
- CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- UINT f_optdisp;
- UINT f_srcdst;
- UINT f_abase;
- UINT f_scale;
- UINT f_index;
- /* Contents of trailing part of insn. */
- UINT word_1;
-
- word_1 = GETIMEMUSI (current_cpu, pc + 4);
- f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0));
- f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
- f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
- f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3);
- f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5);
-
- /* Record the fields for the semantic handler. */
- FLD (f_srcdst) = f_srcdst;
- FLD (f_optdisp) = f_optdisp;
- FLD (f_scale) = f_scale;
- FLD (i_abase) = & CPU (h_gr)[f_abase];
- FLD (i_index) = & CPU (h_gr)[f_index];
- FLD (i_dst) = & CPU (h_gr)[f_srcdst];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldl_indirect_index_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_abase) = f_abase;
- FLD (in_index) = f_index;
- FLD (out_dst) = f_srcdst;
- FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_1) = ((FLD (f_srcdst)) + (1));
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_ldt_offset:
- {
- const IDESC *idesc = &i960base_insn_data[itype];
- CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
- UINT f_srcdst;
- UINT f_offset;
-
- f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
- f_offset = EXTRACT_MSB0_UINT (insn, 32, 20, 12);
-
- /* Record the fields for the semantic handler. */
- FLD (f_srcdst) = f_srcdst;
- FLD (f_offset) = f_offset;
- FLD (i_dst) = & CPU (h_gr)[f_srcdst];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldt_offset", "f_srcdst 0x%x", 'x', f_srcdst, "f_offset 0x%x", 'x', f_offset, "dst 0x%x", 'x', f_srcdst, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (out_dst) = f_srcdst;
- FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_1) = ((FLD (f_srcdst)) + (1));
- FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_2) = ((FLD (f_srcdst)) + (2));
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_ldt_indirect_offset:
- {
- const IDESC *idesc = &i960base_insn_data[itype];
- CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
- UINT f_srcdst;
- UINT f_abase;
- UINT f_offset;
-
- f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
- f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
- f_offset = EXTRACT_MSB0_UINT (insn, 32, 20, 12);
-
- /* Record the fields for the semantic handler. */
- FLD (f_srcdst) = f_srcdst;
- FLD (f_offset) = f_offset;
- FLD (i_abase) = & CPU (h_gr)[f_abase];
- FLD (i_dst) = & CPU (h_gr)[f_srcdst];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldt_indirect_offset", "f_srcdst 0x%x", 'x', f_srcdst, "f_offset 0x%x", 'x', f_offset, "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_abase) = f_abase;
- FLD (out_dst) = f_srcdst;
- FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_1) = ((FLD (f_srcdst)) + (1));
- FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_2) = ((FLD (f_srcdst)) + (2));
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_ldt_indirect:
- {
- const IDESC *idesc = &i960base_insn_data[itype];
- CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
- UINT f_srcdst;
- UINT f_abase;
-
- f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
- f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
-
- /* Record the fields for the semantic handler. */
- FLD (f_srcdst) = f_srcdst;
- FLD (i_abase) = & CPU (h_gr)[f_abase];
- FLD (i_dst) = & CPU (h_gr)[f_srcdst];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldt_indirect", "f_srcdst 0x%x", 'x', f_srcdst, "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_abase) = f_abase;
- FLD (out_dst) = f_srcdst;
- FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_1) = ((FLD (f_srcdst)) + (1));
- FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_2) = ((FLD (f_srcdst)) + (2));
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_ldt_indirect_index:
- {
- const IDESC *idesc = &i960base_insn_data[itype];
- CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- UINT f_srcdst;
- UINT f_abase;
- UINT f_scale;
- UINT f_index;
-
- f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
- f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
- f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3);
- f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5);
-
- /* Record the fields for the semantic handler. */
- FLD (f_srcdst) = f_srcdst;
- FLD (f_scale) = f_scale;
- FLD (i_abase) = & CPU (h_gr)[f_abase];
- FLD (i_index) = & CPU (h_gr)[f_index];
- FLD (i_dst) = & CPU (h_gr)[f_srcdst];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldt_indirect_index", "f_srcdst 0x%x", 'x', f_srcdst, "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_abase) = f_abase;
- FLD (in_index) = f_index;
- FLD (out_dst) = f_srcdst;
- FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_1) = ((FLD (f_srcdst)) + (1));
- FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_2) = ((FLD (f_srcdst)) + (2));
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_ldt_disp:
- {
- const IDESC *idesc = &i960base_insn_data[itype];
- CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- UINT f_optdisp;
- UINT f_srcdst;
- /* Contents of trailing part of insn. */
- UINT word_1;
-
- word_1 = GETIMEMUSI (current_cpu, pc + 4);
- f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0));
- f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
-
- /* Record the fields for the semantic handler. */
- FLD (f_srcdst) = f_srcdst;
- FLD (f_optdisp) = f_optdisp;
- FLD (i_dst) = & CPU (h_gr)[f_srcdst];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldt_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "dst 0x%x", 'x', f_srcdst, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (out_dst) = f_srcdst;
- FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_1) = ((FLD (f_srcdst)) + (1));
- FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_2) = ((FLD (f_srcdst)) + (2));
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_ldt_indirect_disp:
- {
- const IDESC *idesc = &i960base_insn_data[itype];
- CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- UINT f_optdisp;
- UINT f_srcdst;
- UINT f_abase;
- /* Contents of trailing part of insn. */
- UINT word_1;
-
- word_1 = GETIMEMUSI (current_cpu, pc + 4);
- f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0));
- f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
- f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
-
- /* Record the fields for the semantic handler. */
- FLD (f_srcdst) = f_srcdst;
- FLD (f_optdisp) = f_optdisp;
- FLD (i_abase) = & CPU (h_gr)[f_abase];
- FLD (i_dst) = & CPU (h_gr)[f_srcdst];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldt_indirect_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_abase) = f_abase;
- FLD (out_dst) = f_srcdst;
- FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_1) = ((FLD (f_srcdst)) + (1));
- FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_2) = ((FLD (f_srcdst)) + (2));
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_ldt_index_disp:
- {
- const IDESC *idesc = &i960base_insn_data[itype];
- CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- UINT f_optdisp;
- UINT f_srcdst;
- UINT f_scale;
- UINT f_index;
- /* Contents of trailing part of insn. */
- UINT word_1;
-
- word_1 = GETIMEMUSI (current_cpu, pc + 4);
- f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0));
- f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
- f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3);
- f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5);
-
- /* Record the fields for the semantic handler. */
- FLD (f_srcdst) = f_srcdst;
- FLD (f_optdisp) = f_optdisp;
- FLD (f_scale) = f_scale;
- FLD (i_index) = & CPU (h_gr)[f_index];
- FLD (i_dst) = & CPU (h_gr)[f_srcdst];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldt_index_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_index) = f_index;
- FLD (out_dst) = f_srcdst;
- FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_1) = ((FLD (f_srcdst)) + (1));
- FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_2) = ((FLD (f_srcdst)) + (2));
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_ldt_indirect_index_disp:
- {
- const IDESC *idesc = &i960base_insn_data[itype];
- CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- UINT f_optdisp;
- UINT f_srcdst;
- UINT f_abase;
- UINT f_scale;
- UINT f_index;
- /* Contents of trailing part of insn. */
- UINT word_1;
-
- word_1 = GETIMEMUSI (current_cpu, pc + 4);
- f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0));
- f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
- f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
- f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3);
- f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5);
-
- /* Record the fields for the semantic handler. */
- FLD (f_srcdst) = f_srcdst;
- FLD (f_optdisp) = f_optdisp;
- FLD (f_scale) = f_scale;
- FLD (i_abase) = & CPU (h_gr)[f_abase];
- FLD (i_index) = & CPU (h_gr)[f_index];
- FLD (i_dst) = & CPU (h_gr)[f_srcdst];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldt_indirect_index_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_abase) = f_abase;
- FLD (in_index) = f_index;
- FLD (out_dst) = f_srcdst;
- FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_1) = ((FLD (f_srcdst)) + (1));
- FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_2) = ((FLD (f_srcdst)) + (2));
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_ldq_offset:
- {
- const IDESC *idesc = &i960base_insn_data[itype];
- CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
- UINT f_srcdst;
- UINT f_offset;
-
- f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
- f_offset = EXTRACT_MSB0_UINT (insn, 32, 20, 12);
-
- /* Record the fields for the semantic handler. */
- FLD (f_srcdst) = f_srcdst;
- FLD (f_offset) = f_offset;
- FLD (i_dst) = & CPU (h_gr)[f_srcdst];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldq_offset", "f_srcdst 0x%x", 'x', f_srcdst, "f_offset 0x%x", 'x', f_offset, "dst 0x%x", 'x', f_srcdst, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (out_dst) = f_srcdst;
- FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_1) = ((FLD (f_srcdst)) + (1));
- FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_2) = ((FLD (f_srcdst)) + (2));
- FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_3) = ((FLD (f_srcdst)) + (3));
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_ldq_indirect_offset:
- {
- const IDESC *idesc = &i960base_insn_data[itype];
- CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
- UINT f_srcdst;
- UINT f_abase;
- UINT f_offset;
-
- f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
- f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
- f_offset = EXTRACT_MSB0_UINT (insn, 32, 20, 12);
-
- /* Record the fields for the semantic handler. */
- FLD (f_srcdst) = f_srcdst;
- FLD (f_offset) = f_offset;
- FLD (i_abase) = & CPU (h_gr)[f_abase];
- FLD (i_dst) = & CPU (h_gr)[f_srcdst];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldq_indirect_offset", "f_srcdst 0x%x", 'x', f_srcdst, "f_offset 0x%x", 'x', f_offset, "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_abase) = f_abase;
- FLD (out_dst) = f_srcdst;
- FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_1) = ((FLD (f_srcdst)) + (1));
- FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_2) = ((FLD (f_srcdst)) + (2));
- FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_3) = ((FLD (f_srcdst)) + (3));
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_ldq_indirect:
- {
- const IDESC *idesc = &i960base_insn_data[itype];
- CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
- UINT f_srcdst;
- UINT f_abase;
-
- f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
- f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
-
- /* Record the fields for the semantic handler. */
- FLD (f_srcdst) = f_srcdst;
- FLD (i_abase) = & CPU (h_gr)[f_abase];
- FLD (i_dst) = & CPU (h_gr)[f_srcdst];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldq_indirect", "f_srcdst 0x%x", 'x', f_srcdst, "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_abase) = f_abase;
- FLD (out_dst) = f_srcdst;
- FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_1) = ((FLD (f_srcdst)) + (1));
- FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_2) = ((FLD (f_srcdst)) + (2));
- FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_3) = ((FLD (f_srcdst)) + (3));
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_ldq_indirect_index:
- {
- const IDESC *idesc = &i960base_insn_data[itype];
- CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- UINT f_srcdst;
- UINT f_abase;
- UINT f_scale;
- UINT f_index;
-
- f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
- f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
- f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3);
- f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5);
-
- /* Record the fields for the semantic handler. */
- FLD (f_srcdst) = f_srcdst;
- FLD (f_scale) = f_scale;
- FLD (i_abase) = & CPU (h_gr)[f_abase];
- FLD (i_index) = & CPU (h_gr)[f_index];
- FLD (i_dst) = & CPU (h_gr)[f_srcdst];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldq_indirect_index", "f_srcdst 0x%x", 'x', f_srcdst, "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_abase) = f_abase;
- FLD (in_index) = f_index;
- FLD (out_dst) = f_srcdst;
- FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_1) = ((FLD (f_srcdst)) + (1));
- FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_2) = ((FLD (f_srcdst)) + (2));
- FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_3) = ((FLD (f_srcdst)) + (3));
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_ldq_disp:
- {
- const IDESC *idesc = &i960base_insn_data[itype];
- CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- UINT f_optdisp;
- UINT f_srcdst;
- /* Contents of trailing part of insn. */
- UINT word_1;
-
- word_1 = GETIMEMUSI (current_cpu, pc + 4);
- f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0));
- f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
-
- /* Record the fields for the semantic handler. */
- FLD (f_srcdst) = f_srcdst;
- FLD (f_optdisp) = f_optdisp;
- FLD (i_dst) = & CPU (h_gr)[f_srcdst];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldq_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "dst 0x%x", 'x', f_srcdst, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (out_dst) = f_srcdst;
- FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_1) = ((FLD (f_srcdst)) + (1));
- FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_2) = ((FLD (f_srcdst)) + (2));
- FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_3) = ((FLD (f_srcdst)) + (3));
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_ldq_indirect_disp:
- {
- const IDESC *idesc = &i960base_insn_data[itype];
- CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- UINT f_optdisp;
- UINT f_srcdst;
- UINT f_abase;
- /* Contents of trailing part of insn. */
- UINT word_1;
-
- word_1 = GETIMEMUSI (current_cpu, pc + 4);
- f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0));
- f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
- f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
-
- /* Record the fields for the semantic handler. */
- FLD (f_srcdst) = f_srcdst;
- FLD (f_optdisp) = f_optdisp;
- FLD (i_abase) = & CPU (h_gr)[f_abase];
- FLD (i_dst) = & CPU (h_gr)[f_srcdst];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldq_indirect_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "abase 0x%x", 'x', f_abase, "dst 0x%x", 'x', f_srcdst, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_abase) = f_abase;
- FLD (out_dst) = f_srcdst;
- FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_1) = ((FLD (f_srcdst)) + (1));
- FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_2) = ((FLD (f_srcdst)) + (2));
- FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_3) = ((FLD (f_srcdst)) + (3));
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_ldq_index_disp:
- {
- const IDESC *idesc = &i960base_insn_data[itype];
- CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- UINT f_optdisp;
- UINT f_srcdst;
- UINT f_scale;
- UINT f_index;
- /* Contents of trailing part of insn. */
- UINT word_1;
-
- word_1 = GETIMEMUSI (current_cpu, pc + 4);
- f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0));
- f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
- f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3);
- f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5);
-
- /* Record the fields for the semantic handler. */
- FLD (f_srcdst) = f_srcdst;
- FLD (f_optdisp) = f_optdisp;
- FLD (f_scale) = f_scale;
- FLD (i_index) = & CPU (h_gr)[f_index];
- FLD (i_dst) = & CPU (h_gr)[f_srcdst];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldq_index_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_index) = f_index;
- FLD (out_dst) = f_srcdst;
- FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_1) = ((FLD (f_srcdst)) + (1));
- FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_2) = ((FLD (f_srcdst)) + (2));
- FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_3) = ((FLD (f_srcdst)) + (3));
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_ldq_indirect_index_disp:
- {
- const IDESC *idesc = &i960base_insn_data[itype];
- CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- UINT f_optdisp;
- UINT f_srcdst;
- UINT f_abase;
- UINT f_scale;
- UINT f_index;
- /* Contents of trailing part of insn. */
- UINT word_1;
-
- word_1 = GETIMEMUSI (current_cpu, pc + 4);
- f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0));
- f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
- f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
- f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3);
- f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5);
-
- /* Record the fields for the semantic handler. */
- FLD (f_srcdst) = f_srcdst;
- FLD (f_optdisp) = f_optdisp;
- FLD (f_scale) = f_scale;
- FLD (i_abase) = & CPU (h_gr)[f_abase];
- FLD (i_index) = & CPU (h_gr)[f_index];
- FLD (i_dst) = & CPU (h_gr)[f_srcdst];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldq_indirect_index_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "dst 0x%x", 'x', f_srcdst, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_abase) = f_abase;
- FLD (in_index) = f_index;
- FLD (out_dst) = f_srcdst;
- FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_1) = ((FLD (f_srcdst)) + (1));
- FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_2) = ((FLD (f_srcdst)) + (2));
- FLD (out_h_gr_add__DFLT_index_of__DFLT_dst_3) = ((FLD (f_srcdst)) + (3));
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_st_offset:
- {
- const IDESC *idesc = &i960base_insn_data[itype];
- CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
- UINT f_srcdst;
- UINT f_offset;
-
- f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
- f_offset = EXTRACT_MSB0_UINT (insn, 32, 20, 12);
-
- /* Record the fields for the semantic handler. */
- FLD (f_offset) = f_offset;
- FLD (i_st_src) = & CPU (h_gr)[f_srcdst];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_st_offset", "f_offset 0x%x", 'x', f_offset, "st_src 0x%x", 'x', f_srcdst, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_st_src) = f_srcdst;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_st_indirect_offset:
- {
- const IDESC *idesc = &i960base_insn_data[itype];
- CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
- UINT f_srcdst;
- UINT f_abase;
- UINT f_offset;
-
- f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
- f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
- f_offset = EXTRACT_MSB0_UINT (insn, 32, 20, 12);
-
- /* Record the fields for the semantic handler. */
- FLD (f_offset) = f_offset;
- FLD (i_abase) = & CPU (h_gr)[f_abase];
- FLD (i_st_src) = & CPU (h_gr)[f_srcdst];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_st_indirect_offset", "f_offset 0x%x", 'x', f_offset, "abase 0x%x", 'x', f_abase, "st_src 0x%x", 'x', f_srcdst, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_abase) = f_abase;
- FLD (in_st_src) = f_srcdst;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_st_indirect:
- {
- const IDESC *idesc = &i960base_insn_data[itype];
- CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
- UINT f_srcdst;
- UINT f_abase;
-
- f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
- f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
-
- /* Record the fields for the semantic handler. */
- FLD (i_abase) = & CPU (h_gr)[f_abase];
- FLD (i_st_src) = & CPU (h_gr)[f_srcdst];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_st_indirect", "abase 0x%x", 'x', f_abase, "st_src 0x%x", 'x', f_srcdst, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_abase) = f_abase;
- FLD (in_st_src) = f_srcdst;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_st_indirect_index:
- {
- const IDESC *idesc = &i960base_insn_data[itype];
- CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- UINT f_srcdst;
- UINT f_abase;
- UINT f_scale;
- UINT f_index;
-
- f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
- f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
- f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3);
- f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5);
-
- /* Record the fields for the semantic handler. */
- FLD (f_scale) = f_scale;
- FLD (i_abase) = & CPU (h_gr)[f_abase];
- FLD (i_index) = & CPU (h_gr)[f_index];
- FLD (i_st_src) = & CPU (h_gr)[f_srcdst];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_st_indirect_index", "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "st_src 0x%x", 'x', f_srcdst, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_abase) = f_abase;
- FLD (in_index) = f_index;
- FLD (in_st_src) = f_srcdst;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_st_disp:
- {
- const IDESC *idesc = &i960base_insn_data[itype];
- CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- UINT f_optdisp;
- UINT f_srcdst;
- /* Contents of trailing part of insn. */
- UINT word_1;
-
- word_1 = GETIMEMUSI (current_cpu, pc + 4);
- f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0));
- f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
-
- /* Record the fields for the semantic handler. */
- FLD (f_optdisp) = f_optdisp;
- FLD (i_st_src) = & CPU (h_gr)[f_srcdst];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_st_disp", "f_optdisp 0x%x", 'x', f_optdisp, "st_src 0x%x", 'x', f_srcdst, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_st_src) = f_srcdst;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_st_indirect_disp:
- {
- const IDESC *idesc = &i960base_insn_data[itype];
- CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- UINT f_optdisp;
- UINT f_srcdst;
- UINT f_abase;
- /* Contents of trailing part of insn. */
- UINT word_1;
-
- word_1 = GETIMEMUSI (current_cpu, pc + 4);
- f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0));
- f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
- f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
-
- /* Record the fields for the semantic handler. */
- FLD (f_optdisp) = f_optdisp;
- FLD (i_abase) = & CPU (h_gr)[f_abase];
- FLD (i_st_src) = & CPU (h_gr)[f_srcdst];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_st_indirect_disp", "f_optdisp 0x%x", 'x', f_optdisp, "abase 0x%x", 'x', f_abase, "st_src 0x%x", 'x', f_srcdst, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_abase) = f_abase;
- FLD (in_st_src) = f_srcdst;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_st_index_disp:
- {
- const IDESC *idesc = &i960base_insn_data[itype];
- CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- UINT f_optdisp;
- UINT f_srcdst;
- UINT f_scale;
- UINT f_index;
- /* Contents of trailing part of insn. */
- UINT word_1;
-
- word_1 = GETIMEMUSI (current_cpu, pc + 4);
- f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0));
- f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
- f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3);
- f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5);
-
- /* Record the fields for the semantic handler. */
- FLD (f_optdisp) = f_optdisp;
- FLD (f_scale) = f_scale;
- FLD (i_index) = & CPU (h_gr)[f_index];
- FLD (i_st_src) = & CPU (h_gr)[f_srcdst];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_st_index_disp", "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "index 0x%x", 'x', f_index, "st_src 0x%x", 'x', f_srcdst, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_index) = f_index;
- FLD (in_st_src) = f_srcdst;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_st_indirect_index_disp:
- {
- const IDESC *idesc = &i960base_insn_data[itype];
- CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- UINT f_optdisp;
- UINT f_srcdst;
- UINT f_abase;
- UINT f_scale;
- UINT f_index;
- /* Contents of trailing part of insn. */
- UINT word_1;
-
- word_1 = GETIMEMUSI (current_cpu, pc + 4);
- f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0));
- f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
- f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
- f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3);
- f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5);
-
- /* Record the fields for the semantic handler. */
- FLD (f_optdisp) = f_optdisp;
- FLD (f_scale) = f_scale;
- FLD (i_abase) = & CPU (h_gr)[f_abase];
- FLD (i_index) = & CPU (h_gr)[f_index];
- FLD (i_st_src) = & CPU (h_gr)[f_srcdst];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_st_indirect_index_disp", "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "st_src 0x%x", 'x', f_srcdst, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_abase) = f_abase;
- FLD (in_index) = f_index;
- FLD (in_st_src) = f_srcdst;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_stl_offset:
- {
- const IDESC *idesc = &i960base_insn_data[itype];
- CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
- UINT f_srcdst;
- UINT f_offset;
-
- f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
- f_offset = EXTRACT_MSB0_UINT (insn, 32, 20, 12);
-
- /* Record the fields for the semantic handler. */
- FLD (f_srcdst) = f_srcdst;
- FLD (f_offset) = f_offset;
- FLD (i_st_src) = & CPU (h_gr)[f_srcdst];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stl_offset", "f_srcdst 0x%x", 'x', f_srcdst, "f_offset 0x%x", 'x', f_offset, "st_src 0x%x", 'x', f_srcdst, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_h_gr_add__DFLT_index_of__DFLT_st_src_1) = ((FLD (f_srcdst)) + (1));
- FLD (in_st_src) = f_srcdst;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_stl_indirect_offset:
- {
- const IDESC *idesc = &i960base_insn_data[itype];
- CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
- UINT f_srcdst;
- UINT f_abase;
- UINT f_offset;
-
- f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
- f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
- f_offset = EXTRACT_MSB0_UINT (insn, 32, 20, 12);
-
- /* Record the fields for the semantic handler. */
- FLD (f_srcdst) = f_srcdst;
- FLD (f_offset) = f_offset;
- FLD (i_abase) = & CPU (h_gr)[f_abase];
- FLD (i_st_src) = & CPU (h_gr)[f_srcdst];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stl_indirect_offset", "f_srcdst 0x%x", 'x', f_srcdst, "f_offset 0x%x", 'x', f_offset, "abase 0x%x", 'x', f_abase, "st_src 0x%x", 'x', f_srcdst, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_abase) = f_abase;
- FLD (in_h_gr_add__DFLT_index_of__DFLT_st_src_1) = ((FLD (f_srcdst)) + (1));
- FLD (in_st_src) = f_srcdst;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_stl_indirect:
- {
- const IDESC *idesc = &i960base_insn_data[itype];
- CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
- UINT f_srcdst;
- UINT f_abase;
-
- f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
- f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
-
- /* Record the fields for the semantic handler. */
- FLD (f_srcdst) = f_srcdst;
- FLD (i_abase) = & CPU (h_gr)[f_abase];
- FLD (i_st_src) = & CPU (h_gr)[f_srcdst];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stl_indirect", "f_srcdst 0x%x", 'x', f_srcdst, "abase 0x%x", 'x', f_abase, "st_src 0x%x", 'x', f_srcdst, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_abase) = f_abase;
- FLD (in_h_gr_add__DFLT_index_of__DFLT_st_src_1) = ((FLD (f_srcdst)) + (1));
- FLD (in_st_src) = f_srcdst;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_stl_indirect_index:
- {
- const IDESC *idesc = &i960base_insn_data[itype];
- CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- UINT f_srcdst;
- UINT f_abase;
- UINT f_scale;
- UINT f_index;
-
- f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
- f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
- f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3);
- f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5);
-
- /* Record the fields for the semantic handler. */
- FLD (f_srcdst) = f_srcdst;
- FLD (f_scale) = f_scale;
- FLD (i_abase) = & CPU (h_gr)[f_abase];
- FLD (i_index) = & CPU (h_gr)[f_index];
- FLD (i_st_src) = & CPU (h_gr)[f_srcdst];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stl_indirect_index", "f_srcdst 0x%x", 'x', f_srcdst, "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "st_src 0x%x", 'x', f_srcdst, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_abase) = f_abase;
- FLD (in_h_gr_add__DFLT_index_of__DFLT_st_src_1) = ((FLD (f_srcdst)) + (1));
- FLD (in_index) = f_index;
- FLD (in_st_src) = f_srcdst;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_stl_disp:
- {
- const IDESC *idesc = &i960base_insn_data[itype];
- CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- UINT f_optdisp;
- UINT f_srcdst;
- /* Contents of trailing part of insn. */
- UINT word_1;
-
- word_1 = GETIMEMUSI (current_cpu, pc + 4);
- f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0));
- f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
-
- /* Record the fields for the semantic handler. */
- FLD (f_srcdst) = f_srcdst;
- FLD (f_optdisp) = f_optdisp;
- FLD (i_st_src) = & CPU (h_gr)[f_srcdst];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stl_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "st_src 0x%x", 'x', f_srcdst, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_h_gr_add__DFLT_index_of__DFLT_st_src_1) = ((FLD (f_srcdst)) + (1));
- FLD (in_st_src) = f_srcdst;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_stl_indirect_disp:
- {
- const IDESC *idesc = &i960base_insn_data[itype];
- CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- UINT f_optdisp;
- UINT f_srcdst;
- UINT f_abase;
- /* Contents of trailing part of insn. */
- UINT word_1;
-
- word_1 = GETIMEMUSI (current_cpu, pc + 4);
- f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0));
- f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
- f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
-
- /* Record the fields for the semantic handler. */
- FLD (f_srcdst) = f_srcdst;
- FLD (f_optdisp) = f_optdisp;
- FLD (i_abase) = & CPU (h_gr)[f_abase];
- FLD (i_st_src) = & CPU (h_gr)[f_srcdst];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stl_indirect_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "abase 0x%x", 'x', f_abase, "st_src 0x%x", 'x', f_srcdst, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_abase) = f_abase;
- FLD (in_h_gr_add__DFLT_index_of__DFLT_st_src_1) = ((FLD (f_srcdst)) + (1));
- FLD (in_st_src) = f_srcdst;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_stl_index_disp:
- {
- const IDESC *idesc = &i960base_insn_data[itype];
- CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- UINT f_optdisp;
- UINT f_srcdst;
- UINT f_scale;
- UINT f_index;
- /* Contents of trailing part of insn. */
- UINT word_1;
-
- word_1 = GETIMEMUSI (current_cpu, pc + 4);
- f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0));
- f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
- f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3);
- f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5);
-
- /* Record the fields for the semantic handler. */
- FLD (f_srcdst) = f_srcdst;
- FLD (f_optdisp) = f_optdisp;
- FLD (f_scale) = f_scale;
- FLD (i_index) = & CPU (h_gr)[f_index];
- FLD (i_st_src) = & CPU (h_gr)[f_srcdst];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stl_index_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "index 0x%x", 'x', f_index, "st_src 0x%x", 'x', f_srcdst, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_h_gr_add__DFLT_index_of__DFLT_st_src_1) = ((FLD (f_srcdst)) + (1));
- FLD (in_index) = f_index;
- FLD (in_st_src) = f_srcdst;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_stl_indirect_index_disp:
- {
- const IDESC *idesc = &i960base_insn_data[itype];
- CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- UINT f_optdisp;
- UINT f_srcdst;
- UINT f_abase;
- UINT f_scale;
- UINT f_index;
- /* Contents of trailing part of insn. */
- UINT word_1;
-
- word_1 = GETIMEMUSI (current_cpu, pc + 4);
- f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0));
- f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
- f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
- f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3);
- f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5);
-
- /* Record the fields for the semantic handler. */
- FLD (f_srcdst) = f_srcdst;
- FLD (f_optdisp) = f_optdisp;
- FLD (f_scale) = f_scale;
- FLD (i_abase) = & CPU (h_gr)[f_abase];
- FLD (i_index) = & CPU (h_gr)[f_index];
- FLD (i_st_src) = & CPU (h_gr)[f_srcdst];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stl_indirect_index_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "st_src 0x%x", 'x', f_srcdst, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_abase) = f_abase;
- FLD (in_h_gr_add__DFLT_index_of__DFLT_st_src_1) = ((FLD (f_srcdst)) + (1));
- FLD (in_index) = f_index;
- FLD (in_st_src) = f_srcdst;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_stt_offset:
- {
- const IDESC *idesc = &i960base_insn_data[itype];
- CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
- UINT f_srcdst;
- UINT f_offset;
-
- f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
- f_offset = EXTRACT_MSB0_UINT (insn, 32, 20, 12);
-
- /* Record the fields for the semantic handler. */
- FLD (f_srcdst) = f_srcdst;
- FLD (f_offset) = f_offset;
- FLD (i_st_src) = & CPU (h_gr)[f_srcdst];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stt_offset", "f_srcdst 0x%x", 'x', f_srcdst, "f_offset 0x%x", 'x', f_offset, "st_src 0x%x", 'x', f_srcdst, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_h_gr_add__DFLT_index_of__DFLT_st_src_1) = ((FLD (f_srcdst)) + (1));
- FLD (in_h_gr_add__DFLT_index_of__DFLT_st_src_2) = ((FLD (f_srcdst)) + (2));
- FLD (in_st_src) = f_srcdst;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_stt_indirect_offset:
- {
- const IDESC *idesc = &i960base_insn_data[itype];
- CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
- UINT f_srcdst;
- UINT f_abase;
- UINT f_offset;
-
- f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
- f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
- f_offset = EXTRACT_MSB0_UINT (insn, 32, 20, 12);
-
- /* Record the fields for the semantic handler. */
- FLD (f_srcdst) = f_srcdst;
- FLD (f_offset) = f_offset;
- FLD (i_abase) = & CPU (h_gr)[f_abase];
- FLD (i_st_src) = & CPU (h_gr)[f_srcdst];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stt_indirect_offset", "f_srcdst 0x%x", 'x', f_srcdst, "f_offset 0x%x", 'x', f_offset, "abase 0x%x", 'x', f_abase, "st_src 0x%x", 'x', f_srcdst, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_abase) = f_abase;
- FLD (in_h_gr_add__DFLT_index_of__DFLT_st_src_1) = ((FLD (f_srcdst)) + (1));
- FLD (in_h_gr_add__DFLT_index_of__DFLT_st_src_2) = ((FLD (f_srcdst)) + (2));
- FLD (in_st_src) = f_srcdst;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_stt_indirect:
- {
- const IDESC *idesc = &i960base_insn_data[itype];
- CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
- UINT f_srcdst;
- UINT f_abase;
-
- f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
- f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
-
- /* Record the fields for the semantic handler. */
- FLD (f_srcdst) = f_srcdst;
- FLD (i_abase) = & CPU (h_gr)[f_abase];
- FLD (i_st_src) = & CPU (h_gr)[f_srcdst];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stt_indirect", "f_srcdst 0x%x", 'x', f_srcdst, "abase 0x%x", 'x', f_abase, "st_src 0x%x", 'x', f_srcdst, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_abase) = f_abase;
- FLD (in_h_gr_add__DFLT_index_of__DFLT_st_src_1) = ((FLD (f_srcdst)) + (1));
- FLD (in_h_gr_add__DFLT_index_of__DFLT_st_src_2) = ((FLD (f_srcdst)) + (2));
- FLD (in_st_src) = f_srcdst;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_stt_indirect_index:
- {
- const IDESC *idesc = &i960base_insn_data[itype];
- CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- UINT f_srcdst;
- UINT f_abase;
- UINT f_scale;
- UINT f_index;
-
- f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
- f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
- f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3);
- f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5);
-
- /* Record the fields for the semantic handler. */
- FLD (f_srcdst) = f_srcdst;
- FLD (f_scale) = f_scale;
- FLD (i_abase) = & CPU (h_gr)[f_abase];
- FLD (i_index) = & CPU (h_gr)[f_index];
- FLD (i_st_src) = & CPU (h_gr)[f_srcdst];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stt_indirect_index", "f_srcdst 0x%x", 'x', f_srcdst, "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "st_src 0x%x", 'x', f_srcdst, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_abase) = f_abase;
- FLD (in_h_gr_add__DFLT_index_of__DFLT_st_src_1) = ((FLD (f_srcdst)) + (1));
- FLD (in_h_gr_add__DFLT_index_of__DFLT_st_src_2) = ((FLD (f_srcdst)) + (2));
- FLD (in_index) = f_index;
- FLD (in_st_src) = f_srcdst;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_stt_disp:
- {
- const IDESC *idesc = &i960base_insn_data[itype];
- CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- UINT f_optdisp;
- UINT f_srcdst;
- /* Contents of trailing part of insn. */
- UINT word_1;
-
- word_1 = GETIMEMUSI (current_cpu, pc + 4);
- f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0));
- f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
-
- /* Record the fields for the semantic handler. */
- FLD (f_srcdst) = f_srcdst;
- FLD (f_optdisp) = f_optdisp;
- FLD (i_st_src) = & CPU (h_gr)[f_srcdst];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stt_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "st_src 0x%x", 'x', f_srcdst, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_h_gr_add__DFLT_index_of__DFLT_st_src_1) = ((FLD (f_srcdst)) + (1));
- FLD (in_h_gr_add__DFLT_index_of__DFLT_st_src_2) = ((FLD (f_srcdst)) + (2));
- FLD (in_st_src) = f_srcdst;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_stt_indirect_disp:
- {
- const IDESC *idesc = &i960base_insn_data[itype];
- CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- UINT f_optdisp;
- UINT f_srcdst;
- UINT f_abase;
- /* Contents of trailing part of insn. */
- UINT word_1;
-
- word_1 = GETIMEMUSI (current_cpu, pc + 4);
- f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0));
- f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
- f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
-
- /* Record the fields for the semantic handler. */
- FLD (f_srcdst) = f_srcdst;
- FLD (f_optdisp) = f_optdisp;
- FLD (i_abase) = & CPU (h_gr)[f_abase];
- FLD (i_st_src) = & CPU (h_gr)[f_srcdst];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stt_indirect_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "abase 0x%x", 'x', f_abase, "st_src 0x%x", 'x', f_srcdst, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_abase) = f_abase;
- FLD (in_h_gr_add__DFLT_index_of__DFLT_st_src_1) = ((FLD (f_srcdst)) + (1));
- FLD (in_h_gr_add__DFLT_index_of__DFLT_st_src_2) = ((FLD (f_srcdst)) + (2));
- FLD (in_st_src) = f_srcdst;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_stt_index_disp:
- {
- const IDESC *idesc = &i960base_insn_data[itype];
- CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- UINT f_optdisp;
- UINT f_srcdst;
- UINT f_scale;
- UINT f_index;
- /* Contents of trailing part of insn. */
- UINT word_1;
-
- word_1 = GETIMEMUSI (current_cpu, pc + 4);
- f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0));
- f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
- f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3);
- f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5);
-
- /* Record the fields for the semantic handler. */
- FLD (f_srcdst) = f_srcdst;
- FLD (f_optdisp) = f_optdisp;
- FLD (f_scale) = f_scale;
- FLD (i_index) = & CPU (h_gr)[f_index];
- FLD (i_st_src) = & CPU (h_gr)[f_srcdst];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stt_index_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "index 0x%x", 'x', f_index, "st_src 0x%x", 'x', f_srcdst, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_h_gr_add__DFLT_index_of__DFLT_st_src_1) = ((FLD (f_srcdst)) + (1));
- FLD (in_h_gr_add__DFLT_index_of__DFLT_st_src_2) = ((FLD (f_srcdst)) + (2));
- FLD (in_index) = f_index;
- FLD (in_st_src) = f_srcdst;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_stt_indirect_index_disp:
- {
- const IDESC *idesc = &i960base_insn_data[itype];
- CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- UINT f_optdisp;
- UINT f_srcdst;
- UINT f_abase;
- UINT f_scale;
- UINT f_index;
- /* Contents of trailing part of insn. */
- UINT word_1;
-
- word_1 = GETIMEMUSI (current_cpu, pc + 4);
- f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0));
- f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
- f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
- f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3);
- f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5);
-
- /* Record the fields for the semantic handler. */
- FLD (f_srcdst) = f_srcdst;
- FLD (f_optdisp) = f_optdisp;
- FLD (f_scale) = f_scale;
- FLD (i_abase) = & CPU (h_gr)[f_abase];
- FLD (i_index) = & CPU (h_gr)[f_index];
- FLD (i_st_src) = & CPU (h_gr)[f_srcdst];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stt_indirect_index_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "st_src 0x%x", 'x', f_srcdst, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_abase) = f_abase;
- FLD (in_h_gr_add__DFLT_index_of__DFLT_st_src_1) = ((FLD (f_srcdst)) + (1));
- FLD (in_h_gr_add__DFLT_index_of__DFLT_st_src_2) = ((FLD (f_srcdst)) + (2));
- FLD (in_index) = f_index;
- FLD (in_st_src) = f_srcdst;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_stq_offset:
- {
- const IDESC *idesc = &i960base_insn_data[itype];
- CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
- UINT f_srcdst;
- UINT f_offset;
-
- f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
- f_offset = EXTRACT_MSB0_UINT (insn, 32, 20, 12);
-
- /* Record the fields for the semantic handler. */
- FLD (f_srcdst) = f_srcdst;
- FLD (f_offset) = f_offset;
- FLD (i_st_src) = & CPU (h_gr)[f_srcdst];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stq_offset", "f_srcdst 0x%x", 'x', f_srcdst, "f_offset 0x%x", 'x', f_offset, "st_src 0x%x", 'x', f_srcdst, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_h_gr_add__DFLT_index_of__DFLT_st_src_1) = ((FLD (f_srcdst)) + (1));
- FLD (in_h_gr_add__DFLT_index_of__DFLT_st_src_2) = ((FLD (f_srcdst)) + (2));
- FLD (in_h_gr_add__DFLT_index_of__DFLT_st_src_3) = ((FLD (f_srcdst)) + (3));
- FLD (in_st_src) = f_srcdst;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_stq_indirect_offset:
- {
- const IDESC *idesc = &i960base_insn_data[itype];
- CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
- UINT f_srcdst;
- UINT f_abase;
- UINT f_offset;
-
- f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
- f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
- f_offset = EXTRACT_MSB0_UINT (insn, 32, 20, 12);
-
- /* Record the fields for the semantic handler. */
- FLD (f_srcdst) = f_srcdst;
- FLD (f_offset) = f_offset;
- FLD (i_abase) = & CPU (h_gr)[f_abase];
- FLD (i_st_src) = & CPU (h_gr)[f_srcdst];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stq_indirect_offset", "f_srcdst 0x%x", 'x', f_srcdst, "f_offset 0x%x", 'x', f_offset, "abase 0x%x", 'x', f_abase, "st_src 0x%x", 'x', f_srcdst, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_abase) = f_abase;
- FLD (in_h_gr_add__DFLT_index_of__DFLT_st_src_1) = ((FLD (f_srcdst)) + (1));
- FLD (in_h_gr_add__DFLT_index_of__DFLT_st_src_2) = ((FLD (f_srcdst)) + (2));
- FLD (in_h_gr_add__DFLT_index_of__DFLT_st_src_3) = ((FLD (f_srcdst)) + (3));
- FLD (in_st_src) = f_srcdst;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_stq_indirect:
- {
- const IDESC *idesc = &i960base_insn_data[itype];
- CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
- UINT f_srcdst;
- UINT f_abase;
-
- f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
- f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
-
- /* Record the fields for the semantic handler. */
- FLD (f_srcdst) = f_srcdst;
- FLD (i_abase) = & CPU (h_gr)[f_abase];
- FLD (i_st_src) = & CPU (h_gr)[f_srcdst];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stq_indirect", "f_srcdst 0x%x", 'x', f_srcdst, "abase 0x%x", 'x', f_abase, "st_src 0x%x", 'x', f_srcdst, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_abase) = f_abase;
- FLD (in_h_gr_add__DFLT_index_of__DFLT_st_src_1) = ((FLD (f_srcdst)) + (1));
- FLD (in_h_gr_add__DFLT_index_of__DFLT_st_src_2) = ((FLD (f_srcdst)) + (2));
- FLD (in_h_gr_add__DFLT_index_of__DFLT_st_src_3) = ((FLD (f_srcdst)) + (3));
- FLD (in_st_src) = f_srcdst;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_stq_indirect_index:
- {
- const IDESC *idesc = &i960base_insn_data[itype];
- CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- UINT f_srcdst;
- UINT f_abase;
- UINT f_scale;
- UINT f_index;
-
- f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
- f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
- f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3);
- f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5);
-
- /* Record the fields for the semantic handler. */
- FLD (f_srcdst) = f_srcdst;
- FLD (f_scale) = f_scale;
- FLD (i_abase) = & CPU (h_gr)[f_abase];
- FLD (i_index) = & CPU (h_gr)[f_index];
- FLD (i_st_src) = & CPU (h_gr)[f_srcdst];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stq_indirect_index", "f_srcdst 0x%x", 'x', f_srcdst, "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "st_src 0x%x", 'x', f_srcdst, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_abase) = f_abase;
- FLD (in_h_gr_add__DFLT_index_of__DFLT_st_src_1) = ((FLD (f_srcdst)) + (1));
- FLD (in_h_gr_add__DFLT_index_of__DFLT_st_src_2) = ((FLD (f_srcdst)) + (2));
- FLD (in_h_gr_add__DFLT_index_of__DFLT_st_src_3) = ((FLD (f_srcdst)) + (3));
- FLD (in_index) = f_index;
- FLD (in_st_src) = f_srcdst;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_stq_disp:
- {
- const IDESC *idesc = &i960base_insn_data[itype];
- CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- UINT f_optdisp;
- UINT f_srcdst;
- /* Contents of trailing part of insn. */
- UINT word_1;
-
- word_1 = GETIMEMUSI (current_cpu, pc + 4);
- f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0));
- f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
-
- /* Record the fields for the semantic handler. */
- FLD (f_srcdst) = f_srcdst;
- FLD (f_optdisp) = f_optdisp;
- FLD (i_st_src) = & CPU (h_gr)[f_srcdst];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stq_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "st_src 0x%x", 'x', f_srcdst, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_h_gr_add__DFLT_index_of__DFLT_st_src_1) = ((FLD (f_srcdst)) + (1));
- FLD (in_h_gr_add__DFLT_index_of__DFLT_st_src_2) = ((FLD (f_srcdst)) + (2));
- FLD (in_h_gr_add__DFLT_index_of__DFLT_st_src_3) = ((FLD (f_srcdst)) + (3));
- FLD (in_st_src) = f_srcdst;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_stq_indirect_disp:
- {
- const IDESC *idesc = &i960base_insn_data[itype];
- CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- UINT f_optdisp;
- UINT f_srcdst;
- UINT f_abase;
- /* Contents of trailing part of insn. */
- UINT word_1;
-
- word_1 = GETIMEMUSI (current_cpu, pc + 4);
- f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0));
- f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
- f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
-
- /* Record the fields for the semantic handler. */
- FLD (f_srcdst) = f_srcdst;
- FLD (f_optdisp) = f_optdisp;
- FLD (i_abase) = & CPU (h_gr)[f_abase];
- FLD (i_st_src) = & CPU (h_gr)[f_srcdst];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stq_indirect_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "abase 0x%x", 'x', f_abase, "st_src 0x%x", 'x', f_srcdst, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_abase) = f_abase;
- FLD (in_h_gr_add__DFLT_index_of__DFLT_st_src_1) = ((FLD (f_srcdst)) + (1));
- FLD (in_h_gr_add__DFLT_index_of__DFLT_st_src_2) = ((FLD (f_srcdst)) + (2));
- FLD (in_h_gr_add__DFLT_index_of__DFLT_st_src_3) = ((FLD (f_srcdst)) + (3));
- FLD (in_st_src) = f_srcdst;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_stq_index_disp:
- {
- const IDESC *idesc = &i960base_insn_data[itype];
- CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- UINT f_optdisp;
- UINT f_srcdst;
- UINT f_scale;
- UINT f_index;
- /* Contents of trailing part of insn. */
- UINT word_1;
-
- word_1 = GETIMEMUSI (current_cpu, pc + 4);
- f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0));
- f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
- f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3);
- f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5);
-
- /* Record the fields for the semantic handler. */
- FLD (f_srcdst) = f_srcdst;
- FLD (f_optdisp) = f_optdisp;
- FLD (f_scale) = f_scale;
- FLD (i_index) = & CPU (h_gr)[f_index];
- FLD (i_st_src) = & CPU (h_gr)[f_srcdst];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stq_index_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "index 0x%x", 'x', f_index, "st_src 0x%x", 'x', f_srcdst, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_h_gr_add__DFLT_index_of__DFLT_st_src_1) = ((FLD (f_srcdst)) + (1));
- FLD (in_h_gr_add__DFLT_index_of__DFLT_st_src_2) = ((FLD (f_srcdst)) + (2));
- FLD (in_h_gr_add__DFLT_index_of__DFLT_st_src_3) = ((FLD (f_srcdst)) + (3));
- FLD (in_index) = f_index;
- FLD (in_st_src) = f_srcdst;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_stq_indirect_index_disp:
- {
- const IDESC *idesc = &i960base_insn_data[itype];
- CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- UINT f_optdisp;
- UINT f_srcdst;
- UINT f_abase;
- UINT f_scale;
- UINT f_index;
- /* Contents of trailing part of insn. */
- UINT word_1;
-
- word_1 = GETIMEMUSI (current_cpu, pc + 4);
- f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0));
- f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
- f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
- f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3);
- f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5);
-
- /* Record the fields for the semantic handler. */
- FLD (f_srcdst) = f_srcdst;
- FLD (f_optdisp) = f_optdisp;
- FLD (f_scale) = f_scale;
- FLD (i_abase) = & CPU (h_gr)[f_abase];
- FLD (i_index) = & CPU (h_gr)[f_index];
- FLD (i_st_src) = & CPU (h_gr)[f_srcdst];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stq_indirect_index_disp", "f_srcdst 0x%x", 'x', f_srcdst, "f_optdisp 0x%x", 'x', f_optdisp, "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, "st_src 0x%x", 'x', f_srcdst, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_abase) = f_abase;
- FLD (in_h_gr_add__DFLT_index_of__DFLT_st_src_1) = ((FLD (f_srcdst)) + (1));
- FLD (in_h_gr_add__DFLT_index_of__DFLT_st_src_2) = ((FLD (f_srcdst)) + (2));
- FLD (in_h_gr_add__DFLT_index_of__DFLT_st_src_3) = ((FLD (f_srcdst)) + (3));
- FLD (in_index) = f_index;
- FLD (in_st_src) = f_srcdst;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_cmpobe_reg:
- {
- const IDESC *idesc = &i960base_insn_data[itype];
- CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f
- UINT f_br_src1;
- UINT f_br_src2;
- SI f_br_disp;
-
- f_br_src1 = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
- f_br_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
- f_br_disp = ((((EXTRACT_MSB0_INT (insn, 32, 19, 11)) << (2))) + (pc));
-
- /* Record the fields for the semantic handler. */
- FLD (i_br_disp) = f_br_disp;
- FLD (i_br_src1) = & CPU (h_gr)[f_br_src1];
- FLD (i_br_src2) = & CPU (h_gr)[f_br_src2];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_cmpobe_reg", "br_disp 0x%x", 'x', f_br_disp, "br_src1 0x%x", 'x', f_br_src1, "br_src2 0x%x", 'x', f_br_src2, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_br_src1) = f_br_src1;
- FLD (in_br_src2) = f_br_src2;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_cmpobe_lit:
- {
- const IDESC *idesc = &i960base_insn_data[itype];
- CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f
- UINT f_br_src1;
- UINT f_br_src2;
- SI f_br_disp;
-
- f_br_src1 = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
- f_br_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
- f_br_disp = ((((EXTRACT_MSB0_INT (insn, 32, 19, 11)) << (2))) + (pc));
-
- /* Record the fields for the semantic handler. */
- FLD (f_br_src1) = f_br_src1;
- FLD (i_br_disp) = f_br_disp;
- FLD (i_br_src2) = & CPU (h_gr)[f_br_src2];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_cmpobe_lit", "f_br_src1 0x%x", 'x', f_br_src1, "br_disp 0x%x", 'x', f_br_disp, "br_src2 0x%x", 'x', f_br_src2, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_br_src2) = f_br_src2;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_cmpobl_reg:
- {
- const IDESC *idesc = &i960base_insn_data[itype];
- CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f
- UINT f_br_src1;
- UINT f_br_src2;
- SI f_br_disp;
-
- f_br_src1 = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
- f_br_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
- f_br_disp = ((((EXTRACT_MSB0_INT (insn, 32, 19, 11)) << (2))) + (pc));
-
- /* Record the fields for the semantic handler. */
- FLD (i_br_disp) = f_br_disp;
- FLD (i_br_src1) = & CPU (h_gr)[f_br_src1];
- FLD (i_br_src2) = & CPU (h_gr)[f_br_src2];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_cmpobl_reg", "br_disp 0x%x", 'x', f_br_disp, "br_src1 0x%x", 'x', f_br_src1, "br_src2 0x%x", 'x', f_br_src2, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_br_src1) = f_br_src1;
- FLD (in_br_src2) = f_br_src2;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_cmpobl_lit:
- {
- const IDESC *idesc = &i960base_insn_data[itype];
- CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f
- UINT f_br_src1;
- UINT f_br_src2;
- SI f_br_disp;
-
- f_br_src1 = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
- f_br_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
- f_br_disp = ((((EXTRACT_MSB0_INT (insn, 32, 19, 11)) << (2))) + (pc));
-
- /* Record the fields for the semantic handler. */
- FLD (f_br_src1) = f_br_src1;
- FLD (i_br_disp) = f_br_disp;
- FLD (i_br_src2) = & CPU (h_gr)[f_br_src2];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_cmpobl_lit", "f_br_src1 0x%x", 'x', f_br_src1, "br_disp 0x%x", 'x', f_br_disp, "br_src2 0x%x", 'x', f_br_src2, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_br_src2) = f_br_src2;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_bbc_reg:
- {
- const IDESC *idesc = &i960base_insn_data[itype];
- CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f
- UINT f_br_src1;
- UINT f_br_src2;
- SI f_br_disp;
-
- f_br_src1 = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
- f_br_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
- f_br_disp = ((((EXTRACT_MSB0_INT (insn, 32, 19, 11)) << (2))) + (pc));
-
- /* Record the fields for the semantic handler. */
- FLD (i_br_disp) = f_br_disp;
- FLD (i_br_src1) = & CPU (h_gr)[f_br_src1];
- FLD (i_br_src2) = & CPU (h_gr)[f_br_src2];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bbc_reg", "br_disp 0x%x", 'x', f_br_disp, "br_src1 0x%x", 'x', f_br_src1, "br_src2 0x%x", 'x', f_br_src2, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_br_src1) = f_br_src1;
- FLD (in_br_src2) = f_br_src2;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_bbc_lit:
- {
- const IDESC *idesc = &i960base_insn_data[itype];
- CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f
- UINT f_br_src1;
- UINT f_br_src2;
- SI f_br_disp;
-
- f_br_src1 = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
- f_br_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
- f_br_disp = ((((EXTRACT_MSB0_INT (insn, 32, 19, 11)) << (2))) + (pc));
-
- /* Record the fields for the semantic handler. */
- FLD (f_br_src1) = f_br_src1;
- FLD (i_br_disp) = f_br_disp;
- FLD (i_br_src2) = & CPU (h_gr)[f_br_src2];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bbc_lit", "f_br_src1 0x%x", 'x', f_br_src1, "br_disp 0x%x", 'x', f_br_disp, "br_src2 0x%x", 'x', f_br_src2, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_br_src2) = f_br_src2;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_cmpi:
- {
- const IDESC *idesc = &i960base_insn_data[itype];
- CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.sfmt_emul.f
- UINT f_src2;
- UINT f_src1;
-
- f_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
- f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5);
-
- /* Record the fields for the semantic handler. */
- FLD (i_src1) = & CPU (h_gr)[f_src1];
- FLD (i_src2) = & CPU (h_gr)[f_src2];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_cmpi", "src1 0x%x", 'x', f_src1, "src2 0x%x", 'x', f_src2, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_src1) = f_src1;
- FLD (in_src2) = f_src2;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_cmpi1:
- {
- const IDESC *idesc = &i960base_insn_data[itype];
- CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.sfmt_emul1.f
- UINT f_src2;
- UINT f_src1;
-
- f_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
- f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5);
-
- /* Record the fields for the semantic handler. */
- FLD (f_src1) = f_src1;
- FLD (i_src2) = & CPU (h_gr)[f_src2];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_cmpi1", "f_src1 0x%x", 'x', f_src1, "src2 0x%x", 'x', f_src2, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_src2) = f_src2;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_cmpi2:
- {
- const IDESC *idesc = &i960base_insn_data[itype];
- CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.sfmt_emul2.f
- UINT f_src2;
- UINT f_src1;
-
- f_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
- f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5);
-
- /* Record the fields for the semantic handler. */
- FLD (f_src2) = f_src2;
- FLD (i_src1) = & CPU (h_gr)[f_src1];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_cmpi2", "f_src2 0x%x", 'x', f_src2, "src1 0x%x", 'x', f_src1, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_src1) = f_src1;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_cmpi3:
- {
- const IDESC *idesc = &i960base_insn_data[itype];
- CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.sfmt_emul3.f
- UINT f_src2;
- UINT f_src1;
-
- f_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
- f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5);
-
- /* Record the fields for the semantic handler. */
- FLD (f_src1) = f_src1;
- FLD (f_src2) = f_src2;
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_cmpi3", "f_src1 0x%x", 'x', f_src1, "f_src2 0x%x", 'x', f_src2, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_cmpo:
- {
- const IDESC *idesc = &i960base_insn_data[itype];
- CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.sfmt_emul.f
- UINT f_src2;
- UINT f_src1;
-
- f_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
- f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5);
-
- /* Record the fields for the semantic handler. */
- FLD (i_src1) = & CPU (h_gr)[f_src1];
- FLD (i_src2) = & CPU (h_gr)[f_src2];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_cmpo", "src1 0x%x", 'x', f_src1, "src2 0x%x", 'x', f_src2, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_src1) = f_src1;
- FLD (in_src2) = f_src2;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_cmpo1:
- {
- const IDESC *idesc = &i960base_insn_data[itype];
- CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.sfmt_emul1.f
- UINT f_src2;
- UINT f_src1;
-
- f_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
- f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5);
-
- /* Record the fields for the semantic handler. */
- FLD (f_src1) = f_src1;
- FLD (i_src2) = & CPU (h_gr)[f_src2];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_cmpo1", "f_src1 0x%x", 'x', f_src1, "src2 0x%x", 'x', f_src2, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_src2) = f_src2;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_cmpo2:
- {
- const IDESC *idesc = &i960base_insn_data[itype];
- CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.sfmt_emul2.f
- UINT f_src2;
- UINT f_src1;
-
- f_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
- f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5);
-
- /* Record the fields for the semantic handler. */
- FLD (f_src2) = f_src2;
- FLD (i_src1) = & CPU (h_gr)[f_src1];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_cmpo2", "f_src2 0x%x", 'x', f_src2, "src1 0x%x", 'x', f_src1, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_src1) = f_src1;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_cmpo3:
- {
- const IDESC *idesc = &i960base_insn_data[itype];
- CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.sfmt_emul3.f
- UINT f_src2;
- UINT f_src1;
-
- f_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
- f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5);
-
- /* Record the fields for the semantic handler. */
- FLD (f_src1) = f_src1;
- FLD (f_src2) = f_src2;
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_cmpo3", "f_src1 0x%x", 'x', f_src1, "f_src2 0x%x", 'x', f_src2, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_testno_reg:
- {
- const IDESC *idesc = &i960base_insn_data[itype];
- CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.sfmt_testno_reg.f
- UINT f_br_src1;
-
- f_br_src1 = EXTRACT_MSB0_UINT (insn, 32, 8, 5);
-
- /* Record the fields for the semantic handler. */
- FLD (i_br_src1) = & CPU (h_gr)[f_br_src1];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_testno_reg", "br_src1 0x%x", 'x', f_br_src1, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (out_br_src1) = f_br_src1;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_bno:
- {
- const IDESC *idesc = &i960base_insn_data[itype];
- CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.sfmt_bno.f
- SI f_ctrl_disp;
-
- f_ctrl_disp = ((((EXTRACT_MSB0_INT (insn, 32, 8, 22)) << (2))) + (pc));
-
- /* Record the fields for the semantic handler. */
- FLD (i_ctrl_disp) = f_ctrl_disp;
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bno", "ctrl_disp 0x%x", 'x', f_ctrl_disp, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_b:
- {
- const IDESC *idesc = &i960base_insn_data[itype];
- CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.sfmt_bno.f
- SI f_ctrl_disp;
-
- f_ctrl_disp = ((((EXTRACT_MSB0_INT (insn, 32, 8, 22)) << (2))) + (pc));
-
- /* Record the fields for the semantic handler. */
- FLD (i_ctrl_disp) = f_ctrl_disp;
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_b", "ctrl_disp 0x%x", 'x', f_ctrl_disp, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_bx_indirect_offset:
- {
- const IDESC *idesc = &i960base_insn_data[itype];
- CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
- UINT f_abase;
- UINT f_offset;
-
- f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
- f_offset = EXTRACT_MSB0_UINT (insn, 32, 20, 12);
-
- /* Record the fields for the semantic handler. */
- FLD (f_offset) = f_offset;
- FLD (i_abase) = & CPU (h_gr)[f_abase];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bx_indirect_offset", "f_offset 0x%x", 'x', f_offset, "abase 0x%x", 'x', f_abase, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_abase) = f_abase;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_bx_indirect:
- {
- const IDESC *idesc = &i960base_insn_data[itype];
- CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
- UINT f_abase;
-
- f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
-
- /* Record the fields for the semantic handler. */
- FLD (i_abase) = & CPU (h_gr)[f_abase];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bx_indirect", "abase 0x%x", 'x', f_abase, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_abase) = f_abase;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_bx_indirect_index:
- {
- const IDESC *idesc = &i960base_insn_data[itype];
- CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- UINT f_abase;
- UINT f_scale;
- UINT f_index;
-
- f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
- f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3);
- f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5);
-
- /* Record the fields for the semantic handler. */
- FLD (f_scale) = f_scale;
- FLD (i_abase) = & CPU (h_gr)[f_abase];
- FLD (i_index) = & CPU (h_gr)[f_index];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bx_indirect_index", "f_scale 0x%x", 'x', f_scale, "abase 0x%x", 'x', f_abase, "index 0x%x", 'x', f_index, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_abase) = f_abase;
- FLD (in_index) = f_index;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_bx_disp:
- {
- const IDESC *idesc = &i960base_insn_data[itype];
- CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- UINT f_optdisp;
- /* Contents of trailing part of insn. */
- UINT word_1;
-
- word_1 = GETIMEMUSI (current_cpu, pc + 4);
- f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0));
-
- /* Record the fields for the semantic handler. */
- FLD (f_optdisp) = f_optdisp;
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bx_disp", "f_optdisp 0x%x", 'x', f_optdisp, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_bx_indirect_disp:
- {
- const IDESC *idesc = &i960base_insn_data[itype];
- CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- UINT f_optdisp;
- UINT f_abase;
- /* Contents of trailing part of insn. */
- UINT word_1;
-
- word_1 = GETIMEMUSI (current_cpu, pc + 4);
- f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0));
- f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
-
- /* Record the fields for the semantic handler. */
- FLD (f_optdisp) = f_optdisp;
- FLD (i_abase) = & CPU (h_gr)[f_abase];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bx_indirect_disp", "f_optdisp 0x%x", 'x', f_optdisp, "abase 0x%x", 'x', f_abase, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_abase) = f_abase;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_callx_disp:
- {
- const IDESC *idesc = &i960base_insn_data[itype];
- CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.sfmt_callx_disp.f
- UINT f_optdisp;
- /* Contents of trailing part of insn. */
- UINT word_1;
-
- word_1 = GETIMEMUSI (current_cpu, pc + 4);
- f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0));
-
- /* Record the fields for the semantic handler. */
- FLD (f_optdisp) = f_optdisp;
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_callx_disp", "f_optdisp 0x%x", 'x', f_optdisp, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_h_gr_0) = 0;
- FLD (in_h_gr_1) = 1;
- FLD (in_h_gr_10) = 10;
- FLD (in_h_gr_11) = 11;
- FLD (in_h_gr_12) = 12;
- FLD (in_h_gr_13) = 13;
- FLD (in_h_gr_14) = 14;
- FLD (in_h_gr_15) = 15;
- FLD (in_h_gr_2) = 2;
- FLD (in_h_gr_3) = 3;
- FLD (in_h_gr_31) = 31;
- FLD (in_h_gr_4) = 4;
- FLD (in_h_gr_5) = 5;
- FLD (in_h_gr_6) = 6;
- FLD (in_h_gr_7) = 7;
- FLD (in_h_gr_8) = 8;
- FLD (in_h_gr_9) = 9;
- FLD (out_h_gr_0) = 0;
- FLD (out_h_gr_1) = 1;
- FLD (out_h_gr_10) = 10;
- FLD (out_h_gr_11) = 11;
- FLD (out_h_gr_12) = 12;
- FLD (out_h_gr_13) = 13;
- FLD (out_h_gr_14) = 14;
- FLD (out_h_gr_15) = 15;
- FLD (out_h_gr_2) = 2;
- FLD (out_h_gr_3) = 3;
- FLD (out_h_gr_31) = 31;
- FLD (out_h_gr_4) = 4;
- FLD (out_h_gr_5) = 5;
- FLD (out_h_gr_6) = 6;
- FLD (out_h_gr_7) = 7;
- FLD (out_h_gr_8) = 8;
- FLD (out_h_gr_9) = 9;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_callx_indirect:
- {
- const IDESC *idesc = &i960base_insn_data[itype];
- CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.sfmt_callx_indirect_offset.f
- UINT f_abase;
-
- f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
-
- /* Record the fields for the semantic handler. */
- FLD (i_abase) = & CPU (h_gr)[f_abase];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_callx_indirect", "abase 0x%x", 'x', f_abase, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_abase) = f_abase;
- FLD (in_h_gr_0) = 0;
- FLD (in_h_gr_1) = 1;
- FLD (in_h_gr_10) = 10;
- FLD (in_h_gr_11) = 11;
- FLD (in_h_gr_12) = 12;
- FLD (in_h_gr_13) = 13;
- FLD (in_h_gr_14) = 14;
- FLD (in_h_gr_15) = 15;
- FLD (in_h_gr_2) = 2;
- FLD (in_h_gr_3) = 3;
- FLD (in_h_gr_31) = 31;
- FLD (in_h_gr_4) = 4;
- FLD (in_h_gr_5) = 5;
- FLD (in_h_gr_6) = 6;
- FLD (in_h_gr_7) = 7;
- FLD (in_h_gr_8) = 8;
- FLD (in_h_gr_9) = 9;
- FLD (out_h_gr_0) = 0;
- FLD (out_h_gr_1) = 1;
- FLD (out_h_gr_10) = 10;
- FLD (out_h_gr_11) = 11;
- FLD (out_h_gr_12) = 12;
- FLD (out_h_gr_13) = 13;
- FLD (out_h_gr_14) = 14;
- FLD (out_h_gr_15) = 15;
- FLD (out_h_gr_2) = 2;
- FLD (out_h_gr_3) = 3;
- FLD (out_h_gr_31) = 31;
- FLD (out_h_gr_4) = 4;
- FLD (out_h_gr_5) = 5;
- FLD (out_h_gr_6) = 6;
- FLD (out_h_gr_7) = 7;
- FLD (out_h_gr_8) = 8;
- FLD (out_h_gr_9) = 9;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_callx_indirect_offset:
- {
- const IDESC *idesc = &i960base_insn_data[itype];
- CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.sfmt_callx_indirect_offset.f
- UINT f_abase;
- UINT f_offset;
-
- f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5);
- f_offset = EXTRACT_MSB0_UINT (insn, 32, 20, 12);
-
- /* Record the fields for the semantic handler. */
- FLD (f_offset) = f_offset;
- FLD (i_abase) = & CPU (h_gr)[f_abase];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_callx_indirect_offset", "f_offset 0x%x", 'x', f_offset, "abase 0x%x", 'x', f_abase, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_abase) = f_abase;
- FLD (in_h_gr_0) = 0;
- FLD (in_h_gr_1) = 1;
- FLD (in_h_gr_10) = 10;
- FLD (in_h_gr_11) = 11;
- FLD (in_h_gr_12) = 12;
- FLD (in_h_gr_13) = 13;
- FLD (in_h_gr_14) = 14;
- FLD (in_h_gr_15) = 15;
- FLD (in_h_gr_2) = 2;
- FLD (in_h_gr_3) = 3;
- FLD (in_h_gr_31) = 31;
- FLD (in_h_gr_4) = 4;
- FLD (in_h_gr_5) = 5;
- FLD (in_h_gr_6) = 6;
- FLD (in_h_gr_7) = 7;
- FLD (in_h_gr_8) = 8;
- FLD (in_h_gr_9) = 9;
- FLD (out_h_gr_0) = 0;
- FLD (out_h_gr_1) = 1;
- FLD (out_h_gr_10) = 10;
- FLD (out_h_gr_11) = 11;
- FLD (out_h_gr_12) = 12;
- FLD (out_h_gr_13) = 13;
- FLD (out_h_gr_14) = 14;
- FLD (out_h_gr_15) = 15;
- FLD (out_h_gr_2) = 2;
- FLD (out_h_gr_3) = 3;
- FLD (out_h_gr_31) = 31;
- FLD (out_h_gr_4) = 4;
- FLD (out_h_gr_5) = 5;
- FLD (out_h_gr_6) = 6;
- FLD (out_h_gr_7) = 7;
- FLD (out_h_gr_8) = 8;
- FLD (out_h_gr_9) = 9;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_ret:
- {
- const IDESC *idesc = &i960base_insn_data[itype];
- CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.sfmt_callx_disp.f
-
-
- /* Record the fields for the semantic handler. */
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ret", (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_h_gr_0) = 0;
- FLD (in_h_gr_2) = 2;
- FLD (in_h_gr_31) = 31;
- FLD (out_h_gr_0) = 0;
- FLD (out_h_gr_1) = 1;
- FLD (out_h_gr_10) = 10;
- FLD (out_h_gr_11) = 11;
- FLD (out_h_gr_12) = 12;
- FLD (out_h_gr_13) = 13;
- FLD (out_h_gr_14) = 14;
- FLD (out_h_gr_15) = 15;
- FLD (out_h_gr_2) = 2;
- FLD (out_h_gr_3) = 3;
- FLD (out_h_gr_31) = 31;
- FLD (out_h_gr_4) = 4;
- FLD (out_h_gr_5) = 5;
- FLD (out_h_gr_6) = 6;
- FLD (out_h_gr_7) = 7;
- FLD (out_h_gr_8) = 8;
- FLD (out_h_gr_9) = 9;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_calls:
- {
- const IDESC *idesc = &i960base_insn_data[itype];
- CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.sfmt_emul2.f
- UINT f_src1;
-
- f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5);
-
- /* Record the fields for the semantic handler. */
- FLD (i_src1) = & CPU (h_gr)[f_src1];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_calls", "src1 0x%x", 'x', f_src1, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_src1) = f_src1;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_fmark:
- {
- const IDESC *idesc = &i960base_insn_data[itype];
- CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_empty.f
-
-
- /* Record the fields for the semantic handler. */
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_fmark", (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_flushreg:
- {
- const IDESC *idesc = &i960base_insn_data[itype];
- CGEN_INSN_INT insn = base_insn;
-#define FLD(f) abuf->fields.fmt_empty.f
-
-
- /* Record the fields for the semantic handler. */
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_flushreg", (char *) 0));
-
-#undef FLD
- return idesc;
- }
-
-}
diff --git a/sim/i960/decode.h b/sim/i960/decode.h
deleted file mode 100644
index e88e0274795..00000000000
--- a/sim/i960/decode.h
+++ /dev/null
@@ -1,160 +0,0 @@
-/* Decode header for i960base.
-
-THIS FILE IS MACHINE GENERATED WITH CGEN.
-
-Copyright (C) 1996, 1997, 1998, 1999 Free Software Foundation, Inc.
-
-This file is part of the GNU Simulators.
-
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License along
-with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
-*/
-
-#ifndef I960BASE_DECODE_H
-#define I960BASE_DECODE_H
-
-extern const IDESC *i960base_decode (SIM_CPU *, IADDR,
- CGEN_INSN_INT,
- ARGBUF *);
-extern void i960base_init_idesc_table (SIM_CPU *);
-extern void i960base_sem_init_idesc_table (SIM_CPU *);
-extern void i960base_semf_init_idesc_table (SIM_CPU *);
-
-/* Enum declaration for instructions in cpu family i960base. */
-typedef enum i960base_insn_type {
- I960BASE_INSN_X_INVALID, I960BASE_INSN_X_AFTER, I960BASE_INSN_X_BEFORE, I960BASE_INSN_X_CTI_CHAIN
- , I960BASE_INSN_X_CHAIN, I960BASE_INSN_X_BEGIN, I960BASE_INSN_MULO, I960BASE_INSN_MULO1
- , I960BASE_INSN_MULO2, I960BASE_INSN_MULO3, I960BASE_INSN_REMO, I960BASE_INSN_REMO1
- , I960BASE_INSN_REMO2, I960BASE_INSN_REMO3, I960BASE_INSN_DIVO, I960BASE_INSN_DIVO1
- , I960BASE_INSN_DIVO2, I960BASE_INSN_DIVO3, I960BASE_INSN_REMI, I960BASE_INSN_REMI1
- , I960BASE_INSN_REMI2, I960BASE_INSN_REMI3, I960BASE_INSN_DIVI, I960BASE_INSN_DIVI1
- , I960BASE_INSN_DIVI2, I960BASE_INSN_DIVI3, I960BASE_INSN_ADDO, I960BASE_INSN_ADDO1
- , I960BASE_INSN_ADDO2, I960BASE_INSN_ADDO3, I960BASE_INSN_SUBO, I960BASE_INSN_SUBO1
- , I960BASE_INSN_SUBO2, I960BASE_INSN_SUBO3, I960BASE_INSN_NOTBIT, I960BASE_INSN_NOTBIT1
- , I960BASE_INSN_NOTBIT2, I960BASE_INSN_NOTBIT3, I960BASE_INSN_AND, I960BASE_INSN_AND1
- , I960BASE_INSN_AND2, I960BASE_INSN_AND3, I960BASE_INSN_ANDNOT, I960BASE_INSN_ANDNOT1
- , I960BASE_INSN_ANDNOT2, I960BASE_INSN_ANDNOT3, I960BASE_INSN_SETBIT, I960BASE_INSN_SETBIT1
- , I960BASE_INSN_SETBIT2, I960BASE_INSN_SETBIT3, I960BASE_INSN_NOTAND, I960BASE_INSN_NOTAND1
- , I960BASE_INSN_NOTAND2, I960BASE_INSN_NOTAND3, I960BASE_INSN_XOR, I960BASE_INSN_XOR1
- , I960BASE_INSN_XOR2, I960BASE_INSN_XOR3, I960BASE_INSN_OR, I960BASE_INSN_OR1
- , I960BASE_INSN_OR2, I960BASE_INSN_OR3, I960BASE_INSN_NOR, I960BASE_INSN_NOR1
- , I960BASE_INSN_NOR2, I960BASE_INSN_NOR3, I960BASE_INSN_XNOR, I960BASE_INSN_XNOR1
- , I960BASE_INSN_XNOR2, I960BASE_INSN_XNOR3, I960BASE_INSN_NOT, I960BASE_INSN_NOT1
- , I960BASE_INSN_NOT2, I960BASE_INSN_NOT3, I960BASE_INSN_ORNOT, I960BASE_INSN_ORNOT1
- , I960BASE_INSN_ORNOT2, I960BASE_INSN_ORNOT3, I960BASE_INSN_CLRBIT, I960BASE_INSN_CLRBIT1
- , I960BASE_INSN_CLRBIT2, I960BASE_INSN_CLRBIT3, I960BASE_INSN_SHLO, I960BASE_INSN_SHLO1
- , I960BASE_INSN_SHLO2, I960BASE_INSN_SHLO3, I960BASE_INSN_SHRO, I960BASE_INSN_SHRO1
- , I960BASE_INSN_SHRO2, I960BASE_INSN_SHRO3, I960BASE_INSN_SHLI, I960BASE_INSN_SHLI1
- , I960BASE_INSN_SHLI2, I960BASE_INSN_SHLI3, I960BASE_INSN_SHRI, I960BASE_INSN_SHRI1
- , I960BASE_INSN_SHRI2, I960BASE_INSN_SHRI3, I960BASE_INSN_EMUL, I960BASE_INSN_EMUL1
- , I960BASE_INSN_EMUL2, I960BASE_INSN_EMUL3, I960BASE_INSN_MOV, I960BASE_INSN_MOV1
- , I960BASE_INSN_MOVL, I960BASE_INSN_MOVL1, I960BASE_INSN_MOVT, I960BASE_INSN_MOVT1
- , I960BASE_INSN_MOVQ, I960BASE_INSN_MOVQ1, I960BASE_INSN_MODPC, I960BASE_INSN_MODAC
- , I960BASE_INSN_LDA_OFFSET, I960BASE_INSN_LDA_INDIRECT_OFFSET, I960BASE_INSN_LDA_INDIRECT, I960BASE_INSN_LDA_INDIRECT_INDEX
- , I960BASE_INSN_LDA_DISP, I960BASE_INSN_LDA_INDIRECT_DISP, I960BASE_INSN_LDA_INDEX_DISP, I960BASE_INSN_LDA_INDIRECT_INDEX_DISP
- , I960BASE_INSN_LD_OFFSET, I960BASE_INSN_LD_INDIRECT_OFFSET, I960BASE_INSN_LD_INDIRECT, I960BASE_INSN_LD_INDIRECT_INDEX
- , I960BASE_INSN_LD_DISP, I960BASE_INSN_LD_INDIRECT_DISP, I960BASE_INSN_LD_INDEX_DISP, I960BASE_INSN_LD_INDIRECT_INDEX_DISP
- , I960BASE_INSN_LDOB_OFFSET, I960BASE_INSN_LDOB_INDIRECT_OFFSET, I960BASE_INSN_LDOB_INDIRECT, I960BASE_INSN_LDOB_INDIRECT_INDEX
- , I960BASE_INSN_LDOB_DISP, I960BASE_INSN_LDOB_INDIRECT_DISP, I960BASE_INSN_LDOB_INDEX_DISP, I960BASE_INSN_LDOB_INDIRECT_INDEX_DISP
- , I960BASE_INSN_LDOS_OFFSET, I960BASE_INSN_LDOS_INDIRECT_OFFSET, I960BASE_INSN_LDOS_INDIRECT, I960BASE_INSN_LDOS_INDIRECT_INDEX
- , I960BASE_INSN_LDOS_DISP, I960BASE_INSN_LDOS_INDIRECT_DISP, I960BASE_INSN_LDOS_INDEX_DISP, I960BASE_INSN_LDOS_INDIRECT_INDEX_DISP
- , I960BASE_INSN_LDIB_OFFSET, I960BASE_INSN_LDIB_INDIRECT_OFFSET, I960BASE_INSN_LDIB_INDIRECT, I960BASE_INSN_LDIB_INDIRECT_INDEX
- , I960BASE_INSN_LDIB_DISP, I960BASE_INSN_LDIB_INDIRECT_DISP, I960BASE_INSN_LDIB_INDEX_DISP, I960BASE_INSN_LDIB_INDIRECT_INDEX_DISP
- , I960BASE_INSN_LDIS_OFFSET, I960BASE_INSN_LDIS_INDIRECT_OFFSET, I960BASE_INSN_LDIS_INDIRECT, I960BASE_INSN_LDIS_INDIRECT_INDEX
- , I960BASE_INSN_LDIS_DISP, I960BASE_INSN_LDIS_INDIRECT_DISP, I960BASE_INSN_LDIS_INDEX_DISP, I960BASE_INSN_LDIS_INDIRECT_INDEX_DISP
- , I960BASE_INSN_LDL_OFFSET, I960BASE_INSN_LDL_INDIRECT_OFFSET, I960BASE_INSN_LDL_INDIRECT, I960BASE_INSN_LDL_INDIRECT_INDEX
- , I960BASE_INSN_LDL_DISP, I960BASE_INSN_LDL_INDIRECT_DISP, I960BASE_INSN_LDL_INDEX_DISP, I960BASE_INSN_LDL_INDIRECT_INDEX_DISP
- , I960BASE_INSN_LDT_OFFSET, I960BASE_INSN_LDT_INDIRECT_OFFSET, I960BASE_INSN_LDT_INDIRECT, I960BASE_INSN_LDT_INDIRECT_INDEX
- , I960BASE_INSN_LDT_DISP, I960BASE_INSN_LDT_INDIRECT_DISP, I960BASE_INSN_LDT_INDEX_DISP, I960BASE_INSN_LDT_INDIRECT_INDEX_DISP
- , I960BASE_INSN_LDQ_OFFSET, I960BASE_INSN_LDQ_INDIRECT_OFFSET, I960BASE_INSN_LDQ_INDIRECT, I960BASE_INSN_LDQ_INDIRECT_INDEX
- , I960BASE_INSN_LDQ_DISP, I960BASE_INSN_LDQ_INDIRECT_DISP, I960BASE_INSN_LDQ_INDEX_DISP, I960BASE_INSN_LDQ_INDIRECT_INDEX_DISP
- , I960BASE_INSN_ST_OFFSET, I960BASE_INSN_ST_INDIRECT_OFFSET, I960BASE_INSN_ST_INDIRECT, I960BASE_INSN_ST_INDIRECT_INDEX
- , I960BASE_INSN_ST_DISP, I960BASE_INSN_ST_INDIRECT_DISP, I960BASE_INSN_ST_INDEX_DISP, I960BASE_INSN_ST_INDIRECT_INDEX_DISP
- , I960BASE_INSN_STOB_OFFSET, I960BASE_INSN_STOB_INDIRECT_OFFSET, I960BASE_INSN_STOB_INDIRECT, I960BASE_INSN_STOB_INDIRECT_INDEX
- , I960BASE_INSN_STOB_DISP, I960BASE_INSN_STOB_INDIRECT_DISP, I960BASE_INSN_STOB_INDEX_DISP, I960BASE_INSN_STOB_INDIRECT_INDEX_DISP
- , I960BASE_INSN_STOS_OFFSET, I960BASE_INSN_STOS_INDIRECT_OFFSET, I960BASE_INSN_STOS_INDIRECT, I960BASE_INSN_STOS_INDIRECT_INDEX
- , I960BASE_INSN_STOS_DISP, I960BASE_INSN_STOS_INDIRECT_DISP, I960BASE_INSN_STOS_INDEX_DISP, I960BASE_INSN_STOS_INDIRECT_INDEX_DISP
- , I960BASE_INSN_STL_OFFSET, I960BASE_INSN_STL_INDIRECT_OFFSET, I960BASE_INSN_STL_INDIRECT, I960BASE_INSN_STL_INDIRECT_INDEX
- , I960BASE_INSN_STL_DISP, I960BASE_INSN_STL_INDIRECT_DISP, I960BASE_INSN_STL_INDEX_DISP, I960BASE_INSN_STL_INDIRECT_INDEX_DISP
- , I960BASE_INSN_STT_OFFSET, I960BASE_INSN_STT_INDIRECT_OFFSET, I960BASE_INSN_STT_INDIRECT, I960BASE_INSN_STT_INDIRECT_INDEX
- , I960BASE_INSN_STT_DISP, I960BASE_INSN_STT_INDIRECT_DISP, I960BASE_INSN_STT_INDEX_DISP, I960BASE_INSN_STT_INDIRECT_INDEX_DISP
- , I960BASE_INSN_STQ_OFFSET, I960BASE_INSN_STQ_INDIRECT_OFFSET, I960BASE_INSN_STQ_INDIRECT, I960BASE_INSN_STQ_INDIRECT_INDEX
- , I960BASE_INSN_STQ_DISP, I960BASE_INSN_STQ_INDIRECT_DISP, I960BASE_INSN_STQ_INDEX_DISP, I960BASE_INSN_STQ_INDIRECT_INDEX_DISP
- , I960BASE_INSN_CMPOBE_REG, I960BASE_INSN_CMPOBE_LIT, I960BASE_INSN_CMPOBNE_REG, I960BASE_INSN_CMPOBNE_LIT
- , I960BASE_INSN_CMPOBL_REG, I960BASE_INSN_CMPOBL_LIT, I960BASE_INSN_CMPOBLE_REG, I960BASE_INSN_CMPOBLE_LIT
- , I960BASE_INSN_CMPOBG_REG, I960BASE_INSN_CMPOBG_LIT, I960BASE_INSN_CMPOBGE_REG, I960BASE_INSN_CMPOBGE_LIT
- , I960BASE_INSN_CMPIBE_REG, I960BASE_INSN_CMPIBE_LIT, I960BASE_INSN_CMPIBNE_REG, I960BASE_INSN_CMPIBNE_LIT
- , I960BASE_INSN_CMPIBL_REG, I960BASE_INSN_CMPIBL_LIT, I960BASE_INSN_CMPIBLE_REG, I960BASE_INSN_CMPIBLE_LIT
- , I960BASE_INSN_CMPIBG_REG, I960BASE_INSN_CMPIBG_LIT, I960BASE_INSN_CMPIBGE_REG, I960BASE_INSN_CMPIBGE_LIT
- , I960BASE_INSN_BBC_REG, I960BASE_INSN_BBC_LIT, I960BASE_INSN_BBS_REG, I960BASE_INSN_BBS_LIT
- , I960BASE_INSN_CMPI, I960BASE_INSN_CMPI1, I960BASE_INSN_CMPI2, I960BASE_INSN_CMPI3
- , I960BASE_INSN_CMPO, I960BASE_INSN_CMPO1, I960BASE_INSN_CMPO2, I960BASE_INSN_CMPO3
- , I960BASE_INSN_TESTNO_REG, I960BASE_INSN_TESTG_REG, I960BASE_INSN_TESTE_REG, I960BASE_INSN_TESTGE_REG
- , I960BASE_INSN_TESTL_REG, I960BASE_INSN_TESTNE_REG, I960BASE_INSN_TESTLE_REG, I960BASE_INSN_TESTO_REG
- , I960BASE_INSN_BNO, I960BASE_INSN_BG, I960BASE_INSN_BE, I960BASE_INSN_BGE
- , I960BASE_INSN_BL, I960BASE_INSN_BNE, I960BASE_INSN_BLE, I960BASE_INSN_BO
- , I960BASE_INSN_B, I960BASE_INSN_BX_INDIRECT_OFFSET, I960BASE_INSN_BX_INDIRECT, I960BASE_INSN_BX_INDIRECT_INDEX
- , I960BASE_INSN_BX_DISP, I960BASE_INSN_BX_INDIRECT_DISP, I960BASE_INSN_CALLX_DISP, I960BASE_INSN_CALLX_INDIRECT
- , I960BASE_INSN_CALLX_INDIRECT_OFFSET, I960BASE_INSN_RET, I960BASE_INSN_CALLS, I960BASE_INSN_FMARK
- , I960BASE_INSN_FLUSHREG, I960BASE_INSN_MAX
-} I960BASE_INSN_TYPE;
-
-/* Enum declaration for semantic formats in cpu family i960base. */
-typedef enum i960base_sfmt_type {
- I960BASE_SFMT_EMPTY, I960BASE_SFMT_MULO, I960BASE_SFMT_MULO1, I960BASE_SFMT_MULO2
- , I960BASE_SFMT_MULO3, I960BASE_SFMT_NOTBIT, I960BASE_SFMT_NOTBIT1, I960BASE_SFMT_NOTBIT2
- , I960BASE_SFMT_NOTBIT3, I960BASE_SFMT_NOT, I960BASE_SFMT_NOT1, I960BASE_SFMT_SHLO
- , I960BASE_SFMT_SHLO1, I960BASE_SFMT_SHLO2, I960BASE_SFMT_SHLO3, I960BASE_SFMT_EMUL
- , I960BASE_SFMT_EMUL1, I960BASE_SFMT_EMUL2, I960BASE_SFMT_EMUL3, I960BASE_SFMT_MOVL
- , I960BASE_SFMT_MOVL1, I960BASE_SFMT_MOVT, I960BASE_SFMT_MOVT1, I960BASE_SFMT_MOVQ
- , I960BASE_SFMT_MOVQ1, I960BASE_SFMT_MODPC, I960BASE_SFMT_LDA_OFFSET, I960BASE_SFMT_LDA_INDIRECT_OFFSET
- , I960BASE_SFMT_LDA_INDIRECT, I960BASE_SFMT_LDA_INDIRECT_INDEX, I960BASE_SFMT_LDA_DISP, I960BASE_SFMT_LDA_INDIRECT_DISP
- , I960BASE_SFMT_LDA_INDEX_DISP, I960BASE_SFMT_LDA_INDIRECT_INDEX_DISP, I960BASE_SFMT_LD_OFFSET, I960BASE_SFMT_LD_INDIRECT_OFFSET
- , I960BASE_SFMT_LD_INDIRECT, I960BASE_SFMT_LD_INDIRECT_INDEX, I960BASE_SFMT_LD_DISP, I960BASE_SFMT_LD_INDIRECT_DISP
- , I960BASE_SFMT_LD_INDEX_DISP, I960BASE_SFMT_LD_INDIRECT_INDEX_DISP, I960BASE_SFMT_LDL_OFFSET, I960BASE_SFMT_LDL_INDIRECT_OFFSET
- , I960BASE_SFMT_LDL_INDIRECT, I960BASE_SFMT_LDL_INDIRECT_INDEX, I960BASE_SFMT_LDL_DISP, I960BASE_SFMT_LDL_INDIRECT_DISP
- , I960BASE_SFMT_LDL_INDEX_DISP, I960BASE_SFMT_LDL_INDIRECT_INDEX_DISP, I960BASE_SFMT_LDT_OFFSET, I960BASE_SFMT_LDT_INDIRECT_OFFSET
- , I960BASE_SFMT_LDT_INDIRECT, I960BASE_SFMT_LDT_INDIRECT_INDEX, I960BASE_SFMT_LDT_DISP, I960BASE_SFMT_LDT_INDIRECT_DISP
- , I960BASE_SFMT_LDT_INDEX_DISP, I960BASE_SFMT_LDT_INDIRECT_INDEX_DISP, I960BASE_SFMT_LDQ_OFFSET, I960BASE_SFMT_LDQ_INDIRECT_OFFSET
- , I960BASE_SFMT_LDQ_INDIRECT, I960BASE_SFMT_LDQ_INDIRECT_INDEX, I960BASE_SFMT_LDQ_DISP, I960BASE_SFMT_LDQ_INDIRECT_DISP
- , I960BASE_SFMT_LDQ_INDEX_DISP, I960BASE_SFMT_LDQ_INDIRECT_INDEX_DISP, I960BASE_SFMT_ST_OFFSET, I960BASE_SFMT_ST_INDIRECT_OFFSET
- , I960BASE_SFMT_ST_INDIRECT, I960BASE_SFMT_ST_INDIRECT_INDEX, I960BASE_SFMT_ST_DISP, I960BASE_SFMT_ST_INDIRECT_DISP
- , I960BASE_SFMT_ST_INDEX_DISP, I960BASE_SFMT_ST_INDIRECT_INDEX_DISP, I960BASE_SFMT_STL_OFFSET, I960BASE_SFMT_STL_INDIRECT_OFFSET
- , I960BASE_SFMT_STL_INDIRECT, I960BASE_SFMT_STL_INDIRECT_INDEX, I960BASE_SFMT_STL_DISP, I960BASE_SFMT_STL_INDIRECT_DISP
- , I960BASE_SFMT_STL_INDEX_DISP, I960BASE_SFMT_STL_INDIRECT_INDEX_DISP, I960BASE_SFMT_STT_OFFSET, I960BASE_SFMT_STT_INDIRECT_OFFSET
- , I960BASE_SFMT_STT_INDIRECT, I960BASE_SFMT_STT_INDIRECT_INDEX, I960BASE_SFMT_STT_DISP, I960BASE_SFMT_STT_INDIRECT_DISP
- , I960BASE_SFMT_STT_INDEX_DISP, I960BASE_SFMT_STT_INDIRECT_INDEX_DISP, I960BASE_SFMT_STQ_OFFSET, I960BASE_SFMT_STQ_INDIRECT_OFFSET
- , I960BASE_SFMT_STQ_INDIRECT, I960BASE_SFMT_STQ_INDIRECT_INDEX, I960BASE_SFMT_STQ_DISP, I960BASE_SFMT_STQ_INDIRECT_DISP
- , I960BASE_SFMT_STQ_INDEX_DISP, I960BASE_SFMT_STQ_INDIRECT_INDEX_DISP, I960BASE_SFMT_CMPOBE_REG, I960BASE_SFMT_CMPOBE_LIT
- , I960BASE_SFMT_CMPOBL_REG, I960BASE_SFMT_CMPOBL_LIT, I960BASE_SFMT_BBC_REG, I960BASE_SFMT_BBC_LIT
- , I960BASE_SFMT_CMPI, I960BASE_SFMT_CMPI1, I960BASE_SFMT_CMPI2, I960BASE_SFMT_CMPI3
- , I960BASE_SFMT_CMPO, I960BASE_SFMT_CMPO1, I960BASE_SFMT_CMPO2, I960BASE_SFMT_CMPO3
- , I960BASE_SFMT_TESTNO_REG, I960BASE_SFMT_BNO, I960BASE_SFMT_B, I960BASE_SFMT_BX_INDIRECT_OFFSET
- , I960BASE_SFMT_BX_INDIRECT, I960BASE_SFMT_BX_INDIRECT_INDEX, I960BASE_SFMT_BX_DISP, I960BASE_SFMT_BX_INDIRECT_DISP
- , I960BASE_SFMT_CALLX_DISP, I960BASE_SFMT_CALLX_INDIRECT, I960BASE_SFMT_CALLX_INDIRECT_OFFSET, I960BASE_SFMT_RET
- , I960BASE_SFMT_CALLS, I960BASE_SFMT_FMARK, I960BASE_SFMT_FLUSHREG
-} I960BASE_SFMT_TYPE;
-
-/* Function unit handlers (user written). */
-
-extern int i960base_model_i960KA_u_exec (SIM_CPU *, const IDESC *, int /*unit_num*/, int /*referenced*/);
-extern int i960base_model_i960CA_u_exec (SIM_CPU *, const IDESC *, int /*unit_num*/, int /*referenced*/);
-
-/* Profiling before/after handlers (user written) */
-
-extern void i960base_model_insn_before (SIM_CPU *, int /*first_p*/);
-extern void i960base_model_insn_after (SIM_CPU *, int /*last_p*/, int /*cycles*/);
-
-#endif /* I960BASE_DECODE_H */
diff --git a/sim/i960/devices.c b/sim/i960/devices.c
deleted file mode 100644
index 0a475691adf..00000000000
--- a/sim/i960/devices.c
+++ /dev/null
@@ -1,107 +0,0 @@
-/* i960 device support
- Copyright (C) 1997, 1998, 1999 Free Software Foundation, Inc.
- Contributed by Cygnus Solutions.
-
-This file is part of GDB, the GNU debugger.
-
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License along
-with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
-
-#include "sim-main.h"
-
-#ifdef HAVE_DV_SOCKSER
-#include "dv-sockser.h"
-#endif
-
-/* Handling the MSPR register is done by creating a device in the core
- mapping that winds up here. */
-
-device i960_devices;
-
-int
-device_io_read_buffer (device *me, void *source, int space,
- address_word addr, unsigned nr_bytes,
- SIM_DESC sd, SIM_CPU *cpu, sim_cia cia)
-{
- if (STATE_ENVIRONMENT (sd) != OPERATING_ENVIRONMENT)
- return nr_bytes;
-
-#ifdef HAVE_DV_SOCKSER
- if (addr == UART_INCHAR_ADDR)
- {
- int c = dv_sockser_read (sd);
- if (c == -1)
- return 0;
- *(char *) source = c;
- return 1;
- }
- if (addr == UART_STATUS_ADDR)
- {
- int status = dv_sockser_status (sd);
- unsigned char *p = source;
- p[0] = 0;
- p[1] = (((status & DV_SOCKSER_INPUT_EMPTY)
-#ifdef UART_INPUT_READY0
- ? UART_INPUT_READY : 0)
-#else
- ? 0 : UART_INPUT_READY)
-#endif
- + ((status & DV_SOCKSER_OUTPUT_EMPTY) ? UART_OUTPUT_READY : 0));
- return 2;
- }
-#endif
-
- return nr_bytes;
-}
-
-int
-device_io_write_buffer (device *me, const void *source, int space,
- address_word addr, unsigned nr_bytes,
- SIM_DESC sd, SIM_CPU *cpu, sim_cia cia)
-{
-#if WITH_SCACHE
- /* MSPR support is deprecated but is kept in for upward compatibility
- with existing overlay support. */
- if (addr == MSPR_ADDR)
- {
- if ((*(const char *) source & MSPR_PURGE) != 0)
- scache_flush (sd);
- return nr_bytes;
- }
- if (addr == MCCR_ADDR)
- {
- if ((*(const char *) source & MCCR_CP) != 0)
- scache_flush (sd);
- return nr_bytes;
- }
-#endif
-
- if (STATE_ENVIRONMENT (sd) != OPERATING_ENVIRONMENT)
- return nr_bytes;
-
-#if HAVE_DV_SOCKSER
- if (addr == UART_OUTCHAR_ADDR)
- {
- int rc = dv_sockser_write (sd, *(char *) source);
- return rc == 1;
- }
-#endif
-
- return nr_bytes;
-}
-
-void
-device_error (device *me, char *message, ...)
-{
-}
diff --git a/sim/i960/i960-desc.c b/sim/i960/i960-desc.c
deleted file mode 100644
index cd0531a1109..00000000000
--- a/sim/i960/i960-desc.c
+++ /dev/null
@@ -1,2106 +0,0 @@
-/* CPU data for i960.
-
-THIS FILE IS MACHINE GENERATED WITH CGEN.
-
-Copyright (C) 1996, 1997, 1998, 1999, 2001 Free Software Foundation, Inc.
-
-This file is part of the GNU Binutils and/or GDB, the GNU debugger.
-
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License along
-with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
-*/
-
-#include "sysdep.h"
-#include <ctype.h>
-#include <stdio.h>
-#include <stdarg.h>
-#include "ansidecl.h"
-#include "bfd.h"
-#include "symcat.h"
-#include "i960-desc.h"
-#include "i960-opc.h"
-#include "opintl.h"
-
-/* Attributes. */
-
-static const CGEN_ATTR_ENTRY bool_attr[] =
-{
- { "#f", 0 },
- { "#t", 1 },
- { 0, 0 }
-};
-
-static const CGEN_ATTR_ENTRY MACH_attr[] =
-{
- { "base", MACH_BASE },
- { "i960_ka_sa", MACH_I960_KA_SA },
- { "i960_ca", MACH_I960_CA },
- { "max", MACH_MAX },
- { 0, 0 }
-};
-
-static const CGEN_ATTR_ENTRY ISA_attr[] =
-{
- { "i960", ISA_I960 },
- { "max", ISA_MAX },
- { 0, 0 }
-};
-
-const CGEN_ATTR_TABLE i960_cgen_ifield_attr_table[] =
-{
- { "MACH", & MACH_attr[0] },
- { "VIRTUAL", &bool_attr[0], &bool_attr[0] },
- { "PCREL-ADDR", &bool_attr[0], &bool_attr[0] },
- { "ABS-ADDR", &bool_attr[0], &bool_attr[0] },
- { "RESERVED", &bool_attr[0], &bool_attr[0] },
- { "SIGN-OPT", &bool_attr[0], &bool_attr[0] },
- { "SIGNED", &bool_attr[0], &bool_attr[0] },
- { 0, 0, 0 }
-};
-
-const CGEN_ATTR_TABLE i960_cgen_hardware_attr_table[] =
-{
- { "MACH", & MACH_attr[0] },
- { "VIRTUAL", &bool_attr[0], &bool_attr[0] },
- { "CACHE-ADDR", &bool_attr[0], &bool_attr[0] },
- { "PC", &bool_attr[0], &bool_attr[0] },
- { "PROFILE", &bool_attr[0], &bool_attr[0] },
- { 0, 0, 0 }
-};
-
-const CGEN_ATTR_TABLE i960_cgen_operand_attr_table[] =
-{
- { "MACH", & MACH_attr[0] },
- { "VIRTUAL", &bool_attr[0], &bool_attr[0] },
- { "PCREL-ADDR", &bool_attr[0], &bool_attr[0] },
- { "ABS-ADDR", &bool_attr[0], &bool_attr[0] },
- { "SIGN-OPT", &bool_attr[0], &bool_attr[0] },
- { "SIGNED", &bool_attr[0], &bool_attr[0] },
- { "NEGATIVE", &bool_attr[0], &bool_attr[0] },
- { "RELAX", &bool_attr[0], &bool_attr[0] },
- { "SEM-ONLY", &bool_attr[0], &bool_attr[0] },
- { 0, 0, 0 }
-};
-
-const CGEN_ATTR_TABLE i960_cgen_insn_attr_table[] =
-{
- { "MACH", & MACH_attr[0] },
- { "ALIAS", &bool_attr[0], &bool_attr[0] },
- { "VIRTUAL", &bool_attr[0], &bool_attr[0] },
- { "UNCOND-CTI", &bool_attr[0], &bool_attr[0] },
- { "COND-CTI", &bool_attr[0], &bool_attr[0] },
- { "SKIP-CTI", &bool_attr[0], &bool_attr[0] },
- { "DELAY-SLOT", &bool_attr[0], &bool_attr[0] },
- { "RELAXABLE", &bool_attr[0], &bool_attr[0] },
- { "RELAX", &bool_attr[0], &bool_attr[0] },
- { "NO-DIS", &bool_attr[0], &bool_attr[0] },
- { "PBB", &bool_attr[0], &bool_attr[0] },
- { 0, 0, 0 }
-};
-
-/* Instruction set variants. */
-
-static const CGEN_ISA i960_cgen_isa_table[] = {
- { "i960", 32, 32, 32, 64, },
- { 0 }
-};
-
-/* Machine variants. */
-
-static const CGEN_MACH i960_cgen_mach_table[] = {
- { "i960:ka_sa", "i960:ka_sa", MACH_I960_KA_SA },
- { "i960:ca", "i960:ca", MACH_I960_CA },
- { 0 }
-};
-
-static CGEN_KEYWORD_ENTRY i960_cgen_opval_h_gr_entries[] =
-{
- { "fp", 31 },
- { "sp", 1 },
- { "r0", 0 },
- { "r1", 1 },
- { "r2", 2 },
- { "r3", 3 },
- { "r4", 4 },
- { "r5", 5 },
- { "r6", 6 },
- { "r7", 7 },
- { "r8", 8 },
- { "r9", 9 },
- { "r10", 10 },
- { "r11", 11 },
- { "r12", 12 },
- { "r13", 13 },
- { "r14", 14 },
- { "r15", 15 },
- { "g0", 16 },
- { "g1", 17 },
- { "g2", 18 },
- { "g3", 19 },
- { "g4", 20 },
- { "g5", 21 },
- { "g6", 22 },
- { "g7", 23 },
- { "g8", 24 },
- { "g9", 25 },
- { "g10", 26 },
- { "g11", 27 },
- { "g12", 28 },
- { "g13", 29 },
- { "g14", 30 },
- { "g15", 31 }
-};
-
-CGEN_KEYWORD i960_cgen_opval_h_gr =
-{
- & i960_cgen_opval_h_gr_entries[0],
- 34
-};
-
-static CGEN_KEYWORD_ENTRY i960_cgen_opval_h_cc_entries[] =
-{
- { "cc", 0 }
-};
-
-CGEN_KEYWORD i960_cgen_opval_h_cc =
-{
- & i960_cgen_opval_h_cc_entries[0],
- 1
-};
-
-
-
-/* The hardware table. */
-
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
-#define A(a) (1 << CGEN_HW_##a)
-#else
-#define A(a) (1 << CGEN_HW_/**/a)
-#endif
-
-const CGEN_HW_ENTRY i960_cgen_hw_table[] =
-{
- { "h-memory", HW_H_MEMORY, CGEN_ASM_NONE, 0, { 0, { (1<<MACH_BASE) } } },
- { "h-sint", HW_H_SINT, CGEN_ASM_NONE, 0, { 0, { (1<<MACH_BASE) } } },
- { "h-uint", HW_H_UINT, CGEN_ASM_NONE, 0, { 0, { (1<<MACH_BASE) } } },
- { "h-addr", HW_H_ADDR, CGEN_ASM_NONE, 0, { 0, { (1<<MACH_BASE) } } },
- { "h-iaddr", HW_H_IADDR, CGEN_ASM_NONE, 0, { 0, { (1<<MACH_BASE) } } },
- { "h-pc", HW_H_PC, CGEN_ASM_NONE, 0, { 0|A(PROFILE)|A(PC), { (1<<MACH_BASE) } } },
- { "h-gr", HW_H_GR, CGEN_ASM_KEYWORD, (PTR) & i960_cgen_opval_h_gr, { 0|A(CACHE_ADDR)|A(PROFILE), { (1<<MACH_BASE) } } },
- { "h-cc", HW_H_CC, CGEN_ASM_KEYWORD, (PTR) & i960_cgen_opval_h_cc, { 0|A(CACHE_ADDR)|A(PROFILE), { (1<<MACH_BASE) } } },
- { 0 }
-};
-
-#undef A
-
-/* The instruction field table. */
-
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
-#define A(a) (1 << CGEN_IFLD_##a)
-#else
-#define A(a) (1 << CGEN_IFLD_/**/a)
-#endif
-
-const CGEN_IFLD i960_cgen_ifld_table[] =
-{
- { I960_F_NIL, "f-nil", 0, 0, 0, 0, { 0, { (1<<MACH_BASE) } } },
- { I960_F_OPCODE, "f-opcode", 0, 32, 0, 8, { 0, { (1<<MACH_BASE) } } },
- { I960_F_SRCDST, "f-srcdst", 0, 32, 8, 5, { 0, { (1<<MACH_BASE) } } },
- { I960_F_SRC2, "f-src2", 0, 32, 13, 5, { 0, { (1<<MACH_BASE) } } },
- { I960_F_M3, "f-m3", 0, 32, 18, 1, { 0, { (1<<MACH_BASE) } } },
- { I960_F_M2, "f-m2", 0, 32, 19, 1, { 0, { (1<<MACH_BASE) } } },
- { I960_F_M1, "f-m1", 0, 32, 20, 1, { 0, { (1<<MACH_BASE) } } },
- { I960_F_OPCODE2, "f-opcode2", 0, 32, 21, 4, { 0, { (1<<MACH_BASE) } } },
- { I960_F_ZERO, "f-zero", 0, 32, 25, 2, { 0, { (1<<MACH_BASE) } } },
- { I960_F_SRC1, "f-src1", 0, 32, 27, 5, { 0, { (1<<MACH_BASE) } } },
- { I960_F_ABASE, "f-abase", 0, 32, 13, 5, { 0, { (1<<MACH_BASE) } } },
- { I960_F_MODEA, "f-modea", 0, 32, 18, 1, { 0, { (1<<MACH_BASE) } } },
- { I960_F_ZEROA, "f-zeroa", 0, 32, 19, 1, { 0, { (1<<MACH_BASE) } } },
- { I960_F_OFFSET, "f-offset", 0, 32, 20, 12, { 0, { (1<<MACH_BASE) } } },
- { I960_F_MODEB, "f-modeb", 0, 32, 18, 4, { 0, { (1<<MACH_BASE) } } },
- { I960_F_SCALE, "f-scale", 0, 32, 22, 3, { 0, { (1<<MACH_BASE) } } },
- { I960_F_ZEROB, "f-zerob", 0, 32, 25, 2, { 0, { (1<<MACH_BASE) } } },
- { I960_F_INDEX, "f-index", 0, 32, 27, 5, { 0, { (1<<MACH_BASE) } } },
- { I960_F_OPTDISP, "f-optdisp", 32, 32, 0, 32, { 0, { (1<<MACH_BASE) } } },
- { I960_F_BR_SRC1, "f-br-src1", 0, 32, 8, 5, { 0, { (1<<MACH_BASE) } } },
- { I960_F_BR_SRC2, "f-br-src2", 0, 32, 13, 5, { 0, { (1<<MACH_BASE) } } },
- { I960_F_BR_M1, "f-br-m1", 0, 32, 18, 1, { 0, { (1<<MACH_BASE) } } },
- { I960_F_BR_DISP, "f-br-disp", 0, 32, 19, 11, { 0|A(PCREL_ADDR), { (1<<MACH_BASE) } } },
- { I960_F_BR_ZERO, "f-br-zero", 0, 32, 30, 2, { 0, { (1<<MACH_BASE) } } },
- { I960_F_CTRL_DISP, "f-ctrl-disp", 0, 32, 8, 22, { 0|A(PCREL_ADDR), { (1<<MACH_BASE) } } },
- { I960_F_CTRL_ZERO, "f-ctrl-zero", 0, 32, 30, 2, { 0, { (1<<MACH_BASE) } } },
- { 0 }
-};
-
-#undef A
-
-/* The operand table. */
-
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
-#define A(a) (1 << CGEN_OPERAND_##a)
-#else
-#define A(a) (1 << CGEN_OPERAND_/**/a)
-#endif
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
-#define OPERAND(op) I960_OPERAND_##op
-#else
-#define OPERAND(op) I960_OPERAND_/**/op
-#endif
-
-const CGEN_OPERAND i960_cgen_operand_table[] =
-{
-/* pc: program counter */
- { "pc", I960_OPERAND_PC, HW_H_PC, 0, 0,
- { 0|A(SEM_ONLY), { (1<<MACH_BASE) } } },
-/* src1: source register 1 */
- { "src1", I960_OPERAND_SRC1, HW_H_GR, 27, 5,
- { 0, { (1<<MACH_BASE) } } },
-/* src2: source register 2 */
- { "src2", I960_OPERAND_SRC2, HW_H_GR, 13, 5,
- { 0, { (1<<MACH_BASE) } } },
-/* dst: source/dest register */
- { "dst", I960_OPERAND_DST, HW_H_GR, 8, 5,
- { 0, { (1<<MACH_BASE) } } },
-/* lit1: literal 1 */
- { "lit1", I960_OPERAND_LIT1, HW_H_UINT, 27, 5,
- { 0, { (1<<MACH_BASE) } } },
-/* lit2: literal 2 */
- { "lit2", I960_OPERAND_LIT2, HW_H_UINT, 13, 5,
- { 0, { (1<<MACH_BASE) } } },
-/* st_src: store src */
- { "st_src", I960_OPERAND_ST_SRC, HW_H_GR, 8, 5,
- { 0, { (1<<MACH_BASE) } } },
-/* abase: abase */
- { "abase", I960_OPERAND_ABASE, HW_H_GR, 13, 5,
- { 0, { (1<<MACH_BASE) } } },
-/* offset: offset */
- { "offset", I960_OPERAND_OFFSET, HW_H_UINT, 20, 12,
- { 0, { (1<<MACH_BASE) } } },
-/* scale: scale */
- { "scale", I960_OPERAND_SCALE, HW_H_UINT, 22, 3,
- { 0, { (1<<MACH_BASE) } } },
-/* index: index */
- { "index", I960_OPERAND_INDEX, HW_H_GR, 27, 5,
- { 0, { (1<<MACH_BASE) } } },
-/* optdisp: optional displacement */
- { "optdisp", I960_OPERAND_OPTDISP, HW_H_UINT, 0, 32,
- { 0, { (1<<MACH_BASE) } } },
-/* br_src1: branch src1 */
- { "br_src1", I960_OPERAND_BR_SRC1, HW_H_GR, 8, 5,
- { 0, { (1<<MACH_BASE) } } },
-/* br_src2: branch src2 */
- { "br_src2", I960_OPERAND_BR_SRC2, HW_H_GR, 13, 5,
- { 0, { (1<<MACH_BASE) } } },
-/* br_disp: branch displacement */
- { "br_disp", I960_OPERAND_BR_DISP, HW_H_IADDR, 19, 11,
- { 0|A(PCREL_ADDR), { (1<<MACH_BASE) } } },
-/* br_lit1: branch literal 1 */
- { "br_lit1", I960_OPERAND_BR_LIT1, HW_H_UINT, 8, 5,
- { 0, { (1<<MACH_BASE) } } },
-/* ctrl_disp: ctrl branch disp */
- { "ctrl_disp", I960_OPERAND_CTRL_DISP, HW_H_IADDR, 8, 22,
- { 0|A(PCREL_ADDR), { (1<<MACH_BASE) } } },
- { 0 }
-};
-
-#undef A
-
-#define OP(field) CGEN_SYNTAX_MAKE_FIELD (OPERAND (field))
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
-#define A(a) (1 << CGEN_INSN_##a)
-#else
-#define A(a) (1 << CGEN_INSN_/**/a)
-#endif
-
-/* The instruction table. */
-
-static const CGEN_IBASE i960_cgen_insn_table[MAX_INSNS] =
-{
- /* Special null first entry.
- A `num' value of zero is thus invalid.
- Also, the special `invalid' insn resides here. */
- { 0, 0, 0 },
-/* mulo $src1, $src2, $dst */
- {
- I960_INSN_MULO, "mulo", "mulo", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* mulo $lit1, $src2, $dst */
- {
- I960_INSN_MULO1, "mulo1", "mulo", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* mulo $src1, $lit2, $dst */
- {
- I960_INSN_MULO2, "mulo2", "mulo", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* mulo $lit1, $lit2, $dst */
- {
- I960_INSN_MULO3, "mulo3", "mulo", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* remo $src1, $src2, $dst */
- {
- I960_INSN_REMO, "remo", "remo", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* remo $lit1, $src2, $dst */
- {
- I960_INSN_REMO1, "remo1", "remo", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* remo $src1, $lit2, $dst */
- {
- I960_INSN_REMO2, "remo2", "remo", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* remo $lit1, $lit2, $dst */
- {
- I960_INSN_REMO3, "remo3", "remo", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* divo $src1, $src2, $dst */
- {
- I960_INSN_DIVO, "divo", "divo", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* divo $lit1, $src2, $dst */
- {
- I960_INSN_DIVO1, "divo1", "divo", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* divo $src1, $lit2, $dst */
- {
- I960_INSN_DIVO2, "divo2", "divo", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* divo $lit1, $lit2, $dst */
- {
- I960_INSN_DIVO3, "divo3", "divo", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* remi $src1, $src2, $dst */
- {
- I960_INSN_REMI, "remi", "remi", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* remi $lit1, $src2, $dst */
- {
- I960_INSN_REMI1, "remi1", "remi", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* remi $src1, $lit2, $dst */
- {
- I960_INSN_REMI2, "remi2", "remi", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* remi $lit1, $lit2, $dst */
- {
- I960_INSN_REMI3, "remi3", "remi", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* divi $src1, $src2, $dst */
- {
- I960_INSN_DIVI, "divi", "divi", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* divi $lit1, $src2, $dst */
- {
- I960_INSN_DIVI1, "divi1", "divi", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* divi $src1, $lit2, $dst */
- {
- I960_INSN_DIVI2, "divi2", "divi", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* divi $lit1, $lit2, $dst */
- {
- I960_INSN_DIVI3, "divi3", "divi", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* addo $src1, $src2, $dst */
- {
- I960_INSN_ADDO, "addo", "addo", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* addo $lit1, $src2, $dst */
- {
- I960_INSN_ADDO1, "addo1", "addo", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* addo $src1, $lit2, $dst */
- {
- I960_INSN_ADDO2, "addo2", "addo", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* addo $lit1, $lit2, $dst */
- {
- I960_INSN_ADDO3, "addo3", "addo", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* subo $src1, $src2, $dst */
- {
- I960_INSN_SUBO, "subo", "subo", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* subo $lit1, $src2, $dst */
- {
- I960_INSN_SUBO1, "subo1", "subo", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* subo $src1, $lit2, $dst */
- {
- I960_INSN_SUBO2, "subo2", "subo", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* subo $lit1, $lit2, $dst */
- {
- I960_INSN_SUBO3, "subo3", "subo", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* notbit $src1, $src2, $dst */
- {
- I960_INSN_NOTBIT, "notbit", "notbit", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* notbit $lit1, $src2, $dst */
- {
- I960_INSN_NOTBIT1, "notbit1", "notbit", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* notbit $src1, $lit2, $dst */
- {
- I960_INSN_NOTBIT2, "notbit2", "notbit", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* notbit $lit1, $lit2, $dst */
- {
- I960_INSN_NOTBIT3, "notbit3", "notbit", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* and $src1, $src2, $dst */
- {
- I960_INSN_AND, "and", "and", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* and $lit1, $src2, $dst */
- {
- I960_INSN_AND1, "and1", "and", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* and $src1, $lit2, $dst */
- {
- I960_INSN_AND2, "and2", "and", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* and $lit1, $lit2, $dst */
- {
- I960_INSN_AND3, "and3", "and", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* andnot $src1, $src2, $dst */
- {
- I960_INSN_ANDNOT, "andnot", "andnot", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* andnot $lit1, $src2, $dst */
- {
- I960_INSN_ANDNOT1, "andnot1", "andnot", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* andnot $src1, $lit2, $dst */
- {
- I960_INSN_ANDNOT2, "andnot2", "andnot", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* andnot $lit1, $lit2, $dst */
- {
- I960_INSN_ANDNOT3, "andnot3", "andnot", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* setbit $src1, $src2, $dst */
- {
- I960_INSN_SETBIT, "setbit", "setbit", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* setbit $lit1, $src2, $dst */
- {
- I960_INSN_SETBIT1, "setbit1", "setbit", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* setbit $src1, $lit2, $dst */
- {
- I960_INSN_SETBIT2, "setbit2", "setbit", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* setbit $lit1, $lit2, $dst */
- {
- I960_INSN_SETBIT3, "setbit3", "setbit", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* notand $src1, $src2, $dst */
- {
- I960_INSN_NOTAND, "notand", "notand", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* notand $lit1, $src2, $dst */
- {
- I960_INSN_NOTAND1, "notand1", "notand", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* notand $src1, $lit2, $dst */
- {
- I960_INSN_NOTAND2, "notand2", "notand", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* notand $lit1, $lit2, $dst */
- {
- I960_INSN_NOTAND3, "notand3", "notand", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* xor $src1, $src2, $dst */
- {
- I960_INSN_XOR, "xor", "xor", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* xor $lit1, $src2, $dst */
- {
- I960_INSN_XOR1, "xor1", "xor", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* xor $src1, $lit2, $dst */
- {
- I960_INSN_XOR2, "xor2", "xor", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* xor $lit1, $lit2, $dst */
- {
- I960_INSN_XOR3, "xor3", "xor", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* or $src1, $src2, $dst */
- {
- I960_INSN_OR, "or", "or", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* or $lit1, $src2, $dst */
- {
- I960_INSN_OR1, "or1", "or", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* or $src1, $lit2, $dst */
- {
- I960_INSN_OR2, "or2", "or", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* or $lit1, $lit2, $dst */
- {
- I960_INSN_OR3, "or3", "or", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* nor $src1, $src2, $dst */
- {
- I960_INSN_NOR, "nor", "nor", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* nor $lit1, $src2, $dst */
- {
- I960_INSN_NOR1, "nor1", "nor", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* nor $src1, $lit2, $dst */
- {
- I960_INSN_NOR2, "nor2", "nor", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* nor $lit1, $lit2, $dst */
- {
- I960_INSN_NOR3, "nor3", "nor", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* xnor $src1, $src2, $dst */
- {
- I960_INSN_XNOR, "xnor", "xnor", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* xnor $lit1, $src2, $dst */
- {
- I960_INSN_XNOR1, "xnor1", "xnor", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* xnor $src1, $lit2, $dst */
- {
- I960_INSN_XNOR2, "xnor2", "xnor", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* xnor $lit1, $lit2, $dst */
- {
- I960_INSN_XNOR3, "xnor3", "xnor", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* not $src1, $src2, $dst */
- {
- I960_INSN_NOT, "not", "not", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* not $lit1, $src2, $dst */
- {
- I960_INSN_NOT1, "not1", "not", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* not $src1, $lit2, $dst */
- {
- I960_INSN_NOT2, "not2", "not", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* not $lit1, $lit2, $dst */
- {
- I960_INSN_NOT3, "not3", "not", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* ornot $src1, $src2, $dst */
- {
- I960_INSN_ORNOT, "ornot", "ornot", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* ornot $lit1, $src2, $dst */
- {
- I960_INSN_ORNOT1, "ornot1", "ornot", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* ornot $src1, $lit2, $dst */
- {
- I960_INSN_ORNOT2, "ornot2", "ornot", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* ornot $lit1, $lit2, $dst */
- {
- I960_INSN_ORNOT3, "ornot3", "ornot", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* clrbit $src1, $src2, $dst */
- {
- I960_INSN_CLRBIT, "clrbit", "clrbit", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* clrbit $lit1, $src2, $dst */
- {
- I960_INSN_CLRBIT1, "clrbit1", "clrbit", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* clrbit $src1, $lit2, $dst */
- {
- I960_INSN_CLRBIT2, "clrbit2", "clrbit", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* clrbit $lit1, $lit2, $dst */
- {
- I960_INSN_CLRBIT3, "clrbit3", "clrbit", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* shlo $src1, $src2, $dst */
- {
- I960_INSN_SHLO, "shlo", "shlo", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* shlo $lit1, $src2, $dst */
- {
- I960_INSN_SHLO1, "shlo1", "shlo", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* shlo $src1, $lit2, $dst */
- {
- I960_INSN_SHLO2, "shlo2", "shlo", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* shlo $lit1, $lit2, $dst */
- {
- I960_INSN_SHLO3, "shlo3", "shlo", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* shro $src1, $src2, $dst */
- {
- I960_INSN_SHRO, "shro", "shro", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* shro $lit1, $src2, $dst */
- {
- I960_INSN_SHRO1, "shro1", "shro", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* shro $src1, $lit2, $dst */
- {
- I960_INSN_SHRO2, "shro2", "shro", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* shro $lit1, $lit2, $dst */
- {
- I960_INSN_SHRO3, "shro3", "shro", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* shli $src1, $src2, $dst */
- {
- I960_INSN_SHLI, "shli", "shli", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* shli $lit1, $src2, $dst */
- {
- I960_INSN_SHLI1, "shli1", "shli", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* shli $src1, $lit2, $dst */
- {
- I960_INSN_SHLI2, "shli2", "shli", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* shli $lit1, $lit2, $dst */
- {
- I960_INSN_SHLI3, "shli3", "shli", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* shri $src1, $src2, $dst */
- {
- I960_INSN_SHRI, "shri", "shri", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* shri $lit1, $src2, $dst */
- {
- I960_INSN_SHRI1, "shri1", "shri", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* shri $src1, $lit2, $dst */
- {
- I960_INSN_SHRI2, "shri2", "shri", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* shri $lit1, $lit2, $dst */
- {
- I960_INSN_SHRI3, "shri3", "shri", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* emul $src1, $src2, $dst */
- {
- I960_INSN_EMUL, "emul", "emul", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* emul $lit1, $src2, $dst */
- {
- I960_INSN_EMUL1, "emul1", "emul", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* emul $src1, $lit2, $dst */
- {
- I960_INSN_EMUL2, "emul2", "emul", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* emul $lit1, $lit2, $dst */
- {
- I960_INSN_EMUL3, "emul3", "emul", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* mov $src1, $dst */
- {
- I960_INSN_MOV, "mov", "mov", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* mov $lit1, $dst */
- {
- I960_INSN_MOV1, "mov1", "mov", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* movl $src1, $dst */
- {
- I960_INSN_MOVL, "movl", "movl", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* movl $lit1, $dst */
- {
- I960_INSN_MOVL1, "movl1", "movl", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* movt $src1, $dst */
- {
- I960_INSN_MOVT, "movt", "movt", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* movt $lit1, $dst */
- {
- I960_INSN_MOVT1, "movt1", "movt", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* movq $src1, $dst */
- {
- I960_INSN_MOVQ, "movq", "movq", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* movq $lit1, $dst */
- {
- I960_INSN_MOVQ1, "movq1", "movq", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* modpc $src1, $src2, $dst */
- {
- I960_INSN_MODPC, "modpc", "modpc", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* modac $src1, $src2, $dst */
- {
- I960_INSN_MODAC, "modac", "modac", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* lda $offset, $dst */
- {
- I960_INSN_LDA_OFFSET, "lda-offset", "lda", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* lda $offset($abase), $dst */
- {
- I960_INSN_LDA_INDIRECT_OFFSET, "lda-indirect-offset", "lda", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* lda ($abase), $dst */
- {
- I960_INSN_LDA_INDIRECT, "lda-indirect", "lda", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* lda ($abase)[$index*S$scale], $dst */
- {
- I960_INSN_LDA_INDIRECT_INDEX, "lda-indirect-index", "lda", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* lda $optdisp, $dst */
- {
- I960_INSN_LDA_DISP, "lda-disp", "lda", 64,
- { 0, { (1<<MACH_BASE) } }
- },
-/* lda $optdisp($abase), $dst */
- {
- I960_INSN_LDA_INDIRECT_DISP, "lda-indirect-disp", "lda", 64,
- { 0, { (1<<MACH_BASE) } }
- },
-/* lda $optdisp[$index*S$scale], $dst */
- {
- I960_INSN_LDA_INDEX_DISP, "lda-index-disp", "lda", 64,
- { 0, { (1<<MACH_BASE) } }
- },
-/* lda $optdisp($abase)[$index*S$scale], $dst */
- {
- I960_INSN_LDA_INDIRECT_INDEX_DISP, "lda-indirect-index-disp", "lda", 64,
- { 0, { (1<<MACH_BASE) } }
- },
-/* ld $offset, $dst */
- {
- I960_INSN_LD_OFFSET, "ld-offset", "ld", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* ld $offset($abase), $dst */
- {
- I960_INSN_LD_INDIRECT_OFFSET, "ld-indirect-offset", "ld", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* ld ($abase), $dst */
- {
- I960_INSN_LD_INDIRECT, "ld-indirect", "ld", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* ld ($abase)[$index*S$scale], $dst */
- {
- I960_INSN_LD_INDIRECT_INDEX, "ld-indirect-index", "ld", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* ld $optdisp, $dst */
- {
- I960_INSN_LD_DISP, "ld-disp", "ld", 64,
- { 0, { (1<<MACH_BASE) } }
- },
-/* ld $optdisp($abase), $dst */
- {
- I960_INSN_LD_INDIRECT_DISP, "ld-indirect-disp", "ld", 64,
- { 0, { (1<<MACH_BASE) } }
- },
-/* ld $optdisp[$index*S$scale], $dst */
- {
- I960_INSN_LD_INDEX_DISP, "ld-index-disp", "ld", 64,
- { 0, { (1<<MACH_BASE) } }
- },
-/* ld $optdisp($abase)[$index*S$scale], $dst */
- {
- I960_INSN_LD_INDIRECT_INDEX_DISP, "ld-indirect-index-disp", "ld", 64,
- { 0, { (1<<MACH_BASE) } }
- },
-/* ldob $offset, $dst */
- {
- I960_INSN_LDOB_OFFSET, "ldob-offset", "ldob", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* ldob $offset($abase), $dst */
- {
- I960_INSN_LDOB_INDIRECT_OFFSET, "ldob-indirect-offset", "ldob", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* ldob ($abase), $dst */
- {
- I960_INSN_LDOB_INDIRECT, "ldob-indirect", "ldob", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* ldob ($abase)[$index*S$scale], $dst */
- {
- I960_INSN_LDOB_INDIRECT_INDEX, "ldob-indirect-index", "ldob", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* ldob $optdisp, $dst */
- {
- I960_INSN_LDOB_DISP, "ldob-disp", "ldob", 64,
- { 0, { (1<<MACH_BASE) } }
- },
-/* ldob $optdisp($abase), $dst */
- {
- I960_INSN_LDOB_INDIRECT_DISP, "ldob-indirect-disp", "ldob", 64,
- { 0, { (1<<MACH_BASE) } }
- },
-/* ldob $optdisp[$index*S$scale], $dst */
- {
- I960_INSN_LDOB_INDEX_DISP, "ldob-index-disp", "ldob", 64,
- { 0, { (1<<MACH_BASE) } }
- },
-/* ldob $optdisp($abase)[$index*S$scale], $dst */
- {
- I960_INSN_LDOB_INDIRECT_INDEX_DISP, "ldob-indirect-index-disp", "ldob", 64,
- { 0, { (1<<MACH_BASE) } }
- },
-/* ldos $offset, $dst */
- {
- I960_INSN_LDOS_OFFSET, "ldos-offset", "ldos", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* ldos $offset($abase), $dst */
- {
- I960_INSN_LDOS_INDIRECT_OFFSET, "ldos-indirect-offset", "ldos", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* ldos ($abase), $dst */
- {
- I960_INSN_LDOS_INDIRECT, "ldos-indirect", "ldos", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* ldos ($abase)[$index*S$scale], $dst */
- {
- I960_INSN_LDOS_INDIRECT_INDEX, "ldos-indirect-index", "ldos", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* ldos $optdisp, $dst */
- {
- I960_INSN_LDOS_DISP, "ldos-disp", "ldos", 64,
- { 0, { (1<<MACH_BASE) } }
- },
-/* ldos $optdisp($abase), $dst */
- {
- I960_INSN_LDOS_INDIRECT_DISP, "ldos-indirect-disp", "ldos", 64,
- { 0, { (1<<MACH_BASE) } }
- },
-/* ldos $optdisp[$index*S$scale], $dst */
- {
- I960_INSN_LDOS_INDEX_DISP, "ldos-index-disp", "ldos", 64,
- { 0, { (1<<MACH_BASE) } }
- },
-/* ldos $optdisp($abase)[$index*S$scale], $dst */
- {
- I960_INSN_LDOS_INDIRECT_INDEX_DISP, "ldos-indirect-index-disp", "ldos", 64,
- { 0, { (1<<MACH_BASE) } }
- },
-/* ldib $offset, $dst */
- {
- I960_INSN_LDIB_OFFSET, "ldib-offset", "ldib", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* ldib $offset($abase), $dst */
- {
- I960_INSN_LDIB_INDIRECT_OFFSET, "ldib-indirect-offset", "ldib", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* ldib ($abase), $dst */
- {
- I960_INSN_LDIB_INDIRECT, "ldib-indirect", "ldib", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* ldib ($abase)[$index*S$scale], $dst */
- {
- I960_INSN_LDIB_INDIRECT_INDEX, "ldib-indirect-index", "ldib", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* ldib $optdisp, $dst */
- {
- I960_INSN_LDIB_DISP, "ldib-disp", "ldib", 64,
- { 0, { (1<<MACH_BASE) } }
- },
-/* ldib $optdisp($abase), $dst */
- {
- I960_INSN_LDIB_INDIRECT_DISP, "ldib-indirect-disp", "ldib", 64,
- { 0, { (1<<MACH_BASE) } }
- },
-/* ldib $optdisp[$index*S$scale], $dst */
- {
- I960_INSN_LDIB_INDEX_DISP, "ldib-index-disp", "ldib", 64,
- { 0, { (1<<MACH_BASE) } }
- },
-/* ldib $optdisp($abase)[$index*S$scale], $dst */
- {
- I960_INSN_LDIB_INDIRECT_INDEX_DISP, "ldib-indirect-index-disp", "ldib", 64,
- { 0, { (1<<MACH_BASE) } }
- },
-/* ldis $offset, $dst */
- {
- I960_INSN_LDIS_OFFSET, "ldis-offset", "ldis", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* ldis $offset($abase), $dst */
- {
- I960_INSN_LDIS_INDIRECT_OFFSET, "ldis-indirect-offset", "ldis", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* ldis ($abase), $dst */
- {
- I960_INSN_LDIS_INDIRECT, "ldis-indirect", "ldis", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* ldis ($abase)[$index*S$scale], $dst */
- {
- I960_INSN_LDIS_INDIRECT_INDEX, "ldis-indirect-index", "ldis", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* ldis $optdisp, $dst */
- {
- I960_INSN_LDIS_DISP, "ldis-disp", "ldis", 64,
- { 0, { (1<<MACH_BASE) } }
- },
-/* ldis $optdisp($abase), $dst */
- {
- I960_INSN_LDIS_INDIRECT_DISP, "ldis-indirect-disp", "ldis", 64,
- { 0, { (1<<MACH_BASE) } }
- },
-/* ldis $optdisp[$index*S$scale], $dst */
- {
- I960_INSN_LDIS_INDEX_DISP, "ldis-index-disp", "ldis", 64,
- { 0, { (1<<MACH_BASE) } }
- },
-/* ldis $optdisp($abase)[$index*S$scale], $dst */
- {
- I960_INSN_LDIS_INDIRECT_INDEX_DISP, "ldis-indirect-index-disp", "ldis", 64,
- { 0, { (1<<MACH_BASE) } }
- },
-/* ldl $offset, $dst */
- {
- I960_INSN_LDL_OFFSET, "ldl-offset", "ldl", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* ldl $offset($abase), $dst */
- {
- I960_INSN_LDL_INDIRECT_OFFSET, "ldl-indirect-offset", "ldl", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* ldl ($abase), $dst */
- {
- I960_INSN_LDL_INDIRECT, "ldl-indirect", "ldl", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* ldl ($abase)[$index*S$scale], $dst */
- {
- I960_INSN_LDL_INDIRECT_INDEX, "ldl-indirect-index", "ldl", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* ldl $optdisp, $dst */
- {
- I960_INSN_LDL_DISP, "ldl-disp", "ldl", 64,
- { 0, { (1<<MACH_BASE) } }
- },
-/* ldl $optdisp($abase), $dst */
- {
- I960_INSN_LDL_INDIRECT_DISP, "ldl-indirect-disp", "ldl", 64,
- { 0, { (1<<MACH_BASE) } }
- },
-/* ldl $optdisp[$index*S$scale], $dst */
- {
- I960_INSN_LDL_INDEX_DISP, "ldl-index-disp", "ldl", 64,
- { 0, { (1<<MACH_BASE) } }
- },
-/* ldl $optdisp($abase)[$index*S$scale], $dst */
- {
- I960_INSN_LDL_INDIRECT_INDEX_DISP, "ldl-indirect-index-disp", "ldl", 64,
- { 0, { (1<<MACH_BASE) } }
- },
-/* ldt $offset, $dst */
- {
- I960_INSN_LDT_OFFSET, "ldt-offset", "ldt", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* ldt $offset($abase), $dst */
- {
- I960_INSN_LDT_INDIRECT_OFFSET, "ldt-indirect-offset", "ldt", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* ldt ($abase), $dst */
- {
- I960_INSN_LDT_INDIRECT, "ldt-indirect", "ldt", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* ldt ($abase)[$index*S$scale], $dst */
- {
- I960_INSN_LDT_INDIRECT_INDEX, "ldt-indirect-index", "ldt", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* ldt $optdisp, $dst */
- {
- I960_INSN_LDT_DISP, "ldt-disp", "ldt", 64,
- { 0, { (1<<MACH_BASE) } }
- },
-/* ldt $optdisp($abase), $dst */
- {
- I960_INSN_LDT_INDIRECT_DISP, "ldt-indirect-disp", "ldt", 64,
- { 0, { (1<<MACH_BASE) } }
- },
-/* ldt $optdisp[$index*S$scale], $dst */
- {
- I960_INSN_LDT_INDEX_DISP, "ldt-index-disp", "ldt", 64,
- { 0, { (1<<MACH_BASE) } }
- },
-/* ldt $optdisp($abase)[$index*S$scale], $dst */
- {
- I960_INSN_LDT_INDIRECT_INDEX_DISP, "ldt-indirect-index-disp", "ldt", 64,
- { 0, { (1<<MACH_BASE) } }
- },
-/* ldq $offset, $dst */
- {
- I960_INSN_LDQ_OFFSET, "ldq-offset", "ldq", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* ldq $offset($abase), $dst */
- {
- I960_INSN_LDQ_INDIRECT_OFFSET, "ldq-indirect-offset", "ldq", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* ldq ($abase), $dst */
- {
- I960_INSN_LDQ_INDIRECT, "ldq-indirect", "ldq", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* ldq ($abase)[$index*S$scale], $dst */
- {
- I960_INSN_LDQ_INDIRECT_INDEX, "ldq-indirect-index", "ldq", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* ldq $optdisp, $dst */
- {
- I960_INSN_LDQ_DISP, "ldq-disp", "ldq", 64,
- { 0, { (1<<MACH_BASE) } }
- },
-/* ldq $optdisp($abase), $dst */
- {
- I960_INSN_LDQ_INDIRECT_DISP, "ldq-indirect-disp", "ldq", 64,
- { 0, { (1<<MACH_BASE) } }
- },
-/* ldq $optdisp[$index*S$scale], $dst */
- {
- I960_INSN_LDQ_INDEX_DISP, "ldq-index-disp", "ldq", 64,
- { 0, { (1<<MACH_BASE) } }
- },
-/* ldq $optdisp($abase)[$index*S$scale], $dst */
- {
- I960_INSN_LDQ_INDIRECT_INDEX_DISP, "ldq-indirect-index-disp", "ldq", 64,
- { 0, { (1<<MACH_BASE) } }
- },
-/* st $st_src, $offset */
- {
- I960_INSN_ST_OFFSET, "st-offset", "st", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* st $st_src, $offset($abase) */
- {
- I960_INSN_ST_INDIRECT_OFFSET, "st-indirect-offset", "st", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* st $st_src, ($abase) */
- {
- I960_INSN_ST_INDIRECT, "st-indirect", "st", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* st $st_src, ($abase)[$index*S$scale] */
- {
- I960_INSN_ST_INDIRECT_INDEX, "st-indirect-index", "st", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* st $st_src, $optdisp */
- {
- I960_INSN_ST_DISP, "st-disp", "st", 64,
- { 0, { (1<<MACH_BASE) } }
- },
-/* st $st_src, $optdisp($abase) */
- {
- I960_INSN_ST_INDIRECT_DISP, "st-indirect-disp", "st", 64,
- { 0, { (1<<MACH_BASE) } }
- },
-/* st $st_src, $optdisp[$index*S$scale */
- {
- I960_INSN_ST_INDEX_DISP, "st-index-disp", "st", 64,
- { 0, { (1<<MACH_BASE) } }
- },
-/* st $st_src, $optdisp($abase)[$index*S$scale] */
- {
- I960_INSN_ST_INDIRECT_INDEX_DISP, "st-indirect-index-disp", "st", 64,
- { 0, { (1<<MACH_BASE) } }
- },
-/* stob $st_src, $offset */
- {
- I960_INSN_STOB_OFFSET, "stob-offset", "stob", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* stob $st_src, $offset($abase) */
- {
- I960_INSN_STOB_INDIRECT_OFFSET, "stob-indirect-offset", "stob", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* stob $st_src, ($abase) */
- {
- I960_INSN_STOB_INDIRECT, "stob-indirect", "stob", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* stob $st_src, ($abase)[$index*S$scale] */
- {
- I960_INSN_STOB_INDIRECT_INDEX, "stob-indirect-index", "stob", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* stob $st_src, $optdisp */
- {
- I960_INSN_STOB_DISP, "stob-disp", "stob", 64,
- { 0, { (1<<MACH_BASE) } }
- },
-/* stob $st_src, $optdisp($abase) */
- {
- I960_INSN_STOB_INDIRECT_DISP, "stob-indirect-disp", "stob", 64,
- { 0, { (1<<MACH_BASE) } }
- },
-/* stob $st_src, $optdisp[$index*S$scale */
- {
- I960_INSN_STOB_INDEX_DISP, "stob-index-disp", "stob", 64,
- { 0, { (1<<MACH_BASE) } }
- },
-/* stob $st_src, $optdisp($abase)[$index*S$scale] */
- {
- I960_INSN_STOB_INDIRECT_INDEX_DISP, "stob-indirect-index-disp", "stob", 64,
- { 0, { (1<<MACH_BASE) } }
- },
-/* stos $st_src, $offset */
- {
- I960_INSN_STOS_OFFSET, "stos-offset", "stos", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* stos $st_src, $offset($abase) */
- {
- I960_INSN_STOS_INDIRECT_OFFSET, "stos-indirect-offset", "stos", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* stos $st_src, ($abase) */
- {
- I960_INSN_STOS_INDIRECT, "stos-indirect", "stos", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* stos $st_src, ($abase)[$index*S$scale] */
- {
- I960_INSN_STOS_INDIRECT_INDEX, "stos-indirect-index", "stos", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* stos $st_src, $optdisp */
- {
- I960_INSN_STOS_DISP, "stos-disp", "stos", 64,
- { 0, { (1<<MACH_BASE) } }
- },
-/* stos $st_src, $optdisp($abase) */
- {
- I960_INSN_STOS_INDIRECT_DISP, "stos-indirect-disp", "stos", 64,
- { 0, { (1<<MACH_BASE) } }
- },
-/* stos $st_src, $optdisp[$index*S$scale */
- {
- I960_INSN_STOS_INDEX_DISP, "stos-index-disp", "stos", 64,
- { 0, { (1<<MACH_BASE) } }
- },
-/* stos $st_src, $optdisp($abase)[$index*S$scale] */
- {
- I960_INSN_STOS_INDIRECT_INDEX_DISP, "stos-indirect-index-disp", "stos", 64,
- { 0, { (1<<MACH_BASE) } }
- },
-/* stl $st_src, $offset */
- {
- I960_INSN_STL_OFFSET, "stl-offset", "stl", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* stl $st_src, $offset($abase) */
- {
- I960_INSN_STL_INDIRECT_OFFSET, "stl-indirect-offset", "stl", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* stl $st_src, ($abase) */
- {
- I960_INSN_STL_INDIRECT, "stl-indirect", "stl", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* stl $st_src, ($abase)[$index*S$scale] */
- {
- I960_INSN_STL_INDIRECT_INDEX, "stl-indirect-index", "stl", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* stl $st_src, $optdisp */
- {
- I960_INSN_STL_DISP, "stl-disp", "stl", 64,
- { 0, { (1<<MACH_BASE) } }
- },
-/* stl $st_src, $optdisp($abase) */
- {
- I960_INSN_STL_INDIRECT_DISP, "stl-indirect-disp", "stl", 64,
- { 0, { (1<<MACH_BASE) } }
- },
-/* stl $st_src, $optdisp[$index*S$scale */
- {
- I960_INSN_STL_INDEX_DISP, "stl-index-disp", "stl", 64,
- { 0, { (1<<MACH_BASE) } }
- },
-/* stl $st_src, $optdisp($abase)[$index*S$scale] */
- {
- I960_INSN_STL_INDIRECT_INDEX_DISP, "stl-indirect-index-disp", "stl", 64,
- { 0, { (1<<MACH_BASE) } }
- },
-/* stt $st_src, $offset */
- {
- I960_INSN_STT_OFFSET, "stt-offset", "stt", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* stt $st_src, $offset($abase) */
- {
- I960_INSN_STT_INDIRECT_OFFSET, "stt-indirect-offset", "stt", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* stt $st_src, ($abase) */
- {
- I960_INSN_STT_INDIRECT, "stt-indirect", "stt", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* stt $st_src, ($abase)[$index*S$scale] */
- {
- I960_INSN_STT_INDIRECT_INDEX, "stt-indirect-index", "stt", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* stt $st_src, $optdisp */
- {
- I960_INSN_STT_DISP, "stt-disp", "stt", 64,
- { 0, { (1<<MACH_BASE) } }
- },
-/* stt $st_src, $optdisp($abase) */
- {
- I960_INSN_STT_INDIRECT_DISP, "stt-indirect-disp", "stt", 64,
- { 0, { (1<<MACH_BASE) } }
- },
-/* stt $st_src, $optdisp[$index*S$scale */
- {
- I960_INSN_STT_INDEX_DISP, "stt-index-disp", "stt", 64,
- { 0, { (1<<MACH_BASE) } }
- },
-/* stt $st_src, $optdisp($abase)[$index*S$scale] */
- {
- I960_INSN_STT_INDIRECT_INDEX_DISP, "stt-indirect-index-disp", "stt", 64,
- { 0, { (1<<MACH_BASE) } }
- },
-/* stq $st_src, $offset */
- {
- I960_INSN_STQ_OFFSET, "stq-offset", "stq", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* stq $st_src, $offset($abase) */
- {
- I960_INSN_STQ_INDIRECT_OFFSET, "stq-indirect-offset", "stq", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* stq $st_src, ($abase) */
- {
- I960_INSN_STQ_INDIRECT, "stq-indirect", "stq", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* stq $st_src, ($abase)[$index*S$scale] */
- {
- I960_INSN_STQ_INDIRECT_INDEX, "stq-indirect-index", "stq", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* stq $st_src, $optdisp */
- {
- I960_INSN_STQ_DISP, "stq-disp", "stq", 64,
- { 0, { (1<<MACH_BASE) } }
- },
-/* stq $st_src, $optdisp($abase) */
- {
- I960_INSN_STQ_INDIRECT_DISP, "stq-indirect-disp", "stq", 64,
- { 0, { (1<<MACH_BASE) } }
- },
-/* stq $st_src, $optdisp[$index*S$scale */
- {
- I960_INSN_STQ_INDEX_DISP, "stq-index-disp", "stq", 64,
- { 0, { (1<<MACH_BASE) } }
- },
-/* stq $st_src, $optdisp($abase)[$index*S$scale] */
- {
- I960_INSN_STQ_INDIRECT_INDEX_DISP, "stq-indirect-index-disp", "stq", 64,
- { 0, { (1<<MACH_BASE) } }
- },
-/* cmpobe $br_src1, $br_src2, $br_disp */
- {
- I960_INSN_CMPOBE_REG, "cmpobe-reg", "cmpobe", 32,
- { 0|A(COND_CTI), { (1<<MACH_BASE) } }
- },
-/* cmpobe $br_lit1, $br_src2, $br_disp */
- {
- I960_INSN_CMPOBE_LIT, "cmpobe-lit", "cmpobe", 32,
- { 0|A(COND_CTI), { (1<<MACH_BASE) } }
- },
-/* cmpobne $br_src1, $br_src2, $br_disp */
- {
- I960_INSN_CMPOBNE_REG, "cmpobne-reg", "cmpobne", 32,
- { 0|A(COND_CTI), { (1<<MACH_BASE) } }
- },
-/* cmpobne $br_lit1, $br_src2, $br_disp */
- {
- I960_INSN_CMPOBNE_LIT, "cmpobne-lit", "cmpobne", 32,
- { 0|A(COND_CTI), { (1<<MACH_BASE) } }
- },
-/* cmpobl $br_src1, $br_src2, $br_disp */
- {
- I960_INSN_CMPOBL_REG, "cmpobl-reg", "cmpobl", 32,
- { 0|A(COND_CTI), { (1<<MACH_BASE) } }
- },
-/* cmpobl $br_lit1, $br_src2, $br_disp */
- {
- I960_INSN_CMPOBL_LIT, "cmpobl-lit", "cmpobl", 32,
- { 0|A(COND_CTI), { (1<<MACH_BASE) } }
- },
-/* cmpoble $br_src1, $br_src2, $br_disp */
- {
- I960_INSN_CMPOBLE_REG, "cmpoble-reg", "cmpoble", 32,
- { 0|A(COND_CTI), { (1<<MACH_BASE) } }
- },
-/* cmpoble $br_lit1, $br_src2, $br_disp */
- {
- I960_INSN_CMPOBLE_LIT, "cmpoble-lit", "cmpoble", 32,
- { 0|A(COND_CTI), { (1<<MACH_BASE) } }
- },
-/* cmpobg $br_src1, $br_src2, $br_disp */
- {
- I960_INSN_CMPOBG_REG, "cmpobg-reg", "cmpobg", 32,
- { 0|A(COND_CTI), { (1<<MACH_BASE) } }
- },
-/* cmpobg $br_lit1, $br_src2, $br_disp */
- {
- I960_INSN_CMPOBG_LIT, "cmpobg-lit", "cmpobg", 32,
- { 0|A(COND_CTI), { (1<<MACH_BASE) } }
- },
-/* cmpobge $br_src1, $br_src2, $br_disp */
- {
- I960_INSN_CMPOBGE_REG, "cmpobge-reg", "cmpobge", 32,
- { 0|A(COND_CTI), { (1<<MACH_BASE) } }
- },
-/* cmpobge $br_lit1, $br_src2, $br_disp */
- {
- I960_INSN_CMPOBGE_LIT, "cmpobge-lit", "cmpobge", 32,
- { 0|A(COND_CTI), { (1<<MACH_BASE) } }
- },
-/* cmpibe $br_src1, $br_src2, $br_disp */
- {
- I960_INSN_CMPIBE_REG, "cmpibe-reg", "cmpibe", 32,
- { 0|A(COND_CTI), { (1<<MACH_BASE) } }
- },
-/* cmpibe $br_lit1, $br_src2, $br_disp */
- {
- I960_INSN_CMPIBE_LIT, "cmpibe-lit", "cmpibe", 32,
- { 0|A(COND_CTI), { (1<<MACH_BASE) } }
- },
-/* cmpibne $br_src1, $br_src2, $br_disp */
- {
- I960_INSN_CMPIBNE_REG, "cmpibne-reg", "cmpibne", 32,
- { 0|A(COND_CTI), { (1<<MACH_BASE) } }
- },
-/* cmpibne $br_lit1, $br_src2, $br_disp */
- {
- I960_INSN_CMPIBNE_LIT, "cmpibne-lit", "cmpibne", 32,
- { 0|A(COND_CTI), { (1<<MACH_BASE) } }
- },
-/* cmpibl $br_src1, $br_src2, $br_disp */
- {
- I960_INSN_CMPIBL_REG, "cmpibl-reg", "cmpibl", 32,
- { 0|A(COND_CTI), { (1<<MACH_BASE) } }
- },
-/* cmpibl $br_lit1, $br_src2, $br_disp */
- {
- I960_INSN_CMPIBL_LIT, "cmpibl-lit", "cmpibl", 32,
- { 0|A(COND_CTI), { (1<<MACH_BASE) } }
- },
-/* cmpible $br_src1, $br_src2, $br_disp */
- {
- I960_INSN_CMPIBLE_REG, "cmpible-reg", "cmpible", 32,
- { 0|A(COND_CTI), { (1<<MACH_BASE) } }
- },
-/* cmpible $br_lit1, $br_src2, $br_disp */
- {
- I960_INSN_CMPIBLE_LIT, "cmpible-lit", "cmpible", 32,
- { 0|A(COND_CTI), { (1<<MACH_BASE) } }
- },
-/* cmpibg $br_src1, $br_src2, $br_disp */
- {
- I960_INSN_CMPIBG_REG, "cmpibg-reg", "cmpibg", 32,
- { 0|A(COND_CTI), { (1<<MACH_BASE) } }
- },
-/* cmpibg $br_lit1, $br_src2, $br_disp */
- {
- I960_INSN_CMPIBG_LIT, "cmpibg-lit", "cmpibg", 32,
- { 0|A(COND_CTI), { (1<<MACH_BASE) } }
- },
-/* cmpibge $br_src1, $br_src2, $br_disp */
- {
- I960_INSN_CMPIBGE_REG, "cmpibge-reg", "cmpibge", 32,
- { 0|A(COND_CTI), { (1<<MACH_BASE) } }
- },
-/* cmpibge $br_lit1, $br_src2, $br_disp */
- {
- I960_INSN_CMPIBGE_LIT, "cmpibge-lit", "cmpibge", 32,
- { 0|A(COND_CTI), { (1<<MACH_BASE) } }
- },
-/* bbc $br_src1, $br_src2, $br_disp */
- {
- I960_INSN_BBC_REG, "bbc-reg", "bbc", 32,
- { 0|A(COND_CTI), { (1<<MACH_BASE) } }
- },
-/* bbc $br_lit1, $br_src2, $br_disp */
- {
- I960_INSN_BBC_LIT, "bbc-lit", "bbc", 32,
- { 0|A(COND_CTI), { (1<<MACH_BASE) } }
- },
-/* bbs $br_src1, $br_src2, $br_disp */
- {
- I960_INSN_BBS_REG, "bbs-reg", "bbs", 32,
- { 0|A(COND_CTI), { (1<<MACH_BASE) } }
- },
-/* bbs $br_lit1, $br_src2, $br_disp */
- {
- I960_INSN_BBS_LIT, "bbs-lit", "bbs", 32,
- { 0|A(COND_CTI), { (1<<MACH_BASE) } }
- },
-/* cmpi $src1, $src2 */
- {
- I960_INSN_CMPI, "cmpi", "cmpi", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* cmpi $lit1, $src2 */
- {
- I960_INSN_CMPI1, "cmpi1", "cmpi", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* cmpi $src1, $lit2 */
- {
- I960_INSN_CMPI2, "cmpi2", "cmpi", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* cmpi $lit1, $lit2 */
- {
- I960_INSN_CMPI3, "cmpi3", "cmpi", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* cmpo $src1, $src2 */
- {
- I960_INSN_CMPO, "cmpo", "cmpo", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* cmpo $lit1, $src2 */
- {
- I960_INSN_CMPO1, "cmpo1", "cmpo", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* cmpo $src1, $lit2 */
- {
- I960_INSN_CMPO2, "cmpo2", "cmpo", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* cmpo $lit1, $lit2 */
- {
- I960_INSN_CMPO3, "cmpo3", "cmpo", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* testno $br_src1 */
- {
- I960_INSN_TESTNO_REG, "testno-reg", "testno", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* testg $br_src1 */
- {
- I960_INSN_TESTG_REG, "testg-reg", "testg", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* teste $br_src1 */
- {
- I960_INSN_TESTE_REG, "teste-reg", "teste", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* testge $br_src1 */
- {
- I960_INSN_TESTGE_REG, "testge-reg", "testge", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* testl $br_src1 */
- {
- I960_INSN_TESTL_REG, "testl-reg", "testl", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* testne $br_src1 */
- {
- I960_INSN_TESTNE_REG, "testne-reg", "testne", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* testle $br_src1 */
- {
- I960_INSN_TESTLE_REG, "testle-reg", "testle", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* testo $br_src1 */
- {
- I960_INSN_TESTO_REG, "testo-reg", "testo", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-/* bno $ctrl_disp */
- {
- I960_INSN_BNO, "bno", "bno", 32,
- { 0|A(COND_CTI), { (1<<MACH_BASE) } }
- },
-/* bg $ctrl_disp */
- {
- I960_INSN_BG, "bg", "bg", 32,
- { 0|A(COND_CTI), { (1<<MACH_BASE) } }
- },
-/* be $ctrl_disp */
- {
- I960_INSN_BE, "be", "be", 32,
- { 0|A(COND_CTI), { (1<<MACH_BASE) } }
- },
-/* bge $ctrl_disp */
- {
- I960_INSN_BGE, "bge", "bge", 32,
- { 0|A(COND_CTI), { (1<<MACH_BASE) } }
- },
-/* bl $ctrl_disp */
- {
- I960_INSN_BL, "bl", "bl", 32,
- { 0|A(COND_CTI), { (1<<MACH_BASE) } }
- },
-/* bne $ctrl_disp */
- {
- I960_INSN_BNE, "bne", "bne", 32,
- { 0|A(COND_CTI), { (1<<MACH_BASE) } }
- },
-/* ble $ctrl_disp */
- {
- I960_INSN_BLE, "ble", "ble", 32,
- { 0|A(COND_CTI), { (1<<MACH_BASE) } }
- },
-/* bo $ctrl_disp */
- {
- I960_INSN_BO, "bo", "bo", 32,
- { 0|A(COND_CTI), { (1<<MACH_BASE) } }
- },
-/* b $ctrl_disp */
- {
- I960_INSN_B, "b", "b", 32,
- { 0|A(UNCOND_CTI), { (1<<MACH_BASE) } }
- },
-/* bx $offset($abase) */
- {
- I960_INSN_BX_INDIRECT_OFFSET, "bx-indirect-offset", "bx", 32,
- { 0|A(UNCOND_CTI), { (1<<MACH_BASE) } }
- },
-/* bx ($abase) */
- {
- I960_INSN_BX_INDIRECT, "bx-indirect", "bx", 32,
- { 0|A(UNCOND_CTI), { (1<<MACH_BASE) } }
- },
-/* bx ($abase)[$index*S$scale] */
- {
- I960_INSN_BX_INDIRECT_INDEX, "bx-indirect-index", "bx", 32,
- { 0|A(UNCOND_CTI), { (1<<MACH_BASE) } }
- },
-/* bx $optdisp */
- {
- I960_INSN_BX_DISP, "bx-disp", "bx", 64,
- { 0|A(UNCOND_CTI), { (1<<MACH_BASE) } }
- },
-/* bx $optdisp($abase) */
- {
- I960_INSN_BX_INDIRECT_DISP, "bx-indirect-disp", "bx", 64,
- { 0|A(UNCOND_CTI), { (1<<MACH_BASE) } }
- },
-/* callx $optdisp */
- {
- I960_INSN_CALLX_DISP, "callx-disp", "callx", 64,
- { 0|A(UNCOND_CTI), { (1<<MACH_BASE) } }
- },
-/* callx ($abase) */
- {
- I960_INSN_CALLX_INDIRECT, "callx-indirect", "callx", 32,
- { 0|A(UNCOND_CTI), { (1<<MACH_BASE) } }
- },
-/* callx $offset($abase) */
- {
- I960_INSN_CALLX_INDIRECT_OFFSET, "callx-indirect-offset", "callx", 32,
- { 0|A(UNCOND_CTI), { (1<<MACH_BASE) } }
- },
-/* ret */
- {
- I960_INSN_RET, "ret", "ret", 32,
- { 0|A(UNCOND_CTI), { (1<<MACH_BASE) } }
- },
-/* calls $src1 */
- {
- I960_INSN_CALLS, "calls", "calls", 32,
- { 0|A(UNCOND_CTI), { (1<<MACH_BASE) } }
- },
-/* fmark */
- {
- I960_INSN_FMARK, "fmark", "fmark", 32,
- { 0|A(UNCOND_CTI), { (1<<MACH_BASE) } }
- },
-/* flushreg */
- {
- I960_INSN_FLUSHREG, "flushreg", "flushreg", 32,
- { 0, { (1<<MACH_BASE) } }
- },
-};
-
-#undef A
-#undef MNEM
-#undef OP
-
-/* Initialize anything needed to be done once, before any cpu_open call. */
-
-static void
-init_tables ()
-{
-}
-
-/* Subroutine of i960_cgen_cpu_open to look up a mach via its bfd name. */
-
-static const CGEN_MACH *
-lookup_mach_via_bfd_name (table, name)
- const CGEN_MACH *table;
- const char *name;
-{
- while (table->name)
- {
- if (strcmp (name, table->bfd_name) == 0)
- return table;
- ++table;
- }
- abort ();
-}
-
-/* Subroutine of i960_cgen_cpu_open to build the hardware table. */
-
-static void
-build_hw_table (cd)
- CGEN_CPU_TABLE *cd;
-{
- int i;
- int machs = cd->machs;
- const CGEN_HW_ENTRY *init = & i960_cgen_hw_table[0];
- /* MAX_HW is only an upper bound on the number of selected entries.
- However each entry is indexed by it's enum so there can be holes in
- the table. */
- const CGEN_HW_ENTRY **selected =
- (const CGEN_HW_ENTRY **) xmalloc (MAX_HW * sizeof (CGEN_HW_ENTRY *));
-
- cd->hw_table.init_entries = init;
- cd->hw_table.entry_size = sizeof (CGEN_HW_ENTRY);
- memset (selected, 0, MAX_HW * sizeof (CGEN_HW_ENTRY *));
- /* ??? For now we just use machs to determine which ones we want. */
- for (i = 0; init[i].name != NULL; ++i)
- if (CGEN_HW_ATTR_VALUE (&init[i], CGEN_HW_MACH)
- & machs)
- selected[init[i].type] = &init[i];
- cd->hw_table.entries = selected;
- cd->hw_table.num_entries = MAX_HW;
-}
-
-/* Subroutine of i960_cgen_cpu_open to build the hardware table. */
-
-static void
-build_ifield_table (cd)
- CGEN_CPU_TABLE *cd;
-{
- cd->ifld_table = & i960_cgen_ifld_table[0];
-}
-
-/* Subroutine of i960_cgen_cpu_open to build the hardware table. */
-
-static void
-build_operand_table (cd)
- CGEN_CPU_TABLE *cd;
-{
- int i;
- int machs = cd->machs;
- const CGEN_OPERAND *init = & i960_cgen_operand_table[0];
- /* MAX_OPERANDS is only an upper bound on the number of selected entries.
- However each entry is indexed by it's enum so there can be holes in
- the table. */
- const CGEN_OPERAND **selected =
- (const CGEN_OPERAND **) xmalloc (MAX_OPERANDS * sizeof (CGEN_OPERAND *));
-
- cd->operand_table.init_entries = init;
- cd->operand_table.entry_size = sizeof (CGEN_OPERAND);
- memset (selected, 0, MAX_OPERANDS * sizeof (CGEN_OPERAND *));
- /* ??? For now we just use mach to determine which ones we want. */
- for (i = 0; init[i].name != NULL; ++i)
- if (CGEN_OPERAND_ATTR_VALUE (&init[i], CGEN_OPERAND_MACH)
- & machs)
- selected[init[i].type] = &init[i];
- cd->operand_table.entries = selected;
- cd->operand_table.num_entries = MAX_OPERANDS;
-}
-
-/* Subroutine of i960_cgen_cpu_open to build the hardware table.
- ??? This could leave out insns not supported by the specified mach/isa,
- but that would cause errors like "foo only supported by bar" to become
- "unknown insn", so for now we include all insns and require the app to
- do the checking later.
- ??? On the other hand, parsing of such insns may require their hardware or
- operand elements to be in the table [which they mightn't be]. */
-
-static void
-build_insn_table (cd)
- CGEN_CPU_TABLE *cd;
-{
- int i;
- const CGEN_IBASE *ib = & i960_cgen_insn_table[0];
- CGEN_INSN *insns = (CGEN_INSN *) xmalloc (MAX_INSNS * sizeof (CGEN_INSN));
-
- memset (insns, 0, MAX_INSNS * sizeof (CGEN_INSN));
- for (i = 0; i < MAX_INSNS; ++i)
- insns[i].base = &ib[i];
- cd->insn_table.init_entries = insns;
- cd->insn_table.entry_size = sizeof (CGEN_IBASE);
- cd->insn_table.num_init_entries = MAX_INSNS;
-}
-
-/* Subroutine of i960_cgen_cpu_open to rebuild the tables. */
-
-static void
-i960_cgen_rebuild_tables (cd)
- CGEN_CPU_TABLE *cd;
-{
- int i,n_isas,n_machs;
- unsigned int isas = cd->isas;
- unsigned int machs = cd->machs;
-
- cd->int_insn_p = CGEN_INT_INSN_P;
-
- /* Data derived from the isa spec. */
-#define UNSET (CGEN_SIZE_UNKNOWN + 1)
- cd->default_insn_bitsize = UNSET;
- cd->base_insn_bitsize = UNSET;
- cd->min_insn_bitsize = 65535; /* some ridiculously big number */
- cd->max_insn_bitsize = 0;
- for (i = 0; i < MAX_ISAS; ++i)
- if (((1 << i) & isas) != 0)
- {
- const CGEN_ISA *isa = & i960_cgen_isa_table[i];
-
- /* Default insn sizes of all selected isas must be equal or we set
- the result to 0, meaning "unknown". */
- if (cd->default_insn_bitsize == UNSET)
- cd->default_insn_bitsize = isa->default_insn_bitsize;
- else if (isa->default_insn_bitsize == cd->default_insn_bitsize)
- ; /* this is ok */
- else
- cd->default_insn_bitsize = CGEN_SIZE_UNKNOWN;
-
- /* Base insn sizes of all selected isas must be equal or we set
- the result to 0, meaning "unknown". */
- if (cd->base_insn_bitsize == UNSET)
- cd->base_insn_bitsize = isa->base_insn_bitsize;
- else if (isa->base_insn_bitsize == cd->base_insn_bitsize)
- ; /* this is ok */
- else
- cd->base_insn_bitsize = CGEN_SIZE_UNKNOWN;
-
- /* Set min,max insn sizes. */
- if (isa->min_insn_bitsize < cd->min_insn_bitsize)
- cd->min_insn_bitsize = isa->min_insn_bitsize;
- if (isa->max_insn_bitsize > cd->max_insn_bitsize)
- cd->max_insn_bitsize = isa->max_insn_bitsize;
-
- ++n_isas;
- }
-
- /* Data derived from the mach spec. */
- for (i = 0; i < MAX_MACHS; ++i)
- if (((1 << i) & machs) != 0)
- {
- const CGEN_MACH *mach = & i960_cgen_mach_table[i];
-
- ++n_machs;
- }
-
- /* Determine which hw elements are used by MACH. */
- build_hw_table (cd);
-
- /* Build the ifield table. */
- build_ifield_table (cd);
-
- /* Determine which operands are used by MACH/ISA. */
- build_operand_table (cd);
-
- /* Build the instruction table. */
- build_insn_table (cd);
-}
-
-/* Initialize a cpu table and return a descriptor.
- It's much like opening a file, and must be the first function called.
- The arguments are a set of (type/value) pairs, terminated with
- CGEN_CPU_OPEN_END.
-
- Currently supported values:
- CGEN_CPU_OPEN_ISAS: bitmap of values in enum isa_attr
- CGEN_CPU_OPEN_MACHS: bitmap of values in enum mach_attr
- CGEN_CPU_OPEN_BFDMACH: specify 1 mach using bfd name
- CGEN_CPU_OPEN_ENDIAN: specify endian choice
- CGEN_CPU_OPEN_END: terminates arguments
-
- ??? Simultaneous multiple isas might not make sense, but it's not (yet)
- precluded.
-
- ??? We only support ISO C stdargs here, not K&R.
- Laziness, plus experiment to see if anything requires K&R - eventually
- K&R will no longer be supported - e.g. GDB is currently trying this. */
-
-CGEN_CPU_DESC
-i960_cgen_cpu_open (enum cgen_cpu_open_arg arg_type, ...)
-{
- CGEN_CPU_TABLE *cd = (CGEN_CPU_TABLE *) xmalloc (sizeof (CGEN_CPU_TABLE));
- static int init_p;
- unsigned int isas = 0; /* 0 = "unspecified" */
- unsigned int machs = 0; /* 0 = "unspecified" */
- enum cgen_endian endian = CGEN_ENDIAN_UNKNOWN;
- va_list ap;
-
- if (! init_p)
- {
- init_tables ();
- init_p = 1;
- }
-
- memset (cd, 0, sizeof (*cd));
-
- va_start (ap, arg_type);
- while (arg_type != CGEN_CPU_OPEN_END)
- {
- switch (arg_type)
- {
- case CGEN_CPU_OPEN_ISAS :
- isas = va_arg (ap, unsigned int);
- break;
- case CGEN_CPU_OPEN_MACHS :
- machs = va_arg (ap, unsigned int);
- break;
- case CGEN_CPU_OPEN_BFDMACH :
- {
- const char *name = va_arg (ap, const char *);
- const CGEN_MACH *mach =
- lookup_mach_via_bfd_name (i960_cgen_mach_table, name);
-
- machs |= mach->num << 1;
- break;
- }
- case CGEN_CPU_OPEN_ENDIAN :
- endian = va_arg (ap, enum cgen_endian);
- break;
- default :
- fprintf (stderr, "i960_cgen_cpu_open: unsupported argument `%d'\n",
- arg_type);
- abort (); /* ??? return NULL? */
- }
- arg_type = va_arg (ap, enum cgen_cpu_open_arg);
- }
- va_end (ap);
-
- /* mach unspecified means "all" */
- if (machs == 0)
- machs = (1 << MAX_MACHS) - 1;
- /* base mach is always selected */
- machs |= 1;
- /* isa unspecified means "all" */
- if (isas == 0)
- isas = (1 << MAX_ISAS) - 1;
- if (endian == CGEN_ENDIAN_UNKNOWN)
- {
- /* ??? If target has only one, could have a default. */
- fprintf (stderr, "i960_cgen_cpu_open: no endianness specified\n");
- abort ();
- }
-
- cd->isas = isas;
- cd->machs = machs;
- cd->endian = endian;
- /* FIXME: for the sparc case we can determine insn-endianness statically.
- The worry here is where both data and insn endian can be independently
- chosen, in which case this function will need another argument.
- Actually, will want to allow for more arguments in the future anyway. */
- cd->insn_endian = endian;
-
- /* Table (re)builder. */
- cd->rebuild_tables = i960_cgen_rebuild_tables;
- i960_cgen_rebuild_tables (cd);
-
- return (CGEN_CPU_DESC) cd;
-}
-
-/* Cover fn to i960_cgen_cpu_open to handle the simple case of 1 isa, 1 mach.
- MACH_NAME is the bfd name of the mach. */
-
-CGEN_CPU_DESC
-i960_cgen_cpu_open_1 (mach_name, endian)
- const char *mach_name;
- enum cgen_endian endian;
-{
- return i960_cgen_cpu_open (CGEN_CPU_OPEN_BFDMACH, mach_name,
- CGEN_CPU_OPEN_ENDIAN, endian,
- CGEN_CPU_OPEN_END);
-}
-
-/* Close a cpu table.
- ??? This can live in a machine independent file, but there's currently
- no place to put this file (there's no libcgen). libopcodes is the wrong
- place as some simulator ports use this but they don't use libopcodes. */
-
-void
-i960_cgen_cpu_close (cd)
- CGEN_CPU_DESC cd;
-{
- if (cd->insn_table.init_entries)
- free ((CGEN_INSN *) cd->insn_table.init_entries);
- if (cd->hw_table.entries)
- free ((CGEN_HW_ENTRY *) cd->hw_table.entries);
- free (cd);
-}
-
diff --git a/sim/i960/i960-desc.h b/sim/i960/i960-desc.h
deleted file mode 100644
index 40b65999dea..00000000000
--- a/sim/i960/i960-desc.h
+++ /dev/null
@@ -1,317 +0,0 @@
-/* CPU data header for i960.
-
-THIS FILE IS MACHINE GENERATED WITH CGEN.
-
-Copyright (C) 1996, 1997, 1998, 1999 Free Software Foundation, Inc.
-
-This file is part of the GNU Binutils and/or GDB, the GNU debugger.
-
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License along
-with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
-*/
-
-#ifndef I960_CPU_H
-#define I960_CPU_H
-
-#define CGEN_ARCH i960
-
-/* Given symbol S, return i960_cgen_<S>. */
-#define CGEN_SYM(s) CONCAT3 (i960,_cgen_,s)
-
-/* Selected cpu families. */
-#define HAVE_CPU_I960BASE
-
-#define CGEN_INSN_LSB0_P 0
-
-/* Minimum size of any insn (in bytes). */
-#define CGEN_MIN_INSN_SIZE 4
-
-/* Maximum size of any insn (in bytes). */
-#define CGEN_MAX_INSN_SIZE 8
-
-#define CGEN_INT_INSN_P 0
-
-/* FIXME: Need to compute CGEN_MAX_SYNTAX_BYTES. */
-
-/* CGEN_MNEMONIC_OPERANDS is defined if mnemonics have operands.
- e.g. In "b,a foo" the ",a" is an operand. If mnemonics have operands
- we can't hash on everything up to the space. */
-#define CGEN_MNEMONIC_OPERANDS
-
-/* Maximum number of operands any insn or macro-insn has. */
-#define CGEN_MAX_INSN_OPERANDS 16
-
-/* Maximum number of fields in an instruction. */
-#define CGEN_MAX_IFMT_OPERANDS 9
-
-/* Enums. */
-
-/* Enum declaration for insn opcode enums. */
-typedef enum insn_opcode {
- OPCODE_00, OPCODE_01, OPCODE_02, OPCODE_03
- , OPCODE_04, OPCODE_05, OPCODE_06, OPCODE_07
- , OPCODE_08, OPCODE_09, OPCODE_0A, OPCODE_0B
- , OPCODE_0C, OPCODE_0D, OPCODE_0E, OPCODE_0F
- , OPCODE_10, OPCODE_11, OPCODE_12, OPCODE_13
- , OPCODE_14, OPCODE_15, OPCODE_16, OPCODE_17
- , OPCODE_18, OPCODE_19, OPCODE_1A, OPCODE_1B
- , OPCODE_1C, OPCODE_1D, OPCODE_1E, OPCODE_1F
- , OPCODE_20, OPCODE_21, OPCODE_22, OPCODE_23
- , OPCODE_24, OPCODE_25, OPCODE_26, OPCODE_27
- , OPCODE_28, OPCODE_29, OPCODE_2A, OPCODE_2B
- , OPCODE_2C, OPCODE_2D, OPCODE_2E, OPCODE_2F
- , OPCODE_30, OPCODE_31, OPCODE_32, OPCODE_33
- , OPCODE_34, OPCODE_35, OPCODE_36, OPCODE_37
- , OPCODE_38, OPCODE_39, OPCODE_3A, OPCODE_3B
- , OPCODE_3C, OPCODE_3D, OPCODE_3E, OPCODE_3F
- , OPCODE_40, OPCODE_41, OPCODE_42, OPCODE_43
- , OPCODE_44, OPCODE_45, OPCODE_46, OPCODE_47
- , OPCODE_48, OPCODE_49, OPCODE_4A, OPCODE_4B
- , OPCODE_4C, OPCODE_4D, OPCODE_4E, OPCODE_4F
- , OPCODE_50, OPCODE_51, OPCODE_52, OPCODE_53
- , OPCODE_54, OPCODE_55, OPCODE_56, OPCODE_57
- , OPCODE_58, OPCODE_59, OPCODE_5A, OPCODE_5B
- , OPCODE_5C, OPCODE_5D, OPCODE_5E, OPCODE_5F
- , OPCODE_60, OPCODE_61, OPCODE_62, OPCODE_63
- , OPCODE_64, OPCODE_65, OPCODE_66, OPCODE_67
- , OPCODE_68, OPCODE_69, OPCODE_6A, OPCODE_6B
- , OPCODE_6C, OPCODE_6D, OPCODE_6E, OPCODE_6F
- , OPCODE_70, OPCODE_71, OPCODE_72, OPCODE_73
- , OPCODE_74, OPCODE_75, OPCODE_76, OPCODE_77
- , OPCODE_78, OPCODE_79, OPCODE_7A, OPCODE_7B
- , OPCODE_7C, OPCODE_7D, OPCODE_7E, OPCODE_7F
- , OPCODE_80, OPCODE_81, OPCODE_82, OPCODE_83
- , OPCODE_84, OPCODE_85, OPCODE_86, OPCODE_87
- , OPCODE_88, OPCODE_89, OPCODE_8A, OPCODE_8B
- , OPCODE_8C, OPCODE_8D, OPCODE_8E, OPCODE_8F
- , OPCODE_90, OPCODE_91, OPCODE_92, OPCODE_93
- , OPCODE_94, OPCODE_95, OPCODE_96, OPCODE_97
- , OPCODE_98, OPCODE_99, OPCODE_9A, OPCODE_9B
- , OPCODE_9C, OPCODE_9D, OPCODE_9E, OPCODE_9F
- , OPCODE_A0, OPCODE_A1, OPCODE_A2, OPCODE_A3
- , OPCODE_A4, OPCODE_A5, OPCODE_A6, OPCODE_A7
- , OPCODE_A8, OPCODE_A9, OPCODE_AA, OPCODE_AB
- , OPCODE_AC, OPCODE_AD, OPCODE_AE, OPCODE_AF
- , OPCODE_B0, OPCODE_B1, OPCODE_B2, OPCODE_B3
- , OPCODE_B4, OPCODE_B5, OPCODE_B6, OPCODE_B7
- , OPCODE_B8, OPCODE_B9, OPCODE_BA, OPCODE_BB
- , OPCODE_BC, OPCODE_BD, OPCODE_BE, OPCODE_BF
- , OPCODE_C0, OPCODE_C1, OPCODE_C2, OPCODE_C3
- , OPCODE_C4, OPCODE_C5, OPCODE_C6, OPCODE_C7
- , OPCODE_C8, OPCODE_C9, OPCODE_CA, OPCODE_CB
- , OPCODE_CC, OPCODE_CD, OPCODE_CE, OPCODE_CF
- , OPCODE_D0, OPCODE_D1, OPCODE_D2, OPCODE_D3
- , OPCODE_D4, OPCODE_D5, OPCODE_D6, OPCODE_D7
- , OPCODE_D8, OPCODE_D9, OPCODE_DA, OPCODE_DB
- , OPCODE_DC, OPCODE_DD, OPCODE_DE, OPCODE_DF
- , OPCODE_E0, OPCODE_E1, OPCODE_E2, OPCODE_E3
- , OPCODE_E4, OPCODE_E5, OPCODE_E6, OPCODE_E7
- , OPCODE_E8, OPCODE_E9, OPCODE_EA, OPCODE_EB
- , OPCODE_EC, OPCODE_ED, OPCODE_EE, OPCODE_EF
- , OPCODE_F0, OPCODE_F1, OPCODE_F2, OPCODE_F3
- , OPCODE_F4, OPCODE_F5, OPCODE_F6, OPCODE_F7
- , OPCODE_F8, OPCODE_F9, OPCODE_FA, OPCODE_FB
- , OPCODE_FC, OPCODE_FD, OPCODE_FE, OPCODE_FF
-} INSN_OPCODE;
-
-/* Enum declaration for insn opcode2 enums. */
-typedef enum insn_opcode2 {
- OPCODE2_0, OPCODE2_1, OPCODE2_2, OPCODE2_3
- , OPCODE2_4, OPCODE2_5, OPCODE2_6, OPCODE2_7
- , OPCODE2_8, OPCODE2_9, OPCODE2_A, OPCODE2_B
- , OPCODE2_C, OPCODE2_D, OPCODE2_E, OPCODE2_F
-} INSN_OPCODE2;
-
-/* Enum declaration for insn m3 enums. */
-typedef enum insn_m3 {
- M3_0, M3_1
-} INSN_M3;
-
-/* Enum declaration for insn m3 enums. */
-typedef enum insn_m2 {
- M2_0, M2_1
-} INSN_M2;
-
-/* Enum declaration for insn m1 enums. */
-typedef enum insn_m1 {
- M1_0, M1_1
-} INSN_M1;
-
-/* Enum declaration for insn zero enums. */
-typedef enum insn_zero {
- ZERO_0
-} INSN_ZERO;
-
-/* Enum declaration for insn mode a enums. */
-typedef enum insn_modea {
- MODEA_OFFSET, MODEA_INDIRECT_OFFSET
-} INSN_MODEA;
-
-/* Enum declaration for insn zero a enums. */
-typedef enum insn_zeroa {
- ZEROA_0
-} INSN_ZEROA;
-
-/* Enum declaration for insn mode b enums. */
-typedef enum insn_modeb {
- MODEB_ILL0, MODEB_ILL1, MODEB_ILL2, MODEB_ILL3
- , MODEB_INDIRECT, MODEB_IP_DISP, MODEB_RES6, MODEB_INDIRECT_INDEX
- , MODEB_ILL8, MODEB_ILL9, MODEB_ILL10, MODEB_ILL11
- , MODEB_DISP, MODEB_INDIRECT_DISP, MODEB_INDEX_DISP, MODEB_INDIRECT_INDEX_DISP
-} INSN_MODEB;
-
-/* Enum declaration for insn zero b enums. */
-typedef enum insn_zerob {
- ZEROB_0
-} INSN_ZEROB;
-
-/* Enum declaration for insn branch m1 enums. */
-typedef enum insn_br_m1 {
- BR_M1_0, BR_M1_1
-} INSN_BR_M1;
-
-/* Enum declaration for insn branch zero enums. */
-typedef enum insn_br_zero {
- BR_ZERO_0
-} INSN_BR_ZERO;
-
-/* Enum declaration for insn ctrl zero enums. */
-typedef enum insn_ctrl_zero {
- CTRL_ZERO_0
-} INSN_CTRL_ZERO;
-
-/* Attributes. */
-
-/* Enum declaration for machine type selection. */
-typedef enum mach_attr {
- MACH_BASE, MACH_I960_KA_SA, MACH_I960_CA, MACH_MAX
-} MACH_ATTR;
-
-/* Enum declaration for instruction set selection. */
-typedef enum isa_attr {
- ISA_I960, ISA_MAX
-} ISA_ATTR;
-
-/* Number of architecture variants. */
-#define MAX_ISAS 1
-#define MAX_MACHS ((int) MACH_MAX)
-
-/* Ifield support. */
-
-extern const struct cgen_ifld i960_cgen_ifld_table[];
-
-/* Ifield attribute indices. */
-
-/* Enum declaration for cgen_ifld attrs. */
-typedef enum cgen_ifld_attr {
- CGEN_IFLD_VIRTUAL, CGEN_IFLD_PCREL_ADDR, CGEN_IFLD_ABS_ADDR, CGEN_IFLD_RESERVED
- , CGEN_IFLD_SIGN_OPT, CGEN_IFLD_SIGNED, CGEN_IFLD_END_BOOLS, CGEN_IFLD_START_NBOOLS = 31
- , CGEN_IFLD_MACH, CGEN_IFLD_END_NBOOLS
-} CGEN_IFLD_ATTR;
-
-/* Number of non-boolean elements in cgen_ifld_attr. */
-#define CGEN_IFLD_NBOOL_ATTRS (CGEN_IFLD_END_NBOOLS - CGEN_IFLD_START_NBOOLS - 1)
-
-/* Enum declaration for i960 ifield types. */
-typedef enum ifield_type {
- I960_F_NIL, I960_F_OPCODE, I960_F_SRCDST, I960_F_SRC2
- , I960_F_M3, I960_F_M2, I960_F_M1, I960_F_OPCODE2
- , I960_F_ZERO, I960_F_SRC1, I960_F_ABASE, I960_F_MODEA
- , I960_F_ZEROA, I960_F_OFFSET, I960_F_MODEB, I960_F_SCALE
- , I960_F_ZEROB, I960_F_INDEX, I960_F_OPTDISP, I960_F_BR_SRC1
- , I960_F_BR_SRC2, I960_F_BR_M1, I960_F_BR_DISP, I960_F_BR_ZERO
- , I960_F_CTRL_DISP, I960_F_CTRL_ZERO, I960_F_MAX
-} IFIELD_TYPE;
-
-#define MAX_IFLD ((int) I960_F_MAX)
-
-/* Hardware attribute indices. */
-
-/* Enum declaration for cgen_hw attrs. */
-typedef enum cgen_hw_attr {
- CGEN_HW_VIRTUAL, CGEN_HW_CACHE_ADDR, CGEN_HW_PC, CGEN_HW_PROFILE
- , CGEN_HW_END_BOOLS, CGEN_HW_START_NBOOLS = 31, CGEN_HW_MACH, CGEN_HW_END_NBOOLS
-} CGEN_HW_ATTR;
-
-/* Number of non-boolean elements in cgen_hw_attr. */
-#define CGEN_HW_NBOOL_ATTRS (CGEN_HW_END_NBOOLS - CGEN_HW_START_NBOOLS - 1)
-
-/* Enum declaration for i960 hardware types. */
-typedef enum cgen_hw_type {
- HW_H_MEMORY, HW_H_SINT, HW_H_UINT, HW_H_ADDR
- , HW_H_IADDR, HW_H_PC, HW_H_GR, HW_H_CC
- , HW_MAX
-} CGEN_HW_TYPE;
-
-#define MAX_HW ((int) HW_MAX)
-
-/* Operand attribute indices. */
-
-/* Enum declaration for cgen_operand attrs. */
-typedef enum cgen_operand_attr {
- CGEN_OPERAND_VIRTUAL, CGEN_OPERAND_PCREL_ADDR, CGEN_OPERAND_ABS_ADDR, CGEN_OPERAND_SIGN_OPT
- , CGEN_OPERAND_SIGNED, CGEN_OPERAND_NEGATIVE, CGEN_OPERAND_RELAX, CGEN_OPERAND_SEM_ONLY
- , CGEN_OPERAND_END_BOOLS, CGEN_OPERAND_START_NBOOLS = 31, CGEN_OPERAND_MACH, CGEN_OPERAND_END_NBOOLS
-} CGEN_OPERAND_ATTR;
-
-/* Number of non-boolean elements in cgen_operand_attr. */
-#define CGEN_OPERAND_NBOOL_ATTRS (CGEN_OPERAND_END_NBOOLS - CGEN_OPERAND_START_NBOOLS - 1)
-
-/* Enum declaration for i960 operand types. */
-typedef enum cgen_operand_type {
- I960_OPERAND_PC, I960_OPERAND_SRC1, I960_OPERAND_SRC2, I960_OPERAND_DST
- , I960_OPERAND_LIT1, I960_OPERAND_LIT2, I960_OPERAND_ST_SRC, I960_OPERAND_ABASE
- , I960_OPERAND_OFFSET, I960_OPERAND_SCALE, I960_OPERAND_INDEX, I960_OPERAND_OPTDISP
- , I960_OPERAND_BR_SRC1, I960_OPERAND_BR_SRC2, I960_OPERAND_BR_DISP, I960_OPERAND_BR_LIT1
- , I960_OPERAND_CTRL_DISP, I960_OPERAND_MAX
-} CGEN_OPERAND_TYPE;
-
-/* Number of operands types. */
-#define MAX_OPERANDS ((int) I960_OPERAND_MAX)
-
-/* Maximum number of operands referenced by any insn. */
-#define MAX_OPERAND_INSTANCES 8
-
-/* Insn attribute indices. */
-
-/* Enum declaration for cgen_insn attrs. */
-typedef enum cgen_insn_attr {
- CGEN_INSN_ALIAS, CGEN_INSN_VIRTUAL, CGEN_INSN_UNCOND_CTI, CGEN_INSN_COND_CTI
- , CGEN_INSN_SKIP_CTI, CGEN_INSN_DELAY_SLOT, CGEN_INSN_RELAXABLE, CGEN_INSN_RELAX
- , CGEN_INSN_NO_DIS, CGEN_INSN_PBB, CGEN_INSN_END_BOOLS, CGEN_INSN_START_NBOOLS = 31
- , CGEN_INSN_MACH, CGEN_INSN_END_NBOOLS
-} CGEN_INSN_ATTR;
-
-/* Number of non-boolean elements in cgen_insn_attr. */
-#define CGEN_INSN_NBOOL_ATTRS (CGEN_INSN_END_NBOOLS - CGEN_INSN_START_NBOOLS - 1)
-
-/* cgen.h uses things we just defined. */
-#include "opcode/cgen.h"
-
-/* Attributes. */
-extern const CGEN_ATTR_TABLE i960_cgen_hardware_attr_table[];
-extern const CGEN_ATTR_TABLE i960_cgen_ifield_attr_table[];
-extern const CGEN_ATTR_TABLE i960_cgen_operand_attr_table[];
-extern const CGEN_ATTR_TABLE i960_cgen_insn_attr_table[];
-
-/* Hardware decls. */
-
-extern CGEN_KEYWORD i960_cgen_opval_h_gr;
-extern CGEN_KEYWORD i960_cgen_opval_h_cc;
-
-
-
-
-#endif /* I960_CPU_H */
diff --git a/sim/i960/i960-opc.h b/sim/i960/i960-opc.h
deleted file mode 100644
index 0b9da780cf3..00000000000
--- a/sim/i960/i960-opc.h
+++ /dev/null
@@ -1,170 +0,0 @@
-/* Instruction opcode header for i960.
-
-THIS FILE IS MACHINE GENERATED WITH CGEN.
-
-Copyright (C) 1996, 1997, 1998, 1999 Free Software Foundation, Inc.
-
-This file is part of the GNU Binutils and/or GDB, the GNU debugger.
-
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License along
-with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
-*/
-
-#ifndef I960_OPC_H
-#define I960_OPC_H
-
-/* -- opc.h */
-
-#undef CGEN_DIS_HASH_SIZE
-#define CGEN_DIS_HASH_SIZE 256
-#undef CGEN_DIS_HASH
-#define CGEN_DIS_HASH(buffer, value) ((unsigned char *) (buffer))[3]
-
-/* ??? Until cgen disassembler complete and functioning well, redirect back
- to old disassembler. */
-#define CGEN_PRINT_INSN(od, pc, info) print_insn_i960_orig (pc, info)
-
-/* -- */
-/* Enum declaration for i960 instruction types. */
-typedef enum cgen_insn_type {
- I960_INSN_INVALID, I960_INSN_MULO, I960_INSN_MULO1, I960_INSN_MULO2
- , I960_INSN_MULO3, I960_INSN_REMO, I960_INSN_REMO1, I960_INSN_REMO2
- , I960_INSN_REMO3, I960_INSN_DIVO, I960_INSN_DIVO1, I960_INSN_DIVO2
- , I960_INSN_DIVO3, I960_INSN_REMI, I960_INSN_REMI1, I960_INSN_REMI2
- , I960_INSN_REMI3, I960_INSN_DIVI, I960_INSN_DIVI1, I960_INSN_DIVI2
- , I960_INSN_DIVI3, I960_INSN_ADDO, I960_INSN_ADDO1, I960_INSN_ADDO2
- , I960_INSN_ADDO3, I960_INSN_SUBO, I960_INSN_SUBO1, I960_INSN_SUBO2
- , I960_INSN_SUBO3, I960_INSN_NOTBIT, I960_INSN_NOTBIT1, I960_INSN_NOTBIT2
- , I960_INSN_NOTBIT3, I960_INSN_AND, I960_INSN_AND1, I960_INSN_AND2
- , I960_INSN_AND3, I960_INSN_ANDNOT, I960_INSN_ANDNOT1, I960_INSN_ANDNOT2
- , I960_INSN_ANDNOT3, I960_INSN_SETBIT, I960_INSN_SETBIT1, I960_INSN_SETBIT2
- , I960_INSN_SETBIT3, I960_INSN_NOTAND, I960_INSN_NOTAND1, I960_INSN_NOTAND2
- , I960_INSN_NOTAND3, I960_INSN_XOR, I960_INSN_XOR1, I960_INSN_XOR2
- , I960_INSN_XOR3, I960_INSN_OR, I960_INSN_OR1, I960_INSN_OR2
- , I960_INSN_OR3, I960_INSN_NOR, I960_INSN_NOR1, I960_INSN_NOR2
- , I960_INSN_NOR3, I960_INSN_XNOR, I960_INSN_XNOR1, I960_INSN_XNOR2
- , I960_INSN_XNOR3, I960_INSN_NOT, I960_INSN_NOT1, I960_INSN_NOT2
- , I960_INSN_NOT3, I960_INSN_ORNOT, I960_INSN_ORNOT1, I960_INSN_ORNOT2
- , I960_INSN_ORNOT3, I960_INSN_CLRBIT, I960_INSN_CLRBIT1, I960_INSN_CLRBIT2
- , I960_INSN_CLRBIT3, I960_INSN_SHLO, I960_INSN_SHLO1, I960_INSN_SHLO2
- , I960_INSN_SHLO3, I960_INSN_SHRO, I960_INSN_SHRO1, I960_INSN_SHRO2
- , I960_INSN_SHRO3, I960_INSN_SHLI, I960_INSN_SHLI1, I960_INSN_SHLI2
- , I960_INSN_SHLI3, I960_INSN_SHRI, I960_INSN_SHRI1, I960_INSN_SHRI2
- , I960_INSN_SHRI3, I960_INSN_EMUL, I960_INSN_EMUL1, I960_INSN_EMUL2
- , I960_INSN_EMUL3, I960_INSN_MOV, I960_INSN_MOV1, I960_INSN_MOVL
- , I960_INSN_MOVL1, I960_INSN_MOVT, I960_INSN_MOVT1, I960_INSN_MOVQ
- , I960_INSN_MOVQ1, I960_INSN_MODPC, I960_INSN_MODAC, I960_INSN_LDA_OFFSET
- , I960_INSN_LDA_INDIRECT_OFFSET, I960_INSN_LDA_INDIRECT, I960_INSN_LDA_INDIRECT_INDEX, I960_INSN_LDA_DISP
- , I960_INSN_LDA_INDIRECT_DISP, I960_INSN_LDA_INDEX_DISP, I960_INSN_LDA_INDIRECT_INDEX_DISP, I960_INSN_LD_OFFSET
- , I960_INSN_LD_INDIRECT_OFFSET, I960_INSN_LD_INDIRECT, I960_INSN_LD_INDIRECT_INDEX, I960_INSN_LD_DISP
- , I960_INSN_LD_INDIRECT_DISP, I960_INSN_LD_INDEX_DISP, I960_INSN_LD_INDIRECT_INDEX_DISP, I960_INSN_LDOB_OFFSET
- , I960_INSN_LDOB_INDIRECT_OFFSET, I960_INSN_LDOB_INDIRECT, I960_INSN_LDOB_INDIRECT_INDEX, I960_INSN_LDOB_DISP
- , I960_INSN_LDOB_INDIRECT_DISP, I960_INSN_LDOB_INDEX_DISP, I960_INSN_LDOB_INDIRECT_INDEX_DISP, I960_INSN_LDOS_OFFSET
- , I960_INSN_LDOS_INDIRECT_OFFSET, I960_INSN_LDOS_INDIRECT, I960_INSN_LDOS_INDIRECT_INDEX, I960_INSN_LDOS_DISP
- , I960_INSN_LDOS_INDIRECT_DISP, I960_INSN_LDOS_INDEX_DISP, I960_INSN_LDOS_INDIRECT_INDEX_DISP, I960_INSN_LDIB_OFFSET
- , I960_INSN_LDIB_INDIRECT_OFFSET, I960_INSN_LDIB_INDIRECT, I960_INSN_LDIB_INDIRECT_INDEX, I960_INSN_LDIB_DISP
- , I960_INSN_LDIB_INDIRECT_DISP, I960_INSN_LDIB_INDEX_DISP, I960_INSN_LDIB_INDIRECT_INDEX_DISP, I960_INSN_LDIS_OFFSET
- , I960_INSN_LDIS_INDIRECT_OFFSET, I960_INSN_LDIS_INDIRECT, I960_INSN_LDIS_INDIRECT_INDEX, I960_INSN_LDIS_DISP
- , I960_INSN_LDIS_INDIRECT_DISP, I960_INSN_LDIS_INDEX_DISP, I960_INSN_LDIS_INDIRECT_INDEX_DISP, I960_INSN_LDL_OFFSET
- , I960_INSN_LDL_INDIRECT_OFFSET, I960_INSN_LDL_INDIRECT, I960_INSN_LDL_INDIRECT_INDEX, I960_INSN_LDL_DISP
- , I960_INSN_LDL_INDIRECT_DISP, I960_INSN_LDL_INDEX_DISP, I960_INSN_LDL_INDIRECT_INDEX_DISP, I960_INSN_LDT_OFFSET
- , I960_INSN_LDT_INDIRECT_OFFSET, I960_INSN_LDT_INDIRECT, I960_INSN_LDT_INDIRECT_INDEX, I960_INSN_LDT_DISP
- , I960_INSN_LDT_INDIRECT_DISP, I960_INSN_LDT_INDEX_DISP, I960_INSN_LDT_INDIRECT_INDEX_DISP, I960_INSN_LDQ_OFFSET
- , I960_INSN_LDQ_INDIRECT_OFFSET, I960_INSN_LDQ_INDIRECT, I960_INSN_LDQ_INDIRECT_INDEX, I960_INSN_LDQ_DISP
- , I960_INSN_LDQ_INDIRECT_DISP, I960_INSN_LDQ_INDEX_DISP, I960_INSN_LDQ_INDIRECT_INDEX_DISP, I960_INSN_ST_OFFSET
- , I960_INSN_ST_INDIRECT_OFFSET, I960_INSN_ST_INDIRECT, I960_INSN_ST_INDIRECT_INDEX, I960_INSN_ST_DISP
- , I960_INSN_ST_INDIRECT_DISP, I960_INSN_ST_INDEX_DISP, I960_INSN_ST_INDIRECT_INDEX_DISP, I960_INSN_STOB_OFFSET
- , I960_INSN_STOB_INDIRECT_OFFSET, I960_INSN_STOB_INDIRECT, I960_INSN_STOB_INDIRECT_INDEX, I960_INSN_STOB_DISP
- , I960_INSN_STOB_INDIRECT_DISP, I960_INSN_STOB_INDEX_DISP, I960_INSN_STOB_INDIRECT_INDEX_DISP, I960_INSN_STOS_OFFSET
- , I960_INSN_STOS_INDIRECT_OFFSET, I960_INSN_STOS_INDIRECT, I960_INSN_STOS_INDIRECT_INDEX, I960_INSN_STOS_DISP
- , I960_INSN_STOS_INDIRECT_DISP, I960_INSN_STOS_INDEX_DISP, I960_INSN_STOS_INDIRECT_INDEX_DISP, I960_INSN_STL_OFFSET
- , I960_INSN_STL_INDIRECT_OFFSET, I960_INSN_STL_INDIRECT, I960_INSN_STL_INDIRECT_INDEX, I960_INSN_STL_DISP
- , I960_INSN_STL_INDIRECT_DISP, I960_INSN_STL_INDEX_DISP, I960_INSN_STL_INDIRECT_INDEX_DISP, I960_INSN_STT_OFFSET
- , I960_INSN_STT_INDIRECT_OFFSET, I960_INSN_STT_INDIRECT, I960_INSN_STT_INDIRECT_INDEX, I960_INSN_STT_DISP
- , I960_INSN_STT_INDIRECT_DISP, I960_INSN_STT_INDEX_DISP, I960_INSN_STT_INDIRECT_INDEX_DISP, I960_INSN_STQ_OFFSET
- , I960_INSN_STQ_INDIRECT_OFFSET, I960_INSN_STQ_INDIRECT, I960_INSN_STQ_INDIRECT_INDEX, I960_INSN_STQ_DISP
- , I960_INSN_STQ_INDIRECT_DISP, I960_INSN_STQ_INDEX_DISP, I960_INSN_STQ_INDIRECT_INDEX_DISP, I960_INSN_CMPOBE_REG
- , I960_INSN_CMPOBE_LIT, I960_INSN_CMPOBNE_REG, I960_INSN_CMPOBNE_LIT, I960_INSN_CMPOBL_REG
- , I960_INSN_CMPOBL_LIT, I960_INSN_CMPOBLE_REG, I960_INSN_CMPOBLE_LIT, I960_INSN_CMPOBG_REG
- , I960_INSN_CMPOBG_LIT, I960_INSN_CMPOBGE_REG, I960_INSN_CMPOBGE_LIT, I960_INSN_CMPIBE_REG
- , I960_INSN_CMPIBE_LIT, I960_INSN_CMPIBNE_REG, I960_INSN_CMPIBNE_LIT, I960_INSN_CMPIBL_REG
- , I960_INSN_CMPIBL_LIT, I960_INSN_CMPIBLE_REG, I960_INSN_CMPIBLE_LIT, I960_INSN_CMPIBG_REG
- , I960_INSN_CMPIBG_LIT, I960_INSN_CMPIBGE_REG, I960_INSN_CMPIBGE_LIT, I960_INSN_BBC_REG
- , I960_INSN_BBC_LIT, I960_INSN_BBS_REG, I960_INSN_BBS_LIT, I960_INSN_CMPI
- , I960_INSN_CMPI1, I960_INSN_CMPI2, I960_INSN_CMPI3, I960_INSN_CMPO
- , I960_INSN_CMPO1, I960_INSN_CMPO2, I960_INSN_CMPO3, I960_INSN_TESTNO_REG
- , I960_INSN_TESTG_REG, I960_INSN_TESTE_REG, I960_INSN_TESTGE_REG, I960_INSN_TESTL_REG
- , I960_INSN_TESTNE_REG, I960_INSN_TESTLE_REG, I960_INSN_TESTO_REG, I960_INSN_BNO
- , I960_INSN_BG, I960_INSN_BE, I960_INSN_BGE, I960_INSN_BL
- , I960_INSN_BNE, I960_INSN_BLE, I960_INSN_BO, I960_INSN_B
- , I960_INSN_BX_INDIRECT_OFFSET, I960_INSN_BX_INDIRECT, I960_INSN_BX_INDIRECT_INDEX, I960_INSN_BX_DISP
- , I960_INSN_BX_INDIRECT_DISP, I960_INSN_CALLX_DISP, I960_INSN_CALLX_INDIRECT, I960_INSN_CALLX_INDIRECT_OFFSET
- , I960_INSN_RET, I960_INSN_CALLS, I960_INSN_FMARK, I960_INSN_FLUSHREG
- , I960_INSN_MAX
-} CGEN_INSN_TYPE;
-
-/* Index of `invalid' insn place holder. */
-#define CGEN_INSN_INVALID I960_INSN_INVALID
-
-/* Total number of insns in table. */
-#define MAX_INSNS ((int) I960_INSN_MAX)
-
-/* This struct records data prior to insertion or after extraction. */
-struct cgen_fields
-{
- int length;
- long f_nil;
- long f_opcode;
- long f_srcdst;
- long f_src2;
- long f_m3;
- long f_m2;
- long f_m1;
- long f_opcode2;
- long f_zero;
- long f_src1;
- long f_abase;
- long f_modea;
- long f_zeroa;
- long f_offset;
- long f_modeb;
- long f_scale;
- long f_zerob;
- long f_index;
- long f_optdisp;
- long f_br_src1;
- long f_br_src2;
- long f_br_m1;
- long f_br_disp;
- long f_br_zero;
- long f_ctrl_disp;
- long f_ctrl_zero;
-};
-
-#define CGEN_INIT_PARSE(od) \
-{\
-}
-#define CGEN_INIT_INSERT(od) \
-{\
-}
-#define CGEN_INIT_EXTRACT(od) \
-{\
-}
-#define CGEN_INIT_PRINT(od) \
-{\
-}
-
-
-#endif /* I960_OPC_H */
diff --git a/sim/i960/i960-sim.h b/sim/i960/i960-sim.h
deleted file mode 100644
index 471b03e7137..00000000000
--- a/sim/i960/i960-sim.h
+++ /dev/null
@@ -1,54 +0,0 @@
-#ifndef I960_SIM_H
-#define I960_SIM_H
-
-/* gdb register numbers */
-/* Copied from gdb/config/i960/tc-i960.h. */
-#define PCW_REGNUM 32 /* process control word */
-#define ACW_REGNUM 33 /* arithmetic control word */
-#define TCW_REGNUM 34 /* trace control word */
-#define IP_REGNUM 35 /* instruction pointer */
-#define FP0_REGNUM 36 /* First floating point register */
-/* Some registers have more than one name */
-#define PC_REGNUM IP_REGNUM /* GDB refers to ip as the Program Counter */
-
-SI a_i960_h_gr_get (SIM_CPU *, UINT);
-void a_i960_h_gr_set (SIM_CPU *, UINT, SI);
-IADDR a_i960_h_pc_get (SIM_CPU *);
-void a_i960_h_pc_set (SIM_CPU *, IADDR);
-
-#define GETTWI GETTSI
-#define SETTWI SETTSI
-
-/* Exception, Interrupt, and Trap addresses */
-/* ??? Hack for traps.c. */
-#define EIT_TRAP_BASE_ADDR 0x40
-
-/* Special purpose traps. */
-/* ??? Hack for traps.c. */
-#define TRAP_SYSCALL 0
-#define TRAP_BREAKPOINT 1
-
-/* Cache Purge Control (only exists on early versions of chips) */
-/* ??? Hack for devices.c. */
-#define MSPR_ADDR 0xfffffff7
-#define MSPR_PURGE 1
-
-/* Cache Control Register */
-/* ??? Hack for devices.c. */
-#define MCCR_ADDR 0xffffffff
-#define MCCR_CP 0x80
-
-/* Start address and length of all device support. */
-/* ??? Hack for sim-if.c. */
-#define I960_DEVICE_ADDR 0xff000000
-#define I960_DEVICE_LEN 0x00ffffff
-
-/* sim_core_attach device argument. */
-/* ??? Hack for sim-if.c. */
-extern device i960_devices;
-
-/* FIXME: Temporary, until device support ready. */
-/* ??? Hack for devices.c. */
-struct _device { int foo; };
-
-#endif I960_SIM_H
diff --git a/sim/i960/i960.c b/sim/i960/i960.c
deleted file mode 100644
index 78fac37e6bc..00000000000
--- a/sim/i960/i960.c
+++ /dev/null
@@ -1,205 +0,0 @@
-/* i960 simulator support code
- Copyright (C) 1998 Free Software Foundation, Inc.
- Contributed by Cygnus Support.
-
-This file is part of GDB, the GNU debugger.
-
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License along
-with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
-
-#define WANT_CPU
-#define WANT_CPU_I960BASE
-
-#include "sim-main.h"
-#include "cgen-mem.h"
-#include "cgen-ops.h"
-
-/* The contents of BUF are in target byte order. */
-
-int
-i960base_fetch_register (SIM_CPU *current_cpu, int rn, unsigned char *buf,
- int len)
-{
- if (rn < 32)
- SETTWI (buf, a_i960_h_gr_get (current_cpu, rn));
- else
- switch (rn)
- {
- case PC_REGNUM :
- SETTWI (buf, a_i960_h_pc_get (current_cpu));
- break;
- default :
- return 0;
- }
-
- return -1; /*FIXME*/
-
-}
-
-/* The contents of BUF are in target byte order. */
-
-int
-i960base_store_register (SIM_CPU *current_cpu, int rn, unsigned char *buf,
- int len)
-{
- if (rn < 32)
- a_i960_h_gr_set (current_cpu, rn, GETTWI (buf));
- else
- switch (rn)
- {
- case PC_REGNUM :
- a_i960_h_pc_set (current_cpu, GETTWI (buf));
- break;
- default :
- return 0;
- }
-
- return -1; /*FIXME*/
-}
-
-/* Cover fns for mach independent register accesses. */
-
-SI
-a_i960_h_gr_get (SIM_CPU *current_cpu, UINT regno)
-{
- switch (MACH_NUM (CPU_MACH (current_cpu)))
- {
-#ifdef HAVE_CPU_I960BASE
- case MACH_I960_KA_SA :
- case MACH_I960_CA :
- return i960base_h_gr_get (current_cpu, regno);
-#endif
- default :
- abort ();
- }
-}
-
-void
-a_i960_h_gr_set (SIM_CPU *current_cpu, UINT regno, SI newval)
-{
- switch (MACH_NUM (CPU_MACH (current_cpu)))
- {
-#ifdef HAVE_CPU_I960BASE
- case MACH_I960_KA_SA :
- case MACH_I960_CA :
- i960base_h_gr_set (current_cpu, regno, newval);
- break;
-#endif
- default :
- abort ();
- }
-}
-
-IADDR
-a_i960_h_pc_get (SIM_CPU *current_cpu)
-{
- switch (MACH_NUM (CPU_MACH (current_cpu)))
- {
-#ifdef HAVE_CPU_I960BASE
- case MACH_I960_KA_SA :
- case MACH_I960_CA :
- return i960base_h_pc_get (current_cpu);
-#endif
- default :
- abort ();
- }
-}
-
-void
-a_i960_h_pc_set (SIM_CPU *current_cpu, IADDR newval)
-{
- switch (MACH_NUM (CPU_MACH (current_cpu)))
- {
-#ifdef HAVE_CPU_I960BASE
- case MACH_I960_KA_SA :
- case MACH_I960_CA :
- i960base_h_pc_set (current_cpu, newval);
- break;
-#endif
- default :
- abort ();
- }
-}
-
-#if WITH_PROFILE_MODEL_P
-
-/* FIXME: Some of these should be inline or macros. Later. */
-
-/* Initialize cycle counting for an insn.
- FIRST_P is non-zero if this is the first insn in a set of parallel
- insns. */
-
-void
-i960base_model_insn_before (SIM_CPU *cpu, int first_p)
-{
-}
-
-/* Record the cycles computed for an insn.
- LAST_P is non-zero if this is the last insn in a set of parallel insns,
- and we update the total cycle count.
- CYCLES is the cycle count of the insn. */
-
-void
-i960base_model_insn_after (SIM_CPU *cpu, int last_p, int cycles)
-{
-}
-
-/* Initialize cycle counting for an insn.
- FIRST_P is non-zero if this is the first insn in a set of parallel
- insns. */
-
-void
-i960_model_init_insn_cycles (SIM_CPU *cpu, int first_p)
-{
-}
-
-/* Record the cycles computed for an insn.
- LAST_P is non-zero if this is the last insn in a set of parallel insns,
- and we update the total cycle count. */
-
-void
-i960_model_update_insn_cycles (SIM_CPU *cpu, int last_p)
-{
-}
-
-void
-i960_model_record_cycles (SIM_CPU *cpu, unsigned long cycles)
-{
-}
-
-void
-i960base_model_mark_get_h_gr (SIM_CPU *cpu, ARGBUF *abuf)
-{
-}
-
-void
-i960base_model_mark_set_h_gr (SIM_CPU *cpu, ARGBUF *abuf)
-{
-}
-
-#endif /* WITH_PROFILE_MODEL_P */
-
-int
-i960base_model_i960KA_u_exec (SIM_CPU *cpu, const IDESC *idesc,
- int unit_num, int referenced)
-{
- return idesc->timing->units[unit_num].done;
-}
-
-int
-i960base_model_i960CA_u_exec (SIM_CPU *cpu, const IDESC *idesc,
- int unit_num, int referenced)
-{
- return idesc->timing->units[unit_num].done;
-}
diff --git a/sim/i960/mloop.in b/sim/i960/mloop.in
deleted file mode 100644
index 0a3ad4728b6..00000000000
--- a/sim/i960/mloop.in
+++ /dev/null
@@ -1,301 +0,0 @@
-# Simulator main loop for i960. -*- C -*-
-# Copyright (C) 1996, 1997, 1998, 1999 Free Software Foundation, Inc.
-#
-# This file is part of the GNU Simulators.
-#
-# This program is free software; you can redistribute it and/or modify
-# it under the terms of the GNU General Public License as published by
-# the Free Software Foundation; either version 2, or (at your option)
-# any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License along
-# with this program; if not, write to the Free Software Foundation, Inc.,
-# 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
-# Syntax:
-# /bin/sh mainloop.in command
-#
-# Command is one of:
-#
-# init
-# support
-# extract-{simple,scache,pbb}
-# {full,fast}-exec-{simple,scache,pbb}
-#
-# A target need only provide a "full" version of one of simple,scache,pbb.
-# If the target wants it can also provide a fast version of same.
-# It can't provide more than this, however for illustration's sake the M32R
-# port provides examples of all.
-
-# ??? After a few more ports are done, revisit.
-# Will eventually need to machine generate a lot of this.
-
-case "x$1" in
-
-xsupport)
-
-cat <<EOF
-
-/*static INLINE*/ const IDESC *
-extract32 (SIM_CPU *current_cpu, PCADDR pc, CGEN_INSN_INT insn,
- ARGBUF *abuf, int fast_p)
-{
- /* ??? wilson, instructions are 32 bits. */
- const IDESC *d = @cpu@_decode (current_cpu, pc, (USI) insn, abuf);
- @cpu@_fill_argbuf (current_cpu, abuf, d, pc, fast_p);
- if (! fast_p)
- {
- int trace_p = PC_IN_TRACE_RANGE_P (current_cpu, pc);
- int profile_p = PC_IN_PROFILE_RANGE_P (current_cpu, pc);
- @cpu@_fill_argbuf_tp (current_cpu, abuf, trace_p, profile_p);
- }
- return d;
-}
-
-#if 0
-/*static INLINE*/ const IDESC *
-/* ??? wilson, Some instructions are 64 bits. */
-extract64 (SIM_CPU *current_cpu, PCADDR pc, insn_t insn,
- ARGBUF *abuf, int fast_p)
-{
- const IDESC *d = @cpu@_decode (current_cpu, pc, (UDI) insn >> 32, abuf);
- SEM_SET_CODE (abuf, d, fast_p);
- abuf->idesc = d;
- abuf->addr = pc;
- return d;
-}
-#endif
-
-static INLINE SEM_PC
-execute (SIM_CPU *current_cpu, SCACHE *sc, int fast_p)
-{
- SEM_PC vpc;
-
- if (fast_p)
- {
-#if ! WITH_SEM_SWITCH_FAST
-#if WITH_SCACHE
- vpc = (*sc->argbuf.semantic.sem_fast) (current_cpu, sc);
-#else
- vpc = (*sc->argbuf.semantic.sem_fast) (current_cpu, &sc->argbuf);
-#endif
-#else
- abort ();
-#endif /* WITH_SEM_SWITCH_FAST */
- }
- else
- {
-#if ! WITH_SEM_SWITCH_FULL
- ARGBUF *abuf = &sc->argbuf;
- const IDESC *idesc = abuf->idesc;
- const CGEN_INSN *insn = idesc->idata;
-#if WITH_SCACHE_PBB
- int virtual_p = CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_VIRTUAL);
-#else
- int virtual_p = 0;
-#endif
-
- if (! virtual_p)
- {
- /* FIXME: call x-before */
- if (ARGBUF_PROFILE_P (abuf))
- PROFILE_COUNT_INSN (current_cpu, abuf->addr, idesc->num);
- /* FIXME: Later make cover macros: PROFILE_INSN_{INIT,FINI}. */
- if (PROFILE_MODEL_P (current_cpu))
- @cpu@_model_insn_before (current_cpu, 1 /*first_p*/);
- TRACE_INSN_INIT (current_cpu, abuf, 1);
- TRACE_INSN (current_cpu, insn,
- (const struct argbuf *) abuf, abuf->addr);
- }
-#if WITH_SCACHE
- vpc = (*sc->argbuf.semantic.sem_full) (current_cpu, sc);
-#else
- vpc = (*sc->argbuf.semantic.sem_full) (current_cpu, abuf);
-#endif
- if (! virtual_p)
- {
- /* FIXME: call x-after */
- if (PROFILE_MODEL_P (current_cpu))
- {
- int cycles;
-
- cycles = (*idesc->timing->model_fn) (current_cpu, sc);
- @cpu@_model_insn_after (current_cpu, 1 /*last_p*/, cycles);
- }
- TRACE_INSN_FINI (current_cpu, abuf, 1);
- }
-#else
- abort ();
-#endif /* WITH_SEM_SWITCH_FULL */
- }
-
- return vpc;
-}
-
-EOF
-
-;;
-
-xinit)
-
-cat <<EOF
-/*xxxinit*/
-EOF
-
-;;
-
-xextract-simple | xextract-scache)
-
-cat <<EOF
-{
- if ((pc & 3) != 0)
- {
- abort ();
-#if 0
- /* This only occurs when single stepping.
- The test is unnecessary otherwise, but the cost is teensy,
- compared with decoding/extraction. */
- UHI insn = GETIMEMUHI (current_cpu, pc);
- extract16 (current_cpu, pc, insn & 0x7fff, sc, FAST_P);
-#endif
- }
- else
- {
- USI insn = GETIMEMUSI (current_cpu, pc);
- /* ??? wilson, insns are 32 bits, unless MEMB with displacement, which
- has high bit set, bit 12 set, and mode of 5, 12, 13, 14, or 15. */
- if (((SI) insn > 0)
- || ! (((insn & 0x3000) == 0x3000)
- || ((insn & 0x3C00) == 0x1400)))
- {
- extract32 (current_cpu, pc, insn, sc, FAST_P);
- }
- else
- {
- UDI llinsn = (((UDI) insn << 32) || GETIMEMUSI (current_cpu, pc+4));
- extract64 (current_cpu, pc, llinsn, sc, FAST_P);
- }
- }
-}
-EOF
-
-;;
-
-xextract-pbb)
-
-# Inputs: current_cpu, pc, sc, max_insns, FAST_P
-# Outputs: sc, pc
-# sc must be left pointing past the last created entry.
-# pc must be left pointing past the last created entry.
-# If the pbb is terminated by a cti insn, SET_CTI_VPC(sc) must be called
-# to record the vpc of the cti insn.
-# SET_INSN_COUNT(n) must be called to record number of real insns.
-
-cat <<EOF
-{
- const IDESC *idesc;
- int icount = 0;
-
- if ((pc & 3) != 0)
- {
- abort ();
-#if 0
- /* This only occurs when single stepping.
- The test is unnecessary otherwise, but the cost is teensy,
- compared with decoding/extraction. */
- UHI insn = GETIMEMUHI (current_cpu, pc);
- idesc = extract16 (current_cpu, pc, insn & 0x7fff, &sc->argbuf, FAST_P);
- ++sc;
- --max_insns;
- ++icount;
- pc += 2;
- if (IDESC_CTI_P (idesc))
- {
- SET_CTI_VPC (sc - 1);
- goto Finish;
- }
-#endif
- }
-
- while (max_insns > 0)
- {
- USI insn = GETIMEMUSI (current_cpu, pc);
-#if 0
- /* ??? wilson, insns are 32 bits, unless MEMB with displacement, which
- has high bit set, bit 12 set, and mode of 5, 12, 13, 14, or 15. */
- if (((SI) insn > 0)
- || ! (((insn & 0x3000) == 0x3000)
- || ((insn & 0x3C00) == 0x1400)))
- {
- idesc = extract32 (current_cpu, pc, insn, &sc->argbuf, FAST_P);
- ++sc;
- --max_insns;
- ++icount;
- pc += 4;
- if (IDESC_CTI_P (idesc))
- {
- SET_CTI_VPC (sc - 1);
- break;
- }
- }
- else
- {
- idesc = extract64 (current_cpu, pc, insn, &sc->argbuf, FAST_P);
- ++sc;
- --max_insns;
- ++icount;
- pc += 8;
- if (IDESC_CTI_P (idesc))
- {
- SET_CTI_VPC (sc - 1);
- break;
- }
- }
-#else
- idesc = extract32 (current_cpu, pc, insn, &sc->argbuf, FAST_P);
- ++sc;
- --max_insns;
- ++icount;
- pc += idesc->length;
- if (IDESC_CTI_P (idesc))
- {
- SET_CTI_VPC (sc - 1);
- break;
- }
- }
-#endif
- Finish:
- SET_INSN_COUNT (icount);
-}
-EOF
-
-;;
-
-xfull-exec-* | xfast-exec-*)
-
-# Inputs: current_cpu, vpc, FAST_P
-# Outputs: vpc
-# vpc is the virtual program counter.
-
-cat <<EOF
-#if (! FAST_P && WITH_SEM_SWITCH_FULL) || (FAST_P && WITH_SEM_SWITCH_FAST)
-#define DEFINE_SWITCH
-#include "sem-switch.c"
-#else
- vpc = execute (current_cpu, vpc, FAST_P);
-#endif
-EOF
-
-;;
-
-*)
- echo "Invalid argument to mainloop.in: $1" >&2
- exit 1
- ;;
-
-esac
diff --git a/sim/i960/model.c b/sim/i960/model.c
deleted file mode 100644
index 600d9ea4359..00000000000
--- a/sim/i960/model.c
+++ /dev/null
@@ -1,10065 +0,0 @@
-/* Simulator model support for i960base.
-
-THIS FILE IS MACHINE GENERATED WITH CGEN.
-
-Copyright (C) 1996, 1997, 1998, 1999 Free Software Foundation, Inc.
-
-This file is part of the GNU Simulators.
-
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License along
-with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
-*/
-
-#define WANT_CPU i960base
-#define WANT_CPU_I960BASE
-
-#include "sim-main.h"
-
-/* The profiling data is recorded here, but is accessed via the profiling
- mechanism. After all, this is information for profiling. */
-
-#if WITH_PROFILE_MODEL_P
-
-/* Model handlers for each insn. */
-
-static int
-model_i960KA_mulo (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_mulo1 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul1.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_mulo2 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul2.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_mulo3 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul3.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_remo (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_remo1 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul1.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_remo2 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul2.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_remo3 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul3.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_divo (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_divo1 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul1.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_divo2 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul2.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_divo3 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul3.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_remi (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_remi1 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul1.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_remi2 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul2.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_remi3 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul3.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_divi (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_divi1 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul1.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_divi2 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul2.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_divi3 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul3.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_addo (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_addo1 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul1.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_addo2 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul2.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_addo3 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul3.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_subo (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_subo1 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul1.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_subo2 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul2.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_subo3 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul3.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_notbit (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_notbit1 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul1.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_notbit2 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul2.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_notbit3 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul3.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_and (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_and1 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul1.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_and2 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul2.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_and3 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul3.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_andnot (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_andnot1 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul1.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_andnot2 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul2.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_andnot3 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul3.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_setbit (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_setbit1 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul1.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_setbit2 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul2.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_setbit3 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul3.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_notand (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_notand1 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul1.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_notand2 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul2.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_notand3 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul3.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_xor (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_xor1 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul1.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_xor2 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul2.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_xor3 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul3.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_or (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_or1 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul1.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_or2 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul2.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_or3 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul3.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_nor (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_nor1 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul1.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_nor2 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul2.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_nor3 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul3.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_xnor (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_xnor1 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul1.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_xnor2 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul2.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_xnor3 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul3.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_not (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul2.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_not1 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul3.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_not2 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul2.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_not3 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul3.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_ornot (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_ornot1 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul1.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_ornot2 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul2.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_ornot3 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul3.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_clrbit (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_clrbit1 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul1.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_clrbit2 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul2.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_clrbit3 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul3.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_shlo (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_shlo1 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul1.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_shlo2 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul2.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_shlo3 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul3.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_shro (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_shro1 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul1.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_shro2 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul2.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_shro3 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul3.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_shli (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_shli1 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul1.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_shli2 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul2.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_shli3 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul3.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_shri (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_shri1 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul1.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_shri2 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul2.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_shri3 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul3.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_emul (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_emul1 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul1.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_emul2 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul2.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_emul3 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul3.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_mov (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul2.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_mov1 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul3.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_movl (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_movq.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_movl1 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul3.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_movt (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_movq.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_movt1 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_movq.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_movq (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_movq.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_movq1 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_movq.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_modpc (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul1.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_modac (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul1.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_lda_offset (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_lda_indirect_offset (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_lda_indirect (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_lda_indirect_index (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_lda_disp (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_lda_indirect_disp (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_lda_index_disp (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_lda_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_ld_offset (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_ld_indirect_offset (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_ld_indirect (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_ld_indirect_index (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_ld_disp (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_ld_indirect_disp (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_ld_index_disp (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_ld_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_ldob_offset (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_ldob_indirect_offset (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_ldob_indirect (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_ldob_indirect_index (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_ldob_disp (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_ldob_indirect_disp (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_ldob_index_disp (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_ldob_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_ldos_offset (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_ldos_indirect_offset (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_ldos_indirect (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_ldos_indirect_index (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_ldos_disp (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_ldos_indirect_disp (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_ldos_index_disp (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_ldos_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_ldib_offset (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_ldib_indirect_offset (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_ldib_indirect (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_ldib_indirect_index (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_ldib_disp (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_ldib_indirect_disp (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_ldib_index_disp (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_ldib_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_ldis_offset (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_ldis_indirect_offset (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_ldis_indirect (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_ldis_indirect_index (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_ldis_disp (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_ldis_indirect_disp (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_ldis_index_disp (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_ldis_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_ldl_offset (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_ldl_indirect_offset (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_ldl_indirect (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_ldl_indirect_index (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_ldl_disp (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_ldl_indirect_disp (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_ldl_index_disp (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_ldl_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_ldt_offset (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_ldt_indirect_offset (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_ldt_indirect (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_ldt_indirect_index (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_ldt_disp (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_ldt_indirect_disp (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_ldt_index_disp (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_ldt_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_ldq_offset (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_ldq_indirect_offset (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_ldq_indirect (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_ldq_indirect_index (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_ldq_disp (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_ldq_indirect_disp (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_ldq_index_disp (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_ldq_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_st_offset (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_st_indirect_offset (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_st_indirect (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_st_indirect_index (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_st_disp (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_st_indirect_disp (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_st_index_disp (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_st_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_stob_offset (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_stob_indirect_offset (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_stob_indirect (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_stob_indirect_index (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_stob_disp (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_stob_indirect_disp (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_stob_index_disp (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_stob_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_stos_offset (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_stos_indirect_offset (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_stos_indirect (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_stos_indirect_index (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_stos_disp (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_stos_indirect_disp (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_stos_index_disp (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_stos_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_stl_offset (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_stl_indirect_offset (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_stl_indirect (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_stl_indirect_index (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_stl_disp (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_stl_indirect_disp (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_stl_index_disp (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_stl_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_stt_offset (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_stt_indirect_offset (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_stt_indirect (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_stt_indirect_index (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_stt_disp (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_stt_indirect_disp (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_stt_index_disp (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_stt_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_stq_offset (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_stq_indirect_offset (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_stq_indirect (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_stq_indirect_index (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_stq_disp (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_stq_indirect_disp (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_stq_index_disp (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_stq_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_cmpobe_reg (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_cmpobe_lit (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_cmpobne_reg (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_cmpobne_lit (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_cmpobl_reg (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_cmpobl_lit (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_cmpoble_reg (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_cmpoble_lit (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_cmpobg_reg (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_cmpobg_lit (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_cmpobge_reg (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_cmpobge_lit (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_cmpibe_reg (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_cmpibe_lit (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_cmpibne_reg (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_cmpibne_lit (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_cmpibl_reg (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_cmpibl_lit (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_cmpible_reg (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_cmpible_lit (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_cmpibg_reg (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_cmpibg_lit (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_cmpibge_reg (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_cmpibge_lit (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_bbc_reg (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_bbc_lit (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_bbs_reg (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_bbs_lit (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_cmpi (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_cmpi1 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul1.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_cmpi2 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul2.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_cmpi3 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul3.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_cmpo (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_cmpo1 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul1.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_cmpo2 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul2.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_cmpo3 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul3.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_testno_reg (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_testno_reg.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_testg_reg (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_testno_reg.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_teste_reg (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_testno_reg.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_testge_reg (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_testno_reg.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_testl_reg (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_testno_reg.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_testne_reg (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_testno_reg.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_testle_reg (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_testno_reg.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_testo_reg (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_testno_reg.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_bno (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_bno.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_bg (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_bno.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_be (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_bno.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_bge (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_bno.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_bl (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_bno.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_bne (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_bno.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_ble (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_bno.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_bo (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_bno.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_b (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_bno.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_bx_indirect_offset (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_bx_indirect (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_bx_indirect_index (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_bx_disp (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_bx_indirect_disp (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_callx_disp (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_callx_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_callx_indirect (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_callx_indirect_offset.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_callx_indirect_offset (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_callx_indirect_offset.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_ret (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_callx_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_calls (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul2.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_fmark (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.fmt_empty.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960KA_flushreg (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.fmt_empty.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960KA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_mulo (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_mulo1 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul1.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_mulo2 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul2.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_mulo3 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul3.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_remo (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_remo1 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul1.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_remo2 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul2.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_remo3 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul3.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_divo (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_divo1 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul1.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_divo2 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul2.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_divo3 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul3.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_remi (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_remi1 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul1.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_remi2 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul2.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_remi3 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul3.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_divi (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_divi1 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul1.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_divi2 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul2.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_divi3 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul3.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_addo (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_addo1 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul1.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_addo2 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul2.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_addo3 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul3.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_subo (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_subo1 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul1.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_subo2 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul2.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_subo3 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul3.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_notbit (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_notbit1 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul1.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_notbit2 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul2.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_notbit3 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul3.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_and (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_and1 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul1.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_and2 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul2.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_and3 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul3.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_andnot (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_andnot1 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul1.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_andnot2 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul2.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_andnot3 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul3.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_setbit (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_setbit1 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul1.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_setbit2 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul2.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_setbit3 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul3.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_notand (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_notand1 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul1.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_notand2 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul2.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_notand3 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul3.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_xor (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_xor1 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul1.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_xor2 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul2.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_xor3 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul3.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_or (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_or1 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul1.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_or2 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul2.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_or3 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul3.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_nor (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_nor1 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul1.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_nor2 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul2.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_nor3 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul3.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_xnor (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_xnor1 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul1.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_xnor2 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul2.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_xnor3 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul3.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_not (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul2.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_not1 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul3.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_not2 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul2.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_not3 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul3.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_ornot (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_ornot1 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul1.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_ornot2 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul2.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_ornot3 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul3.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_clrbit (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_clrbit1 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul1.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_clrbit2 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul2.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_clrbit3 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul3.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_shlo (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_shlo1 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul1.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_shlo2 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul2.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_shlo3 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul3.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_shro (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_shro1 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul1.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_shro2 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul2.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_shro3 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul3.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_shli (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_shli1 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul1.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_shli2 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul2.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_shli3 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul3.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_shri (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_shri1 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul1.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_shri2 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul2.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_shri3 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul3.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_emul (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_emul1 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul1.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_emul2 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul2.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_emul3 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul3.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_mov (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul2.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_mov1 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul3.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_movl (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_movq.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_movl1 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul3.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_movt (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_movq.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_movt1 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_movq.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_movq (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_movq.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_movq1 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_movq.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_modpc (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul1.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_modac (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul1.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_lda_offset (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_lda_indirect_offset (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_lda_indirect (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_lda_indirect_index (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_lda_disp (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_lda_indirect_disp (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_lda_index_disp (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_lda_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_ld_offset (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_ld_indirect_offset (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_ld_indirect (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_ld_indirect_index (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_ld_disp (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_ld_indirect_disp (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_ld_index_disp (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_ld_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_ldob_offset (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_ldob_indirect_offset (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_ldob_indirect (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_ldob_indirect_index (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_ldob_disp (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_ldob_indirect_disp (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_ldob_index_disp (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_ldob_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_ldos_offset (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_ldos_indirect_offset (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_ldos_indirect (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_ldos_indirect_index (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_ldos_disp (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_ldos_indirect_disp (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_ldos_index_disp (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_ldos_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_ldib_offset (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_ldib_indirect_offset (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_ldib_indirect (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_ldib_indirect_index (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_ldib_disp (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_ldib_indirect_disp (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_ldib_index_disp (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_ldib_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_ldis_offset (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_ldis_indirect_offset (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_ldis_indirect (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_ldis_indirect_index (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_ldis_disp (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_ldis_indirect_disp (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_ldis_index_disp (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_ldis_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_ldl_offset (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_ldl_indirect_offset (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_ldl_indirect (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_ldl_indirect_index (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_ldl_disp (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_ldl_indirect_disp (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_ldl_index_disp (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_ldl_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_ldt_offset (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_ldt_indirect_offset (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_ldt_indirect (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_ldt_indirect_index (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_ldt_disp (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_ldt_indirect_disp (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_ldt_index_disp (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_ldt_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_ldq_offset (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_ldq_indirect_offset (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_ldq_indirect (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_ldq_indirect_index (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_ldq_disp (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_ldq_indirect_disp (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_ldq_index_disp (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_ldq_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_st_offset (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_st_indirect_offset (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_st_indirect (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_st_indirect_index (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_st_disp (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_st_indirect_disp (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_st_index_disp (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_st_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_stob_offset (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_stob_indirect_offset (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_stob_indirect (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_stob_indirect_index (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_stob_disp (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_stob_indirect_disp (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_stob_index_disp (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_stob_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_stos_offset (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_stos_indirect_offset (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_stos_indirect (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_stos_indirect_index (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_stos_disp (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_stos_indirect_disp (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_stos_index_disp (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_stos_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_stl_offset (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_stl_indirect_offset (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_stl_indirect (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_stl_indirect_index (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_stl_disp (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_stl_indirect_disp (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_stl_index_disp (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_stl_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_stt_offset (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_stt_indirect_offset (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_stt_indirect (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_stt_indirect_index (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_stt_disp (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_stt_indirect_disp (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_stt_index_disp (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_stt_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_stq_offset (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_stq_indirect_offset (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_stq_indirect (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_stq_indirect_index (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_stq_disp (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_stq_indirect_disp (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_stq_index_disp (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_stq_indirect_index_disp (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_cmpobe_reg (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_cmpobe_lit (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_cmpobne_reg (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_cmpobne_lit (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_cmpobl_reg (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_cmpobl_lit (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_cmpoble_reg (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_cmpoble_lit (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_cmpobg_reg (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_cmpobg_lit (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_cmpobge_reg (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_cmpobge_lit (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_cmpibe_reg (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_cmpibe_lit (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_cmpibne_reg (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_cmpibne_lit (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_cmpibl_reg (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_cmpibl_lit (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_cmpible_reg (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_cmpible_lit (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_cmpibg_reg (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_cmpibg_lit (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_cmpibge_reg (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_cmpibge_lit (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_bbc_reg (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_bbc_lit (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_bbs_reg (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_bbs_lit (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_cmpi (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_cmpi1 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul1.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_cmpi2 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul2.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_cmpi3 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul3.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_cmpo (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_cmpo1 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul1.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_cmpo2 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul2.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_cmpo3 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul3.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_testno_reg (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_testno_reg.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_testg_reg (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_testno_reg.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_teste_reg (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_testno_reg.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_testge_reg (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_testno_reg.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_testl_reg (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_testno_reg.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_testne_reg (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_testno_reg.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_testle_reg (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_testno_reg.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_testo_reg (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_testno_reg.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_bno (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_bno.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_bg (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_bno.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_be (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_bno.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_bge (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_bno.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_bl (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_bno.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_bne (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_bno.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_ble (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_bno.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_bo (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_bno.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_b (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_bno.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_bx_indirect_offset (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_bx_indirect (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_bx_indirect_index (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_bx_disp (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_bx_indirect_disp (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_callx_disp (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_callx_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_callx_indirect (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_callx_indirect_offset.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_callx_indirect_offset (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_callx_indirect_offset.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_ret (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_callx_disp.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_calls (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul2.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_fmark (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.fmt_empty.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_i960CA_flushreg (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.fmt_empty.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += i960base_model_i960CA_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-/* We assume UNIT_NONE == 0 because the tables don't always terminate
- entries with it. */
-
-/* Model timing data for `i960KA'. */
-
-static const INSN_TIMING i960KA_timing[] = {
- { I960BASE_INSN_X_INVALID, 0, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_X_AFTER, 0, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_X_BEFORE, 0, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_X_CTI_CHAIN, 0, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_X_CHAIN, 0, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_X_BEGIN, 0, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_MULO, model_i960KA_mulo, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_MULO1, model_i960KA_mulo1, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_MULO2, model_i960KA_mulo2, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_MULO3, model_i960KA_mulo3, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_REMO, model_i960KA_remo, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_REMO1, model_i960KA_remo1, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_REMO2, model_i960KA_remo2, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_REMO3, model_i960KA_remo3, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_DIVO, model_i960KA_divo, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_DIVO1, model_i960KA_divo1, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_DIVO2, model_i960KA_divo2, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_DIVO3, model_i960KA_divo3, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_REMI, model_i960KA_remi, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_REMI1, model_i960KA_remi1, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_REMI2, model_i960KA_remi2, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_REMI3, model_i960KA_remi3, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_DIVI, model_i960KA_divi, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_DIVI1, model_i960KA_divi1, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_DIVI2, model_i960KA_divi2, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_DIVI3, model_i960KA_divi3, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_ADDO, model_i960KA_addo, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_ADDO1, model_i960KA_addo1, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_ADDO2, model_i960KA_addo2, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_ADDO3, model_i960KA_addo3, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_SUBO, model_i960KA_subo, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_SUBO1, model_i960KA_subo1, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_SUBO2, model_i960KA_subo2, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_SUBO3, model_i960KA_subo3, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_NOTBIT, model_i960KA_notbit, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_NOTBIT1, model_i960KA_notbit1, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_NOTBIT2, model_i960KA_notbit2, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_NOTBIT3, model_i960KA_notbit3, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_AND, model_i960KA_and, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_AND1, model_i960KA_and1, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_AND2, model_i960KA_and2, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_AND3, model_i960KA_and3, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_ANDNOT, model_i960KA_andnot, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_ANDNOT1, model_i960KA_andnot1, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_ANDNOT2, model_i960KA_andnot2, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_ANDNOT3, model_i960KA_andnot3, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_SETBIT, model_i960KA_setbit, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_SETBIT1, model_i960KA_setbit1, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_SETBIT2, model_i960KA_setbit2, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_SETBIT3, model_i960KA_setbit3, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_NOTAND, model_i960KA_notand, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_NOTAND1, model_i960KA_notand1, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_NOTAND2, model_i960KA_notand2, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_NOTAND3, model_i960KA_notand3, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_XOR, model_i960KA_xor, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_XOR1, model_i960KA_xor1, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_XOR2, model_i960KA_xor2, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_XOR3, model_i960KA_xor3, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_OR, model_i960KA_or, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_OR1, model_i960KA_or1, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_OR2, model_i960KA_or2, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_OR3, model_i960KA_or3, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_NOR, model_i960KA_nor, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_NOR1, model_i960KA_nor1, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_NOR2, model_i960KA_nor2, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_NOR3, model_i960KA_nor3, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_XNOR, model_i960KA_xnor, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_XNOR1, model_i960KA_xnor1, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_XNOR2, model_i960KA_xnor2, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_XNOR3, model_i960KA_xnor3, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_NOT, model_i960KA_not, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_NOT1, model_i960KA_not1, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_NOT2, model_i960KA_not2, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_NOT3, model_i960KA_not3, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_ORNOT, model_i960KA_ornot, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_ORNOT1, model_i960KA_ornot1, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_ORNOT2, model_i960KA_ornot2, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_ORNOT3, model_i960KA_ornot3, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_CLRBIT, model_i960KA_clrbit, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_CLRBIT1, model_i960KA_clrbit1, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_CLRBIT2, model_i960KA_clrbit2, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_CLRBIT3, model_i960KA_clrbit3, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_SHLO, model_i960KA_shlo, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_SHLO1, model_i960KA_shlo1, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_SHLO2, model_i960KA_shlo2, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_SHLO3, model_i960KA_shlo3, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_SHRO, model_i960KA_shro, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_SHRO1, model_i960KA_shro1, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_SHRO2, model_i960KA_shro2, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_SHRO3, model_i960KA_shro3, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_SHLI, model_i960KA_shli, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_SHLI1, model_i960KA_shli1, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_SHLI2, model_i960KA_shli2, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_SHLI3, model_i960KA_shli3, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_SHRI, model_i960KA_shri, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_SHRI1, model_i960KA_shri1, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_SHRI2, model_i960KA_shri2, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_SHRI3, model_i960KA_shri3, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_EMUL, model_i960KA_emul, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_EMUL1, model_i960KA_emul1, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_EMUL2, model_i960KA_emul2, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_EMUL3, model_i960KA_emul3, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_MOV, model_i960KA_mov, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_MOV1, model_i960KA_mov1, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_MOVL, model_i960KA_movl, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_MOVL1, model_i960KA_movl1, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_MOVT, model_i960KA_movt, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_MOVT1, model_i960KA_movt1, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_MOVQ, model_i960KA_movq, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_MOVQ1, model_i960KA_movq1, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_MODPC, model_i960KA_modpc, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_MODAC, model_i960KA_modac, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_LDA_OFFSET, model_i960KA_lda_offset, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_LDA_INDIRECT_OFFSET, model_i960KA_lda_indirect_offset, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_LDA_INDIRECT, model_i960KA_lda_indirect, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_LDA_INDIRECT_INDEX, model_i960KA_lda_indirect_index, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_LDA_DISP, model_i960KA_lda_disp, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_LDA_INDIRECT_DISP, model_i960KA_lda_indirect_disp, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_LDA_INDEX_DISP, model_i960KA_lda_index_disp, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_LDA_INDIRECT_INDEX_DISP, model_i960KA_lda_indirect_index_disp, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_LD_OFFSET, model_i960KA_ld_offset, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_LD_INDIRECT_OFFSET, model_i960KA_ld_indirect_offset, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_LD_INDIRECT, model_i960KA_ld_indirect, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_LD_INDIRECT_INDEX, model_i960KA_ld_indirect_index, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_LD_DISP, model_i960KA_ld_disp, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_LD_INDIRECT_DISP, model_i960KA_ld_indirect_disp, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_LD_INDEX_DISP, model_i960KA_ld_index_disp, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_LD_INDIRECT_INDEX_DISP, model_i960KA_ld_indirect_index_disp, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_LDOB_OFFSET, model_i960KA_ldob_offset, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_LDOB_INDIRECT_OFFSET, model_i960KA_ldob_indirect_offset, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_LDOB_INDIRECT, model_i960KA_ldob_indirect, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_LDOB_INDIRECT_INDEX, model_i960KA_ldob_indirect_index, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_LDOB_DISP, model_i960KA_ldob_disp, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_LDOB_INDIRECT_DISP, model_i960KA_ldob_indirect_disp, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_LDOB_INDEX_DISP, model_i960KA_ldob_index_disp, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_LDOB_INDIRECT_INDEX_DISP, model_i960KA_ldob_indirect_index_disp, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_LDOS_OFFSET, model_i960KA_ldos_offset, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_LDOS_INDIRECT_OFFSET, model_i960KA_ldos_indirect_offset, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_LDOS_INDIRECT, model_i960KA_ldos_indirect, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_LDOS_INDIRECT_INDEX, model_i960KA_ldos_indirect_index, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_LDOS_DISP, model_i960KA_ldos_disp, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_LDOS_INDIRECT_DISP, model_i960KA_ldos_indirect_disp, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_LDOS_INDEX_DISP, model_i960KA_ldos_index_disp, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_LDOS_INDIRECT_INDEX_DISP, model_i960KA_ldos_indirect_index_disp, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_LDIB_OFFSET, model_i960KA_ldib_offset, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_LDIB_INDIRECT_OFFSET, model_i960KA_ldib_indirect_offset, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_LDIB_INDIRECT, model_i960KA_ldib_indirect, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_LDIB_INDIRECT_INDEX, model_i960KA_ldib_indirect_index, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_LDIB_DISP, model_i960KA_ldib_disp, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_LDIB_INDIRECT_DISP, model_i960KA_ldib_indirect_disp, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_LDIB_INDEX_DISP, model_i960KA_ldib_index_disp, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_LDIB_INDIRECT_INDEX_DISP, model_i960KA_ldib_indirect_index_disp, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_LDIS_OFFSET, model_i960KA_ldis_offset, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_LDIS_INDIRECT_OFFSET, model_i960KA_ldis_indirect_offset, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_LDIS_INDIRECT, model_i960KA_ldis_indirect, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_LDIS_INDIRECT_INDEX, model_i960KA_ldis_indirect_index, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_LDIS_DISP, model_i960KA_ldis_disp, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_LDIS_INDIRECT_DISP, model_i960KA_ldis_indirect_disp, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_LDIS_INDEX_DISP, model_i960KA_ldis_index_disp, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_LDIS_INDIRECT_INDEX_DISP, model_i960KA_ldis_indirect_index_disp, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_LDL_OFFSET, model_i960KA_ldl_offset, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_LDL_INDIRECT_OFFSET, model_i960KA_ldl_indirect_offset, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_LDL_INDIRECT, model_i960KA_ldl_indirect, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_LDL_INDIRECT_INDEX, model_i960KA_ldl_indirect_index, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_LDL_DISP, model_i960KA_ldl_disp, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_LDL_INDIRECT_DISP, model_i960KA_ldl_indirect_disp, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_LDL_INDEX_DISP, model_i960KA_ldl_index_disp, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_LDL_INDIRECT_INDEX_DISP, model_i960KA_ldl_indirect_index_disp, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_LDT_OFFSET, model_i960KA_ldt_offset, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_LDT_INDIRECT_OFFSET, model_i960KA_ldt_indirect_offset, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_LDT_INDIRECT, model_i960KA_ldt_indirect, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_LDT_INDIRECT_INDEX, model_i960KA_ldt_indirect_index, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_LDT_DISP, model_i960KA_ldt_disp, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_LDT_INDIRECT_DISP, model_i960KA_ldt_indirect_disp, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_LDT_INDEX_DISP, model_i960KA_ldt_index_disp, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_LDT_INDIRECT_INDEX_DISP, model_i960KA_ldt_indirect_index_disp, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_LDQ_OFFSET, model_i960KA_ldq_offset, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_LDQ_INDIRECT_OFFSET, model_i960KA_ldq_indirect_offset, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_LDQ_INDIRECT, model_i960KA_ldq_indirect, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_LDQ_INDIRECT_INDEX, model_i960KA_ldq_indirect_index, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_LDQ_DISP, model_i960KA_ldq_disp, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_LDQ_INDIRECT_DISP, model_i960KA_ldq_indirect_disp, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_LDQ_INDEX_DISP, model_i960KA_ldq_index_disp, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_LDQ_INDIRECT_INDEX_DISP, model_i960KA_ldq_indirect_index_disp, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_ST_OFFSET, model_i960KA_st_offset, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_ST_INDIRECT_OFFSET, model_i960KA_st_indirect_offset, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_ST_INDIRECT, model_i960KA_st_indirect, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_ST_INDIRECT_INDEX, model_i960KA_st_indirect_index, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_ST_DISP, model_i960KA_st_disp, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_ST_INDIRECT_DISP, model_i960KA_st_indirect_disp, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_ST_INDEX_DISP, model_i960KA_st_index_disp, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_ST_INDIRECT_INDEX_DISP, model_i960KA_st_indirect_index_disp, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_STOB_OFFSET, model_i960KA_stob_offset, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_STOB_INDIRECT_OFFSET, model_i960KA_stob_indirect_offset, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_STOB_INDIRECT, model_i960KA_stob_indirect, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_STOB_INDIRECT_INDEX, model_i960KA_stob_indirect_index, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_STOB_DISP, model_i960KA_stob_disp, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_STOB_INDIRECT_DISP, model_i960KA_stob_indirect_disp, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_STOB_INDEX_DISP, model_i960KA_stob_index_disp, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_STOB_INDIRECT_INDEX_DISP, model_i960KA_stob_indirect_index_disp, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_STOS_OFFSET, model_i960KA_stos_offset, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_STOS_INDIRECT_OFFSET, model_i960KA_stos_indirect_offset, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_STOS_INDIRECT, model_i960KA_stos_indirect, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_STOS_INDIRECT_INDEX, model_i960KA_stos_indirect_index, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_STOS_DISP, model_i960KA_stos_disp, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_STOS_INDIRECT_DISP, model_i960KA_stos_indirect_disp, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_STOS_INDEX_DISP, model_i960KA_stos_index_disp, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_STOS_INDIRECT_INDEX_DISP, model_i960KA_stos_indirect_index_disp, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_STL_OFFSET, model_i960KA_stl_offset, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_STL_INDIRECT_OFFSET, model_i960KA_stl_indirect_offset, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_STL_INDIRECT, model_i960KA_stl_indirect, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_STL_INDIRECT_INDEX, model_i960KA_stl_indirect_index, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_STL_DISP, model_i960KA_stl_disp, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_STL_INDIRECT_DISP, model_i960KA_stl_indirect_disp, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_STL_INDEX_DISP, model_i960KA_stl_index_disp, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_STL_INDIRECT_INDEX_DISP, model_i960KA_stl_indirect_index_disp, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_STT_OFFSET, model_i960KA_stt_offset, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_STT_INDIRECT_OFFSET, model_i960KA_stt_indirect_offset, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_STT_INDIRECT, model_i960KA_stt_indirect, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_STT_INDIRECT_INDEX, model_i960KA_stt_indirect_index, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_STT_DISP, model_i960KA_stt_disp, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_STT_INDIRECT_DISP, model_i960KA_stt_indirect_disp, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_STT_INDEX_DISP, model_i960KA_stt_index_disp, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_STT_INDIRECT_INDEX_DISP, model_i960KA_stt_indirect_index_disp, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_STQ_OFFSET, model_i960KA_stq_offset, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_STQ_INDIRECT_OFFSET, model_i960KA_stq_indirect_offset, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_STQ_INDIRECT, model_i960KA_stq_indirect, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_STQ_INDIRECT_INDEX, model_i960KA_stq_indirect_index, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_STQ_DISP, model_i960KA_stq_disp, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_STQ_INDIRECT_DISP, model_i960KA_stq_indirect_disp, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_STQ_INDEX_DISP, model_i960KA_stq_index_disp, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_STQ_INDIRECT_INDEX_DISP, model_i960KA_stq_indirect_index_disp, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_CMPOBE_REG, model_i960KA_cmpobe_reg, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_CMPOBE_LIT, model_i960KA_cmpobe_lit, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_CMPOBNE_REG, model_i960KA_cmpobne_reg, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_CMPOBNE_LIT, model_i960KA_cmpobne_lit, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_CMPOBL_REG, model_i960KA_cmpobl_reg, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_CMPOBL_LIT, model_i960KA_cmpobl_lit, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_CMPOBLE_REG, model_i960KA_cmpoble_reg, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_CMPOBLE_LIT, model_i960KA_cmpoble_lit, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_CMPOBG_REG, model_i960KA_cmpobg_reg, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_CMPOBG_LIT, model_i960KA_cmpobg_lit, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_CMPOBGE_REG, model_i960KA_cmpobge_reg, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_CMPOBGE_LIT, model_i960KA_cmpobge_lit, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_CMPIBE_REG, model_i960KA_cmpibe_reg, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_CMPIBE_LIT, model_i960KA_cmpibe_lit, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_CMPIBNE_REG, model_i960KA_cmpibne_reg, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_CMPIBNE_LIT, model_i960KA_cmpibne_lit, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_CMPIBL_REG, model_i960KA_cmpibl_reg, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_CMPIBL_LIT, model_i960KA_cmpibl_lit, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_CMPIBLE_REG, model_i960KA_cmpible_reg, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_CMPIBLE_LIT, model_i960KA_cmpible_lit, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_CMPIBG_REG, model_i960KA_cmpibg_reg, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_CMPIBG_LIT, model_i960KA_cmpibg_lit, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_CMPIBGE_REG, model_i960KA_cmpibge_reg, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_CMPIBGE_LIT, model_i960KA_cmpibge_lit, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_BBC_REG, model_i960KA_bbc_reg, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_BBC_LIT, model_i960KA_bbc_lit, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_BBS_REG, model_i960KA_bbs_reg, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_BBS_LIT, model_i960KA_bbs_lit, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_CMPI, model_i960KA_cmpi, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_CMPI1, model_i960KA_cmpi1, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_CMPI2, model_i960KA_cmpi2, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_CMPI3, model_i960KA_cmpi3, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_CMPO, model_i960KA_cmpo, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_CMPO1, model_i960KA_cmpo1, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_CMPO2, model_i960KA_cmpo2, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_CMPO3, model_i960KA_cmpo3, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_TESTNO_REG, model_i960KA_testno_reg, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_TESTG_REG, model_i960KA_testg_reg, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_TESTE_REG, model_i960KA_teste_reg, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_TESTGE_REG, model_i960KA_testge_reg, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_TESTL_REG, model_i960KA_testl_reg, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_TESTNE_REG, model_i960KA_testne_reg, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_TESTLE_REG, model_i960KA_testle_reg, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_TESTO_REG, model_i960KA_testo_reg, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_BNO, model_i960KA_bno, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_BG, model_i960KA_bg, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_BE, model_i960KA_be, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_BGE, model_i960KA_bge, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_BL, model_i960KA_bl, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_BNE, model_i960KA_bne, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_BLE, model_i960KA_ble, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_BO, model_i960KA_bo, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_B, model_i960KA_b, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_BX_INDIRECT_OFFSET, model_i960KA_bx_indirect_offset, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_BX_INDIRECT, model_i960KA_bx_indirect, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_BX_INDIRECT_INDEX, model_i960KA_bx_indirect_index, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_BX_DISP, model_i960KA_bx_disp, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_BX_INDIRECT_DISP, model_i960KA_bx_indirect_disp, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_CALLX_DISP, model_i960KA_callx_disp, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_CALLX_INDIRECT, model_i960KA_callx_indirect, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_CALLX_INDIRECT_OFFSET, model_i960KA_callx_indirect_offset, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_RET, model_i960KA_ret, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_CALLS, model_i960KA_calls, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_FMARK, model_i960KA_fmark, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_FLUSHREG, model_i960KA_flushreg, { { (int) UNIT_I960KA_U_EXEC, 1, 1 } } },
-};
-
-/* Model timing data for `i960CA'. */
-
-static const INSN_TIMING i960CA_timing[] = {
- { I960BASE_INSN_X_INVALID, 0, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_X_AFTER, 0, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_X_BEFORE, 0, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_X_CTI_CHAIN, 0, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_X_CHAIN, 0, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_X_BEGIN, 0, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_MULO, model_i960CA_mulo, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_MULO1, model_i960CA_mulo1, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_MULO2, model_i960CA_mulo2, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_MULO3, model_i960CA_mulo3, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_REMO, model_i960CA_remo, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_REMO1, model_i960CA_remo1, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_REMO2, model_i960CA_remo2, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_REMO3, model_i960CA_remo3, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_DIVO, model_i960CA_divo, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_DIVO1, model_i960CA_divo1, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_DIVO2, model_i960CA_divo2, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_DIVO3, model_i960CA_divo3, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_REMI, model_i960CA_remi, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_REMI1, model_i960CA_remi1, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_REMI2, model_i960CA_remi2, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_REMI3, model_i960CA_remi3, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_DIVI, model_i960CA_divi, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_DIVI1, model_i960CA_divi1, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_DIVI2, model_i960CA_divi2, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_DIVI3, model_i960CA_divi3, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_ADDO, model_i960CA_addo, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_ADDO1, model_i960CA_addo1, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_ADDO2, model_i960CA_addo2, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_ADDO3, model_i960CA_addo3, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_SUBO, model_i960CA_subo, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_SUBO1, model_i960CA_subo1, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_SUBO2, model_i960CA_subo2, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_SUBO3, model_i960CA_subo3, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_NOTBIT, model_i960CA_notbit, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_NOTBIT1, model_i960CA_notbit1, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_NOTBIT2, model_i960CA_notbit2, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_NOTBIT3, model_i960CA_notbit3, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_AND, model_i960CA_and, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_AND1, model_i960CA_and1, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_AND2, model_i960CA_and2, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_AND3, model_i960CA_and3, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_ANDNOT, model_i960CA_andnot, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_ANDNOT1, model_i960CA_andnot1, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_ANDNOT2, model_i960CA_andnot2, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_ANDNOT3, model_i960CA_andnot3, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_SETBIT, model_i960CA_setbit, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_SETBIT1, model_i960CA_setbit1, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_SETBIT2, model_i960CA_setbit2, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_SETBIT3, model_i960CA_setbit3, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_NOTAND, model_i960CA_notand, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_NOTAND1, model_i960CA_notand1, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_NOTAND2, model_i960CA_notand2, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_NOTAND3, model_i960CA_notand3, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_XOR, model_i960CA_xor, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_XOR1, model_i960CA_xor1, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_XOR2, model_i960CA_xor2, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_XOR3, model_i960CA_xor3, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_OR, model_i960CA_or, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_OR1, model_i960CA_or1, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_OR2, model_i960CA_or2, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_OR3, model_i960CA_or3, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_NOR, model_i960CA_nor, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_NOR1, model_i960CA_nor1, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_NOR2, model_i960CA_nor2, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_NOR3, model_i960CA_nor3, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_XNOR, model_i960CA_xnor, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_XNOR1, model_i960CA_xnor1, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_XNOR2, model_i960CA_xnor2, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_XNOR3, model_i960CA_xnor3, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_NOT, model_i960CA_not, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_NOT1, model_i960CA_not1, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_NOT2, model_i960CA_not2, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_NOT3, model_i960CA_not3, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_ORNOT, model_i960CA_ornot, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_ORNOT1, model_i960CA_ornot1, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_ORNOT2, model_i960CA_ornot2, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_ORNOT3, model_i960CA_ornot3, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_CLRBIT, model_i960CA_clrbit, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_CLRBIT1, model_i960CA_clrbit1, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_CLRBIT2, model_i960CA_clrbit2, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_CLRBIT3, model_i960CA_clrbit3, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_SHLO, model_i960CA_shlo, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_SHLO1, model_i960CA_shlo1, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_SHLO2, model_i960CA_shlo2, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_SHLO3, model_i960CA_shlo3, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_SHRO, model_i960CA_shro, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_SHRO1, model_i960CA_shro1, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_SHRO2, model_i960CA_shro2, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_SHRO3, model_i960CA_shro3, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_SHLI, model_i960CA_shli, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_SHLI1, model_i960CA_shli1, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_SHLI2, model_i960CA_shli2, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_SHLI3, model_i960CA_shli3, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_SHRI, model_i960CA_shri, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_SHRI1, model_i960CA_shri1, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_SHRI2, model_i960CA_shri2, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_SHRI3, model_i960CA_shri3, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_EMUL, model_i960CA_emul, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_EMUL1, model_i960CA_emul1, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_EMUL2, model_i960CA_emul2, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_EMUL3, model_i960CA_emul3, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_MOV, model_i960CA_mov, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_MOV1, model_i960CA_mov1, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_MOVL, model_i960CA_movl, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_MOVL1, model_i960CA_movl1, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_MOVT, model_i960CA_movt, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_MOVT1, model_i960CA_movt1, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_MOVQ, model_i960CA_movq, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_MOVQ1, model_i960CA_movq1, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_MODPC, model_i960CA_modpc, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_MODAC, model_i960CA_modac, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_LDA_OFFSET, model_i960CA_lda_offset, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_LDA_INDIRECT_OFFSET, model_i960CA_lda_indirect_offset, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_LDA_INDIRECT, model_i960CA_lda_indirect, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_LDA_INDIRECT_INDEX, model_i960CA_lda_indirect_index, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_LDA_DISP, model_i960CA_lda_disp, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_LDA_INDIRECT_DISP, model_i960CA_lda_indirect_disp, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_LDA_INDEX_DISP, model_i960CA_lda_index_disp, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_LDA_INDIRECT_INDEX_DISP, model_i960CA_lda_indirect_index_disp, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_LD_OFFSET, model_i960CA_ld_offset, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_LD_INDIRECT_OFFSET, model_i960CA_ld_indirect_offset, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_LD_INDIRECT, model_i960CA_ld_indirect, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_LD_INDIRECT_INDEX, model_i960CA_ld_indirect_index, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_LD_DISP, model_i960CA_ld_disp, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_LD_INDIRECT_DISP, model_i960CA_ld_indirect_disp, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_LD_INDEX_DISP, model_i960CA_ld_index_disp, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_LD_INDIRECT_INDEX_DISP, model_i960CA_ld_indirect_index_disp, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_LDOB_OFFSET, model_i960CA_ldob_offset, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_LDOB_INDIRECT_OFFSET, model_i960CA_ldob_indirect_offset, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_LDOB_INDIRECT, model_i960CA_ldob_indirect, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_LDOB_INDIRECT_INDEX, model_i960CA_ldob_indirect_index, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_LDOB_DISP, model_i960CA_ldob_disp, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_LDOB_INDIRECT_DISP, model_i960CA_ldob_indirect_disp, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_LDOB_INDEX_DISP, model_i960CA_ldob_index_disp, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_LDOB_INDIRECT_INDEX_DISP, model_i960CA_ldob_indirect_index_disp, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_LDOS_OFFSET, model_i960CA_ldos_offset, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_LDOS_INDIRECT_OFFSET, model_i960CA_ldos_indirect_offset, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_LDOS_INDIRECT, model_i960CA_ldos_indirect, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_LDOS_INDIRECT_INDEX, model_i960CA_ldos_indirect_index, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_LDOS_DISP, model_i960CA_ldos_disp, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_LDOS_INDIRECT_DISP, model_i960CA_ldos_indirect_disp, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_LDOS_INDEX_DISP, model_i960CA_ldos_index_disp, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_LDOS_INDIRECT_INDEX_DISP, model_i960CA_ldos_indirect_index_disp, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_LDIB_OFFSET, model_i960CA_ldib_offset, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_LDIB_INDIRECT_OFFSET, model_i960CA_ldib_indirect_offset, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_LDIB_INDIRECT, model_i960CA_ldib_indirect, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_LDIB_INDIRECT_INDEX, model_i960CA_ldib_indirect_index, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_LDIB_DISP, model_i960CA_ldib_disp, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_LDIB_INDIRECT_DISP, model_i960CA_ldib_indirect_disp, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_LDIB_INDEX_DISP, model_i960CA_ldib_index_disp, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_LDIB_INDIRECT_INDEX_DISP, model_i960CA_ldib_indirect_index_disp, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_LDIS_OFFSET, model_i960CA_ldis_offset, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_LDIS_INDIRECT_OFFSET, model_i960CA_ldis_indirect_offset, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_LDIS_INDIRECT, model_i960CA_ldis_indirect, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_LDIS_INDIRECT_INDEX, model_i960CA_ldis_indirect_index, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_LDIS_DISP, model_i960CA_ldis_disp, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_LDIS_INDIRECT_DISP, model_i960CA_ldis_indirect_disp, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_LDIS_INDEX_DISP, model_i960CA_ldis_index_disp, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_LDIS_INDIRECT_INDEX_DISP, model_i960CA_ldis_indirect_index_disp, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_LDL_OFFSET, model_i960CA_ldl_offset, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_LDL_INDIRECT_OFFSET, model_i960CA_ldl_indirect_offset, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_LDL_INDIRECT, model_i960CA_ldl_indirect, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_LDL_INDIRECT_INDEX, model_i960CA_ldl_indirect_index, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_LDL_DISP, model_i960CA_ldl_disp, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_LDL_INDIRECT_DISP, model_i960CA_ldl_indirect_disp, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_LDL_INDEX_DISP, model_i960CA_ldl_index_disp, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_LDL_INDIRECT_INDEX_DISP, model_i960CA_ldl_indirect_index_disp, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_LDT_OFFSET, model_i960CA_ldt_offset, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_LDT_INDIRECT_OFFSET, model_i960CA_ldt_indirect_offset, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_LDT_INDIRECT, model_i960CA_ldt_indirect, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_LDT_INDIRECT_INDEX, model_i960CA_ldt_indirect_index, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_LDT_DISP, model_i960CA_ldt_disp, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_LDT_INDIRECT_DISP, model_i960CA_ldt_indirect_disp, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_LDT_INDEX_DISP, model_i960CA_ldt_index_disp, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_LDT_INDIRECT_INDEX_DISP, model_i960CA_ldt_indirect_index_disp, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_LDQ_OFFSET, model_i960CA_ldq_offset, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_LDQ_INDIRECT_OFFSET, model_i960CA_ldq_indirect_offset, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_LDQ_INDIRECT, model_i960CA_ldq_indirect, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_LDQ_INDIRECT_INDEX, model_i960CA_ldq_indirect_index, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_LDQ_DISP, model_i960CA_ldq_disp, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_LDQ_INDIRECT_DISP, model_i960CA_ldq_indirect_disp, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_LDQ_INDEX_DISP, model_i960CA_ldq_index_disp, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_LDQ_INDIRECT_INDEX_DISP, model_i960CA_ldq_indirect_index_disp, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_ST_OFFSET, model_i960CA_st_offset, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_ST_INDIRECT_OFFSET, model_i960CA_st_indirect_offset, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_ST_INDIRECT, model_i960CA_st_indirect, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_ST_INDIRECT_INDEX, model_i960CA_st_indirect_index, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_ST_DISP, model_i960CA_st_disp, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_ST_INDIRECT_DISP, model_i960CA_st_indirect_disp, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_ST_INDEX_DISP, model_i960CA_st_index_disp, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_ST_INDIRECT_INDEX_DISP, model_i960CA_st_indirect_index_disp, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_STOB_OFFSET, model_i960CA_stob_offset, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_STOB_INDIRECT_OFFSET, model_i960CA_stob_indirect_offset, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_STOB_INDIRECT, model_i960CA_stob_indirect, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_STOB_INDIRECT_INDEX, model_i960CA_stob_indirect_index, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_STOB_DISP, model_i960CA_stob_disp, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_STOB_INDIRECT_DISP, model_i960CA_stob_indirect_disp, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_STOB_INDEX_DISP, model_i960CA_stob_index_disp, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_STOB_INDIRECT_INDEX_DISP, model_i960CA_stob_indirect_index_disp, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_STOS_OFFSET, model_i960CA_stos_offset, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_STOS_INDIRECT_OFFSET, model_i960CA_stos_indirect_offset, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_STOS_INDIRECT, model_i960CA_stos_indirect, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_STOS_INDIRECT_INDEX, model_i960CA_stos_indirect_index, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_STOS_DISP, model_i960CA_stos_disp, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_STOS_INDIRECT_DISP, model_i960CA_stos_indirect_disp, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_STOS_INDEX_DISP, model_i960CA_stos_index_disp, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_STOS_INDIRECT_INDEX_DISP, model_i960CA_stos_indirect_index_disp, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_STL_OFFSET, model_i960CA_stl_offset, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_STL_INDIRECT_OFFSET, model_i960CA_stl_indirect_offset, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_STL_INDIRECT, model_i960CA_stl_indirect, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_STL_INDIRECT_INDEX, model_i960CA_stl_indirect_index, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_STL_DISP, model_i960CA_stl_disp, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_STL_INDIRECT_DISP, model_i960CA_stl_indirect_disp, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_STL_INDEX_DISP, model_i960CA_stl_index_disp, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_STL_INDIRECT_INDEX_DISP, model_i960CA_stl_indirect_index_disp, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_STT_OFFSET, model_i960CA_stt_offset, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_STT_INDIRECT_OFFSET, model_i960CA_stt_indirect_offset, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_STT_INDIRECT, model_i960CA_stt_indirect, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_STT_INDIRECT_INDEX, model_i960CA_stt_indirect_index, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_STT_DISP, model_i960CA_stt_disp, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_STT_INDIRECT_DISP, model_i960CA_stt_indirect_disp, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_STT_INDEX_DISP, model_i960CA_stt_index_disp, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_STT_INDIRECT_INDEX_DISP, model_i960CA_stt_indirect_index_disp, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_STQ_OFFSET, model_i960CA_stq_offset, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_STQ_INDIRECT_OFFSET, model_i960CA_stq_indirect_offset, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_STQ_INDIRECT, model_i960CA_stq_indirect, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_STQ_INDIRECT_INDEX, model_i960CA_stq_indirect_index, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_STQ_DISP, model_i960CA_stq_disp, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_STQ_INDIRECT_DISP, model_i960CA_stq_indirect_disp, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_STQ_INDEX_DISP, model_i960CA_stq_index_disp, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_STQ_INDIRECT_INDEX_DISP, model_i960CA_stq_indirect_index_disp, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_CMPOBE_REG, model_i960CA_cmpobe_reg, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_CMPOBE_LIT, model_i960CA_cmpobe_lit, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_CMPOBNE_REG, model_i960CA_cmpobne_reg, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_CMPOBNE_LIT, model_i960CA_cmpobne_lit, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_CMPOBL_REG, model_i960CA_cmpobl_reg, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_CMPOBL_LIT, model_i960CA_cmpobl_lit, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_CMPOBLE_REG, model_i960CA_cmpoble_reg, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_CMPOBLE_LIT, model_i960CA_cmpoble_lit, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_CMPOBG_REG, model_i960CA_cmpobg_reg, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_CMPOBG_LIT, model_i960CA_cmpobg_lit, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_CMPOBGE_REG, model_i960CA_cmpobge_reg, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_CMPOBGE_LIT, model_i960CA_cmpobge_lit, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_CMPIBE_REG, model_i960CA_cmpibe_reg, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_CMPIBE_LIT, model_i960CA_cmpibe_lit, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_CMPIBNE_REG, model_i960CA_cmpibne_reg, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_CMPIBNE_LIT, model_i960CA_cmpibne_lit, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_CMPIBL_REG, model_i960CA_cmpibl_reg, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_CMPIBL_LIT, model_i960CA_cmpibl_lit, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_CMPIBLE_REG, model_i960CA_cmpible_reg, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_CMPIBLE_LIT, model_i960CA_cmpible_lit, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_CMPIBG_REG, model_i960CA_cmpibg_reg, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_CMPIBG_LIT, model_i960CA_cmpibg_lit, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_CMPIBGE_REG, model_i960CA_cmpibge_reg, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_CMPIBGE_LIT, model_i960CA_cmpibge_lit, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_BBC_REG, model_i960CA_bbc_reg, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_BBC_LIT, model_i960CA_bbc_lit, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_BBS_REG, model_i960CA_bbs_reg, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_BBS_LIT, model_i960CA_bbs_lit, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_CMPI, model_i960CA_cmpi, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_CMPI1, model_i960CA_cmpi1, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_CMPI2, model_i960CA_cmpi2, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_CMPI3, model_i960CA_cmpi3, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_CMPO, model_i960CA_cmpo, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_CMPO1, model_i960CA_cmpo1, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_CMPO2, model_i960CA_cmpo2, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_CMPO3, model_i960CA_cmpo3, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_TESTNO_REG, model_i960CA_testno_reg, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_TESTG_REG, model_i960CA_testg_reg, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_TESTE_REG, model_i960CA_teste_reg, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_TESTGE_REG, model_i960CA_testge_reg, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_TESTL_REG, model_i960CA_testl_reg, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_TESTNE_REG, model_i960CA_testne_reg, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_TESTLE_REG, model_i960CA_testle_reg, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_TESTO_REG, model_i960CA_testo_reg, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_BNO, model_i960CA_bno, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_BG, model_i960CA_bg, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_BE, model_i960CA_be, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_BGE, model_i960CA_bge, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_BL, model_i960CA_bl, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_BNE, model_i960CA_bne, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_BLE, model_i960CA_ble, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_BO, model_i960CA_bo, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_B, model_i960CA_b, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_BX_INDIRECT_OFFSET, model_i960CA_bx_indirect_offset, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_BX_INDIRECT, model_i960CA_bx_indirect, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_BX_INDIRECT_INDEX, model_i960CA_bx_indirect_index, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_BX_DISP, model_i960CA_bx_disp, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_BX_INDIRECT_DISP, model_i960CA_bx_indirect_disp, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_CALLX_DISP, model_i960CA_callx_disp, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_CALLX_INDIRECT, model_i960CA_callx_indirect, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_CALLX_INDIRECT_OFFSET, model_i960CA_callx_indirect_offset, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_RET, model_i960CA_ret, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_CALLS, model_i960CA_calls, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_FMARK, model_i960CA_fmark, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
- { I960BASE_INSN_FLUSHREG, model_i960CA_flushreg, { { (int) UNIT_I960CA_U_EXEC, 1, 1 } } },
-};
-
-#endif /* WITH_PROFILE_MODEL_P */
-
-static void
-i960KA_model_init (SIM_CPU *cpu)
-{
- CPU_MODEL_DATA (cpu) = (void *) zalloc (sizeof (MODEL_I960KA_DATA));
-}
-
-static void
-i960CA_model_init (SIM_CPU *cpu)
-{
- CPU_MODEL_DATA (cpu) = (void *) zalloc (sizeof (MODEL_I960CA_DATA));
-}
-
-#if WITH_PROFILE_MODEL_P
-#define TIMING_DATA(td) td
-#else
-#define TIMING_DATA(td) 0
-#endif
-
-static const MODEL i960_ka_sa_models[] =
-{
- { "i960KA", & i960_ka_sa_mach, MODEL_I960KA, TIMING_DATA (& i960KA_timing[0]), i960KA_model_init },
- { 0 }
-};
-
-static const MODEL i960_ca_models[] =
-{
- { "i960CA", & i960_ca_mach, MODEL_I960CA, TIMING_DATA (& i960CA_timing[0]), i960CA_model_init },
- { 0 }
-};
-
-/* The properties of this cpu's implementation. */
-
-static const MACH_IMP_PROPERTIES i960base_imp_properties =
-{
- sizeof (SIM_CPU),
-#if WITH_SCACHE
- sizeof (SCACHE)
-#else
- 0
-#endif
-};
-
-
-static void
-i960base_prepare_run (SIM_CPU *cpu)
-{
- if (CPU_IDESC (cpu) == NULL)
- i960base_init_idesc_table (cpu);
-}
-
-static const CGEN_INSN *
-i960base_get_idata (SIM_CPU *cpu, int inum)
-{
- return CPU_IDESC (cpu) [inum].idata;
-}
-
-static void
-i960_ka_sa_init_cpu (SIM_CPU *cpu)
-{
- CPU_REG_FETCH (cpu) = i960base_fetch_register;
- CPU_REG_STORE (cpu) = i960base_store_register;
- CPU_PC_FETCH (cpu) = i960base_h_pc_get;
- CPU_PC_STORE (cpu) = i960base_h_pc_set;
- CPU_GET_IDATA (cpu) = i960base_get_idata;
- CPU_MAX_INSNS (cpu) = I960BASE_INSN_MAX;
- CPU_INSN_NAME (cpu) = cgen_insn_name;
- CPU_FULL_ENGINE_FN (cpu) = i960base_engine_run_full;
-#if WITH_FAST
- CPU_FAST_ENGINE_FN (cpu) = i960base_engine_run_fast;
-#else
- CPU_FAST_ENGINE_FN (cpu) = i960base_engine_run_full;
-#endif
-}
-
-const MACH i960_ka_sa_mach =
-{
- "i960:ka_sa", "i960:ka_sa", MACH_I960_KA_SA,
- 32, 32, & i960_ka_sa_models[0], & i960base_imp_properties,
- i960_ka_sa_init_cpu,
- i960base_prepare_run
-};
-
-static void
-i960_ca_init_cpu (SIM_CPU *cpu)
-{
- CPU_REG_FETCH (cpu) = i960base_fetch_register;
- CPU_REG_STORE (cpu) = i960base_store_register;
- CPU_PC_FETCH (cpu) = i960base_h_pc_get;
- CPU_PC_STORE (cpu) = i960base_h_pc_set;
- CPU_GET_IDATA (cpu) = i960base_get_idata;
- CPU_MAX_INSNS (cpu) = I960BASE_INSN_MAX;
- CPU_INSN_NAME (cpu) = cgen_insn_name;
- CPU_FULL_ENGINE_FN (cpu) = i960base_engine_run_full;
-#if WITH_FAST
- CPU_FAST_ENGINE_FN (cpu) = i960base_engine_run_fast;
-#else
- CPU_FAST_ENGINE_FN (cpu) = i960base_engine_run_full;
-#endif
-}
-
-const MACH i960_ca_mach =
-{
- "i960:ca", "i960:ca", MACH_I960_CA,
- 32, 32, & i960_ca_models[0], & i960base_imp_properties,
- i960_ca_init_cpu,
- i960base_prepare_run
-};
-
diff --git a/sim/i960/sem-switch.c b/sim/i960/sem-switch.c
deleted file mode 100644
index e1fd336fcac..00000000000
--- a/sim/i960/sem-switch.c
+++ /dev/null
@@ -1,7345 +0,0 @@
-/* Simulator instruction semantics for i960base.
-
-THIS FILE IS MACHINE GENERATED WITH CGEN.
-
-Copyright (C) 1996, 1997, 1998, 1999 Free Software Foundation, Inc.
-
-This file is part of the GNU Simulators.
-
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License along
-with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
-*/
-
-#ifdef DEFINE_LABELS
-
- /* The labels have the case they have because the enum of insn types
- is all uppercase and in the non-stdc case the insn symbol is built
- into the enum name. */
-
- static struct {
- int index;
- void *label;
- } labels[] = {
- { I960BASE_INSN_X_INVALID, && case_sem_INSN_X_INVALID },
- { I960BASE_INSN_X_AFTER, && case_sem_INSN_X_AFTER },
- { I960BASE_INSN_X_BEFORE, && case_sem_INSN_X_BEFORE },
- { I960BASE_INSN_X_CTI_CHAIN, && case_sem_INSN_X_CTI_CHAIN },
- { I960BASE_INSN_X_CHAIN, && case_sem_INSN_X_CHAIN },
- { I960BASE_INSN_X_BEGIN, && case_sem_INSN_X_BEGIN },
- { I960BASE_INSN_MULO, && case_sem_INSN_MULO },
- { I960BASE_INSN_MULO1, && case_sem_INSN_MULO1 },
- { I960BASE_INSN_MULO2, && case_sem_INSN_MULO2 },
- { I960BASE_INSN_MULO3, && case_sem_INSN_MULO3 },
- { I960BASE_INSN_REMO, && case_sem_INSN_REMO },
- { I960BASE_INSN_REMO1, && case_sem_INSN_REMO1 },
- { I960BASE_INSN_REMO2, && case_sem_INSN_REMO2 },
- { I960BASE_INSN_REMO3, && case_sem_INSN_REMO3 },
- { I960BASE_INSN_DIVO, && case_sem_INSN_DIVO },
- { I960BASE_INSN_DIVO1, && case_sem_INSN_DIVO1 },
- { I960BASE_INSN_DIVO2, && case_sem_INSN_DIVO2 },
- { I960BASE_INSN_DIVO3, && case_sem_INSN_DIVO3 },
- { I960BASE_INSN_REMI, && case_sem_INSN_REMI },
- { I960BASE_INSN_REMI1, && case_sem_INSN_REMI1 },
- { I960BASE_INSN_REMI2, && case_sem_INSN_REMI2 },
- { I960BASE_INSN_REMI3, && case_sem_INSN_REMI3 },
- { I960BASE_INSN_DIVI, && case_sem_INSN_DIVI },
- { I960BASE_INSN_DIVI1, && case_sem_INSN_DIVI1 },
- { I960BASE_INSN_DIVI2, && case_sem_INSN_DIVI2 },
- { I960BASE_INSN_DIVI3, && case_sem_INSN_DIVI3 },
- { I960BASE_INSN_ADDO, && case_sem_INSN_ADDO },
- { I960BASE_INSN_ADDO1, && case_sem_INSN_ADDO1 },
- { I960BASE_INSN_ADDO2, && case_sem_INSN_ADDO2 },
- { I960BASE_INSN_ADDO3, && case_sem_INSN_ADDO3 },
- { I960BASE_INSN_SUBO, && case_sem_INSN_SUBO },
- { I960BASE_INSN_SUBO1, && case_sem_INSN_SUBO1 },
- { I960BASE_INSN_SUBO2, && case_sem_INSN_SUBO2 },
- { I960BASE_INSN_SUBO3, && case_sem_INSN_SUBO3 },
- { I960BASE_INSN_NOTBIT, && case_sem_INSN_NOTBIT },
- { I960BASE_INSN_NOTBIT1, && case_sem_INSN_NOTBIT1 },
- { I960BASE_INSN_NOTBIT2, && case_sem_INSN_NOTBIT2 },
- { I960BASE_INSN_NOTBIT3, && case_sem_INSN_NOTBIT3 },
- { I960BASE_INSN_AND, && case_sem_INSN_AND },
- { I960BASE_INSN_AND1, && case_sem_INSN_AND1 },
- { I960BASE_INSN_AND2, && case_sem_INSN_AND2 },
- { I960BASE_INSN_AND3, && case_sem_INSN_AND3 },
- { I960BASE_INSN_ANDNOT, && case_sem_INSN_ANDNOT },
- { I960BASE_INSN_ANDNOT1, && case_sem_INSN_ANDNOT1 },
- { I960BASE_INSN_ANDNOT2, && case_sem_INSN_ANDNOT2 },
- { I960BASE_INSN_ANDNOT3, && case_sem_INSN_ANDNOT3 },
- { I960BASE_INSN_SETBIT, && case_sem_INSN_SETBIT },
- { I960BASE_INSN_SETBIT1, && case_sem_INSN_SETBIT1 },
- { I960BASE_INSN_SETBIT2, && case_sem_INSN_SETBIT2 },
- { I960BASE_INSN_SETBIT3, && case_sem_INSN_SETBIT3 },
- { I960BASE_INSN_NOTAND, && case_sem_INSN_NOTAND },
- { I960BASE_INSN_NOTAND1, && case_sem_INSN_NOTAND1 },
- { I960BASE_INSN_NOTAND2, && case_sem_INSN_NOTAND2 },
- { I960BASE_INSN_NOTAND3, && case_sem_INSN_NOTAND3 },
- { I960BASE_INSN_XOR, && case_sem_INSN_XOR },
- { I960BASE_INSN_XOR1, && case_sem_INSN_XOR1 },
- { I960BASE_INSN_XOR2, && case_sem_INSN_XOR2 },
- { I960BASE_INSN_XOR3, && case_sem_INSN_XOR3 },
- { I960BASE_INSN_OR, && case_sem_INSN_OR },
- { I960BASE_INSN_OR1, && case_sem_INSN_OR1 },
- { I960BASE_INSN_OR2, && case_sem_INSN_OR2 },
- { I960BASE_INSN_OR3, && case_sem_INSN_OR3 },
- { I960BASE_INSN_NOR, && case_sem_INSN_NOR },
- { I960BASE_INSN_NOR1, && case_sem_INSN_NOR1 },
- { I960BASE_INSN_NOR2, && case_sem_INSN_NOR2 },
- { I960BASE_INSN_NOR3, && case_sem_INSN_NOR3 },
- { I960BASE_INSN_XNOR, && case_sem_INSN_XNOR },
- { I960BASE_INSN_XNOR1, && case_sem_INSN_XNOR1 },
- { I960BASE_INSN_XNOR2, && case_sem_INSN_XNOR2 },
- { I960BASE_INSN_XNOR3, && case_sem_INSN_XNOR3 },
- { I960BASE_INSN_NOT, && case_sem_INSN_NOT },
- { I960BASE_INSN_NOT1, && case_sem_INSN_NOT1 },
- { I960BASE_INSN_NOT2, && case_sem_INSN_NOT2 },
- { I960BASE_INSN_NOT3, && case_sem_INSN_NOT3 },
- { I960BASE_INSN_ORNOT, && case_sem_INSN_ORNOT },
- { I960BASE_INSN_ORNOT1, && case_sem_INSN_ORNOT1 },
- { I960BASE_INSN_ORNOT2, && case_sem_INSN_ORNOT2 },
- { I960BASE_INSN_ORNOT3, && case_sem_INSN_ORNOT3 },
- { I960BASE_INSN_CLRBIT, && case_sem_INSN_CLRBIT },
- { I960BASE_INSN_CLRBIT1, && case_sem_INSN_CLRBIT1 },
- { I960BASE_INSN_CLRBIT2, && case_sem_INSN_CLRBIT2 },
- { I960BASE_INSN_CLRBIT3, && case_sem_INSN_CLRBIT3 },
- { I960BASE_INSN_SHLO, && case_sem_INSN_SHLO },
- { I960BASE_INSN_SHLO1, && case_sem_INSN_SHLO1 },
- { I960BASE_INSN_SHLO2, && case_sem_INSN_SHLO2 },
- { I960BASE_INSN_SHLO3, && case_sem_INSN_SHLO3 },
- { I960BASE_INSN_SHRO, && case_sem_INSN_SHRO },
- { I960BASE_INSN_SHRO1, && case_sem_INSN_SHRO1 },
- { I960BASE_INSN_SHRO2, && case_sem_INSN_SHRO2 },
- { I960BASE_INSN_SHRO3, && case_sem_INSN_SHRO3 },
- { I960BASE_INSN_SHLI, && case_sem_INSN_SHLI },
- { I960BASE_INSN_SHLI1, && case_sem_INSN_SHLI1 },
- { I960BASE_INSN_SHLI2, && case_sem_INSN_SHLI2 },
- { I960BASE_INSN_SHLI3, && case_sem_INSN_SHLI3 },
- { I960BASE_INSN_SHRI, && case_sem_INSN_SHRI },
- { I960BASE_INSN_SHRI1, && case_sem_INSN_SHRI1 },
- { I960BASE_INSN_SHRI2, && case_sem_INSN_SHRI2 },
- { I960BASE_INSN_SHRI3, && case_sem_INSN_SHRI3 },
- { I960BASE_INSN_EMUL, && case_sem_INSN_EMUL },
- { I960BASE_INSN_EMUL1, && case_sem_INSN_EMUL1 },
- { I960BASE_INSN_EMUL2, && case_sem_INSN_EMUL2 },
- { I960BASE_INSN_EMUL3, && case_sem_INSN_EMUL3 },
- { I960BASE_INSN_MOV, && case_sem_INSN_MOV },
- { I960BASE_INSN_MOV1, && case_sem_INSN_MOV1 },
- { I960BASE_INSN_MOVL, && case_sem_INSN_MOVL },
- { I960BASE_INSN_MOVL1, && case_sem_INSN_MOVL1 },
- { I960BASE_INSN_MOVT, && case_sem_INSN_MOVT },
- { I960BASE_INSN_MOVT1, && case_sem_INSN_MOVT1 },
- { I960BASE_INSN_MOVQ, && case_sem_INSN_MOVQ },
- { I960BASE_INSN_MOVQ1, && case_sem_INSN_MOVQ1 },
- { I960BASE_INSN_MODPC, && case_sem_INSN_MODPC },
- { I960BASE_INSN_MODAC, && case_sem_INSN_MODAC },
- { I960BASE_INSN_LDA_OFFSET, && case_sem_INSN_LDA_OFFSET },
- { I960BASE_INSN_LDA_INDIRECT_OFFSET, && case_sem_INSN_LDA_INDIRECT_OFFSET },
- { I960BASE_INSN_LDA_INDIRECT, && case_sem_INSN_LDA_INDIRECT },
- { I960BASE_INSN_LDA_INDIRECT_INDEX, && case_sem_INSN_LDA_INDIRECT_INDEX },
- { I960BASE_INSN_LDA_DISP, && case_sem_INSN_LDA_DISP },
- { I960BASE_INSN_LDA_INDIRECT_DISP, && case_sem_INSN_LDA_INDIRECT_DISP },
- { I960BASE_INSN_LDA_INDEX_DISP, && case_sem_INSN_LDA_INDEX_DISP },
- { I960BASE_INSN_LDA_INDIRECT_INDEX_DISP, && case_sem_INSN_LDA_INDIRECT_INDEX_DISP },
- { I960BASE_INSN_LD_OFFSET, && case_sem_INSN_LD_OFFSET },
- { I960BASE_INSN_LD_INDIRECT_OFFSET, && case_sem_INSN_LD_INDIRECT_OFFSET },
- { I960BASE_INSN_LD_INDIRECT, && case_sem_INSN_LD_INDIRECT },
- { I960BASE_INSN_LD_INDIRECT_INDEX, && case_sem_INSN_LD_INDIRECT_INDEX },
- { I960BASE_INSN_LD_DISP, && case_sem_INSN_LD_DISP },
- { I960BASE_INSN_LD_INDIRECT_DISP, && case_sem_INSN_LD_INDIRECT_DISP },
- { I960BASE_INSN_LD_INDEX_DISP, && case_sem_INSN_LD_INDEX_DISP },
- { I960BASE_INSN_LD_INDIRECT_INDEX_DISP, && case_sem_INSN_LD_INDIRECT_INDEX_DISP },
- { I960BASE_INSN_LDOB_OFFSET, && case_sem_INSN_LDOB_OFFSET },
- { I960BASE_INSN_LDOB_INDIRECT_OFFSET, && case_sem_INSN_LDOB_INDIRECT_OFFSET },
- { I960BASE_INSN_LDOB_INDIRECT, && case_sem_INSN_LDOB_INDIRECT },
- { I960BASE_INSN_LDOB_INDIRECT_INDEX, && case_sem_INSN_LDOB_INDIRECT_INDEX },
- { I960BASE_INSN_LDOB_DISP, && case_sem_INSN_LDOB_DISP },
- { I960BASE_INSN_LDOB_INDIRECT_DISP, && case_sem_INSN_LDOB_INDIRECT_DISP },
- { I960BASE_INSN_LDOB_INDEX_DISP, && case_sem_INSN_LDOB_INDEX_DISP },
- { I960BASE_INSN_LDOB_INDIRECT_INDEX_DISP, && case_sem_INSN_LDOB_INDIRECT_INDEX_DISP },
- { I960BASE_INSN_LDOS_OFFSET, && case_sem_INSN_LDOS_OFFSET },
- { I960BASE_INSN_LDOS_INDIRECT_OFFSET, && case_sem_INSN_LDOS_INDIRECT_OFFSET },
- { I960BASE_INSN_LDOS_INDIRECT, && case_sem_INSN_LDOS_INDIRECT },
- { I960BASE_INSN_LDOS_INDIRECT_INDEX, && case_sem_INSN_LDOS_INDIRECT_INDEX },
- { I960BASE_INSN_LDOS_DISP, && case_sem_INSN_LDOS_DISP },
- { I960BASE_INSN_LDOS_INDIRECT_DISP, && case_sem_INSN_LDOS_INDIRECT_DISP },
- { I960BASE_INSN_LDOS_INDEX_DISP, && case_sem_INSN_LDOS_INDEX_DISP },
- { I960BASE_INSN_LDOS_INDIRECT_INDEX_DISP, && case_sem_INSN_LDOS_INDIRECT_INDEX_DISP },
- { I960BASE_INSN_LDIB_OFFSET, && case_sem_INSN_LDIB_OFFSET },
- { I960BASE_INSN_LDIB_INDIRECT_OFFSET, && case_sem_INSN_LDIB_INDIRECT_OFFSET },
- { I960BASE_INSN_LDIB_INDIRECT, && case_sem_INSN_LDIB_INDIRECT },
- { I960BASE_INSN_LDIB_INDIRECT_INDEX, && case_sem_INSN_LDIB_INDIRECT_INDEX },
- { I960BASE_INSN_LDIB_DISP, && case_sem_INSN_LDIB_DISP },
- { I960BASE_INSN_LDIB_INDIRECT_DISP, && case_sem_INSN_LDIB_INDIRECT_DISP },
- { I960BASE_INSN_LDIB_INDEX_DISP, && case_sem_INSN_LDIB_INDEX_DISP },
- { I960BASE_INSN_LDIB_INDIRECT_INDEX_DISP, && case_sem_INSN_LDIB_INDIRECT_INDEX_DISP },
- { I960BASE_INSN_LDIS_OFFSET, && case_sem_INSN_LDIS_OFFSET },
- { I960BASE_INSN_LDIS_INDIRECT_OFFSET, && case_sem_INSN_LDIS_INDIRECT_OFFSET },
- { I960BASE_INSN_LDIS_INDIRECT, && case_sem_INSN_LDIS_INDIRECT },
- { I960BASE_INSN_LDIS_INDIRECT_INDEX, && case_sem_INSN_LDIS_INDIRECT_INDEX },
- { I960BASE_INSN_LDIS_DISP, && case_sem_INSN_LDIS_DISP },
- { I960BASE_INSN_LDIS_INDIRECT_DISP, && case_sem_INSN_LDIS_INDIRECT_DISP },
- { I960BASE_INSN_LDIS_INDEX_DISP, && case_sem_INSN_LDIS_INDEX_DISP },
- { I960BASE_INSN_LDIS_INDIRECT_INDEX_DISP, && case_sem_INSN_LDIS_INDIRECT_INDEX_DISP },
- { I960BASE_INSN_LDL_OFFSET, && case_sem_INSN_LDL_OFFSET },
- { I960BASE_INSN_LDL_INDIRECT_OFFSET, && case_sem_INSN_LDL_INDIRECT_OFFSET },
- { I960BASE_INSN_LDL_INDIRECT, && case_sem_INSN_LDL_INDIRECT },
- { I960BASE_INSN_LDL_INDIRECT_INDEX, && case_sem_INSN_LDL_INDIRECT_INDEX },
- { I960BASE_INSN_LDL_DISP, && case_sem_INSN_LDL_DISP },
- { I960BASE_INSN_LDL_INDIRECT_DISP, && case_sem_INSN_LDL_INDIRECT_DISP },
- { I960BASE_INSN_LDL_INDEX_DISP, && case_sem_INSN_LDL_INDEX_DISP },
- { I960BASE_INSN_LDL_INDIRECT_INDEX_DISP, && case_sem_INSN_LDL_INDIRECT_INDEX_DISP },
- { I960BASE_INSN_LDT_OFFSET, && case_sem_INSN_LDT_OFFSET },
- { I960BASE_INSN_LDT_INDIRECT_OFFSET, && case_sem_INSN_LDT_INDIRECT_OFFSET },
- { I960BASE_INSN_LDT_INDIRECT, && case_sem_INSN_LDT_INDIRECT },
- { I960BASE_INSN_LDT_INDIRECT_INDEX, && case_sem_INSN_LDT_INDIRECT_INDEX },
- { I960BASE_INSN_LDT_DISP, && case_sem_INSN_LDT_DISP },
- { I960BASE_INSN_LDT_INDIRECT_DISP, && case_sem_INSN_LDT_INDIRECT_DISP },
- { I960BASE_INSN_LDT_INDEX_DISP, && case_sem_INSN_LDT_INDEX_DISP },
- { I960BASE_INSN_LDT_INDIRECT_INDEX_DISP, && case_sem_INSN_LDT_INDIRECT_INDEX_DISP },
- { I960BASE_INSN_LDQ_OFFSET, && case_sem_INSN_LDQ_OFFSET },
- { I960BASE_INSN_LDQ_INDIRECT_OFFSET, && case_sem_INSN_LDQ_INDIRECT_OFFSET },
- { I960BASE_INSN_LDQ_INDIRECT, && case_sem_INSN_LDQ_INDIRECT },
- { I960BASE_INSN_LDQ_INDIRECT_INDEX, && case_sem_INSN_LDQ_INDIRECT_INDEX },
- { I960BASE_INSN_LDQ_DISP, && case_sem_INSN_LDQ_DISP },
- { I960BASE_INSN_LDQ_INDIRECT_DISP, && case_sem_INSN_LDQ_INDIRECT_DISP },
- { I960BASE_INSN_LDQ_INDEX_DISP, && case_sem_INSN_LDQ_INDEX_DISP },
- { I960BASE_INSN_LDQ_INDIRECT_INDEX_DISP, && case_sem_INSN_LDQ_INDIRECT_INDEX_DISP },
- { I960BASE_INSN_ST_OFFSET, && case_sem_INSN_ST_OFFSET },
- { I960BASE_INSN_ST_INDIRECT_OFFSET, && case_sem_INSN_ST_INDIRECT_OFFSET },
- { I960BASE_INSN_ST_INDIRECT, && case_sem_INSN_ST_INDIRECT },
- { I960BASE_INSN_ST_INDIRECT_INDEX, && case_sem_INSN_ST_INDIRECT_INDEX },
- { I960BASE_INSN_ST_DISP, && case_sem_INSN_ST_DISP },
- { I960BASE_INSN_ST_INDIRECT_DISP, && case_sem_INSN_ST_INDIRECT_DISP },
- { I960BASE_INSN_ST_INDEX_DISP, && case_sem_INSN_ST_INDEX_DISP },
- { I960BASE_INSN_ST_INDIRECT_INDEX_DISP, && case_sem_INSN_ST_INDIRECT_INDEX_DISP },
- { I960BASE_INSN_STOB_OFFSET, && case_sem_INSN_STOB_OFFSET },
- { I960BASE_INSN_STOB_INDIRECT_OFFSET, && case_sem_INSN_STOB_INDIRECT_OFFSET },
- { I960BASE_INSN_STOB_INDIRECT, && case_sem_INSN_STOB_INDIRECT },
- { I960BASE_INSN_STOB_INDIRECT_INDEX, && case_sem_INSN_STOB_INDIRECT_INDEX },
- { I960BASE_INSN_STOB_DISP, && case_sem_INSN_STOB_DISP },
- { I960BASE_INSN_STOB_INDIRECT_DISP, && case_sem_INSN_STOB_INDIRECT_DISP },
- { I960BASE_INSN_STOB_INDEX_DISP, && case_sem_INSN_STOB_INDEX_DISP },
- { I960BASE_INSN_STOB_INDIRECT_INDEX_DISP, && case_sem_INSN_STOB_INDIRECT_INDEX_DISP },
- { I960BASE_INSN_STOS_OFFSET, && case_sem_INSN_STOS_OFFSET },
- { I960BASE_INSN_STOS_INDIRECT_OFFSET, && case_sem_INSN_STOS_INDIRECT_OFFSET },
- { I960BASE_INSN_STOS_INDIRECT, && case_sem_INSN_STOS_INDIRECT },
- { I960BASE_INSN_STOS_INDIRECT_INDEX, && case_sem_INSN_STOS_INDIRECT_INDEX },
- { I960BASE_INSN_STOS_DISP, && case_sem_INSN_STOS_DISP },
- { I960BASE_INSN_STOS_INDIRECT_DISP, && case_sem_INSN_STOS_INDIRECT_DISP },
- { I960BASE_INSN_STOS_INDEX_DISP, && case_sem_INSN_STOS_INDEX_DISP },
- { I960BASE_INSN_STOS_INDIRECT_INDEX_DISP, && case_sem_INSN_STOS_INDIRECT_INDEX_DISP },
- { I960BASE_INSN_STL_OFFSET, && case_sem_INSN_STL_OFFSET },
- { I960BASE_INSN_STL_INDIRECT_OFFSET, && case_sem_INSN_STL_INDIRECT_OFFSET },
- { I960BASE_INSN_STL_INDIRECT, && case_sem_INSN_STL_INDIRECT },
- { I960BASE_INSN_STL_INDIRECT_INDEX, && case_sem_INSN_STL_INDIRECT_INDEX },
- { I960BASE_INSN_STL_DISP, && case_sem_INSN_STL_DISP },
- { I960BASE_INSN_STL_INDIRECT_DISP, && case_sem_INSN_STL_INDIRECT_DISP },
- { I960BASE_INSN_STL_INDEX_DISP, && case_sem_INSN_STL_INDEX_DISP },
- { I960BASE_INSN_STL_INDIRECT_INDEX_DISP, && case_sem_INSN_STL_INDIRECT_INDEX_DISP },
- { I960BASE_INSN_STT_OFFSET, && case_sem_INSN_STT_OFFSET },
- { I960BASE_INSN_STT_INDIRECT_OFFSET, && case_sem_INSN_STT_INDIRECT_OFFSET },
- { I960BASE_INSN_STT_INDIRECT, && case_sem_INSN_STT_INDIRECT },
- { I960BASE_INSN_STT_INDIRECT_INDEX, && case_sem_INSN_STT_INDIRECT_INDEX },
- { I960BASE_INSN_STT_DISP, && case_sem_INSN_STT_DISP },
- { I960BASE_INSN_STT_INDIRECT_DISP, && case_sem_INSN_STT_INDIRECT_DISP },
- { I960BASE_INSN_STT_INDEX_DISP, && case_sem_INSN_STT_INDEX_DISP },
- { I960BASE_INSN_STT_INDIRECT_INDEX_DISP, && case_sem_INSN_STT_INDIRECT_INDEX_DISP },
- { I960BASE_INSN_STQ_OFFSET, && case_sem_INSN_STQ_OFFSET },
- { I960BASE_INSN_STQ_INDIRECT_OFFSET, && case_sem_INSN_STQ_INDIRECT_OFFSET },
- { I960BASE_INSN_STQ_INDIRECT, && case_sem_INSN_STQ_INDIRECT },
- { I960BASE_INSN_STQ_INDIRECT_INDEX, && case_sem_INSN_STQ_INDIRECT_INDEX },
- { I960BASE_INSN_STQ_DISP, && case_sem_INSN_STQ_DISP },
- { I960BASE_INSN_STQ_INDIRECT_DISP, && case_sem_INSN_STQ_INDIRECT_DISP },
- { I960BASE_INSN_STQ_INDEX_DISP, && case_sem_INSN_STQ_INDEX_DISP },
- { I960BASE_INSN_STQ_INDIRECT_INDEX_DISP, && case_sem_INSN_STQ_INDIRECT_INDEX_DISP },
- { I960BASE_INSN_CMPOBE_REG, && case_sem_INSN_CMPOBE_REG },
- { I960BASE_INSN_CMPOBE_LIT, && case_sem_INSN_CMPOBE_LIT },
- { I960BASE_INSN_CMPOBNE_REG, && case_sem_INSN_CMPOBNE_REG },
- { I960BASE_INSN_CMPOBNE_LIT, && case_sem_INSN_CMPOBNE_LIT },
- { I960BASE_INSN_CMPOBL_REG, && case_sem_INSN_CMPOBL_REG },
- { I960BASE_INSN_CMPOBL_LIT, && case_sem_INSN_CMPOBL_LIT },
- { I960BASE_INSN_CMPOBLE_REG, && case_sem_INSN_CMPOBLE_REG },
- { I960BASE_INSN_CMPOBLE_LIT, && case_sem_INSN_CMPOBLE_LIT },
- { I960BASE_INSN_CMPOBG_REG, && case_sem_INSN_CMPOBG_REG },
- { I960BASE_INSN_CMPOBG_LIT, && case_sem_INSN_CMPOBG_LIT },
- { I960BASE_INSN_CMPOBGE_REG, && case_sem_INSN_CMPOBGE_REG },
- { I960BASE_INSN_CMPOBGE_LIT, && case_sem_INSN_CMPOBGE_LIT },
- { I960BASE_INSN_CMPIBE_REG, && case_sem_INSN_CMPIBE_REG },
- { I960BASE_INSN_CMPIBE_LIT, && case_sem_INSN_CMPIBE_LIT },
- { I960BASE_INSN_CMPIBNE_REG, && case_sem_INSN_CMPIBNE_REG },
- { I960BASE_INSN_CMPIBNE_LIT, && case_sem_INSN_CMPIBNE_LIT },
- { I960BASE_INSN_CMPIBL_REG, && case_sem_INSN_CMPIBL_REG },
- { I960BASE_INSN_CMPIBL_LIT, && case_sem_INSN_CMPIBL_LIT },
- { I960BASE_INSN_CMPIBLE_REG, && case_sem_INSN_CMPIBLE_REG },
- { I960BASE_INSN_CMPIBLE_LIT, && case_sem_INSN_CMPIBLE_LIT },
- { I960BASE_INSN_CMPIBG_REG, && case_sem_INSN_CMPIBG_REG },
- { I960BASE_INSN_CMPIBG_LIT, && case_sem_INSN_CMPIBG_LIT },
- { I960BASE_INSN_CMPIBGE_REG, && case_sem_INSN_CMPIBGE_REG },
- { I960BASE_INSN_CMPIBGE_LIT, && case_sem_INSN_CMPIBGE_LIT },
- { I960BASE_INSN_BBC_REG, && case_sem_INSN_BBC_REG },
- { I960BASE_INSN_BBC_LIT, && case_sem_INSN_BBC_LIT },
- { I960BASE_INSN_BBS_REG, && case_sem_INSN_BBS_REG },
- { I960BASE_INSN_BBS_LIT, && case_sem_INSN_BBS_LIT },
- { I960BASE_INSN_CMPI, && case_sem_INSN_CMPI },
- { I960BASE_INSN_CMPI1, && case_sem_INSN_CMPI1 },
- { I960BASE_INSN_CMPI2, && case_sem_INSN_CMPI2 },
- { I960BASE_INSN_CMPI3, && case_sem_INSN_CMPI3 },
- { I960BASE_INSN_CMPO, && case_sem_INSN_CMPO },
- { I960BASE_INSN_CMPO1, && case_sem_INSN_CMPO1 },
- { I960BASE_INSN_CMPO2, && case_sem_INSN_CMPO2 },
- { I960BASE_INSN_CMPO3, && case_sem_INSN_CMPO3 },
- { I960BASE_INSN_TESTNO_REG, && case_sem_INSN_TESTNO_REG },
- { I960BASE_INSN_TESTG_REG, && case_sem_INSN_TESTG_REG },
- { I960BASE_INSN_TESTE_REG, && case_sem_INSN_TESTE_REG },
- { I960BASE_INSN_TESTGE_REG, && case_sem_INSN_TESTGE_REG },
- { I960BASE_INSN_TESTL_REG, && case_sem_INSN_TESTL_REG },
- { I960BASE_INSN_TESTNE_REG, && case_sem_INSN_TESTNE_REG },
- { I960BASE_INSN_TESTLE_REG, && case_sem_INSN_TESTLE_REG },
- { I960BASE_INSN_TESTO_REG, && case_sem_INSN_TESTO_REG },
- { I960BASE_INSN_BNO, && case_sem_INSN_BNO },
- { I960BASE_INSN_BG, && case_sem_INSN_BG },
- { I960BASE_INSN_BE, && case_sem_INSN_BE },
- { I960BASE_INSN_BGE, && case_sem_INSN_BGE },
- { I960BASE_INSN_BL, && case_sem_INSN_BL },
- { I960BASE_INSN_BNE, && case_sem_INSN_BNE },
- { I960BASE_INSN_BLE, && case_sem_INSN_BLE },
- { I960BASE_INSN_BO, && case_sem_INSN_BO },
- { I960BASE_INSN_B, && case_sem_INSN_B },
- { I960BASE_INSN_BX_INDIRECT_OFFSET, && case_sem_INSN_BX_INDIRECT_OFFSET },
- { I960BASE_INSN_BX_INDIRECT, && case_sem_INSN_BX_INDIRECT },
- { I960BASE_INSN_BX_INDIRECT_INDEX, && case_sem_INSN_BX_INDIRECT_INDEX },
- { I960BASE_INSN_BX_DISP, && case_sem_INSN_BX_DISP },
- { I960BASE_INSN_BX_INDIRECT_DISP, && case_sem_INSN_BX_INDIRECT_DISP },
- { I960BASE_INSN_CALLX_DISP, && case_sem_INSN_CALLX_DISP },
- { I960BASE_INSN_CALLX_INDIRECT, && case_sem_INSN_CALLX_INDIRECT },
- { I960BASE_INSN_CALLX_INDIRECT_OFFSET, && case_sem_INSN_CALLX_INDIRECT_OFFSET },
- { I960BASE_INSN_RET, && case_sem_INSN_RET },
- { I960BASE_INSN_CALLS, && case_sem_INSN_CALLS },
- { I960BASE_INSN_FMARK, && case_sem_INSN_FMARK },
- { I960BASE_INSN_FLUSHREG, && case_sem_INSN_FLUSHREG },
- { 0, 0 }
- };
- int i;
-
- for (i = 0; labels[i].label != 0; ++i)
- {
-#if FAST_P
- CPU_IDESC (current_cpu) [labels[i].index].sem_fast_lab = labels[i].label;
-#else
- CPU_IDESC (current_cpu) [labels[i].index].sem_full_lab = labels[i].label;
-#endif
- }
-
-#undef DEFINE_LABELS
-#endif /* DEFINE_LABELS */
-
-#ifdef DEFINE_SWITCH
-
-/* If hyper-fast [well not unnecessarily slow] execution is selected, turn
- off frills like tracing and profiling. */
-/* FIXME: A better way would be to have TRACE_RESULT check for something
- that can cause it to be optimized out. Another way would be to emit
- special handlers into the instruction "stream". */
-
-#if FAST_P
-#undef TRACE_RESULT
-#define TRACE_RESULT(cpu, abuf, name, type, val)
-#endif
-
-#undef GET_ATTR
-#define GET_ATTR(cpu, num, attr) CGEN_ATTR_VALUE (NULL, abuf->idesc->attrs, CGEN_INSN_##attr)
-
-{
-
-#if WITH_SCACHE_PBB
-
-/* Branch to next handler without going around main loop. */
-#define NEXT(vpc) goto * SEM_ARGBUF (vpc) -> semantic.sem_case
-SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
-
-#else /* ! WITH_SCACHE_PBB */
-
-#define NEXT(vpc) BREAK (sem)
-#ifdef __GNUC__
-#if FAST_P
- SWITCH (sem, SEM_ARGBUF (sc) -> idesc->sem_fast_lab)
-#else
- SWITCH (sem, SEM_ARGBUF (sc) -> idesc->sem_full_lab)
-#endif
-#else
- SWITCH (sem, SEM_ARGBUF (sc) -> idesc->num)
-#endif
-
-#endif /* ! WITH_SCACHE_PBB */
-
- {
-
- CASE (sem, INSN_X_INVALID) : /* --invalid-- */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_empty.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
-
- {
- /* Update the recorded pc in the cpu state struct.
- Only necessary for WITH_SCACHE case, but to avoid the
- conditional compilation .... */
- SET_H_PC (pc);
- /* Virtual insns have zero size. Overwrite vpc with address of next insn
- using the default-insn-bitsize spec. When executing insns in parallel
- we may want to queue the fault and continue execution. */
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
- vpc = sim_engine_invalid_insn (current_cpu, pc, vpc);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_X_AFTER) : /* --after-- */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_empty.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
-
- {
-#if WITH_SCACHE_PBB_I960BASE
- i960base_pbb_after (current_cpu, sem_arg);
-#endif
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_X_BEFORE) : /* --before-- */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_empty.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
-
- {
-#if WITH_SCACHE_PBB_I960BASE
- i960base_pbb_before (current_cpu, sem_arg);
-#endif
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_X_CTI_CHAIN) : /* --cti-chain-- */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_empty.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
-
- {
-#if WITH_SCACHE_PBB_I960BASE
-#ifdef DEFINE_SWITCH
- vpc = i960base_pbb_cti_chain (current_cpu, sem_arg,
- pbb_br_type, pbb_br_npc);
- BREAK (sem);
-#else
- /* FIXME: Allow provision of explicit ifmt spec in insn spec. */
- vpc = i960base_pbb_cti_chain (current_cpu, sem_arg,
- CPU_PBB_BR_TYPE (current_cpu),
- CPU_PBB_BR_NPC (current_cpu));
-#endif
-#endif
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_X_CHAIN) : /* --chain-- */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_empty.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
-
- {
-#if WITH_SCACHE_PBB_I960BASE
- vpc = i960base_pbb_chain (current_cpu, sem_arg);
-#ifdef DEFINE_SWITCH
- BREAK (sem);
-#endif
-#endif
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_X_BEGIN) : /* --begin-- */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_empty.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
-
- {
-#if WITH_SCACHE_PBB_I960BASE
-#ifdef DEFINE_SWITCH
- /* In the switch case FAST_P is a constant, allowing several optimizations
- in any called inline functions. */
- vpc = i960base_pbb_begin (current_cpu, FAST_P);
-#else
- vpc = i960base_pbb_begin (current_cpu, STATE_RUN_FAST_P (CPU_STATE (current_cpu)));
-#endif
-#endif
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_MULO) : /* mulo $src1, $src2, $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_emul.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = MULSI (* FLD (i_src1), * FLD (i_src2));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_MULO1) : /* mulo $lit1, $src2, $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_emul1.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = MULSI (FLD (f_src1), * FLD (i_src2));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_MULO2) : /* mulo $src1, $lit2, $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_emul2.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = MULSI (* FLD (i_src1), FLD (f_src2));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_MULO3) : /* mulo $lit1, $lit2, $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_emul3.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = MULSI (FLD (f_src1), FLD (f_src2));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_REMO) : /* remo $src1, $src2, $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_emul.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = UMODSI (* FLD (i_src2), * FLD (i_src1));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_REMO1) : /* remo $lit1, $src2, $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_emul1.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = UMODSI (* FLD (i_src2), FLD (f_src1));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_REMO2) : /* remo $src1, $lit2, $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_emul2.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = UMODSI (FLD (f_src2), * FLD (i_src1));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_REMO3) : /* remo $lit1, $lit2, $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_emul3.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = UMODSI (FLD (f_src2), FLD (f_src1));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_DIVO) : /* divo $src1, $src2, $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_emul.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = UDIVSI (* FLD (i_src2), * FLD (i_src1));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_DIVO1) : /* divo $lit1, $src2, $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_emul1.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = UDIVSI (* FLD (i_src2), FLD (f_src1));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_DIVO2) : /* divo $src1, $lit2, $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_emul2.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = UDIVSI (FLD (f_src2), * FLD (i_src1));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_DIVO3) : /* divo $lit1, $lit2, $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_emul3.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = UDIVSI (FLD (f_src2), FLD (f_src1));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_REMI) : /* remi $src1, $src2, $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_emul.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = MODSI (* FLD (i_src2), * FLD (i_src1));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_REMI1) : /* remi $lit1, $src2, $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_emul1.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = MODSI (* FLD (i_src2), FLD (f_src1));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_REMI2) : /* remi $src1, $lit2, $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_emul2.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = MODSI (FLD (f_src2), * FLD (i_src1));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_REMI3) : /* remi $lit1, $lit2, $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_emul3.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = MODSI (FLD (f_src2), FLD (f_src1));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_DIVI) : /* divi $src1, $src2, $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_emul.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = DIVSI (* FLD (i_src2), * FLD (i_src1));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_DIVI1) : /* divi $lit1, $src2, $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_emul1.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = DIVSI (* FLD (i_src2), FLD (f_src1));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_DIVI2) : /* divi $src1, $lit2, $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_emul2.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = DIVSI (FLD (f_src2), * FLD (i_src1));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_DIVI3) : /* divi $lit1, $lit2, $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_emul3.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = DIVSI (FLD (f_src2), FLD (f_src1));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_ADDO) : /* addo $src1, $src2, $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_emul.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = ADDSI (* FLD (i_src1), * FLD (i_src2));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_ADDO1) : /* addo $lit1, $src2, $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_emul1.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = ADDSI (FLD (f_src1), * FLD (i_src2));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_ADDO2) : /* addo $src1, $lit2, $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_emul2.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = ADDSI (* FLD (i_src1), FLD (f_src2));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_ADDO3) : /* addo $lit1, $lit2, $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_emul3.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = ADDSI (FLD (f_src1), FLD (f_src2));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_SUBO) : /* subo $src1, $src2, $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_emul.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = SUBSI (* FLD (i_src2), * FLD (i_src1));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_SUBO1) : /* subo $lit1, $src2, $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_emul1.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = SUBSI (* FLD (i_src2), FLD (f_src1));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_SUBO2) : /* subo $src1, $lit2, $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_emul2.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = SUBSI (FLD (f_src2), * FLD (i_src1));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_SUBO3) : /* subo $lit1, $lit2, $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_emul3.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = SUBSI (FLD (f_src2), FLD (f_src1));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_NOTBIT) : /* notbit $src1, $src2, $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_emul.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = XORSI (SLLSI (1, * FLD (i_src1)), * FLD (i_src2));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_NOTBIT1) : /* notbit $lit1, $src2, $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_emul1.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = XORSI (SLLSI (1, FLD (f_src1)), * FLD (i_src2));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_NOTBIT2) : /* notbit $src1, $lit2, $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_emul2.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = XORSI (SLLSI (1, * FLD (i_src1)), FLD (f_src2));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_NOTBIT3) : /* notbit $lit1, $lit2, $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_emul3.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = XORSI (SLLSI (1, FLD (f_src1)), FLD (f_src2));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_AND) : /* and $src1, $src2, $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_emul.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = ANDSI (* FLD (i_src1), * FLD (i_src2));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_AND1) : /* and $lit1, $src2, $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_emul1.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = ANDSI (FLD (f_src1), * FLD (i_src2));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_AND2) : /* and $src1, $lit2, $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_emul2.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = ANDSI (* FLD (i_src1), FLD (f_src2));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_AND3) : /* and $lit1, $lit2, $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_emul3.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = ANDSI (FLD (f_src1), FLD (f_src2));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_ANDNOT) : /* andnot $src1, $src2, $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_emul.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = ANDSI (* FLD (i_src2), INVSI (* FLD (i_src1)));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_ANDNOT1) : /* andnot $lit1, $src2, $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_emul1.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = ANDSI (* FLD (i_src2), INVSI (FLD (f_src1)));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_ANDNOT2) : /* andnot $src1, $lit2, $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_emul2.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = ANDSI (FLD (f_src2), INVSI (* FLD (i_src1)));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_ANDNOT3) : /* andnot $lit1, $lit2, $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_emul3.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = ANDSI (FLD (f_src2), INVSI (FLD (f_src1)));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_SETBIT) : /* setbit $src1, $src2, $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_emul.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = ORSI (SLLSI (1, * FLD (i_src1)), * FLD (i_src2));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_SETBIT1) : /* setbit $lit1, $src2, $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_emul1.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = ORSI (SLLSI (1, FLD (f_src1)), * FLD (i_src2));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_SETBIT2) : /* setbit $src1, $lit2, $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_emul2.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = ORSI (SLLSI (1, * FLD (i_src1)), FLD (f_src2));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_SETBIT3) : /* setbit $lit1, $lit2, $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_emul3.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = ORSI (SLLSI (1, FLD (f_src1)), FLD (f_src2));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_NOTAND) : /* notand $src1, $src2, $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_emul.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = ANDSI (INVSI (* FLD (i_src2)), * FLD (i_src1));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_NOTAND1) : /* notand $lit1, $src2, $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_emul1.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = ANDSI (INVSI (* FLD (i_src2)), FLD (f_src1));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_NOTAND2) : /* notand $src1, $lit2, $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_emul2.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = ANDSI (INVSI (FLD (f_src2)), * FLD (i_src1));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_NOTAND3) : /* notand $lit1, $lit2, $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_emul3.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = ANDSI (INVSI (FLD (f_src2)), FLD (f_src1));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_XOR) : /* xor $src1, $src2, $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_emul.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = XORSI (* FLD (i_src1), * FLD (i_src2));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_XOR1) : /* xor $lit1, $src2, $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_emul1.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = XORSI (FLD (f_src1), * FLD (i_src2));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_XOR2) : /* xor $src1, $lit2, $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_emul2.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = XORSI (* FLD (i_src1), FLD (f_src2));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_XOR3) : /* xor $lit1, $lit2, $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_emul3.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = XORSI (FLD (f_src1), FLD (f_src2));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_OR) : /* or $src1, $src2, $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_emul.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = ORSI (* FLD (i_src1), * FLD (i_src2));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_OR1) : /* or $lit1, $src2, $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_emul1.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = ORSI (FLD (f_src1), * FLD (i_src2));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_OR2) : /* or $src1, $lit2, $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_emul2.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = ORSI (* FLD (i_src1), FLD (f_src2));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_OR3) : /* or $lit1, $lit2, $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_emul3.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = ORSI (FLD (f_src1), FLD (f_src2));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_NOR) : /* nor $src1, $src2, $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_emul.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = ANDSI (INVSI (* FLD (i_src2)), INVSI (* FLD (i_src1)));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_NOR1) : /* nor $lit1, $src2, $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_emul1.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = ANDSI (INVSI (* FLD (i_src2)), INVSI (FLD (f_src1)));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_NOR2) : /* nor $src1, $lit2, $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_emul2.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = ANDSI (INVSI (FLD (f_src2)), INVSI (* FLD (i_src1)));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_NOR3) : /* nor $lit1, $lit2, $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_emul3.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = ANDSI (INVSI (FLD (f_src2)), INVSI (FLD (f_src1)));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_XNOR) : /* xnor $src1, $src2, $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_emul.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = INVSI (XORSI (* FLD (i_src1), * FLD (i_src2)));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_XNOR1) : /* xnor $lit1, $src2, $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_emul1.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = INVSI (XORSI (FLD (f_src1), * FLD (i_src2)));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_XNOR2) : /* xnor $src1, $lit2, $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_emul2.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = INVSI (XORSI (* FLD (i_src1), FLD (f_src2)));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_XNOR3) : /* xnor $lit1, $lit2, $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_emul3.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = INVSI (XORSI (FLD (f_src1), FLD (f_src2)));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_NOT) : /* not $src1, $src2, $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_emul2.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = INVSI (* FLD (i_src1));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_NOT1) : /* not $lit1, $src2, $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_emul3.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = INVSI (FLD (f_src1));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_NOT2) : /* not $src1, $lit2, $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_emul2.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = INVSI (* FLD (i_src1));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_NOT3) : /* not $lit1, $lit2, $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_emul3.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = INVSI (FLD (f_src1));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_ORNOT) : /* ornot $src1, $src2, $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_emul.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = ORSI (* FLD (i_src2), INVSI (* FLD (i_src1)));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_ORNOT1) : /* ornot $lit1, $src2, $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_emul1.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = ORSI (* FLD (i_src2), INVSI (FLD (f_src1)));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_ORNOT2) : /* ornot $src1, $lit2, $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_emul2.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = ORSI (FLD (f_src2), INVSI (* FLD (i_src1)));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_ORNOT3) : /* ornot $lit1, $lit2, $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_emul3.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = ORSI (FLD (f_src2), INVSI (FLD (f_src1)));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_CLRBIT) : /* clrbit $src1, $src2, $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_emul.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = ANDSI (INVSI (SLLSI (1, * FLD (i_src1))), * FLD (i_src2));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_CLRBIT1) : /* clrbit $lit1, $src2, $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_emul1.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = ANDSI (INVSI (SLLSI (1, FLD (f_src1))), * FLD (i_src2));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_CLRBIT2) : /* clrbit $src1, $lit2, $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_emul2.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = ANDSI (INVSI (SLLSI (1, * FLD (i_src1))), FLD (f_src2));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_CLRBIT3) : /* clrbit $lit1, $lit2, $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_emul3.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = ANDSI (INVSI (SLLSI (1, FLD (f_src1))), FLD (f_src2));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_SHLO) : /* shlo $src1, $src2, $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_emul.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = (GEUSI (* FLD (i_src1), 32)) ? (0) : (SLLSI (* FLD (i_src2), * FLD (i_src1)));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_SHLO1) : /* shlo $lit1, $src2, $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_emul1.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = (GEUSI (FLD (f_src1), 32)) ? (0) : (SLLSI (* FLD (i_src2), FLD (f_src1)));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_SHLO2) : /* shlo $src1, $lit2, $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_emul2.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = (GEUSI (* FLD (i_src1), 32)) ? (0) : (SLLSI (FLD (f_src2), * FLD (i_src1)));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_SHLO3) : /* shlo $lit1, $lit2, $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_emul3.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = (GEUSI (FLD (f_src1), 32)) ? (0) : (SLLSI (FLD (f_src2), FLD (f_src1)));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_SHRO) : /* shro $src1, $src2, $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_emul.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = (GEUSI (* FLD (i_src1), 32)) ? (0) : (SRLSI (* FLD (i_src2), * FLD (i_src1)));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_SHRO1) : /* shro $lit1, $src2, $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_emul1.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = (GEUSI (FLD (f_src1), 32)) ? (0) : (SRLSI (* FLD (i_src2), FLD (f_src1)));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_SHRO2) : /* shro $src1, $lit2, $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_emul2.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = (GEUSI (* FLD (i_src1), 32)) ? (0) : (SRLSI (FLD (f_src2), * FLD (i_src1)));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_SHRO3) : /* shro $lit1, $lit2, $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_emul3.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = (GEUSI (FLD (f_src1), 32)) ? (0) : (SRLSI (FLD (f_src2), FLD (f_src1)));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_SHLI) : /* shli $src1, $src2, $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_emul.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = (GEUSI (* FLD (i_src1), 32)) ? (0) : (SLLSI (* FLD (i_src2), * FLD (i_src1)));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_SHLI1) : /* shli $lit1, $src2, $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_emul1.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = (GEUSI (FLD (f_src1), 32)) ? (0) : (SLLSI (* FLD (i_src2), FLD (f_src1)));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_SHLI2) : /* shli $src1, $lit2, $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_emul2.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = (GEUSI (* FLD (i_src1), 32)) ? (0) : (SLLSI (FLD (f_src2), * FLD (i_src1)));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_SHLI3) : /* shli $lit1, $lit2, $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_emul3.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = (GEUSI (FLD (f_src1), 32)) ? (0) : (SLLSI (FLD (f_src2), FLD (f_src1)));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_SHRI) : /* shri $src1, $src2, $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_emul.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = (GEUSI (* FLD (i_src1), 32)) ? (SRASI (* FLD (i_src2), 31)) : (SRASI (* FLD (i_src2), * FLD (i_src1)));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_SHRI1) : /* shri $lit1, $src2, $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_emul1.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = (GEUSI (FLD (f_src1), 32)) ? (SRASI (* FLD (i_src2), 31)) : (SRASI (* FLD (i_src2), FLD (f_src1)));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_SHRI2) : /* shri $src1, $lit2, $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_emul2.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = (GEUSI (* FLD (i_src1), 32)) ? (SRASI (FLD (f_src2), 31)) : (SRASI (FLD (f_src2), * FLD (i_src1)));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_SHRI3) : /* shri $lit1, $lit2, $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_emul3.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = (GEUSI (FLD (f_src1), 32)) ? (SRASI (FLD (f_src2), 31)) : (SRASI (FLD (f_src2), FLD (f_src1)));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_EMUL) : /* emul $src1, $src2, $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_emul.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-{
- DI tmp_temp;
- SI tmp_dregno;
- tmp_temp = MULDI (ZEXTSIDI (* FLD (i_src1)), ZEXTSIDI (* FLD (i_src2)));
- tmp_dregno = FLD (f_srcdst);
- {
- SI opval = TRUNCDISI (tmp_temp);
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
- {
- SI opval = TRUNCDISI (SRLDI (tmp_temp, 32));
- CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval);
- }
-}
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_EMUL1) : /* emul $lit1, $src2, $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_emul1.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-{
- DI tmp_temp;
- SI tmp_dregno;
- tmp_temp = MULDI (ZEXTSIDI (FLD (f_src1)), ZEXTSIDI (* FLD (i_src2)));
- tmp_dregno = FLD (f_srcdst);
- {
- SI opval = TRUNCDISI (tmp_temp);
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
- {
- SI opval = TRUNCDISI (SRLDI (tmp_temp, 32));
- CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval);
- }
-}
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_EMUL2) : /* emul $src1, $lit2, $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_emul2.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-{
- DI tmp_temp;
- SI tmp_dregno;
- tmp_temp = MULDI (ZEXTSIDI (* FLD (i_src1)), ZEXTSIDI (FLD (f_src2)));
- tmp_dregno = FLD (f_srcdst);
- {
- SI opval = TRUNCDISI (tmp_temp);
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
- {
- SI opval = TRUNCDISI (SRLDI (tmp_temp, 32));
- CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval);
- }
-}
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_EMUL3) : /* emul $lit1, $lit2, $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_emul3.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-{
- DI tmp_temp;
- SI tmp_dregno;
- tmp_temp = MULDI (ZEXTSIDI (FLD (f_src1)), ZEXTSIDI (FLD (f_src2)));
- tmp_dregno = FLD (f_srcdst);
- {
- SI opval = TRUNCDISI (tmp_temp);
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
- {
- SI opval = TRUNCDISI (SRLDI (tmp_temp, 32));
- CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval);
- }
-}
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_MOV) : /* mov $src1, $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_emul2.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = * FLD (i_src1);
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_MOV1) : /* mov $lit1, $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_emul3.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = FLD (f_src1);
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_MOVL) : /* movl $src1, $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_movq.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-{
- SI tmp_dregno;
- SI tmp_sregno;
- tmp_dregno = FLD (f_srcdst);
- tmp_sregno = FLD (f_src1);
- {
- SI opval = * FLD (i_src1);
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
- {
- SI opval = CPU (h_gr[((FLD (f_src1)) + (1))]);
- CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval);
- }
-}
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_MOVL1) : /* movl $lit1, $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_emul3.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-{
- SI tmp_dregno;
- tmp_dregno = FLD (f_srcdst);
- {
- SI opval = FLD (f_src1);
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
- {
- SI opval = 0;
- CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval);
- }
-}
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_MOVT) : /* movt $src1, $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_movq.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-{
- SI tmp_dregno;
- SI tmp_sregno;
- tmp_dregno = FLD (f_srcdst);
- tmp_sregno = FLD (f_src1);
- {
- SI opval = * FLD (i_src1);
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
- {
- SI opval = CPU (h_gr[((FLD (f_src1)) + (1))]);
- CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval);
- }
- {
- SI opval = CPU (h_gr[((FLD (f_src1)) + (2))]);
- CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-2", 'x', opval);
- }
-}
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_MOVT1) : /* movt $lit1, $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_movq.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-{
- SI tmp_dregno;
- tmp_dregno = FLD (f_srcdst);
- {
- SI opval = FLD (f_src1);
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
- {
- SI opval = 0;
- CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval);
- }
- {
- SI opval = 0;
- CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-2", 'x', opval);
- }
-}
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_MOVQ) : /* movq $src1, $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_movq.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-{
- SI tmp_dregno;
- SI tmp_sregno;
- tmp_dregno = FLD (f_srcdst);
- tmp_sregno = FLD (f_src1);
- {
- SI opval = * FLD (i_src1);
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
- {
- SI opval = CPU (h_gr[((FLD (f_src1)) + (1))]);
- CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval);
- }
- {
- SI opval = CPU (h_gr[((FLD (f_src1)) + (2))]);
- CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-2", 'x', opval);
- }
- {
- SI opval = CPU (h_gr[((FLD (f_src1)) + (3))]);
- CPU (h_gr[((FLD (f_srcdst)) + (3))]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-3", 'x', opval);
- }
-}
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_MOVQ1) : /* movq $lit1, $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_movq.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-{
- SI tmp_dregno;
- tmp_dregno = FLD (f_srcdst);
- {
- SI opval = FLD (f_src1);
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
- {
- SI opval = 0;
- CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval);
- }
- {
- SI opval = 0;
- CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-2", 'x', opval);
- }
- {
- SI opval = 0;
- CPU (h_gr[((FLD (f_srcdst)) + (3))]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-3", 'x', opval);
- }
-}
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_MODPC) : /* modpc $src1, $src2, $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_emul1.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = * FLD (i_src2);
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_MODAC) : /* modac $src1, $src2, $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_emul1.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = * FLD (i_src2);
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_LDA_OFFSET) : /* lda $offset, $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = FLD (f_offset);
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_LDA_INDIRECT_OFFSET) : /* lda $offset($abase), $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = ADDSI (FLD (f_offset), * FLD (i_abase));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_LDA_INDIRECT) : /* lda ($abase), $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = * FLD (i_abase);
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_LDA_INDIRECT_INDEX) : /* lda ($abase)[$index*S$scale], $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_LDA_DISP) : /* lda $optdisp, $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
-
- {
- SI opval = FLD (f_optdisp);
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_LDA_INDIRECT_DISP) : /* lda $optdisp($abase), $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
-
- {
- SI opval = ADDSI (FLD (f_optdisp), * FLD (i_abase));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_LDA_INDEX_DISP) : /* lda $optdisp[$index*S$scale], $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
-
- {
- SI opval = ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_LDA_INDIRECT_INDEX_DISP) : /* lda $optdisp($abase)[$index*S$scale], $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
-
- {
- SI opval = ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_LD_OFFSET) : /* ld $offset, $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = GETMEMSI (current_cpu, pc, FLD (f_offset));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_LD_INDIRECT_OFFSET) : /* ld $offset($abase), $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = GETMEMSI (current_cpu, pc, ADDSI (FLD (f_offset), * FLD (i_abase)));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_LD_INDIRECT) : /* ld ($abase), $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = GETMEMSI (current_cpu, pc, * FLD (i_abase));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_LD_INDIRECT_INDEX) : /* ld ($abase)[$index*S$scale], $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = GETMEMSI (current_cpu, pc, ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_LD_DISP) : /* ld $optdisp, $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
-
- {
- SI opval = GETMEMSI (current_cpu, pc, FLD (f_optdisp));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_LD_INDIRECT_DISP) : /* ld $optdisp($abase), $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
-
- {
- SI opval = GETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), * FLD (i_abase)));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_LD_INDEX_DISP) : /* ld $optdisp[$index*S$scale], $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
-
- {
- SI opval = GETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_LD_INDIRECT_INDEX_DISP) : /* ld $optdisp($abase)[$index*S$scale], $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
-
- {
- SI opval = GETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_LDOB_OFFSET) : /* ldob $offset, $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = GETMEMUQI (current_cpu, pc, FLD (f_offset));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_LDOB_INDIRECT_OFFSET) : /* ldob $offset($abase), $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = GETMEMUQI (current_cpu, pc, ADDSI (FLD (f_offset), * FLD (i_abase)));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_LDOB_INDIRECT) : /* ldob ($abase), $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = GETMEMUQI (current_cpu, pc, * FLD (i_abase));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_LDOB_INDIRECT_INDEX) : /* ldob ($abase)[$index*S$scale], $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = GETMEMUQI (current_cpu, pc, ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_LDOB_DISP) : /* ldob $optdisp, $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
-
- {
- SI opval = GETMEMUQI (current_cpu, pc, FLD (f_optdisp));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_LDOB_INDIRECT_DISP) : /* ldob $optdisp($abase), $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
-
- {
- SI opval = GETMEMUQI (current_cpu, pc, ADDSI (FLD (f_optdisp), * FLD (i_abase)));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_LDOB_INDEX_DISP) : /* ldob $optdisp[$index*S$scale], $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
-
- {
- SI opval = GETMEMUQI (current_cpu, pc, ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_LDOB_INDIRECT_INDEX_DISP) : /* ldob $optdisp($abase)[$index*S$scale], $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
-
- {
- SI opval = GETMEMUQI (current_cpu, pc, ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_LDOS_OFFSET) : /* ldos $offset, $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = GETMEMUHI (current_cpu, pc, FLD (f_offset));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_LDOS_INDIRECT_OFFSET) : /* ldos $offset($abase), $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = GETMEMUHI (current_cpu, pc, ADDSI (FLD (f_offset), * FLD (i_abase)));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_LDOS_INDIRECT) : /* ldos ($abase), $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = GETMEMUHI (current_cpu, pc, * FLD (i_abase));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_LDOS_INDIRECT_INDEX) : /* ldos ($abase)[$index*S$scale], $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = GETMEMUHI (current_cpu, pc, ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_LDOS_DISP) : /* ldos $optdisp, $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
-
- {
- SI opval = GETMEMUHI (current_cpu, pc, FLD (f_optdisp));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_LDOS_INDIRECT_DISP) : /* ldos $optdisp($abase), $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
-
- {
- SI opval = GETMEMUHI (current_cpu, pc, ADDSI (FLD (f_optdisp), * FLD (i_abase)));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_LDOS_INDEX_DISP) : /* ldos $optdisp[$index*S$scale], $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
-
- {
- SI opval = GETMEMUHI (current_cpu, pc, ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_LDOS_INDIRECT_INDEX_DISP) : /* ldos $optdisp($abase)[$index*S$scale], $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
-
- {
- SI opval = GETMEMUHI (current_cpu, pc, ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_LDIB_OFFSET) : /* ldib $offset, $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = GETMEMQI (current_cpu, pc, FLD (f_offset));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_LDIB_INDIRECT_OFFSET) : /* ldib $offset($abase), $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = GETMEMQI (current_cpu, pc, ADDSI (FLD (f_offset), * FLD (i_abase)));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_LDIB_INDIRECT) : /* ldib ($abase), $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = GETMEMQI (current_cpu, pc, * FLD (i_abase));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_LDIB_INDIRECT_INDEX) : /* ldib ($abase)[$index*S$scale], $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = GETMEMQI (current_cpu, pc, ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_LDIB_DISP) : /* ldib $optdisp, $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
-
- {
- SI opval = GETMEMQI (current_cpu, pc, FLD (f_optdisp));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_LDIB_INDIRECT_DISP) : /* ldib $optdisp($abase), $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
-
- {
- SI opval = GETMEMQI (current_cpu, pc, ADDSI (FLD (f_optdisp), * FLD (i_abase)));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_LDIB_INDEX_DISP) : /* ldib $optdisp[$index*S$scale], $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
-
- {
- SI opval = GETMEMQI (current_cpu, pc, ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_LDIB_INDIRECT_INDEX_DISP) : /* ldib $optdisp($abase)[$index*S$scale], $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
-
- {
- SI opval = GETMEMQI (current_cpu, pc, ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_LDIS_OFFSET) : /* ldis $offset, $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = GETMEMHI (current_cpu, pc, FLD (f_offset));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_LDIS_INDIRECT_OFFSET) : /* ldis $offset($abase), $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = GETMEMHI (current_cpu, pc, ADDSI (FLD (f_offset), * FLD (i_abase)));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_LDIS_INDIRECT) : /* ldis ($abase), $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = GETMEMHI (current_cpu, pc, * FLD (i_abase));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_LDIS_INDIRECT_INDEX) : /* ldis ($abase)[$index*S$scale], $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = GETMEMHI (current_cpu, pc, ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_LDIS_DISP) : /* ldis $optdisp, $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
-
- {
- SI opval = GETMEMHI (current_cpu, pc, FLD (f_optdisp));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_LDIS_INDIRECT_DISP) : /* ldis $optdisp($abase), $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
-
- {
- SI opval = GETMEMHI (current_cpu, pc, ADDSI (FLD (f_optdisp), * FLD (i_abase)));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_LDIS_INDEX_DISP) : /* ldis $optdisp[$index*S$scale], $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
-
- {
- SI opval = GETMEMHI (current_cpu, pc, ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_LDIS_INDIRECT_INDEX_DISP) : /* ldis $optdisp($abase)[$index*S$scale], $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
-
- {
- SI opval = GETMEMHI (current_cpu, pc, ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_LDL_OFFSET) : /* ldl $offset, $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-{
- SI tmp_temp;
- SI tmp_dregno;
- tmp_dregno = FLD (f_srcdst);
- tmp_temp = FLD (f_offset);
- {
- SI opval = GETMEMSI (current_cpu, pc, tmp_temp);
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
- {
- SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4));
- CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval);
- }
-}
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_LDL_INDIRECT_OFFSET) : /* ldl $offset($abase), $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-{
- SI tmp_temp;
- SI tmp_dregno;
- tmp_dregno = FLD (f_srcdst);
- tmp_temp = ADDSI (FLD (f_offset), * FLD (i_abase));
- {
- SI opval = GETMEMSI (current_cpu, pc, tmp_temp);
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
- {
- SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4));
- CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval);
- }
-}
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_LDL_INDIRECT) : /* ldl ($abase), $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-{
- SI tmp_temp;
- SI tmp_dregno;
- tmp_dregno = FLD (f_srcdst);
- tmp_temp = * FLD (i_abase);
- {
- SI opval = GETMEMSI (current_cpu, pc, tmp_temp);
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
- {
- SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4));
- CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval);
- }
-}
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_LDL_INDIRECT_INDEX) : /* ldl ($abase)[$index*S$scale], $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-{
- SI tmp_temp;
- SI tmp_dregno;
- tmp_dregno = FLD (f_srcdst);
- tmp_temp = ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))));
- {
- SI opval = GETMEMSI (current_cpu, pc, tmp_temp);
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
- {
- SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4));
- CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval);
- }
-}
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_LDL_DISP) : /* ldl $optdisp, $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
-
-{
- SI tmp_temp;
- SI tmp_dregno;
- tmp_dregno = FLD (f_srcdst);
- tmp_temp = FLD (f_optdisp);
- {
- SI opval = GETMEMSI (current_cpu, pc, tmp_temp);
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
- {
- SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4));
- CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval);
- }
-}
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_LDL_INDIRECT_DISP) : /* ldl $optdisp($abase), $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
-
-{
- SI tmp_temp;
- SI tmp_dregno;
- tmp_dregno = FLD (f_srcdst);
- tmp_temp = ADDSI (FLD (f_optdisp), * FLD (i_abase));
- {
- SI opval = GETMEMSI (current_cpu, pc, tmp_temp);
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
- {
- SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4));
- CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval);
- }
-}
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_LDL_INDEX_DISP) : /* ldl $optdisp[$index*S$scale], $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
-
-{
- SI tmp_temp;
- SI tmp_dregno;
- tmp_dregno = FLD (f_srcdst);
- tmp_temp = ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))));
- {
- SI opval = GETMEMSI (current_cpu, pc, tmp_temp);
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
- {
- SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4));
- CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval);
- }
-}
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_LDL_INDIRECT_INDEX_DISP) : /* ldl $optdisp($abase)[$index*S$scale], $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
-
-{
- SI tmp_temp;
- SI tmp_dregno;
- tmp_dregno = FLD (f_srcdst);
- tmp_temp = ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))));
- {
- SI opval = GETMEMSI (current_cpu, pc, tmp_temp);
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
- {
- SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4));
- CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval);
- }
-}
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_LDT_OFFSET) : /* ldt $offset, $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-{
- SI tmp_temp;
- SI tmp_dregno;
- tmp_dregno = FLD (f_srcdst);
- tmp_temp = FLD (f_offset);
- {
- SI opval = GETMEMSI (current_cpu, pc, tmp_temp);
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
- {
- SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4));
- CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval);
- }
- {
- SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 8));
- CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-2", 'x', opval);
- }
-}
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_LDT_INDIRECT_OFFSET) : /* ldt $offset($abase), $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-{
- SI tmp_temp;
- SI tmp_dregno;
- tmp_dregno = FLD (f_srcdst);
- tmp_temp = ADDSI (FLD (f_offset), * FLD (i_abase));
- {
- SI opval = GETMEMSI (current_cpu, pc, tmp_temp);
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
- {
- SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4));
- CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval);
- }
- {
- SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 8));
- CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-2", 'x', opval);
- }
-}
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_LDT_INDIRECT) : /* ldt ($abase), $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-{
- SI tmp_temp;
- SI tmp_dregno;
- tmp_dregno = FLD (f_srcdst);
- tmp_temp = * FLD (i_abase);
- {
- SI opval = GETMEMSI (current_cpu, pc, tmp_temp);
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
- {
- SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4));
- CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval);
- }
- {
- SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 8));
- CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-2", 'x', opval);
- }
-}
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_LDT_INDIRECT_INDEX) : /* ldt ($abase)[$index*S$scale], $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-{
- SI tmp_temp;
- SI tmp_dregno;
- tmp_dregno = FLD (f_srcdst);
- tmp_temp = ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))));
- {
- SI opval = GETMEMSI (current_cpu, pc, tmp_temp);
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
- {
- SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4));
- CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval);
- }
- {
- SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 8));
- CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-2", 'x', opval);
- }
-}
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_LDT_DISP) : /* ldt $optdisp, $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
-
-{
- SI tmp_temp;
- SI tmp_dregno;
- tmp_dregno = FLD (f_srcdst);
- tmp_temp = FLD (f_optdisp);
- {
- SI opval = GETMEMSI (current_cpu, pc, tmp_temp);
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
- {
- SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4));
- CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval);
- }
- {
- SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 8));
- CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-2", 'x', opval);
- }
-}
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_LDT_INDIRECT_DISP) : /* ldt $optdisp($abase), $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
-
-{
- SI tmp_temp;
- SI tmp_dregno;
- tmp_dregno = FLD (f_srcdst);
- tmp_temp = ADDSI (FLD (f_optdisp), * FLD (i_abase));
- {
- SI opval = GETMEMSI (current_cpu, pc, tmp_temp);
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
- {
- SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4));
- CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval);
- }
- {
- SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 8));
- CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-2", 'x', opval);
- }
-}
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_LDT_INDEX_DISP) : /* ldt $optdisp[$index*S$scale], $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
-
-{
- SI tmp_temp;
- SI tmp_dregno;
- tmp_dregno = FLD (f_srcdst);
- tmp_temp = ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))));
- {
- SI opval = GETMEMSI (current_cpu, pc, tmp_temp);
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
- {
- SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4));
- CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval);
- }
- {
- SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 8));
- CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-2", 'x', opval);
- }
-}
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_LDT_INDIRECT_INDEX_DISP) : /* ldt $optdisp($abase)[$index*S$scale], $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
-
-{
- SI tmp_temp;
- SI tmp_dregno;
- tmp_dregno = FLD (f_srcdst);
- tmp_temp = ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))));
- {
- SI opval = GETMEMSI (current_cpu, pc, tmp_temp);
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
- {
- SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4));
- CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval);
- }
- {
- SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 8));
- CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-2", 'x', opval);
- }
-}
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_LDQ_OFFSET) : /* ldq $offset, $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-{
- SI tmp_temp;
- SI tmp_dregno;
- tmp_dregno = FLD (f_srcdst);
- tmp_temp = FLD (f_offset);
- {
- SI opval = GETMEMSI (current_cpu, pc, tmp_temp);
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
- {
- SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4));
- CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval);
- }
- {
- SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 8));
- CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-2", 'x', opval);
- }
- {
- SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 12));
- CPU (h_gr[((FLD (f_srcdst)) + (3))]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-3", 'x', opval);
- }
-}
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_LDQ_INDIRECT_OFFSET) : /* ldq $offset($abase), $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-{
- SI tmp_temp;
- SI tmp_dregno;
- tmp_dregno = FLD (f_srcdst);
- tmp_temp = ADDSI (FLD (f_offset), * FLD (i_abase));
- {
- SI opval = GETMEMSI (current_cpu, pc, tmp_temp);
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
- {
- SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4));
- CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval);
- }
- {
- SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 8));
- CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-2", 'x', opval);
- }
- {
- SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 12));
- CPU (h_gr[((FLD (f_srcdst)) + (3))]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-3", 'x', opval);
- }
-}
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_LDQ_INDIRECT) : /* ldq ($abase), $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-{
- SI tmp_temp;
- SI tmp_dregno;
- tmp_dregno = FLD (f_srcdst);
- tmp_temp = * FLD (i_abase);
- {
- SI opval = GETMEMSI (current_cpu, pc, tmp_temp);
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
- {
- SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4));
- CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval);
- }
- {
- SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 8));
- CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-2", 'x', opval);
- }
- {
- SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 12));
- CPU (h_gr[((FLD (f_srcdst)) + (3))]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-3", 'x', opval);
- }
-}
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_LDQ_INDIRECT_INDEX) : /* ldq ($abase)[$index*S$scale], $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-{
- SI tmp_temp;
- SI tmp_dregno;
- tmp_dregno = FLD (f_srcdst);
- tmp_temp = ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))));
- {
- SI opval = GETMEMSI (current_cpu, pc, tmp_temp);
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
- {
- SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4));
- CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval);
- }
- {
- SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 8));
- CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-2", 'x', opval);
- }
- {
- SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 12));
- CPU (h_gr[((FLD (f_srcdst)) + (3))]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-3", 'x', opval);
- }
-}
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_LDQ_DISP) : /* ldq $optdisp, $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
-
-{
- SI tmp_temp;
- SI tmp_dregno;
- tmp_dregno = FLD (f_srcdst);
- tmp_temp = FLD (f_optdisp);
- {
- SI opval = GETMEMSI (current_cpu, pc, tmp_temp);
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
- {
- SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4));
- CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval);
- }
- {
- SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 8));
- CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-2", 'x', opval);
- }
- {
- SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 12));
- CPU (h_gr[((FLD (f_srcdst)) + (3))]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-3", 'x', opval);
- }
-}
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_LDQ_INDIRECT_DISP) : /* ldq $optdisp($abase), $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
-
-{
- SI tmp_temp;
- SI tmp_dregno;
- tmp_dregno = FLD (f_srcdst);
- tmp_temp = ADDSI (FLD (f_optdisp), * FLD (i_abase));
- {
- SI opval = GETMEMSI (current_cpu, pc, tmp_temp);
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
- {
- SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4));
- CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval);
- }
- {
- SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 8));
- CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-2", 'x', opval);
- }
- {
- SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 12));
- CPU (h_gr[((FLD (f_srcdst)) + (3))]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-3", 'x', opval);
- }
-}
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_LDQ_INDEX_DISP) : /* ldq $optdisp[$index*S$scale], $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
-
-{
- SI tmp_temp;
- SI tmp_dregno;
- tmp_dregno = FLD (f_srcdst);
- tmp_temp = ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))));
- {
- SI opval = GETMEMSI (current_cpu, pc, tmp_temp);
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
- {
- SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4));
- CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval);
- }
- {
- SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 8));
- CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-2", 'x', opval);
- }
- {
- SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 12));
- CPU (h_gr[((FLD (f_srcdst)) + (3))]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-3", 'x', opval);
- }
-}
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_LDQ_INDIRECT_INDEX_DISP) : /* ldq $optdisp($abase)[$index*S$scale], $dst */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
-
-{
- SI tmp_temp;
- SI tmp_dregno;
- tmp_dregno = FLD (f_srcdst);
- tmp_temp = ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))));
- {
- SI opval = GETMEMSI (current_cpu, pc, tmp_temp);
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
- {
- SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4));
- CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval);
- }
- {
- SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 8));
- CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-2", 'x', opval);
- }
- {
- SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 12));
- CPU (h_gr[((FLD (f_srcdst)) + (3))]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-3", 'x', opval);
- }
-}
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_ST_OFFSET) : /* st $st_src, $offset */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = * FLD (i_st_src);
- SETMEMSI (current_cpu, pc, FLD (f_offset), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_ST_INDIRECT_OFFSET) : /* st $st_src, $offset($abase) */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = * FLD (i_st_src);
- SETMEMSI (current_cpu, pc, ADDSI (FLD (f_offset), * FLD (i_abase)), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_ST_INDIRECT) : /* st $st_src, ($abase) */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = * FLD (i_st_src);
- SETMEMSI (current_cpu, pc, * FLD (i_abase), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_ST_INDIRECT_INDEX) : /* st $st_src, ($abase)[$index*S$scale] */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = * FLD (i_st_src);
- SETMEMSI (current_cpu, pc, ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_ST_DISP) : /* st $st_src, $optdisp */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
-
- {
- SI opval = * FLD (i_st_src);
- SETMEMSI (current_cpu, pc, FLD (f_optdisp), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_ST_INDIRECT_DISP) : /* st $st_src, $optdisp($abase) */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
-
- {
- SI opval = * FLD (i_st_src);
- SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), * FLD (i_abase)), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_ST_INDEX_DISP) : /* st $st_src, $optdisp[$index*S$scale */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
-
- {
- SI opval = * FLD (i_st_src);
- SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_ST_INDIRECT_INDEX_DISP) : /* st $st_src, $optdisp($abase)[$index*S$scale] */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
-
- {
- SI opval = * FLD (i_st_src);
- SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_STOB_OFFSET) : /* stob $st_src, $offset */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- QI opval = * FLD (i_st_src);
- SETMEMQI (current_cpu, pc, FLD (f_offset), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_STOB_INDIRECT_OFFSET) : /* stob $st_src, $offset($abase) */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- QI opval = * FLD (i_st_src);
- SETMEMQI (current_cpu, pc, ADDSI (FLD (f_offset), * FLD (i_abase)), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_STOB_INDIRECT) : /* stob $st_src, ($abase) */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- QI opval = * FLD (i_st_src);
- SETMEMQI (current_cpu, pc, * FLD (i_abase), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_STOB_INDIRECT_INDEX) : /* stob $st_src, ($abase)[$index*S$scale] */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- QI opval = * FLD (i_st_src);
- SETMEMQI (current_cpu, pc, ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_STOB_DISP) : /* stob $st_src, $optdisp */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
-
- {
- QI opval = * FLD (i_st_src);
- SETMEMQI (current_cpu, pc, FLD (f_optdisp), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_STOB_INDIRECT_DISP) : /* stob $st_src, $optdisp($abase) */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
-
- {
- QI opval = * FLD (i_st_src);
- SETMEMQI (current_cpu, pc, ADDSI (FLD (f_optdisp), * FLD (i_abase)), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_STOB_INDEX_DISP) : /* stob $st_src, $optdisp[$index*S$scale */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
-
- {
- QI opval = * FLD (i_st_src);
- SETMEMQI (current_cpu, pc, ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_STOB_INDIRECT_INDEX_DISP) : /* stob $st_src, $optdisp($abase)[$index*S$scale] */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
-
- {
- QI opval = * FLD (i_st_src);
- SETMEMQI (current_cpu, pc, ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_STOS_OFFSET) : /* stos $st_src, $offset */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- HI opval = * FLD (i_st_src);
- SETMEMHI (current_cpu, pc, FLD (f_offset), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_STOS_INDIRECT_OFFSET) : /* stos $st_src, $offset($abase) */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- HI opval = * FLD (i_st_src);
- SETMEMHI (current_cpu, pc, ADDSI (FLD (f_offset), * FLD (i_abase)), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_STOS_INDIRECT) : /* stos $st_src, ($abase) */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- HI opval = * FLD (i_st_src);
- SETMEMHI (current_cpu, pc, * FLD (i_abase), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_STOS_INDIRECT_INDEX) : /* stos $st_src, ($abase)[$index*S$scale] */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- HI opval = * FLD (i_st_src);
- SETMEMHI (current_cpu, pc, ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_STOS_DISP) : /* stos $st_src, $optdisp */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
-
- {
- HI opval = * FLD (i_st_src);
- SETMEMHI (current_cpu, pc, FLD (f_optdisp), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_STOS_INDIRECT_DISP) : /* stos $st_src, $optdisp($abase) */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
-
- {
- HI opval = * FLD (i_st_src);
- SETMEMHI (current_cpu, pc, ADDSI (FLD (f_optdisp), * FLD (i_abase)), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_STOS_INDEX_DISP) : /* stos $st_src, $optdisp[$index*S$scale */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
-
- {
- HI opval = * FLD (i_st_src);
- SETMEMHI (current_cpu, pc, ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_STOS_INDIRECT_INDEX_DISP) : /* stos $st_src, $optdisp($abase)[$index*S$scale] */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
-
- {
- HI opval = * FLD (i_st_src);
- SETMEMHI (current_cpu, pc, ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_STL_OFFSET) : /* stl $st_src, $offset */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-{
- SI tmp_sregno;
- tmp_sregno = FLD (f_srcdst);
- {
- SI opval = * FLD (i_st_src);
- SETMEMSI (current_cpu, pc, FLD (f_offset), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
- {
- SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]);
- SETMEMSI (current_cpu, pc, ADDSI (FLD (f_offset), 4), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-}
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_STL_INDIRECT_OFFSET) : /* stl $st_src, $offset($abase) */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-{
- SI tmp_sregno;
- tmp_sregno = FLD (f_srcdst);
- {
- SI opval = * FLD (i_st_src);
- SETMEMSI (current_cpu, pc, ADDSI (FLD (f_offset), * FLD (i_abase)), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
- {
- SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]);
- SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_offset), * FLD (i_abase)), 4), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-}
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_STL_INDIRECT) : /* stl $st_src, ($abase) */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-{
- SI tmp_sregno;
- tmp_sregno = FLD (f_srcdst);
- {
- SI opval = * FLD (i_st_src);
- SETMEMSI (current_cpu, pc, * FLD (i_abase), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
- {
- SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]);
- SETMEMSI (current_cpu, pc, ADDSI (* FLD (i_abase), 4), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-}
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_STL_INDIRECT_INDEX) : /* stl $st_src, ($abase)[$index*S$scale] */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-{
- SI tmp_sregno;
- tmp_sregno = FLD (f_srcdst);
- {
- SI opval = * FLD (i_st_src);
- SETMEMSI (current_cpu, pc, ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
- {
- SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]);
- SETMEMSI (current_cpu, pc, ADDSI (ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), 4), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-}
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_STL_DISP) : /* stl $st_src, $optdisp */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
-
-{
- SI tmp_sregno;
- tmp_sregno = FLD (f_srcdst);
- {
- SI opval = * FLD (i_st_src);
- SETMEMSI (current_cpu, pc, FLD (f_optdisp), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
- {
- SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]);
- SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), 4), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-}
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_STL_INDIRECT_DISP) : /* stl $st_src, $optdisp($abase) */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
-
-{
- SI tmp_sregno;
- tmp_sregno = FLD (f_srcdst);
- {
- SI opval = * FLD (i_st_src);
- SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), * FLD (i_abase)), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
- {
- SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]);
- SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), * FLD (i_abase)), 4), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-}
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_STL_INDEX_DISP) : /* stl $st_src, $optdisp[$index*S$scale */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
-
-{
- SI tmp_sregno;
- tmp_sregno = FLD (f_srcdst);
- {
- SI opval = * FLD (i_st_src);
- SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
- {
- SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]);
- SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), 4), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-}
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_STL_INDIRECT_INDEX_DISP) : /* stl $st_src, $optdisp($abase)[$index*S$scale] */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
-
-{
- SI tmp_sregno;
- tmp_sregno = FLD (f_srcdst);
- {
- SI opval = * FLD (i_st_src);
- SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
- {
- SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]);
- SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))), 4), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-}
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_STT_OFFSET) : /* stt $st_src, $offset */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-{
- SI tmp_sregno;
- tmp_sregno = FLD (f_srcdst);
- {
- SI opval = * FLD (i_st_src);
- SETMEMSI (current_cpu, pc, FLD (f_offset), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
- {
- SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]);
- SETMEMSI (current_cpu, pc, ADDSI (FLD (f_offset), 4), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
- {
- SI opval = CPU (h_gr[((FLD (f_srcdst)) + (2))]);
- SETMEMSI (current_cpu, pc, ADDSI (FLD (f_offset), 8), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-}
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_STT_INDIRECT_OFFSET) : /* stt $st_src, $offset($abase) */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-{
- SI tmp_sregno;
- tmp_sregno = FLD (f_srcdst);
- {
- SI opval = * FLD (i_st_src);
- SETMEMSI (current_cpu, pc, ADDSI (FLD (f_offset), * FLD (i_abase)), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
- {
- SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]);
- SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_offset), * FLD (i_abase)), 4), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
- {
- SI opval = CPU (h_gr[((FLD (f_srcdst)) + (2))]);
- SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_offset), * FLD (i_abase)), 8), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-}
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_STT_INDIRECT) : /* stt $st_src, ($abase) */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-{
- SI tmp_sregno;
- tmp_sregno = FLD (f_srcdst);
- {
- SI opval = * FLD (i_st_src);
- SETMEMSI (current_cpu, pc, * FLD (i_abase), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
- {
- SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]);
- SETMEMSI (current_cpu, pc, ADDSI (* FLD (i_abase), 4), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
- {
- SI opval = CPU (h_gr[((FLD (f_srcdst)) + (2))]);
- SETMEMSI (current_cpu, pc, ADDSI (* FLD (i_abase), 8), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-}
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_STT_INDIRECT_INDEX) : /* stt $st_src, ($abase)[$index*S$scale] */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-{
- SI tmp_sregno;
- tmp_sregno = FLD (f_srcdst);
- {
- SI opval = * FLD (i_st_src);
- SETMEMSI (current_cpu, pc, ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
- {
- SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]);
- SETMEMSI (current_cpu, pc, ADDSI (ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), 4), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
- {
- SI opval = CPU (h_gr[((FLD (f_srcdst)) + (2))]);
- SETMEMSI (current_cpu, pc, ADDSI (ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), 8), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-}
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_STT_DISP) : /* stt $st_src, $optdisp */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
-
-{
- SI tmp_sregno;
- tmp_sregno = FLD (f_srcdst);
- {
- SI opval = * FLD (i_st_src);
- SETMEMSI (current_cpu, pc, FLD (f_optdisp), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
- {
- SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]);
- SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), 4), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
- {
- SI opval = CPU (h_gr[((FLD (f_srcdst)) + (2))]);
- SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), 8), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-}
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_STT_INDIRECT_DISP) : /* stt $st_src, $optdisp($abase) */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
-
-{
- SI tmp_sregno;
- tmp_sregno = FLD (f_srcdst);
- {
- SI opval = * FLD (i_st_src);
- SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), * FLD (i_abase)), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
- {
- SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]);
- SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), * FLD (i_abase)), 4), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
- {
- SI opval = CPU (h_gr[((FLD (f_srcdst)) + (2))]);
- SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), * FLD (i_abase)), 8), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-}
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_STT_INDEX_DISP) : /* stt $st_src, $optdisp[$index*S$scale */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
-
-{
- SI tmp_sregno;
- tmp_sregno = FLD (f_srcdst);
- {
- SI opval = * FLD (i_st_src);
- SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
- {
- SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]);
- SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), 4), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
- {
- SI opval = CPU (h_gr[((FLD (f_srcdst)) + (2))]);
- SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), 8), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-}
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_STT_INDIRECT_INDEX_DISP) : /* stt $st_src, $optdisp($abase)[$index*S$scale] */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
-
-{
- SI tmp_sregno;
- tmp_sregno = FLD (f_srcdst);
- {
- SI opval = * FLD (i_st_src);
- SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
- {
- SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]);
- SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))), 4), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
- {
- SI opval = CPU (h_gr[((FLD (f_srcdst)) + (2))]);
- SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))), 8), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-}
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_STQ_OFFSET) : /* stq $st_src, $offset */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-{
- SI tmp_sregno;
- tmp_sregno = FLD (f_srcdst);
- {
- SI opval = * FLD (i_st_src);
- SETMEMSI (current_cpu, pc, FLD (f_offset), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
- {
- SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]);
- SETMEMSI (current_cpu, pc, ADDSI (FLD (f_offset), 4), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
- {
- SI opval = CPU (h_gr[((FLD (f_srcdst)) + (2))]);
- SETMEMSI (current_cpu, pc, ADDSI (FLD (f_offset), 8), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
- {
- SI opval = CPU (h_gr[((FLD (f_srcdst)) + (3))]);
- SETMEMSI (current_cpu, pc, ADDSI (FLD (f_offset), 12), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-}
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_STQ_INDIRECT_OFFSET) : /* stq $st_src, $offset($abase) */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-{
- SI tmp_sregno;
- tmp_sregno = FLD (f_srcdst);
- {
- SI opval = * FLD (i_st_src);
- SETMEMSI (current_cpu, pc, ADDSI (FLD (f_offset), * FLD (i_abase)), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
- {
- SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]);
- SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_offset), * FLD (i_abase)), 4), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
- {
- SI opval = CPU (h_gr[((FLD (f_srcdst)) + (2))]);
- SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_offset), * FLD (i_abase)), 8), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
- {
- SI opval = CPU (h_gr[((FLD (f_srcdst)) + (3))]);
- SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_offset), * FLD (i_abase)), 12), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-}
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_STQ_INDIRECT) : /* stq $st_src, ($abase) */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-{
- SI tmp_sregno;
- tmp_sregno = FLD (f_srcdst);
- {
- SI opval = * FLD (i_st_src);
- SETMEMSI (current_cpu, pc, * FLD (i_abase), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
- {
- SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]);
- SETMEMSI (current_cpu, pc, ADDSI (* FLD (i_abase), 4), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
- {
- SI opval = CPU (h_gr[((FLD (f_srcdst)) + (2))]);
- SETMEMSI (current_cpu, pc, ADDSI (* FLD (i_abase), 8), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
- {
- SI opval = CPU (h_gr[((FLD (f_srcdst)) + (3))]);
- SETMEMSI (current_cpu, pc, ADDSI (* FLD (i_abase), 12), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-}
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_STQ_INDIRECT_INDEX) : /* stq $st_src, ($abase)[$index*S$scale] */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-{
- SI tmp_sregno;
- tmp_sregno = FLD (f_srcdst);
- {
- SI opval = * FLD (i_st_src);
- SETMEMSI (current_cpu, pc, ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
- {
- SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]);
- SETMEMSI (current_cpu, pc, ADDSI (ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), 4), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
- {
- SI opval = CPU (h_gr[((FLD (f_srcdst)) + (2))]);
- SETMEMSI (current_cpu, pc, ADDSI (ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), 8), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
- {
- SI opval = CPU (h_gr[((FLD (f_srcdst)) + (3))]);
- SETMEMSI (current_cpu, pc, ADDSI (ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), 12), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-}
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_STQ_DISP) : /* stq $st_src, $optdisp */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
-
-{
- SI tmp_sregno;
- tmp_sregno = FLD (f_srcdst);
- {
- SI opval = * FLD (i_st_src);
- SETMEMSI (current_cpu, pc, FLD (f_optdisp), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
- {
- SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]);
- SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), 4), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
- {
- SI opval = CPU (h_gr[((FLD (f_srcdst)) + (2))]);
- SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), 8), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
- {
- SI opval = CPU (h_gr[((FLD (f_srcdst)) + (3))]);
- SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), 12), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-}
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_STQ_INDIRECT_DISP) : /* stq $st_src, $optdisp($abase) */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
-
-{
- SI tmp_sregno;
- tmp_sregno = FLD (f_srcdst);
- {
- SI opval = * FLD (i_st_src);
- SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), * FLD (i_abase)), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
- {
- SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]);
- SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), * FLD (i_abase)), 4), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
- {
- SI opval = CPU (h_gr[((FLD (f_srcdst)) + (2))]);
- SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), * FLD (i_abase)), 8), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
- {
- SI opval = CPU (h_gr[((FLD (f_srcdst)) + (3))]);
- SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), * FLD (i_abase)), 12), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-}
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_STQ_INDEX_DISP) : /* stq $st_src, $optdisp[$index*S$scale */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
-
-{
- SI tmp_sregno;
- tmp_sregno = FLD (f_srcdst);
- {
- SI opval = * FLD (i_st_src);
- SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
- {
- SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]);
- SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), 4), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
- {
- SI opval = CPU (h_gr[((FLD (f_srcdst)) + (2))]);
- SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), 8), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
- {
- SI opval = CPU (h_gr[((FLD (f_srcdst)) + (3))]);
- SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), 12), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-}
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_STQ_INDIRECT_INDEX_DISP) : /* stq $st_src, $optdisp($abase)[$index*S$scale] */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
-
-{
- SI tmp_sregno;
- tmp_sregno = FLD (f_srcdst);
- {
- SI opval = * FLD (i_st_src);
- SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
- {
- SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]);
- SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))), 4), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
- {
- SI opval = CPU (h_gr[((FLD (f_srcdst)) + (2))]);
- SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))), 8), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
- {
- SI opval = CPU (h_gr[((FLD (f_srcdst)) + (3))]);
- SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))), 12), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-}
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_CMPOBE_REG) : /* cmpobe $br_src1, $br_src2, $br_disp */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-if (EQSI (* FLD (i_br_src1), * FLD (i_br_src2))) {
- {
- USI opval = FLD (i_br_disp);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 3);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_CMPOBE_LIT) : /* cmpobe $br_lit1, $br_src2, $br_disp */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-if (EQSI (FLD (f_br_src1), * FLD (i_br_src2))) {
- {
- USI opval = FLD (i_br_disp);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 3);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_CMPOBNE_REG) : /* cmpobne $br_src1, $br_src2, $br_disp */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-if (NESI (* FLD (i_br_src1), * FLD (i_br_src2))) {
- {
- USI opval = FLD (i_br_disp);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 3);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_CMPOBNE_LIT) : /* cmpobne $br_lit1, $br_src2, $br_disp */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-if (NESI (FLD (f_br_src1), * FLD (i_br_src2))) {
- {
- USI opval = FLD (i_br_disp);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 3);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_CMPOBL_REG) : /* cmpobl $br_src1, $br_src2, $br_disp */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-if (LTUSI (* FLD (i_br_src1), * FLD (i_br_src2))) {
- {
- USI opval = FLD (i_br_disp);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 3);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_CMPOBL_LIT) : /* cmpobl $br_lit1, $br_src2, $br_disp */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-if (LTUSI (FLD (f_br_src1), * FLD (i_br_src2))) {
- {
- USI opval = FLD (i_br_disp);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 3);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_CMPOBLE_REG) : /* cmpoble $br_src1, $br_src2, $br_disp */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-if (LEUSI (* FLD (i_br_src1), * FLD (i_br_src2))) {
- {
- USI opval = FLD (i_br_disp);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 3);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_CMPOBLE_LIT) : /* cmpoble $br_lit1, $br_src2, $br_disp */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-if (LEUSI (FLD (f_br_src1), * FLD (i_br_src2))) {
- {
- USI opval = FLD (i_br_disp);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 3);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_CMPOBG_REG) : /* cmpobg $br_src1, $br_src2, $br_disp */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-if (GTUSI (* FLD (i_br_src1), * FLD (i_br_src2))) {
- {
- USI opval = FLD (i_br_disp);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 3);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_CMPOBG_LIT) : /* cmpobg $br_lit1, $br_src2, $br_disp */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-if (GTUSI (FLD (f_br_src1), * FLD (i_br_src2))) {
- {
- USI opval = FLD (i_br_disp);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 3);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_CMPOBGE_REG) : /* cmpobge $br_src1, $br_src2, $br_disp */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-if (GEUSI (* FLD (i_br_src1), * FLD (i_br_src2))) {
- {
- USI opval = FLD (i_br_disp);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 3);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_CMPOBGE_LIT) : /* cmpobge $br_lit1, $br_src2, $br_disp */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-if (GEUSI (FLD (f_br_src1), * FLD (i_br_src2))) {
- {
- USI opval = FLD (i_br_disp);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 3);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_CMPIBE_REG) : /* cmpibe $br_src1, $br_src2, $br_disp */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-if (EQSI (* FLD (i_br_src1), * FLD (i_br_src2))) {
- {
- USI opval = FLD (i_br_disp);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 3);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_CMPIBE_LIT) : /* cmpibe $br_lit1, $br_src2, $br_disp */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-if (EQSI (FLD (f_br_src1), * FLD (i_br_src2))) {
- {
- USI opval = FLD (i_br_disp);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 3);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_CMPIBNE_REG) : /* cmpibne $br_src1, $br_src2, $br_disp */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-if (NESI (* FLD (i_br_src1), * FLD (i_br_src2))) {
- {
- USI opval = FLD (i_br_disp);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 3);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_CMPIBNE_LIT) : /* cmpibne $br_lit1, $br_src2, $br_disp */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-if (NESI (FLD (f_br_src1), * FLD (i_br_src2))) {
- {
- USI opval = FLD (i_br_disp);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 3);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_CMPIBL_REG) : /* cmpibl $br_src1, $br_src2, $br_disp */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-if (LTSI (* FLD (i_br_src1), * FLD (i_br_src2))) {
- {
- USI opval = FLD (i_br_disp);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 3);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_CMPIBL_LIT) : /* cmpibl $br_lit1, $br_src2, $br_disp */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-if (LTSI (FLD (f_br_src1), * FLD (i_br_src2))) {
- {
- USI opval = FLD (i_br_disp);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 3);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_CMPIBLE_REG) : /* cmpible $br_src1, $br_src2, $br_disp */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-if (LESI (* FLD (i_br_src1), * FLD (i_br_src2))) {
- {
- USI opval = FLD (i_br_disp);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 3);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_CMPIBLE_LIT) : /* cmpible $br_lit1, $br_src2, $br_disp */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-if (LESI (FLD (f_br_src1), * FLD (i_br_src2))) {
- {
- USI opval = FLD (i_br_disp);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 3);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_CMPIBG_REG) : /* cmpibg $br_src1, $br_src2, $br_disp */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-if (GTSI (* FLD (i_br_src1), * FLD (i_br_src2))) {
- {
- USI opval = FLD (i_br_disp);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 3);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_CMPIBG_LIT) : /* cmpibg $br_lit1, $br_src2, $br_disp */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-if (GTSI (FLD (f_br_src1), * FLD (i_br_src2))) {
- {
- USI opval = FLD (i_br_disp);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 3);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_CMPIBGE_REG) : /* cmpibge $br_src1, $br_src2, $br_disp */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-if (GESI (* FLD (i_br_src1), * FLD (i_br_src2))) {
- {
- USI opval = FLD (i_br_disp);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 3);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_CMPIBGE_LIT) : /* cmpibge $br_lit1, $br_src2, $br_disp */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-if (GESI (FLD (f_br_src1), * FLD (i_br_src2))) {
- {
- USI opval = FLD (i_br_disp);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 3);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_BBC_REG) : /* bbc $br_src1, $br_src2, $br_disp */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-if (EQSI (ANDSI (SLLSI (1, * FLD (i_br_src1)), * FLD (i_br_src2)), 0)) {
- {
- USI opval = FLD (i_br_disp);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 3);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_BBC_LIT) : /* bbc $br_lit1, $br_src2, $br_disp */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-if (EQSI (ANDSI (SLLSI (1, FLD (f_br_src1)), * FLD (i_br_src2)), 0)) {
- {
- USI opval = FLD (i_br_disp);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 3);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_BBS_REG) : /* bbs $br_src1, $br_src2, $br_disp */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-if (NESI (ANDSI (SLLSI (1, * FLD (i_br_src1)), * FLD (i_br_src2)), 0)) {
- {
- USI opval = FLD (i_br_disp);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 3);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_BBS_LIT) : /* bbs $br_lit1, $br_src2, $br_disp */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-if (NESI (ANDSI (SLLSI (1, FLD (f_br_src1)), * FLD (i_br_src2)), 0)) {
- {
- USI opval = FLD (i_br_disp);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 3);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_CMPI) : /* cmpi $src1, $src2 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_emul.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = (LTSI (* FLD (i_src1), * FLD (i_src2))) ? (4) : (EQSI (* FLD (i_src1), * FLD (i_src2))) ? (2) : (1);
- CPU (h_cc) = opval;
- TRACE_RESULT (current_cpu, abuf, "cc", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_CMPI1) : /* cmpi $lit1, $src2 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_emul1.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = (LTSI (FLD (f_src1), * FLD (i_src2))) ? (4) : (EQSI (FLD (f_src1), * FLD (i_src2))) ? (2) : (1);
- CPU (h_cc) = opval;
- TRACE_RESULT (current_cpu, abuf, "cc", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_CMPI2) : /* cmpi $src1, $lit2 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_emul2.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = (LTSI (* FLD (i_src1), FLD (f_src2))) ? (4) : (EQSI (* FLD (i_src1), FLD (f_src2))) ? (2) : (1);
- CPU (h_cc) = opval;
- TRACE_RESULT (current_cpu, abuf, "cc", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_CMPI3) : /* cmpi $lit1, $lit2 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_emul3.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = (LTSI (FLD (f_src1), FLD (f_src2))) ? (4) : (EQSI (FLD (f_src1), FLD (f_src2))) ? (2) : (1);
- CPU (h_cc) = opval;
- TRACE_RESULT (current_cpu, abuf, "cc", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_CMPO) : /* cmpo $src1, $src2 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_emul.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = (LTUSI (* FLD (i_src1), * FLD (i_src2))) ? (4) : (EQSI (* FLD (i_src1), * FLD (i_src2))) ? (2) : (1);
- CPU (h_cc) = opval;
- TRACE_RESULT (current_cpu, abuf, "cc", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_CMPO1) : /* cmpo $lit1, $src2 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_emul1.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = (LTUSI (FLD (f_src1), * FLD (i_src2))) ? (4) : (EQSI (FLD (f_src1), * FLD (i_src2))) ? (2) : (1);
- CPU (h_cc) = opval;
- TRACE_RESULT (current_cpu, abuf, "cc", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_CMPO2) : /* cmpo $src1, $lit2 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_emul2.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = (LTUSI (* FLD (i_src1), FLD (f_src2))) ? (4) : (EQSI (* FLD (i_src1), FLD (f_src2))) ? (2) : (1);
- CPU (h_cc) = opval;
- TRACE_RESULT (current_cpu, abuf, "cc", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_CMPO3) : /* cmpo $lit1, $lit2 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_emul3.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = (LTUSI (FLD (f_src1), FLD (f_src2))) ? (4) : (EQSI (FLD (f_src1), FLD (f_src2))) ? (2) : (1);
- CPU (h_cc) = opval;
- TRACE_RESULT (current_cpu, abuf, "cc", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_TESTNO_REG) : /* testno $br_src1 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_testno_reg.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = EQSI (CPU (h_cc), 0);
- * FLD (i_br_src1) = opval;
- TRACE_RESULT (current_cpu, abuf, "br_src1", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_TESTG_REG) : /* testg $br_src1 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_testno_reg.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = NESI (ANDSI (CPU (h_cc), 1), 0);
- * FLD (i_br_src1) = opval;
- TRACE_RESULT (current_cpu, abuf, "br_src1", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_TESTE_REG) : /* teste $br_src1 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_testno_reg.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = NESI (ANDSI (CPU (h_cc), 2), 0);
- * FLD (i_br_src1) = opval;
- TRACE_RESULT (current_cpu, abuf, "br_src1", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_TESTGE_REG) : /* testge $br_src1 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_testno_reg.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = NESI (ANDSI (CPU (h_cc), 3), 0);
- * FLD (i_br_src1) = opval;
- TRACE_RESULT (current_cpu, abuf, "br_src1", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_TESTL_REG) : /* testl $br_src1 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_testno_reg.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = NESI (ANDSI (CPU (h_cc), 4), 0);
- * FLD (i_br_src1) = opval;
- TRACE_RESULT (current_cpu, abuf, "br_src1", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_TESTNE_REG) : /* testne $br_src1 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_testno_reg.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = NESI (ANDSI (CPU (h_cc), 5), 0);
- * FLD (i_br_src1) = opval;
- TRACE_RESULT (current_cpu, abuf, "br_src1", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_TESTLE_REG) : /* testle $br_src1 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_testno_reg.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = NESI (ANDSI (CPU (h_cc), 6), 0);
- * FLD (i_br_src1) = opval;
- TRACE_RESULT (current_cpu, abuf, "br_src1", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_TESTO_REG) : /* testo $br_src1 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_testno_reg.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = NESI (ANDSI (CPU (h_cc), 7), 0);
- * FLD (i_br_src1) = opval;
- TRACE_RESULT (current_cpu, abuf, "br_src1", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_BNO) : /* bno $ctrl_disp */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_bno.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-if (EQSI (CPU (h_cc), 0)) {
- {
- USI opval = FLD (i_ctrl_disp);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 2);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_BG) : /* bg $ctrl_disp */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_bno.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-if (NESI (ANDSI (CPU (h_cc), 1), 0)) {
- {
- USI opval = FLD (i_ctrl_disp);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 2);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_BE) : /* be $ctrl_disp */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_bno.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-if (NESI (ANDSI (CPU (h_cc), 2), 0)) {
- {
- USI opval = FLD (i_ctrl_disp);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 2);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_BGE) : /* bge $ctrl_disp */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_bno.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-if (NESI (ANDSI (CPU (h_cc), 3), 0)) {
- {
- USI opval = FLD (i_ctrl_disp);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 2);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_BL) : /* bl $ctrl_disp */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_bno.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-if (NESI (ANDSI (CPU (h_cc), 4), 0)) {
- {
- USI opval = FLD (i_ctrl_disp);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 2);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_BNE) : /* bne $ctrl_disp */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_bno.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-if (NESI (ANDSI (CPU (h_cc), 5), 0)) {
- {
- USI opval = FLD (i_ctrl_disp);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 2);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_BLE) : /* ble $ctrl_disp */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_bno.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-if (NESI (ANDSI (CPU (h_cc), 6), 0)) {
- {
- USI opval = FLD (i_ctrl_disp);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 2);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_BO) : /* bo $ctrl_disp */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_bno.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-if (NESI (ANDSI (CPU (h_cc), 7), 0)) {
- {
- USI opval = FLD (i_ctrl_disp);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 2);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_B) : /* b $ctrl_disp */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_bno.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- USI opval = FLD (i_ctrl_disp);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-
- SEM_BRANCH_FINI (vpc);
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_BX_INDIRECT_OFFSET) : /* bx $offset($abase) */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- USI opval = ADDSI (FLD (f_offset), * FLD (i_abase));
- SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-
- SEM_BRANCH_FINI (vpc);
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_BX_INDIRECT) : /* bx ($abase) */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- USI opval = * FLD (i_abase);
- SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-
- SEM_BRANCH_FINI (vpc);
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_BX_INDIRECT_INDEX) : /* bx ($abase)[$index*S$scale] */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- USI opval = ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))));
- SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-
- SEM_BRANCH_FINI (vpc);
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_BX_DISP) : /* bx $optdisp */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
-
- {
- USI opval = FLD (f_optdisp);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-
- SEM_BRANCH_FINI (vpc);
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_BX_INDIRECT_DISP) : /* bx $optdisp($abase) */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
-
- {
- USI opval = ADDSI (FLD (f_optdisp), * FLD (i_abase));
- SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-
- SEM_BRANCH_FINI (vpc);
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_CALLX_DISP) : /* callx $optdisp */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_callx_disp.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
-
-{
- SI tmp_temp;
- tmp_temp = ANDSI (ADDSI (CPU (h_gr[((UINT) 1)]), 63), INVSI (63));
- {
- SI opval = ADDSI (pc, 8);
- CPU (h_gr[((UINT) 2)]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-2", 'x', opval);
- }
-SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 0), CPU (h_gr[((UINT) 0)]));
-SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 4), CPU (h_gr[((UINT) 1)]));
-SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 8), CPU (h_gr[((UINT) 2)]));
-SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 12), CPU (h_gr[((UINT) 3)]));
-SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 16), CPU (h_gr[((UINT) 4)]));
-SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 20), CPU (h_gr[((UINT) 5)]));
-SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 24), CPU (h_gr[((UINT) 6)]));
-SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 28), CPU (h_gr[((UINT) 7)]));
-SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 32), CPU (h_gr[((UINT) 8)]));
-SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 36), CPU (h_gr[((UINT) 9)]));
-SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 40), CPU (h_gr[((UINT) 10)]));
-SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 44), CPU (h_gr[((UINT) 11)]));
-SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 48), CPU (h_gr[((UINT) 12)]));
-SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 52), CPU (h_gr[((UINT) 13)]));
-SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 56), CPU (h_gr[((UINT) 14)]));
-SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 60), CPU (h_gr[((UINT) 15)]));
- {
- USI opval = FLD (f_optdisp);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-CPU (h_gr[((UINT) 0)]) = 0xdeadbeef;
-CPU (h_gr[((UINT) 1)]) = 0xdeadbeef;
-CPU (h_gr[((UINT) 2)]) = 0xdeadbeef;
-CPU (h_gr[((UINT) 3)]) = 0xdeadbeef;
-CPU (h_gr[((UINT) 4)]) = 0xdeadbeef;
-CPU (h_gr[((UINT) 5)]) = 0xdeadbeef;
-CPU (h_gr[((UINT) 6)]) = 0xdeadbeef;
-CPU (h_gr[((UINT) 7)]) = 0xdeadbeef;
-CPU (h_gr[((UINT) 8)]) = 0xdeadbeef;
-CPU (h_gr[((UINT) 9)]) = 0xdeadbeef;
-CPU (h_gr[((UINT) 10)]) = 0xdeadbeef;
-CPU (h_gr[((UINT) 11)]) = 0xdeadbeef;
-CPU (h_gr[((UINT) 12)]) = 0xdeadbeef;
-CPU (h_gr[((UINT) 13)]) = 0xdeadbeef;
-CPU (h_gr[((UINT) 14)]) = 0xdeadbeef;
-CPU (h_gr[((UINT) 15)]) = 0xdeadbeef;
- {
- SI opval = CPU (h_gr[((UINT) 31)]);
- CPU (h_gr[((UINT) 0)]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-0", 'x', opval);
- }
- {
- SI opval = tmp_temp;
- CPU (h_gr[((UINT) 31)]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-31", 'x', opval);
- }
- {
- SI opval = ADDSI (tmp_temp, 64);
- CPU (h_gr[((UINT) 1)]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-1", 'x', opval);
- }
-}
-
- SEM_BRANCH_FINI (vpc);
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_CALLX_INDIRECT) : /* callx ($abase) */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_callx_indirect_offset.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-{
- SI tmp_temp;
- tmp_temp = ANDSI (ADDSI (CPU (h_gr[((UINT) 1)]), 63), INVSI (63));
- {
- SI opval = ADDSI (pc, 4);
- CPU (h_gr[((UINT) 2)]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-2", 'x', opval);
- }
-SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 0), CPU (h_gr[((UINT) 0)]));
-SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 4), CPU (h_gr[((UINT) 1)]));
-SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 8), CPU (h_gr[((UINT) 2)]));
-SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 12), CPU (h_gr[((UINT) 3)]));
-SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 16), CPU (h_gr[((UINT) 4)]));
-SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 20), CPU (h_gr[((UINT) 5)]));
-SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 24), CPU (h_gr[((UINT) 6)]));
-SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 28), CPU (h_gr[((UINT) 7)]));
-SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 32), CPU (h_gr[((UINT) 8)]));
-SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 36), CPU (h_gr[((UINT) 9)]));
-SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 40), CPU (h_gr[((UINT) 10)]));
-SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 44), CPU (h_gr[((UINT) 11)]));
-SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 48), CPU (h_gr[((UINT) 12)]));
-SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 52), CPU (h_gr[((UINT) 13)]));
-SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 56), CPU (h_gr[((UINT) 14)]));
-SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 60), CPU (h_gr[((UINT) 15)]));
- {
- USI opval = * FLD (i_abase);
- SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-CPU (h_gr[((UINT) 0)]) = 0xdeadbeef;
-CPU (h_gr[((UINT) 1)]) = 0xdeadbeef;
-CPU (h_gr[((UINT) 2)]) = 0xdeadbeef;
-CPU (h_gr[((UINT) 3)]) = 0xdeadbeef;
-CPU (h_gr[((UINT) 4)]) = 0xdeadbeef;
-CPU (h_gr[((UINT) 5)]) = 0xdeadbeef;
-CPU (h_gr[((UINT) 6)]) = 0xdeadbeef;
-CPU (h_gr[((UINT) 7)]) = 0xdeadbeef;
-CPU (h_gr[((UINT) 8)]) = 0xdeadbeef;
-CPU (h_gr[((UINT) 9)]) = 0xdeadbeef;
-CPU (h_gr[((UINT) 10)]) = 0xdeadbeef;
-CPU (h_gr[((UINT) 11)]) = 0xdeadbeef;
-CPU (h_gr[((UINT) 12)]) = 0xdeadbeef;
-CPU (h_gr[((UINT) 13)]) = 0xdeadbeef;
-CPU (h_gr[((UINT) 14)]) = 0xdeadbeef;
-CPU (h_gr[((UINT) 15)]) = 0xdeadbeef;
- {
- SI opval = CPU (h_gr[((UINT) 31)]);
- CPU (h_gr[((UINT) 0)]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-0", 'x', opval);
- }
- {
- SI opval = tmp_temp;
- CPU (h_gr[((UINT) 31)]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-31", 'x', opval);
- }
- {
- SI opval = ADDSI (tmp_temp, 64);
- CPU (h_gr[((UINT) 1)]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-1", 'x', opval);
- }
-}
-
- SEM_BRANCH_FINI (vpc);
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_CALLX_INDIRECT_OFFSET) : /* callx $offset($abase) */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_callx_indirect_offset.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-{
- SI tmp_temp;
- tmp_temp = ANDSI (ADDSI (CPU (h_gr[((UINT) 1)]), 63), INVSI (63));
- {
- SI opval = ADDSI (pc, 4);
- CPU (h_gr[((UINT) 2)]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-2", 'x', opval);
- }
-SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 0), CPU (h_gr[((UINT) 0)]));
-SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 4), CPU (h_gr[((UINT) 1)]));
-SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 8), CPU (h_gr[((UINT) 2)]));
-SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 12), CPU (h_gr[((UINT) 3)]));
-SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 16), CPU (h_gr[((UINT) 4)]));
-SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 20), CPU (h_gr[((UINT) 5)]));
-SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 24), CPU (h_gr[((UINT) 6)]));
-SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 28), CPU (h_gr[((UINT) 7)]));
-SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 32), CPU (h_gr[((UINT) 8)]));
-SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 36), CPU (h_gr[((UINT) 9)]));
-SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 40), CPU (h_gr[((UINT) 10)]));
-SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 44), CPU (h_gr[((UINT) 11)]));
-SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 48), CPU (h_gr[((UINT) 12)]));
-SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 52), CPU (h_gr[((UINT) 13)]));
-SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 56), CPU (h_gr[((UINT) 14)]));
-SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 60), CPU (h_gr[((UINT) 15)]));
- {
- USI opval = ADDSI (FLD (f_offset), * FLD (i_abase));
- SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-CPU (h_gr[((UINT) 0)]) = 0xdeadbeef;
-CPU (h_gr[((UINT) 1)]) = 0xdeadbeef;
-CPU (h_gr[((UINT) 2)]) = 0xdeadbeef;
-CPU (h_gr[((UINT) 3)]) = 0xdeadbeef;
-CPU (h_gr[((UINT) 4)]) = 0xdeadbeef;
-CPU (h_gr[((UINT) 5)]) = 0xdeadbeef;
-CPU (h_gr[((UINT) 6)]) = 0xdeadbeef;
-CPU (h_gr[((UINT) 7)]) = 0xdeadbeef;
-CPU (h_gr[((UINT) 8)]) = 0xdeadbeef;
-CPU (h_gr[((UINT) 9)]) = 0xdeadbeef;
-CPU (h_gr[((UINT) 10)]) = 0xdeadbeef;
-CPU (h_gr[((UINT) 11)]) = 0xdeadbeef;
-CPU (h_gr[((UINT) 12)]) = 0xdeadbeef;
-CPU (h_gr[((UINT) 13)]) = 0xdeadbeef;
-CPU (h_gr[((UINT) 14)]) = 0xdeadbeef;
-CPU (h_gr[((UINT) 15)]) = 0xdeadbeef;
- {
- SI opval = CPU (h_gr[((UINT) 31)]);
- CPU (h_gr[((UINT) 0)]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-0", 'x', opval);
- }
- {
- SI opval = tmp_temp;
- CPU (h_gr[((UINT) 31)]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-31", 'x', opval);
- }
- {
- SI opval = ADDSI (tmp_temp, 64);
- CPU (h_gr[((UINT) 1)]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-1", 'x', opval);
- }
-}
-
- SEM_BRANCH_FINI (vpc);
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_RET) : /* ret */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_callx_disp.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-{
- {
- SI opval = CPU (h_gr[((UINT) 0)]);
- CPU (h_gr[((UINT) 31)]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-31", 'x', opval);
- }
-CPU (h_gr[((UINT) 0)]) = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 0));
-CPU (h_gr[((UINT) 1)]) = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 4));
-CPU (h_gr[((UINT) 2)]) = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 8));
-CPU (h_gr[((UINT) 3)]) = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 12));
-CPU (h_gr[((UINT) 4)]) = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 16));
-CPU (h_gr[((UINT) 5)]) = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 20));
-CPU (h_gr[((UINT) 6)]) = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 24));
-CPU (h_gr[((UINT) 7)]) = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 28));
-CPU (h_gr[((UINT) 8)]) = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 32));
-CPU (h_gr[((UINT) 9)]) = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 36));
-CPU (h_gr[((UINT) 10)]) = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 40));
-CPU (h_gr[((UINT) 11)]) = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 44));
-CPU (h_gr[((UINT) 12)]) = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 48));
-CPU (h_gr[((UINT) 13)]) = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 52));
-CPU (h_gr[((UINT) 14)]) = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 56));
-CPU (h_gr[((UINT) 15)]) = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 60));
- {
- USI opval = CPU (h_gr[((UINT) 2)]);
- SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- SEM_BRANCH_FINI (vpc);
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_CALLS) : /* calls $src1 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_emul2.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = i960_trap (current_cpu, pc, * FLD (i_src1));
- SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-
- SEM_BRANCH_FINI (vpc);
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_FMARK) : /* fmark */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_empty.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = i960_breakpoint (current_cpu, pc);
- SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-
- SEM_BRANCH_FINI (vpc);
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_FLUSHREG) : /* flushreg */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_empty.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-((void) 0); /*nop*/
-
-#undef FLD
-}
- NEXT (vpc);
-
-
- }
- ENDSWITCH (sem) /* End of semantic switch. */
-
- /* At this point `vpc' contains the next insn to execute. */
-}
-
-#undef DEFINE_SWITCH
-#endif /* DEFINE_SWITCH */
diff --git a/sim/i960/sem.c b/sim/i960/sem.c
deleted file mode 100644
index 262340edf56..00000000000
--- a/sim/i960/sem.c
+++ /dev/null
@@ -1,7918 +0,0 @@
-/* Simulator instruction semantics for i960base.
-
-THIS FILE IS MACHINE GENERATED WITH CGEN.
-
-Copyright (C) 1996, 1997, 1998, 1999 Free Software Foundation, Inc.
-
-This file is part of the GNU Simulators.
-
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License along
-with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
-*/
-
-#define WANT_CPU i960base
-#define WANT_CPU_I960BASE
-
-#include "sim-main.h"
-#include "cgen-mem.h"
-#include "cgen-ops.h"
-
-#undef GET_ATTR
-#define GET_ATTR(cpu, num, attr) CGEN_ATTR_VALUE (NULL, abuf->idesc->attrs, CGEN_INSN_##attr)
-
-/* This is used so that we can compile two copies of the semantic code,
- one with full feature support and one without that runs fast(er).
- FAST_P, when desired, is defined on the command line, -DFAST_P=1. */
-#if FAST_P
-#define SEM_FN_NAME(cpu,fn) XCONCAT3 (cpu,_semf_,fn)
-#undef TRACE_RESULT
-#define TRACE_RESULT(cpu, abuf, name, type, val)
-#else
-#define SEM_FN_NAME(cpu,fn) XCONCAT3 (cpu,_sem_,fn)
-#endif
-
-/* x-invalid: --invalid-- */
-
-static SEM_PC
-SEM_FN_NAME (i960base,x_invalid) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.fmt_empty.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
-
- {
- /* Update the recorded pc in the cpu state struct.
- Only necessary for WITH_SCACHE case, but to avoid the
- conditional compilation .... */
- SET_H_PC (pc);
- /* Virtual insns have zero size. Overwrite vpc with address of next insn
- using the default-insn-bitsize spec. When executing insns in parallel
- we may want to queue the fault and continue execution. */
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
- vpc = sim_engine_invalid_insn (current_cpu, pc, vpc);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* x-after: --after-- */
-
-static SEM_PC
-SEM_FN_NAME (i960base,x_after) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.fmt_empty.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
-
- {
-#if WITH_SCACHE_PBB_I960BASE
- i960base_pbb_after (current_cpu, sem_arg);
-#endif
- }
-
- return vpc;
-#undef FLD
-}
-
-/* x-before: --before-- */
-
-static SEM_PC
-SEM_FN_NAME (i960base,x_before) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.fmt_empty.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
-
- {
-#if WITH_SCACHE_PBB_I960BASE
- i960base_pbb_before (current_cpu, sem_arg);
-#endif
- }
-
- return vpc;
-#undef FLD
-}
-
-/* x-cti-chain: --cti-chain-- */
-
-static SEM_PC
-SEM_FN_NAME (i960base,x_cti_chain) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.fmt_empty.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
-
- {
-#if WITH_SCACHE_PBB_I960BASE
-#ifdef DEFINE_SWITCH
- vpc = i960base_pbb_cti_chain (current_cpu, sem_arg,
- pbb_br_type, pbb_br_npc);
- BREAK (sem);
-#else
- /* FIXME: Allow provision of explicit ifmt spec in insn spec. */
- vpc = i960base_pbb_cti_chain (current_cpu, sem_arg,
- CPU_PBB_BR_TYPE (current_cpu),
- CPU_PBB_BR_NPC (current_cpu));
-#endif
-#endif
- }
-
- return vpc;
-#undef FLD
-}
-
-/* x-chain: --chain-- */
-
-static SEM_PC
-SEM_FN_NAME (i960base,x_chain) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.fmt_empty.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
-
- {
-#if WITH_SCACHE_PBB_I960BASE
- vpc = i960base_pbb_chain (current_cpu, sem_arg);
-#ifdef DEFINE_SWITCH
- BREAK (sem);
-#endif
-#endif
- }
-
- return vpc;
-#undef FLD
-}
-
-/* x-begin: --begin-- */
-
-static SEM_PC
-SEM_FN_NAME (i960base,x_begin) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.fmt_empty.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
-
- {
-#if WITH_SCACHE_PBB_I960BASE
-#ifdef DEFINE_SWITCH
- /* In the switch case FAST_P is a constant, allowing several optimizations
- in any called inline functions. */
- vpc = i960base_pbb_begin (current_cpu, FAST_P);
-#else
- vpc = i960base_pbb_begin (current_cpu, STATE_RUN_FAST_P (CPU_STATE (current_cpu)));
-#endif
-#endif
- }
-
- return vpc;
-#undef FLD
-}
-
-/* mulo: mulo $src1, $src2, $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,mulo) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = MULSI (* FLD (i_src1), * FLD (i_src2));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* mulo1: mulo $lit1, $src2, $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,mulo1) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul1.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = MULSI (FLD (f_src1), * FLD (i_src2));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* mulo2: mulo $src1, $lit2, $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,mulo2) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul2.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = MULSI (* FLD (i_src1), FLD (f_src2));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* mulo3: mulo $lit1, $lit2, $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,mulo3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul3.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = MULSI (FLD (f_src1), FLD (f_src2));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* remo: remo $src1, $src2, $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,remo) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = UMODSI (* FLD (i_src2), * FLD (i_src1));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* remo1: remo $lit1, $src2, $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,remo1) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul1.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = UMODSI (* FLD (i_src2), FLD (f_src1));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* remo2: remo $src1, $lit2, $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,remo2) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul2.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = UMODSI (FLD (f_src2), * FLD (i_src1));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* remo3: remo $lit1, $lit2, $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,remo3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul3.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = UMODSI (FLD (f_src2), FLD (f_src1));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* divo: divo $src1, $src2, $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,divo) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = UDIVSI (* FLD (i_src2), * FLD (i_src1));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* divo1: divo $lit1, $src2, $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,divo1) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul1.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = UDIVSI (* FLD (i_src2), FLD (f_src1));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* divo2: divo $src1, $lit2, $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,divo2) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul2.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = UDIVSI (FLD (f_src2), * FLD (i_src1));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* divo3: divo $lit1, $lit2, $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,divo3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul3.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = UDIVSI (FLD (f_src2), FLD (f_src1));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* remi: remi $src1, $src2, $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,remi) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = MODSI (* FLD (i_src2), * FLD (i_src1));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* remi1: remi $lit1, $src2, $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,remi1) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul1.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = MODSI (* FLD (i_src2), FLD (f_src1));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* remi2: remi $src1, $lit2, $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,remi2) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul2.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = MODSI (FLD (f_src2), * FLD (i_src1));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* remi3: remi $lit1, $lit2, $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,remi3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul3.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = MODSI (FLD (f_src2), FLD (f_src1));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* divi: divi $src1, $src2, $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,divi) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = DIVSI (* FLD (i_src2), * FLD (i_src1));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* divi1: divi $lit1, $src2, $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,divi1) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul1.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = DIVSI (* FLD (i_src2), FLD (f_src1));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* divi2: divi $src1, $lit2, $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,divi2) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul2.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = DIVSI (FLD (f_src2), * FLD (i_src1));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* divi3: divi $lit1, $lit2, $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,divi3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul3.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = DIVSI (FLD (f_src2), FLD (f_src1));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* addo: addo $src1, $src2, $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,addo) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = ADDSI (* FLD (i_src1), * FLD (i_src2));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* addo1: addo $lit1, $src2, $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,addo1) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul1.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = ADDSI (FLD (f_src1), * FLD (i_src2));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* addo2: addo $src1, $lit2, $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,addo2) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul2.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = ADDSI (* FLD (i_src1), FLD (f_src2));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* addo3: addo $lit1, $lit2, $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,addo3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul3.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = ADDSI (FLD (f_src1), FLD (f_src2));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* subo: subo $src1, $src2, $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,subo) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = SUBSI (* FLD (i_src2), * FLD (i_src1));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* subo1: subo $lit1, $src2, $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,subo1) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul1.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = SUBSI (* FLD (i_src2), FLD (f_src1));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* subo2: subo $src1, $lit2, $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,subo2) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul2.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = SUBSI (FLD (f_src2), * FLD (i_src1));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* subo3: subo $lit1, $lit2, $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,subo3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul3.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = SUBSI (FLD (f_src2), FLD (f_src1));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* notbit: notbit $src1, $src2, $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,notbit) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = XORSI (SLLSI (1, * FLD (i_src1)), * FLD (i_src2));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* notbit1: notbit $lit1, $src2, $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,notbit1) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul1.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = XORSI (SLLSI (1, FLD (f_src1)), * FLD (i_src2));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* notbit2: notbit $src1, $lit2, $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,notbit2) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul2.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = XORSI (SLLSI (1, * FLD (i_src1)), FLD (f_src2));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* notbit3: notbit $lit1, $lit2, $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,notbit3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul3.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = XORSI (SLLSI (1, FLD (f_src1)), FLD (f_src2));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* and: and $src1, $src2, $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,and) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = ANDSI (* FLD (i_src1), * FLD (i_src2));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* and1: and $lit1, $src2, $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,and1) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul1.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = ANDSI (FLD (f_src1), * FLD (i_src2));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* and2: and $src1, $lit2, $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,and2) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul2.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = ANDSI (* FLD (i_src1), FLD (f_src2));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* and3: and $lit1, $lit2, $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,and3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul3.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = ANDSI (FLD (f_src1), FLD (f_src2));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* andnot: andnot $src1, $src2, $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,andnot) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = ANDSI (* FLD (i_src2), INVSI (* FLD (i_src1)));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* andnot1: andnot $lit1, $src2, $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,andnot1) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul1.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = ANDSI (* FLD (i_src2), INVSI (FLD (f_src1)));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* andnot2: andnot $src1, $lit2, $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,andnot2) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul2.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = ANDSI (FLD (f_src2), INVSI (* FLD (i_src1)));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* andnot3: andnot $lit1, $lit2, $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,andnot3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul3.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = ANDSI (FLD (f_src2), INVSI (FLD (f_src1)));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* setbit: setbit $src1, $src2, $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,setbit) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = ORSI (SLLSI (1, * FLD (i_src1)), * FLD (i_src2));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* setbit1: setbit $lit1, $src2, $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,setbit1) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul1.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = ORSI (SLLSI (1, FLD (f_src1)), * FLD (i_src2));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* setbit2: setbit $src1, $lit2, $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,setbit2) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul2.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = ORSI (SLLSI (1, * FLD (i_src1)), FLD (f_src2));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* setbit3: setbit $lit1, $lit2, $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,setbit3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul3.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = ORSI (SLLSI (1, FLD (f_src1)), FLD (f_src2));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* notand: notand $src1, $src2, $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,notand) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = ANDSI (INVSI (* FLD (i_src2)), * FLD (i_src1));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* notand1: notand $lit1, $src2, $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,notand1) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul1.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = ANDSI (INVSI (* FLD (i_src2)), FLD (f_src1));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* notand2: notand $src1, $lit2, $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,notand2) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul2.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = ANDSI (INVSI (FLD (f_src2)), * FLD (i_src1));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* notand3: notand $lit1, $lit2, $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,notand3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul3.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = ANDSI (INVSI (FLD (f_src2)), FLD (f_src1));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* xor: xor $src1, $src2, $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,xor) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = XORSI (* FLD (i_src1), * FLD (i_src2));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* xor1: xor $lit1, $src2, $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,xor1) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul1.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = XORSI (FLD (f_src1), * FLD (i_src2));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* xor2: xor $src1, $lit2, $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,xor2) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul2.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = XORSI (* FLD (i_src1), FLD (f_src2));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* xor3: xor $lit1, $lit2, $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,xor3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul3.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = XORSI (FLD (f_src1), FLD (f_src2));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* or: or $src1, $src2, $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,or) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = ORSI (* FLD (i_src1), * FLD (i_src2));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* or1: or $lit1, $src2, $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,or1) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul1.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = ORSI (FLD (f_src1), * FLD (i_src2));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* or2: or $src1, $lit2, $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,or2) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul2.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = ORSI (* FLD (i_src1), FLD (f_src2));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* or3: or $lit1, $lit2, $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,or3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul3.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = ORSI (FLD (f_src1), FLD (f_src2));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* nor: nor $src1, $src2, $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,nor) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = ANDSI (INVSI (* FLD (i_src2)), INVSI (* FLD (i_src1)));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* nor1: nor $lit1, $src2, $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,nor1) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul1.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = ANDSI (INVSI (* FLD (i_src2)), INVSI (FLD (f_src1)));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* nor2: nor $src1, $lit2, $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,nor2) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul2.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = ANDSI (INVSI (FLD (f_src2)), INVSI (* FLD (i_src1)));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* nor3: nor $lit1, $lit2, $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,nor3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul3.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = ANDSI (INVSI (FLD (f_src2)), INVSI (FLD (f_src1)));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* xnor: xnor $src1, $src2, $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,xnor) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = INVSI (XORSI (* FLD (i_src1), * FLD (i_src2)));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* xnor1: xnor $lit1, $src2, $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,xnor1) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul1.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = INVSI (XORSI (FLD (f_src1), * FLD (i_src2)));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* xnor2: xnor $src1, $lit2, $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,xnor2) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul2.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = INVSI (XORSI (* FLD (i_src1), FLD (f_src2)));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* xnor3: xnor $lit1, $lit2, $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,xnor3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul3.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = INVSI (XORSI (FLD (f_src1), FLD (f_src2)));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* not: not $src1, $src2, $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,not) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul2.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = INVSI (* FLD (i_src1));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* not1: not $lit1, $src2, $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,not1) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul3.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = INVSI (FLD (f_src1));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* not2: not $src1, $lit2, $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,not2) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul2.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = INVSI (* FLD (i_src1));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* not3: not $lit1, $lit2, $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,not3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul3.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = INVSI (FLD (f_src1));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* ornot: ornot $src1, $src2, $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,ornot) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = ORSI (* FLD (i_src2), INVSI (* FLD (i_src1)));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* ornot1: ornot $lit1, $src2, $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,ornot1) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul1.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = ORSI (* FLD (i_src2), INVSI (FLD (f_src1)));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* ornot2: ornot $src1, $lit2, $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,ornot2) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul2.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = ORSI (FLD (f_src2), INVSI (* FLD (i_src1)));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* ornot3: ornot $lit1, $lit2, $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,ornot3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul3.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = ORSI (FLD (f_src2), INVSI (FLD (f_src1)));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* clrbit: clrbit $src1, $src2, $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,clrbit) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = ANDSI (INVSI (SLLSI (1, * FLD (i_src1))), * FLD (i_src2));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* clrbit1: clrbit $lit1, $src2, $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,clrbit1) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul1.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = ANDSI (INVSI (SLLSI (1, FLD (f_src1))), * FLD (i_src2));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* clrbit2: clrbit $src1, $lit2, $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,clrbit2) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul2.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = ANDSI (INVSI (SLLSI (1, * FLD (i_src1))), FLD (f_src2));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* clrbit3: clrbit $lit1, $lit2, $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,clrbit3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul3.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = ANDSI (INVSI (SLLSI (1, FLD (f_src1))), FLD (f_src2));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* shlo: shlo $src1, $src2, $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,shlo) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = (GEUSI (* FLD (i_src1), 32)) ? (0) : (SLLSI (* FLD (i_src2), * FLD (i_src1)));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* shlo1: shlo $lit1, $src2, $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,shlo1) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul1.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = (GEUSI (FLD (f_src1), 32)) ? (0) : (SLLSI (* FLD (i_src2), FLD (f_src1)));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* shlo2: shlo $src1, $lit2, $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,shlo2) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul2.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = (GEUSI (* FLD (i_src1), 32)) ? (0) : (SLLSI (FLD (f_src2), * FLD (i_src1)));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* shlo3: shlo $lit1, $lit2, $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,shlo3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul3.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = (GEUSI (FLD (f_src1), 32)) ? (0) : (SLLSI (FLD (f_src2), FLD (f_src1)));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* shro: shro $src1, $src2, $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,shro) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = (GEUSI (* FLD (i_src1), 32)) ? (0) : (SRLSI (* FLD (i_src2), * FLD (i_src1)));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* shro1: shro $lit1, $src2, $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,shro1) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul1.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = (GEUSI (FLD (f_src1), 32)) ? (0) : (SRLSI (* FLD (i_src2), FLD (f_src1)));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* shro2: shro $src1, $lit2, $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,shro2) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul2.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = (GEUSI (* FLD (i_src1), 32)) ? (0) : (SRLSI (FLD (f_src2), * FLD (i_src1)));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* shro3: shro $lit1, $lit2, $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,shro3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul3.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = (GEUSI (FLD (f_src1), 32)) ? (0) : (SRLSI (FLD (f_src2), FLD (f_src1)));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* shli: shli $src1, $src2, $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,shli) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = (GEUSI (* FLD (i_src1), 32)) ? (0) : (SLLSI (* FLD (i_src2), * FLD (i_src1)));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* shli1: shli $lit1, $src2, $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,shli1) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul1.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = (GEUSI (FLD (f_src1), 32)) ? (0) : (SLLSI (* FLD (i_src2), FLD (f_src1)));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* shli2: shli $src1, $lit2, $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,shli2) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul2.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = (GEUSI (* FLD (i_src1), 32)) ? (0) : (SLLSI (FLD (f_src2), * FLD (i_src1)));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* shli3: shli $lit1, $lit2, $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,shli3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul3.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = (GEUSI (FLD (f_src1), 32)) ? (0) : (SLLSI (FLD (f_src2), FLD (f_src1)));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* shri: shri $src1, $src2, $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,shri) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = (GEUSI (* FLD (i_src1), 32)) ? (SRASI (* FLD (i_src2), 31)) : (SRASI (* FLD (i_src2), * FLD (i_src1)));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* shri1: shri $lit1, $src2, $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,shri1) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul1.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = (GEUSI (FLD (f_src1), 32)) ? (SRASI (* FLD (i_src2), 31)) : (SRASI (* FLD (i_src2), FLD (f_src1)));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* shri2: shri $src1, $lit2, $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,shri2) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul2.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = (GEUSI (* FLD (i_src1), 32)) ? (SRASI (FLD (f_src2), 31)) : (SRASI (FLD (f_src2), * FLD (i_src1)));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* shri3: shri $lit1, $lit2, $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,shri3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul3.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = (GEUSI (FLD (f_src1), 32)) ? (SRASI (FLD (f_src2), 31)) : (SRASI (FLD (f_src2), FLD (f_src1)));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* emul: emul $src1, $src2, $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,emul) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-{
- DI tmp_temp;
- SI tmp_dregno;
- tmp_temp = MULDI (ZEXTSIDI (* FLD (i_src1)), ZEXTSIDI (* FLD (i_src2)));
- tmp_dregno = FLD (f_srcdst);
- {
- SI opval = TRUNCDISI (tmp_temp);
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
- {
- SI opval = TRUNCDISI (SRLDI (tmp_temp, 32));
- CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval);
- }
-}
-
- return vpc;
-#undef FLD
-}
-
-/* emul1: emul $lit1, $src2, $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,emul1) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul1.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-{
- DI tmp_temp;
- SI tmp_dregno;
- tmp_temp = MULDI (ZEXTSIDI (FLD (f_src1)), ZEXTSIDI (* FLD (i_src2)));
- tmp_dregno = FLD (f_srcdst);
- {
- SI opval = TRUNCDISI (tmp_temp);
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
- {
- SI opval = TRUNCDISI (SRLDI (tmp_temp, 32));
- CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval);
- }
-}
-
- return vpc;
-#undef FLD
-}
-
-/* emul2: emul $src1, $lit2, $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,emul2) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul2.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-{
- DI tmp_temp;
- SI tmp_dregno;
- tmp_temp = MULDI (ZEXTSIDI (* FLD (i_src1)), ZEXTSIDI (FLD (f_src2)));
- tmp_dregno = FLD (f_srcdst);
- {
- SI opval = TRUNCDISI (tmp_temp);
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
- {
- SI opval = TRUNCDISI (SRLDI (tmp_temp, 32));
- CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval);
- }
-}
-
- return vpc;
-#undef FLD
-}
-
-/* emul3: emul $lit1, $lit2, $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,emul3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul3.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-{
- DI tmp_temp;
- SI tmp_dregno;
- tmp_temp = MULDI (ZEXTSIDI (FLD (f_src1)), ZEXTSIDI (FLD (f_src2)));
- tmp_dregno = FLD (f_srcdst);
- {
- SI opval = TRUNCDISI (tmp_temp);
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
- {
- SI opval = TRUNCDISI (SRLDI (tmp_temp, 32));
- CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval);
- }
-}
-
- return vpc;
-#undef FLD
-}
-
-/* mov: mov $src1, $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,mov) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul2.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = * FLD (i_src1);
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* mov1: mov $lit1, $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,mov1) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul3.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = FLD (f_src1);
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* movl: movl $src1, $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,movl) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_movq.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-{
- SI tmp_dregno;
- SI tmp_sregno;
- tmp_dregno = FLD (f_srcdst);
- tmp_sregno = FLD (f_src1);
- {
- SI opval = * FLD (i_src1);
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
- {
- SI opval = CPU (h_gr[((FLD (f_src1)) + (1))]);
- CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval);
- }
-}
-
- return vpc;
-#undef FLD
-}
-
-/* movl1: movl $lit1, $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,movl1) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul3.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-{
- SI tmp_dregno;
- tmp_dregno = FLD (f_srcdst);
- {
- SI opval = FLD (f_src1);
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
- {
- SI opval = 0;
- CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval);
- }
-}
-
- return vpc;
-#undef FLD
-}
-
-/* movt: movt $src1, $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,movt) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_movq.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-{
- SI tmp_dregno;
- SI tmp_sregno;
- tmp_dregno = FLD (f_srcdst);
- tmp_sregno = FLD (f_src1);
- {
- SI opval = * FLD (i_src1);
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
- {
- SI opval = CPU (h_gr[((FLD (f_src1)) + (1))]);
- CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval);
- }
- {
- SI opval = CPU (h_gr[((FLD (f_src1)) + (2))]);
- CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-2", 'x', opval);
- }
-}
-
- return vpc;
-#undef FLD
-}
-
-/* movt1: movt $lit1, $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,movt1) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_movq.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-{
- SI tmp_dregno;
- tmp_dregno = FLD (f_srcdst);
- {
- SI opval = FLD (f_src1);
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
- {
- SI opval = 0;
- CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval);
- }
- {
- SI opval = 0;
- CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-2", 'x', opval);
- }
-}
-
- return vpc;
-#undef FLD
-}
-
-/* movq: movq $src1, $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,movq) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_movq.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-{
- SI tmp_dregno;
- SI tmp_sregno;
- tmp_dregno = FLD (f_srcdst);
- tmp_sregno = FLD (f_src1);
- {
- SI opval = * FLD (i_src1);
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
- {
- SI opval = CPU (h_gr[((FLD (f_src1)) + (1))]);
- CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval);
- }
- {
- SI opval = CPU (h_gr[((FLD (f_src1)) + (2))]);
- CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-2", 'x', opval);
- }
- {
- SI opval = CPU (h_gr[((FLD (f_src1)) + (3))]);
- CPU (h_gr[((FLD (f_srcdst)) + (3))]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-3", 'x', opval);
- }
-}
-
- return vpc;
-#undef FLD
-}
-
-/* movq1: movq $lit1, $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,movq1) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_movq.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-{
- SI tmp_dregno;
- tmp_dregno = FLD (f_srcdst);
- {
- SI opval = FLD (f_src1);
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
- {
- SI opval = 0;
- CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval);
- }
- {
- SI opval = 0;
- CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-2", 'x', opval);
- }
- {
- SI opval = 0;
- CPU (h_gr[((FLD (f_srcdst)) + (3))]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-3", 'x', opval);
- }
-}
-
- return vpc;
-#undef FLD
-}
-
-/* modpc: modpc $src1, $src2, $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,modpc) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul1.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = * FLD (i_src2);
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* modac: modac $src1, $src2, $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,modac) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul1.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = * FLD (i_src2);
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* lda-offset: lda $offset, $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,lda_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = FLD (f_offset);
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* lda-indirect-offset: lda $offset($abase), $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,lda_indirect_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = ADDSI (FLD (f_offset), * FLD (i_abase));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* lda-indirect: lda ($abase), $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,lda_indirect) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = * FLD (i_abase);
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* lda-indirect-index: lda ($abase)[$index*S$scale], $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,lda_indirect_index) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* lda-disp: lda $optdisp, $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,lda_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
-
- {
- SI opval = FLD (f_optdisp);
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* lda-indirect-disp: lda $optdisp($abase), $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,lda_indirect_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
-
- {
- SI opval = ADDSI (FLD (f_optdisp), * FLD (i_abase));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* lda-index-disp: lda $optdisp[$index*S$scale], $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,lda_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
-
- {
- SI opval = ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* lda-indirect-index-disp: lda $optdisp($abase)[$index*S$scale], $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,lda_indirect_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
-
- {
- SI opval = ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* ld-offset: ld $offset, $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,ld_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = GETMEMSI (current_cpu, pc, FLD (f_offset));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* ld-indirect-offset: ld $offset($abase), $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,ld_indirect_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = GETMEMSI (current_cpu, pc, ADDSI (FLD (f_offset), * FLD (i_abase)));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* ld-indirect: ld ($abase), $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,ld_indirect) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = GETMEMSI (current_cpu, pc, * FLD (i_abase));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* ld-indirect-index: ld ($abase)[$index*S$scale], $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,ld_indirect_index) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = GETMEMSI (current_cpu, pc, ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* ld-disp: ld $optdisp, $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,ld_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
-
- {
- SI opval = GETMEMSI (current_cpu, pc, FLD (f_optdisp));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* ld-indirect-disp: ld $optdisp($abase), $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,ld_indirect_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
-
- {
- SI opval = GETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), * FLD (i_abase)));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* ld-index-disp: ld $optdisp[$index*S$scale], $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,ld_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
-
- {
- SI opval = GETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* ld-indirect-index-disp: ld $optdisp($abase)[$index*S$scale], $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,ld_indirect_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
-
- {
- SI opval = GETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* ldob-offset: ldob $offset, $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,ldob_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = GETMEMUQI (current_cpu, pc, FLD (f_offset));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* ldob-indirect-offset: ldob $offset($abase), $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,ldob_indirect_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = GETMEMUQI (current_cpu, pc, ADDSI (FLD (f_offset), * FLD (i_abase)));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* ldob-indirect: ldob ($abase), $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,ldob_indirect) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = GETMEMUQI (current_cpu, pc, * FLD (i_abase));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* ldob-indirect-index: ldob ($abase)[$index*S$scale], $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,ldob_indirect_index) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = GETMEMUQI (current_cpu, pc, ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* ldob-disp: ldob $optdisp, $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,ldob_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
-
- {
- SI opval = GETMEMUQI (current_cpu, pc, FLD (f_optdisp));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* ldob-indirect-disp: ldob $optdisp($abase), $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,ldob_indirect_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
-
- {
- SI opval = GETMEMUQI (current_cpu, pc, ADDSI (FLD (f_optdisp), * FLD (i_abase)));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* ldob-index-disp: ldob $optdisp[$index*S$scale], $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,ldob_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
-
- {
- SI opval = GETMEMUQI (current_cpu, pc, ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* ldob-indirect-index-disp: ldob $optdisp($abase)[$index*S$scale], $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,ldob_indirect_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
-
- {
- SI opval = GETMEMUQI (current_cpu, pc, ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* ldos-offset: ldos $offset, $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,ldos_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = GETMEMUHI (current_cpu, pc, FLD (f_offset));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* ldos-indirect-offset: ldos $offset($abase), $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,ldos_indirect_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = GETMEMUHI (current_cpu, pc, ADDSI (FLD (f_offset), * FLD (i_abase)));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* ldos-indirect: ldos ($abase), $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,ldos_indirect) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = GETMEMUHI (current_cpu, pc, * FLD (i_abase));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* ldos-indirect-index: ldos ($abase)[$index*S$scale], $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,ldos_indirect_index) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = GETMEMUHI (current_cpu, pc, ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* ldos-disp: ldos $optdisp, $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,ldos_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
-
- {
- SI opval = GETMEMUHI (current_cpu, pc, FLD (f_optdisp));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* ldos-indirect-disp: ldos $optdisp($abase), $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,ldos_indirect_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
-
- {
- SI opval = GETMEMUHI (current_cpu, pc, ADDSI (FLD (f_optdisp), * FLD (i_abase)));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* ldos-index-disp: ldos $optdisp[$index*S$scale], $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,ldos_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
-
- {
- SI opval = GETMEMUHI (current_cpu, pc, ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* ldos-indirect-index-disp: ldos $optdisp($abase)[$index*S$scale], $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,ldos_indirect_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
-
- {
- SI opval = GETMEMUHI (current_cpu, pc, ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* ldib-offset: ldib $offset, $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,ldib_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = GETMEMQI (current_cpu, pc, FLD (f_offset));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* ldib-indirect-offset: ldib $offset($abase), $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,ldib_indirect_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = GETMEMQI (current_cpu, pc, ADDSI (FLD (f_offset), * FLD (i_abase)));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* ldib-indirect: ldib ($abase), $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,ldib_indirect) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = GETMEMQI (current_cpu, pc, * FLD (i_abase));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* ldib-indirect-index: ldib ($abase)[$index*S$scale], $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,ldib_indirect_index) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = GETMEMQI (current_cpu, pc, ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* ldib-disp: ldib $optdisp, $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,ldib_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
-
- {
- SI opval = GETMEMQI (current_cpu, pc, FLD (f_optdisp));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* ldib-indirect-disp: ldib $optdisp($abase), $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,ldib_indirect_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
-
- {
- SI opval = GETMEMQI (current_cpu, pc, ADDSI (FLD (f_optdisp), * FLD (i_abase)));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* ldib-index-disp: ldib $optdisp[$index*S$scale], $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,ldib_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
-
- {
- SI opval = GETMEMQI (current_cpu, pc, ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* ldib-indirect-index-disp: ldib $optdisp($abase)[$index*S$scale], $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,ldib_indirect_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
-
- {
- SI opval = GETMEMQI (current_cpu, pc, ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* ldis-offset: ldis $offset, $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,ldis_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = GETMEMHI (current_cpu, pc, FLD (f_offset));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* ldis-indirect-offset: ldis $offset($abase), $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,ldis_indirect_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = GETMEMHI (current_cpu, pc, ADDSI (FLD (f_offset), * FLD (i_abase)));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* ldis-indirect: ldis ($abase), $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,ldis_indirect) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = GETMEMHI (current_cpu, pc, * FLD (i_abase));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* ldis-indirect-index: ldis ($abase)[$index*S$scale], $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,ldis_indirect_index) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = GETMEMHI (current_cpu, pc, ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* ldis-disp: ldis $optdisp, $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,ldis_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
-
- {
- SI opval = GETMEMHI (current_cpu, pc, FLD (f_optdisp));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* ldis-indirect-disp: ldis $optdisp($abase), $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,ldis_indirect_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
-
- {
- SI opval = GETMEMHI (current_cpu, pc, ADDSI (FLD (f_optdisp), * FLD (i_abase)));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* ldis-index-disp: ldis $optdisp[$index*S$scale], $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,ldis_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
-
- {
- SI opval = GETMEMHI (current_cpu, pc, ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* ldis-indirect-index-disp: ldis $optdisp($abase)[$index*S$scale], $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,ldis_indirect_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
-
- {
- SI opval = GETMEMHI (current_cpu, pc, ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))));
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* ldl-offset: ldl $offset, $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,ldl_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-{
- SI tmp_temp;
- SI tmp_dregno;
- tmp_dregno = FLD (f_srcdst);
- tmp_temp = FLD (f_offset);
- {
- SI opval = GETMEMSI (current_cpu, pc, tmp_temp);
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
- {
- SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4));
- CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval);
- }
-}
-
- return vpc;
-#undef FLD
-}
-
-/* ldl-indirect-offset: ldl $offset($abase), $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,ldl_indirect_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-{
- SI tmp_temp;
- SI tmp_dregno;
- tmp_dregno = FLD (f_srcdst);
- tmp_temp = ADDSI (FLD (f_offset), * FLD (i_abase));
- {
- SI opval = GETMEMSI (current_cpu, pc, tmp_temp);
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
- {
- SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4));
- CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval);
- }
-}
-
- return vpc;
-#undef FLD
-}
-
-/* ldl-indirect: ldl ($abase), $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,ldl_indirect) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-{
- SI tmp_temp;
- SI tmp_dregno;
- tmp_dregno = FLD (f_srcdst);
- tmp_temp = * FLD (i_abase);
- {
- SI opval = GETMEMSI (current_cpu, pc, tmp_temp);
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
- {
- SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4));
- CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval);
- }
-}
-
- return vpc;
-#undef FLD
-}
-
-/* ldl-indirect-index: ldl ($abase)[$index*S$scale], $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,ldl_indirect_index) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-{
- SI tmp_temp;
- SI tmp_dregno;
- tmp_dregno = FLD (f_srcdst);
- tmp_temp = ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))));
- {
- SI opval = GETMEMSI (current_cpu, pc, tmp_temp);
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
- {
- SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4));
- CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval);
- }
-}
-
- return vpc;
-#undef FLD
-}
-
-/* ldl-disp: ldl $optdisp, $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,ldl_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
-
-{
- SI tmp_temp;
- SI tmp_dregno;
- tmp_dregno = FLD (f_srcdst);
- tmp_temp = FLD (f_optdisp);
- {
- SI opval = GETMEMSI (current_cpu, pc, tmp_temp);
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
- {
- SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4));
- CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval);
- }
-}
-
- return vpc;
-#undef FLD
-}
-
-/* ldl-indirect-disp: ldl $optdisp($abase), $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,ldl_indirect_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
-
-{
- SI tmp_temp;
- SI tmp_dregno;
- tmp_dregno = FLD (f_srcdst);
- tmp_temp = ADDSI (FLD (f_optdisp), * FLD (i_abase));
- {
- SI opval = GETMEMSI (current_cpu, pc, tmp_temp);
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
- {
- SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4));
- CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval);
- }
-}
-
- return vpc;
-#undef FLD
-}
-
-/* ldl-index-disp: ldl $optdisp[$index*S$scale], $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,ldl_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
-
-{
- SI tmp_temp;
- SI tmp_dregno;
- tmp_dregno = FLD (f_srcdst);
- tmp_temp = ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))));
- {
- SI opval = GETMEMSI (current_cpu, pc, tmp_temp);
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
- {
- SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4));
- CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval);
- }
-}
-
- return vpc;
-#undef FLD
-}
-
-/* ldl-indirect-index-disp: ldl $optdisp($abase)[$index*S$scale], $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,ldl_indirect_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
-
-{
- SI tmp_temp;
- SI tmp_dregno;
- tmp_dregno = FLD (f_srcdst);
- tmp_temp = ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))));
- {
- SI opval = GETMEMSI (current_cpu, pc, tmp_temp);
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
- {
- SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4));
- CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval);
- }
-}
-
- return vpc;
-#undef FLD
-}
-
-/* ldt-offset: ldt $offset, $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,ldt_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-{
- SI tmp_temp;
- SI tmp_dregno;
- tmp_dregno = FLD (f_srcdst);
- tmp_temp = FLD (f_offset);
- {
- SI opval = GETMEMSI (current_cpu, pc, tmp_temp);
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
- {
- SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4));
- CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval);
- }
- {
- SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 8));
- CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-2", 'x', opval);
- }
-}
-
- return vpc;
-#undef FLD
-}
-
-/* ldt-indirect-offset: ldt $offset($abase), $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,ldt_indirect_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-{
- SI tmp_temp;
- SI tmp_dregno;
- tmp_dregno = FLD (f_srcdst);
- tmp_temp = ADDSI (FLD (f_offset), * FLD (i_abase));
- {
- SI opval = GETMEMSI (current_cpu, pc, tmp_temp);
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
- {
- SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4));
- CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval);
- }
- {
- SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 8));
- CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-2", 'x', opval);
- }
-}
-
- return vpc;
-#undef FLD
-}
-
-/* ldt-indirect: ldt ($abase), $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,ldt_indirect) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-{
- SI tmp_temp;
- SI tmp_dregno;
- tmp_dregno = FLD (f_srcdst);
- tmp_temp = * FLD (i_abase);
- {
- SI opval = GETMEMSI (current_cpu, pc, tmp_temp);
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
- {
- SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4));
- CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval);
- }
- {
- SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 8));
- CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-2", 'x', opval);
- }
-}
-
- return vpc;
-#undef FLD
-}
-
-/* ldt-indirect-index: ldt ($abase)[$index*S$scale], $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,ldt_indirect_index) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-{
- SI tmp_temp;
- SI tmp_dregno;
- tmp_dregno = FLD (f_srcdst);
- tmp_temp = ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))));
- {
- SI opval = GETMEMSI (current_cpu, pc, tmp_temp);
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
- {
- SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4));
- CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval);
- }
- {
- SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 8));
- CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-2", 'x', opval);
- }
-}
-
- return vpc;
-#undef FLD
-}
-
-/* ldt-disp: ldt $optdisp, $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,ldt_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
-
-{
- SI tmp_temp;
- SI tmp_dregno;
- tmp_dregno = FLD (f_srcdst);
- tmp_temp = FLD (f_optdisp);
- {
- SI opval = GETMEMSI (current_cpu, pc, tmp_temp);
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
- {
- SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4));
- CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval);
- }
- {
- SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 8));
- CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-2", 'x', opval);
- }
-}
-
- return vpc;
-#undef FLD
-}
-
-/* ldt-indirect-disp: ldt $optdisp($abase), $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,ldt_indirect_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
-
-{
- SI tmp_temp;
- SI tmp_dregno;
- tmp_dregno = FLD (f_srcdst);
- tmp_temp = ADDSI (FLD (f_optdisp), * FLD (i_abase));
- {
- SI opval = GETMEMSI (current_cpu, pc, tmp_temp);
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
- {
- SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4));
- CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval);
- }
- {
- SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 8));
- CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-2", 'x', opval);
- }
-}
-
- return vpc;
-#undef FLD
-}
-
-/* ldt-index-disp: ldt $optdisp[$index*S$scale], $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,ldt_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
-
-{
- SI tmp_temp;
- SI tmp_dregno;
- tmp_dregno = FLD (f_srcdst);
- tmp_temp = ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))));
- {
- SI opval = GETMEMSI (current_cpu, pc, tmp_temp);
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
- {
- SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4));
- CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval);
- }
- {
- SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 8));
- CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-2", 'x', opval);
- }
-}
-
- return vpc;
-#undef FLD
-}
-
-/* ldt-indirect-index-disp: ldt $optdisp($abase)[$index*S$scale], $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,ldt_indirect_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
-
-{
- SI tmp_temp;
- SI tmp_dregno;
- tmp_dregno = FLD (f_srcdst);
- tmp_temp = ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))));
- {
- SI opval = GETMEMSI (current_cpu, pc, tmp_temp);
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
- {
- SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4));
- CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval);
- }
- {
- SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 8));
- CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-2", 'x', opval);
- }
-}
-
- return vpc;
-#undef FLD
-}
-
-/* ldq-offset: ldq $offset, $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,ldq_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-{
- SI tmp_temp;
- SI tmp_dregno;
- tmp_dregno = FLD (f_srcdst);
- tmp_temp = FLD (f_offset);
- {
- SI opval = GETMEMSI (current_cpu, pc, tmp_temp);
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
- {
- SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4));
- CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval);
- }
- {
- SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 8));
- CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-2", 'x', opval);
- }
- {
- SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 12));
- CPU (h_gr[((FLD (f_srcdst)) + (3))]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-3", 'x', opval);
- }
-}
-
- return vpc;
-#undef FLD
-}
-
-/* ldq-indirect-offset: ldq $offset($abase), $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,ldq_indirect_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-{
- SI tmp_temp;
- SI tmp_dregno;
- tmp_dregno = FLD (f_srcdst);
- tmp_temp = ADDSI (FLD (f_offset), * FLD (i_abase));
- {
- SI opval = GETMEMSI (current_cpu, pc, tmp_temp);
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
- {
- SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4));
- CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval);
- }
- {
- SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 8));
- CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-2", 'x', opval);
- }
- {
- SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 12));
- CPU (h_gr[((FLD (f_srcdst)) + (3))]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-3", 'x', opval);
- }
-}
-
- return vpc;
-#undef FLD
-}
-
-/* ldq-indirect: ldq ($abase), $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,ldq_indirect) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-{
- SI tmp_temp;
- SI tmp_dregno;
- tmp_dregno = FLD (f_srcdst);
- tmp_temp = * FLD (i_abase);
- {
- SI opval = GETMEMSI (current_cpu, pc, tmp_temp);
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
- {
- SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4));
- CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval);
- }
- {
- SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 8));
- CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-2", 'x', opval);
- }
- {
- SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 12));
- CPU (h_gr[((FLD (f_srcdst)) + (3))]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-3", 'x', opval);
- }
-}
-
- return vpc;
-#undef FLD
-}
-
-/* ldq-indirect-index: ldq ($abase)[$index*S$scale], $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,ldq_indirect_index) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-{
- SI tmp_temp;
- SI tmp_dregno;
- tmp_dregno = FLD (f_srcdst);
- tmp_temp = ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))));
- {
- SI opval = GETMEMSI (current_cpu, pc, tmp_temp);
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
- {
- SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4));
- CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval);
- }
- {
- SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 8));
- CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-2", 'x', opval);
- }
- {
- SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 12));
- CPU (h_gr[((FLD (f_srcdst)) + (3))]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-3", 'x', opval);
- }
-}
-
- return vpc;
-#undef FLD
-}
-
-/* ldq-disp: ldq $optdisp, $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,ldq_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
-
-{
- SI tmp_temp;
- SI tmp_dregno;
- tmp_dregno = FLD (f_srcdst);
- tmp_temp = FLD (f_optdisp);
- {
- SI opval = GETMEMSI (current_cpu, pc, tmp_temp);
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
- {
- SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4));
- CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval);
- }
- {
- SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 8));
- CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-2", 'x', opval);
- }
- {
- SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 12));
- CPU (h_gr[((FLD (f_srcdst)) + (3))]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-3", 'x', opval);
- }
-}
-
- return vpc;
-#undef FLD
-}
-
-/* ldq-indirect-disp: ldq $optdisp($abase), $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,ldq_indirect_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
-
-{
- SI tmp_temp;
- SI tmp_dregno;
- tmp_dregno = FLD (f_srcdst);
- tmp_temp = ADDSI (FLD (f_optdisp), * FLD (i_abase));
- {
- SI opval = GETMEMSI (current_cpu, pc, tmp_temp);
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
- {
- SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4));
- CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval);
- }
- {
- SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 8));
- CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-2", 'x', opval);
- }
- {
- SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 12));
- CPU (h_gr[((FLD (f_srcdst)) + (3))]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-3", 'x', opval);
- }
-}
-
- return vpc;
-#undef FLD
-}
-
-/* ldq-index-disp: ldq $optdisp[$index*S$scale], $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,ldq_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
-
-{
- SI tmp_temp;
- SI tmp_dregno;
- tmp_dregno = FLD (f_srcdst);
- tmp_temp = ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))));
- {
- SI opval = GETMEMSI (current_cpu, pc, tmp_temp);
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
- {
- SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4));
- CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval);
- }
- {
- SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 8));
- CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-2", 'x', opval);
- }
- {
- SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 12));
- CPU (h_gr[((FLD (f_srcdst)) + (3))]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-3", 'x', opval);
- }
-}
-
- return vpc;
-#undef FLD
-}
-
-/* ldq-indirect-index-disp: ldq $optdisp($abase)[$index*S$scale], $dst */
-
-static SEM_PC
-SEM_FN_NAME (i960base,ldq_indirect_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
-
-{
- SI tmp_temp;
- SI tmp_dregno;
- tmp_dregno = FLD (f_srcdst);
- tmp_temp = ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))));
- {
- SI opval = GETMEMSI (current_cpu, pc, tmp_temp);
- * FLD (i_dst) = opval;
- TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);
- }
- {
- SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4));
- CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-1", 'x', opval);
- }
- {
- SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 8));
- CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-2", 'x', opval);
- }
- {
- SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 12));
- CPU (h_gr[((FLD (f_srcdst)) + (3))]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-add--DFLT-index-of--DFLT-dst-3", 'x', opval);
- }
-}
-
- return vpc;
-#undef FLD
-}
-
-/* st-offset: st $st_src, $offset */
-
-static SEM_PC
-SEM_FN_NAME (i960base,st_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = * FLD (i_st_src);
- SETMEMSI (current_cpu, pc, FLD (f_offset), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* st-indirect-offset: st $st_src, $offset($abase) */
-
-static SEM_PC
-SEM_FN_NAME (i960base,st_indirect_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = * FLD (i_st_src);
- SETMEMSI (current_cpu, pc, ADDSI (FLD (f_offset), * FLD (i_abase)), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* st-indirect: st $st_src, ($abase) */
-
-static SEM_PC
-SEM_FN_NAME (i960base,st_indirect) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = * FLD (i_st_src);
- SETMEMSI (current_cpu, pc, * FLD (i_abase), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* st-indirect-index: st $st_src, ($abase)[$index*S$scale] */
-
-static SEM_PC
-SEM_FN_NAME (i960base,st_indirect_index) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = * FLD (i_st_src);
- SETMEMSI (current_cpu, pc, ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* st-disp: st $st_src, $optdisp */
-
-static SEM_PC
-SEM_FN_NAME (i960base,st_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
-
- {
- SI opval = * FLD (i_st_src);
- SETMEMSI (current_cpu, pc, FLD (f_optdisp), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* st-indirect-disp: st $st_src, $optdisp($abase) */
-
-static SEM_PC
-SEM_FN_NAME (i960base,st_indirect_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
-
- {
- SI opval = * FLD (i_st_src);
- SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), * FLD (i_abase)), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* st-index-disp: st $st_src, $optdisp[$index*S$scale */
-
-static SEM_PC
-SEM_FN_NAME (i960base,st_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
-
- {
- SI opval = * FLD (i_st_src);
- SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* st-indirect-index-disp: st $st_src, $optdisp($abase)[$index*S$scale] */
-
-static SEM_PC
-SEM_FN_NAME (i960base,st_indirect_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
-
- {
- SI opval = * FLD (i_st_src);
- SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* stob-offset: stob $st_src, $offset */
-
-static SEM_PC
-SEM_FN_NAME (i960base,stob_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- QI opval = * FLD (i_st_src);
- SETMEMQI (current_cpu, pc, FLD (f_offset), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* stob-indirect-offset: stob $st_src, $offset($abase) */
-
-static SEM_PC
-SEM_FN_NAME (i960base,stob_indirect_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- QI opval = * FLD (i_st_src);
- SETMEMQI (current_cpu, pc, ADDSI (FLD (f_offset), * FLD (i_abase)), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* stob-indirect: stob $st_src, ($abase) */
-
-static SEM_PC
-SEM_FN_NAME (i960base,stob_indirect) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- QI opval = * FLD (i_st_src);
- SETMEMQI (current_cpu, pc, * FLD (i_abase), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* stob-indirect-index: stob $st_src, ($abase)[$index*S$scale] */
-
-static SEM_PC
-SEM_FN_NAME (i960base,stob_indirect_index) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- QI opval = * FLD (i_st_src);
- SETMEMQI (current_cpu, pc, ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* stob-disp: stob $st_src, $optdisp */
-
-static SEM_PC
-SEM_FN_NAME (i960base,stob_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
-
- {
- QI opval = * FLD (i_st_src);
- SETMEMQI (current_cpu, pc, FLD (f_optdisp), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* stob-indirect-disp: stob $st_src, $optdisp($abase) */
-
-static SEM_PC
-SEM_FN_NAME (i960base,stob_indirect_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
-
- {
- QI opval = * FLD (i_st_src);
- SETMEMQI (current_cpu, pc, ADDSI (FLD (f_optdisp), * FLD (i_abase)), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* stob-index-disp: stob $st_src, $optdisp[$index*S$scale */
-
-static SEM_PC
-SEM_FN_NAME (i960base,stob_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
-
- {
- QI opval = * FLD (i_st_src);
- SETMEMQI (current_cpu, pc, ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* stob-indirect-index-disp: stob $st_src, $optdisp($abase)[$index*S$scale] */
-
-static SEM_PC
-SEM_FN_NAME (i960base,stob_indirect_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
-
- {
- QI opval = * FLD (i_st_src);
- SETMEMQI (current_cpu, pc, ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* stos-offset: stos $st_src, $offset */
-
-static SEM_PC
-SEM_FN_NAME (i960base,stos_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- HI opval = * FLD (i_st_src);
- SETMEMHI (current_cpu, pc, FLD (f_offset), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* stos-indirect-offset: stos $st_src, $offset($abase) */
-
-static SEM_PC
-SEM_FN_NAME (i960base,stos_indirect_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- HI opval = * FLD (i_st_src);
- SETMEMHI (current_cpu, pc, ADDSI (FLD (f_offset), * FLD (i_abase)), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* stos-indirect: stos $st_src, ($abase) */
-
-static SEM_PC
-SEM_FN_NAME (i960base,stos_indirect) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- HI opval = * FLD (i_st_src);
- SETMEMHI (current_cpu, pc, * FLD (i_abase), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* stos-indirect-index: stos $st_src, ($abase)[$index*S$scale] */
-
-static SEM_PC
-SEM_FN_NAME (i960base,stos_indirect_index) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- HI opval = * FLD (i_st_src);
- SETMEMHI (current_cpu, pc, ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* stos-disp: stos $st_src, $optdisp */
-
-static SEM_PC
-SEM_FN_NAME (i960base,stos_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
-
- {
- HI opval = * FLD (i_st_src);
- SETMEMHI (current_cpu, pc, FLD (f_optdisp), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* stos-indirect-disp: stos $st_src, $optdisp($abase) */
-
-static SEM_PC
-SEM_FN_NAME (i960base,stos_indirect_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
-
- {
- HI opval = * FLD (i_st_src);
- SETMEMHI (current_cpu, pc, ADDSI (FLD (f_optdisp), * FLD (i_abase)), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* stos-index-disp: stos $st_src, $optdisp[$index*S$scale */
-
-static SEM_PC
-SEM_FN_NAME (i960base,stos_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
-
- {
- HI opval = * FLD (i_st_src);
- SETMEMHI (current_cpu, pc, ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* stos-indirect-index-disp: stos $st_src, $optdisp($abase)[$index*S$scale] */
-
-static SEM_PC
-SEM_FN_NAME (i960base,stos_indirect_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
-
- {
- HI opval = * FLD (i_st_src);
- SETMEMHI (current_cpu, pc, ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* stl-offset: stl $st_src, $offset */
-
-static SEM_PC
-SEM_FN_NAME (i960base,stl_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-{
- SI tmp_sregno;
- tmp_sregno = FLD (f_srcdst);
- {
- SI opval = * FLD (i_st_src);
- SETMEMSI (current_cpu, pc, FLD (f_offset), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
- {
- SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]);
- SETMEMSI (current_cpu, pc, ADDSI (FLD (f_offset), 4), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-}
-
- return vpc;
-#undef FLD
-}
-
-/* stl-indirect-offset: stl $st_src, $offset($abase) */
-
-static SEM_PC
-SEM_FN_NAME (i960base,stl_indirect_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-{
- SI tmp_sregno;
- tmp_sregno = FLD (f_srcdst);
- {
- SI opval = * FLD (i_st_src);
- SETMEMSI (current_cpu, pc, ADDSI (FLD (f_offset), * FLD (i_abase)), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
- {
- SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]);
- SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_offset), * FLD (i_abase)), 4), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-}
-
- return vpc;
-#undef FLD
-}
-
-/* stl-indirect: stl $st_src, ($abase) */
-
-static SEM_PC
-SEM_FN_NAME (i960base,stl_indirect) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-{
- SI tmp_sregno;
- tmp_sregno = FLD (f_srcdst);
- {
- SI opval = * FLD (i_st_src);
- SETMEMSI (current_cpu, pc, * FLD (i_abase), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
- {
- SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]);
- SETMEMSI (current_cpu, pc, ADDSI (* FLD (i_abase), 4), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-}
-
- return vpc;
-#undef FLD
-}
-
-/* stl-indirect-index: stl $st_src, ($abase)[$index*S$scale] */
-
-static SEM_PC
-SEM_FN_NAME (i960base,stl_indirect_index) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-{
- SI tmp_sregno;
- tmp_sregno = FLD (f_srcdst);
- {
- SI opval = * FLD (i_st_src);
- SETMEMSI (current_cpu, pc, ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
- {
- SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]);
- SETMEMSI (current_cpu, pc, ADDSI (ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), 4), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-}
-
- return vpc;
-#undef FLD
-}
-
-/* stl-disp: stl $st_src, $optdisp */
-
-static SEM_PC
-SEM_FN_NAME (i960base,stl_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
-
-{
- SI tmp_sregno;
- tmp_sregno = FLD (f_srcdst);
- {
- SI opval = * FLD (i_st_src);
- SETMEMSI (current_cpu, pc, FLD (f_optdisp), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
- {
- SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]);
- SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), 4), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-}
-
- return vpc;
-#undef FLD
-}
-
-/* stl-indirect-disp: stl $st_src, $optdisp($abase) */
-
-static SEM_PC
-SEM_FN_NAME (i960base,stl_indirect_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
-
-{
- SI tmp_sregno;
- tmp_sregno = FLD (f_srcdst);
- {
- SI opval = * FLD (i_st_src);
- SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), * FLD (i_abase)), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
- {
- SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]);
- SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), * FLD (i_abase)), 4), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-}
-
- return vpc;
-#undef FLD
-}
-
-/* stl-index-disp: stl $st_src, $optdisp[$index*S$scale */
-
-static SEM_PC
-SEM_FN_NAME (i960base,stl_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
-
-{
- SI tmp_sregno;
- tmp_sregno = FLD (f_srcdst);
- {
- SI opval = * FLD (i_st_src);
- SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
- {
- SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]);
- SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), 4), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-}
-
- return vpc;
-#undef FLD
-}
-
-/* stl-indirect-index-disp: stl $st_src, $optdisp($abase)[$index*S$scale] */
-
-static SEM_PC
-SEM_FN_NAME (i960base,stl_indirect_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
-
-{
- SI tmp_sregno;
- tmp_sregno = FLD (f_srcdst);
- {
- SI opval = * FLD (i_st_src);
- SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
- {
- SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]);
- SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))), 4), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-}
-
- return vpc;
-#undef FLD
-}
-
-/* stt-offset: stt $st_src, $offset */
-
-static SEM_PC
-SEM_FN_NAME (i960base,stt_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-{
- SI tmp_sregno;
- tmp_sregno = FLD (f_srcdst);
- {
- SI opval = * FLD (i_st_src);
- SETMEMSI (current_cpu, pc, FLD (f_offset), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
- {
- SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]);
- SETMEMSI (current_cpu, pc, ADDSI (FLD (f_offset), 4), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
- {
- SI opval = CPU (h_gr[((FLD (f_srcdst)) + (2))]);
- SETMEMSI (current_cpu, pc, ADDSI (FLD (f_offset), 8), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-}
-
- return vpc;
-#undef FLD
-}
-
-/* stt-indirect-offset: stt $st_src, $offset($abase) */
-
-static SEM_PC
-SEM_FN_NAME (i960base,stt_indirect_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-{
- SI tmp_sregno;
- tmp_sregno = FLD (f_srcdst);
- {
- SI opval = * FLD (i_st_src);
- SETMEMSI (current_cpu, pc, ADDSI (FLD (f_offset), * FLD (i_abase)), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
- {
- SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]);
- SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_offset), * FLD (i_abase)), 4), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
- {
- SI opval = CPU (h_gr[((FLD (f_srcdst)) + (2))]);
- SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_offset), * FLD (i_abase)), 8), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-}
-
- return vpc;
-#undef FLD
-}
-
-/* stt-indirect: stt $st_src, ($abase) */
-
-static SEM_PC
-SEM_FN_NAME (i960base,stt_indirect) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-{
- SI tmp_sregno;
- tmp_sregno = FLD (f_srcdst);
- {
- SI opval = * FLD (i_st_src);
- SETMEMSI (current_cpu, pc, * FLD (i_abase), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
- {
- SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]);
- SETMEMSI (current_cpu, pc, ADDSI (* FLD (i_abase), 4), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
- {
- SI opval = CPU (h_gr[((FLD (f_srcdst)) + (2))]);
- SETMEMSI (current_cpu, pc, ADDSI (* FLD (i_abase), 8), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-}
-
- return vpc;
-#undef FLD
-}
-
-/* stt-indirect-index: stt $st_src, ($abase)[$index*S$scale] */
-
-static SEM_PC
-SEM_FN_NAME (i960base,stt_indirect_index) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-{
- SI tmp_sregno;
- tmp_sregno = FLD (f_srcdst);
- {
- SI opval = * FLD (i_st_src);
- SETMEMSI (current_cpu, pc, ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
- {
- SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]);
- SETMEMSI (current_cpu, pc, ADDSI (ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), 4), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
- {
- SI opval = CPU (h_gr[((FLD (f_srcdst)) + (2))]);
- SETMEMSI (current_cpu, pc, ADDSI (ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), 8), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-}
-
- return vpc;
-#undef FLD
-}
-
-/* stt-disp: stt $st_src, $optdisp */
-
-static SEM_PC
-SEM_FN_NAME (i960base,stt_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
-
-{
- SI tmp_sregno;
- tmp_sregno = FLD (f_srcdst);
- {
- SI opval = * FLD (i_st_src);
- SETMEMSI (current_cpu, pc, FLD (f_optdisp), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
- {
- SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]);
- SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), 4), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
- {
- SI opval = CPU (h_gr[((FLD (f_srcdst)) + (2))]);
- SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), 8), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-}
-
- return vpc;
-#undef FLD
-}
-
-/* stt-indirect-disp: stt $st_src, $optdisp($abase) */
-
-static SEM_PC
-SEM_FN_NAME (i960base,stt_indirect_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
-
-{
- SI tmp_sregno;
- tmp_sregno = FLD (f_srcdst);
- {
- SI opval = * FLD (i_st_src);
- SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), * FLD (i_abase)), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
- {
- SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]);
- SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), * FLD (i_abase)), 4), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
- {
- SI opval = CPU (h_gr[((FLD (f_srcdst)) + (2))]);
- SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), * FLD (i_abase)), 8), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-}
-
- return vpc;
-#undef FLD
-}
-
-/* stt-index-disp: stt $st_src, $optdisp[$index*S$scale */
-
-static SEM_PC
-SEM_FN_NAME (i960base,stt_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
-
-{
- SI tmp_sregno;
- tmp_sregno = FLD (f_srcdst);
- {
- SI opval = * FLD (i_st_src);
- SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
- {
- SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]);
- SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), 4), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
- {
- SI opval = CPU (h_gr[((FLD (f_srcdst)) + (2))]);
- SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), 8), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-}
-
- return vpc;
-#undef FLD
-}
-
-/* stt-indirect-index-disp: stt $st_src, $optdisp($abase)[$index*S$scale] */
-
-static SEM_PC
-SEM_FN_NAME (i960base,stt_indirect_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
-
-{
- SI tmp_sregno;
- tmp_sregno = FLD (f_srcdst);
- {
- SI opval = * FLD (i_st_src);
- SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
- {
- SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]);
- SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))), 4), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
- {
- SI opval = CPU (h_gr[((FLD (f_srcdst)) + (2))]);
- SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))), 8), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-}
-
- return vpc;
-#undef FLD
-}
-
-/* stq-offset: stq $st_src, $offset */
-
-static SEM_PC
-SEM_FN_NAME (i960base,stq_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-{
- SI tmp_sregno;
- tmp_sregno = FLD (f_srcdst);
- {
- SI opval = * FLD (i_st_src);
- SETMEMSI (current_cpu, pc, FLD (f_offset), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
- {
- SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]);
- SETMEMSI (current_cpu, pc, ADDSI (FLD (f_offset), 4), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
- {
- SI opval = CPU (h_gr[((FLD (f_srcdst)) + (2))]);
- SETMEMSI (current_cpu, pc, ADDSI (FLD (f_offset), 8), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
- {
- SI opval = CPU (h_gr[((FLD (f_srcdst)) + (3))]);
- SETMEMSI (current_cpu, pc, ADDSI (FLD (f_offset), 12), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-}
-
- return vpc;
-#undef FLD
-}
-
-/* stq-indirect-offset: stq $st_src, $offset($abase) */
-
-static SEM_PC
-SEM_FN_NAME (i960base,stq_indirect_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-{
- SI tmp_sregno;
- tmp_sregno = FLD (f_srcdst);
- {
- SI opval = * FLD (i_st_src);
- SETMEMSI (current_cpu, pc, ADDSI (FLD (f_offset), * FLD (i_abase)), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
- {
- SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]);
- SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_offset), * FLD (i_abase)), 4), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
- {
- SI opval = CPU (h_gr[((FLD (f_srcdst)) + (2))]);
- SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_offset), * FLD (i_abase)), 8), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
- {
- SI opval = CPU (h_gr[((FLD (f_srcdst)) + (3))]);
- SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_offset), * FLD (i_abase)), 12), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-}
-
- return vpc;
-#undef FLD
-}
-
-/* stq-indirect: stq $st_src, ($abase) */
-
-static SEM_PC
-SEM_FN_NAME (i960base,stq_indirect) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-{
- SI tmp_sregno;
- tmp_sregno = FLD (f_srcdst);
- {
- SI opval = * FLD (i_st_src);
- SETMEMSI (current_cpu, pc, * FLD (i_abase), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
- {
- SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]);
- SETMEMSI (current_cpu, pc, ADDSI (* FLD (i_abase), 4), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
- {
- SI opval = CPU (h_gr[((FLD (f_srcdst)) + (2))]);
- SETMEMSI (current_cpu, pc, ADDSI (* FLD (i_abase), 8), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
- {
- SI opval = CPU (h_gr[((FLD (f_srcdst)) + (3))]);
- SETMEMSI (current_cpu, pc, ADDSI (* FLD (i_abase), 12), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-}
-
- return vpc;
-#undef FLD
-}
-
-/* stq-indirect-index: stq $st_src, ($abase)[$index*S$scale] */
-
-static SEM_PC
-SEM_FN_NAME (i960base,stq_indirect_index) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-{
- SI tmp_sregno;
- tmp_sregno = FLD (f_srcdst);
- {
- SI opval = * FLD (i_st_src);
- SETMEMSI (current_cpu, pc, ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
- {
- SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]);
- SETMEMSI (current_cpu, pc, ADDSI (ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), 4), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
- {
- SI opval = CPU (h_gr[((FLD (f_srcdst)) + (2))]);
- SETMEMSI (current_cpu, pc, ADDSI (ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), 8), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
- {
- SI opval = CPU (h_gr[((FLD (f_srcdst)) + (3))]);
- SETMEMSI (current_cpu, pc, ADDSI (ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), 12), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-}
-
- return vpc;
-#undef FLD
-}
-
-/* stq-disp: stq $st_src, $optdisp */
-
-static SEM_PC
-SEM_FN_NAME (i960base,stq_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
-
-{
- SI tmp_sregno;
- tmp_sregno = FLD (f_srcdst);
- {
- SI opval = * FLD (i_st_src);
- SETMEMSI (current_cpu, pc, FLD (f_optdisp), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
- {
- SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]);
- SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), 4), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
- {
- SI opval = CPU (h_gr[((FLD (f_srcdst)) + (2))]);
- SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), 8), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
- {
- SI opval = CPU (h_gr[((FLD (f_srcdst)) + (3))]);
- SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), 12), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-}
-
- return vpc;
-#undef FLD
-}
-
-/* stq-indirect-disp: stq $st_src, $optdisp($abase) */
-
-static SEM_PC
-SEM_FN_NAME (i960base,stq_indirect_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
-
-{
- SI tmp_sregno;
- tmp_sregno = FLD (f_srcdst);
- {
- SI opval = * FLD (i_st_src);
- SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), * FLD (i_abase)), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
- {
- SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]);
- SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), * FLD (i_abase)), 4), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
- {
- SI opval = CPU (h_gr[((FLD (f_srcdst)) + (2))]);
- SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), * FLD (i_abase)), 8), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
- {
- SI opval = CPU (h_gr[((FLD (f_srcdst)) + (3))]);
- SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), * FLD (i_abase)), 12), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-}
-
- return vpc;
-#undef FLD
-}
-
-/* stq-index-disp: stq $st_src, $optdisp[$index*S$scale */
-
-static SEM_PC
-SEM_FN_NAME (i960base,stq_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
-
-{
- SI tmp_sregno;
- tmp_sregno = FLD (f_srcdst);
- {
- SI opval = * FLD (i_st_src);
- SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
- {
- SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]);
- SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), 4), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
- {
- SI opval = CPU (h_gr[((FLD (f_srcdst)) + (2))]);
- SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), 8), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
- {
- SI opval = CPU (h_gr[((FLD (f_srcdst)) + (3))]);
- SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), 12), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-}
-
- return vpc;
-#undef FLD
-}
-
-/* stq-indirect-index-disp: stq $st_src, $optdisp($abase)[$index*S$scale] */
-
-static SEM_PC
-SEM_FN_NAME (i960base,stq_indirect_index_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
-
-{
- SI tmp_sregno;
- tmp_sregno = FLD (f_srcdst);
- {
- SI opval = * FLD (i_st_src);
- SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
- {
- SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]);
- SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))), 4), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
- {
- SI opval = CPU (h_gr[((FLD (f_srcdst)) + (2))]);
- SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))), 8), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
- {
- SI opval = CPU (h_gr[((FLD (f_srcdst)) + (3))]);
- SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))), 12), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-}
-
- return vpc;
-#undef FLD
-}
-
-/* cmpobe-reg: cmpobe $br_src1, $br_src2, $br_disp */
-
-static SEM_PC
-SEM_FN_NAME (i960base,cmpobe_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-if (EQSI (* FLD (i_br_src1), * FLD (i_br_src2))) {
- {
- USI opval = FLD (i_br_disp);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 3);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
- return vpc;
-#undef FLD
-}
-
-/* cmpobe-lit: cmpobe $br_lit1, $br_src2, $br_disp */
-
-static SEM_PC
-SEM_FN_NAME (i960base,cmpobe_lit) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-if (EQSI (FLD (f_br_src1), * FLD (i_br_src2))) {
- {
- USI opval = FLD (i_br_disp);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 3);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
- return vpc;
-#undef FLD
-}
-
-/* cmpobne-reg: cmpobne $br_src1, $br_src2, $br_disp */
-
-static SEM_PC
-SEM_FN_NAME (i960base,cmpobne_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-if (NESI (* FLD (i_br_src1), * FLD (i_br_src2))) {
- {
- USI opval = FLD (i_br_disp);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 3);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
- return vpc;
-#undef FLD
-}
-
-/* cmpobne-lit: cmpobne $br_lit1, $br_src2, $br_disp */
-
-static SEM_PC
-SEM_FN_NAME (i960base,cmpobne_lit) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-if (NESI (FLD (f_br_src1), * FLD (i_br_src2))) {
- {
- USI opval = FLD (i_br_disp);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 3);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
- return vpc;
-#undef FLD
-}
-
-/* cmpobl-reg: cmpobl $br_src1, $br_src2, $br_disp */
-
-static SEM_PC
-SEM_FN_NAME (i960base,cmpobl_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-if (LTUSI (* FLD (i_br_src1), * FLD (i_br_src2))) {
- {
- USI opval = FLD (i_br_disp);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 3);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
- return vpc;
-#undef FLD
-}
-
-/* cmpobl-lit: cmpobl $br_lit1, $br_src2, $br_disp */
-
-static SEM_PC
-SEM_FN_NAME (i960base,cmpobl_lit) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-if (LTUSI (FLD (f_br_src1), * FLD (i_br_src2))) {
- {
- USI opval = FLD (i_br_disp);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 3);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
- return vpc;
-#undef FLD
-}
-
-/* cmpoble-reg: cmpoble $br_src1, $br_src2, $br_disp */
-
-static SEM_PC
-SEM_FN_NAME (i960base,cmpoble_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-if (LEUSI (* FLD (i_br_src1), * FLD (i_br_src2))) {
- {
- USI opval = FLD (i_br_disp);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 3);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
- return vpc;
-#undef FLD
-}
-
-/* cmpoble-lit: cmpoble $br_lit1, $br_src2, $br_disp */
-
-static SEM_PC
-SEM_FN_NAME (i960base,cmpoble_lit) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-if (LEUSI (FLD (f_br_src1), * FLD (i_br_src2))) {
- {
- USI opval = FLD (i_br_disp);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 3);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
- return vpc;
-#undef FLD
-}
-
-/* cmpobg-reg: cmpobg $br_src1, $br_src2, $br_disp */
-
-static SEM_PC
-SEM_FN_NAME (i960base,cmpobg_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-if (GTUSI (* FLD (i_br_src1), * FLD (i_br_src2))) {
- {
- USI opval = FLD (i_br_disp);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 3);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
- return vpc;
-#undef FLD
-}
-
-/* cmpobg-lit: cmpobg $br_lit1, $br_src2, $br_disp */
-
-static SEM_PC
-SEM_FN_NAME (i960base,cmpobg_lit) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-if (GTUSI (FLD (f_br_src1), * FLD (i_br_src2))) {
- {
- USI opval = FLD (i_br_disp);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 3);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
- return vpc;
-#undef FLD
-}
-
-/* cmpobge-reg: cmpobge $br_src1, $br_src2, $br_disp */
-
-static SEM_PC
-SEM_FN_NAME (i960base,cmpobge_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-if (GEUSI (* FLD (i_br_src1), * FLD (i_br_src2))) {
- {
- USI opval = FLD (i_br_disp);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 3);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
- return vpc;
-#undef FLD
-}
-
-/* cmpobge-lit: cmpobge $br_lit1, $br_src2, $br_disp */
-
-static SEM_PC
-SEM_FN_NAME (i960base,cmpobge_lit) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-if (GEUSI (FLD (f_br_src1), * FLD (i_br_src2))) {
- {
- USI opval = FLD (i_br_disp);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 3);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
- return vpc;
-#undef FLD
-}
-
-/* cmpibe-reg: cmpibe $br_src1, $br_src2, $br_disp */
-
-static SEM_PC
-SEM_FN_NAME (i960base,cmpibe_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-if (EQSI (* FLD (i_br_src1), * FLD (i_br_src2))) {
- {
- USI opval = FLD (i_br_disp);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 3);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
- return vpc;
-#undef FLD
-}
-
-/* cmpibe-lit: cmpibe $br_lit1, $br_src2, $br_disp */
-
-static SEM_PC
-SEM_FN_NAME (i960base,cmpibe_lit) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-if (EQSI (FLD (f_br_src1), * FLD (i_br_src2))) {
- {
- USI opval = FLD (i_br_disp);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 3);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
- return vpc;
-#undef FLD
-}
-
-/* cmpibne-reg: cmpibne $br_src1, $br_src2, $br_disp */
-
-static SEM_PC
-SEM_FN_NAME (i960base,cmpibne_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-if (NESI (* FLD (i_br_src1), * FLD (i_br_src2))) {
- {
- USI opval = FLD (i_br_disp);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 3);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
- return vpc;
-#undef FLD
-}
-
-/* cmpibne-lit: cmpibne $br_lit1, $br_src2, $br_disp */
-
-static SEM_PC
-SEM_FN_NAME (i960base,cmpibne_lit) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-if (NESI (FLD (f_br_src1), * FLD (i_br_src2))) {
- {
- USI opval = FLD (i_br_disp);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 3);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
- return vpc;
-#undef FLD
-}
-
-/* cmpibl-reg: cmpibl $br_src1, $br_src2, $br_disp */
-
-static SEM_PC
-SEM_FN_NAME (i960base,cmpibl_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-if (LTSI (* FLD (i_br_src1), * FLD (i_br_src2))) {
- {
- USI opval = FLD (i_br_disp);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 3);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
- return vpc;
-#undef FLD
-}
-
-/* cmpibl-lit: cmpibl $br_lit1, $br_src2, $br_disp */
-
-static SEM_PC
-SEM_FN_NAME (i960base,cmpibl_lit) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-if (LTSI (FLD (f_br_src1), * FLD (i_br_src2))) {
- {
- USI opval = FLD (i_br_disp);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 3);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
- return vpc;
-#undef FLD
-}
-
-/* cmpible-reg: cmpible $br_src1, $br_src2, $br_disp */
-
-static SEM_PC
-SEM_FN_NAME (i960base,cmpible_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-if (LESI (* FLD (i_br_src1), * FLD (i_br_src2))) {
- {
- USI opval = FLD (i_br_disp);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 3);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
- return vpc;
-#undef FLD
-}
-
-/* cmpible-lit: cmpible $br_lit1, $br_src2, $br_disp */
-
-static SEM_PC
-SEM_FN_NAME (i960base,cmpible_lit) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-if (LESI (FLD (f_br_src1), * FLD (i_br_src2))) {
- {
- USI opval = FLD (i_br_disp);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 3);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
- return vpc;
-#undef FLD
-}
-
-/* cmpibg-reg: cmpibg $br_src1, $br_src2, $br_disp */
-
-static SEM_PC
-SEM_FN_NAME (i960base,cmpibg_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-if (GTSI (* FLD (i_br_src1), * FLD (i_br_src2))) {
- {
- USI opval = FLD (i_br_disp);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 3);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
- return vpc;
-#undef FLD
-}
-
-/* cmpibg-lit: cmpibg $br_lit1, $br_src2, $br_disp */
-
-static SEM_PC
-SEM_FN_NAME (i960base,cmpibg_lit) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-if (GTSI (FLD (f_br_src1), * FLD (i_br_src2))) {
- {
- USI opval = FLD (i_br_disp);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 3);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
- return vpc;
-#undef FLD
-}
-
-/* cmpibge-reg: cmpibge $br_src1, $br_src2, $br_disp */
-
-static SEM_PC
-SEM_FN_NAME (i960base,cmpibge_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-if (GESI (* FLD (i_br_src1), * FLD (i_br_src2))) {
- {
- USI opval = FLD (i_br_disp);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 3);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
- return vpc;
-#undef FLD
-}
-
-/* cmpibge-lit: cmpibge $br_lit1, $br_src2, $br_disp */
-
-static SEM_PC
-SEM_FN_NAME (i960base,cmpibge_lit) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-if (GESI (FLD (f_br_src1), * FLD (i_br_src2))) {
- {
- USI opval = FLD (i_br_disp);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 3);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
- return vpc;
-#undef FLD
-}
-
-/* bbc-reg: bbc $br_src1, $br_src2, $br_disp */
-
-static SEM_PC
-SEM_FN_NAME (i960base,bbc_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-if (EQSI (ANDSI (SLLSI (1, * FLD (i_br_src1)), * FLD (i_br_src2)), 0)) {
- {
- USI opval = FLD (i_br_disp);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 3);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
- return vpc;
-#undef FLD
-}
-
-/* bbc-lit: bbc $br_lit1, $br_src2, $br_disp */
-
-static SEM_PC
-SEM_FN_NAME (i960base,bbc_lit) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-if (EQSI (ANDSI (SLLSI (1, FLD (f_br_src1)), * FLD (i_br_src2)), 0)) {
- {
- USI opval = FLD (i_br_disp);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 3);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
- return vpc;
-#undef FLD
-}
-
-/* bbs-reg: bbs $br_src1, $br_src2, $br_disp */
-
-static SEM_PC
-SEM_FN_NAME (i960base,bbs_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_cmpobe_reg.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-if (NESI (ANDSI (SLLSI (1, * FLD (i_br_src1)), * FLD (i_br_src2)), 0)) {
- {
- USI opval = FLD (i_br_disp);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 3);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
- return vpc;
-#undef FLD
-}
-
-/* bbs-lit: bbs $br_lit1, $br_src2, $br_disp */
-
-static SEM_PC
-SEM_FN_NAME (i960base,bbs_lit) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_cmpobe_lit.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-if (NESI (ANDSI (SLLSI (1, FLD (f_br_src1)), * FLD (i_br_src2)), 0)) {
- {
- USI opval = FLD (i_br_disp);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 3);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
- return vpc;
-#undef FLD
-}
-
-/* cmpi: cmpi $src1, $src2 */
-
-static SEM_PC
-SEM_FN_NAME (i960base,cmpi) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = (LTSI (* FLD (i_src1), * FLD (i_src2))) ? (4) : (EQSI (* FLD (i_src1), * FLD (i_src2))) ? (2) : (1);
- CPU (h_cc) = opval;
- TRACE_RESULT (current_cpu, abuf, "cc", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* cmpi1: cmpi $lit1, $src2 */
-
-static SEM_PC
-SEM_FN_NAME (i960base,cmpi1) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul1.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = (LTSI (FLD (f_src1), * FLD (i_src2))) ? (4) : (EQSI (FLD (f_src1), * FLD (i_src2))) ? (2) : (1);
- CPU (h_cc) = opval;
- TRACE_RESULT (current_cpu, abuf, "cc", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* cmpi2: cmpi $src1, $lit2 */
-
-static SEM_PC
-SEM_FN_NAME (i960base,cmpi2) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul2.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = (LTSI (* FLD (i_src1), FLD (f_src2))) ? (4) : (EQSI (* FLD (i_src1), FLD (f_src2))) ? (2) : (1);
- CPU (h_cc) = opval;
- TRACE_RESULT (current_cpu, abuf, "cc", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* cmpi3: cmpi $lit1, $lit2 */
-
-static SEM_PC
-SEM_FN_NAME (i960base,cmpi3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul3.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = (LTSI (FLD (f_src1), FLD (f_src2))) ? (4) : (EQSI (FLD (f_src1), FLD (f_src2))) ? (2) : (1);
- CPU (h_cc) = opval;
- TRACE_RESULT (current_cpu, abuf, "cc", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* cmpo: cmpo $src1, $src2 */
-
-static SEM_PC
-SEM_FN_NAME (i960base,cmpo) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = (LTUSI (* FLD (i_src1), * FLD (i_src2))) ? (4) : (EQSI (* FLD (i_src1), * FLD (i_src2))) ? (2) : (1);
- CPU (h_cc) = opval;
- TRACE_RESULT (current_cpu, abuf, "cc", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* cmpo1: cmpo $lit1, $src2 */
-
-static SEM_PC
-SEM_FN_NAME (i960base,cmpo1) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul1.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = (LTUSI (FLD (f_src1), * FLD (i_src2))) ? (4) : (EQSI (FLD (f_src1), * FLD (i_src2))) ? (2) : (1);
- CPU (h_cc) = opval;
- TRACE_RESULT (current_cpu, abuf, "cc", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* cmpo2: cmpo $src1, $lit2 */
-
-static SEM_PC
-SEM_FN_NAME (i960base,cmpo2) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul2.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = (LTUSI (* FLD (i_src1), FLD (f_src2))) ? (4) : (EQSI (* FLD (i_src1), FLD (f_src2))) ? (2) : (1);
- CPU (h_cc) = opval;
- TRACE_RESULT (current_cpu, abuf, "cc", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* cmpo3: cmpo $lit1, $lit2 */
-
-static SEM_PC
-SEM_FN_NAME (i960base,cmpo3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul3.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = (LTUSI (FLD (f_src1), FLD (f_src2))) ? (4) : (EQSI (FLD (f_src1), FLD (f_src2))) ? (2) : (1);
- CPU (h_cc) = opval;
- TRACE_RESULT (current_cpu, abuf, "cc", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* testno-reg: testno $br_src1 */
-
-static SEM_PC
-SEM_FN_NAME (i960base,testno_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_testno_reg.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = EQSI (CPU (h_cc), 0);
- * FLD (i_br_src1) = opval;
- TRACE_RESULT (current_cpu, abuf, "br_src1", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* testg-reg: testg $br_src1 */
-
-static SEM_PC
-SEM_FN_NAME (i960base,testg_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_testno_reg.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = NESI (ANDSI (CPU (h_cc), 1), 0);
- * FLD (i_br_src1) = opval;
- TRACE_RESULT (current_cpu, abuf, "br_src1", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* teste-reg: teste $br_src1 */
-
-static SEM_PC
-SEM_FN_NAME (i960base,teste_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_testno_reg.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = NESI (ANDSI (CPU (h_cc), 2), 0);
- * FLD (i_br_src1) = opval;
- TRACE_RESULT (current_cpu, abuf, "br_src1", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* testge-reg: testge $br_src1 */
-
-static SEM_PC
-SEM_FN_NAME (i960base,testge_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_testno_reg.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = NESI (ANDSI (CPU (h_cc), 3), 0);
- * FLD (i_br_src1) = opval;
- TRACE_RESULT (current_cpu, abuf, "br_src1", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* testl-reg: testl $br_src1 */
-
-static SEM_PC
-SEM_FN_NAME (i960base,testl_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_testno_reg.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = NESI (ANDSI (CPU (h_cc), 4), 0);
- * FLD (i_br_src1) = opval;
- TRACE_RESULT (current_cpu, abuf, "br_src1", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* testne-reg: testne $br_src1 */
-
-static SEM_PC
-SEM_FN_NAME (i960base,testne_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_testno_reg.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = NESI (ANDSI (CPU (h_cc), 5), 0);
- * FLD (i_br_src1) = opval;
- TRACE_RESULT (current_cpu, abuf, "br_src1", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* testle-reg: testle $br_src1 */
-
-static SEM_PC
-SEM_FN_NAME (i960base,testle_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_testno_reg.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = NESI (ANDSI (CPU (h_cc), 6), 0);
- * FLD (i_br_src1) = opval;
- TRACE_RESULT (current_cpu, abuf, "br_src1", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* testo-reg: testo $br_src1 */
-
-static SEM_PC
-SEM_FN_NAME (i960base,testo_reg) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_testno_reg.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = NESI (ANDSI (CPU (h_cc), 7), 0);
- * FLD (i_br_src1) = opval;
- TRACE_RESULT (current_cpu, abuf, "br_src1", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* bno: bno $ctrl_disp */
-
-static SEM_PC
-SEM_FN_NAME (i960base,bno) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_bno.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-if (EQSI (CPU (h_cc), 0)) {
- {
- USI opval = FLD (i_ctrl_disp);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 2);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
- return vpc;
-#undef FLD
-}
-
-/* bg: bg $ctrl_disp */
-
-static SEM_PC
-SEM_FN_NAME (i960base,bg) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_bno.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-if (NESI (ANDSI (CPU (h_cc), 1), 0)) {
- {
- USI opval = FLD (i_ctrl_disp);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 2);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
- return vpc;
-#undef FLD
-}
-
-/* be: be $ctrl_disp */
-
-static SEM_PC
-SEM_FN_NAME (i960base,be) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_bno.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-if (NESI (ANDSI (CPU (h_cc), 2), 0)) {
- {
- USI opval = FLD (i_ctrl_disp);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 2);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
- return vpc;
-#undef FLD
-}
-
-/* bge: bge $ctrl_disp */
-
-static SEM_PC
-SEM_FN_NAME (i960base,bge) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_bno.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-if (NESI (ANDSI (CPU (h_cc), 3), 0)) {
- {
- USI opval = FLD (i_ctrl_disp);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 2);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
- return vpc;
-#undef FLD
-}
-
-/* bl: bl $ctrl_disp */
-
-static SEM_PC
-SEM_FN_NAME (i960base,bl) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_bno.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-if (NESI (ANDSI (CPU (h_cc), 4), 0)) {
- {
- USI opval = FLD (i_ctrl_disp);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 2);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
- return vpc;
-#undef FLD
-}
-
-/* bne: bne $ctrl_disp */
-
-static SEM_PC
-SEM_FN_NAME (i960base,bne) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_bno.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-if (NESI (ANDSI (CPU (h_cc), 5), 0)) {
- {
- USI opval = FLD (i_ctrl_disp);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 2);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
- return vpc;
-#undef FLD
-}
-
-/* ble: ble $ctrl_disp */
-
-static SEM_PC
-SEM_FN_NAME (i960base,ble) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_bno.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-if (NESI (ANDSI (CPU (h_cc), 6), 0)) {
- {
- USI opval = FLD (i_ctrl_disp);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 2);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
- return vpc;
-#undef FLD
-}
-
-/* bo: bo $ctrl_disp */
-
-static SEM_PC
-SEM_FN_NAME (i960base,bo) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_bno.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-if (NESI (ANDSI (CPU (h_cc), 7), 0)) {
- {
- USI opval = FLD (i_ctrl_disp);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 2);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
- return vpc;
-#undef FLD
-}
-
-/* b: b $ctrl_disp */
-
-static SEM_PC
-SEM_FN_NAME (i960base,b) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_bno.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- USI opval = FLD (i_ctrl_disp);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-
- SEM_BRANCH_FINI (vpc);
- return vpc;
-#undef FLD
-}
-
-/* bx-indirect-offset: bx $offset($abase) */
-
-static SEM_PC
-SEM_FN_NAME (i960base,bx_indirect_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- USI opval = ADDSI (FLD (f_offset), * FLD (i_abase));
- SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-
- SEM_BRANCH_FINI (vpc);
- return vpc;
-#undef FLD
-}
-
-/* bx-indirect: bx ($abase) */
-
-static SEM_PC
-SEM_FN_NAME (i960base,bx_indirect) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- USI opval = * FLD (i_abase);
- SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-
- SEM_BRANCH_FINI (vpc);
- return vpc;
-#undef FLD
-}
-
-/* bx-indirect-index: bx ($abase)[$index*S$scale] */
-
-static SEM_PC
-SEM_FN_NAME (i960base,bx_indirect_index) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- USI opval = ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))));
- SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-
- SEM_BRANCH_FINI (vpc);
- return vpc;
-#undef FLD
-}
-
-/* bx-disp: bx $optdisp */
-
-static SEM_PC
-SEM_FN_NAME (i960base,bx_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
-
- {
- USI opval = FLD (f_optdisp);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-
- SEM_BRANCH_FINI (vpc);
- return vpc;
-#undef FLD
-}
-
-/* bx-indirect-disp: bx $optdisp($abase) */
-
-static SEM_PC
-SEM_FN_NAME (i960base,bx_indirect_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
-
- {
- USI opval = ADDSI (FLD (f_optdisp), * FLD (i_abase));
- SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-
- SEM_BRANCH_FINI (vpc);
- return vpc;
-#undef FLD
-}
-
-/* callx-disp: callx $optdisp */
-
-static SEM_PC
-SEM_FN_NAME (i960base,callx_disp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_callx_disp.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 8);
-
-{
- SI tmp_temp;
- tmp_temp = ANDSI (ADDSI (CPU (h_gr[((UINT) 1)]), 63), INVSI (63));
- {
- SI opval = ADDSI (pc, 8);
- CPU (h_gr[((UINT) 2)]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-2", 'x', opval);
- }
-SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 0), CPU (h_gr[((UINT) 0)]));
-SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 4), CPU (h_gr[((UINT) 1)]));
-SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 8), CPU (h_gr[((UINT) 2)]));
-SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 12), CPU (h_gr[((UINT) 3)]));
-SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 16), CPU (h_gr[((UINT) 4)]));
-SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 20), CPU (h_gr[((UINT) 5)]));
-SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 24), CPU (h_gr[((UINT) 6)]));
-SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 28), CPU (h_gr[((UINT) 7)]));
-SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 32), CPU (h_gr[((UINT) 8)]));
-SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 36), CPU (h_gr[((UINT) 9)]));
-SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 40), CPU (h_gr[((UINT) 10)]));
-SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 44), CPU (h_gr[((UINT) 11)]));
-SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 48), CPU (h_gr[((UINT) 12)]));
-SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 52), CPU (h_gr[((UINT) 13)]));
-SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 56), CPU (h_gr[((UINT) 14)]));
-SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 60), CPU (h_gr[((UINT) 15)]));
- {
- USI opval = FLD (f_optdisp);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-CPU (h_gr[((UINT) 0)]) = 0xdeadbeef;
-CPU (h_gr[((UINT) 1)]) = 0xdeadbeef;
-CPU (h_gr[((UINT) 2)]) = 0xdeadbeef;
-CPU (h_gr[((UINT) 3)]) = 0xdeadbeef;
-CPU (h_gr[((UINT) 4)]) = 0xdeadbeef;
-CPU (h_gr[((UINT) 5)]) = 0xdeadbeef;
-CPU (h_gr[((UINT) 6)]) = 0xdeadbeef;
-CPU (h_gr[((UINT) 7)]) = 0xdeadbeef;
-CPU (h_gr[((UINT) 8)]) = 0xdeadbeef;
-CPU (h_gr[((UINT) 9)]) = 0xdeadbeef;
-CPU (h_gr[((UINT) 10)]) = 0xdeadbeef;
-CPU (h_gr[((UINT) 11)]) = 0xdeadbeef;
-CPU (h_gr[((UINT) 12)]) = 0xdeadbeef;
-CPU (h_gr[((UINT) 13)]) = 0xdeadbeef;
-CPU (h_gr[((UINT) 14)]) = 0xdeadbeef;
-CPU (h_gr[((UINT) 15)]) = 0xdeadbeef;
- {
- SI opval = CPU (h_gr[((UINT) 31)]);
- CPU (h_gr[((UINT) 0)]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-0", 'x', opval);
- }
- {
- SI opval = tmp_temp;
- CPU (h_gr[((UINT) 31)]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-31", 'x', opval);
- }
- {
- SI opval = ADDSI (tmp_temp, 64);
- CPU (h_gr[((UINT) 1)]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-1", 'x', opval);
- }
-}
-
- SEM_BRANCH_FINI (vpc);
- return vpc;
-#undef FLD
-}
-
-/* callx-indirect: callx ($abase) */
-
-static SEM_PC
-SEM_FN_NAME (i960base,callx_indirect) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_callx_indirect_offset.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-{
- SI tmp_temp;
- tmp_temp = ANDSI (ADDSI (CPU (h_gr[((UINT) 1)]), 63), INVSI (63));
- {
- SI opval = ADDSI (pc, 4);
- CPU (h_gr[((UINT) 2)]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-2", 'x', opval);
- }
-SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 0), CPU (h_gr[((UINT) 0)]));
-SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 4), CPU (h_gr[((UINT) 1)]));
-SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 8), CPU (h_gr[((UINT) 2)]));
-SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 12), CPU (h_gr[((UINT) 3)]));
-SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 16), CPU (h_gr[((UINT) 4)]));
-SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 20), CPU (h_gr[((UINT) 5)]));
-SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 24), CPU (h_gr[((UINT) 6)]));
-SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 28), CPU (h_gr[((UINT) 7)]));
-SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 32), CPU (h_gr[((UINT) 8)]));
-SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 36), CPU (h_gr[((UINT) 9)]));
-SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 40), CPU (h_gr[((UINT) 10)]));
-SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 44), CPU (h_gr[((UINT) 11)]));
-SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 48), CPU (h_gr[((UINT) 12)]));
-SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 52), CPU (h_gr[((UINT) 13)]));
-SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 56), CPU (h_gr[((UINT) 14)]));
-SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 60), CPU (h_gr[((UINT) 15)]));
- {
- USI opval = * FLD (i_abase);
- SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-CPU (h_gr[((UINT) 0)]) = 0xdeadbeef;
-CPU (h_gr[((UINT) 1)]) = 0xdeadbeef;
-CPU (h_gr[((UINT) 2)]) = 0xdeadbeef;
-CPU (h_gr[((UINT) 3)]) = 0xdeadbeef;
-CPU (h_gr[((UINT) 4)]) = 0xdeadbeef;
-CPU (h_gr[((UINT) 5)]) = 0xdeadbeef;
-CPU (h_gr[((UINT) 6)]) = 0xdeadbeef;
-CPU (h_gr[((UINT) 7)]) = 0xdeadbeef;
-CPU (h_gr[((UINT) 8)]) = 0xdeadbeef;
-CPU (h_gr[((UINT) 9)]) = 0xdeadbeef;
-CPU (h_gr[((UINT) 10)]) = 0xdeadbeef;
-CPU (h_gr[((UINT) 11)]) = 0xdeadbeef;
-CPU (h_gr[((UINT) 12)]) = 0xdeadbeef;
-CPU (h_gr[((UINT) 13)]) = 0xdeadbeef;
-CPU (h_gr[((UINT) 14)]) = 0xdeadbeef;
-CPU (h_gr[((UINT) 15)]) = 0xdeadbeef;
- {
- SI opval = CPU (h_gr[((UINT) 31)]);
- CPU (h_gr[((UINT) 0)]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-0", 'x', opval);
- }
- {
- SI opval = tmp_temp;
- CPU (h_gr[((UINT) 31)]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-31", 'x', opval);
- }
- {
- SI opval = ADDSI (tmp_temp, 64);
- CPU (h_gr[((UINT) 1)]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-1", 'x', opval);
- }
-}
-
- SEM_BRANCH_FINI (vpc);
- return vpc;
-#undef FLD
-}
-
-/* callx-indirect-offset: callx $offset($abase) */
-
-static SEM_PC
-SEM_FN_NAME (i960base,callx_indirect_offset) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_callx_indirect_offset.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-{
- SI tmp_temp;
- tmp_temp = ANDSI (ADDSI (CPU (h_gr[((UINT) 1)]), 63), INVSI (63));
- {
- SI opval = ADDSI (pc, 4);
- CPU (h_gr[((UINT) 2)]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-2", 'x', opval);
- }
-SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 0), CPU (h_gr[((UINT) 0)]));
-SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 4), CPU (h_gr[((UINT) 1)]));
-SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 8), CPU (h_gr[((UINT) 2)]));
-SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 12), CPU (h_gr[((UINT) 3)]));
-SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 16), CPU (h_gr[((UINT) 4)]));
-SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 20), CPU (h_gr[((UINT) 5)]));
-SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 24), CPU (h_gr[((UINT) 6)]));
-SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 28), CPU (h_gr[((UINT) 7)]));
-SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 32), CPU (h_gr[((UINT) 8)]));
-SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 36), CPU (h_gr[((UINT) 9)]));
-SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 40), CPU (h_gr[((UINT) 10)]));
-SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 44), CPU (h_gr[((UINT) 11)]));
-SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 48), CPU (h_gr[((UINT) 12)]));
-SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 52), CPU (h_gr[((UINT) 13)]));
-SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 56), CPU (h_gr[((UINT) 14)]));
-SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 60), CPU (h_gr[((UINT) 15)]));
- {
- USI opval = ADDSI (FLD (f_offset), * FLD (i_abase));
- SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-CPU (h_gr[((UINT) 0)]) = 0xdeadbeef;
-CPU (h_gr[((UINT) 1)]) = 0xdeadbeef;
-CPU (h_gr[((UINT) 2)]) = 0xdeadbeef;
-CPU (h_gr[((UINT) 3)]) = 0xdeadbeef;
-CPU (h_gr[((UINT) 4)]) = 0xdeadbeef;
-CPU (h_gr[((UINT) 5)]) = 0xdeadbeef;
-CPU (h_gr[((UINT) 6)]) = 0xdeadbeef;
-CPU (h_gr[((UINT) 7)]) = 0xdeadbeef;
-CPU (h_gr[((UINT) 8)]) = 0xdeadbeef;
-CPU (h_gr[((UINT) 9)]) = 0xdeadbeef;
-CPU (h_gr[((UINT) 10)]) = 0xdeadbeef;
-CPU (h_gr[((UINT) 11)]) = 0xdeadbeef;
-CPU (h_gr[((UINT) 12)]) = 0xdeadbeef;
-CPU (h_gr[((UINT) 13)]) = 0xdeadbeef;
-CPU (h_gr[((UINT) 14)]) = 0xdeadbeef;
-CPU (h_gr[((UINT) 15)]) = 0xdeadbeef;
- {
- SI opval = CPU (h_gr[((UINT) 31)]);
- CPU (h_gr[((UINT) 0)]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-0", 'x', opval);
- }
- {
- SI opval = tmp_temp;
- CPU (h_gr[((UINT) 31)]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-31", 'x', opval);
- }
- {
- SI opval = ADDSI (tmp_temp, 64);
- CPU (h_gr[((UINT) 1)]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-1", 'x', opval);
- }
-}
-
- SEM_BRANCH_FINI (vpc);
- return vpc;
-#undef FLD
-}
-
-/* ret: ret */
-
-static SEM_PC
-SEM_FN_NAME (i960base,ret) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_callx_disp.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-{
- {
- SI opval = CPU (h_gr[((UINT) 0)]);
- CPU (h_gr[((UINT) 31)]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr-31", 'x', opval);
- }
-CPU (h_gr[((UINT) 0)]) = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 0));
-CPU (h_gr[((UINT) 1)]) = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 4));
-CPU (h_gr[((UINT) 2)]) = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 8));
-CPU (h_gr[((UINT) 3)]) = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 12));
-CPU (h_gr[((UINT) 4)]) = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 16));
-CPU (h_gr[((UINT) 5)]) = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 20));
-CPU (h_gr[((UINT) 6)]) = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 24));
-CPU (h_gr[((UINT) 7)]) = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 28));
-CPU (h_gr[((UINT) 8)]) = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 32));
-CPU (h_gr[((UINT) 9)]) = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 36));
-CPU (h_gr[((UINT) 10)]) = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 40));
-CPU (h_gr[((UINT) 11)]) = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 44));
-CPU (h_gr[((UINT) 12)]) = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 48));
-CPU (h_gr[((UINT) 13)]) = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 52));
-CPU (h_gr[((UINT) 14)]) = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 56));
-CPU (h_gr[((UINT) 15)]) = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 60));
- {
- USI opval = CPU (h_gr[((UINT) 2)]);
- SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- SEM_BRANCH_FINI (vpc);
- return vpc;
-#undef FLD
-}
-
-/* calls: calls $src1 */
-
-static SEM_PC
-SEM_FN_NAME (i960base,calls) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_emul2.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = i960_trap (current_cpu, pc, * FLD (i_src1));
- SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-
- SEM_BRANCH_FINI (vpc);
- return vpc;
-#undef FLD
-}
-
-/* fmark: fmark */
-
-static SEM_PC
-SEM_FN_NAME (i960base,fmark) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.fmt_empty.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = i960_breakpoint (current_cpu, pc);
- SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-
- SEM_BRANCH_FINI (vpc);
- return vpc;
-#undef FLD
-}
-
-/* flushreg: flushreg */
-
-static SEM_PC
-SEM_FN_NAME (i960base,flushreg) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.fmt_empty.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-((void) 0); /*nop*/
-
- return vpc;
-#undef FLD
-}
-
-/* Table of all semantic fns. */
-
-static const struct sem_fn_desc sem_fns[] = {
- { I960BASE_INSN_X_INVALID, SEM_FN_NAME (i960base,x_invalid) },
- { I960BASE_INSN_X_AFTER, SEM_FN_NAME (i960base,x_after) },
- { I960BASE_INSN_X_BEFORE, SEM_FN_NAME (i960base,x_before) },
- { I960BASE_INSN_X_CTI_CHAIN, SEM_FN_NAME (i960base,x_cti_chain) },
- { I960BASE_INSN_X_CHAIN, SEM_FN_NAME (i960base,x_chain) },
- { I960BASE_INSN_X_BEGIN, SEM_FN_NAME (i960base,x_begin) },
- { I960BASE_INSN_MULO, SEM_FN_NAME (i960base,mulo) },
- { I960BASE_INSN_MULO1, SEM_FN_NAME (i960base,mulo1) },
- { I960BASE_INSN_MULO2, SEM_FN_NAME (i960base,mulo2) },
- { I960BASE_INSN_MULO3, SEM_FN_NAME (i960base,mulo3) },
- { I960BASE_INSN_REMO, SEM_FN_NAME (i960base,remo) },
- { I960BASE_INSN_REMO1, SEM_FN_NAME (i960base,remo1) },
- { I960BASE_INSN_REMO2, SEM_FN_NAME (i960base,remo2) },
- { I960BASE_INSN_REMO3, SEM_FN_NAME (i960base,remo3) },
- { I960BASE_INSN_DIVO, SEM_FN_NAME (i960base,divo) },
- { I960BASE_INSN_DIVO1, SEM_FN_NAME (i960base,divo1) },
- { I960BASE_INSN_DIVO2, SEM_FN_NAME (i960base,divo2) },
- { I960BASE_INSN_DIVO3, SEM_FN_NAME (i960base,divo3) },
- { I960BASE_INSN_REMI, SEM_FN_NAME (i960base,remi) },
- { I960BASE_INSN_REMI1, SEM_FN_NAME (i960base,remi1) },
- { I960BASE_INSN_REMI2, SEM_FN_NAME (i960base,remi2) },
- { I960BASE_INSN_REMI3, SEM_FN_NAME (i960base,remi3) },
- { I960BASE_INSN_DIVI, SEM_FN_NAME (i960base,divi) },
- { I960BASE_INSN_DIVI1, SEM_FN_NAME (i960base,divi1) },
- { I960BASE_INSN_DIVI2, SEM_FN_NAME (i960base,divi2) },
- { I960BASE_INSN_DIVI3, SEM_FN_NAME (i960base,divi3) },
- { I960BASE_INSN_ADDO, SEM_FN_NAME (i960base,addo) },
- { I960BASE_INSN_ADDO1, SEM_FN_NAME (i960base,addo1) },
- { I960BASE_INSN_ADDO2, SEM_FN_NAME (i960base,addo2) },
- { I960BASE_INSN_ADDO3, SEM_FN_NAME (i960base,addo3) },
- { I960BASE_INSN_SUBO, SEM_FN_NAME (i960base,subo) },
- { I960BASE_INSN_SUBO1, SEM_FN_NAME (i960base,subo1) },
- { I960BASE_INSN_SUBO2, SEM_FN_NAME (i960base,subo2) },
- { I960BASE_INSN_SUBO3, SEM_FN_NAME (i960base,subo3) },
- { I960BASE_INSN_NOTBIT, SEM_FN_NAME (i960base,notbit) },
- { I960BASE_INSN_NOTBIT1, SEM_FN_NAME (i960base,notbit1) },
- { I960BASE_INSN_NOTBIT2, SEM_FN_NAME (i960base,notbit2) },
- { I960BASE_INSN_NOTBIT3, SEM_FN_NAME (i960base,notbit3) },
- { I960BASE_INSN_AND, SEM_FN_NAME (i960base,and) },
- { I960BASE_INSN_AND1, SEM_FN_NAME (i960base,and1) },
- { I960BASE_INSN_AND2, SEM_FN_NAME (i960base,and2) },
- { I960BASE_INSN_AND3, SEM_FN_NAME (i960base,and3) },
- { I960BASE_INSN_ANDNOT, SEM_FN_NAME (i960base,andnot) },
- { I960BASE_INSN_ANDNOT1, SEM_FN_NAME (i960base,andnot1) },
- { I960BASE_INSN_ANDNOT2, SEM_FN_NAME (i960base,andnot2) },
- { I960BASE_INSN_ANDNOT3, SEM_FN_NAME (i960base,andnot3) },
- { I960BASE_INSN_SETBIT, SEM_FN_NAME (i960base,setbit) },
- { I960BASE_INSN_SETBIT1, SEM_FN_NAME (i960base,setbit1) },
- { I960BASE_INSN_SETBIT2, SEM_FN_NAME (i960base,setbit2) },
- { I960BASE_INSN_SETBIT3, SEM_FN_NAME (i960base,setbit3) },
- { I960BASE_INSN_NOTAND, SEM_FN_NAME (i960base,notand) },
- { I960BASE_INSN_NOTAND1, SEM_FN_NAME (i960base,notand1) },
- { I960BASE_INSN_NOTAND2, SEM_FN_NAME (i960base,notand2) },
- { I960BASE_INSN_NOTAND3, SEM_FN_NAME (i960base,notand3) },
- { I960BASE_INSN_XOR, SEM_FN_NAME (i960base,xor) },
- { I960BASE_INSN_XOR1, SEM_FN_NAME (i960base,xor1) },
- { I960BASE_INSN_XOR2, SEM_FN_NAME (i960base,xor2) },
- { I960BASE_INSN_XOR3, SEM_FN_NAME (i960base,xor3) },
- { I960BASE_INSN_OR, SEM_FN_NAME (i960base,or) },
- { I960BASE_INSN_OR1, SEM_FN_NAME (i960base,or1) },
- { I960BASE_INSN_OR2, SEM_FN_NAME (i960base,or2) },
- { I960BASE_INSN_OR3, SEM_FN_NAME (i960base,or3) },
- { I960BASE_INSN_NOR, SEM_FN_NAME (i960base,nor) },
- { I960BASE_INSN_NOR1, SEM_FN_NAME (i960base,nor1) },
- { I960BASE_INSN_NOR2, SEM_FN_NAME (i960base,nor2) },
- { I960BASE_INSN_NOR3, SEM_FN_NAME (i960base,nor3) },
- { I960BASE_INSN_XNOR, SEM_FN_NAME (i960base,xnor) },
- { I960BASE_INSN_XNOR1, SEM_FN_NAME (i960base,xnor1) },
- { I960BASE_INSN_XNOR2, SEM_FN_NAME (i960base,xnor2) },
- { I960BASE_INSN_XNOR3, SEM_FN_NAME (i960base,xnor3) },
- { I960BASE_INSN_NOT, SEM_FN_NAME (i960base,not) },
- { I960BASE_INSN_NOT1, SEM_FN_NAME (i960base,not1) },
- { I960BASE_INSN_NOT2, SEM_FN_NAME (i960base,not2) },
- { I960BASE_INSN_NOT3, SEM_FN_NAME (i960base,not3) },
- { I960BASE_INSN_ORNOT, SEM_FN_NAME (i960base,ornot) },
- { I960BASE_INSN_ORNOT1, SEM_FN_NAME (i960base,ornot1) },
- { I960BASE_INSN_ORNOT2, SEM_FN_NAME (i960base,ornot2) },
- { I960BASE_INSN_ORNOT3, SEM_FN_NAME (i960base,ornot3) },
- { I960BASE_INSN_CLRBIT, SEM_FN_NAME (i960base,clrbit) },
- { I960BASE_INSN_CLRBIT1, SEM_FN_NAME (i960base,clrbit1) },
- { I960BASE_INSN_CLRBIT2, SEM_FN_NAME (i960base,clrbit2) },
- { I960BASE_INSN_CLRBIT3, SEM_FN_NAME (i960base,clrbit3) },
- { I960BASE_INSN_SHLO, SEM_FN_NAME (i960base,shlo) },
- { I960BASE_INSN_SHLO1, SEM_FN_NAME (i960base,shlo1) },
- { I960BASE_INSN_SHLO2, SEM_FN_NAME (i960base,shlo2) },
- { I960BASE_INSN_SHLO3, SEM_FN_NAME (i960base,shlo3) },
- { I960BASE_INSN_SHRO, SEM_FN_NAME (i960base,shro) },
- { I960BASE_INSN_SHRO1, SEM_FN_NAME (i960base,shro1) },
- { I960BASE_INSN_SHRO2, SEM_FN_NAME (i960base,shro2) },
- { I960BASE_INSN_SHRO3, SEM_FN_NAME (i960base,shro3) },
- { I960BASE_INSN_SHLI, SEM_FN_NAME (i960base,shli) },
- { I960BASE_INSN_SHLI1, SEM_FN_NAME (i960base,shli1) },
- { I960BASE_INSN_SHLI2, SEM_FN_NAME (i960base,shli2) },
- { I960BASE_INSN_SHLI3, SEM_FN_NAME (i960base,shli3) },
- { I960BASE_INSN_SHRI, SEM_FN_NAME (i960base,shri) },
- { I960BASE_INSN_SHRI1, SEM_FN_NAME (i960base,shri1) },
- { I960BASE_INSN_SHRI2, SEM_FN_NAME (i960base,shri2) },
- { I960BASE_INSN_SHRI3, SEM_FN_NAME (i960base,shri3) },
- { I960BASE_INSN_EMUL, SEM_FN_NAME (i960base,emul) },
- { I960BASE_INSN_EMUL1, SEM_FN_NAME (i960base,emul1) },
- { I960BASE_INSN_EMUL2, SEM_FN_NAME (i960base,emul2) },
- { I960BASE_INSN_EMUL3, SEM_FN_NAME (i960base,emul3) },
- { I960BASE_INSN_MOV, SEM_FN_NAME (i960base,mov) },
- { I960BASE_INSN_MOV1, SEM_FN_NAME (i960base,mov1) },
- { I960BASE_INSN_MOVL, SEM_FN_NAME (i960base,movl) },
- { I960BASE_INSN_MOVL1, SEM_FN_NAME (i960base,movl1) },
- { I960BASE_INSN_MOVT, SEM_FN_NAME (i960base,movt) },
- { I960BASE_INSN_MOVT1, SEM_FN_NAME (i960base,movt1) },
- { I960BASE_INSN_MOVQ, SEM_FN_NAME (i960base,movq) },
- { I960BASE_INSN_MOVQ1, SEM_FN_NAME (i960base,movq1) },
- { I960BASE_INSN_MODPC, SEM_FN_NAME (i960base,modpc) },
- { I960BASE_INSN_MODAC, SEM_FN_NAME (i960base,modac) },
- { I960BASE_INSN_LDA_OFFSET, SEM_FN_NAME (i960base,lda_offset) },
- { I960BASE_INSN_LDA_INDIRECT_OFFSET, SEM_FN_NAME (i960base,lda_indirect_offset) },
- { I960BASE_INSN_LDA_INDIRECT, SEM_FN_NAME (i960base,lda_indirect) },
- { I960BASE_INSN_LDA_INDIRECT_INDEX, SEM_FN_NAME (i960base,lda_indirect_index) },
- { I960BASE_INSN_LDA_DISP, SEM_FN_NAME (i960base,lda_disp) },
- { I960BASE_INSN_LDA_INDIRECT_DISP, SEM_FN_NAME (i960base,lda_indirect_disp) },
- { I960BASE_INSN_LDA_INDEX_DISP, SEM_FN_NAME (i960base,lda_index_disp) },
- { I960BASE_INSN_LDA_INDIRECT_INDEX_DISP, SEM_FN_NAME (i960base,lda_indirect_index_disp) },
- { I960BASE_INSN_LD_OFFSET, SEM_FN_NAME (i960base,ld_offset) },
- { I960BASE_INSN_LD_INDIRECT_OFFSET, SEM_FN_NAME (i960base,ld_indirect_offset) },
- { I960BASE_INSN_LD_INDIRECT, SEM_FN_NAME (i960base,ld_indirect) },
- { I960BASE_INSN_LD_INDIRECT_INDEX, SEM_FN_NAME (i960base,ld_indirect_index) },
- { I960BASE_INSN_LD_DISP, SEM_FN_NAME (i960base,ld_disp) },
- { I960BASE_INSN_LD_INDIRECT_DISP, SEM_FN_NAME (i960base,ld_indirect_disp) },
- { I960BASE_INSN_LD_INDEX_DISP, SEM_FN_NAME (i960base,ld_index_disp) },
- { I960BASE_INSN_LD_INDIRECT_INDEX_DISP, SEM_FN_NAME (i960base,ld_indirect_index_disp) },
- { I960BASE_INSN_LDOB_OFFSET, SEM_FN_NAME (i960base,ldob_offset) },
- { I960BASE_INSN_LDOB_INDIRECT_OFFSET, SEM_FN_NAME (i960base,ldob_indirect_offset) },
- { I960BASE_INSN_LDOB_INDIRECT, SEM_FN_NAME (i960base,ldob_indirect) },
- { I960BASE_INSN_LDOB_INDIRECT_INDEX, SEM_FN_NAME (i960base,ldob_indirect_index) },
- { I960BASE_INSN_LDOB_DISP, SEM_FN_NAME (i960base,ldob_disp) },
- { I960BASE_INSN_LDOB_INDIRECT_DISP, SEM_FN_NAME (i960base,ldob_indirect_disp) },
- { I960BASE_INSN_LDOB_INDEX_DISP, SEM_FN_NAME (i960base,ldob_index_disp) },
- { I960BASE_INSN_LDOB_INDIRECT_INDEX_DISP, SEM_FN_NAME (i960base,ldob_indirect_index_disp) },
- { I960BASE_INSN_LDOS_OFFSET, SEM_FN_NAME (i960base,ldos_offset) },
- { I960BASE_INSN_LDOS_INDIRECT_OFFSET, SEM_FN_NAME (i960base,ldos_indirect_offset) },
- { I960BASE_INSN_LDOS_INDIRECT, SEM_FN_NAME (i960base,ldos_indirect) },
- { I960BASE_INSN_LDOS_INDIRECT_INDEX, SEM_FN_NAME (i960base,ldos_indirect_index) },
- { I960BASE_INSN_LDOS_DISP, SEM_FN_NAME (i960base,ldos_disp) },
- { I960BASE_INSN_LDOS_INDIRECT_DISP, SEM_FN_NAME (i960base,ldos_indirect_disp) },
- { I960BASE_INSN_LDOS_INDEX_DISP, SEM_FN_NAME (i960base,ldos_index_disp) },
- { I960BASE_INSN_LDOS_INDIRECT_INDEX_DISP, SEM_FN_NAME (i960base,ldos_indirect_index_disp) },
- { I960BASE_INSN_LDIB_OFFSET, SEM_FN_NAME (i960base,ldib_offset) },
- { I960BASE_INSN_LDIB_INDIRECT_OFFSET, SEM_FN_NAME (i960base,ldib_indirect_offset) },
- { I960BASE_INSN_LDIB_INDIRECT, SEM_FN_NAME (i960base,ldib_indirect) },
- { I960BASE_INSN_LDIB_INDIRECT_INDEX, SEM_FN_NAME (i960base,ldib_indirect_index) },
- { I960BASE_INSN_LDIB_DISP, SEM_FN_NAME (i960base,ldib_disp) },
- { I960BASE_INSN_LDIB_INDIRECT_DISP, SEM_FN_NAME (i960base,ldib_indirect_disp) },
- { I960BASE_INSN_LDIB_INDEX_DISP, SEM_FN_NAME (i960base,ldib_index_disp) },
- { I960BASE_INSN_LDIB_INDIRECT_INDEX_DISP, SEM_FN_NAME (i960base,ldib_indirect_index_disp) },
- { I960BASE_INSN_LDIS_OFFSET, SEM_FN_NAME (i960base,ldis_offset) },
- { I960BASE_INSN_LDIS_INDIRECT_OFFSET, SEM_FN_NAME (i960base,ldis_indirect_offset) },
- { I960BASE_INSN_LDIS_INDIRECT, SEM_FN_NAME (i960base,ldis_indirect) },
- { I960BASE_INSN_LDIS_INDIRECT_INDEX, SEM_FN_NAME (i960base,ldis_indirect_index) },
- { I960BASE_INSN_LDIS_DISP, SEM_FN_NAME (i960base,ldis_disp) },
- { I960BASE_INSN_LDIS_INDIRECT_DISP, SEM_FN_NAME (i960base,ldis_indirect_disp) },
- { I960BASE_INSN_LDIS_INDEX_DISP, SEM_FN_NAME (i960base,ldis_index_disp) },
- { I960BASE_INSN_LDIS_INDIRECT_INDEX_DISP, SEM_FN_NAME (i960base,ldis_indirect_index_disp) },
- { I960BASE_INSN_LDL_OFFSET, SEM_FN_NAME (i960base,ldl_offset) },
- { I960BASE_INSN_LDL_INDIRECT_OFFSET, SEM_FN_NAME (i960base,ldl_indirect_offset) },
- { I960BASE_INSN_LDL_INDIRECT, SEM_FN_NAME (i960base,ldl_indirect) },
- { I960BASE_INSN_LDL_INDIRECT_INDEX, SEM_FN_NAME (i960base,ldl_indirect_index) },
- { I960BASE_INSN_LDL_DISP, SEM_FN_NAME (i960base,ldl_disp) },
- { I960BASE_INSN_LDL_INDIRECT_DISP, SEM_FN_NAME (i960base,ldl_indirect_disp) },
- { I960BASE_INSN_LDL_INDEX_DISP, SEM_FN_NAME (i960base,ldl_index_disp) },
- { I960BASE_INSN_LDL_INDIRECT_INDEX_DISP, SEM_FN_NAME (i960base,ldl_indirect_index_disp) },
- { I960BASE_INSN_LDT_OFFSET, SEM_FN_NAME (i960base,ldt_offset) },
- { I960BASE_INSN_LDT_INDIRECT_OFFSET, SEM_FN_NAME (i960base,ldt_indirect_offset) },
- { I960BASE_INSN_LDT_INDIRECT, SEM_FN_NAME (i960base,ldt_indirect) },
- { I960BASE_INSN_LDT_INDIRECT_INDEX, SEM_FN_NAME (i960base,ldt_indirect_index) },
- { I960BASE_INSN_LDT_DISP, SEM_FN_NAME (i960base,ldt_disp) },
- { I960BASE_INSN_LDT_INDIRECT_DISP, SEM_FN_NAME (i960base,ldt_indirect_disp) },
- { I960BASE_INSN_LDT_INDEX_DISP, SEM_FN_NAME (i960base,ldt_index_disp) },
- { I960BASE_INSN_LDT_INDIRECT_INDEX_DISP, SEM_FN_NAME (i960base,ldt_indirect_index_disp) },
- { I960BASE_INSN_LDQ_OFFSET, SEM_FN_NAME (i960base,ldq_offset) },
- { I960BASE_INSN_LDQ_INDIRECT_OFFSET, SEM_FN_NAME (i960base,ldq_indirect_offset) },
- { I960BASE_INSN_LDQ_INDIRECT, SEM_FN_NAME (i960base,ldq_indirect) },
- { I960BASE_INSN_LDQ_INDIRECT_INDEX, SEM_FN_NAME (i960base,ldq_indirect_index) },
- { I960BASE_INSN_LDQ_DISP, SEM_FN_NAME (i960base,ldq_disp) },
- { I960BASE_INSN_LDQ_INDIRECT_DISP, SEM_FN_NAME (i960base,ldq_indirect_disp) },
- { I960BASE_INSN_LDQ_INDEX_DISP, SEM_FN_NAME (i960base,ldq_index_disp) },
- { I960BASE_INSN_LDQ_INDIRECT_INDEX_DISP, SEM_FN_NAME (i960base,ldq_indirect_index_disp) },
- { I960BASE_INSN_ST_OFFSET, SEM_FN_NAME (i960base,st_offset) },
- { I960BASE_INSN_ST_INDIRECT_OFFSET, SEM_FN_NAME (i960base,st_indirect_offset) },
- { I960BASE_INSN_ST_INDIRECT, SEM_FN_NAME (i960base,st_indirect) },
- { I960BASE_INSN_ST_INDIRECT_INDEX, SEM_FN_NAME (i960base,st_indirect_index) },
- { I960BASE_INSN_ST_DISP, SEM_FN_NAME (i960base,st_disp) },
- { I960BASE_INSN_ST_INDIRECT_DISP, SEM_FN_NAME (i960base,st_indirect_disp) },
- { I960BASE_INSN_ST_INDEX_DISP, SEM_FN_NAME (i960base,st_index_disp) },
- { I960BASE_INSN_ST_INDIRECT_INDEX_DISP, SEM_FN_NAME (i960base,st_indirect_index_disp) },
- { I960BASE_INSN_STOB_OFFSET, SEM_FN_NAME (i960base,stob_offset) },
- { I960BASE_INSN_STOB_INDIRECT_OFFSET, SEM_FN_NAME (i960base,stob_indirect_offset) },
- { I960BASE_INSN_STOB_INDIRECT, SEM_FN_NAME (i960base,stob_indirect) },
- { I960BASE_INSN_STOB_INDIRECT_INDEX, SEM_FN_NAME (i960base,stob_indirect_index) },
- { I960BASE_INSN_STOB_DISP, SEM_FN_NAME (i960base,stob_disp) },
- { I960BASE_INSN_STOB_INDIRECT_DISP, SEM_FN_NAME (i960base,stob_indirect_disp) },
- { I960BASE_INSN_STOB_INDEX_DISP, SEM_FN_NAME (i960base,stob_index_disp) },
- { I960BASE_INSN_STOB_INDIRECT_INDEX_DISP, SEM_FN_NAME (i960base,stob_indirect_index_disp) },
- { I960BASE_INSN_STOS_OFFSET, SEM_FN_NAME (i960base,stos_offset) },
- { I960BASE_INSN_STOS_INDIRECT_OFFSET, SEM_FN_NAME (i960base,stos_indirect_offset) },
- { I960BASE_INSN_STOS_INDIRECT, SEM_FN_NAME (i960base,stos_indirect) },
- { I960BASE_INSN_STOS_INDIRECT_INDEX, SEM_FN_NAME (i960base,stos_indirect_index) },
- { I960BASE_INSN_STOS_DISP, SEM_FN_NAME (i960base,stos_disp) },
- { I960BASE_INSN_STOS_INDIRECT_DISP, SEM_FN_NAME (i960base,stos_indirect_disp) },
- { I960BASE_INSN_STOS_INDEX_DISP, SEM_FN_NAME (i960base,stos_index_disp) },
- { I960BASE_INSN_STOS_INDIRECT_INDEX_DISP, SEM_FN_NAME (i960base,stos_indirect_index_disp) },
- { I960BASE_INSN_STL_OFFSET, SEM_FN_NAME (i960base,stl_offset) },
- { I960BASE_INSN_STL_INDIRECT_OFFSET, SEM_FN_NAME (i960base,stl_indirect_offset) },
- { I960BASE_INSN_STL_INDIRECT, SEM_FN_NAME (i960base,stl_indirect) },
- { I960BASE_INSN_STL_INDIRECT_INDEX, SEM_FN_NAME (i960base,stl_indirect_index) },
- { I960BASE_INSN_STL_DISP, SEM_FN_NAME (i960base,stl_disp) },
- { I960BASE_INSN_STL_INDIRECT_DISP, SEM_FN_NAME (i960base,stl_indirect_disp) },
- { I960BASE_INSN_STL_INDEX_DISP, SEM_FN_NAME (i960base,stl_index_disp) },
- { I960BASE_INSN_STL_INDIRECT_INDEX_DISP, SEM_FN_NAME (i960base,stl_indirect_index_disp) },
- { I960BASE_INSN_STT_OFFSET, SEM_FN_NAME (i960base,stt_offset) },
- { I960BASE_INSN_STT_INDIRECT_OFFSET, SEM_FN_NAME (i960base,stt_indirect_offset) },
- { I960BASE_INSN_STT_INDIRECT, SEM_FN_NAME (i960base,stt_indirect) },
- { I960BASE_INSN_STT_INDIRECT_INDEX, SEM_FN_NAME (i960base,stt_indirect_index) },
- { I960BASE_INSN_STT_DISP, SEM_FN_NAME (i960base,stt_disp) },
- { I960BASE_INSN_STT_INDIRECT_DISP, SEM_FN_NAME (i960base,stt_indirect_disp) },
- { I960BASE_INSN_STT_INDEX_DISP, SEM_FN_NAME (i960base,stt_index_disp) },
- { I960BASE_INSN_STT_INDIRECT_INDEX_DISP, SEM_FN_NAME (i960base,stt_indirect_index_disp) },
- { I960BASE_INSN_STQ_OFFSET, SEM_FN_NAME (i960base,stq_offset) },
- { I960BASE_INSN_STQ_INDIRECT_OFFSET, SEM_FN_NAME (i960base,stq_indirect_offset) },
- { I960BASE_INSN_STQ_INDIRECT, SEM_FN_NAME (i960base,stq_indirect) },
- { I960BASE_INSN_STQ_INDIRECT_INDEX, SEM_FN_NAME (i960base,stq_indirect_index) },
- { I960BASE_INSN_STQ_DISP, SEM_FN_NAME (i960base,stq_disp) },
- { I960BASE_INSN_STQ_INDIRECT_DISP, SEM_FN_NAME (i960base,stq_indirect_disp) },
- { I960BASE_INSN_STQ_INDEX_DISP, SEM_FN_NAME (i960base,stq_index_disp) },
- { I960BASE_INSN_STQ_INDIRECT_INDEX_DISP, SEM_FN_NAME (i960base,stq_indirect_index_disp) },
- { I960BASE_INSN_CMPOBE_REG, SEM_FN_NAME (i960base,cmpobe_reg) },
- { I960BASE_INSN_CMPOBE_LIT, SEM_FN_NAME (i960base,cmpobe_lit) },
- { I960BASE_INSN_CMPOBNE_REG, SEM_FN_NAME (i960base,cmpobne_reg) },
- { I960BASE_INSN_CMPOBNE_LIT, SEM_FN_NAME (i960base,cmpobne_lit) },
- { I960BASE_INSN_CMPOBL_REG, SEM_FN_NAME (i960base,cmpobl_reg) },
- { I960BASE_INSN_CMPOBL_LIT, SEM_FN_NAME (i960base,cmpobl_lit) },
- { I960BASE_INSN_CMPOBLE_REG, SEM_FN_NAME (i960base,cmpoble_reg) },
- { I960BASE_INSN_CMPOBLE_LIT, SEM_FN_NAME (i960base,cmpoble_lit) },
- { I960BASE_INSN_CMPOBG_REG, SEM_FN_NAME (i960base,cmpobg_reg) },
- { I960BASE_INSN_CMPOBG_LIT, SEM_FN_NAME (i960base,cmpobg_lit) },
- { I960BASE_INSN_CMPOBGE_REG, SEM_FN_NAME (i960base,cmpobge_reg) },
- { I960BASE_INSN_CMPOBGE_LIT, SEM_FN_NAME (i960base,cmpobge_lit) },
- { I960BASE_INSN_CMPIBE_REG, SEM_FN_NAME (i960base,cmpibe_reg) },
- { I960BASE_INSN_CMPIBE_LIT, SEM_FN_NAME (i960base,cmpibe_lit) },
- { I960BASE_INSN_CMPIBNE_REG, SEM_FN_NAME (i960base,cmpibne_reg) },
- { I960BASE_INSN_CMPIBNE_LIT, SEM_FN_NAME (i960base,cmpibne_lit) },
- { I960BASE_INSN_CMPIBL_REG, SEM_FN_NAME (i960base,cmpibl_reg) },
- { I960BASE_INSN_CMPIBL_LIT, SEM_FN_NAME (i960base,cmpibl_lit) },
- { I960BASE_INSN_CMPIBLE_REG, SEM_FN_NAME (i960base,cmpible_reg) },
- { I960BASE_INSN_CMPIBLE_LIT, SEM_FN_NAME (i960base,cmpible_lit) },
- { I960BASE_INSN_CMPIBG_REG, SEM_FN_NAME (i960base,cmpibg_reg) },
- { I960BASE_INSN_CMPIBG_LIT, SEM_FN_NAME (i960base,cmpibg_lit) },
- { I960BASE_INSN_CMPIBGE_REG, SEM_FN_NAME (i960base,cmpibge_reg) },
- { I960BASE_INSN_CMPIBGE_LIT, SEM_FN_NAME (i960base,cmpibge_lit) },
- { I960BASE_INSN_BBC_REG, SEM_FN_NAME (i960base,bbc_reg) },
- { I960BASE_INSN_BBC_LIT, SEM_FN_NAME (i960base,bbc_lit) },
- { I960BASE_INSN_BBS_REG, SEM_FN_NAME (i960base,bbs_reg) },
- { I960BASE_INSN_BBS_LIT, SEM_FN_NAME (i960base,bbs_lit) },
- { I960BASE_INSN_CMPI, SEM_FN_NAME (i960base,cmpi) },
- { I960BASE_INSN_CMPI1, SEM_FN_NAME (i960base,cmpi1) },
- { I960BASE_INSN_CMPI2, SEM_FN_NAME (i960base,cmpi2) },
- { I960BASE_INSN_CMPI3, SEM_FN_NAME (i960base,cmpi3) },
- { I960BASE_INSN_CMPO, SEM_FN_NAME (i960base,cmpo) },
- { I960BASE_INSN_CMPO1, SEM_FN_NAME (i960base,cmpo1) },
- { I960BASE_INSN_CMPO2, SEM_FN_NAME (i960base,cmpo2) },
- { I960BASE_INSN_CMPO3, SEM_FN_NAME (i960base,cmpo3) },
- { I960BASE_INSN_TESTNO_REG, SEM_FN_NAME (i960base,testno_reg) },
- { I960BASE_INSN_TESTG_REG, SEM_FN_NAME (i960base,testg_reg) },
- { I960BASE_INSN_TESTE_REG, SEM_FN_NAME (i960base,teste_reg) },
- { I960BASE_INSN_TESTGE_REG, SEM_FN_NAME (i960base,testge_reg) },
- { I960BASE_INSN_TESTL_REG, SEM_FN_NAME (i960base,testl_reg) },
- { I960BASE_INSN_TESTNE_REG, SEM_FN_NAME (i960base,testne_reg) },
- { I960BASE_INSN_TESTLE_REG, SEM_FN_NAME (i960base,testle_reg) },
- { I960BASE_INSN_TESTO_REG, SEM_FN_NAME (i960base,testo_reg) },
- { I960BASE_INSN_BNO, SEM_FN_NAME (i960base,bno) },
- { I960BASE_INSN_BG, SEM_FN_NAME (i960base,bg) },
- { I960BASE_INSN_BE, SEM_FN_NAME (i960base,be) },
- { I960BASE_INSN_BGE, SEM_FN_NAME (i960base,bge) },
- { I960BASE_INSN_BL, SEM_FN_NAME (i960base,bl) },
- { I960BASE_INSN_BNE, SEM_FN_NAME (i960base,bne) },
- { I960BASE_INSN_BLE, SEM_FN_NAME (i960base,ble) },
- { I960BASE_INSN_BO, SEM_FN_NAME (i960base,bo) },
- { I960BASE_INSN_B, SEM_FN_NAME (i960base,b) },
- { I960BASE_INSN_BX_INDIRECT_OFFSET, SEM_FN_NAME (i960base,bx_indirect_offset) },
- { I960BASE_INSN_BX_INDIRECT, SEM_FN_NAME (i960base,bx_indirect) },
- { I960BASE_INSN_BX_INDIRECT_INDEX, SEM_FN_NAME (i960base,bx_indirect_index) },
- { I960BASE_INSN_BX_DISP, SEM_FN_NAME (i960base,bx_disp) },
- { I960BASE_INSN_BX_INDIRECT_DISP, SEM_FN_NAME (i960base,bx_indirect_disp) },
- { I960BASE_INSN_CALLX_DISP, SEM_FN_NAME (i960base,callx_disp) },
- { I960BASE_INSN_CALLX_INDIRECT, SEM_FN_NAME (i960base,callx_indirect) },
- { I960BASE_INSN_CALLX_INDIRECT_OFFSET, SEM_FN_NAME (i960base,callx_indirect_offset) },
- { I960BASE_INSN_RET, SEM_FN_NAME (i960base,ret) },
- { I960BASE_INSN_CALLS, SEM_FN_NAME (i960base,calls) },
- { I960BASE_INSN_FMARK, SEM_FN_NAME (i960base,fmark) },
- { I960BASE_INSN_FLUSHREG, SEM_FN_NAME (i960base,flushreg) },
- { 0, 0 }
-};
-
-/* Add the semantic fns to IDESC_TABLE. */
-
-void
-SEM_FN_NAME (i960base,init_idesc_table) (SIM_CPU *current_cpu)
-{
- IDESC *idesc_table = CPU_IDESC (current_cpu);
- const struct sem_fn_desc *sf;
- int mach_num = MACH_NUM (CPU_MACH (current_cpu));
-
- for (sf = &sem_fns[0]; sf->fn != 0; ++sf)
- {
- const CGEN_INSN *insn = idesc_table[sf->index].idata;
- int valid_p = (CGEN_INSN_VIRTUAL_P (insn)
- || CGEN_INSN_MACH_HAS_P (insn, mach_num));
-#if FAST_P
- if (valid_p)
- idesc_table[sf->index].sem_fast = sf->fn;
- else
- idesc_table[sf->index].sem_fast = SEM_FN_NAME (i960base,x_invalid);
-#else
- if (valid_p)
- idesc_table[sf->index].sem_full = sf->fn;
- else
- idesc_table[sf->index].sem_full = SEM_FN_NAME (i960base,x_invalid);
-#endif
- }
-}
-
diff --git a/sim/i960/sim-if.c b/sim/i960/sim-if.c
deleted file mode 100644
index 6179739b3c2..00000000000
--- a/sim/i960/sim-if.c
+++ /dev/null
@@ -1,311 +0,0 @@
-/* Main simulator entry points for the i960.
- Copyright (C) 1996, 1997, 1998, 1999 Free Software Foundation, Inc.
- Contributed by Cygnus Support.
-
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License along
-with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
-
-#include "libiberty.h"
-#include "bfd.h"
-#include "sim-main.h"
-#ifdef HAVE_STDLIB_H
-#include <stdlib.h>
-#endif
-#include "sim-options.h"
-#include "dis-asm.h"
-
-static void free_state (SIM_DESC);
-
-/* Since we don't build the cgen-opcode table, we use the old
- disassembler. */
-static CGEN_DISASSEMBLER i960_disassemble_insn;
-
-/* Records simulator descriptor so utilities like i960_dump_regs can be
- called from gdb. */
-SIM_DESC current_state;
-
-/* Cover function of sim_state_free to free the cpu buffers as well. */
-
-static void
-free_state (SIM_DESC sd)
-{
- if (STATE_MODULES (sd) != NULL)
- sim_module_uninstall (sd);
- sim_cpu_free_all (sd);
- sim_state_free (sd);
-}
-
-/* Create an instance of the simulator. */
-
-SIM_DESC
-sim_open (kind, callback, abfd, argv)
- SIM_OPEN_KIND kind;
- host_callback *callback;
- struct _bfd *abfd;
- char **argv;
-{
- char c;
- int i;
- SIM_DESC sd = sim_state_alloc (kind, callback);
-
- /* The cpu data is kept in a separately allocated chunk of memory. */
- if (sim_cpu_alloc_all (sd, 1, cgen_cpu_max_extra_bytes ()) != SIM_RC_OK)
- {
- free_state (sd);
- return 0;
- }
-
-#if 0 /* FIXME: pc is in mach-specific struct */
- /* FIXME: watchpoints code shouldn't need this */
- {
- SIM_CPU *current_cpu = STATE_CPU (sd, 0);
- STATE_WATCHPOINTS (sd)->pc = &(PC);
- STATE_WATCHPOINTS (sd)->sizeof_pc = sizeof (PC);
- }
-#endif
-
- if (sim_pre_argv_init (sd, argv[0]) != SIM_RC_OK)
- {
- free_state (sd);
- return 0;
- }
-
-#if 0 /* FIXME: 'twould be nice if we could do this */
- /* These options override any module options.
- Obviously ambiguity should be avoided, however the caller may wish to
- augment the meaning of an option. */
- if (extra_options != NULL)
- sim_add_option_table (sd, extra_options);
-#endif
-
- /* getopt will print the error message so we just have to exit if this fails.
- FIXME: Hmmm... in the case of gdb we need getopt to call
- print_filtered. */
- if (sim_parse_args (sd, argv) != SIM_RC_OK)
- {
- free_state (sd);
- return 0;
- }
-
- /* Allocate a handler for the control registers and other devices
- if no memory for that range has been allocated by the user.
- All are allocated in one chunk to keep things from being
- unnecessarily complicated. */
- if (sim_core_read_buffer (sd, NULL, read_map, &c, I960_DEVICE_ADDR, 1) == 0)
- sim_core_attach (sd, NULL,
- 0 /*level*/,
- access_read_write,
- 0 /*space ???*/,
- I960_DEVICE_ADDR, I960_DEVICE_LEN /*nr_bytes*/,
- 0 /*modulo*/,
- &i960_devices,
- NULL /*buffer*/);
-
- /* Allocate core managed memory if none specified by user.
- Use address 4 here in case the user wanted address 0 unmapped. */
- if (sim_core_read_buffer (sd, NULL, read_map, &c, 4, 1) == 0)
- /* ??? wilson */
- sim_do_commandf (sd, "memory region 0x%lx,0x%lx", I960_DEFAULT_MEM_START,
- I960_DEFAULT_MEM_SIZE);
-
- /* check for/establish the reference program image */
- if (sim_analyze_program (sd,
- (STATE_PROG_ARGV (sd) != NULL
- ? *STATE_PROG_ARGV (sd)
- : NULL),
- abfd) != SIM_RC_OK)
- {
- free_state (sd);
- return 0;
- }
-
- /* Establish any remaining configuration options. */
- if (sim_config (sd) != SIM_RC_OK)
- {
- free_state (sd);
- return 0;
- }
-
- if (sim_post_argv_init (sd) != SIM_RC_OK)
- {
- free_state (sd);
- return 0;
- }
-
- /* Open a copy of the cpu descriptor table. */
- {
- CGEN_CPU_DESC cd = i960_cgen_cpu_open_1 (STATE_ARCHITECTURE (sd)->printable_name,
- CGEN_ENDIAN_LITTLE);
- for (i = 0; i < MAX_NR_PROCESSORS; ++i)
- {
- SIM_CPU *cpu = STATE_CPU (sd, i);
- CPU_CPU_DESC (cpu) = cd;
- CPU_DISASSEMBLER (cpu) = i960_disassemble_insn;
- }
- }
-
- /* Initialize various cgen things not done by common framework.
- Must be done after i960_cgen_cpu_open. */
- cgen_init (sd);
-
- /* Store in a global so things like i960_dump_regs can be invoked
- from the gdb command line. */
- current_state = sd;
-
- return sd;
-}
-
-void
-sim_close (sd, quitting)
- SIM_DESC sd;
- int quitting;
-{
- i960_cgen_cpu_close (CPU_CPU_DESC (STATE_CPU (sd, 0)));
- sim_module_uninstall (sd);
-}
-
-SIM_RC
-sim_create_inferior (sd, abfd, argv, envp)
- SIM_DESC sd;
- struct _bfd *abfd;
- char **argv;
- char **envp;
-{
- SIM_CPU *current_cpu = STATE_CPU (sd, 0);
- SIM_ADDR addr;
-
- if (abfd != NULL)
- addr = bfd_get_start_address (abfd);
- else
- addr = 0;
- sim_pc_set (current_cpu, addr);
-
-#if 0
- STATE_ARGV (sd) = sim_copy_argv (argv);
- STATE_ENVP (sd) = sim_copy_argv (envp);
-#endif
-
- return SIM_RC_OK;
-}
-
-#if 0
-int
-sim_stop (SIM_DESC sd)
-{
- switch (STATE_ARCHITECTURE (sd)->mach)
- {
- case bfd_mach_i960_ka_sa :
- return i960base_engine_stop (sd, NULL, NULL_CIA, sim_stopped, SIM_SIGINT);
- default :
- abort ();
- }
-}
-
-/* This isn't part of the official interface.
- This is just a good place to put this for now. */
-
-void
-sim_sync_stop (SIM_DESC sd, SIM_CPU *cpu, PCADDR pc, enum sim_stop reason, int sigrc)
-{
- switch (STATE_ARCHITECTURE (sd)->mach)
- {
- case bfd_mach_i960_ka_sa :
- (void) i960base_engine_stop (sd, cpu, pc, reason, sigrc);
- break;
- default :
- abort ();
- }
-}
-
-void
-sim_resume (sd, step, siggnal)
- SIM_DESC sd;
- int step, siggnal;
-{
- sim_module_resume (sd);
-
- switch (STATE_ARCHITECTURE (sd)->mach)
- {
- case bfd_mach_i960_ka_sa :
- i960base_engine_run (sd, step, siggnal);
- break;
- default :
- abort ();
- }
-
- sim_module_suspend (sd);
-}
-#endif
-
-/* The contents of BUF are in target byte order. */
-
-int
-sim_fetch_register (sd, rn, buf, length)
- SIM_DESC sd;
- int rn;
- unsigned char *buf;
- int length;
-{
- SIM_CPU *cpu = STATE_CPU (sd, 0);
-
- return (* CPU_REG_FETCH (cpu)) (cpu, rn, buf, length);
-}
-
-/* The contents of BUF are in target byte order. */
-
-int
-sim_store_register (sd, rn, buf, length)
- SIM_DESC sd;
- int rn;
- unsigned char *buf;
- int length;
-{
- SIM_CPU *cpu = STATE_CPU (sd, 0);
-
- return (* CPU_REG_STORE (cpu)) (cpu, rn, buf, length);
-}
-
-void
-sim_do_command (sd, cmd)
- SIM_DESC sd;
- char *cmd;
-{
- if (sim_args_command (sd, cmd) != SIM_RC_OK)
- sim_io_eprintf (sd, "Unknown command `%s'\n", cmd);
-}
-
-/* Disassemble an instruction. */
-
-static void
-i960_disassemble_insn (SIM_CPU *cpu, const CGEN_INSN *insn,
- const ARGBUF *abuf, IADDR pc, char *buf)
-{
- struct disassemble_info disasm_info;
- SFILE sfile;
- SIM_DESC sd = CPU_STATE (cpu);
- int insn_length = CGEN_INSN_BITSIZE (insn) / 8;
-
- sfile.buffer = sfile.current = buf;
- INIT_DISASSEMBLE_INFO (disasm_info, (FILE *) &sfile,
- (fprintf_ftype) sim_disasm_sprintf);
- disasm_info.endian =
- (bfd_big_endian (STATE_PROG_BFD (sd)) ? BFD_ENDIAN_BIG
- : bfd_little_endian (STATE_PROG_BFD (sd)) ? BFD_ENDIAN_LITTLE
- : BFD_ENDIAN_UNKNOWN);
- disasm_info.read_memory_func = sim_disasm_read_memory;
- disasm_info.memory_error_func = sim_disasm_perror_memory;
- disasm_info.application_data = (PTR) cpu;
-
- print_insn_i960 (pc, &disasm_info);
-}
diff --git a/sim/i960/sim-main.h b/sim/i960/sim-main.h
deleted file mode 100644
index abac5fcf2ac..00000000000
--- a/sim/i960/sim-main.h
+++ /dev/null
@@ -1,69 +0,0 @@
-/* Main header for the i960. */
-
-#define USING_SIM_BASE_H /* FIXME: quick hack */
-
-struct _sim_cpu; /* FIXME: should be in sim-basics.h */
-typedef struct _sim_cpu SIM_CPU;
-
-#include "symcat.h"
-#include "sim-basics.h"
-#include "cgen-types.h"
-#include "i960-desc.h"
-#include "i960-opc.h"
-#include "arch.h"
-
-/* These must be defined before sim-base.h. */
-typedef USI sim_cia;
-#define CIA_GET(cpu) 0 /* FIXME:(CPU_CGEN_HW (cpu)->h_pc) */
-#define CIA_SET(cpu,val) 0 /* FIXME:(CPU_CGEN_HW (cpu)->h_pc = (val)) */
-
-/* FIXME: Shouldn't be required to define these this early. */
-#define SIM_ENGINE_HALT_HOOK(SD, LAST_CPU, CIA)
-#define SIM_ENGINE_RESTART_HOOK(SD, LAST_CPU, CIA)
-
-#include "sim-base.h"
-#include "cgen-sim.h"
-#include "i960-sim.h"
-
-/* The _sim_cpu struct. */
-
-struct _sim_cpu {
- sim_cpu_base base;
-
- /* Static parts of cgen. */
- CGEN_CPU cgen_cpu;
-
- /* CPU specific parts go here.
- Note that in files that don't need to access these pieces WANT_CPU_FOO
- won't be defined and thus these parts won't appear. This is ok.
- One has to of course be careful to not take the size of this
- struct and no structure members accessed in non-cpu specific files can
- go after here. */
-#if defined (WANT_CPU_I960BASE)
- I960BASE_CPU_DATA cpu_data;
-#endif
-};
-
-/* The sim_state struct. */
-
-struct sim_state {
- sim_cpu *cpu;
-#define STATE_CPU(sd, n) (/*&*/ (sd)->cpu)
-
- CGEN_STATE cgen_state;
-
- sim_state_base base;
-};
-
-/* Misc. */
-
-/* Catch address exceptions. */
-extern SIM_CORE_SIGNAL_FN i960_core_signal;
-#define SIM_CORE_SIGNAL(SD,CPU,CIA,MAP,NR_BYTES,ADDR,TRANSFER,ERROR) \
-i960_core_signal ((SD), (CPU), (CIA), (MAP), (NR_BYTES), (ADDR), \
- (TRANSFER), (ERROR))
-
-/* Default memory size. */
-/* This value comes from the libgloss/i960/mon960.ld linker script. */
-#define I960_DEFAULT_MEM_START 0xa0008000
-#define I960_DEFAULT_MEM_SIZE 0x800000 /* 8M */
diff --git a/sim/i960/tconfig.in b/sim/i960/tconfig.in
deleted file mode 100644
index 2acf4567251..00000000000
--- a/sim/i960/tconfig.in
+++ /dev/null
@@ -1,49 +0,0 @@
-/* I960 target configuration file. -*- C -*- */
-
-/* See sim-hload.c. We properly handle LMA. */
-#define SIM_HANDLES_LMA 1
-
-/* For MSPR support. FIXME: revisit. */
-#define WITH_DEVICES 1
-
-/* FIXME: Revisit. */
-#ifdef HAVE_DV_SOCKSER
-MODULE_INSTALL_FN dv_sockser_install;
-#define MODULE_LIST dv_sockser_install,
-#endif
-
-#if 0
-/* Enable watchpoints. */
-#define WITH_WATCHPOINTS 1
-#endif
-
-/* ??? Temporary hack until model support unified. */
-#define SIM_HAVE_MODEL
-
-/* Define this to enable the intrinsic breakpoint mechanism. */
-/* FIXME: may be able to remove SIM_HAVE_BREAKPOINT since it essentially
- duplicates ifdef SIM_BREAKPOINT (right?) */
-#if 0
-#define SIM_HAVE_BREAKPOINTS
-#define SIM_BREAKPOINT { 0x10, 0xf1 }
-#define SIM_BREAKPOINT_SIZE 2
-#endif
-
-/* This is a global setting. Different cpu families can't mix-n-match -scache
- and -pbb. However some cpu families may use -simple while others use
- one of -scache/-pbb. */
-#define WITH_SCACHE_PBB 1
-
-#if 0
-/* ??? This was obsoleted by the PBB code. */
-/* The semantic code should probably always use a switch().
- However, in case that's not possible in some circumstance, we allow
- the target to choose. Perhaps this can be autoconf'd on whether the
- switch is too big? I can't (yet) think of a reason for allowing the
- user to choose, though the developer may certainly wish to. */
-#ifdef WANT_CPU_I960BASE
-#define WITH_FAST 1
-#define WITH_SEM_SWITCH_FULL 0
-#define WITH_SEM_SWITCH_FAST 1
-#endif
-#endif
diff --git a/sim/i960/traps.c b/sim/i960/traps.c
deleted file mode 100644
index 570fc95eeba..00000000000
--- a/sim/i960/traps.c
+++ /dev/null
@@ -1,214 +0,0 @@
-/* i960 exception, interrupt, and trap (EIT) support
- Copyright (C) 1998, 1999 Free Software Foundation, Inc.
- Contributed by Cygnus Solutions.
-
-This file is part of GDB, the GNU debugger.
-
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License along
-with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
-
-#include "sim-main.h"
-#include "targ-vals.h"
-
-/* The semantic code invokes this for illegal (unrecognized) instructions. */
-
-SEM_PC
-sim_engine_invalid_insn (SIM_CPU *current_cpu, IADDR cia, SEM_PC vpc)
-{
- SIM_DESC sd = CPU_STATE (current_cpu);
-
-#if 0
- if (STATE_ENVIRONMENT (sd) == OPERATING_ENVIRONMENT)
- {
- h_bsm_set (current_cpu, h_sm_get (current_cpu));
- h_bie_set (current_cpu, h_ie_get (current_cpu));
- h_bcond_set (current_cpu, h_cond_get (current_cpu));
- /* sm not changed */
- h_ie_set (current_cpu, 0);
- h_cond_set (current_cpu, 0);
-
- h_bpc_set (current_cpu, cia);
-
- sim_engine_restart (CPU_STATE (current_cpu), current_cpu, NULL,
- EIT_RSVD_INSN_ADDR);
- }
- else
-#endif
- sim_engine_halt (sd, current_cpu, NULL, cia, sim_stopped, SIM_SIGILL);
- return vpc;
-}
-
-/* Process an address exception. */
-
-void
-i960_core_signal (SIM_DESC sd, SIM_CPU *current_cpu, sim_cia cia,
- unsigned int map, int nr_bytes, address_word addr,
- transfer_type transfer, sim_core_signals sig)
-{
-#if 0
- if (STATE_ENVIRONMENT (sd) == OPERATING_ENVIRONMENT)
- {
- h_bsm_set (current_cpu, h_sm_get (current_cpu));
- h_bie_set (current_cpu, h_ie_get (current_cpu));
- h_bcond_set (current_cpu, h_cond_get (current_cpu));
- /* sm not changed */
- h_ie_set (current_cpu, 0);
- h_cond_set (current_cpu, 0);
-
- h_bpc_set (current_cpu, cia);
-
- sim_engine_restart (CPU_STATE (current_cpu), current_cpu, NULL,
- EIT_ADDR_EXCP_ADDR);
- }
- else
-#endif
- sim_core_signal (sd, current_cpu, cia, map, nr_bytes, addr,
- transfer, sig);
-}
-
-/* Read/write functions for system call interface. */
-
-static int
-syscall_read_mem (host_callback *cb, struct cb_syscall *sc,
- unsigned long taddr, char *buf, int bytes)
-{
- SIM_DESC sd = (SIM_DESC) sc->p1;
- SIM_CPU *cpu = (SIM_CPU *) sc->p2;
-
- return sim_core_read_buffer (sd, cpu, read_map, buf, taddr, bytes);
-}
-
-static int
-syscall_write_mem (host_callback *cb, struct cb_syscall *sc,
- unsigned long taddr, const char *buf, int bytes)
-{
- SIM_DESC sd = (SIM_DESC) sc->p1;
- SIM_CPU *cpu = (SIM_CPU *) sc->p2;
-
- return sim_core_write_buffer (sd, cpu, write_map, buf, taddr, bytes);
-}
-
-/* Trap support.
- The result is the pc address to continue at.
- Preprocessing like saving the various registers has already been done. */
-
-USI
-i960_trap (SIM_CPU *current_cpu, PCADDR pc, int num)
-{
- SIM_DESC sd = CPU_STATE (current_cpu);
- host_callback *cb = STATE_CALLBACK (sd);
-
-#ifdef SIM_HAVE_BREAKPOINTS
- /* Check for breakpoints "owned" by the simulator first, regardless
- of --environment. */
- if (num == TRAP_BREAKPOINT)
- {
- /* First try sim-break.c. If it's a breakpoint the simulator "owns"
- it doesn't return. Otherwise it returns and let's us try. */
- sim_handle_breakpoint (sd, current_cpu, pc);
- /* Fall through. */
- }
-#endif
-
-#if 0
- /* ??? wilson, don't know what this does. */
- if (STATE_ENVIRONMENT (sd) == OPERATING_ENVIRONMENT)
- {
- /* The new pc is the trap vector entry.
- We assume there's a branch there to some handler. */
- USI new_pc = EIT_TRAP_BASE_ADDR + num * 4;
- return new_pc;
- }
-#endif
-
- switch (num)
- {
- default:
- case TRAP_SYSCALL :
- {
- CB_SYSCALL s;
-
- CB_SYSCALL_INIT (&s);
- s.func = num;
- s.arg1 = a_i960_h_gr_get (current_cpu, 16);
- s.arg2 = a_i960_h_gr_get (current_cpu, 17);
- s.arg3 = a_i960_h_gr_get (current_cpu, 18);
-
- if (s.func == TARGET_SYS_exit)
- {
- sim_engine_halt (sd, current_cpu, NULL, pc, sim_exited, s.arg1);
- }
-
- s.p1 = (PTR) sd;
- s.p2 = (PTR) current_cpu;
- s.read_mem = syscall_read_mem;
- s.write_mem = syscall_write_mem;
- cb_syscall (cb, &s);
- /* ??? This stuff is probably wrong, but libgloss doesn't look at
- these values, so it shouldn't matter. */
- a_i960_h_gr_set (current_cpu, 18, s.errcode);
- a_i960_h_gr_set (current_cpu, 16, s.result);
- a_i960_h_gr_set (current_cpu, 17, s.result2);
- break;
- }
-
- case TRAP_BREAKPOINT:
- sim_engine_halt (sd, current_cpu, NULL, NULL_CIA,
- sim_stopped, SIM_SIGTRAP);
- break;
-
-#if 0
- /* ??? wilson, don't know what this does. */
- default :
- {
- USI new_pc = EIT_TRAP_BASE_ADDR + num * 4;
- return new_pc;
- }
-#endif
- }
-
- /* Fake an "rte" insn. */
- /* FIXME: Should duplicate all of rte processing. */
- return (pc & -4) + 4;
-}
-
-/* Breakpoint support.
- The result is the pc address to continue at. */
-/* ??? This is an editted copy of the above. */
-
-USI
-i960_breakpoint (SIM_CPU *current_cpu, PCADDR pc)
-{
- SIM_DESC sd = CPU_STATE (current_cpu);
- host_callback *cb = STATE_CALLBACK (sd);
-
-#ifdef SIM_HAVE_BREAKPOINTS
- /* Check for breakpoints "owned" by the simulator first, regardless
- of --environment. */
- if (num == TRAP_BREAKPOINT)
- {
- /* First try sim-break.c. If it's a breakpoint the simulator "owns"
- it doesn't return. Otherwise it returns and let's us try. */
- sim_handle_breakpoint (sd, current_cpu, pc);
- /* Fall through. */
- }
-#endif
-
- sim_engine_halt (sd, current_cpu, NULL, NULL_CIA,
- sim_stopped, SIM_SIGTRAP);
-
- /* Fake an "rte" insn. */
- /* FIXME: Should duplicate all of rte processing. */
- return (pc & -4) + 4;
-}
diff --git a/sim/igen/ChangeLog b/sim/igen/ChangeLog
deleted file mode 100644
index ea88fb0ad06..00000000000
--- a/sim/igen/ChangeLog
+++ /dev/null
@@ -1,1020 +0,0 @@
-Tue May 23 21:39:23 2000 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-2000-04-12 Frank Ch. Eigler <fche@redhat.com>
-
- * gen-semantics.c (print_semantic_body): Use GPR_CLEAR(N) instead
- of GPR_SET(N,0) for gen-zero-rN.
-
-Thu Sep 2 18:15:53 1999 Andrew Cagney <cagney@b1.cygnus.com>
-
- * Makefile.in (SIM_WARNINGS): Replace this with.
- (IGEN_WERROR_CFLAGS, IGEN_WARN_CFLAGS, WERROR_CFLAGS,
- WARN_CFLAGS): With these.
- (BUILD_CFLAGS): Update.
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-1999-05-08 Felix Lee <flee@cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Fri Dec 4 15:14:09 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * igen.c (main): Fix -Pitable=.
-
- * gen-engine.c (print_run_body): Prefix instruction_address.
-
-Wed Oct 28 18:12:43 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * Makefile.in (SIM_WARNINGS): Update to match ../common/aclocal.m4
- changes.
-
-Wed Aug 12 10:55:28 1998 Frank Ch. Eigler <fche@cygnus.com>
-
- * gen-icache.c (print_icache_extraction): #undef a generated
- symbol before #define'ing it, to remove conflict with system
- macros.
-
-Wed Jul 29 10:07:27 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * gen.c (gen_entry_expand_opcode): For conditional, fields. Fix
- the extraction of the value from its source - both table and bit
- cases were wrong.
-
-Tue Jul 28 11:19:43 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * ld-insn.c (parse_insn_word): For constant conditional strings,
- encode their bit value.
-
- * ld-insn.c (parse_insn_word, parse_insn_words): Allow conditional
- operands to refer to fields in earlier instruction words.
-
- * gen.c (sub_val): Replace field argument with val_last_pos.
- (gen_entry_expand_opcode): Look in previous tables for a value for
- a conditional field as well as the bits from the current table.
- (insn_list_insert): Add sort key of instructions where
- their operand fields have different conditionals.
- (insn_field_cmp): New function.
-
-Sun Apr 26 15:31:55 1998 Tom Tromey <tromey@creche>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
- * config.in: Ditto.
-
-Sun Apr 26 15:20:08 1998 Tom Tromey <tromey@cygnus.com>
-
- * acconfig.h: New file.
- * configure.in: Reverted change of Apr 24; use sinclude again.
-
-Fri Apr 24 14:16:40 1998 Tom Tromey <tromey@creche>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
- * config.in: Ditto.
-
-Fri Apr 24 11:19:33 1998 Tom Tromey <tromey@cygnus.com>
-
- * configure.in: Don't call sinclude.
-
-Fri Apr 24 19:45:00 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * gen-icache.c (print_icache_extraction): Do not type cast
- pointers.
-
- * ld-insn.c (load_insn_table): Terminate error with NL.
-
- * gen.c (insns_bit_useless): Perform unsigned bit comparisons.
-
- * filter.c (is_filtered_out, filter_parse): Pacify GCC, len is
- unsigned.
-
-Wed Apr 22 14:27:39 1998 Michael Meissner <meissner@cygnus.com>
-
- * configure: Reconfigure to pick up ../common/aclocal.m4 changes
- to suppress inlining by default.
-
-Tue Apr 21 01:37:54 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * gen-icache.c (print_icache_extraction): When generating #define
- force the expression to the correct type.
-
-Thu Apr 16 08:50:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * misc.c (name2i): strlen returns an unsigned.
-
-Tue Apr 14 19:04:28 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * igen.h (struct igen_warn_options): Add unimplemented option.
- * igen.c (main): Update
-
- * ld-insn.c (load_insn_table): Report unimplemented functions.
-
-Tue Apr 14 10:57:26 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * ld-insn.c (parse_insn_word): Treat `!' and `=' as valid
- separator tokens when parsing a conditional.
-
- * igen.h (main): Add option -S so that suffix can be specified.
-
-Tue Apr 14 08:44:53 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * igen.h (struct igen_trace_options): Add members insn_expansion
- and insn_insertion.
-
- * igen.c (main): Add options -Gtrace-insn-expansion,
- -Gtrace-insn-insertion and -Gtrace-all.
-
- * gen.c (gen_entry_expand_insns): Trace each instruction as it is
- selected for expansion.
- (gen_entry_expand_opcode): Trace each expanded instruction as it
- is inserted into the table.
-
-Mon Apr 13 19:21:47 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * ld-insn.c (parse_insn_word): Parse conditional operators.
- (parse_insn_word): Verify field conditionals.
-
- * ld-insn.h: Extend syntax to allow macros and field equality.
- (struct insn_field_cond): Rename insn_field_exclusion, add type.
-
- * gen.c (gen_entry_expand_opcode): Check type of conditional.
- (insns_bit_useless): Ditto.
-
- * ld-insn.c (parse_macro_record): New function.
-
-Mon Apr 13 22:37:47 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * ld-insn.h (enum insn_field_type): Add insn_field_invalid.
-
- * ld-insn.c (parse_insn_word): Check instruction field type
- correctly initialized.
- (print_insn_words): Ditto.
- (insn_field_type_to_str): Ditto.
- (dump_insn_field): Ditto.
-
- * gen.c (insns_bit_useless): Ditto.
-
-Fri Apr 3 18:08:16 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * gen.h, igen.c (print_include_inline, print_includes,
- print_includes): New functions. Generate include list. For for
- semantics et.al. generate CPP code to inline when
- C_REVEALS_MODULE_P.
-
- * igen.c (gen_semantics_c): Call print_includes.
- * gen-engine.c (gen_engine_c): Ditto.
-
-Sat Apr 4 21:09:11 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * igen.h: (struct _igen_name_option): Replace with struct
- igen_module_option. Contains both module prefix and suffix.
- (INIT_OPTIONS): Initialize.
-
- * igen.c (main): Update -P option to fill in full module info.
- (gen-engine.c, gen-icache.c, gen-itable.c, gen-semantics.c,
- gen-support.c): Update.
-
-Sat Apr 4 02:15:35 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * igen.c (print_itrace): Use TRACE_ANY_P macro to determine if any
- tracing is needed.
-
-Thu Mar 26 20:51:23 1998 Stu Grossman <grossman@bhuna.cygnus.co.uk>
-
- * table.c (table_push): Redo, using stdio. Fixes NT native
- problem with <CRLF>=><LF> translation...
-
-Tue Mar 24 23:30:07 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * gen-engine.c (print_run_body): Re-extract the CIA after
- processing any events.
-
-Tue Mar 24 17:46:08 1998 Stu Grossman <grossman@bhuna.cygnus.co.uk>
-
- * Makefile.in: Get SHELL from configure.
- * configure: Regenerate with autoconf 2.12.1 to fix shell issues for
- NT native builds.
-
-Mon Mar 16 12:51:31 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * igen.c: Pass sim_cia to trace_prefix.
-
-Thu Feb 26 19:25:02 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * ld-insn.c (parse_function_record): Check models are valid.
- (parse_function_record): Only discard function when no model is
- common.
-
-Tue Feb 24 01:42:03 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * gen-engine.c (print_run_body): Always wrap generated idecode
- body in ENGINE_ISSUE_PREFIX_HOOK / ENGINE_ISSUE_POSTFIX_HOOK.
-
-Fri Feb 20 16:22:10 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * ld-insn.c (parse_function_record): When -Wnodiscard, suppress
- discarded function warning.
-
- * igen.c (main): Clarify -Wnodiscard.
-
- * ld-insn.c (parse_function_record): For functions, allow use of
- instruction style function model records
-
- * ld-insn.h (nr_function_model_fields): Define.
-
-Tue Feb 17 16:36:27 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * igen.c (print_itrace_prefix): Generate call to trace_prefix
- instead of trace_one_insn.
- (print_itrace): Generate trace_prefix call if any tracing enabled,
- (print_itrace): Nest generated call to trace_generic inside
- conditional for any tracing enabled.
- (print_itrace_prefix): Do not pass PHASE to trace_prefix.
-
-Tue Feb 3 14:00:32 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * gen-engine.c (print_run_body): Add bitsize suffix to IMEM macro.
- * gen-icache.c (print_icache_body): Ditto.
- * gen-idecode.c (print_idecode_ifetch): Ditto.
-
- * gen-icache.c (print_icache_body): Mark successive instruction
- words as unused.
-
- * ld-insn.c (parse_insn_word): Only report insn-width problems
- when warning enabled.
-
- * igen.h: Add flag for warning about invalid instruction widths.
- * igen.c: Parse -Wwidth option.
-
- * gen-support.c (gen_support_h): Map instruction_word onto
- <PREFIX>_instruction_word when needed.
- (print_support_function_name): Use support prefix.
- (gen_support_h): Ditto for <PREFIX>_idecode_issue.
-
-Sun Feb 1 11:08:48 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * gen-support.c (gen_support_h): Generate new macro CPU_.
-
-Sat Jan 31 14:50:27 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * gen-engine.c (gen_engine_h): Don't assume a model is present.
- (gen_engine_c): Ditto.
-
- * igen.c (gen_run_c): Ditto.
-
- * gen-engine.c (print_run_body): Use CIA_GET & CIA_SET instead of
- CPU_CIA. Parameterize with CPU argument.
-
-Fri Jan 30 09:09:39 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * gen.h (struct _gen_list): Replace processor with model.
-
- * igen.c (gen_idecode_h): Update.
- (gen_run_c): For generated switch, use model->full_name.
-
- * gen.c (print_gen_entry_path): Ditto.
- (make_table): Ditto.
- (gen_entry_expand_insns): Ditto.
- (make_gen_tables): Ditto.
-
- * igen.c (gen_run_c): Add extra argument `nr_cpus' to generated
- function sim_engine_run. Pass argument on to engine_run.
-
- * gen-engine.c (print_engine_run_function_header): Add extra
- argument `nr_cpus' to generated function engine_run.
- (print_run_body): Fix SMP case.
-
- * gen-support.c (support_c_function): Call sim_engine_abort when
- internal function fails to long jump.
-
-Wed Jan 21 18:00:22 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * gen-semantics.c (print_semantic_body): Use GPR_SET to zero
- hardwired register.
-
-Wed Dec 17 14:49:03 1997 Jeffrey A Law (law@cygnus.com)
-
- * gen-semantics.c (print_semantic_body): Fix handling of
- hardwired zero register.
-
-Tue Dec 9 12:45:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * igen.h (struct _igen_gen_options): Add member default_model.
-
- * igen.c (gen_run_c): Default to the first machine in the
- multi-sim list.
- (main): Add MODEL parameter to gen-multi-sim option.
-
- * gen.h (function_decl_type): Declare enum.
-
- * gen-engine.c (print_engine_run_function_header), gen-engine.h:
- Make global, pass function_decl_type as argument.
- (gen_engine_h, gen_engine_c): Update call.
-
- * gen-idecode.c (print_idecode_issue_function_header),
- gen-idecode.h: Pass function_decl_type as argument.
-
- * igen.c (gen_idecode_h): For multi-sim, delcare global variable
- idecode_issue.
-
- * igen.c (gen_run_c): For multi-sim, initialize globals
- idecode_issue and engine_run.
-
-Fri Nov 14 10:51:44 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * ld-insn.c (parse_insn_model_record): Allow multiple model names
- to be specified in a single instruction model record.
- (dump_insn_model_entry): Update.
-
- * ld-insn.h (struct _insn_model_entry): Replace member name with
- the filter names. Document syntax change.
-
-Wed Nov 12 15:45:40 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * gen-engine.c (print_run_body): Add hooks for adding code before
- and after an instruction has been issued.
-
-1997-11-04 Brendan Kehoe <brendan@lisa.cygnus.com>
-
- * gen-idecode.c (print_jump_until_stop_body): Use `#if 0' instead of
- `#ifdef 0' around this.
-
-Tue Nov 4 08:18:29 1997 Michael Meissner <meissner@cygnus.com>
-
- * ld-decode.c (load_decode_table): Don't assume NULL is an integer
- constant.
-
-Wed Oct 29 13:17:17 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * ld-insn.h: Document mnemonic string format.
-
-Tue Oct 28 10:50:35 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * gen-icache.c (print_icache_extraction): Force result of atol to
- unsigned.
-
- * ld-insn.c (parse_function_record): Separate handling of old and
- ney fynction records.
- (load_insn_table): For %s record, hack function name & type after
- it has been parsed.
-
- * filter.h (filter_is_subset): Reverse argument names, wrong
- order.
-
- * ld-insn.c (load_insn_table): Move include code to.
- (parse_include_record): New function. Check for filtering of
- include statement by both flags and models.
- (load_insn_table): Check for model filtering of cache and model
- records.
- (parse_model_data_record): Check for model & flag filtering of
- model data records.
- (parse_function_record): Check for model & flag filtering of
- function records.
-
- * ld-insn.h: Define record_filter_models_field. Add filter-models
- field to all but instruction records.
- (struct _function_entry, struct _cache_entry): Add models field.
- (nr_function_fields): Make parm field mandatory.
-
-Mon Oct 27 15:14:26 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * igen.c (main): Change -I option to -I<directory>. Add optional
- size to -Ggen-icache option. Add -Gno-... support.
-
- * igen.h (struct _igen_options): Add include field.
-
- * ld-insn.c (enum insn_record_type, insn_type_map): Add
- include_record.
- (load_insn_table): Call table_push when include record.
-
- * table.c (struct _open table, struct table): Make table object an
- indirect ptr to the current table file.
- (current_line, new_table_entry, next_line): Make file arg type
- open_table.
- (table_open): Use table_push.
- (table_read): Point variable file at current table, at eof, pop
- last open table.
-
- * table.h, table.c (table_push): New function.
-
-Thu Oct 16 11:03:27 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * gen-semantics.c (print_semantic_body): Use CIA not
- cia.ip. Escape newlines at end of generated call to
- sim_engine_abort.
-
-Tue Oct 14 11:13:27 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * igen.c (print_itrace): Output line-ref to igen source file when
- generating trace statements.
- (print_itrace_prefix, print_itrace_format): Escape newline at end
- of each line of generated call to trace function.
-
-Mon Oct 13 11:27:31 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * gen-support.c (gen_support_h): Generate #define NIA. Definition
- dependant on gen-delayed-branch mode.
-
- * ld-insn.c (parse_insn_mnemonic_record): Check for opening and
- closing double quote in mnemonic field.
- (parse_option_record): Add gen-delayed-branch option.
-
-Wed Oct 8 13:10:16 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * gen.c (insn_list_insert): Missing \n in warning.
-
- * ld-insn.c (load_insn_table): Only notify of discarded
- instrctions when warn.discard enabled.
-
- * igen.h: Add option.warn.discard, default enabled.
-
- * igen.c (main): Add -Wnodiscard option.
-
- * ld-insn.c (record_type): For old record type, check the number
- of fields is correct.
- (load_insn_table): Allow insn assembler and insn model records to
- appear in any order.
- (parse_insn_model_record): Rename from parse_insn_model_records.
- Parse only one record.
- (parse_insn_mnemonic_record): Rename from
- parse_insn_mnemonic_records. Parse only one record.
-
-Tue Sep 23 15:52:06 1997 Felix Lee <flee@yin.cygnus.com>
-
- * gen-itable.c (gen_itable_h): [nr_itable_* + 1] to avoid
- illegal zero-sized array.
- (itable_print_set): likewise, avoid empty initializers.
-
-Mon Sep 22 18:49:07 1997 Felix Lee <flee@cygnus.com>
-
- * configure.in: i386-windows is a cross, so don't expect
- libiberty to be there.
- * configure: updated.
-
-Fri Sep 19 10:36:30 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * igen.c (print_function_name): Put the format name after the
- function / instruction name, not before.
- (print_itrace): Better format trace code.
-
-Tue Sep 16 11:01:07 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * gen.c (insns_bit_useless): Don't treat string fields restricted
- to a range of values as useless.
-
-Mon Sep 15 15:47:21 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * igen.c (gen_run_c): Handle non-multi-sim case.
-
- * gen-support.c (gen_support_h): Define SD_ - to replace _SD.
- Define CIA from cia.
-
-Thu Sep 11 10:27:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * gen-semantics.c (print_semantic_body): Trace the instruction
- after it has been validated.
- (print_semantic_body): Count the instruction using sim-profile.
-
-Wed Sep 10 13:35:37 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * gen-itable.c (gen_itable_h): Collect summary info on instruction
- table when traversing it.
- (gen_itable_h): Output an enum defining the max size of each of
- the itable string members.
-
-Tue Sep 9 03:30:26 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * igen.c (gen_run_c): New function. Generate sim_engine_run that
- looks at the currently selected architecture.
-
- * gen-engine.c, gen-idecode.c: Add multi-sim support - generate
- one engine per model.
-
- * gen-semantics.c, gen-icache.c gen-support.c:
- Update.
-
- * ld-insn.h, ld-insn-h (load_insn_table): Rewrite. table.h only
- returns a line at a time. Parse multi-word instructions. Add
- multi-sim support.
-
- * table.h, table.c: Simplify. Only parse a single line at a time.
- ld-insn can handle the rest.
-
- * filter.h, filter.c (filter_parse, filter_add, filter_is_subset,
- filter_is_common, filter_is_member, filter_next): New filter
- operations.
- (dump_filter): Ditto.
-
- * gen.h, gen.c: New file. Takes the insn table and turns it into
- a set of decode tables and semantic functions.
-
- * ld-insn.c: Copy generator code from here.
- * gen.c: To here.
-
-Fri Aug 8 11:43:45 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * misc.h (NZALLOC): Allocate an N element array of TYPE.
-
- * table.h, table.c: Simplify table parser so that it only
- understands colon delimited lines and code blocks.
- (table_read): Parse '{' ... '}' as a code block.
- (table_print_code): New function, print out a code block to file.
- (main): Add suport for standalone testing.
-
- * ld-insn.h, ld-insn.c:
-
-
-Mon Sep 1 11:41:12 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * gen-idecode.c (error_leaf_contains_multiple_insn): Make static.
- (print_jump_definition, print_jump, print_jump_internal_function,
- print_jump_insn, print_jump_until_stop_body): Delete, moved to
- sim-engine.c
-
- * igen.c (print_itrace_format): Delete unused variable chp.
- (gen-engine.h): Include.
-
- * table.c (current_file_name, current_line_entry,
- current_line_entry): Make static.
-
-Wed Aug 6 12:31:17 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure.in: Define AR_FOR_BUILD, AR_FLAGS_FOR_BUILD,
- RANLIB_FOR_BUILD and CFLAGS_FOR_BUILD.
- * configure.in: Include simulator common/aclocal.m4.
- * configure.in: Add --enable-sim-warnings option.
- * configure: Re-generate.
-
- * Makefile.in: Use.
-
- * Makefile.in (tmp-filter): New rule.
- (igen.o, tmp-table, tmp-ld-decode, tmp-ld-cache, tmp-ld-insn,
- ld-decode.o, ld-cache.o, ld-insn.o): Fix dependencies.
-
- * gen.h, gen.c: New files.
-
- * Makefile.in (gen.o, tmp-gen): New rules, update all
- dependencies.
-
-Tue Jun 24 11:46:45 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * ld-insn.c (load_insn_table): Accept %s as a function type.
-
-Thu Jun 5 17:14:32 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * igen.c (print_itrace_prefix): Move printing of insn prefix to
- here.
- (print_itrace_format): Drop printing of MY_NAME in instruction
- trace. Printing of insn prefix moved.
- (print_itrace): Ditto.
-
-Fri May 30 11:27:37 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * gen-icache.c (print_icache_function_header): Pass
- table_line_entry instead of separate file and line.
-
- * table.c (table_entry_read): Set assembler source file/line-nr to
- the current not initial file.
- (table_entry_read): Fix line numbering of source files.
-
- table.h (table_line_entry): New structure. Exactly specifies a
- source file/line-nr.
- (table_*_entry): Add this to all.
-
- table.c (table_entry_print_cpp_line_nr): Change to use values from
- a table_line_entry struct.
- (table_entry_read): Save table_line_entry in all structures read.
-
- gen-icache.c, gen-support.c, gen-idecode.c, gen-semantics.c,
- gen-model.c: Update all references.
-
-Thu May 29 10:29:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * igen.c (print_my_defines): Define MY_NAME - a string. For
- MY_PREFIX, undefine the name of the function incase some dumb
- header defined it. it.
- (print_itrace): Use MY_NAME not MY_PREFIX.
-
- * lf.c (lf_write): New function write an N character buffer to the
- file.
-
- * igen.c (print_itrace): When available, use the assembler to
- print the insn-trace.
- (print_itrace_prefix): New function, print first part of call to
- print_one_insn.
- (print_itrace_format): New function, print fmt argument for
- print_one_insn.
-
- * table.c (table_entry_read): Save any assembler lines instead of
- discarding them.
-
-Wed May 28 09:55:29 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * gen-icache.c (print_icache_body): Process immeds.
-
- * gen-semantics.c (print_semantic_body): When computing NIA, skip
- any immed words that follow the instruction word.
-
- * ld-insn.c (parse_insn_format): Parse immeds appended to an
- instruction.
-
- * igen.c (main): Allow any register to be specified as the zero
- register.
- (semantic_zero_reg): Global, index to zero register.
-
- * gen-semantics.c (print_semantic_body): Zero selected register.
-
-Tue May 27 14:12:32 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * igen.h: Stop options and code gen type bit masks overlaping.
-
-Fri May 23 12:01:08 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * gen-semantics.c (print_semantic_body): Incorrect test for
- zero-r0 code.
-
-Fri May 16 14:32:31 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * gen-semantics.c (print_semantic_body): Use common sim-engine
- interface.
-
-Fri May 16 11:48:30 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * gen-semantics.c (print_semantic_body): Add code to clear r0.
-
- * igen.c (main): Add new option zero-r0, which adds code to clear
- GPR(0) each cycle.
-
-Wed May 7 12:31:30 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * igen.c (print_itrace): Fix so line-nr is passed to trace
- function.
-
- * gen-idecode.c (print_idecode_validate): Correct FP code.
-
- * gen-support.c (gen_support_h): Always pass MY_INDEX to support
- functions.
- (print_support_function_name): Ditto.
-
-Tue May 6 06:12:04 1997 Mike Meissner <meissner@cygnus.com>
-
- * igen.c (print_itrace): Call trace_one_insn to trace
- instructions, rather than doing it directly.
-
-Mon May 5 14:11:46 1997 Mike Meissner <meissner@cygnus.com>
-
- * gen-engine.c (engine_switch_leaf): Remove extra %s.
- (print_engine_floating_point_unavailable): Wrap in #ifdef
- UNUSED/#endif, until somebody uses it.
-
- * gen-idecode.c (error_leaf_contains_multiple_insn): Remove unused
- variable.
- (print_jump_until_stop_body): Wrap in #ifdef UNUSED/#endif, until
- somebody uses it.
- (print_idecode_validate): Use long formats to print long values.
-
- * gen-semantics.c (print_idecode_invalid): Set name to "unknown"
- if we get an unexpected type.
-
-Fri May 2 13:28:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * igen.c (print_itrace): Pass SD as well as CPU to calls to
- trace_printf.
-
- * gen-support.c (gen_support_h): Always pass sim_cia cia to
- support functions.
- (print_support_function_name): Ditto.
-
-Wed Apr 30 17:35:51 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * gen-support.c (support_c_function): Remove unnecessary memset of
- cia.
- * gen-semantics.c (print_semantic_body): Wasn't closing
- generated comment.
-
-Tue Apr 29 11:11:12 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * ld-insn.c (load_insn_table): Report instructions that do not
- have at least a format and name.
- (insn_table_find_opcode_field): Check progress is being made.
-
- * gen-support.c (support_c_function): Report empty function body.
-
-Thu Apr 24 11:43:45 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * ld-insn.c (insn_table_expand_opcode): Allow reserved fields to
- be broken up.
- (insn_table_expand_insns): Allow special rules to apply to groups
- of instructions when all members of the group match the special
- mask/value.
-
- * gen-semantics.c (print_c_semantic): Ditto.
- * igen.c (print_semantic_function_formal): Ditto.
- (print_semantic_function_type): Ditto.
- * igen.c (print_icache_function_formal): Ditto.
- * gen-idecode.c (print_idecode_issue_function_body): Ditto.
-
- * gen-idecode.c (gen_idecode_h): Prepend the global_prefix to the
- instruction_address type.
-
- * gen-semantics.c (print_semantic_body): Call cpu_error when an
- unimplemented instruction is encountered - gives the interpreter
- the chance to stop correctly.
-
-Wed Apr 23 20:06:36 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * igen.c (print_function_name): Allow dot's in instruction names.
-
-Tue Apr 22 21:46:28 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * igen.c (main), igen.h: Support new option - delayed-branch -
- generate code to drive a delayed branch processor.
-
- * gen-idecode.c (gen_idecode_h): Define instruction_address type.
-
- * igen.c (print_icache_function_formal): Replace address_word with
- instruction_address.
- (print_semantic_function_formal): Ditto.
- (print_semantic_function_type): Ditto.
- * gen-idecode.c (print_idecode_issue_function_body): Ditto.
-
- * gen-semantics.c (print_semantic_body): Ditto.
- (print_c_semantic): Ditto.
-
- * gen-support.c (support_c_function): Return a zeroed CIA instead
- of just zero - works with any cia type.
-
- * igen.c (print_itrace): For delayed branch case, print just the
- current instruction.
-
-Thu Apr 17 07:02:33 1997 Doug Evans <dje@canuck.cygnus.com>
-
- * igen.c (print_itrace): Use TRACE_FOO_P and trace_printf.
-
-Tue Apr 15 15:20:31 1997 Ian Lance Taylor <ian@cygnus.com>
-
- * Makefile.in (INSTALL): Set to @INSTALL@.
- (INSTALL_XFORM, INSTALL_XFORM1): Remove.
-
-Mon Apr 14 16:29:34 1997 Ian Lance Taylor <ian@cygnus.com>
-
- * Makefile.in (INSTALL): Change install.sh to install-sh.
-
-Wed Apr 2 18:51:20 1997 Doug Evans <dje@canuck.cygnus.com>
-
- * gen-support.c (gen_support_c): sim-state.h renamed to sim-main.h.
- * gen-idecode.c (gen_idecode_c): Likewise.
- * igen.c (gen_semantics_c): Likewise.
-
-Mon Mar 24 10:10:08 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
-
- * gen-icache.c (print_icache_body): No longer define cpu/sd,
- support.h now defines CPU/SD globally.
-
- * gen-model.c (gen_model_h): Ditto.
-
- * gen-idecode.c (print_idecode_issue_function_body): Ditto.
- (print_jump): Ditto.
- (print_jump_until_stop_body): Ditto.
- (print_idecode_validate): Ditto.
-
- * gen-icache.c (print_icache_body): Ditto.
-
- * gen-semantics.c (print_semantic_body): Ditto.
-
- * igen.c (print_semantic_function_formal): Rename cpu to sim_cpu,
- processor to cpu.
- (print_icache_function_formal): Ditto.
-
- * gen-support.c (print_support_function_name): Include sd/cpu arg
- in support function argument list.
- (support_c_function): Generate code to cpu/sd from sd/cpu.
- (gen_support_h): Define _SD the argument prefix for all support
- functions. Define SD/CPU to determine sd/cpu from value of _SD
- macro.
-
-Tue Mar 18 15:52:24 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
-
- * gen-support.c (gen_support_c): Update for renaming of engine to
- sim-state.
-
- * igen.c: Ditto.
- * gen-idecode.c (gen_idecode_c): Ditto.
-
-Mon Mar 17 15:17:07 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
-
- * ld-decode.c (load_decode_table): Rename slash to reserved.
- (dump_decode_rule): Ditto.
-
- * ld-insn.c (parse_insn_format): Differentiate between a `/' -
- reserved bit - and a `*' - wild card.
- (parse_insn_format): Change is_slash to more informative reserved.
- (dump_insn_field): Ditto.
- (insn_field_is_constant): Ditto.
- (insn_table_expand_opcode): Ditto.
-
- * gen-idecode.c (print_idecode_validate): Make check_mask and
- check_val the correct integer size.
- (print_idecode_validate): Fix reserved bit check for 64 bit
- targets.
-
-Fri Mar 14 11:24:06 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
-
- * ld-insn.c (parse_insn_format): Accept '*' as an alternative of
- `/' in bit fields. `/' denotes a wild bit.
-
-Fri Mar 7 18:20:38 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
-
- * igen.h, igen.c (main): New options. Control generation of
- conditional issue and slot verification code.
-
-Fri Mar 7 18:17:25 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
-
- * gen-support.c (print_support_function_name): Prepend the global
- name prefix when applicable. Provide #define to map the user
- specified name the generated globaly unique one.
-
-Fri Mar 7 18:07:45 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
-
- * gen-idecode.c (print_idecode_validate): Wrap each of the checks
- - reserved bits, floating point and slot validation - with a
- #ifdef so that they are optional.
-
-Fri Mar 7 16:35:13 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
-
- * gen-idecode.c (error_leaf_contains_multiple_insn): New function
- - report the error of a leaf node in the decision tree containing
- several instructions.
- (print_idecode_table_leaf): Detect a leaf with multiple instructions.
- (print_idecode_switch_leaf): Ditto.
-
- * gen-semantics.h, gen-semantics.c (print_idecode_illegal,
- print_idecode_invalid): Rename former to latter. Add argument so
- that one function can generate all invalid instruction cases -
- illegal, fp-unavailable, wrong-slot.
- * gen-engine.c: Update.
-
- * gen-idecode.c: Use print_idecode_invalid to generate a function
- call for cases when fp-unavailable and the slot is wrong.
-
- * gen-idecode.c (print_idecode_validate): New check, generate code
- to verify that the instruction slot is correct.
-
- * igen.c (main): Simplify options.
-
-Wed Mar 5 09:55:55 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
-
- * igen.c (print_itrace): Remove source line reference for trace
- code - let the user see the generated file.
- (print_itrace): Print the trace code rather than reference a
- macro.
-
-Tue Mar 4 17:31:55 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
-
- * igen.c (print_semantic_function_actual): Pass either the
- processor - smp - or the engine - mono - into semantic functions.
- Don't pass in both.
-
- * gen-icache.c (print_icache_body): Dependant on smp, derive
- processor from engine or engine from processor, and hence ensuring
- that both are defined in all semantic functions.
-
-Mon Mar 3 17:11:21 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
-
- * ld-insn.c (parse_insn_format): Make the width field optional.
- If missing assume that the number of characters in the value
- determines the number of bits in the field.
-
-Thu Feb 27 11:27:48 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
-
- * ld-insn.c (insn_table_expand_opcode): Replace assertion with
- more useful error message.
-
-Tue Feb 25 16:43:27 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
-
- * misc.c (error): Output errors on stderr.
-
- * ld-insn.c (parse_insn_format): Skip any leading spaces.
- Verify the width of instructions being parsed.
-
- * table.c (table_entry_read): Parse CPP's convention for
- specifying original file name/line-nr.
-
-Wed Feb 19 12:30:28 1997 Andrew Cagney <cagney@critters.cygnus.com>
-
- * ld-insn.c (parse_insn_format): Allow trailing spaces in
- instruction fields.
-
- * Makefile.in: Create using ../ppc/Makefile.in as a starting
- point.
- * configure.in: Ditto vis ../ppc/configure.in
-
-Mon Feb 17 10:44:18 1997 Andrew Cagney <cagney@critters.cygnus.com>
-
- * gen-support.c (gen_support_c): Always include engine.h instead
- of cpu.h
- * gen-idecode.c (gen_idecode_c): Ditto.
-
- * words.h (instruction_word): Remove instruction_word - now
- generated by igen.
- (address_word): New. Used by igen.
-
- * lf.c (lf_print_function_type_function): New, pass a function to
- print out the type instead of a constant string.
-
- * igen.h, igen.c (print_semantic_function_formal,
- SEMANTIC_FUNCTION_FORMAL): Relace macro with function.
- (print_semantic_function_actual, SEMANTIC_FUNCTION_ACTUAL): Ditto.
- (print_semantic_function_type, SEMANTIC_FUNCTION_TYPE): Ditto.
- (print_icache_function_type, ICACHE_FUNCTION_TYPE): Ditto.
- (print_icache_function_formal, ICACHE_FUNCTION_FORMAL): Ditto.
- (print_icache_function_actual, ICACHE_FUNCTION_ACTUAL): Ditto.
- * gen-idecode.c (print_idecode_table): Update.
- (idecode_switch_leaf): Update.
- (print_idecode_switch_function_header): Ditto.
- (print_idecode_floating_point_unavailable): Ditto.
- (print_idecode_issue_function_header): Ditto.
- * igen.c (gen_icache_h): Ditto.
- * gen-engine.c (print_engine_table): Ditto.
- (engine_switch_leaf): Ditto.
- * gen-support.c (print_support_function_name): Ditto.
- * gen-semantics.c (print_semantic_function_header): Update.
- Update.
- * gen-icache.c (print_icache_function_header): Update.
- (print_icache_function): Update.
- (print_icache_internal_function_declaration): Update.
- (print_icache_internal_function_definition): Update.
-
- * gen-idecode.c (gen_idecode_h): Drop including of idecode_*.h
- files, will at some stage need to move it into support.
-
- * igen.h, igen.c (main): New option -e <engine> - generate a full
- simulation engine. Previously this was the -d <idecode-file>
- option.
- * gen-engine.h, gen-engine.c: Copies of gen-idecode.*. Will need
- to clean these up so that that call upon the updated gen-idecode
- code.
-
- * gen-idecode.h, gen-idecode.c: Prune out any code not relevant to
- generating a decode table.
-
- * Makefile.in (igen): Add dependencies for new gen-engine.* files.
-
- * igen.h, igen.c (main): New option -M - Control what is returned
- by semantic functions - -1/NIA vs CIA+N/NIA. Add
- generate_semantic_returning_modified_nia_only to igen_code enum.
- * gen-semantics.c (print_semantic_body): As an alternative, make
- NIA == -1 instead of CIA+insn_size by default.
-
- * igen.h, igen.c (main, global_name_prefix, global_uname_prefix):
- New option -P <prefix> - Prepend all generated functions with the
- specified prefix.
- (gen_idecode_c): Adjust.
- * gen-icache.c (print_icache_struct): Ditto.
- * gen-support.c (gen_support_c): Ditto.
-
-Sun Feb 16 15:23:15 1997 Andrew Cagney <cagney@critters.cygnus.com>
-
- * igen.c (main): Correct usage. Missleading message about ucase
- options dumping internal tables. -F now includes rather then
- excludes instructions.
-
- * misc.h, misc.c (a2i): Make 64bit.
-
- * ld-insn.h (max_insn_bit_size, default_insn_bit_size): Increase
- max to 64bits, expect trouble. Make the default 32 bits.
- * gen-idecode.c (print_idecode_table): Change EXTRACTED*
- et.al. macro's to use the insn_bit_size instead of assuming 32
- bits.
- * gen-icache.c (print_icache_extraction): Ditto.
- * gen-idecode.c (idecode_switch_start): Ditto.
- * gen-idecode.c (gen_idecode_c): Ditto
-
- * igen.h (insn_specifying_widths), igen.c (main): New option -W.
- Indicates that the instruction field of the table is specifying
- bit widths instead of bit offsets.
- * ld-insn.c (parse_insn_format): Parse instruction fields
- specifying widths.
-
- * misc.c (a2i): Allow binary numbers to be specified using the
- syntax 0bNNNN.
- * ld-insn.c: Allow such numbers to appear in the instruction
- format.
-
- * table.c (table_entry_read): Make // a valid comment character.
- (table_entry_read): Skip lines containing a leading " - these may
- eventually be used in a disasembler.
-
-Fri Feb 14 15:23:15 1997 Andrew Cagney <cagney@critters.cygnus.com>
-
- * filter.c, filter.h, gen-engine.c, gen-engine.h, gen-icache.c,
- gen-icache.h, gen-idecode.c, gen-idecode.h, gen-itable.c,
- gen-itable.h, gen-model.c, gen-model.h, gen-semantics.c,
- gen-semantics.h, gen-support.c, gen-support.h, igen.c, igen.h,
- ld-cache.c, ld-cache.h, ld-decode.c, ld-decode.h, ld-insn.c,
- ld-insn.h, lf.c, lf.h, misc.c, misc.h, table.c, table.h: Copy in
- from the ../ppc directory.
-
- * filter_host.c, filter_host.h: Copy in from the ../ppc directory
- renaming from filter_filename.[hc]
diff --git a/sim/igen/Makefile.in b/sim/igen/Makefile.in
deleted file mode 100644
index 9fff4a0ddce..00000000000
--- a/sim/igen/Makefile.in
+++ /dev/null
@@ -1,184 +0,0 @@
-#
-# This file is part of the program psim.
-#
-# Copyright (C) 1994-1997, Andrew Cagney <cagney@highland.com.au>
-#
-# This program is free software; you can redistribute it and/or modify
-# it under the terms of the GNU General Public License as published by
-# the Free Software Foundation; either version 2 of the License, or
-# (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-#
-
-default: all
-
-VPATH = @srcdir@
-srcdir = @srcdir@
-srcroot = $(srcdir)/../..
-
-prefix = @prefix@
-exec_prefix = @exec_prefix@
-
-host_alias = @host_alias@
-target_alias = @target_alias@
-program_transform_name = @program_transform_name@
-bindir = @bindir@
-libdir = @libdir@
-tooldir = $(libdir)/$(target_alias)
-
-datadir = @datadir@
-mandir = @mandir@
-man1dir = $(mandir)/man1
-man2dir = $(mandir)/man2
-man3dir = $(mandir)/man3
-man4dir = $(mandir)/man4
-man5dir = $(mandir)/man5
-man6dir = $(mandir)/man6
-man7dir = $(mandir)/man7
-man8dir = $(mandir)/man8
-man9dir = $(mandir)/man9
-infodir = @infodir@
-includedir = @includedir@
-
-SHELL = @SHELL@
-
-INSTALL = @INSTALL@
-INSTALL_PROGRAM = @INSTALL_PROGRAM@
-INSTALL_DATA = @INSTALL_DATA@
-
-AR = @AR@
-CC = @CC@
-CFLAGS = @CFLAGS@
-RANLIB = @RANLIB@
-
-AR_FOR_BUILD = @AR_FOR_BUILD@
-AR_FLAGS_FOR_BUILD = @AR_FLAGS_FOR_BUILD@
-CC_FOR_BUILD = @CC_FOR_BUILD@
-CFLAGS_FOR_BUILD = @CFLAGS_FOR_BUILD@
-RANLIB_FOR_BUILD = @RANLIB_FOR_BUILD@
-
-WARN_CFLAGS = @WARN_CFLAGS@
-WERROR_CFLAGS = @WERROR_CFLAGS@
-IGEN_WARN_CFLAGS = $(WARN_CFLAGS)
-IGEN_WERROR_CFLAGS = $(WERROR_CFLAGS)
-
-BISON = bison
-MAKEINFO = makeinfo
-
-.NOEXPORT:
-MAKEOVERRIDES=
-
-LIB_INCLUDES = -I$(srcdir)/../../include
-INCLUDES = -I. -I$(srcdir) $(LIB_INCLUDES)
-
-LIBIBERTY_LIB = @LIBIBERTY_LIB@
-
-BUILD_CFLAGS = \
- $(CFLAGS_FOR_BUILD) \
- $(IGEN_WARN_CFLAGS) \
- $(IGEN_WERROR_CFLAGS) \
- $(INCLUDES) -O0
-BUILD_LDFLAGS =
-
-all: igen
-#all: tmp-filter tmp-table tmp-ld-insn tmp-ld-cache tmp-ld-decode tmp-gen
-
-.c.o:
- $(CC_FOR_BUILD) -c $(BUILD_CFLAGS) $<
-
-
-filter_filename.o: filter_filename.c filter_filename.h config.h ppc-config.h
-
-IGEN_OBJS=\
- table.o \
- lf.o misc.o \
- filter_host.o \
- ld-decode.o \
- ld-cache.o \
- filter.o \
- ld-insn.o \
- gen-model.o \
- gen-itable.o \
- gen-icache.o \
- gen-semantics.o \
- gen-idecode.o \
- gen-support.o \
- gen-engine.o \
- gen.o
-
-igen: igen.o $(IGEN_OBJS)
- $(CC_FOR_BUILD) $(BUILD_LDFLAGS) -o igen igen.o $(IGEN_OBJS) $(LIBIBERTY_LIB)
-
-igen.o: igen.c misc.h filter_host.h lf.h table.h ld-decode.h ld-cache.h ld-insn.h filter.h gen-model.h gen-itable.h gen-icache.h gen-idecode.h gen-engine.h gen-semantics.h gen-support.h gen.h igen.h
- $(CC_FOR_BUILD) $(BUILD_CFLAGS) -c $(srcdir)/igen.c
-
-tmp-table: table.c table.h misc.o lf.o filter_host.o
- $(CC_FOR_BUILD) $(BUILD_CFLAGS) $(BUILD_LDFLAGS) -o tmp-table -DMAIN $(srcdir)/table.c misc.o lf.o filter_host.o $(BUILD_LIBS)
-
-tmp-filter: filter.c filter.h lf.o misc.o filter_host.o
- $(CC_FOR_BUILD) $(BUILD_CFLAGS) $(BUILD_LDFLAGS) -o tmp-filter -DMAIN $(srcdir)/filter.c lf.o misc.o filter_host.o $(BUILD_LIBS)
-
-tmp-ld-decode: ld-decode.h ld-decode.c filter.o misc.o lf.o table.o filter_host.o gen.h igen.h
- $(CC_FOR_BUILD) $(BUILD_CFLAGS) $(BUILD_LDFLAGS) -o tmp-ld-decode -DMAIN $(srcdir)/ld-decode.c filter.o misc.o lf.o table.o filter_host.o $(BUILD_LIBS)
-
-tmp-ld-cache: ld-cache.c ld-cache.h ld-insn.o misc.o lf.o table.o filter_host.o gen.h igen.h
- $(CC_FOR_BUILD) $(BUILD_CFLAGS) $(BUILD_LDFLAGS) -o tmp-ld-cache -DMAIN $(srcdir)/ld-cache.c ld-insn.o filter.o misc.o lf.o table.o filter_host.o $(BUILD_LIBS)
-
-tmp-ld-insn: ld-insn.c ld-insn.h misc.o lf.o table.o filter_host.o filter.o gen.h igen.h
- $(CC_FOR_BUILD) $(BUILD_CFLAGS) $(BUILD_LDFLAGS) -o tmp-ld-insn -DMAIN $(srcdir)/ld-insn.c misc.o lf.o table.o filter_host.o filter.o $(BUILD_LIBS)
-
-tmp-gen: gen.c gen.h ld-insn.o ld-decode.o misc.o lf.o table.o filter_host.o filter.o gen.h igen.h
- $(CC_FOR_BUILD) $(BUILD_CFLAGS) $(BUILD_LDFLAGS) -o tmp-gen -DMAIN $(srcdir)/gen.c misc.o ld-insn.o ld-decode.o lf.o table.o filter_host.o filter.o $(BUILD_LIBS)
-
-filter_host.o: filter_host.c filter_host.h
-table.o: table.c misc.h filter_host.h lf.h table.h
-lf.o: lf.c misc.h filter_host.h lf.h
-filter.o: filter.c misc.h lf.h table.h filter.h
-ld-decode.o: ld-decode.c misc.h lf.h table.h ld-decode.h igen.h
-ld-cache.o: ld-cache.c misc.h lf.h table.h ld-cache.h igen.h
-ld-insn.o: ld-insn.c misc.h lf.h table.h ld-insn.h gen.h igen.h
-gen-model.o: gen-model.c misc.h lf.h table.h gen-model.h ld-decode.h gen.h igen.h ld-insn.h
-gen-itable.o: gen-itable.c misc.h lf.h table.h gen-itable.h ld-decode.h gen.h igen.h ld-insn.h gen.h filter.h
-gen-icache.o: gen-icache.c misc.h lf.h table.h gen-icache.h ld-decode.h gen.h igen.h ld-insn.h gen-semantics.h gen-idecode.h filter.h
-gen-semantics.o: gen-semantics.c misc.h lf.h table.h gen-semantics.h ld-decode.h gen.h igen.h ld-insn.h filter.h
-gen-idecode.o: gen-idecode.c misc.h lf.h table.h gen-idecode.h gen-icache.h gen-semantics.h ld-decode.h gen.h igen.h ld-insn.h filter.h
-gen-engine.o: gen-engine.c misc.h lf.h table.h gen-idecode.h gen-engine.h gen-icache.h gen-semantics.h ld-decode.h gen.h igen.h ld-insn.h filter.h
-gen-support.o: gen-support.c misc.h lf.h table.h gen-support.h ld-decode.h gen.h igen.h ld-insn.h filter.h
-gen.o: gen.c misc.h lf.h table.h gen-icache.h ld-decode.h gen.h igen.h ld-insn.h gen-semantics.h gen-idecode.h filter.h
-misc.o: misc.c misc.h filter_host.h
-
-
-tags etags: TAGS
-
-TAGS:
- etags $(srcdir)/*.h $(srcdir)/*.c
-
-clean mostlyclean:
- rm -f tmp-* *.[oasi] core igen
-
-distclean realclean: clean
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deleted file mode 100644
index f9b87a10c60..00000000000
--- a/sim/igen/acconfig.h
+++ /dev/null
@@ -1,15 +0,0 @@
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diff --git a/sim/igen/config.in b/sim/igen/config.in
deleted file mode 100644
index 4fcf519489a..00000000000
--- a/sim/igen/config.in
+++ /dev/null
@@ -1,31 +0,0 @@
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diff --git a/sim/igen/configure b/sim/igen/configure
deleted file mode 100755
index 9d6009c55b0..00000000000
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- -no-recursion | --no-recursion | --no-recursio | --no-recursi \
- | --no-recurs | --no-recur | --no-recu | --no-rec | --no-re | --no-r) ;;
- *" "*|*" "*|*[\[\]\~\#\$\^\&\*\(\)\{\}\\\|\;\<\>\?]*)
- ac_configure_args="$ac_configure_args '$ac_arg'" ;;
- *) ac_configure_args="$ac_configure_args $ac_arg" ;;
- esac
-done
-
-# NLS nuisances.
-# Only set these to C if already set. These must not be set unconditionally
-# because not all systems understand e.g. LANG=C (notably SCO).
-# Fixing LC_MESSAGES prevents Solaris sh from translating var values in `set'!
-# Non-C LC_CTYPE values break the ctype check.
-if test "${LANG+set}" = set; then LANG=C; export LANG; fi
-if test "${LC_ALL+set}" = set; then LC_ALL=C; export LC_ALL; fi
-if test "${LC_MESSAGES+set}" = set; then LC_MESSAGES=C; export LC_MESSAGES; fi
-if test "${LC_CTYPE+set}" = set; then LC_CTYPE=C; export LC_CTYPE; fi
-
-# confdefs.h avoids OS command line length limits that DEFS can exceed.
-rm -rf conftest* confdefs.h
-# AIX cpp loses on an empty file, so make sure it contains at least a newline.
-echo > confdefs.h
-
-# A filename unique to this package, relative to the directory that
-# configure is in, which we can look for to find out if srcdir is correct.
-ac_unique_file=table.h
-
-# Find the source files, if location was not specified.
-if test -z "$srcdir"; then
- ac_srcdir_defaulted=yes
- # Try the directory containing this script, then its parent.
- ac_prog=$0
- ac_confdir=`echo $ac_prog|sed 's%/[^/][^/]*$%%'`
- test "x$ac_confdir" = "x$ac_prog" && ac_confdir=.
- srcdir=$ac_confdir
- if test ! -r $srcdir/$ac_unique_file; then
- srcdir=..
- fi
-else
- ac_srcdir_defaulted=no
-fi
-if test ! -r $srcdir/$ac_unique_file; then
- if test "$ac_srcdir_defaulted" = yes; then
- { echo "configure: error: can not find sources in $ac_confdir or .." 1>&2; exit 1; }
- else
- { echo "configure: error: can not find sources in $srcdir" 1>&2; exit 1; }
- fi
-fi
-srcdir=`echo "${srcdir}" | sed 's%\([^/]\)/*$%\1%'`
-
-# Prefer explicitly selected file to automatically selected ones.
-if test -z "$sitefile"; then
- if test -z "$CONFIG_SITE"; then
- if test "x$prefix" != xNONE; then
- CONFIG_SITE="$prefix/share/config.site $prefix/etc/config.site"
- else
- CONFIG_SITE="$ac_default_prefix/share/config.site $ac_default_prefix/etc/config.site"
- fi
- fi
-else
- CONFIG_SITE="$sitefile"
-fi
-for ac_site_file in $CONFIG_SITE; do
- if test -r "$ac_site_file"; then
- echo "loading site script $ac_site_file"
- . "$ac_site_file"
- fi
-done
-
-if test -r "$cache_file"; then
- echo "loading cache $cache_file"
- . $cache_file
-else
- echo "creating cache $cache_file"
- > $cache_file
-fi
-
-ac_ext=c
-# CFLAGS is not in ac_cpp because -g, -O, etc. are not valid cpp options.
-ac_cpp='$CPP $CPPFLAGS'
-ac_compile='${CC-cc} -c $CFLAGS $CPPFLAGS conftest.$ac_ext 1>&5'
-ac_link='${CC-cc} -o conftest${ac_exeext} $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS 1>&5'
-cross_compiling=$ac_cv_prog_cc_cross
-
-ac_exeext=
-ac_objext=o
-if (echo "testing\c"; echo 1,2,3) | grep c >/dev/null; then
- # Stardent Vistra SVR4 grep lacks -e, says ghazi@caip.rutgers.edu.
- if (echo -n testing; echo 1,2,3) | sed s/-n/xn/ | grep xn >/dev/null; then
- ac_n= ac_c='
-' ac_t=' '
- else
- ac_n=-n ac_c= ac_t=
- fi
-else
- ac_n= ac_c='\c' ac_t=
-fi
-
-
-
-ac_aux_dir=
-for ac_dir in $srcdir $srcdir/.. $srcdir/../..; do
- if test -f $ac_dir/install-sh; then
- ac_aux_dir=$ac_dir
- ac_install_sh="$ac_aux_dir/install-sh -c"
- break
- elif test -f $ac_dir/install.sh; then
- ac_aux_dir=$ac_dir
- ac_install_sh="$ac_aux_dir/install.sh -c"
- break
- fi
-done
-if test -z "$ac_aux_dir"; then
- { echo "configure: error: can not find install-sh or install.sh in $srcdir $srcdir/.. $srcdir/../.." 1>&2; exit 1; }
-fi
-ac_config_guess=$ac_aux_dir/config.guess
-ac_config_sub=$ac_aux_dir/config.sub
-ac_configure=$ac_aux_dir/configure # This should be Cygnus configure.
-
-# Find a good install program. We prefer a C program (faster),
-# so one script is as good as another. But avoid the broken or
-# incompatible versions:
-# SysV /etc/install, /usr/sbin/install
-# SunOS /usr/etc/install
-# IRIX /sbin/install
-# AIX /bin/install
-# AIX 4 /usr/bin/installbsd, which doesn't work without a -g flag
-# AFS /usr/afsws/bin/install, which mishandles nonexistent args
-# SVR4 /usr/ucb/install, which tries to use the nonexistent group "staff"
-# ./install, which can be erroneously created by make from ./install.sh.
-echo $ac_n "checking for a BSD compatible install""... $ac_c" 1>&6
-echo "configure:693: checking for a BSD compatible install" >&5
-if test -z "$INSTALL"; then
-if eval "test \"`echo '$''{'ac_cv_path_install'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- IFS="${IFS= }"; ac_save_IFS="$IFS"; IFS=":"
- for ac_dir in $PATH; do
- # Account for people who put trailing slashes in PATH elements.
- case "$ac_dir/" in
- /|./|.//|/etc/*|/usr/sbin/*|/usr/etc/*|/sbin/*|/usr/afsws/bin/*|/usr/ucb/*) ;;
- *)
- # OSF1 and SCO ODT 3.0 have their own names for install.
- # Don't use installbsd from OSF since it installs stuff as root
- # by default.
- for ac_prog in ginstall scoinst install; do
- if test -f $ac_dir/$ac_prog; then
- if test $ac_prog = install &&
- grep dspmsg $ac_dir/$ac_prog >/dev/null 2>&1; then
- # AIX install. It has an incompatible calling convention.
- :
- else
- ac_cv_path_install="$ac_dir/$ac_prog -c"
- break 2
- fi
- fi
- done
- ;;
- esac
- done
- IFS="$ac_save_IFS"
-
-fi
- if test "${ac_cv_path_install+set}" = set; then
- INSTALL="$ac_cv_path_install"
- else
- # As a last resort, use the slow shell script. We don't cache a
- # path for INSTALL within a source directory, because that will
- # break other packages using the cache if that directory is
- # removed, or if the path is relative.
- INSTALL="$ac_install_sh"
- fi
-fi
-echo "$ac_t""$INSTALL" 1>&6
-
-# Use test -z because SunOS4 sh mishandles braces in ${var-val}.
-# It thinks the first close brace ends the variable substitution.
-test -z "$INSTALL_PROGRAM" && INSTALL_PROGRAM='${INSTALL}'
-
-test -z "$INSTALL_SCRIPT" && INSTALL_SCRIPT='${INSTALL_PROGRAM}'
-
-test -z "$INSTALL_DATA" && INSTALL_DATA='${INSTALL} -m 644'
-
-# Extract the first word of "gcc", so it can be a program name with args.
-set dummy gcc; ac_word=$2
-echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:748: checking for $ac_word" >&5
-if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- if test -n "$CC"; then
- ac_cv_prog_CC="$CC" # Let the user override the test.
-else
- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
- ac_dummy="$PATH"
- for ac_dir in $ac_dummy; do
- test -z "$ac_dir" && ac_dir=.
- if test -f $ac_dir/$ac_word; then
- ac_cv_prog_CC="gcc"
- break
- fi
- done
- IFS="$ac_save_ifs"
-fi
-fi
-CC="$ac_cv_prog_CC"
-if test -n "$CC"; then
- echo "$ac_t""$CC" 1>&6
-else
- echo "$ac_t""no" 1>&6
-fi
-
-if test -z "$CC"; then
- # Extract the first word of "cc", so it can be a program name with args.
-set dummy cc; ac_word=$2
-echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:778: checking for $ac_word" >&5
-if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- if test -n "$CC"; then
- ac_cv_prog_CC="$CC" # Let the user override the test.
-else
- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
- ac_prog_rejected=no
- ac_dummy="$PATH"
- for ac_dir in $ac_dummy; do
- test -z "$ac_dir" && ac_dir=.
- if test -f $ac_dir/$ac_word; then
- if test "$ac_dir/$ac_word" = "/usr/ucb/cc"; then
- ac_prog_rejected=yes
- continue
- fi
- ac_cv_prog_CC="cc"
- break
- fi
- done
- IFS="$ac_save_ifs"
-if test $ac_prog_rejected = yes; then
- # We found a bogon in the path, so make sure we never use it.
- set dummy $ac_cv_prog_CC
- shift
- if test $# -gt 0; then
- # We chose a different compiler from the bogus one.
- # However, it has the same basename, so the bogon will be chosen
- # first if we set CC to just the basename; use the full file name.
- shift
- set dummy "$ac_dir/$ac_word" "$@"
- shift
- ac_cv_prog_CC="$@"
- fi
-fi
-fi
-fi
-CC="$ac_cv_prog_CC"
-if test -n "$CC"; then
- echo "$ac_t""$CC" 1>&6
-else
- echo "$ac_t""no" 1>&6
-fi
-
- if test -z "$CC"; then
- case "`uname -s`" in
- *win32* | *WIN32*)
- # Extract the first word of "cl", so it can be a program name with args.
-set dummy cl; ac_word=$2
-echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:829: checking for $ac_word" >&5
-if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- if test -n "$CC"; then
- ac_cv_prog_CC="$CC" # Let the user override the test.
-else
- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
- ac_dummy="$PATH"
- for ac_dir in $ac_dummy; do
- test -z "$ac_dir" && ac_dir=.
- if test -f $ac_dir/$ac_word; then
- ac_cv_prog_CC="cl"
- break
- fi
- done
- IFS="$ac_save_ifs"
-fi
-fi
-CC="$ac_cv_prog_CC"
-if test -n "$CC"; then
- echo "$ac_t""$CC" 1>&6
-else
- echo "$ac_t""no" 1>&6
-fi
- ;;
- esac
- fi
- test -z "$CC" && { echo "configure: error: no acceptable cc found in \$PATH" 1>&2; exit 1; }
-fi
-
-echo $ac_n "checking whether the C compiler ($CC $CFLAGS $LDFLAGS) works""... $ac_c" 1>&6
-echo "configure:861: checking whether the C compiler ($CC $CFLAGS $LDFLAGS) works" >&5
-
-ac_ext=c
-# CFLAGS is not in ac_cpp because -g, -O, etc. are not valid cpp options.
-ac_cpp='$CPP $CPPFLAGS'
-ac_compile='${CC-cc} -c $CFLAGS $CPPFLAGS conftest.$ac_ext 1>&5'
-ac_link='${CC-cc} -o conftest${ac_exeext} $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS 1>&5'
-cross_compiling=$ac_cv_prog_cc_cross
-
-cat > conftest.$ac_ext << EOF
-
-#line 872 "configure"
-#include "confdefs.h"
-
-main(){return(0);}
-EOF
-if { (eval echo configure:877: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- ac_cv_prog_cc_works=yes
- # If we can't run a trivial program, we are probably using a cross compiler.
- if (./conftest; exit) 2>/dev/null; then
- ac_cv_prog_cc_cross=no
- else
- ac_cv_prog_cc_cross=yes
- fi
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- ac_cv_prog_cc_works=no
-fi
-rm -fr conftest*
-ac_ext=c
-# CFLAGS is not in ac_cpp because -g, -O, etc. are not valid cpp options.
-ac_cpp='$CPP $CPPFLAGS'
-ac_compile='${CC-cc} -c $CFLAGS $CPPFLAGS conftest.$ac_ext 1>&5'
-ac_link='${CC-cc} -o conftest${ac_exeext} $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS 1>&5'
-cross_compiling=$ac_cv_prog_cc_cross
-
-echo "$ac_t""$ac_cv_prog_cc_works" 1>&6
-if test $ac_cv_prog_cc_works = no; then
- { echo "configure: error: installation or configuration problem: C compiler cannot create executables." 1>&2; exit 1; }
-fi
-echo $ac_n "checking whether the C compiler ($CC $CFLAGS $LDFLAGS) is a cross-compiler""... $ac_c" 1>&6
-echo "configure:903: checking whether the C compiler ($CC $CFLAGS $LDFLAGS) is a cross-compiler" >&5
-echo "$ac_t""$ac_cv_prog_cc_cross" 1>&6
-cross_compiling=$ac_cv_prog_cc_cross
-
-echo $ac_n "checking whether we are using GNU C""... $ac_c" 1>&6
-echo "configure:908: checking whether we are using GNU C" >&5
-if eval "test \"`echo '$''{'ac_cv_prog_gcc'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.c <<EOF
-#ifdef __GNUC__
- yes;
-#endif
-EOF
-if { ac_try='${CC-cc} -E conftest.c'; { (eval echo configure:917: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }; } | egrep yes >/dev/null 2>&1; then
- ac_cv_prog_gcc=yes
-else
- ac_cv_prog_gcc=no
-fi
-fi
-
-echo "$ac_t""$ac_cv_prog_gcc" 1>&6
-
-if test $ac_cv_prog_gcc = yes; then
- GCC=yes
-else
- GCC=
-fi
-
-ac_test_CFLAGS="${CFLAGS+set}"
-ac_save_CFLAGS="$CFLAGS"
-CFLAGS=
-echo $ac_n "checking whether ${CC-cc} accepts -g""... $ac_c" 1>&6
-echo "configure:936: checking whether ${CC-cc} accepts -g" >&5
-if eval "test \"`echo '$''{'ac_cv_prog_cc_g'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- echo 'void f(){}' > conftest.c
-if test -z "`${CC-cc} -g -c conftest.c 2>&1`"; then
- ac_cv_prog_cc_g=yes
-else
- ac_cv_prog_cc_g=no
-fi
-rm -f conftest*
-
-fi
-
-echo "$ac_t""$ac_cv_prog_cc_g" 1>&6
-if test "$ac_test_CFLAGS" = set; then
- CFLAGS="$ac_save_CFLAGS"
-elif test $ac_cv_prog_cc_g = yes; then
- if test "$GCC" = yes; then
- CFLAGS="-g -O2"
- else
- CFLAGS="-g"
- fi
-else
- if test "$GCC" = yes; then
- CFLAGS="-O2"
- else
- CFLAGS=
- fi
-fi
-
-
-
-# Check whether --enable-build-warnings or --disable-build-warnings was given.
-if test "${enable_build_warnings+set}" = set; then
- enableval="$enable_build_warnings"
- build_warnings="-Wall -Wpointer-arith -Wstrict-prototypes -Wmissing-prototypes -Wmissing-declarations"
-case "${enableval}" in
- yes) ;;
- no) build_warnings="-w";;
- ,*) t=`echo "${enableval}" | sed -e "s/,/ /g"`
- build_warnings="${build_warnings} ${t}";;
- *,) t=`echo "${enableval}" | sed -e "s/,/ /g"`
- build_warnings="${t} ${build_warnings}";;
- *) build_warnings=`echo "${enableval}" | sed -e "s/,/ /g"`;;
-esac
-if test x"$silent" != x"yes" && test x"$build_warnings" != x""; then
- echo "Setting warning flags = $build_warnings" 6>&1
-fi
-WARN_CFLAGS=""
-WERROR_CFLAGS=""
-if test "x${build_warnings}" != x -a "x$GCC" = xyes
-then
- # Separate out the -Werror flag as some files just cannot be
- # compiled with it enabled.
- for w in ${build_warnings}; do
- case $w in
- -Werr*) WERROR_CFLAGS=-Werror ;;
- *) WARN_CFLAGS="${WARN_CFLAGS} $w"
- esac
- done
-fi
-else
- build_warnings=""
-fi
-
-
-# Put a plausible default for CC_FOR_BUILD in Makefile.
-if test "x$cross_compiling" = "xno" -a "x$host" != "xi386-windows"; then
- AR_FOR_BUILD='$(AR)'
- AR_FLAGS_FOR_BUILD='$(AR_FLAGS)'
- CC_FOR_BUILD='$(CC)'
- CFLAGS_FOR_BUILD='$(CFLAGS)'
- RANLIB_FOR_BUILD='$(RANLIB)'
- LIBIBERTY_LIB=../../libiberty/libiberty.a
-else
- AR_FOR_BUILD=${AR_FOR_BUILD-ar}
- AR_FLAGS_FOR_BUILD=${AR_FLAGS_FOR_BUILD-rc}
- CC_FOR_BUILD=${CC_FOR_BUILD-gcc}
- CFLAGS_FOR_BUILD=${CFLAGS_FOR_BUILD-"-g"}
- RANLIB_FOR_BUILD=${RANLIB_FOR_BUILD-ranlib}
- LIBIBERTY_LIB=
-fi
-
-
-ac_aux_dir=
-for ac_dir in `cd $srcdir;pwd`/../.. $srcdir/`cd $srcdir;pwd`/../..; do
- if test -f $ac_dir/install-sh; then
- ac_aux_dir=$ac_dir
- ac_install_sh="$ac_aux_dir/install-sh -c"
- break
- elif test -f $ac_dir/install.sh; then
- ac_aux_dir=$ac_dir
- ac_install_sh="$ac_aux_dir/install.sh -c"
- break
- fi
-done
-if test -z "$ac_aux_dir"; then
- { echo "configure: error: can not find install-sh or install.sh in `cd $srcdir;pwd`/../.. $srcdir/`cd $srcdir;pwd`/../.." 1>&2; exit 1; }
-fi
-ac_config_guess=$ac_aux_dir/config.guess
-ac_config_sub=$ac_aux_dir/config.sub
-ac_configure=$ac_aux_dir/configure # This should be Cygnus configure.
-
-
-# Do some error checking and defaulting for the host and target type.
-# The inputs are:
-# configure --host=HOST --target=TARGET --build=BUILD NONOPT
-#
-# The rules are:
-# 1. You are not allowed to specify --host, --target, and nonopt at the
-# same time.
-# 2. Host defaults to nonopt.
-# 3. If nonopt is not specified, then host defaults to the current host,
-# as determined by config.guess.
-# 4. Target and build default to nonopt.
-# 5. If nonopt is not specified, then target and build default to host.
-
-# The aliases save the names the user supplied, while $host etc.
-# will get canonicalized.
-case $host---$target---$nonopt in
-NONE---*---* | *---NONE---* | *---*---NONE) ;;
-*) { echo "configure: error: can only configure for one host and one target at a time" 1>&2; exit 1; } ;;
-esac
-
-
-# Make sure we can run config.sub.
-if ${CONFIG_SHELL-/bin/sh} $ac_config_sub sun4 >/dev/null 2>&1; then :
-else { echo "configure: error: can not run $ac_config_sub" 1>&2; exit 1; }
-fi
-
-echo $ac_n "checking host system type""... $ac_c" 1>&6
-echo "configure:1068: checking host system type" >&5
-
-host_alias=$host
-case "$host_alias" in
-NONE)
- case $nonopt in
- NONE)
- if host_alias=`${CONFIG_SHELL-/bin/sh} $ac_config_guess`; then :
- else { echo "configure: error: can not guess host type; you must specify one" 1>&2; exit 1; }
- fi ;;
- *) host_alias=$nonopt ;;
- esac ;;
-esac
-
-host=`${CONFIG_SHELL-/bin/sh} $ac_config_sub $host_alias`
-host_cpu=`echo $host | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\1/'`
-host_vendor=`echo $host | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\2/'`
-host_os=`echo $host | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\3/'`
-echo "$ac_t""$host" 1>&6
-
-echo $ac_n "checking target system type""... $ac_c" 1>&6
-echo "configure:1089: checking target system type" >&5
-
-target_alias=$target
-case "$target_alias" in
-NONE)
- case $nonopt in
- NONE) target_alias=$host_alias ;;
- *) target_alias=$nonopt ;;
- esac ;;
-esac
-
-target=`${CONFIG_SHELL-/bin/sh} $ac_config_sub $target_alias`
-target_cpu=`echo $target | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\1/'`
-target_vendor=`echo $target | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\2/'`
-target_os=`echo $target | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\3/'`
-echo "$ac_t""$target" 1>&6
-
-echo $ac_n "checking build system type""... $ac_c" 1>&6
-echo "configure:1107: checking build system type" >&5
-
-build_alias=$build
-case "$build_alias" in
-NONE)
- case $nonopt in
- NONE) build_alias=$host_alias ;;
- *) build_alias=$nonopt ;;
- esac ;;
-esac
-
-build=`${CONFIG_SHELL-/bin/sh} $ac_config_sub $build_alias`
-build_cpu=`echo $build | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\1/'`
-build_vendor=`echo $build | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\2/'`
-build_os=`echo $build | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\3/'`
-echo "$ac_t""$build" 1>&6
-
-test "$host_alias" != "$target_alias" &&
- test "$program_prefix$program_suffix$program_transform_name" = \
- NONENONEs,x,x, &&
- program_prefix=${target_alias}-
-
-if test "$program_transform_name" = s,x,x,; then
- program_transform_name=
-else
- # Double any \ or $. echo might interpret backslashes.
- cat <<\EOF_SED > conftestsed
-s,\\,\\\\,g; s,\$,$$,g
-EOF_SED
- program_transform_name="`echo $program_transform_name|sed -f conftestsed`"
- rm -f conftestsed
-fi
-test "$program_prefix" != NONE &&
- program_transform_name="s,^,${program_prefix},; $program_transform_name"
-# Use a double $ so make ignores it.
-test "$program_suffix" != NONE &&
- program_transform_name="s,\$\$,${program_suffix},; $program_transform_name"
-
-# sed with no file args requires a program.
-test "$program_transform_name" = "" && program_transform_name="s,x,x,"
-
-
-. ${srcdir}/../../bfd/configure.host
-
-
-
-echo $ac_n "checking how to run the C preprocessor""... $ac_c" 1>&6
-echo "configure:1154: checking how to run the C preprocessor" >&5
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-#
-# ac_d sets the value in "#define NAME VALUE" lines.
-ac_dA='s%^\([ ]*\)#\([ ]*define[ ][ ]*\)'
-ac_dB='\([ ][ ]*\)[^ ]*%\1#\2'
-ac_dC='\3'
-ac_dD='%g'
-# ac_u turns "#undef NAME" with trailing blanks into "#define NAME VALUE".
-ac_uA='s%^\([ ]*\)#\([ ]*\)undef\([ ][ ]*\)'
-ac_uB='\([ ]\)%\1#\2define\3'
-ac_uC=' '
-ac_uD='\4%g'
-# ac_e turns "#undef NAME" without trailing blanks into "#define NAME VALUE".
-ac_eA='s%^\([ ]*\)#\([ ]*\)undef\([ ][ ]*\)'
-ac_eB='$%\1#\2define\3'
-ac_eC=' '
-ac_eD='%g'
-
-if test "${CONFIG_HEADERS+set}" != set; then
-EOF
-cat >> $CONFIG_STATUS <<EOF
- CONFIG_HEADERS="config.h:config.in"
-EOF
-cat >> $CONFIG_STATUS <<\EOF
-fi
-for ac_file in .. $CONFIG_HEADERS; do if test "x$ac_file" != x..; then
- # Support "outfile[:infile[:infile...]]", defaulting infile="outfile.in".
- case "$ac_file" in
- *:*) ac_file_in=`echo "$ac_file"|sed 's%[^:]*:%%'`
- ac_file=`echo "$ac_file"|sed 's%:.*%%'` ;;
- *) ac_file_in="${ac_file}.in" ;;
- esac
-
- echo creating $ac_file
-
- rm -f conftest.frag conftest.in conftest.out
- ac_file_inputs=`echo $ac_file_in|sed -e "s%^%$ac_given_srcdir/%" -e "s%:% $ac_given_srcdir/%g"`
- cat $ac_file_inputs > conftest.in
-
-EOF
-
-# Transform confdefs.h into a sed script conftest.vals that substitutes
-# the proper values into config.h.in to produce config.h. And first:
-# Protect against being on the right side of a sed subst in config.status.
-# Protect against being in an unquoted here document in config.status.
-rm -f conftest.vals
-cat > conftest.hdr <<\EOF
-s/[\\&%]/\\&/g
-s%[\\$`]%\\&%g
-s%#define \([A-Za-z_][A-Za-z0-9_]*\) *\(.*\)%${ac_dA}\1${ac_dB}\1${ac_dC}\2${ac_dD}%gp
-s%ac_d%ac_u%gp
-s%ac_u%ac_e%gp
-EOF
-sed -n -f conftest.hdr confdefs.h > conftest.vals
-rm -f conftest.hdr
-
-# This sed command replaces #undef with comments. This is necessary, for
-# example, in the case of _POSIX_SOURCE, which is predefined and required
-# on some systems where configure will not decide to define it.
-cat >> conftest.vals <<\EOF
-s%^[ ]*#[ ]*undef[ ][ ]*[a-zA-Z_][a-zA-Z_0-9]*%/* & */%
-EOF
-
-# Break up conftest.vals because some shells have a limit on
-# the size of here documents, and old seds have small limits too.
-
-rm -f conftest.tail
-while :
-do
- ac_lines=`grep -c . conftest.vals`
- # grep -c gives empty output for an empty file on some AIX systems.
- if test -z "$ac_lines" || test "$ac_lines" -eq 0; then break; fi
- # Write a limited-size here document to conftest.frag.
- echo ' cat > conftest.frag <<CEOF' >> $CONFIG_STATUS
- sed ${ac_max_here_lines}q conftest.vals >> $CONFIG_STATUS
- echo 'CEOF
- sed -f conftest.frag conftest.in > conftest.out
- rm -f conftest.in
- mv conftest.out conftest.in
-' >> $CONFIG_STATUS
- sed 1,${ac_max_here_lines}d conftest.vals > conftest.tail
- rm -f conftest.vals
- mv conftest.tail conftest.vals
-done
-rm -f conftest.vals
-
-cat >> $CONFIG_STATUS <<\EOF
- rm -f conftest.frag conftest.h
- echo "/* $ac_file. Generated automatically by configure. */" > conftest.h
- cat conftest.in >> conftest.h
- rm -f conftest.in
- if cmp -s $ac_file conftest.h 2>/dev/null; then
- echo "$ac_file is unchanged"
- rm -f conftest.h
- else
- # Remove last slash and all that follows it. Not all systems have dirname.
- ac_dir=`echo $ac_file|sed 's%/[^/][^/]*$%%'`
- if test "$ac_dir" != "$ac_file" && test "$ac_dir" != .; then
- # The file is in a subdirectory.
- test ! -d "$ac_dir" && mkdir "$ac_dir"
- fi
- rm -f $ac_file
- mv conftest.h $ac_file
- fi
-fi; done
-
-EOF
-cat >> $CONFIG_STATUS <<EOF
-
-EOF
-cat >> $CONFIG_STATUS <<\EOF
-case x$CONFIG_HEADERS in xconfig.h:config.in) echo > stamp-h ;; esac
-exit 0
-EOF
-chmod +x $CONFIG_STATUS
-rm -fr confdefs* $ac_clean_files
-test "$no_create" = yes || ${CONFIG_SHELL-/bin/sh} $CONFIG_STATUS || exit 1
-
diff --git a/sim/igen/configure.in b/sim/igen/configure.in
deleted file mode 100644
index 20836d9dec6..00000000000
--- a/sim/igen/configure.in
+++ /dev/null
@@ -1,52 +0,0 @@
-dnl Process this file with autoconf to produce a configure script.
-sinclude(../common/aclocal.m4)
-AC_PREREQ(2.5)dnl
-AC_INIT(table.h)
-
-AC_PROG_INSTALL
-AC_PROG_CC
-
-SIM_AC_OPTION_WARNINGS
-
-# Put a plausible default for CC_FOR_BUILD in Makefile.
-if test "x$cross_compiling" = "xno" -a "x$host" != "xi386-windows"; then
- AR_FOR_BUILD='$(AR)'
- AR_FLAGS_FOR_BUILD='$(AR_FLAGS)'
- CC_FOR_BUILD='$(CC)'
- CFLAGS_FOR_BUILD='$(CFLAGS)'
- RANLIB_FOR_BUILD='$(RANLIB)'
- LIBIBERTY_LIB=../../libiberty/libiberty.a
-else
- AR_FOR_BUILD=${AR_FOR_BUILD-ar}
- AR_FLAGS_FOR_BUILD=${AR_FLAGS_FOR_BUILD-rc}
- CC_FOR_BUILD=${CC_FOR_BUILD-gcc}
- CFLAGS_FOR_BUILD=${CFLAGS_FOR_BUILD-"-g"}
- RANLIB_FOR_BUILD=${RANLIB_FOR_BUILD-ranlib}
- LIBIBERTY_LIB=
-fi
-
-
-AC_CONFIG_AUX_DIR(`cd $srcdir;pwd`/../..)
-AC_CANONICAL_SYSTEM
-AC_ARG_PROGRAM
-
-. ${srcdir}/../../bfd/configure.host
-
-AC_CONFIG_HEADER(config.h:config.in)
-
-AC_CHECK_HEADERS(stdlib.h string.h strings.h sys/stat.h sys/types.h unistd.h)
-AC_HEADER_DIRENT
-
-AC_SUBST(AR_FOR_BUILD)
-AC_SUBST(AR_FLAGS_FOR_BUILD)
-AC_SUBST(CC_FOR_BUILD)
-AC_SUBST(CFLAGS_FOR_BUILD)
-AC_SUBST(RANLIB_FOR_BUILD)
-AC_SUBST(LIBIBERTY_LIB)
-
-AC_SUBST(AR)
-AC_SUBST(CFLAGS)
-AC_PROG_RANLIB
-
-AC_OUTPUT(Makefile,
-[case x$CONFIG_HEADERS in xconfig.h:config.in) echo > stamp-h ;; esac])
diff --git a/sim/igen/filter.c b/sim/igen/filter.c
deleted file mode 100644
index afc51889724..00000000000
--- a/sim/igen/filter.c
+++ /dev/null
@@ -1,355 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1996, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-#include <stdio.h>
-
-#include "config.h"
-
-#ifdef HAVE_STRING_H
-#include <string.h>
-#else
-#ifdef HAVE_STRINGS_H
-#include <strings.h>
-#endif
-#endif
-
-#include "misc.h"
-#include "lf.h"
-#include "filter.h"
-
-struct _filter {
- char *member;
- filter *next;
-};
-
-
-void
-filter_parse (filter **filters,
- const char *filt)
-{
- while (strlen (filt) > 0)
- {
- filter *new_filter;
- filter **last;
- /* break out a member of the filter list */
- const char *flag = filt;
- unsigned /*size_t*/ len;
- filt = strchr (filt, ',');
- if (filt == NULL)
- {
- filt = strchr (flag, '\0');
- len = strlen (flag);
- }
- else
- {
- len = filt - flag;
- filt = filt + 1;
- }
- /* find an insertion point - sorted order */
- last = filters;
- while (*last != NULL
- && strncmp (flag, (*last)->member, len) > 0)
- last = &(*last)->next;
- if (*last != NULL
- && strncmp (flag, (*last)->member, len) == 0
- && strlen ((*last)->member) == len)
- continue; /* duplicate */
- /* create an entry for that member */
- new_filter = ZALLOC (filter);
- new_filter->member = NZALLOC (char, len + 1);
- strncpy (new_filter->member, flag, len);
- /* insert it */
- new_filter->next = *last;
- *last = new_filter;
- }
-}
-
-
-void
-filter_add (filter **set,
- filter *add)
-{
- while (add != NULL)
- {
- int cmp;
- if (*set == NULL)
- cmp = 1; /* set->member > add->member */
- else
- cmp = strcmp ((*set)->member, add->member);
- if (cmp > 0)
- {
- /* insert it here */
- filter *new = ZALLOC (filter);
- new->member = NZALLOC (char, strlen (add->member) + 1);
- strcpy (new->member, add->member);
- new->next = *set;
- *set = new;
- add = add->next;
- }
- else if (cmp == 0)
- {
- /* already in set */
- add = add->next;
- }
- else /* cmp < 0 */
- {
- /* not reached insertion point */
- set = &(*set)->next;
- }
- }
-}
-
-
-int
-filter_is_subset (filter *superset,
- filter *subset)
-{
- while (1)
- {
- int cmp;
- if (subset == NULL)
- return 1;
- if (superset == NULL)
- return 0; /* subset isn't finished */
- cmp = strcmp (subset->member, superset->member);
- if (cmp < 0)
- return 0; /* not found */
- else if (cmp == 0)
- subset = subset->next; /* found */
- else if (cmp > 0)
- superset = superset->next; /* later in list? */
- }
-}
-
-
-int
-filter_is_common (filter *l,
- filter *r)
-{
- while (1)
- {
- int cmp;
- if (l == NULL)
- return 0;
- if (r == NULL)
- return 0;
- cmp = strcmp (l->member, r->member);
- if (cmp < 0)
- l = l->next;
- else if (cmp == 0)
- return 1; /* common member */
- else if (cmp > 0)
- r = r->next;
- }
-}
-
-
-int
-filter_is_member (filter *filt,
- const char *flag)
-{
- int index = 1;
- while (filt != NULL)
- {
- if (strcmp (flag, filt->member) == 0)
- return index;
- filt = filt->next;
- index++;
- }
- return 0;
-}
-
-
-int
-is_filtered_out (filter *filters,
- const char *flags)
-{
- while (strlen(flags) > 0) {
- int present;
- filter *filt = filters;
- /* break the string up */
- char *end = strchr(flags, ',');
- char *next;
- unsigned /*size_t*/ len;
- if (end == NULL) {
- end = strchr(flags, '\0');
- next = end;
- }
- else {
- next = end + 1;
- }
- len = end - flags;
- /* check that it is present */
- present = 0;
- filt = filters;
- while (filt != NULL) {
- if (strncmp(flags, filt->member, len) == 0
- && strlen(filt->member) == len) {
- present = 1;
- break;
- }
- filt = filt->next;
- }
- if (!present)
- return 1;
- flags = next;
- }
- return 0;
-}
-
-
-#if 0
-int
-it_is (const char *flag,
- const char *flags)
-{
- int flag_len = strlen(flag);
- while (*flags != '\0') {
- if (!strncmp(flags, flag, flag_len)
- && (flags[flag_len] == ',' || flags[flag_len] == '\0'))
- return 1;
- while (*flags != ',') {
- if (*flags == '\0')
- return 0;
- flags++;
- }
- flags++;
- }
- return 0;
-}
-#endif
-
-
-char *
-filter_next (filter *set,
- char *member)
-{
- while (set != NULL)
- {
- if (strcmp (set->member, member) > 0)
- return set->member;
- set = set->next;
- }
- return NULL;
-}
-
-
-void
-dump_filter (lf *file,
- char *prefix,
- filter *set,
- char *suffix)
-{
- char *member;
- lf_printf (file, "%s", prefix);
- member = filter_next (set, "");
- if (member != NULL)
- {
- while (1)
- {
- lf_printf (file, "%s", member);
- member = filter_next (set, member);
- if (member == NULL)
- break;
- lf_printf (file, ",");
- }
- }
- lf_printf (file, "%s", suffix);
-}
-
-
-#ifdef MAIN
-int
-main(int argc, char **argv)
-{
- filter *subset = NULL;
- filter *superset = NULL;
- lf *l;
- int i;
- if (argc < 2) {
- printf("Usage: filter <subset> <filter> ...\n");
- exit (1);
- }
-
- /* load the filter up */
- filter_parse (&subset, argv[1]);
- for (i = 2; i < argc; i++)
- filter_parse (&superset, argv[i]);
-
- /* dump various info */
- l = lf_open ("-", "stdout", lf_omit_references, lf_is_text, "tmp-filter");
-#if 0
- if (is_filtered_out (argv[1], superset))
- lf_printf (l, "excluded\n");
- else
- lf_printf (l, "included\n");
-#endif
- /* subset */
- {
- dump_filter (l, "{", subset, " }");
- if (filter_is_subset (superset, subset))
- lf_printf (l, " subset of ");
- else
- lf_printf (l, " !subset of ");
- dump_filter (l, "{", superset, " }");
- lf_printf (l, "\n");
- }
- /* intersection */
- {
- dump_filter (l, "{", subset, " }");
- if (filter_is_common (subset, superset))
- lf_printf (l, " intersects ");
- else
- lf_printf (l, " !intersects ");
- dump_filter (l, "{", superset, " }");
- lf_printf (l, "\n");
- }
- /* membership */
- {
- filter *memb = subset;
- while (memb != NULL)
- {
- lf_printf (l, "%s", memb->member);
- if (filter_is_member (superset, memb->member))
- lf_printf (l, " in ");
- else
- lf_printf (l, " !in ");
- dump_filter (l, "{", superset, " }");
- lf_printf (l, "\n");
- memb = memb->next;
- }
- }
- /* addition */
- {
- filter *add = NULL;
- filter_add (&add, superset);
- filter_add (&add, subset);
- dump_filter (l, "{", add, " }");
- lf_printf (l, " = ");
- dump_filter (l, "{", subset, " }");
- lf_printf (l, " + ");
- dump_filter (l, "{", superset, " }");
- lf_printf (l, "\n");
- }
-
- return 0;
-}
-#endif
diff --git a/sim/igen/filter.h b/sim/igen/filter.h
deleted file mode 100644
index c85b8039bc9..00000000000
--- a/sim/igen/filter.h
+++ /dev/null
@@ -1,86 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1996, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-/* NB, an empty filter is NULL */
-typedef struct _filter filter;
-
-
-/* parse the list merging any flags into the filter */
-
-extern void filter_parse
-(filter **filters,
- const char *filt);
-
-
-/* add the second filter to the first */
-
-extern void filter_add
-(filter **filters,
- filter *add);
-
-
-
-/* returns true if SUB is a strict subset of SUPER. For an empty set
- is a member of any set */
-
-extern int filter_is_subset
-(filter *superset,
- filter *subset);
-
-
-/* return true if there is at least one member common to the two
- filters */
-
-extern int filter_is_common
-(filter *l,
- filter *r);
-
-
-/* returns the index (pos + 1) if the name is in the filter. */
-
-extern int filter_is_member
-(filter *set,
- const char *flag);
-
-
-/* returns true if one of the flags is not present in the filter.
- === !filter_is_subset (filter_parse (NULL, flags), filters) */
-int is_filtered_out
-(filter *filters,
- const char *flags);
-
-
-/* returns the next member of the filter set that follows MEMBER.
- Member does not need to be an elememt of the filter set. Next of
- "" is the first non-empty member */
-char *filter_next
-(filter *set,
- char *member);
-
-
-
-/* for debugging */
-
-extern void dump_filter
-(lf *file,
- char *prefix,
- filter *filt,
- char *suffix);
diff --git a/sim/igen/filter_host.c b/sim/igen/filter_host.c
deleted file mode 100644
index de8c93fe439..00000000000
--- a/sim/igen/filter_host.c
+++ /dev/null
@@ -1,37 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1996, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-#include "config.h"
-#include "filter_host.h"
-
-/* Shorten traces by eliminating the directory component to filenames. */
-const char *
-filter_filename (const char *filename)
-{
- const char *p = filename;
- const char *last = filename;
- int ch;
-
- while ((ch = *p++) != '\0' && ch != ':')
- if (ch == '/')
- last = p;
-
- return last;
-}
diff --git a/sim/igen/filter_host.h b/sim/igen/filter_host.h
deleted file mode 100644
index fdfa6bc03e1..00000000000
--- a/sim/igen/filter_host.h
+++ /dev/null
@@ -1,27 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1997, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-#ifndef _FILTER_HOST_H
-#define _FILTER_HOST_H
-
-/* Remove directory part from filename */
-extern const char *
-filter_filename(const char *filename);
-#endif
diff --git a/sim/igen/gen-engine.c b/sim/igen/gen-engine.c
deleted file mode 100644
index 4b6861ed97e..00000000000
--- a/sim/igen/gen-engine.c
+++ /dev/null
@@ -1,807 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1998, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-#include "misc.h"
-#include "lf.h"
-#include "table.h"
-#include "filter.h"
-
-#include "igen.h"
-
-#include "ld-insn.h"
-#include "ld-decode.h"
-
-#include "gen.h"
-
-#include "gen-idecode.h"
-#include "gen-engine.h"
-#include "gen-icache.h"
-#include "gen-semantics.h"
-
-
-static void
-print_engine_issue_prefix_hook (lf *file)
-{
- lf_printf (file, "\n");
- lf_indent_suppress (file);
- lf_printf (file, "#if defined (%sENGINE_ISSUE_PREFIX_HOOK)\n",
- options.module.global.prefix.l);
- lf_printf (file, "%sENGINE_ISSUE_PREFIX_HOOK();\n",
- options.module.global.prefix.l);
- lf_indent_suppress (file);
- lf_printf (file, "#endif\n");
- lf_printf (file, "\n");
-}
-
-static void
-print_engine_issue_postfix_hook (lf *file)
-{
- lf_printf (file, "\n");
- lf_indent_suppress (file);
- lf_printf (file, "#if defined (%sENGINE_ISSUE_POSTFIX_HOOK)\n",
- options.module.global.prefix.l);
- lf_printf (file, "%sENGINE_ISSUE_POSTFIX_HOOK();\n",
- options.module.global.prefix.l);
- lf_indent_suppress (file);
- lf_printf (file, "#endif\n");
- lf_printf (file, "\n");
-}
-
-
-static void
-print_run_body (lf *file,
- gen_entry *table)
-{
- /* Output the function to execute real code:
-
- Unfortunatly, there are multiple cases to consider vis:
-
- <icache> X <smp>
-
- Consequently this function is written in multiple different ways */
-
- lf_printf (file, "{\n");
- lf_indent (file, +2);
- if (!options.gen.smp)
- {
- lf_printf (file, "%sinstruction_address cia;\n", options.module.global.prefix.l);
- }
- lf_printf (file, "int current_cpu = next_cpu_nr;\n");
-
- if (options.gen.icache)
- {
- lf_printf (file, "/* flush the icache of a possible break insn */\n");
- lf_printf (file, "{\n");
- lf_printf (file, " int cpu_nr;\n");
- lf_printf (file, " for (cpu_nr = 0; cpu_nr < nr_cpus; cpu_nr++)\n");
- lf_printf (file, " cpu_flush_icache (STATE_CPU (sd, cpu_nr));\n");
- lf_printf (file, "}\n");
- }
-
- if (!options.gen.smp)
- {
-
- lf_putstr (file, "
-/* CASE 1: NO SMP (with or with out instruction cache).
-
-In this case, we can take advantage of the fact that the current
-instruction address (CIA) does not need to be read from / written to
-the CPU object after the execution of an instruction.
-
-Instead, CIA is only saved when the main loop exits. This occures
-when either sim_engine_halt or sim_engine_restart is called. Both of
-these functions save the current instruction address before halting /
-restarting the simulator.
-
-As a variation, there may also be support for an instruction cracking
-cache. */
-
-");
-
- lf_putstr (file, "\n");
- lf_putstr (file, "/* prime the main loop */\n");
- lf_putstr (file, "SIM_ASSERT (current_cpu == 0);\n");
- lf_putstr (file, "SIM_ASSERT (nr_cpus == 1);\n");
- lf_putstr (file, "cia = CIA_GET (CPU);\n");
-
- lf_putstr (file, "\n");
- lf_putstr (file, "while (1)\n");
- lf_putstr (file, " {\n");
- lf_indent (file, +4);
-
- lf_printf (file, "%sinstruction_address nia;\n",
- options.module.global.prefix.l);
-
- lf_printf (file, "\n");
- if (!options.gen.icache)
- {
- lf_printf (file, "%sinstruction_word instruction_0 = IMEM%d (cia);\n",
- options.module.global.prefix.l,
- options.insn_bit_size);
- print_engine_issue_prefix_hook (file);
- print_idecode_body (file, table, "nia = ");
- print_engine_issue_postfix_hook (file);
- }
- else
- {
- lf_putstr (file, "idecode_cache *cache_entry =\n");
- lf_putstr (file, " cpu_icache_entry (cpu, cia);\n");
- lf_putstr (file, "if (cache_entry->address == cia)\n");
- lf_putstr (file, " {\n");
- lf_indent (file, -4);
- lf_putstr (file, "/* cache hit */\n");
- lf_putstr (file, "idecode_semantic *const semantic = cache_entry->semantic;\n");
- lf_putstr (file, "cia = semantic (cpu, cache_entry, cia);\n");
- /* tail */
- lf_indent (file, -4);
- lf_putstr (file, " }\n");
- lf_putstr (file, "else\n");
- lf_putstr (file, " {\n");
- lf_indent (file, +4);
- lf_putstr (file, "/* cache miss */\n");
- if (!options.gen.semantic_icache)
- {
- lf_putstr (file, "idecode_semantic *semantic;\n");
- }
- lf_printf (file, "instruction_word instruction = IMEM%d (cia);\n",
- options.insn_bit_size);
- lf_putstr (file, "if (WITH_MON != 0)\n");
- lf_putstr (file, " mon_event (mon_event_icache_miss, cpu, cia);\n");
- if (options.gen.semantic_icache)
- {
- lf_putstr (file, "{\n");
- lf_indent (file, +2);
- print_engine_issue_prefix_hook (file);
- print_idecode_body (file, table, "nia =");
- print_engine_issue_postfix_hook (file);
- lf_indent (file, -2);
- lf_putstr (file, "}\n");
- }
- else
- {
- print_engine_issue_prefix_hook (file);
- print_idecode_body (file, table, "semantic =");
- lf_putstr (file, "nia = semantic (cpu, cache_entry, cia);\n");
- print_engine_issue_postfix_hook (file);
- }
- lf_indent (file, -4);
- lf_putstr (file, " }\n");
- }
-
- /* update the cpu if necessary */
- switch (options.gen.nia)
- {
- case nia_is_cia_plus_one:
- lf_printf (file, "\n");
- lf_printf (file, "/* Update the instruction address */\n");
- lf_printf (file, "cia = nia;\n");
- break;
- case nia_is_void:
- case nia_is_invalid:
- ERROR ("engine gen when NIA complex");
- }
-
- /* events */
- lf_putstr (file, "\n");
- lf_putstr (file, "/* process any events */\n");
- lf_putstr (file, "if (sim_events_tick (sd))\n");
- lf_putstr (file, " {\n");
- lf_putstr (file, " CIA_SET (CPU, cia);\n");
- lf_putstr (file, " sim_events_process (sd);\n");
- lf_putstr (file, " cia = CIA_GET (CPU);\n");
- lf_putstr (file, " }\n");
-
- lf_indent (file, -4);
- lf_printf (file, " }\n");
- }
-
- if (options.gen.smp)
- {
-
- lf_putstr (file, "
-/* CASE 2: SMP (With or without ICACHE)
-
-The complexity here comes from needing to correctly halt the simulator
-when it is aborted. For instance, if cpu0 requests a restart then
-cpu1 will normally be the next cpu that is run. Cpu0 being restarted
-after all the other CPU's and the event queue have been processed */
-
-");
-
- lf_putstr (file, "\n");
- lf_printf (file, "/* have ensured that the event queue is NOT next */\n");
- lf_printf (file, "SIM_ASSERT (current_cpu >= 0);\n");
- lf_printf (file, "SIM_ASSERT (current_cpu <= nr_cpus - 1);\n");
- lf_printf (file, "SIM_ASSERT (nr_cpus <= MAX_NR_PROCESSORS);\n");
-
- lf_putstr (file, "\n");
- lf_putstr (file, "while (1)\n");
- lf_putstr (file, " {\n");
- lf_indent (file, +4);
- lf_putstr (file, "sim_cpu *cpu = STATE_CPU (sd, current_cpu);\n");
- lf_putstr (file, "instruction_address cia = CIA_GET (cpu);\n");
- lf_putstr (file, "\n");
-
- if (!options.gen.icache)
- {
- lf_printf (file, "instruction_word instruction_0 = IMEM%d (cia);\n",
- options.insn_bit_size);
- print_engine_issue_prefix_hook (file);
- print_idecode_body (file, table, "cia =");
- lf_putstr (file, "CIA_SET (cpu, cia);\n");
- print_engine_issue_postfix_hook (file);
- }
-
- if (options.gen.icache)
- {
- lf_putstr (file, "engine_cache *cache_entry =\n");
- lf_putstr (file, " cpu_icache_entry(processor, cia);\n");
- lf_putstr (file, "\n");
- lf_putstr (file, "if (cache_entry->address == cia) {\n");
- {
- lf_indent (file, +2);
- lf_putstr (file, "\n");
- lf_putstr (file, "/* cache hit */\n");
- lf_putstr (file, "engine_semantic *semantic = cache_entry->semantic;\n");
- lf_putstr (file, "cia = semantic(processor, cache_entry, cia);\n");
- /* tail */
- lf_putstr (file, "cpu_set_program_counter(processor, cia);\n");
- lf_putstr (file, "\n");
- lf_indent (file, -2);
- }
- lf_putstr (file, "}\n");
- lf_putstr (file, "else {\n");
- {
- lf_indent (file, +2);
- lf_putstr (file, "\n");
- lf_putstr (file, "/* cache miss */\n");
- if (!options.gen.semantic_icache)
- {
- lf_putstr (file, "engine_semantic *semantic;\n");
- }
- lf_printf (file, "instruction_word instruction = IMEM%d (cia);\n",
- options.insn_bit_size);
- lf_putstr (file, "if (WITH_MON != 0)\n");
- lf_putstr (file, " mon_event(mon_event_icache_miss, processors[current_cpu], cia);\n");
- if (options.gen.semantic_icache)
- {
- lf_putstr (file, "{\n");
- lf_indent (file, +2);
- print_engine_issue_prefix_hook (file);
- print_idecode_body(file, table, "cia =");
- print_engine_issue_postfix_hook (file);
- lf_indent (file, -2);
- lf_putstr (file, "}\n");
- }
- else
- {
- print_engine_issue_prefix_hook (file);
- print_idecode_body(file, table, "semantic = ");
- lf_putstr (file, "cia = semantic(processor, cache_entry, cia);\n");
- print_engine_issue_postfix_hook (file);
- }
- /* tail */
- lf_putstr (file, "cpu_set_program_counter(processor, cia);\n");
- lf_putstr (file, "\n");
- lf_indent (file, -2);
- }
- lf_putstr (file, "}\n");
- }
-
- lf_putstr (file, "\n");
- lf_putstr (file, "current_cpu += 1;\n");
- lf_putstr (file, "if (current_cpu == nr_cpus)\n");
- lf_putstr (file, " {\n");
- lf_putstr (file, " if (sim_events_tick (sd))\n");
- lf_putstr (file, " {\n");
- lf_putstr (file, " sim_events_process (sd);\n");
- lf_putstr (file, " }\n");
- lf_putstr (file, " current_cpu = 0;\n");
- lf_putstr (file, " }\n");
-
- /* tail */
- lf_indent (file, -4);
- lf_putstr (file, " }\n");
- }
-
-
- lf_indent (file, -2);
- lf_putstr (file, "}\n");
-}
-
-
-/****************************************************************/
-
-#if 0
-static void
-print_jump (lf *file,
- int is_tail)
-{
- if (!options.gen.smp)
- {
- lf_putstr (file, "if (event_queue_tick (sd))\n");
- lf_putstr (file, " {\n");
- lf_putstr (file, " CPU_CIA (processor) = nia;\n");
- lf_putstr (file, " sim_events_process (sd);\n");
- lf_putstr (file, " }\n");
- lf_putstr (file, "}\n");
- }
-
- if (options.gen.smp)
- {
- if (is_tail)
- lf_putstr (file, "cpu_set_program_counter(processor, nia);\n");
- lf_putstr (file, "current_cpu += 1;\n");
- lf_putstr (file, "if (current_cpu >= nr_cpus)\n");
- lf_putstr (file, " {\n");
- lf_putstr (file, " if (sim_events_tick (sd))\n");
- lf_putstr (file, " {\n");
- lf_putstr (file, " sim_events_process (sd);\n");
- lf_putstr (file, " }\n");
- lf_putstr (file, " current_cpu = 0;\n");
- lf_putstr (file, " }\n");
- lf_putstr (file, "processor = processors[current_cpu];\n");
- lf_putstr (file, "nia = cpu_get_program_counter(processor);\n");
- }
-
- if (options.gen.icache)
- {
- lf_putstr (file, "cache_entry = cpu_icache_entry(processor, nia);\n");
- lf_putstr (file, "if (cache_entry->address == nia) {\n");
- lf_putstr (file, " /* cache hit */\n");
- lf_putstr (file, " goto *cache_entry->semantic;\n");
- lf_putstr (file, "}\n");
- if (is_tail) {
- lf_putstr (file, "goto cache_miss;\n");
- }
- }
-
- if (!options.gen.icache && is_tail)
- {
- lf_printf (file, "goto engine;\n");
- }
-
-}
-#endif
-
-
-#if 0
-static void
-print_jump_insn (lf *file,
- insn_entry *instruction,
- opcode_bits *expanded_bits,
- opcode_field *opcodes,
- cache_entry *cache_rules)
-{
- insn_opcodes opcode_path;
-
- memset (&opcode_path, 0, sizeof (opcode_path));
- opcode_path.opcode = opcodes;
-
- /* what we are for the moment */
- lf_printf (file, "\n");
- print_my_defines (file,
- instruction->name,
- instruction->format_name,
- expanded_bits);
-
- /* output the icache entry */
- if (options.gen.icache)
- {
- lf_printf (file, "\n");
- lf_indent (file, -1);
- print_function_name (file,
- instruction->name,
- instruction->format_name,
- NULL,
- expanded_bits,
- function_name_prefix_icache);
- lf_printf (file, ":\n");
- lf_indent (file, +1);
- lf_printf (file, "{\n");
- lf_indent (file, +2);
- lf_putstr (file, "const unsigned_word cia = nia;\n");
- print_itrace (file, instruction, 1/*putting-value-in-cache*/);
- print_idecode_validate (file, instruction, &opcode_path);
- lf_printf (file, "\n");
- lf_printf (file, "{\n");
- lf_indent (file, +2);
- print_icache_body (file,
- instruction,
- expanded_bits,
- cache_rules,
- 0, /*use_defines*/
- put_values_in_icache);
- lf_printf (file, "cache_entry->address = nia;\n");
- lf_printf (file, "cache_entry->semantic = &&");
- print_function_name (file,
- instruction->name,
- instruction->format_name,
- NULL,
- expanded_bits,
- function_name_prefix_semantics);
- lf_printf (file, ";\n");
- if (options.gen.semantic_icache)
- {
- print_semantic_body (file,
- instruction,
- expanded_bits,
- &opcode_path);
- print_jump(file, 1/*is-tail*/);
- }
- else
- {
- lf_printf (file, "/* goto ");
- print_function_name (file,
- instruction->name,
- instruction->format_name,
- NULL,
- expanded_bits,
- function_name_prefix_semantics);
- lf_printf (file, "; */\n");
- }
- lf_indent (file, -2);
- lf_putstr (file, "}\n");
- lf_indent (file, -2);
- lf_printf (file, "}\n");
- }
-
- /* print the semantics */
- lf_printf (file, "\n");
- lf_indent (file, -1);
- print_function_name (file,
- instruction->name,
- instruction->format_name,
- NULL,
- expanded_bits,
- function_name_prefix_semantics);
- lf_printf (file, ":\n");
- lf_indent (file, +1);
- lf_printf (file, "{\n");
- lf_indent (file, +2);
- lf_putstr (file, "const unsigned_word cia = nia;\n");
- print_icache_body (file,
- instruction,
- expanded_bits,
- cache_rules,
- (options.gen.direct_access
- ? define_variables
- : declare_variables),
- (options.gen.icache
- ? get_values_from_icache
- : do_not_use_icache));
- print_semantic_body (file,
- instruction,
- expanded_bits,
- &opcode_path);
- if (options.gen.direct_access)
- print_icache_body (file,
- instruction,
- expanded_bits,
- cache_rules,
- undef_variables,
- (options.gen.icache
- ? get_values_from_icache
- : do_not_use_icache));
- print_jump(file, 1/*is tail*/);
- lf_indent (file, -2);
- lf_printf (file, "}\n");
-}
-#endif
-
-
-#if 0
-static void
-print_jump_definition (lf *file,
- gen_entry *entry,
- int depth,
- void *data)
-{
- cache_entry *cache_rules = (cache_entry*)data;
- if (entry->opcode_rule->with_duplicates)
- {
- ASSERT (entry->nr_insns == 1
- && entry->opcode == NULL
- && entry->parent != NULL
- && entry->parent->opcode != NULL);
- ASSERT (entry->nr_insns == 1
- && entry->opcode == NULL
- && entry->parent != NULL
- && entry->parent->opcode != NULL
- && entry->parent->opcode_rule != NULL);
- print_jump_insn (file,
- entry->insns->insn,
- entry->expanded_bits,
- entry->opcode,
- cache_rules);
- }
- else
- {
- print_jump_insn (file,
- entry->insns->insn,
- NULL,
- NULL,
- cache_rules);
- }
-}
-#endif
-
-
-#if 0
-static void
-print_jump_internal_function (lf *file,
- function_entry *function,
- void *data)
-{
- if (function->is_internal)
- {
- lf_printf (file, "\n");
- lf_print__line_ref (file, function->line);
- lf_indent (file, -1);
- print_function_name (file,
- function->name,
- NULL,
- NULL,
- NULL,
- (options.gen.icache
- ? function_name_prefix_icache
- : function_name_prefix_semantics));
- lf_printf (file, ":\n");
- lf_indent (file, +1);
- lf_printf (file, "{\n");
- lf_indent (file, +2);
- lf_printf (file, "const unsigned_word cia = nia;\n");
- table_print_code (file, function->code);
- lf_print__internal_ref (file);
- lf_printf (file, "error(\"Internal function must longjump\\n\");\n");
- lf_indent (file, -2);
- lf_printf (file, "}\n");
- }
-}
-#endif
-
-
-#if 0
-static void
-print_jump_body (lf *file,
- gen_entry *entry,
- insn_table *isa,
- cache_entry *cache_rules)
-{
- lf_printf (file, "{\n");
- lf_indent (file, +2);
- lf_putstr (file, "jmp_buf halt;\n");
- lf_putstr (file, "jmp_buf restart;\n");
- lf_putstr (file, "cpu *processor = NULL;\n");
- lf_putstr (file, "unsigned_word nia = -1;\n");
- lf_putstr (file, "instruction_word instruction = 0;\n");
- if (options.gen.icache)
- {
- lf_putstr (file, "engine_cache *cache_entry = NULL;\n");
- }
- if (options.gen.smp)
- {
- lf_putstr (file, "int current_cpu = -1;\n");
- }
-
- /* all the switches and tables - they know about jumping */
- print_idecode_lookups (file, entry, cache_rules);
-
- /* start the simulation up */
- if (options.gen.icache)
- {
- lf_putstr (file, "\n");
- lf_putstr (file, "{\n");
- lf_putstr (file, " int cpu_nr;\n");
- lf_putstr (file, " for (cpu_nr = 0; cpu_nr < nr_cpus; cpu_nr++)\n");
- lf_putstr (file, " cpu_flush_icache(processors[cpu_nr]);\n");
- lf_putstr (file, "}\n");
- }
-
- lf_putstr (file, "\n");
- lf_putstr (file, "psim_set_halt_and_restart(system, &halt, &restart);\n");
-
- lf_putstr (file, "\n");
- lf_putstr (file, "if (setjmp(halt))\n");
- lf_putstr (file, " return;\n");
-
- lf_putstr (file, "\n");
- lf_putstr (file, "setjmp(restart);\n");
-
- lf_putstr (file, "\n");
- if (!options.gen.smp)
- {
- lf_putstr (file, "processor = processors[0];\n");
- lf_putstr (file, "nia = cpu_get_program_counter(processor);\n");
- }
- else
- {
- lf_putstr (file, "current_cpu = psim_last_cpu(system);\n");
- }
-
- if (!options.gen.icache)
- {
- lf_printf (file, "\n");
- lf_indent (file, -1);
- lf_printf (file, "engine:\n");
- lf_indent (file, +1);
- }
-
- print_jump(file, 0/*is_tail*/);
-
- if (options.gen.icache)
- {
- lf_indent (file, -1);
- lf_printf (file, "cache_miss:\n");
- lf_indent (file, +1);
- }
-
- print_engine_issue_prefix_hook (file);
- lf_putstr (file, "instruction\n");
- lf_putstr (file, " = vm_instruction_map_read(cpu_instruction_map(processor),\n");
- lf_putstr (file, " processor, nia);\n");
- print_engine_issue_prefix_hook (file);
- print_idecode_body (file, entry, "/*IGORE*/");
- print_engine_issue_postfix_hook (file);
-
- /* print out a table of all the internals functions */
- function_entry_traverse (file, isa->functions,
- print_jump_internal_function,
- NULL);
-
- /* print out a table of all the instructions */
- ERROR ("Use the list of semantic functions, not travere_tree");
- gen_entry_traverse_tree (file, entry,
- 1,
- NULL, /* start */
- print_jump_definition, /* leaf */
- NULL, /* end */
- cache_rules);
- lf_indent (file, -2);
- lf_printf (file, "}\n");
-}
-#endif
-
-
-/****************************************************************/
-
-
-void
-print_engine_run_function_header (lf *file,
- char *processor,
- function_decl_type decl_type)
-{
- int indent;
- lf_printf (file, "\n");
- switch (decl_type)
- {
- case is_function_declaration:
- lf_print__function_type (file, "void", "INLINE_ENGINE", "\n");
- break;
- case is_function_definition:
- lf_print__function_type (file, "void", "INLINE_ENGINE", " ");
- break;
- case is_function_variable:
- lf_printf (file, "void (*");
- break;
- }
- indent = print_function_name (file,
- "run",
- NULL, /* format name */
- processor,
- NULL, /* expanded bits */
- function_name_prefix_engine);
- switch (decl_type)
- {
- case is_function_definition:
- lf_putstr (file, "\n(");
- indent = 1;
- break;
- case is_function_declaration:
- indent += lf_printf (file, " (");
- break;
- case is_function_variable:
- lf_putstr (file, ")\n(");
- indent = 1;
- break;
- }
- lf_indent (file, +indent);
- lf_printf (file, "SIM_DESC sd,\n");
- lf_printf (file, "int next_cpu_nr,\n");
- lf_printf (file, "int nr_cpus,\n");
- lf_printf (file, "int siggnal)");
- lf_indent (file, -indent);
- switch (decl_type)
- {
- case is_function_definition:
- lf_putstr (file, "\n");
- break;
- case is_function_variable:
- case is_function_declaration:
- lf_putstr (file, ";\n");
- break;
- }
-}
-
-
-void
-gen_engine_h (lf *file,
- gen_table *gen,
- insn_table *isa,
- cache_entry *cache_rules)
-{
- gen_list *entry;
- for (entry = gen->tables; entry != NULL; entry = entry->next)
- {
- print_engine_run_function_header (file,
- (options.gen.multi_sim
- ? entry->model->name
- : NULL),
- is_function_declaration);
- }
-}
-
-
-void
-gen_engine_c(lf *file,
- gen_table *gen,
- insn_table *isa,
- cache_entry *cache_rules)
-{
- gen_list *entry;
- /* the intro */
- print_includes (file);
- print_include_inline (file, options.module.semantics);
- print_include (file, options.module.engine);
- lf_printf (file, "\n");
- lf_printf (file, "#include \"sim-assert.h\"\n");
- lf_printf (file, "\n");
- print_idecode_globals (file);
- lf_printf (file, "\n");
-
- for (entry = gen->tables; entry != NULL; entry = entry->next)
- {
- switch (options.gen.code)
- {
- case generate_calls:
- print_idecode_lookups (file, entry->table, cache_rules);
-
- /* output the main engine routine */
- print_engine_run_function_header (file,
- (options.gen.multi_sim
- ? entry->model->name
- : NULL),
- is_function_definition);
- print_run_body (file, entry->table);
- break;
-
- case generate_jumps:
- ERROR ("Jumps currently unimplemented");
-#if 0
- print_engine_run_function_header (file,
- entry->processor,
- is_function_definition);
- print_jump_body (file, entry->table,
- isa, cache_rules);
-#endif
- break;
- }
- }
-}
diff --git a/sim/igen/gen-engine.h b/sim/igen/gen-engine.h
deleted file mode 100644
index 9dbd87abbd5..00000000000
--- a/sim/igen/gen-engine.h
+++ /dev/null
@@ -1,37 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1997, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-extern void gen_engine_h
-(lf *file,
- gen_table *gen,
- insn_table *isa,
- cache_entry *cache_rules);
-
-extern void gen_engine_c
-(lf *file,
- gen_table *gen,
- insn_table *isa,
- cache_entry *cache_rules);
-
-extern void print_engine_run_function_header
-(lf *file,
- char *processor,
- function_decl_type decl_type);
-
diff --git a/sim/igen/gen-icache.c b/sim/igen/gen-icache.c
deleted file mode 100644
index 88d5d412288..00000000000
--- a/sim/igen/gen-icache.c
+++ /dev/null
@@ -1,859 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1998, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-#include "misc.h"
-#include "lf.h"
-#include "table.h"
-#include "filter.h"
-#include "igen.h"
-
-#include "ld-insn.h"
-#include "ld-decode.h"
-
-#include "gen.h"
-
-#include "gen-semantics.h"
-#include "gen-idecode.h"
-#include "gen-icache.h"
-
-
-
-static void
-print_icache_function_header (lf *file,
- const char *basename,
- const char *format_name,
- opcode_bits *expanded_bits,
- int is_function_definition,
- int nr_prefetched_words)
-{
- lf_printf(file, "\n");
- lf_print__function_type_function (file, print_icache_function_type,
- "EXTERN_ICACHE", " ");
- print_function_name (file,
- basename, format_name, NULL,
- expanded_bits,
- function_name_prefix_icache);
- lf_printf (file, "\n(");
- print_icache_function_formal (file, nr_prefetched_words);
- lf_printf (file, ")");
- if (!is_function_definition)
- lf_printf (file, ";");
- lf_printf (file, "\n");
-}
-
-
-void
-print_icache_declaration (lf *file,
- insn_entry *insn,
- opcode_bits *expanded_bits,
- insn_opcodes *opcodes,
- int nr_prefetched_words)
-{
- print_icache_function_header (file,
- insn->name,
- insn->format_name,
- expanded_bits,
- 0/* is not function definition */,
- nr_prefetched_words);
-}
-
-
-
-static void
-print_icache_extraction (lf *file,
- const char *format_name,
- cache_entry_type cache_type,
- const char *entry_name,
- const char *entry_type,
- const char *entry_expression,
- char *single_insn_field,
- line_ref *line,
- insn_field_entry *cur_field,
- opcode_bits *expanded_bits,
- icache_decl_type what_to_declare,
- icache_body_type what_to_do)
-{
- const char *expression;
- opcode_bits *bits;
- char *reason;
- ASSERT (format_name != NULL);
- ASSERT (entry_name != NULL);
-
- /* figure out exactly what should be going on here */
- switch (cache_type)
- {
- case scratch_value:
- if ((what_to_do & put_values_in_icache)
- || what_to_do == do_not_use_icache)
- {
- reason = "scratch";
- what_to_do = do_not_use_icache;
- }
- else
- return;
- break;
- case compute_value:
- if ((what_to_do & get_values_from_icache)
- || what_to_do == do_not_use_icache)
- {
- reason = "compute";
- what_to_do = do_not_use_icache;
- }
- else
- return;
- break;
- case cache_value:
- if ((what_to_declare != undef_variables)
- || !(what_to_do & put_values_in_icache))
- {
- reason = "cache";
- what_to_declare = ((what_to_do & put_values_in_icache)
- ? declare_variables
- : what_to_declare);
- }
- else
- return;
- break;
- }
-
- /* For the type, default to a simple unsigned */
- if (entry_type == NULL || strlen (entry_type) == 0)
- entry_type = "unsigned";
-
- /* look through the set of expanded sub fields to see if this field
- has been given a constant value */
- for (bits = expanded_bits;
- bits != NULL;
- bits = bits->next)
- {
- if (bits->field == cur_field)
- break;
- }
-
- /* Define a storage area for the cache element */
- switch (what_to_declare)
- {
- case undef_variables:
- /* We've finished with the #define value - destory it */
- lf_indent_suppress (file);
- lf_printf (file, "#undef %s\n", entry_name);
- return;
- case define_variables:
- /* Using direct access for this entry, clear any prior
- definition, then define it */
- lf_indent_suppress (file);
- lf_printf (file, "#undef %s\n", entry_name);
- /* Don't type cast pointer types! */
- lf_indent_suppress (file);
- if (strchr (entry_type, '*') != NULL)
- lf_printf (file, "#define %s (", entry_name);
- else
- lf_printf (file, "#define %s ((%s) ", entry_name, entry_type);
- break;
- case declare_variables:
- /* using variables to define the value */
- if (line != NULL)
- lf_print__line_ref (file, line);
- lf_printf (file, "%s const %s UNUSED = ", entry_type, entry_name);
- break;
- }
-
-
- /* define a value for that storage area as determined by what is in
- the cache */
- if (bits != NULL
- && single_insn_field != NULL
- && strcmp (entry_name, single_insn_field) == 0
- && strcmp (entry_name, cur_field->val_string) == 0
- && ((bits->opcode->is_boolean && bits->value == 0)
- || (!bits->opcode->is_boolean)))
- {
- /* The cache rule is specifying what to do with a simple
- instruction field.
-
- Because of instruction expansion, the field is either a
- constant value or equal to the specified constant (boolean
- comparison). (The latter indicated by bits->value == 0).
-
- The case of a field not being equal to the specified boolean
- value is handled later. */
- expression = "constant field";
- ASSERT (bits->field == cur_field);
- if (bits->opcode->is_boolean)
- {
- ASSERT (bits->value == 0);
- lf_printf (file, "%d", bits->opcode->boolean_constant);
- }
- else if (bits->opcode->last < bits->field->last)
- {
- lf_printf (file, "%d",
- bits->value << (bits->field->last - bits->opcode->last));
- }
- else
- {
- lf_printf (file, "%d", bits->value);
- }
- }
- else if (bits != NULL
- && single_insn_field != NULL
- && strncmp (entry_name,
- single_insn_field,
- strlen (single_insn_field)) == 0
- && strncmp (entry_name + strlen (single_insn_field),
- "_is_",
- strlen ("_is_")) == 0
- && ((bits->opcode->is_boolean
- && ((unsigned) atol (entry_name + strlen (single_insn_field) + strlen ("_is_"))
- == bits->opcode->boolean_constant))
- || (!bits->opcode->is_boolean)))
- {
- /* The cache rule defines an entry for the comparison between a
- single instruction field and a constant. The value of the
- comparison in someway matches that of the opcode field that
- was made constant through expansion. */
- expression = "constant compare";
- if (bits->opcode->is_boolean)
- {
- lf_printf (file, "%d /* %s == %d */",
- bits->value == 0,
- single_insn_field,
- bits->opcode->boolean_constant);
- }
- else if (bits->opcode->last < bits->field->last)
- {
- lf_printf (file, "%d /* %s == %d */",
- (atol (entry_name + strlen (single_insn_field) + strlen ("_is_"))
- == (bits->value << (bits->field->last - bits->opcode->last))),
- single_insn_field,
- (bits->value << (bits->field->last - bits->opcode->last)));
- }
- else
- {
- lf_printf (file, "%d /* %s == %d */",
- (atol (entry_name + strlen (single_insn_field) + strlen ("_is_"))
- == bits->value),
- single_insn_field,
- bits->value);
- }
- }
- else
- {
- /* put the field in the local variable, possibly also enter it
- into the cache */
- expression = "extraction";
- /* handle the cache */
- if ((what_to_do & get_values_from_icache)
- || (what_to_do & put_values_in_icache))
- {
- lf_printf (file, "cache_entry->crack.%s.%s",
- format_name,
- entry_name);
- if (what_to_do & put_values_in_icache) /* also put it in the cache? */
- {
- lf_printf (file, " = ");
- }
- }
- if ((what_to_do & put_values_in_icache)
- || what_to_do == do_not_use_icache)
- {
- if (cur_field != NULL)
- {
- if (entry_expression != NULL && strlen (entry_expression) > 0)
- error (line, "Instruction field entry with nonempty expression\n");
- if (cur_field->first == 0 && cur_field->last == options.insn_bit_size - 1)
- lf_printf (file, "(instruction_%d)",
- cur_field->word_nr);
- else if (cur_field->last == options.insn_bit_size - 1)
- lf_printf (file, "MASKED%d (instruction_%d, %d, %d)",
- options.insn_bit_size,
- cur_field->word_nr,
- i2target (options.hi_bit_nr, cur_field->first),
- i2target (options.hi_bit_nr, cur_field->last));
- else
- lf_printf (file, "EXTRACTED%d (instruction_%d, %d, %d)",
- options.insn_bit_size,
- cur_field->word_nr,
- i2target (options.hi_bit_nr, cur_field->first),
- i2target (options.hi_bit_nr, cur_field->last));
- }
- else
- {
- lf_printf (file, "%s", entry_expression);
- }
- }
- }
-
- switch (what_to_declare)
- {
- case define_variables:
- lf_printf (file, ")");
- break;
- case undef_variables:
- break;
- case declare_variables:
- lf_printf (file, ";");
- break;
- }
-
- ASSERT (reason != NULL && expression != NULL);
- lf_printf (file, " /* %s - %s */\n", reason, expression);
-}
-
-
-void
-print_icache_body (lf *file,
- insn_entry *instruction,
- opcode_bits *expanded_bits,
- cache_entry *cache_rules,
- icache_decl_type what_to_declare,
- icache_body_type what_to_do,
- int nr_prefetched_words)
-{
- /* extract instruction fields */
- lf_printf (file, "/* Extraction: %s\n", instruction->name);
- lf_printf (file, " ");
- switch (what_to_declare)
- {
- case define_variables:
- lf_printf (file, "#define");
- break;
- case declare_variables:
- lf_printf (file, "declare");
- break;
- case undef_variables:
- lf_printf (file, "#undef");
- break;
- }
- lf_printf (file, " ");
- switch (what_to_do)
- {
- case get_values_from_icache:
- lf_printf (file, "get-values-from-icache");
- break;
- case put_values_in_icache:
- lf_printf (file, "put-values-in-icache");
- break;
- case both_values_and_icache:
- lf_printf (file, "get-values-from-icache|put-values-in-icache");
- break;
- case do_not_use_icache:
- lf_printf (file, "do-not-use-icache");
- break;
- }
- lf_printf (file, "\n ");
- print_insn_words (file, instruction);
- lf_printf(file, " */\n");
-
- /* pass zero - fetch from memory any missing instructions.
-
- Some of the instructions will have already been fetched (in the
- instruction array), others will still need fetching. */
- switch (what_to_do)
- {
- case get_values_from_icache:
- break;
- case put_values_in_icache:
- case both_values_and_icache:
- case do_not_use_icache:
- {
- int word_nr;
- switch (what_to_declare)
- {
- case undef_variables:
- break;
- case define_variables:
- case declare_variables:
- for (word_nr = nr_prefetched_words;
- word_nr < instruction->nr_words;
- word_nr++)
- {
- /* FIXME - should be using print_icache_extraction? */
- lf_printf (file, "%sinstruction_word instruction_%d UNUSED = ",
- options.module.global.prefix.l,
- word_nr);
- lf_printf (file, "IMEM%d_IMMED (cia, %d)",
- options.insn_bit_size, word_nr);
- lf_printf (file, ";\n");
- }
- }
- }
- }
-
- /* if putting the instruction words in the cache, define references
- for them */
- if (options.gen.insn_in_icache) {
- /* FIXME: is the instruction_word type correct? */
- print_icache_extraction (file,
- instruction->format_name,
- cache_value,
- "insn", /* name */
- "instruction_word", /* type */
- "instruction", /* expression */
- NULL, /* origin */
- NULL, /* line */
- NULL, NULL,
- what_to_declare,
- what_to_do);
- }
- lf_printf(file, "\n");
-
- /* pass one - process instruction fields.
-
- If there is no cache rule, the default is to enter the field into
- the cache */
- {
- insn_word_entry *word;
- for (word = instruction->words;
- word != NULL;
- word = word->next)
- {
- insn_field_entry *cur_field;
- for (cur_field = word->first;
- cur_field->first < options.insn_bit_size;
- cur_field = cur_field->next)
- {
- if (cur_field->type == insn_field_string)
- {
- cache_entry *cache_rule;
- cache_entry_type value_type = cache_value;
- line_ref *value_line = instruction->line;
- /* check the cache table to see if it contains a rule
- overriding the default cache action for an
- instruction field */
- for (cache_rule = cache_rules;
- cache_rule != NULL;
- cache_rule = cache_rule->next)
- {
- if (filter_is_subset (instruction->field_names,
- cache_rule->original_fields)
- && strcmp (cache_rule->name, cur_field->val_string) == 0)
- {
- value_type = cache_rule->entry_type;
- value_line = cache_rule->line;
- if (value_type == compute_value)
- {
- options.warning (cache_rule->line,
- "instruction field of type `compute' changed to `cache'\n");
- cache_rule->entry_type = cache_value;
- }
- break;
- }
- }
- /* Define an entry for the field within the
- instruction */
- print_icache_extraction (file,
- instruction->format_name,
- value_type,
- cur_field->val_string, /* name */
- NULL, /* type */
- NULL, /* expression */
- cur_field->val_string, /* insn field */
- value_line,
- cur_field,
- expanded_bits,
- what_to_declare,
- what_to_do);
- }
- }
- }
- }
-
- /* pass two - any cache fields not processed above */
- {
- cache_entry *cache_rule;
- for (cache_rule = cache_rules;
- cache_rule != NULL;
- cache_rule = cache_rule->next)
- {
- if (filter_is_subset (instruction->field_names,
- cache_rule->original_fields)
- && !filter_is_member (instruction->field_names,
- cache_rule->name))
- {
- char *single_field = filter_next (cache_rule->original_fields, "");
- if (filter_next (cache_rule->original_fields, single_field) != NULL)
- single_field = NULL;
- print_icache_extraction (file,
- instruction->format_name,
- cache_rule->entry_type,
- cache_rule->name,
- cache_rule->type,
- cache_rule->expression,
- single_field,
- cache_rule->line,
- NULL, /* cur_field */
- expanded_bits,
- what_to_declare,
- what_to_do);
- }
- }
- }
-
- lf_print__internal_ref (file);
-}
-
-
-
-typedef struct _form_fields form_fields;
-struct _form_fields {
- char *name;
- filter *fields;
- form_fields *next;
-};
-
-static form_fields *
-insn_table_cache_fields (insn_table *isa)
-{
- form_fields *forms = NULL;
- insn_entry *insn;
- for (insn = isa->insns;
- insn != NULL;
- insn = insn->next) {
- form_fields **form = &forms;
- while (1)
- {
- if (*form == NULL)
- {
- /* new format name, add it */
- form_fields *new_form = ZALLOC (form_fields);
- new_form->name = insn->format_name;
- filter_add (&new_form->fields, insn->field_names);
- *form = new_form;
- break;
- }
- else if (strcmp ((*form)->name, insn->format_name) == 0)
- {
- /* already present, add field names to the existing list */
- filter_add (&(*form)->fields, insn->field_names);
- break;
- }
- form = &(*form)->next;
- }
- }
- return forms;
-}
-
-
-
-extern void
-print_icache_struct (lf *file,
- insn_table *isa,
- cache_entry *cache_rules)
-{
- /* Create a list of all the different instruction formats with their
- corresponding field names. */
- form_fields *formats = insn_table_cache_fields (isa);
-
- lf_printf (file, "\n");
- lf_printf (file, "#define WITH_%sIDECODE_CACHE_SIZE %d\n",
- options.module.global.prefix.u,
- (options.gen.icache ? options.gen.icache_size : 0));
- lf_printf (file, "\n");
-
- /* create an instruction cache if being used */
- if (options.gen.icache) {
- lf_printf (file, "typedef struct _%sidecode_cache {\n",
- options.module.global.prefix.l);
- lf_indent (file, +2);
- {
- form_fields *format;
- lf_printf (file, "unsigned_word address;\n");
- lf_printf (file, "void *semantic;\n");
- lf_printf (file, "union {\n");
- lf_indent (file, +2);
- for (format = formats;
- format != NULL;
- format = format->next)
- {
- lf_printf (file, "struct {\n");
- lf_indent (file, +2);
- {
- cache_entry *cache_rule;
- char *field;
- /* space for any instruction words */
- if (options.gen.insn_in_icache)
- lf_printf (file, "instruction_word insn[%d];\n", isa->max_nr_words);
- /* define an entry for any applicable cache rules */
- for (cache_rule = cache_rules;
- cache_rule != NULL;
- cache_rule = cache_rule->next)
- {
- /* nb - sort of correct - should really check against
- individual instructions */
- if (filter_is_subset (format->fields, cache_rule->original_fields))
- {
- char *memb;
- lf_printf (file, "%s %s;",
- (cache_rule->type == NULL
- ? "unsigned"
- : cache_rule->type),
- cache_rule->name);
- lf_printf (file, " /*");
- for (memb = filter_next (cache_rule->original_fields, "");
- memb != NULL;
- memb = filter_next (cache_rule->original_fields, memb))
- {
- lf_printf (file, " %s", memb);
- }
- lf_printf (file, " */\n");
- }
- }
- /* define an entry for any fields not covered by a cache rule */
- for (field = filter_next (format->fields, "");
- field != NULL;
- field = filter_next (format->fields, field))
- {
- cache_entry *cache_rule;
- int found_rule = 0;
- for (cache_rule = cache_rules;
- cache_rule != NULL;
- cache_rule = cache_rule->next)
- {
- if (strcmp (cache_rule->name, field) == 0)
- {
- found_rule = 1;
- break;
- }
- }
- if (!found_rule)
- lf_printf (file, "unsigned %s; /* default */\n", field);
- }
- }
- lf_indent (file, -2);
- lf_printf (file, "} %s;\n", format->name);
- }
- lf_indent (file, -2);
- lf_printf (file, "} crack;\n");
- }
- lf_indent (file, -2);
- lf_printf (file, "} %sidecode_cache;\n", options.module.global.prefix.l);
- }
- else
- {
- /* alernativly, since no cache, emit a dummy definition for
- idecode_cache so that code refering to the type can still compile */
- lf_printf(file, "typedef void %sidecode_cache;\n",
- options.module.global.prefix.l);
- }
- lf_printf (file, "\n");
-}
-
-
-
-static void
-print_icache_function (lf *file,
- insn_entry *instruction,
- opcode_bits *expanded_bits,
- insn_opcodes *opcodes,
- cache_entry *cache_rules,
- int nr_prefetched_words)
-{
- int indent;
-
- /* generate code to enter decoded instruction into the icache */
- lf_printf(file, "\n");
- lf_print__function_type_function (file, print_icache_function_type,
- "EXTERN_ICACHE", "\n");
- indent = print_function_name (file,
- instruction->name,
- instruction->format_name,
- NULL,
- expanded_bits,
- function_name_prefix_icache);
- indent += lf_printf (file, " ");
- lf_indent (file, +indent);
- lf_printf (file, "(");
- print_icache_function_formal (file, nr_prefetched_words);
- lf_printf (file, ")\n");
- lf_indent (file, -indent);
-
- /* function header */
- lf_printf (file, "{\n");
- lf_indent (file, +2);
-
- print_my_defines (file,
- instruction->name,
- instruction->format_name,
- expanded_bits);
- print_itrace (file, instruction, 1/*putting-value-in-cache*/);
-
- print_idecode_validate (file, instruction, opcodes);
-
- lf_printf (file, "\n");
- lf_printf (file, "{\n");
- lf_indent (file, +2);
- if (options.gen.semantic_icache)
- lf_printf (file, "unsigned_word nia;\n");
- print_icache_body (file,
- instruction,
- expanded_bits,
- cache_rules,
- (options.gen.direct_access
- ? define_variables
- : declare_variables),
- (options.gen.semantic_icache
- ? both_values_and_icache
- : put_values_in_icache),
- nr_prefetched_words);
-
- lf_printf (file, "\n");
- lf_printf (file, "cache_entry->address = cia;\n");
- lf_printf (file, "cache_entry->semantic = ");
- print_function_name (file,
- instruction->name,
- instruction->format_name,
- NULL,
- expanded_bits,
- function_name_prefix_semantics);
- lf_printf (file, ";\n");
- lf_printf (file, "\n");
-
- if (options.gen.semantic_icache) {
- lf_printf (file, "/* semantic routine */\n");
- print_semantic_body (file,
- instruction,
- expanded_bits,
- opcodes);
- lf_printf (file, "return nia;\n");
- }
-
- if (!options.gen.semantic_icache)
- {
- lf_printf (file, "/* return the function proper */\n");
- lf_printf (file, "return ");
- print_function_name (file,
- instruction->name,
- instruction->format_name,
- NULL,
- expanded_bits,
- function_name_prefix_semantics);
- lf_printf (file, ";\n");
- }
-
- if (options.gen.direct_access)
- {
- print_icache_body (file,
- instruction,
- expanded_bits,
- cache_rules,
- undef_variables,
- (options.gen.semantic_icache
- ? both_values_and_icache
- : put_values_in_icache),
- nr_prefetched_words);
- }
-
- lf_indent (file, -2);
- lf_printf (file, "}\n");
- lf_indent (file, -2);
- lf_printf (file, "}\n");
-}
-
-
-void
-print_icache_definition (lf *file,
- insn_entry *insn,
- opcode_bits *expanded_bits,
- insn_opcodes *opcodes,
- cache_entry *cache_rules,
- int nr_prefetched_words)
-{
- print_icache_function (file,
- insn,
- expanded_bits,
- opcodes,
- cache_rules,
- nr_prefetched_words);
-}
-
-
-
-void
-print_icache_internal_function_declaration (lf *file,
- function_entry *function,
- void *data)
-{
- ASSERT (options.gen.icache);
- if (function->is_internal)
- {
- lf_printf (file, "\n");
- lf_print__function_type_function (file, print_icache_function_type,
- "INLINE_ICACHE", "\n");
- print_function_name (file,
- function->name,
- NULL,
- NULL,
- NULL,
- function_name_prefix_icache);
- lf_printf (file, "\n(");
- print_icache_function_formal (file, 0);
- lf_printf (file, ");\n");
- }
-}
-
-
-void
-print_icache_internal_function_definition (lf *file,
- function_entry *function,
- void *data)
-{
- ASSERT (options.gen.icache);
- if (function->is_internal)
- {
- lf_printf (file, "\n");
- lf_print__function_type_function (file, print_icache_function_type,
- "INLINE_ICACHE", "\n");
- print_function_name (file,
- function->name,
- NULL,
- NULL,
- NULL,
- function_name_prefix_icache);
- lf_printf (file, "\n(");
- print_icache_function_formal (file, 0);
- lf_printf (file, ")\n");
- lf_printf (file, "{\n");
- lf_indent (file, +2);
- lf_printf (file, "/* semantic routine */\n");
- if (options.gen.semantic_icache)
- {
- lf_print__line_ref (file, function->code->line);
- table_print_code (file, function->code);
- lf_printf (file, "error (\"Internal function must longjump\\n\");\n");
- lf_printf (file, "return 0;\n");
- }
- else
- {
- lf_printf (file, "return ");
- print_function_name (file,
- function->name,
- NULL,
- NULL,
- NULL,
- function_name_prefix_semantics);
- lf_printf (file, ";\n");
- }
-
- lf_print__internal_ref (file);
- lf_indent (file, -2);
- lf_printf (file, "}\n");
- }
-}
diff --git a/sim/igen/gen-icache.h b/sim/igen/gen-icache.h
deleted file mode 100644
index 34c73f62276..00000000000
--- a/sim/igen/gen-icache.h
+++ /dev/null
@@ -1,81 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1997, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-
-/* Output code to manipulate the instruction cache: either create it
- or reference it */
-
-typedef enum {
- declare_variables,
- define_variables,
- undef_variables,
-} icache_decl_type;
-
-typedef enum {
- do_not_use_icache = 0,
- get_values_from_icache = 0x1,
- put_values_in_icache = 0x2,
- both_values_and_icache = 0x3,
-} icache_body_type;
-
-extern void print_icache_body
-(lf *file,
- insn_entry *instruction,
- opcode_bits *expanded_bits,
- cache_entry *cache_rules,
- icache_decl_type what_to_declare,
- icache_body_type what_to_do,
- int nr_prefetched_words);
-
-
-/* Output an instruction cache decode function */
-
-extern void print_icache_declaration
-(lf *file,
- insn_entry *insn,
- opcode_bits *expanded_bits,
- insn_opcodes *opcodes,
- int nr_prefetched_words);
-
-extern void print_icache_definition
-(lf *file,
- insn_entry *insn,
- opcode_bits *expanded_bits,
- insn_opcodes *opcodes,
- cache_entry *cache_rules,
- int nr_prefetched_words);
-
-
-/* Output an instruction cache support function */
-
-extern function_entry_handler print_icache_internal_function_declaration;
-extern function_entry_handler print_icache_internal_function_definition;
-
-
-/* Output the instruction cache table data structure */
-
-extern void print_icache_struct
-(lf *file,
- insn_table *instructions,
- cache_entry *cache_rules);
-
-
-/* Output a single instructions decoder */
diff --git a/sim/igen/gen-idecode.c b/sim/igen/gen-idecode.c
deleted file mode 100644
index a670e3d289b..00000000000
--- a/sim/igen/gen-idecode.c
+++ /dev/null
@@ -1,1391 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1998, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-#include "misc.h"
-#include "lf.h"
-#include "table.h"
-#include "filter.h"
-#include "igen.h"
-
-#include "ld-insn.h"
-#include "ld-decode.h"
-
-#include "gen.h"
-
-#include "gen-idecode.h"
-#include "gen-icache.h"
-#include "gen-semantics.h"
-
-
-
-static void
-lf_print_opcodes (lf *file,
- gen_entry *table)
-{
- if (table != NULL)
- {
- while (1)
- {
- ASSERT (table->opcode != NULL);
- lf_printf (file, "_%d_%d",
- table->opcode->first,
- table->opcode->last);
- if (table->parent == NULL) break;
- lf_printf (file, "__%d", table->opcode_nr);
- table = table->parent;
- }
- }
-}
-
-
-
-
-static void
-print_idecode_ifetch (lf *file,
- int previous_nr_prefetched_words,
- int current_nr_prefetched_words)
-{
- int word_nr;
- for (word_nr = previous_nr_prefetched_words;
- word_nr < current_nr_prefetched_words;
- word_nr ++)
- {
- lf_printf (file, "instruction_word instruction_%d = IMEM%d_IMMED (cia, %d);\n",
- word_nr, options.insn_bit_size, word_nr);
-
- }
-}
-
-
-
-/****************************************************************/
-
-
-static void
-lf_print_table_name (lf *file,
- gen_entry *table)
-{
- lf_printf (file, "idecode_table");
- lf_print_opcodes (file, table);
-}
-
-
-
-static void
-print_idecode_table (lf *file,
- gen_entry *entry,
- const char *result)
-{
- lf_printf (file, "/* prime the search */\n");
- lf_printf (file, "idecode_table_entry *table = ");
- lf_print_table_name (file, entry);
- lf_printf (file, ";\n");
- lf_printf (file, "int opcode = EXTRACTED%d (instruction, %d, %d);\n",
- options.insn_bit_size,
- i2target (options.hi_bit_nr, entry->opcode->first),
- i2target (options.hi_bit_nr, entry->opcode->last));
- lf_printf (file, "idecode_table_entry *table_entry = table + opcode;\n");
-
- lf_printf (file, "\n");
- lf_printf (file, "/* iterate until a leaf */\n");
- lf_printf (file, "while (1) {\n");
- lf_printf (file, " signed shift = table_entry->shift;\n");
- lf_printf (file, "if (shift == function_entry) break;\n");
- lf_printf (file, " if (shift >= 0) {\n");
- lf_printf (file, " table = ((idecode_table_entry*)\n");
- lf_printf (file, " table_entry->function_or_table);\n");
- lf_printf (file, " opcode = ((instruction & table_entry->mask)\n");
- lf_printf (file, " >> shift);\n");
- lf_printf (file, " table_entry = table + opcode;\n");
- lf_printf (file, " }\n");
- lf_printf (file, " else {\n");
- lf_printf (file, " /* must be a boolean */\n");
- lf_printf (file, " ASSERT(table_entry->shift == boolean_entry);\n");
- lf_printf (file, " opcode = ((instruction & table_entry->mask)\n");
- lf_printf (file, " != table_entry->value);\n");
- lf_printf (file, " table = ((idecode_table_entry*)\n");
- lf_printf (file, " table_entry->function_or_table);\n");
- lf_printf (file, " table_entry = table + opcode;\n");
- lf_printf (file, " }\n");
- lf_printf (file, "}\n");
-
- lf_printf (file, "\n");
- lf_printf (file, "/* call the leaf code */\n");
- if (options.gen.code == generate_jumps)
- {
- lf_printf (file, "goto *table_entry->function_or_table;\n");
- }
- else
- {
- lf_printf (file, "%s ", result);
- if (options.gen.icache)
- {
- lf_printf (file, "(((idecode_icache*)table_entry->function_or_table)\n");
- lf_printf (file, " (");
- print_icache_function_actual (file, 1);
- lf_printf (file, "));\n");
- }
- else
- {
- lf_printf (file, "((idecode_semantic*)table_entry->function_or_table)\n");
- lf_printf (file, " (");
- print_semantic_function_actual (file, 1);
- lf_printf (file, ");\n");
- }
- }
-}
-
-
-static void
-print_idecode_table_start (lf *file,
- gen_entry *table,
- int depth,
- void *data)
-{
- ASSERT (depth == 0);
- /* start of the table */
- if (table->opcode_rule->gen == array_gen)
- {
- lf_printf (file, "\n");
- lf_printf (file, "static idecode_table_entry ");
- lf_print_table_name (file, table);
- lf_printf (file, "[] = {\n");
- }
-}
-
-static void
-print_idecode_table_leaf (lf *file,
- gen_entry *entry,
- int depth,
- void *data)
-{
- gen_entry *master_entry;
- ASSERT (entry->parent != NULL);
- ASSERT (depth == 0);
- if (entry->combined_parent == NULL)
- master_entry = entry;
- else
- master_entry = entry->combined_parent;
-
- /* add an entry to the table */
- if (entry->parent->opcode_rule->gen == array_gen)
- {
- lf_printf (file, " /*%d*/ { ", entry->opcode_nr);
- if (entry->opcode == NULL)
- {
- ASSERT (entry->nr_insns == 1);
- /* table leaf entry */
- lf_printf (file, "function_entry, 0, 0, ");
- if (options.gen.code == generate_jumps)
- {
- lf_printf (file, "&&");
- }
- print_function_name (file,
- entry->insns->insn->name,
- entry->insns->insn->format_name,
- NULL,
- master_entry->expanded_bits,
- (options.gen.icache
- ? function_name_prefix_icache
- : function_name_prefix_semantics));
- }
- else if (entry->opcode_rule->gen == switch_gen
- || entry->opcode_rule->gen == goto_switch_gen
- || entry->opcode_rule->gen == padded_switch_gen)
- {
- /* table calling switch statement */
- lf_printf (file, "function_entry, 0, 0, ");
- if (options.gen.code == generate_jumps)
- {
- lf_printf (file, "&&");
- }
- lf_print_table_name (file, entry);
- }
- else if (entry->opcode->is_boolean)
- {
- /* table `calling' boolean table */
- lf_printf (file, "boolean_entry, ");
- lf_printf (file, "MASK32(%d, %d), ",
- i2target (options.hi_bit_nr, entry->opcode->first),
- i2target (options.hi_bit_nr, entry->opcode->last));
- lf_printf (file, "INSERTED32(%d, %d, %d), ",
- entry->opcode->boolean_constant,
- i2target (options.hi_bit_nr, entry->opcode->first),
- i2target (options.hi_bit_nr, entry->opcode->last));
- lf_print_table_name (file, entry);
- }
- else
- {
- /* table `calling' another table */
- lf_printf (file, "%d, ", options.insn_bit_size - entry->opcode->last - 1);
- lf_printf (file, "MASK%d(%d,%d), ",
- options.insn_bit_size,
- i2target (options.hi_bit_nr, entry->opcode->first),
- i2target (options.hi_bit_nr, entry->opcode->last));
- lf_printf (file, "0, ");
- lf_print_table_name (file, entry);
- }
- lf_printf (file, " },\n");
- }
-}
-
-static void
-print_idecode_table_end (lf *file,
- gen_entry *table,
- int depth,
- void *data)
-{
- ASSERT (depth == 0);
- if (table->opcode_rule->gen == array_gen) {
- lf_printf (file, "};\n");
- }
-}
-
-/****************************************************************/
-
-
-static void
-print_goto_switch_name (lf *file,
- gen_entry *entry)
-{
- lf_printf (file, "case_");
- if (entry->opcode == NULL)
- {
- print_function_name (file,
- entry->insns->insn->name,
- entry->insns->insn->format_name,
- NULL,
- entry->expanded_bits,
- (options.gen.icache
- ? function_name_prefix_icache
- : function_name_prefix_semantics));
- }
- else
- {
- lf_print_table_name(file, entry);
- }
-}
-
-static void
-print_goto_switch_table_leaf (lf *file,
- gen_entry *entry,
- int depth,
- void *data)
-{
- ASSERT (entry->parent != NULL);
- ASSERT (depth == 0);
- ASSERT (entry->parent->opcode_rule->gen == goto_switch_gen);
- ASSERT (entry->parent->opcode);
-
- lf_printf (file, "/* %d */ &&", entry->opcode_nr);
- if (entry->combined_parent != NULL)
- print_goto_switch_name (file, entry->combined_parent);
- else
- print_goto_switch_name (file, entry);
- lf_printf (file, ",\n");
-}
-
-static void
-print_goto_switch_break (lf *file,
- gen_entry *entry)
-{
- lf_printf (file, "goto break_");
- lf_print_table_name (file, entry->parent);
- lf_printf (file, ";\n");
-}
-
-
-static void
-print_goto_switch_table (lf *file,
- gen_entry *table)
-{
- lf_printf (file, "const static void *");
- lf_print_table_name (file, table);
- lf_printf (file, "[] = {\n");
- lf_indent (file, +2);
- gen_entry_traverse_tree (file, table,
- 0,
- NULL/*start*/,
- print_goto_switch_table_leaf,
- NULL/*end*/,
- NULL/*data*/);
- lf_indent (file, -2);
- lf_printf (file, "};\n");
-}
-
-
-void print_idecode_switch
-(lf *file,
- gen_entry *table,
- const char *result);
-
-static void
-print_idecode_switch_start (lf *file,
- gen_entry *table,
- int depth,
- void *data)
-{
- /* const char *result = data; */
- ASSERT (depth == 0);
- ASSERT (table->opcode_rule->gen == switch_gen
- || table->opcode_rule->gen == goto_switch_gen
- || table->opcode_rule->gen == padded_switch_gen);
-
- if (table->opcode->is_boolean
- || table->opcode_rule->gen == switch_gen
- || table->opcode_rule->gen == padded_switch_gen)
- {
- lf_printf (file, "switch (EXTRACTED%d (instruction_%d, %d, %d))\n",
- options.insn_bit_size,
- table->opcode_rule->word_nr,
- i2target (options.hi_bit_nr, table->opcode->first),
- i2target (options.hi_bit_nr, table->opcode->last));
- lf_indent (file, +2);
- lf_printf (file, "{\n");
- }
- else if (table->opcode_rule->gen == goto_switch_gen)
- {
- if (table->parent != NULL
- && (table->parent->opcode_rule->gen == switch_gen
- || table->parent->opcode_rule->gen == goto_switch_gen
- || table->parent->opcode_rule->gen == padded_switch_gen))
- {
- lf_printf (file, "{\n");
- lf_indent (file, +2);
- }
- print_goto_switch_table (file, table);
- lf_printf (file, "ASSERT (EXTRACTED%d (instruction_%d, %d, %d)\n",
- options.insn_bit_size,
- table->opcode->word_nr,
- i2target (options.hi_bit_nr, table->opcode->first),
- i2target (options.hi_bit_nr, table->opcode->last));
- lf_printf (file, " < (sizeof (");
- lf_print_table_name (file, table);
- lf_printf (file, ") / sizeof(void*)));\n");
- lf_printf (file, "goto *");
- lf_print_table_name (file, table);
- lf_printf (file, "[EXTRACTED%d (instruction_%d, %d, %d)];\n",
- options.insn_bit_size,
- table->opcode->word_nr,
- i2target (options.hi_bit_nr, table->opcode->first),
- i2target (options.hi_bit_nr, table->opcode->last));
- }
- else
- {
- ASSERT("bad switch" == NULL);
- }
-}
-
-
-static void
-print_idecode_switch_leaf (lf *file,
- gen_entry *entry,
- int depth,
- void *data)
-{
- const char *result = data;
- ASSERT (entry->parent != NULL);
- ASSERT (depth == 0);
- ASSERT (entry->parent->opcode_rule->gen == switch_gen
- || entry->parent->opcode_rule->gen == goto_switch_gen
- || entry->parent->opcode_rule->gen == padded_switch_gen);
- ASSERT (entry->parent->opcode);
-
- /* skip over any instructions combined into another entry */
- if (entry->combined_parent != NULL)
- return;
-
- if (entry->parent->opcode->is_boolean
- && entry->opcode_nr == 0)
- {
- /* case: boolean false target */
- lf_printf (file, "case %d:\n", entry->parent->opcode->boolean_constant);
- }
- else if (entry->parent->opcode->is_boolean
- && entry->opcode_nr != 0)
- {
- /* case: boolean true case */
- lf_printf (file, "default:\n");
- }
- else if (entry->parent->opcode_rule->gen == switch_gen
- || entry->parent->opcode_rule->gen == padded_switch_gen)
- {
- /* case: <opcode-nr> - switch */
- gen_entry *cob;
- for (cob = entry; cob != NULL; cob = cob->combined_next)
- lf_printf (file, "case %d:\n", cob->opcode_nr);
- }
- else if (entry->parent->opcode_rule->gen == goto_switch_gen)
- {
- /* case: <opcode-nr> - goto-switch */
- print_goto_switch_name (file, entry);
- lf_printf (file, ":\n");
- }
- else
- {
- ERROR ("bad switch");
- }
- lf_printf (file, " {\n");
- lf_indent (file, +4);
- {
- if (entry->opcode == NULL)
- {
- /* switch calling leaf */
- ASSERT (entry->nr_insns == 1);
- print_idecode_ifetch (file, entry->nr_prefetched_words,
- entry->insns->semantic->nr_prefetched_words);
- switch (options.gen.code)
- {
- case generate_jumps:
- lf_printf (file, "goto ");
- break;
- case generate_calls:
- lf_printf (file, "%s", result);
- break;
- }
- print_function_name (file,
- entry->insns->insn->name,
- entry->insns->insn->format_name,
- NULL,
- entry->expanded_bits,
- (options.gen.icache
- ? function_name_prefix_icache
- : function_name_prefix_semantics));
- if (options.gen.code == generate_calls)
- {
- lf_printf (file, " (");
- print_semantic_function_actual (file, entry->insns->semantic->nr_prefetched_words);
- lf_printf (file, ")");
- }
- lf_printf (file, ";\n");
- }
- else if (entry->opcode_rule->gen == switch_gen
- || entry->opcode_rule->gen == goto_switch_gen
- || entry->opcode_rule->gen == padded_switch_gen)
- {
- /* switch calling switch */
- lf_printf (file, "{\n");
- lf_indent (file, +2);
- print_idecode_ifetch (file, entry->parent->nr_prefetched_words,
- entry->nr_prefetched_words);
- print_idecode_switch (file, entry, result);
- lf_indent (file, -2);
- lf_printf (file, "}\n");
- }
- else
- {
- /* switch looking up a table */
- lf_printf (file, "{\n");
- lf_indent (file, +2);
- print_idecode_ifetch (file, entry->parent->nr_prefetched_words,
- entry->nr_prefetched_words);
- print_idecode_table (file, entry, result);
- lf_indent (file, -2);
- lf_printf (file, "}\n");
- }
- if (entry->parent->opcode->is_boolean
- || entry->parent->opcode_rule->gen == switch_gen
- || entry->parent->opcode_rule->gen == padded_switch_gen)
- {
- lf_printf (file, "break;\n");
- }
- else if (entry->parent->opcode_rule->gen == goto_switch_gen)
- {
- print_goto_switch_break(file, entry);
- }
- else
- {
- ERROR ("bad switch");
- }
- }
- lf_indent (file, -4);
- lf_printf (file, " }\n");
-}
-
-
-static void
-print_idecode_switch_illegal (lf *file,
- const char *result)
-{
- lf_indent (file, +2);
- print_idecode_invalid (file, result, invalid_illegal);
- lf_printf (file, "break;\n");
- lf_indent (file, -2);
-}
-
-static void
-print_idecode_switch_end (lf *file,
- gen_entry *table,
- int depth,
- void *data)
-{
- const char *result = data;
- ASSERT (depth == 0);
- ASSERT (table->opcode_rule->gen == switch_gen
- || table->opcode_rule->gen == goto_switch_gen
- || table->opcode_rule->gen == padded_switch_gen);
- ASSERT (table->opcode);
-
- if (table->opcode->is_boolean)
- {
- lf_printf (file, "}\n");
- lf_indent (file, -2);
- }
- else if (table->opcode_rule->gen == switch_gen
- || table->opcode_rule->gen == padded_switch_gen)
- {
- lf_printf (file, "default:\n");
- lf_indent (file, +2);
- if (table->nr_entries == table->opcode->nr_opcodes)
- {
- print_sim_engine_abort (file, "Internal error - bad switch generated");
- lf_printf (file, "%sNULL_CIA;\n", result);
- lf_printf (file, "break;\n");
- }
- else
- {
- print_idecode_switch_illegal (file, result);
- }
- lf_indent (file, -2);
- lf_printf (file, "}\n");
- lf_indent (file, -2);
- }
- else if (table->opcode_rule->gen == goto_switch_gen)
- {
- lf_printf (file, "illegal_");
- lf_print_table_name (file, table);
- lf_printf (file, ":\n");
- print_idecode_invalid (file, result, invalid_illegal);
- lf_printf (file, "break_");
- lf_print_table_name(file, table);
- lf_printf (file, ":;\n");
- if (table->parent != NULL
- && (table->parent->opcode_rule->gen == switch_gen
- || table->parent->opcode_rule->gen == goto_switch_gen
- || table->parent->opcode_rule->gen == padded_switch_gen))
- {
- lf_indent (file, -2);
- lf_printf (file, "}\n");
- }
- }
- else
- {
- ERROR ("bad switch");
- }
-}
-
-
-void
-print_idecode_switch (lf *file,
- gen_entry *table,
- const char *result)
-{
- gen_entry_traverse_tree (file, table,
- 0,
- print_idecode_switch_start,
- print_idecode_switch_leaf,
- print_idecode_switch_end,
- (void*)result);
-}
-
-
-static void
-print_idecode_switch_function_header (lf *file,
- gen_entry *table,
- int is_function_definition,
- int nr_prefetched_words)
-{
- lf_printf (file, "\n");
- if (options.gen.code == generate_calls)
- {
- lf_printf (file, "static ");
- if (options.gen.icache)
- {
- lf_printf (file, "idecode_semantic *");
- }
- else
- {
- lf_printf (file, "unsigned_word");
- }
- if (is_function_definition)
- {
- lf_printf (file, "\n");
- }
- else
- {
- lf_printf (file, " ");
- }
- lf_print_table_name (file, table);
- lf_printf (file, "\n(");
- print_icache_function_formal (file, nr_prefetched_words);
- lf_printf (file, ")");
- if (!is_function_definition)
- {
- lf_printf (file, ";");
- }
- lf_printf (file, "\n");
- }
- if (options.gen.code == generate_jumps && is_function_definition)
- {
- lf_indent (file, -1);
- lf_print_table_name (file, table);
- lf_printf (file, ":\n");
- lf_indent (file, +1);
- }
-}
-
-
-static void
-idecode_declare_if_switch (lf *file,
- gen_entry *table,
- int depth,
- void *data)
-{
- if ((table->opcode_rule->gen == switch_gen
- || table->opcode_rule->gen == goto_switch_gen
- || table->opcode_rule->gen == padded_switch_gen)
- && table->parent != NULL /* don't declare the top one yet */
- && table->parent->opcode_rule->gen == array_gen)
- {
- print_idecode_switch_function_header (file,
- table,
- 0/*isnt function definition*/,
- 0);
- }
-}
-
-
-static void
-idecode_expand_if_switch (lf *file,
- gen_entry *table,
- int depth,
- void *data)
-{
- if ((table->opcode_rule->gen == switch_gen
- || table->opcode_rule->gen == goto_switch_gen
- || table->opcode_rule->gen == padded_switch_gen)
- && table->parent != NULL /* don't expand the top one yet */
- && table->parent->opcode_rule->gen == array_gen)
- {
- print_idecode_switch_function_header(file,
- table,
- 1/*is function definition*/,
- 0);
- if (options.gen.code == generate_calls)
- {
- lf_printf (file, "{\n");
- lf_indent (file, +2);
- }
- print_idecode_switch(file, table, "return");
- if (options.gen.code == generate_calls)
- {
- lf_indent (file, -2);
- lf_printf (file, "}\n");
- }
- }
-}
-
-
-/****************************************************************/
-
-
-void
-print_idecode_lookups (lf *file,
- gen_entry *table,
- cache_entry *cache_rules)
-{
- int depth;
-
- /* output switch function declarations where needed by tables */
- gen_entry_traverse_tree (file, table,
- 1,
- idecode_declare_if_switch, /* START */
- NULL, NULL,
- NULL);
-
- /* output tables where needed */
- for (depth = gen_entry_depth (table);
- depth > 0;
- depth--)
- {
- gen_entry_traverse_tree (file, table,
- 1-depth,
- print_idecode_table_start,
- print_idecode_table_leaf,
- print_idecode_table_end,
- NULL);
- }
-
- /* output switch functions where needed */
- gen_entry_traverse_tree (file, table,
- 1,
- idecode_expand_if_switch, /* START */
- NULL, NULL,
- NULL);
-}
-
-
-void
-print_idecode_body (lf *file,
- gen_entry *table,
- const char *result)
-{
- if (table->opcode_rule->gen == switch_gen
- || table->opcode_rule->gen == goto_switch_gen
- || table->opcode_rule->gen == padded_switch_gen)
- {
- print_idecode_switch (file, table, result);
- }
- else
- {
- print_idecode_table (file, table, result);
- }
-}
-
-
-/****************************************************************/
-
-#if 0
-static void
-print_jump (lf *file,
- int is_tail)
-{
- if (is_tail)
- {
- lf_putstr (file, "if (keep_running != NULL && !*keep_running)\n");
- lf_putstr (file, " cpu_halt(cpu, nia, was_continuing, 0/*na*/);\n");
- }
-
- if (!options.generate_smp)
- {
- lf_putstr (file, "if (WITH_EVENTS) {\n");
- lf_putstr (file, " if (event_queue_tick(events)) {\n");
- lf_putstr (file, " cpu_set_program_counter(cpu, nia);\n");
- lf_putstr (file, " event_queue_process(events);\n");
- lf_putstr (file, " nia = cpu_get_program_counter(cpu);\n");
- lf_putstr (file, " }\n");
- lf_putstr (file, "}\n");
- }
-
- if (options.generate_smp)
- {
- if (is_tail)
- {
- lf_putstr (file, "cpu_set_program_counter(cpu, nia);\n");
- }
- lf_putstr (file, "if (WITH_EVENTS) {\n");
- lf_putstr (file, " current_cpu += 1;\n");
- lf_putstr (file, " if (current_cpu >= nr_cpus) {\n");
- lf_putstr (file, " if (event_queue_tick(events)) {\n");
- lf_putstr (file, " event_queue_process(events);\n");
- lf_putstr (file, " }\n");
- lf_putstr (file, " current_cpu = 0;\n");
- lf_putstr (file, " }\n");
- lf_putstr (file, "}\n");
- lf_putstr (file, "else {\n");
- lf_putstr (file, " current_cpu = (current_cpu + 1) % nr_cpus;\n");
- lf_putstr (file, "}\n");
- lf_putstr (file, "cpu = cpus[current_cpu];\n");
- lf_putstr (file, "nia = cpu_get_program_counter(cpu);\n");
- }
-
- if (options.gen.icache)
- {
- lf_putstr (file, "cache_entry = cpu_icache_entry(cpu, nia);\n");
- lf_putstr (file, "if (cache_entry->address == nia) {\n");
- lf_putstr (file, " /* cache hit */\n");
- lf_putstr (file, " goto *cache_entry->semantic;\n");
- lf_putstr (file, "}\n");
- if (is_tail)
- {
- lf_putstr (file, "goto cache_miss;\n");
- }
- }
-
- if (!options.gen.icache && is_tail)
- {
- lf_printf (file, "goto idecode;\n");
- }
-
-}
-#endif
-
-
-
-#if 0
-static void
-print_jump_insn (lf *file,
- insn_entry *instruction,
- insn_bits *expanded_bits,
- opcode_field *opcodes,
- cache_entry *cache_rules)
-{
-
- /* what we are for the moment */
- lf_printf (file, "\n");
- print_my_defines (file, expanded_bits, instruction->name);
-
- /* output the icache entry */
- if (options.gen.icache)
- {
- lf_printf (file, "\n");
- lf_indent (file, -1);
- print_function_name (file,
- instruction->name,
- expanded_bits,
- function_name_prefix_icache);
- lf_printf (file, ":\n");
- lf_indent (file, +1);
- lf_printf (file, "{\n");
- lf_indent (file, +2);
- lf_putstr (file, "const unsigned_word cia = nia;\n");
- print_itrace (file, instruction, 1/*putting-value-in-cache*/);
- print_idecode_validate (file, instruction, opcodes);
- lf_printf (file, "\n");
- lf_printf (file, "{\n");
- lf_indent (file, +2);
- print_icache_body (file,
- instruction,
- expanded_bits,
- cache_rules,
- 0, /*use_defines*/
- put_values_in_icache);
- lf_printf (file, "cache_entry->address = nia;\n");
- lf_printf (file, "cache_entry->semantic = &&");
- print_function_name (file,
- instruction->name,
- expanded_bits,
- function_name_prefix_semantics);
- lf_printf (file, ";\n");
- if (options.gen.semantic_icache)
- {
- print_semantic_body (file,
- instruction,
- expanded_bits,
- opcodes);
- print_jump (file, 1/*is-tail*/);
- }
- else
- {
- lf_printf (file, "/* goto ");
- print_function_name (file,
- instruction->name,
- expanded_bits,
- function_name_prefix_semantics);
- lf_printf (file, "; */\n");
- }
- lf_indent (file, -2);
- lf_putstr (file, "}\n");
- lf_indent (file, -2);
- lf_printf (file, "}\n");
- }
-
- /* print the semantics */
- lf_printf (file, "\n");
- lf_indent (file, -1);
- print_function_name (file,
- instruction->name,
- expanded_bits,
- function_name_prefix_semantics);
- lf_printf (file, ":\n");
- lf_indent (file, +1);
- lf_printf (file, "{\n");
- lf_indent (file, +2);
- lf_putstr (file, "const unsigned_word cia = nia;\n");
- print_icache_body (file,
- instruction,
- expanded_bits,
- cache_rules,
- (options.gen.direct_access
- ? define_variables
- : declare_variables),
- (options.gen.icache
- ? get_values_from_icache
- : do_not_use_icache));
- print_semantic_body (file,
- instruction,
- expanded_bits,
- opcodes);
- if (options.gen.direct_access)
- print_icache_body (file,
- instruction,
- expanded_bits,
- cache_rules,
- undef_variables,
- (options.gen.icache
- ? get_values_from_icache
- : do_not_use_icache));
- print_jump (file, 1/*is tail*/);
- lf_indent (file, -2);
- lf_printf (file, "}\n");
-}
-#endif
-
-
-#if 0
-static void
-print_jump_definition (lf *file,
- gen_entry *entry,
- insn_entry *insn,
- int depth,
- void *data)
-{
- cache_entry *cache_rules = (cache_entry*)data;
- if (options.generate_expanded_instructions)
- {
- ASSERT (entry->nr_insns == 1
- && entry->opcode == NULL
- && entry->parent != NULL
- && entry->parent->opcode != NULL);
- ASSERT (entry->nr_insns == 1
- && entry->opcode == NULL
- && entry->parent != NULL
- && entry->parent->opcode != NULL
- && entry->parent->opcode_rule != NULL);
- print_jump_insn (file,
- entry->insns->words[0]->insn,
- entry->expanded_bits,
- entry->opcode,
- cache_rules);
- }
- else
- {
- print_jump_insn (file,
- instruction->words[0]->insn,
- NULL,
- NULL,
- cache_rules);
- }
-}
-#endif
-
-#if 0
-static void
-print_jump_internal_function (lf *file,
- gen_entry *table,
- function_entry *function,
- void *data)
-{
- if (function->is_internal)
- {
- lf_printf (file, "\n");
- lf_print__line_ref (file, function->line);
- lf_indent (file, -1);
- print_function_name (file,
- function->name,
- NULL,
- (options.gen.icache
- ? function_name_prefix_icache
- : function_name_prefix_semantics));
- lf_printf (file, ":\n");
- lf_indent (file, +1);
- lf_printf (file, "{\n");
- lf_indent (file, +2);
- lf_printf (file, "const unsigned_word cia = nia;\n");
- table_print_code (file, function->code);
- lf_print__internal_ref (file);
- print_sim_engine_abort (file, "Internal function must longjump");
- lf_indent (file, -2);
- lf_printf (file, "}\n");
- }
-}
-#endif
-
-
-
-#if 0
-static void
-print_jump_until_stop_body(lf *file,
- insn_table *table,
- cache_table *cache_rules)
-{
- lf_printf (file, "{\n");
- lf_indent (file, +2);
- lf_putstr (file, "jmp_buf halt;\n");
- lf_putstr (file, "jmp_buf restart;\n");
- lf_putstr (file, "sim_cpu *cpu = NULL;\n");
- lf_putstr (file, "unsigned_word nia = -1;\n");
- lf_putstr (file, "instruction_word instruction = 0;\n");
- if ((code & generate_with_icache)) {
- lf_putstr (file, "idecode_cache *cache_entry = NULL;\n");
- }
- if (generate_smp) {
- lf_putstr (file, "int current_cpu = -1;\n");
- }
-
- /* all the switches and tables - they know about jumping */
- print_idecode_lookups(file, table, cache_rules);
-
- /* start the simulation up */
- if ((code & generate_with_icache)) {
- lf_putstr (file, "\n");
- lf_putstr (file, "{\n");
- lf_putstr (file, " int cpu_nr;\n");
- lf_putstr (file, " for (cpu_nr = 0; cpu_nr < nr_cpus; cpu_nr++)\n");
- lf_putstr (file, " cpu_flush_icache(cpus[cpu_nr]);\n");
- lf_putstr (file, "}\n");
- }
-
- lf_putstr (file, "\n");
- lf_putstr (file, "psim_set_halt_and_restart(system, &halt, &restart);\n");
-
- lf_putstr (file, "\n");
- lf_putstr (file, "if (setjmp(halt))\n");
- lf_putstr (file, " return;\n");
-
- lf_putstr (file, "\n");
- lf_putstr (file, "setjmp(restart);\n");
-
- lf_putstr (file, "\n");
- if (!generate_smp) {
- lf_putstr (file, "cpu = cpus[0];\n");
- lf_putstr (file, "nia = cpu_get_program_counter(cpu);\n");
- }
- else {
- lf_putstr (file, "current_cpu = psim_last_cpu(system);\n");
- }
-
- if (!(code & generate_with_icache)) {
- lf_printf (file, "\n");
- lf_indent (file, -1);
- lf_printf (file, "idecode:\n");
- lf_indent (file, +1);
- }
-
- print_jump(file, 0/*is_tail*/);
-
- if ((code & generate_with_icache)) {
- lf_indent (file, -1);
- lf_printf (file, "cache_miss:\n");
- lf_indent (file, +1);
- }
-
- lf_putstr (file, "instruction\n");
- lf_putstr (file, " = vm_instruction_map_read(cpu_instruction_map(cpu),\n");
- lf_putstr (file, " cpu, nia);\n");
- print_idecode_body(file, table, "/*IGORE*/");
-
- /* print out a table of all the internals functions */
- insn_table_traverse_function(table,
- file, NULL,
- print_jump_internal_function);
-
- /* print out a table of all the instructions */
- if (generate_expanded_instructions)
- insn_table_traverse_tree(table,
- file, cache_rules,
- 1,
- NULL, /* start */
- print_jump_definition, /* leaf */
- NULL, /* end */
- NULL); /* padding */
- else
- insn_table_traverse_insn(table,
- file, cache_rules,
- print_jump_definition);
- lf_indent (file, -2);
- lf_printf (file, "}\n");
-}
-#endif
-
-/****************************************************************/
-
-
-
-/* Output code to do any final checks on the decoded instruction.
- This includes things like verifying any on decoded fields have the
- correct value and checking that (for floating point) floating point
- hardware isn't disabled */
-
-void
-print_idecode_validate (lf *file,
- insn_entry *instruction,
- insn_opcodes *opcode_paths)
-{
- /* Validate: unchecked instruction fields
-
- If any constant fields in the instruction were not checked by the
- idecode tables, output code to check that they have the correct
- value here */
- {
- int nr_checks = 0;
- int word_nr;
- lf_printf (file, "\n");
- lf_indent_suppress (file);
- lf_printf (file, "#if defined (WITH_RESERVED_BITS)\n");
- lf_printf (file, "/* validate: ");
- print_insn_words (file, instruction);
- lf_printf (file, " */\n");
- for (word_nr = 0; word_nr < instruction->nr_words; word_nr++)
- {
- insn_uint check_mask = 0;
- insn_uint check_val = 0;
- insn_word_entry *word = instruction->word[word_nr];
- int bit_nr;
-
- /* form check_mask/check_val containing what needs to be checked
- in the instruction */
- for (bit_nr = 0; bit_nr < options.insn_bit_size; bit_nr++)
- {
- insn_bit_entry *bit = word->bit[bit_nr];
- insn_field_entry *field = bit->field;
-
- /* Make space for the next bit */
- check_mask <<= 1;
- check_val <<= 1;
-
- /* Only need to validate constant (and reserved)
- bits. Skip any others */
- if (field->type != insn_field_int
- && field->type != insn_field_reserved)
- continue;
-
- /* Look through the list of opcode paths that lead to this
- instruction. See if any have failed to check the
- relevant bit */
- if (opcode_paths != NULL)
- {
- insn_opcodes *entry;
- for (entry = opcode_paths;
- entry != NULL;
- entry = entry->next)
- {
- opcode_field *opcode;
- for (opcode = entry->opcode;
- opcode != NULL;
- opcode = opcode->parent)
- {
- if (opcode->word_nr == word_nr
- && opcode->first <= bit_nr
- && opcode->last >= bit_nr)
- /* we've decoded on this bit */
- break;
- }
- if (opcode == NULL)
- /* the bit wasn't decoded on */
- break;
- }
- if (entry == NULL)
- /* all the opcode paths decoded on BIT_NR, no need
- to check it */
- continue;
- }
-
- check_mask |= 1;
- check_val |= bit->value;
- }
-
- /* if any bits not checked by opcode tables, output code to check them */
- if (check_mask)
- {
- if (nr_checks == 0)
- {
- lf_printf (file, "if (WITH_RESERVED_BITS)\n");
- lf_printf (file, " {\n");
- lf_indent (file, +4);
- }
- nr_checks ++;
- if (options.insn_bit_size > 32)
- {
- lf_printf (file, "if ((instruction_%d\n", word_nr);
- lf_printf (file, " & UNSIGNED64 (0x%08lx%08lx))\n",
- (unsigned long)(check_mask >> 32),
- (unsigned long)(check_mask));
- lf_printf (file, " != UNSIGNED64 (0x%08lx%08lx))\n",
- (unsigned long)(check_val >> 32),
- (unsigned long)(check_val));
- }
- else
- {
- lf_printf (file, "if ((instruction_%d & 0x%08lx) != 0x%08lx)\n",
- word_nr,
- (unsigned long)(check_mask),
- (unsigned long)(check_val));
- }
- lf_indent (file, +2);
- print_idecode_invalid (file, "return", invalid_illegal);
- lf_indent (file, -2);
- }
- }
- if (nr_checks > 0)
- {
- lf_indent (file, -4);
- lf_printf (file, " }\n");
- }
- lf_indent_suppress(file);
- lf_printf (file, "#endif\n");
- }
-
- /* Validate: Floating Point hardware
-
- If the simulator is being built with out floating point hardware
- (different to it being disabled in the MSR) then floating point
- instructions are invalid */
- {
- if (filter_is_member (instruction->flags, "f"))
- {
- lf_printf (file, "\n");
- lf_indent_suppress (file);
- lf_printf (file, "#if defined(CURRENT_FLOATING_POINT)\n");
- lf_printf (file, "/* Validate: FP hardware exists */\n");
- lf_printf (file, "if (CURRENT_FLOATING_POINT != HARD_FLOATING_POINT) {\n");
- lf_indent (file, +2);
- print_idecode_invalid (file, "return", invalid_illegal);
- lf_indent (file, -2);
- lf_printf (file, "}\n");
- lf_indent_suppress (file);
- lf_printf (file, "#endif\n");
- }
- }
-
- /* Validate: Floating Point available
-
- If floating point is not available, we enter a floating point
- unavailable interrupt into the cache instead of the instruction
- proper.
-
- The PowerPC spec requires a CSI after MSR[FP] is changed and when
- ever a CSI occures we flush the instruction cache. */
-
- {
- if (filter_is_member (instruction->flags, "f"))
- {
- lf_printf (file, "\n");
- lf_indent_suppress (file);
- lf_printf (file, "#if defined(IS_FP_AVAILABLE)\n");
- lf_printf (file, "/* Validate: FP available according to cpu */\n");
- lf_printf (file, "if (!IS_FP_AVAILABLE) {\n");
- lf_indent (file, +2);
- print_idecode_invalid (file, "return", invalid_fp_unavailable);
- lf_indent (file, -2);
- lf_printf (file, "}\n");
- lf_indent_suppress (file);
- lf_printf (file, "#endif\n");
- }
- }
-
- /* Validate: Validate Instruction in correct slot
-
- Some architectures place restrictions on the slot that an
- instruction can be issued in */
-
- {
- if (filter_is_member (instruction->options, "s")
- || options.gen.slot_verification)
- {
- lf_printf (file, "\n");
- lf_indent_suppress (file);
- lf_printf (file, "#if defined(IS_WRONG_SLOT)\n");
- lf_printf (file, "/* Validate: Instruction issued in correct slot */\n");
- lf_printf (file, "if (IS_WRONG_SLOT) {\n");
- lf_indent (file, +2);
- print_idecode_invalid (file, "return", invalid_wrong_slot);
- lf_indent (file, -2);
- lf_printf (file, "}\n");
- lf_indent_suppress (file);
- lf_printf (file, "#endif\n");
- }
- }
-
-}
-
-
-/****************************************************************/
-
-
-void
-print_idecode_issue_function_header (lf *file,
- const char *processor,
- function_decl_type decl_type,
- int nr_prefetched_words)
-{
- int indent;
- lf_printf (file, "\n");
- switch (decl_type)
- {
- case is_function_declaration:
- lf_print__function_type_function (file, print_semantic_function_type,
- "INLINE_IDECODE",
- " ");
- break;
- case is_function_definition:
- lf_print__function_type_function (file, print_semantic_function_type,
- "INLINE_IDECODE",
- "\n");
- break;
- case is_function_variable:
- print_semantic_function_type (file);
- lf_printf (file, " (*");
- break;
- }
- indent = print_function_name (file,
- "issue",
- NULL,
- processor,
- NULL,
- function_name_prefix_idecode);
- switch (decl_type)
- {
- case is_function_definition:
- indent += lf_printf (file, " (");
- break;
- case is_function_declaration:
- lf_putstr (file, "\n(");
- indent = 1;
- break;
- case is_function_variable:
- lf_putstr (file, ")\n(");
- indent = 1;
- break;
- }
- lf_indent (file, +indent);
- print_semantic_function_formal (file, nr_prefetched_words);
- lf_putstr (file, ")");
- lf_indent (file, -indent);
- switch (decl_type)
- {
- case is_function_definition:
- lf_printf (file, "\n");
- break;
- case is_function_declaration:
- case is_function_variable:
- lf_putstr (file, ";\n");
- break;
- }
-}
-
-
-
-void
-print_idecode_globals (lf *file)
-{
- lf_printf (file, "enum {\n");
- lf_printf (file, " /* greater or equal to zero => table */\n");
- lf_printf (file, " function_entry = -1,\n");
- lf_printf (file, " boolean_entry = -2,\n");
- lf_printf (file, "};\n");
- lf_printf (file, "\n");
- lf_printf (file, "typedef struct _idecode_table_entry {\n");
- lf_printf (file, " int shift;\n");
- lf_printf (file, " unsigned%d mask;\n", options.insn_bit_size);
- lf_printf (file, " unsigned%d value;\n", options.insn_bit_size);
- lf_printf (file, " void *function_or_table;\n");
- lf_printf (file, "} idecode_table_entry;\n");
-}
diff --git a/sim/igen/gen-idecode.h b/sim/igen/gen-idecode.h
deleted file mode 100644
index c660904602d..00000000000
--- a/sim/igen/gen-idecode.h
+++ /dev/null
@@ -1,50 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1995, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-void print_idecode_issue_function_header
-(lf *file,
- const char *processor,
- function_decl_type decl_type,
- int nr_prefetched_words);
-
-void print_idecode_globals
-(lf *file);
-
-void print_idecode_lookups
-(lf *file,
- gen_entry *table,
- cache_entry *cache_rules);
-
-void print_idecode_body
-(lf *file,
- gen_entry *table,
- const char *result);
-
-
-
-/* Output code to do any final checks on the decoded instruction.
- This includes things like verifying any on decoded fields have the
- correct value and checking that (for floating point) floating point
- hardware isn't disabled */
-
-extern void print_idecode_validate
-(lf *file,
- insn_entry *instruction,
- insn_opcodes *opcode_paths);
diff --git a/sim/igen/gen-itable.c b/sim/igen/gen-itable.c
deleted file mode 100644
index c3e90535683..00000000000
--- a/sim/igen/gen-itable.c
+++ /dev/null
@@ -1,317 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1995, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-
-#include "misc.h"
-#include "lf.h"
-#include "table.h"
-#include "filter.h"
-#include "igen.h"
-
-#include "ld-insn.h"
-#include "ld-decode.h"
-
-#include "gen.h"
-
-#include "gen-itable.h"
-
-#ifndef NULL
-#define NULL 0
-#endif
-
-
-
-typedef struct _itable_info {
- int sizeof_form;
- int sizeof_name;
- int sizeof_file;
-} itable_info;
-
-
-static void
-itable_h_insn (lf *file,
- insn_table *entry,
- insn_entry *instruction,
- void *data)
-{
- int len;
- itable_info *info = data;
- lf_print__line_ref (file, instruction->line);
- lf_printf (file, " ");
- print_function_name (file,
- instruction->name,
- instruction->format_name,
- NULL,
- NULL,
- function_name_prefix_itable);
- lf_printf (file, ",\n");
- /* update summary info */
- len = strlen (instruction->format_name);
- if (info->sizeof_form <= len)
- info->sizeof_form = len + 1;
- len = strlen (instruction->name);
- if (info->sizeof_name <= len)
- info->sizeof_name = len + 1;
- len = strlen (filter_filename (instruction->line->file_name));
- if (info->sizeof_file <= len)
- info->sizeof_file = len + 1;
-}
-
-
-/* print the list of all the different options */
-
-static void
-itable_print_enum (lf *file,
- filter *set,
- char *name)
-{
- char *elem;
- lf_printf (file, "typedef enum {\n");
- lf_indent (file, +2);
- for (elem = filter_next (set, "");
- elem != NULL;
- elem = filter_next (set, elem))
- {
- lf_printf (file, "%sitable_%s_%s,\n",
- options.module.itable.prefix.l, name, elem);
- if (strlen (options.module.itable.prefix.l) > 0)
- {
- lf_indent_suppress (file);
- lf_printf (file, "#define itable_%s_%s %sitable_%s_%s\n",
- name, elem, options.module.itable.prefix.l, name, elem);
- }
- }
- lf_printf (file, "nr_%sitable_%ss,\n", options.module.itable.prefix.l, name);
-
- lf_indent (file, -2);
- lf_printf (file, "} %sitable_%ss;\n", options.module.itable.prefix.l, name);
- if (strlen (options.module.itable.prefix.l) > 0)
- {
- lf_indent_suppress (file);
- lf_printf (file, "#define itable_%ss %sitable_%ss\n",
- name, options.module.itable.prefix.l, name);
- lf_indent_suppress (file);
- lf_printf (file, "#define nr_itable_%ss nr_%sitable_%ss\n",
- name, options.module.itable.prefix.l, name);
- }
-}
-
-/* print an array of the option names as strings */
-
-static void
-itable_print_names (lf *file,
- filter *set,
- char *name)
-{
- char *elem;
- lf_printf (file, "const char *%sitable_%s_names[nr_%sitable_%ss + 1] = {\n",
- options.module.itable.prefix.l, name,
- options.module.itable.prefix.l, name);
- lf_indent (file, +2);
- for (elem = filter_next (set, "");
- elem != NULL;
- elem = filter_next (set, elem))
- {
- lf_printf (file, "\"%s\",\n", elem);
- }
- lf_printf (file, "0,\n");
- lf_indent (file, -2);
- lf_printf (file, "};\n");
-}
-
-extern void
-gen_itable_h (lf *file,
- insn_table *isa)
-{
- itable_info *info = ZALLOC (itable_info);
-
- /* output an enumerated type for each instruction */
- lf_printf (file, "typedef enum {\n");
- insn_table_traverse_insn (file, isa, itable_h_insn, info);
- lf_printf (file, " nr_%sitable_entries,\n", options.module.itable.prefix.l);
- lf_printf (file, "} %sitable_index;\n", options.module.itable.prefix.l);
- lf_printf (file, "\n");
-
- /* output an enumeration type for each flag */
- itable_print_enum (file, isa->flags, "flag");
- lf_printf (file, "extern const char *%sitable_flag_names[];\n",
- options.module.itable.prefix.l);
- lf_printf (file, "\n");
-
- /* output an enumeration of all the possible options */
- itable_print_enum (file, isa->options, "option");
- lf_printf (file, "extern const char *%sitable_option_names[];\n",
- options.module.itable.prefix.l);
- lf_printf (file, "\n");
-
- /* output an enumeration of all the processor models */
- itable_print_enum (file, isa->model->processors, "processor");
- lf_printf (file, "extern const char *%sitable_processor_names[];\n",
- options.module.itable.prefix.l);
- lf_printf (file, "\n");
-
- /* output the table that contains the actual instruction info */
- lf_printf (file, "typedef struct _%sitable_instruction_info {\n",
- options.module.itable.prefix.l);
- lf_printf (file, " %sitable_index nr;\n", options.module.itable.prefix.l);
- lf_printf (file, " char *format;\n");
- lf_printf (file, " char *form;\n");
- lf_printf (file, " char *flags;\n");
-
- /* nr_itable_* may be zero, so we add 1 to avoid an
- illegal zero-sized array. */
- lf_printf (file, " char flag[nr_%sitable_flags + 1];\n",
- options.module.itable.prefix.l);
- lf_printf (file, " char *options;\n");
- lf_printf (file, " char option[nr_%sitable_options + 1];\n",
- options.module.itable.prefix.l);
- lf_printf (file, " char *processors;\n");
- lf_printf (file, " char processor[nr_%sitable_processors + 1];\n",
- options.module.itable.prefix.l);
- lf_printf (file, " char *name;\n");
- lf_printf (file, " char *file;\n");
- lf_printf (file, " int line_nr;\n");
- lf_printf (file, "} %sitable_info;\n", options.module.itable.prefix.l);
- lf_printf (file, "\n");
- lf_printf (file, "extern %sitable_info %sitable[nr_%sitable_entries];\n",
- options.module.itable.prefix.l, options.module.itable.prefix.l,
- options.module.itable.prefix.l);
- if (strlen (options.module.itable.prefix.l) > 0)
- {
- lf_indent_suppress (file);
- lf_printf (file, "#define itable %sitable\n",
- options.module.itable.prefix.l);
- }
- lf_printf (file, "\n");
-
- /* output an enum defining the max size of various itable members */
- lf_printf (file, "enum {\n");
- lf_printf (file, " sizeof_%sitable_form = %d,\n",
- options.module.itable.prefix.l, info->sizeof_form);
- lf_printf (file, " sizeof_%sitable_name = %d,\n",
- options.module.itable.prefix.l, info->sizeof_name);
- lf_printf (file, " sizeof_%sitable_file = %d,\n",
- options.module.itable.prefix.l, info->sizeof_file);
- lf_printf (file, "};\n");
-}
-
-
-/****************************************************************/
-
-static void
-itable_print_set (lf *file,
- filter *set,
- filter *members)
-{
- char *elem;
- lf_printf (file, "\"");
- elem = filter_next (members, "");
- if (elem != NULL)
- {
- while (1)
- {
- lf_printf (file, "%s", elem);
- elem = filter_next (members, elem);
- if (elem == NULL)
- break;
- lf_printf (file, ",");
- }
- }
- lf_printf (file, "\",\n");
-
- lf_printf(file, "{");
- for (elem = filter_next (set, "");
- elem != NULL;
- elem = filter_next (set, elem))
- {
- if (filter_is_member (members, elem))
- {
- lf_printf (file, " 1,");
- }
- else
- {
- lf_printf (file, " 0,");
- }
-
- }
- /* always print a dummy element, to avoid empty initializers. */
- lf_printf(file, " 99 },\n");
-}
-
-
-static void
-itable_c_insn (lf *file,
- insn_table *isa,
- insn_entry *instruction,
- void *data)
-{
- lf_printf (file, "{ ");
- lf_indent (file, +2);
- print_function_name (file,
- instruction->name,
- instruction->format_name,
- NULL,
- NULL,
- function_name_prefix_itable);
- lf_printf (file, ",\n");
- lf_printf (file, "\"");
- print_insn_words (file, instruction);
- lf_printf (file, "\",\n");
- lf_printf (file, "\"%s\",\n", instruction->format_name);
-
- itable_print_set (file, isa->flags, instruction->flags);
- itable_print_set (file, isa->options, instruction->options);
- itable_print_set (file, isa->model->processors, instruction->processors);
-
- lf_printf(file, "\"%s\",\n", instruction->name);
- lf_printf(file, "\"%s\",\n",
- filter_filename (instruction->line->file_name));
- lf_printf(file, "%d,\n", instruction->line->line_nr);
- lf_printf(file, "},\n");
- lf_indent (file, -2);
-}
-
-
-extern void
-gen_itable_c (lf *file,
- insn_table *isa)
-{
- /* leader */
- lf_printf(file, "#include \"%sitable.h\"\n", options.module.itable.prefix.l);
- lf_printf(file, "\n");
-
- /* FIXME - output model data??? */
- /* FIXME - output assembler data??? */
-
- /* output the flag, option and processor name tables */
- itable_print_names (file, isa->flags, "flag");
- itable_print_names (file, isa->options, "option");
- itable_print_names (file, isa->model->processors, "processor");
-
- /* output the table that contains the actual instruction info */
- lf_printf (file, "%sitable_info %sitable[nr_%sitable_entries] = {\n",
- options.module.itable.prefix.l,
- options.module.itable.prefix.l,
- options.module.itable.prefix.l);
- insn_table_traverse_insn (file, isa, itable_c_insn, NULL);
-
- lf_printf(file, "};\n");
-}
diff --git a/sim/igen/gen-itable.h b/sim/igen/gen-itable.h
deleted file mode 100644
index 36c8659c7b8..00000000000
--- a/sim/igen/gen-itable.h
+++ /dev/null
@@ -1,30 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1995, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-/* Output a table of all the instructions */
-
-extern void gen_itable_h
-(lf *file,
- insn_table *table);
-
-extern void gen_itable_c
-(lf *file,
- insn_table *table);
diff --git a/sim/igen/gen-model.c b/sim/igen/gen-model.c
deleted file mode 100644
index dcb300a59ef..00000000000
--- a/sim/igen/gen-model.c
+++ /dev/null
@@ -1,416 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1995, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-#include "misc.h"
-#include "lf.h"
-#include "table.h"
-
-#include "filter.h"
-
-#include "ld-decode.h"
-#include "ld-insn.h"
-
-#include "gen-model.h"
-
-#ifndef NULL
-#define NULL 0
-#endif
-
-
-#if 0
-static void
-model_c_or_h_data(insn_table *table,
- lf *file,
- table_entry *data)
-{
- if (data->annex) {
- table_entry_print_cpp_line_nr(file, data->annex_line);
- lf_print__c_code(file, data->annex);
- lf_print__internal_reference(file);
- lf_printf(file, "\n");
- }
-}
-
-static void
-model_c_or_h_function(insn_table *entry,
- lf *file,
- table_entry *function,
- char *prefix)
-{
- if (function->fields[function_type] == NULL
- || function->fields[function_type][0] == '\0') {
- error("Model function type not specified for %s", function->fields[function_name]);
- }
- lf_printf(file, "\n");
- lf_print_function_type(file, function->fields[function_type], prefix, " ");
- lf_printf(file, "%s\n(%s);\n",
- function->fields[function_name],
- function->fields[function_param]);
- lf_printf(file, "\n");
-}
-
-void
-gen_model_h(insn_table *table, lf *file)
-{
- insn *insn_ptr;
- model *model_ptr;
- insn *macro;
- char *name;
- int model_create_p = 0;
- int model_init_p = 0;
- int model_halt_p = 0;
- int model_mon_info_p = 0;
- int model_mon_info_free_p = 0;
-
- for(macro = model_macros; macro; macro = macro->next) {
- model_c_or_h_data(table, file, macro->file_entry);
- }
-
- lf_printf(file, "typedef enum _model_enum {\n");
- lf_printf(file, " MODEL_NONE,\n");
- for (model_ptr = models; model_ptr; model_ptr = model_ptr->next) {
- lf_printf(file, " MODEL_%s,\n", model_ptr->name);
- }
- lf_printf(file, " nr_models\n");
- lf_printf(file, "} model_enum;\n");
- lf_printf(file, "\n");
-
- lf_printf(file, "#define DEFAULT_MODEL MODEL_%s\n", (models) ? models->name : "NONE");
- lf_printf(file, "\n");
-
- lf_printf(file, "typedef struct _model_data model_data;\n");
- lf_printf(file, "typedef struct _model_time model_time;\n");
- lf_printf(file, "\n");
-
- lf_printf(file, "extern model_enum current_model;\n");
- lf_printf(file, "extern const char *model_name[ (int)nr_models ];\n");
- lf_printf(file, "extern const char *const *const model_func_unit_name[ (int)nr_models ];\n");
- lf_printf(file, "extern const model_time *const model_time_mapping[ (int)nr_models ];\n");
- lf_printf(file, "\n");
-
- for(insn_ptr = model_functions; insn_ptr; insn_ptr = insn_ptr->next) {
- model_c_or_h_function(table, file, insn_ptr->file_entry, "INLINE_MODEL");
- name = insn_ptr->file_entry->fields[function_name];
- if (strcmp (name, "model_create") == 0)
- model_create_p = 1;
- else if (strcmp (name, "model_init") == 0)
- model_init_p = 1;
- else if (strcmp (name, "model_halt") == 0)
- model_halt_p = 1;
- else if (strcmp (name, "model_mon_info") == 0)
- model_mon_info_p = 1;
- else if (strcmp (name, "model_mon_info_free") == 0)
- model_mon_info_free_p = 1;
- }
-
- if (!model_create_p) {
- lf_print_function_type(file, "model_data *", "INLINE_MODEL", " ");
- lf_printf(file, "model_create\n");
- lf_printf(file, "(sim_cpu *cpu);\n");
- lf_printf(file, "\n");
- }
-
- if (!model_init_p) {
- lf_print_function_type(file, "void", "INLINE_MODEL", " ");
- lf_printf(file, "model_init\n");
- lf_printf(file, "(model_data *model_ptr);\n");
- lf_printf(file, "\n");
- }
-
- if (!model_halt_p) {
- lf_print_function_type(file, "void", "INLINE_MODEL", " ");
- lf_printf(file, "model_halt\n");
- lf_printf(file, "(model_data *model_ptr);\n");
- lf_printf(file, "\n");
- }
-
- if (!model_mon_info_p) {
- lf_print_function_type(file, "model_print *", "INLINE_MODEL", " ");
- lf_printf(file, "model_mon_info\n");
- lf_printf(file, "(model_data *model_ptr);\n");
- lf_printf(file, "\n");
- }
-
- if (!model_mon_info_free_p) {
- lf_print_function_type(file, "void", "INLINE_MODEL", " ");
- lf_printf(file, "model_mon_info_free\n");
- lf_printf(file, "(model_data *model_ptr,\n");
- lf_printf(file, " model_print *info_ptr);\n");
- lf_printf(file, "\n");
- }
-
- lf_print_function_type(file, "void", "INLINE_MODEL", " ");
- lf_printf(file, "model_set\n");
- lf_printf(file, "(const char *name);\n");
-}
-
-/****************************************************************/
-
-typedef struct _model_c_passed_data model_c_passed_data;
-struct _model_c_passed_data {
- lf *file;
- model *model_ptr;
-};
-
-static void
-model_c_insn(insn_table *entry,
- lf *phony_file,
- void *data,
- insn *instruction,
- int depth)
-{
- model_c_passed_data *data_ptr = (model_c_passed_data *)data;
- lf *file = data_ptr->file;
- char *current_name = data_ptr->model_ptr->printable_name;
- table_model_entry *model_ptr = instruction->file_entry->model_first;
-
- while (model_ptr) {
- if (model_ptr->fields[insn_model_name] == current_name) {
- lf_printf(file, " { %-*s }, /* %s */\n",
- max_model_fields_len,
- model_ptr->fields[insn_model_fields],
- instruction->file_entry->fields[insn_name]);
- return;
- }
-
- model_ptr = model_ptr->next;
- }
-
- lf_printf(file, " { %-*s }, /* %s */\n",
- max_model_fields_len,
- data_ptr->model_ptr->insn_default,
- instruction->file_entry->fields[insn_name]);
-}
-
-static void
-model_c_function(insn_table *table,
- lf *file,
- table_entry *function,
- const char *prefix)
-{
- if (function->fields[function_type] == NULL
- || function->fields[function_type][0] == '\0')
- {
- error("Model function return type not specified for %s",
- function->fields[function_name]);
- }
- else
- {
- lf_printf(file, "\n");
- lf_print_function_type(file, function->fields[function_type], prefix, "\n");
- lf_printf(file, "%s(%s)\n",
- function->fields[function_name],
- function->fields[function_param]);
- }
- lf_printf(file, "{\n");
- if (function->annex)
- {
- lf_indent(file, +2);
- table_entry_print_cpp_line_nr(file, function->annex_line);
- lf_print__c_code(file, function->annex);
- lf_indent(file, -2);
- }
- lf_printf(file, "}\n");
- lf_print__internal_reference(file);
- lf_printf(file, "\n");
-}
-
-void
-gen_model_c(insn_table *table, lf *file)
-{
- insn *insn_ptr;
- model *model_ptr;
- char *name;
- int model_create_p = 0;
- int model_init_p = 0;
- int model_halt_p = 0;
- int model_mon_info_p = 0;
- int model_mon_info_free_p = 0;
-
- lf_printf(file, "\n");
- lf_printf(file, "#include \"cpu.h\"\n");
- lf_printf(file, "#include \"mon.h\"\n");
- lf_printf(file, "\n");
- lf_printf(file, "#ifdef HAVE_STDLIB_H\n");
- lf_printf(file, "#include <stdlib.h>\n");
- lf_printf(file, "#endif\n");
- lf_printf(file, "\n");
-
- for(insn_ptr = model_data; insn_ptr; insn_ptr = insn_ptr->next) {
- model_c_or_h_data(table, file, insn_ptr->file_entry);
- }
-
- for(insn_ptr = model_static; insn_ptr; insn_ptr = insn_ptr->next) {
- model_c_or_h_function(table, file, insn_ptr->file_entry, "/*h*/STATIC");
- }
-
- for(insn_ptr = model_internal; insn_ptr; insn_ptr = insn_ptr->next) {
- model_c_or_h_function(table, file, insn_ptr->file_entry, "STATIC_INLINE_MODEL");
- }
-
- for(insn_ptr = model_static; insn_ptr; insn_ptr = insn_ptr->next) {
- model_c_function(table, file, insn_ptr->file_entry, "/*c*/STATIC");
- }
-
- for(insn_ptr = model_internal; insn_ptr; insn_ptr = insn_ptr->next) {
- model_c_function(table, file, insn_ptr->file_entry, "STATIC_INLINE_MODEL");
- }
-
- for(insn_ptr = model_functions; insn_ptr; insn_ptr = insn_ptr->next) {
- model_c_function(table, file, insn_ptr->file_entry, "INLINE_MODEL");
- name = insn_ptr->file_entry->fields[function_name];
- if (strcmp (name, "model_create") == 0)
- model_create_p = 1;
- else if (strcmp (name, "model_init") == 0)
- model_init_p = 1;
- else if (strcmp (name, "model_halt") == 0)
- model_halt_p = 1;
- else if (strcmp (name, "model_mon_info") == 0)
- model_mon_info_p = 1;
- else if (strcmp (name, "model_mon_info_free") == 0)
- model_mon_info_free_p = 1;
- }
-
- if (!model_create_p) {
- lf_print_function_type(file, "model_data *", "INLINE_MODEL", "\n");
- lf_printf(file, "model_create(sim_cpu *cpu)\n");
- lf_printf(file, "{\n");
- lf_printf(file, " return (model_data *)0;\n");
- lf_printf(file, "}\n");
- lf_printf(file, "\n");
- }
-
- if (!model_init_p) {
- lf_print_function_type(file, "void", "INLINE_MODEL", "\n");
- lf_printf(file, "model_init(model_data *model_ptr)\n");
- lf_printf(file, "{\n");
- lf_printf(file, "}\n");
- lf_printf(file, "\n");
- }
-
- if (!model_halt_p) {
- lf_print_function_type(file, "void", "INLINE_MODEL", "\n");
- lf_printf(file, "model_halt(model_data *model_ptr)\n");
- lf_printf(file, "{\n");
- lf_printf(file, "}\n");
- lf_printf(file, "\n");
- }
-
- if (!model_mon_info_p) {
- lf_print_function_type(file, "model_print *", "INLINE_MODEL", "\n");
- lf_printf(file, "model_mon_info(model_data *model_ptr)\n");
- lf_printf(file, "{\n");
- lf_printf(file, " return (model_print *)0;\n");
- lf_printf(file, "}\n");
- lf_printf(file, "\n");
- }
-
- if (!model_mon_info_free_p) {
- lf_print_function_type(file, "void", "INLINE_MODEL", "\n");
- lf_printf(file, "model_mon_info_free(model_data *model_ptr,\n");
- lf_printf(file, " model_print *info_ptr)\n");
- lf_printf(file, "{\n");
- lf_printf(file, "}\n");
- lf_printf(file, "\n");
- }
-
- lf_printf(file, "/* Insn functional unit info */\n");
- for(model_ptr = models; model_ptr; model_ptr = model_ptr->next) {
- model_c_passed_data data;
-
- lf_printf(file, "static const model_time model_time_%s[] = {\n", model_ptr->name);
- data.file = file;
- data.model_ptr = model_ptr;
- insn_table_traverse_insn(table,
- NULL, (void *)&data,
- model_c_insn);
-
- lf_printf(file, "};\n");
- lf_printf(file, "\n");
- lf_printf(file, "\f\n");
- }
-
- lf_printf(file, "#ifndef _INLINE_C_\n");
- lf_printf(file, "const model_time *const model_time_mapping[ (int)nr_models ] = {\n");
- lf_printf(file, " (const model_time *const)0,\n");
- for(model_ptr = models; model_ptr; model_ptr = model_ptr->next) {
- lf_printf(file, " model_time_%s,\n", model_ptr->name);
- }
- lf_printf(file, "};\n");
- lf_printf(file, "#endif\n");
- lf_printf(file, "\n");
-
- lf_printf(file, "\f\n");
- lf_printf(file, "/* map model enumeration into printable string */\n");
- lf_printf(file, "#ifndef _INLINE_C_\n");
- lf_printf(file, "const char *model_name[ (int)nr_models ] = {\n");
- lf_printf(file, " \"NONE\",\n");
- for (model_ptr = models; model_ptr; model_ptr = model_ptr->next) {
- lf_printf(file, " \"%s\",\n", model_ptr->printable_name);
- }
- lf_printf(file, "};\n");
- lf_printf(file, "#endif\n");
- lf_printf(file, "\n");
-
- lf_print_function_type(file, "void", "INLINE_MODEL", "\n");
- lf_printf(file, "model_set(const char *name)\n");
- lf_printf(file, "{\n");
- if (models) {
- lf_printf(file, " model_enum model;\n");
- lf_printf(file, " for(model = MODEL_%s; model < nr_models; model++) {\n", models->name);
- lf_printf(file, " if(strcmp(name, model_name[model]) == 0) {\n");
- lf_printf(file, " current_model = model;\n");
- lf_printf(file, " return;\n");
- lf_printf(file, " }\n");
- lf_printf(file, " }\n");
- lf_printf(file, "\n");
- lf_printf(file, " error(\"Unknown model '%%s', Models which are known are:%%s\n\",\n");
- lf_printf(file, " name,\n");
- lf_printf(file, " \"");
- for(model_ptr = models; model_ptr; model_ptr = model_ptr->next) {
- lf_printf(file, "\\n\\t%s", model_ptr->printable_name);
- }
- lf_printf(file, "\");\n");
- } else {
- lf_printf(file, " error(\"No models are currently known about\");\n");
- }
-
- lf_printf(file, "}\n");
-}
-
-#endif
-
-
-
-void
-gen_model_h (lf *file,
- insn_table *table)
-{
- lf_print__this_file_is_empty (file, "suffering bit rot");
-}
-
-
-void
-gen_model_c (lf *file,
- insn_table *table)
-{
- lf_print__this_file_is_empty (file, "suffering bit rot");
-}
diff --git a/sim/igen/gen-model.h b/sim/igen/gen-model.h
deleted file mode 100644
index 4188e1b2225..00000000000
--- a/sim/igen/gen-model.h
+++ /dev/null
@@ -1,29 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1995, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-
-extern void gen_model_h
-(lf *file,
- insn_table *isa);
-
-extern void gen_model_c
-(lf *file,
- insn_table *isa);
diff --git a/sim/igen/gen-semantics.c b/sim/igen/gen-semantics.c
deleted file mode 100644
index 2994f828472..00000000000
--- a/sim/igen/gen-semantics.c
+++ /dev/null
@@ -1,390 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1998, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-
-#include "misc.h"
-#include "lf.h"
-#include "table.h"
-#include "filter.h"
-#include "igen.h"
-
-#include "ld-insn.h"
-#include "ld-decode.h"
-
-#include "gen.h"
-
-#include "gen-semantics.h"
-#include "gen-icache.h"
-#include "gen-idecode.h"
-
-
-static void
-print_semantic_function_header (lf *file,
- const char *basename,
- const char *format_name,
- opcode_bits *expanded_bits,
- int is_function_definition,
- int nr_prefetched_words)
-{
- int indent;
- lf_printf(file, "\n");
- lf_print__function_type_function (file, print_semantic_function_type,
- "EXTERN_SEMANTICS",
- (is_function_definition ? "\n" : " "));
- indent = print_function_name (file,
- basename,
- format_name,
- NULL,
- expanded_bits,
- function_name_prefix_semantics);
- if (is_function_definition)
- {
- indent += lf_printf (file, " ");
- lf_indent (file, +indent);
- }
- else
- {
- lf_printf (file, "\n");
- }
- lf_printf (file, "(");
- lf_indent (file, +1);
- print_semantic_function_formal (file, nr_prefetched_words);
- lf_indent (file, -1);
- lf_printf (file, ")");
- if (is_function_definition)
- {
- lf_indent (file, -indent);
- }
- else
- {
- lf_printf (file, ";");
- }
- lf_printf (file, "\n");
-}
-
-void
-print_semantic_declaration (lf *file,
- insn_entry *insn,
- opcode_bits *expanded_bits,
- insn_opcodes *opcodes,
- int nr_prefetched_words)
-{
- print_semantic_function_header (file,
- insn->name,
- insn->format_name,
- expanded_bits,
- 0/* is not function definition*/,
- nr_prefetched_words);
-}
-
-
-
-/* generate the semantics.c file */
-
-
-void
-print_idecode_invalid (lf *file,
- const char *result,
- invalid_type type)
-{
- const char *name;
- switch (type)
- {
- default: name = "unknown"; break;
- case invalid_illegal: name = "illegal"; break;
- case invalid_fp_unavailable: name = "fp_unavailable"; break;
- case invalid_wrong_slot: name = "wrong_slot"; break;
- }
- if (options.gen.code == generate_jumps)
- {
- lf_printf (file, "goto %s_%s;\n",
- (options.gen.icache ? "icache" : "semantic"),
- name);
- }
- else if (options.gen.icache)
- {
- lf_printf (file, "%s %sicache_%s (", result, options.module.global.prefix.l, name);
- print_icache_function_actual (file, 0);
- lf_printf (file, ");\n");
- }
- else
- {
- lf_printf (file, "%s %ssemantic_%s (", result, options.module.global.prefix.l, name);
- print_semantic_function_actual (file, 0);
- lf_printf (file, ");\n");
- }
-}
-
-
-void
-print_semantic_body (lf *file,
- insn_entry *instruction,
- opcode_bits *expanded_bits,
- insn_opcodes *opcodes)
-{
- /* validate the instruction, if a cache this has already been done */
- if (!options.gen.icache)
- {
- print_idecode_validate (file, instruction, opcodes);
- }
-
- print_itrace (file, instruction, 0/*put_value_in_cache*/);
-
- /* generate the instruction profile call - this is delayed until
- after the instruction has been verified. The count macro
- generated is prefixed by ITABLE_PREFIX */
- {
- lf_printf (file, "\n");
- lf_indent_suppress (file);
- lf_printf (file, "#if defined (%sPROFILE_COUNT_INSN)\n",
- options.module.itable.prefix.u);
- lf_printf (file, "%sPROFILE_COUNT_INSN (CPU, CIA, MY_INDEX);\n",
- options.module.itable.prefix.u);
- lf_indent_suppress (file);
- lf_printf (file, "#endif\n");
- }
-
- /* generate the model call - this is delayed until after the
- instruction has been verified */
- {
- lf_printf (file, "\n");
- lf_indent_suppress (file);
- lf_printf (file, "#if defined (WITH_MON)\n");
- lf_printf (file, "/* monitoring: */\n");
- lf_printf (file, "if (WITH_MON & MONITOR_INSTRUCTION_ISSUE)\n");
- lf_printf (file, " mon_issue (");
- print_function_name (file,
- instruction->name,
- instruction->format_name,
- NULL,
- NULL,
- function_name_prefix_itable);
- lf_printf (file, ", cpu, cia);\n");
- lf_indent_suppress (file);
- lf_printf (file, "#endif\n");
- lf_printf (file, "\n");
- }
-
- /* determine the new instruction address */
- {
- lf_printf(file, "/* keep the next instruction address handy */\n");
- if (options.gen.nia == nia_is_invalid)
- {
- lf_printf(file, "nia = %sINVALID_INSTRUCTION_ADDRESS;\n",
- options.module.global.prefix.u);
- }
- else
- {
- int nr_immeds = instruction->nr_words - 1;
- if (options.gen.delayed_branch)
- {
- if (nr_immeds > 0)
- {
- lf_printf (file, "cia.dp += %d * %d; %s\n",
- options.insn_bit_size / 8, nr_immeds,
- "/* skip dp immeds */");
- }
- lf_printf (file, "nia.ip = cia.dp; %s\n",
- "/* instruction pointer */");
- lf_printf (file, "nia.dp = cia.dp + %d; %s\n",
- options.insn_bit_size / 8,
- "/* delayed-slot pointer */");
- }
- else
- {
- if (nr_immeds > 0)
- {
- lf_printf (file, "nia = cia + %d * (%d + 1); %s\n",
- options.insn_bit_size / 8, nr_immeds,
- "/* skip immeds as well */");
-
- }
- else
- {
- lf_printf (file, "nia = cia + %d;\n",
- options.insn_bit_size / 8);
- }
- }
- }
- }
-
- /* if conditional, generate code to verify that the instruction
- should be issued */
- if (filter_is_member (instruction->options, "c")
- || options.gen.conditional_issue)
- {
- lf_printf (file, "\n");
- lf_printf (file, "/* execute only if conditional passes */\n");
- lf_printf (file, "if (IS_CONDITION_OK)\n");
- lf_printf (file, " {\n");
- lf_indent (file, +4);
- /* FIXME - need to log a conditional failure */
- }
-
- /* Architecture expects a REG to be zero. Instead of having to
- check every read to see if it is refering to that REG just zap it
- at the start of every instruction */
- if (options.gen.zero_reg)
- {
- lf_printf (file, "\n");
- lf_printf (file, "/* Architecture expects REG to be zero */\n");
- lf_printf (file, "GPR_CLEAR(%d);\n", options.gen.zero_reg_nr);
- }
-
- /* generate the code (or at least something */
- lf_printf (file, "\n");
- lf_printf (file, "/* semantics: */\n");
- if (instruction->code != NULL)
- {
- /* true code */
- lf_printf (file, "{\n");
- lf_indent (file, +2);
- lf_print__line_ref (file, instruction->code->line);
- table_print_code (file, instruction->code);
- lf_indent (file, -2);
- lf_printf (file, "}\n");
- lf_print__internal_ref (file);
- }
- else if (filter_is_member (instruction->options, "nop"))
- {
- lf_print__internal_ref (file);
- }
- else
- {
- const char *prefix = "sim_engine_abort (";
- int indent = strlen (prefix);
- /* abort so it is implemented now */
- lf_print__line_ref (file, instruction->line);
- lf_printf (file, "%sSD, CPU, cia, \\\n", prefix);
- lf_indent (file, +indent);
- lf_printf (file, "\"%s:%d:0x%%08lx:%%s unimplemented\\n\", \\\n",
- filter_filename (instruction->line->file_name),
- instruction->line->line_nr);
- lf_printf (file, "(long) CIA, \\\n");
- lf_printf (file, "%sitable[MY_INDEX].name);\n",
- options.module.itable.prefix.l);
- lf_indent (file, -indent);
- lf_print__internal_ref (file);
- }
-
- /* Close off the conditional execution */
- if (filter_is_member (instruction->options, "c")
- || options.gen.conditional_issue)
- {
- lf_indent (file, -4);
- lf_printf (file, " }\n");
- }
-}
-
-static void
-print_c_semantic (lf *file,
- insn_entry *instruction,
- opcode_bits *expanded_bits,
- insn_opcodes *opcodes,
- cache_entry *cache_rules,
- int nr_prefetched_words)
-{
-
- lf_printf (file, "{\n");
- lf_indent (file, +2);
-
- print_my_defines (file,
- instruction->name,
- instruction->format_name,
- expanded_bits);
- lf_printf (file, "\n");
- print_icache_body (file,
- instruction,
- expanded_bits,
- cache_rules,
- (options.gen.direct_access
- ? define_variables
- : declare_variables),
- (options.gen.icache
- ? get_values_from_icache
- : do_not_use_icache),
- nr_prefetched_words);
-
- lf_printf (file, "%sinstruction_address nia;\n", options.module.global.prefix.l);
- print_semantic_body (file,
- instruction,
- expanded_bits,
- opcodes);
- lf_printf (file, "return nia;\n");
-
- /* generate something to clean up any #defines created for the cache */
- if (options.gen.direct_access)
- {
- print_icache_body (file,
- instruction,
- expanded_bits,
- cache_rules,
- undef_variables,
- (options.gen.icache
- ? get_values_from_icache
- : do_not_use_icache),
- nr_prefetched_words);
- }
-
- lf_indent (file, -2);
- lf_printf (file, "}\n");
-}
-
-static void
-print_c_semantic_function (lf *file,
- insn_entry *instruction,
- opcode_bits *expanded_bits,
- insn_opcodes *opcodes,
- cache_entry *cache_rules,
- int nr_prefetched_words)
-{
- /* build the semantic routine to execute the instruction */
- print_semantic_function_header (file,
- instruction->name,
- instruction->format_name,
- expanded_bits,
- 1/*is-function-definition*/,
- nr_prefetched_words);
- print_c_semantic (file,
- instruction,
- expanded_bits,
- opcodes,
- cache_rules,
- nr_prefetched_words);
-}
-
-void
-print_semantic_definition (lf *file,
- insn_entry *insn,
- opcode_bits *expanded_bits,
- insn_opcodes *opcodes,
- cache_entry *cache_rules,
- int nr_prefetched_words)
-{
- print_c_semantic_function (file,
- insn,
- expanded_bits,
- opcodes,
- cache_rules,
- nr_prefetched_words);
-}
-
-
diff --git a/sim/igen/gen-semantics.h b/sim/igen/gen-semantics.h
deleted file mode 100644
index 869d1eddde4..00000000000
--- a/sim/igen/gen-semantics.h
+++ /dev/null
@@ -1,104 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1997, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-/* Creates the files semantics.[hc].
-
- The generated file semantics contains functions that implement the
- operations required to model a single target processor instruction.
-
- Several different variations on the semantics file can be created:
-
- o uncached
-
- No instruction cache exists. The semantic function
- needs to generate any required values locally.
-
- o cached - separate cracker and semantic
-
- Two independant functions are created. Firstly the
- function that cracks an instruction entering it into a
- cache and secondly the semantic function propper that
- uses the cache.
-
- o cached - semantic + cracking semantic
-
- The function that cracks the instruction and enters
- all values into the cache also contains a copy of the
- semantic code (avoiding the need to call both the
- cracker and the semantic function when there is a
- cache miss).
-
- For each of these general forms, several refinements can occure:
-
- o do/don't duplicate/expand semantic functions
-
- As a consequence of decoding an instruction, the
- decoder, as part of its table may have effectivly made
- certain of the variable fields in an instruction
- constant. Separate functions for each of the
- alternative values for what would have been treated as
- a variable part can be created.
-
- o use cache struct directly.
-
- When a cracking cache is present, the semantic
- functions can be generated to either hold intermediate
- cache values in local variables or always refer to the
- contents of the cache directly. */
-
-
-
-
-
-
-extern void print_semantic_declaration
-(lf *file,
- insn_entry *insn,
- opcode_bits *bits,
- insn_opcodes *opcodes,
- int nr_prefetched_words);
-
-extern void print_semantic_definition
-(lf *file,
- insn_entry *insn,
- opcode_bits *bits,
- insn_opcodes *opcodes,
- cache_entry *cache_rules,
- int nr_prefetched_words);
-
-
-typedef enum {
- invalid_illegal,
- invalid_fp_unavailable,
- invalid_wrong_slot,
-} invalid_type;
-
-extern void print_idecode_invalid
-(lf *file,
- const char *result,
- invalid_type type);
-
-extern void print_semantic_body
-(lf *file,
- insn_entry *instruction,
- opcode_bits *expanded_bits,
- insn_opcodes *opcodes);
-
diff --git a/sim/igen/gen-support.c b/sim/igen/gen-support.c
deleted file mode 100644
index 93efaa74f72..00000000000
--- a/sim/igen/gen-support.c
+++ /dev/null
@@ -1,219 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1998, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-#include "misc.h"
-#include "lf.h"
-#include "table.h"
-#include "filter.h"
-
-#include "igen.h"
-
-#include "ld-insn.h"
-#include "ld-decode.h"
-
-#include "gen.h"
-
-#include "gen-semantics.h"
-#include "gen-support.h"
-
-static void
-print_support_function_name (lf *file,
- function_entry *function,
- int is_function_definition)
-{
- if (function->is_internal)
- {
- lf_print__function_type_function (file, print_semantic_function_type,
- "INLINE_SUPPORT",
- (is_function_definition ? "\n" : " "));
- print_function_name (file,
- function->name,
- NULL,
- NULL,
- NULL,
- function_name_prefix_semantics);
- lf_printf (file, "\n(");
- lf_indent (file, +1);
- print_semantic_function_formal (file, 0);
- lf_indent (file, -1);
- lf_printf (file, ")");
- if (!is_function_definition)
- lf_printf (file, ";");
- lf_printf (file, "\n");
- }
- else
- {
- /* map the name onto a globally valid name */
- if (!is_function_definition
- && strcmp (options.module.support.prefix.l, "") != 0)
- {
- lf_indent_suppress (file);
- lf_printf (file, "#define %s %s%s\n",
- function->name,
- options.module.support.prefix.l,
- function->name);
- }
- lf_print__function_type (file,
- function->type,
- "INLINE_SUPPORT",
- (is_function_definition ? "\n" : " "));
- lf_printf (file, "%s%s\n(",
- options.module.support.prefix.l,
- function->name);
- if (options.gen.smp)
- lf_printf (file,
- "sim_cpu *cpu, %sinstruction_address cia, int MY_INDEX",
- options.module.support.prefix.l);
- else
- lf_printf (file,
- "SIM_DESC sd, %sinstruction_address cia, int MY_INDEX",
- options.module.support.prefix.l);
- if (function->param != NULL
- && strlen (function->param) > 0)
- lf_printf (file, ", %s", function->param);
- lf_printf (file, ")%s", (is_function_definition ? "\n" : ";\n"));
- }
-}
-
-
-static void
-support_h_function (lf *file,
- function_entry *function,
- void *data)
-{
- ASSERT (function->type != NULL);
- print_support_function_name (file,
- function,
- 0/*!is_definition*/);
- lf_printf(file, "\n");
-}
-
-
-extern void
-gen_support_h (lf *file,
- insn_table *table)
-{
- /* output the definition of `SD_'*/
- if (options.gen.smp)
- {
- lf_printf(file, "#define SD CPU_STATE (cpu)\n");
- lf_printf(file, "#define CPU cpu\n");
- lf_printf(file, "#define CPU_ cpu\n");
- }
- else
- {
- lf_printf(file, "#define SD sd\n");
- lf_printf(file, "#define CPU (STATE_CPU (sd, 0))\n");
- lf_printf(file, "#define CPU_ sd\n");
- }
-
- lf_printf(file, "#define CIA_ cia\n");
- if (options.gen.delayed_branch)
- {
- lf_printf(file, "#define CIA cia.ip\n");
- lf_printf(file, "/* #define NIA nia.dp -- do not define, ambigious */\n");
- }
- else
- {
- lf_printf(file, "#define CIA cia\n");
- lf_printf(file, "#define NIA nia\n");
- }
- lf_printf(file, "\n");
-
- lf_printf(file, "#define SD_ CPU_, CIA_, MY_INDEX\n");
- lf_printf(file, "#define _SD SD_ /* deprecated */\n");
- lf_printf(file, "\n");
-
- /* Map <PREFIX>_instruction_word and <PREFIX>_idecode_issue onto the
- shorter instruction_word and idecode_issue. Map defined here as,
- name space problems are created when the name is defined in
- idecode.h */
- if (strcmp (options.module.idecode.prefix.l, "") != 0)
- {
- lf_indent_suppress (file);
- lf_printf (file, "#define %s %s%s\n",
- "instruction_word",
- options.module.idecode.prefix.l,
- "instruction_word");
- lf_printf (file, "\n");
- lf_indent_suppress (file);
- lf_printf (file, "#define %s %s%s\n",
- "idecode_issue",
- options.module.idecode.prefix.l,
- "idecode_issue");
- lf_printf (file, "\n");
- }
-
- /* output a declaration for all functions */
- function_entry_traverse (file, table->functions,
- support_h_function,
- NULL);
- lf_printf(file, "\n");
- lf_printf(file, "#if defined(SUPPORT_INLINE)\n");
- lf_printf(file, "# if ((SUPPORT_INLINE & INCLUDE_MODULE)\\\n");
- lf_printf(file, " && (SUPPORT_INLINE & INCLUDED_BY_MODULE))\n");
- lf_printf(file, "# include \"%ssupport.c\"\n", options.module.support.prefix.l);
- lf_printf(file, "# endif\n");
- lf_printf(file, "#endif\n");
-}
-
-static void
-support_c_function (lf *file,
- function_entry *function,
- void *data)
-{
- ASSERT (function->type != NULL);
- print_support_function_name (file,
- function,
- 1/*!is_definition*/);
- lf_printf (file, "{\n");
- lf_indent (file, +2);
- if (function->code == NULL)
- error (function->line,
- "Function without body (or null statement)");
- lf_print__line_ref (file, function->code->line);
- table_print_code (file, function->code);
- if (function->is_internal)
- {
- lf_printf (file, "sim_engine_abort (SD, CPU, cia, \"Internal function must longjump\\n\");\n");
- lf_printf (file, "return cia;\n");
- }
- lf_indent (file, -2);
- lf_printf (file, "}\n");
- lf_print__internal_ref (file);
- lf_printf (file, "\n");
-}
-
-
-void
-gen_support_c (lf *file,
- insn_table *table)
-{
- lf_printf(file, "#include \"sim-main.h\"\n");
- lf_printf(file, "#include \"%sidecode.h\"\n", options.module.idecode.prefix.l);
- lf_printf(file, "#include \"%sitable.h\"\n", options.module.itable.prefix.l);
- lf_printf(file, "#include \"%ssupport.h\"\n", options.module.support.prefix.l);
- lf_printf(file, "\n");
-
- /* output a definition (c-code) for all functions */
- function_entry_traverse (file, table->functions,
- support_c_function,
- NULL);
-}
diff --git a/sim/igen/gen-support.h b/sim/igen/gen-support.h
deleted file mode 100644
index 301f1ae0d1c..00000000000
--- a/sim/igen/gen-support.h
+++ /dev/null
@@ -1,29 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1996, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-extern void gen_support_h
-(lf *file,
- insn_table *table);
-
-extern void gen_support_c
-(lf *file,
- insn_table *table);
-
diff --git a/sim/igen/gen.c b/sim/igen/gen.c
deleted file mode 100644
index de886190665..00000000000
--- a/sim/igen/gen.c
+++ /dev/null
@@ -1,1765 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1997, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-#include "misc.h"
-#include "lf.h"
-#include "table.h"
-#include "filter.h"
-
-#include "igen.h"
-#include "ld-insn.h"
-#include "ld-decode.h"
-#include "gen.h"
-
-static insn_uint
-sub_val (insn_uint val,
- int val_last_pos,
- int first_pos,
- int last_pos)
-{
- return ((val >> (val_last_pos - last_pos))
- & (((insn_uint)1 << (last_pos - first_pos + 1)) - 1));
-}
-
-static void
-update_depth (lf *file,
- gen_entry *entry,
- int depth,
- void *data)
-{
- int *max_depth = (int*)data;
- if (*max_depth < depth)
- *max_depth = depth;
-}
-
-
-int
-gen_entry_depth (gen_entry *table)
-{
- int depth = 0;
- gen_entry_traverse_tree (NULL,
- table,
- 1,
- NULL, /*start*/
- update_depth,
- NULL, /*end*/
- &depth); /* data */
- return depth;
-}
-
-
-static void
-print_gen_entry_path (line_ref *line,
- gen_entry *table,
- error_func *print)
-{
- if (table->parent == NULL)
- {
- if (table->top->model != NULL)
- print (line, "%s", table->top->model->name);
- else
- print (line, "");
- }
- else
- {
- print_gen_entry_path (line, table->parent, print);
- print (NULL, ".%d", table->opcode_nr);
- }
-}
-
-static void
-print_gen_entry_insns (gen_entry *table,
- error_func *print,
- char *first_message,
- char *next_message)
-{
- insn_list *i;
- char *message;
- message = first_message;
- for (i = table->insns; i != NULL; i = i->next)
- {
- insn_entry *insn = i->insn;
- print_gen_entry_path (insn->line, table, print);
- print (NULL, ": %s.%s %s\n",
- insn->format_name,
- insn->name,
- message);
- if (next_message != NULL)
- message = next_message;
- }
-}
-
-/* same as strcmp */
-static int
-insn_field_cmp (insn_word_entry *l, insn_word_entry *r)
-{
- while (1)
- {
- int bit_nr;
- if (l == NULL && r == NULL)
- return 0; /* all previous fields the same */
- if (l == NULL)
- return -1; /* left shorter than right */
- if (r == NULL)
- return +1; /* left longer than right */
- for (bit_nr = 0;
- bit_nr < options.insn_bit_size;
- bit_nr++)
- {
- if (l->bit[bit_nr]->field->type != insn_field_string)
- continue;
- if (r->bit[bit_nr]->field->type != insn_field_string)
- continue;
- if (l->bit[bit_nr]->field->conditions == NULL)
- continue;
- if (r->bit[bit_nr]->field->conditions == NULL)
- continue;
- if (0)
- printf ("%s%s%s VS %s%s%s\n",
- l->bit[bit_nr]->field->val_string,
- l->bit[bit_nr]->field->conditions->test == insn_field_cond_eq ? "=" : "!",
- l->bit[bit_nr]->field->conditions->string,
- r->bit[bit_nr]->field->val_string,
- r->bit[bit_nr]->field->conditions->test == insn_field_cond_eq ? "=" : "!",
- r->bit[bit_nr]->field->conditions->string);
- if (l->bit[bit_nr]->field->conditions->test == insn_field_cond_eq
- && r->bit[bit_nr]->field->conditions->test == insn_field_cond_eq)
- {
- if (l->bit[bit_nr]->field->conditions->type == insn_field_cond_field
- && r->bit[bit_nr]->field->conditions->type == insn_field_cond_field)
- /* somewhat arbitrary */
- {
- int cmp = strcmp (l->bit[bit_nr]->field->conditions->string,
- r->bit[bit_nr]->field->conditions->string);
- if (cmp != 0)
- return cmp;
- else
- continue;
- }
- if (l->bit[bit_nr]->field->conditions->type == insn_field_cond_field)
- return +1;
- if (r->bit[bit_nr]->field->conditions->type == insn_field_cond_field)
- return -1;
- /* The case of both fields having constant values should have
- already have been handled because such fields are converted
- into normal constant fields. */
- continue;
- }
- if (l->bit[bit_nr]->field->conditions->test == insn_field_cond_eq)
- return +1; /* left = only */
- if (r->bit[bit_nr]->field->conditions->test == insn_field_cond_eq)
- return -1; /* right = only */
- /* FIXME: Need to some what arbitrarily order conditional lists */
- continue;
- }
- l = l->next;
- r = r->next;
- }
-}
-
-/* same as strcmp */
-static int
-insn_word_cmp (insn_word_entry *l, insn_word_entry *r)
-{
- while (1)
- {
- int bit_nr;
- if (l == NULL && r == NULL)
- return 0; /* all previous fields the same */
- if (l == NULL)
- return -1; /* left shorter than right */
- if (r == NULL)
- return +1; /* left longer than right */
- for (bit_nr = 0;
- bit_nr < options.insn_bit_size;
- bit_nr++)
- {
- if (l->bit[bit_nr]->mask < r->bit[bit_nr]->mask)
- return -1;
- if (l->bit[bit_nr]->mask > r->bit[bit_nr]->mask)
- return 1;
- if (l->bit[bit_nr]->value < r->bit[bit_nr]->value)
- return -1;
- if (l->bit[bit_nr]->value > r->bit[bit_nr]->value)
- return 1;
- }
- l = l->next;
- r = r->next;
- }
-}
-
-/* same as strcmp */
-static int
-opcode_bit_cmp (opcode_bits *l,
- opcode_bits *r)
-{
- if (l == NULL && r == NULL)
- return 0; /* all previous bits the same */
- if (l == NULL)
- return -1; /* left shorter than right */
- if (r == NULL)
- return +1; /* left longer than right */
- /* most significant word */
- if (l->field->word_nr < r->field->word_nr)
- return +1; /* left has more significant word */
- if (l->field->word_nr > r->field->word_nr)
- return -1; /* right has more significant word */
- /* most significant bit? */
- if (l->first < r->first)
- return +1; /* left as more significant bit */
- if (l->first > r->first)
- return -1; /* right as more significant bit */
- /* nr bits? */
- if (l->last < r->last)
- return +1; /* left as less bits */
- if (l->last > r->last)
- return -1; /* right as less bits */
- /* value? */
- if (l->value < r->value)
- return -1;
- if (l->value > r->value)
- return 1;
- return 0;
-}
-
-
-/* same as strcmp */
-static int
-opcode_bits_cmp (opcode_bits *l,
- opcode_bits *r)
-{
- while (1)
- {
- int cmp;
- if (l == NULL && r == NULL)
- return 0; /* all previous bits the same */
- cmp = opcode_bit_cmp (l, r);
- if (cmp != 0)
- return cmp;
- l = l->next;
- r = r->next;
- }
-}
-
-/* same as strcmp */
-static opcode_bits *
-new_opcode_bits (opcode_bits *old_bits,
- int value,
- int first,
- int last,
- insn_field_entry *field,
- opcode_field *opcode)
-{
- opcode_bits *new_bits = ZALLOC (opcode_bits);
- new_bits->field = field;
- new_bits->value = value;
- new_bits->first = first;
- new_bits->last = last;
- new_bits->opcode = opcode;
-
- if (old_bits != NULL)
- {
- opcode_bits *new_list;
- opcode_bits **last = &new_list;
- new_list = new_opcode_bits (old_bits->next,
- old_bits->value,
- old_bits->first,
- old_bits->last,
- old_bits->field,
- old_bits->opcode);
- while (*last != NULL)
- {
- int cmp = opcode_bit_cmp (new_bits, *last);
- if (cmp < 0) /* new < new_list */
- {
- break;
- }
- if (cmp == 0)
- {
- ERROR ("Duplicated insn bits in list");
- }
- last = &(*last)->next;
- }
- new_bits->next = *last;
- *last = new_bits;
- return new_list;
- }
- else
- {
- return new_bits;
- }
-}
-
-
-
-
-typedef enum {
- merge_duplicate_insns,
- report_duplicate_insns,
-} duplicate_insn_actions;
-
-static insn_list *
-insn_list_insert (insn_list **cur_insn_ptr,
- int *nr_insns,
- insn_entry *insn,
- opcode_bits *expanded_bits,
- opcode_field *opcodes,
- int nr_prefetched_words,
- duplicate_insn_actions duplicate_action)
-{
- /* insert it according to the order of the fields & bits */
- for (; (*cur_insn_ptr) != NULL; cur_insn_ptr = &(*cur_insn_ptr)->next)
- {
- int cmp;
-
- /* key#1 sort according to the constant fields of each instruction */
- cmp = insn_word_cmp (insn->words, (*cur_insn_ptr)->insn->words);
- if (cmp < 0)
- break;
- else if (cmp > 0)
- continue;
-
- /* key#2 sort according to the expanded bits of each instruction */
- cmp = opcode_bits_cmp (expanded_bits, (*cur_insn_ptr)->expanded_bits);
- if (cmp < 0)
- break;
- else if (cmp > 0)
- continue;
-
- /* key#3 sort according to the non-constant fields of each instruction */
- cmp = insn_field_cmp (insn->words, (*cur_insn_ptr)->insn->words);
- if (cmp < 0)
- break;
- else if (cmp > 0)
- continue;
-
- /* duplicate keys, report problem */
- switch (duplicate_action)
- {
- case report_duplicate_insns:
- /* It would appear that we have two instructions with the
- same constant field values across all words and bits.
- This error can also occure when insn_field_cmp() is
- failing to differentiate between two instructions that
- differ only in their conditional fields. */
- warning (insn->line,
- "Two instructions with identical constant fields\n");
- error ((*cur_insn_ptr)->insn->line,
- "Location of duplicate instruction\n");
- case merge_duplicate_insns:
- /* Add the opcode path to the instructions list */
- if (opcodes != NULL)
- {
- insn_opcodes **last = &(*cur_insn_ptr)->opcodes;
- while (*last != NULL)
- {
- last = &(*last)->next;
- }
- (*last) = ZALLOC (insn_opcodes);
- (*last)->opcode = opcodes;
- }
- /* Use the larger nr_prefetched_words */
- if ((*cur_insn_ptr)->nr_prefetched_words < nr_prefetched_words)
- (*cur_insn_ptr)->nr_prefetched_words = nr_prefetched_words;
- return (*cur_insn_ptr);
- }
-
- }
-
- /* create a new list entry and insert it */
- {
- insn_list *new_insn = ZALLOC (insn_list);
- new_insn->insn = insn;
- new_insn->expanded_bits = expanded_bits;
- new_insn->next = (*cur_insn_ptr);
- new_insn->nr_prefetched_words = nr_prefetched_words;
- if (opcodes != NULL)
- {
- new_insn->opcodes = ZALLOC (insn_opcodes);
- new_insn->opcodes->opcode = opcodes;
- }
- (*cur_insn_ptr) = new_insn;
- }
-
- *nr_insns += 1;
-
- return (*cur_insn_ptr);
-}
-
-
-extern void
-gen_entry_traverse_tree (lf *file,
- gen_entry *table,
- int depth,
- gen_entry_handler *start,
- gen_entry_handler *leaf,
- gen_entry_handler *end,
- void *data)
-{
- gen_entry *entry;
-
- ASSERT (table != NULL);
- ASSERT (table->opcode != NULL);
- ASSERT (table->nr_entries > 0);
- ASSERT (table->entries != 0);
-
- /* prefix */
- if (start != NULL && depth >= 0)
- {
- start (file, table, depth, data);
- }
- /* infix leaves */
- for (entry = table->entries;
- entry != NULL;
- entry = entry->sibling)
- {
- if (entry->entries != NULL && depth != 0)
- {
- gen_entry_traverse_tree (file, entry, depth + 1,
- start, leaf, end, data);
- }
- else if (depth >= 0)
- {
- if (leaf != NULL)
- {
- leaf (file, entry, depth, data);
- }
- }
- }
- /* postfix */
- if (end != NULL && depth >= 0)
- {
- end (file, table, depth, data);
- }
-}
-
-
-
-/* create a list element containing a single gen_table entry */
-
-static gen_list *
-make_table (insn_table *isa,
- decode_table *rules,
- model_entry *model)
-{
- insn_entry *insn;
- gen_list *entry = ZALLOC (gen_list);
- entry->table = ZALLOC (gen_entry);
- entry->table->top = entry;
- entry->model = model;
- entry->isa = isa;
- for (insn = isa->insns; insn != NULL; insn = insn->next)
- {
- if (model == NULL
- || insn->processors == NULL
- || filter_is_member (insn->processors, model->name))
- {
- insn_list_insert (&entry->table->insns,
- &entry->table->nr_insns,
- insn,
- NULL, /* expanded_bits - none yet */
- NULL, /* opcodes - none yet */
- 0, /* nr_prefetched_words - none yet */
- report_duplicate_insns);
- }
- }
- entry->table->opcode_rule = rules;
- return entry;
-}
-
-
-gen_table *
-make_gen_tables (insn_table *isa,
- decode_table *rules)
-{
- gen_table *gen = ZALLOC (gen_table);
- gen->isa = isa;
- gen->rules = rules;
- if (options.gen.multi_sim)
- {
- gen_list **last = &gen->tables;
- model_entry *model;
- filter *processors;
- if (options.model_filter != NULL)
- processors = options.model_filter;
- else
- processors = isa->model->processors;
- for (model = isa->model->models;
- model != NULL;
- model = model->next)
- {
- if (filter_is_member (processors, model->name))
- {
- *last = make_table (isa, rules, model);
- last = &(*last)->next;
- }
- }
- }
- else
- {
- gen->tables = make_table (isa, rules, NULL);
- }
- return gen;
-}
-
-
-/****************************************************************/
-
-#if 0
-typedef enum {
- field_is_not_constant = 0,
- field_constant_int = 1,
- field_constant_reserved = 2,
- field_constant_string = 3
-} constant_field_types;
-
-static constant_field_types
-insn_field_is_constant (insn_field *field,
- decode_table *rule)
-{
- switch (field->type)
- {
- case insn_field_int:
- /* field is an integer */
- return field_constant_int;
- case insn_field_reserved:
- /* field is `/' and treating that as a constant */
- if (rule->with_zero_reserved)
- return field_constant_reserved;
- else
- return field_is_not_constant;
- case insn_field_wild:
- return field_is_not_constant; /* never constant */
- case insn_field_string:
- /* field, though variable, is on the list of forced constants */
- if (filter_is_member (rule->constant_field_names, field->val_string))
- return field_constant_string;
- else
- return field_is_not_constant;
- }
- ERROR ("Internal error");
- return field_is_not_constant;
-}
-#endif
-
-
-/****************************************************************/
-
-
-/* Is the bit, according to the decode rule, identical across all the
- instructions? */
-static int
-insns_bit_useless (insn_list *insns,
- decode_table *rule,
- int bit_nr)
-{
- insn_list *entry;
- int value = -1;
- int is_useless = 1; /* cleared if something actually found */
-
- /* check the instructions for some constant value in at least one of
- the bit fields */
- for (entry = insns; entry != NULL; entry = entry->next)
- {
- insn_word_entry *word = entry->insn->word[rule->word_nr];
- insn_bit_entry *bit = word->bit[bit_nr];
- switch (bit->field->type)
- {
- case insn_field_invalid:
- ASSERT (0);
- break;
- case insn_field_wild:
- case insn_field_reserved:
- /* neither useless or useful - ignore */
- break;
- case insn_field_int:
- switch (rule->search)
- {
- case decode_find_strings:
- /* an integer isn't a string */
- return 1;
- case decode_find_constants:
- case decode_find_mixed:
- /* an integer is useful if its value isn't the same
- between all instructions. The first time through the
- value is saved, the second time through (if the
- values differ) it is marked as useful. */
- if (value < 0)
- value = bit->value;
- else if (value != bit->value)
- is_useless = 0;
- break;
- }
- break;
- case insn_field_string:
- switch (rule->search)
- {
- case decode_find_strings:
- /* at least one string, keep checking */
- is_useless = 0;
- break;
- case decode_find_constants:
- case decode_find_mixed:
- if (filter_is_member (rule->constant_field_names,
- bit->field->val_string))
- /* a string field forced to constant? */
- is_useless = 0;
- else if (rule->search == decode_find_constants)
- /* the string field isn't constant */
- return 1;
- break;
- }
- }
- }
-
- /* Given only one constant value has been found, check through all
- the instructions to see if at least one conditional makes it
- usefull */
- if (value >= 0 && is_useless)
- {
- for (entry = insns; entry != NULL; entry = entry->next)
- {
- insn_word_entry *word = entry->insn->word[rule->word_nr];
- insn_bit_entry *bit = word->bit[bit_nr];
- switch (bit->field->type)
- {
- case insn_field_invalid:
- ASSERT (0);
- break;
- case insn_field_wild:
- case insn_field_reserved:
- case insn_field_int:
- /* already processed */
- break;
- case insn_field_string:
- switch (rule->search)
- {
- case decode_find_strings:
- case decode_find_constants:
- /* already processed */
- break;
- case decode_find_mixed:
- /* string field with conditions. If this condition
- eliminates the value then the compare is useful */
- if (bit->field->conditions != NULL)
- {
- insn_field_cond *condition;
- int shift = bit->field->last - bit_nr;
- for (condition = bit->field->conditions;
- condition != NULL;
- condition = condition->next)
- {
- switch (condition->type)
- {
- case insn_field_cond_value:
- switch (condition->test)
- {
- case insn_field_cond_ne:
- if (((condition->value >> shift) & 1)
- == (unsigned) value)
- /* conditional field excludes the
- current value */
- is_useless = 0;
- break;
- case insn_field_cond_eq:
- if (((condition->value >> shift) & 1)
- != (unsigned) value)
- /* conditional field requires the
- current value */
- is_useless = 0;
- break;
- }
- break;
- case insn_field_cond_field:
- /* are these handled separatly? */
- break;
- }
- }
- }
- }
- }
- }
- }
-
- return is_useless;
-}
-
-
-/* go through a gen-table's list of instruction formats looking for a
- range of bits that meet the decode table RULEs requirements */
-
-static opcode_field *
-gen_entry_find_opcode_field (insn_list *insns,
- decode_table *rule,
- int string_only)
-{
- opcode_field curr_opcode;
- ASSERT (rule != NULL);
-
- memset (&curr_opcode, 0, sizeof (curr_opcode));
- curr_opcode.word_nr = rule->word_nr;
- curr_opcode.first = rule->first;
- curr_opcode.last = rule->last;
-
- /* Try to reduce the size of first..last in accordance with the
- decode rules */
-
- while (curr_opcode.first <= rule->last)
- {
- if (insns_bit_useless (insns, rule, curr_opcode.first))
- curr_opcode.first ++;
- else
- break;
- }
- while (curr_opcode.last >= rule->first)
- {
- if (insns_bit_useless (insns, rule, curr_opcode.last))
- curr_opcode.last --;
- else
- break;
- }
-
-
-#if 0
- for (entry = insns; entry != NULL; entry = entry->next)
- {
- insn_word_entry *fields = entry->insn->word[rule->word_nr];
- opcode_field new_opcode;
-
- ASSERT (fields != NULL);
-
- /* find a start point for the opcode field */
- new_opcode.first = rule->first;
- while (new_opcode.first <= rule->last
- && (!string_only
- || (insn_field_is_constant(fields->bit[new_opcode.first], rule)
- != field_constant_string))
- && (string_only
- || (insn_field_is_constant(fields->bit[new_opcode.first], rule)
- == field_is_not_constant)))
- {
- int new_first = fields->bit[new_opcode.first]->last + 1;
- ASSERT (new_first > new_opcode.first);
- new_opcode.first = new_first;
- }
- ASSERT(new_opcode.first > rule->last
- || (string_only
- && insn_field_is_constant(fields->bit[new_opcode.first],
- rule) == field_constant_string)
- || (!string_only
- && insn_field_is_constant(fields->bit[new_opcode.first],
- rule)));
-
- /* find the end point for the opcode field */
- new_opcode.last = rule->last;
- while (new_opcode.last >= rule->first
- && (!string_only
- || insn_field_is_constant(fields->bit[new_opcode.last],
- rule) != field_constant_string)
- && (string_only
- || !insn_field_is_constant(fields->bit[new_opcode.last],
- rule)))
- {
- int new_last = fields->bit[new_opcode.last]->first - 1;
- ASSERT (new_last < new_opcode.last);
- new_opcode.last = new_last;
- }
- ASSERT(new_opcode.last < rule->first
- || (string_only
- && insn_field_is_constant(fields->bit[new_opcode.last],
- rule) == field_constant_string)
- || (!string_only
- && insn_field_is_constant(fields->bit[new_opcode.last],
- rule)));
-
- /* now see if our current opcode needs expanding to include the
- interesting fields within this instruction */
- if (new_opcode.first <= rule->last
- && curr_opcode.first > new_opcode.first)
- curr_opcode.first = new_opcode.first;
- if (new_opcode.last >= rule->first
- && curr_opcode.last < new_opcode.last)
- curr_opcode.last = new_opcode.last;
-
- }
-#endif
-
- /* did the final opcode field end up being empty? */
- if (curr_opcode.first > curr_opcode.last)
- {
- return NULL;
- }
- ASSERT (curr_opcode.last >= rule->first);
- ASSERT (curr_opcode.first <= rule->last);
- ASSERT (curr_opcode.first <= curr_opcode.last);
-
- /* Ensure that, for the non string only case, the opcode includes
- the range forced_first .. forced_last */
- if (!string_only
- && curr_opcode.first > rule->force_first)
- {
- curr_opcode.first = rule->force_first;
- }
- if (!string_only
- && curr_opcode.last < rule->force_last)
- {
- curr_opcode.last = rule->force_last;
- }
-
- /* For the string only case, force just the lower bound (so that the
- shift can be eliminated) */
- if (string_only
- && rule->force_last == options.insn_bit_size - 1)
- {
- curr_opcode.last = options.insn_bit_size - 1;
- }
-
- /* handle any special cases */
- switch (rule->type)
- {
- case normal_decode_rule:
- /* let the above apply */
- curr_opcode.nr_opcodes =
- (1 << (curr_opcode.last - curr_opcode.first + 1));
- break;
- case boolean_rule:
- curr_opcode.is_boolean = 1;
- curr_opcode.boolean_constant = rule->constant;
- curr_opcode.nr_opcodes = 2;
- break;
- }
-
- {
- opcode_field *new_field = ZALLOC (opcode_field);
- memcpy (new_field, &curr_opcode, sizeof (opcode_field));
- return new_field;
- }
-}
-
-
-static void
-gen_entry_insert_insn (gen_entry *table,
- insn_entry *old_insn,
- int new_word_nr,
- int new_nr_prefetched_words,
- int new_opcode_nr,
- opcode_bits *new_bits)
-{
- gen_entry **entry = &table->entries;
-
- /* find the new table for this entry */
- while ((*entry) != NULL && (*entry)->opcode_nr < new_opcode_nr)
- {
- entry = &(*entry)->sibling;
- }
-
- if ((*entry) == NULL || (*entry)->opcode_nr != new_opcode_nr)
- {
- /* insert the missing entry */
- gen_entry *new_entry = ZALLOC (gen_entry);
- new_entry->sibling = (*entry);
- (*entry) = new_entry;
- table->nr_entries++;
- /* fill it in */
- new_entry->top = table->top;
- new_entry->opcode_nr = new_opcode_nr;
- new_entry->word_nr = new_word_nr;
- new_entry->expanded_bits = new_bits;
- new_entry->opcode_rule = table->opcode_rule->next;
- new_entry->parent = table;
- new_entry->nr_prefetched_words = new_nr_prefetched_words;
- }
- /* ASSERT new_bits == cur_entry bits */
- ASSERT ((*entry) != NULL && (*entry)->opcode_nr == new_opcode_nr);
- insn_list_insert (&(*entry)->insns,
- &(*entry)->nr_insns,
- old_insn,
- NULL, /* expanded_bits - only in final list */
- NULL, /* opcodes - only in final list */
- new_nr_prefetched_words, /* for this table */
- report_duplicate_insns);
-}
-
-
-static void
-gen_entry_expand_opcode (gen_entry *table,
- insn_entry *instruction,
- int bit_nr,
- int opcode_nr,
- opcode_bits *bits)
-{
- if (bit_nr > table->opcode->last)
- {
- /* Only include the hardwired bit information with an entry IF
- that entry (and hence its functions) are being duplicated. */
- if (options.trace.insn_expansion)
- {
- print_gen_entry_path (table->opcode_rule->line, table, notify);
- notify (NULL, ": insert %d - %s.%s%s\n",
- opcode_nr,
- instruction->format_name,
- instruction->name,
- (table->opcode_rule->with_duplicates ? " (duplicated)" : ""));
- }
- if (table->opcode_rule->with_duplicates)
- {
- gen_entry_insert_insn (table, instruction,
- table->opcode->word_nr,
- table->nr_prefetched_words,
- opcode_nr, bits);
- }
- else
- {
- gen_entry_insert_insn (table, instruction,
- table->opcode->word_nr,
- table->nr_prefetched_words,
- opcode_nr, NULL);
- }
- }
- else
- {
- insn_word_entry *word = instruction->word[table->opcode->word_nr];
- insn_field_entry *field = word->bit[bit_nr]->field;
- int last_pos = ((field->last < table->opcode->last)
- ? field->last
- : table->opcode->last);
- int first_pos = ((field->first > table->opcode->first)
- ? field->first
- : table->opcode->first);
- int width = last_pos - first_pos + 1;
- switch (field->type)
- {
- case insn_field_int:
- {
- int val;
- val = sub_val (field->val_int, field->last,
- first_pos, last_pos);
- gen_entry_expand_opcode (table, instruction,
- last_pos + 1,
- ((opcode_nr << width) | val),
- bits);
- break;
- }
- default:
- {
- if (field->type == insn_field_reserved)
- gen_entry_expand_opcode (table, instruction,
- last_pos + 1,
- ((opcode_nr << width)),
- bits);
- else
- {
- int val;
- int last_val = (table->opcode->is_boolean
- ? 2
- : (1 << width));
- for (val = 0; val < last_val; val++)
- {
- /* check to see if the value has been precluded
- (by a conditional) in some way */
- int is_precluded;
- insn_field_cond *condition;
- for (condition = field->conditions, is_precluded = 0;
- condition != NULL && !is_precluded;
- condition = condition->next)
- {
- switch (condition->type)
- {
- case insn_field_cond_value:
- {
- int value = sub_val (condition->value, field->last,
- first_pos, last_pos);
- switch (condition->test)
- {
- case insn_field_cond_ne:
- if (value == val)
- is_precluded = 1;
- break;
- case insn_field_cond_eq:
- if (value != val)
- is_precluded = 1;
- break;
- }
- break;
- }
- case insn_field_cond_field:
- {
- int value;
- opcode_bits *bit;
- gen_entry *t;
- /* Try to find a value for the
- conditional by looking back through
- the previously defined bits for one
- that covers the designated
- conditional field */
- for (bit = bits;
- bit != NULL;
- bit = bit->next)
- {
- if (bit->field->word_nr == condition->field->word_nr
- && bit->first <= condition->field->first
- && bit->last >= condition->field->last)
- {
- /* the bit field fully specified
- the conditional field's value */
- value = sub_val (bit->value, bit->last,
- condition->field->first,
- condition->field->last);
- }
- }
- /* Try to find a value by looking
- through this and previous tables */
- if (bit == NULL)
- {
- for (t = table;
- t->parent != NULL;
- t = t->parent)
- {
- if (t->parent->opcode->word_nr == condition->field->word_nr
- && t->parent->opcode->first <= condition->field->first
- && t->parent->opcode->last >= condition->field->last)
- {
- /* the table entry fully
- specified the condition
- field's value */
- /* extract the field's value
- from the opcode */
- value = sub_val (t->opcode_nr, t->parent->opcode->last,
- condition->field->first, condition->field->last);
- /* this is a requirement of
- a conditonal field
- refering to another field */
- ASSERT ((condition->field->first - condition->field->last)
- == (first_pos - last_pos));
-printf ("value=%d, opcode_nr=%d, last=%d, [%d..%d]\n",
- value, t->opcode_nr, t->parent->opcode->last, condition->field->first, condition->field->last);
- }
- }
- }
- if (bit == NULL && t == NULL)
- error (instruction->line,
- "Conditional `%s' of field `%s' isn't expanded",
- condition->string, field->val_string);
- switch (condition->test)
- {
- case insn_field_cond_ne:
- if (value == val)
- is_precluded = 1;
- break;
- case insn_field_cond_eq:
- if (value != val)
- is_precluded = 1;
- break;
- }
- break;
- }
- }
- }
- if (!is_precluded)
- {
- /* Only add additional hardwired bit
- information if the entry is not going to
- later be combined */
- if (table->opcode_rule->with_combine)
- {
- gen_entry_expand_opcode (table, instruction,
- last_pos + 1,
- ((opcode_nr << width) | val),
- bits);
- }
- else
- {
- opcode_bits *new_bits = new_opcode_bits (bits, val,
- first_pos, last_pos,
- field,
- table->opcode);
- gen_entry_expand_opcode (table, instruction,
- last_pos + 1,
- ((opcode_nr << width) | val),
- new_bits);
- }
- }
- }
- }
- }
- }
- }
-}
-
-static void
-gen_entry_insert_expanding (gen_entry *table,
- insn_entry *instruction)
-{
- gen_entry_expand_opcode (table,
- instruction,
- table->opcode->first,
- 0,
- table->expanded_bits);
-}
-
-
-static int
-insns_match_format_names (insn_list *insns,
- filter *format_names)
-{
- if (format_names != NULL)
- {
- insn_list *i;
- for (i = insns; i != NULL; i = i->next)
- {
- if ( i->insn->format_name != NULL
- && !filter_is_member (format_names, i->insn->format_name))
- return 0;
- }
- }
- return 1;
-}
-
-static int
-table_matches_path (gen_entry *table,
- decode_path_list *paths)
-{
- if (paths == NULL)
- return 1;
- while (paths != NULL)
- {
- gen_entry *entry = table;
- decode_path *path = paths->path;
- while (1)
- {
- if (entry == NULL && path == NULL)
- return 1;
- if (entry == NULL || path == NULL)
- break;
- if (entry->opcode_nr != path->opcode_nr)
- break;
- entry = entry->parent;
- path = path->parent;
- }
- paths = paths->next;
- }
- return 0;
-}
-
-
-static int
-insns_match_conditions (insn_list *insns,
- decode_cond *conditions)
-{
- if (conditions != NULL)
- {
- insn_list *i;
- for (i = insns; i != NULL; i = i->next)
- {
- decode_cond *cond;
- for (cond = conditions; cond != NULL; cond = cond->next)
- {
- int bit_nr;
- if (i->insn->nr_words <= cond->word_nr)
- return 0;
- for (bit_nr = 0; bit_nr < options.insn_bit_size; bit_nr++)
- {
- if (!cond->mask[bit_nr])
- continue;
- if (!i->insn->word[cond->word_nr]->bit[bit_nr]->mask)
- return 0;
- if ((i->insn->word[cond->word_nr]->bit[bit_nr]->value
- == cond->value[bit_nr])
- == !cond->is_equal)
- return 0;
- }
- }
- }
- }
- return 1;
-}
-
-static int
-insns_match_nr_words (insn_list *insns,
- int nr_words)
-{
- insn_list *i;
- for (i = insns; i != NULL; i = i->next)
- {
- if (i->insn->nr_words < nr_words)
- return 0;
- }
- return 1;
-}
-
-static int
-insn_list_cmp (insn_list *l,
- insn_list *r)
-{
- while (1)
- {
- insn_entry *insn;
- if (l == NULL && r == NULL)
- return 0;
- if (l == NULL)
- return -1;
- if (r == NULL)
- return 1;
- if (l->insn != r->insn)
- return -1; /* somewhat arbitrary at present */
- /* skip this insn */
- insn = l->insn;
- while (l != NULL && l->insn == insn)
- l = l->next;
- while (r != NULL && r->insn == insn)
- r = r->next;
- }
-}
-
-
-
-static void
-gen_entry_expand_insns (gen_entry *table)
-{
- decode_table *opcode_rule;
-
- ASSERT(table->nr_insns >= 1);
-
- /* determine a valid opcode */
- for (opcode_rule = table->opcode_rule;
- opcode_rule != NULL;
- opcode_rule = opcode_rule->next)
- {
- char *discard_reason;
- if (table->top->model != NULL
- && opcode_rule->model_names != NULL
- && !filter_is_member (opcode_rule->model_names,
- table->top->model->name))
- {
- /* the rule isn't applicable to this processor */
- discard_reason = "wrong model";
- }
- else if (table->nr_insns == 1 && opcode_rule->conditions == NULL)
- {
- /* for safety, require a pre-codition when attempting to
- apply a rule to a single instruction */
- discard_reason = "need pre-condition when nr-insn == 1";
- }
- else if (table->nr_insns == 1 && !opcode_rule->with_duplicates)
- {
- /* Little point in expanding a single instruction when we're
- not duplicating the semantic functions that this table
- calls */
- discard_reason = "need duplication with nr-insns == 1";
- }
- else if (!insns_match_format_names (table->insns, opcode_rule->format_names))
- {
- discard_reason = "wrong format name";
- }
- else if (!insns_match_nr_words (table->insns, opcode_rule->word_nr + 1))
- {
- discard_reason = "wrong nr words";
- }
- else if (!table_matches_path (table, opcode_rule->paths))
- {
- discard_reason = "path failed";
- }
- else if (!insns_match_conditions (table->insns, opcode_rule->conditions))
- {
- discard_reason = "condition failed";
- }
- else
- {
- discard_reason = "no opcode field";
- table->opcode =
- gen_entry_find_opcode_field (table->insns,
- opcode_rule,
- table->nr_insns == 1/*string-only*/
- );
- if (table->opcode != NULL)
- {
- table->opcode_rule = opcode_rule;
- break;
- }
- }
-
- if (options.trace.rule_rejection)
- {
- print_gen_entry_path (opcode_rule->line, table, notify);
- notify (NULL, ": rule discarded - %s\n", discard_reason);
- }
- }
-
- /* did we find anything */
- if (opcode_rule == NULL)
- {
- /* the decode table failed, this set of instructions haven't
- been uniquely identified */
- if (table->nr_insns > 1)
- {
- print_gen_entry_insns (table, warning,
- "was not uniquely decoded",
- "decodes to the same entry");
- error (NULL, "");
- }
- return;
- }
-
- /* Determine the number of words that must have been prefetched for
- this table to function */
- if (table->parent == NULL)
- table->nr_prefetched_words = table->opcode_rule->word_nr + 1;
- else if (table->opcode_rule->word_nr + 1 > table->parent->nr_prefetched_words)
- table->nr_prefetched_words = table->opcode_rule->word_nr + 1;
- else
- table->nr_prefetched_words = table->parent->nr_prefetched_words;
-
- /* back link what we found to its parent */
- if (table->parent != NULL)
- {
- ASSERT(table->parent->opcode != NULL);
- table->opcode->parent = table->parent->opcode;
- }
-
- /* report the rule being used to expand the instructions */
- if (options.trace.rule_selection)
- {
- print_gen_entry_path (table->opcode_rule->line, table, notify);
- notify (NULL,
- ": decode - word %d, bits [%d..%d] in [%d..%d], opcodes %d, entries %d\n",
- table->opcode->word_nr,
- i2target (options.hi_bit_nr, table->opcode->first),
- i2target (options.hi_bit_nr, table->opcode->last),
- i2target (options.hi_bit_nr, table->opcode_rule->first),
- i2target (options.hi_bit_nr, table->opcode_rule->last),
- table->opcode->nr_opcodes,
- table->nr_entries);
- }
-
- /* expand the raw instructions according to the opcode */
- {
- insn_list *entry;
- for (entry = table->insns; entry != NULL; entry = entry->next)
- {
- if (options.trace.insn_expansion)
- {
- print_gen_entry_path (table->opcode_rule->line, table, notify);
- notify (NULL, ": expand - %s.%s\n",
- entry->insn->format_name,
- entry->insn->name);
- }
- gen_entry_insert_expanding (table, entry->insn);
- }
- }
-
- /* dump the results */
- if (options.trace.entries)
- {
- gen_entry *entry;
- for (entry = table->entries; entry != NULL; entry = entry->sibling)
- {
- insn_list *l;
- print_gen_entry_path (table->opcode_rule->line, entry, notify);
- notify (NULL, ": %d - entries %d -",
- entry->opcode_nr,
- entry->nr_insns);
- for (l = entry->insns; l != NULL; l = l->next)
- notify (NULL, " %s.%s", l->insn->format_name, l->insn->name);
- notify (NULL, "\n");
- }
- }
-
- /* perform a combine pass if needed */
- if (table->opcode_rule->with_combine)
- {
- gen_entry *entry;
- for (entry = table->entries; entry != NULL; entry = entry->sibling)
- {
- if (entry->combined_parent == NULL)
- {
- gen_entry **last = &entry->combined_next;
- gen_entry *alt;
- for (alt = entry->sibling; alt != NULL; alt = alt->sibling)
- {
- if (alt->combined_parent == NULL
- && insn_list_cmp (entry->insns, alt->insns) == 0)
- {
- alt->combined_parent = entry;
- *last = alt;
- last = &alt->combined_next;
- }
- }
- }
- }
- if (options.trace.combine)
- {
- int nr_unique = 0;
- gen_entry *entry;
- for (entry = table->entries; entry != NULL; entry = entry->sibling)
- {
- if (entry->combined_parent == NULL)
- {
- insn_list *l;
- gen_entry *duplicate;
- nr_unique++;
- print_gen_entry_path (table->opcode_rule->line, entry, notify);
- for (duplicate = entry->combined_next;
- duplicate != NULL;
- duplicate = duplicate->combined_next)
- {
- notify (NULL, "+%d", duplicate->opcode_nr);
- }
- notify (NULL, ": entries %d -", entry->nr_insns);
- for (l = entry->insns; l != NULL; l = l->next)
- {
- notify (NULL, " %s.%s",
- l->insn->format_name,
- l->insn->name);
- }
- notify (NULL, "\n");
- }
- }
- print_gen_entry_path (table->opcode_rule->line, table, notify);
- notify (NULL, ": combine - word %d, bits [%d..%d] in [%d..%d], opcodes %d, entries %d, unique %d\n",
- table->opcode->word_nr,
- i2target (options.hi_bit_nr, table->opcode->first),
- i2target (options.hi_bit_nr, table->opcode->last),
- i2target (options.hi_bit_nr, table->opcode_rule->first),
- i2target (options.hi_bit_nr, table->opcode_rule->last),
- table->opcode->nr_opcodes,
- table->nr_entries,
- nr_unique);
- }
- }
-
- /* Check that the rule did more than re-arange the order of the
- instructions */
- {
- gen_entry *entry;
- for (entry = table->entries; entry != NULL; entry = entry->sibling)
- {
- if (entry->combined_parent == NULL)
- {
- if (insn_list_cmp (table->insns, entry->insns) == 0)
- {
- print_gen_entry_path (table->opcode_rule->line, table, warning);
- warning (NULL, ": Applying rule just copied all instructions\n");
- print_gen_entry_insns (entry, warning, "Copied", NULL);
- error (NULL, "");
- }
- }
- }
- }
-
- /* if some form of expanded table, fill in the missing dots */
- switch (table->opcode_rule->gen)
- {
- case padded_switch_gen:
- case array_gen:
- case goto_switch_gen:
- if (!table->opcode->is_boolean)
- {
- gen_entry **entry = &table->entries;
- gen_entry *illegals = NULL;
- gen_entry **last_illegal = &illegals;
- int opcode_nr = 0;
- while (opcode_nr < table->opcode->nr_opcodes)
- {
- if ((*entry) == NULL || (*entry)->opcode_nr != opcode_nr)
- {
- /* missing - insert it under our feet at *entry */
- gen_entry_insert_insn (table,
- table->top->isa->illegal_insn,
- table->opcode->word_nr,
- 0, /* nr_prefetched_words == 0 for invalid */
- opcode_nr, NULL);
- ASSERT ((*entry) != NULL);
- ASSERT ((*entry)->opcode_nr == opcode_nr);
- (*last_illegal) = *entry;
- (*last_illegal)->combined_parent = illegals;
- last_illegal = &(*last_illegal)->combined_next;
- }
- entry = &(*entry)->sibling;
- opcode_nr++;
- }
- /* oops, will have pointed the first illegal insn back to
- its self. Fix this */
- if (illegals != NULL)
- illegals->combined_parent = NULL;
- }
- break;
- case switch_gen:
- case invalid_gen:
- /* ignore */
- break;
- }
-
- /* and do the same for the newly created sub entries but *only*
- expand entries that haven't been combined. */
- {
- gen_entry *entry;
- for (entry = table->entries; entry != NULL; entry = entry->sibling)
- {
- if (entry->combined_parent == NULL)
- {
- gen_entry_expand_insns (entry);
- }
- }
- }
-}
-
-void
-gen_tables_expand_insns (gen_table *gen)
-{
- gen_list *entry;
- for (entry = gen->tables; entry != NULL; entry = entry->next)
- {
- gen_entry_expand_insns (entry->table);
- }
-}
-
-
-/* create a list of all the semantic functions that need to be
- generated. Eliminate any duplicates. Verify that the decode stage
- worked. */
-
-static void
-make_gen_semantics_list (lf *file,
- gen_entry *entry,
- int depth,
- void *data)
-{
- gen_table *gen = (gen_table*) data;
- insn_list *insn;
- /* Not interested in an entrie that have been combined into some
- other entry at the same level */
- if (entry->combined_parent != NULL)
- return;
-
- /* a leaf should contain exactly one instruction. If not the decode
- stage failed. */
- ASSERT (entry->nr_insns == 1);
-
- /* Enter this instruction into the list of semantic functions. */
- insn = insn_list_insert (&gen->semantics, &gen->nr_semantics,
- entry->insns->insn,
- entry->expanded_bits,
- entry->parent->opcode,
- entry->insns->nr_prefetched_words,
- merge_duplicate_insns);
- /* point the table entry at the real semantic function */
- ASSERT (insn != NULL);
- entry->insns->semantic = insn;
-}
-
-
-void
-gen_tables_expand_semantics (gen_table *gen)
-{
- gen_list *entry;
- for (entry = gen->tables; entry != NULL; entry = entry->next)
- {
- gen_entry_traverse_tree (NULL,
- entry->table,
- 1, /* depth */
- NULL, /* start-handler */
- make_gen_semantics_list, /* leaf-handler */
- NULL, /* end-handler */
- gen); /* data */
- }
-}
-
-
-
-#ifdef MAIN
-
-
-static void
-dump_opcode_field (lf *file,
- char *prefix,
- opcode_field *field,
- char *suffix,
- int levels)
-{
- lf_printf (file, "%s(opcode_field *) 0x%lx", prefix, (long) field);
- if (levels && field != NULL) {
- lf_indent (file, +1);
- lf_printf (file, "\n(first %d)", field->first);
- lf_printf (file, "\n(last %d)", field->last);
- lf_printf (file, "\n(nr_opcodes %d)", field->nr_opcodes);
- lf_printf (file, "\n(is_boolean %d)", field->is_boolean);
- lf_printf (file, "\n(boolean_constant %d)", field->boolean_constant);
- dump_opcode_field(file, "\n(parent ", field->parent, ")", levels - 1);
- lf_indent (file, -1);
- }
- lf_printf (file, "%s", suffix);
-}
-
-
-static void
-dump_opcode_bits (lf *file,
- char *prefix,
- opcode_bits *bits,
- char *suffix,
- int levels)
-{
- lf_printf (file, "%s(opcode_bits *) 0x%lx", prefix, (long) bits);
-
- if (levels && bits != NULL)
- {
- lf_indent (file, +1);
- lf_printf (file, "\n(value %d)", bits->value);
- dump_opcode_field (file, "\n(opcode ", bits->opcode, ")", 0);
- dump_insn_field (file, "\n(field ", bits->field, ")");
- dump_opcode_bits (file, "\n(next ", bits->next, ")", levels - 1);
- lf_indent (file, -1);
- }
- lf_printf (file, "%s", suffix);
-}
-
-
-
-static void
-dump_insn_list (lf *file,
- char *prefix,
- insn_list *entry,
- char *suffix)
-{
- lf_printf (file, "%s(insn_list *) 0x%lx", prefix, (long) entry);
-
- if (entry != NULL) {
- lf_indent (file, +1);
- dump_insn_entry (file, "\n(insn ", entry->insn, ")");
- lf_printf (file, "\n(next 0x%lx)", (long) entry->next);
- lf_indent (file, -1);
- }
- lf_printf (file, "%s", suffix);
-}
-
-
-static void
-dump_insn_word_entry_list_entries (lf *file,
- char *prefix,
- insn_list *entry,
- char *suffix)
-{
- lf_printf (file, "%s", prefix);
- while (entry != NULL)
- {
- dump_insn_list (file, "\n(", entry, ")");
- entry = entry->next;
- }
- lf_printf (file, "%s", suffix);
-}
-
-
-static void
-dump_gen_entry (lf *file,
- char *prefix,
- gen_entry *table,
- char *suffix,
- int levels)
-{
-
- lf_printf (file, "%s(gen_entry *) 0x%lx", prefix, (long) table);
-
- if (levels && table != NULL) {
-
- lf_indent (file, +1);
- lf_printf (file, "\n(opcode_nr %d)", table->opcode_nr);
- lf_printf (file, "\n(word_nr %d)", table->word_nr);
- dump_opcode_bits (file, "\n(expanded_bits ", table->expanded_bits, ")", -1);
- lf_printf (file, "\n(nr_insns %d)", table->nr_insns);
- dump_insn_word_entry_list_entries (file, "\n(insns ", table->insns, ")");
- dump_decode_rule (file, "\n(opcode_rule ", table->opcode_rule, ")");
- dump_opcode_field (file, "\n(opcode ", table->opcode, ")", 0);
- lf_printf (file, "\n(nr_entries %d)", table->nr_entries);
- dump_gen_entry (file, "\n(entries ", table->entries, ")", table->nr_entries);
- dump_gen_entry (file, "\n(sibling ", table->sibling, ")", levels - 1);
- dump_gen_entry (file, "\n(parent ", table->parent, ")", 0);
- lf_indent (file, -1);
- }
- lf_printf (file, "%s", suffix);
-}
-
-static void
-dump_gen_list (lf *file,
- char *prefix,
- gen_list *entry,
- char *suffix,
- int levels)
-{
- while (entry != NULL)
- {
- lf_printf (file, "%s(gen_list *) 0x%lx", prefix, (long) entry);
- dump_gen_entry (file, "\n(", entry->table, ")", levels);
- lf_printf (file, "\n(next (gen_list *) 0x%lx)", (long) entry->next);
- lf_printf (file, "%s", suffix);
- }
-}
-
-
-static void
-dump_gen_table (lf *file,
- char *prefix,
- gen_table *gen,
- char *suffix,
- int levels)
-{
- lf_printf (file, "%s(gen_table *) 0x%lx", prefix, (long) gen);
- lf_printf (file, "\n(isa (insn_table *) 0x%lx)", (long) gen->isa);
- lf_printf (file, "\n(rules (decode_table *) 0x%lx)", (long) gen->rules);
- dump_gen_list (file, "\n(", gen->tables, ")", levels);
- lf_printf (file, "%s", suffix);
-}
-
-
-igen_options options;
-
-int
-main (int argc,
- char **argv)
-{
- decode_table *decode_rules;
- insn_table *instructions;
- gen_table *gen;
- lf *l;
-
- if (argc != 7)
- error (NULL, "Usage: insn <filter-in> <hi-bit-nr> <insn-bit-size> <widths> <decode-table> <insn-table>\n");
-
- INIT_OPTIONS (options);
-
- filter_parse (&options.flags_filter, argv[1]);
-
- options.hi_bit_nr = a2i(argv[2]);
- options.insn_bit_size = a2i(argv[3]);
- options.insn_specifying_widths = a2i(argv[4]);
- ASSERT(options.hi_bit_nr < options.insn_bit_size);
-
- instructions = load_insn_table (argv[6], NULL);
- decode_rules = load_decode_table (argv[5]);
- gen = make_gen_tables (instructions, decode_rules);
-
- gen_tables_expand_insns (gen);
-
- l = lf_open ("-", "stdout", lf_omit_references, lf_is_text, "tmp-ld-insn");
-
- dump_gen_table (l, "(", gen, ")\n", -1);
- return 0;
-}
-
-#endif
diff --git a/sim/igen/gen.h b/sim/igen/gen.h
deleted file mode 100644
index 884e27711e4..00000000000
--- a/sim/igen/gen.h
+++ /dev/null
@@ -1,227 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994,1995,1996, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-typedef struct _opcode_field opcode_field;
-struct _opcode_field {
- int word_nr;
- int first;
- int last;
- int is_boolean;
- int nr_opcodes;
- unsigned boolean_constant;
- opcode_field *parent;
-};
-
-typedef struct _opcode_bits opcode_bits;
-struct _opcode_bits {
- int value;
- int first;
- int last;
- insn_field_entry *field;
- opcode_field *opcode;
- opcode_bits *next;
-};
-
-typedef struct _insn_opcodes insn_opcodes;
-struct _insn_opcodes {
- opcode_field *opcode;
- insn_opcodes *next;
-};
-
-typedef struct _insn_list insn_list;
-struct _insn_list {
- /* the instruction */
- insn_entry *insn;
- /* list of non constant bits that have been made constant */
- opcode_bits *expanded_bits;
- /* list of the various opcode field paths used to reach this
- instruction */
- insn_opcodes *opcodes;
- /* number of prefetched words for this instruction */
- int nr_prefetched_words;
- /* The semantic function list_entry corresponding to this insn */
- insn_list *semantic;
- /* linked list */
- insn_list *next;
-};
-
-/* forward */
-typedef struct _gen_list gen_list;
-
-typedef struct _gen_entry gen_entry;
-struct _gen_entry {
-
- /* as an entry in a table */
- int word_nr;
- int opcode_nr;
- gen_entry *sibling;
- opcode_bits *expanded_bits;
- gen_entry *parent; /* parent has the opcode* data */
-
- /* as a table containing entries */
- decode_table *opcode_rule;
- opcode_field *opcode;
- int nr_prefetched_words;
- int nr_entries;
- gen_entry *entries;
-
- /* as both an entry and a table */
- int nr_insns;
- insn_list *insns;
-
- /* if siblings are being combined */
- gen_entry *combined_next;
- gen_entry *combined_parent;
-
- /* our top-of-tree */
- gen_list *top;
-};
-
-
-struct _gen_list {
- model_entry *model;
- insn_table *isa;
- gen_entry *table;
- gen_list *next;
-};
-
-
-typedef struct _gen_table gen_table;
-struct _gen_table {
- /* list of all the instructions */
- insn_table *isa;
- /* list of all the semantic functions */
- decode_table *rules;
- /* list of all the generated instruction tables */
- gen_list *tables;
- /* list of all the semantic functions */
- int nr_semantics;
- insn_list *semantics;
-};
-
-
-extern gen_table *make_gen_tables
-(insn_table *isa,
- decode_table *rules);
-
-
-extern void gen_tables_expand_insns
-(gen_table *gen);
-
-extern void gen_tables_expand_semantics
-(gen_table *gen);
-
-extern int gen_entry_depth
-(gen_entry *table);
-
-
-
-/* Traverse the created data structure */
-
-typedef void gen_entry_handler
-(lf *file,
- gen_entry *entry,
- int depth,
- void *data);
-
-extern void gen_entry_traverse_tree
-(lf *file,
- gen_entry *table,
- int depth,
- gen_entry_handler *start,
- gen_entry_handler *leaf,
- gen_entry_handler *end,
- void *data);
-
-
-
-/* Misc functions - actually in igen.c */
-
-
-/* Cache functions: */
-
-extern int print_icache_function_formal
-(lf *file, int nr_prefetched_words);
-
-extern int print_icache_function_actual
-(lf *file, int nr_prefetched_words);
-
-extern int print_icache_function_type
-(lf *file);
-
-extern int print_semantic_function_formal
-(lf *file, int nr_prefetched_words);
-
-extern int print_semantic_function_actual
-(lf *file, int nr_prefetched_words);
-
-extern int print_semantic_function_type
-(lf *file);
-
-extern int print_idecode_function_formal
-(lf *file, int nr_prefetched_words);
-
-extern int print_idecode_function_actual
-(lf *file, int nr_prefetched_words);
-
-typedef enum {
- function_name_prefix_semantics,
- function_name_prefix_idecode,
- function_name_prefix_itable,
- function_name_prefix_icache,
- function_name_prefix_engine,
- function_name_prefix_none
-} lf_function_name_prefixes;
-
-typedef enum {
- is_function_declaration = 0,
- is_function_definition = 1,
- is_function_variable,
-} function_decl_type;
-
-extern int print_function_name
-(lf *file,
- const char *basename,
- const char *format_name,
- const char *model_name,
- opcode_bits *expanded_bits,
- lf_function_name_prefixes prefix);
-
-extern void print_my_defines
-(lf *file,
- const char *basename,
- const char *format_name,
- opcode_bits *expanded_bits);
-
-extern void print_itrace
-(lf *file,
- insn_entry *insn,
- int idecode);
-
-extern void print_sim_engine_abort
-(lf *file,
- const char *message);
-
-
-extern void print_include (lf *file, igen_module module);
-extern void print_include_inline (lf *file, igen_module module);
-extern void print_includes (lf *file);
-
diff --git a/sim/igen/igen.c b/sim/igen/igen.c
deleted file mode 100644
index 094f0cd43bb..00000000000
--- a/sim/igen/igen.c
+++ /dev/null
@@ -1,1621 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1998, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-
-#include <getopt.h>
-
-#include "misc.h"
-#include "lf.h"
-#include "table.h"
-#include "config.h"
-#include "filter.h"
-
-#include "igen.h"
-
-#include "ld-insn.h"
-#include "ld-decode.h"
-#include "ld-cache.h"
-
-#include "gen.h"
-
-#include "gen-model.h"
-#include "gen-icache.h"
-#include "gen-itable.h"
-#include "gen-idecode.h"
-#include "gen-semantics.h"
-#include "gen-engine.h"
-#include "gen-support.h"
-#include "gen-engine.h"
-
-
-/****************************************************************/
-
-
-/* Semantic functions */
-
-int
-print_semantic_function_formal (lf *file,
- int nr_prefetched_words)
-{
- int nr = 0;
- int word_nr;
- if (options.gen.icache || nr_prefetched_words < 0)
- {
- nr += lf_printf (file, "SIM_DESC sd,\n");
- nr += lf_printf (file, "%sidecode_cache *cache_entry,\n",
- options.module.global.prefix.l);
- nr += lf_printf (file, "%sinstruction_address cia",
- options.module.global.prefix.l);
- }
- else if (options.gen.smp)
- {
- nr += lf_printf (file, "sim_cpu *cpu,\n");
- for (word_nr = 0; word_nr < nr_prefetched_words; word_nr++)
- {
- nr += lf_printf (file, "%sinstruction_word instruction_%d,\n",
- options.module.global.prefix.l,
- word_nr);
- }
- nr += lf_printf (file, "%sinstruction_address cia",
- options.module.global.prefix.l);
- }
- else
- {
- nr += lf_printf (file, "SIM_DESC sd,\n");
- for (word_nr = 0; word_nr < nr_prefetched_words; word_nr++)
- {
- nr += lf_printf (file, "%sinstruction_word instruction_%d,\n",
- options.module.global.prefix.l,
- word_nr);
- }
- nr += lf_printf (file, "%sinstruction_address cia",
- options.module.global.prefix.l);
- }
- return nr;
-}
-
-int
-print_semantic_function_actual (lf *file,
- int nr_prefetched_words)
-{
- int nr = 0;
- int word_nr;
- if (options.gen.icache || nr_prefetched_words < 0)
- {
- nr += lf_printf (file, "sd, cache_entry, cia");
- }
- else
- {
- if (options.gen.smp)
- nr += lf_printf (file, "cpu");
- else
- nr += lf_printf (file, "sd");
- for (word_nr = 0; word_nr < nr_prefetched_words; word_nr++)
- nr += lf_printf (file, ", instruction_%d", word_nr);
- nr += lf_printf (file, ", cia");
- }
- return nr;
-}
-
-int
-print_semantic_function_type (lf *file)
-{
- int nr = 0;
- nr += lf_printf (file, "%sinstruction_address",
- options.module.global.prefix.l);
- return nr;
-}
-
-
-/* Idecode functions */
-
-int
-print_icache_function_formal (lf *file,
- int nr_prefetched_words)
-{
- int nr = 0;
- int word_nr;
- if (options.gen.smp)
- nr += lf_printf (file, "sim_cpu *cpu,\n");
- else
- nr += lf_printf (file, "SIM_DESC sd,\n");
- for (word_nr = 0; word_nr < nr_prefetched_words; word_nr++)
- nr += lf_printf (file, " %sinstruction_word instruction_%d,\n",
- options.module.global.prefix.l, word_nr);
- nr += lf_printf (file, " %sinstruction_address cia,\n",
- options.module.global.prefix.l);
- nr += lf_printf (file, " %sidecode_cache *cache_entry",
- options.module.global.prefix.l);
- return nr;
-}
-
-int
-print_icache_function_actual (lf *file,
- int nr_prefetched_words)
-{
- int nr = 0;
- int word_nr;
- if (options.gen.smp)
- nr += lf_printf (file, "cpu");
- else
- nr += lf_printf (file, "sd");
- for (word_nr = 0; word_nr < nr_prefetched_words; word_nr++)
- nr += lf_printf (file, ", instruction_%d", word_nr);
- nr += lf_printf (file, ", cia, cache_entry");
- return nr;
-}
-
-int
-print_icache_function_type (lf *file)
-{
- int nr;
- if (options.gen.semantic_icache)
- {
- nr = print_semantic_function_type (file);
- }
- else
- {
- nr = lf_printf (file, "%sidecode_semantic *",
- options.module.global.prefix.l);
- }
- return nr;
-}
-
-
-/* Function names */
-
-static int
-print_opcode_bits (lf *file,
- opcode_bits *bits)
-{
- int nr = 0;
- if (bits == NULL)
- return nr;
- nr += lf_putchr (file, '_');
- nr += lf_putstr (file, bits->field->val_string);
- if (bits->opcode->is_boolean && bits->value == 0)
- nr += lf_putint (file, bits->opcode->boolean_constant);
- else if (!bits->opcode->is_boolean) {
- if (bits->opcode->last < bits->field->last)
- nr += lf_putint (file, bits->value << (bits->field->last - bits->opcode->last));
- else
- nr += lf_putint (file, bits->value);
- }
- nr += print_opcode_bits (file, bits->next);
- return nr;
-}
-
-static int
-print_c_name (lf *file,
- const char *name)
-{
- int nr = 0;
- const char *pos;
- for (pos = name; *pos != '\0'; pos++)
- {
- switch (*pos)
- {
- case '/':
- case '-':
- break;
- case ' ':
- case '.':
- nr += lf_putchr (file, '_');
- break;
- default:
- nr += lf_putchr (file, *pos);
- break;
- }
- }
- return nr;
-}
-
-extern int
-print_function_name (lf *file,
- const char *basename,
- const char *format_name,
- const char *model_name,
- opcode_bits *expanded_bits,
- lf_function_name_prefixes prefix)
-{
- int nr = 0;
- /* the prefix */
- switch (prefix)
- {
- case function_name_prefix_semantics:
- nr += lf_printf (file, "%s", options.module.semantics.prefix.l);
- nr += lf_printf (file, "semantic_");
- break;
- case function_name_prefix_idecode:
- nr += lf_printf (file, "%s", options.module.idecode.prefix.l);
- nr += lf_printf (file, "idecode_");
- break;
- case function_name_prefix_itable:
- nr += lf_printf (file, "%sitable_", options.module.itable.prefix.l);
- break;
- case function_name_prefix_icache:
- nr += lf_printf (file, "%s", options.module.icache.prefix.l);
- nr += lf_printf (file, "icache_");
- break;
- case function_name_prefix_engine:
- nr += lf_printf (file, "%s", options.module.engine.prefix.l);
- nr += lf_printf (file, "engine_");
- default:
- break;
- }
-
- if (model_name != NULL)
- {
- nr += print_c_name (file, model_name);
- nr += lf_printf (file, "_");
- }
-
- /* the function name */
- nr += print_c_name (file, basename);
-
- /* the format name if available */
- if (format_name != NULL)
- {
- nr += lf_printf (file, "_");
- nr += print_c_name (file, format_name);
- }
-
- /* the suffix */
- nr += print_opcode_bits (file, expanded_bits);
-
- return nr;
-}
-
-
-void
-print_my_defines (lf *file,
- const char *basename,
- const char *format_name,
- opcode_bits *expanded_bits)
-{
- /* #define MY_INDEX xxxxx */
- lf_indent_suppress (file);
- lf_printf (file, "#undef MY_INDEX\n");
- lf_indent_suppress (file);
- lf_printf (file, "#define MY_INDEX ");
- print_function_name (file,
- basename, format_name, NULL,
- NULL,
- function_name_prefix_itable);
- lf_printf (file, "\n");
- /* #define MY_PREFIX xxxxxx */
- lf_indent_suppress (file);
- lf_printf (file, "#undef ");
- print_function_name (file,
- basename, format_name, NULL,
- expanded_bits,
- function_name_prefix_none);
- lf_printf (file, "\n");
- lf_indent_suppress (file);
- lf_printf (file, "#undef MY_PREFIX\n");
- lf_indent_suppress (file);
- lf_printf (file, "#define MY_PREFIX ");
- print_function_name (file,
- basename, format_name, NULL,
- expanded_bits,
- function_name_prefix_none);
- lf_printf (file, "\n");
- /* #define MY_NAME xxxxxx */
- lf_indent_suppress (file);
- lf_indent_suppress (file);
- lf_printf (file, "#undef MY_NAME\n");
- lf_indent_suppress (file);
- lf_printf (file, "#define MY_NAME \"");
- print_function_name (file,
- basename, format_name, NULL,
- expanded_bits,
- function_name_prefix_none);
- lf_printf (file, "\"\n");
-}
-
-
-static int
-print_itrace_prefix (lf *file)
-{
- const char *prefix = "trace_prefix (";
- int indent = strlen (prefix);
- lf_printf (file, "%sSD, CPU, cia, CIA, TRACE_LINENUM_P (CPU), \\\n", prefix);
- lf_indent (file, +indent);
- lf_printf (file, "%sitable[MY_INDEX].file, \\\n", options.module.itable.prefix.l);
- lf_printf (file, "%sitable[MY_INDEX].line_nr, \\\n", options.module.itable.prefix.l);
- lf_printf (file, "\"");
- return indent;
-}
-
-
-static void
-print_itrace_format (lf *file,
- insn_mnemonic_entry *assembler)
-{
- /* pass=1 is fmt string; pass=2 is arguments */
- int pass;
- /* print the format string */
- for (pass = 1; pass <= 2; pass++)
- {
- const char *chp = assembler->format;
- chp++; /* skip the leading quote */
- /* write out the format/args */
- while (*chp != '\0')
- {
- if (chp[0] == '\\' && (chp[1] == '<' || chp[1] == '>'))
- {
- if (pass == 1)
- lf_putchr (file, chp[1]);
- chp += 2;
- }
- else if (chp[0] == '<' || chp[0] == '%')
- {
- /* parse [ "%" ... ] "<" [ func "#" ] param ">" */
- const char *fmt;
- const char *func;
- int strlen_func;
- const char *param;
- int strlen_param;
- /* the "%" ... "<" format */
- fmt = chp;
- while (chp[0] != '<' && chp[0] != '\0')
- chp++;
- if (chp[0] != '<')
- error (assembler->line, "Missing `<' after `%%'\n");
- chp++;
- /* [ "func" # ] OR "param" */
- func = chp;
- param = chp;
- while (chp[0] != '>' && chp[0] != '#' && chp[0] != '\0')
- chp++;
- strlen_func = chp - func;
- if (chp[0] == '#')
- {
- chp++;
- param = chp;
- while (chp[0] != '>' && chp[0] != '\0')
- chp++;
- }
- strlen_param = chp - param;
- if (chp[0] != '>')
- error (assembler->line, "Missing closing `>' in assembler string\n");
- chp++;
- /* now process it */
- if (pass == 2)
- lf_printf (file, ", \\\n");
- if (strncmp (fmt, "<", 1) == 0)
- /* implicit long int format */
- {
- if (pass == 1)
- lf_printf (file, "%%ld");
- else
- {
- lf_printf (file, "(long) ");
- lf_write (file, param, strlen_param);
- }
- }
- else if (strncmp (fmt, "%<", 2) == 0)
- /* explicit format */
- {
- if (pass == 1)
- lf_printf (file, "%%");
- else
- lf_write (file, param, strlen_param);
- }
- else if (strncmp (fmt, "%s<", 3) == 0)
- /* string format */
- {
- if (pass == 1)
- lf_printf (file, "%%s");
- else
- {
- lf_printf (file, "%sstr_", options.module.global.prefix.l);
- lf_write (file, func, strlen_func);
- lf_printf (file, " (SD_, ");
- lf_write (file, param, strlen_param);
- lf_printf (file, ")");
- }
- }
- else if (strncmp (fmt, "%lx<", 4) == 0)
- /* simple hex */
- {
- if (pass == 1)
- lf_printf (file, "%%lx");
- else
- {
- lf_printf (file, "(unsigned long) ");
- lf_write (file, param, strlen_param);
- }
- }
- else if (strncmp (fmt, "%08lx<", 6) == 0)
- /* simple hex */
- {
- if (pass == 1)
- lf_printf (file, "%%08lx");
- else
- {
- lf_printf (file, "(unsigned long) ");
- lf_write (file, param, strlen_param);
- }
- }
- else
- error (assembler->line, "Unknown assembler string format\n");
- }
- else
- {
- if (pass == 1)
- lf_putchr (file, chp[0]);
- chp += 1;
- }
- }
- }
- lf_printf (file, ");\n");
-}
-
-
-void
-print_itrace (lf *file,
- insn_entry *insn,
- int idecode)
-{
- /* NB: Here we escape each EOLN. This is so that the the compiler
- treats a trace function call as a single line. Consequently any
- errors in the line are refered back to the same igen assembler
- source line */
- const char *phase = (idecode) ? "DECODE" : "INSN";
- lf_printf (file, "\n");
- lf_indent_suppress (file);
- lf_printf (file, "#if defined (WITH_TRACE)\n");
- lf_printf (file, "/* generate a trace prefix if any tracing enabled */\n");
- lf_printf (file, "if (TRACE_ANY_P (CPU))\n");
- lf_printf (file, " {\n");
- lf_indent (file, +4);
- {
- if (insn->mnemonics != NULL)
- {
- insn_mnemonic_entry *assembler = insn->mnemonics;
- int is_first = 1;
- do
- {
- if (assembler->condition != NULL)
- {
- int indent;
- lf_printf (file, "%sif (%s)\n",
- is_first ? "" : "else ",
- assembler->condition);
- lf_indent (file, +2);
- lf_print__line_ref (file, assembler->line);
- indent = print_itrace_prefix (file);
- print_itrace_format (file, assembler);
- lf_print__internal_ref (file);
- lf_indent (file, -indent);
- lf_indent (file, -2);
- if (assembler->next == NULL)
- error (assembler->line, "Missing final unconditional assembler\n");
- }
- else
- {
- int indent;
- if (!is_first)
- {
- lf_printf (file, "else\n");
- lf_indent (file, +2);
- }
- lf_print__line_ref (file, assembler->line);
- indent = print_itrace_prefix (file);
- print_itrace_format (file, assembler);
- lf_print__internal_ref (file);
- lf_indent (file, -indent);
- if (!is_first)
- lf_indent (file, -2);
- if (assembler->next != NULL)
- error (assembler->line, "Unconditional assembler is not last\n");
- }
- is_first = 0;
- assembler = assembler->next;
- }
- while (assembler != NULL);
- }
- else
- {
- int indent;
- lf_indent (file, +2);
- lf_print__line_ref (file, insn->line);
- indent = print_itrace_prefix (file);
- lf_printf (file, "%%s\", \\\n");
- lf_printf (file, "itable[MY_INDEX].name);\n");
- lf_print__internal_ref (file);
- lf_indent (file, -indent);
- lf_indent (file, -2);
- }
- lf_printf (file, "/* trace the instruction execution if enabled */\n");
- lf_printf (file, "if (TRACE_%s_P (CPU))\n", phase);
- lf_printf (file, " trace_generic (SD, CPU, TRACE_%s_IDX, \" %%s\", itable[MY_INDEX].name);\n", phase);
- }
- lf_indent (file, -4);
- lf_printf (file, " }\n");
- lf_indent_suppress (file);
- lf_printf (file, "#endif\n");
-}
-
-
-void
-print_sim_engine_abort (lf *file,
- const char *message)
-{
- lf_printf (file, "sim_engine_abort (SD, CPU, cia, ");
- lf_printf (file, "\"%s\"", message);
- lf_printf (file, ");\n");
-}
-
-
-void
-print_include (lf *file,
- igen_module module)
-{
- lf_printf (file, "#include \"%s%s.h\"\n", module.prefix.l, module.suffix.l);
-}
-
-void
-print_include_inline (lf *file,
- igen_module module)
-{
- lf_printf (file, "#if C_REVEALS_MODULE_P (%s_INLINE)\n", module.suffix.u);
- lf_printf (file, "#include \"%s%s.c\"\n", module.prefix.l, module.suffix.l);
- lf_printf (file, "#else\n");
- print_include (file, module);
- lf_printf (file, "#endif\n");
- lf_printf (file, "\n");
-}
-
-void
-print_includes (lf *file)
-{
- lf_printf (file, "\n");
- lf_printf (file, "#include \"sim-inline.c\"\n");
- lf_printf (file, "\n");
- print_include_inline (file, options.module.itable);
- print_include_inline (file, options.module.idecode);
- print_include_inline (file, options.module.support);
-}
-
-
-/****************************************************************/
-
-
-static void
-gen_semantics_h (lf *file,
- insn_list *semantics,
- int max_nr_words)
-{
- int word_nr;
- insn_list *semantic;
- for (word_nr = -1; word_nr <= max_nr_words; word_nr++)
- {
- lf_printf (file, "typedef ");
- print_semantic_function_type (file);
- lf_printf (file, " %sidecode_semantic",
- options.module.global.prefix.l);
- if (word_nr >= 0)
- lf_printf (file, "_%d", word_nr);
- lf_printf (file, "\n(");
- lf_indent (file, +1);
- print_semantic_function_formal (file, word_nr);
- lf_indent (file, -1);
- lf_printf (file, ");\n");
- lf_printf (file, "\n");
- }
- switch (options.gen.code)
- {
- case generate_calls:
- for (semantic = semantics; semantic != NULL; semantic = semantic->next)
- {
- /* Ignore any special/internal instructions */
- if (semantic->insn->nr_words == 0)
- continue;
- print_semantic_declaration (file,
- semantic->insn,
- semantic->expanded_bits,
- semantic->opcodes,
- semantic->nr_prefetched_words);
- }
- break;
- case generate_jumps:
- lf_print__this_file_is_empty (file, "generating jumps");
- break;
- }
-}
-
-
-static void
-gen_semantics_c (lf *file,
- insn_list *semantics,
- cache_entry *cache_rules)
-{
- if (options.gen.code == generate_calls)
- {
- insn_list *semantic;
- print_includes (file);
- print_include (file, options.module.semantics);
- lf_printf (file, "\n");
-
- for (semantic = semantics; semantic != NULL; semantic = semantic->next)
- {
- /* Ignore any special/internal instructions */
- if (semantic->insn->nr_words == 0)
- continue;
- print_semantic_definition (file,
- semantic->insn,
- semantic->expanded_bits,
- semantic->opcodes,
- cache_rules,
- semantic->nr_prefetched_words);
- }
- }
- else
- {
- lf_print__this_file_is_empty (file, "generating jump engine");
- }
-}
-
-
-/****************************************************************/
-
-
-static void
-gen_icache_h (lf *file,
- insn_list *semantic,
- function_entry *functions,
- int max_nr_words)
-{
- int word_nr;
- for (word_nr = 0; word_nr <= max_nr_words; word_nr++)
- {
- lf_printf (file, "typedef ");
- print_icache_function_type(file);
- lf_printf (file, " %sidecode_icache_%d\n(",
- options.module.global.prefix.l,
- word_nr);
- print_icache_function_formal(file, word_nr);
- lf_printf (file, ");\n");
- lf_printf (file, "\n");
- }
- if (options.gen.code == generate_calls
- && options.gen.icache)
- {
- function_entry_traverse (file, functions,
- print_icache_internal_function_declaration,
- NULL);
- while (semantic != NULL)
- {
- print_icache_declaration (file,
- semantic->insn,
- semantic->expanded_bits,
- semantic->opcodes,
- semantic->nr_prefetched_words);
- semantic = semantic->next;
- }
- }
- else
- {
- lf_print__this_file_is_empty (file, "generating jump engine");
- }
-}
-
-static void
-gen_icache_c (lf *file,
- insn_list *semantic,
- function_entry *functions,
- cache_entry *cache_rules)
-{
- /* output `internal' invalid/floating-point unavailable functions
- where needed */
- if (options.gen.code == generate_calls
- && options.gen.icache)
- {
- lf_printf (file, "\n");
- lf_printf (file, "#include \"cpu.h\"\n");
- lf_printf (file, "#include \"idecode.h\"\n");
- lf_printf (file, "#include \"semantics.h\"\n");
- lf_printf (file, "#include \"icache.h\"\n");
- lf_printf (file, "#include \"support.h\"\n");
- lf_printf (file, "\n");
- function_entry_traverse (file, functions,
- print_icache_internal_function_definition,
- NULL);
- lf_printf (file, "\n");
- while (semantic != NULL)
- {
- print_icache_definition (file,
- semantic->insn,
- semantic->expanded_bits,
- semantic->opcodes,
- cache_rules,
- semantic->nr_prefetched_words);
- semantic = semantic->next;
- }
- }
- else
- {
- lf_print__this_file_is_empty (file, "generating jump engine");
- }
-}
-
-
-/****************************************************************/
-
-
-static void
-gen_idecode_h (lf *file,
- gen_table *gen,
- insn_table *insns,
- cache_entry *cache_rules)
-{
- lf_printf (file, "typedef unsigned%d %sinstruction_word;\n",
- options.insn_bit_size, options.module.global.prefix.l);
- if (options.gen.delayed_branch)
- {
- lf_printf (file, "typedef struct _%sinstruction_address {\n",
- options.module.global.prefix.l);
- lf_printf (file, " address_word ip; /* instruction pointer */\n");
- lf_printf (file, " address_word dp; /* delayed-slot pointer */\n");
- lf_printf (file, "} %sinstruction_address;\n", options.module.global.prefix.l);
- }
- else
- {
- lf_printf (file, "typedef address_word %sinstruction_address;\n",
- options.module.global.prefix.l);
-
- }
- if (options.gen.nia == nia_is_invalid
- && strlen (options.module.global.prefix.u) > 0)
- {
- lf_indent_suppress (file);
- lf_printf (file, "#define %sINVALID_INSTRUCTION_ADDRESS ",
- options.module.global.prefix.u);
- lf_printf (file, "INVALID_INSTRUCTION_ADDRESS\n");
- }
- lf_printf (file, "\n");
- print_icache_struct (file, insns, cache_rules);
- lf_printf (file, "\n");
- if (options.gen.icache)
- {
- ERROR ("FIXME - idecode with icache suffering from bit-rot");
- }
- else
- {
- gen_list *entry;
- for (entry = gen->tables; entry != NULL; entry = entry->next)
- {
- print_idecode_issue_function_header (file,
- (options.gen.multi_sim
- ? entry->model->name
- : NULL),
- is_function_declaration,
- 1/*ALWAYS ONE WORD*/);
- }
- if (options.gen.multi_sim)
- {
- print_idecode_issue_function_header (file,
- NULL,
- is_function_variable,
- 1/*ALWAYS ONE WORD*/);
- }
- }
-}
-
-
-static void
-gen_idecode_c (lf *file,
- gen_table *gen,
- insn_table *isa,
- cache_entry *cache_rules)
-{
- /* the intro */
- print_includes (file);
- print_include_inline (file, options.module.semantics);
- lf_printf (file, "\n");
-
- print_idecode_globals (file);
- lf_printf (file, "\n");
-
- switch (options.gen.code)
- {
- case generate_calls:
- {
- gen_list *entry;
- for (entry = gen->tables; entry != NULL; entry = entry->next)
- {
- print_idecode_lookups (file, entry->table, cache_rules);
-
- /* output the main idecode routine */
- if (!options.gen.icache)
- {
- print_idecode_issue_function_header (file,
- (options.gen.multi_sim
- ? entry->model->name
- : NULL),
- 1/*is definition*/,
- 1/*ALWAYS ONE WORD*/);
- lf_printf (file, "{\n");
- lf_indent (file, +2);
- lf_printf (file, "%sinstruction_address nia;\n",
- options.module.global.prefix.l);
- print_idecode_body (file, entry->table, "nia =");
- lf_printf (file, "return nia;");
- lf_indent (file, -2);
- lf_printf (file, "}\n");
- }
- }
- break;
- }
- case generate_jumps:
- {
- lf_print__this_file_is_empty (file, "generating a jump engine");
- break;
- }
- }
-}
-
-
-/****************************************************************/
-
-
-static void
-gen_run_c (lf *file,
- gen_table *gen)
-{
- gen_list *entry;
- lf_printf (file, "#include \"sim-main.h\"\n");
- lf_printf (file, "#include \"engine.h\"\n");
- lf_printf (file, "#include \"idecode.h\"\n");
- lf_printf (file, "#include \"bfd.h\"\n");
- lf_printf (file, "\n");
-
- if (options.gen.multi_sim)
- {
- print_idecode_issue_function_header (file, NULL, is_function_variable, 1);
- lf_printf (file, "\n");
- print_engine_run_function_header (file, NULL, is_function_variable);
- lf_printf (file, "\n");
- }
-
- lf_printf (file, "void\n");
- lf_printf (file, "sim_engine_run (SIM_DESC sd,\n");
- lf_printf (file, " int next_cpu_nr,\n");
- lf_printf (file, " int nr_cpus,\n");
- lf_printf (file, " int siggnal)\n");
- lf_printf (file, "{\n");
- lf_indent (file, +2);
- if (options.gen.multi_sim)
- {
- lf_printf (file, "int mach;\n");
- lf_printf (file, "if (STATE_ARCHITECTURE (sd) == NULL)\n");
- lf_printf (file, " mach = 0;\n");
- lf_printf (file, "else\n");
- lf_printf (file, " mach = STATE_ARCHITECTURE (sd)->mach;\n");
- lf_printf (file, "switch (mach)\n");
- lf_printf (file, " {\n");
- lf_indent (file, +2);
- for (entry = gen->tables; entry != NULL; entry = entry->next)
- {
- if (options.gen.default_model != NULL
- && (strcmp (entry->model->name, options.gen.default_model) == 0
- || strcmp (entry->model->full_name, options.gen.default_model) == 0))
- lf_printf (file, "default:\n");
- lf_printf (file, "case bfd_mach_%s:\n", entry->model->full_name);
- lf_indent (file, +2);
- print_function_name (file,
- "issue",
- NULL, /* format name */
- NULL, /* NO processor */
- NULL, /* expanded bits */
- function_name_prefix_idecode);
- lf_printf (file, " = ");
- print_function_name (file,
- "issue",
- NULL, /* format name */
- entry->model->name,
- NULL, /* expanded bits */
- function_name_prefix_idecode);
- lf_printf (file, ";\n");
- print_function_name (file,
- "run",
- NULL, /* format name */
- NULL, /* NO processor */
- NULL, /* expanded bits */
- function_name_prefix_engine);
- lf_printf (file, " = ");
- print_function_name (file,
- "run",
- NULL, /* format name */
- entry->model->name,
- NULL, /* expanded bits */
- function_name_prefix_engine);
- lf_printf (file, ";\n");
- lf_printf (file, "break;\n");
- lf_indent (file, -2);
- }
- if (options.gen.default_model == NULL)
- {
- lf_printf (file, "default:\n");
- lf_indent (file, +2);
- lf_printf (file, "sim_engine_abort (sd, NULL, NULL_CIA,\n");
- lf_printf (file, " \"sim_engine_run - unknown machine\");\n");
- lf_printf (file, "break;\n");
- lf_indent (file, -2);
- }
- lf_indent (file, -2);
- lf_printf (file, " }\n");
- }
- print_function_name (file,
- "run",
- NULL, /* format name */
- NULL, /* NO processor */
- NULL, /* expanded bits */
- function_name_prefix_engine);
- lf_printf (file, " (sd, next_cpu_nr, nr_cpus, siggnal);\n");
- lf_indent (file, -2);
- lf_printf (file, "}\n");
-}
-
-/****************************************************************/
-
-static gen_table *
-do_gen (insn_table *isa,
- decode_table *decode_rules)
-{
- gen_table *gen;
- if (decode_rules == NULL)
- error (NULL, "Must specify a decode table\n");
- if (isa == NULL)
- error (NULL, "Must specify an instruction table\n");
- if (decode_table_max_word_nr (decode_rules) > 0)
- options.gen.multi_word = decode_table_max_word_nr (decode_rules);
- gen = make_gen_tables (isa, decode_rules);
- gen_tables_expand_insns (gen);
- gen_tables_expand_semantics (gen);
- return gen;
-}
-
-/****************************************************************/
-
-igen_options options;
-
-int
-main (int argc,
- char **argv,
- char **envp)
-{
- cache_entry *cache_rules = NULL;
- lf_file_references file_references = lf_include_references;
- decode_table *decode_rules = NULL;
- insn_table *isa = NULL;
- gen_table *gen = NULL;
- char *real_file_name = NULL;
- int is_header = 0;
- int ch;
- lf *standard_out = lf_open ("-", "stdout", lf_omit_references, lf_is_text, "igen");
-
- INIT_OPTIONS ();
-
- if (argc == 1)
- {
- printf ("Usage:\n");
- printf ("\n");
- printf (" igen <config-opts> ... <input-opts>... <output-opts>...\n");
- printf ("\n");
- printf ("Config options:\n");
- printf ("\n");
- printf (" -B <bit-size>\n");
- printf ("\t Set the number of bits in an instruction (depreciated).\n");
- printf ("\t This option can now be set directly in the instruction table.\n");
- printf ("\n");
- printf (" -D <data-structure>\n");
- printf ("\t Dump the specified data structure to stdout. Valid structures include:\n");
- printf ("\t processor-names - list the names of all the processors (models)\n");
- printf ("\n");
- printf (" -F <filter-list>\n");
- printf ("\t Filter out any instructions with a non-empty flags field that contains\n");
- printf ("\t a flag not listed in the <filter-list>.\n");
- printf ("\n");
- printf (" -H <high-bit>\n");
- printf ("\t Set the number of the high (most significant) instruction bit (depreciated).\n");
- printf ("\t This option can now be set directly in the instruction table.\n");
- printf ("\n");
- printf (" -I <directory>\n");
- printf ("\t Add <directory> to the list of directories searched when opening a file\n");
- printf ("\n");
- printf (" -M <model-list>\n");
- printf ("\t Filter out any instructions that do not support at least one of the listed\n");
- printf ("\t models (An instructions with no model information is considered to support\n");
- printf ("\t all models.).\n");
- printf ("\n");
- printf (" -N <nr-cpus>\n");
- printf ("\t Generate a simulator supporting <nr-cpus>\n");
- printf ("\t Specify `-N 0' to disable generation of the SMP. Specifying `-N 1' will\n");
- printf ("\t still generate an SMP enabled simulator but will only support one CPU.\n");
- printf ("\n");
- printf (" -T <mechanism>\n");
- printf ("\t Override the decode mechanism specified by the decode rules\n");
- printf ("\n");
- printf (" -P <prefix>\n");
- printf ("\t Prepend global names (except itable) with the string <prefix>.\n");
- printf ("\t Specify -P <module>=<prefix> to set a specific <module>'s prefix.\n");
- printf ("\n");
- printf (" -S <suffix>\n");
- printf ("\t Replace a global name (suffix) (except itable) with the string <suffix>.\n");
- printf ("\t Specify -S <module>=<suffix> to change a specific <module>'s name (suffix).\n");
- printf ("\n");
- printf (" -Werror\n");
- printf ("\t Make warnings errors\n");
- printf (" -Wnodiscard\n");
- printf ("\t Suppress warnings about discarded functions and instructions\n");
- printf (" -Wnowidth\n");
- printf ("\t Suppress warnings about instructions with invalid widths\n");
- printf (" -Wnounimplemented\n");
- printf ("\t Suppress warnings about unimplemented instructions\n");
- printf ("\n");
- printf (" -G [!]<gen-option>\n");
- printf ("\t Any of the following options:\n");
- printf ("\n");
- printf ("\t decode-duplicate - Override the decode rules, forcing the duplication of\n");
- printf ("\t semantic functions\n");
- printf ("\t decode-combine - Combine any duplicated entries within a table\n");
- printf ("\t decode-zero-reserved - Override the decode rules, forcing reserved bits to be\n");
- printf ("\t treated as zero.\n");
- printf ("\t decode-switch-is-goto - Overfide the padded-switch code type as a goto-switch\n");
- printf ("\n");
- printf ("\t gen-conditional-issue - conditionally issue each instruction\n");
- printf ("\t gen-delayed-branch - need both cia and nia passed around\n");
- printf ("\t gen-direct-access - use #defines to directly access values\n");
- printf ("\t gen-zero-r<N> - arch assumes GPR(<N>) == 0, keep it that way\n");
- printf ("\t gen-icache[=<N> - generate an instruction cracking cache of size <N>\n");
- printf ("\t Default size is %d\n", options.gen.icache_size);
- printf ("\t gen-insn-in-icache - save original instruction when cracking\n");
- printf ("\t gen-multi-sim[=MODEL] - generate multiple simulators - one per model\n");
- printf ("\t If specified MODEL is made the default architecture.\n");
- printf ("\t By default, a single simulator that will\n");
- printf ("\t execute any instruction is generated\n");
- printf ("\t gen-multi-word - generate code allowing for multi-word insns\n");
- printf ("\t gen-semantic-icache - include semantic code in cracking functions\n");
- printf ("\t gen-slot-verification - perform slot verification as part of decode\n");
- printf ("\t gen-nia-invalid - NIA defaults to nia_invalid\n");
- printf ("\t gen-nia-void - do not compute/return NIA\n");
- printf ("\n");
- printf ("\t trace-combine - report combined entries a rule application\n");
- printf ("\t trace-entries - report entries after a rules application\n");
- printf ("\t trace-rule-rejection - report each rule as rejected\n");
- printf ("\t trace-rule-selection - report each rule as selected\n");
- printf ("\t trace-insn-insertion - report each instruction as it is inserted into a decode table\n");
- printf ("\t trace-rule-expansion - report each instruction as it is expanded (before insertion into a decode table)\n");
- printf ("\t trace-all - enable all trace options\n");
- printf ("\n");
- printf ("\t field-widths - instruction formats specify widths (depreciated)\n");
- printf ("\t By default, an instruction format specifies bit\n");
- printf ("\t positions\n");
- printf ("\t This option can now be set directly in the\n");
- printf ("\t instruction table\n");
- printf ("\t jumps - use jumps instead of function calls\n");
- printf ("\t omit-line-numbers - do not include line number information in the output\n");
- printf ("\n");
- printf ("Input options:\n");
- printf ("\n");
- printf (" -k <cache-rules> (depreciated)\n");
- printf (" -o <decode-rules>\n");
- printf (" -i <instruction-table>\n");
- printf ("\n");
- printf ("Output options:\n");
- printf ("\n");
- printf (" -x Perform expansion (required)\n");
- printf (" -n <real-name> Specify the real name of the next output file\n");
- printf (" -h Generate the header (.h) file rather than the body (.c)\n");
- printf (" -c <output-file> output icache\n");
- printf (" -d <output-file> output idecode\n");
- printf (" -e <output-file> output engine\n");
- printf (" -f <output-file> output support functions\n");
- printf (" -m <output-file> output model\n");
- printf (" -r <output-file> output multi-sim run\n");
- printf (" -s <output-file> output schematic\n");
- printf (" -t <output-file> output itable\n");
- }
-
- while ((ch = getopt(argc, argv,
- "B:D:F:G:H:I:M:N:P:T:W:o:k:i:n:hc:d:e:m:r:s:t:f:x"))
- != -1)
- {
- fprintf (stderr, " -%c ", ch);
- if (optarg)
- fprintf (stderr, "%s ", optarg);
- fprintf (stderr, "\\\n");
-
- switch(ch)
- {
-
- case 'M':
- filter_parse (&options.model_filter, optarg);
- break;
-
- case 'D':
- if (strcmp (optarg, "processor-names"))
- {
- char *processor;
- for (processor = filter_next (options.model_filter, "");
- processor != NULL;
- processor = filter_next (options.model_filter, processor))
- lf_printf (standard_out, "%s\n", processor);
- }
- else
- error (NULL, "Unknown data structure %s, not dumped\n", optarg);
- break;
-
- case 'F':
- filter_parse (&options.flags_filter, optarg);
- break;
-
- case 'I':
- {
- table_include **dir = &options.include;
- while ((*dir) != NULL)
- dir = &(*dir)->next;
- (*dir) = ZALLOC (table_include);
- (*dir)->dir = strdup (optarg);
- }
- break;
-
- case 'B':
- options.insn_bit_size = a2i (optarg);
- if (options.insn_bit_size <= 0
- || options.insn_bit_size > max_insn_bit_size)
- {
- error (NULL, "Instruction bitsize must be in range 1..%d\n",
- max_insn_bit_size);
- }
- if (options.hi_bit_nr != options.insn_bit_size - 1
- && options.hi_bit_nr != 0)
- {
- error (NULL, "Conflict betweem hi-bit-nr and insn-bit-size\n");
- }
- break;
-
- case 'H':
- options.hi_bit_nr = a2i (optarg);
- if (options.hi_bit_nr != options.insn_bit_size - 1
- && options.hi_bit_nr != 0)
- {
- error (NULL, "Conflict between hi-bit-nr and insn-bit-size\n");
- }
- break;
-
- case 'N':
- options.gen.smp = a2i (optarg);
- break;
-
- case 'P':
- case 'S':
- {
- igen_module *names;
- igen_name *name;
- char *chp;
- chp = strchr (optarg, '=');
- if (chp == NULL)
- {
- names = &options.module.global;
- chp = optarg;
- }
- else
- {
- chp = chp + 1; /* skip `=' */
- names = NULL;
- if (strncmp (optarg, "global=", chp - optarg) == 0)
- {
- names = &options.module.global;
- }
- if (strncmp (optarg, "engine=", chp - optarg) == 0)
- {
- names = &options.module.engine;
- }
- if (strncmp (optarg, "icache=", chp - optarg) == 0)
- {
- names = &options.module.icache;
- }
- if (strncmp (optarg, "idecode=", chp - optarg) == 0)
- {
- names = &options.module.idecode;
- }
- if (strncmp (optarg, "itable=", chp - optarg) == 0)
- {
- names = &options.module.itable;
- }
- if (strncmp (optarg, "semantics=", chp - optarg) == 0)
- {
- names = &options.module.semantics;
- }
- if (strncmp (optarg, "support=", chp - optarg) == 0)
- {
- names = &options.module.support;
- }
- if (names == NULL)
- {
- error (NULL, "Prefix `%s' unreconized\n", optarg);
- }
- }
- switch (ch)
- {
- case 'P':
- name = &names->prefix;
- break;
- case 'S':
- name = &names->suffix;
- break;
- }
- name->u = strdup (chp);
- name->l = strdup (chp);
- chp = name->u;
- while (*chp) {
- if (islower(*chp))
- *chp = toupper(*chp);
- chp++;
- }
- if (name == &options.module.global.prefix)
- {
- options.module.engine.prefix = options.module.global.prefix;
- options.module.icache.prefix = options.module.global.prefix;
- options.module.idecode.prefix = options.module.global.prefix;
- /* options.module.itable.prefix = options.module.global.prefix; */
- options.module.semantics.prefix = options.module.global.prefix;
- options.module.support.prefix = options.module.global.prefix;
- }
- if (name == &options.module.global.suffix)
- {
- options.module.engine.suffix = options.module.global.suffix;
- options.module.icache.suffix = options.module.global.suffix;
- options.module.idecode.suffix = options.module.global.suffix;
- /* options.module.itable.suffix = options.module.global.suffix; */
- options.module.semantics.suffix = options.module.global.suffix;
- options.module.support.suffix = options.module.global.suffix;
- }
- break;
- }
-
- case 'W':
- {
- if (strcmp (optarg, "error") == 0)
- options.warning = error;
- else if (strcmp (optarg, "nodiscard") == 0)
- options.warn.discard = 0;
- else if (strcmp (optarg, "discard") == 0)
- options.warn.discard = 1;
- else if (strcmp (optarg, "nowidth") == 0)
- options.warn.width = 0;
- else if (strcmp (optarg, "width") == 0)
- options.warn.width = 1;
- else if (strcmp (optarg, "nounimplemented") == 0)
- options.warn.unimplemented = 0;
- else if (strcmp (optarg, "unimplemented") == 0)
- options.warn.unimplemented = 1;
- else
- error (NULL, "Unknown -W argument `%s'\n", optarg);
- break;
- }
-
-
- case 'G':
- {
- int enable_p;
- char *argp;
- if (strncmp (optarg, "no-", strlen ("no-")) == 0)
- {
- argp = optarg + strlen ("no-");
- enable_p = 0;
- }
- else if (strncmp (optarg, "!", strlen ("!")) == 0)
- {
- argp = optarg + strlen ("no-");
- enable_p = 0;
- }
- else
- {
- argp = optarg;
- enable_p = 1;
- }
- if (strcmp (argp, "decode-duplicate") == 0)
- {
- options.decode.duplicate = enable_p;
- }
- else if (strcmp (argp, "decode-combine") == 0)
- {
- options.decode.combine = enable_p;
- }
- else if (strcmp (argp, "decode-zero-reserved") == 0)
- {
- options.decode.zero_reserved = enable_p;
- }
-
- else if (strcmp (argp, "gen-conditional-issue") == 0)
- {
- options.gen.conditional_issue = enable_p;
- }
- else if (strcmp (argp, "conditional-issue") == 0)
- {
- options.gen.conditional_issue = enable_p;
- options.warning (NULL, "Option conditional-issue replaced by gen-conditional-issue\n");
- }
- else if (strcmp (argp, "gen-delayed-branch") == 0)
- {
- options.gen.delayed_branch = enable_p;
- }
- else if (strcmp (argp, "delayed-branch") == 0)
- {
- options.gen.delayed_branch = enable_p;
- options.warning (NULL, "Option delayed-branch replaced by gen-delayed-branch\n");
- }
- else if (strcmp (argp, "gen-direct-access") == 0)
- {
- options.gen.direct_access = enable_p;
- }
- else if (strcmp (argp, "direct-access") == 0)
- {
- options.gen.direct_access = enable_p;
- options.warning (NULL, "Option direct-access replaced by gen-direct-access\n");
- }
- else if (strncmp (argp, "gen-zero-r", strlen ("gen-zero-r")) == 0)
- {
- options.gen.zero_reg = enable_p;
- options.gen.zero_reg_nr = atoi (argp + strlen ("gen-zero-r"));
- }
- else if (strncmp (argp, "zero-r", strlen ("zero-r")) == 0)
- {
- options.gen.zero_reg = enable_p;
- options.gen.zero_reg_nr = atoi (argp + strlen ("zero-r"));
- options.warning (NULL, "Option zero-r<N> replaced by gen-zero-r<N>\n");
- }
- else if (strncmp (argp, "gen-icache", strlen ("gen-icache")) == 0)
- {
- switch (argp[strlen ("gen-icache")])
- {
- case '=':
- options.gen.icache_size = atoi (argp + strlen ("gen-icache") + 1);
- options.gen.icache = enable_p;
- break;
- case '\0':
- options.gen.icache = enable_p;
- break;
- default:
- error (NULL, "Expecting -Ggen-icache or -Ggen-icache=<N>\n");
- }
- }
- else if (strcmp (argp, "gen-insn-in-icache") == 0)
- {
- options.gen.insn_in_icache = enable_p;
- }
- else if (strncmp (argp, "gen-multi-sim", strlen ("gen-multi-sim")) == 0)
- {
- char *arg = &argp[strlen ("gen-multi-sim")];
- switch (arg[0])
- {
- case '=':
- options.gen.multi_sim = enable_p;
- options.gen.default_model = arg + 1;
- if (! filter_is_member (options.model_filter, options.gen.default_model))
- error (NULL, "multi-sim model %s unknown\n", options.gen.default_model);
- break;
- case '\0':
- options.gen.multi_sim = enable_p;
- options.gen.default_model = NULL;
- break;
- default:
- error (NULL, "Expecting -Ggen-multi-sim or -Ggen-multi-sim=<MODEL>\n");
- break;
- }
- }
- else if (strcmp (argp, "gen-multi-word") == 0)
- {
- options.gen.multi_word = enable_p;
- }
- else if (strcmp (argp, "gen-semantic-icache") == 0)
- {
- options.gen.semantic_icache = enable_p;
- }
- else if (strcmp (argp, "gen-slot-verification") == 0)
- {
- options.gen.slot_verification = enable_p;
- }
- else if (strcmp (argp, "verify-slot") == 0)
- {
- options.gen.slot_verification = enable_p;
- options.warning (NULL, "Option verify-slot replaced by gen-slot-verification\n");
- }
- else if (strcmp (argp, "gen-nia-invalid") == 0)
- {
- options.gen.nia = nia_is_invalid;
- }
- else if (strcmp (argp, "default-nia-minus-one") == 0)
- {
- options.gen.nia = nia_is_invalid;
- options.warning (NULL, "Option default-nia-minus-one replaced by gen-nia-invalid\n");
- }
- else if (strcmp (argp, "gen-nia-void") == 0)
- {
- options.gen.nia = nia_is_void;
- }
- else if (strcmp (argp, "trace-all") == 0)
- {
- memset (&options.trace, enable_p, sizeof (options.trace));
- }
- else if (strcmp (argp, "trace-combine") == 0)
- {
- options.trace.combine = enable_p;
- }
- else if (strcmp (argp, "trace-entries") == 0)
- {
- options.trace.entries = enable_p;
- }
- else if (strcmp (argp, "trace-rule-rejection") == 0)
- {
- options.trace.rule_rejection = enable_p;
- }
- else if (strcmp (argp, "trace-rule-selection") == 0)
- {
- options.trace.rule_selection = enable_p;
- }
- else if (strcmp (argp, "trace-insn-insertion") == 0)
- {
- options.trace.insn_insertion = enable_p;
- }
- else if (strcmp (argp, "trace-insn-expansion") == 0)
- {
- options.trace.insn_expansion = enable_p;
- }
- else if (strcmp (argp, "jumps") == 0)
- {
- options.gen.code = generate_jumps;
- }
- else if (strcmp (argp, "field-widths") == 0)
- {
- options.insn_specifying_widths = enable_p;
- }
- else if (strcmp (argp, "omit-line-numbers") == 0)
- {
- file_references = lf_omit_references;
- }
- else
- {
- error (NULL, "Unknown option %s\n", optarg);
- }
- break;
- }
-
- case 'i':
- isa = load_insn_table (optarg, cache_rules);
- if (isa->illegal_insn == NULL)
- error (NULL, "illegal-instruction missing from insn table\n");
- break;
-
- case 'x':
- gen = do_gen (isa, decode_rules);
- break;
-
- case 'o':
- decode_rules = load_decode_table (optarg);
- break;
-
- case 'k':
- if (isa != NULL)
- error (NULL, "Cache file must appear before the insn file\n");
- cache_rules = load_cache_table (optarg);
- break;
-
- case 'n':
- real_file_name = strdup(optarg);
- break;
-
- case 'h':
- is_header = 1;
- break;
-
- case 'c':
- case 'd':
- case 'e':
- case 'f':
- case 'm':
- case 'r':
- case 's':
- case 't':
- {
- lf *file = lf_open(optarg, real_file_name, file_references,
- (is_header ? lf_is_h : lf_is_c),
- argv[0]);
- if (gen == NULL && ch != 't' && ch != 'm' && ch != 'f')
- {
- options.warning (NULL, "Explicitly generate tables with -x option\n");
- gen = do_gen (isa, decode_rules);
- }
- lf_print__file_start(file);
- switch (ch)
- {
- case 'm':
- if (is_header)
- gen_model_h (file, isa);
- else
- gen_model_c (file, isa);
- break;
- case 't':
- if (is_header)
- gen_itable_h (file, isa);
- else
- gen_itable_c (file, isa);
- break;
- case 'f':
- if (is_header)
- gen_support_h (file, isa);
- else
- gen_support_c (file, isa);
- break;
- case 'r':
- if (is_header)
- options.warning (NULL, "-hr option ignored\n");
- else
- gen_run_c (file, gen);
- break;
- case 's':
- if(is_header)
- gen_semantics_h (file, gen->semantics, isa->max_nr_words);
- else
- gen_semantics_c (file, gen->semantics, isa->caches);
- break;
- case 'd':
- if (is_header)
- gen_idecode_h (file, gen, isa, cache_rules);
- else
- gen_idecode_c (file, gen, isa, cache_rules);
- break;
- case 'e':
- if (is_header)
- gen_engine_h (file, gen, isa, cache_rules);
- else
- gen_engine_c (file, gen, isa, cache_rules);
- break;
- case 'c':
- if (is_header)
- gen_icache_h (file,
- gen->semantics,
- isa->functions,
- isa->max_nr_words);
- else
- gen_icache_c (file,
- gen->semantics,
- isa->functions,
- cache_rules);
- break;
- }
- lf_print__file_finish(file);
- lf_close(file);
- is_header = 0;
- }
- real_file_name = NULL;
- break;
- default:
- ERROR ("Bad switch");
- }
- }
- return (0);
-}
diff --git a/sim/igen/igen.h b/sim/igen/igen.h
deleted file mode 100644
index bdfdb833ef5..00000000000
--- a/sim/igen/igen.h
+++ /dev/null
@@ -1,234 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1998, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-/* code-generation options: */
-
-typedef enum {
-
- /* Transfer control to an instructions semantic code using the the
- standard call/return mechanism */
-
- generate_calls,
-
- /* Transfer control to an instructions semantic code using
- (computed) goto's instead of the more conventional call/return
- mechanism */
-
- generate_jumps,
-
-} igen_code;
-
-typedef enum {
- nia_is_cia_plus_one,
- nia_is_void,
- nia_is_invalid,
-} igen_nia;
-
-
-
-typedef struct _igen_gen_options igen_gen_options;
-struct _igen_gen_options {
- int direct_access;
- int semantic_icache;
- int insn_in_icache;
- int conditional_issue;
- int slot_verification;
- int delayed_branch;
-
- /* If zeroing a register, which one? */
- int zero_reg;
- int zero_reg_nr;
-
- /* should multiple simulators be generated? */
- int multi_sim;
-
- /* name of the default multi-sim model */
- char *default_model;
-
- /* should the simulator support multi word instructions and if so,
- what is the max nr of words. */
- int multi_word;
-
- /* SMP? Should the generated code include SMP support (>0) and if
- so, for how many processors? */
- int smp;
-
- /* how should the next instruction address be computed? */
- igen_nia nia;
-
- /* nr of instructions in the decoded instruction cache */
- int icache;
- int icache_size;
-
- /* see above */
- igen_code code;
-};
-
-
-typedef struct _igen_trace_options igen_trace_options;
-struct _igen_trace_options {
- int rule_selection;
- int rule_rejection;
- int insn_insertion;
- int insn_expansion;
- int entries;
- int combine;
-};
-
-typedef struct _igen_name {
- char *u;
- char *l;
-} igen_name;
-typedef struct _igen_module {
- igen_name prefix;
- igen_name suffix;
-} igen_module;
-
-typedef struct _igen_module_options {
- igen_module global;
- igen_module engine;
- igen_module icache;
- igen_module idecode;
- igen_module itable;
- igen_module semantics;
- igen_module support;
-} igen_module_options;
-
-typedef struct _igen_decode_options igen_decode_options ;
-struct _igen_decode_options {
-
- /* Combine tables? Should the generator make a second pass through
- each generated table looking for any sub-entries that contain the
- same instructions. Those entries being merged into a single
- table */
- int combine;
-
- /* Instruction expansion? Should the semantic code for each
- instruction, when the oportunity arrises, be expanded according
- to the variable opcode files that the instruction decode process
- renders constant */
- int duplicate;
-
- /* Treat reserved fields as constant (zero) instead of ignoring
- their value when determining decode tables */
- int zero_reserved;
-
- /* Convert any padded switch rules into goto_switch */
- int switch_as_goto;
-
- /* Force all tables to be generated with this lookup mechanism */
- char *overriding_gen;
-};
-
-
-typedef struct _igen_warn_options igen_warn_options;
-struct _igen_warn_options {
-
- /* Issue warning about discarded instructions */
- int discard;
-
- /* Issue warning about invalid instruction widths */
- int width;
-
- /* Issue warning about unimplemented instructions */
- int unimplemented;
-
-};
-
-
-
-typedef struct _igen_options igen_options;
-struct _igen_options {
-
- /* What does the instruction look like - bit ordering, size, widths or
- offesets */
- int hi_bit_nr;
- int insn_bit_size;
- int insn_specifying_widths;
-
- /* what should global names be prefixed with? */
- igen_module_options module;
-
- /* See above for options and flags */
- igen_gen_options gen;
-
- /* See above for trace options */
- igen_trace_options trace;
-
- /* See above for include options */
- table_include *include;
-
- /* See above for decode options */
- igen_decode_options decode;
-
- /* Filter set to be used on the flag field of the instruction table */
- filter *flags_filter;
-
- /* See above for warn options */
- igen_warn_options warn;
-
- /* Be more picky about the input */
- error_func (*warning);
-
- /* Model (processor) set - like flags_filter. Used to select the
- specific ISA within a processor family. */
- filter *model_filter;
-
- /* Format name set */
- filter *format_name_filter;
-};
-
-extern igen_options options;
-
-/* default options - hopefully backward compatible */ \
-#define INIT_OPTIONS() \
-do { \
- memset (&options, 0, sizeof options); \
- memset (&options.warn, -1, sizeof (options.warn)); \
- options.hi_bit_nr = 0; \
- options.insn_bit_size = default_insn_bit_size; \
- options.insn_specifying_widths = 0; \
- options.module.global.prefix.u = ""; \
- options.module.global.prefix.l = ""; \
- /* the prefixes */ \
- options.module.engine = options.module.global; \
- options.module.icache = options.module.global; \
- options.module.idecode = options.module.global; \
- options.module.itable = options.module.global; \
- options.module.semantics = options.module.global; \
- options.module.support = options.module.global; \
- /* the suffixes */ \
- options.module.engine.suffix.l = "engine"; \
- options.module.engine.suffix.u = "ENGINE"; \
- options.module.icache.suffix.l = "icache"; \
- options.module.icache.suffix.u = "ICACHE"; \
- options.module.idecode.suffix.l = "idecode"; \
- options.module.idecode.suffix.u = "IDECODE"; \
- options.module.itable.suffix.l = "itable"; \
- options.module.itable.suffix.u = "ITABLE"; \
- options.module.semantics.suffix.l = "semantics"; \
- options.module.semantics.suffix.u = "SEMANTICS"; \
- options.module.support.suffix.l = "support"; \
- options.module.support.suffix.u = "SUPPORT"; \
- /* misc stuff */ \
- options.gen.code = generate_calls; \
- options.gen.icache_size = 1024; \
- options.warning = warning; \
-} while (0)
diff --git a/sim/igen/ld-cache.c b/sim/igen/ld-cache.c
deleted file mode 100644
index 63bd111ac2e..00000000000
--- a/sim/igen/ld-cache.c
+++ /dev/null
@@ -1,114 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994,1995,1996, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-#include "misc.h"
-#include "lf.h"
-#include "table.h"
-#include "filter.h"
-#include "igen.h"
-
-#include "ld-insn.h"
-#include "ld-cache.h"
-
-#ifndef NULL
-#define NULL 0
-#endif
-
-
-enum {
- ca_type,
- ca_field_name,
- ca_derived_name,
- ca_type_def,
- ca_expression,
- nr_cache_rule_fields,
-};
-
-static const name_map cache_type_map[] = {
- { "cache", cache_value },
- { "compute", compute_value },
- { "scratch", scratch_value },
- { NULL, 0 },
-};
-
-
-cache_entry *
-load_cache_table (char *file_name)
-{
- cache_entry *cache = NULL;
- cache_entry **last = &cache;
- table *file = table_open (file_name);
- table_entry *entry;
- while ((entry = table_read (file)) != NULL)
- {
- cache_entry *new_rule = ZALLOC (cache_entry);
- new_rule->line = entry->line;
- new_rule->entry_type = name2i (entry->field[ca_type], cache_type_map);
- new_rule->name = entry->field[ca_derived_name];
- filter_parse (&new_rule->original_fields,
- entry->field[ca_field_name]);
- new_rule->type = entry->field[ca_type_def];
- /* expression is the concatenation of the remaining fields */
- if (entry->nr_fields > ca_expression)
- {
- int len = 0;
- int chi;
- for (chi = ca_expression; chi < entry->nr_fields; chi++)
- {
- len += strlen (" : ") + strlen (entry->field[chi]);
- }
- new_rule->expression = NZALLOC (char, len);
- strcpy (new_rule->expression, entry->field[ca_expression]);
- for (chi = ca_expression + 1; chi < entry->nr_fields; chi++)
- {
- strcat (new_rule->expression, " : ");
- strcat (new_rule->expression, entry->field[chi]);
- }
- }
- /* insert it */
- *last = new_rule;
- last = &new_rule->next;
- }
- return cache;
-}
-
-
-
-#ifdef MAIN
-
-igen_options options;
-
-int
-main(int argc, char **argv)
-{
- cache_entry *rules = NULL;
- lf *l;
-
- if (argc != 2)
- error (NULL, "Usage: cache <cache-file>\n");
-
- rules = load_cache_table (argv[1]);
- l = lf_open ("-", "stdout", lf_omit_references, lf_is_text, "tmp-ld-insn");
- dump_cache_entries (l, "(", rules, ")\n");
-
- return 0;
-}
-#endif
diff --git a/sim/igen/ld-cache.h b/sim/igen/ld-cache.h
deleted file mode 100644
index fb81e6a3b39..00000000000
--- a/sim/igen/ld-cache.h
+++ /dev/null
@@ -1,66 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994,1995,1996, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-
-/* For backward compatibility only - load a standalone cache macro table */
-
-/* Instruction unpacking:
-
- Once the instruction has been decoded, the register (and other)
- fields within the instruction need to be extracted.
-
- The table that follows determines how each field should be treated.
- Importantly it considers the case where the extracted field is to
- be used immediatly or stored in an instruction cache.
-
- <type>
-
- Indicates what to do with the cache entry. If a cache is to be
- used. SCRATCH and CACHE values are defined when a cache entry is
- being filled while CACHE and COMPUTE values are defined in the
- semantic code.
-
- Zero marks the end of the table. More importantly 1. indicates
- that the entry is valid and can be cached. 2. indicates that that
- the entry is valid but can not be cached.
-
- <field_name>
-
- The field name as given in the instruction spec.
-
- <derived_name>
-
- A new name for <field_name> once it has been extracted from the
- instruction (and possibly stored in the instruction cache).
-
- <type>
-
- String specifying the storage type for <new_name> (the extracted
- field>.
-
- <expression>
-
- Specifies how to get <new_name> from <old_name>. If null, old and
- new name had better be the same. */
-
-
-extern cache_entry *load_cache_table
-(char *file_name);
diff --git a/sim/igen/ld-decode.c b/sim/igen/ld-decode.c
deleted file mode 100644
index baea404d5a9..00000000000
--- a/sim/igen/ld-decode.c
+++ /dev/null
@@ -1,404 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994,1995,1996, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-/* load the opcode stat structure */
-
-#include "misc.h"
-#include "lf.h"
-#include "table.h"
-#include "filter.h"
-
-#include "igen.h"
-
-#include "ld-decode.h"
-
-#ifndef NULL
-#define NULL 0
-#endif
-
-
-static const name_map decode_type_map[] = {
- { "normal", normal_decode_rule },
- { "boolean", boolean_rule },
- { NULL, normal_decode_rule },
-};
-
-static const name_map decode_gen_map[] = {
- { "array", array_gen },
- { "switch", switch_gen },
- { "padded-switch", padded_switch_gen },
- { "goto-switch", goto_switch_gen },
- { NULL, -1 },
-};
-
-static const name_map decode_reserved_map[] = {
- { "zero-reserved", 1 },
- { NULL, 0 },
-};
-
-static const name_map decode_duplicates_map[] = {
- { "duplicate", 1 },
- { NULL, 0 },
-};
-
-static const name_map decode_combine_map[] = {
- { "combine", 1 },
- { NULL, 0 },
-};
-
-static const name_map decode_search_map[] = {
- { "constants", decode_find_constants },
- { "mixed", decode_find_mixed },
- { "strings", decode_find_strings },
- { NULL, decode_find_mixed },
-};
-
-
-static void
-set_bits (int bit[max_insn_bit_size],
- unsigned64 value)
-{
- int bit_nr;
- for (bit_nr = 0; bit_nr < max_insn_bit_size; bit_nr++)
- {
- if (bit_nr < options.insn_bit_size)
- bit[bit_nr] = (value >> (options.insn_bit_size - bit_nr - 1)) & 1;
- else
- bit[bit_nr] = 0;
- }
-}
-
-decode_table *
-load_decode_table(char *file_name)
-{
- table *file = table_open (file_name);
- table_entry *entry;
- decode_table *table = NULL;
- decode_table **curr_rule = &table;
- while ((entry = table_read (file)) != NULL)
- {
- char *decode_options = entry->field[decode_options_field];
- decode_table *new_rule = ZALLOC (decode_table);
- if (entry->nr_fields < min_nr_decode_fields)
- error (entry->line, "Missing decode table fields\n");
- new_rule->line = entry->line;
-
- /* the options field */
- new_rule->type = name2i (decode_options, decode_type_map);
- if (options.decode.overriding_gen != NULL)
- new_rule->gen = name2i (options.decode.overriding_gen, decode_gen_map);
- else
- new_rule->gen = name2i (decode_options, decode_gen_map);
- if (new_rule->gen == padded_switch_gen
- && options.decode.switch_as_goto)
- new_rule->gen = goto_switch_gen;
- if (options.decode.zero_reserved)
- new_rule->with_zero_reserved = 1;
- else
- new_rule->with_zero_reserved = name2i (decode_options, decode_reserved_map);
- if (options.decode.duplicate)
- new_rule->with_duplicates = 1;
- else
- new_rule->with_duplicates = name2i (decode_options, decode_duplicates_map);
- if (options.decode.combine)
- new_rule->with_combine = 1;
- else
- new_rule->with_combine = name2i (decode_options, decode_combine_map);
- if (new_rule->type == boolean_rule)
- {
- char *chp = decode_options;
- while (*chp != '\0')
- {
- if (isdigit (*chp))
- {
- new_rule->constant = a2i (chp);
- break;
- }
- chp = skip_to_separator (chp, ",");
- chp = skip_spaces (chp);
- }
- }
-
- /* First and last */
- if (entry->nr_fields > decode_first_field
- && strlen (entry->field[decode_first_field]) > 0)
- {
- new_rule->first = target_a2i (options.hi_bit_nr,
- entry->field[decode_first_field]);
- if (new_rule->first < 0 || new_rule->first >= options.insn_bit_size)
- error (new_rule->line, "First field out of range\n");
- }
- else
- new_rule->first = 0;
- if (entry->nr_fields > decode_last_field
- && strlen (entry->field[decode_last_field]) > 0)
- {
- new_rule->last = target_a2i (options.hi_bit_nr,
- entry->field[decode_last_field]);
- if (new_rule->last < 0 || new_rule->last >= options.insn_bit_size)
- error (new_rule->line, "Last field out of range\n");
- }
- else
- new_rule->last = options.insn_bit_size - 1;
- if (new_rule->first > new_rule->last)
- error (new_rule->line, "First must preceed last\n");
-
- /* force first/last, with default values based on first/last */
- if (entry->nr_fields > decode_force_first_field
- && strlen (entry->field[decode_force_first_field]) > 0)
- {
- new_rule->force_first = target_a2i (options.hi_bit_nr,
- entry->field[decode_force_first_field]);
- if (new_rule->force_first < new_rule->first
- || new_rule->force_first > new_rule->last + 1)
- error (new_rule->line, "Force first out of range\n");
- }
- else
- new_rule->force_first = new_rule->last + 1;
- if (entry->nr_fields > decode_force_last_field
- && strlen (entry->field[decode_force_last_field]) > 0)
- {
- new_rule->force_last = target_a2i (options.hi_bit_nr,
- entry->field[decode_force_last_field]);
- if (new_rule->force_last > new_rule->last
- || new_rule->force_last < new_rule->first - 1)
- error (new_rule->line, "Force-last out of range\n");
- }
- else
- new_rule->force_last = new_rule->first - 1;
-
- /* fields to be treated as constant */
- if (entry->nr_fields > decode_constant_field_names_field)
- filter_parse (&new_rule->constant_field_names,
- entry->field[decode_constant_field_names_field]);
-
- /* applicable word nr */
- if (entry->nr_fields > decode_word_nr_field)
- new_rule->word_nr = a2i (entry->field[decode_word_nr_field]);
-
- /* required instruction format names */
- if (entry->nr_fields > decode_format_names_field)
- filter_parse (&new_rule->format_names,
- entry->field[decode_format_names_field]);
-
- /* required processor models */
- if (entry->nr_fields > decode_model_names_field)
- filter_parse (&new_rule->model_names,
- entry->field[decode_model_names_field]);
-
- /* required paths */
- if (entry->nr_fields > decode_paths_field
- && strlen (entry->field[decode_paths_field]) > 0)
- {
- decode_path_list **last = &new_rule->paths;
- char *chp = entry->field[decode_paths_field];
- do
- {
- (*last) = ZALLOC (decode_path_list);
- /* extra root/zero entry */
- (*last)->path = ZALLOC (decode_path);
- do
- {
- decode_path *entry = ZALLOC (decode_path);
- entry->opcode_nr = a2i (chp);
- entry->parent = (*last)->path;
- (*last)->path = entry;
- chp = skip_digits (chp);
- chp = skip_spaces (chp);
- }
- while (*chp == '.');
- last = &(*last)->next;
- }
- while (*chp == ',');
- if (*chp != '\0')
- error (entry->line, "Invalid path field\n");
- }
-
- /* collect up the list of optional special conditions applicable
- to the rule */
- {
- int field_nr = nr_decode_fields;
- while (entry->nr_fields > field_nr)
- {
- decode_cond *cond = ZALLOC (decode_cond);
- decode_cond **last;
- if (entry->nr_fields > field_nr + decode_cond_mask_field)
- set_bits (cond->mask, a2i (entry->field[field_nr + decode_cond_mask_field]));
- if (entry->nr_fields > field_nr + decode_cond_value_field)
- {
- if (entry->field[field_nr + decode_cond_value_field][0] == '!')
- {
- cond->is_equal = 0;
- set_bits (cond->value, a2i (entry->field[field_nr + decode_cond_value_field] + 1));
- }
- else
- {
- cond->is_equal = 1;
- set_bits (cond->value, a2i (entry->field[field_nr + decode_cond_value_field]));
- }
- }
- if (entry->nr_fields > field_nr + decode_cond_word_nr_field)
- cond->word_nr = a2i (entry->field[field_nr + decode_cond_word_nr_field]);
- field_nr += nr_decode_cond_fields;
- /* insert it */
- last = &new_rule->conditions;
- while (*last != NULL)
- last = &(*last)->next;
- *last = cond;
- }
- }
- *curr_rule = new_rule;
- curr_rule = &new_rule->next;
- }
- return table;
-}
-
-
-int
-decode_table_max_word_nr (decode_table *entry)
-{
- int max_word_nr = 0;
- while (entry != NULL)
- {
- decode_cond *cond;
- if (entry->word_nr > max_word_nr)
- max_word_nr = entry->word_nr;
- for (cond = entry->conditions; cond != NULL; cond = cond->next)
- {
- if (cond->word_nr > max_word_nr)
- max_word_nr = cond->word_nr;
- }
- entry = entry->next;
- }
- return max_word_nr;
-}
-
-
-
-static void
-dump_decode_cond (lf *file,
- char *prefix,
- decode_cond *cond,
- char *suffix)
-{
- lf_printf (file, "%s(decode_cond *) 0x%lx", prefix, (long) cond);
- if (cond != NULL)
- {
- lf_indent (file, +1);
- lf_printf (file, "\n(word_nr %d)", cond->word_nr);
- lf_printf (file, "\n(mask 0x%lx)", (long) cond->mask);
- lf_printf (file, "\n(value 0x%lx)", (long) cond->value);
- lf_printf (file, "\n(is_equal 0x%lx)", (long) cond->is_equal);
- lf_printf (file, "\n(next (decode_cond *) 0%lx)", (long) cond->next);
- lf_indent (file, -1);
- }
- lf_printf (file, "%s", suffix);
-}
-
-
-static void
-dump_decode_conds (lf *file,
- char *prefix,
- decode_cond *cond,
- char *suffix)
-{
- lf_printf (file, "%s(decode_cond *) 0x%lx", prefix, (long) cond);
- while (cond != NULL)
- {
- dump_decode_cond (file, "\n(", cond, ")");
- cond = cond->next;
- }
- lf_printf (file, "%s", suffix);
-}
-
-
-void
-dump_decode_rule (lf *file,
- char *prefix,
- decode_table *rule,
- char *suffix)
-{
- lf_printf (file, "%s(decode_table *) 0x%lx", prefix, (long) rule);
- if (rule != NULL)
- {
- lf_indent (file, +1);
- dump_line_ref (file, "\n(line ", rule->line, ")");
- lf_printf (file, "\n(type %s)", i2name(rule->type, decode_type_map));
- lf_printf (file, "\n(gen %s)", i2name(rule->gen, decode_gen_map));
- lf_printf (file, "\n(first %d)", rule->first);
- lf_printf (file, "\n(last %d)", rule->last);
- lf_printf (file, "\n(force_first %d)", rule->force_first);
- lf_printf (file, "\n(force_last %d)", rule->force_last);
- dump_filter (file, "\n(constant_field_names \"", rule->constant_field_names, "\")");
- lf_printf (file, "\n(constant 0x%x)", rule->constant);
- lf_printf (file, "\n(word_nr %d)", rule->word_nr);
- lf_printf (file, "\n(with_zero_reserved %d)", rule->with_zero_reserved);
- lf_printf (file, "\n(with_duplicates %d)", rule->with_duplicates);
- lf_printf (file, "\n(with_combine %d)", rule->with_combine);
- dump_filter (file, "\n(format_names \"", rule->format_names, "\")");
- dump_filter (file, "\n(model_names \"", rule->model_names, "\")");
- dump_decode_conds (file, "\n(conditions ", rule->conditions, ")");
- lf_printf (file, "\n(next 0x%lx)", (long) rule->next);
- lf_indent (file, -1);
- }
- lf_printf (file, "%s", suffix);
-}
-
-
-#ifdef MAIN
-
-static void
-dump_decode_rules (lf *file,
- char *prefix,
- decode_table *rule,
- char *suffix)
-{
- lf_printf (file, "%s", prefix);
- while (rule != NULL)
- {
- lf_indent (file, +1);
- dump_decode_rule (file, "\n(", rule, ")");
- lf_indent (file, -1);
- rule = rule->next;
- }
- lf_printf (file, "%s", suffix);
-}
-
-igen_options options;
-
-int
-main(int argc, char **argv)
-{
- lf *l;
- decode_table *rules;
-
- INIT_OPTIONS (options);
-
- if (argc != 3)
- error (NULL, "Usage: decode <decode-file> <hi-bit-nr>\n");
-
- options.hi_bit_nr = a2i (argv[2]);
- rules = load_decode_table (argv[1]);
- l = lf_open ("-", "stdout", lf_omit_references, lf_is_text, "tmp-ld-insn");
- dump_decode_rules (l, "(rules ", rules, ")\n");
-
- return 0;
-}
-#endif
diff --git a/sim/igen/ld-decode.h b/sim/igen/ld-decode.h
deleted file mode 100644
index b24a231266a..00000000000
--- a/sim/igen/ld-decode.h
+++ /dev/null
@@ -1,235 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994,1995,1996, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-/* Instruction decode table:
-
- <decode-rule> ::=
- { <option> }
- ":" [ <first> ]
- ":" [ <last> ]
- ":" [ <force-first> ]
- ":" [ <force-last> ]
- ":" [ <constant-field-names> ]
- ":" [ <word-nr> ]
- ":" [ <format-names> ]
- ":" [ <model-names> ]
- ":" [ <constant> ]
- ":" [ <path> { "," <path> } ]
- { ":" <special-mask>
- ":" [ "!" ] <special-value>
- ":" <word-nr> }
- <nl>
- ;
-
-
- <path> ::= <int> "," <int> ;;
-
- <option> ::=
- <reserved-options>
- | <code-options>
- | <optimize-options>
- | <decode-options>
- | <constant>
- | <search-options>
- ;
-
- <reserved-options> ::= "zero-reserved" ;
- <gen-options> ::= "array" | "switch" | "padded-switch" | "goto-switch" ;
- <optimize-options> ::= "duplicate" | "combine"
- <decode-options> ::= "normal" | "boolean" ;
- <search-options> ::= "constants" | "variables" | "mixed"
-
- Ignore the below:
-
-
- The instruction decode table contains rules that dictate how igen
- is going to firstly break down the opcode table and secondly
-
- The table that follows is used by gen to construct a decision tree
- that can identify each possible instruction. Gen then outputs this
- decision tree as (according to config) a table or switch statement
- as the function idecode.
-
- In parallel to this, as mentioned above, WITH_EXPANDED_SEMANTICS
- determines of the semantic functions themselves should be expanded
- in a similar way.
-
- <first>
- <last>
-
- Range of bits (within the instruction) that should be searched for
- an instruction field. Within such ranges, gen looks for opcodes
- (constants), registers (strings) and reserved bits (slash) and
- according to the rules that follows includes or excludes them from
- a possible instruction field.
-
- <force_first>
- <force_last>
-
- If an instruction field was found, enlarge the field size so that
- it is forced to at least include bits starting from <force_first>
- (<force_last>). To stop this occuring, use <force_first> = <last>
- + 1 and <force_last> = <first> - 1.
-
- <force_reserved>
-
- Treat `/' (reserved) fields as a constant (zero) instead of
- variable when looking for an instruction field.
-
- <force_expansion>
-
- Treat any contained register (string) fields as constant when
- determining the instruction field. For the instruction decode (and
- controled by IDECODE_EXPAND_SEMANTICS) this forces the expansion of
- what would otherwize be non constant bits of an instruction.
-
- <use_switch>
-
- Should this table be expanded using a switch statement (val 1) and
- if so, should it be padded with entries so as to force the compiler
- to generate a jump table (val 2). Or a branch table (val 3).
-
- <special_mask>
- <special_value>
- <special_rule>
- <special_constant>
-
- Special rule to fine tune how specific (or groups) of instructions
- are expanded. The applicability of the rule is determined by
-
- <special_mask> != 0 && (instruction> & <special_mask>) == <special_value>
-
- Where <instruction> is obtained by looking only at constant fields
- with in an instructions spec. When determining an expansion, the
- rule is only considered when a node contains a single instruction.
- <special_rule> can be any of:
-
- 0: for this instruction, expand by earlier rules
- 1: expand bits <force_low> .. <force_hi> only
- 2: boolean expansion of only zero/non-zero cases
- 3: boolean expansion of equality of special constant
-
- */
-
-
-typedef enum {
- normal_decode_rule,
- boolean_rule,
-} decode_special_type;
-
-
-typedef enum {
- invalid_gen,
- array_gen,
- switch_gen,
- padded_switch_gen,
- goto_switch_gen,
-} decode_gen_type;
-
-
-enum {
- decode_cond_mask_field,
- decode_cond_value_field,
- decode_cond_word_nr_field,
- nr_decode_cond_fields,
-};
-
-typedef struct _decode_path decode_path;
-struct _decode_path {
- int opcode_nr;
- decode_path *parent;
-};
-
-typedef struct _decode_path_list decode_path_list;
-struct _decode_path_list {
- decode_path *path;
- decode_path_list *next;
-};
-
-
-typedef struct _decode_cond decode_cond;
-struct _decode_cond {
- int word_nr;
- int mask[max_insn_bit_size];
- int value[max_insn_bit_size];
- int is_equal;
- decode_cond *next;
-};
-
-typedef enum {
- decode_find_mixed,
- decode_find_constants,
- decode_find_strings,
-} decode_search_type;
-
-enum {
- decode_options_field,
- decode_first_field,
- decode_last_field,
- decode_force_first_field,
- decode_force_last_field,
- decode_constant_field_names_field,
- decode_word_nr_field,
- decode_format_names_field,
- decode_model_names_field,
- decode_paths_field,
- nr_decode_fields,
- min_nr_decode_fields = decode_last_field + 1,
-};
-
-
-typedef struct _decode_table decode_table;
-struct _decode_table {
- line_ref *line;
- decode_special_type type;
- decode_gen_type gen;
- decode_search_type search;
- int first;
- int last;
- int force_first;
- int force_last;
- filter *constant_field_names;
- int word_nr;
- /* if a boolean */
- unsigned constant;
- /* options */
- int with_zero_reserved;
- int with_duplicates;
- int with_combine;
- /* conditions on the rule being applied */
- decode_path_list *paths;
- filter *format_names;
- filter *model_names;
- decode_cond *conditions;
- decode_table *next;
-};
-
-
-extern decode_table *load_decode_table
-(char *file_name);
-
-extern int decode_table_max_word_nr
-(decode_table *rule);
-
-extern void dump_decode_rule
-(lf *file,
- char *prefix,
- decode_table *rule,
- char *suffix);
diff --git a/sim/igen/ld-insn.c b/sim/igen/ld-insn.c
deleted file mode 100644
index f812199e749..00000000000
--- a/sim/igen/ld-insn.c
+++ /dev/null
@@ -1,1829 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1998, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-#include "misc.h"
-#include "lf.h"
-#include "table.h"
-#include "filter.h"
-#include "igen.h"
-#include "ld-insn.h"
-
-static insn_word_entry *
-parse_insn_word (line_ref *line,
- char *string,
- int word_nr)
-{
- char *chp;
- insn_word_entry *word = ZALLOC (insn_word_entry);
-
- /* create a leading sentinal */
- word->first = ZALLOC (insn_field_entry);
- word->first->first = -1;
- word->first->last = -1;
- word->first->width = 0;
-
- /* and a trailing sentinal */
- word->last = ZALLOC (insn_field_entry);
- word->last->first = options.insn_bit_size;
- word->last->last = options.insn_bit_size;
- word->last->width = 0;
-
- /* link them together */
- word->first->next = word->last;
- word->last->prev = word->first;
-
- /* now work through the formats */
- chp = skip_spaces (string);
-
- while (*chp != '\0') {
- char *start_pos;
- int strlen_pos;
- char *start_val;
- int strlen_val;
- insn_field_entry *new_field;
-
- /* create / link in the new field */
- new_field = ZALLOC (insn_field_entry);
- new_field->next = word->last;
- new_field->prev = word->last->prev;
- new_field->next->prev = new_field;
- new_field->prev->next = new_field;
- new_field->word_nr = word_nr;
-
- /* break out the first field (if present) */
- start_pos = chp;
- chp = skip_to_separator (chp, ".,!");
- strlen_pos = back_spaces (start_pos, chp) - start_pos;
-
- /* break out the second field (if present) */
- if (*chp != '.')
- {
- /* assume what was specified was the value (and not the start
- position). Assume the value length implicitly specifies
- the number of bits */
- start_val = start_pos;
- strlen_val = strlen_pos;
- start_pos = "";
- strlen_pos = 0;
- }
- else
- {
- chp++; /* skip `.' */
- chp = skip_spaces (chp);
- start_val = chp;
- if (*chp == '/' || *chp == '*')
- {
- do
- {
- chp++;
- }
- while (*chp == '/' || *chp == '*');
- }
- else if (isalpha(*start_val))
- {
- do
- {
- chp++;
- }
- while (isalnum(*chp) || *chp == '_');
- }
- else if (isdigit(*start_val))
- {
- do {
- chp++;
- }
- while (isalnum(*chp));
- }
- strlen_val = chp - start_val;
- chp = skip_spaces (chp);
- }
- if (strlen_val == 0)
- error (line, "Empty value field\n");
-
- /* break out any conditional fields - { [ "!" | "=" [ <value> | <field-name> } */
- while (*chp == '!' || *chp == '=')
- {
- char *start;
- char *end;
- int len;
- insn_field_cond *new_cond = ZALLOC (insn_field_cond);
-
- /* determine the conditional test */
- switch (*chp)
- {
- case '=':
- new_cond->test = insn_field_cond_eq;
- break;
- case '!':
- new_cond->test = insn_field_cond_ne;
- break;
- default:
- ASSERT (0);
- }
-
- /* save the value */
- chp++;
- chp = skip_spaces (chp);
- start = chp;
- chp = skip_to_separator (chp, "+,:!=");
- end = back_spaces (start, chp);
- len = end - start;
- if (len == 0)
- error (line, "Missing or invalid conditional value\n");
- new_cond->string = NZALLOC (char, len + 1);
- strncpy (new_cond->string, start, len);
-
- /* determine the conditional type */
- if (isdigit (*start))
- {
- /* [ "!" | "=" ] <value> */
- new_cond->type = insn_field_cond_value;
- new_cond->value = a2i (new_cond->string);
- }
- else
- {
- /* [ "!" | "=" ] <field> - check field valid */
- new_cond->type = insn_field_cond_field;
- /* new_cond->field is determined in later */
- }
-
- /* Only a single `=' is permitted. */
- if ((new_cond->test == insn_field_cond_eq
- && new_field->conditions != NULL)
- || (new_field->conditions != NULL
- && new_field->conditions->test == insn_field_cond_eq))
- error (line, "Only single conditional when `=' allowed\n");
-
- /* insert it */
- {
- insn_field_cond **last = &new_field->conditions;
- while (*last != NULL)
- last = &(*last)->next;
- *last = new_cond;
- }
- }
-
- /* NOW verify that the field was finished */
- if (*chp == ',')
- {
- chp = skip_spaces (chp + 1);
- if (*chp == '\0')
- error (line, "empty field\n");
- }
- else if (*chp != '\0')
- {
- error (line, "Missing field separator\n");
- }
-
- /* copy the value */
- new_field->val_string = NZALLOC (char, strlen_val+1);
- strncpy (new_field->val_string, start_val, strlen_val);
- if (isdigit (new_field->val_string[0]))
- {
- if (strlen_pos == 0)
- {
- /* when the length/pos field is omited, an integer field
- is always binary */
- unsigned64 val = 0;
- int i;
- for (i = 0; i < strlen_val; i++)
- {
- if (new_field->val_string[i] != '0'
- && new_field->val_string[i] != '1')
- error (line, "invalid binary field %s\n",
- new_field->val_string);
- val = (val << 1) + (new_field->val_string[i] == '1');
- }
- new_field->val_int = val;
- new_field->type = insn_field_int;
- }
- else
- {
- new_field->val_int = a2i (new_field->val_string);
- new_field->type = insn_field_int;
- }
- }
- else if (new_field->val_string[0] == '/')
- {
- new_field->type = insn_field_reserved;
- }
- else if (new_field->val_string[0] == '*')
- {
- new_field->type = insn_field_wild;
- }
- else
- {
- new_field->type = insn_field_string;
- if (filter_is_member (word->field_names, new_field->val_string))
- error (line, "Field name %s is duplicated\n", new_field->val_string);
- filter_parse (&word->field_names, new_field->val_string);
- }
- if (new_field->type != insn_field_string
- && new_field->conditions != NULL)
- error (line, "Conditionals can only be applied to named fields\n");
-
- /* the copy the position */
- new_field->pos_string = NZALLOC (char, strlen_pos + 1);
- strncpy (new_field->pos_string, start_pos, strlen_pos);
- if (strlen_pos == 0)
- {
- new_field->first = new_field->prev->last + 1;
- if (new_field->first == 0 /* first field */
- && *chp == '\0' /* no further fields */
- && new_field->type == insn_field_string)
- {
- /* A single string without any position, assume that it
- represents the entire instruction word */
- new_field->width = options.insn_bit_size;
- }
- else
- {
- /* No explicit width/position, assume value implicitly
- supplies the width */
- new_field->width = strlen_val;
- }
- new_field->last = new_field->first + new_field->width - 1;
- if (new_field->last >= options.insn_bit_size)
- error (line, "Bit position %d exceed instruction bit size (%d)\n",
- new_field->last, options.insn_bit_size);
- }
- else if (options.insn_specifying_widths)
- {
- new_field->first = new_field->prev->last + 1;
- new_field->width = a2i(new_field->pos_string);
- new_field->last = new_field->first + new_field->width - 1;
- if (new_field->last >= options.insn_bit_size)
- error (line, "Bit position %d exceed instruction bit size (%d)\n",
- new_field->last, options.insn_bit_size);
- }
- else
- {
- new_field->first = target_a2i(options.hi_bit_nr,
- new_field->pos_string);
- new_field->last = new_field->next->first - 1; /* guess */
- new_field->width = new_field->last - new_field->first + 1; /* guess */
- new_field->prev->last = new_field->first - 1; /*fix*/
- new_field->prev->width = new_field->first - new_field->prev->first; /*fix*/
- }
- }
-
- /* fiddle first/last so that the sentinals disapear */
- ASSERT(word->first->last < 0);
- ASSERT(word->last->first >= options.insn_bit_size);
- word->first = word->first->next;
- word->last = word->last->prev;
-
- /* check that the last field goes all the way to the last bit */
- if (word->last->last != options.insn_bit_size - 1)
- {
- if (options.warn.width)
- options.warning (line, "Instruction format is not %d bits wide\n",
- options.insn_bit_size);
- word->last->last = options.insn_bit_size - 1;
- }
-
- /* now go over this again, pointing each bit position at a field
- record */
- {
- insn_field_entry *field;
- for (field = word->first;
- field->last < options.insn_bit_size;
- field = field->next)
- {
- int i;
- for (i = field->first; i <= field->last; i++)
- {
- word->bit[i] = ZALLOC (insn_bit_entry);
- word->bit[i]->field = field;
- switch (field->type)
- {
- case insn_field_invalid:
- ASSERT (0);
- break;
- case insn_field_int:
- word->bit[i]->mask = 1;
- word->bit[i]->value = ((field->val_int
- & ((insn_uint)1 << (field->last - i)))
- != 0);
- case insn_field_reserved:
- case insn_field_wild:
- case insn_field_string:
- /* if we encounter a constant conditional, encode
- their bit value. */
- if (field->conditions != NULL
- && field->conditions->test == insn_field_cond_eq
- && field->conditions->type == insn_field_cond_value)
- {
- word->bit[i]->mask = 1;
- word->bit[i]->value = ((field->conditions->value
- & ((insn_uint)1 << (field->last - i)))
- != 0);
- }
- break;
- }
- }
- }
- }
-
- return word;
-}
-
-
-static void
-parse_insn_words (insn_entry *insn,
- char *formats)
-{
- insn_word_entry **last_word = &insn->words;
- char *chp;
-
- /* now work through the formats */
- insn->nr_words = 0;
- chp = formats;
-
- while (1)
- {
- char *start_pos;
- char *end_pos;
- int strlen_pos;
- char *format;
- insn_word_entry *new_word;
-
- /* skip leading spaces */
- chp = skip_spaces (chp);
-
- /* break out the format */
- start_pos = chp;
- chp = skip_to_separator (chp, "+");
- end_pos = back_spaces (start_pos, chp);
- strlen_pos = end_pos - start_pos;
-
- /* check that something was there */
- if (strlen_pos == 0)
- error (insn->line, "missing or empty instruction format\n");
-
- /* parse the field */
- format = NZALLOC (char, strlen_pos + 1);
- strncpy (format, start_pos, strlen_pos);
- new_word = parse_insn_word (insn->line, format, insn->nr_words);
- insn->nr_words++;
- if (filter_is_common (insn->field_names, new_word->field_names))
- error (insn->line, "Field name duplicated between two words\n");
- filter_add (&insn->field_names, new_word->field_names);
-
- /* insert it */
- *last_word = new_word;
- last_word = &new_word->next;
-
- /* last format? */
- if (*chp == '\0')
- break;
- ASSERT (*chp == '+');
- chp++;
- }
-
- /* create a quick access array (indexed by word) of the same structure */
- {
- int i;
- insn_word_entry *word;
- insn->word = NZALLOC (insn_word_entry *, insn->nr_words + 1);
- for (i = 0, word = insn->words;
- i < insn->nr_words;
- i++, word = word->next)
- insn->word[i] = word;
- }
-
- /* Go over all fields that have conditionals refering to other
- fields. Link the fields up. Verify that the two fields have the
- same size. Verify that the two fields are different */
- {
- int i;
- for (i = 0; i < insn->nr_words; i++)
- {
- insn_word_entry *word = insn->word[i];
- insn_field_entry *f;
- for (f = word->first;
- f->last < options.insn_bit_size;
- f = f->next)
- {
- insn_field_cond *cond;
- for (cond = f->conditions;
- cond != NULL;
- cond = cond->next)
- {
- if (cond->type == insn_field_cond_field)
- {
- int j;
- if (strcmp (cond->string, f->val_string) == 0)
- error (insn->line,
- "Conditional `%s' of field `%s' refers to its self\n",
- cond->string, f->val_string);
- for (j = 0; j <= i && cond->field == NULL; j++)
- {
- insn_word_entry *refered_word = insn->word[j];
- insn_field_entry *refered_field;
- for (refered_field = refered_word->first;
- refered_field != NULL && cond->field == NULL;
- refered_field = refered_field->next)
- {
- if (refered_field->type == insn_field_string
- && strcmp (refered_field->val_string, cond->string) == 0)
- {
- /* found field being refered to by conditonal */
- cond->field = refered_field;
- /* check refered to and this field are
- the same size */
- if (f->width != refered_field->width)
- error (insn->line,
- "Conditional `%s' of field `%s' should be of size %s\n",
- cond->string, f->val_string, refered_field->width);
- }
- }
- }
- if (cond->field == NULL)
- error (insn->line,
- "Conditional `%s' of field `%s' not yet defined\n",
- cond->string, f->val_string);
- }
- }
- }
- }
- }
-
-}
-
-typedef enum {
- unknown_record = 0,
- insn_record, /* default */
- code_record,
- cache_record,
- compute_record,
- scratch_record,
- option_record,
- string_function_record,
- function_record,
- internal_record,
- define_record,
- include_record,
- model_processor_record,
- model_macro_record,
- model_data_record,
- model_static_record,
- model_function_record,
- model_internal_record,
-} insn_record_type;
-
-static const name_map insn_type_map[] = {
- { "option", option_record },
- { "cache", cache_record },
- { "compute", compute_record },
- { "scratch", scratch_record },
- { "define", define_record },
- { "include", include_record },
- { "%s", string_function_record },
- { "function", function_record },
- { "internal", internal_record },
- { "model", model_processor_record },
- { "model-macro", model_macro_record },
- { "model-data", model_data_record },
- { "model-static", model_static_record },
- { "model-internal", model_internal_record },
- { "model-function", model_function_record },
- { NULL, insn_record },
-};
-
-
-static int
-record_is_old (table_entry *entry)
-{
- if (entry->nr_fields > record_type_field
- && strlen (entry->field[record_type_field]) == 0)
- return 1;
- return 0;
-}
-
-static insn_record_type
-record_type (table_entry *entry)
-{
- switch (entry->type)
- {
- case table_code_entry:
- return code_record;
-
- case table_colon_entry:
- if (record_is_old (entry))
- {
- /* old-format? */
- if (entry->nr_fields > old_record_type_field)
- {
- int i = name2i (entry->field[old_record_type_field],
- insn_type_map);
- return i;
- }
- else
- {
- return unknown_record;
- }
- }
- else if (entry->nr_fields > record_type_field
- && entry->field[0][0] == '\0')
- {
- /* new-format? */
- int i = name2i (entry->field[record_type_field],
- insn_type_map);
- return i;
- }
- else
- return insn_record; /* default */
- }
- return unknown_record;
-}
-
-static int
-record_prefix_is (table_entry *entry,
- char ch,
- int nr_fields)
-{
- if (entry->type != table_colon_entry)
- return 0;
- if (entry->nr_fields < nr_fields)
- return 0;
- if (entry->field[0][0] != ch && ch != '\0')
- return 0;
- return 1;
-}
-
-static table_entry *
-parse_model_data_record (insn_table *isa,
- table *file,
- table_entry *record,
- int nr_fields,
- model_data **list)
-{
- table_entry *model_record = record;
- table_entry *code_record = NULL;
- model_data *new_data;
- if (record->nr_fields < nr_fields)
- error (record->line, "Incorrect number of fields\n");
- record = table_read (file);
- if (record->type == table_code_entry)
- {
- code_record = record;
- record = table_read (file);
- }
- /* create the new data record */
- new_data = ZALLOC (model_data);
- new_data->line = model_record->line;
- filter_parse (&new_data->flags,
- model_record->field[record_filter_flags_field]);
- new_data->entry = model_record;
- new_data->code = code_record;
- /* append it if not filtered out */
- if (!is_filtered_out (options.flags_filter,
- model_record->field[record_filter_flags_field])
- && !is_filtered_out (options.model_filter,
- model_record->field[record_filter_models_field]))
- {
- while (*list != NULL)
- list = &(*list)->next;
- *list = new_data;
- }
- return record;
-}
-
-
-typedef enum {
- insn_bit_size_option = 1,
- insn_specifying_widths_option,
- hi_bit_nr_option,
- flags_filter_option,
- model_filter_option,
- multi_sim_option,
- format_names_option,
- gen_delayed_branch,
- unknown_option,
-} option_names;
-
-static const name_map option_map[] = {
- { "insn-bit-size", insn_bit_size_option },
- { "insn-specifying-widths", insn_specifying_widths_option },
- { "hi-bit-nr", hi_bit_nr_option },
- { "flags-filter", flags_filter_option },
- { "model-filter", model_filter_option },
- { "multi-sim", multi_sim_option },
- { "format-names", format_names_option },
- { "gen-delayed-branch", gen_delayed_branch },
- { NULL, unknown_option },
-};
-
-static table_entry *
-parse_include_record (table *file,
- table_entry *record)
-{
- /* parse the include record */
- if (record->nr_fields < nr_include_fields)
- error (record->line, "Incorrect nr fields for include record\n");
- /* process it */
- if (!is_filtered_out (options.flags_filter,
- record->field[record_filter_flags_field])
- && !is_filtered_out (options.model_filter,
- record->field[record_filter_models_field]))
- {
- table_push (file, record->line, options.include,
- record->field[include_filename_field]);
- }
- /* nb: can't read next record until after the file has been pushed */
- record = table_read (file);
- return record;
-}
-
-
-static table_entry *
-parse_option_record (table *file,
- table_entry *record)
-{
- table_entry *option_record;
- /* parse the option record */
- option_record = record;
- if (record->nr_fields < nr_option_fields)
- error (record->line, "Incorrect nr of fields for option record\n");
- record = table_read (file);
- /* process it */
- if (!is_filtered_out (options.flags_filter,
- option_record->field[record_filter_flags_field])
- && !is_filtered_out (options.model_filter,
- option_record->field[record_filter_models_field]))
- {
- char *name = option_record->field[option_name_field];
- option_names option = name2i (name, option_map);
- char *value = option_record->field[option_value_field];
- switch (option)
- {
- case insn_bit_size_option:
- {
- options.insn_bit_size = a2i (value);
- if (options.insn_bit_size < 0
- || options.insn_bit_size > max_insn_bit_size)
- error (option_record->line, "Instruction bit size out of range\n");
- if (options.hi_bit_nr != options.insn_bit_size - 1
- && options.hi_bit_nr != 0)
- error (option_record->line, "insn-bit-size / hi-bit-nr conflict\n");
- break;
- }
- case insn_specifying_widths_option:
- {
- options.insn_specifying_widths = a2i (value);
- break;
- }
- case hi_bit_nr_option:
- {
- options.hi_bit_nr = a2i (value);
- if (options.hi_bit_nr != 0
- && options.hi_bit_nr != options.insn_bit_size - 1)
- error (option_record->line, "hi-bit-nr / insn-bit-size conflict\n");
- break;
- }
- case flags_filter_option:
- {
- filter_parse (&options.flags_filter, value);
- break;
- }
- case model_filter_option:
- {
- filter_parse (&options.model_filter, value);
- break;
- }
- case multi_sim_option:
- {
- options.gen.multi_sim = a2i (value);
- break;
- }
- case format_names_option:
- {
- filter_parse (&options.format_name_filter, value);
- break;
- }
- case gen_delayed_branch:
- {
- options.gen.delayed_branch = a2i (value);
- break;
- }
- case unknown_option:
- {
- error (option_record->line, "Unknown option - %s\n", name);
- break;
- }
- }
- }
- return record;
-}
-
-
-static table_entry *
-parse_function_record (table *file,
- table_entry *record,
- function_entry **list,
- function_entry **list_entry,
- int is_internal,
- model_table *model)
-{
- function_entry *new_function;
- new_function = ZALLOC (function_entry);
- new_function->line = record->line;
- new_function->is_internal = is_internal;
- /* parse the function header */
- if (record_is_old (record))
- {
- if (record->nr_fields < nr_old_function_fields)
- error (record->line, "Missing fields from (old) function record\n");
- new_function->type = record->field[old_function_typedef_field];
- new_function->type = record->field[old_function_typedef_field];
- if (record->nr_fields > old_function_param_field)
- new_function->param = record->field[old_function_param_field];
- new_function->name = record->field[old_function_name_field];
- }
- else
- {
- if (record->nr_fields < nr_function_fields)
- error (record->line, "Missing fields from function record\n");
- filter_parse (&new_function->flags,
- record->field[record_filter_flags_field]);
- filter_parse (&new_function->models,
- record->field[record_filter_models_field]);
- new_function->type = record->field[function_typedef_field];
- new_function->param = record->field[function_param_field];
- new_function->name = record->field[function_name_field];
- }
- record = table_read (file);
- /* parse any function-model records */
- while (record != NULL
- && record_prefix_is (record, '*', nr_function_model_fields))
- {
- char *model_name = record->field[function_model_name_field] + 1; /*skip `*'*/
- filter_parse (&new_function->models, model_name);
- if (!filter_is_subset (model->processors, new_function->models))
- {
- error (record->line, "machine model `%s' undefined\n", model_name);
- }
- record = table_read (file);
- }
- /* parse the function body */
- if (record->type == table_code_entry)
- {
- new_function->code = record;
- record = table_read (file);
- }
- /* insert it */
- if (!filter_is_subset (options.flags_filter, new_function->flags))
- {
- if (options.warn.discard)
- notify (new_function->line, "Discarding function %s - filter flags\n",
- new_function->name);
- }
- else if (new_function->models != NULL
- && !filter_is_common (options.model_filter, new_function->models))
- {
- if (options.warn.discard)
- notify (new_function->line, "Discarding function %s - filter models\n",
- new_function->name);
- }
- else
- {
- while (*list != NULL)
- list = &(*list)->next;
- *list = new_function;
- if (list_entry != NULL)
- *list_entry = new_function;
- }
- /* done */
- return record;
-}
-
-static void
-parse_insn_model_record (table *file,
- table_entry *record,
- insn_entry *insn,
- model_table *model)
-{
- insn_model_entry **last_insn_model;
- insn_model_entry *new_insn_model = ZALLOC (insn_model_entry);
- /* parse it */
- new_insn_model->line = record->line;
- if (record->nr_fields > insn_model_unit_data_field)
- new_insn_model->unit_data = record->field[insn_model_unit_data_field];
- new_insn_model->insn = insn;
- /* parse the model names, verify that all were defined */
- new_insn_model->names = NULL;
- filter_parse (&new_insn_model->names,
- record->field[insn_model_name_field] + 1 /*skip `*'*/);
- if (new_insn_model->names == NULL)
- {
- /* No processor names - a generic model entry, enter it into all
- the non-empty fields */
- int index;
- for (index = 0; index < model->nr_models; index++)
- if (insn->model[index] == 0)
- {
- insn->model[index] = new_insn_model;
- }
- /* also add the complete processor set to this processor's set */
- filter_add (&insn->processors, model->processors);
- }
- else
- {
- /* Find the corresponding master model record for each name so
- that they can be linked in. */
- int index;
- char *name = "";
- while (1)
- {
- name = filter_next (new_insn_model->names, name);
- if (name == NULL) break;
- index = filter_is_member (model->processors, name) - 1;
- if (index < 0)
- {
- error (new_insn_model->line,
- "machine model `%s' undefined\n", name);
- }
- /* store it in the corresponding model array entry */
- if (insn->model[index] != NULL
- && insn->model[index]->names != NULL)
- {
- warning (new_insn_model->line,
- "machine model `%s' previously defined\n", name);
- error (insn->model[index]->line, "earlier definition\n");
- }
- insn->model[index] = new_insn_model;
- /* also add the name to the instructions processor set as an
- alternative lookup mechanism */
- filter_parse (&insn->processors, name);
- }
- }
-#if 0
- /* for some reason record the max length of any
- function unit field */
- int len = strlen (insn_model_ptr->field[insn_model_fields]);
- if (model->max_model_fields_len < len)
- model->max_model_fields_len = len;
-#endif
- /* link it in */
- last_insn_model = &insn->models;
- while ((*last_insn_model) != NULL)
- last_insn_model = &(*last_insn_model)->next;
- *last_insn_model = new_insn_model;
-}
-
-
-static void
-parse_insn_mnemonic_record (table *file,
- table_entry *record,
- insn_entry *insn)
-{
- insn_mnemonic_entry **last_insn_mnemonic;
- insn_mnemonic_entry *new_insn_mnemonic = ZALLOC (insn_mnemonic_entry);
- /* parse it */
- new_insn_mnemonic->line = record->line;
- ASSERT (record->nr_fields > insn_mnemonic_format_field);
- new_insn_mnemonic->format = record->field[insn_mnemonic_format_field];
- ASSERT (new_insn_mnemonic->format[0] == '"');
- if (new_insn_mnemonic->format[strlen (new_insn_mnemonic->format) - 1] != '"')
- error (new_insn_mnemonic->line, "Missing closing double quote in mnemonic field\n");
- if (record->nr_fields > insn_mnemonic_condition_field)
- new_insn_mnemonic->condition = record->field[insn_mnemonic_condition_field];
- new_insn_mnemonic->insn = insn;
- /* insert it */
- last_insn_mnemonic = &insn->mnemonics;
- while ((*last_insn_mnemonic) != NULL)
- last_insn_mnemonic = &(*last_insn_mnemonic)->next;
- insn->nr_mnemonics++;
- *last_insn_mnemonic = new_insn_mnemonic;
-}
-
-
-static table_entry *
-parse_macro_record (table *file,
- table_entry *record)
-{
-#if 1
- error (record->line, "Macros are not implemented");
-#else
- /* parse the define record */
- if (record->nr_fields < nr_define_fields)
- error (record->line, "Incorrect nr fields for define record\n");
- /* process it */
- if (!is_filtered_out (options.flags_filter,
- record->field[record_filter_flags_field])
- && !is_filtered_out (options.model_filter,
- record->field[record_filter_models_field]))
- {
- table_define (file,
- record->line,
- record->field[macro_name_field],
- record->field[macro_args_field],
- record->field[macro_expr_field]);
- }
- record = table_read (file);
-#endif
- return record;
-}
-
-
-insn_table *
-load_insn_table (char *file_name,
- cache_entry *cache)
-{
- table *file = table_open (file_name);
- table_entry *record = table_read (file);
-
- insn_table *isa = ZALLOC (insn_table);
- model_table *model = ZALLOC (model_table);
-
- isa->model = model;
- isa->caches = cache;
-
- while (record != NULL)
- {
-
- switch (record_type (record))
- {
-
- case include_record:
- {
- record = parse_include_record (file, record);
- break;
- }
-
- case option_record:
- {
- if (isa->insns != NULL)
- error (record->line, "Option after first instruction\n");
- record = parse_option_record (file, record);
- break;
- }
-
- case string_function_record:
- {
- function_entry *function = NULL;
- record = parse_function_record (file, record,
- &isa->functions,
- &function,
- 0/*is-internal*/,
- model);
- /* convert a string function record into an internal function */
- if (function != NULL)
- {
- char *name = NZALLOC (char,
- (strlen ("str_")
- + strlen (function->name)
- + 1));
- strcat (name, "str_");
- strcat (name, function->name);
- function->name = name;
- function->type = "const char *";
- }
- break;
- }
-
- case function_record: /* function record */
- {
- record = parse_function_record (file, record,
- &isa->functions,
- NULL,
- 0/*is-internal*/,
- model);
- break;
- }
-
- case internal_record:
- {
- /* only insert it into the function list if it is unknown */
- function_entry *function = NULL;
- record = parse_function_record (file, record,
- &isa->functions,
- &function,
- 1/*is-internal*/,
- model);
- /* check what was inserted to see if a pseudo-instruction
- entry also needs to be created */
- if (function != NULL)
- {
- insn_entry **insn = NULL;
- if (strcmp (function->name, "illegal") == 0)
- {
- /* illegal function save it away */
- if (isa->illegal_insn != NULL)
- {
- warning (function->line,
- "Multiple illegal instruction definitions\n");
- error (isa->illegal_insn->line,
- "Location of first illegal instruction\n");
- }
- else
- insn = &isa->illegal_insn;
- }
- if (insn != NULL)
- {
- *insn = ZALLOC (insn_entry);
- (*insn)->line = function->line;
- (*insn)->name = function->name;
- (*insn)->code = function->code;
- }
- }
- break;
- }
-
- case scratch_record: /* cache macro records */
- case cache_record:
- case compute_record:
- {
- cache_entry *new_cache;
- /* parse the cache record */
- if (record->nr_fields < nr_cache_fields)
- error (record->line,
- "Incorrect nr of fields for scratch/cache/compute record\n");
- /* create it */
- new_cache = ZALLOC (cache_entry);
- new_cache->line = record->line;
- filter_parse (&new_cache->flags,
- record->field[record_filter_flags_field]);
- filter_parse (&new_cache->models,
- record->field[record_filter_models_field]);
- new_cache->type = record->field[cache_typedef_field];
- new_cache->name = record->field[cache_name_field];
- filter_parse (&new_cache->original_fields,
- record->field[cache_original_fields_field]);
- new_cache->expression = record->field[cache_expression_field];
- /* insert it but only if not filtered out */
- if (!filter_is_subset (options.flags_filter, new_cache->flags))
- {
- notify (new_cache->line, "Discarding cache entry %s - filter flags\n",
- new_cache->name);
- }
- else if (is_filtered_out (options.model_filter,
- record->field[record_filter_models_field]))
- {
- notify (new_cache->line, "Discarding cache entry %s - filter models\n",
- new_cache->name);
- }
- else
- {
- cache_entry **last;
- last = &isa->caches;
- while (*last != NULL)
- last = &(*last)->next;
- *last = new_cache;
- }
- /* advance things */
- record = table_read (file);
- break;
- }
-
- /* model records */
- case model_processor_record:
- {
- model_entry *new_model;
- /* parse the model */
- if (record->nr_fields < nr_model_processor_fields)
- error (record->line, "Incorrect nr of fields for model record\n");
- if (isa->insns != NULL)
- error (record->line, "Model appears after first instruction\n");
- new_model = ZALLOC (model_entry);
- filter_parse (&new_model->flags,
- record->field[record_filter_flags_field]);
- new_model->line = record->line;
- new_model->name = record->field[model_name_field];
- new_model->full_name = record->field[model_full_name_field];
- new_model->unit_data = record->field[model_unit_data_field];
- /* only insert it if not filtered out */
- if (!filter_is_subset (options.flags_filter, new_model->flags))
- {
- notify (new_model->line, "Discarding processor model %s - filter flags\n",
- new_model->name);
- }
- else if (is_filtered_out (options.model_filter,
- record->field[record_filter_models_field]))
- {
- notify (new_model->line, "Discarding processor model %s - filter models\n",
- new_model->name);
- }
- else if (filter_is_member (model->processors, new_model->name))
- {
- error (new_model->line, "Duplicate processor model %s\n",
- new_model->name);
- }
- else
- {
- model_entry **last;
- last = &model->models;
- while (*last != NULL)
- last = &(*last)->next;
- *last = new_model;
- /* count it */
- model->nr_models ++;
- filter_parse (&model->processors, new_model->name);
- }
- /* advance things */
- record = table_read (file);
- }
- break;
-
- case model_macro_record:
- record = parse_model_data_record (isa, file, record,
- nr_model_macro_fields,
- &model->macros);
- break;
-
- case model_data_record:
- record = parse_model_data_record (isa, file, record,
- nr_model_data_fields,
- &model->data);
- break;
-
- case model_static_record:
- record = parse_function_record (file, record,
- &model->statics,
- NULL,
- 0/*is internal*/,
- model);
- break;
-
- case model_internal_record:
- record = parse_function_record (file, record,
- &model->internals,
- NULL,
- 1/*is internal*/,
- model);
- break;
-
- case model_function_record:
- record = parse_function_record (file, record,
- &model->functions,
- NULL,
- 0/*is internal*/,
- model);
- break;
-
- case insn_record: /* instruction records */
- {
- insn_entry *new_insn;
- char *format;
- /* parse the instruction */
- if (record->nr_fields < nr_insn_fields)
- error (record->line, "Incorrect nr of fields for insn record\n");
- new_insn = ZALLOC (insn_entry);
- new_insn->line = record->line;
- filter_parse (&new_insn->flags,
- record->field[record_filter_flags_field]);
- /* save the format field. Can't parse it until after the
- filter-out checks. Could be filtered out because the
- format is invalid */
- format = record->field[insn_word_field];
- new_insn->format_name = record->field[insn_format_name_field];
- if (options.format_name_filter != NULL
- && !filter_is_member (options.format_name_filter,
- new_insn->format_name))
- error (new_insn->line, "Unreconized instruction format name `%s'\n",
- new_insn->format_name);
- filter_parse (&new_insn->options,
- record->field[insn_options_field]);
- new_insn->name = record->field[insn_name_field];
- record = table_read (file);
- /* Parse any model/assember records */
- new_insn->nr_models = model->nr_models;
- new_insn->model = NZALLOC (insn_model_entry*, model->nr_models + 1);
- while (record != NULL)
- {
- if (record_prefix_is (record, '*', nr_insn_model_fields))
- parse_insn_model_record (file, record, new_insn, model);
- else if (record_prefix_is (record, '"', nr_insn_mnemonic_fields))
- parse_insn_mnemonic_record (file, record, new_insn);
- else
- break;
- /* advance */
- record = table_read (file);
- }
- /* Parse the code record */
- if (record != NULL && record->type == table_code_entry)
- {
- new_insn->code = record;
- record = table_read (file);
- }
- else if (options.warn.unimplemented)
- notify (new_insn->line, "unimplemented\n");
- /* insert it */
- if (!filter_is_subset (options.flags_filter, new_insn->flags))
- {
- if (options.warn.discard)
- notify (new_insn->line,
- "Discarding instruction %s (flags-filter)\n",
- new_insn->name);
- }
- else if (new_insn->processors != NULL
- && options.model_filter != NULL
- && !filter_is_common (options.model_filter,
- new_insn->processors))
- {
- /* only discard an instruction based in the processor
- model when both the instruction and the options are
- nonempty */
- if (options.warn.discard)
- notify (new_insn->line,
- "Discarding instruction %s (processor-model)\n",
- new_insn->name);
- }
- else
- {
- insn_entry **last;
- /* finish the parsing */
- parse_insn_words (new_insn, format);
- /* append it */
- last = &isa->insns;
- while (*last)
- last = &(*last)->next;
- *last = new_insn;
- /* update global isa counters */
- isa->nr_insns ++;
- if (isa->max_nr_words < new_insn->nr_words)
- isa->max_nr_words = new_insn->nr_words;
- filter_add (&isa->flags, new_insn->flags);
- filter_add (&isa->options, new_insn->options);
- }
- break;
- }
-
- case define_record:
- record = parse_macro_record (file, record);
- break;
-
- case unknown_record:
- case code_record:
- error (record->line, "Unknown or unexpected entry\n");
-
-
- }
- }
- return isa;
-}
-
-
-void
-print_insn_words (lf *file,
- insn_entry *insn)
-{
- insn_word_entry *word = insn->words;
- if (word != NULL)
- {
- while (1)
- {
- insn_field_entry *field = word->first;
- while (1)
- {
- if (options.insn_specifying_widths)
- lf_printf (file, "%d.", field->width);
- else
- lf_printf (file, "%d.", i2target (options.hi_bit_nr, field->first));
- switch (field->type)
- {
- case insn_field_invalid:
- ASSERT (0);
- break;
- case insn_field_int:
- lf_printf (file, "0x%lx", (long) field->val_int);
- break;
- case insn_field_reserved:
- lf_printf (file, "/");
- break;
- case insn_field_wild:
- lf_printf (file, "*");
- break;
- case insn_field_string:
- lf_printf (file, "%s", field->val_string);
- break;
- }
- if (field == word->last)
- break;
- field = field->next;
- lf_printf (file, ",");
- }
- word = word->next;
- if (word == NULL)
- break;
- lf_printf (file, "+");
- }
- }
-}
-
-
-
-void
-function_entry_traverse (lf *file,
- function_entry *functions,
- function_entry_handler *handler,
- void *data)
-{
- function_entry *function;
- for (function = functions; function != NULL; function = function->next)
- {
- handler (file, function, data);
- }
-}
-
-void
-insn_table_traverse_insn (lf *file,
- insn_table *isa,
- insn_entry_handler *handler,
- void *data)
-{
- insn_entry *insn;
- for (insn = isa->insns; insn != NULL; insn = insn->next)
- {
- handler (file, isa, insn, data);
- }
-}
-
-
-static void
-dump_function_entry (lf *file,
- char *prefix,
- function_entry *entry,
- char *suffix)
-{
- lf_printf (file, "%s(function_entry *) 0x%lx", prefix, (long) entry);
- if (entry != NULL)
- {
- dump_line_ref (file, "\n(line ", entry->line, ")");
- dump_filter (file, "\n(flags ", entry->flags, ")");
- lf_printf (file, "\n(type \"%s\")", entry->type);
- lf_printf (file, "\n(name \"%s\")", entry->name);
- lf_printf (file, "\n(param \"%s\")", entry->param);
- dump_table_entry (file, "\n(code ", entry->code, ")");
- lf_printf (file, "\n(is_internal %d)", entry->is_internal);
- lf_printf (file, "\n(next 0x%lx)", (long) entry->next);
- }
- lf_printf (file, "%s", suffix);
-}
-
-static void
-dump_function_entries (lf *file,
- char *prefix,
- function_entry *entry,
- char *suffix)
-{
- lf_printf (file, "%s", prefix);
- lf_indent (file, +1);
- while (entry != NULL)
- {
- dump_function_entry (file, "\n(", entry, ")");
- entry = entry->next;
- }
- lf_indent (file, -1);
- lf_printf (file, "%s", suffix);
-}
-
-static char *
-cache_entry_type_to_str (cache_entry_type type)
-{
- switch (type)
- {
- case scratch_value: return "scratch";
- case cache_value: return "cache";
- case compute_value: return "compute";
- }
- ERROR ("Bad switch");
- return 0;
-}
-
-static void
-dump_cache_entry (lf *file,
- char *prefix,
- cache_entry *entry,
- char *suffix)
-{
- lf_printf (file, "%s(cache_entry *) 0x%lx", prefix, (long) entry);
- if (entry != NULL)
- {
- dump_line_ref (file, "\n(line ", entry->line, ")");
- dump_filter (file, "\n(flags ", entry->flags, ")");
- lf_printf (file, "\n(entry_type \"%s\")", cache_entry_type_to_str (entry->entry_type));
- lf_printf (file, "\n(name \"%s\")", entry->name);
- dump_filter (file, "\n(original_fields ", entry->original_fields, ")");
- lf_printf (file, "\n(type \"%s\")", entry->type);
- lf_printf (file, "\n(expression \"%s\")", entry->expression);
- lf_printf (file, "\n(next 0x%lx)", (long) entry->next);
- }
- lf_printf (file, "%s", suffix);
-}
-
-void
-dump_cache_entries (lf *file,
- char *prefix,
- cache_entry *entry,
- char *suffix)
-{
- lf_printf (file, "%s", prefix);
- lf_indent (file, +1);
- while (entry != NULL)
- {
- dump_cache_entry (file, "\n(", entry, ")");
- entry = entry->next;
- }
- lf_indent (file, -1);
- lf_printf (file, "%s", suffix);
-}
-
-static void
-dump_model_data (lf *file,
- char *prefix,
- model_data *entry,
- char *suffix)
-{
- lf_printf (file, "%s(model_data *) 0x%lx", prefix, (long) entry);
- if (entry != NULL)
- {
- lf_indent (file, +1);
- dump_line_ref (file, "\n(line ", entry->line, ")");
- dump_filter (file, "\n(flags ", entry->flags, ")");
- dump_table_entry (file, "\n(entry ", entry->entry, ")");
- dump_table_entry (file, "\n(code ", entry->code, ")");
- lf_printf (file, "\n(next 0x%lx)", (long) entry->next);
- lf_indent (file, -1);
- }
- lf_printf (file, "%s", prefix);
-}
-
-static void
-dump_model_datas (lf *file,
- char *prefix,
- model_data *entry,
- char *suffix)
-{
- lf_printf (file, "%s", prefix);
- lf_indent (file, +1);
- while (entry != NULL)
- {
- dump_model_data (file, "\n(", entry, ")");
- entry = entry->next;
- }
- lf_indent (file, -1);
- lf_printf (file, "%s", suffix);
-}
-
-static void
-dump_model_entry (lf *file,
- char *prefix,
- model_entry *entry,
- char *suffix)
-{
- lf_printf (file, "%s(model_entry *) 0x%lx", prefix, (long) entry);
- if (entry != NULL)
- {
- lf_indent (file, +1);
- dump_line_ref (file, "\n(line ", entry->line, ")");
- dump_filter (file, "\n(flags ", entry->flags, ")");
- lf_printf (file, "\n(name \"%s\")", entry->name);
- lf_printf (file, "\n(full_name \"%s\")", entry->full_name);
- lf_printf (file, "\n(unit_data \"%s\")", entry->unit_data);
- lf_printf (file, "\n(next 0x%lx)", (long) entry->next);
- lf_indent (file, -1);
- }
- lf_printf (file, "%s", prefix);
-}
-
-static void
-dump_model_entries (lf *file,
- char *prefix,
- model_entry *entry,
- char *suffix)
-{
- lf_printf (file, "%s", prefix);
- lf_indent (file, +1);
- while (entry != NULL)
- {
- dump_model_entry (file, "\n(", entry, ")");
- entry = entry->next;
- }
- lf_indent (file, -1);
- lf_printf (file, "%s", suffix);
-}
-
-
-static void
-dump_model_table (lf *file,
- char *prefix,
- model_table *entry,
- char *suffix)
-{
- lf_printf (file, "%s(model_table *) 0x%lx", prefix, (long) entry);
- if (entry != NULL)
- {
- lf_indent (file, +1);
- dump_filter (file, "\n(processors ", entry->processors, ")");
- lf_printf (file, "\n(nr_models %d)", entry->nr_models);
- dump_model_entries (file, "\n(models ", entry->models, ")");
- dump_model_datas (file, "\n(macros ", entry->macros, ")");
- dump_model_datas (file, "\n(data ", entry->data, ")");
- dump_function_entries (file, "\n(statics ", entry->statics, ")");
- dump_function_entries (file, "\n(internals ", entry->functions, ")");
- dump_function_entries (file, "\n(functions ", entry->functions, ")");
- lf_indent (file, -1);
- }
- lf_printf (file, "%s", suffix);
-}
-
-
-static char *
-insn_field_type_to_str (insn_field_type type)
-{
- switch (type)
- {
- case insn_field_invalid: ASSERT (0); return "(invalid)";
- case insn_field_int: return "int";
- case insn_field_reserved: return "reserved";
- case insn_field_wild: return "wild";
- case insn_field_string: return "string";
- }
- ERROR ("bad switch");
- return 0;
-}
-
-void
-dump_insn_field (lf *file,
- char *prefix,
- insn_field_entry *field,
- char *suffix)
-{
- char *sep = " ";
- lf_printf (file, "%s(insn_field_entry *) 0x%lx", prefix, (long) field);
- if (field != NULL)
- {
- lf_indent (file, +1);
- lf_printf (file, "%s(first %d)", sep, field->first);
- lf_printf (file, "%s(last %d)", sep, field->last);
- lf_printf (file, "%s(width %d)", sep, field->width);
- lf_printf (file, "%s(type %s)", sep, insn_field_type_to_str (field->type));
- switch (field->type)
- {
- case insn_field_invalid:
- ASSERT (0);
- break;
- case insn_field_int:
- lf_printf (file, "%s(val 0x%lx)", sep, (long) field->val_int);
- break;
- case insn_field_reserved:
- /* nothing output */
- break;
- case insn_field_wild:
- /* nothing output */
- break;
- case insn_field_string:
- lf_printf (file, "%s(val \"%s\")", sep, field->val_string);
- break;
- }
- lf_printf (file, "%s(next 0x%lx)", sep, (long) field->next);
- lf_printf (file, "%s(prev 0x%lx)", sep, (long) field->prev);
- lf_indent (file, -1);
- }
- lf_printf (file, "%s", suffix);
-}
-
-void
-dump_insn_word_entry (lf *file,
- char *prefix,
- insn_word_entry *word,
- char *suffix)
-{
- lf_printf (file, "%s(insn_word_entry *) 0x%lx", prefix, (long) word);
- if (word != NULL)
- {
- int i;
- insn_field_entry *field;
- lf_indent (file, +1);
- lf_printf (file, "\n(first 0x%lx)", (long) word->first);
- lf_printf (file, "\n(last 0x%lx)", (long) word->last);
- lf_printf (file, "\n(bit");
- for (i = 0; i < options.insn_bit_size; i++)
- lf_printf (file, "\n ((value %d) (mask %d) (field 0x%lx))",
- word->bit[i]->value, word->bit[i]->mask, (long) word->bit[i]->field);
- lf_printf (file, ")");
- for (field = word->first; field != NULL; field = field->next)
- dump_insn_field (file, "\n(", field, ")");
- dump_filter (file, "\n(field_names ", word->field_names, ")");
- lf_printf (file, "\n(next 0x%lx)", (long) word->next);
- lf_indent (file, -1);
- }
- lf_printf (file, "%s", suffix);
-}
-
-static void
-dump_insn_word_entries (lf *file,
- char *prefix,
- insn_word_entry *word,
- char *suffix)
-{
- lf_printf (file, "%s", prefix);
- while (word != NULL)
- {
- dump_insn_word_entry (file, "\n(", word, ")");
- word = word->next;
- }
- lf_printf (file, "%s", suffix);
-}
-
-static void
-dump_insn_model_entry (lf *file,
- char *prefix,
- insn_model_entry *model,
- char *suffix)
-{
- lf_printf (file, "%s(insn_model_entry *) 0x%lx", prefix, (long) model);
- if (model != NULL)
- {
- lf_indent (file, +1);
- dump_line_ref (file, "\n(line ", model->line, ")");
- dump_filter (file, "\n(names ", model->names, ")");
- lf_printf (file, "\n(full_name \"%s\")", model->full_name);
- lf_printf (file, "\n(unit_data \"%s\")", model->unit_data);
- lf_printf (file, "\n(insn (insn_entry *) 0x%lx)", (long) model->insn);
- lf_printf (file, "\n(next (insn_model_entry *) 0x%lx)",
- (long) model->next);
- lf_indent (file, -1);
- }
- lf_printf (file, "%s", suffix);
-}
-
-static void
-dump_insn_model_entries (lf *file,
- char *prefix,
- insn_model_entry *model,
- char *suffix)
-{
- lf_printf (file, "%s", prefix);
- while (model != NULL)
- {
- dump_insn_model_entry (file, "\n", model, "");
- model = model->next;
- }
- lf_printf (file, "%s", suffix);
-}
-
-
-static void
-dump_insn_mnemonic_entry (lf *file,
- char *prefix,
- insn_mnemonic_entry *mnemonic,
- char *suffix)
-{
- lf_printf (file, "%s(insn_mnemonic_entry *) 0x%lx", prefix, (long) mnemonic);
- if (mnemonic != NULL)
- {
- lf_indent (file, +1);
- dump_line_ref (file, "\n(line ", mnemonic->line, ")");
- lf_printf (file, "\n(format \"%s\")", mnemonic->format);
- lf_printf (file, "\n(condition \"%s\")", mnemonic->condition);
- lf_printf (file, "\n(insn (insn_entry *) 0x%lx)",
- (long) mnemonic->insn);
- lf_printf (file, "\n(next (insn_mnemonic_entry *) 0x%lx)",
- (long) mnemonic->next);
- lf_indent (file, -1);
- }
- lf_printf (file, "%s", suffix);
-}
-
-static void
-dump_insn_mnemonic_entries (lf *file,
- char *prefix,
- insn_mnemonic_entry *mnemonic,
- char *suffix)
-{
- lf_printf (file, "%s", prefix);
- while (mnemonic != NULL)
- {
- dump_insn_mnemonic_entry (file, "\n", mnemonic, "");
- mnemonic = mnemonic->next;
- }
- lf_printf (file, "%s", suffix);
-}
-
-void
-dump_insn_entry (lf *file,
- char *prefix,
- insn_entry *entry,
- char *suffix)
-{
- lf_printf (file, "%s(insn_entry *) 0x%lx", prefix, (long) entry);
- if (entry != NULL)
- {
- int i;
- lf_indent (file, +1);
- dump_line_ref (file, "\n(line ", entry->line, ")");
- dump_filter (file, "\n(flags ", entry->flags, ")");
- lf_printf (file, "\n(nr_words %d)", entry->nr_words);
- dump_insn_word_entries (file, "\n(words ", entry->words, ")");
- lf_printf (file, "\n(word");
- for (i = 0; i < entry->nr_models; i++)
- lf_printf (file, " 0x%lx", (long) entry->word[i]);
- lf_printf (file, ")");
- dump_filter (file, "\n(field_names ", entry->field_names, ")");
- lf_printf (file, "\n(format_name \"%s\")", entry->format_name);
- dump_filter (file, "\n(options ", entry->options, ")");
- lf_printf (file, "\n(name \"%s\")", entry->name);
- lf_printf (file, "\n(nr_models %d)", entry->nr_models);
- dump_insn_model_entries (file, "\n(models ", entry->models, ")");
- lf_printf (file, "\n(model");
- for (i = 0; i < entry->nr_models; i++)
- lf_printf (file, " 0x%lx", (long) entry->model[i]);
- lf_printf (file, ")");
- dump_filter (file, "\n(processors ", entry->processors, ")");
- dump_insn_mnemonic_entries (file, "\n(mnemonics ", entry->mnemonics, ")");
- dump_table_entry (file, "\n(code ", entry->code, ")");
- lf_printf (file, "\n(next 0x%lx)", (long) entry->next);
- lf_indent (file, -1);
- }
- lf_printf (file, "%s", suffix);
-}
-
-static void
-dump_insn_entries (lf *file,
- char *prefix,
- insn_entry *entry,
- char *suffix)
-{
- lf_printf (file, "%s", prefix);
- lf_indent (file, +1);
- while (entry != NULL)
- {
- dump_insn_entry (file, "\n(", entry, ")");
- entry = entry->next;
- }
- lf_indent (file, -1);
- lf_printf (file, "%s", suffix);
-}
-
-
-
-void
-dump_insn_table (lf *file,
- char *prefix,
- insn_table *isa,
- char *suffix)
-{
- lf_printf (file, "%s(insn_table *) 0x%lx", prefix, (long) isa);
- if (isa != NULL)
- {
- lf_indent (file, +1);
- dump_cache_entries (file, "\n(caches ", isa->caches, ")");
- lf_printf (file, "\n(nr_insns %d)", isa->nr_insns);
- lf_printf (file, "\n(max_nr_words %d)", isa->max_nr_words);
- dump_insn_entries (file, "\n(insns ", isa->insns, ")");
- dump_function_entries (file, "\n(functions ", isa->functions, ")");
- dump_insn_entry (file, "\n(illegal_insn ", isa->illegal_insn, ")");
- dump_model_table (file, "\n(model ", isa->model, ")");
- dump_filter (file, "\n(flags ", isa->flags, ")");
- dump_filter (file, "\n(options ", isa->options, ")");
- lf_indent (file, -1);
- }
- lf_printf (file, "%s", suffix);
-}
-
-#ifdef MAIN
-
-igen_options options;
-
-int
-main (int argc, char **argv)
-{
- insn_table *isa;
- lf *l;
-
- INIT_OPTIONS (options);
-
- if (argc == 3)
- filter_parse (&options.flags_filter, argv[2]);
- else if (argc != 2)
- error (NULL, "Usage: insn <insn-table> [ <filter-in> ]\n");
-
- isa = load_insn_table (argv[1], NULL);
- l = lf_open ("-", "stdout", lf_omit_references, lf_is_text, "tmp-ld-insn");
- dump_insn_table (l, "(isa ", isa, ")\n");
-
- return 0;
-}
-
-#endif
diff --git a/sim/igen/ld-insn.h b/sim/igen/ld-insn.h
deleted file mode 100644
index 5f9d240bd56..00000000000
--- a/sim/igen/ld-insn.h
+++ /dev/null
@@ -1,703 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1998 Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-
-typedef unsigned64 insn_uint;
-
-
-/* Common among most entries:
-
- All non instruction records have the format:
-
- <...> ::=
- ":" <record-name>
- ":" <filter-flags>
- ":" <filter-models>
- ":" ...
-
- */
-
-enum {
- record_type_field = 1,
- old_record_type_field = 2,
- record_filter_flags_field = 2,
- record_filter_models_field = 3,
-};
-
-
-/* Include:
-
- Include the specified file.
-
- <include> ::=
- ":" "include"
- ":" <filter-flags>
- ":" <filter-models>
- ":" <filename>
- <nl>
- ;
-
- */
-
-enum {
- include_filename_field = 4,
- nr_include_fields,
-};
-
-
-
-/* Options:
-
- Valid options are: hi-bit-nr (default 0), insn-bit-size (default
- 32), insn-specifying-widths (default true), multi-sim (default false).
-
- <option> ::=
- ":" "option"
- ":" <filter-flags>
- ":" <filter-models>
- ":" <option-name>
- ":" <option-value>
- <nl>
- ;
-
- <option-name> ::=
- "insn-bit-size"
- | "insn-specifying-widths"
- | "hi-bit-nr"
- | "flags-filter"
- | "model-filter"
- | "multi-sim"
- | "format-names"
- ;
-
- <option-value> ::=
- "true"
- | "false"
- | <integer>
- | <list>
- ;
-
-
- These update the global options structure. */
-
-
-enum {
- option_name_field = 4,
- option_value_field,
- nr_option_fields,
-};
-
-
-
-/* Macro definitions:
-
- <insn-macro> ::=
- ":" "define"
- ":" <filter-flags>
- ":" <filter-models>
- ":" <name>
- ":" <arg-list>
- ":" <expression>
- <nl>
- ;
-
- <arg-list> ::=
- [ <name> { "," <arg-list> } ]
- ;
-
- */
-
-
-enum {
- macro_name_field = 4,
- macro_args_field,
- macro_expr_field,
- nr_macro_fields,
-};
-
-
-
-/* Functions and internal routins:
-
- NB: <filter-models> and <function-models> are equivalent.
-
-
- <function> ::=
- ":" "function"
- <function-spec>
- ;
-
- <internal> ::=
- ":" "internal"
- <function-spec>
- ;
-
- <format> ::=
- ":" ( "%s" | ... )
- <function-spec>
- ;
-
- <function-model> ::=
- "*" [ <processor-list> ]
- ":"
- <nl>
- ;
-
- <function-spec> ::=
- ":" <filter-flags>
- ":" <filter-models>
- ":" <typedef>
- ":" <name>
- [ ":" <parameter-list> ]
- <nl>
- [ <function-model> ]
- <code-block>
- ;
-
- */
-
-enum {
- function_typedef_field = 4,
- function_name_field,
- function_param_field,
- nr_function_fields,
-};
-
-enum {
- function_model_name_field = 0,
- nr_function_model_fields = 1,
-};
-
-enum {
- old_function_typedef_field = 0,
- old_function_type_field = 2,
- old_function_name_field = 4,
- old_function_param_field = 5,
- nr_old_function_fields = 5, /* parameter-list is optional */
-};
-
-
-typedef struct _function_entry function_entry;
-struct _function_entry {
- line_ref *line;
- filter *flags;
- filter *models;
- char *type;
- char *name;
- char *param;
- table_entry *code;
- int is_internal;
- function_entry *next;
-};
-
-
-typedef void function_entry_handler
-(lf *file,
- function_entry *function,
- void *data);
-
-extern void function_entry_traverse
-(lf *file,
- function_entry *functions,
- function_entry_handler *handler,
- void *data);
-
-
-/* cache-macro:
-
- <cache-macro> ::=
- ":" <macro-type>
- ":" <filter-flags>
- ":" <filter-models>
- ":" <typedef>
- ":" <name>
- ":" <field-name> { "," <field-name> }
- ":" <expression>
- <nl>
- ;
-
- <cache-macro-type> ::=
- "scratch"
- | "cache"
- | "compute"
- ;
-
- <name> ::=
- <ident>
- | <ident> "_is_" <integer>
- ;
-
- A cache entry is defined (for an instruction) when all
- <field-name>s are present as named opcode fields within the
- instructions format.
-
- SCRATCH and CACHE macros are defined during the cache fill stage
- while CACHE and COMPUTE macros are defined during the instruction
- execution stage.
-
- */
-
-enum {
- cache_typedef_field = 4,
- cache_name_field,
- cache_original_fields_field,
- cache_expression_field,
- nr_cache_fields,
-};
-
-typedef enum {
- scratch_value,
- cache_value,
- compute_value,
-} cache_entry_type;
-
-typedef struct _cache_entry cache_entry;
-struct _cache_entry {
- line_ref *line;
- filter *flags;
- filter *models;
- cache_entry_type entry_type;
- char *name;
- filter *original_fields;
- char *type;
- char *expression;
- cache_entry *next;
-};
-
-
-
-/* Model specs:
-
- <model-processor> ::=
- ":" "model"
- ":" <filter-flags>
- ":" <filter-models>
- ":" <processor>
- ":" <BFD-processor>
- ":" <function-unit-data>
- <nl>
- ;
-
- <model-macro> ::=
- ":" "model-macro"
- ":" <filter-flags>
- ":" <filter-models>
- <nl>
- <code-block>
- ;
-
- <model-data> ::=
- ":" "model-data"
- ":" <filter-flags>
- ":" <filter-models>
- <nl>
- <code-block>
- ;
-
- <model-static> ::=
- ":" "model-static"
- <function-spec>
- ;
-
- <model-internal> ::=
- ":" "model-internal"
- <function-spec>
- ;
-
- <model-function> ::=
- ":" "model-internal"
- <function-spec>
- ;
-
- */
-
-enum {
- nr_model_macro_fields = 4,
- nr_model_data_fields = 4,
- nr_model_static_fields = nr_function_fields,
- nr_model_internal_fields = nr_function_fields,
- nr_model_function_fields = nr_function_fields,
-};
-
-typedef struct _model_data model_data;
-struct _model_data {
- line_ref *line;
- filter *flags;
- table_entry *entry;
- table_entry *code;
- model_data *next;
-};
-
-enum {
- model_name_field = 4,
- model_full_name_field,
- model_unit_data_field,
- nr_model_processor_fields,
-};
-
-typedef struct _model_entry model_entry;
-struct _model_entry {
- line_ref *line;
- filter *flags;
- char *name;
- char *full_name;
- char *unit_data;
- model_entry *next;
-};
-
-
-typedef struct _model_table model_table;
-struct _model_table {
- filter *processors;
- int nr_models;
- model_entry *models;
- model_data *macros;
- model_data *data;
- function_entry *statics;
- function_entry *internals;
- function_entry *functions;
-};
-
-
-
-/* Instruction format:
-
- An instruction is composed of a sequence of N bit instruction
- words. Each word broken into a number of instruction fields.
- Those fields being constant (ex. an opcode) or variable (register
- spec).
-
- <insn-word> ::=
- <insn-field> { "," <insn-field> } ;
-
- <insn-field> ::=
- ( <binary-value-implying-width>
- | <field-name-implying-width>
- | [ <start-or-width> "." ] <field>
- )
- { [ "!" | "=" ] [ <value> | <field-name> ] }
- ;
-
- <field> ::=
- { "*" }+
- | { "/" }+
- | <field-name>
- | "0x" <hex-value>
- | "0b" <binary-value>
- | "0" <octal-value>
- | <integer-value> ;
-
-*/
-
-typedef enum _insn_field_cond_type {
- insn_field_cond_value,
- insn_field_cond_field,
-} insn_field_cond_type;
-typedef enum _insn_field_cond_test {
- insn_field_cond_eq,
- insn_field_cond_ne,
-} insn_field_cond_test;
-typedef struct _insn_field_cond insn_field_cond;
-struct _insn_field_cond {
- insn_field_cond_type type;
- insn_field_cond_test test;
- insn_uint value;
- struct _insn_field_entry *field;
- char *string;
- insn_field_cond *next;
-};
-
-
-typedef enum _insn_field_type {
- insn_field_invalid,
- insn_field_int,
- insn_field_reserved,
- insn_field_wild,
- insn_field_string,
-} insn_field_type;
-
-typedef struct _insn_field_entry insn_field_entry;
-struct _insn_field_entry {
- int first;
- int last;
- int width;
- int word_nr;
- insn_field_type type;
- insn_uint val_int;
- char *pos_string;
- char *val_string;
- insn_field_cond *conditions;
- insn_field_entry *next;
- insn_field_entry *prev;
-};
-
-typedef struct _insn_bit_entry insn_bit_entry;
-struct _insn_bit_entry {
- int value;
- int mask;
- insn_field_entry *field;
-};
-
-
-
-
-typedef struct _insn_entry insn_entry; /* forward */
-
-typedef struct _insn_word_entry insn_word_entry;
-struct _insn_word_entry {
- /* list of sub-fields making up the instruction. bit provides
- faster access to the field data for bit N. */
- insn_field_entry *first;
- insn_field_entry *last;
- insn_bit_entry *bit[max_insn_bit_size];
- /* set of all the string fields */
- filter *field_names;
- /* For multi-word instructions, The Nth word (from zero). */
- insn_word_entry *next;
-};
-
-
-
-/* Instruction model:
-
- Provides scheduling and other data for the code modeling the
- instruction unit.
-
- <insn-model> ::=
- "*" [ <processor-list> ]
- ":" [ <function-unit-data> ]
- <nl>
- ;
-
- <processor-list> ::=
- <processor> { "," <processor>" }
- ;
-
- If the <processor-list> is empty, the model is made the default for
- this instruction.
-
- */
-
-enum {
- insn_model_name_field = 0,
- insn_model_unit_data_field = 1,
- nr_insn_model_fields = 1,
-};
-
-typedef struct _insn_model_entry insn_model_entry;
-struct _insn_model_entry {
- line_ref *line;
- insn_entry *insn;
- filter *names;
- char *full_name;
- char *unit_data;
- insn_model_entry *next;
-};
-
-
-
-/* Instruction mnemonic:
-
- List of assembler mnemonics for the instruction.
-
- <insn-mnenonic> ::=
- "\"" <assembler-mnemonic> "\""
- [ ":" <conditional-expression> ]
- <nl>
- ;
-
- An assembler mnemonic string has the syntax:
-
- <assembler-mnemonic> ::=
- ( [ "%" <format-spec> ] "<" <func> [ "#" <param-list> ] ">"
- | "%%"
- | <other-letter>
- )+
-
- Where, for instance, the text is translated into a printf format
- and argument pair:
-
- "<FUNC>" : "%ld", (long) FUNC
- "%<FUNC>..." : "%...", FUNC
- "%s<FUNC>" : "%s", <%s>FUNC (SD_, FUNC)
- "%s<FUNC#P1,P2>" : "%s", <%s>FUNC (SD_, P1,P2)
- "%lx<FUNC>" : "%lx", (unsigned long) FUNC
- "%08lx<FUNC>" : "%08lx", (unsigned long) FUNC
-
- And "<%s>FUNC" denotes a function declared using the "%s" record
- specifier.
-
-
-
- ;
-
- */
-
-enum {
- insn_mnemonic_format_field = 0,
- insn_mnemonic_condition_field = 1,
- nr_insn_mnemonic_fields = 1,
-};
-
-typedef struct _insn_mnemonic_entry insn_mnemonic_entry;
-struct _insn_mnemonic_entry {
- line_ref *line;
- insn_entry *insn;
- char *format;
- char *condition;
- insn_mnemonic_entry *next;
-};
-
-
-
-/* Instruction:
-
- <insn> ::=
- <insn-word> { "+" <insn-word> }
- ":" <format-name>
- ":" <filter-flags>
- ":" <options>
- ":" <name>
- <nl>
- { <insn-model> }
- { <insn-mnemonic> }
- <code-block>
-
- */
-
-enum {
- insn_word_field = 0,
- insn_format_name_field = 1,
- insn_filter_flags_field = 2,
- insn_options_field = 3,
- insn_name_field = 4,
- nr_insn_fields = 5,
-};
-
-
-/* typedef struct _insn_entry insn_entry; */
-struct _insn_entry {
- line_ref *line;
- filter *flags; /* filtered by options.filters */
- char *format_name;
- filter *options;
- char *name;
- /* the words that make up the instruction. Word provides direct
- access to word N. Pseudo instructions can be identified by
- nr_words == 0. */
- int nr_words;
- insn_word_entry *words;
- insn_word_entry **word;
- /* a set of all the fields from all the words */
- filter *field_names;
- /* an array of processor models, missing models are NULL! */
- int nr_models;
- insn_model_entry *models;
- insn_model_entry **model;
- filter *processors;
- /* list of assember formats */
- int nr_mnemonics;
- insn_mnemonic_entry *mnemonics;
- /* code body */
- table_entry *code;
- insn_entry *next;
-};
-
-
-/* Instruction table:
-
- */
-
-typedef struct _insn_table insn_table;
-struct _insn_table {
- cache_entry *caches;
- int max_nr_words;
- int nr_insns;
- insn_entry *insns;
- function_entry *functions;
- insn_entry *illegal_insn;
- model_table *model;
- filter *options;
- filter *flags;
-};
-
-extern insn_table *load_insn_table
-(char *file_name,
- cache_entry *cache);
-
-typedef void insn_entry_handler
-(lf *file,
- insn_table *isa,
- insn_entry *insn,
- void *data);
-
-extern void insn_table_traverse_insn
-(lf *file,
- insn_table *isa,
- insn_entry_handler *handler,
- void *data);
-
-
-
-/* Printing */
-
-extern void print_insn_words
-(lf *file,
- insn_entry *insn);
-
-
-
-/* Debugging */
-
-void
-dump_insn_field
-(lf *file,
- char *prefix,
- insn_field_entry *field,
- char *suffix);
-
-void
-dump_insn_word_entry
-(lf *file,
- char *prefix,
- insn_word_entry *word,
- char *suffix);
-
-void
-dump_insn_entry
-(lf *file,
- char *prefix,
- insn_entry *insn,
- char *suffix);
-
-void
-dump_cache_entries
-(lf *file,
- char *prefix,
- cache_entry *entry,
- char *suffix);
-
-void
-dump_insn_table
-(lf *file,
- char *prefix,
- insn_table *isa,
- char *suffix);
diff --git a/sim/igen/lf.c b/sim/igen/lf.c
deleted file mode 100644
index 1b4a5f136ec..00000000000
--- a/sim/igen/lf.c
+++ /dev/null
@@ -1,418 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1995, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-#include <stdio.h>
-#include <stdarg.h>
-#include <ctype.h>
-
-#include "config.h"
-#include "misc.h"
-#include "lf.h"
-
-#ifdef HAVE_STDLIB_H
-#include <stdlib.h>
-#endif
-
-#ifdef HAVE_STRING_H
-#include <string.h>
-#else
-#ifdef HAVE_STRINGS_H
-#include <strings.h>
-#endif
-#endif
-
-struct _lf {
- FILE *stream;
- int line_nr; /* nr complete lines written, curr line is line_nr+1 */
- int indent;
- int line_blank;
- const char *name;
- const char *program;
- lf_file_references references;
- lf_file_type type;
-};
-
-
-lf *
-lf_open (char *name,
- char *real_name,
- lf_file_references references,
- lf_file_type type,
- const char *program)
-{
- /* create a file object */
- lf *new_lf = ZALLOC(lf);
- ASSERT (new_lf != NULL);
- new_lf->references = references;
- new_lf->type = type;
- new_lf->name = (real_name == NULL ? name : real_name);
- new_lf->program = program;
- /* attach to stdout if pipe */
- if (!strcmp(name, "-")) {
- new_lf->stream = stdout;
- }
- else {
- /* create a new file */
- new_lf->stream = fopen(name, "w");
- if (new_lf->stream == NULL) {
- perror(name);
- exit(1);
- }
- }
- return new_lf;
-}
-
-
-void
-lf_close(lf *file)
-{
- if (file->stream != stdout) {
- if (fclose(file->stream)) {
- perror("lf_close.fclose");
- exit(1);
- }
- free(file);
- }
-}
-
-
-int
-lf_putchr(lf *file,
- const char chr)
-{
- int nr = 0;
- if (chr == '\n') {
- file->line_nr += 1;
- file->line_blank = 1;
- }
- else if (file->line_blank) {
- int pad;
- for (pad = file->indent; pad > 0; pad--)
- putc(' ', file->stream);
- nr += file->indent;
- file->line_blank = 0;
- }
- putc(chr, file->stream);
- nr += 1;
- return nr;
-}
-
-int
-lf_write (lf *file,
- const char *string,
- int strlen_string)
-{
- int nr = 0;
- int i;
- for (i = 0; i < strlen_string; i++)
- nr += lf_putchr (file, string[i]);
- return nr;
-}
-
-
-void
-lf_indent_suppress(lf *file)
-{
- file->line_blank = 0;
-}
-
-
-int
-lf_putstr(lf *file,
- const char *string)
-{
- int nr = 0;
- const char *chp;
- if (string != NULL) {
- for (chp = string; *chp != '\0'; chp++) {
- nr += lf_putchr(file, *chp);
- }
- }
- return nr;
-}
-
-static int
-do_lf_putunsigned(lf *file,
- unsigned u)
-{
- int nr = 0;
- if (u > 0) {
- nr += do_lf_putunsigned(file, u / 10);
- nr += lf_putchr(file, (u % 10) + '0');
- }
- return nr;
-}
-
-
-int
-lf_putint(lf *file,
- int decimal)
-{
- int nr = 0;
- if (decimal == 0)
- nr += lf_putchr(file, '0');
- else if (decimal < 0) {
- nr += lf_putchr(file, '-');
- nr += do_lf_putunsigned(file, -decimal);
- }
- else if (decimal > 0) {
- nr += do_lf_putunsigned(file, decimal);
- }
- else
- ASSERT(0);
- return nr;
-}
-
-
-int
-lf_printf (lf *file,
- const char *fmt,
- ...)
-{
- int nr = 0;
- char buf[1024];
- va_list ap;
-
- va_start (ap, fmt);
- vsprintf (buf, fmt, ap);
- /* FIXME - this is really stuffed but so is vsprintf() on a sun! */
- ASSERT (strlen (buf) < sizeof (buf));
- nr += lf_putstr (file, buf);
- va_end(ap);
- return nr;
-}
-
-
-int
-lf_print__line_ref (lf *file,
- line_ref *line)
-{
- return lf_print__external_ref (file, line->line_nr, line->file_name);
-}
-
-int
-lf_print__external_ref (lf *file,
- int line_nr,
- const char *file_name)
-{
- int nr = 0;
- switch (file->references)
- {
- case lf_include_references:
- lf_indent_suppress(file);
- nr += lf_putstr (file, "#line ");
- nr += lf_putint (file, line_nr);
- nr += lf_putstr (file, " \"");
- nr += lf_putstr (file, file_name);
- nr += lf_putstr (file, "\"\n");
- break;
- case lf_omit_references:
- nr += lf_putstr (file, "/* ");
- nr += lf_putstr (file, file_name);
- nr += lf_putstr (file, ":");
- nr += lf_putint (file, line_nr);
- nr += lf_putstr (file, "*/\n");
- break;
- }
- return nr;
-}
-
-int
-lf_print__internal_ref (lf *file)
-{
- int nr = 0;
- nr += lf_print__external_ref (file, file->line_nr+2, file->name);
- /* line_nr == last_line, want to number from next */
- return nr;
-}
-
-void
-lf_indent (lf *file, int delta)
-{
- file->indent += delta;
-}
-
-
-int
-lf_print__gnu_copyleft (lf *file)
-{
- int nr = 0;
- switch (file->type) {
- case lf_is_c:
- case lf_is_h:
- nr += lf_printf(file, "\
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1997, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- --
-
- This file was generated by the program %s */
-", filter_filename(file->program));
- break;
- default:
- ASSERT(0);
- break;
- }
- return nr;
-}
-
-
-int
-lf_putbin(lf *file, int decimal, int width)
-{
- int nr = 0;
- int bit;
- ASSERT(width > 0);
- for (bit = 1 << (width-1); bit != 0; bit >>= 1) {
- if (decimal & bit)
- nr += lf_putchr(file, '1');
- else
- nr += lf_putchr(file, '0');
- }
- return nr;
-}
-
-int
-lf_print__this_file_is_empty(lf *file,
- const char *reason)
-{
- int nr = 0;
- switch (file->type) {
- case lf_is_c:
- case lf_is_h:
- nr += lf_printf (file,
- "/* This generated file (%s) is intentionally left blank",
- file->name);
- if (reason != NULL)
- nr += lf_printf (file, " - %s", reason);
- nr += lf_printf (file, " */\n");
- break;
- default:
- ERROR ("Bad switch");
- }
- return nr;
-}
-
-int
-lf_print__ucase_filename(lf *file)
-{
- int nr = 0;
- const char *chp = file->name;
- while (*chp != '\0') {
- char ch = *chp;
- if (islower(ch)) {
- nr += lf_putchr(file, toupper(ch));
- }
- else if (ch == '.')
- nr += lf_putchr(file, '_');
- else
- nr += lf_putchr(file, ch);
- chp++;
- }
- return nr;
-}
-
-int
-lf_print__file_start(lf *file)
-{
- int nr = 0;
- switch (file->type) {
- case lf_is_h:
- case lf_is_c:
- nr += lf_print__gnu_copyleft(file);
- nr += lf_printf(file, "\n");
- nr += lf_printf(file, "#ifndef ");
- nr += lf_print__ucase_filename(file);
- nr += lf_printf(file, "\n");
- nr += lf_printf(file, "#define ");
- nr += lf_print__ucase_filename(file);
- nr += lf_printf(file, "\n");
- nr += lf_printf(file, "\n");
- break;
- default:
- ASSERT(0);
- }
- return nr;
-}
-
-
-int
-lf_print__file_finish(lf *file)
-{
- int nr = 0;
- switch (file->type) {
- case lf_is_h:
- case lf_is_c:
- nr += lf_printf(file, "\n");
- nr += lf_printf(file, "#endif /* _");
- nr += lf_print__ucase_filename(file);
- nr += lf_printf(file, "_*/\n");
- break;
- default:
- ASSERT(0);
- }
- return nr;
-}
-
-
-int
-lf_print__function_type (lf *file,
- const char *type,
- const char *prefix,
- const char *trailing_space)
-{
- int nr = 0;
- nr += lf_printf (file, "%s\\\n(%s)", prefix, type);
- if (trailing_space != NULL)
- nr += lf_printf (file, "%s", trailing_space);
- return nr;
-}
-
-int
-lf_print__function_type_function (lf *file,
- print_function *print_type,
- const char *prefix,
- const char *trailing_space)
-{
- int nr = 0;
- nr += lf_printf (file, "%s\\\n(", prefix);
- nr += print_type (file);
- nr += lf_printf (file, ")");
- if (trailing_space != NULL)
- nr += lf_printf (file, "%s", trailing_space);
- return nr;
-}
-
diff --git a/sim/igen/lf.h b/sim/igen/lf.h
deleted file mode 100644
index e968f5f6cb6..00000000000
--- a/sim/igen/lf.h
+++ /dev/null
@@ -1,143 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1997, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-/* LF: Line Numbered Output Stream */
-
-typedef struct _lf lf;
-
-typedef enum {
- lf_is_h,
- lf_is_c,
- lf_is_text,
-} lf_file_type;
-
-
-typedef enum {
- lf_include_references,
- lf_omit_references,
-} lf_file_references;
-
-
-/* Open the file NAME for writing ("-" for stdout). Use REAL_NAME
- when refering to the opened file. Line number information (in the
- output) can be suppressed with FILE_REFERENCES ==
- LF_OMIT_REFERENCES. TYPE is to determine the formatting of some of
- the print messages below. */
-
-extern lf *lf_open
-(char *name,
- char *real_name,
- lf_file_references file_references,
- lf_file_type type,
- const char *program);
-
-extern void lf_close
-(lf *file);
-
-
-/* Basic output functions */
-
-extern int lf_write
-(lf *file,
- const char *string,
- int len);
-
-extern int lf_putchr
-(lf *file,
- const char ch);
-
-extern int lf_putstr
-(lf *file,
- const char *string);
-
-extern int lf_putint
-(lf *file,
- int decimal);
-
-extern int lf_putbin
-(lf *file,
- int decimal,
- int width);
-
-extern int lf_printf
-(lf *file,
- const char *fmt,
- ...) __attribute__((format(printf, 2, 3)));
-
-
-/* Indentation control.
-
- lf_indent_suppress suppresses indentation on the next line (current
- line if that has not yet been started) */
-
-extern void lf_indent_suppress
-(lf *file);
-
-extern void lf_indent
-(lf *file,
- int delta);
-
-
-/* Print generic text: */
-
-
-extern int lf_print__gnu_copyleft
-(lf *file);
-
-extern int lf_print__file_start
-(lf *file);
-
-extern int lf_print__this_file_is_empty
-(lf *file,
- const char *reason);
-
-extern int lf_print__file_finish
-(lf *file);
-
-extern int lf_print__internal_ref
-(lf *file);
-
-extern int lf_print__external_ref
-(lf *file,
- int line_nr,
- const char *file_name);
-
-extern int lf_print__line_ref
-(lf *file,
- line_ref *line);
-
-extern int lf_print__ucase_filename
-(lf *file);
-
-extern int lf_print__function_type
-(lf *file,
- const char *type,
- const char *prefix,
- const char *trailing_space);
-
-typedef int print_function(lf *file);
-
-extern int lf_print__function_type_function
-(lf *file,
- print_function *print_type,
- const char *prefix,
- const char *trailing_space);
-
diff --git a/sim/igen/misc.c b/sim/igen/misc.c
deleted file mode 100644
index 8490132f32e..00000000000
--- a/sim/igen/misc.c
+++ /dev/null
@@ -1,284 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1997, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-#include <stdio.h>
-#include <stdarg.h>
-#include <ctype.h>
-
-#include "config.h"
-#include "misc.h"
-
-#ifdef HAVE_STDLIB_H
-#include <stdlib.h>
-#endif
-
-#ifdef HAVE_STRING_H
-#include <string.h>
-#else
-#ifdef HAVE_STRINGS_H
-#include <strings.h>
-#endif
-#endif
-
-/* NB: Because warning and error can be interchanged, neither append a
- trailing '\n' */
-
-void
-error (const line_ref *line,
- char *msg,
- ...)
-{
- va_list ap;
- if (line != NULL)
- fprintf (stderr, "%s:%d: ", line->file_name, line->line_nr);
- va_start (ap, msg);
- vfprintf (stderr, msg, ap);
- va_end (ap);
- exit (1);
-}
-
-void
-warning (const line_ref *line,
- char *msg,
- ...)
-{
- va_list ap;
- if (line != NULL)
- fprintf (stderr, "%s:%d: warning: ", line->file_name, line->line_nr);
- va_start (ap, msg);
- vfprintf (stderr, msg, ap);
- va_end (ap);
-}
-
-void
-notify (const line_ref *line,
- char *msg,
- ...)
-{
- va_list ap;
- if (line != NULL)
- fprintf (stdout, "%s %d: info: ", line->file_name, line->line_nr);
- va_start(ap, msg);
- vfprintf (stdout, msg, ap);
- va_end(ap);
-}
-
-void *
-zalloc(long size)
-{
- void *memory = malloc(size);
- if (memory == NULL)
- ERROR ("zalloc failed");
- memset(memory, 0, size);
- return memory;
-}
-
-
-unsigned long long
-a2i (const char *a)
-{
- int neg = 0;
- int base = 10;
- unsigned long long num = 0;
- int looping;
-
- while (isspace (*a))
- a++;
-
- if (strcmp (a, "true") == 0
- || strcmp (a, "TRUE") == 0)
- return 1;
-
- if (strcmp (a, "false") == 0
- || strcmp (a, "false") == 0)
- return 0;
-
- if (*a == '-')
- {
- neg = 1;
- a++;
- }
-
- if (*a == '0')
- {
- if (a[1] == 'x' || a[1] == 'X')
- {
- a += 2;
- base = 16;
- }
- else if (a[1] == 'b' || a[1] == 'b')
- {
- a += 2;
- base = 2;
- }
- else
- base = 8;
- }
-
- looping = 1;
- while (looping)
- {
- int ch = *a++;
-
- switch (base)
- {
- default:
- looping = 0;
- break;
-
- case 2:
- if (ch >= '0' && ch <= '1')
- {
- num = (num * 2) + (ch - '0');
- }
- else
- {
- looping = 0;
- }
- break;
-
- case 10:
- if (ch >= '0' && ch <= '9')
- {
- num = (num * 10) + (ch - '0');
- }
- else
- {
- looping = 0;
- }
- break;
-
- case 8:
- if (ch >= '0' && ch <= '7')
- {
- num = (num * 8) + (ch - '0');
- }
- else
- {
- looping = 0;
- }
- break;
-
- case 16:
- if (ch >= '0' && ch <= '9')
- {
- num = (num * 16) + (ch - '0');
- }
- else if (ch >= 'a' && ch <= 'f')
- {
- num = (num * 16) + (ch - 'a' + 10);
- }
- else if (ch >= 'A' && ch <= 'F')
- {
- num = (num * 16) + (ch - 'A' + 10);
- }
- else
- {
- looping = 0;
- }
- break;
- }
- }
-
- if (neg)
- num = - num;
-
- return num;
-}
-
-unsigned
-target_a2i(int ms_bit_nr,
- const char *a)
-{
- if (ms_bit_nr)
- return (ms_bit_nr - a2i(a));
- else
- return a2i(a);
-}
-
-unsigned
-i2target(int ms_bit_nr,
- unsigned bit)
-{
- if (ms_bit_nr)
- return ms_bit_nr - bit;
- else
- return bit;
-}
-
-
-int
-name2i (const char *names,
- const name_map *map)
-{
- const name_map *curr;
- const char *name = names;
- while (*name != '\0')
- {
- /* find our name */
- char *end = strchr(name, ',');
- char *next;
- unsigned len;
- if (end == NULL)
- {
- end = strchr(name, '\0');
- next = end;
- }
- else
- {
- next = end + 1;
- }
- len = end - name;
- /* look it up */
- curr = map;
- while (curr->name != NULL)
- {
- if (strncmp (curr->name, name, len) == 0
- && strlen (curr->name) == len)
- return curr->i;
- curr++;
- }
- name = next;
- }
- /* nothing found, possibly return a default */
- curr = map;
- while (curr->name != NULL)
- curr++;
- if (curr->i >= 0)
- return curr->i;
- else
- error (NULL, "%s contains no valid names", names);
- return 0;
-}
-
-const char *
-i2name (const int i,
- const name_map *map)
-{
- while (map->name != NULL)
- {
- if (map->i == i)
- return map->name;
- map++;
- }
- error (NULL, "map lookup failed for %d\n", i);
- return NULL;
-}
diff --git a/sim/igen/misc.h b/sim/igen/misc.h
deleted file mode 100644
index 10a807fecc8..00000000000
--- a/sim/igen/misc.h
+++ /dev/null
@@ -1,149 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1995, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-/* Frustrating header junk */
-
-#include "config.h"
-
-
-enum {
- default_insn_bit_size = 32,
- max_insn_bit_size = 64,
-};
-
-
-/* Define a 64bit data type */
-
-#if defined __GNUC__ || defined _WIN32
-#ifdef __GNUC__
-
-typedef long long signed64;
-typedef unsigned long long unsigned64;
-
-#else /* _WIN32 */
-
-typedef __int64 signed64;
-typedef unsigned __int64 unsigned64;
-
-#endif /* _WIN32 */
-#else /* Not GNUC or WIN32 */
-/* Not supported */
-#endif
-
-
-#include <stdio.h>
-#include <ctype.h>
-
-#ifdef HAVE_STRING_H
-#include <string.h>
-#else
-#ifdef HAVE_STRINGS_H
-#include <strings.h>
-#endif
-#endif
-
-#ifdef HAVE_STDLIB_H
-#include <stdlib.h>
-#endif
-
-#if !defined (__attribute__) && (!defined(__GNUC__) || __GNUC__ < 2 || (__GNUC__ == 2 && __GNUC_MINOR__ < 7))
-#define __attribute__(arg)
-#endif
-
-
-
-#include "filter_host.h"
-
-typedef struct _line_ref line_ref;
-struct _line_ref {
- const char *file_name;
- int line_nr;
-};
-
-/* Error appends a new line, warning and notify do not */
-typedef void error_func
-(const line_ref *line,
- char *msg,
- ...);
-
-extern error_func error;
-extern error_func warning;
-extern error_func notify;
-
-
-#define ERROR(EXPRESSION) \
-do { \
- line_ref line; \
- line.file_name = filter_filename (__FILE__); \
- line.line_nr = __LINE__; \
- error (&line, EXPRESSION); \
-} while (0)
-
-#define ASSERT(EXPRESSION) \
-do { \
- if (!(EXPRESSION)) { \
- line_ref line; \
- line.file_name = filter_filename (__FILE__); \
- line.line_nr = __LINE__; \
- error(&line, "assertion failed - %s\n", #EXPRESSION); \
- } \
-} while (0)
-
-#define ZALLOC(TYPE) ((TYPE*) zalloc (sizeof(TYPE)))
-#define NZALLOC(TYPE,N) ((TYPE*) zalloc (sizeof(TYPE) * (N)))
-#if 0
-#define STRDUP(STRING) (strcpy (zalloc (strlen (STRING) + 1), (STRING)))
-#define STRNDUP(STRING,LEN) (strncpy (zalloc ((LEN) + 1), (STRING), (LEN)))
-#endif
-
-extern void *zalloc
-(long size);
-
-extern unsigned target_a2i
-(int ms_bit_nr,
- const char *a);
-
-extern unsigned i2target
-(int ms_bit_nr,
- unsigned bit);
-
-extern unsigned long long a2i
-(const char *a);
-
-
-/* Try looking for name in the map table (returning the corresponding
- integer value).
-
- If the the sentinal (NAME == NULL) its value if >= zero is returned
- as the default. */
-
-typedef struct _name_map {
- const char *name;
- int i;
-} name_map;
-
-extern int name2i
-(const char *name,
- const name_map *map);
-
-extern const char *i2name
-(const int i,
- const name_map *map);
diff --git a/sim/igen/table.c b/sim/igen/table.c
deleted file mode 100644
index f6a9e9bb3fc..00000000000
--- a/sim/igen/table.c
+++ /dev/null
@@ -1,632 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1995,1997 Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-#include <sys/types.h>
-#include <sys/stat.h>
-#include <stdio.h>
-#include <fcntl.h>
-#include <ctype.h>
-
-#include "config.h"
-#include "misc.h"
-#include "lf.h"
-#include "table.h"
-
-#ifdef HAVE_UNISTD_H
-#include <unistd.h>
-#endif
-
-#ifdef HAVE_STDLIB_H
-#include <stdlib.h>
-#endif
-
-typedef struct _open_table open_table;
-struct _open_table {
- size_t size;
- char *buffer;
- char *pos;
- line_ref pseudo_line;
- line_ref real_line;
- open_table *parent;
- table *root;
-};
-struct _table {
- open_table *current;
-};
-
-
-static line_ref *
-current_line (open_table *file)
-{
- line_ref *entry = ZALLOC (line_ref);
- *entry = file->pseudo_line;
- return entry;
-}
-
-static table_entry *
-new_table_entry (open_table *file,
- table_entry_type type)
-{
- table_entry *entry;
- entry = ZALLOC (table_entry);
- entry->file = file->root;
- entry->line = current_line (file);
- entry->type = type;
- return entry;
-}
-
-static void
-set_nr_table_entry_fields (table_entry *entry,
- int nr_fields)
-{
- entry->field = NZALLOC (char*, nr_fields + 1);
- entry->nr_fields = nr_fields;
-}
-
-
-void
-table_push (table *root,
- line_ref *line,
- table_include *includes,
- const char *file_name)
-{
- FILE *ff;
- open_table *file;
- table_include dummy;
- table_include *include = &dummy;
-
- /* dummy up a search of this directory */
- dummy.next = includes;
- dummy.dir = "";
-
- /* create a file descriptor */
- file = ZALLOC (open_table);
- if (file == NULL)
- {
- perror (file_name);
- exit (1);
- }
- file->root = root;
- file->parent = root->current;
- root->current = file;
-
- while (1)
- {
- /* save the file name */
- char *dup_name = NZALLOC (char, strlen (include->dir) + strlen (file_name) + 2);
- if (dup_name == NULL)
- {
- perror (file_name);
- exit (1);
- }
- if (include->dir[0] != '\0')
- {
- strcat (dup_name, include->dir);
- strcat (dup_name, "/");
- }
- strcat (dup_name, file_name);
- file->real_line.file_name = dup_name;
- file->pseudo_line.file_name = dup_name;
- /* open the file */
-
- ff = fopen (dup_name, "rb");
- if (ff)
- break;
- /* zfree (dup_name); */
- if (include->next == NULL)
- {
- if (line != NULL)
- error (line, "Problem opening file `%s'\n", file_name);
- perror (file_name);
- exit (1);
- }
- include = include->next;
- }
-
-
- /* determine the size */
- fseek (ff, 0, SEEK_END);
- file->size = ftell (ff);
- fseek (ff, 0, SEEK_SET);
-
- /* allocate this much memory */
- file->buffer = (char*) zalloc (file->size + 1);
- if (file->buffer == NULL)
- {
- perror (file_name);
- exit (1);
- }
- file->pos = file->buffer;
-
- /* read it all in */
- if (fread (file->buffer, 1, file->size, ff) < file->size) {
- perror (file_name);
- exit (1);
- }
- file->buffer[file->size] = '\0';
-
- /* set the initial line numbering */
- file->real_line.line_nr = 1; /* specifies current line */
- file->pseudo_line.line_nr = 1; /* specifies current line */
-
- /* done */
- fclose (ff);
-}
-
-table *
-table_open (const char *file_name)
-{
- table *root;
-
- /* create a file descriptor */
- root = ZALLOC (table);
- if (root == NULL)
- {
- perror (file_name);
- exit (1);
- }
-
- table_push (root, NULL, NULL, file_name);
- return root;
-}
-
-char *
-skip_spaces (char *chp)
-{
- while (1)
- {
- if (*chp == '\0'
- || *chp == '\n'
- || !isspace (*chp))
- return chp;
- chp++;
- }
-}
-
-
-char *
-back_spaces (char *start, char *chp)
-{
- while (1)
- {
- if (chp <= start
- || !isspace (chp[-1]))
- return chp;
- chp--;
- }
-}
-
-char *
-skip_digits (char *chp)
-{
- while (1)
- {
- if (*chp == '\0'
- || *chp == '\n'
- || !isdigit (*chp))
- return chp;
- chp++;
- }
-}
-
-char *
-skip_to_separator (char *chp,
- char *separators)
-{
- while (1)
- {
- char *sep = separators;
- while (1)
- {
- if (*chp == *sep)
- return chp;
- if (*sep == '\0')
- break;
- sep++;
- }
- chp++;
- }
-}
-
-static char *
-skip_to_null (char *chp)
-{
- return skip_to_separator (chp, "");
-}
-
-
-static char *
-skip_to_nl (char * chp)
-{
- return skip_to_separator (chp, "\n");
-}
-
-
-static void
-next_line (open_table *file)
-{
- file->pos = skip_to_nl (file->pos);
- if (*file->pos == '0')
- error (&file->pseudo_line, "Missing <nl> at end of line\n");
- *file->pos = '\0';
- file->pos += 1;
- file->real_line.line_nr += 1;
- file->pseudo_line.line_nr += 1;
-}
-
-
-extern table_entry *
-table_read (table *root)
-{
- open_table *file = root->current;
- table_entry *entry = NULL;
- while(1)
- {
-
- /* end-of-file? */
- while (*file->pos == '\0')
- {
- if (file->parent != NULL)
- {
- file = file->parent;
- root->current = file;
- }
- else
- return NULL;
- }
-
- /* code_block? */
- if (*file->pos == '{')
- {
- char *chp;
- next_line (file); /* discard leading brace */
- entry = new_table_entry (file, table_code_entry);
- chp = file->pos;
- /* determine how many lines are involved - look for <nl> "}" */
- {
- int nr_lines = 0;
- while (*file->pos != '}')
- {
- next_line (file);
- nr_lines++;
- }
- set_nr_table_entry_fields (entry, nr_lines);
- }
- /* now enter each line */
- {
- int line_nr;
- for (line_nr = 0; line_nr < entry->nr_fields; line_nr++)
- {
- if (strncmp (chp, " ", 2) == 0)
- entry->field[line_nr] = chp + 2;
- else
- entry->field[line_nr] = chp;
- chp = skip_to_null (chp) + 1;
- }
- /* skip trailing brace */
- ASSERT (*file->pos == '}');
- next_line (file);
- }
- break;
- }
-
- /* tab block? */
- if (*file->pos == '\t')
- {
- char *chp = file->pos;
- entry = new_table_entry (file, table_code_entry);
- /* determine how many lines are involved - look for <nl> !<tab> */
- {
- int nr_lines = 0;
- int nr_blank_lines = 0;
- while (1)
- {
- if (*file->pos == '\t')
- {
- nr_lines = nr_lines + nr_blank_lines + 1;
- nr_blank_lines = 0;
- next_line (file);
- }
- else
- {
- file->pos = skip_spaces (file->pos);
- if (*file->pos != '\n')
- break;
- nr_blank_lines++;
- next_line (file);
- }
- }
- set_nr_table_entry_fields (entry, nr_lines);
- }
- /* now enter each line */
- {
- int line_nr;
- for (line_nr = 0; line_nr < entry->nr_fields; line_nr++)
- {
- if (*chp == '\t')
- entry->field[line_nr] = chp + 1;
- else
- entry->field[line_nr] = ""; /* blank */
- chp = skip_to_null (chp) + 1;
- }
- }
- break;
- }
-
- /* cpp directive? */
- if (file->pos[0] == '#')
- {
- char *chp = skip_spaces (file->pos + 1);
-
- /* cpp line-nr directive - # <line-nr> "<file>" */
- if (isdigit (*chp)
- && *skip_digits (chp) == ' '
- && *skip_spaces (skip_digits (chp)) == '"')
- {
- int line_nr;
- char *file_name;
- file->pos = chp;
- /* parse the number */
- line_nr = atoi(file->pos) - 1;
- /* skip to the file name */
- while (file->pos[0] != '0'
- && file->pos[0] != '"'
- && file->pos[0] != '\0')
- file->pos++;
- if (file->pos[0] != '"')
- error (&file->real_line, "Missing opening quote in cpp directive\n");
- /* parse the file name */
- file->pos++;
- file_name = file->pos;
- while (file->pos[0] != '"'
- && file->pos[0] != '\0')
- file->pos++;
- if (file->pos[0] != '"')
- error (&file->real_line, "Missing closing quote in cpp directive\n");
- file->pos[0] = '\0';
- file->pos++;
- file->pos = skip_to_nl (file->pos);
- if (file->pos[0] != '\n')
- error (&file->real_line, "Missing newline in cpp directive\n");
- file->pseudo_line.file_name = file_name;
- file->pseudo_line.line_nr = line_nr;
- next_line (file);
- continue;
- }
-
- /* #define and #undef - not implemented yet */
-
- /* Old style # comment */
- next_line (file);
- continue;
- }
-
- /* blank line or end-of-file? */
- file->pos = skip_spaces (file->pos);
- if (*file->pos == '\0')
- error (&file->pseudo_line, "Missing <nl> at end of file\n");
- if (*file->pos == '\n')
- {
- next_line (file);
- continue;
- }
-
- /* comment - leading // or # - skip */
- if ((file->pos[0] == '/' && file->pos[1] == '/')
- || (file->pos[0] == '#'))
- {
- next_line (file);
- continue;
- }
-
- /* colon field */
- {
- char *chp = file->pos;
- entry = new_table_entry (file, table_colon_entry);
- next_line (file);
- /* figure out how many fields */
- {
- int nr_fields = 1;
- char *tmpch = chp;
- while (1)
- {
- tmpch = skip_to_separator (tmpch, "\\:");
- if (*tmpch == '\\')
- {
- /* eat the escaped character */
- char *cp = tmpch;
- while (cp[1] != '\0')
- {
- cp[0] = cp[1];
- cp++;
- }
- cp[0] = '\0';
- tmpch++;
- }
- else if (*tmpch != ':')
- break;
- else
- {
- *tmpch = '\0';
- tmpch++;
- nr_fields++;
- }
- }
- set_nr_table_entry_fields (entry, nr_fields);
- }
- /* now parse them */
- {
- int field_nr;
- for (field_nr = 0; field_nr < entry->nr_fields; field_nr++)
- {
- chp = skip_spaces (chp);
- entry->field[field_nr] = chp;
- chp = skip_to_null (chp);
- *back_spaces (entry->field[field_nr], chp) = '\0';
- chp++;
- }
- }
- break;
- }
-
- }
-
- ASSERT (entry == NULL || entry->field[entry->nr_fields] == NULL);
- return entry;
-}
-
-extern void
-table_print_code (lf *file,
- table_entry *entry)
-{
- int field_nr;
- int nr = 0;
- for (field_nr = 0;
- field_nr < entry->nr_fields;
- field_nr++)
- {
- char *chp = entry->field[field_nr];
- int in_bit_field = 0;
- if (*chp == '#')
- lf_indent_suppress(file);
- while (*chp != '\0')
- {
- if (chp[0] == '{'
- && !isspace(chp[1])
- && chp[1] != '\0')
- {
- in_bit_field = 1;
- nr += lf_putchr(file, '_');
- }
- else if (in_bit_field && chp[0] == ':')
- {
- nr += lf_putchr(file, '_');
- }
- else if (in_bit_field && *chp == '}')
- {
- nr += lf_putchr(file, '_');
- in_bit_field = 0;
- }
- else
- {
- nr += lf_putchr(file, *chp);
- }
- chp++;
- }
- if (in_bit_field)
- {
- line_ref line = *entry->line;
- line.line_nr += field_nr;
- error (&line, "Bit field brace miss match\n");
- }
- nr += lf_putchr(file, '\n');
- }
-}
-
-
-
-void
-dump_line_ref (lf *file,
- char *prefix,
- const line_ref *line,
- char *suffix)
-{
- lf_printf (file, "%s(line_ref*) 0x%lx", prefix, (long) line);
- if (line != NULL)
- {
- lf_indent (file, +1);
- lf_printf (file, "\n(line_nr %d)", line->line_nr);
- lf_printf (file, "\n(file_name %s)", line->file_name);
- lf_indent (file, -1);
- }
- lf_printf (file, "%s", suffix);
-}
-
-
-static const char *
-table_entry_type_to_str (table_entry_type type)
-{
- switch (type)
- {
- case table_code_entry: return "code-entry";
- case table_colon_entry: return "colon-entry";
- }
- return "*invalid*";
-}
-
-void
-dump_table_entry(lf *file,
- char *prefix,
- const table_entry *entry,
- char *suffix)
-{
- lf_printf (file, "%s(table_entry*) 0x%lx", prefix, (long) entry);
- if (entry != NULL)
- {
- int field;
- lf_indent (file, +1);
- dump_line_ref (file, "\n(line ", entry->line, ")");
- lf_printf (file, "\n(type %s)", table_entry_type_to_str (entry->type));
- lf_printf (file, "\n(nr_fields %d)", entry->nr_fields);
- lf_printf (file, "\n(fields");
- lf_indent (file, +1);
- for (field = 0; field < entry->nr_fields; field++)
- lf_printf (file, "\n\"%s\"", entry->field[field]);
- lf_indent (file, -1);
- lf_printf (file, ")");
- lf_indent (file, -1);
- }
- lf_printf (file, "%s", suffix);
-}
-
-
-#ifdef MAIN
-int
-main(int argc, char **argv)
-{
- table *t;
- table_entry *entry;
- lf *l;
- int line_nr;
-
- if (argc != 2)
- {
- printf("Usage: table <file>\n");
- exit (1);
- }
-
- t = table_open (argv[1]);
- l = lf_open ("-", "stdout", lf_omit_references, lf_is_text, "tmp-table");
-
- line_nr = 0;
- do
- {
- char line[10];
- entry = table_read (t);
- line_nr ++;
- sprintf (line, "(%d ", line_nr);
- dump_table_entry (l, line, entry, ")\n");
- }
- while (entry != NULL);
-
- return 0;
-}
-#endif
diff --git a/sim/igen/table.h b/sim/igen/table.h
deleted file mode 100644
index e0bc81bf38e..00000000000
--- a/sim/igen/table.h
+++ /dev/null
@@ -1,155 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1995, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-/* Read a table, line by line, from a file.
-
- A table line has several forms:
-
- Field line:
-
- <text> { ":" <text> }
- type == table_colon_entry
-
- Fields points to a NULL terminated list of pointers.
-
- Tab indented block:
-
- <tab> <text> <nl> { <tab> <text> <nl> }
- type == table_code_entry
-
- The leading tab at the start of each line is discarded.
- fields[i] is the i'th line with the <nl> discarded.
-
-
- Code block:
-
- "{" <ignore-text> <nl> { <text> <nl> } "}" <ignore-text> <nl>
- type == table_code_entry
-
- The leading/trailing {/} lines are discarded.
- Lines containing two leading spaces have those spaces striped.
- fields[i] is the i'th line with the <nl> discarded.
-
- In addition, the table parser reconises and handles internally the
- following (when not in a code block):
-
- "#" <line-nr> '"' <file> '"'
-
- As per CPP/CC, treat following lines as if they were taken from
- <file> starting at <line-nr>
-
- No support for CPP's "#if/#else/#endif" style conditions are
- planned. */
-
-typedef struct _table table;
-
-typedef enum {
- table_colon_entry,
- table_code_entry,
-} table_entry_type;
-
-
-typedef struct _table_entry table_entry;
-struct _table_entry {
- table *file;
- line_ref *line;
- table_entry_type type;
- int nr_fields;
- char **field;
-};
-
-/* List of directories to search when opening a pushed file. Current
- directory is always searched first */
-typedef struct _table_include table_include;
-struct _table_include {
- char *dir;
- table_include *next;
-};
-
-
-/* Open/read a table file. Since the file is read once during open
- (and then closed immediatly) there is no close method. */
-
-extern table *table_open
-(const char *file_name);
-
-extern table_entry *table_read
-(table *file);
-
-
-/* Push the the state of the current file and open FILE_NAME. When
- the end of FILE_NAME is reached, return to the pushed file */
-
-extern void table_push
-(table *file,
- line_ref *line,
- table_include *search,
- const char *file_name);
-
-
-/* Expand the specified field_nr using the internal expansion table.
- A field is only expanded when explicitly specified. */
-
-extern void table_expand_field
-(table_entry *entry,
- int field_nr);
-
-
-/* Given a code entry, write the code to FILE. Since any
- leading/trailing braces were striped as part of the read, they are
- not written. */
-
-extern void table_print_code
-(lf *file,
- table_entry *entry);
-
-
-/* Debugging */
-
-extern void dump_line_ref
-(lf *file,
- char *prefix,
- const line_ref *line,
- char *suffix);
-
-extern void dump_table_entry
-(lf *file,
- char *prefix,
- const table_entry *entry,
- char *suffix);
-
-
-
-/* Utilities for skipping around text */
-
-extern char *skip_digits
-(char *chp);
-
-extern char *skip_spaces
-(char *chp);
-
-extern char *skip_to_separator
-(char *chp,
- char *separators);
-
-extern char *back_spaces
-(char *start,
- char *chp);
diff --git a/sim/m32r/ChangeLog b/sim/m32r/ChangeLog
deleted file mode 100644
index 3fe36f56bf1..00000000000
--- a/sim/m32r/ChangeLog
+++ /dev/null
@@ -1,1364 +0,0 @@
-2001-07-05 Ben Elliston <bje@redhat.com>
-
- * Makefile.in (stamp-arch): Use $(CGEN_CPU_DIR).
- (stamp-cpu): Likewise.
- (stamp-xcpu): Likewise.
-
-2001-03-05 Dave Brolley <brolley@redhat.com>
-
- arch.c: Regenerate.
- arch.h: Regenerate.
- cpu.c: Regenerate.
- cpu.h: Regenerate.
- cpuall.h: Regenerate.
- cpux.c: Regenerate.
- cpux.h: Regenerate.
- decode.c: Regenerate.
- decode.h: Regenerate.
- decodex.c: Regenerate.
- decodex.h: Regenerate.
- model.c: Regenerate.
- modelx.c: Regenerate.
- sem-switch.c: Regenerate.
- sem.c: Regenerate.
- semx-switch.c: Regenerate.
-
-2001-01-12 Frank Ch. Eigler <fche@redhat.com>
-
- * configure: Regenerated with sim_scache fix.
-
-2000-11-18 Greg McGary <greg@mcgary.org>
-
- * Makefile.in: remove `@true' commands for rules that have
- $(CGEN_MAINT) as a prerequisite.
-
-2000-10-06 Dave Brolley <brolley@redhat.com>
-
- * sem.c: Regenerated.
- * sem-switch.c: Regenerated.
- * semx-switch.c: Regenerated.
-
-2000-08-28 Dave Brolley <brolley@redhat.com>
-
- * Makefile.in: Use of @true confuses VPATH. Remove it.
- * cpu.h: Regenerated.
- * cpux.h: Regenerated.
- * decode.c: Regenerated.
- * decodex.c: Regenerated.
- * model.c: Regenerated.
- * modelx.c: Regenerated.
- * sem-switch.c: Regenerated.
- * sem.c: Regenerated.
- * semx-switch.c: Regenerated.
-
-2000-08-21 Frank Ch. Eigler <fche@redhat.com>
-
- * Makefile.in (m32r-clean): Add stamp-arch, stamp-cpu.
- (stamp-arch, stamp-cpu): New targets.
-
-Tue May 23 21:39:23 2000 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-2000-03-30 Dave Brolley <brolley@redhat.com>
-
- * configure: Regenerated.
-
-1999-10-04 Doug Evans <devans@casey.cygnus.com>
-
- * arch.c,arch.h,cpuall.h: Rebuild.
- * cpux.h,decodex.c,decodex.h,modelx.c,semx-switch.c: Rebuild.
-
-1999-09-29 Doug Evans <devans@casey.cygnus.com>
-
- * mloop.in: Update call to sim_engine_invalid_insn.
- * sem.c,sem-switch.c: Rebuild.
- * traps.c (sim_engine_invalid_insn): New arg `vpc'. Change type of
- result to SEM_PC. Return vpc.
- * mloopx.in: Ditto.
- * semx-switch.c: Rebuild.
-
-Wed Sep 29 14:47:20 1999 Dave Brolley <brolley@cygnus.com>
-
- * traps.c (sim_engine_invalid_insn): Return PC.
-
-Thu Sep 2 18:15:53 1999 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-1999-09-01 Doug Evans <devans@casey.cygnus.com>
-
- * decodex.c: Rebuild.
-
-1999-08-28 Doug Evans <devans@casey.cygnus.com>
-
- * sem.c: Rebuild
-
- * cpux.h: Rebuild.
-
-1999-08-09 Doug Evans <devans@casey.cygnus.com>
-
- * cpu.h,decode.c,decode.h,model.c,sem-switch.c,sem.c: Rebuild.
- * cpux.h,decodex.c,decodex.h,modelx.c,semx-switch.c: Rebuild.
-
-1999-08-04 Doug Evans <devans@casey.cygnus.com>
-
- * m32r-sim.h (SEM_SKIP_INSN): Delete.
- * cpu.h,cpuall.h,decode.c,model.c,sem-switch.c,sem.c: Rebuild.
- * cpux.h,decodex.c,modelx.c,semx-switch.c: Rebuild.
- * mloopx.in (emit_parallel): Call SEM_SKIP_COMPILE.
- (emit_full_parallel): Ditto.
-
-1999-05-08 Felix Lee <flee@cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Fri Apr 16 16:47:43 1999 Doug Evans <devans@charmed.cygnus.com>
-
- * devices.c (device_io_read_buffer): New arg `sd'.
- (device_io_write_buffer): New arg `sd'.
- (device_error): Give proper arg spec.
-
-1999-04-10 Doug Evans <devans@casey.cygnus.com>
-
- * sem-switch.c,sem.c: Rebuild.
- * cpux.h,semx-switch.c: Rebuild.
-
-1999-03-27 Doug Evans <devans@casey.cygnus.com>
-
- * decode.c: Rebuild.
- * decodex.c: Rebuild.
-
-1999-03-26 Doug Evans <devans@casey.cygnus.com>
-
- * m32r-sim.h (M32R_DEVICE_LEN): Fix off by one error.
-
-1999-03-22 Doug Evans <devans@casey.cygnus.com>
-
- * arch.c,arch.h,model.c: Rebuild.
- * modelx.c: Rebuild.
- * m32r-sim.h (a_m32r_h_gr_get,a_m32r_h_gr_set): Declare.
- (a_m32r_h_cr_get,a_m32r_h_cr_set): Declare.
- * m32r.c (m32rbf_fetch_register): Replace calls to a_m32r_h_pc_get,
- a_m32r_h_accum_get with appropriate calls to m32rbf_*.
- (m32rbf_store_register): Ditto.
- (a_m32r_h_gr_get,a_m32r_h_gr_set): New functions.
- (a_m32r_h_cr_get,a_m32r_h_cr_set): Ditto.
- * sim-if.c (sim_open): Update call to m32r_cgen_cpu_open.
- * traps.c (m32r_core_signal): Replace calls to a_m32r_h_*,
- with appropriate calls to m32rbf_*.
-
-1999-03-11 Doug Evans <devans@casey.cygnus.com>
-
- * arch.c,arch.h,cpu.c,cpu.h,sem.c,sem-switch.c: Rebuild.
- * cpux.c,cpux.h,semx-switch.c: Rebuild.
- * m32r-sim.h (GET_H_*,SET_H_*, except GET_H_SM): Delete.
- * sim-if.c (sim_open): Update call to m32r_cgen_cpu_open.
-
-1999-02-25 Doug Evans <devans@casey.cygnus.com>
-
- * cpu.c,cpu.h: Rebuild.
-
-1999-02-09 Doug Evans <devans@casey.cygnus.com>
-
- * Makefile.in (SIM_EXTRA_DEPS): Add m32r-desc.h, delete cpu-opc.h.
- (stamp-xmloop): s/-parallel/-parallel-write/.
- * configure.in (sim_link_files,sim_link_links): Delete.
- * configure: Rebuild.
- * decode.c,decode.h,model.c,sem-switch.c,sem.c: Rebuild.
- * decodex.c,decodex.h,modelx.c,semx-switch.c: Rebuild.
- * mloop.in (execute): CGEN_INSN_ATTR renamed to CGEN_INSN_ATTR_VALUE.
- * sim-if.c (sim_open): m32r_cgen_cpu_open renamed from
- m32r_cgen_opcode_open. Set disassembler.
- (sim_close): m32r_cgen_cpu_open renamed from m32r_cgen_opcode_open.
- * sim-main.h: Don't include cpu-opc.h,cpu-sim.h. Include
- m32r-desc.h,m32r-opc.h,m32r-sim.h.
-
-Thu Feb 4 16:04:26 1999 Doug Evans <devans@canuck.cygnus.com>
-
- * cpux.h,decodex.c,modelx.c,semx-switch.c: Regenerate.
-
-1999-01-27 Doug Evans <devans@casey.cygnus.com>
-
- * cpu.h,decode.c,model.c,sem-switch.c,sem.c: Rebuild.
- * cpux.h,decodex.c,modelx.c,semx-switch.c: Rebuild.
-
-1999-01-15 Doug Evans <devans@casey.cygnus.com>
-
- * decode.h,model.c: Regenerate.
- * decodex.h,modelx.c: Regenerate.
-
-1999-01-14 Doug Evans <devans@casey.cygnus.com>
-
- * arch.c,arch.h,cpuall.h: Regenerate.
- * cpu.c,cpu.h,decode.c,decode.h,model.c,sem-switch.c,sem.c: Regenerate.
- * traps.c (sim_engine_invalid_insn): PCADDR->IADDR.
- * cpux.c,cpux.h,decodex.c,decodex.h,modelx.c,semx-switch.c: Regenerate.
-
-1999-01-11 Doug Evans <devans@casey.cygnus.com>
-
- * Makefile.in (m32r-clean): rm eng.h.
- * sim-main.h: Delete inclusion of ansidecl.h.
- * cpu.h: Regenerate.
- * cpux.h: Regenerate.
-
-1999-01-06 Doug Evans <devans@casey.cygnus.com>
-
- * cpu.h: Regenerate.
- * cpux.h: Regenerate.
-
-1999-01-05 Doug Evans <devans@casey.cygnus.com>
-
- * Makefile.in (MAIN_INCLUDE_DEPS): Delete.
- (INCLUDE_DEPS,OPS_INCLUDE_DEPS): Delete.
- (sim-if.o): Use SIM_MAIN_DEPS.
- (arch.o,traps.o,devices.o): Ditto.
- (M32RBF_INCLUDE_DEPS): Use CGEN_MAIN_CPU_DEPS.
- (m32r.o,mloop.o,cpu.o,decode.o,sem.o,model.o): Simplify dependencies.
- (m32rx.o,mloopx.o,cpux.o,decodex.o,semx.o,modelx.o): Ditto.
- * cpu.c,cpu.h,decode.c,model.c,sem-switch.c,sem.c: Regenerate.
- * m32r-sim.h (m32rbf_h_cr_[gs]et_handler): Declare.
- ([GS]ET_H_CR): Define.
- (m32rbf_h_psw_[gs]et_handler): Declare.
- ([GS]ET_H_PSW): Define.
- (m32rbf_h_accum_[gs]et_handler): Declare.
- ([GS]ET_H_ACCUM): Define.
- (m32rxf_h_{cr,psw,accum}_[gs]et_handler): Declare.
- (m32rxf_h_accums_[gs]et_handler): Declare.
- ([GS]ET_H_ACCUMS): Define.
- * sim-if.c (sim_open): Model probing code moved to sim-model.c.
- * m32r.c (WANT_CPU): Define as m32rbf.
- (all register access fns): Rename to ..._handler.
- * cpux.c,cpux.h,decodex.c,modelx.c,semx.c: Regenerate.
- * m32rx.c (WANT_CPU): Define as m32rxf.
- (all register access fns): Rename to ..._handler.
-
-1998-12-14 Doug Evans <devans@casey.cygnus.com>
-
- * configure.in: --enable-cgen-maint support moved to common/aclocal.m4.
- (SIM_AC_OPTION_ALIGNMENT): Make strict.
- * configure: Regenerate.
-
- * sem-switch.c,sem.c,semx-switch.c: Regenerate.
- * sim-main.h (SIM_ENGINE_HALT_HOOK,SIM_ENGINE_RESTART_HOOK): Define.
- * traps.c (m32r_core_signal): Handle --environment=operating.
-
-1998-12-09 Doug Evans <devans@casey.cygnus.com>
-
- * cpu.h,decode.c,sem-switch.c,sem.c: Regenerate.
- * cpux.h,decodex.c,semx-switch.c: Regenerate.
-
- * sim-if.c: Include string.h or strings.h if present.
-
-1998-12-04 Doug Evans <devans@casey.cygnus.com>
-
- * configure.in: Call SIM_AC_OPTION_INLINE.
- * configure: Regenerate.
- * sim-main.h: Protect against multiple inclusion.
- Don't include cgen-scache.h,cgen-cpu.h,cgen-trace.h,cpuall.h.
- Done by cgen-sim.h now.
- * tconfig.in (SIM_HAVE_MODEL): Delete, moved to cgen-types.h.
- * cpuall.h: Regenerate.
- * cpu.h,decode.c,sem-switch.c,sem.c: Regenerate.
- * mloop.in (extract16): Make static inline again.
- Simplify with call to @cpu@_fill_argbuf,@cpu@_fill_argbuf_tp.
- (extract32): Ditto.
- Simplify with call to @cpu@_fill_argbuf,@cpu@_fill_argbuf_tp.
- (execute): Test ARGBUF_PROFILE_P before profiling.
- Update calls to TRACE_INSN_INIT,TRACE_INSN_FINI.
- * cpux.h,decodex.c,modelx.c,semx-switch.c: Regenerate.
- * mloopx.in: Rewrite.
-
-1998-11-22 Doug Evans <devans@tobor.to.cygnus.com>
-
- * devices.c (device_io_write_buffer): Fix typo.
- * sim-if.c (sim_open): Hack in call to dv_sockser_install.
- * tconfig.in (HAVE_DV_SOCKSER): Add but comment out.
-
-1998-11-18 Doug Evans <devans@casey.cygnus.com>
-
- * Makefile.in (M32R_OBJS): Delete extract.o.
- (extract.o): Delete.
- * cpu.c,cpu.h,decode.c,decode.h,sem-switch.c,sem.c: Rebuild.
- * mloop.in (extract16): Update type of `insn' arg.
- Delete call to d->extract.
- (extract32): Ditto.
- * cpux.c,cpux.h,decodex.c,decodex.h,semx-switch.c: Rebuild.
- * mloopx.in (extractx16): Update type of `insn' arg.
- Delete call to d->extract. Delete arg pbb_p. All callers updated.
- (extract-simple,full-exec-simple,fast-exec-simple): Delete.
- (extractx32): Ditto.
-
-Wed Nov 4 23:55:37 1998 Doug Evans <devans@seba.cygnus.com>
-
- * sim-main.h: Delete inclusion of config.h, include sim-basics.h
- before cgen-types.h.
- * tconfig.in: Guard against multiple inclusion.
- * cpu.h: Delete decls moved to genmloop.sh.
- * cpux.h: Ditto.
-
-Mon Oct 19 14:13:05 1998 Doug Evans <devans@seba.cygnus.com>
-
- * sim-main.h: #include cpu-opc.h.
- * arch.c,arch.h,decode.c,extract.c,model.c,sem.c: Regenerate
- to get #include cleanup.
- * decodex.c,extractx.c,modelx.c: Ditto.
-
- * Makefile.in (SIM_EXTRA_DEPS): Replace cgen headers with
- CGEN_INCLUDE_DEPS.
- (M32RBF_INCLUDE_DEPS): Define.
- (m32r .o's): Depend on it.
- (mloop.c): Update call to genmloop.sh.
- * cpu.h,cpuall.h: Regenerate.
- * sim-main.h: Delete inclusion of cpu.h,decode.h, moved to cpuall.h.
- #include cgen-scache.h,cgen-cpu.h.
- * tconfig.in (WITH_FOO semantic macros): Delete.
- * Makefile.in (M32RXF_INCLUDE_DEPS): Define.
- (m32rx .o's): Depend on it.
- (mloopx.c): Update call to genmloop.sh.
- * cpux.h: Regenerate.
-
-Fri Oct 16 09:15:29 1998 Doug Evans <devans@charmed.cygnus.com>
-
- * sim-if.c (sim_do_command): Handle "sim info reg {bbpsw,bbpc}".
-
-Fri Oct 9 16:11:58 1998 Doug Evans <devans@seba.cygnus.com>
-
- Add pseudo-basic-block execution support.
- * Makefile.in (SIM_OBJS): Add sim-reg.o, cgen-run.o, sim-stop.o.
- (SIM_EXTRA_DEPS): Add include/opcode/cgen.h.
- (INCLUDE_DEPS): Delete cpu-sim.h, include/opcode/cgen.h.
- (mloop.c): Build pseudo-basic-block version. Depend on stamp-cpu.
- * arch.c,arch.h,cpuall.h: Regenerate.
- * cpu.c,cpu.h,decode.c,decode.h,extract.c,model.c: Regenerate.
- * sem-switch.c,sem.c: Regenerate.
- * m32r-sim.h (M32R_MISC_PROFILE): New members load_regs,
- load_regs_pending.
- * m32r.c (m32rbf_fetch_register): Renamed from m32rb_fetch_register.
- (m32rbf_store_register,m32rbf_h_cr_get,m32rbf_h_cr_set,
- m32rbf_h_psw_get,m32rbf_h_psw_set,m32rbf_h_accum_get,
- m32rbf_h_accum_set): Likewise.
- (m32r_model_{init,update}_insn_cycles): Delete.
- (m32rbf_model_insn_{before,after}): New fns.
- (m32r_model_record_cti,m32r_model_record_cycles): Delete.
- (m32rb_model_mark_get_h_gr,m32rb_model_mark_set_h_gr): Delete.
- (m32rb_model_mark_busy_reg,m32rb_model_mark_unbusy_reg): Delete.
- (check_load_stall): New fn.
- (m32rbf_model_m32r_d_u_{exec,cmp,mac,cti,load,store}): New fns.
- (m32rbf_model_test_u_exec): New fn.
- * mloop.in: Rewrite, use pbb support.
- * sim-if.c (sim_stop,sim_sync_stop,sim_resume): Delete.
- (sim_fetch_register,sim_store_register): Delete.
- * sim-main.h (CIA_GET,CIA_SET): Fix.
- (SIM_ENGINE_HALT_HOOK,SIM_ENGINE_RESTART_HOOK): Delete.
- * tconfig.in (WITH_SCACHE_PBB): Define.
- (WITH_SCACHE_PBB_M32RBF): Define.
- * traps.c (sim_engine_invalid_insn): Renamed from ..._illegal_....
- (m32r_trap): Pass pc to sim_engine_halt.
- * configure.in (SIM_AC_OPTION_SCACHE): Change 1024 to 16384.
- * configure: Regenerate.
- * Makefile.in (M32RX_OBJS): Delete semx.o, add extract.o.
- (mloopx.c): Build pseudo-basic-block version.
- (semx.o): Delete.
- (extractx.o): Add.
- * cpux.c,cpux.h,decodex.c,decodex.h,modelx.c: Regenerate.
- * readx.c: Delete.
- * semx.c: Delete.
- * extractx.c: New file.
- * semx-switch.c: New file.
- * m32r-sim.h (BRANCH_NEW_PC): Delete.
- (SEM_SKIP_INSN): New macro.
- * m32rx.c (m32rxf_fetch_register): Renamed from m32rx_fetch_register.
- (m32rxf_store_register,m32rxf_h_cr_get,m32rxf_h_cr_set,
- m32rxf_h_psw_get,m32rxf_h_psw_set,m32rxf_h_accum_get,
- m32rxf_h_accum_set,m32rxf_h_accums_get,m32rxf_h_accums_set): Likewise.
- (m32rxf_model_insn_{before,after}): New fns.
- (m32rx_model_mark_get_h_gr,m32rx_model_mark_set_h_gr): Delete.
- (m32rx_model_mark_busy_reg,m32rx_model_mark_unbusy_reg): Delete.
- (check_load_stall): New fn.
- (m32rxf_model_m32rx_u_{exec,cmp,mac,cti,load,store}): New fns.
- * mloopx.in: Rewrite, use pbb support.
- * tconfig.in (WITH_SCACHE_PBB_M32RXF): Define.
- (WITH_SEM_SWITCH_FULL): Change from 0 to 1.
-
-Wed Sep 16 18:22:27 1998 Doug Evans <devans@canuck.cygnus.com>
-
- * m32r-sim.h ({PSW,CBR,SPI,SPU,BPC,BBPSW,BBPC}_REGNUM): New macros.
- ({ACC1L,ACC1H}_REGNUM): New macros.
- (m32r_decode_gdb_ctrl_regnum): Add prototype.
- * m32r.c (m32r_decode_gdb_ctrl_regnum): New function.
- (m32r_fetch_register,m32r_store_register): Rewrite.
- * m32rx.c (m32rx_fetch_register,m32rx_store_register): Rewrite.
-
-Tue Sep 15 15:01:14 1998 Doug Evans <devans@canuck.cygnus.com>
-
- * m32r-sim.h (GET_H_SM): New macro.
- (UART params): Update to msa2000.
- * devices.c (device_io_read_buffer): Update to msa2000.
- * m32r.c (m32rb_h_cr_get,m32rb_h_cr_set): Handle bbpc,bbpsw.
- (m32rb_h_psw_get,m32rb_h_psw_set): New functions.
- * arch.c,arch.h,cpu.c,cpu.h,sem-switch.c,sem.c: Regenerate.
- * m32rx.c (m32rx_h_cr_get,m32rx_h_cr_set): Handle bbpc,bbpsw.
- (m32rx_h_psw_get,m32rx_h_psw_set): New functions.
- * cpux.c,cpux.h,readx.c,semx.c: Regenerate.
-
-Wed Sep 9 15:29:36 1998 Doug Evans <devans@canuck.cygnus.com>
-
- * m32r-sim.h (m32r_trap): Update prototype.
- * traps.c (m32r_trap): New arg `pc'.
- * sem.c,sem-switch.c: Regenerated.
- * cpux.h,readx.c,semx.c: Regenerated.
-
-Mon Aug 3 12:59:17 1998 Doug Evans <devans@seba.cygnus.com>
-
- Rename cpu m32r to m32rb to distinguish from architecture name.
- * Makefile.in (mloop.c): cpu m32r renamed to m32rb.
- * sim-main.h (WANT_CPU_M32RB): Renamed from WANT_CPU_M32R.
- * tconfig.in (WANT_CPU_M32RB): Ditto.
- * m32r.c (WANT_CPU_M32RB): Ditto.
- (*): m32r_ cpu fns renamed to m32rb_.
- * sim-if.c (sim_stop,sim_sync_stop,sim_resume): Update.
- * arch.h,arch.c: Regenerate.
- * cpu.c,cpu.h,decode.c,decode.h,extract.c,model.c: Regenerate.
- * sem-switch.c,sem.c: Regenerate.
-
- * sim-if.c (sim_open): Don't allocate memory on top of any user
- specified memory.
- (h_gr_get,h_gr_set): Delete.
- * sim-main.h (h_gr_get,h_gr_set): Delete.
- * traps.c (m32r_trap): Replace calls to h_gr_[gs]et with
- a_m32r_h_gr_[gs]et.
-
- * Makefile.in (INCLUDE_DEPS): Add include/opcode/cgen.h.
-
- * sim-if.c (sim_open): Open opcode table.
- (sim_close): Close it.
-
-Tue Jul 28 13:06:19 1998 Doug Evans <devans@canuck.cygnus.com>
-
- Add support for new versions of mulwhi,mulwlo,macwhi,macwlo that
- accept an accumulator choice.
- * cpux.c,decodex.c,decodex.h,modelx.c,readx.c,semx.c: Regenerate.
-
-Fri Jul 24 13:00:29 1998 Doug Evans <devans@canuck.cygnus.com>
-
- * m32r.c: Include cgen-mem.h.
- * traps.c (m32r_trap): Tweak for -Wall.
- * m32rx.c: Include cgen-mem.h.
- * semx.c: Regenerate, get -Wall cleanups.
-
-Tue Jul 21 16:53:10 1998 Doug Evans <devans@seba.cygnus.com>
-
- * cpu.h,extract.c: Regenerate. pc-rel calcs done on f_dispNN now.
- * cpux.h,readx.c,semx.c: Ditto.
-
-Wed Jul 1 16:51:15 1998 Doug Evans <devans@seba.cygnus.com>
-
- * Makefile.in: cgen_maint -> CGEN_MAINT.
- * configure.in: AC_SUBST cgen,cgendir. No longer look for guile.
- * configure: Regenerate.
- * arch.c,arch.h,cpuall.h: Regenerate.
- * cpu.c,cpu.h,decode.c,decode.h,extract.c,model.c: Regenerate.
- * sem-switch.c,sem.c: Regenerate.
- * cpux.c,cpux.h,decodex.c,decodex.h,modelx.c,readx.c: Regenerate.
- * semx.c: Regenerate.
- * mloopx.in (icount): Moved here from genmloop.sh.
-
-Sat Jun 13 07:49:23 1998 Doug Evans <devans@fallis.cygnus.com>
-
- * m32r-sim.h (M32R_MISC_PROFILE): New members insn_cycles, cti_stall,
- load_stall,biggest_cycles.
- * m32r.c (m32r_model_mark_get_h_gr): Update.
- (m32r_model_init_insn_cycles,m32r_model_update_insn_cycles): New fns.
- (m32r_model_record_cti,m32r_model_record_cycles): New functions.
- * mloop.in: Call cycle init/update fns.
- * model.c: Regenerate.
- * m32rx.c (m32rx_model_mark_get_h_gr): Update.
- * mloopx.in: Call cycle init/update fns.
- * modelx.c: Regenerate.
-
-Wed Jun 10 17:39:29 1998 Doug Evans <devans@canuck.cygnus.com>
-
- * traps.c: New file. Trap support moved here from sim-if.c.
- * Makefile.in (SIM_OBJS): Add traps.o
- * sim-if.c: Don't include targ-vals.h.
- (sim_engine_illegal_insn): Moved to traps.c
- * sim-main.h (SIM_CORE_SIGNAL): Define.
- (m32r_core_signal): Declare.
- * m32r-sim.h (m32r_trap): Declare.
-
- * devices.c (device_io_read_buffer): Handle cache purging via MCCR
- register.
-
- * m32r-sim.h (M32R_MISC_PROFILE): Move here from sim-main.h.
- (PROFILE_COUNT_SHORTINSNS,PROFILE_COUNT_LONGINSNS): New macros.
- (TRAP_SYSCALL,TRAP_BREAKPOINT): New macros.
-
- * extract.c,sem-switch.c,sem.c: Regenerate.
- * cpux.h,readx.c,semx.c: Regenerate.
-
-Wed May 20 00:10:40 1998 Doug Evans <devans@seba.cygnus.com>
-
- * m32r-sim.h (PROFILE_COUNT_PARINSNS): New macro.
- * mloopx.in (extract): Set abuf.addr for proper fill nop counting.
- (execute): Count parallel insns.
- * sim-if.c (print_m32r_misc_cpu): Print count.
- * sim-main.h (M32R_MISC_PROFILE): New member parallel_count.
-
- Zero bottom two bits of pc in jmp,jl insns.
- * sem.c,sem-switch.c: Regenerate.
- * semx.c: Regenerate.
-
-Tue May 19 16:45:33 1998 Doug Evans <devans@seba.cygnus.com>
-
- * sim-if.c (do_trap): Treat traps 2-15 as hardware does.
-
-Sat May 16 13:04:30 1998 Doug Evans <devans@seba.cygnus.com>
-
- * sim-if.c (sim_stop): Update call to @cpu@_engine_stop.
- (sim_sync_stop): New function.
-
-Fri May 15 16:43:27 1998 Doug Evans <devans@seba.cygnus.com>
-
- * Makefile.in (devices.o): Add dependencies.
-
- * arch.h,cpu.c,cpu.h,cpuall.h: Regenerate.
- * sem-switch.c,sem.c: Regenerate.
- * mloop.in (execute): Update calls to TRACE_INSN_{INIT,FINI}.
- * cpux.c,cpux.h,modelx.c,semx.c: Regenerate.
- * m32rx.c (m32rx_model_mark_{busy,unbusy}_reg): New functions.
- * mloopx.in (execute): Update calls to TRACE_INSN_{INIT,FINI}.
- Fix pc value passed to TRACE_INSN for second parallel insn.
-
-Thu May 7 02:51:35 1998 Doug Evans <devans@seba.cygnus.com>
-
- * Makefile.in (SIM_OBJS): Add sim-cpu.o.
-
-Wed May 6 14:51:39 1998 Doug Evans <devans@seba.cygnus.com>
-
- * arch.h,arch.c,cpu.h,cpuall.h: Regenerate, tweaks mostly.
- * model.c: Ditto. Reorganize model/mach data.
- * cpux.h: Ditto.
- * modelx.c: Ditto.
-
- * Makefile.in (m32r.o,mloop.o,cpu.o,model.o): Add decode.h dependency.
- (m32rx.o,mloopx.o,cpux.o,modelx.o): Add decodex.h dependency.
- * decode.c,decode.h: Regenerate, introduces IDESC table.
- * mloop.in (extract16,extract32): Add IDESC support.
- Update names of semantic handler member names.
- (execute): Ditto. Delete call to PROFILE_COUNT_INSN.
- * decodex.c,decodex.h: Regenerate, introduces IDESC table.
- * mloopx.in: Add IDESC support.
- Update names of semantic handler member names.
- Delete call to PROFILE_COUNT_INSN.
-
- * sem-switch.c: Regenerate. Redo computed goto label handling.
- * sem.c: Regenerate. Call PROFILE_COUNT_INSN.
- * readx.c: Regenerate. Redo computed goto label handling.
- * semx.c: Regenerate. Call PROFILE_COUNT_INSN. Finish profiling
- support.
-
- * m32r.c (m32r_fetch_register): Change result type and args to
- conform to sim_fetch_register interface.
- (m32r_store_register): Ditto for sim_store_register interface.
- * m32rx.c (m32rx_fetch_register): Change result type and args to
- conform to sim_fetch_register interface.
- (m32rx_store_register): Ditto for sim_store_register interface.
-
- * sim-if.c (alloc_cpu): Delete.
- (free_state): Uninstall modules here ...
- (sim_open): ... and not here. Call sim_cpu_alloc_all.
- Set default architecture/model if not specified.
- (sim_fetch_register,sim_store_register): Rewrite.
-
- * sim-if.c (h_pc_get,h_pc_set): Delete. Renamed to sim_pc_[gs]et
- and moved to common/sim-cpu.c.
- (sim_create_inferior): Update.
- (do_trap): Update.
- * sim-main.h (h_pc_get,h_pc_set): Delete.
-
- * sim-main.h (sim_cia): Change to USI.
- (sim_cpu): Move m32r_misc_profile before machine generated part.
-
-Tue Apr 28 18:33:31 1998 Geoffrey Noer <noer@cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Tue Apr 28 18:05:53 1998 Nick Clifton <nickc@cygnus.com>
-
- * model.c: Rebuilt.
- * modelx.c: Rebuilt.
-
-Mon Apr 27 15:36:30 1998 Doug Evans <devans@seba.cygnus.com>
-
- * cpu.h,model.c,sem-switch.c,sem.c: Regenerated. Mostly comment
- and variable renaming due to macro insn additions.
- * mloop.in: Update to use CGEN_INSN_NUM.
- * cpux.h,modelx.c,readx.c,semx.c: Regenerated.
- * mloopx.in: Update to use CGEN_INSN_NUM.
-
-Sun Apr 26 15:31:55 1998 Tom Tromey <tromey@creche>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
- * config.in: Ditto.
-
-Sun Apr 26 15:20:05 1998 Tom Tromey <tromey@cygnus.com>
-
- * acconfig.h: New file.
- * configure.in: Reverted change of Apr 24; use sinclude again.
-
-Fri Apr 24 14:16:40 1998 Tom Tromey <tromey@creche>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
- * config.in: Ditto.
-
-Fri Apr 24 11:19:26 1998 Tom Tromey <tromey@cygnus.com>
-
- * configure.in: Don't call sinclude.
-
-Mon Apr 20 16:12:35 1998 Doug Evans <devans@canuck.cygnus.com>
-
- * cpu.c,sem.c,sem-switch.c: Regenerate. From
- - cgen/m32r.cpu (h-accum): Add attribute FUN-ACCESS.
- * m32r.c (m32r_h_accum_get,m32r_h_accum_set): New functions.
- #include cgen-ops.h.
- * cpux.c,readx.c,semx.c: Regenerate.
- * m32rx.c (m32r_h_accum_get,m32r_h_accum_set): New functions.
- #include cgen-ops.h. Delete inclusion of several unnecessary headers.
- (m32r_h_accums_get): Sign extend top 8 bits.
-
-Tue Apr 14 14:04:07 1998 Doug Evans <devans@canuck.cygnus.com>
-
- * semx.c: Regenerate.
-
-Fri Apr 10 18:22:41 1998 Doug Evans <devans@canuck.cygnus.com>
-
- * cpu.h,decode.c,decode.h,extract.c,sem.c,sem-switch.c: Regenerate.
- * cpux.h,decodex.c,decodex.h,readx.c,semx.c: Regenerate.
-
-Sat Apr 4 20:36:25 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Fri Mar 27 16:15:52 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Wed Mar 25 12:35:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Wed Mar 18 12:38:12 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Sat Mar 14 20:53:36 1998 Doug Evans <devans@seba.cygnus.com>
-
- * config.in (HAVE_FCNTL_H): Add.
- * configure: Regenerate.
- * Makefile.in (SIM_OBJS): Add devices.o.
- * m32r-sim.h (m32r_devices): Renamed from m32r_mspr_device.
- (UART_*): Define m32r serial port parameters.
- (M32R_DEVICE_ADDR,M32R_DEVICE_LEN): Define.
- * m32r.c (device_io_{read,write}_buffer,device_error): Move from here,
- * devices.c: To here.
- * sim-if.c: Don't include signal.h,sim-core.h.
- (sim_open): Use M32R_DEVICE_{ADDR,LEN} in sim_core_attach call.
- (sim_resume): Call sim_module_{resume,suspend}.
- * m32r.c (m32r_h_cr_{get,set}): Use register number enums.
-
- * tconfig.in (SIM_HANDLES_LMA): Define.
-
- * sim-if.c (do_trap): Result is new pc.
- Handle --environment=operating.
- * sem-switch.c,sem.c: Regenerate.
- * semx.c: Regenerate.
-
-Wed Mar 11 14:07:39 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-if.c (syscall_read_mem, syscall_write_mem): Replace
- sim_core_*_map with read_map, write_map, exec_map resp.
-
-Wed Mar 4 11:36:51 1998 Doug Evans <devans@seba.cygnus.com>
-
- * Makefile.in (SIM_EXTRA_DEPS): Add cpu-opc.h.
- (arch.o): Delete cpu-opc.h dependency.
- (decode.o,model.o): Likewise.
- (decodex.o,modelx.o): Likewise.
-
- * cpu.h,model.c,sem-switch.c,sem.c: Regenerate.
- * cpux.h,decodex.[ch],modelx.c,readx.c,semx.c: Regenerate.
-
-Thu Feb 26 18:38:35 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-if.c (sim_open): Initialize PROFILE_INFO_CPU_CALLBACK.
-
- * sim-if.c (sim_info): Delete.
-
-Fri Feb 27 10:14:29 1998 Doug Evans <devans@canuck.cygnus.com>
-
- * mloopx.in: Fix handling of branch in parallel with another insn.
- * semx.c: Regenerate.
-
-Mon Feb 23 13:30:46 1998 Doug Evans <devans@seba.cygnus.com>
-
- * sim-main.h: #include symcat.h.
- * m32r-sim.h (BRANCH_NEW_PC): Delete current_cpu arg.
- (NEW_PC_{BASE,SKIP,2,4,BRANCH_P}): New macros.
- * cpu.[ch],decode.[ch],extract.c,model.c: Regenerate.
- * sem.c,sem-switch.c: Regenerate.
- * m32r-sim.h (SEM_NEXT_PC): Modify to handle parallel exec.
- * mloopx.in: Rewrite.
- * cpux.[ch],decodex.[ch],readx.c,semx.c: Regenerate.
-
-Mon Feb 23 12:27:52 1998 Nick Clifton <nickc@cygnus.com>
-
- * m32r.c (m32r_h_cr_set, m32r_h_cr_get): Shadow control register 6
- in the backup PC register.
- * m32rx.c (m32r_h_cr_set, m32r_h_cr_get): Shadow control register 6
- in the backup PC register.
-
-Thu Feb 19 16:39:35 1998 Doug Evans <devans@canuck.cygnus.com>
-
- * m32r.c (do_lock,do_unlock): Delete.
- * cpu.[ch],decode.[ch],extract.c,model.c: Regenerate.
- * sem.c,sem-switch.c: Regenerate.
- * cpux.[ch],decodex.[ch],readx.c,semx.c: Regenerate.
-
-Tue Feb 17 18:18:10 1998 Doug Evans <devans@seba.cygnus.com>
-
- * Makefile.in (M32R_OBJS): Add cpu.o.
- (cpu.o): Add rule for.
- (NL_TARGET): Define.
- * configure.in: Add AC_CHECK_PROG(SCHEME).
- * cpu.c: New file.
- * cpuall.h,cpu.h,decode.c,decode.h,extract.c,model.c: Regenerate.
- * sem-switch.c,sem.c: Regenerate.
- * mloop.in (execute): Update call to semantic fn.
- (M32RX_OBJS): Add cpux.o.
- (cpux.o): Add rule for.
- cpux.c: New file.
- * cpux.h,decodex.c,decodex.h,modelx.c,readx.c,semx.c: Regenerate.
- * m32rx.c (m32rx_h_accums_{get,set}): Rewrite.
- (m32rx_h_cr_{get,set}): New functions.
- (m32rx_h_accums_{get,set}): New functions.
- * mloopx.in: Rewrite main loop.
-
- * m32r.c (do_trap): Move from here.
- * sim-if.c (do_trap): To here, and rewrite to use CB_SYSCALL support.
- (sim_create_inferior): Use h_pc_set.
- (h_pc_{get,set}): New functions.
- (h_gr_{get,set}): New functions.
- (syscall_{read,write}_mem): New functions.
- * sim-main.h (h_{gr,pc}_{get,set}): Declare.
-
-Tue Feb 17 12:44:38 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-if.c (sim_store_register, sim_fetch_register): Pass in
- length parameter. Return -1.
- (sim_create_inferior): Pass 4 sim_store_register.
-
-Wed Feb 11 19:53:48 1998 Doug Evans <devans@canuck.cygnus.com>
-
- * sim-main.h (CIA_GET,CIA_SET): Provide dummy definitions for now.
-
- * decode.c, decode.h, sem.c, sem-switch.c, model.c: Regenerate.
- * cpux.c, decodex.c, decodex.h, readx.c, semx.c, modelx.c: Regenerate.
-
-Mon Feb 9 19:41:54 1998 Doug Evans <devans@canuck.cygnus.com>
-
- * decode.c, sem.c: Regenerate.
- * cpux.h, decodex.c, readx.c, semx.c: Regenerate.
- * m32rx.c (m32rx_h_accums_set): New function.
- (m32rx_model_mark_[gs]et_h_gr): New function.
- * mloopx.in: Rewrite.
- * Makefile.in (mloopx.o): Build with -parallel.
- * sim-main.h (_sim_cpu): Delete member `par_exec'.
- * tconfig.in (WITH_SEM_SWITCH_FULL): Define as 0 for m32rx.
-
-Thu Feb 5 12:44:31 1998 Doug Evans <devans@seba.cygnus.com>
-
- * Makefile.in (m32r.o): Depend on cpu.h
- (extract.o): Pass -DSCACHE_P.
- * mloop.in (extract{16,32}): Update call to m32r_decode.
- * arch.h,cpu.h,cpuall.h,decode.[ch]: Regenerate.
- * extract.c,model.c,sem-switch.c,sem.c: Regenerate.
- * sim-main.h: #include "ansidecl.h".
- Don't include cpu-opc.h, done by arch.h.
- * Makefile.in (M32RX_OBJS): Build m32rx support now.
- (m32rx.o): New rule.
- * m32r-sim.h (m32rx_h_cr_[gs]et): Define.
- * m32rx.c (m32rx_{fetch,store}_register): Update {get,set} of PC.
- (m32rx_h_accums_get): New function.
- * mloopx.in: Update call to m32rx_decode. Rewrite exec loop.
- * cpux.h,decodex.[ch],modelx.c,readx.c,semx.c: Regenerate.
-
-Sun Feb 1 16:47:51 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Sat Jan 31 18:15:41 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Thu Jan 29 11:22:00 1998 Doug Evans <devans@canuck.cygnus.com>
-
- * Makefile.in (M32RX_OBJS): Comment out until m32rx port working.
- * arch.h (HAVE_CPU_M32R{,X}): Delete, moved to m32r-opc.h.
- * arch.c (machs): Check ifdef HAVE_CPU_FOO for each entry.
-
-Tue Jan 20 14:16:02 1998 Nick Clifton <nickc@cygnus.com>
-
- * cpux.h: Fix duplicate definition of h_accums field for
- fmt_53_sadd structure.
-
-Tue Jan 20 01:42:17 1998 Doug Evans <devans@seba.cygnus.com>
-
- * Makefile.in: Add m32rx objs, and rules to build them.
- * cpux.h, decodex.h, decodex.c, readx.c, semx.c, modelx.c: New files.
- * m32rx.c, mloopx.in: New files.
-
-Mon Jan 19 22:26:29 1998 Doug Evans <devans@seba>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Mon Jan 19 14:13:40 1998 Doug Evans <devans@seba.cygnus.com>
-
- * arch.c, arch.h, cpuall.h: New files.
- * arch-defs.h: Deleted.
- * mloop.in: Renamed from mainloop.in.
- * Makefile.in: Update.
- * sem-ops.h: Deleted.
- * mem-ops.h: Deleted.
- (arch): Renamed from CPU.
- * cpu.h: New file.
- * decode.c: Redone.
- * decode.h: Redone.
- * extract.c: Redone.
- * model.c: Redone.
- * sem-switch.c: Redone.
- * sem.c: Renamed from semantics.c, and redone.
- * m32r-sim.h (PROFILE_COUNT_FILLNOPS): Update.
- (GETTWI,SETTWI,BRANCH_NEW_PC): Define.
- * m32r.c (WANT_CPU,WANT_CPU_M32R): Define.
- (m32r_{fetch,store}_register): New functions.
- (model_mark_{get,set}_h_gr): Prefix with m32r_.
- (m32r_model_mark_{busy,unbusy}_reg): Prefix with m32r_.
- (h_cr_{get,set}): Prefix with m32r_.
- (do_trap): Fetch state from current_cpu, not current_state.
- Call sim_engine_halt instead of engine_halt.
- * sim-if.c (alloc_cpu): New function.
- (free_state): New function.
- (sim_open): Call sim_state_alloc, and malloc space for selected cpu
- type. Call sim_analyze_program.
- (sim_create_inferior): Handle selected cpu type when setting PC.
- (sim_resume): Handle m32rx.
- (sim_stop_reason): Deleted.
- (print_m32r_misc_cpu): Update.
- (sim_{fetch,store}_register): Handle m32rx.
- (sim_{read,write}): Deleted.
- (sim_engine_illegal_insn): New function.
- * sim-main.h: Don't include arch-defs.h,sim-core.h,sim-events.h.
- Include arch.h,cpuall.h. Include cpu.h,decode.h if m32r.
- Include cpux.h,decodex.h if m32rx.
- (_sim_cpu): Include member appropriate cpu_data member for the cpu.
- (M32R_MISC_PROFILE): Renamed from M32R_PROFILE.
- (sim_state): Delete members core,events,halt_jmp_buf.
- Change `cpu' member to be a pointer to the cpu's struct, rather than
- record inside the state struct.
- * tconfig.in (WITH_DEVICES): Define here.
- (WITH_FAST,WITH_SEM_SWITCH_{FULL,FAST}): Define for the cpu.
-
-Fri Jan 16 12:16:56 1998 Nick Clifton <nickc@cygnus.com>
-
- * arch-defs.h (INSN_NAME): Fix typo.
-
-Mon Dec 15 23:17:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
- * config.in: Ditto.
-
-Thu Dec 4 09:21:05 1997 Doug Evans <devans@canuck.cygnus.com>
-
- * m32r-sim.h (MSPR_ADDR): New macro.
- (m32r_mspr_device): Declare.
- (struct _device): Define.
- * m32r.c (m32r_mspr_device): New global.
- (device_{io_{read,write}_buffer,error}): New functions.
- * mem-ops.h (SETMEM*): Use sim_core_write_map, not read map.
- * sim-if.c: Delete redundant inclusion of cpu-sim.h.
- (sim_open): Attach device to handle MSPR register.
- * sim-main.h (WITH_DEVICES): Define as 1.
- Include cpu-sim.h.
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Wed Dec 3 18:08:44 1997 Doug Evans <devans@canuck.cygnus.com>
-
- * configure.in (SIM_AC_OPTION_ENVIRONMENT): Call.
- * configure: Regenerated.
-
-Wed Nov 19 12:17:08 1997 Doug Evans <devans@canuck.cygnus.com>
-
- * mem-ops.h: Rename SIM_SIG{ACCESS,ALIGN} to SIM_SIG{SEGV,BUS}.
- * sim-if.c (sim_open): Call sim_config.
- (sim_stop_reason): Update call to sim_signal_to_host.
-
-Tue Nov 18 15:33:48 1997 Doug Evans <devans@canuck.cygnus.com>
-
- * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS).
-
-Fri Oct 31 18:46:46 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-if.c (sim_open): Delete dead call to sim_core_attach.
-
-Mon Oct 27 12:43:54 1997 Doug Evans <devans@canuck.cygnus.com>
-
- * sem-ops.h (U{DIV,MOD}[BHSD]I): Use unsigned division.
-
-Fri Oct 3 09:28:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Wed Sep 24 17:38:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Tue Sep 23 11:04:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Tue Sep 23 10:19:51 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * Makefile.in (SIM_ENDIAN, SIM_HOSTENDIAN, SIM_SCACHE,
- SIM_DEFAULT_MODEL): Delete, moved to common.
- (SIM_EXTRA_CFLAGS): Update.
-
-Mon Sep 22 11:46:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure.in (sim_link_links): Configure non-strict memory
- alignment.
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Fri Sep 19 17:45:25 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Wed Sep 17 17:44:40 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-if.c (sim_open): Allocate memory under sim-memopt module
- using sim_do_commandf.
- (sim_open): Set magic-number at the start.
- (sim_do_command): Implement.
-
- * sim-main.h (sim_engine_halt): Map onto engine_halt.
-
-Mon Sep 15 17:36:15 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Thu Sep 4 17:21:23 1997 Doug Evans <dje@seba>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Fri Sep 5 10:21:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * Makefile.in (SIM_OBJS): Add sim-memopt.o module.
-
-Thu Sep 4 10:30:02 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-if.c (sim_open): Pass zero modulo arg to sim_core_attach.
-
-Wed Aug 27 18:13:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
- * config.in: Ditto.
-
-Tue Aug 26 10:39:42 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-if.c (sim_kill): Delete.
- (sim_create_inferior): Add ABFD argument.
- (sim_load): Move setting of PC from here.
- (sim_create_inferior): To here.
- (sim_load): Delete, use sim-hload.c instead.
-
- * Makefile.in (SIM_OBJS): Add sim-hload.o module.
-
-Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
- * config.in: Ditto.
-
-Mon Aug 25 15:54:08 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-if.c (sim_open): Add ABFD argument.
-
-Tue Jul 22 10:16:16 1997 Doug Evans <dje@canuck.cygnus.com>
-
- * sim-main.h (M32R_DEFAULT_MEM_SIZE): New macro.
- * sim-if.c (sim_open): Use it.
-
-Wed Jun 4 12:48:12 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-main.h (WITH_ENGINE): Disable the common engine for now.
-
-Tue May 27 14:15:44 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-if.c (sim_read): Pass NULL cpu to sim_core_read_buffer.
- (sim_write): Ditto for write.
-
- * m32r.c (do_trap): Ditto for read/write.
-
-Tue May 20 10:18:25 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-if.c (sim_open): Add callback argument.
- (sim_set_callbacks, sim_callback): Delete.
- (sim_load): Set STATE_LOADED_P.
-
-Mon May 19 12:55:42 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * Makefile.in (SIM_OBJS): Link in sim-abort.o as a stub for
- sim_engine_abort.
-
-Mon May 5 12:45:28 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-if.c (sim_open): Update to reflect changes to core in
- ../common/.
- * mem-ops.h (GETMEMQI, GETMEMHI, GETMEMSI, GETMEMDI, GETMEMUQI,
- GETMEMUHI, GETMEMUSI, GETMEMUDI, SETMEMQI, SETMEMHI, SETMEMSI,
- SETMEMDI, SETMEMUQI, SETMEMUHI, SETMEMUSI, SETMEMUDI): Ditto.
-
-Sat May 3 08:38:55 1997 Doug Evans <dje@seba.cygnus.com>
-
- * decode.c (decode): Add computed goto support.
-
-Fri May 2 16:30:26 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * mem-ops.h: Stub additional core read/write arguments.
-
- * sim-main.h: Declare sim_cia - type SI.
- (struct _sim_cpu): Move base type to end per common.
- (struct _sim_state): Ditto.
-
-Thu May 1 11:15:34 1997 Doug Evans <dje@canuck.cygnus.com>
-
- Merge from branch into devo. CGEN generic files moved to common
- directory. K&R C support is no longer provided.
-
-Thu Apr 24 00:39:51 1997 Doug Evans <dje@canuck.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Sat Apr 12 12:57:33 1997 Felix Lee <flee@yin.cygnus.com>
-
- * Makefile.in, seman-cache.c: new file, for wingdb build.
- * sim-alloca.h: fixed for wingdb.
-
-Mon Apr 7 13:33:29 1997 Doug Evans <dje@seba.cygnus.com>
-
- * decode.c (*): m32r_cgen_insn_table renamed to ..._entries.
- * mainloop.in: Use CGEN_INSN_INDEX instead of CGEN_INSN_TYPE.
- * simdefs.h (INSN_NAME): m32r_cgen_insn_table renamed to ..._entries.
-
-Fri Apr 4 19:23:12 1997 Doug Evans <dje@canuck.cygnus.com>
-
- * cgen-utils.in (ex_illegal): Fill in abuf->length, abuf->addr.
- (exc_illegal): Likewise.
- * decode.c (decode_vars): Add decode_illegal.
- * genmloop.sh: #include "cpu-opc.h".
- * sem-switch.c (case_INSN_ILLEGAL): Declare.
- (labels): Add case_INSN_ILLEGAL.
- (SWITCH): Add INSN_ILLEGAL case.
-
-Wed Mar 26 12:34:00 1997 Doug Evans <dje@canuck.cygnus.com>
-
- * model.c (model_module): Use 0 not NULL.
-
- * genmloop.sh (sim_main_loop): Handle k&r c.
-
- * sem-switch.c: Regenerate to get k&r c support.
- * semantics.c: Likewise.
-
- * m32r.c (ADD_{OV,CA}_SI,SUB_{OV,CA}_SI): Renamed to {ADD,SUB}[OC]FSI.
- (ADDCSI,SUBCSI): New functions.
- * sem-switch.c (addv,addv3,addx,subv,subx): Fix carry bit handling.
- * semantics.c (addv,addv3,addx,subv,subx): Fix carry bit handling.
-
- * simcache.c (simcache_{install,init,uninstall}): Use
- DECLARE_MODULE_INSTALL_HANDLER.
- (simcache_option_handler): Use DECLARE_OPTION_HANDLER.
-
- * utils.c: #include "semops.h".
-
-Tue Mar 11 14:30:26 1997 Doug Evans <dje@seba.cygnus.com>
-
- * profile.c (profile_print_simcache): Fix thinko in printf text.
-
- * simdefs.h (struct argbuf): Add member to fmt_20 so it's not empty.
-
-Mon Mar 10 11:06:29 1997 Doug Evans <dje@seba.cygnus.com>
-
- * m32r.c (h_cr_get): Rewrite.
- (h_cr_set): Rewrite.
- * sem-switch.c (rte): bcarry renamed to bcond.
- * semantics.c (rte): Likewise.
- * simdefs.h (CPU_STATE): Likewise.
-
- * config.in (HAVE_SYS_TIME_H): Add.
- * configure.in: Check for sys/time.h.
- * configure: Regenerated.
- * utils.c: Include sys/time.h if present.
-
- * common.c (sim_parse_args): Account for NULL terminating entry
- in long_options table.
-
- * genmloop.sh (RUN_FAST_P): Don't run fast if tracing.
- Always use cache if configured in.
- * mainloop.in (do_extract_insn{16,32}): New functions.
- (normal,fast): Call them. Handle starting in left slot.
- * simcache.c (simcache_option_handler): Disallow -c0.
- * sem-switch.c (TRACE_RESULT): Redefine so no tracing.
-
- * profile.c (profile_print_simcache): Fix percentage calc.
-
- * Makefile.in (INCLUDE_DEPS): Delete simcommon.h.
-
-Sun Mar 9 20:42:17 1997 Doug Evans <dje@seba.cygnus.com>
-
- * Makefile.in (COMMON_{PRE,POST}_CONFIG_FRAG): Add delimiters for.
- (M32R_INCLUDE_DEPS): Use cpu-sim.h instead of m32r-sim.h.
- Add mod-list.h.
- (mrun.o): Don't depend on M32R_INCLUDE_DEPS.
- (sim-if.o,m32r.o,utils.o): Likewise.
- (common.o): Don't explicitly depend on mod-list.h.
- (mainloop.c): Pass CPU to genmloop.sh.
- (stamp-modules): Depend on configure.
- (decode.o): Depend on decode,h, memops.h, semops.h, cpu-opc.h.
- (extract.o): Depend on decode.h, memops.h, semops.h.
- (semantics.o,seman-cache.o): Likewise.
- (model.o,ops.o): Depend on memops.h.
- (extr-cache.o): Disable building for the moment.
-
- * simcommon.h: Delete, move contents into cgen-sim.h.
- * cgen-sim.h: Don't include ansidecl.h,bfd.h,simfns.h.
- (UINT,CGEN_CAT3): Define.
- ({extract,semantic}_fn_t): Renamed to {EXTRACT,SEMANTIC}_FN.
- (decode_t): Renamed to DECODE.
-
- * simfns.h: Delete, contents moved to memops.h,semops.h.
- * memops.h: New file.
- * semops.h: New file.
- * decode.h: Renamed from semantics.h.
-
- * sim-argv.h: New file.
- * Makefile.in (memory.o,trace.o,profile.o,simcache.o,common): Add
- dependency of sim-argv.h.
-
- * sim-alloca.h: New file.
- * common.c: Include it.
- * Makefile.in (common.o): Add dependency.
-
- * config.in (HAVE_TIME_H,HAVE_SYS_RESOURCE_H): Add.
- (HAVE_GETRUSAGE,HAVE_TIME): Add.
- * configure.in: sinclude ../common/aclocal.m4.
- Check for headers time.h, sys/resource.h.
- Check for functions time, getrusage.
- (sim_link_{files,links}): Add link cpu-opc.h.
- (sim_profile): Add simcache.
- (SIM_AC_PROFILE): Add simcache, profile.o.
- (simcache module): Delete extr-cache.o for now.
- (--enable-sim-cache): Allow specification of default cache size.
- * configure: Regenerated.
-
- * decode.c: #include cgen-sim.h,memops.h,semops.h,decode.h,
- cpu-sim.h,cpu-opc.h. Don't include m32r-sim.h.
- Regenerate.
-
- * extract.c: #include cgen-sim.h,decode.h,cpu-sim.h.
- Don't include m32r-sim.h.
- (*): Define/Undef FLD macro. Use it to reference ARGBUF.
- Simplify profiling test with PROFILE_MODEL_P.
- (mvfc,mvtc): Fix access of control registers.
- * semantic.c: #include cgen-sim.h,memops.h,semops.h,decode.h,cpu-sim.h.
- Don't include m32r-sim.h.
- (*): Define/Undef FLD macro. Use it to reference ARGBUF.
- Simplify profiling test with PROFILE_MODEL_P.
- (mvfc,mvtc): Fix access of control registers.
-
- * sem-switch.c: New file, for GCC computed goto support.
-
- * genmloop.sh: Add #include's of bfd.h,callback.h,cgen-sim.h,
- memops.h,semops.h,trace.h,cpu-sim.h.
- (RUN_FAST_P): Change default to run fast if cache size > 0
- and not profiling.
- (sim_main_loop): Record execution time.
- Record instruction count even in fast mode.
- (init): Allow cpu to provide init code in mainloop.in.
- (FAST): Define as 0 or 1 depending on fast mode.
- * mainloop.in (normal): Combine with fast case.
- Add support for GCC computed gotos. Count simcache hits/misses.
- (init): Initialize "switch" labels if GNUC.
-
- * cgen-utils.in: Don't include opcode/cgen.h.
- Include cgen-sim.h, cpu-opc.h.
- * common.c: Don't include simcommon.h,mod-list.h. Include cgen-sim.h.
- * m32r-sim.h: Don't include mod-list.h
- (RUN_FAST_P): Delete.
- * m32r.c: Don't include profile.h. #include ansidecl.h,cgen-sim.h,
- semops.h,memory.h,trace.h
- (h_cr_get,h_cr_set): New functions.
- * memory.c: #include cgen-sim.h,callback.h.
- * ops.c: Don't include profile.h,m32r-sim.h.
- Include cgen-sim.h,memops.h,cpu-sim.h.
- (MEMOPS_DEFINE_INLINE): Renamed from SIMFNS_DEFINE_INLINE.
- * trace.c: Include cgen-sim.h,cpu-opc.h.
- * trace.h (trace_insn_{init,fini}): Declare.
-
- * model.c: Don't include signal.h,stdlib.h,m32r-sim.h.
- Include cgen-sim.h,cpu-sim.h,cpu-opc.h.
- Regenerate to get new insn aliases.
-
- * mrun.c: #include "ansidecl.h".
- (STATE): Use struct sim_state instead.
-
- * profile.c: Surround #include <stdlib.h> with HAVE_STDLIB_H.
- Don't include simcommon.h. Include cgen-sim.h,cpu-opc.h.
- (PROFILE_{READ,WRITE}_MASK): Replace with PROFILE_MEMORY_MASK.
- (profile_print_simcache): New function.
- (profile_print): Call it. Print simulator speed stats.
- * profile.h (PROFILE_{READ,WRITE}_MASK): Replace with
- PROFILE_MEMORY_MASK.
- (MODULE_PROFILE_SIMCACHE_P): Define.
- (PROFILE_SIMCACHE_MASK): Define.
- (PROFILE_COUNT): New members total_insn_count,exec_time.
- New members simcache_hits,simcache_misses.
- (PROFILE_SIMCACHE_{HITS,MISSES}): Define.
- (PROFILE_MODEL_P): New macro.
- (PROFILE_COUNT_SIMCACHE_{HIT,MISS}): New macros.
-
- * sim-if.c: Surround #include <stdlib.h> with HAVE_STDLIB_H.
- Don't include simcommon.h,m32r-sim.h. Include cgen-sim.h,cpu-sim.h.
- (sim_resume): Use USING_SIMCACHE_P instead of RUN_FAST_P.
- (sim_info): Pass verbose to profile_print.
-
- * simcache.c: Include cgen-sim.h,callback.h.
- (USING_SIMCACHE_P): Replace with SIMCACHE_P.
- (simcache_option_handler): Ensure cache size at least 2.
- Allow config time specification of default cache size.
- * simcache.h (struct simcache): Support GCC computed gotos.
- (SIMCACHE_DEFAULT_CACHE_SIZE): USe CONFIG_SIM_CACHE_SIZE if defined.
- (USING_SIMCACHE_P): New macro.
-
- * simdefs.h: Don't include m32r-opc.h.
- (CGEN_MAX_SIM_INSNS): Define.
- (CPU_STATE): Regenerate.
- (ARGBUF): Regenerate.
- (extract,semantic handler decls): Delete, moved to decode.h.
-
- * tconfig.in: Don't include cgen-sim.h,m32r-sim.h.
- (USE_SEM_SWITCH): Define.
-
- * utils.c: Include bfd.h,time.h,sys/resource.h.
- (sim_time_get,sim_time_elapsed): New functions.
- * cgen-sim.h (SIM_TIME,sim_time_get,sim_time_elapsed): Declare.
-
-Fri Jan 31 20:25:06 1997 Doug Evans <dje@canuck.cygnus.com>
-
- * configure.in (AC_CHECK_HEADERS): Handle i386-windows.
- * configure: Regenerated.
- * model.c: #include <stdlib.h>.
- * simcache.c: #include "libiberty.h".
- * simcommon.h (alloca): Handle i386-windows.
-
- * common.c: #include libiberty.h.
- (sim_signal_to_host): Return 5 if wingdb.
-
-Mon Jan 27 15:22:49 1997 Doug Evans <dje@seba.cygnus.com>
-
- * configure.in (sim_cache): Enabled by default now, pass default
- cache size to --enable-sim-cache.
- * simcache.c (simcache_option_handler): Allow -c 0.
-
- * simdefs.h,simfns.h: Regenerate
- * decode.c,extract.c,model.c,ops.c,semantics.c: Regenerate.
-
-Tue Jan 21 16:21:01 1997 Doug Evans <dje@seba.cygnus.com>
-
- Add model profiling support.
- * configure.in: Handle --enable-sim-model.
- (sim_profile): Add model.
- * Makefile.in (model.o): Add rule.
- * cgen-sim.h (UNIT,INSN_TIMING,MACH,MODEL): New types.
- * extract.c (*): Add model profiling support.
- * m32r.c (model_mark_{get,set}_h_gr): New functions.
- (model_mark_{busy,unbusy}_reg): New functions.
- * profile.c (profile_option_handler): Recognize --profile model.
- (profile_print_model): New function.
- (profile_print): Call it.
- * profile.h (MODULE_profile_model,MODULE_PROFILE_MODEL_P): Define.
- (PROFILE_MODEL_MASK,PROFILE_LABEL_WIDTH): Define.
- (PROFILE_COUNT): New members cycle_count,cti_stall_count,
- load_stall_count,taken_count,untaken_count.
- * semantics.c (*): Add model profiling support.
- * simcommon.h (struct sim_state): New members mach,model.
- * simdefs.h (CPU_PROFILE,MODEL_TYPE,UNIT_TYPE): New type.
- (MAX_MODELS,MAX_UNITS): Define.
- * tconfig.in (STATE_EXTRA_MEMBERS): Add cpu_profile.
-
- * Makefile.in (INCLUDE_DEPS): Add $(SIM_MODULES_HDRS).
- (stamp-modules): Depend on genmodlist.sh.
- * common.c (standard_options): Add --max-insns.
- (copy_argv): New function.
- * tconfig.in (SIM_HAVE_MAX_INSNS): Define.
- * genmloop.sh: Allow mainloop.in to contain support code.
- * mainloop.in: Move do_insn16,do_insn32 here.
- * m32r.c (do_trap): Handle SYS_argvlen,SYS_argv,SYS_read.
- * sim-if.c (sim_open): Don't set max insn count.
- (sim_create_inferior): Save argv,envp.
- * simcommon.h (struct sim_state): New members argv,envp.
- * simdefs.h ([GS]ETTWI,[GS]ETTUWI,[GS]ETTAI): Define.
- ([GS]ETMEMWI,[GS]ETMEMUWI,[GS]ETMEMAI): Define.
- (ARGBUF): New members h_gr_get, h_gr_set.
- * trace.c (trace_insn_init,trace_insn_fini): New functions.
- (trace_printf): Print to buffer, output later by trace_insn_fini.
- * trace.h (TRACE_INSN_{INIT,FINI}): Define.
-
-Thu Dec 19 16:01:59 1996 Doug Evans <dje@canuck.cygnus.com>
-
- * configure.in (AC_FUNC_ALLOCA): Call.
- * configure: Regenerate.
- * config.h (HAVE_ALLOCA_H): Add.
- * simcommon.h: Add alloca support.
- (DECLARE_MODULE_INSTALL_HANDLER): Define.
- (DECLARE_OPTION_HANDLER): Define.
- (MEM_FN): Declare using PARAMS.
- (DECLARE_MEM_FN): Define.
- * trace.c (trace_result): Tweak for !STDC.
- * cgen-sim.h (UDI_FN_SUPPORT): Define if ! HAVE_LONGLONG.
- * cgen-utils.in (disasm_sprintf): Fix va_arg call in !STDC case.
- * common.c (sim_print_help_fn): Use PARAMS.
- (standard_option_handler): Fix decl for !STDC systems.
- * memory.c: #include <stdio.h>
- (mem_flat_{install,init,uninstall}): Fix decl for !STDC systems.
- (mem_flat_{read,write},mem_flat_option_handler): Likewise.
- * profile.c (profile_install): Likewise.
- (profile_option_handler): Likewise.
-
-Thu Dec 19 11:06:19 1996 Doug Evans <dje@seba.cygnus.com>
-
- * semantics.c (*): Don't suffix big unsigned numbers with "U".
- Prefix them with 0x instead.
-
- * cgen-sim.h (DI_FN_SUPPORT): Define if ! HAVE_LONGLONG.
- (SLADI,SRADI,CONVSIDI,CONVDISI): Delete, moved to simfns.h.
- * semantics.c (machi,maclo,macwhi,macwlo,mulhi,mullo): Implement.
- (mulwhi,mulwlo,mvtachi,mvtaclo,rac,rach): Implement.
- * simfns.h: Add decls for functional DI,UDI,SF,DF,XF,TF support.
- Add support for boolean and/or.
- * utils.c: Redo naming of DI functional support.
- (ANDDI,ORDI,ADDDI,MULDI,GEDI,LEDI,CONVHIDI): New functions.
-
-Tue Dec 17 12:57:48 1996 Doug Evans <dje@seba.cygnus.com>
-
- * Directory created.
diff --git a/sim/m32r/Makefile.in b/sim/m32r/Makefile.in
deleted file mode 100644
index 7f40a85d718..00000000000
--- a/sim/m32r/Makefile.in
+++ /dev/null
@@ -1,145 +0,0 @@
-# Makefile template for Configure for the m32r simulator
-# Copyright (C) 1996, 1997, 1998, 1999, 2000 Free Software Foundation, Inc.
-# Contributed by Cygnus Support.
-#
-# This file is part of GDB, the GNU debugger.
-#
-# This program is free software; you can redistribute it and/or modify
-# it under the terms of the GNU General Public License as published by
-# the Free Software Foundation; either version 2 of the License, or
-# (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License along
-# with this program; if not, write to the Free Software Foundation, Inc.,
-# 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
-## COMMON_PRE_CONFIG_FRAG
-
-M32R_OBJS = m32r.o cpu.o decode.o sem.o model.o mloop.o
-M32RX_OBJS = m32rx.o cpux.o decodex.o modelx.o mloopx.o
-
-CONFIG_DEVICES = dv-sockser.o
-CONFIG_DEVICES =
-
-SIM_OBJS = \
- $(SIM_NEW_COMMON_OBJS) \
- sim-cpu.o \
- sim-hload.o \
- sim-hrw.o \
- sim-model.o \
- sim-reg.o \
- cgen-utils.o cgen-trace.o cgen-scache.o \
- cgen-run.o sim-reason.o sim-engine.o sim-stop.o \
- sim-if.o arch.o \
- $(M32R_OBJS) \
- $(M32RX_OBJS) \
- traps.o devices.o \
- $(CONFIG_DEVICES)
-
-# Extra headers included by sim-main.h.
-SIM_EXTRA_DEPS = \
- $(CGEN_INCLUDE_DEPS) \
- arch.h cpuall.h m32r-sim.h $(srcdir)/../../opcodes/m32r-desc.h
-
-SIM_EXTRA_CFLAGS =
-
-SIM_RUN_OBJS = nrun.o
-SIM_EXTRA_CLEAN = m32r-clean
-
-# This selects the m32r newlib/libgloss syscall definitions.
-NL_TARGET = -DNL_TARGET_m32r
-
-## COMMON_POST_CONFIG_FRAG
-
-arch = m32r
-
-sim-if.o: sim-if.c $(SIM_MAIN_DEPS) $(srcdir)/../common/sim-core.h
-
-arch.o: arch.c $(SIM_MAIN_DEPS)
-
-traps.o: traps.c targ-vals.h $(SIM_MAIN_DEPS)
-devices.o: devices.c $(SIM_MAIN_DEPS)
-
-# M32R objs
-
-M32RBF_INCLUDE_DEPS = \
- $(CGEN_MAIN_CPU_DEPS) \
- cpu.h decode.h eng.h
-
-m32r.o: m32r.c $(M32RBF_INCLUDE_DEPS)
-
-# FIXME: Use of `mono' is wip.
-mloop.c eng.h: stamp-mloop
-stamp-mloop: $(srcdir)/../common/genmloop.sh mloop.in Makefile
- $(SHELL) $(srccom)/genmloop.sh \
- -mono -fast -pbb -switch sem-switch.c \
- -cpu m32rbf -infile $(srcdir)/mloop.in
- $(SHELL) $(srcroot)/move-if-change eng.hin eng.h
- $(SHELL) $(srcroot)/move-if-change mloop.cin mloop.c
- touch stamp-mloop
-mloop.o: mloop.c sem-switch.c $(M32RBF_INCLUDE_DEPS)
-
-cpu.o: cpu.c $(M32RBF_INCLUDE_DEPS)
-decode.o: decode.c $(M32RBF_INCLUDE_DEPS)
-sem.o: sem.c $(M32RBF_INCLUDE_DEPS)
-model.o: model.c $(M32RBF_INCLUDE_DEPS)
-
-# M32RX objs
-
-M32RXF_INCLUDE_DEPS = \
- $(CGEN_MAIN_CPU_DEPS) \
- cpux.h decodex.h engx.h
-
-m32rx.o: m32rx.c $(M32RXF_INCLUDE_DEPS)
-
-# FIXME: Use of `mono' is wip.
-mloopx.c engx.h: stamp-xmloop
-stamp-xmloop: $(srcdir)/../common/genmloop.sh mloopx.in Makefile
- $(SHELL) $(srccom)/genmloop.sh \
- -mono -no-fast -pbb -parallel-write -switch semx-switch.c \
- -cpu m32rxf -infile $(srcdir)/mloopx.in
- $(SHELL) $(srcroot)/move-if-change eng.hin engx.h
- $(SHELL) $(srcroot)/move-if-change mloop.cin mloopx.c
- touch stamp-xmloop
-mloopx.o: mloopx.c semx-switch.c $(M32RXF_INCLUDE_DEPS)
-
-cpux.o: cpux.c $(M32RXF_INCLUDE_DEPS)
-decodex.o: decodex.c $(M32RXF_INCLUDE_DEPS)
-semx.o: semx.c $(M32RXF_INCLUDE_DEPS)
-modelx.o: modelx.c $(M32RXF_INCLUDE_DEPS)
-
-m32r-clean:
- rm -f mloop.c eng.h stamp-mloop
- rm -f mloopx.c engx.h stamp-xmloop
- rm -f stamp-arch stamp-cpu stamp-xcpu
- rm -f tmp-*
-
-# cgen support, enable with --enable-cgen-maint
-CGEN_MAINT = ; @true
-# The following line is commented in or out depending upon --enable-cgen-maint.
-@CGEN_MAINT@CGEN_MAINT =
-
-stamp-arch: $(CGEN_READ_SCM) $(CGEN_ARCH_SCM) $(CGEN_CPU_DIR)/m32r.cpu
- $(MAKE) cgen-arch $(CGEN_FLAGS_TO_PASS) mach=all \
- FLAGS="with-scache with-profile=fn"
- touch stamp-arch
-arch.h arch.c cpuall.h: $(CGEN_MAINT) stamp-arch
-
-stamp-cpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CGEN_CPU_DIR)/m32r.cpu
- $(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \
- cpu=m32rbf mach=m32r SUFFIX= \
- FLAGS="with-scache with-profile=fn" \
- EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"
- touch stamp-cpu
-cpu.h sem.c sem-switch.c model.c decode.c decode.h: $(CGEN_MAINT) stamp-cpu
-
-stamp-xcpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CGEN_CPU_DIR)/m32r.cpu
- $(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \
- cpu=m32rxf mach=m32rx SUFFIX=x FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEMSW)"
- touch stamp-xcpu
-cpux.h semx-switch.c modelx.c decodex.c decodex.h: $(CGEN_MAINT) stamp-xcpu
diff --git a/sim/m32r/README b/sim/m32r/README
deleted file mode 100644
index bbc3f509fba..00000000000
--- a/sim/m32r/README
+++ /dev/null
@@ -1,14 +0,0 @@
-This is the m32r simulator directory.
-
-It is still work-in-progress. The current sources are reasonably
-well tested and lots of features are in. However, there's lots
-more yet to come.
-
-There are lots of machine generated files in the source directory!
-They are only generated if you configure with --enable-cgen-maint,
-similar in behaviour to Makefile.in, configure under automake/autoconf.
-
-For details on the generator, see ../../cgen.
-
-devo/cgen isn't part of the comp-tools module yet.
-You'll need to check it out manually (also akin to automake/autoconf).
diff --git a/sim/m32r/TODO b/sim/m32r/TODO
deleted file mode 100644
index 263daacbbab..00000000000
--- a/sim/m32r/TODO
+++ /dev/null
@@ -1,9 +0,0 @@
-- header file dependencies revisit
-- hooks cleanup
-- testsuites
-- FIXME's
-- memory accesses still test if profiling is on even in fast mode
-- fill nop counting done even in fast mode
-- have semantic code use G/SET_H_FOO if not default [incl fun-access]
-- have G/SET_H_FOO macros call function if fun-access
-- --> can always use G/S_H_FOO macros
diff --git a/sim/m32r/acconfig.h b/sim/m32r/acconfig.h
deleted file mode 100644
index f9b87a10c60..00000000000
--- a/sim/m32r/acconfig.h
+++ /dev/null
@@ -1,15 +0,0 @@
-
-/* Define to 1 if NLS is requested. */
-#undef ENABLE_NLS
-
-/* Define as 1 if you have catgets and don't want to use GNU gettext. */
-#undef HAVE_CATGETS
-
-/* Define as 1 if you have gettext and don't want to use GNU gettext. */
-#undef HAVE_GETTEXT
-
-/* Define as 1 if you have the stpcpy function. */
-#undef HAVE_STPCPY
-
-/* Define if your locale.h file contains LC_MESSAGES. */
-#undef HAVE_LC_MESSAGES
diff --git a/sim/m32r/arch.c b/sim/m32r/arch.c
deleted file mode 100644
index 4bc51b0f168..00000000000
--- a/sim/m32r/arch.c
+++ /dev/null
@@ -1,38 +0,0 @@
-/* Simulator support for m32r.
-
-THIS FILE IS MACHINE GENERATED WITH CGEN.
-
-Copyright (C) 1996, 1997, 1998, 1999, 2000 Free Software Foundation, Inc.
-
-This file is part of the GNU Simulators.
-
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License along
-with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
-*/
-
-#include "sim-main.h"
-#include "bfd.h"
-
-const MACH *sim_machs[] =
-{
-#ifdef HAVE_CPU_M32RBF
- & m32r_mach,
-#endif
-#ifdef HAVE_CPU_M32RXF
- & m32rx_mach,
-#endif
- 0
-};
-
diff --git a/sim/m32r/arch.h b/sim/m32r/arch.h
deleted file mode 100644
index 11b386e669b..00000000000
--- a/sim/m32r/arch.h
+++ /dev/null
@@ -1,47 +0,0 @@
-/* Simulator header for m32r.
-
-THIS FILE IS MACHINE GENERATED WITH CGEN.
-
-Copyright (C) 1996, 1997, 1998, 1999, 2000 Free Software Foundation, Inc.
-
-This file is part of the GNU Simulators.
-
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License along
-with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
-*/
-
-#ifndef M32R_ARCH_H
-#define M32R_ARCH_H
-
-#define TARGET_BIG_ENDIAN 1
-
-/* Enum declaration for model types. */
-typedef enum model_type {
- MODEL_M32R_D, MODEL_TEST, MODEL_M32RX, MODEL_MAX
-} MODEL_TYPE;
-
-#define MAX_MODELS ((int) MODEL_MAX)
-
-/* Enum declaration for unit types. */
-typedef enum unit_type {
- UNIT_NONE, UNIT_M32R_D_U_STORE, UNIT_M32R_D_U_LOAD, UNIT_M32R_D_U_CTI
- , UNIT_M32R_D_U_MAC, UNIT_M32R_D_U_CMP, UNIT_M32R_D_U_EXEC, UNIT_TEST_U_EXEC
- , UNIT_M32RX_U_STORE, UNIT_M32RX_U_LOAD, UNIT_M32RX_U_CTI, UNIT_M32RX_U_MAC
- , UNIT_M32RX_U_CMP, UNIT_M32RX_U_EXEC, UNIT_MAX
-} UNIT_TYPE;
-
-#define MAX_UNITS (2)
-
-#endif /* M32R_ARCH_H */
diff --git a/sim/m32r/config.in b/sim/m32r/config.in
deleted file mode 100644
index 9723b8662c9..00000000000
--- a/sim/m32r/config.in
+++ /dev/null
@@ -1,162 +0,0 @@
-/* config.in. Generated automatically from configure.in by autoheader. */
-
-/* Define if using alloca.c. */
-#undef C_ALLOCA
-
-/* Define to empty if the keyword does not work. */
-#undef const
-
-/* Define to one of _getb67, GETB67, getb67 for Cray-2 and Cray-YMP systems.
- This function is required for alloca.c support on those systems. */
-#undef CRAY_STACKSEG_END
-
-/* Define if you have alloca, as a function or macro. */
-#undef HAVE_ALLOCA
-
-/* Define if you have <alloca.h> and it should be used (not on Ultrix). */
-#undef HAVE_ALLOCA_H
-
-/* Define if you have a working `mmap' system call. */
-#undef HAVE_MMAP
-
-/* Define as __inline if that's what the C compiler calls it. */
-#undef inline
-
-/* Define to `long' if <sys/types.h> doesn't define. */
-#undef off_t
-
-/* Define if you need to in order for stat and other things to work. */
-#undef _POSIX_SOURCE
-
-/* Define as the return type of signal handlers (int or void). */
-#undef RETSIGTYPE
-
-/* Define to `unsigned' if <sys/types.h> doesn't define. */
-#undef size_t
-
-/* If using the C implementation of alloca, define if you know the
- direction of stack growth for your system; otherwise it will be
- automatically deduced at run-time.
- STACK_DIRECTION > 0 => grows toward higher addresses
- STACK_DIRECTION < 0 => grows toward lower addresses
- STACK_DIRECTION = 0 => direction of growth unknown
- */
-#undef STACK_DIRECTION
-
-/* Define if you have the ANSI C header files. */
-#undef STDC_HEADERS
-
-/* Define if your processor stores words with the most significant
- byte first (like Motorola and SPARC, unlike Intel and VAX). */
-#undef WORDS_BIGENDIAN
-
-/* Define to 1 if NLS is requested. */
-#undef ENABLE_NLS
-
-/* Define as 1 if you have gettext and don't want to use GNU gettext. */
-#undef HAVE_GETTEXT
-
-/* Define as 1 if you have the stpcpy function. */
-#undef HAVE_STPCPY
-
-/* Define if your locale.h file contains LC_MESSAGES. */
-#undef HAVE_LC_MESSAGES
-
-/* Define if you have the __argz_count function. */
-#undef HAVE___ARGZ_COUNT
-
-/* Define if you have the __argz_next function. */
-#undef HAVE___ARGZ_NEXT
-
-/* Define if you have the __argz_stringify function. */
-#undef HAVE___ARGZ_STRINGIFY
-
-/* Define if you have the __setfpucw function. */
-#undef HAVE___SETFPUCW
-
-/* Define if you have the dcgettext function. */
-#undef HAVE_DCGETTEXT
-
-/* Define if you have the getcwd function. */
-#undef HAVE_GETCWD
-
-/* Define if you have the getpagesize function. */
-#undef HAVE_GETPAGESIZE
-
-/* Define if you have the getrusage function. */
-#undef HAVE_GETRUSAGE
-
-/* Define if you have the munmap function. */
-#undef HAVE_MUNMAP
-
-/* Define if you have the putenv function. */
-#undef HAVE_PUTENV
-
-/* Define if you have the setenv function. */
-#undef HAVE_SETENV
-
-/* Define if you have the setlocale function. */
-#undef HAVE_SETLOCALE
-
-/* Define if you have the sigaction function. */
-#undef HAVE_SIGACTION
-
-/* Define if you have the stpcpy function. */
-#undef HAVE_STPCPY
-
-/* Define if you have the strcasecmp function. */
-#undef HAVE_STRCASECMP
-
-/* Define if you have the strchr function. */
-#undef HAVE_STRCHR
-
-/* Define if you have the time function. */
-#undef HAVE_TIME
-
-/* Define if you have the <argz.h> header file. */
-#undef HAVE_ARGZ_H
-
-/* Define if you have the <fcntl.h> header file. */
-#undef HAVE_FCNTL_H
-
-/* Define if you have the <fpu_control.h> header file. */
-#undef HAVE_FPU_CONTROL_H
-
-/* Define if you have the <limits.h> header file. */
-#undef HAVE_LIMITS_H
-
-/* Define if you have the <locale.h> header file. */
-#undef HAVE_LOCALE_H
-
-/* Define if you have the <malloc.h> header file. */
-#undef HAVE_MALLOC_H
-
-/* Define if you have the <nl_types.h> header file. */
-#undef HAVE_NL_TYPES_H
-
-/* Define if you have the <stdlib.h> header file. */
-#undef HAVE_STDLIB_H
-
-/* Define if you have the <string.h> header file. */
-#undef HAVE_STRING_H
-
-/* Define if you have the <strings.h> header file. */
-#undef HAVE_STRINGS_H
-
-/* Define if you have the <sys/param.h> header file. */
-#undef HAVE_SYS_PARAM_H
-
-/* Define if you have the <sys/resource.h> header file. */
-#undef HAVE_SYS_RESOURCE_H
-
-/* Define if you have the <sys/time.h> header file. */
-#undef HAVE_SYS_TIME_H
-
-/* Define if you have the <time.h> header file. */
-#undef HAVE_TIME_H
-
-/* Define if you have the <unistd.h> header file. */
-#undef HAVE_UNISTD_H
-
-/* Define if you have the <values.h> header file. */
-#undef HAVE_VALUES_H
diff --git a/sim/m32r/configure b/sim/m32r/configure
deleted file mode 100755
index 4a55bc182a8..00000000000
--- a/sim/m32r/configure
+++ /dev/null
@@ -1,4341 +0,0 @@
-#! /bin/sh
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-sim_inline="-DDEFAULT_INLINE=0"
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-# This file is derived from `gettext.m4'. The difference is that the
-# included macros assume Cygnus-style source and build trees.
-
-# Macro to add for using GNU gettext.
-# Ulrich Drepper <drepper@cygnus.com>, 1995.
-#
-# This file file be copied and used freely without restrictions. It can
-# be used in projects which are not available under the GNU Public License
-# but which still want to provide support for the GNU gettext functionality.
-# Please note that the actual code is *not* freely available.
-
-# serial 3
-
-
-
-
-
-# Search path for a program which passes the given test.
-# Ulrich Drepper <drepper@cygnus.com>, 1996.
-#
-# This file file be copied and used freely without restrictions. It can
-# be used in projects which are not available under the GNU Public License
-# but which still want to provide support for the GNU gettext functionality.
-# Please note that the actual code is *not* freely available.
-
-# serial 1
-
-
-
-# Check whether LC_MESSAGES is available in <locale.h>.
-# Ulrich Drepper <drepper@cygnus.com>, 1995.
-#
-# This file file be copied and used freely without restrictions. It can
-# be used in projects which are not available under the GNU Public License
-# but which still want to provide support for the GNU gettext functionality.
-# Please note that the actual code is *not* freely available.
-
-# serial 1
-
-
-
-
-
-
-# Guess values for system-dependent variables and create Makefiles.
-# Generated automatically using autoconf version 2.13
-# Copyright (C) 1992, 93, 94, 95, 96 Free Software Foundation, Inc.
-#
-# This configure script is free software; the Free Software Foundation
-# gives unlimited permission to copy, distribute and modify it.
-
-# Defaults:
-ac_help=
-ac_default_prefix=/usr/local
-# Any additions from configure.in:
-ac_help="$ac_help
- --disable-nls do not use Native Language Support"
-ac_help="$ac_help
- --with-included-gettext use the GNU gettext library included here"
-ac_help="$ac_help
- --enable-maintainer-mode Enable developer functionality."
-ac_help="$ac_help
- --enable-sim-bswap Use Host specific BSWAP instruction."
-ac_help="$ac_help
- --enable-sim-cflags=opts Extra CFLAGS for use in building simulator"
-ac_help="$ac_help
- --enable-sim-debug=opts Enable debugging flags"
-ac_help="$ac_help
- --enable-sim-stdio Specify whether to use stdio for console input/output."
-ac_help="$ac_help
- --enable-sim-trace=opts Enable tracing flags"
-ac_help="$ac_help
- --enable-sim-profile=opts Enable profiling flags"
-ac_help="$ac_help
- --enable-sim-endian=endian Specify target byte endian orientation."
-ac_help="$ac_help
- --enable-sim-alignment=align Specify strict, nonstrict or forced alignment of memory accesses."
-ac_help="$ac_help
- --enable-sim-hostendian=end Specify host byte endian orientation."
-ac_help="$ac_help
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-ac_help="$ac_help
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-ac_help="$ac_help
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-ac_help="$ac_help
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-ac_help="$ac_help
- --enable-cgen-maint[=DIR] build cgen generated files"
-
-# Initialize some variables set by options.
-# The variables have the same names as the options, with
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-sysconfdir='${prefix}/etc'
-sharedstatedir='${prefix}/com'
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-libdir='${exec_prefix}/lib'
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-infodir='${prefix}/info'
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-
-# Initialize some other variables.
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- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1080 "configure"
-#include "confdefs.h"
-#include <sys/types.h>
-#if STDC_HEADERS
-#include <stdlib.h>
-#include <stddef.h>
-#endif
-EOF
-if (eval "$ac_cpp conftest.$ac_ext") 2>&5 |
- egrep "(^|[^a-zA-Z_0-9])size_t[^a-zA-Z_0-9]" >/dev/null 2>&1; then
- rm -rf conftest*
- ac_cv_type_size_t=yes
-else
- rm -rf conftest*
- ac_cv_type_size_t=no
-fi
-rm -f conftest*
-
-fi
-echo "$ac_t""$ac_cv_type_size_t" 1>&6
-if test $ac_cv_type_size_t = no; then
- cat >> confdefs.h <<\EOF
-#define size_t unsigned
-EOF
-
-fi
-
-# The Ultrix 4.2 mips builtin alloca declared by alloca.h only works
-# for constant arguments. Useless!
-echo $ac_n "checking for working alloca.h""... $ac_c" 1>&6
-echo "configure:1110: checking for working alloca.h" >&5
-if eval "test \"`echo '$''{'ac_cv_header_alloca_h'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1115 "configure"
-#include "confdefs.h"
-#include <alloca.h>
-int main() {
-char *p = alloca(2 * sizeof(int));
-; return 0; }
-EOF
-if { (eval echo configure:1122: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- rm -rf conftest*
- ac_cv_header_alloca_h=yes
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- ac_cv_header_alloca_h=no
-fi
-rm -f conftest*
-fi
-
-echo "$ac_t""$ac_cv_header_alloca_h" 1>&6
-if test $ac_cv_header_alloca_h = yes; then
- cat >> confdefs.h <<\EOF
-#define HAVE_ALLOCA_H 1
-EOF
-
-fi
-
-echo $ac_n "checking for alloca""... $ac_c" 1>&6
-echo "configure:1143: checking for alloca" >&5
-if eval "test \"`echo '$''{'ac_cv_func_alloca_works'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1148 "configure"
-#include "confdefs.h"
-
-#ifdef __GNUC__
-# define alloca __builtin_alloca
-#else
-# ifdef _MSC_VER
-# include <malloc.h>
-# define alloca _alloca
-# else
-# if HAVE_ALLOCA_H
-# include <alloca.h>
-# else
-# ifdef _AIX
- #pragma alloca
-# else
-# ifndef alloca /* predefined by HP cc +Olibcalls */
-char *alloca ();
-# endif
-# endif
-# endif
-# endif
-#endif
-
-int main() {
-char *p = (char *) alloca(1);
-; return 0; }
-EOF
-if { (eval echo configure:1176: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- rm -rf conftest*
- ac_cv_func_alloca_works=yes
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- ac_cv_func_alloca_works=no
-fi
-rm -f conftest*
-fi
-
-echo "$ac_t""$ac_cv_func_alloca_works" 1>&6
-if test $ac_cv_func_alloca_works = yes; then
- cat >> confdefs.h <<\EOF
-#define HAVE_ALLOCA 1
-EOF
-
-fi
-
-if test $ac_cv_func_alloca_works = no; then
- # The SVR3 libPW and SVR4 libucb both contain incompatible functions
- # that cause trouble. Some versions do not even contain alloca or
- # contain a buggy version. If you still want to use their alloca,
- # use ar to extract alloca.o from them instead of compiling alloca.c.
- ALLOCA=alloca.${ac_objext}
- cat >> confdefs.h <<\EOF
-#define C_ALLOCA 1
-EOF
-
-
-echo $ac_n "checking whether alloca needs Cray hooks""... $ac_c" 1>&6
-echo "configure:1208: checking whether alloca needs Cray hooks" >&5
-if eval "test \"`echo '$''{'ac_cv_os_cray'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1213 "configure"
-#include "confdefs.h"
-#if defined(CRAY) && ! defined(CRAY2)
-webecray
-#else
-wenotbecray
-#endif
-
-EOF
-if (eval "$ac_cpp conftest.$ac_ext") 2>&5 |
- egrep "webecray" >/dev/null 2>&1; then
- rm -rf conftest*
- ac_cv_os_cray=yes
-else
- rm -rf conftest*
- ac_cv_os_cray=no
-fi
-rm -f conftest*
-
-fi
-
-echo "$ac_t""$ac_cv_os_cray" 1>&6
-if test $ac_cv_os_cray = yes; then
-for ac_func in _getb67 GETB67 getb67; do
- echo $ac_n "checking for $ac_func""... $ac_c" 1>&6
-echo "configure:1238: checking for $ac_func" >&5
-if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1243 "configure"
-#include "confdefs.h"
-/* System header to define __stub macros and hopefully few prototypes,
- which can conflict with char $ac_func(); below. */
-#include <assert.h>
-/* Override any gcc2 internal prototype to avoid an error. */
-/* We use char because int might match the return type of a gcc2
- builtin and then its argument prototype would still apply. */
-char $ac_func();
-
-int main() {
-
-/* The GNU C library defines this for functions which it implements
- to always fail with ENOSYS. Some functions are actually named
- something starting with __ and the normal name is an alias. */
-#if defined (__stub_$ac_func) || defined (__stub___$ac_func)
-choke me
-#else
-$ac_func();
-#endif
-
-; return 0; }
-EOF
-if { (eval echo configure:1266: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=yes"
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=no"
-fi
-rm -f conftest*
-fi
-
-if eval "test \"`echo '$ac_cv_func_'$ac_func`\" = yes"; then
- echo "$ac_t""yes" 1>&6
- cat >> confdefs.h <<EOF
-#define CRAY_STACKSEG_END $ac_func
-EOF
-
- break
-else
- echo "$ac_t""no" 1>&6
-fi
-
-done
-fi
-
-echo $ac_n "checking stack direction for C alloca""... $ac_c" 1>&6
-echo "configure:1293: checking stack direction for C alloca" >&5
-if eval "test \"`echo '$''{'ac_cv_c_stack_direction'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- if test "$cross_compiling" = yes; then
- ac_cv_c_stack_direction=0
-else
- cat > conftest.$ac_ext <<EOF
-#line 1301 "configure"
-#include "confdefs.h"
-find_stack_direction ()
-{
- static char *addr = 0;
- auto char dummy;
- if (addr == 0)
- {
- addr = &dummy;
- return find_stack_direction ();
- }
- else
- return (&dummy > addr) ? 1 : -1;
-}
-main ()
-{
- exit (find_stack_direction() < 0);
-}
-EOF
-if { (eval echo configure:1320: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null
-then
- ac_cv_c_stack_direction=1
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -fr conftest*
- ac_cv_c_stack_direction=-1
-fi
-rm -fr conftest*
-fi
-
-fi
-
-echo "$ac_t""$ac_cv_c_stack_direction" 1>&6
-cat >> confdefs.h <<EOF
-#define STACK_DIRECTION $ac_cv_c_stack_direction
-EOF
-
-fi
-
-for ac_hdr in unistd.h
-do
-ac_safe=`echo "$ac_hdr" | sed 'y%./+-%__p_%'`
-echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6
-echo "configure:1345: checking for $ac_hdr" >&5
-if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1350 "configure"
-#include "confdefs.h"
-#include <$ac_hdr>
-EOF
-ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:1355: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
-ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
-if test -z "$ac_err"; then
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=yes"
-else
- echo "$ac_err" >&5
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=no"
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-rm -f conftest*
-fi
-if eval "test \"`echo '$ac_cv_header_'$ac_safe`\" = yes"; then
- echo "$ac_t""yes" 1>&6
- ac_tr_hdr=HAVE_`echo $ac_hdr | sed 'y%abcdefghijklmnopqrstuvwxyz./-%ABCDEFGHIJKLMNOPQRSTUVWXYZ___%'`
- cat >> confdefs.h <<EOF
-#define $ac_tr_hdr 1
-EOF
-
-else
- echo "$ac_t""no" 1>&6
-fi
-done
-
-for ac_func in getpagesize
-do
-echo $ac_n "checking for $ac_func""... $ac_c" 1>&6
-echo "configure:1384: checking for $ac_func" >&5
-if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1389 "configure"
-#include "confdefs.h"
-/* System header to define __stub macros and hopefully few prototypes,
- which can conflict with char $ac_func(); below. */
-#include <assert.h>
-/* Override any gcc2 internal prototype to avoid an error. */
-/* We use char because int might match the return type of a gcc2
- builtin and then its argument prototype would still apply. */
-char $ac_func();
-
-int main() {
-
-/* The GNU C library defines this for functions which it implements
- to always fail with ENOSYS. Some functions are actually named
- something starting with __ and the normal name is an alias. */
-#if defined (__stub_$ac_func) || defined (__stub___$ac_func)
-choke me
-#else
-$ac_func();
-#endif
-
-; return 0; }
-EOF
-if { (eval echo configure:1412: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=yes"
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=no"
-fi
-rm -f conftest*
-fi
-
-if eval "test \"`echo '$ac_cv_func_'$ac_func`\" = yes"; then
- echo "$ac_t""yes" 1>&6
- ac_tr_func=HAVE_`echo $ac_func | tr 'abcdefghijklmnopqrstuvwxyz' 'ABCDEFGHIJKLMNOPQRSTUVWXYZ'`
- cat >> confdefs.h <<EOF
-#define $ac_tr_func 1
-EOF
-
-else
- echo "$ac_t""no" 1>&6
-fi
-done
-
-echo $ac_n "checking for working mmap""... $ac_c" 1>&6
-echo "configure:1437: checking for working mmap" >&5
-if eval "test \"`echo '$''{'ac_cv_func_mmap_fixed_mapped'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- if test "$cross_compiling" = yes; then
- ac_cv_func_mmap_fixed_mapped=no
-else
- cat > conftest.$ac_ext <<EOF
-#line 1445 "configure"
-#include "confdefs.h"
-
-/* Thanks to Mike Haertel and Jim Avera for this test.
- Here is a matrix of mmap possibilities:
- mmap private not fixed
- mmap private fixed at somewhere currently unmapped
- mmap private fixed at somewhere already mapped
- mmap shared not fixed
- mmap shared fixed at somewhere currently unmapped
- mmap shared fixed at somewhere already mapped
- For private mappings, we should verify that changes cannot be read()
- back from the file, nor mmap's back from the file at a different
- address. (There have been systems where private was not correctly
- implemented like the infamous i386 svr4.0, and systems where the
- VM page cache was not coherent with the filesystem buffer cache
- like early versions of FreeBSD and possibly contemporary NetBSD.)
- For shared mappings, we should conversely verify that changes get
- propogated back to all the places they're supposed to be.
-
- Grep wants private fixed already mapped.
- The main things grep needs to know about mmap are:
- * does it exist and is it safe to write into the mmap'd area
- * how to use it (BSD variants) */
-#include <sys/types.h>
-#include <fcntl.h>
-#include <sys/mman.h>
-
-/* This mess was copied from the GNU getpagesize.h. */
-#ifndef HAVE_GETPAGESIZE
-# ifdef HAVE_UNISTD_H
-# include <unistd.h>
-# endif
-
-/* Assume that all systems that can run configure have sys/param.h. */
-# ifndef HAVE_SYS_PARAM_H
-# define HAVE_SYS_PARAM_H 1
-# endif
-
-# ifdef _SC_PAGESIZE
-# define getpagesize() sysconf(_SC_PAGESIZE)
-# else /* no _SC_PAGESIZE */
-# ifdef HAVE_SYS_PARAM_H
-# include <sys/param.h>
-# ifdef EXEC_PAGESIZE
-# define getpagesize() EXEC_PAGESIZE
-# else /* no EXEC_PAGESIZE */
-# ifdef NBPG
-# define getpagesize() NBPG * CLSIZE
-# ifndef CLSIZE
-# define CLSIZE 1
-# endif /* no CLSIZE */
-# else /* no NBPG */
-# ifdef NBPC
-# define getpagesize() NBPC
-# else /* no NBPC */
-# ifdef PAGESIZE
-# define getpagesize() PAGESIZE
-# endif /* PAGESIZE */
-# endif /* no NBPC */
-# endif /* no NBPG */
-# endif /* no EXEC_PAGESIZE */
-# else /* no HAVE_SYS_PARAM_H */
-# define getpagesize() 8192 /* punt totally */
-# endif /* no HAVE_SYS_PARAM_H */
-# endif /* no _SC_PAGESIZE */
-
-#endif /* no HAVE_GETPAGESIZE */
-
-#ifdef __cplusplus
-extern "C" { void *malloc(unsigned); }
-#else
-char *malloc();
-#endif
-
-int
-main()
-{
- char *data, *data2, *data3;
- int i, pagesize;
- int fd;
-
- pagesize = getpagesize();
-
- /*
- * First, make a file with some known garbage in it.
- */
- data = malloc(pagesize);
- if (!data)
- exit(1);
- for (i = 0; i < pagesize; ++i)
- *(data + i) = rand();
- umask(0);
- fd = creat("conftestmmap", 0600);
- if (fd < 0)
- exit(1);
- if (write(fd, data, pagesize) != pagesize)
- exit(1);
- close(fd);
-
- /*
- * Next, try to mmap the file at a fixed address which
- * already has something else allocated at it. If we can,
- * also make sure that we see the same garbage.
- */
- fd = open("conftestmmap", O_RDWR);
- if (fd < 0)
- exit(1);
- data2 = malloc(2 * pagesize);
- if (!data2)
- exit(1);
- data2 += (pagesize - ((int) data2 & (pagesize - 1))) & (pagesize - 1);
- if (data2 != mmap(data2, pagesize, PROT_READ | PROT_WRITE,
- MAP_PRIVATE | MAP_FIXED, fd, 0L))
- exit(1);
- for (i = 0; i < pagesize; ++i)
- if (*(data + i) != *(data2 + i))
- exit(1);
-
- /*
- * Finally, make sure that changes to the mapped area
- * do not percolate back to the file as seen by read().
- * (This is a bug on some variants of i386 svr4.0.)
- */
- for (i = 0; i < pagesize; ++i)
- *(data2 + i) = *(data2 + i) + 1;
- data3 = malloc(pagesize);
- if (!data3)
- exit(1);
- if (read(fd, data3, pagesize) != pagesize)
- exit(1);
- for (i = 0; i < pagesize; ++i)
- if (*(data + i) != *(data3 + i))
- exit(1);
- close(fd);
- unlink("conftestmmap");
- exit(0);
-}
-
-EOF
-if { (eval echo configure:1585: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null
-then
- ac_cv_func_mmap_fixed_mapped=yes
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -fr conftest*
- ac_cv_func_mmap_fixed_mapped=no
-fi
-rm -fr conftest*
-fi
-
-fi
-
-echo "$ac_t""$ac_cv_func_mmap_fixed_mapped" 1>&6
-if test $ac_cv_func_mmap_fixed_mapped = yes; then
- cat >> confdefs.h <<\EOF
-#define HAVE_MMAP 1
-EOF
-
-fi
-
-echo $ac_n "checking for Cygwin environment""... $ac_c" 1>&6
-echo "configure:1608: checking for Cygwin environment" >&5
-if eval "test \"`echo '$''{'ac_cv_cygwin'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1613 "configure"
-#include "confdefs.h"
-
-int main() {
-
-#ifndef __CYGWIN__
-#define __CYGWIN__ __CYGWIN32__
-#endif
-return __CYGWIN__;
-; return 0; }
-EOF
-if { (eval echo configure:1624: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
- rm -rf conftest*
- ac_cv_cygwin=yes
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- ac_cv_cygwin=no
-fi
-rm -f conftest*
-rm -f conftest*
-fi
-
-echo "$ac_t""$ac_cv_cygwin" 1>&6
-CYGWIN=
-test "$ac_cv_cygwin" = yes && CYGWIN=yes
-echo $ac_n "checking for mingw32 environment""... $ac_c" 1>&6
-echo "configure:1641: checking for mingw32 environment" >&5
-if eval "test \"`echo '$''{'ac_cv_mingw32'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1646 "configure"
-#include "confdefs.h"
-
-int main() {
-return __MINGW32__;
-; return 0; }
-EOF
-if { (eval echo configure:1653: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
- rm -rf conftest*
- ac_cv_mingw32=yes
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- ac_cv_mingw32=no
-fi
-rm -f conftest*
-rm -f conftest*
-fi
-
-echo "$ac_t""$ac_cv_mingw32" 1>&6
-MINGW32=
-test "$ac_cv_mingw32" = yes && MINGW32=yes
-
-# autoconf.info says this should be called right after AC_INIT.
-
-
-ac_aux_dir=
-for ac_dir in `cd $srcdir;pwd`/../.. $srcdir/`cd $srcdir;pwd`/../..; do
- if test -f $ac_dir/install-sh; then
- ac_aux_dir=$ac_dir
- ac_install_sh="$ac_aux_dir/install-sh -c"
- break
- elif test -f $ac_dir/install.sh; then
- ac_aux_dir=$ac_dir
- ac_install_sh="$ac_aux_dir/install.sh -c"
- break
- fi
-done
-if test -z "$ac_aux_dir"; then
- { echo "configure: error: can not find install-sh or install.sh in `cd $srcdir;pwd`/../.. $srcdir/`cd $srcdir;pwd`/../.." 1>&2; exit 1; }
-fi
-ac_config_guess=$ac_aux_dir/config.guess
-ac_config_sub=$ac_aux_dir/config.sub
-ac_configure=$ac_aux_dir/configure # This should be Cygnus configure.
-
-
-# Do some error checking and defaulting for the host and target type.
-# The inputs are:
-# configure --host=HOST --target=TARGET --build=BUILD NONOPT
-#
-# The rules are:
-# 1. You are not allowed to specify --host, --target, and nonopt at the
-# same time.
-# 2. Host defaults to nonopt.
-# 3. If nonopt is not specified, then host defaults to the current host,
-# as determined by config.guess.
-# 4. Target and build default to nonopt.
-# 5. If nonopt is not specified, then target and build default to host.
-
-# The aliases save the names the user supplied, while $host etc.
-# will get canonicalized.
-case $host---$target---$nonopt in
-NONE---*---* | *---NONE---* | *---*---NONE) ;;
-*) { echo "configure: error: can only configure for one host and one target at a time" 1>&2; exit 1; } ;;
-esac
-
-
-# Make sure we can run config.sub.
-if ${CONFIG_SHELL-/bin/sh} $ac_config_sub sun4 >/dev/null 2>&1; then :
-else { echo "configure: error: can not run $ac_config_sub" 1>&2; exit 1; }
-fi
-
-echo $ac_n "checking host system type""... $ac_c" 1>&6
-echo "configure:1720: checking host system type" >&5
-
-host_alias=$host
-case "$host_alias" in
-NONE)
- case $nonopt in
- NONE)
- if host_alias=`${CONFIG_SHELL-/bin/sh} $ac_config_guess`; then :
- else { echo "configure: error: can not guess host type; you must specify one" 1>&2; exit 1; }
- fi ;;
- *) host_alias=$nonopt ;;
- esac ;;
-esac
-
-host=`${CONFIG_SHELL-/bin/sh} $ac_config_sub $host_alias`
-host_cpu=`echo $host | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\1/'`
-host_vendor=`echo $host | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\2/'`
-host_os=`echo $host | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\3/'`
-echo "$ac_t""$host" 1>&6
-
-echo $ac_n "checking target system type""... $ac_c" 1>&6
-echo "configure:1741: checking target system type" >&5
-
-target_alias=$target
-case "$target_alias" in
-NONE)
- case $nonopt in
- NONE) target_alias=$host_alias ;;
- *) target_alias=$nonopt ;;
- esac ;;
-esac
-
-target=`${CONFIG_SHELL-/bin/sh} $ac_config_sub $target_alias`
-target_cpu=`echo $target | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\1/'`
-target_vendor=`echo $target | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\2/'`
-target_os=`echo $target | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\3/'`
-echo "$ac_t""$target" 1>&6
-
-echo $ac_n "checking build system type""... $ac_c" 1>&6
-echo "configure:1759: checking build system type" >&5
-
-build_alias=$build
-case "$build_alias" in
-NONE)
- case $nonopt in
- NONE) build_alias=$host_alias ;;
- *) build_alias=$nonopt ;;
- esac ;;
-esac
-
-build=`${CONFIG_SHELL-/bin/sh} $ac_config_sub $build_alias`
-build_cpu=`echo $build | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\1/'`
-build_vendor=`echo $build | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\2/'`
-build_os=`echo $build | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\3/'`
-echo "$ac_t""$build" 1>&6
-
-test "$host_alias" != "$target_alias" &&
- test "$program_prefix$program_suffix$program_transform_name" = \
- NONENONEs,x,x, &&
- program_prefix=${target_alias}-
-
-if test "$program_transform_name" = s,x,x,; then
- program_transform_name=
-else
- # Double any \ or $. echo might interpret backslashes.
- cat <<\EOF_SED > conftestsed
-s,\\,\\\\,g; s,\$,$$,g
-EOF_SED
- program_transform_name="`echo $program_transform_name|sed -f conftestsed`"
- rm -f conftestsed
-fi
-test "$program_prefix" != NONE &&
- program_transform_name="s,^,${program_prefix},; $program_transform_name"
-# Use a double $ so make ignores it.
-test "$program_suffix" != NONE &&
- program_transform_name="s,\$\$,${program_suffix},; $program_transform_name"
-
-# sed with no file args requires a program.
-test "$program_transform_name" = "" && program_transform_name="s,x,x,"
-
-# Extract the first word of "gcc", so it can be a program name with args.
-set dummy gcc; ac_word=$2
-echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:1803: checking for $ac_word" >&5
-if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- if test -n "$CC"; then
- ac_cv_prog_CC="$CC" # Let the user override the test.
-else
- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
- ac_dummy="$PATH"
- for ac_dir in $ac_dummy; do
- test -z "$ac_dir" && ac_dir=.
- if test -f $ac_dir/$ac_word; then
- ac_cv_prog_CC="gcc"
- break
- fi
- done
- IFS="$ac_save_ifs"
-fi
-fi
-CC="$ac_cv_prog_CC"
-if test -n "$CC"; then
- echo "$ac_t""$CC" 1>&6
-else
- echo "$ac_t""no" 1>&6
-fi
-
-if test -z "$CC"; then
- # Extract the first word of "cc", so it can be a program name with args.
-set dummy cc; ac_word=$2
-echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:1833: checking for $ac_word" >&5
-if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- if test -n "$CC"; then
- ac_cv_prog_CC="$CC" # Let the user override the test.
-else
- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
- ac_prog_rejected=no
- ac_dummy="$PATH"
- for ac_dir in $ac_dummy; do
- test -z "$ac_dir" && ac_dir=.
- if test -f $ac_dir/$ac_word; then
- if test "$ac_dir/$ac_word" = "/usr/ucb/cc"; then
- ac_prog_rejected=yes
- continue
- fi
- ac_cv_prog_CC="cc"
- break
- fi
- done
- IFS="$ac_save_ifs"
-if test $ac_prog_rejected = yes; then
- # We found a bogon in the path, so make sure we never use it.
- set dummy $ac_cv_prog_CC
- shift
- if test $# -gt 0; then
- # We chose a different compiler from the bogus one.
- # However, it has the same basename, so the bogon will be chosen
- # first if we set CC to just the basename; use the full file name.
- shift
- set dummy "$ac_dir/$ac_word" "$@"
- shift
- ac_cv_prog_CC="$@"
- fi
-fi
-fi
-fi
-CC="$ac_cv_prog_CC"
-if test -n "$CC"; then
- echo "$ac_t""$CC" 1>&6
-else
- echo "$ac_t""no" 1>&6
-fi
-
- if test -z "$CC"; then
- case "`uname -s`" in
- *win32* | *WIN32*)
- # Extract the first word of "cl", so it can be a program name with args.
-set dummy cl; ac_word=$2
-echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:1884: checking for $ac_word" >&5
-if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- if test -n "$CC"; then
- ac_cv_prog_CC="$CC" # Let the user override the test.
-else
- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
- ac_dummy="$PATH"
- for ac_dir in $ac_dummy; do
- test -z "$ac_dir" && ac_dir=.
- if test -f $ac_dir/$ac_word; then
- ac_cv_prog_CC="cl"
- break
- fi
- done
- IFS="$ac_save_ifs"
-fi
-fi
-CC="$ac_cv_prog_CC"
-if test -n "$CC"; then
- echo "$ac_t""$CC" 1>&6
-else
- echo "$ac_t""no" 1>&6
-fi
- ;;
- esac
- fi
- test -z "$CC" && { echo "configure: error: no acceptable cc found in \$PATH" 1>&2; exit 1; }
-fi
-
-echo $ac_n "checking whether the C compiler ($CC $CFLAGS $LDFLAGS) works""... $ac_c" 1>&6
-echo "configure:1916: checking whether the C compiler ($CC $CFLAGS $LDFLAGS) works" >&5
-
-ac_ext=c
-# CFLAGS is not in ac_cpp because -g, -O, etc. are not valid cpp options.
-ac_cpp='$CPP $CPPFLAGS'
-ac_compile='${CC-cc} -c $CFLAGS $CPPFLAGS conftest.$ac_ext 1>&5'
-ac_link='${CC-cc} -o conftest${ac_exeext} $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS 1>&5'
-cross_compiling=$ac_cv_prog_cc_cross
-
-cat > conftest.$ac_ext << EOF
-
-#line 1927 "configure"
-#include "confdefs.h"
-
-main(){return(0);}
-EOF
-if { (eval echo configure:1932: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- ac_cv_prog_cc_works=yes
- # If we can't run a trivial program, we are probably using a cross compiler.
- if (./conftest; exit) 2>/dev/null; then
- ac_cv_prog_cc_cross=no
- else
- ac_cv_prog_cc_cross=yes
- fi
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- ac_cv_prog_cc_works=no
-fi
-rm -fr conftest*
-ac_ext=c
-# CFLAGS is not in ac_cpp because -g, -O, etc. are not valid cpp options.
-ac_cpp='$CPP $CPPFLAGS'
-ac_compile='${CC-cc} -c $CFLAGS $CPPFLAGS conftest.$ac_ext 1>&5'
-ac_link='${CC-cc} -o conftest${ac_exeext} $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS 1>&5'
-cross_compiling=$ac_cv_prog_cc_cross
-
-echo "$ac_t""$ac_cv_prog_cc_works" 1>&6
-if test $ac_cv_prog_cc_works = no; then
- { echo "configure: error: installation or configuration problem: C compiler cannot create executables." 1>&2; exit 1; }
-fi
-echo $ac_n "checking whether the C compiler ($CC $CFLAGS $LDFLAGS) is a cross-compiler""... $ac_c" 1>&6
-echo "configure:1958: checking whether the C compiler ($CC $CFLAGS $LDFLAGS) is a cross-compiler" >&5
-echo "$ac_t""$ac_cv_prog_cc_cross" 1>&6
-cross_compiling=$ac_cv_prog_cc_cross
-
-echo $ac_n "checking whether we are using GNU C""... $ac_c" 1>&6
-echo "configure:1963: checking whether we are using GNU C" >&5
-if eval "test \"`echo '$''{'ac_cv_prog_gcc'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.c <<EOF
-#ifdef __GNUC__
- yes;
-#endif
-EOF
-if { ac_try='${CC-cc} -E conftest.c'; { (eval echo configure:1972: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }; } | egrep yes >/dev/null 2>&1; then
- ac_cv_prog_gcc=yes
-else
- ac_cv_prog_gcc=no
-fi
-fi
-
-echo "$ac_t""$ac_cv_prog_gcc" 1>&6
-
-if test $ac_cv_prog_gcc = yes; then
- GCC=yes
-else
- GCC=
-fi
-
-ac_test_CFLAGS="${CFLAGS+set}"
-ac_save_CFLAGS="$CFLAGS"
-CFLAGS=
-echo $ac_n "checking whether ${CC-cc} accepts -g""... $ac_c" 1>&6
-echo "configure:1991: checking whether ${CC-cc} accepts -g" >&5
-if eval "test \"`echo '$''{'ac_cv_prog_cc_g'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- echo 'void f(){}' > conftest.c
-if test -z "`${CC-cc} -g -c conftest.c 2>&1`"; then
- ac_cv_prog_cc_g=yes
-else
- ac_cv_prog_cc_g=no
-fi
-rm -f conftest*
-
-fi
-
-echo "$ac_t""$ac_cv_prog_cc_g" 1>&6
-if test "$ac_test_CFLAGS" = set; then
- CFLAGS="$ac_save_CFLAGS"
-elif test $ac_cv_prog_cc_g = yes; then
- if test "$GCC" = yes; then
- CFLAGS="-g -O2"
- else
- CFLAGS="-g"
- fi
-else
- if test "$GCC" = yes; then
- CFLAGS="-O2"
- else
- CFLAGS=
- fi
-fi
-
-# Find a good install program. We prefer a C program (faster),
-# so one script is as good as another. But avoid the broken or
-# incompatible versions:
-# SysV /etc/install, /usr/sbin/install
-# SunOS /usr/etc/install
-# IRIX /sbin/install
-# AIX /bin/install
-# AIX 4 /usr/bin/installbsd, which doesn't work without a -g flag
-# AFS /usr/afsws/bin/install, which mishandles nonexistent args
-# SVR4 /usr/ucb/install, which tries to use the nonexistent group "staff"
-# ./install, which can be erroneously created by make from ./install.sh.
-echo $ac_n "checking for a BSD compatible install""... $ac_c" 1>&6
-echo "configure:2034: checking for a BSD compatible install" >&5
-if test -z "$INSTALL"; then
-if eval "test \"`echo '$''{'ac_cv_path_install'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- IFS="${IFS= }"; ac_save_IFS="$IFS"; IFS=":"
- for ac_dir in $PATH; do
- # Account for people who put trailing slashes in PATH elements.
- case "$ac_dir/" in
- /|./|.//|/etc/*|/usr/sbin/*|/usr/etc/*|/sbin/*|/usr/afsws/bin/*|/usr/ucb/*) ;;
- *)
- # OSF1 and SCO ODT 3.0 have their own names for install.
- # Don't use installbsd from OSF since it installs stuff as root
- # by default.
- for ac_prog in ginstall scoinst install; do
- if test -f $ac_dir/$ac_prog; then
- if test $ac_prog = install &&
- grep dspmsg $ac_dir/$ac_prog >/dev/null 2>&1; then
- # AIX install. It has an incompatible calling convention.
- :
- else
- ac_cv_path_install="$ac_dir/$ac_prog -c"
- break 2
- fi
- fi
- done
- ;;
- esac
- done
- IFS="$ac_save_IFS"
-
-fi
- if test "${ac_cv_path_install+set}" = set; then
- INSTALL="$ac_cv_path_install"
- else
- # As a last resort, use the slow shell script. We don't cache a
- # path for INSTALL within a source directory, because that will
- # break other packages using the cache if that directory is
- # removed, or if the path is relative.
- INSTALL="$ac_install_sh"
- fi
-fi
-echo "$ac_t""$INSTALL" 1>&6
-
-# Use test -z because SunOS4 sh mishandles braces in ${var-val}.
-# It thinks the first close brace ends the variable substitution.
-test -z "$INSTALL_PROGRAM" && INSTALL_PROGRAM='${INSTALL}'
-
-test -z "$INSTALL_SCRIPT" && INSTALL_SCRIPT='${INSTALL_PROGRAM}'
-
-test -z "$INSTALL_DATA" && INSTALL_DATA='${INSTALL} -m 644'
-
-
-# Put a plausible default for CC_FOR_BUILD in Makefile.
-if test "x$cross_compiling" = "xno"; then
- CC_FOR_BUILD='$(CC)'
-else
- CC_FOR_BUILD=gcc
-fi
-
-
-
-
-AR=${AR-ar}
-
-# Extract the first word of "ranlib", so it can be a program name with args.
-set dummy ranlib; ac_word=$2
-echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:2102: checking for $ac_word" >&5
-if eval "test \"`echo '$''{'ac_cv_prog_RANLIB'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- if test -n "$RANLIB"; then
- ac_cv_prog_RANLIB="$RANLIB" # Let the user override the test.
-else
- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
- ac_dummy="$PATH"
- for ac_dir in $ac_dummy; do
- test -z "$ac_dir" && ac_dir=.
- if test -f $ac_dir/$ac_word; then
- ac_cv_prog_RANLIB="ranlib"
- break
- fi
- done
- IFS="$ac_save_ifs"
- test -z "$ac_cv_prog_RANLIB" && ac_cv_prog_RANLIB=":"
-fi
-fi
-RANLIB="$ac_cv_prog_RANLIB"
-if test -n "$RANLIB"; then
- echo "$ac_t""$RANLIB" 1>&6
-else
- echo "$ac_t""no" 1>&6
-fi
-
-
-ALL_LINGUAS=
-
- for ac_hdr in argz.h limits.h locale.h nl_types.h malloc.h string.h \
-unistd.h values.h sys/param.h
-do
-ac_safe=`echo "$ac_hdr" | sed 'y%./+-%__p_%'`
-echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6
-echo "configure:2137: checking for $ac_hdr" >&5
-if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 2142 "configure"
-#include "confdefs.h"
-#include <$ac_hdr>
-EOF
-ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:2147: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
-ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
-if test -z "$ac_err"; then
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=yes"
-else
- echo "$ac_err" >&5
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=no"
-fi
-rm -f conftest*
-fi
-if eval "test \"`echo '$ac_cv_header_'$ac_safe`\" = yes"; then
- echo "$ac_t""yes" 1>&6
- ac_tr_hdr=HAVE_`echo $ac_hdr | sed 'y%abcdefghijklmnopqrstuvwxyz./-%ABCDEFGHIJKLMNOPQRSTUVWXYZ___%'`
- cat >> confdefs.h <<EOF
-#define $ac_tr_hdr 1
-EOF
-
-else
- echo "$ac_t""no" 1>&6
-fi
-done
-
- for ac_func in getcwd munmap putenv setenv setlocale strchr strcasecmp \
-__argz_count __argz_stringify __argz_next
-do
-echo $ac_n "checking for $ac_func""... $ac_c" 1>&6
-echo "configure:2177: checking for $ac_func" >&5
-if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 2182 "configure"
-#include "confdefs.h"
-/* System header to define __stub macros and hopefully few prototypes,
- which can conflict with char $ac_func(); below. */
-#include <assert.h>
-/* Override any gcc2 internal prototype to avoid an error. */
-/* We use char because int might match the return type of a gcc2
- builtin and then its argument prototype would still apply. */
-char $ac_func();
-
-int main() {
-
-/* The GNU C library defines this for functions which it implements
- to always fail with ENOSYS. Some functions are actually named
- something starting with __ and the normal name is an alias. */
-#if defined (__stub_$ac_func) || defined (__stub___$ac_func)
-choke me
-#else
-$ac_func();
-#endif
-
-; return 0; }
-EOF
-if { (eval echo configure:2205: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=yes"
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=no"
-fi
-rm -f conftest*
-fi
-
-if eval "test \"`echo '$ac_cv_func_'$ac_func`\" = yes"; then
- echo "$ac_t""yes" 1>&6
- ac_tr_func=HAVE_`echo $ac_func | tr 'abcdefghijklmnopqrstuvwxyz' 'ABCDEFGHIJKLMNOPQRSTUVWXYZ'`
- cat >> confdefs.h <<EOF
-#define $ac_tr_func 1
-EOF
-
-else
- echo "$ac_t""no" 1>&6
-fi
-done
-
-
- if test "${ac_cv_func_stpcpy+set}" != "set"; then
- for ac_func in stpcpy
-do
-echo $ac_n "checking for $ac_func""... $ac_c" 1>&6
-echo "configure:2234: checking for $ac_func" >&5
-if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 2239 "configure"
-#include "confdefs.h"
-/* System header to define __stub macros and hopefully few prototypes,
- which can conflict with char $ac_func(); below. */
-#include <assert.h>
-/* Override any gcc2 internal prototype to avoid an error. */
-/* We use char because int might match the return type of a gcc2
- builtin and then its argument prototype would still apply. */
-char $ac_func();
-
-int main() {
-
-/* The GNU C library defines this for functions which it implements
- to always fail with ENOSYS. Some functions are actually named
- something starting with __ and the normal name is an alias. */
-#if defined (__stub_$ac_func) || defined (__stub___$ac_func)
-choke me
-#else
-$ac_func();
-#endif
-
-; return 0; }
-EOF
-if { (eval echo configure:2262: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=yes"
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=no"
-fi
-rm -f conftest*
-fi
-
-if eval "test \"`echo '$ac_cv_func_'$ac_func`\" = yes"; then
- echo "$ac_t""yes" 1>&6
- ac_tr_func=HAVE_`echo $ac_func | tr 'abcdefghijklmnopqrstuvwxyz' 'ABCDEFGHIJKLMNOPQRSTUVWXYZ'`
- cat >> confdefs.h <<EOF
-#define $ac_tr_func 1
-EOF
-
-else
- echo "$ac_t""no" 1>&6
-fi
-done
-
- fi
- if test "${ac_cv_func_stpcpy}" = "yes"; then
- cat >> confdefs.h <<\EOF
-#define HAVE_STPCPY 1
-EOF
-
- fi
-
- if test $ac_cv_header_locale_h = yes; then
- echo $ac_n "checking for LC_MESSAGES""... $ac_c" 1>&6
-echo "configure:2296: checking for LC_MESSAGES" >&5
-if eval "test \"`echo '$''{'am_cv_val_LC_MESSAGES'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 2301 "configure"
-#include "confdefs.h"
-#include <locale.h>
-int main() {
-return LC_MESSAGES
-; return 0; }
-EOF
-if { (eval echo configure:2308: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- rm -rf conftest*
- am_cv_val_LC_MESSAGES=yes
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- am_cv_val_LC_MESSAGES=no
-fi
-rm -f conftest*
-fi
-
-echo "$ac_t""$am_cv_val_LC_MESSAGES" 1>&6
- if test $am_cv_val_LC_MESSAGES = yes; then
- cat >> confdefs.h <<\EOF
-#define HAVE_LC_MESSAGES 1
-EOF
-
- fi
- fi
- echo $ac_n "checking whether NLS is requested""... $ac_c" 1>&6
-echo "configure:2329: checking whether NLS is requested" >&5
- # Check whether --enable-nls or --disable-nls was given.
-if test "${enable_nls+set}" = set; then
- enableval="$enable_nls"
- USE_NLS=$enableval
-else
- USE_NLS=yes
-fi
-
- echo "$ac_t""$USE_NLS" 1>&6
-
-
- USE_INCLUDED_LIBINTL=no
-
- if test "$USE_NLS" = "yes"; then
- cat >> confdefs.h <<\EOF
-#define ENABLE_NLS 1
-EOF
-
- echo $ac_n "checking whether included gettext is requested""... $ac_c" 1>&6
-echo "configure:2349: checking whether included gettext is requested" >&5
- # Check whether --with-included-gettext or --without-included-gettext was given.
-if test "${with_included_gettext+set}" = set; then
- withval="$with_included_gettext"
- nls_cv_force_use_gnu_gettext=$withval
-else
- nls_cv_force_use_gnu_gettext=no
-fi
-
- echo "$ac_t""$nls_cv_force_use_gnu_gettext" 1>&6
-
- nls_cv_use_gnu_gettext="$nls_cv_force_use_gnu_gettext"
- if test "$nls_cv_force_use_gnu_gettext" != "yes"; then
- nls_cv_header_intl=
- nls_cv_header_libgt=
- CATOBJEXT=NONE
-
- ac_safe=`echo "libintl.h" | sed 'y%./+-%__p_%'`
-echo $ac_n "checking for libintl.h""... $ac_c" 1>&6
-echo "configure:2368: checking for libintl.h" >&5
-if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then
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-
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-
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-if { (eval echo configure:2442: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
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- cat > conftest.$ac_ext <<EOF
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-
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-fi
-
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-
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-
- # Extract the first word of "msgfmt", so it can be a program name with args.
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- IFS="$ac_save_ifs"
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-#line 2537 "configure"
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-
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-if { (eval echo configure:2560: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
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- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=no"
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-
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- ac_tr_func=HAVE_`echo $ac_func | tr 'abcdefghijklmnopqrstuvwxyz' 'ABCDEFGHIJKLMNOPQRSTUVWXYZ'`
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-
- # Extract the first word of "gmsgfmt", so it can be a program name with args.
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-echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:2587: checking for $ac_word" >&5
-if eval "test \"`echo '$''{'ac_cv_path_GMSGFMT'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- case "$GMSGFMT" in
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- ac_cv_path_GMSGFMT="$GMSGFMT" # Let the user override the test with a path.
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- ?:/*)
- ac_cv_path_GMSGFMT="$GMSGFMT" # Let the user override the test with a dos path.
- ;;
- *)
- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
- ac_dummy="$PATH"
- for ac_dir in $ac_dummy; do
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- done
- IFS="$ac_save_ifs"
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-else
- echo "$ac_t""no" 1>&6
-fi
-
- # Extract the first word of "xgettext", so it can be a program name with args.
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-echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:2623: checking for $ac_word" >&5
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-else
- case "$XGETTEXT" in
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- ac_cv_path_XGETTEXT="$XGETTEXT" # Let the user override the test with a path.
- ;;
- *)
- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS="${IFS}:"
- for ac_dir in $PATH; do
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- IFS="$ac_save_ifs"
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-XGETTEXT="$ac_cv_path_XGETTEXT"
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-else
- echo "$ac_t""no" 1>&6
-fi
-
- cat > conftest.$ac_ext <<EOF
-#line 2655 "configure"
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-
-int main() {
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- return _nl_msg_cat_cntr
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-EOF
-if { (eval echo configure:2663: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
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- CATOBJEXT=.gmo
- DATADIRNAME=share
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- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- CATOBJEXT=.mo
- DATADIRNAME=lib
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-rm -f conftest*
- INSTOBJEXT=.mo
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-
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- echo "$ac_t""no" 1>&6
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-
-
-
- if test "$CATOBJEXT" = "NONE"; then
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-
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- # Extract the first word of "msgfmt", so it can be a program name with args.
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-echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:2695: checking for $ac_word" >&5
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-else
- case "$MSGFMT" in
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- ac_cv_path_MSGFMT="$MSGFMT" # Let the user override the test with a path.
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- *)
- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS="${IFS}:"
- for ac_dir in $PATH; do
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- if test -f $ac_dir/$ac_word; then
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- ac_cv_path_MSGFMT="$ac_dir/$ac_word"
- break
- fi
- fi
- done
- IFS="$ac_save_ifs"
- test -z "$ac_cv_path_MSGFMT" && ac_cv_path_MSGFMT="msgfmt"
- ;;
-esac
-fi
-MSGFMT="$ac_cv_path_MSGFMT"
-if test -n "$MSGFMT"; then
- echo "$ac_t""$MSGFMT" 1>&6
-else
- echo "$ac_t""no" 1>&6
-fi
-
- # Extract the first word of "gmsgfmt", so it can be a program name with args.
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-echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:2729: checking for $ac_word" >&5
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-else
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- ;;
- ?:/*)
- ac_cv_path_GMSGFMT="$GMSGFMT" # Let the user override the test with a dos path.
- ;;
- *)
- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
- ac_dummy="$PATH"
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- IFS="$ac_save_ifs"
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-GMSGFMT="$ac_cv_path_GMSGFMT"
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- echo "$ac_t""no" 1>&6
-fi
-
- # Extract the first word of "xgettext", so it can be a program name with args.
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-echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:2765: checking for $ac_word" >&5
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-else
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- ac_cv_path_XGETTEXT="$XGETTEXT" # Let the user override the test with a path.
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- *)
- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS="${IFS}:"
- for ac_dir in $PATH; do
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- fi
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- IFS="$ac_save_ifs"
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-XGETTEXT="$ac_cv_path_XGETTEXT"
-if test -n "$XGETTEXT"; then
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-else
- echo "$ac_t""no" 1>&6
-fi
-
-
- USE_INCLUDED_LIBINTL=yes
- CATOBJEXT=.gmo
- INSTOBJEXT=.mo
- DATADIRNAME=share
- INTLDEPS='$(top_builddir)/../intl/libintl.a'
- INTLLIBS=$INTLDEPS
- LIBS=`echo $LIBS | sed -e 's/-lintl//'`
- nls_cv_header_intl=libintl.h
- nls_cv_header_libgt=libgettext.h
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-
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- : ;
- else
- echo "$ac_t""found xgettext programs is not GNU xgettext; ignore it" 1>&6
- XGETTEXT=":"
- fi
- fi
-
- # We need to process the po/ directory.
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- else
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- nls_cv_header_intl=libintl.h
- nls_cv_header_libgt=libgettext.h
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-
- # If this is used in GNU gettext we have to set USE_NLS to `yes'
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-
- for lang in $ALL_LINGUAS; do
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- POFILES="$POFILES $lang.po"
- done
-
-
-
-
-
-
-
-
-
-
-
-
-
-
- if test "x$CATOBJEXT" != "x"; then
- if test "x$ALL_LINGUAS" = "x"; then
- LINGUAS=
- else
- echo $ac_n "checking for catalogs to be installed""... $ac_c" 1>&6
-echo "configure:2855: checking for catalogs to be installed" >&5
- NEW_LINGUAS=
- for lang in ${LINGUAS=$ALL_LINGUAS}; do
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- esac
- done
- LINGUAS=$NEW_LINGUAS
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- fi
-
- if test -n "$LINGUAS"; then
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- fi
- fi
-
- if test $ac_cv_header_locale_h = yes; then
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- else
- INCLUDE_LOCALE_H="\
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- fi
-
-
- if test -f $srcdir/po2tbl.sed.in; then
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-echo $ac_n "checking for linux/version.h""... $ac_c" 1>&6
-echo "configure:2883: checking for linux/version.h" >&5
-if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then
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-{ (eval echo configure:2893: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
-ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
-if test -z "$ac_err"; then
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- eval "ac_cv_header_$ac_safe=yes"
-else
- echo "$ac_err" >&5
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=no"
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-rm -f conftest*
-fi
-if eval "test \"`echo '$ac_cv_header_'$ac_safe`\" = yes"; then
- echo "$ac_t""yes" 1>&6
- msgformat=linux
-else
- echo "$ac_t""no" 1>&6
-msgformat=xopen
-fi
-
-
- sed -e '/^#/d' $srcdir/$msgformat-msg.sed > po2msg.sed
- fi
- sed -e '/^#.*[^\\]$/d' -e '/^#$/d' \
- $srcdir/po2tbl.sed.in > po2tbl.sed
- fi
-
- if test "$PACKAGE" = "gettext"; then
- GT_NO="#NO#"
- GT_YES=
- else
- GT_NO=
- GT_YES="#YES#"
- fi
-
-
-
- MKINSTALLDIRS="\$(srcdir)/../../mkinstalldirs"
-
-
- l=
-
-
- if test -d $srcdir/po; then
- test -d po || mkdir po
- if test "x$srcdir" != "x."; then
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- else
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- fi
- else
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- fi
- rm -f po/POTFILES
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- fi
-
-
-# Check for common headers.
-# FIXME: Seems to me this can cause problems for i386-windows hosts.
-# At one point there were hardcoded AC_DEFINE's if ${host} = i386-*-windows*.
-for ac_hdr in stdlib.h string.h strings.h unistd.h time.h
-do
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-echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6
-echo "configure:2962: checking for $ac_hdr" >&5
-if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 2967 "configure"
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-#include <$ac_hdr>
-EOF
-ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:2972: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
-ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
-if test -z "$ac_err"; then
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- eval "ac_cv_header_$ac_safe=yes"
-else
- echo "$ac_err" >&5
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=no"
-fi
-rm -f conftest*
-fi
-if eval "test \"`echo '$ac_cv_header_'$ac_safe`\" = yes"; then
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- ac_tr_hdr=HAVE_`echo $ac_hdr | sed 'y%abcdefghijklmnopqrstuvwxyz./-%ABCDEFGHIJKLMNOPQRSTUVWXYZ___%'`
- cat >> confdefs.h <<EOF
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-
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-
-for ac_hdr in sys/time.h sys/resource.h
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-echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6
-echo "configure:3002: checking for $ac_hdr" >&5
-if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
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-{ (eval echo configure:3012: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
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- echo "configure: failed program was:" >&5
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- eval "ac_cv_header_$ac_safe=no"
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- ac_tr_hdr=HAVE_`echo $ac_hdr | sed 'y%abcdefghijklmnopqrstuvwxyz./-%ABCDEFGHIJKLMNOPQRSTUVWXYZ___%'`
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-{ (eval echo configure:3052: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
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- echo "configure: failed program was:" >&5
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- ac_tr_hdr=HAVE_`echo $ac_hdr | sed 'y%abcdefghijklmnopqrstuvwxyz./-%ABCDEFGHIJKLMNOPQRSTUVWXYZ___%'`
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- echo "$ac_t""no" 1>&6
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-echo "configure:3082: checking for $ac_hdr" >&5
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-ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:3092: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
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- echo "configure: failed program was:" >&5
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- echo $ac_n "(cached) $ac_c" 1>&6
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-
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- eval "ac_cv_func_$ac_func=yes"
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- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
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- eval "ac_cv_func_$ac_func=no"
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-
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-
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-#line 3184 "configure"
-#include "confdefs.h"
-/* Override any gcc2 internal prototype to avoid an error. */
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-if { (eval echo configure:3195: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
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- eval "ac_cv_lib_$ac_lib_var=yes"
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-#line 3231 "configure"
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-if { (eval echo configure:3242: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
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-
-
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- sim_bswap=""
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-
-
-
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- sim_cflags=""
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-
-
-
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- *) sim_debug="-DDEBUG='(${enableval})' -DWITH_DEBUG='(${enableval})'";;
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- echo "Setting sim debug = $sim_debug" 6>&1
-fi
-else
- sim_debug=""
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-
-
-
-# Check whether --enable-sim-stdio or --disable-sim-stdio was given.
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- *) { echo "configure: error: "Unknown value $enableval passed to --enable-sim-stdio"" 1>&2; exit 1; }; sim_stdio="";;
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-fi
-else
- sim_stdio=""
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-
-
-
-# Check whether --enable-sim-trace or --disable-sim-trace was given.
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- [-0-9]*)
- sim_trace="-DTRACE='(${enableval})' -DWITH_TRACE='(${enableval})'";;
- [a-z]*)
- sim_trace=""
- for x in `echo "$enableval" | sed -e "s/,/ /g"`; do
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- sim_trace="${sim_trace}|TRACE_$x"
- fi
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- sim_trace="$sim_trace)'" ;;
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-else
- sim_trace=""
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-
-
-
-# Check whether --enable-sim-profile or --disable-sim-profile was given.
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- [-0-9]*)
- sim_profile="-DPROFILE='(${enableval})' -DWITH_PROFILE='(${enableval})'";;
- [a-z]*)
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-
-
-
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- cat > conftest.$ac_ext <<EOF
-#line 3423 "configure"
-#include "confdefs.h"
-#include <sys/types.h>
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- rm -rf conftest*
- ac_cv_type_signal=void
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- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- ac_cv_type_signal=int
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-rm -f conftest*
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-
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-cat >> confdefs.h <<EOF
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-
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- if test "$CYGWIN" = yes || test "$MINGW32" = yes; then
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-
-
-
-
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- sim_endian="-DWITH_TARGET_BYTE_ORDER=0"
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- if test x"$wire_endian" != x; then
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- else
- echo "No default endian for target $target" 1>&6
- sim_endian="-DWITH_DEFAULT_TARGET_BYTE_ORDER=0"
- fi
- fi;;
- *) { echo "configure: error: "Unknown value $enableval for --enable-sim-endian"" 1>&2; exit 1; }; sim_endian="";;
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- echo "Setting endian flags = $sim_endian" 6>&1
-fi
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- if test x"$default_endian" != x; then
- sim_endian="-DWITH_DEFAULT_TARGET_BYTE_ORDER=${default_endian}"
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- else
- sim_endian=
- fi
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-
-wire_alignment="STRICT_ALIGNMENT"
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-
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- else
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- sim_alignment="-DWITH_ALIGNMENT=0"
- fi
- fi;;
- no) if test x"$default_alignment" != x; then
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- else
- if test x"$wire_alignment" != x; then
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- else
- echo "No default alignment for target $target" 1>&6
- sim_alignment="-DWITH_DEFAULT_ALIGNMENT=0"
- fi
- fi;;
- *) { echo "configure: error: "Unknown value $enableval passed to --enable-sim-alignment"" 1>&2; exit 1; }; sim_alignment="";;
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-fi
-else
- if test x"$default_alignment" != x; then
- sim_alignment="-DWITH_DEFAULT_ALIGNMENT=${default_alignment}"
-else
- if test x"$wire_alignment" != x; then
- sim_alignment="-DWITH_ALIGNMENT=${wire_alignment}"
- else
- sim_alignment=
- fi
-fi
-fi
-
-
-# Check whether --enable-sim-hostendian or --disable-sim-hostendian was given.
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- case "${enableval}" in
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- b*|B*) sim_hostendian="-DWITH_HOST_BYTE_ORDER=BIG_ENDIAN";;
- l*|L*) sim_hostendian="-DWITH_HOST_BYTE_ORDER=LITTLE_ENDIAN";;
- *) { echo "configure: error: "Unknown value $enableval for --enable-sim-hostendian"" 1>&2; exit 1; }; sim_hostendian="";;
-esac
-if test x"$silent" != x"yes" && test x"$sim_hostendian" != x""; then
- echo "Setting hostendian flags = $sim_hostendian" 6>&1
-fi
-else
-
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- echo $ac_n "(cached) $ac_c" 1>&6
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- ac_cv_c_bigendian=unknown
-# See if sys/param.h defines the BYTE_ORDER macro.
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-#line 3630 "configure"
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-#include <sys/types.h>
-#include <sys/param.h>
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-#if !BYTE_ORDER || !BIG_ENDIAN || !LITTLE_ENDIAN
- bogus endian macros
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- # It does; now see whether it defined to BIG_ENDIAN or not.
-cat > conftest.$ac_ext <<EOF
-#line 3645 "configure"
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- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
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- cat > conftest.$ac_ext <<EOF
-#line 3676 "configure"
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-
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-
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- no) sim_scache="-DWITH_SCACHE=0" ;;
- [0-9]*) sim_scache="-DWITH_SCACHE=${enableval}";;
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- sim_scache="";;
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-fi
-
-
-
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-
-
-
-# Check whether --enable-sim-environment or --disable-sim-environment was given.
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- user | USER) sim_environment="-DWITH_ENVIRONMENT=USER_ENVIRONMENT";;
- virtual | VIRTUAL) sim_environment="-DWITH_ENVIRONMENT=VIRTUAL_ENVIRONMENT";;
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- sim_environment="";;
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-
-
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- sim_inline=""
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- *) for x in `echo "$enableval" | sed -e "s/,/ /g"`; do
- new_flag=""
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- *_INLINE) new_flag="-D$x=ALL_C_INLINE";;
- *) new_flag="-D$x""_INLINE=ALL_C_INLINE";;
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-
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-
-
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- *)
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- ;;
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- CGEN_MAINT='#'
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-
-
-
-
-
-
-
-trap '' 1 2 15
-cat > confcache <<\EOF
-# This file is a shell script that caches the results of configure
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-#
-# By default, configure uses ./config.cache as the cache file,
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-# the --cache-file=FILE option to use a different cache file; that is
-# what configure does when it calls configure scripts in
-# subdirectories, so they share the cache.
-# Giving --cache-file=/dev/null disables caching, for debugging configure.
-# config.status only pays attention to the cache file if you give it the
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-# The following way of writing the cache mishandles newlines in values,
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- case `(ac_space=' '; set | grep ac_space) 2>&1` in
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- ;;
- *)
- # `set' quotes correctly as required by POSIX, so do not add quotes.
- sed -n -e 's/^\([a-zA-Z0-9_]*_cv_[a-zA-Z0-9_]*\)=\(.*\)/\1=${\1=\2}/p'
- ;;
- esac >> confcache
-if cmp -s $cache_file confcache; then
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- cat confcache > $cache_file
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- echo "not updating unwritable cache $cache_file"
- fi
-fi
-rm -f confcache
-
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-
-test "x$prefix" = xNONE && prefix=$ac_default_prefix
-# Let make expand exec_prefix.
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-
-# Any assignment to VPATH causes Sun make to only execute
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- ac_vpsub='/^[ ]*VPATH[ ]*=[^:]*$/d'
-fi
-
-trap 'rm -f $CONFIG_STATUS conftest*; exit 1' 1 2 15
-
-DEFS=-DHAVE_CONFIG_H
-
-# Without the "./", some shells look in PATH for config.status.
-: ${CONFIG_STATUS=./config.status}
-
-echo creating $CONFIG_STATUS
-rm -f $CONFIG_STATUS
-cat > $CONFIG_STATUS <<EOF
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-# $0 $ac_configure_args
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- -version | --version | --versio | --versi | --vers | --ver | --ve | --v)
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- *) echo "\$ac_cs_usage"; exit 1 ;;
- esac
-done
-
-ac_given_srcdir=$srcdir
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-
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-EOF
-cat >> $CONFIG_STATUS <<EOF
-
-# Protect against being on the right side of a sed subst in config.status.
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-s%@sim_scache@%$sim_scache%g
-s%@sim_default_model@%$sim_default_model%g
-s%@sim_hw_cflags@%$sim_hw_cflags%g
-s%@sim_hw_objs@%$sim_hw_objs%g
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-s%@datadir@%$datadir%g
-s%@sysconfdir@%$sysconfdir%g
-s%@sharedstatedir@%$sharedstatedir%g
-s%@localstatedir@%$localstatedir%g
-s%@libdir@%$libdir%g
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-s%@host_alias@%$host_alias%g
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-s%@host_os@%$host_os%g
-s%@target@%$target%g
-s%@target_alias@%$target_alias%g
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-if test "${CONFIG_HEADERS+set}" != set; then
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- # Support "outfile[:infile[:infile...]]", defaulting infile="outfile.in".
- case "$ac_file" in
- *:*) ac_file_in=`echo "$ac_file"|sed 's%[^:]*:%%'`
- ac_file=`echo "$ac_file"|sed 's%:.*%%'` ;;
- *) ac_file_in="${ac_file}.in" ;;
- esac
-
- echo creating $ac_file
-
- rm -f conftest.frag conftest.in conftest.out
- ac_file_inputs=`echo $ac_file_in|sed -e "s%^%$ac_given_srcdir/%" -e "s%:% $ac_given_srcdir/%g"`
- cat $ac_file_inputs > conftest.in
-
-EOF
-
-# Transform confdefs.h into a sed script conftest.vals that substitutes
-# the proper values into config.h.in to produce config.h. And first:
-# Protect against being on the right side of a sed subst in config.status.
-# Protect against being in an unquoted here document in config.status.
-rm -f conftest.vals
-cat > conftest.hdr <<\EOF
-s/[\\&%]/\\&/g
-s%[\\$`]%\\&%g
-s%#define \([A-Za-z_][A-Za-z0-9_]*\) *\(.*\)%${ac_dA}\1${ac_dB}\1${ac_dC}\2${ac_dD}%gp
-s%ac_d%ac_u%gp
-s%ac_u%ac_e%gp
-EOF
-sed -n -f conftest.hdr confdefs.h > conftest.vals
-rm -f conftest.hdr
-
-# This sed command replaces #undef with comments. This is necessary, for
-# example, in the case of _POSIX_SOURCE, which is predefined and required
-# on some systems where configure will not decide to define it.
-cat >> conftest.vals <<\EOF
-s%^[ ]*#[ ]*undef[ ][ ]*[a-zA-Z_][a-zA-Z_0-9]*%/* & */%
-EOF
-
-# Break up conftest.vals because some shells have a limit on
-# the size of here documents, and old seds have small limits too.
-
-rm -f conftest.tail
-while :
-do
- ac_lines=`grep -c . conftest.vals`
- # grep -c gives empty output for an empty file on some AIX systems.
- if test -z "$ac_lines" || test "$ac_lines" -eq 0; then break; fi
- # Write a limited-size here document to conftest.frag.
- echo ' cat > conftest.frag <<CEOF' >> $CONFIG_STATUS
- sed ${ac_max_here_lines}q conftest.vals >> $CONFIG_STATUS
- echo 'CEOF
- sed -f conftest.frag conftest.in > conftest.out
- rm -f conftest.in
- mv conftest.out conftest.in
-' >> $CONFIG_STATUS
- sed 1,${ac_max_here_lines}d conftest.vals > conftest.tail
- rm -f conftest.vals
- mv conftest.tail conftest.vals
-done
-rm -f conftest.vals
-
-cat >> $CONFIG_STATUS <<\EOF
- rm -f conftest.frag conftest.h
- echo "/* $ac_file. Generated automatically by configure. */" > conftest.h
- cat conftest.in >> conftest.h
- rm -f conftest.in
- if cmp -s $ac_file conftest.h 2>/dev/null; then
- echo "$ac_file is unchanged"
- rm -f conftest.h
- else
- # Remove last slash and all that follows it. Not all systems have dirname.
- ac_dir=`echo $ac_file|sed 's%/[^/][^/]*$%%'`
- if test "$ac_dir" != "$ac_file" && test "$ac_dir" != .; then
- # The file is in a subdirectory.
- test ! -d "$ac_dir" && mkdir "$ac_dir"
- fi
- rm -f $ac_file
- mv conftest.h $ac_file
- fi
-fi; done
-
-EOF
-
-cat >> $CONFIG_STATUS <<EOF
-ac_sources="$sim_link_files"
-ac_dests="$sim_link_links"
-EOF
-
-cat >> $CONFIG_STATUS <<\EOF
-srcdir=$ac_given_srcdir
-while test -n "$ac_sources"; do
- set $ac_dests; ac_dest=$1; shift; ac_dests=$*
- set $ac_sources; ac_source=$1; shift; ac_sources=$*
-
- echo "linking $srcdir/$ac_source to $ac_dest"
-
- if test ! -r $srcdir/$ac_source; then
- { echo "configure: error: $srcdir/$ac_source: File not found" 1>&2; exit 1; }
- fi
- rm -f $ac_dest
-
- # Make relative symlinks.
- # Remove last slash and all that follows it. Not all systems have dirname.
- ac_dest_dir=`echo $ac_dest|sed 's%/[^/][^/]*$%%'`
- if test "$ac_dest_dir" != "$ac_dest" && test "$ac_dest_dir" != .; then
- # The dest file is in a subdirectory.
- test ! -d "$ac_dest_dir" && mkdir "$ac_dest_dir"
- ac_dest_dir_suffix="/`echo $ac_dest_dir|sed 's%^\./%%'`"
- # A "../" for each directory in $ac_dest_dir_suffix.
- ac_dots=`echo $ac_dest_dir_suffix|sed 's%/[^/]*%../%g'`
- else
- ac_dest_dir_suffix= ac_dots=
- fi
-
- case "$srcdir" in
- [/$]*) ac_rel_source="$srcdir/$ac_source" ;;
- *) ac_rel_source="$ac_dots$srcdir/$ac_source" ;;
- esac
-
- # Make a symlink if possible; otherwise try a hard link.
- if ln -s $ac_rel_source $ac_dest 2>/dev/null ||
- ln $srcdir/$ac_source $ac_dest; then :
- else
- { echo "configure: error: can not link $ac_dest to $srcdir/$ac_source" 1>&2; exit 1; }
- fi
-done
-EOF
-cat >> $CONFIG_STATUS <<EOF
-
-EOF
-cat >> $CONFIG_STATUS <<\EOF
-case "x$CONFIG_FILES" in
- xMakefile*)
- echo "Merging Makefile.sim+Make-common.sim into Makefile ..."
- rm -f Makesim1.tmp Makesim2.tmp Makefile
- sed -n -e '/^## COMMON_PRE_/,/^## End COMMON_PRE_/ p' <Make-common.sim >Makesim1.tmp
- sed -n -e '/^## COMMON_POST_/,/^## End COMMON_POST_/ p' <Make-common.sim >Makesim2.tmp
- sed -e '/^## COMMON_PRE_/ r Makesim1.tmp' \
- -e '/^## COMMON_POST_/ r Makesim2.tmp' \
- <Makefile.sim >Makefile
- rm -f Makefile.sim Make-common.sim Makesim1.tmp Makesim2.tmp
- ;;
- esac
- case "x$CONFIG_HEADERS" in xconfig.h:config.in) echo > stamp-h ;; esac
-
-exit 0
-EOF
-chmod +x $CONFIG_STATUS
-rm -fr confdefs* $ac_clean_files
-test "$no_create" = yes || ${CONFIG_SHELL-/bin/sh} $CONFIG_STATUS || exit 1
-
-
diff --git a/sim/m32r/configure.in b/sim/m32r/configure.in
deleted file mode 100644
index f598f29f09b..00000000000
--- a/sim/m32r/configure.in
+++ /dev/null
@@ -1,17 +0,0 @@
-dnl Process this file with autoconf to produce a configure script.
-sinclude(../common/aclocal.m4)
-AC_PREREQ(2.5)dnl
-AC_INIT(Makefile.in)
-
-SIM_AC_COMMON
-
-SIM_AC_OPTION_ENDIAN(BIG_ENDIAN)
-SIM_AC_OPTION_ALIGNMENT(STRICT_ALIGNMENT)
-SIM_AC_OPTION_HOSTENDIAN
-SIM_AC_OPTION_SCACHE(16384)
-SIM_AC_OPTION_DEFAULT_MODEL(m32r/d)
-SIM_AC_OPTION_ENVIRONMENT
-SIM_AC_OPTION_INLINE()
-SIM_AC_OPTION_CGEN_MAINT
-
-SIM_AC_OUTPUT
diff --git a/sim/m32r/cpu.c b/sim/m32r/cpu.c
deleted file mode 100644
index f8628996c7f..00000000000
--- a/sim/m32r/cpu.c
+++ /dev/null
@@ -1,181 +0,0 @@
-/* Misc. support for CPU family m32rbf.
-
-THIS FILE IS MACHINE GENERATED WITH CGEN.
-
-Copyright (C) 1996, 1997, 1998, 1999, 2000 Free Software Foundation, Inc.
-
-This file is part of the GNU Simulators.
-
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License along
-with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
-*/
-
-#define WANT_CPU m32rbf
-#define WANT_CPU_M32RBF
-
-#include "sim-main.h"
-#include "cgen-ops.h"
-
-/* Get the value of h-pc. */
-
-USI
-m32rbf_h_pc_get (SIM_CPU *current_cpu)
-{
- return CPU (h_pc);
-}
-
-/* Set a value for h-pc. */
-
-void
-m32rbf_h_pc_set (SIM_CPU *current_cpu, USI newval)
-{
- CPU (h_pc) = newval;
-}
-
-/* Get the value of h-gr. */
-
-SI
-m32rbf_h_gr_get (SIM_CPU *current_cpu, UINT regno)
-{
- return CPU (h_gr[regno]);
-}
-
-/* Set a value for h-gr. */
-
-void
-m32rbf_h_gr_set (SIM_CPU *current_cpu, UINT regno, SI newval)
-{
- CPU (h_gr[regno]) = newval;
-}
-
-/* Get the value of h-cr. */
-
-USI
-m32rbf_h_cr_get (SIM_CPU *current_cpu, UINT regno)
-{
- return GET_H_CR (regno);
-}
-
-/* Set a value for h-cr. */
-
-void
-m32rbf_h_cr_set (SIM_CPU *current_cpu, UINT regno, USI newval)
-{
- SET_H_CR (regno, newval);
-}
-
-/* Get the value of h-accum. */
-
-DI
-m32rbf_h_accum_get (SIM_CPU *current_cpu)
-{
- return GET_H_ACCUM ();
-}
-
-/* Set a value for h-accum. */
-
-void
-m32rbf_h_accum_set (SIM_CPU *current_cpu, DI newval)
-{
- SET_H_ACCUM (newval);
-}
-
-/* Get the value of h-cond. */
-
-BI
-m32rbf_h_cond_get (SIM_CPU *current_cpu)
-{
- return CPU (h_cond);
-}
-
-/* Set a value for h-cond. */
-
-void
-m32rbf_h_cond_set (SIM_CPU *current_cpu, BI newval)
-{
- CPU (h_cond) = newval;
-}
-
-/* Get the value of h-psw. */
-
-UQI
-m32rbf_h_psw_get (SIM_CPU *current_cpu)
-{
- return GET_H_PSW ();
-}
-
-/* Set a value for h-psw. */
-
-void
-m32rbf_h_psw_set (SIM_CPU *current_cpu, UQI newval)
-{
- SET_H_PSW (newval);
-}
-
-/* Get the value of h-bpsw. */
-
-UQI
-m32rbf_h_bpsw_get (SIM_CPU *current_cpu)
-{
- return CPU (h_bpsw);
-}
-
-/* Set a value for h-bpsw. */
-
-void
-m32rbf_h_bpsw_set (SIM_CPU *current_cpu, UQI newval)
-{
- CPU (h_bpsw) = newval;
-}
-
-/* Get the value of h-bbpsw. */
-
-UQI
-m32rbf_h_bbpsw_get (SIM_CPU *current_cpu)
-{
- return CPU (h_bbpsw);
-}
-
-/* Set a value for h-bbpsw. */
-
-void
-m32rbf_h_bbpsw_set (SIM_CPU *current_cpu, UQI newval)
-{
- CPU (h_bbpsw) = newval;
-}
-
-/* Get the value of h-lock. */
-
-BI
-m32rbf_h_lock_get (SIM_CPU *current_cpu)
-{
- return CPU (h_lock);
-}
-
-/* Set a value for h-lock. */
-
-void
-m32rbf_h_lock_set (SIM_CPU *current_cpu, BI newval)
-{
- CPU (h_lock) = newval;
-}
-
-/* Record trace results for INSN. */
-
-void
-m32rbf_record_trace_results (SIM_CPU *current_cpu, CGEN_INSN *insn,
- int *indices, TRACE_RECORD *tr)
-{
-}
diff --git a/sim/m32r/cpu.h b/sim/m32r/cpu.h
deleted file mode 100644
index 3b069784965..00000000000
--- a/sim/m32r/cpu.h
+++ /dev/null
@@ -1,638 +0,0 @@
-/* CPU family header for m32rbf.
-
-THIS FILE IS MACHINE GENERATED WITH CGEN.
-
-Copyright (C) 1996, 1997, 1998, 1999, 2000 Free Software Foundation, Inc.
-
-This file is part of the GNU Simulators.
-
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License along
-with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
-*/
-
-#ifndef CPU_M32RBF_H
-#define CPU_M32RBF_H
-
-/* Maximum number of instructions that are fetched at a time.
- This is for LIW type instructions sets (e.g. m32r). */
-#define MAX_LIW_INSNS 2
-
-/* Maximum number of instructions that can be executed in parallel. */
-#define MAX_PARALLEL_INSNS 1
-
-/* CPU state information. */
-typedef struct {
- /* Hardware elements. */
- struct {
- /* program counter */
- USI h_pc;
-#define GET_H_PC() CPU (h_pc)
-#define SET_H_PC(x) (CPU (h_pc) = (x))
- /* general registers */
- SI h_gr[16];
-#define GET_H_GR(a1) CPU (h_gr)[a1]
-#define SET_H_GR(a1, x) (CPU (h_gr)[a1] = (x))
- /* control registers */
- USI h_cr[16];
-#define GET_H_CR(index) m32rbf_h_cr_get_handler (current_cpu, index)
-#define SET_H_CR(index, x) \
-do { \
-m32rbf_h_cr_set_handler (current_cpu, (index), (x));\
-;} while (0)
- /* accumulator */
- DI h_accum;
-#define GET_H_ACCUM() m32rbf_h_accum_get_handler (current_cpu)
-#define SET_H_ACCUM(x) \
-do { \
-m32rbf_h_accum_set_handler (current_cpu, (x));\
-;} while (0)
- /* condition bit */
- BI h_cond;
-#define GET_H_COND() CPU (h_cond)
-#define SET_H_COND(x) (CPU (h_cond) = (x))
- /* psw part of psw */
- UQI h_psw;
-#define GET_H_PSW() m32rbf_h_psw_get_handler (current_cpu)
-#define SET_H_PSW(x) \
-do { \
-m32rbf_h_psw_set_handler (current_cpu, (x));\
-;} while (0)
- /* backup psw */
- UQI h_bpsw;
-#define GET_H_BPSW() CPU (h_bpsw)
-#define SET_H_BPSW(x) (CPU (h_bpsw) = (x))
- /* backup bpsw */
- UQI h_bbpsw;
-#define GET_H_BBPSW() CPU (h_bbpsw)
-#define SET_H_BBPSW(x) (CPU (h_bbpsw) = (x))
- /* lock */
- BI h_lock;
-#define GET_H_LOCK() CPU (h_lock)
-#define SET_H_LOCK(x) (CPU (h_lock) = (x))
- } hardware;
-#define CPU_CGEN_HW(cpu) (& (cpu)->cpu_data.hardware)
-} M32RBF_CPU_DATA;
-
-/* Cover fns for register access. */
-USI m32rbf_h_pc_get (SIM_CPU *);
-void m32rbf_h_pc_set (SIM_CPU *, USI);
-SI m32rbf_h_gr_get (SIM_CPU *, UINT);
-void m32rbf_h_gr_set (SIM_CPU *, UINT, SI);
-USI m32rbf_h_cr_get (SIM_CPU *, UINT);
-void m32rbf_h_cr_set (SIM_CPU *, UINT, USI);
-DI m32rbf_h_accum_get (SIM_CPU *);
-void m32rbf_h_accum_set (SIM_CPU *, DI);
-BI m32rbf_h_cond_get (SIM_CPU *);
-void m32rbf_h_cond_set (SIM_CPU *, BI);
-UQI m32rbf_h_psw_get (SIM_CPU *);
-void m32rbf_h_psw_set (SIM_CPU *, UQI);
-UQI m32rbf_h_bpsw_get (SIM_CPU *);
-void m32rbf_h_bpsw_set (SIM_CPU *, UQI);
-UQI m32rbf_h_bbpsw_get (SIM_CPU *);
-void m32rbf_h_bbpsw_set (SIM_CPU *, UQI);
-BI m32rbf_h_lock_get (SIM_CPU *);
-void m32rbf_h_lock_set (SIM_CPU *, BI);
-
-/* These must be hand-written. */
-extern CPUREG_FETCH_FN m32rbf_fetch_register;
-extern CPUREG_STORE_FN m32rbf_store_register;
-
-typedef struct {
- UINT h_gr;
-} MODEL_M32R_D_DATA;
-
-typedef struct {
- int empty;
-} MODEL_TEST_DATA;
-
-/* Instruction argument buffer. */
-
-union sem_fields {
- struct { /* no operands */
- int empty;
- } fmt_empty;
- struct { /* */
- UINT f_uimm4;
- } sfmt_trap;
- struct { /* */
- IADDR i_disp24;
- unsigned char out_h_gr_14;
- } sfmt_bl24;
- struct { /* */
- IADDR i_disp8;
- unsigned char out_h_gr_14;
- } sfmt_bl8;
- struct { /* */
- SI* i_dr;
- UINT f_hi16;
- UINT f_r1;
- unsigned char out_dr;
- } sfmt_seth;
- struct { /* */
- ADDR i_uimm24;
- SI* i_dr;
- UINT f_r1;
- unsigned char out_dr;
- } sfmt_ld24;
- struct { /* */
- SI* i_sr;
- UINT f_r2;
- unsigned char in_sr;
- unsigned char out_h_gr_14;
- } sfmt_jl;
- struct { /* */
- SI* i_dr;
- UINT f_r1;
- UINT f_uimm5;
- unsigned char in_dr;
- unsigned char out_dr;
- } sfmt_slli;
- struct { /* */
- SI* i_dr;
- INT f_simm8;
- UINT f_r1;
- unsigned char in_dr;
- unsigned char out_dr;
- } sfmt_addi;
- struct { /* */
- SI* i_src1;
- SI* i_src2;
- UINT f_r1;
- UINT f_r2;
- unsigned char in_src1;
- unsigned char in_src2;
- unsigned char out_src2;
- } sfmt_st_plus;
- struct { /* */
- SI* i_src1;
- SI* i_src2;
- INT f_simm16;
- UINT f_r1;
- UINT f_r2;
- unsigned char in_src1;
- unsigned char in_src2;
- } sfmt_st_d;
- struct { /* */
- SI* i_dr;
- SI* i_sr;
- UINT f_r1;
- UINT f_r2;
- unsigned char in_sr;
- unsigned char out_dr;
- unsigned char out_sr;
- } sfmt_ld_plus;
- struct { /* */
- IADDR i_disp16;
- SI* i_src1;
- SI* i_src2;
- UINT f_r1;
- UINT f_r2;
- unsigned char in_src1;
- unsigned char in_src2;
- } sfmt_beq;
- struct { /* */
- SI* i_dr;
- SI* i_sr;
- UINT f_r1;
- UINT f_r2;
- UINT f_uimm16;
- unsigned char in_sr;
- unsigned char out_dr;
- } sfmt_and3;
- struct { /* */
- SI* i_dr;
- SI* i_sr;
- INT f_simm16;
- UINT f_r1;
- UINT f_r2;
- unsigned char in_sr;
- unsigned char out_dr;
- } sfmt_add3;
- struct { /* */
- SI* i_dr;
- SI* i_sr;
- UINT f_r1;
- UINT f_r2;
- unsigned char in_dr;
- unsigned char in_sr;
- unsigned char out_dr;
- } sfmt_add;
-#if WITH_SCACHE_PBB
- /* Writeback handler. */
- struct {
- /* Pointer to argbuf entry for insn whose results need writing back. */
- const struct argbuf *abuf;
- } write;
- /* x-before handler */
- struct {
- /*const SCACHE *insns[MAX_PARALLEL_INSNS];*/
- int first_p;
- } before;
- /* x-after handler */
- struct {
- int empty;
- } after;
- /* This entry is used to terminate each pbb. */
- struct {
- /* Number of insns in pbb. */
- int insn_count;
- /* Next pbb to execute. */
- SCACHE *next;
- SCACHE *branch_target;
- } chain;
-#endif
-};
-
-/* The ARGBUF struct. */
-struct argbuf {
- /* These are the baseclass definitions. */
- IADDR addr;
- const IDESC *idesc;
- char trace_p;
- char profile_p;
- /* ??? Temporary hack for skip insns. */
- char skip_count;
- char unused;
- /* cpu specific data follows */
- union sem semantic;
- int written;
- union sem_fields fields;
-};
-
-/* A cached insn.
-
- ??? SCACHE used to contain more than just argbuf. We could delete the
- type entirely and always just use ARGBUF, but for future concerns and as
- a level of abstraction it is left in. */
-
-struct scache {
- struct argbuf argbuf;
-};
-
-/* Macros to simplify extraction, reading and semantic code.
- These define and assign the local vars that contain the insn's fields. */
-
-#define EXTRACT_IFMT_EMPTY_VARS \
- unsigned int length;
-#define EXTRACT_IFMT_EMPTY_CODE \
- length = 0; \
-
-#define EXTRACT_IFMT_ADD_VARS \
- UINT f_op1; \
- UINT f_r1; \
- UINT f_op2; \
- UINT f_r2; \
- unsigned int length;
-#define EXTRACT_IFMT_ADD_CODE \
- length = 2; \
- f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \
- f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \
- f_op2 = EXTRACT_MSB0_UINT (insn, 16, 8, 4); \
- f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \
-
-#define EXTRACT_IFMT_ADD3_VARS \
- UINT f_op1; \
- UINT f_r1; \
- UINT f_op2; \
- UINT f_r2; \
- INT f_simm16; \
- unsigned int length;
-#define EXTRACT_IFMT_ADD3_CODE \
- length = 4; \
- f_op1 = EXTRACT_MSB0_UINT (insn, 32, 0, 4); \
- f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); \
- f_op2 = EXTRACT_MSB0_UINT (insn, 32, 8, 4); \
- f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); \
- f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); \
-
-#define EXTRACT_IFMT_AND3_VARS \
- UINT f_op1; \
- UINT f_r1; \
- UINT f_op2; \
- UINT f_r2; \
- UINT f_uimm16; \
- unsigned int length;
-#define EXTRACT_IFMT_AND3_CODE \
- length = 4; \
- f_op1 = EXTRACT_MSB0_UINT (insn, 32, 0, 4); \
- f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); \
- f_op2 = EXTRACT_MSB0_UINT (insn, 32, 8, 4); \
- f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); \
- f_uimm16 = EXTRACT_MSB0_UINT (insn, 32, 16, 16); \
-
-#define EXTRACT_IFMT_OR3_VARS \
- UINT f_op1; \
- UINT f_r1; \
- UINT f_op2; \
- UINT f_r2; \
- UINT f_uimm16; \
- unsigned int length;
-#define EXTRACT_IFMT_OR3_CODE \
- length = 4; \
- f_op1 = EXTRACT_MSB0_UINT (insn, 32, 0, 4); \
- f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); \
- f_op2 = EXTRACT_MSB0_UINT (insn, 32, 8, 4); \
- f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); \
- f_uimm16 = EXTRACT_MSB0_UINT (insn, 32, 16, 16); \
-
-#define EXTRACT_IFMT_ADDI_VARS \
- UINT f_op1; \
- UINT f_r1; \
- INT f_simm8; \
- unsigned int length;
-#define EXTRACT_IFMT_ADDI_CODE \
- length = 2; \
- f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \
- f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \
- f_simm8 = EXTRACT_MSB0_INT (insn, 16, 8, 8); \
-
-#define EXTRACT_IFMT_ADDV3_VARS \
- UINT f_op1; \
- UINT f_r1; \
- UINT f_op2; \
- UINT f_r2; \
- INT f_simm16; \
- unsigned int length;
-#define EXTRACT_IFMT_ADDV3_CODE \
- length = 4; \
- f_op1 = EXTRACT_MSB0_UINT (insn, 32, 0, 4); \
- f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); \
- f_op2 = EXTRACT_MSB0_UINT (insn, 32, 8, 4); \
- f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); \
- f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); \
-
-#define EXTRACT_IFMT_BC8_VARS \
- UINT f_op1; \
- UINT f_r1; \
- SI f_disp8; \
- unsigned int length;
-#define EXTRACT_IFMT_BC8_CODE \
- length = 2; \
- f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \
- f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \
- f_disp8 = ((((EXTRACT_MSB0_INT (insn, 16, 8, 8)) << (2))) + (((pc) & (-4)))); \
-
-#define EXTRACT_IFMT_BC24_VARS \
- UINT f_op1; \
- UINT f_r1; \
- SI f_disp24; \
- unsigned int length;
-#define EXTRACT_IFMT_BC24_CODE \
- length = 4; \
- f_op1 = EXTRACT_MSB0_UINT (insn, 32, 0, 4); \
- f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); \
- f_disp24 = ((((EXTRACT_MSB0_INT (insn, 32, 8, 24)) << (2))) + (pc)); \
-
-#define EXTRACT_IFMT_BEQ_VARS \
- UINT f_op1; \
- UINT f_r1; \
- UINT f_op2; \
- UINT f_r2; \
- SI f_disp16; \
- unsigned int length;
-#define EXTRACT_IFMT_BEQ_CODE \
- length = 4; \
- f_op1 = EXTRACT_MSB0_UINT (insn, 32, 0, 4); \
- f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); \
- f_op2 = EXTRACT_MSB0_UINT (insn, 32, 8, 4); \
- f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); \
- f_disp16 = ((((EXTRACT_MSB0_INT (insn, 32, 16, 16)) << (2))) + (pc)); \
-
-#define EXTRACT_IFMT_BEQZ_VARS \
- UINT f_op1; \
- UINT f_r1; \
- UINT f_op2; \
- UINT f_r2; \
- SI f_disp16; \
- unsigned int length;
-#define EXTRACT_IFMT_BEQZ_CODE \
- length = 4; \
- f_op1 = EXTRACT_MSB0_UINT (insn, 32, 0, 4); \
- f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); \
- f_op2 = EXTRACT_MSB0_UINT (insn, 32, 8, 4); \
- f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); \
- f_disp16 = ((((EXTRACT_MSB0_INT (insn, 32, 16, 16)) << (2))) + (pc)); \
-
-#define EXTRACT_IFMT_CMP_VARS \
- UINT f_op1; \
- UINT f_r1; \
- UINT f_op2; \
- UINT f_r2; \
- unsigned int length;
-#define EXTRACT_IFMT_CMP_CODE \
- length = 2; \
- f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \
- f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \
- f_op2 = EXTRACT_MSB0_UINT (insn, 16, 8, 4); \
- f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \
-
-#define EXTRACT_IFMT_CMPI_VARS \
- UINT f_op1; \
- UINT f_r1; \
- UINT f_op2; \
- UINT f_r2; \
- INT f_simm16; \
- unsigned int length;
-#define EXTRACT_IFMT_CMPI_CODE \
- length = 4; \
- f_op1 = EXTRACT_MSB0_UINT (insn, 32, 0, 4); \
- f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); \
- f_op2 = EXTRACT_MSB0_UINT (insn, 32, 8, 4); \
- f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); \
- f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); \
-
-#define EXTRACT_IFMT_DIV_VARS \
- UINT f_op1; \
- UINT f_r1; \
- UINT f_op2; \
- UINT f_r2; \
- INT f_simm16; \
- unsigned int length;
-#define EXTRACT_IFMT_DIV_CODE \
- length = 4; \
- f_op1 = EXTRACT_MSB0_UINT (insn, 32, 0, 4); \
- f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); \
- f_op2 = EXTRACT_MSB0_UINT (insn, 32, 8, 4); \
- f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); \
- f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); \
-
-#define EXTRACT_IFMT_JL_VARS \
- UINT f_op1; \
- UINT f_r1; \
- UINT f_op2; \
- UINT f_r2; \
- unsigned int length;
-#define EXTRACT_IFMT_JL_CODE \
- length = 2; \
- f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \
- f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \
- f_op2 = EXTRACT_MSB0_UINT (insn, 16, 8, 4); \
- f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \
-
-#define EXTRACT_IFMT_LD24_VARS \
- UINT f_op1; \
- UINT f_r1; \
- UINT f_uimm24; \
- unsigned int length;
-#define EXTRACT_IFMT_LD24_CODE \
- length = 4; \
- f_op1 = EXTRACT_MSB0_UINT (insn, 32, 0, 4); \
- f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); \
- f_uimm24 = EXTRACT_MSB0_UINT (insn, 32, 8, 24); \
-
-#define EXTRACT_IFMT_LDI16_VARS \
- UINT f_op1; \
- UINT f_r1; \
- UINT f_op2; \
- UINT f_r2; \
- INT f_simm16; \
- unsigned int length;
-#define EXTRACT_IFMT_LDI16_CODE \
- length = 4; \
- f_op1 = EXTRACT_MSB0_UINT (insn, 32, 0, 4); \
- f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); \
- f_op2 = EXTRACT_MSB0_UINT (insn, 32, 8, 4); \
- f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); \
- f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); \
-
-#define EXTRACT_IFMT_MVFACHI_VARS \
- UINT f_op1; \
- UINT f_r1; \
- UINT f_op2; \
- UINT f_r2; \
- unsigned int length;
-#define EXTRACT_IFMT_MVFACHI_CODE \
- length = 2; \
- f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \
- f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \
- f_op2 = EXTRACT_MSB0_UINT (insn, 16, 8, 4); \
- f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \
-
-#define EXTRACT_IFMT_MVFC_VARS \
- UINT f_op1; \
- UINT f_r1; \
- UINT f_op2; \
- UINT f_r2; \
- unsigned int length;
-#define EXTRACT_IFMT_MVFC_CODE \
- length = 2; \
- f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \
- f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \
- f_op2 = EXTRACT_MSB0_UINT (insn, 16, 8, 4); \
- f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \
-
-#define EXTRACT_IFMT_MVTACHI_VARS \
- UINT f_op1; \
- UINT f_r1; \
- UINT f_op2; \
- UINT f_r2; \
- unsigned int length;
-#define EXTRACT_IFMT_MVTACHI_CODE \
- length = 2; \
- f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \
- f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \
- f_op2 = EXTRACT_MSB0_UINT (insn, 16, 8, 4); \
- f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \
-
-#define EXTRACT_IFMT_MVTC_VARS \
- UINT f_op1; \
- UINT f_r1; \
- UINT f_op2; \
- UINT f_r2; \
- unsigned int length;
-#define EXTRACT_IFMT_MVTC_CODE \
- length = 2; \
- f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \
- f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \
- f_op2 = EXTRACT_MSB0_UINT (insn, 16, 8, 4); \
- f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \
-
-#define EXTRACT_IFMT_NOP_VARS \
- UINT f_op1; \
- UINT f_r1; \
- UINT f_op2; \
- UINT f_r2; \
- unsigned int length;
-#define EXTRACT_IFMT_NOP_CODE \
- length = 2; \
- f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \
- f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \
- f_op2 = EXTRACT_MSB0_UINT (insn, 16, 8, 4); \
- f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \
-
-#define EXTRACT_IFMT_SETH_VARS \
- UINT f_op1; \
- UINT f_r1; \
- UINT f_op2; \
- UINT f_r2; \
- UINT f_hi16; \
- unsigned int length;
-#define EXTRACT_IFMT_SETH_CODE \
- length = 4; \
- f_op1 = EXTRACT_MSB0_UINT (insn, 32, 0, 4); \
- f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); \
- f_op2 = EXTRACT_MSB0_UINT (insn, 32, 8, 4); \
- f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); \
- f_hi16 = EXTRACT_MSB0_UINT (insn, 32, 16, 16); \
-
-#define EXTRACT_IFMT_SLLI_VARS \
- UINT f_op1; \
- UINT f_r1; \
- UINT f_shift_op2; \
- UINT f_uimm5; \
- unsigned int length;
-#define EXTRACT_IFMT_SLLI_CODE \
- length = 2; \
- f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \
- f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \
- f_shift_op2 = EXTRACT_MSB0_UINT (insn, 16, 8, 3); \
- f_uimm5 = EXTRACT_MSB0_UINT (insn, 16, 11, 5); \
-
-#define EXTRACT_IFMT_ST_D_VARS \
- UINT f_op1; \
- UINT f_r1; \
- UINT f_op2; \
- UINT f_r2; \
- INT f_simm16; \
- unsigned int length;
-#define EXTRACT_IFMT_ST_D_CODE \
- length = 4; \
- f_op1 = EXTRACT_MSB0_UINT (insn, 32, 0, 4); \
- f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); \
- f_op2 = EXTRACT_MSB0_UINT (insn, 32, 8, 4); \
- f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); \
- f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); \
-
-#define EXTRACT_IFMT_TRAP_VARS \
- UINT f_op1; \
- UINT f_r1; \
- UINT f_op2; \
- UINT f_uimm4; \
- unsigned int length;
-#define EXTRACT_IFMT_TRAP_CODE \
- length = 2; \
- f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \
- f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \
- f_op2 = EXTRACT_MSB0_UINT (insn, 16, 8, 4); \
- f_uimm4 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \
-
-/* Collection of various things for the trace handler to use. */
-
-typedef struct trace_record {
- IADDR pc;
- /* FIXME:wip */
-} TRACE_RECORD;
-
-#endif /* CPU_M32RBF_H */
diff --git a/sim/m32r/cpuall.h b/sim/m32r/cpuall.h
deleted file mode 100644
index a18002266c1..00000000000
--- a/sim/m32r/cpuall.h
+++ /dev/null
@@ -1,74 +0,0 @@
-/* Simulator CPU header for m32r.
-
-THIS FILE IS MACHINE GENERATED WITH CGEN.
-
-Copyright (C) 1996, 1997, 1998, 1999, 2000 Free Software Foundation, Inc.
-
-This file is part of the GNU Simulators.
-
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License along
-with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
-*/
-
-#ifndef M32R_CPUALL_H
-#define M32R_CPUALL_H
-
-/* Include files for each cpu family. */
-
-#ifdef WANT_CPU_M32RBF
-#include "eng.h"
-#include "cgen-engine.h"
-#include "cpu.h"
-#include "decode.h"
-#endif
-
-#ifdef WANT_CPU_M32RXF
-#include "engx.h"
-#include "cgen-engine.h"
-#include "cpux.h"
-#include "decodex.h"
-#endif
-
-extern const MACH m32r_mach;
-extern const MACH m32rx_mach;
-
-#ifndef WANT_CPU
-/* The ARGBUF struct. */
-struct argbuf {
- /* These are the baseclass definitions. */
- IADDR addr;
- const IDESC *idesc;
- char trace_p;
- char profile_p;
- /* ??? Temporary hack for skip insns. */
- char skip_count;
- char unused;
- /* cpu specific data follows */
-};
-#endif
-
-#ifndef WANT_CPU
-/* A cached insn.
-
- ??? SCACHE used to contain more than just argbuf. We could delete the
- type entirely and always just use ARGBUF, but for future concerns and as
- a level of abstraction it is left in. */
-
-struct scache {
- struct argbuf argbuf;
-};
-#endif
-
-#endif /* M32R_CPUALL_H */
diff --git a/sim/m32r/cpux.c b/sim/m32r/cpux.c
deleted file mode 100644
index 95eb3a93c69..00000000000
--- a/sim/m32r/cpux.c
+++ /dev/null
@@ -1,197 +0,0 @@
-/* Misc. support for CPU family m32rxf.
-
-THIS FILE IS MACHINE GENERATED WITH CGEN.
-
-Copyright (C) 1996, 1997, 1998, 1999, 2000 Free Software Foundation, Inc.
-
-This file is part of the GNU Simulators.
-
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License along
-with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
-*/
-
-#define WANT_CPU m32rxf
-#define WANT_CPU_M32RXF
-
-#include "sim-main.h"
-#include "cgen-ops.h"
-
-/* Get the value of h-pc. */
-
-USI
-m32rxf_h_pc_get (SIM_CPU *current_cpu)
-{
- return CPU (h_pc);
-}
-
-/* Set a value for h-pc. */
-
-void
-m32rxf_h_pc_set (SIM_CPU *current_cpu, USI newval)
-{
- CPU (h_pc) = newval;
-}
-
-/* Get the value of h-gr. */
-
-SI
-m32rxf_h_gr_get (SIM_CPU *current_cpu, UINT regno)
-{
- return CPU (h_gr[regno]);
-}
-
-/* Set a value for h-gr. */
-
-void
-m32rxf_h_gr_set (SIM_CPU *current_cpu, UINT regno, SI newval)
-{
- CPU (h_gr[regno]) = newval;
-}
-
-/* Get the value of h-cr. */
-
-USI
-m32rxf_h_cr_get (SIM_CPU *current_cpu, UINT regno)
-{
- return GET_H_CR (regno);
-}
-
-/* Set a value for h-cr. */
-
-void
-m32rxf_h_cr_set (SIM_CPU *current_cpu, UINT regno, USI newval)
-{
- SET_H_CR (regno, newval);
-}
-
-/* Get the value of h-accum. */
-
-DI
-m32rxf_h_accum_get (SIM_CPU *current_cpu)
-{
- return GET_H_ACCUM ();
-}
-
-/* Set a value for h-accum. */
-
-void
-m32rxf_h_accum_set (SIM_CPU *current_cpu, DI newval)
-{
- SET_H_ACCUM (newval);
-}
-
-/* Get the value of h-accums. */
-
-DI
-m32rxf_h_accums_get (SIM_CPU *current_cpu, UINT regno)
-{
- return GET_H_ACCUMS (regno);
-}
-
-/* Set a value for h-accums. */
-
-void
-m32rxf_h_accums_set (SIM_CPU *current_cpu, UINT regno, DI newval)
-{
- SET_H_ACCUMS (regno, newval);
-}
-
-/* Get the value of h-cond. */
-
-BI
-m32rxf_h_cond_get (SIM_CPU *current_cpu)
-{
- return CPU (h_cond);
-}
-
-/* Set a value for h-cond. */
-
-void
-m32rxf_h_cond_set (SIM_CPU *current_cpu, BI newval)
-{
- CPU (h_cond) = newval;
-}
-
-/* Get the value of h-psw. */
-
-UQI
-m32rxf_h_psw_get (SIM_CPU *current_cpu)
-{
- return GET_H_PSW ();
-}
-
-/* Set a value for h-psw. */
-
-void
-m32rxf_h_psw_set (SIM_CPU *current_cpu, UQI newval)
-{
- SET_H_PSW (newval);
-}
-
-/* Get the value of h-bpsw. */
-
-UQI
-m32rxf_h_bpsw_get (SIM_CPU *current_cpu)
-{
- return CPU (h_bpsw);
-}
-
-/* Set a value for h-bpsw. */
-
-void
-m32rxf_h_bpsw_set (SIM_CPU *current_cpu, UQI newval)
-{
- CPU (h_bpsw) = newval;
-}
-
-/* Get the value of h-bbpsw. */
-
-UQI
-m32rxf_h_bbpsw_get (SIM_CPU *current_cpu)
-{
- return CPU (h_bbpsw);
-}
-
-/* Set a value for h-bbpsw. */
-
-void
-m32rxf_h_bbpsw_set (SIM_CPU *current_cpu, UQI newval)
-{
- CPU (h_bbpsw) = newval;
-}
-
-/* Get the value of h-lock. */
-
-BI
-m32rxf_h_lock_get (SIM_CPU *current_cpu)
-{
- return CPU (h_lock);
-}
-
-/* Set a value for h-lock. */
-
-void
-m32rxf_h_lock_set (SIM_CPU *current_cpu, BI newval)
-{
- CPU (h_lock) = newval;
-}
-
-/* Record trace results for INSN. */
-
-void
-m32rxf_record_trace_results (SIM_CPU *current_cpu, CGEN_INSN *insn,
- int *indices, TRACE_RECORD *tr)
-{
-}
diff --git a/sim/m32r/cpux.h b/sim/m32r/cpux.h
deleted file mode 100644
index 638544460bc..00000000000
--- a/sim/m32r/cpux.h
+++ /dev/null
@@ -1,958 +0,0 @@
-/* CPU family header for m32rxf.
-
-THIS FILE IS MACHINE GENERATED WITH CGEN.
-
-Copyright (C) 1996, 1997, 1998, 1999, 2000 Free Software Foundation, Inc.
-
-This file is part of the GNU Simulators.
-
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License along
-with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
-*/
-
-#ifndef CPU_M32RXF_H
-#define CPU_M32RXF_H
-
-/* Maximum number of instructions that are fetched at a time.
- This is for LIW type instructions sets (e.g. m32r). */
-#define MAX_LIW_INSNS 2
-
-/* Maximum number of instructions that can be executed in parallel. */
-#define MAX_PARALLEL_INSNS 2
-
-/* CPU state information. */
-typedef struct {
- /* Hardware elements. */
- struct {
- /* program counter */
- USI h_pc;
-#define GET_H_PC() CPU (h_pc)
-#define SET_H_PC(x) (CPU (h_pc) = (x))
- /* general registers */
- SI h_gr[16];
-#define GET_H_GR(a1) CPU (h_gr)[a1]
-#define SET_H_GR(a1, x) (CPU (h_gr)[a1] = (x))
- /* control registers */
- USI h_cr[16];
-#define GET_H_CR(index) m32rxf_h_cr_get_handler (current_cpu, index)
-#define SET_H_CR(index, x) \
-do { \
-m32rxf_h_cr_set_handler (current_cpu, (index), (x));\
-;} while (0)
- /* accumulator */
- DI h_accum;
-#define GET_H_ACCUM() m32rxf_h_accum_get_handler (current_cpu)
-#define SET_H_ACCUM(x) \
-do { \
-m32rxf_h_accum_set_handler (current_cpu, (x));\
-;} while (0)
- /* accumulators */
- DI h_accums[2];
-#define GET_H_ACCUMS(index) m32rxf_h_accums_get_handler (current_cpu, index)
-#define SET_H_ACCUMS(index, x) \
-do { \
-m32rxf_h_accums_set_handler (current_cpu, (index), (x));\
-;} while (0)
- /* condition bit */
- BI h_cond;
-#define GET_H_COND() CPU (h_cond)
-#define SET_H_COND(x) (CPU (h_cond) = (x))
- /* psw part of psw */
- UQI h_psw;
-#define GET_H_PSW() m32rxf_h_psw_get_handler (current_cpu)
-#define SET_H_PSW(x) \
-do { \
-m32rxf_h_psw_set_handler (current_cpu, (x));\
-;} while (0)
- /* backup psw */
- UQI h_bpsw;
-#define GET_H_BPSW() CPU (h_bpsw)
-#define SET_H_BPSW(x) (CPU (h_bpsw) = (x))
- /* backup bpsw */
- UQI h_bbpsw;
-#define GET_H_BBPSW() CPU (h_bbpsw)
-#define SET_H_BBPSW(x) (CPU (h_bbpsw) = (x))
- /* lock */
- BI h_lock;
-#define GET_H_LOCK() CPU (h_lock)
-#define SET_H_LOCK(x) (CPU (h_lock) = (x))
- } hardware;
-#define CPU_CGEN_HW(cpu) (& (cpu)->cpu_data.hardware)
-} M32RXF_CPU_DATA;
-
-/* Cover fns for register access. */
-USI m32rxf_h_pc_get (SIM_CPU *);
-void m32rxf_h_pc_set (SIM_CPU *, USI);
-SI m32rxf_h_gr_get (SIM_CPU *, UINT);
-void m32rxf_h_gr_set (SIM_CPU *, UINT, SI);
-USI m32rxf_h_cr_get (SIM_CPU *, UINT);
-void m32rxf_h_cr_set (SIM_CPU *, UINT, USI);
-DI m32rxf_h_accum_get (SIM_CPU *);
-void m32rxf_h_accum_set (SIM_CPU *, DI);
-DI m32rxf_h_accums_get (SIM_CPU *, UINT);
-void m32rxf_h_accums_set (SIM_CPU *, UINT, DI);
-BI m32rxf_h_cond_get (SIM_CPU *);
-void m32rxf_h_cond_set (SIM_CPU *, BI);
-UQI m32rxf_h_psw_get (SIM_CPU *);
-void m32rxf_h_psw_set (SIM_CPU *, UQI);
-UQI m32rxf_h_bpsw_get (SIM_CPU *);
-void m32rxf_h_bpsw_set (SIM_CPU *, UQI);
-UQI m32rxf_h_bbpsw_get (SIM_CPU *);
-void m32rxf_h_bbpsw_set (SIM_CPU *, UQI);
-BI m32rxf_h_lock_get (SIM_CPU *);
-void m32rxf_h_lock_set (SIM_CPU *, BI);
-
-/* These must be hand-written. */
-extern CPUREG_FETCH_FN m32rxf_fetch_register;
-extern CPUREG_STORE_FN m32rxf_store_register;
-
-typedef struct {
- int empty;
-} MODEL_M32RX_DATA;
-
-/* Instruction argument buffer. */
-
-union sem_fields {
- struct { /* no operands */
- int empty;
- } fmt_empty;
- struct { /* */
- UINT f_uimm4;
- } sfmt_trap;
- struct { /* */
- IADDR i_disp24;
- unsigned char out_h_gr_14;
- } sfmt_bl24;
- struct { /* */
- IADDR i_disp8;
- unsigned char out_h_gr_14;
- } sfmt_bl8;
- struct { /* */
- SI f_imm1;
- UINT f_accd;
- UINT f_accs;
- } sfmt_rac_dsi;
- struct { /* */
- SI* i_dr;
- UINT f_hi16;
- UINT f_r1;
- unsigned char out_dr;
- } sfmt_seth;
- struct { /* */
- SI* i_src1;
- UINT f_accs;
- UINT f_r1;
- unsigned char in_src1;
- } sfmt_mvtachi_a;
- struct { /* */
- SI* i_dr;
- UINT f_accs;
- UINT f_r1;
- unsigned char out_dr;
- } sfmt_mvfachi_a;
- struct { /* */
- ADDR i_uimm24;
- SI* i_dr;
- UINT f_r1;
- unsigned char out_dr;
- } sfmt_ld24;
- struct { /* */
- SI* i_sr;
- UINT f_r2;
- unsigned char in_sr;
- unsigned char out_h_gr_14;
- } sfmt_jl;
- struct { /* */
- SI* i_dr;
- UINT f_r1;
- UINT f_uimm5;
- unsigned char in_dr;
- unsigned char out_dr;
- } sfmt_slli;
- struct { /* */
- SI* i_dr;
- INT f_simm8;
- UINT f_r1;
- unsigned char in_dr;
- unsigned char out_dr;
- } sfmt_addi;
- struct { /* */
- SI* i_src1;
- SI* i_src2;
- UINT f_r1;
- UINT f_r2;
- unsigned char in_src1;
- unsigned char in_src2;
- unsigned char out_src2;
- } sfmt_st_plus;
- struct { /* */
- SI* i_src1;
- SI* i_src2;
- INT f_simm16;
- UINT f_r1;
- UINT f_r2;
- unsigned char in_src1;
- unsigned char in_src2;
- } sfmt_st_d;
- struct { /* */
- SI* i_src1;
- SI* i_src2;
- UINT f_acc;
- UINT f_r1;
- UINT f_r2;
- unsigned char in_src1;
- unsigned char in_src2;
- } sfmt_machi_a;
- struct { /* */
- SI* i_dr;
- SI* i_sr;
- UINT f_r1;
- UINT f_r2;
- unsigned char in_sr;
- unsigned char out_dr;
- unsigned char out_sr;
- } sfmt_ld_plus;
- struct { /* */
- IADDR i_disp16;
- SI* i_src1;
- SI* i_src2;
- UINT f_r1;
- UINT f_r2;
- unsigned char in_src1;
- unsigned char in_src2;
- } sfmt_beq;
- struct { /* */
- SI* i_dr;
- SI* i_sr;
- UINT f_r1;
- UINT f_r2;
- UINT f_uimm16;
- unsigned char in_sr;
- unsigned char out_dr;
- } sfmt_and3;
- struct { /* */
- SI* i_dr;
- SI* i_sr;
- INT f_simm16;
- UINT f_r1;
- UINT f_r2;
- unsigned char in_sr;
- unsigned char out_dr;
- } sfmt_add3;
- struct { /* */
- SI* i_dr;
- SI* i_sr;
- UINT f_r1;
- UINT f_r2;
- unsigned char in_dr;
- unsigned char in_sr;
- unsigned char out_dr;
- } sfmt_add;
-#if WITH_SCACHE_PBB
- /* Writeback handler. */
- struct {
- /* Pointer to argbuf entry for insn whose results need writing back. */
- const struct argbuf *abuf;
- } write;
- /* x-before handler */
- struct {
- /*const SCACHE *insns[MAX_PARALLEL_INSNS];*/
- int first_p;
- } before;
- /* x-after handler */
- struct {
- int empty;
- } after;
- /* This entry is used to terminate each pbb. */
- struct {
- /* Number of insns in pbb. */
- int insn_count;
- /* Next pbb to execute. */
- SCACHE *next;
- SCACHE *branch_target;
- } chain;
-#endif
-};
-
-/* The ARGBUF struct. */
-struct argbuf {
- /* These are the baseclass definitions. */
- IADDR addr;
- const IDESC *idesc;
- char trace_p;
- char profile_p;
- /* ??? Temporary hack for skip insns. */
- char skip_count;
- char unused;
- /* cpu specific data follows */
- union sem semantic;
- int written;
- union sem_fields fields;
-};
-
-/* A cached insn.
-
- ??? SCACHE used to contain more than just argbuf. We could delete the
- type entirely and always just use ARGBUF, but for future concerns and as
- a level of abstraction it is left in. */
-
-struct scache {
- struct argbuf argbuf;
-};
-
-/* Macros to simplify extraction, reading and semantic code.
- These define and assign the local vars that contain the insn's fields. */
-
-#define EXTRACT_IFMT_EMPTY_VARS \
- unsigned int length;
-#define EXTRACT_IFMT_EMPTY_CODE \
- length = 0; \
-
-#define EXTRACT_IFMT_ADD_VARS \
- UINT f_op1; \
- UINT f_r1; \
- UINT f_op2; \
- UINT f_r2; \
- unsigned int length;
-#define EXTRACT_IFMT_ADD_CODE \
- length = 2; \
- f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \
- f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \
- f_op2 = EXTRACT_MSB0_UINT (insn, 16, 8, 4); \
- f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \
-
-#define EXTRACT_IFMT_ADD3_VARS \
- UINT f_op1; \
- UINT f_r1; \
- UINT f_op2; \
- UINT f_r2; \
- INT f_simm16; \
- unsigned int length;
-#define EXTRACT_IFMT_ADD3_CODE \
- length = 4; \
- f_op1 = EXTRACT_MSB0_UINT (insn, 32, 0, 4); \
- f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); \
- f_op2 = EXTRACT_MSB0_UINT (insn, 32, 8, 4); \
- f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); \
- f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); \
-
-#define EXTRACT_IFMT_AND3_VARS \
- UINT f_op1; \
- UINT f_r1; \
- UINT f_op2; \
- UINT f_r2; \
- UINT f_uimm16; \
- unsigned int length;
-#define EXTRACT_IFMT_AND3_CODE \
- length = 4; \
- f_op1 = EXTRACT_MSB0_UINT (insn, 32, 0, 4); \
- f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); \
- f_op2 = EXTRACT_MSB0_UINT (insn, 32, 8, 4); \
- f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); \
- f_uimm16 = EXTRACT_MSB0_UINT (insn, 32, 16, 16); \
-
-#define EXTRACT_IFMT_OR3_VARS \
- UINT f_op1; \
- UINT f_r1; \
- UINT f_op2; \
- UINT f_r2; \
- UINT f_uimm16; \
- unsigned int length;
-#define EXTRACT_IFMT_OR3_CODE \
- length = 4; \
- f_op1 = EXTRACT_MSB0_UINT (insn, 32, 0, 4); \
- f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); \
- f_op2 = EXTRACT_MSB0_UINT (insn, 32, 8, 4); \
- f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); \
- f_uimm16 = EXTRACT_MSB0_UINT (insn, 32, 16, 16); \
-
-#define EXTRACT_IFMT_ADDI_VARS \
- UINT f_op1; \
- UINT f_r1; \
- INT f_simm8; \
- unsigned int length;
-#define EXTRACT_IFMT_ADDI_CODE \
- length = 2; \
- f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \
- f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \
- f_simm8 = EXTRACT_MSB0_INT (insn, 16, 8, 8); \
-
-#define EXTRACT_IFMT_ADDV3_VARS \
- UINT f_op1; \
- UINT f_r1; \
- UINT f_op2; \
- UINT f_r2; \
- INT f_simm16; \
- unsigned int length;
-#define EXTRACT_IFMT_ADDV3_CODE \
- length = 4; \
- f_op1 = EXTRACT_MSB0_UINT (insn, 32, 0, 4); \
- f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); \
- f_op2 = EXTRACT_MSB0_UINT (insn, 32, 8, 4); \
- f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); \
- f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); \
-
-#define EXTRACT_IFMT_BC8_VARS \
- UINT f_op1; \
- UINT f_r1; \
- SI f_disp8; \
- unsigned int length;
-#define EXTRACT_IFMT_BC8_CODE \
- length = 2; \
- f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \
- f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \
- f_disp8 = ((((EXTRACT_MSB0_INT (insn, 16, 8, 8)) << (2))) + (((pc) & (-4)))); \
-
-#define EXTRACT_IFMT_BC24_VARS \
- UINT f_op1; \
- UINT f_r1; \
- SI f_disp24; \
- unsigned int length;
-#define EXTRACT_IFMT_BC24_CODE \
- length = 4; \
- f_op1 = EXTRACT_MSB0_UINT (insn, 32, 0, 4); \
- f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); \
- f_disp24 = ((((EXTRACT_MSB0_INT (insn, 32, 8, 24)) << (2))) + (pc)); \
-
-#define EXTRACT_IFMT_BEQ_VARS \
- UINT f_op1; \
- UINT f_r1; \
- UINT f_op2; \
- UINT f_r2; \
- SI f_disp16; \
- unsigned int length;
-#define EXTRACT_IFMT_BEQ_CODE \
- length = 4; \
- f_op1 = EXTRACT_MSB0_UINT (insn, 32, 0, 4); \
- f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); \
- f_op2 = EXTRACT_MSB0_UINT (insn, 32, 8, 4); \
- f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); \
- f_disp16 = ((((EXTRACT_MSB0_INT (insn, 32, 16, 16)) << (2))) + (pc)); \
-
-#define EXTRACT_IFMT_BEQZ_VARS \
- UINT f_op1; \
- UINT f_r1; \
- UINT f_op2; \
- UINT f_r2; \
- SI f_disp16; \
- unsigned int length;
-#define EXTRACT_IFMT_BEQZ_CODE \
- length = 4; \
- f_op1 = EXTRACT_MSB0_UINT (insn, 32, 0, 4); \
- f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); \
- f_op2 = EXTRACT_MSB0_UINT (insn, 32, 8, 4); \
- f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); \
- f_disp16 = ((((EXTRACT_MSB0_INT (insn, 32, 16, 16)) << (2))) + (pc)); \
-
-#define EXTRACT_IFMT_CMP_VARS \
- UINT f_op1; \
- UINT f_r1; \
- UINT f_op2; \
- UINT f_r2; \
- unsigned int length;
-#define EXTRACT_IFMT_CMP_CODE \
- length = 2; \
- f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \
- f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \
- f_op2 = EXTRACT_MSB0_UINT (insn, 16, 8, 4); \
- f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \
-
-#define EXTRACT_IFMT_CMPI_VARS \
- UINT f_op1; \
- UINT f_r1; \
- UINT f_op2; \
- UINT f_r2; \
- INT f_simm16; \
- unsigned int length;
-#define EXTRACT_IFMT_CMPI_CODE \
- length = 4; \
- f_op1 = EXTRACT_MSB0_UINT (insn, 32, 0, 4); \
- f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); \
- f_op2 = EXTRACT_MSB0_UINT (insn, 32, 8, 4); \
- f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); \
- f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); \
-
-#define EXTRACT_IFMT_CMPZ_VARS \
- UINT f_op1; \
- UINT f_r1; \
- UINT f_op2; \
- UINT f_r2; \
- unsigned int length;
-#define EXTRACT_IFMT_CMPZ_CODE \
- length = 2; \
- f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \
- f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \
- f_op2 = EXTRACT_MSB0_UINT (insn, 16, 8, 4); \
- f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \
-
-#define EXTRACT_IFMT_DIV_VARS \
- UINT f_op1; \
- UINT f_r1; \
- UINT f_op2; \
- UINT f_r2; \
- INT f_simm16; \
- unsigned int length;
-#define EXTRACT_IFMT_DIV_CODE \
- length = 4; \
- f_op1 = EXTRACT_MSB0_UINT (insn, 32, 0, 4); \
- f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); \
- f_op2 = EXTRACT_MSB0_UINT (insn, 32, 8, 4); \
- f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); \
- f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); \
-
-#define EXTRACT_IFMT_JC_VARS \
- UINT f_op1; \
- UINT f_r1; \
- UINT f_op2; \
- UINT f_r2; \
- unsigned int length;
-#define EXTRACT_IFMT_JC_CODE \
- length = 2; \
- f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \
- f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \
- f_op2 = EXTRACT_MSB0_UINT (insn, 16, 8, 4); \
- f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \
-
-#define EXTRACT_IFMT_LD24_VARS \
- UINT f_op1; \
- UINT f_r1; \
- UINT f_uimm24; \
- unsigned int length;
-#define EXTRACT_IFMT_LD24_CODE \
- length = 4; \
- f_op1 = EXTRACT_MSB0_UINT (insn, 32, 0, 4); \
- f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); \
- f_uimm24 = EXTRACT_MSB0_UINT (insn, 32, 8, 24); \
-
-#define EXTRACT_IFMT_LDI16_VARS \
- UINT f_op1; \
- UINT f_r1; \
- UINT f_op2; \
- UINT f_r2; \
- INT f_simm16; \
- unsigned int length;
-#define EXTRACT_IFMT_LDI16_CODE \
- length = 4; \
- f_op1 = EXTRACT_MSB0_UINT (insn, 32, 0, 4); \
- f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); \
- f_op2 = EXTRACT_MSB0_UINT (insn, 32, 8, 4); \
- f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); \
- f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); \
-
-#define EXTRACT_IFMT_MACHI_A_VARS \
- UINT f_op1; \
- UINT f_r1; \
- UINT f_acc; \
- UINT f_op23; \
- UINT f_r2; \
- unsigned int length;
-#define EXTRACT_IFMT_MACHI_A_CODE \
- length = 2; \
- f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \
- f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \
- f_acc = EXTRACT_MSB0_UINT (insn, 16, 8, 1); \
- f_op23 = EXTRACT_MSB0_UINT (insn, 16, 9, 3); \
- f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \
-
-#define EXTRACT_IFMT_MVFACHI_A_VARS \
- UINT f_op1; \
- UINT f_r1; \
- UINT f_op2; \
- UINT f_accs; \
- UINT f_op3; \
- unsigned int length;
-#define EXTRACT_IFMT_MVFACHI_A_CODE \
- length = 2; \
- f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \
- f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \
- f_op2 = EXTRACT_MSB0_UINT (insn, 16, 8, 4); \
- f_accs = EXTRACT_MSB0_UINT (insn, 16, 12, 2); \
- f_op3 = EXTRACT_MSB0_UINT (insn, 16, 14, 2); \
-
-#define EXTRACT_IFMT_MVFC_VARS \
- UINT f_op1; \
- UINT f_r1; \
- UINT f_op2; \
- UINT f_r2; \
- unsigned int length;
-#define EXTRACT_IFMT_MVFC_CODE \
- length = 2; \
- f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \
- f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \
- f_op2 = EXTRACT_MSB0_UINT (insn, 16, 8, 4); \
- f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \
-
-#define EXTRACT_IFMT_MVTACHI_A_VARS \
- UINT f_op1; \
- UINT f_r1; \
- UINT f_op2; \
- UINT f_accs; \
- UINT f_op3; \
- unsigned int length;
-#define EXTRACT_IFMT_MVTACHI_A_CODE \
- length = 2; \
- f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \
- f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \
- f_op2 = EXTRACT_MSB0_UINT (insn, 16, 8, 4); \
- f_accs = EXTRACT_MSB0_UINT (insn, 16, 12, 2); \
- f_op3 = EXTRACT_MSB0_UINT (insn, 16, 14, 2); \
-
-#define EXTRACT_IFMT_MVTC_VARS \
- UINT f_op1; \
- UINT f_r1; \
- UINT f_op2; \
- UINT f_r2; \
- unsigned int length;
-#define EXTRACT_IFMT_MVTC_CODE \
- length = 2; \
- f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \
- f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \
- f_op2 = EXTRACT_MSB0_UINT (insn, 16, 8, 4); \
- f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \
-
-#define EXTRACT_IFMT_NOP_VARS \
- UINT f_op1; \
- UINT f_r1; \
- UINT f_op2; \
- UINT f_r2; \
- unsigned int length;
-#define EXTRACT_IFMT_NOP_CODE \
- length = 2; \
- f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \
- f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \
- f_op2 = EXTRACT_MSB0_UINT (insn, 16, 8, 4); \
- f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \
-
-#define EXTRACT_IFMT_RAC_DSI_VARS \
- UINT f_op1; \
- UINT f_accd; \
- UINT f_bits67; \
- UINT f_op2; \
- UINT f_accs; \
- UINT f_bit14; \
- SI f_imm1; \
- unsigned int length;
-#define EXTRACT_IFMT_RAC_DSI_CODE \
- length = 2; \
- f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \
- f_accd = EXTRACT_MSB0_UINT (insn, 16, 4, 2); \
- f_bits67 = EXTRACT_MSB0_UINT (insn, 16, 6, 2); \
- f_op2 = EXTRACT_MSB0_UINT (insn, 16, 8, 4); \
- f_accs = EXTRACT_MSB0_UINT (insn, 16, 12, 2); \
- f_bit14 = EXTRACT_MSB0_UINT (insn, 16, 14, 1); \
- f_imm1 = ((EXTRACT_MSB0_UINT (insn, 16, 15, 1)) + (1)); \
-
-#define EXTRACT_IFMT_SETH_VARS \
- UINT f_op1; \
- UINT f_r1; \
- UINT f_op2; \
- UINT f_r2; \
- UINT f_hi16; \
- unsigned int length;
-#define EXTRACT_IFMT_SETH_CODE \
- length = 4; \
- f_op1 = EXTRACT_MSB0_UINT (insn, 32, 0, 4); \
- f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); \
- f_op2 = EXTRACT_MSB0_UINT (insn, 32, 8, 4); \
- f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); \
- f_hi16 = EXTRACT_MSB0_UINT (insn, 32, 16, 16); \
-
-#define EXTRACT_IFMT_SLLI_VARS \
- UINT f_op1; \
- UINT f_r1; \
- UINT f_shift_op2; \
- UINT f_uimm5; \
- unsigned int length;
-#define EXTRACT_IFMT_SLLI_CODE \
- length = 2; \
- f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \
- f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \
- f_shift_op2 = EXTRACT_MSB0_UINT (insn, 16, 8, 3); \
- f_uimm5 = EXTRACT_MSB0_UINT (insn, 16, 11, 5); \
-
-#define EXTRACT_IFMT_ST_D_VARS \
- UINT f_op1; \
- UINT f_r1; \
- UINT f_op2; \
- UINT f_r2; \
- INT f_simm16; \
- unsigned int length;
-#define EXTRACT_IFMT_ST_D_CODE \
- length = 4; \
- f_op1 = EXTRACT_MSB0_UINT (insn, 32, 0, 4); \
- f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); \
- f_op2 = EXTRACT_MSB0_UINT (insn, 32, 8, 4); \
- f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); \
- f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); \
-
-#define EXTRACT_IFMT_TRAP_VARS \
- UINT f_op1; \
- UINT f_r1; \
- UINT f_op2; \
- UINT f_uimm4; \
- unsigned int length;
-#define EXTRACT_IFMT_TRAP_CODE \
- length = 2; \
- f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \
- f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \
- f_op2 = EXTRACT_MSB0_UINT (insn, 16, 8, 4); \
- f_uimm4 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \
-
-#define EXTRACT_IFMT_SATB_VARS \
- UINT f_op1; \
- UINT f_r1; \
- UINT f_op2; \
- UINT f_r2; \
- UINT f_uimm16; \
- unsigned int length;
-#define EXTRACT_IFMT_SATB_CODE \
- length = 4; \
- f_op1 = EXTRACT_MSB0_UINT (insn, 32, 0, 4); \
- f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); \
- f_op2 = EXTRACT_MSB0_UINT (insn, 32, 8, 4); \
- f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); \
- f_uimm16 = EXTRACT_MSB0_UINT (insn, 32, 16, 16); \
-
-/* Queued output values of an instruction. */
-
-struct parexec {
- union {
- struct { /* empty sformat for unspecified field list */
- int empty;
- } sfmt_empty;
- struct { /* e.g. add $dr,$sr */
- SI dr;
- } sfmt_add;
- struct { /* e.g. add3 $dr,$sr,$hash$slo16 */
- SI dr;
- } sfmt_add3;
- struct { /* e.g. and3 $dr,$sr,$uimm16 */
- SI dr;
- } sfmt_and3;
- struct { /* e.g. or3 $dr,$sr,$hash$ulo16 */
- SI dr;
- } sfmt_or3;
- struct { /* e.g. addi $dr,$simm8 */
- SI dr;
- } sfmt_addi;
- struct { /* e.g. addv $dr,$sr */
- BI condbit;
- SI dr;
- } sfmt_addv;
- struct { /* e.g. addv3 $dr,$sr,$simm16 */
- BI condbit;
- SI dr;
- } sfmt_addv3;
- struct { /* e.g. addx $dr,$sr */
- BI condbit;
- SI dr;
- } sfmt_addx;
- struct { /* e.g. bc.s $disp8 */
- USI pc;
- } sfmt_bc8;
- struct { /* e.g. bc.l $disp24 */
- USI pc;
- } sfmt_bc24;
- struct { /* e.g. beq $src1,$src2,$disp16 */
- USI pc;
- } sfmt_beq;
- struct { /* e.g. beqz $src2,$disp16 */
- USI pc;
- } sfmt_beqz;
- struct { /* e.g. bl.s $disp8 */
- SI h_gr_14;
- USI pc;
- } sfmt_bl8;
- struct { /* e.g. bl.l $disp24 */
- SI h_gr_14;
- USI pc;
- } sfmt_bl24;
- struct { /* e.g. bcl.s $disp8 */
- SI h_gr_14;
- USI pc;
- } sfmt_bcl8;
- struct { /* e.g. bcl.l $disp24 */
- SI h_gr_14;
- USI pc;
- } sfmt_bcl24;
- struct { /* e.g. bra.s $disp8 */
- USI pc;
- } sfmt_bra8;
- struct { /* e.g. bra.l $disp24 */
- USI pc;
- } sfmt_bra24;
- struct { /* e.g. cmp $src1,$src2 */
- BI condbit;
- } sfmt_cmp;
- struct { /* e.g. cmpi $src2,$simm16 */
- BI condbit;
- } sfmt_cmpi;
- struct { /* e.g. cmpz $src2 */
- BI condbit;
- } sfmt_cmpz;
- struct { /* e.g. div $dr,$sr */
- SI dr;
- } sfmt_div;
- struct { /* e.g. jc $sr */
- USI pc;
- } sfmt_jc;
- struct { /* e.g. jl $sr */
- SI h_gr_14;
- USI pc;
- } sfmt_jl;
- struct { /* e.g. jmp $sr */
- USI pc;
- } sfmt_jmp;
- struct { /* e.g. ld $dr,@$sr */
- SI dr;
- } sfmt_ld;
- struct { /* e.g. ld $dr,@($slo16,$sr) */
- SI dr;
- } sfmt_ld_d;
- struct { /* e.g. ld $dr,@$sr+ */
- SI dr;
- SI sr;
- } sfmt_ld_plus;
- struct { /* e.g. ld24 $dr,$uimm24 */
- SI dr;
- } sfmt_ld24;
- struct { /* e.g. ldi8 $dr,$simm8 */
- SI dr;
- } sfmt_ldi8;
- struct { /* e.g. ldi16 $dr,$hash$slo16 */
- SI dr;
- } sfmt_ldi16;
- struct { /* e.g. lock $dr,@$sr */
- SI dr;
- BI h_lock;
- } sfmt_lock;
- struct { /* e.g. machi $src1,$src2,$acc */
- DI acc;
- } sfmt_machi_a;
- struct { /* e.g. mulhi $src1,$src2,$acc */
- DI acc;
- } sfmt_mulhi_a;
- struct { /* e.g. mv $dr,$sr */
- SI dr;
- } sfmt_mv;
- struct { /* e.g. mvfachi $dr,$accs */
- SI dr;
- } sfmt_mvfachi_a;
- struct { /* e.g. mvfc $dr,$scr */
- SI dr;
- } sfmt_mvfc;
- struct { /* e.g. mvtachi $src1,$accs */
- DI accs;
- } sfmt_mvtachi_a;
- struct { /* e.g. mvtc $sr,$dcr */
- USI dcr;
- } sfmt_mvtc;
- struct { /* e.g. nop */
- int empty;
- } sfmt_nop;
- struct { /* e.g. rac $accd,$accs,$imm1 */
- DI accd;
- } sfmt_rac_dsi;
- struct { /* e.g. rte */
- UQI h_bpsw;
- USI h_cr_6;
- UQI h_psw;
- USI pc;
- } sfmt_rte;
- struct { /* e.g. seth $dr,$hash$hi16 */
- SI dr;
- } sfmt_seth;
- struct { /* e.g. sll3 $dr,$sr,$simm16 */
- SI dr;
- } sfmt_sll3;
- struct { /* e.g. slli $dr,$uimm5 */
- SI dr;
- } sfmt_slli;
- struct { /* e.g. st $src1,@$src2 */
- SI h_memory_src2;
- USI h_memory_src2_idx;
- } sfmt_st;
- struct { /* e.g. st $src1,@($slo16,$src2) */
- SI h_memory_add__DFLT_src2_slo16;
- USI h_memory_add__DFLT_src2_slo16_idx;
- } sfmt_st_d;
- struct { /* e.g. stb $src1,@$src2 */
- QI h_memory_src2;
- USI h_memory_src2_idx;
- } sfmt_stb;
- struct { /* e.g. stb $src1,@($slo16,$src2) */
- QI h_memory_add__DFLT_src2_slo16;
- USI h_memory_add__DFLT_src2_slo16_idx;
- } sfmt_stb_d;
- struct { /* e.g. sth $src1,@$src2 */
- HI h_memory_src2;
- USI h_memory_src2_idx;
- } sfmt_sth;
- struct { /* e.g. sth $src1,@($slo16,$src2) */
- HI h_memory_add__DFLT_src2_slo16;
- USI h_memory_add__DFLT_src2_slo16_idx;
- } sfmt_sth_d;
- struct { /* e.g. st $src1,@+$src2 */
- SI h_memory_new_src2;
- USI h_memory_new_src2_idx;
- SI src2;
- } sfmt_st_plus;
- struct { /* e.g. trap $uimm4 */
- UQI h_bbpsw;
- UQI h_bpsw;
- USI h_cr_14;
- USI h_cr_6;
- UQI h_psw;
- SI pc;
- } sfmt_trap;
- struct { /* e.g. unlock $src1,@$src2 */
- BI h_lock;
- SI h_memory_src2;
- USI h_memory_src2_idx;
- } sfmt_unlock;
- struct { /* e.g. satb $dr,$sr */
- SI dr;
- } sfmt_satb;
- struct { /* e.g. sat $dr,$sr */
- SI dr;
- } sfmt_sat;
- struct { /* e.g. sadd */
- DI h_accums_0;
- } sfmt_sadd;
- struct { /* e.g. macwu1 $src1,$src2 */
- DI h_accums_1;
- } sfmt_macwu1;
- struct { /* e.g. msblo $src1,$src2 */
- DI accum;
- } sfmt_msblo;
- struct { /* e.g. mulwu1 $src1,$src2 */
- DI h_accums_1;
- } sfmt_mulwu1;
- struct { /* e.g. sc */
- int empty;
- } sfmt_sc;
- } operands;
- /* For conditionally written operands, bitmask of which ones were. */
- int written;
-};
-
-/* Collection of various things for the trace handler to use. */
-
-typedef struct trace_record {
- IADDR pc;
- /* FIXME:wip */
-} TRACE_RECORD;
-
-#endif /* CPU_M32RXF_H */
diff --git a/sim/m32r/decode.c b/sim/m32r/decode.c
deleted file mode 100644
index 52daa8b1e91..00000000000
--- a/sim/m32r/decode.c
+++ /dev/null
@@ -1,1779 +0,0 @@
-/* Simulator instruction decoder for m32rbf.
-
-THIS FILE IS MACHINE GENERATED WITH CGEN.
-
-Copyright (C) 1996, 1997, 1998, 1999, 2000 Free Software Foundation, Inc.
-
-This file is part of the GNU Simulators.
-
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License along
-with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
-*/
-
-#define WANT_CPU m32rbf
-#define WANT_CPU_M32RBF
-
-#include "sim-main.h"
-#include "sim-assert.h"
-
-/* The instruction descriptor array.
- This is computed at runtime. Space for it is not malloc'd to save a
- teensy bit of cpu in the decoder. Moving it to malloc space is trivial
- but won't be done until necessary (we don't currently support the runtime
- addition of instructions nor an SMP machine with different cpus). */
-static IDESC m32rbf_insn_data[M32RBF_INSN_MAX];
-
-/* Commas between elements are contained in the macros.
- Some of these are conditionally compiled out. */
-
-static const struct insn_sem m32rbf_insn_sem[] =
-{
- { VIRTUAL_INSN_X_INVALID, M32RBF_INSN_X_INVALID, M32RBF_SFMT_EMPTY },
- { VIRTUAL_INSN_X_AFTER, M32RBF_INSN_X_AFTER, M32RBF_SFMT_EMPTY },
- { VIRTUAL_INSN_X_BEFORE, M32RBF_INSN_X_BEFORE, M32RBF_SFMT_EMPTY },
- { VIRTUAL_INSN_X_CTI_CHAIN, M32RBF_INSN_X_CTI_CHAIN, M32RBF_SFMT_EMPTY },
- { VIRTUAL_INSN_X_CHAIN, M32RBF_INSN_X_CHAIN, M32RBF_SFMT_EMPTY },
- { VIRTUAL_INSN_X_BEGIN, M32RBF_INSN_X_BEGIN, M32RBF_SFMT_EMPTY },
- { M32R_INSN_ADD, M32RBF_INSN_ADD, M32RBF_SFMT_ADD },
- { M32R_INSN_ADD3, M32RBF_INSN_ADD3, M32RBF_SFMT_ADD3 },
- { M32R_INSN_AND, M32RBF_INSN_AND, M32RBF_SFMT_ADD },
- { M32R_INSN_AND3, M32RBF_INSN_AND3, M32RBF_SFMT_AND3 },
- { M32R_INSN_OR, M32RBF_INSN_OR, M32RBF_SFMT_ADD },
- { M32R_INSN_OR3, M32RBF_INSN_OR3, M32RBF_SFMT_OR3 },
- { M32R_INSN_XOR, M32RBF_INSN_XOR, M32RBF_SFMT_ADD },
- { M32R_INSN_XOR3, M32RBF_INSN_XOR3, M32RBF_SFMT_AND3 },
- { M32R_INSN_ADDI, M32RBF_INSN_ADDI, M32RBF_SFMT_ADDI },
- { M32R_INSN_ADDV, M32RBF_INSN_ADDV, M32RBF_SFMT_ADDV },
- { M32R_INSN_ADDV3, M32RBF_INSN_ADDV3, M32RBF_SFMT_ADDV3 },
- { M32R_INSN_ADDX, M32RBF_INSN_ADDX, M32RBF_SFMT_ADDX },
- { M32R_INSN_BC8, M32RBF_INSN_BC8, M32RBF_SFMT_BC8 },
- { M32R_INSN_BC24, M32RBF_INSN_BC24, M32RBF_SFMT_BC24 },
- { M32R_INSN_BEQ, M32RBF_INSN_BEQ, M32RBF_SFMT_BEQ },
- { M32R_INSN_BEQZ, M32RBF_INSN_BEQZ, M32RBF_SFMT_BEQZ },
- { M32R_INSN_BGEZ, M32RBF_INSN_BGEZ, M32RBF_SFMT_BEQZ },
- { M32R_INSN_BGTZ, M32RBF_INSN_BGTZ, M32RBF_SFMT_BEQZ },
- { M32R_INSN_BLEZ, M32RBF_INSN_BLEZ, M32RBF_SFMT_BEQZ },
- { M32R_INSN_BLTZ, M32RBF_INSN_BLTZ, M32RBF_SFMT_BEQZ },
- { M32R_INSN_BNEZ, M32RBF_INSN_BNEZ, M32RBF_SFMT_BEQZ },
- { M32R_INSN_BL8, M32RBF_INSN_BL8, M32RBF_SFMT_BL8 },
- { M32R_INSN_BL24, M32RBF_INSN_BL24, M32RBF_SFMT_BL24 },
- { M32R_INSN_BNC8, M32RBF_INSN_BNC8, M32RBF_SFMT_BC8 },
- { M32R_INSN_BNC24, M32RBF_INSN_BNC24, M32RBF_SFMT_BC24 },
- { M32R_INSN_BNE, M32RBF_INSN_BNE, M32RBF_SFMT_BEQ },
- { M32R_INSN_BRA8, M32RBF_INSN_BRA8, M32RBF_SFMT_BRA8 },
- { M32R_INSN_BRA24, M32RBF_INSN_BRA24, M32RBF_SFMT_BRA24 },
- { M32R_INSN_CMP, M32RBF_INSN_CMP, M32RBF_SFMT_CMP },
- { M32R_INSN_CMPI, M32RBF_INSN_CMPI, M32RBF_SFMT_CMPI },
- { M32R_INSN_CMPU, M32RBF_INSN_CMPU, M32RBF_SFMT_CMP },
- { M32R_INSN_CMPUI, M32RBF_INSN_CMPUI, M32RBF_SFMT_CMPI },
- { M32R_INSN_DIV, M32RBF_INSN_DIV, M32RBF_SFMT_DIV },
- { M32R_INSN_DIVU, M32RBF_INSN_DIVU, M32RBF_SFMT_DIV },
- { M32R_INSN_REM, M32RBF_INSN_REM, M32RBF_SFMT_DIV },
- { M32R_INSN_REMU, M32RBF_INSN_REMU, M32RBF_SFMT_DIV },
- { M32R_INSN_JL, M32RBF_INSN_JL, M32RBF_SFMT_JL },
- { M32R_INSN_JMP, M32RBF_INSN_JMP, M32RBF_SFMT_JMP },
- { M32R_INSN_LD, M32RBF_INSN_LD, M32RBF_SFMT_LD },
- { M32R_INSN_LD_D, M32RBF_INSN_LD_D, M32RBF_SFMT_LD_D },
- { M32R_INSN_LDB, M32RBF_INSN_LDB, M32RBF_SFMT_LD },
- { M32R_INSN_LDB_D, M32RBF_INSN_LDB_D, M32RBF_SFMT_LD_D },
- { M32R_INSN_LDH, M32RBF_INSN_LDH, M32RBF_SFMT_LD },
- { M32R_INSN_LDH_D, M32RBF_INSN_LDH_D, M32RBF_SFMT_LD_D },
- { M32R_INSN_LDUB, M32RBF_INSN_LDUB, M32RBF_SFMT_LD },
- { M32R_INSN_LDUB_D, M32RBF_INSN_LDUB_D, M32RBF_SFMT_LD_D },
- { M32R_INSN_LDUH, M32RBF_INSN_LDUH, M32RBF_SFMT_LD },
- { M32R_INSN_LDUH_D, M32RBF_INSN_LDUH_D, M32RBF_SFMT_LD_D },
- { M32R_INSN_LD_PLUS, M32RBF_INSN_LD_PLUS, M32RBF_SFMT_LD_PLUS },
- { M32R_INSN_LD24, M32RBF_INSN_LD24, M32RBF_SFMT_LD24 },
- { M32R_INSN_LDI8, M32RBF_INSN_LDI8, M32RBF_SFMT_LDI8 },
- { M32R_INSN_LDI16, M32RBF_INSN_LDI16, M32RBF_SFMT_LDI16 },
- { M32R_INSN_LOCK, M32RBF_INSN_LOCK, M32RBF_SFMT_LOCK },
- { M32R_INSN_MACHI, M32RBF_INSN_MACHI, M32RBF_SFMT_MACHI },
- { M32R_INSN_MACLO, M32RBF_INSN_MACLO, M32RBF_SFMT_MACHI },
- { M32R_INSN_MACWHI, M32RBF_INSN_MACWHI, M32RBF_SFMT_MACHI },
- { M32R_INSN_MACWLO, M32RBF_INSN_MACWLO, M32RBF_SFMT_MACHI },
- { M32R_INSN_MUL, M32RBF_INSN_MUL, M32RBF_SFMT_ADD },
- { M32R_INSN_MULHI, M32RBF_INSN_MULHI, M32RBF_SFMT_MULHI },
- { M32R_INSN_MULLO, M32RBF_INSN_MULLO, M32RBF_SFMT_MULHI },
- { M32R_INSN_MULWHI, M32RBF_INSN_MULWHI, M32RBF_SFMT_MULHI },
- { M32R_INSN_MULWLO, M32RBF_INSN_MULWLO, M32RBF_SFMT_MULHI },
- { M32R_INSN_MV, M32RBF_INSN_MV, M32RBF_SFMT_MV },
- { M32R_INSN_MVFACHI, M32RBF_INSN_MVFACHI, M32RBF_SFMT_MVFACHI },
- { M32R_INSN_MVFACLO, M32RBF_INSN_MVFACLO, M32RBF_SFMT_MVFACHI },
- { M32R_INSN_MVFACMI, M32RBF_INSN_MVFACMI, M32RBF_SFMT_MVFACHI },
- { M32R_INSN_MVFC, M32RBF_INSN_MVFC, M32RBF_SFMT_MVFC },
- { M32R_INSN_MVTACHI, M32RBF_INSN_MVTACHI, M32RBF_SFMT_MVTACHI },
- { M32R_INSN_MVTACLO, M32RBF_INSN_MVTACLO, M32RBF_SFMT_MVTACHI },
- { M32R_INSN_MVTC, M32RBF_INSN_MVTC, M32RBF_SFMT_MVTC },
- { M32R_INSN_NEG, M32RBF_INSN_NEG, M32RBF_SFMT_MV },
- { M32R_INSN_NOP, M32RBF_INSN_NOP, M32RBF_SFMT_NOP },
- { M32R_INSN_NOT, M32RBF_INSN_NOT, M32RBF_SFMT_MV },
- { M32R_INSN_RAC, M32RBF_INSN_RAC, M32RBF_SFMT_RAC },
- { M32R_INSN_RACH, M32RBF_INSN_RACH, M32RBF_SFMT_RAC },
- { M32R_INSN_RTE, M32RBF_INSN_RTE, M32RBF_SFMT_RTE },
- { M32R_INSN_SETH, M32RBF_INSN_SETH, M32RBF_SFMT_SETH },
- { M32R_INSN_SLL, M32RBF_INSN_SLL, M32RBF_SFMT_ADD },
- { M32R_INSN_SLL3, M32RBF_INSN_SLL3, M32RBF_SFMT_SLL3 },
- { M32R_INSN_SLLI, M32RBF_INSN_SLLI, M32RBF_SFMT_SLLI },
- { M32R_INSN_SRA, M32RBF_INSN_SRA, M32RBF_SFMT_ADD },
- { M32R_INSN_SRA3, M32RBF_INSN_SRA3, M32RBF_SFMT_SLL3 },
- { M32R_INSN_SRAI, M32RBF_INSN_SRAI, M32RBF_SFMT_SLLI },
- { M32R_INSN_SRL, M32RBF_INSN_SRL, M32RBF_SFMT_ADD },
- { M32R_INSN_SRL3, M32RBF_INSN_SRL3, M32RBF_SFMT_SLL3 },
- { M32R_INSN_SRLI, M32RBF_INSN_SRLI, M32RBF_SFMT_SLLI },
- { M32R_INSN_ST, M32RBF_INSN_ST, M32RBF_SFMT_ST },
- { M32R_INSN_ST_D, M32RBF_INSN_ST_D, M32RBF_SFMT_ST_D },
- { M32R_INSN_STB, M32RBF_INSN_STB, M32RBF_SFMT_STB },
- { M32R_INSN_STB_D, M32RBF_INSN_STB_D, M32RBF_SFMT_STB_D },
- { M32R_INSN_STH, M32RBF_INSN_STH, M32RBF_SFMT_STH },
- { M32R_INSN_STH_D, M32RBF_INSN_STH_D, M32RBF_SFMT_STH_D },
- { M32R_INSN_ST_PLUS, M32RBF_INSN_ST_PLUS, M32RBF_SFMT_ST_PLUS },
- { M32R_INSN_ST_MINUS, M32RBF_INSN_ST_MINUS, M32RBF_SFMT_ST_PLUS },
- { M32R_INSN_SUB, M32RBF_INSN_SUB, M32RBF_SFMT_ADD },
- { M32R_INSN_SUBV, M32RBF_INSN_SUBV, M32RBF_SFMT_ADDV },
- { M32R_INSN_SUBX, M32RBF_INSN_SUBX, M32RBF_SFMT_ADDX },
- { M32R_INSN_TRAP, M32RBF_INSN_TRAP, M32RBF_SFMT_TRAP },
- { M32R_INSN_UNLOCK, M32RBF_INSN_UNLOCK, M32RBF_SFMT_UNLOCK },
-};
-
-static const struct insn_sem m32rbf_insn_sem_invalid = {
- VIRTUAL_INSN_X_INVALID, M32RBF_INSN_X_INVALID, M32RBF_SFMT_EMPTY
-};
-
-/* Initialize an IDESC from the compile-time computable parts. */
-
-static INLINE void
-init_idesc (SIM_CPU *cpu, IDESC *id, const struct insn_sem *t)
-{
- const CGEN_INSN *insn_table = CGEN_CPU_INSN_TABLE (CPU_CPU_DESC (cpu))->init_entries;
-
- id->num = t->index;
- id->sfmt = t->sfmt;
- if ((int) t->type <= 0)
- id->idata = & cgen_virtual_insn_table[- (int) t->type];
- else
- id->idata = & insn_table[t->type];
- id->attrs = CGEN_INSN_ATTRS (id->idata);
- /* Oh my god, a magic number. */
- id->length = CGEN_INSN_BITSIZE (id->idata) / 8;
-
-#if WITH_PROFILE_MODEL_P
- id->timing = & MODEL_TIMING (CPU_MODEL (cpu)) [t->index];
- {
- SIM_DESC sd = CPU_STATE (cpu);
- SIM_ASSERT (t->index == id->timing->num);
- }
-#endif
-
- /* Semantic pointers are initialized elsewhere. */
-}
-
-/* Initialize the instruction descriptor table. */
-
-void
-m32rbf_init_idesc_table (SIM_CPU *cpu)
-{
- IDESC *id,*tabend;
- const struct insn_sem *t,*tend;
- int tabsize = M32RBF_INSN_MAX;
- IDESC *table = m32rbf_insn_data;
-
- memset (table, 0, tabsize * sizeof (IDESC));
-
- /* First set all entries to the `invalid insn'. */
- t = & m32rbf_insn_sem_invalid;
- for (id = table, tabend = table + tabsize; id < tabend; ++id)
- init_idesc (cpu, id, t);
-
- /* Now fill in the values for the chosen cpu. */
- for (t = m32rbf_insn_sem, tend = t + sizeof (m32rbf_insn_sem) / sizeof (*t);
- t != tend; ++t)
- {
- init_idesc (cpu, & table[t->index], t);
- }
-
- /* Link the IDESC table into the cpu. */
- CPU_IDESC (cpu) = table;
-}
-
-/* Given an instruction, return a pointer to its IDESC entry. */
-
-const IDESC *
-m32rbf_decode (SIM_CPU *current_cpu, IADDR pc,
- CGEN_INSN_INT base_insn, CGEN_INSN_INT entire_insn,
- ARGBUF *abuf)
-{
- /* Result of decoder. */
- M32RBF_INSN_TYPE itype;
-
- {
- CGEN_INSN_INT insn = base_insn;
-
- {
- unsigned int val = (((insn >> 8) & (15 << 4)) | ((insn >> 4) & (15 << 0)));
- switch (val)
- {
- case 0 : itype = M32RBF_INSN_SUBV; goto extract_sfmt_addv; case 1 : itype = M32RBF_INSN_SUBX; goto extract_sfmt_addx; case 2 : itype = M32RBF_INSN_SUB; goto extract_sfmt_add; case 3 : itype = M32RBF_INSN_NEG; goto extract_sfmt_mv; case 4 : itype = M32RBF_INSN_CMP; goto extract_sfmt_cmp; case 5 : itype = M32RBF_INSN_CMPU; goto extract_sfmt_cmp; case 8 : itype = M32RBF_INSN_ADDV; goto extract_sfmt_addv; case 9 : itype = M32RBF_INSN_ADDX; goto extract_sfmt_addx; case 10 : itype = M32RBF_INSN_ADD; goto extract_sfmt_add; case 11 : itype = M32RBF_INSN_NOT; goto extract_sfmt_mv; case 12 : itype = M32RBF_INSN_AND; goto extract_sfmt_add; case 13 : itype = M32RBF_INSN_XOR; goto extract_sfmt_add; case 14 : itype = M32RBF_INSN_OR; goto extract_sfmt_add; case 16 : itype = M32RBF_INSN_SRL; goto extract_sfmt_add; case 18 : itype = M32RBF_INSN_SRA; goto extract_sfmt_add; case 20 : itype = M32RBF_INSN_SLL; goto extract_sfmt_add; case 22 : itype = M32RBF_INSN_MUL; goto extract_sfmt_add; case 24 : itype = M32RBF_INSN_MV; goto extract_sfmt_mv; case 25 : itype = M32RBF_INSN_MVFC; goto extract_sfmt_mvfc; case 26 : itype = M32RBF_INSN_MVTC; goto extract_sfmt_mvtc; case 28 :
- {
- unsigned int val = (((insn >> 8) & (1 << 0)));
- switch (val)
- {
- case 0 : itype = M32RBF_INSN_JL; goto extract_sfmt_jl; case 1 : itype = M32RBF_INSN_JMP; goto extract_sfmt_jmp; default : itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty;
- }
- }
- case 29 : itype = M32RBF_INSN_RTE; goto extract_sfmt_rte; case 31 : itype = M32RBF_INSN_TRAP; goto extract_sfmt_trap; case 32 : itype = M32RBF_INSN_STB; goto extract_sfmt_stb; case 34 : itype = M32RBF_INSN_STH; goto extract_sfmt_sth; case 36 : itype = M32RBF_INSN_ST; goto extract_sfmt_st; case 37 : itype = M32RBF_INSN_UNLOCK; goto extract_sfmt_unlock; case 38 : itype = M32RBF_INSN_ST_PLUS; goto extract_sfmt_st_plus; case 39 : itype = M32RBF_INSN_ST_MINUS; goto extract_sfmt_st_plus; case 40 : itype = M32RBF_INSN_LDB; goto extract_sfmt_ld; case 41 : itype = M32RBF_INSN_LDUB; goto extract_sfmt_ld; case 42 : itype = M32RBF_INSN_LDH; goto extract_sfmt_ld; case 43 : itype = M32RBF_INSN_LDUH; goto extract_sfmt_ld; case 44 : itype = M32RBF_INSN_LD; goto extract_sfmt_ld; case 45 : itype = M32RBF_INSN_LOCK; goto extract_sfmt_lock; case 46 : itype = M32RBF_INSN_LD_PLUS; goto extract_sfmt_ld_plus; case 48 : itype = M32RBF_INSN_MULHI; goto extract_sfmt_mulhi; case 49 : itype = M32RBF_INSN_MULLO; goto extract_sfmt_mulhi; case 50 : itype = M32RBF_INSN_MULWHI; goto extract_sfmt_mulhi; case 51 : itype = M32RBF_INSN_MULWLO; goto extract_sfmt_mulhi; case 52 : itype = M32RBF_INSN_MACHI; goto extract_sfmt_machi; case 53 : itype = M32RBF_INSN_MACLO; goto extract_sfmt_machi; case 54 : itype = M32RBF_INSN_MACWHI; goto extract_sfmt_machi; case 55 : itype = M32RBF_INSN_MACWLO; goto extract_sfmt_machi; case 64 : /* fall through */
- case 65 : /* fall through */
- case 66 : /* fall through */
- case 67 : /* fall through */
- case 68 : /* fall through */
- case 69 : /* fall through */
- case 70 : /* fall through */
- case 71 : /* fall through */
- case 72 : /* fall through */
- case 73 : /* fall through */
- case 74 : /* fall through */
- case 75 : /* fall through */
- case 76 : /* fall through */
- case 77 : /* fall through */
- case 78 : /* fall through */
- case 79 : itype = M32RBF_INSN_ADDI; goto extract_sfmt_addi; case 80 : /* fall through */
- case 81 : itype = M32RBF_INSN_SRLI; goto extract_sfmt_slli; case 82 : /* fall through */
- case 83 : itype = M32RBF_INSN_SRAI; goto extract_sfmt_slli; case 84 : /* fall through */
- case 85 : itype = M32RBF_INSN_SLLI; goto extract_sfmt_slli; case 87 :
- {
- unsigned int val = (((insn >> 0) & (1 << 0)));
- switch (val)
- {
- case 0 : itype = M32RBF_INSN_MVTACHI; goto extract_sfmt_mvtachi; case 1 : itype = M32RBF_INSN_MVTACLO; goto extract_sfmt_mvtachi; default : itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty;
- }
- }
- case 88 : itype = M32RBF_INSN_RACH; goto extract_sfmt_rac; case 89 : itype = M32RBF_INSN_RAC; goto extract_sfmt_rac; case 95 :
- {
- unsigned int val = (((insn >> 0) & (3 << 0)));
- switch (val)
- {
- case 0 : itype = M32RBF_INSN_MVFACHI; goto extract_sfmt_mvfachi; case 1 : itype = M32RBF_INSN_MVFACLO; goto extract_sfmt_mvfachi; case 2 : itype = M32RBF_INSN_MVFACMI; goto extract_sfmt_mvfachi; default : itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty;
- }
- }
- case 96 : /* fall through */
- case 97 : /* fall through */
- case 98 : /* fall through */
- case 99 : /* fall through */
- case 100 : /* fall through */
- case 101 : /* fall through */
- case 102 : /* fall through */
- case 103 : /* fall through */
- case 104 : /* fall through */
- case 105 : /* fall through */
- case 106 : /* fall through */
- case 107 : /* fall through */
- case 108 : /* fall through */
- case 109 : /* fall through */
- case 110 : /* fall through */
- case 111 : itype = M32RBF_INSN_LDI8; goto extract_sfmt_ldi8; case 112 :
- {
- unsigned int val = (((insn >> 8) & (15 << 0)));
- switch (val)
- {
- case 0 : itype = M32RBF_INSN_NOP; goto extract_sfmt_nop; case 12 : itype = M32RBF_INSN_BC8; goto extract_sfmt_bc8; case 13 : itype = M32RBF_INSN_BNC8; goto extract_sfmt_bc8; case 14 : itype = M32RBF_INSN_BL8; goto extract_sfmt_bl8; case 15 : itype = M32RBF_INSN_BRA8; goto extract_sfmt_bra8; default : itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty;
- }
- }
- case 113 : /* fall through */
- case 114 : /* fall through */
- case 115 : /* fall through */
- case 116 : /* fall through */
- case 117 : /* fall through */
- case 118 : /* fall through */
- case 119 : /* fall through */
- case 120 : /* fall through */
- case 121 : /* fall through */
- case 122 : /* fall through */
- case 123 : /* fall through */
- case 124 : /* fall through */
- case 125 : /* fall through */
- case 126 : /* fall through */
- case 127 :
- {
- unsigned int val = (((insn >> 8) & (3 << 0)));
- switch (val)
- {
- case 0 : itype = M32RBF_INSN_BC8; goto extract_sfmt_bc8; case 1 : itype = M32RBF_INSN_BNC8; goto extract_sfmt_bc8; case 2 : itype = M32RBF_INSN_BL8; goto extract_sfmt_bl8; case 3 : itype = M32RBF_INSN_BRA8; goto extract_sfmt_bra8; default : itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty;
- }
- }
- case 132 : itype = M32RBF_INSN_CMPI; goto extract_sfmt_cmpi; case 133 : itype = M32RBF_INSN_CMPUI; goto extract_sfmt_cmpi; case 136 : itype = M32RBF_INSN_ADDV3; goto extract_sfmt_addv3; case 138 : itype = M32RBF_INSN_ADD3; goto extract_sfmt_add3; case 140 : itype = M32RBF_INSN_AND3; goto extract_sfmt_and3; case 141 : itype = M32RBF_INSN_XOR3; goto extract_sfmt_and3; case 142 : itype = M32RBF_INSN_OR3; goto extract_sfmt_or3; case 144 : itype = M32RBF_INSN_DIV; goto extract_sfmt_div; case 145 : itype = M32RBF_INSN_DIVU; goto extract_sfmt_div; case 146 : itype = M32RBF_INSN_REM; goto extract_sfmt_div; case 147 : itype = M32RBF_INSN_REMU; goto extract_sfmt_div; case 152 : itype = M32RBF_INSN_SRL3; goto extract_sfmt_sll3; case 154 : itype = M32RBF_INSN_SRA3; goto extract_sfmt_sll3; case 156 : itype = M32RBF_INSN_SLL3; goto extract_sfmt_sll3; case 159 : itype = M32RBF_INSN_LDI16; goto extract_sfmt_ldi16; case 160 : itype = M32RBF_INSN_STB_D; goto extract_sfmt_stb_d; case 162 : itype = M32RBF_INSN_STH_D; goto extract_sfmt_sth_d; case 164 : itype = M32RBF_INSN_ST_D; goto extract_sfmt_st_d; case 168 : itype = M32RBF_INSN_LDB_D; goto extract_sfmt_ld_d; case 169 : itype = M32RBF_INSN_LDUB_D; goto extract_sfmt_ld_d; case 170 : itype = M32RBF_INSN_LDH_D; goto extract_sfmt_ld_d; case 171 : itype = M32RBF_INSN_LDUH_D; goto extract_sfmt_ld_d; case 172 : itype = M32RBF_INSN_LD_D; goto extract_sfmt_ld_d; case 176 : itype = M32RBF_INSN_BEQ; goto extract_sfmt_beq; case 177 : itype = M32RBF_INSN_BNE; goto extract_sfmt_beq; case 184 : itype = M32RBF_INSN_BEQZ; goto extract_sfmt_beqz; case 185 : itype = M32RBF_INSN_BNEZ; goto extract_sfmt_beqz; case 186 : itype = M32RBF_INSN_BLTZ; goto extract_sfmt_beqz; case 187 : itype = M32RBF_INSN_BGEZ; goto extract_sfmt_beqz; case 188 : itype = M32RBF_INSN_BLEZ; goto extract_sfmt_beqz; case 189 : itype = M32RBF_INSN_BGTZ; goto extract_sfmt_beqz; case 220 : itype = M32RBF_INSN_SETH; goto extract_sfmt_seth; case 224 : /* fall through */
- case 225 : /* fall through */
- case 226 : /* fall through */
- case 227 : /* fall through */
- case 228 : /* fall through */
- case 229 : /* fall through */
- case 230 : /* fall through */
- case 231 : /* fall through */
- case 232 : /* fall through */
- case 233 : /* fall through */
- case 234 : /* fall through */
- case 235 : /* fall through */
- case 236 : /* fall through */
- case 237 : /* fall through */
- case 238 : /* fall through */
- case 239 : itype = M32RBF_INSN_LD24; goto extract_sfmt_ld24; case 240 : /* fall through */
- case 241 : /* fall through */
- case 242 : /* fall through */
- case 243 : /* fall through */
- case 244 : /* fall through */
- case 245 : /* fall through */
- case 246 : /* fall through */
- case 247 : /* fall through */
- case 248 : /* fall through */
- case 249 : /* fall through */
- case 250 : /* fall through */
- case 251 : /* fall through */
- case 252 : /* fall through */
- case 253 : /* fall through */
- case 254 : /* fall through */
- case 255 :
- {
- unsigned int val = (((insn >> 8) & (3 << 0)));
- switch (val)
- {
- case 0 : itype = M32RBF_INSN_BC24; goto extract_sfmt_bc24; case 1 : itype = M32RBF_INSN_BNC24; goto extract_sfmt_bc24; case 2 : itype = M32RBF_INSN_BL24; goto extract_sfmt_bl24; case 3 : itype = M32RBF_INSN_BRA24; goto extract_sfmt_bra24; default : itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty;
- }
- }
- default : itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty;
- }
- }
- }
-
- /* The instruction has been decoded, now extract the fields. */
-
- extract_sfmt_empty:
- {
- const IDESC *idesc = &m32rbf_insn_data[itype];
-#define FLD(f) abuf->fields.fmt_empty.f
-
-
- /* Record the fields for the semantic handler. */
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_empty", (char *) 0));
-
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_add:
- {
- const IDESC *idesc = &m32rbf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
-#define FLD(f) abuf->fields.sfmt_add.f
- UINT f_r1;
- UINT f_r2;
-
- f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4);
- f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_r1) = f_r1;
- FLD (f_r2) = f_r2;
- FLD (i_dr) = & CPU (h_gr)[f_r1];
- FLD (i_sr) = & CPU (h_gr)[f_r2];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_add", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_dr) = f_r1;
- FLD (in_sr) = f_r2;
- FLD (out_dr) = f_r1;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_add3:
- {
- const IDESC *idesc = &m32rbf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
-#define FLD(f) abuf->fields.sfmt_add3.f
- UINT f_r1;
- UINT f_r2;
- INT f_simm16;
-
- f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4);
- f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4);
- f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16);
-
- /* Record the fields for the semantic handler. */
- FLD (f_simm16) = f_simm16;
- FLD (f_r2) = f_r2;
- FLD (f_r1) = f_r1;
- FLD (i_sr) = & CPU (h_gr)[f_r2];
- FLD (i_dr) = & CPU (h_gr)[f_r1];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_add3", "f_simm16 0x%x", 'x', f_simm16, "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_sr) = f_r2;
- FLD (out_dr) = f_r1;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_and3:
- {
- const IDESC *idesc = &m32rbf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
-#define FLD(f) abuf->fields.sfmt_and3.f
- UINT f_r1;
- UINT f_r2;
- UINT f_uimm16;
-
- f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4);
- f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4);
- f_uimm16 = EXTRACT_MSB0_UINT (insn, 32, 16, 16);
-
- /* Record the fields for the semantic handler. */
- FLD (f_r2) = f_r2;
- FLD (f_uimm16) = f_uimm16;
- FLD (f_r1) = f_r1;
- FLD (i_sr) = & CPU (h_gr)[f_r2];
- FLD (i_dr) = & CPU (h_gr)[f_r1];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_and3", "f_r2 0x%x", 'x', f_r2, "f_uimm16 0x%x", 'x', f_uimm16, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_sr) = f_r2;
- FLD (out_dr) = f_r1;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_or3:
- {
- const IDESC *idesc = &m32rbf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
-#define FLD(f) abuf->fields.sfmt_and3.f
- UINT f_r1;
- UINT f_r2;
- UINT f_uimm16;
-
- f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4);
- f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4);
- f_uimm16 = EXTRACT_MSB0_UINT (insn, 32, 16, 16);
-
- /* Record the fields for the semantic handler. */
- FLD (f_r2) = f_r2;
- FLD (f_uimm16) = f_uimm16;
- FLD (f_r1) = f_r1;
- FLD (i_sr) = & CPU (h_gr)[f_r2];
- FLD (i_dr) = & CPU (h_gr)[f_r1];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_or3", "f_r2 0x%x", 'x', f_r2, "f_uimm16 0x%x", 'x', f_uimm16, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_sr) = f_r2;
- FLD (out_dr) = f_r1;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_addi:
- {
- const IDESC *idesc = &m32rbf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
-#define FLD(f) abuf->fields.sfmt_addi.f
- UINT f_r1;
- INT f_simm8;
-
- f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4);
- f_simm8 = EXTRACT_MSB0_INT (insn, 16, 8, 8);
-
- /* Record the fields for the semantic handler. */
- FLD (f_r1) = f_r1;
- FLD (f_simm8) = f_simm8;
- FLD (i_dr) = & CPU (h_gr)[f_r1];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_addi", "f_r1 0x%x", 'x', f_r1, "f_simm8 0x%x", 'x', f_simm8, "dr 0x%x", 'x', f_r1, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_dr) = f_r1;
- FLD (out_dr) = f_r1;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_addv:
- {
- const IDESC *idesc = &m32rbf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
-#define FLD(f) abuf->fields.sfmt_add.f
- UINT f_r1;
- UINT f_r2;
-
- f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4);
- f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_r1) = f_r1;
- FLD (f_r2) = f_r2;
- FLD (i_dr) = & CPU (h_gr)[f_r1];
- FLD (i_sr) = & CPU (h_gr)[f_r2];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_addv", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_dr) = f_r1;
- FLD (in_sr) = f_r2;
- FLD (out_dr) = f_r1;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_addv3:
- {
- const IDESC *idesc = &m32rbf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
-#define FLD(f) abuf->fields.sfmt_add3.f
- UINT f_r1;
- UINT f_r2;
- INT f_simm16;
-
- f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4);
- f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4);
- f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16);
-
- /* Record the fields for the semantic handler. */
- FLD (f_simm16) = f_simm16;
- FLD (f_r2) = f_r2;
- FLD (f_r1) = f_r1;
- FLD (i_sr) = & CPU (h_gr)[f_r2];
- FLD (i_dr) = & CPU (h_gr)[f_r1];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_addv3", "f_simm16 0x%x", 'x', f_simm16, "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_sr) = f_r2;
- FLD (out_dr) = f_r1;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_addx:
- {
- const IDESC *idesc = &m32rbf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
-#define FLD(f) abuf->fields.sfmt_add.f
- UINT f_r1;
- UINT f_r2;
-
- f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4);
- f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_r1) = f_r1;
- FLD (f_r2) = f_r2;
- FLD (i_dr) = & CPU (h_gr)[f_r1];
- FLD (i_sr) = & CPU (h_gr)[f_r2];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_addx", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_dr) = f_r1;
- FLD (in_sr) = f_r2;
- FLD (out_dr) = f_r1;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_bc8:
- {
- const IDESC *idesc = &m32rbf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
-#define FLD(f) abuf->fields.sfmt_bl8.f
- SI f_disp8;
-
- f_disp8 = ((((EXTRACT_MSB0_INT (insn, 16, 8, 8)) << (2))) + (((pc) & (-4))));
-
- /* Record the fields for the semantic handler. */
- FLD (i_disp8) = f_disp8;
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bc8", "disp8 0x%x", 'x', f_disp8, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_bc24:
- {
- const IDESC *idesc = &m32rbf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
-#define FLD(f) abuf->fields.sfmt_bl24.f
- SI f_disp24;
-
- f_disp24 = ((((EXTRACT_MSB0_INT (insn, 32, 8, 24)) << (2))) + (pc));
-
- /* Record the fields for the semantic handler. */
- FLD (i_disp24) = f_disp24;
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bc24", "disp24 0x%x", 'x', f_disp24, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_beq:
- {
- const IDESC *idesc = &m32rbf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
-#define FLD(f) abuf->fields.sfmt_beq.f
- UINT f_r1;
- UINT f_r2;
- SI f_disp16;
-
- f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4);
- f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4);
- f_disp16 = ((((EXTRACT_MSB0_INT (insn, 32, 16, 16)) << (2))) + (pc));
-
- /* Record the fields for the semantic handler. */
- FLD (f_r1) = f_r1;
- FLD (f_r2) = f_r2;
- FLD (i_disp16) = f_disp16;
- FLD (i_src1) = & CPU (h_gr)[f_r1];
- FLD (i_src2) = & CPU (h_gr)[f_r2];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_beq", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "disp16 0x%x", 'x', f_disp16, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_src1) = f_r1;
- FLD (in_src2) = f_r2;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_beqz:
- {
- const IDESC *idesc = &m32rbf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
-#define FLD(f) abuf->fields.sfmt_beq.f
- UINT f_r2;
- SI f_disp16;
-
- f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4);
- f_disp16 = ((((EXTRACT_MSB0_INT (insn, 32, 16, 16)) << (2))) + (pc));
-
- /* Record the fields for the semantic handler. */
- FLD (f_r2) = f_r2;
- FLD (i_disp16) = f_disp16;
- FLD (i_src2) = & CPU (h_gr)[f_r2];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_beqz", "f_r2 0x%x", 'x', f_r2, "disp16 0x%x", 'x', f_disp16, "src2 0x%x", 'x', f_r2, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_src2) = f_r2;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_bl8:
- {
- const IDESC *idesc = &m32rbf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
-#define FLD(f) abuf->fields.sfmt_bl8.f
- SI f_disp8;
-
- f_disp8 = ((((EXTRACT_MSB0_INT (insn, 16, 8, 8)) << (2))) + (((pc) & (-4))));
-
- /* Record the fields for the semantic handler. */
- FLD (i_disp8) = f_disp8;
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bl8", "disp8 0x%x", 'x', f_disp8, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (out_h_gr_14) = 14;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_bl24:
- {
- const IDESC *idesc = &m32rbf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
-#define FLD(f) abuf->fields.sfmt_bl24.f
- SI f_disp24;
-
- f_disp24 = ((((EXTRACT_MSB0_INT (insn, 32, 8, 24)) << (2))) + (pc));
-
- /* Record the fields for the semantic handler. */
- FLD (i_disp24) = f_disp24;
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bl24", "disp24 0x%x", 'x', f_disp24, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (out_h_gr_14) = 14;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_bra8:
- {
- const IDESC *idesc = &m32rbf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
-#define FLD(f) abuf->fields.sfmt_bl8.f
- SI f_disp8;
-
- f_disp8 = ((((EXTRACT_MSB0_INT (insn, 16, 8, 8)) << (2))) + (((pc) & (-4))));
-
- /* Record the fields for the semantic handler. */
- FLD (i_disp8) = f_disp8;
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bra8", "disp8 0x%x", 'x', f_disp8, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_bra24:
- {
- const IDESC *idesc = &m32rbf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
-#define FLD(f) abuf->fields.sfmt_bl24.f
- SI f_disp24;
-
- f_disp24 = ((((EXTRACT_MSB0_INT (insn, 32, 8, 24)) << (2))) + (pc));
-
- /* Record the fields for the semantic handler. */
- FLD (i_disp24) = f_disp24;
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bra24", "disp24 0x%x", 'x', f_disp24, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_cmp:
- {
- const IDESC *idesc = &m32rbf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
-#define FLD(f) abuf->fields.sfmt_st_plus.f
- UINT f_r1;
- UINT f_r2;
-
- f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4);
- f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_r1) = f_r1;
- FLD (f_r2) = f_r2;
- FLD (i_src1) = & CPU (h_gr)[f_r1];
- FLD (i_src2) = & CPU (h_gr)[f_r2];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_cmp", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_src1) = f_r1;
- FLD (in_src2) = f_r2;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_cmpi:
- {
- const IDESC *idesc = &m32rbf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
-#define FLD(f) abuf->fields.sfmt_st_d.f
- UINT f_r2;
- INT f_simm16;
-
- f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4);
- f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16);
-
- /* Record the fields for the semantic handler. */
- FLD (f_simm16) = f_simm16;
- FLD (f_r2) = f_r2;
- FLD (i_src2) = & CPU (h_gr)[f_r2];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_cmpi", "f_simm16 0x%x", 'x', f_simm16, "f_r2 0x%x", 'x', f_r2, "src2 0x%x", 'x', f_r2, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_src2) = f_r2;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_div:
- {
- const IDESC *idesc = &m32rbf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
-#define FLD(f) abuf->fields.sfmt_add.f
- UINT f_r1;
- UINT f_r2;
-
- f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4);
- f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_r1) = f_r1;
- FLD (f_r2) = f_r2;
- FLD (i_dr) = & CPU (h_gr)[f_r1];
- FLD (i_sr) = & CPU (h_gr)[f_r2];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_div", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_dr) = f_r1;
- FLD (in_sr) = f_r2;
- FLD (out_dr) = f_r1;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_jl:
- {
- const IDESC *idesc = &m32rbf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
-#define FLD(f) abuf->fields.sfmt_jl.f
- UINT f_r2;
-
- f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_r2) = f_r2;
- FLD (i_sr) = & CPU (h_gr)[f_r2];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_jl", "f_r2 0x%x", 'x', f_r2, "sr 0x%x", 'x', f_r2, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_sr) = f_r2;
- FLD (out_h_gr_14) = 14;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_jmp:
- {
- const IDESC *idesc = &m32rbf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
-#define FLD(f) abuf->fields.sfmt_jl.f
- UINT f_r2;
-
- f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_r2) = f_r2;
- FLD (i_sr) = & CPU (h_gr)[f_r2];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_jmp", "f_r2 0x%x", 'x', f_r2, "sr 0x%x", 'x', f_r2, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_sr) = f_r2;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_ld:
- {
- const IDESC *idesc = &m32rbf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
-#define FLD(f) abuf->fields.sfmt_ld_plus.f
- UINT f_r1;
- UINT f_r2;
-
- f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4);
- f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_r2) = f_r2;
- FLD (f_r1) = f_r1;
- FLD (i_sr) = & CPU (h_gr)[f_r2];
- FLD (i_dr) = & CPU (h_gr)[f_r1];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ld", "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_sr) = f_r2;
- FLD (out_dr) = f_r1;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_ld_d:
- {
- const IDESC *idesc = &m32rbf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
-#define FLD(f) abuf->fields.sfmt_add3.f
- UINT f_r1;
- UINT f_r2;
- INT f_simm16;
-
- f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4);
- f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4);
- f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16);
-
- /* Record the fields for the semantic handler. */
- FLD (f_simm16) = f_simm16;
- FLD (f_r2) = f_r2;
- FLD (f_r1) = f_r1;
- FLD (i_sr) = & CPU (h_gr)[f_r2];
- FLD (i_dr) = & CPU (h_gr)[f_r1];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ld_d", "f_simm16 0x%x", 'x', f_simm16, "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_sr) = f_r2;
- FLD (out_dr) = f_r1;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_ld_plus:
- {
- const IDESC *idesc = &m32rbf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
-#define FLD(f) abuf->fields.sfmt_ld_plus.f
- UINT f_r1;
- UINT f_r2;
-
- f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4);
- f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_r2) = f_r2;
- FLD (f_r1) = f_r1;
- FLD (i_sr) = & CPU (h_gr)[f_r2];
- FLD (i_dr) = & CPU (h_gr)[f_r1];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ld_plus", "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_sr) = f_r2;
- FLD (out_dr) = f_r1;
- FLD (out_sr) = f_r2;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_ld24:
- {
- const IDESC *idesc = &m32rbf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
-#define FLD(f) abuf->fields.sfmt_ld24.f
- UINT f_r1;
- UINT f_uimm24;
-
- f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4);
- f_uimm24 = EXTRACT_MSB0_UINT (insn, 32, 8, 24);
-
- /* Record the fields for the semantic handler. */
- FLD (f_r1) = f_r1;
- FLD (i_uimm24) = f_uimm24;
- FLD (i_dr) = & CPU (h_gr)[f_r1];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ld24", "f_r1 0x%x", 'x', f_r1, "uimm24 0x%x", 'x', f_uimm24, "dr 0x%x", 'x', f_r1, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (out_dr) = f_r1;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_ldi8:
- {
- const IDESC *idesc = &m32rbf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
-#define FLD(f) abuf->fields.sfmt_addi.f
- UINT f_r1;
- INT f_simm8;
-
- f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4);
- f_simm8 = EXTRACT_MSB0_INT (insn, 16, 8, 8);
-
- /* Record the fields for the semantic handler. */
- FLD (f_simm8) = f_simm8;
- FLD (f_r1) = f_r1;
- FLD (i_dr) = & CPU (h_gr)[f_r1];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldi8", "f_simm8 0x%x", 'x', f_simm8, "f_r1 0x%x", 'x', f_r1, "dr 0x%x", 'x', f_r1, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (out_dr) = f_r1;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_ldi16:
- {
- const IDESC *idesc = &m32rbf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
-#define FLD(f) abuf->fields.sfmt_add3.f
- UINT f_r1;
- INT f_simm16;
-
- f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4);
- f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16);
-
- /* Record the fields for the semantic handler. */
- FLD (f_simm16) = f_simm16;
- FLD (f_r1) = f_r1;
- FLD (i_dr) = & CPU (h_gr)[f_r1];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldi16", "f_simm16 0x%x", 'x', f_simm16, "f_r1 0x%x", 'x', f_r1, "dr 0x%x", 'x', f_r1, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (out_dr) = f_r1;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_lock:
- {
- const IDESC *idesc = &m32rbf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
-#define FLD(f) abuf->fields.sfmt_ld_plus.f
- UINT f_r1;
- UINT f_r2;
-
- f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4);
- f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_r2) = f_r2;
- FLD (f_r1) = f_r1;
- FLD (i_sr) = & CPU (h_gr)[f_r2];
- FLD (i_dr) = & CPU (h_gr)[f_r1];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_lock", "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_sr) = f_r2;
- FLD (out_dr) = f_r1;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_machi:
- {
- const IDESC *idesc = &m32rbf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
-#define FLD(f) abuf->fields.sfmt_st_plus.f
- UINT f_r1;
- UINT f_r2;
-
- f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4);
- f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_r1) = f_r1;
- FLD (f_r2) = f_r2;
- FLD (i_src1) = & CPU (h_gr)[f_r1];
- FLD (i_src2) = & CPU (h_gr)[f_r2];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_machi", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_src1) = f_r1;
- FLD (in_src2) = f_r2;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_mulhi:
- {
- const IDESC *idesc = &m32rbf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
-#define FLD(f) abuf->fields.sfmt_st_plus.f
- UINT f_r1;
- UINT f_r2;
-
- f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4);
- f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_r1) = f_r1;
- FLD (f_r2) = f_r2;
- FLD (i_src1) = & CPU (h_gr)[f_r1];
- FLD (i_src2) = & CPU (h_gr)[f_r2];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mulhi", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_src1) = f_r1;
- FLD (in_src2) = f_r2;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_mv:
- {
- const IDESC *idesc = &m32rbf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
-#define FLD(f) abuf->fields.sfmt_ld_plus.f
- UINT f_r1;
- UINT f_r2;
-
- f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4);
- f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_r2) = f_r2;
- FLD (f_r1) = f_r1;
- FLD (i_sr) = & CPU (h_gr)[f_r2];
- FLD (i_dr) = & CPU (h_gr)[f_r1];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mv", "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_sr) = f_r2;
- FLD (out_dr) = f_r1;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_mvfachi:
- {
- const IDESC *idesc = &m32rbf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
-#define FLD(f) abuf->fields.sfmt_seth.f
- UINT f_r1;
-
- f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_r1) = f_r1;
- FLD (i_dr) = & CPU (h_gr)[f_r1];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mvfachi", "f_r1 0x%x", 'x', f_r1, "dr 0x%x", 'x', f_r1, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (out_dr) = f_r1;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_mvfc:
- {
- const IDESC *idesc = &m32rbf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
-#define FLD(f) abuf->fields.sfmt_ld_plus.f
- UINT f_r1;
- UINT f_r2;
-
- f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4);
- f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_r2) = f_r2;
- FLD (f_r1) = f_r1;
- FLD (i_dr) = & CPU (h_gr)[f_r1];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mvfc", "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "dr 0x%x", 'x', f_r1, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (out_dr) = f_r1;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_mvtachi:
- {
- const IDESC *idesc = &m32rbf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
-#define FLD(f) abuf->fields.sfmt_st_plus.f
- UINT f_r1;
-
- f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_r1) = f_r1;
- FLD (i_src1) = & CPU (h_gr)[f_r1];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mvtachi", "f_r1 0x%x", 'x', f_r1, "src1 0x%x", 'x', f_r1, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_src1) = f_r1;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_mvtc:
- {
- const IDESC *idesc = &m32rbf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
-#define FLD(f) abuf->fields.sfmt_ld_plus.f
- UINT f_r1;
- UINT f_r2;
-
- f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4);
- f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_r2) = f_r2;
- FLD (f_r1) = f_r1;
- FLD (i_sr) = & CPU (h_gr)[f_r2];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mvtc", "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_sr) = f_r2;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_nop:
- {
- const IDESC *idesc = &m32rbf_insn_data[itype];
-#define FLD(f) abuf->fields.fmt_empty.f
-
-
- /* Record the fields for the semantic handler. */
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_nop", (char *) 0));
-
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_rac:
- {
- const IDESC *idesc = &m32rbf_insn_data[itype];
-#define FLD(f) abuf->fields.fmt_empty.f
-
-
- /* Record the fields for the semantic handler. */
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_rac", (char *) 0));
-
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_rte:
- {
- const IDESC *idesc = &m32rbf_insn_data[itype];
-#define FLD(f) abuf->fields.fmt_empty.f
-
-
- /* Record the fields for the semantic handler. */
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_rte", (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_seth:
- {
- const IDESC *idesc = &m32rbf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
-#define FLD(f) abuf->fields.sfmt_seth.f
- UINT f_r1;
- UINT f_hi16;
-
- f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4);
- f_hi16 = EXTRACT_MSB0_UINT (insn, 32, 16, 16);
-
- /* Record the fields for the semantic handler. */
- FLD (f_hi16) = f_hi16;
- FLD (f_r1) = f_r1;
- FLD (i_dr) = & CPU (h_gr)[f_r1];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_seth", "f_hi16 0x%x", 'x', f_hi16, "f_r1 0x%x", 'x', f_r1, "dr 0x%x", 'x', f_r1, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (out_dr) = f_r1;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_sll3:
- {
- const IDESC *idesc = &m32rbf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
-#define FLD(f) abuf->fields.sfmt_add3.f
- UINT f_r1;
- UINT f_r2;
- INT f_simm16;
-
- f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4);
- f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4);
- f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16);
-
- /* Record the fields for the semantic handler. */
- FLD (f_simm16) = f_simm16;
- FLD (f_r2) = f_r2;
- FLD (f_r1) = f_r1;
- FLD (i_sr) = & CPU (h_gr)[f_r2];
- FLD (i_dr) = & CPU (h_gr)[f_r1];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_sll3", "f_simm16 0x%x", 'x', f_simm16, "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_sr) = f_r2;
- FLD (out_dr) = f_r1;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_slli:
- {
- const IDESC *idesc = &m32rbf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
-#define FLD(f) abuf->fields.sfmt_slli.f
- UINT f_r1;
- UINT f_uimm5;
-
- f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4);
- f_uimm5 = EXTRACT_MSB0_UINT (insn, 16, 11, 5);
-
- /* Record the fields for the semantic handler. */
- FLD (f_r1) = f_r1;
- FLD (f_uimm5) = f_uimm5;
- FLD (i_dr) = & CPU (h_gr)[f_r1];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_slli", "f_r1 0x%x", 'x', f_r1, "f_uimm5 0x%x", 'x', f_uimm5, "dr 0x%x", 'x', f_r1, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_dr) = f_r1;
- FLD (out_dr) = f_r1;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_st:
- {
- const IDESC *idesc = &m32rbf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
-#define FLD(f) abuf->fields.sfmt_st_plus.f
- UINT f_r1;
- UINT f_r2;
-
- f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4);
- f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_r1) = f_r1;
- FLD (f_r2) = f_r2;
- FLD (i_src1) = & CPU (h_gr)[f_r1];
- FLD (i_src2) = & CPU (h_gr)[f_r2];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_st", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_src1) = f_r1;
- FLD (in_src2) = f_r2;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_st_d:
- {
- const IDESC *idesc = &m32rbf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
-#define FLD(f) abuf->fields.sfmt_st_d.f
- UINT f_r1;
- UINT f_r2;
- INT f_simm16;
-
- f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4);
- f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4);
- f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16);
-
- /* Record the fields for the semantic handler. */
- FLD (f_simm16) = f_simm16;
- FLD (f_r1) = f_r1;
- FLD (f_r2) = f_r2;
- FLD (i_src1) = & CPU (h_gr)[f_r1];
- FLD (i_src2) = & CPU (h_gr)[f_r2];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_st_d", "f_simm16 0x%x", 'x', f_simm16, "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_src1) = f_r1;
- FLD (in_src2) = f_r2;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_stb:
- {
- const IDESC *idesc = &m32rbf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
-#define FLD(f) abuf->fields.sfmt_st_plus.f
- UINT f_r1;
- UINT f_r2;
-
- f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4);
- f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_r1) = f_r1;
- FLD (f_r2) = f_r2;
- FLD (i_src1) = & CPU (h_gr)[f_r1];
- FLD (i_src2) = & CPU (h_gr)[f_r2];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stb", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_src1) = f_r1;
- FLD (in_src2) = f_r2;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_stb_d:
- {
- const IDESC *idesc = &m32rbf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
-#define FLD(f) abuf->fields.sfmt_st_d.f
- UINT f_r1;
- UINT f_r2;
- INT f_simm16;
-
- f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4);
- f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4);
- f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16);
-
- /* Record the fields for the semantic handler. */
- FLD (f_simm16) = f_simm16;
- FLD (f_r1) = f_r1;
- FLD (f_r2) = f_r2;
- FLD (i_src1) = & CPU (h_gr)[f_r1];
- FLD (i_src2) = & CPU (h_gr)[f_r2];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stb_d", "f_simm16 0x%x", 'x', f_simm16, "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_src1) = f_r1;
- FLD (in_src2) = f_r2;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_sth:
- {
- const IDESC *idesc = &m32rbf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
-#define FLD(f) abuf->fields.sfmt_st_plus.f
- UINT f_r1;
- UINT f_r2;
-
- f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4);
- f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_r1) = f_r1;
- FLD (f_r2) = f_r2;
- FLD (i_src1) = & CPU (h_gr)[f_r1];
- FLD (i_src2) = & CPU (h_gr)[f_r2];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_sth", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_src1) = f_r1;
- FLD (in_src2) = f_r2;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_sth_d:
- {
- const IDESC *idesc = &m32rbf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
-#define FLD(f) abuf->fields.sfmt_st_d.f
- UINT f_r1;
- UINT f_r2;
- INT f_simm16;
-
- f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4);
- f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4);
- f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16);
-
- /* Record the fields for the semantic handler. */
- FLD (f_simm16) = f_simm16;
- FLD (f_r1) = f_r1;
- FLD (f_r2) = f_r2;
- FLD (i_src1) = & CPU (h_gr)[f_r1];
- FLD (i_src2) = & CPU (h_gr)[f_r2];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_sth_d", "f_simm16 0x%x", 'x', f_simm16, "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_src1) = f_r1;
- FLD (in_src2) = f_r2;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_st_plus:
- {
- const IDESC *idesc = &m32rbf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
-#define FLD(f) abuf->fields.sfmt_st_plus.f
- UINT f_r1;
- UINT f_r2;
-
- f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4);
- f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_r1) = f_r1;
- FLD (f_r2) = f_r2;
- FLD (i_src1) = & CPU (h_gr)[f_r1];
- FLD (i_src2) = & CPU (h_gr)[f_r2];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_st_plus", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_src1) = f_r1;
- FLD (in_src2) = f_r2;
- FLD (out_src2) = f_r2;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_trap:
- {
- const IDESC *idesc = &m32rbf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
-#define FLD(f) abuf->fields.sfmt_trap.f
- UINT f_uimm4;
-
- f_uimm4 = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_uimm4) = f_uimm4;
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_trap", "f_uimm4 0x%x", 'x', f_uimm4, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_unlock:
- {
- const IDESC *idesc = &m32rbf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
-#define FLD(f) abuf->fields.sfmt_st_plus.f
- UINT f_r1;
- UINT f_r2;
-
- f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4);
- f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_r1) = f_r1;
- FLD (f_r2) = f_r2;
- FLD (i_src1) = & CPU (h_gr)[f_r1];
- FLD (i_src2) = & CPU (h_gr)[f_r2];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_unlock", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_src1) = f_r1;
- FLD (in_src2) = f_r2;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
-}
diff --git a/sim/m32r/decode.h b/sim/m32r/decode.h
deleted file mode 100644
index 2289438fb3f..00000000000
--- a/sim/m32r/decode.h
+++ /dev/null
@@ -1,98 +0,0 @@
-/* Decode header for m32rbf.
-
-THIS FILE IS MACHINE GENERATED WITH CGEN.
-
-Copyright (C) 1996, 1997, 1998, 1999, 2000 Free Software Foundation, Inc.
-
-This file is part of the GNU Simulators.
-
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License along
-with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
-*/
-
-#ifndef M32RBF_DECODE_H
-#define M32RBF_DECODE_H
-
-extern const IDESC *m32rbf_decode (SIM_CPU *, IADDR,
- CGEN_INSN_INT, CGEN_INSN_INT,
- ARGBUF *);
-extern void m32rbf_init_idesc_table (SIM_CPU *);
-extern void m32rbf_sem_init_idesc_table (SIM_CPU *);
-extern void m32rbf_semf_init_idesc_table (SIM_CPU *);
-
-/* Enum declaration for instructions in cpu family m32rbf. */
-typedef enum m32rbf_insn_type {
- M32RBF_INSN_X_INVALID, M32RBF_INSN_X_AFTER, M32RBF_INSN_X_BEFORE, M32RBF_INSN_X_CTI_CHAIN
- , M32RBF_INSN_X_CHAIN, M32RBF_INSN_X_BEGIN, M32RBF_INSN_ADD, M32RBF_INSN_ADD3
- , M32RBF_INSN_AND, M32RBF_INSN_AND3, M32RBF_INSN_OR, M32RBF_INSN_OR3
- , M32RBF_INSN_XOR, M32RBF_INSN_XOR3, M32RBF_INSN_ADDI, M32RBF_INSN_ADDV
- , M32RBF_INSN_ADDV3, M32RBF_INSN_ADDX, M32RBF_INSN_BC8, M32RBF_INSN_BC24
- , M32RBF_INSN_BEQ, M32RBF_INSN_BEQZ, M32RBF_INSN_BGEZ, M32RBF_INSN_BGTZ
- , M32RBF_INSN_BLEZ, M32RBF_INSN_BLTZ, M32RBF_INSN_BNEZ, M32RBF_INSN_BL8
- , M32RBF_INSN_BL24, M32RBF_INSN_BNC8, M32RBF_INSN_BNC24, M32RBF_INSN_BNE
- , M32RBF_INSN_BRA8, M32RBF_INSN_BRA24, M32RBF_INSN_CMP, M32RBF_INSN_CMPI
- , M32RBF_INSN_CMPU, M32RBF_INSN_CMPUI, M32RBF_INSN_DIV, M32RBF_INSN_DIVU
- , M32RBF_INSN_REM, M32RBF_INSN_REMU, M32RBF_INSN_JL, M32RBF_INSN_JMP
- , M32RBF_INSN_LD, M32RBF_INSN_LD_D, M32RBF_INSN_LDB, M32RBF_INSN_LDB_D
- , M32RBF_INSN_LDH, M32RBF_INSN_LDH_D, M32RBF_INSN_LDUB, M32RBF_INSN_LDUB_D
- , M32RBF_INSN_LDUH, M32RBF_INSN_LDUH_D, M32RBF_INSN_LD_PLUS, M32RBF_INSN_LD24
- , M32RBF_INSN_LDI8, M32RBF_INSN_LDI16, M32RBF_INSN_LOCK, M32RBF_INSN_MACHI
- , M32RBF_INSN_MACLO, M32RBF_INSN_MACWHI, M32RBF_INSN_MACWLO, M32RBF_INSN_MUL
- , M32RBF_INSN_MULHI, M32RBF_INSN_MULLO, M32RBF_INSN_MULWHI, M32RBF_INSN_MULWLO
- , M32RBF_INSN_MV, M32RBF_INSN_MVFACHI, M32RBF_INSN_MVFACLO, M32RBF_INSN_MVFACMI
- , M32RBF_INSN_MVFC, M32RBF_INSN_MVTACHI, M32RBF_INSN_MVTACLO, M32RBF_INSN_MVTC
- , M32RBF_INSN_NEG, M32RBF_INSN_NOP, M32RBF_INSN_NOT, M32RBF_INSN_RAC
- , M32RBF_INSN_RACH, M32RBF_INSN_RTE, M32RBF_INSN_SETH, M32RBF_INSN_SLL
- , M32RBF_INSN_SLL3, M32RBF_INSN_SLLI, M32RBF_INSN_SRA, M32RBF_INSN_SRA3
- , M32RBF_INSN_SRAI, M32RBF_INSN_SRL, M32RBF_INSN_SRL3, M32RBF_INSN_SRLI
- , M32RBF_INSN_ST, M32RBF_INSN_ST_D, M32RBF_INSN_STB, M32RBF_INSN_STB_D
- , M32RBF_INSN_STH, M32RBF_INSN_STH_D, M32RBF_INSN_ST_PLUS, M32RBF_INSN_ST_MINUS
- , M32RBF_INSN_SUB, M32RBF_INSN_SUBV, M32RBF_INSN_SUBX, M32RBF_INSN_TRAP
- , M32RBF_INSN_UNLOCK, M32RBF_INSN_MAX
-} M32RBF_INSN_TYPE;
-
-/* Enum declaration for semantic formats in cpu family m32rbf. */
-typedef enum m32rbf_sfmt_type {
- M32RBF_SFMT_EMPTY, M32RBF_SFMT_ADD, M32RBF_SFMT_ADD3, M32RBF_SFMT_AND3
- , M32RBF_SFMT_OR3, M32RBF_SFMT_ADDI, M32RBF_SFMT_ADDV, M32RBF_SFMT_ADDV3
- , M32RBF_SFMT_ADDX, M32RBF_SFMT_BC8, M32RBF_SFMT_BC24, M32RBF_SFMT_BEQ
- , M32RBF_SFMT_BEQZ, M32RBF_SFMT_BL8, M32RBF_SFMT_BL24, M32RBF_SFMT_BRA8
- , M32RBF_SFMT_BRA24, M32RBF_SFMT_CMP, M32RBF_SFMT_CMPI, M32RBF_SFMT_DIV
- , M32RBF_SFMT_JL, M32RBF_SFMT_JMP, M32RBF_SFMT_LD, M32RBF_SFMT_LD_D
- , M32RBF_SFMT_LD_PLUS, M32RBF_SFMT_LD24, M32RBF_SFMT_LDI8, M32RBF_SFMT_LDI16
- , M32RBF_SFMT_LOCK, M32RBF_SFMT_MACHI, M32RBF_SFMT_MULHI, M32RBF_SFMT_MV
- , M32RBF_SFMT_MVFACHI, M32RBF_SFMT_MVFC, M32RBF_SFMT_MVTACHI, M32RBF_SFMT_MVTC
- , M32RBF_SFMT_NOP, M32RBF_SFMT_RAC, M32RBF_SFMT_RTE, M32RBF_SFMT_SETH
- , M32RBF_SFMT_SLL3, M32RBF_SFMT_SLLI, M32RBF_SFMT_ST, M32RBF_SFMT_ST_D
- , M32RBF_SFMT_STB, M32RBF_SFMT_STB_D, M32RBF_SFMT_STH, M32RBF_SFMT_STH_D
- , M32RBF_SFMT_ST_PLUS, M32RBF_SFMT_TRAP, M32RBF_SFMT_UNLOCK
-} M32RBF_SFMT_TYPE;
-
-/* Function unit handlers (user written). */
-
-extern int m32rbf_model_m32r_d_u_store (SIM_CPU *, const IDESC *, int /*unit_num*/, int /*referenced*/, INT /*src1*/, INT /*src2*/);
-extern int m32rbf_model_m32r_d_u_load (SIM_CPU *, const IDESC *, int /*unit_num*/, int /*referenced*/, INT /*sr*/, INT /*dr*/);
-extern int m32rbf_model_m32r_d_u_cti (SIM_CPU *, const IDESC *, int /*unit_num*/, int /*referenced*/, INT /*sr*/);
-extern int m32rbf_model_m32r_d_u_mac (SIM_CPU *, const IDESC *, int /*unit_num*/, int /*referenced*/, INT /*src1*/, INT /*src2*/);
-extern int m32rbf_model_m32r_d_u_cmp (SIM_CPU *, const IDESC *, int /*unit_num*/, int /*referenced*/, INT /*src1*/, INT /*src2*/);
-extern int m32rbf_model_m32r_d_u_exec (SIM_CPU *, const IDESC *, int /*unit_num*/, int /*referenced*/, INT /*sr*/, INT /*dr*/, INT /*dr*/);
-extern int m32rbf_model_test_u_exec (SIM_CPU *, const IDESC *, int /*unit_num*/, int /*referenced*/);
-
-/* Profiling before/after handlers (user written) */
-
-extern void m32rbf_model_insn_before (SIM_CPU *, int /*first_p*/);
-extern void m32rbf_model_insn_after (SIM_CPU *, int /*last_p*/, int /*cycles*/);
-
-#endif /* M32RBF_DECODE_H */
diff --git a/sim/m32r/decodex.c b/sim/m32r/decodex.c
deleted file mode 100644
index 46e3f0f1b5a..00000000000
--- a/sim/m32r/decodex.c
+++ /dev/null
@@ -1,2141 +0,0 @@
-/* Simulator instruction decoder for m32rxf.
-
-THIS FILE IS MACHINE GENERATED WITH CGEN.
-
-Copyright (C) 1996, 1997, 1998, 1999, 2000 Free Software Foundation, Inc.
-
-This file is part of the GNU Simulators.
-
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License along
-with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
-*/
-
-#define WANT_CPU m32rxf
-#define WANT_CPU_M32RXF
-
-#include "sim-main.h"
-#include "sim-assert.h"
-
-/* Insn can't be executed in parallel.
- Or is that "do NOt Pass to Air defense Radar"? :-) */
-#define NOPAR (-1)
-
-/* The instruction descriptor array.
- This is computed at runtime. Space for it is not malloc'd to save a
- teensy bit of cpu in the decoder. Moving it to malloc space is trivial
- but won't be done until necessary (we don't currently support the runtime
- addition of instructions nor an SMP machine with different cpus). */
-static IDESC m32rxf_insn_data[M32RXF_INSN_MAX];
-
-/* Commas between elements are contained in the macros.
- Some of these are conditionally compiled out. */
-
-static const struct insn_sem m32rxf_insn_sem[] =
-{
- { VIRTUAL_INSN_X_INVALID, M32RXF_INSN_X_INVALID, M32RXF_SFMT_EMPTY, NOPAR, NOPAR },
- { VIRTUAL_INSN_X_AFTER, M32RXF_INSN_X_AFTER, M32RXF_SFMT_EMPTY, NOPAR, NOPAR },
- { VIRTUAL_INSN_X_BEFORE, M32RXF_INSN_X_BEFORE, M32RXF_SFMT_EMPTY, NOPAR, NOPAR },
- { VIRTUAL_INSN_X_CTI_CHAIN, M32RXF_INSN_X_CTI_CHAIN, M32RXF_SFMT_EMPTY, NOPAR, NOPAR },
- { VIRTUAL_INSN_X_CHAIN, M32RXF_INSN_X_CHAIN, M32RXF_SFMT_EMPTY, NOPAR, NOPAR },
- { VIRTUAL_INSN_X_BEGIN, M32RXF_INSN_X_BEGIN, M32RXF_SFMT_EMPTY, NOPAR, NOPAR },
- { M32R_INSN_ADD, M32RXF_INSN_ADD, M32RXF_SFMT_ADD, M32RXF_INSN_PAR_ADD, M32RXF_INSN_WRITE_ADD },
- { M32R_INSN_ADD3, M32RXF_INSN_ADD3, M32RXF_SFMT_ADD3, NOPAR, NOPAR },
- { M32R_INSN_AND, M32RXF_INSN_AND, M32RXF_SFMT_ADD, M32RXF_INSN_PAR_AND, M32RXF_INSN_WRITE_AND },
- { M32R_INSN_AND3, M32RXF_INSN_AND3, M32RXF_SFMT_AND3, NOPAR, NOPAR },
- { M32R_INSN_OR, M32RXF_INSN_OR, M32RXF_SFMT_ADD, M32RXF_INSN_PAR_OR, M32RXF_INSN_WRITE_OR },
- { M32R_INSN_OR3, M32RXF_INSN_OR3, M32RXF_SFMT_OR3, NOPAR, NOPAR },
- { M32R_INSN_XOR, M32RXF_INSN_XOR, M32RXF_SFMT_ADD, M32RXF_INSN_PAR_XOR, M32RXF_INSN_WRITE_XOR },
- { M32R_INSN_XOR3, M32RXF_INSN_XOR3, M32RXF_SFMT_AND3, NOPAR, NOPAR },
- { M32R_INSN_ADDI, M32RXF_INSN_ADDI, M32RXF_SFMT_ADDI, M32RXF_INSN_PAR_ADDI, M32RXF_INSN_WRITE_ADDI },
- { M32R_INSN_ADDV, M32RXF_INSN_ADDV, M32RXF_SFMT_ADDV, M32RXF_INSN_PAR_ADDV, M32RXF_INSN_WRITE_ADDV },
- { M32R_INSN_ADDV3, M32RXF_INSN_ADDV3, M32RXF_SFMT_ADDV3, NOPAR, NOPAR },
- { M32R_INSN_ADDX, M32RXF_INSN_ADDX, M32RXF_SFMT_ADDX, M32RXF_INSN_PAR_ADDX, M32RXF_INSN_WRITE_ADDX },
- { M32R_INSN_BC8, M32RXF_INSN_BC8, M32RXF_SFMT_BC8, M32RXF_INSN_PAR_BC8, M32RXF_INSN_WRITE_BC8 },
- { M32R_INSN_BC24, M32RXF_INSN_BC24, M32RXF_SFMT_BC24, NOPAR, NOPAR },
- { M32R_INSN_BEQ, M32RXF_INSN_BEQ, M32RXF_SFMT_BEQ, NOPAR, NOPAR },
- { M32R_INSN_BEQZ, M32RXF_INSN_BEQZ, M32RXF_SFMT_BEQZ, NOPAR, NOPAR },
- { M32R_INSN_BGEZ, M32RXF_INSN_BGEZ, M32RXF_SFMT_BEQZ, NOPAR, NOPAR },
- { M32R_INSN_BGTZ, M32RXF_INSN_BGTZ, M32RXF_SFMT_BEQZ, NOPAR, NOPAR },
- { M32R_INSN_BLEZ, M32RXF_INSN_BLEZ, M32RXF_SFMT_BEQZ, NOPAR, NOPAR },
- { M32R_INSN_BLTZ, M32RXF_INSN_BLTZ, M32RXF_SFMT_BEQZ, NOPAR, NOPAR },
- { M32R_INSN_BNEZ, M32RXF_INSN_BNEZ, M32RXF_SFMT_BEQZ, NOPAR, NOPAR },
- { M32R_INSN_BL8, M32RXF_INSN_BL8, M32RXF_SFMT_BL8, M32RXF_INSN_PAR_BL8, M32RXF_INSN_WRITE_BL8 },
- { M32R_INSN_BL24, M32RXF_INSN_BL24, M32RXF_SFMT_BL24, NOPAR, NOPAR },
- { M32R_INSN_BCL8, M32RXF_INSN_BCL8, M32RXF_SFMT_BCL8, M32RXF_INSN_PAR_BCL8, M32RXF_INSN_WRITE_BCL8 },
- { M32R_INSN_BCL24, M32RXF_INSN_BCL24, M32RXF_SFMT_BCL24, NOPAR, NOPAR },
- { M32R_INSN_BNC8, M32RXF_INSN_BNC8, M32RXF_SFMT_BC8, M32RXF_INSN_PAR_BNC8, M32RXF_INSN_WRITE_BNC8 },
- { M32R_INSN_BNC24, M32RXF_INSN_BNC24, M32RXF_SFMT_BC24, NOPAR, NOPAR },
- { M32R_INSN_BNE, M32RXF_INSN_BNE, M32RXF_SFMT_BEQ, NOPAR, NOPAR },
- { M32R_INSN_BRA8, M32RXF_INSN_BRA8, M32RXF_SFMT_BRA8, M32RXF_INSN_PAR_BRA8, M32RXF_INSN_WRITE_BRA8 },
- { M32R_INSN_BRA24, M32RXF_INSN_BRA24, M32RXF_SFMT_BRA24, NOPAR, NOPAR },
- { M32R_INSN_BNCL8, M32RXF_INSN_BNCL8, M32RXF_SFMT_BCL8, M32RXF_INSN_PAR_BNCL8, M32RXF_INSN_WRITE_BNCL8 },
- { M32R_INSN_BNCL24, M32RXF_INSN_BNCL24, M32RXF_SFMT_BCL24, NOPAR, NOPAR },
- { M32R_INSN_CMP, M32RXF_INSN_CMP, M32RXF_SFMT_CMP, M32RXF_INSN_PAR_CMP, M32RXF_INSN_WRITE_CMP },
- { M32R_INSN_CMPI, M32RXF_INSN_CMPI, M32RXF_SFMT_CMPI, NOPAR, NOPAR },
- { M32R_INSN_CMPU, M32RXF_INSN_CMPU, M32RXF_SFMT_CMP, M32RXF_INSN_PAR_CMPU, M32RXF_INSN_WRITE_CMPU },
- { M32R_INSN_CMPUI, M32RXF_INSN_CMPUI, M32RXF_SFMT_CMPI, NOPAR, NOPAR },
- { M32R_INSN_CMPEQ, M32RXF_INSN_CMPEQ, M32RXF_SFMT_CMP, M32RXF_INSN_PAR_CMPEQ, M32RXF_INSN_WRITE_CMPEQ },
- { M32R_INSN_CMPZ, M32RXF_INSN_CMPZ, M32RXF_SFMT_CMPZ, M32RXF_INSN_PAR_CMPZ, M32RXF_INSN_WRITE_CMPZ },
- { M32R_INSN_DIV, M32RXF_INSN_DIV, M32RXF_SFMT_DIV, NOPAR, NOPAR },
- { M32R_INSN_DIVU, M32RXF_INSN_DIVU, M32RXF_SFMT_DIV, NOPAR, NOPAR },
- { M32R_INSN_REM, M32RXF_INSN_REM, M32RXF_SFMT_DIV, NOPAR, NOPAR },
- { M32R_INSN_REMU, M32RXF_INSN_REMU, M32RXF_SFMT_DIV, NOPAR, NOPAR },
- { M32R_INSN_DIVH, M32RXF_INSN_DIVH, M32RXF_SFMT_DIV, NOPAR, NOPAR },
- { M32R_INSN_JC, M32RXF_INSN_JC, M32RXF_SFMT_JC, M32RXF_INSN_PAR_JC, M32RXF_INSN_WRITE_JC },
- { M32R_INSN_JNC, M32RXF_INSN_JNC, M32RXF_SFMT_JC, M32RXF_INSN_PAR_JNC, M32RXF_INSN_WRITE_JNC },
- { M32R_INSN_JL, M32RXF_INSN_JL, M32RXF_SFMT_JL, M32RXF_INSN_PAR_JL, M32RXF_INSN_WRITE_JL },
- { M32R_INSN_JMP, M32RXF_INSN_JMP, M32RXF_SFMT_JMP, M32RXF_INSN_PAR_JMP, M32RXF_INSN_WRITE_JMP },
- { M32R_INSN_LD, M32RXF_INSN_LD, M32RXF_SFMT_LD, M32RXF_INSN_PAR_LD, M32RXF_INSN_WRITE_LD },
- { M32R_INSN_LD_D, M32RXF_INSN_LD_D, M32RXF_SFMT_LD_D, NOPAR, NOPAR },
- { M32R_INSN_LDB, M32RXF_INSN_LDB, M32RXF_SFMT_LD, M32RXF_INSN_PAR_LDB, M32RXF_INSN_WRITE_LDB },
- { M32R_INSN_LDB_D, M32RXF_INSN_LDB_D, M32RXF_SFMT_LD_D, NOPAR, NOPAR },
- { M32R_INSN_LDH, M32RXF_INSN_LDH, M32RXF_SFMT_LD, M32RXF_INSN_PAR_LDH, M32RXF_INSN_WRITE_LDH },
- { M32R_INSN_LDH_D, M32RXF_INSN_LDH_D, M32RXF_SFMT_LD_D, NOPAR, NOPAR },
- { M32R_INSN_LDUB, M32RXF_INSN_LDUB, M32RXF_SFMT_LD, M32RXF_INSN_PAR_LDUB, M32RXF_INSN_WRITE_LDUB },
- { M32R_INSN_LDUB_D, M32RXF_INSN_LDUB_D, M32RXF_SFMT_LD_D, NOPAR, NOPAR },
- { M32R_INSN_LDUH, M32RXF_INSN_LDUH, M32RXF_SFMT_LD, M32RXF_INSN_PAR_LDUH, M32RXF_INSN_WRITE_LDUH },
- { M32R_INSN_LDUH_D, M32RXF_INSN_LDUH_D, M32RXF_SFMT_LD_D, NOPAR, NOPAR },
- { M32R_INSN_LD_PLUS, M32RXF_INSN_LD_PLUS, M32RXF_SFMT_LD_PLUS, M32RXF_INSN_PAR_LD_PLUS, M32RXF_INSN_WRITE_LD_PLUS },
- { M32R_INSN_LD24, M32RXF_INSN_LD24, M32RXF_SFMT_LD24, NOPAR, NOPAR },
- { M32R_INSN_LDI8, M32RXF_INSN_LDI8, M32RXF_SFMT_LDI8, M32RXF_INSN_PAR_LDI8, M32RXF_INSN_WRITE_LDI8 },
- { M32R_INSN_LDI16, M32RXF_INSN_LDI16, M32RXF_SFMT_LDI16, NOPAR, NOPAR },
- { M32R_INSN_LOCK, M32RXF_INSN_LOCK, M32RXF_SFMT_LOCK, M32RXF_INSN_PAR_LOCK, M32RXF_INSN_WRITE_LOCK },
- { M32R_INSN_MACHI_A, M32RXF_INSN_MACHI_A, M32RXF_SFMT_MACHI_A, M32RXF_INSN_PAR_MACHI_A, M32RXF_INSN_WRITE_MACHI_A },
- { M32R_INSN_MACLO_A, M32RXF_INSN_MACLO_A, M32RXF_SFMT_MACHI_A, M32RXF_INSN_PAR_MACLO_A, M32RXF_INSN_WRITE_MACLO_A },
- { M32R_INSN_MACWHI_A, M32RXF_INSN_MACWHI_A, M32RXF_SFMT_MACHI_A, M32RXF_INSN_PAR_MACWHI_A, M32RXF_INSN_WRITE_MACWHI_A },
- { M32R_INSN_MACWLO_A, M32RXF_INSN_MACWLO_A, M32RXF_SFMT_MACHI_A, M32RXF_INSN_PAR_MACWLO_A, M32RXF_INSN_WRITE_MACWLO_A },
- { M32R_INSN_MUL, M32RXF_INSN_MUL, M32RXF_SFMT_ADD, M32RXF_INSN_PAR_MUL, M32RXF_INSN_WRITE_MUL },
- { M32R_INSN_MULHI_A, M32RXF_INSN_MULHI_A, M32RXF_SFMT_MULHI_A, M32RXF_INSN_PAR_MULHI_A, M32RXF_INSN_WRITE_MULHI_A },
- { M32R_INSN_MULLO_A, M32RXF_INSN_MULLO_A, M32RXF_SFMT_MULHI_A, M32RXF_INSN_PAR_MULLO_A, M32RXF_INSN_WRITE_MULLO_A },
- { M32R_INSN_MULWHI_A, M32RXF_INSN_MULWHI_A, M32RXF_SFMT_MULHI_A, M32RXF_INSN_PAR_MULWHI_A, M32RXF_INSN_WRITE_MULWHI_A },
- { M32R_INSN_MULWLO_A, M32RXF_INSN_MULWLO_A, M32RXF_SFMT_MULHI_A, M32RXF_INSN_PAR_MULWLO_A, M32RXF_INSN_WRITE_MULWLO_A },
- { M32R_INSN_MV, M32RXF_INSN_MV, M32RXF_SFMT_MV, M32RXF_INSN_PAR_MV, M32RXF_INSN_WRITE_MV },
- { M32R_INSN_MVFACHI_A, M32RXF_INSN_MVFACHI_A, M32RXF_SFMT_MVFACHI_A, M32RXF_INSN_PAR_MVFACHI_A, M32RXF_INSN_WRITE_MVFACHI_A },
- { M32R_INSN_MVFACLO_A, M32RXF_INSN_MVFACLO_A, M32RXF_SFMT_MVFACHI_A, M32RXF_INSN_PAR_MVFACLO_A, M32RXF_INSN_WRITE_MVFACLO_A },
- { M32R_INSN_MVFACMI_A, M32RXF_INSN_MVFACMI_A, M32RXF_SFMT_MVFACHI_A, M32RXF_INSN_PAR_MVFACMI_A, M32RXF_INSN_WRITE_MVFACMI_A },
- { M32R_INSN_MVFC, M32RXF_INSN_MVFC, M32RXF_SFMT_MVFC, M32RXF_INSN_PAR_MVFC, M32RXF_INSN_WRITE_MVFC },
- { M32R_INSN_MVTACHI_A, M32RXF_INSN_MVTACHI_A, M32RXF_SFMT_MVTACHI_A, M32RXF_INSN_PAR_MVTACHI_A, M32RXF_INSN_WRITE_MVTACHI_A },
- { M32R_INSN_MVTACLO_A, M32RXF_INSN_MVTACLO_A, M32RXF_SFMT_MVTACHI_A, M32RXF_INSN_PAR_MVTACLO_A, M32RXF_INSN_WRITE_MVTACLO_A },
- { M32R_INSN_MVTC, M32RXF_INSN_MVTC, M32RXF_SFMT_MVTC, M32RXF_INSN_PAR_MVTC, M32RXF_INSN_WRITE_MVTC },
- { M32R_INSN_NEG, M32RXF_INSN_NEG, M32RXF_SFMT_MV, M32RXF_INSN_PAR_NEG, M32RXF_INSN_WRITE_NEG },
- { M32R_INSN_NOP, M32RXF_INSN_NOP, M32RXF_SFMT_NOP, M32RXF_INSN_PAR_NOP, M32RXF_INSN_WRITE_NOP },
- { M32R_INSN_NOT, M32RXF_INSN_NOT, M32RXF_SFMT_MV, M32RXF_INSN_PAR_NOT, M32RXF_INSN_WRITE_NOT },
- { M32R_INSN_RAC_DSI, M32RXF_INSN_RAC_DSI, M32RXF_SFMT_RAC_DSI, M32RXF_INSN_PAR_RAC_DSI, M32RXF_INSN_WRITE_RAC_DSI },
- { M32R_INSN_RACH_DSI, M32RXF_INSN_RACH_DSI, M32RXF_SFMT_RAC_DSI, M32RXF_INSN_PAR_RACH_DSI, M32RXF_INSN_WRITE_RACH_DSI },
- { M32R_INSN_RTE, M32RXF_INSN_RTE, M32RXF_SFMT_RTE, M32RXF_INSN_PAR_RTE, M32RXF_INSN_WRITE_RTE },
- { M32R_INSN_SETH, M32RXF_INSN_SETH, M32RXF_SFMT_SETH, NOPAR, NOPAR },
- { M32R_INSN_SLL, M32RXF_INSN_SLL, M32RXF_SFMT_ADD, M32RXF_INSN_PAR_SLL, M32RXF_INSN_WRITE_SLL },
- { M32R_INSN_SLL3, M32RXF_INSN_SLL3, M32RXF_SFMT_SLL3, NOPAR, NOPAR },
- { M32R_INSN_SLLI, M32RXF_INSN_SLLI, M32RXF_SFMT_SLLI, M32RXF_INSN_PAR_SLLI, M32RXF_INSN_WRITE_SLLI },
- { M32R_INSN_SRA, M32RXF_INSN_SRA, M32RXF_SFMT_ADD, M32RXF_INSN_PAR_SRA, M32RXF_INSN_WRITE_SRA },
- { M32R_INSN_SRA3, M32RXF_INSN_SRA3, M32RXF_SFMT_SLL3, NOPAR, NOPAR },
- { M32R_INSN_SRAI, M32RXF_INSN_SRAI, M32RXF_SFMT_SLLI, M32RXF_INSN_PAR_SRAI, M32RXF_INSN_WRITE_SRAI },
- { M32R_INSN_SRL, M32RXF_INSN_SRL, M32RXF_SFMT_ADD, M32RXF_INSN_PAR_SRL, M32RXF_INSN_WRITE_SRL },
- { M32R_INSN_SRL3, M32RXF_INSN_SRL3, M32RXF_SFMT_SLL3, NOPAR, NOPAR },
- { M32R_INSN_SRLI, M32RXF_INSN_SRLI, M32RXF_SFMT_SLLI, M32RXF_INSN_PAR_SRLI, M32RXF_INSN_WRITE_SRLI },
- { M32R_INSN_ST, M32RXF_INSN_ST, M32RXF_SFMT_ST, M32RXF_INSN_PAR_ST, M32RXF_INSN_WRITE_ST },
- { M32R_INSN_ST_D, M32RXF_INSN_ST_D, M32RXF_SFMT_ST_D, NOPAR, NOPAR },
- { M32R_INSN_STB, M32RXF_INSN_STB, M32RXF_SFMT_STB, M32RXF_INSN_PAR_STB, M32RXF_INSN_WRITE_STB },
- { M32R_INSN_STB_D, M32RXF_INSN_STB_D, M32RXF_SFMT_STB_D, NOPAR, NOPAR },
- { M32R_INSN_STH, M32RXF_INSN_STH, M32RXF_SFMT_STH, M32RXF_INSN_PAR_STH, M32RXF_INSN_WRITE_STH },
- { M32R_INSN_STH_D, M32RXF_INSN_STH_D, M32RXF_SFMT_STH_D, NOPAR, NOPAR },
- { M32R_INSN_ST_PLUS, M32RXF_INSN_ST_PLUS, M32RXF_SFMT_ST_PLUS, M32RXF_INSN_PAR_ST_PLUS, M32RXF_INSN_WRITE_ST_PLUS },
- { M32R_INSN_ST_MINUS, M32RXF_INSN_ST_MINUS, M32RXF_SFMT_ST_PLUS, M32RXF_INSN_PAR_ST_MINUS, M32RXF_INSN_WRITE_ST_MINUS },
- { M32R_INSN_SUB, M32RXF_INSN_SUB, M32RXF_SFMT_ADD, M32RXF_INSN_PAR_SUB, M32RXF_INSN_WRITE_SUB },
- { M32R_INSN_SUBV, M32RXF_INSN_SUBV, M32RXF_SFMT_ADDV, M32RXF_INSN_PAR_SUBV, M32RXF_INSN_WRITE_SUBV },
- { M32R_INSN_SUBX, M32RXF_INSN_SUBX, M32RXF_SFMT_ADDX, M32RXF_INSN_PAR_SUBX, M32RXF_INSN_WRITE_SUBX },
- { M32R_INSN_TRAP, M32RXF_INSN_TRAP, M32RXF_SFMT_TRAP, M32RXF_INSN_PAR_TRAP, M32RXF_INSN_WRITE_TRAP },
- { M32R_INSN_UNLOCK, M32RXF_INSN_UNLOCK, M32RXF_SFMT_UNLOCK, M32RXF_INSN_PAR_UNLOCK, M32RXF_INSN_WRITE_UNLOCK },
- { M32R_INSN_SATB, M32RXF_INSN_SATB, M32RXF_SFMT_SATB, NOPAR, NOPAR },
- { M32R_INSN_SATH, M32RXF_INSN_SATH, M32RXF_SFMT_SATB, NOPAR, NOPAR },
- { M32R_INSN_SAT, M32RXF_INSN_SAT, M32RXF_SFMT_SAT, NOPAR, NOPAR },
- { M32R_INSN_PCMPBZ, M32RXF_INSN_PCMPBZ, M32RXF_SFMT_CMPZ, M32RXF_INSN_PAR_PCMPBZ, M32RXF_INSN_WRITE_PCMPBZ },
- { M32R_INSN_SADD, M32RXF_INSN_SADD, M32RXF_SFMT_SADD, M32RXF_INSN_PAR_SADD, M32RXF_INSN_WRITE_SADD },
- { M32R_INSN_MACWU1, M32RXF_INSN_MACWU1, M32RXF_SFMT_MACWU1, M32RXF_INSN_PAR_MACWU1, M32RXF_INSN_WRITE_MACWU1 },
- { M32R_INSN_MSBLO, M32RXF_INSN_MSBLO, M32RXF_SFMT_MSBLO, M32RXF_INSN_PAR_MSBLO, M32RXF_INSN_WRITE_MSBLO },
- { M32R_INSN_MULWU1, M32RXF_INSN_MULWU1, M32RXF_SFMT_MULWU1, M32RXF_INSN_PAR_MULWU1, M32RXF_INSN_WRITE_MULWU1 },
- { M32R_INSN_MACLH1, M32RXF_INSN_MACLH1, M32RXF_SFMT_MACWU1, M32RXF_INSN_PAR_MACLH1, M32RXF_INSN_WRITE_MACLH1 },
- { M32R_INSN_SC, M32RXF_INSN_SC, M32RXF_SFMT_SC, M32RXF_INSN_PAR_SC, M32RXF_INSN_WRITE_SC },
- { M32R_INSN_SNC, M32RXF_INSN_SNC, M32RXF_SFMT_SC, M32RXF_INSN_PAR_SNC, M32RXF_INSN_WRITE_SNC },
-};
-
-static const struct insn_sem m32rxf_insn_sem_invalid = {
- VIRTUAL_INSN_X_INVALID, M32RXF_INSN_X_INVALID, M32RXF_SFMT_EMPTY, NOPAR, NOPAR
-};
-
-/* Initialize an IDESC from the compile-time computable parts. */
-
-static INLINE void
-init_idesc (SIM_CPU *cpu, IDESC *id, const struct insn_sem *t)
-{
- const CGEN_INSN *insn_table = CGEN_CPU_INSN_TABLE (CPU_CPU_DESC (cpu))->init_entries;
-
- id->num = t->index;
- id->sfmt = t->sfmt;
- if ((int) t->type <= 0)
- id->idata = & cgen_virtual_insn_table[- (int) t->type];
- else
- id->idata = & insn_table[t->type];
- id->attrs = CGEN_INSN_ATTRS (id->idata);
- /* Oh my god, a magic number. */
- id->length = CGEN_INSN_BITSIZE (id->idata) / 8;
-
-#if WITH_PROFILE_MODEL_P
- id->timing = & MODEL_TIMING (CPU_MODEL (cpu)) [t->index];
- {
- SIM_DESC sd = CPU_STATE (cpu);
- SIM_ASSERT (t->index == id->timing->num);
- }
-#endif
-
- /* Semantic pointers are initialized elsewhere. */
-}
-
-/* Initialize the instruction descriptor table. */
-
-void
-m32rxf_init_idesc_table (SIM_CPU *cpu)
-{
- IDESC *id,*tabend;
- const struct insn_sem *t,*tend;
- int tabsize = M32RXF_INSN_MAX;
- IDESC *table = m32rxf_insn_data;
-
- memset (table, 0, tabsize * sizeof (IDESC));
-
- /* First set all entries to the `invalid insn'. */
- t = & m32rxf_insn_sem_invalid;
- for (id = table, tabend = table + tabsize; id < tabend; ++id)
- init_idesc (cpu, id, t);
-
- /* Now fill in the values for the chosen cpu. */
- for (t = m32rxf_insn_sem, tend = t + sizeof (m32rxf_insn_sem) / sizeof (*t);
- t != tend; ++t)
- {
- init_idesc (cpu, & table[t->index], t);
- if (t->par_index != NOPAR)
- {
- init_idesc (cpu, &table[t->par_index], t);
- table[t->index].par_idesc = &table[t->par_index];
- }
- if (t->par_index != NOPAR)
- {
- init_idesc (cpu, &table[t->write_index], t);
- table[t->par_index].par_idesc = &table[t->write_index];
- }
- }
-
- /* Link the IDESC table into the cpu. */
- CPU_IDESC (cpu) = table;
-}
-
-/* Given an instruction, return a pointer to its IDESC entry. */
-
-const IDESC *
-m32rxf_decode (SIM_CPU *current_cpu, IADDR pc,
- CGEN_INSN_INT base_insn, CGEN_INSN_INT entire_insn,
- ARGBUF *abuf)
-{
- /* Result of decoder. */
- M32RXF_INSN_TYPE itype;
-
- {
- CGEN_INSN_INT insn = base_insn;
-
- {
- unsigned int val = (((insn >> 8) & (15 << 4)) | ((insn >> 4) & (15 << 0)));
- switch (val)
- {
- case 0 : itype = M32RXF_INSN_SUBV; goto extract_sfmt_addv; case 1 : itype = M32RXF_INSN_SUBX; goto extract_sfmt_addx; case 2 : itype = M32RXF_INSN_SUB; goto extract_sfmt_add; case 3 : itype = M32RXF_INSN_NEG; goto extract_sfmt_mv; case 4 : itype = M32RXF_INSN_CMP; goto extract_sfmt_cmp; case 5 : itype = M32RXF_INSN_CMPU; goto extract_sfmt_cmp; case 6 : itype = M32RXF_INSN_CMPEQ; goto extract_sfmt_cmp; case 7 :
- {
- unsigned int val = (((insn >> 8) & (3 << 0)));
- switch (val)
- {
- case 0 : itype = M32RXF_INSN_CMPZ; goto extract_sfmt_cmpz; case 3 : itype = M32RXF_INSN_PCMPBZ; goto extract_sfmt_cmpz; default : itype = M32RXF_INSN_X_INVALID; goto extract_sfmt_empty;
- }
- }
- case 8 : itype = M32RXF_INSN_ADDV; goto extract_sfmt_addv; case 9 : itype = M32RXF_INSN_ADDX; goto extract_sfmt_addx; case 10 : itype = M32RXF_INSN_ADD; goto extract_sfmt_add; case 11 : itype = M32RXF_INSN_NOT; goto extract_sfmt_mv; case 12 : itype = M32RXF_INSN_AND; goto extract_sfmt_add; case 13 : itype = M32RXF_INSN_XOR; goto extract_sfmt_add; case 14 : itype = M32RXF_INSN_OR; goto extract_sfmt_add; case 16 : itype = M32RXF_INSN_SRL; goto extract_sfmt_add; case 18 : itype = M32RXF_INSN_SRA; goto extract_sfmt_add; case 20 : itype = M32RXF_INSN_SLL; goto extract_sfmt_add; case 22 : itype = M32RXF_INSN_MUL; goto extract_sfmt_add; case 24 : itype = M32RXF_INSN_MV; goto extract_sfmt_mv; case 25 : itype = M32RXF_INSN_MVFC; goto extract_sfmt_mvfc; case 26 : itype = M32RXF_INSN_MVTC; goto extract_sfmt_mvtc; case 28 :
- {
- unsigned int val = (((insn >> 8) & (3 << 0)));
- switch (val)
- {
- case 0 : itype = M32RXF_INSN_JC; goto extract_sfmt_jc; case 1 : itype = M32RXF_INSN_JNC; goto extract_sfmt_jc; case 2 : itype = M32RXF_INSN_JL; goto extract_sfmt_jl; case 3 : itype = M32RXF_INSN_JMP; goto extract_sfmt_jmp; default : itype = M32RXF_INSN_X_INVALID; goto extract_sfmt_empty;
- }
- }
- case 29 : itype = M32RXF_INSN_RTE; goto extract_sfmt_rte; case 31 : itype = M32RXF_INSN_TRAP; goto extract_sfmt_trap; case 32 : itype = M32RXF_INSN_STB; goto extract_sfmt_stb; case 34 : itype = M32RXF_INSN_STH; goto extract_sfmt_sth; case 36 : itype = M32RXF_INSN_ST; goto extract_sfmt_st; case 37 : itype = M32RXF_INSN_UNLOCK; goto extract_sfmt_unlock; case 38 : itype = M32RXF_INSN_ST_PLUS; goto extract_sfmt_st_plus; case 39 : itype = M32RXF_INSN_ST_MINUS; goto extract_sfmt_st_plus; case 40 : itype = M32RXF_INSN_LDB; goto extract_sfmt_ld; case 41 : itype = M32RXF_INSN_LDUB; goto extract_sfmt_ld; case 42 : itype = M32RXF_INSN_LDH; goto extract_sfmt_ld; case 43 : itype = M32RXF_INSN_LDUH; goto extract_sfmt_ld; case 44 : itype = M32RXF_INSN_LD; goto extract_sfmt_ld; case 45 : itype = M32RXF_INSN_LOCK; goto extract_sfmt_lock; case 46 : itype = M32RXF_INSN_LD_PLUS; goto extract_sfmt_ld_plus; case 48 : /* fall through */
- case 56 : itype = M32RXF_INSN_MULHI_A; goto extract_sfmt_mulhi_a; case 49 : /* fall through */
- case 57 : itype = M32RXF_INSN_MULLO_A; goto extract_sfmt_mulhi_a; case 50 : /* fall through */
- case 58 : itype = M32RXF_INSN_MULWHI_A; goto extract_sfmt_mulhi_a; case 51 : /* fall through */
- case 59 : itype = M32RXF_INSN_MULWLO_A; goto extract_sfmt_mulhi_a; case 52 : /* fall through */
- case 60 : itype = M32RXF_INSN_MACHI_A; goto extract_sfmt_machi_a; case 53 : /* fall through */
- case 61 : itype = M32RXF_INSN_MACLO_A; goto extract_sfmt_machi_a; case 54 : /* fall through */
- case 62 : itype = M32RXF_INSN_MACWHI_A; goto extract_sfmt_machi_a; case 55 : /* fall through */
- case 63 : itype = M32RXF_INSN_MACWLO_A; goto extract_sfmt_machi_a; case 64 : /* fall through */
- case 65 : /* fall through */
- case 66 : /* fall through */
- case 67 : /* fall through */
- case 68 : /* fall through */
- case 69 : /* fall through */
- case 70 : /* fall through */
- case 71 : /* fall through */
- case 72 : /* fall through */
- case 73 : /* fall through */
- case 74 : /* fall through */
- case 75 : /* fall through */
- case 76 : /* fall through */
- case 77 : /* fall through */
- case 78 : /* fall through */
- case 79 : itype = M32RXF_INSN_ADDI; goto extract_sfmt_addi; case 80 : /* fall through */
- case 81 : itype = M32RXF_INSN_SRLI; goto extract_sfmt_slli; case 82 : /* fall through */
- case 83 : itype = M32RXF_INSN_SRAI; goto extract_sfmt_slli; case 84 : /* fall through */
- case 85 : itype = M32RXF_INSN_SLLI; goto extract_sfmt_slli; case 87 :
- {
- unsigned int val = (((insn >> 0) & (1 << 0)));
- switch (val)
- {
- case 0 : itype = M32RXF_INSN_MVTACHI_A; goto extract_sfmt_mvtachi_a; case 1 : itype = M32RXF_INSN_MVTACLO_A; goto extract_sfmt_mvtachi_a; default : itype = M32RXF_INSN_X_INVALID; goto extract_sfmt_empty;
- }
- }
- case 88 : itype = M32RXF_INSN_RACH_DSI; goto extract_sfmt_rac_dsi; case 89 : itype = M32RXF_INSN_RAC_DSI; goto extract_sfmt_rac_dsi; case 90 : itype = M32RXF_INSN_MULWU1; goto extract_sfmt_mulwu1; case 91 : itype = M32RXF_INSN_MACWU1; goto extract_sfmt_macwu1; case 92 : itype = M32RXF_INSN_MACLH1; goto extract_sfmt_macwu1; case 93 : itype = M32RXF_INSN_MSBLO; goto extract_sfmt_msblo; case 94 : itype = M32RXF_INSN_SADD; goto extract_sfmt_sadd; case 95 :
- {
- unsigned int val = (((insn >> 0) & (3 << 0)));
- switch (val)
- {
- case 0 : itype = M32RXF_INSN_MVFACHI_A; goto extract_sfmt_mvfachi_a; case 1 : itype = M32RXF_INSN_MVFACLO_A; goto extract_sfmt_mvfachi_a; case 2 : itype = M32RXF_INSN_MVFACMI_A; goto extract_sfmt_mvfachi_a; default : itype = M32RXF_INSN_X_INVALID; goto extract_sfmt_empty;
- }
- }
- case 96 : /* fall through */
- case 97 : /* fall through */
- case 98 : /* fall through */
- case 99 : /* fall through */
- case 100 : /* fall through */
- case 101 : /* fall through */
- case 102 : /* fall through */
- case 103 : /* fall through */
- case 104 : /* fall through */
- case 105 : /* fall through */
- case 106 : /* fall through */
- case 107 : /* fall through */
- case 108 : /* fall through */
- case 109 : /* fall through */
- case 110 : /* fall through */
- case 111 : itype = M32RXF_INSN_LDI8; goto extract_sfmt_ldi8; case 112 :
- {
- unsigned int val = (((insn >> 8) & (15 << 0)));
- switch (val)
- {
- case 0 : itype = M32RXF_INSN_NOP; goto extract_sfmt_nop; case 4 : itype = M32RXF_INSN_SC; goto extract_sfmt_sc; case 5 : itype = M32RXF_INSN_SNC; goto extract_sfmt_sc; case 8 : itype = M32RXF_INSN_BCL8; goto extract_sfmt_bcl8; case 9 : itype = M32RXF_INSN_BNCL8; goto extract_sfmt_bcl8; case 12 : itype = M32RXF_INSN_BC8; goto extract_sfmt_bc8; case 13 : itype = M32RXF_INSN_BNC8; goto extract_sfmt_bc8; case 14 : itype = M32RXF_INSN_BL8; goto extract_sfmt_bl8; case 15 : itype = M32RXF_INSN_BRA8; goto extract_sfmt_bra8; default : itype = M32RXF_INSN_X_INVALID; goto extract_sfmt_empty;
- }
- }
- case 113 : /* fall through */
- case 114 : /* fall through */
- case 115 : /* fall through */
- case 116 : /* fall through */
- case 117 : /* fall through */
- case 118 : /* fall through */
- case 119 : /* fall through */
- case 120 : /* fall through */
- case 121 : /* fall through */
- case 122 : /* fall through */
- case 123 : /* fall through */
- case 124 : /* fall through */
- case 125 : /* fall through */
- case 126 : /* fall through */
- case 127 :
- {
- unsigned int val = (((insn >> 8) & (7 << 0)));
- switch (val)
- {
- case 0 : itype = M32RXF_INSN_BCL8; goto extract_sfmt_bcl8; case 1 : itype = M32RXF_INSN_BNCL8; goto extract_sfmt_bcl8; case 4 : itype = M32RXF_INSN_BC8; goto extract_sfmt_bc8; case 5 : itype = M32RXF_INSN_BNC8; goto extract_sfmt_bc8; case 6 : itype = M32RXF_INSN_BL8; goto extract_sfmt_bl8; case 7 : itype = M32RXF_INSN_BRA8; goto extract_sfmt_bra8; default : itype = M32RXF_INSN_X_INVALID; goto extract_sfmt_empty;
- }
- }
- case 132 : itype = M32RXF_INSN_CMPI; goto extract_sfmt_cmpi; case 133 : itype = M32RXF_INSN_CMPUI; goto extract_sfmt_cmpi; case 134 :
- {
- unsigned int val = (((insn >> -8) & (3 << 0)));
- switch (val)
- {
- case 0 : itype = M32RXF_INSN_SAT; goto extract_sfmt_sat; case 2 : itype = M32RXF_INSN_SATH; goto extract_sfmt_satb; case 3 : itype = M32RXF_INSN_SATB; goto extract_sfmt_satb; default : itype = M32RXF_INSN_X_INVALID; goto extract_sfmt_empty;
- }
- }
- case 136 : itype = M32RXF_INSN_ADDV3; goto extract_sfmt_addv3; case 138 : itype = M32RXF_INSN_ADD3; goto extract_sfmt_add3; case 140 : itype = M32RXF_INSN_AND3; goto extract_sfmt_and3; case 141 : itype = M32RXF_INSN_XOR3; goto extract_sfmt_and3; case 142 : itype = M32RXF_INSN_OR3; goto extract_sfmt_or3; case 144 :
- {
- unsigned int val = (((insn >> -12) & (1 << 0)));
- switch (val)
- {
- case 0 : itype = M32RXF_INSN_DIV; goto extract_sfmt_div; case 1 : itype = M32RXF_INSN_DIVH; goto extract_sfmt_div; default : itype = M32RXF_INSN_X_INVALID; goto extract_sfmt_empty;
- }
- }
- case 145 : itype = M32RXF_INSN_DIVU; goto extract_sfmt_div; case 146 : itype = M32RXF_INSN_REM; goto extract_sfmt_div; case 147 : itype = M32RXF_INSN_REMU; goto extract_sfmt_div; case 152 : itype = M32RXF_INSN_SRL3; goto extract_sfmt_sll3; case 154 : itype = M32RXF_INSN_SRA3; goto extract_sfmt_sll3; case 156 : itype = M32RXF_INSN_SLL3; goto extract_sfmt_sll3; case 159 : itype = M32RXF_INSN_LDI16; goto extract_sfmt_ldi16; case 160 : itype = M32RXF_INSN_STB_D; goto extract_sfmt_stb_d; case 162 : itype = M32RXF_INSN_STH_D; goto extract_sfmt_sth_d; case 164 : itype = M32RXF_INSN_ST_D; goto extract_sfmt_st_d; case 168 : itype = M32RXF_INSN_LDB_D; goto extract_sfmt_ld_d; case 169 : itype = M32RXF_INSN_LDUB_D; goto extract_sfmt_ld_d; case 170 : itype = M32RXF_INSN_LDH_D; goto extract_sfmt_ld_d; case 171 : itype = M32RXF_INSN_LDUH_D; goto extract_sfmt_ld_d; case 172 : itype = M32RXF_INSN_LD_D; goto extract_sfmt_ld_d; case 176 : itype = M32RXF_INSN_BEQ; goto extract_sfmt_beq; case 177 : itype = M32RXF_INSN_BNE; goto extract_sfmt_beq; case 184 : itype = M32RXF_INSN_BEQZ; goto extract_sfmt_beqz; case 185 : itype = M32RXF_INSN_BNEZ; goto extract_sfmt_beqz; case 186 : itype = M32RXF_INSN_BLTZ; goto extract_sfmt_beqz; case 187 : itype = M32RXF_INSN_BGEZ; goto extract_sfmt_beqz; case 188 : itype = M32RXF_INSN_BLEZ; goto extract_sfmt_beqz; case 189 : itype = M32RXF_INSN_BGTZ; goto extract_sfmt_beqz; case 220 : itype = M32RXF_INSN_SETH; goto extract_sfmt_seth; case 224 : /* fall through */
- case 225 : /* fall through */
- case 226 : /* fall through */
- case 227 : /* fall through */
- case 228 : /* fall through */
- case 229 : /* fall through */
- case 230 : /* fall through */
- case 231 : /* fall through */
- case 232 : /* fall through */
- case 233 : /* fall through */
- case 234 : /* fall through */
- case 235 : /* fall through */
- case 236 : /* fall through */
- case 237 : /* fall through */
- case 238 : /* fall through */
- case 239 : itype = M32RXF_INSN_LD24; goto extract_sfmt_ld24; case 240 : /* fall through */
- case 241 : /* fall through */
- case 242 : /* fall through */
- case 243 : /* fall through */
- case 244 : /* fall through */
- case 245 : /* fall through */
- case 246 : /* fall through */
- case 247 : /* fall through */
- case 248 : /* fall through */
- case 249 : /* fall through */
- case 250 : /* fall through */
- case 251 : /* fall through */
- case 252 : /* fall through */
- case 253 : /* fall through */
- case 254 : /* fall through */
- case 255 :
- {
- unsigned int val = (((insn >> 8) & (7 << 0)));
- switch (val)
- {
- case 0 : itype = M32RXF_INSN_BCL24; goto extract_sfmt_bcl24; case 1 : itype = M32RXF_INSN_BNCL24; goto extract_sfmt_bcl24; case 4 : itype = M32RXF_INSN_BC24; goto extract_sfmt_bc24; case 5 : itype = M32RXF_INSN_BNC24; goto extract_sfmt_bc24; case 6 : itype = M32RXF_INSN_BL24; goto extract_sfmt_bl24; case 7 : itype = M32RXF_INSN_BRA24; goto extract_sfmt_bra24; default : itype = M32RXF_INSN_X_INVALID; goto extract_sfmt_empty;
- }
- }
- default : itype = M32RXF_INSN_X_INVALID; goto extract_sfmt_empty;
- }
- }
- }
-
- /* The instruction has been decoded, now extract the fields. */
-
- extract_sfmt_empty:
- {
- const IDESC *idesc = &m32rxf_insn_data[itype];
-#define FLD(f) abuf->fields.fmt_empty.f
-
-
- /* Record the fields for the semantic handler. */
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_empty", (char *) 0));
-
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_add:
- {
- const IDESC *idesc = &m32rxf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
-#define FLD(f) abuf->fields.sfmt_add.f
- UINT f_r1;
- UINT f_r2;
-
- f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4);
- f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_r1) = f_r1;
- FLD (f_r2) = f_r2;
- FLD (i_dr) = & CPU (h_gr)[f_r1];
- FLD (i_sr) = & CPU (h_gr)[f_r2];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_add", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_dr) = f_r1;
- FLD (in_sr) = f_r2;
- FLD (out_dr) = f_r1;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_add3:
- {
- const IDESC *idesc = &m32rxf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
-#define FLD(f) abuf->fields.sfmt_add3.f
- UINT f_r1;
- UINT f_r2;
- INT f_simm16;
-
- f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4);
- f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4);
- f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16);
-
- /* Record the fields for the semantic handler. */
- FLD (f_simm16) = f_simm16;
- FLD (f_r2) = f_r2;
- FLD (f_r1) = f_r1;
- FLD (i_sr) = & CPU (h_gr)[f_r2];
- FLD (i_dr) = & CPU (h_gr)[f_r1];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_add3", "f_simm16 0x%x", 'x', f_simm16, "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_sr) = f_r2;
- FLD (out_dr) = f_r1;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_and3:
- {
- const IDESC *idesc = &m32rxf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
-#define FLD(f) abuf->fields.sfmt_and3.f
- UINT f_r1;
- UINT f_r2;
- UINT f_uimm16;
-
- f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4);
- f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4);
- f_uimm16 = EXTRACT_MSB0_UINT (insn, 32, 16, 16);
-
- /* Record the fields for the semantic handler. */
- FLD (f_r2) = f_r2;
- FLD (f_uimm16) = f_uimm16;
- FLD (f_r1) = f_r1;
- FLD (i_sr) = & CPU (h_gr)[f_r2];
- FLD (i_dr) = & CPU (h_gr)[f_r1];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_and3", "f_r2 0x%x", 'x', f_r2, "f_uimm16 0x%x", 'x', f_uimm16, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_sr) = f_r2;
- FLD (out_dr) = f_r1;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_or3:
- {
- const IDESC *idesc = &m32rxf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
-#define FLD(f) abuf->fields.sfmt_and3.f
- UINT f_r1;
- UINT f_r2;
- UINT f_uimm16;
-
- f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4);
- f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4);
- f_uimm16 = EXTRACT_MSB0_UINT (insn, 32, 16, 16);
-
- /* Record the fields for the semantic handler. */
- FLD (f_r2) = f_r2;
- FLD (f_uimm16) = f_uimm16;
- FLD (f_r1) = f_r1;
- FLD (i_sr) = & CPU (h_gr)[f_r2];
- FLD (i_dr) = & CPU (h_gr)[f_r1];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_or3", "f_r2 0x%x", 'x', f_r2, "f_uimm16 0x%x", 'x', f_uimm16, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_sr) = f_r2;
- FLD (out_dr) = f_r1;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_addi:
- {
- const IDESC *idesc = &m32rxf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
-#define FLD(f) abuf->fields.sfmt_addi.f
- UINT f_r1;
- INT f_simm8;
-
- f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4);
- f_simm8 = EXTRACT_MSB0_INT (insn, 16, 8, 8);
-
- /* Record the fields for the semantic handler. */
- FLD (f_r1) = f_r1;
- FLD (f_simm8) = f_simm8;
- FLD (i_dr) = & CPU (h_gr)[f_r1];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_addi", "f_r1 0x%x", 'x', f_r1, "f_simm8 0x%x", 'x', f_simm8, "dr 0x%x", 'x', f_r1, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_dr) = f_r1;
- FLD (out_dr) = f_r1;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_addv:
- {
- const IDESC *idesc = &m32rxf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
-#define FLD(f) abuf->fields.sfmt_add.f
- UINT f_r1;
- UINT f_r2;
-
- f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4);
- f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_r1) = f_r1;
- FLD (f_r2) = f_r2;
- FLD (i_dr) = & CPU (h_gr)[f_r1];
- FLD (i_sr) = & CPU (h_gr)[f_r2];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_addv", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_dr) = f_r1;
- FLD (in_sr) = f_r2;
- FLD (out_dr) = f_r1;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_addv3:
- {
- const IDESC *idesc = &m32rxf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
-#define FLD(f) abuf->fields.sfmt_add3.f
- UINT f_r1;
- UINT f_r2;
- INT f_simm16;
-
- f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4);
- f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4);
- f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16);
-
- /* Record the fields for the semantic handler. */
- FLD (f_simm16) = f_simm16;
- FLD (f_r2) = f_r2;
- FLD (f_r1) = f_r1;
- FLD (i_sr) = & CPU (h_gr)[f_r2];
- FLD (i_dr) = & CPU (h_gr)[f_r1];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_addv3", "f_simm16 0x%x", 'x', f_simm16, "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_sr) = f_r2;
- FLD (out_dr) = f_r1;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_addx:
- {
- const IDESC *idesc = &m32rxf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
-#define FLD(f) abuf->fields.sfmt_add.f
- UINT f_r1;
- UINT f_r2;
-
- f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4);
- f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_r1) = f_r1;
- FLD (f_r2) = f_r2;
- FLD (i_dr) = & CPU (h_gr)[f_r1];
- FLD (i_sr) = & CPU (h_gr)[f_r2];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_addx", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_dr) = f_r1;
- FLD (in_sr) = f_r2;
- FLD (out_dr) = f_r1;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_bc8:
- {
- const IDESC *idesc = &m32rxf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
-#define FLD(f) abuf->fields.sfmt_bl8.f
- SI f_disp8;
-
- f_disp8 = ((((EXTRACT_MSB0_INT (insn, 16, 8, 8)) << (2))) + (((pc) & (-4))));
-
- /* Record the fields for the semantic handler. */
- FLD (i_disp8) = f_disp8;
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bc8", "disp8 0x%x", 'x', f_disp8, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_bc24:
- {
- const IDESC *idesc = &m32rxf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
-#define FLD(f) abuf->fields.sfmt_bl24.f
- SI f_disp24;
-
- f_disp24 = ((((EXTRACT_MSB0_INT (insn, 32, 8, 24)) << (2))) + (pc));
-
- /* Record the fields for the semantic handler. */
- FLD (i_disp24) = f_disp24;
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bc24", "disp24 0x%x", 'x', f_disp24, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_beq:
- {
- const IDESC *idesc = &m32rxf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
-#define FLD(f) abuf->fields.sfmt_beq.f
- UINT f_r1;
- UINT f_r2;
- SI f_disp16;
-
- f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4);
- f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4);
- f_disp16 = ((((EXTRACT_MSB0_INT (insn, 32, 16, 16)) << (2))) + (pc));
-
- /* Record the fields for the semantic handler. */
- FLD (f_r1) = f_r1;
- FLD (f_r2) = f_r2;
- FLD (i_disp16) = f_disp16;
- FLD (i_src1) = & CPU (h_gr)[f_r1];
- FLD (i_src2) = & CPU (h_gr)[f_r2];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_beq", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "disp16 0x%x", 'x', f_disp16, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_src1) = f_r1;
- FLD (in_src2) = f_r2;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_beqz:
- {
- const IDESC *idesc = &m32rxf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
-#define FLD(f) abuf->fields.sfmt_beq.f
- UINT f_r2;
- SI f_disp16;
-
- f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4);
- f_disp16 = ((((EXTRACT_MSB0_INT (insn, 32, 16, 16)) << (2))) + (pc));
-
- /* Record the fields for the semantic handler. */
- FLD (f_r2) = f_r2;
- FLD (i_disp16) = f_disp16;
- FLD (i_src2) = & CPU (h_gr)[f_r2];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_beqz", "f_r2 0x%x", 'x', f_r2, "disp16 0x%x", 'x', f_disp16, "src2 0x%x", 'x', f_r2, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_src2) = f_r2;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_bl8:
- {
- const IDESC *idesc = &m32rxf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
-#define FLD(f) abuf->fields.sfmt_bl8.f
- SI f_disp8;
-
- f_disp8 = ((((EXTRACT_MSB0_INT (insn, 16, 8, 8)) << (2))) + (((pc) & (-4))));
-
- /* Record the fields for the semantic handler. */
- FLD (i_disp8) = f_disp8;
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bl8", "disp8 0x%x", 'x', f_disp8, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (out_h_gr_14) = 14;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_bl24:
- {
- const IDESC *idesc = &m32rxf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
-#define FLD(f) abuf->fields.sfmt_bl24.f
- SI f_disp24;
-
- f_disp24 = ((((EXTRACT_MSB0_INT (insn, 32, 8, 24)) << (2))) + (pc));
-
- /* Record the fields for the semantic handler. */
- FLD (i_disp24) = f_disp24;
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bl24", "disp24 0x%x", 'x', f_disp24, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (out_h_gr_14) = 14;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_bcl8:
- {
- const IDESC *idesc = &m32rxf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
-#define FLD(f) abuf->fields.sfmt_bl8.f
- SI f_disp8;
-
- f_disp8 = ((((EXTRACT_MSB0_INT (insn, 16, 8, 8)) << (2))) + (((pc) & (-4))));
-
- /* Record the fields for the semantic handler. */
- FLD (i_disp8) = f_disp8;
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bcl8", "disp8 0x%x", 'x', f_disp8, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (out_h_gr_14) = 14;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_bcl24:
- {
- const IDESC *idesc = &m32rxf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
-#define FLD(f) abuf->fields.sfmt_bl24.f
- SI f_disp24;
-
- f_disp24 = ((((EXTRACT_MSB0_INT (insn, 32, 8, 24)) << (2))) + (pc));
-
- /* Record the fields for the semantic handler. */
- FLD (i_disp24) = f_disp24;
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bcl24", "disp24 0x%x", 'x', f_disp24, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (out_h_gr_14) = 14;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_bra8:
- {
- const IDESC *idesc = &m32rxf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
-#define FLD(f) abuf->fields.sfmt_bl8.f
- SI f_disp8;
-
- f_disp8 = ((((EXTRACT_MSB0_INT (insn, 16, 8, 8)) << (2))) + (((pc) & (-4))));
-
- /* Record the fields for the semantic handler. */
- FLD (i_disp8) = f_disp8;
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bra8", "disp8 0x%x", 'x', f_disp8, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_bra24:
- {
- const IDESC *idesc = &m32rxf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
-#define FLD(f) abuf->fields.sfmt_bl24.f
- SI f_disp24;
-
- f_disp24 = ((((EXTRACT_MSB0_INT (insn, 32, 8, 24)) << (2))) + (pc));
-
- /* Record the fields for the semantic handler. */
- FLD (i_disp24) = f_disp24;
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bra24", "disp24 0x%x", 'x', f_disp24, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_cmp:
- {
- const IDESC *idesc = &m32rxf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
-#define FLD(f) abuf->fields.sfmt_st_plus.f
- UINT f_r1;
- UINT f_r2;
-
- f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4);
- f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_r1) = f_r1;
- FLD (f_r2) = f_r2;
- FLD (i_src1) = & CPU (h_gr)[f_r1];
- FLD (i_src2) = & CPU (h_gr)[f_r2];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_cmp", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_src1) = f_r1;
- FLD (in_src2) = f_r2;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_cmpi:
- {
- const IDESC *idesc = &m32rxf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
-#define FLD(f) abuf->fields.sfmt_st_d.f
- UINT f_r2;
- INT f_simm16;
-
- f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4);
- f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16);
-
- /* Record the fields for the semantic handler. */
- FLD (f_simm16) = f_simm16;
- FLD (f_r2) = f_r2;
- FLD (i_src2) = & CPU (h_gr)[f_r2];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_cmpi", "f_simm16 0x%x", 'x', f_simm16, "f_r2 0x%x", 'x', f_r2, "src2 0x%x", 'x', f_r2, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_src2) = f_r2;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_cmpz:
- {
- const IDESC *idesc = &m32rxf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
-#define FLD(f) abuf->fields.sfmt_st_plus.f
- UINT f_r2;
-
- f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_r2) = f_r2;
- FLD (i_src2) = & CPU (h_gr)[f_r2];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_cmpz", "f_r2 0x%x", 'x', f_r2, "src2 0x%x", 'x', f_r2, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_src2) = f_r2;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_div:
- {
- const IDESC *idesc = &m32rxf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
-#define FLD(f) abuf->fields.sfmt_add.f
- UINT f_r1;
- UINT f_r2;
-
- f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4);
- f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_r1) = f_r1;
- FLD (f_r2) = f_r2;
- FLD (i_dr) = & CPU (h_gr)[f_r1];
- FLD (i_sr) = & CPU (h_gr)[f_r2];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_div", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_dr) = f_r1;
- FLD (in_sr) = f_r2;
- FLD (out_dr) = f_r1;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_jc:
- {
- const IDESC *idesc = &m32rxf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
-#define FLD(f) abuf->fields.sfmt_jl.f
- UINT f_r2;
-
- f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_r2) = f_r2;
- FLD (i_sr) = & CPU (h_gr)[f_r2];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_jc", "f_r2 0x%x", 'x', f_r2, "sr 0x%x", 'x', f_r2, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_sr) = f_r2;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_jl:
- {
- const IDESC *idesc = &m32rxf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
-#define FLD(f) abuf->fields.sfmt_jl.f
- UINT f_r2;
-
- f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_r2) = f_r2;
- FLD (i_sr) = & CPU (h_gr)[f_r2];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_jl", "f_r2 0x%x", 'x', f_r2, "sr 0x%x", 'x', f_r2, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_sr) = f_r2;
- FLD (out_h_gr_14) = 14;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_jmp:
- {
- const IDESC *idesc = &m32rxf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
-#define FLD(f) abuf->fields.sfmt_jl.f
- UINT f_r2;
-
- f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_r2) = f_r2;
- FLD (i_sr) = & CPU (h_gr)[f_r2];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_jmp", "f_r2 0x%x", 'x', f_r2, "sr 0x%x", 'x', f_r2, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_sr) = f_r2;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_ld:
- {
- const IDESC *idesc = &m32rxf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
-#define FLD(f) abuf->fields.sfmt_ld_plus.f
- UINT f_r1;
- UINT f_r2;
-
- f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4);
- f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_r2) = f_r2;
- FLD (f_r1) = f_r1;
- FLD (i_sr) = & CPU (h_gr)[f_r2];
- FLD (i_dr) = & CPU (h_gr)[f_r1];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ld", "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_sr) = f_r2;
- FLD (out_dr) = f_r1;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_ld_d:
- {
- const IDESC *idesc = &m32rxf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
-#define FLD(f) abuf->fields.sfmt_add3.f
- UINT f_r1;
- UINT f_r2;
- INT f_simm16;
-
- f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4);
- f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4);
- f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16);
-
- /* Record the fields for the semantic handler. */
- FLD (f_simm16) = f_simm16;
- FLD (f_r2) = f_r2;
- FLD (f_r1) = f_r1;
- FLD (i_sr) = & CPU (h_gr)[f_r2];
- FLD (i_dr) = & CPU (h_gr)[f_r1];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ld_d", "f_simm16 0x%x", 'x', f_simm16, "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_sr) = f_r2;
- FLD (out_dr) = f_r1;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_ld_plus:
- {
- const IDESC *idesc = &m32rxf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
-#define FLD(f) abuf->fields.sfmt_ld_plus.f
- UINT f_r1;
- UINT f_r2;
-
- f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4);
- f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_r2) = f_r2;
- FLD (f_r1) = f_r1;
- FLD (i_sr) = & CPU (h_gr)[f_r2];
- FLD (i_dr) = & CPU (h_gr)[f_r1];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ld_plus", "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_sr) = f_r2;
- FLD (out_dr) = f_r1;
- FLD (out_sr) = f_r2;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_ld24:
- {
- const IDESC *idesc = &m32rxf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
-#define FLD(f) abuf->fields.sfmt_ld24.f
- UINT f_r1;
- UINT f_uimm24;
-
- f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4);
- f_uimm24 = EXTRACT_MSB0_UINT (insn, 32, 8, 24);
-
- /* Record the fields for the semantic handler. */
- FLD (f_r1) = f_r1;
- FLD (i_uimm24) = f_uimm24;
- FLD (i_dr) = & CPU (h_gr)[f_r1];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ld24", "f_r1 0x%x", 'x', f_r1, "uimm24 0x%x", 'x', f_uimm24, "dr 0x%x", 'x', f_r1, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (out_dr) = f_r1;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_ldi8:
- {
- const IDESC *idesc = &m32rxf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
-#define FLD(f) abuf->fields.sfmt_addi.f
- UINT f_r1;
- INT f_simm8;
-
- f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4);
- f_simm8 = EXTRACT_MSB0_INT (insn, 16, 8, 8);
-
- /* Record the fields for the semantic handler. */
- FLD (f_simm8) = f_simm8;
- FLD (f_r1) = f_r1;
- FLD (i_dr) = & CPU (h_gr)[f_r1];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldi8", "f_simm8 0x%x", 'x', f_simm8, "f_r1 0x%x", 'x', f_r1, "dr 0x%x", 'x', f_r1, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (out_dr) = f_r1;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_ldi16:
- {
- const IDESC *idesc = &m32rxf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
-#define FLD(f) abuf->fields.sfmt_add3.f
- UINT f_r1;
- INT f_simm16;
-
- f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4);
- f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16);
-
- /* Record the fields for the semantic handler. */
- FLD (f_simm16) = f_simm16;
- FLD (f_r1) = f_r1;
- FLD (i_dr) = & CPU (h_gr)[f_r1];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldi16", "f_simm16 0x%x", 'x', f_simm16, "f_r1 0x%x", 'x', f_r1, "dr 0x%x", 'x', f_r1, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (out_dr) = f_r1;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_lock:
- {
- const IDESC *idesc = &m32rxf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
-#define FLD(f) abuf->fields.sfmt_ld_plus.f
- UINT f_r1;
- UINT f_r2;
-
- f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4);
- f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_r2) = f_r2;
- FLD (f_r1) = f_r1;
- FLD (i_sr) = & CPU (h_gr)[f_r2];
- FLD (i_dr) = & CPU (h_gr)[f_r1];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_lock", "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_sr) = f_r2;
- FLD (out_dr) = f_r1;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_machi_a:
- {
- const IDESC *idesc = &m32rxf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
-#define FLD(f) abuf->fields.sfmt_machi_a.f
- UINT f_r1;
- UINT f_acc;
- UINT f_r2;
-
- f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4);
- f_acc = EXTRACT_MSB0_UINT (insn, 16, 8, 1);
- f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_acc) = f_acc;
- FLD (f_r1) = f_r1;
- FLD (f_r2) = f_r2;
- FLD (i_src1) = & CPU (h_gr)[f_r1];
- FLD (i_src2) = & CPU (h_gr)[f_r2];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_machi_a", "f_acc 0x%x", 'x', f_acc, "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_src1) = f_r1;
- FLD (in_src2) = f_r2;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_mulhi_a:
- {
- const IDESC *idesc = &m32rxf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
-#define FLD(f) abuf->fields.sfmt_machi_a.f
- UINT f_r1;
- UINT f_acc;
- UINT f_r2;
-
- f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4);
- f_acc = EXTRACT_MSB0_UINT (insn, 16, 8, 1);
- f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_r1) = f_r1;
- FLD (f_r2) = f_r2;
- FLD (f_acc) = f_acc;
- FLD (i_src1) = & CPU (h_gr)[f_r1];
- FLD (i_src2) = & CPU (h_gr)[f_r2];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mulhi_a", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "f_acc 0x%x", 'x', f_acc, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_src1) = f_r1;
- FLD (in_src2) = f_r2;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_mv:
- {
- const IDESC *idesc = &m32rxf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
-#define FLD(f) abuf->fields.sfmt_ld_plus.f
- UINT f_r1;
- UINT f_r2;
-
- f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4);
- f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_r2) = f_r2;
- FLD (f_r1) = f_r1;
- FLD (i_sr) = & CPU (h_gr)[f_r2];
- FLD (i_dr) = & CPU (h_gr)[f_r1];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mv", "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_sr) = f_r2;
- FLD (out_dr) = f_r1;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_mvfachi_a:
- {
- const IDESC *idesc = &m32rxf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
-#define FLD(f) abuf->fields.sfmt_mvfachi_a.f
- UINT f_r1;
- UINT f_accs;
-
- f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4);
- f_accs = EXTRACT_MSB0_UINT (insn, 16, 12, 2);
-
- /* Record the fields for the semantic handler. */
- FLD (f_accs) = f_accs;
- FLD (f_r1) = f_r1;
- FLD (i_dr) = & CPU (h_gr)[f_r1];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mvfachi_a", "f_accs 0x%x", 'x', f_accs, "f_r1 0x%x", 'x', f_r1, "dr 0x%x", 'x', f_r1, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (out_dr) = f_r1;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_mvfc:
- {
- const IDESC *idesc = &m32rxf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
-#define FLD(f) abuf->fields.sfmt_ld_plus.f
- UINT f_r1;
- UINT f_r2;
-
- f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4);
- f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_r2) = f_r2;
- FLD (f_r1) = f_r1;
- FLD (i_dr) = & CPU (h_gr)[f_r1];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mvfc", "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "dr 0x%x", 'x', f_r1, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (out_dr) = f_r1;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_mvtachi_a:
- {
- const IDESC *idesc = &m32rxf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
-#define FLD(f) abuf->fields.sfmt_mvtachi_a.f
- UINT f_r1;
- UINT f_accs;
-
- f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4);
- f_accs = EXTRACT_MSB0_UINT (insn, 16, 12, 2);
-
- /* Record the fields for the semantic handler. */
- FLD (f_accs) = f_accs;
- FLD (f_r1) = f_r1;
- FLD (i_src1) = & CPU (h_gr)[f_r1];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mvtachi_a", "f_accs 0x%x", 'x', f_accs, "f_r1 0x%x", 'x', f_r1, "src1 0x%x", 'x', f_r1, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_src1) = f_r1;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_mvtc:
- {
- const IDESC *idesc = &m32rxf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
-#define FLD(f) abuf->fields.sfmt_ld_plus.f
- UINT f_r1;
- UINT f_r2;
-
- f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4);
- f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_r2) = f_r2;
- FLD (f_r1) = f_r1;
- FLD (i_sr) = & CPU (h_gr)[f_r2];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mvtc", "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_sr) = f_r2;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_nop:
- {
- const IDESC *idesc = &m32rxf_insn_data[itype];
-#define FLD(f) abuf->fields.fmt_empty.f
-
-
- /* Record the fields for the semantic handler. */
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_nop", (char *) 0));
-
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_rac_dsi:
- {
- const IDESC *idesc = &m32rxf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
-#define FLD(f) abuf->fields.sfmt_rac_dsi.f
- UINT f_accd;
- UINT f_accs;
- SI f_imm1;
-
- f_accd = EXTRACT_MSB0_UINT (insn, 16, 4, 2);
- f_accs = EXTRACT_MSB0_UINT (insn, 16, 12, 2);
- f_imm1 = ((EXTRACT_MSB0_UINT (insn, 16, 15, 1)) + (1));
-
- /* Record the fields for the semantic handler. */
- FLD (f_accs) = f_accs;
- FLD (f_imm1) = f_imm1;
- FLD (f_accd) = f_accd;
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_rac_dsi", "f_accs 0x%x", 'x', f_accs, "f_imm1 0x%x", 'x', f_imm1, "f_accd 0x%x", 'x', f_accd, (char *) 0));
-
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_rte:
- {
- const IDESC *idesc = &m32rxf_insn_data[itype];
-#define FLD(f) abuf->fields.fmt_empty.f
-
-
- /* Record the fields for the semantic handler. */
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_rte", (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_seth:
- {
- const IDESC *idesc = &m32rxf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
-#define FLD(f) abuf->fields.sfmt_seth.f
- UINT f_r1;
- UINT f_hi16;
-
- f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4);
- f_hi16 = EXTRACT_MSB0_UINT (insn, 32, 16, 16);
-
- /* Record the fields for the semantic handler. */
- FLD (f_hi16) = f_hi16;
- FLD (f_r1) = f_r1;
- FLD (i_dr) = & CPU (h_gr)[f_r1];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_seth", "f_hi16 0x%x", 'x', f_hi16, "f_r1 0x%x", 'x', f_r1, "dr 0x%x", 'x', f_r1, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (out_dr) = f_r1;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_sll3:
- {
- const IDESC *idesc = &m32rxf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
-#define FLD(f) abuf->fields.sfmt_add3.f
- UINT f_r1;
- UINT f_r2;
- INT f_simm16;
-
- f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4);
- f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4);
- f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16);
-
- /* Record the fields for the semantic handler. */
- FLD (f_simm16) = f_simm16;
- FLD (f_r2) = f_r2;
- FLD (f_r1) = f_r1;
- FLD (i_sr) = & CPU (h_gr)[f_r2];
- FLD (i_dr) = & CPU (h_gr)[f_r1];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_sll3", "f_simm16 0x%x", 'x', f_simm16, "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_sr) = f_r2;
- FLD (out_dr) = f_r1;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_slli:
- {
- const IDESC *idesc = &m32rxf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
-#define FLD(f) abuf->fields.sfmt_slli.f
- UINT f_r1;
- UINT f_uimm5;
-
- f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4);
- f_uimm5 = EXTRACT_MSB0_UINT (insn, 16, 11, 5);
-
- /* Record the fields for the semantic handler. */
- FLD (f_r1) = f_r1;
- FLD (f_uimm5) = f_uimm5;
- FLD (i_dr) = & CPU (h_gr)[f_r1];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_slli", "f_r1 0x%x", 'x', f_r1, "f_uimm5 0x%x", 'x', f_uimm5, "dr 0x%x", 'x', f_r1, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_dr) = f_r1;
- FLD (out_dr) = f_r1;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_st:
- {
- const IDESC *idesc = &m32rxf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
-#define FLD(f) abuf->fields.sfmt_st_plus.f
- UINT f_r1;
- UINT f_r2;
-
- f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4);
- f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_r1) = f_r1;
- FLD (f_r2) = f_r2;
- FLD (i_src1) = & CPU (h_gr)[f_r1];
- FLD (i_src2) = & CPU (h_gr)[f_r2];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_st", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_src1) = f_r1;
- FLD (in_src2) = f_r2;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_st_d:
- {
- const IDESC *idesc = &m32rxf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
-#define FLD(f) abuf->fields.sfmt_st_d.f
- UINT f_r1;
- UINT f_r2;
- INT f_simm16;
-
- f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4);
- f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4);
- f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16);
-
- /* Record the fields for the semantic handler. */
- FLD (f_simm16) = f_simm16;
- FLD (f_r1) = f_r1;
- FLD (f_r2) = f_r2;
- FLD (i_src1) = & CPU (h_gr)[f_r1];
- FLD (i_src2) = & CPU (h_gr)[f_r2];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_st_d", "f_simm16 0x%x", 'x', f_simm16, "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_src1) = f_r1;
- FLD (in_src2) = f_r2;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_stb:
- {
- const IDESC *idesc = &m32rxf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
-#define FLD(f) abuf->fields.sfmt_st_plus.f
- UINT f_r1;
- UINT f_r2;
-
- f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4);
- f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_r1) = f_r1;
- FLD (f_r2) = f_r2;
- FLD (i_src1) = & CPU (h_gr)[f_r1];
- FLD (i_src2) = & CPU (h_gr)[f_r2];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stb", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_src1) = f_r1;
- FLD (in_src2) = f_r2;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_stb_d:
- {
- const IDESC *idesc = &m32rxf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
-#define FLD(f) abuf->fields.sfmt_st_d.f
- UINT f_r1;
- UINT f_r2;
- INT f_simm16;
-
- f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4);
- f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4);
- f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16);
-
- /* Record the fields for the semantic handler. */
- FLD (f_simm16) = f_simm16;
- FLD (f_r1) = f_r1;
- FLD (f_r2) = f_r2;
- FLD (i_src1) = & CPU (h_gr)[f_r1];
- FLD (i_src2) = & CPU (h_gr)[f_r2];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stb_d", "f_simm16 0x%x", 'x', f_simm16, "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_src1) = f_r1;
- FLD (in_src2) = f_r2;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_sth:
- {
- const IDESC *idesc = &m32rxf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
-#define FLD(f) abuf->fields.sfmt_st_plus.f
- UINT f_r1;
- UINT f_r2;
-
- f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4);
- f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_r1) = f_r1;
- FLD (f_r2) = f_r2;
- FLD (i_src1) = & CPU (h_gr)[f_r1];
- FLD (i_src2) = & CPU (h_gr)[f_r2];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_sth", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_src1) = f_r1;
- FLD (in_src2) = f_r2;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_sth_d:
- {
- const IDESC *idesc = &m32rxf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
-#define FLD(f) abuf->fields.sfmt_st_d.f
- UINT f_r1;
- UINT f_r2;
- INT f_simm16;
-
- f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4);
- f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4);
- f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16);
-
- /* Record the fields for the semantic handler. */
- FLD (f_simm16) = f_simm16;
- FLD (f_r1) = f_r1;
- FLD (f_r2) = f_r2;
- FLD (i_src1) = & CPU (h_gr)[f_r1];
- FLD (i_src2) = & CPU (h_gr)[f_r2];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_sth_d", "f_simm16 0x%x", 'x', f_simm16, "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_src1) = f_r1;
- FLD (in_src2) = f_r2;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_st_plus:
- {
- const IDESC *idesc = &m32rxf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
-#define FLD(f) abuf->fields.sfmt_st_plus.f
- UINT f_r1;
- UINT f_r2;
-
- f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4);
- f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_r1) = f_r1;
- FLD (f_r2) = f_r2;
- FLD (i_src1) = & CPU (h_gr)[f_r1];
- FLD (i_src2) = & CPU (h_gr)[f_r2];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_st_plus", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_src1) = f_r1;
- FLD (in_src2) = f_r2;
- FLD (out_src2) = f_r2;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_trap:
- {
- const IDESC *idesc = &m32rxf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
-#define FLD(f) abuf->fields.sfmt_trap.f
- UINT f_uimm4;
-
- f_uimm4 = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_uimm4) = f_uimm4;
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_trap", "f_uimm4 0x%x", 'x', f_uimm4, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_unlock:
- {
- const IDESC *idesc = &m32rxf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
-#define FLD(f) abuf->fields.sfmt_st_plus.f
- UINT f_r1;
- UINT f_r2;
-
- f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4);
- f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_r1) = f_r1;
- FLD (f_r2) = f_r2;
- FLD (i_src1) = & CPU (h_gr)[f_r1];
- FLD (i_src2) = & CPU (h_gr)[f_r2];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_unlock", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_src1) = f_r1;
- FLD (in_src2) = f_r2;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_satb:
- {
- const IDESC *idesc = &m32rxf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
-#define FLD(f) abuf->fields.sfmt_ld_plus.f
- UINT f_r1;
- UINT f_r2;
-
- f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4);
- f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_r2) = f_r2;
- FLD (f_r1) = f_r1;
- FLD (i_sr) = & CPU (h_gr)[f_r2];
- FLD (i_dr) = & CPU (h_gr)[f_r1];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_satb", "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_sr) = f_r2;
- FLD (out_dr) = f_r1;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_sat:
- {
- const IDESC *idesc = &m32rxf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
-#define FLD(f) abuf->fields.sfmt_ld_plus.f
- UINT f_r1;
- UINT f_r2;
-
- f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4);
- f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_r2) = f_r2;
- FLD (f_r1) = f_r1;
- FLD (i_sr) = & CPU (h_gr)[f_r2];
- FLD (i_dr) = & CPU (h_gr)[f_r1];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_sat", "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_sr) = f_r2;
- FLD (out_dr) = f_r1;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_sadd:
- {
- const IDESC *idesc = &m32rxf_insn_data[itype];
-#define FLD(f) abuf->fields.fmt_empty.f
-
-
- /* Record the fields for the semantic handler. */
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_sadd", (char *) 0));
-
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_macwu1:
- {
- const IDESC *idesc = &m32rxf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
-#define FLD(f) abuf->fields.sfmt_st_plus.f
- UINT f_r1;
- UINT f_r2;
-
- f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4);
- f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_r1) = f_r1;
- FLD (f_r2) = f_r2;
- FLD (i_src1) = & CPU (h_gr)[f_r1];
- FLD (i_src2) = & CPU (h_gr)[f_r2];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_macwu1", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_src1) = f_r1;
- FLD (in_src2) = f_r2;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_msblo:
- {
- const IDESC *idesc = &m32rxf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
-#define FLD(f) abuf->fields.sfmt_st_plus.f
- UINT f_r1;
- UINT f_r2;
-
- f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4);
- f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_r1) = f_r1;
- FLD (f_r2) = f_r2;
- FLD (i_src1) = & CPU (h_gr)[f_r1];
- FLD (i_src2) = & CPU (h_gr)[f_r2];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_msblo", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_src1) = f_r1;
- FLD (in_src2) = f_r2;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_mulwu1:
- {
- const IDESC *idesc = &m32rxf_insn_data[itype];
- CGEN_INSN_INT insn = entire_insn;
-#define FLD(f) abuf->fields.sfmt_st_plus.f
- UINT f_r1;
- UINT f_r2;
-
- f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4);
- f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4);
-
- /* Record the fields for the semantic handler. */
- FLD (f_r1) = f_r1;
- FLD (f_r2) = f_r2;
- FLD (i_src1) = & CPU (h_gr)[f_r1];
- FLD (i_src2) = & CPU (h_gr)[f_r2];
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mulwu1", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0));
-
-#if WITH_PROFILE_MODEL_P
- /* Record the fields for profiling. */
- if (PROFILE_MODEL_P (current_cpu))
- {
- FLD (in_src1) = f_r1;
- FLD (in_src2) = f_r2;
- }
-#endif
-#undef FLD
- return idesc;
- }
-
- extract_sfmt_sc:
- {
- const IDESC *idesc = &m32rxf_insn_data[itype];
-#define FLD(f) abuf->fields.fmt_empty.f
-
-
- /* Record the fields for the semantic handler. */
- TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_sc", (char *) 0));
-
-#undef FLD
- return idesc;
- }
-
-}
diff --git a/sim/m32r/decodex.h b/sim/m32r/decodex.h
deleted file mode 100644
index 5415e77d8f3..00000000000
--- a/sim/m32r/decodex.h
+++ /dev/null
@@ -1,143 +0,0 @@
-/* Decode header for m32rxf.
-
-THIS FILE IS MACHINE GENERATED WITH CGEN.
-
-Copyright (C) 1996, 1997, 1998, 1999, 2000 Free Software Foundation, Inc.
-
-This file is part of the GNU Simulators.
-
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License along
-with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
-*/
-
-#ifndef M32RXF_DECODE_H
-#define M32RXF_DECODE_H
-
-extern const IDESC *m32rxf_decode (SIM_CPU *, IADDR,
- CGEN_INSN_INT, CGEN_INSN_INT,
- ARGBUF *);
-extern void m32rxf_init_idesc_table (SIM_CPU *);
-extern void m32rxf_sem_init_idesc_table (SIM_CPU *);
-extern void m32rxf_semf_init_idesc_table (SIM_CPU *);
-
-/* Enum declaration for instructions in cpu family m32rxf. */
-typedef enum m32rxf_insn_type {
- M32RXF_INSN_X_INVALID, M32RXF_INSN_X_AFTER, M32RXF_INSN_X_BEFORE, M32RXF_INSN_X_CTI_CHAIN
- , M32RXF_INSN_X_CHAIN, M32RXF_INSN_X_BEGIN, M32RXF_INSN_ADD, M32RXF_INSN_ADD3
- , M32RXF_INSN_AND, M32RXF_INSN_AND3, M32RXF_INSN_OR, M32RXF_INSN_OR3
- , M32RXF_INSN_XOR, M32RXF_INSN_XOR3, M32RXF_INSN_ADDI, M32RXF_INSN_ADDV
- , M32RXF_INSN_ADDV3, M32RXF_INSN_ADDX, M32RXF_INSN_BC8, M32RXF_INSN_BC24
- , M32RXF_INSN_BEQ, M32RXF_INSN_BEQZ, M32RXF_INSN_BGEZ, M32RXF_INSN_BGTZ
- , M32RXF_INSN_BLEZ, M32RXF_INSN_BLTZ, M32RXF_INSN_BNEZ, M32RXF_INSN_BL8
- , M32RXF_INSN_BL24, M32RXF_INSN_BCL8, M32RXF_INSN_BCL24, M32RXF_INSN_BNC8
- , M32RXF_INSN_BNC24, M32RXF_INSN_BNE, M32RXF_INSN_BRA8, M32RXF_INSN_BRA24
- , M32RXF_INSN_BNCL8, M32RXF_INSN_BNCL24, M32RXF_INSN_CMP, M32RXF_INSN_CMPI
- , M32RXF_INSN_CMPU, M32RXF_INSN_CMPUI, M32RXF_INSN_CMPEQ, M32RXF_INSN_CMPZ
- , M32RXF_INSN_DIV, M32RXF_INSN_DIVU, M32RXF_INSN_REM, M32RXF_INSN_REMU
- , M32RXF_INSN_DIVH, M32RXF_INSN_JC, M32RXF_INSN_JNC, M32RXF_INSN_JL
- , M32RXF_INSN_JMP, M32RXF_INSN_LD, M32RXF_INSN_LD_D, M32RXF_INSN_LDB
- , M32RXF_INSN_LDB_D, M32RXF_INSN_LDH, M32RXF_INSN_LDH_D, M32RXF_INSN_LDUB
- , M32RXF_INSN_LDUB_D, M32RXF_INSN_LDUH, M32RXF_INSN_LDUH_D, M32RXF_INSN_LD_PLUS
- , M32RXF_INSN_LD24, M32RXF_INSN_LDI8, M32RXF_INSN_LDI16, M32RXF_INSN_LOCK
- , M32RXF_INSN_MACHI_A, M32RXF_INSN_MACLO_A, M32RXF_INSN_MACWHI_A, M32RXF_INSN_MACWLO_A
- , M32RXF_INSN_MUL, M32RXF_INSN_MULHI_A, M32RXF_INSN_MULLO_A, M32RXF_INSN_MULWHI_A
- , M32RXF_INSN_MULWLO_A, M32RXF_INSN_MV, M32RXF_INSN_MVFACHI_A, M32RXF_INSN_MVFACLO_A
- , M32RXF_INSN_MVFACMI_A, M32RXF_INSN_MVFC, M32RXF_INSN_MVTACHI_A, M32RXF_INSN_MVTACLO_A
- , M32RXF_INSN_MVTC, M32RXF_INSN_NEG, M32RXF_INSN_NOP, M32RXF_INSN_NOT
- , M32RXF_INSN_RAC_DSI, M32RXF_INSN_RACH_DSI, M32RXF_INSN_RTE, M32RXF_INSN_SETH
- , M32RXF_INSN_SLL, M32RXF_INSN_SLL3, M32RXF_INSN_SLLI, M32RXF_INSN_SRA
- , M32RXF_INSN_SRA3, M32RXF_INSN_SRAI, M32RXF_INSN_SRL, M32RXF_INSN_SRL3
- , M32RXF_INSN_SRLI, M32RXF_INSN_ST, M32RXF_INSN_ST_D, M32RXF_INSN_STB
- , M32RXF_INSN_STB_D, M32RXF_INSN_STH, M32RXF_INSN_STH_D, M32RXF_INSN_ST_PLUS
- , M32RXF_INSN_ST_MINUS, M32RXF_INSN_SUB, M32RXF_INSN_SUBV, M32RXF_INSN_SUBX
- , M32RXF_INSN_TRAP, M32RXF_INSN_UNLOCK, M32RXF_INSN_SATB, M32RXF_INSN_SATH
- , M32RXF_INSN_SAT, M32RXF_INSN_PCMPBZ, M32RXF_INSN_SADD, M32RXF_INSN_MACWU1
- , M32RXF_INSN_MSBLO, M32RXF_INSN_MULWU1, M32RXF_INSN_MACLH1, M32RXF_INSN_SC
- , M32RXF_INSN_SNC, M32RXF_INSN_PAR_ADD, M32RXF_INSN_WRITE_ADD, M32RXF_INSN_PAR_AND
- , M32RXF_INSN_WRITE_AND, M32RXF_INSN_PAR_OR, M32RXF_INSN_WRITE_OR, M32RXF_INSN_PAR_XOR
- , M32RXF_INSN_WRITE_XOR, M32RXF_INSN_PAR_ADDI, M32RXF_INSN_WRITE_ADDI, M32RXF_INSN_PAR_ADDV
- , M32RXF_INSN_WRITE_ADDV, M32RXF_INSN_PAR_ADDX, M32RXF_INSN_WRITE_ADDX, M32RXF_INSN_PAR_BC8
- , M32RXF_INSN_WRITE_BC8, M32RXF_INSN_PAR_BL8, M32RXF_INSN_WRITE_BL8, M32RXF_INSN_PAR_BCL8
- , M32RXF_INSN_WRITE_BCL8, M32RXF_INSN_PAR_BNC8, M32RXF_INSN_WRITE_BNC8, M32RXF_INSN_PAR_BRA8
- , M32RXF_INSN_WRITE_BRA8, M32RXF_INSN_PAR_BNCL8, M32RXF_INSN_WRITE_BNCL8, M32RXF_INSN_PAR_CMP
- , M32RXF_INSN_WRITE_CMP, M32RXF_INSN_PAR_CMPU, M32RXF_INSN_WRITE_CMPU, M32RXF_INSN_PAR_CMPEQ
- , M32RXF_INSN_WRITE_CMPEQ, M32RXF_INSN_PAR_CMPZ, M32RXF_INSN_WRITE_CMPZ, M32RXF_INSN_PAR_JC
- , M32RXF_INSN_WRITE_JC, M32RXF_INSN_PAR_JNC, M32RXF_INSN_WRITE_JNC, M32RXF_INSN_PAR_JL
- , M32RXF_INSN_WRITE_JL, M32RXF_INSN_PAR_JMP, M32RXF_INSN_WRITE_JMP, M32RXF_INSN_PAR_LD
- , M32RXF_INSN_WRITE_LD, M32RXF_INSN_PAR_LDB, M32RXF_INSN_WRITE_LDB, M32RXF_INSN_PAR_LDH
- , M32RXF_INSN_WRITE_LDH, M32RXF_INSN_PAR_LDUB, M32RXF_INSN_WRITE_LDUB, M32RXF_INSN_PAR_LDUH
- , M32RXF_INSN_WRITE_LDUH, M32RXF_INSN_PAR_LD_PLUS, M32RXF_INSN_WRITE_LD_PLUS, M32RXF_INSN_PAR_LDI8
- , M32RXF_INSN_WRITE_LDI8, M32RXF_INSN_PAR_LOCK, M32RXF_INSN_WRITE_LOCK, M32RXF_INSN_PAR_MACHI_A
- , M32RXF_INSN_WRITE_MACHI_A, M32RXF_INSN_PAR_MACLO_A, M32RXF_INSN_WRITE_MACLO_A, M32RXF_INSN_PAR_MACWHI_A
- , M32RXF_INSN_WRITE_MACWHI_A, M32RXF_INSN_PAR_MACWLO_A, M32RXF_INSN_WRITE_MACWLO_A, M32RXF_INSN_PAR_MUL
- , M32RXF_INSN_WRITE_MUL, M32RXF_INSN_PAR_MULHI_A, M32RXF_INSN_WRITE_MULHI_A, M32RXF_INSN_PAR_MULLO_A
- , M32RXF_INSN_WRITE_MULLO_A, M32RXF_INSN_PAR_MULWHI_A, M32RXF_INSN_WRITE_MULWHI_A, M32RXF_INSN_PAR_MULWLO_A
- , M32RXF_INSN_WRITE_MULWLO_A, M32RXF_INSN_PAR_MV, M32RXF_INSN_WRITE_MV, M32RXF_INSN_PAR_MVFACHI_A
- , M32RXF_INSN_WRITE_MVFACHI_A, M32RXF_INSN_PAR_MVFACLO_A, M32RXF_INSN_WRITE_MVFACLO_A, M32RXF_INSN_PAR_MVFACMI_A
- , M32RXF_INSN_WRITE_MVFACMI_A, M32RXF_INSN_PAR_MVFC, M32RXF_INSN_WRITE_MVFC, M32RXF_INSN_PAR_MVTACHI_A
- , M32RXF_INSN_WRITE_MVTACHI_A, M32RXF_INSN_PAR_MVTACLO_A, M32RXF_INSN_WRITE_MVTACLO_A, M32RXF_INSN_PAR_MVTC
- , M32RXF_INSN_WRITE_MVTC, M32RXF_INSN_PAR_NEG, M32RXF_INSN_WRITE_NEG, M32RXF_INSN_PAR_NOP
- , M32RXF_INSN_WRITE_NOP, M32RXF_INSN_PAR_NOT, M32RXF_INSN_WRITE_NOT, M32RXF_INSN_PAR_RAC_DSI
- , M32RXF_INSN_WRITE_RAC_DSI, M32RXF_INSN_PAR_RACH_DSI, M32RXF_INSN_WRITE_RACH_DSI, M32RXF_INSN_PAR_RTE
- , M32RXF_INSN_WRITE_RTE, M32RXF_INSN_PAR_SLL, M32RXF_INSN_WRITE_SLL, M32RXF_INSN_PAR_SLLI
- , M32RXF_INSN_WRITE_SLLI, M32RXF_INSN_PAR_SRA, M32RXF_INSN_WRITE_SRA, M32RXF_INSN_PAR_SRAI
- , M32RXF_INSN_WRITE_SRAI, M32RXF_INSN_PAR_SRL, M32RXF_INSN_WRITE_SRL, M32RXF_INSN_PAR_SRLI
- , M32RXF_INSN_WRITE_SRLI, M32RXF_INSN_PAR_ST, M32RXF_INSN_WRITE_ST, M32RXF_INSN_PAR_STB
- , M32RXF_INSN_WRITE_STB, M32RXF_INSN_PAR_STH, M32RXF_INSN_WRITE_STH, M32RXF_INSN_PAR_ST_PLUS
- , M32RXF_INSN_WRITE_ST_PLUS, M32RXF_INSN_PAR_ST_MINUS, M32RXF_INSN_WRITE_ST_MINUS, M32RXF_INSN_PAR_SUB
- , M32RXF_INSN_WRITE_SUB, M32RXF_INSN_PAR_SUBV, M32RXF_INSN_WRITE_SUBV, M32RXF_INSN_PAR_SUBX
- , M32RXF_INSN_WRITE_SUBX, M32RXF_INSN_PAR_TRAP, M32RXF_INSN_WRITE_TRAP, M32RXF_INSN_PAR_UNLOCK
- , M32RXF_INSN_WRITE_UNLOCK, M32RXF_INSN_PAR_PCMPBZ, M32RXF_INSN_WRITE_PCMPBZ, M32RXF_INSN_PAR_SADD
- , M32RXF_INSN_WRITE_SADD, M32RXF_INSN_PAR_MACWU1, M32RXF_INSN_WRITE_MACWU1, M32RXF_INSN_PAR_MSBLO
- , M32RXF_INSN_WRITE_MSBLO, M32RXF_INSN_PAR_MULWU1, M32RXF_INSN_WRITE_MULWU1, M32RXF_INSN_PAR_MACLH1
- , M32RXF_INSN_WRITE_MACLH1, M32RXF_INSN_PAR_SC, M32RXF_INSN_WRITE_SC, M32RXF_INSN_PAR_SNC
- , M32RXF_INSN_WRITE_SNC, M32RXF_INSN_MAX
-} M32RXF_INSN_TYPE;
-
-/* Enum declaration for semantic formats in cpu family m32rxf. */
-typedef enum m32rxf_sfmt_type {
- M32RXF_SFMT_EMPTY, M32RXF_SFMT_ADD, M32RXF_SFMT_ADD3, M32RXF_SFMT_AND3
- , M32RXF_SFMT_OR3, M32RXF_SFMT_ADDI, M32RXF_SFMT_ADDV, M32RXF_SFMT_ADDV3
- , M32RXF_SFMT_ADDX, M32RXF_SFMT_BC8, M32RXF_SFMT_BC24, M32RXF_SFMT_BEQ
- , M32RXF_SFMT_BEQZ, M32RXF_SFMT_BL8, M32RXF_SFMT_BL24, M32RXF_SFMT_BCL8
- , M32RXF_SFMT_BCL24, M32RXF_SFMT_BRA8, M32RXF_SFMT_BRA24, M32RXF_SFMT_CMP
- , M32RXF_SFMT_CMPI, M32RXF_SFMT_CMPZ, M32RXF_SFMT_DIV, M32RXF_SFMT_JC
- , M32RXF_SFMT_JL, M32RXF_SFMT_JMP, M32RXF_SFMT_LD, M32RXF_SFMT_LD_D
- , M32RXF_SFMT_LD_PLUS, M32RXF_SFMT_LD24, M32RXF_SFMT_LDI8, M32RXF_SFMT_LDI16
- , M32RXF_SFMT_LOCK, M32RXF_SFMT_MACHI_A, M32RXF_SFMT_MULHI_A, M32RXF_SFMT_MV
- , M32RXF_SFMT_MVFACHI_A, M32RXF_SFMT_MVFC, M32RXF_SFMT_MVTACHI_A, M32RXF_SFMT_MVTC
- , M32RXF_SFMT_NOP, M32RXF_SFMT_RAC_DSI, M32RXF_SFMT_RTE, M32RXF_SFMT_SETH
- , M32RXF_SFMT_SLL3, M32RXF_SFMT_SLLI, M32RXF_SFMT_ST, M32RXF_SFMT_ST_D
- , M32RXF_SFMT_STB, M32RXF_SFMT_STB_D, M32RXF_SFMT_STH, M32RXF_SFMT_STH_D
- , M32RXF_SFMT_ST_PLUS, M32RXF_SFMT_TRAP, M32RXF_SFMT_UNLOCK, M32RXF_SFMT_SATB
- , M32RXF_SFMT_SAT, M32RXF_SFMT_SADD, M32RXF_SFMT_MACWU1, M32RXF_SFMT_MSBLO
- , M32RXF_SFMT_MULWU1, M32RXF_SFMT_SC
-} M32RXF_SFMT_TYPE;
-
-/* Function unit handlers (user written). */
-
-extern int m32rxf_model_m32rx_u_store (SIM_CPU *, const IDESC *, int /*unit_num*/, int /*referenced*/, INT /*src1*/, INT /*src2*/);
-extern int m32rxf_model_m32rx_u_load (SIM_CPU *, const IDESC *, int /*unit_num*/, int /*referenced*/, INT /*sr*/, INT /*dr*/);
-extern int m32rxf_model_m32rx_u_cti (SIM_CPU *, const IDESC *, int /*unit_num*/, int /*referenced*/, INT /*sr*/);
-extern int m32rxf_model_m32rx_u_mac (SIM_CPU *, const IDESC *, int /*unit_num*/, int /*referenced*/, INT /*src1*/, INT /*src2*/);
-extern int m32rxf_model_m32rx_u_cmp (SIM_CPU *, const IDESC *, int /*unit_num*/, int /*referenced*/, INT /*src1*/, INT /*src2*/);
-extern int m32rxf_model_m32rx_u_exec (SIM_CPU *, const IDESC *, int /*unit_num*/, int /*referenced*/, INT /*sr*/, INT /*dr*/, INT /*dr*/);
-
-/* Profiling before/after handlers (user written) */
-
-extern void m32rxf_model_insn_before (SIM_CPU *, int /*first_p*/);
-extern void m32rxf_model_insn_after (SIM_CPU *, int /*last_p*/, int /*cycles*/);
-
-#endif /* M32RXF_DECODE_H */
diff --git a/sim/m32r/devices.c b/sim/m32r/devices.c
deleted file mode 100644
index 032c8e71146..00000000000
--- a/sim/m32r/devices.c
+++ /dev/null
@@ -1,107 +0,0 @@
-/* m32r device support
- Copyright (C) 1997, 1998 Free Software Foundation, Inc.
- Contributed by Cygnus Solutions.
-
-This file is part of GDB, the GNU debugger.
-
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License along
-with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
-
-#include "sim-main.h"
-
-#ifdef HAVE_DV_SOCKSER
-#include "dv-sockser.h"
-#endif
-
-/* Handling the MSPR register is done by creating a device in the core
- mapping that winds up here. */
-
-device m32r_devices;
-
-int
-device_io_read_buffer (device *me, void *source, int space,
- address_word addr, unsigned nr_bytes,
- SIM_DESC sd, SIM_CPU *cpu, sim_cia cia)
-{
- if (STATE_ENVIRONMENT (sd) != OPERATING_ENVIRONMENT)
- return nr_bytes;
-
-#ifdef HAVE_DV_SOCKSER
- if (addr == UART_INCHAR_ADDR)
- {
- int c = dv_sockser_read (sd);
- if (c == -1)
- return 0;
- *(char *) source = c;
- return 1;
- }
- if (addr == UART_STATUS_ADDR)
- {
- int status = dv_sockser_status (sd);
- unsigned char *p = source;
- p[0] = 0;
- p[1] = (((status & DV_SOCKSER_INPUT_EMPTY)
-#ifdef UART_INPUT_READY0
- ? UART_INPUT_READY : 0)
-#else
- ? 0 : UART_INPUT_READY)
-#endif
- + ((status & DV_SOCKSER_OUTPUT_EMPTY) ? UART_OUTPUT_READY : 0));
- return 2;
- }
-#endif
-
- return nr_bytes;
-}
-
-int
-device_io_write_buffer (device *me, const void *source, int space,
- address_word addr, unsigned nr_bytes,
- SIM_DESC sd, SIM_CPU *cpu, sim_cia cia)
-{
-#if WITH_SCACHE
- /* MSPR support is deprecated but is kept in for upward compatibility
- with existing overlay support. */
- if (addr == MSPR_ADDR)
- {
- if ((*(const char *) source & MSPR_PURGE) != 0)
- scache_flush (sd);
- return nr_bytes;
- }
- if (addr == MCCR_ADDR)
- {
- if ((*(const char *) source & MCCR_CP) != 0)
- scache_flush (sd);
- return nr_bytes;
- }
-#endif
-
- if (STATE_ENVIRONMENT (sd) != OPERATING_ENVIRONMENT)
- return nr_bytes;
-
-#ifdef HAVE_DV_SOCKSER
- if (addr == UART_OUTCHAR_ADDR)
- {
- int rc = dv_sockser_write (sd, *(char *) source);
- return rc == 1;
- }
-#endif
-
- return nr_bytes;
-}
-
-void
-device_error (device *me, char *message, ...)
-{
-}
diff --git a/sim/m32r/m32r-sim.h b/sim/m32r/m32r-sim.h
deleted file mode 100644
index b1c2410fd84..00000000000
--- a/sim/m32r/m32r-sim.h
+++ /dev/null
@@ -1,231 +0,0 @@
-/* collection of junk waiting time to sort out
- Copyright (C) 1996, 1997, 1998 Free Software Foundation, Inc.
- Contributed by Cygnus Support.
-
-This file is part of the GNU Simulators.
-
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License along
-with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
-
-#ifndef M32R_SIM_H
-#define M32R_SIM_H
-
-/* gdb register numbers */
-#define PSW_REGNUM 16
-#define CBR_REGNUM 17
-#define SPI_REGNUM 18
-#define SPU_REGNUM 19
-#define BPC_REGNUM 20
-#define PC_REGNUM 21
-#define ACCL_REGNUM 22
-#define ACCH_REGNUM 23
-#define ACC1L_REGNUM 24
-#define ACC1H_REGNUM 25
-#define BBPSW_REGNUM 26
-#define BBPC_REGNUM 27
-
-extern int m32r_decode_gdb_ctrl_regnum (int);
-
-/* Cover macros for hardware accesses.
- FIXME: Eventually move to cgen. */
-#define GET_H_SM() ((CPU (h_psw) & 0x80) != 0)
-
-extern SI a_m32r_h_gr_get (SIM_CPU *, UINT);
-extern void a_m32r_h_gr_set (SIM_CPU *, UINT, SI);
-extern USI a_m32r_h_cr_get (SIM_CPU *, UINT);
-extern void a_m32r_h_cr_set (SIM_CPU *, UINT, USI);
-
-extern USI m32rbf_h_cr_get_handler (SIM_CPU *, UINT);
-extern void m32rbf_h_cr_set_handler (SIM_CPU *, UINT, USI);
-
-extern UQI m32rbf_h_psw_get_handler (SIM_CPU *);
-extern void m32rbf_h_psw_set_handler (SIM_CPU *, UQI);
-
-extern DI m32rbf_h_accum_get_handler (SIM_CPU *);
-extern void m32rbf_h_accum_set_handler (SIM_CPU *, DI);
-
-extern USI m32rxf_h_cr_get_handler (SIM_CPU *, UINT);
-extern void m32rxf_h_cr_set_handler (SIM_CPU *, UINT, USI);
-extern UQI m32rxf_h_psw_get_handler (SIM_CPU *);
-extern void m32rxf_h_psw_set_handler (SIM_CPU *, UQI);
-extern DI m32rxf_h_accum_get_handler (SIM_CPU *);
-extern void m32rxf_h_accum_set_handler (SIM_CPU *, DI);
-
-extern DI m32rxf_h_accums_get_handler (SIM_CPU *, UINT);
-extern void m32rxf_h_accums_set_handler (SIM_CPU *, UINT, DI);
-
-/* Misc. profile data. */
-
-typedef struct {
- /* nop insn slot filler count */
- unsigned int fillnop_count;
- /* number of parallel insns */
- unsigned int parallel_count;
-
- /* FIXME: generalize this to handle all insn lengths, move to common. */
- /* number of short insns, not including parallel ones */
- unsigned int short_count;
- /* number of long insns */
- unsigned int long_count;
-
- /* Working area for computing cycle counts. */
- unsigned long insn_cycles; /* FIXME: delete */
- unsigned long cti_stall;
- unsigned long load_stall;
- unsigned long biggest_cycles;
-
- /* Bitmask of registers loaded by previous insn. */
- unsigned int load_regs;
- /* Bitmask of registers loaded by current insn. */
- unsigned int load_regs_pending;
-} M32R_MISC_PROFILE;
-
-/* Initialize the working area. */
-void m32r_init_insn_cycles (SIM_CPU *, int);
-/* Update the totals for the insn. */
-void m32r_record_insn_cycles (SIM_CPU *, int);
-
-/* This is invoked by the nop pattern in the .cpu file. */
-#define PROFILE_COUNT_FILLNOPS(cpu, addr) \
-do { \
- if (PROFILE_INSN_P (cpu) \
- && (addr & 3) != 0) \
- ++ CPU_M32R_MISC_PROFILE (cpu)->fillnop_count; \
-} while (0)
-
-/* This is invoked by the execute section of mloop{,x}.in. */
-#define PROFILE_COUNT_PARINSNS(cpu) \
-do { \
- if (PROFILE_INSN_P (cpu)) \
- ++ CPU_M32R_MISC_PROFILE (cpu)->parallel_count; \
-} while (0)
-
-/* This is invoked by the execute section of mloop{,x}.in. */
-#define PROFILE_COUNT_SHORTINSNS(cpu) \
-do { \
- if (PROFILE_INSN_P (cpu)) \
- ++ CPU_M32R_MISC_PROFILE (cpu)->short_count; \
-} while (0)
-
-/* This is invoked by the execute section of mloop{,x}.in. */
-#define PROFILE_COUNT_LONGINSNS(cpu) \
-do { \
- if (PROFILE_INSN_P (cpu)) \
- ++ CPU_M32R_MISC_PROFILE (cpu)->long_count; \
-} while (0)
-
-#define GETTWI GETTSI
-#define SETTWI SETTSI
-
-/* Additional execution support. */
-
-/* Result of semantic function is one of
- - next address, branch only
- - NEW_PC_SKIP, sc/snc insn
- - NEW_PC_2, 2 byte non-branch non-sc/snc insn
- - NEW_PC_4, 4 byte non-branch insn
- The special values have bit 1 set so it's cheap to distinguish them.
- This works because all cti's are defined to zero the bottom two bits
- Note that the m32rx no longer doesn't implement its semantics with
- functions, so this isn't used. It's kept around should it be needed
- again. */
-/* FIXME: replace 0xffff0001 with 1? */
-#define NEW_PC_BASE 0xffff0001
-#define NEW_PC_SKIP NEW_PC_BASE
-#define NEW_PC_2 (NEW_PC_BASE + 2)
-#define NEW_PC_4 (NEW_PC_BASE + 4)
-#define NEW_PC_BRANCH_P(addr) (((addr) & 1) == 0)
-
-/* Modify "next pc" support to handle parallel execution.
- This is for the non-pbb case. The m32rx no longer implements this.
- It's kept around should it be needed again. */
-#if defined (WANT_CPU_M32RXF) && ! WITH_SCACHE_PBB_M32RXF
-#undef SEM_NEXT_VPC
-#define SEM_NEXT_VPC(abuf, len) (NEW_PC_BASE + (len))
-#undef SEM_SKIP_INSN
-#define SEM_SKIP_INSN(cpu, sc, vpcvar, yes) FIXME
-#endif
-
-/* Hardware/device support.
- ??? Will eventually want to move device stuff to config files. */
-
-/* Exception, Interrupt, and Trap addresses */
-#define EIT_SYSBREAK_ADDR 0x10
-#define EIT_RSVD_INSN_ADDR 0x20
-#define EIT_ADDR_EXCP_ADDR 0x30
-#define EIT_TRAP_BASE_ADDR 0x40
-#define EIT_EXTERN_ADDR 0x80
-#define EIT_RESET_ADDR 0x7ffffff0
-#define EIT_WAKEUP_ADDR 0x7ffffff0
-
-/* Special purpose traps. */
-#define TRAP_SYSCALL 0
-#define TRAP_BREAKPOINT 1
-
-/* Support for the MSPR register (Cache Purge Control Register)
- and the MCCR register (Cache Control Register) are needed in order for
- overlays to work correctly with the scache.
- MSPR no longer exists but is supported for upward compatibility with
- early overlay support. */
-
-/* Cache Purge Control (only exists on early versions of chips) */
-#define MSPR_ADDR 0xfffffff7
-#define MSPR_PURGE 1
-
-/* Lock Control Register (not supported) */
-#define MLCR_ADDR 0xfffffff7
-#define MLCR_LM 1
-
-/* Power Management Control Register (not supported) */
-#define MPMR_ADDR 0xfffffffb
-
-/* Cache Control Register */
-#define MCCR_ADDR 0xffffffff
-#define MCCR_CP 0x80
-/* not supported */
-#define MCCR_CM0 2
-#define MCCR_CM1 1
-
-/* Serial device addresses. */
-#ifdef M32R_EVA /* orig eva board, no longer supported */
-#define UART_INCHAR_ADDR 0xff102013
-#define UART_OUTCHAR_ADDR 0xff10200f
-#define UART_STATUS_ADDR 0xff102006
-/* Indicate ready bit is inverted. */
-#define UART_INPUT_READY0
-#else
-/* These are the values for the MSA2000 board.
- ??? Will eventually need to move this to a config file. */
-#define UART_INCHAR_ADDR 0xff004009
-#define UART_OUTCHAR_ADDR 0xff004007
-#define UART_STATUS_ADDR 0xff004002
-#endif
-
-#define UART_INPUT_READY 0x4
-#define UART_OUTPUT_READY 0x1
-
-/* Start address and length of all device support. */
-#define M32R_DEVICE_ADDR 0xff000000
-#define M32R_DEVICE_LEN 0x01000000
-
-/* sim_core_attach device argument. */
-extern device m32r_devices;
-
-/* FIXME: Temporary, until device support ready. */
-struct _device { int foo; };
-
-/* Handle the trap insn. */
-USI m32r_trap (SIM_CPU *, PCADDR, int);
-
-#endif /* M32R_SIM_H */
diff --git a/sim/m32r/m32r.c b/sim/m32r/m32r.c
deleted file mode 100644
index 3e5e4aaf7a8..00000000000
--- a/sim/m32r/m32r.c
+++ /dev/null
@@ -1,521 +0,0 @@
-/* m32r simulator support code
- Copyright (C) 1996, 1997, 1998 Free Software Foundation, Inc.
- Contributed by Cygnus Support.
-
-This file is part of GDB, the GNU debugger.
-
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License along
-with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
-
-#define WANT_CPU m32rbf
-#define WANT_CPU_M32RBF
-
-#include "sim-main.h"
-#include "cgen-mem.h"
-#include "cgen-ops.h"
-
-/* Decode gdb ctrl register number. */
-
-int
-m32r_decode_gdb_ctrl_regnum (int gdb_regnum)
-{
- switch (gdb_regnum)
- {
- case PSW_REGNUM : return H_CR_PSW;
- case CBR_REGNUM : return H_CR_CBR;
- case SPI_REGNUM : return H_CR_SPI;
- case SPU_REGNUM : return H_CR_SPU;
- case BPC_REGNUM : return H_CR_BPC;
- case BBPSW_REGNUM : return H_CR_BBPSW;
- case BBPC_REGNUM : return H_CR_BBPC;
- }
- abort ();
-}
-
-/* The contents of BUF are in target byte order. */
-
-int
-m32rbf_fetch_register (SIM_CPU *current_cpu, int rn, unsigned char *buf, int len)
-{
- int mach = MACH_NUM (CPU_MACH (current_cpu));
-
- if (rn < 16)
- SETTWI (buf, a_m32r_h_gr_get (current_cpu, rn));
- else
- switch (rn)
- {
- case PSW_REGNUM :
- case CBR_REGNUM :
- case SPI_REGNUM :
- case SPU_REGNUM :
- case BPC_REGNUM :
- case BBPSW_REGNUM :
- case BBPC_REGNUM :
- SETTWI (buf, a_m32r_h_cr_get (current_cpu,
- m32r_decode_gdb_ctrl_regnum (rn)));
- break;
- case PC_REGNUM :
- if (mach == MACH_M32R)
- SETTWI (buf, m32rbf_h_pc_get (current_cpu));
- else
- SETTWI (buf, m32rxf_h_pc_get (current_cpu));
- break;
- case ACCL_REGNUM :
- if (mach == MACH_M32R)
- SETTWI (buf, GETLODI (m32rbf_h_accum_get (current_cpu)));
- else
- SETTWI (buf, GETLODI (m32rxf_h_accum_get (current_cpu)));
- break;
- case ACCH_REGNUM :
- if (mach == MACH_M32R)
- SETTWI (buf, GETHIDI (m32rbf_h_accum_get (current_cpu)));
- else
- SETTWI (buf, GETHIDI (m32rxf_h_accum_get (current_cpu)));
- break;
- default :
- return 0;
- }
-
- return -1; /*FIXME*/
-}
-
-/* The contents of BUF are in target byte order. */
-
-int
-m32rbf_store_register (SIM_CPU *current_cpu, int rn, unsigned char *buf, int len)
-{
- int mach = MACH_NUM (CPU_MACH (current_cpu));
-
- if (rn < 16)
- a_m32r_h_gr_set (current_cpu, rn, GETTWI (buf));
- else
- switch (rn)
- {
- case PSW_REGNUM :
- case CBR_REGNUM :
- case SPI_REGNUM :
- case SPU_REGNUM :
- case BPC_REGNUM :
- case BBPSW_REGNUM :
- case BBPC_REGNUM :
- a_m32r_h_cr_set (current_cpu,
- m32r_decode_gdb_ctrl_regnum (rn),
- GETTWI (buf));
- break;
- case PC_REGNUM :
- if (mach == MACH_M32R)
- m32rbf_h_pc_set (current_cpu, GETTWI (buf));
- else
- m32rxf_h_pc_set (current_cpu, GETTWI (buf));
- break;
- case ACCL_REGNUM :
- {
- DI val;
- if (mach == MACH_M32R)
- val = m32rbf_h_accum_get (current_cpu);
- else
- val = m32rxf_h_accum_get (current_cpu);
- SETLODI (val, GETTWI (buf));
- if (mach == MACH_M32R)
- m32rbf_h_accum_set (current_cpu, val);
- else
- m32rxf_h_accum_set (current_cpu, val);
- break;
- }
- case ACCH_REGNUM :
- {
- DI val;
- if (mach == MACH_M32R)
- val = m32rbf_h_accum_get (current_cpu);
- else
- val = m32rxf_h_accum_get (current_cpu);
- SETHIDI (val, GETTWI (buf));
- if (mach == MACH_M32R)
- m32rbf_h_accum_set (current_cpu, val);
- else
- m32rxf_h_accum_set (current_cpu, val);
- break;
- }
- default :
- return 0;
- }
-
- return -1; /*FIXME*/
-}
-
-/* Cover fns for mach independent register accesses. */
-
-SI
-a_m32r_h_gr_get (SIM_CPU *current_cpu, UINT regno)
-{
- switch (MACH_NUM (CPU_MACH (current_cpu)))
- {
-#ifdef HAVE_CPU_M32RBF
- case MACH_M32R :
- return m32rbf_h_gr_get (current_cpu, regno);
-#endif
-#ifdef HAVE_CPU_M32RXF
- case MACH_M32RX :
- return m32rxf_h_gr_get (current_cpu, regno);
-#endif
- default :
- abort ();
- }
-}
-
-void
-a_m32r_h_gr_set (SIM_CPU *current_cpu, UINT regno, SI newval)
-{
- switch (MACH_NUM (CPU_MACH (current_cpu)))
- {
-#ifdef HAVE_CPU_M32RBF
- case MACH_M32R :
- m32rbf_h_gr_set (current_cpu, regno, newval);
- break;
-#endif
-#ifdef HAVE_CPU_M32RXF
- case MACH_M32RX :
- m32rxf_h_gr_set (current_cpu, regno, newval);
- break;
-#endif
- default :
- abort ();
- }
-}
-
-USI
-a_m32r_h_cr_get (SIM_CPU *current_cpu, UINT regno)
-{
- switch (MACH_NUM (CPU_MACH (current_cpu)))
- {
-#ifdef HAVE_CPU_M32RBF
- case MACH_M32R :
- return m32rbf_h_cr_get (current_cpu, regno);
-#endif
-#ifdef HAVE_CPU_M32RXF
- case MACH_M32RX :
- return m32rxf_h_cr_get (current_cpu, regno);
-#endif
- default :
- abort ();
- }
-}
-
-void
-a_m32r_h_cr_set (SIM_CPU *current_cpu, UINT regno, USI newval)
-{
- switch (MACH_NUM (CPU_MACH (current_cpu)))
- {
-#ifdef HAVE_CPU_M32RBF
- case MACH_M32R :
- m32rbf_h_cr_set (current_cpu, regno, newval);
- break;
-#endif
-#ifdef HAVE_CPU_M32RXF
- case MACH_M32RX :
- m32rxf_h_cr_set (current_cpu, regno, newval);
- break;
-#endif
- default :
- abort ();
- }
-}
-
-USI
-m32rbf_h_cr_get_handler (SIM_CPU *current_cpu, UINT cr)
-{
- switch (cr)
- {
- case H_CR_PSW : /* psw */
- return (((CPU (h_bpsw) & 0xc1) << 8)
- | ((CPU (h_psw) & 0xc0) << 0)
- | GET_H_COND ());
- case H_CR_BBPSW : /* backup backup psw */
- return CPU (h_bbpsw) & 0xc1;
- case H_CR_CBR : /* condition bit */
- return GET_H_COND ();
- case H_CR_SPI : /* interrupt stack pointer */
- if (! GET_H_SM ())
- return CPU (h_gr[H_GR_SP]);
- else
- return CPU (h_cr[H_CR_SPI]);
- case H_CR_SPU : /* user stack pointer */
- if (GET_H_SM ())
- return CPU (h_gr[H_GR_SP]);
- else
- return CPU (h_cr[H_CR_SPU]);
- case H_CR_BPC : /* backup pc */
- return CPU (h_cr[H_CR_BPC]) & 0xfffffffe;
- case H_CR_BBPC : /* backup backup pc */
- return CPU (h_cr[H_CR_BBPC]) & 0xfffffffe;
- case 4 : /* ??? unspecified, but apparently available */
- case 5 : /* ??? unspecified, but apparently available */
- return CPU (h_cr[cr]);
- default :
- return 0;
- }
-}
-
-void
-m32rbf_h_cr_set_handler (SIM_CPU *current_cpu, UINT cr, USI newval)
-{
- switch (cr)
- {
- case H_CR_PSW : /* psw */
- {
- int old_sm = (CPU (h_psw) & 0x80) != 0;
- int new_sm = (newval & 0x80) != 0;
- CPU (h_bpsw) = (newval >> 8) & 0xff;
- CPU (h_psw) = newval & 0xff;
- SET_H_COND (newval & 1);
- /* When switching stack modes, update the registers. */
- if (old_sm != new_sm)
- {
- if (old_sm)
- {
- /* Switching user -> system. */
- CPU (h_cr[H_CR_SPU]) = CPU (h_gr[H_GR_SP]);
- CPU (h_gr[H_GR_SP]) = CPU (h_cr[H_CR_SPI]);
- }
- else
- {
- /* Switching system -> user. */
- CPU (h_cr[H_CR_SPI]) = CPU (h_gr[H_GR_SP]);
- CPU (h_gr[H_GR_SP]) = CPU (h_cr[H_CR_SPU]);
- }
- }
- break;
- }
- case H_CR_BBPSW : /* backup backup psw */
- CPU (h_bbpsw) = newval & 0xff;
- break;
- case H_CR_CBR : /* condition bit */
- SET_H_COND (newval & 1);
- break;
- case H_CR_SPI : /* interrupt stack pointer */
- if (! GET_H_SM ())
- CPU (h_gr[H_GR_SP]) = newval;
- else
- CPU (h_cr[H_CR_SPI]) = newval;
- break;
- case H_CR_SPU : /* user stack pointer */
- if (GET_H_SM ())
- CPU (h_gr[H_GR_SP]) = newval;
- else
- CPU (h_cr[H_CR_SPU]) = newval;
- break;
- case H_CR_BPC : /* backup pc */
- CPU (h_cr[H_CR_BPC]) = newval;
- break;
- case H_CR_BBPC : /* backup backup pc */
- CPU (h_cr[H_CR_BBPC]) = newval;
- break;
- case 4 : /* ??? unspecified, but apparently available */
- case 5 : /* ??? unspecified, but apparently available */
- CPU (h_cr[cr]) = newval;
- break;
- default :
- /* ignore */
- break;
- }
-}
-
-/* Cover fns to access h-psw. */
-
-UQI
-m32rbf_h_psw_get_handler (SIM_CPU *current_cpu)
-{
- return (CPU (h_psw) & 0xfe) | (CPU (h_cond) & 1);
-}
-
-void
-m32rbf_h_psw_set_handler (SIM_CPU *current_cpu, UQI newval)
-{
- CPU (h_psw) = newval;
- CPU (h_cond) = newval & 1;
-}
-
-/* Cover fns to access h-accum. */
-
-DI
-m32rbf_h_accum_get_handler (SIM_CPU *current_cpu)
-{
- /* Sign extend the top 8 bits. */
- DI r;
-#if 1
- r = ANDDI (CPU (h_accum), MAKEDI (0xffffff, 0xffffffff));
- r = XORDI (r, MAKEDI (0x800000, 0));
- r = SUBDI (r, MAKEDI (0x800000, 0));
-#else
- SI hi,lo;
- r = CPU (h_accum);
- hi = GETHIDI (r);
- lo = GETLODI (r);
- hi = ((hi & 0xffffff) ^ 0x800000) - 0x800000;
- r = MAKEDI (hi, lo);
-#endif
- return r;
-}
-
-void
-m32rbf_h_accum_set_handler (SIM_CPU *current_cpu, DI newval)
-{
- CPU (h_accum) = newval;
-}
-
-#if WITH_PROFILE_MODEL_P
-
-/* FIXME: Some of these should be inline or macros. Later. */
-
-/* Initialize cycle counting for an insn.
- FIRST_P is non-zero if this is the first insn in a set of parallel
- insns. */
-
-void
-m32rbf_model_insn_before (SIM_CPU *cpu, int first_p)
-{
- M32R_MISC_PROFILE *mp = CPU_M32R_MISC_PROFILE (cpu);
- mp->cti_stall = 0;
- mp->load_stall = 0;
- if (first_p)
- {
- mp->load_regs_pending = 0;
- mp->biggest_cycles = 0;
- }
-}
-
-/* Record the cycles computed for an insn.
- LAST_P is non-zero if this is the last insn in a set of parallel insns,
- and we update the total cycle count.
- CYCLES is the cycle count of the insn. */
-
-void
-m32rbf_model_insn_after (SIM_CPU *cpu, int last_p, int cycles)
-{
- PROFILE_DATA *p = CPU_PROFILE_DATA (cpu);
- M32R_MISC_PROFILE *mp = CPU_M32R_MISC_PROFILE (cpu);
- unsigned long total = cycles + mp->cti_stall + mp->load_stall;
-
- if (last_p)
- {
- unsigned long biggest = total > mp->biggest_cycles ? total : mp->biggest_cycles;
- PROFILE_MODEL_TOTAL_CYCLES (p) += biggest;
- PROFILE_MODEL_CUR_INSN_CYCLES (p) = total;
- }
- else
- {
- /* Here we take advantage of the fact that !last_p -> first_p. */
- mp->biggest_cycles = total;
- PROFILE_MODEL_CUR_INSN_CYCLES (p) = total;
- }
-
- /* Branch and load stall counts are recorded independently of the
- total cycle count. */
- PROFILE_MODEL_CTI_STALL_CYCLES (p) += mp->cti_stall;
- PROFILE_MODEL_LOAD_STALL_CYCLES (p) += mp->load_stall;
-
- mp->load_regs = mp->load_regs_pending;
-}
-
-static INLINE void
-check_load_stall (SIM_CPU *cpu, int regno)
-{
- UINT h_gr = CPU_M32R_MISC_PROFILE (cpu)->load_regs;
-
- if (regno != -1
- && (h_gr & (1 << regno)) != 0)
- {
- CPU_M32R_MISC_PROFILE (cpu)->load_stall += 2;
- if (TRACE_INSN_P (cpu))
- cgen_trace_printf (cpu, " ; Load stall of 2 cycles.");
- }
-}
-
-int
-m32rbf_model_m32r_d_u_exec (SIM_CPU *cpu, const IDESC *idesc,
- int unit_num, int referenced,
- INT sr, INT sr2, INT dr)
-{
- check_load_stall (cpu, sr);
- check_load_stall (cpu, sr2);
- return idesc->timing->units[unit_num].done;
-}
-
-int
-m32rbf_model_m32r_d_u_cmp (SIM_CPU *cpu, const IDESC *idesc,
- int unit_num, int referenced,
- INT src1, INT src2)
-{
- check_load_stall (cpu, src1);
- check_load_stall (cpu, src2);
- return idesc->timing->units[unit_num].done;
-}
-
-int
-m32rbf_model_m32r_d_u_mac (SIM_CPU *cpu, const IDESC *idesc,
- int unit_num, int referenced,
- INT src1, INT src2)
-{
- check_load_stall (cpu, src1);
- check_load_stall (cpu, src2);
- return idesc->timing->units[unit_num].done;
-}
-
-int
-m32rbf_model_m32r_d_u_cti (SIM_CPU *cpu, const IDESC *idesc,
- int unit_num, int referenced,
- INT sr)
-{
- PROFILE_DATA *profile = CPU_PROFILE_DATA (cpu);
- int taken_p = (referenced & (1 << 1)) != 0;
-
- check_load_stall (cpu, sr);
- if (taken_p)
- {
- CPU_M32R_MISC_PROFILE (cpu)->cti_stall += 2;
- PROFILE_MODEL_TAKEN_COUNT (profile) += 1;
- }
- else
- PROFILE_MODEL_UNTAKEN_COUNT (profile) += 1;
- return idesc->timing->units[unit_num].done;
-}
-
-int
-m32rbf_model_m32r_d_u_load (SIM_CPU *cpu, const IDESC *idesc,
- int unit_num, int referenced,
- INT sr, INT dr)
-{
- CPU_M32R_MISC_PROFILE (cpu)->load_regs_pending |= (1 << dr);
- check_load_stall (cpu, sr);
- return idesc->timing->units[unit_num].done;
-}
-
-int
-m32rbf_model_m32r_d_u_store (SIM_CPU *cpu, const IDESC *idesc,
- int unit_num, int referenced,
- INT src1, INT src2)
-{
- check_load_stall (cpu, src1);
- check_load_stall (cpu, src2);
- return idesc->timing->units[unit_num].done;
-}
-
-int
-m32rbf_model_test_u_exec (SIM_CPU *cpu, const IDESC *idesc,
- int unit_num, int referenced)
-{
- return idesc->timing->units[unit_num].done;
-}
-
-#endif /* WITH_PROFILE_MODEL_P */
diff --git a/sim/m32r/m32rx.c b/sim/m32r/m32rx.c
deleted file mode 100644
index cb319f6b024..00000000000
--- a/sim/m32r/m32rx.c
+++ /dev/null
@@ -1,311 +0,0 @@
-/* m32rx simulator support code
- Copyright (C) 1997, 1998 Free Software Foundation, Inc.
- Contributed by Cygnus Support.
-
-This file is part of GDB, the GNU debugger.
-
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License along
-with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
-
-#define WANT_CPU m32rxf
-#define WANT_CPU_M32RXF
-
-#include "sim-main.h"
-#include "cgen-mem.h"
-#include "cgen-ops.h"
-
-/* The contents of BUF are in target byte order. */
-
-int
-m32rxf_fetch_register (SIM_CPU *current_cpu, int rn, unsigned char *buf, int len)
-{
- return m32rbf_fetch_register (current_cpu, rn, buf, len);
-}
-
-/* The contents of BUF are in target byte order. */
-
-int
-m32rxf_store_register (SIM_CPU *current_cpu, int rn, unsigned char *buf, int len)
-{
- return m32rbf_store_register (current_cpu, rn, buf, len);
-}
-
-/* Cover fns to get/set the control registers.
- FIXME: Duplicated from m32r.c. The issue is structure offsets. */
-
-USI
-m32rxf_h_cr_get_handler (SIM_CPU *current_cpu, UINT cr)
-{
- switch (cr)
- {
- case H_CR_PSW : /* psw */
- return (((CPU (h_bpsw) & 0xc1) << 8)
- | ((CPU (h_psw) & 0xc0) << 0)
- | GET_H_COND ());
- case H_CR_BBPSW : /* backup backup psw */
- return CPU (h_bbpsw) & 0xc1;
- case H_CR_CBR : /* condition bit */
- return GET_H_COND ();
- case H_CR_SPI : /* interrupt stack pointer */
- if (! GET_H_SM ())
- return CPU (h_gr[H_GR_SP]);
- else
- return CPU (h_cr[H_CR_SPI]);
- case H_CR_SPU : /* user stack pointer */
- if (GET_H_SM ())
- return CPU (h_gr[H_GR_SP]);
- else
- return CPU (h_cr[H_CR_SPU]);
- case H_CR_BPC : /* backup pc */
- return CPU (h_cr[H_CR_BPC]) & 0xfffffffe;
- case H_CR_BBPC : /* backup backup pc */
- return CPU (h_cr[H_CR_BBPC]) & 0xfffffffe;
- case 4 : /* ??? unspecified, but apparently available */
- case 5 : /* ??? unspecified, but apparently available */
- return CPU (h_cr[cr]);
- default :
- return 0;
- }
-}
-
-void
-m32rxf_h_cr_set_handler (SIM_CPU *current_cpu, UINT cr, USI newval)
-{
- switch (cr)
- {
- case H_CR_PSW : /* psw */
- {
- int old_sm = (CPU (h_psw) & 0x80) != 0;
- int new_sm = (newval & 0x80) != 0;
- CPU (h_bpsw) = (newval >> 8) & 0xff;
- CPU (h_psw) = newval & 0xff;
- SET_H_COND (newval & 1);
- /* When switching stack modes, update the registers. */
- if (old_sm != new_sm)
- {
- if (old_sm)
- {
- /* Switching user -> system. */
- CPU (h_cr[H_CR_SPU]) = CPU (h_gr[H_GR_SP]);
- CPU (h_gr[H_GR_SP]) = CPU (h_cr[H_CR_SPI]);
- }
- else
- {
- /* Switching system -> user. */
- CPU (h_cr[H_CR_SPI]) = CPU (h_gr[H_GR_SP]);
- CPU (h_gr[H_GR_SP]) = CPU (h_cr[H_CR_SPU]);
- }
- }
- break;
- }
- case H_CR_BBPSW : /* backup backup psw */
- CPU (h_bbpsw) = newval & 0xff;
- break;
- case H_CR_CBR : /* condition bit */
- SET_H_COND (newval & 1);
- break;
- case H_CR_SPI : /* interrupt stack pointer */
- if (! GET_H_SM ())
- CPU (h_gr[H_GR_SP]) = newval;
- else
- CPU (h_cr[H_CR_SPI]) = newval;
- break;
- case H_CR_SPU : /* user stack pointer */
- if (GET_H_SM ())
- CPU (h_gr[H_GR_SP]) = newval;
- else
- CPU (h_cr[H_CR_SPU]) = newval;
- break;
- case H_CR_BPC : /* backup pc */
- CPU (h_cr[H_CR_BPC]) = newval;
- break;
- case H_CR_BBPC : /* backup backup pc */
- CPU (h_cr[H_CR_BBPC]) = newval;
- break;
- case 4 : /* ??? unspecified, but apparently available */
- case 5 : /* ??? unspecified, but apparently available */
- CPU (h_cr[cr]) = newval;
- break;
- default :
- /* ignore */
- break;
- }
-}
-
-/* Cover fns to access h-psw. */
-
-UQI
-m32rxf_h_psw_get_handler (SIM_CPU *current_cpu)
-{
- return (CPU (h_psw) & 0xfe) | (CPU (h_cond) & 1);
-}
-
-void
-m32rxf_h_psw_set_handler (SIM_CPU *current_cpu, UQI newval)
-{
- CPU (h_psw) = newval;
- CPU (h_cond) = newval & 1;
-}
-
-/* Cover fns to access h-accum. */
-
-DI
-m32rxf_h_accum_get_handler (SIM_CPU *current_cpu)
-{
- /* Sign extend the top 8 bits. */
- DI r;
- r = ANDDI (CPU (h_accum), MAKEDI (0xffffff, 0xffffffff));
- r = XORDI (r, MAKEDI (0x800000, 0));
- r = SUBDI (r, MAKEDI (0x800000, 0));
- return r;
-}
-
-void
-m32rxf_h_accum_set_handler (SIM_CPU *current_cpu, DI newval)
-{
- CPU (h_accum) = newval;
-}
-
-/* Cover fns to access h-accums. */
-
-DI
-m32rxf_h_accums_get_handler (SIM_CPU *current_cpu, UINT regno)
-{
- /* FIXME: Yes, this is just a quick hack. */
- DI r;
- if (regno == 0)
- r = CPU (h_accum);
- else
- r = CPU (h_accums[1]);
- /* Sign extend the top 8 bits. */
- r = ANDDI (r, MAKEDI (0xffffff, 0xffffffff));
- r = XORDI (r, MAKEDI (0x800000, 0));
- r = SUBDI (r, MAKEDI (0x800000, 0));
- return r;
-}
-
-void
-m32rxf_h_accums_set_handler (SIM_CPU *current_cpu, UINT regno, DI newval)
-{
- /* FIXME: Yes, this is just a quick hack. */
- if (regno == 0)
- CPU (h_accum) = newval;
- else
- CPU (h_accums[1]) = newval;
-}
-
-#if WITH_PROFILE_MODEL_P
-
-/* Initialize cycle counting for an insn.
- FIRST_P is non-zero if this is the first insn in a set of parallel
- insns. */
-
-void
-m32rxf_model_insn_before (SIM_CPU *cpu, int first_p)
-{
- m32rbf_model_insn_before (cpu, first_p);
-}
-
-/* Record the cycles computed for an insn.
- LAST_P is non-zero if this is the last insn in a set of parallel insns,
- and we update the total cycle count.
- CYCLES is the cycle count of the insn. */
-
-void
-m32rxf_model_insn_after (SIM_CPU *cpu, int last_p, int cycles)
-{
- m32rbf_model_insn_after (cpu, last_p, cycles);
-}
-
-static INLINE void
-check_load_stall (SIM_CPU *cpu, int regno)
-{
- UINT h_gr = CPU_M32R_MISC_PROFILE (cpu)->load_regs;
-
- if (regno != -1
- && (h_gr & (1 << regno)) != 0)
- {
- CPU_M32R_MISC_PROFILE (cpu)->load_stall += 2;
- if (TRACE_INSN_P (cpu))
- cgen_trace_printf (cpu, " ; Load stall of 2 cycles.");
- }
-}
-
-int
-m32rxf_model_m32rx_u_exec (SIM_CPU *cpu, const IDESC *idesc,
- int unit_num, int referenced,
- INT sr, INT sr2, INT dr)
-{
- check_load_stall (cpu, sr);
- check_load_stall (cpu, sr2);
- return idesc->timing->units[unit_num].done;
-}
-
-int
-m32rxf_model_m32rx_u_cmp (SIM_CPU *cpu, const IDESC *idesc,
- int unit_num, int referenced,
- INT src1, INT src2)
-{
- check_load_stall (cpu, src1);
- check_load_stall (cpu, src2);
- return idesc->timing->units[unit_num].done;
-}
-
-int
-m32rxf_model_m32rx_u_mac (SIM_CPU *cpu, const IDESC *idesc,
- int unit_num, int referenced,
- INT src1, INT src2)
-{
- check_load_stall (cpu, src1);
- check_load_stall (cpu, src2);
- return idesc->timing->units[unit_num].done;
-}
-
-int
-m32rxf_model_m32rx_u_cti (SIM_CPU *cpu, const IDESC *idesc,
- int unit_num, int referenced,
- INT sr)
-{
- PROFILE_DATA *profile = CPU_PROFILE_DATA (cpu);
- int taken_p = (referenced & (1 << 1)) != 0;
-
- check_load_stall (cpu, sr);
- if (taken_p)
- {
- CPU_M32R_MISC_PROFILE (cpu)->cti_stall += 2;
- PROFILE_MODEL_TAKEN_COUNT (profile) += 1;
- }
- else
- PROFILE_MODEL_UNTAKEN_COUNT (profile) += 1;
- return idesc->timing->units[unit_num].done;
-}
-
-int
-m32rxf_model_m32rx_u_load (SIM_CPU *cpu, const IDESC *idesc,
- int unit_num, int referenced,
- INT sr, INT dr)
-{
- CPU_M32R_MISC_PROFILE (cpu)->load_regs_pending |= (1 << dr);
- return idesc->timing->units[unit_num].done;
-}
-
-int
-m32rxf_model_m32rx_u_store (SIM_CPU *cpu, const IDESC *idesc,
- int unit_num, int referenced,
- INT src1, INT src2)
-{
- return idesc->timing->units[unit_num].done;
-}
-
-#endif /* WITH_PROFILE_MODEL_P */
diff --git a/sim/m32r/mloop.in b/sim/m32r/mloop.in
deleted file mode 100644
index 0be16bb1063..00000000000
--- a/sim/m32r/mloop.in
+++ /dev/null
@@ -1,319 +0,0 @@
-# Simulator main loop for m32r. -*- C -*-
-# Copyright (C) 1996, 1997, 1998 Free Software Foundation, Inc.
-#
-# This file is part of the GNU Simulators.
-#
-# This program is free software; you can redistribute it and/or modify
-# it under the terms of the GNU General Public License as published by
-# the Free Software Foundation; either version 2, or (at your option)
-# any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License along
-# with this program; if not, write to the Free Software Foundation, Inc.,
-# 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
-# Syntax:
-# /bin/sh mainloop.in command
-#
-# Command is one of:
-#
-# init
-# support
-# extract-{simple,scache,pbb}
-# {full,fast}-exec-{simple,scache,pbb}
-#
-# A target need only provide a "full" version of one of simple,scache,pbb.
-# If the target wants it can also provide a fast version of same, or if
-# the slow (full featured) version is `simple', then the fast version can be
-# one of scache/pbb.
-# A target can't provide more than this.
-# However for illustration's sake this file provides examples of all.
-
-# ??? After a few more ports are done, revisit.
-# Will eventually need to machine generate a lot of this.
-
-case "x$1" in
-
-xsupport)
-
-cat <<EOF
-
-static INLINE const IDESC *
-extract16 (SIM_CPU *current_cpu, PCADDR pc, CGEN_INSN_INT insn,
- ARGBUF *abuf, int fast_p)
-{
- const IDESC *id = @cpu@_decode (current_cpu, pc, insn, insn, abuf);
-
- @cpu@_fill_argbuf (current_cpu, abuf, id, pc, fast_p);
- if (! fast_p)
- {
- int trace_p = PC_IN_TRACE_RANGE_P (current_cpu, pc);
- int profile_p = PC_IN_PROFILE_RANGE_P (current_cpu, pc);
- @cpu@_fill_argbuf_tp (current_cpu, abuf, trace_p, profile_p);
- }
- return id;
-}
-
-static INLINE const IDESC *
-extract32 (SIM_CPU *current_cpu, PCADDR pc, CGEN_INSN_INT insn,
- ARGBUF *abuf, int fast_p)
-{
- const IDESC *id = @cpu@_decode (current_cpu, pc, (USI) insn >> 16, insn, abuf);
-
- @cpu@_fill_argbuf (current_cpu, abuf, id, pc, fast_p);
- if (! fast_p)
- {
- int trace_p = PC_IN_TRACE_RANGE_P (current_cpu, pc);
- int profile_p = PC_IN_PROFILE_RANGE_P (current_cpu, pc);
- @cpu@_fill_argbuf_tp (current_cpu, abuf, trace_p, profile_p);
- }
- return id;
-}
-
-static INLINE SEM_PC
-execute (SIM_CPU *current_cpu, SCACHE *sc, int fast_p)
-{
- SEM_PC vpc;
-
- if (fast_p)
- {
-#if ! WITH_SEM_SWITCH_FAST
-#if WITH_SCACHE
- vpc = (*sc->argbuf.semantic.sem_fast) (current_cpu, sc);
-#else
- vpc = (*sc->argbuf.semantic.sem_fast) (current_cpu, &sc->argbuf);
-#endif
-#else
- abort ();
-#endif /* WITH_SEM_SWITCH_FAST */
- }
- else
- {
-#if ! WITH_SEM_SWITCH_FULL
- ARGBUF *abuf = &sc->argbuf;
- const IDESC *idesc = abuf->idesc;
- const CGEN_INSN *idata = idesc->idata;
-#if WITH_SCACHE_PBB
- int virtual_p = CGEN_INSN_ATTR_VALUE (idata, CGEN_INSN_VIRTUAL);
-#else
- int virtual_p = 0;
-#endif
-
- if (! virtual_p)
- {
- /* FIXME: call x-before */
- if (ARGBUF_PROFILE_P (abuf))
- PROFILE_COUNT_INSN (current_cpu, abuf->addr, idesc->num);
- /* FIXME: Later make cover macros: PROFILE_INSN_{INIT,FINI}. */
- if (PROFILE_MODEL_P (current_cpu)
- && ARGBUF_PROFILE_P (abuf))
- @cpu@_model_insn_before (current_cpu, 1 /*first_p*/);
- TRACE_INSN_INIT (current_cpu, abuf, 1);
- TRACE_INSN (current_cpu, idata,
- (const struct argbuf *) abuf, abuf->addr);
- }
-#if WITH_SCACHE
- vpc = (*sc->argbuf.semantic.sem_full) (current_cpu, sc);
-#else
- vpc = (*sc->argbuf.semantic.sem_full) (current_cpu, abuf);
-#endif
- if (! virtual_p)
- {
- /* FIXME: call x-after */
- if (PROFILE_MODEL_P (current_cpu)
- && ARGBUF_PROFILE_P (abuf))
- {
- int cycles;
-
- cycles = (*idesc->timing->model_fn) (current_cpu, sc);
- @cpu@_model_insn_after (current_cpu, 1 /*last_p*/, cycles);
- }
- TRACE_INSN_FINI (current_cpu, abuf, 1);
- }
-#else
- abort ();
-#endif /* WITH_SEM_SWITCH_FULL */
- }
-
- return vpc;
-}
-
-EOF
-
-;;
-
-xinit)
-
-# Nothing needed.
-
-;;
-
-xextract-simple | xextract-scache)
-
-cat <<EOF
-{
- if ((pc & 3) != 0)
- {
- /* This only occurs when single stepping.
- The test is unnecessary otherwise, but the cost is teensy,
- compared with decoding/extraction. */
- UHI insn = GETIMEMUHI (current_cpu, pc);
- extract16 (current_cpu, pc, insn & 0x7fff, sc, FAST_P);
- }
- else
- {
- USI insn = GETIMEMUSI (current_cpu, pc);
- if ((SI) insn < 0)
- {
- extract32 (current_cpu, pc, insn, sc, FAST_P);
- }
- else
- {
- extract16 (current_cpu, pc, insn >> 16, sc, FAST_P);
- extract16 (current_cpu, pc + 2, insn & 0x7fff, sc + 1, FAST_P);
- /* The m32r doesn't support parallel execution. */
- if ((insn & 0x8000) != 0
- && (insn & 0x7fff) != 0x7000) /* parallel nops are ok */
- sim_engine_illegal_insn (current_cpu, pc);
- }
- }
-}
-EOF
-
-;;
-
-xextract-pbb)
-
-# Inputs: current_cpu, pc, sc, max_insns, FAST_P
-# Outputs: sc, pc
-# sc must be left pointing past the last created entry.
-# pc must be left pointing past the last created entry.
-# If the pbb is terminated by a cti insn, SET_CTI_VPC(sc) must be called
-# to record the vpc of the cti insn.
-# SET_INSN_COUNT(n) must be called to record number of real insns.
-
-cat <<EOF
-{
- const IDESC *idesc;
- int icount = 0;
-
- if ((pc & 3) != 0)
- {
- /* This only occurs when single stepping.
- The test is unnecessary otherwise, but the cost is teensy,
- compared with decoding/extraction. */
- UHI insn = GETIMEMUHI (current_cpu, pc);
- idesc = extract16 (current_cpu, pc, insn & 0x7fff, &sc->argbuf, FAST_P);
- ++sc;
- --max_insns;
- ++icount;
- pc += 2;
- if (IDESC_CTI_P (idesc))
- {
- SET_CTI_VPC (sc - 1);
- goto Finish;
- }
- }
-
- while (max_insns > 0)
- {
- USI insn = GETIMEMUSI (current_cpu, pc);
- if ((SI) insn < 0)
- {
- idesc = extract32 (current_cpu, pc, insn, &sc->argbuf, FAST_P);
- ++sc;
- --max_insns;
- ++icount;
- pc += 4;
- if (IDESC_CTI_P (idesc))
- {
- SET_CTI_VPC (sc - 1);
- break;
- }
- }
- else
- {
- idesc = extract16 (current_cpu, pc, insn >> 16, &sc->argbuf, FAST_P);
- ++sc;
- --max_insns;
- ++icount;
- pc += 2;
- if (IDESC_CTI_P (idesc))
- {
- SET_CTI_VPC (sc - 1);
- break;
- }
- /* The m32r doesn't support parallel execution. */
- if ((insn & 0x8000) != 0)
- {
- /* ??? Defer signalling to execution. */
- if ((insn & 0x7fff) != 0x7000) /* parallel nops are ok */
- sim_engine_invalid_insn (current_cpu, pc - 2, 0);
- /* There's no point in processing parallel nops in fast mode.
- We might as well do this test since we've already tested
- that we have a parallel nop. */
- if (0 && FAST_P)
- {
- pc += 2;
- continue;
- }
- }
- else
- {
- /* Non-parallel case.
- While we're guaranteed that there's room to extract the
- insn, when single stepping we can't; the pbb must stop
- after the first insn. */
- if (max_insns == 0)
- break;
- }
- /* We're guaranteed that we can always process 16 bit insns in
- pairs. */
- idesc = extract16 (current_cpu, pc, insn & 0x7fff, &sc->argbuf, FAST_P);
- ++sc;
- --max_insns;
- ++icount;
- pc += 2;
- if (IDESC_CTI_P (idesc))
- {
- SET_CTI_VPC (sc - 1);
- break;
- }
- }
- }
-
- Finish:
- SET_INSN_COUNT (icount);
-}
-EOF
-
-;;
-
-xfull-exec-* | xfast-exec-*)
-
-# Inputs: current_cpu, vpc, FAST_P
-# Outputs: vpc
-# vpc is the virtual program counter.
-
-cat <<EOF
-#if (! FAST_P && WITH_SEM_SWITCH_FULL) || (FAST_P && WITH_SEM_SWITCH_FAST)
-#define DEFINE_SWITCH
-#include "sem-switch.c"
-#else
- vpc = execute (current_cpu, vpc, FAST_P);
-#endif
-EOF
-
-;;
-
-*)
- echo "Invalid argument to mainloop.in: $1" >&2
- exit 1
- ;;
-
-esac
diff --git a/sim/m32r/mloopx.in b/sim/m32r/mloopx.in
deleted file mode 100644
index e1663f799f2..00000000000
--- a/sim/m32r/mloopx.in
+++ /dev/null
@@ -1,484 +0,0 @@
-# Simulator main loop for m32rx. -*- C -*-
-# Copyright (C) 1996, 1997, 1998 Free Software Foundation, Inc.
-#
-# This file is part of the GNU Simulators.
-#
-# This program is free software; you can redistribute it and/or modify
-# it under the terms of the GNU General Public License as published by
-# the Free Software Foundation; either version 2, or (at your option)
-# any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License along
-# with this program; if not, write to the Free Software Foundation, Inc.,
-# 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
-# Syntax:
-# /bin/sh mainloop.in command
-#
-# Command is one of:
-#
-# init
-# support
-# extract-{simple,scache,pbb}
-# {full,fast}-exec-{simple,scache,pbb}
-#
-# A target need only provide a "full" version of one of simple,scache,pbb.
-# If the target wants it can also provide a fast version of same, or if
-# the slow (full featured) version is `simple', then the fast version can be
-# one of scache/pbb.
-# A target can't provide more than this.
-
-# ??? After a few more ports are done, revisit.
-# Will eventually need to machine generate a lot of this.
-
-case "x$1" in
-
-xsupport)
-
-cat <<EOF
-
-/* Emit insns to write back the results of insns executed in parallel.
- SC points to a sufficient number of scache entries for the writeback
- handlers.
- SC1/ID1 is the first insn (left slot, lower address).
- SC2/ID2 is the second insn (right slot, higher address). */
-
-static INLINE void
-emit_par_finish (SIM_CPU *current_cpu, PCADDR pc, SCACHE *sc,
- SCACHE *sc1, const IDESC *id1, SCACHE *sc2, const IDESC *id2)
-{
- ARGBUF *abuf;
-
- abuf = &sc->argbuf;
- id1 = id1->par_idesc;
- abuf->fields.write.abuf = &sc1->argbuf;
- @cpu@_fill_argbuf (current_cpu, abuf, id1, pc, 0);
- /* no need to set trace_p,profile_p */
-#if 0 /* not currently needed for id2 since results written directly */
- abuf = &sc[1].argbuf;
- id2 = id2->par_idesc;
- abuf->fields.write.abuf = &sc2->argbuf;
- @cpu@_fill_argbuf (current_cpu, abuf, id2, pc + 2, 0);
- /* no need to set trace_p,profile_p */
-#endif
-}
-
-static INLINE const IDESC *
-emit_16 (SIM_CPU *current_cpu, PCADDR pc, CGEN_INSN_INT insn,
- SCACHE *sc, int fast_p, int parallel_p)
-{
- ARGBUF *abuf = &sc->argbuf;
- const IDESC *id = @cpu@_decode (current_cpu, pc, insn, insn, abuf);
-
- if (parallel_p)
- id = id->par_idesc;
- @cpu@_fill_argbuf (current_cpu, abuf, id, pc, fast_p);
- return id;
-}
-
-static INLINE const IDESC *
-emit_full16 (SIM_CPU *current_cpu, PCADDR pc, CGEN_INSN_INT insn, SCACHE *sc,
- int trace_p, int profile_p)
-{
- const IDESC *id;
-
- @cpu@_emit_before (current_cpu, sc, pc, 1);
- id = emit_16 (current_cpu, pc, insn, sc + 1, 0, 0);
- @cpu@_emit_after (current_cpu, sc + 2, pc);
- sc[1].argbuf.trace_p = trace_p;
- sc[1].argbuf.profile_p = profile_p;
- return id;
-}
-
-static INLINE const IDESC *
-emit_parallel (SIM_CPU *current_cpu, PCADDR pc, CGEN_INSN_INT insn,
- SCACHE *sc, int fast_p)
-{
- const IDESC *id,*id2;
-
- /* Emit both insns, then emit a finisher-upper.
- We speed things up by handling the second insn serially
- [not parallelly]. Then the writeback only has to deal
- with the first insn. */
- /* ??? Revisit to handle exceptions right. */
-
- /* FIXME: No need to handle this parallely if second is nop. */
- id = emit_16 (current_cpu, pc, insn >> 16, sc, fast_p, 1);
-
- /* Note that this can never be a cti. No cti's go in the S pipeline. */
- id2 = emit_16 (current_cpu, pc + 2, insn & 0x7fff, sc + 1, fast_p, 0);
-
- /* Set sc/snc insns notion of where to skip to. */
- if (IDESC_SKIP_P (id))
- SEM_SKIP_COMPILE (current_cpu, sc, 1);
-
- /* Emit code to finish executing the semantics
- (write back the results). */
- emit_par_finish (current_cpu, pc, sc + 2, sc, id, sc + 1, id2);
-
- return id;
-}
-
-static INLINE const IDESC *
-emit_full_parallel (SIM_CPU *current_cpu, PCADDR pc, CGEN_INSN_INT insn,
- SCACHE *sc, int trace_p, int profile_p)
-{
- const IDESC *id,*id2;
-
- /* Emit both insns, then emit a finisher-upper.
- We speed things up by handling the second insn serially
- [not parallelly]. Then the writeback only has to deal
- with the first insn. */
- /* ??? Revisit to handle exceptions right. */
-
- @cpu@_emit_before (current_cpu, sc, pc, 1);
-
- /* FIXME: No need to handle this parallelly if second is nop. */
- id = emit_16 (current_cpu, pc, insn >> 16, sc + 1, 0, 1);
- sc[1].argbuf.trace_p = trace_p;
- sc[1].argbuf.profile_p = profile_p;
-
- @cpu@_emit_before (current_cpu, sc + 2, pc, 0);
-
- /* Note that this can never be a cti. No cti's go in the S pipeline. */
- id2 = emit_16 (current_cpu, pc + 2, insn & 0x7fff, sc + 3, 0, 0);
- sc[3].argbuf.trace_p = trace_p;
- sc[3].argbuf.profile_p = profile_p;
-
- /* Set sc/snc insns notion of where to skip to. */
- if (IDESC_SKIP_P (id))
- SEM_SKIP_COMPILE (current_cpu, sc, 4);
-
- /* Emit code to finish executing the semantics
- (write back the results). */
- emit_par_finish (current_cpu, pc, sc + 4, sc + 1, id, sc + 3, id2);
-
- @cpu@_emit_after (current_cpu, sc + 5, pc);
-
- return id;
-}
-
-static INLINE const IDESC *
-emit_32 (SIM_CPU *current_cpu, PCADDR pc, CGEN_INSN_INT insn,
- SCACHE *sc, int fast_p)
-{
- ARGBUF *abuf = &sc->argbuf;
- const IDESC *id = @cpu@_decode (current_cpu, pc,
- (USI) insn >> 16, insn, abuf);
-
- @cpu@_fill_argbuf (current_cpu, abuf, id, pc, fast_p);
- return id;
-}
-
-static INLINE const IDESC *
-emit_full32 (SIM_CPU *current_cpu, PCADDR pc, CGEN_INSN_INT insn, SCACHE *sc,
- int trace_p, int profile_p)
-{
- const IDESC *id;
-
- @cpu@_emit_before (current_cpu, sc, pc, 1);
- id = emit_32 (current_cpu, pc, insn, sc + 1, 0);
- @cpu@_emit_after (current_cpu, sc + 2, pc);
- sc[1].argbuf.trace_p = trace_p;
- sc[1].argbuf.profile_p = profile_p;
- return id;
-}
-
-EOF
-
-;;
-
-xinit)
-
-# Nothing needed.
-
-;;
-
-xextract-pbb)
-
-# Inputs: current_cpu, pc, sc, max_insns, FAST_P
-# Outputs: sc, pc
-# sc must be left pointing past the last created entry.
-# pc must be left pointing past the last created entry.
-# If the pbb is terminated by a cti insn, SET_CTI_VPC(sc) must be called
-# to record the vpc of the cti insn.
-# SET_INSN_COUNT(n) must be called to record number of real insns.
-
-cat <<EOF
-{
- const IDESC *idesc;
- int icount = 0;
-
- if ((pc & 3) != 0)
- {
- /* This occurs when single stepping and when compiling the not-taken
- part of conditional branches. */
- UHI insn = GETIMEMUHI (current_cpu, pc);
- int trace_p = PC_IN_TRACE_RANGE_P (current_cpu, pc);
- int profile_p = PC_IN_PROFILE_RANGE_P (current_cpu, pc);
- SCACHE *cti_sc; /* ??? tmp hack */
-
- /* A parallel insn isn't allowed here, but we don't mind nops.
- ??? We need to wait until the insn is executed before signalling
- the error, for situations where such signalling is wanted. */
-#if 0
- if ((insn & 0x8000) != 0
- && (insn & 0x7fff) != 0x7000) /* parallel nops are ok */
- sim_engine_invalid_insn (current_cpu, pc, 0);
-#endif
-
- /* Only emit before/after handlers if necessary. */
- if (FAST_P || (! trace_p && ! profile_p))
- {
- idesc = emit_16 (current_cpu, pc, insn & 0x7fff, sc, FAST_P, 0);
- cti_sc = sc;
- ++sc;
- --max_insns;
- }
- else
- {
- idesc = emit_full16 (current_cpu, pc, insn & 0x7fff, sc,
- trace_p, profile_p);
- cti_sc = sc + 1;
- sc += 3;
- max_insns -= 3;
- }
- ++icount;
- pc += 2;
- if (IDESC_CTI_P (idesc))
- {
- SET_CTI_VPC (cti_sc);
- goto Finish;
- }
- }
-
- /* There are two copies of the compiler: full(!fast) and fast.
- The "full" case emits before/after handlers for each insn.
- Having two copies of this code is a tradeoff, having one copy
- seemed a bit more difficult to read (due to constantly testing
- FAST_P). ??? On the other hand, with address ranges we'll want to
- omit before/after handlers for unwanted insns. Having separate loops
- for FAST/!FAST avoids constantly doing the test in the loop, but
- typically FAST_P is a constant and such tests will get optimized out. */
-
- if (FAST_P)
- {
- while (max_insns > 0)
- {
- USI insn = GETIMEMUSI (current_cpu, pc);
- if ((SI) insn < 0)
- {
- /* 32 bit insn */
- idesc = emit_32 (current_cpu, pc, insn, sc, 1);
- ++sc;
- --max_insns;
- ++icount;
- pc += 4;
- if (IDESC_CTI_P (idesc))
- {
- SET_CTI_VPC (sc - 1);
- break;
- }
- }
- else
- {
- if ((insn & 0x8000) != 0) /* parallel? */
- {
- /* Yep. Here's the "interesting" [sic] part. */
- idesc = emit_parallel (current_cpu, pc, insn, sc, 1);
- sc += 3;
- max_insns -= 3;
- icount += 2;
- pc += 4;
- if (IDESC_CTI_P (idesc))
- {
- SET_CTI_VPC (sc - 3);
- break;
- }
- }
- else /* 2 serial 16 bit insns */
- {
- idesc = emit_16 (current_cpu, pc, insn >> 16, sc, 1, 0);
- ++sc;
- --max_insns;
- ++icount;
- pc += 2;
- if (IDESC_CTI_P (idesc))
- {
- SET_CTI_VPC (sc - 1);
- break;
- }
- /* While we're guaranteed that there's room to extract the
- insn, when single stepping we can't; the pbb must stop
- after the first insn. */
- if (max_insns == 0)
- break;
- idesc = emit_16 (current_cpu, pc, insn & 0x7fff, sc, 1, 0);
- ++sc;
- --max_insns;
- ++icount;
- pc += 2;
- if (IDESC_CTI_P (idesc))
- {
- SET_CTI_VPC (sc - 1);
- break;
- }
- }
- }
- }
- }
- else /* ! FAST_P */
- {
- while (max_insns > 0)
- {
- USI insn = GETIMEMUSI (current_cpu, pc);
- int trace_p = PC_IN_TRACE_RANGE_P (current_cpu, pc);
- int profile_p = PC_IN_PROFILE_RANGE_P (current_cpu, pc);
- SCACHE *cti_sc; /* ??? tmp hack */
- if ((SI) insn < 0)
- {
- /* 32 bit insn
- Only emit before/after handlers if necessary. */
- if (trace_p || profile_p)
- {
- idesc = emit_full32 (current_cpu, pc, insn, sc,
- trace_p, profile_p);
- cti_sc = sc + 1;
- sc += 3;
- max_insns -= 3;
- }
- else
- {
- idesc = emit_32 (current_cpu, pc, insn, sc, 0);
- cti_sc = sc;
- ++sc;
- --max_insns;
- }
- ++icount;
- pc += 4;
- if (IDESC_CTI_P (idesc))
- {
- SET_CTI_VPC (cti_sc);
- break;
- }
- }
- else
- {
- if ((insn & 0x8000) != 0) /* parallel? */
- {
- /* Yep. Here's the "interesting" [sic] part.
- Only emit before/after handlers if necessary. */
- if (trace_p || profile_p)
- {
- idesc = emit_full_parallel (current_cpu, pc, insn, sc,
- trace_p, profile_p);
- cti_sc = sc + 1;
- sc += 6;
- max_insns -= 6;
- }
- else
- {
- idesc = emit_parallel (current_cpu, pc, insn, sc, 0);
- cti_sc = sc;
- sc += 3;
- max_insns -= 3;
- }
- icount += 2;
- pc += 4;
- if (IDESC_CTI_P (idesc))
- {
- SET_CTI_VPC (cti_sc);
- break;
- }
- }
- else /* 2 serial 16 bit insns */
- {
- /* Only emit before/after handlers if necessary. */
- if (trace_p || profile_p)
- {
- idesc = emit_full16 (current_cpu, pc, insn >> 16, sc,
- trace_p, profile_p);
- cti_sc = sc + 1;
- sc += 3;
- max_insns -= 3;
- }
- else
- {
- idesc = emit_16 (current_cpu, pc, insn >> 16, sc, 0, 0);
- cti_sc = sc;
- ++sc;
- --max_insns;
- }
- ++icount;
- pc += 2;
- if (IDESC_CTI_P (idesc))
- {
- SET_CTI_VPC (cti_sc);
- break;
- }
- /* While we're guaranteed that there's room to extract the
- insn, when single stepping we can't; the pbb must stop
- after the first insn. */
- if (max_insns <= 0)
- break;
- /* Use the same trace/profile address for the 2nd insn.
- Saves us having to compute it and they come in pairs
- anyway (e.g. can never branch to the 2nd insn). */
- if (trace_p || profile_p)
- {
- idesc = emit_full16 (current_cpu, pc, insn & 0x7fff, sc,
- trace_p, profile_p);
- cti_sc = sc + 1;
- sc += 3;
- max_insns -= 3;
- }
- else
- {
- idesc = emit_16 (current_cpu, pc, insn & 0x7fff, sc, 0, 0);
- cti_sc = sc;
- ++sc;
- --max_insns;
- }
- ++icount;
- pc += 2;
- if (IDESC_CTI_P (idesc))
- {
- SET_CTI_VPC (cti_sc);
- break;
- }
- }
- }
- }
- }
-
- Finish:
- SET_INSN_COUNT (icount);
-}
-EOF
-
-;;
-
-xfull-exec-pbb)
-
-# Inputs: current_cpu, vpc, FAST_P
-# Outputs: vpc
-# vpc is the virtual program counter.
-
-cat <<EOF
-#define DEFINE_SWITCH
-#include "semx-switch.c"
-EOF
-
-;;
-
-*)
- echo "Invalid argument to mainloop.in: $1" >&2
- exit 1
- ;;
-
-esac
diff --git a/sim/m32r/model.c b/sim/m32r/model.c
deleted file mode 100644
index 87485bab2dc..00000000000
--- a/sim/m32r/model.c
+++ /dev/null
@@ -1,4168 +0,0 @@
-/* Simulator model support for m32rbf.
-
-THIS FILE IS MACHINE GENERATED WITH CGEN.
-
-Copyright (C) 1996, 1997, 1998, 1999, 2000 Free Software Foundation, Inc.
-
-This file is part of the GNU Simulators.
-
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License along
-with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
-*/
-
-#define WANT_CPU m32rbf
-#define WANT_CPU_M32RBF
-
-#include "sim-main.h"
-
-/* The profiling data is recorded here, but is accessed via the profiling
- mechanism. After all, this is information for profiling. */
-
-#if WITH_PROFILE_MODEL_P
-
-/* Model handlers for each insn. */
-
-static int
-model_m32r_d_add (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = -1;
- INT in_dr = -1;
- INT out_dr = -1;
- in_sr = FLD (in_sr);
- in_dr = FLD (in_dr);
- out_dr = FLD (out_dr);
- referenced |= 1 << 0;
- referenced |= 1 << 1;
- referenced |= 1 << 2;
- cycles += m32rbf_model_m32r_d_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32r_d_add3 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add3.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = -1;
- INT in_dr = -1;
- INT out_dr = -1;
- in_sr = FLD (in_sr);
- out_dr = FLD (out_dr);
- referenced |= 1 << 0;
- referenced |= 1 << 2;
- cycles += m32rbf_model_m32r_d_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32r_d_and (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = -1;
- INT in_dr = -1;
- INT out_dr = -1;
- in_sr = FLD (in_sr);
- in_dr = FLD (in_dr);
- out_dr = FLD (out_dr);
- referenced |= 1 << 0;
- referenced |= 1 << 1;
- referenced |= 1 << 2;
- cycles += m32rbf_model_m32r_d_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32r_d_and3 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_and3.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = -1;
- INT in_dr = -1;
- INT out_dr = -1;
- in_sr = FLD (in_sr);
- out_dr = FLD (out_dr);
- referenced |= 1 << 0;
- referenced |= 1 << 2;
- cycles += m32rbf_model_m32r_d_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32r_d_or (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = -1;
- INT in_dr = -1;
- INT out_dr = -1;
- in_sr = FLD (in_sr);
- in_dr = FLD (in_dr);
- out_dr = FLD (out_dr);
- referenced |= 1 << 0;
- referenced |= 1 << 1;
- referenced |= 1 << 2;
- cycles += m32rbf_model_m32r_d_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32r_d_or3 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_and3.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = -1;
- INT in_dr = -1;
- INT out_dr = -1;
- in_sr = FLD (in_sr);
- out_dr = FLD (out_dr);
- referenced |= 1 << 0;
- referenced |= 1 << 2;
- cycles += m32rbf_model_m32r_d_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32r_d_xor (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = -1;
- INT in_dr = -1;
- INT out_dr = -1;
- in_sr = FLD (in_sr);
- in_dr = FLD (in_dr);
- out_dr = FLD (out_dr);
- referenced |= 1 << 0;
- referenced |= 1 << 1;
- referenced |= 1 << 2;
- cycles += m32rbf_model_m32r_d_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32r_d_xor3 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_and3.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = -1;
- INT in_dr = -1;
- INT out_dr = -1;
- in_sr = FLD (in_sr);
- out_dr = FLD (out_dr);
- referenced |= 1 << 0;
- referenced |= 1 << 2;
- cycles += m32rbf_model_m32r_d_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32r_d_addi (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_addi.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = -1;
- INT in_dr = -1;
- INT out_dr = -1;
- in_dr = FLD (in_dr);
- out_dr = FLD (out_dr);
- referenced |= 1 << 1;
- referenced |= 1 << 2;
- cycles += m32rbf_model_m32r_d_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32r_d_addv (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = -1;
- INT in_dr = -1;
- INT out_dr = -1;
- in_sr = FLD (in_sr);
- in_dr = FLD (in_dr);
- out_dr = FLD (out_dr);
- referenced |= 1 << 0;
- referenced |= 1 << 1;
- referenced |= 1 << 2;
- cycles += m32rbf_model_m32r_d_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32r_d_addv3 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add3.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = -1;
- INT in_dr = -1;
- INT out_dr = -1;
- in_sr = FLD (in_sr);
- out_dr = FLD (out_dr);
- referenced |= 1 << 0;
- referenced |= 1 << 2;
- cycles += m32rbf_model_m32r_d_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32r_d_addx (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = -1;
- INT in_dr = -1;
- INT out_dr = -1;
- in_sr = FLD (in_sr);
- in_dr = FLD (in_dr);
- out_dr = FLD (out_dr);
- referenced |= 1 << 0;
- referenced |= 1 << 1;
- referenced |= 1 << 2;
- cycles += m32rbf_model_m32r_d_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32r_d_bc8 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_bl8.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = -1;
- if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
- cycles += m32rbf_model_m32r_d_u_cti (current_cpu, idesc, 0, referenced, in_sr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32r_d_bc24 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_bl24.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = -1;
- if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
- cycles += m32rbf_model_m32r_d_u_cti (current_cpu, idesc, 0, referenced, in_sr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32r_d_beq (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_beq.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = -1;
- if (insn_referenced & (1 << 3)) referenced |= 1 << 1;
- cycles += m32rbf_model_m32r_d_u_cti (current_cpu, idesc, 0, referenced, in_sr);
- }
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_src1 = -1;
- INT in_src2 = -1;
- in_src1 = FLD (in_src1);
- in_src2 = FLD (in_src2);
- referenced |= 1 << 0;
- referenced |= 1 << 1;
- cycles += m32rbf_model_m32r_d_u_cmp (current_cpu, idesc, 1, referenced, in_src1, in_src2);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32r_d_beqz (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_beq.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = -1;
- if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
- cycles += m32rbf_model_m32r_d_u_cti (current_cpu, idesc, 0, referenced, in_sr);
- }
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_src1 = -1;
- INT in_src2 = -1;
- in_src2 = FLD (in_src2);
- referenced |= 1 << 1;
- cycles += m32rbf_model_m32r_d_u_cmp (current_cpu, idesc, 1, referenced, in_src1, in_src2);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32r_d_bgez (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_beq.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = -1;
- if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
- cycles += m32rbf_model_m32r_d_u_cti (current_cpu, idesc, 0, referenced, in_sr);
- }
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_src1 = -1;
- INT in_src2 = -1;
- in_src2 = FLD (in_src2);
- referenced |= 1 << 1;
- cycles += m32rbf_model_m32r_d_u_cmp (current_cpu, idesc, 1, referenced, in_src1, in_src2);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32r_d_bgtz (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_beq.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = -1;
- if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
- cycles += m32rbf_model_m32r_d_u_cti (current_cpu, idesc, 0, referenced, in_sr);
- }
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_src1 = -1;
- INT in_src2 = -1;
- in_src2 = FLD (in_src2);
- referenced |= 1 << 1;
- cycles += m32rbf_model_m32r_d_u_cmp (current_cpu, idesc, 1, referenced, in_src1, in_src2);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32r_d_blez (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_beq.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = -1;
- if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
- cycles += m32rbf_model_m32r_d_u_cti (current_cpu, idesc, 0, referenced, in_sr);
- }
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_src1 = -1;
- INT in_src2 = -1;
- in_src2 = FLD (in_src2);
- referenced |= 1 << 1;
- cycles += m32rbf_model_m32r_d_u_cmp (current_cpu, idesc, 1, referenced, in_src1, in_src2);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32r_d_bltz (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_beq.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = -1;
- if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
- cycles += m32rbf_model_m32r_d_u_cti (current_cpu, idesc, 0, referenced, in_sr);
- }
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_src1 = -1;
- INT in_src2 = -1;
- in_src2 = FLD (in_src2);
- referenced |= 1 << 1;
- cycles += m32rbf_model_m32r_d_u_cmp (current_cpu, idesc, 1, referenced, in_src1, in_src2);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32r_d_bnez (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_beq.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = -1;
- if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
- cycles += m32rbf_model_m32r_d_u_cti (current_cpu, idesc, 0, referenced, in_sr);
- }
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_src1 = -1;
- INT in_src2 = -1;
- in_src2 = FLD (in_src2);
- referenced |= 1 << 1;
- cycles += m32rbf_model_m32r_d_u_cmp (current_cpu, idesc, 1, referenced, in_src1, in_src2);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32r_d_bl8 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_bl8.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = -1;
- referenced |= 1 << 1;
- cycles += m32rbf_model_m32r_d_u_cti (current_cpu, idesc, 0, referenced, in_sr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32r_d_bl24 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_bl24.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = -1;
- referenced |= 1 << 1;
- cycles += m32rbf_model_m32r_d_u_cti (current_cpu, idesc, 0, referenced, in_sr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32r_d_bnc8 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_bl8.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = -1;
- if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
- cycles += m32rbf_model_m32r_d_u_cti (current_cpu, idesc, 0, referenced, in_sr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32r_d_bnc24 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_bl24.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = -1;
- if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
- cycles += m32rbf_model_m32r_d_u_cti (current_cpu, idesc, 0, referenced, in_sr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32r_d_bne (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_beq.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = -1;
- if (insn_referenced & (1 << 3)) referenced |= 1 << 1;
- cycles += m32rbf_model_m32r_d_u_cti (current_cpu, idesc, 0, referenced, in_sr);
- }
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_src1 = -1;
- INT in_src2 = -1;
- in_src1 = FLD (in_src1);
- in_src2 = FLD (in_src2);
- referenced |= 1 << 0;
- referenced |= 1 << 1;
- cycles += m32rbf_model_m32r_d_u_cmp (current_cpu, idesc, 1, referenced, in_src1, in_src2);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32r_d_bra8 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_bl8.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = -1;
- referenced |= 1 << 1;
- cycles += m32rbf_model_m32r_d_u_cti (current_cpu, idesc, 0, referenced, in_sr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32r_d_bra24 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_bl24.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = -1;
- referenced |= 1 << 1;
- cycles += m32rbf_model_m32r_d_u_cti (current_cpu, idesc, 0, referenced, in_sr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32r_d_cmp (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_st_plus.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_src1 = -1;
- INT in_src2 = -1;
- in_src1 = FLD (in_src1);
- in_src2 = FLD (in_src2);
- referenced |= 1 << 0;
- referenced |= 1 << 1;
- cycles += m32rbf_model_m32r_d_u_cmp (current_cpu, idesc, 0, referenced, in_src1, in_src2);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32r_d_cmpi (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_st_d.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_src1 = -1;
- INT in_src2 = -1;
- in_src2 = FLD (in_src2);
- referenced |= 1 << 1;
- cycles += m32rbf_model_m32r_d_u_cmp (current_cpu, idesc, 0, referenced, in_src1, in_src2);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32r_d_cmpu (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_st_plus.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_src1 = -1;
- INT in_src2 = -1;
- in_src1 = FLD (in_src1);
- in_src2 = FLD (in_src2);
- referenced |= 1 << 0;
- referenced |= 1 << 1;
- cycles += m32rbf_model_m32r_d_u_cmp (current_cpu, idesc, 0, referenced, in_src1, in_src2);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32r_d_cmpui (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_st_d.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_src1 = -1;
- INT in_src2 = -1;
- in_src2 = FLD (in_src2);
- referenced |= 1 << 1;
- cycles += m32rbf_model_m32r_d_u_cmp (current_cpu, idesc, 0, referenced, in_src1, in_src2);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32r_d_div (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = -1;
- INT in_dr = -1;
- INT out_dr = -1;
- in_sr = FLD (in_sr);
- in_dr = FLD (in_dr);
- out_dr = FLD (out_dr);
- referenced |= 1 << 0;
- if (insn_referenced & (1 << 0)) referenced |= 1 << 1;
- if (insn_referenced & (1 << 2)) referenced |= 1 << 2;
- cycles += m32rbf_model_m32r_d_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32r_d_divu (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = -1;
- INT in_dr = -1;
- INT out_dr = -1;
- in_sr = FLD (in_sr);
- in_dr = FLD (in_dr);
- out_dr = FLD (out_dr);
- referenced |= 1 << 0;
- if (insn_referenced & (1 << 0)) referenced |= 1 << 1;
- if (insn_referenced & (1 << 2)) referenced |= 1 << 2;
- cycles += m32rbf_model_m32r_d_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32r_d_rem (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = -1;
- INT in_dr = -1;
- INT out_dr = -1;
- in_sr = FLD (in_sr);
- in_dr = FLD (in_dr);
- out_dr = FLD (out_dr);
- referenced |= 1 << 0;
- if (insn_referenced & (1 << 0)) referenced |= 1 << 1;
- if (insn_referenced & (1 << 2)) referenced |= 1 << 2;
- cycles += m32rbf_model_m32r_d_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32r_d_remu (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = -1;
- INT in_dr = -1;
- INT out_dr = -1;
- in_sr = FLD (in_sr);
- in_dr = FLD (in_dr);
- out_dr = FLD (out_dr);
- referenced |= 1 << 0;
- if (insn_referenced & (1 << 0)) referenced |= 1 << 1;
- if (insn_referenced & (1 << 2)) referenced |= 1 << 2;
- cycles += m32rbf_model_m32r_d_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32r_d_jl (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_jl.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = -1;
- in_sr = FLD (in_sr);
- referenced |= 1 << 0;
- referenced |= 1 << 1;
- cycles += m32rbf_model_m32r_d_u_cti (current_cpu, idesc, 0, referenced, in_sr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32r_d_jmp (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_jl.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = -1;
- in_sr = FLD (in_sr);
- referenced |= 1 << 0;
- referenced |= 1 << 1;
- cycles += m32rbf_model_m32r_d_u_cti (current_cpu, idesc, 0, referenced, in_sr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32r_d_ld (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ld_plus.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = 0;
- INT out_dr = 0;
- in_sr = FLD (in_sr);
- out_dr = FLD (out_dr);
- referenced |= 1 << 0;
- referenced |= 1 << 1;
- cycles += m32rbf_model_m32r_d_u_load (current_cpu, idesc, 0, referenced, in_sr, out_dr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32r_d_ld_d (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add3.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = 0;
- INT out_dr = 0;
- in_sr = FLD (in_sr);
- out_dr = FLD (out_dr);
- referenced |= 1 << 0;
- referenced |= 1 << 1;
- cycles += m32rbf_model_m32r_d_u_load (current_cpu, idesc, 0, referenced, in_sr, out_dr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32r_d_ldb (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ld_plus.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = 0;
- INT out_dr = 0;
- in_sr = FLD (in_sr);
- out_dr = FLD (out_dr);
- referenced |= 1 << 0;
- referenced |= 1 << 1;
- cycles += m32rbf_model_m32r_d_u_load (current_cpu, idesc, 0, referenced, in_sr, out_dr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32r_d_ldb_d (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add3.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = 0;
- INT out_dr = 0;
- in_sr = FLD (in_sr);
- out_dr = FLD (out_dr);
- referenced |= 1 << 0;
- referenced |= 1 << 1;
- cycles += m32rbf_model_m32r_d_u_load (current_cpu, idesc, 0, referenced, in_sr, out_dr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32r_d_ldh (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ld_plus.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = 0;
- INT out_dr = 0;
- in_sr = FLD (in_sr);
- out_dr = FLD (out_dr);
- referenced |= 1 << 0;
- referenced |= 1 << 1;
- cycles += m32rbf_model_m32r_d_u_load (current_cpu, idesc, 0, referenced, in_sr, out_dr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32r_d_ldh_d (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add3.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = 0;
- INT out_dr = 0;
- in_sr = FLD (in_sr);
- out_dr = FLD (out_dr);
- referenced |= 1 << 0;
- referenced |= 1 << 1;
- cycles += m32rbf_model_m32r_d_u_load (current_cpu, idesc, 0, referenced, in_sr, out_dr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32r_d_ldub (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ld_plus.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = 0;
- INT out_dr = 0;
- in_sr = FLD (in_sr);
- out_dr = FLD (out_dr);
- referenced |= 1 << 0;
- referenced |= 1 << 1;
- cycles += m32rbf_model_m32r_d_u_load (current_cpu, idesc, 0, referenced, in_sr, out_dr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32r_d_ldub_d (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add3.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = 0;
- INT out_dr = 0;
- in_sr = FLD (in_sr);
- out_dr = FLD (out_dr);
- referenced |= 1 << 0;
- referenced |= 1 << 1;
- cycles += m32rbf_model_m32r_d_u_load (current_cpu, idesc, 0, referenced, in_sr, out_dr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32r_d_lduh (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ld_plus.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = 0;
- INT out_dr = 0;
- in_sr = FLD (in_sr);
- out_dr = FLD (out_dr);
- referenced |= 1 << 0;
- referenced |= 1 << 1;
- cycles += m32rbf_model_m32r_d_u_load (current_cpu, idesc, 0, referenced, in_sr, out_dr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32r_d_lduh_d (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add3.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = 0;
- INT out_dr = 0;
- in_sr = FLD (in_sr);
- out_dr = FLD (out_dr);
- referenced |= 1 << 0;
- referenced |= 1 << 1;
- cycles += m32rbf_model_m32r_d_u_load (current_cpu, idesc, 0, referenced, in_sr, out_dr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32r_d_ld_plus (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ld_plus.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = 0;
- INT out_dr = 0;
- in_sr = FLD (in_sr);
- out_dr = FLD (out_dr);
- referenced |= 1 << 0;
- referenced |= 1 << 1;
- cycles += m32rbf_model_m32r_d_u_load (current_cpu, idesc, 0, referenced, in_sr, out_dr);
- }
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = -1;
- INT in_dr = -1;
- INT out_dr = -1;
- in_dr = FLD (in_sr);
- out_dr = FLD (out_sr);
- referenced |= 1 << 0;
- referenced |= 1 << 2;
- cycles += m32rbf_model_m32r_d_u_exec (current_cpu, idesc, 1, referenced, in_sr, in_dr, out_dr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32r_d_ld24 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ld24.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = -1;
- INT in_dr = -1;
- INT out_dr = -1;
- out_dr = FLD (out_dr);
- referenced |= 1 << 2;
- cycles += m32rbf_model_m32r_d_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32r_d_ldi8 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_addi.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = -1;
- INT in_dr = -1;
- INT out_dr = -1;
- out_dr = FLD (out_dr);
- referenced |= 1 << 2;
- cycles += m32rbf_model_m32r_d_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32r_d_ldi16 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add3.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = -1;
- INT in_dr = -1;
- INT out_dr = -1;
- out_dr = FLD (out_dr);
- referenced |= 1 << 2;
- cycles += m32rbf_model_m32r_d_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32r_d_lock (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ld_plus.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = 0;
- INT out_dr = 0;
- in_sr = FLD (in_sr);
- out_dr = FLD (out_dr);
- referenced |= 1 << 0;
- referenced |= 1 << 1;
- cycles += m32rbf_model_m32r_d_u_load (current_cpu, idesc, 0, referenced, in_sr, out_dr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32r_d_machi (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_st_plus.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_src1 = -1;
- INT in_src2 = -1;
- in_src1 = FLD (in_src1);
- in_src2 = FLD (in_src2);
- referenced |= 1 << 0;
- referenced |= 1 << 1;
- cycles += m32rbf_model_m32r_d_u_mac (current_cpu, idesc, 0, referenced, in_src1, in_src2);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32r_d_maclo (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_st_plus.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_src1 = -1;
- INT in_src2 = -1;
- in_src1 = FLD (in_src1);
- in_src2 = FLD (in_src2);
- referenced |= 1 << 0;
- referenced |= 1 << 1;
- cycles += m32rbf_model_m32r_d_u_mac (current_cpu, idesc, 0, referenced, in_src1, in_src2);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32r_d_macwhi (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_st_plus.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_src1 = -1;
- INT in_src2 = -1;
- in_src1 = FLD (in_src1);
- in_src2 = FLD (in_src2);
- referenced |= 1 << 0;
- referenced |= 1 << 1;
- cycles += m32rbf_model_m32r_d_u_mac (current_cpu, idesc, 0, referenced, in_src1, in_src2);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32r_d_macwlo (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_st_plus.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_src1 = -1;
- INT in_src2 = -1;
- in_src1 = FLD (in_src1);
- in_src2 = FLD (in_src2);
- referenced |= 1 << 0;
- referenced |= 1 << 1;
- cycles += m32rbf_model_m32r_d_u_mac (current_cpu, idesc, 0, referenced, in_src1, in_src2);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32r_d_mul (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = -1;
- INT in_dr = -1;
- INT out_dr = -1;
- in_sr = FLD (in_sr);
- in_dr = FLD (in_dr);
- out_dr = FLD (out_dr);
- referenced |= 1 << 0;
- referenced |= 1 << 1;
- referenced |= 1 << 2;
- cycles += m32rbf_model_m32r_d_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32r_d_mulhi (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_st_plus.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_src1 = -1;
- INT in_src2 = -1;
- in_src1 = FLD (in_src1);
- in_src2 = FLD (in_src2);
- referenced |= 1 << 0;
- referenced |= 1 << 1;
- cycles += m32rbf_model_m32r_d_u_mac (current_cpu, idesc, 0, referenced, in_src1, in_src2);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32r_d_mullo (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_st_plus.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_src1 = -1;
- INT in_src2 = -1;
- in_src1 = FLD (in_src1);
- in_src2 = FLD (in_src2);
- referenced |= 1 << 0;
- referenced |= 1 << 1;
- cycles += m32rbf_model_m32r_d_u_mac (current_cpu, idesc, 0, referenced, in_src1, in_src2);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32r_d_mulwhi (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_st_plus.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_src1 = -1;
- INT in_src2 = -1;
- in_src1 = FLD (in_src1);
- in_src2 = FLD (in_src2);
- referenced |= 1 << 0;
- referenced |= 1 << 1;
- cycles += m32rbf_model_m32r_d_u_mac (current_cpu, idesc, 0, referenced, in_src1, in_src2);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32r_d_mulwlo (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_st_plus.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_src1 = -1;
- INT in_src2 = -1;
- in_src1 = FLD (in_src1);
- in_src2 = FLD (in_src2);
- referenced |= 1 << 0;
- referenced |= 1 << 1;
- cycles += m32rbf_model_m32r_d_u_mac (current_cpu, idesc, 0, referenced, in_src1, in_src2);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32r_d_mv (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ld_plus.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = -1;
- INT in_dr = -1;
- INT out_dr = -1;
- in_sr = FLD (in_sr);
- out_dr = FLD (out_dr);
- referenced |= 1 << 0;
- referenced |= 1 << 2;
- cycles += m32rbf_model_m32r_d_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32r_d_mvfachi (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_seth.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = -1;
- INT in_dr = -1;
- INT out_dr = -1;
- out_dr = FLD (out_dr);
- referenced |= 1 << 2;
- cycles += m32rbf_model_m32r_d_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32r_d_mvfaclo (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_seth.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = -1;
- INT in_dr = -1;
- INT out_dr = -1;
- out_dr = FLD (out_dr);
- referenced |= 1 << 2;
- cycles += m32rbf_model_m32r_d_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32r_d_mvfacmi (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_seth.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = -1;
- INT in_dr = -1;
- INT out_dr = -1;
- out_dr = FLD (out_dr);
- referenced |= 1 << 2;
- cycles += m32rbf_model_m32r_d_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32r_d_mvfc (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ld_plus.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = -1;
- INT in_dr = -1;
- INT out_dr = -1;
- out_dr = FLD (out_dr);
- referenced |= 1 << 2;
- cycles += m32rbf_model_m32r_d_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32r_d_mvtachi (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_st_plus.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = -1;
- INT in_dr = -1;
- INT out_dr = -1;
- in_sr = FLD (in_src1);
- cycles += m32rbf_model_m32r_d_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32r_d_mvtaclo (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_st_plus.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = -1;
- INT in_dr = -1;
- INT out_dr = -1;
- in_sr = FLD (in_src1);
- cycles += m32rbf_model_m32r_d_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32r_d_mvtc (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ld_plus.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = -1;
- INT in_dr = -1;
- INT out_dr = -1;
- in_sr = FLD (in_sr);
- referenced |= 1 << 0;
- cycles += m32rbf_model_m32r_d_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32r_d_neg (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ld_plus.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = -1;
- INT in_dr = -1;
- INT out_dr = -1;
- in_sr = FLD (in_sr);
- out_dr = FLD (out_dr);
- referenced |= 1 << 0;
- referenced |= 1 << 2;
- cycles += m32rbf_model_m32r_d_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32r_d_nop (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.fmt_empty.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = -1;
- INT in_dr = -1;
- INT out_dr = -1;
- cycles += m32rbf_model_m32r_d_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32r_d_not (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ld_plus.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = -1;
- INT in_dr = -1;
- INT out_dr = -1;
- in_sr = FLD (in_sr);
- out_dr = FLD (out_dr);
- referenced |= 1 << 0;
- referenced |= 1 << 2;
- cycles += m32rbf_model_m32r_d_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32r_d_rac (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.fmt_empty.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_src1 = -1;
- INT in_src2 = -1;
- cycles += m32rbf_model_m32r_d_u_mac (current_cpu, idesc, 0, referenced, in_src1, in_src2);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32r_d_rach (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.fmt_empty.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_src1 = -1;
- INT in_src2 = -1;
- cycles += m32rbf_model_m32r_d_u_mac (current_cpu, idesc, 0, referenced, in_src1, in_src2);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32r_d_rte (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.fmt_empty.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = -1;
- INT in_dr = -1;
- INT out_dr = -1;
- cycles += m32rbf_model_m32r_d_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32r_d_seth (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_seth.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = -1;
- INT in_dr = -1;
- INT out_dr = -1;
- out_dr = FLD (out_dr);
- referenced |= 1 << 2;
- cycles += m32rbf_model_m32r_d_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32r_d_sll (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = -1;
- INT in_dr = -1;
- INT out_dr = -1;
- in_sr = FLD (in_sr);
- in_dr = FLD (in_dr);
- out_dr = FLD (out_dr);
- referenced |= 1 << 0;
- referenced |= 1 << 1;
- referenced |= 1 << 2;
- cycles += m32rbf_model_m32r_d_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32r_d_sll3 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add3.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = -1;
- INT in_dr = -1;
- INT out_dr = -1;
- in_sr = FLD (in_sr);
- out_dr = FLD (out_dr);
- referenced |= 1 << 0;
- referenced |= 1 << 2;
- cycles += m32rbf_model_m32r_d_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32r_d_slli (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_slli.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = -1;
- INT in_dr = -1;
- INT out_dr = -1;
- in_dr = FLD (in_dr);
- out_dr = FLD (out_dr);
- referenced |= 1 << 1;
- referenced |= 1 << 2;
- cycles += m32rbf_model_m32r_d_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32r_d_sra (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = -1;
- INT in_dr = -1;
- INT out_dr = -1;
- in_sr = FLD (in_sr);
- in_dr = FLD (in_dr);
- out_dr = FLD (out_dr);
- referenced |= 1 << 0;
- referenced |= 1 << 1;
- referenced |= 1 << 2;
- cycles += m32rbf_model_m32r_d_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32r_d_sra3 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add3.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = -1;
- INT in_dr = -1;
- INT out_dr = -1;
- in_sr = FLD (in_sr);
- out_dr = FLD (out_dr);
- referenced |= 1 << 0;
- referenced |= 1 << 2;
- cycles += m32rbf_model_m32r_d_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32r_d_srai (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_slli.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = -1;
- INT in_dr = -1;
- INT out_dr = -1;
- in_dr = FLD (in_dr);
- out_dr = FLD (out_dr);
- referenced |= 1 << 1;
- referenced |= 1 << 2;
- cycles += m32rbf_model_m32r_d_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32r_d_srl (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = -1;
- INT in_dr = -1;
- INT out_dr = -1;
- in_sr = FLD (in_sr);
- in_dr = FLD (in_dr);
- out_dr = FLD (out_dr);
- referenced |= 1 << 0;
- referenced |= 1 << 1;
- referenced |= 1 << 2;
- cycles += m32rbf_model_m32r_d_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32r_d_srl3 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add3.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = -1;
- INT in_dr = -1;
- INT out_dr = -1;
- in_sr = FLD (in_sr);
- out_dr = FLD (out_dr);
- referenced |= 1 << 0;
- referenced |= 1 << 2;
- cycles += m32rbf_model_m32r_d_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32r_d_srli (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_slli.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = -1;
- INT in_dr = -1;
- INT out_dr = -1;
- in_dr = FLD (in_dr);
- out_dr = FLD (out_dr);
- referenced |= 1 << 1;
- referenced |= 1 << 2;
- cycles += m32rbf_model_m32r_d_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32r_d_st (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_st_plus.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_src1 = 0;
- INT in_src2 = 0;
- in_src1 = FLD (in_src1);
- in_src2 = FLD (in_src2);
- referenced |= 1 << 0;
- referenced |= 1 << 1;
- cycles += m32rbf_model_m32r_d_u_store (current_cpu, idesc, 0, referenced, in_src1, in_src2);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32r_d_st_d (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_st_d.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_src1 = 0;
- INT in_src2 = 0;
- in_src1 = FLD (in_src1);
- in_src2 = FLD (in_src2);
- referenced |= 1 << 0;
- referenced |= 1 << 1;
- cycles += m32rbf_model_m32r_d_u_store (current_cpu, idesc, 0, referenced, in_src1, in_src2);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32r_d_stb (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_st_plus.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_src1 = 0;
- INT in_src2 = 0;
- in_src1 = FLD (in_src1);
- in_src2 = FLD (in_src2);
- referenced |= 1 << 0;
- referenced |= 1 << 1;
- cycles += m32rbf_model_m32r_d_u_store (current_cpu, idesc, 0, referenced, in_src1, in_src2);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32r_d_stb_d (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_st_d.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_src1 = 0;
- INT in_src2 = 0;
- in_src1 = FLD (in_src1);
- in_src2 = FLD (in_src2);
- referenced |= 1 << 0;
- referenced |= 1 << 1;
- cycles += m32rbf_model_m32r_d_u_store (current_cpu, idesc, 0, referenced, in_src1, in_src2);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32r_d_sth (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_st_plus.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_src1 = 0;
- INT in_src2 = 0;
- in_src1 = FLD (in_src1);
- in_src2 = FLD (in_src2);
- referenced |= 1 << 0;
- referenced |= 1 << 1;
- cycles += m32rbf_model_m32r_d_u_store (current_cpu, idesc, 0, referenced, in_src1, in_src2);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32r_d_sth_d (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_st_d.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_src1 = 0;
- INT in_src2 = 0;
- in_src1 = FLD (in_src1);
- in_src2 = FLD (in_src2);
- referenced |= 1 << 0;
- referenced |= 1 << 1;
- cycles += m32rbf_model_m32r_d_u_store (current_cpu, idesc, 0, referenced, in_src1, in_src2);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32r_d_st_plus (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_st_plus.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_src1 = 0;
- INT in_src2 = 0;
- in_src1 = FLD (in_src1);
- in_src2 = FLD (in_src2);
- referenced |= 1 << 0;
- referenced |= 1 << 1;
- cycles += m32rbf_model_m32r_d_u_store (current_cpu, idesc, 0, referenced, in_src1, in_src2);
- }
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = -1;
- INT in_dr = -1;
- INT out_dr = -1;
- in_dr = FLD (in_src2);
- out_dr = FLD (out_src2);
- cycles += m32rbf_model_m32r_d_u_exec (current_cpu, idesc, 1, referenced, in_sr, in_dr, out_dr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32r_d_st_minus (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_st_plus.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_src1 = 0;
- INT in_src2 = 0;
- in_src1 = FLD (in_src1);
- in_src2 = FLD (in_src2);
- referenced |= 1 << 0;
- referenced |= 1 << 1;
- cycles += m32rbf_model_m32r_d_u_store (current_cpu, idesc, 0, referenced, in_src1, in_src2);
- }
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = -1;
- INT in_dr = -1;
- INT out_dr = -1;
- in_dr = FLD (in_src2);
- out_dr = FLD (out_src2);
- cycles += m32rbf_model_m32r_d_u_exec (current_cpu, idesc, 1, referenced, in_sr, in_dr, out_dr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32r_d_sub (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = -1;
- INT in_dr = -1;
- INT out_dr = -1;
- in_sr = FLD (in_sr);
- in_dr = FLD (in_dr);
- out_dr = FLD (out_dr);
- referenced |= 1 << 0;
- referenced |= 1 << 1;
- referenced |= 1 << 2;
- cycles += m32rbf_model_m32r_d_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32r_d_subv (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = -1;
- INT in_dr = -1;
- INT out_dr = -1;
- in_sr = FLD (in_sr);
- in_dr = FLD (in_dr);
- out_dr = FLD (out_dr);
- referenced |= 1 << 0;
- referenced |= 1 << 1;
- referenced |= 1 << 2;
- cycles += m32rbf_model_m32r_d_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32r_d_subx (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = -1;
- INT in_dr = -1;
- INT out_dr = -1;
- in_sr = FLD (in_sr);
- in_dr = FLD (in_dr);
- out_dr = FLD (out_dr);
- referenced |= 1 << 0;
- referenced |= 1 << 1;
- referenced |= 1 << 2;
- cycles += m32rbf_model_m32r_d_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32r_d_trap (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_trap.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = -1;
- INT in_dr = -1;
- INT out_dr = -1;
- cycles += m32rbf_model_m32r_d_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32r_d_unlock (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_st_plus.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = 0;
- INT out_dr = 0;
- cycles += m32rbf_model_m32r_d_u_load (current_cpu, idesc, 0, referenced, in_sr, out_dr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_test_add (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_test_add3 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add3.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_test_and (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_test_and3 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_and3.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_test_or (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_test_or3 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_and3.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_test_xor (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_test_xor3 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_and3.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_test_addi (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_addi.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_test_addv (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_test_addv3 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add3.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_test_addx (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_test_bc8 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_bl8.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_test_bc24 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_bl24.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_test_beq (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_beq.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_test_beqz (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_beq.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_test_bgez (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_beq.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_test_bgtz (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_beq.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_test_blez (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_beq.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_test_bltz (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_beq.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_test_bnez (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_beq.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_test_bl8 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_bl8.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_test_bl24 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_bl24.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_test_bnc8 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_bl8.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_test_bnc24 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_bl24.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_test_bne (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_beq.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_test_bra8 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_bl8.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_test_bra24 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_bl24.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_test_cmp (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_st_plus.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_test_cmpi (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_st_d.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_test_cmpu (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_st_plus.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_test_cmpui (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_st_d.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_test_div (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_test_divu (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_test_rem (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_test_remu (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_test_jl (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_jl.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_test_jmp (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_jl.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_test_ld (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ld_plus.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_test_ld_d (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add3.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_test_ldb (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ld_plus.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_test_ldb_d (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add3.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_test_ldh (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ld_plus.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_test_ldh_d (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add3.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_test_ldub (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ld_plus.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_test_ldub_d (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add3.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_test_lduh (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ld_plus.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_test_lduh_d (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add3.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_test_ld_plus (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ld_plus.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_test_ld24 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ld24.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_test_ldi8 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_addi.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_test_ldi16 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add3.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_test_lock (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ld_plus.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_test_machi (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_st_plus.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_test_maclo (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_st_plus.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_test_macwhi (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_st_plus.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_test_macwlo (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_st_plus.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_test_mul (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_test_mulhi (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_st_plus.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_test_mullo (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_st_plus.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_test_mulwhi (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_st_plus.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_test_mulwlo (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_st_plus.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_test_mv (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ld_plus.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_test_mvfachi (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_seth.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_test_mvfaclo (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_seth.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_test_mvfacmi (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_seth.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_test_mvfc (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ld_plus.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_test_mvtachi (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_st_plus.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_test_mvtaclo (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_st_plus.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_test_mvtc (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ld_plus.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_test_neg (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ld_plus.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_test_nop (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.fmt_empty.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_test_not (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ld_plus.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_test_rac (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.fmt_empty.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_test_rach (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.fmt_empty.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_test_rte (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.fmt_empty.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_test_seth (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_seth.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_test_sll (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_test_sll3 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add3.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_test_slli (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_slli.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_test_sra (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_test_sra3 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add3.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_test_srai (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_slli.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_test_srl (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_test_srl3 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add3.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_test_srli (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_slli.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_test_st (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_st_plus.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_test_st_d (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_st_d.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_test_stb (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_st_plus.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_test_stb_d (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_st_d.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_test_sth (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_st_plus.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_test_sth_d (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_st_d.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_test_st_plus (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_st_plus.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_test_st_minus (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_st_plus.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_test_sub (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_test_subv (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_test_subx (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_test_trap (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_trap.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_test_unlock (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_st_plus.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced);
- }
- return cycles;
-#undef FLD
-}
-
-/* We assume UNIT_NONE == 0 because the tables don't always terminate
- entries with it. */
-
-/* Model timing data for `m32r/d'. */
-
-static const INSN_TIMING m32r_d_timing[] = {
- { M32RBF_INSN_X_INVALID, 0, { { (int) UNIT_M32R_D_U_EXEC, 1, 1 } } },
- { M32RBF_INSN_X_AFTER, 0, { { (int) UNIT_M32R_D_U_EXEC, 1, 1 } } },
- { M32RBF_INSN_X_BEFORE, 0, { { (int) UNIT_M32R_D_U_EXEC, 1, 1 } } },
- { M32RBF_INSN_X_CTI_CHAIN, 0, { { (int) UNIT_M32R_D_U_EXEC, 1, 1 } } },
- { M32RBF_INSN_X_CHAIN, 0, { { (int) UNIT_M32R_D_U_EXEC, 1, 1 } } },
- { M32RBF_INSN_X_BEGIN, 0, { { (int) UNIT_M32R_D_U_EXEC, 1, 1 } } },
- { M32RBF_INSN_ADD, model_m32r_d_add, { { (int) UNIT_M32R_D_U_EXEC, 1, 1 } } },
- { M32RBF_INSN_ADD3, model_m32r_d_add3, { { (int) UNIT_M32R_D_U_EXEC, 1, 1 } } },
- { M32RBF_INSN_AND, model_m32r_d_and, { { (int) UNIT_M32R_D_U_EXEC, 1, 1 } } },
- { M32RBF_INSN_AND3, model_m32r_d_and3, { { (int) UNIT_M32R_D_U_EXEC, 1, 1 } } },
- { M32RBF_INSN_OR, model_m32r_d_or, { { (int) UNIT_M32R_D_U_EXEC, 1, 1 } } },
- { M32RBF_INSN_OR3, model_m32r_d_or3, { { (int) UNIT_M32R_D_U_EXEC, 1, 1 } } },
- { M32RBF_INSN_XOR, model_m32r_d_xor, { { (int) UNIT_M32R_D_U_EXEC, 1, 1 } } },
- { M32RBF_INSN_XOR3, model_m32r_d_xor3, { { (int) UNIT_M32R_D_U_EXEC, 1, 1 } } },
- { M32RBF_INSN_ADDI, model_m32r_d_addi, { { (int) UNIT_M32R_D_U_EXEC, 1, 1 } } },
- { M32RBF_INSN_ADDV, model_m32r_d_addv, { { (int) UNIT_M32R_D_U_EXEC, 1, 1 } } },
- { M32RBF_INSN_ADDV3, model_m32r_d_addv3, { { (int) UNIT_M32R_D_U_EXEC, 1, 1 } } },
- { M32RBF_INSN_ADDX, model_m32r_d_addx, { { (int) UNIT_M32R_D_U_EXEC, 1, 1 } } },
- { M32RBF_INSN_BC8, model_m32r_d_bc8, { { (int) UNIT_M32R_D_U_CTI, 1, 1 } } },
- { M32RBF_INSN_BC24, model_m32r_d_bc24, { { (int) UNIT_M32R_D_U_CTI, 1, 1 } } },
- { M32RBF_INSN_BEQ, model_m32r_d_beq, { { (int) UNIT_M32R_D_U_CTI, 1, 1 }, { (int) UNIT_M32R_D_U_CMP, 1, 0 } } },
- { M32RBF_INSN_BEQZ, model_m32r_d_beqz, { { (int) UNIT_M32R_D_U_CTI, 1, 1 }, { (int) UNIT_M32R_D_U_CMP, 1, 0 } } },
- { M32RBF_INSN_BGEZ, model_m32r_d_bgez, { { (int) UNIT_M32R_D_U_CTI, 1, 1 }, { (int) UNIT_M32R_D_U_CMP, 1, 0 } } },
- { M32RBF_INSN_BGTZ, model_m32r_d_bgtz, { { (int) UNIT_M32R_D_U_CTI, 1, 1 }, { (int) UNIT_M32R_D_U_CMP, 1, 0 } } },
- { M32RBF_INSN_BLEZ, model_m32r_d_blez, { { (int) UNIT_M32R_D_U_CTI, 1, 1 }, { (int) UNIT_M32R_D_U_CMP, 1, 0 } } },
- { M32RBF_INSN_BLTZ, model_m32r_d_bltz, { { (int) UNIT_M32R_D_U_CTI, 1, 1 }, { (int) UNIT_M32R_D_U_CMP, 1, 0 } } },
- { M32RBF_INSN_BNEZ, model_m32r_d_bnez, { { (int) UNIT_M32R_D_U_CTI, 1, 1 }, { (int) UNIT_M32R_D_U_CMP, 1, 0 } } },
- { M32RBF_INSN_BL8, model_m32r_d_bl8, { { (int) UNIT_M32R_D_U_CTI, 1, 1 } } },
- { M32RBF_INSN_BL24, model_m32r_d_bl24, { { (int) UNIT_M32R_D_U_CTI, 1, 1 } } },
- { M32RBF_INSN_BNC8, model_m32r_d_bnc8, { { (int) UNIT_M32R_D_U_CTI, 1, 1 } } },
- { M32RBF_INSN_BNC24, model_m32r_d_bnc24, { { (int) UNIT_M32R_D_U_CTI, 1, 1 } } },
- { M32RBF_INSN_BNE, model_m32r_d_bne, { { (int) UNIT_M32R_D_U_CTI, 1, 1 }, { (int) UNIT_M32R_D_U_CMP, 1, 0 } } },
- { M32RBF_INSN_BRA8, model_m32r_d_bra8, { { (int) UNIT_M32R_D_U_CTI, 1, 1 } } },
- { M32RBF_INSN_BRA24, model_m32r_d_bra24, { { (int) UNIT_M32R_D_U_CTI, 1, 1 } } },
- { M32RBF_INSN_CMP, model_m32r_d_cmp, { { (int) UNIT_M32R_D_U_CMP, 1, 1 } } },
- { M32RBF_INSN_CMPI, model_m32r_d_cmpi, { { (int) UNIT_M32R_D_U_CMP, 1, 1 } } },
- { M32RBF_INSN_CMPU, model_m32r_d_cmpu, { { (int) UNIT_M32R_D_U_CMP, 1, 1 } } },
- { M32RBF_INSN_CMPUI, model_m32r_d_cmpui, { { (int) UNIT_M32R_D_U_CMP, 1, 1 } } },
- { M32RBF_INSN_DIV, model_m32r_d_div, { { (int) UNIT_M32R_D_U_EXEC, 1, 37 } } },
- { M32RBF_INSN_DIVU, model_m32r_d_divu, { { (int) UNIT_M32R_D_U_EXEC, 1, 37 } } },
- { M32RBF_INSN_REM, model_m32r_d_rem, { { (int) UNIT_M32R_D_U_EXEC, 1, 37 } } },
- { M32RBF_INSN_REMU, model_m32r_d_remu, { { (int) UNIT_M32R_D_U_EXEC, 1, 37 } } },
- { M32RBF_INSN_JL, model_m32r_d_jl, { { (int) UNIT_M32R_D_U_CTI, 1, 1 } } },
- { M32RBF_INSN_JMP, model_m32r_d_jmp, { { (int) UNIT_M32R_D_U_CTI, 1, 1 } } },
- { M32RBF_INSN_LD, model_m32r_d_ld, { { (int) UNIT_M32R_D_U_LOAD, 1, 1 } } },
- { M32RBF_INSN_LD_D, model_m32r_d_ld_d, { { (int) UNIT_M32R_D_U_LOAD, 1, 2 } } },
- { M32RBF_INSN_LDB, model_m32r_d_ldb, { { (int) UNIT_M32R_D_U_LOAD, 1, 1 } } },
- { M32RBF_INSN_LDB_D, model_m32r_d_ldb_d, { { (int) UNIT_M32R_D_U_LOAD, 1, 2 } } },
- { M32RBF_INSN_LDH, model_m32r_d_ldh, { { (int) UNIT_M32R_D_U_LOAD, 1, 1 } } },
- { M32RBF_INSN_LDH_D, model_m32r_d_ldh_d, { { (int) UNIT_M32R_D_U_LOAD, 1, 2 } } },
- { M32RBF_INSN_LDUB, model_m32r_d_ldub, { { (int) UNIT_M32R_D_U_LOAD, 1, 1 } } },
- { M32RBF_INSN_LDUB_D, model_m32r_d_ldub_d, { { (int) UNIT_M32R_D_U_LOAD, 1, 2 } } },
- { M32RBF_INSN_LDUH, model_m32r_d_lduh, { { (int) UNIT_M32R_D_U_LOAD, 1, 1 } } },
- { M32RBF_INSN_LDUH_D, model_m32r_d_lduh_d, { { (int) UNIT_M32R_D_U_LOAD, 1, 2 } } },
- { M32RBF_INSN_LD_PLUS, model_m32r_d_ld_plus, { { (int) UNIT_M32R_D_U_LOAD, 1, 1 }, { (int) UNIT_M32R_D_U_EXEC, 1, 0 } } },
- { M32RBF_INSN_LD24, model_m32r_d_ld24, { { (int) UNIT_M32R_D_U_EXEC, 1, 1 } } },
- { M32RBF_INSN_LDI8, model_m32r_d_ldi8, { { (int) UNIT_M32R_D_U_EXEC, 1, 1 } } },
- { M32RBF_INSN_LDI16, model_m32r_d_ldi16, { { (int) UNIT_M32R_D_U_EXEC, 1, 1 } } },
- { M32RBF_INSN_LOCK, model_m32r_d_lock, { { (int) UNIT_M32R_D_U_LOAD, 1, 1 } } },
- { M32RBF_INSN_MACHI, model_m32r_d_machi, { { (int) UNIT_M32R_D_U_MAC, 1, 1 } } },
- { M32RBF_INSN_MACLO, model_m32r_d_maclo, { { (int) UNIT_M32R_D_U_MAC, 1, 1 } } },
- { M32RBF_INSN_MACWHI, model_m32r_d_macwhi, { { (int) UNIT_M32R_D_U_MAC, 1, 1 } } },
- { M32RBF_INSN_MACWLO, model_m32r_d_macwlo, { { (int) UNIT_M32R_D_U_MAC, 1, 1 } } },
- { M32RBF_INSN_MUL, model_m32r_d_mul, { { (int) UNIT_M32R_D_U_EXEC, 1, 4 } } },
- { M32RBF_INSN_MULHI, model_m32r_d_mulhi, { { (int) UNIT_M32R_D_U_MAC, 1, 1 } } },
- { M32RBF_INSN_MULLO, model_m32r_d_mullo, { { (int) UNIT_M32R_D_U_MAC, 1, 1 } } },
- { M32RBF_INSN_MULWHI, model_m32r_d_mulwhi, { { (int) UNIT_M32R_D_U_MAC, 1, 1 } } },
- { M32RBF_INSN_MULWLO, model_m32r_d_mulwlo, { { (int) UNIT_M32R_D_U_MAC, 1, 1 } } },
- { M32RBF_INSN_MV, model_m32r_d_mv, { { (int) UNIT_M32R_D_U_EXEC, 1, 1 } } },
- { M32RBF_INSN_MVFACHI, model_m32r_d_mvfachi, { { (int) UNIT_M32R_D_U_EXEC, 1, 2 } } },
- { M32RBF_INSN_MVFACLO, model_m32r_d_mvfaclo, { { (int) UNIT_M32R_D_U_EXEC, 1, 2 } } },
- { M32RBF_INSN_MVFACMI, model_m32r_d_mvfacmi, { { (int) UNIT_M32R_D_U_EXEC, 1, 2 } } },
- { M32RBF_INSN_MVFC, model_m32r_d_mvfc, { { (int) UNIT_M32R_D_U_EXEC, 1, 1 } } },
- { M32RBF_INSN_MVTACHI, model_m32r_d_mvtachi, { { (int) UNIT_M32R_D_U_EXEC, 1, 1 } } },
- { M32RBF_INSN_MVTACLO, model_m32r_d_mvtaclo, { { (int) UNIT_M32R_D_U_EXEC, 1, 1 } } },
- { M32RBF_INSN_MVTC, model_m32r_d_mvtc, { { (int) UNIT_M32R_D_U_EXEC, 1, 1 } } },
- { M32RBF_INSN_NEG, model_m32r_d_neg, { { (int) UNIT_M32R_D_U_EXEC, 1, 1 } } },
- { M32RBF_INSN_NOP, model_m32r_d_nop, { { (int) UNIT_M32R_D_U_EXEC, 1, 0 } } },
- { M32RBF_INSN_NOT, model_m32r_d_not, { { (int) UNIT_M32R_D_U_EXEC, 1, 1 } } },
- { M32RBF_INSN_RAC, model_m32r_d_rac, { { (int) UNIT_M32R_D_U_MAC, 1, 1 } } },
- { M32RBF_INSN_RACH, model_m32r_d_rach, { { (int) UNIT_M32R_D_U_MAC, 1, 1 } } },
- { M32RBF_INSN_RTE, model_m32r_d_rte, { { (int) UNIT_M32R_D_U_EXEC, 1, 1 } } },
- { M32RBF_INSN_SETH, model_m32r_d_seth, { { (int) UNIT_M32R_D_U_EXEC, 1, 1 } } },
- { M32RBF_INSN_SLL, model_m32r_d_sll, { { (int) UNIT_M32R_D_U_EXEC, 1, 1 } } },
- { M32RBF_INSN_SLL3, model_m32r_d_sll3, { { (int) UNIT_M32R_D_U_EXEC, 1, 1 } } },
- { M32RBF_INSN_SLLI, model_m32r_d_slli, { { (int) UNIT_M32R_D_U_EXEC, 1, 1 } } },
- { M32RBF_INSN_SRA, model_m32r_d_sra, { { (int) UNIT_M32R_D_U_EXEC, 1, 1 } } },
- { M32RBF_INSN_SRA3, model_m32r_d_sra3, { { (int) UNIT_M32R_D_U_EXEC, 1, 1 } } },
- { M32RBF_INSN_SRAI, model_m32r_d_srai, { { (int) UNIT_M32R_D_U_EXEC, 1, 1 } } },
- { M32RBF_INSN_SRL, model_m32r_d_srl, { { (int) UNIT_M32R_D_U_EXEC, 1, 1 } } },
- { M32RBF_INSN_SRL3, model_m32r_d_srl3, { { (int) UNIT_M32R_D_U_EXEC, 1, 1 } } },
- { M32RBF_INSN_SRLI, model_m32r_d_srli, { { (int) UNIT_M32R_D_U_EXEC, 1, 1 } } },
- { M32RBF_INSN_ST, model_m32r_d_st, { { (int) UNIT_M32R_D_U_STORE, 1, 1 } } },
- { M32RBF_INSN_ST_D, model_m32r_d_st_d, { { (int) UNIT_M32R_D_U_STORE, 1, 2 } } },
- { M32RBF_INSN_STB, model_m32r_d_stb, { { (int) UNIT_M32R_D_U_STORE, 1, 1 } } },
- { M32RBF_INSN_STB_D, model_m32r_d_stb_d, { { (int) UNIT_M32R_D_U_STORE, 1, 2 } } },
- { M32RBF_INSN_STH, model_m32r_d_sth, { { (int) UNIT_M32R_D_U_STORE, 1, 1 } } },
- { M32RBF_INSN_STH_D, model_m32r_d_sth_d, { { (int) UNIT_M32R_D_U_STORE, 1, 2 } } },
- { M32RBF_INSN_ST_PLUS, model_m32r_d_st_plus, { { (int) UNIT_M32R_D_U_STORE, 1, 1 }, { (int) UNIT_M32R_D_U_EXEC, 1, 0 } } },
- { M32RBF_INSN_ST_MINUS, model_m32r_d_st_minus, { { (int) UNIT_M32R_D_U_STORE, 1, 1 }, { (int) UNIT_M32R_D_U_EXEC, 1, 0 } } },
- { M32RBF_INSN_SUB, model_m32r_d_sub, { { (int) UNIT_M32R_D_U_EXEC, 1, 1 } } },
- { M32RBF_INSN_SUBV, model_m32r_d_subv, { { (int) UNIT_M32R_D_U_EXEC, 1, 1 } } },
- { M32RBF_INSN_SUBX, model_m32r_d_subx, { { (int) UNIT_M32R_D_U_EXEC, 1, 1 } } },
- { M32RBF_INSN_TRAP, model_m32r_d_trap, { { (int) UNIT_M32R_D_U_EXEC, 1, 1 } } },
- { M32RBF_INSN_UNLOCK, model_m32r_d_unlock, { { (int) UNIT_M32R_D_U_LOAD, 1, 1 } } },
-};
-
-/* Model timing data for `test'. */
-
-static const INSN_TIMING test_timing[] = {
- { M32RBF_INSN_X_INVALID, 0, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } },
- { M32RBF_INSN_X_AFTER, 0, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } },
- { M32RBF_INSN_X_BEFORE, 0, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } },
- { M32RBF_INSN_X_CTI_CHAIN, 0, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } },
- { M32RBF_INSN_X_CHAIN, 0, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } },
- { M32RBF_INSN_X_BEGIN, 0, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } },
- { M32RBF_INSN_ADD, model_test_add, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } },
- { M32RBF_INSN_ADD3, model_test_add3, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } },
- { M32RBF_INSN_AND, model_test_and, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } },
- { M32RBF_INSN_AND3, model_test_and3, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } },
- { M32RBF_INSN_OR, model_test_or, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } },
- { M32RBF_INSN_OR3, model_test_or3, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } },
- { M32RBF_INSN_XOR, model_test_xor, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } },
- { M32RBF_INSN_XOR3, model_test_xor3, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } },
- { M32RBF_INSN_ADDI, model_test_addi, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } },
- { M32RBF_INSN_ADDV, model_test_addv, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } },
- { M32RBF_INSN_ADDV3, model_test_addv3, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } },
- { M32RBF_INSN_ADDX, model_test_addx, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } },
- { M32RBF_INSN_BC8, model_test_bc8, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } },
- { M32RBF_INSN_BC24, model_test_bc24, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } },
- { M32RBF_INSN_BEQ, model_test_beq, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } },
- { M32RBF_INSN_BEQZ, model_test_beqz, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } },
- { M32RBF_INSN_BGEZ, model_test_bgez, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } },
- { M32RBF_INSN_BGTZ, model_test_bgtz, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } },
- { M32RBF_INSN_BLEZ, model_test_blez, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } },
- { M32RBF_INSN_BLTZ, model_test_bltz, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } },
- { M32RBF_INSN_BNEZ, model_test_bnez, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } },
- { M32RBF_INSN_BL8, model_test_bl8, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } },
- { M32RBF_INSN_BL24, model_test_bl24, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } },
- { M32RBF_INSN_BNC8, model_test_bnc8, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } },
- { M32RBF_INSN_BNC24, model_test_bnc24, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } },
- { M32RBF_INSN_BNE, model_test_bne, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } },
- { M32RBF_INSN_BRA8, model_test_bra8, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } },
- { M32RBF_INSN_BRA24, model_test_bra24, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } },
- { M32RBF_INSN_CMP, model_test_cmp, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } },
- { M32RBF_INSN_CMPI, model_test_cmpi, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } },
- { M32RBF_INSN_CMPU, model_test_cmpu, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } },
- { M32RBF_INSN_CMPUI, model_test_cmpui, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } },
- { M32RBF_INSN_DIV, model_test_div, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } },
- { M32RBF_INSN_DIVU, model_test_divu, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } },
- { M32RBF_INSN_REM, model_test_rem, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } },
- { M32RBF_INSN_REMU, model_test_remu, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } },
- { M32RBF_INSN_JL, model_test_jl, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } },
- { M32RBF_INSN_JMP, model_test_jmp, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } },
- { M32RBF_INSN_LD, model_test_ld, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } },
- { M32RBF_INSN_LD_D, model_test_ld_d, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } },
- { M32RBF_INSN_LDB, model_test_ldb, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } },
- { M32RBF_INSN_LDB_D, model_test_ldb_d, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } },
- { M32RBF_INSN_LDH, model_test_ldh, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } },
- { M32RBF_INSN_LDH_D, model_test_ldh_d, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } },
- { M32RBF_INSN_LDUB, model_test_ldub, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } },
- { M32RBF_INSN_LDUB_D, model_test_ldub_d, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } },
- { M32RBF_INSN_LDUH, model_test_lduh, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } },
- { M32RBF_INSN_LDUH_D, model_test_lduh_d, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } },
- { M32RBF_INSN_LD_PLUS, model_test_ld_plus, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } },
- { M32RBF_INSN_LD24, model_test_ld24, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } },
- { M32RBF_INSN_LDI8, model_test_ldi8, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } },
- { M32RBF_INSN_LDI16, model_test_ldi16, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } },
- { M32RBF_INSN_LOCK, model_test_lock, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } },
- { M32RBF_INSN_MACHI, model_test_machi, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } },
- { M32RBF_INSN_MACLO, model_test_maclo, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } },
- { M32RBF_INSN_MACWHI, model_test_macwhi, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } },
- { M32RBF_INSN_MACWLO, model_test_macwlo, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } },
- { M32RBF_INSN_MUL, model_test_mul, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } },
- { M32RBF_INSN_MULHI, model_test_mulhi, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } },
- { M32RBF_INSN_MULLO, model_test_mullo, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } },
- { M32RBF_INSN_MULWHI, model_test_mulwhi, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } },
- { M32RBF_INSN_MULWLO, model_test_mulwlo, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } },
- { M32RBF_INSN_MV, model_test_mv, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } },
- { M32RBF_INSN_MVFACHI, model_test_mvfachi, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } },
- { M32RBF_INSN_MVFACLO, model_test_mvfaclo, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } },
- { M32RBF_INSN_MVFACMI, model_test_mvfacmi, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } },
- { M32RBF_INSN_MVFC, model_test_mvfc, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } },
- { M32RBF_INSN_MVTACHI, model_test_mvtachi, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } },
- { M32RBF_INSN_MVTACLO, model_test_mvtaclo, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } },
- { M32RBF_INSN_MVTC, model_test_mvtc, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } },
- { M32RBF_INSN_NEG, model_test_neg, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } },
- { M32RBF_INSN_NOP, model_test_nop, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } },
- { M32RBF_INSN_NOT, model_test_not, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } },
- { M32RBF_INSN_RAC, model_test_rac, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } },
- { M32RBF_INSN_RACH, model_test_rach, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } },
- { M32RBF_INSN_RTE, model_test_rte, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } },
- { M32RBF_INSN_SETH, model_test_seth, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } },
- { M32RBF_INSN_SLL, model_test_sll, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } },
- { M32RBF_INSN_SLL3, model_test_sll3, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } },
- { M32RBF_INSN_SLLI, model_test_slli, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } },
- { M32RBF_INSN_SRA, model_test_sra, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } },
- { M32RBF_INSN_SRA3, model_test_sra3, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } },
- { M32RBF_INSN_SRAI, model_test_srai, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } },
- { M32RBF_INSN_SRL, model_test_srl, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } },
- { M32RBF_INSN_SRL3, model_test_srl3, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } },
- { M32RBF_INSN_SRLI, model_test_srli, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } },
- { M32RBF_INSN_ST, model_test_st, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } },
- { M32RBF_INSN_ST_D, model_test_st_d, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } },
- { M32RBF_INSN_STB, model_test_stb, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } },
- { M32RBF_INSN_STB_D, model_test_stb_d, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } },
- { M32RBF_INSN_STH, model_test_sth, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } },
- { M32RBF_INSN_STH_D, model_test_sth_d, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } },
- { M32RBF_INSN_ST_PLUS, model_test_st_plus, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } },
- { M32RBF_INSN_ST_MINUS, model_test_st_minus, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } },
- { M32RBF_INSN_SUB, model_test_sub, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } },
- { M32RBF_INSN_SUBV, model_test_subv, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } },
- { M32RBF_INSN_SUBX, model_test_subx, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } },
- { M32RBF_INSN_TRAP, model_test_trap, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } },
- { M32RBF_INSN_UNLOCK, model_test_unlock, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } },
-};
-
-#endif /* WITH_PROFILE_MODEL_P */
-
-static void
-m32r_d_model_init (SIM_CPU *cpu)
-{
- CPU_MODEL_DATA (cpu) = (void *) zalloc (sizeof (MODEL_M32R_D_DATA));
-}
-
-static void
-test_model_init (SIM_CPU *cpu)
-{
- CPU_MODEL_DATA (cpu) = (void *) zalloc (sizeof (MODEL_TEST_DATA));
-}
-
-#if WITH_PROFILE_MODEL_P
-#define TIMING_DATA(td) td
-#else
-#define TIMING_DATA(td) 0
-#endif
-
-static const MODEL m32r_models[] =
-{
- { "m32r/d", & m32r_mach, MODEL_M32R_D, TIMING_DATA (& m32r_d_timing[0]), m32r_d_model_init },
- { "test", & m32r_mach, MODEL_TEST, TIMING_DATA (& test_timing[0]), test_model_init },
- { 0 }
-};
-
-/* The properties of this cpu's implementation. */
-
-static const MACH_IMP_PROPERTIES m32rbf_imp_properties =
-{
- sizeof (SIM_CPU),
-#if WITH_SCACHE
- sizeof (SCACHE)
-#else
- 0
-#endif
-};
-
-
-static void
-m32rbf_prepare_run (SIM_CPU *cpu)
-{
- if (CPU_IDESC (cpu) == NULL)
- m32rbf_init_idesc_table (cpu);
-}
-
-static const CGEN_INSN *
-m32rbf_get_idata (SIM_CPU *cpu, int inum)
-{
- return CPU_IDESC (cpu) [inum].idata;
-}
-
-static void
-m32r_init_cpu (SIM_CPU *cpu)
-{
- CPU_REG_FETCH (cpu) = m32rbf_fetch_register;
- CPU_REG_STORE (cpu) = m32rbf_store_register;
- CPU_PC_FETCH (cpu) = m32rbf_h_pc_get;
- CPU_PC_STORE (cpu) = m32rbf_h_pc_set;
- CPU_GET_IDATA (cpu) = m32rbf_get_idata;
- CPU_MAX_INSNS (cpu) = M32RBF_INSN_MAX;
- CPU_INSN_NAME (cpu) = cgen_insn_name;
- CPU_FULL_ENGINE_FN (cpu) = m32rbf_engine_run_full;
-#if WITH_FAST
- CPU_FAST_ENGINE_FN (cpu) = m32rbf_engine_run_fast;
-#else
- CPU_FAST_ENGINE_FN (cpu) = m32rbf_engine_run_full;
-#endif
-}
-
-const MACH m32r_mach =
-{
- "m32r", "m32r", MACH_M32R,
- 32, 32, & m32r_models[0], & m32rbf_imp_properties,
- m32r_init_cpu,
- m32rbf_prepare_run
-};
-
diff --git a/sim/m32r/modelx.c b/sim/m32r/modelx.c
deleted file mode 100644
index 464ab1fb058..00000000000
--- a/sim/m32r/modelx.c
+++ /dev/null
@@ -1,2899 +0,0 @@
-/* Simulator model support for m32rxf.
-
-THIS FILE IS MACHINE GENERATED WITH CGEN.
-
-Copyright (C) 1996, 1997, 1998, 1999, 2000 Free Software Foundation, Inc.
-
-This file is part of the GNU Simulators.
-
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License along
-with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
-*/
-
-#define WANT_CPU m32rxf
-#define WANT_CPU_M32RXF
-
-#include "sim-main.h"
-
-/* The profiling data is recorded here, but is accessed via the profiling
- mechanism. After all, this is information for profiling. */
-
-#if WITH_PROFILE_MODEL_P
-
-/* Model handlers for each insn. */
-
-static int
-model_m32rx_add (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = -1;
- INT in_dr = -1;
- INT out_dr = -1;
- in_sr = FLD (in_sr);
- in_dr = FLD (in_dr);
- out_dr = FLD (out_dr);
- referenced |= 1 << 0;
- referenced |= 1 << 1;
- referenced |= 1 << 2;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32rx_add3 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add3.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = -1;
- INT in_dr = -1;
- INT out_dr = -1;
- in_sr = FLD (in_sr);
- out_dr = FLD (out_dr);
- referenced |= 1 << 0;
- referenced |= 1 << 2;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32rx_and (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = -1;
- INT in_dr = -1;
- INT out_dr = -1;
- in_sr = FLD (in_sr);
- in_dr = FLD (in_dr);
- out_dr = FLD (out_dr);
- referenced |= 1 << 0;
- referenced |= 1 << 1;
- referenced |= 1 << 2;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32rx_and3 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_and3.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = -1;
- INT in_dr = -1;
- INT out_dr = -1;
- in_sr = FLD (in_sr);
- out_dr = FLD (out_dr);
- referenced |= 1 << 0;
- referenced |= 1 << 2;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32rx_or (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = -1;
- INT in_dr = -1;
- INT out_dr = -1;
- in_sr = FLD (in_sr);
- in_dr = FLD (in_dr);
- out_dr = FLD (out_dr);
- referenced |= 1 << 0;
- referenced |= 1 << 1;
- referenced |= 1 << 2;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32rx_or3 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_and3.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = -1;
- INT in_dr = -1;
- INT out_dr = -1;
- in_sr = FLD (in_sr);
- out_dr = FLD (out_dr);
- referenced |= 1 << 0;
- referenced |= 1 << 2;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32rx_xor (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = -1;
- INT in_dr = -1;
- INT out_dr = -1;
- in_sr = FLD (in_sr);
- in_dr = FLD (in_dr);
- out_dr = FLD (out_dr);
- referenced |= 1 << 0;
- referenced |= 1 << 1;
- referenced |= 1 << 2;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32rx_xor3 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_and3.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = -1;
- INT in_dr = -1;
- INT out_dr = -1;
- in_sr = FLD (in_sr);
- out_dr = FLD (out_dr);
- referenced |= 1 << 0;
- referenced |= 1 << 2;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32rx_addi (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_addi.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = -1;
- INT in_dr = -1;
- INT out_dr = -1;
- in_dr = FLD (in_dr);
- out_dr = FLD (out_dr);
- referenced |= 1 << 1;
- referenced |= 1 << 2;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32rx_addv (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = -1;
- INT in_dr = -1;
- INT out_dr = -1;
- in_sr = FLD (in_sr);
- in_dr = FLD (in_dr);
- out_dr = FLD (out_dr);
- referenced |= 1 << 0;
- referenced |= 1 << 1;
- referenced |= 1 << 2;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32rx_addv3 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add3.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = -1;
- INT in_dr = -1;
- INT out_dr = -1;
- in_sr = FLD (in_sr);
- out_dr = FLD (out_dr);
- referenced |= 1 << 0;
- referenced |= 1 << 2;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32rx_addx (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = -1;
- INT in_dr = -1;
- INT out_dr = -1;
- in_sr = FLD (in_sr);
- in_dr = FLD (in_dr);
- out_dr = FLD (out_dr);
- referenced |= 1 << 0;
- referenced |= 1 << 1;
- referenced |= 1 << 2;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32rx_bc8 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_bl8.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = -1;
- if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32rx_bc24 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_bl24.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = -1;
- if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32rx_beq (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_beq.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = -1;
- if (insn_referenced & (1 << 3)) referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr);
- }
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_src1 = -1;
- INT in_src2 = -1;
- in_src1 = FLD (in_src1);
- in_src2 = FLD (in_src2);
- referenced |= 1 << 0;
- referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_cmp (current_cpu, idesc, 1, referenced, in_src1, in_src2);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32rx_beqz (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_beq.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = -1;
- if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr);
- }
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_src1 = -1;
- INT in_src2 = -1;
- in_src2 = FLD (in_src2);
- referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_cmp (current_cpu, idesc, 1, referenced, in_src1, in_src2);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32rx_bgez (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_beq.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = -1;
- if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr);
- }
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_src1 = -1;
- INT in_src2 = -1;
- in_src2 = FLD (in_src2);
- referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_cmp (current_cpu, idesc, 1, referenced, in_src1, in_src2);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32rx_bgtz (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_beq.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = -1;
- if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr);
- }
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_src1 = -1;
- INT in_src2 = -1;
- in_src2 = FLD (in_src2);
- referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_cmp (current_cpu, idesc, 1, referenced, in_src1, in_src2);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32rx_blez (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_beq.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = -1;
- if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr);
- }
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_src1 = -1;
- INT in_src2 = -1;
- in_src2 = FLD (in_src2);
- referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_cmp (current_cpu, idesc, 1, referenced, in_src1, in_src2);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32rx_bltz (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_beq.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = -1;
- if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr);
- }
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_src1 = -1;
- INT in_src2 = -1;
- in_src2 = FLD (in_src2);
- referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_cmp (current_cpu, idesc, 1, referenced, in_src1, in_src2);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32rx_bnez (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_beq.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = -1;
- if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr);
- }
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_src1 = -1;
- INT in_src2 = -1;
- in_src2 = FLD (in_src2);
- referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_cmp (current_cpu, idesc, 1, referenced, in_src1, in_src2);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32rx_bl8 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_bl8.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = -1;
- referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32rx_bl24 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_bl24.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = -1;
- referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32rx_bcl8 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_bl8.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = -1;
- if (insn_referenced & (1 << 4)) referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32rx_bcl24 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_bl24.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = -1;
- if (insn_referenced & (1 << 4)) referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32rx_bnc8 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_bl8.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = -1;
- if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32rx_bnc24 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_bl24.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = -1;
- if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32rx_bne (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_beq.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = -1;
- if (insn_referenced & (1 << 3)) referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr);
- }
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_src1 = -1;
- INT in_src2 = -1;
- in_src1 = FLD (in_src1);
- in_src2 = FLD (in_src2);
- referenced |= 1 << 0;
- referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_cmp (current_cpu, idesc, 1, referenced, in_src1, in_src2);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32rx_bra8 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_bl8.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = -1;
- referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32rx_bra24 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_bl24.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = -1;
- referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32rx_bncl8 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_bl8.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = -1;
- if (insn_referenced & (1 << 4)) referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32rx_bncl24 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_bl24.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = -1;
- if (insn_referenced & (1 << 4)) referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32rx_cmp (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_st_plus.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_src1 = -1;
- INT in_src2 = -1;
- in_src1 = FLD (in_src1);
- in_src2 = FLD (in_src2);
- referenced |= 1 << 0;
- referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_cmp (current_cpu, idesc, 0, referenced, in_src1, in_src2);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32rx_cmpi (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_st_d.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_src1 = -1;
- INT in_src2 = -1;
- in_src2 = FLD (in_src2);
- referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_cmp (current_cpu, idesc, 0, referenced, in_src1, in_src2);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32rx_cmpu (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_st_plus.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_src1 = -1;
- INT in_src2 = -1;
- in_src1 = FLD (in_src1);
- in_src2 = FLD (in_src2);
- referenced |= 1 << 0;
- referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_cmp (current_cpu, idesc, 0, referenced, in_src1, in_src2);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32rx_cmpui (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_st_d.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_src1 = -1;
- INT in_src2 = -1;
- in_src2 = FLD (in_src2);
- referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_cmp (current_cpu, idesc, 0, referenced, in_src1, in_src2);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32rx_cmpeq (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_st_plus.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_src1 = -1;
- INT in_src2 = -1;
- in_src1 = FLD (in_src1);
- in_src2 = FLD (in_src2);
- referenced |= 1 << 0;
- referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_cmp (current_cpu, idesc, 0, referenced, in_src1, in_src2);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32rx_cmpz (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_st_plus.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_src1 = -1;
- INT in_src2 = -1;
- in_src2 = FLD (in_src2);
- referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_cmp (current_cpu, idesc, 0, referenced, in_src1, in_src2);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32rx_div (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = -1;
- INT in_dr = -1;
- INT out_dr = -1;
- in_sr = FLD (in_sr);
- in_dr = FLD (in_dr);
- out_dr = FLD (out_dr);
- referenced |= 1 << 0;
- if (insn_referenced & (1 << 0)) referenced |= 1 << 1;
- if (insn_referenced & (1 << 2)) referenced |= 1 << 2;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32rx_divu (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = -1;
- INT in_dr = -1;
- INT out_dr = -1;
- in_sr = FLD (in_sr);
- in_dr = FLD (in_dr);
- out_dr = FLD (out_dr);
- referenced |= 1 << 0;
- if (insn_referenced & (1 << 0)) referenced |= 1 << 1;
- if (insn_referenced & (1 << 2)) referenced |= 1 << 2;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32rx_rem (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = -1;
- INT in_dr = -1;
- INT out_dr = -1;
- in_sr = FLD (in_sr);
- in_dr = FLD (in_dr);
- out_dr = FLD (out_dr);
- referenced |= 1 << 0;
- if (insn_referenced & (1 << 0)) referenced |= 1 << 1;
- if (insn_referenced & (1 << 2)) referenced |= 1 << 2;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32rx_remu (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = -1;
- INT in_dr = -1;
- INT out_dr = -1;
- in_sr = FLD (in_sr);
- in_dr = FLD (in_dr);
- out_dr = FLD (out_dr);
- referenced |= 1 << 0;
- if (insn_referenced & (1 << 0)) referenced |= 1 << 1;
- if (insn_referenced & (1 << 2)) referenced |= 1 << 2;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32rx_divh (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = -1;
- INT in_dr = -1;
- INT out_dr = -1;
- in_sr = FLD (in_sr);
- in_dr = FLD (in_dr);
- out_dr = FLD (out_dr);
- referenced |= 1 << 0;
- if (insn_referenced & (1 << 0)) referenced |= 1 << 1;
- if (insn_referenced & (1 << 2)) referenced |= 1 << 2;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32rx_jc (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_jl.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = -1;
- in_sr = FLD (in_sr);
- if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
- if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32rx_jnc (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_jl.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = -1;
- in_sr = FLD (in_sr);
- if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
- if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32rx_jl (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_jl.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = -1;
- in_sr = FLD (in_sr);
- referenced |= 1 << 0;
- referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32rx_jmp (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_jl.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = -1;
- in_sr = FLD (in_sr);
- referenced |= 1 << 0;
- referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32rx_ld (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ld_plus.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = 0;
- INT out_dr = 0;
- in_sr = FLD (in_sr);
- out_dr = FLD (out_dr);
- referenced |= 1 << 0;
- referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_load (current_cpu, idesc, 0, referenced, in_sr, out_dr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32rx_ld_d (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add3.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = 0;
- INT out_dr = 0;
- in_sr = FLD (in_sr);
- out_dr = FLD (out_dr);
- referenced |= 1 << 0;
- referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_load (current_cpu, idesc, 0, referenced, in_sr, out_dr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32rx_ldb (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ld_plus.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = 0;
- INT out_dr = 0;
- in_sr = FLD (in_sr);
- out_dr = FLD (out_dr);
- referenced |= 1 << 0;
- referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_load (current_cpu, idesc, 0, referenced, in_sr, out_dr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32rx_ldb_d (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add3.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = 0;
- INT out_dr = 0;
- in_sr = FLD (in_sr);
- out_dr = FLD (out_dr);
- referenced |= 1 << 0;
- referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_load (current_cpu, idesc, 0, referenced, in_sr, out_dr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32rx_ldh (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ld_plus.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = 0;
- INT out_dr = 0;
- in_sr = FLD (in_sr);
- out_dr = FLD (out_dr);
- referenced |= 1 << 0;
- referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_load (current_cpu, idesc, 0, referenced, in_sr, out_dr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32rx_ldh_d (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add3.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = 0;
- INT out_dr = 0;
- in_sr = FLD (in_sr);
- out_dr = FLD (out_dr);
- referenced |= 1 << 0;
- referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_load (current_cpu, idesc, 0, referenced, in_sr, out_dr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32rx_ldub (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ld_plus.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = 0;
- INT out_dr = 0;
- in_sr = FLD (in_sr);
- out_dr = FLD (out_dr);
- referenced |= 1 << 0;
- referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_load (current_cpu, idesc, 0, referenced, in_sr, out_dr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32rx_ldub_d (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add3.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = 0;
- INT out_dr = 0;
- in_sr = FLD (in_sr);
- out_dr = FLD (out_dr);
- referenced |= 1 << 0;
- referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_load (current_cpu, idesc, 0, referenced, in_sr, out_dr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32rx_lduh (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ld_plus.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = 0;
- INT out_dr = 0;
- in_sr = FLD (in_sr);
- out_dr = FLD (out_dr);
- referenced |= 1 << 0;
- referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_load (current_cpu, idesc, 0, referenced, in_sr, out_dr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32rx_lduh_d (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add3.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = 0;
- INT out_dr = 0;
- in_sr = FLD (in_sr);
- out_dr = FLD (out_dr);
- referenced |= 1 << 0;
- referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_load (current_cpu, idesc, 0, referenced, in_sr, out_dr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32rx_ld_plus (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ld_plus.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = 0;
- INT out_dr = 0;
- in_sr = FLD (in_sr);
- out_dr = FLD (out_dr);
- referenced |= 1 << 0;
- referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_load (current_cpu, idesc, 0, referenced, in_sr, out_dr);
- }
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = -1;
- INT in_dr = -1;
- INT out_dr = -1;
- in_dr = FLD (in_sr);
- out_dr = FLD (out_sr);
- referenced |= 1 << 0;
- referenced |= 1 << 2;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 1, referenced, in_sr, in_dr, out_dr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32rx_ld24 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ld24.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = -1;
- INT in_dr = -1;
- INT out_dr = -1;
- out_dr = FLD (out_dr);
- referenced |= 1 << 2;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32rx_ldi8 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_addi.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = -1;
- INT in_dr = -1;
- INT out_dr = -1;
- out_dr = FLD (out_dr);
- referenced |= 1 << 2;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32rx_ldi16 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add3.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = -1;
- INT in_dr = -1;
- INT out_dr = -1;
- out_dr = FLD (out_dr);
- referenced |= 1 << 2;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32rx_lock (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ld_plus.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = 0;
- INT out_dr = 0;
- in_sr = FLD (in_sr);
- out_dr = FLD (out_dr);
- referenced |= 1 << 0;
- referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_load (current_cpu, idesc, 0, referenced, in_sr, out_dr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32rx_machi_a (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_machi_a.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_src1 = -1;
- INT in_src2 = -1;
- in_src1 = FLD (in_src1);
- in_src2 = FLD (in_src2);
- referenced |= 1 << 0;
- referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_mac (current_cpu, idesc, 0, referenced, in_src1, in_src2);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32rx_maclo_a (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_machi_a.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_src1 = -1;
- INT in_src2 = -1;
- in_src1 = FLD (in_src1);
- in_src2 = FLD (in_src2);
- referenced |= 1 << 0;
- referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_mac (current_cpu, idesc, 0, referenced, in_src1, in_src2);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32rx_macwhi_a (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_machi_a.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_src1 = -1;
- INT in_src2 = -1;
- in_src1 = FLD (in_src1);
- in_src2 = FLD (in_src2);
- referenced |= 1 << 0;
- referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_mac (current_cpu, idesc, 0, referenced, in_src1, in_src2);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32rx_macwlo_a (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_machi_a.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_src1 = -1;
- INT in_src2 = -1;
- in_src1 = FLD (in_src1);
- in_src2 = FLD (in_src2);
- referenced |= 1 << 0;
- referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_mac (current_cpu, idesc, 0, referenced, in_src1, in_src2);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32rx_mul (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = -1;
- INT in_dr = -1;
- INT out_dr = -1;
- in_sr = FLD (in_sr);
- in_dr = FLD (in_dr);
- out_dr = FLD (out_dr);
- referenced |= 1 << 0;
- referenced |= 1 << 1;
- referenced |= 1 << 2;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32rx_mulhi_a (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_machi_a.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_src1 = -1;
- INT in_src2 = -1;
- in_src1 = FLD (in_src1);
- in_src2 = FLD (in_src2);
- referenced |= 1 << 0;
- referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_mac (current_cpu, idesc, 0, referenced, in_src1, in_src2);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32rx_mullo_a (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_machi_a.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_src1 = -1;
- INT in_src2 = -1;
- in_src1 = FLD (in_src1);
- in_src2 = FLD (in_src2);
- referenced |= 1 << 0;
- referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_mac (current_cpu, idesc, 0, referenced, in_src1, in_src2);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32rx_mulwhi_a (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_machi_a.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_src1 = -1;
- INT in_src2 = -1;
- in_src1 = FLD (in_src1);
- in_src2 = FLD (in_src2);
- referenced |= 1 << 0;
- referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_mac (current_cpu, idesc, 0, referenced, in_src1, in_src2);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32rx_mulwlo_a (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_machi_a.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_src1 = -1;
- INT in_src2 = -1;
- in_src1 = FLD (in_src1);
- in_src2 = FLD (in_src2);
- referenced |= 1 << 0;
- referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_mac (current_cpu, idesc, 0, referenced, in_src1, in_src2);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32rx_mv (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ld_plus.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = -1;
- INT in_dr = -1;
- INT out_dr = -1;
- in_sr = FLD (in_sr);
- out_dr = FLD (out_dr);
- referenced |= 1 << 0;
- referenced |= 1 << 2;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32rx_mvfachi_a (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_mvfachi_a.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = -1;
- INT in_dr = -1;
- INT out_dr = -1;
- out_dr = FLD (out_dr);
- referenced |= 1 << 2;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32rx_mvfaclo_a (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_mvfachi_a.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = -1;
- INT in_dr = -1;
- INT out_dr = -1;
- out_dr = FLD (out_dr);
- referenced |= 1 << 2;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32rx_mvfacmi_a (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_mvfachi_a.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = -1;
- INT in_dr = -1;
- INT out_dr = -1;
- out_dr = FLD (out_dr);
- referenced |= 1 << 2;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32rx_mvfc (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ld_plus.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = -1;
- INT in_dr = -1;
- INT out_dr = -1;
- out_dr = FLD (out_dr);
- referenced |= 1 << 2;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32rx_mvtachi_a (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_mvtachi_a.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = -1;
- INT in_dr = -1;
- INT out_dr = -1;
- in_sr = FLD (in_src1);
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32rx_mvtaclo_a (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_mvtachi_a.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = -1;
- INT in_dr = -1;
- INT out_dr = -1;
- in_sr = FLD (in_src1);
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32rx_mvtc (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ld_plus.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = -1;
- INT in_dr = -1;
- INT out_dr = -1;
- in_sr = FLD (in_sr);
- referenced |= 1 << 0;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32rx_neg (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ld_plus.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = -1;
- INT in_dr = -1;
- INT out_dr = -1;
- in_sr = FLD (in_sr);
- out_dr = FLD (out_dr);
- referenced |= 1 << 0;
- referenced |= 1 << 2;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32rx_nop (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.fmt_empty.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = -1;
- INT in_dr = -1;
- INT out_dr = -1;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32rx_not (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ld_plus.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = -1;
- INT in_dr = -1;
- INT out_dr = -1;
- in_sr = FLD (in_sr);
- out_dr = FLD (out_dr);
- referenced |= 1 << 0;
- referenced |= 1 << 2;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32rx_rac_dsi (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_rac_dsi.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_src1 = -1;
- INT in_src2 = -1;
- cycles += m32rxf_model_m32rx_u_mac (current_cpu, idesc, 0, referenced, in_src1, in_src2);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32rx_rach_dsi (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_rac_dsi.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_src1 = -1;
- INT in_src2 = -1;
- cycles += m32rxf_model_m32rx_u_mac (current_cpu, idesc, 0, referenced, in_src1, in_src2);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32rx_rte (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.fmt_empty.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = -1;
- INT in_dr = -1;
- INT out_dr = -1;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32rx_seth (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_seth.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = -1;
- INT in_dr = -1;
- INT out_dr = -1;
- out_dr = FLD (out_dr);
- referenced |= 1 << 2;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32rx_sll (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = -1;
- INT in_dr = -1;
- INT out_dr = -1;
- in_sr = FLD (in_sr);
- in_dr = FLD (in_dr);
- out_dr = FLD (out_dr);
- referenced |= 1 << 0;
- referenced |= 1 << 1;
- referenced |= 1 << 2;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32rx_sll3 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add3.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = -1;
- INT in_dr = -1;
- INT out_dr = -1;
- in_sr = FLD (in_sr);
- out_dr = FLD (out_dr);
- referenced |= 1 << 0;
- referenced |= 1 << 2;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32rx_slli (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_slli.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = -1;
- INT in_dr = -1;
- INT out_dr = -1;
- in_dr = FLD (in_dr);
- out_dr = FLD (out_dr);
- referenced |= 1 << 1;
- referenced |= 1 << 2;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32rx_sra (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = -1;
- INT in_dr = -1;
- INT out_dr = -1;
- in_sr = FLD (in_sr);
- in_dr = FLD (in_dr);
- out_dr = FLD (out_dr);
- referenced |= 1 << 0;
- referenced |= 1 << 1;
- referenced |= 1 << 2;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32rx_sra3 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add3.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = -1;
- INT in_dr = -1;
- INT out_dr = -1;
- in_sr = FLD (in_sr);
- out_dr = FLD (out_dr);
- referenced |= 1 << 0;
- referenced |= 1 << 2;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32rx_srai (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_slli.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = -1;
- INT in_dr = -1;
- INT out_dr = -1;
- in_dr = FLD (in_dr);
- out_dr = FLD (out_dr);
- referenced |= 1 << 1;
- referenced |= 1 << 2;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32rx_srl (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = -1;
- INT in_dr = -1;
- INT out_dr = -1;
- in_sr = FLD (in_sr);
- in_dr = FLD (in_dr);
- out_dr = FLD (out_dr);
- referenced |= 1 << 0;
- referenced |= 1 << 1;
- referenced |= 1 << 2;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32rx_srl3 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add3.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = -1;
- INT in_dr = -1;
- INT out_dr = -1;
- in_sr = FLD (in_sr);
- out_dr = FLD (out_dr);
- referenced |= 1 << 0;
- referenced |= 1 << 2;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32rx_srli (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_slli.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = -1;
- INT in_dr = -1;
- INT out_dr = -1;
- in_dr = FLD (in_dr);
- out_dr = FLD (out_dr);
- referenced |= 1 << 1;
- referenced |= 1 << 2;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32rx_st (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_st_plus.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_src1 = 0;
- INT in_src2 = 0;
- in_src1 = FLD (in_src1);
- in_src2 = FLD (in_src2);
- referenced |= 1 << 0;
- referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_store (current_cpu, idesc, 0, referenced, in_src1, in_src2);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32rx_st_d (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_st_d.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_src1 = 0;
- INT in_src2 = 0;
- in_src1 = FLD (in_src1);
- in_src2 = FLD (in_src2);
- referenced |= 1 << 0;
- referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_store (current_cpu, idesc, 0, referenced, in_src1, in_src2);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32rx_stb (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_st_plus.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_src1 = 0;
- INT in_src2 = 0;
- in_src1 = FLD (in_src1);
- in_src2 = FLD (in_src2);
- referenced |= 1 << 0;
- referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_store (current_cpu, idesc, 0, referenced, in_src1, in_src2);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32rx_stb_d (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_st_d.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_src1 = 0;
- INT in_src2 = 0;
- in_src1 = FLD (in_src1);
- in_src2 = FLD (in_src2);
- referenced |= 1 << 0;
- referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_store (current_cpu, idesc, 0, referenced, in_src1, in_src2);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32rx_sth (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_st_plus.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_src1 = 0;
- INT in_src2 = 0;
- in_src1 = FLD (in_src1);
- in_src2 = FLD (in_src2);
- referenced |= 1 << 0;
- referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_store (current_cpu, idesc, 0, referenced, in_src1, in_src2);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32rx_sth_d (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_st_d.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_src1 = 0;
- INT in_src2 = 0;
- in_src1 = FLD (in_src1);
- in_src2 = FLD (in_src2);
- referenced |= 1 << 0;
- referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_store (current_cpu, idesc, 0, referenced, in_src1, in_src2);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32rx_st_plus (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_st_plus.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_src1 = 0;
- INT in_src2 = 0;
- in_src1 = FLD (in_src1);
- in_src2 = FLD (in_src2);
- referenced |= 1 << 0;
- referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_store (current_cpu, idesc, 0, referenced, in_src1, in_src2);
- }
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = -1;
- INT in_dr = -1;
- INT out_dr = -1;
- in_dr = FLD (in_src2);
- out_dr = FLD (out_src2);
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 1, referenced, in_sr, in_dr, out_dr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32rx_st_minus (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_st_plus.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_src1 = 0;
- INT in_src2 = 0;
- in_src1 = FLD (in_src1);
- in_src2 = FLD (in_src2);
- referenced |= 1 << 0;
- referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_store (current_cpu, idesc, 0, referenced, in_src1, in_src2);
- }
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = -1;
- INT in_dr = -1;
- INT out_dr = -1;
- in_dr = FLD (in_src2);
- out_dr = FLD (out_src2);
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 1, referenced, in_sr, in_dr, out_dr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32rx_sub (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = -1;
- INT in_dr = -1;
- INT out_dr = -1;
- in_sr = FLD (in_sr);
- in_dr = FLD (in_dr);
- out_dr = FLD (out_dr);
- referenced |= 1 << 0;
- referenced |= 1 << 1;
- referenced |= 1 << 2;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32rx_subv (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = -1;
- INT in_dr = -1;
- INT out_dr = -1;
- in_sr = FLD (in_sr);
- in_dr = FLD (in_dr);
- out_dr = FLD (out_dr);
- referenced |= 1 << 0;
- referenced |= 1 << 1;
- referenced |= 1 << 2;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32rx_subx (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = -1;
- INT in_dr = -1;
- INT out_dr = -1;
- in_sr = FLD (in_sr);
- in_dr = FLD (in_dr);
- out_dr = FLD (out_dr);
- referenced |= 1 << 0;
- referenced |= 1 << 1;
- referenced |= 1 << 2;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32rx_trap (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_trap.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = -1;
- INT in_dr = -1;
- INT out_dr = -1;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32rx_unlock (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_st_plus.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = 0;
- INT out_dr = 0;
- cycles += m32rxf_model_m32rx_u_load (current_cpu, idesc, 0, referenced, in_sr, out_dr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32rx_satb (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ld_plus.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = -1;
- INT in_dr = -1;
- INT out_dr = -1;
- in_sr = FLD (in_sr);
- out_dr = FLD (out_dr);
- referenced |= 1 << 0;
- referenced |= 1 << 2;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32rx_sath (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ld_plus.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = -1;
- INT in_dr = -1;
- INT out_dr = -1;
- in_sr = FLD (in_sr);
- out_dr = FLD (out_dr);
- referenced |= 1 << 0;
- referenced |= 1 << 2;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32rx_sat (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ld_plus.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = -1;
- INT in_dr = -1;
- INT out_dr = -1;
- in_sr = FLD (in_sr);
- out_dr = FLD (out_dr);
- if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
- referenced |= 1 << 2;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32rx_pcmpbz (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_st_plus.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_src1 = -1;
- INT in_src2 = -1;
- in_src2 = FLD (in_src2);
- referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_cmp (current_cpu, idesc, 0, referenced, in_src1, in_src2);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32rx_sadd (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.fmt_empty.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_src1 = -1;
- INT in_src2 = -1;
- cycles += m32rxf_model_m32rx_u_mac (current_cpu, idesc, 0, referenced, in_src1, in_src2);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32rx_macwu1 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_st_plus.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_src1 = -1;
- INT in_src2 = -1;
- in_src1 = FLD (in_src1);
- in_src2 = FLD (in_src2);
- referenced |= 1 << 0;
- referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_mac (current_cpu, idesc, 0, referenced, in_src1, in_src2);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32rx_msblo (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_st_plus.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_src1 = -1;
- INT in_src2 = -1;
- in_src1 = FLD (in_src1);
- in_src2 = FLD (in_src2);
- referenced |= 1 << 0;
- referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_mac (current_cpu, idesc, 0, referenced, in_src1, in_src2);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32rx_mulwu1 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_st_plus.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_src1 = -1;
- INT in_src2 = -1;
- in_src1 = FLD (in_src1);
- in_src2 = FLD (in_src2);
- referenced |= 1 << 0;
- referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_mac (current_cpu, idesc, 0, referenced, in_src1, in_src2);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32rx_maclh1 (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_st_plus.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_src1 = -1;
- INT in_src2 = -1;
- in_src1 = FLD (in_src1);
- in_src2 = FLD (in_src2);
- referenced |= 1 << 0;
- referenced |= 1 << 1;
- cycles += m32rxf_model_m32rx_u_mac (current_cpu, idesc, 0, referenced, in_src1, in_src2);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32rx_sc (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.fmt_empty.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = -1;
- INT in_dr = -1;
- INT out_dr = -1;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
- }
- return cycles;
-#undef FLD
-}
-
-static int
-model_m32rx_snc (SIM_CPU *current_cpu, void *sem_arg)
-{
-#define FLD(f) abuf->fields.fmt_empty.f
- const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
- const IDESC * UNUSED idesc = abuf->idesc;
- int cycles = 0;
- {
- int referenced = 0;
- int UNUSED insn_referenced = abuf->written;
- INT in_sr = -1;
- INT in_dr = -1;
- INT out_dr = -1;
- cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr);
- }
- return cycles;
-#undef FLD
-}
-
-/* We assume UNIT_NONE == 0 because the tables don't always terminate
- entries with it. */
-
-/* Model timing data for `m32rx'. */
-
-static const INSN_TIMING m32rx_timing[] = {
- { M32RXF_INSN_X_INVALID, 0, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } },
- { M32RXF_INSN_X_AFTER, 0, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } },
- { M32RXF_INSN_X_BEFORE, 0, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } },
- { M32RXF_INSN_X_CTI_CHAIN, 0, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } },
- { M32RXF_INSN_X_CHAIN, 0, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } },
- { M32RXF_INSN_X_BEGIN, 0, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } },
- { M32RXF_INSN_ADD, model_m32rx_add, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } },
- { M32RXF_INSN_ADD3, model_m32rx_add3, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } },
- { M32RXF_INSN_AND, model_m32rx_and, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } },
- { M32RXF_INSN_AND3, model_m32rx_and3, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } },
- { M32RXF_INSN_OR, model_m32rx_or, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } },
- { M32RXF_INSN_OR3, model_m32rx_or3, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } },
- { M32RXF_INSN_XOR, model_m32rx_xor, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } },
- { M32RXF_INSN_XOR3, model_m32rx_xor3, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } },
- { M32RXF_INSN_ADDI, model_m32rx_addi, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } },
- { M32RXF_INSN_ADDV, model_m32rx_addv, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } },
- { M32RXF_INSN_ADDV3, model_m32rx_addv3, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } },
- { M32RXF_INSN_ADDX, model_m32rx_addx, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } },
- { M32RXF_INSN_BC8, model_m32rx_bc8, { { (int) UNIT_M32RX_U_CTI, 1, 1 } } },
- { M32RXF_INSN_BC24, model_m32rx_bc24, { { (int) UNIT_M32RX_U_CTI, 1, 1 } } },
- { M32RXF_INSN_BEQ, model_m32rx_beq, { { (int) UNIT_M32RX_U_CTI, 1, 1 }, { (int) UNIT_M32RX_U_CMP, 1, 0 } } },
- { M32RXF_INSN_BEQZ, model_m32rx_beqz, { { (int) UNIT_M32RX_U_CTI, 1, 1 }, { (int) UNIT_M32RX_U_CMP, 1, 0 } } },
- { M32RXF_INSN_BGEZ, model_m32rx_bgez, { { (int) UNIT_M32RX_U_CTI, 1, 1 }, { (int) UNIT_M32RX_U_CMP, 1, 0 } } },
- { M32RXF_INSN_BGTZ, model_m32rx_bgtz, { { (int) UNIT_M32RX_U_CTI, 1, 1 }, { (int) UNIT_M32RX_U_CMP, 1, 0 } } },
- { M32RXF_INSN_BLEZ, model_m32rx_blez, { { (int) UNIT_M32RX_U_CTI, 1, 1 }, { (int) UNIT_M32RX_U_CMP, 1, 0 } } },
- { M32RXF_INSN_BLTZ, model_m32rx_bltz, { { (int) UNIT_M32RX_U_CTI, 1, 1 }, { (int) UNIT_M32RX_U_CMP, 1, 0 } } },
- { M32RXF_INSN_BNEZ, model_m32rx_bnez, { { (int) UNIT_M32RX_U_CTI, 1, 1 }, { (int) UNIT_M32RX_U_CMP, 1, 0 } } },
- { M32RXF_INSN_BL8, model_m32rx_bl8, { { (int) UNIT_M32RX_U_CTI, 1, 1 } } },
- { M32RXF_INSN_BL24, model_m32rx_bl24, { { (int) UNIT_M32RX_U_CTI, 1, 1 } } },
- { M32RXF_INSN_BCL8, model_m32rx_bcl8, { { (int) UNIT_M32RX_U_CTI, 1, 1 } } },
- { M32RXF_INSN_BCL24, model_m32rx_bcl24, { { (int) UNIT_M32RX_U_CTI, 1, 1 } } },
- { M32RXF_INSN_BNC8, model_m32rx_bnc8, { { (int) UNIT_M32RX_U_CTI, 1, 1 } } },
- { M32RXF_INSN_BNC24, model_m32rx_bnc24, { { (int) UNIT_M32RX_U_CTI, 1, 1 } } },
- { M32RXF_INSN_BNE, model_m32rx_bne, { { (int) UNIT_M32RX_U_CTI, 1, 1 }, { (int) UNIT_M32RX_U_CMP, 1, 0 } } },
- { M32RXF_INSN_BRA8, model_m32rx_bra8, { { (int) UNIT_M32RX_U_CTI, 1, 1 } } },
- { M32RXF_INSN_BRA24, model_m32rx_bra24, { { (int) UNIT_M32RX_U_CTI, 1, 1 } } },
- { M32RXF_INSN_BNCL8, model_m32rx_bncl8, { { (int) UNIT_M32RX_U_CTI, 1, 1 } } },
- { M32RXF_INSN_BNCL24, model_m32rx_bncl24, { { (int) UNIT_M32RX_U_CTI, 1, 1 } } },
- { M32RXF_INSN_CMP, model_m32rx_cmp, { { (int) UNIT_M32RX_U_CMP, 1, 1 } } },
- { M32RXF_INSN_CMPI, model_m32rx_cmpi, { { (int) UNIT_M32RX_U_CMP, 1, 1 } } },
- { M32RXF_INSN_CMPU, model_m32rx_cmpu, { { (int) UNIT_M32RX_U_CMP, 1, 1 } } },
- { M32RXF_INSN_CMPUI, model_m32rx_cmpui, { { (int) UNIT_M32RX_U_CMP, 1, 1 } } },
- { M32RXF_INSN_CMPEQ, model_m32rx_cmpeq, { { (int) UNIT_M32RX_U_CMP, 1, 1 } } },
- { M32RXF_INSN_CMPZ, model_m32rx_cmpz, { { (int) UNIT_M32RX_U_CMP, 1, 1 } } },
- { M32RXF_INSN_DIV, model_m32rx_div, { { (int) UNIT_M32RX_U_EXEC, 1, 37 } } },
- { M32RXF_INSN_DIVU, model_m32rx_divu, { { (int) UNIT_M32RX_U_EXEC, 1, 37 } } },
- { M32RXF_INSN_REM, model_m32rx_rem, { { (int) UNIT_M32RX_U_EXEC, 1, 37 } } },
- { M32RXF_INSN_REMU, model_m32rx_remu, { { (int) UNIT_M32RX_U_EXEC, 1, 37 } } },
- { M32RXF_INSN_DIVH, model_m32rx_divh, { { (int) UNIT_M32RX_U_EXEC, 1, 21 } } },
- { M32RXF_INSN_JC, model_m32rx_jc, { { (int) UNIT_M32RX_U_CTI, 1, 1 } } },
- { M32RXF_INSN_JNC, model_m32rx_jnc, { { (int) UNIT_M32RX_U_CTI, 1, 1 } } },
- { M32RXF_INSN_JL, model_m32rx_jl, { { (int) UNIT_M32RX_U_CTI, 1, 1 } } },
- { M32RXF_INSN_JMP, model_m32rx_jmp, { { (int) UNIT_M32RX_U_CTI, 1, 1 } } },
- { M32RXF_INSN_LD, model_m32rx_ld, { { (int) UNIT_M32RX_U_LOAD, 1, 1 } } },
- { M32RXF_INSN_LD_D, model_m32rx_ld_d, { { (int) UNIT_M32RX_U_LOAD, 1, 2 } } },
- { M32RXF_INSN_LDB, model_m32rx_ldb, { { (int) UNIT_M32RX_U_LOAD, 1, 1 } } },
- { M32RXF_INSN_LDB_D, model_m32rx_ldb_d, { { (int) UNIT_M32RX_U_LOAD, 1, 2 } } },
- { M32RXF_INSN_LDH, model_m32rx_ldh, { { (int) UNIT_M32RX_U_LOAD, 1, 1 } } },
- { M32RXF_INSN_LDH_D, model_m32rx_ldh_d, { { (int) UNIT_M32RX_U_LOAD, 1, 2 } } },
- { M32RXF_INSN_LDUB, model_m32rx_ldub, { { (int) UNIT_M32RX_U_LOAD, 1, 1 } } },
- { M32RXF_INSN_LDUB_D, model_m32rx_ldub_d, { { (int) UNIT_M32RX_U_LOAD, 1, 2 } } },
- { M32RXF_INSN_LDUH, model_m32rx_lduh, { { (int) UNIT_M32RX_U_LOAD, 1, 1 } } },
- { M32RXF_INSN_LDUH_D, model_m32rx_lduh_d, { { (int) UNIT_M32RX_U_LOAD, 1, 2 } } },
- { M32RXF_INSN_LD_PLUS, model_m32rx_ld_plus, { { (int) UNIT_M32RX_U_LOAD, 1, 1 }, { (int) UNIT_M32RX_U_EXEC, 1, 0 } } },
- { M32RXF_INSN_LD24, model_m32rx_ld24, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } },
- { M32RXF_INSN_LDI8, model_m32rx_ldi8, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } },
- { M32RXF_INSN_LDI16, model_m32rx_ldi16, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } },
- { M32RXF_INSN_LOCK, model_m32rx_lock, { { (int) UNIT_M32RX_U_LOAD, 1, 1 } } },
- { M32RXF_INSN_MACHI_A, model_m32rx_machi_a, { { (int) UNIT_M32RX_U_MAC, 1, 1 } } },
- { M32RXF_INSN_MACLO_A, model_m32rx_maclo_a, { { (int) UNIT_M32RX_U_MAC, 1, 1 } } },
- { M32RXF_INSN_MACWHI_A, model_m32rx_macwhi_a, { { (int) UNIT_M32RX_U_MAC, 1, 1 } } },
- { M32RXF_INSN_MACWLO_A, model_m32rx_macwlo_a, { { (int) UNIT_M32RX_U_MAC, 1, 1 } } },
- { M32RXF_INSN_MUL, model_m32rx_mul, { { (int) UNIT_M32RX_U_EXEC, 1, 4 } } },
- { M32RXF_INSN_MULHI_A, model_m32rx_mulhi_a, { { (int) UNIT_M32RX_U_MAC, 1, 1 } } },
- { M32RXF_INSN_MULLO_A, model_m32rx_mullo_a, { { (int) UNIT_M32RX_U_MAC, 1, 1 } } },
- { M32RXF_INSN_MULWHI_A, model_m32rx_mulwhi_a, { { (int) UNIT_M32RX_U_MAC, 1, 1 } } },
- { M32RXF_INSN_MULWLO_A, model_m32rx_mulwlo_a, { { (int) UNIT_M32RX_U_MAC, 1, 1 } } },
- { M32RXF_INSN_MV, model_m32rx_mv, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } },
- { M32RXF_INSN_MVFACHI_A, model_m32rx_mvfachi_a, { { (int) UNIT_M32RX_U_EXEC, 1, 2 } } },
- { M32RXF_INSN_MVFACLO_A, model_m32rx_mvfaclo_a, { { (int) UNIT_M32RX_U_EXEC, 1, 2 } } },
- { M32RXF_INSN_MVFACMI_A, model_m32rx_mvfacmi_a, { { (int) UNIT_M32RX_U_EXEC, 1, 2 } } },
- { M32RXF_INSN_MVFC, model_m32rx_mvfc, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } },
- { M32RXF_INSN_MVTACHI_A, model_m32rx_mvtachi_a, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } },
- { M32RXF_INSN_MVTACLO_A, model_m32rx_mvtaclo_a, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } },
- { M32RXF_INSN_MVTC, model_m32rx_mvtc, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } },
- { M32RXF_INSN_NEG, model_m32rx_neg, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } },
- { M32RXF_INSN_NOP, model_m32rx_nop, { { (int) UNIT_M32RX_U_EXEC, 1, 0 } } },
- { M32RXF_INSN_NOT, model_m32rx_not, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } },
- { M32RXF_INSN_RAC_DSI, model_m32rx_rac_dsi, { { (int) UNIT_M32RX_U_MAC, 1, 1 } } },
- { M32RXF_INSN_RACH_DSI, model_m32rx_rach_dsi, { { (int) UNIT_M32RX_U_MAC, 1, 1 } } },
- { M32RXF_INSN_RTE, model_m32rx_rte, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } },
- { M32RXF_INSN_SETH, model_m32rx_seth, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } },
- { M32RXF_INSN_SLL, model_m32rx_sll, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } },
- { M32RXF_INSN_SLL3, model_m32rx_sll3, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } },
- { M32RXF_INSN_SLLI, model_m32rx_slli, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } },
- { M32RXF_INSN_SRA, model_m32rx_sra, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } },
- { M32RXF_INSN_SRA3, model_m32rx_sra3, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } },
- { M32RXF_INSN_SRAI, model_m32rx_srai, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } },
- { M32RXF_INSN_SRL, model_m32rx_srl, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } },
- { M32RXF_INSN_SRL3, model_m32rx_srl3, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } },
- { M32RXF_INSN_SRLI, model_m32rx_srli, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } },
- { M32RXF_INSN_ST, model_m32rx_st, { { (int) UNIT_M32RX_U_STORE, 1, 1 } } },
- { M32RXF_INSN_ST_D, model_m32rx_st_d, { { (int) UNIT_M32RX_U_STORE, 1, 2 } } },
- { M32RXF_INSN_STB, model_m32rx_stb, { { (int) UNIT_M32RX_U_STORE, 1, 1 } } },
- { M32RXF_INSN_STB_D, model_m32rx_stb_d, { { (int) UNIT_M32RX_U_STORE, 1, 2 } } },
- { M32RXF_INSN_STH, model_m32rx_sth, { { (int) UNIT_M32RX_U_STORE, 1, 1 } } },
- { M32RXF_INSN_STH_D, model_m32rx_sth_d, { { (int) UNIT_M32RX_U_STORE, 1, 2 } } },
- { M32RXF_INSN_ST_PLUS, model_m32rx_st_plus, { { (int) UNIT_M32RX_U_STORE, 1, 1 }, { (int) UNIT_M32RX_U_EXEC, 1, 0 } } },
- { M32RXF_INSN_ST_MINUS, model_m32rx_st_minus, { { (int) UNIT_M32RX_U_STORE, 1, 1 }, { (int) UNIT_M32RX_U_EXEC, 1, 0 } } },
- { M32RXF_INSN_SUB, model_m32rx_sub, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } },
- { M32RXF_INSN_SUBV, model_m32rx_subv, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } },
- { M32RXF_INSN_SUBX, model_m32rx_subx, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } },
- { M32RXF_INSN_TRAP, model_m32rx_trap, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } },
- { M32RXF_INSN_UNLOCK, model_m32rx_unlock, { { (int) UNIT_M32RX_U_LOAD, 1, 1 } } },
- { M32RXF_INSN_SATB, model_m32rx_satb, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } },
- { M32RXF_INSN_SATH, model_m32rx_sath, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } },
- { M32RXF_INSN_SAT, model_m32rx_sat, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } },
- { M32RXF_INSN_PCMPBZ, model_m32rx_pcmpbz, { { (int) UNIT_M32RX_U_CMP, 1, 1 } } },
- { M32RXF_INSN_SADD, model_m32rx_sadd, { { (int) UNIT_M32RX_U_MAC, 1, 1 } } },
- { M32RXF_INSN_MACWU1, model_m32rx_macwu1, { { (int) UNIT_M32RX_U_MAC, 1, 1 } } },
- { M32RXF_INSN_MSBLO, model_m32rx_msblo, { { (int) UNIT_M32RX_U_MAC, 1, 1 } } },
- { M32RXF_INSN_MULWU1, model_m32rx_mulwu1, { { (int) UNIT_M32RX_U_MAC, 1, 1 } } },
- { M32RXF_INSN_MACLH1, model_m32rx_maclh1, { { (int) UNIT_M32RX_U_MAC, 1, 1 } } },
- { M32RXF_INSN_SC, model_m32rx_sc, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } },
- { M32RXF_INSN_SNC, model_m32rx_snc, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } },
-};
-
-#endif /* WITH_PROFILE_MODEL_P */
-
-static void
-m32rx_model_init (SIM_CPU *cpu)
-{
- CPU_MODEL_DATA (cpu) = (void *) zalloc (sizeof (MODEL_M32RX_DATA));
-}
-
-#if WITH_PROFILE_MODEL_P
-#define TIMING_DATA(td) td
-#else
-#define TIMING_DATA(td) 0
-#endif
-
-static const MODEL m32rx_models[] =
-{
- { "m32rx", & m32rx_mach, MODEL_M32RX, TIMING_DATA (& m32rx_timing[0]), m32rx_model_init },
- { 0 }
-};
-
-/* The properties of this cpu's implementation. */
-
-static const MACH_IMP_PROPERTIES m32rxf_imp_properties =
-{
- sizeof (SIM_CPU),
-#if WITH_SCACHE
- sizeof (SCACHE)
-#else
- 0
-#endif
-};
-
-
-static void
-m32rxf_prepare_run (SIM_CPU *cpu)
-{
- if (CPU_IDESC (cpu) == NULL)
- m32rxf_init_idesc_table (cpu);
-}
-
-static const CGEN_INSN *
-m32rxf_get_idata (SIM_CPU *cpu, int inum)
-{
- return CPU_IDESC (cpu) [inum].idata;
-}
-
-static void
-m32rx_init_cpu (SIM_CPU *cpu)
-{
- CPU_REG_FETCH (cpu) = m32rxf_fetch_register;
- CPU_REG_STORE (cpu) = m32rxf_store_register;
- CPU_PC_FETCH (cpu) = m32rxf_h_pc_get;
- CPU_PC_STORE (cpu) = m32rxf_h_pc_set;
- CPU_GET_IDATA (cpu) = m32rxf_get_idata;
- CPU_MAX_INSNS (cpu) = M32RXF_INSN_MAX;
- CPU_INSN_NAME (cpu) = cgen_insn_name;
- CPU_FULL_ENGINE_FN (cpu) = m32rxf_engine_run_full;
-#if WITH_FAST
- CPU_FAST_ENGINE_FN (cpu) = m32rxf_engine_run_fast;
-#else
- CPU_FAST_ENGINE_FN (cpu) = m32rxf_engine_run_full;
-#endif
-}
-
-const MACH m32rx_mach =
-{
- "m32rx", "m32rx", MACH_M32RX,
- 32, 32, & m32rx_models[0], & m32rxf_imp_properties,
- m32rx_init_cpu,
- m32rxf_prepare_run
-};
-
diff --git a/sim/m32r/sem-switch.c b/sim/m32r/sem-switch.c
deleted file mode 100644
index 658d5997a35..00000000000
--- a/sim/m32r/sem-switch.c
+++ /dev/null
@@ -1,2515 +0,0 @@
-/* Simulator instruction semantics for m32rbf.
-
-THIS FILE IS MACHINE GENERATED WITH CGEN.
-
-Copyright (C) 1996, 1997, 1998, 1999, 2000 Free Software Foundation, Inc.
-
-This file is part of the GNU Simulators.
-
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License along
-with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
-*/
-
-#ifdef DEFINE_LABELS
-
- /* The labels have the case they have because the enum of insn types
- is all uppercase and in the non-stdc case the insn symbol is built
- into the enum name. */
-
- static struct {
- int index;
- void *label;
- } labels[] = {
- { M32RBF_INSN_X_INVALID, && case_sem_INSN_X_INVALID },
- { M32RBF_INSN_X_AFTER, && case_sem_INSN_X_AFTER },
- { M32RBF_INSN_X_BEFORE, && case_sem_INSN_X_BEFORE },
- { M32RBF_INSN_X_CTI_CHAIN, && case_sem_INSN_X_CTI_CHAIN },
- { M32RBF_INSN_X_CHAIN, && case_sem_INSN_X_CHAIN },
- { M32RBF_INSN_X_BEGIN, && case_sem_INSN_X_BEGIN },
- { M32RBF_INSN_ADD, && case_sem_INSN_ADD },
- { M32RBF_INSN_ADD3, && case_sem_INSN_ADD3 },
- { M32RBF_INSN_AND, && case_sem_INSN_AND },
- { M32RBF_INSN_AND3, && case_sem_INSN_AND3 },
- { M32RBF_INSN_OR, && case_sem_INSN_OR },
- { M32RBF_INSN_OR3, && case_sem_INSN_OR3 },
- { M32RBF_INSN_XOR, && case_sem_INSN_XOR },
- { M32RBF_INSN_XOR3, && case_sem_INSN_XOR3 },
- { M32RBF_INSN_ADDI, && case_sem_INSN_ADDI },
- { M32RBF_INSN_ADDV, && case_sem_INSN_ADDV },
- { M32RBF_INSN_ADDV3, && case_sem_INSN_ADDV3 },
- { M32RBF_INSN_ADDX, && case_sem_INSN_ADDX },
- { M32RBF_INSN_BC8, && case_sem_INSN_BC8 },
- { M32RBF_INSN_BC24, && case_sem_INSN_BC24 },
- { M32RBF_INSN_BEQ, && case_sem_INSN_BEQ },
- { M32RBF_INSN_BEQZ, && case_sem_INSN_BEQZ },
- { M32RBF_INSN_BGEZ, && case_sem_INSN_BGEZ },
- { M32RBF_INSN_BGTZ, && case_sem_INSN_BGTZ },
- { M32RBF_INSN_BLEZ, && case_sem_INSN_BLEZ },
- { M32RBF_INSN_BLTZ, && case_sem_INSN_BLTZ },
- { M32RBF_INSN_BNEZ, && case_sem_INSN_BNEZ },
- { M32RBF_INSN_BL8, && case_sem_INSN_BL8 },
- { M32RBF_INSN_BL24, && case_sem_INSN_BL24 },
- { M32RBF_INSN_BNC8, && case_sem_INSN_BNC8 },
- { M32RBF_INSN_BNC24, && case_sem_INSN_BNC24 },
- { M32RBF_INSN_BNE, && case_sem_INSN_BNE },
- { M32RBF_INSN_BRA8, && case_sem_INSN_BRA8 },
- { M32RBF_INSN_BRA24, && case_sem_INSN_BRA24 },
- { M32RBF_INSN_CMP, && case_sem_INSN_CMP },
- { M32RBF_INSN_CMPI, && case_sem_INSN_CMPI },
- { M32RBF_INSN_CMPU, && case_sem_INSN_CMPU },
- { M32RBF_INSN_CMPUI, && case_sem_INSN_CMPUI },
- { M32RBF_INSN_DIV, && case_sem_INSN_DIV },
- { M32RBF_INSN_DIVU, && case_sem_INSN_DIVU },
- { M32RBF_INSN_REM, && case_sem_INSN_REM },
- { M32RBF_INSN_REMU, && case_sem_INSN_REMU },
- { M32RBF_INSN_JL, && case_sem_INSN_JL },
- { M32RBF_INSN_JMP, && case_sem_INSN_JMP },
- { M32RBF_INSN_LD, && case_sem_INSN_LD },
- { M32RBF_INSN_LD_D, && case_sem_INSN_LD_D },
- { M32RBF_INSN_LDB, && case_sem_INSN_LDB },
- { M32RBF_INSN_LDB_D, && case_sem_INSN_LDB_D },
- { M32RBF_INSN_LDH, && case_sem_INSN_LDH },
- { M32RBF_INSN_LDH_D, && case_sem_INSN_LDH_D },
- { M32RBF_INSN_LDUB, && case_sem_INSN_LDUB },
- { M32RBF_INSN_LDUB_D, && case_sem_INSN_LDUB_D },
- { M32RBF_INSN_LDUH, && case_sem_INSN_LDUH },
- { M32RBF_INSN_LDUH_D, && case_sem_INSN_LDUH_D },
- { M32RBF_INSN_LD_PLUS, && case_sem_INSN_LD_PLUS },
- { M32RBF_INSN_LD24, && case_sem_INSN_LD24 },
- { M32RBF_INSN_LDI8, && case_sem_INSN_LDI8 },
- { M32RBF_INSN_LDI16, && case_sem_INSN_LDI16 },
- { M32RBF_INSN_LOCK, && case_sem_INSN_LOCK },
- { M32RBF_INSN_MACHI, && case_sem_INSN_MACHI },
- { M32RBF_INSN_MACLO, && case_sem_INSN_MACLO },
- { M32RBF_INSN_MACWHI, && case_sem_INSN_MACWHI },
- { M32RBF_INSN_MACWLO, && case_sem_INSN_MACWLO },
- { M32RBF_INSN_MUL, && case_sem_INSN_MUL },
- { M32RBF_INSN_MULHI, && case_sem_INSN_MULHI },
- { M32RBF_INSN_MULLO, && case_sem_INSN_MULLO },
- { M32RBF_INSN_MULWHI, && case_sem_INSN_MULWHI },
- { M32RBF_INSN_MULWLO, && case_sem_INSN_MULWLO },
- { M32RBF_INSN_MV, && case_sem_INSN_MV },
- { M32RBF_INSN_MVFACHI, && case_sem_INSN_MVFACHI },
- { M32RBF_INSN_MVFACLO, && case_sem_INSN_MVFACLO },
- { M32RBF_INSN_MVFACMI, && case_sem_INSN_MVFACMI },
- { M32RBF_INSN_MVFC, && case_sem_INSN_MVFC },
- { M32RBF_INSN_MVTACHI, && case_sem_INSN_MVTACHI },
- { M32RBF_INSN_MVTACLO, && case_sem_INSN_MVTACLO },
- { M32RBF_INSN_MVTC, && case_sem_INSN_MVTC },
- { M32RBF_INSN_NEG, && case_sem_INSN_NEG },
- { M32RBF_INSN_NOP, && case_sem_INSN_NOP },
- { M32RBF_INSN_NOT, && case_sem_INSN_NOT },
- { M32RBF_INSN_RAC, && case_sem_INSN_RAC },
- { M32RBF_INSN_RACH, && case_sem_INSN_RACH },
- { M32RBF_INSN_RTE, && case_sem_INSN_RTE },
- { M32RBF_INSN_SETH, && case_sem_INSN_SETH },
- { M32RBF_INSN_SLL, && case_sem_INSN_SLL },
- { M32RBF_INSN_SLL3, && case_sem_INSN_SLL3 },
- { M32RBF_INSN_SLLI, && case_sem_INSN_SLLI },
- { M32RBF_INSN_SRA, && case_sem_INSN_SRA },
- { M32RBF_INSN_SRA3, && case_sem_INSN_SRA3 },
- { M32RBF_INSN_SRAI, && case_sem_INSN_SRAI },
- { M32RBF_INSN_SRL, && case_sem_INSN_SRL },
- { M32RBF_INSN_SRL3, && case_sem_INSN_SRL3 },
- { M32RBF_INSN_SRLI, && case_sem_INSN_SRLI },
- { M32RBF_INSN_ST, && case_sem_INSN_ST },
- { M32RBF_INSN_ST_D, && case_sem_INSN_ST_D },
- { M32RBF_INSN_STB, && case_sem_INSN_STB },
- { M32RBF_INSN_STB_D, && case_sem_INSN_STB_D },
- { M32RBF_INSN_STH, && case_sem_INSN_STH },
- { M32RBF_INSN_STH_D, && case_sem_INSN_STH_D },
- { M32RBF_INSN_ST_PLUS, && case_sem_INSN_ST_PLUS },
- { M32RBF_INSN_ST_MINUS, && case_sem_INSN_ST_MINUS },
- { M32RBF_INSN_SUB, && case_sem_INSN_SUB },
- { M32RBF_INSN_SUBV, && case_sem_INSN_SUBV },
- { M32RBF_INSN_SUBX, && case_sem_INSN_SUBX },
- { M32RBF_INSN_TRAP, && case_sem_INSN_TRAP },
- { M32RBF_INSN_UNLOCK, && case_sem_INSN_UNLOCK },
- { 0, 0 }
- };
- int i;
-
- for (i = 0; labels[i].label != 0; ++i)
- {
-#if FAST_P
- CPU_IDESC (current_cpu) [labels[i].index].sem_fast_lab = labels[i].label;
-#else
- CPU_IDESC (current_cpu) [labels[i].index].sem_full_lab = labels[i].label;
-#endif
- }
-
-#undef DEFINE_LABELS
-#endif /* DEFINE_LABELS */
-
-#ifdef DEFINE_SWITCH
-
-/* If hyper-fast [well not unnecessarily slow] execution is selected, turn
- off frills like tracing and profiling. */
-/* FIXME: A better way would be to have TRACE_RESULT check for something
- that can cause it to be optimized out. Another way would be to emit
- special handlers into the instruction "stream". */
-
-#if FAST_P
-#undef TRACE_RESULT
-#define TRACE_RESULT(cpu, abuf, name, type, val)
-#endif
-
-#undef GET_ATTR
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
-#define GET_ATTR(cpu, num, attr) CGEN_ATTR_VALUE (NULL, abuf->idesc->attrs, CGEN_INSN_##attr)
-#else
-#define GET_ATTR(cpu, num, attr) CGEN_ATTR_VALUE (NULL, abuf->idesc->attrs, CGEN_INSN_/**/attr)
-#endif
-
-{
-
-#if WITH_SCACHE_PBB
-
-/* Branch to next handler without going around main loop. */
-#define NEXT(vpc) goto * SEM_ARGBUF (vpc) -> semantic.sem_case
-SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
-
-#else /* ! WITH_SCACHE_PBB */
-
-#define NEXT(vpc) BREAK (sem)
-#ifdef __GNUC__
-#if FAST_P
- SWITCH (sem, SEM_ARGBUF (sc) -> idesc->sem_fast_lab)
-#else
- SWITCH (sem, SEM_ARGBUF (sc) -> idesc->sem_full_lab)
-#endif
-#else
- SWITCH (sem, SEM_ARGBUF (sc) -> idesc->num)
-#endif
-
-#endif /* ! WITH_SCACHE_PBB */
-
- {
-
- CASE (sem, INSN_X_INVALID) : /* --invalid-- */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_empty.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
-
- {
- /* Update the recorded pc in the cpu state struct.
- Only necessary for WITH_SCACHE case, but to avoid the
- conditional compilation .... */
- SET_H_PC (pc);
- /* Virtual insns have zero size. Overwrite vpc with address of next insn
- using the default-insn-bitsize spec. When executing insns in parallel
- we may want to queue the fault and continue execution. */
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
- vpc = sim_engine_invalid_insn (current_cpu, pc, vpc);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_X_AFTER) : /* --after-- */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_empty.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
-
- {
-#if WITH_SCACHE_PBB_M32RBF
- m32rbf_pbb_after (current_cpu, sem_arg);
-#endif
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_X_BEFORE) : /* --before-- */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_empty.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
-
- {
-#if WITH_SCACHE_PBB_M32RBF
- m32rbf_pbb_before (current_cpu, sem_arg);
-#endif
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_X_CTI_CHAIN) : /* --cti-chain-- */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_empty.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
-
- {
-#if WITH_SCACHE_PBB_M32RBF
-#ifdef DEFINE_SWITCH
- vpc = m32rbf_pbb_cti_chain (current_cpu, sem_arg,
- pbb_br_type, pbb_br_npc);
- BREAK (sem);
-#else
- /* FIXME: Allow provision of explicit ifmt spec in insn spec. */
- vpc = m32rbf_pbb_cti_chain (current_cpu, sem_arg,
- CPU_PBB_BR_TYPE (current_cpu),
- CPU_PBB_BR_NPC (current_cpu));
-#endif
-#endif
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_X_CHAIN) : /* --chain-- */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_empty.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
-
- {
-#if WITH_SCACHE_PBB_M32RBF
- vpc = m32rbf_pbb_chain (current_cpu, sem_arg);
-#ifdef DEFINE_SWITCH
- BREAK (sem);
-#endif
-#endif
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_X_BEGIN) : /* --begin-- */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_empty.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
-
- {
-#if WITH_SCACHE_PBB_M32RBF
-#if defined DEFINE_SWITCH || defined FAST_P
- /* In the switch case FAST_P is a constant, allowing several optimizations
- in any called inline functions. */
- vpc = m32rbf_pbb_begin (current_cpu, FAST_P);
-#else
-#if 0 /* cgen engine can't handle dynamic fast/full switching yet. */
- vpc = m32rbf_pbb_begin (current_cpu, STATE_RUN_FAST_P (CPU_STATE (current_cpu)));
-#else
- vpc = m32rbf_pbb_begin (current_cpu, 0);
-#endif
-#endif
-#endif
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_ADD) : /* add $dr,$sr */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_add.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = ADDSI (* FLD (i_dr), * FLD (i_sr));
- * FLD (i_dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_ADD3) : /* add3 $dr,$sr,$hash$slo16 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_add3.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = ADDSI (* FLD (i_sr), FLD (f_simm16));
- * FLD (i_dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_AND) : /* and $dr,$sr */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_add.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = ANDSI (* FLD (i_dr), * FLD (i_sr));
- * FLD (i_dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_AND3) : /* and3 $dr,$sr,$uimm16 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_and3.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = ANDSI (* FLD (i_sr), FLD (f_uimm16));
- * FLD (i_dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_OR) : /* or $dr,$sr */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_add.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = ORSI (* FLD (i_dr), * FLD (i_sr));
- * FLD (i_dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_OR3) : /* or3 $dr,$sr,$hash$ulo16 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_and3.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = ORSI (* FLD (i_sr), FLD (f_uimm16));
- * FLD (i_dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_XOR) : /* xor $dr,$sr */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_add.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = XORSI (* FLD (i_dr), * FLD (i_sr));
- * FLD (i_dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_XOR3) : /* xor3 $dr,$sr,$uimm16 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_and3.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = XORSI (* FLD (i_sr), FLD (f_uimm16));
- * FLD (i_dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_ADDI) : /* addi $dr,$simm8 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_addi.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = ADDSI (* FLD (i_dr), FLD (f_simm8));
- * FLD (i_dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_ADDV) : /* addv $dr,$sr */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_add.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- SI temp0;BI temp1;
- temp0 = ADDSI (* FLD (i_dr), * FLD (i_sr));
- temp1 = ADDOFSI (* FLD (i_dr), * FLD (i_sr), 0);
- {
- SI opval = temp0;
- * FLD (i_dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
- {
- BI opval = temp1;
- CPU (h_cond) = opval;
- TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
- }
-}
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_ADDV3) : /* addv3 $dr,$sr,$simm16 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_add3.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-{
- SI temp0;BI temp1;
- temp0 = ADDSI (* FLD (i_sr), FLD (f_simm16));
- temp1 = ADDOFSI (* FLD (i_sr), FLD (f_simm16), 0);
- {
- SI opval = temp0;
- * FLD (i_dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
- {
- BI opval = temp1;
- CPU (h_cond) = opval;
- TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
- }
-}
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_ADDX) : /* addx $dr,$sr */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_add.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- SI temp0;BI temp1;
- temp0 = ADDCSI (* FLD (i_dr), * FLD (i_sr), CPU (h_cond));
- temp1 = ADDCFSI (* FLD (i_dr), * FLD (i_sr), CPU (h_cond));
- {
- SI opval = temp0;
- * FLD (i_dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
- {
- BI opval = temp1;
- CPU (h_cond) = opval;
- TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
- }
-}
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_BC8) : /* bc.s $disp8 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_bl8.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-if (CPU (h_cond)) {
- {
- USI opval = FLD (i_disp8);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 2);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_BC24) : /* bc.l $disp24 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_bl24.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-if (CPU (h_cond)) {
- {
- USI opval = FLD (i_disp24);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 2);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_BEQ) : /* beq $src1,$src2,$disp16 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_beq.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-if (EQSI (* FLD (i_src1), * FLD (i_src2))) {
- {
- USI opval = FLD (i_disp16);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 3);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_BEQZ) : /* beqz $src2,$disp16 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_beq.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-if (EQSI (* FLD (i_src2), 0)) {
- {
- USI opval = FLD (i_disp16);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 2);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_BGEZ) : /* bgez $src2,$disp16 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_beq.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-if (GESI (* FLD (i_src2), 0)) {
- {
- USI opval = FLD (i_disp16);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 2);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_BGTZ) : /* bgtz $src2,$disp16 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_beq.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-if (GTSI (* FLD (i_src2), 0)) {
- {
- USI opval = FLD (i_disp16);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 2);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_BLEZ) : /* blez $src2,$disp16 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_beq.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-if (LESI (* FLD (i_src2), 0)) {
- {
- USI opval = FLD (i_disp16);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 2);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_BLTZ) : /* bltz $src2,$disp16 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_beq.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-if (LTSI (* FLD (i_src2), 0)) {
- {
- USI opval = FLD (i_disp16);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 2);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_BNEZ) : /* bnez $src2,$disp16 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_beq.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-if (NESI (* FLD (i_src2), 0)) {
- {
- USI opval = FLD (i_disp16);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 2);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_BL8) : /* bl.s $disp8 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_bl8.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- {
- SI opval = ADDSI (ANDSI (pc, -4), 4);
- CPU (h_gr[((UINT) 14)]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
- {
- USI opval = FLD (i_disp8);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- SEM_BRANCH_FINI (vpc);
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_BL24) : /* bl.l $disp24 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_bl24.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-{
- {
- SI opval = ADDSI (pc, 4);
- CPU (h_gr[((UINT) 14)]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
- {
- USI opval = FLD (i_disp24);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- SEM_BRANCH_FINI (vpc);
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_BNC8) : /* bnc.s $disp8 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_bl8.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-if (NOTBI (CPU (h_cond))) {
- {
- USI opval = FLD (i_disp8);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 2);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_BNC24) : /* bnc.l $disp24 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_bl24.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-if (NOTBI (CPU (h_cond))) {
- {
- USI opval = FLD (i_disp24);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 2);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_BNE) : /* bne $src1,$src2,$disp16 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_beq.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-if (NESI (* FLD (i_src1), * FLD (i_src2))) {
- {
- USI opval = FLD (i_disp16);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 3);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_BRA8) : /* bra.s $disp8 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_bl8.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- USI opval = FLD (i_disp8);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-
- SEM_BRANCH_FINI (vpc);
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_BRA24) : /* bra.l $disp24 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_bl24.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- USI opval = FLD (i_disp24);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-
- SEM_BRANCH_FINI (vpc);
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_CMP) : /* cmp $src1,$src2 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_st_plus.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- BI opval = LTSI (* FLD (i_src1), * FLD (i_src2));
- CPU (h_cond) = opval;
- TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_CMPI) : /* cmpi $src2,$simm16 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_st_d.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- BI opval = LTSI (* FLD (i_src2), FLD (f_simm16));
- CPU (h_cond) = opval;
- TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_CMPU) : /* cmpu $src1,$src2 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_st_plus.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- BI opval = LTUSI (* FLD (i_src1), * FLD (i_src2));
- CPU (h_cond) = opval;
- TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_CMPUI) : /* cmpui $src2,$simm16 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_st_d.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- BI opval = LTUSI (* FLD (i_src2), FLD (f_simm16));
- CPU (h_cond) = opval;
- TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_DIV) : /* div $dr,$sr */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_add.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-if (NESI (* FLD (i_sr), 0)) {
- {
- SI opval = DIVSI (* FLD (i_dr), * FLD (i_sr));
- * FLD (i_dr) = opval;
- written |= (1 << 2);
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-}
-
- abuf->written = written;
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_DIVU) : /* divu $dr,$sr */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_add.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-if (NESI (* FLD (i_sr), 0)) {
- {
- SI opval = UDIVSI (* FLD (i_dr), * FLD (i_sr));
- * FLD (i_dr) = opval;
- written |= (1 << 2);
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-}
-
- abuf->written = written;
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_REM) : /* rem $dr,$sr */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_add.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-if (NESI (* FLD (i_sr), 0)) {
- {
- SI opval = MODSI (* FLD (i_dr), * FLD (i_sr));
- * FLD (i_dr) = opval;
- written |= (1 << 2);
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-}
-
- abuf->written = written;
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_REMU) : /* remu $dr,$sr */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_add.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-if (NESI (* FLD (i_sr), 0)) {
- {
- SI opval = UMODSI (* FLD (i_dr), * FLD (i_sr));
- * FLD (i_dr) = opval;
- written |= (1 << 2);
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-}
-
- abuf->written = written;
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_JL) : /* jl $sr */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_jl.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- SI temp0;USI temp1;
- temp0 = ADDSI (ANDSI (pc, -4), 4);
- temp1 = ANDSI (* FLD (i_sr), -4);
- {
- SI opval = temp0;
- CPU (h_gr[((UINT) 14)]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
- {
- USI opval = temp1;
- SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- SEM_BRANCH_FINI (vpc);
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_JMP) : /* jmp $sr */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_jl.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- USI opval = ANDSI (* FLD (i_sr), -4);
- SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-
- SEM_BRANCH_FINI (vpc);
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_LD) : /* ld $dr,@$sr */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_ld_plus.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = GETMEMSI (current_cpu, pc, * FLD (i_sr));
- * FLD (i_dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_LD_D) : /* ld $dr,@($slo16,$sr) */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_add3.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = GETMEMSI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16)));
- * FLD (i_dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_LDB) : /* ldb $dr,@$sr */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_ld_plus.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = EXTQISI (GETMEMQI (current_cpu, pc, * FLD (i_sr)));
- * FLD (i_dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_LDB_D) : /* ldb $dr,@($slo16,$sr) */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_add3.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = EXTQISI (GETMEMQI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16))));
- * FLD (i_dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_LDH) : /* ldh $dr,@$sr */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_ld_plus.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = EXTHISI (GETMEMHI (current_cpu, pc, * FLD (i_sr)));
- * FLD (i_dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_LDH_D) : /* ldh $dr,@($slo16,$sr) */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_add3.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = EXTHISI (GETMEMHI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16))));
- * FLD (i_dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_LDUB) : /* ldub $dr,@$sr */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_ld_plus.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = ZEXTQISI (GETMEMQI (current_cpu, pc, * FLD (i_sr)));
- * FLD (i_dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_LDUB_D) : /* ldub $dr,@($slo16,$sr) */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_add3.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = ZEXTQISI (GETMEMQI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16))));
- * FLD (i_dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_LDUH) : /* lduh $dr,@$sr */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_ld_plus.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = ZEXTHISI (GETMEMHI (current_cpu, pc, * FLD (i_sr)));
- * FLD (i_dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_LDUH_D) : /* lduh $dr,@($slo16,$sr) */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_add3.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = ZEXTHISI (GETMEMHI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16))));
- * FLD (i_dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_LD_PLUS) : /* ld $dr,@$sr+ */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_ld_plus.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- SI temp0;SI temp1;
- temp0 = GETMEMSI (current_cpu, pc, * FLD (i_sr));
- temp1 = ADDSI (* FLD (i_sr), 4);
- {
- SI opval = temp0;
- * FLD (i_dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
- {
- SI opval = temp1;
- * FLD (i_sr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-}
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_LD24) : /* ld24 $dr,$uimm24 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_ld24.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = FLD (i_uimm24);
- * FLD (i_dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_LDI8) : /* ldi8 $dr,$simm8 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_addi.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = FLD (f_simm8);
- * FLD (i_dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_LDI16) : /* ldi16 $dr,$hash$slo16 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_add3.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = FLD (f_simm16);
- * FLD (i_dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_LOCK) : /* lock $dr,@$sr */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_ld_plus.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- {
- BI opval = 1;
- CPU (h_lock) = opval;
- TRACE_RESULT (current_cpu, abuf, "lock", 'x', opval);
- }
- {
- SI opval = GETMEMSI (current_cpu, pc, * FLD (i_sr));
- * FLD (i_dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-}
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_MACHI) : /* machi $src1,$src2 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_st_plus.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- DI opval = SRADI (SLLDI (ADDDI (GET_H_ACCUM (), MULDI (EXTSIDI (ANDSI (* FLD (i_src1), 0xffff0000)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16))))), 8), 8);
- SET_H_ACCUM (opval);
- TRACE_RESULT (current_cpu, abuf, "accum", 'D', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_MACLO) : /* maclo $src1,$src2 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_st_plus.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- DI opval = SRADI (SLLDI (ADDDI (GET_H_ACCUM (), MULDI (EXTSIDI (SLLSI (* FLD (i_src1), 16)), EXTHIDI (TRUNCSIHI (* FLD (i_src2))))), 8), 8);
- SET_H_ACCUM (opval);
- TRACE_RESULT (current_cpu, abuf, "accum", 'D', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_MACWHI) : /* macwhi $src1,$src2 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_st_plus.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- DI opval = SRADI (SLLDI (ADDDI (GET_H_ACCUM (), MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16))))), 8), 8);
- SET_H_ACCUM (opval);
- TRACE_RESULT (current_cpu, abuf, "accum", 'D', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_MACWLO) : /* macwlo $src1,$src2 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_st_plus.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- DI opval = SRADI (SLLDI (ADDDI (GET_H_ACCUM (), MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (* FLD (i_src2))))), 8), 8);
- SET_H_ACCUM (opval);
- TRACE_RESULT (current_cpu, abuf, "accum", 'D', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_MUL) : /* mul $dr,$sr */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_add.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = MULSI (* FLD (i_dr), * FLD (i_sr));
- * FLD (i_dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_MULHI) : /* mulhi $src1,$src2 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_st_plus.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- DI opval = SRADI (SLLDI (MULDI (EXTSIDI (ANDSI (* FLD (i_src1), 0xffff0000)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16)))), 16), 16);
- SET_H_ACCUM (opval);
- TRACE_RESULT (current_cpu, abuf, "accum", 'D', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_MULLO) : /* mullo $src1,$src2 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_st_plus.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- DI opval = SRADI (SLLDI (MULDI (EXTSIDI (SLLSI (* FLD (i_src1), 16)), EXTHIDI (TRUNCSIHI (* FLD (i_src2)))), 16), 16);
- SET_H_ACCUM (opval);
- TRACE_RESULT (current_cpu, abuf, "accum", 'D', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_MULWHI) : /* mulwhi $src1,$src2 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_st_plus.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- DI opval = SRADI (SLLDI (MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16)))), 8), 8);
- SET_H_ACCUM (opval);
- TRACE_RESULT (current_cpu, abuf, "accum", 'D', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_MULWLO) : /* mulwlo $src1,$src2 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_st_plus.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- DI opval = SRADI (SLLDI (MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (* FLD (i_src2)))), 8), 8);
- SET_H_ACCUM (opval);
- TRACE_RESULT (current_cpu, abuf, "accum", 'D', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_MV) : /* mv $dr,$sr */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_ld_plus.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = * FLD (i_sr);
- * FLD (i_dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_MVFACHI) : /* mvfachi $dr */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_seth.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = TRUNCDISI (SRADI (GET_H_ACCUM (), 32));
- * FLD (i_dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_MVFACLO) : /* mvfaclo $dr */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_seth.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = TRUNCDISI (GET_H_ACCUM ());
- * FLD (i_dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_MVFACMI) : /* mvfacmi $dr */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_seth.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = TRUNCDISI (SRADI (GET_H_ACCUM (), 16));
- * FLD (i_dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_MVFC) : /* mvfc $dr,$scr */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_ld_plus.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = GET_H_CR (FLD (f_r2));
- * FLD (i_dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_MVTACHI) : /* mvtachi $src1 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_st_plus.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- DI opval = ORDI (ANDDI (GET_H_ACCUM (), MAKEDI (0, 0xffffffff)), SLLDI (EXTSIDI (* FLD (i_src1)), 32));
- SET_H_ACCUM (opval);
- TRACE_RESULT (current_cpu, abuf, "accum", 'D', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_MVTACLO) : /* mvtaclo $src1 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_st_plus.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- DI opval = ORDI (ANDDI (GET_H_ACCUM (), MAKEDI (0xffffffff, 0)), ZEXTSIDI (* FLD (i_src1)));
- SET_H_ACCUM (opval);
- TRACE_RESULT (current_cpu, abuf, "accum", 'D', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_MVTC) : /* mvtc $sr,$dcr */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_ld_plus.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- USI opval = * FLD (i_sr);
- SET_H_CR (FLD (f_r1), opval);
- TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_NEG) : /* neg $dr,$sr */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_ld_plus.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = NEGSI (* FLD (i_sr));
- * FLD (i_dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_NOP) : /* nop */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_empty.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-PROFILE_COUNT_FILLNOPS (current_cpu, abuf->addr);
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_NOT) : /* not $dr,$sr */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_ld_plus.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = INVSI (* FLD (i_sr));
- * FLD (i_dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_RAC) : /* rac */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_empty.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- DI tmp_tmp1;
- tmp_tmp1 = SLLDI (GET_H_ACCUM (), 1);
- tmp_tmp1 = ADDDI (tmp_tmp1, MAKEDI (0, 32768));
- {
- DI opval = (GTDI (tmp_tmp1, MAKEDI (32767, 0xffff0000))) ? (MAKEDI (32767, 0xffff0000)) : (LTDI (tmp_tmp1, MAKEDI (0xffff8000, 0))) ? (MAKEDI (0xffff8000, 0)) : (ANDDI (tmp_tmp1, MAKEDI (0xffffffff, 0xffff0000)));
- SET_H_ACCUM (opval);
- TRACE_RESULT (current_cpu, abuf, "accum", 'D', opval);
- }
-}
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_RACH) : /* rach */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_empty.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- DI tmp_tmp1;
- tmp_tmp1 = ANDDI (GET_H_ACCUM (), MAKEDI (16777215, 0xffffffff));
-if (ANDIF (GEDI (tmp_tmp1, MAKEDI (16383, 0x80000000)), LEDI (tmp_tmp1, MAKEDI (8388607, 0xffffffff)))) {
- tmp_tmp1 = MAKEDI (16383, 0x80000000);
-} else {
-if (ANDIF (GEDI (tmp_tmp1, MAKEDI (8388608, 0)), LEDI (tmp_tmp1, MAKEDI (16760832, 0)))) {
- tmp_tmp1 = MAKEDI (16760832, 0);
-} else {
- tmp_tmp1 = ANDDI (ADDDI (GET_H_ACCUM (), MAKEDI (0, 1073741824)), MAKEDI (0xffffffff, 0x80000000));
-}
-}
- tmp_tmp1 = SLLDI (tmp_tmp1, 1);
- {
- DI opval = SRADI (SLLDI (tmp_tmp1, 7), 7);
- SET_H_ACCUM (opval);
- TRACE_RESULT (current_cpu, abuf, "accum", 'D', opval);
- }
-}
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_RTE) : /* rte */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_empty.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- {
- USI opval = ANDSI (GET_H_CR (((UINT) 6)), -4);
- SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
- {
- USI opval = GET_H_CR (((UINT) 14));
- SET_H_CR (((UINT) 6), opval);
- TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval);
- }
- {
- UQI opval = CPU (h_bpsw);
- SET_H_PSW (opval);
- TRACE_RESULT (current_cpu, abuf, "psw", 'x', opval);
- }
- {
- UQI opval = CPU (h_bbpsw);
- CPU (h_bpsw) = opval;
- TRACE_RESULT (current_cpu, abuf, "bpsw", 'x', opval);
- }
-}
-
- SEM_BRANCH_FINI (vpc);
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_SETH) : /* seth $dr,$hash$hi16 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_seth.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = SLLSI (FLD (f_hi16), 16);
- * FLD (i_dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_SLL) : /* sll $dr,$sr */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_add.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = SLLSI (* FLD (i_dr), ANDSI (* FLD (i_sr), 31));
- * FLD (i_dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_SLL3) : /* sll3 $dr,$sr,$simm16 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_add3.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = SLLSI (* FLD (i_sr), ANDSI (FLD (f_simm16), 31));
- * FLD (i_dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_SLLI) : /* slli $dr,$uimm5 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_slli.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = SLLSI (* FLD (i_dr), FLD (f_uimm5));
- * FLD (i_dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_SRA) : /* sra $dr,$sr */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_add.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = SRASI (* FLD (i_dr), ANDSI (* FLD (i_sr), 31));
- * FLD (i_dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_SRA3) : /* sra3 $dr,$sr,$simm16 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_add3.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = SRASI (* FLD (i_sr), ANDSI (FLD (f_simm16), 31));
- * FLD (i_dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_SRAI) : /* srai $dr,$uimm5 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_slli.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = SRASI (* FLD (i_dr), FLD (f_uimm5));
- * FLD (i_dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_SRL) : /* srl $dr,$sr */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_add.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = SRLSI (* FLD (i_dr), ANDSI (* FLD (i_sr), 31));
- * FLD (i_dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_SRL3) : /* srl3 $dr,$sr,$simm16 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_add3.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = SRLSI (* FLD (i_sr), ANDSI (FLD (f_simm16), 31));
- * FLD (i_dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_SRLI) : /* srli $dr,$uimm5 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_slli.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = SRLSI (* FLD (i_dr), FLD (f_uimm5));
- * FLD (i_dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_ST) : /* st $src1,@$src2 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_st_plus.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = * FLD (i_src1);
- SETMEMSI (current_cpu, pc, * FLD (i_src2), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_ST_D) : /* st $src1,@($slo16,$src2) */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_st_d.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = * FLD (i_src1);
- SETMEMSI (current_cpu, pc, ADDSI (* FLD (i_src2), FLD (f_simm16)), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_STB) : /* stb $src1,@$src2 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_st_plus.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- QI opval = * FLD (i_src1);
- SETMEMQI (current_cpu, pc, * FLD (i_src2), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_STB_D) : /* stb $src1,@($slo16,$src2) */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_st_d.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- QI opval = * FLD (i_src1);
- SETMEMQI (current_cpu, pc, ADDSI (* FLD (i_src2), FLD (f_simm16)), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_STH) : /* sth $src1,@$src2 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_st_plus.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- HI opval = * FLD (i_src1);
- SETMEMHI (current_cpu, pc, * FLD (i_src2), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_STH_D) : /* sth $src1,@($slo16,$src2) */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_st_d.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- HI opval = * FLD (i_src1);
- SETMEMHI (current_cpu, pc, ADDSI (* FLD (i_src2), FLD (f_simm16)), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_ST_PLUS) : /* st $src1,@+$src2 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_st_plus.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- SI tmp_new_src2;
- tmp_new_src2 = ADDSI (* FLD (i_src2), 4);
- {
- SI opval = * FLD (i_src1);
- SETMEMSI (current_cpu, pc, tmp_new_src2, opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
- {
- SI opval = tmp_new_src2;
- * FLD (i_src2) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-}
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_ST_MINUS) : /* st $src1,@-$src2 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_st_plus.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- SI tmp_new_src2;
- tmp_new_src2 = SUBSI (* FLD (i_src2), 4);
- {
- SI opval = * FLD (i_src1);
- SETMEMSI (current_cpu, pc, tmp_new_src2, opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
- {
- SI opval = tmp_new_src2;
- * FLD (i_src2) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-}
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_SUB) : /* sub $dr,$sr */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_add.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = SUBSI (* FLD (i_dr), * FLD (i_sr));
- * FLD (i_dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_SUBV) : /* subv $dr,$sr */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_add.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- SI temp0;BI temp1;
- temp0 = SUBSI (* FLD (i_dr), * FLD (i_sr));
- temp1 = SUBOFSI (* FLD (i_dr), * FLD (i_sr), 0);
- {
- SI opval = temp0;
- * FLD (i_dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
- {
- BI opval = temp1;
- CPU (h_cond) = opval;
- TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
- }
-}
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_SUBX) : /* subx $dr,$sr */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_add.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- SI temp0;BI temp1;
- temp0 = SUBCSI (* FLD (i_dr), * FLD (i_sr), CPU (h_cond));
- temp1 = SUBCFSI (* FLD (i_dr), * FLD (i_sr), CPU (h_cond));
- {
- SI opval = temp0;
- * FLD (i_dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
- {
- BI opval = temp1;
- CPU (h_cond) = opval;
- TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
- }
-}
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_TRAP) : /* trap $uimm4 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_trap.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- {
- USI opval = GET_H_CR (((UINT) 6));
- SET_H_CR (((UINT) 14), opval);
- TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval);
- }
- {
- USI opval = ADDSI (pc, 4);
- SET_H_CR (((UINT) 6), opval);
- TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval);
- }
- {
- UQI opval = CPU (h_bpsw);
- CPU (h_bbpsw) = opval;
- TRACE_RESULT (current_cpu, abuf, "bbpsw", 'x', opval);
- }
- {
- UQI opval = GET_H_PSW ();
- CPU (h_bpsw) = opval;
- TRACE_RESULT (current_cpu, abuf, "bpsw", 'x', opval);
- }
- {
- UQI opval = ANDQI (GET_H_PSW (), 128);
- SET_H_PSW (opval);
- TRACE_RESULT (current_cpu, abuf, "psw", 'x', opval);
- }
- {
- SI opval = m32r_trap (current_cpu, pc, FLD (f_uimm4));
- SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- SEM_BRANCH_FINI (vpc);
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_UNLOCK) : /* unlock $src1,@$src2 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_st_plus.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
-if (CPU (h_lock)) {
- {
- SI opval = * FLD (i_src1);
- SETMEMSI (current_cpu, pc, * FLD (i_src2), opval);
- written |= (1 << 4);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-}
- {
- BI opval = 0;
- CPU (h_lock) = opval;
- TRACE_RESULT (current_cpu, abuf, "lock", 'x', opval);
- }
-}
-
- abuf->written = written;
-#undef FLD
-}
- NEXT (vpc);
-
-
- }
- ENDSWITCH (sem) /* End of semantic switch. */
-
- /* At this point `vpc' contains the next insn to execute. */
-}
-
-#undef DEFINE_SWITCH
-#endif /* DEFINE_SWITCH */
diff --git a/sim/m32r/sem.c b/sim/m32r/sem.c
deleted file mode 100644
index 3fa4f590aee..00000000000
--- a/sim/m32r/sem.c
+++ /dev/null
@@ -1,2704 +0,0 @@
-/* Simulator instruction semantics for m32rbf.
-
-THIS FILE IS MACHINE GENERATED WITH CGEN.
-
-Copyright (C) 1996, 1997, 1998, 1999, 2000 Free Software Foundation, Inc.
-
-This file is part of the GNU Simulators.
-
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License along
-with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
-*/
-
-#define WANT_CPU m32rbf
-#define WANT_CPU_M32RBF
-
-#include "sim-main.h"
-#include "cgen-mem.h"
-#include "cgen-ops.h"
-
-#undef GET_ATTR
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
-#define GET_ATTR(cpu, num, attr) CGEN_ATTR_VALUE (NULL, abuf->idesc->attrs, CGEN_INSN_##attr)
-#else
-#define GET_ATTR(cpu, num, attr) CGEN_ATTR_VALUE (NULL, abuf->idesc->attrs, CGEN_INSN_/**/attr)
-#endif
-
-/* This is used so that we can compile two copies of the semantic code,
- one with full feature support and one without that runs fast(er).
- FAST_P, when desired, is defined on the command line, -DFAST_P=1. */
-#if FAST_P
-#define SEM_FN_NAME(cpu,fn) XCONCAT3 (cpu,_semf_,fn)
-#undef TRACE_RESULT
-#define TRACE_RESULT(cpu, abuf, name, type, val)
-#else
-#define SEM_FN_NAME(cpu,fn) XCONCAT3 (cpu,_sem_,fn)
-#endif
-
-/* x-invalid: --invalid-- */
-
-static SEM_PC
-SEM_FN_NAME (m32rbf,x_invalid) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.fmt_empty.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
-
- {
- /* Update the recorded pc in the cpu state struct.
- Only necessary for WITH_SCACHE case, but to avoid the
- conditional compilation .... */
- SET_H_PC (pc);
- /* Virtual insns have zero size. Overwrite vpc with address of next insn
- using the default-insn-bitsize spec. When executing insns in parallel
- we may want to queue the fault and continue execution. */
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
- vpc = sim_engine_invalid_insn (current_cpu, pc, vpc);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* x-after: --after-- */
-
-static SEM_PC
-SEM_FN_NAME (m32rbf,x_after) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.fmt_empty.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
-
- {
-#if WITH_SCACHE_PBB_M32RBF
- m32rbf_pbb_after (current_cpu, sem_arg);
-#endif
- }
-
- return vpc;
-#undef FLD
-}
-
-/* x-before: --before-- */
-
-static SEM_PC
-SEM_FN_NAME (m32rbf,x_before) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.fmt_empty.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
-
- {
-#if WITH_SCACHE_PBB_M32RBF
- m32rbf_pbb_before (current_cpu, sem_arg);
-#endif
- }
-
- return vpc;
-#undef FLD
-}
-
-/* x-cti-chain: --cti-chain-- */
-
-static SEM_PC
-SEM_FN_NAME (m32rbf,x_cti_chain) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.fmt_empty.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
-
- {
-#if WITH_SCACHE_PBB_M32RBF
-#ifdef DEFINE_SWITCH
- vpc = m32rbf_pbb_cti_chain (current_cpu, sem_arg,
- pbb_br_type, pbb_br_npc);
- BREAK (sem);
-#else
- /* FIXME: Allow provision of explicit ifmt spec in insn spec. */
- vpc = m32rbf_pbb_cti_chain (current_cpu, sem_arg,
- CPU_PBB_BR_TYPE (current_cpu),
- CPU_PBB_BR_NPC (current_cpu));
-#endif
-#endif
- }
-
- return vpc;
-#undef FLD
-}
-
-/* x-chain: --chain-- */
-
-static SEM_PC
-SEM_FN_NAME (m32rbf,x_chain) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.fmt_empty.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
-
- {
-#if WITH_SCACHE_PBB_M32RBF
- vpc = m32rbf_pbb_chain (current_cpu, sem_arg);
-#ifdef DEFINE_SWITCH
- BREAK (sem);
-#endif
-#endif
- }
-
- return vpc;
-#undef FLD
-}
-
-/* x-begin: --begin-- */
-
-static SEM_PC
-SEM_FN_NAME (m32rbf,x_begin) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.fmt_empty.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
-
- {
-#if WITH_SCACHE_PBB_M32RBF
-#if defined DEFINE_SWITCH || defined FAST_P
- /* In the switch case FAST_P is a constant, allowing several optimizations
- in any called inline functions. */
- vpc = m32rbf_pbb_begin (current_cpu, FAST_P);
-#else
-#if 0 /* cgen engine can't handle dynamic fast/full switching yet. */
- vpc = m32rbf_pbb_begin (current_cpu, STATE_RUN_FAST_P (CPU_STATE (current_cpu)));
-#else
- vpc = m32rbf_pbb_begin (current_cpu, 0);
-#endif
-#endif
-#endif
- }
-
- return vpc;
-#undef FLD
-}
-
-/* add: add $dr,$sr */
-
-static SEM_PC
-SEM_FN_NAME (m32rbf,add) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = ADDSI (* FLD (i_dr), * FLD (i_sr));
- * FLD (i_dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* add3: add3 $dr,$sr,$hash$slo16 */
-
-static SEM_PC
-SEM_FN_NAME (m32rbf,add3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add3.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = ADDSI (* FLD (i_sr), FLD (f_simm16));
- * FLD (i_dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* and: and $dr,$sr */
-
-static SEM_PC
-SEM_FN_NAME (m32rbf,and) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = ANDSI (* FLD (i_dr), * FLD (i_sr));
- * FLD (i_dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* and3: and3 $dr,$sr,$uimm16 */
-
-static SEM_PC
-SEM_FN_NAME (m32rbf,and3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_and3.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = ANDSI (* FLD (i_sr), FLD (f_uimm16));
- * FLD (i_dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* or: or $dr,$sr */
-
-static SEM_PC
-SEM_FN_NAME (m32rbf,or) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = ORSI (* FLD (i_dr), * FLD (i_sr));
- * FLD (i_dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* or3: or3 $dr,$sr,$hash$ulo16 */
-
-static SEM_PC
-SEM_FN_NAME (m32rbf,or3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_and3.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = ORSI (* FLD (i_sr), FLD (f_uimm16));
- * FLD (i_dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* xor: xor $dr,$sr */
-
-static SEM_PC
-SEM_FN_NAME (m32rbf,xor) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = XORSI (* FLD (i_dr), * FLD (i_sr));
- * FLD (i_dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* xor3: xor3 $dr,$sr,$uimm16 */
-
-static SEM_PC
-SEM_FN_NAME (m32rbf,xor3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_and3.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = XORSI (* FLD (i_sr), FLD (f_uimm16));
- * FLD (i_dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* addi: addi $dr,$simm8 */
-
-static SEM_PC
-SEM_FN_NAME (m32rbf,addi) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_addi.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = ADDSI (* FLD (i_dr), FLD (f_simm8));
- * FLD (i_dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* addv: addv $dr,$sr */
-
-static SEM_PC
-SEM_FN_NAME (m32rbf,addv) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- SI temp0;BI temp1;
- temp0 = ADDSI (* FLD (i_dr), * FLD (i_sr));
- temp1 = ADDOFSI (* FLD (i_dr), * FLD (i_sr), 0);
- {
- SI opval = temp0;
- * FLD (i_dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
- {
- BI opval = temp1;
- CPU (h_cond) = opval;
- TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
- }
-}
-
- return vpc;
-#undef FLD
-}
-
-/* addv3: addv3 $dr,$sr,$simm16 */
-
-static SEM_PC
-SEM_FN_NAME (m32rbf,addv3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add3.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-{
- SI temp0;BI temp1;
- temp0 = ADDSI (* FLD (i_sr), FLD (f_simm16));
- temp1 = ADDOFSI (* FLD (i_sr), FLD (f_simm16), 0);
- {
- SI opval = temp0;
- * FLD (i_dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
- {
- BI opval = temp1;
- CPU (h_cond) = opval;
- TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
- }
-}
-
- return vpc;
-#undef FLD
-}
-
-/* addx: addx $dr,$sr */
-
-static SEM_PC
-SEM_FN_NAME (m32rbf,addx) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- SI temp0;BI temp1;
- temp0 = ADDCSI (* FLD (i_dr), * FLD (i_sr), CPU (h_cond));
- temp1 = ADDCFSI (* FLD (i_dr), * FLD (i_sr), CPU (h_cond));
- {
- SI opval = temp0;
- * FLD (i_dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
- {
- BI opval = temp1;
- CPU (h_cond) = opval;
- TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
- }
-}
-
- return vpc;
-#undef FLD
-}
-
-/* bc8: bc.s $disp8 */
-
-static SEM_PC
-SEM_FN_NAME (m32rbf,bc8) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_bl8.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-if (CPU (h_cond)) {
- {
- USI opval = FLD (i_disp8);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 2);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
- return vpc;
-#undef FLD
-}
-
-/* bc24: bc.l $disp24 */
-
-static SEM_PC
-SEM_FN_NAME (m32rbf,bc24) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_bl24.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-if (CPU (h_cond)) {
- {
- USI opval = FLD (i_disp24);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 2);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
- return vpc;
-#undef FLD
-}
-
-/* beq: beq $src1,$src2,$disp16 */
-
-static SEM_PC
-SEM_FN_NAME (m32rbf,beq) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_beq.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-if (EQSI (* FLD (i_src1), * FLD (i_src2))) {
- {
- USI opval = FLD (i_disp16);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 3);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
- return vpc;
-#undef FLD
-}
-
-/* beqz: beqz $src2,$disp16 */
-
-static SEM_PC
-SEM_FN_NAME (m32rbf,beqz) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_beq.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-if (EQSI (* FLD (i_src2), 0)) {
- {
- USI opval = FLD (i_disp16);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 2);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
- return vpc;
-#undef FLD
-}
-
-/* bgez: bgez $src2,$disp16 */
-
-static SEM_PC
-SEM_FN_NAME (m32rbf,bgez) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_beq.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-if (GESI (* FLD (i_src2), 0)) {
- {
- USI opval = FLD (i_disp16);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 2);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
- return vpc;
-#undef FLD
-}
-
-/* bgtz: bgtz $src2,$disp16 */
-
-static SEM_PC
-SEM_FN_NAME (m32rbf,bgtz) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_beq.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-if (GTSI (* FLD (i_src2), 0)) {
- {
- USI opval = FLD (i_disp16);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 2);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
- return vpc;
-#undef FLD
-}
-
-/* blez: blez $src2,$disp16 */
-
-static SEM_PC
-SEM_FN_NAME (m32rbf,blez) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_beq.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-if (LESI (* FLD (i_src2), 0)) {
- {
- USI opval = FLD (i_disp16);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 2);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
- return vpc;
-#undef FLD
-}
-
-/* bltz: bltz $src2,$disp16 */
-
-static SEM_PC
-SEM_FN_NAME (m32rbf,bltz) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_beq.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-if (LTSI (* FLD (i_src2), 0)) {
- {
- USI opval = FLD (i_disp16);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 2);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
- return vpc;
-#undef FLD
-}
-
-/* bnez: bnez $src2,$disp16 */
-
-static SEM_PC
-SEM_FN_NAME (m32rbf,bnez) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_beq.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-if (NESI (* FLD (i_src2), 0)) {
- {
- USI opval = FLD (i_disp16);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 2);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
- return vpc;
-#undef FLD
-}
-
-/* bl8: bl.s $disp8 */
-
-static SEM_PC
-SEM_FN_NAME (m32rbf,bl8) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_bl8.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- {
- SI opval = ADDSI (ANDSI (pc, -4), 4);
- CPU (h_gr[((UINT) 14)]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
- {
- USI opval = FLD (i_disp8);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- SEM_BRANCH_FINI (vpc);
- return vpc;
-#undef FLD
-}
-
-/* bl24: bl.l $disp24 */
-
-static SEM_PC
-SEM_FN_NAME (m32rbf,bl24) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_bl24.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-{
- {
- SI opval = ADDSI (pc, 4);
- CPU (h_gr[((UINT) 14)]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
- {
- USI opval = FLD (i_disp24);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- SEM_BRANCH_FINI (vpc);
- return vpc;
-#undef FLD
-}
-
-/* bnc8: bnc.s $disp8 */
-
-static SEM_PC
-SEM_FN_NAME (m32rbf,bnc8) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_bl8.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-if (NOTBI (CPU (h_cond))) {
- {
- USI opval = FLD (i_disp8);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 2);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
- return vpc;
-#undef FLD
-}
-
-/* bnc24: bnc.l $disp24 */
-
-static SEM_PC
-SEM_FN_NAME (m32rbf,bnc24) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_bl24.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-if (NOTBI (CPU (h_cond))) {
- {
- USI opval = FLD (i_disp24);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 2);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
- return vpc;
-#undef FLD
-}
-
-/* bne: bne $src1,$src2,$disp16 */
-
-static SEM_PC
-SEM_FN_NAME (m32rbf,bne) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_beq.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-if (NESI (* FLD (i_src1), * FLD (i_src2))) {
- {
- USI opval = FLD (i_disp16);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 3);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
- return vpc;
-#undef FLD
-}
-
-/* bra8: bra.s $disp8 */
-
-static SEM_PC
-SEM_FN_NAME (m32rbf,bra8) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_bl8.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- USI opval = FLD (i_disp8);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-
- SEM_BRANCH_FINI (vpc);
- return vpc;
-#undef FLD
-}
-
-/* bra24: bra.l $disp24 */
-
-static SEM_PC
-SEM_FN_NAME (m32rbf,bra24) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_bl24.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- USI opval = FLD (i_disp24);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-
- SEM_BRANCH_FINI (vpc);
- return vpc;
-#undef FLD
-}
-
-/* cmp: cmp $src1,$src2 */
-
-static SEM_PC
-SEM_FN_NAME (m32rbf,cmp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_st_plus.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- BI opval = LTSI (* FLD (i_src1), * FLD (i_src2));
- CPU (h_cond) = opval;
- TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* cmpi: cmpi $src2,$simm16 */
-
-static SEM_PC
-SEM_FN_NAME (m32rbf,cmpi) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_st_d.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- BI opval = LTSI (* FLD (i_src2), FLD (f_simm16));
- CPU (h_cond) = opval;
- TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* cmpu: cmpu $src1,$src2 */
-
-static SEM_PC
-SEM_FN_NAME (m32rbf,cmpu) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_st_plus.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- BI opval = LTUSI (* FLD (i_src1), * FLD (i_src2));
- CPU (h_cond) = opval;
- TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* cmpui: cmpui $src2,$simm16 */
-
-static SEM_PC
-SEM_FN_NAME (m32rbf,cmpui) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_st_d.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- BI opval = LTUSI (* FLD (i_src2), FLD (f_simm16));
- CPU (h_cond) = opval;
- TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* div: div $dr,$sr */
-
-static SEM_PC
-SEM_FN_NAME (m32rbf,div) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-if (NESI (* FLD (i_sr), 0)) {
- {
- SI opval = DIVSI (* FLD (i_dr), * FLD (i_sr));
- * FLD (i_dr) = opval;
- written |= (1 << 2);
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-}
-
- abuf->written = written;
- return vpc;
-#undef FLD
-}
-
-/* divu: divu $dr,$sr */
-
-static SEM_PC
-SEM_FN_NAME (m32rbf,divu) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-if (NESI (* FLD (i_sr), 0)) {
- {
- SI opval = UDIVSI (* FLD (i_dr), * FLD (i_sr));
- * FLD (i_dr) = opval;
- written |= (1 << 2);
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-}
-
- abuf->written = written;
- return vpc;
-#undef FLD
-}
-
-/* rem: rem $dr,$sr */
-
-static SEM_PC
-SEM_FN_NAME (m32rbf,rem) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-if (NESI (* FLD (i_sr), 0)) {
- {
- SI opval = MODSI (* FLD (i_dr), * FLD (i_sr));
- * FLD (i_dr) = opval;
- written |= (1 << 2);
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-}
-
- abuf->written = written;
- return vpc;
-#undef FLD
-}
-
-/* remu: remu $dr,$sr */
-
-static SEM_PC
-SEM_FN_NAME (m32rbf,remu) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-if (NESI (* FLD (i_sr), 0)) {
- {
- SI opval = UMODSI (* FLD (i_dr), * FLD (i_sr));
- * FLD (i_dr) = opval;
- written |= (1 << 2);
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-}
-
- abuf->written = written;
- return vpc;
-#undef FLD
-}
-
-/* jl: jl $sr */
-
-static SEM_PC
-SEM_FN_NAME (m32rbf,jl) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_jl.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- SI temp0;USI temp1;
- temp0 = ADDSI (ANDSI (pc, -4), 4);
- temp1 = ANDSI (* FLD (i_sr), -4);
- {
- SI opval = temp0;
- CPU (h_gr[((UINT) 14)]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
- {
- USI opval = temp1;
- SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- SEM_BRANCH_FINI (vpc);
- return vpc;
-#undef FLD
-}
-
-/* jmp: jmp $sr */
-
-static SEM_PC
-SEM_FN_NAME (m32rbf,jmp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_jl.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- USI opval = ANDSI (* FLD (i_sr), -4);
- SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-
- SEM_BRANCH_FINI (vpc);
- return vpc;
-#undef FLD
-}
-
-/* ld: ld $dr,@$sr */
-
-static SEM_PC
-SEM_FN_NAME (m32rbf,ld) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ld_plus.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = GETMEMSI (current_cpu, pc, * FLD (i_sr));
- * FLD (i_dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* ld-d: ld $dr,@($slo16,$sr) */
-
-static SEM_PC
-SEM_FN_NAME (m32rbf,ld_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add3.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = GETMEMSI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16)));
- * FLD (i_dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* ldb: ldb $dr,@$sr */
-
-static SEM_PC
-SEM_FN_NAME (m32rbf,ldb) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ld_plus.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = EXTQISI (GETMEMQI (current_cpu, pc, * FLD (i_sr)));
- * FLD (i_dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* ldb-d: ldb $dr,@($slo16,$sr) */
-
-static SEM_PC
-SEM_FN_NAME (m32rbf,ldb_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add3.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = EXTQISI (GETMEMQI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16))));
- * FLD (i_dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* ldh: ldh $dr,@$sr */
-
-static SEM_PC
-SEM_FN_NAME (m32rbf,ldh) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ld_plus.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = EXTHISI (GETMEMHI (current_cpu, pc, * FLD (i_sr)));
- * FLD (i_dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* ldh-d: ldh $dr,@($slo16,$sr) */
-
-static SEM_PC
-SEM_FN_NAME (m32rbf,ldh_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add3.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = EXTHISI (GETMEMHI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16))));
- * FLD (i_dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* ldub: ldub $dr,@$sr */
-
-static SEM_PC
-SEM_FN_NAME (m32rbf,ldub) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ld_plus.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = ZEXTQISI (GETMEMQI (current_cpu, pc, * FLD (i_sr)));
- * FLD (i_dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* ldub-d: ldub $dr,@($slo16,$sr) */
-
-static SEM_PC
-SEM_FN_NAME (m32rbf,ldub_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add3.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = ZEXTQISI (GETMEMQI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16))));
- * FLD (i_dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* lduh: lduh $dr,@$sr */
-
-static SEM_PC
-SEM_FN_NAME (m32rbf,lduh) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ld_plus.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = ZEXTHISI (GETMEMHI (current_cpu, pc, * FLD (i_sr)));
- * FLD (i_dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* lduh-d: lduh $dr,@($slo16,$sr) */
-
-static SEM_PC
-SEM_FN_NAME (m32rbf,lduh_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add3.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = ZEXTHISI (GETMEMHI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16))));
- * FLD (i_dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* ld-plus: ld $dr,@$sr+ */
-
-static SEM_PC
-SEM_FN_NAME (m32rbf,ld_plus) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ld_plus.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- SI temp0;SI temp1;
- temp0 = GETMEMSI (current_cpu, pc, * FLD (i_sr));
- temp1 = ADDSI (* FLD (i_sr), 4);
- {
- SI opval = temp0;
- * FLD (i_dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
- {
- SI opval = temp1;
- * FLD (i_sr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-}
-
- return vpc;
-#undef FLD
-}
-
-/* ld24: ld24 $dr,$uimm24 */
-
-static SEM_PC
-SEM_FN_NAME (m32rbf,ld24) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ld24.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = FLD (i_uimm24);
- * FLD (i_dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* ldi8: ldi8 $dr,$simm8 */
-
-static SEM_PC
-SEM_FN_NAME (m32rbf,ldi8) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_addi.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = FLD (f_simm8);
- * FLD (i_dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* ldi16: ldi16 $dr,$hash$slo16 */
-
-static SEM_PC
-SEM_FN_NAME (m32rbf,ldi16) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add3.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = FLD (f_simm16);
- * FLD (i_dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* lock: lock $dr,@$sr */
-
-static SEM_PC
-SEM_FN_NAME (m32rbf,lock) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ld_plus.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- {
- BI opval = 1;
- CPU (h_lock) = opval;
- TRACE_RESULT (current_cpu, abuf, "lock", 'x', opval);
- }
- {
- SI opval = GETMEMSI (current_cpu, pc, * FLD (i_sr));
- * FLD (i_dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-}
-
- return vpc;
-#undef FLD
-}
-
-/* machi: machi $src1,$src2 */
-
-static SEM_PC
-SEM_FN_NAME (m32rbf,machi) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_st_plus.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- DI opval = SRADI (SLLDI (ADDDI (GET_H_ACCUM (), MULDI (EXTSIDI (ANDSI (* FLD (i_src1), 0xffff0000)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16))))), 8), 8);
- SET_H_ACCUM (opval);
- TRACE_RESULT (current_cpu, abuf, "accum", 'D', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* maclo: maclo $src1,$src2 */
-
-static SEM_PC
-SEM_FN_NAME (m32rbf,maclo) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_st_plus.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- DI opval = SRADI (SLLDI (ADDDI (GET_H_ACCUM (), MULDI (EXTSIDI (SLLSI (* FLD (i_src1), 16)), EXTHIDI (TRUNCSIHI (* FLD (i_src2))))), 8), 8);
- SET_H_ACCUM (opval);
- TRACE_RESULT (current_cpu, abuf, "accum", 'D', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* macwhi: macwhi $src1,$src2 */
-
-static SEM_PC
-SEM_FN_NAME (m32rbf,macwhi) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_st_plus.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- DI opval = SRADI (SLLDI (ADDDI (GET_H_ACCUM (), MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16))))), 8), 8);
- SET_H_ACCUM (opval);
- TRACE_RESULT (current_cpu, abuf, "accum", 'D', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* macwlo: macwlo $src1,$src2 */
-
-static SEM_PC
-SEM_FN_NAME (m32rbf,macwlo) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_st_plus.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- DI opval = SRADI (SLLDI (ADDDI (GET_H_ACCUM (), MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (* FLD (i_src2))))), 8), 8);
- SET_H_ACCUM (opval);
- TRACE_RESULT (current_cpu, abuf, "accum", 'D', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* mul: mul $dr,$sr */
-
-static SEM_PC
-SEM_FN_NAME (m32rbf,mul) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = MULSI (* FLD (i_dr), * FLD (i_sr));
- * FLD (i_dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* mulhi: mulhi $src1,$src2 */
-
-static SEM_PC
-SEM_FN_NAME (m32rbf,mulhi) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_st_plus.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- DI opval = SRADI (SLLDI (MULDI (EXTSIDI (ANDSI (* FLD (i_src1), 0xffff0000)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16)))), 16), 16);
- SET_H_ACCUM (opval);
- TRACE_RESULT (current_cpu, abuf, "accum", 'D', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* mullo: mullo $src1,$src2 */
-
-static SEM_PC
-SEM_FN_NAME (m32rbf,mullo) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_st_plus.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- DI opval = SRADI (SLLDI (MULDI (EXTSIDI (SLLSI (* FLD (i_src1), 16)), EXTHIDI (TRUNCSIHI (* FLD (i_src2)))), 16), 16);
- SET_H_ACCUM (opval);
- TRACE_RESULT (current_cpu, abuf, "accum", 'D', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* mulwhi: mulwhi $src1,$src2 */
-
-static SEM_PC
-SEM_FN_NAME (m32rbf,mulwhi) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_st_plus.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- DI opval = SRADI (SLLDI (MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16)))), 8), 8);
- SET_H_ACCUM (opval);
- TRACE_RESULT (current_cpu, abuf, "accum", 'D', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* mulwlo: mulwlo $src1,$src2 */
-
-static SEM_PC
-SEM_FN_NAME (m32rbf,mulwlo) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_st_plus.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- DI opval = SRADI (SLLDI (MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (* FLD (i_src2)))), 8), 8);
- SET_H_ACCUM (opval);
- TRACE_RESULT (current_cpu, abuf, "accum", 'D', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* mv: mv $dr,$sr */
-
-static SEM_PC
-SEM_FN_NAME (m32rbf,mv) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ld_plus.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = * FLD (i_sr);
- * FLD (i_dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* mvfachi: mvfachi $dr */
-
-static SEM_PC
-SEM_FN_NAME (m32rbf,mvfachi) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_seth.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = TRUNCDISI (SRADI (GET_H_ACCUM (), 32));
- * FLD (i_dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* mvfaclo: mvfaclo $dr */
-
-static SEM_PC
-SEM_FN_NAME (m32rbf,mvfaclo) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_seth.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = TRUNCDISI (GET_H_ACCUM ());
- * FLD (i_dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* mvfacmi: mvfacmi $dr */
-
-static SEM_PC
-SEM_FN_NAME (m32rbf,mvfacmi) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_seth.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = TRUNCDISI (SRADI (GET_H_ACCUM (), 16));
- * FLD (i_dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* mvfc: mvfc $dr,$scr */
-
-static SEM_PC
-SEM_FN_NAME (m32rbf,mvfc) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ld_plus.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = GET_H_CR (FLD (f_r2));
- * FLD (i_dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* mvtachi: mvtachi $src1 */
-
-static SEM_PC
-SEM_FN_NAME (m32rbf,mvtachi) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_st_plus.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- DI opval = ORDI (ANDDI (GET_H_ACCUM (), MAKEDI (0, 0xffffffff)), SLLDI (EXTSIDI (* FLD (i_src1)), 32));
- SET_H_ACCUM (opval);
- TRACE_RESULT (current_cpu, abuf, "accum", 'D', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* mvtaclo: mvtaclo $src1 */
-
-static SEM_PC
-SEM_FN_NAME (m32rbf,mvtaclo) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_st_plus.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- DI opval = ORDI (ANDDI (GET_H_ACCUM (), MAKEDI (0xffffffff, 0)), ZEXTSIDI (* FLD (i_src1)));
- SET_H_ACCUM (opval);
- TRACE_RESULT (current_cpu, abuf, "accum", 'D', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* mvtc: mvtc $sr,$dcr */
-
-static SEM_PC
-SEM_FN_NAME (m32rbf,mvtc) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ld_plus.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- USI opval = * FLD (i_sr);
- SET_H_CR (FLD (f_r1), opval);
- TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* neg: neg $dr,$sr */
-
-static SEM_PC
-SEM_FN_NAME (m32rbf,neg) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ld_plus.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = NEGSI (* FLD (i_sr));
- * FLD (i_dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* nop: nop */
-
-static SEM_PC
-SEM_FN_NAME (m32rbf,nop) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.fmt_empty.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-PROFILE_COUNT_FILLNOPS (current_cpu, abuf->addr);
-
- return vpc;
-#undef FLD
-}
-
-/* not: not $dr,$sr */
-
-static SEM_PC
-SEM_FN_NAME (m32rbf,not) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_ld_plus.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = INVSI (* FLD (i_sr));
- * FLD (i_dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* rac: rac */
-
-static SEM_PC
-SEM_FN_NAME (m32rbf,rac) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.fmt_empty.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- DI tmp_tmp1;
- tmp_tmp1 = SLLDI (GET_H_ACCUM (), 1);
- tmp_tmp1 = ADDDI (tmp_tmp1, MAKEDI (0, 32768));
- {
- DI opval = (GTDI (tmp_tmp1, MAKEDI (32767, 0xffff0000))) ? (MAKEDI (32767, 0xffff0000)) : (LTDI (tmp_tmp1, MAKEDI (0xffff8000, 0))) ? (MAKEDI (0xffff8000, 0)) : (ANDDI (tmp_tmp1, MAKEDI (0xffffffff, 0xffff0000)));
- SET_H_ACCUM (opval);
- TRACE_RESULT (current_cpu, abuf, "accum", 'D', opval);
- }
-}
-
- return vpc;
-#undef FLD
-}
-
-/* rach: rach */
-
-static SEM_PC
-SEM_FN_NAME (m32rbf,rach) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.fmt_empty.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- DI tmp_tmp1;
- tmp_tmp1 = ANDDI (GET_H_ACCUM (), MAKEDI (16777215, 0xffffffff));
-if (ANDIF (GEDI (tmp_tmp1, MAKEDI (16383, 0x80000000)), LEDI (tmp_tmp1, MAKEDI (8388607, 0xffffffff)))) {
- tmp_tmp1 = MAKEDI (16383, 0x80000000);
-} else {
-if (ANDIF (GEDI (tmp_tmp1, MAKEDI (8388608, 0)), LEDI (tmp_tmp1, MAKEDI (16760832, 0)))) {
- tmp_tmp1 = MAKEDI (16760832, 0);
-} else {
- tmp_tmp1 = ANDDI (ADDDI (GET_H_ACCUM (), MAKEDI (0, 1073741824)), MAKEDI (0xffffffff, 0x80000000));
-}
-}
- tmp_tmp1 = SLLDI (tmp_tmp1, 1);
- {
- DI opval = SRADI (SLLDI (tmp_tmp1, 7), 7);
- SET_H_ACCUM (opval);
- TRACE_RESULT (current_cpu, abuf, "accum", 'D', opval);
- }
-}
-
- return vpc;
-#undef FLD
-}
-
-/* rte: rte */
-
-static SEM_PC
-SEM_FN_NAME (m32rbf,rte) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.fmt_empty.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- {
- USI opval = ANDSI (GET_H_CR (((UINT) 6)), -4);
- SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
- {
- USI opval = GET_H_CR (((UINT) 14));
- SET_H_CR (((UINT) 6), opval);
- TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval);
- }
- {
- UQI opval = CPU (h_bpsw);
- SET_H_PSW (opval);
- TRACE_RESULT (current_cpu, abuf, "psw", 'x', opval);
- }
- {
- UQI opval = CPU (h_bbpsw);
- CPU (h_bpsw) = opval;
- TRACE_RESULT (current_cpu, abuf, "bpsw", 'x', opval);
- }
-}
-
- SEM_BRANCH_FINI (vpc);
- return vpc;
-#undef FLD
-}
-
-/* seth: seth $dr,$hash$hi16 */
-
-static SEM_PC
-SEM_FN_NAME (m32rbf,seth) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_seth.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = SLLSI (FLD (f_hi16), 16);
- * FLD (i_dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* sll: sll $dr,$sr */
-
-static SEM_PC
-SEM_FN_NAME (m32rbf,sll) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = SLLSI (* FLD (i_dr), ANDSI (* FLD (i_sr), 31));
- * FLD (i_dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* sll3: sll3 $dr,$sr,$simm16 */
-
-static SEM_PC
-SEM_FN_NAME (m32rbf,sll3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add3.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = SLLSI (* FLD (i_sr), ANDSI (FLD (f_simm16), 31));
- * FLD (i_dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* slli: slli $dr,$uimm5 */
-
-static SEM_PC
-SEM_FN_NAME (m32rbf,slli) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_slli.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = SLLSI (* FLD (i_dr), FLD (f_uimm5));
- * FLD (i_dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* sra: sra $dr,$sr */
-
-static SEM_PC
-SEM_FN_NAME (m32rbf,sra) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = SRASI (* FLD (i_dr), ANDSI (* FLD (i_sr), 31));
- * FLD (i_dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* sra3: sra3 $dr,$sr,$simm16 */
-
-static SEM_PC
-SEM_FN_NAME (m32rbf,sra3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add3.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = SRASI (* FLD (i_sr), ANDSI (FLD (f_simm16), 31));
- * FLD (i_dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* srai: srai $dr,$uimm5 */
-
-static SEM_PC
-SEM_FN_NAME (m32rbf,srai) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_slli.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = SRASI (* FLD (i_dr), FLD (f_uimm5));
- * FLD (i_dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* srl: srl $dr,$sr */
-
-static SEM_PC
-SEM_FN_NAME (m32rbf,srl) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = SRLSI (* FLD (i_dr), ANDSI (* FLD (i_sr), 31));
- * FLD (i_dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* srl3: srl3 $dr,$sr,$simm16 */
-
-static SEM_PC
-SEM_FN_NAME (m32rbf,srl3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add3.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = SRLSI (* FLD (i_sr), ANDSI (FLD (f_simm16), 31));
- * FLD (i_dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* srli: srli $dr,$uimm5 */
-
-static SEM_PC
-SEM_FN_NAME (m32rbf,srli) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_slli.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = SRLSI (* FLD (i_dr), FLD (f_uimm5));
- * FLD (i_dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* st: st $src1,@$src2 */
-
-static SEM_PC
-SEM_FN_NAME (m32rbf,st) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_st_plus.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = * FLD (i_src1);
- SETMEMSI (current_cpu, pc, * FLD (i_src2), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* st-d: st $src1,@($slo16,$src2) */
-
-static SEM_PC
-SEM_FN_NAME (m32rbf,st_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_st_d.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = * FLD (i_src1);
- SETMEMSI (current_cpu, pc, ADDSI (* FLD (i_src2), FLD (f_simm16)), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* stb: stb $src1,@$src2 */
-
-static SEM_PC
-SEM_FN_NAME (m32rbf,stb) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_st_plus.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- QI opval = * FLD (i_src1);
- SETMEMQI (current_cpu, pc, * FLD (i_src2), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* stb-d: stb $src1,@($slo16,$src2) */
-
-static SEM_PC
-SEM_FN_NAME (m32rbf,stb_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_st_d.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- QI opval = * FLD (i_src1);
- SETMEMQI (current_cpu, pc, ADDSI (* FLD (i_src2), FLD (f_simm16)), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* sth: sth $src1,@$src2 */
-
-static SEM_PC
-SEM_FN_NAME (m32rbf,sth) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_st_plus.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- HI opval = * FLD (i_src1);
- SETMEMHI (current_cpu, pc, * FLD (i_src2), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* sth-d: sth $src1,@($slo16,$src2) */
-
-static SEM_PC
-SEM_FN_NAME (m32rbf,sth_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_st_d.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- HI opval = * FLD (i_src1);
- SETMEMHI (current_cpu, pc, ADDSI (* FLD (i_src2), FLD (f_simm16)), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* st-plus: st $src1,@+$src2 */
-
-static SEM_PC
-SEM_FN_NAME (m32rbf,st_plus) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_st_plus.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- SI tmp_new_src2;
- tmp_new_src2 = ADDSI (* FLD (i_src2), 4);
- {
- SI opval = * FLD (i_src1);
- SETMEMSI (current_cpu, pc, tmp_new_src2, opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
- {
- SI opval = tmp_new_src2;
- * FLD (i_src2) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-}
-
- return vpc;
-#undef FLD
-}
-
-/* st-minus: st $src1,@-$src2 */
-
-static SEM_PC
-SEM_FN_NAME (m32rbf,st_minus) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_st_plus.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- SI tmp_new_src2;
- tmp_new_src2 = SUBSI (* FLD (i_src2), 4);
- {
- SI opval = * FLD (i_src1);
- SETMEMSI (current_cpu, pc, tmp_new_src2, opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
- {
- SI opval = tmp_new_src2;
- * FLD (i_src2) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-}
-
- return vpc;
-#undef FLD
-}
-
-/* sub: sub $dr,$sr */
-
-static SEM_PC
-SEM_FN_NAME (m32rbf,sub) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = SUBSI (* FLD (i_dr), * FLD (i_sr));
- * FLD (i_dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
- return vpc;
-#undef FLD
-}
-
-/* subv: subv $dr,$sr */
-
-static SEM_PC
-SEM_FN_NAME (m32rbf,subv) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- SI temp0;BI temp1;
- temp0 = SUBSI (* FLD (i_dr), * FLD (i_sr));
- temp1 = SUBOFSI (* FLD (i_dr), * FLD (i_sr), 0);
- {
- SI opval = temp0;
- * FLD (i_dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
- {
- BI opval = temp1;
- CPU (h_cond) = opval;
- TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
- }
-}
-
- return vpc;
-#undef FLD
-}
-
-/* subx: subx $dr,$sr */
-
-static SEM_PC
-SEM_FN_NAME (m32rbf,subx) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_add.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- SI temp0;BI temp1;
- temp0 = SUBCSI (* FLD (i_dr), * FLD (i_sr), CPU (h_cond));
- temp1 = SUBCFSI (* FLD (i_dr), * FLD (i_sr), CPU (h_cond));
- {
- SI opval = temp0;
- * FLD (i_dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
- {
- BI opval = temp1;
- CPU (h_cond) = opval;
- TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
- }
-}
-
- return vpc;
-#undef FLD
-}
-
-/* trap: trap $uimm4 */
-
-static SEM_PC
-SEM_FN_NAME (m32rbf,trap) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_trap.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- {
- USI opval = GET_H_CR (((UINT) 6));
- SET_H_CR (((UINT) 14), opval);
- TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval);
- }
- {
- USI opval = ADDSI (pc, 4);
- SET_H_CR (((UINT) 6), opval);
- TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval);
- }
- {
- UQI opval = CPU (h_bpsw);
- CPU (h_bbpsw) = opval;
- TRACE_RESULT (current_cpu, abuf, "bbpsw", 'x', opval);
- }
- {
- UQI opval = GET_H_PSW ();
- CPU (h_bpsw) = opval;
- TRACE_RESULT (current_cpu, abuf, "bpsw", 'x', opval);
- }
- {
- UQI opval = ANDQI (GET_H_PSW (), 128);
- SET_H_PSW (opval);
- TRACE_RESULT (current_cpu, abuf, "psw", 'x', opval);
- }
- {
- SI opval = m32r_trap (current_cpu, pc, FLD (f_uimm4));
- SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- SEM_BRANCH_FINI (vpc);
- return vpc;
-#undef FLD
-}
-
-/* unlock: unlock $src1,@$src2 */
-
-static SEM_PC
-SEM_FN_NAME (m32rbf,unlock) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
-{
-#define FLD(f) abuf->fields.sfmt_st_plus.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
-if (CPU (h_lock)) {
- {
- SI opval = * FLD (i_src1);
- SETMEMSI (current_cpu, pc, * FLD (i_src2), opval);
- written |= (1 << 4);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-}
- {
- BI opval = 0;
- CPU (h_lock) = opval;
- TRACE_RESULT (current_cpu, abuf, "lock", 'x', opval);
- }
-}
-
- abuf->written = written;
- return vpc;
-#undef FLD
-}
-
-/* Table of all semantic fns. */
-
-static const struct sem_fn_desc sem_fns[] = {
- { M32RBF_INSN_X_INVALID, SEM_FN_NAME (m32rbf,x_invalid) },
- { M32RBF_INSN_X_AFTER, SEM_FN_NAME (m32rbf,x_after) },
- { M32RBF_INSN_X_BEFORE, SEM_FN_NAME (m32rbf,x_before) },
- { M32RBF_INSN_X_CTI_CHAIN, SEM_FN_NAME (m32rbf,x_cti_chain) },
- { M32RBF_INSN_X_CHAIN, SEM_FN_NAME (m32rbf,x_chain) },
- { M32RBF_INSN_X_BEGIN, SEM_FN_NAME (m32rbf,x_begin) },
- { M32RBF_INSN_ADD, SEM_FN_NAME (m32rbf,add) },
- { M32RBF_INSN_ADD3, SEM_FN_NAME (m32rbf,add3) },
- { M32RBF_INSN_AND, SEM_FN_NAME (m32rbf,and) },
- { M32RBF_INSN_AND3, SEM_FN_NAME (m32rbf,and3) },
- { M32RBF_INSN_OR, SEM_FN_NAME (m32rbf,or) },
- { M32RBF_INSN_OR3, SEM_FN_NAME (m32rbf,or3) },
- { M32RBF_INSN_XOR, SEM_FN_NAME (m32rbf,xor) },
- { M32RBF_INSN_XOR3, SEM_FN_NAME (m32rbf,xor3) },
- { M32RBF_INSN_ADDI, SEM_FN_NAME (m32rbf,addi) },
- { M32RBF_INSN_ADDV, SEM_FN_NAME (m32rbf,addv) },
- { M32RBF_INSN_ADDV3, SEM_FN_NAME (m32rbf,addv3) },
- { M32RBF_INSN_ADDX, SEM_FN_NAME (m32rbf,addx) },
- { M32RBF_INSN_BC8, SEM_FN_NAME (m32rbf,bc8) },
- { M32RBF_INSN_BC24, SEM_FN_NAME (m32rbf,bc24) },
- { M32RBF_INSN_BEQ, SEM_FN_NAME (m32rbf,beq) },
- { M32RBF_INSN_BEQZ, SEM_FN_NAME (m32rbf,beqz) },
- { M32RBF_INSN_BGEZ, SEM_FN_NAME (m32rbf,bgez) },
- { M32RBF_INSN_BGTZ, SEM_FN_NAME (m32rbf,bgtz) },
- { M32RBF_INSN_BLEZ, SEM_FN_NAME (m32rbf,blez) },
- { M32RBF_INSN_BLTZ, SEM_FN_NAME (m32rbf,bltz) },
- { M32RBF_INSN_BNEZ, SEM_FN_NAME (m32rbf,bnez) },
- { M32RBF_INSN_BL8, SEM_FN_NAME (m32rbf,bl8) },
- { M32RBF_INSN_BL24, SEM_FN_NAME (m32rbf,bl24) },
- { M32RBF_INSN_BNC8, SEM_FN_NAME (m32rbf,bnc8) },
- { M32RBF_INSN_BNC24, SEM_FN_NAME (m32rbf,bnc24) },
- { M32RBF_INSN_BNE, SEM_FN_NAME (m32rbf,bne) },
- { M32RBF_INSN_BRA8, SEM_FN_NAME (m32rbf,bra8) },
- { M32RBF_INSN_BRA24, SEM_FN_NAME (m32rbf,bra24) },
- { M32RBF_INSN_CMP, SEM_FN_NAME (m32rbf,cmp) },
- { M32RBF_INSN_CMPI, SEM_FN_NAME (m32rbf,cmpi) },
- { M32RBF_INSN_CMPU, SEM_FN_NAME (m32rbf,cmpu) },
- { M32RBF_INSN_CMPUI, SEM_FN_NAME (m32rbf,cmpui) },
- { M32RBF_INSN_DIV, SEM_FN_NAME (m32rbf,div) },
- { M32RBF_INSN_DIVU, SEM_FN_NAME (m32rbf,divu) },
- { M32RBF_INSN_REM, SEM_FN_NAME (m32rbf,rem) },
- { M32RBF_INSN_REMU, SEM_FN_NAME (m32rbf,remu) },
- { M32RBF_INSN_JL, SEM_FN_NAME (m32rbf,jl) },
- { M32RBF_INSN_JMP, SEM_FN_NAME (m32rbf,jmp) },
- { M32RBF_INSN_LD, SEM_FN_NAME (m32rbf,ld) },
- { M32RBF_INSN_LD_D, SEM_FN_NAME (m32rbf,ld_d) },
- { M32RBF_INSN_LDB, SEM_FN_NAME (m32rbf,ldb) },
- { M32RBF_INSN_LDB_D, SEM_FN_NAME (m32rbf,ldb_d) },
- { M32RBF_INSN_LDH, SEM_FN_NAME (m32rbf,ldh) },
- { M32RBF_INSN_LDH_D, SEM_FN_NAME (m32rbf,ldh_d) },
- { M32RBF_INSN_LDUB, SEM_FN_NAME (m32rbf,ldub) },
- { M32RBF_INSN_LDUB_D, SEM_FN_NAME (m32rbf,ldub_d) },
- { M32RBF_INSN_LDUH, SEM_FN_NAME (m32rbf,lduh) },
- { M32RBF_INSN_LDUH_D, SEM_FN_NAME (m32rbf,lduh_d) },
- { M32RBF_INSN_LD_PLUS, SEM_FN_NAME (m32rbf,ld_plus) },
- { M32RBF_INSN_LD24, SEM_FN_NAME (m32rbf,ld24) },
- { M32RBF_INSN_LDI8, SEM_FN_NAME (m32rbf,ldi8) },
- { M32RBF_INSN_LDI16, SEM_FN_NAME (m32rbf,ldi16) },
- { M32RBF_INSN_LOCK, SEM_FN_NAME (m32rbf,lock) },
- { M32RBF_INSN_MACHI, SEM_FN_NAME (m32rbf,machi) },
- { M32RBF_INSN_MACLO, SEM_FN_NAME (m32rbf,maclo) },
- { M32RBF_INSN_MACWHI, SEM_FN_NAME (m32rbf,macwhi) },
- { M32RBF_INSN_MACWLO, SEM_FN_NAME (m32rbf,macwlo) },
- { M32RBF_INSN_MUL, SEM_FN_NAME (m32rbf,mul) },
- { M32RBF_INSN_MULHI, SEM_FN_NAME (m32rbf,mulhi) },
- { M32RBF_INSN_MULLO, SEM_FN_NAME (m32rbf,mullo) },
- { M32RBF_INSN_MULWHI, SEM_FN_NAME (m32rbf,mulwhi) },
- { M32RBF_INSN_MULWLO, SEM_FN_NAME (m32rbf,mulwlo) },
- { M32RBF_INSN_MV, SEM_FN_NAME (m32rbf,mv) },
- { M32RBF_INSN_MVFACHI, SEM_FN_NAME (m32rbf,mvfachi) },
- { M32RBF_INSN_MVFACLO, SEM_FN_NAME (m32rbf,mvfaclo) },
- { M32RBF_INSN_MVFACMI, SEM_FN_NAME (m32rbf,mvfacmi) },
- { M32RBF_INSN_MVFC, SEM_FN_NAME (m32rbf,mvfc) },
- { M32RBF_INSN_MVTACHI, SEM_FN_NAME (m32rbf,mvtachi) },
- { M32RBF_INSN_MVTACLO, SEM_FN_NAME (m32rbf,mvtaclo) },
- { M32RBF_INSN_MVTC, SEM_FN_NAME (m32rbf,mvtc) },
- { M32RBF_INSN_NEG, SEM_FN_NAME (m32rbf,neg) },
- { M32RBF_INSN_NOP, SEM_FN_NAME (m32rbf,nop) },
- { M32RBF_INSN_NOT, SEM_FN_NAME (m32rbf,not) },
- { M32RBF_INSN_RAC, SEM_FN_NAME (m32rbf,rac) },
- { M32RBF_INSN_RACH, SEM_FN_NAME (m32rbf,rach) },
- { M32RBF_INSN_RTE, SEM_FN_NAME (m32rbf,rte) },
- { M32RBF_INSN_SETH, SEM_FN_NAME (m32rbf,seth) },
- { M32RBF_INSN_SLL, SEM_FN_NAME (m32rbf,sll) },
- { M32RBF_INSN_SLL3, SEM_FN_NAME (m32rbf,sll3) },
- { M32RBF_INSN_SLLI, SEM_FN_NAME (m32rbf,slli) },
- { M32RBF_INSN_SRA, SEM_FN_NAME (m32rbf,sra) },
- { M32RBF_INSN_SRA3, SEM_FN_NAME (m32rbf,sra3) },
- { M32RBF_INSN_SRAI, SEM_FN_NAME (m32rbf,srai) },
- { M32RBF_INSN_SRL, SEM_FN_NAME (m32rbf,srl) },
- { M32RBF_INSN_SRL3, SEM_FN_NAME (m32rbf,srl3) },
- { M32RBF_INSN_SRLI, SEM_FN_NAME (m32rbf,srli) },
- { M32RBF_INSN_ST, SEM_FN_NAME (m32rbf,st) },
- { M32RBF_INSN_ST_D, SEM_FN_NAME (m32rbf,st_d) },
- { M32RBF_INSN_STB, SEM_FN_NAME (m32rbf,stb) },
- { M32RBF_INSN_STB_D, SEM_FN_NAME (m32rbf,stb_d) },
- { M32RBF_INSN_STH, SEM_FN_NAME (m32rbf,sth) },
- { M32RBF_INSN_STH_D, SEM_FN_NAME (m32rbf,sth_d) },
- { M32RBF_INSN_ST_PLUS, SEM_FN_NAME (m32rbf,st_plus) },
- { M32RBF_INSN_ST_MINUS, SEM_FN_NAME (m32rbf,st_minus) },
- { M32RBF_INSN_SUB, SEM_FN_NAME (m32rbf,sub) },
- { M32RBF_INSN_SUBV, SEM_FN_NAME (m32rbf,subv) },
- { M32RBF_INSN_SUBX, SEM_FN_NAME (m32rbf,subx) },
- { M32RBF_INSN_TRAP, SEM_FN_NAME (m32rbf,trap) },
- { M32RBF_INSN_UNLOCK, SEM_FN_NAME (m32rbf,unlock) },
- { 0, 0 }
-};
-
-/* Add the semantic fns to IDESC_TABLE. */
-
-void
-SEM_FN_NAME (m32rbf,init_idesc_table) (SIM_CPU *current_cpu)
-{
- IDESC *idesc_table = CPU_IDESC (current_cpu);
- const struct sem_fn_desc *sf;
- int mach_num = MACH_NUM (CPU_MACH (current_cpu));
-
- for (sf = &sem_fns[0]; sf->fn != 0; ++sf)
- {
- const CGEN_INSN *insn = idesc_table[sf->index].idata;
- int valid_p = (CGEN_INSN_VIRTUAL_P (insn)
- || CGEN_INSN_MACH_HAS_P (insn, mach_num));
-#if FAST_P
- if (valid_p)
- idesc_table[sf->index].sem_fast = sf->fn;
- else
- idesc_table[sf->index].sem_fast = SEM_FN_NAME (m32rbf,x_invalid);
-#else
- if (valid_p)
- idesc_table[sf->index].sem_full = sf->fn;
- else
- idesc_table[sf->index].sem_full = SEM_FN_NAME (m32rbf,x_invalid);
-#endif
- }
-}
-
diff --git a/sim/m32r/semx-switch.c b/sim/m32r/semx-switch.c
deleted file mode 100644
index dff0aed1686..00000000000
--- a/sim/m32r/semx-switch.c
+++ /dev/null
@@ -1,6274 +0,0 @@
-/* Simulator instruction semantics for m32rxf.
-
-THIS FILE IS MACHINE GENERATED WITH CGEN.
-
-Copyright (C) 1996, 1997, 1998, 1999, 2000 Free Software Foundation, Inc.
-
-This file is part of the GNU Simulators.
-
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License along
-with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
-*/
-
-#ifdef DEFINE_LABELS
-
- /* The labels have the case they have because the enum of insn types
- is all uppercase and in the non-stdc case the insn symbol is built
- into the enum name. */
-
- static struct {
- int index;
- void *label;
- } labels[] = {
- { M32RXF_INSN_X_INVALID, && case_sem_INSN_X_INVALID },
- { M32RXF_INSN_X_AFTER, && case_sem_INSN_X_AFTER },
- { M32RXF_INSN_X_BEFORE, && case_sem_INSN_X_BEFORE },
- { M32RXF_INSN_X_CTI_CHAIN, && case_sem_INSN_X_CTI_CHAIN },
- { M32RXF_INSN_X_CHAIN, && case_sem_INSN_X_CHAIN },
- { M32RXF_INSN_X_BEGIN, && case_sem_INSN_X_BEGIN },
- { M32RXF_INSN_ADD, && case_sem_INSN_ADD },
- { M32RXF_INSN_ADD3, && case_sem_INSN_ADD3 },
- { M32RXF_INSN_AND, && case_sem_INSN_AND },
- { M32RXF_INSN_AND3, && case_sem_INSN_AND3 },
- { M32RXF_INSN_OR, && case_sem_INSN_OR },
- { M32RXF_INSN_OR3, && case_sem_INSN_OR3 },
- { M32RXF_INSN_XOR, && case_sem_INSN_XOR },
- { M32RXF_INSN_XOR3, && case_sem_INSN_XOR3 },
- { M32RXF_INSN_ADDI, && case_sem_INSN_ADDI },
- { M32RXF_INSN_ADDV, && case_sem_INSN_ADDV },
- { M32RXF_INSN_ADDV3, && case_sem_INSN_ADDV3 },
- { M32RXF_INSN_ADDX, && case_sem_INSN_ADDX },
- { M32RXF_INSN_BC8, && case_sem_INSN_BC8 },
- { M32RXF_INSN_BC24, && case_sem_INSN_BC24 },
- { M32RXF_INSN_BEQ, && case_sem_INSN_BEQ },
- { M32RXF_INSN_BEQZ, && case_sem_INSN_BEQZ },
- { M32RXF_INSN_BGEZ, && case_sem_INSN_BGEZ },
- { M32RXF_INSN_BGTZ, && case_sem_INSN_BGTZ },
- { M32RXF_INSN_BLEZ, && case_sem_INSN_BLEZ },
- { M32RXF_INSN_BLTZ, && case_sem_INSN_BLTZ },
- { M32RXF_INSN_BNEZ, && case_sem_INSN_BNEZ },
- { M32RXF_INSN_BL8, && case_sem_INSN_BL8 },
- { M32RXF_INSN_BL24, && case_sem_INSN_BL24 },
- { M32RXF_INSN_BCL8, && case_sem_INSN_BCL8 },
- { M32RXF_INSN_BCL24, && case_sem_INSN_BCL24 },
- { M32RXF_INSN_BNC8, && case_sem_INSN_BNC8 },
- { M32RXF_INSN_BNC24, && case_sem_INSN_BNC24 },
- { M32RXF_INSN_BNE, && case_sem_INSN_BNE },
- { M32RXF_INSN_BRA8, && case_sem_INSN_BRA8 },
- { M32RXF_INSN_BRA24, && case_sem_INSN_BRA24 },
- { M32RXF_INSN_BNCL8, && case_sem_INSN_BNCL8 },
- { M32RXF_INSN_BNCL24, && case_sem_INSN_BNCL24 },
- { M32RXF_INSN_CMP, && case_sem_INSN_CMP },
- { M32RXF_INSN_CMPI, && case_sem_INSN_CMPI },
- { M32RXF_INSN_CMPU, && case_sem_INSN_CMPU },
- { M32RXF_INSN_CMPUI, && case_sem_INSN_CMPUI },
- { M32RXF_INSN_CMPEQ, && case_sem_INSN_CMPEQ },
- { M32RXF_INSN_CMPZ, && case_sem_INSN_CMPZ },
- { M32RXF_INSN_DIV, && case_sem_INSN_DIV },
- { M32RXF_INSN_DIVU, && case_sem_INSN_DIVU },
- { M32RXF_INSN_REM, && case_sem_INSN_REM },
- { M32RXF_INSN_REMU, && case_sem_INSN_REMU },
- { M32RXF_INSN_DIVH, && case_sem_INSN_DIVH },
- { M32RXF_INSN_JC, && case_sem_INSN_JC },
- { M32RXF_INSN_JNC, && case_sem_INSN_JNC },
- { M32RXF_INSN_JL, && case_sem_INSN_JL },
- { M32RXF_INSN_JMP, && case_sem_INSN_JMP },
- { M32RXF_INSN_LD, && case_sem_INSN_LD },
- { M32RXF_INSN_LD_D, && case_sem_INSN_LD_D },
- { M32RXF_INSN_LDB, && case_sem_INSN_LDB },
- { M32RXF_INSN_LDB_D, && case_sem_INSN_LDB_D },
- { M32RXF_INSN_LDH, && case_sem_INSN_LDH },
- { M32RXF_INSN_LDH_D, && case_sem_INSN_LDH_D },
- { M32RXF_INSN_LDUB, && case_sem_INSN_LDUB },
- { M32RXF_INSN_LDUB_D, && case_sem_INSN_LDUB_D },
- { M32RXF_INSN_LDUH, && case_sem_INSN_LDUH },
- { M32RXF_INSN_LDUH_D, && case_sem_INSN_LDUH_D },
- { M32RXF_INSN_LD_PLUS, && case_sem_INSN_LD_PLUS },
- { M32RXF_INSN_LD24, && case_sem_INSN_LD24 },
- { M32RXF_INSN_LDI8, && case_sem_INSN_LDI8 },
- { M32RXF_INSN_LDI16, && case_sem_INSN_LDI16 },
- { M32RXF_INSN_LOCK, && case_sem_INSN_LOCK },
- { M32RXF_INSN_MACHI_A, && case_sem_INSN_MACHI_A },
- { M32RXF_INSN_MACLO_A, && case_sem_INSN_MACLO_A },
- { M32RXF_INSN_MACWHI_A, && case_sem_INSN_MACWHI_A },
- { M32RXF_INSN_MACWLO_A, && case_sem_INSN_MACWLO_A },
- { M32RXF_INSN_MUL, && case_sem_INSN_MUL },
- { M32RXF_INSN_MULHI_A, && case_sem_INSN_MULHI_A },
- { M32RXF_INSN_MULLO_A, && case_sem_INSN_MULLO_A },
- { M32RXF_INSN_MULWHI_A, && case_sem_INSN_MULWHI_A },
- { M32RXF_INSN_MULWLO_A, && case_sem_INSN_MULWLO_A },
- { M32RXF_INSN_MV, && case_sem_INSN_MV },
- { M32RXF_INSN_MVFACHI_A, && case_sem_INSN_MVFACHI_A },
- { M32RXF_INSN_MVFACLO_A, && case_sem_INSN_MVFACLO_A },
- { M32RXF_INSN_MVFACMI_A, && case_sem_INSN_MVFACMI_A },
- { M32RXF_INSN_MVFC, && case_sem_INSN_MVFC },
- { M32RXF_INSN_MVTACHI_A, && case_sem_INSN_MVTACHI_A },
- { M32RXF_INSN_MVTACLO_A, && case_sem_INSN_MVTACLO_A },
- { M32RXF_INSN_MVTC, && case_sem_INSN_MVTC },
- { M32RXF_INSN_NEG, && case_sem_INSN_NEG },
- { M32RXF_INSN_NOP, && case_sem_INSN_NOP },
- { M32RXF_INSN_NOT, && case_sem_INSN_NOT },
- { M32RXF_INSN_RAC_DSI, && case_sem_INSN_RAC_DSI },
- { M32RXF_INSN_RACH_DSI, && case_sem_INSN_RACH_DSI },
- { M32RXF_INSN_RTE, && case_sem_INSN_RTE },
- { M32RXF_INSN_SETH, && case_sem_INSN_SETH },
- { M32RXF_INSN_SLL, && case_sem_INSN_SLL },
- { M32RXF_INSN_SLL3, && case_sem_INSN_SLL3 },
- { M32RXF_INSN_SLLI, && case_sem_INSN_SLLI },
- { M32RXF_INSN_SRA, && case_sem_INSN_SRA },
- { M32RXF_INSN_SRA3, && case_sem_INSN_SRA3 },
- { M32RXF_INSN_SRAI, && case_sem_INSN_SRAI },
- { M32RXF_INSN_SRL, && case_sem_INSN_SRL },
- { M32RXF_INSN_SRL3, && case_sem_INSN_SRL3 },
- { M32RXF_INSN_SRLI, && case_sem_INSN_SRLI },
- { M32RXF_INSN_ST, && case_sem_INSN_ST },
- { M32RXF_INSN_ST_D, && case_sem_INSN_ST_D },
- { M32RXF_INSN_STB, && case_sem_INSN_STB },
- { M32RXF_INSN_STB_D, && case_sem_INSN_STB_D },
- { M32RXF_INSN_STH, && case_sem_INSN_STH },
- { M32RXF_INSN_STH_D, && case_sem_INSN_STH_D },
- { M32RXF_INSN_ST_PLUS, && case_sem_INSN_ST_PLUS },
- { M32RXF_INSN_ST_MINUS, && case_sem_INSN_ST_MINUS },
- { M32RXF_INSN_SUB, && case_sem_INSN_SUB },
- { M32RXF_INSN_SUBV, && case_sem_INSN_SUBV },
- { M32RXF_INSN_SUBX, && case_sem_INSN_SUBX },
- { M32RXF_INSN_TRAP, && case_sem_INSN_TRAP },
- { M32RXF_INSN_UNLOCK, && case_sem_INSN_UNLOCK },
- { M32RXF_INSN_SATB, && case_sem_INSN_SATB },
- { M32RXF_INSN_SATH, && case_sem_INSN_SATH },
- { M32RXF_INSN_SAT, && case_sem_INSN_SAT },
- { M32RXF_INSN_PCMPBZ, && case_sem_INSN_PCMPBZ },
- { M32RXF_INSN_SADD, && case_sem_INSN_SADD },
- { M32RXF_INSN_MACWU1, && case_sem_INSN_MACWU1 },
- { M32RXF_INSN_MSBLO, && case_sem_INSN_MSBLO },
- { M32RXF_INSN_MULWU1, && case_sem_INSN_MULWU1 },
- { M32RXF_INSN_MACLH1, && case_sem_INSN_MACLH1 },
- { M32RXF_INSN_SC, && case_sem_INSN_SC },
- { M32RXF_INSN_SNC, && case_sem_INSN_SNC },
- { M32RXF_INSN_PAR_ADD, && case_sem_INSN_PAR_ADD },
- { M32RXF_INSN_WRITE_ADD, && case_sem_INSN_WRITE_ADD },
- { M32RXF_INSN_PAR_AND, && case_sem_INSN_PAR_AND },
- { M32RXF_INSN_WRITE_AND, && case_sem_INSN_WRITE_AND },
- { M32RXF_INSN_PAR_OR, && case_sem_INSN_PAR_OR },
- { M32RXF_INSN_WRITE_OR, && case_sem_INSN_WRITE_OR },
- { M32RXF_INSN_PAR_XOR, && case_sem_INSN_PAR_XOR },
- { M32RXF_INSN_WRITE_XOR, && case_sem_INSN_WRITE_XOR },
- { M32RXF_INSN_PAR_ADDI, && case_sem_INSN_PAR_ADDI },
- { M32RXF_INSN_WRITE_ADDI, && case_sem_INSN_WRITE_ADDI },
- { M32RXF_INSN_PAR_ADDV, && case_sem_INSN_PAR_ADDV },
- { M32RXF_INSN_WRITE_ADDV, && case_sem_INSN_WRITE_ADDV },
- { M32RXF_INSN_PAR_ADDX, && case_sem_INSN_PAR_ADDX },
- { M32RXF_INSN_WRITE_ADDX, && case_sem_INSN_WRITE_ADDX },
- { M32RXF_INSN_PAR_BC8, && case_sem_INSN_PAR_BC8 },
- { M32RXF_INSN_WRITE_BC8, && case_sem_INSN_WRITE_BC8 },
- { M32RXF_INSN_PAR_BL8, && case_sem_INSN_PAR_BL8 },
- { M32RXF_INSN_WRITE_BL8, && case_sem_INSN_WRITE_BL8 },
- { M32RXF_INSN_PAR_BCL8, && case_sem_INSN_PAR_BCL8 },
- { M32RXF_INSN_WRITE_BCL8, && case_sem_INSN_WRITE_BCL8 },
- { M32RXF_INSN_PAR_BNC8, && case_sem_INSN_PAR_BNC8 },
- { M32RXF_INSN_WRITE_BNC8, && case_sem_INSN_WRITE_BNC8 },
- { M32RXF_INSN_PAR_BRA8, && case_sem_INSN_PAR_BRA8 },
- { M32RXF_INSN_WRITE_BRA8, && case_sem_INSN_WRITE_BRA8 },
- { M32RXF_INSN_PAR_BNCL8, && case_sem_INSN_PAR_BNCL8 },
- { M32RXF_INSN_WRITE_BNCL8, && case_sem_INSN_WRITE_BNCL8 },
- { M32RXF_INSN_PAR_CMP, && case_sem_INSN_PAR_CMP },
- { M32RXF_INSN_WRITE_CMP, && case_sem_INSN_WRITE_CMP },
- { M32RXF_INSN_PAR_CMPU, && case_sem_INSN_PAR_CMPU },
- { M32RXF_INSN_WRITE_CMPU, && case_sem_INSN_WRITE_CMPU },
- { M32RXF_INSN_PAR_CMPEQ, && case_sem_INSN_PAR_CMPEQ },
- { M32RXF_INSN_WRITE_CMPEQ, && case_sem_INSN_WRITE_CMPEQ },
- { M32RXF_INSN_PAR_CMPZ, && case_sem_INSN_PAR_CMPZ },
- { M32RXF_INSN_WRITE_CMPZ, && case_sem_INSN_WRITE_CMPZ },
- { M32RXF_INSN_PAR_JC, && case_sem_INSN_PAR_JC },
- { M32RXF_INSN_WRITE_JC, && case_sem_INSN_WRITE_JC },
- { M32RXF_INSN_PAR_JNC, && case_sem_INSN_PAR_JNC },
- { M32RXF_INSN_WRITE_JNC, && case_sem_INSN_WRITE_JNC },
- { M32RXF_INSN_PAR_JL, && case_sem_INSN_PAR_JL },
- { M32RXF_INSN_WRITE_JL, && case_sem_INSN_WRITE_JL },
- { M32RXF_INSN_PAR_JMP, && case_sem_INSN_PAR_JMP },
- { M32RXF_INSN_WRITE_JMP, && case_sem_INSN_WRITE_JMP },
- { M32RXF_INSN_PAR_LD, && case_sem_INSN_PAR_LD },
- { M32RXF_INSN_WRITE_LD, && case_sem_INSN_WRITE_LD },
- { M32RXF_INSN_PAR_LDB, && case_sem_INSN_PAR_LDB },
- { M32RXF_INSN_WRITE_LDB, && case_sem_INSN_WRITE_LDB },
- { M32RXF_INSN_PAR_LDH, && case_sem_INSN_PAR_LDH },
- { M32RXF_INSN_WRITE_LDH, && case_sem_INSN_WRITE_LDH },
- { M32RXF_INSN_PAR_LDUB, && case_sem_INSN_PAR_LDUB },
- { M32RXF_INSN_WRITE_LDUB, && case_sem_INSN_WRITE_LDUB },
- { M32RXF_INSN_PAR_LDUH, && case_sem_INSN_PAR_LDUH },
- { M32RXF_INSN_WRITE_LDUH, && case_sem_INSN_WRITE_LDUH },
- { M32RXF_INSN_PAR_LD_PLUS, && case_sem_INSN_PAR_LD_PLUS },
- { M32RXF_INSN_WRITE_LD_PLUS, && case_sem_INSN_WRITE_LD_PLUS },
- { M32RXF_INSN_PAR_LDI8, && case_sem_INSN_PAR_LDI8 },
- { M32RXF_INSN_WRITE_LDI8, && case_sem_INSN_WRITE_LDI8 },
- { M32RXF_INSN_PAR_LOCK, && case_sem_INSN_PAR_LOCK },
- { M32RXF_INSN_WRITE_LOCK, && case_sem_INSN_WRITE_LOCK },
- { M32RXF_INSN_PAR_MACHI_A, && case_sem_INSN_PAR_MACHI_A },
- { M32RXF_INSN_WRITE_MACHI_A, && case_sem_INSN_WRITE_MACHI_A },
- { M32RXF_INSN_PAR_MACLO_A, && case_sem_INSN_PAR_MACLO_A },
- { M32RXF_INSN_WRITE_MACLO_A, && case_sem_INSN_WRITE_MACLO_A },
- { M32RXF_INSN_PAR_MACWHI_A, && case_sem_INSN_PAR_MACWHI_A },
- { M32RXF_INSN_WRITE_MACWHI_A, && case_sem_INSN_WRITE_MACWHI_A },
- { M32RXF_INSN_PAR_MACWLO_A, && case_sem_INSN_PAR_MACWLO_A },
- { M32RXF_INSN_WRITE_MACWLO_A, && case_sem_INSN_WRITE_MACWLO_A },
- { M32RXF_INSN_PAR_MUL, && case_sem_INSN_PAR_MUL },
- { M32RXF_INSN_WRITE_MUL, && case_sem_INSN_WRITE_MUL },
- { M32RXF_INSN_PAR_MULHI_A, && case_sem_INSN_PAR_MULHI_A },
- { M32RXF_INSN_WRITE_MULHI_A, && case_sem_INSN_WRITE_MULHI_A },
- { M32RXF_INSN_PAR_MULLO_A, && case_sem_INSN_PAR_MULLO_A },
- { M32RXF_INSN_WRITE_MULLO_A, && case_sem_INSN_WRITE_MULLO_A },
- { M32RXF_INSN_PAR_MULWHI_A, && case_sem_INSN_PAR_MULWHI_A },
- { M32RXF_INSN_WRITE_MULWHI_A, && case_sem_INSN_WRITE_MULWHI_A },
- { M32RXF_INSN_PAR_MULWLO_A, && case_sem_INSN_PAR_MULWLO_A },
- { M32RXF_INSN_WRITE_MULWLO_A, && case_sem_INSN_WRITE_MULWLO_A },
- { M32RXF_INSN_PAR_MV, && case_sem_INSN_PAR_MV },
- { M32RXF_INSN_WRITE_MV, && case_sem_INSN_WRITE_MV },
- { M32RXF_INSN_PAR_MVFACHI_A, && case_sem_INSN_PAR_MVFACHI_A },
- { M32RXF_INSN_WRITE_MVFACHI_A, && case_sem_INSN_WRITE_MVFACHI_A },
- { M32RXF_INSN_PAR_MVFACLO_A, && case_sem_INSN_PAR_MVFACLO_A },
- { M32RXF_INSN_WRITE_MVFACLO_A, && case_sem_INSN_WRITE_MVFACLO_A },
- { M32RXF_INSN_PAR_MVFACMI_A, && case_sem_INSN_PAR_MVFACMI_A },
- { M32RXF_INSN_WRITE_MVFACMI_A, && case_sem_INSN_WRITE_MVFACMI_A },
- { M32RXF_INSN_PAR_MVFC, && case_sem_INSN_PAR_MVFC },
- { M32RXF_INSN_WRITE_MVFC, && case_sem_INSN_WRITE_MVFC },
- { M32RXF_INSN_PAR_MVTACHI_A, && case_sem_INSN_PAR_MVTACHI_A },
- { M32RXF_INSN_WRITE_MVTACHI_A, && case_sem_INSN_WRITE_MVTACHI_A },
- { M32RXF_INSN_PAR_MVTACLO_A, && case_sem_INSN_PAR_MVTACLO_A },
- { M32RXF_INSN_WRITE_MVTACLO_A, && case_sem_INSN_WRITE_MVTACLO_A },
- { M32RXF_INSN_PAR_MVTC, && case_sem_INSN_PAR_MVTC },
- { M32RXF_INSN_WRITE_MVTC, && case_sem_INSN_WRITE_MVTC },
- { M32RXF_INSN_PAR_NEG, && case_sem_INSN_PAR_NEG },
- { M32RXF_INSN_WRITE_NEG, && case_sem_INSN_WRITE_NEG },
- { M32RXF_INSN_PAR_NOP, && case_sem_INSN_PAR_NOP },
- { M32RXF_INSN_WRITE_NOP, && case_sem_INSN_WRITE_NOP },
- { M32RXF_INSN_PAR_NOT, && case_sem_INSN_PAR_NOT },
- { M32RXF_INSN_WRITE_NOT, && case_sem_INSN_WRITE_NOT },
- { M32RXF_INSN_PAR_RAC_DSI, && case_sem_INSN_PAR_RAC_DSI },
- { M32RXF_INSN_WRITE_RAC_DSI, && case_sem_INSN_WRITE_RAC_DSI },
- { M32RXF_INSN_PAR_RACH_DSI, && case_sem_INSN_PAR_RACH_DSI },
- { M32RXF_INSN_WRITE_RACH_DSI, && case_sem_INSN_WRITE_RACH_DSI },
- { M32RXF_INSN_PAR_RTE, && case_sem_INSN_PAR_RTE },
- { M32RXF_INSN_WRITE_RTE, && case_sem_INSN_WRITE_RTE },
- { M32RXF_INSN_PAR_SLL, && case_sem_INSN_PAR_SLL },
- { M32RXF_INSN_WRITE_SLL, && case_sem_INSN_WRITE_SLL },
- { M32RXF_INSN_PAR_SLLI, && case_sem_INSN_PAR_SLLI },
- { M32RXF_INSN_WRITE_SLLI, && case_sem_INSN_WRITE_SLLI },
- { M32RXF_INSN_PAR_SRA, && case_sem_INSN_PAR_SRA },
- { M32RXF_INSN_WRITE_SRA, && case_sem_INSN_WRITE_SRA },
- { M32RXF_INSN_PAR_SRAI, && case_sem_INSN_PAR_SRAI },
- { M32RXF_INSN_WRITE_SRAI, && case_sem_INSN_WRITE_SRAI },
- { M32RXF_INSN_PAR_SRL, && case_sem_INSN_PAR_SRL },
- { M32RXF_INSN_WRITE_SRL, && case_sem_INSN_WRITE_SRL },
- { M32RXF_INSN_PAR_SRLI, && case_sem_INSN_PAR_SRLI },
- { M32RXF_INSN_WRITE_SRLI, && case_sem_INSN_WRITE_SRLI },
- { M32RXF_INSN_PAR_ST, && case_sem_INSN_PAR_ST },
- { M32RXF_INSN_WRITE_ST, && case_sem_INSN_WRITE_ST },
- { M32RXF_INSN_PAR_STB, && case_sem_INSN_PAR_STB },
- { M32RXF_INSN_WRITE_STB, && case_sem_INSN_WRITE_STB },
- { M32RXF_INSN_PAR_STH, && case_sem_INSN_PAR_STH },
- { M32RXF_INSN_WRITE_STH, && case_sem_INSN_WRITE_STH },
- { M32RXF_INSN_PAR_ST_PLUS, && case_sem_INSN_PAR_ST_PLUS },
- { M32RXF_INSN_WRITE_ST_PLUS, && case_sem_INSN_WRITE_ST_PLUS },
- { M32RXF_INSN_PAR_ST_MINUS, && case_sem_INSN_PAR_ST_MINUS },
- { M32RXF_INSN_WRITE_ST_MINUS, && case_sem_INSN_WRITE_ST_MINUS },
- { M32RXF_INSN_PAR_SUB, && case_sem_INSN_PAR_SUB },
- { M32RXF_INSN_WRITE_SUB, && case_sem_INSN_WRITE_SUB },
- { M32RXF_INSN_PAR_SUBV, && case_sem_INSN_PAR_SUBV },
- { M32RXF_INSN_WRITE_SUBV, && case_sem_INSN_WRITE_SUBV },
- { M32RXF_INSN_PAR_SUBX, && case_sem_INSN_PAR_SUBX },
- { M32RXF_INSN_WRITE_SUBX, && case_sem_INSN_WRITE_SUBX },
- { M32RXF_INSN_PAR_TRAP, && case_sem_INSN_PAR_TRAP },
- { M32RXF_INSN_WRITE_TRAP, && case_sem_INSN_WRITE_TRAP },
- { M32RXF_INSN_PAR_UNLOCK, && case_sem_INSN_PAR_UNLOCK },
- { M32RXF_INSN_WRITE_UNLOCK, && case_sem_INSN_WRITE_UNLOCK },
- { M32RXF_INSN_PAR_PCMPBZ, && case_sem_INSN_PAR_PCMPBZ },
- { M32RXF_INSN_WRITE_PCMPBZ, && case_sem_INSN_WRITE_PCMPBZ },
- { M32RXF_INSN_PAR_SADD, && case_sem_INSN_PAR_SADD },
- { M32RXF_INSN_WRITE_SADD, && case_sem_INSN_WRITE_SADD },
- { M32RXF_INSN_PAR_MACWU1, && case_sem_INSN_PAR_MACWU1 },
- { M32RXF_INSN_WRITE_MACWU1, && case_sem_INSN_WRITE_MACWU1 },
- { M32RXF_INSN_PAR_MSBLO, && case_sem_INSN_PAR_MSBLO },
- { M32RXF_INSN_WRITE_MSBLO, && case_sem_INSN_WRITE_MSBLO },
- { M32RXF_INSN_PAR_MULWU1, && case_sem_INSN_PAR_MULWU1 },
- { M32RXF_INSN_WRITE_MULWU1, && case_sem_INSN_WRITE_MULWU1 },
- { M32RXF_INSN_PAR_MACLH1, && case_sem_INSN_PAR_MACLH1 },
- { M32RXF_INSN_WRITE_MACLH1, && case_sem_INSN_WRITE_MACLH1 },
- { M32RXF_INSN_PAR_SC, && case_sem_INSN_PAR_SC },
- { M32RXF_INSN_WRITE_SC, && case_sem_INSN_WRITE_SC },
- { M32RXF_INSN_PAR_SNC, && case_sem_INSN_PAR_SNC },
- { M32RXF_INSN_WRITE_SNC, && case_sem_INSN_WRITE_SNC },
- { 0, 0 }
- };
- int i;
-
- for (i = 0; labels[i].label != 0; ++i)
- {
-#if FAST_P
- CPU_IDESC (current_cpu) [labels[i].index].sem_fast_lab = labels[i].label;
-#else
- CPU_IDESC (current_cpu) [labels[i].index].sem_full_lab = labels[i].label;
-#endif
- }
-
-#undef DEFINE_LABELS
-#endif /* DEFINE_LABELS */
-
-#ifdef DEFINE_SWITCH
-
-/* If hyper-fast [well not unnecessarily slow] execution is selected, turn
- off frills like tracing and profiling. */
-/* FIXME: A better way would be to have TRACE_RESULT check for something
- that can cause it to be optimized out. Another way would be to emit
- special handlers into the instruction "stream". */
-
-#if FAST_P
-#undef TRACE_RESULT
-#define TRACE_RESULT(cpu, abuf, name, type, val)
-#endif
-
-#undef GET_ATTR
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
-#define GET_ATTR(cpu, num, attr) CGEN_ATTR_VALUE (NULL, abuf->idesc->attrs, CGEN_INSN_##attr)
-#else
-#define GET_ATTR(cpu, num, attr) CGEN_ATTR_VALUE (NULL, abuf->idesc->attrs, CGEN_INSN_/**/attr)
-#endif
-
-{
-
-#if WITH_SCACHE_PBB
-
-/* Branch to next handler without going around main loop. */
-#define NEXT(vpc) goto * SEM_ARGBUF (vpc) -> semantic.sem_case
-SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
-
-#else /* ! WITH_SCACHE_PBB */
-
-#define NEXT(vpc) BREAK (sem)
-#ifdef __GNUC__
-#if FAST_P
- SWITCH (sem, SEM_ARGBUF (sc) -> idesc->sem_fast_lab)
-#else
- SWITCH (sem, SEM_ARGBUF (sc) -> idesc->sem_full_lab)
-#endif
-#else
- SWITCH (sem, SEM_ARGBUF (sc) -> idesc->num)
-#endif
-
-#endif /* ! WITH_SCACHE_PBB */
-
- {
-
- CASE (sem, INSN_X_INVALID) : /* --invalid-- */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_empty.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
-
- {
- /* Update the recorded pc in the cpu state struct.
- Only necessary for WITH_SCACHE case, but to avoid the
- conditional compilation .... */
- SET_H_PC (pc);
- /* Virtual insns have zero size. Overwrite vpc with address of next insn
- using the default-insn-bitsize spec. When executing insns in parallel
- we may want to queue the fault and continue execution. */
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
- vpc = sim_engine_invalid_insn (current_cpu, pc, vpc);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_X_AFTER) : /* --after-- */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_empty.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
-
- {
-#if WITH_SCACHE_PBB_M32RXF
- m32rxf_pbb_after (current_cpu, sem_arg);
-#endif
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_X_BEFORE) : /* --before-- */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_empty.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
-
- {
-#if WITH_SCACHE_PBB_M32RXF
- m32rxf_pbb_before (current_cpu, sem_arg);
-#endif
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_X_CTI_CHAIN) : /* --cti-chain-- */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_empty.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
-
- {
-#if WITH_SCACHE_PBB_M32RXF
-#ifdef DEFINE_SWITCH
- vpc = m32rxf_pbb_cti_chain (current_cpu, sem_arg,
- pbb_br_type, pbb_br_npc);
- BREAK (sem);
-#else
- /* FIXME: Allow provision of explicit ifmt spec in insn spec. */
- vpc = m32rxf_pbb_cti_chain (current_cpu, sem_arg,
- CPU_PBB_BR_TYPE (current_cpu),
- CPU_PBB_BR_NPC (current_cpu));
-#endif
-#endif
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_X_CHAIN) : /* --chain-- */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_empty.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
-
- {
-#if WITH_SCACHE_PBB_M32RXF
- vpc = m32rxf_pbb_chain (current_cpu, sem_arg);
-#ifdef DEFINE_SWITCH
- BREAK (sem);
-#endif
-#endif
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_X_BEGIN) : /* --begin-- */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_empty.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
-
- {
-#if WITH_SCACHE_PBB_M32RXF
-#if defined DEFINE_SWITCH || defined FAST_P
- /* In the switch case FAST_P is a constant, allowing several optimizations
- in any called inline functions. */
- vpc = m32rxf_pbb_begin (current_cpu, FAST_P);
-#else
-#if 0 /* cgen engine can't handle dynamic fast/full switching yet. */
- vpc = m32rxf_pbb_begin (current_cpu, STATE_RUN_FAST_P (CPU_STATE (current_cpu)));
-#else
- vpc = m32rxf_pbb_begin (current_cpu, 0);
-#endif
-#endif
-#endif
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_ADD) : /* add $dr,$sr */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_add.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = ADDSI (* FLD (i_dr), * FLD (i_sr));
- * FLD (i_dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_ADD3) : /* add3 $dr,$sr,$hash$slo16 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_add3.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = ADDSI (* FLD (i_sr), FLD (f_simm16));
- * FLD (i_dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_AND) : /* and $dr,$sr */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_add.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = ANDSI (* FLD (i_dr), * FLD (i_sr));
- * FLD (i_dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_AND3) : /* and3 $dr,$sr,$uimm16 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_and3.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = ANDSI (* FLD (i_sr), FLD (f_uimm16));
- * FLD (i_dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_OR) : /* or $dr,$sr */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_add.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = ORSI (* FLD (i_dr), * FLD (i_sr));
- * FLD (i_dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_OR3) : /* or3 $dr,$sr,$hash$ulo16 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_and3.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = ORSI (* FLD (i_sr), FLD (f_uimm16));
- * FLD (i_dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_XOR) : /* xor $dr,$sr */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_add.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = XORSI (* FLD (i_dr), * FLD (i_sr));
- * FLD (i_dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_XOR3) : /* xor3 $dr,$sr,$uimm16 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_and3.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = XORSI (* FLD (i_sr), FLD (f_uimm16));
- * FLD (i_dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_ADDI) : /* addi $dr,$simm8 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_addi.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = ADDSI (* FLD (i_dr), FLD (f_simm8));
- * FLD (i_dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_ADDV) : /* addv $dr,$sr */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_add.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- SI temp0;BI temp1;
- temp0 = ADDSI (* FLD (i_dr), * FLD (i_sr));
- temp1 = ADDOFSI (* FLD (i_dr), * FLD (i_sr), 0);
- {
- SI opval = temp0;
- * FLD (i_dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
- {
- BI opval = temp1;
- CPU (h_cond) = opval;
- TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
- }
-}
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_ADDV3) : /* addv3 $dr,$sr,$simm16 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_add3.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-{
- SI temp0;BI temp1;
- temp0 = ADDSI (* FLD (i_sr), FLD (f_simm16));
- temp1 = ADDOFSI (* FLD (i_sr), FLD (f_simm16), 0);
- {
- SI opval = temp0;
- * FLD (i_dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
- {
- BI opval = temp1;
- CPU (h_cond) = opval;
- TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
- }
-}
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_ADDX) : /* addx $dr,$sr */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_add.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- SI temp0;BI temp1;
- temp0 = ADDCSI (* FLD (i_dr), * FLD (i_sr), CPU (h_cond));
- temp1 = ADDCFSI (* FLD (i_dr), * FLD (i_sr), CPU (h_cond));
- {
- SI opval = temp0;
- * FLD (i_dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
- {
- BI opval = temp1;
- CPU (h_cond) = opval;
- TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
- }
-}
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_BC8) : /* bc.s $disp8 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_bl8.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-if (CPU (h_cond)) {
- {
- USI opval = FLD (i_disp8);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 2);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_BC24) : /* bc.l $disp24 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_bl24.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-if (CPU (h_cond)) {
- {
- USI opval = FLD (i_disp24);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 2);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_BEQ) : /* beq $src1,$src2,$disp16 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_beq.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-if (EQSI (* FLD (i_src1), * FLD (i_src2))) {
- {
- USI opval = FLD (i_disp16);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 3);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_BEQZ) : /* beqz $src2,$disp16 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_beq.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-if (EQSI (* FLD (i_src2), 0)) {
- {
- USI opval = FLD (i_disp16);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 2);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_BGEZ) : /* bgez $src2,$disp16 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_beq.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-if (GESI (* FLD (i_src2), 0)) {
- {
- USI opval = FLD (i_disp16);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 2);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_BGTZ) : /* bgtz $src2,$disp16 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_beq.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-if (GTSI (* FLD (i_src2), 0)) {
- {
- USI opval = FLD (i_disp16);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 2);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_BLEZ) : /* blez $src2,$disp16 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_beq.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-if (LESI (* FLD (i_src2), 0)) {
- {
- USI opval = FLD (i_disp16);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 2);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_BLTZ) : /* bltz $src2,$disp16 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_beq.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-if (LTSI (* FLD (i_src2), 0)) {
- {
- USI opval = FLD (i_disp16);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 2);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_BNEZ) : /* bnez $src2,$disp16 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_beq.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-if (NESI (* FLD (i_src2), 0)) {
- {
- USI opval = FLD (i_disp16);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 2);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_BL8) : /* bl.s $disp8 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_bl8.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- {
- SI opval = ADDSI (ANDSI (pc, -4), 4);
- CPU (h_gr[((UINT) 14)]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
- {
- USI opval = FLD (i_disp8);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- SEM_BRANCH_FINI (vpc);
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_BL24) : /* bl.l $disp24 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_bl24.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-{
- {
- SI opval = ADDSI (pc, 4);
- CPU (h_gr[((UINT) 14)]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
- {
- USI opval = FLD (i_disp24);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- SEM_BRANCH_FINI (vpc);
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_BCL8) : /* bcl.s $disp8 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_bl8.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-if (CPU (h_cond)) {
-{
- {
- SI opval = ADDSI (ANDSI (pc, -4), 4);
- CPU (h_gr[((UINT) 14)]) = opval;
- written |= (1 << 3);
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
- {
- USI opval = FLD (i_disp8);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 4);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_BCL24) : /* bcl.l $disp24 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_bl24.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-if (CPU (h_cond)) {
-{
- {
- SI opval = ADDSI (pc, 4);
- CPU (h_gr[((UINT) 14)]) = opval;
- written |= (1 << 3);
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
- {
- USI opval = FLD (i_disp24);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 4);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_BNC8) : /* bnc.s $disp8 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_bl8.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-if (NOTBI (CPU (h_cond))) {
- {
- USI opval = FLD (i_disp8);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 2);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_BNC24) : /* bnc.l $disp24 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_bl24.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-if (NOTBI (CPU (h_cond))) {
- {
- USI opval = FLD (i_disp24);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 2);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_BNE) : /* bne $src1,$src2,$disp16 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_beq.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-if (NESI (* FLD (i_src1), * FLD (i_src2))) {
- {
- USI opval = FLD (i_disp16);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 3);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_BRA8) : /* bra.s $disp8 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_bl8.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- USI opval = FLD (i_disp8);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-
- SEM_BRANCH_FINI (vpc);
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_BRA24) : /* bra.l $disp24 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_bl24.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- USI opval = FLD (i_disp24);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-
- SEM_BRANCH_FINI (vpc);
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_BNCL8) : /* bncl.s $disp8 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_bl8.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-if (NOTBI (CPU (h_cond))) {
-{
- {
- SI opval = ADDSI (ANDSI (pc, -4), 4);
- CPU (h_gr[((UINT) 14)]) = opval;
- written |= (1 << 3);
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
- {
- USI opval = FLD (i_disp8);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 4);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_BNCL24) : /* bncl.l $disp24 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_bl24.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-if (NOTBI (CPU (h_cond))) {
-{
- {
- SI opval = ADDSI (pc, 4);
- CPU (h_gr[((UINT) 14)]) = opval;
- written |= (1 << 3);
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
- {
- USI opval = FLD (i_disp24);
- SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 4);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_CMP) : /* cmp $src1,$src2 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_st_plus.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- BI opval = LTSI (* FLD (i_src1), * FLD (i_src2));
- CPU (h_cond) = opval;
- TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_CMPI) : /* cmpi $src2,$simm16 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_st_d.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- BI opval = LTSI (* FLD (i_src2), FLD (f_simm16));
- CPU (h_cond) = opval;
- TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_CMPU) : /* cmpu $src1,$src2 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_st_plus.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- BI opval = LTUSI (* FLD (i_src1), * FLD (i_src2));
- CPU (h_cond) = opval;
- TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_CMPUI) : /* cmpui $src2,$simm16 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_st_d.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- BI opval = LTUSI (* FLD (i_src2), FLD (f_simm16));
- CPU (h_cond) = opval;
- TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_CMPEQ) : /* cmpeq $src1,$src2 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_st_plus.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- BI opval = EQSI (* FLD (i_src1), * FLD (i_src2));
- CPU (h_cond) = opval;
- TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_CMPZ) : /* cmpz $src2 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_st_plus.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- BI opval = EQSI (* FLD (i_src2), 0);
- CPU (h_cond) = opval;
- TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_DIV) : /* div $dr,$sr */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_add.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-if (NESI (* FLD (i_sr), 0)) {
- {
- SI opval = DIVSI (* FLD (i_dr), * FLD (i_sr));
- * FLD (i_dr) = opval;
- written |= (1 << 2);
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-}
-
- abuf->written = written;
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_DIVU) : /* divu $dr,$sr */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_add.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-if (NESI (* FLD (i_sr), 0)) {
- {
- SI opval = UDIVSI (* FLD (i_dr), * FLD (i_sr));
- * FLD (i_dr) = opval;
- written |= (1 << 2);
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-}
-
- abuf->written = written;
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_REM) : /* rem $dr,$sr */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_add.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-if (NESI (* FLD (i_sr), 0)) {
- {
- SI opval = MODSI (* FLD (i_dr), * FLD (i_sr));
- * FLD (i_dr) = opval;
- written |= (1 << 2);
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-}
-
- abuf->written = written;
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_REMU) : /* remu $dr,$sr */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_add.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-if (NESI (* FLD (i_sr), 0)) {
- {
- SI opval = UMODSI (* FLD (i_dr), * FLD (i_sr));
- * FLD (i_dr) = opval;
- written |= (1 << 2);
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-}
-
- abuf->written = written;
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_DIVH) : /* divh $dr,$sr */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_add.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
-if (NESI (* FLD (i_sr), 0)) {
- {
- SI opval = DIVSI (EXTHISI (TRUNCSIHI (* FLD (i_dr))), * FLD (i_sr));
- * FLD (i_dr) = opval;
- written |= (1 << 2);
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-}
-
- abuf->written = written;
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_JC) : /* jc $sr */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_jl.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-if (CPU (h_cond)) {
- {
- USI opval = ANDSI (* FLD (i_sr), -4);
- SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 2);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_JNC) : /* jnc $sr */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_jl.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-if (NOTBI (CPU (h_cond))) {
- {
- USI opval = ANDSI (* FLD (i_sr), -4);
- SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
- written |= (1 << 2);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- abuf->written = written;
- SEM_BRANCH_FINI (vpc);
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_JL) : /* jl $sr */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_jl.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- SI temp0;USI temp1;
- temp0 = ADDSI (ANDSI (pc, -4), 4);
- temp1 = ANDSI (* FLD (i_sr), -4);
- {
- SI opval = temp0;
- CPU (h_gr[((UINT) 14)]) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
- {
- USI opval = temp1;
- SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- SEM_BRANCH_FINI (vpc);
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_JMP) : /* jmp $sr */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_jl.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- USI opval = ANDSI (* FLD (i_sr), -4);
- SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-
- SEM_BRANCH_FINI (vpc);
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_LD) : /* ld $dr,@$sr */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_ld_plus.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = GETMEMSI (current_cpu, pc, * FLD (i_sr));
- * FLD (i_dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_LD_D) : /* ld $dr,@($slo16,$sr) */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_add3.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = GETMEMSI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16)));
- * FLD (i_dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_LDB) : /* ldb $dr,@$sr */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_ld_plus.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = EXTQISI (GETMEMQI (current_cpu, pc, * FLD (i_sr)));
- * FLD (i_dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_LDB_D) : /* ldb $dr,@($slo16,$sr) */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_add3.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = EXTQISI (GETMEMQI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16))));
- * FLD (i_dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_LDH) : /* ldh $dr,@$sr */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_ld_plus.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = EXTHISI (GETMEMHI (current_cpu, pc, * FLD (i_sr)));
- * FLD (i_dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_LDH_D) : /* ldh $dr,@($slo16,$sr) */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_add3.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = EXTHISI (GETMEMHI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16))));
- * FLD (i_dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_LDUB) : /* ldub $dr,@$sr */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_ld_plus.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = ZEXTQISI (GETMEMQI (current_cpu, pc, * FLD (i_sr)));
- * FLD (i_dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_LDUB_D) : /* ldub $dr,@($slo16,$sr) */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_add3.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = ZEXTQISI (GETMEMQI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16))));
- * FLD (i_dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_LDUH) : /* lduh $dr,@$sr */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_ld_plus.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = ZEXTHISI (GETMEMHI (current_cpu, pc, * FLD (i_sr)));
- * FLD (i_dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_LDUH_D) : /* lduh $dr,@($slo16,$sr) */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_add3.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = ZEXTHISI (GETMEMHI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16))));
- * FLD (i_dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_LD_PLUS) : /* ld $dr,@$sr+ */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_ld_plus.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- SI temp0;SI temp1;
- temp0 = GETMEMSI (current_cpu, pc, * FLD (i_sr));
- temp1 = ADDSI (* FLD (i_sr), 4);
- {
- SI opval = temp0;
- * FLD (i_dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
- {
- SI opval = temp1;
- * FLD (i_sr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-}
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_LD24) : /* ld24 $dr,$uimm24 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_ld24.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = FLD (i_uimm24);
- * FLD (i_dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_LDI8) : /* ldi8 $dr,$simm8 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_addi.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = FLD (f_simm8);
- * FLD (i_dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_LDI16) : /* ldi16 $dr,$hash$slo16 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_add3.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = FLD (f_simm16);
- * FLD (i_dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_LOCK) : /* lock $dr,@$sr */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_ld_plus.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- {
- BI opval = 1;
- CPU (h_lock) = opval;
- TRACE_RESULT (current_cpu, abuf, "lock", 'x', opval);
- }
- {
- SI opval = GETMEMSI (current_cpu, pc, * FLD (i_sr));
- * FLD (i_dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-}
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_MACHI_A) : /* machi $src1,$src2,$acc */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_machi_a.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- DI opval = SRADI (SLLDI (ADDDI (GET_H_ACCUMS (FLD (f_acc)), MULDI (EXTSIDI (ANDSI (* FLD (i_src1), 0xffff0000)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16))))), 8), 8);
- SET_H_ACCUMS (FLD (f_acc), opval);
- TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_MACLO_A) : /* maclo $src1,$src2,$acc */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_machi_a.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- DI opval = SRADI (SLLDI (ADDDI (GET_H_ACCUMS (FLD (f_acc)), MULDI (EXTSIDI (SLLSI (* FLD (i_src1), 16)), EXTHIDI (TRUNCSIHI (* FLD (i_src2))))), 8), 8);
- SET_H_ACCUMS (FLD (f_acc), opval);
- TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_MACWHI_A) : /* macwhi $src1,$src2,$acc */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_machi_a.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- DI opval = ADDDI (GET_H_ACCUMS (FLD (f_acc)), MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16)))));
- SET_H_ACCUMS (FLD (f_acc), opval);
- TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_MACWLO_A) : /* macwlo $src1,$src2,$acc */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_machi_a.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- DI opval = ADDDI (GET_H_ACCUMS (FLD (f_acc)), MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (* FLD (i_src2)))));
- SET_H_ACCUMS (FLD (f_acc), opval);
- TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_MUL) : /* mul $dr,$sr */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_add.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = MULSI (* FLD (i_dr), * FLD (i_sr));
- * FLD (i_dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_MULHI_A) : /* mulhi $src1,$src2,$acc */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_machi_a.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- DI opval = SRADI (SLLDI (MULDI (EXTSIDI (ANDSI (* FLD (i_src1), 0xffff0000)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16)))), 16), 16);
- SET_H_ACCUMS (FLD (f_acc), opval);
- TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_MULLO_A) : /* mullo $src1,$src2,$acc */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_machi_a.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- DI opval = SRADI (SLLDI (MULDI (EXTSIDI (SLLSI (* FLD (i_src1), 16)), EXTHIDI (TRUNCSIHI (* FLD (i_src2)))), 16), 16);
- SET_H_ACCUMS (FLD (f_acc), opval);
- TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_MULWHI_A) : /* mulwhi $src1,$src2,$acc */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_machi_a.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- DI opval = MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16))));
- SET_H_ACCUMS (FLD (f_acc), opval);
- TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_MULWLO_A) : /* mulwlo $src1,$src2,$acc */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_machi_a.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- DI opval = MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (* FLD (i_src2))));
- SET_H_ACCUMS (FLD (f_acc), opval);
- TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_MV) : /* mv $dr,$sr */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_ld_plus.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = * FLD (i_sr);
- * FLD (i_dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_MVFACHI_A) : /* mvfachi $dr,$accs */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_mvfachi_a.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = TRUNCDISI (SRADI (GET_H_ACCUMS (FLD (f_accs)), 32));
- * FLD (i_dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_MVFACLO_A) : /* mvfaclo $dr,$accs */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_mvfachi_a.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = TRUNCDISI (GET_H_ACCUMS (FLD (f_accs)));
- * FLD (i_dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_MVFACMI_A) : /* mvfacmi $dr,$accs */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_mvfachi_a.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = TRUNCDISI (SRADI (GET_H_ACCUMS (FLD (f_accs)), 16));
- * FLD (i_dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_MVFC) : /* mvfc $dr,$scr */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_ld_plus.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = GET_H_CR (FLD (f_r2));
- * FLD (i_dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_MVTACHI_A) : /* mvtachi $src1,$accs */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_mvtachi_a.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- DI opval = ORDI (ANDDI (GET_H_ACCUMS (FLD (f_accs)), MAKEDI (0, 0xffffffff)), SLLDI (EXTSIDI (* FLD (i_src1)), 32));
- SET_H_ACCUMS (FLD (f_accs), opval);
- TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_MVTACLO_A) : /* mvtaclo $src1,$accs */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_mvtachi_a.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- DI opval = ORDI (ANDDI (GET_H_ACCUMS (FLD (f_accs)), MAKEDI (0xffffffff, 0)), ZEXTSIDI (* FLD (i_src1)));
- SET_H_ACCUMS (FLD (f_accs), opval);
- TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_MVTC) : /* mvtc $sr,$dcr */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_ld_plus.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- USI opval = * FLD (i_sr);
- SET_H_CR (FLD (f_r1), opval);
- TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_NEG) : /* neg $dr,$sr */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_ld_plus.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = NEGSI (* FLD (i_sr));
- * FLD (i_dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_NOP) : /* nop */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_empty.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-PROFILE_COUNT_FILLNOPS (current_cpu, abuf->addr);
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_NOT) : /* not $dr,$sr */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_ld_plus.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = INVSI (* FLD (i_sr));
- * FLD (i_dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_RAC_DSI) : /* rac $accd,$accs,$imm1 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_rac_dsi.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- DI tmp_tmp1;
- tmp_tmp1 = SLLDI (GET_H_ACCUMS (FLD (f_accs)), FLD (f_imm1));
- tmp_tmp1 = ADDDI (tmp_tmp1, MAKEDI (0, 32768));
- {
- DI opval = (GTDI (tmp_tmp1, MAKEDI (32767, 0xffff0000))) ? (MAKEDI (32767, 0xffff0000)) : (LTDI (tmp_tmp1, MAKEDI (0xffff8000, 0))) ? (MAKEDI (0xffff8000, 0)) : (ANDDI (tmp_tmp1, MAKEDI (0xffffffff, 0xffff0000)));
- SET_H_ACCUMS (FLD (f_accd), opval);
- TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
- }
-}
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_RACH_DSI) : /* rach $accd,$accs,$imm1 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_rac_dsi.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- DI tmp_tmp1;
- tmp_tmp1 = SLLDI (GET_H_ACCUMS (FLD (f_accs)), FLD (f_imm1));
- tmp_tmp1 = ADDDI (tmp_tmp1, MAKEDI (0, 0x80000000));
- {
- DI opval = (GTDI (tmp_tmp1, MAKEDI (32767, 0))) ? (MAKEDI (32767, 0)) : (LTDI (tmp_tmp1, MAKEDI (0xffff8000, 0))) ? (MAKEDI (0xffff8000, 0)) : (ANDDI (tmp_tmp1, MAKEDI (0xffffffff, 0)));
- SET_H_ACCUMS (FLD (f_accd), opval);
- TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
- }
-}
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_RTE) : /* rte */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_empty.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- {
- USI opval = ANDSI (GET_H_CR (((UINT) 6)), -4);
- SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
- {
- USI opval = GET_H_CR (((UINT) 14));
- SET_H_CR (((UINT) 6), opval);
- TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval);
- }
- {
- UQI opval = CPU (h_bpsw);
- SET_H_PSW (opval);
- TRACE_RESULT (current_cpu, abuf, "psw", 'x', opval);
- }
- {
- UQI opval = CPU (h_bbpsw);
- CPU (h_bpsw) = opval;
- TRACE_RESULT (current_cpu, abuf, "bpsw", 'x', opval);
- }
-}
-
- SEM_BRANCH_FINI (vpc);
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_SETH) : /* seth $dr,$hash$hi16 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_seth.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = SLLSI (FLD (f_hi16), 16);
- * FLD (i_dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_SLL) : /* sll $dr,$sr */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_add.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = SLLSI (* FLD (i_dr), ANDSI (* FLD (i_sr), 31));
- * FLD (i_dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_SLL3) : /* sll3 $dr,$sr,$simm16 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_add3.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = SLLSI (* FLD (i_sr), ANDSI (FLD (f_simm16), 31));
- * FLD (i_dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_SLLI) : /* slli $dr,$uimm5 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_slli.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = SLLSI (* FLD (i_dr), FLD (f_uimm5));
- * FLD (i_dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_SRA) : /* sra $dr,$sr */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_add.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = SRASI (* FLD (i_dr), ANDSI (* FLD (i_sr), 31));
- * FLD (i_dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_SRA3) : /* sra3 $dr,$sr,$simm16 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_add3.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = SRASI (* FLD (i_sr), ANDSI (FLD (f_simm16), 31));
- * FLD (i_dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_SRAI) : /* srai $dr,$uimm5 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_slli.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = SRASI (* FLD (i_dr), FLD (f_uimm5));
- * FLD (i_dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_SRL) : /* srl $dr,$sr */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_add.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = SRLSI (* FLD (i_dr), ANDSI (* FLD (i_sr), 31));
- * FLD (i_dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_SRL3) : /* srl3 $dr,$sr,$simm16 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_add3.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = SRLSI (* FLD (i_sr), ANDSI (FLD (f_simm16), 31));
- * FLD (i_dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_SRLI) : /* srli $dr,$uimm5 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_slli.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = SRLSI (* FLD (i_dr), FLD (f_uimm5));
- * FLD (i_dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_ST) : /* st $src1,@$src2 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_st_plus.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = * FLD (i_src1);
- SETMEMSI (current_cpu, pc, * FLD (i_src2), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_ST_D) : /* st $src1,@($slo16,$src2) */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_st_d.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = * FLD (i_src1);
- SETMEMSI (current_cpu, pc, ADDSI (* FLD (i_src2), FLD (f_simm16)), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_STB) : /* stb $src1,@$src2 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_st_plus.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- QI opval = * FLD (i_src1);
- SETMEMQI (current_cpu, pc, * FLD (i_src2), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_STB_D) : /* stb $src1,@($slo16,$src2) */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_st_d.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- QI opval = * FLD (i_src1);
- SETMEMQI (current_cpu, pc, ADDSI (* FLD (i_src2), FLD (f_simm16)), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_STH) : /* sth $src1,@$src2 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_st_plus.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- HI opval = * FLD (i_src1);
- SETMEMHI (current_cpu, pc, * FLD (i_src2), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_STH_D) : /* sth $src1,@($slo16,$src2) */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_st_d.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- HI opval = * FLD (i_src1);
- SETMEMHI (current_cpu, pc, ADDSI (* FLD (i_src2), FLD (f_simm16)), opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_ST_PLUS) : /* st $src1,@+$src2 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_st_plus.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- SI tmp_new_src2;
- tmp_new_src2 = ADDSI (* FLD (i_src2), 4);
- {
- SI opval = * FLD (i_src1);
- SETMEMSI (current_cpu, pc, tmp_new_src2, opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
- {
- SI opval = tmp_new_src2;
- * FLD (i_src2) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-}
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_ST_MINUS) : /* st $src1,@-$src2 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_st_plus.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- SI tmp_new_src2;
- tmp_new_src2 = SUBSI (* FLD (i_src2), 4);
- {
- SI opval = * FLD (i_src1);
- SETMEMSI (current_cpu, pc, tmp_new_src2, opval);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
- {
- SI opval = tmp_new_src2;
- * FLD (i_src2) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-}
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_SUB) : /* sub $dr,$sr */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_add.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = SUBSI (* FLD (i_dr), * FLD (i_sr));
- * FLD (i_dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_SUBV) : /* subv $dr,$sr */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_add.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- SI temp0;BI temp1;
- temp0 = SUBSI (* FLD (i_dr), * FLD (i_sr));
- temp1 = SUBOFSI (* FLD (i_dr), * FLD (i_sr), 0);
- {
- SI opval = temp0;
- * FLD (i_dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
- {
- BI opval = temp1;
- CPU (h_cond) = opval;
- TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
- }
-}
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_SUBX) : /* subx $dr,$sr */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_add.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- SI temp0;BI temp1;
- temp0 = SUBCSI (* FLD (i_dr), * FLD (i_sr), CPU (h_cond));
- temp1 = SUBCFSI (* FLD (i_dr), * FLD (i_sr), CPU (h_cond));
- {
- SI opval = temp0;
- * FLD (i_dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
- {
- BI opval = temp1;
- CPU (h_cond) = opval;
- TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
- }
-}
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_TRAP) : /* trap $uimm4 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_trap.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- {
- USI opval = GET_H_CR (((UINT) 6));
- SET_H_CR (((UINT) 14), opval);
- TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval);
- }
- {
- USI opval = ADDSI (pc, 4);
- SET_H_CR (((UINT) 6), opval);
- TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval);
- }
- {
- UQI opval = CPU (h_bpsw);
- CPU (h_bbpsw) = opval;
- TRACE_RESULT (current_cpu, abuf, "bbpsw", 'x', opval);
- }
- {
- UQI opval = GET_H_PSW ();
- CPU (h_bpsw) = opval;
- TRACE_RESULT (current_cpu, abuf, "bpsw", 'x', opval);
- }
- {
- UQI opval = ANDQI (GET_H_PSW (), 128);
- SET_H_PSW (opval);
- TRACE_RESULT (current_cpu, abuf, "psw", 'x', opval);
- }
- {
- SI opval = m32r_trap (current_cpu, pc, FLD (f_uimm4));
- SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- SEM_BRANCH_FINI (vpc);
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_UNLOCK) : /* unlock $src1,@$src2 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_st_plus.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
-if (CPU (h_lock)) {
- {
- SI opval = * FLD (i_src1);
- SETMEMSI (current_cpu, pc, * FLD (i_src2), opval);
- written |= (1 << 4);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-}
- {
- BI opval = 0;
- CPU (h_lock) = opval;
- TRACE_RESULT (current_cpu, abuf, "lock", 'x', opval);
- }
-}
-
- abuf->written = written;
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_SATB) : /* satb $dr,$sr */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_ld_plus.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = (GESI (* FLD (i_sr), 127)) ? (127) : (LESI (* FLD (i_sr), -128)) ? (-128) : (* FLD (i_sr));
- * FLD (i_dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_SATH) : /* sath $dr,$sr */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_ld_plus.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = (GESI (* FLD (i_sr), 32767)) ? (32767) : (LESI (* FLD (i_sr), -32768)) ? (-32768) : (* FLD (i_sr));
- * FLD (i_dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_SAT) : /* sat $dr,$sr */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_ld_plus.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
-
- {
- SI opval = ((CPU (h_cond)) ? (((LTSI (* FLD (i_sr), 0)) ? (2147483647) : (0x80000000))) : (* FLD (i_sr)));
- * FLD (i_dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_PCMPBZ) : /* pcmpbz $src2 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_st_plus.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- BI opval = (EQSI (ANDSI (* FLD (i_src2), 255), 0)) ? (1) : (EQSI (ANDSI (* FLD (i_src2), 65280), 0)) ? (1) : (EQSI (ANDSI (* FLD (i_src2), 16711680), 0)) ? (1) : (EQSI (ANDSI (* FLD (i_src2), 0xff000000), 0)) ? (1) : (0);
- CPU (h_cond) = opval;
- TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_SADD) : /* sadd */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_empty.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- DI opval = ADDDI (SRADI (GET_H_ACCUMS (((UINT) 1)), 16), GET_H_ACCUMS (((UINT) 0)));
- SET_H_ACCUMS (((UINT) 0), opval);
- TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_MACWU1) : /* macwu1 $src1,$src2 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_st_plus.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- DI opval = SRADI (SLLDI (ADDDI (GET_H_ACCUMS (((UINT) 1)), MULDI (EXTSIDI (* FLD (i_src1)), EXTSIDI (ANDSI (* FLD (i_src2), 65535)))), 8), 8);
- SET_H_ACCUMS (((UINT) 1), opval);
- TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_MSBLO) : /* msblo $src1,$src2 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_st_plus.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- DI opval = SRADI (SLLDI (SUBDI (GET_H_ACCUM (), SRADI (SLLDI (MULDI (EXTHIDI (TRUNCSIHI (* FLD (i_src1))), EXTHIDI (TRUNCSIHI (* FLD (i_src2)))), 32), 16)), 8), 8);
- SET_H_ACCUM (opval);
- TRACE_RESULT (current_cpu, abuf, "accum", 'D', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_MULWU1) : /* mulwu1 $src1,$src2 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_st_plus.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- DI opval = SRADI (SLLDI (MULDI (EXTSIDI (* FLD (i_src1)), EXTSIDI (ANDSI (* FLD (i_src2), 65535))), 16), 16);
- SET_H_ACCUMS (((UINT) 1), opval);
- TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_MACLH1) : /* maclh1 $src1,$src2 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_st_plus.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- DI opval = SRADI (SLLDI (ADDDI (GET_H_ACCUMS (((UINT) 1)), SLLDI (EXTSIDI (MULSI (EXTHISI (TRUNCSIHI (* FLD (i_src1))), SRASI (* FLD (i_src2), 16))), 16)), 8), 8);
- SET_H_ACCUMS (((UINT) 1), opval);
- TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
- }
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_SC) : /* sc */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_empty.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-if (ZEXTBISI (CPU (h_cond)))
- SEM_SKIP_INSN (current_cpu, sem_arg, vpc);
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_SNC) : /* snc */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_empty.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-if (ZEXTBISI (NOTBI (CPU (h_cond))))
- SEM_SKIP_INSN (current_cpu, sem_arg, vpc);
-
-#undef FLD
-}
- NEXT (vpc);
-
- CASE (sem, INSN_PAR_ADD) : /* add $dr,$sr */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_add.f
-#define OPRND(f) par_exec->operands.sfmt_add.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = ADDSI (* FLD (i_dr), * FLD (i_sr));
- OPRND (dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
-#undef OPRND
-#undef FLD
-}
- NEXT (vpc);
-
-CASE (sem, INSN_WRITE_ADD) : /* add $dr,$sr */
- {
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
-#define FLD(f) abuf->fields.sfmt_add.f
-#define OPRND(f) par_exec->operands.sfmt_add.f
- int UNUSED written = abuf->written;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
-
- * FLD (i_dr) = OPRND (dr);
-
-#undef OPRND
-#undef FLD
- }
- NEXT (vpc);
-
- CASE (sem, INSN_PAR_AND) : /* and $dr,$sr */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_add.f
-#define OPRND(f) par_exec->operands.sfmt_add.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = ANDSI (* FLD (i_dr), * FLD (i_sr));
- OPRND (dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
-#undef OPRND
-#undef FLD
-}
- NEXT (vpc);
-
-CASE (sem, INSN_WRITE_AND) : /* and $dr,$sr */
- {
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
-#define FLD(f) abuf->fields.sfmt_add.f
-#define OPRND(f) par_exec->operands.sfmt_add.f
- int UNUSED written = abuf->written;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
-
- * FLD (i_dr) = OPRND (dr);
-
-#undef OPRND
-#undef FLD
- }
- NEXT (vpc);
-
- CASE (sem, INSN_PAR_OR) : /* or $dr,$sr */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_add.f
-#define OPRND(f) par_exec->operands.sfmt_add.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = ORSI (* FLD (i_dr), * FLD (i_sr));
- OPRND (dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
-#undef OPRND
-#undef FLD
-}
- NEXT (vpc);
-
-CASE (sem, INSN_WRITE_OR) : /* or $dr,$sr */
- {
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
-#define FLD(f) abuf->fields.sfmt_add.f
-#define OPRND(f) par_exec->operands.sfmt_add.f
- int UNUSED written = abuf->written;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
-
- * FLD (i_dr) = OPRND (dr);
-
-#undef OPRND
-#undef FLD
- }
- NEXT (vpc);
-
- CASE (sem, INSN_PAR_XOR) : /* xor $dr,$sr */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_add.f
-#define OPRND(f) par_exec->operands.sfmt_add.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = XORSI (* FLD (i_dr), * FLD (i_sr));
- OPRND (dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
-#undef OPRND
-#undef FLD
-}
- NEXT (vpc);
-
-CASE (sem, INSN_WRITE_XOR) : /* xor $dr,$sr */
- {
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
-#define FLD(f) abuf->fields.sfmt_add.f
-#define OPRND(f) par_exec->operands.sfmt_add.f
- int UNUSED written = abuf->written;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
-
- * FLD (i_dr) = OPRND (dr);
-
-#undef OPRND
-#undef FLD
- }
- NEXT (vpc);
-
- CASE (sem, INSN_PAR_ADDI) : /* addi $dr,$simm8 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_addi.f
-#define OPRND(f) par_exec->operands.sfmt_addi.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = ADDSI (* FLD (i_dr), FLD (f_simm8));
- OPRND (dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
-#undef OPRND
-#undef FLD
-}
- NEXT (vpc);
-
-CASE (sem, INSN_WRITE_ADDI) : /* addi $dr,$simm8 */
- {
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
-#define FLD(f) abuf->fields.sfmt_addi.f
-#define OPRND(f) par_exec->operands.sfmt_addi.f
- int UNUSED written = abuf->written;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
-
- * FLD (i_dr) = OPRND (dr);
-
-#undef OPRND
-#undef FLD
- }
- NEXT (vpc);
-
- CASE (sem, INSN_PAR_ADDV) : /* addv $dr,$sr */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_add.f
-#define OPRND(f) par_exec->operands.sfmt_addv.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- SI temp0;BI temp1;
- temp0 = ADDSI (* FLD (i_dr), * FLD (i_sr));
- temp1 = ADDOFSI (* FLD (i_dr), * FLD (i_sr), 0);
- {
- SI opval = temp0;
- OPRND (dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
- {
- BI opval = temp1;
- OPRND (condbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
- }
-}
-
-#undef OPRND
-#undef FLD
-}
- NEXT (vpc);
-
-CASE (sem, INSN_WRITE_ADDV) : /* addv $dr,$sr */
- {
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
-#define FLD(f) abuf->fields.sfmt_add.f
-#define OPRND(f) par_exec->operands.sfmt_addv.f
- int UNUSED written = abuf->written;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
-
- CPU (h_cond) = OPRND (condbit);
- * FLD (i_dr) = OPRND (dr);
-
-#undef OPRND
-#undef FLD
- }
- NEXT (vpc);
-
- CASE (sem, INSN_PAR_ADDX) : /* addx $dr,$sr */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_add.f
-#define OPRND(f) par_exec->operands.sfmt_addx.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- SI temp0;BI temp1;
- temp0 = ADDCSI (* FLD (i_dr), * FLD (i_sr), CPU (h_cond));
- temp1 = ADDCFSI (* FLD (i_dr), * FLD (i_sr), CPU (h_cond));
- {
- SI opval = temp0;
- OPRND (dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
- {
- BI opval = temp1;
- OPRND (condbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
- }
-}
-
-#undef OPRND
-#undef FLD
-}
- NEXT (vpc);
-
-CASE (sem, INSN_WRITE_ADDX) : /* addx $dr,$sr */
- {
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
-#define FLD(f) abuf->fields.sfmt_add.f
-#define OPRND(f) par_exec->operands.sfmt_addx.f
- int UNUSED written = abuf->written;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
-
- CPU (h_cond) = OPRND (condbit);
- * FLD (i_dr) = OPRND (dr);
-
-#undef OPRND
-#undef FLD
- }
- NEXT (vpc);
-
- CASE (sem, INSN_PAR_BC8) : /* bc.s $disp8 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_bl8.f
-#define OPRND(f) par_exec->operands.sfmt_bc8.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-if (CPU (h_cond)) {
- {
- USI opval = FLD (i_disp8);
- OPRND (pc) = opval;
- written |= (1 << 2);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- abuf->written = written;
-#undef OPRND
-#undef FLD
-}
- NEXT (vpc);
-
-CASE (sem, INSN_WRITE_BC8) : /* bc.s $disp8 */
- {
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
-#define FLD(f) abuf->fields.sfmt_bl8.f
-#define OPRND(f) par_exec->operands.sfmt_bc8.f
- int UNUSED written = abuf->written;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
-
- if (written & (1 << 2))
- {
- SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc);
- }
-
- SEM_BRANCH_FINI (vpc);
-#undef OPRND
-#undef FLD
- }
- NEXT (vpc);
-
- CASE (sem, INSN_PAR_BL8) : /* bl.s $disp8 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_bl8.f
-#define OPRND(f) par_exec->operands.sfmt_bl8.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- {
- SI opval = ADDSI (ANDSI (pc, -4), 4);
- OPRND (h_gr_14) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
- {
- USI opval = FLD (i_disp8);
- OPRND (pc) = opval;
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
-#undef OPRND
-#undef FLD
-}
- NEXT (vpc);
-
-CASE (sem, INSN_WRITE_BL8) : /* bl.s $disp8 */
- {
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
-#define FLD(f) abuf->fields.sfmt_bl8.f
-#define OPRND(f) par_exec->operands.sfmt_bl8.f
- int UNUSED written = abuf->written;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
-
- CPU (h_gr[((UINT) 14)]) = OPRND (h_gr_14);
- SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc);
-
- SEM_BRANCH_FINI (vpc);
-#undef OPRND
-#undef FLD
- }
- NEXT (vpc);
-
- CASE (sem, INSN_PAR_BCL8) : /* bcl.s $disp8 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_bl8.f
-#define OPRND(f) par_exec->operands.sfmt_bcl8.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-if (CPU (h_cond)) {
-{
- {
- SI opval = ADDSI (ANDSI (pc, -4), 4);
- OPRND (h_gr_14) = opval;
- written |= (1 << 3);
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
- {
- USI opval = FLD (i_disp8);
- OPRND (pc) = opval;
- written |= (1 << 4);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-}
-
- abuf->written = written;
-#undef OPRND
-#undef FLD
-}
- NEXT (vpc);
-
-CASE (sem, INSN_WRITE_BCL8) : /* bcl.s $disp8 */
- {
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
-#define FLD(f) abuf->fields.sfmt_bl8.f
-#define OPRND(f) par_exec->operands.sfmt_bcl8.f
- int UNUSED written = abuf->written;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
-
- if (written & (1 << 3))
- {
- CPU (h_gr[((UINT) 14)]) = OPRND (h_gr_14);
- }
- if (written & (1 << 4))
- {
- SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc);
- }
-
- SEM_BRANCH_FINI (vpc);
-#undef OPRND
-#undef FLD
- }
- NEXT (vpc);
-
- CASE (sem, INSN_PAR_BNC8) : /* bnc.s $disp8 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_bl8.f
-#define OPRND(f) par_exec->operands.sfmt_bc8.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-if (NOTBI (CPU (h_cond))) {
- {
- USI opval = FLD (i_disp8);
- OPRND (pc) = opval;
- written |= (1 << 2);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- abuf->written = written;
-#undef OPRND
-#undef FLD
-}
- NEXT (vpc);
-
-CASE (sem, INSN_WRITE_BNC8) : /* bnc.s $disp8 */
- {
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
-#define FLD(f) abuf->fields.sfmt_bl8.f
-#define OPRND(f) par_exec->operands.sfmt_bc8.f
- int UNUSED written = abuf->written;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
-
- if (written & (1 << 2))
- {
- SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc);
- }
-
- SEM_BRANCH_FINI (vpc);
-#undef OPRND
-#undef FLD
- }
- NEXT (vpc);
-
- CASE (sem, INSN_PAR_BRA8) : /* bra.s $disp8 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_bl8.f
-#define OPRND(f) par_exec->operands.sfmt_bra8.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- USI opval = FLD (i_disp8);
- OPRND (pc) = opval;
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-
-#undef OPRND
-#undef FLD
-}
- NEXT (vpc);
-
-CASE (sem, INSN_WRITE_BRA8) : /* bra.s $disp8 */
- {
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
-#define FLD(f) abuf->fields.sfmt_bl8.f
-#define OPRND(f) par_exec->operands.sfmt_bra8.f
- int UNUSED written = abuf->written;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
-
- SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc);
-
- SEM_BRANCH_FINI (vpc);
-#undef OPRND
-#undef FLD
- }
- NEXT (vpc);
-
- CASE (sem, INSN_PAR_BNCL8) : /* bncl.s $disp8 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_bl8.f
-#define OPRND(f) par_exec->operands.sfmt_bcl8.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-if (NOTBI (CPU (h_cond))) {
-{
- {
- SI opval = ADDSI (ANDSI (pc, -4), 4);
- OPRND (h_gr_14) = opval;
- written |= (1 << 3);
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
- {
- USI opval = FLD (i_disp8);
- OPRND (pc) = opval;
- written |= (1 << 4);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-}
-
- abuf->written = written;
-#undef OPRND
-#undef FLD
-}
- NEXT (vpc);
-
-CASE (sem, INSN_WRITE_BNCL8) : /* bncl.s $disp8 */
- {
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
-#define FLD(f) abuf->fields.sfmt_bl8.f
-#define OPRND(f) par_exec->operands.sfmt_bcl8.f
- int UNUSED written = abuf->written;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
-
- if (written & (1 << 3))
- {
- CPU (h_gr[((UINT) 14)]) = OPRND (h_gr_14);
- }
- if (written & (1 << 4))
- {
- SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc);
- }
-
- SEM_BRANCH_FINI (vpc);
-#undef OPRND
-#undef FLD
- }
- NEXT (vpc);
-
- CASE (sem, INSN_PAR_CMP) : /* cmp $src1,$src2 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_st_plus.f
-#define OPRND(f) par_exec->operands.sfmt_cmp.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- BI opval = LTSI (* FLD (i_src1), * FLD (i_src2));
- OPRND (condbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
- }
-
-#undef OPRND
-#undef FLD
-}
- NEXT (vpc);
-
-CASE (sem, INSN_WRITE_CMP) : /* cmp $src1,$src2 */
- {
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
-#define FLD(f) abuf->fields.sfmt_st_plus.f
-#define OPRND(f) par_exec->operands.sfmt_cmp.f
- int UNUSED written = abuf->written;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
-
- CPU (h_cond) = OPRND (condbit);
-
-#undef OPRND
-#undef FLD
- }
- NEXT (vpc);
-
- CASE (sem, INSN_PAR_CMPU) : /* cmpu $src1,$src2 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_st_plus.f
-#define OPRND(f) par_exec->operands.sfmt_cmp.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- BI opval = LTUSI (* FLD (i_src1), * FLD (i_src2));
- OPRND (condbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
- }
-
-#undef OPRND
-#undef FLD
-}
- NEXT (vpc);
-
-CASE (sem, INSN_WRITE_CMPU) : /* cmpu $src1,$src2 */
- {
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
-#define FLD(f) abuf->fields.sfmt_st_plus.f
-#define OPRND(f) par_exec->operands.sfmt_cmp.f
- int UNUSED written = abuf->written;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
-
- CPU (h_cond) = OPRND (condbit);
-
-#undef OPRND
-#undef FLD
- }
- NEXT (vpc);
-
- CASE (sem, INSN_PAR_CMPEQ) : /* cmpeq $src1,$src2 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_st_plus.f
-#define OPRND(f) par_exec->operands.sfmt_cmp.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- BI opval = EQSI (* FLD (i_src1), * FLD (i_src2));
- OPRND (condbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
- }
-
-#undef OPRND
-#undef FLD
-}
- NEXT (vpc);
-
-CASE (sem, INSN_WRITE_CMPEQ) : /* cmpeq $src1,$src2 */
- {
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
-#define FLD(f) abuf->fields.sfmt_st_plus.f
-#define OPRND(f) par_exec->operands.sfmt_cmp.f
- int UNUSED written = abuf->written;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
-
- CPU (h_cond) = OPRND (condbit);
-
-#undef OPRND
-#undef FLD
- }
- NEXT (vpc);
-
- CASE (sem, INSN_PAR_CMPZ) : /* cmpz $src2 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_st_plus.f
-#define OPRND(f) par_exec->operands.sfmt_cmpz.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- BI opval = EQSI (* FLD (i_src2), 0);
- OPRND (condbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
- }
-
-#undef OPRND
-#undef FLD
-}
- NEXT (vpc);
-
-CASE (sem, INSN_WRITE_CMPZ) : /* cmpz $src2 */
- {
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
-#define FLD(f) abuf->fields.sfmt_st_plus.f
-#define OPRND(f) par_exec->operands.sfmt_cmpz.f
- int UNUSED written = abuf->written;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
-
- CPU (h_cond) = OPRND (condbit);
-
-#undef OPRND
-#undef FLD
- }
- NEXT (vpc);
-
- CASE (sem, INSN_PAR_JC) : /* jc $sr */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_jl.f
-#define OPRND(f) par_exec->operands.sfmt_jc.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-if (CPU (h_cond)) {
- {
- USI opval = ANDSI (* FLD (i_sr), -4);
- OPRND (pc) = opval;
- written |= (1 << 2);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- abuf->written = written;
-#undef OPRND
-#undef FLD
-}
- NEXT (vpc);
-
-CASE (sem, INSN_WRITE_JC) : /* jc $sr */
- {
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
-#define FLD(f) abuf->fields.sfmt_jl.f
-#define OPRND(f) par_exec->operands.sfmt_jc.f
- int UNUSED written = abuf->written;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
-
- if (written & (1 << 2))
- {
- SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc);
- }
-
- SEM_BRANCH_FINI (vpc);
-#undef OPRND
-#undef FLD
- }
- NEXT (vpc);
-
- CASE (sem, INSN_PAR_JNC) : /* jnc $sr */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_jl.f
-#define OPRND(f) par_exec->operands.sfmt_jc.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-if (NOTBI (CPU (h_cond))) {
- {
- USI opval = ANDSI (* FLD (i_sr), -4);
- OPRND (pc) = opval;
- written |= (1 << 2);
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
- abuf->written = written;
-#undef OPRND
-#undef FLD
-}
- NEXT (vpc);
-
-CASE (sem, INSN_WRITE_JNC) : /* jnc $sr */
- {
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
-#define FLD(f) abuf->fields.sfmt_jl.f
-#define OPRND(f) par_exec->operands.sfmt_jc.f
- int UNUSED written = abuf->written;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
-
- if (written & (1 << 2))
- {
- SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc);
- }
-
- SEM_BRANCH_FINI (vpc);
-#undef OPRND
-#undef FLD
- }
- NEXT (vpc);
-
- CASE (sem, INSN_PAR_JL) : /* jl $sr */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_jl.f
-#define OPRND(f) par_exec->operands.sfmt_jl.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- SI temp0;USI temp1;
- temp0 = ADDSI (ANDSI (pc, -4), 4);
- temp1 = ANDSI (* FLD (i_sr), -4);
- {
- SI opval = temp0;
- OPRND (h_gr_14) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
- {
- USI opval = temp1;
- OPRND (pc) = opval;
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
-#undef OPRND
-#undef FLD
-}
- NEXT (vpc);
-
-CASE (sem, INSN_WRITE_JL) : /* jl $sr */
- {
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
-#define FLD(f) abuf->fields.sfmt_jl.f
-#define OPRND(f) par_exec->operands.sfmt_jl.f
- int UNUSED written = abuf->written;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
-
- CPU (h_gr[((UINT) 14)]) = OPRND (h_gr_14);
- SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc);
-
- SEM_BRANCH_FINI (vpc);
-#undef OPRND
-#undef FLD
- }
- NEXT (vpc);
-
- CASE (sem, INSN_PAR_JMP) : /* jmp $sr */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_jl.f
-#define OPRND(f) par_exec->operands.sfmt_jmp.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- USI opval = ANDSI (* FLD (i_sr), -4);
- OPRND (pc) = opval;
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-
-#undef OPRND
-#undef FLD
-}
- NEXT (vpc);
-
-CASE (sem, INSN_WRITE_JMP) : /* jmp $sr */
- {
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
-#define FLD(f) abuf->fields.sfmt_jl.f
-#define OPRND(f) par_exec->operands.sfmt_jmp.f
- int UNUSED written = abuf->written;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
-
- SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc);
-
- SEM_BRANCH_FINI (vpc);
-#undef OPRND
-#undef FLD
- }
- NEXT (vpc);
-
- CASE (sem, INSN_PAR_LD) : /* ld $dr,@$sr */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_ld_plus.f
-#define OPRND(f) par_exec->operands.sfmt_ld.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = GETMEMSI (current_cpu, pc, * FLD (i_sr));
- OPRND (dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
-#undef OPRND
-#undef FLD
-}
- NEXT (vpc);
-
-CASE (sem, INSN_WRITE_LD) : /* ld $dr,@$sr */
- {
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
-#define FLD(f) abuf->fields.sfmt_ld_plus.f
-#define OPRND(f) par_exec->operands.sfmt_ld.f
- int UNUSED written = abuf->written;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
-
- * FLD (i_dr) = OPRND (dr);
-
-#undef OPRND
-#undef FLD
- }
- NEXT (vpc);
-
- CASE (sem, INSN_PAR_LDB) : /* ldb $dr,@$sr */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_ld_plus.f
-#define OPRND(f) par_exec->operands.sfmt_ld.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = EXTQISI (GETMEMQI (current_cpu, pc, * FLD (i_sr)));
- OPRND (dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
-#undef OPRND
-#undef FLD
-}
- NEXT (vpc);
-
-CASE (sem, INSN_WRITE_LDB) : /* ldb $dr,@$sr */
- {
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
-#define FLD(f) abuf->fields.sfmt_ld_plus.f
-#define OPRND(f) par_exec->operands.sfmt_ld.f
- int UNUSED written = abuf->written;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
-
- * FLD (i_dr) = OPRND (dr);
-
-#undef OPRND
-#undef FLD
- }
- NEXT (vpc);
-
- CASE (sem, INSN_PAR_LDH) : /* ldh $dr,@$sr */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_ld_plus.f
-#define OPRND(f) par_exec->operands.sfmt_ld.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = EXTHISI (GETMEMHI (current_cpu, pc, * FLD (i_sr)));
- OPRND (dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
-#undef OPRND
-#undef FLD
-}
- NEXT (vpc);
-
-CASE (sem, INSN_WRITE_LDH) : /* ldh $dr,@$sr */
- {
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
-#define FLD(f) abuf->fields.sfmt_ld_plus.f
-#define OPRND(f) par_exec->operands.sfmt_ld.f
- int UNUSED written = abuf->written;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
-
- * FLD (i_dr) = OPRND (dr);
-
-#undef OPRND
-#undef FLD
- }
- NEXT (vpc);
-
- CASE (sem, INSN_PAR_LDUB) : /* ldub $dr,@$sr */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_ld_plus.f
-#define OPRND(f) par_exec->operands.sfmt_ld.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = ZEXTQISI (GETMEMQI (current_cpu, pc, * FLD (i_sr)));
- OPRND (dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
-#undef OPRND
-#undef FLD
-}
- NEXT (vpc);
-
-CASE (sem, INSN_WRITE_LDUB) : /* ldub $dr,@$sr */
- {
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
-#define FLD(f) abuf->fields.sfmt_ld_plus.f
-#define OPRND(f) par_exec->operands.sfmt_ld.f
- int UNUSED written = abuf->written;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
-
- * FLD (i_dr) = OPRND (dr);
-
-#undef OPRND
-#undef FLD
- }
- NEXT (vpc);
-
- CASE (sem, INSN_PAR_LDUH) : /* lduh $dr,@$sr */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_ld_plus.f
-#define OPRND(f) par_exec->operands.sfmt_ld.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = ZEXTHISI (GETMEMHI (current_cpu, pc, * FLD (i_sr)));
- OPRND (dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
-#undef OPRND
-#undef FLD
-}
- NEXT (vpc);
-
-CASE (sem, INSN_WRITE_LDUH) : /* lduh $dr,@$sr */
- {
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
-#define FLD(f) abuf->fields.sfmt_ld_plus.f
-#define OPRND(f) par_exec->operands.sfmt_ld.f
- int UNUSED written = abuf->written;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
-
- * FLD (i_dr) = OPRND (dr);
-
-#undef OPRND
-#undef FLD
- }
- NEXT (vpc);
-
- CASE (sem, INSN_PAR_LD_PLUS) : /* ld $dr,@$sr+ */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_ld_plus.f
-#define OPRND(f) par_exec->operands.sfmt_ld_plus.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- SI temp0;SI temp1;
- temp0 = GETMEMSI (current_cpu, pc, * FLD (i_sr));
- temp1 = ADDSI (* FLD (i_sr), 4);
- {
- SI opval = temp0;
- OPRND (dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
- {
- SI opval = temp1;
- OPRND (sr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-}
-
-#undef OPRND
-#undef FLD
-}
- NEXT (vpc);
-
-CASE (sem, INSN_WRITE_LD_PLUS) : /* ld $dr,@$sr+ */
- {
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
-#define FLD(f) abuf->fields.sfmt_ld_plus.f
-#define OPRND(f) par_exec->operands.sfmt_ld_plus.f
- int UNUSED written = abuf->written;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
-
- * FLD (i_dr) = OPRND (dr);
- * FLD (i_sr) = OPRND (sr);
-
-#undef OPRND
-#undef FLD
- }
- NEXT (vpc);
-
- CASE (sem, INSN_PAR_LDI8) : /* ldi8 $dr,$simm8 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_addi.f
-#define OPRND(f) par_exec->operands.sfmt_ldi8.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = FLD (f_simm8);
- OPRND (dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
-#undef OPRND
-#undef FLD
-}
- NEXT (vpc);
-
-CASE (sem, INSN_WRITE_LDI8) : /* ldi8 $dr,$simm8 */
- {
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
-#define FLD(f) abuf->fields.sfmt_addi.f
-#define OPRND(f) par_exec->operands.sfmt_ldi8.f
- int UNUSED written = abuf->written;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
-
- * FLD (i_dr) = OPRND (dr);
-
-#undef OPRND
-#undef FLD
- }
- NEXT (vpc);
-
- CASE (sem, INSN_PAR_LOCK) : /* lock $dr,@$sr */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_ld_plus.f
-#define OPRND(f) par_exec->operands.sfmt_lock.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- {
- BI opval = 1;
- OPRND (h_lock) = opval;
- TRACE_RESULT (current_cpu, abuf, "lock", 'x', opval);
- }
- {
- SI opval = GETMEMSI (current_cpu, pc, * FLD (i_sr));
- OPRND (dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-}
-
-#undef OPRND
-#undef FLD
-}
- NEXT (vpc);
-
-CASE (sem, INSN_WRITE_LOCK) : /* lock $dr,@$sr */
- {
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
-#define FLD(f) abuf->fields.sfmt_ld_plus.f
-#define OPRND(f) par_exec->operands.sfmt_lock.f
- int UNUSED written = abuf->written;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
-
- * FLD (i_dr) = OPRND (dr);
- CPU (h_lock) = OPRND (h_lock);
-
-#undef OPRND
-#undef FLD
- }
- NEXT (vpc);
-
- CASE (sem, INSN_PAR_MACHI_A) : /* machi $src1,$src2,$acc */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_machi_a.f
-#define OPRND(f) par_exec->operands.sfmt_machi_a.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- DI opval = SRADI (SLLDI (ADDDI (GET_H_ACCUMS (FLD (f_acc)), MULDI (EXTSIDI (ANDSI (* FLD (i_src1), 0xffff0000)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16))))), 8), 8);
- OPRND (acc) = opval;
- TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
- }
-
-#undef OPRND
-#undef FLD
-}
- NEXT (vpc);
-
-CASE (sem, INSN_WRITE_MACHI_A) : /* machi $src1,$src2,$acc */
- {
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
-#define FLD(f) abuf->fields.sfmt_machi_a.f
-#define OPRND(f) par_exec->operands.sfmt_machi_a.f
- int UNUSED written = abuf->written;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
-
- SET_H_ACCUMS (FLD (f_acc), OPRND (acc));
-
-#undef OPRND
-#undef FLD
- }
- NEXT (vpc);
-
- CASE (sem, INSN_PAR_MACLO_A) : /* maclo $src1,$src2,$acc */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_machi_a.f
-#define OPRND(f) par_exec->operands.sfmt_machi_a.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- DI opval = SRADI (SLLDI (ADDDI (GET_H_ACCUMS (FLD (f_acc)), MULDI (EXTSIDI (SLLSI (* FLD (i_src1), 16)), EXTHIDI (TRUNCSIHI (* FLD (i_src2))))), 8), 8);
- OPRND (acc) = opval;
- TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
- }
-
-#undef OPRND
-#undef FLD
-}
- NEXT (vpc);
-
-CASE (sem, INSN_WRITE_MACLO_A) : /* maclo $src1,$src2,$acc */
- {
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
-#define FLD(f) abuf->fields.sfmt_machi_a.f
-#define OPRND(f) par_exec->operands.sfmt_machi_a.f
- int UNUSED written = abuf->written;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
-
- SET_H_ACCUMS (FLD (f_acc), OPRND (acc));
-
-#undef OPRND
-#undef FLD
- }
- NEXT (vpc);
-
- CASE (sem, INSN_PAR_MACWHI_A) : /* macwhi $src1,$src2,$acc */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_machi_a.f
-#define OPRND(f) par_exec->operands.sfmt_machi_a.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- DI opval = ADDDI (GET_H_ACCUMS (FLD (f_acc)), MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16)))));
- OPRND (acc) = opval;
- TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
- }
-
-#undef OPRND
-#undef FLD
-}
- NEXT (vpc);
-
-CASE (sem, INSN_WRITE_MACWHI_A) : /* macwhi $src1,$src2,$acc */
- {
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
-#define FLD(f) abuf->fields.sfmt_machi_a.f
-#define OPRND(f) par_exec->operands.sfmt_machi_a.f
- int UNUSED written = abuf->written;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
-
- SET_H_ACCUMS (FLD (f_acc), OPRND (acc));
-
-#undef OPRND
-#undef FLD
- }
- NEXT (vpc);
-
- CASE (sem, INSN_PAR_MACWLO_A) : /* macwlo $src1,$src2,$acc */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_machi_a.f
-#define OPRND(f) par_exec->operands.sfmt_machi_a.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- DI opval = ADDDI (GET_H_ACCUMS (FLD (f_acc)), MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (* FLD (i_src2)))));
- OPRND (acc) = opval;
- TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
- }
-
-#undef OPRND
-#undef FLD
-}
- NEXT (vpc);
-
-CASE (sem, INSN_WRITE_MACWLO_A) : /* macwlo $src1,$src2,$acc */
- {
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
-#define FLD(f) abuf->fields.sfmt_machi_a.f
-#define OPRND(f) par_exec->operands.sfmt_machi_a.f
- int UNUSED written = abuf->written;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
-
- SET_H_ACCUMS (FLD (f_acc), OPRND (acc));
-
-#undef OPRND
-#undef FLD
- }
- NEXT (vpc);
-
- CASE (sem, INSN_PAR_MUL) : /* mul $dr,$sr */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_add.f
-#define OPRND(f) par_exec->operands.sfmt_add.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = MULSI (* FLD (i_dr), * FLD (i_sr));
- OPRND (dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
-#undef OPRND
-#undef FLD
-}
- NEXT (vpc);
-
-CASE (sem, INSN_WRITE_MUL) : /* mul $dr,$sr */
- {
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
-#define FLD(f) abuf->fields.sfmt_add.f
-#define OPRND(f) par_exec->operands.sfmt_add.f
- int UNUSED written = abuf->written;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
-
- * FLD (i_dr) = OPRND (dr);
-
-#undef OPRND
-#undef FLD
- }
- NEXT (vpc);
-
- CASE (sem, INSN_PAR_MULHI_A) : /* mulhi $src1,$src2,$acc */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_machi_a.f
-#define OPRND(f) par_exec->operands.sfmt_mulhi_a.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- DI opval = SRADI (SLLDI (MULDI (EXTSIDI (ANDSI (* FLD (i_src1), 0xffff0000)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16)))), 16), 16);
- OPRND (acc) = opval;
- TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
- }
-
-#undef OPRND
-#undef FLD
-}
- NEXT (vpc);
-
-CASE (sem, INSN_WRITE_MULHI_A) : /* mulhi $src1,$src2,$acc */
- {
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
-#define FLD(f) abuf->fields.sfmt_machi_a.f
-#define OPRND(f) par_exec->operands.sfmt_mulhi_a.f
- int UNUSED written = abuf->written;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
-
- SET_H_ACCUMS (FLD (f_acc), OPRND (acc));
-
-#undef OPRND
-#undef FLD
- }
- NEXT (vpc);
-
- CASE (sem, INSN_PAR_MULLO_A) : /* mullo $src1,$src2,$acc */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_machi_a.f
-#define OPRND(f) par_exec->operands.sfmt_mulhi_a.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- DI opval = SRADI (SLLDI (MULDI (EXTSIDI (SLLSI (* FLD (i_src1), 16)), EXTHIDI (TRUNCSIHI (* FLD (i_src2)))), 16), 16);
- OPRND (acc) = opval;
- TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
- }
-
-#undef OPRND
-#undef FLD
-}
- NEXT (vpc);
-
-CASE (sem, INSN_WRITE_MULLO_A) : /* mullo $src1,$src2,$acc */
- {
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
-#define FLD(f) abuf->fields.sfmt_machi_a.f
-#define OPRND(f) par_exec->operands.sfmt_mulhi_a.f
- int UNUSED written = abuf->written;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
-
- SET_H_ACCUMS (FLD (f_acc), OPRND (acc));
-
-#undef OPRND
-#undef FLD
- }
- NEXT (vpc);
-
- CASE (sem, INSN_PAR_MULWHI_A) : /* mulwhi $src1,$src2,$acc */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_machi_a.f
-#define OPRND(f) par_exec->operands.sfmt_mulhi_a.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- DI opval = MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16))));
- OPRND (acc) = opval;
- TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
- }
-
-#undef OPRND
-#undef FLD
-}
- NEXT (vpc);
-
-CASE (sem, INSN_WRITE_MULWHI_A) : /* mulwhi $src1,$src2,$acc */
- {
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
-#define FLD(f) abuf->fields.sfmt_machi_a.f
-#define OPRND(f) par_exec->operands.sfmt_mulhi_a.f
- int UNUSED written = abuf->written;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
-
- SET_H_ACCUMS (FLD (f_acc), OPRND (acc));
-
-#undef OPRND
-#undef FLD
- }
- NEXT (vpc);
-
- CASE (sem, INSN_PAR_MULWLO_A) : /* mulwlo $src1,$src2,$acc */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_machi_a.f
-#define OPRND(f) par_exec->operands.sfmt_mulhi_a.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- DI opval = MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (* FLD (i_src2))));
- OPRND (acc) = opval;
- TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
- }
-
-#undef OPRND
-#undef FLD
-}
- NEXT (vpc);
-
-CASE (sem, INSN_WRITE_MULWLO_A) : /* mulwlo $src1,$src2,$acc */
- {
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
-#define FLD(f) abuf->fields.sfmt_machi_a.f
-#define OPRND(f) par_exec->operands.sfmt_mulhi_a.f
- int UNUSED written = abuf->written;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
-
- SET_H_ACCUMS (FLD (f_acc), OPRND (acc));
-
-#undef OPRND
-#undef FLD
- }
- NEXT (vpc);
-
- CASE (sem, INSN_PAR_MV) : /* mv $dr,$sr */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_ld_plus.f
-#define OPRND(f) par_exec->operands.sfmt_mv.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = * FLD (i_sr);
- OPRND (dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
-#undef OPRND
-#undef FLD
-}
- NEXT (vpc);
-
-CASE (sem, INSN_WRITE_MV) : /* mv $dr,$sr */
- {
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
-#define FLD(f) abuf->fields.sfmt_ld_plus.f
-#define OPRND(f) par_exec->operands.sfmt_mv.f
- int UNUSED written = abuf->written;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
-
- * FLD (i_dr) = OPRND (dr);
-
-#undef OPRND
-#undef FLD
- }
- NEXT (vpc);
-
- CASE (sem, INSN_PAR_MVFACHI_A) : /* mvfachi $dr,$accs */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_mvfachi_a.f
-#define OPRND(f) par_exec->operands.sfmt_mvfachi_a.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = TRUNCDISI (SRADI (GET_H_ACCUMS (FLD (f_accs)), 32));
- OPRND (dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
-#undef OPRND
-#undef FLD
-}
- NEXT (vpc);
-
-CASE (sem, INSN_WRITE_MVFACHI_A) : /* mvfachi $dr,$accs */
- {
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
-#define FLD(f) abuf->fields.sfmt_mvfachi_a.f
-#define OPRND(f) par_exec->operands.sfmt_mvfachi_a.f
- int UNUSED written = abuf->written;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
-
- * FLD (i_dr) = OPRND (dr);
-
-#undef OPRND
-#undef FLD
- }
- NEXT (vpc);
-
- CASE (sem, INSN_PAR_MVFACLO_A) : /* mvfaclo $dr,$accs */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_mvfachi_a.f
-#define OPRND(f) par_exec->operands.sfmt_mvfachi_a.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = TRUNCDISI (GET_H_ACCUMS (FLD (f_accs)));
- OPRND (dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
-#undef OPRND
-#undef FLD
-}
- NEXT (vpc);
-
-CASE (sem, INSN_WRITE_MVFACLO_A) : /* mvfaclo $dr,$accs */
- {
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
-#define FLD(f) abuf->fields.sfmt_mvfachi_a.f
-#define OPRND(f) par_exec->operands.sfmt_mvfachi_a.f
- int UNUSED written = abuf->written;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
-
- * FLD (i_dr) = OPRND (dr);
-
-#undef OPRND
-#undef FLD
- }
- NEXT (vpc);
-
- CASE (sem, INSN_PAR_MVFACMI_A) : /* mvfacmi $dr,$accs */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_mvfachi_a.f
-#define OPRND(f) par_exec->operands.sfmt_mvfachi_a.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = TRUNCDISI (SRADI (GET_H_ACCUMS (FLD (f_accs)), 16));
- OPRND (dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
-#undef OPRND
-#undef FLD
-}
- NEXT (vpc);
-
-CASE (sem, INSN_WRITE_MVFACMI_A) : /* mvfacmi $dr,$accs */
- {
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
-#define FLD(f) abuf->fields.sfmt_mvfachi_a.f
-#define OPRND(f) par_exec->operands.sfmt_mvfachi_a.f
- int UNUSED written = abuf->written;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
-
- * FLD (i_dr) = OPRND (dr);
-
-#undef OPRND
-#undef FLD
- }
- NEXT (vpc);
-
- CASE (sem, INSN_PAR_MVFC) : /* mvfc $dr,$scr */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_ld_plus.f
-#define OPRND(f) par_exec->operands.sfmt_mvfc.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = GET_H_CR (FLD (f_r2));
- OPRND (dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
-#undef OPRND
-#undef FLD
-}
- NEXT (vpc);
-
-CASE (sem, INSN_WRITE_MVFC) : /* mvfc $dr,$scr */
- {
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
-#define FLD(f) abuf->fields.sfmt_ld_plus.f
-#define OPRND(f) par_exec->operands.sfmt_mvfc.f
- int UNUSED written = abuf->written;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
-
- * FLD (i_dr) = OPRND (dr);
-
-#undef OPRND
-#undef FLD
- }
- NEXT (vpc);
-
- CASE (sem, INSN_PAR_MVTACHI_A) : /* mvtachi $src1,$accs */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_mvtachi_a.f
-#define OPRND(f) par_exec->operands.sfmt_mvtachi_a.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- DI opval = ORDI (ANDDI (GET_H_ACCUMS (FLD (f_accs)), MAKEDI (0, 0xffffffff)), SLLDI (EXTSIDI (* FLD (i_src1)), 32));
- OPRND (accs) = opval;
- TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
- }
-
-#undef OPRND
-#undef FLD
-}
- NEXT (vpc);
-
-CASE (sem, INSN_WRITE_MVTACHI_A) : /* mvtachi $src1,$accs */
- {
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
-#define FLD(f) abuf->fields.sfmt_mvtachi_a.f
-#define OPRND(f) par_exec->operands.sfmt_mvtachi_a.f
- int UNUSED written = abuf->written;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
-
- SET_H_ACCUMS (FLD (f_accs), OPRND (accs));
-
-#undef OPRND
-#undef FLD
- }
- NEXT (vpc);
-
- CASE (sem, INSN_PAR_MVTACLO_A) : /* mvtaclo $src1,$accs */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_mvtachi_a.f
-#define OPRND(f) par_exec->operands.sfmt_mvtachi_a.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- DI opval = ORDI (ANDDI (GET_H_ACCUMS (FLD (f_accs)), MAKEDI (0xffffffff, 0)), ZEXTSIDI (* FLD (i_src1)));
- OPRND (accs) = opval;
- TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
- }
-
-#undef OPRND
-#undef FLD
-}
- NEXT (vpc);
-
-CASE (sem, INSN_WRITE_MVTACLO_A) : /* mvtaclo $src1,$accs */
- {
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
-#define FLD(f) abuf->fields.sfmt_mvtachi_a.f
-#define OPRND(f) par_exec->operands.sfmt_mvtachi_a.f
- int UNUSED written = abuf->written;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
-
- SET_H_ACCUMS (FLD (f_accs), OPRND (accs));
-
-#undef OPRND
-#undef FLD
- }
- NEXT (vpc);
-
- CASE (sem, INSN_PAR_MVTC) : /* mvtc $sr,$dcr */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_ld_plus.f
-#define OPRND(f) par_exec->operands.sfmt_mvtc.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- USI opval = * FLD (i_sr);
- OPRND (dcr) = opval;
- TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval);
- }
-
-#undef OPRND
-#undef FLD
-}
- NEXT (vpc);
-
-CASE (sem, INSN_WRITE_MVTC) : /* mvtc $sr,$dcr */
- {
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
-#define FLD(f) abuf->fields.sfmt_ld_plus.f
-#define OPRND(f) par_exec->operands.sfmt_mvtc.f
- int UNUSED written = abuf->written;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
-
- SET_H_CR (FLD (f_r1), OPRND (dcr));
-
-#undef OPRND
-#undef FLD
- }
- NEXT (vpc);
-
- CASE (sem, INSN_PAR_NEG) : /* neg $dr,$sr */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_ld_plus.f
-#define OPRND(f) par_exec->operands.sfmt_mv.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = NEGSI (* FLD (i_sr));
- OPRND (dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
-#undef OPRND
-#undef FLD
-}
- NEXT (vpc);
-
-CASE (sem, INSN_WRITE_NEG) : /* neg $dr,$sr */
- {
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
-#define FLD(f) abuf->fields.sfmt_ld_plus.f
-#define OPRND(f) par_exec->operands.sfmt_mv.f
- int UNUSED written = abuf->written;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
-
- * FLD (i_dr) = OPRND (dr);
-
-#undef OPRND
-#undef FLD
- }
- NEXT (vpc);
-
- CASE (sem, INSN_PAR_NOP) : /* nop */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_empty.f
-#define OPRND(f) par_exec->operands.sfmt_nop.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-PROFILE_COUNT_FILLNOPS (current_cpu, abuf->addr);
-
-#undef OPRND
-#undef FLD
-}
- NEXT (vpc);
-
-CASE (sem, INSN_WRITE_NOP) : /* nop */
- {
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
-#define FLD(f) abuf->fields.fmt_empty.f
-#define OPRND(f) par_exec->operands.sfmt_nop.f
- int UNUSED written = abuf->written;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
-
-
-#undef OPRND
-#undef FLD
- }
- NEXT (vpc);
-
- CASE (sem, INSN_PAR_NOT) : /* not $dr,$sr */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_ld_plus.f
-#define OPRND(f) par_exec->operands.sfmt_mv.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = INVSI (* FLD (i_sr));
- OPRND (dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
-#undef OPRND
-#undef FLD
-}
- NEXT (vpc);
-
-CASE (sem, INSN_WRITE_NOT) : /* not $dr,$sr */
- {
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
-#define FLD(f) abuf->fields.sfmt_ld_plus.f
-#define OPRND(f) par_exec->operands.sfmt_mv.f
- int UNUSED written = abuf->written;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
-
- * FLD (i_dr) = OPRND (dr);
-
-#undef OPRND
-#undef FLD
- }
- NEXT (vpc);
-
- CASE (sem, INSN_PAR_RAC_DSI) : /* rac $accd,$accs,$imm1 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_rac_dsi.f
-#define OPRND(f) par_exec->operands.sfmt_rac_dsi.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- DI tmp_tmp1;
- tmp_tmp1 = SLLDI (GET_H_ACCUMS (FLD (f_accs)), FLD (f_imm1));
- tmp_tmp1 = ADDDI (tmp_tmp1, MAKEDI (0, 32768));
- {
- DI opval = (GTDI (tmp_tmp1, MAKEDI (32767, 0xffff0000))) ? (MAKEDI (32767, 0xffff0000)) : (LTDI (tmp_tmp1, MAKEDI (0xffff8000, 0))) ? (MAKEDI (0xffff8000, 0)) : (ANDDI (tmp_tmp1, MAKEDI (0xffffffff, 0xffff0000)));
- OPRND (accd) = opval;
- TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
- }
-}
-
-#undef OPRND
-#undef FLD
-}
- NEXT (vpc);
-
-CASE (sem, INSN_WRITE_RAC_DSI) : /* rac $accd,$accs,$imm1 */
- {
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
-#define FLD(f) abuf->fields.sfmt_rac_dsi.f
-#define OPRND(f) par_exec->operands.sfmt_rac_dsi.f
- int UNUSED written = abuf->written;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
-
- SET_H_ACCUMS (FLD (f_accd), OPRND (accd));
-
-#undef OPRND
-#undef FLD
- }
- NEXT (vpc);
-
- CASE (sem, INSN_PAR_RACH_DSI) : /* rach $accd,$accs,$imm1 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_rac_dsi.f
-#define OPRND(f) par_exec->operands.sfmt_rac_dsi.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- DI tmp_tmp1;
- tmp_tmp1 = SLLDI (GET_H_ACCUMS (FLD (f_accs)), FLD (f_imm1));
- tmp_tmp1 = ADDDI (tmp_tmp1, MAKEDI (0, 0x80000000));
- {
- DI opval = (GTDI (tmp_tmp1, MAKEDI (32767, 0))) ? (MAKEDI (32767, 0)) : (LTDI (tmp_tmp1, MAKEDI (0xffff8000, 0))) ? (MAKEDI (0xffff8000, 0)) : (ANDDI (tmp_tmp1, MAKEDI (0xffffffff, 0)));
- OPRND (accd) = opval;
- TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
- }
-}
-
-#undef OPRND
-#undef FLD
-}
- NEXT (vpc);
-
-CASE (sem, INSN_WRITE_RACH_DSI) : /* rach $accd,$accs,$imm1 */
- {
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
-#define FLD(f) abuf->fields.sfmt_rac_dsi.f
-#define OPRND(f) par_exec->operands.sfmt_rac_dsi.f
- int UNUSED written = abuf->written;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
-
- SET_H_ACCUMS (FLD (f_accd), OPRND (accd));
-
-#undef OPRND
-#undef FLD
- }
- NEXT (vpc);
-
- CASE (sem, INSN_PAR_RTE) : /* rte */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_empty.f
-#define OPRND(f) par_exec->operands.sfmt_rte.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- {
- USI opval = ANDSI (GET_H_CR (((UINT) 6)), -4);
- OPRND (pc) = opval;
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
- {
- USI opval = GET_H_CR (((UINT) 14));
- OPRND (h_cr_6) = opval;
- TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval);
- }
- {
- UQI opval = CPU (h_bpsw);
- OPRND (h_psw) = opval;
- TRACE_RESULT (current_cpu, abuf, "psw", 'x', opval);
- }
- {
- UQI opval = CPU (h_bbpsw);
- OPRND (h_bpsw) = opval;
- TRACE_RESULT (current_cpu, abuf, "bpsw", 'x', opval);
- }
-}
-
-#undef OPRND
-#undef FLD
-}
- NEXT (vpc);
-
-CASE (sem, INSN_WRITE_RTE) : /* rte */
- {
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
-#define FLD(f) abuf->fields.fmt_empty.f
-#define OPRND(f) par_exec->operands.sfmt_rte.f
- int UNUSED written = abuf->written;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
-
- CPU (h_bpsw) = OPRND (h_bpsw);
- SET_H_CR (((UINT) 6), OPRND (h_cr_6));
- SET_H_PSW (OPRND (h_psw));
- SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc);
-
- SEM_BRANCH_FINI (vpc);
-#undef OPRND
-#undef FLD
- }
- NEXT (vpc);
-
- CASE (sem, INSN_PAR_SLL) : /* sll $dr,$sr */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_add.f
-#define OPRND(f) par_exec->operands.sfmt_add.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = SLLSI (* FLD (i_dr), ANDSI (* FLD (i_sr), 31));
- OPRND (dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
-#undef OPRND
-#undef FLD
-}
- NEXT (vpc);
-
-CASE (sem, INSN_WRITE_SLL) : /* sll $dr,$sr */
- {
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
-#define FLD(f) abuf->fields.sfmt_add.f
-#define OPRND(f) par_exec->operands.sfmt_add.f
- int UNUSED written = abuf->written;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
-
- * FLD (i_dr) = OPRND (dr);
-
-#undef OPRND
-#undef FLD
- }
- NEXT (vpc);
-
- CASE (sem, INSN_PAR_SLLI) : /* slli $dr,$uimm5 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_slli.f
-#define OPRND(f) par_exec->operands.sfmt_slli.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = SLLSI (* FLD (i_dr), FLD (f_uimm5));
- OPRND (dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
-#undef OPRND
-#undef FLD
-}
- NEXT (vpc);
-
-CASE (sem, INSN_WRITE_SLLI) : /* slli $dr,$uimm5 */
- {
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
-#define FLD(f) abuf->fields.sfmt_slli.f
-#define OPRND(f) par_exec->operands.sfmt_slli.f
- int UNUSED written = abuf->written;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
-
- * FLD (i_dr) = OPRND (dr);
-
-#undef OPRND
-#undef FLD
- }
- NEXT (vpc);
-
- CASE (sem, INSN_PAR_SRA) : /* sra $dr,$sr */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_add.f
-#define OPRND(f) par_exec->operands.sfmt_add.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = SRASI (* FLD (i_dr), ANDSI (* FLD (i_sr), 31));
- OPRND (dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
-#undef OPRND
-#undef FLD
-}
- NEXT (vpc);
-
-CASE (sem, INSN_WRITE_SRA) : /* sra $dr,$sr */
- {
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
-#define FLD(f) abuf->fields.sfmt_add.f
-#define OPRND(f) par_exec->operands.sfmt_add.f
- int UNUSED written = abuf->written;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
-
- * FLD (i_dr) = OPRND (dr);
-
-#undef OPRND
-#undef FLD
- }
- NEXT (vpc);
-
- CASE (sem, INSN_PAR_SRAI) : /* srai $dr,$uimm5 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_slli.f
-#define OPRND(f) par_exec->operands.sfmt_slli.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = SRASI (* FLD (i_dr), FLD (f_uimm5));
- OPRND (dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
-#undef OPRND
-#undef FLD
-}
- NEXT (vpc);
-
-CASE (sem, INSN_WRITE_SRAI) : /* srai $dr,$uimm5 */
- {
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
-#define FLD(f) abuf->fields.sfmt_slli.f
-#define OPRND(f) par_exec->operands.sfmt_slli.f
- int UNUSED written = abuf->written;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
-
- * FLD (i_dr) = OPRND (dr);
-
-#undef OPRND
-#undef FLD
- }
- NEXT (vpc);
-
- CASE (sem, INSN_PAR_SRL) : /* srl $dr,$sr */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_add.f
-#define OPRND(f) par_exec->operands.sfmt_add.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = SRLSI (* FLD (i_dr), ANDSI (* FLD (i_sr), 31));
- OPRND (dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
-#undef OPRND
-#undef FLD
-}
- NEXT (vpc);
-
-CASE (sem, INSN_WRITE_SRL) : /* srl $dr,$sr */
- {
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
-#define FLD(f) abuf->fields.sfmt_add.f
-#define OPRND(f) par_exec->operands.sfmt_add.f
- int UNUSED written = abuf->written;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
-
- * FLD (i_dr) = OPRND (dr);
-
-#undef OPRND
-#undef FLD
- }
- NEXT (vpc);
-
- CASE (sem, INSN_PAR_SRLI) : /* srli $dr,$uimm5 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_slli.f
-#define OPRND(f) par_exec->operands.sfmt_slli.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = SRLSI (* FLD (i_dr), FLD (f_uimm5));
- OPRND (dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
-#undef OPRND
-#undef FLD
-}
- NEXT (vpc);
-
-CASE (sem, INSN_WRITE_SRLI) : /* srli $dr,$uimm5 */
- {
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
-#define FLD(f) abuf->fields.sfmt_slli.f
-#define OPRND(f) par_exec->operands.sfmt_slli.f
- int UNUSED written = abuf->written;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
-
- * FLD (i_dr) = OPRND (dr);
-
-#undef OPRND
-#undef FLD
- }
- NEXT (vpc);
-
- CASE (sem, INSN_PAR_ST) : /* st $src1,@$src2 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_st_plus.f
-#define OPRND(f) par_exec->operands.sfmt_st.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = * FLD (i_src1);
- OPRND (h_memory_src2_idx) = * FLD (i_src2);
- OPRND (h_memory_src2) = opval;
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-
-#undef OPRND
-#undef FLD
-}
- NEXT (vpc);
-
-CASE (sem, INSN_WRITE_ST) : /* st $src1,@$src2 */
- {
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
-#define FLD(f) abuf->fields.sfmt_st_plus.f
-#define OPRND(f) par_exec->operands.sfmt_st.f
- int UNUSED written = abuf->written;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
-
- SETMEMSI (current_cpu, pc, OPRND (h_memory_src2_idx), OPRND (h_memory_src2));
-
-#undef OPRND
-#undef FLD
- }
- NEXT (vpc);
-
- CASE (sem, INSN_PAR_STB) : /* stb $src1,@$src2 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_st_plus.f
-#define OPRND(f) par_exec->operands.sfmt_stb.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- QI opval = * FLD (i_src1);
- OPRND (h_memory_src2_idx) = * FLD (i_src2);
- OPRND (h_memory_src2) = opval;
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-
-#undef OPRND
-#undef FLD
-}
- NEXT (vpc);
-
-CASE (sem, INSN_WRITE_STB) : /* stb $src1,@$src2 */
- {
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
-#define FLD(f) abuf->fields.sfmt_st_plus.f
-#define OPRND(f) par_exec->operands.sfmt_stb.f
- int UNUSED written = abuf->written;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
-
- SETMEMQI (current_cpu, pc, OPRND (h_memory_src2_idx), OPRND (h_memory_src2));
-
-#undef OPRND
-#undef FLD
- }
- NEXT (vpc);
-
- CASE (sem, INSN_PAR_STH) : /* sth $src1,@$src2 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_st_plus.f
-#define OPRND(f) par_exec->operands.sfmt_sth.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- HI opval = * FLD (i_src1);
- OPRND (h_memory_src2_idx) = * FLD (i_src2);
- OPRND (h_memory_src2) = opval;
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-
-#undef OPRND
-#undef FLD
-}
- NEXT (vpc);
-
-CASE (sem, INSN_WRITE_STH) : /* sth $src1,@$src2 */
- {
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
-#define FLD(f) abuf->fields.sfmt_st_plus.f
-#define OPRND(f) par_exec->operands.sfmt_sth.f
- int UNUSED written = abuf->written;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
-
- SETMEMHI (current_cpu, pc, OPRND (h_memory_src2_idx), OPRND (h_memory_src2));
-
-#undef OPRND
-#undef FLD
- }
- NEXT (vpc);
-
- CASE (sem, INSN_PAR_ST_PLUS) : /* st $src1,@+$src2 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_st_plus.f
-#define OPRND(f) par_exec->operands.sfmt_st_plus.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- SI tmp_new_src2;
- tmp_new_src2 = ADDSI (* FLD (i_src2), 4);
- {
- SI opval = * FLD (i_src1);
- OPRND (h_memory_new_src2_idx) = tmp_new_src2;
- OPRND (h_memory_new_src2) = opval;
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
- {
- SI opval = tmp_new_src2;
- OPRND (src2) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-}
-
-#undef OPRND
-#undef FLD
-}
- NEXT (vpc);
-
-CASE (sem, INSN_WRITE_ST_PLUS) : /* st $src1,@+$src2 */
- {
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
-#define FLD(f) abuf->fields.sfmt_st_plus.f
-#define OPRND(f) par_exec->operands.sfmt_st_plus.f
- int UNUSED written = abuf->written;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
-
- SETMEMSI (current_cpu, pc, OPRND (h_memory_new_src2_idx), OPRND (h_memory_new_src2));
- * FLD (i_src2) = OPRND (src2);
-
-#undef OPRND
-#undef FLD
- }
- NEXT (vpc);
-
- CASE (sem, INSN_PAR_ST_MINUS) : /* st $src1,@-$src2 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_st_plus.f
-#define OPRND(f) par_exec->operands.sfmt_st_plus.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- SI tmp_new_src2;
- tmp_new_src2 = SUBSI (* FLD (i_src2), 4);
- {
- SI opval = * FLD (i_src1);
- OPRND (h_memory_new_src2_idx) = tmp_new_src2;
- OPRND (h_memory_new_src2) = opval;
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
- {
- SI opval = tmp_new_src2;
- OPRND (src2) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-}
-
-#undef OPRND
-#undef FLD
-}
- NEXT (vpc);
-
-CASE (sem, INSN_WRITE_ST_MINUS) : /* st $src1,@-$src2 */
- {
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
-#define FLD(f) abuf->fields.sfmt_st_plus.f
-#define OPRND(f) par_exec->operands.sfmt_st_plus.f
- int UNUSED written = abuf->written;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
-
- SETMEMSI (current_cpu, pc, OPRND (h_memory_new_src2_idx), OPRND (h_memory_new_src2));
- * FLD (i_src2) = OPRND (src2);
-
-#undef OPRND
-#undef FLD
- }
- NEXT (vpc);
-
- CASE (sem, INSN_PAR_SUB) : /* sub $dr,$sr */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_add.f
-#define OPRND(f) par_exec->operands.sfmt_add.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- SI opval = SUBSI (* FLD (i_dr), * FLD (i_sr));
- OPRND (dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
-
-#undef OPRND
-#undef FLD
-}
- NEXT (vpc);
-
-CASE (sem, INSN_WRITE_SUB) : /* sub $dr,$sr */
- {
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
-#define FLD(f) abuf->fields.sfmt_add.f
-#define OPRND(f) par_exec->operands.sfmt_add.f
- int UNUSED written = abuf->written;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
-
- * FLD (i_dr) = OPRND (dr);
-
-#undef OPRND
-#undef FLD
- }
- NEXT (vpc);
-
- CASE (sem, INSN_PAR_SUBV) : /* subv $dr,$sr */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_add.f
-#define OPRND(f) par_exec->operands.sfmt_addv.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- SI temp0;BI temp1;
- temp0 = SUBSI (* FLD (i_dr), * FLD (i_sr));
- temp1 = SUBOFSI (* FLD (i_dr), * FLD (i_sr), 0);
- {
- SI opval = temp0;
- OPRND (dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
- {
- BI opval = temp1;
- OPRND (condbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
- }
-}
-
-#undef OPRND
-#undef FLD
-}
- NEXT (vpc);
-
-CASE (sem, INSN_WRITE_SUBV) : /* subv $dr,$sr */
- {
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
-#define FLD(f) abuf->fields.sfmt_add.f
-#define OPRND(f) par_exec->operands.sfmt_addv.f
- int UNUSED written = abuf->written;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
-
- CPU (h_cond) = OPRND (condbit);
- * FLD (i_dr) = OPRND (dr);
-
-#undef OPRND
-#undef FLD
- }
- NEXT (vpc);
-
- CASE (sem, INSN_PAR_SUBX) : /* subx $dr,$sr */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_add.f
-#define OPRND(f) par_exec->operands.sfmt_addx.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- SI temp0;BI temp1;
- temp0 = SUBCSI (* FLD (i_dr), * FLD (i_sr), CPU (h_cond));
- temp1 = SUBCFSI (* FLD (i_dr), * FLD (i_sr), CPU (h_cond));
- {
- SI opval = temp0;
- OPRND (dr) = opval;
- TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
- }
- {
- BI opval = temp1;
- OPRND (condbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
- }
-}
-
-#undef OPRND
-#undef FLD
-}
- NEXT (vpc);
-
-CASE (sem, INSN_WRITE_SUBX) : /* subx $dr,$sr */
- {
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
-#define FLD(f) abuf->fields.sfmt_add.f
-#define OPRND(f) par_exec->operands.sfmt_addx.f
- int UNUSED written = abuf->written;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
-
- CPU (h_cond) = OPRND (condbit);
- * FLD (i_dr) = OPRND (dr);
-
-#undef OPRND
-#undef FLD
- }
- NEXT (vpc);
-
- CASE (sem, INSN_PAR_TRAP) : /* trap $uimm4 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_trap.f
-#define OPRND(f) par_exec->operands.sfmt_trap.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
- {
- USI opval = GET_H_CR (((UINT) 6));
- OPRND (h_cr_14) = opval;
- TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval);
- }
- {
- USI opval = ADDSI (pc, 4);
- OPRND (h_cr_6) = opval;
- TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval);
- }
- {
- UQI opval = CPU (h_bpsw);
- OPRND (h_bbpsw) = opval;
- TRACE_RESULT (current_cpu, abuf, "bbpsw", 'x', opval);
- }
- {
- UQI opval = GET_H_PSW ();
- OPRND (h_bpsw) = opval;
- TRACE_RESULT (current_cpu, abuf, "bpsw", 'x', opval);
- }
- {
- UQI opval = ANDQI (GET_H_PSW (), 128);
- OPRND (h_psw) = opval;
- TRACE_RESULT (current_cpu, abuf, "psw", 'x', opval);
- }
- {
- SI opval = m32r_trap (current_cpu, pc, FLD (f_uimm4));
- OPRND (pc) = opval;
- TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
- }
-}
-
-#undef OPRND
-#undef FLD
-}
- NEXT (vpc);
-
-CASE (sem, INSN_WRITE_TRAP) : /* trap $uimm4 */
- {
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
-#define FLD(f) abuf->fields.sfmt_trap.f
-#define OPRND(f) par_exec->operands.sfmt_trap.f
- int UNUSED written = abuf->written;
- IADDR UNUSED pc = abuf->addr;
- SEM_BRANCH_INIT
- vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
-
- CPU (h_bbpsw) = OPRND (h_bbpsw);
- CPU (h_bpsw) = OPRND (h_bpsw);
- SET_H_CR (((UINT) 14), OPRND (h_cr_14));
- SET_H_CR (((UINT) 6), OPRND (h_cr_6));
- SET_H_PSW (OPRND (h_psw));
- SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc);
-
- SEM_BRANCH_FINI (vpc);
-#undef OPRND
-#undef FLD
- }
- NEXT (vpc);
-
- CASE (sem, INSN_PAR_UNLOCK) : /* unlock $src1,@$src2 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_st_plus.f
-#define OPRND(f) par_exec->operands.sfmt_unlock.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-{
-if (CPU (h_lock)) {
- {
- SI opval = * FLD (i_src1);
- OPRND (h_memory_src2_idx) = * FLD (i_src2);
- OPRND (h_memory_src2) = opval;
- written |= (1 << 4);
- TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
- }
-}
- {
- BI opval = 0;
- OPRND (h_lock) = opval;
- TRACE_RESULT (current_cpu, abuf, "lock", 'x', opval);
- }
-}
-
- abuf->written = written;
-#undef OPRND
-#undef FLD
-}
- NEXT (vpc);
-
-CASE (sem, INSN_WRITE_UNLOCK) : /* unlock $src1,@$src2 */
- {
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
-#define FLD(f) abuf->fields.sfmt_st_plus.f
-#define OPRND(f) par_exec->operands.sfmt_unlock.f
- int UNUSED written = abuf->written;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
-
- CPU (h_lock) = OPRND (h_lock);
- if (written & (1 << 4))
- {
- SETMEMSI (current_cpu, pc, OPRND (h_memory_src2_idx), OPRND (h_memory_src2));
- }
-
-#undef OPRND
-#undef FLD
- }
- NEXT (vpc);
-
- CASE (sem, INSN_PAR_PCMPBZ) : /* pcmpbz $src2 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_st_plus.f
-#define OPRND(f) par_exec->operands.sfmt_cmpz.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- BI opval = (EQSI (ANDSI (* FLD (i_src2), 255), 0)) ? (1) : (EQSI (ANDSI (* FLD (i_src2), 65280), 0)) ? (1) : (EQSI (ANDSI (* FLD (i_src2), 16711680), 0)) ? (1) : (EQSI (ANDSI (* FLD (i_src2), 0xff000000), 0)) ? (1) : (0);
- OPRND (condbit) = opval;
- TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
- }
-
-#undef OPRND
-#undef FLD
-}
- NEXT (vpc);
-
-CASE (sem, INSN_WRITE_PCMPBZ) : /* pcmpbz $src2 */
- {
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
-#define FLD(f) abuf->fields.sfmt_st_plus.f
-#define OPRND(f) par_exec->operands.sfmt_cmpz.f
- int UNUSED written = abuf->written;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
-
- CPU (h_cond) = OPRND (condbit);
-
-#undef OPRND
-#undef FLD
- }
- NEXT (vpc);
-
- CASE (sem, INSN_PAR_SADD) : /* sadd */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_empty.f
-#define OPRND(f) par_exec->operands.sfmt_sadd.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- DI opval = ADDDI (SRADI (GET_H_ACCUMS (((UINT) 1)), 16), GET_H_ACCUMS (((UINT) 0)));
- OPRND (h_accums_0) = opval;
- TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
- }
-
-#undef OPRND
-#undef FLD
-}
- NEXT (vpc);
-
-CASE (sem, INSN_WRITE_SADD) : /* sadd */
- {
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
-#define FLD(f) abuf->fields.fmt_empty.f
-#define OPRND(f) par_exec->operands.sfmt_sadd.f
- int UNUSED written = abuf->written;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
-
- SET_H_ACCUMS (((UINT) 0), OPRND (h_accums_0));
-
-#undef OPRND
-#undef FLD
- }
- NEXT (vpc);
-
- CASE (sem, INSN_PAR_MACWU1) : /* macwu1 $src1,$src2 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_st_plus.f
-#define OPRND(f) par_exec->operands.sfmt_macwu1.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- DI opval = SRADI (SLLDI (ADDDI (GET_H_ACCUMS (((UINT) 1)), MULDI (EXTSIDI (* FLD (i_src1)), EXTSIDI (ANDSI (* FLD (i_src2), 65535)))), 8), 8);
- OPRND (h_accums_1) = opval;
- TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
- }
-
-#undef OPRND
-#undef FLD
-}
- NEXT (vpc);
-
-CASE (sem, INSN_WRITE_MACWU1) : /* macwu1 $src1,$src2 */
- {
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
-#define FLD(f) abuf->fields.sfmt_st_plus.f
-#define OPRND(f) par_exec->operands.sfmt_macwu1.f
- int UNUSED written = abuf->written;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
-
- SET_H_ACCUMS (((UINT) 1), OPRND (h_accums_1));
-
-#undef OPRND
-#undef FLD
- }
- NEXT (vpc);
-
- CASE (sem, INSN_PAR_MSBLO) : /* msblo $src1,$src2 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_st_plus.f
-#define OPRND(f) par_exec->operands.sfmt_msblo.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- DI opval = SRADI (SLLDI (SUBDI (GET_H_ACCUM (), SRADI (SLLDI (MULDI (EXTHIDI (TRUNCSIHI (* FLD (i_src1))), EXTHIDI (TRUNCSIHI (* FLD (i_src2)))), 32), 16)), 8), 8);
- OPRND (accum) = opval;
- TRACE_RESULT (current_cpu, abuf, "accum", 'D', opval);
- }
-
-#undef OPRND
-#undef FLD
-}
- NEXT (vpc);
-
-CASE (sem, INSN_WRITE_MSBLO) : /* msblo $src1,$src2 */
- {
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
-#define FLD(f) abuf->fields.sfmt_st_plus.f
-#define OPRND(f) par_exec->operands.sfmt_msblo.f
- int UNUSED written = abuf->written;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
-
- SET_H_ACCUM (OPRND (accum));
-
-#undef OPRND
-#undef FLD
- }
- NEXT (vpc);
-
- CASE (sem, INSN_PAR_MULWU1) : /* mulwu1 $src1,$src2 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_st_plus.f
-#define OPRND(f) par_exec->operands.sfmt_mulwu1.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- DI opval = SRADI (SLLDI (MULDI (EXTSIDI (* FLD (i_src1)), EXTSIDI (ANDSI (* FLD (i_src2), 65535))), 16), 16);
- OPRND (h_accums_1) = opval;
- TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
- }
-
-#undef OPRND
-#undef FLD
-}
- NEXT (vpc);
-
-CASE (sem, INSN_WRITE_MULWU1) : /* mulwu1 $src1,$src2 */
- {
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
-#define FLD(f) abuf->fields.sfmt_st_plus.f
-#define OPRND(f) par_exec->operands.sfmt_mulwu1.f
- int UNUSED written = abuf->written;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
-
- SET_H_ACCUMS (((UINT) 1), OPRND (h_accums_1));
-
-#undef OPRND
-#undef FLD
- }
- NEXT (vpc);
-
- CASE (sem, INSN_PAR_MACLH1) : /* maclh1 $src1,$src2 */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.sfmt_st_plus.f
-#define OPRND(f) par_exec->operands.sfmt_macwu1.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
- {
- DI opval = SRADI (SLLDI (ADDDI (GET_H_ACCUMS (((UINT) 1)), SLLDI (EXTSIDI (MULSI (EXTHISI (TRUNCSIHI (* FLD (i_src1))), SRASI (* FLD (i_src2), 16))), 16)), 8), 8);
- OPRND (h_accums_1) = opval;
- TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
- }
-
-#undef OPRND
-#undef FLD
-}
- NEXT (vpc);
-
-CASE (sem, INSN_WRITE_MACLH1) : /* maclh1 $src1,$src2 */
- {
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
-#define FLD(f) abuf->fields.sfmt_st_plus.f
-#define OPRND(f) par_exec->operands.sfmt_macwu1.f
- int UNUSED written = abuf->written;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
-
- SET_H_ACCUMS (((UINT) 1), OPRND (h_accums_1));
-
-#undef OPRND
-#undef FLD
- }
- NEXT (vpc);
-
- CASE (sem, INSN_PAR_SC) : /* sc */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_empty.f
-#define OPRND(f) par_exec->operands.sfmt_sc.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-if (ZEXTBISI (CPU (h_cond)))
- SEM_SKIP_INSN (current_cpu, sem_arg, vpc);
-
-#undef OPRND
-#undef FLD
-}
- NEXT (vpc);
-
-CASE (sem, INSN_WRITE_SC) : /* sc */
- {
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
-#define FLD(f) abuf->fields.fmt_empty.f
-#define OPRND(f) par_exec->operands.sfmt_sc.f
- int UNUSED written = abuf->written;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
-
-
-#undef OPRND
-#undef FLD
- }
- NEXT (vpc);
-
- CASE (sem, INSN_PAR_SNC) : /* snc */
-{
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
-#define FLD(f) abuf->fields.fmt_empty.f
-#define OPRND(f) par_exec->operands.sfmt_sc.f
- int UNUSED written = 0;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
-
-if (ZEXTBISI (NOTBI (CPU (h_cond))))
- SEM_SKIP_INSN (current_cpu, sem_arg, vpc);
-
-#undef OPRND
-#undef FLD
-}
- NEXT (vpc);
-
-CASE (sem, INSN_WRITE_SNC) : /* snc */
- {
- SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
- const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
-#define FLD(f) abuf->fields.fmt_empty.f
-#define OPRND(f) par_exec->operands.sfmt_sc.f
- int UNUSED written = abuf->written;
- IADDR UNUSED pc = abuf->addr;
- vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
-
-
-#undef OPRND
-#undef FLD
- }
- NEXT (vpc);
-
-
- }
- ENDSWITCH (sem) /* End of semantic switch. */
-
- /* At this point `vpc' contains the next insn to execute. */
-}
-
-#undef DEFINE_SWITCH
-#endif /* DEFINE_SWITCH */
diff --git a/sim/m32r/sim-if.c b/sim/m32r/sim-if.c
deleted file mode 100644
index a7cbe1cd9ba..00000000000
--- a/sim/m32r/sim-if.c
+++ /dev/null
@@ -1,292 +0,0 @@
-/* Main simulator entry points specific to the M32R.
- Copyright (C) 1996, 1997, 1998, 1999 Free Software Foundation, Inc.
- Contributed by Cygnus Support.
-
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License along
-with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
-
-#include "sim-main.h"
-#include "sim-options.h"
-#include "libiberty.h"
-#include "bfd.h"
-
-#ifdef HAVE_STRING_H
-#include <string.h>
-#else
-#ifdef HAVE_STRINGS_H
-#include <strings.h>
-#endif
-#endif
-#ifdef HAVE_STDLIB_H
-#include <stdlib.h>
-#endif
-
-static void free_state (SIM_DESC);
-static void print_m32r_misc_cpu (SIM_CPU *cpu, int verbose);
-
-/* Records simulator descriptor so utilities like m32r_dump_regs can be
- called from gdb. */
-SIM_DESC current_state;
-
-/* Cover function of sim_state_free to free the cpu buffers as well. */
-
-static void
-free_state (SIM_DESC sd)
-{
- if (STATE_MODULES (sd) != NULL)
- sim_module_uninstall (sd);
- sim_cpu_free_all (sd);
- sim_state_free (sd);
-}
-
-/* Create an instance of the simulator. */
-
-SIM_DESC
-sim_open (kind, callback, abfd, argv)
- SIM_OPEN_KIND kind;
- host_callback *callback;
- struct _bfd *abfd;
- char **argv;
-{
- SIM_DESC sd = sim_state_alloc (kind, callback);
- char c;
- int i;
-
- /* The cpu data is kept in a separately allocated chunk of memory. */
- if (sim_cpu_alloc_all (sd, 1, cgen_cpu_max_extra_bytes ()) != SIM_RC_OK)
- {
- free_state (sd);
- return 0;
- }
-
-#if 0 /* FIXME: pc is in mach-specific struct */
- /* FIXME: watchpoints code shouldn't need this */
- {
- SIM_CPU *current_cpu = STATE_CPU (sd, 0);
- STATE_WATCHPOINTS (sd)->pc = &(PC);
- STATE_WATCHPOINTS (sd)->sizeof_pc = sizeof (PC);
- }
-#endif
-
- if (sim_pre_argv_init (sd, argv[0]) != SIM_RC_OK)
- {
- free_state (sd);
- return 0;
- }
-
-#ifdef HAVE_DV_SOCKSER /* FIXME: was done differently before */
- if (dv_sockser_install (sd) != SIM_RC_OK)
- {
- free_state (sd);
- return 0;
- }
-#endif
-
-#if 0 /* FIXME: 'twould be nice if we could do this */
- /* These options override any module options.
- Obviously ambiguity should be avoided, however the caller may wish to
- augment the meaning of an option. */
- if (extra_options != NULL)
- sim_add_option_table (sd, extra_options);
-#endif
-
- /* getopt will print the error message so we just have to exit if this fails.
- FIXME: Hmmm... in the case of gdb we need getopt to call
- print_filtered. */
- if (sim_parse_args (sd, argv) != SIM_RC_OK)
- {
- free_state (sd);
- return 0;
- }
-
- /* Allocate a handler for the control registers and other devices
- if no memory for that range has been allocated by the user.
- All are allocated in one chunk to keep things from being
- unnecessarily complicated. */
- if (sim_core_read_buffer (sd, NULL, read_map, &c, M32R_DEVICE_ADDR, 1) == 0)
- sim_core_attach (sd, NULL,
- 0 /*level*/,
- access_read_write,
- 0 /*space ???*/,
- M32R_DEVICE_ADDR, M32R_DEVICE_LEN /*nr_bytes*/,
- 0 /*modulo*/,
- &m32r_devices,
- NULL /*buffer*/);
-
- /* Allocate core managed memory if none specified by user.
- Use address 4 here in case the user wanted address 0 unmapped. */
- if (sim_core_read_buffer (sd, NULL, read_map, &c, 4, 1) == 0)
- sim_do_commandf (sd, "memory region 0,0x%x", M32R_DEFAULT_MEM_SIZE);
-
- /* check for/establish the reference program image */
- if (sim_analyze_program (sd,
- (STATE_PROG_ARGV (sd) != NULL
- ? *STATE_PROG_ARGV (sd)
- : NULL),
- abfd) != SIM_RC_OK)
- {
- free_state (sd);
- return 0;
- }
-
- /* Establish any remaining configuration options. */
- if (sim_config (sd) != SIM_RC_OK)
- {
- free_state (sd);
- return 0;
- }
-
- if (sim_post_argv_init (sd) != SIM_RC_OK)
- {
- free_state (sd);
- return 0;
- }
-
- /* Open a copy of the cpu descriptor table. */
- {
- CGEN_CPU_DESC cd = m32r_cgen_cpu_open_1 (STATE_ARCHITECTURE (sd)->printable_name,
- CGEN_ENDIAN_BIG);
- for (i = 0; i < MAX_NR_PROCESSORS; ++i)
- {
- SIM_CPU *cpu = STATE_CPU (sd, i);
- CPU_CPU_DESC (cpu) = cd;
- CPU_DISASSEMBLER (cpu) = sim_cgen_disassemble_insn;
- }
- m32r_cgen_init_dis (cd);
- }
-
- /* Initialize various cgen things not done by common framework.
- Must be done after m32r_cgen_cpu_open. */
- cgen_init (sd);
-
- for (c = 0; c < MAX_NR_PROCESSORS; ++c)
- {
- /* Only needed for profiling, but the structure member is small. */
- memset (CPU_M32R_MISC_PROFILE (STATE_CPU (sd, i)), 0,
- sizeof (* CPU_M32R_MISC_PROFILE (STATE_CPU (sd, i))));
- /* Hook in callback for reporting these stats */
- PROFILE_INFO_CPU_CALLBACK (CPU_PROFILE_DATA (STATE_CPU (sd, i)))
- = print_m32r_misc_cpu;
- }
-
- /* Store in a global so things like sparc32_dump_regs can be invoked
- from the gdb command line. */
- current_state = sd;
-
- return sd;
-}
-
-void
-sim_close (sd, quitting)
- SIM_DESC sd;
- int quitting;
-{
- m32r_cgen_cpu_close (CPU_CPU_DESC (STATE_CPU (sd, 0)));
- sim_module_uninstall (sd);
-}
-
-SIM_RC
-sim_create_inferior (sd, abfd, argv, envp)
- SIM_DESC sd;
- struct _bfd *abfd;
- char **argv;
- char **envp;
-{
- SIM_CPU *current_cpu = STATE_CPU (sd, 0);
- SIM_ADDR addr;
-
- if (abfd != NULL)
- addr = bfd_get_start_address (abfd);
- else
- addr = 0;
- sim_pc_set (current_cpu, addr);
-
-#if 0
- STATE_ARGV (sd) = sim_copy_argv (argv);
- STATE_ENVP (sd) = sim_copy_argv (envp);
-#endif
-
- return SIM_RC_OK;
-}
-
-/* PROFILE_CPU_CALLBACK */
-
-static void
-print_m32r_misc_cpu (SIM_CPU *cpu, int verbose)
-{
- SIM_DESC sd = CPU_STATE (cpu);
- char buf[20];
-
- if (CPU_PROFILE_FLAGS (cpu) [PROFILE_INSN_IDX])
- {
- sim_io_printf (sd, "Miscellaneous Statistics\n\n");
- sim_io_printf (sd, " %-*s %s\n\n",
- PROFILE_LABEL_WIDTH, "Fill nops:",
- sim_add_commas (buf, sizeof (buf),
- CPU_M32R_MISC_PROFILE (cpu)->fillnop_count));
- if (STATE_ARCHITECTURE (sd)->mach == bfd_mach_m32rx)
- sim_io_printf (sd, " %-*s %s\n\n",
- PROFILE_LABEL_WIDTH, "Parallel insns:",
- sim_add_commas (buf, sizeof (buf),
- CPU_M32R_MISC_PROFILE (cpu)->parallel_count));
- }
-}
-
-void
-sim_do_command (sd, cmd)
- SIM_DESC sd;
- char *cmd;
-{
- char **argv;
-
- if (cmd == NULL)
- return;
-
- argv = buildargv (cmd);
-
- if (argv[0] != NULL
- && strcasecmp (argv[0], "info") == 0
- && argv[1] != NULL
- && strncasecmp (argv[1], "reg", 3) == 0)
- {
- SI val;
-
- /* We only support printing bbpsw,bbpc here as there is no equivalent
- functionality in gdb. */
- if (argv[2] == NULL)
- sim_io_eprintf (sd, "Missing register in `%s'\n", cmd);
- else if (argv[3] != NULL)
- sim_io_eprintf (sd, "Too many arguments in `%s'\n", cmd);
- else if (strcasecmp (argv[2], "bbpsw") == 0)
- {
- val = a_m32r_h_cr_get (STATE_CPU (sd, 0), H_CR_BBPSW);
- sim_io_printf (sd, "bbpsw 0x%x %d\n", val, val);
- }
- else if (strcasecmp (argv[2], "bbpc") == 0)
- {
- val = a_m32r_h_cr_get (STATE_CPU (sd, 0), H_CR_BBPC);
- sim_io_printf (sd, "bbpc 0x%x %d\n", val, val);
- }
- else
- sim_io_eprintf (sd, "Printing of register `%s' not supported with `sim info'\n",
- argv[2]);
- }
- else
- {
- if (sim_args_command (sd, cmd) != SIM_RC_OK)
- sim_io_eprintf (sd, "Unknown sim command `%s'\n", cmd);
- }
-
- freeargv (argv);
-}
diff --git a/sim/m32r/sim-main.h b/sim/m32r/sim-main.h
deleted file mode 100644
index efd1e91fbe7..00000000000
--- a/sim/m32r/sim-main.h
+++ /dev/null
@@ -1,88 +0,0 @@
-
-/* Main header for the m32r. */
-
-#ifndef SIM_MAIN_H
-#define SIM_MAIN_H
-
-#define USING_SIM_BASE_H /* FIXME: quick hack */
-
-struct _sim_cpu; /* FIXME: should be in sim-basics.h */
-typedef struct _sim_cpu SIM_CPU;
-
-#include "symcat.h"
-#include "sim-basics.h"
-#include "cgen-types.h"
-#include "m32r-desc.h"
-#include "m32r-opc.h"
-#include "arch.h"
-
-/* These must be defined before sim-base.h. */
-typedef USI sim_cia;
-
-#define CIA_GET(cpu) CPU_PC_GET (cpu)
-#define CIA_SET(cpu,val) CPU_PC_SET ((cpu), (val))
-
-#define SIM_ENGINE_HALT_HOOK(sd, cpu, cia) \
-do { \
- if (cpu) /* null if ctrl-c */ \
- sim_pc_set ((cpu), (cia)); \
-} while (0)
-#define SIM_ENGINE_RESTART_HOOK(sd, cpu, cia) \
-do { \
- sim_pc_set ((cpu), (cia)); \
-} while (0)
-
-#include "sim-base.h"
-#include "cgen-sim.h"
-#include "m32r-sim.h"
-#include "opcode/cgen.h"
-
-/* The _sim_cpu struct. */
-
-struct _sim_cpu {
- /* sim/common cpu base. */
- sim_cpu_base base;
-
- /* Static parts of cgen. */
- CGEN_CPU cgen_cpu;
-
- M32R_MISC_PROFILE m32r_misc_profile;
-#define CPU_M32R_MISC_PROFILE(cpu) (& (cpu)->m32r_misc_profile)
-
- /* CPU specific parts go here.
- Note that in files that don't need to access these pieces WANT_CPU_FOO
- won't be defined and thus these parts won't appear. This is ok in the
- sense that things work. It is a source of bugs though.
- One has to of course be careful to not take the size of this
- struct and no structure members accessed in non-cpu specific files can
- go after here. Oh for a better language. */
-#if defined (WANT_CPU_M32RBF)
- M32RBF_CPU_DATA cpu_data;
-#elif defined (WANT_CPU_M32RXF)
- M32RXF_CPU_DATA cpu_data;
-#endif
-};
-
-/* The sim_state struct. */
-
-struct sim_state {
- sim_cpu *cpu;
-#define STATE_CPU(sd, n) (/*&*/ (sd)->cpu)
-
- CGEN_STATE cgen_state;
-
- sim_state_base base;
-};
-
-/* Misc. */
-
-/* Catch address exceptions. */
-extern SIM_CORE_SIGNAL_FN m32r_core_signal;
-#define SIM_CORE_SIGNAL(SD,CPU,CIA,MAP,NR_BYTES,ADDR,TRANSFER,ERROR) \
-m32r_core_signal ((SD), (CPU), (CIA), (MAP), (NR_BYTES), (ADDR), \
- (TRANSFER), (ERROR))
-
-/* Default memory size. */
-#define M32R_DEFAULT_MEM_SIZE 0x800000 /* 8M */
-
-#endif /* SIM_MAIN_H */
diff --git a/sim/m32r/tconfig.in b/sim/m32r/tconfig.in
deleted file mode 100644
index f2599e3fd29..00000000000
--- a/sim/m32r/tconfig.in
+++ /dev/null
@@ -1,47 +0,0 @@
-/* M32R target configuration file. -*- C -*- */
-
-#ifndef M32R_TCONFIG_H
-#define M32R_TCONFIG_H
-
-/* Define this if the simulator can vary the size of memory.
- See the xxx simulator for an example.
- This enables the `-m size' option.
- The memory size is stored in STATE_MEM_SIZE. */
-/* Not used for M32R since we use the memory module. */
-/* #define SIM_HAVE_MEM_SIZE */
-
-/* See sim-hload.c. We properly handle LMA. */
-#define SIM_HANDLES_LMA 1
-
-/* For MSPR support. FIXME: revisit. */
-#define WITH_DEVICES 1
-
-/* FIXME: Revisit. */
-#ifdef HAVE_DV_SOCKSER
-MODULE_INSTALL_FN dv_sockser_install;
-#define MODULE_LIST dv_sockser_install,
-#endif
-
-#if 0
-/* Enable watchpoints. */
-#define WITH_WATCHPOINTS 1
-#endif
-
-/* Define this to enable the intrinsic breakpoint mechanism. */
-/* FIXME: may be able to remove SIM_HAVE_BREAKPOINT since it essentially
- duplicates ifdef SIM_BREAKPOINT (right?) */
-#if 0
-#define SIM_HAVE_BREAKPOINTS
-#define SIM_BREAKPOINT { 0x10, 0xf1 }
-#define SIM_BREAKPOINT_SIZE 2
-#endif
-#if 0
-#define HAVE_DV_SOCKSER
-#endif
-
-/* This is a global setting. Different cpu families can't mix-n-match -scache
- and -pbb. However some cpu families may use -simple while others use
- one of -scache/-pbb. */
-#define WITH_SCACHE_PBB 1
-
-#endif /* M32R_TCONFIG_H */
diff --git a/sim/m32r/traps.c b/sim/m32r/traps.c
deleted file mode 100644
index 2721ad8dfcb..00000000000
--- a/sim/m32r/traps.c
+++ /dev/null
@@ -1,182 +0,0 @@
-/* m32r exception, interrupt, and trap (EIT) support
- Copyright (C) 1998 Free Software Foundation, Inc.
- Contributed by Cygnus Solutions.
-
-This file is part of GDB, the GNU debugger.
-
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License along
-with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
-
-#include "sim-main.h"
-#include "targ-vals.h"
-
-/* The semantic code invokes this for invalid (unrecognized) instructions.
- CIA is the address with the invalid insn.
- VPC is the virtual pc of the following insn. */
-
-SEM_PC
-sim_engine_invalid_insn (SIM_CPU *current_cpu, IADDR cia, SEM_PC vpc)
-{
- SIM_DESC sd = CPU_STATE (current_cpu);
-
-#if 0
- if (STATE_ENVIRONMENT (sd) == OPERATING_ENVIRONMENT)
- {
- h_bsm_set (current_cpu, h_sm_get (current_cpu));
- h_bie_set (current_cpu, h_ie_get (current_cpu));
- h_bcond_set (current_cpu, h_cond_get (current_cpu));
- /* sm not changed */
- h_ie_set (current_cpu, 0);
- h_cond_set (current_cpu, 0);
-
- h_bpc_set (current_cpu, cia);
-
- sim_engine_restart (CPU_STATE (current_cpu), current_cpu, NULL,
- EIT_RSVD_INSN_ADDR);
- }
- else
-#endif
- sim_engine_halt (sd, current_cpu, NULL, cia, sim_stopped, SIM_SIGILL);
- return vpc;
-}
-
-/* Process an address exception. */
-
-void
-m32r_core_signal (SIM_DESC sd, SIM_CPU *current_cpu, sim_cia cia,
- unsigned int map, int nr_bytes, address_word addr,
- transfer_type transfer, sim_core_signals sig)
-{
- if (STATE_ENVIRONMENT (sd) == OPERATING_ENVIRONMENT)
- {
- a_m32r_h_cr_set (current_cpu, H_CR_BBPC,
- a_m32r_h_cr_get (current_cpu, H_CR_BPC));
- if (MACH_NUM (CPU_MACH (current_cpu)) == MACH_M32R)
- {
- m32rbf_h_bpsw_set (current_cpu, m32rbf_h_psw_get (current_cpu));
- /* sm not changed */
- m32rbf_h_psw_set (current_cpu, m32rbf_h_psw_get (current_cpu) & 0x80);
- }
- else
- {
- m32rxf_h_bpsw_set (current_cpu, m32rxf_h_psw_get (current_cpu));
- /* sm not changed */
- m32rxf_h_psw_set (current_cpu, m32rxf_h_psw_get (current_cpu) & 0x80);
- }
- a_m32r_h_cr_set (current_cpu, H_CR_BPC, cia);
-
- sim_engine_restart (CPU_STATE (current_cpu), current_cpu, NULL,
- EIT_ADDR_EXCP_ADDR);
- }
- else
- sim_core_signal (sd, current_cpu, cia, map, nr_bytes, addr,
- transfer, sig);
-}
-
-/* Read/write functions for system call interface. */
-
-static int
-syscall_read_mem (host_callback *cb, struct cb_syscall *sc,
- unsigned long taddr, char *buf, int bytes)
-{
- SIM_DESC sd = (SIM_DESC) sc->p1;
- SIM_CPU *cpu = (SIM_CPU *) sc->p2;
-
- return sim_core_read_buffer (sd, cpu, read_map, buf, taddr, bytes);
-}
-
-static int
-syscall_write_mem (host_callback *cb, struct cb_syscall *sc,
- unsigned long taddr, const char *buf, int bytes)
-{
- SIM_DESC sd = (SIM_DESC) sc->p1;
- SIM_CPU *cpu = (SIM_CPU *) sc->p2;
-
- return sim_core_write_buffer (sd, cpu, write_map, buf, taddr, bytes);
-}
-
-/* Trap support.
- The result is the pc address to continue at.
- Preprocessing like saving the various registers has already been done. */
-
-USI
-m32r_trap (SIM_CPU *current_cpu, PCADDR pc, int num)
-{
- SIM_DESC sd = CPU_STATE (current_cpu);
- host_callback *cb = STATE_CALLBACK (sd);
-
-#ifdef SIM_HAVE_BREAKPOINTS
- /* Check for breakpoints "owned" by the simulator first, regardless
- of --environment. */
- if (num == TRAP_BREAKPOINT)
- {
- /* First try sim-break.c. If it's a breakpoint the simulator "owns"
- it doesn't return. Otherwise it returns and let's us try. */
- sim_handle_breakpoint (sd, current_cpu, pc);
- /* Fall through. */
- }
-#endif
-
- if (STATE_ENVIRONMENT (sd) == OPERATING_ENVIRONMENT)
- {
- /* The new pc is the trap vector entry.
- We assume there's a branch there to some handler. */
- USI new_pc = EIT_TRAP_BASE_ADDR + num * 4;
- return new_pc;
- }
-
- switch (num)
- {
- case TRAP_SYSCALL :
- {
- CB_SYSCALL s;
-
- CB_SYSCALL_INIT (&s);
- s.func = a_m32r_h_gr_get (current_cpu, 0);
- s.arg1 = a_m32r_h_gr_get (current_cpu, 1);
- s.arg2 = a_m32r_h_gr_get (current_cpu, 2);
- s.arg3 = a_m32r_h_gr_get (current_cpu, 3);
-
- if (s.func == TARGET_SYS_exit)
- {
- sim_engine_halt (sd, current_cpu, NULL, pc, sim_exited, s.arg1);
- }
-
- s.p1 = (PTR) sd;
- s.p2 = (PTR) current_cpu;
- s.read_mem = syscall_read_mem;
- s.write_mem = syscall_write_mem;
- cb_syscall (cb, &s);
- a_m32r_h_gr_set (current_cpu, 2, s.errcode);
- a_m32r_h_gr_set (current_cpu, 0, s.result);
- a_m32r_h_gr_set (current_cpu, 1, s.result2);
- break;
- }
-
- case TRAP_BREAKPOINT:
- sim_engine_halt (sd, current_cpu, NULL, pc,
- sim_stopped, SIM_SIGTRAP);
- break;
-
- default :
- {
- USI new_pc = EIT_TRAP_BASE_ADDR + num * 4;
- return new_pc;
- }
- }
-
- /* Fake an "rte" insn. */
- /* FIXME: Should duplicate all of rte processing. */
- return (pc & -4) + 4;
-}
diff --git a/sim/m68hc11/ChangeLog b/sim/m68hc11/ChangeLog
deleted file mode 100644
index 04e0fb667f5..00000000000
--- a/sim/m68hc11/ChangeLog
+++ /dev/null
@@ -1,346 +0,0 @@
-2001-05-20 Stephane Carrez <Stephane.Carrez@worldnet.fr>
-
- * Makefile.in (M68HC11_OBJS): Add m68hc12int.o.
- (m68hc12int.c): Generate using gencode -m6812.
- (m68hc11int.c): Likewise with -m6811.
-
- * gencode.c (m6811_opcode_patterns): New patterns for 68HC12.
- (m6811_page1_opcodes): Remove duplicate entries.
- (m6811_page2_opcodes): Likewise.
- (m6811_page3_opcodes): Likewise.
- (m6811_page4_opcodes): Likewise.
- (m6812_page1_opcodes): New table for 68HC12 instructions.
- (m6812_page2_opcodes): Likewise.
- (gen_fetch_operands): New modes [] and &[] for 68HC12 operands.
- (gen_save_result): Likewise.
- (gen_interpreter_for_table): Handle 68HC11 and 68HC12 opcodes.
- (cmp_opcode): New function for opcode comparision.
- (prepare_table): Sort the opcodes.
- (gen_interpreter): Prepare all the tables and generate either
- a 68HC11 or a 68HC12 simulator.
- (main): New options -m6811 and -m6812.
-
- * m68hc11_sim.c (cpu_single_step): Use pointer to cpu interpretor.
- (cpu_special): Simulation of some 68HC12 instructions.
- (cpu_exg): New function.
- (cpu_dbcc): Likewise.
- (cpu_fetch_relbranch16): Likewise.
- (cpu_push_all): Push according to 68HC11 or 68HC12.
- (cpu_move16): Likewise.
- (cpu_move8): Likewise.
- (cpu_get_indexed_operand16): Likewise.
- (cpu_get_indexed_operand8): Likewise.
- (cpu_get_indexed_operand_addr): Likewise.
- (cpu_set_reg, cpu_set_dst_reg, cpu_get_src_reg, cpu_get_reg): Likewise.
- (cpu_reset): Setup INIT register according to architecture.
-
- * sim-main.h (M6811_Special): Add 68HC12 specific instructions.
- (_sim_cpu): Keep track of the cpu being simulated.
- (cpu_get_tmp3, cpu_get_tmp2, cpu_set_tmp3, cpu_set_tmp2): New.
- (cpu_m68hc11_push_uintxx): Rename of cpu_push_uintxx.
- (cpu_m68hc11_pop_uint8): Likewise.
- (cpu_m68hc12_push_uintxx): New functions for 68HC12.
- (cpu_m68hc12_pop_uintxx): Likewise.
- (cpu_exg, cpu_dbcc, cpu_move8, cpu_move16): Likewise,
- (cpu_fetch_relbranch16): Likewise.
- (cpu_interp_m6811): Rename of cpu_interp.
- (cpu_interp_m6812): New function.
- * interp.c (free_state): New function.
- (dev_list_68hc12): New table.
- (sim_board_reset): Reset depending on the cpu (HC11 or HC12).
- (sim_hw_configure): New function.
- (sim_prepare_for_program): New function.
- (sim_open): Use above new functions.
- (sim_close): Call free_state().
- (sim_info): Print info according to cpu.
- (sim_create_inferior): Use sim_prepare_for_program.
- (sim_do_command): Configure the hardware after a change of the
- architecture.
-
-2001-05-20 Stephane Carrez <Stephane.Carrez@worldnet.fr>
-
- * dv-m68hc11sio.c (m68hc11sio_tx_poll): Always check for
- pending interrupts.
- * interrupts.c (interrupts_process): Keep track of the last number
- of masked insn cycles.
- (interrupts_initialize): Clear last number of masked insn cycles.
- (interrupts_info): Report them.
- (interrupts_update_pending): Compute clear and set masks of
- interrupts and clear the interrupt bits before setting them
- (due to SCI interrupt sharing).
- * interrupts.h (struct interrupts): New members last_mask_cycles
- and xirq_last_mask_cycles.
-
-2000-11-26 Stephane Carrez <Stephane.Carrez@worldnet.fr>
-
- * dv-m68hc11.c (m68hc11cpu_io_read_buffer): Use attach_size
- instead of a hard-coded value.
- (m68hc11cpu_io_write_buffer): Likewise.
- (dv_m68hc11_descriptor): Define a 68hc12 device.
- * dv-m68hc11eepr.c (dv_m68hc11eepr_descriptor): Likewise.
- * dv-m68hc11tim.c (dv_m68hc11tim_descriptor): Likewise.
- * dv-m68hc11spi.c (dv_m68hc11spi_descriptor): Likewise.
- * dv-m68hc11sio.c (dv_m68hc11sio_descriptor): Likewise.
-
-2000-11-22 Stephane Carrez <Stephane.Carrez@worldnet.fr>
-
- * dv-m68hc11.c (attach_m68hc11_regs): Register a delete handler.
- (m68hc11cpu_delete): Delete handler to detach the address space.
-
-2000-11-24 Stephane Carrez <Stephane.Carrez@worldnet.fr>
-
- * dv-m68hc11eepr.c (attach_m68hc11eepr_regs): Use hw_malloc.
- * dv-nvram.c (attach_nvram_regs): Use hw_free and hw_malloc
- instead of free and malloc.
-
-2000-09-11 Stephane Carrez <Stephane.Carrez@worldnet.fr>
-
- * Makefile.in: Was missing from initial patch.
-
-2000-09-10 Stephane Carrez <Stephane.Carrez@worldnet.fr>
-
- * interp.c (sim_store_register): Remove soft register hack.
- (sim_fetch_register): Likewise.
- (sim_create_inferior): Likewise.
- * sim-main.h: Likewise.
-
-2000-09-10 Stephane Carrez <Stephane.Carrez@worldnet.fr>
-
- * interrupts.c (interrupts_update_pending): Clear the mask of
- pending interrupts here.
- (interrupts_get_current): Don't clear the mask of pending interrupts.
-
-2000-09-10 Stephane Carrez <Stephane.Carrez@worldnet.fr>
-
- * sim-main.h: Define cycle_to_string.
- * dv-m68hc11tim.c (cycle_to_string): New function to translate
- the cpu cycle into some formatted time string.
- (m68hc11tim_print_timer): Use it.
- * dv-m68hc11sio.c (m68hc11sio_info): Use cycle_to_string.
- * dv-m68hc11spi.c (m68hc11spi_info): Likewise.
- * interrupts.c (interrupts_info): Likewise.
- * m68hc11_sim.c (cpu_info): Likewise.
-
-2000-09-06 Stephane Carrez <Stephane.Carrez@worldnet.fr>
-
- * dv-m68hc11tim.c (m68hc11tim_timer_event): Compute the overflow
- interrupt and compare events accurately. Take into account the
- pending ticks not processed by the simulator yet (introduced a shift).
- (m68hc11_port_event): Reset the timer interrupt delays.
- (m68hc11tim_io_read_buffer): Be able to read several bytes.
- (m68hc11tim_io_write_buffer): Likewise for write.
- (m68hc11tim_io_write_buffer): Recompute the timer overflow interrupt.
-
-2000-09-06 Stephane Carrez <Stephane.Carrez@worldnet.fr>
-
- * dv-m68hc11spi.c (m68hc11spi_io_read_buffer): Clear the interrupts.
- (m68hc11spi_io_write_buffer): Likewise and fix the spi frame.
- (m68hc11spi_info): Clarify the status report
- of the SPI when a byte is being sent.
- (m68hc11spi_clock): Fix the spi send frame.
-
-2000-08-11 Stephane Carrez <Stephane.Carrez@worldnet.fr>
-
- * sim-main.h (m68hc11_map_level): Define level of address mappings.
- * dv-m68hc11eepr.c (struct m68hc11eepr ): New flag to indicate
- whether the eeprom is currently mapped or not.
- (m68hc11eepr_port_event): Use the flag to see if we must unmap
- or map the eeprom. Update the flag to reflect the current state.
- Use M6811_EEPROM_LEVEL when mapping the eeprom.
- (m68hc11eepr_finish): Remove overlap hack.
- (attach_m68hc11eepr_regs): Use M6811_IO_LEVEL when mapping the
- config and control registers.
- * dv-m68hc11.c (m68hc11cpu_finish): Remove overlap hack.
- (attach_m68hc11_regs): Use M6811_IO_LEVEL.
- (m68hc11cpu_io_write): Likewise when unmapping and re-mapping.
- * dv-m68hc11spi.c (m68hc11spi_finish): Likewise.
- (attach_m68hc11spi_regs): Likewise.
- * dv-m68hc11tim.c (m68hc11tim_finish): Likewise.
- (attach_m68hc11tim_regs): Likewise.
- * dv-m68hc11sio.c (m68hc11sio_finish): Likewise.
- (attach_m68hc11sio_regs): Likewise.
- * interp.c (sim_open): Likewise.
- * dv-nvram.c (attach_nvram_regs): Likewise.
-
-Thu Jul 27 21:27:25 2000 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure, config.in: Regenerate.
-
-2000-06-25 Stephane Carrez <Stephane.Carrez@worldnet.fr>
-
- * Makefile.in (SIM_RUN_OBJS): Define to use nrun.c
- * dv-m68hc11.c (m68hc11cpu_finish): Register detach address callback.
- (dv_m6811_detach_address_callback): New function to detach a
- device from an address space.
- * dv-m68hc11eepr.c (m68hc11eepr_port_event): Initialize
- config register according to --cpu-config option.
- * sim-main.h (_sim_cpu): Add cpu_config member.
- * interp.c (sim_open): Delete specific simulator options.
- * m68hc11_sim.c (cpu_option_handler): New options
- --emulos and -cpu-config <val> to configure the simulator.
- (cpu_initialize): Initialize cpu_config member.
-
-2000-06-24 Stephane Carrez <Stephane.Carrez@worldnet.fr>
-
- * emulos.c: Fix indentation and comments.
- * gencode.c: Likewise.
- * dv-m68hc11tim.c (m68hc11tim_timer_event): Handle COMPARE_EVENT.
- (m68hc11tim_io_write_buffer): Write compare registers and
- setup compare event.
- * interp.c: Remove unused global variables.
- * interrupts.c (idefs): New compare interrupts.
- Fix indentation and comments.
- * interrupts.h: Likewise.
-
-2000-06-18 Stephane Carrez <Stephane.Carrez@worldnet.fr>
-
- * dv-m68hc11sio.c: Fix indentation and comments.
- Remove INT_PORT.
- * dv-m68hc11.c: Fix indentation and comments.
- (m68hc11cpu_port_event): Move initialization of M6811_HPRIO from here.
- * m68hc11_sim.c (cpu_reset): To here.
- * dv-m68hc11eepr.c: Fix indentation and comments.
-
-2000-06-17 Stephane Carrez <Stephane.Carrez@worldnet.fr>
-
- * dv-nvram.c: New file, rename from dv-pram.c.
- * dv-pram.c: Delete file.
- * sim-main.h: Incorporate m68hc11_sim.h.
- * m68hc11_sim.h: Delete file.
- * configure.in: Rename pram into nvram.
- * interp.c (sim_open): Likewise in creation of device tree.
-
-2000-05-31 Stephane Carrez <Stephane.Carrez@worldnet.fr>
-
- * interp.c (sim_open): Create the SPI device.
- * dv-m68hc11spi.c: New file for SPI device simulation.
- * configure.in (hw_extra_devices): Add SPI device.
-
-2000-05-28 Stephane Carrez <Stephane.Carrez@worldnet.fr>
-
- * interrupts.c (interrupts_initialize): Clear XIRQ accounting.
- (interrupts_process): Separate IRQ and XIRQ accounting.
- (interrupts_info): Report XIRQ accounting.
- * interrupts.h (struct interrupts): Added accounting for XIRQ.
-
-2000-04-16 Stephane Carrez <stcarrez@worldnet.fr>
-
- * dv-pram.c (attach_pram_regs): Fix the 'save-modified' mode.
- * m68hc11_sim.h (_sim_cpu): Allow configuration of cpu mode.
- * dv-m68hc11.c (attach_m68hc11_regs): Get the cpu MODA,MODB
- configuration from the 'mode' device tree property.
- (m68hc11cpu_port_event): Reset M6811_HPRIO to the cpu MODA, MODB
- configuration.
-
-2000-02-24 Stephane Carrez <stcarrez@worldnet.fr>
-
- * sim-main.h: Remove WITH_TARGET_* defines.
- * Makefile.in (SIM_EXTRA_CFLAGS): Specify the WITH_TARGET_* flags.
-
-2000-02-08 Stephane Carrez <stcarrez@worldnet.fr>
-
- * dv-m68hc11sio.c (m68hc11sio_port_event): Setup the SCI to
- 1200 baud when cpu is in bootstrap mode.
-
- * dv-m68hc11tim.c (m68hc11tim_io_write_buffer): Be able to
- write in the TCTN timer register.
-
- * dv-m68hc11sio.c (m68hc11sio_io_write_buffer): Divide cpu clock
- by 4 to obtain the E clock frequency.
- (sccr2_desc): Use M6811_TIE for TIE bit.
- (m68hc11sio_info): Fix baud rate report.
-
- * dv-m68hc11tim.c (to_realtime): Likewise.
-
- * interp.c (sim_open): When building device tree, only provide
- devices that do not exist yet.
-
- * emulos.c: Fix compilation pb under Windows.
-
- * dv-m68hc11.c (attach_m68hc11_regs): Get the clock frequency
- from the 'clock' property.
-
-2000-01-02 Stephane Carrez <stcarrez@worldnet.fr>
-
- * m68hc11_sim.h (*_REGNUM): Define.
- (_sim_cpu): New member cpu_page0_reg table.
- * interp.c (sim_create_inferior): Fill the cpu_page0_reg table with
- addresses of soft registers in .page0.
- (sim_fetch_register, sim_store_register): Use cpu_page0_reg table
- to get/set soft registers.
-
-1999-12-31 Stephane Carrez <stcarrez@worldnet.fr>
-
- * dv-m68hc11.c (m68hc11cpu_io_write_buffer): Clear byte to avoid
- returning random values.
-
-1999-12-17 Stephane Carrez <stcarrez@worldnet.fr>
-
- * gencode.c: Fix "subb N,x" that used a instead of b.
-
-1999-09-09 Stephane Carrez <stcarrez@worldnet.fr>
-
- * gencode.c: Fixed sbc8 and adc8 when there was a initial carry.
-
-1999-09-01 Stephane Carrez <stcarrez@worldnet.fr>
-
- * sim-main.h (SIM_HANDLES_LMA): Define to enable loading using lma.
-
-1999-08-14 Stephane Carrez <stcarrez@worldnet.fr>
-
- * dv-m68hc11.c (attach_m68hc11_regs): Save the size of the
- register region in the m68hc11cpu struct.
- (m68hc11cpu_io_write): When the IO mapping addres changes,
- detach the register region and re-attach it at the new address.
- (m68hc11cpu_io_read_buffer): Renamed base_address into
- attach_address.
- (m68hc11cpu_io_write_buffer): Likewise. Pass the hw pointer
- to m68hc11cpu_io_write.
-
-1999-08-13 Stephane Carrez <stcarrez@worldnet.fr>
-
- * gencode.c: For sbc8, check the carry and increment the source
- before trying to set the carry for the result.
-
-1999-05-24 John S. Kallal <kallal@voicenet.com>
-
- * interp.c (sim_get_info): Don't crash if the command line is 0.
- Define prototype for sim_get_info() and init_system().
- (sim_info): Correct call to sim_get_info().
-
-1999-05-16 Stephane Carrez <stcarrez@worldnet.fr>
-
- * configure.in: Recognize m6811-*-*.
- * configure: Regenerate.
- * m68hc11_sim.h (cpu_ccr_update_add8, cpu_ccr_update_add16,
- cpu_ccr_update_sub8, cpu_ccr_update_sub16):
- Correct the computation of carry of 8 and 16-bits add and subtract.
- * gencode.c: Use cpu_ccr_update_sub8 for subtraction (carry and
- overflow set in a different manner than add).
-
-1999-05-14 Stephane Carrez <stcarrez@worldnet.fr>
-
- * dv-m68hc11.c (dv_m6811_attach_address_callback): Removed a
- trace message.
- * interp.c (sim_open, sim_create_inferior): Initialize the
- cpu_elf_start from the ELF header.
- * m68hc11_sim.c (cpu_initialize): Clear the new data members.
- (cpu_restart): Use cpu_elf_start as the starting address when
- the flag is set.
- (cpu_special): When cpu_use_elf_start is set, the WAI instruction
- exits the simulator (exit status is in D).
- * m68hc11_sim.h (_sim_cpu): Added members cpu_use_elf_start and
- cpu_elf_star to start execution at address specified in ELF file.
-
-1999-05-02 Stephane Carrez <stcarrez@worldnet.fr>
-
- * Makefile.in, config.in, configure, configure.in: New files.
- * gencode.c: New file, generation of 68HC11 interpreter.
- * m68hc11_sim.h, m68hc11_sim.c: New files, specific operations
- for interpreter.
- * interrupts.c, interrupts.h: New files, management of interrupts.
- * interp.c, sim-main.h,
- * dv-m68hc11.c, dv-m68hc11eepr.c, dv-m68hc11sio.c,
- dv-m68hc11tim.c, dv-pram.c: New files representing devices for
- 68HC11 (dv-pram.c is generic and could probably migrate to common).
- * emulos.c: New file, basic emulation of some os.
diff --git a/sim/m68hc11/Makefile.in b/sim/m68hc11/Makefile.in
deleted file mode 100644
index d2fe599a9f4..00000000000
--- a/sim/m68hc11/Makefile.in
+++ /dev/null
@@ -1,64 +0,0 @@
-# Makefile template for Configure for the 68HC11 sim library.
-# Copyright (C) 1999, 2000, 2001 Free Software Foundation, Inc.
-# Written by Cygnus Support.
-#
-# This program is free software; you can redistribute it and/or modify
-# it under the terms of the GNU General Public License as published by
-# the Free Software Foundation; either version 2 of the License, or
-# (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
-## COMMON_PRE_CONFIG_FRAG
-
-M68HC11_OBJS = interp.o m68hc11int.o m68hc12int.o \
- emulos.o interrupts.o m68hc11_sim.o
-
-# List of main object files for `run'.
-SIM_RUN_OBJS = nrun.o
-
-SIM_OBJS = $(M68HC11_OBJS) \
- $(SIM_NEW_COMMON_OBJS) \
- sim-load.o \
- sim-hload.o \
- sim-engine.o \
- sim-stop.o \
- sim-resume.o \
- sim-hrw.o \
- sim-reason.o \
- $(SIM_EXTRA_OBJS)
-
-SIM_PROFILE= -DPROFILE=1 -DWITH_PROFILE=-1
-SIM_EXTRA_CFLAGS = -DWITH_TARGET_WORD_BITSIZE=16 \
- -DWITH_TARGET_CELL_BITSIZE=32 \
- -DWITH_TARGET_WORD_MSB=15
-SIM_EXTRA_CLEAN = clean-extra
-
-SIM_EXTRA_OBJS = @m68hc11_extra_objs@
-
-INCLUDE = $(srcdir)/../../include/callback.h \
- interrupts.h sim-main.h
-
-
-## COMMON_POST_CONFIG_FRAG
-
-m68hc11int.c: gencode
- ./gencode -m6811 > $@
-
-m68hc12int.c: gencode
- ./gencode -m6812 > $@
-
-gencode: gencode.c
- $(CC_FOR_BUILD) $(BUILD_CFLAGS) -o gencode gencode.c
-
-interp.o: interp.c $(INCLUDE)
-
-clean-extra:
- rm -f gencode m68hc11int.c
diff --git a/sim/m68hc11/config.in b/sim/m68hc11/config.in
deleted file mode 100644
index dbd6508d118..00000000000
--- a/sim/m68hc11/config.in
+++ /dev/null
@@ -1,174 +0,0 @@
-/* config.in. Generated automatically from configure.in by autoheader. */
-
-/* Define if using alloca.c. */
-#undef C_ALLOCA
-
-/* Define to empty if the keyword does not work. */
-#undef const
-
-/* Define to one of _getb67, GETB67, getb67 for Cray-2 and Cray-YMP systems.
- This function is required for alloca.c support on those systems. */
-#undef CRAY_STACKSEG_END
-
-/* Define if you have alloca, as a function or macro. */
-#undef HAVE_ALLOCA
-
-/* Define if you have <alloca.h> and it should be used (not on Ultrix). */
-#undef HAVE_ALLOCA_H
-
-/* Define if you have a working `mmap' system call. */
-#undef HAVE_MMAP
-
-/* Define as __inline if that's what the C compiler calls it. */
-#undef inline
-
-/* Define to `long' if <sys/types.h> doesn't define. */
-#undef off_t
-
-/* Define if you need to in order for stat and other things to work. */
-#undef _POSIX_SOURCE
-
-/* Define as the return type of signal handlers (int or void). */
-#undef RETSIGTYPE
-
-/* Define to `unsigned' if <sys/types.h> doesn't define. */
-#undef size_t
-
-/* If using the C implementation of alloca, define if you know the
- direction of stack growth for your system; otherwise it will be
- automatically deduced at run-time.
- STACK_DIRECTION > 0 => grows toward higher addresses
- STACK_DIRECTION < 0 => grows toward lower addresses
- STACK_DIRECTION = 0 => direction of growth unknown
- */
-#undef STACK_DIRECTION
-
-/* Define if you have the ANSI C header files. */
-#undef STDC_HEADERS
-
-/* Define if your processor stores words with the most significant
- byte first (like Motorola and SPARC, unlike Intel and VAX). */
-#undef WORDS_BIGENDIAN
-
-/* Define to 1 if NLS is requested. */
-#undef ENABLE_NLS
-
-/* Define as 1 if you have gettext and don't want to use GNU gettext. */
-#undef HAVE_GETTEXT
-
-/* Define as 1 if you have the stpcpy function. */
-#undef HAVE_STPCPY
-
-/* Define if your locale.h file contains LC_MESSAGES. */
-#undef HAVE_LC_MESSAGES
-
-/* Define if you have the __argz_count function. */
-#undef HAVE___ARGZ_COUNT
-
-/* Define if you have the __argz_next function. */
-#undef HAVE___ARGZ_NEXT
-
-/* Define if you have the __argz_stringify function. */
-#undef HAVE___ARGZ_STRINGIFY
-
-/* Define if you have the __setfpucw function. */
-#undef HAVE___SETFPUCW
-
-/* Define if you have the aint function. */
-#undef HAVE_AINT
-
-/* Define if you have the anint function. */
-#undef HAVE_ANINT
-
-/* Define if you have the dcgettext function. */
-#undef HAVE_DCGETTEXT
-
-/* Define if you have the getcwd function. */
-#undef HAVE_GETCWD
-
-/* Define if you have the getpagesize function. */
-#undef HAVE_GETPAGESIZE
-
-/* Define if you have the getrusage function. */
-#undef HAVE_GETRUSAGE
-
-/* Define if you have the munmap function. */
-#undef HAVE_MUNMAP
-
-/* Define if you have the putenv function. */
-#undef HAVE_PUTENV
-
-/* Define if you have the setenv function. */
-#undef HAVE_SETENV
-
-/* Define if you have the setlocale function. */
-#undef HAVE_SETLOCALE
-
-/* Define if you have the sigaction function. */
-#undef HAVE_SIGACTION
-
-/* Define if you have the sqrt function. */
-#undef HAVE_SQRT
-
-/* Define if you have the stpcpy function. */
-#undef HAVE_STPCPY
-
-/* Define if you have the strcasecmp function. */
-#undef HAVE_STRCASECMP
-
-/* Define if you have the strchr function. */
-#undef HAVE_STRCHR
-
-/* Define if you have the time function. */
-#undef HAVE_TIME
-
-/* Define if you have the <argz.h> header file. */
-#undef HAVE_ARGZ_H
-
-/* Define if you have the <fcntl.h> header file. */
-#undef HAVE_FCNTL_H
-
-/* Define if you have the <fpu_control.h> header file. */
-#undef HAVE_FPU_CONTROL_H
-
-/* Define if you have the <limits.h> header file. */
-#undef HAVE_LIMITS_H
-
-/* Define if you have the <locale.h> header file. */
-#undef HAVE_LOCALE_H
-
-/* Define if you have the <malloc.h> header file. */
-#undef HAVE_MALLOC_H
-
-/* Define if you have the <nl_types.h> header file. */
-#undef HAVE_NL_TYPES_H
-
-/* Define if you have the <stdlib.h> header file. */
-#undef HAVE_STDLIB_H
-
-/* Define if you have the <string.h> header file. */
-#undef HAVE_STRING_H
-
-/* Define if you have the <strings.h> header file. */
-#undef HAVE_STRINGS_H
-
-/* Define if you have the <sys/param.h> header file. */
-#undef HAVE_SYS_PARAM_H
-
-/* Define if you have the <sys/resource.h> header file. */
-#undef HAVE_SYS_RESOURCE_H
-
-/* Define if you have the <sys/time.h> header file. */
-#undef HAVE_SYS_TIME_H
-
-/* Define if you have the <time.h> header file. */
-#undef HAVE_TIME_H
-
-/* Define if you have the <unistd.h> header file. */
-#undef HAVE_UNISTD_H
-
-/* Define if you have the <values.h> header file. */
-#undef HAVE_VALUES_H
-
-/* Define if you have the m library (-lm). */
-#undef HAVE_LIBM
diff --git a/sim/m68hc11/configure b/sim/m68hc11/configure
deleted file mode 100755
index e6366119cf1..00000000000
--- a/sim/m68hc11/configure
+++ /dev/null
@@ -1,4353 +0,0 @@
-#! /bin/sh
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-sim_inline="-DDEFAULT_INLINE=0"
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-# This file is derived from `gettext.m4'. The difference is that the
-# included macros assume Cygnus-style source and build trees.
-
-# Macro to add for using GNU gettext.
-# Ulrich Drepper <drepper@cygnus.com>, 1995.
-#
-# This file file be copied and used freely without restrictions. It can
-# be used in projects which are not available under the GNU Public License
-# but which still want to provide support for the GNU gettext functionality.
-# Please note that the actual code is *not* freely available.
-
-# serial 3
-
-
-
-
-
-# Search path for a program which passes the given test.
-# Ulrich Drepper <drepper@cygnus.com>, 1996.
-#
-# This file file be copied and used freely without restrictions. It can
-# be used in projects which are not available under the GNU Public License
-# but which still want to provide support for the GNU gettext functionality.
-# Please note that the actual code is *not* freely available.
-
-# serial 1
-
-
-
-# Check whether LC_MESSAGES is available in <locale.h>.
-# Ulrich Drepper <drepper@cygnus.com>, 1995.
-#
-# This file file be copied and used freely without restrictions. It can
-# be used in projects which are not available under the GNU Public License
-# but which still want to provide support for the GNU gettext functionality.
-# Please note that the actual code is *not* freely available.
-
-# serial 1
-
-
-
-
-
-
-# Guess values for system-dependent variables and create Makefiles.
-# Generated automatically using autoconf version 2.13
-# Copyright (C) 1992, 93, 94, 95, 96 Free Software Foundation, Inc.
-#
-# This configure script is free software; the Free Software Foundation
-# gives unlimited permission to copy, distribute and modify it.
-
-# Defaults:
-ac_help=
-ac_default_prefix=/usr/local
-# Any additions from configure.in:
-ac_help="$ac_help
- --disable-nls do not use Native Language Support"
-ac_help="$ac_help
- --with-included-gettext use the GNU gettext library included here"
-ac_help="$ac_help
- --enable-maintainer-mode Enable developer functionality."
-ac_help="$ac_help
- --enable-sim-bswap Use Host specific BSWAP instruction."
-ac_help="$ac_help
- --enable-sim-cflags=opts Extra CFLAGS for use in building simulator"
-ac_help="$ac_help
- --enable-sim-debug=opts Enable debugging flags"
-ac_help="$ac_help
- --enable-sim-stdio Specify whether to use stdio for console input/output."
-ac_help="$ac_help
- --enable-sim-trace=opts Enable tracing flags"
-ac_help="$ac_help
- --enable-sim-profile=opts Enable profiling flags"
-ac_help="$ac_help
- --enable-sim-inline=inlines Specify which functions should be inlined."
-ac_help="$ac_help
- --enable-sim-alignment=align Specify strict, nonstrict or forced alignment of memory accesses."
-ac_help="$ac_help
- --enable-sim-hostendian=end Specify host byte endian orientation."
-ac_help="$ac_help
- --enable-build-warnings[=LIST] Enable build-time compiler warnings"
-ac_help="$ac_help
- --enable-sim-hardware=LIST Specify the hardware to be included in the build."
-
-# Initialize some variables set by options.
-# The variables have the same names as the options, with
-# dashes changed to underlines.
-build=NONE
-cache_file=./config.cache
-exec_prefix=NONE
-host=NONE
-no_create=
-nonopt=NONE
-no_recursion=
-prefix=NONE
-program_prefix=NONE
-program_suffix=NONE
-program_transform_name=s,x,x,
-silent=
-site=
-sitefile=
-srcdir=
-target=NONE
-verbose=
-x_includes=NONE
-x_libraries=NONE
-bindir='${exec_prefix}/bin'
-sbindir='${exec_prefix}/sbin'
-libexecdir='${exec_prefix}/libexec'
-datadir='${prefix}/share'
-sysconfdir='${prefix}/etc'
-sharedstatedir='${prefix}/com'
-localstatedir='${prefix}/var'
-libdir='${exec_prefix}/lib'
-includedir='${prefix}/include'
-oldincludedir='/usr/include'
-infodir='${prefix}/info'
-mandir='${prefix}/man'
-
-# Initialize some other variables.
-subdirs=
-MFLAGS= MAKEFLAGS=
-SHELL=${CONFIG_SHELL-/bin/sh}
-# Maximum number of lines to put in a shell here document.
-ac_max_here_lines=12
-
-ac_prev=
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-do
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- # If the previous option needs an argument, assign it.
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- case "$ac_option" in
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- esac
-
- # Accept the important Cygnus configure options, so we can diagnose typos.
-
- case "$ac_option" in
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- ac_prev=bindir ;;
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-
-if test $ac_cv_header_stdc = yes; then
- # ISC 2.0.2 stdlib.h does not declare free, contrary to ANSI.
-cat > conftest.$ac_ext <<EOF
-#line 865 "configure"
-#include "confdefs.h"
-#include <stdlib.h>
-EOF
-if (eval "$ac_cpp conftest.$ac_ext") 2>&5 |
- egrep "free" >/dev/null 2>&1; then
- :
-else
- rm -rf conftest*
- ac_cv_header_stdc=no
-fi
-rm -f conftest*
-
-fi
-
-if test $ac_cv_header_stdc = yes; then
- # /bin/cc in Irix-4.0.5 gets non-ANSI ctype macros unless using -ansi.
-if test "$cross_compiling" = yes; then
- :
-else
- cat > conftest.$ac_ext <<EOF
-#line 886 "configure"
-#include "confdefs.h"
-#include <ctype.h>
-#define ISLOWER(c) ('a' <= (c) && (c) <= 'z')
-#define TOUPPER(c) (ISLOWER(c) ? 'A' + ((c) - 'a') : (c))
-#define XOR(e, f) (((e) && !(f)) || (!(e) && (f)))
-int main () { int i; for (i = 0; i < 256; i++)
-if (XOR (islower (i), ISLOWER (i)) || toupper (i) != TOUPPER (i)) exit(2);
-exit (0); }
-
-EOF
-if { (eval echo configure:897: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null
-then
- :
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -fr conftest*
- ac_cv_header_stdc=no
-fi
-rm -fr conftest*
-fi
-
-fi
-fi
-
-echo "$ac_t""$ac_cv_header_stdc" 1>&6
-if test $ac_cv_header_stdc = yes; then
- cat >> confdefs.h <<\EOF
-#define STDC_HEADERS 1
-EOF
-
-fi
-
-echo $ac_n "checking for working const""... $ac_c" 1>&6
-echo "configure:921: checking for working const" >&5
-if eval "test \"`echo '$''{'ac_cv_c_const'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 926 "configure"
-#include "confdefs.h"
-
-int main() {
-
-/* Ultrix mips cc rejects this. */
-typedef int charset[2]; const charset x;
-/* SunOS 4.1.1 cc rejects this. */
-char const *const *ccp;
-char **p;
-/* NEC SVR4.0.2 mips cc rejects this. */
-struct point {int x, y;};
-static struct point const zero = {0,0};
-/* AIX XL C 1.02.0.0 rejects this.
- It does not let you subtract one const X* pointer from another in an arm
- of an if-expression whose if-part is not a constant expression */
-const char *g = "string";
-ccp = &g + (g ? g-g : 0);
-/* HPUX 7.0 cc rejects these. */
-++ccp;
-p = (char**) ccp;
-ccp = (char const *const *) p;
-{ /* SCO 3.2v4 cc rejects this. */
- char *t;
- char const *s = 0 ? (char *) 0 : (char const *) 0;
-
- *t++ = 0;
-}
-{ /* Someone thinks the Sun supposedly-ANSI compiler will reject this. */
- int x[] = {25, 17};
- const int *foo = &x[0];
- ++foo;
-}
-{ /* Sun SC1.0 ANSI compiler rejects this -- but not the above. */
- typedef const int *iptr;
- iptr p = 0;
- ++p;
-}
-{ /* AIX XL C 1.02.0.0 rejects this saying
- "k.c", line 2.27: 1506-025 (S) Operand must be a modifiable lvalue. */
- struct s { int j; const int *ap[3]; };
- struct s *b; b->j = 5;
-}
-{ /* ULTRIX-32 V3.1 (Rev 9) vcc rejects this */
- const int foo = 10;
-}
-
-; return 0; }
-EOF
-if { (eval echo configure:975: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
- rm -rf conftest*
- ac_cv_c_const=yes
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- ac_cv_c_const=no
-fi
-rm -f conftest*
-fi
-
-echo "$ac_t""$ac_cv_c_const" 1>&6
-if test $ac_cv_c_const = no; then
- cat >> confdefs.h <<\EOF
-#define const
-EOF
-
-fi
-
-echo $ac_n "checking for inline""... $ac_c" 1>&6
-echo "configure:996: checking for inline" >&5
-if eval "test \"`echo '$''{'ac_cv_c_inline'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- ac_cv_c_inline=no
-for ac_kw in inline __inline__ __inline; do
- cat > conftest.$ac_ext <<EOF
-#line 1003 "configure"
-#include "confdefs.h"
-
-int main() {
-} $ac_kw foo() {
-; return 0; }
-EOF
-if { (eval echo configure:1010: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
- rm -rf conftest*
- ac_cv_c_inline=$ac_kw; break
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
-fi
-rm -f conftest*
-done
-
-fi
-
-echo "$ac_t""$ac_cv_c_inline" 1>&6
-case "$ac_cv_c_inline" in
- inline | yes) ;;
- no) cat >> confdefs.h <<\EOF
-#define inline
-EOF
- ;;
- *) cat >> confdefs.h <<EOF
-#define inline $ac_cv_c_inline
-EOF
- ;;
-esac
-
-echo $ac_n "checking for off_t""... $ac_c" 1>&6
-echo "configure:1036: checking for off_t" >&5
-if eval "test \"`echo '$''{'ac_cv_type_off_t'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1041 "configure"
-#include "confdefs.h"
-#include <sys/types.h>
-#if STDC_HEADERS
-#include <stdlib.h>
-#include <stddef.h>
-#endif
-EOF
-if (eval "$ac_cpp conftest.$ac_ext") 2>&5 |
- egrep "(^|[^a-zA-Z_0-9])off_t[^a-zA-Z_0-9]" >/dev/null 2>&1; then
- rm -rf conftest*
- ac_cv_type_off_t=yes
-else
- rm -rf conftest*
- ac_cv_type_off_t=no
-fi
-rm -f conftest*
-
-fi
-echo "$ac_t""$ac_cv_type_off_t" 1>&6
-if test $ac_cv_type_off_t = no; then
- cat >> confdefs.h <<\EOF
-#define off_t long
-EOF
-
-fi
-
-echo $ac_n "checking for size_t""... $ac_c" 1>&6
-echo "configure:1069: checking for size_t" >&5
-if eval "test \"`echo '$''{'ac_cv_type_size_t'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1074 "configure"
-#include "confdefs.h"
-#include <sys/types.h>
-#if STDC_HEADERS
-#include <stdlib.h>
-#include <stddef.h>
-#endif
-EOF
-if (eval "$ac_cpp conftest.$ac_ext") 2>&5 |
- egrep "(^|[^a-zA-Z_0-9])size_t[^a-zA-Z_0-9]" >/dev/null 2>&1; then
- rm -rf conftest*
- ac_cv_type_size_t=yes
-else
- rm -rf conftest*
- ac_cv_type_size_t=no
-fi
-rm -f conftest*
-
-fi
-echo "$ac_t""$ac_cv_type_size_t" 1>&6
-if test $ac_cv_type_size_t = no; then
- cat >> confdefs.h <<\EOF
-#define size_t unsigned
-EOF
-
-fi
-
-# The Ultrix 4.2 mips builtin alloca declared by alloca.h only works
-# for constant arguments. Useless!
-echo $ac_n "checking for working alloca.h""... $ac_c" 1>&6
-echo "configure:1104: checking for working alloca.h" >&5
-if eval "test \"`echo '$''{'ac_cv_header_alloca_h'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1109 "configure"
-#include "confdefs.h"
-#include <alloca.h>
-int main() {
-char *p = alloca(2 * sizeof(int));
-; return 0; }
-EOF
-if { (eval echo configure:1116: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- rm -rf conftest*
- ac_cv_header_alloca_h=yes
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- ac_cv_header_alloca_h=no
-fi
-rm -f conftest*
-fi
-
-echo "$ac_t""$ac_cv_header_alloca_h" 1>&6
-if test $ac_cv_header_alloca_h = yes; then
- cat >> confdefs.h <<\EOF
-#define HAVE_ALLOCA_H 1
-EOF
-
-fi
-
-echo $ac_n "checking for alloca""... $ac_c" 1>&6
-echo "configure:1137: checking for alloca" >&5
-if eval "test \"`echo '$''{'ac_cv_func_alloca_works'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1142 "configure"
-#include "confdefs.h"
-
-#ifdef __GNUC__
-# define alloca __builtin_alloca
-#else
-# ifdef _MSC_VER
-# include <malloc.h>
-# define alloca _alloca
-# else
-# if HAVE_ALLOCA_H
-# include <alloca.h>
-# else
-# ifdef _AIX
- #pragma alloca
-# else
-# ifndef alloca /* predefined by HP cc +Olibcalls */
-char *alloca ();
-# endif
-# endif
-# endif
-# endif
-#endif
-
-int main() {
-char *p = (char *) alloca(1);
-; return 0; }
-EOF
-if { (eval echo configure:1170: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- rm -rf conftest*
- ac_cv_func_alloca_works=yes
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- ac_cv_func_alloca_works=no
-fi
-rm -f conftest*
-fi
-
-echo "$ac_t""$ac_cv_func_alloca_works" 1>&6
-if test $ac_cv_func_alloca_works = yes; then
- cat >> confdefs.h <<\EOF
-#define HAVE_ALLOCA 1
-EOF
-
-fi
-
-if test $ac_cv_func_alloca_works = no; then
- # The SVR3 libPW and SVR4 libucb both contain incompatible functions
- # that cause trouble. Some versions do not even contain alloca or
- # contain a buggy version. If you still want to use their alloca,
- # use ar to extract alloca.o from them instead of compiling alloca.c.
- ALLOCA=alloca.${ac_objext}
- cat >> confdefs.h <<\EOF
-#define C_ALLOCA 1
-EOF
-
-
-echo $ac_n "checking whether alloca needs Cray hooks""... $ac_c" 1>&6
-echo "configure:1202: checking whether alloca needs Cray hooks" >&5
-if eval "test \"`echo '$''{'ac_cv_os_cray'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1207 "configure"
-#include "confdefs.h"
-#if defined(CRAY) && ! defined(CRAY2)
-webecray
-#else
-wenotbecray
-#endif
-
-EOF
-if (eval "$ac_cpp conftest.$ac_ext") 2>&5 |
- egrep "webecray" >/dev/null 2>&1; then
- rm -rf conftest*
- ac_cv_os_cray=yes
-else
- rm -rf conftest*
- ac_cv_os_cray=no
-fi
-rm -f conftest*
-
-fi
-
-echo "$ac_t""$ac_cv_os_cray" 1>&6
-if test $ac_cv_os_cray = yes; then
-for ac_func in _getb67 GETB67 getb67; do
- echo $ac_n "checking for $ac_func""... $ac_c" 1>&6
-echo "configure:1232: checking for $ac_func" >&5
-if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1237 "configure"
-#include "confdefs.h"
-/* System header to define __stub macros and hopefully few prototypes,
- which can conflict with char $ac_func(); below. */
-#include <assert.h>
-/* Override any gcc2 internal prototype to avoid an error. */
-/* We use char because int might match the return type of a gcc2
- builtin and then its argument prototype would still apply. */
-char $ac_func();
-
-int main() {
-
-/* The GNU C library defines this for functions which it implements
- to always fail with ENOSYS. Some functions are actually named
- something starting with __ and the normal name is an alias. */
-#if defined (__stub_$ac_func) || defined (__stub___$ac_func)
-choke me
-#else
-$ac_func();
-#endif
-
-; return 0; }
-EOF
-if { (eval echo configure:1260: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=yes"
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=no"
-fi
-rm -f conftest*
-fi
-
-if eval "test \"`echo '$ac_cv_func_'$ac_func`\" = yes"; then
- echo "$ac_t""yes" 1>&6
- cat >> confdefs.h <<EOF
-#define CRAY_STACKSEG_END $ac_func
-EOF
-
- break
-else
- echo "$ac_t""no" 1>&6
-fi
-
-done
-fi
-
-echo $ac_n "checking stack direction for C alloca""... $ac_c" 1>&6
-echo "configure:1287: checking stack direction for C alloca" >&5
-if eval "test \"`echo '$''{'ac_cv_c_stack_direction'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- if test "$cross_compiling" = yes; then
- ac_cv_c_stack_direction=0
-else
- cat > conftest.$ac_ext <<EOF
-#line 1295 "configure"
-#include "confdefs.h"
-find_stack_direction ()
-{
- static char *addr = 0;
- auto char dummy;
- if (addr == 0)
- {
- addr = &dummy;
- return find_stack_direction ();
- }
- else
- return (&dummy > addr) ? 1 : -1;
-}
-main ()
-{
- exit (find_stack_direction() < 0);
-}
-EOF
-if { (eval echo configure:1314: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null
-then
- ac_cv_c_stack_direction=1
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -fr conftest*
- ac_cv_c_stack_direction=-1
-fi
-rm -fr conftest*
-fi
-
-fi
-
-echo "$ac_t""$ac_cv_c_stack_direction" 1>&6
-cat >> confdefs.h <<EOF
-#define STACK_DIRECTION $ac_cv_c_stack_direction
-EOF
-
-fi
-
-for ac_hdr in unistd.h
-do
-ac_safe=`echo "$ac_hdr" | sed 'y%./+-%__p_%'`
-echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6
-echo "configure:1339: checking for $ac_hdr" >&5
-if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1344 "configure"
-#include "confdefs.h"
-#include <$ac_hdr>
-EOF
-ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:1349: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
-ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
-if test -z "$ac_err"; then
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=yes"
-else
- echo "$ac_err" >&5
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=no"
-fi
-rm -f conftest*
-fi
-if eval "test \"`echo '$ac_cv_header_'$ac_safe`\" = yes"; then
- echo "$ac_t""yes" 1>&6
- ac_tr_hdr=HAVE_`echo $ac_hdr | sed 'y%abcdefghijklmnopqrstuvwxyz./-%ABCDEFGHIJKLMNOPQRSTUVWXYZ___%'`
- cat >> confdefs.h <<EOF
-#define $ac_tr_hdr 1
-EOF
-
-else
- echo "$ac_t""no" 1>&6
-fi
-done
-
-for ac_func in getpagesize
-do
-echo $ac_n "checking for $ac_func""... $ac_c" 1>&6
-echo "configure:1378: checking for $ac_func" >&5
-if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1383 "configure"
-#include "confdefs.h"
-/* System header to define __stub macros and hopefully few prototypes,
- which can conflict with char $ac_func(); below. */
-#include <assert.h>
-/* Override any gcc2 internal prototype to avoid an error. */
-/* We use char because int might match the return type of a gcc2
- builtin and then its argument prototype would still apply. */
-char $ac_func();
-
-int main() {
-
-/* The GNU C library defines this for functions which it implements
- to always fail with ENOSYS. Some functions are actually named
- something starting with __ and the normal name is an alias. */
-#if defined (__stub_$ac_func) || defined (__stub___$ac_func)
-choke me
-#else
-$ac_func();
-#endif
-
-; return 0; }
-EOF
-if { (eval echo configure:1406: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=yes"
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=no"
-fi
-rm -f conftest*
-fi
-
-if eval "test \"`echo '$ac_cv_func_'$ac_func`\" = yes"; then
- echo "$ac_t""yes" 1>&6
- ac_tr_func=HAVE_`echo $ac_func | tr 'abcdefghijklmnopqrstuvwxyz' 'ABCDEFGHIJKLMNOPQRSTUVWXYZ'`
- cat >> confdefs.h <<EOF
-#define $ac_tr_func 1
-EOF
-
-else
- echo "$ac_t""no" 1>&6
-fi
-done
-
-echo $ac_n "checking for working mmap""... $ac_c" 1>&6
-echo "configure:1431: checking for working mmap" >&5
-if eval "test \"`echo '$''{'ac_cv_func_mmap_fixed_mapped'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- if test "$cross_compiling" = yes; then
- ac_cv_func_mmap_fixed_mapped=no
-else
- cat > conftest.$ac_ext <<EOF
-#line 1439 "configure"
-#include "confdefs.h"
-
-/* Thanks to Mike Haertel and Jim Avera for this test.
- Here is a matrix of mmap possibilities:
- mmap private not fixed
- mmap private fixed at somewhere currently unmapped
- mmap private fixed at somewhere already mapped
- mmap shared not fixed
- mmap shared fixed at somewhere currently unmapped
- mmap shared fixed at somewhere already mapped
- For private mappings, we should verify that changes cannot be read()
- back from the file, nor mmap's back from the file at a different
- address. (There have been systems where private was not correctly
- implemented like the infamous i386 svr4.0, and systems where the
- VM page cache was not coherent with the filesystem buffer cache
- like early versions of FreeBSD and possibly contemporary NetBSD.)
- For shared mappings, we should conversely verify that changes get
- propogated back to all the places they're supposed to be.
-
- Grep wants private fixed already mapped.
- The main things grep needs to know about mmap are:
- * does it exist and is it safe to write into the mmap'd area
- * how to use it (BSD variants) */
-#include <sys/types.h>
-#include <fcntl.h>
-#include <sys/mman.h>
-
-/* This mess was copied from the GNU getpagesize.h. */
-#ifndef HAVE_GETPAGESIZE
-# ifdef HAVE_UNISTD_H
-# include <unistd.h>
-# endif
-
-/* Assume that all systems that can run configure have sys/param.h. */
-# ifndef HAVE_SYS_PARAM_H
-# define HAVE_SYS_PARAM_H 1
-# endif
-
-# ifdef _SC_PAGESIZE
-# define getpagesize() sysconf(_SC_PAGESIZE)
-# else /* no _SC_PAGESIZE */
-# ifdef HAVE_SYS_PARAM_H
-# include <sys/param.h>
-# ifdef EXEC_PAGESIZE
-# define getpagesize() EXEC_PAGESIZE
-# else /* no EXEC_PAGESIZE */
-# ifdef NBPG
-# define getpagesize() NBPG * CLSIZE
-# ifndef CLSIZE
-# define CLSIZE 1
-# endif /* no CLSIZE */
-# else /* no NBPG */
-# ifdef NBPC
-# define getpagesize() NBPC
-# else /* no NBPC */
-# ifdef PAGESIZE
-# define getpagesize() PAGESIZE
-# endif /* PAGESIZE */
-# endif /* no NBPC */
-# endif /* no NBPG */
-# endif /* no EXEC_PAGESIZE */
-# else /* no HAVE_SYS_PARAM_H */
-# define getpagesize() 8192 /* punt totally */
-# endif /* no HAVE_SYS_PARAM_H */
-# endif /* no _SC_PAGESIZE */
-
-#endif /* no HAVE_GETPAGESIZE */
-
-#ifdef __cplusplus
-extern "C" { void *malloc(unsigned); }
-#else
-char *malloc();
-#endif
-
-int
-main()
-{
- char *data, *data2, *data3;
- int i, pagesize;
- int fd;
-
- pagesize = getpagesize();
-
- /*
- * First, make a file with some known garbage in it.
- */
- data = malloc(pagesize);
- if (!data)
- exit(1);
- for (i = 0; i < pagesize; ++i)
- *(data + i) = rand();
- umask(0);
- fd = creat("conftestmmap", 0600);
- if (fd < 0)
- exit(1);
- if (write(fd, data, pagesize) != pagesize)
- exit(1);
- close(fd);
-
- /*
- * Next, try to mmap the file at a fixed address which
- * already has something else allocated at it. If we can,
- * also make sure that we see the same garbage.
- */
- fd = open("conftestmmap", O_RDWR);
- if (fd < 0)
- exit(1);
- data2 = malloc(2 * pagesize);
- if (!data2)
- exit(1);
- data2 += (pagesize - ((int) data2 & (pagesize - 1))) & (pagesize - 1);
- if (data2 != mmap(data2, pagesize, PROT_READ | PROT_WRITE,
- MAP_PRIVATE | MAP_FIXED, fd, 0L))
- exit(1);
- for (i = 0; i < pagesize; ++i)
- if (*(data + i) != *(data2 + i))
- exit(1);
-
- /*
- * Finally, make sure that changes to the mapped area
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- * (This is a bug on some variants of i386 svr4.0.)
- */
- for (i = 0; i < pagesize; ++i)
- *(data2 + i) = *(data2 + i) + 1;
- data3 = malloc(pagesize);
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- exit(1);
- if (read(fd, data3, pagesize) != pagesize)
- exit(1);
- for (i = 0; i < pagesize; ++i)
- if (*(data + i) != *(data3 + i))
- exit(1);
- close(fd);
- unlink("conftestmmap");
- exit(0);
-}
-
-EOF
-if { (eval echo configure:1579: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null
-then
- ac_cv_func_mmap_fixed_mapped=yes
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -fr conftest*
- ac_cv_func_mmap_fixed_mapped=no
-fi
-rm -fr conftest*
-fi
-
-fi
-
-echo "$ac_t""$ac_cv_func_mmap_fixed_mapped" 1>&6
-if test $ac_cv_func_mmap_fixed_mapped = yes; then
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-EOF
-
-fi
-
-echo $ac_n "checking for Cygwin environment""... $ac_c" 1>&6
-echo "configure:1602: checking for Cygwin environment" >&5
-if eval "test \"`echo '$''{'ac_cv_cygwin'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1607 "configure"
-#include "confdefs.h"
-
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-if { (eval echo configure:1618: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
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- ac_cv_cygwin=yes
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- ac_cv_cygwin=no
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-rm -f conftest*
-rm -f conftest*
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-
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-echo $ac_n "checking for mingw32 environment""... $ac_c" 1>&6
-echo "configure:1635: checking for mingw32 environment" >&5
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-else
- cat > conftest.$ac_ext <<EOF
-#line 1640 "configure"
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-
-int main() {
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- ac_cv_mingw32=yes
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- ac_cv_mingw32=no
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-rm -f conftest*
-rm -f conftest*
-fi
-
-echo "$ac_t""$ac_cv_mingw32" 1>&6
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-
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-
-
-ac_aux_dir=
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- ac_install_sh="$ac_aux_dir/install.sh -c"
- break
- fi
-done
-if test -z "$ac_aux_dir"; then
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-fi
-ac_config_guess=$ac_aux_dir/config.guess
-ac_config_sub=$ac_aux_dir/config.sub
-ac_configure=$ac_aux_dir/configure # This should be Cygnus configure.
-
-
-# Do some error checking and defaulting for the host and target type.
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-#
-# The rules are:
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-# 2. Host defaults to nonopt.
-# 3. If nonopt is not specified, then host defaults to the current host,
-# as determined by config.guess.
-# 4. Target and build default to nonopt.
-# 5. If nonopt is not specified, then target and build default to host.
-
-# The aliases save the names the user supplied, while $host etc.
-# will get canonicalized.
-case $host---$target---$nonopt in
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-*) { echo "configure: error: can only configure for one host and one target at a time" 1>&2; exit 1; } ;;
-esac
-
-
-# Make sure we can run config.sub.
-if ${CONFIG_SHELL-/bin/sh} $ac_config_sub sun4 >/dev/null 2>&1; then :
-else { echo "configure: error: can not run $ac_config_sub" 1>&2; exit 1; }
-fi
-
-echo $ac_n "checking host system type""... $ac_c" 1>&6
-echo "configure:1714: checking host system type" >&5
-
-host_alias=$host
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- case $nonopt in
- NONE)
- if host_alias=`${CONFIG_SHELL-/bin/sh} $ac_config_guess`; then :
- else { echo "configure: error: can not guess host type; you must specify one" 1>&2; exit 1; }
- fi ;;
- *) host_alias=$nonopt ;;
- esac ;;
-esac
-
-host=`${CONFIG_SHELL-/bin/sh} $ac_config_sub $host_alias`
-host_cpu=`echo $host | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\1/'`
-host_vendor=`echo $host | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\2/'`
-host_os=`echo $host | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\3/'`
-echo "$ac_t""$host" 1>&6
-
-echo $ac_n "checking target system type""... $ac_c" 1>&6
-echo "configure:1735: checking target system type" >&5
-
-target_alias=$target
-case "$target_alias" in
-NONE)
- case $nonopt in
- NONE) target_alias=$host_alias ;;
- *) target_alias=$nonopt ;;
- esac ;;
-esac
-
-target=`${CONFIG_SHELL-/bin/sh} $ac_config_sub $target_alias`
-target_cpu=`echo $target | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\1/'`
-target_vendor=`echo $target | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\2/'`
-target_os=`echo $target | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\3/'`
-echo "$ac_t""$target" 1>&6
-
-echo $ac_n "checking build system type""... $ac_c" 1>&6
-echo "configure:1753: checking build system type" >&5
-
-build_alias=$build
-case "$build_alias" in
-NONE)
- case $nonopt in
- NONE) build_alias=$host_alias ;;
- *) build_alias=$nonopt ;;
- esac ;;
-esac
-
-build=`${CONFIG_SHELL-/bin/sh} $ac_config_sub $build_alias`
-build_cpu=`echo $build | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\1/'`
-build_vendor=`echo $build | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\2/'`
-build_os=`echo $build | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\3/'`
-echo "$ac_t""$build" 1>&6
-
-test "$host_alias" != "$target_alias" &&
- test "$program_prefix$program_suffix$program_transform_name" = \
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- program_prefix=${target_alias}-
-
-if test "$program_transform_name" = s,x,x,; then
- program_transform_name=
-else
- # Double any \ or $. echo might interpret backslashes.
- cat <<\EOF_SED > conftestsed
-s,\\,\\\\,g; s,\$,$$,g
-EOF_SED
- program_transform_name="`echo $program_transform_name|sed -f conftestsed`"
- rm -f conftestsed
-fi
-test "$program_prefix" != NONE &&
- program_transform_name="s,^,${program_prefix},; $program_transform_name"
-# Use a double $ so make ignores it.
-test "$program_suffix" != NONE &&
- program_transform_name="s,\$\$,${program_suffix},; $program_transform_name"
-
-# sed with no file args requires a program.
-test "$program_transform_name" = "" && program_transform_name="s,x,x,"
-
-# Extract the first word of "gcc", so it can be a program name with args.
-set dummy gcc; ac_word=$2
-echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:1797: checking for $ac_word" >&5
-if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- if test -n "$CC"; then
- ac_cv_prog_CC="$CC" # Let the user override the test.
-else
- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
- ac_dummy="$PATH"
- for ac_dir in $ac_dummy; do
- test -z "$ac_dir" && ac_dir=.
- if test -f $ac_dir/$ac_word; then
- ac_cv_prog_CC="gcc"
- break
- fi
- done
- IFS="$ac_save_ifs"
-fi
-fi
-CC="$ac_cv_prog_CC"
-if test -n "$CC"; then
- echo "$ac_t""$CC" 1>&6
-else
- echo "$ac_t""no" 1>&6
-fi
-
-if test -z "$CC"; then
- # Extract the first word of "cc", so it can be a program name with args.
-set dummy cc; ac_word=$2
-echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:1827: checking for $ac_word" >&5
-if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- if test -n "$CC"; then
- ac_cv_prog_CC="$CC" # Let the user override the test.
-else
- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
- ac_prog_rejected=no
- ac_dummy="$PATH"
- for ac_dir in $ac_dummy; do
- test -z "$ac_dir" && ac_dir=.
- if test -f $ac_dir/$ac_word; then
- if test "$ac_dir/$ac_word" = "/usr/ucb/cc"; then
- ac_prog_rejected=yes
- continue
- fi
- ac_cv_prog_CC="cc"
- break
- fi
- done
- IFS="$ac_save_ifs"
-if test $ac_prog_rejected = yes; then
- # We found a bogon in the path, so make sure we never use it.
- set dummy $ac_cv_prog_CC
- shift
- if test $# -gt 0; then
- # We chose a different compiler from the bogus one.
- # However, it has the same basename, so the bogon will be chosen
- # first if we set CC to just the basename; use the full file name.
- shift
- set dummy "$ac_dir/$ac_word" "$@"
- shift
- ac_cv_prog_CC="$@"
- fi
-fi
-fi
-fi
-CC="$ac_cv_prog_CC"
-if test -n "$CC"; then
- echo "$ac_t""$CC" 1>&6
-else
- echo "$ac_t""no" 1>&6
-fi
-
- if test -z "$CC"; then
- case "`uname -s`" in
- *win32* | *WIN32*)
- # Extract the first word of "cl", so it can be a program name with args.
-set dummy cl; ac_word=$2
-echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:1878: checking for $ac_word" >&5
-if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- if test -n "$CC"; then
- ac_cv_prog_CC="$CC" # Let the user override the test.
-else
- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
- ac_dummy="$PATH"
- for ac_dir in $ac_dummy; do
- test -z "$ac_dir" && ac_dir=.
- if test -f $ac_dir/$ac_word; then
- ac_cv_prog_CC="cl"
- break
- fi
- done
- IFS="$ac_save_ifs"
-fi
-fi
-CC="$ac_cv_prog_CC"
-if test -n "$CC"; then
- echo "$ac_t""$CC" 1>&6
-else
- echo "$ac_t""no" 1>&6
-fi
- ;;
- esac
- fi
- test -z "$CC" && { echo "configure: error: no acceptable cc found in \$PATH" 1>&2; exit 1; }
-fi
-
-echo $ac_n "checking whether the C compiler ($CC $CFLAGS $LDFLAGS) works""... $ac_c" 1>&6
-echo "configure:1910: checking whether the C compiler ($CC $CFLAGS $LDFLAGS) works" >&5
-
-ac_ext=c
-# CFLAGS is not in ac_cpp because -g, -O, etc. are not valid cpp options.
-ac_cpp='$CPP $CPPFLAGS'
-ac_compile='${CC-cc} -c $CFLAGS $CPPFLAGS conftest.$ac_ext 1>&5'
-ac_link='${CC-cc} -o conftest${ac_exeext} $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS 1>&5'
-cross_compiling=$ac_cv_prog_cc_cross
-
-cat > conftest.$ac_ext << EOF
-
-#line 1921 "configure"
-#include "confdefs.h"
-
-main(){return(0);}
-EOF
-if { (eval echo configure:1926: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- ac_cv_prog_cc_works=yes
- # If we can't run a trivial program, we are probably using a cross compiler.
- if (./conftest; exit) 2>/dev/null; then
- ac_cv_prog_cc_cross=no
- else
- ac_cv_prog_cc_cross=yes
- fi
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- ac_cv_prog_cc_works=no
-fi
-rm -fr conftest*
-ac_ext=c
-# CFLAGS is not in ac_cpp because -g, -O, etc. are not valid cpp options.
-ac_cpp='$CPP $CPPFLAGS'
-ac_compile='${CC-cc} -c $CFLAGS $CPPFLAGS conftest.$ac_ext 1>&5'
-ac_link='${CC-cc} -o conftest${ac_exeext} $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS 1>&5'
-cross_compiling=$ac_cv_prog_cc_cross
-
-echo "$ac_t""$ac_cv_prog_cc_works" 1>&6
-if test $ac_cv_prog_cc_works = no; then
- { echo "configure: error: installation or configuration problem: C compiler cannot create executables." 1>&2; exit 1; }
-fi
-echo $ac_n "checking whether the C compiler ($CC $CFLAGS $LDFLAGS) is a cross-compiler""... $ac_c" 1>&6
-echo "configure:1952: checking whether the C compiler ($CC $CFLAGS $LDFLAGS) is a cross-compiler" >&5
-echo "$ac_t""$ac_cv_prog_cc_cross" 1>&6
-cross_compiling=$ac_cv_prog_cc_cross
-
-echo $ac_n "checking whether we are using GNU C""... $ac_c" 1>&6
-echo "configure:1957: checking whether we are using GNU C" >&5
-if eval "test \"`echo '$''{'ac_cv_prog_gcc'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.c <<EOF
-#ifdef __GNUC__
- yes;
-#endif
-EOF
-if { ac_try='${CC-cc} -E conftest.c'; { (eval echo configure:1966: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }; } | egrep yes >/dev/null 2>&1; then
- ac_cv_prog_gcc=yes
-else
- ac_cv_prog_gcc=no
-fi
-fi
-
-echo "$ac_t""$ac_cv_prog_gcc" 1>&6
-
-if test $ac_cv_prog_gcc = yes; then
- GCC=yes
-else
- GCC=
-fi
-
-ac_test_CFLAGS="${CFLAGS+set}"
-ac_save_CFLAGS="$CFLAGS"
-CFLAGS=
-echo $ac_n "checking whether ${CC-cc} accepts -g""... $ac_c" 1>&6
-echo "configure:1985: checking whether ${CC-cc} accepts -g" >&5
-if eval "test \"`echo '$''{'ac_cv_prog_cc_g'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- echo 'void f(){}' > conftest.c
-if test -z "`${CC-cc} -g -c conftest.c 2>&1`"; then
- ac_cv_prog_cc_g=yes
-else
- ac_cv_prog_cc_g=no
-fi
-rm -f conftest*
-
-fi
-
-echo "$ac_t""$ac_cv_prog_cc_g" 1>&6
-if test "$ac_test_CFLAGS" = set; then
- CFLAGS="$ac_save_CFLAGS"
-elif test $ac_cv_prog_cc_g = yes; then
- if test "$GCC" = yes; then
- CFLAGS="-g -O2"
- else
- CFLAGS="-g"
- fi
-else
- if test "$GCC" = yes; then
- CFLAGS="-O2"
- else
- CFLAGS=
- fi
-fi
-
-# Find a good install program. We prefer a C program (faster),
-# so one script is as good as another. But avoid the broken or
-# incompatible versions:
-# SysV /etc/install, /usr/sbin/install
-# SunOS /usr/etc/install
-# IRIX /sbin/install
-# AIX /bin/install
-# AIX 4 /usr/bin/installbsd, which doesn't work without a -g flag
-# AFS /usr/afsws/bin/install, which mishandles nonexistent args
-# SVR4 /usr/ucb/install, which tries to use the nonexistent group "staff"
-# ./install, which can be erroneously created by make from ./install.sh.
-echo $ac_n "checking for a BSD compatible install""... $ac_c" 1>&6
-echo "configure:2028: checking for a BSD compatible install" >&5
-if test -z "$INSTALL"; then
-if eval "test \"`echo '$''{'ac_cv_path_install'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- IFS="${IFS= }"; ac_save_IFS="$IFS"; IFS=":"
- for ac_dir in $PATH; do
- # Account for people who put trailing slashes in PATH elements.
- case "$ac_dir/" in
- /|./|.//|/etc/*|/usr/sbin/*|/usr/etc/*|/sbin/*|/usr/afsws/bin/*|/usr/ucb/*) ;;
- *)
- # OSF1 and SCO ODT 3.0 have their own names for install.
- # Don't use installbsd from OSF since it installs stuff as root
- # by default.
- for ac_prog in ginstall scoinst install; do
- if test -f $ac_dir/$ac_prog; then
- if test $ac_prog = install &&
- grep dspmsg $ac_dir/$ac_prog >/dev/null 2>&1; then
- # AIX install. It has an incompatible calling convention.
- :
- else
- ac_cv_path_install="$ac_dir/$ac_prog -c"
- break 2
- fi
- fi
- done
- ;;
- esac
- done
- IFS="$ac_save_IFS"
-
-fi
- if test "${ac_cv_path_install+set}" = set; then
- INSTALL="$ac_cv_path_install"
- else
- # As a last resort, use the slow shell script. We don't cache a
- # path for INSTALL within a source directory, because that will
- # break other packages using the cache if that directory is
- # removed, or if the path is relative.
- INSTALL="$ac_install_sh"
- fi
-fi
-echo "$ac_t""$INSTALL" 1>&6
-
-# Use test -z because SunOS4 sh mishandles braces in ${var-val}.
-# It thinks the first close brace ends the variable substitution.
-test -z "$INSTALL_PROGRAM" && INSTALL_PROGRAM='${INSTALL}'
-
-test -z "$INSTALL_SCRIPT" && INSTALL_SCRIPT='${INSTALL_PROGRAM}'
-
-test -z "$INSTALL_DATA" && INSTALL_DATA='${INSTALL} -m 644'
-
-
-# Put a plausible default for CC_FOR_BUILD in Makefile.
-if test "x$cross_compiling" = "xno"; then
- CC_FOR_BUILD='$(CC)'
-else
- CC_FOR_BUILD=gcc
-fi
-
-
-
-
-AR=${AR-ar}
-
-# Extract the first word of "ranlib", so it can be a program name with args.
-set dummy ranlib; ac_word=$2
-echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:2096: checking for $ac_word" >&5
-if eval "test \"`echo '$''{'ac_cv_prog_RANLIB'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- if test -n "$RANLIB"; then
- ac_cv_prog_RANLIB="$RANLIB" # Let the user override the test.
-else
- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
- ac_dummy="$PATH"
- for ac_dir in $ac_dummy; do
- test -z "$ac_dir" && ac_dir=.
- if test -f $ac_dir/$ac_word; then
- ac_cv_prog_RANLIB="ranlib"
- break
- fi
- done
- IFS="$ac_save_ifs"
- test -z "$ac_cv_prog_RANLIB" && ac_cv_prog_RANLIB=":"
-fi
-fi
-RANLIB="$ac_cv_prog_RANLIB"
-if test -n "$RANLIB"; then
- echo "$ac_t""$RANLIB" 1>&6
-else
- echo "$ac_t""no" 1>&6
-fi
-
-
-ALL_LINGUAS=
-
- for ac_hdr in argz.h limits.h locale.h nl_types.h malloc.h string.h \
-unistd.h values.h sys/param.h
-do
-ac_safe=`echo "$ac_hdr" | sed 'y%./+-%__p_%'`
-echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6
-echo "configure:2131: checking for $ac_hdr" >&5
-if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 2136 "configure"
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-#include <$ac_hdr>
-EOF
-ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:2141: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
-ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
-if test -z "$ac_err"; then
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=yes"
-else
- echo "$ac_err" >&5
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=no"
-fi
-rm -f conftest*
-fi
-if eval "test \"`echo '$ac_cv_header_'$ac_safe`\" = yes"; then
- echo "$ac_t""yes" 1>&6
- ac_tr_hdr=HAVE_`echo $ac_hdr | sed 'y%abcdefghijklmnopqrstuvwxyz./-%ABCDEFGHIJKLMNOPQRSTUVWXYZ___%'`
- cat >> confdefs.h <<EOF
-#define $ac_tr_hdr 1
-EOF
-
-else
- echo "$ac_t""no" 1>&6
-fi
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- *)
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-
- # Extract the first word of "gmsgfmt", so it can be a program name with args.
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-echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:2723: checking for $ac_word" >&5
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- *)
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-
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-echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:2759: checking for $ac_word" >&5
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- *)
- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS="${IFS}:"
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-
-
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- INTLLIBS=$INTLDEPS
- LIBS=`echo $LIBS | sed -e 's/-lintl//'`
- nls_cv_header_intl=libintl.h
- nls_cv_header_libgt=libgettext.h
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-
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- fi
- fi
-
- # We need to process the po/ directory.
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- else
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- fi
-
- # If this is used in GNU gettext we have to set USE_NLS to `yes'
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- fi
-
- for lang in $ALL_LINGUAS; do
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- POFILES="$POFILES $lang.po"
- done
-
-
-
-
-
-
-
-
-
-
-
-
-
-
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- echo $ac_n "checking for catalogs to be installed""... $ac_c" 1>&6
-echo "configure:2849: checking for catalogs to be installed" >&5
- NEW_LINGUAS=
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- esac
- done
- LINGUAS=$NEW_LINGUAS
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- fi
-
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- fi
- fi
-
- if test $ac_cv_header_locale_h = yes; then
- INCLUDE_LOCALE_H="#include <locale.h>"
- else
- INCLUDE_LOCALE_H="\
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- fi
-
-
- if test -f $srcdir/po2tbl.sed.in; then
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-echo "configure:2877: checking for linux/version.h" >&5
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- cat > conftest.$ac_ext <<EOF
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-{ (eval echo configure:2887: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
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- eval "ac_cv_header_$ac_safe=yes"
-else
- echo "$ac_err" >&5
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=no"
-fi
-rm -f conftest*
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-if eval "test \"`echo '$ac_cv_header_'$ac_safe`\" = yes"; then
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- msgformat=linux
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- echo "$ac_t""no" 1>&6
-msgformat=xopen
-fi
-
-
- sed -e '/^#/d' $srcdir/$msgformat-msg.sed > po2msg.sed
- fi
- sed -e '/^#.*[^\\]$/d' -e '/^#$/d' \
- $srcdir/po2tbl.sed.in > po2tbl.sed
- fi
-
- if test "$PACKAGE" = "gettext"; then
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- GT_YES=
- else
- GT_NO=
- GT_YES="#YES#"
- fi
-
-
-
- MKINSTALLDIRS="\$(srcdir)/../../mkinstalldirs"
-
-
- l=
-
-
- if test -d $srcdir/po; then
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- if test "x$srcdir" != "x."; then
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- posrcprefix="$srcdir/"
- else
- posrcprefix="../$srcdir/"
- fi
- else
- posrcprefix="../"
- fi
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- < $srcdir/po/POTFILES.in > po/POTFILES
- fi
-
-
-# Check for common headers.
-# FIXME: Seems to me this can cause problems for i386-windows hosts.
-# At one point there were hardcoded AC_DEFINE's if ${host} = i386-*-windows*.
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-echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6
-echo "configure:2956: checking for $ac_hdr" >&5
-if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 2961 "configure"
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-ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:2966: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
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-if test -z "$ac_err"; then
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=yes"
-else
- echo "$ac_err" >&5
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=no"
-fi
-rm -f conftest*
-fi
-if eval "test \"`echo '$ac_cv_header_'$ac_safe`\" = yes"; then
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- ac_tr_hdr=HAVE_`echo $ac_hdr | sed 'y%abcdefghijklmnopqrstuvwxyz./-%ABCDEFGHIJKLMNOPQRSTUVWXYZ___%'`
- cat >> confdefs.h <<EOF
-#define $ac_tr_hdr 1
-EOF
-
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- echo "$ac_t""no" 1>&6
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-
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-echo "configure:2996: checking for $ac_hdr" >&5
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- cat > conftest.$ac_ext <<EOF
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-{ (eval echo configure:3006: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
-ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
-if test -z "$ac_err"; then
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=yes"
-else
- echo "$ac_err" >&5
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=no"
-fi
-rm -f conftest*
-fi
-if eval "test \"`echo '$ac_cv_header_'$ac_safe`\" = yes"; then
- echo "$ac_t""yes" 1>&6
- ac_tr_hdr=HAVE_`echo $ac_hdr | sed 'y%abcdefghijklmnopqrstuvwxyz./-%ABCDEFGHIJKLMNOPQRSTUVWXYZ___%'`
- cat >> confdefs.h <<EOF
-#define $ac_tr_hdr 1
-EOF
-
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- echo "$ac_t""no" 1>&6
-fi
-done
-
-for ac_hdr in fcntl.h fpu_control.h
-do
-ac_safe=`echo "$ac_hdr" | sed 'y%./+-%__p_%'`
-echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6
-echo "configure:3036: checking for $ac_hdr" >&5
-if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 3041 "configure"
-#include "confdefs.h"
-#include <$ac_hdr>
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-ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:3046: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
-ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
-if test -z "$ac_err"; then
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=yes"
-else
- echo "$ac_err" >&5
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=no"
-fi
-rm -f conftest*
-fi
-if eval "test \"`echo '$ac_cv_header_'$ac_safe`\" = yes"; then
- echo "$ac_t""yes" 1>&6
- ac_tr_hdr=HAVE_`echo $ac_hdr | sed 'y%abcdefghijklmnopqrstuvwxyz./-%ABCDEFGHIJKLMNOPQRSTUVWXYZ___%'`
- cat >> confdefs.h <<EOF
-#define $ac_tr_hdr 1
-EOF
-
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- echo "$ac_t""no" 1>&6
-fi
-done
-
-for ac_hdr in dlfcn.h errno.h sys/stat.h
-do
-ac_safe=`echo "$ac_hdr" | sed 'y%./+-%__p_%'`
-echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6
-echo "configure:3076: checking for $ac_hdr" >&5
-if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 3081 "configure"
-#include "confdefs.h"
-#include <$ac_hdr>
-EOF
-ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:3086: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
-ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
-if test -z "$ac_err"; then
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=yes"
-else
- echo "$ac_err" >&5
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=no"
-fi
-rm -f conftest*
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-if eval "test \"`echo '$ac_cv_header_'$ac_safe`\" = yes"; then
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- ac_tr_hdr=HAVE_`echo $ac_hdr | sed 'y%abcdefghijklmnopqrstuvwxyz./-%ABCDEFGHIJKLMNOPQRSTUVWXYZ___%'`
- cat >> confdefs.h <<EOF
-#define $ac_tr_hdr 1
-EOF
-
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-fi
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-
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-echo "configure:3115: checking for $ac_func" >&5
-if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 3120 "configure"
-#include "confdefs.h"
-/* System header to define __stub macros and hopefully few prototypes,
- which can conflict with char $ac_func(); below. */
-#include <assert.h>
-/* Override any gcc2 internal prototype to avoid an error. */
-/* We use char because int might match the return type of a gcc2
- builtin and then its argument prototype would still apply. */
-char $ac_func();
-
-int main() {
-
-/* The GNU C library defines this for functions which it implements
- to always fail with ENOSYS. Some functions are actually named
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-#if defined (__stub_$ac_func) || defined (__stub___$ac_func)
-choke me
-#else
-$ac_func();
-#endif
-
-; return 0; }
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-if { (eval echo configure:3143: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=yes"
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=no"
-fi
-rm -f conftest*
-fi
-
-if eval "test \"`echo '$ac_cv_func_'$ac_func`\" = yes"; then
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- ac_tr_func=HAVE_`echo $ac_func | tr 'abcdefghijklmnopqrstuvwxyz' 'ABCDEFGHIJKLMNOPQRSTUVWXYZ'`
- cat >> confdefs.h <<EOF
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-
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- echo "$ac_t""no" 1>&6
-fi
-done
-
-
-# Check for socket libraries
-echo $ac_n "checking for bind in -lsocket""... $ac_c" 1>&6
-echo "configure:3170: checking for bind in -lsocket" >&5
-ac_lib_var=`echo socket'_'bind | sed 'y%./+-%__p_%'`
-if eval "test \"`echo '$''{'ac_cv_lib_$ac_lib_var'+set}'`\" = set"; then
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-else
- ac_save_LIBS="$LIBS"
-LIBS="-lsocket $LIBS"
-cat > conftest.$ac_ext <<EOF
-#line 3178 "configure"
-#include "confdefs.h"
-/* Override any gcc2 internal prototype to avoid an error. */
-/* We use char because int might match the return type of a gcc2
- builtin and then its argument prototype would still apply. */
-char bind();
-
-int main() {
-bind()
-; return 0; }
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-if { (eval echo configure:3189: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
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- eval "ac_cv_lib_$ac_lib_var=yes"
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- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_lib_$ac_lib_var=no"
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-rm -f conftest*
-LIBS="$ac_save_LIBS"
-
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- ac_tr_lib=HAVE_LIB`echo socket | sed -e 's/[^a-zA-Z0-9_]/_/g' \
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- cat >> confdefs.h <<EOF
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-
- LIBS="-lsocket $LIBS"
-
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-
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-echo "configure:3217: checking for gethostbyname in -lnsl" >&5
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- ac_save_LIBS="$LIBS"
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-cat > conftest.$ac_ext <<EOF
-#line 3225 "configure"
-#include "confdefs.h"
-/* Override any gcc2 internal prototype to avoid an error. */
-/* We use char because int might match the return type of a gcc2
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-
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-; return 0; }
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-if { (eval echo configure:3236: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
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- eval "ac_cv_lib_$ac_lib_var=yes"
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- eval "ac_cv_lib_$ac_lib_var=no"
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-LIBS="$ac_save_LIBS"
-
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- ac_tr_lib=HAVE_LIB`echo nsl | sed -e 's/[^a-zA-Z0-9_]/_/g' \
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-
- LIBS="-lnsl $LIBS"
-
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- echo "$ac_t""no" 1>&6
-fi
-
-
-. ${srcdir}/../../bfd/configure.host
-
-
-
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- case "${enableval}" in
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- no) MAINT="#" ;;
- *) { echo "configure: error: "--enable-maintainer-mode does not take a value"" 1>&2; exit 1; }; MAINT="#" ;;
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-fi
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- MAINT="#"
-fi
-
-
-
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-if test "${enable_sim_bswap+set}" = set; then
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- case "${enableval}" in
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- no) sim_bswap="-DWITH_BSWAP=0";;
- *) { echo "configure: error: "--enable-sim-bswap does not take a value"" 1>&2; exit 1; }; sim_bswap="";;
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-if test x"$silent" != x"yes" && test x"$sim_bswap" != x""; then
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-fi
-else
- sim_bswap=""
-fi
-
-
-
-# Check whether --enable-sim-cflags or --disable-sim-cflags was given.
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- case "${enableval}" in
- yes) sim_cflags="-O2 -fomit-frame-pointer";;
- trace) { echo "configure: error: "Please use --enable-sim-debug instead."" 1>&2; exit 1; }; sim_cflags="";;
- no) sim_cflags="";;
- *) sim_cflags=`echo "${enableval}" | sed -e "s/,/ /g"`;;
-esac
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-fi
-else
- sim_cflags=""
-fi
-
-
-
-# Check whether --enable-sim-debug or --disable-sim-debug was given.
-if test "${enable_sim_debug+set}" = set; then
- enableval="$enable_sim_debug"
- case "${enableval}" in
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- no) sim_debug="-DDEBUG=0 -DWITH_DEBUG=0";;
- *) sim_debug="-DDEBUG='(${enableval})' -DWITH_DEBUG='(${enableval})'";;
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-if test x"$silent" != x"yes" && test x"$sim_debug" != x""; then
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-fi
-else
- sim_debug=""
-fi
-
-
-
-# Check whether --enable-sim-stdio or --disable-sim-stdio was given.
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- case "${enableval}" in
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- no) sim_stdio="-DWITH_STDIO=DONT_USE_STDIO";;
- *) { echo "configure: error: "Unknown value $enableval passed to --enable-sim-stdio"" 1>&2; exit 1; }; sim_stdio="";;
-esac
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-fi
-else
- sim_stdio=""
-fi
-
-
-
-# Check whether --enable-sim-trace or --disable-sim-trace was given.
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- case "${enableval}" in
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- no) sim_trace="-DTRACE=0 -DWITH_TRACE=0";;
- [-0-9]*)
- sim_trace="-DTRACE='(${enableval})' -DWITH_TRACE='(${enableval})'";;
- [a-z]*)
- sim_trace=""
- for x in `echo "$enableval" | sed -e "s/,/ /g"`; do
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- else
- sim_trace="${sim_trace}|TRACE_$x"
- fi
- done
- sim_trace="$sim_trace)'" ;;
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-fi
-else
- sim_trace=""
-fi
-
-
-
-# Check whether --enable-sim-profile or --disable-sim-profile was given.
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- case "${enableval}" in
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- no) sim_profile="-DPROFILE=0 -DWITH_PROFILE=0";;
- [-0-9]*)
- sim_profile="-DPROFILE='(${enableval})' -DWITH_PROFILE='(${enableval})'";;
- [a-z]*)
- sim_profile=""
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- else
- sim_profile="${sim_profile}|PROFILE_$x"
- fi
- done
- sim_profile="$sim_profile)'" ;;
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-fi
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- sim_profile="-DPROFILE=1 -DWITH_PROFILE=-1"
-fi
-
-
-
-echo $ac_n "checking return type of signal handlers""... $ac_c" 1>&6
-echo "configure:3412: checking return type of signal handlers" >&5
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-else
- cat > conftest.$ac_ext <<EOF
-#line 3417 "configure"
-#include "confdefs.h"
-#include <sys/types.h>
-#include <signal.h>
-#ifdef signal
-#undef signal
-#endif
-#ifdef __cplusplus
-extern "C" void (*signal (int, void (*)(int)))(int);
-#else
-void (*signal ()) ();
-#endif
-
-int main() {
-int i;
-; return 0; }
-EOF
-if { (eval echo configure:3434: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
- rm -rf conftest*
- ac_cv_type_signal=void
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- ac_cv_type_signal=int
-fi
-rm -f conftest*
-fi
-
-echo "$ac_t""$ac_cv_type_signal" 1>&6
-cat >> confdefs.h <<EOF
-#define RETSIGTYPE $ac_cv_type_signal
-EOF
-
-
-
-
-
-echo $ac_n "checking for executable suffix""... $ac_c" 1>&6
-echo "configure:3456: checking for executable suffix" >&5
-if eval "test \"`echo '$''{'ac_cv_exeext'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- if test "$CYGWIN" = yes || test "$MINGW32" = yes; then
- ac_cv_exeext=.exe
-else
- rm -f conftest*
- echo 'int main () { return 0; }' > conftest.$ac_ext
- ac_cv_exeext=
- if { (eval echo configure:3466: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; }; then
- for file in conftest.*; do
- case $file in
- *.c | *.o | *.obj | *.ilk | *.pdb) ;;
- *) ac_cv_exeext=`echo $file | sed -e s/conftest//` ;;
- esac
- done
- else
- { echo "configure: error: installation or configuration problem: compiler cannot create executables." 1>&2; exit 1; }
- fi
- rm -f conftest*
- test x"${ac_cv_exeext}" = x && ac_cv_exeext=no
-fi
-fi
-
-EXEEXT=""
-test x"${ac_cv_exeext}" != xno && EXEEXT=${ac_cv_exeext}
-echo "$ac_t""${ac_cv_exeext}" 1>&6
-ac_exeext=$EXEEXT
-
-
-sim_link_files=
-sim_link_links=
-
-sim_link_links=tconfig.h
-if test -f ${srcdir}/tconfig.in
-then
- sim_link_files=tconfig.in
-else
- sim_link_files=../common/tconfig.in
-fi
-
-# targ-vals.def points to the libc macro description file.
-case "${target}" in
-*-*-*) TARG_VALS_DEF=../common/nltvals.def ;;
-esac
-sim_link_files="${sim_link_files} ${TARG_VALS_DEF}"
-sim_link_links="${sim_link_links} targ-vals.def"
-
-
-
-
-default_sim_inline=""
-# Check whether --enable-sim-inline or --disable-sim-inline was given.
-if test "${enable_sim_inline+set}" = set; then
- enableval="$enable_sim_inline"
- sim_inline=""
-case "$enableval" in
- no) sim_inline="-DDEFAULT_INLINE=0";;
- 0) sim_inline="-DDEFAULT_INLINE=0";;
- yes | 2) sim_inline="-DDEFAULT_INLINE=ALL_C_INLINE";;
- 1) sim_inline="-DDEFAULT_INLINE=INLINE_LOCALS";;
- *) for x in `echo "$enableval" | sed -e "s/,/ /g"`; do
- new_flag=""
- case "$x" in
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- *=*) new_flag=`echo "$x" | sed -e "s/=/_INLINE=/" -e "s/^/-D/"`;;
- *_INLINE) new_flag="-D$x=ALL_C_INLINE";;
- *) new_flag="-D$x""_INLINE=ALL_C_INLINE";;
- esac
- if test x"$sim_inline" = x""; then
- sim_inline="$new_flag"
- else
- sim_inline="$sim_inline $new_flag"
- fi
- done;;
-esac
-if test x"$silent" != x"yes" && test x"$sim_inline" != x""; then
- echo "Setting inline flags = $sim_inline" 6>&1
-fi
-else
-
-if test "x$cross_compiling" = "xno"; then
- if test x"$GCC" != "x" -a x"${default_sim_inline}" != "x" ; then
- sim_inline="${default_sim_inline}"
- if test x"$silent" != x"yes"; then
- echo "Setting inline flags = $sim_inline" 6>&1
- fi
- else
- sim_inline=""
- fi
-else
- sim_inline="-DDEFAULT_INLINE=0"
-fi
-fi
-
-wire_alignment="NONSTRICT_ALIGNMENT"
-default_alignment=""
-
-# Check whether --enable-sim-alignment or --disable-sim-alignment was given.
-if test "${enable_sim_alignment+set}" = set; then
- enableval="$enable_sim_alignment"
- case "${enableval}" in
- strict | STRICT) sim_alignment="-DWITH_ALIGNMENT=STRICT_ALIGNMENT";;
- nonstrict | NONSTRICT) sim_alignment="-DWITH_ALIGNMENT=NONSTRICT_ALIGNMENT";;
- forced | FORCED) sim_alignment="-DWITH_ALIGNMENT=FORCED_ALIGNMENT";;
- yes) if test x"$wire_alignment" != x; then
- sim_alignment="-DWITH_ALIGNMENT=${wire_alignment}"
- else
- if test x"$default_alignment" != x; then
- sim_alignment="-DWITH_ALIGNMENT=${default_alignment}"
- else
- echo "No hard-wired alignment for target $target" 1>&6
- sim_alignment="-DWITH_ALIGNMENT=0"
- fi
- fi;;
- no) if test x"$default_alignment" != x; then
- sim_alignment="-DWITH_DEFAULT_ALIGNMENT=${default_alignment}"
- else
- if test x"$wire_alignment" != x; then
- sim_alignment="-DWITH_DEFAULT_ALIGNMENT=${wire_alignment}"
- else
- echo "No default alignment for target $target" 1>&6
- sim_alignment="-DWITH_DEFAULT_ALIGNMENT=0"
- fi
- fi;;
- *) { echo "configure: error: "Unknown value $enableval passed to --enable-sim-alignment"" 1>&2; exit 1; }; sim_alignment="";;
-esac
-if test x"$silent" != x"yes" && test x"$sim_alignment" != x""; then
- echo "Setting alignment flags = $sim_alignment" 6>&1
-fi
-else
- if test x"$default_alignment" != x; then
- sim_alignment="-DWITH_DEFAULT_ALIGNMENT=${default_alignment}"
-else
- if test x"$wire_alignment" != x; then
- sim_alignment="-DWITH_ALIGNMENT=${wire_alignment}"
- else
- sim_alignment=
- fi
-fi
-fi
-
-
-# Check whether --enable-sim-hostendian or --disable-sim-hostendian was given.
-if test "${enable_sim_hostendian+set}" = set; then
- enableval="$enable_sim_hostendian"
- case "${enableval}" in
- no) sim_hostendian="-DWITH_HOST_BYTE_ORDER=0";;
- b*|B*) sim_hostendian="-DWITH_HOST_BYTE_ORDER=BIG_ENDIAN";;
- l*|L*) sim_hostendian="-DWITH_HOST_BYTE_ORDER=LITTLE_ENDIAN";;
- *) { echo "configure: error: "Unknown value $enableval for --enable-sim-hostendian"" 1>&2; exit 1; }; sim_hostendian="";;
-esac
-if test x"$silent" != x"yes" && test x"$sim_hostendian" != x""; then
- echo "Setting hostendian flags = $sim_hostendian" 6>&1
-fi
-else
-
-if test "x$cross_compiling" = "xno"; then
- echo $ac_n "checking whether byte ordering is bigendian""... $ac_c" 1>&6
-echo "configure:3616: checking whether byte ordering is bigendian" >&5
-if eval "test \"`echo '$''{'ac_cv_c_bigendian'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- ac_cv_c_bigendian=unknown
-# See if sys/param.h defines the BYTE_ORDER macro.
-cat > conftest.$ac_ext <<EOF
-#line 3623 "configure"
-#include "confdefs.h"
-#include <sys/types.h>
-#include <sys/param.h>
-int main() {
-
-#if !BYTE_ORDER || !BIG_ENDIAN || !LITTLE_ENDIAN
- bogus endian macros
-#endif
-; return 0; }
-EOF
-if { (eval echo configure:3634: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
- rm -rf conftest*
- # It does; now see whether it defined to BIG_ENDIAN or not.
-cat > conftest.$ac_ext <<EOF
-#line 3638 "configure"
-#include "confdefs.h"
-#include <sys/types.h>
-#include <sys/param.h>
-int main() {
-
-#if BYTE_ORDER != BIG_ENDIAN
- not big endian
-#endif
-; return 0; }
-EOF
-if { (eval echo configure:3649: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
- rm -rf conftest*
- ac_cv_c_bigendian=yes
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- ac_cv_c_bigendian=no
-fi
-rm -f conftest*
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
-fi
-rm -f conftest*
-if test $ac_cv_c_bigendian = unknown; then
-if test "$cross_compiling" = yes; then
- { echo "configure: error: can not run test program while cross compiling" 1>&2; exit 1; }
-else
- cat > conftest.$ac_ext <<EOF
-#line 3669 "configure"
-#include "confdefs.h"
-main () {
- /* Are we little or big endian? From Harbison&Steele. */
- union
- {
- long l;
- char c[sizeof (long)];
- } u;
- u.l = 1;
- exit (u.c[sizeof (long) - 1] == 1);
-}
-EOF
-if { (eval echo configure:3682: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null
-then
- ac_cv_c_bigendian=no
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -fr conftest*
- ac_cv_c_bigendian=yes
-fi
-rm -fr conftest*
-fi
-
-fi
-fi
-
-echo "$ac_t""$ac_cv_c_bigendian" 1>&6
-if test $ac_cv_c_bigendian = yes; then
- cat >> confdefs.h <<\EOF
-#define WORDS_BIGENDIAN 1
-EOF
-
-fi
-
- if test $ac_cv_c_bigendian = yes; then
- sim_hostendian="-DWITH_HOST_BYTE_ORDER=BIG_ENDIAN"
- else
- sim_hostendian="-DWITH_HOST_BYTE_ORDER=LITTLE_ENDIAN"
- fi
-else
- sim_hostendian="-DWITH_HOST_BYTE_ORDER=0"
-fi
-fi
-
-
-# Check whether --enable-build-warnings or --disable-build-warnings was given.
-if test "${enable_build_warnings+set}" = set; then
- enableval="$enable_build_warnings"
- build_warnings="-Wall -Wpointer-arith -Wstrict-prototypes -Wmissing-prototypes -Wmissing-declarations"
-case "${enableval}" in
- yes) ;;
- no) build_warnings="-w";;
- ,*) t=`echo "${enableval}" | sed -e "s/,/ /g"`
- build_warnings="${build_warnings} ${t}";;
- *,) t=`echo "${enableval}" | sed -e "s/,/ /g"`
- build_warnings="${t} ${build_warnings}";;
- *) build_warnings=`echo "${enableval}" | sed -e "s/,/ /g"`;;
-esac
-if test x"$silent" != x"yes" && test x"$build_warnings" != x""; then
- echo "Setting warning flags = $build_warnings" 6>&1
-fi
-WARN_CFLAGS=""
-WERROR_CFLAGS=""
-if test "x${build_warnings}" != x -a "x$GCC" = xyes
-then
- # Separate out the -Werror flag as some files just cannot be
- # compiled with it enabled.
- for w in ${build_warnings}; do
- case $w in
- -Werr*) WERROR_CFLAGS=-Werror ;;
- *) WARN_CFLAGS="${WARN_CFLAGS} $w"
- esac
- done
-fi
-else
- build_warnings=""
-fi
-
-
-#
-# Add simulated hardware devices
-#
-hw_enabled=no
-case "${target}" in
- m68hc11-*-*|m6811-*-*)
- hw_enabled=yes
- hw_extra_devices="m68hc11 m68hc11sio m68hc11eepr m68hc11tim m68hc11spi nvram"
- m68hc11_extra_objs="dv-sockser.o"
- SIM_SUBTARGET="$SIM_SUBTARGET -DTARGET_M68HC11=1"
- ;;
- *)
- m68hc11_extra_objs=""
- ;;
-esac
-
-if test x"$hw_enabled" = x"yes"; then
- sim_hw_p=yes
-else
- sim_hw_p=no
-fi
-if test "$hw_devices"; then
- hardware="core pal glue"
-else
- hardware="core pal glue $hw_extra_devices"
-fi
-sim_hw_cflags="-DWITH_HW=1"
-sim_hw="$hardware"
-sim_hw_objs="\$(SIM_COMMON_HW_OBJS) `echo $sim_hw | sed -e 's/\([^ ][^ ]*\)/dv-\1.o/g'`"
-# Check whether --enable-sim-hardware or --disable-sim-hardware was given.
-if test "${enable_sim_hardware+set}" = set; then
- enableval="$enable_sim_hardware"
-
-case "${enableval}" in
- yes) sim_hw_p=yes;;
- no) sim_hw_p=no;;
- ,*) sim_hw_p=yes; hardware="${hardware} `echo ${enableval} | sed -e 's/,/ /'`";;
- *,) sim_hw_p=yes; hardware="`echo ${enableval} | sed -e 's/,/ /'` ${hardware}";;
- *) sim_hw_p=yes; hardware="`echo ${enableval} | sed -e 's/,/ /'`"'';;
-esac
-if test "$sim_hw_p" != yes; then
- sim_hw_objs=
- sim_hw_cflags="-DWITH_HW=0"
- sim_hw=
-else
- sim_hw_cflags="-DWITH_HW=1"
- # remove duplicates
- sim_hw=""
- sim_hw_objs="\$(SIM_COMMON_HW_OBJS)"
- for i in x $hardware ; do
- case " $f " in
- x) ;;
- *" $i "*) ;;
- *) sim_hw="$sim_hw $i" ; sim_hw_objs="$sim_hw_objs dv-$i.o";;
- esac
- done
-fi
-if test x"$silent" != x"yes" && test "$sim_hw_p" = "yes"; then
- echo "Setting hardware to $sim_hw_cflags, $sim_hw, $sim_hw_objs"
-fi
-else
-
-if test "$sim_hw_p" != yes; then
- sim_hw_objs=
- sim_hw_cflags="-DWITH_HW=0"
- sim_hw=
-fi
-if test x"$silent" != x"yes"; then
- echo "Setting hardware to $sim_hw_cflags, $sim_hw, $sim_hw_objs"
-fi
-fi
-
-
-for ac_hdr in string.h strings.h stdlib.h stdlib.h fcntl.h
-do
-ac_safe=`echo "$ac_hdr" | sed 'y%./+-%__p_%'`
-echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6
-echo "configure:3827: checking for $ac_hdr" >&5
-if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 3832 "configure"
-#include "confdefs.h"
-#include <$ac_hdr>
-EOF
-ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:3837: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
-ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
-if test -z "$ac_err"; then
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=yes"
-else
- echo "$ac_err" >&5
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=no"
-fi
-rm -f conftest*
-fi
-if eval "test \"`echo '$ac_cv_header_'$ac_safe`\" = yes"; then
- echo "$ac_t""yes" 1>&6
- ac_tr_hdr=HAVE_`echo $ac_hdr | sed 'y%abcdefghijklmnopqrstuvwxyz./-%ABCDEFGHIJKLMNOPQRSTUVWXYZ___%'`
- cat >> confdefs.h <<EOF
-#define $ac_tr_hdr 1
-EOF
-
-else
- echo "$ac_t""no" 1>&6
-fi
-done
-
-
-
-
-
-
-trap '' 1 2 15
-cat > confcache <<\EOF
-# This file is a shell script that caches the results of configure
-# tests run on this system so they can be shared between configure
-# scripts and configure runs. It is not useful on other systems.
-# If it contains results you don't want to keep, you may remove or edit it.
-#
-# By default, configure uses ./config.cache as the cache file,
-# creating it if it does not exist already. You can give configure
-# the --cache-file=FILE option to use a different cache file; that is
-# what configure does when it calls configure scripts in
-# subdirectories, so they share the cache.
-# Giving --cache-file=/dev/null disables caching, for debugging configure.
-# config.status only pays attention to the cache file if you give it the
-# --recheck option to rerun configure.
-#
-EOF
-# The following way of writing the cache mishandles newlines in values,
-# but we know of no workaround that is simple, portable, and efficient.
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-# Ultrix sh set writes to stderr and can't be redirected directly,
-# and sets the high bit in the cache file unless we assign to the vars.
-(set) 2>&1 |
- case `(ac_space=' '; set | grep ac_space) 2>&1` in
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- # `set' does not quote correctly, so add quotes (double-quote substitution
- # turns \\\\ into \\, and sed turns \\ into \).
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- ;;
- *)
- # `set' quotes correctly as required by POSIX, so do not add quotes.
- sed -n -e 's/^\([a-zA-Z0-9_]*_cv_[a-zA-Z0-9_]*\)=\(.*\)/\1=${\1=\2}/p'
- ;;
- esac >> confcache
-if cmp -s $cache_file confcache; then
- :
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- if test -w $cache_file; then
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- cat confcache > $cache_file
- else
- echo "not updating unwritable cache $cache_file"
- fi
-fi
-rm -f confcache
-
-trap 'rm -fr conftest* confdefs* core core.* *.core $ac_clean_files; exit 1' 1 2 15
-
-test "x$prefix" = xNONE && prefix=$ac_default_prefix
-# Let make expand exec_prefix.
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-
-# Any assignment to VPATH causes Sun make to only execute
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-# If there is a colon in the path, we need to keep it.
-if test "x$srcdir" = x.; then
- ac_vpsub='/^[ ]*VPATH[ ]*=[^:]*$/d'
-fi
-
-trap 'rm -f $CONFIG_STATUS conftest*; exit 1' 1 2 15
-
-DEFS=-DHAVE_CONFIG_H
-
-# Without the "./", some shells look in PATH for config.status.
-: ${CONFIG_STATUS=./config.status}
-
-echo creating $CONFIG_STATUS
-rm -f $CONFIG_STATUS
-cat > $CONFIG_STATUS <<EOF
-#! /bin/sh
-# Generated automatically by configure.
-# Run this file to recreate the current configuration.
-# This directory was configured as follows,
-# on host `(hostname || uname -n) 2>/dev/null | sed 1q`:
-#
-# $0 $ac_configure_args
-#
-# Compiler output produced by configure, useful for debugging
-# configure, is in ./config.log if it exists.
-
-ac_cs_usage="Usage: $CONFIG_STATUS [--recheck] [--version] [--help]"
-for ac_option
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- case "\$ac_option" in
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- exec \${CONFIG_SHELL-/bin/sh} $0 $ac_configure_args --no-create --no-recursion ;;
- -version | --version | --versio | --versi | --vers | --ver | --ve | --v)
- echo "$CONFIG_STATUS generated by autoconf version 2.13"
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- echo "\$ac_cs_usage"; exit 0 ;;
- *) echo "\$ac_cs_usage"; exit 1 ;;
- esac
-done
-
-ac_given_srcdir=$srcdir
-ac_given_INSTALL="$INSTALL"
-
-trap 'rm -fr `echo "Makefile.sim:Makefile.in Make-common.sim:../common/Make-common.in .gdbinit:../common/gdbinit.in config.h:config.in" | sed "s/:[^ ]*//g"` conftest*; exit 1' 1 2 15
-EOF
-cat >> $CONFIG_STATUS <<EOF
-
-# Protect against being on the right side of a sed subst in config.status.
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-$ac_vpsub
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-s%@sim_endian@%$sim_endian%g
-s%@sim_hostendian@%$sim_hostendian%g
-s%@sim_float@%$sim_float%g
-s%@sim_scache@%$sim_scache%g
-s%@sim_default_model@%$sim_default_model%g
-s%@sim_hw_cflags@%$sim_hw_cflags%g
-s%@sim_hw_objs@%$sim_hw_objs%g
-s%@sim_hw@%$sim_hw%g
-s%@sim_inline@%$sim_inline%g
-s%@sim_packages@%$sim_packages%g
-s%@sim_regparm@%$sim_regparm%g
-s%@sim_reserved_bits@%$sim_reserved_bits%g
-s%@sim_smp@%$sim_smp%g
-s%@sim_stdcall@%$sim_stdcall%g
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-s%@WARN_CFLAGS@%$WARN_CFLAGS%g
-s%@WERROR_CFLAGS@%$WERROR_CFLAGS%g
-s%@SHELL@%$SHELL%g
-s%@CFLAGS@%$CFLAGS%g
-s%@CPPFLAGS@%$CPPFLAGS%g
-s%@CXXFLAGS@%$CXXFLAGS%g
-s%@FFLAGS@%$FFLAGS%g
-s%@DEFS@%$DEFS%g
-s%@LDFLAGS@%$LDFLAGS%g
-s%@LIBS@%$LIBS%g
-s%@exec_prefix@%$exec_prefix%g
-s%@prefix@%$prefix%g
-s%@program_transform_name@%$program_transform_name%g
-s%@bindir@%$bindir%g
-s%@sbindir@%$sbindir%g
-s%@libexecdir@%$libexecdir%g
-s%@datadir@%$datadir%g
-s%@sysconfdir@%$sysconfdir%g
-s%@sharedstatedir@%$sharedstatedir%g
-s%@localstatedir@%$localstatedir%g
-s%@libdir@%$libdir%g
-s%@includedir@%$includedir%g
-s%@oldincludedir@%$oldincludedir%g
-s%@infodir@%$infodir%g
-s%@mandir@%$mandir%g
-s%@host@%$host%g
-s%@host_alias@%$host_alias%g
-s%@host_cpu@%$host_cpu%g
-s%@host_vendor@%$host_vendor%g
-s%@host_os@%$host_os%g
-s%@target@%$target%g
-s%@target_alias@%$target_alias%g
-s%@target_cpu@%$target_cpu%g
-s%@target_vendor@%$target_vendor%g
-s%@target_os@%$target_os%g
-s%@build@%$build%g
-s%@build_alias@%$build_alias%g
-s%@build_cpu@%$build_cpu%g
-s%@build_vendor@%$build_vendor%g
-s%@build_os@%$build_os%g
-s%@CC@%$CC%g
-s%@INSTALL_PROGRAM@%$INSTALL_PROGRAM%g
-s%@INSTALL_SCRIPT@%$INSTALL_SCRIPT%g
-s%@INSTALL_DATA@%$INSTALL_DATA%g
-s%@CC_FOR_BUILD@%$CC_FOR_BUILD%g
-s%@HDEFINES@%$HDEFINES%g
-s%@AR@%$AR%g
-s%@RANLIB@%$RANLIB%g
-s%@SET_MAKE@%$SET_MAKE%g
-s%@CPP@%$CPP%g
-s%@ALLOCA@%$ALLOCA%g
-s%@USE_NLS@%$USE_NLS%g
-s%@MSGFMT@%$MSGFMT%g
-s%@GMSGFMT@%$GMSGFMT%g
-s%@XGETTEXT@%$XGETTEXT%g
-s%@USE_INCLUDED_LIBINTL@%$USE_INCLUDED_LIBINTL%g
-s%@CATALOGS@%$CATALOGS%g
-s%@CATOBJEXT@%$CATOBJEXT%g
-s%@DATADIRNAME@%$DATADIRNAME%g
-s%@GMOFILES@%$GMOFILES%g
-s%@INSTOBJEXT@%$INSTOBJEXT%g
-s%@INTLDEPS@%$INTLDEPS%g
-s%@INTLLIBS@%$INTLLIBS%g
-s%@INTLOBJS@%$INTLOBJS%g
-s%@POFILES@%$POFILES%g
-s%@POSUB@%$POSUB%g
-s%@INCLUDE_LOCALE_H@%$INCLUDE_LOCALE_H%g
-s%@GT_NO@%$GT_NO%g
-s%@GT_YES@%$GT_YES%g
-s%@MKINSTALLDIRS@%$MKINSTALLDIRS%g
-s%@l@%$l%g
-s%@MAINT@%$MAINT%g
-s%@sim_bswap@%$sim_bswap%g
-s%@sim_cflags@%$sim_cflags%g
-s%@sim_debug@%$sim_debug%g
-s%@sim_stdio@%$sim_stdio%g
-s%@sim_trace@%$sim_trace%g
-s%@sim_profile@%$sim_profile%g
-s%@EXEEXT@%$EXEEXT%g
-s%@m68hc11_extra_objs@%$m68hc11_extra_objs%g
-
-CEOF
-EOF
-
-cat >> $CONFIG_STATUS <<\EOF
-
-# Split the substitutions into bite-sized pieces for seds with
-# small command number limits, like on Digital OSF/1 and HP-UX.
-ac_max_sed_cmds=90 # Maximum number of lines to put in a sed script.
-ac_file=1 # Number of current file.
-ac_beg=1 # First line for current file.
-ac_end=$ac_max_sed_cmds # Line after last line for current file.
-ac_more_lines=:
-ac_sed_cmds=""
-while $ac_more_lines; do
- if test $ac_beg -gt 1; then
- sed "1,${ac_beg}d; ${ac_end}q" conftest.subs > conftest.s$ac_file
- else
- sed "${ac_end}q" conftest.subs > conftest.s$ac_file
- fi
- if test ! -s conftest.s$ac_file; then
- ac_more_lines=false
- rm -f conftest.s$ac_file
- else
- if test -z "$ac_sed_cmds"; then
- ac_sed_cmds="sed -f conftest.s$ac_file"
- else
- ac_sed_cmds="$ac_sed_cmds | sed -f conftest.s$ac_file"
- fi
- ac_file=`expr $ac_file + 1`
- ac_beg=$ac_end
- ac_end=`expr $ac_end + $ac_max_sed_cmds`
- fi
-done
-if test -z "$ac_sed_cmds"; then
- ac_sed_cmds=cat
-fi
-EOF
-
-cat >> $CONFIG_STATUS <<EOF
-
-CONFIG_FILES=\${CONFIG_FILES-"Makefile.sim:Makefile.in Make-common.sim:../common/Make-common.in .gdbinit:../common/gdbinit.in"}
-EOF
-cat >> $CONFIG_STATUS <<\EOF
-for ac_file in .. $CONFIG_FILES; do if test "x$ac_file" != x..; then
- # Support "outfile[:infile[:infile...]]", defaulting infile="outfile.in".
- case "$ac_file" in
- *:*) ac_file_in=`echo "$ac_file"|sed 's%[^:]*:%%'`
- ac_file=`echo "$ac_file"|sed 's%:.*%%'` ;;
- *) ac_file_in="${ac_file}.in" ;;
- esac
-
- # Adjust a relative srcdir, top_srcdir, and INSTALL for subdirectories.
-
- # Remove last slash and all that follows it. Not all systems have dirname.
- ac_dir=`echo $ac_file|sed 's%/[^/][^/]*$%%'`
- if test "$ac_dir" != "$ac_file" && test "$ac_dir" != .; then
- # The file is in a subdirectory.
- test ! -d "$ac_dir" && mkdir "$ac_dir"
- ac_dir_suffix="/`echo $ac_dir|sed 's%^\./%%'`"
- # A "../" for each directory in $ac_dir_suffix.
- ac_dots=`echo $ac_dir_suffix|sed 's%/[^/]*%../%g'`
- else
- ac_dir_suffix= ac_dots=
- fi
-
- case "$ac_given_srcdir" in
- .) srcdir=.
- if test -z "$ac_dots"; then top_srcdir=.
- else top_srcdir=`echo $ac_dots|sed 's%/$%%'`; fi ;;
- /*) srcdir="$ac_given_srcdir$ac_dir_suffix"; top_srcdir="$ac_given_srcdir" ;;
- *) # Relative path.
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- top_srcdir="$ac_dots$ac_given_srcdir" ;;
- esac
-
- case "$ac_given_INSTALL" in
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- *) INSTALL="$ac_dots$ac_given_INSTALL" ;;
- esac
-
- echo creating "$ac_file"
- rm -f "$ac_file"
- configure_input="Generated automatically from `echo $ac_file_in|sed 's%.*/%%'` by configure."
- case "$ac_file" in
- *Makefile*) ac_comsub="1i\\
-# $configure_input" ;;
- *) ac_comsub= ;;
- esac
-
- ac_file_inputs=`echo $ac_file_in|sed -e "s%^%$ac_given_srcdir/%" -e "s%:% $ac_given_srcdir/%g"`
- sed -e "$ac_comsub
-s%@configure_input@%$configure_input%g
-s%@srcdir@%$srcdir%g
-s%@top_srcdir@%$top_srcdir%g
-s%@INSTALL@%$INSTALL%g
-" $ac_file_inputs | (eval "$ac_sed_cmds") > $ac_file
-fi; done
-rm -f conftest.s*
-
-# These sed commands are passed to sed as "A NAME B NAME C VALUE D", where
-# NAME is the cpp macro being defined and VALUE is the value it is being given.
-#
-# ac_d sets the value in "#define NAME VALUE" lines.
-ac_dA='s%^\([ ]*\)#\([ ]*define[ ][ ]*\)'
-ac_dB='\([ ][ ]*\)[^ ]*%\1#\2'
-ac_dC='\3'
-ac_dD='%g'
-# ac_u turns "#undef NAME" with trailing blanks into "#define NAME VALUE".
-ac_uA='s%^\([ ]*\)#\([ ]*\)undef\([ ][ ]*\)'
-ac_uB='\([ ]\)%\1#\2define\3'
-ac_uC=' '
-ac_uD='\4%g'
-# ac_e turns "#undef NAME" without trailing blanks into "#define NAME VALUE".
-ac_eA='s%^\([ ]*\)#\([ ]*\)undef\([ ][ ]*\)'
-ac_eB='$%\1#\2define\3'
-ac_eC=' '
-ac_eD='%g'
-
-if test "${CONFIG_HEADERS+set}" != set; then
-EOF
-cat >> $CONFIG_STATUS <<EOF
- CONFIG_HEADERS="config.h:config.in"
-EOF
-cat >> $CONFIG_STATUS <<\EOF
-fi
-for ac_file in .. $CONFIG_HEADERS; do if test "x$ac_file" != x..; then
- # Support "outfile[:infile[:infile...]]", defaulting infile="outfile.in".
- case "$ac_file" in
- *:*) ac_file_in=`echo "$ac_file"|sed 's%[^:]*:%%'`
- ac_file=`echo "$ac_file"|sed 's%:.*%%'` ;;
- *) ac_file_in="${ac_file}.in" ;;
- esac
-
- echo creating $ac_file
-
- rm -f conftest.frag conftest.in conftest.out
- ac_file_inputs=`echo $ac_file_in|sed -e "s%^%$ac_given_srcdir/%" -e "s%:% $ac_given_srcdir/%g"`
- cat $ac_file_inputs > conftest.in
-
-EOF
-
-# Transform confdefs.h into a sed script conftest.vals that substitutes
-# the proper values into config.h.in to produce config.h. And first:
-# Protect against being on the right side of a sed subst in config.status.
-# Protect against being in an unquoted here document in config.status.
-rm -f conftest.vals
-cat > conftest.hdr <<\EOF
-s/[\\&%]/\\&/g
-s%[\\$`]%\\&%g
-s%#define \([A-Za-z_][A-Za-z0-9_]*\) *\(.*\)%${ac_dA}\1${ac_dB}\1${ac_dC}\2${ac_dD}%gp
-s%ac_d%ac_u%gp
-s%ac_u%ac_e%gp
-EOF
-sed -n -f conftest.hdr confdefs.h > conftest.vals
-rm -f conftest.hdr
-
-# This sed command replaces #undef with comments. This is necessary, for
-# example, in the case of _POSIX_SOURCE, which is predefined and required
-# on some systems where configure will not decide to define it.
-cat >> conftest.vals <<\EOF
-s%^[ ]*#[ ]*undef[ ][ ]*[a-zA-Z_][a-zA-Z_0-9]*%/* & */%
-EOF
-
-# Break up conftest.vals because some shells have a limit on
-# the size of here documents, and old seds have small limits too.
-
-rm -f conftest.tail
-while :
-do
- ac_lines=`grep -c . conftest.vals`
- # grep -c gives empty output for an empty file on some AIX systems.
- if test -z "$ac_lines" || test "$ac_lines" -eq 0; then break; fi
- # Write a limited-size here document to conftest.frag.
- echo ' cat > conftest.frag <<CEOF' >> $CONFIG_STATUS
- sed ${ac_max_here_lines}q conftest.vals >> $CONFIG_STATUS
- echo 'CEOF
- sed -f conftest.frag conftest.in > conftest.out
- rm -f conftest.in
- mv conftest.out conftest.in
-' >> $CONFIG_STATUS
- sed 1,${ac_max_here_lines}d conftest.vals > conftest.tail
- rm -f conftest.vals
- mv conftest.tail conftest.vals
-done
-rm -f conftest.vals
-
-cat >> $CONFIG_STATUS <<\EOF
- rm -f conftest.frag conftest.h
- echo "/* $ac_file. Generated automatically by configure. */" > conftest.h
- cat conftest.in >> conftest.h
- rm -f conftest.in
- if cmp -s $ac_file conftest.h 2>/dev/null; then
- echo "$ac_file is unchanged"
- rm -f conftest.h
- else
- # Remove last slash and all that follows it. Not all systems have dirname.
- ac_dir=`echo $ac_file|sed 's%/[^/][^/]*$%%'`
- if test "$ac_dir" != "$ac_file" && test "$ac_dir" != .; then
- # The file is in a subdirectory.
- test ! -d "$ac_dir" && mkdir "$ac_dir"
- fi
- rm -f $ac_file
- mv conftest.h $ac_file
- fi
-fi; done
-
-EOF
-
-cat >> $CONFIG_STATUS <<EOF
-ac_sources="$sim_link_files"
-ac_dests="$sim_link_links"
-EOF
-
-cat >> $CONFIG_STATUS <<\EOF
-srcdir=$ac_given_srcdir
-while test -n "$ac_sources"; do
- set $ac_dests; ac_dest=$1; shift; ac_dests=$*
- set $ac_sources; ac_source=$1; shift; ac_sources=$*
-
- echo "linking $srcdir/$ac_source to $ac_dest"
-
- if test ! -r $srcdir/$ac_source; then
- { echo "configure: error: $srcdir/$ac_source: File not found" 1>&2; exit 1; }
- fi
- rm -f $ac_dest
-
- # Make relative symlinks.
- # Remove last slash and all that follows it. Not all systems have dirname.
- ac_dest_dir=`echo $ac_dest|sed 's%/[^/][^/]*$%%'`
- if test "$ac_dest_dir" != "$ac_dest" && test "$ac_dest_dir" != .; then
- # The dest file is in a subdirectory.
- test ! -d "$ac_dest_dir" && mkdir "$ac_dest_dir"
- ac_dest_dir_suffix="/`echo $ac_dest_dir|sed 's%^\./%%'`"
- # A "../" for each directory in $ac_dest_dir_suffix.
- ac_dots=`echo $ac_dest_dir_suffix|sed 's%/[^/]*%../%g'`
- else
- ac_dest_dir_suffix= ac_dots=
- fi
-
- case "$srcdir" in
- [/$]*) ac_rel_source="$srcdir/$ac_source" ;;
- *) ac_rel_source="$ac_dots$srcdir/$ac_source" ;;
- esac
-
- # Make a symlink if possible; otherwise try a hard link.
- if ln -s $ac_rel_source $ac_dest 2>/dev/null ||
- ln $srcdir/$ac_source $ac_dest; then :
- else
- { echo "configure: error: can not link $ac_dest to $srcdir/$ac_source" 1>&2; exit 1; }
- fi
-done
-EOF
-cat >> $CONFIG_STATUS <<EOF
-
-EOF
-cat >> $CONFIG_STATUS <<\EOF
-case "x$CONFIG_FILES" in
- xMakefile*)
- echo "Merging Makefile.sim+Make-common.sim into Makefile ..."
- rm -f Makesim1.tmp Makesim2.tmp Makefile
- sed -n -e '/^## COMMON_PRE_/,/^## End COMMON_PRE_/ p' <Make-common.sim >Makesim1.tmp
- sed -n -e '/^## COMMON_POST_/,/^## End COMMON_POST_/ p' <Make-common.sim >Makesim2.tmp
- sed -e '/^## COMMON_PRE_/ r Makesim1.tmp' \
- -e '/^## COMMON_POST_/ r Makesim2.tmp' \
- <Makefile.sim >Makefile
- rm -f Makefile.sim Make-common.sim Makesim1.tmp Makesim2.tmp
- ;;
- esac
- case "x$CONFIG_HEADERS" in xconfig.h:config.in) echo > stamp-h ;; esac
-
-exit 0
-EOF
-chmod +x $CONFIG_STATUS
-rm -fr confdefs* $ac_clean_files
-test "$no_create" = yes || ${CONFIG_SHELL-/bin/sh} $CONFIG_STATUS || exit 1
-
-
diff --git a/sim/m68hc11/configure.in b/sim/m68hc11/configure.in
deleted file mode 100644
index 78dee5837af..00000000000
--- a/sim/m68hc11/configure.in
+++ /dev/null
@@ -1,35 +0,0 @@
-dnl Process this file with autoconf to produce a configure script.
-sinclude(../common/aclocal.m4)
-AC_PREREQ(2.12.1)dnl
-AC_INIT(Makefile.in)
-
-SIM_AC_COMMON
-
-dnl Options available in this module
-SIM_AC_OPTION_INLINE()
-SIM_AC_OPTION_ALIGNMENT(NONSTRICT_ALIGNMENT)
-SIM_AC_OPTION_HOSTENDIAN
-SIM_AC_OPTION_WARNINGS
-
-#
-# Add simulated hardware devices
-#
-hw_enabled=no
-case "${target}" in
- m68hc11-*-*|m6811-*-*)
- hw_enabled=yes
- hw_extra_devices="m68hc11 m68hc11sio m68hc11eepr m68hc11tim m68hc11spi nvram"
- m68hc11_extra_objs="dv-sockser.o"
- SIM_SUBTARGET="$SIM_SUBTARGET -DTARGET_M68HC11=1"
- ;;
- *)
- m68hc11_extra_objs=""
- ;;
-esac
-SIM_AC_OPTION_HARDWARE($hw_enabled,$hw_devices,$hw_extra_devices)
-
-AC_CHECK_HEADERS(string.h strings.h stdlib.h stdlib.h fcntl.h)
-
-AC_SUBST(m68hc11_extra_objs)
-
-SIM_AC_OUTPUT
diff --git a/sim/m68hc11/dv-m68hc11.c b/sim/m68hc11/dv-m68hc11.c
deleted file mode 100644
index f300297331a..00000000000
--- a/sim/m68hc11/dv-m68hc11.c
+++ /dev/null
@@ -1,593 +0,0 @@
-/* dv-m68hc11.c -- CPU 68HC11&68HC12 as a device.
- Copyright (C) 1999, 2000 Free Software Foundation, Inc.
- Written by Stephane Carrez (stcarrez@worldnet.fr)
- (From a driver model Contributed by Cygnus Solutions.)
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-#include "sim-main.h"
-#include "hw-main.h"
-
-/* DEVICE
-
- m68hc11cpu - m68hc11 cpu virtual device
- m68hc12cpu - m68hc12 cpu virtual device
-
- DESCRIPTION
-
- Implements the external m68hc11/68hc12 functionality. This includes
- the delivery of of interrupts generated from other devices and the
- handling of device specific registers.
-
-
- PROPERTIES
-
- reg <base> <size>
-
- Register base (should be 0x1000 0x03f for C11, 0x0000 0x3ff for HC12).
-
- clock <hz>
-
- Frequency of the quartz used by the processor.
-
- mode [single | expanded | bootstrap | test]
-
- Cpu operating mode (the MODA and MODB external pins).
-
-
- PORTS
-
- reset (input)
-
- Reset the cpu and generates a cpu-reset event (used to reset
- other devices).
-
- nmi (input)
-
- Deliver a non-maskable interrupt to the processor.
-
-
- cpu-reset (output)
-
- Event generated after the CPU performs a reset.
-
-
- BUGS
-
- When delivering an interrupt, this code assumes that there is only
- one processor (number 0).
-
- */
-
-
-
-struct m68hc11cpu {
- /* Pending interrupts for delivery by event handler. */
- int pending_reset;
- int pending_nmi;
- int pending_level;
- struct hw_event *event;
- unsigned_word attach_address;
- int attach_size;
- int attach_space;
-};
-
-
-
-/* input port ID's */
-
-enum {
- RESET_PORT,
- NMI_PORT,
- IRQ_PORT,
- CPU_RESET_PORT
-};
-
-
-static const struct hw_port_descriptor m68hc11cpu_ports[] = {
-
- /* Interrupt inputs. */
- { "reset", RESET_PORT, 0, input_port, },
- { "nmi", NMI_PORT, 0, input_port, },
- { "irq", IRQ_PORT, 0, input_port, },
-
- /* Events generated for connection to other devices. */
- { "cpu-reset", CPU_RESET_PORT, 0, output_port, },
-
- { NULL, },
-};
-
-static hw_io_read_buffer_method m68hc11cpu_io_read_buffer;
-static hw_io_write_buffer_method m68hc11cpu_io_write_buffer;
-static hw_ioctl_method m68hc11_ioctl;
-
-/* Finish off the partially created hw device. Attach our local
- callbacks. Wire up our port names etc. */
-
-static hw_port_event_method m68hc11cpu_port_event;
-
-
-static void
-dv_m6811_attach_address_callback (struct hw *me,
- int level,
- int space,
- address_word addr,
- address_word nr_bytes,
- struct hw *client)
-{
- HW_TRACE ((me, "attach - level=%d, space=%d, addr=0x%lx, sz=%ld, client=%s",
- level, space, (unsigned long) addr, (unsigned long) nr_bytes,
- hw_path (client)));
-
- if (space != io_map)
- {
- sim_core_attach (hw_system (me),
- NULL, /*cpu*/
- level,
- access_read_write_exec,
- space, addr,
- nr_bytes,
- 0, /* modulo */
- client,
- NULL);
- }
- else
- {
- /*printf("Attach from sub device: %d\n", (long) addr);*/
- sim_core_attach (hw_system (me),
- NULL, /*cpu*/
- level,
- access_io,
- space, addr,
- nr_bytes,
- 0, /* modulo */
- client,
- NULL);
- }
-}
-
-static void
-dv_m6811_detach_address_callback (struct hw *me,
- int level,
- int space,
- address_word addr,
- address_word nr_bytes,
- struct hw *client)
-{
- sim_core_detach (hw_system (me), NULL, /*cpu*/
- level, space, addr);
-}
-
-static void
-m68hc11_delete (struct hw* me)
-{
- struct m68hc11cpu *controller;
-
- controller = hw_data (me);
-
- hw_detach_address (me, M6811_IO_LEVEL,
- controller->attach_space,
- controller->attach_address,
- controller->attach_size, me);
-}
-
-
-static void
-attach_m68hc11_regs (struct hw *me,
- struct m68hc11cpu *controller)
-{
- SIM_DESC sd;
- sim_cpu *cpu;
- reg_property_spec reg;
- const char *cpu_mode;
-
- if (hw_find_property (me, "reg") == NULL)
- hw_abort (me, "Missing \"reg\" property");
-
- if (!hw_find_reg_array_property (me, "reg", 0, &reg))
- hw_abort (me, "\"reg\" property must contain one addr/size entry");
-
- hw_unit_address_to_attach_address (hw_parent (me),
- &reg.address,
- &controller->attach_space,
- &controller->attach_address,
- me);
- hw_unit_size_to_attach_size (hw_parent (me),
- &reg.size,
- &controller->attach_size, me);
-
- hw_attach_address (hw_parent (me), M6811_IO_LEVEL,
- controller->attach_space,
- controller->attach_address,
- controller->attach_size,
- me);
- set_hw_delete (me, m68hc11_delete);
-
- /* Get cpu frequency. */
- sd = hw_system (me);
- cpu = STATE_CPU (sd, 0);
- if (hw_find_property (me, "clock") != NULL)
- {
- cpu->cpu_frequency = hw_find_integer_property (me, "clock");
- }
- else
- {
- cpu->cpu_frequency = 8*1000*1000;
- }
-
- cpu_mode = "expanded";
- if (hw_find_property (me, "mode") != NULL)
- cpu_mode = hw_find_string_property (me, "mode");
-
- if (strcmp (cpu_mode, "test") == 0)
- cpu->cpu_mode = M6811_MDA | M6811_SMOD;
- else if (strcmp (cpu_mode, "bootstrap") == 0)
- cpu->cpu_mode = M6811_SMOD;
- else if (strcmp (cpu_mode, "single") == 0)
- cpu->cpu_mode = 0;
- else
- cpu->cpu_mode = M6811_MDA;
-}
-
-static void
-m68hc11cpu_finish (struct hw *me)
-{
- struct m68hc11cpu *controller;
-
- controller = HW_ZALLOC (me, struct m68hc11cpu);
- set_hw_data (me, controller);
- set_hw_io_read_buffer (me, m68hc11cpu_io_read_buffer);
- set_hw_io_write_buffer (me, m68hc11cpu_io_write_buffer);
- set_hw_ports (me, m68hc11cpu_ports);
- set_hw_port_event (me, m68hc11cpu_port_event);
- set_hw_attach_address (me, dv_m6811_attach_address_callback);
- set_hw_detach_address (me, dv_m6811_detach_address_callback);
-#ifdef set_hw_ioctl
- set_hw_ioctl (me, m68hc11_ioctl);
-#else
- me->to_ioctl = m68hc11_ioctl;
-#endif
-
- /* Initialize the pending interrupt flags. */
- controller->pending_level = 0;
- controller->pending_reset = 0;
- controller->pending_nmi = 0;
- controller->event = NULL;
-
- attach_m68hc11_regs (me, controller);
-}
-
-/* An event arrives on an interrupt port. */
-
-static void
-deliver_m68hc11cpu_interrupt (struct hw *me, void *data)
-{
-}
-
-
-static void
-m68hc11cpu_port_event (struct hw *me,
- int my_port,
- struct hw *source,
- int source_port,
- int level)
-{
- struct m68hc11cpu *controller = hw_data (me);
- SIM_DESC sd;
- sim_cpu* cpu;
-
- sd = hw_system (me);
- cpu = STATE_CPU (sd, 0);
- switch (my_port)
- {
- case RESET_PORT:
- HW_TRACE ((me, "port-in reset"));
-
- /* The reset is made in 3 steps:
- - First, cleanup the current sim_cpu struct.
- - Reset the devices.
- - Restart the cpu for the reset (get the CPU mode from the
- CONFIG register that gets initialized by EEPROM device). */
- cpu_reset (cpu);
- hw_port_event (me, CPU_RESET_PORT, 1);
- cpu_restart (cpu);
- break;
-
- case NMI_PORT:
- controller->pending_nmi = 1;
- HW_TRACE ((me, "port-in nmi"));
- break;
-
- case IRQ_PORT:
- /* level == 0 means that the interrupt was cleared. */
- if(level == 0)
- controller->pending_level = -1; /* signal end of interrupt */
- else
- controller->pending_level = level;
- HW_TRACE ((me, "port-in level=%d", level));
- break;
-
- default:
- hw_abort (me, "bad switch");
- break;
- }
-
- /* Schedule an event to be delivered immediately after current
- instruction. */
- if(controller->event != NULL)
- hw_event_queue_deschedule(me, controller->event);
- controller->event =
- hw_event_queue_schedule (me, 0, deliver_m68hc11cpu_interrupt, NULL);
-}
-
-
-io_reg_desc config_desc[] = {
- { M6811_NOSEC, "NOSEC ", "Security Mode Disable" },
- { M6811_NOCOP, "NOCOP ", "COP System Disable" },
- { M6811_ROMON, "ROMON ", "Enable On-chip Rom" },
- { M6811_EEON, "EEON ", "Enable On-chip EEprom" },
- { 0, 0, 0 }
-};
-
-io_reg_desc hprio_desc[] = {
- { M6811_RBOOT, "RBOOT ", "Read Bootstrap ROM" },
- { M6811_SMOD, "SMOD ", "Special Mode" },
- { M6811_MDA, "MDA ", "Mode Select A" },
- { M6811_IRV, "IRV ", "Internal Read Visibility" },
- { 0, 0, 0 }
-};
-
-io_reg_desc option_desc[] = {
- { M6811_ADPU, "ADPU ", "A/D Powerup" },
- { M6811_CSEL, "CSEL ", "A/D/EE Charge pump clock source select" },
- { M6811_IRQE, "IRQE ", "IRQ Edge/Level sensitive" },
- { M6811_DLY, "DLY ", "Stop exit turn on delay" },
- { M6811_CME, "CME ", "Clock Monitor Enable" },
- { M6811_CR1, "CR1 ", "COP timer rate select (CR1)" },
- { M6811_CR0, "CR0 ", "COP timer rate select (CR0)" },
- { 0, 0, 0 }
-};
-
-static void
-m68hc11_info (struct hw *me)
-{
- SIM_DESC sd;
- uint16 base = 0;
- sim_cpu *cpu;
- struct m68hc11sio *controller;
- uint8 val;
-
- sd = hw_system (me);
- cpu = STATE_CPU (sd, 0);
- controller = hw_data (me);
-
- base = cpu_get_io_base (cpu);
- sim_io_printf (sd, "M68HC11:\n");
-
- val = cpu->ios[M6811_HPRIO];
- print_io_byte (sd, "HPRIO ", hprio_desc, val, base + M6811_HPRIO);
- sim_io_printf (sd, "\n");
-
- val = cpu->ios[M6811_CONFIG];
- print_io_byte (sd, "CONFIG", config_desc, val, base + M6811_CONFIG);
- sim_io_printf (sd, "\n");
-
- val = cpu->ios[M6811_OPTION];
- print_io_byte (sd, "OPTION", option_desc, val, base + M6811_OPTION);
- sim_io_printf (sd, "\n");
-
- val = cpu->ios[M6811_INIT];
- print_io_byte (sd, "INIT ", 0, val, base + M6811_INIT);
- sim_io_printf (sd, "Ram = 0x%04x IO = 0x%04x\n",
- (((uint16) (val & 0xF0)) << 8),
- (((uint16) (val & 0x0F)) << 12));
-
-
- cpu_info (sd, cpu);
- interrupts_info (sd, &cpu->cpu_interrupts);
-}
-
-static int
-m68hc11_ioctl (struct hw *me,
- hw_ioctl_request request,
- va_list ap)
-{
- m68hc11_info (me);
- return 0;
-}
-
-/* generic read/write */
-
-static unsigned
-m68hc11cpu_io_read_buffer (struct hw *me,
- void *dest,
- int space,
- unsigned_word base,
- unsigned nr_bytes)
-{
- SIM_DESC sd;
- struct m68hc11cpu *controller = hw_data (me);
- sim_cpu *cpu;
- unsigned byte = 0;
- int result;
-
- HW_TRACE ((me, "read 0x%08lx %d", (long) base, (int) nr_bytes));
-
- sd = hw_system (me);
- cpu = STATE_CPU (sd, 0);
-
- /* Handle reads for the sub-devices. */
- base -= controller->attach_address;
- result = sim_core_read_buffer (sd, cpu,
- io_map, dest, base, nr_bytes);
- if (result > 0)
- return result;
-
- while (nr_bytes)
- {
- if (base >= controller->attach_size)
- break;
-
- memcpy (dest, &cpu->ios[base], 1);
- dest++;
- base++;
- byte++;
- nr_bytes--;
- }
- return byte;
-}
-
-
-static void
-m68hc11cpu_io_write (struct hw *me, sim_cpu *cpu,
- unsigned_word addr, uint8 val)
-{
- switch (addr)
- {
- case M6811_PORTA:
- break;
-
- case M6811_PIOC:
- break;
-
- case M6811_PORTC:
- break;
-
- case M6811_PORTB:
- break;
-
- case M6811_PORTCL:
- break;
-
- case M6811_DDRC:
- break;
-
- case M6811_PORTD:
- break;
-
- case M6811_DDRD:
- break;
-
- case M6811_TMSK2:
-
- break;
-
- /* Change the RAM and I/O mapping. */
- case M6811_INIT:
- {
- uint8 old_bank = cpu->ios[M6811_INIT];
-
- cpu->ios[M6811_INIT] = val;
-
- /* Update IO mapping. Detach from the old address
- and attach to the new one. */
- if ((old_bank & 0xF0) != (val & 0xF0))
- {
- struct m68hc11cpu *controller = hw_data (me);
-
- hw_detach_address (hw_parent (me), M6811_IO_LEVEL,
- controller->attach_space,
- controller->attach_address,
- controller->attach_size,
- me);
- controller->attach_address = (val & 0x0F0) << 12;
- hw_attach_address (hw_parent (me), M6811_IO_LEVEL,
- controller->attach_space,
- controller->attach_address,
- controller->attach_size,
- me);
- }
- if ((old_bank & 0x0F) != (val & 0x0F))
- {
- ;
- }
- return;
- }
-
- /* Writing the config is similar to programing the eeprom.
- The config register value is the last byte of the EEPROM.
- This last byte is not mapped in memory (that's why we have
- to add '1' to 'end_addr'). */
- case M6811_CONFIG:
- {
- return;
- }
-
-
- /* COP reset. */
- case M6811_COPRST:
- if (val == 0xAA && cpu->ios[addr] == 0x55)
- {
- val = 0;
- /* COP reset here. */
- }
- break;
-
- default:
- break;
-
- }
- cpu->ios[addr] = val;
-}
-
-static unsigned
-m68hc11cpu_io_write_buffer (struct hw *me,
- const void *source,
- int space,
- unsigned_word base,
- unsigned nr_bytes)
-{
- SIM_DESC sd;
- struct m68hc11cpu *controller = hw_data (me);
- unsigned byte;
- sim_cpu *cpu;
- int result;
-
- HW_TRACE ((me, "write 0x%08lx %d", (long) base, (int) nr_bytes));
-
- sd = hw_system (me);
- cpu = STATE_CPU (sd, 0);
- base -= controller->attach_address;
- result = sim_core_write_buffer (sd, cpu,
- io_map, source, base, nr_bytes);
- if (result > 0)
- return result;
-
- byte = 0;
- while (nr_bytes)
- {
- uint8 val;
- if (base >= controller->attach_size)
- break;
-
- val = *((uint8*) source);
- m68hc11cpu_io_write (me, cpu, base, val);
- source++;
- base++;
- byte++;
- nr_bytes--;
- }
- return byte;
-}
-
-const struct hw_descriptor dv_m68hc11_descriptor[] = {
- { "m68hc11", m68hc11cpu_finish },
- { "m68hc12", m68hc11cpu_finish },
- { NULL },
-};
-
diff --git a/sim/m68hc11/dv-m68hc11eepr.c b/sim/m68hc11/dv-m68hc11eepr.c
deleted file mode 100644
index a48456fa13d..00000000000
--- a/sim/m68hc11/dv-m68hc11eepr.c
+++ /dev/null
@@ -1,628 +0,0 @@
-/* dv-m68hc11eepr.c -- Simulation of the 68HC11 Internal EEPROM.
- Copyright (C) 1999, 2000 Free Software Foundation, Inc.
- Written by Stephane Carrez (stcarrez@worldnet.fr)
- (From a driver model Contributed by Cygnus Solutions.)
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-#include "sim-main.h"
-#include "hw-main.h"
-#include "sim-assert.h"
-#include "sim-events.h"
-
-#include <unistd.h>
-#include <fcntl.h>
-#include <errno.h>
-
-
-
-/* DEVICE
-
- m68hc11eepr - m68hc11 EEPROM
-
-
- DESCRIPTION
-
- Implements the 68HC11 eeprom device described in the m68hc11
- user guide (Chapter 4 in the pink book).
-
-
- PROPERTIES
-
- reg <base> <length>
-
- Base of eeprom and its length.
-
- file <path>
-
- Path of the EEPROM file. The default is 'm6811.eeprom'.
-
-
- PORTS
-
- None
-
- */
-
-
-
-/* static functions */
-
-
-/* port ID's */
-
-enum
-{
- RESET_PORT
-};
-
-
-static const struct hw_port_descriptor m68hc11eepr_ports[] =
-{
- { "reset", RESET_PORT, 0, input_port, },
- { NULL, },
-};
-
-
-
-/* The timer/counter register internal state. Note that we store
- state using the control register images, in host endian order. */
-
-struct m68hc11eepr
-{
- address_word base_address; /* control register base */
- int attach_space;
- unsigned size;
- int mapped;
-
- /* Current state of the eeprom programing:
- - eeprom_wmode indicates whether the EEPROM address and byte have
- been latched.
- - eeprom_waddr indicates the EEPROM address that was latched
- and eeprom_wbyte is the byte that was latched.
- - eeprom_wcycle indicates the CPU absolute cycle type when
- the high voltage was applied (successfully) on the EEPROM.
-
- These data members are setup only when we detect good EEPROM programing
- conditions (see Motorola EEPROM Programming and PPROG register usage).
- When the high voltage is switched off, we look at the CPU absolute
- cycle time to see if the EEPROM command must succeeds or not.
- The EEPROM content is updated and saved only at that time.
- (EEPROM command is: byte zero bits program, byte erase, row erase
- and bulk erase).
-
- The CONFIG register is programmed in the same way. It is physically
- located at the end of the EEPROM (eeprom size + 1). It is not mapped
- in memory but it's saved in the EEPROM file. */
- unsigned long eeprom_wcycle;
- uint16 eeprom_waddr;
- uint8 eeprom_wbyte;
- uint8 eeprom_wmode;
-
- uint8* eeprom;
-
- /* Minimum time in CPU cycles for programming the EEPROM. */
- unsigned long eeprom_min_cycles;
-
- char* file_name;
-};
-
-
-
-/* Finish off the partially created hw device. Attach our local
- callbacks. Wire up our port names etc. */
-
-static hw_io_read_buffer_method m68hc11eepr_io_read_buffer;
-static hw_io_write_buffer_method m68hc11eepr_io_write_buffer;
-static hw_ioctl_method m68hc11eepr_ioctl;
-
-/* Read or write the memory bank content from/to a file.
- Returns 0 if the operation succeeded and -1 if it failed. */
-static int
-m6811eepr_memory_rw (struct m68hc11eepr *controller, int mode)
-{
- const char *name = controller->file_name;
- int fd;
- size_t size;
-
- size = controller->size;
- fd = open (name, mode, 0644);
- if (fd < 0)
- {
- if (mode == O_RDONLY)
- {
- memset (controller->eeprom, 0xFF, size);
- /* Default value for CONFIG register (0xFF should be ok):
- controller->eeprom[size - 1] = M6811_NOSEC | M6811_NOCOP
- | M6811_ROMON | M6811_EEON; */
- return 0;
- }
- return -1;
- }
-
- if (mode == O_RDONLY)
- {
- if (read (fd, controller->eeprom, size) != size)
- {
- close (fd);
- return -1;
- }
- }
- else
- {
- if (write (fd, controller->eeprom, size) != size)
- {
- close (fd);
- return -1;
- }
- }
- close (fd);
-
- return 0;
-}
-
-
-
-
-static void
-attach_m68hc11eepr_regs (struct hw *me,
- struct m68hc11eepr *controller)
-{
- unsigned_word attach_address;
- int attach_space;
- unsigned attach_size;
- reg_property_spec reg;
-
- if (hw_find_property (me, "reg") == NULL)
- hw_abort (me, "Missing \"reg\" property");
-
- if (!hw_find_reg_array_property (me, "reg", 0, &reg))
- hw_abort (me, "\"reg\" property must contain one addr/size entry");
-
- hw_unit_address_to_attach_address (hw_parent (me),
- &reg.address,
- &attach_space,
- &attach_address,
- me);
- hw_unit_size_to_attach_size (hw_parent (me),
- &reg.size,
- &attach_size, me);
-
- /* Attach the two IO registers that control the EEPROM.
- The EEPROM is only attached at reset time because it may
- be enabled/disabled by the EEON bit in the CONFIG register. */
- hw_attach_address (hw_parent (me), M6811_IO_LEVEL,
- io_map, M6811_PPROG, 1, me);
- hw_attach_address (hw_parent (me), M6811_IO_LEVEL,
- io_map, M6811_CONFIG, 1, me);
-
- if (hw_find_property (me, "file") == NULL)
- controller->file_name = "m6811.eeprom";
- else
- controller->file_name = hw_find_string_property (me, "file");
-
- controller->attach_space = attach_space;
- controller->base_address = attach_address;
- controller->eeprom = (char*) hw_malloc (me, attach_size + 1);
- controller->eeprom_min_cycles = 10000;
- controller->size = attach_size + 1;
- controller->mapped = 0;
-
- m6811eepr_memory_rw (controller, O_RDONLY);
-}
-
-
-/* An event arrives on an interrupt port. */
-
-static void
-m68hc11eepr_port_event (struct hw *me,
- int my_port,
- struct hw *source,
- int source_port,
- int level)
-{
- SIM_DESC sd;
- struct m68hc11eepr *controller;
- sim_cpu *cpu;
-
- controller = hw_data (me);
- sd = hw_system (me);
- cpu = STATE_CPU (sd, 0);
- switch (my_port)
- {
- case RESET_PORT:
- {
- HW_TRACE ((me, "EEPROM reset"));
-
- /* Re-read the EEPROM from the file. This gives the chance
- to users to erase this file before doing a reset and have
- a fresh EEPROM taken into account. */
- m6811eepr_memory_rw (controller, O_RDONLY);
-
- /* Reset the state of EEPROM programmer. The CONFIG register
- is also initialized from the EEPROM/file content. */
- cpu->ios[M6811_PPROG] = 0;
- if (cpu->cpu_use_local_config)
- cpu->ios[M6811_CONFIG] = cpu->cpu_config;
- else
- cpu->ios[M6811_CONFIG] = controller->eeprom[controller->size-1];
- controller->eeprom_wmode = 0;
- controller->eeprom_waddr = 0;
- controller->eeprom_wbyte = 0;
-
- /* Attach or detach to the bus depending on the EEPROM enable bit.
- The EEPROM CONFIG register is still enabled and can be programmed
- for a next configuration (taken into account only after a reset,
- see Motorola spec). */
- if (cpu->ios[M6811_CONFIG] & M6811_EEON)
- {
- if (controller->mapped)
- hw_attach_address (hw_parent (me), M6811_EEPROM_LEVEL,
- controller->attach_space,
- controller->base_address,
- controller->size - 1,
- me);
- controller->mapped = 0;
- }
- else
- {
- if (!controller->mapped)
- hw_detach_address (hw_parent (me), M6811_EEPROM_LEVEL,
- controller->attach_space,
- controller->base_address,
- controller->size - 1,
- me);
- controller->mapped = 1;
- }
- break;
- }
-
- default:
- hw_abort (me, "Event on unknown port %d", my_port);
- break;
- }
-}
-
-
-static void
-m68hc11eepr_finish (struct hw *me)
-{
- struct m68hc11eepr *controller;
-
- controller = HW_ZALLOC (me, struct m68hc11eepr);
- set_hw_data (me, controller);
- set_hw_io_read_buffer (me, m68hc11eepr_io_read_buffer);
- set_hw_io_write_buffer (me, m68hc11eepr_io_write_buffer);
- set_hw_ports (me, m68hc11eepr_ports);
- set_hw_port_event (me, m68hc11eepr_port_event);
-#ifdef set_hw_ioctl
- set_hw_ioctl (me, m68hc11eepr_ioctl);
-#else
- me->to_ioctl = m68hc11eepr_ioctl;
-#endif
-
- attach_m68hc11eepr_regs (me, controller);
-}
-
-
-
-static io_reg_desc pprog_desc[] = {
- { M6811_BYTE, "BYTE ", "Byte Program Mode" },
- { M6811_ROW, "ROW ", "Row Program Mode" },
- { M6811_ERASE, "ERASE ", "Erase Mode" },
- { M6811_EELAT, "EELAT ", "EEProm Latch Control" },
- { M6811_EEPGM, "EEPGM ", "EEProm Programming Voltable Enable" },
- { 0, 0, 0 }
-};
-extern io_reg_desc config_desc[];
-
-
-/* Describe the state of the EEPROM device. */
-static void
-m68hc11eepr_info (struct hw *me)
-{
- SIM_DESC sd;
- uint16 base = 0;
- sim_cpu *cpu;
- struct m68hc11eepr *controller;
- uint8 val;
-
- sd = hw_system (me);
- cpu = STATE_CPU (sd, 0);
- controller = hw_data (me);
- base = cpu_get_io_base (cpu);
-
- sim_io_printf (sd, "M68HC11 EEprom:\n");
-
- val = cpu->ios[M6811_PPROG];
- print_io_byte (sd, "PPROG ", pprog_desc, val, base + M6811_PPROG);
- sim_io_printf (sd, "\n");
-
- val = cpu->ios[M6811_CONFIG];
- print_io_byte (sd, "CONFIG ", config_desc, val, base + M6811_CONFIG);
- sim_io_printf (sd, "\n");
-
- val = controller->eeprom[controller->size - 1];
- print_io_byte (sd, "(*NEXT*) ", config_desc, val, base + M6811_CONFIG);
- sim_io_printf (sd, "\n");
-
- /* Describe internal state of EEPROM. */
- if (controller->eeprom_wmode)
- {
- if (controller->eeprom_waddr == controller->size - 1)
- sim_io_printf (sd, " Programming CONFIG register ");
- else
- sim_io_printf (sd, " Programming: 0x%04x ",
- controller->eeprom_waddr);
-
- sim_io_printf (sd, "with 0x%02x\n",
- controller->eeprom_wbyte);
- }
-
- sim_io_printf (sd, " EEProm file: %s\n",
- controller->file_name);
-}
-
-static int
-m68hc11eepr_ioctl (struct hw *me,
- hw_ioctl_request request,
- va_list ap)
-{
- m68hc11eepr_info (me);
- return 0;
-}
-
-/* generic read/write */
-
-static unsigned
-m68hc11eepr_io_read_buffer (struct hw *me,
- void *dest,
- int space,
- unsigned_word base,
- unsigned nr_bytes)
-{
- SIM_DESC sd;
- struct m68hc11eepr *controller;
- sim_cpu *cpu;
-
- HW_TRACE ((me, "read 0x%08lx %d", (long) base, (int) nr_bytes));
-
- sd = hw_system (me);
- controller = hw_data (me);
- cpu = STATE_CPU (sd, 0);
-
- if (space == io_map)
- {
- unsigned cnt = 0;
-
- while (nr_bytes != 0)
- {
- switch (base)
- {
- case M6811_PPROG:
- case M6811_CONFIG:
- *((uint8*) dest) = cpu->ios[base];
- break;
-
- default:
- hw_abort (me, "reading wrong register 0x%04x", base);
- }
- dest = (uint8*) (dest) + 1;
- base++;
- nr_bytes--;
- cnt++;
- }
- return cnt;
- }
-
- /* In theory, we can't read the EEPROM when it's being programmed. */
- if ((cpu->ios[M6811_PPROG] & M6811_EELAT) != 0
- && cpu_is_running (cpu))
- {
- sim_memory_error (cpu, SIM_SIGBUS, base,
- "EEprom not configured for reading");
- }
-
- base = base - controller->base_address;
- memcpy (dest, &controller->eeprom[base], nr_bytes);
- return nr_bytes;
-}
-
-
-static unsigned
-m68hc11eepr_io_write_buffer (struct hw *me,
- const void *source,
- int space,
- unsigned_word base,
- unsigned nr_bytes)
-{
- SIM_DESC sd;
- struct m68hc11eepr *controller;
- sim_cpu *cpu;
- uint8 val;
-
- HW_TRACE ((me, "write 0x%08lx %d", (long) base, (int) nr_bytes));
-
- sd = hw_system (me);
- controller = hw_data (me);
- cpu = STATE_CPU (sd, 0);
-
- /* Programming several bytes at a time is not possible. */
- if (space != io_map && nr_bytes != 1)
- {
- sim_memory_error (cpu, SIM_SIGBUS, base,
- "EEprom write error (only 1 byte can be programmed)");
- return 0;
- }
-
- if (nr_bytes != 1)
- hw_abort (me, "Cannot write more than 1 byte to EEPROM device at a time");
-
- val = *((const uint8*) source);
-
- /* Write to the EEPROM control register. */
- if (space == io_map && base == M6811_PPROG)
- {
- uint8 wrong_bits;
- uint16 addr;
-
- addr = base + cpu_get_io_base (cpu);
-
- /* Setting EELAT and EEPGM at the same time is an error.
- Clearing them both is ok. */
- wrong_bits = (cpu->ios[M6811_PPROG] ^ val) & val;
- wrong_bits &= (M6811_EELAT | M6811_EEPGM);
-
- if (wrong_bits == (M6811_EEPGM|M6811_EELAT))
- {
- sim_memory_error (cpu, SIM_SIGBUS, addr,
- "Wrong eeprom programing value");
- return 0;
- }
-
- if ((val & M6811_EELAT) == 0)
- {
- val = 0;
- }
- if ((val & M6811_EEPGM) && !(cpu->ios[M6811_PPROG] & M6811_EELAT))
- {
- sim_memory_error (cpu, SIM_SIGBUS, addr,
- "EEProm high voltage applied after EELAT");
- }
- if ((val & M6811_EEPGM) && controller->eeprom_wmode == 0)
- {
- sim_memory_error (cpu, SIM_SIGSEGV, addr,
- "EEProm high voltage applied without address");
- }
- if (val & M6811_EEPGM)
- {
- controller->eeprom_wcycle = cpu_current_cycle (cpu);
- }
- else if (cpu->ios[M6811_PPROG] & M6811_PPROG)
- {
- int i;
- unsigned long t = cpu_current_cycle (cpu);
-
- t -= controller->eeprom_wcycle;
- if (t < controller->eeprom_min_cycles)
- {
- sim_memory_error (cpu, SIM_SIGILL, addr,
- "EEprom programmed only for %lu cycles",
- t);
- }
-
- /* Program the byte by clearing some bits. */
- if (!(cpu->ios[M6811_PPROG] & M6811_ERASE))
- {
- controller->eeprom[controller->eeprom_waddr]
- &= controller->eeprom_wbyte;
- }
-
- /* Erase a byte, row or the complete eeprom. Erased value is 0xFF.
- Ignore row or complete eeprom erase when we are programming the
- CONFIG register (last EEPROM byte). */
- else if ((cpu->ios[M6811_PPROG] & M6811_BYTE)
- || controller->eeprom_waddr == controller->size - 1)
- {
- controller->eeprom[controller->eeprom_waddr] = 0xff;
- }
- else if (cpu->ios[M6811_BYTE] & M6811_ROW)
- {
- size_t max_size;
-
- /* Size of EEPROM (-1 because the last byte is the
- CONFIG register. */
- max_size = controller->size;
- controller->eeprom_waddr &= 0xFFF0;
- for (i = 0; i < 16
- && controller->eeprom_waddr < max_size; i++)
- {
- controller->eeprom[controller->eeprom_waddr] = 0xff;
- controller->eeprom_waddr ++;
- }
- }
- else
- {
- size_t max_size;
-
- max_size = controller->size;
- for (i = 0; i < max_size; i++)
- {
- controller->eeprom[i] = 0xff;
- }
- }
-
- /* Save the eeprom in a file. We have to save after each
- change because the simulator can be stopped or crash... */
- if (m6811eepr_memory_rw (controller, O_WRONLY | O_CREAT) != 0)
- {
- sim_memory_error (cpu, SIM_SIGABRT, addr,
- "EEPROM programing failed: errno=%d", errno);
- }
- controller->eeprom_wmode = 0;
- }
- cpu->ios[M6811_PPROG] = val;
- return 1;
- }
-
- /* The CONFIG IO register is mapped at end of EEPROM.
- It's not visible. */
- if (space == io_map && base == M6811_CONFIG)
- {
- base = controller->size - 1;
- }
- else
- {
- base = base - controller->base_address;
- }
-
- /* Writing the memory is allowed for the Debugger or simulator
- (cpu not running). */
- if (cpu_is_running (cpu))
- {
- if ((cpu->ios[M6811_PPROG] & M6811_EELAT) == 0)
- {
- sim_memory_error (cpu, SIM_SIGSEGV, base,
- "EEprom not configured for writing");
- return 0;
- }
- if (controller->eeprom_wmode != 0)
- {
- sim_memory_error (cpu, SIM_SIGSEGV, base,
- "EEprom write error");
- return 0;
- }
- controller->eeprom_wmode = 1;
- controller->eeprom_waddr = base;
- controller->eeprom_wbyte = val;
- }
- else
- {
- controller->eeprom[base] = val;
- m6811eepr_memory_rw (controller, O_WRONLY);
- }
-
- return 1;
-}
-
-const struct hw_descriptor dv_m68hc11eepr_descriptor[] = {
- { "m68hc11eepr", m68hc11eepr_finish },
- { "m68hc12eepr", m68hc11eepr_finish },
- { NULL },
-};
-
diff --git a/sim/m68hc11/dv-m68hc11sio.c b/sim/m68hc11/dv-m68hc11sio.c
deleted file mode 100644
index ec7a46de506..00000000000
--- a/sim/m68hc11/dv-m68hc11sio.c
+++ /dev/null
@@ -1,661 +0,0 @@
-/* dv-m68hc11sio.c -- Simulation of the 68HC11 serial device.
- Copyright (C) 1999, 2000, 2001 Free Software Foundation, Inc.
- Written by Stephane Carrez (stcarrez@worldnet.fr)
- (From a driver model Contributed by Cygnus Solutions.)
-
- This file is part of the program GDB, the GNU debugger.
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-#include "sim-main.h"
-#include "hw-main.h"
-#include "dv-sockser.h"
-#include "sim-assert.h"
-
-
-/* DEVICE
-
- m68hc11sio - m68hc11 serial I/O
-
-
- DESCRIPTION
-
- Implements the m68hc11 serial I/O controller described in the m68hc11
- user guide. The serial I/O controller is directly connected to the CPU
- interrupt. The simulator implements:
-
- - baud rate emulation
- - 8-bits transfers
-
- PROPERTIES
-
- backend {tcp | stdio}
-
- Use dv-sockser TCP-port backend or stdio for backend. Default: stdio.
-
-
- PORTS
-
- reset (input)
-
- Reset port. This port is only used to simulate a reset of the serial
- I/O controller. It should be connected to the RESET output of the cpu.
-
- */
-
-
-
-/* port ID's */
-
-enum
-{
- RESET_PORT
-};
-
-
-static const struct hw_port_descriptor m68hc11sio_ports[] =
-{
- { "reset", RESET_PORT, 0, input_port, },
- { NULL, },
-};
-
-
-/* Serial Controller information. */
-struct m68hc11sio
-{
- enum {sio_tcp, sio_stdio} backend; /* backend */
-
- /* Number of cpu cycles to send a bit on the wire. */
- unsigned long baud_cycle;
-
- /* Length in bits of characters sent, this includes the
- start/stop and parity bits. Together with baud_cycle, this
- is used to find the number of cpu cycles to send/receive a data. */
- unsigned int data_length;
-
- /* Information about next character to be transmited. */
- unsigned char tx_has_char;
- unsigned char tx_char;
-
- unsigned char rx_char;
- unsigned char rx_clear_scsr;
-
- /* Periodic I/O polling. */
- struct hw_event* tx_poll_event;
- struct hw_event* rx_poll_event;
-};
-
-
-
-/* Finish off the partially created hw device. Attach our local
- callbacks. Wire up our port names etc. */
-
-static hw_io_read_buffer_method m68hc11sio_io_read_buffer;
-static hw_io_write_buffer_method m68hc11sio_io_write_buffer;
-static hw_port_event_method m68hc11sio_port_event;
-static hw_ioctl_method m68hc11sio_ioctl;
-
-#define M6811_SCI_FIRST_REG (M6811_BAUD)
-#define M6811_SCI_LAST_REG (M6811_SCDR)
-
-
-static void
-attach_m68hc11sio_regs (struct hw *me,
- struct m68hc11sio *controller)
-{
- hw_attach_address (hw_parent (me), M6811_IO_LEVEL, io_map,
- M6811_SCI_FIRST_REG,
- M6811_SCI_LAST_REG - M6811_SCI_FIRST_REG + 1,
- me);
-
- if (hw_find_property(me, "backend") != NULL)
- {
- const char *value = hw_find_string_property(me, "backend");
- if(! strcmp(value, "tcp"))
- controller->backend = sio_tcp;
- else if(! strcmp(value, "stdio"))
- controller->backend = sio_stdio;
- else
- hw_abort (me, "illegal value for backend parameter `%s':"
- "use tcp or stdio", value);
- }
-}
-
-
-static void
-m68hc11sio_finish (struct hw *me)
-{
- struct m68hc11sio *controller;
-
- controller = HW_ZALLOC (me, struct m68hc11sio);
- set_hw_data (me, controller);
- set_hw_io_read_buffer (me, m68hc11sio_io_read_buffer);
- set_hw_io_write_buffer (me, m68hc11sio_io_write_buffer);
- set_hw_ports (me, m68hc11sio_ports);
- set_hw_port_event (me, m68hc11sio_port_event);
-#ifdef set_hw_ioctl
- set_hw_ioctl (me, m68hc11sio_ioctl);
-#else
- me->to_ioctl = m68hc11sio_ioctl;
-#endif
-
- /* Preset defaults. */
- controller->backend = sio_stdio;
-
- /* Attach ourself to our parent bus. */
- attach_m68hc11sio_regs (me, controller);
-
- /* Initialize to reset state. */
- controller->tx_poll_event = NULL;
- controller->rx_poll_event = NULL;
- controller->tx_char = 0;
- controller->tx_has_char = 0;
- controller->rx_clear_scsr = 0;
- controller->rx_char = 0;
-}
-
-
-
-/* An event arrives on an interrupt port. */
-
-static void
-m68hc11sio_port_event (struct hw *me,
- int my_port,
- struct hw *source,
- int source_port,
- int level)
-{
- SIM_DESC sd;
- struct m68hc11sio *controller;
- sim_cpu *cpu;
- unsigned8 val;
-
- controller = hw_data (me);
- sd = hw_system (me);
- cpu = STATE_CPU (sd, 0);
- switch (my_port)
- {
- case RESET_PORT:
- {
- HW_TRACE ((me, "SCI reset"));
-
- /* Reset the state of SCI registers. */
- val = 0;
- m68hc11sio_io_write_buffer (me, &val, io_map,
- (unsigned_word) M6811_BAUD, 1);
- m68hc11sio_io_write_buffer (me, &val, io_map,
- (unsigned_word) M6811_SCCR1, 1);
- m68hc11sio_io_write_buffer (me, &val, io_map,
- (unsigned_word) M6811_SCCR2, 1);
-
- cpu->ios[M6811_SCSR] = M6811_TC | M6811_TDRE;
- controller->rx_char = 0;
- controller->tx_char = 0;
- controller->tx_has_char = 0;
- controller->rx_clear_scsr = 0;
- if (controller->rx_poll_event)
- {
- hw_event_queue_deschedule (me, controller->rx_poll_event);
- controller->rx_poll_event = 0;
- }
- if (controller->tx_poll_event)
- {
- hw_event_queue_deschedule (me, controller->tx_poll_event);
- controller->tx_poll_event = 0;
- }
-
- /* In bootstrap mode, initialize the SCI to 1200 bauds to
- simulate some initial setup by the internal rom. */
- if (((cpu->ios[M6811_HPRIO]) & (M6811_SMOD | M6811_MDA)) == M6811_SMOD)
- {
- unsigned char val = 0x33;
-
- m68hc11sio_io_write_buffer (me, &val, io_map,
- (unsigned_word) M6811_BAUD, 1);
- val = 0x12;
- m68hc11sio_io_write_buffer (me, &val, io_map,
- (unsigned_word) M6811_SCCR2, 1);
- }
- break;
- }
-
- default:
- hw_abort (me, "Event on unknown port %d", my_port);
- break;
- }
-}
-
-
-void
-m68hc11sio_rx_poll (struct hw *me, void *data)
-{
- SIM_DESC sd;
- struct m68hc11sio *controller;
- sim_cpu *cpu;
- char cc;
- int cnt;
- int check_interrupt = 0;
-
- controller = hw_data (me);
- sd = hw_system (me);
- cpu = STATE_CPU (sd, 0);
- switch (controller->backend)
- {
- case sio_tcp:
- cnt = dv_sockser_read (sd);
- if (cnt != -1)
- {
- cc = (char) cnt;
- cnt = 1;
- }
- break;
-
- case sio_stdio:
- cnt = sim_io_poll_read (sd, 0 /* stdin */, &cc, 1);
- break;
-
- default:
- cnt = 0;
- break;
- }
-
- if (cnt == 1)
- {
- /* Raise the overrun flag if the previous character was not read. */
- if (cpu->ios[M6811_SCSR] & M6811_RDRF)
- cpu->ios[M6811_SCSR] |= M6811_OR;
-
- cpu->ios[M6811_SCSR] |= M6811_RDRF;
- controller->rx_char = cc;
- controller->rx_clear_scsr = 0;
- check_interrupt = 1;
- }
- else
- {
- /* handle idle line detect here. */
- ;
- }
-
- if (controller->rx_poll_event)
- {
- hw_event_queue_deschedule (me, controller->rx_poll_event);
- controller->rx_poll_event = 0;
- }
-
- if (cpu->ios[M6811_SCCR2] & M6811_RE)
- {
- unsigned long clock_cycle;
-
- /* Compute CPU clock cycles to wait for the next character. */
- clock_cycle = controller->data_length * controller->baud_cycle;
-
- controller->rx_poll_event = hw_event_queue_schedule (me, clock_cycle,
- m68hc11sio_rx_poll,
- NULL);
- }
-
- if (check_interrupt)
- interrupts_update_pending (&cpu->cpu_interrupts);
-}
-
-
-void
-m68hc11sio_tx_poll (struct hw *me, void *data)
-{
- SIM_DESC sd;
- struct m68hc11sio *controller;
- sim_cpu *cpu;
-
- controller = hw_data (me);
- sd = hw_system (me);
- cpu = STATE_CPU (sd, 0);
-
- cpu->ios[M6811_SCSR] |= M6811_TDRE;
- cpu->ios[M6811_SCSR] |= M6811_TC;
-
- /* Transmitter is enabled and we have something to send. */
- if ((cpu->ios[M6811_SCCR2] & M6811_TE) && controller->tx_has_char)
- {
- cpu->ios[M6811_SCSR] &= ~M6811_TDRE;
- cpu->ios[M6811_SCSR] &= ~M6811_TC;
- controller->tx_has_char = 0;
- switch (controller->backend)
- {
- case sio_tcp:
- dv_sockser_write (sd, controller->tx_char);
- break;
-
- case sio_stdio:
- sim_io_write_stdout (sd, &controller->tx_char, 1);
- sim_io_flush_stdout (sd);
- break;
-
- default:
- break;
- }
- }
-
- if (controller->tx_poll_event)
- {
- hw_event_queue_deschedule (me, controller->tx_poll_event);
- controller->tx_poll_event = 0;
- }
-
- if ((cpu->ios[M6811_SCCR2] & M6811_TE)
- && ((cpu->ios[M6811_SCSR] & M6811_TC) == 0))
- {
- unsigned long clock_cycle;
-
- /* Compute CPU clock cycles to wait for the next character. */
- clock_cycle = controller->data_length * controller->baud_cycle;
-
- controller->tx_poll_event = hw_event_queue_schedule (me, clock_cycle,
- m68hc11sio_tx_poll,
- NULL);
- }
-
- interrupts_update_pending (&cpu->cpu_interrupts);
-}
-
-/* Descriptions of the SIO I/O ports. These descriptions are only used to
- give information of the SIO device under GDB. */
-io_reg_desc sccr2_desc[] = {
- { M6811_TIE, "TIE ", "Transmit Interrupt Enable" },
- { M6811_TCIE, "TCIE ", "Transmit Complete Interrupt Enable" },
- { M6811_RIE, "RIE ", "Receive Interrupt Enable" },
- { M6811_ILIE, "ILIE ", "Idle Line Interrupt Enable" },
- { M6811_TE, "TE ", "Transmit Enable" },
- { M6811_RE, "RE ", "Receive Enable" },
- { M6811_RWU, "RWU ", "Receiver Wake Up" },
- { M6811_SBK, "SBRK ", "Send Break" },
- { 0, 0, 0 }
-};
-
-io_reg_desc sccr1_desc[] = {
- { M6811_R8, "R8 ", "Receive Data bit 8" },
- { M6811_T8, "T8 ", "Transmit Data bit 8" },
- { M6811_M, "M ", "SCI Character length (0=8-bits, 1=9-bits)" },
- { M6811_WAKE, "WAKE ", "Wake up method select (0=idle, 1=addr mark" },
- { 0, 0, 0 }
-};
-
-io_reg_desc scsr_desc[] = {
- { M6811_TDRE, "TDRE ", "Transmit Data Register Empty" },
- { M6811_TC, "TC ", "Transmit Complete" },
- { M6811_RDRF, "RDRF ", "Receive Data Register Full" },
- { M6811_IDLE, "IDLE ", "Idle Line Detect" },
- { M6811_OR, "OR ", "Overrun Error" },
- { M6811_NF, "NF ", "Noise Flag" },
- { M6811_FE, "FE ", "Framing Error" },
- { 0, 0, 0 }
-};
-
-io_reg_desc baud_desc[] = {
- { M6811_TCLR, "TCLR ", "Clear baud rate (test mode)" },
- { M6811_SCP1, "SCP1 ", "SCI baud rate prescaler select (SCP1)" },
- { M6811_SCP0, "SCP0 ", "SCI baud rate prescaler select (SCP0)" },
- { M6811_RCKB, "RCKB ", "Baur Rate Clock Check (test mode)" },
- { M6811_SCR2, "SCR2 ", "SCI Baud rate select (SCR2)" },
- { M6811_SCR1, "SCR1 ", "SCI Baud rate select (SCR1)" },
- { M6811_SCR0, "SCR0 ", "SCI Baud rate select (SCR0)" },
- { 0, 0, 0 }
-};
-
-static void
-m68hc11sio_info (struct hw *me)
-{
- SIM_DESC sd;
- uint16 base = 0;
- sim_cpu *cpu;
- struct m68hc11sio *controller;
- uint8 val;
- long clock_cycle;
-
- sd = hw_system (me);
- cpu = STATE_CPU (sd, 0);
- controller = hw_data (me);
-
- sim_io_printf (sd, "M68HC11 SIO:\n");
-
- base = cpu_get_io_base (cpu);
-
- val = cpu->ios[M6811_BAUD];
- print_io_byte (sd, "BAUD ", baud_desc, val, base + M6811_BAUD);
- sim_io_printf (sd, " (%ld baud)\n",
- (cpu->cpu_frequency / 4) / controller->baud_cycle);
-
- val = cpu->ios[M6811_SCCR1];
- print_io_byte (sd, "SCCR1", sccr1_desc, val, base + M6811_SCCR1);
- sim_io_printf (sd, " (%d bits) (%dN1)\n",
- controller->data_length, controller->data_length - 2);
-
- val = cpu->ios[M6811_SCCR2];
- print_io_byte (sd, "SCCR2", sccr2_desc, val, base + M6811_SCCR2);
- sim_io_printf (sd, "\n");
-
- val = cpu->ios[M6811_SCSR];
- print_io_byte (sd, "SCSR ", scsr_desc, val, base + M6811_SCSR);
- sim_io_printf (sd, "\n");
-
- clock_cycle = controller->data_length * controller->baud_cycle;
-
- if (controller->tx_poll_event)
- {
- signed64 t;
- int n;
-
- t = hw_event_remain_time (me, controller->tx_poll_event);
- n = (clock_cycle - t) / controller->baud_cycle;
- n = controller->data_length - n;
- sim_io_printf (sd, " Transmit finished in %s (%d bit%s)\n",
- cycle_to_string (cpu, t), n, (n > 1 ? "s" : ""));
- }
- if (controller->rx_poll_event)
- {
- signed64 t;
-
- t = hw_event_remain_time (me, controller->rx_poll_event);
- sim_io_printf (sd, " Receive finished in %s\n",
- cycle_to_string (cpu, t));
- }
-
-}
-
-static int
-m68hc11sio_ioctl (struct hw *me,
- hw_ioctl_request request,
- va_list ap)
-{
- m68hc11sio_info (me);
- return 0;
-}
-
-/* generic read/write */
-
-static unsigned
-m68hc11sio_io_read_buffer (struct hw *me,
- void *dest,
- int space,
- unsigned_word base,
- unsigned nr_bytes)
-{
- SIM_DESC sd;
- struct m68hc11sio *controller;
- sim_cpu *cpu;
- unsigned8 val;
-
- HW_TRACE ((me, "read 0x%08lx %d", (long) base, (int) nr_bytes));
-
- sd = hw_system (me);
- cpu = STATE_CPU (sd, 0);
- controller = hw_data (me);
-
- switch (base)
- {
- case M6811_SCSR:
- controller->rx_clear_scsr = cpu->ios[M6811_SCSR]
- & (M6811_RDRF | M6811_IDLE | M6811_OR | M6811_NF | M6811_FE);
-
- case M6811_BAUD:
- case M6811_SCCR1:
- case M6811_SCCR2:
- val = cpu->ios[base];
- break;
-
- case M6811_SCDR:
- if (controller->rx_clear_scsr)
- {
- cpu->ios[M6811_SCSR] &= ~controller->rx_clear_scsr;
- }
- val = controller->rx_char;
- break;
-
- default:
- return 0;
- }
- *((unsigned8*) dest) = val;
- return 1;
-}
-
-static unsigned
-m68hc11sio_io_write_buffer (struct hw *me,
- const void *source,
- int space,
- unsigned_word base,
- unsigned nr_bytes)
-{
- SIM_DESC sd;
- struct m68hc11sio *controller;
- sim_cpu *cpu;
- unsigned8 val;
-
- HW_TRACE ((me, "write 0x%08lx %d", (long) base, (int) nr_bytes));
-
- sd = hw_system (me);
- cpu = STATE_CPU (sd, 0);
- controller = hw_data (me);
-
- val = *((const unsigned8*) source);
- switch (base)
- {
- case M6811_BAUD:
- {
- long divisor;
- long baud;
-
- cpu->ios[M6811_BAUD] = val;
- switch (val & (M6811_SCP1|M6811_SCP0))
- {
- case M6811_BAUD_DIV_1:
- divisor = 1 * 16;
- break;
-
- case M6811_BAUD_DIV_3:
- divisor = 3 * 16;
- break;
-
- case M6811_BAUD_DIV_4:
- divisor = 4 * 16;
- break;
-
- default:
- case M6811_BAUD_DIV_13:
- divisor = 13 * 16;
- break;
- }
- val &= (M6811_SCR2|M6811_SCR1|M6811_SCR0);
- divisor *= (1 << val);
-
- baud = (cpu->cpu_frequency / 4) / divisor;
-
- HW_TRACE ((me, "divide rate %ld, baud rate %ld",
- divisor, baud));
-
- controller->baud_cycle = divisor;
- }
- break;
-
- case M6811_SCCR1:
- {
- if (val & M6811_M)
- controller->data_length = 11;
- else
- controller->data_length = 10;
-
- cpu->ios[M6811_SCCR1] = val;
- }
- break;
-
- case M6811_SCCR2:
- if ((val & M6811_RE) == 0)
- {
- val &= ~(M6811_RDRF|M6811_IDLE|M6811_OR|M6811_NF|M6811_NF);
- val |= (cpu->ios[M6811_SCCR2]
- & (M6811_RDRF|M6811_IDLE|M6811_OR|M6811_NF|M6811_NF));
- cpu->ios[M6811_SCCR2] = val;
- break;
- }
-
- /* Activate reception. */
- if (controller->rx_poll_event == 0)
- {
- long clock_cycle;
-
- /* Compute CPU clock cycles to wait for the next character. */
- clock_cycle = controller->data_length * controller->baud_cycle;
-
- controller->rx_poll_event = hw_event_queue_schedule (me, clock_cycle,
- m68hc11sio_rx_poll,
- NULL);
- }
- cpu->ios[M6811_SCCR2] = val;
- interrupts_update_pending (&cpu->cpu_interrupts);
- break;
-
- /* No effect. */
- case M6811_SCSR:
- return 1;
-
- case M6811_SCDR:
- if (!(cpu->ios[M6811_SCSR] & M6811_TDRE))
- {
- return 0;
- }
-
- controller->tx_char = val;
- controller->tx_has_char = 1;
- if ((cpu->ios[M6811_SCCR2] & M6811_TE)
- && controller->tx_poll_event == 0)
- {
- m68hc11sio_tx_poll (me, NULL);
- }
- return 1;
-
- default:
- return 0;
- }
- return nr_bytes;
-}
-
-
-const struct hw_descriptor dv_m68hc11sio_descriptor[] = {
- { "m68hc11sio", m68hc11sio_finish },
- { "m68hc12sio", m68hc11sio_finish },
- { NULL },
-};
-
diff --git a/sim/m68hc11/dv-m68hc11spi.c b/sim/m68hc11/dv-m68hc11spi.c
deleted file mode 100644
index d0bdfda9953..00000000000
--- a/sim/m68hc11/dv-m68hc11spi.c
+++ /dev/null
@@ -1,534 +0,0 @@
-/* dv-m68hc11spi.c -- Simulation of the 68HC11 SPI
- Copyright (C) 2000 Free Software Foundation, Inc.
- Written by Stephane Carrez (stcarrez@worldnet.fr)
- (From a driver model Contributed by Cygnus Solutions.)
-
- This file is part of the program GDB, the GNU debugger.
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-#include "sim-main.h"
-#include "hw-main.h"
-#include "dv-sockser.h"
-#include "sim-assert.h"
-
-
-/* DEVICE
-
- m68hc11spi - m68hc11 SPI interface
-
-
- DESCRIPTION
-
- Implements the m68hc11 Synchronous Serial Peripheral Interface
- described in the m68hc11 user guide (Chapter 8 in pink book).
- The SPI I/O controller is directly connected to the CPU
- interrupt. The simulator implements:
-
- - SPI clock emulation
- - Data transfer
- - Write collision detection
-
-
- PROPERTIES
-
- None
-
-
- PORTS
-
- reset (input)
-
- Reset port. This port is only used to simulate a reset of the SPI
- I/O controller. It should be connected to the RESET output of the cpu.
-
- */
-
-
-
-/* port ID's */
-
-enum
-{
- RESET_PORT
-};
-
-
-static const struct hw_port_descriptor m68hc11spi_ports[] =
-{
- { "reset", RESET_PORT, 0, input_port, },
- { NULL, },
-};
-
-
-/* SPI */
-struct m68hc11spi
-{
- /* Information about next character to be transmited. */
- unsigned char tx_char;
- int tx_bit;
- unsigned char mode;
-
- unsigned char rx_char;
- unsigned char rx_clear_scsr;
- unsigned char clk_pin;
-
- /* SPI clock rate (twice the real clock). */
- unsigned int clock;
-
- /* Periodic SPI event. */
- struct hw_event* spi_event;
-};
-
-
-
-/* Finish off the partially created hw device. Attach our local
- callbacks. Wire up our port names etc */
-
-static hw_io_read_buffer_method m68hc11spi_io_read_buffer;
-static hw_io_write_buffer_method m68hc11spi_io_write_buffer;
-static hw_port_event_method m68hc11spi_port_event;
-static hw_ioctl_method m68hc11spi_ioctl;
-
-#define M6811_SPI_FIRST_REG (M6811_SPCR)
-#define M6811_SPI_LAST_REG (M6811_SPDR)
-
-
-static void
-attach_m68hc11spi_regs (struct hw *me,
- struct m68hc11spi *controller)
-{
- hw_attach_address (hw_parent (me), M6811_IO_LEVEL, io_map,
- M6811_SPI_FIRST_REG,
- M6811_SPI_LAST_REG - M6811_SPI_FIRST_REG + 1,
- me);
-}
-
-static void
-m68hc11spi_finish (struct hw *me)
-{
- struct m68hc11spi *controller;
-
- controller = HW_ZALLOC (me, struct m68hc11spi);
- set_hw_data (me, controller);
- set_hw_io_read_buffer (me, m68hc11spi_io_read_buffer);
- set_hw_io_write_buffer (me, m68hc11spi_io_write_buffer);
- set_hw_ports (me, m68hc11spi_ports);
- set_hw_port_event (me, m68hc11spi_port_event);
-#ifdef set_hw_ioctl
- set_hw_ioctl (me, m68hc11spi_ioctl);
-#else
- me->to_ioctl = m68hc11spi_ioctl;
-#endif
-
- /* Attach ourself to our parent bus. */
- attach_m68hc11spi_regs (me, controller);
-
- /* Initialize to reset state. */
- controller->spi_event = NULL;
- controller->rx_clear_scsr = 0;
-}
-
-
-
-/* An event arrives on an interrupt port */
-
-static void
-m68hc11spi_port_event (struct hw *me,
- int my_port,
- struct hw *source,
- int source_port,
- int level)
-{
- SIM_DESC sd;
- struct m68hc11spi *controller;
- sim_cpu* cpu;
- unsigned8 val;
-
- controller = hw_data (me);
- sd = hw_system (me);
- cpu = STATE_CPU (sd, 0);
- switch (my_port)
- {
- case RESET_PORT:
- {
- HW_TRACE ((me, "SPI reset"));
-
- /* Reset the state of SPI registers. */
- controller->rx_clear_scsr = 0;
- if (controller->spi_event)
- {
- hw_event_queue_deschedule (me, controller->spi_event);
- controller->spi_event = 0;
- }
-
- val = 0;
- m68hc11spi_io_write_buffer (me, &val, io_map,
- (unsigned_word) M6811_SPCR, 1);
- break;
- }
-
- default:
- hw_abort (me, "Event on unknown port %d", my_port);
- break;
- }
-}
-
-static void
-set_bit_port (struct hw *me, sim_cpu *cpu, int port, int mask, int value)
-{
- /* TODO: Post an event to inform other devices that pin 'port' changes.
- This has only a sense if we provide some device that is logically
- connected to these pin ports (SCLK and MOSI) and that handles
- the SPI protocol. */
- if (value)
- cpu->ios[port] |= mask;
- else
- cpu->ios[port] &= ~mask;
-}
-
-
-/* When a character is sent/received by the SPI, the PD2..PD5 line
- are driven by the following signals:
-
- B7 B6
- -----+---------+--------+---/-+-------
- MOSI | | | | | |
- MISO +---------+--------+---/-+
- ____ ___
- CLK _______/ \____/ \__ CPOL=0, CPHA=0
- _______ ____ __
- \____/ \___/ CPOL=1, CPHA=0
- ____ ____ __
- __/ \____/ \___/ CPOL=0, CPHA=1
- __ ____ ___
- \____/ \____/ \__ CPOL=1, CPHA=1
-
- SS ___ ____
- \__________________________//___/
-
- MISO = PD2
- MOSI = PD3
- SCK = PD4
- SS = PD5
-
-*/
-
-#define SPI_START_BYTE 0
-#define SPI_START_BIT 1
-#define SPI_MIDDLE_BIT 2
-
-void
-m68hc11spi_clock (struct hw *me, void *data)
-{
- SIM_DESC sd;
- struct m68hc11spi* controller;
- sim_cpu *cpu;
- int check_interrupt = 0;
-
- controller = hw_data (me);
- sd = hw_system (me);
- cpu = STATE_CPU (sd, 0);
-
- /* Cleanup current event. */
- if (controller->spi_event)
- {
- hw_event_queue_deschedule (me, controller->spi_event);
- controller->spi_event = 0;
- }
-
- /* Change a bit of data at each two SPI event. */
- if (controller->mode == SPI_START_BIT)
- {
- /* Reflect the bit value on bit 2 of port D. */
- set_bit_port (me, cpu, M6811_PORTD, (1 << 2),
- (controller->tx_char & (1 << controller->tx_bit)));
- controller->tx_bit--;
- controller->mode = SPI_MIDDLE_BIT;
- }
- else if (controller->mode == SPI_MIDDLE_BIT)
- {
- controller->mode = SPI_START_BIT;
- }
-
- if (controller->mode == SPI_START_BYTE)
- {
- /* Start a new SPI transfer. */
-
- /* TBD: clear SS output. */
- controller->mode = SPI_START_BIT;
- controller->tx_bit = 7;
- set_bit_port (me, cpu, M6811_PORTD, (1 << 4), ~controller->clk_pin);
- }
- else
- {
- /* Change the SPI clock at each event on bit 4 of port D. */
- controller->clk_pin = ~controller->clk_pin;
- set_bit_port (me, cpu, M6811_PORTD, (1 << 4), controller->clk_pin);
- }
-
- /* Transmit is now complete for this byte. */
- if (controller->mode == SPI_START_BIT && controller->tx_bit < 0)
- {
- controller->rx_clear_scsr = 0;
- cpu->ios[M6811_SPSR] |= M6811_SPIF;
- if (cpu->ios[M6811_SPCR] & M6811_SPIE)
- check_interrupt = 1;
- }
- else
- {
- controller->spi_event = hw_event_queue_schedule (me, controller->clock,
- m68hc11spi_clock,
- NULL);
- }
-
- if (check_interrupt)
- interrupts_update_pending (&cpu->cpu_interrupts);
-}
-
-/* Flags of the SPCR register. */
-io_reg_desc spcr_desc[] = {
- { M6811_SPIE, "SPIE ", "Serial Peripheral Interrupt Enable" },
- { M6811_SPE, "SPE ", "Serial Peripheral System Enable" },
- { M6811_DWOM, "DWOM ", "Port D Wire-OR mode option" },
- { M6811_MSTR, "MSTR ", "Master Mode Select" },
- { M6811_CPOL, "CPOL ", "Clock Polarity" },
- { M6811_CPHA, "CPHA ", "Clock Phase" },
- { M6811_SPR1, "SPR1 ", "SPI Clock Rate Select" },
- { M6811_SPR0, "SPR0 ", "SPI Clock Rate Select" },
- { 0, 0, 0 }
-};
-
-
-/* Flags of the SPSR register. */
-io_reg_desc spsr_desc[] = {
- { M6811_SPIF, "SPIF ", "SPI Transfer Complete flag" },
- { M6811_WCOL, "WCOL ", "Write Collision" },
- { M6811_MODF, "MODF ", "Mode Fault" },
- { 0, 0, 0 }
-};
-
-static void
-m68hc11spi_info (struct hw *me)
-{
- SIM_DESC sd;
- uint16 base = 0;
- sim_cpu *cpu;
- struct m68hc11spi *controller;
- uint8 val;
-
- sd = hw_system (me);
- cpu = STATE_CPU (sd, 0);
- controller = hw_data (me);
-
- sim_io_printf (sd, "M68HC11 SPI:\n");
-
- base = cpu_get_io_base (cpu);
-
- val = cpu->ios[M6811_SPCR];
- print_io_byte (sd, "SPCR", spcr_desc, val, base + M6811_SPCR);
- sim_io_printf (sd, "\n");
-
- val = cpu->ios[M6811_SPSR];
- print_io_byte (sd, "SPSR", spsr_desc, val, base + M6811_SPSR);
- sim_io_printf (sd, "\n");
-
- if (controller->spi_event)
- {
- signed64 t;
-
- sim_io_printf (sd, " SPI has %d bits to send\n",
- controller->tx_bit + 1);
- t = hw_event_remain_time (me, controller->spi_event);
- sim_io_printf (sd, " SPI current bit-cycle finished in %s\n",
- cycle_to_string (cpu, t));
-
- t += (controller->tx_bit + 1) * 2 * controller->clock;
- sim_io_printf (sd, " SPI operation finished in %s\n",
- cycle_to_string (cpu, t));
- }
-}
-
-static int
-m68hc11spi_ioctl (struct hw *me,
- hw_ioctl_request request,
- va_list ap)
-{
- m68hc11spi_info (me);
- return 0;
-}
-
-/* generic read/write */
-
-static unsigned
-m68hc11spi_io_read_buffer (struct hw *me,
- void *dest,
- int space,
- unsigned_word base,
- unsigned nr_bytes)
-{
- SIM_DESC sd;
- struct m68hc11spi *controller;
- sim_cpu *cpu;
- unsigned8 val;
-
- HW_TRACE ((me, "read 0x%08lx %d", (long) base, (int) nr_bytes));
-
- sd = hw_system (me);
- cpu = STATE_CPU (sd, 0);
- controller = hw_data (me);
-
- switch (base)
- {
- case M6811_SPSR:
- controller->rx_clear_scsr = cpu->ios[M6811_SCSR]
- & (M6811_SPIF | M6811_WCOL | M6811_MODF);
-
- case M6811_SPCR:
- val = cpu->ios[base];
- break;
-
- case M6811_SPDR:
- if (controller->rx_clear_scsr)
- {
- cpu->ios[M6811_SPSR] &= ~controller->rx_clear_scsr;
- controller->rx_clear_scsr = 0;
- interrupts_update_pending (&cpu->cpu_interrupts);
- }
- val = controller->rx_char;
- break;
-
- default:
- return 0;
- }
- *((unsigned8*) dest) = val;
- return 1;
-}
-
-static unsigned
-m68hc11spi_io_write_buffer (struct hw *me,
- const void *source,
- int space,
- unsigned_word base,
- unsigned nr_bytes)
-{
- SIM_DESC sd;
- struct m68hc11spi *controller;
- sim_cpu *cpu;
- unsigned8 val;
-
- HW_TRACE ((me, "write 0x%08lx %d", (long) base, (int) nr_bytes));
-
- sd = hw_system (me);
- cpu = STATE_CPU (sd, 0);
- controller = hw_data (me);
-
- val = *((const unsigned8*) source);
- switch (base)
- {
- case M6811_SPCR:
- cpu->ios[M6811_SPCR] = val;
-
- /* The SPI clock rate is 2, 4, 16, 32 of the internal CPU clock.
- We have to drive the clock pin and need a 2x faster clock. */
- switch (val & (M6811_SPR1 | M6811_SPR0))
- {
- case 0:
- controller->clock = 1;
- break;
-
- case 1:
- controller->clock = 2;
- break;
-
- case 2:
- controller->clock = 8;
- break;
-
- default:
- controller->clock = 16;
- break;
- }
-
- /* Set the clock pin. */
- if ((val & M6811_CPOL)
- && (controller->spi_event == 0
- || ((val & M6811_CPHA) && controller->mode == 1)))
- controller->clk_pin = 1;
- else
- controller->clk_pin = 0;
-
- set_bit_port (me, cpu, M6811_PORTD, (1 << 4), controller->clk_pin);
- break;
-
- /* Can't write to SPSR. */
- case M6811_SPSR:
- break;
-
- case M6811_SPDR:
- if (!(cpu->ios[M6811_SPCR] & M6811_SPE))
- {
- return 0;
- }
-
- if (controller->rx_clear_scsr)
- {
- cpu->ios[M6811_SPSR] &= ~controller->rx_clear_scsr;
- controller->rx_clear_scsr = 0;
- interrupts_update_pending (&cpu->cpu_interrupts);
- }
-
- /* If transfer is taking place, a write to SPDR
- generates a collision. */
- if (controller->spi_event)
- {
- cpu->ios[M6811_SPSR] |= M6811_WCOL;
- break;
- }
-
- /* Refuse the write if there was no read of SPSR. */
- /* ???? TBD. */
-
- /* Prepare to send a byte. */
- controller->tx_char = val;
- controller->mode = SPI_START_BYTE;
-
- /* Toggle clock pin internal value when CPHA is 0 so that
- it will really change in the middle of a bit. */
- if (!(cpu->ios[M6811_SPCR] & M6811_CPHA))
- controller->clk_pin = ~controller->clk_pin;
-
- cpu->ios[M6811_SPDR] = val;
-
- /* Activate transmission. */
- m68hc11spi_clock (me, NULL);
- break;
-
- default:
- return 0;
- }
- return nr_bytes;
-}
-
-
-const struct hw_descriptor dv_m68hc11spi_descriptor[] = {
- { "m68hc11spi", m68hc11spi_finish },
- { "m68hc12spi", m68hc11spi_finish },
- { NULL },
-};
-
diff --git a/sim/m68hc11/dv-m68hc11tim.c b/sim/m68hc11/dv-m68hc11tim.c
deleted file mode 100644
index 144ae4bf203..00000000000
--- a/sim/m68hc11/dv-m68hc11tim.c
+++ /dev/null
@@ -1,694 +0,0 @@
-/* dv-m68hc11tim.c -- Simulation of the 68HC11 timer devices.
- Copyright (C) 1999, 2000 Free Software Foundation, Inc.
- Written by Stephane Carrez (stcarrez@worldnet.fr)
- (From a driver model Contributed by Cygnus Solutions.)
-
- This file is part of the program GDB, the GNU debugger.
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either vertimn 2 of the License, or
- (at your option) any later vertimn.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-#include "sim-main.h"
-#include "hw-main.h"
-#include "sim-assert.h"
-
-
-/* DEVICE
-
- m68hc11tim - m68hc11 timer devices
-
-
- DESCRIPTION
-
- Implements the m68hc11 timer as described in Chapter 10
- of the pink book.
-
-
- PROPERTIES
-
- none
-
-
- PORTS
-
- reset (input)
-
- Reset the timer device. This port must be connected to
- the cpu-reset output port.
-
- */
-
-
-
-/* port ID's */
-
-enum
-{
- RESET_PORT
-};
-
-
-static const struct hw_port_descriptor m68hc11tim_ports[] =
-{
- { "reset", RESET_PORT, 0, input_port, },
- { NULL, },
-};
-
-
-/* Timer Controller information. */
-struct m68hc11tim
-{
- unsigned long cop_delay;
- unsigned long rti_delay;
- unsigned long ovf_delay;
- signed64 clock_prescaler;
- signed64 tcnt_adjust;
- signed64 cop_prev_interrupt;
- signed64 rti_prev_interrupt;
-
- /* Periodic timers. */
- struct hw_event *rti_timer_event;
- struct hw_event *cop_timer_event;
- struct hw_event *tof_timer_event;
- struct hw_event *cmp_timer_event;
-};
-
-
-
-/* Finish off the partially created hw device. Attach our local
- callbacks. Wire up our port names etc. */
-
-static hw_io_read_buffer_method m68hc11tim_io_read_buffer;
-static hw_io_write_buffer_method m68hc11tim_io_write_buffer;
-static hw_port_event_method m68hc11tim_port_event;
-static hw_ioctl_method m68hc11tim_ioctl;
-
-#define M6811_TIMER_FIRST_REG (M6811_TCTN)
-#define M6811_TIMER_LAST_REG (M6811_PACNT)
-
-
-static void
-attach_m68hc11tim_regs (struct hw *me,
- struct m68hc11tim *controller)
-{
- hw_attach_address (hw_parent (me), M6811_IO_LEVEL, io_map,
- M6811_TIMER_FIRST_REG,
- M6811_TIMER_LAST_REG - M6811_TIMER_FIRST_REG + 1,
- me);
-}
-
-static void
-m68hc11tim_finish (struct hw *me)
-{
- struct m68hc11tim *controller;
-
- controller = HW_ZALLOC (me, struct m68hc11tim);
- set_hw_data (me, controller);
- set_hw_io_read_buffer (me, m68hc11tim_io_read_buffer);
- set_hw_io_write_buffer (me, m68hc11tim_io_write_buffer);
- set_hw_ports (me, m68hc11tim_ports);
- set_hw_port_event (me, m68hc11tim_port_event);
-#ifdef set_hw_ioctl
- set_hw_ioctl (me, m68hc11tim_ioctl);
-#else
- me->to_ioctl = m68hc11tim_ioctl;
-#endif
-
- /* Preset defaults. */
- controller->clock_prescaler = 1;
- controller->tcnt_adjust = 0;
-
- /* Attach ourself to our parent bus. */
- attach_m68hc11tim_regs (me, controller);
-}
-
-
-
-/* An event arrives on an interrupt port. */
-
-static void
-m68hc11tim_port_event (struct hw *me,
- int my_port,
- struct hw *source,
- int source_port,
- int level)
-{
- SIM_DESC sd;
- struct m68hc11tim *controller;
- sim_cpu *cpu;
- unsigned8 val;
-
- controller = hw_data (me);
- sd = hw_system (me);
- cpu = STATE_CPU (sd, 0);
- switch (my_port)
- {
- case RESET_PORT:
- {
- HW_TRACE ((me, "Timer reset"));
-
- /* Cancel all timer events. */
- if (controller->rti_timer_event)
- {
- hw_event_queue_deschedule (me, controller->rti_timer_event);
- controller->rti_timer_event = 0;
- controller->rti_prev_interrupt = 0;
- }
- if (controller->cop_timer_event)
- {
- hw_event_queue_deschedule (me, controller->cop_timer_event);
- controller->cop_timer_event = 0;
- controller->cop_prev_interrupt = 0;
- }
- if (controller->tof_timer_event)
- {
- hw_event_queue_deschedule (me, controller->tof_timer_event);
- controller->tof_timer_event = 0;
- }
- if (controller->cmp_timer_event)
- {
- hw_event_queue_deschedule (me, controller->cmp_timer_event);
- controller->cmp_timer_event = 0;
- }
-
- /* Reset the state of Timer registers. This also restarts
- the timer events (overflow and RTI clock). */
- val = 0;
- m68hc11tim_io_write_buffer (me, &val, io_map,
- (unsigned_word) M6811_TMSK2, 1);
- m68hc11tim_io_write_buffer (me, &val, io_map,
- (unsigned_word) M6811_TFLG2, 1);
- m68hc11tim_io_write_buffer (me, &val, io_map,
- (unsigned_word) M6811_PACTL, 1);
- break;
- }
-
- default:
- hw_abort (me, "Event on unknown port %d", my_port);
- break;
- }
-}
-
-enum event_type
-{
- COP_EVENT,
- RTI_EVENT,
- OVERFLOW_EVENT,
- COMPARE_EVENT
-};
-
-void
-m68hc11tim_timer_event (struct hw *me, void *data)
-{
- SIM_DESC sd;
- struct m68hc11tim *controller;
- sim_cpu *cpu;
- enum event_type type;
- unsigned long delay;
- struct hw_event **eventp;
- int check_interrupt = 0;
- unsigned mask;
- unsigned flags;
- unsigned long tcnt_internal;
- unsigned long tcnt;
- int i;
- sim_events *events;
-
- controller = hw_data (me);
- sd = hw_system (me);
- cpu = STATE_CPU (sd, 0);
- type = (enum event_type) ((long) data) & 0x0FF;
- events = STATE_EVENTS (sd);
-
- delay = 0;
- switch (type)
- {
- case COP_EVENT:
- eventp = &controller->cop_timer_event;
- delay = controller->cop_delay;
- delay = controller->cop_prev_interrupt + controller->cop_delay;
- controller->cop_prev_interrupt = delay;
- delay = delay - cpu->cpu_absolute_cycle;
- check_interrupt = 1;
- delay += events->nr_ticks_to_process;
- break;
-
- case RTI_EVENT:
- eventp = &controller->rti_timer_event;
- delay = controller->rti_prev_interrupt + controller->rti_delay;
-
- if (((long) (data) & 0x0100) == 0)
- {
- cpu->ios[M6811_TFLG2] |= M6811_RTIF;
- check_interrupt = 1;
- controller->rti_prev_interrupt = delay;
- delay += controller->rti_delay;
- }
- delay = delay - cpu->cpu_absolute_cycle;
- delay += events->nr_ticks_to_process;
- break;
-
- case OVERFLOW_EVENT:
- /* Compute the 68HC11 internal free running counter.
- There may be 'nr_ticks_to_process' pending cycles that are
- not (yet) taken into account by 'sim_events_time'. */
- tcnt_internal = sim_events_time (sd) - controller->tcnt_adjust;
- tcnt_internal += events->nr_ticks_to_process;
-
- /* We must take into account the prescaler that comes
- before the counter (it's a power of 2). */
- tcnt_internal &= 0x0ffff * controller->clock_prescaler;
-
- /* Compute the time when the overflow will occur. It occurs when
- the counter increments from 0x0ffff to 0x10000 (and thus resets). */
- delay = (0x10000 * controller->clock_prescaler) - tcnt_internal;
-
- /* The 'nr_ticks_to_process' will be subtracted when the event
- is scheduled. */
- delay += events->nr_ticks_to_process;
-
- eventp = &controller->tof_timer_event;
- if (((long) (data) & 0x100) == 0)
- {
- cpu->ios[M6811_TFLG2] |= M6811_TOF;
- check_interrupt = 1;
- }
- break;
-
- case COMPARE_EVENT:
- eventp = &controller->cmp_timer_event;
-
- /* Compute the 68HC11 internal free running counter.
- There may be 'nr_ticks_to_process' pending cycles that are
- not (yet) taken into account by 'sim_events_time'. */
- events = STATE_EVENTS (sd);
- tcnt_internal = sim_events_time (sd) - controller->tcnt_adjust;
- tcnt_internal += events->nr_ticks_to_process;
-
- /* We must take into account the prescaler that comes
- before the counter (it's a power of 2). */
- tcnt_internal &= 0x0ffff * controller->clock_prescaler;
-
- /* Get current visible TCNT register value. */
- tcnt = tcnt_internal / controller->clock_prescaler;
-
- flags = cpu->ios[M6811_TMSK1];
- mask = 0x80;
- delay = 65536 * controller->clock_prescaler;
-
- /* Scan each output compare register to see if one matches
- the free running counter. Set the corresponding OCi flag
- if the output compare is enabled. */
- for (i = M6811_TOC1; i <= M6811_TOC5; i += 2, mask >>= 1)
- {
- unsigned long compare;
-
- compare = (cpu->ios[i] << 8) + cpu->ios[i+1];
- if (compare == tcnt && (flags & mask))
- {
- cpu->ios[M6811_TFLG1] |= mask;
- check_interrupt++;
- }
-
- /* Compute how many times for the next match.
- Use the internal counter value to take into account the
- prescaler accurately. */
- compare = compare * controller->clock_prescaler;
- if (compare > tcnt_internal)
- compare = compare - tcnt_internal;
- else
- compare = compare - tcnt_internal
- + 65536 * controller->clock_prescaler;
-
- if (compare < delay)
- delay = compare;
- }
-
- /* Deactivate the compare timer if no output compare is enabled. */
- if ((flags & 0xF0) == 0)
- delay = 0;
- break;
-
- default:
- eventp = 0;
- break;
- }
-
- if (*eventp)
- {
- hw_event_queue_deschedule (me, *eventp);
- *eventp = 0;
- }
-
- if (delay != 0)
- {
- *eventp = hw_event_queue_schedule (me, delay,
- m68hc11tim_timer_event,
- (void*) type);
- }
-
- if (check_interrupt)
- interrupts_update_pending (&cpu->cpu_interrupts);
-}
-
-
-/* Descriptions of the Timer I/O ports. These descriptions are only used to
- give information of the Timer device under GDB. */
-io_reg_desc tmsk2_desc[] = {
- { M6811_TOI, "TOI ", "Timer Overflow Interrupt Enable" },
- { M6811_RTII, "RTII ", "RTI Interrupt Enable" },
- { M6811_PAOVI, "PAOVI ", "Pulse Accumulator Overflow Interrupt Enable" },
- { M6811_PAII, "PAII ", "Pulse Accumulator Interrupt Enable" },
- { M6811_PR1, "PR1 ", "Timer prescaler (PR1)" },
- { M6811_PR0, "PR0 ", "Timer prescaler (PR0)" },
- { M6811_TPR_1, "TPR_1 ", "Timer prescaler div 1" },
- { M6811_TPR_4, "TPR_4 ", "Timer prescaler div 4" },
- { M6811_TPR_8, "TPR_8 ", "Timer prescaler div 8" },
- { M6811_TPR_16, "TPR_16", "Timer prescaler div 16" },
- { 0, 0, 0 }
-};
-
-io_reg_desc tflg2_desc[] = {
- { M6811_TOF, "TOF ", "Timer Overflow Bit" },
- { M6811_RTIF, "RTIF ", "Read Time Interrupt Flag" },
- { M6811_PAOVF, "PAOVF ", "Pulse Accumulator Overflow Interrupt Flag" },
- { M6811_PAIF, "PAIF ", "Pulse Accumulator Input Edge" },
- { 0, 0, 0 }
-};
-
-io_reg_desc pactl_desc[] = {
- { M6811_DDRA7, "DDRA7 ", "Data Direction for Port A bit-7" },
- { M6811_PAEN, "PAEN ", "Pulse Accumulator System Enable" },
- { M6811_PAMOD, "PAMOD ", "Pulse Accumulator Mode" },
- { M6811_PEDGE, "PEDGE ", "Pulse Accumulator Edge Control" },
- { M6811_RTR1, "RTR1 ", "RTI Interrupt rate select (RTR1)" },
- { M6811_RTR0, "RTR0 ", "RTI Interrupt rate select (RTR0)" },
- { 0, 0, 0 }
-};
-
-static double
-to_realtime (sim_cpu *cpu, signed64 t)
-{
- return (double) (t) / (double) (cpu->cpu_frequency / 4);
-}
-
-const char*
-cycle_to_string (sim_cpu *cpu, signed64 t)
-{
- double dt;
- static char buf[64];
-
- dt = to_realtime (cpu, t);
- if (dt < 0.001)
- sprintf (buf, "%llu cycle%s (%3.1f us)", t,
- (t > 1 ? "s" : ""), dt * 1000000.0);
- else if (dt < 1.0)
- sprintf (buf, "%llu cycles (%3.1f ms)", t, dt * 1000.0);
- else
- sprintf (buf, "%llu cycles (%3.1f s)", t, dt);
-
- return buf;
-}
-
-static void
-m68hc11tim_print_timer (struct hw *me, const char *name,
- struct hw_event *event)
-{
- SIM_DESC sd;
-
- sd = hw_system (me);
- if (event == 0)
- {
- sim_io_printf (sd, " No %s interrupt will be raised.\n", name);
- }
- else
- {
- signed64 t;
- sim_cpu* cpu;
-
- cpu = STATE_CPU (sd, 0);
-
- t = hw_event_remain_time (me, event);
- sim_io_printf (sd, " Next %s interrupt in %s\n",
- name, cycle_to_string (cpu, t));
- }
-}
-
-static void
-m68hc11tim_info (struct hw *me)
-{
- SIM_DESC sd;
- uint16 base = 0;
- sim_cpu *cpu;
- struct m68hc11tim *controller;
- uint8 val;
-
- sd = hw_system (me);
- cpu = STATE_CPU (sd, 0);
- controller = hw_data (me);
-
- sim_io_printf (sd, "M68HC11 Timer:\n");
-
- base = cpu_get_io_base (cpu);
-
- val = cpu->ios[M6811_TMSK2];
- print_io_byte (sd, "TMSK2 ", tmsk2_desc, val, base + M6811_TMSK2);
- sim_io_printf (sd, "\n");
-
- val = cpu->ios[M6811_TFLG2];
- print_io_byte (sd, "TFLG2", tflg2_desc, val, base + M6811_TFLG2);
- sim_io_printf (sd, "\n");
-
- val = cpu->ios[M6811_PACTL];
- print_io_byte (sd, "PACTL", pactl_desc, val, base + M6811_PACTL);
- sim_io_printf (sd, "\n");
-
- /* Give info about the next timer interrupts. */
- m68hc11tim_print_timer (me, "RTI", controller->rti_timer_event);
- m68hc11tim_print_timer (me, "COP", controller->cop_timer_event);
- m68hc11tim_print_timer (me, "OVERFLOW", controller->tof_timer_event);
- m68hc11tim_print_timer (me, "COMPARE", controller->cmp_timer_event);
-}
-
-static int
-m68hc11tim_ioctl (struct hw *me,
- hw_ioctl_request request,
- va_list ap)
-{
- m68hc11tim_info (me);
- return 0;
-}
-
-/* generic read/write */
-
-static unsigned
-m68hc11tim_io_read_buffer (struct hw *me,
- void *dest,
- int space,
- unsigned_word base,
- unsigned nr_bytes)
-{
- SIM_DESC sd;
- struct m68hc11tim *controller;
- sim_cpu *cpu;
- unsigned8 val;
- unsigned cnt = 0;
-
- HW_TRACE ((me, "read 0x%08lx %d", (long) base, (int) nr_bytes));
-
- sd = hw_system (me);
- cpu = STATE_CPU (sd, 0);
- controller = hw_data (me);
-
- while (nr_bytes)
- {
- switch (base)
- {
- /* The cpu_absolute_cycle is updated after each instruction.
- Reading in a 16-bit register will be split in two accesses
- but this will be atomic within the simulator. */
- case M6811_TCTN_H:
- val = (uint8) ((cpu->cpu_absolute_cycle - controller->tcnt_adjust)
- / (controller->clock_prescaler * 256));
- break;
-
- case M6811_TCTN_L:
- val = (uint8) ((cpu->cpu_absolute_cycle - controller->tcnt_adjust)
- / controller->clock_prescaler);
- break;
-
- default:
- val = cpu->ios[base];
- break;
- }
- *((unsigned8*) dest) = val;
- dest++;
- base++;
- nr_bytes--;
- cnt++;
- }
- return cnt;
-}
-
-static unsigned
-m68hc11tim_io_write_buffer (struct hw *me,
- const void *source,
- int space,
- unsigned_word base,
- unsigned nr_bytes)
-{
- SIM_DESC sd;
- struct m68hc11tim *controller;
- sim_cpu *cpu;
- unsigned8 val, n;
- signed64 adj;
- int reset_compare = 0;
- int reset_overflow = 0;
- int cnt = 0;
-
- HW_TRACE ((me, "write 0x%08lx %d", (long) base, (int) nr_bytes));
-
- sd = hw_system (me);
- cpu = STATE_CPU (sd, 0);
- controller = hw_data (me);
-
- while (nr_bytes)
- {
- val = *((const unsigned8*) source);
- switch (base)
- {
- /* Set the timer counter low part, trying to preserve the low part.
- We compute the absolute cycle adjustment that we have to apply
- to obtain the timer current value. Computation must be made
- in 64-bit to avoid overflow problems. */
- case M6811_TCTN_L:
- adj = ((cpu->cpu_absolute_cycle - controller->tcnt_adjust)
- / (controller->clock_prescaler * (signed64) 256)) & 0x0FF;
- adj = cpu->cpu_absolute_cycle
- - (adj * controller->clock_prescaler * (signed64) 256)
- - ((signed64) adj * controller->clock_prescaler);
- controller->tcnt_adjust = adj;
- reset_compare = 1;
- reset_overflow = 1;
- break;
-
- case M6811_TCTN_H:
- adj = ((cpu->cpu_absolute_cycle - controller->tcnt_adjust)
- / controller->clock_prescaler) & 0x0ff;
- adj = cpu->cpu_absolute_cycle
- - ((signed64) val * controller->clock_prescaler * (signed64) 256)
- - (adj * controller->clock_prescaler);
- controller->tcnt_adjust = adj;
- reset_compare = 1;
- reset_overflow = 1;
- break;
-
- case M6811_TMSK2:
-
- /* Timer prescaler cannot be changed after 64 bus cycles. */
- if (cpu->cpu_absolute_cycle >= 64)
- {
- val &= ~(M6811_PR1 | M6811_PR0);
- val |= cpu->ios[M6811_TMSK2] & (M6811_PR1 | M6811_PR0);
- }
- switch (val & (M6811_PR1 | M6811_PR0))
- {
- case 0:
- n = 1;
- break;
- case M6811_PR0:
- n = 4;
- break;
- case M6811_PR1:
- n = 8;
- break;
- default:
- case M6811_PR1 | M6811_PR0:
- n = 16;
- break;
- }
- if (cpu->cpu_absolute_cycle < 64)
- {
- reset_overflow = 1;
- controller->clock_prescaler = n;
- }
- cpu->ios[base] = val;
- interrupts_update_pending (&cpu->cpu_interrupts);
- break;
-
- case M6811_PACTL:
- n = (1 << ((val & (M6811_RTR1 | M6811_RTR0))));
- cpu->ios[base] = val;
-
- controller->rti_delay = (long) (n) * 8192;
- m68hc11tim_timer_event (me, (void*) (RTI_EVENT| 0x100));
- break;
-
- case M6811_TFLG2:
- if (val & M6811_TOF)
- val &= ~M6811_TOF;
- else
- val |= cpu->ios[M6811_TFLG2] & M6811_TOF;
-
- /* Clear the Real Time interrupt flag. */
- if (val & M6811_RTIF)
- val &= ~M6811_RTIF;
- else
- val |= cpu->ios[M6811_TFLG2] & M6811_RTIF;
-
- cpu->ios[base] = val;
- interrupts_update_pending (&cpu->cpu_interrupts);
- break;
-
- case M6811_TOC1:
- case M6811_TOC2:
- case M6811_TOC3:
- case M6811_TOC4:
- case M6811_TOC5:
- cpu->ios[base] = val;
- reset_compare = 1;
- break;
-
- default:
- break;
- }
-
- base++;
- nr_bytes--;
- cnt++;
- source++;
- }
-
- /* Re-compute the next timer compare event. */
- if (reset_compare)
- {
- m68hc11tim_timer_event (me, (void*) (COMPARE_EVENT));
- }
- if (reset_overflow)
- {
- m68hc11tim_timer_event (me, (void*) (OVERFLOW_EVENT| 0x100));
- }
- return cnt;
-}
-
-
-const struct hw_descriptor dv_m68hc11tim_descriptor[] = {
- { "m68hc11tim", m68hc11tim_finish },
- { "m68hc12tim", m68hc11tim_finish },
- { NULL },
-};
-
diff --git a/sim/m68hc11/dv-nvram.c b/sim/m68hc11/dv-nvram.c
deleted file mode 100644
index 1a8a91a6804..00000000000
--- a/sim/m68hc11/dv-nvram.c
+++ /dev/null
@@ -1,351 +0,0 @@
-/* dv-nvram.c -- Generic driver for a non volatile ram (battery saved)
- Copyright (C) 1999, 2000 Free Software Foundation, Inc.
- Written by Stephane Carrez (stcarrez@worldnet.fr)
- (From a driver model Contributed by Cygnus Solutions.)
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-#include "sim-main.h"
-#include "hw-main.h"
-#include "sim-assert.h"
-
-#include <unistd.h>
-#include <fcntl.h>
-#include <errno.h>
-
-
-/* DEVICE
-
- nvram - Non Volatile Ram
-
-
- DESCRIPTION
-
- Implements a generic battery saved CMOS ram. This ram device does
- not contain any realtime clock and does not generate any interrupt.
- The ram content is loaded from a file and saved when it is changed.
- It is intended to be generic.
-
-
- PROPERTIES
-
- reg <base> <length>
-
- Base and size of the non-volatile ram bank.
-
- file <path>
-
- Path where the memory must be saved or loaded when we start.
-
- mode {map | save-modified | save-all}
-
- Controls how to load and save the memory content.
-
- map The file is mapped in memory
- save-modified The simulator keeps an open file descriptor to
- the file and saves portion of memory which are
- modified.
- save-all The simulator saves the complete memory each time
- it's modified (it does not keep an open file
- descriptor).
-
-
- PORTS
-
- None.
-
-
- NOTES
-
- This device is independent of the Motorola 68hc11.
-
- */
-
-
-
-/* static functions */
-
-/* Control of how to access the ram and save its content. */
-
-enum nvram_mode
-{
- /* Save the complete ram block each time it's changed.
- We don't keep an open file descriptor. This should be
- ok for small memory banks. */
- NVRAM_SAVE_ALL,
-
- /* Save only the memory bytes which are modified.
- This mode means that we have to keep an open file
- descriptor (O_RDWR). It's good for middle sized memory banks. */
- NVRAM_SAVE_MODIFIED,
-
- /* Map file in memory (not yet implemented).
- This mode is suitable for large memory banks. We don't allocate
- a buffer to represent the ram, instead it's mapped in memory
- with mmap. */
- NVRAM_MAP_FILE
-};
-
-struct nvram
-{
- address_word base_address; /* Base address of ram. */
- unsigned size; /* Size of ram. */
- unsigned8 *data; /* Pointer to ram memory. */
- const char *file_name; /* Path of ram file. */
- int fd; /* File description of opened ram file. */
- enum nvram_mode mode; /* How load/save ram file. */
-};
-
-
-
-/* Finish off the partially created hw device. Attach our local
- callbacks. Wire up our port names etc. */
-
-static hw_io_read_buffer_method nvram_io_read_buffer;
-static hw_io_write_buffer_method nvram_io_write_buffer;
-
-
-
-static void
-attach_nvram_regs (struct hw *me, struct nvram *controller)
-{
- unsigned_word attach_address;
- int attach_space;
- unsigned attach_size;
- reg_property_spec reg;
- int result, oerrno;
-
- /* Get ram bank description (base and size). */
- if (hw_find_property (me, "reg") == NULL)
- hw_abort (me, "Missing \"reg\" property");
-
- if (!hw_find_reg_array_property (me, "reg", 0, &reg))
- hw_abort (me, "\"reg\" property must contain one addr/size entry");
-
- hw_unit_address_to_attach_address (hw_parent (me),
- &reg.address,
- &attach_space,
- &attach_address,
- me);
- hw_unit_size_to_attach_size (hw_parent (me),
- &reg.size,
- &attach_size, me);
-
- hw_attach_address (hw_parent (me), 0,
- attach_space, attach_address, attach_size,
- me);
-
- controller->mode = NVRAM_SAVE_ALL;
- controller->base_address = attach_address;
- controller->size = attach_size;
- controller->fd = -1;
-
- /* Get the file where the ram content must be loaded/saved. */
- if(hw_find_property (me, "file") == NULL)
- hw_abort (me, "Missing \"file\" property");
-
- controller->file_name = hw_find_string_property (me, "file");
-
- /* Get the mode which defines how to save the memory. */
- if(hw_find_property (me, "mode") != NULL)
- {
- const char *value = hw_find_string_property (me, "mode");
-
- if (strcmp (value, "map") == 0)
- controller->mode = NVRAM_MAP_FILE;
- else if (strcmp (value, "save-modified") == 0)
- controller->mode = NVRAM_SAVE_MODIFIED;
- else if (strcmp (value, "save-all") == 0)
- controller->mode = NVRAM_SAVE_ALL;
- else
- hw_abort (me, "illegal value for mode parameter `%s': "
- "use map, save-modified or save-all", value);
- }
-
- /* Initialize the ram by loading/mapping the file in memory.
- If the file does not exist, create and give it some content. */
- switch (controller->mode)
- {
- case NVRAM_MAP_FILE:
- hw_abort (me, "'map' mode is not yet implemented, use 'save-modified'");
- break;
-
- case NVRAM_SAVE_MODIFIED:
- case NVRAM_SAVE_ALL:
- controller->data = (char*) hw_malloc (me, attach_size);
- if (controller->data == 0)
- hw_abort (me, "Not enough memory, try to use the mode 'map'");
-
- memset (controller->data, 0, attach_size);
- controller->fd = open (controller->file_name, O_RDWR);
- if (controller->fd < 0)
- {
- controller->fd = open (controller->file_name,
- O_RDWR | O_CREAT, 0644);
- if (controller->fd < 0)
- hw_abort (me, "Cannot open or create file '%s'",
- controller->file_name);
- result = write (controller->fd, controller->data, attach_size);
- if (result != attach_size)
- {
- oerrno = errno;
- hw_free (me, controller->data);
- close (controller->fd);
- errno = oerrno;
- hw_abort (me, "Failed to save the ram content");
- }
- }
- else
- {
- result = read (controller->fd, controller->data, attach_size);
- if (result != attach_size)
- {
- oerrno = errno;
- hw_free (me, controller->data);
- close (controller->fd);
- errno = oerrno;
- hw_abort (me, "Failed to load the ram content");
- }
- }
- if (controller->mode == NVRAM_SAVE_ALL)
- {
- close (controller->fd);
- controller->fd = -1;
- }
- break;
-
- default:
- break;
- }
-}
-
-
-static void
-nvram_finish (struct hw *me)
-{
- struct nvram *controller;
-
- controller = HW_ZALLOC (me, struct nvram);
-
- set_hw_data (me, controller);
- set_hw_io_read_buffer (me, nvram_io_read_buffer);
- set_hw_io_write_buffer (me, nvram_io_write_buffer);
-
- /* Attach ourself to our parent bus. */
- attach_nvram_regs (me, controller);
-}
-
-
-
-/* generic read/write */
-
-static unsigned
-nvram_io_read_buffer (struct hw *me,
- void *dest,
- int space,
- unsigned_word base,
- unsigned nr_bytes)
-{
- struct nvram *controller = hw_data (me);
-
- HW_TRACE ((me, "read 0x%08lx %d [%ld]",
- (long) base, (int) nr_bytes,
- (long) (base - controller->base_address)));
-
- base -= controller->base_address;
- if (base + nr_bytes > controller->size)
- nr_bytes = controller->size - base;
-
- memcpy (dest, &controller->data[base], nr_bytes);
- return nr_bytes;
-}
-
-
-
-static unsigned
-nvram_io_write_buffer (struct hw *me,
- const void *source,
- int space,
- unsigned_word base,
- unsigned nr_bytes)
-{
- struct nvram *controller = hw_data (me);
-
- HW_TRACE ((me, "write 0x%08lx %d [%ld]",
- (long) base, (int) nr_bytes,
- (long) (base - controller->base_address)));
-
- base -= controller->base_address;
- if (base + nr_bytes > controller->size)
- nr_bytes = controller->size - base;
-
- switch (controller->mode)
- {
- case NVRAM_SAVE_ALL:
- {
- int fd, result, oerrno;
-
- fd = open (controller->file_name, O_WRONLY, 0644);
- if (fd < 0)
- {
- return 0;
- }
-
- memcpy (&controller->data[base], source, nr_bytes);
- result = write (fd, controller->data, controller->size);
- oerrno = errno;
- close (fd);
- errno = oerrno;
-
- if (result != controller->size)
- {
- return 0;
- }
- return nr_bytes;
- }
-
- case NVRAM_SAVE_MODIFIED:
- {
- off_t pos;
- int result;
-
- pos = lseek (controller->fd, (off_t) base, SEEK_SET);
- if (pos != (off_t) base)
- return 0;
-
- result = write (controller->fd, source, nr_bytes);
- if (result < 0)
- return 0;
-
- nr_bytes = result;
- break;
- }
-
- default:
- break;
- }
- memcpy (&controller->data[base], source, nr_bytes);
- return nr_bytes;
-}
-
-
-const struct hw_descriptor dv_nvram_descriptor[] = {
- { "nvram", nvram_finish, },
- { NULL },
-};
-
diff --git a/sim/m68hc11/emulos.c b/sim/m68hc11/emulos.c
deleted file mode 100644
index bb9f27b418c..00000000000
--- a/sim/m68hc11/emulos.c
+++ /dev/null
@@ -1,161 +0,0 @@
-/* emulos.c -- Small OS emulation
- Copyright 1999, 2000 Free Software Foundation, Inc.
- Written by Stephane Carrez (stcarrez@worldnet.fr)
-
-This file is part of GDB, GAS, and the GNU binutils.
-
-GDB, GAS, and the GNU binutils are free software; you can redistribute
-them and/or modify them under the terms of the GNU General Public
-License as published by the Free Software Foundation; either version
-1, or (at your option) any later version.
-
-GDB, GAS, and the GNU binutils are distributed in the hope that they
-will be useful, but WITHOUT ANY WARRANTY; without even the implied
-warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See
-the GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License
-along with this file; see the file COPYING. If not, write to the Free
-Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
-
-#include "sim-main.h"
-#ifdef HAVE_UNISTD_H
-#include <unistd.h>
-#endif
-
-#ifndef WIN32
-#include <sys/types.h>
-#include <sys/time.h>
-
-/* This file emulates some OS system calls.
- It's basically used to give access to the host OS facilities
- like: stdin, stdout, files, time of day. */
-static int bench_mode = -1;
-static struct timeval bench_start;
-static struct timeval bench_stop;
-
-void
-emul_bench (struct _sim_cpu* cpu)
-{
- int op;
-
- op = cpu_get_d (cpu);
- switch (op)
- {
- case 0:
- bench_mode = 0;
- gettimeofday (&bench_start, 0);
- break;
-
- case 1:
- gettimeofday (&bench_stop, 0);
- if (bench_mode != 0)
- printf ("bench start not called...\n");
- bench_mode = 1;
- break;
-
- case 2:
- {
- int sz = 0;
- int addr = cpu_get_x (cpu);
- double t_start, t_stop, t;
- char buf[1024];
-
- op = cpu_get_y (cpu);
- t_start = (double) (bench_start.tv_sec) * 1.0e6;
- t_start += (double) (bench_start.tv_usec);
- t_stop = (double) (bench_stop.tv_sec) * 1.0e6;
- t_stop += (double) (bench_stop.tv_usec);
-
- while (sz < 1024)
- {
- buf[sz] = memory_read8 (cpu, addr);
- if (buf[sz] == 0)
- break;
-
- sz ++;
- addr++;
- }
- buf[1023] = 0;
-
- if (bench_mode != 1)
- printf ("bench_stop not called");
-
- bench_mode = -1;
- t = t_stop - t_start;
- printf ("%-40.40s [%6d] %3.3f us\n", buf,
- op, t / (double) (op));
- break;
- }
- }
-}
-#endif
-
-void
-emul_write(struct _sim_cpu* state)
-{
- int addr = cpu_get_x (state) & 0x0FFFF;
- int size = cpu_get_d (state) & 0x0FFFF;
-
- if (addr + size > 0x0FFFF) {
- size = 0x0FFFF - addr;
- }
- state->cpu_running = 0;
- while (size)
- {
- uint8 val = memory_read8 (state, addr);
-
- write(0, &val, 1);
- addr ++;
- size--;
- }
-}
-
-/* emul_exit () is used by the default startup code of GCC to implement
- the exit (). For a real target, this will create an ILLEGAL fault.
- But doing an exit () on a real target is really a non-sense.
- exit () is important for the validation of GCC. The exit status
- is passed in 'D' register. */
-void
-emul_exit (sim_cpu *cpu)
-{
- sim_engine_halt (CPU_STATE (cpu), cpu,
- NULL, NULL_CIA, sim_exited,
- cpu_get_d (cpu));
-}
-
-void
-emul_os (int code, sim_cpu *proc)
-{
- proc->cpu_current_cycle = 8;
- switch (code)
- {
- case 0x0:
- break;
-
- /* 0xCD 0x01 */
- case 0x01:
- emul_write (proc);
- break;
-
- /* 0xCD 0x02 */
- case 0x02:
- break;
-
- /* 0xCD 0x03 */
- case 0x03:
- emul_exit (proc);
- break;
-
- /* 0xCD 0x04 */
- case 0x04:
-#ifndef WIN32
- emul_bench (proc);
-#endif
- break;
-
- default:
- break;
- }
-}
-
diff --git a/sim/m68hc11/gencode.c b/sim/m68hc11/gencode.c
deleted file mode 100644
index 8c32e3e1649..00000000000
--- a/sim/m68hc11/gencode.c
+++ /dev/null
@@ -1,2141 +0,0 @@
-/* gencode.c -- Motorola 68HC11 & 68HC12 Emulator Generator
- Copyright 1999, 2000, 2001 Free Software Foundation, Inc.
- Written by Stephane Carrez (stcarrez@worldnet.fr)
-
-This file is part of GDB, GAS, and the GNU binutils.
-
-GDB, GAS, and the GNU binutils are free software; you can redistribute
-them and/or modify them under the terms of the GNU General Public
-License as published by the Free Software Foundation; either version
-2, or (at your option) any later version.
-
-GDB, GAS, and the GNU binutils are distributed in the hope that they
-will be useful, but WITHOUT ANY WARRANTY; without even the implied
-warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See
-the GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License along
-with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
-
-#include <stdio.h>
-#include <string.h>
-#include <stdarg.h>
-#include <errno.h>
-
-#include "ansidecl.h"
-#include "opcode/m68hc11.h"
-
-#define TABLE_SIZE(X) (sizeof(X) / sizeof(X[0]))
-
-/* Combination of CCR flags. */
-#define M6811_ZC_BIT M6811_Z_BIT|M6811_C_BIT
-#define M6811_NZ_BIT M6811_N_BIT|M6811_Z_BIT
-#define M6811_NZV_BIT M6811_N_BIT|M6811_Z_BIT|M6811_V_BIT
-#define M6811_NZC_BIT M6811_N_BIT|M6811_Z_BIT|M6811_C_BIT
-#define M6811_NVC_BIT M6811_N_BIT|M6811_V_BIT|M6811_C_BIT
-#define M6811_ZVC_BIT M6811_Z_BIT|M6811_V_BIT|M6811_C_BIT
-#define M6811_NZVC_BIT M6811_ZVC_BIT|M6811_N_BIT
-#define M6811_HNZVC_BIT M6811_NZVC_BIT|M6811_H_BIT
-#define M6811_HNVC_BIT M6811_NVC_BIT|M6811_H_BIT
-#define M6811_VC_BIT M6811_V_BIT|M6811_C_BIT
-
-/* Flags when the insn only changes some CCR flags. */
-#define CHG_NONE 0,0,0
-#define CHG_Z 0,0,M6811_Z_BIT
-#define CHG_C 0,0,M6811_C_BIT
-#define CHG_ZVC 0,0,M6811_ZVC_BIT
-#define CHG_NZC 0,0,M6811_NZC_BIT
-#define CHG_NZV 0,0,M6811_NZV_BIT
-#define CHG_NZVC 0,0,M6811_NZVC_BIT
-#define CHG_HNZVC 0,0,M6811_HNZVC_BIT
-#define CHG_ALL 0,0,0xff
-
-/* The insn clears and changes some flags. */
-#define CLR_I 0,M6811_I_BIT,0
-#define CLR_C 0,M6811_C_BIT,0
-#define CLR_V 0,M6811_V_BIT,0
-#define CLR_V_CHG_ZC 0,M6811_V_BIT,M6811_ZC_BIT
-#define CLR_V_CHG_NZ 0,M6811_V_BIT,M6811_NZ_BIT
-#define CLR_V_CHG_ZVC 0,M6811_V_BIT,M6811_ZVC_BIT
-#define CLR_N_CHG_ZVC 0,M6811_N_BIT,M6811_ZVC_BIT /* Used by lsr */
-#define CLR_VC_CHG_NZ 0,M6811_VC_BIT,M6811_NZ_BIT
-
-/* The insn sets some flags. */
-#define SET_I M6811_I_BIT,0,0
-#define SET_C M6811_C_BIT,0,0
-#define SET_V M6811_V_BIT,0,0
-#define SET_Z_CLR_NVC M6811_Z_BIT,M6811_NVC_BIT,0
-#define SET_C_CLR_V_CHG_NZ M6811_C_BIT,M6811_V_BIT,M6811_NZ_BIT
-#define SET_Z_CHG_HNVC M6811_Z_BIT,0,M6811_HNVC_BIT
-
-#define _M 0xff
-
-static int cpu_type;
-
-struct m6811_opcode_pattern
-{
- const char *name;
- const char *pattern;
- const char *ccr_update;
-};
-
-/*
- * { "test", M6811_OP_NONE, 1, 0x00, 5, _M, CHG_NONE },
- * Name -+ +---- Insn CCR changes
- * Format ------+ +---------- Max # cycles
- * Size -----------------+ +--------------- Min # cycles
- * +-------------------- Opcode
- */
-struct m6811_opcode_pattern m6811_opcode_patterns[] = {
- /* Move 8 and 16 bits. We need two implementations: one that sets the
- flags and one that preserve them. */
- { "movtst8", "dst8 = src8", "cpu_ccr_update_tst8 (proc, dst8)" },
- { "movtst16", "dst16 = src16", "cpu_ccr_update_tst16 (proc, dst16)" },
- { "mov8", "dst8 = src8" },
- { "mov16", "dst16 = src16" },
- { "lea16", "dst16 = addr" },
-
- /* Conditional branches. 'addr' is the address of the branch. */
- { "bra", "cpu_set_pc (proc, addr)" },
- { "bhi",
- "if ((cpu_get_ccr (proc) & (M6811_C_BIT|M6811_Z_BIT)) == 0)\n@ \
- cpu_set_pc (proc, addr)" },
- { "bls",
- "if ((cpu_get_ccr (proc) & (M6811_C_BIT|M6811_Z_BIT)))\n@ \
- cpu_set_pc (proc, addr)" },
- { "bcc", "if (!cpu_get_ccr_C (proc))\n@ cpu_set_pc (proc, addr)" },
- { "bcs", "if (cpu_get_ccr_C (proc))\n@ cpu_set_pc (proc, addr)" },
- { "bne", "if (!cpu_get_ccr_Z (proc))\n@ cpu_set_pc (proc, addr)" },
- { "beq", "if (cpu_get_ccr_Z (proc))\n@ cpu_set_pc (proc, addr)" },
- { "bvc", "if (!cpu_get_ccr_V (proc))\n@ cpu_set_pc (proc, addr)" },
- { "bvs", "if (cpu_get_ccr_V (proc))\n@ cpu_set_pc (proc, addr)" },
- { "bpl", "if (!cpu_get_ccr_N (proc))\n@ cpu_set_pc (proc, addr)" },
- { "bmi", "if (cpu_get_ccr_N (proc))\n@ cpu_set_pc (proc, addr)" },
- { "bge", "if ((cpu_get_ccr_N (proc) ^ cpu_get_ccr_V (proc)) == 0)\n@ cpu_set_pc (proc, addr)" },
- { "blt", "if ((cpu_get_ccr_N (proc) ^ cpu_get_ccr_V (proc)))\n@ cpu_set_pc (proc, addr)" },
- { "bgt",
- "if ((cpu_get_ccr_Z (proc) | (cpu_get_ccr_N (proc) ^ cpu_get_ccr_V (proc))) == 0)\n@ \
- cpu_set_pc (proc, addr)" },
- { "ble",
- "if ((cpu_get_ccr_Z (proc) | (cpu_get_ccr_N (proc) ^ cpu_get_ccr_V (proc))))\n@ \
- cpu_set_pc (proc, addr)" },
-
- /* brclr and brset perform a test and a conditional jump at the same
- time. Flags are not changed. */
- { "brclr8",
- "if ((src8 & dst8) == 0)\n@ cpu_set_pc (proc, addr)" },
- { "brset8",
- "if (((~src8) & dst8) == 0)\n@ cpu_set_pc (proc, addr)" },
-
-
- { "rts11", "addr = cpu_m68hc11_pop_uint16 (proc); cpu_set_pc (proc, addr); cpu_return(proc)" },
- { "rts12", "addr = cpu_m68hc12_pop_uint16 (proc); cpu_set_pc (proc, addr); cpu_return(proc)" },
-
- { "mul16", "dst16 = ((uint16) src8 & 0x0FF) * ((uint16) dst8 & 0x0FF)",
- "cpu_set_ccr_C (proc, src8 & 0x80)" },
- { "neg8", "dst8 = - src8",
- "cpu_set_ccr_C (proc, src8 == 0); cpu_ccr_update_tst8 (proc, dst8)" },
- { "com8", "dst8 = ~src8",
- "cpu_set_ccr_C (proc, 1); cpu_ccr_update_tst8 (proc, dst8);" },
- { "clr8", "dst8 = 0",
- "cpu_set_ccr (proc, (cpu_get_ccr (proc) & (M6811_S_BIT|M6811_X_BIT|M6811_H_BIT| \
-M6811_I_BIT)) | M6811_Z_BIT)"},
- { "clr16","dst16 = 0",
- "cpu_set_ccr (proc, (cpu_get_ccr (proc) & (M6811_S_BIT|M6811_X_BIT|M6811_H_BIT| \
-M6811_I_BIR)) | M6811_Z_BIT)"},
-
- /* 8-bits shift and rotation. */
- { "lsr8", "dst8 = src8 >> 1",
- "cpu_set_ccr_C (proc, src8 & 1); cpu_ccr_update_shift8 (proc, dst8)" },
- { "lsl8", "dst8 = src8 << 1",
- "cpu_set_ccr_C (proc, (src8 & 0x80) >> 7); cpu_ccr_update_shift8 (proc, dst8)" },
- { "asr8", "dst8 = (src8 >> 1) | (src8 & 0x80)",
- "cpu_set_ccr_C (proc, src8 & 1); cpu_ccr_update_shift8 (proc, dst8)" },
- { "ror8", "dst8 = (src8 >> 1) | (cpu_get_ccr_C (proc) << 7)",
- "cpu_set_ccr_C (proc, src8 & 1); cpu_ccr_update_shift8 (proc, dst8)" },
- { "rol8", "dst8 = (src8 << 1) | (cpu_get_ccr_C (proc))",
- "cpu_set_ccr_C (proc, (src8 & 0x80) >> 7); cpu_ccr_update_shift8 (proc, dst8)" },
-
- /* 16-bits shift instructions. */
- { "lsl16", "dst16 = src16 << 1",
- "cpu_set_ccr_C (proc, (src16&0x8000) >> 15); cpu_ccr_update_shift16 (proc, dst16)"},
- { "lsr16", "dst16 = src16 >> 1",
- "cpu_set_ccr_C (proc, src16 & 1); cpu_ccr_update_shift16 (proc, dst16)"},
-
- { "dec8", "dst8 = src8 - 1", "cpu_ccr_update_tst8 (proc, dst8)" },
- { "inc8", "dst8 = src8 + 1", "cpu_ccr_update_tst8 (proc, dst8)" },
- { "tst8", 0, "cpu_set_ccr_C (proc, 0); cpu_ccr_update_tst8 (proc, src8)" },
-
- { "sub8", "cpu_ccr_update_sub8 (proc, dst8 - src8, dst8, src8);\
-dst8 = dst8 - src8", 0 },
- { "add8", "cpu_ccr_update_add8 (proc, dst8 + src8, dst8, src8);\
-dst8 = dst8 + src8", 0 },
- { "sbc8", "if (cpu_get_ccr_C (proc))\n@ \
-{\n\
- cpu_ccr_update_sub8 (proc, dst8 - src8 - 1, dst8, src8);\n\
- dst8 = dst8 - src8 - 1;\n\
-}\n\
-else\n\
-{\n\
- cpu_ccr_update_sub8 (proc, dst8 - src8, dst8, src8);\n\
- dst8 = dst8 - src8;\n\
-}", 0 },
- { "adc8", "if (cpu_get_ccr_C (proc))\n@ \
-{\n\
- cpu_ccr_update_add8 (proc, dst8 + src8 + 1, dst8, src8);\n\
- dst8 = dst8 + src8 + 1;\n\
-}\n\
-else\n\
-{\n\
- cpu_ccr_update_add8 (proc, dst8 + src8, dst8, src8);\n\
- dst8 = dst8 + src8;\n\
-}",
- 0 },
-
- /* 8-bits logical operations. */
- { "and8", "dst8 = dst8 & src8", "cpu_ccr_update_tst8 (proc, dst8)" },
- { "eor8", "dst8 = dst8 ^ src8", "cpu_ccr_update_tst8 (proc, dst8)" },
- { "or8", "dst8 = dst8 | src8", "cpu_ccr_update_tst8 (proc, dst8)" },
- { "bclr8","dst8 = (~dst8) & src8", "cpu_ccr_update_tst8 (proc, dst8)" },
-
- /* 16-bits add and subtract instructions. */
- { "sub16", "cpu_ccr_update_sub16 (proc, dst16 - src16, dst16, src16);\
-dst16 = dst16 - src16", 0 },
- { "add16", "cpu_ccr_update_add16 (proc, dst16 + src16, dst16, src16);\
-dst16 = dst16 + src16", 0 },
- { "inc16", "dst16 = src16 + 1", "cpu_set_ccr_Z (proc, dst16 == 0)" },
- { "dec16", "dst16 = src16 - 1", "cpu_set_ccr_Z (proc, dst16 == 0)" },
-
- /* Special increment/decrement for the stack pointer:
- flags are not changed. */
- { "ins16", "dst16 = src16 + 1" },
- { "des16", "dst16 = src16 - 1" },
-
- { "jsr_11_16", "cpu_m68hc11_push_uint16 (proc, cpu_get_pc (proc)); cpu_call (proc, addr)"},
- { "jsr_12_16", "cpu_m68hc12_push_uint16 (proc, cpu_get_pc (proc)); cpu_call (proc, addr)"},
-
- /* xgdx and xgdx patterns. Flags are not changed. */
- { "xgdxy16", "dst16 = cpu_get_d (proc); cpu_set_d (proc, src16)"},
- { "stop", "cpu_special (proc, M6811_STOP)"},
-
- /* tsx, tsy, txs, tys don't affect the flags. Sp value is corrected
- by +/- 1. */
- { "tsxy16", "dst16 = src16 + 1;"},
- { "txys16", "dst16 = src16 - 1;"},
-
- /* Add b to X or Y with an unsigned extension 8->16. Flags not changed. */
- { "abxy16","dst16 = dst16 + (uint16) src8"},
-
- /* After 'daa', the Z flag is undefined. Mark it as changed. */
- { "daa8", "cpu_special (proc, M6811_DAA)" },
- { "nop", 0 },
-
-
- /* Integer divide:
- (parallel (set IX (div D IX))
- (set D (mod D IX))) */
- { "idiv16", "if (src16 == 0)\n{\n\
-dst16 = 0xffff;\
-}\nelse\n{\n\
-cpu_set_d (proc, dst16 % src16);\
-dst16 = dst16 / src16;\
-}",
- "cpu_set_ccr_Z (proc, dst16 == 0); cpu_set_ccr_V (proc, 0);\
-cpu_set_ccr_C (proc, src16 == 0)" },
-
- /* Fractional divide:
- (parallel (set IX (div (mul D 65536) IX)
- (set D (mod (mul D 65536) IX)))) */
- { "fdiv16", "if (src16 <= dst16 )\n{\n\
-dst16 = 0xffff;\n\
-cpu_set_ccr_Z (proc, 0);\n\
-cpu_set_ccr_V (proc, 1);\n\
-cpu_set_ccr_C (proc, dst16 == 0);\n\
-}\nelse\n{\n\
-unsigned long l = (unsigned long) (dst16) << 16;\n\
-cpu_set_d (proc, (uint16) (l % (unsigned long) (src16)));\n\
-dst16 = (uint16) (l / (unsigned long) (src16));\n\
-cpu_set_ccr_V (proc, 0);\n\
-cpu_set_ccr_C (proc, 0);\n\
-cpu_set_ccr_Z (proc, dst16 == 0);\n\
-}", 0 },
-
- /* Operations to get/set the CCR. */
- { "clv", 0, "cpu_set_ccr_V (proc, 0)" },
- { "sev", 0, "cpu_set_ccr_V (proc, 1)" },
- { "clc", 0, "cpu_set_ccr_C (proc, 0)" },
- { "sec", 0, "cpu_set_ccr_C (proc, 1)" },
- { "cli", 0, "cpu_set_ccr_I (proc, 0)" },
- { "sei", 0, "cpu_set_ccr_I (proc, 1)" },
-
- /* Some special instructions are implemented by 'cpu_special'. */
- { "rti11", "cpu_special (proc, M6811_RTI)" },
- { "rti12", "cpu_special (proc, M6812_RTI)" },
- { "wai", "cpu_special (proc, M6811_WAI)" },
- { "test", "cpu_special (proc, M6811_TEST)" },
- { "swi", "cpu_special (proc, M6811_SWI)" },
- { "syscall","cpu_special (proc, M6811_EMUL_SYSCALL)" },
-
- { "page2", "cpu_page2_interp (proc)", 0 },
- { "page3", "cpu_page3_interp (proc)", 0 },
- { "page4", "cpu_page4_interp (proc)", 0 },
-
- /* 68HC12 special instructions. */
- { "bgnd", "cpu_special (proc, M6812_BGND)" },
- { "call8", "cpu_special (proc, M6812_CALL)" },
- { "dbcc8", "cpu_dbcc (proc)" },
- { "ediv", "cpu_special (proc, M6812_EDIV)" },
- { "emul", "{ uint32 src1 = (uint32) cpu_get_d (proc);\
- uint32 src2 = (uint32) cpu_get_y (proc);\
- src1 *= src2;\
- cpu_set_d (proc, src1);\
- cpu_set_y (proc, src1 >> 16);\
- cpu_set_ccr_Z (proc, src1 == 0);\
- cpu_set_ccr_C (proc, src1 & 0x08000);\
- cpu_set_ccr_N (proc, src1 & 0x80000000);}" },
- { "emuls", "cpu_special (proc, M6812_EMULS)" },
- { "mem", "cpu_special (proc, M6812_MEM)" },
- { "rtc", "cpu_special (proc, M6812_RTC)" },
- { "emacs", "cpu_special (proc, M6812_EMACS)" },
- { "idivs", "cpu_special (proc, M6812_IDIVS)" },
- { "edivs", "cpu_special (proc, M6812_EDIVS)" },
- { "exg8", "cpu_exg (proc, src8)" },
- { "move8", "cpu_move8 (proc, op)" },
- { "move16","cpu_move16 (proc, op)" },
-
- { "max8", "cpu_ccr_update_sub8 (proc, dst8 - src8, dst8, src8);\
- if (dst8 < src8) dst8 = src8" },
- { "min8", "cpu_ccr_update_sub8 (proc, dst8 - src8, dst8, src8);\
- if (dst8 > src8) dst8 = src8" },
- { "max16", "cpu_ccr_update_sub16 (proc, dst16 - src16, dst16, src16);\
- if (dst16 < src16) dst16 = src16" },
- { "min16", "cpu_ccr_update_sub16 (proc, dst16 - src16, dst16, src16);\
- if (dst16 > src16) dst16 = src16" },
-
- { "rev", "cpu_special (proc, M6812_REV);" },
- { "revw", "cpu_special (proc, M6812_REVW);" },
- { "wav", "cpu_special (proc, M6812_WAV);" },
- { "tbl8", "cpu_special (proc, M6812_ETBL);" },
- { "tbl16", "cpu_special (proc, M6812_ETBL);" }
-};
-
-/* Definition of an opcode of the 68HC11. */
-struct m6811_opcode_def
-{
- const char *name;
- const char *operands;
- const char *insn_pattern;
- unsigned char insn_size;
- unsigned char insn_code;
- unsigned char insn_min_cycles;
- unsigned char insn_max_cycles;
- unsigned char set_flags_mask;
- unsigned char clr_flags_mask;
- unsigned char chg_flags_mask;
-};
-
-
-/*
- * { "dex", "x->x", "dec16", 1, 0x00, 5, _M, CHG_NONE },
- * Name -+ +----- Insn CCR changes
- * Operands ---+ +------------ Max # cycles
- * Pattern -----------+ +--------------- Min # cycles
- * Size -----------------+ +-------------------- Opcode
- *
- * Operands Fetch operand Save result
- * ------- -------------- ------------
- * x->x src16 = x x = dst16
- * d->d src16 = d d = dst16
- * b,a->a src8 = b dst8 = a a = dst8
- * sp->x src16 = sp x = dst16
- * (sp)->a src8 = pop8 a = dst8
- * a->(sp) src8 = a push8 dst8
- * (x)->(x) src8 = (IND, X) (IND, X) = dst8
- * (y)->a src8 = (IND, Y) a = dst8
- * ()->b src8 = (EXT) b = dst8
- */
-struct m6811_opcode_def m6811_page1_opcodes[] = {
- { "test", 0, 0, 1, 0x00, 5, _M, CHG_NONE },
- { "nop", 0, 0, 1, 0x01, 2, 2, CHG_NONE },
- { "idiv", "x,d->x", "idiv16", 1, 0x02, 3, 41, CLR_V_CHG_ZC},
- { "fdiv", "x,d->x", "fdiv16", 1, 0x03, 3, 41, CHG_ZVC},
- { "lsrd", "d->d", "lsr16", 1, 0x04, 3, 3, CLR_N_CHG_ZVC },
- { "asld", "d->d", "lsl16", 1, 0x05, 3, 3, CHG_NZVC },
- { "tap", "a->ccr", "mov8", 1, 0x06, 2, 2, CHG_ALL},
- { "tpa", "ccr->a", "mov8", 1, 0x07, 2, 2, CHG_NONE },
- { "inx", "x->x", "inc16", 1, 0x08, 3, 3, CHG_Z },
- { "dex", "x->x", "dec16", 1, 0x09, 3, 3, CHG_Z },
- { "clv", 0, 0, 1, 0x0a, 2, 2, CLR_V },
- { "sev", 0, 0, 1, 0x0b, 2, 2, SET_V },
- { "clc", 0, 0, 1, 0x0c, 2, 2, CLR_C },
- { "sec", 0, 0, 1, 0x0d, 2, 2, SET_C },
- { "cli", 0, 0, 1, 0x0e, 2, 2, CLR_I },
- { "sei", 0, 0, 1, 0x0f, 2, 2, SET_I },
- { "sba", "b,a->a", "sub8", 1, 0x10, 2, 2, CHG_NZVC },
- { "cba", "b,a", "sub8", 1, 0x11, 2, 2, CHG_NZVC },
- { "brset","*,#,r", "brset8", 4, 0x12, 6, 6, CHG_NONE },
- { "brclr","*,#,r", "brclr8", 4, 0x13, 6, 6, CHG_NONE },
- { "bset", "*,#->*", "or8", 3, 0x14, 6, 6, CLR_V_CHG_NZ },
- { "bclr", "*,#->*", "bclr8", 3, 0x15, 6, 6, CLR_V_CHG_NZ },
- { "tab", "a->b", "movtst8", 1, 0x16, 2, 2, CLR_V_CHG_NZ },
- { "tba", "b->a", "movtst8", 1, 0x17, 2, 2, CLR_V_CHG_NZ },
- { "page2", 0, "page2", 1, 0x18, 0, 0, CHG_NONE },
- { "page3", 0, "page3", 1, 0x1a, 0, 0, CHG_NONE },
-
- /* After 'daa', the Z flag is undefined. Mark it as changed. */
- { "daa", "a->a", "daa8", 1, 0x19, 2, 2, CHG_NZVC },
- { "aba", "b,a->a", "add8", 1, 0x1b, 2, 2, CHG_HNZVC},
- { "bset", "(x),#->(x)","or8", 3, 0x1c, 7, 7, CLR_V_CHG_NZ },
- { "bclr", "(x),#->(x)","bclr8", 3, 0x1d, 7, 7, CLR_V_CHG_NZ },
- { "brset","(x),#,r", "brset8", 4, 0x1e, 7, 7, CHG_NONE },
- { "brclr","(x),#,r", "brclr8", 4, 0x1f, 7, 7, CHG_NONE },
-
- /* Relative branch. All of them take 3 bytes. Flags not changed. */
- { "bra", "r", 0, 2, 0x20, 3, 3, CHG_NONE },
- { "brn", "r", "nop", 2, 0x21, 3, 3, CHG_NONE },
- { "bhi", "r", 0, 2, 0x22, 3, 3, CHG_NONE },
- { "bls", "r", 0, 2, 0x23, 3, 3, CHG_NONE },
- { "bcc", "r", 0, 2, 0x24, 3, 3, CHG_NONE },
- { "bcs", "r", 0, 2, 0x25, 3, 3, CHG_NONE },
- { "bne", "r", 0, 2, 0x26, 3, 3, CHG_NONE },
- { "beq", "r", 0, 2, 0x27, 3, 3, CHG_NONE },
- { "bvc", "r", 0, 2, 0x28, 3, 3, CHG_NONE },
- { "bvs", "r", 0, 2, 0x29, 3, 3, CHG_NONE },
- { "bpl", "r", 0, 2, 0x2a, 3, 3, CHG_NONE },
- { "bmi", "r", 0, 2, 0x2b, 3, 3, CHG_NONE },
- { "bge", "r", 0, 2, 0x2c, 3, 3, CHG_NONE },
- { "blt", "r", 0, 2, 0x2d, 3, 3, CHG_NONE },
- { "bgt", "r", 0, 2, 0x2e, 3, 3, CHG_NONE },
- { "ble", "r", 0, 2, 0x2f, 3, 3, CHG_NONE },
-
- { "tsx", "sp->x", "tsxy16", 1, 0x30, 3, 3, CHG_NONE },
- { "ins", "sp->sp", "ins16", 1, 0x31, 3, 3, CHG_NONE },
- { "pula", "(sp)->a", "mov8", 1, 0x32, 4, 4, CHG_NONE },
- { "pulb", "(sp)->b", "mov8", 1, 0x33, 4, 4, CHG_NONE },
- { "des", "sp->sp", "des16", 1, 0x34, 3, 3, CHG_NONE },
- { "txs", "x->sp", "txys16", 1, 0x35, 3, 3, CHG_NONE },
- { "psha", "a->(sp)", "mov8", 1, 0x36, 3, 3, CHG_NONE },
- { "pshb", "b->(sp)", "mov8", 1, 0x37, 3, 3, CHG_NONE },
- { "pulx", "(sp)->x", "mov16", 1, 0x38, 5, 5, CHG_NONE },
- { "rts", 0, "rts11", 1, 0x39, 5, 5, CHG_NONE },
- { "abx", "b,x->x", "abxy16", 1, 0x3a, 3, 3, CHG_NONE },
- { "rti", 0, "rti11", 1, 0x3b, 12, 12, CHG_ALL},
- { "pshx", "x->(sp)", "mov16", 1, 0x3c, 4, 4, CHG_NONE },
- { "mul", "b,a->d", "mul16", 1, 0x3d, 3, 10, CHG_C },
- { "wai", 0, 0, 1, 0x3e, 14, _M, CHG_NONE },
- { "swi", 0, 0, 1, 0x3f, 14, _M, CHG_NONE },
- { "nega", "a->a", "neg8", 1, 0x40, 2, 2, CHG_NZVC },
- { "syscall", "", "syscall", 1, 0x41, 2, 2, CHG_NONE },
- { "coma", "a->a", "com8", 1, 0x43, 2, 2, SET_C_CLR_V_CHG_NZ },
- { "lsra", "a->a", "lsr8", 1, 0x44, 2, 2, CLR_N_CHG_ZVC},
- { "rora", "a->a", "ror8", 1, 0x46, 2, 2, CHG_NZVC },
- { "asra", "a->a", "asr8", 1, 0x47, 2, 2, CHG_NZVC },
- { "asla", "a->a", "lsl8", 1, 0x48, 2, 2, CHG_NZVC },
- { "rola", "a->a", "rol8", 1, 0x49, 2, 2, CHG_NZVC },
- { "deca", "a->a", "dec8", 1, 0x4a, 2, 2, CHG_NZV },
- { "inca", "a->a", "inc8", 1, 0x4c, 2, 2, CHG_NZV },
- { "tsta", "a", "tst8", 1, 0x4d, 2, 2, CLR_V_CHG_NZ },
- { "clra", "->a", "clr8", 1, 0x4f, 2, 2, SET_Z_CLR_NVC },
- { "negb", "b->b", "neg8", 1, 0x50, 2, 2, CHG_NZVC },
- { "comb", "b->b", "com8", 1, 0x53, 2, 2, SET_C_CLR_V_CHG_NZ },
- { "lsrb", "b->b", "lsr8", 1, 0x54, 2, 2, CLR_N_CHG_ZVC },
- { "rorb", "b->b", "ror8", 1, 0x56, 2, 2, CHG_NZVC },
- { "asrb", "b->b", "asr8", 1, 0x57, 2, 2, CHG_NZVC },
- { "aslb", "b->b", "lsl8", 1, 0x58, 2, 2, CHG_NZVC },
- { "rolb", "b->b", "rol8", 1, 0x59, 2, 2, CHG_NZVC },
- { "decb", "b->b", "dec8", 1, 0x5a, 2, 2, CHG_NZV },
- { "incb", "b->b", "inc8", 1, 0x5c, 2, 2, CHG_NZV },
- { "tstb", "b", "tst8", 1, 0x5d, 2, 2, CLR_V_CHG_NZ },
- { "clrb", "->b", "clr8", 1, 0x5f, 2, 2, SET_Z_CLR_NVC },
- { "neg", "(x)->(x)", "neg8", 2, 0x60, 6, 6, CHG_NZVC },
- { "com", "(x)->(x)", "com8", 2, 0x63, 6, 6, SET_C_CLR_V_CHG_NZ },
- { "lsr", "(x)->(x)", "lsr8", 2, 0x64, 6, 6, CLR_N_CHG_ZVC },
- { "ror", "(x)->(x)", "ror8", 2, 0x66, 6, 6, CHG_NZVC },
- { "asr", "(x)->(x)", "asr8", 2, 0x67, 6, 6, CHG_NZVC },
- { "asl", "(x)->(x)", "lsl8", 2, 0x68, 6, 6, CHG_NZVC },
- { "rol", "(x)->(x)", "rol8", 2, 0x69, 6, 6, CHG_NZVC },
- { "dec", "(x)->(x)", "dec8", 2, 0x6a, 6, 6, CHG_NZV },
- { "inc", "(x)->(x)", "inc8", 2, 0x6c, 6, 6, CHG_NZV },
- { "tst", "(x)", "tst8", 2, 0x6d, 6, 6, CLR_V_CHG_NZ },
- { "jmp", "&(x)", "bra", 2, 0x6e, 3, 3, CHG_NONE },
- { "clr", "->(x)", "clr8", 2, 0x6f, 6, 6, SET_Z_CLR_NVC },
- { "neg", "()->()", "neg8", 3, 0x70, 6, 6, CHG_NZVC },
- { "com", "()->()", "com8", 3, 0x73, 6, 6, SET_C_CLR_V_CHG_NZ },
- { "lsr", "()->()", "lsr8", 3, 0x74, 6, 6, CLR_V_CHG_ZVC },
- { "ror", "()->()", "ror8", 3, 0x76, 6, 6, CHG_NZVC },
- { "asr", "()->()", "asr8", 3, 0x77, 6, 6, CHG_NZVC },
- { "asl", "()->()", "lsl8", 3, 0x78, 6, 6, CHG_NZVC },
- { "rol", "()->()", "rol8", 3, 0x79, 6, 6, CHG_NZVC },
- { "dec", "()->()", "dec8", 3, 0x7a, 6, 6, CHG_NZV },
- { "inc", "()->()", "inc8", 3, 0x7c, 6, 6, CHG_NZV },
- { "tst", "()", "tst8", 3, 0x7d, 6, 6, CLR_V_CHG_NZ },
- { "jmp", "&()", "bra", 3, 0x7e, 3, 3, CHG_NONE },
- { "clr", "->()", "clr8", 3, 0x7f, 6, 6, SET_Z_CLR_NVC },
- { "suba", "#,a->a", "sub8", 2, 0x80, 2, 2, CHG_NZVC },
- { "cmpa", "#,a", "sub8", 2, 0x81, 2, 2, CHG_NZVC },
- { "sbca", "#,a->a", "sbc8", 2, 0x82, 2, 2, CHG_NZVC },
- { "subd", "#,d->d", "sub16", 3, 0x83, 4, 4, CHG_NZVC },
- { "anda", "#,a->a", "and8", 2, 0x84, 2, 2, CLR_V_CHG_NZ },
- { "bita", "#,a", "and8", 2, 0x85, 2, 2, CLR_V_CHG_NZ },
- { "ldaa", "#->a", "movtst8", 2, 0x86, 2, 2, CLR_V_CHG_NZ },
- { "eora", "#,a->a", "eor8", 2, 0x88, 2, 2, CLR_V_CHG_NZ },
- { "adca", "#,a->a", "adc8", 2, 0x89, 2, 2, CHG_HNZVC },
- { "oraa", "#,a->a", "or8", 2, 0x8a, 2, 2, CLR_V_CHG_NZ },
- { "adda", "#,a->a", "add8", 2, 0x8b, 2, 2, CHG_HNZVC },
- { "cmpx", "#,x", "sub16", 3, 0x8c, 4, 4, CHG_NZVC },
- { "bsr", "r", "jsr_11_16", 2, 0x8d, 6, 6, CHG_NONE },
- { "lds", "#->sp", "movtst16", 3, 0x8e, 3, 3, CLR_V_CHG_NZ },
- { "xgdx", "x->x", "xgdxy16", 1, 0x8f, 3, 3, CHG_NONE },
- { "suba", "*,a->a", "sub8", 2, 0x90, 3, 3, CHG_NZVC },
- { "cmpa", "*,a", "sub8", 2, 0x91, 3, 3, CHG_NZVC },
- { "sbca", "*,a->a", "sbc8", 2, 0x92, 3, 3, CHG_NZVC },
- { "subd", "*,d->d", "sub16", 2, 0x93, 5, 5, CHG_NZVC },
- { "anda", "*,a->a", "and8", 2, 0x94, 3, 3, CLR_V_CHG_NZ },
- { "bita", "*,a", "and8", 2, 0x95, 3, 3, CLR_V_CHG_NZ },
- { "ldaa", "*->a", "movtst8", 2, 0x96, 3, 3, CLR_V_CHG_NZ },
- { "staa", "a->*", "movtst8", 2, 0x97, 3, 3, CLR_V_CHG_NZ },
- { "eora", "*,a->a", "eor8", 2, 0x98, 3, 3, CLR_V_CHG_NZ },
- { "adca", "*,a->a", "adc8", 2, 0x99, 3, 3, CHG_HNZVC },
- { "oraa", "*,a->a", "or8", 2, 0x9a, 3, 3, CLR_V_CHG_NZ },
- { "adda", "*,a->a", "add8", 2, 0x9b, 3, 3, CHG_HNZVC },
- { "cmpx", "*,x", "sub16", 2, 0x9c, 5, 5, CHG_NZVC },
- { "jsr", "*", "jsr_11_16", 2, 0x9d, 5, 5, CHG_NONE },
- { "lds", "*->sp", "movtst16", 2, 0x9e, 4, 4, CLR_V_CHG_NZ },
- { "sts", "sp->*", "movtst16", 2, 0x9f, 4, 4, CLR_V_CHG_NZ },
- { "suba", "(x),a->a", "sub8", 2, 0xa0, 4, 4, CHG_NZVC },
- { "cmpa", "(x),a", "sub8", 2, 0xa1, 4, 4, CHG_NZVC },
- { "sbca", "(x),a->a", "sbc8", 2, 0xa2, 4, 4, CHG_NZVC },
- { "subd", "(x),d->d", "sub16", 2, 0xa3, 6, 6, CHG_NZVC },
- { "anda", "(x),a->a", "and8", 2, 0xa4, 4, 4, CLR_V_CHG_NZ },
- { "bita", "(x),a", "and8", 2, 0xa5, 4, 4, CLR_V_CHG_NZ },
- { "ldaa", "(x)->a", "movtst8", 2, 0xa6, 4, 4, CLR_V_CHG_NZ },
- { "staa", "a->(x)", "movtst8", 2, 0xa7, 4, 4, CLR_V_CHG_NZ },
- { "eora", "(x),a->a", "eor8", 2, 0xa8, 4, 4, CLR_V_CHG_NZ },
- { "adca", "(x),a->a", "adc8", 2, 0xa9, 4, 4, CHG_HNZVC },
- { "oraa", "(x),a->a", "or8", 2, 0xaa, 4, 4, CLR_V_CHG_NZ },
- { "adda", "(x),a->a", "add8", 2, 0xab, 4, 4, CHG_HNZVC },
- { "cmpx", "(x),x", "sub16", 2, 0xac, 6, 6, CHG_NZVC },
- { "jsr", "&(x)", "jsr_11_16", 2, 0xad, 6, 6, CHG_NONE },
- { "lds", "(x)->sp", "movtst16", 2, 0xae, 5, 5, CLR_V_CHG_NZ },
- { "sts", "sp->(x)", "movtst16", 2, 0xaf, 5, 5, CLR_V_CHG_NZ },
- { "suba", "(),a->a", "sub8", 3, 0xb0, 4, 4, CHG_NZVC },
- { "cmpa", "(),a", "sub8", 3, 0xb1, 4, 4, CHG_NZVC },
- { "sbca", "(),a->a", "sbc8", 3, 0xb2, 4, 4, CHG_NZVC },
- { "subd", "(),d->d", "sub16", 3, 0xb3, 6, 6, CHG_NZVC },
- { "anda", "(),a->a", "and8", 3, 0xb4, 4, 4, CLR_V_CHG_NZ },
- { "bita", "(),a", "and8", 3, 0xb5, 4, 4, CLR_V_CHG_NZ },
- { "ldaa", "()->a", "movtst8", 3, 0xb6, 4, 4, CLR_V_CHG_NZ },
- { "staa", "a->()", "movtst8", 3, 0xb7, 4, 4, CLR_V_CHG_NZ },
- { "eora", "(),a->a", "eor8", 3, 0xb8, 4, 4, CLR_V_CHG_NZ },
- { "adca", "(),a->a", "adc8", 3, 0xb9, 4, 4, CHG_HNZVC },
- { "oraa", "(),a->a", "or8", 3, 0xba, 4, 4, CLR_V_CHG_NZ },
- { "adda", "(),a->a", "add8", 3, 0xbb, 4, 4, CHG_HNZVC },
- { "cmpx", "(),x", "sub16", 3, 0xbc, 5, 5, CHG_NZVC },
- { "jsr", "&()", "jsr_11_16", 3, 0xbd, 6, 6, CHG_NONE },
- { "lds", "()->sp", "movtst16", 3, 0xbe, 5, 5, CLR_V_CHG_NZ },
- { "sts", "sp->()", "movtst16", 3, 0xbf, 5, 5, CLR_V_CHG_NZ },
- { "subb", "#,b->b", "sub8", 2, 0xc0, 2, 2, CHG_NZVC },
- { "cmpb", "#,b", "sub8", 2, 0xc1, 2, 2, CHG_NZVC },
- { "sbcb", "#,b->b", "sbc8", 2, 0xc2, 2, 2, CHG_NZVC },
- { "addd", "#,d->d", "add16", 3, 0xc3, 4, 4, CHG_NZVC },
- { "andb", "#,b->b", "and8", 2, 0xc4, 2, 2, CLR_V_CHG_NZ },
- { "bitb", "#,b", "and8", 2, 0xc5, 2, 2, CLR_V_CHG_NZ },
- { "ldab", "#->b", "movtst8", 2, 0xc6, 2, 2, CLR_V_CHG_NZ },
- { "eorb", "#,b->b", "eor8", 2, 0xc8, 2, 2, CLR_V_CHG_NZ },
- { "adcb", "#,b->b", "adc8", 2, 0xc9, 2, 2, CHG_HNZVC },
- { "orab", "#,b->b", "or8", 2, 0xca, 2, 2, CLR_V_CHG_NZ },
- { "addb", "#,b->b", "add8", 2, 0xcb, 2, 2, CHG_HNZVC },
- { "ldd", "#->d", "movtst16", 3, 0xcc, 3, 3, CLR_V_CHG_NZ },
- { "page4",0, "page4", 1, 0xcd, 0, 0, CHG_NONE },
- { "ldx", "#->x", "movtst16", 3, 0xce, 3, 3, CLR_V_CHG_NZ },
- { "stop", 0, 0, 1, 0xcf, 2, 2, CHG_NONE },
- { "subb", "*,b->b", "sub8", 2, 0xd0, 3, 3, CHG_NZVC },
- { "cmpb", "*,b", "sub8", 2, 0xd1, 3, 3, CHG_NZVC },
- { "sbcb", "*,b->b", "sbc8", 2, 0xd2, 3, 3, CHG_NZVC },
- { "addd", "*,d->d", "add16", 2, 0xd3, 5, 5, CHG_NZVC },
- { "andb", "*,b->b", "and8", 2, 0xd4, 3, 3, CLR_V_CHG_NZ },
- { "bitb", "*,b", "and8", 2, 0xd5, 3, 3, CLR_V_CHG_NZ },
- { "ldab", "*->b", "movtst8", 2, 0xd6, 3, 3, CLR_V_CHG_NZ },
- { "stab", "b->*", "movtst8", 2, 0xd7, 3, 3, CLR_V_CHG_NZ },
- { "eorb", "*,b->b", "eor8", 2, 0xd8, 3, 3, CLR_V_CHG_NZ },
- { "adcb", "*,b->b", "adc8", 2, 0xd9, 3, 3, CHG_HNZVC },
- { "orab", "*,b->b", "or8", 2, 0xda, 3, 3, CLR_V_CHG_NZ },
- { "addb", "*,b->b", "add8", 2, 0xdb, 3, 3, CHG_HNZVC },
- { "ldd", "*->d", "movtst16", 2, 0xdc, 4, 4, CLR_V_CHG_NZ },
- { "std", "d->*", "movtst16", 2, 0xdd, 4, 4, CLR_V_CHG_NZ },
- { "ldx", "*->x", "movtst16", 2, 0xde, 4, 4, CLR_V_CHG_NZ },
- { "stx", "x->*", "movtst16", 2, 0xdf, 4, 4, CLR_V_CHG_NZ },
- { "subb", "(x),b->b", "sub8", 2, 0xe0, 4, 4, CHG_NZVC },
- { "cmpb", "(x),b", "sub8", 2, 0xe1, 4, 4, CHG_NZVC },
- { "sbcb", "(x),b->b", "sbc8", 2, 0xe2, 4, 4, CHG_NZVC },
- { "addd", "(x),d->d", "add16", 2, 0xe3, 6, 6, CHG_NZVC },
- { "andb", "(x),b->b", "and8", 2, 0xe4, 4, 4, CLR_V_CHG_NZ },
- { "bitb", "(x),b", "and8", 2, 0xe5, 4, 4, CLR_V_CHG_NZ },
- { "ldab", "(x)->b", "movtst8", 2, 0xe6, 4, 4, CLR_V_CHG_NZ },
- { "stab", "b->(x)", "movtst8", 2, 0xe7, 4, 4, CLR_V_CHG_NZ },
- { "eorb", "(x),b->b", "eor8", 2, 0xe8, 4, 4, CLR_V_CHG_NZ },
- { "adcb", "(x),b->b", "adc8", 2, 0xe9, 4, 4, CHG_HNZVC },
- { "orab", "(x),b->b", "or8", 2, 0xea, 4, 4, CLR_V_CHG_NZ },
- { "addb", "(x),b->b", "add8", 2, 0xeb, 4, 4, CHG_HNZVC },
- { "ldd", "(x)->d", "movtst16", 2, 0xec, 5, 5, CLR_V_CHG_NZ },
- { "std", "d->(x)", "movtst16", 2, 0xed, 5, 5, CLR_V_CHG_NZ },
- { "ldx", "(x)->x", "movtst16", 2, 0xee, 5, 5, CLR_V_CHG_NZ },
- { "stx", "x->(x)", "movtst16", 2, 0xef, 5, 5, CLR_V_CHG_NZ },
- { "subb", "(),b->b", "sub8", 3, 0xf0, 4, 4, CHG_NZVC },
- { "cmpb", "(),b", "sub8", 3, 0xf1, 4, 4, CHG_NZVC },
- { "sbcb", "(),b->b", "sbc8", 3, 0xf2, 4, 4, CHG_NZVC },
- { "addd", "(),d->d", "add16", 3, 0xf3, 6, 6, CHG_NZVC },
- { "andb", "(),b->b", "and8", 3, 0xf4, 4, 4, CLR_V_CHG_NZ },
- { "bitb", "(),b", "and8", 3, 0xf5, 4, 4, CLR_V_CHG_NZ },
- { "ldab", "()->b", "movtst8", 3, 0xf6, 4, 4, CLR_V_CHG_NZ },
- { "stab", "b->()", "movtst8", 3, 0xf7, 4, 4, CLR_V_CHG_NZ },
- { "eorb", "(),b->b", "eor8", 3, 0xf8, 4, 4, CLR_V_CHG_NZ },
- { "adcb", "(),b->b", "eor8", 3, 0xf9, 4, 4, CHG_HNZVC },
- { "orab", "(),b->b", "or8", 3, 0xfa, 4, 4, CLR_V_CHG_NZ },
- { "addb", "(),b->b", "add8", 3, 0xfb, 4, 4, CHG_HNZVC },
- { "ldd", "()->d", "movtst16", 3, 0xfc, 5, 5, CLR_V_CHG_NZ },
- { "std", "d->()", "movtst16", 3, 0xfd, 5, 5, CLR_V_CHG_NZ },
- { "ldx", "()->x", "movtst16", 3, 0xfe, 5, 5, CLR_V_CHG_NZ },
- { "stx", "x->()", "movtst16", 3, 0xff, 5, 5, CLR_V_CHG_NZ }
-};
-
-
-/* Page 2 opcodes */
-/*
- * { "dex", "x->x", "dec16", 1, 0x00, 5, _M, CHG_NONE },
- * Name -+ +----- Insn CCR changes
- * Operands ---+ +------------ Max # cycles
- * Pattern -----------+ +--------------- Min # cycles
- * Size -----------------+ +-------------------- Opcode
- */
-struct m6811_opcode_def m6811_page2_opcodes[] = {
- { "iny", "y->y", "inc16", 2, 0x08, 4, 4, CHG_Z },
- { "dey", "y->y", "dec16", 2, 0x09, 4, 4, CHG_Z },
- { "bset", "(y),#->(y)","or8", 4, 0x1c, 8, 8, CLR_V_CHG_NZ },
- { "bclr", "(y),#->(y)","bclr8", 4, 0x1d, 8, 8, CLR_V_CHG_NZ },
- { "brset","(y),#,r", "brset8", 5, 0x1e, 8, 8, CHG_NONE },
- { "brclr","(y),#,r", "brclr8", 5, 0x1f, 8, 8, CHG_NONE },
- { "tsy", "sp->y", "tsxy16", 2, 0x30, 4, 4, CHG_NONE },
- { "tys", "y->sp", "txys16", 2, 0x35, 4, 4, CHG_NONE },
- { "puly", "(sp)->y", "mov16", 2, 0x38, 6, 6, CHG_NONE },
- { "aby", "b,y->y", "abxy16", 2, 0x3a, 4, 4, CHG_NONE },
- { "pshy", "y->(sp)", "mov16", 2, 0x3c, 5, 5, CHG_NONE },
- { "neg", "(y)->(y)", "neg8", 3, 0x60, 7, 7, CHG_NZVC },
- { "com", "(y)->(y)", "com8", 3, 0x63, 7, 7, SET_C_CLR_V_CHG_NZ},
- { "lsr", "(y)->(y)", "lsr8", 3, 0x64, 7, 7, CLR_V_CHG_ZVC },
- { "ror", "(y)->(y)", "ror8", 3, 0x66, 7, 7, CHG_NZVC },
- { "asr", "(y)->(y)", "asr8", 3, 0x67, 7, 7, CHG_NZVC },
- { "asl", "(y)->(y)", "lsl8", 3, 0x68, 7, 7, CHG_NZVC },
- { "rol", "(y)->(y)", "rol8", 3, 0x69, 7, 7, CHG_NZVC },
- { "dec", "(y)->(y)", "dec8", 3, 0x6a, 7, 7, CHG_NZV },
- { "inc", "(y)->(y)", "inc8", 3, 0x6c, 7, 7, CHG_NZV },
- { "tst", "(y)", "tst8", 3, 0x6d, 7, 7, CLR_V_CHG_NZ },
- { "jmp", "&(y)", "bra", 3, 0x6e, 4, 4, CHG_NONE },
- { "clr", "->(y)", "clr8", 3, 0x6f, 7, 7, SET_Z_CLR_NVC },
- { "cmpy", "#,y", "sub16", 4, 0x8c, 5, 5, CHG_NZVC },
- { "xgdy", "y->y", "xgdxy16", 2, 0x8f, 4, 4, CHG_NONE },
- { "cmpy", "*,y", "sub16", 3, 0x9c, 6, 6, CHG_NZVC },
- { "suba", "(y),a->a", "sub8", 3, 0xa0, 5, 5, CHG_NZVC },
- { "cmpa", "(y),a", "sub8", 3, 0xa1, 5, 5, CHG_NZVC },
- { "sbca", "(y),a->a", "sbc8", 3, 0xa2, 5, 5, CHG_NZVC },
- { "subd", "(y),d->d", "sub16", 3, 0xa3, 7, 7, CHG_NZVC },
- { "anda", "(y),a->a", "and8", 3, 0xa4, 5, 5, CLR_V_CHG_NZ },
- { "bita", "(y),a", "and8", 3, 0xa5, 5, 5, CLR_V_CHG_NZ },
- { "ldaa", "(y)->a", "movtst8", 3, 0xa6, 5, 5, CLR_V_CHG_NZ },
- { "staa", "a->(y)", "movtst8", 3, 0xa7, 5, 5, CLR_V_CHG_NZ },
- { "eora", "(y),a->a", "eor8", 3, 0xa8, 5, 5, CLR_V_CHG_NZ },
- { "adca", "(y),a->a", "adc8", 3, 0xa9, 5, 5, CHG_HNZVC },
- { "oraa", "(y),a->a", "or8", 3, 0xaa, 5, 5, CLR_V_CHG_NZ },
- { "adda", "(y),a->a", "add8", 3, 0xab, 5, 5, CHG_HNZVC },
- { "cmpy", "(y),y", "sub16", 3, 0xac, 7, 7, CHG_NZVC },
- { "jsr", "&(y)", "jsr_11_16", 3, 0xad, 6, 6, CHG_NONE },
- { "lds", "(y)->sp", "movtst16", 3, 0xae, 6, 6, CLR_V_CHG_NZ },
- { "sts", "sp->(y)", "movtst16", 3, 0xaf, 6, 6, CLR_V_CHG_NZ },
- { "cmpy", "(),y", "sub16", 4, 0xbc, 7, 7, CHG_NZVC },
- { "ldy", "#->y", "movtst16", 4, 0xce, 4, 4, CLR_V_CHG_NZ },
- { "ldy", "*->y", "movtst16", 3, 0xde, 5, 5, CLR_V_CHG_NZ },
- { "sty", "y->*", "movtst16", 3, 0xdf, 5, 5, CLR_V_CHG_NZ },
- { "subb", "(y),b->b", "sub8", 3, 0xe0, 5, 5, CHG_NZVC },
- { "cmpb", "(y),b", "sub8", 3, 0xe1, 5, 5, CHG_NZVC },
- { "sbcb", "(y),b->b", "sbc8", 3, 0xe2, 5, 5, CHG_NZVC },
- { "addd", "(y),d->d", "add16", 3, 0xe3, 7, 7, CHG_NZVC },
- { "andb", "(y),b->b", "and8", 3, 0xe4, 5, 5, CLR_V_CHG_NZ },
- { "bitb", "(y),b", "and8", 3, 0xe5, 5, 5, CLR_V_CHG_NZ },
- { "ldab", "(y)->b", "movtst8", 3, 0xe6, 5, 5, CLR_V_CHG_NZ },
- { "stab", "b->(y)", "movtst8", 3, 0xe7, 5, 5, CLR_V_CHG_NZ },
- { "eorb", "(y),b->b", "eor8", 3, 0xe8, 5, 5, CLR_V_CHG_NZ },
- { "adcb", "(y),b->b", "adc8", 3, 0xe9, 5, 5, CHG_HNZVC },
- { "orab", "(y),b->b", "or8", 3, 0xea, 5, 5, CLR_V_CHG_NZ },
- { "addb", "(y),b->b", "add8", 3, 0xeb, 5, 5, CHG_HNZVC },
- { "ldd", "(y)->d", "movtst16", 3, 0xec, 6, 6, CLR_V_CHG_NZ },
- { "std", "d->(y)", "movtst16", 3, 0xed, 6, 6, CLR_V_CHG_NZ },
- { "ldy", "(y)->y", "movtst16", 3, 0xee, 6, 6, CLR_V_CHG_NZ },
- { "sty", "y->(y)", "movtst16", 3, 0xef, 6, 6, CLR_V_CHG_NZ },
- { "ldy", "()->y", "movtst16", 4, 0xfe, 6, 6, CLR_V_CHG_NZ },
- { "sty", "y->()", "movtst16", 4, 0xff, 6, 6, CLR_V_CHG_NZ }
-};
-
-/* Page 3 opcodes */
-/*
- * { "dex", "x->x", "dec16", 1, 0x00, 5, _M, CHG_NONE },
- * Name -+ +----- Insn CCR changes
- * Operands ---+ +------------ Max # cycles
- * Pattern -----------+ +--------------- Min # cycles
- * Size -----------------+ +-------------------- Opcode
- */
-struct m6811_opcode_def m6811_page3_opcodes[] = {
- { "cmpd", "#,d", "sub16", 4, 0x83, 5, 5, CHG_NZVC },
- { "cmpd", "*,d", "sub16", 3, 0x93, 6, 6, CHG_NZVC },
- { "cmpd", "(x),d", "sub16", 3, 0xa3, 7, 7, CHG_NZVC },
- { "cmpy", "(x),y", "sub16", 3, 0xac, 7, 7, CHG_NZVC },
- { "cmpd", "(),d", "sub16", 4, 0xb3, 7, 7, CHG_NZVC },
- { "ldy", "(x)->y", "movtst16", 3, 0xee, 6, 6, CLR_V_CHG_NZ },
- { "sty", "y->(x)", "movtst16", 3, 0xef, 6, 6, CLR_V_CHG_NZ }
-};
-
-/* Page 4 opcodes */
-/*
- * { "dex", "x->x", "dec16", 1, 0x00, 5, _M, CHG_NONE },
- * Name -+ +----- Insn CCR changes
- * Operands ---+ +------------ Max # cycles
- * Pattern -----------+ +--------------- Min # cycles
- * Size -----------------+ +-------------------- Opcode
- */
-struct m6811_opcode_def m6811_page4_opcodes[] = {
- { "syscall", "", "syscall", 2, 0x03, 6, 6, CHG_NONE },
- { "cmpd", "(y),d", "sub16", 3, 0xa3, 7, 7, CHG_NZVC },
- { "cmpx", "(y),x", "sub16", 3, 0xac, 7, 7, CHG_NZVC },
- { "ldx", "(y)->x", "movtst16", 3, 0xee, 6, 6, CLR_V_CHG_NZ },
- { "stx", "x->(y)", "movtst16", 3, 0xef, 6, 6, CLR_V_CHG_NZ }
-};
-
-/* 68HC12 opcodes */
-/*
- * { "dex", "x->x", "dec16", 1, 0x00, 5, _M, CHG_NONE },
- * Name -+ +----- Insn CCR changes
- * Operands ---+ +------------ Max # cycles
- * Pattern -----------+ +--------------- Min # cycles
- * Size -----------------+ +-------------------- Opcode
- */
-struct m6811_opcode_def m6812_page1_opcodes[] = {
- { "adca", "#,a->a", "adc8", 2, 0x89, 1, 1, CHG_HNZVC },
- { "adca", "*,a->a", "adc8", 2, 0x99, 3, 3, CHG_HNZVC },
- { "adca", "(),a->a", "adc8", 3, 0xb9, 3, 3, CHG_HNZVC },
- { "adca", "[],a->a", "adc8", 2, 0xa9, 3, 3, CHG_HNZVC },
-
- { "adcb", "#,b->b", "adc8", 2, 0xc9, 1, 1, CHG_HNZVC },
- { "adcb", "*,b->b", "adc8", 3, 0xd9, 3, 3, CHG_HNZVC },
- { "adcb", "(),b->b", "adc8", 3, 0xf9, 3, 3, CHG_HNZVC },
- { "adcb", "[],b->b", "adc8", 2, 0xe9, 3, 3, CHG_HNZVC },
-
- { "adda", "#,a->a", "add8", 2, 0x8b, 1, 1, CHG_HNZVC },
- { "adda", "*,a->a", "add8", 3, 0x9b, 3, 3, CHG_HNZVC },
- { "adda", "(),a->a", "add8", 3, 0xbb, 3, 3, CHG_HNZVC },
- { "adda", "[],a->a", "add8", 2, 0xab, 3, 3, CHG_HNZVC },
-
- { "addb", "#,b->b", "add8", 2, 0xcb, 1, 1, CHG_HNZVC },
- { "addb", "*,b->b", "add8", 3, 0xdb, 3, 3, CHG_HNZVC },
- { "addb", "(),b->b", "add8", 3, 0xfb, 3, 3, CHG_HNZVC },
- { "addb", "[],b->b", "add8", 2, 0xeb, 3, 3, CHG_HNZVC },
-
- { "addd", "#,d->d", "add16", 3, 0xc3, 2, 2, CHG_NZVC },
- { "addd", "*,d->d", "add16", 2, 0xd3, 3, 3, CHG_NZVC },
- { "addd", "(),d->d", "add16", 3, 0xf3, 3, 3, CHG_NZVC },
- { "addd", "[],d->d", "add16", 2, 0xe3, 3, 3, CHG_NZVC },
-
- { "anda", "#,a->a", "and8", 2, 0x84, 1, 1, CLR_V_CHG_NZ },
- { "anda", "*,a->a", "and8", 2, 0x94, 3, 3, CLR_V_CHG_NZ },
- { "anda", "(),a->a", "and8", 3, 0xb4, 3, 3, CLR_V_CHG_NZ },
- { "anda", "[],a->a", "and8", 2, 0xa4, 3, 3, CLR_V_CHG_NZ },
-
- { "andb", "#,b->b", "and8", 2, 0xc4, 1, 1, CLR_V_CHG_NZ },
- { "andb", "*,b->b", "and8", 2, 0xd4, 3, 3, CLR_V_CHG_NZ },
- { "andb", "(),b->b", "and8", 3, 0xf4, 3, 3, CLR_V_CHG_NZ },
- { "andb", "[],b->b", "and8", 2, 0xe4, 3, 3, CLR_V_CHG_NZ },
-
- { "andcc", "#,ccr->ccr", "and8", 2, 0x10, 1, 1, CHG_ALL },
-
- { "asl", "()->()", "lsl8", 3, 0x78, 4, 4, CHG_NZVC },
- { "asl", "[]->[]", "lsl8", 2, 0x68, 3, 3, CHG_NZVC },
-
- { "asla", "a->a", "lsl8", 1, 0x48, 1, 1, CHG_NZVC },
- { "aslb", "b->b", "lsl8", 1, 0x58, 1, 1, CHG_NZVC },
- { "asld", "d->d", "lsl16", 1, 0x59, 1, 1, CHG_NZVC },
-
- { "asr", "()->()", "asr8", 3, 0x77, 4, 4, CHG_NZVC },
- { "asr", "[]->[]", "asr8", 2, 0x67, 3, 3, CHG_NZVC },
-
- { "asra", "a->a", "asr8", 1, 0x47, 1, 1, CHG_NZVC },
- { "asrb", "b->b", "asr8", 1, 0x57, 1, 1, CHG_NZVC },
-
- { "bcc", "r", 0, 2, 0x24, 1, 3, CHG_NONE },
-
- { "bclr", "*,#->*", "bclr8", 3, 0x4d, 4, 4, CLR_V_CHG_NZ },
- { "bclr", "(),#->()", "bclr8", 4, 0x1d, 4, 4, CLR_V_CHG_NZ },
- { "bclr", "[],#->[]", "bclr8", 3, 0x0d, 4, 4, CLR_V_CHG_NZ },
-
- { "bcs", "r", 0, 2, 0x25, 1, 3, CHG_NONE },
- { "beq", "r", 0, 2, 0x27, 1, 3, CHG_NONE },
- { "bge", "r", 0, 2, 0x2c, 1, 3, CHG_NONE },
-
- { "bgnd", 0, 0, 1, 0x00, 5, 5, CHG_NONE },
-
- { "bgt", "r", 0, 2, 0x2e, 1, 3, CHG_NONE },
- { "bhi", "r", 0, 2, 0x22, 1, 3, CHG_NONE },
-
- { "bita", "#,a", "and8", 2, 0x85, 1, 1, CLR_V_CHG_NZ },
- { "bita", "*,a", "and8", 2, 0x95, 3, 3, CLR_V_CHG_NZ },
- { "bita", "(),a", "and8", 3, 0xb5, 3, 3, CLR_V_CHG_NZ },
- { "bita", "[],a", "and8", 2, 0xa5, 3, 3, CLR_V_CHG_NZ },
-
- { "bitb", "#,b", "and8", 2, 0xc5, 1, 1, CLR_V_CHG_NZ },
- { "bitb", "*,b", "and8", 2, 0xd5, 3, 3, CLR_V_CHG_NZ },
- { "bitb", "(),b", "and8", 3, 0xf5, 3, 3, CLR_V_CHG_NZ },
- { "bitb", "[],b", "and8", 2, 0xe5, 3, 3, CLR_V_CHG_NZ },
-
- { "ble", "r", 0, 2, 0x2f, 1, 3, CHG_NONE },
- { "bls", "r", 0, 2, 0x23, 1, 3, CHG_NONE },
- { "blt", "r", 0, 2, 0x2d, 1, 3, CHG_NONE },
- { "bmi", "r", 0, 2, 0x2b, 1, 3, CHG_NONE },
- { "bne", "r", 0, 2, 0x26, 1, 3, CHG_NONE },
- { "bpl", "r", 0, 2, 0x2a, 1, 3, CHG_NONE },
- { "bra", "r", 0, 2, 0x20, 1, 3, CHG_NONE },
-
- { "brclr", "*,#,r", "brclr8", 4, 0x4f, 4, 4, CHG_NONE },
- { "brclr", "(),#,r", "brclr8", 5, 0x1f, 5, 5, CHG_NONE },
- { "brclr", "[],#,r", "brclr8", 4, 0x0f, 4, 4, CHG_NONE },
-
- { "brn", "r", "nop", 2, 0x21, 1, 3, CHG_NONE },
-
- { "brset", "*,#,r", "brset8", 4, 0x4e, 4, 4, CHG_NONE },
- { "brset", "(),#,r", "brset8", 5, 0x1e, 5, 5, CHG_NONE },
- { "brset", "[],#,r", "brset8", 4, 0x0e, 4, 4, CHG_NONE },
-
- { "bset", "*,#->*", "or8", 3, 0x4c, 4, 4, CLR_V_CHG_NZ },
- { "bset", "(),#->()", "or8", 4, 0x1c, 4, 4, CLR_V_CHG_NZ },
- { "bset", "[],#->[]", "or8", 3, 0x0c, 4, 4, CLR_V_CHG_NZ },
-
- { "bsr", "r", "jsr_12_16", 2, 0x07, 4, 4, CHG_NONE },
-
- { "bvc", "r", 0, 2, 0x28, 1, 3, CHG_NONE },
- { "bvs", "r", 0, 2, 0x29, 1, 3, CHG_NONE },
-
- { "call", "()", "call8", 4, 0x4a, 8, 8, CHG_NONE },
- { "call", "[]", "call8", 2, 0x4b, 8, 8, CHG_NONE },
-
- { "clr", "->()", "clr8", 3, 0x79, 3, 3, SET_Z_CLR_NVC },
- { "clr", "->[]", "clr8", 2, 0x69, 2, 2, SET_Z_CLR_NVC },
-
- { "clra", "->a", "clr8", 1, 0x87, 1, 1, SET_Z_CLR_NVC },
- { "clrb", "->b", "clr8", 1, 0xc7, 1, 1, SET_Z_CLR_NVC },
-
- { "cpa", "#,a", "sub8", 2, 0x81, 1, 1, CHG_NZVC },
- { "cpa", "*,a", "sub8", 2, 0x91, 3, 3, CHG_NZVC },
- { "cpa", "(),a", "sub8", 3, 0xb1, 3, 3, CHG_NZVC },
- { "cpa", "[],a", "sub8", 2, 0xa1, 3, 3, CHG_NZVC },
-
- { "cpb", "#,b", "sub8", 2, 0xc1, 1, 1, CHG_NZVC },
- { "cpb", "*,b", "sub8", 2, 0xd1, 3, 3, CHG_NZVC },
- { "cpb", "(),b", "sub8", 3, 0xf1, 3, 3, CHG_NZVC },
- { "cpb", "[],b", "sub8", 2, 0xe1, 3, 3, CHG_NZVC },
-
- { "com", "()->()", "com8", 3, 0x71, 4, 4, SET_C_CLR_V_CHG_NZ },
- { "com", "[]->[]", "com8", 2, 0x61, 3, 3, SET_C_CLR_V_CHG_NZ },
-
- { "coma", "a->a", "com8", 1, 0x41, 1, 1, SET_C_CLR_V_CHG_NZ },
- { "comb", "b->b", "com8", 1, 0x51, 1, 1, SET_C_CLR_V_CHG_NZ },
-
- { "cpd", "#,d", "sub16", 3, 0x8c, 2, 2, CHG_NZVC },
- { "cpd", "*,d", "sub16", 2, 0x9c, 3, 3, CHG_NZVC },
- { "cpd", "(),d", "sub16", 3, 0xbc, 3, 3, CHG_NZVC },
- { "cpd", "[],d", "sub16", 2, 0xac, 3, 3, CHG_NZVC },
-
- { "cps", "#,sp", "sub16", 3, 0x8f, 2, 2, CHG_NZVC },
- { "cps", "*,sp", "sub16", 2, 0x9f, 3, 3, CHG_NZVC },
- { "cps", "(),sp", "sub16", 3, 0xbf, 3, 3, CHG_NZVC },
- { "cps", "[],sp", "sub16", 2, 0xaf, 3, 3, CHG_NZVC },
-
- { "cpx", "#,x", "sub16", 3, 0x8e, 2, 2, CHG_NZVC },
- { "cpx", "*,x", "sub16", 2, 0x9e, 3, 3, CHG_NZVC },
- { "cpx", "(),x", "sub16", 3, 0xbe, 3, 3, CHG_NZVC },
- { "cpx", "[],x", "sub16", 2, 0xae, 3, 3, CHG_NZVC },
-
- { "cpy", "#,y", "sub16", 3, 0x8d, 2, 2, CHG_NZVC },
- { "cpy", "*,y", "sub16", 2, 0x9d, 3, 3, CHG_NZVC },
- { "cpy", "(),y", "sub16", 3, 0xbd, 3, 3, CHG_NZVC },
- { "cpy", "[],y", "sub16", 2, 0xad, 3, 3, CHG_NZVC },
-
- /* dbeq, dbne, ibeq, ibne, tbeq, tbne */
- { "dbeq", 0, "dbcc8", 3, 0x04, 3, 3, CHG_NONE },
-
- { "dec", "()->()", "dec8", 3, 0x73, 4, 4, CHG_NZV },
- { "dec", "[]->[]", "dec8", 2, 0x63, 3, 3, CHG_NZV },
-
- { "deca", "a->a", "dec8", 1, 0x43, 1, 1, CHG_NZV },
- { "decb", "b->b", "dec8", 1, 0x53, 1, 1, CHG_NZV },
-
- { "dex", "x->x", "dec16", 1, 0x09, 1, 1, CHG_Z },
- { "dey", "y->y", "dec16", 1, 0x03, 1, 1, CHG_Z },
-
- { "ediv", 0, 0, 1, 0x11, 11, 11, CHG_NZVC },
- { "emul", 0, 0, 1, 0x13, 3, 3, CHG_NZC },
-
- { "eora", "#,a->a", "eor8", 2, 0x88, 1, 1, CLR_V_CHG_NZ },
- { "eora", "*,a->a", "eor8", 2, 0x98, 3, 3, CLR_V_CHG_NZ },
- { "eora", "(),a->a", "eor8", 3, 0xb8, 3, 3, CLR_V_CHG_NZ },
- { "eora", "[],a->a", "eor8", 2, 0xa8, 3, 3, CLR_V_CHG_NZ },
-
- { "eorb", "#,b->b", "eor8", 2, 0xc8, 1, 1, CLR_V_CHG_NZ },
- { "eorb", "*,b->b", "eor8", 2, 0xd8, 3, 3, CLR_V_CHG_NZ },
- { "eorb", "(),b->b", "eor8", 3, 0xf8, 3, 3, CLR_V_CHG_NZ },
- { "eorb", "[],b->b", "eor8", 2, 0xe8, 3, 3, CLR_V_CHG_NZ },
-
- /* exg, sex, tfr */
- { "exg", "#", "exg8", 2, 0xb7, 1, 1, CHG_NONE },
-
- { "inc", "()->()", "inc8", 3, 0x72, 4, 4, CHG_NZV },
- { "inc", "[]->[]", "inc8", 2, 0x62, 3, 3, CHG_NZV },
-
- { "inca", "a->a", "inc8", 1, 0x42, 1, 1, CHG_NZV },
- { "incb", "b->b", "inc8", 1, 0x52, 1, 1, CHG_NZV },
-
- { "inx", "x->x", "inc16", 1, 0x08, 1, 1, CHG_Z },
- { "iny", "y->y", "inc16", 1, 0x02, 1, 1, CHG_Z },
-
- { "jmp", "&()", "bra", 3, 0x06, 3, 3, CHG_NONE },
- { "jmp", "&[]", "bra", 2, 0x05, 3, 3, CHG_NONE },
-
- { "jsr", "*", "jsr_12_16", 2, 0x17, 4, 4, CHG_NONE },
- { "jsr", "&()", "jsr_12_16", 3, 0x16, 4, 4, CHG_NONE },
- { "jsr", "&[]", "jsr_12_16", 2, 0x15, 4, 4, CHG_NONE },
-
- { "ldaa", "#->a", "movtst8", 2, 0x86, 1, 1, CLR_V_CHG_NZ },
- { "ldaa", "*->a", "movtst8", 2, 0x96, 3, 3, CLR_V_CHG_NZ },
- { "ldaa", "()->a", "movtst8", 3, 0xb6, 3, 3, CLR_V_CHG_NZ },
- { "ldaa", "[]->a", "movtst8", 2, 0xa6, 3, 3, CLR_V_CHG_NZ },
-
- { "ldab", "#->b", "movtst8", 2, 0xc6, 1, 1, CLR_V_CHG_NZ },
- { "ldab", "*->b", "movtst8", 2, 0xd6, 3, 3, CLR_V_CHG_NZ },
- { "ldab", "()->b", "movtst8", 3, 0xf6, 3, 3, CLR_V_CHG_NZ },
- { "ldab", "[]->b", "movtst8", 2, 0xe6, 3, 3, CLR_V_CHG_NZ },
-
- { "ldd", "#->d", "movtst16", 3, 0xcc, 2, 2, CLR_V_CHG_NZ },
- { "ldd", "*->d", "movtst16", 2, 0xdc, 3, 3, CLR_V_CHG_NZ },
- { "ldd", "()->d", "movtst16", 3, 0xfc, 3, 3, CLR_V_CHG_NZ },
- { "ldd", "[]->d", "movtst16", 2, 0xec, 3, 3, CLR_V_CHG_NZ },
-
- { "lds", "#->sp", "movtst16", 3, 0xcf, 2, 2, CLR_V_CHG_NZ },
- { "lds", "*->sp", "movtst16", 2, 0xdf, 3, 3, CLR_V_CHG_NZ },
- { "lds", "()->sp", "movtst16", 3, 0xff, 3, 3, CLR_V_CHG_NZ },
- { "lds", "[]->sp", "movtst16", 2, 0xef, 3, 3, CLR_V_CHG_NZ },
-
- { "ldx", "#->x", "movtst16", 3, 0xce, 2, 2, CLR_V_CHG_NZ },
- { "ldx", "*->x", "movtst16", 2, 0xde, 3, 3, CLR_V_CHG_NZ },
- { "ldx", "()->x", "movtst16", 3, 0xfe, 3, 3, CLR_V_CHG_NZ },
- { "ldx", "[]->x", "movtst16", 2, 0xee, 3, 3, CLR_V_CHG_NZ },
-
- { "ldy", "#->y", "movtst16", 3, 0xcd, 2, 2, CLR_V_CHG_NZ },
- { "ldy", "*->y", "movtst16", 2, 0xdd, 3, 3, CLR_V_CHG_NZ },
- { "ldy", "()->y", "movtst16", 3, 0xfd, 3, 3, CLR_V_CHG_NZ },
- { "ldy", "[]->y", "movtst16", 2, 0xed, 3, 3, CLR_V_CHG_NZ },
-
- { "leas", "&[]->sp", "lea16", 2, 0x1b, 2, 2, CHG_NONE },
- { "leax", "&[]->x", "lea16", 2, 0x1a, 2, 2, CHG_NONE },
- { "leay", "&[]->y", "lea16", 2, 0x19, 2, 2, CHG_NONE },
-
- { "lsr", "()->()", "lsr8", 3, 0x74, 4, 4, CLR_N_CHG_ZVC },
- { "lsr", "[]->[]", "lsr8", 2, 0x64, 3, 3, CLR_N_CHG_ZVC },
-
- { "lsra", "a->a", "lsr8", 1, 0x44, 1, 1, CLR_N_CHG_ZVC },
- { "lsrb", "b->b", "lsr8", 1, 0x54, 1, 1, CLR_N_CHG_ZVC },
- { "lsrd", "d->d", "lsr16", 1, 0x49, 1, 1, CLR_N_CHG_ZVC },
-
- { "mem", 0, 0, 1, 0x01, 5, 5, CHG_HNZVC },
-
- { "mul", "b,a->d", "mul16", 1, 0x12, 3, 3, CHG_C },
-
- { "neg", "()->()", "neg8", 3, 0x70, 4, 4, CHG_NZVC },
- { "neg", "[]->[]", "neg8", 2, 0x60, 3, 3, CHG_NZVC },
-
- { "nega", "a->a", "neg8", 1, 0x40, 1, 1, CHG_NZVC },
- { "negb", "b->b", "neg8", 1, 0x50, 1, 1, CHG_NZVC },
-
- { "nop", "", "nop", 1, 0xa7, 1, 1, CHG_NONE },
-
- { "oraa", "#,a->a", "or8", 2, 0x8a, 1, 1, CLR_V_CHG_NZ },
- { "oraa", "*,a->a", "or8", 2, 0x9a, 3, 3, CLR_V_CHG_NZ },
- { "oraa", "(),a->a", "or8", 3, 0xba, 3, 3, CLR_V_CHG_NZ },
- { "oraa", "[],a->a", "or8", 2, 0xaa, 3, 3, CLR_V_CHG_NZ },
-
- { "orab", "#,b->b", "or8", 2, 0xca, 1, 1, CLR_V_CHG_NZ },
- { "orab", "*,b->b", "or8", 2, 0xda, 3, 3, CLR_V_CHG_NZ },
- { "orab", "(),b->b", "or8", 3, 0xfa, 3, 3, CLR_V_CHG_NZ },
- { "orab", "[],b->b", "or8", 2, 0xea, 3, 3, CLR_V_CHG_NZ },
-
- { "orcc", "#,ccr->ccr", "or8", 2, 0x14, 1, 1, CHG_ALL },
-
- { "page2", 0, "page2", 1, 0x18, 0, 0, CHG_NONE },
-
- { "psha", "a->(sp)", "mov8", 1, 0x36, 2, 2, CHG_NONE },
- { "pshb", "b->(sp)", "mov8", 1, 0x37, 2, 2, CHG_NONE },
- { "pshc", "ccr->(sp)", "mov8", 1, 0x39, 2, 2, CHG_NONE },
- { "pshd", "d->(sp)", "mov16", 1, 0x3b, 2, 2, CHG_NONE },
- { "pshx", "x->(sp)", "mov16", 1, 0x34, 2, 2, CHG_NONE },
- { "pshy", "y->(sp)", "mov16", 1, 0x35, 2, 2, CHG_NONE },
-
- { "pula", "(sp)->a", "mov8", 1, 0x32, 3, 3, CHG_NONE },
- { "pulb", "(sp)->b", "mov8", 1, 0x33, 3, 3, CHG_NONE },
- { "pulc", "(sp)->ccr", "mov8", 1, 0x38, 3, 3, CHG_ALL },
- { "puld", "(sp)->d", "mov16", 1, 0x3a, 3, 3, CHG_NONE },
- { "pulx", "(sp)->x", "mov16", 1, 0x30, 3, 3, CHG_NONE },
- { "puly", "(sp)->y", "mov16", 1, 0x31, 3, 3, CHG_NONE },
-
- { "rol", "()->()", "rol8", 3, 0x75, 4, 4, CHG_NZVC },
- { "rol", "[]->[]", "rol8", 2, 0x65, 3, 3, CHG_NZVC },
-
- { "rola", "a->a", "rol8", 1, 0x45, 1, 1, CHG_NZVC },
- { "rolb", "b->b", "rol8", 1, 0x55, 1, 1, CHG_NZVC },
-
- { "ror", "()->()", "ror8", 3, 0x76, 4, 4, CHG_NZVC },
- { "ror", "[]->[]", "ror8", 2, 0x66, 3, 3, CHG_NZVC },
-
- { "rora", "a->a", "ror8", 1, 0x46, 1, 1, CHG_NZVC },
- { "rorb", "b->b", "ror8", 1, 0x56, 1, 1, CHG_NZVC },
-
- { "rtc", 0, 0, 1, 0x0a, 6, 6, CHG_NONE },
- { "rti", 0, "rti12", 1, 0x0b, 8, 10, CHG_ALL},
- { "rts", 0, "rts12", 1, 0x3d, 5, 5, CHG_NONE },
-
- { "sbca", "#,a->a", "sbc8", 2, 0x82, 1, 1, CHG_NZVC },
- { "sbca", "*,a->a", "sbc8", 2, 0x92, 3, 3, CHG_NZVC },
- { "sbca", "(),a->a", "sbc8", 3, 0xb2, 3, 3, CHG_NZVC },
- { "sbca", "[],a->a", "sbc8", 2, 0xa2, 3, 3, CHG_NZVC },
-
- { "sbcb", "#,b->b", "sbc8", 2, 0xc2, 1, 1, CHG_NZVC },
- { "sbcb", "*,b->b", "sbc8", 2, 0xd2, 3, 3, CHG_NZVC },
- { "sbcb", "(),b->b", "sbc8", 3, 0xf2, 3, 3, CHG_NZVC },
- { "sbcb", "[],b->b", "sbc8", 2, 0xe2, 3, 3, CHG_NZVC },
-
- { "staa", "a->*", "movtst8", 2, 0x5a, 2, 2, CLR_V_CHG_NZ },
- { "staa", "a->()", "movtst8", 3, 0x7a, 3, 3, CLR_V_CHG_NZ },
- { "staa", "a->[]", "movtst8", 2, 0x6a, 2, 2, CLR_V_CHG_NZ },
-
- { "stab", "b->*", "movtst8", 2, 0x5b, 2, 2, CLR_V_CHG_NZ },
- { "stab", "b->()", "movtst8", 3, 0x7b, 3, 3, CLR_V_CHG_NZ },
- { "stab", "b->[]", "movtst8", 2, 0x6b, 2, 2, CLR_V_CHG_NZ },
-
- { "std", "d->*", "movtst16", 2, 0x5c, 2, 2, CLR_V_CHG_NZ },
- { "std", "d->()", "movtst16", 3, 0x7c, 3, 3, CLR_V_CHG_NZ },
- { "std", "d->[]", "movtst16", 2, 0x6c, 2, 2, CLR_V_CHG_NZ },
-
- { "sts", "sp->*", "movtst16", 2, 0x5f, 2, 2, CLR_V_CHG_NZ },
- { "sts", "sp->()", "movtst16", 3, 0x7f, 3, 3, CLR_V_CHG_NZ },
- { "sts", "sp->[]", "movtst16", 2, 0x6f, 2, 2, CLR_V_CHG_NZ },
-
- { "stx", "x->*", "movtst16", 2, 0x5e, 2, 2, CLR_V_CHG_NZ },
- { "stx", "x->()", "movtst16", 3, 0x7e, 3, 3, CLR_V_CHG_NZ },
- { "stx", "x->[]", "movtst16", 2, 0x6e, 2, 2, CLR_V_CHG_NZ },
-
- { "sty", "y->*", "movtst16", 2, 0x5d, 2, 2, CLR_V_CHG_NZ },
- { "sty", "y->()", "movtst16", 3, 0x7d, 3, 3, CLR_V_CHG_NZ },
- { "sty", "y->[]", "movtst16", 2, 0x6d, 2, 2, CLR_V_CHG_NZ },
-
- { "suba", "#,a->a", "sub8", 2, 0x80, 1, 1, CHG_NZVC },
- { "suba", "*,a->a", "sub8", 2, 0x90, 3, 3, CHG_NZVC },
- { "suba", "(),a->a", "sub8", 3, 0xb0, 3, 3, CHG_NZVC },
- { "suba", "[],a->a", "sub8", 2, 0xa0, 3, 3, CHG_NZVC },
-
- { "subb", "#,b->b", "sub8", 2, 0xc0, 1, 1, CHG_NZVC },
- { "subb", "*,b->b", "sub8", 2, 0xd0, 3, 3, CHG_NZVC },
- { "subb", "(),b->b", "sub8", 3, 0xf0, 3, 3, CHG_NZVC },
- { "subb", "[],b->b", "sub8", 2, 0xe0, 3, 3, CHG_NZVC },
-
- { "subd", "#,d->d", "sub16", 3, 0x83, 2, 2, CHG_NZVC },
- { "subd", "*,d->d", "sub16", 2, 0x93, 3, 3, CHG_NZVC },
- { "subd", "(),d->d", "sub16", 3, 0xb3, 3, 3, CHG_NZVC },
- { "subd", "[],d->d", "sub16", 2, 0xa3, 3, 3, CHG_NZVC },
-
- { "swi", 0, 0, 1, 0x3f, 9, 9, CHG_NONE },
-
- { "tst", "()", "tst8", 3, 0xf7, 3, 3, CLR_VC_CHG_NZ },
- { "tst", "[]", "tst8", 2, 0xe7, 3, 3, CLR_VC_CHG_NZ },
-
- { "tsta", "a", "tst8", 1, 0x97, 1, 1, CLR_VC_CHG_NZ },
- { "tstb", "b", "tst8", 1, 0xd7, 1, 1, CLR_VC_CHG_NZ },
-
- { "wai", 0, 0, 1, 0x3e, 8, _M, CHG_NONE }
-};
-
-struct m6811_opcode_def m6812_page2_opcodes[] = {
- { "cba", "b,a", "sub8", 2, 0x17, 2, 2, CHG_NZVC },
-
- /* After 'daa', the Z flag is undefined. Mark it as changed. */
- { "daa", 0, "daa8", 2, 0x07, 3, 3, CHG_NZVC },
-
- { "edivs", 0, 0, 2, 0x14, 12, 12, CHG_NZVC },
- { "emacs", 0, 0, 2, 0x12, 13, 13, CHG_NZVC },
-
- { "emaxd", "[],d->d", "max16", 3, 0x1a, 4, 4, CHG_NZVC },
- { "emaxm", "[],d->[]", "max16", 3, 0x1e, 4, 4, CHG_NZVC },
- { "emind", "[],d->d", "min16", 3, 0x1b, 4, 4, CHG_NZVC },
- { "eminm", "[],d->[]", "min16", 3, 0x1f, 4, 4, CHG_NZVC },
-
- { "emuls", 0, 0, 2, 0x13, 3, 3, CHG_NZC },
- { "etbl", "[]", "tbl16", 3, 0x3f, 10, 10, CHG_NZC },
- { "fdiv", "x,d->x", "fdiv16", 2, 0x11, 12, 12, CHG_ZVC },
- { "idiv", "x,d->x", "idiv16", 2, 0x10, 12, 12, CLR_V_CHG_ZC },
- { "idivs", 0, 0, 2, 0x15, 12, 12, CHG_NZVC },
-
- { "lbcc", "R", "bcc", 4, 0x24, 3, 4, CHG_NONE },
- { "lbcs", "R", "bcs", 4, 0x25, 3, 4, CHG_NONE },
- { "lbeq", "R", "beq", 4, 0x27, 3, 4, CHG_NONE },
- { "lbge", "R", "bge", 4, 0x2c, 3, 4, CHG_NONE },
- { "lbgt", "R", "bgt", 4, 0x2e, 3, 4, CHG_NONE },
- { "lbhi", "R", "bhi", 4, 0x22, 3, 4, CHG_NONE },
- { "lble", "R", "ble", 4, 0x2f, 3, 4, CHG_NONE },
- { "lbls", "R", "bls", 4, 0x23, 3, 4, CHG_NONE },
- { "lblt", "R", "blt", 4, 0x2d, 3, 4, CHG_NONE },
- { "lbmi", "R", "bmi", 4, 0x2b, 3, 4, CHG_NONE },
- { "lbne", "R", "bne", 4, 0x26, 3, 4, CHG_NONE },
- { "lbpl", "R", "bpl", 4, 0x2a, 3, 4, CHG_NONE },
- { "lbra", "R", "bra", 4, 0x20, 4, 4, CHG_NONE },
- { "lbrn", "R", "nop", 4, 0x21, 3, 3, CHG_NONE },
- { "lbvc", "R", "bvc", 4, 0x28, 3, 4, CHG_NONE },
- { "lbvs", "R", "bvs", 4, 0x29, 3, 4, CHG_NONE },
-
- { "maxa", "[],a->a", "max8", 3, 0x18, 4, 4, CHG_NZVC },
- { "maxm", "[],a->[]", "max8", 3, 0x1c, 4, 4, CHG_NZVC },
- { "mina", "[],a->a", "min8", 3, 0x19, 4, 4, CHG_NZVC },
- { "minm", "[],a->[]", "min8", 3, 0x1d, 4, 4, CHG_NZVC },
-
- { "movb", 0, "move8", 5, 0x0b, 4, 4, CHG_NONE },
- { "movb", 0, "move8", 4, 0x08, 4, 4, CHG_NONE },
- { "movb", 0, "move8", 6, 0x0c, 6, 6, CHG_NONE },
- { "movb", 0, "move8", 5, 0x09, 5, 5, CHG_NONE },
- { "movb", 0, "move8", 5, 0x0d, 5, 5, CHG_NONE },
- { "movb", 0, "move8", 4, 0x0a, 5, 5, CHG_NONE },
-
- { "movw", 0, "move16", 6, 0x03, 5, 5, CHG_NONE },
- { "movw", 0, "move16", 5, 0x00, 4, 4, CHG_NONE },
- { "movw", 0, "move16", 6, 0x04, 6, 6, CHG_NONE },
- { "movw", 0, "move16", 5, 0x01, 5, 5, CHG_NONE },
- { "movw", 0, "move16", 5, 0x05, 5, 5, CHG_NONE },
- { "movw", 0, "move16", 4, 0x02, 5, 5, CHG_NONE },
-
- { "rev", 0, 0, 2, 0x3a, _M, _M, CHG_HNZVC },
- { "revw", 0, 0, 2, 0x3b, _M, _M, CHG_HNZVC },
- { "sba", "b,a->a", "sub8", 2, 0x16, 2, 2, CHG_NZVC },
-
- { "stop", 0, 0, 2, 0x3e, 2, 9, CHG_NONE },
-
- { "tab", "a->b", "movtst8", 2, 0x0e, 2, 2, CLR_V_CHG_NZ },
- { "tba", "b->a", "movtst8", 2, 0x0f, 2, 2, CLR_V_CHG_NZ },
-
- { "wav", 0, 0, 2, 0x3c, 8, _M, SET_Z_CHG_HNVC }
-};
-
-void fatal_error (const struct m6811_opcode_def*, const char*, ...);
-void print (FILE*, int, const char*,...);
-int gen_fetch_operands (FILE*, int, const struct m6811_opcode_def*,
- const char*);
-void gen_save_result (FILE*, int, const struct m6811_opcode_def*,
- int, const char*);
-const struct m6811_opcode_pattern*
-find_opcode_pattern (const struct m6811_opcode_def*);
-void gen_interp (FILE*, int, const struct m6811_opcode_def*);
-void gen_interpreter_for_table (FILE*, int,
- const struct m6811_opcode_def*,
- int, const char*);
-void gen_interpreter (FILE*);
-
-
-static int indent_level = 2;
-static int current_insn_size = 0;
-
-/* Fatal error message and exit. This method is called when an inconsistency
- is detected in the generation table. */
-void
-fatal_error (const struct m6811_opcode_def *opcode, const char *msg, ...)
-{
- va_list argp;
-
- fprintf (stderr, "Fatal error: ");
- va_start (argp, msg);
- vfprintf (stderr, msg, argp);
- va_end (argp);
- fprintf (stderr, "\n");
- if (opcode)
- {
- fprintf (stderr, "Opcode: 0x%02x %s %s\n",
- opcode->insn_code,
- opcode->name ? opcode->name : "(null)",
- opcode->operands ? opcode->operands : "(null)");
- }
- exit (1);
-}
-
-
-/* Format and pretty print for the code generation. (printf like format). */
-void
-print (FILE *fp, int col, const char *msg, ...)
-{
- va_list argp;
- char buf[1024];
- int cur_col = -1;
- int i;
-
- /* Format in a buffer. */
- va_start (argp, msg);
- vsprintf (buf, msg, argp);
- va_end (argp);
-
- /* Basic pretty print:
- - Every line is indented at column 'col',
- - Indentation is updated when '{' and '}' are found,
- - Indentation is incremented by the special character '@' (not displayed).
- - New lines inserted automatically after ';' */
- for (i = 0; buf[i]; i++)
- {
- if (buf[i] == '{')
- col += indent_level;
- else if (buf[i] == '}')
- col -= indent_level;
- else if (buf[i] == '@')
- {
- col += indent_level;
- continue;
- }
- if (cur_col == -1 && buf[i] != ' ' && buf[i] != '\t' && buf[i] != '\n')
- {
- cur_col = 0;
- while (cur_col < col)
- {
- fputc (' ', fp);
- cur_col++;
- }
- }
- if (buf[i] == '}')
- col -= indent_level;
- else if (buf[i] == '{')
- col += indent_level;
- else if (buf[i] == '\n')
- cur_col = -1;
-
- if (cur_col != -1 || buf[i] == '\n')
- fputc (buf[i], fp);
-
- if (buf[i] == ';')
- {
- fputc ('\n', fp);
- cur_col = -1;
- }
- }
-}
-
-
-/* Generate the code to obtain the operands before execution of the
- instruction. Operands are copied in local variables. This allows to
- have the same instruction pattern and different operand formats.
- There is a maximum of 3 variables:
-
- 8-bits 16-bits
- 1st operand: src8 src16
- 2nd operand: dst8 dst16
- alt operand: addr addr
-
- The operand string is interpreted as follows:
-
- a Copy A register in the local 8-bits variable.
- b " B "
- ccr " ccr "
- d " D " " " 16-bits variable.
- x " X "
- y " Y "
- sp " SP "
- pc " PC "
- * 68HC11 page0 memory pointer.
- Get 8-bits page0 offset from program, set up 'addr' local
- variable to refer to the location in page0.
- Copy the 8/16-bits value pointed to by 'addr' in a 8/16-bits variable.
- (x) 68HC11 indirect access with X register.
- Get 8-bits unsigned offset from program, set up 'addr' = X + offset.
- Copy the 8/16-bits value pointed to by 'addr' in a 8/16-bits variable.
- (y) Same as (x) with Y register.
- () 68HC11 extended address mode (global variable).
- Get 16-bits address from program and set 'addr'.
- Copy the 8/16-bits value pointed to by 'addr' in a 8/16-bits variable.
- [] 68HC12 indexed addressing mode
- (sp) Pop
- Pop a 8/16-bits value from stack and set in a 8/16-bits variable.
- r Relative branch
- Get 8-bits relative branch, compute absolute address and set 'addr'
- # 68HC11 immediate value
- Get a 8/16-bits value from program and set a 8/16-bits variable.
- &(x)
- &(y)
- &() Similar to (x), (y) and () except that we don't read the
- value pointed to by 'addr' (ie, only 'addr' is setup). Used by jmp/jsr.
- &[] Similar to [] but don't read the value pointed to by the address.
- , Operand separator.
- - End of input operands.
-
- Example:
- (x),a->a addr = x + (uint16) (fetch8 (proc));
- src8 = a
- *,#,r addr = (uint16) (fetch8 (proc)) <- Temporary 'addr'
- src8 = read_mem8 (proc, addr)
- dst8 = fetch8 (proc)
- addr = fetch_relbranch (proc) <- Final 'addr'
-
- Returns 1 if the 'addr' operand is set, 0 otherwise. */
-int
-gen_fetch_operands (FILE *fp, int col,
- const struct m6811_opcode_def *opcode,
- const char *operand_size)
-{
- static char *vars[2] = {
- "src",
- "dst"
- };
- char c;
- int addr_set = 0;
- int cur_var = 0;
- const char *operands = opcode->operands;
-
- if (operands == 0)
- operands = "";
-
- while ((c = *operands++) != 0)
- {
- switch (c)
- {
- case 'a':
- if (cur_var >= 2)
- fatal_error (opcode, "Too many locals");
-
- print (fp, col, "%s8 = cpu_get_a (proc);", vars[cur_var]);
- break;
-
- case 'b':
- if (cur_var >= 2)
- fatal_error (opcode, "Too many locals");
-
- print (fp, col, "%s8 = cpu_get_b (proc);", vars[cur_var]);
- break;
-
- case 'd':
- if (cur_var >= 2)
- fatal_error (opcode, "Too many locals");
-
- print (fp, col, "%s16 = cpu_get_d (proc);", vars[cur_var]);
- break;
-
- case 'x':
- if (cur_var >= 2)
- fatal_error (opcode, "Too many locals");
-
- print (fp, col, "%s16 = cpu_get_x (proc);", vars[cur_var]);
- break;
-
- case 'y':
- if (cur_var >= 2)
- fatal_error (opcode, "Too many locals");
-
- print (fp, col, "%s16 = cpu_get_y (proc);", vars[cur_var]);
- break;
-
- case '*':
- if (cur_var >= 2)
- fatal_error (opcode, "Too many locals");
-
- if (addr_set)
- fatal_error (opcode, "Wrong use of '*', 'addr' already used");
-
- addr_set = 1;
- current_insn_size += 1;
- print (fp, col, "addr = (uint16) cpu_fetch8 (proc);");
- print (fp, col, "%s%s = memory_read%s (proc, addr);",
- vars[cur_var], operand_size, operand_size);
- break;
-
- case '&':
- if (addr_set)
- fatal_error (opcode, "Wrong use of '&', 'addr' already used");
-
- addr_set = 1;
- if (strncmp (operands, "(x)", 3) == 0)
- {
- current_insn_size += 1;
- print (fp, col, "addr = cpu_get_x (proc) + (uint16) cpu_fetch8 (proc);");
- operands += 3;
- }
- else if (strncmp (operands, "(y)", 3) == 0)
- {
- current_insn_size += 1;
- print (fp, col, "addr = cpu_get_y (proc) + (uint16) cpu_fetch8 (proc);");
- operands += 3;
- }
- else if (strncmp (operands, "()", 2) == 0)
- {
- current_insn_size += 2;
- print (fp, col, "addr = cpu_fetch16 (proc);");
- operands += 2;
- }
- else if (strncmp (operands, "[]", 2) == 0)
- {
- current_insn_size += 1;
- print (fp, col, "addr = cpu_get_indexed_operand_addr (proc, 0);");
- operands += 2;
- }
- else
- {
- fatal_error (opcode, "Unknown operand");
- }
- break;
-
- case '(':
- if (cur_var >= 2)
- fatal_error (opcode, "Too many locals");
-
- if (addr_set)
- fatal_error (opcode, "Wrong use of '(', 'addr' already used");
-
- if (strncmp (operands, "x)", 2) == 0)
- {
- addr_set = 1;
- current_insn_size += 1;
- print (fp, col, "addr = cpu_get_x (proc) + (uint16) cpu_fetch8 (proc);");
- print (fp, col, "%s%s = memory_read%s (proc, addr);",
- vars[cur_var], operand_size, operand_size);
- operands += 2;
- }
- else if (strncmp (operands, "y)", 2) == 0)
- {
- addr_set = 1;
- current_insn_size += 1;
- print (fp, col, "addr = cpu_get_y (proc) + (uint16) cpu_fetch8 (proc);");
- print (fp, col, "%s%s = memory_read%s (proc, addr);",
- vars[cur_var], operand_size, operand_size);
- operands += 2;
- }
- else if (strncmp (operands, ")", 1) == 0)
- {
- addr_set = 1;
- current_insn_size += 2;
- print (fp, col, "addr = cpu_fetch16 (proc);");
- print (fp, col, "%s%s = memory_read%s (proc, addr);",
- vars[cur_var], operand_size, operand_size);
- operands++;
- }
- else if (strncmp (operands, "@)", 2) == 0)
- {
- current_insn_size += 2;
- print (fp, col, "addr = cpu_fetch16 (proc);");
- print (fp, col, "%s%s = memory_read%s (proc, addr);",
- vars[cur_var], operand_size, operand_size);
- operands += 2;
- }
- else if (strncmp (operands, "sp)", 3) == 0)
- {
- print (fp, col, "%s%s = cpu_%s_pop_uint%s (proc);",
- vars[cur_var], operand_size,
- cpu_type == cpu6811 ? "m68hc11" : "m68hc12",
- operand_size);
- operands += 3;
- }
- else
- {
- fatal_error (opcode, "Unknown operand");
- }
- break;
-
- case '[':
- if (cur_var >= 2)
- fatal_error (opcode, "Too many locals");
-
- if (addr_set)
- fatal_error (opcode, "Wrong use of '[', 'addr' already used");
-
- if (strncmp (operands, "]", 1) == 0)
- {
- addr_set = 1;
- current_insn_size += 1;
- print (fp, col, "addr = cpu_get_indexed_operand_addr (proc,0);");
- print (fp, col, "%s%s = memory_read%s (proc, addr);",
- vars[cur_var], operand_size, operand_size);
- operands += 1;
- }
- else if (strncmp (operands, "]", 1) == 0)
- {
- current_insn_size += 1;
- print (fp, col, "%s%s = cpu_get_indexed_operand%s (proc,0);",
- vars[cur_var], operand_size, operand_size);
- operands += 1;
- }
- else
- {
- fatal_error (opcode, "Unknown operand");
- }
- break;
-
- case '{':
- if (cur_var >= 2)
- fatal_error (opcode, "Too many locals");
-
- if (addr_set)
- fatal_error (opcode, "Wrong use of '{', 'addr' already used");
-
- if (strncmp (operands, "}", 1) == 0)
- {
- current_insn_size += 1;
- print (fp, col, "%s%s = cpu_get_indexed_operand%s (proc, 1);",
- vars[cur_var], operand_size, operand_size);
- operands += 1;
- }
- else
- {
- fatal_error (opcode, "Unknown operand");
- }
- break;
-
- case 's':
- if (cur_var >= 2)
- fatal_error (opcode, "Too many locals");
-
- if (strncmp (operands, "p", 1) == 0)
- {
- print (fp, col, "%s16 = cpu_get_sp (proc);", vars[cur_var]);
- operands++;
- }
- else
- {
- fatal_error (opcode, "Unknown operands");
- }
- break;
-
- case 'c':
- if (strncmp (operands, "cr", 2) == 0)
- {
- print (fp, col, "%s8 = cpu_get_ccr (proc);", vars[cur_var]);
- operands += 2;
- }
- else
- {
- fatal_error (opcode, "Unknown operands");
- }
- break;
-
- case 'r':
- if (addr_set && cur_var != 2)
- fatal_error (opcode, "Wrong use of 'r'");
-
- addr_set = 1;
- current_insn_size += 1;
- print (fp, col, "addr = cpu_fetch_relbranch (proc);");
- break;
-
- case 'R':
- if (addr_set && cur_var != 2)
- fatal_error (opcode, "Wrong use of 'R'");
-
- addr_set = 1;
- current_insn_size += 2;
- print (fp, col, "addr = cpu_fetch_relbranch16 (proc);");
- break;
-
- case '#':
- if (strcmp (operand_size, "8") == 0)
- {
- current_insn_size += 1;
- }
- else
- {
- current_insn_size += 2;
- }
- print (fp, col, "%s%s = cpu_fetch%s (proc);", vars[cur_var],
- operand_size, operand_size);
- break;
-
- case ',':
- cur_var ++;
- break;
-
- case '-':
- return addr_set;
-
- default:
- fatal_error (opcode, "Invalid operands");
- break;
- }
- }
- return addr_set;
-}
-
-
-/* Generate the code to save the instruction result. The result is in
- a local variable: either 'dst8' or 'dst16'.
- There may be only one result. Instructions with 2 results (ie idiv
- and fdiv), take care of saving the first value.
-
- The operand string is the same as for 'gen_fetch_operands'.
- Everything before '->' is ignored. If the '->' is not found, it
- is assumed that there is nothing to save. After '->', the operand
- string is interpreted as follows:
-
- a Save 'dst8' in A register
- b " B "
- ccr " CCR "
- d " 'dst16' D "
- x " X "
- y " Y "
- sp " SP "
- * 68HC11 page0 memory pointer.
- (x) 68HC11 indirect access with X register.
- (y) Same as (x) with Y register.
- () 68HC11 extended address mode (global variable).
- For these modes, if they were used as an input operand,
- the 'addr' variable contains the address of memory where
- the result must be saved.
- If they were not used an input operand, 'addr' is computed
- (as in gen_fetch_operands()), and the result is saved.
- [] 68HC12 indexed indirect
- (sp) Push
- Push the 8/16-bits result on the stack. */
-void
-gen_save_result (FILE *fp, int col,
- const struct m6811_opcode_def *opcode,
- int addr_set,
- const char *operand_size)
-{
- char c;
- const char *operands = opcode->operands;
-
- /* When the result is saved, 'result_size' is a string which
- indicates the size of the saved result ("8" or "16"). This
- is a sanity check with 'operand_size' to detect inconsistencies
- in the different tables. */
- const char *result_size = 0;
-
- if (operands == 0)
- operands = "";
-
- operands = strchr (operands, '-');
- if (operands == 0)
- return;
-
- operands++;
- if (*operands++ != '>')
- {
- fatal_error (opcode, "Invalid operand");
- }
-
- c = *operands++;
- switch (c)
- {
- case 'a':
- result_size = "8";
- print (fp, col, "cpu_set_a (proc, dst8);");
- break;
-
- case 'b':
- result_size = "8";
- print (fp, col, "cpu_set_b (proc, dst8);");
- break;
-
- case 'd':
- result_size = "16";
- print (fp, col, "cpu_set_d (proc, dst16);");
- break;
-
- case 'x':
- result_size = "16";
- print (fp, col, "cpu_set_x (proc, dst16);");
- break;
-
- case 'y':
- result_size = "16";
- print (fp, col, "cpu_set_y (proc, dst16);");
- break;
-
- case '*':
- if (addr_set == 0)
- {
- current_insn_size += 1;
- print (fp, col, "addr = (uint16) cpu_fetch8 (proc);");
- }
- result_size = operand_size;
- print (fp, col, "memory_write%s (proc, addr, dst%s);",
- operand_size, operand_size);
- break;
-
- case '(':
- if (strncmp (operands, "x)", 2) == 0)
- {
- if (addr_set == 0)
- {
- current_insn_size += 1;
- print (fp, col, "addr = cpu_get_x (proc) + cpu_fetch8 (proc);");
- }
- print (fp, col, "memory_write%s (proc, addr, dst%s);",
- operand_size, operand_size);
- operands += 2;
- result_size = operand_size;
- }
- else if (strncmp (operands, "y)", 2) == 0)
- {
- if (addr_set == 0)
- {
- current_insn_size += 1;
- print (fp, col, "addr = cpu_get_y (proc) + cpu_fetch8 (proc);");
- }
- print (fp, col, "memory_write%s (proc, addr, dst%s);",
- operand_size, operand_size);
- operands += 2;
- result_size = operand_size;
- }
- else if (strncmp (operands, ")", 1) == 0)
- {
- if (addr_set == 0)
- {
- current_insn_size += 2;
- print (fp, col, "addr = cpu_fetch16 (proc);");
- }
- print (fp, col, "memory_write%s (proc, addr, dst%s);",
- operand_size, operand_size);
- operands++;
- result_size = operand_size;
- }
- else if (strncmp (operands, "sp)", 3) == 0)
- {
- print (fp, col, "cpu_%s_push_uint%s (proc, dst%s);",
- cpu_type == cpu6811 ? "m68hc11" : "m68hc12",
- operand_size, operand_size);
- operands += 3;
- result_size = operand_size;
- }
- else
- {
- fatal_error (opcode, "Invalid operand");
- }
- break;
-
- case '[':
- if (strncmp (operands, "]", 1) == 0)
- {
- if (addr_set == 0)
- {
- current_insn_size += 1;
- print (fp, col, "addr = cpu_get_indexed_operand_addr (proc,0);");
- }
- print (fp, col, "memory_write%s (proc, addr, dst%s);",
- operand_size, operand_size);
- operands++;
- result_size = operand_size;
- }
- else
- {
- fatal_error (opcode, "Invalid operand");
- }
- break;
-
- case '{':
- if (strncmp (operands, "}", 1) == 0)
- {
- current_insn_size += 1;
- print (fp, col, "addr = cpu_get_indexed_operand_addr (proc, 1);");
- print (fp, col, "memory_write%s (proc, addr, dst%s);",
- operand_size, operand_size);
- operands++;
- result_size = operand_size;
- }
- else
- {
- fatal_error (opcode, "Invalid operand");
- }
- break;
-
- case 's':
- if (strncmp (operands, "p", 1) == 0)
- {
- print (fp, col, "cpu_set_sp (proc, dst16);");
- operands++;
- result_size = "16";
- }
- else
- {
- fatal_error (opcode, "Invalid operand");
- }
- break;
-
- case 'c':
- if (strncmp (operands, "cr", 2) == 0)
- {
- print (fp, col, "cpu_set_ccr (proc, dst8);");
- operands += 2;
- result_size = "8";
- }
- else
- {
- fatal_error (opcode, "Invalid operand");
- }
- break;
-
- default:
- fatal_error (opcode, "Invalid operand");
- break;
- }
-
- if (*operands != 0)
- fatal_error (opcode, "Garbage at end of operand");
-
- if (result_size == 0)
- fatal_error (opcode, "? No result seems to be saved");
-
- if (strcmp (result_size, operand_size) != 0)
- fatal_error (opcode, "Result saved different than pattern size");
-}
-
-
-/* Find the instruction pattern for a given instruction. */
-const struct m6811_opcode_pattern*
-find_opcode_pattern (const struct m6811_opcode_def *opcode)
-{
- int i;
- const char *pattern = opcode->insn_pattern;
-
- if (pattern == 0)
- {
- pattern = opcode->name;
- }
- for (i = 0; i < TABLE_SIZE(m6811_opcode_patterns); i++)
- {
- if (strcmp (m6811_opcode_patterns[i].name, pattern) == 0)
- {
- return &m6811_opcode_patterns[i];
- }
- }
- fatal_error (opcode, "Unknown instruction pattern");
- return 0;
-}
-
-/* Generate the code for interpretation of instruction 'opcode'. */
-void
-gen_interp (FILE *fp, int col, const struct m6811_opcode_def *opcode)
-{
- const char *operands = opcode->operands;
- int addr_set;
- const char *pattern = opcode->insn_pattern;
- const struct m6811_opcode_pattern *op;
- const char *operand_size;
-
- if (pattern == 0)
- {
- pattern = opcode->name;
- }
-
- /* Find out the size of the operands: 8 or 16-bits. */
- if (strcmp(&pattern[strlen(pattern) - 1], "8") == 0)
- {
- operand_size = "8";
- }
- else if (strcmp (&pattern[strlen(pattern) - 2], "16") == 0)
- {
- operand_size = "16";
- }
- else
- {
- operand_size = "";
- }
-
- if (operands == 0)
- operands = "";
-
- /* Generate entry point for the instruction. */
- print (fp, col, "case 0x%02x: /* %s %s */\n", opcode->insn_code,
- opcode->name, operands);
- col += indent_level;
-
- /* Generate the code to get the instruction operands. */
- addr_set = gen_fetch_operands (fp, col, opcode, operand_size);
-
- /* Generate instruction interpretation. */
- op = find_opcode_pattern (opcode);
- if (op->pattern)
- {
- print (fp, col, "%s;", op->pattern);
- }
-
- /* Generate the code to save the result. */
- gen_save_result (fp, col, opcode, addr_set, operand_size);
-
- /* For some instructions, generate the code to update the flags. */
- if (op && op->ccr_update)
- {
- print (fp, col, "%s;", op->ccr_update);
- }
- print (fp, col, "break;");
-}
-
-
-/* Generate the interpretor for a given 68HC11 page set. */
-void
-gen_interpreter_for_table (FILE *fp, int col,
- const struct m6811_opcode_def *table,
- int size,
- const char *cycles_table_name)
-{
- int i;
- int init_size;
-
- init_size = table == m6811_page1_opcodes
- || table == m6812_page1_opcodes? 1 : 2;
-
- /* Get the opcode and dispatch directly. */
- print (fp, col, "op = cpu_fetch8 (proc);");
- print (fp, col, "cpu_add_cycles (proc, %s[op]);", cycles_table_name);
-
- print (fp, col, "switch (op)\n");
- col += indent_level;
- print (fp, col, "{\n");
-
- for (i = 0; i < size; i++)
- {
- /* The table contains duplicate entries (ie, instruction aliases). */
- if (i > 0 && table[i].insn_code == table[i - 1].insn_code)
- continue;
-
- current_insn_size = init_size;
- gen_interp (fp, col, &table[i]);
-#if 0
- if (current_insn_size != table[i].insn_size)
- {
- fatal_error (&table[i], "Insn size %ld inconsistent with %ld",
- current_insn_size, table[i].insn_size);
- }
-#endif
- }
-
- print (fp, col, "default:\n");
- print (fp, col + indent_level, "cpu_special (proc, M6811_ILLEGAL);");
- print (fp, col + indent_level, "break;");
- print (fp, col, "}\n");
-}
-
-/* Generate the table of instruction cycle. These tables are indexed
- by the opcode number to allow a fast cycle time computation. */
-void
-gen_cycle_table (FILE *fp, const char *name,
- const struct m6811_opcode_def *table,
- int size)
-{
- int i;
- char cycles[256];
- int page1;
-
- page1 = table == m6811_page1_opcodes;
-
- /* Build the cycles table. The table is indexed by the opcode. */
- memset (cycles, 0, sizeof (cycles));
- while (--size >= 0)
- {
- if (table->insn_min_cycles > table->insn_max_cycles)
- fatal_error (table, "Wrong insn cycles");
-
- if (table->insn_max_cycles == _M)
- cycles[table->insn_code] = table->insn_min_cycles;
- else
- cycles[table->insn_code] = table->insn_max_cycles;
-
- table++;
- }
-
- /* Some check: for the page1 opcode, the cycle type of the page2/3/4
- opcode must be 0. */
- if (page1 && (cycles[M6811_OPCODE_PAGE2] != 0
- || cycles[M6811_OPCODE_PAGE3] != 0
- || cycles[M6811_OPCODE_PAGE4] != 0))
- fatal_error (0, "Invalid cycle table");
-
- /* Generates the cycles table. */
- print (fp, 0, "static const unsigned char %s[256] = {\n", name);
- for (i = 0; i < 256; i++)
- {
- if ((i % 16) == 0)
- {
- print (fp, indent_level, "/* %3d */ ", i);
- }
- fprintf (fp, "%2d", cycles[i]);
- if (i != 255)
- fprintf (fp, ",");
-
- if ((i % 16) != 15)
- fprintf (fp, " ");
- else
- fprintf (fp, "\n");
- }
- print (fp, 0, "};\n\n");
-}
-
-void
-gen_function_entry (FILE *fp, const char *name)
-{
- /* Generate interpretor entry point. */
- print (fp, 0, "%s (proc)\n", name);
- print (fp, indent_level, "struct _sim_cpu* proc;");
- print (fp, indent_level, "{\n");
-
- /* Interpretor local variables. */
- print (fp, indent_level, "unsigned char op;");
- print (fp, indent_level, "uint16 addr, src16, dst16;");
- print (fp, indent_level, "uint8 src8, dst8;\n");
-}
-
-void
-gen_function_close (FILE *fp)
-{
- print (fp, 0, "}\n");
-}
-
-int
-cmp_opcode (void* e1, void* e2)
-{
- struct m6811_opcode_def* op1 = (struct m6811_opcode_def*) e1;
- struct m6811_opcode_def* op2 = (struct m6811_opcode_def*) e2;
-
- return (int) (op1->insn_code) - (int) (op2->insn_code);
-}
-
-void
-prepare_table (struct m6811_opcode_def* table, int size)
-{
- int i;
-
- qsort (table, size, sizeof (table[0]), cmp_opcode);
- for (i = 1; i < size; i++)
- {
- if (table[i].insn_code == table[i-1].insn_code)
- {
- fprintf (stderr, "Two insns with code 0x%02x\n",
- table[i].insn_code);
- }
- }
-}
-
-void
-gen_interpreter (FILE *fp)
-{
- int col = 0;
-
- prepare_table (m6811_page1_opcodes, TABLE_SIZE (m6811_page1_opcodes));
- prepare_table (m6811_page2_opcodes, TABLE_SIZE (m6811_page2_opcodes));
- prepare_table (m6811_page3_opcodes, TABLE_SIZE (m6811_page3_opcodes));
- prepare_table (m6811_page4_opcodes, TABLE_SIZE (m6811_page4_opcodes));
-
- prepare_table (m6812_page1_opcodes, TABLE_SIZE (m6812_page1_opcodes));
- prepare_table (m6812_page2_opcodes, TABLE_SIZE (m6812_page2_opcodes));
-
- /* Generate header of interpretor. */
- print (fp, col, "/* File generated automatically by gencode. */\n");
- print (fp, col, "#include \"sim-main.h\"\n\n");
-
- if (cpu_type & cpu6811)
- {
- gen_cycle_table (fp, "cycles_page1", m6811_page1_opcodes,
- TABLE_SIZE (m6811_page1_opcodes));
- gen_cycle_table (fp, "cycles_page2", m6811_page2_opcodes,
- TABLE_SIZE (m6811_page2_opcodes));
- gen_cycle_table (fp, "cycles_page3", m6811_page3_opcodes,
- TABLE_SIZE (m6811_page3_opcodes));
- gen_cycle_table (fp, "cycles_page4", m6811_page4_opcodes,
- TABLE_SIZE (m6811_page4_opcodes));
-
- gen_function_entry (fp, "static void\ncpu_page3_interp");
- gen_interpreter_for_table (fp, indent_level,
- m6811_page3_opcodes,
- TABLE_SIZE(m6811_page3_opcodes),
- "cycles_page3");
- gen_function_close (fp);
-
- gen_function_entry (fp, "static void\ncpu_page4_interp");
- gen_interpreter_for_table (fp, indent_level,
- m6811_page4_opcodes,
- TABLE_SIZE(m6811_page4_opcodes),
- "cycles_page4");
- gen_function_close (fp);
-
- /* Generate the page 2, 3 and 4 handlers. */
- gen_function_entry (fp, "static void\ncpu_page2_interp");
- gen_interpreter_for_table (fp, indent_level,
- m6811_page2_opcodes,
- TABLE_SIZE(m6811_page2_opcodes),
- "cycles_page2");
- gen_function_close (fp);
-
- /* Generate the interpretor entry point. */
- gen_function_entry (fp, "void\ncpu_interp_m6811");
-
- gen_interpreter_for_table (fp, indent_level, m6811_page1_opcodes,
- TABLE_SIZE(m6811_page1_opcodes),
- "cycles_page1");
- gen_function_close (fp);
- }
- else
- {
- gen_cycle_table (fp, "cycles_page1", m6812_page1_opcodes,
- TABLE_SIZE (m6812_page1_opcodes));
- gen_cycle_table (fp, "cycles_page2", m6812_page2_opcodes,
- TABLE_SIZE (m6812_page2_opcodes));
-
- gen_function_entry (fp, "static void\ncpu_page2_interp");
- gen_interpreter_for_table (fp, indent_level,
- m6812_page2_opcodes,
- TABLE_SIZE(m6812_page2_opcodes),
- "cycles_page2");
- gen_function_close (fp);
-
- /* Generate the interpretor entry point. */
- gen_function_entry (fp, "void\ncpu_interp_m6812");
-
- gen_interpreter_for_table (fp, indent_level, m6812_page1_opcodes,
- TABLE_SIZE(m6812_page1_opcodes),
- "cycles_page1");
- gen_function_close (fp);
- }
-}
-
-void
-usage (char* prog)
-{
- fprintf (stderr, "Usage: %s {-m6811|-m6812}\n", prog);
- exit (2);
-}
-
-int
-main (int argc, char *argv[])
-{
- int i;
-
- for (i = 1; i < argc; i++)
- {
- if (strcmp (argv[i], "-m6811") == 0)
- cpu_type = cpu6811;
- else if (strcmp (argv[i], "-m6812") == 0)
- cpu_type = cpu6812;
- else
- {
- usage (argv[0]);
- }
- }
- if (cpu_type == 0)
- usage (argv[0]);
-
- gen_interpreter (stdout);
- if (fclose (stdout) != 0)
- {
- fprintf (stderr, "Error while generating the interpreter: %d\n",
- errno);
- return 1;
- }
- return 0;
-}
diff --git a/sim/m68hc11/interp.c b/sim/m68hc11/interp.c
deleted file mode 100644
index e04399236fa..00000000000
--- a/sim/m68hc11/interp.c
+++ /dev/null
@@ -1,603 +0,0 @@
-/* interp.c -- Simulator for Motorola 68HC11
- Copyright (C) 1999, 2000, 2001 Free Software Foundation, Inc.
- Written by Stephane Carrez (stcarrez@worldnet.fr)
-
-This file is part of GDB, the GNU debugger.
-
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License along
-with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
-
-#include "sim-main.h"
-#include "sim-assert.h"
-#include "sim-hw.h"
-#include "sim-options.h"
-#include "hw-tree.h"
-#include "hw-device.h"
-#include "hw-ports.h"
-
-#ifndef MONITOR_BASE
-# define MONITOR_BASE (0x0C000)
-# define MONITOR_SIZE (0x04000)
-#endif
-
-static void sim_get_info (SIM_DESC sd, char *cmd);
-
-
-char *interrupt_names[] = {
- "reset",
- "nmi",
- "int",
- NULL
-};
-
-#ifndef INLINE
-#if defined(__GNUC__) && defined(__OPTIMIZE__)
-#define INLINE __inline__
-#else
-#define INLINE
-#endif
-#endif
-
-struct sim_info_list
-{
- const char *name;
- const char *device;
-};
-
-struct sim_info_list dev_list_68hc11[] = {
- {"cpu", "/m68hc11"},
- {"timer", "/m68hc11/m68hc11tim"},
- {"sio", "/m68hc11/m68hc11sio"},
- {"spi", "/m68hc11/m68hc11spi"},
- {"eeprom", "/m68hc11/m68hc11eepr"},
- {0, 0}
-};
-
-struct sim_info_list dev_list_68hc12[] = {
- {"cpu", "/m68hc12"},
- {"timer", "/m68hc12/m68hc12tim"},
- {"sio", "/m68hc12/m68hc12sio"},
- {"spi", "/m68hc12/m68hc12spi"},
- {"eeprom", "/m68hc12/m68hc12eepr"},
- {0, 0}
-};
-
-/* Cover function of sim_state_free to free the cpu buffers as well. */
-
-static void
-free_state (SIM_DESC sd)
-{
- if (STATE_MODULES (sd) != NULL)
- sim_module_uninstall (sd);
-
- sim_state_free (sd);
-}
-
-/* Give some information about the simulator. */
-static void
-sim_get_info (SIM_DESC sd, char *cmd)
-{
- sim_cpu *cpu;
-
- cpu = STATE_CPU (sd, 0);
- if (cmd != 0 && (cmd[0] == ' ' || cmd[0] == '-'))
- {
- int i;
- struct hw *hw_dev;
- struct sim_info_list *dev_list;
- const struct bfd_arch_info *arch;
-
- arch = STATE_ARCHITECTURE (sd);
- cmd++;
-
- if (arch->arch == bfd_arch_m68hc11)
- dev_list = dev_list_68hc11;
- else
- dev_list = dev_list_68hc12;
-
- for (i = 0; dev_list[i].name; i++)
- if (strcmp (cmd, dev_list[i].name) == 0)
- break;
-
- if (dev_list[i].name == 0)
- {
- sim_io_eprintf (sd, "Device '%s' not found.\n", cmd);
- sim_io_eprintf (sd, "Valid devices: cpu timer sio eeprom\n");
- return;
- }
- hw_dev = sim_hw_parse (sd, dev_list[i].device);
- if (hw_dev == 0)
- {
- sim_io_eprintf (sd, "Device '%s' not found\n", dev_list[i].device);
- return;
- }
- hw_ioctl (hw_dev, 23, 0);
- return;
- }
-
- cpu_info (sd, cpu);
- interrupts_info (sd, &cpu->cpu_interrupts);
-}
-
-
-void
-sim_board_reset (SIM_DESC sd)
-{
- struct hw *hw_cpu;
- sim_cpu *cpu;
- const struct bfd_arch_info *arch;
- const char *cpu_type;
-
- cpu = STATE_CPU (sd, 0);
- arch = STATE_ARCHITECTURE (sd);
-
- /* hw_cpu = sim_hw_parse (sd, "/"); */
- if (arch->arch == bfd_arch_m68hc11)
- {
- cpu->cpu_type = CPU_M6811;
- cpu_type = "/m68hc11";
- }
- else
- {
- cpu->cpu_type = CPU_M6812;
- cpu_type = "/m68hc12";
- }
-
- hw_cpu = sim_hw_parse (sd, cpu_type);
- if (hw_cpu == 0)
- {
- sim_io_eprintf (sd, "%s cpu not found in device tree.", cpu_type);
- return;
- }
-
- cpu_reset (cpu);
- hw_port_event (hw_cpu, 3, 0);
- cpu_restart (cpu);
-}
-
-int
-sim_hw_configure (SIM_DESC sd)
-{
- const struct bfd_arch_info *arch;
- struct hw *device_tree;
- int m6811_mode;
- sim_cpu *cpu;
-
- arch = STATE_ARCHITECTURE (sd);
- if (arch == 0)
- return 0;
-
- cpu = STATE_CPU (sd, 0);
- cpu->cpu_configured_arch = arch;
- device_tree = sim_hw_parse (sd, "/");
- if (arch->arch == bfd_arch_m68hc11)
- {
- cpu->cpu_interpretor = cpu_interp_m6811;
- if (hw_tree_find_property (device_tree, "/m68hc11/reg") == 0)
- {
- /* Allocate core managed memory */
-
- /* the monitor */
- sim_do_commandf (sd, "memory region 0x%lx@%d,0x%lx",
- /* MONITOR_BASE, MONITOR_SIZE */
- 0x8000, M6811_RAM_LEVEL, 0x8000);
- sim_do_commandf (sd, "memory region 0x000@%d,0x8000",
- M6811_RAM_LEVEL);
- sim_hw_parse (sd, "/m68hc11/reg 0x1000 0x03F");
- }
-
- if (hw_tree_find_property (device_tree, "/m68hc11/m68hc11sio/reg") == 0)
- {
- sim_hw_parse (sd, "/m68hc11/m68hc11sio/reg 0x2b 0x5");
- sim_hw_parse (sd, "/m68hc11/m68hc11sio/backend stdio");
- sim_hw_parse (sd, "/m68hc11 > cpu-reset reset /m68hc11/m68hc11sio");
- }
- if (hw_tree_find_property (device_tree, "/m68hc11/m68hc11tim/reg") == 0)
- {
- /* M68hc11 Timer configuration. */
- sim_hw_parse (sd, "/m68hc11/m68hc11tim/reg 0x1b 0x5");
- sim_hw_parse (sd, "/m68hc11 > cpu-reset reset /m68hc11/m68hc11tim");
- }
-
- /* Create the SPI device. */
- if (hw_tree_find_property (device_tree, "/m68hc11/m68hc11spi/reg") == 0)
- {
- sim_hw_parse (sd, "/m68hc11/m68hc11spi/reg 0x28 0x3");
- sim_hw_parse (sd, "/m68hc11 > cpu-reset reset /m68hc11/m68hc11spi");
- }
- if (hw_tree_find_property (device_tree, "/m68hc11/nvram/reg") == 0)
- {
- /* M68hc11 persistent ram configuration. */
- sim_hw_parse (sd, "/m68hc11/nvram/reg 0x0 256");
- sim_hw_parse (sd, "/m68hc11/nvram/file m68hc11.ram");
- sim_hw_parse (sd, "/m68hc11/nvram/mode save-modified");
- /*sim_hw_parse (sd, "/m68hc11 > cpu-reset reset /m68hc11/pram"); */
- }
- if (hw_tree_find_property (device_tree, "/m68hc11/m68hc11eepr/reg") == 0)
- {
- sim_hw_parse (sd, "/m68hc11/m68hc11eepr/reg 0xb000 512");
- sim_hw_parse (sd, "/m68hc11 > cpu-reset reset /m68hc11/m68hc11eepr");
- }
- }
- else
- {
- cpu->cpu_interpretor = cpu_interp_m6812;
- if (hw_tree_find_property (device_tree, "/m68hc12/reg") == 0)
- {
- /* Allocate core external memory. */
- sim_do_commandf (sd, "memory region 0x%lx@%d,0x%lx",
- 0x8000, M6811_RAM_LEVEL, 0x8000);
- sim_do_commandf (sd, "memory region 0x000@%d,0x8000",
- M6811_RAM_LEVEL);
-
- sim_hw_parse (sd, "/m68hc12/reg 0x0 0x3FF");
- }
-
- if (!hw_tree_find_property (device_tree, "/m68hc12/m68hc12sio@1/reg"))
- {
- sim_hw_parse (sd, "/m68hc12/m68hc12sio@1/reg 0xC0 0x8");
- sim_hw_parse (sd, "/m68hc12/m68hc12sio@1/backend stdio");
- sim_hw_parse (sd, "/m68hc12 > cpu-reset reset /m68hc12/m68hc12sio@1");
- }
- if (!hw_tree_find_property (device_tree, "/m68hc12/m68hc12sio@2/reg"))
- {
- sim_hw_parse (sd, "/m68hc12/m68hc12sio@2/reg 0xC8 0x8");
- sim_hw_parse (sd, "/m68hc12/m68hc12sio@2/backend tcp");
- sim_hw_parse (sd, "/m68hc12 > cpu-reset reset /m68hc12/m68hc12sio@2");
- }
- if (hw_tree_find_property (device_tree, "/m68hc12/m68hc12tim/reg") == 0)
- {
- /* M68hc11 Timer configuration. */
- sim_hw_parse (sd, "/m68hc12/m68hc12tim/reg 0x1b 0x5");
- sim_hw_parse (sd, "/m68hc12 > cpu-reset reset /m68hc12/m68hc12tim");
- }
-
- /* Create the SPI device. */
- if (hw_tree_find_property (device_tree, "/m68hc12/m68hc12spi/reg") == 0)
- {
- sim_hw_parse (sd, "/m68hc12/m68hc12spi/reg 0x28 0x3");
- sim_hw_parse (sd, "/m68hc12 > cpu-reset reset /m68hc12/m68hc12spi");
- }
- if (hw_tree_find_property (device_tree, "/m68hc12/nvram/reg") == 0)
- {
- /* M68hc11 persistent ram configuration. */
- sim_hw_parse (sd, "/m68hc12/nvram/reg 0x2000 8192");
- sim_hw_parse (sd, "/m68hc12/nvram/file m68hc12.ram");
- sim_hw_parse (sd, "/m68hc12/nvram/mode save-modified");
- }
- if (hw_tree_find_property (device_tree, "/m68hc12/m68hc12eepr/reg") == 0)
- {
- sim_hw_parse (sd, "/m68hc12/m68hc12eepr/reg 0x0800 2048");
- sim_hw_parse (sd, "/m68hc12 > cpu-reset reset /m68hc12/m68hc12eepr");
- }
- }
- return 0;
-}
-
-static int
-sim_prepare_for_program (SIM_DESC sd, struct _bfd* abfd)
-{
- sim_cpu *cpu;
-
- cpu = STATE_CPU (sd, 0);
-
- sim_hw_configure (sd);
- if (abfd != NULL)
- {
- cpu->cpu_elf_start = bfd_get_start_address (abfd);
- }
-
- /* reset all state information */
- sim_board_reset (sd);
-
- return SIM_RC_OK;
-}
-
-SIM_DESC
-sim_open (SIM_OPEN_KIND kind, host_callback *callback,
- struct _bfd *abfd, char **argv)
-{
- char **p;
- SIM_DESC sd;
- sim_cpu *cpu;
- struct hw *device_tree;
-
- sd = sim_state_alloc (kind, callback);
- cpu = STATE_CPU (sd, 0);
-
- SIM_ASSERT (STATE_MAGIC (sd) == SIM_MAGIC_NUMBER);
-
- /* for compatibility */
- current_alignment = NONSTRICT_ALIGNMENT;
- current_target_byte_order = BIG_ENDIAN;
-
- cpu_initialize (sd, cpu);
-
- cpu->cpu_use_elf_start = 1;
- if (sim_pre_argv_init (sd, argv[0]) != SIM_RC_OK)
- {
- free_state (sd);
- return 0;
- }
-
- /* getopt will print the error message so we just have to exit if this fails.
- FIXME: Hmmm... in the case of gdb we need getopt to call
- print_filtered. */
- if (sim_parse_args (sd, argv) != SIM_RC_OK)
- {
- /* Uninstall the modules to avoid memory leaks,
- file descriptor leaks, etc. */
- free_state (sd);
- return 0;
- }
-
- /* Check for/establish the a reference program image. */
- if (sim_analyze_program (sd,
- (STATE_PROG_ARGV (sd) != NULL
- ? *STATE_PROG_ARGV (sd)
- : NULL), abfd) != SIM_RC_OK)
- {
- free_state (sd);
- return 0;
- }
-
- /* Establish any remaining configuration options. */
- if (sim_config (sd) != SIM_RC_OK)
- {
- free_state (sd);
- return 0;
- }
-
- if (sim_post_argv_init (sd) != SIM_RC_OK)
- {
- /* Uninstall the modules to avoid memory leaks,
- file descriptor leaks, etc. */
- free_state (sd);
- return 0;
- }
-
- sim_hw_configure (sd);
-
- /* Fudge our descriptor. */
- return sd;
-}
-
-
-void
-sim_close (SIM_DESC sd, int quitting)
-{
- /* shut down modules */
- sim_module_uninstall (sd);
-
- /* Ensure that any resources allocated through the callback
- mechanism are released: */
- sim_io_shutdown (sd);
-
- /* FIXME - free SD */
- sim_state_free (sd);
- return;
-}
-
-void
-sim_set_profile (int n)
-{
-}
-
-void
-sim_set_profile_size (int n)
-{
-}
-
-/* Generic implementation of sim_engine_run that works within the
- sim_engine setjmp/longjmp framework. */
-
-void
-sim_engine_run (SIM_DESC sd,
- int next_cpu_nr, /* ignore */
- int nr_cpus, /* ignore */
- int siggnal) /* ignore */
-{
- sim_cpu *cpu;
-
- SIM_ASSERT (STATE_MAGIC (sd) == SIM_MAGIC_NUMBER);
- cpu = STATE_CPU (sd, 0);
- while (1)
- {
- cpu_single_step (cpu);
-
- /* process any events */
- if (sim_events_tickn (sd, cpu->cpu_current_cycle))
- {
- sim_events_process (sd);
- }
- }
-}
-
-int
-sim_trace (SIM_DESC sd)
-{
- sim_resume (sd, 0, 0);
- return 1;
-}
-
-void
-sim_info (SIM_DESC sd, int verbose)
-{
- const char *cpu_type;
- const struct bfd_arch_info *arch;
-
- arch = STATE_ARCHITECTURE (sd);
- if (arch->arch == bfd_arch_m68hc11)
- cpu_type = "68HC11";
- else
- cpu_type = "68HC12";
-
- sim_io_eprintf (sd, "Simulator info:\n");
- sim_io_eprintf (sd, " CPU Motorola %s\n", cpu_type);
- sim_get_info (sd, 0);
- sim_module_info (sd, verbose || STATE_VERBOSE_P (sd));
-}
-
-SIM_RC
-sim_create_inferior (SIM_DESC sd, struct _bfd *abfd,
- char **argv, char **env)
-{
- return sim_prepare_for_program (sd, abfd);
-}
-
-
-void
-sim_set_callbacks (host_callback *p)
-{
- /* m6811_callback = p; */
-}
-
-
-int
-sim_fetch_register (SIM_DESC sd, int rn, unsigned char *memory, int length)
-{
- sim_cpu *cpu;
- uint16 val;
-
- cpu = STATE_CPU (sd, 0);
- switch (rn)
- {
- case A_REGNUM:
- val = cpu_get_a (cpu);
- break;
-
- case B_REGNUM:
- val = cpu_get_b (cpu);
- break;
-
- case D_REGNUM:
- val = cpu_get_d (cpu);
- break;
-
- case X_REGNUM:
- val = cpu_get_x (cpu);
- break;
-
- case Y_REGNUM:
- val = cpu_get_y (cpu);
- break;
-
- case SP_REGNUM:
- val = cpu_get_sp (cpu);
- break;
-
- case PC_REGNUM:
- val = cpu_get_pc (cpu);
- break;
-
- case PSW_REGNUM:
- val = cpu_get_ccr (cpu);
- break;
-
- default:
- val = 0;
- break;
- }
- memory[0] = val >> 8;
- memory[1] = val & 0x0FF;
- return 2;
-}
-
-int
-sim_store_register (SIM_DESC sd, int rn, unsigned char *memory, int length)
-{
- uint16 val;
- sim_cpu *cpu;
-
- cpu = STATE_CPU (sd, 0);
-
- val = *memory++;
- if (length == 2)
- val = (val << 8) | *memory;
-
- switch (rn)
- {
- case D_REGNUM:
- cpu_set_d (cpu, val);
- break;
-
- case A_REGNUM:
- cpu_set_a (cpu, val);
- break;
-
- case B_REGNUM:
- cpu_set_b (cpu, val);
- break;
-
- case X_REGNUM:
- cpu_set_x (cpu, val);
- break;
-
- case Y_REGNUM:
- cpu_set_y (cpu, val);
- break;
-
- case SP_REGNUM:
- cpu_set_sp (cpu, val);
- break;
-
- case PC_REGNUM:
- cpu_set_pc (cpu, val);
- break;
-
- case PSW_REGNUM:
- cpu_set_ccr (cpu, val);
- break;
-
- default:
- break;
- }
-
- return 2;
-}
-
-void
-sim_size (int s)
-{
- ;
-}
-
-void
-sim_do_command (SIM_DESC sd, char *cmd)
-{
- char *mm_cmd = "memory-map";
- char *int_cmd = "interrupt";
- sim_cpu *cpu;
-
- cpu = STATE_CPU (sd, 0);
- /* Commands available from GDB: */
- if (sim_args_command (sd, cmd) != SIM_RC_OK)
- {
- if (strncmp (cmd, "info", sizeof ("info") - 1) == 0)
- sim_get_info (sd, &cmd[4]);
- else if (strncmp (cmd, "frame", sizeof ("frame") - 1) == 0)
- cpu_print_frame (sd, STATE_CPU (sd, 0));
- else if (strncmp (cmd, mm_cmd, strlen (mm_cmd) == 0))
- sim_io_eprintf (sd,
- "`memory-map' command replaced by `sim memory'\n");
- else if (strncmp (cmd, int_cmd, strlen (int_cmd)) == 0)
- sim_io_eprintf (sd, "`interrupt' command replaced by `sim watch'\n");
- else
- sim_io_eprintf (sd, "Unknown command `%s'\n", cmd);
- }
-
- /* If the architecture changed, re-configure. */
- if (STATE_ARCHITECTURE (sd) != cpu->cpu_configured_arch)
- sim_hw_configure (sd);
-}
diff --git a/sim/m68hc11/interrupts.c b/sim/m68hc11/interrupts.c
deleted file mode 100644
index 5c7f5e21bd7..00000000000
--- a/sim/m68hc11/interrupts.c
+++ /dev/null
@@ -1,345 +0,0 @@
-/* interrupts.c -- 68HC11 Interrupts Emulation
- Copyright 1999, 2000, 2001 Free Software Foundation, Inc.
- Written by Stephane Carrez (stcarrez@worldnet.fr)
-
-This file is part of GDB, GAS, and the GNU binutils.
-
-GDB, GAS, and the GNU binutils are free software; you can redistribute
-them and/or modify them under the terms of the GNU General Public
-License as published by the Free Software Foundation; either version
-1, or (at your option) any later version.
-
-GDB, GAS, and the GNU binutils are distributed in the hope that they
-will be useful, but WITHOUT ANY WARRANTY; without even the implied
-warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See
-the GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License
-along with this file; see the file COPYING. If not, write to the Free
-Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
-
-#include "sim-main.h"
-
-struct interrupt_def idefs[] = {
- /* Serial interrupts. */
- { M6811_INT_SCI, M6811_SCSR, M6811_TDRE, M6811_SCCR2, M6811_TIE },
- { M6811_INT_SCI, M6811_SCSR, M6811_TC, M6811_SCCR2, M6811_TCIE },
- { M6811_INT_SCI, M6811_SCSR, M6811_RDRF, M6811_SCCR2, M6811_RIE },
- { M6811_INT_SCI, M6811_SCSR, M6811_IDLE, M6811_SCCR2, M6811_ILIE },
-
- /* SPI interrupts. */
- { M6811_INT_SPI, M6811_SPSR, M6811_SPIF, M6811_SPCR, M6811_SPIE },
-
- /* Realtime interrupts. */
- { M6811_INT_TCTN, M6811_TFLG2, M6811_TOF, M6811_TMSK2, M6811_TOI },
- { M6811_INT_RT, M6811_TFLG2, M6811_RTIF, M6811_TMSK2, M6811_RTII },
-
- /* Output compare interrupts. */
- { M6811_INT_OUTCMP1, M6811_TFLG1, M6811_OC1F, M6811_TMSK1, M6811_OC1I },
- { M6811_INT_OUTCMP2, M6811_TFLG1, M6811_OC2F, M6811_TMSK1, M6811_OC2I },
- { M6811_INT_OUTCMP3, M6811_TFLG1, M6811_OC3F, M6811_TMSK1, M6811_OC3I },
- { M6811_INT_OUTCMP4, M6811_TFLG1, M6811_OC4F, M6811_TMSK1, M6811_OC4I },
- { M6811_INT_OUTCMP5, M6811_TFLG1, M6811_OC5F, M6811_TMSK1, M6811_OC5I },
-
- /* Input compare interrupts. */
- { M6811_INT_INCMP1, M6811_TFLG1, M6811_IC1F, M6811_TMSK1, M6811_IC1I },
- { M6811_INT_INCMP2, M6811_TFLG1, M6811_IC2F, M6811_TMSK1, M6811_IC2I },
- { M6811_INT_INCMP3, M6811_TFLG1, M6811_IC3F, M6811_TMSK1, M6811_IC3I },
-#if 0
- { M6811_INT_COPRESET, M6811_CONFIG, M6811_NOCOP, 0, 0 },
- { M6811_INT_COPFAIL, M6811_CONFIG, M6811_NOCOP, 0, 0 }
-#endif
-};
-
-#define TableSize(X) (sizeof X / sizeof(X[0]))
-#define CYCLES_MAX ((((signed64) 1) << 62) - 1)
-
-/* Initialize the interrupts of the processor. */
-int
-interrupts_initialize (struct _sim_cpu *proc)
-{
- struct interrupts *interrupts = &proc->cpu_interrupts;
- int i;
-
- interrupts->cpu = proc;
- interrupts->pending_mask = 0;
- interrupts->vectors_addr = 0xffc0;
- interrupts->nb_interrupts_raised = 0;
- interrupts->min_mask_cycles = CYCLES_MAX;
- interrupts->max_mask_cycles = 0;
- interrupts->last_mask_cycles = 0;
- interrupts->start_mask_cycle = -1;
- interrupts->xirq_start_mask_cycle = -1;
- interrupts->xirq_max_mask_cycles = 0;
- interrupts->xirq_min_mask_cycles = CYCLES_MAX;
- interrupts->xirq_last_mask_cycles = 0;
-
- for (i = 0; i < M6811_INT_NUMBER; i++)
- {
- interrupts->interrupt_order[i] = i;
- }
- return 0;
-}
-
-
-/* Update the mask of pending interrupts. This operation must be called
- when the state of some 68HC11 IO registers changes. It looks the
- different registers that indicate a pending interrupt (timer, SCI, SPI,
- ...) and records the interrupt if it's there and enabled. */
-void
-interrupts_update_pending (struct interrupts *interrupts)
-{
- int i;
- uint8 *ioregs;
- unsigned long clear_mask;
- unsigned long set_mask;
-
- clear_mask = 0;
- set_mask = 0;
- ioregs = &interrupts->cpu->ios[0];
-
- for (i = 0; i < TableSize(idefs); i++)
- {
- struct interrupt_def *idef = &idefs[i];
- uint8 data;
-
- /* Look if the interrupt is enabled. */
- if (idef->enable_paddr)
- {
- data = ioregs[idef->enable_paddr];
- if (!(data & idef->enabled_mask))
- {
- /* Disable it. */
- clear_mask |= (1 << idef->int_number);
- continue;
- }
- }
-
- /* Interrupt is enabled, see if it's there. */
- data = ioregs[idef->int_paddr];
- if (!(data & idef->int_mask))
- {
- /* Disable it. */
- clear_mask |= (1 << idef->int_number);
- continue;
- }
-
- /* Ok, raise it. */
- set_mask |= (1 << idef->int_number);
- }
-
- /* Some interrupts are shared (M6811_INT_SCI) so clear
- the interrupts before setting the new ones. */
- interrupts->pending_mask &= ~clear_mask;
- interrupts->pending_mask |= set_mask;
-}
-
-
-/* Finds the current active and non-masked interrupt.
- Returns the interrupt number (index in the vector table) or -1
- if no interrupt can be serviced. */
-int
-interrupts_get_current (struct interrupts *interrupts)
-{
- int i;
-
- if (interrupts->pending_mask == 0)
- return -1;
-
- /* SWI and illegal instructions are simulated by an interrupt.
- They are not maskable. */
- if (interrupts->pending_mask & (1 << M6811_INT_SWI))
- {
- interrupts->pending_mask &= ~(1 << M6811_INT_SWI);
- return M6811_INT_SWI;
- }
- if (interrupts->pending_mask & (1 << M6811_INT_ILLEGAL))
- {
- interrupts->pending_mask &= ~(1 << M6811_INT_ILLEGAL);
- return M6811_INT_ILLEGAL;
- }
-
- /* If there is a non maskable interrupt, go for it (unless we are masked
- by the X-bit. */
- if (interrupts->pending_mask & (1 << M6811_INT_XIRQ))
- {
- if (cpu_get_ccr_X (interrupts->cpu) == 0)
- {
- interrupts->pending_mask &= ~(1 << M6811_INT_XIRQ);
- return M6811_INT_XIRQ;
- }
- return -1;
- }
-
- /* Interrupts are masked, do nothing. */
- if (cpu_get_ccr_I (interrupts->cpu) == 1)
- {
- return -1;
- }
-
- /* Returns the first interrupt number which is pending.
- The interrupt priority is specified by the table `interrupt_order'.
- For these interrupts, the pending mask is cleared when the program
- performs some actions on the corresponding device. If the device
- is not reset, the interrupt remains and will be re-raised when
- we return from the interrupt (see 68HC11 pink book). */
- for (i = 0; i < M6811_INT_NUMBER; i++)
- {
- enum M6811_INT int_number = interrupts->interrupt_order[i];
-
- if (interrupts->pending_mask & (1 << int_number))
- {
- return int_number;
- }
- }
- return -1;
-}
-
-
-/* Process the current interrupt if there is one. This operation must
- be called after each instruction to handle the interrupts. If interrupts
- are masked, it does nothing. */
-int
-interrupts_process (struct interrupts *interrupts)
-{
- int id;
- uint8 ccr;
-
- /* See if interrupts are enabled/disabled and keep track of the
- number of cycles the interrupts are masked. Such information is
- then reported by the info command. */
- ccr = cpu_get_ccr (interrupts->cpu);
- if (ccr & M6811_I_BIT)
- {
- if (interrupts->start_mask_cycle < 0)
- interrupts->start_mask_cycle = cpu_current_cycle (interrupts->cpu);
- }
- else if (interrupts->start_mask_cycle >= 0
- && (ccr & M6811_I_BIT) == 0)
- {
- signed64 t = cpu_current_cycle (interrupts->cpu);
-
- t -= interrupts->start_mask_cycle;
- if (t < interrupts->min_mask_cycles)
- interrupts->min_mask_cycles = t;
- if (t > interrupts->max_mask_cycles)
- interrupts->max_mask_cycles = t;
- interrupts->start_mask_cycle = -1;
- interrupts->last_mask_cycles = t;
- }
- if (ccr & M6811_X_BIT)
- {
- if (interrupts->xirq_start_mask_cycle < 0)
- interrupts->xirq_start_mask_cycle
- = cpu_current_cycle (interrupts->cpu);
- }
- else if (interrupts->xirq_start_mask_cycle >= 0
- && (ccr & M6811_X_BIT) == 0)
- {
- signed64 t = cpu_current_cycle (interrupts->cpu);
-
- t -= interrupts->xirq_start_mask_cycle;
- if (t < interrupts->xirq_min_mask_cycles)
- interrupts->xirq_min_mask_cycles = t;
- if (t > interrupts->xirq_max_mask_cycles)
- interrupts->xirq_max_mask_cycles = t;
- interrupts->xirq_start_mask_cycle = -1;
- interrupts->xirq_last_mask_cycles = t;
- }
-
- id = interrupts_get_current (interrupts);
- if (id >= 0)
- {
- uint16 addr;
-
- cpu_push_all (interrupts->cpu);
- addr = memory_read16 (interrupts->cpu,
- interrupts->vectors_addr + id * 2);
- cpu_call (interrupts->cpu, addr);
-
- /* Now, protect from nested interrupts. */
- if (id == M6811_INT_XIRQ)
- {
- cpu_set_ccr_X (interrupts->cpu, 1);
- }
- else
- {
- cpu_set_ccr_I (interrupts->cpu, 1);
- }
-
- interrupts->nb_interrupts_raised++;
- cpu_add_cycles (interrupts->cpu, 14);
- return 1;
- }
- return 0;
-}
-
-void
-interrupts_raise (struct interrupts *interrupts, enum M6811_INT number)
-{
- interrupts->pending_mask |= (1 << number);
- interrupts->nb_interrupts_raised ++;
-}
-
-
-
-void
-interrupts_info (SIM_DESC sd, struct interrupts *interrupts)
-{
- signed64 t;
-
- sim_io_printf (sd, "Interrupts Info:\n");
- sim_io_printf (sd, " Interrupts raised: %lu\n",
- interrupts->nb_interrupts_raised);
-
- if (interrupts->start_mask_cycle >= 0)
- {
- t = cpu_current_cycle (interrupts->cpu);
-
- t -= interrupts->start_mask_cycle;
- if (t > interrupts->max_mask_cycles)
- interrupts->max_mask_cycles = t;
-
- sim_io_printf (sd, " Current interrupts masked sequence: %s\n",
- cycle_to_string (interrupts->cpu, t));
- }
- t = interrupts->min_mask_cycles == CYCLES_MAX ?
- interrupts->max_mask_cycles :
- interrupts->min_mask_cycles;
- sim_io_printf (sd, " Shortest interrupts masked sequence: %s\n",
- cycle_to_string (interrupts->cpu, t));
-
- t = interrupts->max_mask_cycles;
- sim_io_printf (sd, " Longest interrupts masked sequence: %s\n",
- cycle_to_string (interrupts->cpu, t));
-
- t = interrupts->last_mask_cycles;
- sim_io_printf (sd, " Last interrupts masked sequence: %s\n",
- cycle_to_string (interrupts->cpu, t));
-
- if (interrupts->xirq_start_mask_cycle >= 0)
- {
- t = cpu_current_cycle (interrupts->cpu);
-
- t -= interrupts->xirq_start_mask_cycle;
- if (t > interrupts->xirq_max_mask_cycles)
- interrupts->xirq_max_mask_cycles = t;
-
- sim_io_printf (sd, " XIRQ Current interrupts masked sequence: %s\n",
- cycle_to_string (interrupts->cpu, t));
- }
-
- t = interrupts->xirq_min_mask_cycles == CYCLES_MAX ?
- interrupts->xirq_max_mask_cycles :
- interrupts->xirq_min_mask_cycles;
- sim_io_printf (sd, " XIRQ Min interrupts masked sequence: %s\n",
- cycle_to_string (interrupts->cpu, t));
-
- t = interrupts->xirq_max_mask_cycles;
- sim_io_printf (sd, " XIRQ Max interrupts masked sequence: %s\n",
- cycle_to_string (interrupts->cpu, t));
-
- t = interrupts->xirq_last_mask_cycles;
- sim_io_printf (sd, " XIRQ Last interrupts masked sequence: %s\n",
- cycle_to_string (interrupts->cpu, t));
-}
diff --git a/sim/m68hc11/interrupts.h b/sim/m68hc11/interrupts.h
deleted file mode 100644
index 69afa540677..00000000000
--- a/sim/m68hc11/interrupts.h
+++ /dev/null
@@ -1,134 +0,0 @@
-/* interrupts.h -- 68HC11 Interrupts Emulation
- Copyright 1999, 2000, 2001 Free Software Foundation, Inc.
- Written by Stephane Carrez (stcarrez@worldnet.fr)
-
-This file is part of GDB, GAS, and the GNU binutils.
-
-GDB, GAS, and the GNU binutils are free software; you can redistribute
-them and/or modify them under the terms of the GNU General Public
-License as published by the Free Software Foundation; either version
-1, or (at your option) any later version.
-
-GDB, GAS, and the GNU binutils are distributed in the hope that they
-will be useful, but WITHOUT ANY WARRANTY; without even the implied
-warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See
-the GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License
-along with this file; see the file COPYING. If not, write to the Free
-Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
-
-#ifndef _M6811_SIM_INTERRUPTS_H
-#define _M6811_SIM_INTERRUPTS_H
-
-/* Definition of 68HC11 interrupts. These enum are used as an index
- in the interrupt table. */
-enum M6811_INT
-{
- M6811_INT_RESERVED1 = 0,
- M6811_INT_RESERVED2,
- M6811_INT_RESERVED3,
- M6811_INT_RESERVED4,
- M6811_INT_RESERVED5,
- M6811_INT_RESERVED6,
- M6811_INT_RESERVED7,
- M6811_INT_RESERVED8,
-
- M6811_INT_RESERVED9,
- M6811_INT_RESERVED10,
- M6811_INT_RESERVED11,
-
- M6811_INT_SCI,
- M6811_INT_SPI,
- M6811_INT_AINPUT,
- M6811_INT_AOVERFLOW,
- M6811_INT_TCTN,
-
- M6811_INT_OUTCMP5,
- M6811_INT_OUTCMP4,
- M6811_INT_OUTCMP3,
- M6811_INT_OUTCMP2,
- M6811_INT_OUTCMP1,
-
- M6811_INT_INCMP3,
- M6811_INT_INCMP2,
- M6811_INT_INCMP1,
-
- M6811_INT_RT,
- M6811_INT_IRQ,
- M6811_INT_XIRQ,
- M6811_INT_SWI,
- M6811_INT_ILLEGAL,
-
- M6811_INT_COPRESET,
- M6811_INT_COPFAIL,
-
- M6811_INT_RESET,
- M6811_INT_NUMBER
-};
-
-
-/* Structure to describe how to recognize an interrupt in the
- 68hc11 IO regs. */
-struct interrupt_def
-{
- enum M6811_INT int_number;
- unsigned char int_paddr;
- unsigned char int_mask;
- unsigned char enable_paddr;
- unsigned char enabled_mask;
-};
-
-/* Management of 68HC11 interrupts:
- - We use a table of 'interrupt_def' to describe the interrupts that must be
- raised depending on IO register flags (enable and present flags).
- - We keep a mask of pending interrupts. This mask is refreshed by
- calling 'interrupts_update_pending'. It must be refreshed each time
- an IO register is changed.
- - 'interrupts_process' must be called after each insn. It has two purposes:
- first it maintains a min/max count of CPU cycles between which interrupts
- are masked; second it checks for pending interrupts and raise one if
- interrupts are enabled. */
-struct interrupts {
- struct _sim_cpu *cpu;
-
- /* Mask of current pending interrupts. */
- unsigned long pending_mask;
-
- /* Address of vector table. This is set depending on the
- 68hc11 init mode. */
- uint16 vectors_addr;
-
- /* Priority order of interrupts. This is controlled by setting the HPRIO
- IO register. */
- enum M6811_INT interrupt_order[M6811_INT_NUMBER];
-
- /* Simulator statistics to report useful debug information to users. */
-
- /* - Max/Min number of CPU cycles executed with interrupts masked. */
- signed64 start_mask_cycle;
- signed64 min_mask_cycles;
- signed64 max_mask_cycles;
- signed64 last_mask_cycles;
-
- /* - Same for XIRQ. */
- signed64 xirq_start_mask_cycle;
- signed64 xirq_min_mask_cycles;
- signed64 xirq_max_mask_cycles;
- signed64 xirq_last_mask_cycles;
-
- /* - Total number of interrupts raised. */
- unsigned long nb_interrupts_raised;
-};
-
-extern int interrupts_initialize (struct _sim_cpu* cpu);
-extern void interrupts_update_pending (struct interrupts* interrupts);
-extern int interrupts_get_current (struct interrupts* interrupts);
-extern int interrupts_process (struct interrupts* interrupts);
-extern void interrupts_raise (struct interrupts* interrupts,
- enum M6811_INT number);
-
-extern void interrupts_info (SIM_DESC sd,
- struct interrupts* interrupts);
-
-#endif
diff --git a/sim/m68hc11/m68hc11_sim.c b/sim/m68hc11/m68hc11_sim.c
deleted file mode 100644
index 1beef6d4115..00000000000
--- a/sim/m68hc11/m68hc11_sim.c
+++ /dev/null
@@ -1,1193 +0,0 @@
-/* m6811_cpu.c -- 68HC11&68HC12 CPU Emulation
- Copyright 1999, 2000, 2001 Free Software Foundation, Inc.
- Written by Stephane Carrez (stcarrez@worldnet.fr)
-
-This file is part of GDB, GAS, and the GNU binutils.
-
-GDB, GAS, and the GNU binutils are free software; you can redistribute
-them and/or modify them under the terms of the GNU General Public
-License as published by the Free Software Foundation; either version
-1, or (at your option) any later version.
-
-GDB, GAS, and the GNU binutils are distributed in the hope that they
-will be useful, but WITHOUT ANY WARRANTY; without even the implied
-warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See
-the GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License
-along with this file; see the file COPYING. If not, write to the Free
-Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
-
-#include "sim-main.h"
-#include "sim-assert.h"
-#include "sim-module.h"
-#include "sim-options.h"
-
-void cpu_free_frame (sim_cpu* cpu, struct cpu_frame *frame);
-
-enum {
- OPTION_CPU_RESET = OPTION_START,
- OPTION_EMUL_OS,
- OPTION_CPU_CONFIG,
- OPTION_CPU_MODE
-};
-
-static DECLARE_OPTION_HANDLER (cpu_option_handler);
-
-static const OPTION cpu_options[] =
-{
- { {"cpu-reset", no_argument, NULL, OPTION_CPU_RESET },
- '\0', NULL, "Reset the CPU",
- cpu_option_handler },
-
- { {"emulos", no_argument, NULL, OPTION_EMUL_OS },
- '\0', NULL, "Emulate some OS system calls (read, write, ...)",
- cpu_option_handler },
-
- { {"cpu-config", required_argument, NULL, OPTION_CPU_CONFIG },
- '\0', NULL, "Specify the initial CPU configuration register",
- cpu_option_handler },
-
- { {NULL, no_argument, NULL, 0}, '\0', NULL, NULL, NULL }
-};
-
-
-static SIM_RC
-cpu_option_handler (SIM_DESC sd, sim_cpu *cpu,
- int opt, char *arg, int is_command)
-{
- sim_cpu *cpu;
- int val;
-
- cpu = STATE_CPU (sd, 0);
- switch (opt)
- {
- case OPTION_CPU_RESET:
- sim_board_reset (sd);
- break;
-
- case OPTION_EMUL_OS:
- cpu->cpu_emul_syscall = 1;
- break;
-
- case OPTION_CPU_CONFIG:
- if (sscanf(arg, "0x%x", &val) == 1
- || sscanf(arg, "%d", &val) == 1)
- {
- cpu->cpu_config = val;
- cpu->cpu_use_local_config = 1;
- }
- else
- cpu->cpu_use_local_config = 0;
- break;
-
- case OPTION_CPU_MODE:
- break;
- }
-
- return SIM_RC_OK;
-}
-
-/* Tentative to keep track of the cpu frame. */
-struct cpu_frame*
-cpu_find_frame (sim_cpu *cpu, uint16 sp)
-{
- struct cpu_frame_list *flist;
-
- flist = cpu->cpu_frames;
- while (flist)
- {
- struct cpu_frame *frame;
-
- frame = flist->frame;
- while (frame)
- {
- if (frame->sp_low <= sp && frame->sp_high >= sp)
- {
- cpu->cpu_current_frame = flist;
- return frame;
- }
-
- frame = frame->up;
- }
- flist = flist->next;
- }
- return 0;
-}
-
-struct cpu_frame_list*
-cpu_create_frame_list (sim_cpu *cpu)
-{
- struct cpu_frame_list *flist;
-
- flist = (struct cpu_frame_list*) malloc (sizeof (struct cpu_frame_list));
- flist->frame = 0;
- flist->next = cpu->cpu_frames;
- flist->prev = 0;
- if (flist->next)
- flist->next->prev = flist;
- cpu->cpu_frames = flist;
- cpu->cpu_current_frame = flist;
- return flist;
-}
-
-void
-cpu_remove_frame_list (sim_cpu *cpu, struct cpu_frame_list *flist)
-{
- struct cpu_frame *frame;
-
- if (flist->prev == 0)
- cpu->cpu_frames = flist->next;
- else
- flist->prev->next = flist->next;
- if (flist->next)
- flist->next->prev = flist->prev;
-
- frame = flist->frame;
- while (frame)
- {
- struct cpu_frame* up = frame->up;
- cpu_free_frame (cpu, frame);
- frame = up;
- }
- free (flist);
-}
-
-
-struct cpu_frame*
-cpu_create_frame (sim_cpu *cpu, uint16 pc, uint16 sp)
-{
- struct cpu_frame *frame;
-
- frame = (struct cpu_frame*) malloc (sizeof(struct cpu_frame));
- frame->up = 0;
- frame->pc = pc;
- frame->sp_low = sp;
- frame->sp_high = sp;
- return frame;
-}
-
-void
-cpu_free_frame (sim_cpu *cpu, struct cpu_frame *frame)
-{
- free (frame);
-}
-
-uint16
-cpu_frame_reg (sim_cpu *cpu, uint16 rn)
-{
- struct cpu_frame *frame;
-
- if (cpu->cpu_current_frame == 0)
- return 0;
-
- frame = cpu->cpu_current_frame->frame;
- while (frame)
- {
- if (rn == 0)
- return frame->sp_high;
- frame = frame->up;
- rn--;
- }
- return 0;
-}
-
-void
-cpu_call (sim_cpu *cpu, uint16 addr)
-{
-#if HAVE_FRAME
- uint16 pc = cpu->cpu_insn_pc;
- uint16 sp;
- struct cpu_frame_list *flist;
- struct cpu_frame* frame;
- struct cpu_frame* new_frame;
-#endif
-
- cpu_set_pc (cpu, addr);
-#if HAVE_FRAME
- sp = cpu_get_sp (cpu);
-
- cpu->cpu_need_update_frame = 0;
- flist = cpu->cpu_current_frame;
- if (flist == 0)
- flist = cpu_create_frame_list (cpu);
-
- frame = flist->frame;
- if (frame && frame->sp_low > sp)
- frame->sp_low = sp;
-
- new_frame = cpu_create_frame (cpu, pc, sp);
- new_frame->up = frame;
- flist->frame = new_frame;
-#endif
-}
-
-void
-cpu_update_frame (sim_cpu *cpu, int do_create)
-{
-#if HAVE_FRAME
- struct cpu_frame *frame;
-
- frame = cpu_find_frame (cpu, cpu_get_sp (cpu));
- if (frame)
- {
- while (frame != cpu->cpu_current_frame->frame)
- {
- struct cpu_frame* up;
-
- up = cpu->cpu_current_frame->frame->up;
- cpu_free_frame (cpu, cpu->cpu_current_frame->frame);
- cpu->cpu_current_frame->frame = up;
- }
- return;
- }
-
- if (do_create)
- {
- cpu_create_frame_list (cpu);
- frame = cpu_create_frame (cpu, cpu_get_pc (cpu), cpu_get_sp (cpu));
- cpu->cpu_current_frame->frame = frame;
- }
-#endif
-}
-
-void
-cpu_return (sim_cpu *cpu)
-{
-#if HAVE_FRAME
- uint16 sp = cpu_get_sp (cpu);
- struct cpu_frame *frame;
- struct cpu_frame_list *flist;
-
- cpu->cpu_need_update_frame = 0;
- flist = cpu->cpu_current_frame;
- if (flist && flist->frame && flist->frame->up)
- {
- frame = flist->frame->up;
- if (frame->sp_low <= sp && frame->sp_high >= sp)
- {
- cpu_free_frame (cpu, flist->frame);
- flist->frame = frame;
- return;
- }
- }
- cpu_update_frame (cpu, 1);
-#endif
-}
-
-void
-cpu_print_frame (SIM_DESC sd, sim_cpu *cpu)
-{
- struct cpu_frame* frame;
- int level = 0;
-
- if (cpu->cpu_current_frame == 0 || cpu->cpu_current_frame->frame == 0)
- {
- sim_io_printf (sd, "No frame.\n");
- return;
- }
- sim_io_printf (sd, " # PC SP-L SP-H\n");
- frame = cpu->cpu_current_frame->frame;
- while (frame)
- {
- sim_io_printf (sd, "%3d 0x%04x 0x%04x 0x%04x\n",
- level, frame->pc, frame->sp_low, frame->sp_high);
- frame = frame->up;
- level++;
- }
-}
-
-/* Set the stack pointer and re-compute the current frame. */
-void
-cpu_set_sp (sim_cpu *cpu, uint16 val)
-{
- cpu->cpu_regs.sp = val;
- cpu_update_frame (cpu, 0);
-}
-
-uint16
-cpu_get_reg (sim_cpu* cpu, uint8 reg)
-{
- switch (reg)
- {
- case 0:
- return cpu_get_x (cpu);
-
- case 1:
- return cpu_get_y (cpu);
-
- case 2:
- return cpu_get_sp (cpu);
-
- case 3:
- return cpu_get_pc (cpu);
-
- default:
- return 0;
- }
-}
-
-uint16
-cpu_get_src_reg (sim_cpu* cpu, uint8 reg)
-{
- switch (reg)
- {
- case 0:
- return cpu_get_a (cpu);
-
- case 1:
- return cpu_get_b (cpu);
-
- case 2:
- return cpu_get_ccr (cpu);
-
- case 3:
- return cpu_get_tmp3 (cpu);
-
- case 4:
- return cpu_get_d (cpu);
-
- case 5:
- return cpu_get_x (cpu);
-
- case 6:
- return cpu_get_y (cpu);
-
- case 7:
- return cpu_get_sp (cpu);
-
- default:
- return 0;
- }
-}
-
-void
-cpu_set_dst_reg (sim_cpu* cpu, uint8 reg, uint16 val)
-{
- switch (reg)
- {
- case 0:
- cpu_set_a (cpu, val);
- break;
-
- case 1:
- cpu_set_b (cpu, val);
- break;
-
- case 2:
- cpu_set_ccr (cpu, val);
- break;
-
- case 3:
- cpu_set_tmp2 (cpu, val);
- break;
-
- case 4:
- cpu_set_d (cpu, val);
- break;
-
- case 5:
- cpu_set_x (cpu, val);
- break;
-
- case 6:
- cpu_set_y (cpu, val);
- break;
-
- case 7:
- cpu_set_sp (cpu, val);
- break;
-
- default:
- break;
- }
-}
-
-void
-cpu_set_reg (sim_cpu* cpu, uint8 reg, uint16 val)
-{
- switch (reg)
- {
- case 0:
- cpu_set_x (cpu, val);
- break;
-
- case 1:
- cpu_set_y (cpu, val);
- break;
-
- case 2:
- cpu_set_sp (cpu, val);
- break;
-
- case 3:
- cpu_set_pc (cpu, val);
- break;
-
- default:
- break;
- }
-}
-
-/* Returns the address of a 68HC12 indexed operand.
- Pre and post modifications are handled on the source register. */
-uint16
-cpu_get_indexed_operand_addr (sim_cpu* cpu, int restrict)
-{
- uint8 reg;
- uint16 sval;
- uint16 addr;
- uint8 code;
-
- code = cpu_fetch8 (cpu);
-
- /* n,r with 5-bit signed constant. */
- if ((code & 0x20) == 0)
- {
- reg = (code >> 6) & 3;
- sval = (code & 0x1f);
- if (code & 0x10)
- sval |= 0xfff0;
-
- addr = cpu_get_reg (cpu, reg);
- addr += sval;
- }
-
- /* Auto pre/post increment/decrement. */
- else if ((code & 0xc0) != 0xc0)
- {
- reg = (code >> 6) & 3;
- sval = (code & 0x0f);
- if (sval & 0x8)
- {
- sval |= 0xfff0;
- }
- else
- {
- sval = sval + 1;
- }
- addr = cpu_get_reg (cpu, reg);
- cpu_set_reg (cpu, reg, addr + sval);
- if ((code & 0x10) == 0)
- {
- addr += sval;
- }
- }
-
- /* [n,r] 16-bits offset indexed indirect. */
- else if ((code & 0x07) == 3)
- {
- if (restrict)
- {
- return 0;
- }
- reg = (code >> 3) & 0x03;
- addr = cpu_get_reg (cpu, reg);
- addr += cpu_fetch16 (cpu);
- addr = memory_read16 (cpu, addr);
- cpu_add_cycles (cpu, 1);
- }
- else if ((code & 0x4) == 0)
- {
- if (restrict)
- {
- return 0;
- }
- reg = (code >> 3) & 0x03;
- addr = cpu_get_reg (cpu, reg);
- if (code & 0x2)
- {
- sval = cpu_fetch16 (cpu);
- cpu_add_cycles (cpu, 1);
- }
- else
- {
- sval = cpu_fetch8 (cpu);
- if (code & 0x1)
- sval |= 0xff00;
- cpu_add_cycles (cpu, 1);
- }
- addr += sval;
- }
- else
- {
- reg = (code >> 3) & 0x03;
- addr = cpu_get_reg (cpu, reg);
- switch (code & 3)
- {
- case 0:
- addr += cpu_get_a (cpu);
- break;
- case 1:
- addr += cpu_get_b (cpu);
- break;
- case 2:
- addr += cpu_get_d (cpu);
- break;
- case 3:
- default:
- addr += cpu_get_d (cpu);
- addr = memory_read16 (cpu, addr);
- cpu_add_cycles (cpu, 1);
- break;
- }
- }
-
- return addr;
-}
-
-uint8
-cpu_get_indexed_operand8 (sim_cpu* cpu, int restrict)
-{
- uint16 addr;
-
- addr = cpu_get_indexed_operand_addr (cpu, restrict);
- return memory_read8 (cpu, addr);
-}
-
-uint16
-cpu_get_indexed_operand16 (sim_cpu* cpu, int restrict)
-{
- uint16 addr;
-
- addr = cpu_get_indexed_operand_addr (cpu, restrict);
- return memory_read16 (cpu, addr);
-}
-
-void
-cpu_move8 (sim_cpu *cpu, uint8 code)
-{
- uint8 src;
- uint16 addr;
-
- switch (code)
- {
- case 0x0b:
- src = cpu_fetch8 (cpu);
- addr = cpu_fetch16 (cpu);
- break;
-
- case 0x08:
- addr = cpu_get_indexed_operand_addr (cpu, 1);
- src = cpu_fetch8 (cpu);
- break;
-
- case 0x0c:
- addr = cpu_fetch16 (cpu);
- src = memory_read8 (cpu, addr);
- addr = cpu_fetch16 (cpu);
- break;
-
- case 0x09:
- addr = cpu_get_indexed_operand_addr (cpu, 1);
- src = memory_read8 (cpu, cpu_fetch16 (cpu));
- break;
-
- case 0x0d:
- src = cpu_get_indexed_operand8 (cpu, 1);
- addr = cpu_fetch16 (cpu);
- break;
-
- case 0x0a:
- src = cpu_get_indexed_operand8 (cpu, 1);
- addr = cpu_get_indexed_operand_addr (cpu, 1);
- break;
-
- }
- memory_write8 (cpu, addr, src);
-}
-
-void
-cpu_move16 (sim_cpu *cpu, uint8 code)
-{
- uint16 src;
- uint16 addr;
-
- switch (code)
- {
- case 0x03:
- src = cpu_fetch16 (cpu);
- addr = cpu_fetch16 (cpu);
- break;
-
- case 0x00:
- addr = cpu_get_indexed_operand_addr (cpu, 1);
- src = cpu_fetch16 (cpu);
- break;
-
- case 0x04:
- addr = cpu_fetch16 (cpu);
- src = memory_read16 (cpu, addr);
- addr = cpu_fetch16 (cpu);
- break;
-
- case 0x01:
- addr = cpu_get_indexed_operand_addr (cpu, 1);
- src = memory_read16 (cpu, cpu_fetch16 (cpu));
- break;
-
- case 0x05:
- src = cpu_get_indexed_operand16 (cpu, 1);
- addr = cpu_fetch16 (cpu);
- break;
-
- case 0x02:
- src = cpu_get_indexed_operand16 (cpu, 1);
- addr = cpu_get_indexed_operand_addr (cpu, 1);
- break;
-
- }
- memory_write16 (cpu, addr, src);
-}
-
-int
-cpu_initialize (SIM_DESC sd, sim_cpu *cpu)
-{
- int result;
-
- sim_add_option_table (sd, 0, cpu_options);
-
- memset (&cpu->cpu_regs, 0, sizeof(cpu->cpu_regs));
-
- cpu->cpu_absolute_cycle = 0;
- cpu->cpu_current_cycle = 0;
- cpu->cpu_emul_syscall = 1;
- cpu->cpu_running = 1;
- cpu->cpu_stop_on_interrupt = 0;
- cpu->cpu_frequency = 8 * 1000 * 1000;
- cpu->cpu_frames = 0;
- cpu->cpu_current_frame = 0;
- cpu->cpu_use_elf_start = 0;
- cpu->cpu_elf_start = 0;
- cpu->cpu_use_local_config = 0;
- cpu->cpu_config = M6811_NOSEC | M6811_NOCOP | M6811_ROMON |
- M6811_EEON;
- result = interrupts_initialize (cpu);
-
- cpu->cpu_is_initialized = 1;
- return result;
-}
-
-
-/* Reinitialize the processor after a reset. */
-int
-cpu_reset (sim_cpu *cpu)
-{
- cpu->cpu_need_update_frame = 0;
- cpu->cpu_current_frame = 0;
- while (cpu->cpu_frames)
- cpu_remove_frame_list (cpu, cpu->cpu_frames);
-
- /* Initialize the config register.
- It is only initialized at reset time. */
- memset (cpu->ios, 0, sizeof (cpu->ios));
- if (cpu->cpu_configured_arch->arch == bfd_arch_m68hc11)
- cpu->ios[M6811_INIT] = 0x1;
- else
- cpu->ios[M6811_INIT] = 0;
-
- /* Output compare registers set to 0xFFFF. */
- cpu->ios[M6811_TOC1_H] = 0xFF;
- cpu->ios[M6811_TOC1_L] = 0xFF;
- cpu->ios[M6811_TOC2_H] = 0xFF;
- cpu->ios[M6811_TOC2_L] = 0xFF;
- cpu->ios[M6811_TOC3_H] = 0xFF;
- cpu->ios[M6811_TOC4_L] = 0xFF;
- cpu->ios[M6811_TOC5_H] = 0xFF;
- cpu->ios[M6811_TOC5_L] = 0xFF;
-
- /* Setup the processor registers. */
- memset (&cpu->cpu_regs, 0, sizeof(cpu->cpu_regs));
- cpu->cpu_absolute_cycle = 0;
- cpu->cpu_current_cycle = 0;
- cpu->cpu_is_initialized = 0;
-
- /* Reinitialize the CPU operating mode. */
- cpu->ios[M6811_HPRIO] = cpu->cpu_mode;
- return 0;
-}
-
-/* Reinitialize the processor after a reset. */
-int
-cpu_restart (sim_cpu *cpu)
-{
- uint16 addr;
-
- /* Get CPU starting address depending on the CPU mode. */
- if (cpu->cpu_use_elf_start == 0)
- {
- switch ((cpu->ios[M6811_HPRIO]) & (M6811_SMOD | M6811_MDA))
- {
- /* Single Chip */
- default:
- case 0 :
- addr = memory_read16 (cpu, 0xFFFE);
- break;
-
- /* Expanded Multiplexed */
- case M6811_MDA:
- addr = memory_read16 (cpu, 0xFFFE);
- break;
-
- /* Special Bootstrap */
- case M6811_SMOD:
- addr = 0;
- break;
-
- /* Factory Test */
- case M6811_MDA | M6811_SMOD:
- addr = memory_read16 (cpu, 0xFFFE);
- break;
- }
- }
- else
- {
- addr = cpu->cpu_elf_start;
- }
-
- /* Setup the processor registers. */
- cpu->cpu_insn_pc = addr;
- cpu->cpu_regs.pc = addr;
- cpu->cpu_regs.ccr = M6811_X_BIT | M6811_I_BIT | M6811_S_BIT;
- cpu->cpu_absolute_cycle = 0;
- cpu->cpu_is_initialized = 1;
- cpu->cpu_current_cycle = 0;
-
- cpu_call (cpu, addr);
-
- return 0;
-}
-
-void
-print_io_reg_desc (SIM_DESC sd, io_reg_desc *desc, int val, int mode)
-{
- while (desc->mask)
- {
- if (val & desc->mask)
- sim_io_printf (sd, "%s",
- mode == 0 ? desc->short_name : desc->long_name);
- desc++;
- }
-}
-
-void
-print_io_byte (SIM_DESC sd, const char *name, io_reg_desc *desc,
- uint8 val, uint16 addr)
-{
- sim_io_printf (sd, " %-9.9s @ 0x%04x 0x%02x ", name, addr, val);
- if (desc)
- print_io_reg_desc (sd, desc, val, 0);
-}
-
-void
-cpu_ccr_update_tst8 (sim_cpu *proc, uint8 val)
-{
- cpu_set_ccr_V (proc, 0);
- cpu_set_ccr_N (proc, val & 0x80 ? 1 : 0);
- cpu_set_ccr_Z (proc, val == 0 ? 1 : 0);
-}
-
-
-uint16
-cpu_fetch_relbranch (sim_cpu *cpu)
-{
- uint16 addr = (uint16) cpu_fetch8 (cpu);
-
- if (addr & 0x0080)
- {
- addr |= 0xFF00;
- }
- addr += cpu->cpu_regs.pc;
- return addr;
-}
-
-uint16
-cpu_fetch_relbranch16 (sim_cpu *cpu)
-{
- uint16 addr = cpu_fetch16 (cpu);
-
- addr += cpu->cpu_regs.pc;
- return addr;
-}
-
-/* Push all the CPU registers (when an interruption occurs). */
-void
-cpu_push_all (sim_cpu *cpu)
-{
- if (cpu->cpu_configured_arch->arch == bfd_arch_m68hc11)
- {
- cpu_m68hc11_push_uint16 (cpu, cpu->cpu_regs.pc);
- cpu_m68hc11_push_uint16 (cpu, cpu->cpu_regs.iy);
- cpu_m68hc11_push_uint16 (cpu, cpu->cpu_regs.ix);
- cpu_m68hc11_push_uint16 (cpu, cpu->cpu_regs.d);
- cpu_m68hc11_push_uint8 (cpu, cpu->cpu_regs.ccr);
- }
- else
- {
- cpu_m68hc12_push_uint16 (cpu, cpu->cpu_regs.pc);
- cpu_m68hc12_push_uint16 (cpu, cpu->cpu_regs.iy);
- cpu_m68hc12_push_uint16 (cpu, cpu->cpu_regs.ix);
- cpu_m68hc12_push_uint16 (cpu, cpu->cpu_regs.d);
- cpu_m68hc12_push_uint8 (cpu, cpu->cpu_regs.ccr);
- }
-}
-
-/* Simulation of the dbcc/ibcc/tbcc 68HC12 conditional branch operations. */
-void
-cpu_dbcc (sim_cpu* cpu)
-{
- uint8 code;
- uint16 addr;
- uint16 inc;
- uint16 reg;
-
- code = cpu_fetch8 (cpu);
- switch (code & 0xc0)
- {
- case 0x80: /* ibcc */
- inc = 1;
- break;
- case 0x40: /* tbcc */
- inc = 0;
- break;
- case 0: /* dbcc */
- inc = -1;
- break;
- default:
- abort ();
- break;
- }
-
- addr = cpu_fetch8 (cpu);
- if (code & 0x10)
- addr |= 0xff00;
-
- addr += cpu_get_pc (cpu);
- reg = cpu_get_src_reg (cpu, code & 0x07);
- reg += inc;
-
- /* Branch according to register value. */
- if ((reg != 0 && (code & 0x20)) || (reg == 0 && !(code & 0x20)))
- {
- cpu_set_pc (cpu, addr);
- }
- cpu_set_dst_reg (cpu, code & 0x07, reg);
-}
-
-void
-cpu_exg (sim_cpu* cpu, uint8 code)
-{
- uint8 r1, r2;
- uint16 src1;
- uint16 src2;
-
- r1 = (code >> 4) & 0x07;
- r2 = code & 0x07;
- if (code & 0x80)
- {
- src1 = cpu_get_src_reg (cpu, r1);
- src2 = cpu_get_src_reg (cpu, r2);
- if (r2 == 1 || r2 == 2)
- src2 |= 0xff00;
-
- cpu_set_dst_reg (cpu, r2, src1);
- cpu_set_dst_reg (cpu, r1, src2);
- }
- else
- {
- src1 = cpu_get_src_reg (cpu, r1);
-
- /* Sign extend the 8-bit registers (A, B, CCR). */
- if ((r1 == 0 || r1 == 1 || r1 == 2) && (src1 & 0x80))
- src1 |= 0xff00;
-
- cpu_set_dst_reg (cpu, r2, src1);
- }
-}
-
-/* Handle special instructions. */
-void
-cpu_special (sim_cpu *cpu, enum M6811_Special special)
-{
- switch (special)
- {
- case M6811_RTI:
- {
- uint8 ccr;
-
- ccr = cpu_m68hc11_pop_uint8 (cpu);
- cpu_set_ccr (cpu, ccr);
- cpu_set_d (cpu, cpu_m68hc11_pop_uint16 (cpu));
- cpu_set_x (cpu, cpu_m68hc11_pop_uint16 (cpu));
- cpu_set_y (cpu, cpu_m68hc11_pop_uint16 (cpu));
- cpu_set_pc (cpu, cpu_m68hc11_pop_uint16 (cpu));
- cpu_return (cpu);
- break;
- }
-
- case M6812_RTI:
- {
- uint8 ccr;
-
- ccr = cpu_m68hc12_pop_uint8 (cpu);
- cpu_set_ccr (cpu, ccr);
- cpu_set_d (cpu, cpu_m68hc12_pop_uint16 (cpu));
- cpu_set_x (cpu, cpu_m68hc12_pop_uint16 (cpu));
- cpu_set_y (cpu, cpu_m68hc12_pop_uint16 (cpu));
- cpu_set_pc (cpu, cpu_m68hc12_pop_uint16 (cpu));
- cpu_return (cpu);
- break;
- }
-
- case M6811_WAI:
- /* In the ELF-start mode, we are in a special mode where
- the WAI corresponds to an exit. */
- if (cpu->cpu_use_elf_start)
- {
- cpu_set_pc (cpu, cpu->cpu_insn_pc);
- sim_engine_halt (CPU_STATE (cpu), cpu,
- NULL, NULL_CIA, sim_exited,
- cpu_get_d (cpu));
- return;
- }
- /* SCz: not correct... */
- cpu_push_all (cpu);
- break;
-
- case M6811_SWI:
- interrupts_raise (&cpu->cpu_interrupts, M6811_INT_SWI);
- interrupts_process (&cpu->cpu_interrupts);
- break;
-
- case M6811_EMUL_SYSCALL:
- case M6811_ILLEGAL:
- if (cpu->cpu_emul_syscall)
- {
- uint8 op = memory_read8 (cpu,
- cpu_get_pc (cpu) - 1);
- if (op == 0x41)
- {
- cpu_set_pc (cpu, cpu->cpu_insn_pc);
- sim_engine_halt (CPU_STATE (cpu), cpu,
- NULL, NULL_CIA, sim_exited,
- cpu_get_d (cpu));
- return;
- }
- else
- {
- emul_os (op, cpu);
- }
- return;
- }
-
- interrupts_raise (&cpu->cpu_interrupts, M6811_INT_ILLEGAL);
- interrupts_process (&cpu->cpu_interrupts);
- break;
-
- case M6811_TEST:
- case M6812_BGND:
- {
- SIM_DESC sd;
-
- sd = CPU_STATE (cpu);
-
- /* Breakpoint instruction if we are under gdb. */
- if (STATE_OPEN_KIND (sd) == SIM_OPEN_DEBUG)
- {
- cpu->cpu_regs.pc --;
- sim_engine_halt (CPU_STATE (cpu), cpu,
- 0, cpu_get_pc (cpu), sim_stopped,
- SIM_SIGTRAP);
- }
- /* else this is a nop but not in test factory mode. */
- break;
- }
-
- case M6812_IDIVS:
- {
- int32 src1 = (int16) cpu_get_d (cpu);
- int32 src2 = (int16) cpu_get_x (cpu);
-
- if (src2 == 0)
- {
- cpu_set_ccr_C (cpu, 1);
- }
- else
- {
- cpu_set_d (cpu, src1 % src2);
- src1 = src1 / src2;
- cpu_set_x (cpu, src1);
- cpu_set_ccr_C (cpu, 0);
- cpu_set_ccr_Z (cpu, src1 == 0);
- cpu_set_ccr_N (cpu, src1 & 0x8000);
- cpu_set_ccr_V (cpu, src1 >= 32768 || src1 < -32768);
- }
- }
- break;
-
- case M6812_EDIV:
- {
- uint32 src1 = (uint32) cpu_get_x (cpu);
- uint32 src2 = (uint32) (cpu_get_y (cpu) << 16)
- | (uint32) (cpu_get_d (cpu));
-
- if (src1 == 0)
- {
- cpu_set_ccr_C (cpu, 1);
- }
- else
- {
- cpu_set_ccr_C (cpu, 0);
- cpu_set_d (cpu, src2 % src1);
- src2 = src2 / src1;
- cpu_set_y (cpu, src2);
- cpu_set_ccr_Z (cpu, src2 == 0);
- cpu_set_ccr_N (cpu, (src2 & 0x8000) != 0);
- cpu_set_ccr_V (cpu, (src2 & 0xffff0000) != 0);
- }
- }
- break;
-
- case M6812_EDIVS:
- {
- int32 src1 = (int16) cpu_get_x (cpu);
- int32 src2 = (uint32) (cpu_get_y (cpu) << 16)
- | (uint32) (cpu_get_d (cpu));
-
- if (src1 == 0)
- {
- cpu_set_ccr_C (cpu, 1);
- }
- else
- {
- cpu_set_ccr_C (cpu, 0);
- cpu_set_d (cpu, src2 % src1);
- src2 = src2 / src1;
- cpu_set_y (cpu, src2);
- cpu_set_ccr_Z (cpu, src2 == 0);
- cpu_set_ccr_N (cpu, (src2 & 0x8000) != 0);
- cpu_set_ccr_V (cpu, src2 > 32767 || src2 < -32768);
- }
- }
- break;
-
- case M6812_EMULS:
- {
- int32 src1, src2;
-
- src1 = (int16) cpu_get_d (cpu);
- src2 = (int16) cpu_get_y (cpu);
- src1 = src1 * src2;
- cpu_set_d (cpu, src1 & 0x0ffff);
- cpu_set_y (cpu, src1 >> 16);
- cpu_set_ccr_Z (cpu, src1 == 0);
- cpu_set_ccr_N (cpu, (src1 & 0x80000000) != 0);
- cpu_set_ccr_C (cpu, (src1 & 0x00008000) != 0);
- }
- break;
-
- case M6812_EMACS:
- {
- int32 src1, src2;
- uint16 addr;
-
- addr = cpu_fetch16 (cpu);
- src1 = (int16) memory_read16 (cpu, cpu_get_x (cpu));
- src2 = (int16) memory_read16 (cpu, cpu_get_y (cpu));
- src1 = src1 * src2;
- src2 = (((uint32) memory_read16 (cpu, addr)) << 16)
- | (uint32) memory_read16 (cpu, addr + 2);
-
- memory_write16 (cpu, addr, (src1 + src2) >> 16);
- memory_write16 (cpu, addr + 2, (src1 + src2));
-
-
- }
- break;
-
- case M6812_ETBL:
- default:
- sim_engine_halt (CPU_STATE (cpu), cpu, NULL,
- cpu_get_pc (cpu), sim_stopped,
- SIM_SIGILL);
- break;
- }
-}
-
-
-void
-cpu_single_step (sim_cpu *cpu)
-{
- cpu->cpu_current_cycle = 0;
- cpu->cpu_insn_pc = cpu_get_pc (cpu);
-
- /* Handle the pending interrupts. If an interrupt is handled,
- treat this as an single step. */
- if (interrupts_process (&cpu->cpu_interrupts))
- {
- cpu->cpu_absolute_cycle += cpu->cpu_current_cycle;
- return;
- }
-
- /* printf("PC = 0x%04x\n", cpu_get_pc (cpu));*/
- cpu->cpu_interpretor (cpu);
- cpu->cpu_absolute_cycle += cpu->cpu_current_cycle;
-}
-
-/* VARARGS */
-void
-sim_memory_error (sim_cpu *cpu, SIM_SIGNAL excep,
- uint16 addr, const char *message, ...)
-{
- char buf[1024];
- va_list args;
-
- va_start (args, message);
- vsprintf (buf, message, args);
- va_end (args);
-
- printf("%s\n", buf);
- cpu_memory_exception (cpu, excep, addr, buf);
-}
-
-
-void
-cpu_memory_exception (sim_cpu *cpu, SIM_SIGNAL excep,
- uint16 addr, const char *message)
-{
- if (cpu->cpu_running == 0)
- return;
-
- cpu_set_pc (cpu, cpu->cpu_insn_pc);
- sim_engine_halt (CPU_STATE (cpu), cpu, NULL,
- cpu_get_pc (cpu), sim_stopped, excep);
-
-#if 0
- cpu->mem_exception = excep;
- cpu->fault_addr = addr;
- cpu->fault_msg = strdup (message);
-
- if (cpu->cpu_use_handler)
- {
- longjmp (&cpu->cpu_exception_handler, 1);
- }
- (* cpu->callback->printf_filtered)
- (cpu->callback, "Fault at 0x%04x: %s\n", addr, message);
-#endif
-}
-
-void
-cpu_info (SIM_DESC sd, sim_cpu *cpu)
-{
- sim_io_printf (sd, "CPU info:\n");
- sim_io_printf (sd, " Absolute cycle: %s\n",
- cycle_to_string (cpu, cpu->cpu_absolute_cycle));
-
- sim_io_printf (sd, " Syscall emulation: %s\n",
- cpu->cpu_emul_syscall ? "yes, via 0xcd <n>" : "no");
- sim_io_printf (sd, " Memory errors detection: %s\n",
- cpu->cpu_check_memory ? "yes" : "no");
- sim_io_printf (sd, " Stop on interrupt: %s\n",
- cpu->cpu_stop_on_interrupt ? "yes" : "no");
-}
-
diff --git a/sim/m68hc11/sim-main.h b/sim/m68hc11/sim-main.h
deleted file mode 100644
index a88c8000148..00000000000
--- a/sim/m68hc11/sim-main.h
+++ /dev/null
@@ -1,595 +0,0 @@
-/* sim-main.h -- Simulator for Motorola 68HC11 & 68HC12
- Copyright (C) 1999, 2000, 2001 Free Software Foundation, Inc.
- Written by Stephane Carrez (stcarrez@worldnet.fr)
-
-This file is part of GDB, the GNU debugger.
-
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License along
-with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
-
-#ifndef _SIM_MAIN_H
-#define _SIM_MAIN_H
-
-#define WITH_MODULO_MEMORY 1
-#define WITH_WATCHPOINTS 1
-#define SIM_HANDLES_LMA 1
-
-#include "sim-basics.h"
-
-typedef address_word sim_cia;
-
-#include "sim-signal.h"
-#include "sim-base.h"
-
-#include "bfd.h"
-
-#include "opcode/m68hc11.h"
-
-#include "callback.h"
-#include "remote-sim.h"
-#include "opcode/m68hc11.h"
-#include "sim-types.h"
-
-typedef unsigned8 uint8;
-typedef unsigned16 uint16;
-typedef signed16 int16;
-typedef unsigned32 uint32;
-typedef signed32 int32;
-typedef unsigned64 uint64;
-typedef signed64 int64;
-
-struct _sim_cpu;
-
-#include "interrupts.h"
-#include <setjmp.h>
-
-/* Specifies the level of mapping for the IO, EEprom, nvram and external
- RAM. IO registers are mapped over everything and the external RAM
- is last (ie, it can be hidden by everything above it in the list). */
-enum m68hc11_map_level
-{
- M6811_IO_LEVEL,
- M6811_EEPROM_LEVEL,
- M6811_NVRAM_LEVEL,
- M6811_RAM_LEVEL
-};
-
-enum cpu_type
-{
- CPU_M6811,
- CPU_M6812
-};
-
-#define X_REGNUM 0
-#define D_REGNUM 1
-#define Y_REGNUM 2
-#define SP_REGNUM 3
-#define PC_REGNUM 4
-#define A_REGNUM 5
-#define B_REGNUM 6
-#define PSW_REGNUM 7
-#define Z_REGNUM 8
-
-typedef struct m6811_regs {
- unsigned short d;
- unsigned short ix;
- unsigned short iy;
- unsigned short sp;
- unsigned short pc;
- unsigned char ccr;
-} m6811_regs;
-
-
-/* Description of 68HC11 IO registers. Such description is only provided
- for the info command to display the current setting of IO registers
- from GDB. */
-struct io_reg_desc
-{
- int mask;
- const char *short_name;
- const char *long_name;
-};
-typedef struct io_reg_desc io_reg_desc;
-
-extern void print_io_reg_desc (SIM_DESC sd, io_reg_desc *desc, int val,
- int mode);
-extern void print_io_byte (SIM_DESC sd, const char *name,
- io_reg_desc *desc, uint8 val, uint16 addr);
-
-
-/* List of special 68HC11&68HC12 instructions that are not handled by the
- 'gencode.c' generator. These complex instructions are implemented
- by 'cpu_special'. */
-enum M6811_Special
-{
- /* 68HC11 instructions. */
- M6811_DAA,
- M6811_EMUL_SYSCALL,
- M6811_ILLEGAL,
- M6811_RTI,
- M6811_STOP,
- M6811_SWI,
- M6811_TEST,
- M6811_WAI,
-
- /* 68HC12 instructions. */
- M6812_BGND,
- M6812_CALL,
- M6812_IDIVS,
- M6812_EDIV,
- M6812_EDIVS,
- M6812_EMACS,
- M6812_EMUL,
- M6812_EMULS,
- M6812_ETBL,
- M6812_MEM,
- M6812_REV,
- M6812_REVW,
- M6812_RTC,
- M6812_RTI,
- M6812_WAV
-};
-
-#define CPU_POP 1
-#define CPU_PUSH 2
-
-#define M6811_MAX_PORTS (0x03f+1)
-#define M6812_MAX_PORTS (0x3ff+1)
-#define MAX_PORTS (M6812_MAX_PORTS)
-
-/* Tentative to keep track of the stack frame.
- The frame is updated each time a call or a return are made.
- We also have to take into account changes of stack pointer
- (either thread switch or longjmp). */
-struct cpu_frame
-{
- struct cpu_frame *up;
- uint16 pc;
- uint16 sp_low;
- uint16 sp_high;
-};
-
-/* Represents a list of frames (or a thread). */
-struct cpu_frame_list
-{
- struct cpu_frame_list *next;
- struct cpu_frame_list *prev;
- struct cpu_frame *frame;
-};
-
-struct _sim_cpu;
-
-typedef void (* cpu_interp) (struct _sim_cpu*);
-
-struct _sim_cpu {
- /* CPU registers. */
- struct m6811_regs cpu_regs;
-
- /* CPU interrupts. */
- struct interrupts cpu_interrupts;
-
- struct cpu_frame_list *cpu_frames;
- struct cpu_frame_list *cpu_current_frame;
- int cpu_need_update_frame;
-
- /* Pointer to the interpretor routine. */
- cpu_interp cpu_interpretor;
-
- /* Pointer to the architecture currently configured in the simulator. */
- const struct bfd_arch_info *cpu_configured_arch;
-
- /* CPU absolute cycle time. The cycle time is updated after
- each instruction, by the number of cycles taken by the instruction.
- It is cleared only when reset occurs. */
- signed64 cpu_absolute_cycle;
-
- /* Number of cycles to increment after the current instruction.
- This is also the number of ticks for the generic event scheduler. */
- uint8 cpu_current_cycle;
- int cpu_emul_syscall;
- int cpu_is_initialized;
- int cpu_running;
- int cpu_check_memory;
- int cpu_stop_on_interrupt;
-
- /* When this is set, start execution of program at address specified
- in the ELF header. This is used for testing some programs that do not
- have an interrupt table linked with them. Programs created during the
- GCC validation are like this. A normal 68HC11 does not behave like
- this (unless there is some OS or downloadable feature). */
- int cpu_use_elf_start;
-
- /* The starting address specified in ELF header. */
- int cpu_elf_start;
-
- uint16 cpu_insn_pc;
-
- /* CPU frequency. This is the quartz frequency. It is divided by 4 to
- get the cycle time. This is used for the timer rate and for the baud
- rate generation. */
- unsigned long cpu_frequency;
-
- /* The mode in which the CPU is configured (MODA and MODB pins). */
- unsigned int cpu_mode;
-
- /* The cpu being configured. */
- enum cpu_type cpu_type;
-
- /* Initial value of the CONFIG register. */
- uint8 cpu_config;
- uint8 cpu_use_local_config;
-
- uint8 ios[MAX_PORTS];
-
- /* ... base type ... */
- sim_cpu_base base;
-};
-
-/* Returns the cpu absolute cycle time (A virtual counter incremented
- at each 68HC11 E clock). */
-#define cpu_current_cycle(PROC) ((PROC)->cpu_absolute_cycle)
-#define cpu_add_cycles(PROC,T) ((PROC)->cpu_current_cycle += (signed64) (T))
-#define cpu_is_running(PROC) ((PROC)->cpu_running)
-
-/* Get the IO/RAM base addresses depending on the M6811_INIT register. */
-#define cpu_get_io_base(PROC) \
- (((uint16)(((PROC)->ios[M6811_INIT]) & 0x0F))<<12)
-#define cpu_get_reg_base(PROC) \
- (((uint16)(((PROC)->ios[M6811_INIT]) & 0xF0))<<8)
-
-/* Returns the different CPU registers. */
-#define cpu_get_ccr(PROC) ((PROC)->cpu_regs.ccr)
-#define cpu_get_pc(PROC) ((PROC)->cpu_regs.pc)
-#define cpu_get_d(PROC) ((PROC)->cpu_regs.d)
-#define cpu_get_x(PROC) ((PROC)->cpu_regs.ix)
-#define cpu_get_y(PROC) ((PROC)->cpu_regs.iy)
-#define cpu_get_sp(PROC) ((PROC)->cpu_regs.sp)
-#define cpu_get_a(PROC) ((PROC->cpu_regs.d >> 8) & 0x0FF)
-#define cpu_get_b(PROC) ((PROC->cpu_regs.d) & 0x0FF)
-
-/* 68HC12 specific and Motorola internal registers. */
-#define cpu_get_tmp3(PROC) (0)
-#define cpu_get_tmp2(PROC) (0)
-
-#define cpu_set_d(PROC,VAL) (((PROC)->cpu_regs.d) = (VAL))
-#define cpu_set_x(PROC,VAL) (((PROC)->cpu_regs.ix) = (VAL))
-#define cpu_set_y(PROC,VAL) (((PROC)->cpu_regs.iy) = (VAL))
-
-/* 68HC12 specific and Motorola internal registers. */
-#define cpu_set_tmp3(PROC,VAL) (0)
-#define cpu_set_tmp2(PROC,VAL) (0)
-
-#if 0
-/* This is a function in m68hc11_sim.c to keep track of the frame. */
-#define cpu_set_sp(PROC,VAL) (((PROC)->cpu_regs.sp) = (VAL))
-#endif
-
-#define cpu_set_pc(PROC,VAL) (((PROC)->cpu_regs.pc) = (VAL))
-
-#define cpu_set_a(PROC,VAL) \
- cpu_set_d(PROC,((VAL) << 8) | cpu_get_b(PROC))
-#define cpu_set_b(PROC,VAL) \
- cpu_set_d(PROC,((cpu_get_a(PROC)) << 8)|(VAL & 0x0FF))
-
-#define cpu_set_ccr(PROC,VAL) ((PROC)->cpu_regs.ccr = (VAL))
-#define cpu_get_ccr_H(PROC) ((cpu_get_ccr(PROC) & M6811_H_BIT) ? 1: 0)
-#define cpu_get_ccr_X(PROC) ((cpu_get_ccr(PROC) & M6811_X_BIT) ? 1: 0)
-#define cpu_get_ccr_S(PROC) ((cpu_get_ccr(PROC) & M6811_S_BIT) ? 1: 0)
-#define cpu_get_ccr_N(PROC) ((cpu_get_ccr(PROC) & M6811_N_BIT) ? 1: 0)
-#define cpu_get_ccr_V(PROC) ((cpu_get_ccr(PROC) & M6811_V_BIT) ? 1: 0)
-#define cpu_get_ccr_C(PROC) ((cpu_get_ccr(PROC) & M6811_C_BIT) ? 1: 0)
-#define cpu_get_ccr_Z(PROC) ((cpu_get_ccr(PROC) & M6811_Z_BIT) ? 1: 0)
-#define cpu_get_ccr_I(PROC) ((cpu_get_ccr(PROC) & M6811_I_BIT) ? 1: 0)
-
-#define cpu_set_ccr_flag(S,B,V) \
-cpu_set_ccr(S,(cpu_get_ccr(S) & ~(B)) | ((V) ? B : 0))
-
-#define cpu_set_ccr_H(PROC,VAL) cpu_set_ccr_flag(PROC, M6811_H_BIT, VAL)
-#define cpu_set_ccr_X(PROC,VAL) cpu_set_ccr_flag(PROC, M6811_X_BIT, VAL)
-#define cpu_set_ccr_S(PROC,VAL) cpu_set_ccr_flag(PROC, M6811_S_BIT, VAL)
-#define cpu_set_ccr_N(PROC,VAL) cpu_set_ccr_flag(PROC, M6811_N_BIT, VAL)
-#define cpu_set_ccr_V(PROC,VAL) cpu_set_ccr_flag(PROC, M6811_V_BIT, VAL)
-#define cpu_set_ccr_C(PROC,VAL) cpu_set_ccr_flag(PROC, M6811_C_BIT, VAL)
-#define cpu_set_ccr_Z(PROC,VAL) cpu_set_ccr_flag(PROC, M6811_Z_BIT, VAL)
-#define cpu_set_ccr_I(PROC,VAL) cpu_set_ccr_flag(PROC, M6811_I_BIT, VAL)
-
-#undef inline
-#define inline static __inline__
-
-extern void cpu_memory_exception (struct _sim_cpu *proc,
- SIM_SIGNAL excep,
- uint16 addr,
- const char *message);
-
-inline uint8
-memory_read8 (sim_cpu *cpu, uint16 addr)
-{
- uint8 val;
-
- if (sim_core_read_buffer (CPU_STATE (cpu), cpu, 0, &val, addr, 1) != 1)
- {
- cpu_memory_exception (cpu, SIM_SIGSEGV, addr,
- "Read error");
- }
- return val;
-}
-
-inline void
-memory_write8 (sim_cpu *cpu, uint16 addr, uint8 val)
-{
- if (sim_core_write_buffer (CPU_STATE (cpu), cpu, 0, &val, addr, 1) != 1)
- {
- cpu_memory_exception (cpu, SIM_SIGSEGV, addr,
- "Write error");
- }
-}
-
-inline uint16
-memory_read16 (sim_cpu *cpu, uint16 addr)
-{
- uint8 b[2];
-
- if (sim_core_read_buffer (CPU_STATE (cpu), cpu, 0, b, addr, 2) != 2)
- {
- cpu_memory_exception (cpu, SIM_SIGSEGV, addr,
- "Read error");
- }
- return (((uint16) (b[0])) << 8) | ((uint16) b[1]);
-}
-
-inline void
-memory_write16 (sim_cpu *cpu, uint16 addr, uint16 val)
-{
- uint8 b[2];
-
- b[0] = val >> 8;
- b[1] = val;
- if (sim_core_write_buffer (CPU_STATE (cpu), cpu, 0, b, addr, 2) != 2)
- {
- cpu_memory_exception (cpu, SIM_SIGSEGV, addr,
- "Write error");
- }
-}
-extern void
-cpu_ccr_update_tst8 (sim_cpu *proc, uint8 val);
-
- inline void
-cpu_ccr_update_tst16 (sim_cpu *proc, uint16 val)
-{
- cpu_set_ccr_V (proc, 0);
- cpu_set_ccr_N (proc, val & 0x8000 ? 1 : 0);
- cpu_set_ccr_Z (proc, val == 0 ? 1 : 0);
-}
-
- inline void
-cpu_ccr_update_shift8 (sim_cpu *proc, uint8 val)
-{
- cpu_set_ccr_N (proc, val & 0x80 ? 1 : 0);
- cpu_set_ccr_Z (proc, val == 0 ? 1 : 0);
- cpu_set_ccr_V (proc, cpu_get_ccr_N (proc) ^ cpu_get_ccr_C (proc));
-}
-
- inline void
-cpu_ccr_update_shift16 (sim_cpu *proc, uint16 val)
-{
- cpu_set_ccr_N (proc, val & 0x8000 ? 1 : 0);
- cpu_set_ccr_Z (proc, val == 0 ? 1 : 0);
- cpu_set_ccr_V (proc, cpu_get_ccr_N (proc) ^ cpu_get_ccr_C (proc));
-}
-
-inline void
-cpu_ccr_update_add8 (sim_cpu *proc, uint8 r, uint8 a, uint8 b)
-{
- cpu_set_ccr_C (proc, ((a & b) | (b & ~r) | (a & ~r)) & 0x80 ? 1 : 0);
- cpu_set_ccr_V (proc, ((a & b & ~r) | (~a & ~b & r)) & 0x80 ? 1 : 0);
- cpu_set_ccr_Z (proc, r == 0);
- cpu_set_ccr_N (proc, r & 0x80 ? 1 : 0);
-}
-
-
-inline void
-cpu_ccr_update_sub8 (sim_cpu *proc, uint8 r, uint8 a, uint8 b)
-{
- cpu_set_ccr_C (proc, ((~a & b) | (b & r) | (~a & r)) & 0x80 ? 1 : 0);
- cpu_set_ccr_V (proc, ((a & ~b & ~r) | (~a & b & r)) & 0x80 ? 1 : 0);
- cpu_set_ccr_Z (proc, r == 0);
- cpu_set_ccr_N (proc, r & 0x80 ? 1 : 0);
-}
-
-inline void
-cpu_ccr_update_add16 (sim_cpu *proc, uint16 r, uint16 a, uint16 b)
-{
- cpu_set_ccr_C (proc, ((a & b) | (b & ~r) | (a & ~r)) & 0x8000 ? 1 : 0);
- cpu_set_ccr_V (proc, ((a & b & ~r) | (~a & ~b & r)) & 0x8000 ? 1 : 0);
- cpu_set_ccr_Z (proc, r == 0);
- cpu_set_ccr_N (proc, r & 0x8000 ? 1 : 0);
-}
-
-inline void
-cpu_ccr_update_sub16 (sim_cpu *proc, uint16 r, uint16 a, uint16 b)
-{
- cpu_set_ccr_C (proc, ((~a & b) | (b & r) | (~a & r)) & 0x8000 ? 1 : 0);
- cpu_set_ccr_V (proc, ((a & ~b & ~r) | (~a & b & r)) & 0x8000 ? 1 : 0);
- cpu_set_ccr_Z (proc, r == 0);
- cpu_set_ccr_N (proc, r & 0x8000 ? 1 : 0);
-}
-
-/* Push and pop instructions for 68HC11 (next-available stack mode). */
-inline void
-cpu_m68hc11_push_uint8 (sim_cpu *proc, uint8 val)
-{
- uint16 addr = proc->cpu_regs.sp;
-
- memory_write8 (proc, addr, val);
- proc->cpu_regs.sp = addr - 1;
- proc->cpu_need_update_frame |= CPU_PUSH;
-}
-
-inline void
-cpu_m68hc11_push_uint16 (sim_cpu *proc, uint16 val)
-{
- uint16 addr = proc->cpu_regs.sp - 1;
-
- memory_write16 (proc, addr, val);
- proc->cpu_regs.sp = addr - 1;
- proc->cpu_need_update_frame |= CPU_PUSH;
-}
-
-inline uint8
-cpu_m68hc11_pop_uint8 (sim_cpu *proc)
-{
- uint16 addr = proc->cpu_regs.sp;
- uint8 val;
-
- val = memory_read8 (proc, addr + 1);
- proc->cpu_regs.sp = addr + 1;
- proc->cpu_need_update_frame |= CPU_POP;
- return val;
-}
-
-inline uint16
-cpu_m68hc11_pop_uint16 (sim_cpu *proc)
-{
- uint16 addr = proc->cpu_regs.sp;
- uint16 val;
-
- val = memory_read16 (proc, addr + 1);
- proc->cpu_regs.sp = addr + 2;
- proc->cpu_need_update_frame |= CPU_POP;
- return val;
-}
-
-/* Push and pop instructions for 68HC12 (last-used stack mode). */
-inline void
-cpu_m68hc12_push_uint8 (sim_cpu *proc, uint8 val)
-{
- uint16 addr = proc->cpu_regs.sp;
-
- addr --;
- memory_write8 (proc, addr, val);
- proc->cpu_regs.sp = addr;
- proc->cpu_need_update_frame |= CPU_PUSH;
-}
-
-inline void
-cpu_m68hc12_push_uint16 (sim_cpu *proc, uint16 val)
-{
- uint16 addr = proc->cpu_regs.sp;
-
- addr -= 2;
- memory_write16 (proc, addr, val);
- proc->cpu_regs.sp = addr;
- proc->cpu_need_update_frame |= CPU_PUSH;
-}
-
-inline uint8
-cpu_m68hc12_pop_uint8 (sim_cpu *proc)
-{
- uint16 addr = proc->cpu_regs.sp;
- uint8 val;
-
- val = memory_read8 (proc, addr);
- proc->cpu_regs.sp = addr + 1;
- proc->cpu_need_update_frame |= CPU_POP;
- return val;
-}
-
-inline uint16
-cpu_m68hc12_pop_uint16 (sim_cpu *proc)
-{
- uint16 addr = proc->cpu_regs.sp;
- uint16 val;
-
- val = memory_read16 (proc, addr);
- proc->cpu_regs.sp = addr + 2;
- proc->cpu_need_update_frame |= CPU_POP;
- return val;
-}
-
-/* Fetch a 8/16 bit value and update the PC. */
-inline uint8
-cpu_fetch8 (sim_cpu *proc)
-{
- uint16 addr = proc->cpu_regs.pc;
- uint8 val;
-
- val = memory_read8 (proc, addr);
- proc->cpu_regs.pc = addr + 1;
- return val;
-}
-
-inline uint16
-cpu_fetch16 (sim_cpu *proc)
-{
- uint16 addr = proc->cpu_regs.pc;
- uint16 val;
-
- val = memory_read16 (proc, addr);
- proc->cpu_regs.pc = addr + 2;
- return val;
-}
-
-extern void cpu_call (sim_cpu* proc, uint16 addr);
-extern void cpu_exg (sim_cpu* proc, uint8 code);
-extern void cpu_dbcc (sim_cpu* proc);
-extern void cpu_special (sim_cpu *proc, enum M6811_Special special);
-extern void cpu_move8 (sim_cpu *proc, uint8 op);
-extern void cpu_move16 (sim_cpu *proc, uint8 op);
-
-extern uint16 cpu_fetch_relbranch (sim_cpu *proc);
-extern uint16 cpu_fetch_relbranch16 (sim_cpu *proc);
-extern void cpu_push_all (sim_cpu *proc);
-extern void cpu_single_step (sim_cpu *proc);
-
-extern void cpu_info (SIM_DESC sd, sim_cpu *proc);
-
-extern int cpu_initialize (SIM_DESC sd, sim_cpu *cpu);
-
-extern void cpu_print_frame (SIM_DESC sd, sim_cpu *cpu);
-extern void cpu_set_sp (sim_cpu *cpu, uint16 val);
-extern uint16 cpu_frame_reg (sim_cpu *cpu, uint16 rn);
-extern int cpu_reset (sim_cpu *cpu);
-extern int cpu_restart (sim_cpu *cpu);
-extern void sim_memory_error (sim_cpu *cpu, SIM_SIGNAL excep,
- uint16 addr, const char *message, ...);
-extern void emul_os (int op, sim_cpu *cpu);
-extern void cpu_interp_m6811 (sim_cpu *cpu);
-extern void cpu_interp_m6812 (sim_cpu *cpu);
-
-/* The current state of the processor; registers, memory, etc. */
-
-#define CIA_GET(CPU) (cpu_get_pc (CPU))
-#define CIA_SET(CPU,VAL) (cpu_set_pc ((CPU), (VAL)))
-
-#if (WITH_SMP)
-#define STATE_CPU(sd,n) (&(sd)->cpu[n])
-#else
-#define STATE_CPU(sd,n) (&(sd)->cpu[0])
-#endif
-
-struct sim_state {
- sim_cpu cpu[MAX_NR_PROCESSORS];
- device *devices;
- sim_state_base base;
-};
-
-extern void sim_set_profile (int n);
-extern void sim_set_profile_size (int n);
-extern void sim_board_reset (SIM_DESC sd);
-
-extern const char *cycle_to_string (sim_cpu *cpu, signed64 t);
-
-#endif
-
-
diff --git a/sim/mcore/ChangeLog b/sim/mcore/ChangeLog
deleted file mode 100644
index a5e5ef97c94..00000000000
--- a/sim/mcore/ChangeLog
+++ /dev/null
@@ -1,74 +0,0 @@
-Tue May 23 21:39:23 2000 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-2000-02-14 Nick Clifton <nickc@cygnus.com>
-
- * interp.c (handle_trap1): Fix handling of fclose system call.
- Patch submitted by <drew.sarkisian@motorola.com>.
-
-2000-02-10 Nick Clifton <nickc@cygnus.com>
-
- * interp.c (target_big_endian): New variable.
- (mcore_extract_unsigned_integer, mcore_store_unsigned_integer,
- wlat, rlat, sim_resume, sim_load): Add supprot for little
- endian targets.
-
-2000-01-13 Nick Clifton <nickc@cygnus.com>
-
- * interp.c (sim_resume): Do not rely upon host semantics of shift
- operators to implement M*Core semantics.
-
-Thu Sep 2 18:15:53 1999 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-1999-06-23 Nick Clifton <nickc@cygnus.com>
-
- * sysdep.h: Do not define prototypes for memcpy and strchr if they
- are macros.
-
-1999-05-21 Nick Clifton <nickc@cygnus.com>
-
- * interp.c (sim_resume): Add more tracing output.
-
-1999-05-17 Keith Seitz <keiths@cygnus.com>
-
- * interp.c (NUM_MCORE_REGS): Increase by one to allow access to PC.
- (sim_resume): Correct off by one instruction error when a breakpoint
- is hit.
-
-1999-05-08 Felix Lee <flee@cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-1999-05-10 Nick Clifton <nickc@cygnus.com>
-
- * interp.c (sim_resume): Record PC in case it is needed for error
- messages and the original has been corrupted.
-
-1999-05-07 Nick Clifton <nickc@cygnus.com>
-
- * interp.c (sim_resume): Fix typo 'oze' -> 'doze'.
- (util): Handle 0x50FF stubs properly.
-
-
-1999-04-29 Nick Clifton <nickc@cygnus.com>
-
- * interp.c (set_initial_gprs): Only display memory range if
- verbose option has been set.
-
-1999-04-22 Nick Clifton <nickc@cygnus.com>
-
- * interp.c: Add tracing and verbose options.
- Fixed trap and syscall emulations.
-
-1999-04-08 Nick Clifton <nickc@cygnus.com>
-
- * interp.c: New file: Simulator for MCore.
- * sysdep.h: New file: Systems definitions for MCore simulator.
- * configure.in: New file: Configure script for MCore simulator.
- * configure: New file: Genreated.
- * config,in: New file: Config support.
- * Makefile.in: New file: Meta makefile for MCore simulator.
-
diff --git a/sim/mcore/Makefile.in b/sim/mcore/Makefile.in
deleted file mode 100644
index 83c8557568b..00000000000
--- a/sim/mcore/Makefile.in
+++ /dev/null
@@ -1,29 +0,0 @@
-# Makefile template for Configure for the MCore sim library.
-# Copyright (C) 1990, 91, 92, 95, 96, 19, 1999 Free Software Foundation, Inc.
-# Written by Cygnus Solutions.
-#
-# This program is free software; you can redistribute it and/or modify
-# it under the terms of the GNU General Public License as published by
-# the Free Software Foundation; either version 2 of the License, or
-# (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
-## COMMON_PRE_CONFIG_FRAG
-
-SIM_OBJS = interp.o sim-load.o
-SIM_EXTRA_LIBS = -lm
-SIM_EXTRA_CLEAN = mcore-clean
-
-## COMMON_POST_CONFIG_FRAG
-
-interp.o: interp.c
-
-mcore-clean:
diff --git a/sim/mcore/config.in b/sim/mcore/config.in
deleted file mode 100644
index 21724bc5eac..00000000000
--- a/sim/mcore/config.in
+++ /dev/null
@@ -1,34 +0,0 @@
-/* config.in. Generated automatically from configure.in by autoheader. */
-
-/* Define as the return type of signal handlers (int or void). */
-#undef RETSIGTYPE
-
-/* Define if you have the getrusage function. */
-#undef HAVE_GETRUSAGE
-
-/* Define if you have the sigaction function. */
-#undef HAVE_SIGACTION
-
-/* Define if you have the time function. */
-#undef HAVE_TIME
-
-/* Define if you have the <stdlib.h> header file. */
-#undef HAVE_STDLIB_H
-
-/* Define if you have the <string.h> header file. */
-#undef HAVE_STRING_H
-
-/* Define if you have the <strings.h> header file. */
-#undef HAVE_STRINGS_H
-
-/* Define if you have the <sys/resource.h> header file. */
-#undef HAVE_SYS_RESOURCE_H
-
-/* Define if you have the <sys/time.h> header file. */
-#undef HAVE_SYS_TIME_H
-
-/* Define if you have the <time.h> header file. */
-#undef HAVE_TIME_H
-
-/* Define if you have the <unistd.h> header file. */
-#undef HAVE_UNISTD_H
diff --git a/sim/mcore/configure b/sim/mcore/configure
deleted file mode 100755
index 2720d6b5d38..00000000000
--- a/sim/mcore/configure
+++ /dev/null
@@ -1,4024 +0,0 @@
-#! /bin/sh
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-sim_inline="-DDEFAULT_INLINE=0"
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-# This file is derived from `gettext.m4'. The difference is that the
-# included macros assume Cygnus-style source and build trees.
-
-# Macro to add for using GNU gettext.
-# Ulrich Drepper <drepper@cygnus.com>, 1995.
-#
-# This file file be copied and used freely without restrictions. It can
-# be used in projects which are not available under the GNU Public License
-# but which still want to provide support for the GNU gettext functionality.
-# Please note that the actual code is *not* freely available.
-
-# serial 3
-
-
-
-
-
-# Search path for a program which passes the given test.
-# Ulrich Drepper <drepper@cygnus.com>, 1996.
-#
-# This file file be copied and used freely without restrictions. It can
-# be used in projects which are not available under the GNU Public License
-# but which still want to provide support for the GNU gettext functionality.
-# Please note that the actual code is *not* freely available.
-
-# serial 1
-
-
-
-# Check whether LC_MESSAGES is available in <locale.h>.
-# Ulrich Drepper <drepper@cygnus.com>, 1995.
-#
-# This file file be copied and used freely without restrictions. It can
-# be used in projects which are not available under the GNU Public License
-# but which still want to provide support for the GNU gettext functionality.
-# Please note that the actual code is *not* freely available.
-
-# serial 1
-
-
-
-
-
-
-# Guess values for system-dependent variables and create Makefiles.
-# Generated automatically using autoconf version 2.13
-# Copyright (C) 1992, 93, 94, 95, 96 Free Software Foundation, Inc.
-#
-# This configure script is free software; the Free Software Foundation
-# gives unlimited permission to copy, distribute and modify it.
-
-# Defaults:
-ac_help=
-ac_default_prefix=/usr/local
-# Any additions from configure.in:
-ac_help="$ac_help
- --disable-nls do not use Native Language Support"
-ac_help="$ac_help
- --with-included-gettext use the GNU gettext library included here"
-ac_help="$ac_help
- --enable-maintainer-mode Enable developer functionality."
-ac_help="$ac_help
- --enable-sim-bswap Use Host specific BSWAP instruction."
-ac_help="$ac_help
- --enable-sim-cflags=opts Extra CFLAGS for use in building simulator"
-ac_help="$ac_help
- --enable-sim-debug=opts Enable debugging flags"
-ac_help="$ac_help
- --enable-sim-stdio Specify whether to use stdio for console input/output."
-ac_help="$ac_help
- --enable-sim-trace=opts Enable tracing flags"
-ac_help="$ac_help
- --enable-sim-profile=opts Enable profiling flags"
-
-# Initialize some variables set by options.
-# The variables have the same names as the options, with
-# dashes changed to underlines.
-build=NONE
-cache_file=./config.cache
-exec_prefix=NONE
-host=NONE
-no_create=
-nonopt=NONE
-no_recursion=
-prefix=NONE
-program_prefix=NONE
-program_suffix=NONE
-program_transform_name=s,x,x,
-silent=
-site=
-sitefile=
-srcdir=
-target=NONE
-verbose=
-x_includes=NONE
-x_libraries=NONE
-bindir='${exec_prefix}/bin'
-sbindir='${exec_prefix}/sbin'
-libexecdir='${exec_prefix}/libexec'
-datadir='${prefix}/share'
-sysconfdir='${prefix}/etc'
-sharedstatedir='${prefix}/com'
-localstatedir='${prefix}/var'
-libdir='${exec_prefix}/lib'
-includedir='${prefix}/include'
-oldincludedir='/usr/include'
-infodir='${prefix}/info'
-mandir='${prefix}/man'
-
-# Initialize some other variables.
-subdirs=
-MFLAGS= MAKEFLAGS=
-SHELL=${CONFIG_SHELL-/bin/sh}
-# Maximum number of lines to put in a shell here document.
-ac_max_here_lines=12
-
-ac_prev=
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- # If the previous option needs an argument, assign it.
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- ac_prev=
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-
- case "$ac_option" in
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-
- # Accept the important Cygnus configure options, so we can diagnose typos.
-
- case "$ac_option" in
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- ac_prev=bindir ;;
- -bindir=* | --bindir=* | --bindi=* | --bind=* | --bin=* | --bi=*)
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- ;;
- *) cat >> confdefs.h <<EOF
-#define inline $ac_cv_c_inline
-EOF
- ;;
-esac
-
-echo $ac_n "checking for off_t""... $ac_c" 1>&6
-echo "configure:1026: checking for off_t" >&5
-if eval "test \"`echo '$''{'ac_cv_type_off_t'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1031 "configure"
-#include "confdefs.h"
-#include <sys/types.h>
-#if STDC_HEADERS
-#include <stdlib.h>
-#include <stddef.h>
-#endif
-EOF
-if (eval "$ac_cpp conftest.$ac_ext") 2>&5 |
- egrep "(^|[^a-zA-Z_0-9])off_t[^a-zA-Z_0-9]" >/dev/null 2>&1; then
- rm -rf conftest*
- ac_cv_type_off_t=yes
-else
- rm -rf conftest*
- ac_cv_type_off_t=no
-fi
-rm -f conftest*
-
-fi
-echo "$ac_t""$ac_cv_type_off_t" 1>&6
-if test $ac_cv_type_off_t = no; then
- cat >> confdefs.h <<\EOF
-#define off_t long
-EOF
-
-fi
-
-echo $ac_n "checking for size_t""... $ac_c" 1>&6
-echo "configure:1059: checking for size_t" >&5
-if eval "test \"`echo '$''{'ac_cv_type_size_t'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1064 "configure"
-#include "confdefs.h"
-#include <sys/types.h>
-#if STDC_HEADERS
-#include <stdlib.h>
-#include <stddef.h>
-#endif
-EOF
-if (eval "$ac_cpp conftest.$ac_ext") 2>&5 |
- egrep "(^|[^a-zA-Z_0-9])size_t[^a-zA-Z_0-9]" >/dev/null 2>&1; then
- rm -rf conftest*
- ac_cv_type_size_t=yes
-else
- rm -rf conftest*
- ac_cv_type_size_t=no
-fi
-rm -f conftest*
-
-fi
-echo "$ac_t""$ac_cv_type_size_t" 1>&6
-if test $ac_cv_type_size_t = no; then
- cat >> confdefs.h <<\EOF
-#define size_t unsigned
-EOF
-
-fi
-
-# The Ultrix 4.2 mips builtin alloca declared by alloca.h only works
-# for constant arguments. Useless!
-echo $ac_n "checking for working alloca.h""... $ac_c" 1>&6
-echo "configure:1094: checking for working alloca.h" >&5
-if eval "test \"`echo '$''{'ac_cv_header_alloca_h'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1099 "configure"
-#include "confdefs.h"
-#include <alloca.h>
-int main() {
-char *p = alloca(2 * sizeof(int));
-; return 0; }
-EOF
-if { (eval echo configure:1106: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- rm -rf conftest*
- ac_cv_header_alloca_h=yes
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- ac_cv_header_alloca_h=no
-fi
-rm -f conftest*
-fi
-
-echo "$ac_t""$ac_cv_header_alloca_h" 1>&6
-if test $ac_cv_header_alloca_h = yes; then
- cat >> confdefs.h <<\EOF
-#define HAVE_ALLOCA_H 1
-EOF
-
-fi
-
-echo $ac_n "checking for alloca""... $ac_c" 1>&6
-echo "configure:1127: checking for alloca" >&5
-if eval "test \"`echo '$''{'ac_cv_func_alloca_works'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1132 "configure"
-#include "confdefs.h"
-
-#ifdef __GNUC__
-# define alloca __builtin_alloca
-#else
-# ifdef _MSC_VER
-# include <malloc.h>
-# define alloca _alloca
-# else
-# if HAVE_ALLOCA_H
-# include <alloca.h>
-# else
-# ifdef _AIX
- #pragma alloca
-# else
-# ifndef alloca /* predefined by HP cc +Olibcalls */
-char *alloca ();
-# endif
-# endif
-# endif
-# endif
-#endif
-
-int main() {
-char *p = (char *) alloca(1);
-; return 0; }
-EOF
-if { (eval echo configure:1160: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- rm -rf conftest*
- ac_cv_func_alloca_works=yes
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- ac_cv_func_alloca_works=no
-fi
-rm -f conftest*
-fi
-
-echo "$ac_t""$ac_cv_func_alloca_works" 1>&6
-if test $ac_cv_func_alloca_works = yes; then
- cat >> confdefs.h <<\EOF
-#define HAVE_ALLOCA 1
-EOF
-
-fi
-
-if test $ac_cv_func_alloca_works = no; then
- # The SVR3 libPW and SVR4 libucb both contain incompatible functions
- # that cause trouble. Some versions do not even contain alloca or
- # contain a buggy version. If you still want to use their alloca,
- # use ar to extract alloca.o from them instead of compiling alloca.c.
- ALLOCA=alloca.${ac_objext}
- cat >> confdefs.h <<\EOF
-#define C_ALLOCA 1
-EOF
-
-
-echo $ac_n "checking whether alloca needs Cray hooks""... $ac_c" 1>&6
-echo "configure:1192: checking whether alloca needs Cray hooks" >&5
-if eval "test \"`echo '$''{'ac_cv_os_cray'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1197 "configure"
-#include "confdefs.h"
-#if defined(CRAY) && ! defined(CRAY2)
-webecray
-#else
-wenotbecray
-#endif
-
-EOF
-if (eval "$ac_cpp conftest.$ac_ext") 2>&5 |
- egrep "webecray" >/dev/null 2>&1; then
- rm -rf conftest*
- ac_cv_os_cray=yes
-else
- rm -rf conftest*
- ac_cv_os_cray=no
-fi
-rm -f conftest*
-
-fi
-
-echo "$ac_t""$ac_cv_os_cray" 1>&6
-if test $ac_cv_os_cray = yes; then
-for ac_func in _getb67 GETB67 getb67; do
- echo $ac_n "checking for $ac_func""... $ac_c" 1>&6
-echo "configure:1222: checking for $ac_func" >&5
-if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1227 "configure"
-#include "confdefs.h"
-/* System header to define __stub macros and hopefully few prototypes,
- which can conflict with char $ac_func(); below. */
-#include <assert.h>
-/* Override any gcc2 internal prototype to avoid an error. */
-/* We use char because int might match the return type of a gcc2
- builtin and then its argument prototype would still apply. */
-char $ac_func();
-
-int main() {
-
-/* The GNU C library defines this for functions which it implements
- to always fail with ENOSYS. Some functions are actually named
- something starting with __ and the normal name is an alias. */
-#if defined (__stub_$ac_func) || defined (__stub___$ac_func)
-choke me
-#else
-$ac_func();
-#endif
-
-; return 0; }
-EOF
-if { (eval echo configure:1250: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=yes"
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=no"
-fi
-rm -f conftest*
-fi
-
-if eval "test \"`echo '$ac_cv_func_'$ac_func`\" = yes"; then
- echo "$ac_t""yes" 1>&6
- cat >> confdefs.h <<EOF
-#define CRAY_STACKSEG_END $ac_func
-EOF
-
- break
-else
- echo "$ac_t""no" 1>&6
-fi
-
-done
-fi
-
-echo $ac_n "checking stack direction for C alloca""... $ac_c" 1>&6
-echo "configure:1277: checking stack direction for C alloca" >&5
-if eval "test \"`echo '$''{'ac_cv_c_stack_direction'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- if test "$cross_compiling" = yes; then
- ac_cv_c_stack_direction=0
-else
- cat > conftest.$ac_ext <<EOF
-#line 1285 "configure"
-#include "confdefs.h"
-find_stack_direction ()
-{
- static char *addr = 0;
- auto char dummy;
- if (addr == 0)
- {
- addr = &dummy;
- return find_stack_direction ();
- }
- else
- return (&dummy > addr) ? 1 : -1;
-}
-main ()
-{
- exit (find_stack_direction() < 0);
-}
-EOF
-if { (eval echo configure:1304: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null
-then
- ac_cv_c_stack_direction=1
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -fr conftest*
- ac_cv_c_stack_direction=-1
-fi
-rm -fr conftest*
-fi
-
-fi
-
-echo "$ac_t""$ac_cv_c_stack_direction" 1>&6
-cat >> confdefs.h <<EOF
-#define STACK_DIRECTION $ac_cv_c_stack_direction
-EOF
-
-fi
-
-for ac_hdr in unistd.h
-do
-ac_safe=`echo "$ac_hdr" | sed 'y%./+-%__p_%'`
-echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6
-echo "configure:1329: checking for $ac_hdr" >&5
-if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1334 "configure"
-#include "confdefs.h"
-#include <$ac_hdr>
-EOF
-ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:1339: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
-ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
-if test -z "$ac_err"; then
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=yes"
-else
- echo "$ac_err" >&5
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=no"
-fi
-rm -f conftest*
-fi
-if eval "test \"`echo '$ac_cv_header_'$ac_safe`\" = yes"; then
- echo "$ac_t""yes" 1>&6
- ac_tr_hdr=HAVE_`echo $ac_hdr | sed 'y%abcdefghijklmnopqrstuvwxyz./-%ABCDEFGHIJKLMNOPQRSTUVWXYZ___%'`
- cat >> confdefs.h <<EOF
-#define $ac_tr_hdr 1
-EOF
-
-else
- echo "$ac_t""no" 1>&6
-fi
-done
-
-for ac_func in getpagesize
-do
-echo $ac_n "checking for $ac_func""... $ac_c" 1>&6
-echo "configure:1368: checking for $ac_func" >&5
-if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1373 "configure"
-#include "confdefs.h"
-/* System header to define __stub macros and hopefully few prototypes,
- which can conflict with char $ac_func(); below. */
-#include <assert.h>
-/* Override any gcc2 internal prototype to avoid an error. */
-/* We use char because int might match the return type of a gcc2
- builtin and then its argument prototype would still apply. */
-char $ac_func();
-
-int main() {
-
-/* The GNU C library defines this for functions which it implements
- to always fail with ENOSYS. Some functions are actually named
- something starting with __ and the normal name is an alias. */
-#if defined (__stub_$ac_func) || defined (__stub___$ac_func)
-choke me
-#else
-$ac_func();
-#endif
-
-; return 0; }
-EOF
-if { (eval echo configure:1396: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=yes"
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=no"
-fi
-rm -f conftest*
-fi
-
-if eval "test \"`echo '$ac_cv_func_'$ac_func`\" = yes"; then
- echo "$ac_t""yes" 1>&6
- ac_tr_func=HAVE_`echo $ac_func | tr 'abcdefghijklmnopqrstuvwxyz' 'ABCDEFGHIJKLMNOPQRSTUVWXYZ'`
- cat >> confdefs.h <<EOF
-#define $ac_tr_func 1
-EOF
-
-else
- echo "$ac_t""no" 1>&6
-fi
-done
-
-echo $ac_n "checking for working mmap""... $ac_c" 1>&6
-echo "configure:1421: checking for working mmap" >&5
-if eval "test \"`echo '$''{'ac_cv_func_mmap_fixed_mapped'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- if test "$cross_compiling" = yes; then
- ac_cv_func_mmap_fixed_mapped=no
-else
- cat > conftest.$ac_ext <<EOF
-#line 1429 "configure"
-#include "confdefs.h"
-
-/* Thanks to Mike Haertel and Jim Avera for this test.
- Here is a matrix of mmap possibilities:
- mmap private not fixed
- mmap private fixed at somewhere currently unmapped
- mmap private fixed at somewhere already mapped
- mmap shared not fixed
- mmap shared fixed at somewhere currently unmapped
- mmap shared fixed at somewhere already mapped
- For private mappings, we should verify that changes cannot be read()
- back from the file, nor mmap's back from the file at a different
- address. (There have been systems where private was not correctly
- implemented like the infamous i386 svr4.0, and systems where the
- VM page cache was not coherent with the filesystem buffer cache
- like early versions of FreeBSD and possibly contemporary NetBSD.)
- For shared mappings, we should conversely verify that changes get
- propogated back to all the places they're supposed to be.
-
- Grep wants private fixed already mapped.
- The main things grep needs to know about mmap are:
- * does it exist and is it safe to write into the mmap'd area
- * how to use it (BSD variants) */
-#include <sys/types.h>
-#include <fcntl.h>
-#include <sys/mman.h>
-
-/* This mess was copied from the GNU getpagesize.h. */
-#ifndef HAVE_GETPAGESIZE
-# ifdef HAVE_UNISTD_H
-# include <unistd.h>
-# endif
-
-/* Assume that all systems that can run configure have sys/param.h. */
-# ifndef HAVE_SYS_PARAM_H
-# define HAVE_SYS_PARAM_H 1
-# endif
-
-# ifdef _SC_PAGESIZE
-# define getpagesize() sysconf(_SC_PAGESIZE)
-# else /* no _SC_PAGESIZE */
-# ifdef HAVE_SYS_PARAM_H
-# include <sys/param.h>
-# ifdef EXEC_PAGESIZE
-# define getpagesize() EXEC_PAGESIZE
-# else /* no EXEC_PAGESIZE */
-# ifdef NBPG
-# define getpagesize() NBPG * CLSIZE
-# ifndef CLSIZE
-# define CLSIZE 1
-# endif /* no CLSIZE */
-# else /* no NBPG */
-# ifdef NBPC
-# define getpagesize() NBPC
-# else /* no NBPC */
-# ifdef PAGESIZE
-# define getpagesize() PAGESIZE
-# endif /* PAGESIZE */
-# endif /* no NBPC */
-# endif /* no NBPG */
-# endif /* no EXEC_PAGESIZE */
-# else /* no HAVE_SYS_PARAM_H */
-# define getpagesize() 8192 /* punt totally */
-# endif /* no HAVE_SYS_PARAM_H */
-# endif /* no _SC_PAGESIZE */
-
-#endif /* no HAVE_GETPAGESIZE */
-
-#ifdef __cplusplus
-extern "C" { void *malloc(unsigned); }
-#else
-char *malloc();
-#endif
-
-int
-main()
-{
- char *data, *data2, *data3;
- int i, pagesize;
- int fd;
-
- pagesize = getpagesize();
-
- /*
- * First, make a file with some known garbage in it.
- */
- data = malloc(pagesize);
- if (!data)
- exit(1);
- for (i = 0; i < pagesize; ++i)
- *(data + i) = rand();
- umask(0);
- fd = creat("conftestmmap", 0600);
- if (fd < 0)
- exit(1);
- if (write(fd, data, pagesize) != pagesize)
- exit(1);
- close(fd);
-
- /*
- * Next, try to mmap the file at a fixed address which
- * already has something else allocated at it. If we can,
- * also make sure that we see the same garbage.
- */
- fd = open("conftestmmap", O_RDWR);
- if (fd < 0)
- exit(1);
- data2 = malloc(2 * pagesize);
- if (!data2)
- exit(1);
- data2 += (pagesize - ((int) data2 & (pagesize - 1))) & (pagesize - 1);
- if (data2 != mmap(data2, pagesize, PROT_READ | PROT_WRITE,
- MAP_PRIVATE | MAP_FIXED, fd, 0L))
- exit(1);
- for (i = 0; i < pagesize; ++i)
- if (*(data + i) != *(data2 + i))
- exit(1);
-
- /*
- * Finally, make sure that changes to the mapped area
- * do not percolate back to the file as seen by read().
- * (This is a bug on some variants of i386 svr4.0.)
- */
- for (i = 0; i < pagesize; ++i)
- *(data2 + i) = *(data2 + i) + 1;
- data3 = malloc(pagesize);
- if (!data3)
- exit(1);
- if (read(fd, data3, pagesize) != pagesize)
- exit(1);
- for (i = 0; i < pagesize; ++i)
- if (*(data + i) != *(data3 + i))
- exit(1);
- close(fd);
- unlink("conftestmmap");
- exit(0);
-}
-
-EOF
-if { (eval echo configure:1569: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null
-then
- ac_cv_func_mmap_fixed_mapped=yes
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -fr conftest*
- ac_cv_func_mmap_fixed_mapped=no
-fi
-rm -fr conftest*
-fi
-
-fi
-
-echo "$ac_t""$ac_cv_func_mmap_fixed_mapped" 1>&6
-if test $ac_cv_func_mmap_fixed_mapped = yes; then
- cat >> confdefs.h <<\EOF
-#define HAVE_MMAP 1
-EOF
-
-fi
-
-echo $ac_n "checking for Cygwin environment""... $ac_c" 1>&6
-echo "configure:1592: checking for Cygwin environment" >&5
-if eval "test \"`echo '$''{'ac_cv_cygwin'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1597 "configure"
-#include "confdefs.h"
-
-int main() {
-
-#ifndef __CYGWIN__
-#define __CYGWIN__ __CYGWIN32__
-#endif
-return __CYGWIN__;
-; return 0; }
-EOF
-if { (eval echo configure:1608: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
- rm -rf conftest*
- ac_cv_cygwin=yes
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- ac_cv_cygwin=no
-fi
-rm -f conftest*
-rm -f conftest*
-fi
-
-echo "$ac_t""$ac_cv_cygwin" 1>&6
-CYGWIN=
-test "$ac_cv_cygwin" = yes && CYGWIN=yes
-echo $ac_n "checking for mingw32 environment""... $ac_c" 1>&6
-echo "configure:1625: checking for mingw32 environment" >&5
-if eval "test \"`echo '$''{'ac_cv_mingw32'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1630 "configure"
-#include "confdefs.h"
-
-int main() {
-return __MINGW32__;
-; return 0; }
-EOF
-if { (eval echo configure:1637: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
- rm -rf conftest*
- ac_cv_mingw32=yes
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- ac_cv_mingw32=no
-fi
-rm -f conftest*
-rm -f conftest*
-fi
-
-echo "$ac_t""$ac_cv_mingw32" 1>&6
-MINGW32=
-test "$ac_cv_mingw32" = yes && MINGW32=yes
-
-# autoconf.info says this should be called right after AC_INIT.
-
-
-ac_aux_dir=
-for ac_dir in `cd $srcdir;pwd`/../.. $srcdir/`cd $srcdir;pwd`/../..; do
- if test -f $ac_dir/install-sh; then
- ac_aux_dir=$ac_dir
- ac_install_sh="$ac_aux_dir/install-sh -c"
- break
- elif test -f $ac_dir/install.sh; then
- ac_aux_dir=$ac_dir
- ac_install_sh="$ac_aux_dir/install.sh -c"
- break
- fi
-done
-if test -z "$ac_aux_dir"; then
- { echo "configure: error: can not find install-sh or install.sh in `cd $srcdir;pwd`/../.. $srcdir/`cd $srcdir;pwd`/../.." 1>&2; exit 1; }
-fi
-ac_config_guess=$ac_aux_dir/config.guess
-ac_config_sub=$ac_aux_dir/config.sub
-ac_configure=$ac_aux_dir/configure # This should be Cygnus configure.
-
-
-# Do some error checking and defaulting for the host and target type.
-# The inputs are:
-# configure --host=HOST --target=TARGET --build=BUILD NONOPT
-#
-# The rules are:
-# 1. You are not allowed to specify --host, --target, and nonopt at the
-# same time.
-# 2. Host defaults to nonopt.
-# 3. If nonopt is not specified, then host defaults to the current host,
-# as determined by config.guess.
-# 4. Target and build default to nonopt.
-# 5. If nonopt is not specified, then target and build default to host.
-
-# The aliases save the names the user supplied, while $host etc.
-# will get canonicalized.
-case $host---$target---$nonopt in
-NONE---*---* | *---NONE---* | *---*---NONE) ;;
-*) { echo "configure: error: can only configure for one host and one target at a time" 1>&2; exit 1; } ;;
-esac
-
-
-# Make sure we can run config.sub.
-if ${CONFIG_SHELL-/bin/sh} $ac_config_sub sun4 >/dev/null 2>&1; then :
-else { echo "configure: error: can not run $ac_config_sub" 1>&2; exit 1; }
-fi
-
-echo $ac_n "checking host system type""... $ac_c" 1>&6
-echo "configure:1704: checking host system type" >&5
-
-host_alias=$host
-case "$host_alias" in
-NONE)
- case $nonopt in
- NONE)
- if host_alias=`${CONFIG_SHELL-/bin/sh} $ac_config_guess`; then :
- else { echo "configure: error: can not guess host type; you must specify one" 1>&2; exit 1; }
- fi ;;
- *) host_alias=$nonopt ;;
- esac ;;
-esac
-
-host=`${CONFIG_SHELL-/bin/sh} $ac_config_sub $host_alias`
-host_cpu=`echo $host | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\1/'`
-host_vendor=`echo $host | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\2/'`
-host_os=`echo $host | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\3/'`
-echo "$ac_t""$host" 1>&6
-
-echo $ac_n "checking target system type""... $ac_c" 1>&6
-echo "configure:1725: checking target system type" >&5
-
-target_alias=$target
-case "$target_alias" in
-NONE)
- case $nonopt in
- NONE) target_alias=$host_alias ;;
- *) target_alias=$nonopt ;;
- esac ;;
-esac
-
-target=`${CONFIG_SHELL-/bin/sh} $ac_config_sub $target_alias`
-target_cpu=`echo $target | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\1/'`
-target_vendor=`echo $target | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\2/'`
-target_os=`echo $target | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\3/'`
-echo "$ac_t""$target" 1>&6
-
-echo $ac_n "checking build system type""... $ac_c" 1>&6
-echo "configure:1743: checking build system type" >&5
-
-build_alias=$build
-case "$build_alias" in
-NONE)
- case $nonopt in
- NONE) build_alias=$host_alias ;;
- *) build_alias=$nonopt ;;
- esac ;;
-esac
-
-build=`${CONFIG_SHELL-/bin/sh} $ac_config_sub $build_alias`
-build_cpu=`echo $build | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\1/'`
-build_vendor=`echo $build | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\2/'`
-build_os=`echo $build | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\3/'`
-echo "$ac_t""$build" 1>&6
-
-test "$host_alias" != "$target_alias" &&
- test "$program_prefix$program_suffix$program_transform_name" = \
- NONENONEs,x,x, &&
- program_prefix=${target_alias}-
-
-if test "$program_transform_name" = s,x,x,; then
- program_transform_name=
-else
- # Double any \ or $. echo might interpret backslashes.
- cat <<\EOF_SED > conftestsed
-s,\\,\\\\,g; s,\$,$$,g
-EOF_SED
- program_transform_name="`echo $program_transform_name|sed -f conftestsed`"
- rm -f conftestsed
-fi
-test "$program_prefix" != NONE &&
- program_transform_name="s,^,${program_prefix},; $program_transform_name"
-# Use a double $ so make ignores it.
-test "$program_suffix" != NONE &&
- program_transform_name="s,\$\$,${program_suffix},; $program_transform_name"
-
-# sed with no file args requires a program.
-test "$program_transform_name" = "" && program_transform_name="s,x,x,"
-
-# Extract the first word of "gcc", so it can be a program name with args.
-set dummy gcc; ac_word=$2
-echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:1787: checking for $ac_word" >&5
-if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- if test -n "$CC"; then
- ac_cv_prog_CC="$CC" # Let the user override the test.
-else
- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
- ac_dummy="$PATH"
- for ac_dir in $ac_dummy; do
- test -z "$ac_dir" && ac_dir=.
- if test -f $ac_dir/$ac_word; then
- ac_cv_prog_CC="gcc"
- break
- fi
- done
- IFS="$ac_save_ifs"
-fi
-fi
-CC="$ac_cv_prog_CC"
-if test -n "$CC"; then
- echo "$ac_t""$CC" 1>&6
-else
- echo "$ac_t""no" 1>&6
-fi
-
-if test -z "$CC"; then
- # Extract the first word of "cc", so it can be a program name with args.
-set dummy cc; ac_word=$2
-echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:1817: checking for $ac_word" >&5
-if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- if test -n "$CC"; then
- ac_cv_prog_CC="$CC" # Let the user override the test.
-else
- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
- ac_prog_rejected=no
- ac_dummy="$PATH"
- for ac_dir in $ac_dummy; do
- test -z "$ac_dir" && ac_dir=.
- if test -f $ac_dir/$ac_word; then
- if test "$ac_dir/$ac_word" = "/usr/ucb/cc"; then
- ac_prog_rejected=yes
- continue
- fi
- ac_cv_prog_CC="cc"
- break
- fi
- done
- IFS="$ac_save_ifs"
-if test $ac_prog_rejected = yes; then
- # We found a bogon in the path, so make sure we never use it.
- set dummy $ac_cv_prog_CC
- shift
- if test $# -gt 0; then
- # We chose a different compiler from the bogus one.
- # However, it has the same basename, so the bogon will be chosen
- # first if we set CC to just the basename; use the full file name.
- shift
- set dummy "$ac_dir/$ac_word" "$@"
- shift
- ac_cv_prog_CC="$@"
- fi
-fi
-fi
-fi
-CC="$ac_cv_prog_CC"
-if test -n "$CC"; then
- echo "$ac_t""$CC" 1>&6
-else
- echo "$ac_t""no" 1>&6
-fi
-
- if test -z "$CC"; then
- case "`uname -s`" in
- *win32* | *WIN32*)
- # Extract the first word of "cl", so it can be a program name with args.
-set dummy cl; ac_word=$2
-echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:1868: checking for $ac_word" >&5
-if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- if test -n "$CC"; then
- ac_cv_prog_CC="$CC" # Let the user override the test.
-else
- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
- ac_dummy="$PATH"
- for ac_dir in $ac_dummy; do
- test -z "$ac_dir" && ac_dir=.
- if test -f $ac_dir/$ac_word; then
- ac_cv_prog_CC="cl"
- break
- fi
- done
- IFS="$ac_save_ifs"
-fi
-fi
-CC="$ac_cv_prog_CC"
-if test -n "$CC"; then
- echo "$ac_t""$CC" 1>&6
-else
- echo "$ac_t""no" 1>&6
-fi
- ;;
- esac
- fi
- test -z "$CC" && { echo "configure: error: no acceptable cc found in \$PATH" 1>&2; exit 1; }
-fi
-
-echo $ac_n "checking whether the C compiler ($CC $CFLAGS $LDFLAGS) works""... $ac_c" 1>&6
-echo "configure:1900: checking whether the C compiler ($CC $CFLAGS $LDFLAGS) works" >&5
-
-ac_ext=c
-# CFLAGS is not in ac_cpp because -g, -O, etc. are not valid cpp options.
-ac_cpp='$CPP $CPPFLAGS'
-ac_compile='${CC-cc} -c $CFLAGS $CPPFLAGS conftest.$ac_ext 1>&5'
-ac_link='${CC-cc} -o conftest${ac_exeext} $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS 1>&5'
-cross_compiling=$ac_cv_prog_cc_cross
-
-cat > conftest.$ac_ext << EOF
-
-#line 1911 "configure"
-#include "confdefs.h"
-
-main(){return(0);}
-EOF
-if { (eval echo configure:1916: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- ac_cv_prog_cc_works=yes
- # If we can't run a trivial program, we are probably using a cross compiler.
- if (./conftest; exit) 2>/dev/null; then
- ac_cv_prog_cc_cross=no
- else
- ac_cv_prog_cc_cross=yes
- fi
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- ac_cv_prog_cc_works=no
-fi
-rm -fr conftest*
-ac_ext=c
-# CFLAGS is not in ac_cpp because -g, -O, etc. are not valid cpp options.
-ac_cpp='$CPP $CPPFLAGS'
-ac_compile='${CC-cc} -c $CFLAGS $CPPFLAGS conftest.$ac_ext 1>&5'
-ac_link='${CC-cc} -o conftest${ac_exeext} $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS 1>&5'
-cross_compiling=$ac_cv_prog_cc_cross
-
-echo "$ac_t""$ac_cv_prog_cc_works" 1>&6
-if test $ac_cv_prog_cc_works = no; then
- { echo "configure: error: installation or configuration problem: C compiler cannot create executables." 1>&2; exit 1; }
-fi
-echo $ac_n "checking whether the C compiler ($CC $CFLAGS $LDFLAGS) is a cross-compiler""... $ac_c" 1>&6
-echo "configure:1942: checking whether the C compiler ($CC $CFLAGS $LDFLAGS) is a cross-compiler" >&5
-echo "$ac_t""$ac_cv_prog_cc_cross" 1>&6
-cross_compiling=$ac_cv_prog_cc_cross
-
-echo $ac_n "checking whether we are using GNU C""... $ac_c" 1>&6
-echo "configure:1947: checking whether we are using GNU C" >&5
-if eval "test \"`echo '$''{'ac_cv_prog_gcc'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.c <<EOF
-#ifdef __GNUC__
- yes;
-#endif
-EOF
-if { ac_try='${CC-cc} -E conftest.c'; { (eval echo configure:1956: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }; } | egrep yes >/dev/null 2>&1; then
- ac_cv_prog_gcc=yes
-else
- ac_cv_prog_gcc=no
-fi
-fi
-
-echo "$ac_t""$ac_cv_prog_gcc" 1>&6
-
-if test $ac_cv_prog_gcc = yes; then
- GCC=yes
-else
- GCC=
-fi
-
-ac_test_CFLAGS="${CFLAGS+set}"
-ac_save_CFLAGS="$CFLAGS"
-CFLAGS=
-echo $ac_n "checking whether ${CC-cc} accepts -g""... $ac_c" 1>&6
-echo "configure:1975: checking whether ${CC-cc} accepts -g" >&5
-if eval "test \"`echo '$''{'ac_cv_prog_cc_g'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- echo 'void f(){}' > conftest.c
-if test -z "`${CC-cc} -g -c conftest.c 2>&1`"; then
- ac_cv_prog_cc_g=yes
-else
- ac_cv_prog_cc_g=no
-fi
-rm -f conftest*
-
-fi
-
-echo "$ac_t""$ac_cv_prog_cc_g" 1>&6
-if test "$ac_test_CFLAGS" = set; then
- CFLAGS="$ac_save_CFLAGS"
-elif test $ac_cv_prog_cc_g = yes; then
- if test "$GCC" = yes; then
- CFLAGS="-g -O2"
- else
- CFLAGS="-g"
- fi
-else
- if test "$GCC" = yes; then
- CFLAGS="-O2"
- else
- CFLAGS=
- fi
-fi
-
-# Find a good install program. We prefer a C program (faster),
-# so one script is as good as another. But avoid the broken or
-# incompatible versions:
-# SysV /etc/install, /usr/sbin/install
-# SunOS /usr/etc/install
-# IRIX /sbin/install
-# AIX /bin/install
-# AIX 4 /usr/bin/installbsd, which doesn't work without a -g flag
-# AFS /usr/afsws/bin/install, which mishandles nonexistent args
-# SVR4 /usr/ucb/install, which tries to use the nonexistent group "staff"
-# ./install, which can be erroneously created by make from ./install.sh.
-echo $ac_n "checking for a BSD compatible install""... $ac_c" 1>&6
-echo "configure:2018: checking for a BSD compatible install" >&5
-if test -z "$INSTALL"; then
-if eval "test \"`echo '$''{'ac_cv_path_install'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- IFS="${IFS= }"; ac_save_IFS="$IFS"; IFS=":"
- for ac_dir in $PATH; do
- # Account for people who put trailing slashes in PATH elements.
- case "$ac_dir/" in
- /|./|.//|/etc/*|/usr/sbin/*|/usr/etc/*|/sbin/*|/usr/afsws/bin/*|/usr/ucb/*) ;;
- *)
- # OSF1 and SCO ODT 3.0 have their own names for install.
- # Don't use installbsd from OSF since it installs stuff as root
- # by default.
- for ac_prog in ginstall scoinst install; do
- if test -f $ac_dir/$ac_prog; then
- if test $ac_prog = install &&
- grep dspmsg $ac_dir/$ac_prog >/dev/null 2>&1; then
- # AIX install. It has an incompatible calling convention.
- :
- else
- ac_cv_path_install="$ac_dir/$ac_prog -c"
- break 2
- fi
- fi
- done
- ;;
- esac
- done
- IFS="$ac_save_IFS"
-
-fi
- if test "${ac_cv_path_install+set}" = set; then
- INSTALL="$ac_cv_path_install"
- else
- # As a last resort, use the slow shell script. We don't cache a
- # path for INSTALL within a source directory, because that will
- # break other packages using the cache if that directory is
- # removed, or if the path is relative.
- INSTALL="$ac_install_sh"
- fi
-fi
-echo "$ac_t""$INSTALL" 1>&6
-
-# Use test -z because SunOS4 sh mishandles braces in ${var-val}.
-# It thinks the first close brace ends the variable substitution.
-test -z "$INSTALL_PROGRAM" && INSTALL_PROGRAM='${INSTALL}'
-
-test -z "$INSTALL_SCRIPT" && INSTALL_SCRIPT='${INSTALL_PROGRAM}'
-
-test -z "$INSTALL_DATA" && INSTALL_DATA='${INSTALL} -m 644'
-
-
-# Put a plausible default for CC_FOR_BUILD in Makefile.
-if test "x$cross_compiling" = "xno"; then
- CC_FOR_BUILD='$(CC)'
-else
- CC_FOR_BUILD=gcc
-fi
-
-
-
-
-AR=${AR-ar}
-
-# Extract the first word of "ranlib", so it can be a program name with args.
-set dummy ranlib; ac_word=$2
-echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:2086: checking for $ac_word" >&5
-if eval "test \"`echo '$''{'ac_cv_prog_RANLIB'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- if test -n "$RANLIB"; then
- ac_cv_prog_RANLIB="$RANLIB" # Let the user override the test.
-else
- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
- ac_dummy="$PATH"
- for ac_dir in $ac_dummy; do
- test -z "$ac_dir" && ac_dir=.
- if test -f $ac_dir/$ac_word; then
- ac_cv_prog_RANLIB="ranlib"
- break
- fi
- done
- IFS="$ac_save_ifs"
- test -z "$ac_cv_prog_RANLIB" && ac_cv_prog_RANLIB=":"
-fi
-fi
-RANLIB="$ac_cv_prog_RANLIB"
-if test -n "$RANLIB"; then
- echo "$ac_t""$RANLIB" 1>&6
-else
- echo "$ac_t""no" 1>&6
-fi
-
-
-ALL_LINGUAS=
-
- for ac_hdr in argz.h limits.h locale.h nl_types.h malloc.h string.h \
-unistd.h values.h sys/param.h
-do
-ac_safe=`echo "$ac_hdr" | sed 'y%./+-%__p_%'`
-echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6
-echo "configure:2121: checking for $ac_hdr" >&5
-if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 2126 "configure"
-#include "confdefs.h"
-#include <$ac_hdr>
-EOF
-ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:2131: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
-ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
-if test -z "$ac_err"; then
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=yes"
-else
- echo "$ac_err" >&5
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=no"
-fi
-rm -f conftest*
-fi
-if eval "test \"`echo '$ac_cv_header_'$ac_safe`\" = yes"; then
- echo "$ac_t""yes" 1>&6
- ac_tr_hdr=HAVE_`echo $ac_hdr | sed 'y%abcdefghijklmnopqrstuvwxyz./-%ABCDEFGHIJKLMNOPQRSTUVWXYZ___%'`
- cat >> confdefs.h <<EOF
-#define $ac_tr_hdr 1
-EOF
-
-else
- echo "$ac_t""no" 1>&6
-fi
-done
-
- for ac_func in getcwd munmap putenv setenv setlocale strchr strcasecmp \
-__argz_count __argz_stringify __argz_next
-do
-echo $ac_n "checking for $ac_func""... $ac_c" 1>&6
-echo "configure:2161: checking for $ac_func" >&5
-if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 2166 "configure"
-#include "confdefs.h"
-/* System header to define __stub macros and hopefully few prototypes,
- which can conflict with char $ac_func(); below. */
-#include <assert.h>
-/* Override any gcc2 internal prototype to avoid an error. */
-/* We use char because int might match the return type of a gcc2
- builtin and then its argument prototype would still apply. */
-char $ac_func();
-
-int main() {
-
-/* The GNU C library defines this for functions which it implements
- to always fail with ENOSYS. Some functions are actually named
- something starting with __ and the normal name is an alias. */
-#if defined (__stub_$ac_func) || defined (__stub___$ac_func)
-choke me
-#else
-$ac_func();
-#endif
-
-; return 0; }
-EOF
-if { (eval echo configure:2189: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=yes"
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=no"
-fi
-rm -f conftest*
-fi
-
-if eval "test \"`echo '$ac_cv_func_'$ac_func`\" = yes"; then
- echo "$ac_t""yes" 1>&6
- ac_tr_func=HAVE_`echo $ac_func | tr 'abcdefghijklmnopqrstuvwxyz' 'ABCDEFGHIJKLMNOPQRSTUVWXYZ'`
- cat >> confdefs.h <<EOF
-#define $ac_tr_func 1
-EOF
-
-else
- echo "$ac_t""no" 1>&6
-fi
-done
-
-
- if test "${ac_cv_func_stpcpy+set}" != "set"; then
- for ac_func in stpcpy
-do
-echo $ac_n "checking for $ac_func""... $ac_c" 1>&6
-echo "configure:2218: checking for $ac_func" >&5
-if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 2223 "configure"
-#include "confdefs.h"
-/* System header to define __stub macros and hopefully few prototypes,
- which can conflict with char $ac_func(); below. */
-#include <assert.h>
-/* Override any gcc2 internal prototype to avoid an error. */
-/* We use char because int might match the return type of a gcc2
- builtin and then its argument prototype would still apply. */
-char $ac_func();
-
-int main() {
-
-/* The GNU C library defines this for functions which it implements
- to always fail with ENOSYS. Some functions are actually named
- something starting with __ and the normal name is an alias. */
-#if defined (__stub_$ac_func) || defined (__stub___$ac_func)
-choke me
-#else
-$ac_func();
-#endif
-
-; return 0; }
-EOF
-if { (eval echo configure:2246: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=yes"
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=no"
-fi
-rm -f conftest*
-fi
-
-if eval "test \"`echo '$ac_cv_func_'$ac_func`\" = yes"; then
- echo "$ac_t""yes" 1>&6
- ac_tr_func=HAVE_`echo $ac_func | tr 'abcdefghijklmnopqrstuvwxyz' 'ABCDEFGHIJKLMNOPQRSTUVWXYZ'`
- cat >> confdefs.h <<EOF
-#define $ac_tr_func 1
-EOF
-
-else
- echo "$ac_t""no" 1>&6
-fi
-done
-
- fi
- if test "${ac_cv_func_stpcpy}" = "yes"; then
- cat >> confdefs.h <<\EOF
-#define HAVE_STPCPY 1
-EOF
-
- fi
-
- if test $ac_cv_header_locale_h = yes; then
- echo $ac_n "checking for LC_MESSAGES""... $ac_c" 1>&6
-echo "configure:2280: checking for LC_MESSAGES" >&5
-if eval "test \"`echo '$''{'am_cv_val_LC_MESSAGES'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 2285 "configure"
-#include "confdefs.h"
-#include <locale.h>
-int main() {
-return LC_MESSAGES
-; return 0; }
-EOF
-if { (eval echo configure:2292: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- rm -rf conftest*
- am_cv_val_LC_MESSAGES=yes
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- am_cv_val_LC_MESSAGES=no
-fi
-rm -f conftest*
-fi
-
-echo "$ac_t""$am_cv_val_LC_MESSAGES" 1>&6
- if test $am_cv_val_LC_MESSAGES = yes; then
- cat >> confdefs.h <<\EOF
-#define HAVE_LC_MESSAGES 1
-EOF
-
- fi
- fi
- echo $ac_n "checking whether NLS is requested""... $ac_c" 1>&6
-echo "configure:2313: checking whether NLS is requested" >&5
- # Check whether --enable-nls or --disable-nls was given.
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-
- echo "$ac_t""$USE_NLS" 1>&6
-
-
- USE_INCLUDED_LIBINTL=no
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-
- echo $ac_n "checking whether included gettext is requested""... $ac_c" 1>&6
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-
- echo "$ac_t""$nls_cv_force_use_gnu_gettext" 1>&6
-
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-
- ac_safe=`echo "libintl.h" | sed 'y%./+-%__p_%'`
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-else
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-else
- cat > conftest.$ac_ext <<EOF
-#line 2384 "configure"
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-EOF
-if { (eval echo configure:2391: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
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- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- gt_cv_func_gettext_libc=no
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-rm -f conftest*
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-
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-
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-else
- ac_save_LIBS="$LIBS"
-LIBS="-lintl $LIBS"
-cat > conftest.$ac_ext <<EOF
-#line 2415 "configure"
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-/* We use char because int might match the return type of a gcc2
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-
-int main() {
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-if { (eval echo configure:2426: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
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- echo "configure: failed program was:" >&5
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-else
- cat > conftest.$ac_ext <<EOF
-#line 2447 "configure"
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-
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-if { (eval echo configure:2454: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
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- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
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-rm -f conftest*
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-
-echo "$ac_t""$gt_cv_func_gettext_libintl" 1>&6
-else
- echo "$ac_t""no" 1>&6
-fi
-
- fi
-
- if test "$gt_cv_func_gettext_libc" = "yes" \
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-EOF
-
- # Extract the first word of "msgfmt", so it can be a program name with args.
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-echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
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- echo $ac_n "(cached) $ac_c" 1>&6
-else
- case "$MSGFMT" in
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- ac_cv_path_MSGFMT="$MSGFMT" # Let the user override the test with a path.
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- *)
- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS="${IFS}:"
- for ac_dir in $PATH; do
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- if test -f $ac_dir/$ac_word; then
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- break
- fi
- fi
- done
- IFS="$ac_save_ifs"
- test -z "$ac_cv_path_MSGFMT" && ac_cv_path_MSGFMT="no"
- ;;
-esac
-fi
-MSGFMT="$ac_cv_path_MSGFMT"
-if test -n "$MSGFMT"; then
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-else
- echo "$ac_t""no" 1>&6
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- if test "$MSGFMT" != "no"; then
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-echo $ac_n "checking for $ac_func""... $ac_c" 1>&6
-echo "configure:2516: checking for $ac_func" >&5
-if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 2521 "configure"
-#include "confdefs.h"
-/* System header to define __stub macros and hopefully few prototypes,
- which can conflict with char $ac_func(); below. */
-#include <assert.h>
-/* Override any gcc2 internal prototype to avoid an error. */
-/* We use char because int might match the return type of a gcc2
- builtin and then its argument prototype would still apply. */
-char $ac_func();
-
-int main() {
-
-/* The GNU C library defines this for functions which it implements
- to always fail with ENOSYS. Some functions are actually named
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-#if defined (__stub_$ac_func) || defined (__stub___$ac_func)
-choke me
-#else
-$ac_func();
-#endif
-
-; return 0; }
-EOF
-if { (eval echo configure:2544: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=yes"
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=no"
-fi
-rm -f conftest*
-fi
-
-if eval "test \"`echo '$ac_cv_func_'$ac_func`\" = yes"; then
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- ac_tr_func=HAVE_`echo $ac_func | tr 'abcdefghijklmnopqrstuvwxyz' 'ABCDEFGHIJKLMNOPQRSTUVWXYZ'`
- cat >> confdefs.h <<EOF
-#define $ac_tr_func 1
-EOF
-
-else
- echo "$ac_t""no" 1>&6
-fi
-done
-
- # Extract the first word of "gmsgfmt", so it can be a program name with args.
-set dummy gmsgfmt; ac_word=$2
-echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:2571: checking for $ac_word" >&5
-if eval "test \"`echo '$''{'ac_cv_path_GMSGFMT'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- case "$GMSGFMT" in
- /*)
- ac_cv_path_GMSGFMT="$GMSGFMT" # Let the user override the test with a path.
- ;;
- ?:/*)
- ac_cv_path_GMSGFMT="$GMSGFMT" # Let the user override the test with a dos path.
- ;;
- *)
- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
- ac_dummy="$PATH"
- for ac_dir in $ac_dummy; do
- test -z "$ac_dir" && ac_dir=.
- if test -f $ac_dir/$ac_word; then
- ac_cv_path_GMSGFMT="$ac_dir/$ac_word"
- break
- fi
- done
- IFS="$ac_save_ifs"
- test -z "$ac_cv_path_GMSGFMT" && ac_cv_path_GMSGFMT="$MSGFMT"
- ;;
-esac
-fi
-GMSGFMT="$ac_cv_path_GMSGFMT"
-if test -n "$GMSGFMT"; then
- echo "$ac_t""$GMSGFMT" 1>&6
-else
- echo "$ac_t""no" 1>&6
-fi
-
- # Extract the first word of "xgettext", so it can be a program name with args.
-set dummy xgettext; ac_word=$2
-echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:2607: checking for $ac_word" >&5
-if eval "test \"`echo '$''{'ac_cv_path_XGETTEXT'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- case "$XGETTEXT" in
- /*)
- ac_cv_path_XGETTEXT="$XGETTEXT" # Let the user override the test with a path.
- ;;
- *)
- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS="${IFS}:"
- for ac_dir in $PATH; do
- test -z "$ac_dir" && ac_dir=.
- if test -f $ac_dir/$ac_word; then
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- ac_cv_path_XGETTEXT="$ac_dir/$ac_word"
- break
- fi
- fi
- done
- IFS="$ac_save_ifs"
- test -z "$ac_cv_path_XGETTEXT" && ac_cv_path_XGETTEXT=":"
- ;;
-esac
-fi
-XGETTEXT="$ac_cv_path_XGETTEXT"
-if test -n "$XGETTEXT"; then
- echo "$ac_t""$XGETTEXT" 1>&6
-else
- echo "$ac_t""no" 1>&6
-fi
-
- cat > conftest.$ac_ext <<EOF
-#line 2639 "configure"
-#include "confdefs.h"
-
-int main() {
-extern int _nl_msg_cat_cntr;
- return _nl_msg_cat_cntr
-; return 0; }
-EOF
-if { (eval echo configure:2647: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- rm -rf conftest*
- CATOBJEXT=.gmo
- DATADIRNAME=share
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- CATOBJEXT=.mo
- DATADIRNAME=lib
-fi
-rm -f conftest*
- INSTOBJEXT=.mo
- fi
- fi
-
-else
- echo "$ac_t""no" 1>&6
-fi
-
-
-
- if test "$CATOBJEXT" = "NONE"; then
- nls_cv_use_gnu_gettext=yes
- fi
- fi
-
- if test "$nls_cv_use_gnu_gettext" = "yes"; then
- INTLOBJS="\$(GETTOBJS)"
- # Extract the first word of "msgfmt", so it can be a program name with args.
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-echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:2679: checking for $ac_word" >&5
-if eval "test \"`echo '$''{'ac_cv_path_MSGFMT'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- case "$MSGFMT" in
- /*)
- ac_cv_path_MSGFMT="$MSGFMT" # Let the user override the test with a path.
- ;;
- *)
- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS="${IFS}:"
- for ac_dir in $PATH; do
- test -z "$ac_dir" && ac_dir=.
- if test -f $ac_dir/$ac_word; then
- if test -z "`$ac_dir/$ac_word -h 2>&1 | grep 'dv '`"; then
- ac_cv_path_MSGFMT="$ac_dir/$ac_word"
- break
- fi
- fi
- done
- IFS="$ac_save_ifs"
- test -z "$ac_cv_path_MSGFMT" && ac_cv_path_MSGFMT="msgfmt"
- ;;
-esac
-fi
-MSGFMT="$ac_cv_path_MSGFMT"
-if test -n "$MSGFMT"; then
- echo "$ac_t""$MSGFMT" 1>&6
-else
- echo "$ac_t""no" 1>&6
-fi
-
- # Extract the first word of "gmsgfmt", so it can be a program name with args.
-set dummy gmsgfmt; ac_word=$2
-echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:2713: checking for $ac_word" >&5
-if eval "test \"`echo '$''{'ac_cv_path_GMSGFMT'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- case "$GMSGFMT" in
- /*)
- ac_cv_path_GMSGFMT="$GMSGFMT" # Let the user override the test with a path.
- ;;
- ?:/*)
- ac_cv_path_GMSGFMT="$GMSGFMT" # Let the user override the test with a dos path.
- ;;
- *)
- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
- ac_dummy="$PATH"
- for ac_dir in $ac_dummy; do
- test -z "$ac_dir" && ac_dir=.
- if test -f $ac_dir/$ac_word; then
- ac_cv_path_GMSGFMT="$ac_dir/$ac_word"
- break
- fi
- done
- IFS="$ac_save_ifs"
- test -z "$ac_cv_path_GMSGFMT" && ac_cv_path_GMSGFMT="$MSGFMT"
- ;;
-esac
-fi
-GMSGFMT="$ac_cv_path_GMSGFMT"
-if test -n "$GMSGFMT"; then
- echo "$ac_t""$GMSGFMT" 1>&6
-else
- echo "$ac_t""no" 1>&6
-fi
-
- # Extract the first word of "xgettext", so it can be a program name with args.
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-echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:2749: checking for $ac_word" >&5
-if eval "test \"`echo '$''{'ac_cv_path_XGETTEXT'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- case "$XGETTEXT" in
- /*)
- ac_cv_path_XGETTEXT="$XGETTEXT" # Let the user override the test with a path.
- ;;
- *)
- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS="${IFS}:"
- for ac_dir in $PATH; do
- test -z "$ac_dir" && ac_dir=.
- if test -f $ac_dir/$ac_word; then
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- ac_cv_path_XGETTEXT="$ac_dir/$ac_word"
- break
- fi
- fi
- done
- IFS="$ac_save_ifs"
- test -z "$ac_cv_path_XGETTEXT" && ac_cv_path_XGETTEXT=":"
- ;;
-esac
-fi
-XGETTEXT="$ac_cv_path_XGETTEXT"
-if test -n "$XGETTEXT"; then
- echo "$ac_t""$XGETTEXT" 1>&6
-else
- echo "$ac_t""no" 1>&6
-fi
-
-
- USE_INCLUDED_LIBINTL=yes
- CATOBJEXT=.gmo
- INSTOBJEXT=.mo
- DATADIRNAME=share
- INTLDEPS='$(top_builddir)/../intl/libintl.a'
- INTLLIBS=$INTLDEPS
- LIBS=`echo $LIBS | sed -e 's/-lintl//'`
- nls_cv_header_intl=libintl.h
- nls_cv_header_libgt=libgettext.h
- fi
-
- if test "$XGETTEXT" != ":"; then
- if $XGETTEXT --omit-header /dev/null 2> /dev/null; then
- : ;
- else
- echo "$ac_t""found xgettext programs is not GNU xgettext; ignore it" 1>&6
- XGETTEXT=":"
- fi
- fi
-
- # We need to process the po/ directory.
- POSUB=po
- else
- DATADIRNAME=share
- nls_cv_header_intl=libintl.h
- nls_cv_header_libgt=libgettext.h
- fi
-
- # If this is used in GNU gettext we have to set USE_NLS to `yes'
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- USE_INCLUDED_LIBINTL=yes
- fi
-
- for lang in $ALL_LINGUAS; do
- GMOFILES="$GMOFILES $lang.gmo"
- POFILES="$POFILES $lang.po"
- done
-
-
-
-
-
-
-
-
-
-
-
-
-
-
- if test "x$CATOBJEXT" != "x"; then
- if test "x$ALL_LINGUAS" = "x"; then
- LINGUAS=
- else
- echo $ac_n "checking for catalogs to be installed""... $ac_c" 1>&6
-echo "configure:2839: checking for catalogs to be installed" >&5
- NEW_LINGUAS=
- for lang in ${LINGUAS=$ALL_LINGUAS}; do
- case "$ALL_LINGUAS" in
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- esac
- done
- LINGUAS=$NEW_LINGUAS
- echo "$ac_t""$LINGUAS" 1>&6
- fi
-
- if test -n "$LINGUAS"; then
- for lang in $LINGUAS; do CATALOGS="$CATALOGS $lang$CATOBJEXT"; done
- fi
- fi
-
- if test $ac_cv_header_locale_h = yes; then
- INCLUDE_LOCALE_H="#include <locale.h>"
- else
- INCLUDE_LOCALE_H="\
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- fi
-
-
- if test -f $srcdir/po2tbl.sed.in; then
- if test "$CATOBJEXT" = ".cat"; then
- ac_safe=`echo "linux/version.h" | sed 'y%./+-%__p_%'`
-echo $ac_n "checking for linux/version.h""... $ac_c" 1>&6
-echo "configure:2867: checking for linux/version.h" >&5
-if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then
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-else
- cat > conftest.$ac_ext <<EOF
-#line 2872 "configure"
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-#include <linux/version.h>
-EOF
-ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:2877: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
-ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
-if test -z "$ac_err"; then
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- eval "ac_cv_header_$ac_safe=yes"
-else
- echo "$ac_err" >&5
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=no"
-fi
-rm -f conftest*
-fi
-if eval "test \"`echo '$ac_cv_header_'$ac_safe`\" = yes"; then
- echo "$ac_t""yes" 1>&6
- msgformat=linux
-else
- echo "$ac_t""no" 1>&6
-msgformat=xopen
-fi
-
-
- sed -e '/^#/d' $srcdir/$msgformat-msg.sed > po2msg.sed
- fi
- sed -e '/^#.*[^\\]$/d' -e '/^#$/d' \
- $srcdir/po2tbl.sed.in > po2tbl.sed
- fi
-
- if test "$PACKAGE" = "gettext"; then
- GT_NO="#NO#"
- GT_YES=
- else
- GT_NO=
- GT_YES="#YES#"
- fi
-
-
-
- MKINSTALLDIRS="\$(srcdir)/../../mkinstalldirs"
-
-
- l=
-
-
- if test -d $srcdir/po; then
- test -d po || mkdir po
- if test "x$srcdir" != "x."; then
- if test "x`echo $srcdir | sed 's@/.*@@'`" = "x"; then
- posrcprefix="$srcdir/"
- else
- posrcprefix="../$srcdir/"
- fi
- else
- posrcprefix="../"
- fi
- rm -f po/POTFILES
- sed -e "/^#/d" -e "/^\$/d" -e "s,.*, $posrcprefix& \\\\," -e "\$s/\(.*\) \\\\/\1/" \
- < $srcdir/po/POTFILES.in > po/POTFILES
- fi
-
-
-# Check for common headers.
-# FIXME: Seems to me this can cause problems for i386-windows hosts.
-# At one point there were hardcoded AC_DEFINE's if ${host} = i386-*-windows*.
-for ac_hdr in stdlib.h string.h strings.h unistd.h time.h
-do
-ac_safe=`echo "$ac_hdr" | sed 'y%./+-%__p_%'`
-echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6
-echo "configure:2946: checking for $ac_hdr" >&5
-if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 2951 "configure"
-#include "confdefs.h"
-#include <$ac_hdr>
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-ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
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-
-
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-fi
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- sim_debug=""
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-
-
-
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- sim_stdio=""
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-
-
-
-# Check whether --enable-sim-trace or --disable-sim-trace was given.
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- [-0-9]*)
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- sim_trace=""
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- sim_trace="${sim_trace}|TRACE_$x"
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- sim_trace=""
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-
-
-
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-
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-
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- cat > conftest.$ac_ext <<EOF
-#line 3407 "configure"
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-int main() {
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-if { (eval echo configure:3424: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
- rm -rf conftest*
- ac_cv_type_signal=void
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- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- ac_cv_type_signal=int
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-
-echo "$ac_t""$ac_cv_type_signal" 1>&6
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-
-
-
-
-
-echo $ac_n "checking for executable suffix""... $ac_c" 1>&6
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- ac_cv_exeext=
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-
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-
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-
-
-
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- eval "ac_cv_header_$ac_safe=yes"
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- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
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- eval "ac_cv_header_$ac_safe=no"
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- ac_tr_hdr=HAVE_`echo $ac_hdr | sed 'y%abcdefghijklmnopqrstuvwxyz./-%ABCDEFGHIJKLMNOPQRSTUVWXYZ___%'`
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-
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-
-
-
-
-trap '' 1 2 15
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-#
-# By default, configure uses ./config.cache as the cache file,
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-# the --cache-file=FILE option to use a different cache file; that is
-# what configure does when it calls configure scripts in
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- # turns \\\\ into \\, and sed turns \\ into \).
- sed -n \
- -e "s/'/'\\\\''/g" \
- -e "s/^\\([a-zA-Z0-9_]*_cv_[a-zA-Z0-9_]*\\)=\\(.*\\)/\\1=\${\\1='\\2'}/p"
- ;;
- *)
- # `set' quotes correctly as required by POSIX, so do not add quotes.
- sed -n -e 's/^\([a-zA-Z0-9_]*_cv_[a-zA-Z0-9_]*\)=\(.*\)/\1=${\1=\2}/p'
- ;;
- esac >> confcache
-if cmp -s $cache_file confcache; then
- :
-else
- if test -w $cache_file; then
- echo "updating cache $cache_file"
- cat confcache > $cache_file
- else
- echo "not updating unwritable cache $cache_file"
- fi
-fi
-rm -f confcache
-
-trap 'rm -fr conftest* confdefs* core core.* *.core $ac_clean_files; exit 1' 1 2 15
-
-test "x$prefix" = xNONE && prefix=$ac_default_prefix
-# Let make expand exec_prefix.
-test "x$exec_prefix" = xNONE && exec_prefix='${prefix}'
-
-# Any assignment to VPATH causes Sun make to only execute
-# the first set of double-colon rules, so remove it if not needed.
-# If there is a colon in the path, we need to keep it.
-if test "x$srcdir" = x.; then
- ac_vpsub='/^[ ]*VPATH[ ]*=[^:]*$/d'
-fi
-
-trap 'rm -f $CONFIG_STATUS conftest*; exit 1' 1 2 15
-
-DEFS=-DHAVE_CONFIG_H
-
-# Without the "./", some shells look in PATH for config.status.
-: ${CONFIG_STATUS=./config.status}
-
-echo creating $CONFIG_STATUS
-rm -f $CONFIG_STATUS
-cat > $CONFIG_STATUS <<EOF
-#! /bin/sh
-# Generated automatically by configure.
-# Run this file to recreate the current configuration.
-# This directory was configured as follows,
-# on host `(hostname || uname -n) 2>/dev/null | sed 1q`:
-#
-# $0 $ac_configure_args
-#
-# Compiler output produced by configure, useful for debugging
-# configure, is in ./config.log if it exists.
-
-ac_cs_usage="Usage: $CONFIG_STATUS [--recheck] [--version] [--help]"
-for ac_option
-do
- case "\$ac_option" in
- -recheck | --recheck | --rechec | --reche | --rech | --rec | --re | --r)
- echo "running \${CONFIG_SHELL-/bin/sh} $0 $ac_configure_args --no-create --no-recursion"
- exec \${CONFIG_SHELL-/bin/sh} $0 $ac_configure_args --no-create --no-recursion ;;
- -version | --version | --versio | --versi | --vers | --ver | --ve | --v)
- echo "$CONFIG_STATUS generated by autoconf version 2.13"
- exit 0 ;;
- -help | --help | --hel | --he | --h)
- echo "\$ac_cs_usage"; exit 0 ;;
- *) echo "\$ac_cs_usage"; exit 1 ;;
- esac
-done
-
-ac_given_srcdir=$srcdir
-ac_given_INSTALL="$INSTALL"
-
-trap 'rm -fr `echo "Makefile.sim:Makefile.in Make-common.sim:../common/Make-common.in .gdbinit:../common/gdbinit.in config.h:config.in" | sed "s/:[^ ]*//g"` conftest*; exit 1' 1 2 15
-EOF
-cat >> $CONFIG_STATUS <<EOF
-
-# Protect against being on the right side of a sed subst in config.status.
-sed 's/%@/@@/; s/@%/@@/; s/%g\$/@g/; /@g\$/s/[\\\\&%]/\\\\&/g;
- s/@@/%@/; s/@@/@%/; s/@g\$/%g/' > conftest.subs <<\\CEOF
-$ac_vpsub
-$extrasub
-s%@sim_environment@%$sim_environment%g
-s%@sim_alignment@%$sim_alignment%g
-s%@sim_assert@%$sim_assert%g
-s%@sim_bitsize@%$sim_bitsize%g
-s%@sim_endian@%$sim_endian%g
-s%@sim_hostendian@%$sim_hostendian%g
-s%@sim_float@%$sim_float%g
-s%@sim_scache@%$sim_scache%g
-s%@sim_default_model@%$sim_default_model%g
-s%@sim_hw_cflags@%$sim_hw_cflags%g
-s%@sim_hw_objs@%$sim_hw_objs%g
-s%@sim_hw@%$sim_hw%g
-s%@sim_inline@%$sim_inline%g
-s%@sim_packages@%$sim_packages%g
-s%@sim_regparm@%$sim_regparm%g
-s%@sim_reserved_bits@%$sim_reserved_bits%g
-s%@sim_smp@%$sim_smp%g
-s%@sim_stdcall@%$sim_stdcall%g
-s%@sim_xor_endian@%$sim_xor_endian%g
-s%@WARN_CFLAGS@%$WARN_CFLAGS%g
-s%@WERROR_CFLAGS@%$WERROR_CFLAGS%g
-s%@SHELL@%$SHELL%g
-s%@CFLAGS@%$CFLAGS%g
-s%@CPPFLAGS@%$CPPFLAGS%g
-s%@CXXFLAGS@%$CXXFLAGS%g
-s%@FFLAGS@%$FFLAGS%g
-s%@DEFS@%$DEFS%g
-s%@LDFLAGS@%$LDFLAGS%g
-s%@LIBS@%$LIBS%g
-s%@exec_prefix@%$exec_prefix%g
-s%@prefix@%$prefix%g
-s%@program_transform_name@%$program_transform_name%g
-s%@bindir@%$bindir%g
-s%@sbindir@%$sbindir%g
-s%@libexecdir@%$libexecdir%g
-s%@datadir@%$datadir%g
-s%@sysconfdir@%$sysconfdir%g
-s%@sharedstatedir@%$sharedstatedir%g
-s%@localstatedir@%$localstatedir%g
-s%@libdir@%$libdir%g
-s%@includedir@%$includedir%g
-s%@oldincludedir@%$oldincludedir%g
-s%@infodir@%$infodir%g
-s%@mandir@%$mandir%g
-s%@host@%$host%g
-s%@host_alias@%$host_alias%g
-s%@host_cpu@%$host_cpu%g
-s%@host_vendor@%$host_vendor%g
-s%@host_os@%$host_os%g
-s%@target@%$target%g
-s%@target_alias@%$target_alias%g
-s%@target_cpu@%$target_cpu%g
-s%@target_vendor@%$target_vendor%g
-s%@target_os@%$target_os%g
-s%@build@%$build%g
-s%@build_alias@%$build_alias%g
-s%@build_cpu@%$build_cpu%g
-s%@build_vendor@%$build_vendor%g
-s%@build_os@%$build_os%g
-s%@CC@%$CC%g
-s%@INSTALL_PROGRAM@%$INSTALL_PROGRAM%g
-s%@INSTALL_SCRIPT@%$INSTALL_SCRIPT%g
-s%@INSTALL_DATA@%$INSTALL_DATA%g
-s%@CC_FOR_BUILD@%$CC_FOR_BUILD%g
-s%@HDEFINES@%$HDEFINES%g
-s%@AR@%$AR%g
-s%@RANLIB@%$RANLIB%g
-s%@SET_MAKE@%$SET_MAKE%g
-s%@CPP@%$CPP%g
-s%@ALLOCA@%$ALLOCA%g
-s%@USE_NLS@%$USE_NLS%g
-s%@MSGFMT@%$MSGFMT%g
-s%@GMSGFMT@%$GMSGFMT%g
-s%@XGETTEXT@%$XGETTEXT%g
-s%@USE_INCLUDED_LIBINTL@%$USE_INCLUDED_LIBINTL%g
-s%@CATALOGS@%$CATALOGS%g
-s%@CATOBJEXT@%$CATOBJEXT%g
-s%@DATADIRNAME@%$DATADIRNAME%g
-s%@GMOFILES@%$GMOFILES%g
-s%@INSTOBJEXT@%$INSTOBJEXT%g
-s%@INTLDEPS@%$INTLDEPS%g
-s%@INTLLIBS@%$INTLLIBS%g
-s%@INTLOBJS@%$INTLOBJS%g
-s%@POFILES@%$POFILES%g
-s%@POSUB@%$POSUB%g
-s%@INCLUDE_LOCALE_H@%$INCLUDE_LOCALE_H%g
-s%@GT_NO@%$GT_NO%g
-s%@GT_YES@%$GT_YES%g
-s%@MKINSTALLDIRS@%$MKINSTALLDIRS%g
-s%@l@%$l%g
-s%@MAINT@%$MAINT%g
-s%@sim_bswap@%$sim_bswap%g
-s%@sim_cflags@%$sim_cflags%g
-s%@sim_debug@%$sim_debug%g
-s%@sim_stdio@%$sim_stdio%g
-s%@sim_trace@%$sim_trace%g
-s%@sim_profile@%$sim_profile%g
-s%@EXEEXT@%$EXEEXT%g
-
-CEOF
-EOF
-
-cat >> $CONFIG_STATUS <<\EOF
-
-# Split the substitutions into bite-sized pieces for seds with
-# small command number limits, like on Digital OSF/1 and HP-UX.
-ac_max_sed_cmds=90 # Maximum number of lines to put in a sed script.
-ac_file=1 # Number of current file.
-ac_beg=1 # First line for current file.
-ac_end=$ac_max_sed_cmds # Line after last line for current file.
-ac_more_lines=:
-ac_sed_cmds=""
-while $ac_more_lines; do
- if test $ac_beg -gt 1; then
- sed "1,${ac_beg}d; ${ac_end}q" conftest.subs > conftest.s$ac_file
- else
- sed "${ac_end}q" conftest.subs > conftest.s$ac_file
- fi
- if test ! -s conftest.s$ac_file; then
- ac_more_lines=false
- rm -f conftest.s$ac_file
- else
- if test -z "$ac_sed_cmds"; then
- ac_sed_cmds="sed -f conftest.s$ac_file"
- else
- ac_sed_cmds="$ac_sed_cmds | sed -f conftest.s$ac_file"
- fi
- ac_file=`expr $ac_file + 1`
- ac_beg=$ac_end
- ac_end=`expr $ac_end + $ac_max_sed_cmds`
- fi
-done
-if test -z "$ac_sed_cmds"; then
- ac_sed_cmds=cat
-fi
-EOF
-
-cat >> $CONFIG_STATUS <<EOF
-
-CONFIG_FILES=\${CONFIG_FILES-"Makefile.sim:Makefile.in Make-common.sim:../common/Make-common.in .gdbinit:../common/gdbinit.in"}
-EOF
-cat >> $CONFIG_STATUS <<\EOF
-for ac_file in .. $CONFIG_FILES; do if test "x$ac_file" != x..; then
- # Support "outfile[:infile[:infile...]]", defaulting infile="outfile.in".
- case "$ac_file" in
- *:*) ac_file_in=`echo "$ac_file"|sed 's%[^:]*:%%'`
- ac_file=`echo "$ac_file"|sed 's%:.*%%'` ;;
- *) ac_file_in="${ac_file}.in" ;;
- esac
-
- # Adjust a relative srcdir, top_srcdir, and INSTALL for subdirectories.
-
- # Remove last slash and all that follows it. Not all systems have dirname.
- ac_dir=`echo $ac_file|sed 's%/[^/][^/]*$%%'`
- if test "$ac_dir" != "$ac_file" && test "$ac_dir" != .; then
- # The file is in a subdirectory.
- test ! -d "$ac_dir" && mkdir "$ac_dir"
- ac_dir_suffix="/`echo $ac_dir|sed 's%^\./%%'`"
- # A "../" for each directory in $ac_dir_suffix.
- ac_dots=`echo $ac_dir_suffix|sed 's%/[^/]*%../%g'`
- else
- ac_dir_suffix= ac_dots=
- fi
-
- case "$ac_given_srcdir" in
- .) srcdir=.
- if test -z "$ac_dots"; then top_srcdir=.
- else top_srcdir=`echo $ac_dots|sed 's%/$%%'`; fi ;;
- /*) srcdir="$ac_given_srcdir$ac_dir_suffix"; top_srcdir="$ac_given_srcdir" ;;
- *) # Relative path.
- srcdir="$ac_dots$ac_given_srcdir$ac_dir_suffix"
- top_srcdir="$ac_dots$ac_given_srcdir" ;;
- esac
-
- case "$ac_given_INSTALL" in
- [/$]*) INSTALL="$ac_given_INSTALL" ;;
- *) INSTALL="$ac_dots$ac_given_INSTALL" ;;
- esac
-
- echo creating "$ac_file"
- rm -f "$ac_file"
- configure_input="Generated automatically from `echo $ac_file_in|sed 's%.*/%%'` by configure."
- case "$ac_file" in
- *Makefile*) ac_comsub="1i\\
-# $configure_input" ;;
- *) ac_comsub= ;;
- esac
-
- ac_file_inputs=`echo $ac_file_in|sed -e "s%^%$ac_given_srcdir/%" -e "s%:% $ac_given_srcdir/%g"`
- sed -e "$ac_comsub
-s%@configure_input@%$configure_input%g
-s%@srcdir@%$srcdir%g
-s%@top_srcdir@%$top_srcdir%g
-s%@INSTALL@%$INSTALL%g
-" $ac_file_inputs | (eval "$ac_sed_cmds") > $ac_file
-fi; done
-rm -f conftest.s*
-
-# These sed commands are passed to sed as "A NAME B NAME C VALUE D", where
-# NAME is the cpp macro being defined and VALUE is the value it is being given.
-#
-# ac_d sets the value in "#define NAME VALUE" lines.
-ac_dA='s%^\([ ]*\)#\([ ]*define[ ][ ]*\)'
-ac_dB='\([ ][ ]*\)[^ ]*%\1#\2'
-ac_dC='\3'
-ac_dD='%g'
-# ac_u turns "#undef NAME" with trailing blanks into "#define NAME VALUE".
-ac_uA='s%^\([ ]*\)#\([ ]*\)undef\([ ][ ]*\)'
-ac_uB='\([ ]\)%\1#\2define\3'
-ac_uC=' '
-ac_uD='\4%g'
-# ac_e turns "#undef NAME" without trailing blanks into "#define NAME VALUE".
-ac_eA='s%^\([ ]*\)#\([ ]*\)undef\([ ][ ]*\)'
-ac_eB='$%\1#\2define\3'
-ac_eC=' '
-ac_eD='%g'
-
-if test "${CONFIG_HEADERS+set}" != set; then
-EOF
-cat >> $CONFIG_STATUS <<EOF
- CONFIG_HEADERS="config.h:config.in"
-EOF
-cat >> $CONFIG_STATUS <<\EOF
-fi
-for ac_file in .. $CONFIG_HEADERS; do if test "x$ac_file" != x..; then
- # Support "outfile[:infile[:infile...]]", defaulting infile="outfile.in".
- case "$ac_file" in
- *:*) ac_file_in=`echo "$ac_file"|sed 's%[^:]*:%%'`
- ac_file=`echo "$ac_file"|sed 's%:.*%%'` ;;
- *) ac_file_in="${ac_file}.in" ;;
- esac
-
- echo creating $ac_file
-
- rm -f conftest.frag conftest.in conftest.out
- ac_file_inputs=`echo $ac_file_in|sed -e "s%^%$ac_given_srcdir/%" -e "s%:% $ac_given_srcdir/%g"`
- cat $ac_file_inputs > conftest.in
-
-EOF
-
-# Transform confdefs.h into a sed script conftest.vals that substitutes
-# the proper values into config.h.in to produce config.h. And first:
-# Protect against being on the right side of a sed subst in config.status.
-# Protect against being in an unquoted here document in config.status.
-rm -f conftest.vals
-cat > conftest.hdr <<\EOF
-s/[\\&%]/\\&/g
-s%[\\$`]%\\&%g
-s%#define \([A-Za-z_][A-Za-z0-9_]*\) *\(.*\)%${ac_dA}\1${ac_dB}\1${ac_dC}\2${ac_dD}%gp
-s%ac_d%ac_u%gp
-s%ac_u%ac_e%gp
-EOF
-sed -n -f conftest.hdr confdefs.h > conftest.vals
-rm -f conftest.hdr
-
-# This sed command replaces #undef with comments. This is necessary, for
-# example, in the case of _POSIX_SOURCE, which is predefined and required
-# on some systems where configure will not decide to define it.
-cat >> conftest.vals <<\EOF
-s%^[ ]*#[ ]*undef[ ][ ]*[a-zA-Z_][a-zA-Z_0-9]*%/* & */%
-EOF
-
-# Break up conftest.vals because some shells have a limit on
-# the size of here documents, and old seds have small limits too.
-
-rm -f conftest.tail
-while :
-do
- ac_lines=`grep -c . conftest.vals`
- # grep -c gives empty output for an empty file on some AIX systems.
- if test -z "$ac_lines" || test "$ac_lines" -eq 0; then break; fi
- # Write a limited-size here document to conftest.frag.
- echo ' cat > conftest.frag <<CEOF' >> $CONFIG_STATUS
- sed ${ac_max_here_lines}q conftest.vals >> $CONFIG_STATUS
- echo 'CEOF
- sed -f conftest.frag conftest.in > conftest.out
- rm -f conftest.in
- mv conftest.out conftest.in
-' >> $CONFIG_STATUS
- sed 1,${ac_max_here_lines}d conftest.vals > conftest.tail
- rm -f conftest.vals
- mv conftest.tail conftest.vals
-done
-rm -f conftest.vals
-
-cat >> $CONFIG_STATUS <<\EOF
- rm -f conftest.frag conftest.h
- echo "/* $ac_file. Generated automatically by configure. */" > conftest.h
- cat conftest.in >> conftest.h
- rm -f conftest.in
- if cmp -s $ac_file conftest.h 2>/dev/null; then
- echo "$ac_file is unchanged"
- rm -f conftest.h
- else
- # Remove last slash and all that follows it. Not all systems have dirname.
- ac_dir=`echo $ac_file|sed 's%/[^/][^/]*$%%'`
- if test "$ac_dir" != "$ac_file" && test "$ac_dir" != .; then
- # The file is in a subdirectory.
- test ! -d "$ac_dir" && mkdir "$ac_dir"
- fi
- rm -f $ac_file
- mv conftest.h $ac_file
- fi
-fi; done
-
-EOF
-
-cat >> $CONFIG_STATUS <<EOF
-ac_sources="$sim_link_files"
-ac_dests="$sim_link_links"
-EOF
-
-cat >> $CONFIG_STATUS <<\EOF
-srcdir=$ac_given_srcdir
-while test -n "$ac_sources"; do
- set $ac_dests; ac_dest=$1; shift; ac_dests=$*
- set $ac_sources; ac_source=$1; shift; ac_sources=$*
-
- echo "linking $srcdir/$ac_source to $ac_dest"
-
- if test ! -r $srcdir/$ac_source; then
- { echo "configure: error: $srcdir/$ac_source: File not found" 1>&2; exit 1; }
- fi
- rm -f $ac_dest
-
- # Make relative symlinks.
- # Remove last slash and all that follows it. Not all systems have dirname.
- ac_dest_dir=`echo $ac_dest|sed 's%/[^/][^/]*$%%'`
- if test "$ac_dest_dir" != "$ac_dest" && test "$ac_dest_dir" != .; then
- # The dest file is in a subdirectory.
- test ! -d "$ac_dest_dir" && mkdir "$ac_dest_dir"
- ac_dest_dir_suffix="/`echo $ac_dest_dir|sed 's%^\./%%'`"
- # A "../" for each directory in $ac_dest_dir_suffix.
- ac_dots=`echo $ac_dest_dir_suffix|sed 's%/[^/]*%../%g'`
- else
- ac_dest_dir_suffix= ac_dots=
- fi
-
- case "$srcdir" in
- [/$]*) ac_rel_source="$srcdir/$ac_source" ;;
- *) ac_rel_source="$ac_dots$srcdir/$ac_source" ;;
- esac
-
- # Make a symlink if possible; otherwise try a hard link.
- if ln -s $ac_rel_source $ac_dest 2>/dev/null ||
- ln $srcdir/$ac_source $ac_dest; then :
- else
- { echo "configure: error: can not link $ac_dest to $srcdir/$ac_source" 1>&2; exit 1; }
- fi
-done
-EOF
-cat >> $CONFIG_STATUS <<EOF
-
-EOF
-cat >> $CONFIG_STATUS <<\EOF
-case "x$CONFIG_FILES" in
- xMakefile*)
- echo "Merging Makefile.sim+Make-common.sim into Makefile ..."
- rm -f Makesim1.tmp Makesim2.tmp Makefile
- sed -n -e '/^## COMMON_PRE_/,/^## End COMMON_PRE_/ p' <Make-common.sim >Makesim1.tmp
- sed -n -e '/^## COMMON_POST_/,/^## End COMMON_POST_/ p' <Make-common.sim >Makesim2.tmp
- sed -e '/^## COMMON_PRE_/ r Makesim1.tmp' \
- -e '/^## COMMON_POST_/ r Makesim2.tmp' \
- <Makefile.sim >Makefile
- rm -f Makefile.sim Make-common.sim Makesim1.tmp Makesim2.tmp
- ;;
- esac
- case "x$CONFIG_HEADERS" in xconfig.h:config.in) echo > stamp-h ;; esac
-
-exit 0
-EOF
-chmod +x $CONFIG_STATUS
-rm -fr confdefs* $ac_clean_files
-test "$no_create" = yes || ${CONFIG_SHELL-/bin/sh} $CONFIG_STATUS || exit 1
-
-
diff --git a/sim/mcore/configure.in b/sim/mcore/configure.in
deleted file mode 100644
index 033b0bc1615..00000000000
--- a/sim/mcore/configure.in
+++ /dev/null
@@ -1,10 +0,0 @@
-dnl Process this file with autoconf to produce a configure script.
-sinclude(../common/aclocal.m4)
-AC_PREREQ(2.5)dnl
-AC_INIT(Makefile.in)
-
-SIM_AC_COMMON
-
-AC_CHECK_HEADERS(unistd.h)
-
-SIM_AC_OUTPUT
diff --git a/sim/mcore/interp.c b/sim/mcore/interp.c
deleted file mode 100644
index 456e4811cd4..00000000000
--- a/sim/mcore/interp.c
+++ /dev/null
@@ -1,2214 +0,0 @@
-/* Simulator for Motorola's MCore processor
- Copyright (C) 1999, 2000 Free Software Foundation, Inc.
- Contributed by Cygnus Solutions.
-
-This file is part of GDB, the GNU debugger.
-
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License along
-with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
-
-#include <signal.h>
-#include "sysdep.h"
-#include <sys/times.h>
-#include <sys/param.h>
-#include <netinet/in.h> /* for byte ordering macros */
-#include "bfd.h"
-#include "callback.h"
-#include "libiberty.h"
-#include "remote-sim.h"
-
-#ifndef NUM_ELEM
-#define NUM_ELEM(A) (sizeof (A) / sizeof (A)[0])
-#endif
-
-
-typedef long int word;
-typedef unsigned long int uword;
-
-static int target_big_endian = 0;
-static unsigned long heap_ptr = 0;
-host_callback * callback;
-
-
-unsigned long
-mcore_extract_unsigned_integer (addr, len)
- unsigned char * addr;
- int len;
-{
- unsigned long retval;
- unsigned char * p;
- unsigned char * startaddr = (unsigned char *)addr;
- unsigned char * endaddr = startaddr + len;
-
- if (len > (int) sizeof (unsigned long))
- printf ("That operation is not available on integers of more than %d bytes.",
- sizeof (unsigned long));
-
- /* Start at the most significant end of the integer, and work towards
- the least significant. */
- retval = 0;
-
- if (! target_big_endian)
- {
- for (p = endaddr; p > startaddr;)
- retval = (retval << 8) | * -- p;
- }
- else
- {
- for (p = startaddr; p < endaddr;)
- retval = (retval << 8) | * p ++;
- }
-
- return retval;
-}
-
-void
-mcore_store_unsigned_integer (addr, len, val)
- unsigned char * addr;
- int len;
- unsigned long val;
-{
- unsigned char * p;
- unsigned char * startaddr = (unsigned char *)addr;
- unsigned char * endaddr = startaddr + len;
-
- if (! target_big_endian)
- {
- for (p = startaddr; p < endaddr;)
- {
- * p ++ = val & 0xff;
- val >>= 8;
- }
- }
- else
- {
- for (p = endaddr; p > startaddr;)
- {
- * -- p = val & 0xff;
- val >>= 8;
- }
- }
-}
-
-/* The machine state.
- This state is maintained in host byte order. The
- fetch/store register functions must translate between host
- byte order and the target processor byte order.
- Keeping this data in target byte order simplifies the register
- read/write functions. Keeping this data in native order improves
- the performance of the simulator. Simulation speed is deemed more
- important. */
-
-/* The ordering of the mcore_regset structure is matched in the
- gdb/config/mcore/tm-mcore.h file in the REGISTER_NAMES macro. */
-struct mcore_regset
-{
- word gregs [16]; /* primary registers */
- word alt_gregs [16]; /* alt register file */
- word cregs [32]; /* control registers */
- word pc; /* the pc */
- int ticks;
- int stalls;
- int cycles;
- int insts;
- int exception;
- unsigned long msize;
- unsigned char * memory;
- word * active_gregs;
-};
-
-union
-{
- struct mcore_regset asregs;
- word asints [1]; /* but accessed larger... */
-} cpu;
-
-#define LAST_VALID_CREG 32 /* only 0..12 implemented */
-#define NUM_MCORE_REGS (16 + 16 + LAST_VALID_CREG + 1)
-
-int memcycles = 1;
-
-static SIM_OPEN_KIND sim_kind;
-static char * myname;
-
-static int issue_messages = 0;
-
-#define gr asregs.active_gregs
-#define cr asregs.cregs
-#define sr asregs.cregs[0]
-#define vbr asregs.cregs[1]
-#define esr asregs.cregs[2]
-#define fsr asregs.cregs[3]
-#define epc asregs.cregs[4]
-#define fpc asregs.cregs[5]
-#define ss0 asregs.cregs[6]
-#define ss1 asregs.cregs[7]
-#define ss2 asregs.cregs[8]
-#define ss3 asregs.cregs[9]
-#define ss4 asregs.cregs[10]
-#define gcr asregs.cregs[11]
-#define gsr asregs.cregs[12]
-#define mem asregs.memory
-
-/* maniuplate the carry bit */
-#define C_ON() (cpu.sr & 1)
-#define C_VALUE() (cpu.sr & 1)
-#define C_OFF() ((cpu.sr & 1) == 0)
-#define SET_C() {cpu.sr |= 1;}
-#define CLR_C() {cpu.sr &= 0xfffffffe;}
-#define NEW_C(v) {CLR_C(); cpu.sr |= ((v) & 1);}
-
-#define SR_AF() ((cpu.sr >> 1) & 1)
-
-#define TRAPCODE 1 /* r1 holds which function we want */
-#define PARM1 2 /* first parameter */
-#define PARM2 3
-#define PARM3 4
-#define PARM4 5
-#define RET1 2 /* register for return values. */
-
-long
-int_sbrk (inc_bytes)
- int inc_bytes;
-{
- long addr;
-
- addr = heap_ptr;
-
- heap_ptr += inc_bytes;
-
- if (issue_messages && heap_ptr>cpu.gr[0])
- fprintf (stderr, "Warning: heap_ptr overlaps stack!\n");
-
- return addr;
-}
-
-static void INLINE
-wbat (x, v)
- word x, v;
-{
- if (((uword)x) >= cpu.asregs.msize)
- {
- if (issue_messages)
- fprintf (stderr, "byte write to 0x%x outside memory range\n", x);
-
- cpu.asregs.exception = SIGSEGV;
- }
- else
- {
- unsigned char *p = cpu.mem + x;
- p[0] = v;
- }
-}
-
-static void INLINE
-wlat (x, v)
- word x, v;
-{
- if (((uword)x) >= cpu.asregs.msize)
- {
- if (issue_messages)
- fprintf (stderr, "word write to 0x%x outside memory range\n", x);
-
- cpu.asregs.exception = SIGSEGV;
- }
- else
- {
- if ((x & 3) != 0)
- {
- if (issue_messages)
- fprintf (stderr, "word write to unaligned memory address: 0x%x\n", x);
-
- cpu.asregs.exception = SIGBUS;
- }
- else if (! target_big_endian)
- {
- unsigned char * p = cpu.mem + x;
- p[3] = v >> 24;
- p[2] = v >> 16;
- p[1] = v >> 8;
- p[0] = v;
- }
- else
- {
- unsigned char * p = cpu.mem + x;
- p[0] = v >> 24;
- p[1] = v >> 16;
- p[2] = v >> 8;
- p[3] = v;
- }
- }
-}
-
-static void INLINE
-what (x, v)
- word x, v;
-{
- if (((uword)x) >= cpu.asregs.msize)
- {
- if (issue_messages)
- fprintf (stderr, "short write to 0x%x outside memory range\n", x);
-
- cpu.asregs.exception = SIGSEGV;
- }
- else
- {
- if ((x & 1) != 0)
- {
- if (issue_messages)
- fprintf (stderr, "short write to unaligned memory address: 0x%x\n",
- x);
-
- cpu.asregs.exception = SIGBUS;
- }
- else if (! target_big_endian)
- {
- unsigned char * p = cpu.mem + x;
- p[1] = v >> 8;
- p[0] = v;
- }
- else
- {
- unsigned char * p = cpu.mem + x;
- p[0] = v >> 8;
- p[1] = v;
- }
- }
-}
-
-/* Read functions. */
-static int INLINE
-rbat (x)
- word x;
-{
- if (((uword)x) >= cpu.asregs.msize)
- {
- if (issue_messages)
- fprintf (stderr, "byte read from 0x%x outside memory range\n", x);
-
- cpu.asregs.exception = SIGSEGV;
- return 0;
- }
- else
- {
- unsigned char * p = cpu.mem + x;
- return p[0];
- }
-}
-
-static int INLINE
-rlat (x)
- word x;
-{
- if (((uword) x) >= cpu.asregs.msize)
- {
- if (issue_messages)
- fprintf (stderr, "word read from 0x%x outside memory range\n", x);
-
- cpu.asregs.exception = SIGSEGV;
- return 0;
- }
- else
- {
- if ((x & 3) != 0)
- {
- if (issue_messages)
- fprintf (stderr, "word read from unaligned address: 0x%x\n", x);
-
- cpu.asregs.exception = SIGBUS;
- return 0;
- }
- else if (! target_big_endian)
- {
- unsigned char * p = cpu.mem + x;
- return (p[3] << 24) | (p[2] << 16) | (p[1] << 8) | p[0];
- }
- else
- {
- unsigned char * p = cpu.mem + x;
- return (p[0] << 24) | (p[1] << 16) | (p[2] << 8) | p[3];
- }
- }
-}
-
-static int INLINE
-rhat (x)
- word x;
-{
- if (((uword)x) >= cpu.asregs.msize)
- {
- if (issue_messages)
- fprintf (stderr, "short read from 0x%x outside memory range\n", x);
-
- cpu.asregs.exception = SIGSEGV;
- return 0;
- }
- else
- {
- if ((x & 1) != 0)
- {
- if (issue_messages)
- fprintf (stderr, "short read from unaligned address: 0x%x\n", x);
-
- cpu.asregs.exception = SIGBUS;
- return 0;
- }
- else if (! target_big_endian)
- {
- unsigned char * p = cpu.mem + x;
- return (p[1] << 8) | p[0];
- }
- else
- {
- unsigned char * p = cpu.mem + x;
- return (p[0] << 8) | p[1];
- }
- }
-}
-
-
-#define SEXTB(x) (((x & 0xff) ^ (~ 0x7f)) + 0x80)
-#define SEXTW(y) ((int)((short)y))
-
-static int
-IOMEM (addr, write, value)
- int addr;
- int write;
- int value;
-{
-}
-
-/* Default to a 8 Mbyte (== 2^23) memory space. */
-static int sim_memory_size = 23;
-
-#define MEM_SIZE_FLOOR 64
-void
-sim_size (power)
- int power;
-{
- sim_memory_size = power;
- cpu.asregs.msize = 1 << sim_memory_size;
-
- if (cpu.mem)
- free (cpu.mem);
-
- /* Watch out for the '0 count' problem. There's probably a better
- way.. e.g., why do we use 64 here? */
- if (cpu.asregs.msize < 64) /* Ensure a boundary. */
- cpu.mem = (unsigned char *) calloc (64, (64 + cpu.asregs.msize) / 64);
- else
- cpu.mem = (unsigned char *) calloc (64, cpu.asregs.msize / 64);
-
- if (!cpu.mem)
- {
- if (issue_messages)
- fprintf (stderr,
- "Not enough VM for simulation of %d bytes of RAM\n",
- cpu.asregs.msize);
-
- cpu.asregs.msize = 1;
- cpu.mem = (unsigned char *) calloc (1, 1);
- }
-}
-
-static void
-init_pointers ()
-{
- if (cpu.asregs.msize != (1 << sim_memory_size))
- sim_size (sim_memory_size);
-}
-
-static void
-set_initial_gprs ()
-{
- int i;
- long space;
- unsigned long memsize;
-
- init_pointers ();
-
- /* Set up machine just out of reset. */
- cpu.asregs.pc = 0;
- cpu.sr = 0;
-
- memsize = cpu.asregs.msize / (1024 * 1024);
-
- if (issue_messages > 1)
- fprintf (stderr, "Simulated memory of %d Mbytes (0x0 .. 0x%08x)\n",
- memsize, cpu.asregs.msize - 1);
-
- /* Clean out the GPRs and alternate GPRs. */
- for (i = 0; i < 16; i++)
- {
- cpu.asregs.gregs[i] = 0;
- cpu.asregs.alt_gregs[i] = 0;
- }
-
- /* Make our register set point to the right place. */
- if (SR_AF())
- cpu.asregs.active_gregs = &cpu.asregs.alt_gregs[0];
- else
- cpu.asregs.active_gregs = &cpu.asregs.gregs[0];
-
- /* ABI specifies initial values for these registers. */
- cpu.gr[0] = cpu.asregs.msize - 4;
-
- /* dac fix, the stack address must be 8-byte aligned! */
- cpu.gr[0] = cpu.gr[0] - cpu.gr[0] % 8;
- cpu.gr[PARM1] = 0;
- cpu.gr[PARM2] = 0;
- cpu.gr[PARM3] = 0;
- cpu.gr[PARM4] = cpu.gr[0];
-}
-
-static void
-interrupt ()
-{
- cpu.asregs.exception = SIGINT;
-}
-
-/* Functions so that trapped open/close don't interfere with the
- parent's functions. We say that we can't close the descriptors
- that we didn't open. exit() and cleanup() get in trouble here,
- to some extent. That's the price of emulation. */
-
-unsigned char opened[100];
-
-static void
-log_open (fd)
- int fd;
-{
- if (fd < 0 || fd > NUM_ELEM (opened))
- return;
-
- opened[fd] = 1;
-}
-
-static void
-log_close (fd)
- int fd;
-{
- if (fd < 0 || fd > NUM_ELEM (opened))
- return;
-
- opened[fd] = 0;
-}
-
-static int
-is_opened (fd)
- int fd;
-{
- if (fd < 0 || fd > NUM_ELEM (opened))
- return 0;
-
- return opened[fd];
-}
-
-static void
-handle_trap1 ()
-{
- unsigned long a[3];
-
- switch ((unsigned long) (cpu.gr [TRAPCODE]))
- {
- case 3:
- a[0] = (unsigned long) (cpu.gr[PARM1]);
- a[1] = (unsigned long) (cpu.mem + cpu.gr[PARM2]);
- a[2] = (unsigned long) (cpu.gr[PARM3]);
- cpu.gr[RET1] = callback->read (callback, a[0], (char *) a[1], a[2]);
- break;
-
- case 4:
- a[0] = (unsigned long) (cpu.gr[PARM1]);
- a[1] = (unsigned long) (cpu.mem + cpu.gr[PARM2]);
- a[2] = (unsigned long) (cpu.gr[PARM3]);
- cpu.gr[RET1] = (int)callback->write (callback, a[0], (char *) a[1], a[2]);
- break;
-
- case 5:
- a[0] = (unsigned long) (cpu.mem + cpu.gr[PARM1]);
- a[1] = (unsigned long) (cpu.gr[PARM2]);
- /* a[2] = (unsigned long) (cpu.gr[PARM3]); */
- cpu.gr[RET1] = callback->open (callback, (char *) a[0], a[1]);
- log_open (cpu.gr[RET1]);
- break;
-
- case 6:
- a[0] = (unsigned long) (cpu.gr[PARM1]);
- /* Watch out for debugger's files. */
- if (is_opened (a[0]))
- {
- log_close (a[0]);
- cpu.gr[RET1] = callback->close (callback, a[0]);
- }
- else
- {
- /* Don't let him close it. */
- cpu.gr[RET1] = (-1);
- }
- break;
-
- case 9:
- a[0] = (unsigned long) (cpu.mem + cpu.gr[PARM1]);
- a[1] = (unsigned long) (cpu.mem + cpu.gr[PARM2]);
- cpu.gr[RET1] = link ((char *) a[0], (char *) a[1]);
- break;
-
- case 10:
- a[0] = (unsigned long) (cpu.mem + cpu.gr[PARM1]);
- cpu.gr[RET1] = callback->unlink (callback, (char *) a[0]);
- break;
-
- case 13:
- /* handle time(0) vs time(&var) */
- a[0] = (unsigned long) (cpu.gr[PARM1]);
- if (a[0])
- a[0] += (unsigned long) cpu.mem;
- cpu.gr[RET1] = callback->time (callback, (time_t *) a[0]);
- break;
-
- case 19:
- a[0] = (unsigned long) (cpu.gr[PARM1]);
- a[1] = (unsigned long) (cpu.gr[PARM2]);
- a[2] = (unsigned long) (cpu.gr[PARM3]);
- cpu.gr[RET1] = callback->lseek (callback, a[0], a[1], a[2]);
- break;
-
- case 33:
- a[0] = (unsigned long) (cpu.mem + cpu.gr[PARM1]);
- a[1] = (unsigned long) (cpu.gr[PARM2]);
- cpu.gr[RET1] = access ((char *) a[0], a[1]);
- break;
-
- case 43:
- a[0] = (unsigned long) (cpu.mem + cpu.gr[PARM1]);
-#if 0
- cpu.gr[RET1] = times ((char *)a[0]);
-#else
- {
- /* Give him simulated cycles for utime
- and an instruction count for stime. */
- struct tms
- {
- time_t tms_utime;
- time_t tms_stime;
- time_t tms_cutime;
- time_t tms_cstime;
- } t;
-
- t.tms_utime = cpu.asregs.cycles;
- t.tms_stime = cpu.asregs.insts;
- t.tms_cutime = t.tms_utime;
- t.tms_cstime = t.tms_stime;
-
- memcpy ((struct tms *)(a[0]), &t, sizeof (t));
-
- cpu.gr[RET1] = cpu.asregs.cycles;
- }
-#endif
- break;
-
- case 69:
- a[0] = (unsigned long) (cpu.gr[PARM1]);
- cpu.gr[RET1] = int_sbrk (a[0]);
- break;
-
- default:
- if (issue_messages)
- fprintf (stderr, "WARNING: sys call %d unimplemented\n",
- cpu.gr[TRAPCODE]);
- break;
- }
-}
-
-static void
-process_stub (what)
- int what;
-{
- /* These values should match those in libgloss/mcore/syscalls.s. */
- switch (what)
- {
- case 3: /* _read */
- case 4: /* _write */
- case 5: /* _open */
- case 6: /* _close */
- case 10: /* _unlink */
- case 19: /* _lseek */
- case 43: /* _times */
- cpu.gr [TRAPCODE] = what;
- handle_trap1 ();
- break;
-
- default:
- if (issue_messages)
- fprintf (stderr, "Unhandled stub opcode: %d\n", what);
- break;
- }
-}
-
-static void
-util (what)
- unsigned what;
-{
- switch (what)
- {
- case 0: /* exit */
- cpu.asregs.exception = SIGQUIT;
- break;
-
- case 1: /* printf */
- {
- unsigned long a[6];
- unsigned char *s;
- int i;
-
- a[0] = (unsigned long)(cpu.mem + cpu.gr[PARM1]);
-
- for (s = (unsigned char *)a[0], i = 1 ; *s && i < 6 ; s++)
- {
- if (*s == '%')
- {
- if (*++s == 's')
- a[i] = (unsigned long)(cpu.mem + cpu.gr[PARM1+i]);
- else
- a[i] = cpu.gr[i+PARM1];
- i++;
- }
- }
-
- cpu.gr[RET1] = printf ((char *)a[0], a[1], a[2], a[3], a[4], a[5]);
- }
- break;
-
- case 2: /* scanf */
- if (issue_messages)
- fprintf (stderr, "WARNING: scanf unimplemented\n");
- break;
-
- case 3: /* utime */
- cpu.gr[RET1] = cpu.asregs.insts;
- break;
-
- case 0xFF:
- process_stub (cpu.gr[1]);
- break;
-
- default:
- if (issue_messages)
- fprintf (stderr, "Unhandled util code: %x\n", what);
- break;
- }
-}
-
-/* For figuring out whether we carried; addc/subc use this. */
-static int
-iu_carry (a, b, cin)
- unsigned long a;
- unsigned long b;
- int cin;
-{
- unsigned long x;
-
- x = (a & 0xffff) + (b & 0xffff) + cin;
- x = (x >> 16) + (a >> 16) + (b >> 16);
- x >>= 16;
-
- return (x != 0);
-}
-
-#define WATCHFUNCTIONS 1
-#ifdef WATCHFUNCTIONS
-
-#define MAXWL 80
-word WL[MAXWL];
-char * WLstr[MAXWL];
-
-int ENDWL=0;
-int WLincyc;
-int WLcyc[MAXWL];
-int WLcnts[MAXWL];
-int WLmax[MAXWL];
-int WLmin[MAXWL];
-word WLendpc;
-int WLbcyc;
-int WLW;
-#endif
-
-#define RD (inst & 0xF)
-#define RS ((inst >> 4) & 0xF)
-#define RX ((inst >> 8) & 0xF)
-#define IMM5 ((inst >> 4) & 0x1F)
-#define IMM4 ((inst) & 0xF)
-
-static int tracing = 0;
-
-void
-sim_resume (sd, step, siggnal)
- SIM_DESC sd;
- int step, siggnal;
-{
- int needfetch;
- word ibuf;
- word pc;
- unsigned short inst;
- void (* sigsave)();
- int memops;
- int bonus_cycles;
- int insts;
- int w;
- int cycs;
- word WLhash;
-
- sigsave = signal (SIGINT, interrupt);
- cpu.asregs.exception = step ? SIGTRAP: 0;
- pc = cpu.asregs.pc;
-
- /* Fetch the initial instructions that we'll decode. */
- ibuf = rlat (pc & 0xFFFFFFFC);
- needfetch = 0;
-
- memops = 0;
- bonus_cycles = 0;
- insts = 0;
-
- /* make our register set point to the right place */
- if (SR_AF ())
- cpu.asregs.active_gregs = & cpu.asregs.alt_gregs[0];
- else
- cpu.asregs.active_gregs = & cpu.asregs.gregs[0];
-
- /* make a hash to speed exec loop, hope it's nonzero */
- WLhash = 0xFFFFFFFF;
-
- for (w = 1; w <= ENDWL; w++)
- WLhash = WLhash & WL[w];
-
- do
- {
- word oldpc;
-
- insts ++;
-
- if (pc & 02)
- {
- if (! target_big_endian)
- inst = ibuf >> 16;
- else
- inst = ibuf & 0xFFFF;
- needfetch = 1;
- }
- else
- {
- if (! target_big_endian)
- inst = ibuf & 0xFFFF;
- else
- inst = ibuf >> 16;
- }
-
-#ifdef WATCHFUNCTIONS
- /* now scan list of watch addresses, if match, count it and
- note return address and count cycles until pc=return address */
-
- if ((WLincyc == 1) && (pc == WLendpc))
- {
- cycs = (cpu.asregs.cycles + (insts + bonus_cycles +
- (memops * memcycles)) - WLbcyc);
-
- if (WLcnts[WLW] == 1)
- {
- WLmax[WLW] = cycs;
- WLmin[WLW] = cycs;
- WLcyc[WLW] = 0;
- }
-
- if (cycs > WLmax[WLW])
- {
- WLmax[WLW] = cycs;
- }
-
- if (cycs < WLmin[WLW])
- {
- WLmin[WLW] = cycs;
- }
-
- WLcyc[WLW] += cycs;
- WLincyc = 0;
- WLendpc = 0;
- }
-
- /* Optimize with a hash to speed loop. */
- if (WLincyc == 0)
- {
- if ((WLhash == 0) || ((WLhash & pc) != 0))
- {
- for (w=1; w <= ENDWL; w++)
- {
- if (pc == WL[w])
- {
- WLcnts[w]++;
- WLbcyc = cpu.asregs.cycles + insts
- + bonus_cycles + (memops * memcycles);
- WLendpc = cpu.gr[15];
- WLincyc = 1;
- WLW = w;
- break;
- }
- }
- }
- }
-#endif
-
- if (tracing)
- fprintf (stderr, "%.4x: inst = %.4x ", pc, inst);
-
- oldpc = pc;
-
- pc += 2;
-
- switch (inst >> 8)
- {
- case 0x00:
- switch RS
- {
- case 0x0:
- switch RD
- {
- case 0x0: /* bkpt */
- cpu.asregs.exception = SIGTRAP;
- pc -= 2;
- break;
-
- case 0x1: /* sync */
- break;
-
- case 0x2: /* rte */
- pc = cpu.epc;
- cpu.sr = cpu.esr;
- needfetch = 1;
-
- if (SR_AF ())
- cpu.asregs.active_gregs = & cpu.asregs.alt_gregs[0];
- else
- cpu.asregs.active_gregs = & cpu.asregs.gregs[0];
- break;
-
- case 0x3: /* rfi */
- pc = cpu.fpc;
- cpu.sr = cpu.fsr;
- needfetch = 1;
-
- if (SR_AF ())
- cpu.asregs.active_gregs = &cpu.asregs.alt_gregs[0];
- else
- cpu.asregs.active_gregs = &cpu.asregs.gregs[0];
- break;
-
- case 0x4: /* stop */
- if (issue_messages)
- fprintf (stderr, "WARNING: stop unimplemented\n");
- break;
-
- case 0x5: /* wait */
- if (issue_messages)
- fprintf (stderr, "WARNING: wait unimplemented\n");
- break;
-
- case 0x6: /* doze */
- if (issue_messages)
- fprintf (stderr, "WARNING: doze unimplemented\n");
- break;
-
- case 0x7:
- cpu.asregs.exception = SIGILL; /* illegal */
- break;
-
- case 0x8: /* trap 0 */
- case 0xA: /* trap 2 */
- case 0xB: /* trap 3 */
- cpu.asregs.exception = SIGTRAP;
- break;
-
- case 0xC: /* trap 4 */
- case 0xD: /* trap 5 */
- case 0xE: /* trap 6 */
- cpu.asregs.exception = SIGILL; /* illegal */
- break;
-
- case 0xF: /* trap 7 */
- cpu.asregs.exception = SIGTRAP; /* integer div-by-0 */
- break;
-
- case 0x9: /* trap 1 */
- handle_trap1 ();
- break;
- }
- break;
-
- case 0x1:
- cpu.asregs.exception = SIGILL; /* illegal */
- break;
-
- case 0x2: /* mvc */
- cpu.gr[RD] = C_VALUE();
- break;
- case 0x3: /* mvcv */
- cpu.gr[RD] = C_OFF();
- break;
- case 0x4: /* ldq */
- {
- char *addr = (char *)cpu.gr[RD];
- int regno = 4; /* always r4-r7 */
-
- bonus_cycles++;
- memops += 4;
- do
- {
- cpu.gr[regno] = rlat(addr);
- addr += 4;
- regno++;
- }
- while ((regno&0x3) != 0);
- }
- break;
- case 0x5: /* stq */
- {
- char *addr = (char *)cpu.gr[RD];
- int regno = 4; /* always r4-r7 */
-
- memops += 4;
- bonus_cycles++;
- do
- {
- wlat(addr, cpu.gr[regno]);
- addr += 4;
- regno++;
- }
- while ((regno & 0x3) != 0);
- }
- break;
- case 0x6: /* ldm */
- {
- char *addr = (char *)cpu.gr[0];
- int regno = RD;
-
- /* bonus cycle is really only needed if
- the next insn shifts the last reg loaded.
-
- bonus_cycles++;
- */
- memops += 16-regno;
- while (regno <= 0xF)
- {
- cpu.gr[regno] = rlat(addr);
- addr += 4;
- regno++;
- }
- }
- break;
- case 0x7: /* stm */
- {
- char *addr = (char *)cpu.gr[0];
- int regno = RD;
-
- /* this should be removed! */
- /* bonus_cycles ++; */
-
- memops += 16 - regno;
- while (regno <= 0xF)
- {
- wlat(addr, cpu.gr[regno]);
- addr += 4;
- regno++;
- }
- }
- break;
-
- case 0x8: /* dect */
- cpu.gr[RD] -= C_VALUE();
- break;
- case 0x9: /* decf */
- cpu.gr[RD] -= C_OFF();
- break;
- case 0xA: /* inct */
- cpu.gr[RD] += C_VALUE();
- break;
- case 0xB: /* incf */
- cpu.gr[RD] += C_OFF();
- break;
- case 0xC: /* jmp */
- pc = cpu.gr[RD];
- if (tracing && RD == 15)
- fprintf (stderr, "Func return, r2 = %x, r3 = %x\n",
- cpu.gr[2], cpu.gr[3]);
- bonus_cycles++;
- needfetch = 1;
- break;
- case 0xD: /* jsr */
- cpu.gr[15] = pc;
- pc = cpu.gr[RD];
- bonus_cycles++;
- needfetch = 1;
- break;
- case 0xE: /* ff1 */
- {
- word tmp, i;
- tmp = cpu.gr[RD];
- for (i = 0; !(tmp & 0x80000000) && i < 32; i++)
- tmp <<= 1;
- cpu.gr[RD] = i;
- }
- break;
- case 0xF: /* brev */
- {
- word tmp;
- tmp = cpu.gr[RD];
- tmp = ((tmp & 0xaaaaaaaa) >> 1) | ((tmp & 0x55555555) << 1);
- tmp = ((tmp & 0xcccccccc) >> 2) | ((tmp & 0x33333333) << 2);
- tmp = ((tmp & 0xf0f0f0f0) >> 4) | ((tmp & 0x0f0f0f0f) << 4);
- tmp = ((tmp & 0xff00ff00) >> 8) | ((tmp & 0x00ff00ff) << 8);
- cpu.gr[RD] = ((tmp & 0xffff0000) >> 16) | ((tmp & 0x0000ffff) << 16);
- }
- break;
- }
- break;
- case 0x01:
- switch RS
- {
- case 0x0: /* xtrb3 */
- cpu.gr[1] = (cpu.gr[RD]) & 0xFF;
- NEW_C (cpu.gr[RD] != 0);
- break;
- case 0x1: /* xtrb2 */
- cpu.gr[1] = (cpu.gr[RD]>>8) & 0xFF;
- NEW_C (cpu.gr[RD] != 0);
- break;
- case 0x2: /* xtrb1 */
- cpu.gr[1] = (cpu.gr[RD]>>16) & 0xFF;
- NEW_C (cpu.gr[RD] != 0);
- break;
- case 0x3: /* xtrb0 */
- cpu.gr[1] = (cpu.gr[RD]>>24) & 0xFF;
- NEW_C (cpu.gr[RD] != 0);
- break;
- case 0x4: /* zextb */
- cpu.gr[RD] &= 0x000000FF;
- break;
- case 0x5: /* sextb */
- {
- long tmp;
- tmp = cpu.gr[RD];
- tmp <<= 24;
- tmp >>= 24;
- cpu.gr[RD] = tmp;
- }
- break;
- case 0x6: /* zexth */
- cpu.gr[RD] &= 0x0000FFFF;
- break;
- case 0x7: /* sexth */
- {
- long tmp;
- tmp = cpu.gr[RD];
- tmp <<= 16;
- tmp >>= 16;
- cpu.gr[RD] = tmp;
- }
- break;
- case 0x8: /* declt */
- --cpu.gr[RD];
- NEW_C ((long)cpu.gr[RD] < 0);
- break;
- case 0x9: /* tstnbz */
- {
- word tmp = cpu.gr[RD];
- NEW_C ((tmp & 0xFF000000) != 0 &&
- (tmp & 0x00FF0000) != 0 && (tmp & 0x0000FF00) != 0 &&
- (tmp & 0x000000FF) != 0);
- }
- break;
- case 0xA: /* decgt */
- --cpu.gr[RD];
- NEW_C ((long)cpu.gr[RD] > 0);
- break;
- case 0xB: /* decne */
- --cpu.gr[RD];
- NEW_C ((long)cpu.gr[RD] != 0);
- break;
- case 0xC: /* clrt */
- if (C_ON())
- cpu.gr[RD] = 0;
- break;
- case 0xD: /* clrf */
- if (C_OFF())
- cpu.gr[RD] = 0;
- break;
- case 0xE: /* abs */
- if (cpu.gr[RD] & 0x80000000)
- cpu.gr[RD] = ~cpu.gr[RD] + 1;
- break;
- case 0xF: /* not */
- cpu.gr[RD] = ~cpu.gr[RD];
- break;
- }
- break;
- case 0x02: /* movt */
- if (C_ON())
- cpu.gr[RD] = cpu.gr[RS];
- break;
- case 0x03: /* mult */
- /* consume 2 bits per cycle from rs, until rs is 0 */
- {
- unsigned int t = cpu.gr[RS];
- int ticks;
- for (ticks = 0; t != 0 ; t >>= 2)
- ticks++;
- bonus_cycles += ticks;
- }
- bonus_cycles += 2; /* min. is 3, so add 2, plus ticks above */
- if (tracing)
- fprintf (stderr, " mult %x by %x to give %x",
- cpu.gr[RD], cpu.gr[RS], cpu.gr[RD] * cpu.gr[RS]);
- cpu.gr[RD] = cpu.gr[RD] * cpu.gr[RS];
- break;
- case 0x04: /* loopt */
- if (C_ON())
- {
- pc += (IMM4 << 1) - 32;
- bonus_cycles ++;
- needfetch = 1;
- }
- --cpu.gr[RS]; /* not RD! */
- NEW_C (((long)cpu.gr[RS]) > 0);
- break;
- case 0x05: /* subu */
- cpu.gr[RD] -= cpu.gr[RS];
- break;
- case 0x06: /* addc */
- {
- unsigned long tmp, a, b;
- a = cpu.gr[RD];
- b = cpu.gr[RS];
- cpu.gr[RD] = a + b + C_VALUE ();
- tmp = iu_carry (a, b, C_VALUE ());
- NEW_C (tmp);
- }
- break;
- case 0x07: /* subc */
- {
- unsigned long tmp, a, b;
- a = cpu.gr[RD];
- b = cpu.gr[RS];
- cpu.gr[RD] = a - b + C_VALUE () - 1;
- tmp = iu_carry (a,~b, C_VALUE ());
- NEW_C (tmp);
- }
- break;
- case 0x08: /* illegal */
- case 0x09: /* illegal*/
- cpu.asregs.exception = SIGILL;
- break;
- case 0x0A: /* movf */
- if (C_OFF())
- cpu.gr[RD] = cpu.gr[RS];
- break;
- case 0x0B: /* lsr */
- {
- unsigned long dst, src;
- dst = cpu.gr[RD];
- src = cpu.gr[RS];
- /* We must not rely solely upon the native shift operations, since they
- may not match the M*Core's behaviour on boundary conditions. */
- dst = src > 31 ? 0 : dst >> src;
- cpu.gr[RD] = dst;
- }
- break;
- case 0x0C: /* cmphs */
- NEW_C ((unsigned long )cpu.gr[RD] >=
- (unsigned long)cpu.gr[RS]);
- break;
- case 0x0D: /* cmplt */
- NEW_C ((long)cpu.gr[RD] < (long)cpu.gr[RS]);
- break;
- case 0x0E: /* tst */
- NEW_C ((cpu.gr[RD] & cpu.gr[RS]) != 0);
- break;
- case 0x0F: /* cmpne */
- NEW_C (cpu.gr[RD] != cpu.gr[RS]);
- break;
- case 0x10: case 0x11: /* mfcr */
- {
- unsigned r;
- r = IMM5;
- if (r <= LAST_VALID_CREG)
- cpu.gr[RD] = cpu.cr[r];
- else
- cpu.asregs.exception = SIGILL;
- }
- break;
-
- case 0x12: /* mov */
- cpu.gr[RD] = cpu.gr[RS];
- if (tracing)
- fprintf (stderr, "MOV %x into reg %d", cpu.gr[RD], RD);
- break;
-
- case 0x13: /* bgenr */
- if (cpu.gr[RS] & 0x20)
- cpu.gr[RD] = 0;
- else
- cpu.gr[RD] = 1 << (cpu.gr[RS] & 0x1F);
- break;
-
- case 0x14: /* rsub */
- cpu.gr[RD] = cpu.gr[RS] - cpu.gr[RD];
- break;
-
- case 0x15: /* ixw */
- cpu.gr[RD] += cpu.gr[RS]<<2;
- break;
-
- case 0x16: /* and */
- cpu.gr[RD] &= cpu.gr[RS];
- break;
-
- case 0x17: /* xor */
- cpu.gr[RD] ^= cpu.gr[RS];
- break;
-
- case 0x18: case 0x19: /* mtcr */
- {
- unsigned r;
- r = IMM5;
- if (r <= LAST_VALID_CREG)
- cpu.cr[r] = cpu.gr[RD];
- else
- cpu.asregs.exception = SIGILL;
-
- /* we might have changed register sets... */
- if (SR_AF ())
- cpu.asregs.active_gregs = & cpu.asregs.alt_gregs[0];
- else
- cpu.asregs.active_gregs = & cpu.asregs.gregs[0];
- }
- break;
-
- case 0x1A: /* asr */
- /* We must not rely solely upon the native shift operations, since they
- may not match the M*Core's behaviour on boundary conditions. */
- if (cpu.gr[RS] > 30)
- cpu.gr[RD] = ((long) cpu.gr[RD]) < 0 ? -1 : 0;
- else
- cpu.gr[RD] = (long) cpu.gr[RD] >> cpu.gr[RS];
- break;
-
- case 0x1B: /* lsl */
- /* We must not rely solely upon the native shift operations, since they
- may not match the M*Core's behaviour on boundary conditions. */
- cpu.gr[RD] = cpu.gr[RS] > 31 ? 0 : cpu.gr[RD] << cpu.gr[RS];
- break;
-
- case 0x1C: /* addu */
- cpu.gr[RD] += cpu.gr[RS];
- break;
-
- case 0x1D: /* ixh */
- cpu.gr[RD] += cpu.gr[RS] << 1;
- break;
-
- case 0x1E: /* or */
- cpu.gr[RD] |= cpu.gr[RS];
- break;
-
- case 0x1F: /* andn */
- cpu.gr[RD] &= ~cpu.gr[RS];
- break;
- case 0x20: case 0x21: /* addi */
- cpu.gr[RD] =
- cpu.gr[RD] + (IMM5 + 1);
- break;
- case 0x22: case 0x23: /* cmplti */
- {
- int tmp = (IMM5 + 1);
- if (cpu.gr[RD] < tmp)
- {
- SET_C();
- }
- else
- {
- CLR_C();
- }
- }
- break;
- case 0x24: case 0x25: /* subi */
- cpu.gr[RD] =
- cpu.gr[RD] - (IMM5 + 1);
- break;
- case 0x26: case 0x27: /* illegal */
- cpu.asregs.exception = SIGILL;
- break;
- case 0x28: case 0x29: /* rsubi */
- cpu.gr[RD] =
- IMM5 - cpu.gr[RD];
- break;
- case 0x2A: case 0x2B: /* cmpnei */
- if (cpu.gr[RD] != IMM5)
- {
- SET_C();
- }
- else
- {
- CLR_C();
- }
- break;
-
- case 0x2C: case 0x2D: /* bmaski, divu */
- {
- unsigned imm = IMM5;
-
- if (imm == 1)
- {
- int exe;
- int rxnlz, r1nlz;
- unsigned int rx, r1;
-
- rx = cpu.gr[RD];
- r1 = cpu.gr[1];
- exe = 0;
-
- /* unsigned divide */
- cpu.gr[RD] = (word) ((unsigned int) cpu.gr[RD] / (unsigned int)cpu.gr[1] );
-
- /* compute bonus_cycles for divu */
- for (r1nlz = 0; ((r1 & 0x80000000) == 0) && (r1nlz < 32); r1nlz ++)
- r1 = r1 << 1;
-
- for (rxnlz = 0; ((rx & 0x80000000) == 0) && (rxnlz < 32); rxnlz ++)
- rx = rx << 1;
-
- if (r1nlz < rxnlz)
- exe += 4;
- else
- exe += 5 + r1nlz - rxnlz;
-
- if (exe >= (2 * memcycles - 1))
- {
- bonus_cycles += exe - (2 * memcycles) + 1;
- }
- }
- else if (imm == 0 || imm >= 8)
- {
- /* bmaski */
- if (imm == 0)
- cpu.gr[RD] = -1;
- else
- cpu.gr[RD] = (1 << imm) - 1;
- }
- else
- {
- /* illegal */
- cpu.asregs.exception = SIGILL;
- }
- }
- break;
- case 0x2E: case 0x2F: /* andi */
- cpu.gr[RD] = cpu.gr[RD] & IMM5;
- break;
- case 0x30: case 0x31: /* bclri */
- cpu.gr[RD] = cpu.gr[RD] & ~(1<<IMM5);
- break;
- case 0x32: case 0x33: /* bgeni, divs */
- {
- unsigned imm = IMM5;
- if (imm == 1)
- {
- int exe,sc;
- int rxnlz, r1nlz;
- signed int rx, r1;
-
- /* compute bonus_cycles for divu */
- rx = cpu.gr[RD];
- r1 = cpu.gr[1];
- exe = 0;
-
- if (((rx < 0) && (r1 > 0)) || ((rx >= 0) && (r1 < 0)))
- sc = 1;
- else
- sc = 0;
-
- rx = abs (rx);
- r1 = abs (r1);
-
- /* signed divide, general registers are of type int, so / op is OK */
- cpu.gr[RD] = cpu.gr[RD] / cpu.gr[1];
-
- for (r1nlz = 0; ((r1 & 0x80000000) == 0) && (r1nlz < 32) ; r1nlz ++ )
- r1 = r1 << 1;
-
- for (rxnlz = 0; ((rx & 0x80000000) == 0) && (rxnlz < 32) ; rxnlz ++ )
- rx = rx << 1;
-
- if (r1nlz < rxnlz)
- exe += 5;
- else
- exe += 6 + r1nlz - rxnlz + sc;
-
- if (exe >= (2 * memcycles - 1))
- {
- bonus_cycles += exe - (2 * memcycles) + 1;
- }
- }
- else if (imm >= 7)
- {
- /* bgeni */
- cpu.gr[RD] = (1 << IMM5);
- }
- else
- {
- /* illegal */
- cpu.asregs.exception = SIGILL;
- }
- break;
- }
- case 0x34: case 0x35: /* bseti */
- cpu.gr[RD] = cpu.gr[RD] | (1 << IMM5);
- break;
- case 0x36: case 0x37: /* btsti */
- NEW_C (cpu.gr[RD] >> IMM5);
- break;
- case 0x38: case 0x39: /* xsr, rotli */
- {
- unsigned imm = IMM5;
- unsigned long tmp = cpu.gr[RD];
- if (imm == 0)
- {
- word cbit;
- cbit = C_VALUE();
- NEW_C (tmp);
- cpu.gr[RD] = (cbit << 31) | (tmp >> 1);
- }
- else
- cpu.gr[RD] = (tmp << imm) | (tmp >> (32 - imm));
- }
- break;
- case 0x3A: case 0x3B: /* asrc, asri */
- {
- unsigned imm = IMM5;
- long tmp = cpu.gr[RD];
- if (imm == 0)
- {
- NEW_C (tmp);
- cpu.gr[RD] = tmp >> 1;
- }
- else
- cpu.gr[RD] = tmp >> imm;
- }
- break;
- case 0x3C: case 0x3D: /* lslc, lsli */
- {
- unsigned imm = IMM5;
- unsigned long tmp = cpu.gr[RD];
- if (imm == 0)
- {
- NEW_C (tmp >> 31);
- cpu.gr[RD] = tmp << 1;
- }
- else
- cpu.gr[RD] = tmp << imm;
- }
- break;
- case 0x3E: case 0x3F: /* lsrc, lsri */
- {
- unsigned imm = IMM5;
- unsigned long tmp = cpu.gr[RD];
- if (imm == 0)
- {
- NEW_C (tmp);
- cpu.gr[RD] = tmp >> 1;
- }
- else
- cpu.gr[RD] = tmp >> imm;
- }
- break;
- case 0x40: case 0x41: case 0x42: case 0x43:
- case 0x44: case 0x45: case 0x46: case 0x47:
- case 0x48: case 0x49: case 0x4A: case 0x4B:
- case 0x4C: case 0x4D: case 0x4E: case 0x4F:
- cpu.asregs.exception = SIGILL;
- break;
- case 0x50:
- util (inst & 0xFF);
- break;
- case 0x51: case 0x52: case 0x53:
- case 0x54: case 0x55: case 0x56: case 0x57:
- case 0x58: case 0x59: case 0x5A: case 0x5B:
- case 0x5C: case 0x5D: case 0x5E: case 0x5F:
- cpu.asregs.exception = SIGILL;
- break;
- case 0x60: case 0x61: case 0x62: case 0x63: /* movi */
- case 0x64: case 0x65: case 0x66: case 0x67:
- cpu.gr[RD] = (inst >> 4) & 0x7F;
- break;
- case 0x68: case 0x69: case 0x6A: case 0x6B:
- case 0x6C: case 0x6D: case 0x6E: case 0x6F: /* illegal */
- cpu.asregs.exception = SIGILL;
- break;
- case 0x71: case 0x72: case 0x73:
- case 0x74: case 0x75: case 0x76: case 0x77:
- case 0x78: case 0x79: case 0x7A: case 0x7B:
- case 0x7C: case 0x7D: case 0x7E: /* lrw */
- cpu.gr[RX] = rlat ((pc + ((inst & 0xFF) << 2)) & 0xFFFFFFFC);
- if (tracing)
- fprintf (stderr, "LRW of 0x%x from 0x%x to reg %d",
- rlat ((pc + ((inst & 0xFF) << 2)) & 0xFFFFFFFC),
- (pc + ((inst & 0xFF) << 2)) & 0xFFFFFFFC, RX);
- memops++;
- break;
- case 0x7F: /* jsri */
- cpu.gr[15] = pc;
- if (tracing)
- fprintf (stderr, "func call: r2 = %x r3 = %x r4 = %x r5 = %x r6 = %x r7 = %x\n",
- cpu.gr[2], cpu.gr[3], cpu.gr[4], cpu.gr[5], cpu.gr[6], cpu.gr[7]);
- case 0x70: /* jmpi */
- pc = rlat ((pc + ((inst & 0xFF) << 2)) & 0xFFFFFFFC);
- memops++;
- bonus_cycles++;
- needfetch = 1;
- break;
-
- case 0x80: case 0x81: case 0x82: case 0x83:
- case 0x84: case 0x85: case 0x86: case 0x87:
- case 0x88: case 0x89: case 0x8A: case 0x8B:
- case 0x8C: case 0x8D: case 0x8E: case 0x8F: /* ld */
- cpu.gr[RX] = rlat (cpu.gr[RD] + ((inst >> 2) & 0x003C));
- if (tracing)
- fprintf (stderr, "load reg %d from 0x%x with 0x%x",
- RX,
- cpu.gr[RD] + ((inst >> 2) & 0x003C), cpu.gr[RX]);
- memops++;
- break;
- case 0x90: case 0x91: case 0x92: case 0x93:
- case 0x94: case 0x95: case 0x96: case 0x97:
- case 0x98: case 0x99: case 0x9A: case 0x9B:
- case 0x9C: case 0x9D: case 0x9E: case 0x9F: /* st */
- wlat (cpu.gr[RD] + ((inst >> 2) & 0x003C), cpu.gr[RX]);
- if (tracing)
- fprintf (stderr, "store reg %d (containing 0x%x) to 0x%x",
- RX, cpu.gr[RX],
- cpu.gr[RD] + ((inst >> 2) & 0x003C));
- memops++;
- break;
- case 0xA0: case 0xA1: case 0xA2: case 0xA3:
- case 0xA4: case 0xA5: case 0xA6: case 0xA7:
- case 0xA8: case 0xA9: case 0xAA: case 0xAB:
- case 0xAC: case 0xAD: case 0xAE: case 0xAF: /* ld.b */
- cpu.gr[RX] = rbat (cpu.gr[RD] + RS);
- memops++;
- break;
- case 0xB0: case 0xB1: case 0xB2: case 0xB3:
- case 0xB4: case 0xB5: case 0xB6: case 0xB7:
- case 0xB8: case 0xB9: case 0xBA: case 0xBB:
- case 0xBC: case 0xBD: case 0xBE: case 0xBF: /* st.b */
- wbat (cpu.gr[RD] + RS, cpu.gr[RX]);
- memops++;
- break;
- case 0xC0: case 0xC1: case 0xC2: case 0xC3:
- case 0xC4: case 0xC5: case 0xC6: case 0xC7:
- case 0xC8: case 0xC9: case 0xCA: case 0xCB:
- case 0xCC: case 0xCD: case 0xCE: case 0xCF: /* ld.h */
- cpu.gr[RX] = rhat (cpu.gr[RD] + ((inst >> 3) & 0x001E));
- memops++;
- break;
- case 0xD0: case 0xD1: case 0xD2: case 0xD3:
- case 0xD4: case 0xD5: case 0xD6: case 0xD7:
- case 0xD8: case 0xD9: case 0xDA: case 0xDB:
- case 0xDC: case 0xDD: case 0xDE: case 0xDF: /* st.h */
- what (cpu.gr[RD] + ((inst >> 3) & 0x001E), cpu.gr[RX]);
- memops++;
- break;
- case 0xE8: case 0xE9: case 0xEA: case 0xEB:
- case 0xEC: case 0xED: case 0xEE: case 0xEF: /* bf */
- if (C_OFF())
- {
- int disp;
- disp = inst & 0x03FF;
- if (inst & 0x0400)
- disp |= 0xFFFFFC00;
- pc += disp<<1;
- bonus_cycles++;
- needfetch = 1;
- }
- break;
- case 0xE0: case 0xE1: case 0xE2: case 0xE3:
- case 0xE4: case 0xE5: case 0xE6: case 0xE7: /* bt */
- if (C_ON())
- {
- int disp;
- disp = inst & 0x03FF;
- if (inst & 0x0400)
- disp |= 0xFFFFFC00;
- pc += disp<<1;
- bonus_cycles++;
- needfetch = 1;
- }
- break;
-
- case 0xF8: case 0xF9: case 0xFA: case 0xFB:
- case 0xFC: case 0xFD: case 0xFE: case 0xFF: /* bsr */
- cpu.gr[15] = pc;
- case 0xF0: case 0xF1: case 0xF2: case 0xF3:
- case 0xF4: case 0xF5: case 0xF6: case 0xF7: /* br */
- {
- int disp;
- disp = inst & 0x03FF;
- if (inst & 0x0400)
- disp |= 0xFFFFFC00;
- pc += disp<<1;
- bonus_cycles++;
- needfetch = 1;
- }
- break;
-
- }
-
- if (tracing)
- fprintf (stderr, "\n");
-
- if (needfetch)
- {
- /* Do not let him fetch from a bad address! */
- if (((uword)pc) >= cpu.asregs.msize)
- {
- if (issue_messages)
- fprintf (stderr, "PC loaded at 0x%x is outside of available memory! (0x%x)\n", oldpc, pc);
-
- cpu.asregs.exception = SIGSEGV;
- }
- else
- {
- ibuf = rlat (pc & 0xFFFFFFFC);
- needfetch = 0;
- }
- }
- }
- while (!cpu.asregs.exception);
-
- /* Hide away the things we've cached while executing. */
- cpu.asregs.pc = pc;
- cpu.asregs.insts += insts; /* instructions done ... */
- cpu.asregs.cycles += insts; /* and each takes a cycle */
- cpu.asregs.cycles += bonus_cycles; /* and extra cycles for branches */
- cpu.asregs.cycles += memops * memcycles; /* and memop cycle delays */
-
- signal (SIGINT, sigsave);
-}
-
-
-int
-sim_write (sd, addr, buffer, size)
- SIM_DESC sd;
- SIM_ADDR addr;
- unsigned char * buffer;
- int size;
-{
- int i;
- init_pointers ();
-
- memcpy (& cpu.mem[addr], buffer, size);
-
- return size;
-}
-
-int
-sim_read (sd, addr, buffer, size)
- SIM_DESC sd;
- SIM_ADDR addr;
- unsigned char * buffer;
- int size;
-{
- int i;
- init_pointers ();
-
- memcpy (buffer, & cpu.mem[addr], size);
-
- return size;
-}
-
-
-int
-sim_store_register (sd, rn, memory, length)
- SIM_DESC sd;
- int rn;
- unsigned char * memory;
- int length;
-{
- init_pointers ();
-
- if (rn < NUM_MCORE_REGS && rn >= 0)
- {
- if (length == 4)
- {
- long ival;
-
- /* misalignment safe */
- ival = mcore_extract_unsigned_integer (memory, 4);
- cpu.asints[rn] = ival;
- }
-
- return 4;
- }
- else
- return 0;
-}
-
-int
-sim_fetch_register (sd, rn, memory, length)
- SIM_DESC sd;
- int rn;
- unsigned char * memory;
- int length;
-{
- init_pointers ();
-
- if (rn < NUM_MCORE_REGS && rn >= 0)
- {
- if (length == 4)
- {
- long ival = cpu.asints[rn];
-
- /* misalignment-safe */
- mcore_store_unsigned_integer (memory, 4, ival);
- }
-
- return 4;
- }
- else
- return 0;
-}
-
-
-int
-sim_trace (sd)
- SIM_DESC sd;
-{
- tracing = 1;
-
- sim_resume (sd, 0, 0);
-
- tracing = 0;
-
- return 1;
-}
-
-void
-sim_stop_reason (sd, reason, sigrc)
- SIM_DESC sd;
- enum sim_stop * reason;
- int * sigrc;
-{
- if (cpu.asregs.exception == SIGQUIT)
- {
- * reason = sim_exited;
- * sigrc = cpu.gr[PARM1];
- }
- else
- {
- * reason = sim_stopped;
- * sigrc = cpu.asregs.exception;
- }
-}
-
-
-int
-sim_stop (sd)
- SIM_DESC sd;
-{
- cpu.asregs.exception = SIGINT;
- return 1;
-}
-
-
-void
-sim_info (sd, verbose)
- SIM_DESC sd;
- int verbose;
-{
-#ifdef WATCHFUNCTIONS
- int w, wcyc;
-#endif
- double virttime = cpu.asregs.cycles / 36.0e6;
-
- callback->printf_filtered (callback, "\n\n# instructions executed %10d\n",
- cpu.asregs.insts);
- callback->printf_filtered (callback, "# cycles %10d\n",
- cpu.asregs.cycles);
- callback->printf_filtered (callback, "# pipeline stalls %10d\n",
- cpu.asregs.stalls);
- callback->printf_filtered (callback, "# virtual time taken %10.4f\n",
- virttime);
-
-#ifdef WATCHFUNCTIONS
- callback->printf_filtered (callback, "\nNumber of watched functions: %d\n",
- ENDWL);
-
- wcyc = 0;
-
- for (w = 1; w <= ENDWL; w++)
- {
- callback->printf_filtered (callback, "WL = %s %8x\n",WLstr[w],WL[w]);
- callback->printf_filtered (callback, " calls = %d, cycles = %d\n",
- WLcnts[w],WLcyc[w]);
-
- if (WLcnts[w] != 0)
- callback->printf_filtered (callback,
- " maxcpc = %d, mincpc = %d, avecpc = %d\n",
- WLmax[w],WLmin[w],WLcyc[w]/WLcnts[w]);
- wcyc += WLcyc[w];
- }
-
- callback->printf_filtered (callback,
- "Total cycles for watched functions: %d\n",wcyc);
-#endif
-}
-
-struct aout
-{
- unsigned char sa_machtype[2];
- unsigned char sa_magic[2];
- unsigned char sa_tsize[4];
- unsigned char sa_dsize[4];
- unsigned char sa_bsize[4];
- unsigned char sa_syms[4];
- unsigned char sa_entry[4];
- unsigned char sa_trelo[4];
- unsigned char sa_drelo[4];
-} aout;
-
-#define LONG(x) (((x)[0]<<24)|((x)[1]<<16)|((x)[2]<<8)|(x)[3])
-#define SHORT(x) (((x)[0]<<8)|(x)[1])
-
-SIM_DESC
-sim_open (kind, cb, abfd, argv)
- SIM_OPEN_KIND kind;
- host_callback * cb;
- struct _bfd * abfd;
- char ** argv;
-{
- int osize = sim_memory_size;
- myname = argv[0];
- callback = cb;
-
- if (kind == SIM_OPEN_STANDALONE)
- issue_messages = 1;
-
- /* Discard and reacquire memory -- start with a clean slate. */
- sim_size (1); /* small */
- sim_size (osize); /* and back again */
-
- set_initial_gprs (); /* Reset the GPR registers. */
-
- /* Fudge our descriptor for now. */
- return (SIM_DESC) 1;
-}
-
-void
-sim_close (sd, quitting)
- SIM_DESC sd;
- int quitting;
-{
- /* nothing to do */
-}
-
-SIM_RC
-sim_load (sd, prog, abfd, from_tty)
- SIM_DESC sd;
- char * prog;
- bfd * abfd;
- int from_tty;
-{
- /* Do the right thing for ELF executables; this turns out to be
- just about the right thing for any object format that:
- - we crack using BFD routines
- - follows the traditional UNIX text/data/bss layout
- - calls the bss section ".bss". */
-
- extern bfd * sim_load_file (); /* ??? Don't know where this should live. */
- bfd * prog_bfd;
-
- {
- bfd * handle;
- asection * s_bss;
- handle = bfd_openr (prog, 0); /* could be "mcore" */
-
- if (!handle)
- {
- printf("``%s'' could not be opened.\n", prog);
- return SIM_RC_FAIL;
- }
-
- /* Makes sure that we have an object file, also cleans gets the
- section headers in place. */
- if (!bfd_check_format (handle, bfd_object))
- {
- /* wasn't an object file */
- bfd_close (handle);
- printf ("``%s'' is not appropriate object file.\n", prog);
- return SIM_RC_FAIL;
- }
-
- /* Look for that bss section. */
- s_bss = bfd_get_section_by_name (handle, ".bss");
-
- if (!s_bss)
- {
- printf("``%s'' has no bss section.\n", prog);
- return SIM_RC_FAIL;
- }
-
- /* Appropriately paranoid would check that we have
- a traditional text/data/bss ordering within memory. */
-
- /* figure the end of the bss section */
-#if 0
- printf ("bss section at 0x%08x for 0x%08x bytes\n",
- (unsigned long) s_bss->vma , (unsigned long) s_bss->_cooked_size);
-#endif
- heap_ptr = (unsigned long) s_bss->vma + (unsigned long) s_bss->_cooked_size;
-
- /* Clean up after ourselves. */
- bfd_close (handle);
-
- /* XXX: do we need to free the s_bss and handle structures? */
- }
-
- /* from sh -- dac */
- prog_bfd = sim_load_file (sd, myname, callback, prog, abfd,
- sim_kind == SIM_OPEN_DEBUG,
- 0, sim_write);
- if (prog_bfd == NULL)
- return SIM_RC_FAIL;
-
- target_big_endian = bfd_big_endian (prog_bfd);
-
- if (abfd == NULL)
- bfd_close (prog_bfd);
-
- return SIM_RC_OK;
-}
-
-SIM_RC
-sim_create_inferior (sd, prog_bfd, argv, env)
- SIM_DESC sd;
- struct _bfd * prog_bfd;
- char ** argv;
- char ** env;
-{
- char ** avp;
- int nargs = 0;
- int nenv = 0;
- int s_length;
- int l;
- unsigned long strings;
- unsigned long pointers;
- unsigned long hi_stack;
-
-
- /* Set the initial register set. */
- l = issue_messages;
- issue_messages = 0;
- set_initial_gprs ();
- issue_messages = l;
-
- hi_stack = cpu.asregs.msize - 4;
- cpu.asregs.pc = bfd_get_start_address (prog_bfd);
-
- /* Calculate the argument and environment strings. */
- s_length = 0;
- nargs = 0;
- avp = argv;
- while (avp && *avp)
- {
- l = strlen (*avp) + 1; /* include the null */
- s_length += (l + 3) & ~3; /* make it a 4 byte boundary */
- nargs++; avp++;
- }
-
- nenv = 0;
- avp = env;
- while (avp && *avp)
- {
- l = strlen (*avp) + 1; /* include the null */
- s_length += (l + 3) & ~ 3;/* make it a 4 byte boundary */
- nenv++; avp++;
- }
-
- /* Claim some memory for the pointers and strings. */
- pointers = hi_stack - sizeof(word) * (nenv+1+nargs+1);
- pointers &= ~3; /* must be 4-byte aligned */
- cpu.gr[0] = pointers;
-
- strings = cpu.gr[0] - s_length;
- strings &= ~3; /* want to make it 4-byte aligned */
- cpu.gr[0] = strings;
- /* dac fix, the stack address must be 8-byte aligned! */
- cpu.gr[0] = cpu.gr[0] - cpu.gr[0] % 8;
-
- /* Loop through the arguments and fill them in. */
- cpu.gr[PARM1] = nargs;
- if (nargs == 0)
- {
- /* No strings to fill in. */
- cpu.gr[PARM2] = 0;
- }
- else
- {
- cpu.gr[PARM2] = pointers;
- avp = argv;
- while (avp && *avp)
- {
- /* Save where we're putting it. */
- wlat (pointers, strings);
-
- /* Copy the string. */
- l = strlen (* avp) + 1;
- strcpy ((char *)(cpu.mem + strings), *avp);
-
- /* Bump the pointers. */
- avp++;
- pointers += 4;
- strings += l+1;
- }
-
- /* A null to finish the list. */
- wlat (pointers, 0);
- pointers += 4;
- }
-
- /* Now do the environment pointers. */
- if (nenv == 0)
- {
- /* No strings to fill in. */
- cpu.gr[PARM3] = 0;
- }
- else
- {
- cpu.gr[PARM3] = pointers;
- avp = env;
-
- while (avp && *avp)
- {
- /* Save where we're putting it. */
- wlat (pointers, strings);
-
- /* Copy the string. */
- l = strlen (* avp) + 1;
- strcpy ((char *)(cpu.mem + strings), *avp);
-
- /* Bump the pointers. */
- avp++;
- pointers += 4;
- strings += l+1;
- }
-
- /* A null to finish the list. */
- wlat (pointers, 0);
- pointers += 4;
- }
-
- return SIM_RC_OK;
-}
-
-void
-sim_kill (sd)
- SIM_DESC sd;
-{
- /* nothing to do */
-}
-
-void
-sim_do_command (sd, cmd)
- SIM_DESC sd;
- char * cmd;
-{
- /* Nothing there yet; it's all an error. */
-
- if (cmd != NULL)
- {
- char ** simargv = buildargv (cmd);
-
- if (strcmp (simargv[0], "watch") == 0)
- {
- if ((simargv[1] == NULL) || (simargv[2] == NULL))
- {
- fprintf (stderr, "Error: missing argument to watch cmd.\n");
- return;
- }
-
- ENDWL++;
-
- WL[ENDWL] = strtol (simargv[2], NULL, 0);
- WLstr[ENDWL] = strdup (simargv[1]);
- fprintf (stderr, "Added %s (%x) to watchlist, #%d\n",WLstr[ENDWL],
- WL[ENDWL], ENDWL);
-
- }
- else if (strcmp (simargv[0], "dumpmem") == 0)
- {
- unsigned char * p;
- FILE * dumpfile;
-
- if (simargv[1] == NULL)
- fprintf (stderr, "Error: missing argument to dumpmem cmd.\n");
-
- fprintf (stderr, "Writing dumpfile %s...",simargv[1]);
-
- dumpfile = fopen (simargv[1], "w");
- p = cpu.mem;
- fwrite (p, cpu.asregs.msize-1, 1, dumpfile);
- fclose (dumpfile);
-
- fprintf (stderr, "done.\n");
- }
- else if (strcmp (simargv[0], "clearstats") == 0)
- {
- cpu.asregs.cycles = 0;
- cpu.asregs.insts = 0;
- cpu.asregs.stalls = 0;
- ENDWL = 0;
- }
- else if (strcmp (simargv[0], "verbose") == 0)
- {
- issue_messages = 2;
- }
- else
- {
- fprintf (stderr,"Error: \"%s\" is not a valid M.CORE simulator command.\n",
- cmd);
- }
- }
- else
- {
- fprintf (stderr, "M.CORE sim commands: \n");
- fprintf (stderr, " watch <funcname> <addr>\n");
- fprintf (stderr, " dumpmem <filename>\n");
- fprintf (stderr, " clearstats\n");
- fprintf (stderr, " verbose\n");
- }
-}
-
-void
-sim_set_callbacks (ptr)
- host_callback * ptr;
-{
- callback = ptr;
-}
diff --git a/sim/mcore/sysdep.h b/sim/mcore/sysdep.h
deleted file mode 100644
index 336740adc7f..00000000000
--- a/sim/mcore/sysdep.h
+++ /dev/null
@@ -1,95 +0,0 @@
-/* System includes and definitions used by the Motorola MCore simulator.
- Copyright (C) 1999 Free Software Foundation, Inc.
- Contributed by Cygnus Solutions.
-
-This file is part of GDB, the GNU debugger.
-
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License along
-with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
-
-#ifndef __SYSDEP_H
-#define __SYSDEP_H
-
-#ifndef hosts_std_host_H
-#include <fcntl.h>
-#include <errno.h>
-#include <stdio.h>
-#include <sys/types.h>
-#include <sys/stat.h>
-#include <ctype.h>
-#include <string.h>
-#include <sys/file.h>
-#include "ansidecl.h"
-
-#ifndef O_ACCMODE
-#define O_ACCMODE (O_RDONLY | O_WRONLY | O_RDWR)
-#endif
-#ifndef SEEK_SET
-#define SEEK_SET 0
-#endif
-#ifndef SEEK_CUR
-#define SEEK_CUR 1
-#endif
-#ifdef STDC_HEADERS
-#include <stdlib.h>
-/*#include <string.h>*/
-#else
-extern char * mktemp ();
-#ifndef memset
-extern PTR memset ();
-#endif
-
-#ifndef DONTDECLARE_MALLOC
-extern PTR malloc ();
-extern PTR realloc ();
-#endif
-
-#ifndef __GNUC__
-extern PTR memcpy ();
-#else
-/* char * memcpy (); */
-#endif
-
-#ifdef __STDC__
-extern void free ();
-#else
-extern int free();
-#endif
-
-#ifndef strchr
-extern char * strchr();
-#endif
-extern char * getenv();
-extern PTR memchr();
-extern char * strrchr();
-
-extern char * strrchr();
-extern char * ctime();
-extern long atol();
-extern char * getenv();
-#endif /* STDC_HEADERS */
-
-#ifndef BYTES_IN_PRINTF_INT
-#define BYTES_IN_PRINTF_INT 4
-#endif
-
-#include "fopen-same.h"
-#define hosts_std_host_H
-#endif
-
-#ifdef STDC_HEADERS
-#include <stddef.h>
-#endif /* STDC_HEADERS */
-
-#endif /* __SYSDEP_H */
diff --git a/sim/mips/ChangeLog b/sim/mips/ChangeLog
deleted file mode 100644
index f03884a4f7b..00000000000
--- a/sim/mips/ChangeLog
+++ /dev/null
@@ -1,2232 +0,0 @@
-2001-04-12 Jim Blandy <jimb@redhat.com>
-
- * mips.igen (CFC1, CTC1): Pass the correct register numbers to
- PENDING_FILL. Use PENDING_SCHED directly to handle the pending
- set of the FCSR.
- * sim-main.h (COCIDX): Remove definition; this isn't supported by
- PENDING_FILL, and you can get the intended effect gracefully by
- calling PENDING_SCHED directly.
-
-2001-02-23 Ben Elliston <bje@redhat.com>
-
- * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Only define if not
- already defined elsewhere.
-
-2001-02-19 Ben Elliston <bje@redhat.com>
-
- * sim-main.h (sim_monitor): Return an int.
- * interp.c (sim_monitor): Add return values.
- (signal_exception): Handle error conditions from sim_monitor.
-
-2001-02-08 Ben Elliston <bje@redhat.com>
-
- * sim-main.c (load_memory): Pass cia to sim_core_read* functions.
- (store_memory): Likewise, pass cia to sim_core_write*.
-
-2000-10-19 Frank Ch. Eigler <fche@redhat.com>
-
- On advice from Chris G. Demetriou <cgd@sibyte.com>:
- * sim-main.h (GPR_CLEAR): Remove unused alternative macro.
-
-Thu Jul 27 22:02:05 2000 Andrew Cagney <cagney@b1.cygnus.com>
-
- From Maciej W. Rozycki <macro@ds2.pg.gda.pl>:
- * Makefile.in: Don't delete *.igen when cleaning directory.
-
-Wed Jul 19 18:50:51 2000 Andrew Cagney <cagney@b1.cygnus.com>
-
- * m16.igen (break): Call SignalException not sim_engine_halt.
-
-Mon Jul 3 11:13:20 2000 Andrew Cagney <cagney@b1.cygnus.com>
-
- From Jason Eckhardt:
- * mips.igen (MOVZ.fmt, MOVN.fmt): Move conditional on GPR[RT].
-
-Tue Jun 13 20:52:07 2000 Andrew Cagney <cagney@b1.cygnus.com>
-
- * mips.igen (MxC1, DMxC1): Fix printf formatting.
-
-2000-05-24 Michael Hayes <mhayes@cygnus.com>
-
- * mips.igen (do_dmultx): Fix typo.
-
-Tue May 23 21:39:23 2000 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Fri Apr 28 20:48:36 2000 Andrew Cagney <cagney@b1.cygnus.com>
-
- * mips.igen (DMxC1): Fix format arguments for sim_io_eprintf call.
-
-2000-04-12 Frank Ch. Eigler <fche@redhat.com>
-
- * sim-main.h (GPR_CLEAR): Define macro.
-
-Mon Apr 10 00:07:09 2000 Andrew Cagney <cagney@b1.cygnus.com>
-
- * interp.c (decode_coproc): Output long using %lx and not %s.
-
-2000-03-21 Frank Ch. Eigler <fche@redhat.com>
-
- * interp.c (sim_open): Sort & extend dummy memory regions for
- --board=jmr3904 for eCos.
-
-2000-03-02 Frank Ch. Eigler <fche@redhat.com>
-
- * configure: Regenerated.
-
-Tue Feb 8 18:35:01 2000 Donald Lindsay <dlindsay@hound.cygnus.com>
-
- * interp.c, mips.igen: all 5 DEADC0DE situations now have sim_io_eprintf
- calls, conditional on the simulator being in verbose mode.
-
-Fri Feb 4 09:45:15 2000 Donald Lindsay <dlindsay@cygnus.com>
-
- * sim-main.c (cache_op): Added case arm so that CACHE ops to a secondary
- cache don't get ReservedInstruction traps.
-
-1999-11-29 Mark Salter <msalter@cygnus.com>
-
- * dv-tx3904sio.c (tx3904sio_io_write_buffer): Use write value as a mask
- to clear status bits in sdisr register. This is how the hardware works.
-
- * interp.c (sim_open): Added more memory aliases for jmr3904 hardware
- being used by cygmon.
-
-1999-11-11 Andrew Haley <aph@cygnus.com>
-
- * interp.c (decode_coproc): Correctly handle DMFC0 and DMTC0
- instructions.
-
-Thu Sep 9 15:12:08 1999 Geoffrey Keating <geoffk@cygnus.com>
-
- * mips.igen (MULT): Correct previous mis-applied patch.
-
-Tue Sep 7 13:34:54 1999 Geoffrey Keating <geoffk@cygnus.com>
-
- * mips.igen (delayslot32): Handle sequence like
- mtc1 $at,$f12 ; jal fp_add ; mov.s $f13,$f12
- correctly by calling ENGINE_ISSUE_PREFIX_HOOK() before issue.
- (MULT): Actually pass the third register...
-
-1999-09-03 Mark Salter <msalter@cygnus.com>
-
- * interp.c (sim_open): Added more memory aliases for additional
- hardware being touched by cygmon on jmr3904 board.
-
-Thu Sep 2 18:15:53 1999 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Tue Jul 27 16:36:51 1999 Andrew Cagney <cagney@amy.cygnus.com>
-
- * interp.c (sim_store_register): Handle case where client - GDB -
- specifies that a 4 byte register is 8 bytes in size.
- (sim_fetch_register): Ditto.
-
-1999-07-14 Frank Ch. Eigler <fche@cygnus.com>
-
- Implement "sim firmware" option, inspired by jimb's version of 1998-01.
- * interp.c (firmware_option_p): New global flag: "sim firmware" given.
- (idt_monitor_base): Base address for IDT monitor traps.
- (pmon_monitor_base): Ditto for PMON.
- (lsipmon_monitor_base): Ditto for LSI PMON.
- (MONITOR_BASE, MONITOR_SIZE): Removed macros.
- (mips_option): Add "firmware" option with new OPTION_FIRMWARE key.
- (sim_firmware_command): New function.
- (mips_option_handler): Call it for OPTION_FIRMWARE.
- (sim_open): Allocate memory for idt_monitor region. If "--board"
- option was given, add no monitor by default. Add BREAK hooks only if
- monitors are also there.
-
-Mon Jul 12 00:02:27 1999 Andrew Cagney <cagney@amy.cygnus.com>
-
- * interp.c (sim_monitor): Flush output before reading input.
-
-Sun Jul 11 19:28:11 1999 Andrew Cagney <cagney@b1.cygnus.com>
-
- * tconfig.in (SIM_HANDLES_LMA): Always define.
-
-Thu Jul 8 16:06:59 1999 Andrew Cagney <cagney@b1.cygnus.com>
-
- From Mark Salter <msalter@cygnus.com>:
- * interp.c (BOARD_BSP): Define. Add to list of possible boards.
- (sim_open): Add setup for BSP board.
-
-Wed Jul 7 12:45:58 1999 Andrew Cagney <cagney@b1.cygnus.com>
-
- * mips.igen (MULT, MULTU): Add syntax for two operand version.
- (DMFC0, DMTC0): Recognize. Call DecodeCoproc which will report
- them as unimplemented.
-
-1999-05-08 Felix Lee <flee@cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-1999-04-21 Frank Ch. Eigler <fche@cygnus.com>
-
- * mips.igen (bc0f): For the TX39 only, decode this as a no-op stub.
-
-Thu Apr 15 14:15:17 1999 Andrew Cagney <cagney@amy.cygnus.com>
-
- * configure.in: Any mips64vr5*-*-* target should have
- -DTARGET_ENABLE_FR=1.
- (default_endian): Any mips64vr*el-*-* target should default to
- LITTLE_ENDIAN.
- * configure: Re-generate.
-
-1999-02-19 Gavin Romig-Koch <gavin@cygnus.com>
-
- * mips.igen (ldl): Extend from _16_, not 32.
-
-Wed Jan 27 18:51:38 1999 Andrew Cagney <cagney@chook.cygnus.com>
-
- * interp.c (sim_store_register): Force registers written to by GDB
- into an un-interpreted state.
-
-1999-02-05 Frank Ch. Eigler <fche@cygnus.com>
-
- * dv-tx3904sio.c (tx3904sio_tickle): After a polled I/O from the
- CPU, start periodic background I/O polls.
- (tx3904sio_poll): New function: periodic I/O poller.
-
-1998-12-30 Frank Ch. Eigler <fche@cygnus.com>
-
- * mips.igen (BREAK): Call signal_exception instead of sim_engine_halt.
-
-Tue Dec 29 16:03:53 1998 Rainer Orth <ro@TechFak.Uni-Bielefeld.DE>
-
- * configure.in, configure (mips64vr5*-*-*): Added missing ;; in
- case statement.
-
-1998-12-29 Frank Ch. Eigler <fche@cygnus.com>
-
- * interp.c (sim_open): Allocate jm3904 memory in smaller chunks.
- (load_word): Call SIM_CORE_SIGNAL hook on error.
- (signal_exception): Call SIM_CPU_EXCEPTION_TRIGGER hook before
- starting. For exception dispatching, pass PC instead of NULL_CIA.
- (decode_coproc): Use COP0_BADVADDR to store faulting address.
- * sim-main.h (COP0_BADVADDR): Define.
- (SIM_CORE_SIGNAL): Define hook to call mips_core_signal.
- (SIM_CPU_EXCEPTION*): Define hooks to call mips_cpu_exception*().
- (_sim_cpu): Add exc_* fields to store register value snapshots.
- * mips.igen (*): Replace memory-related SignalException* calls
- with references to SIM_CORE_SIGNAL hook.
-
- * dv-tx3904irc.c (tx3904irc_port_event): printf format warning
- fix.
- * sim-main.c (*): Minor warning cleanups.
-
-1998-12-24 Gavin Romig-Koch <gavin@cygnus.com>
-
- * m16.igen (DADDIU5): Correct type-o.
-
-Mon Dec 21 10:34:48 1998 Andrew Cagney <cagney@chook>
-
- * mips.igen (do_ddiv, do_ddivu): Pacify GCC. Update hi/lo via tmp
- variables.
-
-Wed Dec 16 18:20:28 1998 Andrew Cagney <cagney@chook>
-
- * Makefile.in (SIM_EXTRA_CFLAGS): No longer need to add .../newlib
- to include path.
- (interp.o): Add dependency on itable.h
- (oengine.c, gencode): Delete remaining references.
- (BUILT_SRC_FROM_GEN): Clean up.
-
-1998-12-16 Gavin Romig-Koch <gavin@cygnus.com>
-
- * vr4run.c: New.
- * Makefile.in (SIM_HACK_OBJ,HACK_OBJS,HACK_GEN_SRCS,libhack.a,
- tmp-hack,tmp-m32-hack,tmp-m16-hack,tmp-itable-hack,
- tmp-run-hack) : New.
- * m16.igen (LD,DADDIU,DADDUI5,DADJSP,DADDIUSP,DADDI,DADDU,DSUBU,
- DSLL,DSRL,DSRA,DSLLV,DSRAV,DMULT,DMULTU,DDIV,DDIVU,JALX32,JALX):
- Drop the "64" qualifier to get the HACK generator working.
- Use IMMEDIATE rather than IMMED. Use SHAMT rather than SHIFT.
- * mips.igen (do_daddiu,do_ddiv,do_divu): Remove the 64-only
- qualifier to get the hack generator working.
- (do_dsll,do_dsllv,do_dsra,do_dsrl,do_dsrlv): New.
- (DSLL): Use do_dsll.
- (DSLLV): Use do_dsllv.
- (DSRA): Use do_dsra.
- (DSRL): Use do_dsrl.
- (DSRLV): Use do_dsrlv.
- (BC1): Move *vr4100 to get the HACK generator working.
- (CxC1, DMxC1, MxC1,MACCU,MACCHI,MACCHIU): Rename to
- get the HACK generator working.
- (MACC) Rename to get the HACK generator working.
- (DMACC,MACCS,DMACCS): Add the 64.
-
-1998-12-12 Gavin Romig-Koch <gavin@cygnus.com>
-
- * mips.igen (BC1): Renamed to BC1a and BC1b to avoid conflicts.
- * sim-main.h (SizeFGR): Handle TARGET_ENABLE_FR.
-
-1998-12-11 Gavin Romig-Koch <gavin@cygnus.com>
-
- * mips/interp.c (DEBUG): Cleanups.
-
-1998-12-10 Frank Ch. Eigler <fche@cygnus.com>
-
- * dv-tx3904sio.c (tx3904sio_io_read_buffer): Endianness fixes.
- (tx3904sio_tickle): fflush after a stdout character output.
-
-1998-12-03 Frank Ch. Eigler <fche@cygnus.com>
-
- * interp.c (sim_close): Uninstall modules.
-
-Wed Nov 25 13:41:03 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-main.h, interp.c (sim_monitor): Change to global
- function.
-
-Wed Nov 25 17:33:24 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure.in (vr4100): Only include vr4100 instructions in
- simulator.
- * configure: Re-generate.
- * m16.igen (*): Tag all mips16 instructions as also being vr4100.
-
-Mon Nov 23 18:20:36 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * Makefile.in (SIM_CFLAGS): Do not define WITH_IGEN.
- * sim-main.h, sim-main.c, interp.c: Delete #if WITH_IGEN keeping
- true alternative.
-
- * configure.in (sim_default_gen, sim_use_gen): Replace with
- sim_gen.
- (--enable-sim-igen): Delete config option. Always using IGEN.
- * configure: Re-generate.
-
- * Makefile.in (gencode): Kill, kill, kill.
- * gencode.c: Ditto.
-
-Mon Nov 23 18:07:36 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure.in: Configure mips64vr4100-elf nee mips64vr41* as a 64
- bit mips16 igen simulator.
- * configure: Re-generate.
-
- * mips.igen (check_div_hilo, check_mult_hilo, check_mf_hilo): Mark
- as part of vr4100 ISA.
- * vr.igen: Mark all instructions as 64 bit only.
-
-Mon Nov 23 17:07:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * interp.c (get_cell, sim_monitor, fetch_str, CoProcPresent):
- Pacify GCC.
-
-Mon Nov 23 13:23:40 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure.in: Configure mips-lsi-elf nee mips*lsi* as a
- mipsIII/mips16 igen simulator. Fix sim_gen VS sim_igen typos.
- * configure: Re-generate.
-
- * m16.igen (BREAK): Define breakpoint instruction.
- (JALX32): Mark instruction as mips16 and not r3900.
- * mips.igen (C.cond.fmt): Fix typo in instruction format.
-
- * sim-main.h (PENDING_FILL): Wrap C statements in do/while.
-
-Sat Nov 7 09:54:38 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * gencode.c (build_instruction - BREAK): For MIPS16, handle BREAK
- insn as a debug breakpoint.
-
- * sim-main.h (PENDING_SLOT_BIT): Fix, was incorrectly defined as
- pending.slot_size.
- (PENDING_SCHED): Clean up trace statement.
- (PENDING_SCHED): Increment PENDING_IN and PENDING_TOTAL.
- (PENDING_FILL): Delay write by only one cycle.
- (PENDING_FILL): For FSRs, write fmt_uninterpreted to FPR_STATE.
-
- * sim-main.c (pending_tick): Clean up trace statements. Add trace
- of pending writes.
- (pending_tick): Fix sizes in switch statements, 4 & 8 instead of
- 32 & 64.
- (pending_tick): Move incrementing of index to FOR statement.
- (pending_tick): Only update PENDING_OUT after a write has occured.
-
- * configure.in: Add explicit mips-lsi-* target. Use gencode to
- build simulator.
- * configure: Re-generate.
-
- * interp.c (sim_engine_run OLD): Delete explicit call to
- PENDING_TICK. Now called via ENGINE_ISSUE_PREFIX_HOOK.
-
-Sat Oct 30 09:49:10 1998 Frank Ch. Eigler <fche@cygnus.com>
-
- * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Add dummy
- interrupt level number to match changed SignalExceptionInterrupt
- macro.
-
-Fri Oct 9 18:02:25 1998 Doug Evans <devans@canuck.cygnus.com>
-
- * interp.c: #include "itable.h" if WITH_IGEN.
- (get_insn_name): New function.
- (sim_open): Initialize CPU_INSN_NAME,CPU_MAX_INSNS.
- * sim-main.h (MAX_INSNS,INSN_NAME): Delete.
-
-Mon Sep 14 12:36:44 1998 Frank Ch. Eigler <fche@cygnus.com>
-
- * configure: Rebuilt to inhale new common/aclocal.m4.
-
-Tue Sep 1 15:39:18 1998 Frank Ch. Eigler <fche@cygnus.com>
-
- * dv-tx3904sio.c: Include sim-assert.h.
-
-Tue Aug 25 12:49:46 1998 Frank Ch. Eigler <fche@cygnus.com>
-
- * dv-tx3904sio.c: New file: tx3904 serial I/O module.
- * configure.in: Add dv-tx3904sio, dv-sockser for tx39 target.
- Reorganize target-specific sim-hardware checks.
- * configure: rebuilt.
- * interp.c (sim_open): For tx39 target boards, set
- OPERATING_ENVIRONMENT, add tx3904sio devices.
- * tconfig.in: For tx39 target, set SIM_HANDLES_LMA for loading
- ROM executables. Install dv-sockser into sim-modules list.
-
- * dv-tx3904irc.c: Compiler warning clean-up.
- * dv-tx3904tmr.c: Compiler warning clean-up. Remove particularly
- frequent hw-trace messages.
-
-Fri Jul 31 18:14:16 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * vr.igen (MulAcc): Identify as a vr4100 specific function.
-
-Sat Jul 25 16:03:14 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * Makefile.in (IGEN_INCLUDE): Add vr.igen.
-
- * vr.igen: New file.
- (MAC/MADD16, DMAC/DMADD16): Implement using code from gencode.c.
- * mips.igen: Define vr4100 model. Include vr.igen.
-Mon Jun 29 09:21:07 1998 Gavin Koch <gavin@cygnus.com>
-
- * mips.igen (check_mf_hilo): Correct check.
-
-Wed Jun 17 12:20:49 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-main.h (interrupt_event): Add prototype.
-
- * dv-tx3904tmr.c (tx3904tmr_io_write_buffer): Delete unused
- register_ptr, register_value.
- (deliver_tx3904tmr_tick): Fix types passed to printf fmt.
-
- * sim-main.h (tracefh): Make extern.
-
-Tue Jun 16 14:39:00 1998 Frank Ch. Eigler <fche@cygnus.com>
-
- * dv-tx3904tmr.c: Deschedule timer event after dispatching.
- Reduce unnecessarily high timer event frequency.
- * dv-tx3904cpu.c: Ditto for interrupt event.
-
-Wed Jun 10 13:22:32 1998 Frank Ch. Eigler <fche@cygnus.com>
-
- * interp.c (decode_coproc): For TX39, add stub COP0 register #7,
- to allay warnings.
- (interrupt_event): Made non-static.
-
- * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Correct accidental
- interchange of configuration values for external vs. internal
- clock dividers.
-
-Tue Jun 9 12:46:24 1998 Ian Carmichael <iancarm@cygnus.com>
-
- * mips.igen (BREAK): Moved code to here for
- simulator-reserved break instructions.
- * gencode.c (build_instruction): Ditto.
- * interp.c (signal_exception): Code moved from here. Non-
- reserved instructions now use exception vector, rather
- than halting sim.
- * sim-main.h: Moved magic constants to here.
-
-Tue Jun 9 12:29:50 1998 Frank Ch. Eigler <fche@cygnus.com>
-
- * dv-tx3904cpu.c (deliver_*_interrupt,*_port_event): Set the CAUSE
- register upon non-zero interrupt event level, clear upon zero
- event value.
- * dv-tx3904irc.c (*_port_event): Handle deactivated interrupt signal
- by passing zero event value.
- (*_io_{read,write}_buffer): Endianness fixes.
- * dv-tx3904tmr.c (*_io_{read,write}_buffer): Endianness fixes.
- (deliver_*_tick): Reduce sim event interval to 75% of count interval.
-
- * interp.c (sim_open): Added jmr3904pal board type that adds PAL-based
- serial I/O and timer module at base address 0xFFFF0000.
-
-Tue Jun 9 11:52:29 1998 Gavin Koch <gavin@cygnus.com>
-
- * mips.igen (SWC1) : Correct the handling of ReverseEndian
- and BigEndianCPU.
-
-Tue Jun 9 11:40:57 1998 Gavin Koch <gavin@cygnus.com>
-
- * configure.in (mips_fpu_bitsize) : Set this correctly for 32-bit mips
- parts.
- * configure: Update.
-
-Thu Jun 4 15:37:33 1998 Frank Ch. Eigler <fche@cygnus.com>
-
- * dv-tx3904tmr.c: New file - implements tx3904 timer.
- * dv-tx3904{irc,cpu}.c: Mild reformatting.
- * configure.in: Include tx3904tmr in hw_device list.
- * configure: Rebuilt.
- * interp.c (sim_open): Instantiate three timer instances.
- Fix address typo of tx3904irc instance.
-
-Tue Jun 2 15:48:02 1998 Ian Carmichael <iancarm@cygnus.com>
-
- * interp.c (signal_exception): SystemCall exception now uses
- the exception vector.
-
-Mon Jun 1 18:18:26 1998 Frank Ch. Eigler <fche@cygnus.com>
-
- * interp.c (decode_coproc): For TX39, add stub COP0 register #3,
- to allay warnings.
-
-Fri May 29 11:40:39 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure.in (sim_igen_filter): Match mips*tx39 not mipst*tx39.
-
-Mon May 25 20:47:45 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * dv-tx3904cpu.c, dv-tx3904irc.c: Rename *_callback to *_method.
-
- * dv-tx3904cpu.c, dv-tx3904irc.c: Include hw-main.h and
- sim-main.h. Declare a struct hw_descriptor instead of struct
- hw_device_descriptor.
-
-Mon May 25 12:41:38 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * mips.igen (do_store_left, do_load_left): Compute nr of left and
- right bits and then re-align left hand bytes to correct byte
- lanes. Fix incorrect computation in do_store_left when loading
- bytes from second word.
-
-Fri May 22 13:34:20 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure.in (SIM_AC_OPTION_HARDWARE): Only enable when tx3904.
- * interp.c (sim_open): Only create a device tree when HW is
- enabled.
-
- * dv-tx3904irc.c (tx3904irc_finish): Pacify GCC.
- * interp.c (signal_exception): Ditto.
-
-Thu May 21 14:24:11 1998 Gavin Koch <gavin@cygnus.com>
-
- * gencode.c: Mark BEGEZALL as LIKELY.
-
-Thu May 21 18:57:19 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-main.h (ALU32_END): Sign extend 32 bit results.
- * mips.igen (ADD, SUB, ADDI, DADD, DSUB): Trace.
-
-Mon May 18 18:22:42 1998 Frank Ch. Eigler <fche@cygnus.com>
-
- * configure.in (SIM_AC_OPTION_HARDWARE): Added common hardware
- modules. Recognize TX39 target with "mips*tx39" pattern.
- * configure: Rebuilt.
- * sim-main.h (*): Added many macros defining bits in
- TX39 control registers.
- (SignalInterrupt): Send actual PC instead of NULL.
- (SignalNMIReset): New exception type.
- * interp.c (board): New variable for future use to identify
- a particular board being simulated.
- (mips_option_handler,mips_options): Added "--board" option.
- (interrupt_event): Send actual PC.
- (sim_open): Make memory layout conditional on board setting.
- (signal_exception): Initial implementation of hardware interrupt
- handling. Accept another break instruction variant for simulator
- exit.
- (decode_coproc): Implement RFE instruction for TX39.
- (mips.igen): Decode RFE instruction as such.
- * configure.in (tx3904cpu,tx3904irc): Added devices for tx3904.
- * interp.c: Define "jmr3904" and "jmr3904debug" board types and
- bbegin to implement memory map.
- * dv-tx3904cpu.c: New file.
- * dv-tx3904irc.c: New file.
-
-Wed May 13 14:40:11 1998 Gavin Koch <gavin@cygnus.com>
-
- * mips.igen (check_mt_hilo): Create a separate r3900 version.
-
-Wed May 13 14:11:46 1998 Gavin Koch <gavin@cygnus.com>
-
- * tx.igen (madd,maddu): Replace calls to check_op_hilo
- with calls to check_div_hilo.
-
-Wed May 13 09:59:27 1998 Gavin Koch <gavin@cygnus.com>
-
- * mips/mips.igen (check_op_hilo,check_mult_hilo,check_div_hilo):
- Replace check_op_hilo with check_mult_hilo and check_div_hilo.
- Add special r3900 version of do_mult_hilo.
- (do_dmultx,do_mult,do_multu): Replace calls to check_op_hilo
- with calls to check_mult_hilo.
- (do_ddiv,do_ddivu,do_div,do_divu): Replace calls to check_op_hilo
- with calls to check_div_hilo.
-
-Tue May 12 15:22:11 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure.in (SUBTARGET_R3900): Define for mipstx39 target.
- Document a replacement.
-
-Fri May 8 17:48:19 1998 Ian Carmichael <iancarm@cygnus.com>
-
- * interp.c (sim_monitor): Make mon_printf work.
-
-Wed May 6 19:42:19 1998 Doug Evans <devans@canuck.cygnus.com>
-
- * sim-main.h (INSN_NAME): New arg `cpu'.
-
-Tue Apr 28 18:33:31 1998 Geoffrey Noer <noer@cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Sun Apr 26 15:31:55 1998 Tom Tromey <tromey@creche>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
- * config.in: Ditto.
-
-Sun Apr 26 15:20:01 1998 Tom Tromey <tromey@cygnus.com>
-
- * acconfig.h: New file.
- * configure.in: Reverted change of Apr 24; use sinclude again.
-
-Fri Apr 24 14:16:40 1998 Tom Tromey <tromey@creche>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
- * config.in: Ditto.
-
-Fri Apr 24 11:19:20 1998 Tom Tromey <tromey@cygnus.com>
-
- * configure.in: Don't call sinclude.
-
-Fri Apr 24 11:35:01 1998 Andrew Cagney <cagney@chook.cygnus.com>
-
- * mips.igen (do_store_left): Pass 0 not NULL to store_memory.
-
-Tue Apr 21 11:59:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * mips.igen (ERET): Implement.
-
- * interp.c (decode_coproc): Return sign-extended EPC.
-
- * mips.igen (ANDI, LUI, MFC0): Add tracing code.
-
- * interp.c (signal_exception): Do not ignore Trap.
- (signal_exception): On TRAP, restart at exception address.
- (HALT_INSTRUCTION, HALT_INSTRUCTION_MASK): Define.
- (signal_exception): Update.
- (sim_open): Patch V_COMMON interrupt vector with an abort sequence
- so that TRAP instructions are caught.
-
-Mon Apr 20 11:26:55 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-main.h (struct hilo_access, struct hilo_history): Define,
- contains HI/LO access history.
- (struct _sim_cpu): Make hiaccess and loaccess of type hilo_access.
- (HIACCESS, LOACCESS): Delete, replace with
- (HIHISTORY, LOHISTORY): New macros.
- (CHECKHILO): Delete all, moved to mips.igen
-
- * gencode.c (build_instruction): Do not generate checks for
- correct HI/LO register usage.
-
- * interp.c (old_engine_run): Delete checks for correct HI/LO
- register usage.
-
- * mips.igen (check_mt_hilo, check_mf_hilo, check_op_hilo,
- check_mf_cycles): New functions.
- (do_mfhi, do_mflo, "mthi", "mtlo", do_ddiv, do_ddivu, do_div,
- do_divu, domultx, do_mult, do_multu): Use.
-
- * tx.igen ("madd", "maddu"): Use.
-
-Wed Apr 15 18:31:54 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * mips.igen (DSRAV): Use function do_dsrav.
- (SRAV): Use new function do_srav.
-
- * m16.igen (BEQZ, BNEZ): Compare GPR[TRX] not GPR[RX].
- (B): Sign extend 11 bit immediate.
- (EXT-B*): Shift 16 bit immediate left by 1.
- (ADDIU*): Don't sign extend immediate value.
-
-Wed Apr 15 10:32:15 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * m16run.c (sim_engine_run): Restore CIA after handling an event.
-
- * sim-main.h (DELAY_SLOT, NULLIFY_NEXT_INSTRUCTION): For IGEN, use
- functions.
-
- * mips.igen (delayslot32, nullify_next_insn): New functions.
- (m16.igen): Always include.
- (do_*): Add more tracing.
-
- * m16.igen (delayslot16): Add NIA argument, could be called by a
- 32 bit MIPS16 instruction.
-
- * interp.c (ifetch16): Move function from here.
- * sim-main.c (ifetch16): To here.
-
- * sim-main.c (ifetch16, ifetch32): Update to match current
- implementations of LH, LW.
- (signal_exception): Don't print out incorrect hex value of illegal
- instruction.
-
-Wed Apr 15 00:17:25 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * m16run.c (sim_engine_run): Use IMEM16 and IMEM32 to fetch an
- instruction.
-
- * m16.igen: Implement MIPS16 instructions.
-
- * mips.igen (do_addiu, do_addu, do_and, do_daddiu, do_daddu,
- do_ddiv, do_ddivu, do_div, do_divu, do_dmultx, do_dmultu, do_srav,
- do_dsubu, do_mfhi, do_mflo, do_mult, do_multu, do_nor, do_or,
- do_sll, do_sllv, do_slt, do_slti, do_sltiu, do_sltu, do_sra,
- do_srl, do_srlv, do_subu, do_xor, do_xori): New functions. Move
- bodies of corresponding code from 32 bit insn to these. Also used
- by MIPS16 versions of functions.
-
- * sim-main.h (RAIDX, T8IDX, T8, SPIDX): Define.
- (IMEM16): Drop NR argument from macro.
-
-Sat Apr 4 22:39:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * Makefile.in (SIM_OBJS): Add sim-main.o.
-
- * sim-main.h (address_translation, load_memory, store_memory,
- cache_op, sync_operation, prefetch, ifetch32, pending_tick): Mark
- as INLINE_SIM_MAIN.
- (pr_addr, pr_uword64): Declare.
- (sim-main.c): Include when H_REVEALS_MODULE_P.
-
- * interp.c (address_translation, load_memory, store_memory,
- cache_op, sync_operation, prefetch, ifetch32, pending_tick): Move
- from here.
- * sim-main.c: To here. Fix compilation problems.
-
- * configure.in: Enable inlining.
- * configure: Re-config.
-
-Sat Apr 4 20:36:25 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Fri Apr 3 04:32:35 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * mips.igen: Include tx.igen.
- * Makefile.in (IGEN_INCLUDE): Add tx.igen.
- * tx.igen: New file, contains MADD and MADDU.
-
- * interp.c (load_memory): When shifting bytes, use LOADDRMASK not
- the hardwired constant `7'.
- (store_memory): Ditto.
- (LOADDRMASK): Move definition to sim-main.h.
-
- mips.igen (MTC0): Enable for r3900.
- (ADDU): Add trace.
-
- mips.igen (do_load_byte): Delete.
- (do_load, do_store, do_load_left, do_load_write, do_store_left,
- do_store_right): New functions.
- (SW*, LW*, SD*, LD*, SH, LH, SB, LB): Use.
-
- configure.in: Let the tx39 use igen again.
- configure: Update.
-
-Thu Apr 2 10:59:39 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * interp.c (sim_monitor): get_mem_info returns a 4 byte quantity,
- not an address sized quantity. Return zero for cache sizes.
-
-Wed Apr 1 23:47:53 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * mips.igen (r3900): r3900 does not support 64 bit integer
- operations.
-
-Mon Mar 30 14:46:05 1998 Gavin Koch <gavin@cygnus.com>
-
- * configure.in (mipstx39*-*-*): Use gencode simulator rather
- than igen one.
- * configure : Rebuild.
-
-Fri Mar 27 16:15:52 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Fri Mar 27 15:01:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * interp.c (mips_option_handler): Iterate over MAX_NR_PROCESSORS.
-
-Wed Mar 25 16:44:27 1998 Ian Carmichael <iancarm@cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
- * config.in: Regenerated to track ../common/aclocal.m4 changes.
-
-Wed Mar 25 12:35:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Wed Mar 25 10:05:46 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * interp.c (Max, Min): Comment out functions. Not yet used.
-
-Wed Mar 18 12:38:12 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Tue Mar 17 19:05:20 1998 Frank Ch. Eigler <fche@cygnus.com>
-
- * Makefile.in (MIPS_EXTRA_LIBS, SIM_EXTRA_LIBS): Added
- configurable settings for stand-alone simulator.
-
- * configure.in: Added X11 search, just in case.
-
- * configure: Regenerated.
-
-Wed Mar 11 14:09:10 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * interp.c (sim_write, sim_read, load_memory, store_memory):
- Replace sim_core_*_map with read_map, write_map, exec_map resp.
-
-Tue Mar 3 13:58:43 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-main.h (GETFCC): Return an unsigned value.
-
-Tue Mar 3 13:21:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * mips.igen (DIV): Fix check for -1 / MIN_INT.
- (DADD): Result destination is RD not RT.
-
-Fri Feb 27 13:49:49 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-main.h (HIACCESS, LOACCESS): Always define.
-
- * mdmx.igen (Maxi, Mini): Rename Max, Min.
-
- * interp.c (sim_info): Delete.
-
-Fri Feb 27 18:41:01 1998 Doug Evans <devans@canuck.cygnus.com>
-
- * interp.c (DECLARE_OPTION_HANDLER): Use it.
- (mips_option_handler): New argument `cpu'.
- (sim_open): Update call to sim_add_option_table.
-
-Wed Feb 25 18:56:22 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * mips.igen (CxC1): Add tracing.
-
-Fri Feb 20 17:43:21 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-main.h (Max, Min): Declare.
-
- * interp.c (Max, Min): New functions.
-
- * mips.igen (BC1): Add tracing.
-
-Thu Feb 19 14:50:00 1998 John Metzler <jmetzler@cygnus.com>
-
- * interp.c Added memory map for stack in vr4100
-
-Thu Feb 19 10:21:21 1998 Gavin Koch <gavin@cygnus.com>
-
- * interp.c (load_memory): Add missing "break"'s.
-
-Tue Feb 17 12:45:35 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * interp.c (sim_store_register, sim_fetch_register): Pass in
- length parameter. Return -1.
-
-Tue Feb 10 11:57:40 1998 Ian Carmichael <iancarm@cygnus.com>
-
- * interp.c: Added hardware init hook, fixed warnings.
-
-Sat Feb 7 17:16:20 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * Makefile.in (itable.h itable.c): Depend on SIM_@sim_gen@_ALL.
-
-Tue Feb 3 11:36:02 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * interp.c (ifetch16): New function.
-
- * sim-main.h (IMEM32): Rename IMEM.
- (IMEM16_IMMED): Define.
- (IMEM16): Define.
- (DELAY_SLOT): Update.
-
- * m16run.c (sim_engine_run): New file.
-
- * m16.igen: All instructions except LB.
- (LB): Call do_load_byte.
- * mips.igen (do_load_byte): New function.
- (LB): Call do_load_byte.
-
- * mips.igen: Move spec for insn bit size and high bit from here.
- * Makefile.in (tmp-igen, tmp-m16): To here.
-
- * m16.dc: New file, decode mips16 instructions.
-
- * Makefile.in (SIM_NO_ALL): Define.
- (tmp-m16): Generate both 16 bit and 32 bit simulator engines.
-
-Tue Feb 3 11:28:00 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure.in (mips_fpu_bitsize): For tx39, restrict floating
- point unit to 32 bit registers.
- * configure: Re-generate.
-
-Sun Feb 1 15:47:14 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure.in (sim_use_gen): Make IGEN the default simulator
- generator for generic 32 and 64 bit mips targets.
- * configure: Re-generate.
-
-Sun Feb 1 16:52:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-main.h (SizeFGR): Determine from floating-point and not gpr
- bitsize.
-
- * interp.c (sim_fetch_register, sim_store_register): Read/write
- FGR from correct location.
- (sim_open): Set size of FGR's according to
- WITH_TARGET_FLOATING_POINT_BITSIZE.
-
- * sim-main.h (FGR): Store floating point registers in a separate
- array.
-
-Sun Feb 1 16:47:51 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Tue Feb 3 00:10:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * interp.c (ColdReset): Call PENDING_INVALIDATE.
-
- * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Call PENDING_TICK.
-
- * interp.c (pending_tick): New function. Deliver pending writes.
-
- * sim-main.h (PENDING_FILL, PENDING_TICK, PENDING_SCHED,
- PENDING_BIT, PENDING_INVALIDATE): Re-write pipeline code so that
- it can handle mixed sized quantites and single bits.
-
-Mon Feb 2 17:43:15 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * interp.c (oengine.h): Do not include when building with IGEN.
- (sim_open): Replace GPRLEN by WITH_TARGET_WORD_BITSIZE.
- (sim_info): Ditto for PROCESSOR_64BIT.
- (sim_monitor): Replace ut_reg with unsigned_word.
- (*): Ditto for t_reg.
- (LOADDRMASK): Define.
- (sim_open): Remove defunct check that host FP is IEEE compliant,
- using software to emulate floating point.
- (value_fpr, ...): Always compile, was conditional on HASFPU.
-
-Sun Feb 1 11:15:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-main.h (sim_state): Make the cpu array MAX_NR_PROCESSORS in
- size.
-
- * interp.c (SD, CPU): Define.
- (mips_option_handler): Set flags in each CPU.
- (interrupt_event): Assume CPU 0 is the one being iterrupted.
- (sim_close): Do not clear STATE, deleted anyway.
- (sim_write, sim_read): Assume CPU zero's vm should be used for
- data transfers.
- (sim_create_inferior): Set the PC for all processors.
- (sim_monitor, store_word, load_word, mips16_entry): Add cpu
- argument.
- (mips16_entry): Pass correct nr of args to store_word, load_word.
- (ColdReset): Cold reset all cpu's.
- (signal_exception): Pass cpu to sim_monitor & mips16_entry.
- (sim_monitor, load_memory, store_memory, signal_exception): Use
- `CPU' instead of STATE_CPU.
-
-
- * sim-main.h: Replace uses of STATE_CPU with CPU. Replace sd with
- SD or CPU_.
-
- * sim-main.h (signal_exception): Add sim_cpu arg.
- (SignalException*): Pass both SD and CPU to signal_exception.
- * interp.c (signal_exception): Update.
-
- * sim-main.h (value_fpr, store_fpr, dotrace, ifetch32), interp.c:
- Ditto
- (sync_operation, prefetch, cache_op, store_memory, load_memory,
- address_translation): Ditto
- (decode_coproc, cop_lw, cop_ld, cop_sw, cop_sd): Ditto.
-
-Sat Jan 31 18:15:41 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Sat Jan 31 14:49:24 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * interp.c (sim_engine_run): Add `nr_cpus' argument.
-
- * mips.igen (model): Map processor names onto BFD name.
-
- * sim-main.h (CPU_CIA): Delete.
- (SET_CIA, GET_CIA): Define
-
-Wed Jan 21 16:16:27 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-main.h (GPR_SET): Define, used by igen when zeroing a
- regiser.
-
- * configure.in (default_endian): Configure a big-endian simulator
- by default.
- * configure: Re-generate.
-
-Mon Jan 19 22:26:29 1998 Doug Evans <devans@seba>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Mon Jan 5 20:38:54 1998 Mark Alexander <marka@cygnus.com>
-
- * interp.c (sim_monitor): Handle Densan monitor outbyte
- and inbyte functions.
-
-1997-12-29 Felix Lee <flee@cygnus.com>
-
- * interp.c (sim_engine_run): msvc cpp barfs on #if (a==b!=c).
-
-Wed Dec 17 14:48:20 1997 Jeffrey A Law (law@cygnus.com)
-
- * Makefile.in (tmp-igen): Arrange for $zero to always be
- reset to zero after every instruction.
-
-Mon Dec 15 23:17:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
- * config.in: Ditto.
-
-Wed Dec 10 17:10:45 1997 Jeffrey A Law (law@cygnus.com)
-
- * mips.igen (MSUB): Fix to work like MADD.
- * gencode.c (MSUB): Similarly.
-
-Thu Dec 4 09:21:05 1997 Doug Evans <devans@canuck.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Wed Nov 26 11:00:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * mips.igen (LWC1): Correct assembler - lwc1 not swc1.
-
-Sun Nov 23 01:45:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-main.h (sim-fpu.h): Include.
-
- * interp.c (convert, SquareRoot, Recip, Divide, Multiply, Sub,
- Add, Negate, AbsoluteValue, Equal, Less, Infinity, NaN): Rewrite
- using host independant sim_fpu module.
-
-Thu Nov 20 19:56:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * interp.c (signal_exception): Report internal errors with SIGABRT
- not SIGQUIT.
-
- * sim-main.h (C0_CONFIG): New register.
- (signal.h): No longer include.
-
- * interp.c (decode_coproc): Allow access C0_CONFIG to register.
-
-Tue Nov 18 15:33:48 1997 Doug Evans <devans@canuck.cygnus.com>
-
- * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS).
-
-Fri Nov 14 11:56:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * mips.igen: Tag vr5000 instructions.
- (ANDI): Was missing mipsIV model, fix assembler syntax.
- (do_c_cond_fmt): New function.
- (C.cond.fmt): Handle mips I-III which do not support CC field
- separatly.
- (bc1): Handle mips IV which do not have a delaed FCC separatly.
- (SDR): Mask paddr when BigEndianMem, not the converse as specified
- in IV3.2 spec.
- (DMULT, DMULTU): Force use of hosts 64bit multiplication. Handle
- vr5000 which saves LO in a GPR separatly.
-
- * configure.in (enable-sim-igen): For vr5000, select vr5000
- specific instructions.
- * configure: Re-generate.
-
-Wed Nov 12 14:42:52 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * Makefile.in (SIM_OBJS): Add sim-fpu module.
-
- * interp.c (store_fpr), sim-main.h: Add separate fmt_uninterpreted_32 and
- fmt_uninterpreted_64 bit cases to switch. Convert to
- fmt_formatted,
-
- * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Define,
-
- * mips.igen (SWR): Mask paddr when BigEndianMem, not the converse
- as specified in IV3.2 spec.
- (MTC1, DMTC1): Call StoreFPR to store the GPR in the FPR.
-
-Tue Nov 11 12:38:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * mips.igen: Delay slot branches add OFFSET to NIA not CIA.
- (MFC0, MTC0, SWC1, LWC1, SDC1, LDC1): Implement.
- (MTC1, MFC1, DMTC1, DMFC1, CFC1, CTC1): Implement separate non
- PENDING_FILL versions of instructions. Simplify.
- (X): New function.
- (MULT, MULTU): Implement separate RD==0 and RD!=0 versions of
- instructions.
- (BEQZ, ..., SLT, SLTI, TLT, TLE, TLI, ...): Explicitly cast GPR to
- a signed value.
- (MTHI, MFHI): Disable code checking HI-LO.
-
- * sim-main.h (dotrace,tracefh), interp.c: Make dotrace & tracefh
- global.
- (NULLIFY_NEXT_INSTRUCTION): Call dotrace.
-
-Thu Nov 6 16:36:35 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * gencode.c (build_mips16_operands): Replace IPC with cia.
-
- * interp.c (sim_monitor, signal_exception, cache_op, store_fpr,
- value_fpr, cop_ld, cop_lw, cop_sw, cop_sd, decode_coproc): Replace
- IPC to `cia'.
- (UndefinedResult): Replace function with macro/function
- combination.
- (sim_engine_run): Don't save PC in IPC.
-
- * sim-main.h (IPC): Delete.
-
-
- * interp.c (signal_exception, store_word, load_word,
- address_translation, load_memory, store_memory, cache_op,
- prefetch, sync_operation, ifetch, value_fpr, store_fpr, convert,
- cop_lw, cop_ld, cop_sw, cop_sd, decode_coproc, sim_monitor): Add
- current instruction address - cia - argument.
- (sim_read, sim_write): Call address_translation directly.
- (sim_engine_run): Rename variable vaddr to cia.
- (signal_exception): Pass cia to sim_monitor
-
- * sim-main.h (SignalException, LoadWord, StoreWord, CacheOp,
- Prefetch, SyncOperation, ValueFPR, StoreFPR, Convert, COP_LW,
- COP_LD, COP_SW, COP_SD, DecodeCoproc): Update.
-
- * sim-main.h (SignalExceptionSimulatorFault): Delete definition.
- * interp.c (sim_open): Replace SignalExceptionSimulatorFault with
- SIM_ASSERT.
-
- * interp.c (signal_exception): Pass restart address to
- sim_engine_restart.
-
- * Makefile.in (semantics.o, engine.o, support.o, itable.o,
- idecode.o): Add dependency.
-
- * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESUME_HOOK):
- Delete definitions
- (DELAY_SLOT): Update NIA not PC with branch address.
- (NULLIFY_NEXT_INSTRUCTION): Set NIA to instruction after next.
-
- * mips.igen: Use CIA not PC in branch calculations.
- (illegal): Call SignalException.
- (BEQ, ADDIU): Fix assembler.
-
-Wed Nov 5 12:19:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * m16.igen (JALX): Was missing.
-
- * configure.in (enable-sim-igen): New configuration option.
- * configure: Re-generate.
-
- * sim-main.h (MAX_INSNS, INSN_NAME): Define.
-
- * interp.c (load_memory, store_memory): Delete parameter RAW.
- (sim_read, sim_write): Use sim_core_{read,write}_buffer directly
- bypassing {load,store}_memory.
-
- * sim-main.h (ByteSwapMem): Delete definition.
-
- * Makefile.in (SIM_OBJS): Add sim-memopt module.
-
- * interp.c (sim_do_command, sim_commands): Delete mips specific
- commands. Handled by module sim-options.
-
- * sim-main.h (SIM_HAVE_FLATMEM): Undefine, use sim-core.o module.
- (WITH_MODULO_MEMORY): Define.
-
- * interp.c (sim_info): Delete code printing memory size.
-
- * interp.c (mips_size): Nee sim_size, delete function.
- (power2): Delete.
- (monitor, monitor_base, monitor_size): Delete global variables.
- (sim_open, sim_close): Delete code creating monitor and other
- memory regions. Use sim-memopts module, via sim_do_commandf, to
- manage memory regions.
- (load_memory, store_memory): Use sim-core for memory model.
-
- * interp.c (address_translation): Delete all memory map code
- except line forcing 32 bit addresses.
-
-Wed Nov 5 11:21:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-main.h (WITH_TRACE): Delete definition. Enables common
- trace options.
-
- * interp.c (logfh, logfile): Delete globals.
- (sim_open, sim_close): Delete code opening & closing log file.
- (mips_option_handler): Delete -l and -n options.
- (OPTION mips_options): Ditto.
-
- * interp.c (OPTION mips_options): Rename option trace to dinero.
- (mips_option_handler): Update.
-
-Wed Nov 5 09:35:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * interp.c (fetch_str): New function.
- (sim_monitor): Rewrite using sim_read & sim_write.
- (sim_open): Check magic number.
- (sim_open): Write monitor vectors into memory using sim_write.
- (MONITOR_BASE, MONITOR_SIZE, MEM_SIZE): Define.
- (sim_read, sim_write): Simplify - transfer data one byte at a
- time.
- (load_memory, store_memory): Clarify meaning of parameter RAW.
-
- * sim-main.h (isHOST): Defete definition.
- (isTARGET): Mark as depreciated.
- (address_translation): Delete parameter HOST.
-
- * interp.c (address_translation): Delete parameter HOST.
-
-Wed Oct 29 11:13:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * mips.igen:
-
- * Makefile.in (IGEN_INCLUDE): Files included by mips.igen.
- (tmp-igen, tmp-m16): Depend on IGEN_INCLUDE.
-
-Tue Oct 28 11:06:47 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * mips.igen: Add model filter field to records.
-
-Mon Oct 27 17:53:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * Makefile.in (SIM_NO_CFLAGS): Define. Define WITH_IGEN=0.
-
- interp.c (sim_engine_run): Do not compile function sim_engine_run
- when WITH_IGEN == 1.
-
- * configure.in (sim_igen_flags, sim_m16_flags): Set according to
- target architecture.
-
- Makefile.in (tmp-igen, tmp-m16): Drop -F and -M options to
- igen. Replace with configuration variables sim_igen_flags /
- sim_m16_flags.
-
- * m16.igen: New file. Copy mips16 insns here.
- * mips.igen: From here.
-
-Mon Oct 27 13:53:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * Makefile.in (SIM_NO_OBJ): Define, move SIM_M16_OBJ, SIM_IGEN_OBJ
- to top.
- (tmp-igen, tmp-m16): Pass -I srcdir to igen.
-
-Sat Oct 25 16:51:40 1997 Gavin Koch <gavin@cygnus.com>
-
- * gencode.c (build_instruction): Follow sim_write's lead in using
- BigEndianMem instead of !ByteSwapMem.
-
-Fri Oct 24 17:41:49 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure.in (sim_gen): Dependent on target, select type of
- generator. Always select old style generator.
-
- configure: Re-generate.
-
- Makefile.in (tmp-igen, tmp-m16, clean-m16, clean-igen): New
- targets.
- (SIM_M16_CFLAGS, SIM_M16_ALL, SIM_M16_OBJ, BUILT_SRC_FROM_M16,
- SIM_IGEN_CFLAGS, SIM_IGEN_ALL, SIM_IGEN_OBJ, BUILT_SRC_FROM_IGEN,
- IGEN_TRACE, IGEN_INSN, IGEN_DC): Define
- (SIM_EXTRA_CFLAGS, SIM_EXTRA_ALL, SIM_OBJS): Add member
- SIM_@sim_gen@_*, set by autoconf.
-
-Wed Oct 22 12:52:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-main.h (NULLIFY_NEXT_INSTRUCTION, DELAY_SLOT): Define.
-
- * interp.c (ColdReset): Remove #ifdef HASFPU, check
- CURRENT_FLOATING_POINT instead.
-
- * interp.c (ifetch32): New function. Fetch 32 bit instruction.
- (address_translation): Raise exception InstructionFetch when
- translation fails and isINSTRUCTION.
-
- * interp.c (sim_open, sim_write, sim_monitor, store_word,
- sim_engine_run): Change type of of vaddr and paddr to
- address_word.
- (address_translation, prefetch, load_memory, store_memory,
- cache_op): Change type of vAddr and pAddr to address_word.
-
- * gencode.c (build_instruction): Change type of vaddr and paddr to
- address_word.
-
-Mon Oct 20 15:29:04 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-main.h (ALU64_END, ALU32_END): Use ALU*_OVERFLOW_RESULT
- macro to obtain result of ALU op.
-
-Tue Oct 21 17:39:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * interp.c (sim_info): Call profile_print.
-
-Mon Oct 20 13:31:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * Makefile.in (SIM_OBJS): Add sim-profile.o module.
-
- * sim-main.h (WITH_PROFILE): Do not define, defined in
- common/sim-config.h. Use sim-profile module.
- (simPROFILE): Delete defintion.
-
- * interp.c (PROFILE): Delete definition.
- (mips_option_handler): Delete 'p', 'y' and 'x' profile options.
- (sim_close): Delete code writing profile histogram.
- (mips_set_profile, mips_set_profile_size, writeout16, writeout32):
- Delete.
- (sim_engine_run): Delete code profiling the PC.
-
-Mon Oct 20 13:31:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-main.h (SIGNEXTEND): Force type of result to unsigned_word.
-
- * interp.c (sim_monitor): Make register pointers of type
- unsigned_word*.
-
- * sim-main.h: Make registers of type unsigned_word not
- signed_word.
-
-Thu Oct 16 10:31:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * interp.c (sync_operation): Rename from SyncOperation, make
- global, add SD argument.
- (prefetch): Rename from Prefetch, make global, add SD argument.
- (decode_coproc): Make global.
-
- * sim-main.h (SyncOperation, DecodeCoproc, Pefetch): Define.
-
- * gencode.c (build_instruction): Generate DecodeCoproc not
- decode_coproc calls.
-
- * interp.c (SETFCC, GETFCC, PREVCOC1): Move to sim-main.h
- (SizeFGR): Move to sim-main.h
- (simHALTEX, simHALTIN, simTRACE, simPROFILE, simDELAYSLOT,
- simSIGINT, simJALDELAYSLOT): Move to sim-main.h
- (FP_FLAGS, FP_ENABLE, FP_CAUSE, IR, UF, OF, DZ, IO, UO): Move to
- sim-main.h.
- (FP_FS, FP_MASK_RM, FP_SH_RM, FP_RM_NEAREST, FP_RM_TOPINF,
- FP_RM_TOMINF, GETRM): Move to sim-main.h.
- (Uncached, CachedNoncoherent, CachedCoherent, Cached,
- isINSTRUCTION, ..., AccessLength_BYTE, ...): Move to sim-main.h.
- (UserMode, BigEndianMem, ByteSwapMem, ReverseEndian,
- BigEndianCPU, status_KSU_mask, ...). Moved to sim-main.h
-
- * sim-main.h (ALU32_END, ALU64_END): Define. When overflow raise
- exception.
- (sim-alu.h): Include.
- (NULLIFY_NIA, NULL_CIA, CPU_CIA): Define.
- (sim_cia): Typedef to instruction_address.
-
-Thu Oct 16 10:31:41 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * Makefile.in (interp.o): Rename generated file engine.c to
- oengine.c.
-
- * interp.c: Update.
-
-Thu Oct 16 10:31:40 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * gencode.c (build_instruction): Use FPR_STATE not fpr_state.
-
-Thu Oct 16 10:31:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * gencode.c (build_instruction): For "FPSQRT", output correct
- number of arguments to Recip.
-
-Tue Oct 14 17:38:18 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * Makefile.in (interp.o): Depends on sim-main.h
-
- * interp.c (mips16_entry, ColdReset,dotrace): Add SD argument. Use GPR not registers.
-
- * sim-main.h (sim_cpu): Add registers, register_widths, fpr_state,
- ipc, dspc, pending_*, hiaccess, loaccess, state, dsstate fields.
- (REGISTERS, REGISTER_WIDTHS, FPR_STATE, IPC, DSPC, PENDING_*,
- STATE, DSSTATE): Define
- (GPR, FGRIDX, ..): Define.
-
- * interp.c (registers, register_widths, fpr_state, ipc, dspc,
- pending_*, hiaccess, loaccess, state, dsstate): Delete globals.
- (GPR, FGRIDX, ...): Delete macros.
-
- * interp.c: Update names to match defines from sim-main.h
-
-Tue Oct 14 15:11:45 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * interp.c (sim_monitor): Add SD argument.
- (sim_warning): Delete. Replace calls with calls to
- sim_io_eprintf.
- (sim_error): Delete. Replace calls with sim_io_error.
- (open_trace, writeout32, writeout16, getnum): Add SD argument.
- (mips_set_profile): Rename from sim_set_profile. Add SD argument.
- (mips_set_profile_size): Rename from sim_set_profile_size. Add SD
- argument.
- (mips_size): Rename from sim_size. Add SD argument.
-
- * interp.c (simulator): Delete global variable.
- (callback): Delete global variable.
- (mips_option_handler, sim_open, sim_write, sim_read,
- sim_store_register, sim_fetch_register, sim_info, sim_do_command,
- sim_size,sim_monitor): Use sim_io_* not callback->*.
- (sim_open): ZALLOC simulator struct.
- (PROFILE): Do not define.
-
-Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * interp.c (sim_open), support.h: Replace CHECKSIM macro found in
- support.h with corresponding code.
-
- * sim-main.h (word64, uword64), support.h: Move definition to
- sim-main.h.
- (WORD64LO, WORD64HI, SET64LO, SET64HI, WORD64, UWORD64): Ditto.
-
- * support.h: Delete
- * Makefile.in: Update dependencies
- * interp.c: Do not include.
-
-Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * interp.c (address_translation, load_memory, store_memory,
- cache_op): Rename to from AddressTranslation et.al., make global,
- add SD argument
-
- * sim-main.h (AddressTranslation, LoadMemory, StoreMemory,
- CacheOp): Define.
-
- * interp.c (SignalException): Rename to signal_exception, make
- global.
-
- * interp.c (Interrupt, ...): Move definitions to sim-main.h.
-
- * sim-main.h (SignalException, SignalExceptionInterrupt,
- SignalExceptionInstructionFetch, SignalExceptionAddressStore,
- SignalExceptionAddressLoad, SignalExceptionSimulatorFault,
- SignalExceptionIntegerOverflow, SignalExceptionCoProcessorUnusable):
- Define.
-
- * interp.c, support.h: Use.
-
-Tue Oct 14 13:19:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * interp.c (ValueFPR, StoreFPR), sim-main.h: Make global, rename
- to value_fpr / store_fpr. Add SD argument.
- (NaN, Infinity, Less, Equal, AbsoluteValue, Negate, Add, Sub,
- Multiply, Divide, Recip, SquareRoot, Convert): Make global.
-
- * sim-main.h (ValueFPR, StoreFPR): Define.
-
-Tue Oct 14 13:06:55 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * interp.c (sim_engine_run): Check consistency between configure
- WITH_TARGET_WORD_BITSIZE and WITH_FLOATING_POINT and gensim GPRLEN
- and HASFPU.
-
- * configure.in (mips_bitsize): Configure WITH_TARGET_WORD_BITSIZE.
- (mips_fpu): Configure WITH_FLOATING_POINT.
- (mips_endian): Configure WITH_TARGET_ENDIAN.
- * configure: Update.
-
-Fri Oct 3 09:28:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Mon Sep 29 14:45:00 1997 Bob Manson <manson@charmed.cygnus.com>
-
- * configure: Regenerated.
-
-Fri Sep 26 12:48:18 1997 Mark Alexander <marka@cygnus.com>
-
- * interp.c: Allow Debug, DEPC, and EPC registers to be examined in GDB.
-
-Thu Sep 25 11:15:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * gencode.c (print_igen_insn_models): Assume certain architectures
- include all mips* instructions.
- (print_igen_insn_format): Use data_size==-1 as marker for MIPS16
- instruction.
-
- * Makefile.in (tmp.igen): Add target. Generate igen input from
- gencode file.
-
- * gencode.c (FEATURE_IGEN): Define.
- (main): Add --igen option. Generate output in igen format.
- (process_instructions): Format output according to igen option.
- (print_igen_insn_format): New function.
- (print_igen_insn_models): New function.
- (process_instructions): Only issue warnings and ignore
- instructions when no FEATURE_IGEN.
-
-Wed Sep 24 17:38:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * interp.c (COP_SD, COP_LD): Add UNUSED to pacify GCC for some
- MIPS targets.
-
-Tue Sep 23 11:04:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Tue Sep 23 10:19:51 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * Makefile.in (SIM_ALIGNMENT, SIM_ENDIAN, SIM_HOSTENDIAN,
- SIM_RESERVED_BITS): Delete, moved to common.
- (SIM_EXTRA_CFLAGS): Update.
-
-Mon Sep 22 11:46:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure.in: Configure non-strict memory alignment.
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Fri Sep 19 17:45:25 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Sat Sep 20 14:07:28 1997 Gavin Koch <gavin@cygnus.com>
-
- * gencode.c (SDBBP,DERET): Added (3900) insns.
- (RFE): Turn on for 3900.
- * interp.c (DebugBreakPoint,DEPC,Debug,Debug_*): Added.
- (dsstate): Made global.
- (SUBTARGET_R3900): Added.
- (CANCELDELAYSLOT): New.
- (SignalException): Ignore SystemCall rather than ignore and
- terminate. Add DebugBreakPoint handling.
- (decode_coproc): New insns RFE, DERET; and new registers Debug
- and DEPC protected by SUBTARGET_R3900.
- (sim_engine_run): Use CANCELDELAYSLOT rather than clearing
- bits explicitly.
- * Makefile.in,configure.in: Add mips subtarget option.
- * configure: Update.
-
-Fri Sep 19 09:33:27 1997 Gavin Koch <gavin@cygnus.com>
-
- * gencode.c: Add r3900 (tx39).
-
-
-Tue Sep 16 15:52:04 1997 Gavin Koch <gavin@cygnus.com>
-
- * gencode.c (build_instruction): Don't need to subtract 4 for
- JALR, just 2.
-
-Tue Sep 16 11:32:28 1997 Gavin Koch <gavin@cygnus.com>
-
- * interp.c: Correct some HASFPU problems.
-
-Mon Sep 15 17:36:15 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Fri Sep 12 12:01:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * interp.c (mips_options): Fix samples option short form, should
- be `x'.
-
-Thu Sep 11 09:35:29 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * interp.c (sim_info): Enable info code. Was just returning.
-
-Tue Sep 9 17:30:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * interp.c (decode_coproc): Clarify warning about unsuported MTC0,
- MFC0.
-
-Tue Sep 9 16:28:28 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * gencode.c (build_instruction): Use SIGNED64 for 64 bit
- constants.
- (build_instruction): Ditto for LL.
-
-Thu Sep 4 17:21:23 1997 Doug Evans <dje@seba>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Wed Aug 27 18:13:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
- * config.in: Ditto.
-
-Wed Aug 27 14:12:27 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * interp.c (sim_open): Add call to sim_analyze_program, update
- call to sim_config.
-
-Tue Aug 26 10:40:07 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * interp.c (sim_kill): Delete.
- (sim_create_inferior): Add ABFD argument. Set PC from same.
- (sim_load): Move code initializing trap handlers from here.
- (sim_open): To here.
- (sim_load): Delete, use sim-hload.c.
-
- * Makefile.in (SIM_OBJS): Add sim-hload.o module.
-
-Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
- * config.in: Ditto.
-
-Mon Aug 25 15:59:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * interp.c (sim_open): Add ABFD argument.
- (sim_load): Move call to sim_config from here.
- (sim_open): To here. Check return status.
-
-Fri Jul 25 15:00:45 1997 Gavin Koch <gavin@cygnus.com>
-
- * gencode.c (build_instruction): Two arg MADD should
- not assign result to $0.
-
-Thu Jun 26 12:13:17 1997 Angela Marie Thomas (angela@cygnus.com)
-
- * sim/mips/configure: Change default_sim_endian to 0 (bi-endian)
- * sim/mips/configure.in: Regenerate.
-
-Wed Jul 9 10:29:21 1997 Andrew Cagney <cagney@critters.cygnus.com>
-
- * interp.c (SUB_REG_UW, SUB_REG_SW, SUB_REG_*): Use more explicit
- signed8, unsigned8 et.al. types.
-
- * interp.c (SUB_REG_FETCH): Handle both little and big endian
- hosts when selecting subreg.
-
-Wed Jul 2 11:54:10 1997 Jeffrey A Law (law@cygnus.com)
-
- * interp.c (sim_engine_run): Reset the ZERO register to zero
- regardless of FEATURE_WARN_ZERO.
- * gencode.c (FEATURE_WARNINGS): Remove FEATURE_WARN_ZERO.
-
-Wed Jun 4 10:43:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * interp.c (decode_coproc): Implement MTC0 N, CAUSE.
- (SignalException): For BreakPoints ignore any mode bits and just
- save the PC.
- (SignalException): Always set the CAUSE register.
-
-Tue Jun 3 05:00:33 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * interp.c (SignalException): Clear the simDELAYSLOT flag when an
- exception has been taken.
-
- * interp.c: Implement the ERET and mt/f sr instructions.
-
-Sat May 31 00:44:16 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * interp.c (SignalException): Don't bother restarting an
- interrupt.
-
-Fri May 30 23:41:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * interp.c (SignalException): Really take an interrupt.
- (interrupt_event): Only deliver interrupts when enabled.
-
-Tue May 27 20:08:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * interp.c (sim_info): Only print info when verbose.
- (sim_info) Use sim_io_printf for output.
-
-Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * interp.c (CoProcPresent): Add UNUSED attribute - not used by all
- mips architectures.
-
-Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * interp.c (sim_do_command): Check for common commands if a
- simulator specific command fails.
-
-Thu May 22 09:32:03 1997 Gavin Koch <gavin@cygnus.com>
-
- * interp.c (sim_engine_run): ifdef out uses of simSTOP, simSTEP
- and simBE when DEBUG is defined.
-
-Wed May 21 09:08:10 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * interp.c (interrupt_event): New function. Pass exception event
- onto exception handler.
-
- * configure.in: Check for stdlib.h.
- * configure: Regenerate.
-
- * gencode.c (build_instruction): Add UNUSED attribute to tempS
- variable declaration.
- (build_instruction): Initialize memval1.
- (build_instruction): Add UNUSED attribute to byte, bigend,
- reverse.
- (build_operands): Ditto.
-
- * interp.c: Fix GCC warnings.
- (sim_get_quit_code): Delete.
-
- * configure.in: Add INLINE, ENDIAN, HOSTENDIAN and WARNINGS.
- * Makefile.in: Ditto.
- * configure: Re-generate.
-
- * Makefile.in (SIM_OBJS): Add sim-watch.o module.
-
-Tue May 20 15:08:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * interp.c (mips_option_handler): New function parse argumes using
- sim-options.
- (myname): Replace with STATE_MY_NAME.
- (sim_open): Delete check for host endianness - performed by
- sim_config.
- (simHOSTBE, simBE): Delete, replaced by sim-endian flags.
- (sim_open): Move much of the initialization from here.
- (sim_load): To here. After the image has been loaded and
- endianness set.
- (sim_open): Move ColdReset from here.
- (sim_create_inferior): To here.
- (sim_open): Make FP check less dependant on host endianness.
-
- * Makefile.in (SIM_RUN_OBJS): Set to nrun.o - use new version or
- run.
- * interp.c (sim_set_callbacks): Delete.
-
- * interp.c (membank, membank_base, membank_size): Replace with
- STATE_MEMORY, STATE_MEM_SIZE, STATE_MEM_BASE.
- (sim_open): Remove call to callback->init. gdb/run do this.
-
- * interp.c: Update
-
- * sim-main.h (SIM_HAVE_FLATMEM): Define.
-
- * interp.c (big_endian_p): Delete, replaced by
- current_target_byte_order.
-
-Tue May 20 13:55:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * interp.c (host_read_long, host_read_word, host_swap_word,
- host_swap_long): Delete. Using common sim-endian.
- (sim_fetch_register, sim_store_register): Use H2T.
- (pipeline_ticks): Delete. Handled by sim-events.
- (sim_info): Update.
- (sim_engine_run): Update.
-
-Tue May 20 13:42:03 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * interp.c (sim_stop_reason): Move code determining simEXCEPTION
- reason from here.
- (SignalException): To here. Signal using sim_engine_halt.
- (sim_stop_reason): Delete, moved to common.
-
-Tue May 20 10:19:48 1997 Andrew Cagney <cagney@b2.cygnus.com>
-
- * interp.c (sim_open): Add callback argument.
- (sim_set_callbacks): Delete SIM_DESC argument.
- (sim_size): Ditto.
-
-Mon May 19 18:20:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * Makefile.in (SIM_OBJS): Add common modules.
-
- * interp.c (sim_set_callbacks): Also set SD callback.
- (set_endianness, xfer_*, swap_*): Delete.
- (host_read_word, host_read_long, host_swap_word, host_swap_long):
- Change to functions using sim-endian macros.
- (control_c, sim_stop): Delete, use common version.
- (simulate): Convert into.
- (sim_engine_run): This function.
- (sim_resume): Delete.
-
- * interp.c (simulation): New variable - the simulator object.
- (sim_kind): Delete global - merged into simulation.
- (sim_load): Cleanup. Move PC assignment from here.
- (sim_create_inferior): To here.
-
- * sim-main.h: New file.
- * interp.c (sim-main.h): Include.
-
-Thu Apr 24 00:39:51 1997 Doug Evans <dje@canuck.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Wed Apr 23 17:32:19 1997 Doug Evans <dje@canuck.cygnus.com>
-
- * tconfig.in (SIM_HAVE_BIENDIAN): Define.
-
-Mon Apr 21 17:16:13 1997 Gavin Koch <gavin@cygnus.com>
-
- * gencode.c (build_instruction): DIV instructions: check
- for division by zero and integer overflow before using
- host's division operation.
-
-Thu Apr 17 03:18:14 1997 Doug Evans <dje@canuck.cygnus.com>
-
- * Makefile.in (SIM_OBJS): Add sim-load.o.
- * interp.c: #include bfd.h.
- (target_byte_order): Delete.
- (sim_kind, myname, big_endian_p): New static locals.
- (sim_open): Set sim_kind, myname. Move call to set_endianness to
- after argument parsing. Recognize -E arg, set endianness accordingly.
- (sim_load): Return SIM_RC. New arg abfd. Call sim_load_file to
- load file into simulator. Set PC from bfd.
- (sim_create_inferior): Return SIM_RC. Delete arg start_address.
- (set_endianness): Use big_endian_p instead of target_byte_order.
-
-Wed Apr 16 17:55:37 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * interp.c (sim_size): Delete prototype - conflicts with
- definition in remote-sim.h. Correct definition.
-
-Mon Apr 7 15:45:02 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
- * config.in: Ditto.
-
-Wed Apr 2 15:06:28 1997 Doug Evans <dje@canuck.cygnus.com>
-
- * interp.c (sim_open): New arg `kind'.
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Wed Apr 2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Tue Mar 25 11:38:22 1997 Doug Evans <dje@canuck.cygnus.com>
-
- * interp.c (sim_open): Set optind to 0 before calling getopt.
-
-Wed Mar 19 01:14:00 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Mon Mar 17 10:52:59 1997 Gavin Koch <gavin@cetus.cygnus.com>
-
- * interp.c : Replace uses of pr_addr with pr_uword64
- where the bit length is always 64 independent of SIM_ADDR.
- (pr_uword64) : added.
-
-Mon Mar 17 15:10:07 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
-
- * configure: Re-generate.
-
-Fri Mar 14 10:34:11 1997 Michael Meissner <meissner@cygnus.com>
-
- * configure: Regenerate to track ../common/aclocal.m4 changes.
-
-Thu Mar 13 12:51:36 1997 Doug Evans <dje@canuck.cygnus.com>
-
- * interp.c (sim_open): New SIM_DESC result. Argument is now
- in argv form.
- (other sim_*): New SIM_DESC argument.
-
-Mon Feb 24 22:47:14 1997 Dawn Perchik <dawn@cygnus.com>
-
- * interp.c: Fix printing of addresses for non-64-bit targets.
- (pr_addr): Add function to print address based on size.
-
-Wed Feb 19 14:42:09 1997 Mark Alexander <marka@cygnus.com>
-
- * interp.c (simopen): Add support for LSI MiniRISC PMON vectors.
-
-Thu Feb 13 14:08:30 1997 Ian Lance Taylor <ian@cygnus.com>
-
- * gencode.c (build_mips16_operands): Correct computation of base
- address for extended PC relative instruction.
-
-Thu Feb 6 17:16:15 1997 Ian Lance Taylor <ian@cygnus.com>
-
- * interp.c (mips16_entry): Add support for floating point cases.
- (SignalException): Pass floating point cases to mips16_entry.
- (ValueFPR): Don't restrict fmt_single and fmt_word to even
- registers.
- (StoreFPR): Likewise. Also, don't clobber fpr + 1 for fmt_single
- or fmt_word.
- (COP_LW): Pass fmt_word rather than fmt_uninterpreted to StoreFPR,
- and then set the state to fmt_uninterpreted.
- (COP_SW): Temporarily set the state to fmt_word while calling
- ValueFPR.
-
-Tue Feb 4 16:48:25 1997 Ian Lance Taylor <ian@cygnus.com>
-
- * gencode.c (build_instruction): The high order may be set in the
- comparison flags at any ISA level, not just ISA 4.
-
-Tue Feb 4 13:33:30 1997 Doug Evans <dje@canuck.cygnus.com>
-
- * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
- COMMON_{PRE,POST}_CONFIG_FRAG instead.
- * configure.in: sinclude ../common/aclocal.m4.
- * configure: Regenerated.
-
-Fri Jan 31 11:11:45 1997 Ian Lance Taylor <ian@cygnus.com>
-
- * configure: Rebuild after change to aclocal.m4.
-
-Thu Jan 23 11:46:23 1997 Stu Grossman (grossman@critters.cygnus.com)
-
- * configure configure.in Makefile.in: Update to new configure
- scheme which is more compatible with WinGDB builds.
- * configure.in: Improve comment on how to run autoconf.
- * configure: Re-run autoconf to get new ../common/aclocal.m4.
- * Makefile.in: Use autoconf substitution to install common
- makefile fragment.
-
-Wed Jan 8 12:39:03 1997 Jim Wilson <wilson@cygnus.com>
-
- * gencode.c (build_instruction): Use BigEndianCPU instead of
- ByteSwapMem.
-
-Thu Jan 02 22:23:04 1997 Mark Alexander <marka@cygnus.com>
-
- * interp.c (sim_monitor): Make output to stdout visible in
- wingdb's I/O log window.
-
-Tue Dec 31 07:04:00 1996 Mark Alexander <marka@cygnus.com>
-
- * support.h: Undo previous change to SIGTRAP
- and SIGQUIT values.
-
-Mon Dec 30 17:36:06 1996 Ian Lance Taylor <ian@cygnus.com>
-
- * interp.c (store_word, load_word): New static functions.
- (mips16_entry): New static function.
- (SignalException): Look for mips16 entry and exit instructions.
- (simulate): Use the correct index when setting fpr_state after
- doing a pending move.
-
-Sun Dec 29 09:37:18 1996 Mark Alexander <marka@cygnus.com>
-
- * interp.c: Fix byte-swapping code throughout to work on
- both little- and big-endian hosts.
-
-Sun Dec 29 09:18:32 1996 Mark Alexander <marka@cygnus.com>
-
- * support.h: Make definitions of SIGTRAP and SIGQUIT consistent
- with gdb/config/i386/xm-windows.h.
-
-Fri Dec 27 22:48:51 1996 Mark Alexander <marka@cygnus.com>
-
- * gencode.c (build_instruction): Work around MSVC++ code gen bug
- that messes up arithmetic shifts.
-
-Fri Dec 20 11:04:05 1996 Stu Grossman (grossman@critters.cygnus.com)
-
- * support.h: Use _WIN32 instead of __WIN32__. Also add defs for
- SIGTRAP and SIGQUIT for _WIN32.
-
-Thu Dec 19 14:07:27 1996 Ian Lance Taylor <ian@cygnus.com>
-
- * gencode.c (build_instruction) [MUL]: Cast operands to word64, to
- force a 64 bit multiplication.
- (build_instruction) [OR]: In mips16 mode, don't do anything if the
- destination register is 0, since that is the default mips16 nop
- instruction.
-
-Mon Dec 16 14:59:38 1996 Ian Lance Taylor <ian@cygnus.com>
-
- * gencode.c (MIPS16_DECODE): SWRASP is I8, not RI.
- (build_endian_shift): Don't check proc64.
- (build_instruction): Always set memval to uword64. Cast op2 to
- uword64 when shifting it left in memory instructions. Always use
- the same code for stores--don't special case proc64.
-
- * gencode.c (build_mips16_operands): Fix base PC value for PC
- relative operands.
- (build_instruction): Call JALDELAYSLOT rather than DELAYSLOT for a
- jal instruction.
- * interp.c (simJALDELAYSLOT): Define.
- (JALDELAYSLOT): Define.
- (INDELAYSLOT, INJALDELAYSLOT): Define.
- (simulate): Clear simJALDELAYSLOT when simDELAYSLOT is cleared.
-
-Tue Dec 24 22:11:20 1996 Angela Marie Thomas (angela@cygnus.com)
-
- * interp.c (sim_open): add flush_cache as a PMON routine
- (sim_monitor): handle flush_cache by ignoring it
-
-Wed Dec 11 13:53:51 1996 Jim Wilson <wilson@cygnus.com>
-
- * gencode.c (build_instruction): Use !ByteSwapMem instead of
- BigEndianMem.
- * interp.c (CONFIG, config_EP_{mask,shift,D,DxxDxx, config_BE): Delete.
- (BigEndianMem): Rename to ByteSwapMem and change sense.
- (BigEndianCPU, sim_write, LoadMemory, StoreMemory): Change
- BigEndianMem references to !ByteSwapMem.
- (set_endianness): New function, with prototype.
- (sim_open): Call set_endianness.
- (sim_info): Use simBE instead of BigEndianMem.
- (xfer_direct_word, xfer_direct_long, swap_direct_word,
- swap_direct_long, xfer_big_word, xfer_big_long, xfer_little_word,
- xfer_little_long, swap_word, swap_long): Delete unnecessary MSC_VER
- ifdefs, keeping the prototype declaration.
- (swap_word): Rewrite correctly.
- (ColdReset): Delete references to CONFIG. Delete endianness related
- code; moved to set_endianness.
-
-Tue Dec 10 11:32:04 1996 Jim Wilson <wilson@cygnus.com>
-
- * gencode.c (build_instruction, case JUMP): Truncate PC to 32 bits.
- * interp.c (CHECKHILO): Define away.
- (simSIGINT): New macro.
- (membank_size): Increase from 1MB to 2MB.
- (control_c): New function.
- (sim_resume): Rename parameter signal to signal_number. Add local
- variable prev. Call signal before and after simulate.
- (sim_stop_reason): Add simSIGINT support.
- (sim_warning, sim_error, dotrace, SignalException): Define as stdarg
- functions always.
- (sim_warning): Delete call to SignalException. Do call printf_filtered
- if logfh is NULL.
- (AddressTranslation): Add #ifdef DEBUG around debugging message and
- a call to sim_warning.
-
-Wed Nov 27 11:53:50 1996 Ian Lance Taylor <ian@cygnus.com>
-
- * gencode.c (process_instructions): If ! proc64, skip DOUBLEWORD
- 16 bit instructions.
-
-Tue Nov 26 11:53:12 1996 Ian Lance Taylor <ian@cygnus.com>
-
- Add support for mips16 (16 bit MIPS implementation):
- * gencode.c (inst_type): Add mips16 instruction encoding types.
- (GETDATASIZEINSN): Define.
- (MIPS_DECODE): Add REG flag to dsllv, dsrav, and dsrlv. Add
- jalx. Add LEFT flag to mfhi and mflo. Add RIGHT flag to mthi and
- mtlo.
- (MIPS16_DECODE): New table, for mips16 instructions.
- (bitmap_val): New static function.
- (struct mips16_op): Define.
- (mips16_op_table): New table, for mips16 operands.
- (build_mips16_operands): New static function.
- (process_instructions): If PC is odd, decode a mips16
- instruction. Break out instruction handling into new
- build_instruction function.
- (build_instruction): New static function, broken out of
- process_instructions. Check modifiers rather than flags for SHIFT
- bit count and m[ft]{hi,lo} direction.
- (usage): Pass program name to fprintf.
- (main): Remove unused variable this_option_optind. Change
- ``*loptarg++'' to ``loptarg++''.
- (my_strtoul): Parenthesize && within ||.
- * interp.c (LoadMemory): Accept a halfword pAddr if vAddr is odd.
- (simulate): If PC is odd, fetch a 16 bit instruction, and
- increment PC by 2 rather than 4.
- * configure.in: Add case for mips16*-*-*.
- * configure: Rebuild.
-
-Fri Nov 22 08:49:36 1996 Mark Alexander <marka@cygnus.com>
-
- * interp.c: Allow -t to enable tracing in standalone simulator.
- Fix garbage output in trace file and error messages.
-
-Wed Nov 20 01:54:37 1996 Doug Evans <dje@canuck.cygnus.com>
-
- * Makefile.in: Delete stuff moved to ../common/Make-common.in.
- (SIM_{OBJS,EXTRA_CFLAGS,EXTRA_CLEAN}): Define.
- * configure.in: Simplify using macros in ../common/aclocal.m4.
- * configure: Regenerated.
- * tconfig.in: New file.
-
-Tue Nov 12 13:34:00 1996 Dawn Perchik <dawn@cygnus.com>
-
- * interp.c: Fix bugs in 64-bit port.
- Use ansi function declarations for msvc compiler.
- Initialize and test file pointer in trace code.
- Prevent duplicate definition of LAST_EMED_REGNUM.
-
-Tue Oct 15 11:07:06 1996 Mark Alexander <marka@cygnus.com>
-
- * interp.c (xfer_big_long): Prevent unwanted sign extension.
-
-Thu Sep 26 17:35:00 1996 James G. Smith <jsmith@cygnus.co.uk>
-
- * interp.c (SignalException): Check for explicit terminating
- breakpoint value.
- * gencode.c: Pass instruction value through SignalException()
- calls for Trap, Breakpoint and Syscall.
-
-Thu Sep 26 11:35:17 1996 James G. Smith <jsmith@cygnus.co.uk>
-
- * interp.c (SquareRoot): Add HAVE_SQRT check to ensure sqrt() is
- only used on those hosts that provide it.
- * configure.in: Add sqrt() to list of functions to be checked for.
- * config.in: Re-generated.
- * configure: Re-generated.
-
-Fri Sep 20 15:47:12 1996 Ian Lance Taylor <ian@cygnus.com>
-
- * gencode.c (process_instructions): Call build_endian_shift when
- expanding STORE RIGHT, to fix swr.
- * support.h (SIGNEXTEND): If the sign bit is not set, explicitly
- clear the high bits.
- * interp.c (Convert): Fix fmt_single to fmt_long to not truncate.
- Fix float to int conversions to produce signed values.
-
-Thu Sep 19 15:34:17 1996 Ian Lance Taylor <ian@cygnus.com>
-
- * gencode.c (MIPS_DECODE): Set UNSIGNED for multu instruction.
- (process_instructions): Correct handling of nor instruction.
- Correct shift count for 32 bit shift instructions. Correct sign
- extension for arithmetic shifts to not shift the number of bits in
- the type. Fix 64 bit multiply high word calculation. Fix 32 bit
- unsigned multiply. Fix ldxc1 and friends to use coprocessor 1.
- Fix madd.
- * interp.c (CHECKHILO): Don't set HIACCESS, LOACCESS, or HLPC.
- It's OK to have a mult follow a mult. What's not OK is to have a
- mult follow an mfhi.
- (Convert): Comment out incorrect rounding code.
-
-Mon Sep 16 11:38:16 1996 James G. Smith <jsmith@cygnus.co.uk>
-
- * interp.c (sim_monitor): Improved monitor printf
- simulation. Tidied up simulator warnings, and added "--log" option
- for directing warning message output.
- * gencode.c: Use sim_warning() rather than WARNING macro.
-
-Thu Aug 22 15:03:12 1996 Ian Lance Taylor <ian@cygnus.com>
-
- * Makefile.in (gencode): Depend upon gencode.o, getopt.o, and
- getopt1.o, rather than on gencode.c. Link objects together.
- Don't link against -liberty.
- (gencode.o, getopt.o, getopt1.o): New targets.
- * gencode.c: Include <ctype.h> and "ansidecl.h".
- (AND): Undefine after including "ansidecl.h".
- (ULONG_MAX): Define if not defined.
- (OP_*): Don't define macros; now defined in opcode/mips.h.
- (main): Call my_strtoul rather than strtoul.
- (my_strtoul): New static function.
-
-Wed Jul 17 18:12:38 1996 Stu Grossman (grossman@critters.cygnus.com)
-
- * gencode.c (process_instructions): Generate word64 and uword64
- instead of `long long' and `unsigned long long' data types.
- * interp.c: #include sysdep.h to get signals, and define default
- for SIGBUS.
- * (Convert): Work around for Visual-C++ compiler bug with type
- conversion.
- * support.h: Make things compile under Visual-C++ by using
- __int64 instead of `long long'. Change many refs to long long
- into word64/uword64 typedefs.
-
-Wed Jun 26 12:24:55 1996 Jason Molenda (crash@godzilla.cygnus.co.jp)
-
- * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
- INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
- (docdir): Removed.
- * configure.in (AC_PREREQ): autoconf 2.5 or higher.
- (AC_PROG_INSTALL): Added.
- (AC_PROG_CC): Moved to before configure.host call.
- * configure: Rebuilt.
-
-Wed Jun 5 08:28:13 1996 James G. Smith <jsmith@cygnus.co.uk>
-
- * configure.in: Define @SIMCONF@ depending on mips target.
- * configure: Rebuild.
- * Makefile.in (run): Add @SIMCONF@ to control simulator
- construction.
- * gencode.c: Change LOADDRMASK to 64bit memory model only.
- * interp.c: Remove some debugging, provide more detailed error
- messages, update memory accesses to use LOADDRMASK.
-
-Mon Jun 3 11:55:03 1996 Ian Lance Taylor <ian@cygnus.com>
-
- * configure.in: Add calls to AC_CONFIG_HEADER, AC_CHECK_HEADERS,
- AC_CHECK_LIB, and AC_CHECK_FUNCS. Change AC_OUTPUT to set
- stamp-h.
- * configure: Rebuild.
- * config.in: New file, generated by autoheader.
- * interp.c: Include "config.h". Include <stdlib.h>, <string.h>,
- and <strings.h> if they exist. Replace #ifdef sun with #ifdef
- HAVE_ANINT and HAVE_AINT, as appropriate.
- * Makefile.in (run): Use @LIBS@ rather than -lm.
- (interp.o): Depend upon config.h.
- (Makefile): Just rebuild Makefile.
- (clean): Remove stamp-h.
- (mostlyclean): Make the same as clean, not as distclean.
- (config.h, stamp-h): New targets.
-
-Fri May 10 00:41:17 1996 James G. Smith <jsmith@cygnus.co.uk>
-
- * interp.c (ColdReset): Fix boolean test. Make all simulator
- globals static.
-
-Wed May 8 15:12:58 1996 James G. Smith <jsmith@cygnus.co.uk>
-
- * interp.c (xfer_direct_word, xfer_direct_long,
- swap_direct_word, swap_direct_long, xfer_big_word,
- xfer_big_long, xfer_little_word, xfer_little_long,
- swap_word,swap_long): Added.
- * interp.c (ColdReset): Provide function indirection to
- host<->simulated_target transfer routines.
- * interp.c (sim_store_register, sim_fetch_register): Updated to
- make use of indirected transfer routines.
-
-Fri Apr 19 15:48:24 1996 James G. Smith <jsmith@cygnus.co.uk>
-
- * gencode.c (process_instructions): Ensure FP ABS instruction
- recognised.
- * interp.c (AbsoluteValue): Add routine. Also provide simple PMON
- system call support.
-
-Wed Apr 10 09:51:38 1996 James G. Smith <jsmith@cygnus.co.uk>
-
- * interp.c (sim_do_command): Complain if callback structure not
- initialised.
-
-Thu Mar 28 13:50:51 1996 James G. Smith <jsmith@cygnus.co.uk>
-
- * interp.c (Convert): Provide round-to-nearest and round-to-zero
- support for Sun hosts.
- * Makefile.in (gencode): Ensure the host compiler and libraries
- used for cross-hosted build.
-
-Wed Mar 27 14:42:12 1996 James G. Smith <jsmith@cygnus.co.uk>
-
- * interp.c, gencode.c: Some more (TODO) tidying.
-
-Thu Mar 7 11:19:33 1996 James G. Smith <jsmith@cygnus.co.uk>
-
- * gencode.c, interp.c: Replaced explicit long long references with
- WORD64HI, WORD64LO, SET64HI and SET64LO macro calls.
- * support.h (SET64LO, SET64HI): Macros added.
-
-Wed Feb 21 12:16:21 1996 Ian Lance Taylor <ian@cygnus.com>
-
- * configure: Regenerate with autoconf 2.7.
-
-Tue Jan 30 08:48:18 1996 Fred Fish <fnf@cygnus.com>
-
- * interp.c (LoadMemory): Enclose text following #endif in /* */.
- * support.h: Remove superfluous "1" from #if.
- * support.h (CHECKSIM): Remove stray 'a' at end of line.
-
-Mon Dec 4 11:44:40 1995 Jamie Smith <jsmith@cygnus.com>
-
- * interp.c (StoreFPR): Control UndefinedResult() call on
- WARN_RESULT manifest.
-
-Fri Dec 1 16:37:19 1995 James G. Smith <jsmith@cygnus.co.uk>
-
- * gencode.c: Tidied instruction decoding, and added FP instruction
- support.
-
- * interp.c: Added dineroIII, and BSD profiling support. Also
- run-time FP handling.
-
-Sun Oct 22 00:57:18 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
-
- * Changelog, Makefile.in, README.Cygnus, configure, configure.in,
- gencode.c, interp.c, support.h: created.
diff --git a/sim/mips/Makefile.in b/sim/mips/Makefile.in
deleted file mode 100644
index 98831755e36..00000000000
--- a/sim/mips/Makefile.in
+++ /dev/null
@@ -1,293 +0,0 @@
-# Makefile template for Configure for the MIPS simulator.
-# Written by Cygnus Support.
-
-## COMMON_PRE_CONFIG_FRAG
-
-srcdir=@srcdir@
-srcroot=$(srcdir)/../../
-
-# Object files created by various simulator generators.
-
-
-SIM_IGEN_OBJ = \
- support.o \
- itable.o \
- semantics.o \
- idecode.o \
- icache.o \
- @mips_igen_engine@ \
- irun.o \
-
-
-SIM_M16_OBJ = \
- m16_support.o \
- m16_semantics.o \
- m16_idecode.o \
- m16_icache.o \
- \
- m32_support.o \
- m32_semantics.o \
- m32_idecode.o \
- m32_icache.o \
- \
- itable.o \
- m16run.o \
-
-
-MIPS_EXTRA_OBJS = @mips_extra_objs@
-MIPS_EXTRA_LIBS = @mips_extra_libs@
-
-SIM_OBJS = \
- $(SIM_@sim_gen@_OBJ) \
- $(SIM_NEW_COMMON_OBJS) \
- $(MIPS_EXTRA_OBJS) \
- interp.o \
- sim-main.o \
- sim-hload.o \
- sim-engine.o \
- sim-stop.o \
- sim-resume.o \
- sim-reason.o \
-
-
-# List of flags to always pass to $(CC).
-SIM_SUBTARGET=@SIM_SUBTARGET@
-SIM_EXTRA_CFLAGS = $(SIM_SUBTARGET)
-
-SIM_EXTRA_CLEAN = clean-extra
-
-SIM_EXTRA_ALL = $(SIM_@sim_gen@_ALL)
-
-SIM_EXTRA_LIBS = $(MIPS_EXTRA_LIBS)
-
-# List of main object files for `run'.
-SIM_RUN_OBJS = nrun.o
-
-
-
-## COMMON_POST_CONFIG_FRAG
-
-interp.o: $(srcdir)/interp.c config.h sim-main.h itable.h
-
-
-../igen/igen:
- cd ../igen && $(MAKE)
-
-IGEN_TRACE= # -G omit-line-numbers # -G trace-rule-selection -G trace-rule-rejection -G trace-entries # -G trace-all
-IGEN_INSN=$(srcdir)/mips.igen
-IGEN_DC=$(srcdir)/mips.dc
-M16_DC=$(srcdir)/m16.dc
-IGEN_INCLUDE=\
- $(srcdir)/m16.igen \
- $(srcdir)/tx.igen \
- $(srcdir)/vr.igen \
-
-# NB: Since these can be built by a number of generators, care
-# must be taken to ensure that they are only dependant on
-# one of those generators.
-BUILT_SRC_FROM_GEN = \
- itable.h \
- itable.c \
-
-SIM_IGEN_ALL = tmp-igen
-SIM_M16_ALL = tmp-m16
-
-$(BUILT_SRC_FROM_GEN): $(SIM_@sim_gen@_ALL)
-
-
-
-BUILT_SRC_FROM_IGEN = \
- icache.h \
- icache.c \
- idecode.h \
- idecode.c \
- semantics.h \
- semantics.c \
- model.h \
- model.c \
- support.h \
- support.c \
- engine.h \
- engine.c \
- irun.c \
-
-$(BUILT_SRC_FROM_IGEN): tmp-igen
-
-tmp-igen: $(IGEN_INSN) $(IGEN_DC) ../igen/igen $(IGEN_INCLUDE)
- cd ../igen && $(MAKE)
- ../igen/igen \
- $(IGEN_TRACE) \
- -I $(srcdir) \
- -Werror \
- -Wnodiscard \
- @sim_igen_flags@ \
- -G gen-direct-access \
- -G gen-zero-r0 \
- -B 32 \
- -H 31 \
- -i $(IGEN_INSN) \
- -o $(IGEN_DC) \
- -x \
- -n icache.h -hc tmp-icache.h \
- -n icache.c -c tmp-icache.c \
- -n semantics.h -hs tmp-semantics.h \
- -n semantics.c -s tmp-semantics.c \
- -n idecode.h -hd tmp-idecode.h \
- -n idecode.c -d tmp-idecode.c \
- -n model.h -hm tmp-model.h \
- -n model.c -m tmp-model.c \
- -n support.h -hf tmp-support.h \
- -n support.c -f tmp-support.c \
- -n itable.h -ht tmp-itable.h \
- -n itable.c -t tmp-itable.c \
- -n engine.h -he tmp-engine.h \
- -n engine.c -e tmp-engine.c \
- -n irun.c -r tmp-irun.c
- $(srcdir)/../../move-if-change tmp-icache.h icache.h
- $(srcdir)/../../move-if-change tmp-icache.c icache.c
- $(srcdir)/../../move-if-change tmp-idecode.h idecode.h
- $(srcdir)/../../move-if-change tmp-idecode.c idecode.c
- $(srcdir)/../../move-if-change tmp-semantics.h semantics.h
- $(srcdir)/../../move-if-change tmp-semantics.c semantics.c
- $(srcdir)/../../move-if-change tmp-model.h model.h
- $(srcdir)/../../move-if-change tmp-model.c model.c
- $(srcdir)/../../move-if-change tmp-support.h support.h
- $(srcdir)/../../move-if-change tmp-support.c support.c
- $(srcdir)/../../move-if-change tmp-itable.h itable.h
- $(srcdir)/../../move-if-change tmp-itable.c itable.c
- $(srcdir)/../../move-if-change tmp-engine.h engine.h
- $(srcdir)/../../move-if-change tmp-engine.c engine.c
- $(srcdir)/../../move-if-change tmp-irun.c irun.c
- touch tmp-igen
-
-semantics.o: sim-main.h semantics.c $(SIM_EXTRA_DEPS)
-engine.o: sim-main.h engine.c $(SIM_EXTRA_DEPS)
-support.o: sim-main.h support.c $(SIM_EXTRA_DEPS)
-idecode.o: sim-main.h idecode.c $(SIM_EXTRA_DEPS)
-itable.o: sim-main.h itable.c $(SIM_EXTRA_DEPS)
-
-
-
-
-BUILT_SRC_FROM_M16 = \
- m16_icache.h \
- m16_icache.c \
- m16_idecode.h \
- m16_idecode.c \
- m16_semantics.h \
- m16_semantics.c \
- m16_model.h \
- m16_model.c \
- m16_support.h \
- m16_support.c \
- \
- m32_icache.h \
- m32_icache.c \
- m32_idecode.h \
- m32_idecode.c \
- m32_semantics.h \
- m32_semantics.c \
- m32_model.h \
- m32_model.c \
- m32_support.h \
- m32_support.c \
-
-$(BUILT_SRC_FROM_M16): tmp-m16
-
-tmp-m16: $(IGEN_INSN) $(IGEN_DC) ../igen/igen $(IGEN_INCLUDE)
- cd ../igen && $(MAKE)
- ../igen/igen \
- $(IGEN_TRACE) \
- -I $(srcdir) \
- -Werror \
- -Wnodiscard \
- @sim_m16_flags@ \
- -G gen-direct-access \
- -G gen-zero-r0 \
- -B 16 \
- -H 15 \
- -i $(IGEN_INSN) \
- -o $(M16_DC) \
- -P m16_ \
- -x \
- -n m16_icache.h -hc tmp-icache.h \
- -n m16_icache.c -c tmp-icache.c \
- -n m16_semantics.h -hs tmp-semantics.h \
- -n m16_semantics.c -s tmp-semantics.c \
- -n m16_idecode.h -hd tmp-idecode.h \
- -n m16_idecode.c -d tmp-idecode.c \
- -n m16_model.h -hm tmp-model.h \
- -n m16_model.c -m tmp-model.c \
- -n m16_support.h -hf tmp-support.h \
- -n m16_support.c -f tmp-support.c \
- #
- $(srcdir)/../../move-if-change tmp-icache.h m16_icache.h
- $(srcdir)/../../move-if-change tmp-icache.c m16_icache.c
- $(srcdir)/../../move-if-change tmp-idecode.h m16_idecode.h
- $(srcdir)/../../move-if-change tmp-idecode.c m16_idecode.c
- $(srcdir)/../../move-if-change tmp-semantics.h m16_semantics.h
- $(srcdir)/../../move-if-change tmp-semantics.c m16_semantics.c
- $(srcdir)/../../move-if-change tmp-model.h m16_model.h
- $(srcdir)/../../move-if-change tmp-model.c m16_model.c
- $(srcdir)/../../move-if-change tmp-support.h m16_support.h
- $(srcdir)/../../move-if-change tmp-support.c m16_support.c
- ../igen/igen \
- $(IGEN_TRACE) \
- -I $(srcdir) \
- -Werror \
- -Wnodiscard \
- @sim_igen_flags@ \
- -G gen-direct-access \
- -G gen-zero-r0 \
- -B 32 \
- -H 31 \
- -i $(IGEN_INSN) \
- -o $(IGEN_DC) \
- -P m32_ \
- -x \
- -n m32_icache.h -hc tmp-icache.h \
- -n m32_icache.c -c tmp-icache.c \
- -n m32_semantics.h -hs tmp-semantics.h \
- -n m32_semantics.c -s tmp-semantics.c \
- -n m32_idecode.h -hd tmp-idecode.h \
- -n m32_idecode.c -d tmp-idecode.c \
- -n m32_model.h -hm tmp-model.h \
- -n m32_model.c -m tmp-model.c \
- -n m32_support.h -hf tmp-support.h \
- -n m32_support.c -f tmp-support.c \
- #
- $(srcdir)/../../move-if-change tmp-icache.h m32_icache.h
- $(srcdir)/../../move-if-change tmp-icache.c m32_icache.c
- $(srcdir)/../../move-if-change tmp-idecode.h m32_idecode.h
- $(srcdir)/../../move-if-change tmp-idecode.c m32_idecode.c
- $(srcdir)/../../move-if-change tmp-semantics.h m32_semantics.h
- $(srcdir)/../../move-if-change tmp-semantics.c m32_semantics.c
- $(srcdir)/../../move-if-change tmp-model.h m32_model.h
- $(srcdir)/../../move-if-change tmp-model.c m32_model.c
- $(srcdir)/../../move-if-change tmp-support.h m32_support.h
- $(srcdir)/../../move-if-change tmp-support.c m32_support.c
- ../igen/igen \
- $(IGEN_TRACE) \
- -I $(srcdir) \
- -Werror \
- -Wnodiscard \
- -Wnowidth \
- @sim_igen_flags@ @sim_m16_flags@ \
- -G gen-direct-access \
- -G gen-zero-r0 \
- -i $(IGEN_INSN) \
- -n itable.h -ht tmp-itable.h \
- -n itable.c -t tmp-itable.c \
- #
- $(srcdir)/../../move-if-change tmp-itable.h itable.h
- $(srcdir)/../../move-if-change tmp-itable.c itable.c
- touch tmp-m16
-
-
-clean-extra:
- rm -f $(BUILT_SRC_FROM_GEN)
- rm -f $(BUILT_SRC_FROM_IGEN)
- rm -f $(BUILT_SRC_FROM_M16)
- rm -f tmp-*
- rm -f m16*.o m32*.o itable*.o
-
diff --git a/sim/mips/acconfig.h b/sim/mips/acconfig.h
deleted file mode 100644
index f9b87a10c60..00000000000
--- a/sim/mips/acconfig.h
+++ /dev/null
@@ -1,15 +0,0 @@
-
-/* Define to 1 if NLS is requested. */
-#undef ENABLE_NLS
-
-/* Define as 1 if you have catgets and don't want to use GNU gettext. */
-#undef HAVE_CATGETS
-
-/* Define as 1 if you have gettext and don't want to use GNU gettext. */
-#undef HAVE_GETTEXT
-
-/* Define as 1 if you have the stpcpy function. */
-#undef HAVE_STPCPY
-
-/* Define if your locale.h file contains LC_MESSAGES. */
-#undef HAVE_LC_MESSAGES
diff --git a/sim/mips/config.in b/sim/mips/config.in
deleted file mode 100644
index dbd6508d118..00000000000
--- a/sim/mips/config.in
+++ /dev/null
@@ -1,174 +0,0 @@
-/* config.in. Generated automatically from configure.in by autoheader. */
-
-/* Define if using alloca.c. */
-#undef C_ALLOCA
-
-/* Define to empty if the keyword does not work. */
-#undef const
-
-/* Define to one of _getb67, GETB67, getb67 for Cray-2 and Cray-YMP systems.
- This function is required for alloca.c support on those systems. */
-#undef CRAY_STACKSEG_END
-
-/* Define if you have alloca, as a function or macro. */
-#undef HAVE_ALLOCA
-
-/* Define if you have <alloca.h> and it should be used (not on Ultrix). */
-#undef HAVE_ALLOCA_H
-
-/* Define if you have a working `mmap' system call. */
-#undef HAVE_MMAP
-
-/* Define as __inline if that's what the C compiler calls it. */
-#undef inline
-
-/* Define to `long' if <sys/types.h> doesn't define. */
-#undef off_t
-
-/* Define if you need to in order for stat and other things to work. */
-#undef _POSIX_SOURCE
-
-/* Define as the return type of signal handlers (int or void). */
-#undef RETSIGTYPE
-
-/* Define to `unsigned' if <sys/types.h> doesn't define. */
-#undef size_t
-
-/* If using the C implementation of alloca, define if you know the
- direction of stack growth for your system; otherwise it will be
- automatically deduced at run-time.
- STACK_DIRECTION > 0 => grows toward higher addresses
- STACK_DIRECTION < 0 => grows toward lower addresses
- STACK_DIRECTION = 0 => direction of growth unknown
- */
-#undef STACK_DIRECTION
-
-/* Define if you have the ANSI C header files. */
-#undef STDC_HEADERS
-
-/* Define if your processor stores words with the most significant
- byte first (like Motorola and SPARC, unlike Intel and VAX). */
-#undef WORDS_BIGENDIAN
-
-/* Define to 1 if NLS is requested. */
-#undef ENABLE_NLS
-
-/* Define as 1 if you have gettext and don't want to use GNU gettext. */
-#undef HAVE_GETTEXT
-
-/* Define as 1 if you have the stpcpy function. */
-#undef HAVE_STPCPY
-
-/* Define if your locale.h file contains LC_MESSAGES. */
-#undef HAVE_LC_MESSAGES
-
-/* Define if you have the __argz_count function. */
-#undef HAVE___ARGZ_COUNT
-
-/* Define if you have the __argz_next function. */
-#undef HAVE___ARGZ_NEXT
-
-/* Define if you have the __argz_stringify function. */
-#undef HAVE___ARGZ_STRINGIFY
-
-/* Define if you have the __setfpucw function. */
-#undef HAVE___SETFPUCW
-
-/* Define if you have the aint function. */
-#undef HAVE_AINT
-
-/* Define if you have the anint function. */
-#undef HAVE_ANINT
-
-/* Define if you have the dcgettext function. */
-#undef HAVE_DCGETTEXT
-
-/* Define if you have the getcwd function. */
-#undef HAVE_GETCWD
-
-/* Define if you have the getpagesize function. */
-#undef HAVE_GETPAGESIZE
-
-/* Define if you have the getrusage function. */
-#undef HAVE_GETRUSAGE
-
-/* Define if you have the munmap function. */
-#undef HAVE_MUNMAP
-
-/* Define if you have the putenv function. */
-#undef HAVE_PUTENV
-
-/* Define if you have the setenv function. */
-#undef HAVE_SETENV
-
-/* Define if you have the setlocale function. */
-#undef HAVE_SETLOCALE
-
-/* Define if you have the sigaction function. */
-#undef HAVE_SIGACTION
-
-/* Define if you have the sqrt function. */
-#undef HAVE_SQRT
-
-/* Define if you have the stpcpy function. */
-#undef HAVE_STPCPY
-
-/* Define if you have the strcasecmp function. */
-#undef HAVE_STRCASECMP
-
-/* Define if you have the strchr function. */
-#undef HAVE_STRCHR
-
-/* Define if you have the time function. */
-#undef HAVE_TIME
-
-/* Define if you have the <argz.h> header file. */
-#undef HAVE_ARGZ_H
-
-/* Define if you have the <fcntl.h> header file. */
-#undef HAVE_FCNTL_H
-
-/* Define if you have the <fpu_control.h> header file. */
-#undef HAVE_FPU_CONTROL_H
-
-/* Define if you have the <limits.h> header file. */
-#undef HAVE_LIMITS_H
-
-/* Define if you have the <locale.h> header file. */
-#undef HAVE_LOCALE_H
-
-/* Define if you have the <malloc.h> header file. */
-#undef HAVE_MALLOC_H
-
-/* Define if you have the <nl_types.h> header file. */
-#undef HAVE_NL_TYPES_H
-
-/* Define if you have the <stdlib.h> header file. */
-#undef HAVE_STDLIB_H
-
-/* Define if you have the <string.h> header file. */
-#undef HAVE_STRING_H
-
-/* Define if you have the <strings.h> header file. */
-#undef HAVE_STRINGS_H
-
-/* Define if you have the <sys/param.h> header file. */
-#undef HAVE_SYS_PARAM_H
-
-/* Define if you have the <sys/resource.h> header file. */
-#undef HAVE_SYS_RESOURCE_H
-
-/* Define if you have the <sys/time.h> header file. */
-#undef HAVE_SYS_TIME_H
-
-/* Define if you have the <time.h> header file. */
-#undef HAVE_TIME_H
-
-/* Define if you have the <unistd.h> header file. */
-#undef HAVE_UNISTD_H
-
-/* Define if you have the <values.h> header file. */
-#undef HAVE_VALUES_H
-
-/* Define if you have the m library (-lm). */
-#undef HAVE_LIBM
diff --git a/sim/mips/configure b/sim/mips/configure
deleted file mode 100755
index 3b94005ca8d..00000000000
--- a/sim/mips/configure
+++ /dev/null
@@ -1,4988 +0,0 @@
-#! /bin/sh
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-sim_inline="-DDEFAULT_INLINE=0"
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-# This file is derived from `gettext.m4'. The difference is that the
-# included macros assume Cygnus-style source and build trees.
-
-# Macro to add for using GNU gettext.
-# Ulrich Drepper <drepper@cygnus.com>, 1995.
-#
-# This file file be copied and used freely without restrictions. It can
-# be used in projects which are not available under the GNU Public License
-# but which still want to provide support for the GNU gettext functionality.
-# Please note that the actual code is *not* freely available.
-
-# serial 3
-
-
-
-
-
-# Search path for a program which passes the given test.
-# Ulrich Drepper <drepper@cygnus.com>, 1996.
-#
-# This file file be copied and used freely without restrictions. It can
-# be used in projects which are not available under the GNU Public License
-# but which still want to provide support for the GNU gettext functionality.
-# Please note that the actual code is *not* freely available.
-
-# serial 1
-
-
-
-# Check whether LC_MESSAGES is available in <locale.h>.
-# Ulrich Drepper <drepper@cygnus.com>, 1995.
-#
-# This file file be copied and used freely without restrictions. It can
-# be used in projects which are not available under the GNU Public License
-# but which still want to provide support for the GNU gettext functionality.
-# Please note that the actual code is *not* freely available.
-
-# serial 1
-
-
-
-
-
-
-# Guess values for system-dependent variables and create Makefiles.
-# Generated automatically using autoconf version 2.13
-# Copyright (C) 1992, 93, 94, 95, 96 Free Software Foundation, Inc.
-#
-# This configure script is free software; the Free Software Foundation
-# gives unlimited permission to copy, distribute and modify it.
-
-# Defaults:
-ac_help=
-ac_default_prefix=/usr/local
-# Any additions from configure.in:
-ac_help="$ac_help
- --disable-nls do not use Native Language Support"
-ac_help="$ac_help
- --with-included-gettext use the GNU gettext library included here"
-ac_help="$ac_help
- --enable-maintainer-mode Enable developer functionality."
-ac_help="$ac_help
- --enable-sim-bswap Use Host specific BSWAP instruction."
-ac_help="$ac_help
- --enable-sim-cflags=opts Extra CFLAGS for use in building simulator"
-ac_help="$ac_help
- --enable-sim-debug=opts Enable debugging flags"
-ac_help="$ac_help
- --enable-sim-stdio Specify whether to use stdio for console input/output."
-ac_help="$ac_help
- --enable-sim-trace=opts Enable tracing flags"
-ac_help="$ac_help
- --enable-sim-profile=opts Enable profiling flags"
-ac_help="$ac_help
- --enable-sim-inline=inlines Specify which functions should be inlined."
-ac_help="$ac_help
- --enable-sim-alignment=align Specify strict, nonstrict or forced alignment of memory accesses."
-ac_help="$ac_help
- --enable-sim-hostendian=end Specify host byte endian orientation."
-ac_help="$ac_help
- --enable-build-warnings[=LIST] Enable build-time compiler warnings"
-ac_help="$ac_help
- --enable-sim-endian=endian Specify target byte endian orientation."
-ac_help="$ac_help
- --enable-sim-bitsize=N Specify target bitsize (32 or 64)."
-ac_help="$ac_help
- --enable-sim-float Specify that the target processor has floating point hardware."
-ac_help="$ac_help
- --enable-sim-smp=n Specify number of processors to configure for (default ${default_sim_smp})."
-ac_help="$ac_help
- --enable-sim-hardware=LIST Specify the hardware to be included in the build."
-ac_help="$ac_help
- --with-x use the X Window System"
-
-# Initialize some variables set by options.
-# The variables have the same names as the options, with
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-build=NONE
-cache_file=./config.cache
-exec_prefix=NONE
-host=NONE
-no_create=
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-no_recursion=
-prefix=NONE
-program_prefix=NONE
-program_suffix=NONE
-program_transform_name=s,x,x,
-silent=
-site=
-sitefile=
-srcdir=
-target=NONE
-verbose=
-x_includes=NONE
-x_libraries=NONE
-bindir='${exec_prefix}/bin'
-sbindir='${exec_prefix}/sbin'
-libexecdir='${exec_prefix}/libexec'
-datadir='${prefix}/share'
-sysconfdir='${prefix}/etc'
-sharedstatedir='${prefix}/com'
-localstatedir='${prefix}/var'
-libdir='${exec_prefix}/lib'
-includedir='${prefix}/include'
-oldincludedir='/usr/include'
-infodir='${prefix}/info'
-mandir='${prefix}/man'
-
-# Initialize some other variables.
-subdirs=
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-# Maximum number of lines to put in a shell here document.
-ac_max_here_lines=12
-
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- ;;
- *) cat >> confdefs.h <<EOF
-#define inline $ac_cv_c_inline
-EOF
- ;;
-esac
-
-echo $ac_n "checking for off_t""... $ac_c" 1>&6
-echo "configure:1046: checking for off_t" >&5
-if eval "test \"`echo '$''{'ac_cv_type_off_t'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1051 "configure"
-#include "confdefs.h"
-#include <sys/types.h>
-#if STDC_HEADERS
-#include <stdlib.h>
-#include <stddef.h>
-#endif
-EOF
-if (eval "$ac_cpp conftest.$ac_ext") 2>&5 |
- egrep "(^|[^a-zA-Z_0-9])off_t[^a-zA-Z_0-9]" >/dev/null 2>&1; then
- rm -rf conftest*
- ac_cv_type_off_t=yes
-else
- rm -rf conftest*
- ac_cv_type_off_t=no
-fi
-rm -f conftest*
-
-fi
-echo "$ac_t""$ac_cv_type_off_t" 1>&6
-if test $ac_cv_type_off_t = no; then
- cat >> confdefs.h <<\EOF
-#define off_t long
-EOF
-
-fi
-
-echo $ac_n "checking for size_t""... $ac_c" 1>&6
-echo "configure:1079: checking for size_t" >&5
-if eval "test \"`echo '$''{'ac_cv_type_size_t'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1084 "configure"
-#include "confdefs.h"
-#include <sys/types.h>
-#if STDC_HEADERS
-#include <stdlib.h>
-#include <stddef.h>
-#endif
-EOF
-if (eval "$ac_cpp conftest.$ac_ext") 2>&5 |
- egrep "(^|[^a-zA-Z_0-9])size_t[^a-zA-Z_0-9]" >/dev/null 2>&1; then
- rm -rf conftest*
- ac_cv_type_size_t=yes
-else
- rm -rf conftest*
- ac_cv_type_size_t=no
-fi
-rm -f conftest*
-
-fi
-echo "$ac_t""$ac_cv_type_size_t" 1>&6
-if test $ac_cv_type_size_t = no; then
- cat >> confdefs.h <<\EOF
-#define size_t unsigned
-EOF
-
-fi
-
-# The Ultrix 4.2 mips builtin alloca declared by alloca.h only works
-# for constant arguments. Useless!
-echo $ac_n "checking for working alloca.h""... $ac_c" 1>&6
-echo "configure:1114: checking for working alloca.h" >&5
-if eval "test \"`echo '$''{'ac_cv_header_alloca_h'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1119 "configure"
-#include "confdefs.h"
-#include <alloca.h>
-int main() {
-char *p = alloca(2 * sizeof(int));
-; return 0; }
-EOF
-if { (eval echo configure:1126: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- rm -rf conftest*
- ac_cv_header_alloca_h=yes
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- ac_cv_header_alloca_h=no
-fi
-rm -f conftest*
-fi
-
-echo "$ac_t""$ac_cv_header_alloca_h" 1>&6
-if test $ac_cv_header_alloca_h = yes; then
- cat >> confdefs.h <<\EOF
-#define HAVE_ALLOCA_H 1
-EOF
-
-fi
-
-echo $ac_n "checking for alloca""... $ac_c" 1>&6
-echo "configure:1147: checking for alloca" >&5
-if eval "test \"`echo '$''{'ac_cv_func_alloca_works'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1152 "configure"
-#include "confdefs.h"
-
-#ifdef __GNUC__
-# define alloca __builtin_alloca
-#else
-# ifdef _MSC_VER
-# include <malloc.h>
-# define alloca _alloca
-# else
-# if HAVE_ALLOCA_H
-# include <alloca.h>
-# else
-# ifdef _AIX
- #pragma alloca
-# else
-# ifndef alloca /* predefined by HP cc +Olibcalls */
-char *alloca ();
-# endif
-# endif
-# endif
-# endif
-#endif
-
-int main() {
-char *p = (char *) alloca(1);
-; return 0; }
-EOF
-if { (eval echo configure:1180: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- rm -rf conftest*
- ac_cv_func_alloca_works=yes
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- ac_cv_func_alloca_works=no
-fi
-rm -f conftest*
-fi
-
-echo "$ac_t""$ac_cv_func_alloca_works" 1>&6
-if test $ac_cv_func_alloca_works = yes; then
- cat >> confdefs.h <<\EOF
-#define HAVE_ALLOCA 1
-EOF
-
-fi
-
-if test $ac_cv_func_alloca_works = no; then
- # The SVR3 libPW and SVR4 libucb both contain incompatible functions
- # that cause trouble. Some versions do not even contain alloca or
- # contain a buggy version. If you still want to use their alloca,
- # use ar to extract alloca.o from them instead of compiling alloca.c.
- ALLOCA=alloca.${ac_objext}
- cat >> confdefs.h <<\EOF
-#define C_ALLOCA 1
-EOF
-
-
-echo $ac_n "checking whether alloca needs Cray hooks""... $ac_c" 1>&6
-echo "configure:1212: checking whether alloca needs Cray hooks" >&5
-if eval "test \"`echo '$''{'ac_cv_os_cray'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1217 "configure"
-#include "confdefs.h"
-#if defined(CRAY) && ! defined(CRAY2)
-webecray
-#else
-wenotbecray
-#endif
-
-EOF
-if (eval "$ac_cpp conftest.$ac_ext") 2>&5 |
- egrep "webecray" >/dev/null 2>&1; then
- rm -rf conftest*
- ac_cv_os_cray=yes
-else
- rm -rf conftest*
- ac_cv_os_cray=no
-fi
-rm -f conftest*
-
-fi
-
-echo "$ac_t""$ac_cv_os_cray" 1>&6
-if test $ac_cv_os_cray = yes; then
-for ac_func in _getb67 GETB67 getb67; do
- echo $ac_n "checking for $ac_func""... $ac_c" 1>&6
-echo "configure:1242: checking for $ac_func" >&5
-if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1247 "configure"
-#include "confdefs.h"
-/* System header to define __stub macros and hopefully few prototypes,
- which can conflict with char $ac_func(); below. */
-#include <assert.h>
-/* Override any gcc2 internal prototype to avoid an error. */
-/* We use char because int might match the return type of a gcc2
- builtin and then its argument prototype would still apply. */
-char $ac_func();
-
-int main() {
-
-/* The GNU C library defines this for functions which it implements
- to always fail with ENOSYS. Some functions are actually named
- something starting with __ and the normal name is an alias. */
-#if defined (__stub_$ac_func) || defined (__stub___$ac_func)
-choke me
-#else
-$ac_func();
-#endif
-
-; return 0; }
-EOF
-if { (eval echo configure:1270: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=yes"
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=no"
-fi
-rm -f conftest*
-fi
-
-if eval "test \"`echo '$ac_cv_func_'$ac_func`\" = yes"; then
- echo "$ac_t""yes" 1>&6
- cat >> confdefs.h <<EOF
-#define CRAY_STACKSEG_END $ac_func
-EOF
-
- break
-else
- echo "$ac_t""no" 1>&6
-fi
-
-done
-fi
-
-echo $ac_n "checking stack direction for C alloca""... $ac_c" 1>&6
-echo "configure:1297: checking stack direction for C alloca" >&5
-if eval "test \"`echo '$''{'ac_cv_c_stack_direction'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- if test "$cross_compiling" = yes; then
- ac_cv_c_stack_direction=0
-else
- cat > conftest.$ac_ext <<EOF
-#line 1305 "configure"
-#include "confdefs.h"
-find_stack_direction ()
-{
- static char *addr = 0;
- auto char dummy;
- if (addr == 0)
- {
- addr = &dummy;
- return find_stack_direction ();
- }
- else
- return (&dummy > addr) ? 1 : -1;
-}
-main ()
-{
- exit (find_stack_direction() < 0);
-}
-EOF
-if { (eval echo configure:1324: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null
-then
- ac_cv_c_stack_direction=1
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -fr conftest*
- ac_cv_c_stack_direction=-1
-fi
-rm -fr conftest*
-fi
-
-fi
-
-echo "$ac_t""$ac_cv_c_stack_direction" 1>&6
-cat >> confdefs.h <<EOF
-#define STACK_DIRECTION $ac_cv_c_stack_direction
-EOF
-
-fi
-
-for ac_hdr in unistd.h
-do
-ac_safe=`echo "$ac_hdr" | sed 'y%./+-%__p_%'`
-echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6
-echo "configure:1349: checking for $ac_hdr" >&5
-if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1354 "configure"
-#include "confdefs.h"
-#include <$ac_hdr>
-EOF
-ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:1359: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
-ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
-if test -z "$ac_err"; then
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=yes"
-else
- echo "$ac_err" >&5
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=no"
-fi
-rm -f conftest*
-fi
-if eval "test \"`echo '$ac_cv_header_'$ac_safe`\" = yes"; then
- echo "$ac_t""yes" 1>&6
- ac_tr_hdr=HAVE_`echo $ac_hdr | sed 'y%abcdefghijklmnopqrstuvwxyz./-%ABCDEFGHIJKLMNOPQRSTUVWXYZ___%'`
- cat >> confdefs.h <<EOF
-#define $ac_tr_hdr 1
-EOF
-
-else
- echo "$ac_t""no" 1>&6
-fi
-done
-
-for ac_func in getpagesize
-do
-echo $ac_n "checking for $ac_func""... $ac_c" 1>&6
-echo "configure:1388: checking for $ac_func" >&5
-if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1393 "configure"
-#include "confdefs.h"
-/* System header to define __stub macros and hopefully few prototypes,
- which can conflict with char $ac_func(); below. */
-#include <assert.h>
-/* Override any gcc2 internal prototype to avoid an error. */
-/* We use char because int might match the return type of a gcc2
- builtin and then its argument prototype would still apply. */
-char $ac_func();
-
-int main() {
-
-/* The GNU C library defines this for functions which it implements
- to always fail with ENOSYS. Some functions are actually named
- something starting with __ and the normal name is an alias. */
-#if defined (__stub_$ac_func) || defined (__stub___$ac_func)
-choke me
-#else
-$ac_func();
-#endif
-
-; return 0; }
-EOF
-if { (eval echo configure:1416: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=yes"
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=no"
-fi
-rm -f conftest*
-fi
-
-if eval "test \"`echo '$ac_cv_func_'$ac_func`\" = yes"; then
- echo "$ac_t""yes" 1>&6
- ac_tr_func=HAVE_`echo $ac_func | tr 'abcdefghijklmnopqrstuvwxyz' 'ABCDEFGHIJKLMNOPQRSTUVWXYZ'`
- cat >> confdefs.h <<EOF
-#define $ac_tr_func 1
-EOF
-
-else
- echo "$ac_t""no" 1>&6
-fi
-done
-
-echo $ac_n "checking for working mmap""... $ac_c" 1>&6
-echo "configure:1441: checking for working mmap" >&5
-if eval "test \"`echo '$''{'ac_cv_func_mmap_fixed_mapped'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- if test "$cross_compiling" = yes; then
- ac_cv_func_mmap_fixed_mapped=no
-else
- cat > conftest.$ac_ext <<EOF
-#line 1449 "configure"
-#include "confdefs.h"
-
-/* Thanks to Mike Haertel and Jim Avera for this test.
- Here is a matrix of mmap possibilities:
- mmap private not fixed
- mmap private fixed at somewhere currently unmapped
- mmap private fixed at somewhere already mapped
- mmap shared not fixed
- mmap shared fixed at somewhere currently unmapped
- mmap shared fixed at somewhere already mapped
- For private mappings, we should verify that changes cannot be read()
- back from the file, nor mmap's back from the file at a different
- address. (There have been systems where private was not correctly
- implemented like the infamous i386 svr4.0, and systems where the
- VM page cache was not coherent with the filesystem buffer cache
- like early versions of FreeBSD and possibly contemporary NetBSD.)
- For shared mappings, we should conversely verify that changes get
- propogated back to all the places they're supposed to be.
-
- Grep wants private fixed already mapped.
- The main things grep needs to know about mmap are:
- * does it exist and is it safe to write into the mmap'd area
- * how to use it (BSD variants) */
-#include <sys/types.h>
-#include <fcntl.h>
-#include <sys/mman.h>
-
-/* This mess was copied from the GNU getpagesize.h. */
-#ifndef HAVE_GETPAGESIZE
-# ifdef HAVE_UNISTD_H
-# include <unistd.h>
-# endif
-
-/* Assume that all systems that can run configure have sys/param.h. */
-# ifndef HAVE_SYS_PARAM_H
-# define HAVE_SYS_PARAM_H 1
-# endif
-
-# ifdef _SC_PAGESIZE
-# define getpagesize() sysconf(_SC_PAGESIZE)
-# else /* no _SC_PAGESIZE */
-# ifdef HAVE_SYS_PARAM_H
-# include <sys/param.h>
-# ifdef EXEC_PAGESIZE
-# define getpagesize() EXEC_PAGESIZE
-# else /* no EXEC_PAGESIZE */
-# ifdef NBPG
-# define getpagesize() NBPG * CLSIZE
-# ifndef CLSIZE
-# define CLSIZE 1
-# endif /* no CLSIZE */
-# else /* no NBPG */
-# ifdef NBPC
-# define getpagesize() NBPC
-# else /* no NBPC */
-# ifdef PAGESIZE
-# define getpagesize() PAGESIZE
-# endif /* PAGESIZE */
-# endif /* no NBPC */
-# endif /* no NBPG */
-# endif /* no EXEC_PAGESIZE */
-# else /* no HAVE_SYS_PARAM_H */
-# define getpagesize() 8192 /* punt totally */
-# endif /* no HAVE_SYS_PARAM_H */
-# endif /* no _SC_PAGESIZE */
-
-#endif /* no HAVE_GETPAGESIZE */
-
-#ifdef __cplusplus
-extern "C" { void *malloc(unsigned); }
-#else
-char *malloc();
-#endif
-
-int
-main()
-{
- char *data, *data2, *data3;
- int i, pagesize;
- int fd;
-
- pagesize = getpagesize();
-
- /*
- * First, make a file with some known garbage in it.
- */
- data = malloc(pagesize);
- if (!data)
- exit(1);
- for (i = 0; i < pagesize; ++i)
- *(data + i) = rand();
- umask(0);
- fd = creat("conftestmmap", 0600);
- if (fd < 0)
- exit(1);
- if (write(fd, data, pagesize) != pagesize)
- exit(1);
- close(fd);
-
- /*
- * Next, try to mmap the file at a fixed address which
- * already has something else allocated at it. If we can,
- * also make sure that we see the same garbage.
- */
- fd = open("conftestmmap", O_RDWR);
- if (fd < 0)
- exit(1);
- data2 = malloc(2 * pagesize);
- if (!data2)
- exit(1);
- data2 += (pagesize - ((int) data2 & (pagesize - 1))) & (pagesize - 1);
- if (data2 != mmap(data2, pagesize, PROT_READ | PROT_WRITE,
- MAP_PRIVATE | MAP_FIXED, fd, 0L))
- exit(1);
- for (i = 0; i < pagesize; ++i)
- if (*(data + i) != *(data2 + i))
- exit(1);
-
- /*
- * Finally, make sure that changes to the mapped area
- * do not percolate back to the file as seen by read().
- * (This is a bug on some variants of i386 svr4.0.)
- */
- for (i = 0; i < pagesize; ++i)
- *(data2 + i) = *(data2 + i) + 1;
- data3 = malloc(pagesize);
- if (!data3)
- exit(1);
- if (read(fd, data3, pagesize) != pagesize)
- exit(1);
- for (i = 0; i < pagesize; ++i)
- if (*(data + i) != *(data3 + i))
- exit(1);
- close(fd);
- unlink("conftestmmap");
- exit(0);
-}
-
-EOF
-if { (eval echo configure:1589: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null
-then
- ac_cv_func_mmap_fixed_mapped=yes
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -fr conftest*
- ac_cv_func_mmap_fixed_mapped=no
-fi
-rm -fr conftest*
-fi
-
-fi
-
-echo "$ac_t""$ac_cv_func_mmap_fixed_mapped" 1>&6
-if test $ac_cv_func_mmap_fixed_mapped = yes; then
- cat >> confdefs.h <<\EOF
-#define HAVE_MMAP 1
-EOF
-
-fi
-
-echo $ac_n "checking for Cygwin environment""... $ac_c" 1>&6
-echo "configure:1612: checking for Cygwin environment" >&5
-if eval "test \"`echo '$''{'ac_cv_cygwin'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1617 "configure"
-#include "confdefs.h"
-
-int main() {
-
-#ifndef __CYGWIN__
-#define __CYGWIN__ __CYGWIN32__
-#endif
-return __CYGWIN__;
-; return 0; }
-EOF
-if { (eval echo configure:1628: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
- rm -rf conftest*
- ac_cv_cygwin=yes
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- ac_cv_cygwin=no
-fi
-rm -f conftest*
-rm -f conftest*
-fi
-
-echo "$ac_t""$ac_cv_cygwin" 1>&6
-CYGWIN=
-test "$ac_cv_cygwin" = yes && CYGWIN=yes
-echo $ac_n "checking for mingw32 environment""... $ac_c" 1>&6
-echo "configure:1645: checking for mingw32 environment" >&5
-if eval "test \"`echo '$''{'ac_cv_mingw32'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1650 "configure"
-#include "confdefs.h"
-
-int main() {
-return __MINGW32__;
-; return 0; }
-EOF
-if { (eval echo configure:1657: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
- rm -rf conftest*
- ac_cv_mingw32=yes
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- ac_cv_mingw32=no
-fi
-rm -f conftest*
-rm -f conftest*
-fi
-
-echo "$ac_t""$ac_cv_mingw32" 1>&6
-MINGW32=
-test "$ac_cv_mingw32" = yes && MINGW32=yes
-
-# autoconf.info says this should be called right after AC_INIT.
-
-
-ac_aux_dir=
-for ac_dir in `cd $srcdir;pwd`/../.. $srcdir/`cd $srcdir;pwd`/../..; do
- if test -f $ac_dir/install-sh; then
- ac_aux_dir=$ac_dir
- ac_install_sh="$ac_aux_dir/install-sh -c"
- break
- elif test -f $ac_dir/install.sh; then
- ac_aux_dir=$ac_dir
- ac_install_sh="$ac_aux_dir/install.sh -c"
- break
- fi
-done
-if test -z "$ac_aux_dir"; then
- { echo "configure: error: can not find install-sh or install.sh in `cd $srcdir;pwd`/../.. $srcdir/`cd $srcdir;pwd`/../.." 1>&2; exit 1; }
-fi
-ac_config_guess=$ac_aux_dir/config.guess
-ac_config_sub=$ac_aux_dir/config.sub
-ac_configure=$ac_aux_dir/configure # This should be Cygnus configure.
-
-
-# Do some error checking and defaulting for the host and target type.
-# The inputs are:
-# configure --host=HOST --target=TARGET --build=BUILD NONOPT
-#
-# The rules are:
-# 1. You are not allowed to specify --host, --target, and nonopt at the
-# same time.
-# 2. Host defaults to nonopt.
-# 3. If nonopt is not specified, then host defaults to the current host,
-# as determined by config.guess.
-# 4. Target and build default to nonopt.
-# 5. If nonopt is not specified, then target and build default to host.
-
-# The aliases save the names the user supplied, while $host etc.
-# will get canonicalized.
-case $host---$target---$nonopt in
-NONE---*---* | *---NONE---* | *---*---NONE) ;;
-*) { echo "configure: error: can only configure for one host and one target at a time" 1>&2; exit 1; } ;;
-esac
-
-
-# Make sure we can run config.sub.
-if ${CONFIG_SHELL-/bin/sh} $ac_config_sub sun4 >/dev/null 2>&1; then :
-else { echo "configure: error: can not run $ac_config_sub" 1>&2; exit 1; }
-fi
-
-echo $ac_n "checking host system type""... $ac_c" 1>&6
-echo "configure:1724: checking host system type" >&5
-
-host_alias=$host
-case "$host_alias" in
-NONE)
- case $nonopt in
- NONE)
- if host_alias=`${CONFIG_SHELL-/bin/sh} $ac_config_guess`; then :
- else { echo "configure: error: can not guess host type; you must specify one" 1>&2; exit 1; }
- fi ;;
- *) host_alias=$nonopt ;;
- esac ;;
-esac
-
-host=`${CONFIG_SHELL-/bin/sh} $ac_config_sub $host_alias`
-host_cpu=`echo $host | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\1/'`
-host_vendor=`echo $host | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\2/'`
-host_os=`echo $host | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\3/'`
-echo "$ac_t""$host" 1>&6
-
-echo $ac_n "checking target system type""... $ac_c" 1>&6
-echo "configure:1745: checking target system type" >&5
-
-target_alias=$target
-case "$target_alias" in
-NONE)
- case $nonopt in
- NONE) target_alias=$host_alias ;;
- *) target_alias=$nonopt ;;
- esac ;;
-esac
-
-target=`${CONFIG_SHELL-/bin/sh} $ac_config_sub $target_alias`
-target_cpu=`echo $target | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\1/'`
-target_vendor=`echo $target | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\2/'`
-target_os=`echo $target | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\3/'`
-echo "$ac_t""$target" 1>&6
-
-echo $ac_n "checking build system type""... $ac_c" 1>&6
-echo "configure:1763: checking build system type" >&5
-
-build_alias=$build
-case "$build_alias" in
-NONE)
- case $nonopt in
- NONE) build_alias=$host_alias ;;
- *) build_alias=$nonopt ;;
- esac ;;
-esac
-
-build=`${CONFIG_SHELL-/bin/sh} $ac_config_sub $build_alias`
-build_cpu=`echo $build | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\1/'`
-build_vendor=`echo $build | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\2/'`
-build_os=`echo $build | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\3/'`
-echo "$ac_t""$build" 1>&6
-
-test "$host_alias" != "$target_alias" &&
- test "$program_prefix$program_suffix$program_transform_name" = \
- NONENONEs,x,x, &&
- program_prefix=${target_alias}-
-
-if test "$program_transform_name" = s,x,x,; then
- program_transform_name=
-else
- # Double any \ or $. echo might interpret backslashes.
- cat <<\EOF_SED > conftestsed
-s,\\,\\\\,g; s,\$,$$,g
-EOF_SED
- program_transform_name="`echo $program_transform_name|sed -f conftestsed`"
- rm -f conftestsed
-fi
-test "$program_prefix" != NONE &&
- program_transform_name="s,^,${program_prefix},; $program_transform_name"
-# Use a double $ so make ignores it.
-test "$program_suffix" != NONE &&
- program_transform_name="s,\$\$,${program_suffix},; $program_transform_name"
-
-# sed with no file args requires a program.
-test "$program_transform_name" = "" && program_transform_name="s,x,x,"
-
-# Extract the first word of "gcc", so it can be a program name with args.
-set dummy gcc; ac_word=$2
-echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:1807: checking for $ac_word" >&5
-if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- if test -n "$CC"; then
- ac_cv_prog_CC="$CC" # Let the user override the test.
-else
- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
- ac_dummy="$PATH"
- for ac_dir in $ac_dummy; do
- test -z "$ac_dir" && ac_dir=.
- if test -f $ac_dir/$ac_word; then
- ac_cv_prog_CC="gcc"
- break
- fi
- done
- IFS="$ac_save_ifs"
-fi
-fi
-CC="$ac_cv_prog_CC"
-if test -n "$CC"; then
- echo "$ac_t""$CC" 1>&6
-else
- echo "$ac_t""no" 1>&6
-fi
-
-if test -z "$CC"; then
- # Extract the first word of "cc", so it can be a program name with args.
-set dummy cc; ac_word=$2
-echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:1837: checking for $ac_word" >&5
-if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- if test -n "$CC"; then
- ac_cv_prog_CC="$CC" # Let the user override the test.
-else
- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
- ac_prog_rejected=no
- ac_dummy="$PATH"
- for ac_dir in $ac_dummy; do
- test -z "$ac_dir" && ac_dir=.
- if test -f $ac_dir/$ac_word; then
- if test "$ac_dir/$ac_word" = "/usr/ucb/cc"; then
- ac_prog_rejected=yes
- continue
- fi
- ac_cv_prog_CC="cc"
- break
- fi
- done
- IFS="$ac_save_ifs"
-if test $ac_prog_rejected = yes; then
- # We found a bogon in the path, so make sure we never use it.
- set dummy $ac_cv_prog_CC
- shift
- if test $# -gt 0; then
- # We chose a different compiler from the bogus one.
- # However, it has the same basename, so the bogon will be chosen
- # first if we set CC to just the basename; use the full file name.
- shift
- set dummy "$ac_dir/$ac_word" "$@"
- shift
- ac_cv_prog_CC="$@"
- fi
-fi
-fi
-fi
-CC="$ac_cv_prog_CC"
-if test -n "$CC"; then
- echo "$ac_t""$CC" 1>&6
-else
- echo "$ac_t""no" 1>&6
-fi
-
- if test -z "$CC"; then
- case "`uname -s`" in
- *win32* | *WIN32*)
- # Extract the first word of "cl", so it can be a program name with args.
-set dummy cl; ac_word=$2
-echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:1888: checking for $ac_word" >&5
-if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- if test -n "$CC"; then
- ac_cv_prog_CC="$CC" # Let the user override the test.
-else
- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
- ac_dummy="$PATH"
- for ac_dir in $ac_dummy; do
- test -z "$ac_dir" && ac_dir=.
- if test -f $ac_dir/$ac_word; then
- ac_cv_prog_CC="cl"
- break
- fi
- done
- IFS="$ac_save_ifs"
-fi
-fi
-CC="$ac_cv_prog_CC"
-if test -n "$CC"; then
- echo "$ac_t""$CC" 1>&6
-else
- echo "$ac_t""no" 1>&6
-fi
- ;;
- esac
- fi
- test -z "$CC" && { echo "configure: error: no acceptable cc found in \$PATH" 1>&2; exit 1; }
-fi
-
-echo $ac_n "checking whether the C compiler ($CC $CFLAGS $LDFLAGS) works""... $ac_c" 1>&6
-echo "configure:1920: checking whether the C compiler ($CC $CFLAGS $LDFLAGS) works" >&5
-
-ac_ext=c
-# CFLAGS is not in ac_cpp because -g, -O, etc. are not valid cpp options.
-ac_cpp='$CPP $CPPFLAGS'
-ac_compile='${CC-cc} -c $CFLAGS $CPPFLAGS conftest.$ac_ext 1>&5'
-ac_link='${CC-cc} -o conftest${ac_exeext} $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS 1>&5'
-cross_compiling=$ac_cv_prog_cc_cross
-
-cat > conftest.$ac_ext << EOF
-
-#line 1931 "configure"
-#include "confdefs.h"
-
-main(){return(0);}
-EOF
-if { (eval echo configure:1936: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- ac_cv_prog_cc_works=yes
- # If we can't run a trivial program, we are probably using a cross compiler.
- if (./conftest; exit) 2>/dev/null; then
- ac_cv_prog_cc_cross=no
- else
- ac_cv_prog_cc_cross=yes
- fi
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- ac_cv_prog_cc_works=no
-fi
-rm -fr conftest*
-ac_ext=c
-# CFLAGS is not in ac_cpp because -g, -O, etc. are not valid cpp options.
-ac_cpp='$CPP $CPPFLAGS'
-ac_compile='${CC-cc} -c $CFLAGS $CPPFLAGS conftest.$ac_ext 1>&5'
-ac_link='${CC-cc} -o conftest${ac_exeext} $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS 1>&5'
-cross_compiling=$ac_cv_prog_cc_cross
-
-echo "$ac_t""$ac_cv_prog_cc_works" 1>&6
-if test $ac_cv_prog_cc_works = no; then
- { echo "configure: error: installation or configuration problem: C compiler cannot create executables." 1>&2; exit 1; }
-fi
-echo $ac_n "checking whether the C compiler ($CC $CFLAGS $LDFLAGS) is a cross-compiler""... $ac_c" 1>&6
-echo "configure:1962: checking whether the C compiler ($CC $CFLAGS $LDFLAGS) is a cross-compiler" >&5
-echo "$ac_t""$ac_cv_prog_cc_cross" 1>&6
-cross_compiling=$ac_cv_prog_cc_cross
-
-echo $ac_n "checking whether we are using GNU C""... $ac_c" 1>&6
-echo "configure:1967: checking whether we are using GNU C" >&5
-if eval "test \"`echo '$''{'ac_cv_prog_gcc'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.c <<EOF
-#ifdef __GNUC__
- yes;
-#endif
-EOF
-if { ac_try='${CC-cc} -E conftest.c'; { (eval echo configure:1976: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }; } | egrep yes >/dev/null 2>&1; then
- ac_cv_prog_gcc=yes
-else
- ac_cv_prog_gcc=no
-fi
-fi
-
-echo "$ac_t""$ac_cv_prog_gcc" 1>&6
-
-if test $ac_cv_prog_gcc = yes; then
- GCC=yes
-else
- GCC=
-fi
-
-ac_test_CFLAGS="${CFLAGS+set}"
-ac_save_CFLAGS="$CFLAGS"
-CFLAGS=
-echo $ac_n "checking whether ${CC-cc} accepts -g""... $ac_c" 1>&6
-echo "configure:1995: checking whether ${CC-cc} accepts -g" >&5
-if eval "test \"`echo '$''{'ac_cv_prog_cc_g'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- echo 'void f(){}' > conftest.c
-if test -z "`${CC-cc} -g -c conftest.c 2>&1`"; then
- ac_cv_prog_cc_g=yes
-else
- ac_cv_prog_cc_g=no
-fi
-rm -f conftest*
-
-fi
-
-echo "$ac_t""$ac_cv_prog_cc_g" 1>&6
-if test "$ac_test_CFLAGS" = set; then
- CFLAGS="$ac_save_CFLAGS"
-elif test $ac_cv_prog_cc_g = yes; then
- if test "$GCC" = yes; then
- CFLAGS="-g -O2"
- else
- CFLAGS="-g"
- fi
-else
- if test "$GCC" = yes; then
- CFLAGS="-O2"
- else
- CFLAGS=
- fi
-fi
-
-# Find a good install program. We prefer a C program (faster),
-# so one script is as good as another. But avoid the broken or
-# incompatible versions:
-# SysV /etc/install, /usr/sbin/install
-# SunOS /usr/etc/install
-# IRIX /sbin/install
-# AIX /bin/install
-# AIX 4 /usr/bin/installbsd, which doesn't work without a -g flag
-# AFS /usr/afsws/bin/install, which mishandles nonexistent args
-# SVR4 /usr/ucb/install, which tries to use the nonexistent group "staff"
-# ./install, which can be erroneously created by make from ./install.sh.
-echo $ac_n "checking for a BSD compatible install""... $ac_c" 1>&6
-echo "configure:2038: checking for a BSD compatible install" >&5
-if test -z "$INSTALL"; then
-if eval "test \"`echo '$''{'ac_cv_path_install'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- IFS="${IFS= }"; ac_save_IFS="$IFS"; IFS=":"
- for ac_dir in $PATH; do
- # Account for people who put trailing slashes in PATH elements.
- case "$ac_dir/" in
- /|./|.//|/etc/*|/usr/sbin/*|/usr/etc/*|/sbin/*|/usr/afsws/bin/*|/usr/ucb/*) ;;
- *)
- # OSF1 and SCO ODT 3.0 have their own names for install.
- # Don't use installbsd from OSF since it installs stuff as root
- # by default.
- for ac_prog in ginstall scoinst install; do
- if test -f $ac_dir/$ac_prog; then
- if test $ac_prog = install &&
- grep dspmsg $ac_dir/$ac_prog >/dev/null 2>&1; then
- # AIX install. It has an incompatible calling convention.
- :
- else
- ac_cv_path_install="$ac_dir/$ac_prog -c"
- break 2
- fi
- fi
- done
- ;;
- esac
- done
- IFS="$ac_save_IFS"
-
-fi
- if test "${ac_cv_path_install+set}" = set; then
- INSTALL="$ac_cv_path_install"
- else
- # As a last resort, use the slow shell script. We don't cache a
- # path for INSTALL within a source directory, because that will
- # break other packages using the cache if that directory is
- # removed, or if the path is relative.
- INSTALL="$ac_install_sh"
- fi
-fi
-echo "$ac_t""$INSTALL" 1>&6
-
-# Use test -z because SunOS4 sh mishandles braces in ${var-val}.
-# It thinks the first close brace ends the variable substitution.
-test -z "$INSTALL_PROGRAM" && INSTALL_PROGRAM='${INSTALL}'
-
-test -z "$INSTALL_SCRIPT" && INSTALL_SCRIPT='${INSTALL_PROGRAM}'
-
-test -z "$INSTALL_DATA" && INSTALL_DATA='${INSTALL} -m 644'
-
-
-# Put a plausible default for CC_FOR_BUILD in Makefile.
-if test "x$cross_compiling" = "xno"; then
- CC_FOR_BUILD='$(CC)'
-else
- CC_FOR_BUILD=gcc
-fi
-
-
-
-
-AR=${AR-ar}
-
-# Extract the first word of "ranlib", so it can be a program name with args.
-set dummy ranlib; ac_word=$2
-echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:2106: checking for $ac_word" >&5
-if eval "test \"`echo '$''{'ac_cv_prog_RANLIB'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- if test -n "$RANLIB"; then
- ac_cv_prog_RANLIB="$RANLIB" # Let the user override the test.
-else
- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
- ac_dummy="$PATH"
- for ac_dir in $ac_dummy; do
- test -z "$ac_dir" && ac_dir=.
- if test -f $ac_dir/$ac_word; then
- ac_cv_prog_RANLIB="ranlib"
- break
- fi
- done
- IFS="$ac_save_ifs"
- test -z "$ac_cv_prog_RANLIB" && ac_cv_prog_RANLIB=":"
-fi
-fi
-RANLIB="$ac_cv_prog_RANLIB"
-if test -n "$RANLIB"; then
- echo "$ac_t""$RANLIB" 1>&6
-else
- echo "$ac_t""no" 1>&6
-fi
-
-
-ALL_LINGUAS=
-
- for ac_hdr in argz.h limits.h locale.h nl_types.h malloc.h string.h \
-unistd.h values.h sys/param.h
-do
-ac_safe=`echo "$ac_hdr" | sed 'y%./+-%__p_%'`
-echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6
-echo "configure:2141: checking for $ac_hdr" >&5
-if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 2146 "configure"
-#include "confdefs.h"
-#include <$ac_hdr>
-EOF
-ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:2151: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
-ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
-if test -z "$ac_err"; then
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=yes"
-else
- echo "$ac_err" >&5
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=no"
-fi
-rm -f conftest*
-fi
-if eval "test \"`echo '$ac_cv_header_'$ac_safe`\" = yes"; then
- echo "$ac_t""yes" 1>&6
- ac_tr_hdr=HAVE_`echo $ac_hdr | sed 'y%abcdefghijklmnopqrstuvwxyz./-%ABCDEFGHIJKLMNOPQRSTUVWXYZ___%'`
- cat >> confdefs.h <<EOF
-#define $ac_tr_hdr 1
-EOF
-
-else
- echo "$ac_t""no" 1>&6
-fi
-done
-
- for ac_func in getcwd munmap putenv setenv setlocale strchr strcasecmp \
-__argz_count __argz_stringify __argz_next
-do
-echo $ac_n "checking for $ac_func""... $ac_c" 1>&6
-echo "configure:2181: checking for $ac_func" >&5
-if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 2186 "configure"
-#include "confdefs.h"
-/* System header to define __stub macros and hopefully few prototypes,
- which can conflict with char $ac_func(); below. */
-#include <assert.h>
-/* Override any gcc2 internal prototype to avoid an error. */
-/* We use char because int might match the return type of a gcc2
- builtin and then its argument prototype would still apply. */
-char $ac_func();
-
-int main() {
-
-/* The GNU C library defines this for functions which it implements
- to always fail with ENOSYS. Some functions are actually named
- something starting with __ and the normal name is an alias. */
-#if defined (__stub_$ac_func) || defined (__stub___$ac_func)
-choke me
-#else
-$ac_func();
-#endif
-
-; return 0; }
-EOF
-if { (eval echo configure:2209: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=yes"
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=no"
-fi
-rm -f conftest*
-fi
-
-if eval "test \"`echo '$ac_cv_func_'$ac_func`\" = yes"; then
- echo "$ac_t""yes" 1>&6
- ac_tr_func=HAVE_`echo $ac_func | tr 'abcdefghijklmnopqrstuvwxyz' 'ABCDEFGHIJKLMNOPQRSTUVWXYZ'`
- cat >> confdefs.h <<EOF
-#define $ac_tr_func 1
-EOF
-
-else
- echo "$ac_t""no" 1>&6
-fi
-done
-
-
- if test "${ac_cv_func_stpcpy+set}" != "set"; then
- for ac_func in stpcpy
-do
-echo $ac_n "checking for $ac_func""... $ac_c" 1>&6
-echo "configure:2238: checking for $ac_func" >&5
-if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 2243 "configure"
-#include "confdefs.h"
-/* System header to define __stub macros and hopefully few prototypes,
- which can conflict with char $ac_func(); below. */
-#include <assert.h>
-/* Override any gcc2 internal prototype to avoid an error. */
-/* We use char because int might match the return type of a gcc2
- builtin and then its argument prototype would still apply. */
-char $ac_func();
-
-int main() {
-
-/* The GNU C library defines this for functions which it implements
- to always fail with ENOSYS. Some functions are actually named
- something starting with __ and the normal name is an alias. */
-#if defined (__stub_$ac_func) || defined (__stub___$ac_func)
-choke me
-#else
-$ac_func();
-#endif
-
-; return 0; }
-EOF
-if { (eval echo configure:2266: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=yes"
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=no"
-fi
-rm -f conftest*
-fi
-
-if eval "test \"`echo '$ac_cv_func_'$ac_func`\" = yes"; then
- echo "$ac_t""yes" 1>&6
- ac_tr_func=HAVE_`echo $ac_func | tr 'abcdefghijklmnopqrstuvwxyz' 'ABCDEFGHIJKLMNOPQRSTUVWXYZ'`
- cat >> confdefs.h <<EOF
-#define $ac_tr_func 1
-EOF
-
-else
- echo "$ac_t""no" 1>&6
-fi
-done
-
- fi
- if test "${ac_cv_func_stpcpy}" = "yes"; then
- cat >> confdefs.h <<\EOF
-#define HAVE_STPCPY 1
-EOF
-
- fi
-
- if test $ac_cv_header_locale_h = yes; then
- echo $ac_n "checking for LC_MESSAGES""... $ac_c" 1>&6
-echo "configure:2300: checking for LC_MESSAGES" >&5
-if eval "test \"`echo '$''{'am_cv_val_LC_MESSAGES'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 2305 "configure"
-#include "confdefs.h"
-#include <locale.h>
-int main() {
-return LC_MESSAGES
-; return 0; }
-EOF
-if { (eval echo configure:2312: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- rm -rf conftest*
- am_cv_val_LC_MESSAGES=yes
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- am_cv_val_LC_MESSAGES=no
-fi
-rm -f conftest*
-fi
-
-echo "$ac_t""$am_cv_val_LC_MESSAGES" 1>&6
- if test $am_cv_val_LC_MESSAGES = yes; then
- cat >> confdefs.h <<\EOF
-#define HAVE_LC_MESSAGES 1
-EOF
-
- fi
- fi
- echo $ac_n "checking whether NLS is requested""... $ac_c" 1>&6
-echo "configure:2333: checking whether NLS is requested" >&5
- # Check whether --enable-nls or --disable-nls was given.
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-
- echo "$ac_t""$USE_NLS" 1>&6
-
-
- USE_INCLUDED_LIBINTL=no
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-
- echo $ac_n "checking whether included gettext is requested""... $ac_c" 1>&6
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-
- echo "$ac_t""$nls_cv_force_use_gnu_gettext" 1>&6
-
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-
- ac_safe=`echo "libintl.h" | sed 'y%./+-%__p_%'`
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-else
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- echo $ac_n "checking for gettext in libc""... $ac_c" 1>&6
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-else
- cat > conftest.$ac_ext <<EOF
-#line 2404 "configure"
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-EOF
-if { (eval echo configure:2411: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
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- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- gt_cv_func_gettext_libc=no
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-rm -f conftest*
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-
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-
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-echo "configure:2427: checking for bindtextdomain in -lintl" >&5
-ac_lib_var=`echo intl'_'bindtextdomain | sed 'y%./+-%__p_%'`
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-else
- ac_save_LIBS="$LIBS"
-LIBS="-lintl $LIBS"
-cat > conftest.$ac_ext <<EOF
-#line 2435 "configure"
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-/* Override any gcc2 internal prototype to avoid an error. */
-/* We use char because int might match the return type of a gcc2
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-
-int main() {
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-if { (eval echo configure:2446: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
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- echo "configure: failed program was:" >&5
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-else
- cat > conftest.$ac_ext <<EOF
-#line 2467 "configure"
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-if { (eval echo configure:2474: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
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- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
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-
-echo "$ac_t""$gt_cv_func_gettext_libintl" 1>&6
-else
- echo "$ac_t""no" 1>&6
-fi
-
- fi
-
- if test "$gt_cv_func_gettext_libc" = "yes" \
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-EOF
-
- # Extract the first word of "msgfmt", so it can be a program name with args.
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-else
- case "$MSGFMT" in
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- ac_cv_path_MSGFMT="$MSGFMT" # Let the user override the test with a path.
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- *)
- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS="${IFS}:"
- for ac_dir in $PATH; do
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- if test -f $ac_dir/$ac_word; then
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- break
- fi
- fi
- done
- IFS="$ac_save_ifs"
- test -z "$ac_cv_path_MSGFMT" && ac_cv_path_MSGFMT="no"
- ;;
-esac
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-MSGFMT="$ac_cv_path_MSGFMT"
-if test -n "$MSGFMT"; then
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-else
- echo "$ac_t""no" 1>&6
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- if test "$MSGFMT" != "no"; then
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-echo $ac_n "checking for $ac_func""... $ac_c" 1>&6
-echo "configure:2536: checking for $ac_func" >&5
-if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 2541 "configure"
-#include "confdefs.h"
-/* System header to define __stub macros and hopefully few prototypes,
- which can conflict with char $ac_func(); below. */
-#include <assert.h>
-/* Override any gcc2 internal prototype to avoid an error. */
-/* We use char because int might match the return type of a gcc2
- builtin and then its argument prototype would still apply. */
-char $ac_func();
-
-int main() {
-
-/* The GNU C library defines this for functions which it implements
- to always fail with ENOSYS. Some functions are actually named
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-choke me
-#else
-$ac_func();
-#endif
-
-; return 0; }
-EOF
-if { (eval echo configure:2564: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=yes"
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=no"
-fi
-rm -f conftest*
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-
-if eval "test \"`echo '$ac_cv_func_'$ac_func`\" = yes"; then
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- ac_tr_func=HAVE_`echo $ac_func | tr 'abcdefghijklmnopqrstuvwxyz' 'ABCDEFGHIJKLMNOPQRSTUVWXYZ'`
- cat >> confdefs.h <<EOF
-#define $ac_tr_func 1
-EOF
-
-else
- echo "$ac_t""no" 1>&6
-fi
-done
-
- # Extract the first word of "gmsgfmt", so it can be a program name with args.
-set dummy gmsgfmt; ac_word=$2
-echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:2591: checking for $ac_word" >&5
-if eval "test \"`echo '$''{'ac_cv_path_GMSGFMT'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- case "$GMSGFMT" in
- /*)
- ac_cv_path_GMSGFMT="$GMSGFMT" # Let the user override the test with a path.
- ;;
- ?:/*)
- ac_cv_path_GMSGFMT="$GMSGFMT" # Let the user override the test with a dos path.
- ;;
- *)
- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
- ac_dummy="$PATH"
- for ac_dir in $ac_dummy; do
- test -z "$ac_dir" && ac_dir=.
- if test -f $ac_dir/$ac_word; then
- ac_cv_path_GMSGFMT="$ac_dir/$ac_word"
- break
- fi
- done
- IFS="$ac_save_ifs"
- test -z "$ac_cv_path_GMSGFMT" && ac_cv_path_GMSGFMT="$MSGFMT"
- ;;
-esac
-fi
-GMSGFMT="$ac_cv_path_GMSGFMT"
-if test -n "$GMSGFMT"; then
- echo "$ac_t""$GMSGFMT" 1>&6
-else
- echo "$ac_t""no" 1>&6
-fi
-
- # Extract the first word of "xgettext", so it can be a program name with args.
-set dummy xgettext; ac_word=$2
-echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:2627: checking for $ac_word" >&5
-if eval "test \"`echo '$''{'ac_cv_path_XGETTEXT'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- case "$XGETTEXT" in
- /*)
- ac_cv_path_XGETTEXT="$XGETTEXT" # Let the user override the test with a path.
- ;;
- *)
- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS="${IFS}:"
- for ac_dir in $PATH; do
- test -z "$ac_dir" && ac_dir=.
- if test -f $ac_dir/$ac_word; then
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- ac_cv_path_XGETTEXT="$ac_dir/$ac_word"
- break
- fi
- fi
- done
- IFS="$ac_save_ifs"
- test -z "$ac_cv_path_XGETTEXT" && ac_cv_path_XGETTEXT=":"
- ;;
-esac
-fi
-XGETTEXT="$ac_cv_path_XGETTEXT"
-if test -n "$XGETTEXT"; then
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-else
- echo "$ac_t""no" 1>&6
-fi
-
- cat > conftest.$ac_ext <<EOF
-#line 2659 "configure"
-#include "confdefs.h"
-
-int main() {
-extern int _nl_msg_cat_cntr;
- return _nl_msg_cat_cntr
-; return 0; }
-EOF
-if { (eval echo configure:2667: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- rm -rf conftest*
- CATOBJEXT=.gmo
- DATADIRNAME=share
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- CATOBJEXT=.mo
- DATADIRNAME=lib
-fi
-rm -f conftest*
- INSTOBJEXT=.mo
- fi
- fi
-
-else
- echo "$ac_t""no" 1>&6
-fi
-
-
-
- if test "$CATOBJEXT" = "NONE"; then
- nls_cv_use_gnu_gettext=yes
- fi
- fi
-
- if test "$nls_cv_use_gnu_gettext" = "yes"; then
- INTLOBJS="\$(GETTOBJS)"
- # Extract the first word of "msgfmt", so it can be a program name with args.
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-echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:2699: checking for $ac_word" >&5
-if eval "test \"`echo '$''{'ac_cv_path_MSGFMT'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- case "$MSGFMT" in
- /*)
- ac_cv_path_MSGFMT="$MSGFMT" # Let the user override the test with a path.
- ;;
- *)
- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS="${IFS}:"
- for ac_dir in $PATH; do
- test -z "$ac_dir" && ac_dir=.
- if test -f $ac_dir/$ac_word; then
- if test -z "`$ac_dir/$ac_word -h 2>&1 | grep 'dv '`"; then
- ac_cv_path_MSGFMT="$ac_dir/$ac_word"
- break
- fi
- fi
- done
- IFS="$ac_save_ifs"
- test -z "$ac_cv_path_MSGFMT" && ac_cv_path_MSGFMT="msgfmt"
- ;;
-esac
-fi
-MSGFMT="$ac_cv_path_MSGFMT"
-if test -n "$MSGFMT"; then
- echo "$ac_t""$MSGFMT" 1>&6
-else
- echo "$ac_t""no" 1>&6
-fi
-
- # Extract the first word of "gmsgfmt", so it can be a program name with args.
-set dummy gmsgfmt; ac_word=$2
-echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:2733: checking for $ac_word" >&5
-if eval "test \"`echo '$''{'ac_cv_path_GMSGFMT'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- case "$GMSGFMT" in
- /*)
- ac_cv_path_GMSGFMT="$GMSGFMT" # Let the user override the test with a path.
- ;;
- ?:/*)
- ac_cv_path_GMSGFMT="$GMSGFMT" # Let the user override the test with a dos path.
- ;;
- *)
- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
- ac_dummy="$PATH"
- for ac_dir in $ac_dummy; do
- test -z "$ac_dir" && ac_dir=.
- if test -f $ac_dir/$ac_word; then
- ac_cv_path_GMSGFMT="$ac_dir/$ac_word"
- break
- fi
- done
- IFS="$ac_save_ifs"
- test -z "$ac_cv_path_GMSGFMT" && ac_cv_path_GMSGFMT="$MSGFMT"
- ;;
-esac
-fi
-GMSGFMT="$ac_cv_path_GMSGFMT"
-if test -n "$GMSGFMT"; then
- echo "$ac_t""$GMSGFMT" 1>&6
-else
- echo "$ac_t""no" 1>&6
-fi
-
- # Extract the first word of "xgettext", so it can be a program name with args.
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-echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:2769: checking for $ac_word" >&5
-if eval "test \"`echo '$''{'ac_cv_path_XGETTEXT'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- case "$XGETTEXT" in
- /*)
- ac_cv_path_XGETTEXT="$XGETTEXT" # Let the user override the test with a path.
- ;;
- *)
- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS="${IFS}:"
- for ac_dir in $PATH; do
- test -z "$ac_dir" && ac_dir=.
- if test -f $ac_dir/$ac_word; then
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- ac_cv_path_XGETTEXT="$ac_dir/$ac_word"
- break
- fi
- fi
- done
- IFS="$ac_save_ifs"
- test -z "$ac_cv_path_XGETTEXT" && ac_cv_path_XGETTEXT=":"
- ;;
-esac
-fi
-XGETTEXT="$ac_cv_path_XGETTEXT"
-if test -n "$XGETTEXT"; then
- echo "$ac_t""$XGETTEXT" 1>&6
-else
- echo "$ac_t""no" 1>&6
-fi
-
-
- USE_INCLUDED_LIBINTL=yes
- CATOBJEXT=.gmo
- INSTOBJEXT=.mo
- DATADIRNAME=share
- INTLDEPS='$(top_builddir)/../intl/libintl.a'
- INTLLIBS=$INTLDEPS
- LIBS=`echo $LIBS | sed -e 's/-lintl//'`
- nls_cv_header_intl=libintl.h
- nls_cv_header_libgt=libgettext.h
- fi
-
- if test "$XGETTEXT" != ":"; then
- if $XGETTEXT --omit-header /dev/null 2> /dev/null; then
- : ;
- else
- echo "$ac_t""found xgettext programs is not GNU xgettext; ignore it" 1>&6
- XGETTEXT=":"
- fi
- fi
-
- # We need to process the po/ directory.
- POSUB=po
- else
- DATADIRNAME=share
- nls_cv_header_intl=libintl.h
- nls_cv_header_libgt=libgettext.h
- fi
-
- # If this is used in GNU gettext we have to set USE_NLS to `yes'
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- USE_INCLUDED_LIBINTL=yes
- fi
-
- for lang in $ALL_LINGUAS; do
- GMOFILES="$GMOFILES $lang.gmo"
- POFILES="$POFILES $lang.po"
- done
-
-
-
-
-
-
-
-
-
-
-
-
-
-
- if test "x$CATOBJEXT" != "x"; then
- if test "x$ALL_LINGUAS" = "x"; then
- LINGUAS=
- else
- echo $ac_n "checking for catalogs to be installed""... $ac_c" 1>&6
-echo "configure:2859: checking for catalogs to be installed" >&5
- NEW_LINGUAS=
- for lang in ${LINGUAS=$ALL_LINGUAS}; do
- case "$ALL_LINGUAS" in
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- esac
- done
- LINGUAS=$NEW_LINGUAS
- echo "$ac_t""$LINGUAS" 1>&6
- fi
-
- if test -n "$LINGUAS"; then
- for lang in $LINGUAS; do CATALOGS="$CATALOGS $lang$CATOBJEXT"; done
- fi
- fi
-
- if test $ac_cv_header_locale_h = yes; then
- INCLUDE_LOCALE_H="#include <locale.h>"
- else
- INCLUDE_LOCALE_H="\
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- fi
-
-
- if test -f $srcdir/po2tbl.sed.in; then
- if test "$CATOBJEXT" = ".cat"; then
- ac_safe=`echo "linux/version.h" | sed 'y%./+-%__p_%'`
-echo $ac_n "checking for linux/version.h""... $ac_c" 1>&6
-echo "configure:2887: checking for linux/version.h" >&5
-if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then
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-else
- cat > conftest.$ac_ext <<EOF
-#line 2892 "configure"
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-#include <linux/version.h>
-EOF
-ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:2897: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
-ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
-if test -z "$ac_err"; then
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=yes"
-else
- echo "$ac_err" >&5
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=no"
-fi
-rm -f conftest*
-fi
-if eval "test \"`echo '$ac_cv_header_'$ac_safe`\" = yes"; then
- echo "$ac_t""yes" 1>&6
- msgformat=linux
-else
- echo "$ac_t""no" 1>&6
-msgformat=xopen
-fi
-
-
- sed -e '/^#/d' $srcdir/$msgformat-msg.sed > po2msg.sed
- fi
- sed -e '/^#.*[^\\]$/d' -e '/^#$/d' \
- $srcdir/po2tbl.sed.in > po2tbl.sed
- fi
-
- if test "$PACKAGE" = "gettext"; then
- GT_NO="#NO#"
- GT_YES=
- else
- GT_NO=
- GT_YES="#YES#"
- fi
-
-
-
- MKINSTALLDIRS="\$(srcdir)/../../mkinstalldirs"
-
-
- l=
-
-
- if test -d $srcdir/po; then
- test -d po || mkdir po
- if test "x$srcdir" != "x."; then
- if test "x`echo $srcdir | sed 's@/.*@@'`" = "x"; then
- posrcprefix="$srcdir/"
- else
- posrcprefix="../$srcdir/"
- fi
- else
- posrcprefix="../"
- fi
- rm -f po/POTFILES
- sed -e "/^#/d" -e "/^\$/d" -e "s,.*, $posrcprefix& \\\\," -e "\$s/\(.*\) \\\\/\1/" \
- < $srcdir/po/POTFILES.in > po/POTFILES
- fi
-
-
-# Check for common headers.
-# FIXME: Seems to me this can cause problems for i386-windows hosts.
-# At one point there were hardcoded AC_DEFINE's if ${host} = i386-*-windows*.
-for ac_hdr in stdlib.h string.h strings.h unistd.h time.h
-do
-ac_safe=`echo "$ac_hdr" | sed 'y%./+-%__p_%'`
-echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6
-echo "configure:2966: checking for $ac_hdr" >&5
-if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 2971 "configure"
-#include "confdefs.h"
-#include <$ac_hdr>
-EOF
-ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:2976: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
-ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
-if test -z "$ac_err"; then
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=yes"
-else
- echo "$ac_err" >&5
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=no"
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-rm -f conftest*
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-if eval "test \"`echo '$ac_cv_header_'$ac_safe`\" = yes"; then
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- ac_tr_hdr=HAVE_`echo $ac_hdr | sed 'y%abcdefghijklmnopqrstuvwxyz./-%ABCDEFGHIJKLMNOPQRSTUVWXYZ___%'`
- cat >> confdefs.h <<EOF
-#define $ac_tr_hdr 1
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-
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- echo "$ac_t""no" 1>&6
-fi
-done
-
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-echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6
-echo "configure:3006: checking for $ac_hdr" >&5
-if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
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-ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:3016: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
-ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
-if test -z "$ac_err"; then
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=yes"
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- echo "$ac_err" >&5
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=no"
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-if eval "test \"`echo '$ac_cv_header_'$ac_safe`\" = yes"; then
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- ac_tr_hdr=HAVE_`echo $ac_hdr | sed 'y%abcdefghijklmnopqrstuvwxyz./-%ABCDEFGHIJKLMNOPQRSTUVWXYZ___%'`
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-
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-echo "configure:3046: checking for $ac_hdr" >&5
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- cat > conftest.$ac_ext <<EOF
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-ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:3056: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
-ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
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- eval "ac_cv_header_$ac_safe=yes"
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- echo "$ac_err" >&5
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
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- eval "ac_cv_header_$ac_safe=no"
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- ac_tr_hdr=HAVE_`echo $ac_hdr | sed 'y%abcdefghijklmnopqrstuvwxyz./-%ABCDEFGHIJKLMNOPQRSTUVWXYZ___%'`
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-
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- echo "$ac_t""no" 1>&6
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-echo "configure:3086: checking for $ac_hdr" >&5
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- echo $ac_n "(cached) $ac_c" 1>&6
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- cat > conftest.$ac_ext <<EOF
-#line 3091 "configure"
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-ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:3096: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
-ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
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- eval "ac_cv_header_$ac_safe=yes"
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- echo "$ac_err" >&5
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
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- eval "ac_cv_header_$ac_safe=no"
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-if eval "test \"`echo '$ac_cv_header_'$ac_safe`\" = yes"; then
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- ac_tr_hdr=HAVE_`echo $ac_hdr | sed 'y%abcdefghijklmnopqrstuvwxyz./-%ABCDEFGHIJKLMNOPQRSTUVWXYZ___%'`
- cat >> confdefs.h <<EOF
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-
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- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 3130 "configure"
-#include "confdefs.h"
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-/* We use char because int might match the return type of a gcc2
- builtin and then its argument prototype would still apply. */
-char $ac_func();
-
-int main() {
-
-/* The GNU C library defines this for functions which it implements
- to always fail with ENOSYS. Some functions are actually named
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-choke me
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-$ac_func();
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-; return 0; }
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-if { (eval echo configure:3153: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=yes"
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- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=no"
-fi
-rm -f conftest*
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-
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- ac_tr_func=HAVE_`echo $ac_func | tr 'abcdefghijklmnopqrstuvwxyz' 'ABCDEFGHIJKLMNOPQRSTUVWXYZ'`
- cat >> confdefs.h <<EOF
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-
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- echo "$ac_t""no" 1>&6
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-
-
-# Check for socket libraries
-echo $ac_n "checking for bind in -lsocket""... $ac_c" 1>&6
-echo "configure:3180: checking for bind in -lsocket" >&5
-ac_lib_var=`echo socket'_'bind | sed 'y%./+-%__p_%'`
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- ac_save_LIBS="$LIBS"
-LIBS="-lsocket $LIBS"
-cat > conftest.$ac_ext <<EOF
-#line 3188 "configure"
-#include "confdefs.h"
-/* Override any gcc2 internal prototype to avoid an error. */
-/* We use char because int might match the return type of a gcc2
- builtin and then its argument prototype would still apply. */
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-if { (eval echo configure:3199: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
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- eval "ac_cv_lib_$ac_lib_var=yes"
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- cat conftest.$ac_ext >&5
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-
-echo $ac_n "checking for gethostbyname in -lnsl""... $ac_c" 1>&6
-echo "configure:3227: checking for gethostbyname in -lnsl" >&5
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-#line 3235 "configure"
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-/* Override any gcc2 internal prototype to avoid an error. */
-/* We use char because int might match the return type of a gcc2
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-gethostbyname()
-; return 0; }
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-if { (eval echo configure:3246: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
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- eval "ac_cv_lib_$ac_lib_var=yes"
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- echo "configure: failed program was:" >&5
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-
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- ac_tr_lib=HAVE_LIB`echo nsl | sed -e 's/[^a-zA-Z0-9_]/_/g' \
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-
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-
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-
-
-. ${srcdir}/../../bfd/configure.host
-
-
-
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- MAINT="#"
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-
-
-
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- *) { echo "configure: error: "--enable-sim-bswap does not take a value"" 1>&2; exit 1; }; sim_bswap="";;
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-fi
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- sim_bswap=""
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-
-
-
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- case "${enableval}" in
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- trace) { echo "configure: error: "Please use --enable-sim-debug instead."" 1>&2; exit 1; }; sim_cflags="";;
- no) sim_cflags="";;
- *) sim_cflags=`echo "${enableval}" | sed -e "s/,/ /g"`;;
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-fi
-else
- sim_cflags=""
-fi
-
-
-
-# Check whether --enable-sim-debug or --disable-sim-debug was given.
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- case "${enableval}" in
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- no) sim_debug="-DDEBUG=0 -DWITH_DEBUG=0";;
- *) sim_debug="-DDEBUG='(${enableval})' -DWITH_DEBUG='(${enableval})'";;
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-if test x"$silent" != x"yes" && test x"$sim_debug" != x""; then
- echo "Setting sim debug = $sim_debug" 6>&1
-fi
-else
- sim_debug=""
-fi
-
-
-
-# Check whether --enable-sim-stdio or --disable-sim-stdio was given.
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- enableval="$enable_sim_stdio"
- case "${enableval}" in
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- no) sim_stdio="-DWITH_STDIO=DONT_USE_STDIO";;
- *) { echo "configure: error: "Unknown value $enableval passed to --enable-sim-stdio"" 1>&2; exit 1; }; sim_stdio="";;
-esac
-if test x"$silent" != x"yes" && test x"$sim_stdio" != x""; then
- echo "Setting stdio flags = $sim_stdio" 6>&1
-fi
-else
- sim_stdio=""
-fi
-
-
-
-# Check whether --enable-sim-trace or --disable-sim-trace was given.
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- case "${enableval}" in
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- no) sim_trace="-DTRACE=0 -DWITH_TRACE=0";;
- [-0-9]*)
- sim_trace="-DTRACE='(${enableval})' -DWITH_TRACE='(${enableval})'";;
- [a-z]*)
- sim_trace=""
- for x in `echo "$enableval" | sed -e "s/,/ /g"`; do
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- else
- sim_trace="${sim_trace}|TRACE_$x"
- fi
- done
- sim_trace="$sim_trace)'" ;;
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-fi
-else
- sim_trace=""
-fi
-
-
-
-# Check whether --enable-sim-profile or --disable-sim-profile was given.
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- case "${enableval}" in
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- no) sim_profile="-DPROFILE=0 -DWITH_PROFILE=0";;
- [-0-9]*)
- sim_profile="-DPROFILE='(${enableval})' -DWITH_PROFILE='(${enableval})'";;
- [a-z]*)
- sim_profile=""
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- else
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- fi
- done
- sim_profile="$sim_profile)'" ;;
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-fi
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- sim_profile="-DPROFILE=1 -DWITH_PROFILE=-1"
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-
-
-
-echo $ac_n "checking return type of signal handlers""... $ac_c" 1>&6
-echo "configure:3422: checking return type of signal handlers" >&5
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-else
- cat > conftest.$ac_ext <<EOF
-#line 3427 "configure"
-#include "confdefs.h"
-#include <sys/types.h>
-#include <signal.h>
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-#endif
-#ifdef __cplusplus
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-#endif
-
-int main() {
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-if { (eval echo configure:3444: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
- rm -rf conftest*
- ac_cv_type_signal=void
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- ac_cv_type_signal=int
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-rm -f conftest*
-fi
-
-echo "$ac_t""$ac_cv_type_signal" 1>&6
-cat >> confdefs.h <<EOF
-#define RETSIGTYPE $ac_cv_type_signal
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-
-
-
-
-
-echo $ac_n "checking for executable suffix""... $ac_c" 1>&6
-echo "configure:3466: checking for executable suffix" >&5
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-else
- if test "$CYGWIN" = yes || test "$MINGW32" = yes; then
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- echo 'int main () { return 0; }' > conftest.$ac_ext
- ac_cv_exeext=
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-
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-sim_link_files=
-sim_link_links=
-
-sim_link_links=tconfig.h
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- sim_link_files=tconfig.in
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-
-# targ-vals.def points to the libc macro description file.
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-
-
-
-
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- sim_inline=""
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- 0) sim_inline="-DDEFAULT_INLINE=0";;
- yes | 2) sim_inline="-DDEFAULT_INLINE=ALL_C_INLINE";;
- 1) sim_inline="-DDEFAULT_INLINE=INLINE_LOCALS";;
- *) for x in `echo "$enableval" | sed -e "s/,/ /g"`; do
- new_flag=""
- case "$x" in
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- *=*) new_flag=`echo "$x" | sed -e "s/=/_INLINE=/" -e "s/^/-D/"`;;
- *_INLINE) new_flag="-D$x=ALL_C_INLINE";;
- *) new_flag="-D$x""_INLINE=ALL_C_INLINE";;
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- sim_inline="$new_flag"
- else
- sim_inline="$sim_inline $new_flag"
- fi
- done;;
-esac
-if test x"$silent" != x"yes" && test x"$sim_inline" != x""; then
- echo "Setting inline flags = $sim_inline" 6>&1
-fi
-else
-
-if test "x$cross_compiling" = "xno"; then
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- sim_inline="${default_sim_inline}"
- if test x"$silent" != x"yes"; then
- echo "Setting inline flags = $sim_inline" 6>&1
- fi
- else
- sim_inline=""
- fi
-else
- sim_inline="-DDEFAULT_INLINE=0"
-fi
-fi
-
-wire_alignment="NONSTRICT_ALIGNMENT"
-default_alignment=""
-
-# Check whether --enable-sim-alignment or --disable-sim-alignment was given.
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- enableval="$enable_sim_alignment"
- case "${enableval}" in
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- nonstrict | NONSTRICT) sim_alignment="-DWITH_ALIGNMENT=NONSTRICT_ALIGNMENT";;
- forced | FORCED) sim_alignment="-DWITH_ALIGNMENT=FORCED_ALIGNMENT";;
- yes) if test x"$wire_alignment" != x; then
- sim_alignment="-DWITH_ALIGNMENT=${wire_alignment}"
- else
- if test x"$default_alignment" != x; then
- sim_alignment="-DWITH_ALIGNMENT=${default_alignment}"
- else
- echo "No hard-wired alignment for target $target" 1>&6
- sim_alignment="-DWITH_ALIGNMENT=0"
- fi
- fi;;
- no) if test x"$default_alignment" != x; then
- sim_alignment="-DWITH_DEFAULT_ALIGNMENT=${default_alignment}"
- else
- if test x"$wire_alignment" != x; then
- sim_alignment="-DWITH_DEFAULT_ALIGNMENT=${wire_alignment}"
- else
- echo "No default alignment for target $target" 1>&6
- sim_alignment="-DWITH_DEFAULT_ALIGNMENT=0"
- fi
- fi;;
- *) { echo "configure: error: "Unknown value $enableval passed to --enable-sim-alignment"" 1>&2; exit 1; }; sim_alignment="";;
-esac
-if test x"$silent" != x"yes" && test x"$sim_alignment" != x""; then
- echo "Setting alignment flags = $sim_alignment" 6>&1
-fi
-else
- if test x"$default_alignment" != x; then
- sim_alignment="-DWITH_DEFAULT_ALIGNMENT=${default_alignment}"
-else
- if test x"$wire_alignment" != x; then
- sim_alignment="-DWITH_ALIGNMENT=${wire_alignment}"
- else
- sim_alignment=
- fi
-fi
-fi
-
-
-# Check whether --enable-sim-hostendian or --disable-sim-hostendian was given.
-if test "${enable_sim_hostendian+set}" = set; then
- enableval="$enable_sim_hostendian"
- case "${enableval}" in
- no) sim_hostendian="-DWITH_HOST_BYTE_ORDER=0";;
- b*|B*) sim_hostendian="-DWITH_HOST_BYTE_ORDER=BIG_ENDIAN";;
- l*|L*) sim_hostendian="-DWITH_HOST_BYTE_ORDER=LITTLE_ENDIAN";;
- *) { echo "configure: error: "Unknown value $enableval for --enable-sim-hostendian"" 1>&2; exit 1; }; sim_hostendian="";;
-esac
-if test x"$silent" != x"yes" && test x"$sim_hostendian" != x""; then
- echo "Setting hostendian flags = $sim_hostendian" 6>&1
-fi
-else
-
-if test "x$cross_compiling" = "xno"; then
- echo $ac_n "checking whether byte ordering is bigendian""... $ac_c" 1>&6
-echo "configure:3626: checking whether byte ordering is bigendian" >&5
-if eval "test \"`echo '$''{'ac_cv_c_bigendian'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- ac_cv_c_bigendian=unknown
-# See if sys/param.h defines the BYTE_ORDER macro.
-cat > conftest.$ac_ext <<EOF
-#line 3633 "configure"
-#include "confdefs.h"
-#include <sys/types.h>
-#include <sys/param.h>
-int main() {
-
-#if !BYTE_ORDER || !BIG_ENDIAN || !LITTLE_ENDIAN
- bogus endian macros
-#endif
-; return 0; }
-EOF
-if { (eval echo configure:3644: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
- rm -rf conftest*
- # It does; now see whether it defined to BIG_ENDIAN or not.
-cat > conftest.$ac_ext <<EOF
-#line 3648 "configure"
-#include "confdefs.h"
-#include <sys/types.h>
-#include <sys/param.h>
-int main() {
-
-#if BYTE_ORDER != BIG_ENDIAN
- not big endian
-#endif
-; return 0; }
-EOF
-if { (eval echo configure:3659: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
- rm -rf conftest*
- ac_cv_c_bigendian=yes
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- ac_cv_c_bigendian=no
-fi
-rm -f conftest*
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
-fi
-rm -f conftest*
-if test $ac_cv_c_bigendian = unknown; then
-if test "$cross_compiling" = yes; then
- { echo "configure: error: can not run test program while cross compiling" 1>&2; exit 1; }
-else
- cat > conftest.$ac_ext <<EOF
-#line 3679 "configure"
-#include "confdefs.h"
-main () {
- /* Are we little or big endian? From Harbison&Steele. */
- union
- {
- long l;
- char c[sizeof (long)];
- } u;
- u.l = 1;
- exit (u.c[sizeof (long) - 1] == 1);
-}
-EOF
-if { (eval echo configure:3692: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null
-then
- ac_cv_c_bigendian=no
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -fr conftest*
- ac_cv_c_bigendian=yes
-fi
-rm -fr conftest*
-fi
-
-fi
-fi
-
-echo "$ac_t""$ac_cv_c_bigendian" 1>&6
-if test $ac_cv_c_bigendian = yes; then
- cat >> confdefs.h <<\EOF
-#define WORDS_BIGENDIAN 1
-EOF
-
-fi
-
- if test $ac_cv_c_bigendian = yes; then
- sim_hostendian="-DWITH_HOST_BYTE_ORDER=BIG_ENDIAN"
- else
- sim_hostendian="-DWITH_HOST_BYTE_ORDER=LITTLE_ENDIAN"
- fi
-else
- sim_hostendian="-DWITH_HOST_BYTE_ORDER=0"
-fi
-fi
-
-
-# Check whether --enable-build-warnings or --disable-build-warnings was given.
-if test "${enable_build_warnings+set}" = set; then
- enableval="$enable_build_warnings"
- build_warnings="-Wall -Wpointer-arith -Wstrict-prototypes -Wmissing-prototypes -Wmissing-declarations"
-case "${enableval}" in
- yes) ;;
- no) build_warnings="-w";;
- ,*) t=`echo "${enableval}" | sed -e "s/,/ /g"`
- build_warnings="${build_warnings} ${t}";;
- *,) t=`echo "${enableval}" | sed -e "s/,/ /g"`
- build_warnings="${t} ${build_warnings}";;
- *) build_warnings=`echo "${enableval}" | sed -e "s/,/ /g"`;;
-esac
-if test x"$silent" != x"yes" && test x"$build_warnings" != x""; then
- echo "Setting warning flags = $build_warnings" 6>&1
-fi
-WARN_CFLAGS=""
-WERROR_CFLAGS=""
-if test "x${build_warnings}" != x -a "x$GCC" = xyes
-then
- # Separate out the -Werror flag as some files just cannot be
- # compiled with it enabled.
- for w in ${build_warnings}; do
- case $w in
- -Werr*) WERROR_CFLAGS=-Werror ;;
- *) WARN_CFLAGS="${WARN_CFLAGS} $w"
- esac
- done
-fi
-else
- build_warnings=""
-fi
-
-
-# DEPRECATED
-#
-# Instead of defining a `subtarget' macro, code should be checking
-# the value of {STATE,CPU}_ARCHITECTURE to identify the architecture
-# in question.
-#
-case "${target}" in
- mips*tx39*) SIM_SUBTARGET="-DSUBTARGET_R3900=1";;
- *) SIM_SUBTARGET="";;
-esac
-
-
-
-
-#
-# Select the byte order of the target
-#
-mips_endian=
-default_endian=
-case "${target}" in
- mips64el*-*-*) mips_endian=LITTLE_ENDIAN ;;
- mips64vr*el-*-*) default_endian=LITTLE_ENDIAN ;;
- mips64*-*-*) default_endian=BIG_ENDIAN ;;
- mips16*-*-*) default_endian=BIG_ENDIAN ;;
- mips*-*-*) default_endian=BIG_ENDIAN ;;
- *) default_endian=BIG_ENDIAN ;;
-esac
-
-wire_endian="$mips_endian"
-default_endian="$default_endian"
-# Check whether --enable-sim-endian or --disable-sim-endian was given.
-if test "${enable_sim_endian+set}" = set; then
- enableval="$enable_sim_endian"
- case "${enableval}" in
- b*|B*) sim_endian="-DWITH_TARGET_BYTE_ORDER=BIG_ENDIAN";;
- l*|L*) sim_endian="-DWITH_TARGET_BYTE_ORDER=LITTLE_ENDIAN";;
- yes) if test x"$wire_endian" != x; then
- sim_endian="-DWITH_TARGET_BYTE_ORDER=${wire_endian}"
- else
- if test x"$default_endian" != x; then
- sim_endian="-DWITH_TARGET_BYTE_ORDER=${default_endian}"
- else
- echo "No hard-wired endian for target $target" 1>&6
- sim_endian="-DWITH_TARGET_BYTE_ORDER=0"
- fi
- fi;;
- no) if test x"$default_endian" != x; then
- sim_endian="-DWITH_DEFAULT_TARGET_BYTE_ORDER=${default_endian}"
- else
- if test x"$wire_endian" != x; then
- sim_endian="-DWITH_DEFAULT_TARGET_BYTE_ORDER=${wire_endian}"
- else
- echo "No default endian for target $target" 1>&6
- sim_endian="-DWITH_DEFAULT_TARGET_BYTE_ORDER=0"
- fi
- fi;;
- *) { echo "configure: error: "Unknown value $enableval for --enable-sim-endian"" 1>&2; exit 1; }; sim_endian="";;
-esac
-if test x"$silent" != x"yes" && test x"$sim_endian" != x""; then
- echo "Setting endian flags = $sim_endian" 6>&1
-fi
-else
- if test x"$default_endian" != x; then
- sim_endian="-DWITH_DEFAULT_TARGET_BYTE_ORDER=${default_endian}"
-else
- if test x"$wire_endian" != x; then
- sim_endian="-DWITH_TARGET_BYTE_ORDER=${wire_endian}"
- else
- sim_endian=
- fi
-fi
-fi
-
-
-
-
-#
-# Select the bitsize of the target
-#
-mips_addr_bitsize=
-case "${target}" in
- mips64*-*-*) mips_bitsize=64 ; mips_msb=63 ;;
- mips16*-*-*) mips_bitsize=64 ; mips_msb=63 ;;
- mips*-*-*) mips_bitsize=32 ; mips_msb=31 ;;
- *) mips_bitsize=64 ; mips_msb=63 ;;
-esac
-wire_word_bitsize="$mips_bitsize"
-wire_word_msb="$mips_msb"
-wire_address_bitsize="$mips_addr_bitsize"
-wire_cell_bitsize=""
-# Check whether --enable-sim-bitsize or --disable-sim-bitsize was given.
-if test "${enable_sim_bitsize+set}" = set; then
- enableval="$enable_sim_bitsize"
- sim_bitsize=
-case "${enableval}" in
- 64,63 | 64,63,* ) sim_bitsize="-DWITH_TARGET_WORD_BITSIZE=64 -DWITH_TARGET_WORD_MSB=63";;
- 32,31 | 32,31,* ) sim_bitsize="-DWITH_TARGET_WORD_BITSIZE=32 -DWITH_TARGET_WORD_MSB=31";;
- 64,0 | 64,0,* ) sim_bitsize="-DWITH_TARGET_WORD_BITSIZE=32 -DWITH_TARGET_WORD_MSB=0";;
- 32,0 | 64,0,* ) sim_bitsize="-DWITH_TARGET_WORD_BITSIZE=32 -DWITH_TARGET_WORD_MSB=0";;
- 32) if test x"$wire_word_msb" != x -a x"$wire_word_msb" != x0; then
- sim_bitsize="-DWITH_TARGET_WORD_BITSIZE=32 -DWITH_TARGET_WORD_MSB=31"
- else
- sim_bitsize="-DWITH_TARGET_WORD_BITSIZE=32 -DWITH_TARGET_WORD_MSB=0"
- fi ;;
- 64) if test x"$wire_word_msb" != x -a x"$wire_word_msb" != x0; then
- sim_bitsize="-DWITH_TARGET_WORD_BITSIZE=64 -DWITH_TARGET_WORD_MSB=63"
- else
- sim_bitsize="-DWITH_TARGET_WORD_BITSIZE=64 -DWITH_TARGET_WORD_MSB=0"
- fi ;;
- *) { echo "configure: error: "--enable-sim-bitsize was given $enableval. Expected 32 or 64"" 1>&2; exit 1; } ;;
-esac
-# address bitsize
-tmp=`echo "${enableval}" | sed -e "s/^[0-9]*,*[0-9]*,*//"`
-case x"${tmp}" in
- x ) ;;
- x32 | x32,* ) sim_bitsize="${sim_bitsize} -DWITH_TARGET_ADDRESS_BITSIZE=32" ;;
- x64 | x64,* ) sim_bitsize="${sim_bitsize} -DWITH_TARGET_ADDRESS_BITSIZE=64" ;;
- * ) { echo "configure: error: "--enable-sim-bitsize was given address size $enableval. Expected 32 or 64"" 1>&2; exit 1; } ;;
-esac
-# cell bitsize
-tmp=`echo "${enableval}" | sed -e "s/^[0-9]*,*[0-9*]*,*[0-9]*,*//"`
-case x"${tmp}" in
- x ) ;;
- x32 | x32,* ) sim_bitsize="${sim_bitsize} -DWITH_TARGET_CELL_BITSIZE=32" ;;
- x64 | x64,* ) sim_bitsize="${sim_bitsize} -DWITH_TARGET_CELL_BITSIZE=64" ;;
- * ) { echo "configure: error: "--enable-sim-bitsize was given cell size $enableval. Expected 32 or 64"" 1>&2; exit 1; } ;;
-esac
-if test x"$silent" != x"yes" && test x"$sim_bitsize" != x""; then
- echo "Setting bitsize flags = $sim_bitsize" 6>&1
-fi
-else
- sim_bitsize=""
-if test x"$wire_word_bitsize" != x; then
- sim_bitsize="$sim_bitsize -DWITH_TARGET_WORD_BITSIZE=$wire_word_bitsize"
-fi
-if test x"$wire_word_msb" != x; then
- sim_bitsize="$sim_bitsize -DWITH_TARGET_WORD_MSB=$wire_word_msb"
-fi
-if test x"$wire_address_bitsize" != x; then
- sim_bitsize="$sim_bitsize -DWITH_TARGET_ADDRESS_BITSIZE=$wire_address_bitsize"
-fi
-if test x"$wire_cell_bitsize" != x; then
- sim_bitsize="$sim_bitsize -DWITH_TARGET_CELL_BITSIZE=$wire_cell_bitsize"
-fi
-fi
-
-
-
-
-#
-# Select the floating hardware support of the target
-#
-mips_fpu=HARDWARE_FLOATING_POINT
-mips_fpu_bitsize=
-case "${target}" in
- mips*tx39*) mips_fpu=HARD_FLOATING_POINT
- mips_fpu_bitsize=32
- ;;
- mips64*-*-*) mips_fpu=HARD_FLOATING_POINT ;;
- mips16*-*-*) mips_fpu=HARD_FLOATING_POINT ;;
- mips*-*-*) mips_fpu=HARD_FLOATING_POINT ; mips_fpu_bitsize=32 ;;
- *) mips_fpu=HARD_FLOATING_POINT ;;
-esac
-
-default_sim_float="$mips_fpu"
-default_sim_float_bitsize="$mips_fpu_bitsize"
-# Check whether --enable-sim-float or --disable-sim-float was given.
-if test "${enable_sim_float+set}" = set; then
- enableval="$enable_sim_float"
- case "${enableval}" in
- yes | hard) sim_float="-DWITH_FLOATING_POINT=HARD_FLOATING_POINT";;
- no | soft) sim_float="-DWITH_FLOATING_POINT=SOFT_FLOATING_POINT";;
- 32) sim_float="-DWITH_FLOATING_POINT=HARD_FLOATING_POINT -DWITH_TARGET_FLOATING_POINT_BITSIZE=32";;
- 64) sim_float="-DWITH_FLOATING_POINT=HARD_FLOATING_POINT -DWITH_TARGET_FLOATING_POINT_BITSIZE=64";;
- *) { echo "configure: error: "Unknown value $enableval passed to --enable-sim-float"" 1>&2; exit 1; }; sim_float="";;
-esac
-if test x"$silent" != x"yes" && test x"$sim_float" != x""; then
- echo "Setting float flags = $sim_float" 6>&1
-fi
-else
-
-sim_float=
-if test x"${default_sim_float}" != x""; then
- sim_float="-DWITH_FLOATING_POINT=${default_sim_float}"
-fi
-if test x"${default_sim_float_bitsize}" != x""; then
- sim_float="$sim_float -DWITH_TARGET_FLOATING_POINT_BITSIZE=${default_sim_float_bitsize}"
-fi
-
-fi
-
-
-
-
-#
-# Select the level of SMP support
-#
-case "${target}" in
- *) mips_smp=0 ;;
-esac
-
-default_sim_smp="$mips_smp"
-# Check whether --enable-sim-smp or --disable-sim-smp was given.
-if test "${enable_sim_smp+set}" = set; then
- enableval="$enable_sim_smp"
- case "${enableval}" in
- yes) sim_smp="-DWITH_SMP=5" ; sim_igen_smp="-N 5";;
- no) sim_smp="-DWITH_SMP=0" ; sim_igen_smp="-N 0";;
- *) sim_smp="-DWITH_SMP=$enableval" ; sim_igen_smp="-N $enableval";;
-esac
-if test x"$silent" != x"yes" && test x"$sim_smp" != x""; then
- echo "Setting smp flags = $sim_smp" 6>&1
-fi
-else
- sim_smp="-DWITH_SMP=${default_sim_smp}" ; sim_igen_smp="-N ${default_sim_smp}"
-if test x"$silent" != x"yes"; then
- echo "Setting smp flags = $sim_smp" 6>&1
-fi
-fi
-
-
-
-
-#
-# Select the IGEN architecture
-#
-sim_gen=IGEN
-sim_igen_machine="-M mipsIV"
-sim_m16_machine="-M mips16"
-sim_igen_filter="32,64,f"
-sim_m16_filter="16"
-case "${target}" in
- mips*tx39*) sim_gen=IGEN
- sim_igen_filter="32,f"
- sim_igen_machine="-M r3900"
- ;;
- mips64vr43*-*-*) sim_gen=IGEN
- sim_igen_machine="-M mipsIV"
- ;;
- mips64vr5*-*-*) sim_gen=IGEN
- sim_igen_machine="-M vr5000"
- ;;
- mips64vr41*) sim_gen=M16
- sim_igen_machine="-M vr4100"
- sim_m16_machine="-M vr4100"
- sim_igen_filter="32,64,f"
- sim_m16_filter="16"
- ;;
- mips64*-*-*) sim_igen_filter="32,64,f"
- sim_gen=IGEN
- ;;
- mips16*-*-*) sim_gen=M16
- sim_igen_filter="32,64,f"
- sim_m16_filter="16"
- ;;
- mips*lsi*) sim_gen=M16
- sim_igen_machine="-M mipsIII,mips16"
- sim_m16_machine="-M mips16,mipsIII"
- sim_igen_filter="32,f"
- sim_m16_filter="16"
- ;;
- mips*-*-*) sim_gen=IGEN
- sim_igen_filter="32,f"
- ;;
-esac
-sim_igen_flags="-F ${sim_igen_filter} ${sim_igen_machine} ${sim_igen_smp}"
-sim_m16_flags=" -F ${sim_m16_filter} ${sim_m16_machine} ${sim_igen_smp}"
-
-
-
-
-
-#
-# Add simulated hardware devices
-#
-hw_enabled=no
-case "${target}" in
- mips*tx39*)
- hw_enabled=yes
- hw_extra_devices="tx3904cpu tx3904irc tx3904tmr tx3904sio"
- mips_extra_objs="dv-sockser.o"
- SIM_SUBTARGET="$SIM_SUBTARGET -DTARGET_TX3904=1"
- ;;
- *)
- mips_extra_objs=""
- ;;
-esac
-
-if test x"$hw_enabled" = x"yes"; then
- sim_hw_p=yes
-else
- sim_hw_p=no
-fi
-if test "$hw_devices"; then
- hardware="core pal glue"
-else
- hardware="core pal glue $hw_extra_devices"
-fi
-sim_hw_cflags="-DWITH_HW=1"
-sim_hw="$hardware"
-sim_hw_objs="\$(SIM_COMMON_HW_OBJS) `echo $sim_hw | sed -e 's/\([^ ][^ ]*\)/dv-\1.o/g'`"
-# Check whether --enable-sim-hardware or --disable-sim-hardware was given.
-if test "${enable_sim_hardware+set}" = set; then
- enableval="$enable_sim_hardware"
-
-case "${enableval}" in
- yes) sim_hw_p=yes;;
- no) sim_hw_p=no;;
- ,*) sim_hw_p=yes; hardware="${hardware} `echo ${enableval} | sed -e 's/,/ /'`";;
- *,) sim_hw_p=yes; hardware="`echo ${enableval} | sed -e 's/,/ /'` ${hardware}";;
- *) sim_hw_p=yes; hardware="`echo ${enableval} | sed -e 's/,/ /'`"'';;
-esac
-if test "$sim_hw_p" != yes; then
- sim_hw_objs=
- sim_hw_cflags="-DWITH_HW=0"
- sim_hw=
-else
- sim_hw_cflags="-DWITH_HW=1"
- # remove duplicates
- sim_hw=""
- sim_hw_objs="\$(SIM_COMMON_HW_OBJS)"
- for i in x $hardware ; do
- case " $f " in
- x) ;;
- *" $i "*) ;;
- *) sim_hw="$sim_hw $i" ; sim_hw_objs="$sim_hw_objs dv-$i.o";;
- esac
- done
-fi
-if test x"$silent" != x"yes" && test "$sim_hw_p" = "yes"; then
- echo "Setting hardware to $sim_hw_cflags, $sim_hw, $sim_hw_objs"
-fi
-else
-
-if test "$sim_hw_p" != yes; then
- sim_hw_objs=
- sim_hw_cflags="-DWITH_HW=0"
- sim_hw=
-fi
-if test x"$silent" != x"yes"; then
- echo "Setting hardware to $sim_hw_cflags, $sim_hw, $sim_hw_objs"
-fi
-fi
-
-
-
-
-# Choose simulator engine
-case "${target}" in
- *) mips_igen_engine="engine.o"
- ;;
-esac
-
-
-
-# If we find X, set shell vars x_includes and x_libraries to the
-# paths, otherwise set no_x=yes.
-# Uses ac_ vars as temps to allow command line to override cache and checks.
-# --without-x overrides everything else, but does not touch the cache.
-echo $ac_n "checking for X""... $ac_c" 1>&6
-echo "configure:4120: checking for X" >&5
-
-# Check whether --with-x or --without-x was given.
-if test "${with_x+set}" = set; then
- withval="$with_x"
- :
-fi
-
-# $have_x is `yes', `no', `disabled', or empty when we do not yet know.
-if test "x$with_x" = xno; then
- # The user explicitly disabled X.
- have_x=disabled
-else
- if test "x$x_includes" != xNONE && test "x$x_libraries" != xNONE; then
- # Both variables are already set.
- have_x=yes
- else
-if eval "test \"`echo '$''{'ac_cv_have_x'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- # One or both of the vars are not set, and there is no cached value.
-ac_x_includes=NO ac_x_libraries=NO
-rm -fr conftestdir
-if mkdir conftestdir; then
- cd conftestdir
- # Make sure to not put "make" in the Imakefile rules, since we grep it out.
- cat > Imakefile <<'EOF'
-acfindx:
- @echo 'ac_im_incroot="${INCROOT}"; ac_im_usrlibdir="${USRLIBDIR}"; ac_im_libdir="${LIBDIR}"'
-EOF
- if (xmkmf) >/dev/null 2>/dev/null && test -f Makefile; then
- # GNU make sometimes prints "make[1]: Entering...", which would confuse us.
- eval `${MAKE-make} acfindx 2>/dev/null | grep -v make`
- # Open Windows xmkmf reportedly sets LIBDIR instead of USRLIBDIR.
- for ac_extension in a so sl; do
- if test ! -f $ac_im_usrlibdir/libX11.$ac_extension &&
- test -f $ac_im_libdir/libX11.$ac_extension; then
- ac_im_usrlibdir=$ac_im_libdir; break
- fi
- done
- # Screen out bogus values from the imake configuration. They are
- # bogus both because they are the default anyway, and because
- # using them would break gcc on systems where it needs fixed includes.
- case "$ac_im_incroot" in
- /usr/include) ;;
- *) test -f "$ac_im_incroot/X11/Xos.h" && ac_x_includes="$ac_im_incroot" ;;
- esac
- case "$ac_im_usrlibdir" in
- /usr/lib | /lib) ;;
- *) test -d "$ac_im_usrlibdir" && ac_x_libraries="$ac_im_usrlibdir" ;;
- esac
- fi
- cd ..
- rm -fr conftestdir
-fi
-
-if test "$ac_x_includes" = NO; then
- # Guess where to find include files, by looking for this one X11 .h file.
- test -z "$x_direct_test_include" && x_direct_test_include=X11/Intrinsic.h
-
- # First, try using that file with no special directory specified.
-cat > conftest.$ac_ext <<EOF
-#line 4182 "configure"
-#include "confdefs.h"
-#include <$x_direct_test_include>
-EOF
-ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:4187: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
-ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
-if test -z "$ac_err"; then
- rm -rf conftest*
- # We can compile using X headers with no special include directory.
-ac_x_includes=
-else
- echo "$ac_err" >&5
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- # Look for the header file in a standard set of common directories.
-# Check X11 before X11Rn because it is often a symlink to the current release.
- for ac_dir in \
- /usr/X11/include \
- /usr/X11R6/include \
- /usr/X11R5/include \
- /usr/X11R4/include \
- \
- /usr/include/X11 \
- /usr/include/X11R6 \
- /usr/include/X11R5 \
- /usr/include/X11R4 \
- \
- /usr/local/X11/include \
- /usr/local/X11R6/include \
- /usr/local/X11R5/include \
- /usr/local/X11R4/include \
- \
- /usr/local/include/X11 \
- /usr/local/include/X11R6 \
- /usr/local/include/X11R5 \
- /usr/local/include/X11R4 \
- \
- /usr/X386/include \
- /usr/x386/include \
- /usr/XFree86/include/X11 \
- \
- /usr/include \
- /usr/local/include \
- /usr/unsupported/include \
- /usr/athena/include \
- /usr/local/x11r5/include \
- /usr/lpp/Xamples/include \
- \
- /usr/openwin/include \
- /usr/openwin/share/include \
- ; \
- do
- if test -r "$ac_dir/$x_direct_test_include"; then
- ac_x_includes=$ac_dir
- break
- fi
- done
-fi
-rm -f conftest*
-fi # $ac_x_includes = NO
-
-if test "$ac_x_libraries" = NO; then
- # Check for the libraries.
-
- test -z "$x_direct_test_library" && x_direct_test_library=Xt
- test -z "$x_direct_test_function" && x_direct_test_function=XtMalloc
-
- # See if we find them without any special options.
- # Don't add to $LIBS permanently.
- ac_save_LIBS="$LIBS"
- LIBS="-l$x_direct_test_library $LIBS"
-cat > conftest.$ac_ext <<EOF
-#line 4256 "configure"
-#include "confdefs.h"
-
-int main() {
-${x_direct_test_function}()
-; return 0; }
-EOF
-if { (eval echo configure:4263: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- rm -rf conftest*
- LIBS="$ac_save_LIBS"
-# We can link X programs with no special library path.
-ac_x_libraries=
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- LIBS="$ac_save_LIBS"
-# First see if replacing the include by lib works.
-# Check X11 before X11Rn because it is often a symlink to the current release.
-for ac_dir in `echo "$ac_x_includes" | sed s/include/lib/` \
- /usr/X11/lib \
- /usr/X11R6/lib \
- /usr/X11R5/lib \
- /usr/X11R4/lib \
- \
- /usr/lib/X11 \
- /usr/lib/X11R6 \
- /usr/lib/X11R5 \
- /usr/lib/X11R4 \
- \
- /usr/local/X11/lib \
- /usr/local/X11R6/lib \
- /usr/local/X11R5/lib \
- /usr/local/X11R4/lib \
- \
- /usr/local/lib/X11 \
- /usr/local/lib/X11R6 \
- /usr/local/lib/X11R5 \
- /usr/local/lib/X11R4 \
- \
- /usr/X386/lib \
- /usr/x386/lib \
- /usr/XFree86/lib/X11 \
- \
- /usr/lib \
- /usr/local/lib \
- /usr/unsupported/lib \
- /usr/athena/lib \
- /usr/local/x11r5/lib \
- /usr/lpp/Xamples/lib \
- /lib/usr/lib/X11 \
- \
- /usr/openwin/lib \
- /usr/openwin/share/lib \
- ; \
-do
- for ac_extension in a so sl; do
- if test -r $ac_dir/lib${x_direct_test_library}.$ac_extension; then
- ac_x_libraries=$ac_dir
- break 2
- fi
- done
-done
-fi
-rm -f conftest*
-fi # $ac_x_libraries = NO
-
-if test "$ac_x_includes" = NO || test "$ac_x_libraries" = NO; then
- # Didn't find X anywhere. Cache the known absence of X.
- ac_cv_have_x="have_x=no"
-else
- # Record where we found X for the cache.
- ac_cv_have_x="have_x=yes \
- ac_x_includes=$ac_x_includes ac_x_libraries=$ac_x_libraries"
-fi
-fi
- fi
- eval "$ac_cv_have_x"
-fi # $with_x != no
-
-if test "$have_x" != yes; then
- echo "$ac_t""$have_x" 1>&6
- no_x=yes
-else
- # If each of the values was on the command line, it overrides each guess.
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- test "x$x_libraries" = xNONE && x_libraries=$ac_x_libraries
- # Update the cache value to reflect the command line values.
- ac_cv_have_x="have_x=yes \
- ac_x_includes=$x_includes ac_x_libraries=$x_libraries"
- echo "$ac_t""libraries $x_libraries, headers $x_includes" 1>&6
-fi
-
-mips_extra_libs=""
-
-
-for ac_hdr in string.h strings.h stdlib.h stdlib.h
-do
-ac_safe=`echo "$ac_hdr" | sed 'y%./+-%__p_%'`
-echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6
-echo "configure:4356: checking for $ac_hdr" >&5
-if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 4361 "configure"
-#include "confdefs.h"
-#include <$ac_hdr>
-EOF
-ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:4366: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
-ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
-if test -z "$ac_err"; then
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=yes"
-else
- echo "$ac_err" >&5
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=no"
-fi
-rm -f conftest*
-fi
-if eval "test \"`echo '$ac_cv_header_'$ac_safe`\" = yes"; then
- echo "$ac_t""yes" 1>&6
- ac_tr_hdr=HAVE_`echo $ac_hdr | sed 'y%abcdefghijklmnopqrstuvwxyz./-%ABCDEFGHIJKLMNOPQRSTUVWXYZ___%'`
- cat >> confdefs.h <<EOF
-#define $ac_tr_hdr 1
-EOF
-
-else
- echo "$ac_t""no" 1>&6
-fi
-done
-
-echo $ac_n "checking for fabs in -lm""... $ac_c" 1>&6
-echo "configure:4393: checking for fabs in -lm" >&5
-ac_lib_var=`echo m'_'fabs | sed 'y%./+-%__p_%'`
-if eval "test \"`echo '$''{'ac_cv_lib_$ac_lib_var'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- ac_save_LIBS="$LIBS"
-LIBS="-lm $LIBS"
-cat > conftest.$ac_ext <<EOF
-#line 4401 "configure"
-#include "confdefs.h"
-/* Override any gcc2 internal prototype to avoid an error. */
-/* We use char because int might match the return type of a gcc2
- builtin and then its argument prototype would still apply. */
-char fabs();
-
-int main() {
-fabs()
-; return 0; }
-EOF
-if { (eval echo configure:4412: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- rm -rf conftest*
- eval "ac_cv_lib_$ac_lib_var=yes"
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_lib_$ac_lib_var=no"
-fi
-rm -f conftest*
-LIBS="$ac_save_LIBS"
-
-fi
-if eval "test \"`echo '$ac_cv_lib_'$ac_lib_var`\" = yes"; then
- echo "$ac_t""yes" 1>&6
- ac_tr_lib=HAVE_LIB`echo m | sed -e 's/[^a-zA-Z0-9_]/_/g' \
- -e 'y/abcdefghijklmnopqrstuvwxyz/ABCDEFGHIJKLMNOPQRSTUVWXYZ/'`
- cat >> confdefs.h <<EOF
-#define $ac_tr_lib 1
-EOF
-
- LIBS="-lm $LIBS"
-
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- echo "$ac_t""no" 1>&6
-fi
-
-for ac_func in aint anint sqrt
-do
-echo $ac_n "checking for $ac_func""... $ac_c" 1>&6
-echo "configure:4442: checking for $ac_func" >&5
-if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 4447 "configure"
-#include "confdefs.h"
-/* System header to define __stub macros and hopefully few prototypes,
- which can conflict with char $ac_func(); below. */
-#include <assert.h>
-/* Override any gcc2 internal prototype to avoid an error. */
-/* We use char because int might match the return type of a gcc2
- builtin and then its argument prototype would still apply. */
-char $ac_func();
-
-int main() {
-
-/* The GNU C library defines this for functions which it implements
- to always fail with ENOSYS. Some functions are actually named
- something starting with __ and the normal name is an alias. */
-#if defined (__stub_$ac_func) || defined (__stub___$ac_func)
-choke me
-#else
-$ac_func();
-#endif
-
-; return 0; }
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-if { (eval echo configure:4470: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=yes"
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=no"
-fi
-rm -f conftest*
-fi
-
-if eval "test \"`echo '$ac_cv_func_'$ac_func`\" = yes"; then
- echo "$ac_t""yes" 1>&6
- ac_tr_func=HAVE_`echo $ac_func | tr 'abcdefghijklmnopqrstuvwxyz' 'ABCDEFGHIJKLMNOPQRSTUVWXYZ'`
- cat >> confdefs.h <<EOF
-#define $ac_tr_func 1
-EOF
-
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- echo "$ac_t""no" 1>&6
-fi
-done
-
-
-
-
-trap '' 1 2 15
-cat > confcache <<\EOF
-# This file is a shell script that caches the results of configure
-# tests run on this system so they can be shared between configure
-# scripts and configure runs. It is not useful on other systems.
-# If it contains results you don't want to keep, you may remove or edit it.
-#
-# By default, configure uses ./config.cache as the cache file,
-# creating it if it does not exist already. You can give configure
-# the --cache-file=FILE option to use a different cache file; that is
-# what configure does when it calls configure scripts in
-# subdirectories, so they share the cache.
-# Giving --cache-file=/dev/null disables caching, for debugging configure.
-# config.status only pays attention to the cache file if you give it the
-# --recheck option to rerun configure.
-#
-EOF
-# The following way of writing the cache mishandles newlines in values,
-# but we know of no workaround that is simple, portable, and efficient.
-# So, don't put newlines in cache variables' values.
-# Ultrix sh set writes to stderr and can't be redirected directly,
-# and sets the high bit in the cache file unless we assign to the vars.
-(set) 2>&1 |
- case `(ac_space=' '; set | grep ac_space) 2>&1` in
- *ac_space=\ *)
- # `set' does not quote correctly, so add quotes (double-quote substitution
- # turns \\\\ into \\, and sed turns \\ into \).
- sed -n \
- -e "s/'/'\\\\''/g" \
- -e "s/^\\([a-zA-Z0-9_]*_cv_[a-zA-Z0-9_]*\\)=\\(.*\\)/\\1=\${\\1='\\2'}/p"
- ;;
- *)
- # `set' quotes correctly as required by POSIX, so do not add quotes.
- sed -n -e 's/^\([a-zA-Z0-9_]*_cv_[a-zA-Z0-9_]*\)=\(.*\)/\1=${\1=\2}/p'
- ;;
- esac >> confcache
-if cmp -s $cache_file confcache; then
- :
-else
- if test -w $cache_file; then
- echo "updating cache $cache_file"
- cat confcache > $cache_file
- else
- echo "not updating unwritable cache $cache_file"
- fi
-fi
-rm -f confcache
-
-trap 'rm -fr conftest* confdefs* core core.* *.core $ac_clean_files; exit 1' 1 2 15
-
-test "x$prefix" = xNONE && prefix=$ac_default_prefix
-# Let make expand exec_prefix.
-test "x$exec_prefix" = xNONE && exec_prefix='${prefix}'
-
-# Any assignment to VPATH causes Sun make to only execute
-# the first set of double-colon rules, so remove it if not needed.
-# If there is a colon in the path, we need to keep it.
-if test "x$srcdir" = x.; then
- ac_vpsub='/^[ ]*VPATH[ ]*=[^:]*$/d'
-fi
-
-trap 'rm -f $CONFIG_STATUS conftest*; exit 1' 1 2 15
-
-DEFS=-DHAVE_CONFIG_H
-
-# Without the "./", some shells look in PATH for config.status.
-: ${CONFIG_STATUS=./config.status}
-
-echo creating $CONFIG_STATUS
-rm -f $CONFIG_STATUS
-cat > $CONFIG_STATUS <<EOF
-#! /bin/sh
-# Generated automatically by configure.
-# Run this file to recreate the current configuration.
-# This directory was configured as follows,
-# on host `(hostname || uname -n) 2>/dev/null | sed 1q`:
-#
-# $0 $ac_configure_args
-#
-# Compiler output produced by configure, useful for debugging
-# configure, is in ./config.log if it exists.
-
-ac_cs_usage="Usage: $CONFIG_STATUS [--recheck] [--version] [--help]"
-for ac_option
-do
- case "\$ac_option" in
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- echo "running \${CONFIG_SHELL-/bin/sh} $0 $ac_configure_args --no-create --no-recursion"
- exec \${CONFIG_SHELL-/bin/sh} $0 $ac_configure_args --no-create --no-recursion ;;
- -version | --version | --versio | --versi | --vers | --ver | --ve | --v)
- echo "$CONFIG_STATUS generated by autoconf version 2.13"
- exit 0 ;;
- -help | --help | --hel | --he | --h)
- echo "\$ac_cs_usage"; exit 0 ;;
- *) echo "\$ac_cs_usage"; exit 1 ;;
- esac
-done
-
-ac_given_srcdir=$srcdir
-ac_given_INSTALL="$INSTALL"
-
-trap 'rm -fr `echo "Makefile.sim:Makefile.in Make-common.sim:../common/Make-common.in .gdbinit:../common/gdbinit.in config.h:config.in" | sed "s/:[^ ]*//g"` conftest*; exit 1' 1 2 15
-EOF
-cat >> $CONFIG_STATUS <<EOF
-
-# Protect against being on the right side of a sed subst in config.status.
-sed 's/%@/@@/; s/@%/@@/; s/%g\$/@g/; /@g\$/s/[\\\\&%]/\\\\&/g;
- s/@@/%@/; s/@@/@%/; s/@g\$/%g/' > conftest.subs <<\\CEOF
-$ac_vpsub
-$extrasub
-s%@sim_environment@%$sim_environment%g
-s%@sim_alignment@%$sim_alignment%g
-s%@sim_assert@%$sim_assert%g
-s%@sim_bitsize@%$sim_bitsize%g
-s%@sim_endian@%$sim_endian%g
-s%@sim_hostendian@%$sim_hostendian%g
-s%@sim_float@%$sim_float%g
-s%@sim_scache@%$sim_scache%g
-s%@sim_default_model@%$sim_default_model%g
-s%@sim_hw_cflags@%$sim_hw_cflags%g
-s%@sim_hw_objs@%$sim_hw_objs%g
-s%@sim_hw@%$sim_hw%g
-s%@sim_inline@%$sim_inline%g
-s%@sim_packages@%$sim_packages%g
-s%@sim_regparm@%$sim_regparm%g
-s%@sim_reserved_bits@%$sim_reserved_bits%g
-s%@sim_smp@%$sim_smp%g
-s%@sim_stdcall@%$sim_stdcall%g
-s%@sim_xor_endian@%$sim_xor_endian%g
-s%@WARN_CFLAGS@%$WARN_CFLAGS%g
-s%@WERROR_CFLAGS@%$WERROR_CFLAGS%g
-s%@SHELL@%$SHELL%g
-s%@CFLAGS@%$CFLAGS%g
-s%@CPPFLAGS@%$CPPFLAGS%g
-s%@CXXFLAGS@%$CXXFLAGS%g
-s%@FFLAGS@%$FFLAGS%g
-s%@DEFS@%$DEFS%g
-s%@LDFLAGS@%$LDFLAGS%g
-s%@LIBS@%$LIBS%g
-s%@exec_prefix@%$exec_prefix%g
-s%@prefix@%$prefix%g
-s%@program_transform_name@%$program_transform_name%g
-s%@bindir@%$bindir%g
-s%@sbindir@%$sbindir%g
-s%@libexecdir@%$libexecdir%g
-s%@datadir@%$datadir%g
-s%@sysconfdir@%$sysconfdir%g
-s%@sharedstatedir@%$sharedstatedir%g
-s%@localstatedir@%$localstatedir%g
-s%@libdir@%$libdir%g
-s%@includedir@%$includedir%g
-s%@oldincludedir@%$oldincludedir%g
-s%@infodir@%$infodir%g
-s%@mandir@%$mandir%g
-s%@host@%$host%g
-s%@host_alias@%$host_alias%g
-s%@host_cpu@%$host_cpu%g
-s%@host_vendor@%$host_vendor%g
-s%@host_os@%$host_os%g
-s%@target@%$target%g
-s%@target_alias@%$target_alias%g
-s%@target_cpu@%$target_cpu%g
-s%@target_vendor@%$target_vendor%g
-s%@target_os@%$target_os%g
-s%@build@%$build%g
-s%@build_alias@%$build_alias%g
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-s%@build_vendor@%$build_vendor%g
-s%@build_os@%$build_os%g
-s%@CC@%$CC%g
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-s%@INSTALL_DATA@%$INSTALL_DATA%g
-s%@CC_FOR_BUILD@%$CC_FOR_BUILD%g
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-s%@INCLUDE_LOCALE_H@%$INCLUDE_LOCALE_H%g
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-
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-
-cat >> $CONFIG_STATUS <<\EOF
-
-# Split the substitutions into bite-sized pieces for seds with
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- fi
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- ac_sed_cmds=cat
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-EOF
-
-cat >> $CONFIG_STATUS <<EOF
-
-CONFIG_FILES=\${CONFIG_FILES-"Makefile.sim:Makefile.in Make-common.sim:../common/Make-common.in .gdbinit:../common/gdbinit.in"}
-EOF
-cat >> $CONFIG_STATUS <<\EOF
-for ac_file in .. $CONFIG_FILES; do if test "x$ac_file" != x..; then
- # Support "outfile[:infile[:infile...]]", defaulting infile="outfile.in".
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- ac_file=`echo "$ac_file"|sed 's%:.*%%'` ;;
- *) ac_file_in="${ac_file}.in" ;;
- esac
-
- # Adjust a relative srcdir, top_srcdir, and INSTALL for subdirectories.
-
- # Remove last slash and all that follows it. Not all systems have dirname.
- ac_dir=`echo $ac_file|sed 's%/[^/][^/]*$%%'`
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- ac_dir_suffix="/`echo $ac_dir|sed 's%^\./%%'`"
- # A "../" for each directory in $ac_dir_suffix.
- ac_dots=`echo $ac_dir_suffix|sed 's%/[^/]*%../%g'`
- else
- ac_dir_suffix= ac_dots=
- fi
-
- case "$ac_given_srcdir" in
- .) srcdir=.
- if test -z "$ac_dots"; then top_srcdir=.
- else top_srcdir=`echo $ac_dots|sed 's%/$%%'`; fi ;;
- /*) srcdir="$ac_given_srcdir$ac_dir_suffix"; top_srcdir="$ac_given_srcdir" ;;
- *) # Relative path.
- srcdir="$ac_dots$ac_given_srcdir$ac_dir_suffix"
- top_srcdir="$ac_dots$ac_given_srcdir" ;;
- esac
-
- case "$ac_given_INSTALL" in
- [/$]*) INSTALL="$ac_given_INSTALL" ;;
- *) INSTALL="$ac_dots$ac_given_INSTALL" ;;
- esac
-
- echo creating "$ac_file"
- rm -f "$ac_file"
- configure_input="Generated automatically from `echo $ac_file_in|sed 's%.*/%%'` by configure."
- case "$ac_file" in
- *Makefile*) ac_comsub="1i\\
-# $configure_input" ;;
- *) ac_comsub= ;;
- esac
-
- ac_file_inputs=`echo $ac_file_in|sed -e "s%^%$ac_given_srcdir/%" -e "s%:% $ac_given_srcdir/%g"`
- sed -e "$ac_comsub
-s%@configure_input@%$configure_input%g
-s%@srcdir@%$srcdir%g
-s%@top_srcdir@%$top_srcdir%g
-s%@INSTALL@%$INSTALL%g
-" $ac_file_inputs | (eval "$ac_sed_cmds") > $ac_file
-fi; done
-rm -f conftest.s*
-
-# These sed commands are passed to sed as "A NAME B NAME C VALUE D", where
-# NAME is the cpp macro being defined and VALUE is the value it is being given.
-#
-# ac_d sets the value in "#define NAME VALUE" lines.
-ac_dA='s%^\([ ]*\)#\([ ]*define[ ][ ]*\)'
-ac_dB='\([ ][ ]*\)[^ ]*%\1#\2'
-ac_dC='\3'
-ac_dD='%g'
-# ac_u turns "#undef NAME" with trailing blanks into "#define NAME VALUE".
-ac_uA='s%^\([ ]*\)#\([ ]*\)undef\([ ][ ]*\)'
-ac_uB='\([ ]\)%\1#\2define\3'
-ac_uC=' '
-ac_uD='\4%g'
-# ac_e turns "#undef NAME" without trailing blanks into "#define NAME VALUE".
-ac_eA='s%^\([ ]*\)#\([ ]*\)undef\([ ][ ]*\)'
-ac_eB='$%\1#\2define\3'
-ac_eC=' '
-ac_eD='%g'
-
-if test "${CONFIG_HEADERS+set}" != set; then
-EOF
-cat >> $CONFIG_STATUS <<EOF
- CONFIG_HEADERS="config.h:config.in"
-EOF
-cat >> $CONFIG_STATUS <<\EOF
-fi
-for ac_file in .. $CONFIG_HEADERS; do if test "x$ac_file" != x..; then
- # Support "outfile[:infile[:infile...]]", defaulting infile="outfile.in".
- case "$ac_file" in
- *:*) ac_file_in=`echo "$ac_file"|sed 's%[^:]*:%%'`
- ac_file=`echo "$ac_file"|sed 's%:.*%%'` ;;
- *) ac_file_in="${ac_file}.in" ;;
- esac
-
- echo creating $ac_file
-
- rm -f conftest.frag conftest.in conftest.out
- ac_file_inputs=`echo $ac_file_in|sed -e "s%^%$ac_given_srcdir/%" -e "s%:% $ac_given_srcdir/%g"`
- cat $ac_file_inputs > conftest.in
-
-EOF
-
-# Transform confdefs.h into a sed script conftest.vals that substitutes
-# the proper values into config.h.in to produce config.h. And first:
-# Protect against being on the right side of a sed subst in config.status.
-# Protect against being in an unquoted here document in config.status.
-rm -f conftest.vals
-cat > conftest.hdr <<\EOF
-s/[\\&%]/\\&/g
-s%[\\$`]%\\&%g
-s%#define \([A-Za-z_][A-Za-z0-9_]*\) *\(.*\)%${ac_dA}\1${ac_dB}\1${ac_dC}\2${ac_dD}%gp
-s%ac_d%ac_u%gp
-s%ac_u%ac_e%gp
-EOF
-sed -n -f conftest.hdr confdefs.h > conftest.vals
-rm -f conftest.hdr
-
-# This sed command replaces #undef with comments. This is necessary, for
-# example, in the case of _POSIX_SOURCE, which is predefined and required
-# on some systems where configure will not decide to define it.
-cat >> conftest.vals <<\EOF
-s%^[ ]*#[ ]*undef[ ][ ]*[a-zA-Z_][a-zA-Z_0-9]*%/* & */%
-EOF
-
-# Break up conftest.vals because some shells have a limit on
-# the size of here documents, and old seds have small limits too.
-
-rm -f conftest.tail
-while :
-do
- ac_lines=`grep -c . conftest.vals`
- # grep -c gives empty output for an empty file on some AIX systems.
- if test -z "$ac_lines" || test "$ac_lines" -eq 0; then break; fi
- # Write a limited-size here document to conftest.frag.
- echo ' cat > conftest.frag <<CEOF' >> $CONFIG_STATUS
- sed ${ac_max_here_lines}q conftest.vals >> $CONFIG_STATUS
- echo 'CEOF
- sed -f conftest.frag conftest.in > conftest.out
- rm -f conftest.in
- mv conftest.out conftest.in
-' >> $CONFIG_STATUS
- sed 1,${ac_max_here_lines}d conftest.vals > conftest.tail
- rm -f conftest.vals
- mv conftest.tail conftest.vals
-done
-rm -f conftest.vals
-
-cat >> $CONFIG_STATUS <<\EOF
- rm -f conftest.frag conftest.h
- echo "/* $ac_file. Generated automatically by configure. */" > conftest.h
- cat conftest.in >> conftest.h
- rm -f conftest.in
- if cmp -s $ac_file conftest.h 2>/dev/null; then
- echo "$ac_file is unchanged"
- rm -f conftest.h
- else
- # Remove last slash and all that follows it. Not all systems have dirname.
- ac_dir=`echo $ac_file|sed 's%/[^/][^/]*$%%'`
- if test "$ac_dir" != "$ac_file" && test "$ac_dir" != .; then
- # The file is in a subdirectory.
- test ! -d "$ac_dir" && mkdir "$ac_dir"
- fi
- rm -f $ac_file
- mv conftest.h $ac_file
- fi
-fi; done
-
-EOF
-
-cat >> $CONFIG_STATUS <<EOF
-ac_sources="$sim_link_files"
-ac_dests="$sim_link_links"
-EOF
-
-cat >> $CONFIG_STATUS <<\EOF
-srcdir=$ac_given_srcdir
-while test -n "$ac_sources"; do
- set $ac_dests; ac_dest=$1; shift; ac_dests=$*
- set $ac_sources; ac_source=$1; shift; ac_sources=$*
-
- echo "linking $srcdir/$ac_source to $ac_dest"
-
- if test ! -r $srcdir/$ac_source; then
- { echo "configure: error: $srcdir/$ac_source: File not found" 1>&2; exit 1; }
- fi
- rm -f $ac_dest
-
- # Make relative symlinks.
- # Remove last slash and all that follows it. Not all systems have dirname.
- ac_dest_dir=`echo $ac_dest|sed 's%/[^/][^/]*$%%'`
- if test "$ac_dest_dir" != "$ac_dest" && test "$ac_dest_dir" != .; then
- # The dest file is in a subdirectory.
- test ! -d "$ac_dest_dir" && mkdir "$ac_dest_dir"
- ac_dest_dir_suffix="/`echo $ac_dest_dir|sed 's%^\./%%'`"
- # A "../" for each directory in $ac_dest_dir_suffix.
- ac_dots=`echo $ac_dest_dir_suffix|sed 's%/[^/]*%../%g'`
- else
- ac_dest_dir_suffix= ac_dots=
- fi
-
- case "$srcdir" in
- [/$]*) ac_rel_source="$srcdir/$ac_source" ;;
- *) ac_rel_source="$ac_dots$srcdir/$ac_source" ;;
- esac
-
- # Make a symlink if possible; otherwise try a hard link.
- if ln -s $ac_rel_source $ac_dest 2>/dev/null ||
- ln $srcdir/$ac_source $ac_dest; then :
- else
- { echo "configure: error: can not link $ac_dest to $srcdir/$ac_source" 1>&2; exit 1; }
- fi
-done
-EOF
-cat >> $CONFIG_STATUS <<EOF
-
-EOF
-cat >> $CONFIG_STATUS <<\EOF
-case "x$CONFIG_FILES" in
- xMakefile*)
- echo "Merging Makefile.sim+Make-common.sim into Makefile ..."
- rm -f Makesim1.tmp Makesim2.tmp Makefile
- sed -n -e '/^## COMMON_PRE_/,/^## End COMMON_PRE_/ p' <Make-common.sim >Makesim1.tmp
- sed -n -e '/^## COMMON_POST_/,/^## End COMMON_POST_/ p' <Make-common.sim >Makesim2.tmp
- sed -e '/^## COMMON_PRE_/ r Makesim1.tmp' \
- -e '/^## COMMON_POST_/ r Makesim2.tmp' \
- <Makefile.sim >Makefile
- rm -f Makefile.sim Make-common.sim Makesim1.tmp Makesim2.tmp
- ;;
- esac
- case "x$CONFIG_HEADERS" in xconfig.h:config.in) echo > stamp-h ;; esac
-
-exit 0
-EOF
-chmod +x $CONFIG_STATUS
-rm -fr confdefs* $ac_clean_files
-test "$no_create" = yes || ${CONFIG_SHELL-/bin/sh} $CONFIG_STATUS || exit 1
-
-
diff --git a/sim/mips/configure.in b/sim/mips/configure.in
deleted file mode 100644
index bff4bc35cc4..00000000000
--- a/sim/mips/configure.in
+++ /dev/null
@@ -1,171 +0,0 @@
-dnl Process this file with autoconf to produce a configure script.
-sinclude(../common/aclocal.m4)
-AC_PREREQ(2.5)dnl
-AC_INIT(Makefile.in)
-
-SIM_AC_COMMON
-
-dnl Options available in this module
-SIM_AC_OPTION_INLINE()
-SIM_AC_OPTION_ALIGNMENT(NONSTRICT_ALIGNMENT)
-SIM_AC_OPTION_HOSTENDIAN
-SIM_AC_OPTION_WARNINGS
-
-# DEPRECATED
-#
-# Instead of defining a `subtarget' macro, code should be checking
-# the value of {STATE,CPU}_ARCHITECTURE to identify the architecture
-# in question.
-#
-case "${target}" in
- mips*tx39*) SIM_SUBTARGET="-DSUBTARGET_R3900=1";;
- *) SIM_SUBTARGET="";;
-esac
-AC_SUBST(SIM_SUBTARGET)
-
-
-
-#
-# Select the byte order of the target
-#
-mips_endian=
-default_endian=
-case "${target}" in
- mips64el*-*-*) mips_endian=LITTLE_ENDIAN ;;
- mips64vr*el-*-*) default_endian=LITTLE_ENDIAN ;;
- mips64*-*-*) default_endian=BIG_ENDIAN ;;
- mips16*-*-*) default_endian=BIG_ENDIAN ;;
- mips*-*-*) default_endian=BIG_ENDIAN ;;
- *) default_endian=BIG_ENDIAN ;;
-esac
-SIM_AC_OPTION_ENDIAN($mips_endian,$default_endian)
-
-
-
-#
-# Select the bitsize of the target
-#
-mips_addr_bitsize=
-case "${target}" in
- mips64*-*-*) mips_bitsize=64 ; mips_msb=63 ;;
- mips16*-*-*) mips_bitsize=64 ; mips_msb=63 ;;
- mips*-*-*) mips_bitsize=32 ; mips_msb=31 ;;
- *) mips_bitsize=64 ; mips_msb=63 ;;
-esac
-SIM_AC_OPTION_BITSIZE($mips_bitsize,$mips_msb,$mips_addr_bitsize)
-
-
-
-#
-# Select the floating hardware support of the target
-#
-mips_fpu=HARDWARE_FLOATING_POINT
-mips_fpu_bitsize=
-case "${target}" in
- mips*tx39*) mips_fpu=HARD_FLOATING_POINT
- mips_fpu_bitsize=32
- ;;
- mips64*-*-*) mips_fpu=HARD_FLOATING_POINT ;;
- mips16*-*-*) mips_fpu=HARD_FLOATING_POINT ;;
- mips*-*-*) mips_fpu=HARD_FLOATING_POINT ; mips_fpu_bitsize=32 ;;
- *) mips_fpu=HARD_FLOATING_POINT ;;
-esac
-SIM_AC_OPTION_FLOAT($mips_fpu,$mips_fpu_bitsize)
-
-
-
-#
-# Select the level of SMP support
-#
-case "${target}" in
- *) mips_smp=0 ;;
-esac
-SIM_AC_OPTION_SMP($mips_smp)
-
-
-
-#
-# Select the IGEN architecture
-#
-sim_gen=IGEN
-sim_igen_machine="-M mipsIV"
-sim_m16_machine="-M mips16"
-sim_igen_filter="32,64,f"
-sim_m16_filter="16"
-case "${target}" in
- mips*tx39*) sim_gen=IGEN
- sim_igen_filter="32,f"
- sim_igen_machine="-M r3900"
- ;;
- mips64vr43*-*-*) sim_gen=IGEN
- sim_igen_machine="-M mipsIV"
- ;;
- mips64vr5*-*-*) sim_gen=IGEN
- sim_igen_machine="-M vr5000"
- ;;
- mips64vr41*) sim_gen=M16
- sim_igen_machine="-M vr4100"
- sim_m16_machine="-M vr4100"
- sim_igen_filter="32,64,f"
- sim_m16_filter="16"
- ;;
- mips64*-*-*) sim_igen_filter="32,64,f"
- sim_gen=IGEN
- ;;
- mips16*-*-*) sim_gen=M16
- sim_igen_filter="32,64,f"
- sim_m16_filter="16"
- ;;
- mips*lsi*) sim_gen=M16
- sim_igen_machine="-M mipsIII,mips16"
- sim_m16_machine="-M mips16,mipsIII"
- sim_igen_filter="32,f"
- sim_m16_filter="16"
- ;;
- mips*-*-*) sim_gen=IGEN
- sim_igen_filter="32,f"
- ;;
-esac
-sim_igen_flags="-F ${sim_igen_filter} ${sim_igen_machine} ${sim_igen_smp}"
-sim_m16_flags=" -F ${sim_m16_filter} ${sim_m16_machine} ${sim_igen_smp}"
-AC_SUBST(sim_igen_flags)
-AC_SUBST(sim_m16_flags)
-AC_SUBST(sim_gen)
-
-
-#
-# Add simulated hardware devices
-#
-hw_enabled=no
-case "${target}" in
- mips*tx39*)
- hw_enabled=yes
- hw_extra_devices="tx3904cpu tx3904irc tx3904tmr tx3904sio"
- mips_extra_objs="dv-sockser.o"
- SIM_SUBTARGET="$SIM_SUBTARGET -DTARGET_TX3904=1"
- ;;
- *)
- mips_extra_objs=""
- ;;
-esac
-SIM_AC_OPTION_HARDWARE($hw_enabled,$hw_devices,$hw_extra_devices)
-AC_SUBST(mips_extra_objs)
-
-
-# Choose simulator engine
-case "${target}" in
- *) mips_igen_engine="engine.o"
- ;;
-esac
-AC_SUBST(mips_igen_engine)
-
-
-AC_PATH_X
-mips_extra_libs=""
-AC_SUBST(mips_extra_libs)
-
-AC_CHECK_HEADERS(string.h strings.h stdlib.h stdlib.h)
-AC_CHECK_LIB(m, fabs)
-AC_CHECK_FUNCS(aint anint sqrt)
-
-SIM_AC_OUTPUT
diff --git a/sim/mips/dv-tx3904cpu.c b/sim/mips/dv-tx3904cpu.c
deleted file mode 100644
index 07b8521fc6f..00000000000
--- a/sim/mips/dv-tx3904cpu.c
+++ /dev/null
@@ -1,246 +0,0 @@
-/* This file is part of the program GDB, the GNU debugger.
-
- Copyright (C) 1998 Free Software Foundation, Inc.
- Contributed by Cygnus Solutions.
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-#include "sim-main.h"
-#include "hw-main.h"
-
-/* DEVICE
-
-
- tx3904cpu - tx3904 cpu virtual device
-
-
- DESCRIPTION
-
-
- Implements the external tx3904 functionality. This includes the
- delivery of of interrupts generated from other devices and the
- handling of device specific registers.
-
-
- PROPERTIES
-
- none
-
-
- PORTS
-
-
- reset (input)
-
- Currently ignored.
-
-
- nmi (input)
-
- Deliver a non-maskable interrupt to the processor.
-
-
- level (input)
-
- Deliver a maskable interrupt of given level, corresponding to
- IP[5:0], to processor.
-
-
-
- BUGS
-
-
- When delivering an interrupt, this code assumes that there is only
- one processor (number 0).
-
- This code does not attempt to be efficient at handling pending
- interrupts. It simply schedules the interrupt delivery handler
- every instruction cycle until all pending interrupts go away. An
- alternative implementation might modify instructions that change
- the PSW and have them check to see if the change makes an interrupt
- delivery possible.
-
- */
-
-
-
-struct tx3904cpu {
- /* Pending interrupts for delivery by event handler */
- int pending_reset, pending_nmi, pending_level;
- struct hw_event* event;
-};
-
-
-
-/* input port ID's */
-
-enum {
- RESET_PORT,
- NMI_PORT,
- LEVEL_PORT,
-};
-
-
-static const struct hw_port_descriptor tx3904cpu_ports[] = {
-
- /* interrupt inputs */
- { "reset", RESET_PORT, 0, input_port, },
- { "nmi", NMI_PORT, 0, input_port, },
- { "level", LEVEL_PORT, 0, input_port, },
-
- { NULL, },
-};
-
-
-/* Finish off the partially created hw device. Attach our local
- callbacks. Wire up our port names etc */
-
-static hw_port_event_method tx3904cpu_port_event;
-
-
-
-static void
-tx3904cpu_finish (struct hw *me)
-{
- struct tx3904cpu *controller;
-
- controller = HW_ZALLOC (me, struct tx3904cpu);
- set_hw_data (me, controller);
- set_hw_ports (me, tx3904cpu_ports);
- set_hw_port_event (me, tx3904cpu_port_event);
-
- /* Initialize the pending interrupt flags */
- controller->pending_level = 0;
- controller->pending_reset = 0;
- controller->pending_nmi = 0;
- controller->event = NULL;
-}
-
-
-
-/* An event arrives on an interrupt port */
-
-static void
-deliver_tx3904cpu_interrupt (struct hw *me,
- void *data)
-{
- struct tx3904cpu *controller = hw_data (me);
- SIM_DESC sd = hw_system (me);
- sim_cpu *cpu = STATE_CPU (sd, 0); /* NB: fix CPU 0. */
- address_word cia = CIA_GET (cpu);
-
-#define CPU cpu
-#define SD current_state
-
- if (controller->pending_reset)
- {
- controller->pending_reset = 0;
- HW_TRACE ((me, "reset pc=0x%08lx", (long) CIA_GET (cpu)));
- SignalExceptionNMIReset();
- }
- else if (controller->pending_nmi)
- {
- controller->pending_nmi = 0;
- HW_TRACE ((me, "nmi pc=0x%08lx", (long) CIA_GET (cpu)));
- SignalExceptionNMIReset();
- }
- else if (controller->pending_level)
- {
- HW_TRACE ((me, "interrupt level=%d pc=0x%08lx sr=0x%08lx",
- controller->pending_level,
- (long) CIA_GET (cpu), (long) SR));
-
- /* Clear CAUSE register. It may stay this way if the interrupt
- was cleared with a negative pending_level. */
- CAUSE &= ~ (cause_IP_mask << cause_IP_shift);
-
- if(controller->pending_level > 0) /* interrupt set */
- {
- /* set hardware-interrupt subfields of CAUSE register */
- CAUSE |= (controller->pending_level & cause_IP_mask) << cause_IP_shift;
-
- /* check for enabled / unmasked interrupts */
- if((SR & status_IEc) &&
- (controller->pending_level & ((SR >> status_IM_shift) & status_IM_mask)))
- {
- controller->pending_level = 0;
- SignalExceptionInterrupt(0 /* dummy value */);
- }
- else
- {
- /* reschedule soon */
- if(controller->event != NULL)
- hw_event_queue_deschedule(me, controller->event);
- controller->event =
- hw_event_queue_schedule (me, 1, deliver_tx3904cpu_interrupt, NULL);
- }
- } /* interrupt set */
- }
-#undef CPU cpu
-#undef SD current_state
-}
-
-
-static void
-tx3904cpu_port_event (struct hw *me,
- int my_port,
- struct hw *source,
- int source_port,
- int level)
-{
- struct tx3904cpu *controller = hw_data (me);
-
- switch (my_port)
- {
- case RESET_PORT:
- controller->pending_reset = 1;
- HW_TRACE ((me, "port-in reset"));
- break;
-
- case NMI_PORT:
- controller->pending_nmi = 1;
- HW_TRACE ((me, "port-in nmi"));
- break;
-
- case LEVEL_PORT:
- /* level == 0 means that the interrupt was cleared */
- if(level == 0)
- controller->pending_level = -1; /* signal end of interrupt */
- else
- controller->pending_level = level;
- HW_TRACE ((me, "port-in level=%d", level));
- break;
-
- default:
- hw_abort (me, "bad switch");
- break;
- }
-
- /* Schedule an event to be delivered immediately after current
- instruction. */
- if(controller->event != NULL)
- hw_event_queue_deschedule(me, controller->event);
- controller->event =
- hw_event_queue_schedule (me, 0, deliver_tx3904cpu_interrupt, NULL);
-}
-
-
-const struct hw_descriptor dv_tx3904cpu_descriptor[] = {
- { "tx3904cpu", tx3904cpu_finish, },
- { NULL },
-};
diff --git a/sim/mips/dv-tx3904irc.c b/sim/mips/dv-tx3904irc.c
deleted file mode 100644
index 8b84e5c7d28..00000000000
--- a/sim/mips/dv-tx3904irc.c
+++ /dev/null
@@ -1,413 +0,0 @@
-/* This file is part of the program GDB, the GNU debugger.
-
- Copyright (C) 1998 Free Software Foundation, Inc.
- Contributed by Cygnus Solutions.
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-#include "sim-main.h"
-#include "hw-main.h"
-
-
-/* DEVICE
-
-
- tx3904irc - tx3904 interrupt controller
-
-
- DESCRIPTION
-
-
- Implements the tx3904 interrupt controller described in the tx3904
- user guide. It does not include the interrupt detection circuit
- that preprocesses the eight external interrupts, so assumes that
- each event on an input interrupt port signals a new interrupt.
- That is, it implements edge- rather than level-triggered
- interrupts.
-
- This implementation does not support multiple concurrent
- interrupts.
-
-
- PROPERTIES
-
-
- reg <base> <length>
-
- Base of IRC control register bank. <length> must equal 0x20.
- Registers offsets: 0: ISR: interrupt status register
- 4: IMR: interrupt mask register
- 16: ILR0: interrupt level register 3..0
- 20: ILR1: interrupt level register 7..4
- 24: ILR2: interrupt level register 11..8
- 28: ILR3: interrupt level register 15..12
-
-
-
- PORTS
-
-
- ip (output)
-
- Interrupt priority port. An event is generated when an interrupt
- of a sufficient priority is passed through the IRC. The value
- associated with the event is the interrupt level (16-31), as given
- for bits IP[5:0] in the book TMPR3904F Rev. 2.0, pg. 11-3. Note
- that even though INT[0] is tied externally to IP[5], we simulate
- it as passing through the controller.
-
- An output level of zero signals the clearing of a level interrupt.
-
-
- int0-7 (input)
-
- External interrupts. Level = 0 -> level interrupt cleared.
-
-
- dmac0-3 (input)
-
- DMA internal interrupts, correspond to DMA channels 0-3. Level = 0 -> level interrupt cleared.
-
-
- sio0-1 (input)
-
- SIO internal interrupts. Level = 0 -> level interrupt cleared.
-
-
- tmr0-2 (input)
-
- Timer internal interrupts. Level = 0 -> level interrupt cleared.
-
- */
-
-
-
-
-
-/* register numbers; each is one word long */
-enum
-{
- ISR_REG = 0,
- IMR_REG = 1,
- ILR0_REG = 4,
- ILR1_REG = 5,
- ILR2_REG = 6,
- ILR3_REG = 7,
-};
-
-
-/* port ID's */
-
-enum
-{
- /* inputs, ordered to correspond to interrupt sources 0..15 */
- INT1_PORT = 0, INT2_PORT, INT3_PORT, INT4_PORT, INT5_PORT, INT6_PORT, INT7_PORT,
- DMAC3_PORT, DMAC2_PORT, DMAC1_PORT, DMAC0_PORT, SIO0_PORT, SIO1_PORT,
- TMR0_PORT, TMR1_PORT, TMR2_PORT,
-
- /* special INT[0] port */
- INT0_PORT,
-
- /* reset */
- RESET_PORT,
-
- /* output */
- IP_PORT
-};
-
-
-static const struct hw_port_descriptor tx3904irc_ports[] = {
-
- /* interrupt output */
-
- { "ip", IP_PORT, 0, output_port, },
-
- /* interrupt inputs (as names) */
- /* in increasing order of level number */
-
- { "int1", INT1_PORT, 0, input_port, },
- { "int2", INT2_PORT, 0, input_port, },
- { "int3", INT3_PORT, 0, input_port, },
- { "int4", INT4_PORT, 0, input_port, },
- { "int5", INT5_PORT, 0, input_port, },
- { "int6", INT6_PORT, 0, input_port, },
- { "int7", INT7_PORT, 0, input_port, },
-
- { "dmac3", DMAC3_PORT, 0, input_port, },
- { "dmac2", DMAC2_PORT, 0, input_port, },
- { "dmac1", DMAC1_PORT, 0, input_port, },
- { "dmac0", DMAC0_PORT, 0, input_port, },
-
- { "sio0", SIO0_PORT, 0, input_port, },
- { "sio1", SIO1_PORT, 0, input_port, },
-
- { "tmr0", TMR0_PORT, 0, input_port, },
- { "tmr1", TMR1_PORT, 0, input_port, },
- { "tmr2", TMR2_PORT, 0, input_port, },
-
- { "reset", RESET_PORT, 0, input_port, },
- { "int0", INT0_PORT, 0, input_port, },
-
- { NULL, },
-};
-
-
-#define NR_SOURCES (TMR3_PORT - INT1_PORT + 1) /* 16: number of interrupt sources */
-
-
-/* The interrupt controller register internal state. Note that we
- store state using the control register images, in host endian
- order. */
-
-struct tx3904irc {
- address_word base_address; /* control register base */
- unsigned_4 isr;
-#define ISR_SET(c,s) ((c)->isr &= ~ (1 << (s)))
- unsigned_4 imr;
-#define IMR_GET(c) ((c)->imr)
- unsigned_4 ilr[4];
-#define ILR_GET(c,s) LSEXTRACTED32((c)->ilr[(s)/4], (s) % 4 * 8 + 2, (s) % 4 * 8)
-};
-
-
-
-/* Finish off the partially created hw device. Attach our local
- callbacks. Wire up our port names etc */
-
-static hw_io_read_buffer_method tx3904irc_io_read_buffer;
-static hw_io_write_buffer_method tx3904irc_io_write_buffer;
-static hw_port_event_method tx3904irc_port_event;
-
-static void
-attach_tx3904irc_regs (struct hw *me,
- struct tx3904irc *controller)
-{
- unsigned_word attach_address;
- int attach_space;
- unsigned attach_size;
- reg_property_spec reg;
-
- if (hw_find_property (me, "reg") == NULL)
- hw_abort (me, "Missing \"reg\" property");
-
- if (!hw_find_reg_array_property (me, "reg", 0, &reg))
- hw_abort (me, "\"reg\" property must contain one addr/size entry");
-
- hw_unit_address_to_attach_address (hw_parent (me),
- &reg.address,
- &attach_space,
- &attach_address,
- me);
- hw_unit_size_to_attach_size (hw_parent (me),
- &reg.size,
- &attach_size, me);
-
- hw_attach_address (hw_parent (me), 0,
- attach_space, attach_address, attach_size,
- me);
-
- controller->base_address = attach_address;
-}
-
-
-static void
-tx3904irc_finish (struct hw *me)
-{
- struct tx3904irc *controller;
-
- controller = HW_ZALLOC (me, struct tx3904irc);
- set_hw_data (me, controller);
- set_hw_io_read_buffer (me, tx3904irc_io_read_buffer);
- set_hw_io_write_buffer (me, tx3904irc_io_write_buffer);
- set_hw_ports (me, tx3904irc_ports);
- set_hw_port_event (me, tx3904irc_port_event);
-
- /* Attach ourself to our parent bus */
- attach_tx3904irc_regs (me, controller);
-
- /* Initialize to reset state */
- controller->isr = 0x0000ffff;
- controller->imr = 0;
- controller->ilr[0] =
- controller->ilr[1] =
- controller->ilr[2] =
- controller->ilr[3] = 0;
-}
-
-
-
-/* An event arrives on an interrupt port */
-
-static void
-tx3904irc_port_event (struct hw *me,
- int my_port,
- struct hw *source_dev,
- int source_port,
- int level)
-{
- struct tx3904irc *controller = hw_data (me);
-
- /* handle deactivated interrupt */
- if(level == 0)
- {
- HW_TRACE ((me, "interrupt cleared on port %d", my_port));
- hw_port_event(me, IP_PORT, 0);
- return;
- }
-
- switch (my_port)
- {
- case INT0_PORT:
- {
- int ip_number = 32; /* compute IP[5:0] */
- HW_TRACE ((me, "port-event INT[0]"));
- hw_port_event(me, IP_PORT, ip_number);
- break;
- }
-
- case INT1_PORT: case INT2_PORT: case INT3_PORT: case INT4_PORT:
- case INT5_PORT: case INT6_PORT: case INT7_PORT: case DMAC3_PORT:
- case DMAC2_PORT: case DMAC1_PORT: case DMAC0_PORT: case SIO0_PORT:
- case SIO1_PORT: case TMR0_PORT: case TMR1_PORT: case TMR2_PORT:
- {
- int source = my_port - INT1_PORT;
-
- HW_TRACE ((me, "interrupt asserted on port %d", source));
- ISR_SET(controller, source);
- if(ILR_GET(controller, source) > IMR_GET(controller))
- {
- int ip_number = 16 + source; /* compute IP[4:0] */
- HW_TRACE ((me, "interrupt level %d", ILR_GET(controller,source)));
- hw_port_event(me, IP_PORT, ip_number);
- }
- break;
- }
-
- case RESET_PORT:
- {
- HW_TRACE ((me, "reset"));
- controller->isr = 0x0000ffff;
- controller->imr = 0;
- controller->ilr[0] =
- controller->ilr[1] =
- controller->ilr[2] =
- controller->ilr[3] = 0;
- break;
- }
-
- case IP_PORT:
- hw_abort (me, "Event on output port %d", my_port);
- break;
-
- default:
- hw_abort (me, "Event on unknown port %d", my_port);
- break;
- }
-}
-
-
-/* generic read/write */
-
-static unsigned
-tx3904irc_io_read_buffer (struct hw *me,
- void *dest,
- int space,
- unsigned_word base,
- unsigned nr_bytes)
-{
- struct tx3904irc *controller = hw_data (me);
- unsigned byte;
-
- HW_TRACE ((me, "read 0x%08lx %d", (long) base, (int) nr_bytes));
- for (byte = 0; byte < nr_bytes; byte++)
- {
- address_word address = base + byte;
- int reg_number = (address - controller->base_address) / 4;
- int reg_offset = (address - controller->base_address) % 4;
- unsigned_4 register_value; /* in target byte order */
-
- /* fill in entire register_value word */
- switch (reg_number)
- {
- case ISR_REG: register_value = controller->isr; break;
- case IMR_REG: register_value = controller->imr; break;
- case ILR0_REG: register_value = controller->ilr[0]; break;
- case ILR1_REG: register_value = controller->ilr[1]; break;
- case ILR2_REG: register_value = controller->ilr[2]; break;
- case ILR3_REG: register_value = controller->ilr[3]; break;
- default: register_value = 0;
- }
-
- /* write requested byte out */
- register_value = H2T_4(register_value);
- memcpy ((char*) dest + byte, ((char*)& register_value)+reg_offset, 1);
- }
-
- return nr_bytes;
-}
-
-
-
-static unsigned
-tx3904irc_io_write_buffer (struct hw *me,
- const void *source,
- int space,
- unsigned_word base,
- unsigned nr_bytes)
-{
- struct tx3904irc *controller = hw_data (me);
- unsigned byte;
-
- HW_TRACE ((me, "write 0x%08lx %d", (long) base, (int) nr_bytes));
- for (byte = 0; byte < nr_bytes; byte++)
- {
- address_word address = base + byte;
- int reg_number = (address - controller->base_address) / 4;
- int reg_offset = (address - controller->base_address) % 4;
- unsigned_4* register_ptr;
- unsigned_4 register_value;
-
- /* fill in entire register_value word */
- switch (reg_number)
- {
- case ISR_REG: register_ptr = & controller->isr; break;
- case IMR_REG: register_ptr = & controller->imr; break;
- case ILR0_REG: register_ptr = & controller->ilr[0]; break;
- case ILR1_REG: register_ptr = & controller->ilr[1]; break;
- case ILR2_REG: register_ptr = & controller->ilr[2]; break;
- case ILR3_REG: register_ptr = & controller->ilr[3]; break;
- default: register_ptr = & register_value; /* used as a dummy */
- }
-
- /* HW_TRACE ((me, "reg %d pre: %08lx", reg_number, (long) *register_ptr)); */
-
- /* overwrite requested byte */
- register_value = H2T_4(* register_ptr);
- memcpy (((char*)&register_value)+reg_offset, (const char*)source + byte, 1);
- * register_ptr = T2H_4(register_value);
-
- /* HW_TRACE ((me, "post: %08lx", (long) *register_ptr)); */
- }
- return nr_bytes;
-}
-
-
-const struct hw_descriptor dv_tx3904irc_descriptor[] = {
- { "tx3904irc", tx3904irc_finish, },
- { NULL },
-};
diff --git a/sim/mips/dv-tx3904sio.c b/sim/mips/dv-tx3904sio.c
deleted file mode 100644
index 5ba8e37a82e..00000000000
--- a/sim/mips/dv-tx3904sio.c
+++ /dev/null
@@ -1,622 +0,0 @@
-/* This file is part of the program GDB, the GNU debugger.
-
- Copyright (C) 1998, 1999 Free Software Foundation, Inc.
- Contributed by Cygnus Solutions.
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-#include "sim-main.h"
-#include "hw-main.h"
-#include "dv-sockser.h"
-#include "sim-assert.h"
-
-
-/* DEVICE
-
-
- tx3904sio - tx3904 serial I/O
-
-
- DESCRIPTION
-
-
- Implements one tx3904 serial I/O controller described in the tx3904
- user guide. Three instances are required for SIO0 and SIO1 within
- the tx3904, at different base addresses.
-
- Both internal and system clocks are synthesized as divided versions
- of the simulator clock.
-
- There is no support for:
- - CTS/RTS flow control
- - baud rate emulation - use infinite speed instead
- - general frame format - use 8N1
- - multi-controller system
- - DMA - use interrupt-driven or polled-I/O instead
-
-
- PROPERTIES
-
-
- reg <base> <length>
-
- Base of SIO control register bank. <length> must equal 0x100.
- Register offsets: 0: SLCR: line control register
- 4: SLSR: line status register
- 8: SDICR: DMA/interrupt control register
- 12: SDISR: DMA/interrupt status register
- 16: SFCR: FIFO control register
- 20: SBGR: baud rate control register
- 32: transfer FIFO buffer
- 48: transfer FIFO buffer
-
- backend {tcp | stdio}
-
- Use dv-sockser TCP-port backend or stdio for backend. Default: stdio.
-
-
-
- PORTS
-
-
- int (output)
-
- Interrupt port. An event is generated when a timer interrupt
- occurs.
-
-
- reset (input)
-
- Reset port.
-
- */
-
-
-
-/* static functions */
-
-struct tx3904sio_fifo;
-
-static void tx3904sio_tickle(struct hw*);
-static int tx3904sio_fifo_nonempty(struct hw*, struct tx3904sio_fifo*);
-static char tx3904sio_fifo_pop(struct hw*, struct tx3904sio_fifo*);
-static void tx3904sio_fifo_push(struct hw*, struct tx3904sio_fifo*, char);
-static void tx3904sio_fifo_reset(struct hw*, struct tx3904sio_fifo*);
-static void tx3904sio_poll(struct hw*, void* data);
-
-
-/* register numbers; each is one word long */
-enum
-{
- SLCR_REG = 0,
- SLSR_REG = 1,
- SDICR_REG = 2,
- SDISR_REG = 3,
- SFCR_REG = 4,
- SBGR_REG = 5,
- TFIFO_REG = 8,
- SFIFO_REG = 12,
-};
-
-
-
-/* port ID's */
-
-enum
- {
- RESET_PORT,
- INT_PORT,
-};
-
-
-static const struct hw_port_descriptor tx3904sio_ports[] =
-{
- { "int", INT_PORT, 0, output_port, },
- { "reset", RESET_PORT, 0, input_port, },
- { NULL, },
-};
-
-
-
-/* Generic FIFO */
-struct tx3904sio_fifo
-{
- int size, used;
- unsigned_1 *buffer;
-};
-
-
-
-/* The timer/counter register internal state. Note that we store
- state using the control register images, in host endian order. */
-
-struct tx3904sio
-{
- address_word base_address; /* control register base */
- enum {sio_tcp, sio_stdio} backend; /* backend */
-
- struct tx3904sio_fifo rx_fifo, tx_fifo; /* FIFOs */
-
- unsigned_4 slcr;
-#define SLCR_WR_MASK 0xe17f0000U
-#define SLCR_SET_BYTE(c,o,b) ((c)->slcr = SLCR_WR_MASK & (((c)->slcr & ~LSMASK32((o)*8+7,(o)*8)) | ((b)<< (o)*8)))
- unsigned_4 slsr;
-#define SLSR_WR_MASK 0x00000000 /* UFER/UPER/UOER unimplemented */
- unsigned_4 sdicr;
-#define SDICR_WR_MASK 0x000f0000U
-#define SDICR_SET_BYTE(c,o,b) ((c)->sdicr = SDICR_WR_MASK & (((c)->sdicr & ~LSMASK32((o)*8+7,(o)*8)) | ((b)<< (o)*8)))
-#define SDICR_GET_SDMAE(c) ((c)->sdicr & 0x00080000)
-#define SDICR_GET_ERIE(c) ((c)->sdicr & 0x00040000)
-#define SDICR_GET_TDIE(c) ((c)->sdicr & 0x00020000)
-#define SDICR_GET_RDIE(c) ((c)->sdicr & 0x00010000)
- unsigned_4 sdisr;
-#define SDISR_WR_MASK 0x00070000U
-#define SDISR_SET_BYTE(c,o,b) ((c)->sdisr = SDISR_WR_MASK & (((c)->sdisr & ~LSMASK32((o)*8+7,(o)*8)) | ((b)<< (o)*8)))
-#define SDISR_CLEAR_FLAG_BYTE(c,o,b) ((c)->sdisr = SDISR_WR_MASK & (((c)->sdisr & ~LSMASK32((o)*8+7,(o)*8)) & ((b)<< (o)*8)))
-#define SDISR_GET_TDIS(c) ((c)->sdisr & 0x00020000)
-#define SDISR_SET_TDIS(c) ((c)->sdisr |= 0x00020000)
-#define SDISR_GET_RDIS(c) ((c)->sdisr & 0x00010000)
-#define SDISR_SET_RDIS(c) ((c)->sdisr |= 0x00010000)
- unsigned_4 sfcr;
-#define SFCR_WR_MASK 0x001f0000U
-#define SFCR_SET_BYTE(c,o,b) ((c)->sfcr = SFCR_WR_MASK & (((c)->sfcr & ~LSMASK32((o)*8+7,(o)*8)) | ((b)<< (o)*8)))
-#define SFCR_GET_TFRST(c) ((c)->sfcr & 0x00040000)
-#define SFCR_GET_RFRST(c) ((c)->sfcr & 0x00020000)
-#define SFCR_GET_FRSTE(c) ((c)->sfcr & 0x00010000)
- unsigned_4 sbgr;
-#define SBGR_WR_MASK 0x03ff0000U
-#define SBGR_SET_BYTE(c,o,b) ((c)->sbgr = SBGR_WR_MASK & (((c)->sbgr & ~LSMASK32((o)*8+7,(o)*8)) | ((b)<< (o)*8)))
-
- /* Periodic I/O polling */
- struct hw_event* poll_event;
-};
-
-
-
-/* Finish off the partially created hw device. Attach our local
- callbacks. Wire up our port names etc */
-
-static hw_io_read_buffer_method tx3904sio_io_read_buffer;
-static hw_io_write_buffer_method tx3904sio_io_write_buffer;
-static hw_port_event_method tx3904sio_port_event;
-
-
-static void
-attach_tx3904sio_regs (struct hw *me,
- struct tx3904sio *controller)
-{
- unsigned_word attach_address;
- int attach_space;
- unsigned attach_size;
- reg_property_spec reg;
-
- if (hw_find_property (me, "reg") == NULL)
- hw_abort (me, "Missing \"reg\" property");
-
- if (!hw_find_reg_array_property (me, "reg", 0, &reg))
- hw_abort (me, "\"reg\" property must contain one addr/size entry");
-
- hw_unit_address_to_attach_address (hw_parent (me),
- &reg.address,
- &attach_space,
- &attach_address,
- me);
- hw_unit_size_to_attach_size (hw_parent (me),
- &reg.size,
- &attach_size, me);
-
- hw_attach_address (hw_parent (me), 0,
- attach_space, attach_address, attach_size,
- me);
-
- if(hw_find_property(me, "backend") != NULL)
- {
- const char* value = hw_find_string_property(me, "backend");
- if(! strcmp(value, "tcp"))
- controller->backend = sio_tcp;
- else if(! strcmp(value, "stdio"))
- controller->backend = sio_stdio;
- else
- hw_abort(me, "illegal value for backend parameter `%s': use tcp or stdio", value);
- }
-
- controller->base_address = attach_address;
-}
-
-
-static void
-tx3904sio_finish (struct hw *me)
-{
- struct tx3904sio *controller;
-
- controller = HW_ZALLOC (me, struct tx3904sio);
- set_hw_data (me, controller);
- set_hw_io_read_buffer (me, tx3904sio_io_read_buffer);
- set_hw_io_write_buffer (me, tx3904sio_io_write_buffer);
- set_hw_ports (me, tx3904sio_ports);
- set_hw_port_event (me, tx3904sio_port_event);
-
- /* Preset defaults */
- controller->backend = sio_stdio;
-
- /* Attach ourself to our parent bus */
- attach_tx3904sio_regs (me, controller);
-
- /* Initialize to reset state */
- tx3904sio_fifo_reset(me, & controller->rx_fifo);
- tx3904sio_fifo_reset(me, & controller->tx_fifo);
- controller->slsr = controller->sdicr
- = controller->sdisr = controller->sfcr
- = controller->sbgr = 0;
- controller->slcr = 0x40000000; /* set TWUB */
- controller->sbgr = 0x03ff0000; /* set BCLK=3, BRD=FF */
- controller->poll_event = NULL;
-}
-
-
-
-/* An event arrives on an interrupt port */
-
-static void
-tx3904sio_port_event (struct hw *me,
- int my_port,
- struct hw *source,
- int source_port,
- int level)
-{
- struct tx3904sio *controller = hw_data (me);
-
- switch (my_port)
- {
- case RESET_PORT:
- {
- HW_TRACE ((me, "reset"));
-
- tx3904sio_fifo_reset(me, & controller->rx_fifo);
- tx3904sio_fifo_reset(me, & controller->tx_fifo);
- controller->slsr = controller->sdicr
- = controller->sdisr = controller->sfcr
- = controller->sbgr = 0;
- controller->slcr = 0x40000000; /* set TWUB */
- controller->sbgr = 0x03ff0000; /* set BCLK=3, BRD=FF */
- /* Don't interfere with I/O poller. */
- break;
- }
-
- default:
- hw_abort (me, "Event on unknown port %d", my_port);
- break;
- }
-}
-
-
-/* generic read/write */
-
-static unsigned
-tx3904sio_io_read_buffer (struct hw *me,
- void *dest,
- int space,
- unsigned_word base,
- unsigned nr_bytes)
-{
- struct tx3904sio *controller = hw_data (me);
- unsigned byte;
-
- HW_TRACE ((me, "read 0x%08lx %d", (long) base, (int) nr_bytes));
-
- /* tickle fifos */
- tx3904sio_tickle(me);
-
- for (byte = 0; byte < nr_bytes; byte++)
- {
- address_word address = base + byte;
- int reg_number = (address - controller->base_address) / 4;
- int reg_offset = (address - controller->base_address) % 4;
- unsigned_4 register_value; /* in target byte order */
-
- /* fill in entire register_value word */
- switch (reg_number)
- {
- case SLCR_REG: register_value = controller->slcr; break;
- case SLSR_REG: register_value = controller->slsr; break;
- case SDICR_REG: register_value = controller->sdicr; break;
- case SDISR_REG: register_value = controller->sdisr; break;
- case SFCR_REG: register_value = controller->sfcr; break;
- case SBGR_REG: register_value = controller->sbgr; break;
- case TFIFO_REG: register_value = 0; break;
- case SFIFO_REG:
- /* consume rx fifo for MS byte */
- if(reg_offset == 0 && tx3904sio_fifo_nonempty(me, & controller->rx_fifo))
- register_value = (tx3904sio_fifo_pop(me, & controller->rx_fifo) << 24);
- else
- register_value = 0;
- break;
- default: register_value = 0;
- }
-
- /* write requested byte out */
- register_value = H2T_4(register_value);
- /* HW_TRACE ((me, "byte %d %02x", reg_offset, ((char*)& register_value)[reg_offset])); */
- memcpy ((char*) dest + byte, ((char*)& register_value)+reg_offset, 1);
- }
-
- return nr_bytes;
-}
-
-
-
-static unsigned
-tx3904sio_io_write_buffer (struct hw *me,
- const void *source,
- int space,
- unsigned_word base,
- unsigned nr_bytes)
-{
- struct tx3904sio *controller = hw_data (me);
- unsigned byte;
-
- HW_TRACE ((me, "write 0x%08lx %d", (long) base, (int) nr_bytes));
- for (byte = 0; byte < nr_bytes; byte++)
- {
- address_word address = base + byte;
- unsigned_1 write_byte = ((const unsigned char*) source)[byte];
- int reg_number = (address - controller->base_address) / 4;
- int reg_offset = 3 - (address - controller->base_address) % 4;
-
- /* HW_TRACE ((me, "byte %d %02x", reg_offset, write_byte)); */
-
- /* fill in entire register_value word */
- switch (reg_number)
- {
- case SLCR_REG:
- SLCR_SET_BYTE(controller, reg_offset, write_byte);
- break;
-
- case SLSR_REG: /* unwriteable */ break;
-
- case SDICR_REG:
- {
- unsigned_4 last_int, next_int;
-
- /* deassert interrupt upon clear */
- last_int = controller->sdisr & controller->sdicr;
- /* HW_TRACE ((me, "sdicr - sdisr %08x sdicr %08x",
- controller->sdisr, controller->sdicr)); */
- SDICR_SET_BYTE(controller, reg_offset, write_byte);
- /* HW_TRACE ((me, "sdicr + sdisr %08x sdicr %08x",
- controller->sdisr, controller->sdicr)); */
- next_int = controller->sdisr & controller->sdicr;
-
- if(SDICR_GET_SDMAE(controller))
- hw_abort(me, "Cannot support DMA-driven sio.");
-
- if(~last_int & next_int) /* any bits set? */
- hw_port_event(me, INT_PORT, 1);
- if(last_int & ~next_int) /* any bits cleared? */
- hw_port_event(me, INT_PORT, 0);
- }
- break;
-
- case SDISR_REG:
- {
- unsigned_4 last_int, next_int;
-
- /* deassert interrupt upon clear */
- last_int = controller->sdisr & controller->sdicr;
- /* HW_TRACE ((me, "sdisr - sdisr %08x sdicr %08x",
- controller->sdisr, controller->sdicr)); */
- SDISR_CLEAR_FLAG_BYTE(controller, reg_offset, write_byte);
- /* HW_TRACE ((me, "sdisr + sdisr %08x sdicr %08x",
- controller->sdisr, controller->sdicr)); */
- next_int = controller->sdisr & controller->sdicr;
-
- if(~last_int & next_int) /* any bits set? */
- hw_port_event(me, INT_PORT, 1);
- if(last_int & ~next_int) /* any bits cleared? */
- hw_port_event(me, INT_PORT, 0);
- }
- break;
-
- case SFCR_REG:
- SFCR_SET_BYTE(controller, reg_offset, write_byte);
- if(SFCR_GET_FRSTE(controller))
- {
- if(SFCR_GET_TFRST(controller)) tx3904sio_fifo_reset(me, & controller->tx_fifo);
- if(SFCR_GET_RFRST(controller)) tx3904sio_fifo_reset(me, & controller->rx_fifo);
- }
- break;
-
- case SBGR_REG:
- SBGR_SET_BYTE(controller, reg_offset, write_byte);
- break;
-
- case SFIFO_REG: /* unwriteable */ break;
-
- case TFIFO_REG:
- if(reg_offset == 3) /* first byte */
- tx3904sio_fifo_push(me, & controller->tx_fifo, write_byte);
- break;
-
- default:
- HW_TRACE ((me, "write to illegal register %d", reg_number));
- }
- } /* loop over bytes */
-
- /* tickle fifos */
- tx3904sio_tickle(me);
-
- return nr_bytes;
-}
-
-
-
-
-
-
-/* Send enqueued characters from tx_fifo and trigger TX interrupt.
-Receive characters into rx_fifo and trigger RX interrupt. */
-void
-tx3904sio_tickle(struct hw *me)
-{
- struct tx3904sio* controller = hw_data(me);
- int c;
- char cc;
- unsigned_4 last_int, next_int;
-
- /* HW_TRACE ((me, "tickle backend: %02x", controller->backend)); */
- switch(controller->backend)
- {
- case sio_tcp:
-
- while(tx3904sio_fifo_nonempty(me, & controller->tx_fifo))
- {
- cc = tx3904sio_fifo_pop(me, & controller->tx_fifo);
- dv_sockser_write(hw_system(me), cc);
- HW_TRACE ((me, "tcp output: %02x", cc));
- }
-
- c = dv_sockser_read(hw_system(me));
- while(c != -1)
- {
- cc = (char) c;
- HW_TRACE ((me, "tcp input: %02x", cc));
- tx3904sio_fifo_push(me, & controller->rx_fifo, cc);
- c = dv_sockser_read(hw_system(me));
- }
- break;
-
- case sio_stdio:
-
- while(tx3904sio_fifo_nonempty(me, & controller->tx_fifo))
- {
- cc = tx3904sio_fifo_pop(me, & controller->tx_fifo);
- sim_io_write_stdout(hw_system(me), & cc, 1);
- sim_io_flush_stdout(hw_system(me));
- HW_TRACE ((me, "stdio output: %02x", cc));
- }
-
- c = sim_io_poll_read(hw_system(me), 0 /* stdin */, & cc, 1);
- while(c == 1)
- {
- HW_TRACE ((me, "stdio input: %02x", cc));
- tx3904sio_fifo_push(me, & controller->rx_fifo, cc);
- c = sim_io_poll_read(hw_system(me), 0 /* stdin */, & cc, 1);
- }
-
- break;
-
- default:
- hw_abort(me, "Illegal backend mode: %d", controller->backend);
- }
-
- /* Update RDIS / TDIS flags */
- last_int = controller->sdisr & controller->sdicr;
- /* HW_TRACE ((me, "tickle - sdisr %08x sdicr %08x", controller->sdisr, controller->sdicr)); */
- if(tx3904sio_fifo_nonempty(me, & controller->rx_fifo))
- SDISR_SET_RDIS(controller);
- if(! tx3904sio_fifo_nonempty(me, & controller->tx_fifo))
- SDISR_SET_TDIS(controller);
- next_int = controller->sdisr & controller->sdicr;
- /* HW_TRACE ((me, "tickle + sdisr %08x sdicr %08x", controller->sdisr, controller->sdicr)); */
-
- if(~last_int & next_int) /* any bits set? */
- hw_port_event(me, INT_PORT, 1);
- if(last_int & ~next_int) /* any bits cleared? */
- hw_port_event(me, INT_PORT, 0);
-
- /* Add periodic polling for this port, if it's not already going. */
- if(controller->poll_event == NULL)
- {
- controller->poll_event = hw_event_queue_schedule (me, 1000,
- tx3904sio_poll, NULL);
-
- }
-}
-
-
-
-
-int
-tx3904sio_fifo_nonempty(struct hw* me, struct tx3904sio_fifo* fifo)
-{
- /* HW_TRACE ((me, "fifo used: %d", fifo->used)); */
- return(fifo->used > 0);
-}
-
-
-char
-tx3904sio_fifo_pop(struct hw* me, struct tx3904sio_fifo* fifo)
-{
- char it;
- ASSERT(fifo->used > 0);
- ASSERT(fifo->buffer != NULL);
- it = fifo->buffer[0];
- memcpy(& fifo->buffer[0], & fifo->buffer[1], fifo->used - 1);
- fifo->used --;
- /* HW_TRACE ((me, "pop fifo -> %02x", it)); */
- return it;
-}
-
-
-void
-tx3904sio_fifo_push(struct hw* me, struct tx3904sio_fifo* fifo, char it)
-{
- /* HW_TRACE ((me, "push %02x -> fifo", it)); */
- if(fifo->size == fifo->used) /* full */
- {
- int next_size = fifo->size * 2 + 16;
- char* next_buf = zalloc(next_size);
- memcpy(next_buf, fifo->buffer, fifo->used);
-
- if(fifo->buffer != NULL) zfree(fifo->buffer);
- fifo->buffer = next_buf;
- fifo->size = next_size;
- }
-
- fifo->buffer[fifo->used] = it;
- fifo->used ++;
-}
-
-
-void
-tx3904sio_fifo_reset(struct hw* me, struct tx3904sio_fifo* fifo)
-{
- /* HW_TRACE ((me, "reset fifo")); */
- fifo->used = 0;
- fifo->size = 0;
- zfree(fifo->buffer);
- fifo->buffer = 0;
-}
-
-
-void
-tx3904sio_poll(struct hw* me, void* ignored)
-{
- struct tx3904sio* controller = hw_data (me);
- tx3904sio_tickle (me);
- hw_event_queue_deschedule (me, controller->poll_event);
- controller->poll_event = hw_event_queue_schedule (me, 1000,
- tx3904sio_poll, NULL);
-}
-
-
-
-const struct hw_descriptor dv_tx3904sio_descriptor[] = {
- { "tx3904sio", tx3904sio_finish, },
- { NULL },
-};
diff --git a/sim/mips/dv-tx3904tmr.c b/sim/mips/dv-tx3904tmr.c
deleted file mode 100644
index c1c7b8ce601..00000000000
--- a/sim/mips/dv-tx3904tmr.c
+++ /dev/null
@@ -1,698 +0,0 @@
-/* This file is part of the program GDB, the GNU debugger.
-
- Copyright (C) 1998 Free Software Foundation, Inc.
- Contributed by Cygnus Solutions.
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-#include "sim-main.h"
-#include "hw-main.h"
-
-
-/* DEVICE
-
-
- tx3904tmr - tx3904 timer
-
-
- DESCRIPTION
-
-
- Implements one tx3904 timer/counter described in the tx3904
- user guide. Three instances are required for TMR0, TMR1, and
- TMR3 within the tx3904, at different base addresses.
-
- Both internal and system clocks are synthesized as divided versions
- of the simulator clock.
-
- There is no support for:
- - edge sensitivity of external clock
- - different mode restrictions for TMR0..2
- - level interrupts (interrupts are treated as events that occur at edges)
-
-
-
- PROPERTIES
-
-
- reg <base> <length>
-
- Base of TMR control register bank. <length> must equal 0x100.
- Register offsets: 0: TCR: timer control register
- 4: TISR: timer interrupt status register
- 8: CPRA: compare register A
- 12: CPRB: compare register B
- 16: ITMR: interval timer mode register
- 32: CCDR: divider register
- 48: PMGR: pulse generator mode register
- 64: WTMR: watchdog timer mode register
- 240: TRR: timer read register
-
-
- clock <ticks>
-
- Rate of timer clock signal. This number is the number of simulator
- ticks per clock signal tick. Default 1.
-
-
- ext <ticks>
-
- Rate of "external input clock signal", the other clock input of the
- timer. It uses the same scale as above. Default 100.
-
-
-
- PORTS
-
-
- int (output)
-
- Interrupt port. An event is generated when a timer interrupt
- occurs.
-
-
- ff (output)
-
- Flip-flop output, corresponds to the TMFFOUT port. An event is
- generated when flip-flop changes value. The integer associated
- with the event is 1/0 according to flip-flop value.
-
-
- reset (input)
-
- Reset port.
-
- */
-
-
-
-/* static functions */
-
-static void deliver_tx3904tmr_tick (struct hw *me, void *data);
-
-
-/* register numbers; each is one word long */
-enum
-{
- TCR_REG = 0,
- TISR_REG = 1,
- CPRA_REG = 2,
- CPRB_REG = 3,
- ITMR_REG = 4,
- CCDR_REG = 8,
- PMGR_REG = 12,
- WTMR_REG = 16,
- TRR_REG = 60
-};
-
-
-
-/* port ID's */
-
-enum
- {
- RESET_PORT,
- INT_PORT,
- FF_PORT
-};
-
-
-static const struct hw_port_descriptor tx3904tmr_ports[] =
-{
- { "int", INT_PORT, 0, output_port, },
- { "ff", FF_PORT, 0, output_port, },
- { "reset", RESET_PORT, 0, input_port, },
- { NULL, },
-};
-
-
-
-/* The timer/counter register internal state. Note that we store
- state using the control register images, in host endian order. */
-
-struct tx3904tmr {
- address_word base_address; /* control register base */
- unsigned_4 clock_ticks, ext_ticks; /* clock frequencies */
- signed_8 last_ticks; /* time at last deliver_*_tick call */
- signed_8 roundoff_ticks; /* sim ticks unprocessed during last tick call */
- int ff; /* pulse generator flip-flop value: 1/0 */
- struct hw_event* event; /* last scheduled event */
-
- unsigned_4 tcr;
-#define GET_TCR_TCE(c) (((c)->tcr & 0x80) >> 7)
-#define GET_TCR_CCDE(c) (((c)->tcr & 0x40) >> 6)
-#define GET_TCR_CRE(c) (((c)->tcr & 0x20) >> 5)
-#define GET_TCR_CCS(c) (((c)->tcr & 0x04) >> 2)
-#define GET_TCR_TMODE(c) (((c)->tcr & 0x03) >> 0)
- unsigned_4 tisr;
-#define SET_TISR_TWIS(c) ((c)->tisr |= 0x08)
-#define SET_TISR_TPIBS(c) ((c)->tisr |= 0x04)
-#define SET_TISR_TPIAS(c) ((c)->tisr |= 0x02)
-#define SET_TISR_TIIS(c) ((c)->tisr |= 0x01)
- unsigned_4 cpra;
- unsigned_4 cprb;
- unsigned_4 itmr;
-#define GET_ITMR_TIIE(c) (((c)->itmr & 0x8000) >> 15)
-#define SET_ITMR_TIIE(c,v) BLIT32((c)->itmr, 15, (v) ? 1 : 0)
-#define GET_ITMR_TZCE(c) (((c)->itmr & 0x0001) >> 0)
-#define SET_ITMR_TZCE(c,v) BLIT32((c)->itmr, 0, (v) ? 1 : 0)
- unsigned_4 ccdr;
-#define GET_CCDR_CDR(c) (((c)->ccdr & 0x07) >> 0)
- unsigned_4 pmgr;
-#define GET_PMGR_TPIBE(c) (((c)->pmgr & 0x8000) >> 15)
-#define SET_PMGR_TPIBE(c,v) BLIT32((c)->pmgr, 15, (v) ? 1 : 0)
-#define GET_PMGR_TPIAE(c) (((c)->pmgr & 0x4000) >> 14)
-#define SET_PMGR_TPIAE(c,v) BLIT32((c)->pmgr, 14, (v) ? 1 : 0)
-#define GET_PMGR_FFI(c) (((c)->pmgr & 0x0001) >> 0)
-#define SET_PMGR_FFI(c,v) BLIT32((c)->pmgr, 0, (v) ? 1 : 0)
- unsigned_4 wtmr;
-#define GET_WTMR_TWIE(c) (((c)->wtmr & 0x8000) >> 15)
-#define SET_WTMR_TWIE(c,v) BLIT32((c)->wtmr, 15, (v) ? 1 : 0)
-#define GET_WTMR_WDIS(c) (((c)->wtmr & 0x0080) >> 7)
-#define SET_WTMR_WDIS(c,v) BLIT32((c)->wtmr, 7, (v) ? 1 : 0)
-#define GET_WTMR_TWC(c) (((c)->wtmr & 0x0001) >> 0)
-#define SET_WTMR_TWC(c,v) BLIT32((c)->wtmr, 0, (v) ? 1 : 0)
- unsigned_4 trr;
-};
-
-
-
-/* Finish off the partially created hw device. Attach our local
- callbacks. Wire up our port names etc */
-
-static hw_io_read_buffer_method tx3904tmr_io_read_buffer;
-static hw_io_write_buffer_method tx3904tmr_io_write_buffer;
-static hw_port_event_method tx3904tmr_port_event;
-
-static void
-attach_tx3904tmr_regs (struct hw *me,
- struct tx3904tmr *controller)
-{
- unsigned_word attach_address;
- int attach_space;
- unsigned attach_size;
- reg_property_spec reg;
-
- if (hw_find_property (me, "reg") == NULL)
- hw_abort (me, "Missing \"reg\" property");
-
- if (!hw_find_reg_array_property (me, "reg", 0, &reg))
- hw_abort (me, "\"reg\" property must contain one addr/size entry");
-
- hw_unit_address_to_attach_address (hw_parent (me),
- &reg.address,
- &attach_space,
- &attach_address,
- me);
- hw_unit_size_to_attach_size (hw_parent (me),
- &reg.size,
- &attach_size, me);
-
- hw_attach_address (hw_parent (me), 0,
- attach_space, attach_address, attach_size,
- me);
-
- if(hw_find_property(me, "clock") != NULL)
- controller->clock_ticks = (unsigned_4) hw_find_integer_property(me, "clock");
-
- if(hw_find_property(me, "ext") != NULL)
- controller->ext_ticks = (unsigned_4) hw_find_integer_property(me, "ext");
-
- controller->base_address = attach_address;
-}
-
-
-static void
-tx3904tmr_finish (struct hw *me)
-{
- struct tx3904tmr *controller;
-
- controller = HW_ZALLOC (me, struct tx3904tmr);
- set_hw_data (me, controller);
- set_hw_io_read_buffer (me, tx3904tmr_io_read_buffer);
- set_hw_io_write_buffer (me, tx3904tmr_io_write_buffer);
- set_hw_ports (me, tx3904tmr_ports);
- set_hw_port_event (me, tx3904tmr_port_event);
-
- /* Preset clock dividers */
- controller->clock_ticks = 1;
- controller->ext_ticks = 100;
-
- /* Attach ourself to our parent bus */
- attach_tx3904tmr_regs (me, controller);
-
- /* Initialize to reset state */
- controller->tcr =
- controller->itmr =
- controller->ccdr =
- controller->pmgr =
- controller->wtmr =
- controller->tisr =
- controller->trr = 0;
- controller->cpra = controller->cprb = 0x00FFFFFF;
- controller->ff = 0;
- controller->last_ticks = controller->roundoff_ticks = 0;
- controller->event = NULL;
-}
-
-
-
-/* An event arrives on an interrupt port */
-
-static void
-tx3904tmr_port_event (struct hw *me,
- int my_port,
- struct hw *source,
- int source_port,
- int level)
-{
- struct tx3904tmr *controller = hw_data (me);
-
- switch (my_port)
- {
- case RESET_PORT:
- {
- HW_TRACE ((me, "reset"));
-
- /* preset flip-flop to FFI value */
- controller->ff = GET_PMGR_FFI(controller);
-
- controller->tcr =
- controller->itmr =
- controller->ccdr =
- controller->pmgr =
- controller->wtmr =
- controller->tisr =
- controller->trr = 0;
- controller->cpra = controller->cprb = 0x00FFFFFF;
- controller->last_ticks = controller->roundoff_ticks = 0;
- if(controller->event != NULL)
- hw_event_queue_deschedule(me, controller->event);
- controller->event = NULL;
- break;
- }
-
- default:
- hw_abort (me, "Event on unknown port %d", my_port);
- break;
- }
-}
-
-
-/* generic read/write */
-
-static unsigned
-tx3904tmr_io_read_buffer (struct hw *me,
- void *dest,
- int space,
- unsigned_word base,
- unsigned nr_bytes)
-{
- struct tx3904tmr *controller = hw_data (me);
- unsigned byte;
-
- HW_TRACE ((me, "read 0x%08lx %d", (long) base, (int) nr_bytes));
- for (byte = 0; byte < nr_bytes; byte++)
- {
- address_word address = base + byte;
- int reg_number = (address - controller->base_address) / 4;
- int reg_offset = 3 - (address - controller->base_address) % 4;
- unsigned_4 register_value; /* in target byte order */
-
- /* fill in entire register_value word */
- switch (reg_number)
- {
- case TCR_REG: register_value = controller->tcr; break;
- case TISR_REG: register_value = controller->tisr; break;
- case CPRA_REG: register_value = controller->cpra; break;
- case CPRB_REG: register_value = controller->cprb; break;
- case ITMR_REG: register_value = controller->itmr; break;
- case CCDR_REG: register_value = controller->ccdr; break;
- case PMGR_REG: register_value = controller->pmgr; break;
- case WTMR_REG: register_value = controller->wtmr; break;
- case TRR_REG: register_value = controller->trr; break;
- default: register_value = 0;
- }
-
- /* write requested byte out */
- memcpy ((char*) dest + byte, ((char*)& register_value)+reg_offset, 1);
- }
-
- return nr_bytes;
-}
-
-
-
-static unsigned
-tx3904tmr_io_write_buffer (struct hw *me,
- const void *source,
- int space,
- unsigned_word base,
- unsigned nr_bytes)
-{
- struct tx3904tmr *controller = hw_data (me);
- unsigned byte;
-
- HW_TRACE ((me, "write 0x%08lx %d", (long) base, (int) nr_bytes));
- for (byte = 0; byte < nr_bytes; byte++)
- {
- address_word address = base + byte;
- unsigned_1 write_byte = ((const char*) source)[byte];
- int reg_number = (address - controller->base_address) / 4;
- int reg_offset = 3 - (address - controller->base_address) % 4;
-
- /* fill in entire register_value word */
- switch (reg_number)
- {
- case TCR_REG:
- if(reg_offset == 0) /* first byte */
- {
- /* update register, but mask out NOP bits */
- controller->tcr = (unsigned_4) (write_byte & 0xef);
-
- /* Reset counter value if timer suspended and CRE is set. */
- if(GET_TCR_TCE(controller) == 0 &&
- GET_TCR_CRE(controller) == 1)
- controller->trr = 0;
- }
- /* HW_TRACE ((me, "tcr: %08lx", (long) controller->tcr)); */
- break;
-
- case ITMR_REG:
- if(reg_offset == 1) /* second byte */
- {
- SET_ITMR_TIIE(controller, write_byte & 0x80);
- }
- else if(reg_offset == 0) /* first byte */
- {
- SET_ITMR_TZCE(controller, write_byte & 0x01);
- }
- /* HW_TRACE ((me, "itmr: %08lx", (long) controller->itmr)); */
- break;
-
- case CCDR_REG:
- if(reg_offset == 0) /* first byte */
- {
- controller->ccdr = write_byte & 0x07;
- }
- /* HW_TRACE ((me, "ccdr: %08lx", (long) controller->ccdr)); */
- break;
-
- case PMGR_REG:
- if(reg_offset == 1) /* second byte */
- {
- SET_PMGR_TPIBE(controller, write_byte & 0x80);
- SET_PMGR_TPIAE(controller, write_byte & 0x40);
- }
- else if(reg_offset == 0) /* first byte */
- {
- SET_PMGR_FFI(controller, write_byte & 0x01);
- }
- /* HW_TRACE ((me, "pmgr: %08lx", (long) controller->pmgr)); */
- break;
-
- case WTMR_REG:
- if(reg_offset == 1) /* second byte */
- {
- SET_WTMR_TWIE(controller, write_byte & 0x80);
- }
- else if(reg_offset == 0) /* first byte */
- {
- SET_WTMR_WDIS(controller, write_byte & 0x80);
- SET_WTMR_TWC(controller, write_byte & 0x01);
- }
- /* HW_TRACE ((me, "wtmr: %08lx", (long) controller->wtmr)); */
- break;
-
- case TISR_REG:
- if(reg_offset == 0) /* first byte */
- {
- /* All bits must be zero in given byte, according to
- spec. */
-
- /* Send an "interrupt off" event on the interrupt port */
- if(controller->tisr != 0) /* any interrupts active? */
- {
- hw_port_event(me, INT_PORT, 0);
- }
-
- /* clear interrupt status register */
- controller->tisr = 0;
- }
- /* HW_TRACE ((me, "tisr: %08lx", (long) controller->tisr)); */
- break;
-
- case CPRA_REG:
- if(reg_offset < 3) /* first, second, or third byte */
- {
- MBLIT32(controller->cpra, (reg_offset*8)+7, (reg_offset*8), write_byte);
- }
- /* HW_TRACE ((me, "cpra: %08lx", (long) controller->cpra)); */
- break;
-
- case CPRB_REG:
- if(reg_offset < 3) /* first, second, or third byte */
- {
- MBLIT32(controller->cprb, (reg_offset*8)+7, (reg_offset*8), write_byte);
- }
- /* HW_TRACE ((me, "cprb: %08lx", (long) controller->cprb)); */
- break;
-
- default:
- HW_TRACE ((me, "write to illegal register %d", reg_number));
- }
- } /* loop over bytes */
-
- /* Schedule a timer event in near future, so we can increment or
- stop the counter, to respond to register updates. */
- hw_event_queue_schedule(me, 1, deliver_tx3904tmr_tick, NULL);
-
- return nr_bytes;
-}
-
-
-
-/* Deliver a clock tick to the counter. */
-static void
-deliver_tx3904tmr_tick (struct hw *me,
- void *data)
-{
- struct tx3904tmr *controller = hw_data (me);
- SIM_DESC sd = hw_system (me);
- signed_8 this_ticks = sim_events_time(sd);
-
- signed_8 warp;
- signed_8 divisor;
- signed_8 quotient, remainder;
-
- /* compute simulation ticks between last tick and this tick */
- if(controller->last_ticks != 0)
- warp = this_ticks - controller->last_ticks + controller->roundoff_ticks;
- else
- {
- controller->last_ticks = this_ticks; /* initialize */
- warp = controller->roundoff_ticks;
- }
-
- if(controller->event != NULL)
- hw_event_queue_deschedule(me, controller->event);
- controller->event = NULL;
-
- /* Check whether the timer ticking is enabled at this moment. This
- largely a function of the TCE bit, but is also slightly
- mode-dependent. */
- switch((int) GET_TCR_TMODE(controller))
- {
- case 0: /* interval */
- /* do not advance counter if TCE = 0 or if holding at count = CPRA */
- if(GET_TCR_TCE(controller) == 0 ||
- controller->trr == controller->cpra)
- return;
- break;
-
- case 1: /* pulse generator */
- /* do not advance counter if TCE = 0 */
- if(GET_TCR_TCE(controller) == 0)
- return;
- break;
-
- case 2: /* watchdog */
- /* do not advance counter if TCE = 0 and WDIS = 1 */
- if(GET_TCR_TCE(controller) == 0 &&
- GET_WTMR_WDIS(controller) == 1)
- return;
- break;
-
- case 3: /* disabled */
- /* regardless of TCE, do not advance counter */
- return;
- }
-
- /* In any of the above cases that return, a subsequent register
- write will be needed to restart the timer. A tick event is
- scheduled by any register write, so it is more efficient not to
- reschedule dummy events here. */
-
-
- /* find appropriate divisor etc. */
- if(GET_TCR_CCS(controller) == 0) /* internal system clock */
- {
- /* apply internal clock divider */
- if(GET_TCR_CCDE(controller)) /* divisor circuit enabled? */
- divisor = controller->clock_ticks * (1 << (1 + GET_CCDR_CDR(controller)));
- else
- divisor = controller->clock_ticks;
- }
- else
- {
- divisor = controller->ext_ticks;
- }
-
- /* how many times to increase counter? */
- quotient = warp / divisor;
- remainder = warp % divisor;
-
- /* NOTE: If the event rescheduling code works properly, the quotient
- should never be larger than 1. That is, we should receive events
- here at least as frequently as the simulated counter is supposed
- to decrement. So the remainder (-> roundoff_ticks) will slowly
- accumulate, with the quotient == 0. Once in a while, quotient
- will equal 1. */
-
- controller->roundoff_ticks = remainder;
- controller->last_ticks = this_ticks;
- while(quotient > 0) /* Is it time to increment counter? */
- {
- /* next 24-bit counter value */
- unsigned_4 next_trr = (controller->trr + 1) % (1 << 24);
- quotient --;
-
- switch((int) GET_TCR_TMODE(controller))
- {
- case 0: /* interval timer mode */
- {
- /* Current or next counter value matches CPRA value? The
- first case covers counter holding at maximum before
- reset. The second case covers normal counting
- behavior. */
- if(controller->trr == controller->cpra ||
- next_trr == controller->cpra)
- {
- /* likely hold CPRA value */
- if(controller->trr == controller->cpra)
- next_trr = controller->cpra;
-
- SET_TISR_TIIS(controller);
-
- /* Signal an interrupt if it is enabled with TIIE,
- and if we just arrived at CPRA. Don't repeatedly
- interrupt if holding due to TZCE=0 */
- if(GET_ITMR_TIIE(controller) &&
- next_trr != controller->trr)
- {
- hw_port_event(me, INT_PORT, 1);
- }
-
- /* Reset counter? */
- if(GET_ITMR_TZCE(controller))
- {
- next_trr = 0;
- }
- }
- }
- break;
-
- case 1: /* pulse generator mode */
- {
- /* first trip point */
- if(next_trr == controller->cpra)
- {
- /* flip flip-flop & report */
- controller->ff ^= 1;
- hw_port_event(me, FF_PORT, controller->ff);
- SET_TISR_TPIAS(controller);
-
- /* signal interrupt */
- if(GET_PMGR_TPIAE(controller))
- {
- hw_port_event(me, INT_PORT, 1);
- }
-
- }
- /* second trip point */
- else if(next_trr == controller->cprb)
- {
- /* flip flip-flop & report */
- controller->ff ^= 1;
- hw_port_event(me, FF_PORT, controller->ff);
- SET_TISR_TPIBS(controller);
-
- /* signal interrupt */
- if(GET_PMGR_TPIBE(controller))
- {
- hw_port_event(me, INT_PORT, 1);
- }
-
- /* clear counter */
- next_trr = 0;
- }
- }
- break;
-
- case 2: /* watchdog timer mode */
- {
- /* watchdog timer expiry */
- if(next_trr == controller->cpra)
- {
- SET_TISR_TWIS(controller);
-
- /* signal interrupt */
- if(GET_WTMR_TWIE(controller))
- {
- hw_port_event(me, INT_PORT, 1);
- }
-
- /* clear counter */
- next_trr = 0;
- }
- }
- break;
-
- case 3: /* disabled */
- default:
- }
-
- /* update counter and report */
- controller->trr = next_trr;
- /* HW_TRACE ((me, "counter trr %ld tisr %lx",
- (long) controller->trr, (long) controller->tisr)); */
- } /* end quotient loop */
-
- /* Reschedule a timer event in near future, so we can increment the
- counter again. Set the event about 75% of divisor time away, so
- we will experience roughly 1.3 events per counter increment. */
- controller->event = hw_event_queue_schedule(me, divisor*3/4, deliver_tx3904tmr_tick, NULL);
-}
-
-
-
-
-const struct hw_descriptor dv_tx3904tmr_descriptor[] = {
- { "tx3904tmr", tx3904tmr_finish, },
- { NULL },
-};
diff --git a/sim/mips/interp.c b/sim/mips/interp.c
deleted file mode 100644
index a0327636506..00000000000
--- a/sim/mips/interp.c
+++ /dev/null
@@ -1,3467 +0,0 @@
-/*> interp.c <*/
-/* Simulator for the MIPS architecture.
-
- This file is part of the MIPS sim
-
- THIS SOFTWARE IS NOT COPYRIGHTED
-
- Cygnus offers the following for use in the public domain. Cygnus
- makes no warranty with regard to the software or it's performance
- and the user accepts the software "AS IS" with all faults.
-
- CYGNUS DISCLAIMS ANY WARRANTIES, EXPRESS OR IMPLIED, WITH REGARD TO
- THIS SOFTWARE INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.
-
-NOTEs:
-
-The IDT monitor (found on the VR4300 board), seems to lie about
-register contents. It seems to treat the registers as sign-extended
-32-bit values. This cause *REAL* problems when single-stepping 64-bit
-code on the hardware.
-
-*/
-
-/* The TRACE manifests enable the provision of extra features. If they
- are not defined then a simpler (quicker) simulator is constructed
- without the required run-time checks, etc. */
-#if 1 /* 0 to allow user build selection, 1 to force inclusion */
-#define TRACE (1)
-#endif
-
-#include "bfd.h"
-#include "sim-main.h"
-#include "sim-utils.h"
-#include "sim-options.h"
-#include "sim-assert.h"
-#include "sim-hw.h"
-
-#include "itable.h"
-
-
-#include "config.h"
-
-#include <stdio.h>
-#include <stdarg.h>
-#include <ansidecl.h>
-#include <ctype.h>
-#include <limits.h>
-#include <math.h>
-#ifdef HAVE_STDLIB_H
-#include <stdlib.h>
-#endif
-#ifdef HAVE_STRING_H
-#include <string.h>
-#else
-#ifdef HAVE_STRINGS_H
-#include <strings.h>
-#endif
-#endif
-
-#include "getopt.h"
-#include "libiberty.h"
-#include "bfd.h"
-#include "callback.h" /* GDB simulator callback interface */
-#include "remote-sim.h" /* GDB simulator interface */
-
-#include "sysdep.h"
-
-#ifndef PARAMS
-#define PARAMS(x)
-#endif
-
-char* pr_addr PARAMS ((SIM_ADDR addr));
-char* pr_uword64 PARAMS ((uword64 addr));
-
-
-/* Within interp.c we refer to the sim_state and sim_cpu directly. */
-#define CPU cpu
-#define SD sd
-
-
-/* The following reserved instruction value is used when a simulator
- trap is required. NOTE: Care must be taken, since this value may be
- used in later revisions of the MIPS ISA. */
-
-#define RSVD_INSTRUCTION (0x00000005)
-#define RSVD_INSTRUCTION_MASK (0xFC00003F)
-
-#define RSVD_INSTRUCTION_ARG_SHIFT 6
-#define RSVD_INSTRUCTION_ARG_MASK 0xFFFFF
-
-
-/* Bits in the Debug register */
-#define Debug_DBD 0x80000000 /* Debug Branch Delay */
-#define Debug_DM 0x40000000 /* Debug Mode */
-#define Debug_DBp 0x00000002 /* Debug Breakpoint indicator */
-
-/*---------------------------------------------------------------------------*/
-/*-- GDB simulator interface ------------------------------------------------*/
-/*---------------------------------------------------------------------------*/
-
-static void ColdReset PARAMS((SIM_DESC sd));
-
-/*---------------------------------------------------------------------------*/
-
-
-
-#define DELAYSLOT() {\
- if (STATE & simDELAYSLOT)\
- sim_io_eprintf(sd,"Delay slot already activated (branch in delay slot?)\n");\
- STATE |= simDELAYSLOT;\
- }
-
-#define JALDELAYSLOT() {\
- DELAYSLOT ();\
- STATE |= simJALDELAYSLOT;\
- }
-
-#define NULLIFY() {\
- STATE &= ~simDELAYSLOT;\
- STATE |= simSKIPNEXT;\
- }
-
-#define CANCELDELAYSLOT() {\
- DSSTATE = 0;\
- STATE &= ~(simDELAYSLOT | simJALDELAYSLOT);\
- }
-
-#define INDELAYSLOT() ((STATE & simDELAYSLOT) != 0)
-#define INJALDELAYSLOT() ((STATE & simJALDELAYSLOT) != 0)
-
-/* Note that the monitor code essentially assumes this layout of memory.
- If you change these, change the monitor code, too. */
-#define K0BASE (0x80000000)
-#define K0SIZE (0x20000000)
-#define K1BASE (0xA0000000)
-#define K1SIZE (0x20000000)
-
-/* Simple run-time monitor support.
-
- We emulate the monitor by placing magic reserved instructions at
- the monitor's entry points; when we hit these instructions, instead
- of raising an exception (as we would normally), we look at the
- instruction and perform the appropriate monitory operation.
-
- `*_monitor_base' are the physical addresses at which the corresponding
- monitor vectors are located. `0' means none. By default,
- install all three.
- The RSVD_INSTRUCTION... macros specify the magic instructions we
- use at the monitor entry points. */
-static int firmware_option_p = 0;
-static SIM_ADDR idt_monitor_base = 0xBFC00000;
-static SIM_ADDR pmon_monitor_base = 0xBFC00500;
-static SIM_ADDR lsipmon_monitor_base = 0xBFC00200;
-
-static SIM_RC sim_firmware_command (SIM_DESC sd, char* arg);
-
-
-#define MEM_SIZE (2 << 20)
-
-
-#if defined(TRACE)
-static char *tracefile = "trace.din"; /* default filename for trace log */
-FILE *tracefh = NULL;
-static void open_trace PARAMS((SIM_DESC sd));
-#endif /* TRACE */
-
-static const char * get_insn_name (sim_cpu *, int);
-
-/* simulation target board. NULL=canonical */
-static char* board = NULL;
-
-
-static DECLARE_OPTION_HANDLER (mips_option_handler);
-
-enum {
- OPTION_DINERO_TRACE = OPTION_START,
- OPTION_DINERO_FILE,
- OPTION_FIRMWARE,
- OPTION_BOARD
-};
-
-
-static SIM_RC
-mips_option_handler (sd, cpu, opt, arg, is_command)
- SIM_DESC sd;
- sim_cpu *cpu;
- int opt;
- char *arg;
- int is_command;
-{
- int cpu_nr;
- switch (opt)
- {
- case OPTION_DINERO_TRACE: /* ??? */
-#if defined(TRACE)
- /* Eventually the simTRACE flag could be treated as a toggle, to
- allow external control of the program points being traced
- (i.e. only from main onwards, excluding the run-time setup,
- etc.). */
- for (cpu_nr = 0; cpu_nr < MAX_NR_PROCESSORS; cpu_nr++)
- {
- sim_cpu *cpu = STATE_CPU (sd, cpu_nr);
- if (arg == NULL)
- STATE |= simTRACE;
- else if (strcmp (arg, "yes") == 0)
- STATE |= simTRACE;
- else if (strcmp (arg, "no") == 0)
- STATE &= ~simTRACE;
- else if (strcmp (arg, "on") == 0)
- STATE |= simTRACE;
- else if (strcmp (arg, "off") == 0)
- STATE &= ~simTRACE;
- else
- {
- fprintf (stderr, "Unrecognized dinero-trace option `%s'\n", arg);
- return SIM_RC_FAIL;
- }
- }
- return SIM_RC_OK;
-#else /* !TRACE */
- fprintf(stderr,"\
-Simulator constructed without dinero tracing support (for performance).\n\
-Re-compile simulator with \"-DTRACE\" to enable this option.\n");
- return SIM_RC_FAIL;
-#endif /* !TRACE */
-
- case OPTION_DINERO_FILE:
-#if defined(TRACE)
- if (optarg != NULL) {
- char *tmp;
- tmp = (char *)malloc(strlen(optarg) + 1);
- if (tmp == NULL)
- {
- sim_io_printf(sd,"Failed to allocate buffer for tracefile name \"%s\"\n",optarg);
- return SIM_RC_FAIL;
- }
- else {
- strcpy(tmp,optarg);
- tracefile = tmp;
- sim_io_printf(sd,"Placing trace information into file \"%s\"\n",tracefile);
- }
- }
-#endif /* TRACE */
- return SIM_RC_OK;
-
- case OPTION_FIRMWARE:
- return sim_firmware_command (sd, arg);
-
- case OPTION_BOARD:
- {
- if (arg)
- {
- board = zalloc(strlen(arg) + 1);
- strcpy(board, arg);
- }
- return SIM_RC_OK;
- }
- }
-
- return SIM_RC_OK;
-}
-
-
-static const OPTION mips_options[] =
-{
- { {"dinero-trace", optional_argument, NULL, OPTION_DINERO_TRACE},
- '\0', "on|off", "Enable dinero tracing",
- mips_option_handler },
- { {"dinero-file", required_argument, NULL, OPTION_DINERO_FILE},
- '\0', "FILE", "Write dinero trace to FILE",
- mips_option_handler },
- { {"firmware", required_argument, NULL, OPTION_FIRMWARE},
- '\0', "[idt|pmon|lsipmon|none][@ADDRESS]", "Emulate ROM monitor",
- mips_option_handler },
- { {"board", required_argument, NULL, OPTION_BOARD},
- '\0', "none" /* rely on compile-time string concatenation for other options */
-
-#define BOARD_JMR3904 "jmr3904"
- "|" BOARD_JMR3904
-#define BOARD_JMR3904_PAL "jmr3904pal"
- "|" BOARD_JMR3904_PAL
-#define BOARD_JMR3904_DEBUG "jmr3904debug"
- "|" BOARD_JMR3904_DEBUG
-#define BOARD_BSP "bsp"
- "|" BOARD_BSP
-
- , "Customize simulation for a particular board.", mips_option_handler },
-
- { {NULL, no_argument, NULL, 0}, '\0', NULL, NULL, NULL }
-};
-
-
-int interrupt_pending;
-
-void
-interrupt_event (SIM_DESC sd, void *data)
-{
- sim_cpu *cpu = STATE_CPU (sd, 0); /* FIXME */
- address_word cia = CIA_GET (cpu);
- if (SR & status_IE)
- {
- interrupt_pending = 0;
- SignalExceptionInterrupt (1); /* interrupt "1" */
- }
- else if (!interrupt_pending)
- sim_events_schedule (sd, 1, interrupt_event, data);
-}
-
-
-/*---------------------------------------------------------------------------*/
-/*-- Device registration hook -----------------------------------------------*/
-/*---------------------------------------------------------------------------*/
-static void device_init(SIM_DESC sd) {
-#ifdef DEVICE_INIT
- extern void register_devices(SIM_DESC);
- register_devices(sd);
-#endif
-}
-
-/*---------------------------------------------------------------------------*/
-/*-- GDB simulator interface ------------------------------------------------*/
-/*---------------------------------------------------------------------------*/
-
-SIM_DESC
-sim_open (kind, cb, abfd, argv)
- SIM_OPEN_KIND kind;
- host_callback *cb;
- struct _bfd *abfd;
- char **argv;
-{
- SIM_DESC sd = sim_state_alloc (kind, cb);
- sim_cpu *cpu = STATE_CPU (sd, 0); /* FIXME */
-
- SIM_ASSERT (STATE_MAGIC (sd) == SIM_MAGIC_NUMBER);
-
- /* FIXME: watchpoints code shouldn't need this */
- STATE_WATCHPOINTS (sd)->pc = &(PC);
- STATE_WATCHPOINTS (sd)->sizeof_pc = sizeof (PC);
- STATE_WATCHPOINTS (sd)->interrupt_handler = interrupt_event;
-
- /* Initialize the mechanism for doing insn profiling. */
- CPU_INSN_NAME (cpu) = get_insn_name;
- CPU_MAX_INSNS (cpu) = nr_itable_entries;
-
- STATE = 0;
-
- if (sim_pre_argv_init (sd, argv[0]) != SIM_RC_OK)
- return 0;
- sim_add_option_table (sd, NULL, mips_options);
-
-
- /* getopt will print the error message so we just have to exit if this fails.
- FIXME: Hmmm... in the case of gdb we need getopt to call
- print_filtered. */
- if (sim_parse_args (sd, argv) != SIM_RC_OK)
- {
- /* Uninstall the modules to avoid memory leaks,
- file descriptor leaks, etc. */
- sim_module_uninstall (sd);
- return 0;
- }
-
- /* handle board-specific memory maps */
- if (board == NULL)
- {
- /* Allocate core managed memory */
-
-
- /* For compatibility with the old code - under this (at level one)
- are the kernel spaces K0 & K1. Both of these map to a single
- smaller sub region */
- sim_do_command(sd," memory region 0x7fff8000,0x8000") ; /* MTZ- 32 k stack */
- sim_do_commandf (sd, "memory alias 0x%lx@1,0x%lx%%0x%lx,0x%0x",
- K1BASE, K0SIZE,
- MEM_SIZE, /* actual size */
- K0BASE);
-
- device_init(sd);
- }
- else if (board != NULL
- && (strcmp(board, BOARD_BSP) == 0))
- {
- int i;
-
- STATE_ENVIRONMENT (sd) = OPERATING_ENVIRONMENT;
-
- /* ROM: 0x9FC0_0000 - 0x9FFF_FFFF and 0xBFC0_0000 - 0xBFFF_FFFF */
- sim_do_commandf (sd, "memory alias 0x%lx@1,0x%lx,0x%0x",
- 0x9FC00000,
- 4 * 1024 * 1024, /* 4 MB */
- 0xBFC00000);
-
- /* SRAM: 0x8000_0000 - 0x803F_FFFF and 0xA000_0000 - 0xA03F_FFFF */
- sim_do_commandf (sd, "memory alias 0x%lx@1,0x%lx,0x%0x",
- 0x80000000,
- 4 * 1024 * 1024, /* 4 MB */
- 0xA0000000);
-
- /* DRAM: 0x8800_0000 - 0x89FF_FFFF and 0xA800_0000 - 0xA9FF_FFFF */
- for (i=0; i<8; i++) /* 32 MB total */
- {
- unsigned size = 4 * 1024 * 1024; /* 4 MB */
- sim_do_commandf (sd, "memory alias 0x%lx@1,0x%lx,0x%0x",
- 0x88000000 + (i * size),
- size,
- 0xA8000000 + (i * size));
- }
- }
-#if (WITH_HW)
- else if (board != NULL
- && (strcmp(board, BOARD_JMR3904) == 0 ||
- strcmp(board, BOARD_JMR3904_PAL) == 0 ||
- strcmp(board, BOARD_JMR3904_DEBUG) == 0))
- {
- /* match VIRTUAL memory layout of JMR-TX3904 board */
- int i;
-
- /* --- disable monitor unless forced on by user --- */
-
- if (! firmware_option_p)
- {
- idt_monitor_base = 0;
- pmon_monitor_base = 0;
- lsipmon_monitor_base = 0;
- }
-
- /* --- environment --- */
-
- STATE_ENVIRONMENT (sd) = OPERATING_ENVIRONMENT;
-
- /* --- memory --- */
-
- /* ROM: 0x9FC0_0000 - 0x9FFF_FFFF and 0xBFC0_0000 - 0xBFFF_FFFF */
- sim_do_commandf (sd, "memory alias 0x%lx@1,0x%lx,0x%0x",
- 0x9FC00000,
- 4 * 1024 * 1024, /* 4 MB */
- 0xBFC00000);
-
- /* SRAM: 0x8000_0000 - 0x803F_FFFF and 0xA000_0000 - 0xA03F_FFFF */
- sim_do_commandf (sd, "memory alias 0x%lx@1,0x%lx,0x%0x",
- 0x80000000,
- 4 * 1024 * 1024, /* 4 MB */
- 0xA0000000);
-
- /* DRAM: 0x8800_0000 - 0x89FF_FFFF and 0xA800_0000 - 0xA9FF_FFFF */
- for (i=0; i<8; i++) /* 32 MB total */
- {
- unsigned size = 4 * 1024 * 1024; /* 4 MB */
- sim_do_commandf (sd, "memory alias 0x%lx@1,0x%lx,0x%0x",
- 0x88000000 + (i * size),
- size,
- 0xA8000000 + (i * size));
- }
-
- /* Dummy memory regions for unsimulated devices - sorted by address */
-
- sim_do_commandf (sd, "memory alias 0x%lx@1,0x%lx", 0xB1000000, 0x400); /* ISA I/O */
- sim_do_commandf (sd, "memory alias 0x%lx@1,0x%lx", 0xB2100000, 0x004); /* ISA ctl */
- sim_do_commandf (sd, "memory alias 0x%lx@1,0x%lx", 0xB2500000, 0x004); /* LED/switch */
- sim_do_commandf (sd, "memory alias 0x%lx@1,0x%lx", 0xB2700000, 0x004); /* RTC */
- sim_do_commandf (sd, "memory alias 0x%lx@1,0x%lx", 0xB3C00000, 0x004); /* RTC */
- sim_do_commandf (sd, "memory alias 0x%lx@1,0x%lx", 0xFFFF8000, 0x900); /* DRAMC */
- sim_do_commandf (sd, "memory alias 0x%lx@1,0x%lx", 0xFFFF9000, 0x200); /* EBIF */
- sim_do_commandf (sd, "memory alias 0x%lx@1,0x%lx", 0xFFFFE000, 0x01c); /* EBIF */
- sim_do_commandf (sd, "memory alias 0x%lx@1,0x%lx", 0xFFFFF500, 0x300); /* PIO */
-
-
- /* --- simulated devices --- */
- sim_hw_parse (sd, "/tx3904irc@0xffffc000/reg 0xffffc000 0x20");
- sim_hw_parse (sd, "/tx3904cpu");
- sim_hw_parse (sd, "/tx3904tmr@0xfffff000/reg 0xfffff000 0x100");
- sim_hw_parse (sd, "/tx3904tmr@0xfffff100/reg 0xfffff100 0x100");
- sim_hw_parse (sd, "/tx3904tmr@0xfffff200/reg 0xfffff200 0x100");
- sim_hw_parse (sd, "/tx3904sio@0xfffff300/reg 0xfffff300 0x100");
- {
- /* FIXME: poking at dv-sockser internals, use tcp backend if
- --sockser_addr option was given.*/
- extern char* sockser_addr;
- if(sockser_addr == NULL)
- sim_hw_parse (sd, "/tx3904sio@0xfffff300/backend stdio");
- else
- sim_hw_parse (sd, "/tx3904sio@0xfffff300/backend tcp");
- }
- sim_hw_parse (sd, "/tx3904sio@0xfffff400/reg 0xfffff400 0x100");
- sim_hw_parse (sd, "/tx3904sio@0xfffff400/backend stdio");
-
- /* -- device connections --- */
- sim_hw_parse (sd, "/tx3904irc > ip level /tx3904cpu");
- sim_hw_parse (sd, "/tx3904tmr@0xfffff000 > int tmr0 /tx3904irc");
- sim_hw_parse (sd, "/tx3904tmr@0xfffff100 > int tmr1 /tx3904irc");
- sim_hw_parse (sd, "/tx3904tmr@0xfffff200 > int tmr2 /tx3904irc");
- sim_hw_parse (sd, "/tx3904sio@0xfffff300 > int sio0 /tx3904irc");
- sim_hw_parse (sd, "/tx3904sio@0xfffff400 > int sio1 /tx3904irc");
-
- /* add PAL timer & I/O module */
- if(! strcmp(board, BOARD_JMR3904_PAL))
- {
- /* the device */
- sim_hw_parse (sd, "/pal@0xffff0000");
- sim_hw_parse (sd, "/pal@0xffff0000/reg 0xffff0000 64");
-
- /* wire up interrupt ports to irc */
- sim_hw_parse (sd, "/pal@0x31000000 > countdown tmr0 /tx3904irc");
- sim_hw_parse (sd, "/pal@0x31000000 > timer tmr1 /tx3904irc");
- sim_hw_parse (sd, "/pal@0x31000000 > int int0 /tx3904irc");
- }
-
- if(! strcmp(board, BOARD_JMR3904_DEBUG))
- {
- /* -- DEBUG: glue interrupt generators --- */
- sim_hw_parse (sd, "/glue@0xffff0000/reg 0xffff0000 0x50");
- sim_hw_parse (sd, "/glue@0xffff0000 > int0 int0 /tx3904irc");
- sim_hw_parse (sd, "/glue@0xffff0000 > int1 int1 /tx3904irc");
- sim_hw_parse (sd, "/glue@0xffff0000 > int2 int2 /tx3904irc");
- sim_hw_parse (sd, "/glue@0xffff0000 > int3 int3 /tx3904irc");
- sim_hw_parse (sd, "/glue@0xffff0000 > int4 int4 /tx3904irc");
- sim_hw_parse (sd, "/glue@0xffff0000 > int5 int5 /tx3904irc");
- sim_hw_parse (sd, "/glue@0xffff0000 > int6 int6 /tx3904irc");
- sim_hw_parse (sd, "/glue@0xffff0000 > int7 int7 /tx3904irc");
- sim_hw_parse (sd, "/glue@0xffff0000 > int8 dmac0 /tx3904irc");
- sim_hw_parse (sd, "/glue@0xffff0000 > int9 dmac1 /tx3904irc");
- sim_hw_parse (sd, "/glue@0xffff0000 > int10 dmac2 /tx3904irc");
- sim_hw_parse (sd, "/glue@0xffff0000 > int11 dmac3 /tx3904irc");
- sim_hw_parse (sd, "/glue@0xffff0000 > int12 sio0 /tx3904irc");
- sim_hw_parse (sd, "/glue@0xffff0000 > int13 sio1 /tx3904irc");
- sim_hw_parse (sd, "/glue@0xffff0000 > int14 tmr0 /tx3904irc");
- sim_hw_parse (sd, "/glue@0xffff0000 > int15 tmr1 /tx3904irc");
- sim_hw_parse (sd, "/glue@0xffff0000 > int16 tmr2 /tx3904irc");
- sim_hw_parse (sd, "/glue@0xffff0000 > int17 nmi /tx3904cpu");
- }
-
- device_init(sd);
- }
-#endif
-
-
- /* check for/establish the a reference program image */
- if (sim_analyze_program (sd,
- (STATE_PROG_ARGV (sd) != NULL
- ? *STATE_PROG_ARGV (sd)
- : NULL),
- abfd) != SIM_RC_OK)
- {
- sim_module_uninstall (sd);
- return 0;
- }
-
- /* Configure/verify the target byte order and other runtime
- configuration options */
- if (sim_config (sd) != SIM_RC_OK)
- {
- sim_module_uninstall (sd);
- return 0;
- }
-
- if (sim_post_argv_init (sd) != SIM_RC_OK)
- {
- /* Uninstall the modules to avoid memory leaks,
- file descriptor leaks, etc. */
- sim_module_uninstall (sd);
- return 0;
- }
-
- /* verify assumptions the simulator made about the host type system.
- This macro does not return if there is a problem */
- SIM_ASSERT (sizeof(int) == (4 * sizeof(char)));
- SIM_ASSERT (sizeof(word64) == (8 * sizeof(char)));
-
- /* This is NASTY, in that we are assuming the size of specific
- registers: */
- {
- int rn;
- for (rn = 0; (rn < (LAST_EMBED_REGNUM + 1)); rn++)
- {
- if (rn < 32)
- cpu->register_widths[rn] = WITH_TARGET_WORD_BITSIZE;
- else if ((rn >= FGRIDX) && (rn < (FGRIDX + NR_FGR)))
- cpu->register_widths[rn] = WITH_TARGET_FLOATING_POINT_BITSIZE;
- else if ((rn >= 33) && (rn <= 37))
- cpu->register_widths[rn] = WITH_TARGET_WORD_BITSIZE;
- else if ((rn == SRIDX)
- || (rn == FCR0IDX)
- || (rn == FCR31IDX)
- || ((rn >= 72) && (rn <= 89)))
- cpu->register_widths[rn] = 32;
- else
- cpu->register_widths[rn] = 0;
- }
-
-
- }
-
-#if defined(TRACE)
- if (STATE & simTRACE)
- open_trace(sd);
-#endif /* TRACE */
-
- /*
- sim_io_eprintf (sd, "idt@%x pmon@%x lsipmon@%x\n",
- idt_monitor_base,
- pmon_monitor_base,
- lsipmon_monitor_base);
- */
-
- /* Write the monitor trap address handlers into the monitor (eeprom)
- address space. This can only be done once the target endianness
- has been determined. */
- if (idt_monitor_base != 0)
- {
- unsigned loop;
- unsigned idt_monitor_size = 1 << 11;
-
- /* the default monitor region */
- sim_do_commandf (sd, "memory region 0x%x,0x%x",
- idt_monitor_base, idt_monitor_size);
-
- /* Entry into the IDT monitor is via fixed address vectors, and
- not using machine instructions. To avoid clashing with use of
- the MIPS TRAP system, we place our own (simulator specific)
- "undefined" instructions into the relevant vector slots. */
- for (loop = 0; (loop < idt_monitor_size); loop += 4)
- {
- address_word vaddr = (idt_monitor_base + loop);
- unsigned32 insn = (RSVD_INSTRUCTION |
- (((loop >> 2) & RSVD_INSTRUCTION_ARG_MASK)
- << RSVD_INSTRUCTION_ARG_SHIFT));
- H2T (insn);
- sim_write (sd, vaddr, (char *)&insn, sizeof (insn));
- }
- }
-
- if ((pmon_monitor_base != 0) || (lsipmon_monitor_base != 0))
- {
- /* The PMON monitor uses the same address space, but rather than
- branching into it the address of a routine is loaded. We can
- cheat for the moment, and direct the PMON routine to IDT style
- instructions within the monitor space. This relies on the IDT
- monitor not using the locations from 0xBFC00500 onwards as its
- entry points.*/
- unsigned loop;
- for (loop = 0; (loop < 24); loop++)
- {
- unsigned32 value = ((0x500 - 8) / 8); /* default UNDEFINED reason code */
- switch (loop)
- {
- case 0: /* read */
- value = 7;
- break;
- case 1: /* write */
- value = 8;
- break;
- case 2: /* open */
- value = 6;
- break;
- case 3: /* close */
- value = 10;
- break;
- case 5: /* printf */
- value = ((0x500 - 16) / 8); /* not an IDT reason code */
- break;
- case 8: /* cliexit */
- value = 17;
- break;
- case 11: /* flush_cache */
- value = 28;
- break;
- }
-
- SIM_ASSERT (idt_monitor_base != 0);
- value = ((unsigned int) idt_monitor_base + (value * 8));
- H2T (value);
-
- if (pmon_monitor_base != 0)
- {
- address_word vaddr = (pmon_monitor_base + (loop * 4));
- sim_write (sd, vaddr, (char *)&value, sizeof (value));
- }
-
- if (lsipmon_monitor_base != 0)
- {
- address_word vaddr = (lsipmon_monitor_base + (loop * 4));
- sim_write (sd, vaddr, (char *)&value, sizeof (value));
- }
- }
-
- /* Write an abort sequence into the TRAP (common) exception vector
- addresses. This is to catch code executing a TRAP (et.al.)
- instruction without installing a trap handler. */
- if ((idt_monitor_base != 0) ||
- (pmon_monitor_base != 0) ||
- (lsipmon_monitor_base != 0))
- {
- unsigned32 halt[2] = { 0x2404002f /* addiu r4, r0, 47 */,
- HALT_INSTRUCTION /* BREAK */ };
- H2T (halt[0]);
- H2T (halt[1]);
- sim_write (sd, 0x80000000, (char *) halt, sizeof (halt));
- sim_write (sd, 0x80000180, (char *) halt, sizeof (halt));
- sim_write (sd, 0x80000200, (char *) halt, sizeof (halt));
- /* XXX: Write here unconditionally? */
- sim_write (sd, 0xBFC00200, (char *) halt, sizeof (halt));
- sim_write (sd, 0xBFC00380, (char *) halt, sizeof (halt));
- sim_write (sd, 0xBFC00400, (char *) halt, sizeof (halt));
- }
- }
-
-
-
- return sd;
-}
-
-#if defined(TRACE)
-static void
-open_trace(sd)
- SIM_DESC sd;
-{
- tracefh = fopen(tracefile,"wb+");
- if (tracefh == NULL)
- {
- sim_io_eprintf(sd,"Failed to create file \"%s\", writing trace information to stderr.\n",tracefile);
- tracefh = stderr;
- }
-}
-#endif /* TRACE */
-
-/* Return name of an insn, used by insn profiling. */
-static const char *
-get_insn_name (sim_cpu *cpu, int i)
-{
- return itable[i].name;
-}
-
-void
-sim_close (sd, quitting)
- SIM_DESC sd;
- int quitting;
-{
-#ifdef DEBUG
- printf("DBG: sim_close: entered (quitting = %d)\n",quitting);
-#endif
-
-
- /* "quitting" is non-zero if we cannot hang on errors */
-
- /* shut down modules */
- sim_module_uninstall (sd);
-
- /* Ensure that any resources allocated through the callback
- mechanism are released: */
- sim_io_shutdown (sd);
-
-#if defined(TRACE)
- if (tracefh != NULL && tracefh != stderr)
- fclose(tracefh);
- tracefh = NULL;
-#endif /* TRACE */
-
- /* FIXME - free SD */
-
- return;
-}
-
-
-int
-sim_write (sd,addr,buffer,size)
- SIM_DESC sd;
- SIM_ADDR addr;
- unsigned char *buffer;
- int size;
-{
- int index;
- sim_cpu *cpu = STATE_CPU (sd, 0); /* FIXME */
-
- /* Return the number of bytes written, or zero if error. */
-#ifdef DEBUG
- sim_io_printf(sd,"sim_write(0x%s,buffer,%d);\n",pr_addr(addr),size);
-#endif
-
- /* We use raw read and write routines, since we do not want to count
- the GDB memory accesses in our statistics gathering. */
-
- for (index = 0; index < size; index++)
- {
- address_word vaddr = (address_word)addr + index;
- address_word paddr;
- int cca;
- if (!address_translation (SD, CPU, NULL_CIA, vaddr, isDATA, isSTORE, &paddr, &cca, isRAW))
- break;
- if (sim_core_write_buffer (SD, CPU, read_map, buffer + index, paddr, 1) != 1)
- break;
- }
-
- return(index);
-}
-
-int
-sim_read (sd,addr,buffer,size)
- SIM_DESC sd;
- SIM_ADDR addr;
- unsigned char *buffer;
- int size;
-{
- int index;
- sim_cpu *cpu = STATE_CPU (sd, 0); /* FIXME */
-
- /* Return the number of bytes read, or zero if error. */
-#ifdef DEBUG
- sim_io_printf(sd,"sim_read(0x%s,buffer,%d);\n",pr_addr(addr),size);
-#endif /* DEBUG */
-
- for (index = 0; (index < size); index++)
- {
- address_word vaddr = (address_word)addr + index;
- address_word paddr;
- int cca;
- if (!address_translation (SD, CPU, NULL_CIA, vaddr, isDATA, isLOAD, &paddr, &cca, isRAW))
- break;
- if (sim_core_read_buffer (SD, CPU, read_map, buffer + index, paddr, 1) != 1)
- break;
- }
-
- return(index);
-}
-
-int
-sim_store_register (sd,rn,memory,length)
- SIM_DESC sd;
- int rn;
- unsigned char *memory;
- int length;
-{
- sim_cpu *cpu = STATE_CPU (sd, 0); /* FIXME */
- /* NOTE: gdb (the client) stores registers in target byte order
- while the simulator uses host byte order */
-#ifdef DEBUG
- sim_io_printf(sd,"sim_store_register(%d,*memory=0x%s);\n",rn,pr_addr(*((SIM_ADDR *)memory)));
-#endif /* DEBUG */
-
- /* Unfortunately this suffers from the same problem as the register
- numbering one. We need to know what the width of each logical
- register number is for the architecture being simulated. */
-
- if (cpu->register_widths[rn] == 0)
- {
- sim_io_eprintf(sd,"Invalid register width for %d (register store ignored)\n",rn);
- return 0;
- }
-
-
-
- if (rn >= FGRIDX && rn < FGRIDX + NR_FGR)
- {
- cpu->fpr_state[rn - FGRIDX] = fmt_uninterpreted;
- if (cpu->register_widths[rn] == 32)
- {
- if (length == 8)
- {
- cpu->fgr[rn - FGRIDX] =
- (unsigned32) T2H_8 (*(unsigned64*)memory);
- return 8;
- }
- else
- {
- cpu->fgr[rn - FGRIDX] = T2H_4 (*(unsigned32*)memory);
- return 4;
- }
- }
- else
- {
- cpu->fgr[rn - FGRIDX] = T2H_8 (*(unsigned64*)memory);
- return 8;
- }
- }
-
- if (cpu->register_widths[rn] == 32)
- {
- if (length == 8)
- {
- cpu->registers[rn] =
- (unsigned32) T2H_8 (*(unsigned64*)memory);
- return 8;
- }
- else
- {
- cpu->registers[rn] = T2H_4 (*(unsigned32*)memory);
- return 4;
- }
- }
- else
- {
- cpu->registers[rn] = T2H_8 (*(unsigned64*)memory);
- return 8;
- }
-
- return 0;
-}
-
-int
-sim_fetch_register (sd,rn,memory,length)
- SIM_DESC sd;
- int rn;
- unsigned char *memory;
- int length;
-{
- sim_cpu *cpu = STATE_CPU (sd, 0); /* FIXME */
- /* NOTE: gdb (the client) stores registers in target byte order
- while the simulator uses host byte order */
-#ifdef DEBUG
-#if 0 /* FIXME: doesn't compile */
- sim_io_printf(sd,"sim_fetch_register(%d=0x%s,mem) : place simulator registers into memory\n",rn,pr_addr(registers[rn]));
-#endif
-#endif /* DEBUG */
-
- if (cpu->register_widths[rn] == 0)
- {
- sim_io_eprintf (sd, "Invalid register width for %d (register fetch ignored)\n",rn);
- return 0;
- }
-
-
-
- /* Any floating point register */
- if (rn >= FGRIDX && rn < FGRIDX + NR_FGR)
- {
- if (cpu->register_widths[rn] == 32)
- {
- if (length == 8)
- {
- *(unsigned64*)memory =
- H2T_8 ((unsigned32) (cpu->fgr[rn - FGRIDX]));
- return 8;
- }
- else
- {
- *(unsigned32*)memory = H2T_4 (cpu->fgr[rn - FGRIDX]);
- return 4;
- }
- }
- else
- {
- *(unsigned64*)memory = H2T_8 (cpu->fgr[rn - FGRIDX]);
- return 8;
- }
- }
-
- if (cpu->register_widths[rn] == 32)
- {
- if (length == 8)
- {
- *(unsigned64*)memory =
- H2T_8 ((unsigned32) (cpu->registers[rn]));
- return 8;
- }
- else
- {
- *(unsigned32*)memory = H2T_4 ((unsigned32)(cpu->registers[rn]));
- return 4;
- }
- }
- else
- {
- *(unsigned64*)memory = H2T_8 ((unsigned64)(cpu->registers[rn]));
- return 8;
- }
-
- return 0;
-}
-
-
-SIM_RC
-sim_create_inferior (sd, abfd, argv,env)
- SIM_DESC sd;
- struct _bfd *abfd;
- char **argv;
- char **env;
-{
-
-#ifdef DEBUG
-#if 0 /* FIXME: doesn't compile */
- printf("DBG: sim_create_inferior entered: start_address = 0x%s\n",
- pr_addr(PC));
-#endif
-#endif /* DEBUG */
-
- ColdReset(sd);
-
- if (abfd != NULL)
- {
- /* override PC value set by ColdReset () */
- int cpu_nr;
- for (cpu_nr = 0; cpu_nr < sim_engine_nr_cpus (sd); cpu_nr++)
- {
- sim_cpu *cpu = STATE_CPU (sd, cpu_nr);
- CIA_SET (cpu, (unsigned64) bfd_get_start_address (abfd));
- }
- }
-
-#if 0 /* def DEBUG */
- if (argv || env)
- {
- /* We should really place the argv slot values into the argument
- registers, and onto the stack as required. However, this
- assumes that we have a stack defined, which is not
- necessarily true at the moment. */
- char **cptr;
- sim_io_printf(sd,"sim_create_inferior() : passed arguments ignored\n");
- for (cptr = argv; (cptr && *cptr); cptr++)
- printf("DBG: arg \"%s\"\n",*cptr);
- }
-#endif /* DEBUG */
-
- return SIM_RC_OK;
-}
-
-void
-sim_do_command (sd,cmd)
- SIM_DESC sd;
- char *cmd;
-{
- if (sim_args_command (sd, cmd) != SIM_RC_OK)
- sim_io_printf (sd, "Error: \"%s\" is not a valid MIPS simulator command.\n",
- cmd);
-}
-
-/*---------------------------------------------------------------------------*/
-/*-- Private simulator support interface ------------------------------------*/
-/*---------------------------------------------------------------------------*/
-
-/* Read a null terminated string from memory, return in a buffer */
-static char *
-fetch_str (SIM_DESC sd,
- address_word addr)
-{
- char *buf;
- int nr = 0;
- char null;
- while (sim_read (sd, addr + nr, &null, 1) == 1 && null != 0)
- nr++;
- buf = NZALLOC (char, nr + 1);
- sim_read (sd, addr, buf, nr);
- return buf;
-}
-
-
-/* Implements the "sim firmware" command:
- sim firmware NAME[@ADDRESS] --- emulate ROM monitor named NAME.
- NAME can be idt, pmon, or lsipmon. If omitted, ADDRESS
- defaults to the normal address for that monitor.
- sim firmware none --- don't emulate any ROM monitor. Useful
- if you need a clean address space. */
-static SIM_RC
-sim_firmware_command (SIM_DESC sd, char *arg)
-{
- int address_present = 0;
- SIM_ADDR address;
-
- /* Signal occurrence of this option. */
- firmware_option_p = 1;
-
- /* Parse out the address, if present. */
- {
- char *p = strchr (arg, '@');
- if (p)
- {
- char *q;
- address_present = 1;
- p ++; /* skip over @ */
-
- address = strtoul (p, &q, 0);
- if (*q != '\0')
- {
- sim_io_printf (sd, "Invalid address given to the"
- "`sim firmware NAME@ADDRESS' command: %s\n",
- p);
- return SIM_RC_FAIL;
- }
- }
- else
- address_present = 0;
- }
-
- if (! strncmp (arg, "idt", 3))
- {
- idt_monitor_base = address_present ? address : 0xBFC00000;
- pmon_monitor_base = 0;
- lsipmon_monitor_base = 0;
- }
- else if (! strncmp (arg, "pmon", 4))
- {
- /* pmon uses indirect calls. Hook into implied idt. */
- pmon_monitor_base = address_present ? address : 0xBFC00500;
- idt_monitor_base = pmon_monitor_base - 0x500;
- lsipmon_monitor_base = 0;
- }
- else if (! strncmp (arg, "lsipmon", 7))
- {
- /* lsipmon uses indirect calls. Hook into implied idt. */
- pmon_monitor_base = 0;
- lsipmon_monitor_base = address_present ? address : 0xBFC00200;
- idt_monitor_base = lsipmon_monitor_base - 0x200;
- }
- else if (! strncmp (arg, "none", 4))
- {
- if (address_present)
- {
- sim_io_printf (sd,
- "The `sim firmware none' command does "
- "not take an `ADDRESS' argument.\n");
- return SIM_RC_FAIL;
- }
- idt_monitor_base = 0;
- pmon_monitor_base = 0;
- lsipmon_monitor_base = 0;
- }
- else
- {
- sim_io_printf (sd, "\
-Unrecognized name given to the `sim firmware NAME' command: %s\n\
-Recognized firmware names are: `idt', `pmon', `lsipmon', and `none'.\n",
- arg);
- return SIM_RC_FAIL;
- }
-
- return SIM_RC_OK;
-}
-
-
-
-/* Simple monitor interface (currently setup for the IDT and PMON monitors) */
-int
-sim_monitor (SIM_DESC sd,
- sim_cpu *cpu,
- address_word cia,
- unsigned int reason)
-{
-#ifdef DEBUG
- printf("DBG: sim_monitor: entered (reason = %d)\n",reason);
-#endif /* DEBUG */
-
- /* The IDT monitor actually allows two instructions per vector
- slot. However, the simulator currently causes a trap on each
- individual instruction. We cheat, and lose the bottom bit. */
- reason >>= 1;
-
- /* The following callback functions are available, however the
- monitor we are simulating does not make use of them: get_errno,
- isatty, lseek, rename, system, time and unlink */
- switch (reason)
- {
-
- case 6: /* int open(char *path,int flags) */
- {
- char *path = fetch_str (sd, A0);
- V0 = sim_io_open (sd, path, (int)A1);
- zfree (path);
- break;
- }
-
- case 7: /* int read(int file,char *ptr,int len) */
- {
- int fd = A0;
- int nr = A2;
- char *buf = zalloc (nr);
- V0 = sim_io_read (sd, fd, buf, nr);
- sim_write (sd, A1, buf, nr);
- zfree (buf);
- }
- break;
-
- case 8: /* int write(int file,char *ptr,int len) */
- {
- int fd = A0;
- int nr = A2;
- char *buf = zalloc (nr);
- sim_read (sd, A1, buf, nr);
- V0 = sim_io_write (sd, fd, buf, nr);
- zfree (buf);
- break;
- }
-
- case 10: /* int close(int file) */
- {
- V0 = sim_io_close (sd, (int)A0);
- break;
- }
-
- case 2: /* Densan monitor: char inbyte(int waitflag) */
- {
- if (A0 == 0) /* waitflag == NOWAIT */
- V0 = (unsigned_word)-1;
- }
- /* Drop through to case 11 */
-
- case 11: /* char inbyte(void) */
- {
- char tmp;
- /* ensure that all output has gone... */
- sim_io_flush_stdout (sd);
- if (sim_io_read_stdin (sd, &tmp, sizeof(char)) != sizeof(char))
- {
- sim_io_error(sd,"Invalid return from character read");
- V0 = (unsigned_word)-1;
- }
- else
- V0 = (unsigned_word)tmp;
- break;
- }
-
- case 3: /* Densan monitor: void co(char chr) */
- case 12: /* void outbyte(char chr) : write a byte to "stdout" */
- {
- char tmp = (char)(A0 & 0xFF);
- sim_io_write_stdout (sd, &tmp, sizeof(char));
- break;
- }
-
- case 17: /* void _exit() */
- {
- sim_io_eprintf (sd, "sim_monitor(17): _exit(int reason) to be coded\n");
- sim_engine_halt (SD, CPU, NULL, NULL_CIA, sim_exited,
- (unsigned int)(A0 & 0xFFFFFFFF));
- break;
- }
-
- case 28 : /* PMON flush_cache */
- break;
-
- case 55: /* void get_mem_info(unsigned int *ptr) */
- /* in: A0 = pointer to three word memory location */
- /* out: [A0 + 0] = size */
- /* [A0 + 4] = instruction cache size */
- /* [A0 + 8] = data cache size */
- {
- unsigned_4 value = MEM_SIZE /* FIXME STATE_MEM_SIZE (sd) */;
- unsigned_4 zero = 0;
- H2T (value);
- sim_write (sd, A0 + 0, (char *)&value, 4);
- sim_write (sd, A0 + 4, (char *)&zero, 4);
- sim_write (sd, A0 + 8, (char *)&zero, 4);
- /* sim_io_eprintf (sd, "sim: get_mem_info() depreciated\n"); */
- break;
- }
-
- case 158 : /* PMON printf */
- /* in: A0 = pointer to format string */
- /* A1 = optional argument 1 */
- /* A2 = optional argument 2 */
- /* A3 = optional argument 3 */
- /* out: void */
- /* The following is based on the PMON printf source */
- {
- address_word s = A0;
- char c;
- signed_word *ap = &A1; /* 1st argument */
- /* This isn't the quickest way, since we call the host print
- routine for every character almost. But it does avoid
- having to allocate and manage a temporary string buffer. */
- /* TODO: Include check that we only use three arguments (A1,
- A2 and A3) */
- while (sim_read (sd, s++, &c, 1) && c != '\0')
- {
- if (c == '%')
- {
- char tmp[40];
- enum {FMT_RJUST, FMT_LJUST, FMT_RJUST0, FMT_CENTER} fmt = FMT_RJUST;
- int width = 0, trunc = 0, haddot = 0, longlong = 0;
- while (sim_read (sd, s++, &c, 1) && c != '\0')
- {
- if (strchr ("dobxXulscefg%", c))
- break;
- else if (c == '-')
- fmt = FMT_LJUST;
- else if (c == '0')
- fmt = FMT_RJUST0;
- else if (c == '~')
- fmt = FMT_CENTER;
- else if (c == '*')
- {
- if (haddot)
- trunc = (int)*ap++;
- else
- width = (int)*ap++;
- }
- else if (c >= '1' && c <= '9')
- {
- address_word t = s;
- unsigned int n;
- while (sim_read (sd, s++, &c, 1) == 1 && isdigit (c))
- tmp[s - t] = c;
- tmp[s - t] = '\0';
- n = (unsigned int)strtol(tmp,NULL,10);
- if (haddot)
- trunc = n;
- else
- width = n;
- s--;
- }
- else if (c == '.')
- haddot = 1;
- }
- switch (c)
- {
- case '%':
- sim_io_printf (sd, "%%");
- break;
- case 's':
- if ((int)*ap != 0)
- {
- address_word p = *ap++;
- char ch;
- while (sim_read (sd, p++, &ch, 1) == 1 && ch != '\0')
- sim_io_printf(sd, "%c", ch);
- }
- else
- sim_io_printf(sd,"(null)");
- break;
- case 'c':
- sim_io_printf (sd, "%c", (int)*ap++);
- break;
- default:
- if (c == 'l')
- {
- sim_read (sd, s++, &c, 1);
- if (c == 'l')
- {
- longlong = 1;
- sim_read (sd, s++, &c, 1);
- }
- }
- if (strchr ("dobxXu", c))
- {
- word64 lv = (word64) *ap++;
- if (c == 'b')
- sim_io_printf(sd,"<binary not supported>");
- else
- {
- sprintf (tmp, "%%%s%c", longlong ? "ll" : "", c);
- if (longlong)
- sim_io_printf(sd, tmp, lv);
- else
- sim_io_printf(sd, tmp, (int)lv);
- }
- }
- else if (strchr ("eEfgG", c))
- {
- double dbl = *(double*)(ap++);
- sprintf (tmp, "%%%d.%d%c", width, trunc, c);
- sim_io_printf (sd, tmp, dbl);
- trunc = 0;
- }
- }
- }
- else
- sim_io_printf(sd, "%c", c);
- }
- break;
- }
-
- default:
- /* Unknown reason. */
- return 0;
- }
- return 1;
-}
-
-/* Store a word into memory. */
-
-static void
-store_word (SIM_DESC sd,
- sim_cpu *cpu,
- address_word cia,
- uword64 vaddr,
- signed_word val)
-{
- address_word paddr;
- int uncached;
-
- if ((vaddr & 3) != 0)
- SignalExceptionAddressStore ();
- else
- {
- if (AddressTranslation (vaddr, isDATA, isSTORE, &paddr, &uncached,
- isTARGET, isREAL))
- {
- const uword64 mask = 7;
- uword64 memval;
- unsigned int byte;
-
- paddr = (paddr & ~mask) | ((paddr & mask) ^ (ReverseEndian << 2));
- byte = (vaddr & mask) ^ (BigEndianCPU << 2);
- memval = ((uword64) val) << (8 * byte);
- StoreMemory (uncached, AccessLength_WORD, memval, 0, paddr, vaddr,
- isREAL);
- }
- }
-}
-
-/* Load a word from memory. */
-
-static signed_word
-load_word (SIM_DESC sd,
- sim_cpu *cpu,
- address_word cia,
- uword64 vaddr)
-{
- if ((vaddr & 3) != 0)
- {
- SIM_CORE_SIGNAL (SD, cpu, cia, read_map, AccessLength_WORD+1, vaddr, read_transfer, sim_core_unaligned_signal);
- }
- else
- {
- address_word paddr;
- int uncached;
-
- if (AddressTranslation (vaddr, isDATA, isLOAD, &paddr, &uncached,
- isTARGET, isREAL))
- {
- const uword64 mask = 0x7;
- const unsigned int reverse = ReverseEndian ? 1 : 0;
- const unsigned int bigend = BigEndianCPU ? 1 : 0;
- uword64 memval;
- unsigned int byte;
-
- paddr = (paddr & ~mask) | ((paddr & mask) ^ (reverse << 2));
- LoadMemory (&memval,NULL,uncached, AccessLength_WORD, paddr, vaddr,
- isDATA, isREAL);
- byte = (vaddr & mask) ^ (bigend << 2);
- return SIGNEXTEND (((memval >> (8 * byte)) & 0xffffffff), 32);
- }
- }
-
- return 0;
-}
-
-/* Simulate the mips16 entry and exit pseudo-instructions. These
- would normally be handled by the reserved instruction exception
- code, but for ease of simulation we just handle them directly. */
-
-static void
-mips16_entry (SIM_DESC sd,
- sim_cpu *cpu,
- address_word cia,
- unsigned int insn)
-{
- int aregs, sregs, rreg;
-
-#ifdef DEBUG
- printf("DBG: mips16_entry: entered (insn = 0x%08X)\n",insn);
-#endif /* DEBUG */
-
- aregs = (insn & 0x700) >> 8;
- sregs = (insn & 0x0c0) >> 6;
- rreg = (insn & 0x020) >> 5;
-
- /* This should be checked by the caller. */
- if (sregs == 3)
- abort ();
-
- if (aregs < 5)
- {
- int i;
- signed_word tsp;
-
- /* This is the entry pseudo-instruction. */
-
- for (i = 0; i < aregs; i++)
- store_word (SD, CPU, cia, (uword64) (SP + 4 * i), GPR[i + 4]);
-
- tsp = SP;
- SP -= 32;
-
- if (rreg)
- {
- tsp -= 4;
- store_word (SD, CPU, cia, (uword64) tsp, RA);
- }
-
- for (i = 0; i < sregs; i++)
- {
- tsp -= 4;
- store_word (SD, CPU, cia, (uword64) tsp, GPR[16 + i]);
- }
- }
- else
- {
- int i;
- signed_word tsp;
-
- /* This is the exit pseudo-instruction. */
-
- tsp = SP + 32;
-
- if (rreg)
- {
- tsp -= 4;
- RA = load_word (SD, CPU, cia, (uword64) tsp);
- }
-
- for (i = 0; i < sregs; i++)
- {
- tsp -= 4;
- GPR[i + 16] = load_word (SD, CPU, cia, (uword64) tsp);
- }
-
- SP += 32;
-
- if (CURRENT_FLOATING_POINT == HARD_FLOATING_POINT)
- {
- if (aregs == 5)
- {
- FGR[0] = WORD64LO (GPR[4]);
- FPR_STATE[0] = fmt_uninterpreted;
- }
- else if (aregs == 6)
- {
- FGR[0] = WORD64LO (GPR[5]);
- FGR[1] = WORD64LO (GPR[4]);
- FPR_STATE[0] = fmt_uninterpreted;
- FPR_STATE[1] = fmt_uninterpreted;
- }
- }
-
- PC = RA;
- }
-
-}
-
-/*-- trace support ----------------------------------------------------------*/
-
-/* The TRACE support is provided (if required) in the memory accessing
- routines. Since we are also providing the architecture specific
- features, the architecture simulation code can also deal with
- notifying the TRACE world of cache flushes, etc. Similarly we do
- not need to provide profiling support in the simulator engine,
- since we can sample in the instruction fetch control loop. By
- defining the TRACE manifest, we add tracing as a run-time
- option. */
-
-#if defined(TRACE)
-/* Tracing by default produces "din" format (as required by
- dineroIII). Each line of such a trace file *MUST* have a din label
- and address field. The rest of the line is ignored, so comments can
- be included if desired. The first field is the label which must be
- one of the following values:
-
- 0 read data
- 1 write data
- 2 instruction fetch
- 3 escape record (treated as unknown access type)
- 4 escape record (causes cache flush)
-
- The address field is a 32bit (lower-case) hexadecimal address
- value. The address should *NOT* be preceded by "0x".
-
- The size of the memory transfer is not important when dealing with
- cache lines (as long as no more than a cache line can be
- transferred in a single operation :-), however more information
- could be given following the dineroIII requirement to allow more
- complete memory and cache simulators to provide better
- results. i.e. the University of Pisa has a cache simulator that can
- also take bus size and speed as (variable) inputs to calculate
- complete system performance (a much more useful ability when trying
- to construct an end product, rather than a processor). They
- currently have an ARM version of their tool called ChARM. */
-
-
-void
-dotrace (SIM_DESC sd,
- sim_cpu *cpu,
- FILE *tracefh,
- int type,
- SIM_ADDR address,
- int width,
- char *comment,...)
-{
- if (STATE & simTRACE) {
- va_list ap;
- fprintf(tracefh,"%d %s ; width %d ; ",
- type,
- pr_addr(address),
- width);
- va_start(ap,comment);
- vfprintf(tracefh,comment,ap);
- va_end(ap);
- fprintf(tracefh,"\n");
- }
- /* NOTE: Since the "din" format will only accept 32bit addresses, and
- we may be generating 64bit ones, we should put the hi-32bits of the
- address into the comment field. */
-
- /* TODO: Provide a buffer for the trace lines. We can then avoid
- performing writes until the buffer is filled, or the file is
- being closed. */
-
- /* NOTE: We could consider adding a comment field to the "din" file
- produced using type 3 markers (unknown access). This would then
- allow information about the program that the "din" is for, and
- the MIPs world that was being simulated, to be placed into the
- trace file. */
-
- return;
-}
-#endif /* TRACE */
-
-/*---------------------------------------------------------------------------*/
-/*-- simulator engine -------------------------------------------------------*/
-/*---------------------------------------------------------------------------*/
-
-static void
-ColdReset (SIM_DESC sd)
-{
- int cpu_nr;
- for (cpu_nr = 0; cpu_nr < sim_engine_nr_cpus (sd); cpu_nr++)
- {
- sim_cpu *cpu = STATE_CPU (sd, cpu_nr);
- /* RESET: Fixed PC address: */
- PC = (unsigned_word) UNSIGNED64 (0xFFFFFFFFBFC00000);
- /* The reset vector address is in the unmapped, uncached memory space. */
-
- SR &= ~(status_SR | status_TS | status_RP);
- SR |= (status_ERL | status_BEV);
-
- /* Cheat and allow access to the complete register set immediately */
- if (CURRENT_FLOATING_POINT == HARD_FLOATING_POINT
- && WITH_TARGET_WORD_BITSIZE == 64)
- SR |= status_FR; /* 64bit registers */
-
- /* Ensure that any instructions with pending register updates are
- cleared: */
- PENDING_INVALIDATE();
-
- /* Initialise the FPU registers to the unknown state */
- if (CURRENT_FLOATING_POINT == HARD_FLOATING_POINT)
- {
- int rn;
- for (rn = 0; (rn < 32); rn++)
- FPR_STATE[rn] = fmt_uninterpreted;
- }
-
- }
-}
-
-
-
-
-/* Description from page A-26 of the "MIPS IV Instruction Set" manual (revision 3.1) */
-/* Signal an exception condition. This will result in an exception
- that aborts the instruction. The instruction operation pseudocode
- will never see a return from this function call. */
-
-void
-signal_exception (SIM_DESC sd,
- sim_cpu *cpu,
- address_word cia,
- int exception,...)
-{
- /* int vector; */
-
-#ifdef DEBUG
- sim_io_printf(sd,"DBG: SignalException(%d) PC = 0x%s\n",exception,pr_addr(cia));
-#endif /* DEBUG */
-
- /* Ensure that any active atomic read/modify/write operation will fail: */
- LLBIT = 0;
-
- /* Save registers before interrupt dispatching */
-#ifdef SIM_CPU_EXCEPTION_TRIGGER
- SIM_CPU_EXCEPTION_TRIGGER(sd, cpu, cia);
-#endif
-
- switch (exception) {
-
- case DebugBreakPoint :
- if (! (Debug & Debug_DM))
- {
- if (INDELAYSLOT())
- {
- CANCELDELAYSLOT();
-
- Debug |= Debug_DBD; /* signaled from within in delay slot */
- DEPC = cia - 4; /* reference the branch instruction */
- }
- else
- {
- Debug &= ~Debug_DBD; /* not signaled from within a delay slot */
- DEPC = cia;
- }
-
- Debug |= Debug_DM; /* in debugging mode */
- Debug |= Debug_DBp; /* raising a DBp exception */
- PC = 0xBFC00200;
- sim_engine_restart (SD, CPU, NULL, NULL_CIA);
- }
- break;
-
- case ReservedInstruction :
- {
- va_list ap;
- unsigned int instruction;
- va_start(ap,exception);
- instruction = va_arg(ap,unsigned int);
- va_end(ap);
- /* Provide simple monitor support using ReservedInstruction
- exceptions. The following code simulates the fixed vector
- entry points into the IDT monitor by causing a simulator
- trap, performing the monitor operation, and returning to
- the address held in the $ra register (standard PCS return
- address). This means we only need to pre-load the vector
- space with suitable instruction values. For systems were
- actual trap instructions are used, we would not need to
- perform this magic. */
- if ((instruction & RSVD_INSTRUCTION_MASK) == RSVD_INSTRUCTION)
- {
- int reason = (instruction >> RSVD_INSTRUCTION_ARG_SHIFT) & RSVD_INSTRUCTION_ARG_MASK;
- if (!sim_monitor (SD, CPU, cia, reason))
- sim_io_error (sd, "sim_monitor: unhandled reason = %d, pc = 0x%s\n", reason, pr_addr (cia));
-
- /* NOTE: This assumes that a branch-and-link style
- instruction was used to enter the vector (which is the
- case with the current IDT monitor). */
- sim_engine_restart (SD, CPU, NULL, RA);
- }
- /* Look for the mips16 entry and exit instructions, and
- simulate a handler for them. */
- else if ((cia & 1) != 0
- && (instruction & 0xf81f) == 0xe809
- && (instruction & 0x0c0) != 0x0c0)
- {
- mips16_entry (SD, CPU, cia, instruction);
- sim_engine_restart (sd, NULL, NULL, NULL_CIA);
- }
- /* else fall through to normal exception processing */
- sim_io_eprintf(sd,"ReservedInstruction at PC = 0x%s\n", pr_addr (cia));
- }
-
- default:
- /* Store exception code into current exception id variable (used
- by exit code): */
-
- /* TODO: If not simulating exceptions then stop the simulator
- execution. At the moment we always stop the simulation. */
-
-#ifdef SUBTARGET_R3900
- /* update interrupt-related registers */
-
- /* insert exception code in bits 6:2 */
- CAUSE = LSMASKED32(CAUSE, 31, 7) | LSINSERTED32(exception, 6, 2);
- /* shift IE/KU history bits left */
- SR = LSMASKED32(SR, 31, 4) | LSINSERTED32(LSEXTRACTED32(SR, 3, 0), 5, 2);
-
- if (STATE & simDELAYSLOT)
- {
- STATE &= ~simDELAYSLOT;
- CAUSE |= cause_BD;
- EPC = (cia - 4); /* reference the branch instruction */
- }
- else
- EPC = cia;
-
- if (SR & status_BEV)
- PC = (signed)0xBFC00000 + 0x180;
- else
- PC = (signed)0x80000000 + 0x080;
-#else
- /* See figure 5-17 for an outline of the code below */
- if (! (SR & status_EXL))
- {
- CAUSE = (exception << 2);
- if (STATE & simDELAYSLOT)
- {
- STATE &= ~simDELAYSLOT;
- CAUSE |= cause_BD;
- EPC = (cia - 4); /* reference the branch instruction */
- }
- else
- EPC = cia;
- /* FIXME: TLB et.al. */
- /* vector = 0x180; */
- }
- else
- {
- CAUSE = (exception << 2);
- /* vector = 0x180; */
- }
- SR |= status_EXL;
- /* Store exception code into current exception id variable (used
- by exit code): */
-
- if (SR & status_BEV)
- PC = (signed)0xBFC00200 + 0x180;
- else
- PC = (signed)0x80000000 + 0x180;
-#endif
-
- switch ((CAUSE >> 2) & 0x1F)
- {
- case Interrupt:
- /* Interrupts arrive during event processing, no need to
- restart */
- return;
-
- case NMIReset:
- /* Ditto */
-#ifdef SUBTARGET_3900
- /* Exception vector: BEV=0 BFC00000 / BEF=1 BFC00000 */
- PC = (signed)0xBFC00000;
-#endif SUBTARGET_3900
- return;
-
- case TLBModification:
- case TLBLoad:
- case TLBStore:
- case AddressLoad:
- case AddressStore:
- case InstructionFetch:
- case DataReference:
- /* The following is so that the simulator will continue from the
- exception handler address. */
- sim_engine_halt (SD, CPU, NULL, PC,
- sim_stopped, SIM_SIGBUS);
-
- case ReservedInstruction:
- case CoProcessorUnusable:
- PC = EPC;
- sim_engine_halt (SD, CPU, NULL, PC,
- sim_stopped, SIM_SIGILL);
-
- case IntegerOverflow:
- case FPE:
- sim_engine_halt (SD, CPU, NULL, PC,
- sim_stopped, SIM_SIGFPE);
-
- case BreakPoint:
- sim_engine_halt (SD, CPU, NULL, PC, sim_stopped, SIM_SIGTRAP);
- break;
-
- case SystemCall:
- case Trap:
- sim_engine_restart (SD, CPU, NULL, PC);
- break;
-
- case Watch:
- PC = EPC;
- sim_engine_halt (SD, CPU, NULL, PC,
- sim_stopped, SIM_SIGTRAP);
-
- default : /* Unknown internal exception */
- PC = EPC;
- sim_engine_halt (SD, CPU, NULL, PC,
- sim_stopped, SIM_SIGABRT);
-
- }
-
- case SimulatorFault:
- {
- va_list ap;
- char *msg;
- va_start(ap,exception);
- msg = va_arg(ap,char *);
- va_end(ap);
- sim_engine_abort (SD, CPU, NULL_CIA,
- "FATAL: Simulator error \"%s\"\n",msg);
- }
- }
-
- return;
-}
-
-
-
-#if defined(WARN_RESULT)
-/* Description from page A-26 of the "MIPS IV Instruction Set" manual (revision 3.1) */
-/* This function indicates that the result of the operation is
- undefined. However, this should not affect the instruction
- stream. All that is meant to happen is that the destination
- register is set to an undefined result. To keep the simulator
- simple, we just don't bother updating the destination register, so
- the overall result will be undefined. If desired we can stop the
- simulator by raising a pseudo-exception. */
-#define UndefinedResult() undefined_result (sd,cia)
-static void
-undefined_result(sd,cia)
- SIM_DESC sd;
- address_word cia;
-{
- sim_io_eprintf(sd,"UndefinedResult: PC = 0x%s\n",pr_addr(cia));
-#if 0 /* Disabled for the moment, since it actually happens a lot at the moment. */
- state |= simSTOP;
-#endif
- return;
-}
-#endif /* WARN_RESULT */
-
-/*-- FPU support routines ---------------------------------------------------*/
-
-/* Numbers are held in normalized form. The SINGLE and DOUBLE binary
- formats conform to ANSI/IEEE Std 754-1985. */
-/* SINGLE precision floating:
- * seeeeeeeefffffffffffffffffffffff
- * s = 1bit = sign
- * e = 8bits = exponent
- * f = 23bits = fraction
- */
-/* SINGLE precision fixed:
- * siiiiiiiiiiiiiiiiiiiiiiiiiiiiiii
- * s = 1bit = sign
- * i = 31bits = integer
- */
-/* DOUBLE precision floating:
- * seeeeeeeeeeeffffffffffffffffffffffffffffffffffffffffffffffffffff
- * s = 1bit = sign
- * e = 11bits = exponent
- * f = 52bits = fraction
- */
-/* DOUBLE precision fixed:
- * siiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiii
- * s = 1bit = sign
- * i = 63bits = integer
- */
-
-/* Extract sign-bit: */
-#define FP_S_s(v) (((v) & ((unsigned)1 << 31)) ? 1 : 0)
-#define FP_D_s(v) (((v) & ((uword64)1 << 63)) ? 1 : 0)
-/* Extract biased exponent: */
-#define FP_S_be(v) (((v) >> 23) & 0xFF)
-#define FP_D_be(v) (((v) >> 52) & 0x7FF)
-/* Extract unbiased Exponent: */
-#define FP_S_e(v) (FP_S_be(v) - 0x7F)
-#define FP_D_e(v) (FP_D_be(v) - 0x3FF)
-/* Extract complete fraction field: */
-#define FP_S_f(v) ((v) & ~((unsigned)0x1FF << 23))
-#define FP_D_f(v) ((v) & ~((uword64)0xFFF << 52))
-/* Extract numbered fraction bit: */
-#define FP_S_fb(b,v) (((v) & (1 << (23 - (b)))) ? 1 : 0)
-#define FP_D_fb(b,v) (((v) & (1 << (52 - (b)))) ? 1 : 0)
-
-/* Explicit QNaN values used when value required: */
-#define FPQNaN_SINGLE (0x7FBFFFFF)
-#define FPQNaN_WORD (0x7FFFFFFF)
-#define FPQNaN_DOUBLE (((uword64)0x7FF7FFFF << 32) | 0xFFFFFFFF)
-#define FPQNaN_LONG (((uword64)0x7FFFFFFF << 32) | 0xFFFFFFFF)
-
-/* Explicit Infinity values used when required: */
-#define FPINF_SINGLE (0x7F800000)
-#define FPINF_DOUBLE (((uword64)0x7FF00000 << 32) | 0x00000000)
-
-#define RMMODE(v) (((v) == FP_RM_NEAREST) ? "Round" : (((v) == FP_RM_TOZERO) ? "Trunc" : (((v) == FP_RM_TOPINF) ? "Ceil" : "Floor")))
-#define DOFMT(v) (((v) == fmt_single) ? "single" : (((v) == fmt_double) ? "double" : (((v) == fmt_word) ? "word" : (((v) == fmt_long) ? "long" : (((v) == fmt_unknown) ? "<unknown>" : (((v) == fmt_uninterpreted) ? "<uninterpreted>" : (((v) == fmt_uninterpreted_32) ? "<uninterpreted_32>" : (((v) == fmt_uninterpreted_64) ? "<uninterpreted_64>" : "<format error>"))))))))
-
-uword64
-value_fpr (SIM_DESC sd,
- sim_cpu *cpu,
- address_word cia,
- int fpr,
- FP_formats fmt)
-{
- uword64 value = 0;
- int err = 0;
-
- /* Treat unused register values, as fixed-point 64bit values: */
- if ((fmt == fmt_uninterpreted) || (fmt == fmt_unknown))
-#if 1
- /* If request to read data as "uninterpreted", then use the current
- encoding: */
- fmt = FPR_STATE[fpr];
-#else
- fmt = fmt_long;
-#endif
-
- /* For values not yet accessed, set to the desired format: */
- if (FPR_STATE[fpr] == fmt_uninterpreted) {
- FPR_STATE[fpr] = fmt;
-#ifdef DEBUG
- printf("DBG: Register %d was fmt_uninterpreted. Now %s\n",fpr,DOFMT(fmt));
-#endif /* DEBUG */
- }
- if (fmt != FPR_STATE[fpr]) {
- sim_io_eprintf(sd,"FPR %d (format %s) being accessed with format %s - setting to unknown (PC = 0x%s)\n",fpr,DOFMT(FPR_STATE[fpr]),DOFMT(fmt),pr_addr(cia));
- FPR_STATE[fpr] = fmt_unknown;
- }
-
- if (FPR_STATE[fpr] == fmt_unknown) {
- /* Set QNaN value: */
- switch (fmt) {
- case fmt_single:
- value = FPQNaN_SINGLE;
- break;
-
- case fmt_double:
- value = FPQNaN_DOUBLE;
- break;
-
- case fmt_word:
- value = FPQNaN_WORD;
- break;
-
- case fmt_long:
- value = FPQNaN_LONG;
- break;
-
- default:
- err = -1;
- break;
- }
- } else if (SizeFGR() == 64) {
- switch (fmt) {
- case fmt_single:
- case fmt_word:
- value = (FGR[fpr] & 0xFFFFFFFF);
- break;
-
- case fmt_uninterpreted:
- case fmt_double:
- case fmt_long:
- value = FGR[fpr];
- break;
-
- default :
- err = -1;
- break;
- }
- } else {
- switch (fmt) {
- case fmt_single:
- case fmt_word:
- value = (FGR[fpr] & 0xFFFFFFFF);
- break;
-
- case fmt_uninterpreted:
- case fmt_double:
- case fmt_long:
- if ((fpr & 1) == 0) { /* even registers only */
-#ifdef DEBUG
- printf("DBG: ValueFPR: FGR[%d] = %s, FGR[%d] = %s\n",
- fpr+1, pr_uword64( (uword64) FGR[fpr+1] ),
- fpr, pr_uword64( (uword64) FGR[fpr] ));
-#endif
- value = ((((uword64)FGR[fpr+1]) << 32) | (FGR[fpr] & 0xFFFFFFFF));
- } else {
- SignalException(ReservedInstruction,0);
- }
- break;
-
- default :
- err = -1;
- break;
- }
- }
-
- if (err)
- SignalExceptionSimulatorFault ("Unrecognised FP format in ValueFPR()");
-
-#ifdef DEBUG
- printf("DBG: ValueFPR: fpr = %d, fmt = %s, value = 0x%s : PC = 0x%s : SizeFGR() = %d\n",fpr,DOFMT(fmt),pr_uword64(value),pr_addr(cia),SizeFGR());
-#endif /* DEBUG */
-
- return(value);
-}
-
-void
-store_fpr (SIM_DESC sd,
- sim_cpu *cpu,
- address_word cia,
- int fpr,
- FP_formats fmt,
- uword64 value)
-{
- int err = 0;
-
-#ifdef DEBUG
- printf("DBG: StoreFPR: fpr = %d, fmt = %s, value = 0x%s : PC = 0x%s : SizeFGR() = %d,\n",fpr,DOFMT(fmt),pr_uword64(value),pr_addr(cia),SizeFGR());
-#endif /* DEBUG */
-
- if (SizeFGR() == 64) {
- switch (fmt) {
- case fmt_uninterpreted_32:
- fmt = fmt_uninterpreted;
- case fmt_single :
- case fmt_word :
- if (STATE_VERBOSE_P(SD))
- sim_io_eprintf (SD, "Warning: PC 0x%s: interp.c store_fpr DEADCODE\n",
- pr_addr(cia));
- FGR[fpr] = (((uword64)0xDEADC0DE << 32) | (value & 0xFFFFFFFF));
- FPR_STATE[fpr] = fmt;
- break;
-
- case fmt_uninterpreted_64:
- fmt = fmt_uninterpreted;
- case fmt_uninterpreted:
- case fmt_double :
- case fmt_long :
- FGR[fpr] = value;
- FPR_STATE[fpr] = fmt;
- break;
-
- default :
- FPR_STATE[fpr] = fmt_unknown;
- err = -1;
- break;
- }
- } else {
- switch (fmt) {
- case fmt_uninterpreted_32:
- fmt = fmt_uninterpreted;
- case fmt_single :
- case fmt_word :
- FGR[fpr] = (value & 0xFFFFFFFF);
- FPR_STATE[fpr] = fmt;
- break;
-
- case fmt_uninterpreted_64:
- fmt = fmt_uninterpreted;
- case fmt_uninterpreted:
- case fmt_double :
- case fmt_long :
- if ((fpr & 1) == 0) { /* even register number only */
- FGR[fpr+1] = (value >> 32);
- FGR[fpr] = (value & 0xFFFFFFFF);
- FPR_STATE[fpr + 1] = fmt;
- FPR_STATE[fpr] = fmt;
- } else {
- FPR_STATE[fpr] = fmt_unknown;
- FPR_STATE[fpr + 1] = fmt_unknown;
- SignalException(ReservedInstruction,0);
- }
- break;
-
- default :
- FPR_STATE[fpr] = fmt_unknown;
- err = -1;
- break;
- }
- }
-#if defined(WARN_RESULT)
- else
- UndefinedResult();
-#endif /* WARN_RESULT */
-
- if (err)
- SignalExceptionSimulatorFault ("Unrecognised FP format in StoreFPR()");
-
-#ifdef DEBUG
- printf("DBG: StoreFPR: fpr[%d] = 0x%s (format %s)\n",fpr,pr_uword64(FGR[fpr]),DOFMT(fmt));
-#endif /* DEBUG */
-
- return;
-}
-
-int
-NaN(op,fmt)
- uword64 op;
- FP_formats fmt;
-{
- int boolean = 0;
- switch (fmt) {
- case fmt_single:
- case fmt_word:
- {
- sim_fpu wop;
- sim_fpu_32to (&wop, op);
- boolean = sim_fpu_is_nan (&wop);
- break;
- }
- case fmt_double:
- case fmt_long:
- {
- sim_fpu wop;
- sim_fpu_64to (&wop, op);
- boolean = sim_fpu_is_nan (&wop);
- break;
- }
- default:
- fprintf (stderr, "Bad switch\n");
- abort ();
- }
-
-#ifdef DEBUG
-printf("DBG: NaN: returning %d for 0x%s (format = %s)\n",boolean,pr_addr(op),DOFMT(fmt));
-#endif /* DEBUG */
-
- return(boolean);
-}
-
-int
-Infinity(op,fmt)
- uword64 op;
- FP_formats fmt;
-{
- int boolean = 0;
-
-#ifdef DEBUG
- printf("DBG: Infinity: format %s 0x%s\n",DOFMT(fmt),pr_addr(op));
-#endif /* DEBUG */
-
- switch (fmt) {
- case fmt_single:
- {
- sim_fpu wop;
- sim_fpu_32to (&wop, op);
- boolean = sim_fpu_is_infinity (&wop);
- break;
- }
- case fmt_double:
- {
- sim_fpu wop;
- sim_fpu_64to (&wop, op);
- boolean = sim_fpu_is_infinity (&wop);
- break;
- }
- default:
- printf("DBG: TODO: unrecognised format (%s) for Infinity check\n",DOFMT(fmt));
- break;
- }
-
-#ifdef DEBUG
- printf("DBG: Infinity: returning %d for 0x%s (format = %s)\n",boolean,pr_addr(op),DOFMT(fmt));
-#endif /* DEBUG */
-
- return(boolean);
-}
-
-int
-Less(op1,op2,fmt)
- uword64 op1;
- uword64 op2;
- FP_formats fmt;
-{
- int boolean = 0;
-
- /* Argument checking already performed by the FPCOMPARE code */
-
-#ifdef DEBUG
- printf("DBG: Less: %s: op1 = 0x%s : op2 = 0x%s\n",DOFMT(fmt),pr_addr(op1),pr_addr(op2));
-#endif /* DEBUG */
-
- /* The format type should already have been checked: */
- switch (fmt) {
- case fmt_single:
- {
- sim_fpu wop1;
- sim_fpu wop2;
- sim_fpu_32to (&wop1, op1);
- sim_fpu_32to (&wop2, op2);
- boolean = sim_fpu_is_lt (&wop1, &wop2);
- break;
- }
- case fmt_double:
- {
- sim_fpu wop1;
- sim_fpu wop2;
- sim_fpu_64to (&wop1, op1);
- sim_fpu_64to (&wop2, op2);
- boolean = sim_fpu_is_lt (&wop1, &wop2);
- break;
- }
- default:
- fprintf (stderr, "Bad switch\n");
- abort ();
- }
-
-#ifdef DEBUG
- printf("DBG: Less: returning %d (format = %s)\n",boolean,DOFMT(fmt));
-#endif /* DEBUG */
-
- return(boolean);
-}
-
-int
-Equal(op1,op2,fmt)
- uword64 op1;
- uword64 op2;
- FP_formats fmt;
-{
- int boolean = 0;
-
- /* Argument checking already performed by the FPCOMPARE code */
-
-#ifdef DEBUG
- printf("DBG: Equal: %s: op1 = 0x%s : op2 = 0x%s\n",DOFMT(fmt),pr_addr(op1),pr_addr(op2));
-#endif /* DEBUG */
-
- /* The format type should already have been checked: */
- switch (fmt) {
- case fmt_single:
- {
- sim_fpu wop1;
- sim_fpu wop2;
- sim_fpu_32to (&wop1, op1);
- sim_fpu_32to (&wop2, op2);
- boolean = sim_fpu_is_eq (&wop1, &wop2);
- break;
- }
- case fmt_double:
- {
- sim_fpu wop1;
- sim_fpu wop2;
- sim_fpu_64to (&wop1, op1);
- sim_fpu_64to (&wop2, op2);
- boolean = sim_fpu_is_eq (&wop1, &wop2);
- break;
- }
- default:
- fprintf (stderr, "Bad switch\n");
- abort ();
- }
-
-#ifdef DEBUG
- printf("DBG: Equal: returning %d (format = %s)\n",boolean,DOFMT(fmt));
-#endif /* DEBUG */
-
- return(boolean);
-}
-
-uword64
-AbsoluteValue(op,fmt)
- uword64 op;
- FP_formats fmt;
-{
- uword64 result = 0;
-
-#ifdef DEBUG
- printf("DBG: AbsoluteValue: %s: op = 0x%s\n",DOFMT(fmt),pr_addr(op));
-#endif /* DEBUG */
-
- /* The format type should already have been checked: */
- switch (fmt) {
- case fmt_single:
- {
- sim_fpu wop;
- unsigned32 ans;
- sim_fpu_32to (&wop, op);
- sim_fpu_abs (&wop, &wop);
- sim_fpu_to32 (&ans, &wop);
- result = ans;
- break;
- }
- case fmt_double:
- {
- sim_fpu wop;
- unsigned64 ans;
- sim_fpu_64to (&wop, op);
- sim_fpu_abs (&wop, &wop);
- sim_fpu_to64 (&ans, &wop);
- result = ans;
- break;
- }
- default:
- fprintf (stderr, "Bad switch\n");
- abort ();
- }
-
- return(result);
-}
-
-uword64
-Negate(op,fmt)
- uword64 op;
- FP_formats fmt;
-{
- uword64 result = 0;
-
-#ifdef DEBUG
- printf("DBG: Negate: %s: op = 0x%s\n",DOFMT(fmt),pr_addr(op));
-#endif /* DEBUG */
-
- /* The format type should already have been checked: */
- switch (fmt) {
- case fmt_single:
- {
- sim_fpu wop;
- unsigned32 ans;
- sim_fpu_32to (&wop, op);
- sim_fpu_neg (&wop, &wop);
- sim_fpu_to32 (&ans, &wop);
- result = ans;
- break;
- }
- case fmt_double:
- {
- sim_fpu wop;
- unsigned64 ans;
- sim_fpu_64to (&wop, op);
- sim_fpu_neg (&wop, &wop);
- sim_fpu_to64 (&ans, &wop);
- result = ans;
- break;
- }
- default:
- fprintf (stderr, "Bad switch\n");
- abort ();
- }
-
- return(result);
-}
-
-uword64
-Add(op1,op2,fmt)
- uword64 op1;
- uword64 op2;
- FP_formats fmt;
-{
- uword64 result = 0;
-
-#ifdef DEBUG
- printf("DBG: Add: %s: op1 = 0x%s : op2 = 0x%s\n",DOFMT(fmt),pr_addr(op1),pr_addr(op2));
-#endif /* DEBUG */
-
- /* The registers must specify FPRs valid for operands of type
- "fmt". If they are not valid, the result is undefined. */
-
- /* The format type should already have been checked: */
- switch (fmt) {
- case fmt_single:
- {
- sim_fpu wop1;
- sim_fpu wop2;
- sim_fpu ans;
- unsigned32 res;
- sim_fpu_32to (&wop1, op1);
- sim_fpu_32to (&wop2, op2);
- sim_fpu_add (&ans, &wop1, &wop2);
- sim_fpu_to32 (&res, &ans);
- result = res;
- break;
- }
- case fmt_double:
- {
- sim_fpu wop1;
- sim_fpu wop2;
- sim_fpu ans;
- unsigned64 res;
- sim_fpu_64to (&wop1, op1);
- sim_fpu_64to (&wop2, op2);
- sim_fpu_add (&ans, &wop1, &wop2);
- sim_fpu_to64 (&res, &ans);
- result = res;
- break;
- }
- default:
- fprintf (stderr, "Bad switch\n");
- abort ();
- }
-
-#ifdef DEBUG
- printf("DBG: Add: returning 0x%s (format = %s)\n",pr_addr(result),DOFMT(fmt));
-#endif /* DEBUG */
-
- return(result);
-}
-
-uword64
-Sub(op1,op2,fmt)
- uword64 op1;
- uword64 op2;
- FP_formats fmt;
-{
- uword64 result = 0;
-
-#ifdef DEBUG
- printf("DBG: Sub: %s: op1 = 0x%s : op2 = 0x%s\n",DOFMT(fmt),pr_addr(op1),pr_addr(op2));
-#endif /* DEBUG */
-
- /* The registers must specify FPRs valid for operands of type
- "fmt". If they are not valid, the result is undefined. */
-
- /* The format type should already have been checked: */
- switch (fmt) {
- case fmt_single:
- {
- sim_fpu wop1;
- sim_fpu wop2;
- sim_fpu ans;
- unsigned32 res;
- sim_fpu_32to (&wop1, op1);
- sim_fpu_32to (&wop2, op2);
- sim_fpu_sub (&ans, &wop1, &wop2);
- sim_fpu_to32 (&res, &ans);
- result = res;
- }
- break;
- case fmt_double:
- {
- sim_fpu wop1;
- sim_fpu wop2;
- sim_fpu ans;
- unsigned64 res;
- sim_fpu_64to (&wop1, op1);
- sim_fpu_64to (&wop2, op2);
- sim_fpu_sub (&ans, &wop1, &wop2);
- sim_fpu_to64 (&res, &ans);
- result = res;
- }
- break;
- default:
- fprintf (stderr, "Bad switch\n");
- abort ();
- }
-
-#ifdef DEBUG
- printf("DBG: Sub: returning 0x%s (format = %s)\n",pr_addr(result),DOFMT(fmt));
-#endif /* DEBUG */
-
- return(result);
-}
-
-uword64
-Multiply(op1,op2,fmt)
- uword64 op1;
- uword64 op2;
- FP_formats fmt;
-{
- uword64 result = 0;
-
-#ifdef DEBUG
- printf("DBG: Multiply: %s: op1 = 0x%s : op2 = 0x%s\n",DOFMT(fmt),pr_addr(op1),pr_addr(op2));
-#endif /* DEBUG */
-
- /* The registers must specify FPRs valid for operands of type
- "fmt". If they are not valid, the result is undefined. */
-
- /* The format type should already have been checked: */
- switch (fmt) {
- case fmt_single:
- {
- sim_fpu wop1;
- sim_fpu wop2;
- sim_fpu ans;
- unsigned32 res;
- sim_fpu_32to (&wop1, op1);
- sim_fpu_32to (&wop2, op2);
- sim_fpu_mul (&ans, &wop1, &wop2);
- sim_fpu_to32 (&res, &ans);
- result = res;
- break;
- }
- case fmt_double:
- {
- sim_fpu wop1;
- sim_fpu wop2;
- sim_fpu ans;
- unsigned64 res;
- sim_fpu_64to (&wop1, op1);
- sim_fpu_64to (&wop2, op2);
- sim_fpu_mul (&ans, &wop1, &wop2);
- sim_fpu_to64 (&res, &ans);
- result = res;
- break;
- }
- default:
- fprintf (stderr, "Bad switch\n");
- abort ();
- }
-
-#ifdef DEBUG
- printf("DBG: Multiply: returning 0x%s (format = %s)\n",pr_addr(result),DOFMT(fmt));
-#endif /* DEBUG */
-
- return(result);
-}
-
-uword64
-Divide(op1,op2,fmt)
- uword64 op1;
- uword64 op2;
- FP_formats fmt;
-{
- uword64 result = 0;
-
-#ifdef DEBUG
- printf("DBG: Divide: %s: op1 = 0x%s : op2 = 0x%s\n",DOFMT(fmt),pr_addr(op1),pr_addr(op2));
-#endif /* DEBUG */
-
- /* The registers must specify FPRs valid for operands of type
- "fmt". If they are not valid, the result is undefined. */
-
- /* The format type should already have been checked: */
- switch (fmt) {
- case fmt_single:
- {
- sim_fpu wop1;
- sim_fpu wop2;
- sim_fpu ans;
- unsigned32 res;
- sim_fpu_32to (&wop1, op1);
- sim_fpu_32to (&wop2, op2);
- sim_fpu_div (&ans, &wop1, &wop2);
- sim_fpu_to32 (&res, &ans);
- result = res;
- break;
- }
- case fmt_double:
- {
- sim_fpu wop1;
- sim_fpu wop2;
- sim_fpu ans;
- unsigned64 res;
- sim_fpu_64to (&wop1, op1);
- sim_fpu_64to (&wop2, op2);
- sim_fpu_div (&ans, &wop1, &wop2);
- sim_fpu_to64 (&res, &ans);
- result = res;
- break;
- }
- default:
- fprintf (stderr, "Bad switch\n");
- abort ();
- }
-
-#ifdef DEBUG
- printf("DBG: Divide: returning 0x%s (format = %s)\n",pr_addr(result),DOFMT(fmt));
-#endif /* DEBUG */
-
- return(result);
-}
-
-uword64 UNUSED
-Recip(op,fmt)
- uword64 op;
- FP_formats fmt;
-{
- uword64 result = 0;
-
-#ifdef DEBUG
- printf("DBG: Recip: %s: op = 0x%s\n",DOFMT(fmt),pr_addr(op));
-#endif /* DEBUG */
-
- /* The registers must specify FPRs valid for operands of type
- "fmt". If they are not valid, the result is undefined. */
-
- /* The format type should already have been checked: */
- switch (fmt) {
- case fmt_single:
- {
- sim_fpu wop;
- sim_fpu ans;
- unsigned32 res;
- sim_fpu_32to (&wop, op);
- sim_fpu_inv (&ans, &wop);
- sim_fpu_to32 (&res, &ans);
- result = res;
- break;
- }
- case fmt_double:
- {
- sim_fpu wop;
- sim_fpu ans;
- unsigned64 res;
- sim_fpu_64to (&wop, op);
- sim_fpu_inv (&ans, &wop);
- sim_fpu_to64 (&res, &ans);
- result = res;
- break;
- }
- default:
- fprintf (stderr, "Bad switch\n");
- abort ();
- }
-
-#ifdef DEBUG
- printf("DBG: Recip: returning 0x%s (format = %s)\n",pr_addr(result),DOFMT(fmt));
-#endif /* DEBUG */
-
- return(result);
-}
-
-uword64
-SquareRoot(op,fmt)
- uword64 op;
- FP_formats fmt;
-{
- uword64 result = 0;
-
-#ifdef DEBUG
- printf("DBG: SquareRoot: %s: op = 0x%s\n",DOFMT(fmt),pr_addr(op));
-#endif /* DEBUG */
-
- /* The registers must specify FPRs valid for operands of type
- "fmt". If they are not valid, the result is undefined. */
-
- /* The format type should already have been checked: */
- switch (fmt) {
- case fmt_single:
- {
- sim_fpu wop;
- sim_fpu ans;
- unsigned32 res;
- sim_fpu_32to (&wop, op);
- sim_fpu_sqrt (&ans, &wop);
- sim_fpu_to32 (&res, &ans);
- result = res;
- break;
- }
- case fmt_double:
- {
- sim_fpu wop;
- sim_fpu ans;
- unsigned64 res;
- sim_fpu_64to (&wop, op);
- sim_fpu_sqrt (&ans, &wop);
- sim_fpu_to64 (&res, &ans);
- result = res;
- break;
- }
- default:
- fprintf (stderr, "Bad switch\n");
- abort ();
- }
-
-#ifdef DEBUG
- printf("DBG: SquareRoot: returning 0x%s (format = %s)\n",pr_addr(result),DOFMT(fmt));
-#endif /* DEBUG */
-
- return(result);
-}
-
-#if 0
-uword64
-Max (uword64 op1,
- uword64 op2,
- FP_formats fmt)
-{
- int cmp;
- unsigned64 result;
-
-#ifdef DEBUG
- printf("DBG: Max: %s: op1 = 0x%s : op2 = 0x%s\n",DOFMT(fmt),pr_addr(op1),pr_addr(op2));
-#endif /* DEBUG */
-
- /* The registers must specify FPRs valid for operands of type
- "fmt". If they are not valid, the result is undefined. */
-
- /* The format type should already have been checked: */
- switch (fmt)
- {
- case fmt_single:
- {
- sim_fpu wop1;
- sim_fpu wop2;
- sim_fpu_32to (&wop1, op1);
- sim_fpu_32to (&wop2, op2);
- cmp = sim_fpu_cmp (&wop1, &wop2);
- break;
- }
- case fmt_double:
- {
- sim_fpu wop1;
- sim_fpu wop2;
- sim_fpu_64to (&wop1, op1);
- sim_fpu_64to (&wop2, op2);
- cmp = sim_fpu_cmp (&wop1, &wop2);
- break;
- }
- default:
- fprintf (stderr, "Bad switch\n");
- abort ();
- }
-
- switch (cmp)
- {
- case SIM_FPU_IS_SNAN:
- case SIM_FPU_IS_QNAN:
- result = op1;
- case SIM_FPU_IS_NINF:
- case SIM_FPU_IS_NNUMBER:
- case SIM_FPU_IS_NDENORM:
- case SIM_FPU_IS_NZERO:
- result = op2; /* op1 - op2 < 0 */
- case SIM_FPU_IS_PINF:
- case SIM_FPU_IS_PNUMBER:
- case SIM_FPU_IS_PDENORM:
- case SIM_FPU_IS_PZERO:
- result = op1; /* op1 - op2 > 0 */
- default:
- fprintf (stderr, "Bad switch\n");
- abort ();
- }
-
-#ifdef DEBUG
- printf("DBG: Max: returning 0x%s (format = %s)\n",pr_addr(result),DOFMT(fmt));
-#endif /* DEBUG */
-
- return(result);
-}
-#endif
-
-#if 0
-uword64
-Min (uword64 op1,
- uword64 op2,
- FP_formats fmt)
-{
- int cmp;
- unsigned64 result;
-
-#ifdef DEBUG
- printf("DBG: Min: %s: op1 = 0x%s : op2 = 0x%s\n",DOFMT(fmt),pr_addr(op1),pr_addr(op2));
-#endif /* DEBUG */
-
- /* The registers must specify FPRs valid for operands of type
- "fmt". If they are not valid, the result is undefined. */
-
- /* The format type should already have been checked: */
- switch (fmt)
- {
- case fmt_single:
- {
- sim_fpu wop1;
- sim_fpu wop2;
- sim_fpu_32to (&wop1, op1);
- sim_fpu_32to (&wop2, op2);
- cmp = sim_fpu_cmp (&wop1, &wop2);
- break;
- }
- case fmt_double:
- {
- sim_fpu wop1;
- sim_fpu wop2;
- sim_fpu_64to (&wop1, op1);
- sim_fpu_64to (&wop2, op2);
- cmp = sim_fpu_cmp (&wop1, &wop2);
- break;
- }
- default:
- fprintf (stderr, "Bad switch\n");
- abort ();
- }
-
- switch (cmp)
- {
- case SIM_FPU_IS_SNAN:
- case SIM_FPU_IS_QNAN:
- result = op1;
- case SIM_FPU_IS_NINF:
- case SIM_FPU_IS_NNUMBER:
- case SIM_FPU_IS_NDENORM:
- case SIM_FPU_IS_NZERO:
- result = op1; /* op1 - op2 < 0 */
- case SIM_FPU_IS_PINF:
- case SIM_FPU_IS_PNUMBER:
- case SIM_FPU_IS_PDENORM:
- case SIM_FPU_IS_PZERO:
- result = op2; /* op1 - op2 > 0 */
- default:
- fprintf (stderr, "Bad switch\n");
- abort ();
- }
-
-#ifdef DEBUG
- printf("DBG: Min: returning 0x%s (format = %s)\n",pr_addr(result),DOFMT(fmt));
-#endif /* DEBUG */
-
- return(result);
-}
-#endif
-
-uword64
-convert (SIM_DESC sd,
- sim_cpu *cpu,
- address_word cia,
- int rm,
- uword64 op,
- FP_formats from,
- FP_formats to)
-{
- sim_fpu wop;
- sim_fpu_round round;
- unsigned32 result32;
- unsigned64 result64;
-
-#ifdef DEBUG
-#if 0 /* FIXME: doesn't compile */
- printf("DBG: Convert: mode %s : op 0x%s : from %s : to %s : (PC = 0x%s)\n",RMMODE(rm),pr_addr(op),DOFMT(from),DOFMT(to),pr_addr(IPC));
-#endif
-#endif /* DEBUG */
-
- switch (rm)
- {
- case FP_RM_NEAREST:
- /* Round result to nearest representable value. When two
- representable values are equally near, round to the value
- that has a least significant bit of zero (i.e. is even). */
- round = sim_fpu_round_near;
- break;
- case FP_RM_TOZERO:
- /* Round result to the value closest to, and not greater in
- magnitude than, the result. */
- round = sim_fpu_round_zero;
- break;
- case FP_RM_TOPINF:
- /* Round result to the value closest to, and not less than,
- the result. */
- round = sim_fpu_round_up;
- break;
-
- case FP_RM_TOMINF:
- /* Round result to the value closest to, and not greater than,
- the result. */
- round = sim_fpu_round_down;
- break;
- default:
- round = 0;
- fprintf (stderr, "Bad switch\n");
- abort ();
- }
-
- /* Convert the input to sim_fpu internal format */
- switch (from)
- {
- case fmt_double:
- sim_fpu_64to (&wop, op);
- break;
- case fmt_single:
- sim_fpu_32to (&wop, op);
- break;
- case fmt_word:
- sim_fpu_i32to (&wop, op, round);
- break;
- case fmt_long:
- sim_fpu_i64to (&wop, op, round);
- break;
- default:
- fprintf (stderr, "Bad switch\n");
- abort ();
- }
-
- /* Convert sim_fpu format into the output */
- /* The value WOP is converted to the destination format, rounding
- using mode RM. When the destination is a fixed-point format, then
- a source value of Infinity, NaN or one which would round to an
- integer outside the fixed point range then an IEEE Invalid
- Operation condition is raised. */
- switch (to)
- {
- case fmt_single:
- sim_fpu_round_32 (&wop, round, 0);
- sim_fpu_to32 (&result32, &wop);
- result64 = result32;
- break;
- case fmt_double:
- sim_fpu_round_64 (&wop, round, 0);
- sim_fpu_to64 (&result64, &wop);
- break;
- case fmt_word:
- sim_fpu_to32i (&result32, &wop, round);
- result64 = result32;
- break;
- case fmt_long:
- sim_fpu_to64i (&result64, &wop, round);
- break;
- default:
- result64 = 0;
- fprintf (stderr, "Bad switch\n");
- abort ();
- }
-
-#ifdef DEBUG
- printf("DBG: Convert: returning 0x%s (to format = %s)\n",pr_addr(result64),DOFMT(to));
-#endif /* DEBUG */
-
- return(result64);
-}
-
-
-/*-- co-processor support routines ------------------------------------------*/
-
-static int UNUSED
-CoProcPresent(unsigned int coproc_number)
-{
- /* Return TRUE if simulator provides a model for the given co-processor number */
- return(0);
-}
-
-void
-cop_lw (SIM_DESC sd,
- sim_cpu *cpu,
- address_word cia,
- int coproc_num,
- int coproc_reg,
- unsigned int memword)
-{
- switch (coproc_num)
- {
- case 1:
- if (CURRENT_FLOATING_POINT == HARD_FLOATING_POINT)
- {
-#ifdef DEBUG
- printf("DBG: COP_LW: memword = 0x%08X (uword64)memword = 0x%s\n",memword,pr_addr(memword));
-#endif
- StoreFPR(coproc_reg,fmt_word,(uword64)memword);
- FPR_STATE[coproc_reg] = fmt_uninterpreted;
- break;
- }
-
- default:
-#if 0 /* this should be controlled by a configuration option */
- sim_io_printf(sd,"COP_LW(%d,%d,0x%08X) at PC = 0x%s : TODO (architecture specific)\n",coproc_num,coproc_reg,memword,pr_addr(cia));
-#endif
- break;
- }
-
- return;
-}
-
-void
-cop_ld (SIM_DESC sd,
- sim_cpu *cpu,
- address_word cia,
- int coproc_num,
- int coproc_reg,
- uword64 memword)
-{
-
-#ifdef DEBUG
- printf("DBG: COP_LD: coproc_num = %d, coproc_reg = %d, value = 0x%s : PC = 0x%s\n", coproc_num, coproc_reg, pr_uword64(memword), pr_addr(cia) );
-#endif
-
- switch (coproc_num) {
- case 1:
- if (CURRENT_FLOATING_POINT == HARD_FLOATING_POINT)
- {
- StoreFPR(coproc_reg,fmt_uninterpreted,memword);
- break;
- }
-
- default:
-#if 0 /* this message should be controlled by a configuration option */
- sim_io_printf(sd,"COP_LD(%d,%d,0x%s) at PC = 0x%s : TODO (architecture specific)\n",coproc_num,coproc_reg,pr_addr(memword),pr_addr(cia));
-#endif
- break;
- }
-
- return;
-}
-
-
-
-
-unsigned int
-cop_sw (SIM_DESC sd,
- sim_cpu *cpu,
- address_word cia,
- int coproc_num,
- int coproc_reg)
-{
- unsigned int value = 0;
-
- switch (coproc_num)
- {
- case 1:
- if (CURRENT_FLOATING_POINT == HARD_FLOATING_POINT)
- {
- FP_formats hold;
- hold = FPR_STATE[coproc_reg];
- FPR_STATE[coproc_reg] = fmt_word;
- value = (unsigned int)ValueFPR(coproc_reg,fmt_uninterpreted);
- FPR_STATE[coproc_reg] = hold;
- break;
- }
-
- default:
-#if 0 /* should be controlled by configuration option */
- sim_io_printf(sd,"COP_SW(%d,%d) at PC = 0x%s : TODO (architecture specific)\n",coproc_num,coproc_reg,pr_addr(cia));
-#endif
- break;
- }
-
- return(value);
-}
-
-uword64
-cop_sd (SIM_DESC sd,
- sim_cpu *cpu,
- address_word cia,
- int coproc_num,
- int coproc_reg)
-{
- uword64 value = 0;
- switch (coproc_num)
- {
- case 1:
- if (CURRENT_FLOATING_POINT == HARD_FLOATING_POINT)
- {
- value = ValueFPR(coproc_reg,fmt_uninterpreted);
- break;
- }
-
- default:
-#if 0 /* should be controlled by configuration option */
- sim_io_printf(sd,"COP_SD(%d,%d) at PC = 0x%s : TODO (architecture specific)\n",coproc_num,coproc_reg,pr_addr(cia));
-#endif
- break;
- }
-
- return(value);
-}
-
-
-
-
-void
-decode_coproc (SIM_DESC sd,
- sim_cpu *cpu,
- address_word cia,
- unsigned int instruction)
-{
- int coprocnum = ((instruction >> 26) & 3);
-
- switch (coprocnum)
- {
- case 0: /* standard CPU control and cache registers */
- {
- int code = ((instruction >> 21) & 0x1F);
- int rt = ((instruction >> 16) & 0x1F);
- int rd = ((instruction >> 11) & 0x1F);
- int tail = instruction & 0x3ff;
- /* R4000 Users Manual (second edition) lists the following CP0
- instructions:
- CODE><-RT><RD-><--TAIL--->
- DMFC0 Doubleword Move From CP0 (VR4100 = 01000000001tttttddddd00000000000)
- DMTC0 Doubleword Move To CP0 (VR4100 = 01000000101tttttddddd00000000000)
- MFC0 word Move From CP0 (VR4100 = 01000000000tttttddddd00000000000)
- MTC0 word Move To CP0 (VR4100 = 01000000100tttttddddd00000000000)
- TLBR Read Indexed TLB Entry (VR4100 = 01000010000000000000000000000001)
- TLBWI Write Indexed TLB Entry (VR4100 = 01000010000000000000000000000010)
- TLBWR Write Random TLB Entry (VR4100 = 01000010000000000000000000000110)
- TLBP Probe TLB for Matching Entry (VR4100 = 01000010000000000000000000001000)
- CACHE Cache operation (VR4100 = 101111bbbbbpppppiiiiiiiiiiiiiiii)
- ERET Exception return (VR4100 = 01000010000000000000000000011000)
- */
- if (((code == 0x00) || (code == 0x04) /* MFC0 / MTC0 */
- || (code == 0x01) || (code == 0x05)) /* DMFC0 / DMTC0 */
- && tail == 0)
- {
- /* Clear double/single coprocessor move bit. */
- code &= ~1;
-
- /* M[TF]C0 (32 bits) | DM[TF]C0 (64 bits) */
-
- switch (rd) /* NOTEs: Standard CP0 registers */
- {
- /* 0 = Index R4000 VR4100 VR4300 */
- /* 1 = Random R4000 VR4100 VR4300 */
- /* 2 = EntryLo0 R4000 VR4100 VR4300 */
- /* 3 = EntryLo1 R4000 VR4100 VR4300 */
- /* 4 = Context R4000 VR4100 VR4300 */
- /* 5 = PageMask R4000 VR4100 VR4300 */
- /* 6 = Wired R4000 VR4100 VR4300 */
- /* 8 = BadVAddr R4000 VR4100 VR4300 */
- /* 9 = Count R4000 VR4100 VR4300 */
- /* 10 = EntryHi R4000 VR4100 VR4300 */
- /* 11 = Compare R4000 VR4100 VR4300 */
- /* 12 = SR R4000 VR4100 VR4300 */
-#ifdef SUBTARGET_R3900
- case 3:
- /* 3 = Config R3900 */
- case 7:
- /* 7 = Cache R3900 */
- case 15:
- /* 15 = PRID R3900 */
-
- /* ignore */
- break;
-
- case 8:
- /* 8 = BadVAddr R4000 VR4100 VR4300 */
- if (code == 0x00)
- GPR[rt] = COP0_BADVADDR;
- else
- COP0_BADVADDR = GPR[rt];
- break;
-
-#endif /* SUBTARGET_R3900 */
- case 12:
- if (code == 0x00)
- GPR[rt] = SR;
- else
- SR = GPR[rt];
- break;
- /* 13 = Cause R4000 VR4100 VR4300 */
- case 13:
- if (code == 0x00)
- GPR[rt] = CAUSE;
- else
- CAUSE = GPR[rt];
- break;
- /* 14 = EPC R4000 VR4100 VR4300 */
- case 14:
- if (code == 0x00)
- GPR[rt] = (signed_word) (signed_address) EPC;
- else
- EPC = GPR[rt];
- break;
- /* 15 = PRId R4000 VR4100 VR4300 */
-#ifdef SUBTARGET_R3900
- /* 16 = Debug */
- case 16:
- if (code == 0x00)
- GPR[rt] = Debug;
- else
- Debug = GPR[rt];
- break;
-#else
- /* 16 = Config R4000 VR4100 VR4300 */
- case 16:
- if (code == 0x00)
- GPR[rt] = C0_CONFIG;
- else
- C0_CONFIG = GPR[rt];
- break;
-#endif
-#ifdef SUBTARGET_R3900
- /* 17 = Debug */
- case 17:
- if (code == 0x00)
- GPR[rt] = DEPC;
- else
- DEPC = GPR[rt];
- break;
-#else
- /* 17 = LLAddr R4000 VR4100 VR4300 */
-#endif
- /* 18 = WatchLo R4000 VR4100 VR4300 */
- /* 19 = WatchHi R4000 VR4100 VR4300 */
- /* 20 = XContext R4000 VR4100 VR4300 */
- /* 26 = PErr or ECC R4000 VR4100 VR4300 */
- /* 27 = CacheErr R4000 VR4100 */
- /* 28 = TagLo R4000 VR4100 VR4300 */
- /* 29 = TagHi R4000 VR4100 VR4300 */
- /* 30 = ErrorEPC R4000 VR4100 VR4300 */
- if (STATE_VERBOSE_P(SD))
- sim_io_eprintf (SD,
- "Warning: PC 0x%lx:interp.c decode_coproc DEADC0DE\n",
- (unsigned long)cia);
- GPR[rt] = 0xDEADC0DE; /* CPR[0,rd] */
- /* CPR[0,rd] = GPR[rt]; */
- default:
- if (code == 0x00)
- GPR[rt] = (signed_word) (signed32) COP0_GPR[rd];
- else
- COP0_GPR[rd] = GPR[rt];
-#if 0
- if (code == 0x00)
- sim_io_printf(sd,"Warning: MFC0 %d,%d ignored, PC=%08x (architecture specific)\n",rt,rd, (unsigned)cia);
- else
- sim_io_printf(sd,"Warning: MTC0 %d,%d ignored, PC=%08x (architecture specific)\n",rt,rd, (unsigned)cia);
-#endif
- }
- }
- else if (code == 0x10 && (tail & 0x3f) == 0x18)
- {
- /* ERET */
- if (SR & status_ERL)
- {
- /* Oops, not yet available */
- sim_io_printf(sd,"Warning: ERET when SR[ERL] set not handled yet");
- PC = EPC;
- SR &= ~status_ERL;
- }
- else
- {
- PC = EPC;
- SR &= ~status_EXL;
- }
- }
- else if (code == 0x10 && (tail & 0x3f) == 0x10)
- {
- /* RFE */
-#ifdef SUBTARGET_R3900
- /* TX39: Copy IEp/KUp -> IEc/KUc, and IEo/KUo -> IEp/KUp */
-
- /* shift IE/KU history bits right */
- SR = LSMASKED32(SR, 31, 4) | LSINSERTED32(LSEXTRACTED32(SR, 5, 2), 3, 0);
-
- /* TODO: CACHE register */
-#endif /* SUBTARGET_R3900 */
- }
- else if (code == 0x10 && (tail & 0x3f) == 0x1F)
- {
- /* DERET */
- Debug &= ~Debug_DM;
- DELAYSLOT();
- DSPC = DEPC;
- }
- else
- sim_io_eprintf(sd,"Unrecognised COP0 instruction 0x%08X at PC = 0x%s : No handler present\n",instruction,pr_addr(cia));
- /* TODO: When executing an ERET or RFE instruction we should
- clear LLBIT, to ensure that any out-standing atomic
- read/modify/write sequence fails. */
- }
- break;
-
- case 2: /* co-processor 2 */
- {
- int handle = 0;
-
-
- if(! handle)
- {
- sim_io_eprintf(sd, "COP2 instruction 0x%08X at PC = 0x%s : No handler present\n",
- instruction,pr_addr(cia));
- }
- }
- break;
-
- case 1: /* should not occur (FPU co-processor) */
- case 3: /* should not occur (FPU co-processor) */
- SignalException(ReservedInstruction,instruction);
- break;
- }
-
- return;
-}
-
-
-/* This code copied from gdb's utils.c. Would like to share this code,
- but don't know of a common place where both could get to it. */
-
-/* Temporary storage using circular buffer */
-#define NUMCELLS 16
-#define CELLSIZE 32
-static char*
-get_cell (void)
-{
- static char buf[NUMCELLS][CELLSIZE];
- static int cell=0;
- if (++cell>=NUMCELLS) cell=0;
- return buf[cell];
-}
-
-/* Print routines to handle variable size regs, etc */
-
-/* Eliminate warning from compiler on 32-bit systems */
-static int thirty_two = 32;
-
-char*
-pr_addr(addr)
- SIM_ADDR addr;
-{
- char *paddr_str=get_cell();
- switch (sizeof(addr))
- {
- case 8:
- sprintf(paddr_str,"%08lx%08lx",
- (unsigned long)(addr>>thirty_two),(unsigned long)(addr&0xffffffff));
- break;
- case 4:
- sprintf(paddr_str,"%08lx",(unsigned long)addr);
- break;
- case 2:
- sprintf(paddr_str,"%04x",(unsigned short)(addr&0xffff));
- break;
- default:
- sprintf(paddr_str,"%x",addr);
- }
- return paddr_str;
-}
-
-char*
-pr_uword64(addr)
- uword64 addr;
-{
- char *paddr_str=get_cell();
- sprintf(paddr_str,"%08lx%08lx",
- (unsigned long)(addr>>thirty_two),(unsigned long)(addr&0xffffffff));
- return paddr_str;
-}
-
-
-void
-mips_core_signal (SIM_DESC sd,
- sim_cpu *cpu,
- sim_cia cia,
- unsigned map,
- int nr_bytes,
- address_word addr,
- transfer_type transfer,
- sim_core_signals sig)
-{
- const char *copy = (transfer == read_transfer ? "read" : "write");
- address_word ip = CIA_ADDR (cia);
-
- switch (sig)
- {
- case sim_core_unmapped_signal:
- sim_io_eprintf (sd, "mips-core: %d byte %s to unmapped address 0x%lx at 0x%lx\n",
- nr_bytes, copy,
- (unsigned long) addr, (unsigned long) ip);
- COP0_BADVADDR = addr;
- SignalExceptionDataReference();
- break;
-
- case sim_core_unaligned_signal:
- sim_io_eprintf (sd, "mips-core: %d byte %s to unaligned address 0x%lx at 0x%lx\n",
- nr_bytes, copy,
- (unsigned long) addr, (unsigned long) ip);
- COP0_BADVADDR = addr;
- if(transfer == read_transfer)
- SignalExceptionAddressLoad();
- else
- SignalExceptionAddressStore();
- break;
-
- default:
- sim_engine_abort (sd, cpu, cia,
- "mips_core_signal - internal error - bad switch");
- }
-}
-
-
-void
-mips_cpu_exception_trigger(SIM_DESC sd, sim_cpu* cpu, address_word cia)
-{
- ASSERT(cpu != NULL);
-
- if(cpu->exc_suspended > 0)
- sim_io_eprintf(sd, "Warning, nested exception triggered (%d)\n", cpu->exc_suspended);
-
- PC = cia;
- memcpy(cpu->exc_trigger_registers, cpu->registers, sizeof(cpu->exc_trigger_registers));
- cpu->exc_suspended = 0;
-}
-
-void
-mips_cpu_exception_suspend(SIM_DESC sd, sim_cpu* cpu, int exception)
-{
- ASSERT(cpu != NULL);
-
- if(cpu->exc_suspended > 0)
- sim_io_eprintf(sd, "Warning, nested exception signal (%d then %d)\n",
- cpu->exc_suspended, exception);
-
- memcpy(cpu->exc_suspend_registers, cpu->registers, sizeof(cpu->exc_suspend_registers));
- memcpy(cpu->registers, cpu->exc_trigger_registers, sizeof(cpu->registers));
- cpu->exc_suspended = exception;
-}
-
-void
-mips_cpu_exception_resume(SIM_DESC sd, sim_cpu* cpu, int exception)
-{
- ASSERT(cpu != NULL);
-
- if(exception == 0 && cpu->exc_suspended > 0)
- {
- /* warn not for breakpoints */
- if(cpu->exc_suspended != sim_signal_to_host(sd, SIM_SIGTRAP))
- sim_io_eprintf(sd, "Warning, resuming but ignoring pending exception signal (%d)\n",
- cpu->exc_suspended);
- }
- else if(exception != 0 && cpu->exc_suspended > 0)
- {
- if(exception != cpu->exc_suspended)
- sim_io_eprintf(sd, "Warning, resuming with mismatched exception signal (%d vs %d)\n",
- cpu->exc_suspended, exception);
-
- memcpy(cpu->registers, cpu->exc_suspend_registers, sizeof(cpu->registers));
- }
- else if(exception != 0 && cpu->exc_suspended == 0)
- {
- sim_io_eprintf(sd, "Warning, ignoring spontanous exception signal (%d)\n", exception);
- }
- cpu->exc_suspended = 0;
-}
-
-
-/*---------------------------------------------------------------------------*/
-/*> EOF interp.c <*/
diff --git a/sim/mips/m16.dc b/sim/mips/m16.dc
deleted file mode 100644
index 292587c39e3..00000000000
--- a/sim/mips/m16.dc
+++ /dev/null
@@ -1,25 +0,0 @@
-# most instructions
-# ------ options ------ : Fst : Lst : ff : fl : fe : word : --- fmt --- : model ...
-# { : mask : value : word }
-
-# Top level - create a very big switch statement.
-
- padded-switch,combine : 15 : 11 : : : : : :
-
- switch,combine : 10 : 8 : : : : : :
-
- switch,combine : 4 : 0 : : : : : :
-
- switch,combine : 7 : 5 : : : : : :
-
-
-# Extended instructions, decode the same way
-
- padded-switch,combine : 15 : 11 : : : : 1 : :
-
- switch,combine : 10 : 8 : : : : 1 : :
-
- switch,combine : 4 : 0 : : : : 1 : :
-
- switch,combine : 7 : 5 : : : : 1 : :
-
diff --git a/sim/mips/m16.igen b/sim/mips/m16.igen
deleted file mode 100644
index 833d7cae70e..00000000000
--- a/sim/mips/m16.igen
+++ /dev/null
@@ -1,1236 +0,0 @@
-// -*- C -*-
-//
-//
-// MIPS Architecture:
-//
-// CPU Instruction Set (mips16)
-//
-
-// The instructions in this section are ordered according
-// to http://www.sgi.com/MIPS/arch/MIPS16/mips16.pdf.
-
-
-// The MIPS16 codes registers in a special way, map from one to the other.
-// :<type>:<flags>:<models>:<typedef>:<name>:<field>:<expression>
-:compute:::int:TRX:RX:((RX < 2) ? (16 + RX) \: RX)
-:compute:::int:TRY:RY:((RY < 2) ? (16 + RY) \: RY)
-:compute:::int:TRZ:RZ:((RZ < 2) ? (16 + RZ) \: RZ)
-:compute:::int:SHIFT:SHAMT:((SHAMT == 0) ? 8 \: SHAMT)
-
-:compute:::int:SHAMT:SHAMT_4_0,S5:(LSINSERTED (S5, 5, 5) | SHAMT_4_0)
-
-:compute:::address_word:IMMEDIATE:IMM_25_21,IMM_20_16,IMMED_15_0:(LSINSERTED (IMM_25_21, 25, 21) | LSINSERTED (IMM_20_16, 20, 16) | LSINSERTED (IMMED_15_0, 15, 0))
-:compute:::int:R32:R32L,R32H:((R32H << 3) | R32L)
-
-:compute:::address_word:IMMEDIATE:IMM_10_5,IMM_15_11,IMM_4_0:(LSINSERTED (IMM_10_5, 10, 5) | LSINSERTED (IMM_15_11, 15, 11) | LSINSERTED (IMM_4_0, 4, 0))
-
-:compute:::address_word:IMMEDIATE:IMM_10_4,IMM_14_11,IMM_3_0:(LSINSERTED (IMM_10_4, 10, 4) | LSINSERTED (IMM_14_11, 14, 11) | LSINSERTED (IMM_3_0, 3, 0))
-
-
-// Load and Store Instructions
-
-
-10000,3.RX,3.RY,5.IMMED:RRI:16::LB
-"lb r<TRY>, <IMMED> (r<TRX>)"
-*mips16:
-*vr4100:
-{
- GPR[TRY] = EXTEND8 (do_load (SD_, AccessLength_BYTE, GPR[TRX], IMMED));
-}
-
-11110,6.IMM_10_5,5.IMM_15_11 + 10000,3.RX,3.RY,5.IMM_4_0:EXT-RRI:16::LB
-"lb r<TRY>, <IMMEDIATE> (r<TRX>)"
-*mips16:
-*vr4100:
-{
- GPR[TRY] = EXTEND8 (do_load (SD_, AccessLength_BYTE, GPR[TRX], EXTEND16 (IMMEDIATE)));
-}
-
-
-
-10100,3.RX,3.RY,5.IMMED:RRI:16::LBU
-"lbu r<TRY>, <IMMED> (r<TRX>)"
-*mips16:
-*vr4100:
-{
- GPR[TRY] = do_load (SD_, AccessLength_BYTE, GPR[TRX], IMMED);
-}
-
-11110,6.IMM_10_5,5.IMM_15_11 + 10100,3.RX,3.RY,5.IMM_4_0:EXT-RRI:16::LBU
-"lbu r<TRY>, <IMMEDIATE> (r<TRX>)"
-*mips16:
-*vr4100:
-{
- GPR[TRY] = do_load (SD_, AccessLength_BYTE, GPR[TRX], EXTEND16 (IMMEDIATE));
-}
-
-
-
-10001,3.RX,3.RY,5.IMMED:RRI:16::LH
-"lh r<TRY>, <IMMED> (r<TRX>)"
-*mips16:
-*vr4100:
-{
- GPR[TRY] = EXTEND16 (do_load (SD_, AccessLength_HALFWORD, GPR[TRX], IMMED << 1));
-}
-
-11110,6.IMM_10_5,5.IMM_15_11 + 10001,3.RX,3.RY,5.IMM_4_0:EXT-RRI:16::LH
-"lh r<TRY>, <IMMEDIATE> (r<TRX>)"
-*mips16:
-*vr4100:
-{
- GPR[TRY] = EXTEND16 (do_load (SD_, AccessLength_HALFWORD, GPR[TRX], EXTEND16 (IMMEDIATE)));
-}
-
-
-
-10101,3.RX,3.RY,5.IMMED:RRI:16::LHU
-"lhu r<TRY>, <IMMED> (r<TRX>)"
-*mips16:
-*vr4100:
-{
- GPR[TRY] = do_load (SD_, AccessLength_HALFWORD, GPR[TRX], IMMED << 1);
-}
-
-11110,6.IMM_10_5,5.IMM_15_11 + 10101,3.RX,3.RY,5.IMM_4_0:EXT-RRI:16::LHU
-"lhu r<TRY>, <IMMEDIATE> (r<TRX>)"
-*mips16:
-*vr4100:
-{
- GPR[TRY] = do_load (SD_, AccessLength_HALFWORD, GPR[TRX], EXTEND16 (IMMEDIATE));
-}
-
-
-
-10011,3.RX,3.RY,5.IMMED:RRI:16::LW
-"lw r<TRY>, <IMMED> (r<TRX>)"
-*mips16:
-*vr4100:
-{
- GPR[TRY] = EXTEND32 (do_load (SD_, AccessLength_WORD, GPR[TRX], IMMED << 2));
-}
-
-11110,6.IMM_10_5,5.IMM_15_11 + 10011,3.RX,3.RY,5.IMM_4_0:EXT-RRI:16::LW
-"lw r<TRY>, <IMMEDIATE> (r<TRX>)"
-*mips16:
-*vr4100:
-{
- GPR[TRY] = EXTEND32 (do_load (SD_, AccessLength_WORD, GPR[TRX], EXTEND16 (IMMEDIATE)));
-}
-
-
-
-10110,3.RX,8.IMMED:RI:16::LWPC
-"lw r<TRX>, <IMMED> (PC)"
-*mips16:
-*vr4100:
-{
- GPR[TRX] = EXTEND32 (do_load (SD_, AccessLength_WORD,
- basepc (SD_) & ~3, IMMED << 2));
-}
-
-11110,6.IMM_10_5,5.IMM_15_11 + 10110,3.RX,000,5.IMM_4_0:EXT-RI:16::LWPC
-"lw r<TRX>, <IMMEDIATE> (PC)"
-*mips16:
-*vr4100:
-{
- GPR[TRX] = EXTEND32 (do_load (SD_, AccessLength_WORD, basepc (SD_) & ~3, EXTEND16 (IMMEDIATE)));
-}
-
-
-
-10010,3.RX,8.IMMED:RI:16::LWSP
-"lw r<TRX>, <IMMED> (SP)"
-*mips16:
-*vr4100:
-{
- GPR[TRX] = EXTEND32 (do_load (SD_, AccessLength_WORD, SP, IMMED << 2));
-}
-
-11110,6.IMM_10_5,5.IMM_15_11 + 10010,3.RX,000,5.IMM_4_0:EXT-RI:16::LWSP
-"lw r<TRX>, <IMMEDIATE> (SP)"
-*mips16:
-*vr4100:
-{
- GPR[TRX] = EXTEND32 (do_load (SD_, AccessLength_WORD, SP, EXTEND16 (IMMEDIATE)));
-}
-
-
-
-10111,3.RX,3.RY,5.IMMED:RRI:16::LWU
-"lwu r<TRY>, <IMMED> (r<TRX>)"
-*mips16:
-*vr4100:
-{
- GPR[TRY] = do_load (SD_, AccessLength_WORD, GPR[TRX], IMMED << 2);
-}
-
-11110,6.IMM_10_5,5.IMM_15_11 + 10111,3.RX,3.RY,5.IMM_4_0:EXT-RRI:16::LWU
-"lwu r<TRY>, <IMMEDIATE> (r<TRX>)"
-*mips16:
-*vr4100:
-{
- GPR[TRY] = do_load (SD_, AccessLength_WORD, GPR[TRX], EXTEND16 (IMMEDIATE));
-}
-
-
-
-00111,3.RX,3.RY,5.IMMED:RRI:16::LD
-"ld r<TRY>, <IMMED> (r<TRX>)"
-*mips16:
-*vr4100:
-{
- GPR[TRY] = do_load (SD_, AccessLength_DOUBLEWORD, GPR[TRX], IMMED << 3);
-}
-
-11110,6.IMM_10_5,5.IMM_15_11 + 00111,3.RX,3.RY,5.IMM_4_0:EXT-RRI:16::LD
-"ld r<TRY>, <IMMEDIATE> (r<TRX>)"
-*mips16:
-*vr4100:
-{
- GPR[TRY] = do_load (SD_, AccessLength_DOUBLEWORD, GPR[TRX], EXTEND16 (IMMEDIATE));
-}
-
-
-
-11111,100,3.RY,5.IMMED:RI64:16::LDPC
-"ld r<TRY>, <IMMED> (PC)"
-*mips16:
-*vr4100:
-{
- GPR[TRY] = do_load (SD_, AccessLength_DOUBLEWORD,
- basepc (SD_) & ~7, IMMED << 3);
-}
-
-11110,6.IMM_10_5,5.IMM_15_11 + 11111,100,3.RY,5.IMM_4_0:EXT-RI64:16::LDPC
-"ld r<TRY>, <IMMEDIATE> (PC)"
-*mips16:
-*vr4100:
-{
- GPR[TRY] = do_load (SD_, AccessLength_DOUBLEWORD, basepc (SD_) & ~7, EXTEND16 (IMMEDIATE));
-}
-
-
-
-11111,000,3.RY,5.IMMED:RI64:16::LDSP
-"ld r<TRY>, <IMMED> (SP)"
-*mips16:
-*vr4100:
-{
- GPR[TRY] = do_load (SD_, AccessLength_DOUBLEWORD, SP, IMMED << 3);
-}
-
-11110,6.IMM_10_5,5.IMM_15_11 + 11111,000,3.RY,5.IMM_4_0:EXT-RI64:16::LDSP
-"ld r<TRY>, <IMMEDIATE> (SP)"
-*mips16:
-*vr4100:
-{
- GPR[TRY] = do_load (SD_, AccessLength_DOUBLEWORD, SP, EXTEND16 (IMMEDIATE));
-}
-
-
-
-11000,3.RX,3.RY,5.IMMED:RRI:16::SB
-"sb r<TRY>, <IMMED> (r<TRX>)"
-*mips16:
-*vr4100:
-{
- do_store (SD_, AccessLength_BYTE, GPR[TRX], IMMED, GPR[TRY]);
-}
-
-11110,6.IMM_10_5,5.IMM_15_11 + 11000,3.RX,3.RY,5.IMM_4_0:EXT-RRI:16::SB
-"sb r<TRY>, <IMMEDIATE> (r<TRX>)"
-*mips16:
-*vr4100:
-{
- do_store (SD_, AccessLength_BYTE, GPR[TRX], EXTEND16 (IMMEDIATE), GPR[TRY]);
-}
-
-
-
-11001,3.RX,3.RY,5.IMMED:RRI:16::SH
-"sh r<TRY>, <IMMED> (r<TRX>)"
-*mips16:
-*vr4100:
-{
- do_store (SD_, AccessLength_HALFWORD, GPR[TRX], IMMED << 1, GPR[TRY]);
-}
-
-11110,6.IMM_10_5,5.IMM_15_11 + 11001,3.RX,3.RY,5.IMM_4_0:EXT-RRI:16::SH
-"sh r<TRY>, <IMMEDIATE> (r<TRX>)"
-*mips16:
-*vr4100:
-{
- do_store (SD_, AccessLength_HALFWORD, GPR[TRX], EXTEND16 (IMMEDIATE), GPR[TRY]);
-}
-
-
-
-11011,3.RX,3.RY,5.IMMED:RRI:16::SW
-"sw r<TRY>, <IMMED> (r<TRX>)"
-*mips16:
-*vr4100:
-{
- do_store (SD_, AccessLength_WORD, GPR[TRX], IMMED << 2, GPR[TRY]);
-}
-
-11110,6.IMM_10_5,5.IMM_15_11 + 11011,3.RX,3.RY,5.IMM_4_0:EXT-RRI:16::SW
-"sw r<TRY>, <IMMEDIATE> (r<TRX>)"
-*mips16:
-*vr4100:
-{
- do_store (SD_, AccessLength_WORD, GPR[TRX], EXTEND16 (IMMEDIATE), GPR[TRY]);
-}
-
-
-
-11010,3.RX,8.IMMED:RI:16::SWSP
-"sw r<TRX>, <IMMED> (SP)"
-*mips16:
-*vr4100:
-{
- do_store (SD_, AccessLength_WORD, SP, IMMED << 2, GPR[TRX]);
-}
-
-11110,6.IMM_10_5,5.IMM_15_11 + 11010,3.RX,000,5.IMM_4_0:EXT-RI:16::SWSP
-"sw r<TRX>, <IMMEDIATE> (SP)"
-*mips16:
-*vr4100:
-{
- do_store (SD_, AccessLength_WORD, SP, EXTEND16 (IMMEDIATE), GPR[TRX]);
-}
-
-
-
-01100,010,8.IMMED:I8:16::SWRASP
-"sw r<RAIDX>, <IMMED> (SP)"
-*mips16:
-*vr4100:
-{
- do_store (SD_, AccessLength_WORD, SP, IMMED << 2, RA);
-}
-
-11110,6.IMM_10_5,5.IMM_15_11 + 01100,010,000,5.IMM_4_0:EXT-I8:16::SWRASP
-"sw r<RAIDX>, <IMMEDIATE> (SP)"
-*mips16:
-*vr4100:
-{
- do_store (SD_, AccessLength_WORD, SP, EXTEND16 (IMMEDIATE), RA);
-}
-
-
-
-01111,3.RX,3.RY,5.IMMED:RRI:16::SD
-"sd r<TRY>, <IMMED> (r<TRX>)"
-*mips16:
-*vr4100:
-{
- do_store (SD_, AccessLength_DOUBLEWORD, GPR[TRX], IMMED << 3, GPR[TRY]);
-}
-
-11110,6.IMM_10_5,5.IMM_15_11 + 01111,3.RX,3.RY,5.IMM_4_0:EXT-RRI:16::SD
-"sd r<TRY>, <IMMEDIATE> (r<TRX>)"
-*mips16:
-*vr4100:
-{
- do_store (SD_, AccessLength_DOUBLEWORD, GPR[TRX], EXTEND16 (IMMEDIATE), GPR[TRY]);
-}
-
-
-
-11111,001,3.RY,5.IMMED:RI64:16::SDSP
-"sd r<TRY>, <IMMED> (SP)"
-*mips16:
-*vr4100:
-{
- do_store (SD_, AccessLength_DOUBLEWORD, SP, IMMED << 3, GPR[TRY]);
-}
-
-11110,6.IMM_10_5,5.IMM_15_11 + 11111,001,3.RY,5.IMM_4_0:EXT-RI64:16::SDSP
-"sd r<TRY>, <IMMEDIATE> (SP)"
-*mips16:
-*vr4100:
-{
- do_store (SD_, AccessLength_DOUBLEWORD, SP, EXTEND16 (IMMEDIATE), GPR[TRY]);
-}
-
-
-
-11111,010,8.IMMED:I64:16::SDRASP
-"sd r<RAIDX>, <IMMED> (SP)"
-*mips16:
-*vr4100:
-{
- do_store (SD_, AccessLength_DOUBLEWORD, SP, IMMED << 3, RA);
-}
-
-11110,6.IMM_10_5,5.IMM_15_11 + 11111,010,000,5.IMM_4_0:EXT-I64:16::SDRASP
-"sd r<RAIDX>, <IMMEDIATE> (SP)"
-*mips16:
-*vr4100:
-{
- do_store (SD_, AccessLength_DOUBLEWORD, SP, EXTEND16 (IMMEDIATE), RA);
-}
-
-
-
-// ALU Immediate Instructions
-
-
-01101,3.RX,8.IMMED:RI:16::LI
-"li r<TRX>, <IMMED>"
-*mips16:
-*vr4100:
-{
- do_ori (SD_, 0, TRX, IMMED);
-}
-
-11110,6.IMM_10_5,5.IMM_15_11 + 01101,3.RX,000,5.IMM_4_0:EXT-RI:16::LI
-"li r<TRX>, <IMMEDIATE>"
-*mips16:
-*vr4100:
-{
- do_ori (SD_, 0, TRX, IMMEDIATE);
-}
-
-
-
-01000,3.RX,3.RY,0,4.IMMED:RRI-A:16::ADDIU
-"addiu r<TRY>, r<TRX>, <IMMED>"
-*mips16:
-*vr4100:
-{
- do_addiu (SD_, TRX, TRY, EXTEND4 (IMMED));
-}
-
-11110,7.IMM_10_4,4.IMM_14_11 + 01000,3.RX,3.RY,0,4.IMM_3_0:EXT-RRI-A:16::ADDIU
-"addiu r<TRY>, r<TRX>, <IMMEDIATE>"
-*mips16:
-*vr4100:
-{
- do_addiu (SD_, TRX, TRY, EXTEND15 (IMMEDIATE));
-}
-
-
-
-01001,3.RX,8.IMMED:RI:16::ADDIU8
-"addiu r<TRX>, <IMMED>"
-*mips16:
-*vr4100:
-{
- do_addiu (SD_, TRX, TRX, EXTEND8 (IMMED));
-}
-
-11110,6.IMM_10_5,5.IMM_15_11 + 01001,3.RX,000,5.IMM_4_0:EXT-RI:16::ADDIU8
-"addiu r<TRX>, <IMMEDIATE>"
-*mips16:
-*vr4100:
-{
- do_addiu (SD_, TRX, TRX, EXTEND16 (IMMEDIATE));
-}
-
-
-
-01100,011,8.IMMED:I8:16::ADJSP
-"addiu SP, <IMMED>"
-*mips16:
-*vr4100:
-{
- do_addiu (SD_, SPIDX, SPIDX, EXTEND8 (IMMED) << 3);
-}
-
-11110,6.IMM_10_5,5.IMM_15_11 + 01100,011,000,5.IMM_4_0:EXT-I8:16::ADJSP
-"addiu SP, <IMMEDIATE>"
-*mips16:
-*vr4100:
-{
- do_addiu (SD_, SPIDX, SPIDX, EXTEND16 (IMMEDIATE));
-}
-
-
-
-00001,3.RX,8.IMMED:RI:16::ADDIUPC
-"addiu r<TRX>, PC, <IMMED>"
-*mips16:
-*vr4100:
-{
- unsigned32 temp = (basepc (SD_) & ~3) + (IMMED << 2);
- GPR[TRX] = EXTEND32 (temp);
-}
-
-11110,6.IMM_10_5,5.IMM_15_11 + 00001,3.RX,000,5.IMM_4_0:EXT-RI:16::ADDIUPC
-"addiu r<TRX>, PC, <IMMEDIATE>"
-*mips16:
-*vr4100:
-{
- unsigned32 temp = (basepc (SD_) & ~3) + EXTEND16 (IMMEDIATE);
- GPR[TRX] = EXTEND32 (temp);
-}
-
-
-
-00000,3.RX,8.IMMED:RI:16::ADDIUSP
-"addiu r<TRX>, SP, <IMMED>"
-*mips16:
-*vr4100:
-{
- do_addiu (SD_, SPIDX, TRX, IMMED << 2);
-}
-
-11110,6.IMM_10_5,5.IMM_15_11 + 00000,3.RX,000,5.IMM_4_0:EXT-RI:16::ADDIUSP
-"addiu r<TRX>, SP, <IMMEDIATE>"
-*mips16:
-*vr4100:
-{
- do_addiu (SD_, SPIDX, TRX, EXTEND16 (IMMEDIATE));
-}
-
-
-
-01000,3.RX,3.RY,1,4.IMMED:RRI-A:16::DADDIU
-"daddiu r<TRY>, r<TRX>, <IMMED>"
-*mips16:
-*vr4100:
-{
- do_daddiu (SD_, TRX, TRY, EXTEND4 (IMMED));
-}
-
-11110,7.IMM_10_4,4.IMM_14_11 + 01000,3.RX,3.RY,1,4.IMM_3_0:EXT-RRI-A:16::DADDIU
-"daddiu r<TRY>, r<TRX>, <IMMEDIATE>"
-*mips16:
-*vr4100:
-{
- do_daddiu (SD_, TRX, TRY, EXTEND15 (IMMEDIATE));
-}
-
-
-
-11111,101,3.RY,5.IMMED:RI64:16::DADDIU5
-"daddiu r<TRY>, <IMMED>"
-*mips16:
-*vr4100:
-{
- do_daddiu (SD_, TRY, TRY, EXTEND5 (IMMED));
-}
-
-11110,6.IMM_10_5,5.IMM_15_11 + 11111,101,3.RY,5.IMM_4_0:EXT-RI64:16::DADDIU5
-"daddiu r<TRY>, <IMMEDIATE>"
-*mips16:
-*vr4100:
-{
- do_daddiu (SD_, TRY, TRY, EXTEND16 (IMMEDIATE));
-}
-
-
-
-11111,011,8.IMMED:I64:16::DADJSP
-"daddiu SP, <IMMED>"
-*mips16:
-*vr4100:
-{
- do_daddiu (SD_, SPIDX, SPIDX, EXTEND8 (IMMED) << 3);
-}
-
-11110,6.IMM_10_5,5.IMM_15_11 + 11111,011,000,5.IMM_4_0:EXT-I64:16::DADJSP
-"daddiu SP, <IMMEDIATE>"
-*mips16:
-*vr4100:
-{
- do_daddiu (SD_, SPIDX, SPIDX, EXTEND16 (IMMEDIATE));
-}
-
-
-
-11111,110,3.RY,5.IMMED:RI64:16::DADDIUPC
-"daddiu r<TRY>, PC, <IMMED>"
-*mips16:
-*vr4100:
-{
- GPR[TRY] = (basepc (SD_) & ~3) + (IMMED << 2);
-}
-
-11110,6.IMM_10_5,5.IMM_15_11 + 11111,110,3.RY,5.IMM_4_0:EXT-RI64:16::DADDIUPC
-"daddiu r<TRY>, PC, <IMMEDIATE>"
-*mips16:
-*vr4100:
-{
- GPR[TRY] = (basepc (SD_) & ~3) + EXTEND16 (IMMEDIATE);
-}
-
-
-
-11111,111,3.RY,5.IMMED:RI64:16::DADDIUSP
-"daddiu r<TRY>, SP, <IMMED>"
-*mips16:
-*vr4100:
-{
- do_daddiu (SD_, SPIDX, TRY, IMMED << 2);
-}
-
-11110,6.IMM_10_5,5.IMM_15_11 + 11111,111,3.RY,5.IMM_4_0:EXT-RI64:16::DADDIUSP
-"daddiu r<TRY>, SP, <IMMEDIATE>"
-*mips16:
-*vr4100:
-{
- do_daddiu (SD_, SPIDX, TRY, EXTEND16 (IMMEDIATE));
-}
-
-
-
-01010,3.RX,8.IMMED:RI:16::SLTI
-"slti r<TRX>, <IMMED>"
-*mips16:
-*vr4100:
-{
- do_slti (SD_, TRX, T8IDX, IMMED);
-}
-
-11110,6.IMM_10_5,5.IMM_15_11 + 01010,3.RX,000,5.IMM_4_0:EXT-RI:16::SLTI
-"slti r<TRX>, <IMMEDIATE>"
-*mips16:
-*vr4100:
-{
- do_slti (SD_, TRX, T8IDX, IMMEDIATE);
-}
-
-
-
-01011,3.RX,8.IMMED:RI:16::SLTIU
-"sltiu r<TRX>, <IMMED>"
-*mips16:
-*vr4100:
-{
- do_sltiu (SD_, TRX, T8IDX, IMMED);
-}
-
-11110,6.IMM_10_5,5.IMM_15_11 + 01011,3.RX,000,5.IMM_4_0:EXT-RI:16::SLTIU
-"sltiu r<TRX>, <IMMEDIATE>"
-*mips16:
-*vr4100:
-{
- do_sltiu (SD_, TRX, T8IDX, IMMEDIATE);
-}
-
-
-
-11101,3.RX,3.RY,01010:RR:16::CMP
-"sltiu r<TRX>, r<TRY>"
-*mips16:
-*vr4100:
-{
- do_xor (SD_, TRX, TRY, T8IDX);
-}
-
-
-01110,3.RX,8.IMMED:RI:16::CMPI
-"sltiu r<TRX>, <IMMED>"
-*mips16:
-*vr4100:
-{
- do_xori (SD_, TRX, T8IDX, IMMED);
-}
-
-11110,6.IMM_10_5,5.IMM_15_11 + 01110,3.RX,000,5.IMM_4_0:EXT-RI:16::CMPI
-"sltiu r<TRX>, <IMMEDIATE>"
-*mips16:
-*vr4100:
-{
- do_xori (SD_, TRX, T8IDX, IMMEDIATE);
-}
-
-
-
-// Two/Three Operand, Register-Type
-
-
-
-11100,3.RX,3.RY,3.RZ,01:RRR:16::ADDU
-"addu r<TRZ>, r<TRX>, r<TRY>"
-*mips16:
-*vr4100:
-{
- do_addu (SD_, TRX, TRY, TRZ);
-}
-
-
-
-11100,3.RX,3.RY,3.RZ,11:RRR:16::SUBU
-"subu r<TRZ>, r<TRX>, r<TRY>"
-*mips16:
-*vr4100:
-{
- do_subu (SD_, TRX, TRY, TRZ);
-}
-
-11100,3.RX,3.RY,3.RZ,00:RRR:16::DADDU
-"daddu r<TRZ>, r<TRX>, r<TRY>"
-*mips16:
-*vr4100:
-{
- do_daddu (SD_, TRX, TRY, TRZ);
-}
-
-
-
-11100,3.RX,3.RY,3.RZ,10:RRR:16::DSUBU
-"dsubu r<TRZ>, r<TRX>, r<TRY>"
-*mips16:
-*vr4100:
-{
- do_dsubu (SD_, TRX, TRY, TRZ);
-}
-
-
-
-11101,3.RX,3.RY,00010:RR:16::SLT
-"slt r<TRX>, r<TRY>"
-*mips16:
-*vr4100:
-{
- do_slt (SD_, TRX, TRY, T8IDX);
-}
-
-
-
-11101,3.RX,3.RY,00011:RR:16::SLTU
-"sltu r<TRX>, r<TRY>"
-*mips16:
-*vr4100:
-{
- do_sltu (SD_, TRX, TRY, T8IDX);
-}
-
-
-
-11101,3.RX,3.RY,01011:RR:16::NEG
-"neg r<TRX>, r<TRY>"
-*mips16:
-*vr4100:
-{
- do_subu (SD_, 0, TRY, TRX);
-}
-
-
-
-11101,3.RX,3.RY,01100:RR:16::AND
-"and r<TRX>, r<TRY>"
-*mips16:
-*vr4100:
-{
- do_and (SD_, TRX, TRY, TRX);
-}
-
-
-
-11101,3.RX,3.RY,01101:RR:16::OR
-"or r<TRX>, r<TRY>"
-*mips16:
-*vr4100:
-{
- do_or (SD_, TRX, TRY, TRX);
-}
-
-
-
-11101,3.RX,3.RY,01110:RR:16::XOR
-"xor r<TRX>, r<TRY>"
-*mips16:
-*vr4100:
-{
- do_xor (SD_, TRX, TRY, TRX);
-}
-
-
-
-11101,3.RX,3.RY,01111:RR:16::NOT
-"not r<TRX>, r<TRY>"
-*mips16:
-*vr4100:
-{
- do_nor (SD_, 0, TRY, TRX);
-}
-
-
-
-01100,111,3.RY,5.R32:I8_MOVR32:16::MOVR32
-"move r<TRY>, r<R32>"
-*mips16:
-*vr4100:
-{
- do_or (SD_, R32, 0, TRY);
-}
-
-
-
-01100,101,3.R32L,2.R32H,3.RZ:I8_MOV32R:16::MOV32R
-"move r<R32>, r<TRZ>"
-*mips16:
-*vr4100:
-{
- do_or (SD_, TRZ, 0, R32);
-}
-
-
-
-00110,3.RX,3.RY,3.SHAMT,00:SHIFT:16::SLL
-"sll r<TRX>, r<TRY>, <SHIFT>"
-*mips16:
-*vr4100:
-{
- do_sll (SD_, TRY, TRX, SHIFT);
-}
-
-11110,5.SHAMT,0,00000 + 00110,3.RX,3.RY,000,00:EXT-SHIFT:16::SLL
-"sll r<TRX>, r<TRY>, <SHIFT>"
-*mips16:
-*vr4100:
-{
- do_sll (SD_, TRY, TRX, SHAMT);
-}
-
-
-
-00110,3.RX,3.RY,3.SHAMT,10:SHIFT:16::SRL
-"srl r<TRX>, r<TRY>, <SHIFT>"
-*mips16:
-*vr4100:
-{
- do_srl (SD_, TRY, TRX, SHIFT);
-}
-
-11110,5.SHAMT,0,00000 + 00110,3.RX,3.RY,000,10:EXT-SHIFT:16::SRL
-"srl r<TRX>, r<TRY>, <SHIFT>"
-*mips16:
-*vr4100:
-{
- do_srl (SD_, TRY, TRX, SHAMT);
-}
-
-
-
-00110,3.RX,3.RY,3.SHAMT,11:SHIFT:16::SRA
-"sra r<TRX>, r<TRY>, <SHIFT>"
-*mips16:
-*vr4100:
-{
- do_sra (SD_, TRY, TRX, SHIFT);
-}
-
-11110,5.SHAMT,0,00000 + 00110,3.RX,3.RY,000,11:EXT-SHIFT:16::SRA
-"sra r<TRX>, r<TRY>, <SHIFT>"
-*mips16:
-*vr4100:
-{
- do_sra (SD_, TRY, TRX, SHAMT);
-}
-
-
-
-11101,3.RX,3.RY,00100:RR:16::SLLV
-"sllv r<TRY>, r<TRX>"
-*mips16:
-*vr4100:
-{
- do_sllv (SD_, TRX, TRY, TRY);
-}
-
-
-11101,3.RX,3.RY,00110:RR:16::SRLV
-"srlv r<TRY>, r<TRX>"
-*mips16:
-*vr4100:
-{
- do_srlv (SD_, TRX, TRY, TRY);
-}
-
-
-11101,3.RX,3.RY,00111:RR:16::SRAV
-"srav r<TRY>, r<TRX>"
-*mips16:
-*vr4100:
-{
- do_srav (SD_, TRX, TRY, TRY);
-}
-
-
-00110,3.RX,3.RY,3.SHAMT,01:SHIFT:16::DSLL
-"dsll r<TRY>, r<TRX>, <SHIFT>"
-*mips16:
-*vr4100:
-{
- do_dsll (SD_, TRY, TRX, SHIFT);
-}
-
-11110,5.SHAMT_4_0,1.S5,00000 + 00110,3.RX,3.RY,000,01:EXT-SHIFT:16::DSLL
-"dsll r<TRY>, r<TRX>, <SHAMT>"
-*mips16:
-*vr4100:
-{
- do_dsll (SD_, TRY, TRX, SHAMT);
-}
-
-
-
-11101,3.SHAMT,3.RY,01000:SHIFT64:16::DSRL
-"dsrl r<TRY>, <SHIFT>"
-*mips16:
-*vr4100:
-{
- do_dsrl (SD_, TRY, TRY, SHIFT);
-}
-
-11110,5.SHAMT_4_0,1.S5,00000 + 11101,000,3.RY,01000:EXT-SHIFT64:16::DSRL
-"dsrl r<TRY>, <SHAMT>"
-*mips16:
-*vr4100:
-{
- do_dsrl (SD_, TRY, TRY, SHAMT);
-}
-
-
-
-11101,3.SHAMT,3.RY,10011:SHIFT64:16::DSRA
-"dsra r<TRY>, <SHIFT>"
-*mips16:
-*vr4100:
-{
- do_dsra (SD_, TRY, TRY, SHIFT);
-}
-
-11110,5.SHAMT_4_0,1.S5,00000 + 11101,000,3.RY,10011:EXT-SHIFT64:16::DSRA
-"dsra r<TRY>, <SHAMT>"
-*mips16:
-*vr4100:
-{
- do_dsra (SD_, TRY, TRY, SHAMT);
-}
-
-
-
-11101,3.RX,3.RY,10100:RR:16::DSLLV
-"dsllv r<TRY>, r<TRX>"
-*mips16:
-*vr4100:
-{
- do_dsllv (SD_, TRX, TRY, TRY);
-}
-
-
-11101,3.RX,3.RY,10110:RR:16::DSRLV
-"dsrlv r<TRY>, r<TRX>"
-*mips16:
-*vr4100:
-{
- do_dsrlv (SD_, TRX, TRY, TRY);
-}
-
-
-11101,3.RX,3.RY,10111:RR:16::DSRAV
-"dsrav r<TRY>, r<TRX>"
-*mips16:
-*vr4100:
-{
- do_dsrav (SD_, TRX, TRY, TRY);
-}
-
-
-// Multiply /Divide Instructions
-
-
-11101,3.RX,3.RY,11000:RR:16::MULT
-"mult r<TRX>, r<TRY>"
-*mips16:
-*vr4100:
-{
- do_mult (SD_, TRX, TRY, 0);
-}
-
-
-11101,3.RX,3.RY,11001:RR:16::MULTU
-"multu r<TRX>, r<TRY>"
-*mips16:
-*vr4100:
-{
- do_multu (SD_, TRX, TRY, 0);
-}
-
-
-11101,3.RX,3.RY,11010:RR:16::DIV
-"div r<TRX>, r<TRY>"
-*mips16:
-*vr4100:
-{
- do_div (SD_, TRX, TRY);
-}
-
-
-11101,3.RX,3.RY,11011:RR:16::DIVU
-"divu r<TRX>, r<TRY>"
-*mips16:
-*vr4100:
-{
- do_divu (SD_, TRX, TRY);
-}
-
-
-11101,3.RX,000,10000:RR:16::MFHI
-"mfhi r<TRX>"
-*mips16:
-*vr4100:
-{
- do_mfhi (SD_, TRX);
-}
-
-
-11101,3.RX,000,10010:RR:16::MFLO
-"mflo r<TRX>"
-*mips16:
-*vr4100:
-{
- do_mflo (SD_, TRX);
-}
-
-
-11101,3.RX,3.RY,11100:RR:16::DMULT
-"dmult r<TRX>, r<TRY>"
-*mips16:
-*vr4100:
-{
- do_dmult (SD_, TRX, TRY, 0);
-}
-
-
-11101,3.RX,3.RY,11101:RR:16::DMULTU
-"dmultu r<TRX>, r<TRY>"
-*mips16:
-*vr4100:
-{
- do_dmultu (SD_, TRX, TRY, 0);
-}
-
-
-11101,3.RX,3.RY,11110:RR:16::DDIV
-"ddiv r<TRX>, r<TRY>"
-*mips16:
-*vr4100:
-{
- do_ddiv (SD_, TRX, TRY);
-}
-
-
-11101,3.RX,3.RY,11111:RR:16::DDIVU
-"ddivu r<TRX>, r<TRY>"
-*mips16:
-*vr4100:
-{
- do_ddivu (SD_, TRX, TRY);
-}
-
-
-// Jump and Branch Instructions
-
-
-
-// Issue instruction in delay slot of branch
-:function:::address_word:delayslot16:address_word nia, address_word target
-{
- instruction_word delay_insn;
- sim_events_slip (SD, 1);
- DSPC = CIA; /* save current PC somewhere */
- STATE |= simDELAYSLOT;
- delay_insn = IMEM16 (nia); /* NOTE: mips16 */
- idecode_issue (CPU_, delay_insn, (nia));
- STATE &= ~simDELAYSLOT;
- return target;
-}
-
-// compute basepc dependant on us being in a delay slot
-:function:::address_word:basepc:
-{
- if (STATE & simDELAYSLOT)
- {
- return DSPC; /* return saved address of preceeding jmp */
- }
- else
- {
- return CIA;
- }
-}
-
-
-// JAL
-00011,0,5.IMM_20_16,5.IMM_25_21 + 16.IMMED_15_0:JAL:16::JAL
-"jal <IMMEDIATE>"
-*mips16:
-*vr4100:
-{
- address_word region = (NIA & MASK (63, 28));
- RA = NIA + 2; /* skip 16 bit delayslot insn */
- NIA = delayslot16 (SD_, NIA, (region | (IMMEDIATE << 2))) | 1;
-}
-
-
-
-// JALX - 32 and 16 bit versions.
-
-011101,26.IMMED:JALX:32::JALX32
-"jalx <IMMED>"
-*mips16:
-*vr4100:
-{
- address_word region = (NIA & MASK (63, 28));
- RA = NIA + 4; /* skip 32 bit delayslot insn */
- NIA = delayslot32 (SD_, (region | (IMMED << 2)) | 1);
-}
-
-00011,1,5.IMM_20_16,5.IMM_25_21 + 16.IMMED_15_0:JALX:16::JALX16
-"jalx <IMMEDIATE>"
-*mips16:
-*vr4100:
-{
- address_word region = (NIA & MASK (63, 28));
- RA = NIA + 2; /* 16 bit INSN */
- NIA = delayslot16 (SD_, NIA, (region | (IMMEDIATE << 2)) & ~1);
-}
-
-
-
-11101,3.RX,000,00000:RR:16::JR
-"jr r<TRX>"
-*mips16:
-*vr4100:
-{
- NIA = delayslot16 (SD_, NIA, GPR[TRX]);
-}
-
-
-11101,000,001,00000:RR:16::JRRA
-"jrra"
-*mips16:
-*vr4100:
-{
- NIA = delayslot16 (SD_, NIA, RA);
-}
-
-
-
-11101,3.RX,010,00000:RR:16::JALR
-"jalr r<TRX>"
-*mips16:
-*vr4100:
-{
- RA = NIA + 2;
- NIA = delayslot16 (SD_, NIA, GPR[TRX]);
-}
-
-
-
-00100,3.RX,8.IMMED:RI:16::BEQZ
-"beqz r<TRX>, <IMMED>"
-*mips16:
-*vr4100:
-{
- if (GPR[TRX] == 0)
- NIA = (NIA + (EXTEND8 (IMMED) << 1));
-}
-
-11110,6.IMM_10_5,5.IMM_15_11 + 00100,3.RX,000,5.IMM_4_0:EXT-RI:16::BEQZ
-"beqz r<TRX>, <IMMEDIATE>"
-*mips16:
-*vr4100:
-{
- if (GPR[TRX] == 0)
- NIA = (NIA + (EXTEND16 (IMMEDIATE) << 1));
-}
-
-
-
-00101,3.RX,8.IMMED:RI:16::BNEZ
-"bnez r<TRX>, <IMMED>"
-*mips16:
-*vr4100:
-{
- if (GPR[TRX] != 0)
- NIA = (NIA + (EXTEND8 (IMMED) << 1));
-}
-
-11110,6.IMM_10_5,5.IMM_15_11 + 00101,3.RX,000,5.IMM_4_0:EXT-RI:16::BNEZ
-"bnez r<TRX>, <IMMEDIATE>"
-*mips16:
-*vr4100:
-{
- if (GPR[TRX] != 0)
- NIA = (NIA + (EXTEND16 (IMMEDIATE) << 1));
-}
-
-
-
-01100,000,8.IMMED:I8:16::BTEQZ
-"bteqz <IMMED>"
-*mips16:
-*vr4100:
-{
- if (T8 == 0)
- NIA = (NIA + (EXTEND8 (IMMED) << 1));
-}
-
-11110,6.IMM_10_5,5.IMM_15_11 + 01100,000,000,5.IMM_4_0:EXT-I8:16::BTEQZ
-"bteqz <IMMEDIATE>"
-*mips16:
-*vr4100:
-{
- if (T8 == 0)
- NIA = (NIA + (EXTEND16 (IMMEDIATE) << 1));
-}
-
-
-
-01100,001,8.IMMED:I8:16::BTNEZ
-"btnez <IMMED>"
-*mips16:
-*vr4100:
-{
- if (T8 != 0)
- NIA = (NIA + (EXTEND8 (IMMED) << 1));
-}
-
-11110,6.IMM_10_5,5.IMM_15_11 + 01100,001,000,5.IMM_4_0:EXT-I8:16::BTNEZ
-"btnez <IMMEDIATE>"
-*mips16:
-*vr4100:
-{
- if (T8 != 0)
- NIA = (NIA + (EXTEND16 (IMMEDIATE) << 1));
-}
-
-
-
-00010,11.IMMED:I:16::B
-"b <IMMED>"
-*mips16:
-*vr4100:
-{
- NIA = (NIA + (EXTEND11 (IMMED) << 1));
-}
-
-11110,6.IMM_10_5,5.IMM_15_11 + 00010,6.0,5.IMM_4_0:EXT-I:16::B
-"b <IMMEDIATE>"
-*mips16:
-*vr4100:
-{
- NIA = (NIA + (EXTEND16 (IMMEDIATE) << 1));
-}
-
-
-
-11101,3.RX,3.RY,00101:RR:16::BREAK
-"break"
-*mips16:
-*vr4100:
-{
- if (STATE & simDELAYSLOT)
- PC = cia - 2; /* reference the branch instruction */
- else
- PC = cia;
- SignalException (BreakPoint, instruction_0);
-}
diff --git a/sim/mips/m16run.c b/sim/mips/m16run.c
deleted file mode 100644
index 8a5d6070cba..00000000000
--- a/sim/mips/m16run.c
+++ /dev/null
@@ -1,74 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1998, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-#include "sim-main.h"
-#include "m16_idecode.h"
-#include "m32_idecode.h"
-#include "bfd.h"
-
-
-#define SD sd
-#define CPU cpu
-
-void
-sim_engine_run (SIM_DESC sd,
- int next_cpu_nr,
- int nr_cpus, /* ignore */
- int siggnal) /* ignore */
-{
- sim_cpu *cpu = STATE_CPU (sd, next_cpu_nr);
- address_word cia = CIA_GET (cpu);
-
- while (1)
- {
- address_word nia;
-
-#if defined (ENGINE_ISSUE_PREFIX_HOOK)
- ENGINE_ISSUE_PREFIX_HOOK ();
-#endif
-
- if ((cia & 1))
- {
- m16_instruction_word instruction_0 = IMEM16 (cia);
- nia = m16_idecode_issue (sd, instruction_0, cia);
- }
- else
- {
- m32_instruction_word instruction_0 = IMEM32 (cia);
- nia = m32_idecode_issue (sd, instruction_0, cia);
- }
-
-#if defined (ENGINE_ISSUE_POSTFIX_HOOK)
- ENGINE_ISSUE_POSTFIX_HOOK ();
-#endif
-
- /* Update the instruction address */
- cia = nia;
-
- /* process any events */
- if (sim_events_tick (sd))
- {
- CIA_SET (CPU, cia);
- sim_events_process (sd);
- cia = CIA_GET (CPU);
- }
-
- }
-}
diff --git a/sim/mips/mips.dc b/sim/mips/mips.dc
deleted file mode 100644
index 98da0244c9e..00000000000
--- a/sim/mips/mips.dc
+++ /dev/null
@@ -1,16 +0,0 @@
-# most instructions
-# ------ options ------ : Fst : Lst : ff : fl : fe : word : --- fmt --- : model ...
-# { : mask : value : word }
-
-# Top level - create a very big switch statement.
-
- padded-switch,combine : 31 : 26 : : : : : :
-
- switch,combine : 5 : 0 : : : : : :
-
- switch,combine : 20 : 16 : : : : : :
-
- switch,combine : 25 : 21 : : : : : :
-
- switch,combine : 10 : 6 : : : : : :
-
diff --git a/sim/mips/mips.igen b/sim/mips/mips.igen
deleted file mode 100644
index 03f783a2be2..00000000000
--- a/sim/mips/mips.igen
+++ /dev/null
@@ -1,3936 +0,0 @@
-// -*- C -*-
-//
-// In mips.igen, the semantics for many of the instructions were created
-// using code generated by gencode. Those semantic segments could be
-// greatly simplified.
-//
-// <insn> ::=
-// <insn-word> { "+" <insn-word> }
-// ":" <format-name>
-// ":" <filter-flags>
-// ":" <options>
-// ":" <name>
-// <nl>
-// { <insn-model> }
-// { <insn-mnemonic> }
-// <code-block>
-//
-
-
-// IGEN config - mips16
-// :option:16::insn-bit-size:16
-// :option:16::hi-bit-nr:15
-:option:16::insn-specifying-widths:true
-:option:16::gen-delayed-branch:false
-
-// IGEN config - mips32/64..
-// :option:32::insn-bit-size:32
-// :option:32::hi-bit-nr:31
-:option:32::insn-specifying-widths:true
-:option:32::gen-delayed-branch:false
-
-
-// Generate separate simulators for each target
-// :option:::multi-sim:true
-
-
-// Models known by this simulator
-:model:::mipsI:mips3000:
-:model:::mipsII:mips6000:
-:model:::mipsIII:mips4000:
-:model:::mipsIV:mips8000:
-:model:::mips16:mips16:
-:model:::r3900:mips3900:
-:model:::vr4100:mips4100:
-:model:::vr5000:mips5000:
-
-
-
-// Pseudo instructions known by IGEN
-:internal::::illegal:
-{
- SignalException (ReservedInstruction, 0);
-}
-
-
-// Pseudo instructions known by interp.c
-// For grep - RSVD_INSTRUCTION, RSVD_INSTRUCTION_MASK
-000000,5.*,5.*,5.*,5.OP,000101:SPECIAL:32::RSVD
-"rsvd <OP>"
-{
- SignalException (ReservedInstruction, instruction_0);
-}
-
-
-
-// Helper:
-//
-// Simulate a 32 bit delayslot instruction
-//
-
-:function:::address_word:delayslot32:address_word target
-{
- instruction_word delay_insn;
- sim_events_slip (SD, 1);
- DSPC = CIA;
- CIA = CIA + 4; /* NOTE not mips16 */
- STATE |= simDELAYSLOT;
- delay_insn = IMEM32 (CIA); /* NOTE not mips16 */
- ENGINE_ISSUE_PREFIX_HOOK();
- idecode_issue (CPU_, delay_insn, (CIA));
- STATE &= ~simDELAYSLOT;
- return target;
-}
-
-:function:::address_word:nullify_next_insn32:
-{
- sim_events_slip (SD, 1);
- dotrace (SD, CPU, tracefh, 2, CIA + 4, 4, "load instruction");
- return CIA + 8;
-}
-
-// Helper:
-//
-// Check that an access to a HI/LO register meets timing requirements
-//
-// The following requirements exist:
-//
-// - A MT {HI,LO} update was not immediatly preceeded by a MF {HI,LO} read
-// - A OP {HI,LO} update was not immediatly preceeded by a MF {HI,LO} read
-// - A MF {HI,LO} read was not corrupted by a preceeding MT{LO,HI} update
-// corruption occures when MT{LO,HI} is preceeded by a OP {HI,LO}.
-//
-
-:function:::int:check_mf_cycles:hilo_history *history, signed64 time, const char *new
-{
- if (history->mf.timestamp + 3 > time)
- {
- sim_engine_abort (SD, CPU, CIA, "HILO: %s: %s at 0x%08lx too close to MF at 0x%08lx\n",
- itable[MY_INDEX].name,
- new, (long) CIA,
- (long) history->mf.cia);
- return 0;
- }
- return 1;
-}
-
-:function:::int:check_mt_hilo:hilo_history *history
-*mipsI,mipsII,mipsIII,mipsIV:
-*vr4100:
-*vr5000:
-{
- signed64 time = sim_events_time (SD);
- int ok = check_mf_cycles (SD_, history, time, "MT");
- history->mt.timestamp = time;
- history->mt.cia = CIA;
- return ok;
-}
-
-:function:::int:check_mt_hilo:hilo_history *history
-*r3900:
-{
- signed64 time = sim_events_time (SD);
- history->mt.timestamp = time;
- history->mt.cia = CIA;
- return 1;
-}
-
-
-:function:::int:check_mf_hilo:hilo_history *history, hilo_history *peer
-*mipsI,mipsII,mipsIII,mipsIV:
-*vr4100:
-*vr5000:
-*r3900:
-{
- signed64 time = sim_events_time (SD);
- int ok = 1;
- if (peer != NULL
- && peer->mt.timestamp > history->op.timestamp
- && history->mt.timestamp < history->op.timestamp
- && ! (history->mf.timestamp > history->op.timestamp
- && history->mf.timestamp < peer->mt.timestamp)
- && ! (peer->mf.timestamp > history->op.timestamp
- && peer->mf.timestamp < peer->mt.timestamp))
- {
- /* The peer has been written to since the last OP yet we have
- not */
- sim_engine_abort (SD, CPU, CIA, "HILO: %s: MF at 0x%08lx following OP at 0x%08lx corrupted by MT at 0x%08lx\n",
- itable[MY_INDEX].name,
- (long) CIA,
- (long) history->op.cia,
- (long) peer->mt.cia);
- ok = 0;
- }
- history->mf.timestamp = time;
- history->mf.cia = CIA;
- return ok;
-}
-
-
-
-:function:::int:check_mult_hilo:hilo_history *hi, hilo_history *lo
-*mipsI,mipsII,mipsIII,mipsIV:
-*vr4100:
-*vr5000:
-{
- signed64 time = sim_events_time (SD);
- int ok = (check_mf_cycles (SD_, hi, time, "OP")
- && check_mf_cycles (SD_, lo, time, "OP"));
- hi->op.timestamp = time;
- lo->op.timestamp = time;
- hi->op.cia = CIA;
- lo->op.cia = CIA;
- return ok;
-}
-
-// The r3900 mult and multu insns _can_ be exectuted immediatly after
-// a mf{hi,lo}
-:function:::int:check_mult_hilo:hilo_history *hi, hilo_history *lo
-*r3900:
-{
- /* FIXME: could record the fact that a stall occured if we want */
- signed64 time = sim_events_time (SD);
- hi->op.timestamp = time;
- lo->op.timestamp = time;
- hi->op.cia = CIA;
- lo->op.cia = CIA;
- return 1;
-}
-
-
-:function:::int:check_div_hilo:hilo_history *hi, hilo_history *lo
-*mipsI,mipsII,mipsIII,mipsIV:
-*vr4100:
-*vr5000:
-*r3900:
-{
- signed64 time = sim_events_time (SD);
- int ok = (check_mf_cycles (SD_, hi, time, "OP")
- && check_mf_cycles (SD_, lo, time, "OP"));
- hi->op.timestamp = time;
- lo->op.timestamp = time;
- hi->op.cia = CIA;
- lo->op.cia = CIA;
- return ok;
-}
-
-
-
-
-
-//
-// Mips Architecture:
-//
-// CPU Instruction Set (mipsI - mipsIV)
-//
-
-
-
-000000,5.RS,5.RT,5.RD,00000,100000:SPECIAL:32::ADD
-"add r<RD>, r<RS>, r<RT>"
-*mipsI,mipsII,mipsIII,mipsIV:
-*vr4100:
-*vr5000:
-*r3900:
-{
- TRACE_ALU_INPUT2 (GPR[RS], GPR[RT]);
- {
- ALU32_BEGIN (GPR[RS]);
- ALU32_ADD (GPR[RT]);
- ALU32_END (GPR[RD]);
- }
- TRACE_ALU_RESULT (GPR[RD]);
-}
-
-
-
-001000,5.RS,5.RT,16.IMMEDIATE:NORMAL:32::ADDI
-"addi r<RT>, r<RS>, IMMEDIATE"
-*mipsI,mipsII,mipsIII,mipsIV:
-*vr4100:
-*vr5000:
-*r3900:
-{
- TRACE_ALU_INPUT2 (GPR[RS], EXTEND16 (IMMEDIATE));
- {
- ALU32_BEGIN (GPR[RS]);
- ALU32_ADD (EXTEND16 (IMMEDIATE));
- ALU32_END (GPR[RT]);
- }
- TRACE_ALU_RESULT (GPR[RT]);
-}
-
-
-
-:function:::void:do_addiu:int rs, int rt, unsigned16 immediate
-{
- TRACE_ALU_INPUT2 (GPR[rs], EXTEND16 (immediate));
- GPR[rt] = EXTEND32 (GPR[rs] + EXTEND16 (immediate));
- TRACE_ALU_RESULT (GPR[rt]);
-}
-
-001001,5.RS,5.RT,16.IMMEDIATE:NORMAL:32::ADDIU
-"addiu r<RT>, r<RS>, <IMMEDIATE>"
-*mipsI,mipsII,mipsIII,mipsIV:
-*vr4100:
-*vr5000:
-*r3900:
-{
- do_addiu (SD_, RS, RT, IMMEDIATE);
-}
-
-
-
-:function:::void:do_addu:int rs, int rt, int rd
-{
- TRACE_ALU_INPUT2 (GPR[rs], GPR[rt]);
- GPR[rd] = EXTEND32 (GPR[rs] + GPR[rt]);
- TRACE_ALU_RESULT (GPR[rd]);
-}
-
-000000,5.RS,5.RT,5.RD,00000,100001:SPECIAL:32::ADDU
-"addu r<RD>, r<RS>, r<RT>"
-*mipsI,mipsII,mipsIII,mipsIV:
-*vr4100:
-*vr5000:
-*r3900:
-{
- do_addu (SD_, RS, RT, RD);
-}
-
-
-
-:function:::void:do_and:int rs, int rt, int rd
-{
- TRACE_ALU_INPUT2 (GPR[rs], GPR[rt]);
- GPR[rd] = GPR[rs] & GPR[rt];
- TRACE_ALU_RESULT (GPR[rd]);
-}
-
-000000,5.RS,5.RT,5.RD,00000,100100:SPECIAL:32::AND
-"and r<RD>, r<RS>, r<RT>"
-*mipsI,mipsII,mipsIII,mipsIV:
-*vr4100:
-*vr5000:
-*r3900:
-{
- do_and (SD_, RS, RT, RD);
-}
-
-
-
-001100,5.RS,5.RT,16.IMMEDIATE:NORMAL:32::ANDI
-"and r<RT>, r<RS>, <IMMEDIATE>"
-*mipsI,mipsII,mipsIII,mipsIV:
-*vr4100:
-*vr5000:
-*r3900:
-{
- TRACE_ALU_INPUT2 (GPR[RS], IMMEDIATE);
- GPR[RT] = GPR[RS] & IMMEDIATE;
- TRACE_ALU_RESULT (GPR[RT]);
-}
-
-
-
-000100,5.RS,5.RT,16.OFFSET:NORMAL:32::BEQ
-"beq r<RS>, r<RT>, <OFFSET>"
-*mipsI,mipsII,mipsIII,mipsIV:
-*vr4100:
-*vr5000:
-*r3900:
-{
- address_word offset = EXTEND16 (OFFSET) << 2;
- check_branch_bug ();
- if ((signed_word) GPR[RS] == (signed_word) GPR[RT])
- {
- mark_branch_bug (NIA+offset);
- DELAY_SLOT (NIA + offset);
- }
-}
-
-
-
-010100,5.RS,5.RT,16.OFFSET:NORMAL:32::BEQL
-"beql r<RS>, r<RT>, <OFFSET>"
-*mipsII:
-*mipsIII:
-*mipsIV:
-*vr4100:
-*vr5000:
-*r3900:
-{
- address_word offset = EXTEND16 (OFFSET) << 2;
- check_branch_bug ();
- if ((signed_word) GPR[RS] == (signed_word) GPR[RT])
- {
- mark_branch_bug (NIA+offset);
- DELAY_SLOT (NIA + offset);
- }
- else
- NULLIFY_NEXT_INSTRUCTION ();
-}
-
-
-
-000001,5.RS,00001,16.OFFSET:REGIMM:32::BGEZ
-"bgez r<RS>, <OFFSET>"
-*mipsI,mipsII,mipsIII,mipsIV:
-*vr4100:
-*vr5000:
-*r3900:
-{
- address_word offset = EXTEND16 (OFFSET) << 2;
- check_branch_bug ();
- if ((signed_word) GPR[RS] >= 0)
- {
- mark_branch_bug (NIA+offset);
- DELAY_SLOT (NIA + offset);
- }
-}
-
-
-
-000001,5.RS!31,10001,16.OFFSET:REGIMM:32::BGEZAL
-"bgezal r<RS>, <OFFSET>"
-*mipsI,mipsII,mipsIII,mipsIV:
-*vr4100:
-*vr5000:
-*r3900:
-{
- address_word offset = EXTEND16 (OFFSET) << 2;
- check_branch_bug ();
- RA = (CIA + 8);
- if ((signed_word) GPR[RS] >= 0)
- {
- mark_branch_bug (NIA+offset);
- DELAY_SLOT (NIA + offset);
- }
-}
-
-
-
-000001,5.RS!31,10011,16.OFFSET:REGIMM:32::BGEZALL
-"bgezall r<RS>, <OFFSET>"
-*mipsII:
-*mipsIII:
-*mipsIV:
-*vr4100:
-*vr5000:
-*r3900:
-{
- address_word offset = EXTEND16 (OFFSET) << 2;
- check_branch_bug ();
- RA = (CIA + 8);
- /* NOTE: The branch occurs AFTER the next instruction has been
- executed */
- if ((signed_word) GPR[RS] >= 0)
- {
- mark_branch_bug (NIA+offset);
- DELAY_SLOT (NIA + offset);
- }
- else
- NULLIFY_NEXT_INSTRUCTION ();
-}
-
-
-
-000001,5.RS,00011,16.OFFSET:REGIMM:32::BGEZL
-"bgezl r<RS>, <OFFSET>"
-*mipsII:
-*mipsIII:
-*mipsIV:
-*vr4100:
-*vr5000:
-*r3900:
-{
- address_word offset = EXTEND16 (OFFSET) << 2;
- check_branch_bug ();
- if ((signed_word) GPR[RS] >= 0)
- {
- mark_branch_bug (NIA+offset);
- DELAY_SLOT (NIA + offset);
- }
- else
- NULLIFY_NEXT_INSTRUCTION ();
-}
-
-
-
-000111,5.RS,00000,16.OFFSET:NORMAL:32::BGTZ
-"bgtz r<RS>, <OFFSET>"
-*mipsI,mipsII,mipsIII,mipsIV:
-*vr4100:
-*vr5000:
-*r3900:
-{
- address_word offset = EXTEND16 (OFFSET) << 2;
- check_branch_bug ();
- if ((signed_word) GPR[RS] > 0)
- {
- mark_branch_bug (NIA+offset);
- DELAY_SLOT (NIA + offset);
- }
-}
-
-
-
-010111,5.RS,00000,16.OFFSET:NORMAL:32::BGTZL
-"bgtzl r<RS>, <OFFSET>"
-*mipsII:
-*mipsIII:
-*mipsIV:
-*vr4100:
-*vr5000:
-*r3900:
-{
- address_word offset = EXTEND16 (OFFSET) << 2;
- check_branch_bug ();
- /* NOTE: The branch occurs AFTER the next instruction has been
- executed */
- if ((signed_word) GPR[RS] > 0)
- {
- mark_branch_bug (NIA+offset);
- DELAY_SLOT (NIA + offset);
- }
- else
- NULLIFY_NEXT_INSTRUCTION ();
-}
-
-
-
-000110,5.RS,00000,16.OFFSET:NORMAL:32::BLEZ
-"blez r<RS>, <OFFSET>"
-*mipsI,mipsII,mipsIII,mipsIV:
-*vr4100:
-*vr5000:
-*r3900:
-{
- address_word offset = EXTEND16 (OFFSET) << 2;
- check_branch_bug ();
- /* NOTE: The branch occurs AFTER the next instruction has been
- executed */
- if ((signed_word) GPR[RS] <= 0)
- {
- mark_branch_bug (NIA+offset);
- DELAY_SLOT (NIA + offset);
- }
-}
-
-
-
-010110,5.RS,00000,16.OFFSET:NORMAL:32::BLEZL
-"bgezl r<RS>, <OFFSET>"
-*mipsII:
-*mipsIII:
-*mipsIV:
-*vr4100:
-*vr5000:
-*r3900:
-{
- address_word offset = EXTEND16 (OFFSET) << 2;
- check_branch_bug ();
- if ((signed_word) GPR[RS] <= 0)
- {
- mark_branch_bug (NIA+offset);
- DELAY_SLOT (NIA + offset);
- }
- else
- NULLIFY_NEXT_INSTRUCTION ();
-}
-
-
-
-000001,5.RS,00000,16.OFFSET:REGIMM:32::BLTZ
-"bltz r<RS>, <OFFSET>"
-*mipsI,mipsII,mipsIII,mipsIV:
-*vr4100:
-*vr5000:
-*r3900:
-{
- address_word offset = EXTEND16 (OFFSET) << 2;
- check_branch_bug ();
- if ((signed_word) GPR[RS] < 0)
- {
- mark_branch_bug (NIA+offset);
- DELAY_SLOT (NIA + offset);
- }
-}
-
-
-
-000001,5.RS!31,10000,16.OFFSET:REGIMM:32::BLTZAL
-"bltzal r<RS>, <OFFSET>"
-*mipsI,mipsII,mipsIII,mipsIV:
-*vr4100:
-*vr5000:
-*r3900:
-{
- address_word offset = EXTEND16 (OFFSET) << 2;
- check_branch_bug ();
- RA = (CIA + 8);
- /* NOTE: The branch occurs AFTER the next instruction has been
- executed */
- if ((signed_word) GPR[RS] < 0)
- {
- mark_branch_bug (NIA+offset);
- DELAY_SLOT (NIA + offset);
- }
-}
-
-
-
-000001,5.RS!31,10010,16.OFFSET:REGIMM:32::BLTZALL
-"bltzall r<RS>, <OFFSET>"
-*mipsII:
-*mipsIII:
-*mipsIV:
-*vr4100:
-*vr5000:
-*r3900:
-{
- address_word offset = EXTEND16 (OFFSET) << 2;
- check_branch_bug ();
- RA = (CIA + 8);
- if ((signed_word) GPR[RS] < 0)
- {
- mark_branch_bug (NIA+offset);
- DELAY_SLOT (NIA + offset);
- }
- else
- NULLIFY_NEXT_INSTRUCTION ();
-}
-
-
-
-000001,5.RS,00010,16.OFFSET:REGIMM:32::BLTZL
-"bltzl r<RS>, <OFFSET>"
-*mipsII:
-*mipsIII:
-*mipsIV:
-*vr4100:
-*vr5000:
-*r3900:
-{
- address_word offset = EXTEND16 (OFFSET) << 2;
- check_branch_bug ();
- /* NOTE: The branch occurs AFTER the next instruction has been
- executed */
- if ((signed_word) GPR[RS] < 0)
- {
- mark_branch_bug (NIA+offset);
- DELAY_SLOT (NIA + offset);
- }
- else
- NULLIFY_NEXT_INSTRUCTION ();
-}
-
-
-
-000101,5.RS,5.RT,16.OFFSET:NORMAL:32::BNE
-"bne r<RS>, r<RT>, <OFFSET>"
-*mipsI,mipsII,mipsIII,mipsIV:
-*vr4100:
-*vr5000:
-*r3900:
-{
- address_word offset = EXTEND16 (OFFSET) << 2;
- check_branch_bug ();
- if ((signed_word) GPR[RS] != (signed_word) GPR[RT])
- {
- mark_branch_bug (NIA+offset);
- DELAY_SLOT (NIA + offset);
- }
-}
-
-
-
-010101,5.RS,5.RT,16.OFFSET:NORMAL:32::BNEL
-"bnel r<RS>, r<RT>, <OFFSET>"
-*mipsII:
-*mipsIII:
-*mipsIV:
-*vr4100:
-*vr5000:
-*r3900:
-{
- address_word offset = EXTEND16 (OFFSET) << 2;
- check_branch_bug ();
- if ((signed_word) GPR[RS] != (signed_word) GPR[RT])
- {
- mark_branch_bug (NIA+offset);
- DELAY_SLOT (NIA + offset);
- }
- else
- NULLIFY_NEXT_INSTRUCTION ();
-}
-
-
-
-000000,20.CODE,001101:SPECIAL:32::BREAK
-"break"
-*mipsI,mipsII,mipsIII,mipsIV:
-*vr4100:
-*vr5000:
-*r3900:
-{
- /* Check for some break instruction which are reserved for use by the simulator. */
- unsigned int break_code = instruction_0 & HALT_INSTRUCTION_MASK;
- if (break_code == (HALT_INSTRUCTION & HALT_INSTRUCTION_MASK) ||
- break_code == (HALT_INSTRUCTION2 & HALT_INSTRUCTION_MASK))
- {
- sim_engine_halt (SD, CPU, NULL, cia,
- sim_exited, (unsigned int)(A0 & 0xFFFFFFFF));
- }
- else if (break_code == (BREAKPOINT_INSTRUCTION & HALT_INSTRUCTION_MASK) ||
- break_code == (BREAKPOINT_INSTRUCTION2 & HALT_INSTRUCTION_MASK))
- {
- if (STATE & simDELAYSLOT)
- PC = cia - 4; /* reference the branch instruction */
- else
- PC = cia;
- SignalException(BreakPoint, instruction_0);
- }
-
- else
- {
- /* If we get this far, we're not an instruction reserved by the sim. Raise
- the exception. */
- SignalException(BreakPoint, instruction_0);
- }
-}
-
-
-
-000000,5.RS,5.RT,5.RD,00000,101100:SPECIAL:64::DADD
-"dadd r<RD>, r<RS>, r<RT>"
-*mipsIII:
-*mipsIV:
-*vr4100:
-*vr5000:
-{
- /* this check's for overflow */
- TRACE_ALU_INPUT2 (GPR[RS], GPR[RT]);
- {
- ALU64_BEGIN (GPR[RS]);
- ALU64_ADD (GPR[RT]);
- ALU64_END (GPR[RD]);
- }
- TRACE_ALU_RESULT (GPR[RD]);
-}
-
-
-
-011000,5.RS,5.RT,16.IMMEDIATE:NORMAL:64::DADDI
-"daddi r<RT>, r<RS>, <IMMEDIATE>"
-*mipsIII:
-*mipsIV:
-*vr4100:
-*vr5000:
-{
- TRACE_ALU_INPUT2 (GPR[RS], EXTEND16 (IMMEDIATE));
- {
- ALU64_BEGIN (GPR[RS]);
- ALU64_ADD (EXTEND16 (IMMEDIATE));
- ALU64_END (GPR[RT]);
- }
- TRACE_ALU_RESULT (GPR[RT]);
-}
-
-
-
-:function:::void:do_daddiu:int rs, int rt, unsigned16 immediate
-{
- TRACE_ALU_INPUT2 (GPR[rs], EXTEND16 (immediate));
- GPR[rt] = GPR[rs] + EXTEND16 (immediate);
- TRACE_ALU_RESULT (GPR[rt]);
-}
-
-011001,5.RS,5.RT,16.IMMEDIATE:NORMAL:64::DADDIU
-"daddu r<RT>, r<RS>, <IMMEDIATE>"
-*mipsIII:
-*mipsIV:
-*vr4100:
-*vr5000:
-{
- do_daddiu (SD_, RS, RT, IMMEDIATE);
-}
-
-
-
-:function:::void:do_daddu:int rs, int rt, int rd
-{
- TRACE_ALU_INPUT2 (GPR[rs], GPR[rt]);
- GPR[rd] = GPR[rs] + GPR[rt];
- TRACE_ALU_RESULT (GPR[rd]);
-}
-
-000000,5.RS,5.RT,5.RD,00000,101101:SPECIAL:64::DADDU
-"daddu r<RD>, r<RS>, r<RT>"
-*mipsIII:
-*mipsIV:
-*vr4100:
-*vr5000:
-{
- do_daddu (SD_, RS, RT, RD);
-}
-
-
-
-:function:::void:do_ddiv:int rs, int rt
-{
- check_div_hilo (SD_, HIHISTORY, LOHISTORY);
- TRACE_ALU_INPUT2 (GPR[rs], GPR[rt]);
- {
- signed64 n = GPR[rs];
- signed64 d = GPR[rt];
- signed64 hi;
- signed64 lo;
- if (d == 0)
- {
- lo = SIGNED64 (0x8000000000000000);
- hi = 0;
- }
- else if (d == -1 && n == SIGNED64 (0x8000000000000000))
- {
- lo = SIGNED64 (0x8000000000000000);
- hi = 0;
- }
- else
- {
- lo = (n / d);
- hi = (n % d);
- }
- HI = hi;
- LO = lo;
- }
- TRACE_ALU_RESULT2 (HI, LO);
-}
-
-000000,5.RS,5.RT,0000000000011110:SPECIAL:64::DDIV
-"ddiv r<RS>, r<RT>"
-*mipsIII:
-*mipsIV:
-*vr4100:
-*vr5000:
-{
- do_ddiv (SD_, RS, RT);
-}
-
-
-
-:function:::void:do_ddivu:int rs, int rt
-{
- check_div_hilo (SD_, HIHISTORY, LOHISTORY);
- TRACE_ALU_INPUT2 (GPR[rs], GPR[rt]);
- {
- unsigned64 n = GPR[rs];
- unsigned64 d = GPR[rt];
- unsigned64 hi;
- unsigned64 lo;
- if (d == 0)
- {
- lo = SIGNED64 (0x8000000000000000);
- hi = 0;
- }
- else
- {
- lo = (n / d);
- hi = (n % d);
- }
- HI = hi;
- LO = lo;
- }
- TRACE_ALU_RESULT2 (HI, LO);
-}
-
-000000,5.RS,5.RT,0000000000,011111:SPECIAL:64::DDIVU
-"ddivu r<RS>, r<RT>"
-*mipsIII:
-*mipsIV:
-*vr4100:
-*vr5000:
-{
- do_ddivu (SD_, RS, RT);
-}
-
-
-
-:function:::void:do_div:int rs, int rt
-{
- check_div_hilo (SD_, HIHISTORY, LOHISTORY);
- TRACE_ALU_INPUT2 (GPR[rs], GPR[rt]);
- {
- signed32 n = GPR[rs];
- signed32 d = GPR[rt];
- if (d == 0)
- {
- LO = EXTEND32 (0x80000000);
- HI = EXTEND32 (0);
- }
- else if (n == SIGNED32 (0x80000000) && d == -1)
- {
- LO = EXTEND32 (0x80000000);
- HI = EXTEND32 (0);
- }
- else
- {
- LO = EXTEND32 (n / d);
- HI = EXTEND32 (n % d);
- }
- }
- TRACE_ALU_RESULT2 (HI, LO);
-}
-
-000000,5.RS,5.RT,0000000000011010:SPECIAL:32::DIV
-"div r<RS>, r<RT>"
-*mipsI,mipsII,mipsIII,mipsIV:
-*vr4100:
-*vr5000:
-*r3900:
-{
- do_div (SD_, RS, RT);
-}
-
-
-
-:function:::void:do_divu:int rs, int rt
-{
- check_div_hilo (SD_, HIHISTORY, LOHISTORY);
- TRACE_ALU_INPUT2 (GPR[rs], GPR[rt]);
- {
- unsigned32 n = GPR[rs];
- unsigned32 d = GPR[rt];
- if (d == 0)
- {
- LO = EXTEND32 (0x80000000);
- HI = EXTEND32 (0);
- }
- else
- {
- LO = EXTEND32 (n / d);
- HI = EXTEND32 (n % d);
- }
- }
- TRACE_ALU_RESULT2 (HI, LO);
-}
-
-000000,5.RS,5.RT,0000000000011011:SPECIAL:32::DIVU
-"divu r<RS>, r<RT>"
-*mipsI,mipsII,mipsIII,mipsIV:
-*vr4100:
-*vr5000:
-*r3900:
-{
- do_divu (SD_, RS, RT);
-}
-
-
-
-:function:::void:do_dmultx:int rs, int rt, int rd, int signed_p
-{
- unsigned64 lo;
- unsigned64 hi;
- unsigned64 m00;
- unsigned64 m01;
- unsigned64 m10;
- unsigned64 m11;
- unsigned64 mid;
- int sign;
- unsigned64 op1 = GPR[rs];
- unsigned64 op2 = GPR[rt];
- check_mult_hilo (SD_, HIHISTORY, LOHISTORY);
- TRACE_ALU_INPUT2 (GPR[rs], GPR[rt]);
- /* make signed multiply unsigned */
- sign = 0;
- if (signed_p)
- {
- if (op1 < 0)
- {
- op1 = - op1;
- ++sign;
- }
- if (op2 < 0)
- {
- op2 = - op2;
- ++sign;
- }
- }
- /* multiply out the 4 sub products */
- m00 = ((unsigned64) VL4_8 (op1) * (unsigned64) VL4_8 (op2));
- m10 = ((unsigned64) VH4_8 (op1) * (unsigned64) VL4_8 (op2));
- m01 = ((unsigned64) VL4_8 (op1) * (unsigned64) VH4_8 (op2));
- m11 = ((unsigned64) VH4_8 (op1) * (unsigned64) VH4_8 (op2));
- /* add the products */
- mid = ((unsigned64) VH4_8 (m00)
- + (unsigned64) VL4_8 (m10)
- + (unsigned64) VL4_8 (m01));
- lo = U8_4 (mid, m00);
- hi = (m11
- + (unsigned64) VH4_8 (mid)
- + (unsigned64) VH4_8 (m01)
- + (unsigned64) VH4_8 (m10));
- /* fix the sign */
- if (sign & 1)
- {
- lo = -lo;
- if (lo == 0)
- hi = -hi;
- else
- hi = -hi - 1;
- }
- /* save the result HI/LO (and a gpr) */
- LO = lo;
- HI = hi;
- if (rd != 0)
- GPR[rd] = lo;
- TRACE_ALU_RESULT2 (HI, LO);
-}
-
-:function:::void:do_dmult:int rs, int rt, int rd
-{
- do_dmultx (SD_, rs, rt, rd, 1);
-}
-
-000000,5.RS,5.RT,0000000000011100:SPECIAL:64::DMULT
-"dmult r<RS>, r<RT>"
-*mipsIII,mipsIV:
-*vr4100:
-{
- do_dmult (SD_, RS, RT, 0);
-}
-
-000000,5.RS,5.RT,5.RD,00000011100:SPECIAL:64::DMULT
-"dmult r<RS>, r<RT>":RD == 0
-"dmult r<RD>, r<RS>, r<RT>"
-*vr5000:
-{
- do_dmult (SD_, RS, RT, RD);
-}
-
-
-
-:function:::void:do_dmultu:int rs, int rt, int rd
-{
- do_dmultx (SD_, rs, rt, rd, 0);
-}
-
-000000,5.RS,5.RT,0000000000011101:SPECIAL:64::DMULTU
-"dmultu r<RS>, r<RT>"
-*mipsIII,mipsIV:
-*vr4100:
-{
- do_dmultu (SD_, RS, RT, 0);
-}
-
-000000,5.RS,5.RT,5.RD,00000011101:SPECIAL:64::DMULTU
-"dmultu r<RD>, r<RS>, r<RT>":RD == 0
-"dmultu r<RS>, r<RT>"
-*vr5000:
-{
- do_dmultu (SD_, RS, RT, RD);
-}
-
-:function:::void:do_dsll:int rt, int rd, int shift
-{
- GPR[rd] = GPR[rt] << shift;
-}
-
-:function:::void:do_dsllv:int rs, int rt, int rd
-{
- int s = MASKED64 (GPR[rs], 5, 0);
- GPR[rd] = GPR[rt] << s;
-}
-
-
-00000000000,5.RT,5.RD,5.SHIFT,111000:SPECIAL:64::DSLL
-"dsll r<RD>, r<RT>, <SHIFT>"
-*mipsIII:
-*mipsIV:
-*vr4100:
-*vr5000:
-{
- do_dsll (SD_, RT, RD, SHIFT);
-}
-
-
-00000000000,5.RT,5.RD,5.SHIFT,111100:SPECIAL:64::DSLL32
-"dsll32 r<RD>, r<RT>, <SHIFT>"
-*mipsIII:
-*mipsIV:
-*vr4100:
-*vr5000:
-{
- int s = 32 + SHIFT;
- GPR[RD] = GPR[RT] << s;
-}
-
-000000,5.RS,5.RT,5.RD,00000010100:SPECIAL:64::DSLLV
-"dsllv r<RD>, r<RT>, r<RS>"
-*mipsIII:
-*mipsIV:
-*vr4100:
-*vr5000:
-{
- do_dsllv (SD_, RS, RT, RD);
-}
-
-:function:::void:do_dsra:int rt, int rd, int shift
-{
- GPR[rd] = ((signed64) GPR[rt]) >> shift;
-}
-
-
-00000000000,5.RT,5.RD,5.SHIFT,111011:SPECIAL:64::DSRA
-"dsra r<RD>, r<RT>, <SHIFT>"
-*mipsIII:
-*mipsIV:
-*vr4100:
-*vr5000:
-{
- do_dsra (SD_, RT, RD, SHIFT);
-}
-
-
-00000000000,5.RT,5.RD,5.SHIFT,111111:SPECIAL:64::DSRA32
-"dsra32 r<RT>, r<RD>, <SHIFT>"
-*mipsIII:
-*mipsIV:
-*vr4100:
-*vr5000:
-{
- int s = 32 + SHIFT;
- GPR[RD] = ((signed64) GPR[RT]) >> s;
-}
-
-
-:function:::void:do_dsrav:int rs, int rt, int rd
-{
- int s = MASKED64 (GPR[rs], 5, 0);
- TRACE_ALU_INPUT2 (GPR[rt], s);
- GPR[rd] = ((signed64) GPR[rt]) >> s;
- TRACE_ALU_RESULT (GPR[rd]);
-}
-
-000000,5.RS,5.RT,5.RD,00000010111:SPECIAL:64::DSRAV
-"dsra32 r<RT>, r<RD>, r<RS>"
-*mipsIII:
-*mipsIV:
-*vr4100:
-*vr5000:
-{
- do_dsrav (SD_, RS, RT, RD);
-}
-
-:function:::void:do_dsrl:int rt, int rd, int shift
-{
- GPR[rd] = (unsigned64) GPR[rt] >> shift;
-}
-
-
-00000000000,5.RT,5.RD,5.SHIFT,111010:SPECIAL:64::DSRL
-"dsrl r<RD>, r<RT>, <SHIFT>"
-*mipsIII:
-*mipsIV:
-*vr4100:
-*vr5000:
-{
- do_dsrl (SD_, RT, RD, SHIFT);
-}
-
-
-00000000000,5.RT,5.RD,5.SHIFT,111110:SPECIAL:64::DSRL32
-"dsrl32 r<RD>, r<RT>, <SHIFT>"
-*mipsIII:
-*mipsIV:
-*vr4100:
-*vr5000:
-{
- int s = 32 + SHIFT;
- GPR[RD] = (unsigned64) GPR[RT] >> s;
-}
-
-
-:function:::void:do_dsrlv:int rs, int rt, int rd
-{
- int s = MASKED64 (GPR[rs], 5, 0);
- GPR[rd] = (unsigned64) GPR[rt] >> s;
-}
-
-
-
-000000,5.RS,5.RT,5.RD,00000010110:SPECIAL:64::DSRLV
-"dsrl32 r<RD>, r<RT>, r<RS>"
-*mipsIII:
-*mipsIV:
-*vr4100:
-*vr5000:
-{
- do_dsrlv (SD_, RS, RT, RD);
-}
-
-
-000000,5.RS,5.RT,5.RD,00000101110:SPECIAL:64::DSUB
-"dsub r<RD>, r<RS>, r<RT>"
-*mipsIII:
-*mipsIV:
-*vr4100:
-*vr5000:
-{
- TRACE_ALU_INPUT2 (GPR[RS], GPR[RT]);
- {
- ALU64_BEGIN (GPR[RS]);
- ALU64_SUB (GPR[RT]);
- ALU64_END (GPR[RD]);
- }
- TRACE_ALU_RESULT (GPR[RD]);
-}
-
-
-:function:::void:do_dsubu:int rs, int rt, int rd
-{
- TRACE_ALU_INPUT2 (GPR[rs], GPR[rt]);
- GPR[rd] = GPR[rs] - GPR[rt];
- TRACE_ALU_RESULT (GPR[rd]);
-}
-
-000000,5.RS,5.RT,5.RD,00000101111:SPECIAL:64::DSUBU
-"dsubu r<RD>, r<RS>, r<RT>"
-*mipsIII:
-*mipsIV:
-*vr4100:
-*vr5000:
-{
- do_dsubu (SD_, RS, RT, RD);
-}
-
-
-000010,26.INSTR_INDEX:NORMAL:32::J
-"j <INSTR_INDEX>"
-*mipsI,mipsII,mipsIII,mipsIV:
-*vr4100:
-*vr5000:
-*r3900:
-{
- /* NOTE: The region used is that of the delay slot NIA and NOT the
- current instruction */
- address_word region = (NIA & MASK (63, 28));
- DELAY_SLOT (region | (INSTR_INDEX << 2));
-}
-
-
-000011,26.INSTR_INDEX:NORMAL:32::JAL
-"jal <INSTR_INDEX>"
-*mipsI,mipsII,mipsIII,mipsIV:
-*vr4100:
-*vr5000:
-*r3900:
-{
- /* NOTE: The region used is that of the delay slot and NOT the
- current instruction */
- address_word region = (NIA & MASK (63, 28));
- GPR[31] = CIA + 8;
- DELAY_SLOT (region | (INSTR_INDEX << 2));
-}
-
-000000,5.RS,00000,5.RD,00000001001:SPECIAL:32::JALR
-"jalr r<RS>":RD == 31
-"jalr r<RD>, r<RS>"
-*mipsI,mipsII,mipsIII,mipsIV:
-*vr4100:
-*vr5000:
-*r3900:
-{
- address_word temp = GPR[RS];
- GPR[RD] = CIA + 8;
- DELAY_SLOT (temp);
-}
-
-
-000000,5.RS,000000000000000001000:SPECIAL:32::JR
-"jr r<RS>"
-*mipsI,mipsII,mipsIII,mipsIV:
-*vr4100:
-*vr5000:
-*r3900:
-{
- DELAY_SLOT (GPR[RS]);
-}
-
-
-:function:::unsigned_word:do_load:unsigned access, address_word base, address_word offset
-{
- address_word mask = (WITH_TARGET_WORD_BITSIZE == 64 ? 0x7 : 0x3);
- address_word reverseendian = (ReverseEndian ? (mask ^ access) : 0);
- address_word bigendiancpu = (BigEndianCPU ? (mask ^ access) : 0);
- unsigned int byte;
- address_word paddr;
- int uncached;
- unsigned64 memval;
- address_word vaddr;
-
- vaddr = base + offset;
- if ((vaddr & access) != 0)
- {
- SIM_CORE_SIGNAL (SD, STATE_CPU (SD, 0), cia, read_map, access+1, vaddr, read_transfer, sim_core_unaligned_signal);
- }
- AddressTranslation (vaddr, isDATA, isLOAD, &paddr, &uncached, isTARGET, isREAL);
- paddr = ((paddr & ~mask) | ((paddr & mask) ^ reverseendian));
- LoadMemory (&memval, NULL, uncached, access, paddr, vaddr, isDATA, isREAL);
- byte = ((vaddr & mask) ^ bigendiancpu);
- return (memval >> (8 * byte));
-}
-
-
-100000,5.BASE,5.RT,16.OFFSET:NORMAL:32::LB
-"lb r<RT>, <OFFSET>(r<BASE>)"
-*mipsI,mipsII,mipsIII,mipsIV:
-*vr4100:
-*vr5000:
-*r3900:
-{
- GPR[RT] = EXTEND8 (do_load (SD_, AccessLength_BYTE, GPR[BASE], EXTEND16 (OFFSET)));
-}
-
-
-100100,5.BASE,5.RT,16.OFFSET:NORMAL:32::LBU
-"lbu r<RT>, <OFFSET>(r<BASE>)"
-*mipsI,mipsII,mipsIII,mipsIV:
-*vr4100:
-*vr5000:
-*r3900:
-{
- GPR[RT] = do_load (SD_, AccessLength_BYTE, GPR[BASE], EXTEND16 (OFFSET));
-}
-
-
-110111,5.BASE,5.RT,16.OFFSET:NORMAL:64::LD
-"ld r<RT>, <OFFSET>(r<BASE>)"
-*mipsIII:
-*mipsIV:
-*vr4100:
-*vr5000:
-{
- GPR[RT] = EXTEND64 (do_load (SD_, AccessLength_DOUBLEWORD, GPR[BASE], EXTEND16 (OFFSET)));
-}
-
-
-1101,ZZ!0!1!3,5.BASE,5.RT,16.OFFSET:NORMAL:64::LDCz
-"ldc<ZZ> r<RT>, <OFFSET>(r<BASE>)"
-*mipsII:
-*mipsIII:
-*mipsIV:
-*vr4100:
-*vr5000:
-*r3900:
-{
- COP_LD (ZZ, RT, do_load (SD_, AccessLength_DOUBLEWORD, GPR[BASE], EXTEND16 (OFFSET)));
-}
-
-
-
-
-011010,5.BASE,5.RT,16.OFFSET:NORMAL:64::LDL
-"ldl r<RT>, <OFFSET>(r<BASE>)"
-*mipsIII:
-*mipsIV:
-*vr4100:
-*vr5000:
-{
- GPR[RT] = do_load_left (SD_, AccessLength_DOUBLEWORD, GPR[BASE], EXTEND16 (OFFSET), GPR[RT]);
-}
-
-
-011011,5.BASE,5.RT,16.OFFSET:NORMAL:64::LDR
-"ldr r<RT>, <OFFSET>(r<BASE>)"
-*mipsIII:
-*mipsIV:
-*vr4100:
-*vr5000:
-{
- GPR[RT] = do_load_right (SD_, AccessLength_DOUBLEWORD, GPR[BASE], EXTEND16 (OFFSET), GPR[RT]);
-}
-
-
-100001,5.BASE,5.RT,16.OFFSET:NORMAL:32::LH
-"lh r<RT>, <OFFSET>(r<BASE>)"
-*mipsI,mipsII,mipsIII,mipsIV:
-*vr4100:
-*vr5000:
-*r3900:
-{
- GPR[RT] = EXTEND16 (do_load (SD_, AccessLength_HALFWORD, GPR[BASE], EXTEND16 (OFFSET)));
-}
-
-
-100101,5.BASE,5.RT,16.OFFSET:NORMAL:32::LHU
-"lhu r<RT>, <OFFSET>(r<BASE>)"
-*mipsI,mipsII,mipsIII,mipsIV:
-*vr4100:
-*vr5000:
-*r3900:
-{
- GPR[RT] = do_load (SD_, AccessLength_HALFWORD, GPR[BASE], EXTEND16 (OFFSET));
-}
-
-
-110000,5.BASE,5.RT,16.OFFSET:NORMAL:32::LL
-"ll r<RT>, <OFFSET>(r<BASE>)"
-*mipsII:
-*mipsIII:
-*mipsIV:
-*vr4100:
-*vr5000:
-{
- unsigned32 instruction = instruction_0;
- signed_word offset = SIGNEXTEND((signed_word)((instruction >> 0) & 0x0000FFFF),16);
- int destreg = ((instruction >> 16) & 0x0000001F);
- signed_word op1 = GPR[((instruction >> 21) & 0x0000001F)];
- {
- address_word vaddr = ((unsigned64)op1 + offset);
- address_word paddr;
- int uncached;
- if ((vaddr & 3) != 0)
- {
- SIM_CORE_SIGNAL (SD, CPU, cia, read_map, 4, vaddr, read_transfer, sim_core_unaligned_signal);
- }
- else
- {
- if (AddressTranslation(vaddr,isDATA,isLOAD,&paddr,&uncached,isTARGET,isREAL))
- {
- unsigned64 memval = 0;
- unsigned64 memval1 = 0;
- unsigned64 mask = 0x7;
- unsigned int shift = 2;
- unsigned int reverse = (ReverseEndian ? (mask >> shift) : 0);
- unsigned int bigend = (BigEndianCPU ? (mask >> shift) : 0);
- unsigned int byte;
- paddr = ((paddr & ~mask) | ((paddr & mask) ^ (reverse << shift)));
- LoadMemory(&memval,&memval1,uncached,AccessLength_WORD,paddr,vaddr,isDATA,isREAL);
- byte = ((vaddr & mask) ^ (bigend << shift));
- GPR[destreg] = (SIGNEXTEND(((memval >> (8 * byte)) & 0xFFFFFFFF),32));
- LLBIT = 1;
- }
- }
- }
-}
-
-
-110100,5.BASE,5.RT,16.OFFSET:NORMAL:64::LLD
-"lld r<RT>, <OFFSET>(r<BASE>)"
-*mipsIII:
-*mipsIV:
-*vr4100:
-*vr5000:
-{
- unsigned32 instruction = instruction_0;
- signed_word offset = SIGNEXTEND((signed_word)((instruction >> 0) & 0x0000FFFF),16);
- int destreg = ((instruction >> 16) & 0x0000001F);
- signed_word op1 = GPR[((instruction >> 21) & 0x0000001F)];
- {
- address_word vaddr = ((unsigned64)op1 + offset);
- address_word paddr;
- int uncached;
- if ((vaddr & 7) != 0)
- {
- SIM_CORE_SIGNAL (SD, CPU, cia, read_map, 8, vaddr, read_transfer, sim_core_unaligned_signal);
- }
- else
- {
- if (AddressTranslation(vaddr,isDATA,isLOAD,&paddr,&uncached,isTARGET,isREAL))
- {
- unsigned64 memval = 0;
- unsigned64 memval1 = 0;
- LoadMemory(&memval,&memval1,uncached,AccessLength_DOUBLEWORD,paddr,vaddr,isDATA,isREAL);
- GPR[destreg] = memval;
- LLBIT = 1;
- }
- }
- }
-}
-
-
-001111,00000,5.RT,16.IMMEDIATE:NORMAL:32::LUI
-"lui r<RT>, <IMMEDIATE>"
-*mipsI,mipsII,mipsIII,mipsIV:
-*vr4100:
-*vr5000:
-*r3900:
-{
- TRACE_ALU_INPUT1 (IMMEDIATE);
- GPR[RT] = EXTEND32 (IMMEDIATE << 16);
- TRACE_ALU_RESULT (GPR[RT]);
-}
-
-
-100011,5.BASE,5.RT,16.OFFSET:NORMAL:32::LW
-"lw r<RT>, <OFFSET>(r<BASE>)"
-*mipsI,mipsII,mipsIII,mipsIV:
-*vr4100:
-*vr5000:
-*r3900:
-{
- GPR[RT] = EXTEND32 (do_load (SD_, AccessLength_WORD, GPR[BASE], EXTEND16 (OFFSET)));
-}
-
-
-1100,ZZ!0!1!3,5.BASE,5.RT,16.OFFSET:NORMAL:32::LWCz
-"lwc<ZZ> r<RT>, <OFFSET>(r<BASE>)"
-*mipsI,mipsII,mipsIII,mipsIV:
-*vr4100:
-*vr5000:
-*r3900:
-{
- COP_LW (ZZ, RT, do_load (SD_, AccessLength_WORD, GPR[BASE], EXTEND16 (OFFSET)));
-}
-
-
-:function:::unsigned_word:do_load_left:unsigned access, address_word base, address_word offset, unsigned_word rt
-{
- address_word mask = (WITH_TARGET_WORD_BITSIZE == 64 ? 0x7 : 0x3);
- address_word reverseendian = (ReverseEndian ? -1 : 0);
- address_word bigendiancpu = (BigEndianCPU ? -1 : 0);
- unsigned int byte;
- unsigned int word;
- address_word paddr;
- int uncached;
- unsigned64 memval;
- address_word vaddr;
- int nr_lhs_bits;
- int nr_rhs_bits;
- unsigned_word lhs_mask;
- unsigned_word temp;
-
- vaddr = base + offset;
- AddressTranslation (vaddr, isDATA, isLOAD, &paddr, &uncached, isTARGET, isREAL);
- paddr = (paddr ^ (reverseendian & mask));
- if (BigEndianMem == 0)
- paddr = paddr & ~access;
-
- /* compute where within the word/mem we are */
- byte = ((vaddr ^ bigendiancpu) & access); /* 0..access */
- word = ((vaddr ^ bigendiancpu) & (mask & ~access)) / (access + 1); /* 0..1 */
- nr_lhs_bits = 8 * byte + 8;
- nr_rhs_bits = 8 * access - 8 * byte;
- /* nr_lhs_bits + nr_rhs_bits == 8 * (accesss + 1) */
-
- /* fprintf (stderr, "l[wd]l: 0x%08lx%08lx 0x%08lx%08lx %d:%d %d+%d\n",
- (long) ((unsigned64) vaddr >> 32), (long) vaddr,
- (long) ((unsigned64) paddr >> 32), (long) paddr,
- word, byte, nr_lhs_bits, nr_rhs_bits); */
-
- LoadMemory (&memval, NULL, uncached, byte, paddr, vaddr, isDATA, isREAL);
- if (word == 0)
- {
- /* GPR{31..32-NR_LHS_BITS} = memval{NR_LHS_BITS-1..0} */
- temp = (memval << nr_rhs_bits);
- }
- else
- {
- /* GPR{31..32-NR_LHS_BITS = memval{32+NR_LHS_BITS..32} */
- temp = (memval >> nr_lhs_bits);
- }
- lhs_mask = LSMASK (nr_lhs_bits + nr_rhs_bits - 1, nr_rhs_bits);
- rt = (rt & ~lhs_mask) | (temp & lhs_mask);
-
- /* fprintf (stderr, "l[wd]l: 0x%08lx%08lx -> 0x%08lx%08lx & 0x%08lx%08lx -> 0x%08lx%08lx\n",
- (long) ((unsigned64) memval >> 32), (long) memval,
- (long) ((unsigned64) temp >> 32), (long) temp,
- (long) ((unsigned64) lhs_mask >> 32), (long) lhs_mask,
- (long) (rt >> 32), (long) rt); */
- return rt;
-}
-
-
-100010,5.BASE,5.RT,16.OFFSET:NORMAL:32::LWL
-"lwl r<RT>, <OFFSET>(r<BASE>)"
-*mipsI,mipsII,mipsIII,mipsIV:
-*vr4100:
-*vr5000:
-*r3900:
-{
- GPR[RT] = EXTEND32 (do_load_left (SD_, AccessLength_WORD, GPR[BASE], EXTEND16 (OFFSET), GPR[RT]));
-}
-
-
-:function:::unsigned_word:do_load_right:unsigned access, address_word base, address_word offset, unsigned_word rt
-{
- address_word mask = (WITH_TARGET_WORD_BITSIZE == 64 ? 0x7 : 0x3);
- address_word reverseendian = (ReverseEndian ? -1 : 0);
- address_word bigendiancpu = (BigEndianCPU ? -1 : 0);
- unsigned int byte;
- address_word paddr;
- int uncached;
- unsigned64 memval;
- address_word vaddr;
-
- vaddr = base + offset;
- AddressTranslation (vaddr, isDATA, isLOAD, &paddr, &uncached, isTARGET, isREAL);
- /* NOTE: SPEC is wrong, has `BigEndianMem == 0' not `BigEndianMem != 0' */
- paddr = (paddr ^ (reverseendian & mask));
- if (BigEndianMem != 0)
- paddr = paddr & ~access;
- byte = ((vaddr & mask) ^ (bigendiancpu & mask));
- /* NOTE: SPEC is wrong, had `byte' not `access - byte'. See SW. */
- LoadMemory (&memval, NULL, uncached, access - (access & byte), paddr, vaddr, isDATA, isREAL);
- /* printf ("lr: 0x%08lx %d@0x%08lx 0x%08lx\n",
- (long) paddr, byte, (long) paddr, (long) memval); */
- {
- unsigned_word screen = LSMASK (8 * (access - (byte & access) + 1) - 1, 0);
- rt &= ~screen;
- rt |= (memval >> (8 * byte)) & screen;
- }
- return rt;
-}
-
-
-100110,5.BASE,5.RT,16.OFFSET:NORMAL:32::LWR
-"lwr r<RT>, <OFFSET>(r<BASE>)"
-*mipsI,mipsII,mipsIII,mipsIV:
-*vr4100:
-*vr5000:
-*r3900:
-{
- GPR[RT] = EXTEND32 (do_load_right (SD_, AccessLength_WORD, GPR[BASE], EXTEND16 (OFFSET), GPR[RT]));
-}
-
-
-100111,5.BASE,5.RT,16.OFFSET:NORMAL:32::LWU
-"lwu r<RT>, <OFFSET>(r<BASE>)"
-*mipsIII:
-*mipsIV:
-*vr4100:
-*vr5000:
-{
- GPR[RT] = do_load (SD_, AccessLength_WORD, GPR[BASE], EXTEND16 (OFFSET));
-}
-
-
-:function:::void:do_mfhi:int rd
-{
- check_mf_hilo (SD_, HIHISTORY, LOHISTORY);
- TRACE_ALU_INPUT1 (HI);
- GPR[rd] = HI;
- TRACE_ALU_RESULT (GPR[rd]);
-}
-
-000000,0000000000,5.RD,00000,010000:SPECIAL:32::MFHI
-"mfhi r<RD>"
-*mipsI,mipsII,mipsIII,mipsIV:
-*vr4100:
-*vr5000:
-*r3900:
-{
- do_mfhi (SD_, RD);
-}
-
-
-
-:function:::void:do_mflo:int rd
-{
- check_mf_hilo (SD_, LOHISTORY, HIHISTORY);
- TRACE_ALU_INPUT1 (LO);
- GPR[rd] = LO;
- TRACE_ALU_RESULT (GPR[rd]);
-}
-
-000000,0000000000,5.RD,00000,010010:SPECIAL:32::MFLO
-"mflo r<RD>"
-*mipsI,mipsII,mipsIII,mipsIV:
-*vr4100:
-*vr5000:
-*r3900:
-{
- do_mflo (SD_, RD);
-}
-
-
-
-000000,5.RS,5.RT,5.RD,00000001011:SPECIAL:32::MOVN
-"movn r<RD>, r<RS>, r<RT>"
-*mipsIV:
-*vr5000:
-{
- if (GPR[RT] != 0)
- GPR[RD] = GPR[RS];
-}
-
-
-
-000000,5.RS,5.RT,5.RD,00000001010:SPECIAL:32::MOVZ
-"movz r<RD>, r<RS>, r<RT>"
-*mipsIV:
-*vr5000:
-{
- if (GPR[RT] == 0)
- GPR[RD] = GPR[RS];
-}
-
-
-
-000000,5.RS,000000000000000,010001:SPECIAL:32::MTHI
-"mthi r<RS>"
-*mipsI,mipsII,mipsIII,mipsIV:
-*vr4100:
-*vr5000:
-*r3900:
-{
- check_mt_hilo (SD_, HIHISTORY);
- HI = GPR[RS];
-}
-
-
-
-000000,5.RS,000000000000000010011:SPECIAL:32::MTLO
-"mtlo r<RS>"
-*mipsI,mipsII,mipsIII,mipsIV:
-*vr4100:
-*vr5000:
-*r3900:
-{
- check_mt_hilo (SD_, LOHISTORY);
- LO = GPR[RS];
-}
-
-
-
-:function:::void:do_mult:int rs, int rt, int rd
-{
- signed64 prod;
- check_mult_hilo (SD_, HIHISTORY, LOHISTORY);
- TRACE_ALU_INPUT2 (GPR[rs], GPR[rt]);
- prod = (((signed64)(signed32) GPR[rs])
- * ((signed64)(signed32) GPR[rt]));
- LO = EXTEND32 (VL4_8 (prod));
- HI = EXTEND32 (VH4_8 (prod));
- if (rd != 0)
- GPR[rd] = LO;
- TRACE_ALU_RESULT2 (HI, LO);
-}
-
-000000,5.RS,5.RT,00000,00000011000:SPECIAL:32::MULT
-"mult r<RS>, r<RT>"
-*mipsI,mipsII,mipsIII,mipsIV:
-*vr4100:
-{
- do_mult (SD_, RS, RT, 0);
-}
-
-
-000000,5.RS,5.RT,5.RD,00000011000:SPECIAL:32::MULT
-"mult r<RS>, r<RT>":RD == 0
-"mult r<RD>, r<RS>, r<RT>"
-*vr5000:
-*r3900:
-{
- do_mult (SD_, RS, RT, RD);
-}
-
-
-:function:::void:do_multu:int rs, int rt, int rd
-{
- unsigned64 prod;
- check_mult_hilo (SD_, HIHISTORY, LOHISTORY);
- TRACE_ALU_INPUT2 (GPR[rs], GPR[rt]);
- prod = (((unsigned64)(unsigned32) GPR[rs])
- * ((unsigned64)(unsigned32) GPR[rt]));
- LO = EXTEND32 (VL4_8 (prod));
- HI = EXTEND32 (VH4_8 (prod));
- if (rd != 0)
- GPR[rd] = LO;
- TRACE_ALU_RESULT2 (HI, LO);
-}
-
-000000,5.RS,5.RT,00000,00000011001:SPECIAL:32::MULTU
-"multu r<RS>, r<RT>"
-*mipsI,mipsII,mipsIII,mipsIV:
-*vr4100:
-{
- do_multu (SD_, RS, RT, 0);
-}
-
-000000,5.RS,5.RT,5.RD,00000011001:SPECIAL:32::MULTU
-"multu r<RS>, r<RT>":RD == 0
-"multu r<RD>, r<RS>, r<RT>"
-*vr5000:
-*r3900:
-{
- do_multu (SD_, RS, RT, RD);
-}
-
-
-:function:::void:do_nor:int rs, int rt, int rd
-{
- TRACE_ALU_INPUT2 (GPR[rs], GPR[rt]);
- GPR[rd] = ~ (GPR[rs] | GPR[rt]);
- TRACE_ALU_RESULT (GPR[rd]);
-}
-
-000000,5.RS,5.RT,5.RD,00000,100111:SPECIAL:32::NOR
-"nor r<RD>, r<RS>, r<RT>"
-*mipsI,mipsII,mipsIII,mipsIV:
-*vr4100:
-*vr5000:
-*r3900:
-{
- do_nor (SD_, RS, RT, RD);
-}
-
-
-:function:::void:do_or:int rs, int rt, int rd
-{
- TRACE_ALU_INPUT2 (GPR[rs], GPR[rt]);
- GPR[rd] = (GPR[rs] | GPR[rt]);
- TRACE_ALU_RESULT (GPR[rd]);
-}
-
-000000,5.RS,5.RT,5.RD,00000,100101:SPECIAL:32::OR
-"or r<RD>, r<RS>, r<RT>"
-*mipsI,mipsII,mipsIII,mipsIV:
-*vr4100:
-*vr5000:
-*r3900:
-{
- do_or (SD_, RS, RT, RD);
-}
-
-
-
-:function:::void:do_ori:int rs, int rt, unsigned immediate
-{
- TRACE_ALU_INPUT2 (GPR[rs], immediate);
- GPR[rt] = (GPR[rs] | immediate);
- TRACE_ALU_RESULT (GPR[rt]);
-}
-
-001101,5.RS,5.RT,16.IMMEDIATE:NORMAL:32::ORI
-"ori r<RT>, r<RS>, <IMMEDIATE>"
-*mipsI,mipsII,mipsIII,mipsIV:
-*vr4100:
-*vr5000:
-*r3900:
-{
- do_ori (SD_, RS, RT, IMMEDIATE);
-}
-
-
-110011,5.RS,nnnnn,16.OFFSET:NORMAL:32::PREF
-*mipsIV:
-*vr5000:
-{
- unsigned32 instruction = instruction_0;
- signed_word offset = SIGNEXTEND((signed_word)((instruction >> 0) & 0x0000FFFF),16);
- int hint = ((instruction >> 16) & 0x0000001F);
- signed_word op1 = GPR[((instruction >> 21) & 0x0000001F)];
- {
- address_word vaddr = ((unsigned64)op1 + offset);
- address_word paddr;
- int uncached;
- {
- if (AddressTranslation(vaddr,isDATA,isLOAD,&paddr,&uncached,isTARGET,isREAL))
- Prefetch(uncached,paddr,vaddr,isDATA,hint);
- }
- }
-}
-
-:function:::void:do_store:unsigned access, address_word base, address_word offset, unsigned_word word
-{
- address_word mask = (WITH_TARGET_WORD_BITSIZE == 64 ? 0x7 : 0x3);
- address_word reverseendian = (ReverseEndian ? (mask ^ access) : 0);
- address_word bigendiancpu = (BigEndianCPU ? (mask ^ access) : 0);
- unsigned int byte;
- address_word paddr;
- int uncached;
- unsigned64 memval;
- address_word vaddr;
-
- vaddr = base + offset;
- if ((vaddr & access) != 0)
- {
- SIM_CORE_SIGNAL (SD, STATE_CPU(SD, 0), cia, read_map, access+1, vaddr, write_transfer, sim_core_unaligned_signal);
- }
- AddressTranslation (vaddr, isDATA, isSTORE, &paddr, &uncached, isTARGET, isREAL);
- paddr = ((paddr & ~mask) | ((paddr & mask) ^ reverseendian));
- byte = ((vaddr & mask) ^ bigendiancpu);
- memval = (word << (8 * byte));
- StoreMemory (uncached, access, memval, 0, paddr, vaddr, isREAL);
-}
-
-
-101000,5.BASE,5.RT,16.OFFSET:NORMAL:32::SB
-"sb r<RT>, <OFFSET>(r<BASE>)"
-*mipsI,mipsII,mipsIII,mipsIV:
-*vr4100:
-*vr5000:
-*r3900:
-{
- do_store (SD_, AccessLength_BYTE, GPR[BASE], EXTEND16 (OFFSET), GPR[RT]);
-}
-
-
-111000,5.BASE,5.RT,16.OFFSET:NORMAL:32::SC
-"sc r<RT>, <OFFSET>(r<BASE>)"
-*mipsII:
-*mipsIII:
-*mipsIV:
-*vr4100:
-*vr5000:
-{
- unsigned32 instruction = instruction_0;
- signed_word offset = SIGNEXTEND((signed_word)((instruction >> 0) & 0x0000FFFF),16);
- signed_word op2 = GPR[((instruction >> 16) & 0x0000001F)];
- signed_word op1 = GPR[((instruction >> 21) & 0x0000001F)];
- {
- address_word vaddr = ((unsigned64)op1 + offset);
- address_word paddr;
- int uncached;
- if ((vaddr & 3) != 0)
- {
- SIM_CORE_SIGNAL (SD, CPU, cia, read_map, 4, vaddr, write_transfer, sim_core_unaligned_signal);
- }
- else
- {
- if (AddressTranslation(vaddr,isDATA,isSTORE,&paddr,&uncached,isTARGET,isREAL))
- {
- unsigned64 memval = 0;
- unsigned64 memval1 = 0;
- unsigned64 mask = 0x7;
- unsigned int byte;
- paddr = ((paddr & ~mask) | ((paddr & mask) ^ (ReverseEndian << 2)));
- byte = ((vaddr & mask) ^ (BigEndianCPU << 2));
- memval = ((unsigned64) op2 << (8 * byte));
- if (LLBIT)
- {
- StoreMemory(uncached,AccessLength_WORD,memval,memval1,paddr,vaddr,isREAL);
- }
- GPR[(instruction >> 16) & 0x0000001F] = LLBIT;
- }
- }
- }
-}
-
-
-111100,5.BASE,5.RT,16.OFFSET:NORMAL:64::SCD
-"scd r<RT>, <OFFSET>(r<BASE>)"
-*mipsIII:
-*mipsIV:
-*vr4100:
-*vr5000:
-{
- unsigned32 instruction = instruction_0;
- signed_word offset = SIGNEXTEND((signed_word)((instruction >> 0) & 0x0000FFFF),16);
- signed_word op2 = GPR[((instruction >> 16) & 0x0000001F)];
- signed_word op1 = GPR[((instruction >> 21) & 0x0000001F)];
- {
- address_word vaddr = ((unsigned64)op1 + offset);
- address_word paddr;
- int uncached;
- if ((vaddr & 7) != 0)
- {
- SIM_CORE_SIGNAL (SD, CPU, cia, read_map, 8, vaddr, write_transfer, sim_core_unaligned_signal);
- }
- else
- {
- if (AddressTranslation(vaddr,isDATA,isSTORE,&paddr,&uncached,isTARGET,isREAL))
- {
- unsigned64 memval = 0;
- unsigned64 memval1 = 0;
- memval = op2;
- if (LLBIT)
- {
- StoreMemory(uncached,AccessLength_DOUBLEWORD,memval,memval1,paddr,vaddr,isREAL);
- }
- GPR[(instruction >> 16) & 0x0000001F] = LLBIT;
- }
- }
- }
-}
-
-
-111111,5.BASE,5.RT,16.OFFSET:NORMAL:64::SD
-"sd r<RT>, <OFFSET>(r<BASE>)"
-*mipsIII:
-*mipsIV:
-*vr4100:
-*vr5000:
-{
- do_store (SD_, AccessLength_DOUBLEWORD, GPR[BASE], EXTEND16 (OFFSET), GPR[RT]);
-}
-
-
-1111,ZZ!0!1!3,5.BASE,5.RT,16.OFFSET:NORMAL:64::SDCz
-"sdc<ZZ> r<RT>, <OFFSET>(r<BASE>)"
-*mipsII:
-*mipsIII:
-*mipsIV:
-*vr4100:
-*vr5000:
-{
- do_store (SD_, AccessLength_DOUBLEWORD, GPR[BASE], EXTEND16 (OFFSET), COP_SD (ZZ, RT));
-}
-
-
-101100,5.BASE,5.RT,16.OFFSET:NORMAL:64::SDL
-"sdl r<RT>, <OFFSET>(r<BASE>)"
-*mipsIII:
-*mipsIV:
-*vr4100:
-*vr5000:
-{
- do_store_left (SD_, AccessLength_DOUBLEWORD, GPR[BASE], EXTEND16 (OFFSET), GPR[RT]);
-}
-
-
-101101,5.BASE,5.RT,16.OFFSET:NORMAL:64::SDR
-"sdr r<RT>, <OFFSET>(r<BASE>)"
-*mipsIII:
-*mipsIV:
-*vr4100:
-*vr5000:
-{
- do_store_right (SD_, AccessLength_DOUBLEWORD, GPR[BASE], EXTEND16 (OFFSET), GPR[RT]);
-}
-
-
-101001,5.BASE,5.RT,16.OFFSET:NORMAL:32::SH
-"sh r<RT>, <OFFSET>(r<BASE>)"
-*mipsI,mipsII,mipsIII,mipsIV:
-*vr4100:
-*vr5000:
-*r3900:
-{
- do_store (SD_, AccessLength_HALFWORD, GPR[BASE], EXTEND16 (OFFSET), GPR[RT]);
-}
-
-
-:function:::void:do_sll:int rt, int rd, int shift
-{
- unsigned32 temp = (GPR[rt] << shift);
- TRACE_ALU_INPUT2 (GPR[rt], shift);
- GPR[rd] = EXTEND32 (temp);
- TRACE_ALU_RESULT (GPR[rd]);
-}
-
-00000000000,5.RT,5.RD,5.SHIFT,000000:SPECIAL:32::SLL
-"sll r<RD>, r<RT>, <SHIFT>"
-*mipsI,mipsII,mipsIII,mipsIV:
-*vr4100:
-*vr5000:
-*r3900:
-{
- do_sll (SD_, RT, RD, SHIFT);
-}
-
-
-:function:::void:do_sllv:int rs, int rt, int rd
-{
- int s = MASKED (GPR[rs], 4, 0);
- unsigned32 temp = (GPR[rt] << s);
- TRACE_ALU_INPUT2 (GPR[rt], s);
- GPR[rd] = EXTEND32 (temp);
- TRACE_ALU_RESULT (GPR[rd]);
-}
-
-000000,5.RS,5.RT,5.RD,00000000100:SPECIAL:32::SLLV
-"sllv r<RD>, r<RT>, r<RS>"
-*mipsI,mipsII,mipsIII,mipsIV:
-*vr4100:
-*vr5000:
-*r3900:
-{
- do_sllv (SD_, RS, RT, RD);
-}
-
-
-:function:::void:do_slt:int rs, int rt, int rd
-{
- TRACE_ALU_INPUT2 (GPR[rs], GPR[rt]);
- GPR[rd] = ((signed_word) GPR[rs] < (signed_word) GPR[rt]);
- TRACE_ALU_RESULT (GPR[rd]);
-}
-
-000000,5.RS,5.RT,5.RD,00000101010:SPECIAL:32::SLT
-"slt r<RD>, r<RS>, r<RT>"
-*mipsI,mipsII,mipsIII,mipsIV:
-*vr4100:
-*vr5000:
-*r3900:
-{
- do_slt (SD_, RS, RT, RD);
-}
-
-
-:function:::void:do_slti:int rs, int rt, unsigned16 immediate
-{
- TRACE_ALU_INPUT2 (GPR[rs], EXTEND16 (immediate));
- GPR[rt] = ((signed_word) GPR[rs] < (signed_word) EXTEND16 (immediate));
- TRACE_ALU_RESULT (GPR[rt]);
-}
-
-001010,5.RS,5.RT,16.IMMEDIATE:NORMAL:32::SLTI
-"slti r<RT>, r<RS>, <IMMEDIATE>"
-*mipsI,mipsII,mipsIII,mipsIV:
-*vr4100:
-*vr5000:
-*r3900:
-{
- do_slti (SD_, RS, RT, IMMEDIATE);
-}
-
-
-:function:::void:do_sltiu:int rs, int rt, unsigned16 immediate
-{
- TRACE_ALU_INPUT2 (GPR[rs], EXTEND16 (immediate));
- GPR[rt] = ((unsigned_word) GPR[rs] < (unsigned_word) EXTEND16 (immediate));
- TRACE_ALU_RESULT (GPR[rt]);
-}
-
-001011,5.RS,5.RT,16.IMMEDIATE:NORMAL:32::SLTIU
-"sltiu r<RT>, r<RS>, <IMMEDIATE>"
-*mipsI,mipsII,mipsIII,mipsIV:
-*vr4100:
-*vr5000:
-*r3900:
-{
- do_sltiu (SD_, RS, RT, IMMEDIATE);
-}
-
-
-
-:function:::void:do_sltu:int rs, int rt, int rd
-{
- TRACE_ALU_INPUT2 (GPR[rs], GPR[rt]);
- GPR[rd] = ((unsigned_word) GPR[rs] < (unsigned_word) GPR[rt]);
- TRACE_ALU_RESULT (GPR[rd]);
-}
-
-000000,5.RS,5.RT,5.RD,00000101011:SPECIAL:32::SLTU
-"sltu r<RD>, r<RS>, r<RT>"
-*mipsI,mipsII,mipsIII,mipsIV:
-*vr4100:
-*vr5000:
-*r3900:
-{
- do_sltu (SD_, RS, RT, RD);
-}
-
-
-:function:::void:do_sra:int rt, int rd, int shift
-{
- signed32 temp = (signed32) GPR[rt] >> shift;
- TRACE_ALU_INPUT2 (GPR[rt], shift);
- GPR[rd] = EXTEND32 (temp);
- TRACE_ALU_RESULT (GPR[rd]);
-}
-
-000000,00000,5.RT,5.RD,5.SHIFT,000011:SPECIAL:32::SRA
-"sra r<RD>, r<RT>, <SHIFT>"
-*mipsI,mipsII,mipsIII,mipsIV:
-*vr4100:
-*vr5000:
-*r3900:
-{
- do_sra (SD_, RT, RD, SHIFT);
-}
-
-
-
-:function:::void:do_srav:int rs, int rt, int rd
-{
- int s = MASKED (GPR[rs], 4, 0);
- signed32 temp = (signed32) GPR[rt] >> s;
- TRACE_ALU_INPUT2 (GPR[rt], s);
- GPR[rd] = EXTEND32 (temp);
- TRACE_ALU_RESULT (GPR[rd]);
-}
-
-000000,5.RS,5.RT,5.RD,00000000111:SPECIAL:32::SRAV
-"srav r<RD>, r<RT>, r<RS>"
-*mipsI,mipsII,mipsIII,mipsIV:
-*vr4100:
-*vr5000:
-*r3900:
-{
- do_srav (SD_, RS, RT, RD);
-}
-
-
-
-:function:::void:do_srl:int rt, int rd, int shift
-{
- unsigned32 temp = (unsigned32) GPR[rt] >> shift;
- TRACE_ALU_INPUT2 (GPR[rt], shift);
- GPR[rd] = EXTEND32 (temp);
- TRACE_ALU_RESULT (GPR[rd]);
-}
-
-000000,00000,5.RT,5.RD,5.SHIFT,000010:SPECIAL:32::SRL
-"srl r<RD>, r<RT>, <SHIFT>"
-*mipsI,mipsII,mipsIII,mipsIV:
-*vr4100:
-*vr5000:
-*r3900:
-{
- do_srl (SD_, RT, RD, SHIFT);
-}
-
-
-:function:::void:do_srlv:int rs, int rt, int rd
-{
- int s = MASKED (GPR[rs], 4, 0);
- unsigned32 temp = (unsigned32) GPR[rt] >> s;
- TRACE_ALU_INPUT2 (GPR[rt], s);
- GPR[rd] = EXTEND32 (temp);
- TRACE_ALU_RESULT (GPR[rd]);
-}
-
-000000,5.RS,5.RT,5.RD,00000000110:SPECIAL:32::SRLV
-"srlv r<RD>, r<RT>, r<RS>"
-*mipsI,mipsII,mipsIII,mipsIV:
-*vr4100:
-*vr5000:
-*r3900:
-{
- do_srlv (SD_, RS, RT, RD);
-}
-
-
-000000,5.RS,5.RT,5.RD,00000100010:SPECIAL:32::SUB
-"sub r<RD>, r<RS>, r<RT>"
-*mipsI,mipsII,mipsIII,mipsIV:
-*vr4100:
-*vr5000:
-*r3900:
-{
- TRACE_ALU_INPUT2 (GPR[RS], GPR[RT]);
- {
- ALU32_BEGIN (GPR[RS]);
- ALU32_SUB (GPR[RT]);
- ALU32_END (GPR[RD]);
- }
- TRACE_ALU_RESULT (GPR[RD]);
-}
-
-
-:function:::void:do_subu:int rs, int rt, int rd
-{
- TRACE_ALU_INPUT2 (GPR[rs], GPR[rt]);
- GPR[rd] = EXTEND32 (GPR[rs] - GPR[rt]);
- TRACE_ALU_RESULT (GPR[rd]);
-}
-
-000000,5.RS,5.RT,5.RD,00000100011:SPECIAL:32::SUBU
-"subu r<RD>, r<RS>, r<RT>"
-*mipsI,mipsII,mipsIII,mipsIV:
-*vr4100:
-*vr5000:
-*r3900:
-{
- do_subu (SD_, RS, RT, RD);
-}
-
-
-101011,5.BASE,5.RT,16.OFFSET:NORMAL:32::SW
-"sw r<RT>, <OFFSET>(r<BASE>)"
-*mipsI,mipsII,mipsIII,mipsIV:
-*vr4100:
-*r3900:
-*vr5000:
-{
- do_store (SD_, AccessLength_WORD, GPR[BASE], EXTEND16 (OFFSET), GPR[RT]);
-}
-
-
-1110,ZZ!0!1!3,5.BASE,5.RT,16.OFFSET:NORMAL:32::SWCz
-"swc<ZZ> r<RT>, <OFFSET>(r<BASE>)"
-*mipsI,mipsII,mipsIII,mipsIV:
-*vr4100:
-*vr5000:
-*r3900:
-{
- do_store (SD_, AccessLength_WORD, GPR[BASE], EXTEND16 (OFFSET), COP_SW (ZZ, RT));
-}
-
-
-
-:function:::void:do_store_left:unsigned access, address_word base, address_word offset, unsigned_word rt
-{
- address_word mask = (WITH_TARGET_WORD_BITSIZE == 64 ? 0x7 : 0x3);
- address_word reverseendian = (ReverseEndian ? -1 : 0);
- address_word bigendiancpu = (BigEndianCPU ? -1 : 0);
- unsigned int byte;
- unsigned int word;
- address_word paddr;
- int uncached;
- unsigned64 memval;
- address_word vaddr;
- int nr_lhs_bits;
- int nr_rhs_bits;
-
- vaddr = base + offset;
- AddressTranslation (vaddr, isDATA, isSTORE, &paddr, &uncached, isTARGET, isREAL);
- paddr = (paddr ^ (reverseendian & mask));
- if (BigEndianMem == 0)
- paddr = paddr & ~access;
-
- /* compute where within the word/mem we are */
- byte = ((vaddr ^ bigendiancpu) & access); /* 0..access */
- word = ((vaddr ^ bigendiancpu) & (mask & ~access)) / (access + 1); /* 0..1 */
- nr_lhs_bits = 8 * byte + 8;
- nr_rhs_bits = 8 * access - 8 * byte;
- /* nr_lhs_bits + nr_rhs_bits == 8 * (accesss + 1) */
- /* fprintf (stderr, "s[wd]l: 0x%08lx%08lx 0x%08lx%08lx %d:%d %d+%d\n",
- (long) ((unsigned64) vaddr >> 32), (long) vaddr,
- (long) ((unsigned64) paddr >> 32), (long) paddr,
- word, byte, nr_lhs_bits, nr_rhs_bits); */
-
- if (word == 0)
- {
- memval = (rt >> nr_rhs_bits);
- }
- else
- {
- memval = (rt << nr_lhs_bits);
- }
- /* fprintf (stderr, "s[wd]l: 0x%08lx%08lx -> 0x%08lx%08lx\n",
- (long) ((unsigned64) rt >> 32), (long) rt,
- (long) ((unsigned64) memval >> 32), (long) memval); */
- StoreMemory (uncached, byte, memval, 0, paddr, vaddr, isREAL);
-}
-
-
-101010,5.BASE,5.RT,16.OFFSET:NORMAL:32::SWL
-"swl r<RT>, <OFFSET>(r<BASE>)"
-*mipsI,mipsII,mipsIII,mipsIV:
-*vr4100:
-*vr5000:
-*r3900:
-{
- do_store_left (SD_, AccessLength_WORD, GPR[BASE], EXTEND16 (OFFSET), GPR[RT]);
-}
-
-
-:function:::void:do_store_right:unsigned access, address_word base, address_word offset, unsigned_word rt
-{
- address_word mask = (WITH_TARGET_WORD_BITSIZE == 64 ? 0x7 : 0x3);
- address_word reverseendian = (ReverseEndian ? -1 : 0);
- address_word bigendiancpu = (BigEndianCPU ? -1 : 0);
- unsigned int byte;
- address_word paddr;
- int uncached;
- unsigned64 memval;
- address_word vaddr;
-
- vaddr = base + offset;
- AddressTranslation (vaddr, isDATA, isSTORE, &paddr, &uncached, isTARGET, isREAL);
- paddr = (paddr ^ (reverseendian & mask));
- if (BigEndianMem != 0)
- paddr &= ~access;
- byte = ((vaddr & mask) ^ (bigendiancpu & mask));
- memval = (rt << (byte * 8));
- StoreMemory (uncached, access - (access & byte), memval, 0, paddr, vaddr, isREAL);
-}
-
-101110,5.BASE,5.RT,16.OFFSET:NORMAL:32::SWR
-"swr r<RT>, <OFFSET>(r<BASE>)"
-*mipsI,mipsII,mipsIII,mipsIV:
-*vr4100:
-*vr5000:
-*r3900:
-{
- do_store_right (SD_, AccessLength_WORD, GPR[BASE], EXTEND16 (OFFSET), GPR[RT]);
-}
-
-
-000000000000000000000,5.STYPE,001111:SPECIAL:32::SYNC
-"sync":STYPE == 0
-"sync <STYPE>"
-*mipsII:
-*mipsIII:
-*mipsIV:
-*vr4100:
-*vr5000:
-*r3900:
-{
- SyncOperation (STYPE);
-}
-
-
-000000,20.CODE,001100:SPECIAL:32::SYSCALL
-"syscall <CODE>"
-*mipsI,mipsII,mipsIII,mipsIV:
-*vr4100:
-*vr5000:
-*r3900:
-{
- SignalException(SystemCall, instruction_0);
-}
-
-
-000000,5.RS,5.RT,10.CODE,110100:SPECIAL:32::TEQ
-"teq r<RS>, r<RT>"
-*mipsII:
-*mipsIII:
-*mipsIV:
-*vr4100:
-*vr5000:
-{
- if ((signed_word) GPR[RS] == (signed_word) GPR[RT])
- SignalException(Trap, instruction_0);
-}
-
-
-000001,5.RS,01100,16.IMMEDIATE:REGIMM:32::TEQI
-"teqi r<RS>, <IMMEDIATE>"
-*mipsII:
-*mipsIII:
-*mipsIV:
-*vr4100:
-*vr5000:
-{
- if ((signed_word) GPR[RS] == (signed_word) EXTEND16 (IMMEDIATE))
- SignalException(Trap, instruction_0);
-}
-
-
-000000,5.RS,5.RT,10.CODE,110000:SPECIAL:32::TGE
-"tge r<RS>, r<RT>"
-*mipsII:
-*mipsIII:
-*mipsIV:
-*vr4100:
-*vr5000:
-{
- if ((signed_word) GPR[RS] >= (signed_word) GPR[RT])
- SignalException(Trap, instruction_0);
-}
-
-
-000001,5.RS,01000,16.IMMEDIATE:REGIMM:32::TGEI
-"tgei r<RS>, <IMMEDIATE>"
-*mipsII:
-*mipsIII:
-*mipsIV:
-*vr4100:
-*vr5000:
-{
- if ((signed_word) GPR[RS] >= (signed_word) EXTEND16 (IMMEDIATE))
- SignalException(Trap, instruction_0);
-}
-
-
-000001,5.RS,01001,16.IMMEDIATE:REGIMM:32::TGEIU
-"tgeiu r<RS>, <IMMEDIATE>"
-*mipsII:
-*mipsIII:
-*mipsIV:
-*vr4100:
-*vr5000:
-{
- if ((unsigned_word) GPR[RS] >= (unsigned_word) EXTEND16 (IMMEDIATE))
- SignalException(Trap, instruction_0);
-}
-
-
-000000,5.RS,5.RT,10.CODE,110001:SPECIAL:32::TGEU
-"tgeu r<RS>, r<RT>"
-*mipsII:
-*mipsIII:
-*mipsIV:
-*vr4100:
-*vr5000:
-{
- if ((unsigned_word) GPR[RS] >= (unsigned_word) GPR[RT])
- SignalException(Trap, instruction_0);
-}
-
-
-000000,5.RS,5.RT,10.CODE,110010:SPECIAL:32::TLT
-"tlt r<RS>, r<RT>"
-*mipsII:
-*mipsIII:
-*mipsIV:
-*vr4100:
-*vr5000:
-{
- if ((signed_word) GPR[RS] < (signed_word) GPR[RT])
- SignalException(Trap, instruction_0);
-}
-
-
-000001,5.RS,01010,16.IMMEDIATE:REGIMM:32::TLTI
-"tlti r<RS>, <IMMEDIATE>"
-*mipsII:
-*mipsIII:
-*mipsIV:
-*vr4100:
-*vr5000:
-{
- if ((signed_word) GPR[RS] < (signed_word) EXTEND16 (IMMEDIATE))
- SignalException(Trap, instruction_0);
-}
-
-
-000001,5.RS,01011,16.IMMEDIATE:REGIMM:32::TLTIU
-"tltiu r<RS>, <IMMEDIATE>"
-*mipsII:
-*mipsIII:
-*mipsIV:
-*vr4100:
-*vr5000:
-{
- if ((unsigned_word) GPR[RS] < (unsigned_word) EXTEND16 (IMMEDIATE))
- SignalException(Trap, instruction_0);
-}
-
-
-000000,5.RS,5.RT,10.CODE,110011:SPECIAL:32::TLTU
-"tltu r<RS>, r<RT>"
-*mipsII:
-*mipsIII:
-*mipsIV:
-*vr4100:
-*vr5000:
-{
- if ((unsigned_word) GPR[RS] < (unsigned_word) GPR[RT])
- SignalException(Trap, instruction_0);
-}
-
-
-000000,5.RS,5.RT,10.CODE,110110:SPECIAL:32::TNE
-"tne r<RS>, r<RT>"
-*mipsII:
-*mipsIII:
-*mipsIV:
-*vr4100:
-*vr5000:
-{
- if ((signed_word) GPR[RS] != (signed_word) GPR[RT])
- SignalException(Trap, instruction_0);
-}
-
-
-000001,5.RS,01110,16.IMMEDIATE:REGIMM:32::TNEI
-"tne r<RS>, <IMMEDIATE>"
-*mipsII:
-*mipsIII:
-*mipsIV:
-*vr4100:
-*vr5000:
-{
- if ((signed_word) GPR[RS] != (signed_word) EXTEND16 (IMMEDIATE))
- SignalException(Trap, instruction_0);
-}
-
-
-:function:::void:do_xor:int rs, int rt, int rd
-{
- TRACE_ALU_INPUT2 (GPR[rs], GPR[rt]);
- GPR[rd] = GPR[rs] ^ GPR[rt];
- TRACE_ALU_RESULT (GPR[rd]);
-}
-
-000000,5.RS,5.RT,5.RD,00000100110:SPECIAL:32::XOR
-"xor r<RD>, r<RS>, r<RT>"
-*mipsI,mipsII,mipsIII,mipsIV:
-*vr4100:
-*vr5000:
-*r3900:
-{
- do_xor (SD_, RS, RT, RD);
-}
-
-
-:function:::void:do_xori:int rs, int rt, unsigned16 immediate
-{
- TRACE_ALU_INPUT2 (GPR[rs], immediate);
- GPR[rt] = GPR[rs] ^ immediate;
- TRACE_ALU_RESULT (GPR[rt]);
-}
-
-001110,5.RS,5.RT,16.IMMEDIATE:NORMAL:32::XORI
-"xori r<RT>, r<RS>, <IMMEDIATE>"
-*mipsI,mipsII,mipsIII,mipsIV:
-*vr4100:
-*vr5000:
-*r3900:
-{
- do_xori (SD_, RS, RT, IMMEDIATE);
-}
-
-
-//
-// MIPS Architecture:
-//
-// FPU Instruction Set (COP1 & COP1X)
-//
-
-
-:%s::::FMT:int fmt
-{
- switch (fmt)
- {
- case fmt_single: return "s";
- case fmt_double: return "d";
- case fmt_word: return "w";
- case fmt_long: return "l";
- default: return "?";
- }
-}
-
-:%s::::X:int x
-{
- switch (x)
- {
- case 0: return "f";
- case 1: return "t";
- default: return "?";
- }
-}
-
-:%s::::TF:int tf
-{
- if (tf)
- return "t";
- else
- return "f";
-}
-
-:%s::::ND:int nd
-{
- if (nd)
- return "l";
- else
- return "";
-}
-
-:%s::::COND:int cond
-{
- switch (cond)
- {
- case 00: return "f";
- case 01: return "un";
- case 02: return "eq";
- case 03: return "ueq";
- case 04: return "olt";
- case 05: return "ult";
- case 06: return "ole";
- case 07: return "ule";
- case 010: return "sf";
- case 011: return "ngle";
- case 012: return "seq";
- case 013: return "ngl";
- case 014: return "lt";
- case 015: return "nge";
- case 016: return "le";
- case 017: return "ngt";
- default: return "?";
- }
-}
-
-
-010001,10,3.FMT,00000,5.FS,5.FD,000101:COP1:32,f::ABS.fmt
-"abs.%s<FMT> f<FD>, f<FS>"
-*mipsI,mipsII,mipsIII,mipsIV:
-*vr4100:
-*vr5000:
-*r3900:
-{
- unsigned32 instruction = instruction_0;
- int destreg = ((instruction >> 6) & 0x0000001F);
- int fs = ((instruction >> 11) & 0x0000001F);
- int format = ((instruction >> 21) & 0x00000007);
- {
- if ((format != fmt_single) && (format != fmt_double))
- SignalException(ReservedInstruction,instruction);
- else
- StoreFPR(destreg,format,AbsoluteValue(ValueFPR(fs,format),format));
- }
-}
-
-
-
-010001,10,3.FMT,5.FT,5.FS,5.FD,000000:COP1:32,f::ADD.fmt
-"add.%s<FMT> f<FD>, f<FS>, f<FT>"
-*mipsI,mipsII,mipsIII,mipsIV:
-*vr4100:
-*vr5000:
-*r3900:
-{
- unsigned32 instruction = instruction_0;
- int destreg = ((instruction >> 6) & 0x0000001F);
- int fs = ((instruction >> 11) & 0x0000001F);
- int ft = ((instruction >> 16) & 0x0000001F);
- int format = ((instruction >> 21) & 0x00000007);
- {
- if ((format != fmt_single) && (format != fmt_double))
- SignalException(ReservedInstruction, instruction);
- else
- StoreFPR(destreg,format,Add(ValueFPR(fs,format),ValueFPR(ft,format),format));
- }
-}
-
-
-
-// BC1F
-// BC1FL
-// BC1T
-// BC1TL
-
-010001,01000,3.0,1.ND,1.TF,16.OFFSET:COP1S:32,f::BC1a
-"bc1%s<TF>%s<ND> <OFFSET>"
-*mipsI,mipsII,mipsIII:
-{
- check_branch_bug ();
- TRACE_BRANCH_INPUT (PREVCOC1());
- if (PREVCOC1() == TF)
- {
- address_word dest = NIA + (EXTEND16 (OFFSET) << 2);
- TRACE_BRANCH_RESULT (dest);
- mark_branch_bug (dest);
- DELAY_SLOT (dest);
- }
- else if (ND)
- {
- TRACE_BRANCH_RESULT (0);
- NULLIFY_NEXT_INSTRUCTION ();
- }
- else
- {
- TRACE_BRANCH_RESULT (NIA);
- }
-}
-
-010001,01000,3.CC,1.ND,1.TF,16.OFFSET:COP1S:32,f::BC1b
-"bc1%s<TF>%s<ND> <OFFSET>":CC == 0
-"bc1%s<TF>%s<ND> <CC>, <OFFSET>"
-*mipsIV:
-*vr5000:
-#*vr4100:
-*r3900:
-{
- check_branch_bug ();
- if (GETFCC(CC) == TF)
- {
- address_word dest = NIA + (EXTEND16 (OFFSET) << 2);
- mark_branch_bug (dest);
- DELAY_SLOT (dest);
- }
- else if (ND)
- {
- NULLIFY_NEXT_INSTRUCTION ();
- }
-}
-
-
-
-
-
-
-// C.EQ.S
-// C.EQ.D
-// ...
-
-:function:::void:do_c_cond_fmt:int fmt, int ft, int fs, int cc, int cond, instruction_word insn
-{
- if ((fmt != fmt_single) && (fmt != fmt_double))
- SignalException (ReservedInstruction, insn);
- else
- {
- int less;
- int equal;
- int unordered;
- int condition;
- unsigned64 ofs = ValueFPR (fs, fmt);
- unsigned64 oft = ValueFPR (ft, fmt);
- if (NaN (ofs, fmt) || NaN (oft, fmt))
- {
- if (FCSR & FP_ENABLE (IO))
- {
- FCSR |= FP_CAUSE (IO);
- SignalExceptionFPE ();
- }
- less = 0;
- equal = 0;
- unordered = 1;
- }
- else
- {
- less = Less (ofs, oft, fmt);
- equal = Equal (ofs, oft, fmt);
- unordered = 0;
- }
- condition = (((cond & (1 << 2)) && less)
- || ((cond & (1 << 1)) && equal)
- || ((cond & (1 << 0)) && unordered));
- SETFCC (cc, condition);
- }
-}
-
-010001,10,3.FMT,5.FT,5.FS,3.0,00,11,4.COND:COP1:32::C.cond.fmta
-"c.%s<COND>.%s<FMT> f<FS>, f<FT>"
-*mipsI,mipsII,mipsIII:
-{
- do_c_cond_fmt (SD_, FMT, FT, FS, 0, COND, instruction_0);
-}
-
-010001,10,3.FMT,5.FT,5.FS,3.CC,00,11,4.COND:COP1:32::C.cond.fmtb
-"c.%s<COND>.%s<FMT> f<FS>, f<FT>":CC == 0
-"c.%s<COND>.%s<FMT> <CC>, f<FS>, f<FT>"
-*mipsIV:
-*vr4100:
-*vr5000:
-*r3900:
-{
- do_c_cond_fmt (SD_, FMT, FT, FS, CC, COND, instruction_0);
-}
-
-
-010001,10,3.FMT,00000,5.FS,5.FD,001010:COP1:64::CEIL.L.fmt
-"ceil.l.%s<FMT> f<FD>, f<FS>"
-*mipsIII:
-*mipsIV:
-*vr4100:
-*vr5000:
-*r3900:
-{
- unsigned32 instruction = instruction_0;
- int destreg = ((instruction >> 6) & 0x0000001F);
- int fs = ((instruction >> 11) & 0x0000001F);
- int format = ((instruction >> 21) & 0x00000007);
- {
- if ((format != fmt_single) && (format != fmt_double))
- SignalException(ReservedInstruction,instruction);
- else
- StoreFPR(destreg,fmt_long,Convert(FP_RM_TOPINF,ValueFPR(fs,format),format,fmt_long));
- }
-}
-
-
-010001,10,3.FMT,00000,5.FS,5.FD,001110:COP1:32::CEIL.W
-*mipsII:
-*mipsIII:
-*mipsIV:
-*vr4100:
-*vr5000:
-*r3900:
-{
- unsigned32 instruction = instruction_0;
- int destreg = ((instruction >> 6) & 0x0000001F);
- int fs = ((instruction >> 11) & 0x0000001F);
- int format = ((instruction >> 21) & 0x00000007);
- {
- if ((format != fmt_single) && (format != fmt_double))
- SignalException(ReservedInstruction,instruction);
- else
- StoreFPR(destreg,fmt_word,Convert(FP_RM_TOPINF,ValueFPR(fs,format),format,fmt_word));
- }
-}
-
-
-// CFC1
-// CTC1
-010001,00,X,10,5.RT,5.FS,00000000000:COP1Sa:32::CxC1
-"c%s<X>c1 r<RT>, f<FS>"
-*mipsI:
-*mipsII:
-*mipsIII:
-{
- if (X)
- {
- if (FS == 0)
- PENDING_FILL(FCR0IDX,VL4_8(GPR[RT]));
- else if (FS == 31)
- PENDING_FILL(FCR31IDX,VL4_8(GPR[RT]));
- /* else NOP */
- PENDING_SCHED(FCSR, FCR31 & (1<<23), 1, 23);
- }
- else
- { /* control from */
- if (FS == 0)
- PENDING_FILL(RT,SIGNEXTEND(FCR0,32));
- else if (FS == 31)
- PENDING_FILL(RT,SIGNEXTEND(FCR31,32));
- /* else NOP */
- }
-}
-010001,00,X,10,5.RT,5.FS,00000000000:COP1Sb:32::CxC1
-"c%s<X>c1 r<RT>, f<FS>"
-*mipsIV:
-*vr4100:
-*vr5000:
-*r3900:
-{
- if (X)
- {
- /* control to */
- TRACE_ALU_INPUT1 (GPR[RT]);
- if (FS == 0)
- {
- FCR0 = VL4_8(GPR[RT]);
- TRACE_ALU_RESULT (FCR0);
- }
- else if (FS == 31)
- {
- FCR31 = VL4_8(GPR[RT]);
- SETFCC(0,((FCR31 & (1 << 23)) ? 1 : 0));
- TRACE_ALU_RESULT (FCR31);
- }
- else
- {
- TRACE_ALU_RESULT0 ();
- }
- /* else NOP */
- }
- else
- { /* control from */
- if (FS == 0)
- {
- TRACE_ALU_INPUT1 (FCR0);
- GPR[RT] = SIGNEXTEND (FCR0, 32);
- }
- else if (FS == 31)
- {
- TRACE_ALU_INPUT1 (FCR31);
- GPR[RT] = SIGNEXTEND (FCR31, 32);
- }
- TRACE_ALU_RESULT (GPR[RT]);
- /* else NOP */
- }
-}
-
-
-//
-// FIXME: Does not correctly differentiate between mips*
-//
-010001,10,3.FMT,00000,5.FS,5.FD,100001:COP1:32::CVT.D.fmt
-"cvt.d.%s<FMT> f<FD>, f<FS>"
-*mipsI,mipsII,mipsIII,mipsIV:
-*vr4100:
-*vr5000:
-*r3900:
-{
- unsigned32 instruction = instruction_0;
- int destreg = ((instruction >> 6) & 0x0000001F);
- int fs = ((instruction >> 11) & 0x0000001F);
- int format = ((instruction >> 21) & 0x00000007);
- {
- if ((format == fmt_double) | 0)
- SignalException(ReservedInstruction,instruction);
- else
- StoreFPR(destreg,fmt_double,Convert(GETRM(),ValueFPR(fs,format),format,fmt_double));
- }
-}
-
-
-010001,10,3.FMT,00000,5.FS,5.FD,100101:COP1:64::CVT.L.fmt
-"cvt.l.%s<FMT> f<FD>, f<FS>"
-*mipsIII:
-*mipsIV:
-*vr4100:
-*vr5000:
-*r3900:
-{
- unsigned32 instruction = instruction_0;
- int destreg = ((instruction >> 6) & 0x0000001F);
- int fs = ((instruction >> 11) & 0x0000001F);
- int format = ((instruction >> 21) & 0x00000007);
- {
- if ((format == fmt_long) | ((format == fmt_long) || (format == fmt_word)))
- SignalException(ReservedInstruction,instruction);
- else
- StoreFPR(destreg,fmt_long,Convert(GETRM(),ValueFPR(fs,format),format,fmt_long));
- }
-}
-
-
-//
-// FIXME: Does not correctly differentiate between mips*
-//
-010001,10,3.FMT,00000,5.FS,5.FD,100000:COP1:32::CVT.S.fmt
-"cvt.s.%s<FMT> f<FD>, f<FS>"
-*mipsI,mipsII,mipsIII,mipsIV:
-*vr4100:
-*vr5000:
-*r3900:
-{
- unsigned32 instruction = instruction_0;
- int destreg = ((instruction >> 6) & 0x0000001F);
- int fs = ((instruction >> 11) & 0x0000001F);
- int format = ((instruction >> 21) & 0x00000007);
- {
- if ((format == fmt_single) | 0)
- SignalException(ReservedInstruction,instruction);
- else
- StoreFPR(destreg,fmt_single,Convert(GETRM(),ValueFPR(fs,format),format,fmt_single));
- }
-}
-
-
-010001,10,3.FMT,00000,5.FS,5.FD,100100:COP1:32::CVT.W.fmt
-"cvt.w.%s<FMT> f<FD>, f<FS>"
-*mipsI,mipsII,mipsIII,mipsIV:
-*vr4100:
-*vr5000:
-*r3900:
-{
- unsigned32 instruction = instruction_0;
- int destreg = ((instruction >> 6) & 0x0000001F);
- int fs = ((instruction >> 11) & 0x0000001F);
- int format = ((instruction >> 21) & 0x00000007);
- {
- if ((format == fmt_word) | ((format == fmt_long) || (format == fmt_word)))
- SignalException(ReservedInstruction,instruction);
- else
- StoreFPR(destreg,fmt_word,Convert(GETRM(),ValueFPR(fs,format),format,fmt_word));
- }
-}
-
-
-010001,10,3.FMT,5.FT,5.FS,5.FD,000011:COP1:32::DIV.fmt
-"div.%s<FMT> f<FD>, f<FS>, f<FT>"
-*mipsI,mipsII,mipsIII,mipsIV:
-*vr4100:
-*vr5000:
-*r3900:
-{
- unsigned32 instruction = instruction_0;
- int destreg = ((instruction >> 6) & 0x0000001F);
- int fs = ((instruction >> 11) & 0x0000001F);
- int ft = ((instruction >> 16) & 0x0000001F);
- int format = ((instruction >> 21) & 0x00000007);
- {
- if ((format != fmt_single) && (format != fmt_double))
- SignalException(ReservedInstruction,instruction);
- else
- StoreFPR(destreg,format,Divide(ValueFPR(fs,format),ValueFPR(ft,format),format));
- }
-}
-
-
-// DMFC1
-// DMTC1
-010001,00,X,01,5.RT,5.FS,00000000000:COP1Sa:64::DMxC1
-"dm%s<X>c1 r<RT>, f<FS>"
-*mipsIII:
-{
- if (X)
- {
- if (SizeFGR() == 64)
- PENDING_FILL((FS + FGRIDX),GPR[RT]);
- else if ((FS & 0x1) == 0)
- {
- PENDING_FILL(((FS + 1) + FGRIDX),VH4_8(GPR[RT]));
- PENDING_FILL((FS + FGRIDX),VL4_8(GPR[RT]));
- }
- }
- else
- {
- if (SizeFGR() == 64)
- PENDING_FILL(RT,FGR[FS]);
- else if ((FS & 0x1) == 0)
- PENDING_FILL(RT,(SET64HI(FGR[FS+1]) | FGR[FS]));
- else
- {
- if (STATE_VERBOSE_P(SD))
- sim_io_eprintf (SD,
- "Warning: PC 0x%lx: semantic_DMxC1_COP1Sa 32-bit use of odd FPR number\n",
- (long) CIA);
- PENDING_FILL(RT,SET64HI(0xDEADC0DE) | 0xBAD0BAD0);
- }
- }
-}
-010001,00,X,01,5.RT,5.FS,00000000000:COP1Sb:64::DMxC1
-"dm%s<X>c1 r<RT>, f<FS>"
-*mipsIV:
-*vr4100:
-*vr5000:
-*r3900:
-{
- if (X)
- {
- if (SizeFGR() == 64)
- StoreFPR (FS, fmt_uninterpreted_64, GPR[RT]);
- else if ((FS & 0x1) == 0)
- StoreFPR (FS, fmt_uninterpreted_64, SET64HI (FGR[FS+1]) | FGR[FS]);
- }
- else
- {
- if (SizeFGR() == 64)
- GPR[RT] = FGR[FS];
- else if ((FS & 0x1) == 0)
- GPR[RT] = SET64HI (FGR[FS+1]) | FGR[FS];
- else
- {
- if (STATE_VERBOSE_P(SD))
- sim_io_eprintf (SD,
- "Warning: PC 0x%lx: DMxC1 32-bit use of odd FPR number\n",
- (long) CIA);
- GPR[RT] = SET64HI (0xDEADC0DE) | 0xBAD0BAD0;
- }
- }
-}
-
-
-010001,10,3.FMT,00000,5.FS,5.FD,001011:COP1:64::FLOOR.L.fmt
-"floor.l.%s<FMT> f<FD>, f<FS>"
-*mipsIII:
-*mipsIV:
-*vr4100:
-*vr5000:
-*r3900:
-{
- unsigned32 instruction = instruction_0;
- int destreg = ((instruction >> 6) & 0x0000001F);
- int fs = ((instruction >> 11) & 0x0000001F);
- int format = ((instruction >> 21) & 0x00000007);
- {
- if ((format != fmt_single) && (format != fmt_double))
- SignalException(ReservedInstruction,instruction);
- else
- StoreFPR(destreg,fmt_long,Convert(FP_RM_TOMINF,ValueFPR(fs,format),format,fmt_long));
- }
-}
-
-
-010001,10,3.FMT,00000,5.FS,5.FD,001111:COP1:32::FLOOR.W.fmt
-"floor.w.%s<FMT> f<FD>, f<FS>"
-*mipsII:
-*mipsIII:
-*mipsIV:
-*vr4100:
-*vr5000:
-*r3900:
-{
- unsigned32 instruction = instruction_0;
- int destreg = ((instruction >> 6) & 0x0000001F);
- int fs = ((instruction >> 11) & 0x0000001F);
- int format = ((instruction >> 21) & 0x00000007);
- {
- if ((format != fmt_single) && (format != fmt_double))
- SignalException(ReservedInstruction,instruction);
- else
- StoreFPR(destreg,fmt_word,Convert(FP_RM_TOMINF,ValueFPR(fs,format),format,fmt_word));
- }
-}
-
-
-110101,5.BASE,5.FT,16.OFFSET:COP1:64::LDC1
-"ldc1 f<FT>, <OFFSET>(r<BASE>)"
-*mipsI:
-*mipsII:
-*mipsIII:
-*mipsIV:
-*vr4100:
-*vr5000:
-*r3900:
-{
- COP_LD (1, FT, do_load (SD_, AccessLength_DOUBLEWORD, GPR[BASE], EXTEND16 (OFFSET)));
-}
-
-
-010011,5.BASE,5.INDEX,5.0,5.FD,000001:COP1X:64::LDXC1
-"ldxc1 f<FD>, r<INDEX>(r<BASE>)"
-*mipsIV:
-*vr5000:
-{
- COP_LD (1, FD, do_load (SD_, AccessLength_DOUBLEWORD, GPR[BASE], GPR[INDEX]));
-}
-
-
-
-110001,5.BASE,5.FT,16.OFFSET:COP1:32::LWC1
-"lwc1 f<FT>, <OFFSET>(r<BASE>)"
-*mipsI,mipsII,mipsIII,mipsIV:
-*vr4100:
-*vr5000:
-*r3900:
-{
- COP_LW (1, FT, do_load (SD_, AccessLength_WORD, GPR[BASE], EXTEND16 (OFFSET)));
-}
-
-
-010011,5.BASE,5.INDEX,5.0,5.FD,000000:COP1X:32::LWXC1
-"lwxc1 f<FD>, r<INDEX>(r<BASE>)"
-*mipsIV:
-*vr5000:
-{
- COP_LW (1, FD, do_load (SD_, AccessLength_WORD, GPR[BASE], GPR[INDEX]));
-}
-
-
-
-//
-// FIXME: Not correct for mips*
-//
-010011,5.FR,5.FT,5.FS,5.FD,100,001:COP1X:32,f::MADD.D
-"madd.d f<FD>, f<FR>, f<FS>, f<FT>"
-*mipsIV:
-*vr5000:
-{
- unsigned32 instruction = instruction_0;
- int destreg = ((instruction >> 6) & 0x0000001F);
- int fs = ((instruction >> 11) & 0x0000001F);
- int ft = ((instruction >> 16) & 0x0000001F);
- int fr = ((instruction >> 21) & 0x0000001F);
- {
- StoreFPR(destreg,fmt_double,Add(Multiply(ValueFPR(fs,fmt_double),ValueFPR(ft,fmt_double),fmt_double),ValueFPR(fr,fmt_double),fmt_double));
- }
-}
-
-
-010011,5.FR,5.FT,5.FS,5.FD,100,000:COP1X:32,f::MADD.S
-"madd.s f<FD>, f<FR>, f<FS>, f<FT>"
-*mipsIV:
-*vr5000:
-{
- unsigned32 instruction = instruction_0;
- int destreg = ((instruction >> 6) & 0x0000001F);
- int fs = ((instruction >> 11) & 0x0000001F);
- int ft = ((instruction >> 16) & 0x0000001F);
- int fr = ((instruction >> 21) & 0x0000001F);
- {
- StoreFPR(destreg,fmt_single,Add(Multiply(ValueFPR(fs,fmt_single),ValueFPR(ft,fmt_single),fmt_single),ValueFPR(fr,fmt_single),fmt_single));
- }
-}
-
-
-// MFC1
-// MTC1
-010001,00,X,00,5.RT,5.FS,00000000000:COP1Sa:32::MxC1
-"m%s<X>c1 r<RT>, f<FS>"
-*mipsI:
-*mipsII:
-*mipsIII:
-{
- if (X)
- { /*MTC1*/
- if (SizeFGR() == 64)
- {
- if (STATE_VERBOSE_P(SD))
- sim_io_eprintf (SD,
- "Warning: PC 0x%lx: MTC1 not DMTC1 with 64 bit regs\n",
- (long) CIA);
- PENDING_FILL ((FS + FGRIDX), (SET64HI(0xDEADC0DE) | VL4_8(GPR[RT])));
- }
- else
- PENDING_FILL ((FS + FGRIDX), VL4_8(GPR[RT]));
- }
- else /*MFC1*/
- PENDING_FILL (RT, SIGNEXTEND(FGR[FS],32));
-}
-010001,00,X,00,5.RT,5.FS,00000000000:COP1Sb:32::MxC1
-"m%s<X>c1 r<RT>, f<FS>"
-*mipsIV:
-*vr4100:
-*vr5000:
-*r3900:
-{
- int fs = FS;
- if (X)
- /*MTC1*/
- StoreFPR (FS, fmt_uninterpreted_32, VL4_8 (GPR[RT]));
- else /*MFC1*/
- GPR[RT] = SIGNEXTEND(FGR[FS],32);
-}
-
-
-010001,10,3.FMT,00000,5.FS,5.FD,000110:COP1:32::MOV.fmt
-"mov.%s<FMT> f<FD>, f<FS>"
-*mipsI,mipsII,mipsIII,mipsIV:
-*vr4100:
-*vr5000:
-*r3900:
-{
- unsigned32 instruction = instruction_0;
- int destreg = ((instruction >> 6) & 0x0000001F);
- int fs = ((instruction >> 11) & 0x0000001F);
- int format = ((instruction >> 21) & 0x00000007);
- {
- StoreFPR(destreg,format,ValueFPR(fs,format));
- }
-}
-
-
-// MOVF
-// MOVT
-000000,5.RS,3.CC,0,1.TF,5.RD,00000000001:SPECIAL:32::MOVtf
-"mov%s<TF> r<RD>, r<RS>, <CC>"
-*mipsIV:
-*vr5000:
-{
- if (GETFCC(CC) == TF)
- GPR[RD] = GPR[RS];
-}
-
-
-// MOVF.fmt
-// MOVT.fmt
-010001,10,3.FMT,3.CC,0,1.TF,5.FS,5.FD,010001:COP1:32::MOVtf.fmt
-"mov%s<TF>.%s<FMT> f<FD>, f<FS>, <CC>"
-*mipsIV:
-*vr5000:
-{
- unsigned32 instruction = instruction_0;
- int format = ((instruction >> 21) & 0x00000007);
- {
- if (GETFCC(CC) == TF)
- StoreFPR (FD, format, ValueFPR (FS, format));
- else
- StoreFPR (FD, format, ValueFPR (FD, format));
- }
-}
-
-
-010001,10,3.FMT,5.RT,5.FS,5.FD,010011:COP1:32::MOVN.fmt
-"movn.%s<FMT> f<FD>, f<FS>, r<RT>"
-*mipsIV:
-*vr5000:
-{
- if (GPR[RT] != 0)
- StoreFPR (FD, FMT, ValueFPR (FS, FMT));
- else
- StoreFPR (FD, FMT, ValueFPR (FD, FMT));
-}
-
-
-// MOVT see MOVtf
-
-
-// MOVT.fmt see MOVtf.fmt
-
-
-
-010001,10,3.FMT,5.RT,5.FS,5.FD,010010:COP1:32::MOVZ.fmt
-"movz.%s<FMT> f<FD>, f<FS>, r<RT>"
-*mipsIV:
-*vr5000:
-{
- if (GPR[RT] == 0)
- StoreFPR (FD, FMT, ValueFPR (FS, FMT));
- else
- StoreFPR (FD, FMT, ValueFPR (FD, FMT));
-}
-
-
-// MSUB.fmt
-010011,5.FR,5.FT,5.FS,5.FD,101,001:COP1X:32::MSUB.D
-"msub.d f<FD>, f<FR>, f<FS>, f<FT>"
-*mipsIV:
-*vr5000:
-{
- unsigned32 instruction = instruction_0;
- int destreg = ((instruction >> 6) & 0x0000001F);
- int fs = ((instruction >> 11) & 0x0000001F);
- int ft = ((instruction >> 16) & 0x0000001F);
- int fr = ((instruction >> 21) & 0x0000001F);
- {
- StoreFPR(destreg,fmt_double,Sub(Multiply(ValueFPR(fs,fmt_double),ValueFPR(ft,fmt_double),fmt_double),ValueFPR(fr,fmt_double),fmt_double));
- }
-}
-
-
-// MSUB.fmt
-010011,5.FR,5.FT,5.FS,5.FD,101000:COP1X:32::MSUB.S
-"msub.s f<FD>, f<FR>, f<FS>, f<FT>"
-*mipsIV:
-*vr5000:
-{
- unsigned32 instruction = instruction_0;
- int destreg = ((instruction >> 6) & 0x0000001F);
- int fs = ((instruction >> 11) & 0x0000001F);
- int ft = ((instruction >> 16) & 0x0000001F);
- int fr = ((instruction >> 21) & 0x0000001F);
- {
- StoreFPR(destreg,fmt_single,Sub(Multiply(ValueFPR(fs,fmt_single),ValueFPR(ft,fmt_single),fmt_single),ValueFPR(fr,fmt_single),fmt_single));
- }
-}
-
-
-// MTC1 see MxC1
-
-
-010001,10,3.FMT,5.FT,5.FS,5.FD,000010:COP1:32::MUL.fmt
-"mul.%s<FMT> f<FD>, f<FS>, f<FT>"
-*mipsI,mipsII,mipsIII,mipsIV:
-*vr4100:
-*vr5000:
-*r3900:
-{
- unsigned32 instruction = instruction_0;
- int destreg = ((instruction >> 6) & 0x0000001F);
- int fs = ((instruction >> 11) & 0x0000001F);
- int ft = ((instruction >> 16) & 0x0000001F);
- int format = ((instruction >> 21) & 0x00000007);
- {
- if ((format != fmt_single) && (format != fmt_double))
- SignalException(ReservedInstruction,instruction);
- else
- StoreFPR(destreg,format,Multiply(ValueFPR(fs,format),ValueFPR(ft,format),format));
- }
-}
-
-
-010001,10,3.FMT,00000,5.FS,5.FD,000111:COP1:32::NEG.fmt
-"neg.%s<FMT> f<FD>, f<FS>"
-*mipsI,mipsII,mipsIII,mipsIV:
-*vr4100:
-*vr5000:
-*r3900:
-{
- unsigned32 instruction = instruction_0;
- int destreg = ((instruction >> 6) & 0x0000001F);
- int fs = ((instruction >> 11) & 0x0000001F);
- int format = ((instruction >> 21) & 0x00000007);
- {
- if ((format != fmt_single) && (format != fmt_double))
- SignalException(ReservedInstruction,instruction);
- else
- StoreFPR(destreg,format,Negate(ValueFPR(fs,format),format));
- }
-}
-
-
-// NMADD.fmt
-010011,5.FR,5.FT,5.FS,5.FD,110001:COP1X:32::NMADD.D
-"nmadd.d f<FD>, f<FR>, f<FS>, f<FT>"
-*mipsIV:
-*vr5000:
-{
- unsigned32 instruction = instruction_0;
- int destreg = ((instruction >> 6) & 0x0000001F);
- int fs = ((instruction >> 11) & 0x0000001F);
- int ft = ((instruction >> 16) & 0x0000001F);
- int fr = ((instruction >> 21) & 0x0000001F);
- {
- StoreFPR(destreg,fmt_double,Negate(Add(Multiply(ValueFPR(fs,fmt_double),ValueFPR(ft,fmt_double),fmt_double),ValueFPR(fr,fmt_double),fmt_double),fmt_double));
- }
-}
-
-
-// NMADD.fmt
-010011,5.FR,5.FT,5.FS,5.FD,110000:COP1X:32::NMADD.S
-"nmadd.s f<FD>, f<FR>, f<FS>, f<FT>"
-*mipsIV:
-*vr5000:
-{
- unsigned32 instruction = instruction_0;
- int destreg = ((instruction >> 6) & 0x0000001F);
- int fs = ((instruction >> 11) & 0x0000001F);
- int ft = ((instruction >> 16) & 0x0000001F);
- int fr = ((instruction >> 21) & 0x0000001F);
- {
- StoreFPR(destreg,fmt_single,Negate(Add(Multiply(ValueFPR(fs,fmt_single),ValueFPR(ft,fmt_single),fmt_single),ValueFPR(fr,fmt_single),fmt_single),fmt_single));
- }
-}
-
-
-// NMSUB.fmt
-010011,5.FR,5.FT,5.FS,5.FD,111001:COP1X:32::NMSUB.D
-"nmsub.d f<FD>, f<FR>, f<FS>, f<FT>"
-*mipsIV:
-*vr5000:
-{
- unsigned32 instruction = instruction_0;
- int destreg = ((instruction >> 6) & 0x0000001F);
- int fs = ((instruction >> 11) & 0x0000001F);
- int ft = ((instruction >> 16) & 0x0000001F);
- int fr = ((instruction >> 21) & 0x0000001F);
- {
- StoreFPR(destreg,fmt_double,Negate(Sub(Multiply(ValueFPR(fs,fmt_double),ValueFPR(ft,fmt_double),fmt_double),ValueFPR(fr,fmt_double),fmt_double),fmt_double));
- }
-}
-
-
-// NMSUB.fmt
-010011,5.FR,5.FT,5.FS,5.FD,111000:COP1X:32::NMSUB.S
-"nmsub.s f<FD>, f<FR>, f<FS>, f<FT>"
-*mipsIV:
-*vr5000:
-{
- unsigned32 instruction = instruction_0;
- int destreg = ((instruction >> 6) & 0x0000001F);
- int fs = ((instruction >> 11) & 0x0000001F);
- int ft = ((instruction >> 16) & 0x0000001F);
- int fr = ((instruction >> 21) & 0x0000001F);
- {
- StoreFPR(destreg,fmt_single,Negate(Sub(Multiply(ValueFPR(fs,fmt_single),ValueFPR(ft,fmt_single),fmt_single),ValueFPR(fr,fmt_single),fmt_single),fmt_single));
- }
-}
-
-
-010011,5.BASE,5.INDEX,5.HINT,00000001111:COP1X:32::PREFX
-"prefx <HINT>, r<INDEX>(r<BASE>)"
-*mipsIV:
-*vr5000:
-{
- unsigned32 instruction = instruction_0;
- int fs = ((instruction >> 11) & 0x0000001F);
- signed_word op2 = GPR[((instruction >> 16) & 0x0000001F)];
- signed_word op1 = GPR[((instruction >> 21) & 0x0000001F)];
- {
- address_word vaddr = ((unsigned64)op1 + (unsigned64)op2);
- address_word paddr;
- int uncached;
- if (AddressTranslation(vaddr,isDATA,isLOAD,&paddr,&uncached,isTARGET,isREAL))
- Prefetch(uncached,paddr,vaddr,isDATA,fs);
- }
-}
-
-010001,10,3.FMT,00000,5.FS,5.FD,010101:COP1:32::RECIP.fmt
-"recip.%s<FMT> f<FD>, f<FS>"
-*mipsIV:
-*vr5000:
-{
- unsigned32 instruction = instruction_0;
- int destreg = ((instruction >> 6) & 0x0000001F);
- int fs = ((instruction >> 11) & 0x0000001F);
- int format = ((instruction >> 21) & 0x00000007);
- {
- if ((format != fmt_single) && (format != fmt_double))
- SignalException(ReservedInstruction,instruction);
- else
- StoreFPR(destreg,format,Recip(ValueFPR(fs,format),format));
- }
-}
-
-
-010001,10,3.FMT,00000,5.FS,5.FD,001000:COP1:64::ROUND.L.fmt
-"round.l.%s<FMT> f<FD>, f<FS>"
-*mipsIII:
-*mipsIV:
-*vr4100:
-*vr5000:
-*r3900:
-{
- unsigned32 instruction = instruction_0;
- int destreg = ((instruction >> 6) & 0x0000001F);
- int fs = ((instruction >> 11) & 0x0000001F);
- int format = ((instruction >> 21) & 0x00000007);
- {
- if ((format != fmt_single) && (format != fmt_double))
- SignalException(ReservedInstruction,instruction);
- else
- StoreFPR(destreg,fmt_long,Convert(FP_RM_NEAREST,ValueFPR(fs,format),format,fmt_long));
- }
-}
-
-
-010001,10,3.FMT,00000,5.FS,5.FD,001100:COP1:32::ROUND.W.fmt
-"round.w.%s<FMT> f<FD>, f<FS>"
-*mipsII:
-*mipsIII:
-*mipsIV:
-*vr4100:
-*vr5000:
-*r3900:
-{
- unsigned32 instruction = instruction_0;
- int destreg = ((instruction >> 6) & 0x0000001F);
- int fs = ((instruction >> 11) & 0x0000001F);
- int format = ((instruction >> 21) & 0x00000007);
- {
- if ((format != fmt_single) && (format != fmt_double))
- SignalException(ReservedInstruction,instruction);
- else
- StoreFPR(destreg,fmt_word,Convert(FP_RM_NEAREST,ValueFPR(fs,format),format,fmt_word));
- }
-}
-
-
-010001,10,3.FMT,00000,5.FS,5.FD,010110:COP1:32::RSQRT.fmt
-*mipsIV:
-"rsqrt.%s<FMT> f<FD>, f<FS>"
-*vr5000:
-{
- unsigned32 instruction = instruction_0;
- int destreg = ((instruction >> 6) & 0x0000001F);
- int fs = ((instruction >> 11) & 0x0000001F);
- int format = ((instruction >> 21) & 0x00000007);
- {
- if ((format != fmt_single) && (format != fmt_double))
- SignalException(ReservedInstruction,instruction);
- else
- StoreFPR(destreg,format,Recip(SquareRoot(ValueFPR(fs,format),format),format));
- }
-}
-
-
-111101,5.BASE,5.FT,16.OFFSET:COP1:64::SDC1
-"sdc1 f<FT>, <OFFSET>(r<BASE>)"
-*mipsI:
-*mipsII:
-*mipsIII:
-*mipsIV:
-*vr4100:
-*vr5000:
-*r3900:
-{
- do_store (SD_, AccessLength_DOUBLEWORD, GPR[BASE], EXTEND16 (OFFSET), COP_SD (1, FT));
-}
-
-
-010011,5.BASE,5.INDEX,5.FS,00000001001:COP1X:64::SDXC1
-"ldxc1 f<FS>, r<INDEX>(r<BASE>)"
-*mipsIV:
-*vr5000:
-{
- do_store (SD_, AccessLength_DOUBLEWORD, GPR[BASE], GPR[INDEX], COP_SD (1, FS));
-}
-
-
-010001,10,3.FMT,00000,5.FS,5.FD,000100:COP1:32::SQRT.fmt
-"sqrt.%s<FMT> f<FD>, f<FS>"
-*mipsII:
-*mipsIII:
-*mipsIV:
-*vr4100:
-*vr5000:
-*r3900:
-{
- unsigned32 instruction = instruction_0;
- int destreg = ((instruction >> 6) & 0x0000001F);
- int fs = ((instruction >> 11) & 0x0000001F);
- int format = ((instruction >> 21) & 0x00000007);
- {
- if ((format != fmt_single) && (format != fmt_double))
- SignalException(ReservedInstruction,instruction);
- else
- StoreFPR(destreg,format,(SquareRoot(ValueFPR(fs,format),format)));
- }
-}
-
-
-010001,10,3.FMT,5.FT,5.FS,5.FD,000001:COP1:32::SUB.fmt
-"sub.%s<FMT> f<FD>, f<FS>, f<FT>"
-*mipsI,mipsII,mipsIII,mipsIV:
-*vr4100:
-*vr5000:
-*r3900:
-{
- unsigned32 instruction = instruction_0;
- int destreg = ((instruction >> 6) & 0x0000001F);
- int fs = ((instruction >> 11) & 0x0000001F);
- int ft = ((instruction >> 16) & 0x0000001F);
- int format = ((instruction >> 21) & 0x00000007);
- {
- if ((format != fmt_single) && (format != fmt_double))
- SignalException(ReservedInstruction,instruction);
- else
- StoreFPR(destreg,format,Sub(ValueFPR(fs,format),ValueFPR(ft,format),format));
- }
-}
-
-
-
-111001,5.BASE,5.FT,16.OFFSET:COP1:32::SWC1
-"swc1 f<FT>, <OFFSET>(r<BASE>)"
-*mipsI,mipsII,mipsIII,mipsIV:
-*vr4100:
-*vr5000:
-*r3900:
-{
- unsigned32 instruction = instruction_0;
- signed_word offset = EXTEND16 (OFFSET);
- int destreg UNUSED = ((instruction >> 16) & 0x0000001F);
- signed_word op1 UNUSED = GPR[((instruction >> 21) & 0x0000001F)];
- {
- address_word vaddr = ((uword64)op1 + offset);
- address_word paddr;
- int uncached;
- if ((vaddr & 3) != 0)
- {
- SIM_CORE_SIGNAL (SD, CPU, cia, read_map, AccessLength_WORD+1, vaddr, write_transfer, sim_core_unaligned_signal);
- }
- else
- {
- if (AddressTranslation(vaddr,isDATA,isSTORE,&paddr,&uncached,isTARGET,isREAL))
- {
- uword64 memval = 0;
- uword64 memval1 = 0;
- uword64 mask = (WITH_TARGET_WORD_BITSIZE == 64 ? 0x7 : 0x3);
- address_word reverseendian = (ReverseEndian ?(mask ^ AccessLength_WORD): 0);
- address_word bigendiancpu = (BigEndianCPU ?(mask ^ AccessLength_WORD): 0);
- unsigned int byte;
- paddr = ((paddr & ~mask) | ((paddr & mask) ^ reverseendian));
- byte = ((vaddr & mask) ^ bigendiancpu);
- memval = (((uword64)COP_SW(((instruction >> 26) & 0x3),destreg)) << (8 * byte));
- StoreMemory(uncached,AccessLength_WORD,memval,memval1,paddr,vaddr,isREAL);
- }
- }
- }
-}
-
-
-010011,5.BASE,5.INDEX,5.FS,00000,001000:COP1X:32::SWXC1
-"swxc1 f<FS>, r<INDEX>(r<BASE>)"
-*mipsIV:
-*vr5000:
-{
- unsigned32 instruction = instruction_0;
- int fs = ((instruction >> 11) & 0x0000001F);
- signed_word op2 = GPR[((instruction >> 16) & 0x0000001F)];
- signed_word op1 = GPR[((instruction >> 21) & 0x0000001F)];
- {
- address_word vaddr = ((unsigned64)op1 + op2);
- address_word paddr;
- int uncached;
- if ((vaddr & 3) != 0)
- {
- SIM_CORE_SIGNAL (SD, CPU, cia, read_map, 4, vaddr, write_transfer, sim_core_unaligned_signal);
- }
- else
- {
- if (AddressTranslation(vaddr,isDATA,isSTORE,&paddr,&uncached,isTARGET,isREAL))
- {
- unsigned64 memval = 0;
- unsigned64 memval1 = 0;
- unsigned64 mask = 0x7;
- unsigned int byte;
- paddr = ((paddr & ~mask) | ((paddr & mask) ^ (ReverseEndian << 2)));
- byte = ((vaddr & mask) ^ (BigEndianCPU << 2));
- memval = (((unsigned64)COP_SW(1,fs)) << (8 * byte));
- {
- StoreMemory(uncached,AccessLength_WORD,memval,memval1,paddr,vaddr,isREAL);
- }
- }
- }
- }
-}
-
-
-010001,10,3.FMT,00000,5.FS,5.FD,001001:COP1:64::TRUNC.L.fmt
-"trunc.l.%s<FMT> f<FD>, f<FS>"
-*mipsIII:
-*mipsIV:
-*vr4100:
-*vr5000:
-*r3900:
-{
- unsigned32 instruction = instruction_0;
- int destreg = ((instruction >> 6) & 0x0000001F);
- int fs = ((instruction >> 11) & 0x0000001F);
- int format = ((instruction >> 21) & 0x00000007);
- {
- if ((format != fmt_single) && (format != fmt_double))
- SignalException(ReservedInstruction,instruction);
- else
- StoreFPR(destreg,fmt_long,Convert(FP_RM_TOZERO,ValueFPR(fs,format),format,fmt_long));
- }
-}
-
-
-010001,10,3.FMT,00000,5.FS,5.FD,001101:COP1:32::TRUNC.W
-"trunc.w.%s<FMT> f<FD>, f<FS>"
-*mipsII:
-*mipsIII:
-*mipsIV:
-*vr4100:
-*vr5000:
-*r3900:
-{
- unsigned32 instruction = instruction_0;
- int destreg = ((instruction >> 6) & 0x0000001F);
- int fs = ((instruction >> 11) & 0x0000001F);
- int format = ((instruction >> 21) & 0x00000007);
- {
- if ((format != fmt_single) && (format != fmt_double))
- SignalException(ReservedInstruction,instruction);
- else
- StoreFPR(destreg,fmt_word,Convert(FP_RM_TOZERO,ValueFPR(fs,format),format,fmt_word));
- }
-}
-
-
-//
-// MIPS Architecture:
-//
-// System Control Instruction Set (COP0)
-//
-
-
-010000,01000,00000,16.OFFSET:COP0:32::BC0F
-"bc0f <OFFSET>"
-*mipsI,mipsII,mipsIII,mipsIV:
-*vr4100:
-*vr5000:
-
-010000,01000,00000,16.OFFSET:COP0:32::BC0F
-"bc0f <OFFSET>"
-// stub needed for eCos as tx39 hardware bug workaround
-*r3900:
-{
- /* do nothing */
-}
-
-
-010000,01000,00010,16.OFFSET:COP0:32::BC0FL
-"bc0fl <OFFSET>"
-*mipsI,mipsII,mipsIII,mipsIV:
-*vr4100:
-*vr5000:
-
-
-010000,01000,00001,16.OFFSET:COP0:32::BC0T
-"bc0t <OFFSET>"
-*mipsI,mipsII,mipsIII,mipsIV:
-*vr4100:
-
-
-010000,01000,00011,16.OFFSET:COP0:32::BC0TL
-"bc0tl <OFFSET>"
-*mipsI,mipsII,mipsIII,mipsIV:
-*vr4100:
-*vr5000:
-
-
-101111,5.BASE,5.OP,16.OFFSET:NORMAL:32::CACHE
-*mipsIII:
-*mipsIV:
-*vr4100:
-*vr5000:
-*r3900:
-{
- unsigned32 instruction = instruction_0;
- signed_word offset = SIGNEXTEND((signed_word)((instruction >> 0) & 0x0000FFFF),16);
- int hint = ((instruction >> 16) & 0x0000001F);
- signed_word op1 = GPR[((instruction >> 21) & 0x0000001F)];
- {
- address_word vaddr = (op1 + offset);
- address_word paddr;
- int uncached;
- if (AddressTranslation(vaddr,isDATA,isLOAD,&paddr,&uncached,isTARGET,isREAL))
- CacheOp(hint,vaddr,paddr,instruction);
- }
-}
-
-
-010000,10000,000000000000000,111001:COP0:32::DI
-"di"
-*mipsI,mipsII,mipsIII,mipsIV:
-*vr4100:
-*vr5000:
-
-
-010000,00001,5.RT,5.RD,000,0000,0000:COP0:64::DMFC0
-"dmfc0 r<RT>, r<RD>"
-*mipsIII,mipsIV:
-{
- DecodeCoproc (instruction_0);
-}
-
-
-010000,00101,5.RT,5.RD,000,0000,0000:COP0:64::DMTC0
-"dmtc0 r<RT>, r<RD>"
-*mipsIII,mipsIV:
-{
- DecodeCoproc (instruction_0);
-}
-
-
-010000,10000,000000000000000,111000:COP0:32::EI
-"ei"
-*mipsI,mipsII,mipsIII,mipsIV:
-*vr4100:
-*vr5000:
-
-
-010000,10000,000000000000000,011000:COP0:32::ERET
-"eret"
-*mipsIII:
-*mipsIV:
-*vr4100:
-*vr5000:
-{
- if (SR & status_ERL)
- {
- /* Oops, not yet available */
- sim_io_printf (SD, "Warning: ERET when SR[ERL] set not supported");
- NIA = EPC;
- SR &= ~status_ERL;
- }
- else
- {
- NIA = EPC;
- SR &= ~status_EXL;
- }
-}
-
-
-010000,00000,5.RT,5.RD,00000,6.REGX:COP0:32::MFC0
-"mfc0 r<RT>, r<RD> # <REGX>"
-*mipsI,mipsII,mipsIII,mipsIV:
-*r3900:
-*vr4100:
-*vr5000:
-{
- TRACE_ALU_INPUT0 ();
- DecodeCoproc (instruction_0);
- TRACE_ALU_RESULT (GPR[RT]);
-}
-
-010000,00100,5.RT,5.RD,00000,6.REGX:COP0:32::MTC0
-"mtc0 r<RT>, r<RD> # <REGX>"
-*mipsI,mipsII,mipsIII,mipsIV:
-*r3900:
-*vr4100:
-*vr5000:
-{
- DecodeCoproc (instruction_0);
-}
-
-
-010000,10000,000000000000000,010000:COP0:32::RFE
-"rfe"
-*mipsI,mipsII,mipsIII,mipsIV:
-*r3900:
-*vr4100:
-*vr5000:
-{
- DecodeCoproc (instruction_0);
-}
-
-
-0100,ZZ!0!1!3,5.COP_FUN0!8,5.COP_FUN1,16.COP_FUN2:NORMAL:32::COPz
-"cop<ZZ> <COP_FUN0><COP_FUN1><COP_FUN2>"
-*mipsI,mipsII,mipsIII,mipsIV:
-*vr4100:
-*r3900:
-{
- DecodeCoproc (instruction_0);
-}
-
-
-
-010000,10000,000000000000000,001000:COP0:32::TLBP
-"tlbp"
-*mipsI,mipsII,mipsIII,mipsIV:
-*vr4100:
-*vr5000:
-
-
-010000,10000,000000000000000,000001:COP0:32::TLBR
-"tlbr"
-*mipsI,mipsII,mipsIII,mipsIV:
-*vr4100:
-*vr5000:
-
-
-010000,10000,000000000000000,000010:COP0:32::TLBWI
-"tlbwi"
-*mipsI,mipsII,mipsIII,mipsIV:
-*vr4100:
-*vr5000:
-
-
-010000,10000,000000000000000,000110:COP0:32::TLBWR
-"tlbwr"
-*mipsI,mipsII,mipsIII,mipsIV:
-*vr4100:
-*vr5000:
-
-
-:include:::m16.igen
-:include:::tx.igen
-:include:::vr.igen
-
diff --git a/sim/mips/sim-main.c b/sim/mips/sim-main.c
deleted file mode 100644
index 7b3e6c61501..00000000000
--- a/sim/mips/sim-main.c
+++ /dev/null
@@ -1,564 +0,0 @@
-/* Copyright (C) 1998, Cygnus Solutions
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-#ifndef SIM_MAIN_C
-#define SIM_MAIN_C
-
-#include "sim-main.h"
-#include "sim-assert.h"
-
-
-/*---------------------------------------------------------------------------*/
-/*-- simulator engine -------------------------------------------------------*/
-/*---------------------------------------------------------------------------*/
-
-
-/* Description from page A-22 of the "MIPS IV Instruction Set" manual
- (revision 3.1) */
-/* Translate a virtual address to a physical address and cache
- coherence algorithm describing the mechanism used to resolve the
- memory reference. Given the virtual address vAddr, and whether the
- reference is to Instructions ot Data (IorD), find the corresponding
- physical address (pAddr) and the cache coherence algorithm (CCA)
- used to resolve the reference. If the virtual address is in one of
- the unmapped address spaces the physical address and the CCA are
- determined directly by the virtual address. If the virtual address
- is in one of the mapped address spaces then the TLB is used to
- determine the physical address and access type; if the required
- translation is not present in the TLB or the desired access is not
- permitted the function fails and an exception is taken.
-
- NOTE: Normally (RAW == 0), when address translation fails, this
- function raises an exception and does not return. */
-
-INLINE_SIM_MAIN
-(int)
-address_translation (SIM_DESC sd,
- sim_cpu * cpu,
- address_word cia,
- address_word vAddr,
- int IorD,
- int LorS,
- address_word * pAddr,
- int *CCA,
- int raw)
-{
- int res = -1; /* TRUE : Assume good return */
-
-#ifdef DEBUG
- sim_io_printf (sd, "AddressTranslation(0x%s,%s,%s,...);\n", pr_addr (vAddr), (IorD ? "isDATA" : "isINSTRUCTION"), (LorS ? "iSTORE" : "isLOAD"));
-#endif
-
- /* Check that the address is valid for this memory model */
-
- /* For a simple (flat) memory model, we simply pass virtual
- addressess through (mostly) unchanged. */
- vAddr &= 0xFFFFFFFF;
-
- *pAddr = vAddr; /* default for isTARGET */
- *CCA = Uncached; /* not used for isHOST */
-
- return (res);
-}
-
-
-
-/* Description from page A-23 of the "MIPS IV Instruction Set" manual
- (revision 3.1) */
-/* Prefetch data from memory. Prefetch is an advisory instruction for
- which an implementation specific action is taken. The action taken
- may increase performance, but must not change the meaning of the
- program, or alter architecturally-visible state. */
-
-INLINE_SIM_MAIN (void)
-prefetch (SIM_DESC sd,
- sim_cpu *cpu,
- address_word cia,
- int CCA,
- address_word pAddr,
- address_word vAddr,
- int DATA,
- int hint)
-{
-#ifdef DEBUG
- sim_io_printf(sd,"Prefetch(%d,0x%s,0x%s,%d,%d);\n",CCA,pr_addr(pAddr),pr_addr(vAddr),DATA,hint);
-#endif /* DEBUG */
-
- /* For our simple memory model we do nothing */
- return;
-}
-
-/* Description from page A-22 of the "MIPS IV Instruction Set" manual
- (revision 3.1) */
-/* Load a value from memory. Use the cache and main memory as
- specified in the Cache Coherence Algorithm (CCA) and the sort of
- access (IorD) to find the contents of AccessLength memory bytes
- starting at physical location pAddr. The data is returned in the
- fixed width naturally-aligned memory element (MemElem). The
- low-order two (or three) bits of the address and the AccessLength
- indicate which of the bytes within MemElem needs to be given to the
- processor. If the memory access type of the reference is uncached
- then only the referenced bytes are read from memory and valid
- within the memory element. If the access type is cached, and the
- data is not present in cache, an implementation specific size and
- alignment block of memory is read and loaded into the cache to
- satisfy a load reference. At a minimum, the block is the entire
- memory element. */
-INLINE_SIM_MAIN (void)
-load_memory (SIM_DESC SD,
- sim_cpu *CPU,
- address_word cia,
- uword64* memvalp,
- uword64* memval1p,
- int CCA,
- unsigned int AccessLength,
- address_word pAddr,
- address_word vAddr,
- int IorD)
-{
- uword64 value = 0;
- uword64 value1 = 0;
-
-#ifdef DEBUG
- sim_io_printf(sd,"DBG: LoadMemory(%p,%p,%d,%d,0x%s,0x%s,%s)\n",memvalp,memval1p,CCA,AccessLength,pr_addr(pAddr),pr_addr(vAddr),(IorD ? "isDATA" : "isINSTRUCTION"));
-#endif /* DEBUG */
-
-#if defined(WARN_MEM)
- if (CCA != uncached)
- sim_io_eprintf(sd,"LoadMemory CCA (%d) is not uncached (currently all accesses treated as cached)\n",CCA);
-#endif /* WARN_MEM */
-
- if (((pAddr & LOADDRMASK) + AccessLength) > LOADDRMASK)
- {
- /* In reality this should be a Bus Error */
- sim_io_error (SD, "LOAD AccessLength of %d would extend over %d bit aligned boundary for physical address 0x%s\n",
- AccessLength,
- (LOADDRMASK + 1) << 3,
- pr_addr (pAddr));
- }
-
-#if defined(TRACE)
- dotrace (SD, CPU, tracefh,((IorD == isDATA) ? 0 : 2),(unsigned int)(pAddr&0xFFFFFFFF),(AccessLength + 1),"load%s",((IorD == isDATA) ? "" : " instruction"));
-#endif /* TRACE */
-
- /* Read the specified number of bytes from memory. Adjust for
- host/target byte ordering/ Align the least significant byte
- read. */
-
- switch (AccessLength)
- {
- case AccessLength_QUADWORD :
- {
- unsigned_16 val = sim_core_read_aligned_16 (CPU, cia, read_map, pAddr);
- value1 = VH8_16 (val);
- value = VL8_16 (val);
- break;
- }
- case AccessLength_DOUBLEWORD :
- value = sim_core_read_aligned_8 (CPU, cia, read_map, pAddr);
- break;
- case AccessLength_SEPTIBYTE :
- value = sim_core_read_misaligned_7 (CPU, cia, read_map, pAddr);
- break;
- case AccessLength_SEXTIBYTE :
- value = sim_core_read_misaligned_6 (CPU, cia, read_map, pAddr);
- break;
- case AccessLength_QUINTIBYTE :
- value = sim_core_read_misaligned_5 (CPU, cia, read_map, pAddr);
- break;
- case AccessLength_WORD :
- value = sim_core_read_aligned_4 (CPU, cia, read_map, pAddr);
- break;
- case AccessLength_TRIPLEBYTE :
- value = sim_core_read_misaligned_3 (CPU, cia, read_map, pAddr);
- break;
- case AccessLength_HALFWORD :
- value = sim_core_read_aligned_2 (CPU, cia, read_map, pAddr);
- break;
- case AccessLength_BYTE :
- value = sim_core_read_aligned_1 (CPU, cia, read_map, pAddr);
- break;
- default:
- abort ();
- }
-
-#ifdef DEBUG
- printf("DBG: LoadMemory() : (offset %d) : value = 0x%s%s\n",
- (int)(pAddr & LOADDRMASK),pr_uword64(value1),pr_uword64(value));
-#endif /* DEBUG */
-
- /* See also store_memory. Position data in correct byte lanes. */
- if (AccessLength <= LOADDRMASK)
- {
- if (BigEndianMem)
- /* for big endian target, byte (pAddr&LOADDRMASK == 0) is
- shifted to the most significant byte position. */
- value <<= (((LOADDRMASK - (pAddr & LOADDRMASK)) - AccessLength) * 8);
- else
- /* For little endian target, byte (pAddr&LOADDRMASK == 0)
- is already in the correct postition. */
- value <<= ((pAddr & LOADDRMASK) * 8);
- }
-
-#ifdef DEBUG
- printf("DBG: LoadMemory() : shifted value = 0x%s%s\n",
- pr_uword64(value1),pr_uword64(value));
-#endif /* DEBUG */
-
- *memvalp = value;
- if (memval1p) *memval1p = value1;
-}
-
-
-/* Description from page A-23 of the "MIPS IV Instruction Set" manual
- (revision 3.1) */
-/* Store a value to memory. The specified data is stored into the
- physical location pAddr using the memory hierarchy (data caches and
- main memory) as specified by the Cache Coherence Algorithm
- (CCA). The MemElem contains the data for an aligned, fixed-width
- memory element (word for 32-bit processors, doubleword for 64-bit
- processors), though only the bytes that will actually be stored to
- memory need to be valid. The low-order two (or three) bits of pAddr
- and the AccessLength field indicates which of the bytes within the
- MemElem data should actually be stored; only these bytes in memory
- will be changed. */
-
-INLINE_SIM_MAIN (void)
-store_memory (SIM_DESC SD,
- sim_cpu *CPU,
- address_word cia,
- int CCA,
- unsigned int AccessLength,
- uword64 MemElem,
- uword64 MemElem1, /* High order 64 bits */
- address_word pAddr,
- address_word vAddr)
-{
-#ifdef DEBUG
- sim_io_printf(sd,"DBG: StoreMemory(%d,%d,0x%s,0x%s,0x%s,0x%s)\n",CCA,AccessLength,pr_uword64(MemElem),pr_uword64(MemElem1),pr_addr(pAddr),pr_addr(vAddr));
-#endif /* DEBUG */
-
-#if defined(WARN_MEM)
- if (CCA != uncached)
- sim_io_eprintf(sd,"StoreMemory CCA (%d) is not uncached (currently all accesses treated as cached)\n",CCA);
-#endif /* WARN_MEM */
-
- if (((pAddr & LOADDRMASK) + AccessLength) > LOADDRMASK)
- sim_io_error (SD, "STORE AccessLength of %d would extend over %d bit aligned boundary for physical address 0x%s\n",
- AccessLength,
- (LOADDRMASK + 1) << 3,
- pr_addr(pAddr));
-
-#if defined(TRACE)
- dotrace (SD, CPU, tracefh,1,(unsigned int)(pAddr&0xFFFFFFFF),(AccessLength + 1),"store");
-#endif /* TRACE */
-
-#ifdef DEBUG
- printf("DBG: StoreMemory: offset = %d MemElem = 0x%s%s\n",(unsigned int)(pAddr & LOADDRMASK),pr_uword64(MemElem1),pr_uword64(MemElem));
-#endif /* DEBUG */
-
- /* See also load_memory. Position data in correct byte lanes. */
- if (AccessLength <= LOADDRMASK)
- {
- if (BigEndianMem)
- /* for big endian target, byte (pAddr&LOADDRMASK == 0) is
- shifted to the most significant byte position. */
- MemElem >>= (((LOADDRMASK - (pAddr & LOADDRMASK)) - AccessLength) * 8);
- else
- /* For little endian target, byte (pAddr&LOADDRMASK == 0)
- is already in the correct postition. */
- MemElem >>= ((pAddr & LOADDRMASK) * 8);
- }
-
-#ifdef DEBUG
- printf("DBG: StoreMemory: shift = %d MemElem = 0x%s%s\n",shift,pr_uword64(MemElem1),pr_uword64(MemElem));
-#endif /* DEBUG */
-
- switch (AccessLength)
- {
- case AccessLength_QUADWORD :
- {
- unsigned_16 val = U16_8 (MemElem1, MemElem);
- sim_core_write_aligned_16 (CPU, cia, write_map, pAddr, val);
- break;
- }
- case AccessLength_DOUBLEWORD :
- sim_core_write_aligned_8 (CPU, cia, write_map, pAddr, MemElem);
- break;
- case AccessLength_SEPTIBYTE :
- sim_core_write_misaligned_7 (CPU, cia, write_map, pAddr, MemElem);
- break;
- case AccessLength_SEXTIBYTE :
- sim_core_write_misaligned_6 (CPU, cia, write_map, pAddr, MemElem);
- break;
- case AccessLength_QUINTIBYTE :
- sim_core_write_misaligned_5 (CPU, cia, write_map, pAddr, MemElem);
- break;
- case AccessLength_WORD :
- sim_core_write_aligned_4 (CPU, cia, write_map, pAddr, MemElem);
- break;
- case AccessLength_TRIPLEBYTE :
- sim_core_write_misaligned_3 (CPU, cia, write_map, pAddr, MemElem);
- break;
- case AccessLength_HALFWORD :
- sim_core_write_aligned_2 (CPU, cia, write_map, pAddr, MemElem);
- break;
- case AccessLength_BYTE :
- sim_core_write_aligned_1 (CPU, cia, write_map, pAddr, MemElem);
- break;
- default:
- abort ();
- }
-
- return;
-}
-
-
-INLINE_SIM_MAIN (unsigned32)
-ifetch32 (SIM_DESC SD,
- sim_cpu *CPU,
- address_word cia,
- address_word vaddr)
-{
- /* Copy the action of the LW instruction */
- address_word mask = LOADDRMASK;
- address_word access = AccessLength_WORD;
- address_word reverseendian = (ReverseEndian ? (mask ^ access) : 0);
- address_word bigendiancpu = (BigEndianCPU ? (mask ^ access) : 0);
- unsigned int byte;
- address_word paddr;
- int uncached;
- unsigned64 memval;
-
- if ((vaddr & access) != 0)
- SignalExceptionInstructionFetch ();
- AddressTranslation (vaddr, isINSTRUCTION, isLOAD, &paddr, &uncached, isTARGET, isREAL);
- paddr = ((paddr & ~mask) | ((paddr & mask) ^ reverseendian));
- LoadMemory (&memval, NULL, uncached, access, paddr, vaddr, isINSTRUCTION, isREAL);
- byte = ((vaddr & mask) ^ bigendiancpu);
- return (memval >> (8 * byte));
-}
-
-
-INLINE_SIM_MAIN (unsigned16)
-ifetch16 (SIM_DESC SD,
- sim_cpu *CPU,
- address_word cia,
- address_word vaddr)
-{
- /* Copy the action of the LH instruction */
- address_word mask = LOADDRMASK;
- address_word access = AccessLength_HALFWORD;
- address_word reverseendian = (ReverseEndian ? (mask ^ access) : 0);
- address_word bigendiancpu = (BigEndianCPU ? (mask ^ access) : 0);
- unsigned int byte;
- address_word paddr;
- int uncached;
- unsigned64 memval;
-
- if ((vaddr & access) != 0)
- SignalExceptionInstructionFetch ();
- AddressTranslation (vaddr, isINSTRUCTION, isLOAD, &paddr, &uncached, isTARGET, isREAL);
- paddr = ((paddr & ~mask) | ((paddr & mask) ^ reverseendian));
- LoadMemory (&memval, NULL, uncached, access, paddr, vaddr, isINSTRUCTION, isREAL);
- byte = ((vaddr & mask) ^ bigendiancpu);
- return (memval >> (8 * byte));
-}
-
-
-
-/* Description from page A-26 of the "MIPS IV Instruction Set" manual (revision 3.1) */
-/* Order loads and stores to synchronise shared memory. Perform the
- action necessary to make the effects of groups of synchronizable
- loads and stores indicated by stype occur in the same order for all
- processors. */
-INLINE_SIM_MAIN (void)
-sync_operation (SIM_DESC sd,
- sim_cpu *cpu,
- address_word cia,
- int stype)
-{
-#ifdef DEBUG
- sim_io_printf(sd,"SyncOperation(%d) : TODO\n",stype);
-#endif /* DEBUG */
- return;
-}
-
-INLINE_SIM_MAIN (void)
-cache_op (SIM_DESC SD,
- sim_cpu *CPU,
- address_word cia,
- int op,
- address_word pAddr,
- address_word vAddr,
- unsigned int instruction)
-{
-#if 1 /* stop warning message being displayed (we should really just remove the code) */
- static int icache_warning = 1;
- static int dcache_warning = 1;
-#else
- static int icache_warning = 0;
- static int dcache_warning = 0;
-#endif
-
- /* If CP0 is not useable (User or Supervisor mode) and the CP0
- enable bit in the Status Register is clear - a coprocessor
- unusable exception is taken. */
-#if 0
- sim_io_printf(SD,"TODO: Cache availability checking (PC = 0x%s)\n",pr_addr(cia));
-#endif
-
- switch (op & 0x3) {
- case 0: /* instruction cache */
- switch (op >> 2) {
- case 0: /* Index Invalidate */
- case 1: /* Index Load Tag */
- case 2: /* Index Store Tag */
- case 4: /* Hit Invalidate */
- case 5: /* Fill */
- case 6: /* Hit Writeback */
- if (!icache_warning)
- {
- sim_io_eprintf(SD,"Instruction CACHE operation %d to be coded\n",(op >> 2));
- icache_warning = 1;
- }
- break;
-
- default:
- SignalException(ReservedInstruction,instruction);
- break;
- }
- break;
-
- case 1: /* data cache */
- case 3: /* secondary data cache */
- switch (op >> 2) {
- case 0: /* Index Writeback Invalidate */
- case 1: /* Index Load Tag */
- case 2: /* Index Store Tag */
- case 3: /* Create Dirty */
- case 4: /* Hit Invalidate */
- case 5: /* Hit Writeback Invalidate */
- case 6: /* Hit Writeback */
- if (!dcache_warning)
- {
- sim_io_eprintf(SD,"Data CACHE operation %d to be coded\n",(op >> 2));
- dcache_warning = 1;
- }
- break;
-
- default:
- SignalException(ReservedInstruction,instruction);
- break;
- }
- break;
-
- default: /* unrecognised cache ID */
- SignalException(ReservedInstruction,instruction);
- break;
- }
-
- return;
-}
-
-
-INLINE_SIM_MAIN (void)
-pending_tick (SIM_DESC SD,
- sim_cpu *CPU,
- address_word cia)
-{
- if (PENDING_TRACE)
- sim_io_eprintf (SD, "PENDING_DRAIN - 0x%lx - pending_in = %d, pending_out = %d, pending_total = %d\n", (unsigned long) cia, PENDING_IN, PENDING_OUT, PENDING_TOTAL);
- if (PENDING_OUT != PENDING_IN)
- {
- int loop;
- int index = PENDING_OUT;
- int total = PENDING_TOTAL;
- if (PENDING_TOTAL == 0)
- sim_engine_abort (SD, CPU, cia, "PENDING_DRAIN - Mis-match on pending update pointers\n");
- for (loop = 0, index = PENDING_OUT;
- (loop < total);
- loop++, index = (index + 1) % PSLOTS)
- {
- if (PENDING_SLOT_DEST[index] != NULL)
- {
- PENDING_SLOT_DELAY[index] -= 1;
- if (PENDING_SLOT_DELAY[index] == 0)
- {
- if (PENDING_TRACE)
- sim_io_eprintf (SD, "PENDING_DRAIN - drained - index %d, dest 0x%lx, bit %d, val 0x%lx, size %d\n",
- index,
- (unsigned long) PENDING_SLOT_DEST[index],
- PENDING_SLOT_BIT[index],
- (unsigned long) PENDING_SLOT_VALUE[index],
- PENDING_SLOT_SIZE[index]);
- if (PENDING_SLOT_BIT[index] >= 0)
- switch (PENDING_SLOT_SIZE[index])
- {
- case 4:
- if (PENDING_SLOT_VALUE[index])
- *(unsigned32*)PENDING_SLOT_DEST[index] |=
- BIT32 (PENDING_SLOT_BIT[index]);
- else
- *(unsigned32*)PENDING_SLOT_DEST[index] &=
- BIT32 (PENDING_SLOT_BIT[index]);
- break;
- case 8:
- if (PENDING_SLOT_VALUE[index])
- *(unsigned64*)PENDING_SLOT_DEST[index] |=
- BIT64 (PENDING_SLOT_BIT[index]);
- else
- *(unsigned64*)PENDING_SLOT_DEST[index] &=
- BIT64 (PENDING_SLOT_BIT[index]);
- break;
- }
- else
- switch (PENDING_SLOT_SIZE[index])
- {
- case 4:
- *(unsigned32*)PENDING_SLOT_DEST[index] =
- PENDING_SLOT_VALUE[index];
- break;
- case 8:
- *(unsigned64*)PENDING_SLOT_DEST[index] =
- PENDING_SLOT_VALUE[index];
- break;
- }
- if (PENDING_OUT == index)
- {
- PENDING_SLOT_DEST[index] = NULL;
- PENDING_OUT = (PENDING_OUT + 1) % PSLOTS;
- PENDING_TOTAL--;
- }
- }
- else if (PENDING_TRACE && PENDING_SLOT_DELAY[index] > 0)
- sim_io_eprintf (SD, "PENDING_DRAIN - queued - index %d, delay %d, dest 0x%lx, bit %d, val 0x%lx, size %d\n",
- index, PENDING_SLOT_DELAY[index],
- (unsigned long) PENDING_SLOT_DEST[index],
- PENDING_SLOT_BIT[index],
- (unsigned long) PENDING_SLOT_VALUE[index],
- PENDING_SLOT_SIZE[index]);
-
- }
- }
- }
-}
-
-
-#endif
diff --git a/sim/mips/sim-main.h b/sim/mips/sim-main.h
deleted file mode 100644
index 8a1b7f76703..00000000000
--- a/sim/mips/sim-main.h
+++ /dev/null
@@ -1,788 +0,0 @@
-/* MIPS Simulator definition.
- Copyright (C) 1997, 1998 Free Software Foundation, Inc.
- Contributed by Cygnus Support.
-
-This file is part of GDB, the GNU debugger.
-
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License along
-with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
-
-#ifndef SIM_MAIN_H
-#define SIM_MAIN_H
-
-/* This simulator doesn't cache the Current Instruction Address */
-/* #define SIM_ENGINE_HALT_HOOK(SD, LAST_CPU, CIA) */
-/* #define SIM_ENGINE_RESUME_HOOK(SD, LAST_CPU, CIA) */
-
-#define SIM_HAVE_BIENDIAN
-
-
-/* hobble some common features for moment */
-#define WITH_WATCHPOINTS 1
-#define WITH_MODULO_MEMORY 1
-
-
-#define SIM_CORE_SIGNAL(SD,CPU,CIA,MAP,NR_BYTES,ADDR,TRANSFER,ERROR) \
-mips_core_signal ((SD), (CPU), (CIA), (MAP), (NR_BYTES), (ADDR), (TRANSFER), (ERROR))
-
-#include "sim-basics.h"
-
-typedef address_word sim_cia;
-
-#include "sim-base.h"
-
-
-/* Depreciated macros and types for manipulating 64bit values. Use
- ../common/sim-bits.h and ../common/sim-endian.h macros instead. */
-
-typedef signed64 word64;
-typedef unsigned64 uword64;
-
-#define WORD64LO(t) (unsigned int)((t)&0xFFFFFFFF)
-#define WORD64HI(t) (unsigned int)(((uword64)(t))>>32)
-#define SET64LO(t) (((uword64)(t))&0xFFFFFFFF)
-#define SET64HI(t) (((uword64)(t))<<32)
-#define WORD64(h,l) ((word64)((SET64HI(h)|SET64LO(l))))
-#define UWORD64(h,l) (SET64HI(h)|SET64LO(l))
-
-/* Sign-extend the given value (e) as a value (b) bits long. We cannot
- assume the HI32bits of the operand are zero, so we must perform a
- mask to ensure we can use the simple subtraction to sign-extend. */
-#define SIGNEXTEND(e,b) \
- ((unsigned_word) \
- (((e) & ((uword64) 1 << ((b) - 1))) \
- ? (((e) & (((uword64) 1 << (b)) - 1)) - ((uword64)1 << (b))) \
- : ((e) & (((((uword64) 1 << ((b) - 1)) - 1) << 1) | 1))))
-
-/* Check if a value will fit within a halfword: */
-#define NOTHALFWORDVALUE(v) ((((((uword64)(v)>>16) == 0) && !((v) & ((unsigned)1 << 15))) || (((((uword64)(v)>>32) == 0xFFFFFFFF) && ((((uword64)(v)>>16) & 0xFFFF) == 0xFFFF)) && ((v) & ((unsigned)1 << 15)))) ? (1 == 0) : (1 == 1))
-
-
-
-/* Floating-point operations: */
-
-#include "sim-fpu.h"
-
-/* FPU registers must be one of the following types. All other values
- are reserved (and undefined). */
-typedef enum {
- fmt_single = 0,
- fmt_double = 1,
- fmt_word = 4,
- fmt_long = 5,
- /* The following are well outside the normal acceptable format
- range, and are used in the register status vector. */
- fmt_unknown = 0x10000000,
- fmt_uninterpreted = 0x20000000,
- fmt_uninterpreted_32 = 0x40000000,
- fmt_uninterpreted_64 = 0x80000000U,
-} FP_formats;
-
-unsigned64 value_fpr PARAMS ((SIM_DESC sd, sim_cpu *cpu, address_word cia, int fpr, FP_formats));
-#define ValueFPR(FPR,FMT) value_fpr (SD, CPU, cia, (FPR), (FMT))
-
-void store_fpr PARAMS ((SIM_DESC sd, sim_cpu *cpu, address_word cia, int fpr, FP_formats fmt, unsigned64 value));
-#define StoreFPR(FPR,FMT,VALUE) store_fpr (SD, CPU, cia, (FPR), (FMT), (VALUE))
-
-int NaN PARAMS ((unsigned64 op, FP_formats fmt));
-int Infinity PARAMS ((unsigned64 op, FP_formats fmt));
-int Less PARAMS ((unsigned64 op1, unsigned64 op2, FP_formats fmt));
-int Equal PARAMS ((unsigned64 op1, unsigned64 op2, FP_formats fmt));
-unsigned64 AbsoluteValue PARAMS ((unsigned64 op, FP_formats fmt));
-unsigned64 Negate PARAMS ((unsigned64 op, FP_formats fmt));
-unsigned64 Add PARAMS ((unsigned64 op1, unsigned64 op2, FP_formats fmt));
-unsigned64 Sub PARAMS ((unsigned64 op1, unsigned64 op2, FP_formats fmt));
-unsigned64 Multiply PARAMS ((unsigned64 op1, unsigned64 op2, FP_formats fmt));
-unsigned64 Divide PARAMS ((unsigned64 op1, unsigned64 op2, FP_formats fmt));
-unsigned64 Recip PARAMS ((unsigned64 op, FP_formats fmt));
-unsigned64 SquareRoot PARAMS ((unsigned64 op, FP_formats fmt));
-unsigned64 Max PARAMS ((unsigned64 op1, unsigned64 op2, FP_formats fmt));
-unsigned64 Min PARAMS ((unsigned64 op1, unsigned64 op2, FP_formats fmt));
-unsigned64 convert PARAMS ((SIM_DESC sd, sim_cpu *cpu, address_word cia, int rm, unsigned64 op, FP_formats from, FP_formats to));
-#define Convert(rm,op,from,to) \
-convert (SD, CPU, cia, rm, op, from, to)
-
-/* Macro to update FPSR condition-code field. This is complicated by
- the fact that there is a hole in the index range of the bits within
- the FCSR register. Also, the number of bits visible depends on the
- MIPS ISA version being supported. */
-
-#define SETFCC(cc,v) {\
- int bit = ((cc == 0) ? 23 : (24 + (cc)));\
- FCSR = ((FCSR & ~(1 << bit)) | ((v) << bit));\
-}
-#define GETFCC(cc) (((((cc) == 0) ? (FCSR & (1 << 23)) : (FCSR & (1 << (24 + (cc))))) != 0) ? 1U : 0)
-
-/* This should be the COC1 value at the start of the preceding
- instruction: */
-#define PREVCOC1() ((STATE & simPCOC1) ? 1 : 0)
-
-#ifdef TARGET_ENABLE_FR
-/* FIXME: this should be enabled for all targets, but needs testing first. */
-#define SizeFGR() (((WITH_TARGET_FLOATING_POINT_BITSIZE) == 64) \
- ? ((SR & status_FR) ? 64 : 32) \
- : (WITH_TARGET_FLOATING_POINT_BITSIZE))
-#else
-#define SizeFGR() (WITH_TARGET_FLOATING_POINT_BITSIZE)
-#endif
-
-/* Standard FCRS bits: */
-#define IR (0) /* Inexact Result */
-#define UF (1) /* UnderFlow */
-#define OF (2) /* OverFlow */
-#define DZ (3) /* Division by Zero */
-#define IO (4) /* Invalid Operation */
-#define UO (5) /* Unimplemented Operation */
-
-/* Get masks for individual flags: */
-#if 1 /* SAFE version */
-#define FP_FLAGS(b) (((unsigned)(b) < 5) ? (1 << ((b) + 2)) : 0)
-#define FP_ENABLE(b) (((unsigned)(b) < 5) ? (1 << ((b) + 7)) : 0)
-#define FP_CAUSE(b) (((unsigned)(b) < 6) ? (1 << ((b) + 12)) : 0)
-#else
-#define FP_FLAGS(b) (1 << ((b) + 2))
-#define FP_ENABLE(b) (1 << ((b) + 7))
-#define FP_CAUSE(b) (1 << ((b) + 12))
-#endif
-
-#define FP_FS (1 << 24) /* MIPS III onwards : Flush to Zero */
-
-#define FP_MASK_RM (0x3)
-#define FP_SH_RM (0)
-#define FP_RM_NEAREST (0) /* Round to nearest (Round) */
-#define FP_RM_TOZERO (1) /* Round to zero (Trunc) */
-#define FP_RM_TOPINF (2) /* Round to Plus infinity (Ceil) */
-#define FP_RM_TOMINF (3) /* Round to Minus infinity (Floor) */
-#define GETRM() (int)((FCSR >> FP_SH_RM) & FP_MASK_RM)
-
-
-
-
-
-
-/* HI/LO register accesses */
-
-/* For some MIPS targets, the HI/LO registers have certain timing
- restrictions in that, for instance, a read of a HI register must be
- separated by at least three instructions from a preceeding read.
-
- The struct below is used to record the last access by each of A MT,
- MF or other OP instruction to a HI/LO register. See mips.igen for
- more details. */
-
-typedef struct _hilo_access {
- signed64 timestamp;
- address_word cia;
-} hilo_access;
-
-typedef struct _hilo_history {
- hilo_access mt;
- hilo_access mf;
- hilo_access op;
-} hilo_history;
-
-
-
-
-/* Integer ALU operations: */
-
-#include "sim-alu.h"
-
-#define ALU32_END(ANS) \
- if (ALU32_HAD_OVERFLOW) \
- SignalExceptionIntegerOverflow (); \
- (ANS) = (signed32) ALU32_OVERFLOW_RESULT
-
-
-#define ALU64_END(ANS) \
- if (ALU64_HAD_OVERFLOW) \
- SignalExceptionIntegerOverflow (); \
- (ANS) = ALU64_OVERFLOW_RESULT;
-
-
-
-
-
-/* The following is probably not used for MIPS IV onwards: */
-/* Slots for delayed register updates. For the moment we just have a
- fixed number of slots (rather than a more generic, dynamic
- system). This keeps the simulator fast. However, we only allow
- for the register update to be delayed for a single instruction
- cycle. */
-#define PSLOTS (8) /* Maximum number of instruction cycles */
-
-typedef struct _pending_write_queue {
- int in;
- int out;
- int total;
- int slot_delay[PSLOTS];
- int slot_size[PSLOTS];
- int slot_bit[PSLOTS];
- void *slot_dest[PSLOTS];
- unsigned64 slot_value[PSLOTS];
-} pending_write_queue;
-
-#ifndef PENDING_TRACE
-#define PENDING_TRACE 0
-#endif
-#define PENDING_IN ((CPU)->pending.in)
-#define PENDING_OUT ((CPU)->pending.out)
-#define PENDING_TOTAL ((CPU)->pending.total)
-#define PENDING_SLOT_SIZE ((CPU)->pending.slot_size)
-#define PENDING_SLOT_BIT ((CPU)->pending.slot_bit)
-#define PENDING_SLOT_DELAY ((CPU)->pending.slot_delay)
-#define PENDING_SLOT_DEST ((CPU)->pending.slot_dest)
-#define PENDING_SLOT_VALUE ((CPU)->pending.slot_value)
-
-/* Invalidate the pending write queue, all pending writes are
- discarded. */
-
-#define PENDING_INVALIDATE() \
-memset (&(CPU)->pending, 0, sizeof ((CPU)->pending))
-
-/* Schedule a write to DEST for N cycles time. For 64 bit
- destinations, schedule two writes. For floating point registers,
- the caller should schedule a write to both the dest register and
- the FPR_STATE register. When BIT is non-negative, only BIT of DEST
- is updated. */
-
-#define PENDING_SCHED(DEST,VAL,DELAY,BIT) \
- do { \
- if (PENDING_SLOT_DEST[PENDING_IN] != NULL) \
- sim_engine_abort (SD, CPU, cia, \
- "PENDING_SCHED - buffer overflow\n"); \
- if (PENDING_TRACE) \
- sim_io_eprintf (SD, "PENDING_SCHED - 0x%lx - dest 0x%lx, val 0x%lx, bit %d, size %d, pending_in %d, pending_out %d, pending_total %d\n", \
- (unsigned long) cia, (unsigned long) &(DEST), \
- (unsigned long) (VAL), (BIT), (int) sizeof (DEST),\
- PENDING_IN, PENDING_OUT, PENDING_TOTAL); \
- PENDING_SLOT_DELAY[PENDING_IN] = (DELAY) + 1; \
- PENDING_SLOT_DEST[PENDING_IN] = &(DEST); \
- PENDING_SLOT_VALUE[PENDING_IN] = (VAL); \
- PENDING_SLOT_SIZE[PENDING_IN] = sizeof (DEST); \
- PENDING_SLOT_BIT[PENDING_IN] = (BIT); \
- PENDING_IN = (PENDING_IN + 1) % PSLOTS; \
- PENDING_TOTAL += 1; \
- } while (0)
-
-#define PENDING_WRITE(DEST,VAL,DELAY) PENDING_SCHED(DEST,VAL,DELAY,-1)
-#define PENDING_BIT(DEST,VAL,DELAY,BIT) PENDING_SCHED(DEST,VAL,DELAY,BIT)
-
-#define PENDING_TICK() pending_tick (SD, CPU, cia)
-
-#define PENDING_FLUSH() abort () /* think about this one */
-#define PENDING_FP() abort () /* think about this one */
-
-/* For backward compatibility */
-#define PENDING_FILL(R,VAL) \
-do { \
- if ((R) >= FGRIDX && (R) < FGRIDX + NR_FGR) \
- { \
- PENDING_SCHED(FGR[(R) - FGRIDX], VAL, 1, -1); \
- PENDING_SCHED(FPR_STATE[(R) - FGRIDX], fmt_uninterpreted, 1, -1); \
- } \
- else \
- PENDING_SCHED(GPR[(R)], VAL, 1, -1); \
-} while (0)
-
-
-
-struct _sim_cpu {
-
-
- /* The following are internal simulator state variables: */
-#define CIA_GET(CPU) ((CPU)->registers[PCIDX] + 0)
-#define CIA_SET(CPU,CIA) ((CPU)->registers[PCIDX] = (CIA))
- address_word dspc; /* delay-slot PC */
-#define DSPC ((CPU)->dspc)
-
-#define DELAY_SLOT(TARGET) NIA = delayslot32 (SD_, (TARGET))
-#define NULLIFY_NEXT_INSTRUCTION() NIA = nullify_next_insn32 (SD_)
-
-
- /* State of the simulator */
- unsigned int state;
- unsigned int dsstate;
-#define STATE ((CPU)->state)
-#define DSSTATE ((CPU)->dsstate)
-
-/* Flags in the "state" variable: */
-#define simHALTEX (1 << 2) /* 0 = run; 1 = halt on exception */
-#define simHALTIN (1 << 3) /* 0 = run; 1 = halt on interrupt */
-#define simTRACE (1 << 8) /* 0 = do nothing; 1 = trace address activity */
-#define simPCOC0 (1 << 17) /* COC[1] from current */
-#define simPCOC1 (1 << 18) /* COC[1] from previous */
-#define simDELAYSLOT (1 << 24) /* 0 = do nothing; 1 = delay slot entry exists */
-#define simSKIPNEXT (1 << 25) /* 0 = do nothing; 1 = skip instruction */
-#define simSIGINT (1 << 28) /* 0 = do nothing; 1 = SIGINT has occured */
-#define simJALDELAYSLOT (1 << 29) /* 1 = in jal delay slot */
-
-#ifndef ENGINE_ISSUE_PREFIX_HOOK
-#define ENGINE_ISSUE_PREFIX_HOOK() \
- { \
- /* Perform any pending writes */ \
- PENDING_TICK(); \
- /* Set previous flag, depending on current: */ \
- if (STATE & simPCOC0) \
- STATE |= simPCOC1; \
- else \
- STATE &= ~simPCOC1; \
- /* and update the current value: */ \
- if (GETFCC(0)) \
- STATE |= simPCOC0; \
- else \
- STATE &= ~simPCOC0; \
- }
-#endif /* ENGINE_ISSUE_PREFIX_HOOK */
-
-
-/* This is nasty, since we have to rely on matching the register
- numbers used by GDB. Unfortunately, depending on the MIPS target
- GDB uses different register numbers. We cannot just include the
- relevant "gdb/tm.h" link, since GDB may not be configured before
- the sim world, and also the GDB header file requires too much other
- state. */
-
-#ifndef TM_MIPS_H
-#define LAST_EMBED_REGNUM (89)
-#define NUM_REGS (LAST_EMBED_REGNUM + 1)
-
-
-#endif
-
-
-enum float_operation
- {
- FLOP_ADD, FLOP_SUB, FLOP_MUL, FLOP_MADD,
- FLOP_MSUB, FLOP_MAX=10, FLOP_MIN, FLOP_ABS,
- FLOP_ITOF0=14, FLOP_FTOI0=18, FLOP_NEG=23
- };
-
-/* To keep this default simulator simple, and fast, we use a direct
- vector of registers. The internal simulator engine then uses
- manifests to access the correct slot. */
-
- unsigned_word registers[LAST_EMBED_REGNUM + 1];
-
- int register_widths[NUM_REGS];
-#define REGISTERS ((CPU)->registers)
-
-#define GPR (&REGISTERS[0])
-#define GPR_SET(N,VAL) (REGISTERS[(N)] = (VAL))
-
- /* While space is allocated for the floating point registers in the
- main registers array, they are stored separatly. This is because
- their size may not necessarily match the size of either the
- general-purpose or system specific registers */
-#define NR_FGR (32)
-#define FGRIDX (38)
- fp_word fgr[NR_FGR];
-#define FGR ((CPU)->fgr)
-
-#define LO (REGISTERS[33])
-#define HI (REGISTERS[34])
-#define PCIDX 37
-#define PC (REGISTERS[PCIDX])
-#define CAUSE (REGISTERS[36])
-#define SRIDX (32)
-#define SR (REGISTERS[SRIDX]) /* CPU status register */
-#define FCR0IDX (71)
-#define FCR0 (REGISTERS[FCR0IDX]) /* really a 32bit register */
-#define FCR31IDX (70)
-#define FCR31 (REGISTERS[FCR31IDX]) /* really a 32bit register */
-#define FCSR (FCR31)
-#define Debug (REGISTERS[86])
-#define DEPC (REGISTERS[87])
-#define EPC (REGISTERS[88])
-
- /* All internal state modified by signal_exception() that may need to be
- rolled back for passing moment-of-exception image back to gdb. */
- unsigned_word exc_trigger_registers[LAST_EMBED_REGNUM + 1];
- unsigned_word exc_suspend_registers[LAST_EMBED_REGNUM + 1];
- int exc_suspended;
-
-#define SIM_CPU_EXCEPTION_TRIGGER(SD,CPU,CIA) mips_cpu_exception_trigger(SD,CPU,CIA)
-#define SIM_CPU_EXCEPTION_SUSPEND(SD,CPU,EXC) mips_cpu_exception_suspend(SD,CPU,EXC)
-#define SIM_CPU_EXCEPTION_RESUME(SD,CPU,EXC) mips_cpu_exception_resume(SD,CPU,EXC)
-
- unsigned_word c0_config_reg;
-#define C0_CONFIG ((CPU)->c0_config_reg)
-
-/* The following are pseudonyms for standard registers */
-#define ZERO (REGISTERS[0])
-#define V0 (REGISTERS[2])
-#define A0 (REGISTERS[4])
-#define A1 (REGISTERS[5])
-#define A2 (REGISTERS[6])
-#define A3 (REGISTERS[7])
-#define T8IDX 24
-#define T8 (REGISTERS[T8IDX])
-#define SPIDX 29
-#define SP (REGISTERS[SPIDX])
-#define RAIDX 31
-#define RA (REGISTERS[RAIDX])
-
- /* While space is allocated in the main registers arrray for some of
- the COP0 registers, that space isn't sufficient. Unknown COP0
- registers overflow into the array below */
-
-#define NR_COP0_GPR 32
- unsigned_word cop0_gpr[NR_COP0_GPR];
-#define COP0_GPR ((CPU)->cop0_gpr)
-#define COP0_BADVADDR ((unsigned32)(COP0_GPR[8]))
-
- /* Keep the current format state for each register: */
- FP_formats fpr_state[32];
-#define FPR_STATE ((CPU)->fpr_state)
-
- pending_write_queue pending;
-
- /* LLBIT = Load-Linked bit. A bit of "virtual" state used by atomic
- read-write instructions. It is set when a linked load occurs. It
- is tested and cleared by the conditional store. It is cleared
- (during other CPU operations) when a store to the location would
- no longer be atomic. In particular, it is cleared by exception
- return instructions. */
- int llbit;
-#define LLBIT ((CPU)->llbit)
-
-
-/* The HIHISTORY and LOHISTORY timestamps are used to ensure that
- corruptions caused by using the HI or LO register too close to a
- following operation is spotted. See mips.igen for more details. */
-
- hilo_history hi_history;
-#define HIHISTORY (&(CPU)->hi_history)
- hilo_history lo_history;
-#define LOHISTORY (&(CPU)->lo_history)
-
-#define check_branch_bug()
-#define mark_branch_bug(TARGET)
-
-
-
- sim_cpu_base base;
-};
-
-
-/* MIPS specific simulator watch config */
-
-void watch_options_install PARAMS ((SIM_DESC sd));
-
-struct swatch {
- sim_event *pc;
- sim_event *clock;
- sim_event *cycles;
-};
-
-
-/* FIXME: At present much of the simulator is still static */
-struct sim_state {
-
- struct swatch watch;
-
- sim_cpu cpu[MAX_NR_PROCESSORS];
-#if (WITH_SMP)
-#define STATE_CPU(sd,n) (&(sd)->cpu[n])
-#else
-#define STATE_CPU(sd,n) (&(sd)->cpu[0])
-#endif
-
-
- sim_state_base base;
-};
-
-
-
-/* Status information: */
-
-/* TODO : these should be the bitmasks for these bits within the
- status register. At the moment the following are VR4300
- bit-positions: */
-#define status_KSU_mask (0x18) /* mask for KSU bits */
-#define status_KSU_shift (3) /* shift for field */
-#define ksu_kernel (0x0)
-#define ksu_supervisor (0x1)
-#define ksu_user (0x2)
-#define ksu_unknown (0x3)
-
-#define SR_KSU ((SR & status_KSU_mask) >> status_KSU_shift)
-
-#define status_IE (1 << 0) /* Interrupt enable */
-#define status_EIE (1 << 16) /* Enable Interrupt Enable */
-#define status_EXL (1 << 1) /* Exception level */
-#define status_RE (1 << 25) /* Reverse Endian in user mode */
-#define status_FR (1 << 26) /* enables MIPS III additional FP registers */
-#define status_SR (1 << 20) /* soft reset or NMI */
-#define status_BEV (1 << 22) /* Location of general exception vectors */
-#define status_TS (1 << 21) /* TLB shutdown has occurred */
-#define status_ERL (1 << 2) /* Error level */
-#define status_IM7 (1 << 15) /* Timer Interrupt Mask */
-#define status_RP (1 << 27) /* Reduced Power mode */
-
-/* Specializations for TX39 family */
-#define status_IEc (1 << 0) /* Interrupt enable (current) */
-#define status_KUc (1 << 1) /* Kernel/User mode */
-#define status_IEp (1 << 2) /* Interrupt enable (previous) */
-#define status_KUp (1 << 3) /* Kernel/User mode */
-#define status_IEo (1 << 4) /* Interrupt enable (old) */
-#define status_KUo (1 << 5) /* Kernel/User mode */
-#define status_IM_mask (0xff) /* Interrupt mask */
-#define status_IM_shift (8)
-#define status_NMI (1 << 20) /* NMI */
-#define status_NMI (1 << 20) /* NMI */
-
-#define cause_BD ((unsigned)1 << 31) /* L1 Exception in branch delay slot */
-#define cause_BD2 (1 << 30) /* L2 Exception in branch delay slot */
-#define cause_CE_mask 0x30000000 /* Coprocessor exception */
-#define cause_CE_shift 28
-#define cause_EXC2_mask 0x00070000
-#define cause_EXC2_shift 16
-#define cause_IP7 (1 << 15) /* Interrupt pending */
-#define cause_SIOP (1 << 12) /* SIO pending */
-#define cause_IP3 (1 << 11) /* Int 0 pending */
-#define cause_IP2 (1 << 10) /* Int 1 pending */
-
-#define cause_EXC_mask (0x1c) /* Exception code */
-#define cause_EXC_shift (2)
-
-#define cause_SW0 (1 << 8) /* Software interrupt 0 */
-#define cause_SW1 (1 << 9) /* Software interrupt 1 */
-#define cause_IP_mask (0x3f) /* Interrupt pending field */
-#define cause_IP_shift (10)
-
-#define cause_set_EXC(x) CAUSE = (CAUSE & ~cause_EXC_mask) | ((x << cause_EXC_shift) & cause_EXC_mask)
-#define cause_set_EXC2(x) CAUSE = (CAUSE & ~cause_EXC2_mask) | ((x << cause_EXC2_shift) & cause_EXC2_mask)
-
-
-/* NOTE: We keep the following status flags as bit values (1 for true,
- 0 for false). This allows them to be used in binary boolean
- operations without worrying about what exactly the non-zero true
- value is. */
-
-/* UserMode */
-#ifdef SUBTARGET_R3900
-#define UserMode ((SR & status_KUc) ? 1 : 0)
-#else
-#define UserMode ((((SR & status_KSU_mask) >> status_KSU_shift) == ksu_user) ? 1 : 0)
-#endif /* SUBTARGET_R3900 */
-
-/* BigEndianMem */
-/* Hardware configuration. Affects endianness of LoadMemory and
- StoreMemory and the endianness of Kernel and Supervisor mode
- execution. The value is 0 for little-endian; 1 for big-endian. */
-#define BigEndianMem (CURRENT_TARGET_BYTE_ORDER == BIG_ENDIAN)
-/*(state & simBE) ? 1 : 0)*/
-
-/* ReverseEndian */
-/* This mode is selected if in User mode with the RE bit being set in
- SR (Status Register). It reverses the endianness of load and store
- instructions. */
-#define ReverseEndian (((SR & status_RE) && UserMode) ? 1 : 0)
-
-/* BigEndianCPU */
-/* The endianness for load and store instructions (0=little;1=big). In
- User mode this endianness may be switched by setting the state_RE
- bit in the SR register. Thus, BigEndianCPU may be computed as
- (BigEndianMem EOR ReverseEndian). */
-#define BigEndianCPU (BigEndianMem ^ ReverseEndian) /* Already bits */
-
-
-
-/* Exceptions: */
-
-/* NOTE: These numbers depend on the processor architecture being
- simulated: */
-enum ExceptionCause {
- Interrupt = 0,
- TLBModification = 1,
- TLBLoad = 2,
- TLBStore = 3,
- AddressLoad = 4,
- AddressStore = 5,
- InstructionFetch = 6,
- DataReference = 7,
- SystemCall = 8,
- BreakPoint = 9,
- ReservedInstruction = 10,
- CoProcessorUnusable = 11,
- IntegerOverflow = 12, /* Arithmetic overflow (IDT monitor raises SIGFPE) */
- Trap = 13,
- FPE = 15,
- DebugBreakPoint = 16,
- Watch = 23,
- NMIReset = 31,
-
-
-/* The following exception code is actually private to the simulator
- world. It is *NOT* a processor feature, and is used to signal
- run-time errors in the simulator. */
- SimulatorFault = 0xFFFFFFFF
-};
-
-#define TLB_REFILL (0)
-#define TLB_INVALID (1)
-
-
-/* The following break instructions are reserved for use by the
- simulator. The first is used to halt the simulation. The second
- is used by gdb for break-points. NOTE: Care must be taken, since
- this value may be used in later revisions of the MIPS ISA. */
-#define HALT_INSTRUCTION_MASK (0x03FFFFC0)
-
-#define HALT_INSTRUCTION (0x03ff000d)
-#define HALT_INSTRUCTION2 (0x0000ffcd)
-
-
-#define BREAKPOINT_INSTRUCTION (0x0005000d)
-#define BREAKPOINT_INSTRUCTION2 (0x0000014d)
-
-
-
-void interrupt_event (SIM_DESC sd, void *data);
-
-void signal_exception (SIM_DESC sd, sim_cpu *cpu, address_word cia, int exception, ...);
-#define SignalException(exc,instruction) signal_exception (SD, CPU, cia, (exc), (instruction))
-#define SignalExceptionInterrupt(level) signal_exception (SD, CPU, cia, Interrupt, level)
-#define SignalExceptionInstructionFetch() signal_exception (SD, CPU, cia, InstructionFetch)
-#define SignalExceptionAddressStore() signal_exception (SD, CPU, cia, AddressStore)
-#define SignalExceptionAddressLoad() signal_exception (SD, CPU, cia, AddressLoad)
-#define SignalExceptionDataReference() signal_exception (SD, CPU, cia, DataReference)
-#define SignalExceptionSimulatorFault(buf) signal_exception (SD, CPU, cia, SimulatorFault, buf)
-#define SignalExceptionFPE() signal_exception (SD, CPU, cia, FPE)
-#define SignalExceptionIntegerOverflow() signal_exception (SD, CPU, cia, IntegerOverflow)
-#define SignalExceptionCoProcessorUnusable() signal_exception (SD, CPU, cia, CoProcessorUnusable)
-#define SignalExceptionNMIReset() signal_exception (SD, CPU, cia, NMIReset)
-#define SignalExceptionTLBRefillStore() signal_exception (SD, CPU, cia, TLBStore, TLB_REFILL)
-#define SignalExceptionTLBRefillLoad() signal_exception (SD, CPU, cia, TLBLoad, TLB_REFILL)
-#define SignalExceptionTLBInvalidStore() signal_exception (SD, CPU, cia, TLBStore, TLB_INVALID)
-#define SignalExceptionTLBInvalidLoad() signal_exception (SD, CPU, cia, TLBLoad, TLB_INVALID)
-#define SignalExceptionTLBModification() signal_exception (SD, CPU, cia, TLBModification)
-
-/* Co-processor accesses */
-
-void cop_lw PARAMS ((SIM_DESC sd, sim_cpu *cpu, address_word cia, int coproc_num, int coproc_reg, unsigned int memword));
-void cop_ld PARAMS ((SIM_DESC sd, sim_cpu *cpu, address_word cia, int coproc_num, int coproc_reg, uword64 memword));
-unsigned int cop_sw PARAMS ((SIM_DESC sd, sim_cpu *cpu, address_word cia, int coproc_num, int coproc_reg));
-uword64 cop_sd PARAMS ((SIM_DESC sd, sim_cpu *cpu, address_word cia, int coproc_num, int coproc_reg));
-
-#define COP_LW(coproc_num,coproc_reg,memword) \
-cop_lw (SD, CPU, cia, coproc_num, coproc_reg, memword)
-#define COP_LD(coproc_num,coproc_reg,memword) \
-cop_ld (SD, CPU, cia, coproc_num, coproc_reg, memword)
-#define COP_SW(coproc_num,coproc_reg) \
-cop_sw (SD, CPU, cia, coproc_num, coproc_reg)
-#define COP_SD(coproc_num,coproc_reg) \
-cop_sd (SD, CPU, cia, coproc_num, coproc_reg)
-
-
-void decode_coproc PARAMS ((SIM_DESC sd, sim_cpu *cpu, address_word cia, unsigned int instruction));
-#define DecodeCoproc(instruction) \
-decode_coproc (SD, CPU, cia, (instruction))
-
-int sim_monitor (SIM_DESC sd, sim_cpu *cpu, address_word cia, unsigned int arg);
-
-
-
-/* Memory accesses */
-
-/* The following are generic to all versions of the MIPS architecture
- to date: */
-
-/* Memory Access Types (for CCA): */
-#define Uncached (0)
-#define CachedNoncoherent (1)
-#define CachedCoherent (2)
-#define Cached (3)
-
-#define isINSTRUCTION (1 == 0) /* FALSE */
-#define isDATA (1 == 1) /* TRUE */
-#define isLOAD (1 == 0) /* FALSE */
-#define isSTORE (1 == 1) /* TRUE */
-#define isREAL (1 == 0) /* FALSE */
-#define isRAW (1 == 1) /* TRUE */
-/* The parameter HOST (isTARGET / isHOST) is ignored */
-#define isTARGET (1 == 0) /* FALSE */
-/* #define isHOST (1 == 1) TRUE */
-
-/* The "AccessLength" specifications for Loads and Stores. NOTE: This
- is the number of bytes minus 1. */
-#define AccessLength_BYTE (0)
-#define AccessLength_HALFWORD (1)
-#define AccessLength_TRIPLEBYTE (2)
-#define AccessLength_WORD (3)
-#define AccessLength_QUINTIBYTE (4)
-#define AccessLength_SEXTIBYTE (5)
-#define AccessLength_SEPTIBYTE (6)
-#define AccessLength_DOUBLEWORD (7)
-#define AccessLength_QUADWORD (15)
-
-#define LOADDRMASK (WITH_TARGET_WORD_BITSIZE == 64 \
- ? AccessLength_DOUBLEWORD /*7*/ \
- : AccessLength_WORD /*3*/)
-#define PSIZE (WITH_TARGET_ADDRESS_BITSIZE)
-
-
-INLINE_SIM_MAIN (int) address_translation PARAMS ((SIM_DESC sd, sim_cpu *, address_word cia, address_word vAddr, int IorD, int LorS, address_word *pAddr, int *CCA, int raw));
-#define AddressTranslation(vAddr,IorD,LorS,pAddr,CCA,host,raw) \
-address_translation (SD, CPU, cia, vAddr, IorD, LorS, pAddr, CCA, raw)
-
-INLINE_SIM_MAIN (void) load_memory PARAMS ((SIM_DESC sd, sim_cpu *cpu, address_word cia, uword64* memvalp, uword64* memval1p, int CCA, unsigned int AccessLength, address_word pAddr, address_word vAddr, int IorD));
-#define LoadMemory(memvalp,memval1p,CCA,AccessLength,pAddr,vAddr,IorD,raw) \
-load_memory (SD, CPU, cia, memvalp, memval1p, CCA, AccessLength, pAddr, vAddr, IorD)
-
-INLINE_SIM_MAIN (void) store_memory PARAMS ((SIM_DESC sd, sim_cpu *cpu, address_word cia, int CCA, unsigned int AccessLength, uword64 MemElem, uword64 MemElem1, address_word pAddr, address_word vAddr));
-#define StoreMemory(CCA,AccessLength,MemElem,MemElem1,pAddr,vAddr,raw) \
-store_memory (SD, CPU, cia, CCA, AccessLength, MemElem, MemElem1, pAddr, vAddr)
-
-INLINE_SIM_MAIN (void) cache_op PARAMS ((SIM_DESC sd, sim_cpu *cpu, address_word cia, int op, address_word pAddr, address_word vAddr, unsigned int instruction));
-#define CacheOp(op,pAddr,vAddr,instruction) \
-cache_op (SD, CPU, cia, op, pAddr, vAddr, instruction)
-
-INLINE_SIM_MAIN (void) sync_operation PARAMS ((SIM_DESC sd, sim_cpu *cpu, address_word cia, int stype));
-#define SyncOperation(stype) \
-sync_operation (SD, CPU, cia, (stype))
-
-INLINE_SIM_MAIN (void) prefetch PARAMS ((SIM_DESC sd, sim_cpu *cpu, address_word cia, int CCA, address_word pAddr, address_word vAddr, int DATA, int hint));
-#define Prefetch(CCA,pAddr,vAddr,DATA,hint) \
-prefetch (SD, CPU, cia, CCA, pAddr, vAddr, DATA, hint)
-
-INLINE_SIM_MAIN (unsigned32) ifetch32 PARAMS ((SIM_DESC sd, sim_cpu *cpu, address_word cia, address_word vaddr));
-#define IMEM32(CIA) ifetch32 (SD, CPU, (CIA), (CIA))
-INLINE_SIM_MAIN (unsigned16) ifetch16 PARAMS ((SIM_DESC sd, sim_cpu *cpu, address_word cia, address_word vaddr));
-#define IMEM16(CIA) ifetch16 (SD, CPU, (CIA), ((CIA) & ~1))
-#define IMEM16_IMMED(CIA,NR) ifetch16 (SD, CPU, (CIA), ((CIA) & ~1) + 2 * (NR))
-
-void dotrace PARAMS ((SIM_DESC sd, sim_cpu *cpu, FILE *tracefh, int type, SIM_ADDR address, int width, char *comment, ...));
-extern FILE *tracefh;
-
-INLINE_SIM_MAIN (void) pending_tick PARAMS ((SIM_DESC sd, sim_cpu *cpu, address_word cia));
-extern SIM_CORE_SIGNAL_FN mips_core_signal;
-
-char* pr_addr PARAMS ((SIM_ADDR addr));
-char* pr_uword64 PARAMS ((uword64 addr));
-
-
-#define GPR_CLEAR(N) do { GPR_SET((N),0); } while (0)
-
-void mips_cpu_exception_trigger(SIM_DESC sd, sim_cpu* cpu, address_word pc);
-void mips_cpu_exception_suspend(SIM_DESC sd, sim_cpu* cpu, int exception);
-void mips_cpu_exception_resume(SIM_DESC sd, sim_cpu* cpu, int exception);
-
-
-#if H_REVEALS_MODULE_P (SIM_MAIN_INLINE)
-#include "sim-main.c"
-#endif
-
-#endif
diff --git a/sim/mips/tconfig.in b/sim/mips/tconfig.in
deleted file mode 100644
index d5914740318..00000000000
--- a/sim/mips/tconfig.in
+++ /dev/null
@@ -1,33 +0,0 @@
-/* mips target configuration file. */
-
-/* See sim-hload.c. We properly handle LMA. */
-#ifdef TARGET_TX3904
-#define SIM_HANDLES_LMA 1
-
-/* FIXME: This is unnecessarily necessary: */
-#include "ansidecl.h"
-#include "callback.h"
-#include "remote-sim.h"
-#include "sim-module.h"
-
-MODULE_INSTALL_FN dv_sockser_install;
-#define MODULE_LIST dv_sockser_install,
-#else
-#define SIM_HANDLES_LMA 0
-#endif
-
-/* Define this if the simulator supports profiling.
- See the mips simulator for an example.
- This enables the `-p foo' and `-s bar' options.
- The target is required to provide sim_set_profile{,_size}. */
-#define SIM_HAVE_PROFILE
-
-/* Define this if the simulator uses an instruction cache.
- See the h8/300 simulator for an example.
- This enables the `-c size' option to set the size of the cache.
- The target is required to provide sim_set_simcache_size. */
-/* #define SIM_HAVE_SIMCACHE */
-
-/* Define this if the target cpu is bi-endian
- and the simulator supports it. */
-#define SIM_HAVE_BIENDIAN
diff --git a/sim/mips/tx.igen b/sim/mips/tx.igen
deleted file mode 100644
index cd8d76abc77..00000000000
--- a/sim/mips/tx.igen
+++ /dev/null
@@ -1,46 +0,0 @@
-// -*- C -*-
-//
-// toshiba specific instructions.
-//
-
-011100,5.RS,5.RT,5.RD,00000000000:MMINORM:::MADD
-"madd r<RS>, r<RT>":RD == 0
-"madd r<RD>, r<RS>, r<RT>"
-*r3900
-{
- signed64 prod = (U8_4 (VL4_8 (HI), VL4_8 (LO))
- + ((signed64) EXTEND32 (GPR[RT])
- * (signed64) EXTEND32 (GPR[RS])));
- check_mult_hilo (SD_, HIHISTORY, LOHISTORY);
- TRACE_ALU_INPUT2 (GPR[RS], GPR[RT]);
- LO = EXTEND32 (prod);
- HI = EXTEND32 (VH4_8 (prod));
- TRACE_ALU_RESULT2 (HI, LO);
- if(RD != 0 )
- GPR[RD] = LO;
-}
-
-
-011100,5.RS,5.RT,5.RD,00000000001:MMINORM:::MADDU
-"maddu r<RS>, r<RT>":RD == 0
-"maddu r<RD>, r<RS>, r<RT>"
-*r3900
-{
- unsigned64 prod = (U8_4 (VL4_8 (HI), VL4_8 (LO))
- + ((unsigned64) VL4_8 (GPR[RS])
- * (unsigned64) VL4_8 (GPR[RT])));
- check_mult_hilo (SD_, HIHISTORY, LOHISTORY);
- TRACE_ALU_INPUT2 (GPR[RS], GPR[RT]);
- LO = EXTEND32 (prod);
- HI = EXTEND32 (VH4_8 (prod));
- TRACE_ALU_RESULT2 (HI, LO);
- if(RD != 0)
- GPR[RD] = LO;
-}
-
-000000,CODE.20,001110::CO1:::SDBBP
-"sdbbp"
-*r3900:
-{
- SignalException (DebugBreakPoint, instruction);
-}
diff --git a/sim/mips/vr.igen b/sim/mips/vr.igen
deleted file mode 100644
index 863bb556229..00000000000
--- a/sim/mips/vr.igen
+++ /dev/null
@@ -1,78 +0,0 @@
-// -*- C -*-
-//
-// NEC specific instructions
-//
-
-// Integer Instructions
-// --------------------
-//
-// MulAcc is the Multiply Accumulator.
-// This register is mapped on the the HI and LO registers.
-// Upper 32 bits of MulAcc is mapped on to lower 32 bits of HI register.
-// Lower 32 bits of MulAcc is mapped on to lower 32 bits of LO register.
-
-
-:function:::unsigned64:MulAcc:
-*vr4100:
-{
- unsigned64 result = U8_4 (HI, LO);
- return result;
-}
-
-:function:::void:SET_MulAcc:unsigned64 value
-*vr4100:
-{
- /* 64 bit specific */
- *AL4_8 (&HI) = VH4_8 (value);
- *AL4_8 (&LO) = VL4_8 (value);
-}
-
-:function:::signed64:SignedMultiply:signed32 l, signed32 r
-*vr4100:
-{
- signed64 result = (signed64) l * (signed64) r;
- return result;
-}
-
-:function:::unsigned64:UnsignedMultiply:unsigned32 l, unsigned32 r
-*vr4100:
-{
- unsigned64 result = (unsigned64) l * (unsigned64) r;
- return result;
-}
-
-:function:::unsigned64:Low32Bits:unsigned64 value
-*vr4100:
-{
- unsigned64 result = (signed64) (signed32) VL4_8 (value);
- return result;
-}
-
-:function:::unsigned64:High32Bits:unsigned64 value
-*vr4100:
-{
- unsigned64 result = (signed64) (signed32) VH4_8 (value);
- return result;
-}
-
-
-
-// Multiply, Accumulate
-000000,5.RS,5.RT,00000,00000,101000::64::MAC
-"mac r<RS>, r<RT>"
-*vr4100:
-{
- SET_MulAcc (SD_, MulAcc (SD_) + SignedMultiply (SD_, GPR[RS], GPR[RT]));
-}
-
-
-// D-Multiply, Accumulate
-000000,5.RS,5.RT,00000,00000,101001::64::DMAC
-"dmac r<RS>, r<RT>"
-*vr4100:
-{
- LO = LO + SignedMultiply (SD_, GPR[RS], GPR[RT]);
-}
-
-
-
diff --git a/sim/mn10200/ChangeLog b/sim/mn10200/ChangeLog
deleted file mode 100644
index 6e997245746..00000000000
--- a/sim/mn10200/ChangeLog
+++ /dev/null
@@ -1,455 +0,0 @@
-2001-04-15 J.T. Conklin <jtc@redback.com>
-
- * Makefile.in (simops.o): Add simops.h to dependency list.
-
-Tue May 23 21:39:23 2000 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Thu Sep 2 18:15:53 1999 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-1999-05-08 Felix Lee <flee@cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-1999-04-06 Keith Seitz <keiths@cygnus.com>
-
- * interp.c (sim_stop): Set the sim's exception
- to SIGINT.
-
-1999-04-02 Keith Seitz <keiths@cygnus.com>
-
- * interp.c (UI_LOOP_POLL_INTERVAL): Define. Used to tweak the
- frequency at which ui_loop_hook is called.
- (ui_loop_hook_counter): New global defined when NEED_UI_LOOP_HOOK
- is defined.
- (sim_resume): Call ui_loop_hook (if defined) when the interval
- passes.
- * Makefile.in (SIM_EXTRA_CFLAGS): Include NEED_UI_LOOP_HOOK.
-
-Wed Jun 17 11:37:59 1998 Mark Alexander <marka@cygnus.com>
-
- * Makefile.in: Define NL_TARGET so that targ-vals.h will be used
- instead of syscall.h.
- * simops.c: Use targ-vals.h instead of syscall.h.
-
-Tue Apr 28 18:33:31 1998 Geoffrey Noer <noer@cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Sun Apr 26 15:31:55 1998 Tom Tromey <tromey@creche>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
- * config.in: Ditto.
-
-Sun Apr 26 15:19:58 1998 Tom Tromey <tromey@cygnus.com>
-
- * acconfig.h: New file.
- * configure.in: Reverted change of Apr 24; use sinclude again.
-
-Fri Apr 24 14:16:40 1998 Tom Tromey <tromey@creche>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
- * config.in: Ditto.
-
-Fri Apr 24 11:19:13 1998 Tom Tromey <tromey@cygnus.com>
-
- * configure.in: Don't call sinclude.
-
-Thu Apr 23 09:48:14 1998 Tom Tromey <tromey@creche>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Sat Apr 4 20:36:25 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Fri Mar 27 16:15:52 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Wed Mar 25 12:35:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Wed Mar 18 12:38:12 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Tue Feb 17 12:46:22 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * interp.c (sim_store_register, sim_fetch_register): Pass in
- length parameter. Return -1.
-
-Sun Feb 1 16:47:51 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Sat Jan 31 18:15:41 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Mon Jan 19 22:26:29 1998 Doug Evans <devans@seba>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Tue Jan 13 00:01:40 1998 Jeffrey A Law (law@cygnus.com)
-
- * simops.c: Stores to abs16 memory addresses zero extend the
- abs16 address.
-
-Mon Dec 15 23:17:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
- * config.in: Ditto.
-
-Thu Dec 4 09:21:05 1997 Doug Evans <devans@canuck.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Wed Oct 22 14:43:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * interp.c (sim_load): Pass lma_p and sim_write args to
- sim_load_file.
-
-Fri Oct 3 09:28:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Wed Sep 24 17:38:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Tue Sep 23 11:04:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Mon Sep 22 11:46:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Fri Sep 19 17:45:25 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Mon Sep 15 17:36:15 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Thu Sep 4 17:21:23 1997 Doug Evans <dje@seba>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Tue Sep 2 18:41:23 1997 Jeffrey A Law (law@cygnus.com)
-
- * simops.c: PC relative instructions are relative to the next
- instruction, not the current instruction.
-
-Wed Aug 27 18:13:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
- * config.in: Ditto.
-
-Tue Aug 26 10:40:45 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * interp.c (sim_kill): Delete.
- (sim_create_inferior): Add ABFD argument.
- (sim_load): Move setting of PC from here.
- (sim_create_inferior): To here.
-
-Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
- * config.in: Ditto.
-
-Mon Aug 25 16:14:44 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * interp.c (sim_open): Add ABFD argument.
-
-Tue Jun 24 13:44:08 1997 Jeffrey A Law (law@cygnus.com)
-
- * interp.c (sim_resume): Clear State.exited.
- (sim_stop_reason): If State.exited is nonzero, then indicate that
- the simulator exited instead of stopped.
- * mn10200_sim.h (struct _state): Add exited field.
- * simops.c (syscall): Set State.exited for SYS_exit.
-
-Tue May 20 17:45:47 1997 Jeffrey A Law (law@cygnus.com)
-
- * interp.c: Replace all references to load_mem and store_mem
- with references to load_byte, load_half, load_3_byte, load_word
- and store_byte, store_half, store_3_byte, store_word.
- (INLINE): Delete definition.
- (load_mem_big): Likewise.
- (max_mem): Make it global.
- (dispatch): Make this function inline.
- (load_mem, store_mem): Delete functions.
- * mn10200_sim.h (INLINE): Define.
- (RLW): Delete unused definition.
- (load_mem, store_mem): Delete declarations.
- (load_mem_big): New definition.
- (load_byte, load_half, load_3_byte, load_word): New functions.
- (store_byte, store_half, store_3_byte, store_word): New functions.
- * simops.c: Replace all references to load_mem and store_mem
- with references to load_byte, load_half, load_3_byte, load_word
- and store_byte, store_half, store_3_byte, store_word.
-
-Tue May 20 10:21:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * interp.c (sim_open): Add callback argument.
- (sim_set_callbacks): Delete SIM_DESC argument.
-
-Sun May 18 16:59:09 1997 Jeffrey A Law (law@cygnus.com)
-
- * interp.c (compare_simops): New function.
- (sim_open): Sort the Simops table before inserting entries
- into the hash table.
-
-Fri May 16 16:29:18 1997 Jeffrey A Law (law@cygnus.com)
-
- * interp.c (load_mem): Fix formatting/indention problems with
- last change. If we get a load from an out of range address,
- abort instead of returning zero.
- (store_mem): Abort if we try to store to an out of range address.
-
-Wed May 14 21:21:30 1997 Bob Manson <manson@charmed.cygnus.com>
-
- * simops.c (OP_F010): Fix some arguments to correspond
- with reality (types of arguments passed to lseek, read,
- write, open).
-
- * interp.c (max_mem): New variable.
- (load_mem): Check memory address against max_mem to
- avoid some self-destructive behaviors.
-
-Tue May 13 21:45:24 1997 Jeffrey A Law (law@cygnus.com)
-
- * simops.c: Fix typo in cc0 setting for lsr.
-
-Tue May 6 13:22:12 1997 Jeffrey A Law (law@cygnus.com)
-
- * interp.c: Random typo/thinko cleanups.
-
-Thu Apr 24 00:39:51 1997 Doug Evans <dje@canuck.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Mon Apr 21 10:29:30 1997 Jeffrey A Law (law@cygnus.com)
-
- * simops.c: Fix typo in "open" syscall emulation.
-
-Fri Apr 18 14:04:31 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * interp.c (sim_stop): Add stub function.
-
-Thu Apr 17 03:23:58 1997 Doug Evans <dje@canuck.cygnus.com>
-
- * Makefile.in (SIM_OBJS): Add sim-load.o.
- * interp.c (sim_kind, myname): New static locals.
- (sim_open): Set sim_kind, myname. Ignore -E arg.
- (sim_load): Return SIM_RC. New arg abfd. Call sim_load_file to
- load file into simulator. Set start address from bfd.
- (sim_create_inferior): Return SIM_RC. Delete arg start_address.
-
-Wed Apr 16 18:06:50 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * simops.c (OP_F010): SYS_execv, SYS_time, SYS_times, SYS_utime
- only include if implemented by host.
-
-Mon Apr 7 15:45:02 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
- * config.in: Ditto.
-
-Fri Apr 4 20:01:56 1997 Ian Lance Taylor <ian@cygnus.com>
-
- * Makefile.in: Change mn10200-opc.o to m10200-opc.o, to match
- corresponding change in opcodes directory.
-
-Wed Apr 2 15:06:28 1997 Doug Evans <dje@canuck.cygnus.com>
-
- * interp.c (sim_open): New arg `kind'.
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Wed Apr 2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Thu Mar 20 20:28:14 1997 Jeffrey A Law (law@cygnus.com)
-
- * mn10200_sim.h: Protect uses of "signed" to cater to broken
- non-ansi compilers (HPs). Don't use #error for the same reason.
-
-Tue Mar 18 12:23:31 1997 Jeffrey A Law (law@cygnus.com)
-
- * simops.c: Don't sign-extend immediate for "mov imm16,an".
- Simplify "sub" handling. Fix "mul" to properly sign extend
- operands. Set CF appropriately for btst imm16,dn. Implement "rti".
-
- * gencode.c: Delete unused "Opcodes" and "curop" variables.
-
-Wed Mar 19 01:14:00 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Mon Mar 17 15:10:07 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
-
- * configure: Re-generate.
-
-Fri Mar 14 10:34:11 1997 Michael Meissner <meissner@cygnus.com>
-
- * configure: Regenerate to track ../common/aclocal.m4 changes.
-
-Thu Mar 13 12:53:14 1997 Doug Evans <dje@canuck.cygnus.com>
-
- * interp.c (sim_open): New SIM_DESC result. Argument is now
- in argv form.
- (other sim_*): New SIM_DESC argument.
-
-Wed Mar 12 15:02:35 1997 Jeffrey A Law (law@cygnus.com)
-
- * simops.c: Fix typo for "bclr".
-
-Wed Feb 26 16:46:13 1997 Jeffrey A Law (law@cygnus.com)
-
- * simops.c: Handle new calling convention in emulated syscall
- code.
-
-Mon Feb 24 14:25:11 1997 Jeffrey A Law (law@cygnus.com)
-
- * interp.c (load_mem_big): Add some missing parens.
-
-Wed Feb 19 23:19:08 1997 Jeffrey A Law (law@cygnus.com)
-
- * simops.c: Don't use "long long" data types for intermediate
- values in "divu", "mul" and "mulu" instructions.
-
-Fri Feb 14 02:46:46 1997 Jeffrey A Law (law@cygnus.com)
-
- * interp.c (hash): Rework to be more efficient.
- (dispatch): Renamed from lookup_hash. Dispatch to the target
- function and update the PC here.
- (load_mem_big): Now a macro.
- (sim_resume): Restructure code to read an insn, determine its
- length, call dispatch routines, etc to be much more efficient.
-
-Fri Feb 7 12:59:36 1997 Jeffrey A Law (law@cygnus.com)
-
- * interp.c (MAX_HASH): Redefine to 127.
- (struct hash_entry): Add "count" field when HASH_STAT is defined.
- (hash): Improve hashing for many heavily used opcodes.
- (lookup_hash): Bump counters if HASH_STAT is defined.
- (sim_open): Don't put the same opcode in the hash table more
- than once. Clear counters if HASH_STAT is defined.
- (sim_resume): After program exits, dump hash table stats if
- HASH_STAT is defined.
-
-Wed Feb 5 10:28:37 1997 Jeffrey A Law (law@cygnus.com)
-
- * simops.c: Fix register extraction for "ext dn".
-
-Tue Feb 4 17:27:41 1997 Jeffrey A Law (law@cygnus.com)
-
- * simops.c: Fix register extractions for "movbu (an), dm".
-
-Tue Feb 4 13:33:30 1997 Doug Evans <dje@canuck.cygnus.com>
-
- * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
- COMMON_{PRE,POST}_CONFIG_FRAG instead.
- * configure.in: sinclude ../common/aclocal.m4.
- * configure: Regenerated.
-
-Fri Jan 31 01:19:02 1997 Jeffrey A Law (law@cygnus.com)
-
- * simops.c: Get carry-in bit right for rol. Just clear the
- NF flag for btst imm8,dn.
-
-Wed Jan 29 15:47:42 1997 Jeffrey A Law (law@cygnus.com)
-
- * simops.c: Properly compute ZF flag for many insns.
-
-Sat Jan 25 17:06:55 1997 Jeffrey A Law (law@cygnus.com)
-
- * simops.c: Properly truncate divisor and dividend before
- performing "divu" operation.
-
-Fri Jan 24 10:47:48 1997 Jeffrey A Law (law@cygnus.com)
-
- * simops.c (init_system): Allocate 2^19 bytes of space for
- the simulator.
-
-Thu Jan 23 21:17:33 1997 Jeffrey A Law (law@cygnus.com)
-
- * simops.c: Rework code to extract arguments for emulated
- syscalls to handle 24bit pointers.
-
-Thu Jan 23 14:06:04 1997 Stu Grossman (grossman@critters.cygnus.com)
-
- * configure configure.in Makefile.in: Update to new configure
- scheme which is more compatible with WinGDB builds.
- * configure.in: Improve comment on how to run autoconf.
- * configure: Re-run autoconf to get new ../common/aclocal.m4.
- * Makefile.in: Use autoconf substitution to install common
- makefile fragment.
-
-Thu Jan 23 12:04:38 1997 Jeffrey A Law (law@cygnus.com)
-
- * simops.c: Fix destination register for "mov (abs24),an".
-
-Tue Jan 21 15:59:21 1997 Jeffrey A Law (law@cygnus.com)
-
- * simops.c: "rts" adds 4 to the stack pointer.
-
- * simops.c: Fix CF and CX computation for add instructions.
-
- * simops.c: Leave the upper 8 bits alone for logical ops.
- Mask off high 8 bits before doing any shifts/rotates.
- Fix carry bit handling in rotates again.
-
-Mon Jan 20 10:45:08 1997 Jeffrey A Law (law@cygnus.com)
-
- * simops.c: Don't lose the sign bit for "asr".
-
-Fri Jan 17 01:45:14 1997 Jeffrey A Law (law@cygnus.com)
-
- * simops.c: Fix overflow computation for "cmp" and "sub"
- instructions.
-
- * simops.c: Use the right register for "jmp (an)" and "jsr (an)".
-
- * interp.c (hash): Improve hashing for 3 byte instructions.
-
- * simops.c: Fix extraction of 16/24bit immediates for some
- instructions. "cmp" instructions only modify the PSW.
- Fix various thinkos when extracting register operands too.
-
-Thu Jan 16 07:47:56 1997 Jeffrey A Law (law@cygnus.com)
-
- * simops.c: Fix "rol" and "ror".
-
- * simops.c: Truncate PC to 24bits after modifying it.
- Closer stab at emulated system calls.
-
-Tue Jan 14 12:33:12 1997 Jeffrey A Law (law@cygnus.com)
-
- * interp.c (hash): Improve hashing of two byte insns.
- (store_mem): Handle storing 3 byte quantities.
-
- * simops.c: Fix various typos/thinkos.
-
- * interp.c (load_mem_big, load_mem, store_mem): Fix thinko in
- code to handle 24bit addresses.
- * simops.c (REG0_8, REG0_16): Fix typo.
-
-Mon Jan 6 16:17:09 1997 Jeffrey A Law (law@cygnus.com)
-
- * mn10200_sim.h: Various fixes for mixed 16/24bit architecture.
- * interp.c: Similarly.
- * simops.c: Similarly.
-
- * Makefile.in, config.in, configure, configure.in: New files.
- * gencode.c, interp.c, mn10200_sim.h, simops.c: New files.
-
diff --git a/sim/mn10200/Makefile.in b/sim/mn10200/Makefile.in
deleted file mode 100644
index bcc15c86834..00000000000
--- a/sim/mn10200/Makefile.in
+++ /dev/null
@@ -1,52 +0,0 @@
-# Makefile template for Configure for the mn10200 sim library.
-# Copyright (C) 1997 Free Software Foundation, Inc.
-# Written by Cygnus Support.
-#
-# This program is free software; you can redistribute it and/or modify
-# it under the terms of the GNU General Public License as published by
-# the Free Software Foundation; either version 2 of the License, or
-# (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
-## COMMON_PRE_CONFIG_FRAG
-
-SIM_OBJS = interp.o table.o simops.o sim-load.o
-SIM_EXTRA_CFLAGS = -I$(srcdir)/../../newlib/libc/sys/sysmec -DNEED_UI_LOOP_HOOK
-SIM_EXTRA_CLEAN = clean-extra
-
-# Select mn10200 support in nltvals.def.
-NL_TARGET = -DNL_TARGET_mn10200
-
-INCLUDE = mn10200_sim.h $(srcdir)/../../include/callback.h
-
-## COMMON_POST_CONFIG_FRAG
-
-simops.h: gencode
- ./gencode -h >$@
-
-table.c: gencode simops.h
- ./gencode >$@
-
-gencode.o: gencode.c $(INCLUDE)
- $(CC_FOR_BUILD) $(BUILD_CFLAGS) -c $(srcdir)/gencode.c
-
-m10200-opc.o: $(srcdir)/../../opcodes/m10200-opc.c
- $(CC_FOR_BUILD) $(BUILD_CFLAGS) -c $(srcdir)/../../opcodes/m10200-opc.c
-
-gencode: gencode.o m10200-opc.o
- $(CC_FOR_BUILD) $(BUILD_CFLAGS) -o gencode gencode.o m10200-opc.o $(BUILD_LIB)
-
-clean-extra:
- rm -f table.c simops.h gencode
-
-interp.o: interp.c table.c $(INCLUDE)
-simops.o: simops.c simops.h $(INCLUDE)
-table.o: table.c
diff --git a/sim/mn10200/acconfig.h b/sim/mn10200/acconfig.h
deleted file mode 100644
index f9b87a10c60..00000000000
--- a/sim/mn10200/acconfig.h
+++ /dev/null
@@ -1,15 +0,0 @@
-
-/* Define to 1 if NLS is requested. */
-#undef ENABLE_NLS
-
-/* Define as 1 if you have catgets and don't want to use GNU gettext. */
-#undef HAVE_CATGETS
-
-/* Define as 1 if you have gettext and don't want to use GNU gettext. */
-#undef HAVE_GETTEXT
-
-/* Define as 1 if you have the stpcpy function. */
-#undef HAVE_STPCPY
-
-/* Define if your locale.h file contains LC_MESSAGES. */
-#undef HAVE_LC_MESSAGES
diff --git a/sim/mn10200/config.in b/sim/mn10200/config.in
deleted file mode 100644
index 1f87a2bee4e..00000000000
--- a/sim/mn10200/config.in
+++ /dev/null
@@ -1,158 +0,0 @@
-/* config.in. Generated automatically from configure.in by autoheader. */
-
-/* Define if using alloca.c. */
-#undef C_ALLOCA
-
-/* Define to empty if the keyword does not work. */
-#undef const
-
-/* Define to one of _getb67, GETB67, getb67 for Cray-2 and Cray-YMP systems.
- This function is required for alloca.c support on those systems. */
-#undef CRAY_STACKSEG_END
-
-/* Define if you have alloca, as a function or macro. */
-#undef HAVE_ALLOCA
-
-/* Define if you have <alloca.h> and it should be used (not on Ultrix). */
-#undef HAVE_ALLOCA_H
-
-/* Define if you have a working `mmap' system call. */
-#undef HAVE_MMAP
-
-/* Define as __inline if that's what the C compiler calls it. */
-#undef inline
-
-/* Define to `long' if <sys/types.h> doesn't define. */
-#undef off_t
-
-/* Define if you need to in order for stat and other things to work. */
-#undef _POSIX_SOURCE
-
-/* Define as the return type of signal handlers (int or void). */
-#undef RETSIGTYPE
-
-/* Define to `unsigned' if <sys/types.h> doesn't define. */
-#undef size_t
-
-/* If using the C implementation of alloca, define if you know the
- direction of stack growth for your system; otherwise it will be
- automatically deduced at run-time.
- STACK_DIRECTION > 0 => grows toward higher addresses
- STACK_DIRECTION < 0 => grows toward lower addresses
- STACK_DIRECTION = 0 => direction of growth unknown
- */
-#undef STACK_DIRECTION
-
-/* Define if you have the ANSI C header files. */
-#undef STDC_HEADERS
-
-/* Define to 1 if NLS is requested. */
-#undef ENABLE_NLS
-
-/* Define as 1 if you have gettext and don't want to use GNU gettext. */
-#undef HAVE_GETTEXT
-
-/* Define as 1 if you have the stpcpy function. */
-#undef HAVE_STPCPY
-
-/* Define if your locale.h file contains LC_MESSAGES. */
-#undef HAVE_LC_MESSAGES
-
-/* Define if you have the __argz_count function. */
-#undef HAVE___ARGZ_COUNT
-
-/* Define if you have the __argz_next function. */
-#undef HAVE___ARGZ_NEXT
-
-/* Define if you have the __argz_stringify function. */
-#undef HAVE___ARGZ_STRINGIFY
-
-/* Define if you have the __setfpucw function. */
-#undef HAVE___SETFPUCW
-
-/* Define if you have the dcgettext function. */
-#undef HAVE_DCGETTEXT
-
-/* Define if you have the getcwd function. */
-#undef HAVE_GETCWD
-
-/* Define if you have the getpagesize function. */
-#undef HAVE_GETPAGESIZE
-
-/* Define if you have the getrusage function. */
-#undef HAVE_GETRUSAGE
-
-/* Define if you have the munmap function. */
-#undef HAVE_MUNMAP
-
-/* Define if you have the putenv function. */
-#undef HAVE_PUTENV
-
-/* Define if you have the setenv function. */
-#undef HAVE_SETENV
-
-/* Define if you have the setlocale function. */
-#undef HAVE_SETLOCALE
-
-/* Define if you have the sigaction function. */
-#undef HAVE_SIGACTION
-
-/* Define if you have the stpcpy function. */
-#undef HAVE_STPCPY
-
-/* Define if you have the strcasecmp function. */
-#undef HAVE_STRCASECMP
-
-/* Define if you have the strchr function. */
-#undef HAVE_STRCHR
-
-/* Define if you have the time function. */
-#undef HAVE_TIME
-
-/* Define if you have the <argz.h> header file. */
-#undef HAVE_ARGZ_H
-
-/* Define if you have the <fcntl.h> header file. */
-#undef HAVE_FCNTL_H
-
-/* Define if you have the <fpu_control.h> header file. */
-#undef HAVE_FPU_CONTROL_H
-
-/* Define if you have the <limits.h> header file. */
-#undef HAVE_LIMITS_H
-
-/* Define if you have the <locale.h> header file. */
-#undef HAVE_LOCALE_H
-
-/* Define if you have the <malloc.h> header file. */
-#undef HAVE_MALLOC_H
-
-/* Define if you have the <nl_types.h> header file. */
-#undef HAVE_NL_TYPES_H
-
-/* Define if you have the <stdlib.h> header file. */
-#undef HAVE_STDLIB_H
-
-/* Define if you have the <string.h> header file. */
-#undef HAVE_STRING_H
-
-/* Define if you have the <strings.h> header file. */
-#undef HAVE_STRINGS_H
-
-/* Define if you have the <sys/param.h> header file. */
-#undef HAVE_SYS_PARAM_H
-
-/* Define if you have the <sys/resource.h> header file. */
-#undef HAVE_SYS_RESOURCE_H
-
-/* Define if you have the <sys/time.h> header file. */
-#undef HAVE_SYS_TIME_H
-
-/* Define if you have the <time.h> header file. */
-#undef HAVE_TIME_H
-
-/* Define if you have the <unistd.h> header file. */
-#undef HAVE_UNISTD_H
-
-/* Define if you have the <values.h> header file. */
-#undef HAVE_VALUES_H
diff --git a/sim/mn10200/configure b/sim/mn10200/configure
deleted file mode 100755
index 2720d6b5d38..00000000000
--- a/sim/mn10200/configure
+++ /dev/null
@@ -1,4024 +0,0 @@
-#! /bin/sh
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-sim_inline="-DDEFAULT_INLINE=0"
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-# This file is derived from `gettext.m4'. The difference is that the
-# included macros assume Cygnus-style source and build trees.
-
-# Macro to add for using GNU gettext.
-# Ulrich Drepper <drepper@cygnus.com>, 1995.
-#
-# This file file be copied and used freely without restrictions. It can
-# be used in projects which are not available under the GNU Public License
-# but which still want to provide support for the GNU gettext functionality.
-# Please note that the actual code is *not* freely available.
-
-# serial 3
-
-
-
-
-
-# Search path for a program which passes the given test.
-# Ulrich Drepper <drepper@cygnus.com>, 1996.
-#
-# This file file be copied and used freely without restrictions. It can
-# be used in projects which are not available under the GNU Public License
-# but which still want to provide support for the GNU gettext functionality.
-# Please note that the actual code is *not* freely available.
-
-# serial 1
-
-
-
-# Check whether LC_MESSAGES is available in <locale.h>.
-# Ulrich Drepper <drepper@cygnus.com>, 1995.
-#
-# This file file be copied and used freely without restrictions. It can
-# be used in projects which are not available under the GNU Public License
-# but which still want to provide support for the GNU gettext functionality.
-# Please note that the actual code is *not* freely available.
-
-# serial 1
-
-
-
-
-
-
-# Guess values for system-dependent variables and create Makefiles.
-# Generated automatically using autoconf version 2.13
-# Copyright (C) 1992, 93, 94, 95, 96 Free Software Foundation, Inc.
-#
-# This configure script is free software; the Free Software Foundation
-# gives unlimited permission to copy, distribute and modify it.
-
-# Defaults:
-ac_help=
-ac_default_prefix=/usr/local
-# Any additions from configure.in:
-ac_help="$ac_help
- --disable-nls do not use Native Language Support"
-ac_help="$ac_help
- --with-included-gettext use the GNU gettext library included here"
-ac_help="$ac_help
- --enable-maintainer-mode Enable developer functionality."
-ac_help="$ac_help
- --enable-sim-bswap Use Host specific BSWAP instruction."
-ac_help="$ac_help
- --enable-sim-cflags=opts Extra CFLAGS for use in building simulator"
-ac_help="$ac_help
- --enable-sim-debug=opts Enable debugging flags"
-ac_help="$ac_help
- --enable-sim-stdio Specify whether to use stdio for console input/output."
-ac_help="$ac_help
- --enable-sim-trace=opts Enable tracing flags"
-ac_help="$ac_help
- --enable-sim-profile=opts Enable profiling flags"
-
-# Initialize some variables set by options.
-# The variables have the same names as the options, with
-# dashes changed to underlines.
-build=NONE
-cache_file=./config.cache
-exec_prefix=NONE
-host=NONE
-no_create=
-nonopt=NONE
-no_recursion=
-prefix=NONE
-program_prefix=NONE
-program_suffix=NONE
-program_transform_name=s,x,x,
-silent=
-site=
-sitefile=
-srcdir=
-target=NONE
-verbose=
-x_includes=NONE
-x_libraries=NONE
-bindir='${exec_prefix}/bin'
-sbindir='${exec_prefix}/sbin'
-libexecdir='${exec_prefix}/libexec'
-datadir='${prefix}/share'
-sysconfdir='${prefix}/etc'
-sharedstatedir='${prefix}/com'
-localstatedir='${prefix}/var'
-libdir='${exec_prefix}/lib'
-includedir='${prefix}/include'
-oldincludedir='/usr/include'
-infodir='${prefix}/info'
-mandir='${prefix}/man'
-
-# Initialize some other variables.
-subdirs=
-MFLAGS= MAKEFLAGS=
-SHELL=${CONFIG_SHELL-/bin/sh}
-# Maximum number of lines to put in a shell here document.
-ac_max_here_lines=12
-
-ac_prev=
-for ac_option
-do
-
- # If the previous option needs an argument, assign it.
- if test -n "$ac_prev"; then
- eval "$ac_prev=\$ac_option"
- ac_prev=
- continue
- fi
-
- case "$ac_option" in
- -*=*) ac_optarg=`echo "$ac_option" | sed 's/[-_a-zA-Z0-9]*=//'` ;;
- *) ac_optarg= ;;
- esac
-
- # Accept the important Cygnus configure options, so we can diagnose typos.
-
- case "$ac_option" in
-
- -bindir | --bindir | --bindi | --bind | --bin | --bi)
- ac_prev=bindir ;;
- -bindir=* | --bindir=* | --bindi=* | --bind=* | --bin=* | --bi=*)
- bindir="$ac_optarg" ;;
-
- -build | --build | --buil | --bui | --bu)
- ac_prev=build ;;
- -build=* | --build=* | --buil=* | --bui=* | --bu=*)
- build="$ac_optarg" ;;
-
- -cache-file | --cache-file | --cache-fil | --cache-fi \
- | --cache-f | --cache- | --cache | --cach | --cac | --ca | --c)
- ac_prev=cache_file ;;
- -cache-file=* | --cache-file=* | --cache-fil=* | --cache-fi=* \
- | --cache-f=* | --cache-=* | --cache=* | --cach=* | --cac=* | --ca=* | --c=*)
- cache_file="$ac_optarg" ;;
-
- -datadir | --datadir | --datadi | --datad | --data | --dat | --da)
- ac_prev=datadir ;;
- -datadir=* | --datadir=* | --datadi=* | --datad=* | --data=* | --dat=* \
- | --da=*)
- datadir="$ac_optarg" ;;
-
- -disable-* | --disable-*)
- ac_feature=`echo $ac_option|sed -e 's/-*disable-//'`
- # Reject names that are not valid shell variable names.
- if test -n "`echo $ac_feature| sed 's/[-a-zA-Z0-9_]//g'`"; then
- { echo "configure: error: $ac_feature: invalid feature name" 1>&2; exit 1; }
- fi
- ac_feature=`echo $ac_feature| sed 's/-/_/g'`
- eval "enable_${ac_feature}=no" ;;
-
- -enable-* | --enable-*)
- ac_feature=`echo $ac_option|sed -e 's/-*enable-//' -e 's/=.*//'`
- # Reject names that are not valid shell variable names.
- if test -n "`echo $ac_feature| sed 's/[-_a-zA-Z0-9]//g'`"; then
- { echo "configure: error: $ac_feature: invalid feature name" 1>&2; exit 1; }
- fi
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- CC="$CC -Xp"
- fi
-else
- echo "$ac_t""no" 1>&6
- ISC=
-fi
-
-echo $ac_n "checking for ANSI C header files""... $ac_c" 1>&6
-echo "configure:807: checking for ANSI C header files" >&5
-if eval "test \"`echo '$''{'ac_cv_header_stdc'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 812 "configure"
-#include "confdefs.h"
-#include <stdlib.h>
-#include <stdarg.h>
-#include <string.h>
-#include <float.h>
-EOF
-ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:820: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
-ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
-if test -z "$ac_err"; then
- rm -rf conftest*
- ac_cv_header_stdc=yes
-else
- echo "$ac_err" >&5
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- ac_cv_header_stdc=no
-fi
-rm -f conftest*
-
-if test $ac_cv_header_stdc = yes; then
- # SunOS 4.x string.h does not declare mem*, contrary to ANSI.
-cat > conftest.$ac_ext <<EOF
-#line 837 "configure"
-#include "confdefs.h"
-#include <string.h>
-EOF
-if (eval "$ac_cpp conftest.$ac_ext") 2>&5 |
- egrep "memchr" >/dev/null 2>&1; then
- :
-else
- rm -rf conftest*
- ac_cv_header_stdc=no
-fi
-rm -f conftest*
-
-fi
-
-if test $ac_cv_header_stdc = yes; then
- # ISC 2.0.2 stdlib.h does not declare free, contrary to ANSI.
-cat > conftest.$ac_ext <<EOF
-#line 855 "configure"
-#include "confdefs.h"
-#include <stdlib.h>
-EOF
-if (eval "$ac_cpp conftest.$ac_ext") 2>&5 |
- egrep "free" >/dev/null 2>&1; then
- :
-else
- rm -rf conftest*
- ac_cv_header_stdc=no
-fi
-rm -f conftest*
-
-fi
-
-if test $ac_cv_header_stdc = yes; then
- # /bin/cc in Irix-4.0.5 gets non-ANSI ctype macros unless using -ansi.
-if test "$cross_compiling" = yes; then
- :
-else
- cat > conftest.$ac_ext <<EOF
-#line 876 "configure"
-#include "confdefs.h"
-#include <ctype.h>
-#define ISLOWER(c) ('a' <= (c) && (c) <= 'z')
-#define TOUPPER(c) (ISLOWER(c) ? 'A' + ((c) - 'a') : (c))
-#define XOR(e, f) (((e) && !(f)) || (!(e) && (f)))
-int main () { int i; for (i = 0; i < 256; i++)
-if (XOR (islower (i), ISLOWER (i)) || toupper (i) != TOUPPER (i)) exit(2);
-exit (0); }
-
-EOF
-if { (eval echo configure:887: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null
-then
- :
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -fr conftest*
- ac_cv_header_stdc=no
-fi
-rm -fr conftest*
-fi
-
-fi
-fi
-
-echo "$ac_t""$ac_cv_header_stdc" 1>&6
-if test $ac_cv_header_stdc = yes; then
- cat >> confdefs.h <<\EOF
-#define STDC_HEADERS 1
-EOF
-
-fi
-
-echo $ac_n "checking for working const""... $ac_c" 1>&6
-echo "configure:911: checking for working const" >&5
-if eval "test \"`echo '$''{'ac_cv_c_const'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 916 "configure"
-#include "confdefs.h"
-
-int main() {
-
-/* Ultrix mips cc rejects this. */
-typedef int charset[2]; const charset x;
-/* SunOS 4.1.1 cc rejects this. */
-char const *const *ccp;
-char **p;
-/* NEC SVR4.0.2 mips cc rejects this. */
-struct point {int x, y;};
-static struct point const zero = {0,0};
-/* AIX XL C 1.02.0.0 rejects this.
- It does not let you subtract one const X* pointer from another in an arm
- of an if-expression whose if-part is not a constant expression */
-const char *g = "string";
-ccp = &g + (g ? g-g : 0);
-/* HPUX 7.0 cc rejects these. */
-++ccp;
-p = (char**) ccp;
-ccp = (char const *const *) p;
-{ /* SCO 3.2v4 cc rejects this. */
- char *t;
- char const *s = 0 ? (char *) 0 : (char const *) 0;
-
- *t++ = 0;
-}
-{ /* Someone thinks the Sun supposedly-ANSI compiler will reject this. */
- int x[] = {25, 17};
- const int *foo = &x[0];
- ++foo;
-}
-{ /* Sun SC1.0 ANSI compiler rejects this -- but not the above. */
- typedef const int *iptr;
- iptr p = 0;
- ++p;
-}
-{ /* AIX XL C 1.02.0.0 rejects this saying
- "k.c", line 2.27: 1506-025 (S) Operand must be a modifiable lvalue. */
- struct s { int j; const int *ap[3]; };
- struct s *b; b->j = 5;
-}
-{ /* ULTRIX-32 V3.1 (Rev 9) vcc rejects this */
- const int foo = 10;
-}
-
-; return 0; }
-EOF
-if { (eval echo configure:965: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
- rm -rf conftest*
- ac_cv_c_const=yes
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- ac_cv_c_const=no
-fi
-rm -f conftest*
-fi
-
-echo "$ac_t""$ac_cv_c_const" 1>&6
-if test $ac_cv_c_const = no; then
- cat >> confdefs.h <<\EOF
-#define const
-EOF
-
-fi
-
-echo $ac_n "checking for inline""... $ac_c" 1>&6
-echo "configure:986: checking for inline" >&5
-if eval "test \"`echo '$''{'ac_cv_c_inline'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- ac_cv_c_inline=no
-for ac_kw in inline __inline__ __inline; do
- cat > conftest.$ac_ext <<EOF
-#line 993 "configure"
-#include "confdefs.h"
-
-int main() {
-} $ac_kw foo() {
-; return 0; }
-EOF
-if { (eval echo configure:1000: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
- rm -rf conftest*
- ac_cv_c_inline=$ac_kw; break
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
-fi
-rm -f conftest*
-done
-
-fi
-
-echo "$ac_t""$ac_cv_c_inline" 1>&6
-case "$ac_cv_c_inline" in
- inline | yes) ;;
- no) cat >> confdefs.h <<\EOF
-#define inline
-EOF
- ;;
- *) cat >> confdefs.h <<EOF
-#define inline $ac_cv_c_inline
-EOF
- ;;
-esac
-
-echo $ac_n "checking for off_t""... $ac_c" 1>&6
-echo "configure:1026: checking for off_t" >&5
-if eval "test \"`echo '$''{'ac_cv_type_off_t'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1031 "configure"
-#include "confdefs.h"
-#include <sys/types.h>
-#if STDC_HEADERS
-#include <stdlib.h>
-#include <stddef.h>
-#endif
-EOF
-if (eval "$ac_cpp conftest.$ac_ext") 2>&5 |
- egrep "(^|[^a-zA-Z_0-9])off_t[^a-zA-Z_0-9]" >/dev/null 2>&1; then
- rm -rf conftest*
- ac_cv_type_off_t=yes
-else
- rm -rf conftest*
- ac_cv_type_off_t=no
-fi
-rm -f conftest*
-
-fi
-echo "$ac_t""$ac_cv_type_off_t" 1>&6
-if test $ac_cv_type_off_t = no; then
- cat >> confdefs.h <<\EOF
-#define off_t long
-EOF
-
-fi
-
-echo $ac_n "checking for size_t""... $ac_c" 1>&6
-echo "configure:1059: checking for size_t" >&5
-if eval "test \"`echo '$''{'ac_cv_type_size_t'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1064 "configure"
-#include "confdefs.h"
-#include <sys/types.h>
-#if STDC_HEADERS
-#include <stdlib.h>
-#include <stddef.h>
-#endif
-EOF
-if (eval "$ac_cpp conftest.$ac_ext") 2>&5 |
- egrep "(^|[^a-zA-Z_0-9])size_t[^a-zA-Z_0-9]" >/dev/null 2>&1; then
- rm -rf conftest*
- ac_cv_type_size_t=yes
-else
- rm -rf conftest*
- ac_cv_type_size_t=no
-fi
-rm -f conftest*
-
-fi
-echo "$ac_t""$ac_cv_type_size_t" 1>&6
-if test $ac_cv_type_size_t = no; then
- cat >> confdefs.h <<\EOF
-#define size_t unsigned
-EOF
-
-fi
-
-# The Ultrix 4.2 mips builtin alloca declared by alloca.h only works
-# for constant arguments. Useless!
-echo $ac_n "checking for working alloca.h""... $ac_c" 1>&6
-echo "configure:1094: checking for working alloca.h" >&5
-if eval "test \"`echo '$''{'ac_cv_header_alloca_h'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1099 "configure"
-#include "confdefs.h"
-#include <alloca.h>
-int main() {
-char *p = alloca(2 * sizeof(int));
-; return 0; }
-EOF
-if { (eval echo configure:1106: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- rm -rf conftest*
- ac_cv_header_alloca_h=yes
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- ac_cv_header_alloca_h=no
-fi
-rm -f conftest*
-fi
-
-echo "$ac_t""$ac_cv_header_alloca_h" 1>&6
-if test $ac_cv_header_alloca_h = yes; then
- cat >> confdefs.h <<\EOF
-#define HAVE_ALLOCA_H 1
-EOF
-
-fi
-
-echo $ac_n "checking for alloca""... $ac_c" 1>&6
-echo "configure:1127: checking for alloca" >&5
-if eval "test \"`echo '$''{'ac_cv_func_alloca_works'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1132 "configure"
-#include "confdefs.h"
-
-#ifdef __GNUC__
-# define alloca __builtin_alloca
-#else
-# ifdef _MSC_VER
-# include <malloc.h>
-# define alloca _alloca
-# else
-# if HAVE_ALLOCA_H
-# include <alloca.h>
-# else
-# ifdef _AIX
- #pragma alloca
-# else
-# ifndef alloca /* predefined by HP cc +Olibcalls */
-char *alloca ();
-# endif
-# endif
-# endif
-# endif
-#endif
-
-int main() {
-char *p = (char *) alloca(1);
-; return 0; }
-EOF
-if { (eval echo configure:1160: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- rm -rf conftest*
- ac_cv_func_alloca_works=yes
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- ac_cv_func_alloca_works=no
-fi
-rm -f conftest*
-fi
-
-echo "$ac_t""$ac_cv_func_alloca_works" 1>&6
-if test $ac_cv_func_alloca_works = yes; then
- cat >> confdefs.h <<\EOF
-#define HAVE_ALLOCA 1
-EOF
-
-fi
-
-if test $ac_cv_func_alloca_works = no; then
- # The SVR3 libPW and SVR4 libucb both contain incompatible functions
- # that cause trouble. Some versions do not even contain alloca or
- # contain a buggy version. If you still want to use their alloca,
- # use ar to extract alloca.o from them instead of compiling alloca.c.
- ALLOCA=alloca.${ac_objext}
- cat >> confdefs.h <<\EOF
-#define C_ALLOCA 1
-EOF
-
-
-echo $ac_n "checking whether alloca needs Cray hooks""... $ac_c" 1>&6
-echo "configure:1192: checking whether alloca needs Cray hooks" >&5
-if eval "test \"`echo '$''{'ac_cv_os_cray'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1197 "configure"
-#include "confdefs.h"
-#if defined(CRAY) && ! defined(CRAY2)
-webecray
-#else
-wenotbecray
-#endif
-
-EOF
-if (eval "$ac_cpp conftest.$ac_ext") 2>&5 |
- egrep "webecray" >/dev/null 2>&1; then
- rm -rf conftest*
- ac_cv_os_cray=yes
-else
- rm -rf conftest*
- ac_cv_os_cray=no
-fi
-rm -f conftest*
-
-fi
-
-echo "$ac_t""$ac_cv_os_cray" 1>&6
-if test $ac_cv_os_cray = yes; then
-for ac_func in _getb67 GETB67 getb67; do
- echo $ac_n "checking for $ac_func""... $ac_c" 1>&6
-echo "configure:1222: checking for $ac_func" >&5
-if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1227 "configure"
-#include "confdefs.h"
-/* System header to define __stub macros and hopefully few prototypes,
- which can conflict with char $ac_func(); below. */
-#include <assert.h>
-/* Override any gcc2 internal prototype to avoid an error. */
-/* We use char because int might match the return type of a gcc2
- builtin and then its argument prototype would still apply. */
-char $ac_func();
-
-int main() {
-
-/* The GNU C library defines this for functions which it implements
- to always fail with ENOSYS. Some functions are actually named
- something starting with __ and the normal name is an alias. */
-#if defined (__stub_$ac_func) || defined (__stub___$ac_func)
-choke me
-#else
-$ac_func();
-#endif
-
-; return 0; }
-EOF
-if { (eval echo configure:1250: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=yes"
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=no"
-fi
-rm -f conftest*
-fi
-
-if eval "test \"`echo '$ac_cv_func_'$ac_func`\" = yes"; then
- echo "$ac_t""yes" 1>&6
- cat >> confdefs.h <<EOF
-#define CRAY_STACKSEG_END $ac_func
-EOF
-
- break
-else
- echo "$ac_t""no" 1>&6
-fi
-
-done
-fi
-
-echo $ac_n "checking stack direction for C alloca""... $ac_c" 1>&6
-echo "configure:1277: checking stack direction for C alloca" >&5
-if eval "test \"`echo '$''{'ac_cv_c_stack_direction'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- if test "$cross_compiling" = yes; then
- ac_cv_c_stack_direction=0
-else
- cat > conftest.$ac_ext <<EOF
-#line 1285 "configure"
-#include "confdefs.h"
-find_stack_direction ()
-{
- static char *addr = 0;
- auto char dummy;
- if (addr == 0)
- {
- addr = &dummy;
- return find_stack_direction ();
- }
- else
- return (&dummy > addr) ? 1 : -1;
-}
-main ()
-{
- exit (find_stack_direction() < 0);
-}
-EOF
-if { (eval echo configure:1304: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null
-then
- ac_cv_c_stack_direction=1
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -fr conftest*
- ac_cv_c_stack_direction=-1
-fi
-rm -fr conftest*
-fi
-
-fi
-
-echo "$ac_t""$ac_cv_c_stack_direction" 1>&6
-cat >> confdefs.h <<EOF
-#define STACK_DIRECTION $ac_cv_c_stack_direction
-EOF
-
-fi
-
-for ac_hdr in unistd.h
-do
-ac_safe=`echo "$ac_hdr" | sed 'y%./+-%__p_%'`
-echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6
-echo "configure:1329: checking for $ac_hdr" >&5
-if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1334 "configure"
-#include "confdefs.h"
-#include <$ac_hdr>
-EOF
-ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:1339: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
-ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
-if test -z "$ac_err"; then
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=yes"
-else
- echo "$ac_err" >&5
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=no"
-fi
-rm -f conftest*
-fi
-if eval "test \"`echo '$ac_cv_header_'$ac_safe`\" = yes"; then
- echo "$ac_t""yes" 1>&6
- ac_tr_hdr=HAVE_`echo $ac_hdr | sed 'y%abcdefghijklmnopqrstuvwxyz./-%ABCDEFGHIJKLMNOPQRSTUVWXYZ___%'`
- cat >> confdefs.h <<EOF
-#define $ac_tr_hdr 1
-EOF
-
-else
- echo "$ac_t""no" 1>&6
-fi
-done
-
-for ac_func in getpagesize
-do
-echo $ac_n "checking for $ac_func""... $ac_c" 1>&6
-echo "configure:1368: checking for $ac_func" >&5
-if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1373 "configure"
-#include "confdefs.h"
-/* System header to define __stub macros and hopefully few prototypes,
- which can conflict with char $ac_func(); below. */
-#include <assert.h>
-/* Override any gcc2 internal prototype to avoid an error. */
-/* We use char because int might match the return type of a gcc2
- builtin and then its argument prototype would still apply. */
-char $ac_func();
-
-int main() {
-
-/* The GNU C library defines this for functions which it implements
- to always fail with ENOSYS. Some functions are actually named
- something starting with __ and the normal name is an alias. */
-#if defined (__stub_$ac_func) || defined (__stub___$ac_func)
-choke me
-#else
-$ac_func();
-#endif
-
-; return 0; }
-EOF
-if { (eval echo configure:1396: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=yes"
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=no"
-fi
-rm -f conftest*
-fi
-
-if eval "test \"`echo '$ac_cv_func_'$ac_func`\" = yes"; then
- echo "$ac_t""yes" 1>&6
- ac_tr_func=HAVE_`echo $ac_func | tr 'abcdefghijklmnopqrstuvwxyz' 'ABCDEFGHIJKLMNOPQRSTUVWXYZ'`
- cat >> confdefs.h <<EOF
-#define $ac_tr_func 1
-EOF
-
-else
- echo "$ac_t""no" 1>&6
-fi
-done
-
-echo $ac_n "checking for working mmap""... $ac_c" 1>&6
-echo "configure:1421: checking for working mmap" >&5
-if eval "test \"`echo '$''{'ac_cv_func_mmap_fixed_mapped'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- if test "$cross_compiling" = yes; then
- ac_cv_func_mmap_fixed_mapped=no
-else
- cat > conftest.$ac_ext <<EOF
-#line 1429 "configure"
-#include "confdefs.h"
-
-/* Thanks to Mike Haertel and Jim Avera for this test.
- Here is a matrix of mmap possibilities:
- mmap private not fixed
- mmap private fixed at somewhere currently unmapped
- mmap private fixed at somewhere already mapped
- mmap shared not fixed
- mmap shared fixed at somewhere currently unmapped
- mmap shared fixed at somewhere already mapped
- For private mappings, we should verify that changes cannot be read()
- back from the file, nor mmap's back from the file at a different
- address. (There have been systems where private was not correctly
- implemented like the infamous i386 svr4.0, and systems where the
- VM page cache was not coherent with the filesystem buffer cache
- like early versions of FreeBSD and possibly contemporary NetBSD.)
- For shared mappings, we should conversely verify that changes get
- propogated back to all the places they're supposed to be.
-
- Grep wants private fixed already mapped.
- The main things grep needs to know about mmap are:
- * does it exist and is it safe to write into the mmap'd area
- * how to use it (BSD variants) */
-#include <sys/types.h>
-#include <fcntl.h>
-#include <sys/mman.h>
-
-/* This mess was copied from the GNU getpagesize.h. */
-#ifndef HAVE_GETPAGESIZE
-# ifdef HAVE_UNISTD_H
-# include <unistd.h>
-# endif
-
-/* Assume that all systems that can run configure have sys/param.h. */
-# ifndef HAVE_SYS_PARAM_H
-# define HAVE_SYS_PARAM_H 1
-# endif
-
-# ifdef _SC_PAGESIZE
-# define getpagesize() sysconf(_SC_PAGESIZE)
-# else /* no _SC_PAGESIZE */
-# ifdef HAVE_SYS_PARAM_H
-# include <sys/param.h>
-# ifdef EXEC_PAGESIZE
-# define getpagesize() EXEC_PAGESIZE
-# else /* no EXEC_PAGESIZE */
-# ifdef NBPG
-# define getpagesize() NBPG * CLSIZE
-# ifndef CLSIZE
-# define CLSIZE 1
-# endif /* no CLSIZE */
-# else /* no NBPG */
-# ifdef NBPC
-# define getpagesize() NBPC
-# else /* no NBPC */
-# ifdef PAGESIZE
-# define getpagesize() PAGESIZE
-# endif /* PAGESIZE */
-# endif /* no NBPC */
-# endif /* no NBPG */
-# endif /* no EXEC_PAGESIZE */
-# else /* no HAVE_SYS_PARAM_H */
-# define getpagesize() 8192 /* punt totally */
-# endif /* no HAVE_SYS_PARAM_H */
-# endif /* no _SC_PAGESIZE */
-
-#endif /* no HAVE_GETPAGESIZE */
-
-#ifdef __cplusplus
-extern "C" { void *malloc(unsigned); }
-#else
-char *malloc();
-#endif
-
-int
-main()
-{
- char *data, *data2, *data3;
- int i, pagesize;
- int fd;
-
- pagesize = getpagesize();
-
- /*
- * First, make a file with some known garbage in it.
- */
- data = malloc(pagesize);
- if (!data)
- exit(1);
- for (i = 0; i < pagesize; ++i)
- *(data + i) = rand();
- umask(0);
- fd = creat("conftestmmap", 0600);
- if (fd < 0)
- exit(1);
- if (write(fd, data, pagesize) != pagesize)
- exit(1);
- close(fd);
-
- /*
- * Next, try to mmap the file at a fixed address which
- * already has something else allocated at it. If we can,
- * also make sure that we see the same garbage.
- */
- fd = open("conftestmmap", O_RDWR);
- if (fd < 0)
- exit(1);
- data2 = malloc(2 * pagesize);
- if (!data2)
- exit(1);
- data2 += (pagesize - ((int) data2 & (pagesize - 1))) & (pagesize - 1);
- if (data2 != mmap(data2, pagesize, PROT_READ | PROT_WRITE,
- MAP_PRIVATE | MAP_FIXED, fd, 0L))
- exit(1);
- for (i = 0; i < pagesize; ++i)
- if (*(data + i) != *(data2 + i))
- exit(1);
-
- /*
- * Finally, make sure that changes to the mapped area
- * do not percolate back to the file as seen by read().
- * (This is a bug on some variants of i386 svr4.0.)
- */
- for (i = 0; i < pagesize; ++i)
- *(data2 + i) = *(data2 + i) + 1;
- data3 = malloc(pagesize);
- if (!data3)
- exit(1);
- if (read(fd, data3, pagesize) != pagesize)
- exit(1);
- for (i = 0; i < pagesize; ++i)
- if (*(data + i) != *(data3 + i))
- exit(1);
- close(fd);
- unlink("conftestmmap");
- exit(0);
-}
-
-EOF
-if { (eval echo configure:1569: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null
-then
- ac_cv_func_mmap_fixed_mapped=yes
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -fr conftest*
- ac_cv_func_mmap_fixed_mapped=no
-fi
-rm -fr conftest*
-fi
-
-fi
-
-echo "$ac_t""$ac_cv_func_mmap_fixed_mapped" 1>&6
-if test $ac_cv_func_mmap_fixed_mapped = yes; then
- cat >> confdefs.h <<\EOF
-#define HAVE_MMAP 1
-EOF
-
-fi
-
-echo $ac_n "checking for Cygwin environment""... $ac_c" 1>&6
-echo "configure:1592: checking for Cygwin environment" >&5
-if eval "test \"`echo '$''{'ac_cv_cygwin'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1597 "configure"
-#include "confdefs.h"
-
-int main() {
-
-#ifndef __CYGWIN__
-#define __CYGWIN__ __CYGWIN32__
-#endif
-return __CYGWIN__;
-; return 0; }
-EOF
-if { (eval echo configure:1608: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
- rm -rf conftest*
- ac_cv_cygwin=yes
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- ac_cv_cygwin=no
-fi
-rm -f conftest*
-rm -f conftest*
-fi
-
-echo "$ac_t""$ac_cv_cygwin" 1>&6
-CYGWIN=
-test "$ac_cv_cygwin" = yes && CYGWIN=yes
-echo $ac_n "checking for mingw32 environment""... $ac_c" 1>&6
-echo "configure:1625: checking for mingw32 environment" >&5
-if eval "test \"`echo '$''{'ac_cv_mingw32'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1630 "configure"
-#include "confdefs.h"
-
-int main() {
-return __MINGW32__;
-; return 0; }
-EOF
-if { (eval echo configure:1637: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
- rm -rf conftest*
- ac_cv_mingw32=yes
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- ac_cv_mingw32=no
-fi
-rm -f conftest*
-rm -f conftest*
-fi
-
-echo "$ac_t""$ac_cv_mingw32" 1>&6
-MINGW32=
-test "$ac_cv_mingw32" = yes && MINGW32=yes
-
-# autoconf.info says this should be called right after AC_INIT.
-
-
-ac_aux_dir=
-for ac_dir in `cd $srcdir;pwd`/../.. $srcdir/`cd $srcdir;pwd`/../..; do
- if test -f $ac_dir/install-sh; then
- ac_aux_dir=$ac_dir
- ac_install_sh="$ac_aux_dir/install-sh -c"
- break
- elif test -f $ac_dir/install.sh; then
- ac_aux_dir=$ac_dir
- ac_install_sh="$ac_aux_dir/install.sh -c"
- break
- fi
-done
-if test -z "$ac_aux_dir"; then
- { echo "configure: error: can not find install-sh or install.sh in `cd $srcdir;pwd`/../.. $srcdir/`cd $srcdir;pwd`/../.." 1>&2; exit 1; }
-fi
-ac_config_guess=$ac_aux_dir/config.guess
-ac_config_sub=$ac_aux_dir/config.sub
-ac_configure=$ac_aux_dir/configure # This should be Cygnus configure.
-
-
-# Do some error checking and defaulting for the host and target type.
-# The inputs are:
-# configure --host=HOST --target=TARGET --build=BUILD NONOPT
-#
-# The rules are:
-# 1. You are not allowed to specify --host, --target, and nonopt at the
-# same time.
-# 2. Host defaults to nonopt.
-# 3. If nonopt is not specified, then host defaults to the current host,
-# as determined by config.guess.
-# 4. Target and build default to nonopt.
-# 5. If nonopt is not specified, then target and build default to host.
-
-# The aliases save the names the user supplied, while $host etc.
-# will get canonicalized.
-case $host---$target---$nonopt in
-NONE---*---* | *---NONE---* | *---*---NONE) ;;
-*) { echo "configure: error: can only configure for one host and one target at a time" 1>&2; exit 1; } ;;
-esac
-
-
-# Make sure we can run config.sub.
-if ${CONFIG_SHELL-/bin/sh} $ac_config_sub sun4 >/dev/null 2>&1; then :
-else { echo "configure: error: can not run $ac_config_sub" 1>&2; exit 1; }
-fi
-
-echo $ac_n "checking host system type""... $ac_c" 1>&6
-echo "configure:1704: checking host system type" >&5
-
-host_alias=$host
-case "$host_alias" in
-NONE)
- case $nonopt in
- NONE)
- if host_alias=`${CONFIG_SHELL-/bin/sh} $ac_config_guess`; then :
- else { echo "configure: error: can not guess host type; you must specify one" 1>&2; exit 1; }
- fi ;;
- *) host_alias=$nonopt ;;
- esac ;;
-esac
-
-host=`${CONFIG_SHELL-/bin/sh} $ac_config_sub $host_alias`
-host_cpu=`echo $host | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\1/'`
-host_vendor=`echo $host | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\2/'`
-host_os=`echo $host | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\3/'`
-echo "$ac_t""$host" 1>&6
-
-echo $ac_n "checking target system type""... $ac_c" 1>&6
-echo "configure:1725: checking target system type" >&5
-
-target_alias=$target
-case "$target_alias" in
-NONE)
- case $nonopt in
- NONE) target_alias=$host_alias ;;
- *) target_alias=$nonopt ;;
- esac ;;
-esac
-
-target=`${CONFIG_SHELL-/bin/sh} $ac_config_sub $target_alias`
-target_cpu=`echo $target | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\1/'`
-target_vendor=`echo $target | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\2/'`
-target_os=`echo $target | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\3/'`
-echo "$ac_t""$target" 1>&6
-
-echo $ac_n "checking build system type""... $ac_c" 1>&6
-echo "configure:1743: checking build system type" >&5
-
-build_alias=$build
-case "$build_alias" in
-NONE)
- case $nonopt in
- NONE) build_alias=$host_alias ;;
- *) build_alias=$nonopt ;;
- esac ;;
-esac
-
-build=`${CONFIG_SHELL-/bin/sh} $ac_config_sub $build_alias`
-build_cpu=`echo $build | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\1/'`
-build_vendor=`echo $build | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\2/'`
-build_os=`echo $build | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\3/'`
-echo "$ac_t""$build" 1>&6
-
-test "$host_alias" != "$target_alias" &&
- test "$program_prefix$program_suffix$program_transform_name" = \
- NONENONEs,x,x, &&
- program_prefix=${target_alias}-
-
-if test "$program_transform_name" = s,x,x,; then
- program_transform_name=
-else
- # Double any \ or $. echo might interpret backslashes.
- cat <<\EOF_SED > conftestsed
-s,\\,\\\\,g; s,\$,$$,g
-EOF_SED
- program_transform_name="`echo $program_transform_name|sed -f conftestsed`"
- rm -f conftestsed
-fi
-test "$program_prefix" != NONE &&
- program_transform_name="s,^,${program_prefix},; $program_transform_name"
-# Use a double $ so make ignores it.
-test "$program_suffix" != NONE &&
- program_transform_name="s,\$\$,${program_suffix},; $program_transform_name"
-
-# sed with no file args requires a program.
-test "$program_transform_name" = "" && program_transform_name="s,x,x,"
-
-# Extract the first word of "gcc", so it can be a program name with args.
-set dummy gcc; ac_word=$2
-echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:1787: checking for $ac_word" >&5
-if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- if test -n "$CC"; then
- ac_cv_prog_CC="$CC" # Let the user override the test.
-else
- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
- ac_dummy="$PATH"
- for ac_dir in $ac_dummy; do
- test -z "$ac_dir" && ac_dir=.
- if test -f $ac_dir/$ac_word; then
- ac_cv_prog_CC="gcc"
- break
- fi
- done
- IFS="$ac_save_ifs"
-fi
-fi
-CC="$ac_cv_prog_CC"
-if test -n "$CC"; then
- echo "$ac_t""$CC" 1>&6
-else
- echo "$ac_t""no" 1>&6
-fi
-
-if test -z "$CC"; then
- # Extract the first word of "cc", so it can be a program name with args.
-set dummy cc; ac_word=$2
-echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:1817: checking for $ac_word" >&5
-if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- if test -n "$CC"; then
- ac_cv_prog_CC="$CC" # Let the user override the test.
-else
- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
- ac_prog_rejected=no
- ac_dummy="$PATH"
- for ac_dir in $ac_dummy; do
- test -z "$ac_dir" && ac_dir=.
- if test -f $ac_dir/$ac_word; then
- if test "$ac_dir/$ac_word" = "/usr/ucb/cc"; then
- ac_prog_rejected=yes
- continue
- fi
- ac_cv_prog_CC="cc"
- break
- fi
- done
- IFS="$ac_save_ifs"
-if test $ac_prog_rejected = yes; then
- # We found a bogon in the path, so make sure we never use it.
- set dummy $ac_cv_prog_CC
- shift
- if test $# -gt 0; then
- # We chose a different compiler from the bogus one.
- # However, it has the same basename, so the bogon will be chosen
- # first if we set CC to just the basename; use the full file name.
- shift
- set dummy "$ac_dir/$ac_word" "$@"
- shift
- ac_cv_prog_CC="$@"
- fi
-fi
-fi
-fi
-CC="$ac_cv_prog_CC"
-if test -n "$CC"; then
- echo "$ac_t""$CC" 1>&6
-else
- echo "$ac_t""no" 1>&6
-fi
-
- if test -z "$CC"; then
- case "`uname -s`" in
- *win32* | *WIN32*)
- # Extract the first word of "cl", so it can be a program name with args.
-set dummy cl; ac_word=$2
-echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:1868: checking for $ac_word" >&5
-if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- if test -n "$CC"; then
- ac_cv_prog_CC="$CC" # Let the user override the test.
-else
- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
- ac_dummy="$PATH"
- for ac_dir in $ac_dummy; do
- test -z "$ac_dir" && ac_dir=.
- if test -f $ac_dir/$ac_word; then
- ac_cv_prog_CC="cl"
- break
- fi
- done
- IFS="$ac_save_ifs"
-fi
-fi
-CC="$ac_cv_prog_CC"
-if test -n "$CC"; then
- echo "$ac_t""$CC" 1>&6
-else
- echo "$ac_t""no" 1>&6
-fi
- ;;
- esac
- fi
- test -z "$CC" && { echo "configure: error: no acceptable cc found in \$PATH" 1>&2; exit 1; }
-fi
-
-echo $ac_n "checking whether the C compiler ($CC $CFLAGS $LDFLAGS) works""... $ac_c" 1>&6
-echo "configure:1900: checking whether the C compiler ($CC $CFLAGS $LDFLAGS) works" >&5
-
-ac_ext=c
-# CFLAGS is not in ac_cpp because -g, -O, etc. are not valid cpp options.
-ac_cpp='$CPP $CPPFLAGS'
-ac_compile='${CC-cc} -c $CFLAGS $CPPFLAGS conftest.$ac_ext 1>&5'
-ac_link='${CC-cc} -o conftest${ac_exeext} $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS 1>&5'
-cross_compiling=$ac_cv_prog_cc_cross
-
-cat > conftest.$ac_ext << EOF
-
-#line 1911 "configure"
-#include "confdefs.h"
-
-main(){return(0);}
-EOF
-if { (eval echo configure:1916: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- ac_cv_prog_cc_works=yes
- # If we can't run a trivial program, we are probably using a cross compiler.
- if (./conftest; exit) 2>/dev/null; then
- ac_cv_prog_cc_cross=no
- else
- ac_cv_prog_cc_cross=yes
- fi
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- ac_cv_prog_cc_works=no
-fi
-rm -fr conftest*
-ac_ext=c
-# CFLAGS is not in ac_cpp because -g, -O, etc. are not valid cpp options.
-ac_cpp='$CPP $CPPFLAGS'
-ac_compile='${CC-cc} -c $CFLAGS $CPPFLAGS conftest.$ac_ext 1>&5'
-ac_link='${CC-cc} -o conftest${ac_exeext} $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS 1>&5'
-cross_compiling=$ac_cv_prog_cc_cross
-
-echo "$ac_t""$ac_cv_prog_cc_works" 1>&6
-if test $ac_cv_prog_cc_works = no; then
- { echo "configure: error: installation or configuration problem: C compiler cannot create executables." 1>&2; exit 1; }
-fi
-echo $ac_n "checking whether the C compiler ($CC $CFLAGS $LDFLAGS) is a cross-compiler""... $ac_c" 1>&6
-echo "configure:1942: checking whether the C compiler ($CC $CFLAGS $LDFLAGS) is a cross-compiler" >&5
-echo "$ac_t""$ac_cv_prog_cc_cross" 1>&6
-cross_compiling=$ac_cv_prog_cc_cross
-
-echo $ac_n "checking whether we are using GNU C""... $ac_c" 1>&6
-echo "configure:1947: checking whether we are using GNU C" >&5
-if eval "test \"`echo '$''{'ac_cv_prog_gcc'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.c <<EOF
-#ifdef __GNUC__
- yes;
-#endif
-EOF
-if { ac_try='${CC-cc} -E conftest.c'; { (eval echo configure:1956: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }; } | egrep yes >/dev/null 2>&1; then
- ac_cv_prog_gcc=yes
-else
- ac_cv_prog_gcc=no
-fi
-fi
-
-echo "$ac_t""$ac_cv_prog_gcc" 1>&6
-
-if test $ac_cv_prog_gcc = yes; then
- GCC=yes
-else
- GCC=
-fi
-
-ac_test_CFLAGS="${CFLAGS+set}"
-ac_save_CFLAGS="$CFLAGS"
-CFLAGS=
-echo $ac_n "checking whether ${CC-cc} accepts -g""... $ac_c" 1>&6
-echo "configure:1975: checking whether ${CC-cc} accepts -g" >&5
-if eval "test \"`echo '$''{'ac_cv_prog_cc_g'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- echo 'void f(){}' > conftest.c
-if test -z "`${CC-cc} -g -c conftest.c 2>&1`"; then
- ac_cv_prog_cc_g=yes
-else
- ac_cv_prog_cc_g=no
-fi
-rm -f conftest*
-
-fi
-
-echo "$ac_t""$ac_cv_prog_cc_g" 1>&6
-if test "$ac_test_CFLAGS" = set; then
- CFLAGS="$ac_save_CFLAGS"
-elif test $ac_cv_prog_cc_g = yes; then
- if test "$GCC" = yes; then
- CFLAGS="-g -O2"
- else
- CFLAGS="-g"
- fi
-else
- if test "$GCC" = yes; then
- CFLAGS="-O2"
- else
- CFLAGS=
- fi
-fi
-
-# Find a good install program. We prefer a C program (faster),
-# so one script is as good as another. But avoid the broken or
-# incompatible versions:
-# SysV /etc/install, /usr/sbin/install
-# SunOS /usr/etc/install
-# IRIX /sbin/install
-# AIX /bin/install
-# AIX 4 /usr/bin/installbsd, which doesn't work without a -g flag
-# AFS /usr/afsws/bin/install, which mishandles nonexistent args
-# SVR4 /usr/ucb/install, which tries to use the nonexistent group "staff"
-# ./install, which can be erroneously created by make from ./install.sh.
-echo $ac_n "checking for a BSD compatible install""... $ac_c" 1>&6
-echo "configure:2018: checking for a BSD compatible install" >&5
-if test -z "$INSTALL"; then
-if eval "test \"`echo '$''{'ac_cv_path_install'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- IFS="${IFS= }"; ac_save_IFS="$IFS"; IFS=":"
- for ac_dir in $PATH; do
- # Account for people who put trailing slashes in PATH elements.
- case "$ac_dir/" in
- /|./|.//|/etc/*|/usr/sbin/*|/usr/etc/*|/sbin/*|/usr/afsws/bin/*|/usr/ucb/*) ;;
- *)
- # OSF1 and SCO ODT 3.0 have their own names for install.
- # Don't use installbsd from OSF since it installs stuff as root
- # by default.
- for ac_prog in ginstall scoinst install; do
- if test -f $ac_dir/$ac_prog; then
- if test $ac_prog = install &&
- grep dspmsg $ac_dir/$ac_prog >/dev/null 2>&1; then
- # AIX install. It has an incompatible calling convention.
- :
- else
- ac_cv_path_install="$ac_dir/$ac_prog -c"
- break 2
- fi
- fi
- done
- ;;
- esac
- done
- IFS="$ac_save_IFS"
-
-fi
- if test "${ac_cv_path_install+set}" = set; then
- INSTALL="$ac_cv_path_install"
- else
- # As a last resort, use the slow shell script. We don't cache a
- # path for INSTALL within a source directory, because that will
- # break other packages using the cache if that directory is
- # removed, or if the path is relative.
- INSTALL="$ac_install_sh"
- fi
-fi
-echo "$ac_t""$INSTALL" 1>&6
-
-# Use test -z because SunOS4 sh mishandles braces in ${var-val}.
-# It thinks the first close brace ends the variable substitution.
-test -z "$INSTALL_PROGRAM" && INSTALL_PROGRAM='${INSTALL}'
-
-test -z "$INSTALL_SCRIPT" && INSTALL_SCRIPT='${INSTALL_PROGRAM}'
-
-test -z "$INSTALL_DATA" && INSTALL_DATA='${INSTALL} -m 644'
-
-
-# Put a plausible default for CC_FOR_BUILD in Makefile.
-if test "x$cross_compiling" = "xno"; then
- CC_FOR_BUILD='$(CC)'
-else
- CC_FOR_BUILD=gcc
-fi
-
-
-
-
-AR=${AR-ar}
-
-# Extract the first word of "ranlib", so it can be a program name with args.
-set dummy ranlib; ac_word=$2
-echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:2086: checking for $ac_word" >&5
-if eval "test \"`echo '$''{'ac_cv_prog_RANLIB'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- if test -n "$RANLIB"; then
- ac_cv_prog_RANLIB="$RANLIB" # Let the user override the test.
-else
- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
- ac_dummy="$PATH"
- for ac_dir in $ac_dummy; do
- test -z "$ac_dir" && ac_dir=.
- if test -f $ac_dir/$ac_word; then
- ac_cv_prog_RANLIB="ranlib"
- break
- fi
- done
- IFS="$ac_save_ifs"
- test -z "$ac_cv_prog_RANLIB" && ac_cv_prog_RANLIB=":"
-fi
-fi
-RANLIB="$ac_cv_prog_RANLIB"
-if test -n "$RANLIB"; then
- echo "$ac_t""$RANLIB" 1>&6
-else
- echo "$ac_t""no" 1>&6
-fi
-
-
-ALL_LINGUAS=
-
- for ac_hdr in argz.h limits.h locale.h nl_types.h malloc.h string.h \
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-
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-char $ac_func();
-
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- *)
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-
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- *)
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-
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-
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-
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-
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- for ac_dir in $PATH; do
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-else
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-
- # Extract the first word of "gmsgfmt", so it can be a program name with args.
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-echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:2713: checking for $ac_word" >&5
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-else
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- ?:/*)
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- ;;
- *)
- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
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- IFS="$ac_save_ifs"
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-GMSGFMT="$ac_cv_path_GMSGFMT"
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-fi
-
- # Extract the first word of "xgettext", so it can be a program name with args.
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-else
- echo "$ac_t""no" 1>&6
-fi
-
-
- USE_INCLUDED_LIBINTL=yes
- CATOBJEXT=.gmo
- INSTOBJEXT=.mo
- DATADIRNAME=share
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- LIBS=`echo $LIBS | sed -e 's/-lintl//'`
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-
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-
-
-
-
-
-
-
-
-
-
-
-
-
-
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-echo "configure:2839: checking for catalogs to be installed" >&5
- NEW_LINGUAS=
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-
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-
- if test $ac_cv_header_locale_h = yes; then
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- else
- INCLUDE_LOCALE_H="\
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- fi
-
-
- if test -f $srcdir/po2tbl.sed.in; then
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-echo "configure:2867: checking for linux/version.h" >&5
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-{ (eval echo configure:2877: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
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- eval "ac_cv_header_$ac_safe=yes"
-else
- echo "$ac_err" >&5
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=no"
-fi
-rm -f conftest*
-fi
-if eval "test \"`echo '$ac_cv_header_'$ac_safe`\" = yes"; then
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- msgformat=linux
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- echo "$ac_t""no" 1>&6
-msgformat=xopen
-fi
-
-
- sed -e '/^#/d' $srcdir/$msgformat-msg.sed > po2msg.sed
- fi
- sed -e '/^#.*[^\\]$/d' -e '/^#$/d' \
- $srcdir/po2tbl.sed.in > po2tbl.sed
- fi
-
- if test "$PACKAGE" = "gettext"; then
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- GT_YES=
- else
- GT_NO=
- GT_YES="#YES#"
- fi
-
-
-
- MKINSTALLDIRS="\$(srcdir)/../../mkinstalldirs"
-
-
- l=
-
-
- if test -d $srcdir/po; then
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- if test "x$srcdir" != "x."; then
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- else
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- fi
- else
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- fi
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- sed -e "/^#/d" -e "/^\$/d" -e "s,.*, $posrcprefix& \\\\," -e "\$s/\(.*\) \\\\/\1/" \
- < $srcdir/po/POTFILES.in > po/POTFILES
- fi
-
-
-# Check for common headers.
-# FIXME: Seems to me this can cause problems for i386-windows hosts.
-# At one point there were hardcoded AC_DEFINE's if ${host} = i386-*-windows*.
-for ac_hdr in stdlib.h string.h strings.h unistd.h time.h
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-echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6
-echo "configure:2946: checking for $ac_hdr" >&5
-if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 2951 "configure"
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-ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:2956: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
-ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
-if test -z "$ac_err"; then
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=yes"
-else
- echo "$ac_err" >&5
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=no"
-fi
-rm -f conftest*
-fi
-if eval "test \"`echo '$ac_cv_header_'$ac_safe`\" = yes"; then
- echo "$ac_t""yes" 1>&6
- ac_tr_hdr=HAVE_`echo $ac_hdr | sed 'y%abcdefghijklmnopqrstuvwxyz./-%ABCDEFGHIJKLMNOPQRSTUVWXYZ___%'`
- cat >> confdefs.h <<EOF
-#define $ac_tr_hdr 1
-EOF
-
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- echo "$ac_t""no" 1>&6
-fi
-done
-
-for ac_hdr in sys/time.h sys/resource.h
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-echo "configure:2986: checking for $ac_hdr" >&5
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-{ (eval echo configure:2996: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
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- eval "ac_cv_header_$ac_safe=yes"
-else
- echo "$ac_err" >&5
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=no"
-fi
-rm -f conftest*
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-if eval "test \"`echo '$ac_cv_header_'$ac_safe`\" = yes"; then
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- ac_tr_hdr=HAVE_`echo $ac_hdr | sed 'y%abcdefghijklmnopqrstuvwxyz./-%ABCDEFGHIJKLMNOPQRSTUVWXYZ___%'`
- cat >> confdefs.h <<EOF
-#define $ac_tr_hdr 1
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-
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- echo "$ac_t""no" 1>&6
-fi
-done
-
-for ac_hdr in fcntl.h fpu_control.h
-do
-ac_safe=`echo "$ac_hdr" | sed 'y%./+-%__p_%'`
-echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6
-echo "configure:3026: checking for $ac_hdr" >&5
-if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
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- cat > conftest.$ac_ext <<EOF
-#line 3031 "configure"
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-#include <$ac_hdr>
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-ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:3036: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
-ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
-if test -z "$ac_err"; then
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=yes"
-else
- echo "$ac_err" >&5
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=no"
-fi
-rm -f conftest*
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-if eval "test \"`echo '$ac_cv_header_'$ac_safe`\" = yes"; then
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- ac_tr_hdr=HAVE_`echo $ac_hdr | sed 'y%abcdefghijklmnopqrstuvwxyz./-%ABCDEFGHIJKLMNOPQRSTUVWXYZ___%'`
- cat >> confdefs.h <<EOF
-#define $ac_tr_hdr 1
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-
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- echo "$ac_t""no" 1>&6
-fi
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-
-for ac_hdr in dlfcn.h errno.h sys/stat.h
-do
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-echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6
-echo "configure:3066: checking for $ac_hdr" >&5
-if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 3071 "configure"
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-#include <$ac_hdr>
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-ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:3076: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
-ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
-if test -z "$ac_err"; then
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- eval "ac_cv_header_$ac_safe=yes"
-else
- echo "$ac_err" >&5
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
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- eval "ac_cv_header_$ac_safe=no"
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-if eval "test \"`echo '$ac_cv_header_'$ac_safe`\" = yes"; then
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- ac_tr_hdr=HAVE_`echo $ac_hdr | sed 'y%abcdefghijklmnopqrstuvwxyz./-%ABCDEFGHIJKLMNOPQRSTUVWXYZ___%'`
- cat >> confdefs.h <<EOF
-#define $ac_tr_hdr 1
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-
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-
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-echo "configure:3105: checking for $ac_func" >&5
-if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 3110 "configure"
-#include "confdefs.h"
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-/* Override any gcc2 internal prototype to avoid an error. */
-/* We use char because int might match the return type of a gcc2
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-char $ac_func();
-
-int main() {
-
-/* The GNU C library defines this for functions which it implements
- to always fail with ENOSYS. Some functions are actually named
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-#if defined (__stub_$ac_func) || defined (__stub___$ac_func)
-choke me
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-$ac_func();
-#endif
-
-; return 0; }
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-if { (eval echo configure:3133: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=yes"
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=no"
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-
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- ac_tr_func=HAVE_`echo $ac_func | tr 'abcdefghijklmnopqrstuvwxyz' 'ABCDEFGHIJKLMNOPQRSTUVWXYZ'`
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-
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- echo "$ac_t""no" 1>&6
-fi
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-
-
-# Check for socket libraries
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-echo "configure:3160: checking for bind in -lsocket" >&5
-ac_lib_var=`echo socket'_'bind | sed 'y%./+-%__p_%'`
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-else
- ac_save_LIBS="$LIBS"
-LIBS="-lsocket $LIBS"
-cat > conftest.$ac_ext <<EOF
-#line 3168 "configure"
-#include "confdefs.h"
-/* Override any gcc2 internal prototype to avoid an error. */
-/* We use char because int might match the return type of a gcc2
- builtin and then its argument prototype would still apply. */
-char bind();
-
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-bind()
-; return 0; }
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-if { (eval echo configure:3179: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
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- eval "ac_cv_lib_$ac_lib_var=yes"
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- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_lib_$ac_lib_var=no"
-fi
-rm -f conftest*
-LIBS="$ac_save_LIBS"
-
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-if eval "test \"`echo '$ac_cv_lib_'$ac_lib_var`\" = yes"; then
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- ac_tr_lib=HAVE_LIB`echo socket | sed -e 's/[^a-zA-Z0-9_]/_/g' \
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- cat >> confdefs.h <<EOF
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-
- LIBS="-lsocket $LIBS"
-
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- echo "$ac_t""no" 1>&6
-fi
-
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-echo "configure:3207: checking for gethostbyname in -lnsl" >&5
-ac_lib_var=`echo nsl'_'gethostbyname | sed 'y%./+-%__p_%'`
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-else
- ac_save_LIBS="$LIBS"
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-cat > conftest.$ac_ext <<EOF
-#line 3215 "configure"
-#include "confdefs.h"
-/* Override any gcc2 internal prototype to avoid an error. */
-/* We use char because int might match the return type of a gcc2
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-
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- eval "ac_cv_lib_$ac_lib_var=yes"
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-
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-
-
-. ${srcdir}/../../bfd/configure.host
-
-
-
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-
-
-
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- sim_bswap=""
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-
-
-
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- trace) { echo "configure: error: "Please use --enable-sim-debug instead."" 1>&2; exit 1; }; sim_cflags="";;
- no) sim_cflags="";;
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-fi
-else
- sim_cflags=""
-fi
-
-
-
-# Check whether --enable-sim-debug or --disable-sim-debug was given.
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- case "${enableval}" in
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- no) sim_debug="-DDEBUG=0 -DWITH_DEBUG=0";;
- *) sim_debug="-DDEBUG='(${enableval})' -DWITH_DEBUG='(${enableval})'";;
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-if test x"$silent" != x"yes" && test x"$sim_debug" != x""; then
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-fi
-else
- sim_debug=""
-fi
-
-
-
-# Check whether --enable-sim-stdio or --disable-sim-stdio was given.
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- case "${enableval}" in
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- no) sim_stdio="-DWITH_STDIO=DONT_USE_STDIO";;
- *) { echo "configure: error: "Unknown value $enableval passed to --enable-sim-stdio"" 1>&2; exit 1; }; sim_stdio="";;
-esac
-if test x"$silent" != x"yes" && test x"$sim_stdio" != x""; then
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-fi
-else
- sim_stdio=""
-fi
-
-
-
-# Check whether --enable-sim-trace or --disable-sim-trace was given.
-if test "${enable_sim_trace+set}" = set; then
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- case "${enableval}" in
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- no) sim_trace="-DTRACE=0 -DWITH_TRACE=0";;
- [-0-9]*)
- sim_trace="-DTRACE='(${enableval})' -DWITH_TRACE='(${enableval})'";;
- [a-z]*)
- sim_trace=""
- for x in `echo "$enableval" | sed -e "s/,/ /g"`; do
- if test x"$sim_trace" = x; then
- sim_trace="-DWITH_TRACE='(TRACE_$x"
- else
- sim_trace="${sim_trace}|TRACE_$x"
- fi
- done
- sim_trace="$sim_trace)'" ;;
-esac
-if test x"$silent" != x"yes" && test x"$sim_trace" != x""; then
- echo "Setting sim trace = $sim_trace" 6>&1
-fi
-else
- sim_trace=""
-fi
-
-
-
-# Check whether --enable-sim-profile or --disable-sim-profile was given.
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- [-0-9]*)
- sim_profile="-DPROFILE='(${enableval})' -DWITH_PROFILE='(${enableval})'";;
- [a-z]*)
- sim_profile=""
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- sim_profile="-DWITH_PROFILE='(PROFILE_$x"
- else
- sim_profile="${sim_profile}|PROFILE_$x"
- fi
- done
- sim_profile="$sim_profile)'" ;;
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-fi
-else
- sim_profile="-DPROFILE=1 -DWITH_PROFILE=-1"
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-
-
-
-echo $ac_n "checking return type of signal handlers""... $ac_c" 1>&6
-echo "configure:3402: checking return type of signal handlers" >&5
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- echo $ac_n "(cached) $ac_c" 1>&6
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- cat > conftest.$ac_ext <<EOF
-#line 3407 "configure"
-#include "confdefs.h"
-#include <sys/types.h>
-#include <signal.h>
-#ifdef signal
-#undef signal
-#endif
-#ifdef __cplusplus
-extern "C" void (*signal (int, void (*)(int)))(int);
-#else
-void (*signal ()) ();
-#endif
-
-int main() {
-int i;
-; return 0; }
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-if { (eval echo configure:3424: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
- rm -rf conftest*
- ac_cv_type_signal=void
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- ac_cv_type_signal=int
-fi
-rm -f conftest*
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-
-echo "$ac_t""$ac_cv_type_signal" 1>&6
-cat >> confdefs.h <<EOF
-#define RETSIGTYPE $ac_cv_type_signal
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-
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-
-
-
-echo $ac_n "checking for executable suffix""... $ac_c" 1>&6
-echo "configure:3446: checking for executable suffix" >&5
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- if test "$CYGWIN" = yes || test "$MINGW32" = yes; then
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- echo 'int main () { return 0; }' > conftest.$ac_ext
- ac_cv_exeext=
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- case $file in
- *.c | *.o | *.obj | *.ilk | *.pdb) ;;
- *) ac_cv_exeext=`echo $file | sed -e s/conftest//` ;;
- esac
- done
- else
- { echo "configure: error: installation or configuration problem: compiler cannot create executables." 1>&2; exit 1; }
- fi
- rm -f conftest*
- test x"${ac_cv_exeext}" = x && ac_cv_exeext=no
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-fi
-
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-echo "$ac_t""${ac_cv_exeext}" 1>&6
-ac_exeext=$EXEEXT
-
-
-sim_link_files=
-sim_link_links=
-
-sim_link_links=tconfig.h
-if test -f ${srcdir}/tconfig.in
-then
- sim_link_files=tconfig.in
-else
- sim_link_files=../common/tconfig.in
-fi
-
-# targ-vals.def points to the libc macro description file.
-case "${target}" in
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-sim_link_files="${sim_link_files} ${TARG_VALS_DEF}"
-sim_link_links="${sim_link_links} targ-vals.def"
-
-
-
-for ac_hdr in unistd.h
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-ac_safe=`echo "$ac_hdr" | sed 'y%./+-%__p_%'`
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-echo "configure:3501: checking for $ac_hdr" >&5
-if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
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- cat > conftest.$ac_ext <<EOF
-#line 3506 "configure"
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-EOF
-ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:3511: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
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- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=yes"
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- echo "$ac_err" >&5
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=no"
-fi
-rm -f conftest*
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- ac_tr_hdr=HAVE_`echo $ac_hdr | sed 'y%abcdefghijklmnopqrstuvwxyz./-%ABCDEFGHIJKLMNOPQRSTUVWXYZ___%'`
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-
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- echo "$ac_t""no" 1>&6
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-
-
-
-
-trap '' 1 2 15
-cat > confcache <<\EOF
-# This file is a shell script that caches the results of configure
-# tests run on this system so they can be shared between configure
-# scripts and configure runs. It is not useful on other systems.
-# If it contains results you don't want to keep, you may remove or edit it.
-#
-# By default, configure uses ./config.cache as the cache file,
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-# the --cache-file=FILE option to use a different cache file; that is
-# what configure does when it calls configure scripts in
-# subdirectories, so they share the cache.
-# Giving --cache-file=/dev/null disables caching, for debugging configure.
-# config.status only pays attention to the cache file if you give it the
-# --recheck option to rerun configure.
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-# The following way of writing the cache mishandles newlines in values,
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-# and sets the high bit in the cache file unless we assign to the vars.
-(set) 2>&1 |
- case `(ac_space=' '; set | grep ac_space) 2>&1` in
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- # turns \\\\ into \\, and sed turns \\ into \).
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- -e "s/'/'\\\\''/g" \
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- ;;
- *)
- # `set' quotes correctly as required by POSIX, so do not add quotes.
- sed -n -e 's/^\([a-zA-Z0-9_]*_cv_[a-zA-Z0-9_]*\)=\(.*\)/\1=${\1=\2}/p'
- ;;
- esac >> confcache
-if cmp -s $cache_file confcache; then
- :
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- if test -w $cache_file; then
- echo "updating cache $cache_file"
- cat confcache > $cache_file
- else
- echo "not updating unwritable cache $cache_file"
- fi
-fi
-rm -f confcache
-
-trap 'rm -fr conftest* confdefs* core core.* *.core $ac_clean_files; exit 1' 1 2 15
-
-test "x$prefix" = xNONE && prefix=$ac_default_prefix
-# Let make expand exec_prefix.
-test "x$exec_prefix" = xNONE && exec_prefix='${prefix}'
-
-# Any assignment to VPATH causes Sun make to only execute
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-# If there is a colon in the path, we need to keep it.
-if test "x$srcdir" = x.; then
- ac_vpsub='/^[ ]*VPATH[ ]*=[^:]*$/d'
-fi
-
-trap 'rm -f $CONFIG_STATUS conftest*; exit 1' 1 2 15
-
-DEFS=-DHAVE_CONFIG_H
-
-# Without the "./", some shells look in PATH for config.status.
-: ${CONFIG_STATUS=./config.status}
-
-echo creating $CONFIG_STATUS
-rm -f $CONFIG_STATUS
-cat > $CONFIG_STATUS <<EOF
-#! /bin/sh
-# Generated automatically by configure.
-# Run this file to recreate the current configuration.
-# This directory was configured as follows,
-# on host `(hostname || uname -n) 2>/dev/null | sed 1q`:
-#
-# $0 $ac_configure_args
-#
-# Compiler output produced by configure, useful for debugging
-# configure, is in ./config.log if it exists.
-
-ac_cs_usage="Usage: $CONFIG_STATUS [--recheck] [--version] [--help]"
-for ac_option
-do
- case "\$ac_option" in
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- echo "running \${CONFIG_SHELL-/bin/sh} $0 $ac_configure_args --no-create --no-recursion"
- exec \${CONFIG_SHELL-/bin/sh} $0 $ac_configure_args --no-create --no-recursion ;;
- -version | --version | --versio | --versi | --vers | --ver | --ve | --v)
- echo "$CONFIG_STATUS generated by autoconf version 2.13"
- exit 0 ;;
- -help | --help | --hel | --he | --h)
- echo "\$ac_cs_usage"; exit 0 ;;
- *) echo "\$ac_cs_usage"; exit 1 ;;
- esac
-done
-
-ac_given_srcdir=$srcdir
-ac_given_INSTALL="$INSTALL"
-
-trap 'rm -fr `echo "Makefile.sim:Makefile.in Make-common.sim:../common/Make-common.in .gdbinit:../common/gdbinit.in config.h:config.in" | sed "s/:[^ ]*//g"` conftest*; exit 1' 1 2 15
-EOF
-cat >> $CONFIG_STATUS <<EOF
-
-# Protect against being on the right side of a sed subst in config.status.
-sed 's/%@/@@/; s/@%/@@/; s/%g\$/@g/; /@g\$/s/[\\\\&%]/\\\\&/g;
- s/@@/%@/; s/@@/@%/; s/@g\$/%g/' > conftest.subs <<\\CEOF
-$ac_vpsub
-$extrasub
-s%@sim_environment@%$sim_environment%g
-s%@sim_alignment@%$sim_alignment%g
-s%@sim_assert@%$sim_assert%g
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-s%@sim_endian@%$sim_endian%g
-s%@sim_hostendian@%$sim_hostendian%g
-s%@sim_float@%$sim_float%g
-s%@sim_scache@%$sim_scache%g
-s%@sim_default_model@%$sim_default_model%g
-s%@sim_hw_cflags@%$sim_hw_cflags%g
-s%@sim_hw_objs@%$sim_hw_objs%g
-s%@sim_hw@%$sim_hw%g
-s%@sim_inline@%$sim_inline%g
-s%@sim_packages@%$sim_packages%g
-s%@sim_regparm@%$sim_regparm%g
-s%@sim_reserved_bits@%$sim_reserved_bits%g
-s%@sim_smp@%$sim_smp%g
-s%@sim_stdcall@%$sim_stdcall%g
-s%@sim_xor_endian@%$sim_xor_endian%g
-s%@WARN_CFLAGS@%$WARN_CFLAGS%g
-s%@WERROR_CFLAGS@%$WERROR_CFLAGS%g
-s%@SHELL@%$SHELL%g
-s%@CFLAGS@%$CFLAGS%g
-s%@CPPFLAGS@%$CPPFLAGS%g
-s%@CXXFLAGS@%$CXXFLAGS%g
-s%@FFLAGS@%$FFLAGS%g
-s%@DEFS@%$DEFS%g
-s%@LDFLAGS@%$LDFLAGS%g
-s%@LIBS@%$LIBS%g
-s%@exec_prefix@%$exec_prefix%g
-s%@prefix@%$prefix%g
-s%@program_transform_name@%$program_transform_name%g
-s%@bindir@%$bindir%g
-s%@sbindir@%$sbindir%g
-s%@libexecdir@%$libexecdir%g
-s%@datadir@%$datadir%g
-s%@sysconfdir@%$sysconfdir%g
-s%@sharedstatedir@%$sharedstatedir%g
-s%@localstatedir@%$localstatedir%g
-s%@libdir@%$libdir%g
-s%@includedir@%$includedir%g
-s%@oldincludedir@%$oldincludedir%g
-s%@infodir@%$infodir%g
-s%@mandir@%$mandir%g
-s%@host@%$host%g
-s%@host_alias@%$host_alias%g
-s%@host_cpu@%$host_cpu%g
-s%@host_vendor@%$host_vendor%g
-s%@host_os@%$host_os%g
-s%@target@%$target%g
-s%@target_alias@%$target_alias%g
-s%@target_cpu@%$target_cpu%g
-s%@target_vendor@%$target_vendor%g
-s%@target_os@%$target_os%g
-s%@build@%$build%g
-s%@build_alias@%$build_alias%g
-s%@build_cpu@%$build_cpu%g
-s%@build_vendor@%$build_vendor%g
-s%@build_os@%$build_os%g
-s%@CC@%$CC%g
-s%@INSTALL_PROGRAM@%$INSTALL_PROGRAM%g
-s%@INSTALL_SCRIPT@%$INSTALL_SCRIPT%g
-s%@INSTALL_DATA@%$INSTALL_DATA%g
-s%@CC_FOR_BUILD@%$CC_FOR_BUILD%g
-s%@HDEFINES@%$HDEFINES%g
-s%@AR@%$AR%g
-s%@RANLIB@%$RANLIB%g
-s%@SET_MAKE@%$SET_MAKE%g
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-s%@USE_NLS@%$USE_NLS%g
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-s%@USE_INCLUDED_LIBINTL@%$USE_INCLUDED_LIBINTL%g
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-s%@sim_stdio@%$sim_stdio%g
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-
-cat >> $CONFIG_STATUS <<\EOF
-
-# Split the substitutions into bite-sized pieces for seds with
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- sed "${ac_end}q" conftest.subs > conftest.s$ac_file
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- fi
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- ac_sed_cmds=cat
-fi
-EOF
-
-cat >> $CONFIG_STATUS <<EOF
-
-CONFIG_FILES=\${CONFIG_FILES-"Makefile.sim:Makefile.in Make-common.sim:../common/Make-common.in .gdbinit:../common/gdbinit.in"}
-EOF
-cat >> $CONFIG_STATUS <<\EOF
-for ac_file in .. $CONFIG_FILES; do if test "x$ac_file" != x..; then
- # Support "outfile[:infile[:infile...]]", defaulting infile="outfile.in".
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- *:*) ac_file_in=`echo "$ac_file"|sed 's%[^:]*:%%'`
- ac_file=`echo "$ac_file"|sed 's%:.*%%'` ;;
- *) ac_file_in="${ac_file}.in" ;;
- esac
-
- # Adjust a relative srcdir, top_srcdir, and INSTALL for subdirectories.
-
- # Remove last slash and all that follows it. Not all systems have dirname.
- ac_dir=`echo $ac_file|sed 's%/[^/][^/]*$%%'`
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- ac_dir_suffix="/`echo $ac_dir|sed 's%^\./%%'`"
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- ac_dir_suffix= ac_dots=
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-
- case "$ac_given_srcdir" in
- .) srcdir=.
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- /*) srcdir="$ac_given_srcdir$ac_dir_suffix"; top_srcdir="$ac_given_srcdir" ;;
- *) # Relative path.
- srcdir="$ac_dots$ac_given_srcdir$ac_dir_suffix"
- top_srcdir="$ac_dots$ac_given_srcdir" ;;
- esac
-
- case "$ac_given_INSTALL" in
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- *) INSTALL="$ac_dots$ac_given_INSTALL" ;;
- esac
-
- echo creating "$ac_file"
- rm -f "$ac_file"
- configure_input="Generated automatically from `echo $ac_file_in|sed 's%.*/%%'` by configure."
- case "$ac_file" in
- *Makefile*) ac_comsub="1i\\
-# $configure_input" ;;
- *) ac_comsub= ;;
- esac
-
- ac_file_inputs=`echo $ac_file_in|sed -e "s%^%$ac_given_srcdir/%" -e "s%:% $ac_given_srcdir/%g"`
- sed -e "$ac_comsub
-s%@configure_input@%$configure_input%g
-s%@srcdir@%$srcdir%g
-s%@top_srcdir@%$top_srcdir%g
-s%@INSTALL@%$INSTALL%g
-" $ac_file_inputs | (eval "$ac_sed_cmds") > $ac_file
-fi; done
-rm -f conftest.s*
-
-# These sed commands are passed to sed as "A NAME B NAME C VALUE D", where
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-#
-# ac_d sets the value in "#define NAME VALUE" lines.
-ac_dA='s%^\([ ]*\)#\([ ]*define[ ][ ]*\)'
-ac_dB='\([ ][ ]*\)[^ ]*%\1#\2'
-ac_dC='\3'
-ac_dD='%g'
-# ac_u turns "#undef NAME" with trailing blanks into "#define NAME VALUE".
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-ac_uC=' '
-ac_uD='\4%g'
-# ac_e turns "#undef NAME" without trailing blanks into "#define NAME VALUE".
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-ac_eB='$%\1#\2define\3'
-ac_eC=' '
-ac_eD='%g'
-
-if test "${CONFIG_HEADERS+set}" != set; then
-EOF
-cat >> $CONFIG_STATUS <<EOF
- CONFIG_HEADERS="config.h:config.in"
-EOF
-cat >> $CONFIG_STATUS <<\EOF
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-for ac_file in .. $CONFIG_HEADERS; do if test "x$ac_file" != x..; then
- # Support "outfile[:infile[:infile...]]", defaulting infile="outfile.in".
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- ac_file=`echo "$ac_file"|sed 's%:.*%%'` ;;
- *) ac_file_in="${ac_file}.in" ;;
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-
- echo creating $ac_file
-
- rm -f conftest.frag conftest.in conftest.out
- ac_file_inputs=`echo $ac_file_in|sed -e "s%^%$ac_given_srcdir/%" -e "s%:% $ac_given_srcdir/%g"`
- cat $ac_file_inputs > conftest.in
-
-EOF
-
-# Transform confdefs.h into a sed script conftest.vals that substitutes
-# the proper values into config.h.in to produce config.h. And first:
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-# Protect against being in an unquoted here document in config.status.
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-cat > conftest.hdr <<\EOF
-s/[\\&%]/\\&/g
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-s%ac_d%ac_u%gp
-s%ac_u%ac_e%gp
-EOF
-sed -n -f conftest.hdr confdefs.h > conftest.vals
-rm -f conftest.hdr
-
-# This sed command replaces #undef with comments. This is necessary, for
-# example, in the case of _POSIX_SOURCE, which is predefined and required
-# on some systems where configure will not decide to define it.
-cat >> conftest.vals <<\EOF
-s%^[ ]*#[ ]*undef[ ][ ]*[a-zA-Z_][a-zA-Z_0-9]*%/* & */%
-EOF
-
-# Break up conftest.vals because some shells have a limit on
-# the size of here documents, and old seds have small limits too.
-
-rm -f conftest.tail
-while :
-do
- ac_lines=`grep -c . conftest.vals`
- # grep -c gives empty output for an empty file on some AIX systems.
- if test -z "$ac_lines" || test "$ac_lines" -eq 0; then break; fi
- # Write a limited-size here document to conftest.frag.
- echo ' cat > conftest.frag <<CEOF' >> $CONFIG_STATUS
- sed ${ac_max_here_lines}q conftest.vals >> $CONFIG_STATUS
- echo 'CEOF
- sed -f conftest.frag conftest.in > conftest.out
- rm -f conftest.in
- mv conftest.out conftest.in
-' >> $CONFIG_STATUS
- sed 1,${ac_max_here_lines}d conftest.vals > conftest.tail
- rm -f conftest.vals
- mv conftest.tail conftest.vals
-done
-rm -f conftest.vals
-
-cat >> $CONFIG_STATUS <<\EOF
- rm -f conftest.frag conftest.h
- echo "/* $ac_file. Generated automatically by configure. */" > conftest.h
- cat conftest.in >> conftest.h
- rm -f conftest.in
- if cmp -s $ac_file conftest.h 2>/dev/null; then
- echo "$ac_file is unchanged"
- rm -f conftest.h
- else
- # Remove last slash and all that follows it. Not all systems have dirname.
- ac_dir=`echo $ac_file|sed 's%/[^/][^/]*$%%'`
- if test "$ac_dir" != "$ac_file" && test "$ac_dir" != .; then
- # The file is in a subdirectory.
- test ! -d "$ac_dir" && mkdir "$ac_dir"
- fi
- rm -f $ac_file
- mv conftest.h $ac_file
- fi
-fi; done
-
-EOF
-
-cat >> $CONFIG_STATUS <<EOF
-ac_sources="$sim_link_files"
-ac_dests="$sim_link_links"
-EOF
-
-cat >> $CONFIG_STATUS <<\EOF
-srcdir=$ac_given_srcdir
-while test -n "$ac_sources"; do
- set $ac_dests; ac_dest=$1; shift; ac_dests=$*
- set $ac_sources; ac_source=$1; shift; ac_sources=$*
-
- echo "linking $srcdir/$ac_source to $ac_dest"
-
- if test ! -r $srcdir/$ac_source; then
- { echo "configure: error: $srcdir/$ac_source: File not found" 1>&2; exit 1; }
- fi
- rm -f $ac_dest
-
- # Make relative symlinks.
- # Remove last slash and all that follows it. Not all systems have dirname.
- ac_dest_dir=`echo $ac_dest|sed 's%/[^/][^/]*$%%'`
- if test "$ac_dest_dir" != "$ac_dest" && test "$ac_dest_dir" != .; then
- # The dest file is in a subdirectory.
- test ! -d "$ac_dest_dir" && mkdir "$ac_dest_dir"
- ac_dest_dir_suffix="/`echo $ac_dest_dir|sed 's%^\./%%'`"
- # A "../" for each directory in $ac_dest_dir_suffix.
- ac_dots=`echo $ac_dest_dir_suffix|sed 's%/[^/]*%../%g'`
- else
- ac_dest_dir_suffix= ac_dots=
- fi
-
- case "$srcdir" in
- [/$]*) ac_rel_source="$srcdir/$ac_source" ;;
- *) ac_rel_source="$ac_dots$srcdir/$ac_source" ;;
- esac
-
- # Make a symlink if possible; otherwise try a hard link.
- if ln -s $ac_rel_source $ac_dest 2>/dev/null ||
- ln $srcdir/$ac_source $ac_dest; then :
- else
- { echo "configure: error: can not link $ac_dest to $srcdir/$ac_source" 1>&2; exit 1; }
- fi
-done
-EOF
-cat >> $CONFIG_STATUS <<EOF
-
-EOF
-cat >> $CONFIG_STATUS <<\EOF
-case "x$CONFIG_FILES" in
- xMakefile*)
- echo "Merging Makefile.sim+Make-common.sim into Makefile ..."
- rm -f Makesim1.tmp Makesim2.tmp Makefile
- sed -n -e '/^## COMMON_PRE_/,/^## End COMMON_PRE_/ p' <Make-common.sim >Makesim1.tmp
- sed -n -e '/^## COMMON_POST_/,/^## End COMMON_POST_/ p' <Make-common.sim >Makesim2.tmp
- sed -e '/^## COMMON_PRE_/ r Makesim1.tmp' \
- -e '/^## COMMON_POST_/ r Makesim2.tmp' \
- <Makefile.sim >Makefile
- rm -f Makefile.sim Make-common.sim Makesim1.tmp Makesim2.tmp
- ;;
- esac
- case "x$CONFIG_HEADERS" in xconfig.h:config.in) echo > stamp-h ;; esac
-
-exit 0
-EOF
-chmod +x $CONFIG_STATUS
-rm -fr confdefs* $ac_clean_files
-test "$no_create" = yes || ${CONFIG_SHELL-/bin/sh} $CONFIG_STATUS || exit 1
-
-
diff --git a/sim/mn10200/configure.in b/sim/mn10200/configure.in
deleted file mode 100644
index 033b0bc1615..00000000000
--- a/sim/mn10200/configure.in
+++ /dev/null
@@ -1,10 +0,0 @@
-dnl Process this file with autoconf to produce a configure script.
-sinclude(../common/aclocal.m4)
-AC_PREREQ(2.5)dnl
-AC_INIT(Makefile.in)
-
-SIM_AC_COMMON
-
-AC_CHECK_HEADERS(unistd.h)
-
-SIM_AC_OUTPUT
diff --git a/sim/mn10200/gencode.c b/sim/mn10200/gencode.c
deleted file mode 100644
index 8ba873eb224..00000000000
--- a/sim/mn10200/gencode.c
+++ /dev/null
@@ -1,154 +0,0 @@
-#include "mn10200_sim.h"
-
-static void write_header PARAMS ((void));
-static void write_opcodes PARAMS ((void));
-static void write_template PARAMS ((void));
-
-int
-main (argc, argv)
- int argc;
- char *argv[];
-{
- if ((argc > 1) && (strcmp (argv[1], "-h") == 0))
- write_header();
- else if ((argc > 1) && (strcmp (argv[1], "-t") == 0))
- write_template ();
- else
- write_opcodes();
- return 0;
-}
-
-
-static void
-write_header ()
-{
- struct mn10200_opcode *opcode;
-
- for (opcode = (struct mn10200_opcode *)mn10200_opcodes; opcode->name; opcode++)
- printf("void OP_%X PARAMS ((unsigned long, unsigned long));\t\t/* %s */\n",
- opcode->opcode, opcode->name);
-}
-
-
-/* write_template creates a file all required functions, ready */
-/* to be filled out */
-
-static void
-write_template ()
-{
- struct mn10200_opcode *opcode;
- int i,j;
-
- printf ("#include \"mn10200_sim.h\"\n");
- printf ("#include \"simops.h\"\n");
-
- for (opcode = (struct mn10200_opcode *)mn10200_opcodes; opcode->name; opcode++)
- {
- printf("/* %s */\nvoid\nOP_%X (insn, extension)\n unsigned long insn, extension;\n{\n", opcode->name, opcode->opcode);
-
- /* count operands */
- j = 0;
- for (i = 0; i < 6; i++)
- {
- int flags = mn10200_operands[opcode->operands[i]].flags;
-
- if (flags)
- j++;
- }
- switch (j)
- {
- case 0:
- printf ("printf(\" %s\\n\");\n", opcode->name);
- break;
- case 1:
- printf ("printf(\" %s\\t%%x\\n\", OP[0]);\n", opcode->name);
- break;
- case 2:
- printf ("printf(\" %s\\t%%x,%%x\\n\",OP[0],OP[1]);\n",
- opcode->name);
- break;
- case 3:
- printf ("printf(\" %s\\t%%x,%%x,%%x\\n\",OP[0],OP[1],OP[2]);\n",
- opcode->name);
- break;
- default:
- fprintf (stderr,"Too many operands: %d\n", j);
- }
- printf ("}\n\n");
- }
-}
-
-static void
-write_opcodes ()
-{
- struct mn10200_opcode *opcode;
- int i, j;
- int numops;
-
- /* write out opcode table */
- printf ("#include \"mn10200_sim.h\"\n");
- printf ("#include \"simops.h\"\n\n");
- printf ("struct simops Simops[] = {\n");
-
- for (opcode = (struct mn10200_opcode *)mn10200_opcodes; opcode->name; opcode++)
- {
- int size;
-
- if (opcode->format == FMT_1)
- size = 1;
- else if (opcode->format == FMT_2 || opcode->format == FMT_4)
- size = 2;
- else if (opcode->format == FMT_3 || opcode->format == FMT_5)
- size = 3;
- else if (opcode->format == FMT_6)
- size = 4;
- else if (opcode->format == FMT_7)
- size = 5;
- else
- abort ();
-
- printf (" { 0x%x,0x%x,OP_%X,%d,%d,",
- opcode->opcode, opcode->mask, opcode->opcode,
- size, opcode->format);
-
- /* count operands */
- j = 0;
- for (i = 0; i < 6; i++)
- {
- int flags = mn10200_operands[opcode->operands[i]].flags;
-
- if (flags)
- j++;
- }
- printf ("%d,{",j);
-
- j = 0;
- numops = 0;
- for (i = 0; i < 6; i++)
- {
- int flags = mn10200_operands[opcode->operands[i]].flags;
- int shift = mn10200_operands[opcode->operands[i]].shift;
-
- if (flags)
- {
- if (j)
- printf (", ");
- printf ("%d,%d,%d", shift,
- mn10200_operands[opcode->operands[i]].bits,flags);
- j = 1;
- numops++;
- }
- }
-
- switch (numops)
- {
- case 0:
- printf ("0,0,0");
- case 1:
- printf (",0,0,0");
- }
-
- printf ("}},\n");
- }
- printf ("{ 0,0,NULL,0,0,0,{0,0,0,0,0,0}},\n};\n");
-}
diff --git a/sim/mn10200/interp.c b/sim/mn10200/interp.c
deleted file mode 100644
index 43a87506184..00000000000
--- a/sim/mn10200/interp.c
+++ /dev/null
@@ -1,820 +0,0 @@
-#include <signal.h>
-#include "sysdep.h"
-#include "bfd.h"
-
-#include "mn10200_sim.h"
-
-#ifdef NEED_UI_LOOP_HOOK
-/* How often to run the ui_loop update, when in use */
-#define UI_LOOP_POLL_INTERVAL 0x60000
-
-/* Counter for the ui_loop_hook update */
-static long ui_loop_hook_counter = UI_LOOP_POLL_INTERVAL;
-
-/* Actual hook to call to run through gdb's gui event loop */
-extern int (*ui_loop_hook) (int);
-#endif /* NEED_UI_LOOP_HOOK */
-
-host_callback *mn10200_callback;
-int mn10200_debug;
-static SIM_OPEN_KIND sim_kind;
-static char *myname;
-
-static void dispatch PARAMS ((uint32, uint32, int));
-static long hash PARAMS ((long));
-static void init_system PARAMS ((void));
-#define MAX_HASH 127
-
-struct hash_entry
-{
- struct hash_entry *next;
- long opcode;
- long mask;
- struct simops *ops;
-#ifdef HASH_STAT
- unsigned long count;
-#endif
-};
-
-int max_mem = 0;
-struct hash_entry hash_table[MAX_HASH+1];
-
-
-/* This probably doesn't do a very good job at bucket filling, but
- it's simple... */
-static INLINE long
-hash(insn)
- long insn;
-{
- /* These are one byte insns. */
- if ((insn & 0xffffff00) == 0x00)
- {
- if ((insn & 0xf0) != 0x80)
- return ((insn & 0xf0) >> 4) & 0x7f;
-
- if ((insn & 0xf0) == 0x80
- && (insn & 0x0c) >> 2 != (insn & 0x03))
- return (insn & 0xf0) & 0x7f;
-
- return (insn & 0xff) & 0x7f;
- }
-
- if ((insn & 0xffff0000) == 0)
- {
- if ((insn & 0xf000) == 0xd000)
- return ((insn & 0xfc00) >> 10) & 0x7f;
-
- if ((insn & 0xf000) == 0xe000)
- return ((insn & 0xff00) >> 8) & 0x7f;
-
- if ((insn & 0xf200) == 0xf200)
- return ((insn & 0xfff0) >> 4) & 0x7f;
-
- if ((insn & 0xc000) == 0x4000
- || (insn & 0xf000) == 0x8000)
- return ((insn & 0xf000) >> 8) & 0x7f;
-
- if ((insn & 0xf200) == 0xf000)
- return ((insn & 0xffc0) >> 8) & 0x7f;
-
- return ((insn & 0xff00) >> 8) & 0x7f;
- }
-
- if ((insn & 0xff000000) == 0)
- {
-
- if ((insn & 0xf00000) != 0xf00000
- || (insn & 0xfc0000) == 0xf80000)
- return ((insn & 0xfc0000) >> 16) & 0x7f;
-
- if ((insn & 0xff0000) == 0xf50000)
- return ((insn & 0xfff000) >> 12) & 0x7f;
- return ((insn & 0xff0000) >> 16) & 0x7f;
- }
-
- return ((insn & 0xfff0000) >> 20) & 0x7f;
-}
-
-static INLINE void
-dispatch (insn, extension, length)
- uint32 insn;
- uint32 extension;
- int length;
-{
- struct hash_entry *h;
-
- h = &hash_table[hash(insn)];
-
- while ((insn & h->mask) != h->opcode
- || (length != h->ops->length))
- {
- if (!h->next)
- {
- (*mn10200_callback->printf_filtered) (mn10200_callback,
- "ERROR looking up hash for 0x%x, PC=0x%x\n", insn, PC);
- exit(1);
- }
- h = h->next;
- }
-
-
-#ifdef HASH_STAT
- h->count++;
-#endif
-
- /* Now call the right function. */
- (h->ops->func)(insn, extension);
- PC += length;
-}
-
-/* FIXME These would more efficient to use than load_mem/store_mem,
- but need to be changed to use the memory map. */
-
-uint32
-get_word (x)
- uint8 *x;
-{
- uint8 *a = x;
- return (a[3]<<24) + (a[2]<<16) + (a[1]<<8) + (a[0]);
-}
-
-void
-put_word (addr, data)
- uint8 *addr;
- uint32 data;
-{
- uint8 *a = addr;
- a[0] = data & 0xff;
- a[1] = (data >> 8) & 0xff;
- a[2] = (data >> 16) & 0xff;
- a[3] = (data >> 24) & 0xff;
-}
-
-void
-sim_size (power)
- int power;
-
-{
- if (State.mem)
- free (State.mem);
-
- max_mem = 1 << power;
- State.mem = (uint8 *) calloc (1, 1 << power);
- if (!State.mem)
- {
- (*mn10200_callback->printf_filtered) (mn10200_callback, "Allocation of main memory failed.\n");
- exit (1);
- }
-}
-
-static void
-init_system ()
-{
- if (!State.mem)
- sim_size(19);
-}
-
-int
-sim_write (sd,addr, buffer, size)
- SIM_DESC sd;
- SIM_ADDR addr;
- unsigned char *buffer;
- int size;
-{
- int i;
-
- init_system ();
-
- for (i = 0; i < size; i++)
- store_byte (addr + i, buffer[i]);
-
- return size;
-}
-
-/* Compare two opcode table entries for qsort. */
-static int
-compare_simops (arg1, arg2)
- const PTR arg1;
- const PTR arg2;
-{
- unsigned long code1 = ((struct simops *)arg1)->opcode;
- unsigned long code2 = ((struct simops *)arg2)->opcode;
-
- if (code1 < code2)
- return -1;
- if (code2 < code1)
- return 1;
- return 0;
-}
-
-SIM_DESC
-sim_open (kind, cb, abfd, argv)
- SIM_OPEN_KIND kind;
- host_callback *cb;
- struct _bfd *abfd;
- char **argv;
-{
- struct simops *s;
- struct hash_entry *h;
- char **p;
- int i;
-
- mn10200_callback = cb;
-
- /* Sort the opcode array from smallest opcode to largest.
- This will generally improve simulator performance as the smaller
- opcodes are generally preferred to the larger opcodes. */
- for (i = 0, s = Simops; s->func; s++, i++)
- ;
- qsort (Simops, i, sizeof (Simops[0]), compare_simops);
-
- sim_kind = kind;
- myname = argv[0];
-
- for (p = argv + 1; *p; ++p)
- {
- if (strcmp (*p, "-E") == 0)
- ++p; /* ignore endian spec */
- else
-#ifdef DEBUG
- if (strcmp (*p, "-t") == 0)
- mn10200_debug = DEBUG;
- else
-#endif
- (*mn10200_callback->printf_filtered) (mn10200_callback, "ERROR: unsupported option(s): %s\n",*p);
- }
-
- /* put all the opcodes in the hash table */
- for (s = Simops; s->func; s++)
- {
- h = &hash_table[hash(s->opcode)];
-
- /* go to the last entry in the chain */
- while (h->next)
- {
- /* Don't insert the same opcode more than once. */
- if (h->opcode == s->opcode
- && h->mask == s->mask
- && h->ops == s)
- break;
- else
- h = h->next;
- }
-
- /* Don't insert the same opcode more than once. */
- if (h->opcode == s->opcode
- && h->mask == s->mask
- && h->ops == s)
- continue;
-
- if (h->ops)
- {
- h->next = calloc(1,sizeof(struct hash_entry));
- h = h->next;
- }
- h->ops = s;
- h->mask = s->mask;
- h->opcode = s->opcode;
-#ifdef HASH_STAT
- h->count = 0;
-#endif
- }
-
- /* fudge our descriptor for now */
- return (SIM_DESC) 1;
-}
-
-
-void
-sim_set_profile (n)
- int n;
-{
- (*mn10200_callback->printf_filtered) (mn10200_callback, "sim_set_profile %d\n", n);
-}
-
-void
-sim_set_profile_size (n)
- int n;
-{
- (*mn10200_callback->printf_filtered) (mn10200_callback, "sim_set_profile_size %d\n", n);
-}
-
-int
-sim_stop (sd)
- SIM_DESC sd;
-{
- State.exception = SIGINT;
- return 1;
-}
-
-void
-sim_resume (sd, step, siggnal)
- SIM_DESC sd;
- int step, siggnal;
-{
- uint32 inst;
-
- if (step)
- State.exception = SIGTRAP;
- else
- State.exception = 0;
-
- State.exited = 0;
-
- do
- {
- unsigned long insn, extension;
-
-#ifdef NEED_UI_LOOP_HOOK
- if (ui_loop_hook != NULL && ui_loop_hook_counter-- < 0)
- {
- ui_loop_hook_counter = UI_LOOP_POLL_INTERVAL;
- ui_loop_hook (0);
- }
-#endif /* NEED_UI_LOOP_HOOK */
-
- /* Fetch the current instruction, fetch a double word to
- avoid redundant fetching for the common cases below. */
- inst = load_mem_big (PC, 2);
-
- /* Using a giant case statement may seem like a waste because of the
- code/rodata size the table itself will consume. However, using
- a giant case statement speeds up the simulator by 10-15% by avoiding
- cascading if/else statements or cascading case statements. */
- switch ((inst >> 8) & 0xff)
- {
- /* All the single byte insns except 0x80, which must
- be handled specially. */
- case 0x00:
- case 0x01:
- case 0x02:
- case 0x03:
- case 0x04:
- case 0x05:
- case 0x06:
- case 0x07:
- case 0x08:
- case 0x09:
- case 0x0a:
- case 0x0b:
- case 0x0c:
- case 0x0d:
- case 0x0e:
- case 0x0f:
- case 0x10:
- case 0x11:
- case 0x12:
- case 0x13:
- case 0x14:
- case 0x15:
- case 0x16:
- case 0x17:
- case 0x18:
- case 0x19:
- case 0x1a:
- case 0x1b:
- case 0x1c:
- case 0x1d:
- case 0x1e:
- case 0x1f:
- case 0x20:
- case 0x21:
- case 0x22:
- case 0x23:
- case 0x24:
- case 0x25:
- case 0x26:
- case 0x27:
- case 0x28:
- case 0x29:
- case 0x2a:
- case 0x2b:
- case 0x2c:
- case 0x2d:
- case 0x2e:
- case 0x2f:
- case 0x30:
- case 0x31:
- case 0x32:
- case 0x33:
- case 0x34:
- case 0x35:
- case 0x36:
- case 0x37:
- case 0x38:
- case 0x39:
- case 0x3a:
- case 0x3b:
- case 0x3c:
- case 0x3d:
- case 0x3e:
- case 0x3f:
- case 0x90:
- case 0x91:
- case 0x92:
- case 0x93:
- case 0x94:
- case 0x95:
- case 0x96:
- case 0x97:
- case 0x98:
- case 0x99:
- case 0x9a:
- case 0x9b:
- case 0x9c:
- case 0x9d:
- case 0x9e:
- case 0x9f:
- case 0xa0:
- case 0xa1:
- case 0xa2:
- case 0xa3:
- case 0xa4:
- case 0xa5:
- case 0xa6:
- case 0xa7:
- case 0xa8:
- case 0xa9:
- case 0xaa:
- case 0xab:
- case 0xac:
- case 0xad:
- case 0xae:
- case 0xaf:
- case 0xb0:
- case 0xb1:
- case 0xb2:
- case 0xb3:
- case 0xb4:
- case 0xb5:
- case 0xb6:
- case 0xb7:
- case 0xb8:
- case 0xb9:
- case 0xba:
- case 0xbb:
- case 0xbc:
- case 0xbd:
- case 0xbe:
- case 0xbf:
- case 0xeb:
- case 0xf6:
- case 0xfe:
- case 0xff:
- insn = (inst >> 8) & 0xff;
- extension = 0;
- dispatch (insn, extension, 1);
- break;
-
- /* Special case as mov dX,dX really means mov imm8,dX. */
- case 0x80:
- case 0x85:
- case 0x8a:
- case 0x8f:
- /* Fetch the full instruction. */
- insn = inst;
- extension = 0;
- dispatch (insn, extension, 2);
- break;
-
- case 0x81:
- case 0x82:
- case 0x83:
- case 0x84:
- case 0x86:
- case 0x87:
- case 0x88:
- case 0x89:
- case 0x8b:
- case 0x8c:
- case 0x8d:
- case 0x8e:
- insn = (inst >> 8) & 0xff;
- extension = 0;
- dispatch (insn, extension, 1);
- break;
-
- /* And the two byte insns. */
- case 0x40:
- case 0x41:
- case 0x42:
- case 0x43:
- case 0x44:
- case 0x45:
- case 0x46:
- case 0x47:
- case 0x48:
- case 0x49:
- case 0x4a:
- case 0x4b:
- case 0x4c:
- case 0x4d:
- case 0x4e:
- case 0x4f:
- case 0x50:
- case 0x51:
- case 0x52:
- case 0x53:
- case 0x54:
- case 0x55:
- case 0x56:
- case 0x57:
- case 0x58:
- case 0x59:
- case 0x5a:
- case 0x5b:
- case 0x5c:
- case 0x5d:
- case 0x5e:
- case 0x5f:
- case 0x60:
- case 0x61:
- case 0x62:
- case 0x63:
- case 0x64:
- case 0x65:
- case 0x66:
- case 0x67:
- case 0x68:
- case 0x69:
- case 0x6a:
- case 0x6b:
- case 0x6c:
- case 0x6d:
- case 0x6e:
- case 0x6f:
- case 0x70:
- case 0x71:
- case 0x72:
- case 0x73:
- case 0x74:
- case 0x75:
- case 0x76:
- case 0x77:
- case 0x78:
- case 0x79:
- case 0x7a:
- case 0x7b:
- case 0x7c:
- case 0x7d:
- case 0x7e:
- case 0x7f:
- case 0xd0:
- case 0xd1:
- case 0xd2:
- case 0xd3:
- case 0xd4:
- case 0xd5:
- case 0xd6:
- case 0xd7:
- case 0xd8:
- case 0xd9:
- case 0xda:
- case 0xdb:
- case 0xe0:
- case 0xe1:
- case 0xe2:
- case 0xe3:
- case 0xe4:
- case 0xe5:
- case 0xe6:
- case 0xe7:
- case 0xe8:
- case 0xe9:
- case 0xea:
- case 0xf0:
- case 0xf1:
- case 0xf2:
- case 0xf3:
- /* Fetch the full instruction. */
- insn = inst;
- extension = 0;
- dispatch (insn, extension, 2);
- break;
-
- /* And the 3 byte insns with a 16bit operand in little
- endian format. */
- case 0xc0:
- case 0xc1:
- case 0xc2:
- case 0xc3:
- case 0xc4:
- case 0xc5:
- case 0xc6:
- case 0xc7:
- case 0xc8:
- case 0xc9:
- case 0xca:
- case 0xcb:
- case 0xcc:
- case 0xcd:
- case 0xce:
- case 0xcf:
- case 0xdc:
- case 0xdd:
- case 0xde:
- case 0xdf:
- case 0xec:
- case 0xed:
- case 0xee:
- case 0xef:
- case 0xf8:
- case 0xf9:
- case 0xfa:
- case 0xfb:
- case 0xfc:
- case 0xfd:
- insn = load_byte (PC);
- insn <<= 16;
- insn |= load_half (PC + 1);
- extension = 0;
- dispatch (insn, extension, 3);
- break;
-
- /* 3 byte insns without 16bit operand. */
- case 0xf5:
- insn = load_mem_big (PC, 3);
- extension = 0;
- dispatch (insn, extension, 3);
- break;
-
- /* 4 byte insns. */
- case 0xf7:
- insn = inst;
- insn <<= 16;
- insn |= load_half (PC + 2);
- extension = 0;
- dispatch (insn, extension, 4);
- break;
-
- case 0xf4:
- insn = inst;
- insn <<= 16;
- insn |= load_mem_big (PC + 4, 1) << 8;
- insn |= load_mem_big (PC + 3, 1);
- extension = load_mem_big (PC + 2, 1);
- dispatch (insn, extension, 5);
- break;
-
- default:
- abort ();
- }
- }
- while (!State.exception);
-
-#ifdef HASH_STAT
- {
- int i;
- for (i = 0; i < MAX_HASH; i++)
- {
- struct hash_entry *h;
- h = &hash_table[i];
-
- printf("hash 0x%x:\n", i);
-
- while (h)
- {
- printf("h->opcode = 0x%x, count = 0x%x\n", h->opcode, h->count);
- h = h->next;
- }
-
- printf("\n\n");
- }
- fflush (stdout);
- }
-#endif
-
-}
-
-
-void
-sim_close (sd, quitting)
- SIM_DESC sd;
- int quitting;
-{
- /* nothing to do */
-}
-
-int
-sim_trace (sd)
- SIM_DESC sd;
-{
-#ifdef DEBUG
- mn10200_debug = DEBUG;
-#endif
- sim_resume (sd, 0, 0);
- return 1;
-}
-
-void
-sim_info (sd, verbose)
- SIM_DESC sd;
- int verbose;
-{
- (*mn10200_callback->printf_filtered) (mn10200_callback, "sim_info\n");
-}
-
-SIM_RC
-sim_create_inferior (sd, abfd, argv, env)
- SIM_DESC sd;
- struct _bfd *abfd;
- char **argv;
- char **env;
-{
- if (abfd != NULL)
- PC = bfd_get_start_address (abfd);
- else
- PC = 0;
- return SIM_RC_OK;
-}
-
-void
-sim_set_callbacks (p)
- host_callback *p;
-{
- mn10200_callback = p;
-}
-
-/* All the code for exiting, signals, etc needs to be revamped.
-
- This is enough to get c-torture limping though. */
-
-void
-sim_stop_reason (sd, reason, sigrc)
- SIM_DESC sd;
- enum sim_stop *reason;
- int *sigrc;
-{
- if (State.exited)
- *reason = sim_exited;
- else
- *reason = sim_stopped;
- if (State.exception == SIGQUIT)
- *sigrc = 0;
- else
- *sigrc = State.exception;
-}
-
-int
-sim_fetch_register (sd, rn, memory, length)
- SIM_DESC sd;
- int rn;
- unsigned char *memory;
- int length;
-{
- put_word (memory, State.regs[rn]);
- return -1;
-}
-
-int
-sim_store_register (sd, rn, memory, length)
- SIM_DESC sd;
- int rn;
- unsigned char *memory;
- int length;
-{
- State.regs[rn] = get_word (memory);
- return -1;
-}
-
-int
-sim_read (sd, addr, buffer, size)
- SIM_DESC sd;
- SIM_ADDR addr;
- unsigned char *buffer;
- int size;
-{
- int i;
- for (i = 0; i < size; i++)
- buffer[i] = load_byte (addr + i);
-
- return size;
-}
-
-void
-sim_do_command (sd, cmd)
- SIM_DESC sd;
- char *cmd;
-{
- (*mn10200_callback->printf_filtered) (mn10200_callback, "\"%s\" is not a valid mn10200 simulator command.\n", cmd);
-}
-
-SIM_RC
-sim_load (sd, prog, abfd, from_tty)
- SIM_DESC sd;
- char *prog;
- bfd *abfd;
- int from_tty;
-{
- extern bfd *sim_load_file (); /* ??? Don't know where this should live. */
- bfd *prog_bfd;
-
- prog_bfd = sim_load_file (sd, myname, mn10200_callback, prog, abfd,
- sim_kind == SIM_OPEN_DEBUG,
- 0, sim_write);
- if (prog_bfd == NULL)
- return SIM_RC_FAIL;
- if (abfd == NULL)
- bfd_close (prog_bfd);
- return SIM_RC_OK;
-}
diff --git a/sim/mn10200/mn10200_sim.h b/sim/mn10200/mn10200_sim.h
deleted file mode 100644
index a7b7c4d888c..00000000000
--- a/sim/mn10200/mn10200_sim.h
+++ /dev/null
@@ -1,297 +0,0 @@
-#include <stdio.h>
-#include <ctype.h>
-#include "ansidecl.h"
-#include "callback.h"
-#include "opcode/mn10200.h"
-#include <limits.h>
-#include "remote-sim.h"
-
-#ifndef INLINE
-#ifdef __GNUC__
-#define INLINE inline
-#else
-#define INLINE
-#endif
-#endif
-
-extern host_callback *mn10200_callback;
-
-#define DEBUG_TRACE 0x00000001
-#define DEBUG_VALUES 0x00000002
-
-extern int mn10200_debug;
-
-#ifdef __STDC__
-#define SIGNED signed
-#else
-#define SIGNED
-#endif
-
-#if UCHAR_MAX == 255
-typedef unsigned char uint8;
-typedef SIGNED char int8;
-#else
-error "Char is not an 8-bit type"
-#endif
-
-#if SHRT_MAX == 32767
-typedef unsigned short uint16;
-typedef SIGNED short int16;
-#else
-error "Short is not a 16-bit type"
-#endif
-
-#if INT_MAX == 2147483647
-
-typedef unsigned int uint32;
-typedef SIGNED int int32;
-
-#else
-# if LONG_MAX == 2147483647
-
-typedef unsigned long uint32;
-typedef SIGNED long int32;
-
-# else
- error "Neither int nor long is a 32-bit type"
-# endif
-#endif
-
-typedef uint32 reg_t;
-
-struct simops
-{
- long opcode;
- long mask;
- void (*func)();
- int length;
- int format;
- int numops;
- int operands[16];
-};
-
-/* The current state of the processor; registers, memory, etc. */
-
-struct _state
-{
- reg_t regs[11]; /* registers, d0-d3, a0-a3, pc, mdr, psw */
- uint8 *mem; /* main memory */
- int exception; /* Actually a signal number. */
- int exited; /* Did the program exit? */
-} State;
-
-extern uint32 OP[4];
-extern struct simops Simops[];
-
-#define PC (State.regs[8])
-
-#define PSW (State.regs[10])
-#define PSW_ZF 0x1
-#define PSW_NF 0x2
-#define PSW_CF 0x4
-#define PSW_VF 0x8
-#define PSW_ZX 0x10
-#define PSW_NX 0x20
-#define PSW_CX 0x40
-#define PSW_VX 0x80
-
-#define REG_D0 0
-#define REG_A0 4
-#define REG_SP 7
-#define REG_PC 8
-#define REG_MDR 9
-#define REG_PSW 10
-
-#define SEXT3(x) ((((x)&0x7)^(~0x3))+0x4)
-
-/* sign-extend a 4-bit number */
-#define SEXT4(x) ((((x)&0xf)^(~0x7))+0x8)
-
-/* sign-extend a 5-bit number */
-#define SEXT5(x) ((((x)&0x1f)^(~0xf))+0x10)
-
-/* sign-extend an 8-bit number */
-#define SEXT8(x) ((((x)&0xff)^(~0x7f))+0x80)
-
-/* sign-extend a 9-bit number */
-#define SEXT9(x) ((((x)&0x1ff)^(~0xff))+0x100)
-
-/* sign-extend a 16-bit number */
-#define SEXT16(x) ((((x)&0xffff)^(~0x7fff))+0x8000)
-
-/* sign-extend a 22-bit number */
-#define SEXT22(x) ((((x)&0x3fffff)^(~0x1fffff))+0x200000)
-
-/* sign-extend a 24-bit number */
-#define SEXT24(x) ((((x)&0xffffff)^(~0x7fffff))+0x800000)
-
-#ifdef _WIN32
-#define SIGTRAP 5
-#define SIGQUIT 3
-#endif
-
-extern int max_mem;
-
-#define load_mem_big(addr,len) \
- (len == 1 ? *(((addr) & 0xffffff) + State.mem) : \
- len == 2 ? ((*(((addr) & 0xffffff) + State.mem) << 8) \
- | *((((addr) + 1) & 0xffffff) + State.mem)) : \
- ((*(((addr) & 0xffffff) + State.mem) << 16) \
- | (*((((addr) + 1) & 0xffffff) + State.mem) << 8) \
- | *((((addr) + 2) & 0xffffff) + State.mem)))
-
-static INLINE uint32
-load_byte (addr)
- SIM_ADDR addr;
-{
- uint8 *p = (addr & 0xffffff) + State.mem;
-
-#ifdef CHECK_ADDR
- if ((addr & 0xffffff) > max_mem)
- abort ();
-#endif
-
- return p[0];
-}
-
-static INLINE uint32
-load_half (addr)
- SIM_ADDR addr;
-{
- uint8 *p = (addr & 0xffffff) + State.mem;
-
-#ifdef CHECK_ADDR
- if ((addr & 0xffffff) > max_mem)
- abort ();
-#endif
-
- return p[1] << 8 | p[0];
-}
-
-static INLINE uint32
-load_3_byte (addr)
- SIM_ADDR addr;
-{
- uint8 *p = (addr & 0xffffff) + State.mem;
-
-#ifdef CHECK_ADDR
- if ((addr & 0xffffff) > max_mem)
- abort ();
-#endif
-
- return p[2] << 16 | p[1] << 8 | p[0];
-}
-
-static INLINE uint32
-load_word (addr)
- SIM_ADDR addr;
-{
- uint8 *p = (addr & 0xffffff) + State.mem;
-
-#ifdef CHECK_ADDR
- if ((addr & 0xffffff) > max_mem)
- abort ();
-#endif
-
- return p[3] << 24 | p[2] << 16 | p[1] << 8 | p[0];
-}
-
-static INLINE uint32
-load_mem (addr, len)
- SIM_ADDR addr;
- int len;
-{
- uint8 *p = (addr & 0xffffff) + State.mem;
-
-#ifdef CHECK_ADDR
- if ((addr & 0xffffff) > max_mem)
- abort ();
-#endif
-
- switch (len)
- {
- case 1:
- return p[0];
- case 2:
- return p[1] << 8 | p[0];
- case 3:
- return p[2] << 16 | p[1] << 8 | p[0];
- case 4:
- return p[3] << 24 | p[2] << 16 | p[1] << 8 | p[0];
- default:
- abort ();
- }
-}
-
-static INLINE void
-store_byte (addr, data)
- SIM_ADDR addr;
- uint32 data;
-{
- uint8 *p = (addr & 0xffffff) + State.mem;
-
-#ifdef CHECK_ADDR
- if ((addr & 0xffffff) > max_mem)
- abort ();
-#endif
-
- p[0] = data;
-}
-
-static INLINE void
-store_half (addr, data)
- SIM_ADDR addr;
- uint32 data;
-{
- uint8 *p = (addr & 0xffffff) + State.mem;
-
-#ifdef CHECK_ADDR
- if ((addr & 0xffffff) > max_mem)
- abort ();
-#endif
-
- p[0] = data;
- p[1] = data >> 8;
-}
-
-static INLINE void
-store_3_byte (addr, data)
- SIM_ADDR addr;
- uint32 data;
-{
- uint8 *p = (addr & 0xffffff) + State.mem;
-
-#ifdef CHECK_ADDR
- if ((addr & 0xffffff) > max_mem)
- abort ();
-#endif
-
- p[0] = data;
- p[1] = data >> 8;
- p[2] = data >> 16;
-}
-
-static INLINE void
-store_word (addr, data)
- SIM_ADDR addr;
- uint32 data;
-{
- uint8 *p = (addr & 0xffffff) + State.mem;
-
-#ifdef CHECK_ADDR
- if ((addr & 0xffffff) > max_mem)
- abort ();
-#endif
-
- p[0] = data;
- p[1] = data >> 8;
- p[2] = data >> 16;
- p[3] = data >> 24;
-}
-
-/* Function declarations. */
-
-uint32 get_word PARAMS ((uint8 *));
-void put_word PARAMS ((uint8 *, uint32));
-
-extern uint8 *map PARAMS ((SIM_ADDR addr));
diff --git a/sim/mn10200/simops.c b/sim/mn10200/simops.c
deleted file mode 100644
index ecceccae92f..00000000000
--- a/sim/mn10200/simops.c
+++ /dev/null
@@ -1,2449 +0,0 @@
-#include "config.h"
-
-#include <signal.h>
-#ifdef HAVE_UNISTD_H
-#include <unistd.h>
-#endif
-#include "mn10200_sim.h"
-#include "simops.h"
-#include "targ-vals.h"
-#include "bfd.h"
-#include <errno.h>
-#include <sys/stat.h>
-#include <sys/times.h>
-#include <sys/time.h>
-
-#define REG0(X) ((X) & 0x3)
-#define REG1(X) (((X) & 0xc) >> 2)
-#define REG0_4(X) (((X) & 0x30) >> 4)
-#define REG0_8(X) (((X) & 0x300) >> 8)
-#define REG1_8(X) (((X) & 0xc00) >> 10)
-#define REG0_16(X) (((X) & 0x30000) >> 16)
-#define REG1_16(X) (((X) & 0xc0000) >> 18)
-#define TRUNC(X) ((X) & 0xffffff)
-
-/* mov imm8, dn */
-void OP_8000 (insn, extension)
- unsigned long insn, extension;
-{
- State.regs[REG_D0 + REG0_8 (insn)] = SEXT8 (insn & 0xff);
-}
-
-/* mov dn, dm */
-void OP_80 (insn, extension)
- unsigned long insn, extension;
-{
- State.regs[REG_D0 + REG0 (insn)] = State.regs[REG_D0 + REG1 (insn)];
-}
-
-/* mov dm, an */
-void OP_F230 (insn, extension)
- unsigned long insn, extension;
-{
- State.regs[REG_A0 + REG0 (insn)] = State.regs[REG_D0 + REG1 (insn)];
-}
-
-/* mov an, dm */
-void OP_F2F0 (insn, extension)
- unsigned long insn, extension;
-{
- State.regs[REG_D0 + REG0 (insn)] = State.regs[REG_A0 + REG1 (insn)];
-}
-
-/* mov an, am */
-void OP_F270 (insn, extension)
- unsigned long insn, extension;
-{
- State.regs[REG_A0 + REG0 (insn)] = State.regs[REG_A0 + REG1 (insn)];
-}
-
-/* mov psw, dn */
-void OP_F3F0 (insn, extension)
- unsigned long insn, extension;
-{
- State.regs[REG_D0 + REG0 (insn)] = PSW & 0xffff;
-}
-
-/* mov dn, psw */
-void OP_F3D0 (insn, extension)
- unsigned long insn, extension;
-{
- PSW = State.regs[REG_D0 + REG1 (insn)] & 0xffff ;
-}
-
-/* mov mdr, dn */
-void OP_F3E0 (insn, extension)
- unsigned long insn, extension;
-{
- State.regs[REG_D0 + REG0 (insn)] = State.regs[REG_MDR] & 0xffff;
-}
-
-/* mov dn, mdr */
-void OP_F3C0 (insn, extension)
- unsigned long insn, extension;
-{
- State.regs[REG_MDR] = State.regs[REG_D0 + REG1 (insn)] & 0xffff;
-}
-
-/* mov (an), dm */
-void OP_20 (insn, extension)
- unsigned long insn, extension;
-{
- State.regs[REG_D0 + REG0 (insn)]
- = SEXT16 (load_half (State.regs[REG_A0 + REG1 (insn)]));
-}
-
-/* mov (d8,an), dm */
-void OP_6000 (insn, extension)
- unsigned long insn, extension;
-{
- State.regs[REG_D0 + REG0_8 (insn)]
- = SEXT16 (load_half ((State.regs[REG_A0 + REG1_8 (insn)]
- + SEXT8 (insn & 0xff))));
-}
-
-/* mov (d16,an), dm */
-void OP_F7C00000 (insn, extension)
- unsigned long insn, extension;
-{
- State.regs[REG_D0 + REG0_16 (insn)]
- = SEXT16 (load_half ((State.regs[REG_A0 + REG1_16 (insn)]
- + SEXT16 (insn & 0xffff))));
-}
-
-/* mov (d24,am), dn */
-void OP_F4800000 (insn, extension)
- unsigned long insn, extension;
-{
- State.regs[REG_D0 + REG0_16 (insn)]
- = SEXT16 (load_half ((State.regs[REG_A0 + REG1_16 (insn)]
- + SEXT24 (((insn & 0xffff) << 8) + extension))));
-}
-
-/* mov (di,an), dm */
-void OP_F140 (insn, extension)
- unsigned long insn, extension;
-{
- State.regs[REG_D0 + REG0 (insn)]
- = SEXT16 (load_half ((State.regs[REG_A0 + REG1 (insn)]
- + State.regs[REG_D0 + REG0_4 (insn)])));
-}
-
-/* mov (abs16), dn */
-void OP_C80000 (insn, extension)
- unsigned long insn, extension;
-{
- State.regs[REG_D0 + REG0_16 (insn)] = SEXT16 (load_half ((insn & 0xffff)));
-}
-
-/* mov (abs24), dn */
-void OP_F4C00000 (insn, extension)
- unsigned long insn, extension;
-{
- State.regs[REG_D0 + REG0_16 (insn)]
- = SEXT16 (load_half ((((insn & 0xffff) << 8) + extension)));
-}
-
-/* mov (d8,an), am */
-void OP_7000 (insn, extension)
- unsigned long insn, extension;
-{
- State.regs[REG_A0 + REG0_8 (insn)]
- = SEXT24 (load_3_byte ((State.regs[REG_A0 + REG1_8 (insn)]
- + SEXT8 (insn & 0xff))));
-}
-
-/* mov (d16,an), am */
-void OP_F7B00000 (insn, extension)
- unsigned long insn, extension;
-{
- State.regs[REG_A0 + REG0_16 (insn)]
- = SEXT24 (load_3_byte ((State.regs[REG_A0 + REG1_16 (insn)]
- + SEXT16 (insn & 0xffff))));
-}
-
-/* mov (d24,am), an */
-void OP_F4F00000 (insn, extension)
- unsigned long insn, extension;
-{
- State.regs[REG_A0 + REG0_16 (insn)]
- = SEXT24 (load_3_byte ((State.regs[REG_A0 + REG1_16 (insn)]
- + SEXT24 (((insn & 0xffff) << 8) + extension))));
-}
-
-/* mov (di,an), am */
-void OP_F100 (insn, extension)
- unsigned long insn, extension;
-{
- State.regs[REG_A0 + REG0 (insn)]
- = SEXT24 (load_3_byte ((State.regs[REG_A0 + REG1 (insn)]
- + State.regs[REG_D0 + REG0_4 (insn)])));
-}
-
-/* mov (abs16), an */
-void OP_F7300000 (insn, extension)
- unsigned long insn, extension;
-{
- State.regs[REG_A0 + REG0_16 (insn)] = SEXT24 (load_3_byte ((insn & 0xffff)));
-}
-
-/* mov (abs24), an */
-void OP_F4D00000 (insn, extension)
- unsigned long insn, extension;
-{
- State.regs[REG_A0 + REG0_16 (insn)]
- = SEXT24 (load_3_byte ((((insn & 0xffff) << 8) + extension)));
-}
-
-/* mov dm, (an) */
-void OP_0 (insn, extension)
- unsigned long insn, extension;
-{
- store_half (State.regs[REG_A0 + REG1 (insn)],
- State.regs[REG_D0 + REG0 (insn)]);
-}
-
-/* mov dm, (d8,an) */
-void OP_4000 (insn, extension)
- unsigned long insn, extension;
-{
- store_half (State.regs[REG_A0 + REG1_8 (insn)] + SEXT8 (insn & 0xff),
- State.regs[REG_D0 + REG0_8 (insn)]);
-}
-
-/* mov dm, (d16,an) */
-void OP_F7800000 (insn, extension)
- unsigned long insn, extension;
-{
- store_half (State.regs[REG_A0 + REG1_16 (insn)] + SEXT16 (insn & 0xffff),
- State.regs[REG_D0 + REG0_16 (insn)]);
-}
-
-/* mov dm, (d24,am) */
-void OP_F4000000 (insn, extension)
- unsigned long insn, extension;
-{
- store_half ((State.regs[REG_A0 + REG1_16 (insn)]
- + SEXT24 (((insn & 0xffff) << 8) + extension)),
- State.regs[REG_D0 + REG0_16 (insn)]);
-}
-
-/* mov dm, (di,an) */
-void OP_F1C0 (insn, extension)
- unsigned long insn, extension;
-{
- store_half ((State.regs[REG_A0 + REG1 (insn)]
- + State.regs[REG_D0 + REG0_4 (insn)]),
- State.regs[REG_D0 + REG0 (insn)]);
-}
-
-/* mov dn, (abs16) */
-void OP_C00000 (insn, extension)
- unsigned long insn, extension;
-{
- store_half ((insn & 0xffff), State.regs[REG_D0 + REG0_16 (insn)]);
-}
-
-/* mov dn, (abs24) */
-void OP_F4400000 (insn, extension)
- unsigned long insn, extension;
-{
- store_half (SEXT24 (((insn & 0xffff) << 8) + extension),
- State.regs[REG_D0 + REG0_16 (insn)]);
-}
-
-/* mov am, (d8,an) */
-void OP_5000 (insn, extension)
- unsigned long insn, extension;
-{
- store_3_byte (State.regs[REG_A0 + REG1_8 (insn)] + SEXT8 (insn & 0xff),
- State.regs[REG_A0 + REG0_8 (insn)]);
-}
-
-/* mov am, (d16,an) */
-void OP_F7A00000 (insn, extension)
- unsigned long insn, extension;
-{
- store_3_byte (State.regs[REG_A0 + REG1_16 (insn)] + SEXT16 (insn & 0xffff),
- State.regs[REG_A0 + REG0_16 (insn)]);
-}
-
-/* mov am, (d24,an) */
-void OP_F4100000 (insn, extension)
- unsigned long insn, extension;
-{
- store_3_byte ((State.regs[REG_A0 + REG1_16 (insn)]
- + SEXT24 (((insn & 0xffff) << 8) + extension)),
- State.regs[REG_A0 + REG0_16 (insn)]);
-}
-
-/* mov am, (di,an) */
-void OP_F180 (insn, extension)
- unsigned long insn, extension;
-{
- store_3_byte ((State.regs[REG_A0 + REG1 (insn)]
- + State.regs[REG_D0 + REG0_4 (insn)]),
- State.regs[REG_A0 + REG0 (insn)]);
-}
-
-/* mov an, (abs16) */
-void OP_F7200000 (insn, extension)
- unsigned long insn, extension;
-{
- store_3_byte ((insn & 0xffff), State.regs[REG_A0 + REG0_16 (insn)]);
-}
-
-/* mov an, (abs24) */
-void OP_F4500000 (insn, extension)
- unsigned long insn, extension;
-{
- store_3_byte (SEXT24 (((insn & 0xffff) << 8) + extension),
- State.regs[REG_A0 + REG0_16 (insn)]);
-}
-
-/* mov imm16, dn */
-void OP_F80000 (insn, extension)
- unsigned long insn, extension;
-{
- State.regs[REG_D0 + REG0_16 (insn)] = SEXT16 (insn & 0xffff);
-}
-
-/* mov imm24, dn */
-void OP_F4700000 (insn, extension)
- unsigned long insn, extension;
-{
- State.regs[REG_D0 + REG0_16 (insn)]
- = SEXT24 (((insn & 0xffff) << 8) + extension);
-}
-
-/* mov imm16, an */
-void OP_DC0000 (insn, extension)
- unsigned long insn, extension;
-{
- State.regs[REG_A0 + REG0_16 (insn)] = insn & 0xffff;
-}
-
-/* mov imm24, an */
-void OP_F4740000 (insn, extension)
- unsigned long insn, extension;
-{
- State.regs[REG_A0 + REG0_16 (insn)]
- = SEXT24 (((insn & 0xffff) << 8) + extension);
-}
-
-/* movx (d8,an), dm */
-void OP_F57000 (insn, extension)
- unsigned long insn, extension;
-{
- State.regs[REG_D0 + REG0_8 (insn)]
- = SEXT24 (load_3_byte ((State.regs[REG_A0 + REG1_8 (insn)]
- + SEXT8 (insn & 0xff))));
-}
-
-/* movx (d16,an), dm */
-void OP_F7700000 (insn, extension)
- unsigned long insn, extension;
-{
- State.regs[REG_D0 + REG0_16 (insn)]
- = SEXT24 (load_3_byte ((State.regs[REG_A0 + REG1_16 (insn)]
- + SEXT16 (insn & 0xffff))));
-}
-
-/* movx (d24,am), dn */
-void OP_F4B00000 (insn, extension)
- unsigned long insn, extension;
-{
- State.regs[REG_D0 + REG0_16 (insn)]
- = SEXT24 (load_3_byte ((State.regs[REG_A0 + REG1_16 (insn)]
- + SEXT24 (((insn & 0xffff) << 8) + extension))));
-}
-
-/* movx dm, (d8,an) */
-void OP_F55000 (insn, extension)
- unsigned long insn, extension;
-{
- store_3_byte (State.regs[REG_A0 + REG1_8 (insn)] + SEXT8 (insn & 0xff),
- State.regs[REG_D0 + REG0_8 (insn)]);
-}
-
-/* movx dm, (d16,an) */
-void OP_F7600000 (insn, extension)
- unsigned long insn, extension;
-{
- store_3_byte (State.regs[REG_A0 + REG1_16 (insn)] + SEXT16 (insn & 0xffff),
- State.regs[REG_D0 + REG0_16 (insn)]);
-}
-
-/* movx dm, (d24,am) */
-void OP_F4300000 (insn, extension)
- unsigned long insn, extension;
-{
- store_3_byte ((State.regs[REG_A0 + REG1_16 (insn)]
- + SEXT24 (((insn & 0xffff) << 8) + extension)),
- State.regs[REG_D0 + REG0_16 (insn)]);
-}
-
-/* movb (d8,an), dm */
-void OP_F52000 (insn, extension)
- unsigned long insn, extension;
-{
- State.regs[REG_D0 + REG0_8 (insn)]
- = SEXT8 (load_byte ((State.regs[REG_A0 + REG1_8 (insn)]
- + SEXT8 (insn & 0xff))));
-}
-
-/* movb (d16,an), dm */
-void OP_F7D00000 (insn, extension)
- unsigned long insn, extension;
-{
- State.regs[REG_D0 + REG0_16 (insn)]
- = SEXT8 (load_byte ((State.regs[REG_A0 + REG1_16 (insn)]
- + SEXT16 (insn & 0xffff))));
-}
-
-/* movb (d24,am), dn */
-void OP_F4A00000 (insn, extension)
- unsigned long insn, extension;
-{
- State.regs[REG_D0 + REG0_16 (insn)]
- = SEXT8 (load_byte ((State.regs[REG_A0 + REG1_16 (insn)]
- + SEXT24 (((insn & 0xffff) << 8) + extension))));
-}
-
-/* movb (di,an), dm */
-void OP_F040 (insn, extension)
- unsigned long insn, extension;
-{
- State.regs[REG_D0 + REG0 (insn)]
- = SEXT8 (load_byte ((State.regs[REG_A0 + REG1 (insn)]
- + State.regs[REG_D0 + REG0_4 (insn)])));
-}
-
-/* mov (abs24), dn */
-void OP_F4C40000 (insn, extension)
- unsigned long insn, extension;
-{
- State.regs[REG_D0 + REG0_16 (insn)]
- = SEXT8 (load_byte ((((insn & 0xffff) << 8) + extension)));
-}
-
-/* movb dm, (an) */
-void OP_10 (insn, extension)
- unsigned long insn, extension;
-{
- store_byte (State.regs[REG_A0 + REG1 (insn)],
- State.regs[REG_D0 + REG0 (insn)]);
-}
-
-/* movb dm, (d8,an) */
-void OP_F51000 (insn, extension)
- unsigned long insn, extension;
-{
- store_byte (State.regs[REG_A0 + REG1_8 (insn)] + SEXT8 (insn & 0xff),
- State.regs[REG_D0 + REG0_8 (insn)]);
-}
-
-/* movb dm, (d16,an) */
-void OP_F7900000 (insn, extension)
- unsigned long insn, extension;
-{
- store_byte (State.regs[REG_A0 + REG1_16 (insn)] + SEXT16 (insn & 0xffff),
- State.regs[REG_D0 + REG0_16 (insn)]);
-}
-
-/* movb dm, (d24,am) */
-void OP_F4200000 (insn, extension)
- unsigned long insn, extension;
-{
- store_byte ((State.regs[REG_A0 + REG1_16 (insn)]
- + SEXT24 (((insn & 0xffff) << 8) + extension)),
- State.regs[REG_D0 + REG0_16 (insn)]);
-}
-
-/* movb dm, (di,an) */
-void OP_F0C0 (insn, extension)
- unsigned long insn, extension;
-{
- store_byte ((State.regs[REG_A0 + REG1 (insn)]
- + State.regs[REG_D0 + REG0_4 (insn)]),
- State.regs[REG_D0 + REG0 (insn)]);
-}
-
-/* movb dn, (abs16) */
-void OP_C40000 (insn, extension)
- unsigned long insn, extension;
-{
- store_byte ((insn & 0xffff), State.regs[REG_D0 + REG0_16 (insn)]);
-}
-
-/* movb dn, (abs24) */
-void OP_F4440000 (insn, extension)
- unsigned long insn, extension;
-{
- store_byte (SEXT24 (((insn & 0xffff) << 8) + extension),
- State.regs[REG_D0 + REG0_16 (insn)]);
-}
-
-/* movbu (an), dm */
-void OP_30 (insn, extension)
- unsigned long insn, extension;
-{
- State.regs[REG_D0 + REG0 (insn)]
- = load_byte (State.regs[REG_A0 + REG1 (insn)]);
-}
-
-/* movbu (d8,an), dm */
-void OP_F53000 (insn, extension)
- unsigned long insn, extension;
-{
- State.regs[REG_D0 + REG0_8 (insn)]
- = load_byte ((State.regs[REG_A0 + REG1_8 (insn)] + SEXT8 (insn & 0xff)));
-}
-
-/* movbu (d16,an), dm */
-void OP_F7500000 (insn, extension)
- unsigned long insn, extension;
-{
- State.regs[REG_D0 + REG0_16 (insn)]
- = load_byte ((State.regs[REG_A0 + REG1_16 (insn)]
- + SEXT16 (insn & 0xffff)));
-}
-
-/* movbu (d24,am), dn */
-void OP_F4900000 (insn, extension)
- unsigned long insn, extension;
-{
- State.regs[REG_D0 + REG0_16 (insn)]
- = load_byte ((State.regs[REG_A0 + REG1_16 (insn)]
- + SEXT24 (((insn & 0xffff) << 8) + extension)));
-}
-
-/* movbu (di,an), dm */
-void OP_F080 (insn, extension)
- unsigned long insn, extension;
-{
- State.regs[REG_D0 + REG0 (insn)]
- = load_byte ((State.regs[REG_A0 + REG1 (insn)]
- + State.regs[REG_D0 + REG0_4 (insn)]));
-}
-
-/* movbu (abs16), dn */
-void OP_CC0000 (insn, extension)
- unsigned long insn, extension;
-{
- State.regs[REG_D0 + REG0_16 (insn)] = load_byte ((insn & 0xffff));
-}
-
-/* movbu (abs24), dn */
-void OP_F4C80000 (insn, extension)
- unsigned long insn, extension;
-{
- State.regs[REG_D0 + REG0_16 (insn)]
- = load_byte ((((insn & 0xffff) << 8) + extension));
-}
-
-/* ext dn */
-void OP_F3C1 (insn, extension)
- unsigned long insn, extension;
-{
- if (State.regs[REG_D0 + REG1 (insn)] & 0x8000)
- State.regs[REG_MDR] = 0xffff;
- else
- State.regs[REG_MDR] = 0;
-}
-
-/* extx dn */
-void OP_B0 (insn, extension)
- unsigned long insn, extension;
-{
- State.regs[REG_D0 + REG0 (insn)] = SEXT16 (State.regs[REG_D0 + REG0 (insn)]);
-}
-
-/* extxu dn */
-void OP_B4 (insn, extension)
- unsigned long insn, extension;
-{
- State.regs[REG_D0 + REG0 (insn)] = State.regs[REG_D0 + REG0 (insn)] & 0xffff;
-}
-
-/* extxb dn */
-void OP_B8 (insn, extension)
- unsigned long insn, extension;
-{
- State.regs[REG_D0 + REG0 (insn)] = SEXT8 (State.regs[REG_D0 + REG0 (insn)]);
-}
-
-/* extxbu dn */
-void OP_BC (insn, extension)
- unsigned long insn, extension;
-{
- State.regs[REG_D0 + REG0 (insn)] = State.regs[REG_D0 + REG0 (insn)] & 0xff;
-}
-
-/* add dn,dm */
-void OP_90 (insn, extension)
- unsigned long insn, extension;
-{
- int z, c, n, v, zx, cx, nx, vx;
- unsigned long reg1, reg2, value;
-
- reg1 = TRUNC (State.regs[REG_D0 + REG1 (insn)]);
- reg2 = TRUNC (State.regs[REG_D0 + REG0 (insn)]);
- value = TRUNC (reg1 + reg2);
- State.regs[REG_D0 + REG0 (insn)] = value;
-
- z = ((value & 0xffff) == 0);
- zx = (value == 0);
- n = (value & 0x8000);
- nx = (value & 0x800000);
- c = ((value & 0xffff) < (reg1 & 0xffff))
- || ((value & 0xffff) < (reg2 & 0xffff));
- cx = (value < reg1) || (value < reg2);
- v = ((reg2 & 0x8000) == (reg1 & 0x8000)
- && (reg2 & 0x8000) != (value & 0x8000));
- vx = ((reg2 & 0x800000) == (reg1 & 0x800000)
- && (reg2 & 0x800000) != (value & 0x800000));
-
- PSW &= ~(PSW_ZF | PSW_NF | PSW_CF | PSW_VF
- | PSW_ZX | PSW_NX | PSW_CX | PSW_VX);
- PSW |= ((z ? PSW_ZF : 0) | (n ? PSW_NF : 0)
- | (c ? PSW_CF : 0) | (v ? PSW_VF : 0)
- | (zx ? PSW_ZX : 0) | (nx ? PSW_NX : 0)
- | (cx ? PSW_CX : 0) | (vx ? PSW_VX : 0));
-}
-
-/* add dm, an */
-void OP_F200 (insn, extension)
- unsigned long insn, extension;
-{
- int z, c, n, v, zx, cx, nx, vx;
- unsigned long reg1, reg2, value;
-
- reg1 = TRUNC (State.regs[REG_D0 + REG1 (insn)]);
- reg2 = TRUNC (State.regs[REG_A0 + REG0 (insn)]);
- value = TRUNC (reg1 + reg2);
- State.regs[REG_A0 + REG0 (insn)] = value;
-
- z = ((value & 0xffff) == 0);
- zx = (value == 0);
- n = (value & 0x8000);
- nx = (value & 0x800000);
- c = ((value & 0xffff) < (reg1 & 0xffff))
- || ((value & 0xffff) < (reg2 & 0xffff));
- cx = (value < reg1) || (value < reg2);
- v = ((reg2 & 0x8000) == (reg1 & 0x8000)
- && (reg2 & 0x8000) != (value & 0x8000));
- vx = ((reg2 & 0x800000) == (reg1 & 0x800000)
- && (reg2 & 0x800000) != (value & 0x800000));
-
- PSW &= ~(PSW_ZF | PSW_NF | PSW_CF | PSW_VF
- | PSW_ZX | PSW_NX | PSW_CX | PSW_VX);
- PSW |= ((z ? PSW_ZF : 0) | (n ? PSW_NF : 0)
- | (c ? PSW_CF : 0) | (v ? PSW_VF : 0)
- | (zx ? PSW_ZX : 0) | (nx ? PSW_NX : 0)
- | (cx ? PSW_CX : 0) | (vx ? PSW_VX : 0));
-}
-
-/* add an, dm */
-void OP_F2C0 (insn, extension)
- unsigned long insn, extension;
-{
- int z, c, n, v, zx, cx, nx, vx;
- unsigned long reg1, reg2, value;
-
- reg1 = TRUNC (State.regs[REG_A0 + REG1 (insn)]);
- reg2 = TRUNC (State.regs[REG_D0 + REG0 (insn)]);
- value = TRUNC (reg1 + reg2);
- State.regs[REG_D0 + REG0 (insn)] = value;
-
- z = ((value & 0xffff) == 0);
- zx = (value == 0);
- n = (value & 0x8000);
- nx = (value & 0x800000);
- c = ((value & 0xffff) < (reg1 & 0xffff))
- || ((value & 0xffff) < (reg2 & 0xffff));
- cx = (value < reg1) || (value < reg2);
- v = ((reg2 & 0x8000) == (reg1 & 0x8000)
- && (reg2 & 0x8000) != (value & 0x8000));
- vx = ((reg2 & 0x800000) == (reg1 & 0x800000)
- && (reg2 & 0x800000) != (value & 0x800000));
-
- PSW &= ~(PSW_ZF | PSW_NF | PSW_CF | PSW_VF
- | PSW_ZX | PSW_NX | PSW_CX | PSW_VX);
- PSW |= ((z ? PSW_ZF : 0) | (n ? PSW_NF : 0)
- | (c ? PSW_CF : 0) | (v ? PSW_VF : 0)
- | (zx ? PSW_ZX : 0) | (nx ? PSW_NX : 0)
- | (cx ? PSW_CX : 0) | (vx ? PSW_VX : 0));
-}
-
-/* add an,am */
-void OP_F240 (insn, extension)
- unsigned long insn, extension;
-{
- int z, c, n, v, zx, cx, nx, vx;
- unsigned long reg1, reg2, value;
-
- reg1 = TRUNC (State.regs[REG_A0 + REG1 (insn)]);
- reg2 = TRUNC (State.regs[REG_A0 + REG0 (insn)]);
- value = TRUNC (reg1 + reg2);
- State.regs[REG_A0 + REG0 (insn)] = value;
-
- z = ((value & 0xffff) == 0);
- zx = (value == 0);
- n = (value & 0x8000);
- nx = (value & 0x800000);
- c = ((value & 0xffff) < (reg1 & 0xffff))
- || ((value & 0xffff) < (reg2 & 0xffff));
- cx = (value < reg1) || (value < reg2);
- v = ((reg2 & 0x8000) == (reg1 & 0x8000)
- && (reg2 & 0x8000) != (value & 0x8000));
- vx = ((reg2 & 0x800000) == (reg1 & 0x800000)
- && (reg2 & 0x800000) != (value & 0x800000));
-
- PSW &= ~(PSW_ZF | PSW_NF | PSW_CF | PSW_VF
- | PSW_ZX | PSW_NX | PSW_CX | PSW_VX);
- PSW |= ((z ? PSW_ZF : 0) | (n ? PSW_NF : 0)
- | (c ? PSW_CF : 0) | (v ? PSW_VF : 0)
- | (zx ? PSW_ZX : 0) | (nx ? PSW_NX : 0)
- | (cx ? PSW_CX : 0) | (vx ? PSW_VX : 0));
-}
-
-/* add imm8, dn */
-void OP_D400 (insn, extension)
- unsigned long insn, extension;
-{
- int z, c, n, v, zx, cx, nx, vx;
- unsigned long reg1, imm, value;
-
- reg1 = TRUNC (State.regs[REG_D0 + REG0_8 (insn)]);
- imm = TRUNC (SEXT8 (insn & 0xff));
- value = TRUNC (reg1 + imm);
- State.regs[REG_D0 + REG0_8 (insn)] = value;
-
- z = ((value & 0xffff) == 0);
- zx = (value == 0);
- n = (value & 0x8000);
- nx = (value & 0x800000);
- c = ((value & 0xffff) < (reg1 & 0xffff))
- || ((value & 0xffff) < (imm & 0xffff));
- cx = (value < reg1) || (value < imm);
- v = ((reg1 & 0x8000) == (imm & 0x8000)
- && (reg1 & 0x8000) != (value & 0x8000));
- vx = ((reg1 & 0x800000) == (imm & 0x800000)
- && (reg1 & 0x800000) != (value & 0x800000));
-
- PSW &= ~(PSW_ZF | PSW_NF | PSW_CF | PSW_VF
- | PSW_ZX | PSW_NX | PSW_CX | PSW_VX);
- PSW |= ((z ? PSW_ZF : 0) | (n ? PSW_NF : 0)
- | (c ? PSW_CF : 0) | (v ? PSW_VF : 0)
- | (zx ? PSW_ZX : 0) | (nx ? PSW_NX : 0)
- | (cx ? PSW_CX : 0) | (vx ? PSW_VX : 0));
-}
-
-/* add imm16, dn */
-void OP_F7180000 (insn, extension)
- unsigned long insn, extension;
-{
- int z, c, n, v, zx, cx, nx, vx;
- unsigned long reg1, imm, value;
-
- reg1 = TRUNC (State.regs[REG_D0 + REG0_16 (insn)]);
- imm = TRUNC (SEXT16 (insn & 0xffff));
- value = TRUNC (reg1 + imm);
- State.regs[REG_D0 + REG0_16 (insn)] = value;
-
- z = ((value & 0xffff) == 0);
- zx = (value == 0);
- n = (value & 0x8000);
- nx = (value & 0x800000);
- c = ((value & 0xffff) < (reg1 & 0xffff))
- || ((value & 0xffff) < (imm & 0xffff));
- cx = (value < reg1) || (value < imm);
- v = ((reg1 & 0x8000) == (imm & 0x8000)
- && (reg1 & 0x8000) != (value & 0x8000));
- vx = ((reg1 & 0x800000) == (imm & 0x800000)
- && (reg1 & 0x800000) != (value & 0x800000));
-
- PSW &= ~(PSW_ZF | PSW_NF | PSW_CF | PSW_VF
- | PSW_ZX | PSW_NX | PSW_CX | PSW_VX);
- PSW |= ((z ? PSW_ZF : 0) | (n ? PSW_NF : 0)
- | (c ? PSW_CF : 0) | (v ? PSW_VF : 0)
- | (zx ? PSW_ZX : 0) | (nx ? PSW_NX : 0)
- | (cx ? PSW_CX : 0) | (vx ? PSW_VX : 0));
-}
-
-/* add imm24,dn */
-void OP_F4600000 (insn, extension)
- unsigned long insn, extension;
-{
- int z, c, n, v, zx, cx, nx, vx;
- unsigned long reg1, imm, value;
-
- reg1 = TRUNC (State.regs[REG_D0 + REG0_16 (insn)]);
- imm = TRUNC (((insn & 0xffff) << 8) + extension);
- value = TRUNC (reg1 + imm);
- State.regs[REG_D0 + REG0_16 (insn)] = value;
-
- z = ((value & 0xffff) == 0);
- zx = (value == 0);
- n = (value & 0x8000);
- nx = (value & 0x800000);
- c = ((value & 0xffff) < (reg1 & 0xffff))
- || ((value & 0xffff) < (imm & 0xffff));
- cx = (value < reg1) || (value < imm);
- v = ((reg1 & 0x8000) == (imm & 0x8000)
- && (reg1 & 0x8000) != (value & 0x8000));
- vx = ((reg1 & 0x800000) == (imm & 0x800000)
- && (reg1 & 0x800000) != (value & 0x800000));
-
- PSW &= ~(PSW_ZF | PSW_NF | PSW_CF | PSW_VF
- | PSW_ZX | PSW_NX | PSW_CX | PSW_VX);
- PSW |= ((z ? PSW_ZF : 0) | (n ? PSW_NF : 0)
- | (c ? PSW_CF : 0) | (v ? PSW_VF : 0)
- | (zx ? PSW_ZX : 0) | (nx ? PSW_NX : 0)
- | (cx ? PSW_CX : 0) | (vx ? PSW_VX : 0));
-}
-
-/* add imm8, an */
-void OP_D000 (insn, extension)
- unsigned long insn, extension;
-{
- int z, c, n, v, zx, cx, nx, vx;
- unsigned long reg1, imm, value;
-
- reg1 = TRUNC (State.regs[REG_A0 + REG0_8 (insn)]);
- imm = TRUNC (SEXT8 (insn & 0xff));
- value = TRUNC (reg1 + imm);
- State.regs[REG_A0 + REG0_8 (insn)] = value;
-
- z = ((value & 0xffff) == 0);
- zx = (value == 0);
- n = (value & 0x8000);
- nx = (value & 0x800000);
- c = ((value & 0xffff) < (reg1 & 0xffff))
- || ((value & 0xffff) < (imm & 0xffff));
- cx = (value < reg1) || (value < imm);
- v = ((reg1 & 0x8000) == (imm & 0x8000)
- && (reg1 & 0x8000) != (value & 0x8000));
- vx = ((reg1 & 0x800000) == (imm & 0x800000)
- && (reg1 & 0x800000) != (value & 0x800000));
-
- PSW &= ~(PSW_ZF | PSW_NF | PSW_CF | PSW_VF
- | PSW_ZX | PSW_NX | PSW_CX | PSW_VX);
- PSW |= ((z ? PSW_ZF : 0) | (n ? PSW_NF : 0)
- | (c ? PSW_CF : 0) | (v ? PSW_VF : 0)
- | (zx ? PSW_ZX : 0) | (nx ? PSW_NX : 0)
- | (cx ? PSW_CX : 0) | (vx ? PSW_VX : 0));
-}
-
-/* add imm16, an */
-void OP_F7080000 (insn, extension)
- unsigned long insn, extension;
-{
- int z, c, n, v, zx, cx, nx, vx;
- unsigned long reg1, imm, value;
-
- reg1 = TRUNC (State.regs[REG_A0 + REG0_16 (insn)]);
- imm = TRUNC (SEXT16 (insn & 0xffff));
- value = TRUNC (reg1 + imm);
- State.regs[REG_A0 + REG0_16 (insn)] = value;
-
- z = ((value & 0xffff) == 0);
- zx = (value == 0);
- n = (value & 0x8000);
- nx = (value & 0x800000);
- c = ((value & 0xffff) < (reg1 & 0xffff))
- || ((value & 0xffff) < (imm & 0xffff));
- cx = (value < reg1) || (value < imm);
- v = ((reg1 & 0x8000) == (imm & 0x8000)
- && (reg1 & 0x8000) != (value & 0x8000));
- vx = ((reg1 & 0x800000) == (imm & 0x800000)
- && (reg1 & 0x800000) != (value & 0x800000));
-
- PSW &= ~(PSW_ZF | PSW_NF | PSW_CF | PSW_VF
- | PSW_ZX | PSW_NX | PSW_CX | PSW_VX);
- PSW |= ((z ? PSW_ZF : 0) | (n ? PSW_NF : 0)
- | (c ? PSW_CF : 0) | (v ? PSW_VF : 0)
- | (zx ? PSW_ZX : 0) | (nx ? PSW_NX : 0)
- | (cx ? PSW_CX : 0) | (vx ? PSW_VX : 0));
-}
-
-/* add imm24, an */
-void OP_F4640000 (insn, extension)
- unsigned long insn, extension;
-{
- int z, c, n, v, zx, cx, nx, vx;
- unsigned long reg1, imm, value;
-
- reg1 = TRUNC (State.regs[REG_A0 + REG0_16 (insn)]);
- imm = TRUNC (((insn & 0xffff) << 8) + extension);
- value = TRUNC (reg1 + imm);
- State.regs[REG_A0 + REG0_16 (insn)] = value;
-
- z = ((value & 0xffff) == 0);
- zx = (value == 0);
- n = (value & 0x8000);
- nx = (value & 0x800000);
- c = ((value & 0xffff) < (reg1 & 0xffff)) || ((value & 0xffff) < (imm & 0xffff));
- cx = (value < reg1) || (value < imm);
- v = ((reg1 & 0x8000) == (imm & 0x8000)
- && (reg1 & 0x8000) != (value & 0x8000));
- vx = ((reg1 & 0x800000) == (imm & 0x800000)
- && (reg1 & 0x800000) != (value & 0x800000));
-
- PSW &= ~(PSW_ZF | PSW_NF | PSW_CF | PSW_VF
- | PSW_ZX | PSW_NX | PSW_CX | PSW_VX);
- PSW |= ((z ? PSW_ZF : 0) | (n ? PSW_NF : 0)
- | (c ? PSW_CF : 0) | (v ? PSW_VF : 0)
- | (zx ? PSW_ZX : 0) | (nx ? PSW_NX : 0)
- | (cx ? PSW_CX : 0) | (vx ? PSW_VX : 0));
-}
-
-/* addc dm,dn */
-void OP_F280 (insn, extension)
- unsigned long insn, extension;
-{
- int z, c, n, v, zx, cx, nx, vx;
- unsigned long reg1, reg2, value;
-
- reg1 = TRUNC (State.regs[REG_D0 + REG1 (insn)]);
- reg2 = TRUNC (State.regs[REG_D0 + REG0 (insn)]);
- value = TRUNC (reg1 + reg2 + ((PSW & PSW_CF) != 0));
- State.regs[REG_D0 + REG0 (insn)] = value;
-
- z = ((value & 0xffff) == 0);
- zx = (value == 0);
- n = (value & 0x8000);
- nx = (value & 0x800000);
- c = ((value & 0xffff) < (reg1 & 0xffff))
- || ((value & 0xffff) < (reg2 & 0xffff));
- cx = (value < reg1) || (value < reg2);
- v = ((reg2 & 0x8000) == (reg1 & 0x8000)
- && (reg2 & 0x8000) != (value & 0x8000));
- vx = ((reg2 & 0x800000) == (reg1 & 0x800000)
- && (reg2 & 0x800000) != (value & 0x800000));
-
- PSW &= ~(PSW_ZF | PSW_NF | PSW_CF | PSW_VF
- | PSW_ZX | PSW_NX | PSW_CX | PSW_VX);
- PSW |= ((z ? PSW_ZF : 0) | (n ? PSW_NF : 0)
- | (c ? PSW_CF : 0) | (v ? PSW_VF : 0)
- | (zx ? PSW_ZX : 0) | (nx ? PSW_NX : 0)
- | (cx ? PSW_CX : 0) | (vx ? PSW_VX : 0));
-}
-
-/* addnf imm8, an */
-void OP_F50C00 (insn, extension)
- unsigned long insn, extension;
-{
- unsigned long reg1, imm, value;
-
- reg1 = State.regs[REG_A0 + REG0_8 (insn)];
- imm = SEXT8 (insn & 0xff);
- value = reg1 + imm;
- State.regs[REG_A0 + REG0_8 (insn)] = TRUNC (value);
-}
-
-/* sub dn, dm */
-void OP_A0 (insn, extension)
- unsigned long insn, extension;
-{
- int z, c, n, v, zx, cx, nx, vx;
- unsigned long reg1, reg2, value;
-
- reg1 = TRUNC (State.regs[REG_D0 + REG1 (insn)]);
- reg2 = TRUNC (State.regs[REG_D0 + REG0 (insn)]);
- value = TRUNC (reg2 - reg1);
- State.regs[REG_D0 + REG0 (insn)] = value;
-
- z = ((value & 0xffff) == 0);
- zx = (value == 0);
- n = (value & 0x8000);
- nx = (value & 0x800000);
- c = ((reg1 & 0xffff) > (reg2 & 0xffff));
- cx = (reg1 > reg2);
- v = ((reg2 & 0x8000) != (reg1 & 0x8000)
- && (reg2 & 0x8000) != (value & 0x8000));
- vx = ((reg2 & 0x800000) != (reg1 & 0x800000)
- && (reg2 & 0x800000) != (value & 0x800000));
-
- PSW &= ~(PSW_ZF | PSW_NF | PSW_CF | PSW_VF
- | PSW_ZX | PSW_NX | PSW_CX | PSW_VX);
- PSW |= ((z ? PSW_ZF : 0) | (n ? PSW_NF : 0)
- | (c ? PSW_CF : 0) | (v ? PSW_VF : 0)
- | (zx ? PSW_ZX : 0) | (nx ? PSW_NX : 0)
- | (cx ? PSW_CX : 0) | (vx ? PSW_VX : 0));
-}
-
-/* sub dm, an */
-void OP_F210 (insn, extension)
- unsigned long insn, extension;
-{
- int z, c, n, v, zx, cx, nx, vx;
- unsigned long reg1, reg2, value;
-
- reg1 = TRUNC (State.regs[REG_D0 + REG1 (insn)]);
- reg2 = TRUNC (State.regs[REG_A0 + REG0 (insn)]);
- value = TRUNC (reg2 - reg1);
- State.regs[REG_A0 + REG0 (insn)] = value;
-
- z = ((value & 0xffff) == 0);
- zx = (value == 0);
- n = (value & 0x8000);
- nx = (value & 0x800000);
- c = ((reg1 & 0xffff) > (reg2 & 0xffff));
- cx = (reg1 > reg2);
- v = ((reg2 & 0x8000) != (reg1 & 0x8000)
- && (reg2 & 0x8000) != (value & 0x8000));
- vx = ((reg2 & 0x800000) != (reg1 & 0x800000)
- && (reg2 & 0x800000) != (value & 0x800000));
-
- PSW &= ~(PSW_ZF | PSW_NF | PSW_CF | PSW_VF
- | PSW_ZX | PSW_NX | PSW_CX | PSW_VX);
- PSW |= ((z ? PSW_ZF : 0) | (n ? PSW_NF : 0)
- | (c ? PSW_CF : 0) | (v ? PSW_VF : 0)
- | (zx ? PSW_ZX : 0) | (nx ? PSW_NX : 0)
- | (cx ? PSW_CX : 0) | (vx ? PSW_VX : 0));
-}
-
-/* sub an, dm */
-void OP_F2D0 (insn, extension)
- unsigned long insn, extension;
-{
- int z, c, n, v, zx, cx, nx, vx;
- unsigned long reg1, reg2, value;
-
- reg1 = TRUNC (State.regs[REG_A0 + REG1 (insn)]);
- reg2 = TRUNC (State.regs[REG_D0 + REG0 (insn)]);
- value = TRUNC (reg2 - reg1);
- State.regs[REG_D0 + REG0 (insn)] = value;
-
- z = ((value & 0xffff) == 0);
- zx = (value == 0);
- n = (value & 0x8000);
- nx = (value & 0x800000);
- c = ((reg1 & 0xffff) > (reg2 & 0xffff));
- cx = (reg1 > reg2);
- v = ((reg2 & 0x8000) != (reg1 & 0x8000)
- && (reg2 & 0x8000) != (value & 0x8000));
- vx = ((reg2 & 0x800000) != (reg1 & 0x800000)
- && (reg2 & 0x800000) != (value & 0x800000));
-
- PSW &= ~(PSW_ZF | PSW_NF | PSW_CF | PSW_VF
- | PSW_ZX | PSW_NX | PSW_CX | PSW_VX);
- PSW |= ((z ? PSW_ZF : 0) | (n ? PSW_NF : 0)
- | (c ? PSW_CF : 0) | (v ? PSW_VF : 0)
- | (zx ? PSW_ZX : 0) | (nx ? PSW_NX : 0)
- | (cx ? PSW_CX : 0) | (vx ? PSW_VX : 0));
-}
-
-/* sub an, am */
-void OP_F250 (insn, extension)
- unsigned long insn, extension;
-{
- int z, c, n, v, zx, cx, nx, vx;
- unsigned long reg1, reg2, value;
-
- reg1 = TRUNC (State.regs[REG_A0 + REG1 (insn)]);
- reg2 = TRUNC (State.regs[REG_A0 + REG0 (insn)]);
- value = TRUNC (reg2 - reg1);
- State.regs[REG_A0 + REG0 (insn)] = value;
-
- z = ((value & 0xffff) == 0);
- zx = (value == 0);
- n = (value & 0x8000);
- nx = (value & 0x800000);
- c = ((reg1 & 0xffff) > (reg2 & 0xffff));
- cx = (reg1 > reg2);
- v = ((reg2 & 0x8000) != (reg1 & 0x8000)
- && (reg2 & 0x8000) != (value & 0x8000));
- vx = ((reg2 & 0x800000) != (reg1 & 0x800000)
- && (reg2 & 0x800000) != (value & 0x800000));
-
- PSW &= ~(PSW_ZF | PSW_NF | PSW_CF | PSW_VF
- | PSW_ZX | PSW_NX | PSW_CX | PSW_VX);
- PSW |= ((z ? PSW_ZF : 0) | (n ? PSW_NF : 0)
- | (c ? PSW_CF : 0) | (v ? PSW_VF : 0)
- | (zx ? PSW_ZX : 0) | (nx ? PSW_NX : 0)
- | (cx ? PSW_CX : 0) | (vx ? PSW_VX : 0));
-}
-
-/* sub imm16, dn */
-void OP_F71C0000 (insn, extension)
- unsigned long insn, extension;
-{
- int z, c, n, v, zx, cx, nx, vx;
- unsigned long reg1, imm, value;
-
- reg1 = TRUNC (State.regs[REG_D0 + REG0_16 (insn)]);
- imm = TRUNC (SEXT16 (insn & 0xffff));
- value = TRUNC (reg1 - imm);
- State.regs[REG_D0 + REG0_16 (insn)] = value;
-
- z = ((value & 0xffff) == 0);
- zx = (value == 0);
- n = (value & 0x8000);
- nx = (value & 0x800000);
- c = ((reg1 & 0xffff) < (imm & 0xffff));
- cx = (reg1 < imm);
- v = ((reg1 & 0x8000) != (imm & 0x8000)
- && (reg1 & 0x8000) != (value & 0x8000));
- vx = ((reg1 & 0x800000) != (imm & 0x800000)
- && (reg1 & 0x800000) != (value & 0x800000));
-
- PSW &= ~(PSW_ZF | PSW_NF | PSW_CF | PSW_VF
- | PSW_ZX | PSW_NX | PSW_CX | PSW_VX);
- PSW |= ((z ? PSW_ZF : 0) | (n ? PSW_NF : 0)
- | (c ? PSW_CF : 0) | (v ? PSW_VF : 0)
- | (zx ? PSW_ZX : 0) | (nx ? PSW_NX : 0)
- | (cx ? PSW_CX : 0) | (vx ? PSW_VX : 0));
-}
-
-/* sub imm24, dn */
-void OP_F4680000 (insn, extension)
- unsigned long insn, extension;
-{
- int z, c, n, v, zx, cx, nx, vx;
- unsigned long reg1, imm, value;
-
- reg1 = TRUNC (State.regs[REG_D0 + REG0_16 (insn)]);
- imm = TRUNC (((insn & 0xffff) << 8) + extension);
- value = TRUNC (reg1 - imm);
- State.regs[REG_D0 + REG0_16 (insn)] = value;
-
- z = ((value & 0xffff) == 0);
- zx = (value == 0);
- n = (value & 0x8000);
- nx = (value & 0x800000);
- c = ((reg1 & 0xffff) < (imm & 0xffff));
- cx = (reg1 < imm);
- v = ((reg1 & 0x8000) != (imm & 0x8000)
- && (reg1 & 0x8000) != (value & 0x8000));
- vx = ((reg1 & 0x800000) != (imm & 0x800000)
- && (reg1 & 0x800000) != (value & 0x800000));
-
- PSW &= ~(PSW_ZF | PSW_NF | PSW_CF | PSW_VF
- | PSW_ZX | PSW_NX | PSW_CX | PSW_VX);
- PSW |= ((z ? PSW_ZF : 0) | (n ? PSW_NF : 0)
- | (c ? PSW_CF : 0) | (v ? PSW_VF : 0)
- | (zx ? PSW_ZX : 0) | (nx ? PSW_NX : 0)
- | (cx ? PSW_CX : 0) | (vx ? PSW_VX : 0));
-}
-
-/* sub imm16, an */
-void OP_F70C0000 (insn, extension)
- unsigned long insn, extension;
-{
- int z, c, n, v, zx, cx, nx, vx;
- unsigned long reg1, imm, value;
-
- reg1 = TRUNC (State.regs[REG_A0 + REG0_16 (insn)]);
- imm = TRUNC (SEXT16 (insn & 0xffff));
- value = TRUNC (reg1 - imm);
- State.regs[REG_A0 + REG0_16 (insn)] = value;
-
- z = ((value & 0xffff) == 0);
- zx = (value == 0);
- n = (value & 0x8000);
- nx = (value & 0x800000);
- c = ((reg1 & 0xffff) < (imm & 0xffff));
- cx = (reg1 < imm);
- v = ((reg1 & 0x8000) != (imm & 0x8000)
- && (reg1 & 0x8000) != (value & 0x8000));
- vx = ((reg1 & 0x800000) != (imm & 0x800000)
- && (reg1 & 0x800000) != (value & 0x800000));
-
- PSW &= ~(PSW_ZF | PSW_NF | PSW_CF | PSW_VF
- | PSW_ZX | PSW_NX | PSW_CX | PSW_VX);
- PSW |= ((z ? PSW_ZF : 0) | (n ? PSW_NF : 0)
- | (c ? PSW_CF : 0) | (v ? PSW_VF : 0)
- | (zx ? PSW_ZX : 0) | (nx ? PSW_NX : 0)
- | (cx ? PSW_CX : 0) | (vx ? PSW_VX : 0));
-}
-
-/* sub imm24, an */
-void OP_F46C0000 (insn, extension)
- unsigned long insn, extension;
-{
- int z, c, n, v, zx, cx, nx, vx;
- unsigned long reg1, imm, value;
-
- reg1 = TRUNC (State.regs[REG_A0 + REG0_16 (insn)]);
- imm = TRUNC (((insn & 0xffff) << 8) + extension);
- value = TRUNC (reg1 - imm);
- State.regs[REG_A0 + REG0_16 (insn)] = value;
-
- z = ((value & 0xffff) == 0);
- zx = (value == 0);
- n = (value & 0x8000);
- nx = (value & 0x800000);
- c = ((reg1 & 0xffff) < (imm & 0xffff));
- cx = (reg1 < imm);
- v = ((reg1 & 0x8000) != (imm & 0x8000)
- && (reg1 & 0x8000) != (value & 0x8000));
- vx = ((reg1 & 0x800000) != (imm & 0x800000)
- && (reg1 & 0x800000) != (value & 0x800000));
-
- PSW &= ~(PSW_ZF | PSW_NF | PSW_CF | PSW_VF
- | PSW_ZX | PSW_NX | PSW_CX | PSW_VX);
- PSW |= ((z ? PSW_ZF : 0) | (n ? PSW_NF : 0)
- | (c ? PSW_CF : 0) | (v ? PSW_VF : 0)
- | (zx ? PSW_ZX : 0) | (nx ? PSW_NX : 0)
- | (cx ? PSW_CX : 0) | (vx ? PSW_VX : 0));
-}
-
-/* subc dm, dn */
-void OP_F290 (insn, extension)
- unsigned long insn, extension;
-{
- int z, c, n, v, zx, cx, nx, vx;
- unsigned long reg1, reg2, value;
-
- reg1 = TRUNC (State.regs[REG_D0 + REG1 (insn)]);
- reg2 = TRUNC (State.regs[REG_D0 + REG0 (insn)]);
- value = TRUNC (reg2 - reg1 - ((PSW & PSW_CF) != 0));
- State.regs[REG_D0 + REG0 (insn)] = value;
-
- z = ((value & 0xffff) == 0);
- zx = (value == 0);
- n = (value & 0x8000);
- nx = (value & 0x800000);
- c = ((reg1 & 0xffff) > (reg2 & 0xffff));
- cx = (reg1 > reg2);
- v = ((reg2 & 0x8000) != (reg1 & 0x8000)
- && (reg2 & 0x8000) != (value & 0x8000));
- vx = ((reg2 & 0x800000) != (reg1 & 0x800000)
- && (reg2 & 0x800000) != (value & 0x800000));
-
- PSW &= ~(PSW_ZF | PSW_NF | PSW_CF | PSW_VF
- | PSW_ZX | PSW_NX | PSW_CX | PSW_VX);
- PSW |= ((z ? PSW_ZF : 0) | (n ? PSW_NF : 0)
- | (c ? PSW_CF : 0) | (v ? PSW_VF : 0)
- | (zx ? PSW_ZX : 0) | (nx ? PSW_NX : 0)
- | (cx ? PSW_CX : 0) | (vx ? PSW_VX : 0));
-}
-
-/* mul dn, dm */
-void OP_F340 (insn, extension)
- unsigned long insn, extension;
-{
- unsigned long temp;
- int n, z;
-
- temp = (SEXT16 (State.regs[REG_D0 + REG0 (insn)] & 0xffff)
- * SEXT16 ((State.regs[REG_D0 + REG1 (insn)] & 0xffff)));
- State.regs[REG_D0 + REG0 (insn)] = temp & 0xffffff;
- State.regs[REG_MDR] = temp >> 16;
- z = (State.regs[REG_D0 + REG0 (insn)] & 0xffff) == 0;
- n = (State.regs[REG_D0 + REG0 (insn)] & 0x8000) != 0;
- PSW &= ~(PSW_ZF | PSW_NF | PSW_VF);
- PSW |= ((z ? PSW_ZF : 0) | (n ? PSW_NF : 0));
-}
-
-/* mulu dn, dm */
-void OP_F350 (insn, extension)
- unsigned long insn, extension;
-{
- unsigned long temp;
- int n, z;
-
- temp = ((State.regs[REG_D0 + REG0 (insn)] & 0xffff)
- * (State.regs[REG_D0 + REG1 (insn)] & 0xffff));
- State.regs[REG_D0 + REG0 (insn)] = temp & 0xffffff;
- State.regs[REG_MDR] = temp >> 16;
- z = (State.regs[REG_D0 + REG0 (insn)] & 0xffff) == 0;
- n = (State.regs[REG_D0 + REG0 (insn)] & 0x8000) != 0;
- PSW &= ~(PSW_ZF | PSW_NF | PSW_VF);
- PSW |= ((z ? PSW_ZF : 0) | (n ? PSW_NF : 0));
-}
-
-
-/* divu dm, dn */
-void OP_F360 (insn, extension)
- unsigned long insn, extension;
-{
- unsigned long temp;
- int n, z;
-
- temp = State.regs[REG_MDR];
- temp &= 0xffff;
- temp <<= 16;
- temp |= (State.regs[REG_D0 + REG0 (insn)] & 0xffff);
- State.regs[REG_MDR] = (temp
- % (unsigned long)(State.regs[REG_D0 + REG1 (insn)] & 0xffff));
- temp /= (unsigned long)(State.regs[REG_D0 + REG1 (insn)] & 0xffff);
- State.regs[REG_D0 + REG0 (insn)] = temp & 0xffff;
- z = (State.regs[REG_D0 + REG0 (insn)] & 0xffff) == 0;
- n = (State.regs[REG_D0 + REG0 (insn)] & 0x8000) != 0;
- PSW &= ~(PSW_ZF | PSW_NF | PSW_CF | PSW_VF);
- PSW |= ((z ? PSW_ZF : 0) | (n ? PSW_NF : 0));
-}
-
-/* cmp imm8, dn */
-void OP_D800 (insn, extension)
- unsigned long insn, extension;
-{
- int z, c, n, v, zx, cx, nx, vx;
- unsigned long reg1, imm, value;
-
- reg1 = TRUNC (State.regs[REG_D0 + REG0_8 (insn)]);
- imm = TRUNC (SEXT8 (insn & 0xff));
- value = TRUNC (reg1 - imm);
-
- z = ((value & 0xffff) == 0);
- zx = (value == 0);
- n = (value & 0x8000);
- nx = (value & 0x800000);
- c = ((reg1 & 0xffff) < (imm & 0xffff));
- cx = (reg1 < imm);
- v = ((reg1 & 0x8000) != (imm & 0x8000)
- && (reg1 & 0x8000) != (value & 0x8000));
- vx = ((reg1 & 0x800000) != (imm & 0x800000)
- && (reg1 & 0x800000) != (value & 0x800000));
-
- PSW &= ~(PSW_ZF | PSW_NF | PSW_CF | PSW_VF
- | PSW_ZX | PSW_NX | PSW_CX | PSW_VX);
- PSW |= ((z ? PSW_ZF : 0) | (n ? PSW_NF : 0)
- | (c ? PSW_CF : 0) | (v ? PSW_VF : 0)
- | (zx ? PSW_ZX : 0) | (nx ? PSW_NX : 0)
- | (cx ? PSW_CX : 0) | (vx ? PSW_VX : 0));
-}
-
-/* cmp dn, dm */
-void OP_F390 (insn, extension)
- unsigned long insn, extension;
-{
- int z, c, n, v, zx, cx, nx, vx;
- unsigned long reg1, reg2, value;
-
- reg1 = TRUNC (State.regs[REG_D0 + REG1 (insn)]);
- reg2 = TRUNC (State.regs[REG_D0 + REG0 (insn)]);
- value = TRUNC (reg2 - reg1);
-
- z = ((value & 0xffff) == 0);
- zx = (value == 0);
- n = (value & 0x8000);
- nx = (value & 0x800000);
- c = ((reg1 & 0xffff) > (reg2 & 0xffff));
- cx = (reg1 > reg2);
- v = ((reg2 & 0x8000) != (reg1 & 0x8000)
- && (reg2 & 0x8000) != (value & 0x8000));
- vx = ((reg2 & 0x800000) != (reg1 & 0x800000)
- && (reg2 & 0x800000) != (value & 0x800000));
-
- PSW &= ~(PSW_ZF | PSW_NF | PSW_CF | PSW_VF
- | PSW_ZX | PSW_NX | PSW_CX | PSW_VX);
- PSW |= ((z ? PSW_ZF : 0) | (n ? PSW_NF : 0)
- | (c ? PSW_CF : 0) | (v ? PSW_VF : 0)
- | (zx ? PSW_ZX : 0) | (nx ? PSW_NX : 0)
- | (cx ? PSW_CX : 0) | (vx ? PSW_VX : 0));
-
- PSW &= ~(PSW_ZF | PSW_NF | PSW_CF | PSW_VF);
- PSW |= ((z ? PSW_ZF : 0) | ( n ? PSW_NF : 0)
- | (c ? PSW_CF : 0) | (v ? PSW_VF : 0));
-}
-
-/* cmp dm, an */
-void OP_F220 (insn, extension)
- unsigned long insn, extension;
-{
- int z, c, n, v, zx, cx, nx, vx;
- unsigned long reg1, reg2, value;
-
- reg1 = TRUNC (State.regs[REG_D0 + REG1 (insn)]);
- reg2 = TRUNC (State.regs[REG_A0 + REG0 (insn)]);
- value = TRUNC (reg2 - reg1);
-
- z = ((value & 0xffff) == 0);
- zx = (value == 0);
- n = (value & 0x8000);
- nx = (value & 0x800000);
- c = ((reg1 & 0xffff) > (reg2 & 0xffff));
- cx = (reg1 > reg2);
- v = ((reg2 & 0x8000) != (reg1 & 0x8000)
- && (reg2 & 0x8000) != (value & 0x8000));
- vx = ((reg2 & 0x800000) != (reg1 & 0x800000)
- && (reg2 & 0x800000) != (value & 0x800000));
-
- PSW &= ~(PSW_ZF | PSW_NF | PSW_CF | PSW_VF
- | PSW_ZX | PSW_NX | PSW_CX | PSW_VX);
- PSW |= ((z ? PSW_ZF : 0) | (n ? PSW_NF : 0)
- | (c ? PSW_CF : 0) | (v ? PSW_VF : 0)
- | (zx ? PSW_ZX : 0) | (nx ? PSW_NX : 0)
- | (cx ? PSW_CX : 0) | (vx ? PSW_VX : 0));
-
- PSW &= ~(PSW_ZF | PSW_NF | PSW_CF | PSW_VF);
- PSW |= ((z ? PSW_ZF : 0) | ( n ? PSW_NF : 0)
- | (c ? PSW_CF : 0) | (v ? PSW_VF : 0));
-}
-
-/* cmp an, dm */
-void OP_F2E0 (insn, extension)
- unsigned long insn, extension;
-{
- int z, c, n, v, zx, cx, nx, vx;
- unsigned long reg1, reg2, value;
-
- reg1 = TRUNC (State.regs[REG_A0 + REG1 (insn)]);
- reg2 = TRUNC (State.regs[REG_D0 + REG0 (insn)]);
- value = TRUNC (reg2 - reg1);
-
- z = ((value & 0xffff) == 0);
- zx = (value == 0);
- n = (value & 0x8000);
- nx = (value & 0x800000);
- c = ((reg1 & 0xffff) > (reg2 & 0xffff));
- cx = (reg1 > reg2);
- v = ((reg2 & 0x8000) != (reg1 & 0x8000)
- && (reg2 & 0x8000) != (value & 0x8000));
- vx = ((reg2 & 0x800000) != (reg1 & 0x800000)
- && (reg2 & 0x800000) != (value & 0x800000));
-
- PSW &= ~(PSW_ZF | PSW_NF | PSW_CF | PSW_VF
- | PSW_ZX | PSW_NX | PSW_CX | PSW_VX);
- PSW |= ((z ? PSW_ZF : 0) | (n ? PSW_NF : 0)
- | (c ? PSW_CF : 0) | (v ? PSW_VF : 0)
- | (zx ? PSW_ZX : 0) | (nx ? PSW_NX : 0)
- | (cx ? PSW_CX : 0) | (vx ? PSW_VX : 0));
-
- PSW &= ~(PSW_ZF | PSW_NF | PSW_CF | PSW_VF);
- PSW |= ((z ? PSW_ZF : 0) | ( n ? PSW_NF : 0)
- | (c ? PSW_CF : 0) | (v ? PSW_VF : 0));
-}
-
-/* cmp an, am */
-void OP_F260 (insn, extension)
- unsigned long insn, extension;
-{
- int z, c, n, v, zx, cx, nx, vx;
- unsigned long reg1, reg2, value;
-
- reg1 = TRUNC (State.regs[REG_A0 + REG1 (insn)]);
- reg2 = TRUNC (State.regs[REG_A0 + REG0 (insn)]);
- value = TRUNC (reg2 - reg1);
-
- z = ((value & 0xffff) == 0);
- zx = (value == 0);
- n = (value & 0x8000);
- nx = (value & 0x800000);
- c = ((reg1 & 0xffff) > (reg2 & 0xffff));
- cx = (reg1 > reg2);
- v = ((reg2 & 0x8000) != (reg1 & 0x8000)
- && (reg2 & 0x8000) != (value & 0x8000));
- vx = ((reg2 & 0x800000) != (reg1 & 0x800000)
- && (reg2 & 0x800000) != (value & 0x800000));
-
- PSW &= ~(PSW_ZF | PSW_NF | PSW_CF | PSW_VF
- | PSW_ZX | PSW_NX | PSW_CX | PSW_VX);
- PSW |= ((z ? PSW_ZF : 0) | (n ? PSW_NF : 0)
- | (c ? PSW_CF : 0) | (v ? PSW_VF : 0)
- | (zx ? PSW_ZX : 0) | (nx ? PSW_NX : 0)
- | (cx ? PSW_CX : 0) | (vx ? PSW_VX : 0));
-
- PSW &= ~(PSW_ZF | PSW_NF | PSW_CF | PSW_VF);
- PSW |= ((z ? PSW_ZF : 0) | ( n ? PSW_NF : 0)
- | (c ? PSW_CF : 0) | (v ? PSW_VF : 0));
-}
-
-/* cmp imm16, dn */
-void OP_F7480000 (insn, extension)
- unsigned long insn, extension;
-{
- int z, c, n, v, zx, cx, nx, vx;
- unsigned long reg1, imm, value;
-
- reg1 = TRUNC (State.regs[REG_D0 + REG0_16 (insn)]);
- imm = TRUNC (SEXT16 (insn & 0xffff));
- value = TRUNC (reg1 - imm);
-
- z = ((value & 0xffff) == 0);
- zx = (value == 0);
- n = (value & 0x8000);
- nx = (value & 0x800000);
- c = ((reg1 & 0xffff) < (imm & 0xffff));
- cx = (reg1 < imm);
- v = ((reg1 & 0x8000) != (imm & 0x8000)
- && (reg1 & 0x8000) != (value & 0x8000));
- vx = ((reg1 & 0x800000) != (imm & 0x800000)
- && (reg1 & 0x800000) != (value & 0x800000));
-
- PSW &= ~(PSW_ZF | PSW_NF | PSW_CF | PSW_VF
- | PSW_ZX | PSW_NX | PSW_CX | PSW_VX);
- PSW |= ((z ? PSW_ZF : 0) | (n ? PSW_NF : 0)
- | (c ? PSW_CF : 0) | (v ? PSW_VF : 0)
- | (zx ? PSW_ZX : 0) | (nx ? PSW_NX : 0)
- | (cx ? PSW_CX : 0) | (vx ? PSW_VX : 0));
-
- PSW &= ~(PSW_ZF | PSW_NF | PSW_CF | PSW_VF);
- PSW |= ((z ? PSW_ZF : 0) | ( n ? PSW_NF : 0)
- | (c ? PSW_CF : 0) | (v ? PSW_VF : 0));
-}
-
-/* cmp imm24, dn */
-void OP_F4780000 (insn, extension)
- unsigned long insn, extension;
-{
- int z, c, n, v, zx, cx, nx, vx;
- unsigned long reg1, imm, value;
-
- reg1 = TRUNC (State.regs[REG_D0 + REG0_16 (insn)]);
- imm = TRUNC (((insn & 0xffff) << 8) + extension);
- value = TRUNC (reg1 - imm);
-
- z = ((value & 0xffff) == 0);
- zx = (value == 0);
- n = (value & 0x8000);
- nx = (value & 0x800000);
- c = ((reg1 & 0xffff) < (imm & 0xffff));
- cx = (reg1 < imm);
- v = ((reg1 & 0x8000) != (imm & 0x8000)
- && (reg1 & 0x8000) != (value & 0x8000));
- vx = ((reg1 & 0x800000) != (imm & 0x800000)
- && (reg1 & 0x800000) != (value & 0x800000));
-
- PSW &= ~(PSW_ZF | PSW_NF | PSW_CF | PSW_VF
- | PSW_ZX | PSW_NX | PSW_CX | PSW_VX);
- PSW |= ((z ? PSW_ZF : 0) | (n ? PSW_NF : 0)
- | (c ? PSW_CF : 0) | (v ? PSW_VF : 0)
- | (zx ? PSW_ZX : 0) | (nx ? PSW_NX : 0)
- | (cx ? PSW_CX : 0) | (vx ? PSW_VX : 0));
-
- PSW &= ~(PSW_ZF | PSW_NF | PSW_CF | PSW_VF);
- PSW |= ((z ? PSW_ZF : 0) | ( n ? PSW_NF : 0)
- | (c ? PSW_CF : 0) | (v ? PSW_VF : 0));
-}
-
-/* cmp imm16, an */
-void OP_EC0000 (insn, extension)
- unsigned long insn, extension;
-{
- int z, c, n, v, zx, cx, nx, vx;
- unsigned long reg1, imm, value;
-
- reg1 = TRUNC (State.regs[REG_A0 + REG0_16 (insn)]);
- imm = TRUNC (insn & 0xffff);
- value = TRUNC (reg1 - imm);
-
- z = ((value & 0xffff) == 0);
- zx = (value == 0);
- n = (value & 0x8000);
- nx = (value & 0x800000);
- c = ((reg1 & 0xffff) < (imm & 0xffff));
- cx = (reg1 < imm);
- v = ((reg1 & 0x8000) != (imm & 0x8000)
- && (reg1 & 0x8000) != (value & 0x8000));
- vx = ((reg1 & 0x800000) != (imm & 0x800000)
- && (reg1 & 0x800000) != (value & 0x800000));
-
- PSW &= ~(PSW_ZF | PSW_NF | PSW_CF | PSW_VF
- | PSW_ZX | PSW_NX | PSW_CX | PSW_VX);
- PSW |= ((z ? PSW_ZF : 0) | (n ? PSW_NF : 0)
- | (c ? PSW_CF : 0) | (v ? PSW_VF : 0)
- | (zx ? PSW_ZX : 0) | (nx ? PSW_NX : 0)
- | (cx ? PSW_CX : 0) | (vx ? PSW_VX : 0));
-
- PSW &= ~(PSW_ZF | PSW_NF | PSW_CF | PSW_VF);
- PSW |= ((z ? PSW_ZF : 0) | ( n ? PSW_NF : 0)
- | (c ? PSW_CF : 0) | (v ? PSW_VF : 0));
-}
-
-/* cmp imm24, an */
-void OP_F47C0000 (insn, extension)
- unsigned long insn, extension;
-{
- int z, c, n, v, zx, cx, nx, vx;
- unsigned long reg1, imm, value;
-
- reg1 = TRUNC (State.regs[REG_A0 + REG0_16 (insn)]);
- imm = TRUNC (((insn & 0xffff) << 8) + extension);
- value = TRUNC (reg1 - imm);
-
- z = ((value & 0xffff) == 0);
- zx = (value == 0);
- n = (value & 0x8000);
- nx = (value & 0x800000);
- c = ((reg1 & 0xffff) < (imm & 0xffff));
- cx = (reg1 < imm);
- v = ((reg1 & 0x8000) != (imm & 0x8000)
- && (reg1 & 0x8000) != (value & 0x8000));
- vx = ((reg1 & 0x800000) != (imm & 0x800000)
- && (reg1 & 0x800000) != (value & 0x800000));
-
- PSW &= ~(PSW_ZF | PSW_NF | PSW_CF | PSW_VF
- | PSW_ZX | PSW_NX | PSW_CX | PSW_VX);
- PSW |= ((z ? PSW_ZF : 0) | (n ? PSW_NF : 0)
- | (c ? PSW_CF : 0) | (v ? PSW_VF : 0)
- | (zx ? PSW_ZX : 0) | (nx ? PSW_NX : 0)
- | (cx ? PSW_CX : 0) | (vx ? PSW_VX : 0));
-
- PSW &= ~(PSW_ZF | PSW_NF | PSW_CF | PSW_VF);
- PSW |= ((z ? PSW_ZF : 0) | ( n ? PSW_NF : 0)
- | (c ? PSW_CF : 0) | (v ? PSW_VF : 0));
-}
-
-/* and dn, dm */
-void OP_F300 (insn, extension)
- unsigned long insn, extension;
-{
- int n, z;
- unsigned long temp;
-
- temp = State.regs[REG_D0 + REG0 (insn)] & State.regs[REG_D0 + REG1 (insn)];
- temp &= 0xffff;
- State.regs[REG_D0 + REG0 (insn)] &= ~0xffff;
- State.regs[REG_D0 + REG0 (insn)] |= temp;
- z = (State.regs[REG_D0 + REG0 (insn)] & 0xffff) == 0;
- n = (State.regs[REG_D0 + REG0 (insn)] & 0x8000) != 0;
- PSW &= ~(PSW_ZF | PSW_NF | PSW_CF | PSW_VF);
- PSW |= ((z ? PSW_ZF : 0) | (n ? PSW_NF : 0));
-}
-
-/* and imm8, dn */
-void OP_F50000 (insn, extension)
- unsigned long insn, extension;
-{
- int n, z;
- unsigned long temp;
-
- temp = State.regs[REG_D0 + REG0_8 (insn)] & (insn & 0xff);
- temp &= 0xffff;
- State.regs[REG_D0 + REG0_8 (insn)] &= ~0xffff;
- State.regs[REG_D0 + REG0_8 (insn)] |= temp;
- z = (State.regs[REG_D0 + REG0_8 (insn)] & 0xffff) == 0;
- n = (State.regs[REG_D0 + REG0_8 (insn)] & 0x8000) != 0;
- PSW &= ~(PSW_ZF | PSW_NF | PSW_CF | PSW_VF);
- PSW |= ((z ? PSW_ZF : 0) | (n ? PSW_NF : 0));
-}
-
-/* and imm16, dn */
-void OP_F7000000 (insn, extension)
- unsigned long insn, extension;
-{
- int n, z;
- unsigned long temp;
-
- temp = State.regs[REG_D0 + REG0_16 (insn)] & (insn & 0xffff);
- temp &= 0xffff;
- State.regs[REG_D0 + REG0_16 (insn)] &= ~0xffff;
- State.regs[REG_D0 + REG0_16 (insn)] |= temp;
- z = (State.regs[REG_D0 + REG0_16 (insn)] & 0xffff) == 0;
- n = (State.regs[REG_D0 + REG0_16 (insn)] & 0x8000) != 0;
- PSW &= ~(PSW_ZF | PSW_NF | PSW_CF | PSW_VF);
- PSW |= ((z ? PSW_ZF : 0) | (n ? PSW_NF : 0));
-}
-
-/* and imm16, psw */
-void OP_F7100000 (insn, extension)
- unsigned long insn, extension;
-{
- PSW &= (insn & 0xffff);
-}
-
-/* or dn, dm */
-void OP_F310 (insn, extension)
- unsigned long insn, extension;
-{
- int n, z;
- unsigned long temp;
-
- temp = State.regs[REG_D0 + REG0 (insn)] | State.regs[REG_D0 + REG1 (insn)];
- temp &= 0xffff;
- State.regs[REG_D0 + REG0 (insn)] &= ~0xffff;
- State.regs[REG_D0 + REG0 (insn)] |= temp;
- z = (State.regs[REG_D0 + REG0 (insn)] & 0xffff) == 0;
- n = (State.regs[REG_D0 + REG0 (insn)] & 0x8000) != 0;
- PSW &= ~(PSW_ZF | PSW_NF | PSW_CF | PSW_VF);
- PSW |= ((z ? PSW_ZF : 0) | (n ? PSW_NF : 0));
-}
-
-/* or imm8, dn */
-void OP_F50800 (insn, extension)
- unsigned long insn, extension;
-{
- int n, z;
- unsigned long temp;
-
- temp = State.regs[REG_D0 + REG0_8 (insn)] | (insn & 0xff);
- temp &= 0xffff;
- State.regs[REG_D0 + REG0_8 (insn)] &= ~0xffff;
- State.regs[REG_D0 + REG0_8 (insn)] |= temp;
- z = (State.regs[REG_D0 + REG0_8 (insn)] & 0xffff) == 0;
- n = (State.regs[REG_D0 + REG0_8 (insn)] & 0x8000) != 0;
- PSW &= ~(PSW_ZF | PSW_NF | PSW_CF | PSW_VF);
- PSW |= ((z ? PSW_ZF : 0) | (n ? PSW_NF : 0));
-}
-
-/* or imm16, dn */
-void OP_F7400000 (insn, extension)
- unsigned long insn, extension;
-{
- int n, z;
- unsigned long temp;
-
- temp = State.regs[REG_D0 + REG0_16 (insn)] | (insn & 0xffff);
- temp &= 0xffff;
- State.regs[REG_D0 + REG0_16 (insn)] &= ~0xffff;
- State.regs[REG_D0 + REG0_16 (insn)] |= temp;
- z = (State.regs[REG_D0 + REG0_16 (insn)] & 0xffff) == 0;
- n = (State.regs[REG_D0 + REG0_16 (insn)] & 0x8000) != 0;
- PSW &= ~(PSW_ZF | PSW_NF | PSW_CF | PSW_VF);
- PSW |= ((z ? PSW_ZF : 0) | (n ? PSW_NF : 0));
-}
-
-/* or imm16, psw */
-void OP_F7140000 (insn, extension)
- unsigned long insn, extension;
-{
- PSW |= (insn & 0xffff);
-}
-
-/* xor dn, dm */
-void OP_F320 (insn, extension)
- unsigned long insn, extension;
-{
- int n, z;
- unsigned long temp;
-
- temp = State.regs[REG_D0 + REG0 (insn)] ^ State.regs[REG_D0 + REG1 (insn)];
- temp &= 0xffff;
- State.regs[REG_D0 + REG0 (insn)] &= ~0xffff;
- State.regs[REG_D0 + REG0 (insn)] |= temp;
- z = (State.regs[REG_D0 + REG0 (insn)] & 0xffff) == 0;
- n = (State.regs[REG_D0 + REG0 (insn)] & 0x8000) != 0;
- PSW &= ~(PSW_ZF | PSW_NF | PSW_CF | PSW_VF);
- PSW |= ((z ? PSW_ZF : 0) | (n ? PSW_NF : 0));
-}
-
-/* xor imm16, dn */
-void OP_F74C0000 (insn, extension)
- unsigned long insn, extension;
-{
- int n, z;
- unsigned long temp;
-
- temp = State.regs[REG_D0 + REG0_16 (insn)] ^ (insn & 0xffff);
- temp &= 0xffff;
- State.regs[REG_D0 + REG0_16 (insn)] &= ~0xffff;
- State.regs[REG_D0 + REG0_16 (insn)] |= temp;
- z = (State.regs[REG_D0 + REG0_16 (insn)] & 0xffff) == 0;
- n = (State.regs[REG_D0 + REG0_16 (insn)] & 0x8000) != 0;
- PSW &= ~(PSW_ZF | PSW_NF | PSW_CF | PSW_VF);
- PSW |= ((z ? PSW_ZF : 0) | (n ? PSW_NF : 0));
-}
-
-/* not dn */
-void OP_F3E4 (insn, extension)
- unsigned long insn, extension;
-{
- int n, z;
- unsigned long temp;
-
- temp = ~State.regs[REG_D0 + REG0 (insn)];
- temp &= 0xffff;
- State.regs[REG_D0 + REG0 (insn)] &= ~0xffff;
- State.regs[REG_D0 + REG0 (insn)] |= temp;
- z = (State.regs[REG_D0 + REG0 (insn)] & 0xffff) == 0;
- n = (State.regs[REG_D0 + REG0 (insn)] & 0x8000) != 0;
- PSW &= ~(PSW_ZF | PSW_NF | PSW_CF | PSW_VF);
- PSW |= ((z ? PSW_ZF : 0) | (n ? PSW_NF : 0));
-}
-
-/* asr dn */
-void OP_F338 (insn, extension)
- unsigned long insn, extension;
-{
- long temp;
- int z, n, c, high;
-
- temp = State.regs[REG_D0 + REG0 (insn)] & 0xffff;
- c = temp & 1;
- high = temp & 0x8000;
- temp >>= 1;
- temp |= high;
- temp &= 0xffff;
- State.regs[REG_D0 + REG0 (insn)] &= ~0xffff;
- State.regs[REG_D0 + REG0 (insn)] |= temp;
- z = (State.regs[REG_D0 + REG0 (insn)] & 0xffff) == 0;
- n = (State.regs[REG_D0 + REG0 (insn)] & 0x8000) != 0;
- PSW &= ~(PSW_ZF | PSW_NF | PSW_CF);
- PSW |= ((z ? PSW_ZF : 0) | (n ? PSW_NF : 0) | (c ? PSW_CF : 0));
-}
-
-/* lsr dn */
-void OP_F33C (insn, extension)
- unsigned long insn, extension;
-{
- int z, n, c;
- long temp;
-
- temp = State.regs[REG_D0 + REG0 (insn)] & 0xffff;
- c = temp & 1;
- temp >>= 1;
- temp &= 0xffff;
- State.regs[REG_D0 + REG0 (insn)] &= ~0xffff;
- State.regs[REG_D0 + REG0 (insn)] |= temp;
- z = (State.regs[REG_D0 + REG0 (insn)] & 0xffff) == 0;
- n = (State.regs[REG_D0 + REG0 (insn)] & 0x8000) != 0;
- PSW &= ~(PSW_ZF | PSW_NF | PSW_CF);
- PSW |= ((z ? PSW_ZF : 0) | (n ? PSW_NF : 0) | (c ? PSW_CF : 0));
-}
-
-/* ror dn */
-void OP_F334 (insn, extension)
- unsigned long insn, extension;
-{
- unsigned long value;
- int c,n,z;
-
- value = State.regs[REG_D0 + REG0 (insn)] & 0xffff;
- c = (value & 0x1);
-
- value >>= 1;
- value |= (PSW & PSW_CF ? 0x8000 : 0);
- value &= 0xffff;
- State.regs[REG_D0 + REG0 (insn)] &= ~0xffff;
- State.regs[REG_D0 + REG0 (insn)] |= value;
- z = (value == 0);
- n = (value & 0x8000) != 0;
- PSW &= ~(PSW_ZF | PSW_NF | PSW_CF | PSW_VF);
- PSW |= ((z ? PSW_ZF : 0) | (n ? PSW_NF : 0) | (c ? PSW_CF : 0));
-}
-
-/* rol dn */
-void OP_F330 (insn, extension)
- unsigned long insn, extension;
-{
- unsigned long value;
- int c,n,z;
-
- value = State.regs[REG_D0 + REG0 (insn)] & 0xffff;
- c = (value & 0x8000) ? 1 : 0;
-
- value <<= 1;
- value |= (PSW & PSW_CF ? 0x1 : 0);
- value &= 0xffff;
- State.regs[REG_D0 + REG0 (insn)] &= ~0xffff;
- State.regs[REG_D0 + REG0 (insn)] |= value;
- z = (value == 0);
- n = (value & 0x8000) != 0;
- PSW &= ~(PSW_ZF | PSW_NF | PSW_CF | PSW_VF);
- PSW |= ((z ? PSW_ZF : 0) | (n ? PSW_NF : 0) | (c ? PSW_CF : 0));
-}
-
-/* btst imm8, dn */
-void OP_F50400 (insn, extension)
- unsigned long insn, extension;
-{
- unsigned long temp;
- int z;
-
- temp = State.regs[REG_D0 + REG0_8 (insn)];
- temp &= (insn & 0xff);
- z = (temp == 0);
- PSW &= ~(PSW_ZF | PSW_NF | PSW_CF | PSW_VF);
- PSW |= (z ? PSW_ZF : 0);
-}
-
-/* btst imm16, dn */
-void OP_F7040000 (insn, extension)
- unsigned long insn, extension;
-{
- unsigned long temp;
- int z, n, c;
-
- temp = State.regs[REG_D0 + REG0_16 (insn)];
- c = temp & 0x1;
- temp &= (insn & 0xffff);
- n = (temp & 0x8000) != 0;
- z = (temp == 0);
- PSW &= ~(PSW_ZF | PSW_NF | PSW_CF | PSW_VF);
- PSW |= (z ? PSW_ZF : 0) | (n ? PSW_NF : 0) | (c ? PSW_CF : 0);
-}
-
-/* bset dm, (an) */
-void OP_F020 (insn, extension)
- unsigned long insn, extension;
-{
- unsigned long temp;
- int z;
-
- temp = load_byte (State.regs[REG_A0 + REG1 (insn)]);
- z = (temp & State.regs[REG_D0 + REG0 (insn)]) == 0;
- temp |= State.regs[REG_D0 + REG0 (insn)];
- store_byte (State.regs[REG_A0 + REG1 (insn)], temp);
- PSW &= ~(PSW_ZF | PSW_NF | PSW_CF | PSW_VF);
- PSW |= (z ? PSW_ZF : 0);
-}
-
-/* bclr dm, (an) */
-void OP_F030 (insn, extension)
- unsigned long insn, extension;
-{
- unsigned long temp;
- int z;
-
- temp = load_byte (State.regs[REG_A0 + REG1 (insn)]);
- z = (temp & State.regs[REG_D0 + REG0 (insn)]) == 0;
- temp = temp & ~State.regs[REG_D0 + REG0 (insn)];
- store_byte (State.regs[REG_A0 + REG1 (insn)], temp);
- PSW &= ~(PSW_ZF | PSW_NF | PSW_CF | PSW_VF);
- PSW |= (z ? PSW_ZF : 0);
-}
-
-/* beqx label:8 */
-void OP_F5E800 (insn, extension)
- unsigned long insn, extension;
-{
- /* The dispatching code will add 3 after we return, so
- we subtract two here to make things right. */
- if (PSW & PSW_ZX)
- State.regs[REG_PC] = TRUNC (State.regs[REG_PC] + SEXT8 (insn & 0xff));
-}
-
-/* bnex label:8 */
-void OP_F5E900 (insn, extension)
- unsigned long insn, extension;
-{
- /* The dispatching code will add 3 after we return, so
- we subtract two here to make things right. */
- if (!(PSW & PSW_ZX))
- State.regs[REG_PC] = TRUNC (State.regs[REG_PC] + SEXT8 (insn & 0xff));
-}
-
-/* bgtx label:8 */
-void OP_F5E100 (insn, extension)
- unsigned long insn, extension;
-{
- /* The dispatching code will add 3 after we return, so
- we subtract two here to make things right. */
- if (!((PSW & PSW_ZX)
- || (((PSW & PSW_NX) != 0) ^ ((PSW & PSW_VX) != 0))))
- State.regs[REG_PC] = TRUNC (State.regs[REG_PC] + SEXT8 (insn & 0xff));
-}
-
-/* bgex label:8 */
-void OP_F5E200 (insn, extension)
- unsigned long insn, extension;
-{
- /* The dispatching code will add 3 after we return, so
- we subtract two here to make things right. */
- if (!(((PSW & PSW_NX) != 0) ^ ((PSW & PSW_VX) != 0)))
- State.regs[REG_PC] = TRUNC (State.regs[REG_PC] + SEXT8 (insn & 0xff));
-}
-
-/* blex label:8 */
-void OP_F5E300 (insn, extension)
- unsigned long insn, extension;
-{
- /* The dispatching code will add 3 after we return, so
- we subtract two here to make things right. */
- if ((PSW & PSW_ZX)
- || (((PSW & PSW_NX) != 0) ^ ((PSW & PSW_VX) != 0)))
- State.regs[REG_PC] = TRUNC (State.regs[REG_PC] + SEXT8 (insn & 0xff));
-}
-
-/* bltx label:8 */
-void OP_F5E000 (insn, extension)
- unsigned long insn, extension;
-{
- /* The dispatching code will add 3 after we return, so
- we subtract two here to make things right. */
- if (((PSW & PSW_NX) != 0) ^ ((PSW & PSW_VX) != 0))
- State.regs[REG_PC] = TRUNC (State.regs[REG_PC] + SEXT8 (insn & 0xff));
-}
-
-/* bhix label:8 */
-void OP_F5E500 (insn, extension)
- unsigned long insn, extension;
-{
- /* The dispatching code will add 3 after we return, so
- we subtract two here to make things right. */
- if (!(((PSW & PSW_CX) != 0) || (PSW & PSW_ZX) != 0))
- State.regs[REG_PC] = TRUNC (State.regs[REG_PC] + SEXT8 (insn & 0xff));
-}
-
-/* bccx label:8 */
-void OP_F5E600 (insn, extension)
- unsigned long insn, extension;
-{
- /* The dispatching code will add 3 after we return, so
- we subtract two here to make things right. */
- if (!(PSW & PSW_CX))
- State.regs[REG_PC] = TRUNC (State.regs[REG_PC] + SEXT8 (insn & 0xff));
-}
-
-/* blsx label:8 */
-void OP_F5E700 (insn, extension)
- unsigned long insn, extension;
-{
- /* The dispatching code will add 3 after we return, so
- we subtract two here to make things right. */
- if (((PSW & PSW_CX) != 0) || (PSW & PSW_ZX) != 0)
- State.regs[REG_PC] = TRUNC (State.regs[REG_PC] + SEXT8 (insn & 0xff));
-}
-
-/* bcsx label:8 */
-void OP_F5E400 (insn, extension)
- unsigned long insn, extension;
-{
- /* The dispatching code will add 3 after we return, so
- we subtract two here to make things right. */
- if (PSW & PSW_CX)
- State.regs[REG_PC] = TRUNC (State.regs[REG_PC] + SEXT8 (insn & 0xff));
-}
-
-/* bvcx label:8 */
-void OP_F5EC00 (insn, extension)
- unsigned long insn, extension;
-{
- /* The dispatching code will add 3 after we return, so
- we subtract two here to make things right. */
- if (!(PSW & PSW_VX))
- State.regs[REG_PC] = TRUNC (State.regs[REG_PC] + SEXT8 (insn & 0xff));
-}
-
-/* bvsx label:8 */
-void OP_F5ED00 (insn, extension)
- unsigned long insn, extension;
-{
- /* The dispatching code will add 3 after we return, so
- we subtract two here to make things right. */
- if (PSW & PSW_VX)
- State.regs[REG_PC] = TRUNC (State.regs[REG_PC] + SEXT8 (insn & 0xff));
-}
-
-/* bncx label:8 */
-void OP_F5EE00 (insn, extension)
- unsigned long insn, extension;
-{
- /* The dispatching code will add 3 after we return, so
- we subtract two here to make things right. */
- if (!(PSW & PSW_NX))
- State.regs[REG_PC] = TRUNC (State.regs[REG_PC] + SEXT8 (insn & 0xff));
-}
-
-/* bnsx label:8 */
-void OP_F5EF00 (insn, extension)
- unsigned long insn, extension;
-{
- /* The dispatching code will add 3 after we return, so
- we subtract two here to make things right. */
- if (PSW & PSW_NX)
- State.regs[REG_PC] = TRUNC (State.regs[REG_PC] + SEXT8 (insn & 0xff));
-}
-
-/* beq label:8 */
-void OP_E800 (insn, extension)
- unsigned long insn, extension;
-{
- /* The dispatching code will add 2 after we return, so
- we subtract two here to make things right. */
- if (PSW & PSW_ZF)
- State.regs[REG_PC] = TRUNC (State.regs[REG_PC] + SEXT8 (insn & 0xff));
-}
-
-/* bne label:8 */
-void OP_E900 (insn, extension)
- unsigned long insn, extension;
-{
- /* The dispatching code will add 2 after we return, so
- we subtract two here to make things right. */
- if (!(PSW & PSW_ZF))
- State.regs[REG_PC] = TRUNC (State.regs[REG_PC] + SEXT8 (insn & 0xff));
-}
-
-/* bgt label:8 */
-void OP_E100 (insn, extension)
- unsigned long insn, extension;
-{
- /* The dispatching code will add 2 after we return, so
- we subtract two here to make things right. */
- if (!((PSW & PSW_ZF)
- || (((PSW & PSW_NF) != 0) ^ ((PSW & PSW_VF) != 0))))
- State.regs[REG_PC] = TRUNC (State.regs[REG_PC] + SEXT8 (insn & 0xff));
-}
-
-/* bge label:8 */
-void OP_E200 (insn, extension)
- unsigned long insn, extension;
-{
- /* The dispatching code will add 2 after we return, so
- we subtract two here to make things right. */
- if (!(((PSW & PSW_NF) != 0) ^ ((PSW & PSW_VF) != 0)))
- State.regs[REG_PC] = TRUNC (State.regs[REG_PC] + SEXT8 (insn & 0xff));
-}
-
-/* ble label:8 */
-void OP_E300 (insn, extension)
- unsigned long insn, extension;
-{
- /* The dispatching code will add 2 after we return, so
- we subtract two here to make things right. */
- if ((PSW & PSW_ZF)
- || (((PSW & PSW_NF) != 0) ^ ((PSW & PSW_VF) != 0)))
- State.regs[REG_PC] = TRUNC (State.regs[REG_PC] + SEXT8 (insn & 0xff));
-}
-
-/* blt label:8 */
-void OP_E000 (insn, extension)
- unsigned long insn, extension;
-{
- /* The dispatching code will add 2 after we return, so
- we subtract two here to make things right. */
- if (((PSW & PSW_NF) != 0) ^ ((PSW & PSW_VF) != 0))
- State.regs[REG_PC] = TRUNC (State.regs[REG_PC] + SEXT8 (insn & 0xff));
-}
-
-/* bhi label:8 */
-void OP_E500 (insn, extension)
- unsigned long insn, extension;
-{
- /* The dispatching code will add 2 after we return, so
- we subtract two here to make things right. */
- if (!(((PSW & PSW_CF) != 0) || (PSW & PSW_ZF) != 0))
- State.regs[REG_PC] = TRUNC (State.regs[REG_PC] + SEXT8 (insn & 0xff));
-}
-
-/* bcc label:8 */
-void OP_E600 (insn, extension)
- unsigned long insn, extension;
-{
- /* The dispatching code will add 2 after we return, so
- we subtract two here to make things right. */
- if (!(PSW & PSW_CF))
- State.regs[REG_PC] = TRUNC (State.regs[REG_PC] + SEXT8 (insn & 0xff));
-}
-
-/* bls label:8 */
-void OP_E700 (insn, extension)
- unsigned long insn, extension;
-{
- /* The dispatching code will add 2 after we return, so
- we subtract two here to make things right. */
- if (((PSW & PSW_CF) != 0) || (PSW & PSW_ZF) != 0)
- State.regs[REG_PC] = TRUNC (State.regs[REG_PC] + SEXT8 (insn & 0xff));
-}
-
-/* bcs label:8 */
-void OP_E400 (insn, extension)
- unsigned long insn, extension;
-{
- /* The dispatching code will add 2 after we return, so
- we subtract two here to make things right. */
- if (PSW & PSW_CF)
- State.regs[REG_PC] = TRUNC (State.regs[REG_PC] + SEXT8 (insn & 0xff));
-}
-
-/* bvc label:8 */
-void OP_F5FC00 (insn, extension)
- unsigned long insn, extension;
-{
- /* The dispatching code will add 3 after we return, so
- we subtract two here to make things right. */
- if (!(PSW & PSW_VF))
- State.regs[REG_PC] = TRUNC (State.regs[REG_PC] + SEXT8 (insn & 0xff));
-}
-
-/* bvs label:8 */
-void OP_F5FD00 (insn, extension)
- unsigned long insn, extension;
-{
- /* The dispatching code will add 3 after we return, so
- we subtract two here to make things right. */
- if (PSW & PSW_VF)
- State.regs[REG_PC] = TRUNC (State.regs[REG_PC] + SEXT8 (insn & 0xff));
-}
-
-/* bnc label:8 */
-void OP_F5FE00 (insn, extension)
- unsigned long insn, extension;
-{
- /* The dispatching code will add 3 after we return, so
- we subtract two here to make things right. */
- if (!(PSW & PSW_NF))
- State.regs[REG_PC] = TRUNC (State.regs[REG_PC] + SEXT8 (insn & 0xff));
-}
-
-/* bns label:8 */
-void OP_F5FF00 (insn, extension)
- unsigned long insn, extension;
-{
- /* The dispatching code will add 3 after we return, so
- we subtract two here to make things right. */
- if (PSW & PSW_NF)
- State.regs[REG_PC] = TRUNC (State.regs[REG_PC] + SEXT8 (insn & 0xff));
-}
-
-/* bra label:8 */
-void OP_EA00 (insn, extension)
- unsigned long insn, extension;
-{
- /* The dispatching code will add 2 after we return, so
- we subtract two here to make things right. */
- State.regs[REG_PC] = TRUNC (State.regs[REG_PC] + SEXT8 (insn & 0xff));
-}
-
-/* jmp (an) */
-void OP_F000 (insn, extension)
- unsigned long insn, extension;
-{
- State.regs[REG_PC] = TRUNC (State.regs[REG_A0 + REG1 (insn)] - 2);
-}
-
-/* jmp label:16 */
-void OP_FC0000 (insn, extension)
- unsigned long insn, extension;
-{
- State.regs[REG_PC] = TRUNC (State.regs[REG_PC] + SEXT16 (insn & 0xffff));
-}
-
-/* jmp label:24 */
-void OP_F4E00000 (insn, extension)
- unsigned long insn, extension;
-{
- State.regs[REG_PC]
- = TRUNC (State.regs[REG_PC] + (((insn & 0xffff) << 8) + extension));
-}
-
-/* jsr (an) */
-void OP_F001 (insn, extension)
- unsigned long insn, extension;
-{
- unsigned int next_pc, sp;
-
- sp = State.regs[REG_SP];
- sp -= 4;
- State.regs[REG_SP] = sp;
- next_pc = State.regs[REG_PC] + 2;
- State.mem[sp] = next_pc & 0xff;
- State.mem[sp+1] = (next_pc & 0xff00) >> 8;
- State.mem[sp+2] = (next_pc & 0xff0000) >> 16;
- State.regs[REG_PC] = TRUNC (State.regs[REG_A0 + REG1 (insn)] - 2);
-}
-
-/* jsr label:16 */
-void OP_FD0000 (insn, extension)
- unsigned long insn, extension;
-{
- unsigned int next_pc, sp;
-
- sp = State.regs[REG_SP];
- sp -= 4;
- State.regs[REG_SP] = sp;
- next_pc = State.regs[REG_PC] + 3;
- State.mem[sp] = next_pc & 0xff;
- State.mem[sp+1] = (next_pc & 0xff00) >> 8;
- State.mem[sp+2] = (next_pc & 0xff0000) >> 16;
- State.regs[REG_PC] = TRUNC (State.regs[REG_PC] + SEXT16 (insn & 0xffff));
-}
-
-/* jsr label:24 */
-void OP_F4E10000 (insn, extension)
- unsigned long insn, extension;
-{
- unsigned int next_pc, sp;
-
- sp = State.regs[REG_SP];
- sp -= 4;
- State.regs[REG_SP] = sp;
- next_pc = State.regs[REG_PC] + 5;
- State.mem[sp] = next_pc & 0xff;
- State.mem[sp+1] = (next_pc & 0xff00) >> 8;
- State.mem[sp+2] = (next_pc & 0xff0000) >> 16;
- State.regs[REG_PC]
- = TRUNC (State.regs[REG_PC] + (((insn & 0xffff) << 8) + extension));
-}
-
-/* rts */
-void OP_FE (insn, extension)
- unsigned long insn, extension;
-{
- unsigned int sp;
-
- sp = State.regs[REG_SP];
- State.regs[REG_PC] = (State.mem[sp] | (State.mem[sp+1] << 8)
- | (State.mem[sp+2] << 16));
- State.regs[REG_PC] -= 1;
- State.regs[REG_SP] += 4;
-}
-
-/* rti */
-void OP_EB (insn, extension)
- unsigned long insn, extension;
-{
- PSW = load_half (State.regs[REG_A0 + 3]);
- State.regs[REG_PC] = load_3_byte (State.regs[REG_A0 + 3] + 2) - 1;
- State.regs[REG_A0 + 3] += 6;
-}
-
-/* syscall */
-void OP_F010 (insn, extension)
- unsigned long insn, extension;
-{
- /* We use this for simulated system calls; we may need to change
- it to a reserved instruction if we conflict with uses at
- Matsushita. */
- int save_errno = errno;
- int offset = 6;
- errno = 0;
-
-/* Registers passed to syscall 0 */
-
-/* Function number. */
-#define FUNC (State.regs[0])
-
-#define PARM1 (State.regs[1])
-
-/* Parameters. */
-#define PARM(x, y) (load_mem (State.regs[REG_SP] + x, y))
-
-/* Registers set by syscall 0 */
-
-#define RETVAL State.regs[0] /* return value */
-#define RETERR State.regs[1] /* return error code */
-
-/* Turn a pointer in a register into a pointer into real memory. */
-
-#define MEMPTR(x) (State.mem + (x & 0xffffff))
-
- switch (FUNC)
- {
-#if !defined(__GO32__) && !defined(_WIN32)
-#ifdef TARGET_SYS_fork
- case TARGET_SYS_fork:
- RETVAL = fork ();
- break;
-#endif
-#ifdef TARGET_SYS_execve
- case TARGET_SYS_execve:
- RETVAL = execve (MEMPTR (PARM1), (char **) MEMPTR (PARM (4, 4)),
- (char **)MEMPTR (PARM (8, 4)));
- break;
-#endif
-#ifdef TARGET_SYS_execv
- case TARGET_SYS_execv:
- RETVAL = execve (MEMPTR (PARM1), (char **) MEMPTR (PARM (4, 4)), NULL);
- break;
-#endif
-#endif
-
- case TARGET_SYS_read:
- RETVAL = mn10200_callback->read (mn10200_callback, PARM1,
- MEMPTR (PARM (4, 4)), PARM (8, 4));
- break;
- case TARGET_SYS_write:
- RETVAL = (int)mn10200_callback->write (mn10200_callback, PARM1,
- MEMPTR (PARM (4, 4)),
- PARM (8, 4));
- break;
- case TARGET_SYS_lseek:
- RETVAL = mn10200_callback->lseek (mn10200_callback, PARM1,
- PARM (4, 4), PARM (8, 2));
- break;
- case TARGET_SYS_close:
- RETVAL = mn10200_callback->close (mn10200_callback, PARM1);
- break;
- case TARGET_SYS_open:
- RETVAL = mn10200_callback->open (mn10200_callback, MEMPTR (PARM1),
- PARM (4, 2));
- break;
- case TARGET_SYS_exit:
- /* EXIT - caller can look in PARM1 to work out the
- reason */
- if (PARM1 == 0xdead)
- State.exception = SIGABRT;
- else
- State.exception = SIGQUIT;
- State.exited = 1;
- break;
-
- case TARGET_SYS_stat: /* added at hmsi */
- /* stat system call */
- {
- struct stat host_stat;
- reg_t buf;
-
- RETVAL = stat (MEMPTR (PARM1), &host_stat);
-
- buf = PARM (4, 4);
-
- /* Just wild-assed guesses. */
- store_half (buf, host_stat.st_dev);
- store_half (buf + 2, host_stat.st_ino);
- store_word (buf + 4, host_stat.st_mode);
- store_half (buf + 8, host_stat.st_nlink);
- store_half (buf + 10, host_stat.st_uid);
- store_half (buf + 12, host_stat.st_gid);
- store_half (buf + 14, host_stat.st_rdev);
- store_word (buf + 16, host_stat.st_size);
- store_word (buf + 20, host_stat.st_atime);
- store_word (buf + 28, host_stat.st_mtime);
- store_word (buf + 36, host_stat.st_ctime);
- }
- break;
-
-#ifdef TARGET_SYS_chown
- case TARGET_SYS_chown:
- RETVAL = chown (MEMPTR (PARM1), PARM (4, 2), PARM (6, 2));
- break;
-#endif
- case TARGET_SYS_chmod:
- RETVAL = chmod (MEMPTR (PARM1), PARM (4, 2));
- break;
-#ifdef TARGET_SYS_time
- case TARGET_SYS_time:
- RETVAL = time ((time_t *)MEMPTR (PARM1));
- break;
-#endif
-#ifdef TARGET_SYS_times
- case TARGET_SYS_times:
- {
- struct tms tms;
- RETVAL = times (&tms);
- store_word (PARM1, tms.tms_utime);
- store_word (PARM1 + 4, tms.tms_stime);
- store_word (PARM1 + 8, tms.tms_cutime);
- store_word (PARM1 + 12, tms.tms_cstime);
- break;
- }
-#endif
-#ifdef TARGET_SYS_gettimeofday
- case TARGET_SYS_gettimeofday:
- {
- struct timeval t;
- struct timezone tz;
- RETVAL = gettimeofday (&t, &tz);
- store_word (PARM1, t.tv_sec);
- store_word (PARM1 + 4, t.tv_usec);
- store_word (PARM (4, 4), tz.tz_minuteswest);
- store_word (PARM (4, 4) + 4, tz.tz_dsttime);
- break;
- }
-#endif
-#ifdef TARGET_SYS_utime
- case TARGET_SYS_utime:
- /* Cast the second argument to void *, to avoid type mismatch
- if a prototype is present. */
- RETVAL = utime (MEMPTR (PARM1), (void *) MEMPTR (PARM (4, 4)));
- break;
-#endif
- default:
- abort ();
- }
- RETERR = errno;
- errno = save_errno;
-}
-
-/* nop */
-void OP_F6 (insn, extension)
- unsigned long insn, extension;
-{
-}
-
-/* breakpoint */
-void
-OP_FF (insn, extension)
- unsigned long insn, extension;
-{
- State.exception = SIGTRAP;
- PC -= 1;
-}
diff --git a/sim/mn10300/ChangeLog b/sim/mn10300/ChangeLog
deleted file mode 100644
index 59f45155012..00000000000
--- a/sim/mn10300/ChangeLog
+++ /dev/null
@@ -1,978 +0,0 @@
-2001-05-06 Jim Blandy <jimb@redhat.com>
-
- * mn10300.igen: Doc fixes.
-
-2001-04-26 Alexandre Oliva <aoliva@redhat.com>
-
- * Makefile.in (idecode.o, op_utils.o, semantics.o, simops.o):
- Depend on targ-vals.h.
-
-2001-04-15 J.T. Conklin <jtc@redback.com>
-
- * Makefile.in (simops.o): Add simops.h to dependency list.
-
-Wed Aug 9 02:24:53 2000 Graham Stott <grahams@cygnus.co.uk>
-
- * am33.igen: Warning clean-up.
- (movm): Initialize PC and mask.
- (mov, movbu, movhu): Set srcreg2 from RI0.
- (bsch): Initialize c.
- (sat16_cmp): Actually do the comparison.
- (mov_llt): Do not overwrite dstreg with uninitialized variable.
-
-Tue May 23 21:39:23 2000 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-2000-05-22 Alexandre Oliva <aoliva@cygnus.com>
-
- * am33.igen: Fix leading comments of SP-relative offset insns that
- referred to other registers. Make their offsets unsigned.
-
-2000-05-18 Alexandre Oliva <aoliva@cygnus.com>
-
- * mn10300_sim.h (genericAdd, genericSub, genericCmp, genericOr,
- genericXor, genericBtst): Use `unsigned32'.
- * op_utils.c: Likewise.
- * mn10300.igen, am33.igen: Use `unsigned32', `signed32',
- `unsigned64' or `signed64' where type width is relevant.
-
-2000-04-25 Alexandre Oliva <aoliva@cygnus.com>
-
- * am33.igen (inc4 Rn): Use genericAdd so as to modify flags.
-
-2000-04-09 Alexandre Oliva <aoliva@cygnus.com>
-
- * am33.igen: Make SP-relative offsets unsigned. Add `*am33' for
- some instructions that were missing it.
-
-2000-03-03 Alexandre Oliva <oliva@lsd.ic.unicamp.br>
-
- * Makefile.in (IGEN_INSN): Added am33.igen.
-
-Thu Sep 2 18:15:53 1999 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Tue Jul 13 13:26:20 1999 Andrew Cagney <cagney@b1.cygnus.com>
-
- * interp.c: Clarify error message reporting an unknown board.
-
-1999-05-08 Felix Lee <flee@cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-1999-04-16 Frank Ch. Eigler <fche@cygnus.com>
-
- * interp.c (program_interrupt): Detect undesired recursion using
- static flag. Set NMIRC register's SYSEF flag during
- --board=stdeval1 mode.
- * dv-mn103-int.c (write_icr): Add backdoor address to allow CPU to
- set SYSEF flag.
-
-1999-04-02 Keith Seitz <keiths@cygnus.com>
-
- * Makefile.in (SIM_EXTRA_CFLAGS): Define a POLL_QUIT_INTERVAL
- for use in the simulator so that the poll_quit callback is
- not called too often.
-
-Tue Mar 9 21:26:41 1999 Andrew Cagney <cagney@b1.cygnus.com>
-
- * dv-mn103int.c (mn103int_ioctl): Return something.
- * dv-mn103tim.c (write_tm6md): GCC suggested parentheses around &&
- within ||.
-
-Tue Feb 16 23:57:17 1999 Jeffrey A Law (law@cygnus.com)
-
- * mn10300.igen (retf): Fix return address computation and store
- the new pc value into nia.
-
-1998-12-29 Frank Ch. Eigler <fche@cygnus.com>
-
- * Makefile.in (WITH_COMMON_OBJS): Build also dv-sockser.o.
- * interp.c (sim_open): Add stub mn103002 cache control memory regions.
- Set OPERATING_ENVIRONMENT on "stdeval1" board.
- (mn10300_core_signal): New function to intercept memory errors.
- (program_interrupt): New function to dispatch to exception vector
- (mn10300_exception_*): New functions to snapshot pre/post exception
- state.
- * sim-main.h (SIM_CORE_SIGNAL): Define hook - call mn10300_core_signal.
- (SIM_ENGINE_HALT_HOOK): Do nothing.
- (SIM_CPU_EXCEPTION*): Define hooks to call mn10300_cpu_exception*().
- (_sim_cpu): Add exc_* fields to store register value snapshots.
- * dv-mn103ser.c (*): Support dv-sockser backend for UART I/O.
- Various endianness and warning fixes.
- * mn10300.igen (illegal): Call program_interrupt on error.
- (break): Call program_interrupt on breakpoint
-
- Several changes from <janczyn@cygnus.com> and <cagney@cygnus.com>
- merged in:
- * dv-mn103int.c (mn103int_ioctl): New function for NMI
- generation. (mn103int_finish): Install it as ioctl handler.
- * dv-mn103tim.c: Support timer 6 specially. Endianness fixes.
-
-Wed Oct 14 12:11:05 1998 Jeffrey A Law (law@cygnus.com)
-
- * am33.igen: Allow autoincrement stores using the same register
- for source and destination operands.
-
-Mon Aug 31 10:19:55 1998 Jeffrey A Law (law@cygnus.com)
-
- * am33.igen: Reverse HI/LO outputs of 4 operand "mul" and "mulu".
-
-Fri Aug 28 14:40:49 1998 Joyce Janczyn <janczyn@cygnus.com>
-
- * interp.c (sim_open): Check for invalid --board option, fix
- indentation, allocate memory for mem control and DMA regs.
-
-Wed Aug 26 09:29:38 1998 Joyce Janczyn <janczyn@cygnus.com>
-
- * mn10300.igen (div,divu): Fix divide instructions so divide by 0
- behaves like the hardware.
-
-Mon Aug 24 11:50:09 1998 Joyce Janczyn <janczyn@cygnus.com>
-
- * sim-main.h (SIM_HANDLES_LMA): Define SIM_HANDLES_LMA.
-
-Wed Aug 12 12:36:07 1998 Jeffrey A Law (law@cygnus.com)
-
- * am33.igen: Handle case where first DSP operation modifies a
- register used in the second DSP operation correctly.
-
-Tue Jul 28 10:10:25 1998 Jeffrey A Law (law@cygnus.com)
-
- * am33.igen: Detect cases where two operands must not match for
- DSP instructions too.
-
-Mon Jul 27 12:04:17 1998 Jeffrey A Law (law@cygnus.com)
-
- * am33.igen: Detect cases where two operands must not match in
- non-DSP instructions.
-
-Fri Jul 24 18:15:21 1998 Joyce Janczyn <janczyn@cygnus.com>
-
- * op_utils.c (do_syscall): Rewrite to use common/syscall.c.
- (syscall_read_mem, syscall_write_mem): New functions for syscall
- callbacks.
- * mn10300_sim.h: Add prototypes for syscall_read_mem and
- syscall_write_mem.
- * mn10300.igen: Change C++ style comments to C style comments.
- Check for divide by zero in div and divu ops.
-
-Fri Jul 24 12:49:28 1998 Jeffrey A Law (law@cygnus.com)
-
- * am33.igen (translate_xreg): New function. Use it as needed.
-
-Thu Jul 23 10:05:28 1998 Jeffrey A Law (law@cygnus.com)
-
- * am33.igen: Add some missing instructions.
-
- * am33.igen: Autoincrement loads/store fixes.
-
-Tue Jul 21 09:48:14 1998 Jeffrey A Law (law@cygnus.com)
-
- * am33.igen: Add mov_lCC DSP instructions.
-
- * am33.igen: Add most am33 DSP instructions.
-
-Thu Jul 9 10:06:55 1998 Jeffrey A Law (law@cygnus.com)
-
- * mn10300.igen: Fix Z bit for addc and subc instructions.
- Minor fixes in multiply/divide patterns.
-
- * am33.igen: Add missing mul[u] imm32,Rn. Fix condition code
- handling for many instructions. Fix sign extension for some
- 24bit immediates.
-
- * am33.igen: Fix Z bit for remaining addc/subc instructions.
- Do not sign extend immediate for mov imm,XRn.
- More random mul, mac & div fixes.
- Remove some unused variables.
- Sign extend 24bit displacement in memory addresses.
-
- * am33.igen: Fix Z bit for addc Rm,Rn and subc Rm,Rn. Various
- fixes to 2 register multiply, divide and mac instructions. Set
- Z,N correctly for sat16. Sign extend 24 bit immediate for add,
- and sub instructions.
-
- * am33.igen: Add remaining non-DSP instructions.
-
-Wed Jul 8 16:29:12 1998 Jeffrey A Law (law@cygnus.com)
-
- * am33.igen (translate_rreg): New function. Use it as appropriate.
-
- * am33.igen: More am33 instructions. Fix "div".
-
-Mon Jul 6 15:39:22 1998 Jeffrey A Law (law@cygnus.com)
-
- * mn10300.igen: Add am33 support.
-
- * Makefile.in: Use multi-sim to support both a mn10300 and am33
- simulator.
-
- * am33.igen: Add many more am33 instructions.
-
-Wed Jul 1 17:07:09 1998 Jeffrey A Law (law@cygnus.com)
-
- * mn10300_sim.h (FETCH24): Define.
-
- * mn10300_sim.h: Add defines for some registers found on the AM33.
- * am33.igen: New file with some am33 support.
-
-Tue Jun 30 11:23:20 1998 Jeffrey A Law (law@cygnus.com)
-
- * mn10300_sim.h: Include bfd.h
- (struct state): Add more room for processor specific registers.
- (REG_E0): Define.
-
-Thu Jun 25 10:12:03 1998 Joyce Janczyn <janczyn@cygnus.com>
-
- * dv-mn103tim.c: Include sim-assert.h
- * dv-mn103ser.c (do_polling_event): Check for incoming data on
- serial line and schedule next polling event.
- (read_status_reg): schedule events to check for incoming data on
- serial line and issue interrupt if necessary.
-
-Fri Jun 19 16:47:27 1998 Joyce Janczyn <janczyn@cygnus.com>
-
- * interp.c (sim_open): hook up serial 1 and 2 ports properly (typo).
-
-Fri Jun 19 11:59:26 1998 Joyce Janczyn <janczyn@cygnus.com>
-
- * interp.c (board): Rename am32 to stdeval1 as this is the name
- consistently used to refer to the mn1030002 board.
-
-Thu June 18 14:37:14 1998 Joyce Janczyn <janczyn@cygnus.com>
- * interp.c (sim_open): Fix typo in address of EXTMD register
- (0x34000280, not 0x3400280).
-
-Wed Jun 17 18:00:18 1998 Jeffrey A Law (law@cygnus.com)
-
- * simops.c (syscall): Handle change in opcode # for syscall.
- * mn10300.igen (syscall): Likewise.
-
-Tue June 16 09:36:21 1998 Joyce Janczyn <janczyn@cygnus.com>
- * dv-mn103int.c (mn103int_finish): Regular interrupts (not NMI or
- reset) are not enabled on reset.
-
-Sun June 14 17:04:00 1998 Joyce Janczyn <janczyn@cygnus.com>
- * dv-mn103iop.c (write_*_reg): Check for attempt to write r/o
- register bits.
- * dv-mn103ser.c: Fill in methods for reading and writing to serial
- device registers.
- * interp.c (sim_open): Make the serial device a polling device.
-
-Fri June 12 16:24:00 1998 Joyce Janczyn <janczyn@cygnus.com>
- * dv-mn103iop.c: New file for handling am32 io ports.
- * configure.in: Add mn103iop to hw_device list.
- * configure: Re-generate.
- * interp.c (sim_open): Create io port device.
-
-Wed June 10 14:34:00 1998 Joyce Janczyn <janczyn@cygnus.com>
- * dv-mn103int.c (external_group): Use enumerated types to access
- correct group addresses.
- * dv-mn103tim.c (do_counter_event): Underflow of cascaded timer
- triggers an interrupt on the higher-numbered timer's port.
-
-Mon June 8 13:30:00 1998 Joyce Janczyn <janczyn@cygnus.com>
- * interp.c: (mn10300_option_handler): New function parses arguments
- using sim-options.
- * (board): Add --board option for specifying am32.
- * (sim_open): Create new timer and serial devices and control
- configuration of other am32 devices via board option.
- * dv-mn103tim.c, dv-mn103ser.c: New files for timers and serial devices.
- * dv-mn103cpu.c: Fix typos in opening comments.
- * dv-mn103int.c: Adjust interrupt controller settings for am32 instead of am30.
- * configure.in: Add mn103tim and mn103ser to hw_device list.
- * configure: Re-generate.
-
-Mon May 25 20:50:35 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * dv-mn103int.c, dv-mn103cpu.c: Rename *_callback to *_method.
-
- * dv-mn103cpu.c, dv-mn103int.c: Include hw-main.h and
- sim-main.h. Declare a struct hw_descriptor instead of struct
- hw_device_descriptor.
-
-Mon May 25 17:33:33 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * dv-mn103cpu.c (struct mn103cpu): Change type of pending_handler
- to struct hw_event.
-
-Fri May 22 12:17:41 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure.in (SIM_AC_OPTION_HARDWARE): Add argument "yes".
-
-Wed May 6 13:29:06 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * interp.c (sim_open): Create a polling PAL device.
-
-Fri May 1 16:39:15 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * dv-mn103int.c (mn103int_port_event):
- (mn103int_port_event):
- (mn103int_io_read_buffer):
- (mn103int_io_write_buffer):
-
- * dv-mn103cpu.c (deliver_mn103cpu_interrupt): Drop CPU/CIA args.
- (mn103cpu_port_event): Ditto.
- (mn103cpu_io_read_buffer): Ditto.
- (mn103cpu_io_write_buffer): Ditto.
-
-Tue Apr 28 18:33:31 1998 Geoffrey Noer <noer@cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Sun Apr 26 15:31:55 1998 Tom Tromey <tromey@creche>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
- * config.in: Ditto.
-
-Sun Apr 26 15:19:55 1998 Tom Tromey <tromey@cygnus.com>
-
- * acconfig.h: New file.
- * configure.in: Reverted change of Apr 24; use sinclude again.
-
-Fri Apr 24 14:16:40 1998 Tom Tromey <tromey@creche>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
- * config.in: Ditto.
-
-Fri Apr 24 11:19:07 1998 Tom Tromey <tromey@cygnus.com>
-
- * configure.in: Don't call sinclude.
-
-Tue Apr 14 10:03:02 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * mn10300_sim.h: Declare all functions in op_utils.c using
- INLINE_SIM_MAIN.
- * op_utils.c: Ditto.
- * sim-main.c: New file. Include op_utils.c.
-
- * mn10300.igen (mov, cmp): Use new igen operators `!' and `=' to
- differentiate between MOV/CMP immediate/register instructions.
-
- * configure.in (SIM_AC_OPTION_INLINE): Add and enable.
- * configure: Regenerate.
-
-Sat Apr 4 20:36:25 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Fri Mar 27 16:15:52 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * interp.c (hw): Delete variable, moved to SIM_DESC.
- (sim_open): Delete calls to hw_tree_create, hw_tree_finish.
- Handled by sim-module.
- (sim_open): Do not anotate tree with trace properties, handled by
- sim-hw.c
- (sim_open): Call sim_hw_parse instead of hw_tree_parse.
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Thu Mar 26 20:46:18 1998 Stu Grossman <grossman@bhuna.cygnus.co.uk>
-
- * dv-mn103cpu.c (deliver_mn103cpu_interrupt): Save the entire PC
- on the stack when delivering interrupts (not just the lower
- half)...
- * mn10300.igen (mov (Di,Am),Dn): Fix decode. Registers were
- specified in the wrong order.
-
-Fri Mar 27 00:56:40 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * dv-mn103cpu.c (deliver_mn103cpu_interrupt): Stop loss of
- succeeding interrupts, clear pending_handler when the handler
- isn't re-scheduled.
-
-Thu Mar 26 10:11:01 1998 Stu Grossman <grossman@bhuna.cygnus.co.uk>
-
- * Makefile.in (tmp-igen): Prefix all usage of move-if-change
- script with $(SHELL) to make NT native builds happy.
- * configure: Regenerate because of change to ../common/aclocal.m4.
-
-Thu Mar 26 11:22:31 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure.in: Make --enable-sim-common the default.
- * configure: Re-generate.
-
- * sim-main.h (CIA_GET, CIA_SET): Save/restore current instruction
- address into Sate.regs[REG_PC] instead of common struct.
-
-Wed Mar 25 17:42:00 1998 Joyce Janczyn <janczyn@cygnus.com>
-
- * mn10300.igen (cmp imm8,An): Do not sign extend imm8 value.
-
-Wed Mar 25 12:08:00 1998 Joyce Janczyn <janczyn@cygnus.com>
-
- * simops.c (OP_F0FD): Initialise variable 'sp'.
-
-Thu Mar 26 00:21:32 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * dv-mn103int.c (decode_group): A group register every 4 bytes not
- 8.
- (write_icr): Rewrite equation updating request field.
- (read_iagr): Fix check that interrupt is still pending.
-
-Wed Mar 25 16:14:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * interp.c (sim_open): Tidy up device creation.
-
- * dv-mn103int.c (mn103int_port_event): Drive NMI with non-zero
- value.
- (mn103int_io_read_buffer): Convert absolute address to register
- block offsets.
- (read_icr, write_icr): Convert block offset into group offset.
-
-Wed Mar 25 15:08:49 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * interp.c (sim_open): Create second 1mb memory region at
- 0x40000000.
- (sim_open): Create a device tree.
- (sim-hw.h): Include.
- (do_interrupt): Delete, needs to use dv-mn103cpu.c
-
- * dv-mn103int.c, dv-mn103cpu.c: New files.
-
-Wed Mar 25 08:47:38 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * mn10300_sim.h (EXTRACT_PSW_LM, INSERT_PSW_LM, PSW_IE, PSW_LM):
- Define.
- (SP): Define.
-
-Wed Mar 25 12:35:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Wed Mar 25 10:24:48 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * interp.c (sim-options.h): Include.
- (sim_kind, myname): Declare when not using common framework.
-
- * mn10300_sim.h (do_syscall, generic*): Provide prototypes for
- functions found in op_utils.c
-
- * mn10300.igen (add): Discard unused variables.
-
- * configure, config.in: Re-generate with autoconf 2.12.1.
-
-Tue Mar 24 15:27:00 1998 Joyce Janczyn <janczyn@cygnus.com>
-
- Add support for --enable-sim-common option.
- * Makefile.in (WITHOUT_COMMON_OBJS): Files included if
- ! --enable-sim-common
- (WITH_COMMON_OBJS): Files included if --enable-sim-common.
- (MN10300_OBJS,MN10300_INTERP_DEP): New variables.
- (SIM_OBJS): Rewrite.
- ({WITHOUT,WITH}_COMMON_RUN_OBJS,SIM_RUN_OBJS): New variables.
- (SIM_EXTRA_CFLAGS): New variable.
- (clean-extra): Clean up igen files.
- (../igen/igen,clean-igen,tmp-igen): New rules.
- * configure.in: Add support for common framework via
- --enable-sim-common.
- * configure: Regenerate.
- * interp.c: #include sim-main if WITH_COMMON, not mn10300_sim.h.
- (hash,dispatch,sim_size): Don't compile if ! WITH_COMMON.
- (init_system,sim_write,compare_simops): Likewise.
- (sim_set_profile,sim_set_profile_size): Likewise.
- (sim_stop,sim_resume,sim_trace,sim_info): Likewise.
- (sim_set_callbacks,sim_stop_reason,sim_read,sim_load): Likewise.
- (enum interrupt_type): New enum.
- (interrupt_names): New global.
- (do_interrupt): New function.
- (sim_open): Define differently if WITH_COMMON.
- (sim_close,sim_create_inferior,sim_do_command): Likewise.
- * mn10300_sim.h ({load,store}_{byte,half,word}): Define versions
- for WITH_COMMON.
- * mn10300.igen: New file.
- * mn10300.dc: New file.
- * op_utils.c: New file.
- * sim-main.h: New file.
-
-Wed Mar 18 12:38:12 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Fri Feb 27 18:36:04 1998 Jeffrey A Law (law@cygnus.com)
-
- * simops.c (inc): Fix typo.
-
-Wed Feb 25 01:59:29 1998 Jeffrey A Law (law@cygnus.com)
-
- * simops.c (signed multiply instructions): Cast input operands to
- signed32 before casting them to signed64 so that the sign bit
- is propagated properly.
-
-Mon Feb 23 20:23:19 1998 Mark Alexander <marka@cygnus.com>
-
- * Makefile.in: Last change was bad. Define NL_TARGET
- so that targ-vals.h will be used instead of syscall.h.
- * simops.c: Use targ-vals.h instead of syscall.h.
- (OP_F020): Disable unsupported system calls.
-
-Mon Feb 23 09:44:38 1998 Mark Alexander <marka@cygnus.com>
-
- * Makefile.in: Get header files from libgloss/mn10300/sys.
-
-Sun Feb 22 16:02:24 1998 Jeffrey A Law (law@cygnus.com)
-
- * simops.c: Include sim-types.h.
-
-Wed Feb 18 13:07:08 1998 Jeffrey A Law (law@cygnus.com)
-
- * simops.c (multiply instructions): Cast input operands to a
- signed64/unsigned64 type as appropriate.
-
-Tue Feb 17 12:47:16 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * interp.c (sim_store_register, sim_fetch_register): Pass in
- length parameter. Return -1.
-
-Sun Feb 1 16:47:51 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Sat Jan 31 18:15:41 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Mon Jan 19 22:26:29 1998 Doug Evans <devans@seba>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Mon Dec 15 23:17:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
- * config.in: Ditto.
-
-Thu Dec 4 09:21:05 1997 Doug Evans <devans@canuck.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Tue Nov 11 10:38:52 1997 Jeffrey A Law (law@cygnus.com)
-
- * simops.c (call:16 call:32): Stack adjustment is determined solely
- by the imm8 field.
-
-Wed Oct 22 14:43:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * interp.c (sim_load): Pass lma_p and sim_write args to
- sim_load_file.
-
-Tue Oct 21 10:12:03 1997 Jeffrey A Law (law@cygnus.com)
-
- * simops.c: Correctly handle register restores for "ret" and "retf"
- instructions.
-
-Fri Oct 3 09:28:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Wed Sep 24 17:38:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Tue Sep 23 11:04:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Mon Sep 22 11:46:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Fri Sep 19 17:45:25 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Mon Sep 15 17:36:15 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Thu Sep 4 17:21:23 1997 Doug Evans <dje@seba>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Wed Aug 27 18:13:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
- * config.in: Ditto.
-
-Tue Aug 26 10:41:07 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * interp.c (sim_kill): Delete.
- (sim_create_inferior): Add ABFD argument.
- (sim_load): Move setting of PC from here.
- (sim_create_inferior): To here.
-
-Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
- * config.in: Ditto.
-
-Mon Aug 25 16:14:44 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * interp.c (sim_open): Add ABFD argument.
-
-Tue Jun 24 13:46:20 1997 Jeffrey A Law (law@cygnus.com)
-
- * interp.c (sim_resume): Clear State.exited.
- (sim_stop_reason): If State.exited is nonzero, then indicate that
- the simulator exited instead of stopped.
- * mn10300_sim.h (struct _state): Add exited field.
- * simops.c (syscall): Set State.exited for SYS_exit.
-
-Wed Jun 11 22:07:56 1997 Jeffrey A Law (law@cygnus.com)
-
- * simops.c: Fix thinko in last change.
-
-Tue Jun 10 12:31:32 1997 Jeffrey A Law (law@cygnus.com)
-
- * simops.c: "call" stores the callee saved registers into the
- stack! Update the stack pointer properly when done with
- register saves.
-
- * simops.c: Fix return address computation for "call" instructions.
-
-Thu May 22 01:43:11 1997 Jeffrey A Law (law@cygnus.com)
-
- * interp.c (sim_open): Fix typo.
-
-Wed May 21 23:27:58 1997 Jeffrey A Law (law@cygnus.com)
-
- * interp.c (sim_resume): Add missing case in big switch
- statement (for extb instruction).
-
-Tue May 20 17:51:30 1997 Jeffrey A Law (law@cygnus.com)
-
- * interp.c: Replace all references to load_mem and store_mem
- with references to load_byte, load_half, load_3_byte, load_word
- and store_byte, store_half, store_3_byte, store_word.
- (INLINE): Delete definition.
- (load_mem_big): Likewise.
- (max_mem): Make it global.
- (dispatch): Make this function inline.
- (load_mem, store_mem): Delete functions.
- * mn10300_sim.h (INLINE): Define.
- (RLW): Delete unused definition.
- (load_mem, store_mem): Delete declarations.
- (load_mem_big): New definition.
- (load_byte, load_half, load_3_byte, load_word): New functions.
- (store_byte, store_half, store_3_byte, store_word): New functions.
- * simops.c: Replace all references to load_mem and store_mem
- with references to load_byte, load_half, load_3_byte, load_word
- and store_byte, store_half, store_3_byte, store_word.
-
-Tue May 20 10:21:51 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * interp.c (sim_open): Add callback to arguments.
- (sim_set_callbacks): Delete SIM_DESC argument.
-
-Mon May 19 13:54:22 1997 Jeffrey A Law (law@cygnus.com)
-
- * interp.c (dispatch): Make this an inline function.
-
- * simops.c (syscall): Use callback->write regardless of
- what file descriptor we're writing too.
-
-Sun May 18 16:46:31 1997 Jeffrey A Law (law@cygnus.com)
-
- * interp.c (load_mem_big): Remove function. It's now a macro
- defined elsewhere.
- (compare_simops): New function.
- (sim_open): Sort the Simops table before inserting entries
- into the hash table.
- * mn10300_sim.h: Remove unused #defines.
- (load_mem_big): Define.
-
-Fri May 16 16:36:17 1997 Jeffrey A Law (law@cygnus.com)
-
- * interp.c (load_mem): If we get a load from an out of range
- address, abort.
- (store_mem): Likewise for stores.
- (max_mem): New variable.
-
-Tue May 6 13:24:36 1997 Jeffrey A Law (law@cygnus.com)
-
- * mn10300_sim.h: Fix ordering of bits in the PSW.
-
- * interp.c: Improve hashing routine to avoid long list
- traversals for common instructions. Add HASH_STAT support.
- Rewrite opcode dispatch code using a big switch instead of
- cascaded if/else statements. Avoid useless calls to load_mem.
-
-Mon May 5 18:07:48 1997 Jeffrey A Law (law@cygnus.com)
-
- * mn10300_sim.h (struct _state): Add space for mdrq register.
- (REG_MDRQ): Define.
- * simops.c: Don't abort for trap. Add support for the extended
- instructions, "getx", "putx", "mulq", "mulqu", "sat16", "sat24",
- and "bsch".
-
-Thu Apr 24 00:39:51 1997 Doug Evans <dje@canuck.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Fri Apr 18 14:04:04 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * interp.c (sim_stop): Add stub function.
-
-Thu Apr 17 03:26:59 1997 Doug Evans <dje@canuck.cygnus.com>
-
- * Makefile.in (SIM_OBJS): Add sim-load.o.
- * interp.c (sim_kind, myname): New static locals.
- (sim_open): Set sim_kind, myname. Ignore -E arg.
- (sim_load): Return SIM_RC. New arg abfd. Call sim_load_file to
- load file into simulator. Set start address from bfd.
- (sim_create_inferior): Return SIM_RC. Delete arg start_address.
-
-Wed Apr 16 19:30:44 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * simops.c (OP_F020): SYS_execv, SYS_time, SYS_times, SYS_utime
- only include if implemented by host.
- (OP_F020): Typecast arg passed to time function;
-
-Mon Apr 7 23:57:49 1997 Jeffrey A Law (law@cygnus.com)
-
- * simops.c (syscall): Handle new mn10300 calling conventions.
-
-Mon Apr 7 15:45:02 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
- * config.in: Ditto.
-
-Fri Apr 4 20:02:37 1997 Ian Lance Taylor <ian@cygnus.com>
-
- * Makefile.in: Change mn10300-opc.o to m10300-opc.o, to match
- corresponding change in opcodes directory.
-
-Wed Apr 2 15:06:28 1997 Doug Evans <dje@canuck.cygnus.com>
-
- * interp.c (sim_open): New arg `kind'.
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Wed Apr 2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Thu Mar 20 11:58:02 1997 Jeffrey A Law (law@cygnus.com)
-
- * simops.c: Fix register extraction for a two "movbu" variants.
- Somewhat simplify "sub" instructions.
- Correctly sign extend operands for "mul". Put the correct
- half of the result in MDR for "mul" and "mulu".
- Implement remaining instructions.
- Tweak opcode for "syscall".
-
-Tue Mar 18 14:21:21 1997 Jeffrey A Law (law@cygnus.com)
-
- * simops.c: Do syscall emulation in "syscall" instruction. Add
- dummy "trap" instruction.
-
-Wed Mar 19 01:14:00 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Mon Mar 17 15:10:07 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
-
- * configure: Re-generate.
-
-Fri Mar 14 10:34:11 1997 Michael Meissner <meissner@cygnus.com>
-
- * configure: Regenerate to track ../common/aclocal.m4 changes.
-
-Thu Mar 13 12:54:45 1997 Doug Evans <dje@canuck.cygnus.com>
-
- * interp.c (sim_open): New SIM_DESC result. Argument is now
- in argv form.
- (other sim_*): New SIM_DESC argument.
-
-Wed Mar 12 15:04:00 1997 Jeffrey A Law (law@cygnus.com)
-
- * simops.c: Fix carry bit computation for "add" instructions.
-
- * simops.c: Fix typos in bset insns. Fix arguments to store_mem
- for bset imm8,(d8,an) and bclr imm8,(d8,an).
-
-Wed Mar 5 15:00:10 1997 Jeffrey A Law (law@cygnus.com)
-
- * simops.c: Fix register references when computing Z and N bits
- for lsr imm8,dn.
-
-Tue Feb 4 13:33:30 1997 Doug Evans <dje@canuck.cygnus.com>
-
- * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
- COMMON_{PRE,POST}_CONFIG_FRAG instead.
- * configure.in: sinclude ../common/aclocal.m4.
- * configure: Regenerated.
-
-Fri Jan 24 10:47:25 1997 Jeffrey A Law (law@cygnus.com)
-
- * interp.c (init_system): Allocate 2^19 bytes of space for the
- simulator.
-
-Thu Jan 23 11:46:23 1997 Stu Grossman (grossman@critters.cygnus.com)
-
- * configure configure.in Makefile.in: Update to new configure
- scheme which is more compatible with WinGDB builds.
- * configure.in: Improve comment on how to run autoconf.
- * configure: Re-run autoconf to get new ../common/aclocal.m4.
- * Makefile.in: Use autoconf substitution to install common
- makefile fragment.
-
-Tue Jan 21 15:03:04 1997 Jeffrey A Law (law@cygnus.com)
-
- * simops.c: Undo last change to "rol" and "ror", original code
- was correct!
-
-Thu Jan 16 11:28:14 1997 Jeffrey A Law (law@cygnus.com)
-
- * simops.c: Fix "rol" and "ror".
-
-Wed Jan 15 06:45:58 1997 Jeffrey A Law (law@cygnus.com)
-
- * simops.c: Fix typo in last change.
-
-Mon Jan 13 13:22:35 1997 Jeffrey A Law (law@cygnus.com)
-
- * simops.c: Use REG macros in few places not using them yet.
-
-Mon Jan 6 16:21:19 1997 Jeffrey A Law (law@cygnus.com)
-
- * mn10300_sim.h (struct _state): Fix number of registers!
-
-Tue Dec 31 16:20:41 1996 Jeffrey A Law (law@cygnus.com)
-
- * mn10300_sim.h (struct _state): Put all registers into a single
- array to make gdb implementation easier.
- (REG_*): Add definitions for all registers in the state array.
- (SEXT32, SEXT40, SEXT44, SEXT60): Remove unused macros.
- * simops.c: Related changes.
-
-Wed Dec 18 10:10:45 1996 Jeffrey A Law (law@cygnus.com)
-
- * interp.c (sim_resume): Handle 0xff as a single byte insn.
-
- * simops.c: Fix overflow computation for "add" and "inc"
- instructions.
-
-Mon Dec 16 10:03:52 1996 Jeffrey A Law (law@cygnus.com)
-
- * simops.c: Handle "break" instruction.
-
- * simops.c: Fix restoring the PC for "ret" and "retf" instructions.
-
-Wed Dec 11 09:53:10 1996 Jeffrey A Law (law@cygnus.com)
-
- * gencode.c (write_opcodes): Also write out the format of the
- opcode.
- * mn10300_sim.h (simops): Add "format" field.
- * interp.c (sim_resume): Deal with endianness issues here.
-
-Tue Dec 10 15:05:37 1996 Jeffrey A Law (law@cygnus.com)
-
- * simops.c (REG0_4): Define.
- Use REG0_4 for indexed loads/stores.
-
-Sat Dec 7 09:50:28 1996 Jeffrey A Law (law@cygnus.com)
-
- * simops.c (REG0_16): Fix typo.
-
-Fri Dec 6 14:13:34 1996 Jeffrey A Law (law@cygnus.com)
-
- * simops.c: Call abort for any instruction that's not currently
- simulated.
-
- * simops.c: Define accessor macros to extract register
- values from instructions. Use them consistently.
-
- * interp.c: Delete unused global variable "OP".
- (sim_resume): Remove unused variable "opcode".
- * simops.c: Fix some uninitialized variable problems, add
- parens to fix various -Wall warnings.
-
- * gencode.c (write_header): Add "insn" and "extension" arguments
- to the OP_* declarations.
- (write_template): Similarly for function templates.
- * interp.c (insn, extension): Remove global variables. Instead
- pass them as arguments to the OP_* functions.
- * mn10300_sim.h: Remove decls for "insn" and "extension".
- * simops.c (OP_*): Accept "insn" and "extension" as arguments
- instead of using globals.
-
-Thu Dec 5 22:26:31 1996 Jeffrey A Law (law@cygnus.com)
-
- * simops.c: Fix typos in "mov am,(d16,an)" and "mov am,(d32,an)"
-
- * simops.c: Fix thinkos in last change to "inc dn".
-
-Wed Dec 4 10:57:53 1996 Jeffrey A Law (law@cygnus.com)
-
- * simops.c: "add imm,sp" does not effect the condition codes.
- "inc dn" does effect the condition codes.
-
-Tue Dec 3 17:37:45 1996 Jeffrey A Law (law@cygnus.com)
-
- * simops.c: Treat both operands as signed values for
- "div" instruction.
-
- * simops.c: Fix simulation of division instructions.
- Fix typos/thinkos in several "cmp" and "sub" instructions.
-
-Mon Dec 2 12:31:40 1996 Jeffrey A Law (law@cygnus.com)
-
- * simops.c: Fix carry bit handling in "sub" and "cmp"
- instructions.
-
- * simops.c: Fix "mov imm8,an" and "mov imm16,dn".
-
-Sun Dec 1 16:05:42 1996 Jeffrey A Law (law@cygnus.com)
-
- * simops.c: Fix overflow computation for many instructions.
-
- * simops.c: Fix "mov dm, an", "movbu dm, (an)", and "movhu dm, (an)".
-
- * simops.c: Fix "mov am, dn".
-
- * simops.c: Fix more bugs in "add imm,an" and
- "add imm,dn".
-
-Wed Nov 27 09:20:42 1996 Jeffrey A Law (law@cygnus.com)
-
- * simops.c: Fix bugs in "movm" and "add imm,an".
-
- * simops.c: Don't lose the upper 24 bits of the return
- pointer in "call" and "calls" instructions. Rough cut
- at emulated system calls.
-
- * simops.c: Implement the remaining 5, 6 and 7 byte instructions.
-
- * simops.c: Implement remaining 4 byte instructions.
-
- * simops.c: Implement remaining 3 byte instructions.
-
- * simops.c: Implement remaining 2 byte instructions. Call
- abort for instructions we're not implementing now.
-
-Tue Nov 26 15:43:41 1996 Jeffrey A Law (law@cygnus.com)
-
- * simops.c: Implement lots of random instructions.
-
- * simops.c: Implement "movm" and "bCC" insns.
-
- * mn10300_sim.h (_state): Add another register (MDR).
- (REG_MDR): Define.
- * simops.c: Implement "cmp", "calls", "rets", "jmp" and
- a few additional random insns.
-
- * mn10300_sim.h (PSW_*): Define for CC status tracking.
- (REG_D0, REG_A0, REG_SP): Define.
- * simops.c: Implement "add", "addc" and a few other random
- instructions.
-
- * gencode.c, interp.c: Snapshot current simulator code.
-
-Mon Nov 25 12:46:38 1996 Jeffrey A Law (law@cygnus.com)
-
- * Makefile.in, config.in, configure, configure.in: New files.
- * gencode.c, interp.c, mn10300_sim.h, simops.c: New files.
-
diff --git a/sim/mn10300/Makefile.in b/sim/mn10300/Makefile.in
deleted file mode 100644
index f3a52ed1994..00000000000
--- a/sim/mn10300/Makefile.in
+++ /dev/null
@@ -1,159 +0,0 @@
-# Makefile template for Configure for the mn10300 sim library.
-# Copyright (C) 1996, 1997, 2000, 2001 Free Software Foundation, Inc.
-# Written by Cygnus Support.
-#
-# This program is free software; you can redistribute it and/or modify
-# it under the terms of the GNU General Public License as published by
-# the Free Software Foundation; either version 2 of the License, or
-# (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
-## COMMON_PRE_CONFIG_FRAG
-
-WITHOUT_COMMON_OBJS = table.o simops.o sim-load.o
-WITHOUT_COMMON_INTERP_DEP = table.c
-WITH_COMMON_OBJS = \
- itable.o semantics.o idecode.o icache.o engine.o irun.o support.o \
- $(SIM_NEW_COMMON_OBJS) \
- op_utils.o \
- sim-engine.o \
- sim-hload.o \
- sim-hrw.o \
- sim-resume.o \
- sim-reason.o \
- sim-stop.o \
- dv-sockser.o
-WITH_COMMON_INTERP_DEP =
-
-MN10300_OBJS = $(@mn10300_common@_COMMON_OBJS)
-MN10300_INTERP_DEP = $(@mn10300_common@_COMMON_INTERP_DEP)
-
-SIM_OBJS = $(MN10300_OBJS) interp.o
-
-# List of main object files for `run'.
-WITHOUT_COMMON_RUN_OBJS = run.o
-WITH_COMMON_RUN_OBJS = nrun.o
-SIM_RUN_OBJS = $(@mn10300_common@_COMMON_RUN_OBJS)
-
-SIM_EXTRA_CLEAN = clean-extra
-
-# Select mn10300 support in nltvals.def.
-NL_TARGET = -DNL_TARGET_mn10300
-
-INCLUDE = mn10300_sim.h $(srcdir)/../../include/callback.h
-
-# List of extra flags to always pass to $(CC).
-SIM_EXTRA_CFLAGS = @sim_gen@ -DPOLL_QUIT_INTERVAL=0x20
-
-## COMMON_POST_CONFIG_FRAG
-
-
-#
-# Old generator (default)
-#
-
-simops.h: gencode
- ./gencode -h >$@
-
-table.c: gencode simops.h
- ./gencode >$@
-
-gencode.o: gencode.c $(INCLUDE)
- $(CC_FOR_BUILD) $(BUILD_CFLAGS) -c $(srcdir)/gencode.c
-
-m10300-opc.o: $(srcdir)/../../opcodes/m10300-opc.c
- $(CC_FOR_BUILD) $(BUILD_CFLAGS) -c $(srcdir)/../../opcodes/m10300-opc.c
-
-gencode: gencode.o m10300-opc.o
- $(CC_FOR_BUILD) $(BUILD_CFLAGS) -o gencode gencode.o m10300-opc.o $(BUILD_LIB)
-
-idecode.o op_utils.o semantics.o simops.o: targ-vals.h
-
-
-BUILT_SRC_FROM_IGEN = \
- icache.h \
- icache.c \
- idecode.h \
- idecode.c \
- semantics.h \
- semantics.c \
- model.h \
- model.c \
- support.h \
- support.c \
- itable.h \
- itable.c \
- engine.h \
- engine.c \
- irun.c
-$(BUILT_SRC_FROM_IGEN): tmp-igen
-
-
-.PHONY: clean-igen
-clean-igen:
- rm -f $(BUILT_SRC_FROM_IGEN)
- rm -f tmp-igen tmp-insns
-
-../igen/igen:
- cd ../igen && $(MAKE)
-
-IGEN_TRACE= # -G omit-line-numbers # -G trace-rule-selection -G trace-rule-rejection -G trace-entries
-IGEN_INSN=$(srcdir)/mn10300.igen $(srcdir)/am33.igen
-IGEN_DC=$(srcdir)/mn10300.dc
-tmp-igen: $(IGEN_INSN) $(IGEN_DC) ../igen/igen
- cd ../igen && $(MAKE)
- ../igen/igen \
- $(IGEN_TRACE) \
- -G gen-direct-access \
- -M mn10300,am33 -G gen-multi-sim=am33 \
- -I $(srcdir) \
- -i $(IGEN_INSN) \
- -o $(IGEN_DC) \
- -x \
- -n icache.h -hc tmp-icache.h \
- -n icache.c -c tmp-icache.c \
- -n semantics.h -hs tmp-semantics.h \
- -n semantics.c -s tmp-semantics.c \
- -n idecode.h -hd tmp-idecode.h \
- -n idecode.c -d tmp-idecode.c \
- -n model.h -hm tmp-model.h \
- -n model.c -m tmp-model.c \
- -n support.h -hf tmp-support.h \
- -n support.c -f tmp-support.c \
- -n itable.h -ht tmp-itable.h \
- -n itable.c -t tmp-itable.c \
- -n engine.h -he tmp-engine.h \
- -n engine.c -e tmp-engine.c \
- -n irun.c -r tmp-irun.c
- $(SHELL) $(srcdir)/../../move-if-change tmp-icache.h icache.h
- $(SHELL) $(srcdir)/../../move-if-change tmp-icache.c icache.c
- $(SHELL) $(srcdir)/../../move-if-change tmp-idecode.h idecode.h
- $(SHELL) $(srcdir)/../../move-if-change tmp-idecode.c idecode.c
- $(SHELL) $(srcdir)/../../move-if-change tmp-semantics.h semantics.h
- $(SHELL) $(srcdir)/../../move-if-change tmp-semantics.c semantics.c
- $(SHELL) $(srcdir)/../../move-if-change tmp-model.h model.h
- $(SHELL) $(srcdir)/../../move-if-change tmp-model.c model.c
- $(SHELL) $(srcdir)/../../move-if-change tmp-support.h support.h
- $(SHELL) $(srcdir)/../../move-if-change tmp-support.c support.c
- $(SHELL) $(srcdir)/../../move-if-change tmp-itable.h itable.h
- $(SHELL) $(srcdir)/../../move-if-change tmp-itable.c itable.c
- $(SHELL) $(srcdir)/../../move-if-change tmp-engine.h engine.h
- $(SHELL) $(srcdir)/../../move-if-change tmp-engine.c engine.c
- $(SHELL) $(srcdir)/../../move-if-change tmp-irun.c irun.c
- touch tmp-igen
-
-
-interp.o: interp.c $(MN10300_INTERP_DEP) $(INCLUDE)
-simops.o: simops.c simops.h $(INCLUDE)
-table.o: table.c
-
-clean-extra: clean-igen
- rm -f table.c simops.h gencode
diff --git a/sim/mn10300/acconfig.h b/sim/mn10300/acconfig.h
deleted file mode 100644
index f9b87a10c60..00000000000
--- a/sim/mn10300/acconfig.h
+++ /dev/null
@@ -1,15 +0,0 @@
-
-/* Define to 1 if NLS is requested. */
-#undef ENABLE_NLS
-
-/* Define as 1 if you have catgets and don't want to use GNU gettext. */
-#undef HAVE_CATGETS
-
-/* Define as 1 if you have gettext and don't want to use GNU gettext. */
-#undef HAVE_GETTEXT
-
-/* Define as 1 if you have the stpcpy function. */
-#undef HAVE_STPCPY
-
-/* Define if your locale.h file contains LC_MESSAGES. */
-#undef HAVE_LC_MESSAGES
diff --git a/sim/mn10300/am33.igen b/sim/mn10300/am33.igen
deleted file mode 100644
index a5745e2f9ca..00000000000
--- a/sim/mn10300/am33.igen
+++ /dev/null
@@ -1,8676 +0,0 @@
-// Helper:
-//
-// Given an extended register number, translate it into an index into the
-// register array. This is necessary as the upper 8 extended registers are
-// actually synonyms for the d0-d3/a0-a3 registers.
-//
-//
-
-:function:::int:translate_rreg:int rreg
-{
-
- /* The higher register numbers actually correspond to the
- basic machine's address and data registers. */
- if (rreg > 7 && rreg < 12)
- return REG_A0 + rreg - 8;
- else if (rreg > 11 && rreg < 16)
- return REG_D0 + rreg - 12;
- else
- return REG_E0 + rreg;
-}
-
-:function:::int:translate_xreg:int xreg
-{
- switch (xreg)
- {
- case 0:
- return REG_SP;
- case 1:
- return REG_MDRQ;
- case 2:
- return REG_MCRH;
- case 3:
- return REG_MCRL;
- case 4:
- return REG_MCVF;
- default:
- abort ();
- }
-}
-
-// 1111 0000 0010 00An; mov USP,An
-8.0xf0+4.0x2,00,2.AN0:D0m:::mov
-"mov"
-*am33
-{
- PC = cia;
- State.regs[REG_A0 + AN0] = State.regs[REG_USP];
-}
-
-
-// 1111 0000 0010 01An; mov SSP,An
-8.0xf0+4.0x2,01,2.AN0:D0n:::mov
-"mov"
-*am33
-{
- PC = cia;
- State.regs[REG_A0 + AN0] = State.regs[REG_SSP];
-}
-
-
-// 1111 0000 0010 10An; mov MSP,An
-8.0xf0+4.0x2,10,2.AN0:D0o:::mov
-"mov"
-*am33
-{
- PC = cia;
- State.regs[REG_A0 + AN0] = State.regs[REG_MSP];
-}
-
-
-// 1111 0000 0010 11An; mov PC,An
-8.0xf0+4.0x2,11,2.AN0:D0p:::mov
-"mov"
-*am33
-{
- PC = cia;
- State.regs[REG_A0 + AN0] = PC;
-}
-
-
-// 1111 0000 0011 Am00; mov Am,USP
-8.0xf0+4.0x3,2.AM1,00:D0q:::mov
-"mov"
-*am33
-{
- PC = cia;
- State.regs[REG_USP] = State.regs[REG_A0 + AM1];
-}
-
-// 1111 0000 0011 Am01; mov Am,SSP
-8.0xf0+4.0x3,2.AM1,01:D0r:::mov
-"mov"
-*am33
-{
- PC = cia;
- State.regs[REG_SSP] = State.regs[REG_A0 + AM1];
-}
-
-// 1111 0000 0011 Am10; mov Am,MSP
-8.0xf0+4.0x3,2.AM1,10:D0s:::mov
-"mov"
-*am33
-{
- PC = cia;
- State.regs[REG_MSP] = State.regs[REG_A0 + AM1];
-}
-
-
-// 1111 0000 1110 imm4; syscall
-8.0xf0+4.0xe,IMM4:D0t:::syscall
-"syscall"
-*am33
-{
- unsigned32 sp, next_pc;
-
- PC = cia;
- sp = State.regs[REG_SP];
- next_pc = State.regs[REG_PC] + 2;
- store_word (sp - 4, next_pc);
- store_word (sp - 8, PSW);
- State.regs[REG_PC] = 0x40000000 + IMM4 * 8;
- nia = PC;
-}
-
-
-// 1111 0010 1110 11Dn; mov EPSW,Dn
-8.0xf2+4.0xe,11,2.DN0:D0u:::mov
-"mov"
-*am33
-{
- PC = cia;
- State.regs[REG_D0 + DN0] = PSW;
-}
-
-
-// 1111 0010 1111 Dm01; mov Dm,EPSW
-8.0xf2+4.0xf,2.DM1,01:D0v:::mov
-"mov"
-*am33
-{
- PC = cia;
- PSW = State.regs[REG_D0 + DM1];
-}
-
-// 1111 0101 00Am Rn; mov Am,Rn
-8.0xf5+00,2.AM1,4.RN0:D0w:::mov
-"mov"
-*am33
-{
- int destreg = translate_rreg (SD_, RN0);
-
- PC = cia;
- State.regs[destreg] = State.regs[REG_A0 + AM1];
-}
-
-// 1111 0101 01Dm Rn; mov Dm,Rn
-8.0xf5+01,2.DM1,4.RN0:D0x:::mov
-"mov"
-*am33
-{
- int destreg = translate_rreg (SD_, RN0);
-
- PC = cia;
- State.regs[destreg] = State.regs[REG_D0 + DM1];
-}
-
-// 1111 0101 10Rm An; mov Rm,An
-8.0xf5+10,4.RM1,2.AN0:D0y:::mov
-"mov"
-*am33
-{
- int destreg = translate_rreg (SD_, RM1);
-
- PC = cia;
- State.regs[REG_A0 + AN0] = State.regs[destreg];
-}
-
-// 1111 0101 11Rm Dn; mov Rm,Dn
-8.0xf5+11,4.RM1,2.DN0:D0z:::mov
-"mov"
-*am33
-{
- int destreg = translate_rreg (SD_, RM1);
-
- PC = cia;
- State.regs[REG_D0 + DN0] = State.regs[destreg];
-}
-
-
-// 1111 1000 1100 1110 regs....; movm (USP),regs
-8.0xf8+8.0xce+8.REGS:D1a:::movm
-"movm"
-*am33
-{
- unsigned32 usp = State.regs[REG_USP];
- unsigned32 mask;
-
- PC = cia;
- mask = REGS;
-
- if (mask & 0x8)
- {
- usp += 4;
- State.regs[REG_LAR] = load_word (usp);
- usp += 4;
- State.regs[REG_LIR] = load_word (usp);
- usp += 4;
- State.regs[REG_MDR] = load_word (usp);
- usp += 4;
- State.regs[REG_A0 + 1] = load_word (usp);
- usp += 4;
- State.regs[REG_A0] = load_word (usp);
- usp += 4;
- State.regs[REG_D0 + 1] = load_word (usp);
- usp += 4;
- State.regs[REG_D0] = load_word (usp);
- usp += 4;
- }
-
- if (mask & 0x10)
- {
- State.regs[REG_A0 + 3] = load_word (usp);
- usp += 4;
- }
-
- if (mask & 0x20)
- {
- State.regs[REG_A0 + 2] = load_word (usp);
- usp += 4;
- }
-
- if (mask & 0x40)
- {
- State.regs[REG_D0 + 3] = load_word (usp);
- usp += 4;
- }
-
- if (mask & 0x80)
- {
- State.regs[REG_D0 + 2] = load_word (usp);
- usp += 4;
- }
-
- if (STATE_ARCHITECTURE (sd)->mach == bfd_mach_am33
- )
- {
- if (mask & 0x1)
- {
- /* Need to restore MDQR, MCRH, MCRL, and MCVF */
- usp += 16;
- State.regs[REG_E0 + 1] = load_word (usp);
- usp += 4;
- State.regs[REG_E0 + 0] = load_word (usp);
- usp += 4;
- }
-
- if (mask & 0x2)
- {
- State.regs[REG_E0 + 7] = load_word (usp);
- usp += 4;
- State.regs[REG_E0 + 6] = load_word (usp);
- usp += 4;
- State.regs[REG_E0 + 5] = load_word (usp);
- usp += 4;
- State.regs[REG_E0 + 4] = load_word (usp);
- usp += 4;
- }
-
- if (mask & 0x4)
- {
- State.regs[REG_E0 + 3] = load_word (usp);
- usp += 4;
- State.regs[REG_E0 + 2] = load_word (usp);
- usp += 4;
- }
- }
-
- /* And make sure to update the stack pointer. */
- State.regs[REG_USP] = usp;
-}
-
-// 1111 1000 1100 1111 regs....; movm (USP),regs
-8.0xf8+8.0xcf+8.REGS:D1b:::movm
-"movm"
-*am33
-{
- unsigned32 usp = State.regs[REG_USP];
- unsigned32 mask;
-
- PC = cia;
- mask = REGS;
-
- if (STATE_ARCHITECTURE (sd)->mach == bfd_mach_am33
- )
- {
- if (mask & 0x4)
- {
- usp -= 4;
- store_word (usp, State.regs[REG_E0 + 2]);
- usp -= 4;
- store_word (usp, State.regs[REG_E0 + 3]);
- }
-
- if (mask & 0x2)
- {
- usp -= 4;
- store_word (usp, State.regs[REG_E0 + 4]);
- usp -= 4;
- store_word (usp, State.regs[REG_E0 + 5]);
- usp -= 4;
- store_word (usp, State.regs[REG_E0 + 6]);
- usp -= 4;
- store_word (usp, State.regs[REG_E0 + 7]);
- }
-
- if (mask & 0x1)
- {
- usp -= 4;
- store_word (usp, State.regs[REG_E0 + 0]);
- usp -= 4;
- store_word (usp, State.regs[REG_E0 + 1]);
- usp -= 16;
- /* Need to save MDQR, MCRH, MCRL, and MCVF */
- }
- }
-
- if (mask & 0x80)
- {
- usp -= 4;
- store_word (usp, State.regs[REG_D0 + 2]);
- }
-
- if (mask & 0x40)
- {
- usp -= 4;
- store_word (usp, State.regs[REG_D0 + 3]);
- }
-
- if (mask & 0x20)
- {
- usp -= 4;
- store_word (usp, State.regs[REG_A0 + 2]);
- }
-
- if (mask & 0x10)
- {
- usp -= 4;
- store_word (usp, State.regs[REG_A0 + 3]);
- }
-
- if (mask & 0x8)
- {
- usp -= 4;
- store_word (usp, State.regs[REG_D0]);
- usp -= 4;
- store_word (usp, State.regs[REG_D0 + 1]);
- usp -= 4;
- store_word (usp, State.regs[REG_A0]);
- usp -= 4;
- store_word (usp, State.regs[REG_A0 + 1]);
- usp -= 4;
- store_word (usp, State.regs[REG_MDR]);
- usp -= 4;
- store_word (usp, State.regs[REG_LIR]);
- usp -= 4;
- store_word (usp, State.regs[REG_LAR]);
- usp -= 4;
- }
-
- /* And make sure to update the stack pointer. */
- State.regs[REG_USP] = usp;
-}
-
-// 1111 1100 1111 1100 imm32...; and imm32,EPSW
-8.0xfc+8.0xfc+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:4a:::and
-"and"
-*am33
-{
- PC = cia;
- PSW &= FETCH32(IMM32A, IMM32B, IMM32C, IMM32D);
-}
-
-// 1111 1100 1111 1101 imm32...; or imm32,EPSW
-8.0xfc+8.0xfd+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D4a:::or
-"or"
-*am33
-{
- PC = cia;
- PSW |= FETCH32(IMM32A, IMM32B, IMM32C, IMM32D);
-}
-
-// 1111 1001 0000 1000 Rm Rn; mov Rm,Rn (Rm != Rn)
-8.0xf9+8.0x08+4.RM2,4.RN0!RM2:D1g:::mov
-"mov"
-*am33
-{
- int srcreg, dstreg;
-
- PC = cia;
-
- srcreg = translate_rreg (SD_, RM2);
- dstreg = translate_rreg (SD_, RN0);
- State.regs[dstreg] = State.regs[srcreg];
-}
-
-// 1111 1001 0001 1000 Rn Rn; ext Rn
-8.0xf9+8.0x18+4.RN0,4.RN2=RN0:D1:::ext
-"mov"
-*am33
-{
- int srcreg;
-
- PC = cia;
- srcreg = translate_rreg (SD_, RN0);
- if (State.regs[srcreg] & 0x80000000)
- State.regs[REG_MDR] = -1;
- else
- State.regs[REG_MDR] = 0;
-}
-
-// 1111 1001 0010 1000 Rm Rn; extb Rm,Rn
-8.0xf9+8.0x28+4.RM2,4.RN0!RM2:D1:::extb
-"extb"
-*am33
-{
- int srcreg, dstreg;
-
- PC = cia;
- srcreg = translate_rreg (SD_, RM2);
- dstreg = translate_rreg (SD_, RN0);
- State.regs[dstreg] = EXTEND8 (State.regs[srcreg]);
-}
-
-// 1111 1001 0011 1000 Rm Rn; extbu Rm,Rn
-8.0xf9+8.0x38+4.RM2,4.RN0!RM2:D1:::extbu
-"extbu"
-*am33
-{
- int srcreg, dstreg;
-
- PC = cia;
- srcreg = translate_rreg (SD_, RM2);
- dstreg = translate_rreg (SD_, RN0);
- State.regs[dstreg] = State.regs[srcreg] & 0xff;
-}
-
-// 1111 1001 0100 1000 Rm Rn; exth Rm,Rn
-8.0xf9+8.0x48+4.RM2,4.RN0!RM2:D1:::exth
-"exth"
-*am33
-{
- int srcreg, dstreg;
-
- PC = cia;
- srcreg = translate_rreg (SD_, RM2);
- dstreg = translate_rreg (SD_, RN0);
- State.regs[dstreg] = EXTEND16 (State.regs[srcreg]);
-}
-
-// 1111 1001 0101 1000 Rm Rn; exthu Rm,Rn
-8.0xf9+8.0x58+4.RM2,4.RN0!RM2:D1:::exthu
-"exthu"
-*am33
-{
- int srcreg, dstreg;
-
- PC = cia;
- srcreg = translate_rreg (SD_, RM2);
- dstreg = translate_rreg (SD_, RN0);
- State.regs[dstreg] = State.regs[srcreg] & 0xffff;
-}
-
-// 1111 1001 0110 1000 Rn Rn; clr Rn
-8.0xf9+8.0x68+4.RM2,4.RN0=RM2:D1:::clr
-"clr"
-*am33
-{
- int dstreg;
-
- PC = cia;
- dstreg = translate_rreg (SD_, RN0);
- State.regs[dstreg] = 0;
- PSW |= PSW_Z;
- PSW &= ~(PSW_V | PSW_C | PSW_N);
-}
-
-// 1111 1001 0111 1000 Rm Rn; add Rm,Rn
-8.0xf9+8.0x78+4.RM2,4.RN0:D1b:::add
-"add"
-*am33
-{
- int srcreg, dstreg;
-
- PC = cia;
- srcreg = translate_rreg (SD_, RM2);
- dstreg = translate_rreg (SD_, RN0);
- genericAdd (State.regs[srcreg], dstreg);
-}
-
-// 1111 1001 1000 1000 Rm Rn; addc Rm,Rn
-8.0xf9+8.0x88+4.RM2,4.RN0:D1b:::addc
-"addc"
-*am33
-{
- int srcreg, dstreg;
- int z, c, n, v;
- unsigned32 reg1, reg2, sum;
-
- PC = cia;
- srcreg = translate_rreg (SD_, RM2);
- dstreg = translate_rreg (SD_, RN0);
-
- reg1 = State.regs[srcreg];
- reg2 = State.regs[dstreg];
- sum = reg1 + reg2 + ((PSW & PSW_C) != 0);
- State.regs[dstreg] = sum;
-
- z = ((PSW & PSW_Z) != 0) && (sum == 0);
- n = (sum & 0x80000000);
- c = (sum < reg1) || (sum < reg2);
- v = ((reg2 & 0x80000000) == (reg1 & 0x80000000)
- && (reg2 & 0x80000000) != (sum & 0x80000000));
-
- PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
- PSW |= ((z ? PSW_Z : 0) | ( n ? PSW_N : 0)
- | (c ? PSW_C : 0) | (v ? PSW_V : 0));
-}
-
-// 1111 1001 1001 1000 Rm Rn; sub Rm,Rn
-8.0xf9+8.0x98+4.RM2,4.RN0:D1b:::sub
-"sub"
-*am33
-{
- int srcreg, dstreg;
-
- PC = cia;
- srcreg = translate_rreg (SD_, RM2);
- dstreg = translate_rreg (SD_, RN0);
- genericSub (State.regs[srcreg], dstreg);
-}
-
-// 1111 1001 1010 1000 Rm Rn; subc Rm,Rn
-8.0xf9+8.0xa8+4.RM2,4.RN0:D1b:::subc
-"subc"
-*am33
-{
- int srcreg, dstreg;
- int z, c, n, v;
- unsigned32 reg1, reg2, difference;
-
- PC = cia;
- srcreg = translate_rreg (SD_, RM2);
- dstreg = translate_rreg (SD_, RN0);
-
- reg1 = State.regs[srcreg];
- reg2 = State.regs[dstreg];
- difference = reg2 - reg1 - ((PSW & PSW_C) != 0);
- State.regs[dstreg] = difference;
-
- z = ((PSW & PSW_Z) != 0) && (difference == 0);
- n = (difference & 0x80000000);
- c = (reg1 > reg2);
- v = ((reg2 & 0x80000000) == (reg1 & 0x80000000)
- && (reg2 & 0x80000000) != (difference & 0x80000000));
-
- PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
- PSW |= ((z ? PSW_Z : 0) | ( n ? PSW_N : 0)
- | (c ? PSW_C : 0) | (v ? PSW_V : 0));
-}
-
-// 1111 1001 1011 1000 Rn Rn; inc Rn
-8.0xf9+8.0xb8+4.RN0,4.RN2=RN0:D1:::inc
-"inc"
-*am33
-{
- int dstreg;
-
- PC = cia;
- dstreg = translate_rreg (SD_, RN0);
- genericAdd (1, dstreg);
-}
-
-// 1111 1001 1101 1000 Rn Rn; inc Rn
-8.0xf9+8.0xc8+4.RN0,4.RN2=RN0:D1:::inc4
-"inc4"
-*am33
-{
- int dstreg;
-
- PC = cia;
- dstreg = translate_rreg (SD_, RN0);
- genericAdd (4, dstreg);
-}
-
-// 1111 1001 1101 1000 Rm Rn; cmp Rm,Rn
-8.0xf9+8.0xd8+4.RM2,4.RN0:D1:::cmp
-"cmp"
-*am33
-{
- int srcreg1, srcreg2;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RN0);
- srcreg2 = translate_rreg (SD_, RM2);
- genericCmp (State.regs[srcreg2], State.regs[srcreg1]);
-}
-
-// 1111 1001 1110 1000 XRm Rn; mov XRm,Rn
-8.0xf9+8.0xe8+4.XRM2,4.RN0:D1l:::mov
-"mov"
-*am33
-{
- int dstreg, srcreg;
-
- PC = cia;
- dstreg = translate_rreg (SD_, RN0);
- srcreg = translate_xreg (SD_, XRM2);
-
- State.regs[dstreg] = State.regs[srcreg];
-}
-
-// 1111 1001 1111 1000 Rm XRn; mov Rm,XRn
-8.0xf9+8.0xf8+4.RM2,4.XRN0:D1m:::mov
-"mov"
-*am33
-{
- int srcreg, dstreg;
-
- PC = cia;
- srcreg = translate_rreg (SD_, RM2);
- dstreg = translate_xreg (SD_, XRN0);
-
- State.regs[dstreg] = State.regs[srcreg];
-}
-
-// 1111 1001 0000 1001 Rm Rn; and Rm,Rn
-8.0xf9+8.0x09+4.RM2,4.RN0:D1a:::and
-"and"
-*am33
-{
- int srcreg, dstreg;
- int z, n;
-
- PC = cia;
-
- srcreg = translate_rreg (SD_, RM2);
- dstreg = translate_rreg (SD_, RN0);
-
- State.regs[dstreg] &= State.regs[srcreg];
- z = (State.regs[dstreg] == 0);
- n = (State.regs[dstreg] & 0x80000000) != 0;
- PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
- PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0));
-}
-
-// 1111 1001 0001 1001 Rm Rn; or Rm,Rn
-8.0xf9+8.0x19+4.RM2,4.RN0:D1a:::or
-"or"
-*am33
-{
- int srcreg, dstreg;
- int z, n;
-
- PC = cia;
- srcreg = translate_rreg (SD_, RM2);
- dstreg = translate_rreg (SD_, RN0);
-
- State.regs[dstreg] |= State.regs[srcreg];
- z = (State.regs[dstreg] == 0);
- n = (State.regs[dstreg] & 0x80000000) != 0;
- PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
- PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0));
-}
-
-// 1111 1001 0010 1001 Rm Rn; xor Rm,Rn
-8.0xf9+8.0x29+4.RM2,4.RN0:D1a:::xor
-"xor"
-*am33
-{
- int srcreg, dstreg;
- int z, n;
-
- PC = cia;
- srcreg = translate_rreg (SD_, RM2);
- dstreg = translate_rreg (SD_, RN0);
-
- State.regs[dstreg] ^= State.regs[srcreg];
- z = (State.regs[dstreg] == 0);
- n = (State.regs[dstreg] & 0x80000000) != 0;
- PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
- PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0));
-}
-
-// 1111 1001 0011 1001 Rn Rn; not Rn
-8.0xf9+8.0x39+4.RM2,4.RN0=RM2:D1:::not
-"not"
-*am33
-{
- int dstreg;
- int z, n;
-
- PC = cia;
- dstreg = translate_rreg (SD_, RN0);
-
- State.regs[dstreg] = ~State.regs[dstreg];
- z = (State.regs[dstreg] == 0);
- n = (State.regs[dstreg] & 0x80000000) != 0;
- PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
- PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0));
-}
-
-// 1111 1001 0100 1001 Rm Rn; asr Rm,Rn
-8.0xf9+8.0x49+4.RM2,4.RN0:D1a:::asr
-"asr"
-*am33
-{
- int srcreg, dstreg;
- signed32 temp;
- int c, z, n;
-
- PC = cia;
- srcreg = translate_rreg (SD_, RM2);
- dstreg = translate_rreg (SD_, RN0);
-
- temp = State.regs[dstreg];
- c = temp & 1;
- temp >>= State.regs[srcreg];
- State.regs[dstreg] = temp;
- z = (State.regs[dstreg] == 0);
- n = (State.regs[dstreg] & 0x80000000) != 0;
- PSW &= ~(PSW_Z | PSW_N | PSW_C);
- PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0) | (c ? PSW_C : 0));
-}
-
-// 1111 1001 0101 1001 Rm Rn; lsr Rm,Rn
-8.0xf9+8.0x59+4.RM2,4.RN0:D1a:::lsr
-"lsr"
-*am33
-{
- int srcreg, dstreg;
- int z, n, c;
-
- PC = cia;
-
- srcreg = translate_rreg (SD_, RM2);
- dstreg = translate_rreg (SD_, RN0);
-
- c = State.regs[dstreg] & 1;
- State.regs[dstreg] >>= State.regs[srcreg];
- z = (State.regs[dstreg] == 0);
- n = (State.regs[dstreg] & 0x80000000) != 0;
- PSW &= ~(PSW_Z | PSW_N | PSW_C);
- PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0) | (c ? PSW_C : 0));
-}
-
-// 1111 1001 0110 1001 Rm Rn; asl Rm,Rn
-8.0xf9+8.0x69+4.RM2,4.RN0:D1a:::asl
-"asl"
-*am33
-{
- int srcreg, dstreg;
- int z, n;
-
- PC = cia;
- srcreg = translate_rreg (SD_, RM2);
- dstreg = translate_rreg (SD_, RN0);
-
- State.regs[dstreg] <<= State.regs[srcreg];
- z = (State.regs[dstreg] == 0);
- n = (State.regs[dstreg] & 0x80000000) != 0;
- PSW &= ~(PSW_Z | PSW_N);
- PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0));
-}
-
-// 1111 1001 0111 1001 Rn Rn; asl2 Rn
-8.0xf9+8.0x79+4.RM2,4.RN0=RM2:D1:::asl2
-"asl2"
-*am33
-{
- int dstreg;
- int n, z;
-
- PC = cia;
- dstreg = translate_rreg (SD_, RN0);
-
- State.regs[dstreg] <<= 2;
- z = (State.regs[dstreg] == 0);
- n = (State.regs[dstreg] & 0x80000000) != 0;
- PSW &= ~(PSW_Z | PSW_N);
- PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0));
-}
-
-// 1111 1001 1000 1001 Rn Rn; ror Rn
-8.0xf9+8.0x89+4.RM2,4.RN0=RM2:D1:::ror
-"ror"
-*am33
-{
- int dstreg;
- int c, n, z;
- unsigned32 value;
-
- PC = cia;
- dstreg = translate_rreg (SD_, RN0);
-
- value = State.regs[dstreg];
- c = (value & 0x1);
-
- value >>= 1;
- value |= ((PSW & PSW_C) != 0) ? 0x80000000 : 0;
- State.regs[dstreg] = value;
- z = (value == 0);
- n = (value & 0x80000000) != 0;
- PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
- PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0) | (c ? PSW_C : 0));
-}
-
-// 1111 1001 1001 1001 Rn Rn; rol Rn
-8.0xf9+8.0x99+4.RM2,4.RN0=RM2:D1:::rol
-"rol"
-*am33
-{
- int dstreg;
- int c, n, z;
- unsigned32 value;
-
- PC = cia;
- dstreg = translate_rreg (SD_, RN0);
-
- value = State.regs[dstreg];
- c = (value & 0x80000000) ? 1 : 0;
-
- value <<= 1;
- value |= ((PSW & PSW_C) != 0);
- State.regs[dstreg] = value;
- z = (value == 0);
- n = (value & 0x80000000) != 0;
- PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
- PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0) | (c ? PSW_C : 0));
-}
-
-// 1111 1001 1010 1001 Rm Rn; mul Rm,Rn
-8.0xf9+8.0xa9+4.RM2,4.RN0:D1b:::mul
-"mul"
-*am33
-{
- int srcreg, dstreg;
- unsigned64 temp;
- int n, z;
-
- PC = cia;
- srcreg = translate_rreg (SD_, RM2);
- dstreg = translate_rreg (SD_, RN0);
-
- temp = ((signed64)(signed32)State.regs[dstreg]
- * (signed64)(signed32)State.regs[srcreg]);
- State.regs[dstreg] = temp & 0xffffffff;
- State.regs[REG_MDR] = (temp & 0xffffffff00000000LL) >> 32;
- z = (State.regs[dstreg] == 0);
- n = (State.regs[dstreg] & 0x80000000) != 0;
- PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
- PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0));
-}
-
-// 1111 1001 1011 1001 Rm Rn; mulu Rm,Rn
-8.0xf9+8.0xb9+4.RM2,4.RN0:D1b:::mulu
-"mulu"
-*am33
-{
- int srcreg, dstreg;
- unsigned64 temp;
- int n, z;
-
- PC = cia;
- srcreg = translate_rreg (SD_, RM2);
- dstreg = translate_rreg (SD_, RN0);
-
- temp = ((unsigned64)State.regs[dstreg]
- * (unsigned64)State.regs[srcreg]);
- State.regs[dstreg] = temp & 0xffffffff;
- State.regs[REG_MDR] = (temp & 0xffffffff00000000LL) >> 32;
- z = (State.regs[dstreg] == 0);
- n = (State.regs[dstreg] & 0x80000000) != 0;
- PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
- PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0));
-}
-
-// 1111 1001 1100 1001 Rm Rn; div Rm,Rn
-8.0xf9+8.0xc9+4.RM2,4.RN0:D1b:::div
-"div"
-*am33
-{
- int srcreg, dstreg;
- signed64 temp;
- int n, z;
-
- PC = cia;
- srcreg = translate_rreg (SD_, RM2);
- dstreg = translate_rreg (SD_, RN0);
-
- temp = State.regs[REG_MDR];
- temp <<= 32;
- temp |= State.regs[dstreg];
- State.regs[REG_MDR] = temp % (signed32)State.regs[srcreg];
- temp /= (signed32)State.regs[srcreg];
- State.regs[dstreg] = temp & 0xffffffff;
- z = (State.regs[dstreg] == 0);
- n = (State.regs[dstreg] & 0x80000000) != 0;
- PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
- PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0));
-}
-
-// 1111 1001 1101 1001 Rm Rn; divu Rm,Rn
-8.0xf9+8.0xd9+4.RM2,4.RN0:D1b:::divu
-"divu"
-*am33
-{
- int srcreg, dstreg;
- unsigned64 temp;
- int n, z;
-
- PC = cia;
- srcreg = translate_rreg (SD_, RM2);
- dstreg = translate_rreg (SD_, RN0);
-
- temp = State.regs[REG_MDR];
- temp <<= 32;
- temp |= State.regs[dstreg];
- State.regs[REG_MDR] = temp % State.regs[srcreg];
- temp /= State.regs[srcreg];
- State.regs[dstreg] = temp & 0xffffffff;
- z = (State.regs[dstreg] == 0);
- n = (State.regs[dstreg] & 0x80000000) != 0;
- PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
- PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0));
-}
-
-
-// 1111 1001 0000 1010 Rm Rn; mov (Rm),Rn
-8.0xf9+8.0x0a+4.RN2,4.RM0:D1h:::mov
-"mov"
-*am33
-{
- int srcreg, dstreg;
-
- PC = cia;
- srcreg = translate_rreg (SD_, RM0);
- dstreg = translate_rreg (SD_, RN2);
- State.regs[dstreg] = load_word (State.regs[srcreg]);
-}
-
-// 1111 1001 0001 1010 Rm Rn; mov Rm,(Rn)
-8.0xf9+8.0x1a+4.RM2,4.RN0:D1i:::mov
-"mov"
-*am33
-{
- int srcreg, dstreg;
-
- PC = cia;
- srcreg = translate_rreg (SD_, RM2);
- dstreg = translate_rreg (SD_, RN0);
- store_word (State.regs[dstreg], State.regs[srcreg]);
-}
-
-// 1111 1001 0010 1010 Rm Rn; movbu (Rm),Rn
-8.0xf9+8.0x2a+4.RN2,4.RM0:D1g:::movbu
-"movbu"
-*am33
-{
- int srcreg, dstreg;
-
- PC = cia;
- srcreg = translate_rreg (SD_, RM0);
- dstreg = translate_rreg (SD_, RN2);
- State.regs[dstreg] = load_byte (State.regs[srcreg]);
-}
-
-// 1111 1001 0011 1010 Rm Rn; movbu Rm,(Rn)
-8.0xf9+8.0x3a+4.RM2,4.RN0:D1i:::movbu
-"movbu"
-*am33
-{
- int srcreg, dstreg;
-
- PC = cia;
- srcreg = translate_rreg (SD_, RM2);
- dstreg = translate_rreg (SD_, RN0);
- store_byte (State.regs[dstreg], State.regs[srcreg]);
-}
-
-// 1111 1001 0100 1010 Rm Rn; movhu (Rm),Rn
-8.0xf9+8.0x4a+4.RN2,4.RM0:D1g:::movhu
-"movhu"
-*am33
-{
- int srcreg, dstreg;
-
- PC = cia;
- srcreg = translate_rreg (SD_, RM0);
- dstreg = translate_rreg (SD_, RN2);
- State.regs[dstreg] = load_half (State.regs[srcreg]);
-}
-
-// 1111 1001 0101 1010 Rm Rn; movhu Rm,(Rn)
-8.0xf9+8.0x5a+4.RM2,4.RN0:D1i:::movhu
-"movhu"
-*am33
-{
- int srcreg, dstreg;
-
- PC = cia;
- srcreg = translate_rreg (SD_, RM2);
- dstreg = translate_rreg (SD_, RN0);
- store_half (State.regs[dstreg], State.regs[srcreg]);
-}
-
-// 1111 1001 0110 1010 Rm Rn; mov (Rm+),Rn
-8.0xf9+8.0x6a+4.RN2,4.RM0!RN2:D1y:::mov
-"mov"
-*am33
-{
- int srcreg, dstreg;
-
- PC = cia;
- srcreg = translate_rreg (SD_, RM0);
- dstreg = translate_rreg (SD_, RN2);
- State.regs[dstreg] = load_word (State.regs[srcreg]);
- State.regs[srcreg] += 4;
-}
-
-// 1111 1001 0111 1010 Rm Rn; mov Rm,(Rn+)
-8.0xf9+8.0x7a+4.RM2,4.RN0:D1z:::mov
-"mov"
-*am33
-{
- int srcreg, dstreg;
-
- PC = cia;
- srcreg = translate_rreg (SD_, RM2);
- dstreg = translate_rreg (SD_, RN0);
- store_word (State.regs[dstreg], State.regs[srcreg]);
- State.regs[dstreg] += 4;
-}
-
-// 1111 1001 1000 1010 Rn 0000; mov (sp),Rn
-8.0xf9+8.0x8a+4.RN2,4.0000:D1j:::mov
-"mov"
-*am33
-{
- int dstreg;
-
- PC = cia;
- dstreg = translate_rreg (SD_, RN2);
- State.regs[dstreg] = load_word (State.regs[REG_SP]);
-}
-
-// 1111 1001 1001 1010 Rm 0000; mov Rm, (sp)
-8.0xf9+8.0x9a+4.RM2,4.0000:D1k:::mov
-"mov"
-*am33
-{
- int srcreg;
-
- PC = cia;
- srcreg = translate_rreg (SD_, RM2);
- store_word (State.regs[REG_SP], State.regs[srcreg]);
-}
-
-// 1111 1001 1010 1010 Rn 0000; mobvu (sp),Rn
-8.0xf9+8.0xaa+4.RN2,4.0000:D1j:::movbu
-"movbu"
-*am33
-{
- int dstreg;
-
- PC = cia;
- dstreg = translate_rreg (SD_, RN2);
- State.regs[dstreg] = load_byte (State.regs[REG_SP]);
-}
-
-// 1111 1001 1011 1010 Rm 0000; movbu Rm, (sp)
-8.0xf9+8.0xba+4.RM2,4.0000:D1k:::movbu
-"movbu"
-*am33
-{
- int srcreg;
-
- PC = cia;
- srcreg = translate_rreg (SD_, RM2);
- store_byte (State.regs[REG_SP], State.regs[srcreg]);
-}
-
-// 1111 1001 1000 1100 Rn 0000; movhu (sp),Rn
-8.0xf9+8.0xca+4.RN2,4.0000:D1j:::movhu
-"movhu"
-*am33
-{
- int dstreg;
-
- PC = cia;
- dstreg = translate_rreg (SD_, RN2);
- State.regs[dstreg] = load_half (State.regs[REG_SP]);
-}
-
-// 1111 1001 1001 1101 Rm 0000; movhu Rm, (sp)
-8.0xf9+8.0xda+4.RM2,4.0000:D1k:::movhu
-"movhu"
-*am33
-{
- int srcreg;
-
- PC = cia;
- srcreg = translate_rreg (SD_, RM2);
- store_half (State.regs[REG_SP], State.regs[srcreg]);
-}
-
-// 1111 1001 1110 1010 Rm Rn; movhu (Rm+),Rn
-8.0xf9+8.0xea+4.RN2,4.RM0!RN2:D1y:::movhu
-"movhu"
-*am33
-{
- int srcreg, dstreg;
-
- PC = cia;
- srcreg = translate_rreg (SD_, RM0);
- dstreg = translate_rreg (SD_, RN2);
- State.regs[dstreg] = load_half (State.regs[srcreg]);
- State.regs[srcreg] += 2;
-}
-
-// 1111 1001 1111 1010 Rm Rn; movhu Rm,(Rn+)
-8.0xf9+8.0xfa+4.RM2,4.RN0:D1z:::movhu
-"movhu"
-*am33
-{
- int srcreg, dstreg;
-
- PC = cia;
- srcreg = translate_rreg (SD_, RM2);
- dstreg = translate_rreg (SD_, RN0);
- store_half (State.regs[dstreg], State.regs[srcreg]);
- State.regs[dstreg] += 2;
-}
-
-
-// 1111 1001 0000 1011 Rm Rn; mac Rm,Rn
-8.0xf9+8.0x0b+4.RM2,4.RN0:D1:::mac
-"mac"
-*am33
-{
- int srcreg1, srcreg2;
- signed64 temp, sum;
- int c, v;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM2);
- srcreg2 = translate_rreg (SD_, RN0);
-
- temp = ((signed64)(signed32)State.regs[srcreg2]
- * (signed64)(signed32)State.regs[srcreg1]);
- sum = State.regs[REG_MCRL] + (temp & 0xffffffff);
- c = (sum < State.regs[REG_MCRL]) || (sum < (temp & 0xffffffff));
- State.regs[REG_MCRL] = sum;
- temp >>= 32;
- temp &= 0xffffffff;
- sum = State.regs[REG_MCRH] + temp + c;
- v = ((State.regs[REG_MCRH] & 0x80000000) == (temp & 0x80000000)
- && (temp & 0x80000000) != (sum & 0x80000000));
- State.regs[REG_MCRH] = sum;
- if (v)
- State.regs[REG_MCVF] = 1;
-}
-
-// 1111 1001 0001 1011 Rm Rn; macu Rm,Rn
-8.0xf9+8.0x1b+4.RM2,4.RN0:D1:::macu
-"macu"
-*am33
-{
- int srcreg1, srcreg2;
- unsigned64 temp, sum;
- int c, v;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM2);
- srcreg2 = translate_rreg (SD_, RN0);
-
- temp = ((unsigned64)State.regs[srcreg2]
- * (unsigned64)State.regs[srcreg1]);
- sum = State.regs[REG_MCRL] + (temp & 0xffffffff);
- c = (sum < State.regs[REG_MCRL]) || (sum < (temp & 0xffffffff));
- State.regs[REG_MCRL] = sum;
- temp >>= 32;
- temp &= 0xffffffff;
- sum = State.regs[REG_MCRH] + temp + c;
- v = ((State.regs[REG_MCRH] & 0x80000000) == (temp & 0x80000000)
- && (temp & 0x80000000) != (sum & 0x80000000));
- State.regs[REG_MCRH] = sum;
- if (v)
- State.regs[REG_MCVF] = 1;
-}
-
-// 1111 1001 0010 1011 Rm Rn; macb Rm,Rn
-8.0xf9+8.0x2b+4.RM2,4.RN0:D1:::macb
-"macb"
-*am33
-{
- int srcreg1, srcreg2;
- signed32 temp, sum;
- int v;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM2);
- srcreg2 = translate_rreg (SD_, RN0);
-
- temp = ((signed32)(signed8)(State.regs[srcreg2] & 0xff)
- * (signed32)(signed8)(State.regs[srcreg1] & 0xff));
- sum = State.regs[REG_MCRL] + temp;
- v = ((State.regs[REG_MCRL] & 0x80000000) == (temp & 0x80000000)
- && (temp & 0x80000000) != (sum & 0x80000000));
- State.regs[REG_MCRL] = sum;
- if (v)
- State.regs[REG_MCVF] = 1;
-}
-
-// 1111 1001 0011 1011 Rm Rn; macbu Rm,Rn
-8.0xf9+8.0x3b+4.RM2,4.RN0:D1:::macbu
-"macbu"
-*am33
-{
- int srcreg1, srcreg2;
- signed64 temp, sum;
- int v;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM2);
- srcreg2 = translate_rreg (SD_, RN0);
-
- temp = ((unsigned32)(State.regs[srcreg2] & 0xff)
- * (unsigned32)(State.regs[srcreg1] & 0xff));
- sum = State.regs[REG_MCRL] + temp;
- v = ((State.regs[REG_MCRL] & 0x80000000) == (temp & 0x80000000)
- && (temp & 0x80000000) != (sum & 0x80000000));
- State.regs[REG_MCRL] = sum;
- if (v)
- State.regs[REG_MCVF] = 1;
-}
-
-// 1111 1001 0100 1011 Rm Rn; mach Rm,Rn
-8.0xf9+8.0x4b+4.RM2,4.RN0:D1:::mach
-"mach"
-*am33
-{
- int srcreg1, srcreg2;
- signed64 temp, sum;
- int c, v;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM2);
- srcreg2 = translate_rreg (SD_, RN0);
-
- temp = ((unsigned64)(signed16)(State.regs[srcreg2] & 0xffff)
- * (unsigned64)(signed16)(State.regs[srcreg1] & 0xffff));
- sum = State.regs[REG_MCRL] + (temp & 0xffffffff);
- c = (sum < State.regs[REG_MCRL]) || (sum < (temp & 0xffffffff));
- State.regs[REG_MCRL] = sum;
- temp >>= 32;
- temp &= 0xffffffff;
- sum = State.regs[REG_MCRH] + temp + c;
- v = ((State.regs[REG_MCRH] & 0x80000000) == (temp & 0x80000000)
- && (temp & 0x80000000) != (sum & 0x80000000));
- State.regs[REG_MCRH] = sum;
- if (v)
- State.regs[REG_MCVF] = 1;
-}
-
-// 1111 1001 0101 1011 Rm Rn; machu Rm,Rn
-8.0xf9+8.0x5b+4.RM2,4.RN0:D1:::machu
-"machu"
-*am33
-{
- int srcreg1, srcreg2;
- signed64 temp, sum;
- int c, v;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM2);
- srcreg2 = translate_rreg (SD_, RN0);
-
- temp = ((unsigned64)(State.regs[srcreg2] & 0xffff)
- * (unsigned64)(State.regs[srcreg1] & 0xffff));
- sum = State.regs[REG_MCRL] + (temp & 0xffffffff);
- c = (sum < State.regs[REG_MCRL]) || (sum < (temp & 0xffffffff));
- State.regs[REG_MCRL] = sum;
- temp >>= 32;
- temp &= 0xffffffff;
- sum = State.regs[REG_MCRH] + temp + c;
- v = ((State.regs[REG_MCRH] & 0x80000000) == (temp & 0x80000000)
- && (temp & 0x80000000) != (sum & 0x80000000));
- State.regs[REG_MCRH] = sum;
- if (v)
- State.regs[REG_MCVF] = 1;
-}
-
-// 1111 1001 0110 1011 Rm Rn; dmach Rm,Rn
-8.0xf9+8.0x6b+4.RM2,4.RN0:D1:::dmach
-"dmach"
-*am33
-{
- int srcreg1, srcreg2;
- signed32 temp, temp2, sum;
- int v;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM2);
- srcreg2 = translate_rreg (SD_, RN0);
-
- temp = ((signed32)(signed16)(State.regs[srcreg2] & 0xffff)
- * (signed32)(signed16)(State.regs[srcreg1] & 0xffff));
- temp2 = ((signed32)(signed16)((State.regs[srcreg1] >> 16) & 0xffff)
- * (signed32)(signed16)((State.regs[srcreg2] >> 16) & 0xffff));
- sum = temp + temp2 + State.regs[REG_MCRL];
- v = ((State.regs[REG_MCRL] & 0x80000000) == (temp & 0x80000000)
- && (temp & 0x80000000) != (sum & 0x80000000));
- State.regs[REG_MCRL] = sum;
- if (v)
- State.regs[REG_MCVF] = 1;
-}
-
-// 1111 1001 0111 1011 Rm Rn; dmachu Rm,Rn
-8.0xf9+8.0x7b+4.RM2,4.RN0:D1:::dmachu
-"dmachu"
-*am33
-{
- int srcreg1, srcreg2;
- unsigned32 temp, temp2, sum;
- int v;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM2);
- srcreg2 = translate_rreg (SD_, RN0);
-
- temp = ((unsigned32)(State.regs[srcreg2] & 0xffff)
- * (unsigned32)(State.regs[srcreg1] & 0xffff));
- temp2 = ((unsigned32)((State.regs[srcreg1] >> 16) & 0xffff)
- * (unsigned32)((State.regs[srcreg2] >> 16) & 0xffff));
- sum = temp + temp2 + State.regs[REG_MCRL];
- v = ((State.regs[REG_MCRL] & 0x80000000) == (temp & 0x80000000)
- && (temp & 0x80000000) != (sum & 0x80000000));
- State.regs[REG_MCRL] = sum;
- if (v)
- State.regs[REG_MCVF] = 1;
-}
-
-// 1111 1001 1000 1011 Rm Rn; dmulh Rm,Rn
-8.0xf9+8.0x8b+4.RM2,4.RN0:D1:::dmulh
-"dmulh"
-*am33
-{
- int srcreg, dstreg;
- signed32 temp;
-
- PC = cia;
- srcreg = translate_rreg (SD_, RM2);
- dstreg = translate_rreg (SD_, RN0);
-
- temp = ((signed32)(signed16)(State.regs[dstreg] & 0xffff)
- * (signed32)(signed16)(State.regs[srcreg] & 0xffff));
- State.regs[REG_MDRQ] = temp;
- temp = ((signed32)(signed16)((State.regs[dstreg] >> 16) & 0xffff)
- * (signed32)(signed16)((State.regs[srcreg] >>16) & 0xffff));
- State.regs[dstreg] = temp;
-}
-
-// 1111 1001 1001 1011 Rm Rn; dmulhu Rm,Rn
-8.0xf9+8.0x9b+4.RM2,4.RN0:D1:::dumachu
-"dmachu"
-*am33
-{
- int srcreg, dstreg;
- unsigned32 temp;
-
- PC = cia;
- srcreg = translate_rreg (SD_, RM2);
- dstreg = translate_rreg (SD_, RN0);
-
- temp = ((unsigned32)(State.regs[dstreg] & 0xffff)
- * (unsigned32)(State.regs[srcreg] & 0xffff));
- State.regs[REG_MDRQ] = temp;
- temp = ((unsigned32)((State.regs[dstreg] >> 16) & 0xffff)
- * (unsigned32)((State.regs[srcreg] >>16) & 0xffff));
- State.regs[dstreg] = temp;
-}
-
-// 1111 1001 1010 1011 Rm Rn; sat16 Rm,Rn
-8.0xf9+8.0xab+4.RM2,4.RN0:D1:::sat16
-"sat16"
-*am33
-{
- int srcreg, dstreg;
- int value, z, n;
-
- PC = cia;
- srcreg = translate_rreg (SD_, RM2);
- dstreg = translate_rreg (SD_, RN0);
-
- value = State.regs[srcreg];
-
- if (value >= 0x7fff)
- State.regs[dstreg] = 0x7fff;
- else if (value <= 0xffff8000)
- State.regs[dstreg] = 0xffff8000;
- else
- State.regs[dstreg] = value;
-
- n = (State.regs[dstreg] & 0x8000) != 0;
- z = (State.regs[dstreg] == 0);
- PSW &= ~(PSW_Z | PSW_N);
- PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0));
-}
-
-// 1111 1001 1011 1011 Rm Rn; mcste Rm,Rn
-8.0xf9+8.0xbb+4.RM2,4.RN0:D1:::mcste
-"mcste"
-*am33
-{
- int srcreg, dstreg;
-
- PC = cia;
- srcreg = translate_rreg (SD_, RM2);
- dstreg = translate_rreg (SD_, RN0);
-
- PSW &= ~(PSW_V | PSW_C);
- PSW |= (State.regs[REG_MCVF] ? PSW_V : 0);
-
- /* 32bit saturation. */
- if (State.regs[srcreg] == 0x20)
- {
- signed64 tmp;
-
- tmp = State.regs[REG_MCRH];
- tmp <<= 32;
- tmp += State.regs[REG_MCRL];
-
- if (tmp > 0x7fffffff)
- State.regs[dstreg] = 0x7fffffff;
- else if (tmp < 0xffffffff80000000LL)
- State.regs[dstreg] = 0x80000000;
- else
- State.regs[dstreg] = tmp;
- }
- /* 16bit saturation */
- else if (State.regs[srcreg] == 0x10)
- {
- signed64 tmp;
-
- tmp = State.regs[REG_MCRH];
- tmp <<= 32;
- tmp += State.regs[REG_MCRL];
-
- if (tmp > 0x7fff)
- State.regs[dstreg] = 0x7fff;
- else if (tmp < 0xffffffffffff8000LL)
- State.regs[dstreg] = 0x8000;
- else
- State.regs[dstreg] = tmp;
- }
- /* 8 bit saturation */
- else if (State.regs[srcreg] == 0x8)
- {
- signed64 tmp;
-
- tmp = State.regs[REG_MCRH];
- tmp <<= 32;
- tmp += State.regs[REG_MCRL];
-
- if (tmp > 0x7f)
- State.regs[dstreg] = 0x7f;
- else if (tmp < 0xffffffffffffff80LL)
- State.regs[dstreg] = 0x80;
- else
- State.regs[dstreg] = tmp;
- }
- /* 9 bit saturation */
- else if (State.regs[srcreg] == 0x9)
- {
- signed64 tmp;
-
- tmp = State.regs[REG_MCRH];
- tmp <<= 32;
- tmp += State.regs[REG_MCRL];
-
- if (tmp > 0x80)
- State.regs[dstreg] = 0x80;
- else if (tmp < 0xffffffffffffff81LL)
- State.regs[dstreg] = 0x81;
- else
- State.regs[dstreg] = tmp;
- }
- /* 9 bit saturation */
- else if (State.regs[srcreg] == 0x30)
- {
- signed64 tmp;
-
- tmp = State.regs[REG_MCRH];
- tmp <<= 32;
- tmp += State.regs[REG_MCRL];
-
- if (tmp > 0x7fffffffffffLL)
- tmp = 0x7fffffffffffLL;
- else if (tmp < 0xffff800000000000LL)
- tmp = 0xffff800000000000LL;
-
- tmp >>= 16;
- State.regs[dstreg] = tmp;
- }
-}
-
-// 1111 1001 1100 1011 Rm Rn; swap Rm,Rn
-8.0xf9+8.0xcb+4.RM2,4.RN0:D1:::swap
-"swap"
-*am33
-{
- int srcreg, dstreg;
-
- PC = cia;
- srcreg = translate_rreg (SD_, RM2);
- dstreg = translate_rreg (SD_, RN0);
-
- State.regs[dstreg] = (((State.regs[srcreg] & 0xff) << 24)
- | (((State.regs[srcreg] >> 8) & 0xff) << 16)
- | (((State.regs[srcreg] >> 16) & 0xff) << 8)
- | ((State.regs[srcreg] >> 24) & 0xff));
-}
-
-// 1111 1101 1101 1011 Rm Rn; swaph Rm,Rn
-8.0xf9+8.0xdb+4.RM2,4.RN0:D1:::swaph
-"swaph"
-*am33
-{
- int srcreg, dstreg;
-
- PC = cia;
- srcreg = translate_rreg (SD_, RM2);
- dstreg = translate_rreg (SD_, RN0);
-
- State.regs[dstreg] = (((State.regs[srcreg] & 0xff) << 8)
- | ((State.regs[srcreg] >> 8) & 0xff)
- | (((State.regs[srcreg] >> 16) & 0xff) << 24)
- | (((State.regs[srcreg] >> 24) & 0xff) << 16));
-}
-
-// 1111 1001 1110 1011 Rm Rn; swhw Rm,Rn
-8.0xf9+8.0xeb+4.RM2,4.RN0:D1:::swhw
-"swhw"
-*am33
-{
- int srcreg, dstreg;
-
- PC = cia;
- srcreg = translate_rreg (SD_, RM2);
- dstreg = translate_rreg (SD_, RN0);
-
- State.regs[dstreg] = (((State.regs[srcreg] & 0xffff) << 16)
- | ((State.regs[srcreg] >> 16) & 0xffff));
-}
-
-// 1111 1001 1111 1011 Rm Rn; bsch Rm,Rn
-8.0xf9+8.0xfb+4.RM2,4.RN0:D1:::bsch
-"bsch"
-*am33
-{
- int temp, c, i;
- int srcreg, dstreg;
- int start;
-
- PC = cia;
- srcreg = translate_rreg (SD_, RM2);
- dstreg = translate_rreg (SD_, RN0);
-
- temp = State.regs[srcreg];
- start = (State.regs[dstreg] & 0x1f) - 1;
- if (start == -1)
- start = 31;
-
- c = 0;
- for (i = start; i >= 0; i--)
- {
- if (temp & (1 << i))
- {
- c = 1;
- State.regs[dstreg] = i;
- break;
- }
- }
-
- if (i < 0)
- {
- c = 0;
- State.regs[dstreg] = 0;
- }
- PSW &= ~(PSW_C);
- PSW |= (c ? PSW_C : 0);
-}
-
-
-// 1111 1011 0000 1000 Rn Rn IMM8; mov IMM8,Rn
-8.0xfb+8.0x08+4.RM2,4.RN0=RM2+8.IMM8:D2j:::mov
-"mov"
-*am33
-{
- int dstreg;
-
- PC = cia;
- dstreg = translate_rreg (SD_, RN0);
- State.regs[dstreg] = EXTEND8 (IMM8);
-}
-
-// 1111 1011 0001 1000 Rn Rn IMM8; movu IMM8,Rn
-8.0xfb+8.0x18+4.RM2,4.RN0=RM2+8.IMM8:D2:::movu
-"movu"
-*am33
-{
- int dstreg;
-
- PC = cia;
- dstreg = translate_rreg (SD_, RN0);
- State.regs[dstreg] = IMM8 & 0xff;
-}
-
-// 1111 1011 0111 1000 Rn Rn IMM8; add IMM8,Rn
-8.0xfb+8.0x78+4.RM2,4.RN0=RM2+8.IMM8:D2d:::add
-"add"
-*am33
-{
- int dstreg;
-
- PC = cia;
- dstreg = translate_rreg (SD_, RN0);
- genericAdd (EXTEND8 (IMM8), dstreg);
-}
-
-// 1111 1011 1000 1000 Rn Rn IMM8; addc IMM8,Rn
-8.0xfb+8.0x88+4.RM2,4.RN0=RM2+8.IMM8:D2d:::addc
-"addc"
-*am33
-{
- int dstreg, imm;
- int z, c, n, v;
- unsigned32 reg2, sum;
-
- PC = cia;
- dstreg = translate_rreg (SD_, RN0);
-
- imm = EXTEND8 (IMM8);
- reg2 = State.regs[dstreg];
- sum = imm + reg2 + ((PSW & PSW_C) != 0);
- State.regs[dstreg] = sum;
-
- z = ((PSW & PSW_Z) != 0) && (sum == 0);
- n = (sum & 0x80000000);
- c = (sum < imm) || (sum < reg2);
- v = ((reg2 & 0x80000000) == (imm & 0x80000000)
- && (reg2 & 0x80000000) != (sum & 0x80000000));
-
- PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
- PSW |= ((z ? PSW_Z : 0) | ( n ? PSW_N : 0)
- | (c ? PSW_C : 0) | (v ? PSW_V : 0));
-}
-
-// 1111 1011 1001 1000 Rn Rn IMM8; sub IMM8,Rn
-8.0xfb+8.0x98+4.RM2,4.RN0=RM2+8.IMM8:D2d:::sub
-"sub"
-*am33
-{
- int dstreg;
-
- PC = cia;
- dstreg = translate_rreg (SD_, RN0);
-
- genericSub (EXTEND8 (IMM8), dstreg);
-}
-
-// 1111 1011 1010 1000 Rn Rn IMM8; subc IMM8,Rn
-8.0xfb+8.0xa8+4.RM2,4.RN0=RM2+8.IMM8:D2d:::subc
-"subc"
-*am33
-{
- int imm, dstreg;
- int z, c, n, v;
- unsigned32 reg2, difference;
-
- PC = cia;
- dstreg = translate_rreg (SD_, RN0);
-
- imm = EXTEND8 (IMM8);
- reg2 = State.regs[dstreg];
- difference = reg2 - imm - ((PSW & PSW_C) != 0);
- State.regs[dstreg] = difference;
-
- z = ((PSW & PSW_Z) != 0) && (difference == 0);
- n = (difference & 0x80000000);
- c = (imm > reg2);
- v = ((reg2 & 0x80000000) == (imm & 0x80000000)
- && (reg2 & 0x80000000) != (difference & 0x80000000));
-
- PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
- PSW |= ((z ? PSW_Z : 0) | ( n ? PSW_N : 0)
- | (c ? PSW_C : 0) | (v ? PSW_V : 0));
-}
-
-// 1111 1011 1101 1000 Rn Rn IMM8; cmp IMM8,Rn
-8.0xfb+8.0xd8+4.RM2,4.RN0=RM2+8.IMM8:D2b:::cmp
-"cmp"
-*am33
-{
- int srcreg;
-
- PC = cia;
- srcreg = translate_rreg (SD_, RN0);
- genericCmp (EXTEND8 (IMM8), State.regs[srcreg]);
-}
-
-// 1111 1011 1111 1000 XRn XRn IMM8; mov IMM8,XRn
-8.0xfb+8.0xf8+4.XRM2,4.XRN0=XRM2+8.IMM8:D2k:::mov
-"mov"
-*am33
-{
- int dstreg;
-
- PC = cia;
- dstreg = translate_xreg (SD_, XRN0);
-
- State.regs[dstreg] = IMM8;
-}
-
-// 1111 1011 0000 1001 Rn Rn IMM8; and IMM8,Rn
-8.0xfb+8.0x09+4.RM2,4.RN0=RM2+8.IMM8:D2d:::and
-"and"
-*am33
-{
- int dstreg;
- int z, n;
-
- PC = cia;
- dstreg = translate_rreg (SD_, RN0);
-
- State.regs[dstreg] &= (IMM8 & 0xff);
- z = (State.regs[dstreg] == 0);
- n = (State.regs[dstreg] & 0x80000000) != 0;
- PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
- PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0));
-}
-
-// 1111 1011 0001 1001 Rn Rn IMM8; or IMM8,Rn
-8.0xfb+8.0x19+4.RM2,4.RN0=RM2+8.IMM8:D2d:::or
-"or"
-*am33
-{
- int dstreg;
- int z, n;
-
- PC = cia;
- dstreg = translate_rreg (SD_, RN0);
-
- State.regs[dstreg] |= (IMM8 & 0xff);
- z = (State.regs[dstreg] == 0);
- n = (State.regs[dstreg] & 0x80000000) != 0;
- PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
- PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0));
-}
-
-// 1111 1011 0010 1001 Rn Rn IMM8; xor IMM8,Rn
-8.0xfb+8.0x29+4.RM2,4.RN0=RM2+8.IMM8:D2d:::xor
-"xor"
-*am33
-{
- int dstreg;
- int z, n;
-
- PC = cia;
- dstreg = translate_rreg (SD_, RN0);
-
- State.regs[dstreg] ^= (IMM8 & 0xff);
- z = (State.regs[dstreg] == 0);
- n = (State.regs[dstreg] & 0x80000000) != 0;
- PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
- PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0));
-}
-
-// 1111 1011 0100 1001 Rn Rn IMM8; asr IMM8,Rn
-8.0xfb+8.0x49+4.RM2,4.RN0=RM2+8.IMM8:D2a:::asr
-"asr"
-*am33
-{
- int dstreg;
- signed32 temp;
- int c, z, n;
-
- PC = cia;
- dstreg = translate_rreg (SD_, RN0);
-
- temp = State.regs[dstreg];
- c = temp & 1;
- temp >>= (IMM8 & 0xff);
- State.regs[dstreg] = temp;
- z = (State.regs[dstreg] == 0);
- n = (State.regs[dstreg] & 0x80000000) != 0;
- PSW &= ~(PSW_Z | PSW_N | PSW_C);
- PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0) | (c ? PSW_C : 0));
-}
-
-// 1111 1011 0101 1001 Rn Rn IMM8; lsr IMM8,Rn
-8.0xfb+8.0x59+4.RM2,4.RN0=RM2+8.IMM8:D2a:::lsr
-"lsr"
-*am33
-{
- int dstreg;
- int z, n, c;
-
- PC = cia;
- dstreg = translate_rreg (SD_, RN0);
-
- c = State.regs[dstreg] & 1;
- State.regs[dstreg] >>= (IMM8 & 0xff);
- z = (State.regs[dstreg] == 0);
- n = (State.regs[dstreg] & 0x80000000) != 0;
- PSW &= ~(PSW_Z | PSW_N | PSW_C);
- PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0) | (c ? PSW_C : 0));
-}
-
-// 1111 1011 0110 1001 Rn Rn IMM8; asl IMM8,Rn
-8.0xfb+8.0x69+4.RM2,4.RN0=RM2+8.IMM8:D2a:::asl
-"asl"
-*am33
-{
- int dstreg;
- int z, n;
-
- PC = cia;
- dstreg = translate_rreg (SD_, RN0);
-
- State.regs[dstreg] <<= (IMM8 & 0xff);
- z = (State.regs[dstreg] == 0);
- n = (State.regs[dstreg] & 0x80000000) != 0;
- PSW &= ~(PSW_Z | PSW_N);
- PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0));
-}
-
-// 1111 1011 1010 1001 Rn Rn IMM8; mul IMM8,Rn
-8.0xfb+8.0xa9+4.RM2,4.RN0=RM2+8.IMM8:D2a:::mul
-"mul"
-*am33
-{
- int dstreg;
- unsigned64 temp;
- int z, n;
-
- PC = cia;
- dstreg = translate_rreg (SD_, RN0);
-
- temp = ((signed64)(signed32)State.regs[dstreg]
- * (signed64)(signed32)EXTEND8 (IMM8));
- State.regs[dstreg] = temp & 0xffffffff;
- State.regs[REG_MDR] = (temp & 0xffffffff00000000LL) >> 32;
- z = (State.regs[dstreg] == 0);
- n = (State.regs[dstreg] & 0x80000000) != 0;
- PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
- PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0));
-}
-
-// 1111 1011 1011 1001 Rn Rn IMM8; mulu IMM8,Rn
-8.0xfb+8.0xb9+4.RM2,4.RN0=RM2+8.IMM8:D2a:::mulu
-"mulu"
-*am33
-{
- int dstreg;
- unsigned64 temp;
- int z, n;
-
- PC = cia;
- dstreg = translate_rreg (SD_, RN0);
-
- temp = ((unsigned64)State.regs[dstreg]
- * (unsigned64)(IMM8 & 0xff));
- State.regs[dstreg] = temp & 0xffffffff;
- State.regs[REG_MDR] = (temp & 0xffffffff00000000LL) >> 32;
- z = (State.regs[dstreg] == 0);
- n = (State.regs[dstreg] & 0x80000000) != 0;
- PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
- PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0));
-}
-
-// 1111 1011 1110 1001 Rn Rn IMM8; btst imm8,Rn
-8.0xfb+8.0xe9+4.RN2,4.RM0=RN2+8.IMM8:D2l:::btst
-"btst"
-*am33
-{
- int srcreg;
-
- PC = cia;
- srcreg = translate_rreg (SD_, RM0);
- genericBtst(IMM8, State.regs[srcreg]);
-}
-
-// 1111 1011 0000 1010 Rn Rm IMM8; mov (d8,Rm),Rn
-8.0xfb+8.0x0a+4.RN2,4.RM0+8.IMM8:D2l:::mov
-"mov"
-*am33
-{
- int srcreg, dstreg;
-
- PC = cia;
- srcreg = translate_rreg (SD_, RM0);
- dstreg = translate_rreg (SD_, RN2);
- State.regs[dstreg] = load_word (State.regs[srcreg] + EXTEND8 (IMM8));
-}
-
-// 1111 1011 0001 1010 Rn Rm IMM8; mov Rm,(d8,Rn)
-8.0xfb+8.0x1a+4.RM2,4.RN0+8.IMM8:D2m:::mov
-"mov"
-*am33
-{
- int srcreg, dstreg;
-
- PC = cia;
- srcreg = translate_rreg (SD_, RM2);
- dstreg = translate_rreg (SD_, RN0);
- store_word (State.regs[dstreg] + EXTEND8 (IMM8), State.regs[srcreg]);
-}
-
-// 1111 1011 0010 1010 Rn Rm IMM8; movbu (d8,Rm),Rn
-8.0xfb+8.0x2a+4.RN2,4.RM0+8.IMM8:D2l:::movbu
-"movbu"
-*am33
-{
- int srcreg, dstreg;
-
- PC = cia;
- srcreg = translate_rreg (SD_, RM0);
- dstreg = translate_rreg (SD_, RN2);
- State.regs[dstreg] = load_byte (State.regs[srcreg] + EXTEND8 (IMM8));
-}
-
-// 1111 1011 0011 1010 Rn Rm IMM8; movbu Rm,(d8,Rn)
-8.0xfb+8.0x3a+4.RM2,4.RN0+8.IMM8:D2m:::movbu
-"movbu"
-*am33
-{
- int srcreg, dstreg;
-
- PC = cia;
- srcreg = translate_rreg (SD_, RM2);
- dstreg = translate_rreg (SD_, RN0);
- store_byte (State.regs[dstreg] + EXTEND8 (IMM8), State.regs[srcreg]);
-}
-
-// 1111 1011 0100 1010 Rn Rm IMM8; movhu (d8,Rm),Rn
-8.0xfb+8.0x4a+4.RN2,4.RM0+8.IMM8:D2l:::movhu
-"movhu"
-*am33
-{
- int srcreg, dstreg;
-
- PC = cia;
- srcreg = translate_rreg (SD_, RM0);
- dstreg = translate_rreg (SD_, RN2);
- State.regs[dstreg] = load_half (State.regs[srcreg] + EXTEND8 (IMM8));
-}
-
-// 1111 1011 0101 1010 Rn Rm IMM8; movhu Rm,(d8,Rn)
-8.0xfb+8.0x5a+4.RM2,4.RN0+8.IMM8:D2m:::movhu
-"movhu"
-*am33
-{
- int srcreg, dstreg;
-
- PC = cia;
- srcreg = translate_rreg (SD_, RM2);
- dstreg = translate_rreg (SD_, RN0);
- store_half (State.regs[dstreg] + EXTEND8 (IMM8), State.regs[srcreg]);
-}
-
-// 1111 1011 0110 1010 Rn Rm IMM8; mov (d8,Rm+),Rn
-8.0xfb+8.0x6a+4.RN2,4.RM0!RN2+8.IMM8:D2y:::mov
-"mov"
-*am33
-{
- int srcreg, dstreg;
-
- PC = cia;
- srcreg = translate_rreg (SD_, RM0);
- dstreg = translate_rreg (SD_, RN2);
- State.regs[dstreg] = load_word (State.regs[srcreg]);
- State.regs[srcreg] += EXTEND8 (IMM8);
-}
-
-// 1111 1011 0111 1010 Rn Rm IMM8; mov Rm,(d8,Rn+)
-8.0xfb+8.0x7a+4.RM2,4.RN0+8.IMM8:D2z:::mov
-"mov"
-*am33
-{
- int srcreg, dstreg;
-
- PC = cia;
- srcreg = translate_rreg (SD_, RM2);
- dstreg = translate_rreg (SD_, RN0);
- store_word (State.regs[dstreg], State.regs[srcreg]);
- State.regs[dstreg] += EXTEND8 (IMM8);
-}
-
-
-// 1111 1011 1000 1010 Rn 0000 IMM8; mov (d8,sp),Rn
-8.0xfb+8.0x8a+4.RN2,4.0x0+8.IMM8:D2n:::mov
-"mov"
-*am33
-{
- int dstreg;
-
- PC = cia;
- dstreg = translate_rreg (SD_, RN2);
- State.regs[dstreg] = load_word (State.regs[REG_SP] + IMM8);
-}
-
-// 1111 1011 1001 1010 Rm 0000 IMM8; mov Rm,(d8,sp)
-8.0xfb+8.0x9a+4.RM2,4.0x0+8.IMM8:D2o:::mov
-"mov"
-*am33
-{
- int srcreg;
-
- PC = cia;
- srcreg = translate_rreg (SD_, RM2);
- store_word (State.regs[REG_SP] + IMM8, State.regs[srcreg]);
-}
-
-// 1111 1011 1010 1010 Rn Rm IMM8; movbu (d8,sp),Rn
-8.0xfb+8.0xaa+4.RN2,4.0x0+8.IMM8:D2n:::movbu
-"movbu"
-*am33
-{
- int dstreg;
-
- PC = cia;
- dstreg = translate_rreg (SD_, RN2);
- State.regs[dstreg] = load_byte (State.regs[REG_SP] + IMM8);
-}
-
-// 1111 1011 1011 1010 Rn Rm IMM8; movbu Rm,(d8,sp)
-8.0xfb+8.0xba+4.RM2,4.0x0+8.IMM8:D2o:::movbu
-"movbu"
-*am33
-{
- int srcreg;
-
- PC = cia;
- srcreg = translate_rreg (SD_, RM2);
- store_byte (State.regs[REG_SP] + IMM8, State.regs[srcreg]);
-}
-
-// 1111 1011 1100 1010 Rn Rm IMM8; movhu (d8,sp),Rn
-8.0xfb+8.0xca+4.RN2,4.0x0+8.IMM8:D2n:::movhu
-"movhu"
-*am33
-{
- int dstreg;
-
- PC = cia;
- dstreg = translate_rreg (SD_, RN2);
- State.regs[dstreg] = load_half (State.regs[REG_SP] + IMM8);
-}
-
-// 1111 1011 1101 1010 Rn Rm IMM8; movhu Rm,(d8,sp)
-8.0xfb+8.0xda+4.RM2,4.0x0+8.IMM8:D2o:::movhu
-"movhu"
-*am33
-{
- int srcreg;
-
- PC = cia;
- srcreg = translate_rreg (SD_, RM2);
- store_half (State.regs[REG_SP] + IMM8, State.regs[srcreg]);
-}
-
-// 1111 1011 1110 1010 Rn Rm IMM8; movhu (d8,Rm+),Rn
-8.0xfb+8.0xea+4.RN2,4.RM0!RN2+8.IMM8:D2y:::movhu
-"movhu"
-*am33
-{
- int srcreg, dstreg;
-
- PC = cia;
- srcreg = translate_rreg (SD_, RM0);
- dstreg = translate_rreg (SD_, RN2);
- State.regs[dstreg] = load_half (State.regs[srcreg]);
- State.regs[srcreg] += EXTEND8 (IMM8);
-}
-
-// 1111 1011 1111 1010 Rn Rm IMM8; movhu Rm,(d8,Rn+)
-8.0xfb+8.0xfa+4.RM2,4.RN0+8.IMM8:D2z:::movhu
-"movhu"
-*am33
-{
- int srcreg, dstreg;
-
- PC = cia;
- srcreg = translate_rreg (SD_, RM2);
- dstreg = translate_rreg (SD_, RN0);
- store_half (State.regs[dstreg], State.regs[srcreg]);
- State.regs[dstreg] += EXTEND8 (IMM8);
-}
-
-
-// 1111 1011 0000 1011 Rn Rn IMM8; mac imm8,Rn
-8.0xfb+8.0x0b+4.RN2,4.RN0=RN2+8.IMM8:D2:::mac
-"mac"
-*am33
-{
- int srcreg;
- signed64 temp, sum;
- int c, v;
-
- PC = cia;
- srcreg = translate_rreg (SD_, RN2);
-
- temp = ((signed64)(signed32)EXTEND8 (IMM8)
- * (signed64)(signed32)State.regs[srcreg]);
- sum = State.regs[REG_MCRL] + (temp & 0xffffffff);
- c = (sum < State.regs[REG_MCRL]) || (sum < (temp & 0xffffffff));
- State.regs[REG_MCRL] = sum;
- temp >>= 32;
- temp &= 0xffffffff;
- sum = State.regs[REG_MCRH] + temp + c;
- v = ((State.regs[REG_MCRH] & 0x80000000) == (temp & 0x80000000)
- && (temp & 0x80000000) != (sum & 0x80000000));
- State.regs[REG_MCRH] = sum;
- if (v)
- State.regs[REG_MCVF] = 1;
-}
-
-// 1111 1011 0001 1011 Rn Rn IMM8; macu imm8,Rn
-8.0xfb+8.0x1b+4.RN2,4.RN0=RN2+8.IMM8:D2:::macu
-"macu"
-*am33
-{
- int srcreg;
- signed64 temp, sum;
- int c, v;
-
- PC = cia;
- srcreg = translate_rreg (SD_, RN2);
-
- temp = ((unsigned64) (IMM8)
- * (unsigned64)State.regs[srcreg]);
- sum = State.regs[REG_MCRL] + (temp & 0xffffffff);
- c = (sum < State.regs[REG_MCRL]) || (sum < (temp & 0xffffffff));
- State.regs[REG_MCRL] = sum;
- temp >>= 32;
- temp &= 0xffffffff;
- sum = State.regs[REG_MCRH] + temp + c;
- v = ((State.regs[REG_MCRH] & 0x80000000) == (temp & 0x80000000)
- && (temp & 0x80000000) != (sum & 0x80000000));
- State.regs[REG_MCRH] = sum;
- if (v)
- State.regs[REG_MCVF] = 1;
-}
-
-// 1111 1011 0010 1011 Rn Rn IMM8; macb imm8,Rn
-8.0xfb+8.0x2b+4.RN2,4.RN0=RN2+8.IMM8:D2:::macb
-"macb"
-*am33
-{
- int srcreg;
- signed64 temp, sum;
- int c, v;
-
- PC = cia;
- srcreg = translate_rreg (SD_, RN2);
-
- temp = ((signed64)(signed8)EXTEND8 (IMM8)
- * (signed64)(signed8)State.regs[srcreg] & 0xff);
- sum = State.regs[REG_MCRL] + (temp & 0xffffffff);
- c = (sum < State.regs[REG_MCRL]) || (sum < (temp & 0xffffffff));
- State.regs[REG_MCRL] = sum;
- temp >>= 32;
- temp &= 0xffffffff;
- sum = State.regs[REG_MCRH] + temp + c;
- v = ((State.regs[REG_MCRH] & 0x80000000) == (temp & 0x80000000)
- && (temp & 0x80000000) != (sum & 0x80000000));
- State.regs[REG_MCRH] = sum;
- if (v)
- State.regs[REG_MCVF] = 1;
-}
-
-// 1111 1011 0011 1011 Rn Rn IMM8; macbu imm8,Rn
-8.0xfb+8.0x3b+4.RN2,4.RN0=RN2+8.IMM8:D2:::macbu
-"macbu"
-*am33
-{
- int srcreg;
- signed64 temp, sum;
- int c, v;
-
- PC = cia;
- srcreg = translate_rreg (SD_, RN2);
-
- temp = ((unsigned64) (IMM8)
- * (unsigned64)State.regs[srcreg] & 0xff);
- sum = State.regs[REG_MCRL] + (temp & 0xffffffff);
- c = (sum < State.regs[REG_MCRL]) || (sum < (temp & 0xffffffff));
- State.regs[REG_MCRL] = sum;
- temp >>= 32;
- temp &= 0xffffffff;
- sum = State.regs[REG_MCRH] + temp + c;
- v = ((State.regs[REG_MCRH] & 0x80000000) == (temp & 0x80000000)
- && (temp & 0x80000000) != (sum & 0x80000000));
- State.regs[REG_MCRH] = sum;
- if (v)
- State.regs[REG_MCVF] = 1;
-}
-
-// 1111 1011 0100 1011 Rn Rn IMM8; mach imm8,Rn
-8.0xfb+8.0x4b+4.RN2,4.RN0=RN2+8.IMM8:D2:::mach
-"mach"
-*am33
-{
- int srcreg;
- signed64 temp, sum;
- int c, v;
-
- PC = cia;
- srcreg = translate_rreg (SD_, RN2);
-
- temp = ((signed64)(signed16)EXTEND8 (IMM8)
- * (signed64)(signed16)State.regs[srcreg] & 0xffff);
- sum = State.regs[REG_MCRL] + (temp & 0xffffffff);
- c = (sum < State.regs[REG_MCRL]) || (sum < (temp & 0xffffffff));
- State.regs[REG_MCRL] = sum;
- temp >>= 32;
- temp &= 0xffffffff;
- sum = State.regs[REG_MCRH] + temp + c;
- v = ((State.regs[REG_MCRH] & 0x80000000) == (temp & 0x80000000)
- && (temp & 0x80000000) != (sum & 0x80000000));
- State.regs[REG_MCRH] = sum;
- if (v)
- State.regs[REG_MCVF] = 1;
-}
-
-// 1111 1011 0101 1011 Rn Rn IMM8; machu imm8,Rn
-8.0xfb+8.0x5b+4.RN2,4.RN0=RN2+8.IMM8:D2:::machu
-"machu"
-*am33
-{
- int srcreg;
- signed64 temp, sum;
- int c, v;
-
- PC = cia;
- srcreg = translate_rreg (SD_, RN2);
-
- temp = ((unsigned64) (IMM8)
- * (unsigned64)State.regs[srcreg] & 0xffff);
- sum = State.regs[REG_MCRL] + (temp & 0xffffffff);
- c = (sum < State.regs[REG_MCRL]) || (sum < (temp & 0xffffffff));
- State.regs[REG_MCRL] = sum;
- temp >>= 32;
- temp &= 0xffffffff;
- sum = State.regs[REG_MCRH] + temp + c;
- v = ((State.regs[REG_MCRH] & 0x80000000) == (temp & 0x80000000)
- && (temp & 0x80000000) != (sum & 0x80000000));
- State.regs[REG_MCRH] = sum;
- if (v)
- State.regs[REG_MCVF] = 1;
-}
-
-// 1111 1011 1011 1011 Rn Rn IMM8; mcste imm8,Rn
-8.0xfb+8.0xbb+4.RN2,4.RN0=RN2+8.IMM8:D2:::mcste
-"mcste"
-*am33
-{
- int dstreg;
-
- PC = cia;
- dstreg = translate_rreg (SD_, RN0);
-
- PSW &= ~(PSW_V | PSW_C);
- PSW |= (State.regs[REG_MCVF] ? PSW_V : 0);
-
- /* 32bit saturation. */
- if (IMM8 == 0x20)
- {
- signed64 tmp;
-
- tmp = State.regs[REG_MCRH];
- tmp <<= 32;
- tmp += State.regs[REG_MCRL];
-
- if (tmp > 0x7fffffff)
- State.regs[dstreg] = 0x7fffffff;
- else if (tmp < 0xffffffff80000000LL)
- State.regs[dstreg] = 0x80000000;
- else
- State.regs[dstreg] = tmp;
- }
- /* 16bit saturation */
- else if (IMM8 == 0x10)
- {
- signed64 tmp;
-
- tmp = State.regs[REG_MCRH];
- tmp <<= 32;
- tmp += State.regs[REG_MCRL];
-
- if (tmp > 0x7fff)
- State.regs[dstreg] = 0x7fff;
- else if (tmp < 0xffffffffffff8000LL)
- State.regs[dstreg] = 0x8000;
- else
- State.regs[dstreg] = tmp;
- }
- /* 8 bit saturation */
- else if (IMM8 == 0x8)
- {
- signed64 tmp;
-
- tmp = State.regs[REG_MCRH];
- tmp <<= 32;
- tmp += State.regs[REG_MCRL];
-
- if (tmp > 0x7f)
- State.regs[dstreg] = 0x7f;
- else if (tmp < 0xffffffffffffff80LL)
- State.regs[dstreg] = 0x80;
- else
- State.regs[dstreg] = tmp;
- }
- /* 9 bit saturation */
- else if (IMM8 == 0x9)
- {
- signed64 tmp;
-
- tmp = State.regs[REG_MCRH];
- tmp <<= 32;
- tmp += State.regs[REG_MCRL];
-
- if (tmp > 0x80)
- State.regs[dstreg] = 0x80;
- else if (tmp < 0xffffffffffffff81LL)
- State.regs[dstreg] = 0x81;
- else
- State.regs[dstreg] = tmp;
- }
- /* 9 bit saturation */
- else if (IMM8 == 0x30)
- {
- signed64 tmp;
-
- tmp = State.regs[REG_MCRH];
- tmp <<= 32;
- tmp += State.regs[REG_MCRL];
-
- if (tmp > 0x7fffffffffffLL)
- tmp = 0x7fffffffffffLL;
- else if (tmp < 0xffff800000000000LL)
- tmp = 0xffff800000000000LL;
-
- tmp >>= 16;
- State.regs[dstreg] = tmp;
- }
-}
-
-// 1111 1011 0111 1100 Rm Rn Rd; add Rm,Rn,Rd
-8.0xfb+8.0x7c+4.RM2,4.RN0+4.RD0,4.0x0:D2c:::add
-"add"
-*am33
-{
- int z, c, n, v;
- unsigned32 sum, source1, source2;
- int srcreg1, srcreg2, dstreg;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM2);
- srcreg2 = translate_rreg (SD_, RN0);
- dstreg = translate_rreg (SD_, RD0);
-
- source1 = State.regs[srcreg1];
- source2 = State.regs[srcreg2];
- sum = source1 + source2;
- State.regs[dstreg] = sum;
-
- z = (sum == 0);
- n = (sum & 0x80000000);
- c = (sum < source1) || (sum < source2);
- v = ((source1 & 0x80000000) == (source2 & 0x80000000)
- && (source1 & 0x80000000) != (sum & 0x80000000));
-
- PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
- PSW |= ((z ? PSW_Z : 0) | ( n ? PSW_N : 0)
- | (c ? PSW_C : 0) | (v ? PSW_V : 0));
-}
-
-// 1111 1011 1000 1100 Rm Rn Rd; addc Rm,Rn,Rd
-8.0xfb+8.0x8c+4.RM2,4.RN0+4.RD0,4.0x0:D2c:::addc
-"addc"
-*am33
-{
- int z, c, n, v;
- unsigned32 sum, source1, source2;
- int srcreg1, srcreg2, dstreg;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM2);
- srcreg2 = translate_rreg (SD_, RN0);
- dstreg = translate_rreg (SD_, RD0);
-
- source1 = State.regs[srcreg1];
- source2 = State.regs[srcreg2];
- sum = source1 + source2 + ((PSW & PSW_C) != 0);
- State.regs[dstreg] = sum;
-
- z = ((PSW & PSW_Z) != 0) && (sum == 0);
- n = (sum & 0x80000000);
- c = (sum < source1) || (sum < source2);
- v = ((source1 & 0x80000000) == (source2 & 0x80000000)
- && (source1 & 0x80000000) != (sum & 0x80000000));
-
- PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
- PSW |= ((z ? PSW_Z : 0) | ( n ? PSW_N : 0)
- | (c ? PSW_C : 0) | (v ? PSW_V : 0));
-}
-
-// 1111 1011 1001 1100 Rm Rn Rd; sub Rm,Rn,Rd
-8.0xfb+8.0x9c+4.RM2,4.RN0+4.RD0,4.0x0:D2c:::sub
-"sub"
-*am33
-{
- int z, c, n, v;
- unsigned32 difference, source1, source2;
- int srcreg1, srcreg2, dstreg;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM2);
- srcreg2 = translate_rreg (SD_, RN0);
- dstreg = translate_rreg (SD_, RD0);
-
- source1 = State.regs[srcreg1];
- source2 = State.regs[srcreg2];
- difference = source2 - source1;
- State.regs[dstreg] = difference;
-
- z = (difference == 0);
- n = (difference & 0x80000000);
- c = (source1 > source1);
- v = ((source1 & 0x80000000) == (source2 & 0x80000000)
- && (source1 & 0x80000000) != (difference & 0x80000000));
-
- PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
- PSW |= ((z ? PSW_Z : 0) | ( n ? PSW_N : 0)
- | (c ? PSW_C : 0) | (v ? PSW_V : 0));
-}
-
-// 1111 1011 1010 1100 Rm Rn Rd; subc Rm,Rn,Rd
-8.0xfb+8.0xac+4.RM2,4.RN0+4.RD0,4.0x0:D2c:::subc
-"subc"
-*am33
-{
- int z, c, n, v;
- unsigned32 difference, source1, source2;
- int srcreg1, srcreg2, dstreg;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM2);
- srcreg2 = translate_rreg (SD_, RN0);
- dstreg = translate_rreg (SD_, RD0);
-
- source1 = State.regs[srcreg1];
- source2 = State.regs[srcreg2];
- difference = source2 - source1 - ((PSW & PSW_C) != 0);
- State.regs[dstreg] = difference;
-
- z = ((PSW & PSW_Z) != 0) && (difference == 0);
- n = (difference & 0x80000000);
- c = (source1 > source2);
- v = ((source1 & 0x80000000) == (source2 & 0x80000000)
- && (source1 & 0x80000000) != (difference & 0x80000000));
-
- PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
- PSW |= ((z ? PSW_Z : 0) | ( n ? PSW_N : 0)
- | (c ? PSW_C : 0) | (v ? PSW_V : 0));
-}
-
-// 1111 1011 0000 1101 Rm Rn Rd; and Rm,Rn,Rd
-8.0xfb+8.0x0d+4.RM2,4.RN0+4.RD0,4.0x0:D2c:::and
-"and"
-*am33
-{
- int z, n;
- int srcreg1, srcreg2, dstreg;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM2);
- srcreg2 = translate_rreg (SD_, RN0);
- dstreg = translate_rreg (SD_, RD0);
-
- State.regs[dstreg] = State.regs[srcreg1] & State.regs[srcreg2];
-
- z = (State.regs[dstreg] == 0);
- n = (State.regs[dstreg] & 0x80000000);
-
- PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
- PSW |= ((z ? PSW_Z : 0) | ( n ? PSW_N : 0));
-}
-
-// 1111 1011 0001 1101 Rm Rn Rd; or Rm,Rn,Rd
-8.0xfb+8.0x1d+4.RM2,4.RN0+4.RD0,4.0x0:D2c:::or
-"or"
-*am33
-{
- int z, n;
- int srcreg1, srcreg2, dstreg;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM2);
- srcreg2 = translate_rreg (SD_, RN0);
- dstreg = translate_rreg (SD_, RD0);
-
- State.regs[dstreg] = State.regs[srcreg1] | State.regs[srcreg2];
-
- z = (State.regs[dstreg] == 0);
- n = (State.regs[dstreg] & 0x80000000);
-
- PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
- PSW |= ((z ? PSW_Z : 0) | ( n ? PSW_N : 0));
-}
-
-// 1111 1011 0010 1101 Rm Rn Rd; xor Rm,Rn,Rd
-8.0xfb+8.0x2d+4.RM2,4.RN0+4.RD0,4.0x0:D2c:::xor
-"xor"
-*am33
-{
- int z, n;
- int srcreg1, srcreg2, dstreg;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM2);
- srcreg2 = translate_rreg (SD_, RN0);
- dstreg = translate_rreg (SD_, RD0);
-
- State.regs[dstreg] = State.regs[srcreg1] ^ State.regs[srcreg2];
-
- z = (State.regs[dstreg] == 0);
- n = (State.regs[dstreg] & 0x80000000);
-
- PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
- PSW |= ((z ? PSW_Z : 0) | ( n ? PSW_N : 0));
-}
-
-// 1111 1011 0100 1101 Rm Rn Rd; asr Rm,Rn,Rd
-8.0xfb+8.0x4d+4.RM2,4.RN0+4.RD0,4.0x0:D2c:::asr
-"asr"
-*am33
-{
- int z, c, n;
- signed32 temp;
- int srcreg1, srcreg2, dstreg;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM2);
- srcreg2 = translate_rreg (SD_, RN0);
- dstreg = translate_rreg (SD_, RD0);
-
- temp = State.regs[srcreg2];
- c = temp & 1;
- temp >>= State.regs[srcreg1];
- State.regs[dstreg] = temp;
-
- z = (State.regs[dstreg] == 0);
- n = (State.regs[dstreg] & 0x80000000);
-
- PSW &= ~(PSW_Z | PSW_N | PSW_C);
- PSW |= ((z ? PSW_Z : 0) | ( n ? PSW_N : 0));
-}
-
-// 1111 1011 0101 1101 Rm Rn Rd; lsr Rm,Rn,Rd
-8.0xfb+8.0x5d+4.RM2,4.RN0+4.RD0,4.0x0:D2c:::lsr
-"lsr"
-*am33
-{
- int z, c, n;
- int srcreg1, srcreg2, dstreg;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM2);
- srcreg2 = translate_rreg (SD_, RN0);
- dstreg = translate_rreg (SD_, RD0);
-
- c = State.regs[srcreg2] & 1;
- State.regs[dstreg] = State.regs[srcreg2] >> State.regs[srcreg1];
-
- z = (State.regs[dstreg] == 0);
- n = (State.regs[dstreg] & 0x80000000);
-
- PSW &= ~(PSW_Z | PSW_N | PSW_C);
- PSW |= ((z ? PSW_Z : 0) | ( n ? PSW_N : 0));
-}
-
-// 1111 1011 0110 1101 Rm Rn Rd; asl Rm,Rn,Rd
-8.0xfb+8.0x6d+4.RM2,4.RN0+4.RD0,4.0x0:D2c:::asl
-"asl"
-*am33
-{
- int z, n;
- int srcreg1, srcreg2, dstreg;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM2);
- srcreg2 = translate_rreg (SD_, RN0);
- dstreg = translate_rreg (SD_, RD0);
-
- State.regs[dstreg] = State.regs[srcreg2] << State.regs[srcreg1];
-
- z = (State.regs[dstreg] == 0);
- n = (State.regs[dstreg] & 0x80000000);
-
- PSW &= ~(PSW_Z | PSW_N | PSW_C);
- PSW |= ((z ? PSW_Z : 0) | ( n ? PSW_N : 0));
-}
-
-// 1111 1011 1010 1101 Rm Rn Rd1 Rd2; mul Rm,Rn,Rd1,Rd2
-8.0xfb+8.0xad+4.RM2,4.RN0+4.RD0,4.RD2!RD0:D2c:::mul
-"mul"
-*am33
-{
- int srcreg1, srcreg2, dstreg1, dstreg2;
- signed64 temp;
- int n, z;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM2);
- srcreg2 = translate_rreg (SD_, RN0);
- dstreg1 = translate_rreg (SD_, RD0);
- dstreg2 = translate_rreg (SD_, RD2);
-
- temp = ((signed64)(signed32)State.regs[srcreg1]
- * (signed64)(signed32)State.regs[srcreg2]);
- State.regs[dstreg2] = temp & 0xffffffff;
- State.regs[dstreg1] = (temp & 0xffffffff00000000LL) >> 32;
-
- z = (State.regs[dstreg1] == 0) && (State.regs[dstreg2] == 0);
- n = (State.regs[dstreg1] & 0x80000000);
-
- PSW &= ~(PSW_Z | PSW_N);
- PSW |= ((z ? PSW_Z : 0) | ( n ? PSW_N : 0));
-}
-
-// 1111 1011 1011 1101 Rm Rn Rd1 Rd2; mulu Rm,Rn,Rd1,Rd2
-8.0xfb+8.0xbd+4.RM2,4.RN0+4.RD0,4.RD2!RD0:D2c:::mulu
-"mulu"
-*am33
-{
- int srcreg1, srcreg2, dstreg1, dstreg2;
- signed64 temp;
- int n, z;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM2);
- srcreg2 = translate_rreg (SD_, RN0);
- dstreg1 = translate_rreg (SD_, RD0);
- dstreg2 = translate_rreg (SD_, RD2);
-
- temp = ((unsigned64)State.regs[srcreg1]
- * (unsigned64)State.regs[srcreg2]);
- State.regs[dstreg2] = temp & 0xffffffff;
- State.regs[dstreg1] = (temp & 0xffffffff00000000LL) >> 32;
-
- z = (State.regs[dstreg1] == 0) && (State.regs[dstreg2] == 0);
- n = (State.regs[dstreg1] & 0x80000000);
-
- PSW &= ~(PSW_Z | PSW_N);
- PSW |= ((z ? PSW_Z : 0) | ( n ? PSW_N : 0));
-}
-
-// 1111 1011 0000 1110 Rn 0000 abs8 ; mov (abs8),Rn
-8.0xfb+8.0x0e+4.RN2,4.0x0+8.IMM8:D2p:::mov
-"mov"
-*am33
-{
- int dstreg;
-
- PC = cia;
- dstreg = translate_rreg (SD_, RN2);
- State.regs[dstreg] = load_word (IMM8);
-}
-
-// 1111 1011 0001 1110 Rm 0000 abs8 ; mov Rn,(abs8)
-8.0xfb+8.0x1e+4.RM2,4.0x0+8.IMM8:D2q:::mov
-"mov"
-*am33
-{
- int srcreg;
-
- PC = cia;
- srcreg = translate_rreg (SD_, RM2);
- store_word (IMM8, State.regs[srcreg]);
-}
-
-// 1111 1011 0010 1110 Rn 0000 abs8 ; movbu (abs8),Rn
-8.0xfb+8.0x2e+4.RN2,4.0x0+8.IMM8:D2p:::movbu
-"movbu"
-*am33
-{
- int dstreg;
-
- PC = cia;
- dstreg = translate_rreg (SD_, RN2);
- State.regs[dstreg] = load_byte (IMM8);
-}
-
-// 1111 1011 0011 1110 Rm 0000 abs8 ; movbu Rn,(abs8)
-8.0xfb+8.0x3e+4.RM2,4.0x0+8.IMM8:D2q:::movbu
-"movbu"
-*am33
-{
- int srcreg;
-
- PC = cia;
- srcreg = translate_rreg (SD_, RM2);
- store_byte (IMM8, State.regs[srcreg]);
-}
-
-// 1111 1011 0100 1110 Rn 0000 abs8 ; movhu (abs8),Rn
-8.0xfb+8.0x4e+4.RN2,4.0x0+8.IMM8:D2p:::movhu
-"movhu"
-*am33
-{
- int dstreg;
-
- PC = cia;
- dstreg = translate_rreg (SD_, RN2);
- State.regs[dstreg] = load_half (IMM8);
-}
-
-// 1111 1011 0101 1110 Rm 0000 abs8 ; movhu Rn,(abs8)
-8.0xfb+8.0x5e+4.RM2,4.0x0+8.IMM8:D2q:::movhu
-"movhu"
-*am33
-{
- int srcreg;
-
- PC = cia;
- srcreg = translate_rreg (SD_, RM2);
- store_half (IMM8, State.regs[srcreg]);
-}
-
-// 1111 1011 1000 1110 Ri Rm Rn; mov (Ri,Rm),Rn
-8.0xfb+8.0x8e+4.RI0,4.RM0+4.RN0,4.0x0:D2r:::mov
-"mov"
-*am33
-{
- int srcreg1, srcreg2, dstreg;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM0);
- srcreg2 = translate_rreg (SD_, RI0);
- dstreg = translate_rreg (SD_, RN0);
- State.regs[dstreg] = load_word (State.regs[srcreg1] + State.regs[srcreg2]);
-}
-
-// 1111 1011 1001 1110 Ri Rm Rn; mov Rn,(Ri,Rm)
-8.0xfb+8.0x9e+4.RI0,4.RN0+4.RM0,4.0x0:D2s:::mov
-"mov"
-*am33
-{
- int srcreg, dstreg1, dstreg2;
-
- PC = cia;
- srcreg = translate_rreg (SD_, RM0);
- dstreg1 = translate_rreg (SD_, RI0);
- dstreg2 = translate_rreg (SD_, RN0);
- store_word (State.regs[dstreg1] + State.regs[dstreg2], State.regs[srcreg]);
-}
-
-// 1111 1011 1010 1110 Ri Rm Rn; movbu (Ri,Rm),Rn
-8.0xfb+8.0xae+4.RI0,4.RM0+4.RN0,4.0x0:D2r:::movbu
-"movbu"
-*am33
-{
- int srcreg1, srcreg2, dstreg;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM0);
- srcreg2 = translate_rreg (SD_, RI0);
- dstreg = translate_rreg (SD_, RN0);
- State.regs[dstreg] = load_byte (State.regs[srcreg1] + State.regs[srcreg2]);
-}
-
-// 1111 1011 1011 1110 Ri Rm Rn; movbu Rn,(Ri,Rm)
-8.0xfb+8.0xbe+4.RI0,4.RN0+4.RM0,4.0x0:D2s:::movbu
-"movbu"
-*am33
-{
- int srcreg, dstreg1, dstreg2;
-
- PC = cia;
- srcreg = translate_rreg (SD_, RM0);
- dstreg1 = translate_rreg (SD_, RI0);
- dstreg2 = translate_rreg (SD_, RN0);
- store_byte (State.regs[dstreg1] + State.regs[dstreg2], State.regs[srcreg]);
-}
-
-// 1111 1011 1100 1110 Ri Rm Rn; movhu (Ri,Rm),Rn
-8.0xfb+8.0xce+4.RI0,4.RM0+4.RN0,4.0x0:D2r:::movhu
-"movhu"
-*am33
-{
- int srcreg1, srcreg2, dstreg;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM0);
- srcreg2 = translate_rreg (SD_, RI0);
- dstreg = translate_rreg (SD_, RN0);
- State.regs[dstreg] = load_half (State.regs[srcreg1] + State.regs[srcreg2]);
-}
-
-// 1111 1011 1101 1110 Ri Rm Rn; movhu Rn,(Ri,Rm)
-8.0xfb+8.0xde+4.RI0,4.RN0+4.RM0,4.0x0:D2s:::movhu
-"movhu"
-*am33
-{
- int srcreg, dstreg1, dstreg2;
-
- PC = cia;
- srcreg = translate_rreg (SD_, RM0);
- dstreg1 = translate_rreg (SD_, RI0);
- dstreg2 = translate_rreg (SD_, RN0);
- store_half (State.regs[dstreg1] + State.regs[dstreg2], State.regs[srcreg]);
-}
-
-// 1111 1011 0000 1111 Rm Rn Rd1 Rd2; mac Rm,Rn,Rd1,Rd2
-8.0xfb+8.0x0f+4.RM2,4.RN0+4.RD0,4.RD2!RD0:D2c:::mac
-"mac"
-*am33
-{
- int srcreg1, srcreg2, dstreg1, dstreg2;
- signed64 temp;
- unsigned32 sum;
- int c, v;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM2);
- srcreg2 = translate_rreg (SD_, RN0);
- dstreg1 = translate_rreg (SD_, RD0);
- dstreg2 = translate_rreg (SD_, RD2);
-
- temp = ((signed64)(signed32)State.regs[srcreg1]
- * (signed64)(signed32)State.regs[srcreg2]);
-
- sum = State.regs[dstreg2] + (temp & 0xffffffff);
- c = (sum < State.regs[dstreg2]) || (sum < (temp & 0xffffffff));
- State.regs[dstreg2] = sum;
- temp >>= 32;
- temp &= 0xffffffff;
- sum = State.regs[dstreg1] + temp + c;
- v = ((State.regs[dstreg1] & 0x80000000) == (temp & 0x80000000)
- && (temp & 0x80000000) != (sum & 0x80000000));
- State.regs[dstreg1] = sum;
- if (v)
- {
- State.regs[REG_MCVF] = 1;
- PSW &= ~(PSW_V);
- PSW |= (( v ? PSW_V : 0));
- }
-}
-
-// 1111 1011 0001 1111 Rm Rn Rd1 Rd2; macu Rm,Rn,Rd1,Rd2
-8.0xfb+8.0x1f+4.RM2,4.RN0+4.RD0,4.RD2!RD0:D2c:::macu
-"macu"
-*am33
-{
- int srcreg1, srcreg2, dstreg1, dstreg2;
- signed64 temp;
- unsigned32 sum;
- int c, v;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM2);
- srcreg2 = translate_rreg (SD_, RN0);
- dstreg1 = translate_rreg (SD_, RD0);
- dstreg2 = translate_rreg (SD_, RD2);
-
- temp = ((unsigned64)State.regs[srcreg1]
- * (unsigned64)State.regs[srcreg2]);
-
- sum = State.regs[dstreg2] + (temp & 0xffffffff);
- c = (sum < State.regs[dstreg2]) || (sum < (temp & 0xffffffff));
- State.regs[dstreg2] = sum;
- temp >>= 32;
- temp &= 0xffffffff;
- sum = State.regs[dstreg1] + temp + c;
- v = ((State.regs[dstreg1] & 0x80000000) == (temp & 0x80000000)
- && (temp & 0x80000000) != (sum & 0x80000000));
- State.regs[dstreg1] = sum;
- if (v)
- {
- State.regs[REG_MCVF] = 1;
- PSW &= ~(PSW_V);
- PSW |= (( v ? PSW_V : 0));
- }
-}
-
-// 1111 1011 0010 1111 Rm Rn Rd1; macb Rm,Rn,Rd1
-8.0xfb+8.0x2f+4.RM2,4.RN0+4.RD0,4.0x0:D2c:::macb
-"macb"
-*am33
-{
- int srcreg1, srcreg2, dstreg;
- signed32 temp, sum;
- int v;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM2);
- srcreg2 = translate_rreg (SD_, RN0);
- dstreg = translate_rreg (SD_, RD0);
-
- temp = ((signed32)(State.regs[srcreg2] & 0xff)
- * (signed32)(State.regs[srcreg1] & 0xff));
- sum = State.regs[dstreg] + temp;
- v = ((State.regs[dstreg] & 0x80000000) == (temp & 0x80000000)
- && (temp & 0x80000000) != (sum & 0x80000000));
- State.regs[dstreg] = sum;
- if (v)
- {
- State.regs[REG_MCVF] = 1;
- PSW &= ~(PSW_V);
- PSW |= ((v ? PSW_V : 0));
- }
-}
-
-// 1111 1011 0011 1111 Rm Rn Rd1; macbu Rm,Rn,Rd1
-8.0xfb+8.0x3f+4.RM2,4.RN0+4.RD0,4.0x0:D2c:::macbu
-"macbu"
-*am33
-{
- int srcreg1, srcreg2, dstreg;
- signed32 temp, sum;
- int v;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM2);
- srcreg2 = translate_rreg (SD_, RN0);
- dstreg = translate_rreg (SD_, RD0);
-
- temp = ((unsigned32)(State.regs[srcreg2] & 0xff)
- * (unsigned32)(State.regs[srcreg1] & 0xff));
- sum = State.regs[dstreg] + temp;
- v = ((State.regs[dstreg] & 0x80000000) == (temp & 0x80000000)
- && (temp & 0x80000000) != (sum & 0x80000000));
- State.regs[dstreg] = sum;
- if (v)
- {
- State.regs[REG_MCVF] = 1;
- PSW &= ~(PSW_V);
- PSW |= ((v ? PSW_V : 0));
- }
-}
-
-// 1111 1011 0100 1111 Rm Rn Rd1; mach Rm,Rn,Rd1,Rd2
-8.0xfb+8.0x4f+4.RM2,4.RN0+4.RD0,4.RD2!RD0:D2c:::mach
-"mach"
-*am33
-{
- int srcreg1, srcreg2, dstreg1, dstreg2;
- signed64 temp, sum;
- int v;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM2);
- srcreg2 = translate_rreg (SD_, RN0);
- dstreg1 = translate_rreg (SD_, RD0);
- dstreg2 = translate_rreg (SD_, RD0);
-
- temp = ((signed32)(State.regs[srcreg2] & 0xffff)
- * (signed32)(State.regs[srcreg1] & 0xffff));
- State.regs[dstreg2] += (temp & 0xffffffff);
- sum = State.regs[dstreg1] + ((temp >> 32) & 0xffffffff);
- v = ((State.regs[dstreg1] & 0x80000000) == (temp & 0x80000000)
- && (temp & 0x80000000) != (sum & 0x80000000));
- State.regs[dstreg1] = sum;
- if (v)
- {
- State.regs[REG_MCVF] = 1;
- PSW &= ~(PSW_V);
- PSW |= ((v ? PSW_V : 0));
- }
-}
-
-// 1111 1011 0101 1111 Rm Rn Rd1; machu Rm,Rn,Rd1,Rd2
-8.0xfb+8.0x5f+4.RM2,4.RN0+4.RD0,4.RD2!RD0:D2c:::machu
-"machu"
-*am33
-{
- int srcreg1, srcreg2, dstreg1, dstreg2;
- signed64 temp, sum;
- int v;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM2);
- srcreg2 = translate_rreg (SD_, RN0);
- dstreg1 = translate_rreg (SD_, RD0);
- dstreg2 = translate_rreg (SD_, RD0);
-
- temp = ((unsigned32)(State.regs[srcreg2] & 0xffff)
- * (unsigned32)(State.regs[srcreg1] & 0xffff));
- State.regs[dstreg2] += (temp & 0xffffffff);
- sum = State.regs[dstreg1] + ((temp >> 32) & 0xffffffff);
- v = ((State.regs[dstreg1] & 0x80000000) == (temp & 0x80000000)
- && (temp & 0x80000000) != (sum & 0x80000000));
- State.regs[dstreg1] = sum;
- if (v)
- {
- State.regs[REG_MCVF] = 1;
- PSW &= ~(PSW_V);
- PSW |= ((v ? PSW_V : 0));
- }
-}
-
-// 1111 1011 0110 1111 Rm Rn Rd1; dmach Rm,Rn,Rd1
-8.0xfb+8.0x6f+4.RM2,4.RN0+4.RD0,4.0x0:D2c:::dmach
-"dmach"
-*am33
-{
- int srcreg1, srcreg2, dstreg;
- signed32 temp, temp2, sum;
- int v;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM2);
- srcreg2 = translate_rreg (SD_, RN0);
- dstreg = translate_rreg (SD_, RD0);
-
- temp = ((signed32)(State.regs[srcreg2] & 0xffff)
- * (signed32)(State.regs[srcreg1] & 0xffff));
- temp2 = ((signed32)((State.regs[srcreg1] >> 16) & 0xffff)
- * (signed32)((State.regs[srcreg2] >> 16) & 0xffff));
- sum = temp + temp2 + State.regs[dstreg];
- v = ((State.regs[dstreg] & 0x80000000) == (temp & 0x80000000)
- && (temp & 0x80000000) != (sum & 0x80000000));
- State.regs[dstreg] = sum;
- if (v)
- {
- State.regs[REG_MCVF] = 1;
- PSW &= ~(PSW_V);
- PSW |= ((v ? PSW_V : 0));
- }
-}
-
-// 1111 1011 0111 1111 Rm Rn Rd1; dmachu Rm,Rn,Rd1
-8.0xfb+8.0x7f+4.RM2,4.RN0+4.RD0,4.0x0:D2c:::dmachu
-"dmachu"
-*am33
-{
- int srcreg1, srcreg2, dstreg;
- signed32 temp, temp2, sum;
- int v;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM2);
- srcreg2 = translate_rreg (SD_, RN0);
- dstreg = translate_rreg (SD_, RD0);
-
- temp = ((unsigned32)(State.regs[srcreg2] & 0xffff)
- * (unsigned32)(State.regs[srcreg1] & 0xffff));
- temp2 = ((unsigned32)((State.regs[srcreg1] >> 16) & 0xffff)
- * (unsigned32)((State.regs[srcreg2] >> 16) & 0xffff));
- sum = temp + temp2 + State.regs[dstreg];
- v = ((State.regs[dstreg] & 0x80000000) == (temp & 0x80000000)
- && (temp & 0x80000000) != (sum & 0x80000000));
- State.regs[dstreg] = sum;
- if (v)
- {
- State.regs[REG_MCVF] = 1;
- PSW &= ~(PSW_V);
- PSW |= ((v ? PSW_V : 0));
- }
-}
-
-// 1111 1011 1000 1111 Rm Rn Rd1 Rd2; dmulh Rm,Rn,Rd1,Rd2
-8.0xfb+8.0x8f+4.RM2,4.RN0+4.RD0,4.RD2!RD0:D2c:::dmulh
-"dmulh"
-*am33
-{
- int srcreg1, srcreg2, dstreg1, dstreg2;
- signed64 temp;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM2);
- srcreg2 = translate_rreg (SD_, RN0);
- dstreg1 = translate_rreg (SD_, RD0);
- dstreg2 = translate_rreg (SD_, RD2);
-
- temp = ((signed32)(State.regs[srcreg1] & 0xffff)
- * (signed32)(State.regs[srcreg1] & 0xffff));
- State.regs[dstreg2] = temp;
- temp = ((signed32)((State.regs[srcreg1] >> 16) & 0xffff)
- * (signed32)((State.regs[srcreg1] >>16) & 0xffff));
- State.regs[dstreg1] = temp;
-}
-
-// 1111 1011 1001 1111 Rm Rn Rd1 Rd2; dmulhu Rm,Rn,Rd1,Rd2
-8.0xfb+8.0x9f+4.RM2,4.RN0+4.RD0,4.RD2!RD0:D2c:::dmulhu
-"dmulhu"
-*am33
-{
- int srcreg1, srcreg2, dstreg1, dstreg2;
- signed64 temp;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM2);
- srcreg2 = translate_rreg (SD_, RN0);
- dstreg1 = translate_rreg (SD_, RD0);
- dstreg2 = translate_rreg (SD_, RD2);
-
- temp = ((unsigned32)(State.regs[srcreg1] & 0xffff)
- * (unsigned32)(State.regs[srcreg1] & 0xffff));
- State.regs[dstreg2] = temp;
- temp = ((unsigned32)((State.regs[srcreg1] >> 16) & 0xffff)
- * (unsigned32)((State.regs[srcreg1] >>16) & 0xffff));
- State.regs[dstreg1] = temp;
-}
-
-// 1111 1011 1010 1111 Rm Rn; sat24 Rm,Rn
-8.0xfb+8.0xaf+4.RM2,4.RN0+8.0x0:D2:::sat24
-"sat24"
-*am33
-{
- int srcreg, dstreg;
- int value, n, z;
-
- PC = cia;
- srcreg = translate_rreg (SD_, RM2);
- dstreg = translate_rreg (SD_, RN0);
-
- value = State.regs[srcreg];
-
- if (value >= 0x7fffff)
- State.regs[dstreg] = 0x7fffff;
- else if (value <= 0xff800000)
- State.regs[dstreg] = 0xff800000;
- else
- State.regs[dstreg] = value;
-
- n = (State.regs[dstreg] & 0x800000) != 0;
- z = (State.regs[dstreg] == 0);
- PSW &= ~(PSW_Z | PSW_N);
- PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0));
-}
-
-// 1111 1011 1111 1111 Rm Rn Rd1; bsch Rm,Rn,Rd1
-8.0xfb+8.0xff+4.RM2,4.RN0+4.RD0,4.0x0:D2c:::bsch
-"bsch"
-*am33
-{
- int temp, c, i;
- int srcreg1, srcreg2, dstreg;
- int start;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM2);
- srcreg2 = translate_rreg (SD_, RN0);
- dstreg = translate_rreg (SD_, RD0);
-
- temp = State.regs[srcreg1];
- start = (State.regs[srcreg2] & 0x1f) - 1;
- if (start == -1)
- start = 31;
-
- c = 0;
- for (i = start; i >= 0; i--)
- {
- if (temp & (1 << i))
- {
- c = 1;
- State.regs[dstreg] = i;
- break;
- }
- }
-
- if (i < 0)
- {
- c = 0;
- State.regs[dstreg] = 0;
- }
- PSW &= ~(PSW_C);
- PSW |= (c ? PSW_C : 0);
-}
-
-// 1111 1101 0000 1000 Rn Rn IMM32; mov imm24,Rn
-8.0xfd+8.0x08+4.RM2,4.RN0=RM2+8.IMM24A+8.IMM24B+8.IMM24C:D4t:::mov
-"mov"
-*am33
-{
- int dstreg;
-
- PC = cia;
- dstreg = translate_rreg (SD_, RN0);
- State.regs[dstreg] = EXTEND24 (FETCH24 (IMM24A, IMM24B, IMM24C));
-}
-
-// 1111 1101 0001 1000 Rn Rn IMM32; movu imm24,Rn
-8.0xfd+8.0x18+4.RM2,4.RN0=RM2+8.IMM24A+8.IMM24B+8.IMM24C:D4k:::movu
-"movu"
-*am33
-{
- int dstreg;
-
- PC = cia;
- dstreg = translate_rreg (SD_, RN0);
- State.regs[dstreg] = FETCH24 (IMM24A, IMM24B, IMM24C) & 0xffffff;
-}
-
-// 1111 1101 0111 1000 Rn Rn IMM32; add imm24,Rn
-8.0xfd+8.0x78+4.RM2,4.RN0=RM2+8.IMM24A+8.IMM24B+8.IMM24C:D4c:::add
-"add"
-*am33
-{
- int dstreg;
-
- PC = cia;
- dstreg = translate_rreg (SD_, RN0);
- genericAdd (EXTEND24 (FETCH24 (IMM24A, IMM24B, IMM24C)), dstreg);
-}
-
-// 1111 1101 1000 1000 Rn Rn IMM32; addc imm24,Rn
-8.0xfd+8.0x88+4.RM2,4.RN0=RM2+8.IMM24A+8.IMM24B+8.IMM24C:D4b:::addc
-"addc"
-*am33
-{
- int dstreg, z, n, c, v;
- unsigned32 sum, imm, reg2;
-
- PC = cia;
- dstreg = translate_rreg (SD_, RN0);
-
- imm = EXTEND24 (FETCH24 (IMM24A, IMM24B, IMM24C));
- reg2 = State.regs[dstreg];
- sum = imm + reg2 + ((PSW & PSW_C) != 0);
- State.regs[dstreg] = sum;
-
- z = ((PSW & PSW_Z) != 0) && (sum == 0);
- n = (sum & 0x80000000);
- c = (sum < imm) || (sum < reg2);
- v = ((reg2 & 0x80000000) == (imm & 0x80000000)
- && (reg2 & 0x80000000) != (sum & 0x80000000));
-
- PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
- PSW |= ((z ? PSW_Z : 0) | ( n ? PSW_N : 0)
- | (c ? PSW_C : 0) | (v ? PSW_V : 0));
-}
-
-// 1111 1101 1001 1000 Rn Rn IMM32; sub imm24,Rn
-8.0xfd+8.0x98+4.RM2,4.RN0=RM2+8.IMM24A+8.IMM24B+8.IMM24C:D4b:::sub
-"sub"
-*am33
-{
- int dstreg;
-
- PC = cia;
- dstreg = translate_rreg (SD_, RN0);
- genericSub (EXTEND24 (FETCH24 (IMM24A, IMM24B, IMM24C)), dstreg);
-}
-
-// 1111 1101 1010 1000 Rn Rn IMM32; subc imm24,Rn
-8.0xfd+8.0xa8+4.RM2,4.RN0=RM2+8.IMM24A+8.IMM24B+8.IMM24C:D4b:::subc
-"subc"
-*am33
-{
- int dstreg, z, n, c, v;
- unsigned32 difference, imm, reg2;
-
- PC = cia;
- dstreg = translate_rreg (SD_, RN0);
-
- imm = EXTEND24 (FETCH24 (IMM24A, IMM24B, IMM24C));
- reg2 = State.regs[dstreg];
- difference = reg2 - imm - ((PSW & PSW_C) != 0);
- State.regs[dstreg] = difference;
-
- z = ((PSW & PSW_Z) != 0) && (difference == 0);
- n = (difference & 0x80000000);
- c = (imm > reg2);
- v = ((reg2 & 0x80000000) == (imm & 0x80000000)
- && (reg2 & 0x80000000) != (difference & 0x80000000));
-
- PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
- PSW |= ((z ? PSW_Z : 0) | ( n ? PSW_N : 0)
- | (c ? PSW_C : 0) | (v ? PSW_V : 0));
-}
-
-// 1111 1101 1101 1000 Rn Rn IMM32; cmp imm24,Rn
-8.0xfd+8.0xd8+4.RM2,4.RN0=RM2+8.IMM24A+8.IMM24B+8.IMM24C:D4b:::cmp
-"cmp"
-*am33
-{
- int srcreg;
-
- PC = cia;
- srcreg = translate_rreg (SD_, RN0);
- genericCmp (EXTEND24 (FETCH24 (IMM24A, IMM24B, IMM24C)), State.regs[srcreg]);
-}
-
-// 1111 1101 1111 1000 XRn XRn IMM32; mov imm24,XRn
-8.0xfd+8.0xf8+4.XRM2,4.XRN0=XRM2+8.IMM24A+8.IMM24B+8.IMM24C:D4o:::mov
-"mov"
-*am33
-{
- int dstreg;
-
- PC = cia;
- dstreg = translate_xreg (SD_, XRN0);
-
- State.regs[dstreg] = FETCH24 (IMM24A, IMM24B, IMM24C) & 0xffffff;
-}
-
-// 1111 1101 0000 1001 Rn Rn IMM24; and imm24,Rn
-8.0xfd+8.0x09+4.RM2,4.RN0=RM2+8.IMM24A+8.IMM24B+8.IMM24C:D4b:::and
-"and"
-*am33
-{
- int dstreg;
- int z,n;
-
- PC = cia;
- dstreg = translate_rreg (SD_, RN0);
-
- State.regs[dstreg] &= (FETCH24 (IMM24A, IMM24B, IMM24C) & 0xffffff);
- z = (State.regs[dstreg] == 0);
- n = (State.regs[dstreg] & 0x80000000) != 0;
- PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
- PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0));
-}
-
-// 1111 1101 0001 1001 Rn Rn IMM24; or imm24,Rn
-8.0xfd+8.0x19+4.RM2,4.RN0=RM2+8.IMM24A+8.IMM24B+8.IMM24C:D4b:::or
-"or"
-*am33
-{
- int dstreg;
- int z,n;
-
- PC = cia;
- dstreg = translate_rreg (SD_, RN0);
-
- State.regs[dstreg] |= (FETCH24 (IMM24A, IMM24B, IMM24C) & 0xffffff);
- z = (State.regs[dstreg] == 0);
- n = (State.regs[dstreg] & 0x80000000) != 0;
- PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
- PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0));
-}
-
-// 1111 1101 0010 1001 Rn Rn IMM24; xor imm24,Rn
-8.0xfd+8.0x29+4.RM2,4.RN0=RM2+8.IMM24A+8.IMM24B+8.IMM24C:D4b:::xor
-"xor"
-*am33
-{
- int dstreg;
- int z,n;
-
- PC = cia;
- dstreg = translate_rreg (SD_, RN0);
-
- State.regs[dstreg] ^= (FETCH24 (IMM24A, IMM24B, IMM24C) & 0xffffff);
- z = (State.regs[dstreg] == 0);
- n = (State.regs[dstreg] & 0x80000000) != 0;
- PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
- PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0));
-}
-
-// 1111 1101 0100 1001 Rn Rn IMM24; asr imm24,Rn
-8.0xfd+8.0x49+4.RM2,4.RN0=RM2+8.IMM24A+8.IMM24B+8.IMM24C:D4b:::asr
-"asr"
-*am33
-{
- int dstreg;
- signed32 temp;
- int c, z, n;
-
- PC = cia;
- dstreg = translate_rreg (SD_, RN0);
-
- temp = State.regs[dstreg];
- c = temp & 1;
- temp >>= (FETCH24 (IMM24A, IMM24B, IMM24C));
- State.regs[dstreg] = temp;
- z = (State.regs[dstreg] == 0);
- n = (State.regs[dstreg] & 0x80000000) != 0;
- PSW &= ~(PSW_Z | PSW_N | PSW_C);
- PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0) | (c ? PSW_C : 0));
-}
-
-
-// 1111 1101 0101 1001 Rn Rn IMM24; lsr imm24,Rn
-8.0xfd+8.0x59+4.RM2,4.RN0=RM2+8.IMM24A+8.IMM24B+8.IMM24C:D4b:::lsr
-"lsr"
-*am33
-{
- int dstreg;
- int z, n, c;
-
- PC = cia;
- dstreg = translate_rreg (SD_, RN0);
-
- c = State.regs[dstreg] & 1;
- State.regs[dstreg] >>= (FETCH24 (IMM24A, IMM24B, IMM24C));
- z = (State.regs[dstreg] == 0);
- n = (State.regs[dstreg] & 0x80000000) != 0;
- PSW &= ~(PSW_Z | PSW_N | PSW_C);
- PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0) | (c ? PSW_C : 0));
-}
-
-// 1111 1101 0110 1001 Rn Rn IMM24; asl imm24,Rn
-8.0xfd+8.0x69+4.RM2,4.RN0=RM2+8.IMM24A+8.IMM24B+8.IMM24C:D4b:::asl
-"asl"
-*am33
-{
- int dstreg;
- int z, n;
-
- PC = cia;
- dstreg = translate_rreg (SD_, RN0);
-
- State.regs[dstreg] <<= (FETCH24 (IMM24A, IMM24B, IMM24C));
- z = (State.regs[dstreg] == 0);
- n = (State.regs[dstreg] & 0x80000000) != 0;
- PSW &= ~(PSW_Z | PSW_N);
- PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0));
-}
-
-// 1111 1101 1010 1001 Rn Rn IMM24; mul imm24,Rn
-8.0xfd+8.0xa9+4.RM2,4.RN0=RM2+8.IMM24A+8.IMM24B+8.IMM24C:D4b:::mul
-"mul"
-*am33
-{
- int dstreg;
- unsigned64 temp;
- int z, n;
-
- PC = cia;
- dstreg = translate_rreg (SD_, RN0);
-
- temp = ((signed64)(signed32)State.regs[dstreg]
- * (signed64)(signed32)EXTEND24 (FETCH24 (IMM24A, IMM24B, IMM24C)));
- State.regs[dstreg] = temp & 0xffffffff;
- State.regs[REG_MDR] = (temp & 0xffffffff00000000LL) >> 32;
- z = (State.regs[dstreg] == 0);
- n = (State.regs[dstreg] & 0x80000000) != 0;
- PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
- PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0));
-}
-
-// 1111 1101 1011 1001 Rn Rn IMM24; mulu imm24,Rn
-8.0xfd+8.0xb9+4.RM2,4.RN0=RM2+8.IMM24A+8.IMM24B+8.IMM24C:D4b:::mulu
-"mulu"
-*am33
-{
- int dstreg;
- unsigned64 temp;
- int z, n;
-
- PC = cia;
- dstreg = translate_rreg (SD_, RN0);
-
- temp = ((unsigned64)State.regs[dstreg]
- * (unsigned64)EXTEND24 (FETCH24 (IMM24A, IMM24B, IMM24C)));
- State.regs[dstreg] = temp & 0xffffffff;
- State.regs[REG_MDR] = (temp & 0xffffffff00000000LL) >> 32;
- z = (State.regs[dstreg] == 0);
- n = (State.regs[dstreg] & 0x80000000) != 0;
- PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
- PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0));
-}
-
-// 1111 1101 1110 1001 Rn Rn IMM24; btst imm24,,Rn
-8.0xfd+8.0xe9+4.RN2,4.RN0=RN2+8.IMM24A+8.IMM24B+8.IMM24C:D4p:::btst
-"btst"
-*am33
-{
- int srcreg;
-
- PC = cia;
- srcreg = translate_rreg (SD_, RN0);
- genericBtst (FETCH24 (IMM24A, IMM24B, IMM24C), State.regs[srcreg]);
-}
-
-// 1111 1101 0000 1010 Rn Rm IMM24; mov (d24,Rm),Rn
-8.0xfd+8.0x0a+4.RN2,4.RM0+8.IMM24A+8.IMM24B+8.IMM24C:D4p:::mov
-"mov"
-*am33
-{
- int srcreg, dstreg;
-
- PC = cia;
- srcreg = translate_rreg (SD_, RM0);
- dstreg = translate_rreg (SD_, RN2);
- State.regs[dstreg] = load_word (State.regs[srcreg]
- + EXTEND24 (FETCH24 (IMM24A,
- IMM24B, IMM24C)));
-}
-
-// 1111 1101 0001 1010 Rm Rn IMM24; mov Rm,(d24,Rn)
-8.0xfd+8.0x1a+4.RM2,4.RN0+8.IMM24A+8.IMM24B+8.IMM24C:D4q:::mov
-"mov"
-*am33
-{
- int srcreg, dstreg;
-
- PC = cia;
- srcreg = translate_rreg (SD_, RM2);
- dstreg = translate_rreg (SD_, RN0);
- store_word (State.regs[dstreg] + EXTEND24 (FETCH24 (IMM24A, IMM24B, IMM24C)),
- State.regs[srcreg]);
-}
-
-// 1111 1101 0010 1010 Rn Rm IMM24; movbu (d24,Rm),Rn
-8.0xfd+8.0x2a+4.RN2,4.RM0+8.IMM24A+8.IMM24B+8.IMM24C:D4p:::movbu
-"movbu"
-*am33
-{
- int srcreg, dstreg;
-
- PC = cia;
- srcreg = translate_rreg (SD_, RM0);
- dstreg = translate_rreg (SD_, RN2);
- State.regs[dstreg] = load_byte (State.regs[srcreg]
- + EXTEND24 (FETCH24 (IMM24A,
- IMM24B, IMM24C)));
-}
-
-// 1111 1101 0011 1010 Rm Rn IMM24; movbu Rm,(d24,Rn)
-8.0xfd+8.0x3a+4.RM2,4.RN0+8.IMM24A+8.IMM24B+8.IMM24C:D4q:::movbu
-"movbu"
-*am33
-{
- int srcreg, dstreg;
-
- PC = cia;
- srcreg = translate_rreg (SD_, RM2);
- dstreg = translate_rreg (SD_, RN0);
- store_byte (State.regs[dstreg] + EXTEND24 (FETCH24 (IMM24A, IMM24B, IMM24C)),
- State.regs[srcreg]);
-}
-
-// 1111 1101 0100 1010 Rn Rm IMM24; movhu (d24,Rm),Rn
-8.0xfd+8.0x4a+4.RN2,4.RM0+8.IMM24A+8.IMM24B+8.IMM24C:D4p:::movhu
-"movhu"
-*am33
-{
- int srcreg, dstreg;
-
- PC = cia;
- srcreg = translate_rreg (SD_, RM0);
- dstreg = translate_rreg (SD_, RN2);
- State.regs[dstreg] = load_half (State.regs[srcreg]
- + EXTEND24 (FETCH24 (IMM24A,
- IMM24B, IMM24C)));
-}
-
-// 1111 1101 0101 1010 Rm Rn IMM24; movhu Rm,(d24,Rn)
-8.0xfd+8.0x5a+4.RM2,4.RN0+8.IMM24A+8.IMM24B+8.IMM24C:D4q:::movhu
-"movhu"
-*am33
-{
- int srcreg, dstreg;
-
- PC = cia;
- srcreg = translate_rreg (SD_, RM2);
- dstreg = translate_rreg (SD_, RN0);
- store_half (State.regs[dstreg] + EXTEND24 (FETCH24 (IMM24A, IMM24B, IMM24C)),
- State.regs[srcreg]);
-}
-
-// 1111 1101 0110 1010 Rn Rm IMM24; mov (d24,Rm+),Rn
-8.0xfd+8.0x6a+4.RN2,4.RM0!RN2+8.IMM24A+8.IMM24B+8.IMM24C:D4y:::mov
-"mov"
-*am33
-{
- int srcreg, dstreg;
-
- PC = cia;
- srcreg = translate_rreg (SD_, RM0);
- dstreg = translate_rreg (SD_, RN2);
- State.regs[dstreg] = load_word (State.regs[srcreg]);
- State.regs[srcreg] += EXTEND24 (FETCH24 (IMM24A, IMM24B, IMM24C));
-}
-
-// 1111 1101 0111 1010 Rm Rn IMM24; mov Rm,(d24,Rn+)
-8.0xfd+8.0x7a+4.RM2,4.RN0+8.IMM24A+8.IMM24B+8.IMM24C:D4z:::mov
-"mov"
-*am33
-{
- int srcreg, dstreg;
-
- PC = cia;
- srcreg = translate_rreg (SD_, RM2);
- dstreg = translate_rreg (SD_, RN0);
- store_word (State.regs[dstreg], State.regs[srcreg]);
- State.regs[dstreg] += EXTEND24 (FETCH24 (IMM24A, IMM24B, IMM24C));
-}
-
-
-// 1111 1101 1000 1010 Rn 0000 IMM24; mov (d24,sp),Rn
-8.0xfd+8.0x8a+4.RN2,4.0x0+IMM24A+8.IMM24B+8.IMM24C:D4r:::mov
-"mov"
-*am33
-{
- int dstreg;
-
- PC = cia;
- dstreg = translate_rreg (SD_, RN2);
- State.regs[dstreg] = load_word (State.regs[REG_SP]
- + FETCH24 (IMM24A, IMM24B, IMM24C));
-}
-
-// 1111 1101 1001 1010 Rm 0000 IMM24; mov Rm,(d24,sp)
-8.0xfd+8.0x9a+4.RM2,4.0x0+8.IMM24A+8.IMM24B+8.IMM24C:D4s:::mov
-"mov"
-*am33
-{
- int srcreg;
-
- PC = cia;
- srcreg = translate_rreg (SD_, RM2);
- store_word (State.regs[REG_SP] + FETCH24 (IMM24A, IMM24B, IMM24C),
- State.regs[srcreg]);
-}
-
-// 1111 1101 1010 1010 Rn 0000 IMM24; movbu (d24,sp),Rn
-8.0xfd+8.0xaa+4.RN2,4.0x0+8.IMM24A+8.IMM24B+8.IMM24C:D4r:::movbu
-"movbu"
-*am33
-{
- int dstreg;
-
- PC = cia;
- dstreg = translate_rreg (SD_, RN2);
- State.regs[dstreg] = load_byte (State.regs[REG_SP]
- + FETCH24 (IMM24A, IMM24B, IMM24C));
-}
-
-// 1111 1101 1011 1010 Rm 0000 IMM24; movbu Rm,(d24,sp)
-8.0xfd+8.0xba+4.RM2,4.0x0+8.IMM24A+8.IMM24B+8.IMM24C:D4s:::movbu
-"movbu"
-*am33
-{
- int srcreg;
-
- PC = cia;
- srcreg = translate_rreg (SD_, RM2);
- store_byte (State.regs[REG_SP] + FETCH24 (IMM24A, IMM24B, IMM24C),
- State.regs[srcreg]);
-}
-
-// 1111 1101 1100 1010 Rn 0000 IMM24; movhu (d24,sp),Rn
-8.0xfd+8.0xca+4.RN2,4.0x0+8.IMM24A+8.IMM24B+8.IMM24C:D4r:::movhu
-"movhu"
-*am33
-{
- int dstreg;
-
- PC = cia;
- dstreg = translate_rreg (SD_, RN2);
- State.regs[dstreg] = load_half (State.regs[REG_SP]
- + FETCH24 (IMM24A, IMM24B, IMM24C));
-}
-
-// 1111 1101 1101 1010 Rm Rn IMM24; movhu Rm,(d24,sp)
-8.0xfd+8.0xda+4.RM2,4.RN0+8.IMM24A+8.IMM24B+8.IMM24C:D4s:::movhu
-"movhu"
-*am33
-{
- int srcreg;
-
- PC = cia;
- srcreg = translate_rreg (SD_, RM2);
- store_half (State.regs[REG_SP] + FETCH24 (IMM24A, IMM24B, IMM24C),
- State.regs[srcreg]);
-}
-
-// 1111 1101 1110 1010 Rn Rm IMM24; movhu (d24,Rm+),Rn
-8.0xfd+8.0xea+4.RN2,4.RM0!RN2+8.IMM24A+8.IMM24B+8.IMM24C:D4y:::movhu
-"movhu"
-*am33
-{
- int srcreg, dstreg;
-
- PC = cia;
- srcreg = translate_rreg (SD_, RM0);
- dstreg = translate_rreg (SD_, RN2);
- State.regs[dstreg] = load_half (State.regs[srcreg]);
- State.regs[dstreg] += EXTEND24 (FETCH24 (IMM24A, IMM24B, IMM24C));
-}
-
-// 1111 1101 1111 1010 Rm Rn IMM24; movhu Rm,(d24,Rn+)
-8.0xfd+8.0xfa+4.RM2,4.RN0+8.IMM24A+8.IMM24B+8.IMM24C:D4z:::movhu
-"movhu"
-*am33
-{
- int srcreg, dstreg;
-
- PC = cia;
- srcreg = translate_rreg (SD_, RM2);
- dstreg = translate_rreg (SD_, RN0);
- store_half (State.regs[dstreg], State.regs[srcreg]);
- State.regs[srcreg] += EXTEND24 (FETCH24 (IMM24A, IMM24B, IMM24C));
-}
-
-// 1111 1101 0000 1011 Rn IMM24; mac imm24,Rn
-8.0xfd+8.0x0b+4.RN2,4.RN0=RN2+8.IMM24A+8.IMM24B+8.IMM24C:D4z:::mac
-"mac"
-*am33
-{
- int srcreg;
- signed64 temp, sum;
- int c, v;
-
- PC = cia;
- srcreg = translate_rreg (SD_, RN2);
-
- temp = ((signed64)EXTEND24 (FETCH24 (IMM24A, IMM24B, IMM24C))
- * (signed64)State.regs[srcreg]);
- sum = State.regs[REG_MCRL] + (temp & 0xffffffff);
- c = (sum < State.regs[REG_MCRL]) || (sum < (temp & 0xffffffff));
- State.regs[REG_MCRL] = sum;
- temp >>= 32;
- temp &= 0xffffffff;
- sum = State.regs[REG_MCRH] + temp + c;
- v = ((State.regs[REG_MCRH] & 0x80000000) == (temp & 0x80000000)
- && (temp & 0x80000000) != (sum & 0x80000000));
- State.regs[REG_MCRH] = sum;
- if (v)
- State.regs[REG_MCVF] = 1;
-}
-
-// 1111 1101 0001 1011 Rn IMM24; macu imm24,Rn
-8.0xfd+8.0x1b+4.RN2,4.RN0=RN2+8.IMM24A+8.IMM24B+8.IMM24C:D4z:::macu
-"macu"
-*am33
-{
- int srcreg;
- signed64 temp, sum;
- int c, v;
-
- PC = cia;
- srcreg = translate_rreg (SD_, RN2);
-
- temp = ((unsigned64) (FETCH24 (IMM24A, IMM24B, IMM24C))
- * (unsigned64)State.regs[srcreg]);
- sum = State.regs[REG_MCRL] + (temp & 0xffffffff);
- c = (sum < State.regs[REG_MCRL]) || (sum < (temp & 0xffffffff));
- State.regs[REG_MCRL] = sum;
- temp >>= 32;
- temp &= 0xffffffff;
- sum = State.regs[REG_MCRH] + temp + c;
- v = ((State.regs[REG_MCRH] & 0x80000000) == (temp & 0x80000000)
- && (temp & 0x80000000) != (sum & 0x80000000));
- State.regs[REG_MCRH] = sum;
- if (v)
- State.regs[REG_MCVF] = 1;
-}
-
-// 1111 1101 0010 1011 Rn IMM24; macb imm24,Rn
-8.0xfd+8.0x2b+4.RN2,4.RN0=RN2+8.IMM24A+8.IMM24B+8.IMM24C:D4z:::macb
-"macb"
-*am33
-{
- int srcreg;
- signed64 temp, sum;
- int c, v;
-
- PC = cia;
- srcreg = translate_rreg (SD_, RN2);
-
- temp = ((signed64)EXTEND8 (FETCH24 (IMM24A, IMM24B, IMM24C))
- * (signed64)State.regs[srcreg] & 0xff);
- sum = State.regs[REG_MCRL] + (temp & 0xffffffff);
- c = (sum < State.regs[REG_MCRL]) || (sum < (temp & 0xffffffff));
- State.regs[REG_MCRL] = sum;
- temp >>= 32;
- temp &= 0xffffffff;
- sum = State.regs[REG_MCRH] + temp + c;
- v = ((State.regs[REG_MCRH] & 0x80000000) == (temp & 0x80000000)
- && (temp & 0x80000000) != (sum & 0x80000000));
- State.regs[REG_MCRH] = sum;
- if (v)
- State.regs[REG_MCVF] = 1;
-}
-
-// 1111 1101 0011 1011 Rn IMM24; macbu imm24,Rn
-8.0xfd+8.0x3b+4.RN2,4.RN0=RN2+8.IMM24A+8.IMM24B+8.IMM24C:D4z:::macbu
-"macbu"
-*am33
-{
- int srcreg;
- signed64 temp, sum;
- int c, v;
-
- PC = cia;
- srcreg = translate_rreg (SD_, RN2);
-
- temp = ((unsigned64) (FETCH24 (IMM24A, IMM24B, IMM24C))
- * (unsigned64)State.regs[srcreg] & 0xff);
- sum = State.regs[REG_MCRL] + (temp & 0xffffffff);
- c = (sum < State.regs[REG_MCRL]) || (sum < (temp & 0xffffffff));
- State.regs[REG_MCRL] = sum;
- temp >>= 32;
- temp &= 0xffffffff;
- sum = State.regs[REG_MCRH] + temp + c;
- v = ((State.regs[REG_MCRH] & 0x80000000) == (temp & 0x80000000)
- && (temp & 0x80000000) != (sum & 0x80000000));
- State.regs[REG_MCRH] = sum;
- if (v)
- State.regs[REG_MCVF] = 1;
-}
-
-// 1111 1101 0100 1011 Rn IMM24; mach imm24,Rn
-8.0xfd+8.0x4b+4.RN2,4.RN0=RN2+8.IMM24A+8.IMM24B+8.IMM24C:D4z:::mach
-"mach"
-*am33
-{
- int srcreg;
- signed64 temp, sum;
- int c, v;
-
- PC = cia;
- srcreg = translate_rreg (SD_, RN2);
-
- temp = ((signed64)EXTEND16 (FETCH24 (IMM24A, IMM24B, IMM24C))
- * (signed64)State.regs[srcreg] & 0xffff);
- sum = State.regs[REG_MCRL] + (temp & 0xffffffff);
- c = (sum < State.regs[REG_MCRL]) || (sum < (temp & 0xffffffff));
- State.regs[REG_MCRL] = sum;
- temp >>= 32;
- temp &= 0xffffffff;
- sum = State.regs[REG_MCRH] + temp + c;
- v = ((State.regs[REG_MCRH] & 0x80000000) == (temp & 0x80000000)
- && (temp & 0x80000000) != (sum & 0x80000000));
- State.regs[REG_MCRH] = sum;
- if (v)
- State.regs[REG_MCVF] = 1;
-}
-
-// 1111 1101 0101 1011 Rn IMM24; machu imm24,Rn
-8.0xfd+8.0x5b+4.RN2,4.RN0=RN2+8.IMM24A+8.IMM24B+8.IMM24C:D4z:::machu
-"machu"
-*am33
-{
- int srcreg;
- signed64 temp, sum;
- int c, v;
-
- PC = cia;
- srcreg = translate_rreg (SD_, RN2);
-
- temp = ((unsigned64) (FETCH24 (IMM24A, IMM24B, IMM24C) & 0xffff)
- * (unsigned64)State.regs[srcreg] & 0xffff);
- sum = State.regs[REG_MCRL] + (temp & 0xffffffff);
- c = (sum < State.regs[REG_MCRL]) || (sum < (temp & 0xffffffff));
- State.regs[REG_MCRL] = sum;
- temp >>= 32;
- temp &= 0xffffffff;
- sum = State.regs[REG_MCRH] + temp + c;
- v = ((State.regs[REG_MCRH] & 0x80000000) == (temp & 0x80000000)
- && (temp & 0x80000000) != (sum & 0x80000000));
- State.regs[REG_MCRH] = sum;
- if (v)
- State.regs[REG_MCVF] = 1;
-}
-
-// 1111 1101 0000 1110 Rn 0000 ABS24; mov (abs24),Rn
-8.0xfd+8.0x0e+4.RN2,4.0x0+8.IMM24A+8.IMM24B+8.IMM24C:D4u:::mov
-"mov"
-*am33
-{
- int dstreg;
-
- PC = cia;
- dstreg = translate_rreg (SD_, RN2);
- State.regs[dstreg] = load_word (FETCH24 (IMM24A, IMM24B, IMM24C));
-}
-
-// 1111 1101 0001 1110 Rm 0000 ABS24; mov Rm,(abs24)
-8.0xfd+8.0x1e+4.RM2,4.0x0+8.IMM24A+8.IMM24B+8.IMM24C:D4v:::mov
-"mov"
-*am33
-{
- int srcreg;
-
- PC = cia;
- srcreg = translate_rreg (SD_, RM2);
- store_word (FETCH24 (IMM24A, IMM24B, IMM24C), State.regs[srcreg]);
-}
-
-
-// 1111 1101 0010 1110 Rn 0000 ABS24; movbu (abs24),Rn
-8.0xfd+8.0x2e+4.RN2,4.0x0+8.IMM24A+8.IMM24B+8.IMM24C:D4t:::movbu
-"movbu"
-*am33
-{
- int dstreg;
-
- PC = cia;
- dstreg = translate_rreg (SD_, RN2);
- State.regs[dstreg] = load_byte (FETCH24 (IMM24A, IMM24B, IMM24C));
-}
-
-// 1111 1101 0011 1110 Rm 0000 ABS24; movbu Rm,(abs24)
-8.0xfd+8.0x3e+4.RM2,4.0x0+8.IMM24A+8.IMM24B+8.IMM24C:D4u:::movbu
-"movbu"
-*am33
-{
- int srcreg;
-
- PC = cia;
- srcreg = translate_rreg (SD_, RM2);
- store_byte (FETCH24 (IMM24A, IMM24B, IMM24C), State.regs[srcreg]);
-}
-
-
-// 1111 1101 0100 1110 Rn 0000 ABS24; movhu (abs24),Rn
-8.0xfd+8.0x4e+4.RN2,4.0x0+8.IMM24A+8.IMM24B+8.IMM24C:D4t:::movhu
-"movhu"
-*am33
-{
- int dstreg;
-
- PC = cia;
- dstreg = translate_rreg (SD_, RN2);
- State.regs[dstreg] = load_half (FETCH24 (IMM24A, IMM24B, IMM24C));
-}
-
-// 1111 1101 0101 1110 Rm 0000 ABS24; movhu Rm,(abs24)
-8.0xfd+8.0x5e+4.RM2,4.0x0+8.IMM24A+8.IMM24B+8.IMM24C:D4u:::movhu
-"movhu"
-*am33
-{
- int srcreg;
-
- PC = cia;
- srcreg = translate_rreg (SD_, RM2);
- store_half (FETCH24 (IMM24A, IMM24B, IMM24C), State.regs[srcreg]);
-}
-
-
-// 1111 1110 0000 1000 Rn Rn IMM32; mov imm32,Rn
-8.0xfe+8.0x08+4.RM2,4.RN0=RM2+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D5:::mov
-"mov"
-*am33
-{
- int dstreg;
-
- PC = cia;
- dstreg = translate_rreg (SD_, RN0);
- State.regs[dstreg] = FETCH32(IMM32A, IMM32B, IMM32C, IMM32D);
-}
-
-// 1111 1110 0001 1000 Rn Rn IMM32; movu imm32,Rn
-8.0xfe+8.0x18+4.RM2,4.RN0=RM2+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D5:::movu
-"movu"
-*am33
-{
- int dstreg;
-
- PC = cia;
- dstreg = translate_rreg (SD_, RN0);
- State.regs[dstreg] = FETCH32(IMM32A, IMM32B, IMM32C, IMM32D);
-}
-
-// 1111 1110 0111 1000 Rn Rn IMM32; add imm32,Rn
-8.0xfe+8.0x78+4.RM2,4.RN0=RM2+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D5:::add
-"add"
-*am33
-{
- int dstreg;
-
- PC = cia;
- dstreg = translate_rreg (SD_, RN0);
- genericAdd (FETCH32 (IMM32A, IMM32B, IMM32C, IMM32D), dstreg);
-}
-
-// 1111 1110 1000 1000 Rn Rn IMM32; addc imm32,Rn
-8.0xfe+8.0x88+4.RM2,4.RN0=RM2+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D5:::addc
-"addc"
-*am33
-{
- int dstreg;
- unsigned32 imm, reg2, sum;
- int z, n, c, v;
-
- PC = cia;
- dstreg = translate_rreg (SD_, RN0);
-
- imm = FETCH32 (IMM32A, IMM32B, IMM32C, IMM32D);
- reg2 = State.regs[dstreg];
- sum = imm + reg2 + ((PSW & PSW_C) != 0);
- State.regs[dstreg] = sum;
-
- z = ((PSW & PSW_Z) != 0) && (sum == 0);
- n = (sum & 0x80000000);
- c = (sum < imm) || (sum < reg2);
- v = ((reg2 & 0x80000000) == (imm & 0x80000000)
- && (reg2 & 0x80000000) != (sum & 0x80000000));
-
- PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
- PSW |= ((z ? PSW_Z : 0) | ( n ? PSW_N : 0)
- | (c ? PSW_C : 0) | (v ? PSW_V : 0));
-}
-
-// 1111 1110 1001 1000 Rn Rn IMM32; sub imm32,Rn
-8.0xfe+8.0x98+4.RM2,4.RN0=RM2+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D5:::sub
-"sub"
-*am33
-{
- int dstreg;
-
- PC = cia;
- dstreg = translate_rreg (SD_, RN0);
- genericSub (FETCH32 (IMM32A, IMM32B, IMM32C, IMM32D), dstreg);
-}
-
-// 1111 1110 1010 1000 Rn Rn IMM32; subc imm32,Rn
-8.0xfe+8.0xa8+4.RM2,4.RN0=RM2+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D5:::subc
-"subc"
-*am33
-{
- int dstreg;
- unsigned32 imm, reg2, difference;
- int z, n, c, v;
-
- PC = cia;
- dstreg = translate_rreg (SD_, RN0);
-
- imm = FETCH32 (IMM32A, IMM32B, IMM32C, IMM32D);
- reg2 = State.regs[dstreg];
- difference = reg2 - imm - ((PSW & PSW_C) != 0);
- State.regs[dstreg] = difference;
-
- z = ((PSW & PSW_Z) != 0) && (difference == 0);
- n = (difference & 0x80000000);
- c = (imm > reg2);
- v = ((reg2 & 0x80000000) == (imm & 0x80000000)
- && (reg2 & 0x80000000) != (difference & 0x80000000));
-
- PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
- PSW |= ((z ? PSW_Z : 0) | ( n ? PSW_N : 0)
- | (c ? PSW_C : 0) | (v ? PSW_V : 0));
-}
-
-// 1111 1110 0111 1000 Rn Rn IMM32; cmp imm32,Rn
-8.0xfe+8.0xd8+4.RM2,4.RN0=RM2+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D5:::cmp
-"cmp"
-*am33
-{
- int srcreg;
-
- PC = cia;
- srcreg = translate_rreg (SD_, RN0);
- genericCmp (FETCH32(IMM32A, IMM32B, IMM32C, IMM32D), State.regs[srcreg]);
-}
-
-// 1111 1110 1111 1000 XRn XRn IMM32; mov imm32,XRn
-8.0xfe+8.0xf8+4.XRM2,4.XRN0=XRM2+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D5b:::mov
-"mov"
-*am33
-{
- int dstreg;
-
- PC = cia;
- dstreg = translate_xreg (SD_, XRN0);
-
- State.regs[dstreg] = FETCH32(IMM32A, IMM32B, IMM32C, IMM32D);
-}
-
-// 1111 1110 0000 1001 Rn Rn IMM32; and imm32,Rn
-8.0xfe+8.0x09+4.RM2,4.RN0=RM2+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D5:::and
-"and"
-*am33
-{
- int dstreg;
- int z,n;
-
- PC = cia;
- dstreg = translate_rreg (SD_, RN0);
-
- State.regs[dstreg] &= (FETCH32 (IMM32A, IMM32B, IMM32C, IMM32D));
- z = (State.regs[dstreg] == 0);
- n = (State.regs[dstreg] & 0x80000000) != 0;
- PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
- PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0));
-}
-
-// 1111 1110 0001 1001 Rn Rn IMM32; or imm32,Rn
-8.0xfe+8.0x19+4.RM2,4.RN0=RM2+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D5:::or
-"or"
-*am33
-{
- int dstreg;
- int z,n;
-
- PC = cia;
- dstreg = translate_rreg (SD_, RN0);
-
- State.regs[dstreg] |= (FETCH32 (IMM32A, IMM32B, IMM32C, IMM32D));
- z = (State.regs[dstreg] == 0);
- n = (State.regs[dstreg] & 0x80000000) != 0;
- PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
- PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0));
-}
-
-// 1111 1110 0010 1001 Rn Rn IMM32; xor imm32,Rn
-8.0xfe+8.0x29+4.RM2,4.RN0=RM2+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D5:::xor
-"xor"
-*am33
-{
- int dstreg;
- int z,n;
-
- PC = cia;
- dstreg = translate_rreg (SD_, RN0);
-
- State.regs[dstreg] ^= (FETCH32 (IMM32A, IMM32B, IMM32C, IMM32D));
- z = (State.regs[dstreg] == 0);
- n = (State.regs[dstreg] & 0x80000000) != 0;
- PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
- PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0));
-}
-
-// 1111 1110 0100 1001 Rn Rn IMM32; asr imm32,Rn
-8.0xfe+8.0x49+4.RM2,4.RN0=RM2+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D5:::asr
-"asr"
-*am33
-{
- int dstreg;
- signed32 temp;
- int c, z, n;
-
- PC = cia;
- dstreg = translate_rreg (SD_, RN0);
-
- temp = State.regs[dstreg];
- c = temp & 1;
- temp >>= (FETCH32 (IMM32A, IMM32B, IMM32C, IMM32D));
- State.regs[dstreg] = temp;
- z = (State.regs[dstreg] == 0);
- n = (State.regs[dstreg] & 0x80000000) != 0;
- PSW &= ~(PSW_Z | PSW_N | PSW_C);
- PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0) | (c ? PSW_C : 0));
-}
-
-// 1111 1110 0101 1001 Rn Rn IMM32; lsr imm32,Rn
-8.0xfe+8.0x59+4.RM2,4.RN0=RM2+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D5:::lsr
-"lsr"
-*am33
-{
- int dstreg;
- int z, n, c;
-
- PC = cia;
- dstreg = translate_rreg (SD_, RN0);
-
- c = State.regs[dstreg] & 1;
- State.regs[dstreg] >>= (FETCH32 (IMM32A, IMM32B, IMM32C, IMM32D));
- z = (State.regs[dstreg] == 0);
- n = (State.regs[dstreg] & 0x80000000) != 0;
- PSW &= ~(PSW_Z | PSW_N | PSW_C);
- PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0) | (c ? PSW_C : 0));
-}
-
-// 1111 1110 0110 1001 Rn Rn IMM32; asl imm32,Rn
-8.0xfe+8.0x69+4.RM2,4.RN0=RM2+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D5:::asl
-"asl"
-*am33
-{
- int dstreg;
- int z, n;
-
- PC = cia;
- dstreg = translate_rreg (SD_, RN0);
-
- State.regs[dstreg] <<= (FETCH32 (IMM32A, IMM32B, IMM32C, IMM32D));
- z = (State.regs[dstreg] == 0);
- n = (State.regs[dstreg] & 0x80000000) != 0;
- PSW &= ~(PSW_Z | PSW_N);
- PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0));
-}
-
-// 1111 1110 1010 1001 Rn Rn IMM32; mul imm32,Rn
-8.0xfe+8.0xa9+4.RM2,4.RN0=RM2+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D5:::mul
-"mul"
-*am33
-{
- int dstreg;
- unsigned64 temp;
- int z, n;
-
- PC = cia;
- dstreg = translate_rreg (SD_, RN0);
-
- temp = ((signed64)(signed32)State.regs[dstreg]
- * (signed64)(signed32)(FETCH32 (IMM32A, IMM32B, IMM32C, IMM32D)));
- State.regs[dstreg] = temp & 0xffffffff;
- State.regs[REG_MDR] = (temp & 0xffffffff00000000LL) >> 32;
- z = (State.regs[dstreg] == 0);
- n = (State.regs[dstreg] & 0x80000000) != 0;
- PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
- PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0));
-}
-
-// 1111 1110 1011 1001 Rn Rn IMM32; mulu imm32,Rn
-8.0xfe+8.0xb9+4.RM2,4.RN0=RM2+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D5:::mulu
-"mulu"
-*am33
-{
- int dstreg;
- unsigned64 temp;
- int z, n;
-
- PC = cia;
- dstreg = translate_rreg (SD_, RN0);
-
- temp = ((unsigned64)State.regs[dstreg]
- * (unsigned64) (FETCH32 (IMM32A, IMM32B, IMM32C, IMM32D)));
- State.regs[dstreg] = temp & 0xffffffff;
- State.regs[REG_MDR] = (temp & 0xffffffff00000000LL) >> 32;
- z = (State.regs[dstreg] == 0);
- n = (State.regs[dstreg] & 0x80000000) != 0;
- PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
- PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0));
-}
-
-// 1111 1110 1110 1001 Rn Rn IMM32; btst imm32,Rn
-8.0xfe+8.0xe9+4.RM2,4.RN0=RM2+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D5a:::btst
-"btst"
-*am33
-{
- int srcreg;
-
- PC = cia;
- srcreg = translate_rreg (SD_, RN0);
- genericBtst (FETCH32 (IMM32A, IMM32B, IMM32C, IMM32D), State.regs[srcreg]);
-}
-
-// 1111 1110 0000 1010 Rn Rm IMM32; mov (d32,Rm),Rn
-8.0xfe+8.0x0a+4.RN2,4.RM0+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D5f:::mov
-"mov"
-*am33
-{
- int srcreg, dstreg;
-
- PC = cia;
- srcreg = translate_rreg (SD_, RM0);
- dstreg = translate_rreg (SD_, RN2);
- State.regs[dstreg] = load_word (State.regs[srcreg]
- + FETCH32 (IMM32A, IMM32B, IMM32C, IMM32D));
-}
-
-// 1111 1110 0001 1010 Rm Rn IMM32; mov Rm,(d32,Rn)
-8.0xfe+8.0x1a+4.RM2,4.RN0+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D5g:::mov
-"mov"
-*am33
-{
- int srcreg, dstreg;
-
- PC = cia;
- srcreg = translate_rreg (SD_, RM2);
- dstreg = translate_rreg (SD_, RN0);
- store_word (State.regs[dstreg] + FETCH32 (IMM32A, IMM32B, IMM32C, IMM32D),
- State.regs[srcreg]);
-}
-
-// 1111 1110 0010 1010 Rn Rm IMM32; movbu (d32,Rm),Rn
-8.0xfe+8.0x2a+4.RN2,4.RM0+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D5:::movbu
-"movbu"
-*am33
-{
- int srcreg, dstreg;
-
- PC = cia;
- srcreg = translate_rreg (SD_, RM0);
- dstreg = translate_rreg (SD_, RN2);
- State.regs[dstreg] = load_byte (State.regs[srcreg]
- + FETCH32 (IMM32A, IMM32B, IMM32C, IMM32D));
-}
-
-// 1111 1110 0011 1010 Rm Rn IMM32; movbu Rm,(d32,Rn)
-8.0xfe+8.0x3a+4.RM2,4.RN0+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D5b:::movbu
-"movbu"
-*am33
-{
- int srcreg, dstreg;
-
- PC = cia;
- srcreg = translate_rreg (SD_, RM2);
- dstreg = translate_rreg (SD_, RN0);
- store_byte (State.regs[dstreg] + FETCH32 (IMM32A, IMM32B, IMM32C, IMM32D),
- State.regs[srcreg]);
-}
-
-// 1111 1110 0100 1010 Rn Rm IMM32; movhu (d32,Rm),Rn
-8.0xfe+8.0x4a+4.RN2,4.RM0+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D5:::movhu
-"movhu"
-*am33
-{
- int srcreg, dstreg;
-
- PC = cia;
- srcreg = translate_rreg (SD_, RM0);
- dstreg = translate_rreg (SD_, RN2);
- State.regs[dstreg] = load_half (State.regs[srcreg]
- + FETCH32 (IMM32A, IMM32B, IMM32C, IMM32D));
-}
-
-// 1111 1110 0101 1010 Rm Rn IMM32; movhu Rm,(d32,Rn)
-8.0xfe+8.0x5a+4.RM2,4.RN0+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D5b:::movhu
-"movhu"
-*am33
-{
- int srcreg, dstreg;
-
- PC = cia;
- srcreg = translate_rreg (SD_, RM2);
- dstreg = translate_rreg (SD_, RN0);
- store_half (State.regs[dstreg] + FETCH32 (IMM32A, IMM32B, IMM32C, IMM32D),
- State.regs[srcreg]);
-}
-
-// 1111 1110 0110 1010 Rn Rm IMM32; mov (d32,Rm+),Rn
-8.0xfe+8.0x6a+4.RN2,4.RM0!RN2+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D5y:::mov
-"mov"
-*am33
-{
- int srcreg, dstreg;
-
- PC = cia;
- srcreg = translate_rreg (SD_, RM0);
- dstreg = translate_rreg (SD_, RN2);
- State.regs[dstreg] = load_word (State.regs[srcreg]);
- State.regs[srcreg] += FETCH32 (IMM32A, IMM32B, IMM32C, IMM32D);
-}
-
-// 1111 1110 0111 1010 Rm Rn IMM32; mov Rm,(d32,Rn+)
-8.0xfe+8.0x7a+4.RM2,4.RN0+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D5z:::mov
-"mov"
-*am33
-{
- int srcreg, dstreg;
-
- PC = cia;
- srcreg = translate_rreg (SD_, RM2);
- dstreg = translate_rreg (SD_, RN0);
- store_word (State.regs[dstreg], State.regs[srcreg]);
- State.regs[dstreg] += FETCH32 (IMM32A, IMM32B, IMM32C, IMM32D);
-}
-
-
-// 1111 1110 1000 1010 Rn 0000 IMM32; mov (d32,sp),Rn
-8.0xfe+8.0x8a+4.RN2,4.0x0+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D5c:::mov
-"mov"
-*am33
-{
- int dstreg;
-
- PC = cia;
- dstreg = translate_rreg (SD_, RN2);
- State.regs[dstreg] = load_word (State.regs[REG_SP]
- + FETCH32 (IMM32A, IMM32B, IMM32C, IMM32D));
-}
-
-// 1111 1110 1001 1010 Rm 0000 IMM32; mov Rm,(d32,sp)
-8.0xfe+8.0x9a+4.RM2,4.0x0+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D5d:::mov
-"mov"
-*am33
-{
- int srcreg;
-
- PC = cia;
- srcreg = translate_rreg (SD_, RM2);
- store_word (State.regs[REG_SP] + FETCH32 (IMM32A, IMM32B, IMM32C, IMM32D),
- State.regs[srcreg]);
-}
-
-// 1111 1110 1010 1010 Rn 0000 IMM32; movbu (d32,sp),Rn
-8.0xfe+8.0xaa+4.RN2,4.0x0+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D5c:::movbu
-"movbu"
-*am33
-{
- int dstreg;
-
- PC = cia;
- dstreg = translate_rreg (SD_, RN2);
- State.regs[dstreg] = load_byte (State.regs[REG_SP]
- + FETCH32 (IMM32A, IMM32B, IMM32C, IMM32D));
-}
-
-// 1111 1110 1011 1010 Rm 0000 IMM32; movbu Rm,(d32,sp)
-8.0xfe+8.0xba+4.RM2,4.0x0+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D5d:::movbu
-"movbu"
-*am33
-{
- int srcreg;
-
- PC = cia;
- srcreg = translate_rreg (SD_, RM2);
- store_byte (State.regs[REG_SP] + FETCH32 (IMM32A, IMM32B, IMM32C, IMM32D),
- State.regs[srcreg]);
-}
-
-// 1111 1110 1100 1010 Rn 0000 IMM32; movhu (d32,sp),Rn
-8.0xfe+8.0xca+4.RN2,4.0x0+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D5c:::movhu
-"movhu"
-*am33
-{
- int dstreg;
-
- PC = cia;
- dstreg = translate_rreg (SD_, RN2);
- State.regs[dstreg] = load_half (State.regs[REG_SP]
- + FETCH32 (IMM32A, IMM32B, IMM32C, IMM32D));
-}
-
-// 1111 1110 1101 1010 Rm 0000 IMM32; movhu Rm,(d32,sp)
-8.0xfe+8.0xda+4.RM2,4.0x0+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D5d:::movhu
-"movhu"
-*am33
-{
- int srcreg;
-
- PC = cia;
- srcreg = translate_rreg (SD_, RM2);
- store_half (State.regs[REG_SP] + FETCH32 (IMM32A, IMM32B, IMM32C, IMM32D),
- State.regs[srcreg]);
-}
-
-
-// 1111 1110 1110 1010 Rn Rm IMM32; movhu (d32,Rm+),Rn
-8.0xfe+8.0xea+4.RN2,4.RM0!RN2+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D5y:::movhu
-"movhu"
-*am33
-{
- int srcreg, dstreg;
-
- PC = cia;
- srcreg = translate_rreg (SD_, RM0);
- dstreg = translate_rreg (SD_, RN2);
- State.regs[dstreg] = load_half (State.regs[srcreg]);
- State.regs[srcreg] += FETCH32 (IMM32A, IMM32B, IMM32C, IMM32D);
-}
-
-// 1111 1110 1111 1010 Rm Rn IMM32; movhu Rm,(d32,Rn+)
-8.0xfe+8.0xfa+4.RM2,4.RN0+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D5f:::movhu
-"movhu"
-*am33
-{
- int srcreg, dstreg;
-
- PC = cia;
- srcreg = translate_rreg (SD_, RM2);
- dstreg = translate_rreg (SD_, RN0);
- store_half (State.regs[dstreg], State.regs[srcreg]);
- State.regs[dstreg] += FETCH32 (IMM32A, IMM32B, IMM32C, IMM32D);
-}
-
-
-// 1111 1110 0000 1011 Rn Rn IMM32; mac imm32,Rn
-8.0xfe+8.0x0b+4.RN2,4.RN0=RN2+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D5:::mac
-"mac"
-*am33
-{
- int srcreg, imm;
- signed64 temp, sum;
- int c, v;
-
- PC = cia;
- srcreg = translate_rreg (SD_, RN0);
- imm = FETCH32 (IMM32A, IMM32B, IMM32C, IMM32D);
-
- temp = ((signed64)(signed32)State.regs[srcreg]
- * (signed64)(signed32)imm);
- sum = State.regs[REG_MCRL] + (temp & 0xffffffff);
- c = (sum < State.regs[REG_MCRL]) || (sum < (temp & 0xffffffff));
- State.regs[REG_MCRL] = sum;
- temp >>= 32;
- temp &= 0xffffffff;
- sum = State.regs[REG_MCRH] + temp + c;
- v = ((State.regs[REG_MCRH] & 0x80000000) == (temp & 0x80000000)
- && (temp & 0x80000000) != (sum & 0x80000000));
- State.regs[REG_MCRH] = sum;
- if (v)
- State.regs[REG_MCVF] = 1;
-}
-
-// 1111 1110 0001 1011 Rn Rn IMM32; macu imm32,Rn
-8.0xfe+8.0x1b+4.RN2,4.RN0=RN2+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D5:::macu
-"macu"
-*am33
-{
- int srcreg, imm;
- signed64 temp, sum;
- int c, v;
-
- PC = cia;
- srcreg = translate_rreg (SD_, RN0);
- imm = FETCH32 (IMM32A, IMM32B, IMM32C, IMM32D);
-
- temp = ((unsigned64)State.regs[srcreg]
- * (unsigned64)imm);
- sum = State.regs[REG_MCRL] + (temp & 0xffffffff);
- c = (sum < State.regs[REG_MCRL]) || (sum < (temp & 0xffffffff));
- State.regs[REG_MCRL] = sum;
- temp >>= 32;
- temp &= 0xffffffff;
- sum = State.regs[REG_MCRH] + temp + c;
- v = ((State.regs[REG_MCRH] & 0x80000000) == (temp & 0x80000000)
- && (temp & 0x80000000) != (sum & 0x80000000));
- State.regs[REG_MCRH] = sum;
- if (v)
- State.regs[REG_MCVF] = 1;
-}
-
-// 1111 1110 0010 1011 Rn Rn IMM32; macb imm32,Rn
-8.0xfe+8.0x2b+4.RN2,4.RN0=RN2+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D5:::macb
-"macb"
-*am33
-{
- int srcreg, imm;
- signed32 temp, sum;
- int v;
-
- PC = cia;
- srcreg = translate_rreg (SD_, RN0);
- imm = FETCH32 (IMM32A, IMM32B, IMM32C, IMM32D);
-
- temp = ((signed32)(signed8)(State.regs[srcreg] & 0xff)
- * (signed32)(signed8)(imm & 0xff));
- sum = State.regs[REG_MCRL] + temp;
- v = ((State.regs[REG_MCRL] & 0x80000000) == (temp & 0x80000000)
- && (temp & 0x80000000) != (sum & 0x80000000));
- State.regs[REG_MCRL] = sum;
- if (v)
- State.regs[REG_MCVF] = 1;
-}
-
-// 1111 1110 0011 1011 Rn Rn IMM32; macbu imm32,Rn
-8.0xfe+8.0x3b+4.RN2,4.RN0=RN2+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D5:::macbu
-"macbu"
-*am33
-{
- int srcreg, imm;
- signed32 temp, sum;
- int v;
-
- PC = cia;
- srcreg = translate_rreg (SD_, RN0);
- imm = FETCH32 (IMM32A, IMM32B, IMM32C, IMM32D);
-
- temp = ((unsigned32)(State.regs[srcreg] & 0xff)
- * (unsigned32)(imm & 0xff));
- sum = State.regs[REG_MCRL] + temp;
- v = ((State.regs[REG_MCRL] & 0x80000000) == (temp & 0x80000000)
- && (temp & 0x80000000) != (sum & 0x80000000));
- State.regs[REG_MCRL] = sum;
- if (v)
- State.regs[REG_MCVF] = 1;
-}
-
-// 1111 1110 0100 1011 Rn Rn IMM32; mach imm32,Rn
-8.0xfe+8.0x4b+4.RN2,4.RN0=RN2+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D5:::mach
-"mach"
-*am33
-{
- int srcreg, imm;
- signed32 temp, sum;
- int v;
-
- PC = cia;
- srcreg = translate_rreg (SD_, RN0);
- imm = FETCH32 (IMM32A, IMM32B, IMM32C, IMM32D);
-
- temp = ((signed32)(signed16)(State.regs[srcreg] & 0xffff)
- * (signed32)(signed16)(imm & 0xffff));
- sum = State.regs[REG_MCRL] + temp;
- v = ((State.regs[REG_MCRL] & 0x80000000) == (temp & 0x80000000)
- && (temp & 0x80000000) != (sum & 0x80000000));
- State.regs[REG_MCRL] = sum;
- if (v)
- State.regs[REG_MCVF] = 1;
-}
-
-// 1111 1110 0101 1011 Rn Rn IMM32; machu imm32,Rn
-8.0xfe+8.0x5b+4.RN2,4.RN0=RN2+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D5:::machu
-"machu"
-*am33
-{
- int srcreg, imm;
- signed32 temp, sum;
- int v;
-
- PC = cia;
- srcreg = translate_rreg (SD_, RN0);
- imm = FETCH32 (IMM32A, IMM32B, IMM32C, IMM32D);
-
- temp = ((unsigned32)(State.regs[srcreg] & 0xffff)
- * (unsigned32)(imm & 0xffff));
- sum = State.regs[REG_MCRL] + temp;
- v = ((State.regs[REG_MCRL] & 0x80000000) == (temp & 0x80000000)
- && (temp & 0x80000000) != (sum & 0x80000000));
- State.regs[REG_MCRL] = sum;
- if (v)
- State.regs[REG_MCVF] = 1;
-}
-
-// 1111 1110 0110 1011 Rn Rn IMM32; dmach imm32,Rn
-8.0xfe+8.0x6b+4.RN2,4.RN0=RN2+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D5:::dmach
-"dmach"
-*am33
-{
- int srcreg, imm;
- signed32 temp, temp2, sum;
- int v;
-
- PC = cia;
- srcreg = translate_rreg (SD_, RN0);
- imm = FETCH32 (IMM32A, IMM32B, IMM32C, IMM32D);
-
- temp = ((signed32)(signed16)(State.regs[srcreg] & 0xffff)
- * (signed32)(signed16)(imm & 0xffff));
- temp2 = ((signed32)(signed16)((State.regs[srcreg] >> 16) & 0xffff)
- * (signed32)(signed16)((imm >> 16) & 0xffff));
- sum = temp + temp2 + State.regs[REG_MCRL];
- v = ((State.regs[REG_MCRL] & 0x80000000) == (temp & 0x80000000)
- && (temp & 0x80000000) != (sum & 0x80000000));
- State.regs[REG_MCRL] = sum;
- if (v)
- State.regs[REG_MCVF] = 1;
-}
-
-// 1111 1110 0111 1011 Rn Rn IMM32; dmachu imm32,Rn
-8.0xfe+8.0x7b+4.RN2,4.RN0=RN2+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D5:::dmachu
-"dmachu"
-*am33
-{
- int srcreg, imm;
- signed32 temp, temp2, sum;
- int v;
-
- PC = cia;
- srcreg = translate_rreg (SD_, RN0);
- imm = FETCH32 (IMM32A, IMM32B, IMM32C, IMM32D);
-
- temp = ((unsigned32)(State.regs[srcreg] & 0xffff)
- * (unsigned32)(imm & 0xffff));
- temp2 = ((unsigned32)((State.regs[srcreg] >> 16) & 0xffff)
- * (unsigned32)((imm >> 16) & 0xffff));
- sum = temp + temp2 + State.regs[REG_MCRL];
- v = ((State.regs[REG_MCRL] & 0x80000000) == (temp & 0x80000000)
- && (temp & 0x80000000) != (sum & 0x80000000));
- State.regs[REG_MCRL] = sum;
- if (v)
- State.regs[REG_MCVF] = 1;
-}
-
-// 1111 1110 1000 1011 Rn Rn IMM32; dmulh imm32,Rn
-8.0xfe+8.0x8b+4.RN2,4.RN0=RN2+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D5:::dmulh
-"dmulh"
-*am33
-{
- int imm, dstreg;
- signed32 temp;
-
- PC = cia;
- dstreg = translate_rreg (SD_, RN0);
- imm = FETCH32 (IMM32A, IMM32B, IMM32C, IMM32D);
-
- temp = ((signed32)(signed16)(State.regs[dstreg] & 0xffff)
- * (signed32)(signed16)(imm & 0xffff));
- State.regs[REG_MDRQ] = temp;
- temp = ((signed32)(signed16)((State.regs[dstreg] >> 16) & 0xffff)
- * (signed32)(signed16)((imm>>16) & 0xffff));
- State.regs[dstreg] = temp;
-}
-
-// 1111 1110 1001 1011 Rn Rn IMM32; dmulhu imm32,Rn
-8.0xfe+8.0x9b+4.RN2,4.RN0=RN2+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D5:::dmulhu
-"dmulhu"
-*am33
-{
- int imm, dstreg;
- signed32 temp;
-
- PC = cia;
- dstreg = translate_rreg (SD_, RN0);
- imm = FETCH32 (IMM32A, IMM32B, IMM32C, IMM32D);
-
- temp = ((unsigned32)(State.regs[dstreg] & 0xffff)
- * (unsigned32)(imm & 0xffff));
- State.regs[REG_MDRQ] = temp;
- temp = ((unsigned32)((State.regs[dstreg] >> 16) & 0xffff)
- * (unsigned32)((imm >>16) & 0xffff));
- State.regs[dstreg] = temp;
-}
-
-// 1111 1110 0000 1110 Rn 0000 IMM32; mov (abs32),Rn
-8.0xfe+8.0x0e+4.RN2,4.0x0+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D5h:::mov
-"mov"
-*am33
-{
- int dstreg;
-
- PC = cia;
- dstreg = translate_rreg (SD_, RN2);
- State.regs[dstreg] = load_word (FETCH32 (IMM32A, IMM32B, IMM32C, IMM32D));
-}
-
-// 1111 1110 0001 1110 Rm 0000 IMM32; mov Rn,(abs32)
-8.0xfe+8.0x1e+4.RM2,4.0x0+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D5e:::mov
-"mov"
-*am33
-{
- int srcreg;
-
- PC = cia;
- srcreg = translate_rreg (SD_, RM2);
- store_word (FETCH32 (IMM32A, IMM32B, IMM32C, IMM32D), State.regs[srcreg]);
-}
-
-// 1111 1110 0020 1110 Rn 0000 IMM32; movbu (abs32),Rn
-8.0xfe+8.0x2e+4.RN2,4.0x0+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D5i:::movbu
-"movbu"
-*am33
-{
- int dstreg;
-
- PC = cia;
- dstreg = translate_rreg (SD_, RN2);
- State.regs[dstreg] = load_byte (FETCH32 (IMM32A, IMM32B, IMM32C, IMM32D));
-}
-
-// 1111 1110 0011 1110 Rm 0000 IMM32; movbu Rn,(abs32)
-8.0xfe+8.0x3e+4.RM2,4.0x0+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D5e:::movbu
-"movbu"
-*am33
-{
- int srcreg;
-
- PC = cia;
- srcreg = translate_rreg (SD_, RM2);
- store_byte (FETCH32 (IMM32A, IMM32B, IMM32C, IMM32D), State.regs[srcreg]);
-}
-
-// 1111 1110 0100 1110 Rn 0000 IMM32; movhu (abs32),Rn
-8.0xfe+8.0x4e+4.RN2,4.0x0+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D5j:::movhu
-"movhu"
-*am33
-{
- int dstreg;
-
- PC = cia;
- dstreg = translate_rreg (SD_, RN2);
- State.regs[dstreg] = load_half (FETCH32 (IMM32A, IMM32B, IMM32C, IMM32D));
-}
-
-// 1111 1110 0101 1110 Rm 0000 IMM32; movhu Rn,(abs32)
-8.0xfe+8.0x5e+4.RM2,4.0x0+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D5e:::movhu
-"movhu"
-*am33
-{
- int srcreg;
-
- PC = cia;
- srcreg = translate_rreg (SD_, RM2);
- store_half (FETCH32 (IMM32A, IMM32B, IMM32C, IMM32D), State.regs[srcreg]);
-}
-
-// 1111 0111 0000 0000 Rm1 Rn1 Rm2 Rn2; add_add Rm1, Rn1, Rm2, Rn2
-8.0xf7+8.0x00+4.RM1,4.RN1+4.RM2,4.RN2!RN1:D2:::add_add
-"add_add"
-*am33
-{
- int srcreg1, srcreg2, dstreg1, dstreg2;
- int result1;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM1);
- srcreg2 = translate_rreg (SD_, RM2);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- result1 = State.regs[dstreg1] + State.regs[srcreg1];
- State.regs[dstreg2] += State.regs[srcreg2];
- State.regs[dstreg1] = result1;
-}
-
-// 1111 0111 0001 0000 Rm1 Rn1 imm4 Rn2; add_add Rm1, Rn1, imm4, Rn2
-8.0xf7+8.0x10+4.RM1,4.RN1+4.IMM4,4.RN2!RN1:D2b:::add_add
-"add_add"
-*am33
-{
- int srcreg1, dstreg1, dstreg2;
- int result1;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM1);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- result1 = State.regs[dstreg1] + State.regs[srcreg1];
- State.regs[dstreg2] += EXTEND4 (IMM4);
- State.regs[dstreg1] = result1;
-}
-
-// 1111 0111 0010 0000 Rm1 Rn1 Rm2 Rn2; add_sub Rm1, Rn1, Rm2, Rn2
-8.0xf7+8.0x20+4.RM1,4.RN1+4.RM2,4.RN2!RN1:D2:::add_sub
-"add_sub"
-*am33
-{
- int srcreg1, srcreg2, dstreg1, dstreg2;
- int result1;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM1);
- srcreg2 = translate_rreg (SD_, RM2);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- result1 = State.regs[dstreg1] + State.regs[srcreg1];
- State.regs[dstreg2] -= State.regs[srcreg2];
- State.regs[dstreg1] = result1;
-}
-
-// 1111 0111 0011 0000 Rm1 Rn1 imm4 Rn2; add_sub Rm1, Rn1, imm4, Rn2
-8.0xf7+8.0x30+4.RM1,4.RN1+4.IMM4,4.RN2!RN1:D2b:::add_sub
-"add_sub"
-*am33
-{
- int srcreg1, dstreg1, dstreg2;
- int result1;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM1);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- result1 = State.regs[dstreg1] + State.regs[srcreg1];
- State.regs[dstreg2] -= EXTEND4 (IMM4);
- State.regs[dstreg1] = result1;
-}
-
-// 1111 0111 0100 0000 Rm1 Rn1 Rm2 Rn2; add_cmp Rm1, Rn1, Rm2, Rn2
-8.0xf7+8.0x40+4.RM1,4.RN1+4.RM2,4.RN2!RN1:D2:::add_cmp
-"add_cmp"
-*am33
-{
- int srcreg1, srcreg2, dstreg1, dstreg2;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM1);
- srcreg2 = translate_rreg (SD_, RM2);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- genericCmp (State.regs[srcreg2], State.regs[dstreg2]);
- State.regs[dstreg1] += State.regs[srcreg1];
-}
-
-// 1111 0111 0101 0000 Rm1 Rn1 imm4 Rn2; add_cmp Rm1, Rn1, imm4, Rn2
-8.0xf7+8.0x50+4.RM1,4.RN1+4.IMM4,4.RN2!RN1:D2b:::add_cmp
-"add_cmp"
-*am33
-{
- int srcreg1, dstreg1, dstreg2;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM1);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- genericCmp (EXTEND4 (IMM4), State.regs[dstreg2]);
- State.regs[dstreg1] += State.regs[srcreg1];
-}
-
-// 1111 0111 0110 0000 Rm1 Rn1 Rm2 Rn2; add_mov Rm1, Rn1, Rm2, Rn2
-8.0xf7+8.0x60+4.RM1,4.RN1+4.RM2,4.RN2!RN1:D2:::add_mov
-"add_mov"
-*am33
-{
- int srcreg1, srcreg2, dstreg1, dstreg2;
- int result1;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM1);
- srcreg2 = translate_rreg (SD_, RM2);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- result1 = State.regs[dstreg1] + State.regs[srcreg1];
- State.regs[dstreg2] = State.regs[srcreg2];
- State.regs[dstreg1] = result1;
-}
-
-// 1111 0111 0111 0000 Rm1 Rn1 imm4 Rn2; add_mov Rm1, Rn1, imm4, Rn2
-8.0xf7+8.0x70+4.RM1,4.RN1+4.IMM4,4.RN2!RN1:D2b:::add_mov
-"add_mov"
-*am33
-{
- int srcreg1, dstreg1, dstreg2;
- int result1;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM1);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- result1 = State.regs[dstreg1] + State.regs[srcreg1];
- State.regs[dstreg2] = EXTEND4 (IMM4);
- State.regs[dstreg1] = result1;
-}
-
-// 1111 0111 1000 0000 Rm1 Rn1 Rm2 Rn2; add_asr Rm1, Rn1, Rm2, Rn2
-8.0xf7+8.0x80+4.RM1,4.RN1+4.RM2,4.RN2!RN1:D2:::add_asr
-"add_asr"
-*am33
-{
- int srcreg1, srcreg2, dstreg1, dstreg2;
- int result1;
- signed int temp;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM1);
- srcreg2 = translate_rreg (SD_, RM2);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- result1 = State.regs[dstreg1] + State.regs[srcreg1];
- temp = State.regs[dstreg2];
- temp >>= State.regs[srcreg2];
- State.regs[dstreg2] = temp;
- State.regs[dstreg1] = result1;
-}
-
-// 1111 0111 1001 0000 Rm1 Rn1 imm4 Rn2; add_asr Rm1, Rn1, imm4, Rn2
-8.0xf7+8.0x90+4.RM1,4.RN1+4.IMM4,4.RN2!RN1:D2b:::add_asr
-"add_asr"
-*am33
-{
- int srcreg1, dstreg1, dstreg2;
- int result1;
- signed int temp;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM1);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- result1 = State.regs[dstreg1] + State.regs[srcreg1];
- temp = State.regs[dstreg2];
- temp >>= IMM4;
- State.regs[dstreg2] = temp;
- State.regs[dstreg1] = result1;
-}
-
-// 1111 0111 1010 0000 Rm1 Rn1 Rm2 Rn2; add_lsr Rm1, Rn1, Rm2, Rn2
-8.0xf7+8.0xa0+4.RM1,4.RN1+4.RM2,4.RN2!RN1:D2:::add_lsr
-"add_lsr"
-*am33
-{
- int srcreg1, srcreg2, dstreg1, dstreg2;
- int result1;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM1);
- srcreg2 = translate_rreg (SD_, RM2);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- result1 = State.regs[dstreg1] + State.regs[srcreg1];
- State.regs[dstreg2] >>= State.regs[srcreg2];
- State.regs[dstreg1] = result1;
-}
-
-// 1111 0111 1011 0000 Rm1 Rn1 imm4 Rn2; add_lsr Rm1, Rn1, imm4, Rn2
-8.0xf7+8.0xb0+4.RM1,4.RN1+4.IMM4,4.RN2!RN1:D2b:::add_lsr
-"add_lsr"
-*am33
-{
- int srcreg1, dstreg1, dstreg2;
- int result1;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM1);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- result1 = State.regs[dstreg1] + State.regs[srcreg1];
- State.regs[dstreg2] >>= IMM4;
- State.regs[dstreg1] = result1;
-}
-
-
-// 1111 0111 1100 0000 Rm1 Rn1 Rm2 Rn2; add_asl Rm1, Rn1, Rm2, Rn2
-8.0xf7+8.0xc0+4.RM1,4.RN1+4.RM2,4.RN2!RN1:D2:::add_asl
-"add_asl"
-*am33
-{
- int srcreg1, srcreg2, dstreg1, dstreg2;
- int result1;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM1);
- srcreg2 = translate_rreg (SD_, RM2);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- result1 = State.regs[dstreg1] + State.regs[srcreg1];
- State.regs[dstreg2] <<= State.regs[srcreg2];
- State.regs[dstreg1] = result1;
-}
-
-// 1111 0111 1101 0000 Rm1 Rn1 imm4 Rn2; add_asl Rm1, Rn1, imm4, Rn2
-8.0xf7+8.0xd0+4.RM1,4.RN1+4.IMM4,4.RN2!RN1:D2b:::add_asl
-"add_asl"
-*am33
-{
- int srcreg1, dstreg1, dstreg2;
- int result1;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM1);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- result1 = State.regs[dstreg1] + State.regs[srcreg1];
- State.regs[dstreg2] <<= IMM4;
- State.regs[dstreg1] = result1;
-}
-
-// 1111 0111 0000 0001 Rm1 Rn1 Rm2 Rn2; cmp_add Rm1, Rn1, Rm2, Rn2
-8.0xf7+8.0x01+4.RM1,4.RN1+4.RM2,4.RN2!RN1:D2:::cmp_add
-"cmp_add"
-*am33
-{
- int srcreg1, srcreg2, dstreg1, dstreg2;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM1);
- srcreg2 = translate_rreg (SD_, RM2);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- genericCmp (State.regs[srcreg1], State.regs[dstreg1]);
- State.regs[dstreg2] += State.regs[srcreg2];
-}
-
-// 1111 0111 0001 0001 Rm1 Rn1 imm4 Rn2; cmp_add Rm1, Rn1, imm4, Rn2
-8.0xf7+8.0x11+4.RM1,4.RN1+4.IMM4,4.RN2!RN1:D2b:::cmp_add
-"cmp_add"
-*am33
-{
- int srcreg1, dstreg1, dstreg2;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM1);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- genericCmp (State.regs[srcreg1], State.regs[dstreg1]);
- State.regs[dstreg2] += EXTEND4 (IMM4);
-}
-
-// 1111 0111 0010 0001 Rm1 Rn1 Rm2 Rn2; cmp_sub Rm1, Rn1, Rm2, Rn2
-8.0xf7+8.0x21+4.RM1,4.RN1+4.RM2,4.RN2!RN1:D2:::cmp_sub
-"cmp_sub"
-*am33
-{
- int srcreg1, srcreg2, dstreg1, dstreg2;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM1);
- srcreg2 = translate_rreg (SD_, RM2);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- genericCmp (State.regs[srcreg1], State.regs[dstreg1]);
- State.regs[dstreg2] -= State.regs[srcreg2];
-}
-
-// 1111 0111 0011 0001 Rm1 Rn1 imm4 Rn2; cmp_sub Rm1, Rn1, imm4, Rn2
-8.0xf7+8.0x31+4.RM1,4.RN1+4.IMM4,4.RN2!RN1:D2b:::cmp_sub
-"cmp_sub"
-*am33
-{
- int srcreg1, dstreg1, dstreg2;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM1);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- genericCmp (State.regs[srcreg1], State.regs[dstreg1]);
- State.regs[dstreg2] -= EXTEND4 (IMM4);
-}
-
-// 1111 0111 0110 0001 Rm1 Rn1 Rm2 Rn2; cmp_mov Rm1, Rn1, Rm2, Rn2
-8.0xf7+8.0x61+4.RM1,4.RN1+4.RM2,4.RN2!RN1:D2:::cmp_mov
-"cmp_mov"
-*am33
-{
- int srcreg1, srcreg2, dstreg1, dstreg2;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM1);
- srcreg2 = translate_rreg (SD_, RM2);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- genericCmp (State.regs[srcreg1], State.regs[dstreg1]);
- State.regs[dstreg2] = State.regs[srcreg2];
-}
-
-// 1111 0111 0111 0001 Rm1 Rn1 imm4 Rn2; cmp_mov Rm1, Rn1, imm4, Rn2
-8.0xf7+8.0x71+4.RM1,4.RN1+4.IMM4,4.RN2!RN1:D2b:::cmp_mov
-"cmp_mov"
-*am33
-{
- int srcreg1, dstreg1, dstreg2;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM1);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- genericCmp (State.regs[srcreg1], State.regs[dstreg1]);
- State.regs[dstreg2] = EXTEND4 (IMM4);
-}
-
-// 1111 0111 1000 0001 Rm1 Rn1 Rm2 Rn2; cmp_asr Rm1, Rn1, Rm2, Rn2
-8.0xf7+8.0x81+4.RM1,4.RN1+4.RM2,4.RN2!RN1:D2:::cmp_asr
-"cmp_asr"
-*am33
-{
- int srcreg1, srcreg2, dstreg1, dstreg2;
- signed int temp;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM1);
- srcreg2 = translate_rreg (SD_, RM2);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- genericCmp (State.regs[srcreg1], State.regs[dstreg1]);
- temp = State.regs[dstreg2];
- temp >>= State.regs[srcreg2];
- State.regs[dstreg2] = temp;
-}
-
-// 1111 0111 1001 0001 Rm1 Rn1 imm4 Rn2; cmp_asr Rm1, Rn1, imm4, Rn2
-8.0xf7+8.0x91+4.RM1,4.RN1+4.IMM4,4.RN2!RN1:D2b:::cmp_asr
-"cmp_asr"
-*am33
-{
- int srcreg1, dstreg1, dstreg2;
- signed int temp;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM1);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- genericCmp (State.regs[srcreg1], State.regs[dstreg1]);
- temp = State.regs[dstreg2];
- temp >>= IMM4;
- State.regs[dstreg2] = temp;
-}
-
-// 1111 0111 1010 0001 Rm1 Rn1 Rm2 Rn2; cmp_lsr Rm1, Rn1, Rm2, Rn2
-8.0xf7+8.0xa1+4.RM1,4.RN1+4.RM2,4.RN2!RN1:D2:::cmp_lsr
-"cmp_lsr"
-*am33
-{
- int srcreg1, srcreg2, dstreg1, dstreg2;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM1);
- srcreg2 = translate_rreg (SD_, RM2);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- genericCmp (State.regs[srcreg1], State.regs[dstreg1]);
- State.regs[dstreg2] >>= State.regs[srcreg2];
-}
-
-// 1111 0111 1011 0001 Rm1 Rn1 imm4 Rn2; cmp_lsr Rm1, Rn1, imm4, Rn2
-8.0xf7+8.0xb1+4.RM1,4.RN1+4.IMM4,4.RN2!RN1:D2b:::cmp_lsr
-"cmp_lsr"
-*am33
-{
- int srcreg1, dstreg1, dstreg2;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM1);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- genericCmp (State.regs[srcreg1], State.regs[dstreg1]);
- State.regs[dstreg2] >>= IMM4;
-}
-
-
-// 1111 0111 1100 0001 Rm1 Rn1 Rm2 Rn2; cmp_asl Rm1, Rn1, Rm2, Rn2
-8.0xf7+8.0xc1+4.RM1,4.RN1+4.RM2,4.RN2!RN1:D2:::cmp_asl
-"cmp_asl"
-*am33
-{
- int srcreg1, srcreg2, dstreg1, dstreg2;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM1);
- srcreg2 = translate_rreg (SD_, RM2);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- genericCmp (State.regs[srcreg1], State.regs[dstreg1]);
- State.regs[dstreg2] <<= State.regs[srcreg2];
-}
-
-// 1111 0111 1101 0001 Rm1 Rn1 imm4 Rn2; cmp_asl Rm1, Rn1, imm4, Rn2
-8.0xf7+8.0xd1+4.RM1,4.RN1+4.IMM4,4.RN2!RN1:D2b:::cmp_asl
-"cmp_asl"
-*am33
-{
- int srcreg1, dstreg1, dstreg2;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM1);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- genericCmp (State.regs[srcreg1], State.regs[dstreg1]);
- State.regs[dstreg2] <<= IMM4;
-}
-
-// 1111 0111 0000 0010 Rm1 Rn1 Rm2 Rn2; sub_add Rm1, Rn1, Rm2, Rn2
-8.0xf7+8.0x02+4.RM1,4.RN1+4.RM2,4.RN2!RN1:D2:::sub_add
-"sub_add"
-*am33
-{
- int srcreg1, srcreg2, dstreg1, dstreg2;
- int result1;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM1);
- srcreg2 = translate_rreg (SD_, RM2);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- result1 = State.regs[dstreg1] - State.regs[srcreg1];
- State.regs[dstreg2] += State.regs[srcreg2];
- State.regs[dstreg1] = result1;
-}
-
-// 1111 0111 0001 0010 Rm1 Rn1 imm4 Rn2; sub_add Rm1, Rn1, imm4, Rn2
-8.0xf7+8.0x12+4.RM1,4.RN1+4.IMM4,4.RN2!RN1:D2b:::sub_add
-"sub_add"
-*am33
-{
- int srcreg1, dstreg1, dstreg2;
- int result1;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM1);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- result1 = State.regs[dstreg1] - State.regs[srcreg1];
- State.regs[dstreg2] += EXTEND4 (IMM4);
- State.regs[dstreg1] = result1;
-}
-
-// 1111 0111 0010 0010 Rm1 Rn1 Rm2 Rn2; sub_sub Rm1, Rn1, Rm2, Rn2
-8.0xf7+8.0x22+4.RM1,4.RN1+4.RM2,4.RN2!RN1:D2:::sub_sub
-"sub_sub"
-*am33
-{
- int srcreg1, srcreg2, dstreg1, dstreg2;
- int result1;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM1);
- srcreg2 = translate_rreg (SD_, RM2);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- result1 = State.regs[dstreg1] - State.regs[srcreg1];
- State.regs[dstreg2] -= State.regs[srcreg2];
- State.regs[dstreg1] = result1;
-}
-
-// 1111 0111 0011 0010 Rm1 Rn1 imm4 Rn2; sub_sub Rm1, Rn1, imm4, Rn2
-8.0xf7+8.0x32+4.RM1,4.RN1+4.IMM4,4.RN2!RN1:D2b:::sub_sub
-"sub_sub"
-*am33
-{
- int srcreg1, dstreg1, dstreg2;
- int result1;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM1);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- result1 = State.regs[dstreg1] - State.regs[srcreg1];
- State.regs[dstreg2] -= EXTEND4 (IMM4);
- State.regs[dstreg1] = result1;
-}
-
-// 1111 0111 0100 0010 Rm1 Rn1 Rm2 Rn2; sub_cmp Rm1, Rn1, Rm2, Rn2
-8.0xf7+8.0x42+4.RM1,4.RN1+4.RM2,4.RN2!RN1:D2:::sub_cmp
-"sub_cmp"
-*am33
-{
- int srcreg1, srcreg2, dstreg1, dstreg2;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM1);
- srcreg2 = translate_rreg (SD_, RM2);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- genericCmp (State.regs[srcreg2], State.regs[dstreg2]);
- State.regs[dstreg1] -= State.regs[srcreg1];
-}
-
-// 1111 0111 0101 0010 Rm1 Rn1 imm4 Rn2; sub_cmp Rm1, Rn1, imm4, Rn2
-8.0xf7+8.0x52+4.RM1,4.RN1+4.IMM4,4.RN2!RN1:D2b:::sub_cmp
-"sub_cmp"
-*am33
-{
- int srcreg1, dstreg1, dstreg2;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM1);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- genericCmp (EXTEND4 (IMM4), State.regs[dstreg2]);
- State.regs[dstreg1] -= State.regs[srcreg1];
-}
-
-// 1111 0111 0110 0010 Rm1 Rn1 Rm2 Rn2; sub_mov Rm1, Rn1, Rm2, Rn2
-8.0xf7+8.0x62+4.RM1,4.RN1+4.RM2,4.RN2!RN1:D2:::sub_mov
-"sub_mov"
-*am33
-{
- int srcreg1, srcreg2, dstreg1, dstreg2;
- int result1;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM1);
- srcreg2 = translate_rreg (SD_, RM2);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- result1 = State.regs[dstreg1] - State.regs[srcreg1];
- State.regs[dstreg2] = State.regs[srcreg2];
- State.regs[dstreg1] = result1;
-}
-
-// 1111 0111 0111 0010 Rm1 Rn1 imm4 Rn2; sub_mov Rm1, Rn1, imm4, Rn2
-8.0xf7+8.0x72+4.RM1,4.RN1+4.IMM4,4.RN2!RN1:D2b:::sub_mov
-"sub_mov"
-*am33
-{
- int srcreg1, dstreg1, dstreg2;
- int result1;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM1);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- result1 = State.regs[dstreg1] - State.regs[srcreg1];
- State.regs[dstreg2] = EXTEND4 (IMM4);
- State.regs[dstreg1] = result1;
-}
-
-// 1111 0111 1000 0010 Rm1 Rn1 Rm2 Rn2; sub_asr Rm1, Rn1, Rm2, Rn2
-8.0xf7+8.0x82+4.RM1,4.RN1+4.RM2,4.RN2!RN1:D2:::sub_asr
-"sub_asr"
-*am33
-{
- int srcreg1, srcreg2, dstreg1, dstreg2;
- int result1;
- signed int temp;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM1);
- srcreg2 = translate_rreg (SD_, RM2);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- result1 = State.regs[dstreg1] - State.regs[srcreg1];
- temp = State.regs[dstreg2];
- temp >>= State.regs[srcreg2];
- State.regs[dstreg2] = temp;
- State.regs[dstreg1] = result1;
-}
-
-// 1111 0111 1001 0010 Rm1 Rn1 imm4 Rn2; sub_asr Rm1, Rn1, imm4, Rn2
-8.0xf7+8.0x92+4.RM1,4.RN1+4.IMM4,4.RN2!RN1:D2b:::sub_asr
-"sub_asr"
-*am33
-{
- int srcreg1, dstreg1, dstreg2;
- int result1;
- signed int temp;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM1);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- result1 = State.regs[dstreg1] - State.regs[srcreg1];
- temp = State.regs[dstreg2];
- temp >>= IMM4;
- State.regs[dstreg2] = temp;
- State.regs[dstreg1] = result1;
-}
-
-// 1111 0111 1010 0010 Rm1 Rn1 Rm2 Rn2; sub_lsr Rm1, Rn1, Rm2, Rn2
-8.0xf7+8.0xa2+4.RM1,4.RN1+4.RM2,4.RN2!RN1:D2:::sub_lsr
-"sub_lsr"
-*am33
-{
- int srcreg1, srcreg2, dstreg1, dstreg2;
- int result1;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM1);
- srcreg2 = translate_rreg (SD_, RM2);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- result1 = State.regs[dstreg1] - State.regs[srcreg1];
- State.regs[dstreg2] >>= State.regs[srcreg2];
- State.regs[dstreg1] = result1;
-}
-
-// 1111 0111 1011 0010 Rm1 Rn1 imm4 Rn2; sub_lsr Rm1, Rn1, imm4, Rn2
-8.0xf7+8.0xb2+4.RM1,4.RN1+4.IMM4,4.RN2!RN1:D2b:::sub_lsr
-"sub_lsr"
-*am33
-{
- int srcreg1, dstreg1, dstreg2;
- int result1;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM1);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- result1 = State.regs[dstreg1] - State.regs[srcreg1];
- State.regs[dstreg2] >>= IMM4;
- State.regs[dstreg1] = result1;
-}
-
-
-// 1111 0111 1100 0010 Rm1 Rn1 Rm2 Rn2; sub_asl Rm1, Rn1, Rm2, Rn2
-8.0xf7+8.0xc2+4.RM1,4.RN1+4.RM2,4.RN2!RN1:D2:::sub_asl
-"sub_asl"
-*am33
-{
- int srcreg1, srcreg2, dstreg1, dstreg2;
- int result1;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM1);
- srcreg2 = translate_rreg (SD_, RM2);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- result1 = State.regs[dstreg1] - State.regs[srcreg1];
- State.regs[dstreg2] <<= State.regs[srcreg2];
- State.regs[dstreg1] = result1;
-}
-
-// 1111 0111 1101 0010 Rm1 Rn1 imm4 Rn2; sub_asl Rm1, Rn1, imm4, Rn2
-8.0xf7+8.0xd2+4.RM1,4.RN1+4.IMM4,4.RN2!RN1:D2b:::sub_asl
-"sub_asl"
-*am33
-{
- int srcreg1, dstreg1, dstreg2;
- int result1;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM1);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- result1 = State.regs[dstreg1] - State.regs[srcreg1];
- State.regs[dstreg2] <<= IMM4;
- State.regs[dstreg1] = result1;
-}
-
-// 1111 0111 0000 0011 Rm1 Rn1 Rm2 Rn2; mov_add Rm1, Rn1, Rm2, Rn2
-8.0xf7+8.0x03+4.RM1,4.RN1+4.RM2,4.RN2!RN1:D2:::mov_add
-"mov_add"
-*am33
-{
- int srcreg1, srcreg2, dstreg1, dstreg2;
- int result1;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM1);
- srcreg2 = translate_rreg (SD_, RM2);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- result1 = State.regs[srcreg1];
- State.regs[dstreg2] += State.regs[srcreg2];
- State.regs[dstreg1] = result1;
-}
-
-// 1111 0111 0001 0011 Rm1 Rn1 imm4 Rn2; mov_add Rm1, Rn1, imm4, Rn2
-8.0xf7+8.0x13+4.RM1,4.RN1+4.IMM4,4.RN2!RN1:D2b:::mov_add
-"mov_add"
-*am33
-{
- int srcreg1, dstreg1, dstreg2;
- int result1;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM1);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- result1 = State.regs[srcreg1];
- State.regs[dstreg2] += EXTEND4 (IMM4);
- State.regs[dstreg1] = result1;
-}
-
-// 1111 0111 0010 0011 Rm1 Rn1 Rm2 Rn2; mov_sub Rm1, Rn1, Rm2, Rn2
-8.0xf7+8.0x23+4.RM1,4.RN1+4.RM2,4.RN2!RN1:D2:::mov_sub
-"mov_sub"
-*am33
-{
- int srcreg1, srcreg2, dstreg1, dstreg2;
- int result1;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM1);
- srcreg2 = translate_rreg (SD_, RM2);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- result1 = State.regs[srcreg1];
- State.regs[dstreg2] -= State.regs[srcreg2];
- State.regs[dstreg1] = result1;
-}
-
-// 1111 0111 0011 0011 Rm1 Rn1 imm4 Rn2; mov_sub Rm1, Rn1, imm4, Rn2
-8.0xf7+8.0x33+4.RM1,4.RN1+4.IMM4,4.RN2!RN1:D2b:::mov_sub
-"mov_sub"
-*am33
-{
- int srcreg1, dstreg1, dstreg2;
- int result1;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM1);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- result1 = State.regs[srcreg1];
- State.regs[dstreg2] -= EXTEND4 (IMM4);
- State.regs[dstreg1] = result1;
-}
-
-// 1111 0111 0100 0011 Rm1 Rn1 Rm2 Rn2; mov_cmp Rm1, Rn1, Rm2, Rn2
-8.0xf7+8.0x43+4.RM1,4.RN1+4.RM2,4.RN2!RN1:D2:::mov_cmp
-"mov_cmp"
-*am33
-{
- int srcreg1, srcreg2, dstreg1, dstreg2;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM1);
- srcreg2 = translate_rreg (SD_, RM2);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- genericCmp (State.regs[srcreg2], State.regs[dstreg2]);
- State.regs[dstreg1] = State.regs[srcreg1];
-}
-
-// 1111 0111 0101 0011 Rm1 Rn1 imm4 Rn2; mov_cmp Rm1, Rn1, imm4, Rn2
-8.0xf7+8.0x53+4.RM1,4.RN1+4.IMM4,4.RN2!RN1:D2b:::mov_cmp
-"mov_cmp"
-*am33
-{
- int srcreg1, dstreg1, dstreg2;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM1);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- genericCmp (EXTEND4 (IMM4), State.regs[dstreg2]);
- State.regs[dstreg1] = State.regs[srcreg1];
-}
-
-// 1111 0111 0110 0011 Rm1 Rn1 Rm2 Rn2; mov_mov Rm1, Rn1, Rm2, Rn2
-8.0xf7+8.0x63+4.RM1,4.RN1+4.RM2,4.RN2!RN1:D2:::mov_mov
-"mov_mov"
-*am33
-{
- int srcreg1, srcreg2, dstreg1, dstreg2;
- int result1;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM1);
- srcreg2 = translate_rreg (SD_, RM2);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- result1 = State.regs[srcreg1];
- State.regs[dstreg2] = State.regs[srcreg2];
- State.regs[dstreg1] = result1;
-}
-
-// 1111 0111 0111 0011 Rm1 Rn1 imm4 Rn2; mov_mov Rm1, Rn1, imm4, Rn2
-8.0xf7+8.0x73+4.RM1,4.RN1+4.IMM4,4.RN2!RN1:D2b:::mov_mov
-"mov_mov"
-*am33
-{
- int srcreg1, dstreg1, dstreg2;
- int result1;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM1);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- result1 = State.regs[srcreg1];
- State.regs[dstreg2] = EXTEND4 (IMM4);
- State.regs[dstreg1] = result1;
-}
-
-// 1111 0111 1000 0011 Rm1 Rn1 Rm2 Rn2; mov_asr Rm1, Rn1, Rm2, Rn2
-8.0xf7+8.0x83+4.RM1,4.RN1+4.RM2,4.RN2!RN1:D2:::mov_asr
-"mov_asr"
-*am33
-{
- int srcreg1, srcreg2, dstreg1, dstreg2;
- int result1;
- signed int temp;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM1);
- srcreg2 = translate_rreg (SD_, RM2);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- result1 = State.regs[srcreg1];
- temp = State.regs[dstreg2];
- temp >>= State.regs[srcreg2];
- State.regs[dstreg2] = temp;
- State.regs[dstreg1] = result1;
-}
-
-// 1111 0111 1001 0011 Rm1 Rn1 imm4 Rn2; mov_asr Rm1, Rn1, imm4, Rn2
-8.0xf7+8.0x93+4.RM1,4.RN1+4.IMM4,4.RN2!RN1:D2b:::mov_asr
-"mov_asr"
-*am33
-{
- int srcreg1, dstreg1, dstreg2;
- int result1;
- signed int temp;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM1);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- result1 = State.regs[srcreg1];
- temp = State.regs[dstreg2];
- temp >>= IMM4;
- State.regs[dstreg2] = temp;
- State.regs[dstreg1] = result1;
-}
-
-// 1111 0111 1010 0011 Rm1 Rn1 Rm2 Rn2; mov_lsr Rm1, Rn1, Rm2, Rn2
-8.0xf7+8.0xa3+4.RM1,4.RN1+4.RM2,4.RN2!RN1:D2:::mov_lsr
-"mov_lsr"
-*am33
-{
- int srcreg1, srcreg2, dstreg1, dstreg2;
- int result1;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM1);
- srcreg2 = translate_rreg (SD_, RM2);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- result1 = State.regs[srcreg1];
- State.regs[dstreg2] >>= State.regs[srcreg2];
- State.regs[dstreg1] = result1;
-}
-
-// 1111 0111 1011 0011 Rm1 Rn1 imm4 Rn2; mov_lsr Rm1, Rn1, imm4, Rn2
-8.0xf7+8.0xb3+4.RM1,4.RN1+4.IMM4,4.RN2!RN1:D2b:::mov_lsr
-"mov_lsr"
-*am33
-{
- int srcreg1, dstreg1, dstreg2;
- int result1;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM1);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- result1 = State.regs[srcreg1];
- State.regs[dstreg2] >>= IMM4;
- State.regs[dstreg1] = result1;
-}
-
-
-// 1111 0111 1100 0011 Rm1 Rn1 Rm2 Rn2; mov_asl Rm1, Rn1, Rm2, Rn2
-8.0xf7+8.0xc3+4.RM1,4.RN1+4.RM2,4.RN2!RN1:D2:::mov_asl
-"mov_asl"
-*am33
-{
- int srcreg1, srcreg2, dstreg1, dstreg2;
- int result1;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM1);
- srcreg2 = translate_rreg (SD_, RM2);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- result1 = State.regs[srcreg1];
- State.regs[dstreg2] <<= State.regs[srcreg2];
- State.regs[dstreg1] = result1;
-}
-
-// 1111 0111 1101 0011 Rm1 Rn1 imm4 Rn2; mov_asl Rm1, Rn1, imm4, Rn2
-8.0xf7+8.0xd3+4.RM1,4.RN1+4.IMM4,4.RN2!RN1:D2b:::mov_asl
-"mov_asl"
-*am33
-{
- int srcreg1, dstreg1, dstreg2;
- int result1;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM1);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- result1 = State.regs[srcreg1];
- State.regs[dstreg2] <<= IMM4;
- State.regs[dstreg1] = result1;
-}
-
-// 1111 0111 0000 0100 imm4 Rn1 Rm2 Rn2; add_add imm4, Rn1, Rm2, Rn2
-8.0xf7+8.0x04+4.IMM4A,4.RN1+4.RM2,4.RN2!RN1:D2c:::add_add
-"add_add"
-*am33
-{
- int srcreg2, dstreg1, dstreg2;
- int result1;
-
- PC = cia;
- srcreg2 = translate_rreg (SD_, RM2);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- result1 = State.regs[dstreg1] + EXTEND4 (IMM4A);
- State.regs[dstreg2] += State.regs[srcreg2];
- State.regs[dstreg1] = result1;
-}
-
-// 1111 0111 0001 0100 imm4 Rn1 imm4 Rn2; add_add imm4, Rn1, imm4, Rn2
-8.0xf7+8.0x14+4.IMM4A,4.RN1+4.IMM4,4.RN2!RN1:D2d:::add_add
-"add_add"
-*am33
-{
- int dstreg1, dstreg2;
- int result1;
-
- PC = cia;
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- result1 = State.regs[dstreg1] + EXTEND4 (IMM4A);
- State.regs[dstreg2] += EXTEND4 (IMM4);
- State.regs[dstreg1] = result1;
-}
-
-// 1111 0111 0010 0100 imm4 Rn1 Rm2 Rn2; add_sub imm4, Rn1, Rm2, Rn2
-8.0xf7+8.0x24+4.IMM4A,4.RN1+4.RM2,4.RN2!RN1:D2c:::add_sub
-"add_sub"
-*am33
-{
- int srcreg2, dstreg1, dstreg2;
- int result1;
-
- PC = cia;
- srcreg2 = translate_rreg (SD_, RM2);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- result1 = State.regs[dstreg1] + EXTEND4 (IMM4A);
- State.regs[dstreg2] -= State.regs[srcreg2];
- State.regs[dstreg1] = result1;
-}
-
-// 1111 0111 0011 0100 imm4 Rn1 imm4 Rn2; add_sub imm4, Rn1, imm4, Rn2
-8.0xf7+8.0x34+4.IMM4A,4.RN1+4.IMM4,4.RN2!RN1:D2d:::add_sub
-"add_sub"
-*am33
-{
- int dstreg1, dstreg2;
- int result1;
-
- PC = cia;
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- result1 = State.regs[dstreg1] + EXTEND4 (IMM4A);
- State.regs[dstreg2] -= EXTEND4 (IMM4);
- State.regs[dstreg1] = result1;
-}
-
-// 1111 0111 0100 0100 imm4 Rn1 Rm2 Rn2; add_cmp imm4, Rn1, Rm2, Rn2
-8.0xf7+8.0x44+4.IMM4A,4.RN1+4.RM2,4.RN2!RN1:D2c:::add_cmp
-"add_cmp"
-*am33
-{
- int srcreg2, dstreg1, dstreg2;
-
- PC = cia;
- srcreg2 = translate_rreg (SD_, RM2);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- genericCmp (State.regs[srcreg2], State.regs[dstreg2]);
- State.regs[dstreg1] += EXTEND4 (IMM4A);
-}
-
-// 1111 0111 0101 0100 imm4 Rn1 imm4 Rn2; add_cmp imm4, Rn1, imm4, Rn2
-8.0xf7+8.0x54+4.IMM4A,4.RN1+4.IMM4,4.RN2!RN1:D2d:::add_cmp
-"add_cmp"
-*am33
-{
- int dstreg1, dstreg2;
-
- PC = cia;
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- genericCmp (EXTEND4 (IMM4), State.regs[dstreg2]);
- State.regs[dstreg1] += EXTEND4 (IMM4A);
-}
-
-// 1111 0111 0110 0100 imm4 Rn1 Rm2 Rn2; add_mov imm4, Rn1, Rm2, Rn2
-8.0xf7+8.0x64+4.IMM4A,4.RN1+4.RM2,4.RN2!RN1:D2c:::add_mov
-"add_mov"
-*am33
-{
- int srcreg2, dstreg1, dstreg2;
- int result1;
-
- PC = cia;
- srcreg2 = translate_rreg (SD_, RM2);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- result1 = State.regs[dstreg1] + EXTEND4 (IMM4A);
- State.regs[dstreg2] = State.regs[srcreg2];
- State.regs[dstreg1] = result1;
-}
-
-// 1111 0111 0111 0100 imm4 Rn1 imm4 Rn2; add_mov imm4, Rn1, imm4, Rn2
-8.0xf7+8.0x74+4.IMM4A,4.RN1+4.IMM4,4.RN2!RN1:D2d:::add_mov
-"add_mov"
-*am33
-{
- int dstreg1, dstreg2;
- int result1;
-
- PC = cia;
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- result1 = State.regs[dstreg1] + EXTEND4 (IMM4A);
- State.regs[dstreg2] = EXTEND4 (IMM4);
- State.regs[dstreg1] = result1;
-}
-
-// 1111 0111 1000 0100 imm4 Rn1 Rm2 Rn2; add_asr imm4, Rn1, Rm2, Rn2
-8.0xf7+8.0x84+4.IMM4A,4.RN1+4.RM2,4.RN2!RN1:D2c:::add_asr
-"add_asr"
-*am33
-{
- int srcreg2, dstreg1, dstreg2;
- int result1;
- signed int temp;
-
- PC = cia;
- srcreg2 = translate_rreg (SD_, RM2);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- result1 = State.regs[dstreg1] + EXTEND4 (IMM4A);
- temp = State.regs[dstreg2];
- temp >>= State.regs[srcreg2];
- State.regs[dstreg2] = temp;
- State.regs[dstreg1] = result1;
-}
-
-// 1111 0111 1001 0100 imm4 Rn1 imm4 Rn2; add_asr imm4, Rn1, imm4, Rn2
-8.0xf7+8.0x94+4.IMM4A,4.RN1+4.IMM4,4.RN2!RN1:D2d:::add_asr
-"add_asr"
-*am33
-{
- int dstreg1, dstreg2;
- int result1;
- signed int temp;
-
- PC = cia;
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- result1 = State.regs[dstreg1] + EXTEND4 (IMM4A);
- temp = State.regs[dstreg2];
- temp >>= IMM4;
- State.regs[dstreg2] = temp;
- State.regs[dstreg1] = result1;
-}
-
-// 1111 0111 1010 0100 imm4 Rn1 Rm2 Rn2; add_lsr imm4, Rn1, Rm2, Rn2
-8.0xf7+8.0xa4+4.IMM4A,4.RN1+4.RM2,4.RN2!RN1:D2c:::add_lsr
-"add_lsr"
-*am33
-{
- int srcreg2, dstreg1, dstreg2;
- int result1;
-
- PC = cia;
- srcreg2 = translate_rreg (SD_, RM2);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- result1 = State.regs[dstreg1] + EXTEND4 (IMM4A);
- State.regs[dstreg2] >>= State.regs[srcreg2];
- State.regs[dstreg1] = result1;
-}
-
-// 1111 0111 1011 0100 imm4 Rn1 imm4 Rn2; add_lsr imm4, Rn1, imm4, Rn2
-8.0xf7+8.0xb4+4.IMM4A,4.RN1+4.IMM4,4.RN2!RN1:D2d:::add_lsr
-"add_lsr"
-*am33
-{
- int dstreg1, dstreg2;
- int result1;
-
- PC = cia;
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- result1 = State.regs[dstreg1] + EXTEND4 (IMM4A);
- State.regs[dstreg2] >>= IMM4;
- State.regs[dstreg1] = result1;
-}
-
-
-// 1111 0111 1100 0100 imm4 Rn1 Rm2 Rn2; add_asl imm4, Rn1, Rm2, Rn2
-8.0xf7+8.0xc4+4.IMM4A,4.RN1+4.RM2,4.RN2!RN1:D2c:::add_asl
-"add_asl"
-*am33
-{
- int srcreg2, dstreg1, dstreg2;
- int result1;
-
- PC = cia;
- srcreg2 = translate_rreg (SD_, RM2);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- result1 = State.regs[dstreg1] + EXTEND4 (IMM4A);
- State.regs[dstreg2] <<= State.regs[srcreg2];
- State.regs[dstreg1] = result1;
-}
-
-// 1111 0111 1101 0100 imm4 Rn1 imm4 Rn2; add_asl imm4, Rn1, imm4, Rn2
-8.0xf7+8.0xd4+4.IMM4A,4.RN1+4.IMM4,4.RN2!RN1:D2d:::add_asl
-"add_asl"
-*am33
-{
- int dstreg1, dstreg2;
- int result1;
-
- PC = cia;
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- result1 = State.regs[dstreg1] + EXTEND4 (IMM4A);
- State.regs[dstreg2] <<= IMM4;
- State.regs[dstreg1] = result1;
-}
-
-// 1111 0111 0000 0101 imm4 Rn1 Rm2 Rn2; cmp_add imm4, Rn1, Rm2, Rn2
-8.0xf7+8.0x05+4.IMM4A,4.RN1+4.RM2,4.RN2!RN1:D2c:::cmp_add
-"cmp_add"
-*am33
-{
- int srcreg2, dstreg1, dstreg2;
-
- PC = cia;
- srcreg2 = translate_rreg (SD_, RM2);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- genericCmp (EXTEND4 (IMM4A), State.regs[dstreg1]);
- State.regs[dstreg2] += State.regs[srcreg2];
-}
-
-// 1111 0111 0001 0101 imm4 Rn1 imm4 Rn2; cmp_add imm4, Rn1, imm4, Rn2
-8.0xf7+8.0x15+4.IMM4A,4.RN1+4.IMM4,4.RN2!RN1:D2d:::cmp_add
-"cmp_add"
-*am33
-{
- int dstreg1, dstreg2;
-
- PC = cia;
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- genericCmp (EXTEND4 (IMM4A), State.regs[dstreg1]);
- State.regs[dstreg2] += EXTEND4 (IMM4);
-}
-
-// 1111 0111 0010 0101 imm4 Rn1 Rm2 Rn2; cmp_sub imm4, Rn1, Rm2, Rn2
-8.0xf7+8.0x25+4.IMM4A,4.RN1+4.RM2,4.RN2!RN1:D2c:::cmp_sub
-"cmp_sub"
-*am33
-{
- int srcreg2, dstreg1, dstreg2;
-
- PC = cia;
- srcreg2 = translate_rreg (SD_, RM2);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- genericCmp (EXTEND4 (IMM4A), State.regs[dstreg1]);
- State.regs[dstreg2] -= State.regs[srcreg2];
-}
-
-// 1111 0111 0011 0101 imm4 Rn1 imm4 Rn2; cmp_sub imm4, Rn1, imm4, Rn2
-8.0xf7+8.0x35+4.IMM4A,4.RN1+4.IMM4,4.RN2!RN1:D2d:::cmp_sub
-"cmp_sub"
-*am33
-{
- int dstreg1, dstreg2;
-
- PC = cia;
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- genericCmp (EXTEND4 (IMM4A), State.regs[dstreg1]);
- State.regs[dstreg2] -= EXTEND4 (IMM4);
-}
-
-// 1111 0111 0110 0101 imm4 Rn1 Rm2 Rn2; cmp_mov imm4, Rn1, Rm2, Rn2
-8.0xf7+8.0x65+4.IMM4A,4.RN1+4.RM2,4.RN2!RN1:D2c:::cmp_mov
-"cmp_mov"
-*am33
-{
- int srcreg2, dstreg1, dstreg2;
-
- PC = cia;
- srcreg2 = translate_rreg (SD_, RM2);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- genericCmp (EXTEND4 (IMM4A), State.regs[dstreg1]);
- State.regs[dstreg2] = State.regs[srcreg2];
-}
-
-// 1111 0111 0111 0101 imm4 Rn1 imm4 Rn2; cmp_mov imm4, Rn1, imm4, Rn2
-8.0xf7+8.0x75+4.IMM4A,4.RN1+4.IMM4,4.RN2!RN1:D2d:::cmp_mov
-"cmp_mov"
-*am33
-{
- int dstreg1, dstreg2;
-
- PC = cia;
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- genericCmp (EXTEND4 (IMM4A), State.regs[dstreg1]);
- State.regs[dstreg2] = EXTEND4 (IMM4);
-}
-
-// 1111 0111 1000 0101 imm4 Rn1 Rm2 Rn2; cmp_asr imm4, Rn1, Rm2, Rn2
-8.0xf7+8.0x85+4.IMM4A,4.RN1+4.RM2,4.RN2!RN1:D2c:::cmp_asr
-"cmp_asr"
-*am33
-{
- int srcreg2, dstreg1, dstreg2;
- signed int temp;
-
- PC = cia;
- srcreg2 = translate_rreg (SD_, RM2);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- genericCmp (EXTEND4 (IMM4A), State.regs[dstreg1]);
- temp = State.regs[dstreg2];
- temp >>= State.regs[srcreg2];
- State.regs[dstreg2] = temp;
-}
-
-// 1111 0111 1001 0101 imm4 Rn1 imm4 Rn2; cmp_asr imm4, Rn1, imm4, Rn2
-8.0xf7+8.0x95+4.IMM4A,4.RN1+4.IMM4,4.RN2!RN1:D2d:::cmp_asr
-"cmp_asr"
-*am33
-{
- int dstreg1, dstreg2;
- signed int temp;
-
- PC = cia;
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- genericCmp (EXTEND4 (IMM4A), State.regs[dstreg1]);
- temp = State.regs[dstreg2];
- temp >>= IMM4;
- State.regs[dstreg2] = temp;
-}
-
-// 1111 0111 1010 0101 imm4 Rn1 Rm2 Rn2; cmp_lsr imm4, Rn1, Rm2, Rn2
-8.0xf7+8.0xa5+4.IMM4A,4.RN1+4.RM2,4.RN2!RN1:D2c:::cmp_lsr
-"cmp_lsr"
-*am33
-{
- int srcreg2, dstreg1, dstreg2;
-
- PC = cia;
- srcreg2 = translate_rreg (SD_, RM2);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- genericCmp (EXTEND4 (IMM4A), State.regs[dstreg1]);
- State.regs[dstreg2] >>= State.regs[srcreg2];
-}
-
-// 1111 0111 1011 0101 imm4 Rn1 imm4 Rn2; cmp_lsr imm4, Rn1, imm4, Rn2
-8.0xf7+8.0xb5+4.IMM4A,4.RN1+4.IMM4,4.RN2!RN1:D2d:::cmp_lsr
-"cmp_lsr"
-*am33
-{
- int dstreg1, dstreg2;
-
- PC = cia;
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- genericCmp (EXTEND4 (IMM4A), State.regs[dstreg1]);
- State.regs[dstreg2] >>= IMM4;
-}
-
-
-// 1111 0111 1100 0101 imm4 Rn1 Rm2 Rn2; cmp_asl imm4, Rn1, Rm2, Rn2
-8.0xf7+8.0xc5+4.IMM4A,4.RN1+4.RM2,4.RN2!RN1:D2c:::cmp_asl
-"cmp_asl"
-*am33
-{
- int srcreg2, dstreg1, dstreg2;
-
- PC = cia;
- srcreg2 = translate_rreg (SD_, RM2);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- genericCmp (EXTEND4 (IMM4A), State.regs[dstreg1]);
- State.regs[dstreg2] <<= State.regs[srcreg2];
-}
-
-// 1111 0111 1101 0101 imm4 Rn1 imm4 Rn2; cmp_asl imm4, Rn1, imm4, Rn2
-8.0xf7+8.0xd5+4.IMM4A,4.RN1+4.IMM4,4.RN2!RN1:D2d:::cmp_asl
-"cmp_asl"
-*am33
-{
- int dstreg1, dstreg2;
-
- PC = cia;
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- genericCmp (EXTEND4 (IMM4A), State.regs[dstreg1]);
- State.regs[dstreg2] <<= IMM4;
-}
-
-// 1111 0111 0000 0110 imm4 Rn1 Rm2 Rn2; sub_add imm4, Rn1, Rm2, Rn2
-8.0xf7+8.0x06+4.IMM4A,4.RN1+4.RM2,4.RN2!RN1:D2c:::sub_add
-"sub_add"
-*am33
-{
- int srcreg2, dstreg1, dstreg2;
- int result1;
-
- PC = cia;
- srcreg2 = translate_rreg (SD_, RM2);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- result1 = State.regs[dstreg1] - EXTEND4 (IMM4A);
- State.regs[dstreg2] += State.regs[srcreg2];
- State.regs[dstreg1] = result1;
-}
-
-// 1111 0111 0001 0110 imm4 Rn1 imm4 Rn2; sub_add imm4, Rn1, imm4, Rn2
-8.0xf7+8.0x16+4.IMM4A,4.RN1+4.IMM4,4.RN2!RN1:D2d:::sub_add
-"sub_add"
-*am33
-{
- int dstreg1, dstreg2;
- int result1;
-
- PC = cia;
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- result1 = State.regs[dstreg1] - EXTEND4 (IMM4A);
- State.regs[dstreg2] += EXTEND4 (IMM4);
- State.regs[dstreg1] = result1;
-}
-
-// 1111 0111 0010 0110 imm4 Rn1 Rm2 Rn2; sub_sub imm4, Rn1, Rm2, Rn2
-8.0xf7+8.0x26+4.IMM4A,4.RN1+4.RM2,4.RN2!RN1:D2c:::sub_sub
-"sub_sub"
-*am33
-{
- int srcreg2, dstreg1, dstreg2;
- int result1;
-
- PC = cia;
- srcreg2 = translate_rreg (SD_, RM2);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- result1 = State.regs[dstreg1] - EXTEND4 (IMM4A);
- State.regs[dstreg2] -= State.regs[srcreg2];
- State.regs[dstreg1] = result1;
-}
-
-// 1111 0111 0011 0110 imm4 Rn1 imm4 Rn2; sub_sub imm4, Rn1, imm4, Rn2
-8.0xf7+8.0x36+4.IMM4A,4.RN1+4.IMM4,4.RN2!RN1:D2d:::sub_sub
-"sub_sub"
-*am33
-{
- int dstreg1, dstreg2;
- int result1;
-
- PC = cia;
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- result1 = State.regs[dstreg1] - EXTEND4 (IMM4A);
- State.regs[dstreg2] -= EXTEND4 (IMM4);
- State.regs[dstreg1] = result1;
-}
-
-// 1111 0111 0100 0110 imm4 Rn1 Rm2 Rn2; sub_cmp imm4, Rn1, Rm2, Rn2
-8.0xf7+8.0x46+4.IMM4A,4.RN1+4.RM2,4.RN2!RN1:D2c:::sub_cmp
-"sub_cmp"
-*am33
-{
- int srcreg2, dstreg1, dstreg2;
-
- PC = cia;
- srcreg2 = translate_rreg (SD_, RM2);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- genericCmp (State.regs[srcreg2], State.regs[dstreg2]);
- State.regs[dstreg1] -= EXTEND4 (IMM4A);
-}
-
-// 1111 0111 0101 0110 imm4 Rn1 imm4 Rn2; sub_cmp imm4, Rn1, imm4, Rn2
-8.0xf7+8.0x56+4.IMM4A,4.RN1+4.IMM4,4.RN2!RN1:D2d:::sub_cmp
-"sub_cmp"
-*am33
-{
- int dstreg1, dstreg2;
-
- PC = cia;
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- genericCmp (EXTEND4 (IMM4), State.regs[dstreg2]);
- State.regs[dstreg1] -= EXTEND4 (IMM4A);
-}
-
-// 1111 0111 0110 0110 imm4 Rn1 Rm2 Rn2; sub_mov imm4, Rn1, Rm2, Rn2
-8.0xf7+8.0x66+4.IMM4A,4.RN1+4.RM2,4.RN2!RN1:D2c:::sub_mov
-"sub_mov"
-*am33
-{
- int srcreg2, dstreg1, dstreg2;
- int result1;
-
- PC = cia;
- srcreg2 = translate_rreg (SD_, RM2);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- result1 = State.regs[dstreg1] - EXTEND4 (IMM4A);
- State.regs[dstreg2] = State.regs[srcreg2];
- State.regs[dstreg1] = result1;
-}
-
-// 1111 0111 0111 0110 imm4 Rn1 imm4 Rn2; sub_mov imm4, Rn1, imm4, Rn2
-8.0xf7+8.0x76+4.IMM4A,4.RN1+4.IMM4,4.RN2!RN1:D2d:::sub_mov
-"sub_mov"
-*am33
-{
- int dstreg1, dstreg2;
- int result1;
-
- PC = cia;
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- result1 = State.regs[dstreg1] - EXTEND4 (IMM4A);
- State.regs[dstreg2] = EXTEND4 (IMM4);
- State.regs[dstreg1] = result1;
-}
-
-// 1111 0111 1000 0110 imm4 Rn1 Rm2 Rn2; sub_asr imm4, Rn1, Rm2, Rn2
-8.0xf7+8.0x86+4.IMM4A,4.RN1+4.RM2,4.RN2!RN1:D2c:::sub_asr
-"sub_asr"
-*am33
-{
- int srcreg2, dstreg1, dstreg2;
- int result1;
- signed int temp;
-
- PC = cia;
- srcreg2 = translate_rreg (SD_, RM2);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- result1 = State.regs[dstreg1] - EXTEND4 (IMM4A);
- temp = State.regs[dstreg2];
- temp >>= State.regs[srcreg2];
- State.regs[dstreg2] = temp;
- State.regs[dstreg1] = result1;
-}
-
-// 1111 0111 1001 0110 imm4 Rn1 imm4 Rn2; sub_asr imm4, Rn1, imm4, Rn2
-8.0xf7+8.0x96+4.IMM4A,4.RN1+4.IMM4,4.RN2!RN1:D2d:::sub_asr
-"sub_asr"
-*am33
-{
- int dstreg1, dstreg2;
- int result1;
- signed int temp;
-
- PC = cia;
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- result1 = State.regs[dstreg1] - EXTEND4 (IMM4A);
- temp = State.regs[dstreg2];
- temp >>= IMM4;
- State.regs[dstreg2] = temp;
- State.regs[dstreg1] = result1;
-}
-
-// 1111 0111 1010 0110 imm4 Rn1 Rm2 Rn2; sub_lsr imm4, Rn1, Rm2, Rn2
-8.0xf7+8.0xa6+4.IMM4A,4.RN1+4.RM2,4.RN2!RN1:D2c:::sub_lsr
-"sub_lsr"
-*am33
-{
- int srcreg2, dstreg1, dstreg2;
- int result1;
-
- PC = cia;
- srcreg2 = translate_rreg (SD_, RM2);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- result1 = State.regs[dstreg1] - EXTEND4 (IMM4A);
- State.regs[dstreg2] >>= State.regs[srcreg2];
- State.regs[dstreg1] = result1;
-}
-
-// 1111 0111 1011 0110 imm4 Rn1 imm4 Rn2; sub_lsr imm4, Rn1, imm4, Rn2
-8.0xf7+8.0xb6+4.IMM4A,4.RN1+4.IMM4,4.RN2!RN1:D2d:::sub_lsr
-"sub_lsr"
-*am33
-{
- int dstreg1, dstreg2;
- int result1;
-
- PC = cia;
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- result1 = State.regs[dstreg1] - EXTEND4 (IMM4A);
- State.regs[dstreg2] >>= IMM4;
- State.regs[dstreg1] = result1;
-}
-
-
-// 1111 0111 1100 0110 imm4 Rn1 Rm2 Rn2; sub_asl imm4, Rn1, Rm2, Rn2
-8.0xf7+8.0xc6+4.IMM4A,4.RN1+4.RM2,4.RN2!RN1:D2c:::sub_asl
-"sub_asl"
-*am33
-{
- int srcreg2, dstreg1, dstreg2;
- int result1;
-
- PC = cia;
- srcreg2 = translate_rreg (SD_, RM2);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- result1 = State.regs[dstreg1] - EXTEND4 (IMM4A);
- State.regs[dstreg2] <<= State.regs[srcreg2];
- State.regs[dstreg1] = result1;
-}
-
-// 1111 0111 1101 0110 imm4 Rn1 imm4 Rn2; sub_asl imm4, Rn1, imm4, Rn2
-8.0xf7+8.0xd6+4.IMM4A,4.RN1+4.IMM4,4.RN2!RN1:D2d:::sub_asl
-"sub_asl"
-*am33
-{
- int dstreg1, dstreg2;
- int result1;
-
- PC = cia;
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- result1 = State.regs[dstreg1] - EXTEND4 (IMM4A);
- State.regs[dstreg2] <<= IMM4;
- State.regs[dstreg1] = result1;
-}
-
-// 1111 0111 0000 0111 imm4 Rn1 Rm2 Rn2; mov_add imm4, Rn1, Rm2, Rn2
-8.0xf7+8.0x07+4.IMM4A,4.RN1+4.RM2,4.RN2!RN1:D2c:::mov_add
-"mov_add"
-*am33
-{
- int srcreg2, dstreg1, dstreg2;
- int result1;
-
- PC = cia;
- srcreg2 = translate_rreg (SD_, RM2);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- result1 = EXTEND4 (IMM4A);
- State.regs[dstreg2] += State.regs[srcreg2];
- State.regs[dstreg1] = result1;
-}
-
-// 1111 0111 0001 0111 imm4 Rn1 imm4 Rn2; mov_add imm4, Rn1, imm4, Rn2
-8.0xf7+8.0x17+4.IMM4A,4.RN1+4.IMM4,4.RN2!RN1:D2d:::mov_add
-"mov_add"
-*am33
-{
- int dstreg1, dstreg2;
- int result1;
-
- PC = cia;
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- result1 = EXTEND4 (IMM4A);
- State.regs[dstreg2] += EXTEND4 (IMM4);
- State.regs[dstreg1] = result1;
-}
-
-// 1111 0111 0010 0111 imm4 Rn1 Rm2 Rn2; mov_sub imm4, Rn1, Rm2, Rn2
-8.0xf7+8.0x27+4.IMM4A,4.RN1+4.RM2,4.RN2!RN1:D2c:::mov_sub
-"mov_sub"
-*am33
-{
- int srcreg2, dstreg1, dstreg2;
- int result1;
-
- PC = cia;
- srcreg2 = translate_rreg (SD_, RM2);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- result1 = EXTEND4 (IMM4A);
- State.regs[dstreg2] -= State.regs[srcreg2];
- State.regs[dstreg1] = result1;
-}
-
-// 1111 0111 0011 0111 imm4 Rn1 imm4 Rn2; mov_sub imm4, Rn1, imm4, Rn2
-8.0xf7+8.0x37+4.IMM4A,4.RN1+4.IMM4,4.RN2!RN1:D2d:::mov_sub
-"mov_sub"
-*am33
-{
- int dstreg1, dstreg2;
- int result1;
-
- PC = cia;
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- result1 = EXTEND4 (IMM4A);
- State.regs[dstreg2] -= EXTEND4 (IMM4);
- State.regs[dstreg1] = result1;
-}
-
-// 1111 0111 0100 0111 imm4 Rn1 Rm2 Rn2; mov_cmp imm4, Rn1, Rm2, Rn2
-8.0xf7+8.0x47+4.IMM4A,4.RN1+4.RM2,4.RN2!RN1:D2c:::mov_cmp
-"mov_cmp"
-*am33
-{
- int srcreg2, dstreg1, dstreg2;
-
- PC = cia;
- srcreg2 = translate_rreg (SD_, RM2);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- genericCmp (State.regs[srcreg2], State.regs[dstreg2]);
- State.regs[dstreg1] = EXTEND4 (IMM4A);
-}
-
-// 1111 0111 0101 0111 imm4 Rn1 imm4 Rn2; mov_cmp imm4, Rn1, imm4, Rn2
-8.0xf7+8.0x57+4.IMM4A,4.RN1+4.IMM4,4.RN2!RN1:D2d:::mov_cmp
-"mov_cmp"
-*am33
-{
- int dstreg1, dstreg2;
-
- PC = cia;
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- genericCmp (EXTEND4 (IMM4), State.regs[dstreg2]);
- State.regs[dstreg1] = EXTEND4 (IMM4A);
-}
-
-// 1111 0111 0110 0111 imm4 Rn1 Rm2 Rn2; mov_mov imm4, Rn1, Rm2, Rn2
-8.0xf7+8.0x67+4.IMM4A,4.RN1+4.RM2,4.RN2!RN1:D2c:::mov_mov
-"mov_mov"
-*am33
-{
- int srcreg2, dstreg1, dstreg2;
- int result1;
-
- PC = cia;
- srcreg2 = translate_rreg (SD_, RM2);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- result1 = EXTEND4 (IMM4A);
- State.regs[dstreg2] = State.regs[srcreg2];
- State.regs[dstreg1] = result1;
-}
-
-// 1111 0111 0111 0111 imm4 Rn1 imm4 Rn2; mov_mov imm4, Rn1, imm4, Rn2
-8.0xf7+8.0x77+4.IMM4A,4.RN1+4.IMM4,4.RN2!RN1:D2d:::mov_mov
-"mov_mov"
-*am33
-{
- int dstreg1, dstreg2;
- int result1;
-
- PC = cia;
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- result1 = EXTEND4 (IMM4A);
- State.regs[dstreg2] = EXTEND4 (IMM4);
- State.regs[dstreg1] = result1;
-}
-
-// 1111 0111 1000 0111 imm4 Rn1 Rm2 Rn2; mov_asr imm4, Rn1, Rm2, Rn2
-8.0xf7+8.0x87+4.IMM4A,4.RN1+4.RM2,4.RN2!RN1:D2c:::mov_asr
-"mov_asr"
-*am33
-{
- int srcreg2, dstreg1, dstreg2;
- int result1;
- signed int temp;
-
- PC = cia;
- srcreg2 = translate_rreg (SD_, RM2);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- result1 = EXTEND4 (IMM4A);
- temp = State.regs[dstreg2];
- temp >>= State.regs[srcreg2];
- State.regs[dstreg2] = temp;
- State.regs[dstreg1] = result1;
-}
-
-// 1111 0111 1001 0111 imm4 Rn1 imm4 Rn2; mov_asr imm4, Rn1, imm4, Rn2
-8.0xf7+8.0x97+4.IMM4A,4.RN1+4.IMM4,4.RN2!RN1:D2d:::mov_asr
-"mov_asr"
-*am33
-{
- int dstreg1, dstreg2;
- int result1;
- signed int temp;
-
- PC = cia;
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- result1 = EXTEND4 (IMM4A);
- temp = State.regs[dstreg2];
- temp >>= IMM4;
- State.regs[dstreg2] = temp;
- State.regs[dstreg1] = result1;
-}
-
-// 1111 0111 1010 0111 imm4 Rn1 Rm2 Rn2; mov_lsr imm4, Rn1, Rm2, Rn2
-8.0xf7+8.0xa7+4.IMM4A,4.RN1+4.RM2,4.RN2!RN1:D2c:::mov_lsr
-"mov_lsr"
-*am33
-{
- int srcreg2, dstreg1, dstreg2;
- int result1;
-
- PC = cia;
- srcreg2 = translate_rreg (SD_, RM2);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- result1 = EXTEND4 (IMM4A);
- State.regs[dstreg2] >>= State.regs[srcreg2];
- State.regs[dstreg1] = result1;
-}
-
-// 1111 0111 1011 0111 imm4 Rn1 imm4 Rn2; mov_lsr imm4, Rn1, imm4, Rn2
-8.0xf7+8.0xb7+4.IMM4A,4.RN1+4.IMM4,4.RN2!RN1:D2d:::mov_lsr
-"mov_lsr"
-*am33
-{
- int dstreg1, dstreg2;
- int result1;
-
- PC = cia;
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- result1 = EXTEND4 (IMM4A);
- State.regs[dstreg2] >>= IMM4;
- State.regs[dstreg1] = result1;
-}
-
-
-// 1111 0111 1100 0111 imm4 Rn1 Rm2 Rn2; mov_asl imm4, Rn1, Rm2, Rn2
-8.0xf7+8.0xc7+4.IMM4A,4.RN1+4.RM2,4.RN2!RN1:D2c:::mov_asl
-"mov_asl"
-*am33
-{
- int srcreg2, dstreg1, dstreg2;
- int result1;
-
- PC = cia;
- srcreg2 = translate_rreg (SD_, RM2);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- result1 = EXTEND4 (IMM4A);
- State.regs[dstreg2] <<= State.regs[srcreg2];
- State.regs[dstreg1] = result1;
-}
-
-// 1111 0111 1101 0111 imm4 Rn1 imm4 Rn2; mov_asl imm4, Rn1, imm4, Rn2
-8.0xf7+8.0xd7+4.IMM4A,4.RN1+4.IMM4,4.RN2!RN1:D2d:::mov_asl
-"mov_asl"
-*am33
-{
- int dstreg1, dstreg2;
- int result1;
-
- PC = cia;
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- result1 = EXTEND4 (IMM4A);
- State.regs[dstreg2] <<= IMM4;
- State.regs[dstreg1] = result1;
-}
-
-// 1111 0111 0000 1000 Rm1 Rn1 Rm2 Rn2; and_add Rm1, Rn1, Rm2, Rn2
-8.0xf7+8.0x08+4.RM1,4.RN1+4.RM2,4.RN2!RN1:D2:::and_add
-"and_add"
-*am33
-{
- int srcreg1, srcreg2, dstreg1, dstreg2;
- int result1;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM1);
- srcreg2 = translate_rreg (SD_, RM2);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- result1 = State.regs[dstreg1] & State.regs[srcreg1];
- State.regs[dstreg2] += State.regs[srcreg2];
- State.regs[dstreg1] = result1;
-}
-
-// 1111 0111 0001 1000 Rm1 Rn1 imm4 Rn2; and_add Rm1, Rn1, imm4, Rn2
-8.0xf7+8.0x18+4.RM1,4.RN1+4.IMM4,4.RN2!RN1:D2b:::and_add
-"and_add"
-*am33
-{
- int srcreg1, dstreg1, dstreg2;
- int result1;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM1);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- result1 = State.regs[dstreg1] & State.regs[srcreg1];
- State.regs[dstreg2] += EXTEND4 (IMM4);
- State.regs[dstreg1] = result1;
-}
-
-// 1111 0111 0010 1000 Rm1 Rn1 Rm2 Rn2; and_sub Rm1, Rn1, Rm2, Rn2
-8.0xf7+8.0x28+4.RM1,4.RN1+4.RM2,4.RN2!RN1:D2:::and_sub
-"and_sub"
-*am33
-{
- int srcreg1, srcreg2, dstreg1, dstreg2;
- int result1;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM1);
- srcreg2 = translate_rreg (SD_, RM2);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- result1 = State.regs[dstreg1] & State.regs[srcreg1];
- State.regs[dstreg2] -= State.regs[srcreg2];
- State.regs[dstreg1] = result1;
-}
-
-// 1111 0111 0011 1000 Rm1 Rn1 imm4 Rn2; and_sub Rm1, Rn1, imm4, Rn2
-8.0xf7+8.0x38+4.RM1,4.RN1+4.IMM4,4.RN2!RN1:D2b:::and_sub
-"and_sub"
-*am33
-{
- int srcreg1, dstreg1, dstreg2;
- int result1;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM1);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- result1 = State.regs[dstreg1] & State.regs[srcreg1];
- State.regs[dstreg2] -= EXTEND4 (IMM4);
- State.regs[dstreg1] = result1;
-}
-
-// 1111 0111 0100 1000 Rm1 Rn1 Rm2 Rn2; and_cmp Rm1, Rn1, Rm2, Rn2
-8.0xf7+8.0x48+4.RM1,4.RN1+4.RM2,4.RN2!RN1:D2:::and_cmp
-"and_cmp"
-*am33
-{
- int srcreg1, srcreg2, dstreg1, dstreg2;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM1);
- srcreg2 = translate_rreg (SD_, RM2);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- genericCmp (State.regs[srcreg2], State.regs[dstreg2]);
- State.regs[dstreg1] &= State.regs[srcreg1];
-}
-
-// 1111 0111 0101 1000 Rm1 Rn1 imm4 Rn2; and_cmp Rm1, Rn1, imm4, Rn2
-8.0xf7+8.0x58+4.RM1,4.RN1+4.IMM4,4.RN2!RN1:D2b:::and_cmp
-"and_cmp"
-*am33
-{
- int srcreg1, dstreg1, dstreg2;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM1);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- genericCmp (EXTEND4 (IMM4), State.regs[dstreg2]);
- State.regs[dstreg1] &= State.regs[srcreg1];
-}
-
-// 1111 0111 0110 1000 Rm1 Rn1 Rm2 Rn2; and_mov Rm1, Rn1, Rm2, Rn2
-8.0xf7+8.0x68+4.RM1,4.RN1+4.RM2,4.RN2!RN1:D2:::and_mov
-"and_mov"
-*am33
-{
- int srcreg1, srcreg2, dstreg1, dstreg2;
- int result1;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM1);
- srcreg2 = translate_rreg (SD_, RM2);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- result1 = State.regs[dstreg1] & State.regs[srcreg1];
- State.regs[dstreg2] = State.regs[srcreg2];
- State.regs[dstreg1] = result1;
-}
-
-// 1111 0111 0111 1000 Rm1 Rn1 imm4 Rn2; and_mov Rm1, Rn1, imm4, Rn2
-8.0xf7+8.0x78+4.RM1,4.RN1+4.IMM4,4.RN2!RN1:D2b:::and_mov
-"and_mov"
-*am33
-{
- int srcreg1, dstreg1, dstreg2;
- int result1;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM1);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- result1 = State.regs[dstreg1] & State.regs[srcreg1];
- State.regs[dstreg2] = EXTEND4 (IMM4);
- State.regs[dstreg1] = result1;
-}
-
-// 1111 0111 1000 1000 Rm1 Rn1 Rm2 Rn2; and_asr Rm1, Rn1, Rm2, Rn2
-8.0xf7+8.0x88+4.RM1,4.RN1+4.RM2,4.RN2!RN1:D2:::and_asr
-"and_asr"
-*am33
-{
- int srcreg1, srcreg2, dstreg1, dstreg2;
- int result1;
- signed int temp;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM1);
- srcreg2 = translate_rreg (SD_, RM2);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- result1 = State.regs[dstreg1] & State.regs[srcreg1];
- temp = State.regs[dstreg2];
- temp >>= State.regs[srcreg2];
- State.regs[dstreg2] = temp;
- State.regs[dstreg1] = result1;
-}
-
-// 1111 0111 1001 1000 Rm1 Rn1 imm4 Rn2; and_asr Rm1, Rn1, imm4, Rn2
-8.0xf7+8.0x98+4.RM1,4.RN1+4.IMM4,4.RN2!RN1:D2b:::and_asr
-"and_asr"
-*am33
-{
- int srcreg1, dstreg1, dstreg2;
- int result1;
- signed int temp;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM1);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- result1 = State.regs[dstreg1] & State.regs[srcreg1];
- temp = State.regs[dstreg2];
- temp >>= IMM4;
- State.regs[dstreg2] = temp;
- State.regs[dstreg1] = result1;
-}
-
-// 1111 0111 1010 1000 Rm1 Rn1 Rm2 Rn2; and_lsr Rm1, Rn1, Rm2, Rn2
-8.0xf7+8.0xa8+4.RM1,4.RN1+4.RM2,4.RN2!RN1:D2:::and_lsr
-"and_lsr"
-*am33
-{
- int srcreg1, srcreg2, dstreg1, dstreg2;
- int result1;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM1);
- srcreg2 = translate_rreg (SD_, RM2);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- result1 = State.regs[dstreg1] & State.regs[srcreg1];
- State.regs[dstreg2] >>= State.regs[srcreg2];
- State.regs[dstreg1] = result1;
-}
-
-// 1111 0111 1011 1000 Rm1 Rn1 imm4 Rn2; and_lsr Rm1, Rn1, imm4, Rn2
-8.0xf7+8.0xb8+4.RM1,4.RN1+4.IMM4,4.RN2!RN1:D2b:::and_lsr
-"and_lsr"
-*am33
-{
- int srcreg1, dstreg1, dstreg2;
- int result1;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM1);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- result1 = State.regs[dstreg1] & State.regs[srcreg1];
- State.regs[dstreg2] >>= IMM4;
- State.regs[dstreg1] = result1;
-}
-
-
-// 1111 0111 1100 1000 Rm1 Rn1 Rm2 Rn2; and_asl Rm1, Rn1, Rm2, Rn2
-8.0xf7+8.0xc8+4.RM1,4.RN1+4.RM2,4.RN2!RN1:D2:::and_asl
-"and_asl"
-*am33
-{
- int srcreg1, srcreg2, dstreg1, dstreg2;
- int result1;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM1);
- srcreg2 = translate_rreg (SD_, RM2);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- result1 = State.regs[dstreg1] & State.regs[srcreg1];
- State.regs[dstreg2] <<= State.regs[srcreg2];
- State.regs[dstreg1] = result1;
-}
-
-// 1111 0111 1101 1000 Rm1 Rn1 imm4 Rn2; and_asl Rm1, Rn1, imm4, Rn2
-8.0xf7+8.0xd8+4.RM1,4.RN1+4.IMM4,4.RN2!RN1:D2b:::and_asl
-"and_asl"
-*am33
-{
- int srcreg1, dstreg1, dstreg2;
- int result1;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM1);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- result1 = State.regs[dstreg1] & State.regs[srcreg1];
- State.regs[dstreg2] <<= IMM4;
- State.regs[dstreg1] = result1;
-}
-
-// 1111 0111 0000 1001 Rm1 Rn1 Rm2 Rn2; dmach_add Rm1, Rn1, Rm2, Rn2
-8.0xf7+8.0x09+4.RM1,4.RN1+4.RM2,4.RN2!RN1:D2:::dmach_add
-"dmach_add"
-*am33
-{
- int srcreg1, srcreg2, dstreg1, dstreg2;
- signed32 temp, temp2, sum;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM1);
- srcreg2 = translate_rreg (SD_, RM2);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- temp = ((signed32)(signed16)(State.regs[dstreg1] & 0xffff)
- * (signed32)(signed16)(State.regs[srcreg1] & 0xffff));
- temp2 = ((signed32)(signed16)((State.regs[srcreg1] >> 16) & 0xffff)
- * (signed32)(signed16)((State.regs[dstreg1] >> 16) & 0xffff));
- sum = temp + temp2 + State.regs[REG_MCRL];
-
- State.regs[dstreg2] += State.regs[srcreg2];
- State.regs[dstreg1] = sum;
-}
-
-// 1111 0111 0001 1001 Rm1 Rn1 imm4 Rn2; dmach_add Rm1, Rn1, imm4, Rn2
-8.0xf7+8.0x19+4.RM1,4.RN1+4.IMM4,4.RN2!RN1:D2b:::dmach_add
-"dmach_add"
-*am33
-{
- int srcreg1, dstreg1, dstreg2;
- signed32 temp, temp2, sum;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM1);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- temp = ((signed32)(signed16)(State.regs[dstreg1] & 0xffff)
- * (signed32)(signed16)(State.regs[srcreg1] & 0xffff));
- temp2 = ((signed32)(signed16)((State.regs[srcreg1] >> 16) & 0xffff)
- * (signed32)(signed16)((State.regs[dstreg1] >> 16) & 0xffff));
- sum = temp + temp2 + State.regs[REG_MCRL];
-
- State.regs[dstreg2] += EXTEND4 (IMM4);
- State.regs[dstreg1] = sum;
-}
-
-// 1111 0111 0010 1001 Rm1 Rn1 Rm2 Rn2; dmach_sub Rm1, Rn1, Rm2, Rn2
-8.0xf7+8.0x29+4.RM1,4.RN1+4.RM2,4.RN2!RN1:D2:::dmach_sub
-"dmach_sub"
-*am33
-{
- int srcreg1, srcreg2, dstreg1, dstreg2;
- signed32 temp, temp2, sum;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM1);
- srcreg2 = translate_rreg (SD_, RM2);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- temp = ((signed32)(signed16)(State.regs[dstreg1] & 0xffff)
- * (signed32)(signed16)(State.regs[srcreg1] & 0xffff));
- temp2 = ((signed32)(signed16)((State.regs[srcreg1] >> 16) & 0xffff)
- * (signed32)(signed16)((State.regs[dstreg1] >> 16) & 0xffff));
- sum = temp + temp2 + State.regs[REG_MCRL];
-
- State.regs[dstreg2] -= State.regs[srcreg2];
- State.regs[dstreg1] = sum;
-}
-
-// 1111 0111 0011 1001 Rm1 Rn1 imm4 Rn2; dmach_sub Rm1, Rn1, imm4, Rn2
-8.0xf7+8.0x39+4.RM1,4.RN1+4.IMM4,4.RN2!RN1:D2b:::dmach_sub
-"dmach_sub"
-*am33
-{
- int srcreg1, dstreg1, dstreg2;
- signed32 temp, temp2, sum;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM1);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- temp = ((signed32)(signed16)(State.regs[dstreg1] & 0xffff)
- * (signed32)(signed16)(State.regs[srcreg1] & 0xffff));
- temp2 = ((signed32)(signed16)((State.regs[srcreg1] >> 16) & 0xffff)
- * (signed32)(signed16)((State.regs[dstreg1] >> 16) & 0xffff));
- sum = temp + temp2 + State.regs[REG_MCRL];
-
- State.regs[dstreg2] -= EXTEND4 (IMM4);
- State.regs[dstreg1] = sum;
-}
-
-// 1111 0111 0100 1001 Rm1 Rn1 Rm2 Rn2; dmach_cmp Rm1, Rn1, Rm2, Rn2
-8.0xf7+8.0x49+4.RM1,4.RN1+4.RM2,4.RN2!RN1:D2:::dmach_cmp
-"dmach_cmp"
-*am33
-{
- int srcreg1, srcreg2, dstreg1, dstreg2;
- signed32 temp, temp2, sum;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM1);
- srcreg2 = translate_rreg (SD_, RM2);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- temp = ((signed32)(signed16)(State.regs[dstreg1] & 0xffff)
- * (signed32)(signed16)(State.regs[srcreg1] & 0xffff));
- temp2 = ((signed32)(signed16)((State.regs[srcreg1] >> 16) & 0xffff)
- * (signed32)(signed16)((State.regs[dstreg1] >> 16) & 0xffff));
- sum = temp + temp2 + State.regs[REG_MCRL];
-
- genericCmp (State.regs[srcreg2], State.regs[dstreg2]);
- State.regs[dstreg1] = sum;
-}
-
-// 1111 0111 0101 1001 Rm1 Rn1 imm4 Rn2; dmach_cmp Rm1, Rn1, imm4, Rn2
-8.0xf7+8.0x59+4.RM1,4.RN1+4.IMM4,4.RN2!RN1:D2b:::dmach_cmp
-"dmach_cmp"
-*am33
-{
- int srcreg1, dstreg1, dstreg2;
- signed32 temp, temp2, sum;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM1);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- temp = ((signed32)(signed16)(State.regs[dstreg1] & 0xffff)
- * (signed32)(signed16)(State.regs[srcreg1] & 0xffff));
- temp2 = ((signed32)(signed16)((State.regs[srcreg1] >> 16) & 0xffff)
- * (signed32)(signed16)((State.regs[dstreg1] >> 16) & 0xffff));
- sum = temp + temp2 + State.regs[REG_MCRL];
-
- genericCmp (EXTEND4 (IMM4), State.regs[dstreg2]);
- State.regs[dstreg1] = sum;
-}
-
-// 1111 0111 0110 1001 Rm1 Rn1 Rm2 Rn2; dmach_mov Rm1, Rn1, Rm2, Rn2
-8.0xf7+8.0x69+4.RM1,4.RN1+4.RM2,4.RN2!RN1:D2:::dmach_mov
-"dmach_mov"
-*am33
-{
- int srcreg1, srcreg2, dstreg1, dstreg2;
- signed32 temp, temp2, sum;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM1);
- srcreg2 = translate_rreg (SD_, RM2);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- temp = ((signed32)(signed16)(State.regs[dstreg1] & 0xffff)
- * (signed32)(signed16)(State.regs[srcreg1] & 0xffff));
- temp2 = ((signed32)(signed16)((State.regs[srcreg1] >> 16) & 0xffff)
- * (signed32)(signed16)((State.regs[dstreg1] >> 16) & 0xffff));
- sum = temp + temp2 + State.regs[REG_MCRL];
-
- State.regs[dstreg2] = State.regs[srcreg2];
- State.regs[dstreg1] = sum;
-}
-
-// 1111 0111 0111 1001 Rm1 Rn1 imm4 Rn2; dmach_mov Rm1, Rn1, imm4, Rn2
-8.0xf7+8.0x79+4.RM1,4.RN1+4.IMM4,4.RN2!RN1:D2b:::dmach_mov
-"dmach_mov"
-*am33
-{
- int srcreg1, dstreg1, dstreg2;
- signed32 temp, temp2, sum;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM1);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- temp = ((signed32)(signed16)(State.regs[dstreg1] & 0xffff)
- * (signed32)(signed16)(State.regs[srcreg1] & 0xffff));
- temp2 = ((signed32)(signed16)((State.regs[srcreg1] >> 16) & 0xffff)
- * (signed32)(signed16)((State.regs[dstreg1] >> 16) & 0xffff));
- sum = temp + temp2 + State.regs[REG_MCRL];
-
- State.regs[dstreg2] = EXTEND4 (IMM4);
- State.regs[dstreg1] = sum;
-}
-
-// 1111 0111 1000 1001 Rm1 Rn1 Rm2 Rn2; dmach_asr Rm1, Rn1, Rm2, Rn2
-8.0xf7+8.0x89+4.RM1,4.RN1+4.RM2,4.RN2!RN1:D2:::dmach_asr
-"dmach_asr"
-*am33
-{
- int srcreg1, srcreg2, dstreg1, dstreg2;
- signed32 temp, temp2, sum;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM1);
- srcreg2 = translate_rreg (SD_, RM2);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- temp = ((signed32)(signed16)(State.regs[dstreg1] & 0xffff)
- * (signed32)(signed16)(State.regs[srcreg1] & 0xffff));
- temp2 = ((signed32)(signed16)((State.regs[srcreg1] >> 16) & 0xffff)
- * (signed32)(signed16)((State.regs[dstreg1] >> 16) & 0xffff));
- sum = temp + temp2 + State.regs[REG_MCRL];
-
- temp = State.regs[dstreg2];
- temp >>= State.regs[srcreg2];
- State.regs[dstreg2] = temp;
- State.regs[dstreg1] = sum;
-}
-
-// 1111 0111 1001 1001 Rm1 Rn1 imm4 Rn2; dmach_asr Rm1, Rn1, imm4, Rn2
-8.0xf7+8.0x99+4.RM1,4.RN1+4.IMM4,4.RN2!RN1:D2b:::dmach_asr
-"dmach_asr"
-*am33
-{
- int srcreg1, dstreg1, dstreg2;
- signed32 temp, temp2, sum;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM1);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- temp = ((signed32)(signed16)(State.regs[dstreg1] & 0xffff)
- * (signed32)(signed16)(State.regs[srcreg1] & 0xffff));
- temp2 = ((signed32)(signed16)((State.regs[srcreg1] >> 16) & 0xffff)
- * (signed32)(signed16)((State.regs[dstreg1] >> 16) & 0xffff));
- sum = temp + temp2 + State.regs[REG_MCRL];
-
- temp = State.regs[dstreg2];
- temp >>= IMM4;
- State.regs[dstreg2] = temp;
- State.regs[dstreg1] = sum;
-}
-
-// 1111 0111 1010 1001 Rm1 Rn1 Rm2 Rn2; dmach_lsr Rm1, Rn1, Rm2, Rn2
-8.0xf7+8.0xa9+4.RM1,4.RN1+4.RM2,4.RN2!RN1:D2:::dmach_lsr
-"dmach_lsr"
-*am33
-{
- int srcreg1, srcreg2, dstreg1, dstreg2;
- signed32 temp, temp2, sum;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM1);
- srcreg2 = translate_rreg (SD_, RM2);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- temp = ((signed32)(signed16)(State.regs[dstreg1] & 0xffff)
- * (signed32)(signed16)(State.regs[srcreg1] & 0xffff));
- temp2 = ((signed32)(signed16)((State.regs[srcreg1] >> 16) & 0xffff)
- * (signed32)(signed16)((State.regs[dstreg1] >> 16) & 0xffff));
- sum = temp + temp2 + State.regs[REG_MCRL];
-
- State.regs[dstreg2] >>= State.regs[srcreg2];
- State.regs[dstreg1] = sum;
-}
-
-// 1111 0111 1011 1001 Rm1 Rn1 imm4 Rn2; dmach_lsr Rm1, Rn1, imm4, Rn2
-8.0xf7+8.0xb9+4.RM1,4.RN1+4.IMM4,4.RN2!RN1:D2b:::dmach_lsr
-"dmach_lsr"
-*am33
-{
- int srcreg1, dstreg1, dstreg2;
- signed32 temp, temp2, sum;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM1);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- temp = ((signed32)(signed16)(State.regs[dstreg1] & 0xffff)
- * (signed32)(signed16)(State.regs[srcreg1] & 0xffff));
- temp2 = ((signed32)(signed16)((State.regs[srcreg1] >> 16) & 0xffff)
- * (signed32)(signed16)((State.regs[dstreg1] >> 16) & 0xffff));
- sum = temp + temp2 + State.regs[REG_MCRL];
-
- State.regs[dstreg2] >>= IMM4;
- State.regs[dstreg1] = sum;
-}
-
-
-// 1111 0111 1100 1001 Rm1 Rn1 Rm2 Rn2; dmach_asl Rm1, Rn1, Rm2, Rn2
-8.0xf7+8.0xc9+4.RM1,4.RN1+4.RM2,4.RN2!RN1:D2:::dmach_asl
-"dmach_asl"
-*am33
-{
- int srcreg1, srcreg2, dstreg1, dstreg2;
- signed32 temp, temp2, sum;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM1);
- srcreg2 = translate_rreg (SD_, RM2);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- temp = ((signed32)(signed16)(State.regs[dstreg1] & 0xffff)
- * (signed32)(signed16)(State.regs[srcreg1] & 0xffff));
- temp2 = ((signed32)(signed16)((State.regs[srcreg1] >> 16) & 0xffff)
- * (signed32)(signed16)((State.regs[dstreg1] >> 16) & 0xffff));
- sum = temp + temp2 + State.regs[REG_MCRL];
-
- State.regs[dstreg2] <<= State.regs[srcreg2];
- State.regs[dstreg1] = sum;
-}
-
-// 1111 0111 1101 1001 Rm1 Rn1 imm4 Rn2; dmach_asl Rm1, Rn1, imm4, Rn2
-8.0xf7+8.0xd9+4.RM1,4.RN1+4.IMM4,4.RN2!RN1:D2b:::dmach_asl
-"dmach_asl"
-*am33
-{
- int srcreg1, dstreg1, dstreg2;
- signed32 temp, temp2, sum;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM1);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- temp = ((signed32)(signed16)(State.regs[dstreg1] & 0xffff)
- * (signed32)(signed16)(State.regs[srcreg1] & 0xffff));
- temp2 = ((signed32)(signed16)((State.regs[srcreg1] >> 16) & 0xffff)
- * (signed32)(signed16)((State.regs[dstreg1] >> 16) & 0xffff));
- sum = temp + temp2 + State.regs[REG_MCRL];
-
- State.regs[dstreg2] <<= IMM4;
- State.regs[dstreg1] = sum;
-}
-
-// 1111 0111 0000 1010 Rm1 Rn1 Rm2 Rn2; xor_add Rm1, Rn1, Rm2, Rn2
-8.0xf7+8.0x0a+4.RM1,4.RN1+4.RM2,4.RN2!RN1:D2:::xor_add
-"xor_add"
-*am33
-{
- int srcreg1, srcreg2, dstreg1, dstreg2;
- int result1;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM1);
- srcreg2 = translate_rreg (SD_, RM2);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- result1 = State.regs[dstreg1] ^ State.regs[srcreg1];
- State.regs[dstreg2] += State.regs[srcreg2];
- State.regs[dstreg1] = result1;
-}
-
-// 1111 0111 0001 1010 Rm1 Rn1 imm4 Rn2; xor_add Rm1, Rn1, imm4, Rn2
-8.0xf7+8.0x1a+4.RM1,4.RN1+4.IMM4,4.RN2!RN1:D2b:::xor_add
-"xor_add"
-*am33
-{
- int srcreg1, dstreg1, dstreg2;
- int result1;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM1);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- result1 = State.regs[dstreg1] ^ State.regs[srcreg1];
- State.regs[dstreg2] += EXTEND4 (IMM4);
- State.regs[dstreg1] = result1;
-}
-
-// 1111 0111 0010 1010 Rm1 Rn1 Rm2 Rn2; xor_sub Rm1, Rn1, Rm2, Rn2
-8.0xf7+8.0x2a+4.RM1,4.RN1+4.RM2,4.RN2!RN1:D2:::xor_sub
-"xor_sub"
-*am33
-{
- int srcreg1, srcreg2, dstreg1, dstreg2;
- int result1;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM1);
- srcreg2 = translate_rreg (SD_, RM2);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- result1 = State.regs[dstreg1] ^ State.regs[srcreg1];
- State.regs[dstreg2] -= State.regs[srcreg2];
- State.regs[dstreg1] = result1;
-}
-
-// 1111 0111 0011 1010 Rm1 Rn1 imm4 Rn2; xor_sub Rm1, Rn1, imm4, Rn2
-8.0xf7+8.0x3a+4.RM1,4.RN1+4.IMM4,4.RN2!RN1:D2b:::xor_sub
-"xor_sub"
-*am33
-{
- int srcreg1, dstreg1, dstreg2;
- int result1;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM1);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- result1 = State.regs[dstreg1] ^ State.regs[srcreg1];
- State.regs[dstreg2] -= EXTEND4 (IMM4);
- State.regs[dstreg1] = result1;
-}
-
-// 1111 0111 0100 1010 Rm1 Rn1 Rm2 Rn2; xor_cmp Rm1, Rn1, Rm2, Rn2
-8.0xf7+8.0x4a+4.RM1,4.RN1+4.RM2,4.RN2!RN1:D2:::xor_cmp
-"xor_cmp"
-*am33
-{
- int srcreg1, srcreg2, dstreg1, dstreg2;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM1);
- srcreg2 = translate_rreg (SD_, RM2);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- genericCmp (State.regs[srcreg2], State.regs[dstreg2]);
- State.regs[dstreg1] ^= State.regs[srcreg1];
-}
-
-// 1111 0111 0101 1010 Rm1 Rn1 imm4 Rn2; xor_cmp Rm1, Rn1, imm4, Rn2
-8.0xf7+8.0x5a+4.RM1,4.RN1+4.IMM4,4.RN2!RN1:D2b:::xor_cmp
-"xor_cmp"
-*am33
-{
- int srcreg1, dstreg1, dstreg2;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM1);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- genericCmp (EXTEND4 (IMM4), State.regs[dstreg2]);
- State.regs[dstreg1] ^= State.regs[srcreg1];
-}
-
-// 1111 0111 0110 1010 Rm1 Rn1 Rm2 Rn2; xor_mov Rm1, Rn1, Rm2, Rn2
-8.0xf7+8.0x6a+4.RM1,4.RN1+4.RM2,4.RN2!RN1:D2:::xor_mov
-"xor_mov"
-*am33
-{
- int srcreg1, srcreg2, dstreg1, dstreg2;
- int result1;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM1);
- srcreg2 = translate_rreg (SD_, RM2);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- result1 = State.regs[dstreg1] ^ State.regs[srcreg1];
- State.regs[dstreg2] = State.regs[srcreg2];
- State.regs[dstreg1] = result1;
-}
-
-// 1111 0111 0111 1010 Rm1 Rn1 imm4 Rn2; xor_mov Rm1, Rn1, imm4, Rn2
-8.0xf7+8.0x7a+4.RM1,4.RN1+4.IMM4,4.RN2!RN1:D2b:::xor_mov
-"xor_mov"
-*am33
-{
- int srcreg1, dstreg1, dstreg2;
- int result1;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM1);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- result1 = State.regs[dstreg1] ^ State.regs[srcreg1];
- State.regs[dstreg2] = EXTEND4 (IMM4);
- State.regs[dstreg1] = result1;
-}
-
-// 1111 0111 1000 1010 Rm1 Rn1 Rm2 Rn2; xor_asr Rm1, Rn1, Rm2, Rn2
-8.0xf7+8.0x8a+4.RM1,4.RN1+4.RM2,4.RN2!RN1:D2:::xor_asr
-"xor_asr"
-*am33
-{
- int srcreg1, srcreg2, dstreg1, dstreg2;
- int result1;
- signed int temp;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM1);
- srcreg2 = translate_rreg (SD_, RM2);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- result1 = State.regs[dstreg1] ^ State.regs[srcreg1];
- temp = State.regs[dstreg2];
- temp >>= State.regs[srcreg2];
- State.regs[dstreg2] = temp;
- State.regs[dstreg1] = result1;
-}
-
-// 1111 0111 1001 1010 Rm1 Rn1 imm4 Rn2; xor_asr Rm1, Rn1, imm4, Rn2
-8.0xf7+8.0x9a+4.RM1,4.RN1+4.IMM4,4.RN2!RN1:D2b:::xor_asr
-"xor_asr"
-*am33
-{
- int srcreg1, dstreg1, dstreg2;
- int result1;
- signed int temp;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM1);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- result1 = State.regs[dstreg1] ^ State.regs[srcreg1];
- temp = State.regs[dstreg2];
- temp >>= IMM4;
- State.regs[dstreg2] = temp;
- State.regs[dstreg1] = result1;
-}
-
-// 1111 0111 1010 1010 Rm1 Rn1 Rm2 Rn2; xor_lsr Rm1, Rn1, Rm2, Rn2
-8.0xf7+8.0xaa+4.RM1,4.RN1+4.RM2,4.RN2!RN1:D2:::xor_lsr
-"xor_lsr"
-*am33
-{
- int srcreg1, srcreg2, dstreg1, dstreg2;
- int result1;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM1);
- srcreg2 = translate_rreg (SD_, RM2);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- result1 = State.regs[dstreg1] ^ State.regs[srcreg1];
- State.regs[dstreg2] >>= State.regs[srcreg2];
- State.regs[dstreg1] = result1;
-}
-
-// 1111 0111 1011 1010 Rm1 Rn1 imm4 Rn2; xor_lsr Rm1, Rn1, imm4, Rn2
-8.0xf7+8.0xba+4.RM1,4.RN1+4.IMM4,4.RN2!RN1:D2b:::xor_lsr
-"xor_lsr"
-*am33
-{
- int srcreg1, dstreg1, dstreg2;
- int result1;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM1);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- result1 = State.regs[dstreg1] ^ State.regs[srcreg1];
- State.regs[dstreg2] >>= IMM4;
- State.regs[dstreg1] = result1;
-}
-
-
-// 1111 0111 1100 1010 Rm1 Rn1 Rm2 Rn2; xor_asl Rm1, Rn1, Rm2, Rn2
-8.0xf7+8.0xca+4.RM1,4.RN1+4.RM2,4.RN2!RN1:D2:::xor_asl
-"xor_asl"
-*am33
-{
- int srcreg1, srcreg2, dstreg1, dstreg2;
- int result1;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM1);
- srcreg2 = translate_rreg (SD_, RM2);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- result1 = State.regs[dstreg1] ^ State.regs[srcreg1];
- State.regs[dstreg2] <<= State.regs[srcreg2];
- State.regs[dstreg1] = result1;
-}
-
-// 1111 0111 1101 1010 Rm1 Rn1 imm4 Rn2; xor_asl Rm1, Rn1, imm4, Rn2
-8.0xf7+8.0xda+4.RM1,4.RN1+4.IMM4,4.RN2!RN1:D2b:::xor_asl
-"xor_asl"
-*am33
-{
- int srcreg1, dstreg1, dstreg2;
- int result1;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM1);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- result1 = State.regs[dstreg1] ^ State.regs[srcreg1];
- State.regs[dstreg2] <<= IMM4;
- State.regs[dstreg1] = result1;
-}
-
-// 1111 0111 0000 1011 Rm1 Rn1 Rm2 Rn2; swhw_add Rm1, Rn1, Rm2, Rn2
-8.0xf7+8.0x0b+4.RM1,4.RN1+4.RM2,4.RN2!RN1:D2:::swhw_add
-"swhw_add"
-*am33
-{
- int srcreg1, srcreg2, dstreg1, dstreg2;
- int result1;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM1);
- srcreg2 = translate_rreg (SD_, RM2);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- result1 = State.regs[dstreg1] ^ State.regs[srcreg1];
- State.regs[dstreg2] += State.regs[srcreg2];
- State.regs[dstreg1] = result1;
-}
-
-// 1111 0111 0001 1011 Rm1 Rn1 imm4 Rn2; swhw_add Rm1, Rn1, imm4, Rn2
-8.0xf7+8.0x1b+4.RM1,4.RN1+4.IMM4,4.RN2!RN1:D2b:::swhw_add
-"swhw_add"
-*am33
-{
- int srcreg1, dstreg1, dstreg2;
- int result1;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM1);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- result1 = (((State.regs[srcreg1] & 0xffff) << 16)
- | ((State.regs[srcreg1] >> 16) & 0xffff));
- State.regs[dstreg2] += EXTEND4 (IMM4);
- State.regs[dstreg1] = result1;
-}
-
-// 1111 0111 0010 1011 Rm1 Rn1 Rm2 Rn2; swhw_sub Rm1, Rn1, Rm2, Rn2
-8.0xf7+8.0x2b+4.RM1,4.RN1+4.RM2,4.RN2!RN1:D2:::swhw_sub
-"swhw_sub"
-*am33
-{
- int srcreg1, srcreg2, dstreg1, dstreg2;
- int result1;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM1);
- srcreg2 = translate_rreg (SD_, RM2);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- result1 = (((State.regs[srcreg1] & 0xffff) << 16)
- | ((State.regs[srcreg1] >> 16) & 0xffff));
- State.regs[dstreg2] -= State.regs[srcreg2];
- State.regs[dstreg1] = result1;
-}
-
-// 1111 0111 0011 1011 Rm1 Rn1 imm4 Rn2; swhw_sub Rm1, Rn1, imm4, Rn2
-8.0xf7+8.0x3b+4.RM1,4.RN1+4.IMM4,4.RN2!RN1:D2b:::swhw_sub
-"swhw_sub"
-*am33
-{
- int srcreg1, dstreg1, dstreg2;
- int result1;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM1);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- result1 = (((State.regs[srcreg1] & 0xffff) << 16)
- | ((State.regs[srcreg1] >> 16) & 0xffff));
- State.regs[dstreg2] -= EXTEND4 (IMM4);
- State.regs[dstreg1] = result1;
-}
-
-// 1111 0111 0100 1011 Rm1 Rn1 Rm2 Rn2; swhw_cmp Rm1, Rn1, Rm2, Rn2
-8.0xf7+8.0x4b+4.RM1,4.RN1+4.RM2,4.RN2!RN1:D2:::swhw_cmp
-"swhw_cmp"
-*am33
-{
- int srcreg1, srcreg2, dstreg1, dstreg2;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM1);
- srcreg2 = translate_rreg (SD_, RM2);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- genericCmp (State.regs[srcreg2], State.regs[dstreg2]);
- State.regs[dstreg1] = (((State.regs[srcreg1] & 0xffff) << 16)
- | ((State.regs[srcreg1] >> 16) & 0xffff));
-}
-
-// 1111 0111 0101 1011 Rm1 Rn1 imm4 Rn2; swhw_cmp Rm1, Rn1, imm4, Rn2
-8.0xf7+8.0x5b+4.RM1,4.RN1+4.IMM4,4.RN2!RN1:D2b:::swhw_cmp
-"swhw_cmp"
-*am33
-{
- int srcreg1, dstreg1, dstreg2;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM1);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- genericCmp (EXTEND4 (IMM4), State.regs[dstreg2]);
- State.regs[dstreg1] = (((State.regs[srcreg1] & 0xffff) << 16)
- | ((State.regs[srcreg1] >> 16) & 0xffff));
-}
-
-// 1111 0111 0110 1011 Rm1 Rn1 Rm2 Rn2; swhw_mov Rm1, Rn1, Rm2, Rn2
-8.0xf7+8.0x6b+4.RM1,4.RN1+4.RM2,4.RN2!RN1:D2:::swhw_mov
-"swhw_mov"
-*am33
-{
- int srcreg1, srcreg2, dstreg1, dstreg2;
- int result1;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM1);
- srcreg2 = translate_rreg (SD_, RM2);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- result1 = (((State.regs[srcreg1] & 0xffff) << 16)
- | ((State.regs[srcreg1] >> 16) & 0xffff));
- State.regs[dstreg2] = State.regs[srcreg2];
- State.regs[dstreg1] = result1;
-}
-
-// 1111 0111 0111 1011 Rm1 Rn1 imm4 Rn2; swhw_mov Rm1, Rn1, imm4, Rn2
-8.0xf7+8.0x7b+4.RM1,4.RN1+4.IMM4,4.RN2!RN1:D2b:::swhw_mov
-"swhw_mov"
-*am33
-{
- int srcreg1, dstreg1, dstreg2;
- int result1;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM1);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- result1 = (((State.regs[srcreg1] & 0xffff) << 16)
- | ((State.regs[srcreg1] >> 16) & 0xffff));
- State.regs[dstreg2] = EXTEND4 (IMM4);
- State.regs[dstreg1] = result1;
-}
-
-// 1111 0111 1000 1011 Rm1 Rn1 Rm2 Rn2; swhw_asr Rm1, Rn1, Rm2, Rn2
-8.0xf7+8.0x8b+4.RM1,4.RN1+4.RM2,4.RN2!RN1:D2:::swhw_asr
-"swhw_asr"
-*am33
-{
- int srcreg1, srcreg2, dstreg1, dstreg2;
- int result1;
- signed int temp;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM1);
- srcreg2 = translate_rreg (SD_, RM2);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- result1 = (((State.regs[srcreg1] & 0xffff) << 16)
- | ((State.regs[srcreg1] >> 16) & 0xffff));
- temp = State.regs[dstreg2];
- temp >>= State.regs[srcreg2];
- State.regs[dstreg2] = temp;
- State.regs[dstreg1] = result1;
-}
-
-// 1111 0111 1001 1011 Rm1 Rn1 imm4 Rn2; swhw_asr Rm1, Rn1, imm4, Rn2
-8.0xf7+8.0x9b+4.RM1,4.RN1+4.IMM4,4.RN2!RN1:D2b:::swhw_asr
-"swhw_asr"
-*am33
-{
- int srcreg1, dstreg1, dstreg2;
- int result1;
- signed int temp;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM1);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- result1 = (((State.regs[srcreg1] & 0xffff) << 16)
- | ((State.regs[srcreg1] >> 16) & 0xffff));
- temp = State.regs[dstreg2];
- temp >>= IMM4;
- State.regs[dstreg2] = temp;
- State.regs[dstreg1] = result1;
-}
-
-// 1111 0111 1010 1011 Rm1 Rn1 Rm2 Rn2; swhw_lsr Rm1, Rn1, Rm2, Rn2
-8.0xf7+8.0xab+4.RM1,4.RN1+4.RM2,4.RN2!RN1:D2:::swhw_lsr
-"swhw_lsr"
-*am33
-{
- int srcreg1, srcreg2, dstreg1, dstreg2;
- int result1;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM1);
- srcreg2 = translate_rreg (SD_, RM2);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- result1 = (((State.regs[srcreg1] & 0xffff) << 16)
- | ((State.regs[srcreg1] >> 16) & 0xffff));
- State.regs[dstreg2] >>= State.regs[srcreg2];
- State.regs[dstreg1] = result1;
-}
-
-// 1111 0111 1011 1011 Rm1 Rn1 imm4 Rn2; swhw_lsr Rm1, Rn1, imm4, Rn2
-8.0xf7+8.0xbb+4.RM1,4.RN1+4.IMM4,4.RN2!RN1:D2b:::swhw_lsr
-"swhw_lsr"
-*am33
-{
- int srcreg1, dstreg1, dstreg2;
- int result1;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM1);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- result1 = (((State.regs[srcreg1] & 0xffff) << 16)
- | ((State.regs[srcreg1] >> 16) & 0xffff));
- State.regs[dstreg2] >>= IMM4;
- State.regs[dstreg1] = result1;
-}
-
-
-// 1111 0111 1100 1011 Rm1 Rn1 Rm2 Rn2; swhw_asl Rm1, Rn1, Rm2, Rn2
-8.0xf7+8.0xcb+4.RM1,4.RN1+4.RM2,4.RN2!RN1:D2:::swhw_asl
-"swhw_asl"
-*am33
-{
- int srcreg1, srcreg2, dstreg1, dstreg2;
- int result1;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM1);
- srcreg2 = translate_rreg (SD_, RM2);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- result1 = (((State.regs[srcreg1] & 0xffff) << 16)
- | ((State.regs[srcreg1] >> 16) & 0xffff));
- State.regs[dstreg2] <<= State.regs[srcreg2];
- State.regs[dstreg1] = result1;
-}
-
-// 1111 0111 1101 1011 Rm1 Rn1 imm4 Rn2; swhw_asl Rm1, Rn1, imm4, Rn2
-8.0xf7+8.0xdb+4.RM1,4.RN1+4.IMM4,4.RN2!RN1:D2b:::swhw_asl
-"swhw_asl"
-*am33
-{
- int srcreg1, dstreg1, dstreg2;
- int result1;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM1);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- result1 = (((State.regs[srcreg1] & 0xffff) << 16)
- | ((State.regs[srcreg1] >> 16) & 0xffff));
- State.regs[dstreg2] <<= IMM4;
- State.regs[dstreg1] = result1;
-}
-
-// 1111 0111 0000 1100 Rm1 Rn1 Rm2 Rn2; or_add Rm1, Rn1, Rm2, Rn2
-8.0xf7+8.0x0c+4.RM1,4.RN1+4.RM2,4.RN2!RN1:D2:::or_add
-"or_add"
-*am33
-{
- int srcreg1, srcreg2, dstreg1, dstreg2;
- int result1;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM1);
- srcreg2 = translate_rreg (SD_, RM2);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- result1 = State.regs[dstreg1] | State.regs[srcreg1];
- State.regs[dstreg2] += State.regs[srcreg2];
- State.regs[dstreg1] = result1;
-}
-
-// 1111 0111 0001 1100 Rm1 Rn1 imm4 Rn2; or_add Rm1, Rn1, imm4, Rn2
-8.0xf7+8.0x1c+4.RM1,4.RN1+4.IMM4,4.RN2!RN1:D2b:::or_add
-"or_add"
-*am33
-{
- int srcreg1, dstreg1, dstreg2;
- int result1;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM1);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- result1 = State.regs[dstreg1] | State.regs[srcreg1];
- State.regs[dstreg2] += EXTEND4 (IMM4);
- State.regs[dstreg1] = result1;
-}
-
-// 1111 0111 0010 1100 Rm1 Rn1 Rm2 Rn2; or_sub Rm1, Rn1, Rm2, Rn2
-8.0xf7+8.0x2c+4.RM1,4.RN1+4.RM2,4.RN2!RN1:D2:::or_sub
-"or_sub"
-*am33
-{
- int srcreg1, srcreg2, dstreg1, dstreg2;
- int result1;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM1);
- srcreg2 = translate_rreg (SD_, RM2);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- result1 = State.regs[dstreg1] | State.regs[srcreg1];
- State.regs[dstreg2] -= State.regs[srcreg2];
- State.regs[dstreg1] = result1;
-}
-
-// 1111 0111 0011 1100 Rm1 Rn1 imm4 Rn2; or_sub Rm1, Rn1, imm4, Rn2
-8.0xf7+8.0x3c+4.RM1,4.RN1+4.IMM4,4.RN2!RN1:D2b:::or_sub
-"or_sub"
-*am33
-{
- int srcreg1, dstreg1, dstreg2;
- int result1;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM1);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- result1 = State.regs[dstreg1] | State.regs[srcreg1];
- State.regs[dstreg2] -= EXTEND4 (IMM4);
- State.regs[dstreg1] = result1;
-}
-
-// 1111 0111 0100 1100 Rm1 Rn1 Rm2 Rn2; or_cmp Rm1, Rn1, Rm2, Rn2
-8.0xf7+8.0x4c+4.RM1,4.RN1+4.RM2,4.RN2!RN1:D2:::or_cmp
-"or_cmp"
-*am33
-{
- int srcreg1, srcreg2, dstreg1, dstreg2;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM1);
- srcreg2 = translate_rreg (SD_, RM2);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- genericCmp (State.regs[srcreg2], State.regs[dstreg2]);
- State.regs[dstreg1] |= State.regs[srcreg1];
-}
-
-// 1111 0111 0101 1100 Rm1 Rn1 imm4 Rn2; or_cmp Rm1, Rn1, imm4, Rn2
-8.0xf7+8.0x5c+4.RM1,4.RN1+4.IMM4,4.RN2!RN1:D2b:::or_cmp
-"or_cmp"
-*am33
-{
- int srcreg1, dstreg1, dstreg2;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM1);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- genericCmp (EXTEND4 (IMM4), State.regs[dstreg2]);
- State.regs[dstreg1] |= State.regs[srcreg1];
-}
-
-// 1111 0111 0110 1100 Rm1 Rn1 Rm2 Rn2; or_mov Rm1, Rn1, Rm2, Rn2
-8.0xf7+8.0x6c+4.RM1,4.RN1+4.RM2,4.RN2!RN1:D2:::or_mov
-"or_mov"
-*am33
-{
- int srcreg1, srcreg2, dstreg1, dstreg2;
- int result1;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM1);
- srcreg2 = translate_rreg (SD_, RM2);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- result1 = State.regs[dstreg1] | State.regs[srcreg1];
- State.regs[dstreg2] = State.regs[srcreg2];
- State.regs[dstreg1] = result1;
-}
-
-// 1111 0111 0111 1100 Rm1 Rn1 imm4 Rn2; or_mov Rm1, Rn1, imm4, Rn2
-8.0xf7+8.0x7c+4.RM1,4.RN1+4.IMM4,4.RN2!RN1:D2b:::or_mov
-"or_mov"
-*am33
-{
- int srcreg1, dstreg1, dstreg2;
- int result1;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM1);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- result1 = State.regs[dstreg1] | State.regs[srcreg1];
- State.regs[dstreg2] = EXTEND4 (IMM4);
- State.regs[dstreg1] = result1;
-}
-
-// 1111 0111 1000 1100 Rm1 Rn1 Rm2 Rn2; or_asr Rm1, Rn1, Rm2, Rn2
-8.0xf7+8.0x8c+4.RM1,4.RN1+4.RM2,4.RN2!RN1:D2:::or_asr
-"or_asr"
-*am33
-{
- int srcreg1, srcreg2, dstreg1, dstreg2;
- int result1;
- signed int temp;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM1);
- srcreg2 = translate_rreg (SD_, RM2);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- result1 = State.regs[dstreg1] | State.regs[srcreg1];
- temp = State.regs[dstreg2];
- temp >>= State.regs[srcreg2];
- State.regs[dstreg2] = temp;
- State.regs[dstreg1] = result1;
-}
-
-// 1111 0111 1001 1100 Rm1 Rn1 imm4 Rn2; or_asr Rm1, Rn1, imm4, Rn2
-8.0xf7+8.0x9c+4.RM1,4.RN1+4.IMM4,4.RN2!RN1:D2b:::or_asr
-"or_asr"
-*am33
-{
- int srcreg1, dstreg1, dstreg2;
- int result1;
- signed int temp;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM1);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- result1 = State.regs[dstreg1] | State.regs[srcreg1];
- temp = State.regs[dstreg2];
- temp >>= IMM4;
- State.regs[dstreg2] = temp;
- State.regs[dstreg1] = result1;
-}
-
-// 1111 0111 1010 1100 Rm1 Rn1 Rm2 Rn2; or_lsr Rm1, Rn1, Rm2, Rn2
-8.0xf7+8.0xac+4.RM1,4.RN1+4.RM2,4.RN2!RN1:D2:::or_lsr
-"or_lsr"
-*am33
-{
- int srcreg1, srcreg2, dstreg1, dstreg2;
- int result1;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM1);
- srcreg2 = translate_rreg (SD_, RM2);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- result1 = State.regs[dstreg1] | State.regs[srcreg1];
- State.regs[dstreg2] >>= State.regs[srcreg2];
- State.regs[dstreg1] = result1;
-}
-
-// 1111 0111 1011 1100 Rm1 Rn1 imm4 Rn2; or_lsr Rm1, Rn1, imm4, Rn2
-8.0xf7+8.0xbc+4.RM1,4.RN1+4.IMM4,4.RN2!RN1:D2b:::or_lsr
-"or_lsr"
-*am33
-{
- int srcreg1, dstreg1, dstreg2;
- int result1;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM1);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- result1 = State.regs[dstreg1] | State.regs[srcreg1];
- State.regs[dstreg2] >>= IMM4;
- State.regs[dstreg1] = result1;
-}
-
-
-// 1111 0111 1100 1100 Rm1 Rn1 Rm2 Rn2; or_asl Rm1, Rn1, Rm2, Rn2
-8.0xf7+8.0xcc+4.RM1,4.RN1+4.RM2,4.RN2!RN1:D2:::or_asl
-"or_asl"
-*am33
-{
- int srcreg1, srcreg2, dstreg1, dstreg2;
- int result1;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM1);
- srcreg2 = translate_rreg (SD_, RM2);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- result1 = State.regs[dstreg1] | State.regs[srcreg1];
- State.regs[dstreg2] <<= State.regs[srcreg2];
- State.regs[dstreg1] = result1;
-}
-
-// 1111 0111 1101 1100 Rm1 Rn1 imm4 Rn2; or_asl Rm1, Rn1, imm4, Rn2
-8.0xf7+8.0xdc+4.RM1,4.RN1+4.IMM4,4.RN2!RN1:D2b:::or_asl
-"or_asl"
-*am33
-{
- int srcreg1, dstreg1, dstreg2;
- int result1;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM1);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- result1 = State.regs[dstreg1] | State.regs[srcreg1];
- State.regs[dstreg2] <<= IMM4;
- State.regs[dstreg1] = result1;
-}
-
-// 1111 0111 0000 1101 Rm1 Rn1 Rm2 Rn2; sat16_add Rm1, Rn1, Rm2, Rn2
-8.0xf7+8.0x0d+4.RM1,4.RN1+4.RM2,4.RN2!RN1:D2:::sat16_add
-"sat16_add"
-*am33
-{
- int srcreg1, srcreg2, dstreg1, dstreg2;
- int result1;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM1);
- srcreg2 = translate_rreg (SD_, RM2);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- if (State.regs[srcreg1] >= 0x7fff)
- result1 = 0x7fff;
- else if (State.regs[srcreg1] <= 0xffff8000)
- result1 = 0xffff8000;
- else
- result1 = State.regs[srcreg1];
-
- State.regs[dstreg2] += State.regs[srcreg2];
- State.regs[dstreg1] = result1;
-}
-
-// 1111 0111 0001 1101 Rm1 Rn1 imm4 Rn2; sat16_add Rm1, Rn1, imm4, Rn2
-8.0xf7+8.0x1d+4.RM1,4.RN1+4.IMM4,4.RN2!RN1:D2b:::sat16_add
-"sat16_add"
-*am33
-{
- int srcreg1, dstreg1, dstreg2;
- int result1;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM1);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- if (State.regs[srcreg1] >= 0x7fff)
- result1 = 0x7fff;
- else if (State.regs[srcreg1] <= 0xffff8000)
- result1 = 0xffff8000;
- else
- result1 = State.regs[srcreg1];
-
- State.regs[dstreg2] += EXTEND4 (IMM4);
- State.regs[dstreg1] = result1;
-}
-
-// 1111 0111 0010 1101 Rm1 Rn1 Rm2 Rn2; sat16_sub Rm1, Rn1, Rm2, Rn2
-8.0xf7+8.0x2d+4.RM1,4.RN1+4.RM2,4.RN2!RN1:D2:::sat16_sub
-"sat16_sub"
-*am33
-{
- int srcreg1, srcreg2, dstreg1, dstreg2;
- int result1;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM1);
- srcreg2 = translate_rreg (SD_, RM2);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- if (State.regs[srcreg1] >= 0x7fff)
- result1 = 0x7fff;
- else if (State.regs[srcreg1] <= 0xffff8000)
- result1 = 0xffff8000;
- else
- result1 = State.regs[srcreg1];
-
- State.regs[dstreg2] -= State.regs[srcreg2];
- State.regs[dstreg1] = result1;
-}
-
-// 1111 0111 0011 1101 Rm1 Rn1 imm4 Rn2; sat16_sub Rm1, Rn1, imm4, Rn2
-8.0xf7+8.0x3d+4.RM1,4.RN1+4.IMM4,4.RN2!RN1:D2b:::sat16_sub
-"sat16_sub"
-*am33
-{
- int srcreg1, dstreg1, dstreg2;
- int result1;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM1);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- if (State.regs[srcreg1] >= 0x7fff)
- result1 = 0x7fff;
- else if (State.regs[srcreg1] <= 0xffff8000)
- result1 = 0xffff8000;
- else
- result1 = State.regs[srcreg1];
-
- State.regs[dstreg2] -= EXTEND4 (IMM4);
- State.regs[dstreg1] = result1;
-}
-
-// 1111 0111 0100 1101 Rm1 Rn1 Rm2 Rn2; sat16_cmp Rm1, Rn1, Rm2, Rn2
-8.0xf7+8.0x4d+4.RM1,4.RN1+4.RM2,4.RN2!RN1:D2:::sat16_cmp
-"sat16_cmp"
-*am33
-{
- int srcreg1, srcreg2, dstreg1, dstreg2;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM1);
- srcreg2 = translate_rreg (SD_, RM2);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- genericCmp (State.regs[dstreg2], State.regs[dstreg1]);
- if (State.regs[srcreg1] >= 0x7fff)
- State.regs[dstreg1] = 0x7fff;
- else if (State.regs[srcreg1] <= 0xffff8000)
- State.regs[dstreg1] = 0xffff8000;
- else
- State.regs[dstreg1] = State.regs[srcreg1];
-}
-
-// 1111 0111 0101 1101 Rm1 Rn1 imm4 Rn2; sat16_cmp Rm1, Rn1, imm4, Rn2
-8.0xf7+8.0x5d+4.RM1,4.RN1+4.IMM4,4.RN2!RN1:D2b:::sat16_cmp
-"sat16_cmp"
-*am33
-{
- int srcreg1, dstreg1, dstreg2;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM1);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- genericCmp (EXTEND4 (IMM4), State.regs[dstreg2]);
- if (State.regs[srcreg1] >= 0x7fff)
- State.regs[dstreg1] = 0x7fff;
- else if (State.regs[srcreg1] <= 0xffff8000)
- State.regs[dstreg1] = 0xffff8000;
- else
- State.regs[dstreg1] = State.regs[srcreg1];
-}
-
-// 1111 0111 0110 1101 Rm1 Rn1 Rm2 Rn2; sat16_mov Rm1, Rn1, Rm2, Rn2
-8.0xf7+8.0x6d+4.RM1,4.RN1+4.RM2,4.RN2!RN1:D2:::sat16_mov
-"sat16_mov"
-*am33
-{
- int srcreg1, srcreg2, dstreg1, dstreg2;
- int result1;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM1);
- srcreg2 = translate_rreg (SD_, RM2);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- if (State.regs[srcreg1] >= 0x7fff)
- result1 = 0x7fff;
- else if (State.regs[srcreg1] <= 0xffff8000)
- result1 = 0xffff8000;
- else
- result1 = State.regs[srcreg1];
-
- State.regs[dstreg2] = State.regs[srcreg2];
- State.regs[dstreg1] = result1;
-}
-
-// 1111 0111 0111 1101 Rm1 Rn1 imm4 Rn2; sat16_mov Rm1, Rn1, imm4, Rn2
-8.0xf7+8.0x7d+4.RM1,4.RN1+4.IMM4,4.RN2!RN1:D2b:::sat16_mov
-"sat16_mov"
-*am33
-{
- int srcreg1, dstreg1, dstreg2;
- int result1;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM1);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- if (State.regs[srcreg1] >= 0x7fff)
- result1 = 0x7fff;
- else if (State.regs[srcreg1] <= 0xffff8000)
- result1 = 0xffff8000;
- else
- result1 = State.regs[srcreg1];
-
- State.regs[dstreg2] = EXTEND4 (IMM4);
- State.regs[dstreg1] = result1;
-}
-
-// 1111 0111 1000 1101 Rm1 Rn1 Rm2 Rn2; sat16_asr Rm1, Rn1, Rm2, Rn2
-8.0xf7+8.0x8d+4.RM1,4.RN1+4.RM2,4.RN2!RN1:D2:::sat16_asr
-"sat16_asr"
-*am33
-{
- int srcreg1, srcreg2, dstreg1, dstreg2;
- int result1;
- signed int temp;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM1);
- srcreg2 = translate_rreg (SD_, RM2);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- if (State.regs[srcreg1] >= 0x7fff)
- result1 = 0x7fff;
- else if (State.regs[srcreg1] <= 0xffff8000)
- result1 = 0xffff8000;
- else
- result1 = State.regs[srcreg1];
-
- temp = State.regs[dstreg2];
- temp >>= State.regs[srcreg2];
- State.regs[dstreg2] = temp;
- State.regs[dstreg1] = result1;
-}
-
-// 1111 0111 1001 1101 Rm1 Rn1 imm4 Rn2; sat16_asr Rm1, Rn1, imm4, Rn2
-8.0xf7+8.0x9d+4.RM1,4.RN1+4.IMM4,4.RN2!RN1:D2b:::sat16_asr
-"sat16_asr"
-*am33
-{
- int srcreg1, dstreg1, dstreg2;
- int result1;
- signed int temp;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM1);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- if (State.regs[srcreg1] >= 0x7fff)
- result1 = 0x7fff;
- else if (State.regs[srcreg1] <= 0xffff8000)
- result1 = 0xffff8000;
- else
- result1 = State.regs[srcreg1];
-
- temp = State.regs[dstreg2];
- temp >>= IMM4;
- State.regs[dstreg2] = temp;
- State.regs[dstreg1] = result1;
-}
-
-// 1111 0111 1010 1101 Rm1 Rn1 Rm2 Rn2; sat16_lsr Rm1, Rn1, Rm2, Rn2
-8.0xf7+8.0xad+4.RM1,4.RN1+4.RM2,4.RN2!RN1:D2:::sat16_lsr
-"sat16_lsr"
-*am33
-{
- int srcreg1, srcreg2, dstreg1, dstreg2;
- int result1;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM1);
- srcreg2 = translate_rreg (SD_, RM2);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- if (State.regs[srcreg1] >= 0x7fff)
- result1 = 0x7fff;
- else if (State.regs[srcreg1] <= 0xffff8000)
- result1 = 0xffff8000;
- else
- result1 = State.regs[srcreg1];
-
- State.regs[dstreg2] >>= State.regs[srcreg2];
- State.regs[dstreg1] = result1;
-}
-
-// 1111 0111 1011 1101 Rm1 Rn1 imm4 Rn2; sat16_lsr Rm1, Rn1, imm4, Rn2
-8.0xf7+8.0xbd+4.RM1,4.RN1+4.IMM4,4.RN2!RN1:D2b:::sat16_lsr
-"sat16_lsr"
-*am33
-{
- int srcreg1, dstreg1, dstreg2;
- int result1;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM1);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- if (State.regs[srcreg1] >= 0x7fff)
- result1 = 0x7fff;
- else if (State.regs[srcreg1] <= 0xffff8000)
- result1 = 0xffff8000;
- else
- result1 = State.regs[srcreg1];
-
- State.regs[dstreg2] >>= IMM4;
- State.regs[dstreg1] = result1;
-}
-
-
-// 1111 0111 1100 1101 Rm1 Rn1 Rm2 Rn2; sat16_asl Rm1, Rn1, Rm2, Rn2
-8.0xf7+8.0xcd+4.RM1,4.RN1+4.RM2,4.RN2!RN1:D2:::sat16_asl
-"sat16_asl"
-*am33
-{
- int srcreg1, srcreg2, dstreg1, dstreg2;
- int result1;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM1);
- srcreg2 = translate_rreg (SD_, RM2);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- if (State.regs[srcreg1] >= 0x7fff)
- result1 = 0x7fff;
- else if (State.regs[srcreg1] <= 0xffff8000)
- result1 = 0xffff8000;
- else
- result1 = State.regs[srcreg1];
-
- State.regs[dstreg2] <<= State.regs[srcreg2];
- State.regs[dstreg1] = result1;
-}
-
-// 1111 0111 1101 1101 Rm1 Rn1 imm4 Rn2; sat16_asl Rm1, Rn1, imm4, Rn2
-8.0xf7+8.0xdd+4.RM1,4.RN1+4.IMM4,4.RN2!RN1:D2b:::sat16_asl
-"sat16_asl"
-*am33
-{
- int srcreg1, dstreg1, dstreg2;
- int result1;
-
- PC = cia;
- srcreg1 = translate_rreg (SD_, RM1);
- dstreg1 = translate_rreg (SD_, RN1);
- dstreg2 = translate_rreg (SD_, RN2);
-
- if (State.regs[srcreg1] >= 0x7fff)
- result1 = 0x7fff;
- else if (State.regs[srcreg1] <= 0xffff8000)
- result1 = 0xffff8000;
- else
- result1 = State.regs[srcreg1];
-
- State.regs[dstreg2] <<= IMM4;
- State.regs[dstreg1] = result1;
-}
-
-// 1111 0111 1110 0000 Rm1 Rn1 imm4 0000; mov_llt (Rm+,imm4),Rn
-8.0xf7+8.0xe0+4.RN,4.RM!RN+4.IMM4,4.0x0:D2:::mov_llt
-"mov_llt"
-*am33
-{
- int srcreg, dstreg;
-
- PC = cia;
- srcreg = translate_rreg (SD_, RM);
- dstreg = translate_rreg (SD_, RN);
-
- State.regs[dstreg] = load_word (State.regs[srcreg]);
- State.regs[srcreg] += EXTEND4 (IMM4);
-
- if (((PSW & PSW_N) != 0) ^ ((PSW & PSW_V) != 0))
- {
- State.regs[REG_PC] = State.regs[REG_LAR] - 4;
- nia = PC;
- }
-}
-
-// 1111 0111 1110 0000 Rm1 Rn1 imm4 0001; mov_lgt (Rm+,imm4),Rn
-8.0xf7+8.0xe0+4.RN,4.RM!RN+4.IMM4,4.0x1:D2:::mov_lgt
-"mov_lgt"
-*am33
-{
- int srcreg, dstreg;
-
- PC = cia;
- srcreg = translate_rreg (SD_, RM);
- dstreg = translate_rreg (SD_, RN);
-
- State.regs[dstreg] = load_word (State.regs[srcreg]);
- State.regs[srcreg] += EXTEND4 (IMM4);
-
- if (!((PSW & PSW_Z)
- || (((PSW & PSW_N) != 0) ^ ((PSW & PSW_V) != 0))))
- {
- State.regs[REG_PC] = State.regs[REG_LAR] - 4;
- nia = PC;
- }
-}
-
-// 1111 0111 1110 0000 Rm1 Rn1 imm4 0010; mov_lge (Rm+,imm4),Rn
-8.0xf7+8.0xe0+4.RN,4.RM!RN+4.IMM4,4.0x2:D2:::mov_lge
-"mov_lge"
-*am33
-{
- int srcreg, dstreg;
-
- PC = cia;
- srcreg = translate_rreg (SD_, RM);
- dstreg = translate_rreg (SD_, RN);
-
- State.regs[dstreg] = load_word (State.regs[srcreg]);
- State.regs[srcreg] += EXTEND4 (IMM4);
-
- if (!(((PSW & PSW_N) != 0) ^ ((PSW & PSW_V) != 0)))
- {
- State.regs[REG_PC] = State.regs[REG_LAR] - 4;
- nia = PC;
- }
-}
-
-// 1111 0111 1110 0000 Rm1 Rn1 imm4 0011; mov_lle (Rm+,imm4),Rn
-8.0xf7+8.0xe0+4.RN,4.RM!RN+4.IMM4,4.0x3:D2:::mov_lle
-"mov_lle"
-*am33
-{
- int srcreg, dstreg;
-
- PC = cia;
- srcreg = translate_rreg (SD_, RM);
- dstreg = translate_rreg (SD_, RN);
-
- State.regs[dstreg] = load_word (State.regs[srcreg]);
- State.regs[srcreg] += EXTEND4 (IMM4);
-
- if ((PSW & PSW_Z)
- || (((PSW & PSW_N) != 0) ^ ((PSW & PSW_V) != 0)))
- {
- State.regs[REG_PC] = State.regs[REG_LAR] - 4;
- nia = PC;
- }
-}
-
-// 1111 0111 1110 0000 Rm1 Rn1 imm4 0100; mov_lcs (Rm+,imm4),Rn
-8.0xf7+8.0xe0+4.RN,4.RM!RN+4.IMM4,4.0x4:D2:::mov_lcs
-"mov_lcs"
-*am33
-{
- int srcreg, dstreg;
-
- PC = cia;
- srcreg = translate_rreg (SD_, RM);
- dstreg = translate_rreg (SD_, RN);
-
- State.regs[dstreg] = load_word (State.regs[srcreg]);
- State.regs[srcreg] += EXTEND4 (IMM4);
-
- if (PSW & PSW_C)
- {
- State.regs[REG_PC] = State.regs[REG_LAR] - 4;
- nia = PC;
- }
-}
-
-// 1111 0111 1110 0000 Rm1 Rn1 imm4 0101; mov_lhi (Rm+,imm4),Rn
-8.0xf7+8.0xe0+4.RN,4.RM!RN+4.IMM4,4.0x5:D2:::mov_lhi
-"mov_lhi"
-*am33
-{
- int srcreg, dstreg;
-
- PC = cia;
- srcreg = translate_rreg (SD_, RM);
- dstreg = translate_rreg (SD_, RN);
-
- State.regs[dstreg] = load_word (State.regs[srcreg]);
- State.regs[srcreg] += EXTEND4 (IMM4);
-
- if (!(((PSW & PSW_C) != 0) || (PSW & PSW_Z) != 0))
- {
- State.regs[REG_PC] = State.regs[REG_LAR] - 4;
- nia = PC;
- }
-}
-
-// 1111 0111 1110 0000 Rm1 Rn1 imm4 0110; mov_lcc (Rm+,imm4),Rn
-8.0xf7+8.0xe0+4.RN,4.RM!RN+4.IMM4,4.0x6:D2:::mov_lcc
-"mov_lcc"
-*am33
-{
- int srcreg, dstreg;
-
- PC = cia;
- srcreg = translate_rreg (SD_, RM);
- dstreg = translate_rreg (SD_, RN);
-
- State.regs[dstreg] = load_word (State.regs[srcreg]);
- State.regs[srcreg] += EXTEND4 (IMM4);
-
- if (!(PSW & PSW_C))
- {
- State.regs[REG_PC] = State.regs[REG_LAR] - 4;
- nia = PC;
- }
-}
-
-// 1111 0111 1110 0000 Rm1 Rn1 imm4 0111; mov_lls (Rm+,imm4),Rn
-8.0xf7+8.0xe0+4.RN,4.RM!RN+4.IMM4,4.0x7:D2:::mov_lls
-"mov_lls"
-*am33
-{
- int srcreg, dstreg;
-
- PC = cia;
- srcreg = translate_rreg (SD_, RM);
- dstreg = translate_rreg (SD_, RN);
-
- State.regs[dstreg] = load_word (State.regs[srcreg]);
- State.regs[srcreg] += EXTEND4 (IMM4);
-
- if (((PSW & PSW_C) != 0) || (PSW & PSW_Z) != 0)
- {
- State.regs[REG_PC] = State.regs[REG_LAR] - 4;
- nia = PC;
- }
-}
-
-// 1111 0111 1110 0000 Rm1 Rn1 imm4 1000; mov_leq (Rm+,imm4),Rn
-8.0xf7+8.0xe0+4.RN,4.RM!RN+4.IMM4,4.0x8:D2:::mov_leq
-"mov_leq"
-*am33
-{
- int srcreg, dstreg;
-
- PC = cia;
- srcreg = translate_rreg (SD_, RM);
- dstreg = translate_rreg (SD_, RN);
-
- State.regs[dstreg] = load_word (State.regs[srcreg]);
- State.regs[srcreg] += EXTEND4 (IMM4);
-
- if (PSW & PSW_Z)
- {
- State.regs[REG_PC] = State.regs[REG_LAR] - 4;
- nia = PC;
- }
-}
-
-// 1111 0111 1110 0000 Rm1 Rn1 imm4 1001; mov_lne (Rm+,imm4),Rn
-8.0xf7+8.0xe0+4.RN,4.RM!RN+4.IMM4,4.0x9:D2:::mov_lne
-"mov_lne"
-*am33
-{
- int srcreg, dstreg;
-
- PC = cia;
- srcreg = translate_rreg (SD_, RM);
- dstreg = translate_rreg (SD_, RN);
-
- State.regs[dstreg] = load_word (State.regs[srcreg]);
- State.regs[srcreg] += EXTEND4 (IMM4);
-
- if (!(PSW & PSW_Z))
- {
- State.regs[REG_PC] = State.regs[REG_LAR] - 4;
- nia = PC;
- }
-}
-
-// 1111 0111 1110 0000 Rm1 Rn1 imm4 1010; mov_lra (Rm+,imm4),Rn
-8.0xf7+8.0xe0+4.RN,4.RM!RN+4.IMM4,4.0xa:D2:::mov_lra
-"mov_lra"
-*am33
-{
- int srcreg, dstreg;
-
- PC = cia;
- srcreg = translate_rreg (SD_, RM);
- dstreg = translate_rreg (SD_, RN);
-
- State.regs[dstreg] = load_word (State.regs[srcreg]);
- State.regs[srcreg] += EXTEND4 (IMM4);
-
- State.regs[REG_PC] = State.regs[REG_LAR] - 4;
- nia = PC;
-}
-
diff --git a/sim/mn10300/config.in b/sim/mn10300/config.in
deleted file mode 100644
index a49ca9cda39..00000000000
--- a/sim/mn10300/config.in
+++ /dev/null
@@ -1,183 +0,0 @@
-/* config.in. Generated automatically from configure.in by autoheader. */
-
-/* Define if using alloca.c. */
-#undef C_ALLOCA
-
-/* Define to empty if the keyword does not work. */
-#undef const
-
-/* Define to one of _getb67, GETB67, getb67 for Cray-2 and Cray-YMP systems.
- This function is required for alloca.c support on those systems. */
-#undef CRAY_STACKSEG_END
-
-/* Define if you have alloca, as a function or macro. */
-#undef HAVE_ALLOCA
-
-/* Define if you have <alloca.h> and it should be used (not on Ultrix). */
-#undef HAVE_ALLOCA_H
-
-/* Define if you have a working `mmap' system call. */
-#undef HAVE_MMAP
-
-/* Define as __inline if that's what the C compiler calls it. */
-#undef inline
-
-/* Define to `long' if <sys/types.h> doesn't define. */
-#undef off_t
-
-/* Define if you need to in order for stat and other things to work. */
-#undef _POSIX_SOURCE
-
-/* Define as the return type of signal handlers (int or void). */
-#undef RETSIGTYPE
-
-/* Define to `unsigned' if <sys/types.h> doesn't define. */
-#undef size_t
-
-/* If using the C implementation of alloca, define if you know the
- direction of stack growth for your system; otherwise it will be
- automatically deduced at run-time.
- STACK_DIRECTION > 0 => grows toward higher addresses
- STACK_DIRECTION < 0 => grows toward lower addresses
- STACK_DIRECTION = 0 => direction of growth unknown
- */
-#undef STACK_DIRECTION
-
-/* Define if you have the ANSI C header files. */
-#undef STDC_HEADERS
-
-/* Define if your processor stores words with the most significant
- byte first (like Motorola and SPARC, unlike Intel and VAX). */
-#undef WORDS_BIGENDIAN
-
-/* Define to 1 if NLS is requested. */
-#undef ENABLE_NLS
-
-/* Define as 1 if you have gettext and don't want to use GNU gettext. */
-#undef HAVE_GETTEXT
-
-/* Define as 1 if you have the stpcpy function. */
-#undef HAVE_STPCPY
-
-/* Define if your locale.h file contains LC_MESSAGES. */
-#undef HAVE_LC_MESSAGES
-
-/* Define if you have the __argz_count function. */
-#undef HAVE___ARGZ_COUNT
-
-/* Define if you have the __argz_next function. */
-#undef HAVE___ARGZ_NEXT
-
-/* Define if you have the __argz_stringify function. */
-#undef HAVE___ARGZ_STRINGIFY
-
-/* Define if you have the __setfpucw function. */
-#undef HAVE___SETFPUCW
-
-/* Define if you have the chmod function. */
-#undef HAVE_CHMOD
-
-/* Define if you have the chown function. */
-#undef HAVE_CHOWN
-
-/* Define if you have the dcgettext function. */
-#undef HAVE_DCGETTEXT
-
-/* Define if you have the execv function. */
-#undef HAVE_EXECV
-
-/* Define if you have the execve function. */
-#undef HAVE_EXECVE
-
-/* Define if you have the fork function. */
-#undef HAVE_FORK
-
-/* Define if you have the getcwd function. */
-#undef HAVE_GETCWD
-
-/* Define if you have the getpagesize function. */
-#undef HAVE_GETPAGESIZE
-
-/* Define if you have the getrusage function. */
-#undef HAVE_GETRUSAGE
-
-/* Define if you have the munmap function. */
-#undef HAVE_MUNMAP
-
-/* Define if you have the putenv function. */
-#undef HAVE_PUTENV
-
-/* Define if you have the setenv function. */
-#undef HAVE_SETENV
-
-/* Define if you have the setlocale function. */
-#undef HAVE_SETLOCALE
-
-/* Define if you have the sigaction function. */
-#undef HAVE_SIGACTION
-
-/* Define if you have the stpcpy function. */
-#undef HAVE_STPCPY
-
-/* Define if you have the strcasecmp function. */
-#undef HAVE_STRCASECMP
-
-/* Define if you have the strchr function. */
-#undef HAVE_STRCHR
-
-/* Define if you have the time function. */
-#undef HAVE_TIME
-
-/* Define if you have the utime function. */
-#undef HAVE_UTIME
-
-/* Define if you have the <argz.h> header file. */
-#undef HAVE_ARGZ_H
-
-/* Define if you have the <fcntl.h> header file. */
-#undef HAVE_FCNTL_H
-
-/* Define if you have the <fpu_control.h> header file. */
-#undef HAVE_FPU_CONTROL_H
-
-/* Define if you have the <limits.h> header file. */
-#undef HAVE_LIMITS_H
-
-/* Define if you have the <locale.h> header file. */
-#undef HAVE_LOCALE_H
-
-/* Define if you have the <malloc.h> header file. */
-#undef HAVE_MALLOC_H
-
-/* Define if you have the <nl_types.h> header file. */
-#undef HAVE_NL_TYPES_H
-
-/* Define if you have the <stdlib.h> header file. */
-#undef HAVE_STDLIB_H
-
-/* Define if you have the <string.h> header file. */
-#undef HAVE_STRING_H
-
-/* Define if you have the <strings.h> header file. */
-#undef HAVE_STRINGS_H
-
-/* Define if you have the <sys/param.h> header file. */
-#undef HAVE_SYS_PARAM_H
-
-/* Define if you have the <sys/resource.h> header file. */
-#undef HAVE_SYS_RESOURCE_H
-
-/* Define if you have the <sys/time.h> header file. */
-#undef HAVE_SYS_TIME_H
-
-/* Define if you have the <time.h> header file. */
-#undef HAVE_TIME_H
-
-/* Define if you have the <unistd.h> header file. */
-#undef HAVE_UNISTD_H
-
-/* Define if you have the <utime.h> header file. */
-#undef HAVE_UTIME_H
-
-/* Define if you have the <values.h> header file. */
-#undef HAVE_VALUES_H
diff --git a/sim/mn10300/configure b/sim/mn10300/configure
deleted file mode 100755
index 93c6de46667..00000000000
--- a/sim/mn10300/configure
+++ /dev/null
@@ -1,4542 +0,0 @@
-#! /bin/sh
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-sim_inline="-DDEFAULT_INLINE=0"
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-# This file is derived from `gettext.m4'. The difference is that the
-# included macros assume Cygnus-style source and build trees.
-
-# Macro to add for using GNU gettext.
-# Ulrich Drepper <drepper@cygnus.com>, 1995.
-#
-# This file file be copied and used freely without restrictions. It can
-# be used in projects which are not available under the GNU Public License
-# but which still want to provide support for the GNU gettext functionality.
-# Please note that the actual code is *not* freely available.
-
-# serial 3
-
-
-
-
-
-# Search path for a program which passes the given test.
-# Ulrich Drepper <drepper@cygnus.com>, 1996.
-#
-# This file file be copied and used freely without restrictions. It can
-# be used in projects which are not available under the GNU Public License
-# but which still want to provide support for the GNU gettext functionality.
-# Please note that the actual code is *not* freely available.
-
-# serial 1
-
-
-
-# Check whether LC_MESSAGES is available in <locale.h>.
-# Ulrich Drepper <drepper@cygnus.com>, 1995.
-#
-# This file file be copied and used freely without restrictions. It can
-# be used in projects which are not available under the GNU Public License
-# but which still want to provide support for the GNU gettext functionality.
-# Please note that the actual code is *not* freely available.
-
-# serial 1
-
-
-
-
-
-
-# Guess values for system-dependent variables and create Makefiles.
-# Generated automatically using autoconf version 2.13
-# Copyright (C) 1992, 93, 94, 95, 96 Free Software Foundation, Inc.
-#
-# This configure script is free software; the Free Software Foundation
-# gives unlimited permission to copy, distribute and modify it.
-
-# Defaults:
-ac_help=
-ac_default_prefix=/usr/local
-# Any additions from configure.in:
-ac_help="$ac_help
- --disable-nls do not use Native Language Support"
-ac_help="$ac_help
- --with-included-gettext use the GNU gettext library included here"
-ac_help="$ac_help
- --enable-maintainer-mode Enable developer functionality."
-ac_help="$ac_help
- --enable-sim-bswap Use Host specific BSWAP instruction."
-ac_help="$ac_help
- --enable-sim-cflags=opts Extra CFLAGS for use in building simulator"
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-rm -f conftest*
-
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-if { (eval echo configure:905: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null
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-if { (eval echo configure:983: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
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- echo "configure: failed program was:" >&5
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- echo "configure: failed program was:" >&5
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-#line 1049 "configure"
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-
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-echo "$ac_t""$ac_cv_type_off_t" 1>&6
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-
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-
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- echo $ac_n "(cached) $ac_c" 1>&6
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- cat > conftest.$ac_ext <<EOF
-#line 1082 "configure"
-#include "confdefs.h"
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-#if STDC_HEADERS
-#include <stdlib.h>
-#include <stddef.h>
-#endif
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-if (eval "$ac_cpp conftest.$ac_ext") 2>&5 |
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- rm -rf conftest*
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-rm -f conftest*
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- cat > conftest.$ac_ext <<EOF
-#line 1117 "configure"
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-if { (eval echo configure:1124: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
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- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- ac_cv_header_alloca_h=no
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-rm -f conftest*
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-
-echo "$ac_t""$ac_cv_header_alloca_h" 1>&6
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-
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-
-echo $ac_n "checking for alloca""... $ac_c" 1>&6
-echo "configure:1145: checking for alloca" >&5
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- cat > conftest.$ac_ext <<EOF
-#line 1150 "configure"
-#include "confdefs.h"
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-#ifdef __GNUC__
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-if { (eval echo configure:1178: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
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- ac_cv_func_alloca_works=yes
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- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- ac_cv_func_alloca_works=no
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-rm -f conftest*
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-
-echo "$ac_t""$ac_cv_func_alloca_works" 1>&6
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-
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-
-
-echo $ac_n "checking whether alloca needs Cray hooks""... $ac_c" 1>&6
-echo "configure:1210: checking whether alloca needs Cray hooks" >&5
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- echo $ac_n "(cached) $ac_c" 1>&6
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-#line 1215 "configure"
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-wenotbecray
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-
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-if (eval "$ac_cpp conftest.$ac_ext") 2>&5 |
- egrep "webecray" >/dev/null 2>&1; then
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- ac_cv_os_cray=yes
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- rm -rf conftest*
- ac_cv_os_cray=no
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-rm -f conftest*
-
-fi
-
-echo "$ac_t""$ac_cv_os_cray" 1>&6
-if test $ac_cv_os_cray = yes; then
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- echo $ac_n "checking for $ac_func""... $ac_c" 1>&6
-echo "configure:1240: checking for $ac_func" >&5
-if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
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- cat > conftest.$ac_ext <<EOF
-#line 1245 "configure"
-#include "confdefs.h"
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-/* We use char because int might match the return type of a gcc2
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-char $ac_func();
-
-int main() {
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-/* The GNU C library defines this for functions which it implements
- to always fail with ENOSYS. Some functions are actually named
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-#if defined (__stub_$ac_func) || defined (__stub___$ac_func)
-choke me
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-#endif
-
-; return 0; }
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-if { (eval echo configure:1268: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=yes"
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- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=no"
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-rm -f conftest*
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-
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- cat >> confdefs.h <<EOF
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-
- break
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- echo "$ac_t""no" 1>&6
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-
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-
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-echo "configure:1295: checking stack direction for C alloca" >&5
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- echo $ac_n "(cached) $ac_c" 1>&6
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-#line 1303 "configure"
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-{
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-{
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-if { (eval echo configure:1322: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null
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- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -fr conftest*
- ac_cv_c_stack_direction=-1
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-rm -fr conftest*
-fi
-
-fi
-
-echo "$ac_t""$ac_cv_c_stack_direction" 1>&6
-cat >> confdefs.h <<EOF
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-echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6
-echo "configure:1347: checking for $ac_hdr" >&5
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- cat > conftest.$ac_ext <<EOF
-#line 1352 "configure"
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-ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
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-else
- echo "$ac_err" >&5
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=no"
-fi
-rm -f conftest*
-fi
-if eval "test \"`echo '$ac_cv_header_'$ac_safe`\" = yes"; then
- echo "$ac_t""yes" 1>&6
- ac_tr_hdr=HAVE_`echo $ac_hdr | sed 'y%abcdefghijklmnopqrstuvwxyz./-%ABCDEFGHIJKLMNOPQRSTUVWXYZ___%'`
- cat >> confdefs.h <<EOF
-#define $ac_tr_hdr 1
-EOF
-
-else
- echo "$ac_t""no" 1>&6
-fi
-done
-
-for ac_func in getpagesize
-do
-echo $ac_n "checking for $ac_func""... $ac_c" 1>&6
-echo "configure:1386: checking for $ac_func" >&5
-if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1391 "configure"
-#include "confdefs.h"
-/* System header to define __stub macros and hopefully few prototypes,
- which can conflict with char $ac_func(); below. */
-#include <assert.h>
-/* Override any gcc2 internal prototype to avoid an error. */
-/* We use char because int might match the return type of a gcc2
- builtin and then its argument prototype would still apply. */
-char $ac_func();
-
-int main() {
-
-/* The GNU C library defines this for functions which it implements
- to always fail with ENOSYS. Some functions are actually named
- something starting with __ and the normal name is an alias. */
-#if defined (__stub_$ac_func) || defined (__stub___$ac_func)
-choke me
-#else
-$ac_func();
-#endif
-
-; return 0; }
-EOF
-if { (eval echo configure:1414: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=yes"
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=no"
-fi
-rm -f conftest*
-fi
-
-if eval "test \"`echo '$ac_cv_func_'$ac_func`\" = yes"; then
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- ac_tr_func=HAVE_`echo $ac_func | tr 'abcdefghijklmnopqrstuvwxyz' 'ABCDEFGHIJKLMNOPQRSTUVWXYZ'`
- cat >> confdefs.h <<EOF
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-EOF
-
-else
- echo "$ac_t""no" 1>&6
-fi
-done
-
-echo $ac_n "checking for working mmap""... $ac_c" 1>&6
-echo "configure:1439: checking for working mmap" >&5
-if eval "test \"`echo '$''{'ac_cv_func_mmap_fixed_mapped'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- if test "$cross_compiling" = yes; then
- ac_cv_func_mmap_fixed_mapped=no
-else
- cat > conftest.$ac_ext <<EOF
-#line 1447 "configure"
-#include "confdefs.h"
-
-/* Thanks to Mike Haertel and Jim Avera for this test.
- Here is a matrix of mmap possibilities:
- mmap private not fixed
- mmap private fixed at somewhere currently unmapped
- mmap private fixed at somewhere already mapped
- mmap shared not fixed
- mmap shared fixed at somewhere currently unmapped
- mmap shared fixed at somewhere already mapped
- For private mappings, we should verify that changes cannot be read()
- back from the file, nor mmap's back from the file at a different
- address. (There have been systems where private was not correctly
- implemented like the infamous i386 svr4.0, and systems where the
- VM page cache was not coherent with the filesystem buffer cache
- like early versions of FreeBSD and possibly contemporary NetBSD.)
- For shared mappings, we should conversely verify that changes get
- propogated back to all the places they're supposed to be.
-
- Grep wants private fixed already mapped.
- The main things grep needs to know about mmap are:
- * does it exist and is it safe to write into the mmap'd area
- * how to use it (BSD variants) */
-#include <sys/types.h>
-#include <fcntl.h>
-#include <sys/mman.h>
-
-/* This mess was copied from the GNU getpagesize.h. */
-#ifndef HAVE_GETPAGESIZE
-# ifdef HAVE_UNISTD_H
-# include <unistd.h>
-# endif
-
-/* Assume that all systems that can run configure have sys/param.h. */
-# ifndef HAVE_SYS_PARAM_H
-# define HAVE_SYS_PARAM_H 1
-# endif
-
-# ifdef _SC_PAGESIZE
-# define getpagesize() sysconf(_SC_PAGESIZE)
-# else /* no _SC_PAGESIZE */
-# ifdef HAVE_SYS_PARAM_H
-# include <sys/param.h>
-# ifdef EXEC_PAGESIZE
-# define getpagesize() EXEC_PAGESIZE
-# else /* no EXEC_PAGESIZE */
-# ifdef NBPG
-# define getpagesize() NBPG * CLSIZE
-# ifndef CLSIZE
-# define CLSIZE 1
-# endif /* no CLSIZE */
-# else /* no NBPG */
-# ifdef NBPC
-# define getpagesize() NBPC
-# else /* no NBPC */
-# ifdef PAGESIZE
-# define getpagesize() PAGESIZE
-# endif /* PAGESIZE */
-# endif /* no NBPC */
-# endif /* no NBPG */
-# endif /* no EXEC_PAGESIZE */
-# else /* no HAVE_SYS_PARAM_H */
-# define getpagesize() 8192 /* punt totally */
-# endif /* no HAVE_SYS_PARAM_H */
-# endif /* no _SC_PAGESIZE */
-
-#endif /* no HAVE_GETPAGESIZE */
-
-#ifdef __cplusplus
-extern "C" { void *malloc(unsigned); }
-#else
-char *malloc();
-#endif
-
-int
-main()
-{
- char *data, *data2, *data3;
- int i, pagesize;
- int fd;
-
- pagesize = getpagesize();
-
- /*
- * First, make a file with some known garbage in it.
- */
- data = malloc(pagesize);
- if (!data)
- exit(1);
- for (i = 0; i < pagesize; ++i)
- *(data + i) = rand();
- umask(0);
- fd = creat("conftestmmap", 0600);
- if (fd < 0)
- exit(1);
- if (write(fd, data, pagesize) != pagesize)
- exit(1);
- close(fd);
-
- /*
- * Next, try to mmap the file at a fixed address which
- * already has something else allocated at it. If we can,
- * also make sure that we see the same garbage.
- */
- fd = open("conftestmmap", O_RDWR);
- if (fd < 0)
- exit(1);
- data2 = malloc(2 * pagesize);
- if (!data2)
- exit(1);
- data2 += (pagesize - ((int) data2 & (pagesize - 1))) & (pagesize - 1);
- if (data2 != mmap(data2, pagesize, PROT_READ | PROT_WRITE,
- MAP_PRIVATE | MAP_FIXED, fd, 0L))
- exit(1);
- for (i = 0; i < pagesize; ++i)
- if (*(data + i) != *(data2 + i))
- exit(1);
-
- /*
- * Finally, make sure that changes to the mapped area
- * do not percolate back to the file as seen by read().
- * (This is a bug on some variants of i386 svr4.0.)
- */
- for (i = 0; i < pagesize; ++i)
- *(data2 + i) = *(data2 + i) + 1;
- data3 = malloc(pagesize);
- if (!data3)
- exit(1);
- if (read(fd, data3, pagesize) != pagesize)
- exit(1);
- for (i = 0; i < pagesize; ++i)
- if (*(data + i) != *(data3 + i))
- exit(1);
- close(fd);
- unlink("conftestmmap");
- exit(0);
-}
-
-EOF
-if { (eval echo configure:1587: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null
-then
- ac_cv_func_mmap_fixed_mapped=yes
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -fr conftest*
- ac_cv_func_mmap_fixed_mapped=no
-fi
-rm -fr conftest*
-fi
-
-fi
-
-echo "$ac_t""$ac_cv_func_mmap_fixed_mapped" 1>&6
-if test $ac_cv_func_mmap_fixed_mapped = yes; then
- cat >> confdefs.h <<\EOF
-#define HAVE_MMAP 1
-EOF
-
-fi
-
-echo $ac_n "checking for Cygwin environment""... $ac_c" 1>&6
-echo "configure:1610: checking for Cygwin environment" >&5
-if eval "test \"`echo '$''{'ac_cv_cygwin'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1615 "configure"
-#include "confdefs.h"
-
-int main() {
-
-#ifndef __CYGWIN__
-#define __CYGWIN__ __CYGWIN32__
-#endif
-return __CYGWIN__;
-; return 0; }
-EOF
-if { (eval echo configure:1626: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
- rm -rf conftest*
- ac_cv_cygwin=yes
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- ac_cv_cygwin=no
-fi
-rm -f conftest*
-rm -f conftest*
-fi
-
-echo "$ac_t""$ac_cv_cygwin" 1>&6
-CYGWIN=
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-echo $ac_n "checking for mingw32 environment""... $ac_c" 1>&6
-echo "configure:1643: checking for mingw32 environment" >&5
-if eval "test \"`echo '$''{'ac_cv_mingw32'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1648 "configure"
-#include "confdefs.h"
-
-int main() {
-return __MINGW32__;
-; return 0; }
-EOF
-if { (eval echo configure:1655: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
- rm -rf conftest*
- ac_cv_mingw32=yes
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- ac_cv_mingw32=no
-fi
-rm -f conftest*
-rm -f conftest*
-fi
-
-echo "$ac_t""$ac_cv_mingw32" 1>&6
-MINGW32=
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-
-# autoconf.info says this should be called right after AC_INIT.
-
-
-ac_aux_dir=
-for ac_dir in `cd $srcdir;pwd`/../.. $srcdir/`cd $srcdir;pwd`/../..; do
- if test -f $ac_dir/install-sh; then
- ac_aux_dir=$ac_dir
- ac_install_sh="$ac_aux_dir/install-sh -c"
- break
- elif test -f $ac_dir/install.sh; then
- ac_aux_dir=$ac_dir
- ac_install_sh="$ac_aux_dir/install.sh -c"
- break
- fi
-done
-if test -z "$ac_aux_dir"; then
- { echo "configure: error: can not find install-sh or install.sh in `cd $srcdir;pwd`/../.. $srcdir/`cd $srcdir;pwd`/../.." 1>&2; exit 1; }
-fi
-ac_config_guess=$ac_aux_dir/config.guess
-ac_config_sub=$ac_aux_dir/config.sub
-ac_configure=$ac_aux_dir/configure # This should be Cygnus configure.
-
-
-# Do some error checking and defaulting for the host and target type.
-# The inputs are:
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-#
-# The rules are:
-# 1. You are not allowed to specify --host, --target, and nonopt at the
-# same time.
-# 2. Host defaults to nonopt.
-# 3. If nonopt is not specified, then host defaults to the current host,
-# as determined by config.guess.
-# 4. Target and build default to nonopt.
-# 5. If nonopt is not specified, then target and build default to host.
-
-# The aliases save the names the user supplied, while $host etc.
-# will get canonicalized.
-case $host---$target---$nonopt in
-NONE---*---* | *---NONE---* | *---*---NONE) ;;
-*) { echo "configure: error: can only configure for one host and one target at a time" 1>&2; exit 1; } ;;
-esac
-
-
-# Make sure we can run config.sub.
-if ${CONFIG_SHELL-/bin/sh} $ac_config_sub sun4 >/dev/null 2>&1; then :
-else { echo "configure: error: can not run $ac_config_sub" 1>&2; exit 1; }
-fi
-
-echo $ac_n "checking host system type""... $ac_c" 1>&6
-echo "configure:1722: checking host system type" >&5
-
-host_alias=$host
-case "$host_alias" in
-NONE)
- case $nonopt in
- NONE)
- if host_alias=`${CONFIG_SHELL-/bin/sh} $ac_config_guess`; then :
- else { echo "configure: error: can not guess host type; you must specify one" 1>&2; exit 1; }
- fi ;;
- *) host_alias=$nonopt ;;
- esac ;;
-esac
-
-host=`${CONFIG_SHELL-/bin/sh} $ac_config_sub $host_alias`
-host_cpu=`echo $host | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\1/'`
-host_vendor=`echo $host | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\2/'`
-host_os=`echo $host | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\3/'`
-echo "$ac_t""$host" 1>&6
-
-echo $ac_n "checking target system type""... $ac_c" 1>&6
-echo "configure:1743: checking target system type" >&5
-
-target_alias=$target
-case "$target_alias" in
-NONE)
- case $nonopt in
- NONE) target_alias=$host_alias ;;
- *) target_alias=$nonopt ;;
- esac ;;
-esac
-
-target=`${CONFIG_SHELL-/bin/sh} $ac_config_sub $target_alias`
-target_cpu=`echo $target | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\1/'`
-target_vendor=`echo $target | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\2/'`
-target_os=`echo $target | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\3/'`
-echo "$ac_t""$target" 1>&6
-
-echo $ac_n "checking build system type""... $ac_c" 1>&6
-echo "configure:1761: checking build system type" >&5
-
-build_alias=$build
-case "$build_alias" in
-NONE)
- case $nonopt in
- NONE) build_alias=$host_alias ;;
- *) build_alias=$nonopt ;;
- esac ;;
-esac
-
-build=`${CONFIG_SHELL-/bin/sh} $ac_config_sub $build_alias`
-build_cpu=`echo $build | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\1/'`
-build_vendor=`echo $build | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\2/'`
-build_os=`echo $build | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\3/'`
-echo "$ac_t""$build" 1>&6
-
-test "$host_alias" != "$target_alias" &&
- test "$program_prefix$program_suffix$program_transform_name" = \
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- program_prefix=${target_alias}-
-
-if test "$program_transform_name" = s,x,x,; then
- program_transform_name=
-else
- # Double any \ or $. echo might interpret backslashes.
- cat <<\EOF_SED > conftestsed
-s,\\,\\\\,g; s,\$,$$,g
-EOF_SED
- program_transform_name="`echo $program_transform_name|sed -f conftestsed`"
- rm -f conftestsed
-fi
-test "$program_prefix" != NONE &&
- program_transform_name="s,^,${program_prefix},; $program_transform_name"
-# Use a double $ so make ignores it.
-test "$program_suffix" != NONE &&
- program_transform_name="s,\$\$,${program_suffix},; $program_transform_name"
-
-# sed with no file args requires a program.
-test "$program_transform_name" = "" && program_transform_name="s,x,x,"
-
-# Extract the first word of "gcc", so it can be a program name with args.
-set dummy gcc; ac_word=$2
-echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:1805: checking for $ac_word" >&5
-if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- if test -n "$CC"; then
- ac_cv_prog_CC="$CC" # Let the user override the test.
-else
- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
- ac_dummy="$PATH"
- for ac_dir in $ac_dummy; do
- test -z "$ac_dir" && ac_dir=.
- if test -f $ac_dir/$ac_word; then
- ac_cv_prog_CC="gcc"
- break
- fi
- done
- IFS="$ac_save_ifs"
-fi
-fi
-CC="$ac_cv_prog_CC"
-if test -n "$CC"; then
- echo "$ac_t""$CC" 1>&6
-else
- echo "$ac_t""no" 1>&6
-fi
-
-if test -z "$CC"; then
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-set dummy cc; ac_word=$2
-echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:1835: checking for $ac_word" >&5
-if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- if test -n "$CC"; then
- ac_cv_prog_CC="$CC" # Let the user override the test.
-else
- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
- ac_prog_rejected=no
- ac_dummy="$PATH"
- for ac_dir in $ac_dummy; do
- test -z "$ac_dir" && ac_dir=.
- if test -f $ac_dir/$ac_word; then
- if test "$ac_dir/$ac_word" = "/usr/ucb/cc"; then
- ac_prog_rejected=yes
- continue
- fi
- ac_cv_prog_CC="cc"
- break
- fi
- done
- IFS="$ac_save_ifs"
-if test $ac_prog_rejected = yes; then
- # We found a bogon in the path, so make sure we never use it.
- set dummy $ac_cv_prog_CC
- shift
- if test $# -gt 0; then
- # We chose a different compiler from the bogus one.
- # However, it has the same basename, so the bogon will be chosen
- # first if we set CC to just the basename; use the full file name.
- shift
- set dummy "$ac_dir/$ac_word" "$@"
- shift
- ac_cv_prog_CC="$@"
- fi
-fi
-fi
-fi
-CC="$ac_cv_prog_CC"
-if test -n "$CC"; then
- echo "$ac_t""$CC" 1>&6
-else
- echo "$ac_t""no" 1>&6
-fi
-
- if test -z "$CC"; then
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- *win32* | *WIN32*)
- # Extract the first word of "cl", so it can be a program name with args.
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-echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:1886: checking for $ac_word" >&5
-if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- if test -n "$CC"; then
- ac_cv_prog_CC="$CC" # Let the user override the test.
-else
- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
- ac_dummy="$PATH"
- for ac_dir in $ac_dummy; do
- test -z "$ac_dir" && ac_dir=.
- if test -f $ac_dir/$ac_word; then
- ac_cv_prog_CC="cl"
- break
- fi
- done
- IFS="$ac_save_ifs"
-fi
-fi
-CC="$ac_cv_prog_CC"
-if test -n "$CC"; then
- echo "$ac_t""$CC" 1>&6
-else
- echo "$ac_t""no" 1>&6
-fi
- ;;
- esac
- fi
- test -z "$CC" && { echo "configure: error: no acceptable cc found in \$PATH" 1>&2; exit 1; }
-fi
-
-echo $ac_n "checking whether the C compiler ($CC $CFLAGS $LDFLAGS) works""... $ac_c" 1>&6
-echo "configure:1918: checking whether the C compiler ($CC $CFLAGS $LDFLAGS) works" >&5
-
-ac_ext=c
-# CFLAGS is not in ac_cpp because -g, -O, etc. are not valid cpp options.
-ac_cpp='$CPP $CPPFLAGS'
-ac_compile='${CC-cc} -c $CFLAGS $CPPFLAGS conftest.$ac_ext 1>&5'
-ac_link='${CC-cc} -o conftest${ac_exeext} $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS 1>&5'
-cross_compiling=$ac_cv_prog_cc_cross
-
-cat > conftest.$ac_ext << EOF
-
-#line 1929 "configure"
-#include "confdefs.h"
-
-main(){return(0);}
-EOF
-if { (eval echo configure:1934: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- ac_cv_prog_cc_works=yes
- # If we can't run a trivial program, we are probably using a cross compiler.
- if (./conftest; exit) 2>/dev/null; then
- ac_cv_prog_cc_cross=no
- else
- ac_cv_prog_cc_cross=yes
- fi
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- ac_cv_prog_cc_works=no
-fi
-rm -fr conftest*
-ac_ext=c
-# CFLAGS is not in ac_cpp because -g, -O, etc. are not valid cpp options.
-ac_cpp='$CPP $CPPFLAGS'
-ac_compile='${CC-cc} -c $CFLAGS $CPPFLAGS conftest.$ac_ext 1>&5'
-ac_link='${CC-cc} -o conftest${ac_exeext} $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS 1>&5'
-cross_compiling=$ac_cv_prog_cc_cross
-
-echo "$ac_t""$ac_cv_prog_cc_works" 1>&6
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-fi
-echo $ac_n "checking whether the C compiler ($CC $CFLAGS $LDFLAGS) is a cross-compiler""... $ac_c" 1>&6
-echo "configure:1960: checking whether the C compiler ($CC $CFLAGS $LDFLAGS) is a cross-compiler" >&5
-echo "$ac_t""$ac_cv_prog_cc_cross" 1>&6
-cross_compiling=$ac_cv_prog_cc_cross
-
-echo $ac_n "checking whether we are using GNU C""... $ac_c" 1>&6
-echo "configure:1965: checking whether we are using GNU C" >&5
-if eval "test \"`echo '$''{'ac_cv_prog_gcc'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.c <<EOF
-#ifdef __GNUC__
- yes;
-#endif
-EOF
-if { ac_try='${CC-cc} -E conftest.c'; { (eval echo configure:1974: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }; } | egrep yes >/dev/null 2>&1; then
- ac_cv_prog_gcc=yes
-else
- ac_cv_prog_gcc=no
-fi
-fi
-
-echo "$ac_t""$ac_cv_prog_gcc" 1>&6
-
-if test $ac_cv_prog_gcc = yes; then
- GCC=yes
-else
- GCC=
-fi
-
-ac_test_CFLAGS="${CFLAGS+set}"
-ac_save_CFLAGS="$CFLAGS"
-CFLAGS=
-echo $ac_n "checking whether ${CC-cc} accepts -g""... $ac_c" 1>&6
-echo "configure:1993: checking whether ${CC-cc} accepts -g" >&5
-if eval "test \"`echo '$''{'ac_cv_prog_cc_g'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
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- echo 'void f(){}' > conftest.c
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-fi
-
- # Extract the first word of "xgettext", so it can be a program name with args.
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-echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:2625: checking for $ac_word" >&5
-if eval "test \"`echo '$''{'ac_cv_path_XGETTEXT'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- case "$XGETTEXT" in
- /*)
- ac_cv_path_XGETTEXT="$XGETTEXT" # Let the user override the test with a path.
- ;;
- *)
- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS="${IFS}:"
- for ac_dir in $PATH; do
- test -z "$ac_dir" && ac_dir=.
- if test -f $ac_dir/$ac_word; then
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- ac_cv_path_XGETTEXT="$ac_dir/$ac_word"
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- fi
- fi
- done
- IFS="$ac_save_ifs"
- test -z "$ac_cv_path_XGETTEXT" && ac_cv_path_XGETTEXT=":"
- ;;
-esac
-fi
-XGETTEXT="$ac_cv_path_XGETTEXT"
-if test -n "$XGETTEXT"; then
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-else
- echo "$ac_t""no" 1>&6
-fi
-
- cat > conftest.$ac_ext <<EOF
-#line 2657 "configure"
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-if { (eval echo configure:2665: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
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- CATOBJEXT=.gmo
- DATADIRNAME=share
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- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- CATOBJEXT=.mo
- DATADIRNAME=lib
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-rm -f conftest*
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- fi
-
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- echo "$ac_t""no" 1>&6
-fi
-
-
-
- if test "$CATOBJEXT" = "NONE"; then
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- fi
-
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-echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:2697: checking for $ac_word" >&5
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- *)
- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS="${IFS}:"
- for ac_dir in $PATH; do
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- if test -f $ac_dir/$ac_word; then
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- ac_cv_path_MSGFMT="$ac_dir/$ac_word"
- break
- fi
- fi
- done
- IFS="$ac_save_ifs"
- test -z "$ac_cv_path_MSGFMT" && ac_cv_path_MSGFMT="msgfmt"
- ;;
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-MSGFMT="$ac_cv_path_MSGFMT"
-if test -n "$MSGFMT"; then
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-else
- echo "$ac_t""no" 1>&6
-fi
-
- # Extract the first word of "gmsgfmt", so it can be a program name with args.
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-echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
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- ac_cv_path_GMSGFMT="$GMSGFMT" # Let the user override the test with a dos path.
- ;;
- *)
- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
- ac_dummy="$PATH"
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- IFS="$ac_save_ifs"
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- ;;
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-fi
-
- # Extract the first word of "xgettext", so it can be a program name with args.
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-echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:2767: checking for $ac_word" >&5
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- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS="${IFS}:"
- for ac_dir in $PATH; do
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- IFS="$ac_save_ifs"
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-else
- echo "$ac_t""no" 1>&6
-fi
-
-
- USE_INCLUDED_LIBINTL=yes
- CATOBJEXT=.gmo
- INSTOBJEXT=.mo
- DATADIRNAME=share
- INTLDEPS='$(top_builddir)/../intl/libintl.a'
- INTLLIBS=$INTLDEPS
- LIBS=`echo $LIBS | sed -e 's/-lintl//'`
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- nls_cv_header_libgt=libgettext.h
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- : ;
- else
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- fi
- fi
-
- # We need to process the po/ directory.
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- else
- DATADIRNAME=share
- nls_cv_header_intl=libintl.h
- nls_cv_header_libgt=libgettext.h
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-
- # If this is used in GNU gettext we have to set USE_NLS to `yes'
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-
- for lang in $ALL_LINGUAS; do
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- POFILES="$POFILES $lang.po"
- done
-
-
-
-
-
-
-
-
-
-
-
-
-
-
- if test "x$CATOBJEXT" != "x"; then
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- echo $ac_n "checking for catalogs to be installed""... $ac_c" 1>&6
-echo "configure:2857: checking for catalogs to be installed" >&5
- NEW_LINGUAS=
- for lang in ${LINGUAS=$ALL_LINGUAS}; do
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- esac
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- fi
-
- if test -n "$LINGUAS"; then
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- fi
- fi
-
- if test $ac_cv_header_locale_h = yes; then
- INCLUDE_LOCALE_H="#include <locale.h>"
- else
- INCLUDE_LOCALE_H="\
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- fi
-
-
- if test -f $srcdir/po2tbl.sed.in; then
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-echo $ac_n "checking for linux/version.h""... $ac_c" 1>&6
-echo "configure:2885: checking for linux/version.h" >&5
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- echo $ac_n "(cached) $ac_c" 1>&6
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- cat > conftest.$ac_ext <<EOF
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-ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:2895: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
-ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
-if test -z "$ac_err"; then
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=yes"
-else
- echo "$ac_err" >&5
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=no"
-fi
-rm -f conftest*
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-if eval "test \"`echo '$ac_cv_header_'$ac_safe`\" = yes"; then
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- msgformat=linux
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- echo "$ac_t""no" 1>&6
-msgformat=xopen
-fi
-
-
- sed -e '/^#/d' $srcdir/$msgformat-msg.sed > po2msg.sed
- fi
- sed -e '/^#.*[^\\]$/d' -e '/^#$/d' \
- $srcdir/po2tbl.sed.in > po2tbl.sed
- fi
-
- if test "$PACKAGE" = "gettext"; then
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- GT_YES=
- else
- GT_NO=
- GT_YES="#YES#"
- fi
-
-
-
- MKINSTALLDIRS="\$(srcdir)/../../mkinstalldirs"
-
-
- l=
-
-
- if test -d $srcdir/po; then
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- if test "x$srcdir" != "x."; then
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- else
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- fi
- else
- posrcprefix="../"
- fi
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- sed -e "/^#/d" -e "/^\$/d" -e "s,.*, $posrcprefix& \\\\," -e "\$s/\(.*\) \\\\/\1/" \
- < $srcdir/po/POTFILES.in > po/POTFILES
- fi
-
-
-# Check for common headers.
-# FIXME: Seems to me this can cause problems for i386-windows hosts.
-# At one point there were hardcoded AC_DEFINE's if ${host} = i386-*-windows*.
-for ac_hdr in stdlib.h string.h strings.h unistd.h time.h
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-ac_safe=`echo "$ac_hdr" | sed 'y%./+-%__p_%'`
-echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6
-echo "configure:2964: checking for $ac_hdr" >&5
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- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 2969 "configure"
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-ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:2974: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
-ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
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- eval "ac_cv_header_$ac_safe=yes"
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- echo "$ac_err" >&5
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=no"
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- ac_tr_hdr=HAVE_`echo $ac_hdr | sed 'y%abcdefghijklmnopqrstuvwxyz./-%ABCDEFGHIJKLMNOPQRSTUVWXYZ___%'`
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-echo "configure:3004: checking for $ac_hdr" >&5
-if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then
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- cat > conftest.$ac_ext <<EOF
-#line 3009 "configure"
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-ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:3014: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
-ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
-if test -z "$ac_err"; then
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- eval "ac_cv_header_$ac_safe=yes"
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- echo "$ac_err" >&5
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
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- eval "ac_cv_header_$ac_safe=no"
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-if eval "test \"`echo '$ac_cv_header_'$ac_safe`\" = yes"; then
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- ac_tr_hdr=HAVE_`echo $ac_hdr | sed 'y%abcdefghijklmnopqrstuvwxyz./-%ABCDEFGHIJKLMNOPQRSTUVWXYZ___%'`
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-
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- echo "$ac_t""no" 1>&6
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-
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-echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6
-echo "configure:3044: checking for $ac_hdr" >&5
-if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
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- cat > conftest.$ac_ext <<EOF
-#line 3049 "configure"
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-ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:3054: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
-ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
-if test -z "$ac_err"; then
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- eval "ac_cv_header_$ac_safe=yes"
-else
- echo "$ac_err" >&5
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=no"
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-if eval "test \"`echo '$ac_cv_header_'$ac_safe`\" = yes"; then
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- ac_tr_hdr=HAVE_`echo $ac_hdr | sed 'y%abcdefghijklmnopqrstuvwxyz./-%ABCDEFGHIJKLMNOPQRSTUVWXYZ___%'`
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-#define $ac_tr_hdr 1
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-
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-
-for ac_hdr in dlfcn.h errno.h sys/stat.h
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-echo "configure:3084: checking for $ac_hdr" >&5
-if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 3089 "configure"
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-ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:3094: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
-ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
-if test -z "$ac_err"; then
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=yes"
-else
- echo "$ac_err" >&5
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=no"
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-rm -f conftest*
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-if eval "test \"`echo '$ac_cv_header_'$ac_safe`\" = yes"; then
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- ac_tr_hdr=HAVE_`echo $ac_hdr | sed 'y%abcdefghijklmnopqrstuvwxyz./-%ABCDEFGHIJKLMNOPQRSTUVWXYZ___%'`
- cat >> confdefs.h <<EOF
-#define $ac_tr_hdr 1
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-
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-
-for ac_func in getrusage time sigaction __setfpucw
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-echo "configure:3123: checking for $ac_func" >&5
-if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 3128 "configure"
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-/* We use char because int might match the return type of a gcc2
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-char $ac_func();
-
-int main() {
-
-/* The GNU C library defines this for functions which it implements
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-#if defined (__stub_$ac_func) || defined (__stub___$ac_func)
-choke me
-#else
-$ac_func();
-#endif
-
-; return 0; }
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-if { (eval echo configure:3151: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=yes"
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=no"
-fi
-rm -f conftest*
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-
-if eval "test \"`echo '$ac_cv_func_'$ac_func`\" = yes"; then
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- ac_tr_func=HAVE_`echo $ac_func | tr 'abcdefghijklmnopqrstuvwxyz' 'ABCDEFGHIJKLMNOPQRSTUVWXYZ'`
- cat >> confdefs.h <<EOF
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-
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- echo "$ac_t""no" 1>&6
-fi
-done
-
-
-# Check for socket libraries
-echo $ac_n "checking for bind in -lsocket""... $ac_c" 1>&6
-echo "configure:3178: checking for bind in -lsocket" >&5
-ac_lib_var=`echo socket'_'bind | sed 'y%./+-%__p_%'`
-if eval "test \"`echo '$''{'ac_cv_lib_$ac_lib_var'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- ac_save_LIBS="$LIBS"
-LIBS="-lsocket $LIBS"
-cat > conftest.$ac_ext <<EOF
-#line 3186 "configure"
-#include "confdefs.h"
-/* Override any gcc2 internal prototype to avoid an error. */
-/* We use char because int might match the return type of a gcc2
- builtin and then its argument prototype would still apply. */
-char bind();
-
-int main() {
-bind()
-; return 0; }
-EOF
-if { (eval echo configure:3197: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- rm -rf conftest*
- eval "ac_cv_lib_$ac_lib_var=yes"
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_lib_$ac_lib_var=no"
-fi
-rm -f conftest*
-LIBS="$ac_save_LIBS"
-
-fi
-if eval "test \"`echo '$ac_cv_lib_'$ac_lib_var`\" = yes"; then
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- ac_tr_lib=HAVE_LIB`echo socket | sed -e 's/[^a-zA-Z0-9_]/_/g' \
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- cat >> confdefs.h <<EOF
-#define $ac_tr_lib 1
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-
- LIBS="-lsocket $LIBS"
-
-else
- echo "$ac_t""no" 1>&6
-fi
-
-echo $ac_n "checking for gethostbyname in -lnsl""... $ac_c" 1>&6
-echo "configure:3225: checking for gethostbyname in -lnsl" >&5
-ac_lib_var=`echo nsl'_'gethostbyname | sed 'y%./+-%__p_%'`
-if eval "test \"`echo '$''{'ac_cv_lib_$ac_lib_var'+set}'`\" = set"; then
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-else
- ac_save_LIBS="$LIBS"
-LIBS="-lnsl $LIBS"
-cat > conftest.$ac_ext <<EOF
-#line 3233 "configure"
-#include "confdefs.h"
-/* Override any gcc2 internal prototype to avoid an error. */
-/* We use char because int might match the return type of a gcc2
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-char gethostbyname();
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-int main() {
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-if { (eval echo configure:3244: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
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- eval "ac_cv_lib_$ac_lib_var=yes"
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_lib_$ac_lib_var=no"
-fi
-rm -f conftest*
-LIBS="$ac_save_LIBS"
-
-fi
-if eval "test \"`echo '$ac_cv_lib_'$ac_lib_var`\" = yes"; then
- echo "$ac_t""yes" 1>&6
- ac_tr_lib=HAVE_LIB`echo nsl | sed -e 's/[^a-zA-Z0-9_]/_/g' \
- -e 'y/abcdefghijklmnopqrstuvwxyz/ABCDEFGHIJKLMNOPQRSTUVWXYZ/'`
- cat >> confdefs.h <<EOF
-#define $ac_tr_lib 1
-EOF
-
- LIBS="-lnsl $LIBS"
-
-else
- echo "$ac_t""no" 1>&6
-fi
-
-
-. ${srcdir}/../../bfd/configure.host
-
-
-
-USE_MAINTAINER_MODE=no
-# Check whether --enable-maintainer-mode or --disable-maintainer-mode was given.
-if test "${enable_maintainer_mode+set}" = set; then
- enableval="$enable_maintainer_mode"
- case "${enableval}" in
- yes) MAINT="" USE_MAINTAINER_MODE=yes ;;
- no) MAINT="#" ;;
- *) { echo "configure: error: "--enable-maintainer-mode does not take a value"" 1>&2; exit 1; }; MAINT="#" ;;
-esac
-if test x"$silent" != x"yes" && test x"$MAINT" = x""; then
- echo "Setting maintainer mode" 6>&1
-fi
-else
- MAINT="#"
-fi
-
-
-
-# Check whether --enable-sim-bswap or --disable-sim-bswap was given.
-if test "${enable_sim_bswap+set}" = set; then
- enableval="$enable_sim_bswap"
- case "${enableval}" in
- yes) sim_bswap="-DWITH_BSWAP=1 -DUSE_BSWAP=1";;
- no) sim_bswap="-DWITH_BSWAP=0";;
- *) { echo "configure: error: "--enable-sim-bswap does not take a value"" 1>&2; exit 1; }; sim_bswap="";;
-esac
-if test x"$silent" != x"yes" && test x"$sim_bswap" != x""; then
- echo "Setting bswap flags = $sim_bswap" 6>&1
-fi
-else
- sim_bswap=""
-fi
-
-
-
-# Check whether --enable-sim-cflags or --disable-sim-cflags was given.
-if test "${enable_sim_cflags+set}" = set; then
- enableval="$enable_sim_cflags"
- case "${enableval}" in
- yes) sim_cflags="-O2 -fomit-frame-pointer";;
- trace) { echo "configure: error: "Please use --enable-sim-debug instead."" 1>&2; exit 1; }; sim_cflags="";;
- no) sim_cflags="";;
- *) sim_cflags=`echo "${enableval}" | sed -e "s/,/ /g"`;;
-esac
-if test x"$silent" != x"yes" && test x"$sim_cflags" != x""; then
- echo "Setting sim cflags = $sim_cflags" 6>&1
-fi
-else
- sim_cflags=""
-fi
-
-
-
-# Check whether --enable-sim-debug or --disable-sim-debug was given.
-if test "${enable_sim_debug+set}" = set; then
- enableval="$enable_sim_debug"
- case "${enableval}" in
- yes) sim_debug="-DDEBUG=7 -DWITH_DEBUG=7";;
- no) sim_debug="-DDEBUG=0 -DWITH_DEBUG=0";;
- *) sim_debug="-DDEBUG='(${enableval})' -DWITH_DEBUG='(${enableval})'";;
-esac
-if test x"$silent" != x"yes" && test x"$sim_debug" != x""; then
- echo "Setting sim debug = $sim_debug" 6>&1
-fi
-else
- sim_debug=""
-fi
-
-
-
-# Check whether --enable-sim-stdio or --disable-sim-stdio was given.
-if test "${enable_sim_stdio+set}" = set; then
- enableval="$enable_sim_stdio"
- case "${enableval}" in
- yes) sim_stdio="-DWITH_STDIO=DO_USE_STDIO";;
- no) sim_stdio="-DWITH_STDIO=DONT_USE_STDIO";;
- *) { echo "configure: error: "Unknown value $enableval passed to --enable-sim-stdio"" 1>&2; exit 1; }; sim_stdio="";;
-esac
-if test x"$silent" != x"yes" && test x"$sim_stdio" != x""; then
- echo "Setting stdio flags = $sim_stdio" 6>&1
-fi
-else
- sim_stdio=""
-fi
-
-
-
-# Check whether --enable-sim-trace or --disable-sim-trace was given.
-if test "${enable_sim_trace+set}" = set; then
- enableval="$enable_sim_trace"
- case "${enableval}" in
- yes) sim_trace="-DTRACE=1 -DWITH_TRACE=-1";;
- no) sim_trace="-DTRACE=0 -DWITH_TRACE=0";;
- [-0-9]*)
- sim_trace="-DTRACE='(${enableval})' -DWITH_TRACE='(${enableval})'";;
- [a-z]*)
- sim_trace=""
- for x in `echo "$enableval" | sed -e "s/,/ /g"`; do
- if test x"$sim_trace" = x; then
- sim_trace="-DWITH_TRACE='(TRACE_$x"
- else
- sim_trace="${sim_trace}|TRACE_$x"
- fi
- done
- sim_trace="$sim_trace)'" ;;
-esac
-if test x"$silent" != x"yes" && test x"$sim_trace" != x""; then
- echo "Setting sim trace = $sim_trace" 6>&1
-fi
-else
- sim_trace=""
-fi
-
-
-
-# Check whether --enable-sim-profile or --disable-sim-profile was given.
-if test "${enable_sim_profile+set}" = set; then
- enableval="$enable_sim_profile"
- case "${enableval}" in
- yes) sim_profile="-DPROFILE=1 -DWITH_PROFILE=-1";;
- no) sim_profile="-DPROFILE=0 -DWITH_PROFILE=0";;
- [-0-9]*)
- sim_profile="-DPROFILE='(${enableval})' -DWITH_PROFILE='(${enableval})'";;
- [a-z]*)
- sim_profile=""
- for x in `echo "$enableval" | sed -e "s/,/ /g"`; do
- if test x"$sim_profile" = x; then
- sim_profile="-DWITH_PROFILE='(PROFILE_$x"
- else
- sim_profile="${sim_profile}|PROFILE_$x"
- fi
- done
- sim_profile="$sim_profile)'" ;;
-esac
-if test x"$silent" != x"yes" && test x"$sim_profile" != x""; then
- echo "Setting sim profile = $sim_profile" 6>&1
-fi
-else
- sim_profile="-DPROFILE=1 -DWITH_PROFILE=-1"
-fi
-
-
-
-echo $ac_n "checking return type of signal handlers""... $ac_c" 1>&6
-echo "configure:3420: checking return type of signal handlers" >&5
-if eval "test \"`echo '$''{'ac_cv_type_signal'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 3425 "configure"
-#include "confdefs.h"
-#include <sys/types.h>
-#include <signal.h>
-#ifdef signal
-#undef signal
-#endif
-#ifdef __cplusplus
-extern "C" void (*signal (int, void (*)(int)))(int);
-#else
-void (*signal ()) ();
-#endif
-
-int main() {
-int i;
-; return 0; }
-EOF
-if { (eval echo configure:3442: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
- rm -rf conftest*
- ac_cv_type_signal=void
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- ac_cv_type_signal=int
-fi
-rm -f conftest*
-fi
-
-echo "$ac_t""$ac_cv_type_signal" 1>&6
-cat >> confdefs.h <<EOF
-#define RETSIGTYPE $ac_cv_type_signal
-EOF
-
-
-
-
-
-echo $ac_n "checking for executable suffix""... $ac_c" 1>&6
-echo "configure:3464: checking for executable suffix" >&5
-if eval "test \"`echo '$''{'ac_cv_exeext'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- if test "$CYGWIN" = yes || test "$MINGW32" = yes; then
- ac_cv_exeext=.exe
-else
- rm -f conftest*
- echo 'int main () { return 0; }' > conftest.$ac_ext
- ac_cv_exeext=
- if { (eval echo configure:3474: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; }; then
- for file in conftest.*; do
- case $file in
- *.c | *.o | *.obj | *.ilk | *.pdb) ;;
- *) ac_cv_exeext=`echo $file | sed -e s/conftest//` ;;
- esac
- done
- else
- { echo "configure: error: installation or configuration problem: compiler cannot create executables." 1>&2; exit 1; }
- fi
- rm -f conftest*
- test x"${ac_cv_exeext}" = x && ac_cv_exeext=no
-fi
-fi
-
-EXEEXT=""
-test x"${ac_cv_exeext}" != xno && EXEEXT=${ac_cv_exeext}
-echo "$ac_t""${ac_cv_exeext}" 1>&6
-ac_exeext=$EXEEXT
-
-
-sim_link_files=
-sim_link_links=
-
-sim_link_links=tconfig.h
-if test -f ${srcdir}/tconfig.in
-then
- sim_link_files=tconfig.in
-else
- sim_link_files=../common/tconfig.in
-fi
-
-# targ-vals.def points to the libc macro description file.
-case "${target}" in
-*-*-*) TARG_VALS_DEF=../common/nltvals.def ;;
-esac
-sim_link_files="${sim_link_files} ${TARG_VALS_DEF}"
-sim_link_links="${sim_link_links} targ-vals.def"
-
-
-
-
-wire_endian="LITTLE_ENDIAN"
-default_endian=""
-# Check whether --enable-sim-endian or --disable-sim-endian was given.
-if test "${enable_sim_endian+set}" = set; then
- enableval="$enable_sim_endian"
- case "${enableval}" in
- b*|B*) sim_endian="-DWITH_TARGET_BYTE_ORDER=BIG_ENDIAN";;
- l*|L*) sim_endian="-DWITH_TARGET_BYTE_ORDER=LITTLE_ENDIAN";;
- yes) if test x"$wire_endian" != x; then
- sim_endian="-DWITH_TARGET_BYTE_ORDER=${wire_endian}"
- else
- if test x"$default_endian" != x; then
- sim_endian="-DWITH_TARGET_BYTE_ORDER=${default_endian}"
- else
- echo "No hard-wired endian for target $target" 1>&6
- sim_endian="-DWITH_TARGET_BYTE_ORDER=0"
- fi
- fi;;
- no) if test x"$default_endian" != x; then
- sim_endian="-DWITH_DEFAULT_TARGET_BYTE_ORDER=${default_endian}"
- else
- if test x"$wire_endian" != x; then
- sim_endian="-DWITH_DEFAULT_TARGET_BYTE_ORDER=${wire_endian}"
- else
- echo "No default endian for target $target" 1>&6
- sim_endian="-DWITH_DEFAULT_TARGET_BYTE_ORDER=0"
- fi
- fi;;
- *) { echo "configure: error: "Unknown value $enableval for --enable-sim-endian"" 1>&2; exit 1; }; sim_endian="";;
-esac
-if test x"$silent" != x"yes" && test x"$sim_endian" != x""; then
- echo "Setting endian flags = $sim_endian" 6>&1
-fi
-else
- if test x"$default_endian" != x; then
- sim_endian="-DWITH_DEFAULT_TARGET_BYTE_ORDER=${default_endian}"
-else
- if test x"$wire_endian" != x; then
- sim_endian="-DWITH_TARGET_BYTE_ORDER=${wire_endian}"
- else
- sim_endian=
- fi
-fi
-fi
-
-wire_alignment="NONSTRICT_ALIGNMENT"
-default_alignment=""
-
-# Check whether --enable-sim-alignment or --disable-sim-alignment was given.
-if test "${enable_sim_alignment+set}" = set; then
- enableval="$enable_sim_alignment"
- case "${enableval}" in
- strict | STRICT) sim_alignment="-DWITH_ALIGNMENT=STRICT_ALIGNMENT";;
- nonstrict | NONSTRICT) sim_alignment="-DWITH_ALIGNMENT=NONSTRICT_ALIGNMENT";;
- forced | FORCED) sim_alignment="-DWITH_ALIGNMENT=FORCED_ALIGNMENT";;
- yes) if test x"$wire_alignment" != x; then
- sim_alignment="-DWITH_ALIGNMENT=${wire_alignment}"
- else
- if test x"$default_alignment" != x; then
- sim_alignment="-DWITH_ALIGNMENT=${default_alignment}"
- else
- echo "No hard-wired alignment for target $target" 1>&6
- sim_alignment="-DWITH_ALIGNMENT=0"
- fi
- fi;;
- no) if test x"$default_alignment" != x; then
- sim_alignment="-DWITH_DEFAULT_ALIGNMENT=${default_alignment}"
- else
- if test x"$wire_alignment" != x; then
- sim_alignment="-DWITH_DEFAULT_ALIGNMENT=${wire_alignment}"
- else
- echo "No default alignment for target $target" 1>&6
- sim_alignment="-DWITH_DEFAULT_ALIGNMENT=0"
- fi
- fi;;
- *) { echo "configure: error: "Unknown value $enableval passed to --enable-sim-alignment"" 1>&2; exit 1; }; sim_alignment="";;
-esac
-if test x"$silent" != x"yes" && test x"$sim_alignment" != x""; then
- echo "Setting alignment flags = $sim_alignment" 6>&1
-fi
-else
- if test x"$default_alignment" != x; then
- sim_alignment="-DWITH_DEFAULT_ALIGNMENT=${default_alignment}"
-else
- if test x"$wire_alignment" != x; then
- sim_alignment="-DWITH_ALIGNMENT=${wire_alignment}"
- else
- sim_alignment=
- fi
-fi
-fi
-
-
-# Check whether --enable-sim-hostendian or --disable-sim-hostendian was given.
-if test "${enable_sim_hostendian+set}" = set; then
- enableval="$enable_sim_hostendian"
- case "${enableval}" in
- no) sim_hostendian="-DWITH_HOST_BYTE_ORDER=0";;
- b*|B*) sim_hostendian="-DWITH_HOST_BYTE_ORDER=BIG_ENDIAN";;
- l*|L*) sim_hostendian="-DWITH_HOST_BYTE_ORDER=LITTLE_ENDIAN";;
- *) { echo "configure: error: "Unknown value $enableval for --enable-sim-hostendian"" 1>&2; exit 1; }; sim_hostendian="";;
-esac
-if test x"$silent" != x"yes" && test x"$sim_hostendian" != x""; then
- echo "Setting hostendian flags = $sim_hostendian" 6>&1
-fi
-else
-
-if test "x$cross_compiling" = "xno"; then
- echo $ac_n "checking whether byte ordering is bigendian""... $ac_c" 1>&6
-echo "configure:3625: checking whether byte ordering is bigendian" >&5
-if eval "test \"`echo '$''{'ac_cv_c_bigendian'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- ac_cv_c_bigendian=unknown
-# See if sys/param.h defines the BYTE_ORDER macro.
-cat > conftest.$ac_ext <<EOF
-#line 3632 "configure"
-#include "confdefs.h"
-#include <sys/types.h>
-#include <sys/param.h>
-int main() {
-
-#if !BYTE_ORDER || !BIG_ENDIAN || !LITTLE_ENDIAN
- bogus endian macros
-#endif
-; return 0; }
-EOF
-if { (eval echo configure:3643: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
- rm -rf conftest*
- # It does; now see whether it defined to BIG_ENDIAN or not.
-cat > conftest.$ac_ext <<EOF
-#line 3647 "configure"
-#include "confdefs.h"
-#include <sys/types.h>
-#include <sys/param.h>
-int main() {
-
-#if BYTE_ORDER != BIG_ENDIAN
- not big endian
-#endif
-; return 0; }
-EOF
-if { (eval echo configure:3658: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
- rm -rf conftest*
- ac_cv_c_bigendian=yes
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- ac_cv_c_bigendian=no
-fi
-rm -f conftest*
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
-fi
-rm -f conftest*
-if test $ac_cv_c_bigendian = unknown; then
-if test "$cross_compiling" = yes; then
- { echo "configure: error: can not run test program while cross compiling" 1>&2; exit 1; }
-else
- cat > conftest.$ac_ext <<EOF
-#line 3678 "configure"
-#include "confdefs.h"
-main () {
- /* Are we little or big endian? From Harbison&Steele. */
- union
- {
- long l;
- char c[sizeof (long)];
- } u;
- u.l = 1;
- exit (u.c[sizeof (long) - 1] == 1);
-}
-EOF
-if { (eval echo configure:3691: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null
-then
- ac_cv_c_bigendian=no
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -fr conftest*
- ac_cv_c_bigendian=yes
-fi
-rm -fr conftest*
-fi
-
-fi
-fi
-
-echo "$ac_t""$ac_cv_c_bigendian" 1>&6
-if test $ac_cv_c_bigendian = yes; then
- cat >> confdefs.h <<\EOF
-#define WORDS_BIGENDIAN 1
-EOF
-
-fi
-
- if test $ac_cv_c_bigendian = yes; then
- sim_hostendian="-DWITH_HOST_BYTE_ORDER=BIG_ENDIAN"
- else
- sim_hostendian="-DWITH_HOST_BYTE_ORDER=LITTLE_ENDIAN"
- fi
-else
- sim_hostendian="-DWITH_HOST_BYTE_ORDER=0"
-fi
-fi
-
-
-# Check whether --enable-build-warnings or --disable-build-warnings was given.
-if test "${enable_build_warnings+set}" = set; then
- enableval="$enable_build_warnings"
- build_warnings="-Wall -Wpointer-arith -Wstrict-prototypes -Wmissing-prototypes -Wmissing-declarations"
-case "${enableval}" in
- yes) ;;
- no) build_warnings="-w";;
- ,*) t=`echo "${enableval}" | sed -e "s/,/ /g"`
- build_warnings="${build_warnings} ${t}";;
- *,) t=`echo "${enableval}" | sed -e "s/,/ /g"`
- build_warnings="${t} ${build_warnings}";;
- *) build_warnings=`echo "${enableval}" | sed -e "s/,/ /g"`;;
-esac
-if test x"$silent" != x"yes" && test x"$build_warnings" != x""; then
- echo "Setting warning flags = $build_warnings" 6>&1
-fi
-WARN_CFLAGS=""
-WERROR_CFLAGS=""
-if test "x${build_warnings}" != x -a "x$GCC" = xyes
-then
- # Separate out the -Werror flag as some files just cannot be
- # compiled with it enabled.
- for w in ${build_warnings}; do
- case $w in
- -Werr*) WERROR_CFLAGS=-Werror ;;
- *) WARN_CFLAGS="${WARN_CFLAGS} $w"
- esac
- done
-fi
-else
- build_warnings=""
-fi
-
-
-default_sim_reserved_bits="1"
-# Check whether --enable-sim-reserved-bits or --disable-sim-reserved-bits was given.
-if test "${enable_sim_reserved_bits+set}" = set; then
- enableval="$enable_sim_reserved_bits"
- case "${enableval}" in
- yes) sim_reserved_bits="-DWITH_RESERVED_BITS=1";;
- no) sim_reserved_bits="-DWITH_RESERVED_BITS=0";;
- *) { echo "configure: error: "--enable-sim-reserved-bits does not take a value"" 1>&2; exit 1; }; sim_reserved_bits="";;
-esac
-if test x"$silent" != x"yes" && test x"$sim_reserved_bits" != x""; then
- echo "Setting reserved flags = $sim_reserved_bits" 6>&1
-fi
-else
- sim_reserved_bits="-DWITH_RESERVED_BITS=${default_sim_reserved_bits}"
-fi
-
-wire_word_bitsize="32"
-wire_word_msb="31"
-wire_address_bitsize=""
-wire_cell_bitsize=""
-# Check whether --enable-sim-bitsize or --disable-sim-bitsize was given.
-if test "${enable_sim_bitsize+set}" = set; then
- enableval="$enable_sim_bitsize"
- sim_bitsize=
-case "${enableval}" in
- 64,63 | 64,63,* ) sim_bitsize="-DWITH_TARGET_WORD_BITSIZE=64 -DWITH_TARGET_WORD_MSB=63";;
- 32,31 | 32,31,* ) sim_bitsize="-DWITH_TARGET_WORD_BITSIZE=32 -DWITH_TARGET_WORD_MSB=31";;
- 64,0 | 64,0,* ) sim_bitsize="-DWITH_TARGET_WORD_BITSIZE=32 -DWITH_TARGET_WORD_MSB=0";;
- 32,0 | 64,0,* ) sim_bitsize="-DWITH_TARGET_WORD_BITSIZE=32 -DWITH_TARGET_WORD_MSB=0";;
- 32) if test x"$wire_word_msb" != x -a x"$wire_word_msb" != x0; then
- sim_bitsize="-DWITH_TARGET_WORD_BITSIZE=32 -DWITH_TARGET_WORD_MSB=31"
- else
- sim_bitsize="-DWITH_TARGET_WORD_BITSIZE=32 -DWITH_TARGET_WORD_MSB=0"
- fi ;;
- 64) if test x"$wire_word_msb" != x -a x"$wire_word_msb" != x0; then
- sim_bitsize="-DWITH_TARGET_WORD_BITSIZE=64 -DWITH_TARGET_WORD_MSB=63"
- else
- sim_bitsize="-DWITH_TARGET_WORD_BITSIZE=64 -DWITH_TARGET_WORD_MSB=0"
- fi ;;
- *) { echo "configure: error: "--enable-sim-bitsize was given $enableval. Expected 32 or 64"" 1>&2; exit 1; } ;;
-esac
-# address bitsize
-tmp=`echo "${enableval}" | sed -e "s/^[0-9]*,*[0-9]*,*//"`
-case x"${tmp}" in
- x ) ;;
- x32 | x32,* ) sim_bitsize="${sim_bitsize} -DWITH_TARGET_ADDRESS_BITSIZE=32" ;;
- x64 | x64,* ) sim_bitsize="${sim_bitsize} -DWITH_TARGET_ADDRESS_BITSIZE=64" ;;
- * ) { echo "configure: error: "--enable-sim-bitsize was given address size $enableval. Expected 32 or 64"" 1>&2; exit 1; } ;;
-esac
-# cell bitsize
-tmp=`echo "${enableval}" | sed -e "s/^[0-9]*,*[0-9*]*,*[0-9]*,*//"`
-case x"${tmp}" in
- x ) ;;
- x32 | x32,* ) sim_bitsize="${sim_bitsize} -DWITH_TARGET_CELL_BITSIZE=32" ;;
- x64 | x64,* ) sim_bitsize="${sim_bitsize} -DWITH_TARGET_CELL_BITSIZE=64" ;;
- * ) { echo "configure: error: "--enable-sim-bitsize was given cell size $enableval. Expected 32 or 64"" 1>&2; exit 1; } ;;
-esac
-if test x"$silent" != x"yes" && test x"$sim_bitsize" != x""; then
- echo "Setting bitsize flags = $sim_bitsize" 6>&1
-fi
-else
- sim_bitsize=""
-if test x"$wire_word_bitsize" != x; then
- sim_bitsize="$sim_bitsize -DWITH_TARGET_WORD_BITSIZE=$wire_word_bitsize"
-fi
-if test x"$wire_word_msb" != x; then
- sim_bitsize="$sim_bitsize -DWITH_TARGET_WORD_MSB=$wire_word_msb"
-fi
-if test x"$wire_address_bitsize" != x; then
- sim_bitsize="$sim_bitsize -DWITH_TARGET_ADDRESS_BITSIZE=$wire_address_bitsize"
-fi
-if test x"$wire_cell_bitsize" != x; then
- sim_bitsize="$sim_bitsize -DWITH_TARGET_CELL_BITSIZE=$wire_cell_bitsize"
-fi
-fi
-
-
-default_sim_inline=""
-# Check whether --enable-sim-inline or --disable-sim-inline was given.
-if test "${enable_sim_inline+set}" = set; then
- enableval="$enable_sim_inline"
- sim_inline=""
-case "$enableval" in
- no) sim_inline="-DDEFAULT_INLINE=0";;
- 0) sim_inline="-DDEFAULT_INLINE=0";;
- yes | 2) sim_inline="-DDEFAULT_INLINE=ALL_C_INLINE";;
- 1) sim_inline="-DDEFAULT_INLINE=INLINE_LOCALS";;
- *) for x in `echo "$enableval" | sed -e "s/,/ /g"`; do
- new_flag=""
- case "$x" in
- *_INLINE=*) new_flag="-D$x";;
- *=*) new_flag=`echo "$x" | sed -e "s/=/_INLINE=/" -e "s/^/-D/"`;;
- *_INLINE) new_flag="-D$x=ALL_C_INLINE";;
- *) new_flag="-D$x""_INLINE=ALL_C_INLINE";;
- esac
- if test x"$sim_inline" = x""; then
- sim_inline="$new_flag"
- else
- sim_inline="$sim_inline $new_flag"
- fi
- done;;
-esac
-if test x"$silent" != x"yes" && test x"$sim_inline" != x""; then
- echo "Setting inline flags = $sim_inline" 6>&1
-fi
-else
-
-if test "x$cross_compiling" = "xno"; then
- if test x"$GCC" != "x" -a x"${default_sim_inline}" != "x" ; then
- sim_inline="${default_sim_inline}"
- if test x"$silent" != x"yes"; then
- echo "Setting inline flags = $sim_inline" 6>&1
- fi
- else
- sim_inline=""
- fi
-else
- sim_inline="-DDEFAULT_INLINE=0"
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-fi
-
-
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- sim_hw_p=no
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-else
- hardware="core pal glue mn103cpu mn103int mn103tim mn103ser mn103iop"
-fi
-sim_hw_cflags="-DWITH_HW=1"
-sim_hw="$hardware"
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-# Check whether --enable-sim-hardware or --disable-sim-hardware was given.
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-
-case "${enableval}" in
- yes) sim_hw_p=yes;;
- no) sim_hw_p=no;;
- ,*) sim_hw_p=yes; hardware="${hardware} `echo ${enableval} | sed -e 's/,/ /'`";;
- *,) sim_hw_p=yes; hardware="`echo ${enableval} | sed -e 's/,/ /'` ${hardware}";;
- *) sim_hw_p=yes; hardware="`echo ${enableval} | sed -e 's/,/ /'`"'';;
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- sim_hw=
-else
- sim_hw_cflags="-DWITH_HW=1"
- # remove duplicates
- sim_hw=""
- sim_hw_objs="\$(SIM_COMMON_HW_OBJS)"
- for i in x $hardware ; do
- case " $f " in
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- *" $i "*) ;;
- *) sim_hw="$sim_hw $i" ; sim_hw_objs="$sim_hw_objs dv-$i.o";;
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-fi
-else
-
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- sim_hw_objs=
- sim_hw_cflags="-DWITH_HW=0"
- sim_hw=
-fi
-if test x"$silent" != x"yes"; then
- echo "Setting hardware to $sim_hw_cflags, $sim_hw, $sim_hw_objs"
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-fi
-
-
-for ac_func in time chmod utime fork execve execv chown
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- cat > conftest.$ac_ext <<EOF
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-char $ac_func();
-
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-choke me
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-$ac_func();
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-
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- eval "ac_cv_func_$ac_func=yes"
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- echo "configure: failed program was:" >&5
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- rm -rf conftest*
- eval "ac_cv_func_$ac_func=no"
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-
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- ac_tr_func=HAVE_`echo $ac_func | tr 'abcdefghijklmnopqrstuvwxyz' 'ABCDEFGHIJKLMNOPQRSTUVWXYZ'`
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- echo "$ac_t""no" 1>&6
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-done
-
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-echo "configure:3997: checking for $ac_hdr" >&5
-if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then
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- eval "ac_cv_header_$ac_safe=yes"
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-fi
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- sim_gen="-DWITH_COMMON=1"; mn10300_common="WITH"
-fi
-
-
-
-
-
-trap '' 1 2 15
-cat > confcache <<\EOF
-# This file is a shell script that caches the results of configure
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-#
-# By default, configure uses ./config.cache as the cache file,
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-# the --cache-file=FILE option to use a different cache file; that is
-# what configure does when it calls configure scripts in
-# subdirectories, so they share the cache.
-# Giving --cache-file=/dev/null disables caching, for debugging configure.
-# config.status only pays attention to the cache file if you give it the
-# --recheck option to rerun configure.
-#
-EOF
-# The following way of writing the cache mishandles newlines in values,
-# but we know of no workaround that is simple, portable, and efficient.
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-(set) 2>&1 |
- case `(ac_space=' '; set | grep ac_space) 2>&1` in
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- # `set' does not quote correctly, so add quotes (double-quote substitution
- # turns \\\\ into \\, and sed turns \\ into \).
- sed -n \
- -e "s/'/'\\\\''/g" \
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- ;;
- *)
- # `set' quotes correctly as required by POSIX, so do not add quotes.
- sed -n -e 's/^\([a-zA-Z0-9_]*_cv_[a-zA-Z0-9_]*\)=\(.*\)/\1=${\1=\2}/p'
- ;;
- esac >> confcache
-if cmp -s $cache_file confcache; then
- :
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- if test -w $cache_file; then
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- cat confcache > $cache_file
- else
- echo "not updating unwritable cache $cache_file"
- fi
-fi
-rm -f confcache
-
-trap 'rm -fr conftest* confdefs* core core.* *.core $ac_clean_files; exit 1' 1 2 15
-
-test "x$prefix" = xNONE && prefix=$ac_default_prefix
-# Let make expand exec_prefix.
-test "x$exec_prefix" = xNONE && exec_prefix='${prefix}'
-
-# Any assignment to VPATH causes Sun make to only execute
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-if test "x$srcdir" = x.; then
- ac_vpsub='/^[ ]*VPATH[ ]*=[^:]*$/d'
-fi
-
-trap 'rm -f $CONFIG_STATUS conftest*; exit 1' 1 2 15
-
-DEFS=-DHAVE_CONFIG_H
-
-# Without the "./", some shells look in PATH for config.status.
-: ${CONFIG_STATUS=./config.status}
-
-echo creating $CONFIG_STATUS
-rm -f $CONFIG_STATUS
-cat > $CONFIG_STATUS <<EOF
-#! /bin/sh
-# Generated automatically by configure.
-# Run this file to recreate the current configuration.
-# This directory was configured as follows,
-# on host `(hostname || uname -n) 2>/dev/null | sed 1q`:
-#
-# $0 $ac_configure_args
-#
-# Compiler output produced by configure, useful for debugging
-# configure, is in ./config.log if it exists.
-
-ac_cs_usage="Usage: $CONFIG_STATUS [--recheck] [--version] [--help]"
-for ac_option
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- case "\$ac_option" in
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- echo "running \${CONFIG_SHELL-/bin/sh} $0 $ac_configure_args --no-create --no-recursion"
- exec \${CONFIG_SHELL-/bin/sh} $0 $ac_configure_args --no-create --no-recursion ;;
- -version | --version | --versio | --versi | --vers | --ver | --ve | --v)
- echo "$CONFIG_STATUS generated by autoconf version 2.13"
- exit 0 ;;
- -help | --help | --hel | --he | --h)
- echo "\$ac_cs_usage"; exit 0 ;;
- *) echo "\$ac_cs_usage"; exit 1 ;;
- esac
-done
-
-ac_given_srcdir=$srcdir
-ac_given_INSTALL="$INSTALL"
-
-trap 'rm -fr `echo "Makefile.sim:Makefile.in Make-common.sim:../common/Make-common.in .gdbinit:../common/gdbinit.in config.h:config.in" | sed "s/:[^ ]*//g"` conftest*; exit 1' 1 2 15
-EOF
-cat >> $CONFIG_STATUS <<EOF
-
-# Protect against being on the right side of a sed subst in config.status.
-sed 's/%@/@@/; s/@%/@@/; s/%g\$/@g/; /@g\$/s/[\\\\&%]/\\\\&/g;
- s/@@/%@/; s/@@/@%/; s/@g\$/%g/' > conftest.subs <<\\CEOF
-$ac_vpsub
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-s%@sim_alignment@%$sim_alignment%g
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-s%@sim_float@%$sim_float%g
-s%@sim_scache@%$sim_scache%g
-s%@sim_default_model@%$sim_default_model%g
-s%@sim_hw_cflags@%$sim_hw_cflags%g
-s%@sim_hw_objs@%$sim_hw_objs%g
-s%@sim_hw@%$sim_hw%g
-s%@sim_inline@%$sim_inline%g
-s%@sim_packages@%$sim_packages%g
-s%@sim_regparm@%$sim_regparm%g
-s%@sim_reserved_bits@%$sim_reserved_bits%g
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-s%@CFLAGS@%$CFLAGS%g
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-s%@datadir@%$datadir%g
-s%@sysconfdir@%$sysconfdir%g
-s%@sharedstatedir@%$sharedstatedir%g
-s%@localstatedir@%$localstatedir%g
-s%@libdir@%$libdir%g
-s%@includedir@%$includedir%g
-s%@oldincludedir@%$oldincludedir%g
-s%@infodir@%$infodir%g
-s%@mandir@%$mandir%g
-s%@host@%$host%g
-s%@host_alias@%$host_alias%g
-s%@host_cpu@%$host_cpu%g
-s%@host_vendor@%$host_vendor%g
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-s%@target@%$target%g
-s%@target_alias@%$target_alias%g
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-s%@target_os@%$target_os%g
-s%@build@%$build%g
-s%@build_alias@%$build_alias%g
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-s%@build_vendor@%$build_vendor%g
-s%@build_os@%$build_os%g
-s%@CC@%$CC%g
-s%@INSTALL_PROGRAM@%$INSTALL_PROGRAM%g
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-
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-cat >> $CONFIG_STATUS <<EOF
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-CONFIG_FILES=\${CONFIG_FILES-"Makefile.sim:Makefile.in Make-common.sim:../common/Make-common.in .gdbinit:../common/gdbinit.in"}
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- # Support "outfile[:infile[:infile...]]", defaulting infile="outfile.in".
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- *:*) ac_file_in=`echo "$ac_file"|sed 's%[^:]*:%%'`
- ac_file=`echo "$ac_file"|sed 's%:.*%%'` ;;
- *) ac_file_in="${ac_file}.in" ;;
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- configure_input="Generated automatically from `echo $ac_file_in|sed 's%.*/%%'` by configure."
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- *) ac_comsub= ;;
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- ac_file_inputs=`echo $ac_file_in|sed -e "s%^%$ac_given_srcdir/%" -e "s%:% $ac_given_srcdir/%g"`
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-" $ac_file_inputs | (eval "$ac_sed_cmds") > $ac_file
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-
-if test "${CONFIG_HEADERS+set}" != set; then
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-cat >> $CONFIG_STATUS <<EOF
- CONFIG_HEADERS="config.h:config.in"
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-
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- rm -f conftest.frag conftest.in conftest.out
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-
-EOF
-
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-cat > conftest.hdr <<\EOF
-s/[\\&%]/\\&/g
-s%[\\$`]%\\&%g
-s%#define \([A-Za-z_][A-Za-z0-9_]*\) *\(.*\)%${ac_dA}\1${ac_dB}\1${ac_dC}\2${ac_dD}%gp
-s%ac_d%ac_u%gp
-s%ac_u%ac_e%gp
-EOF
-sed -n -f conftest.hdr confdefs.h > conftest.vals
-rm -f conftest.hdr
-
-# This sed command replaces #undef with comments. This is necessary, for
-# example, in the case of _POSIX_SOURCE, which is predefined and required
-# on some systems where configure will not decide to define it.
-cat >> conftest.vals <<\EOF
-s%^[ ]*#[ ]*undef[ ][ ]*[a-zA-Z_][a-zA-Z_0-9]*%/* & */%
-EOF
-
-# Break up conftest.vals because some shells have a limit on
-# the size of here documents, and old seds have small limits too.
-
-rm -f conftest.tail
-while :
-do
- ac_lines=`grep -c . conftest.vals`
- # grep -c gives empty output for an empty file on some AIX systems.
- if test -z "$ac_lines" || test "$ac_lines" -eq 0; then break; fi
- # Write a limited-size here document to conftest.frag.
- echo ' cat > conftest.frag <<CEOF' >> $CONFIG_STATUS
- sed ${ac_max_here_lines}q conftest.vals >> $CONFIG_STATUS
- echo 'CEOF
- sed -f conftest.frag conftest.in > conftest.out
- rm -f conftest.in
- mv conftest.out conftest.in
-' >> $CONFIG_STATUS
- sed 1,${ac_max_here_lines}d conftest.vals > conftest.tail
- rm -f conftest.vals
- mv conftest.tail conftest.vals
-done
-rm -f conftest.vals
-
-cat >> $CONFIG_STATUS <<\EOF
- rm -f conftest.frag conftest.h
- echo "/* $ac_file. Generated automatically by configure. */" > conftest.h
- cat conftest.in >> conftest.h
- rm -f conftest.in
- if cmp -s $ac_file conftest.h 2>/dev/null; then
- echo "$ac_file is unchanged"
- rm -f conftest.h
- else
- # Remove last slash and all that follows it. Not all systems have dirname.
- ac_dir=`echo $ac_file|sed 's%/[^/][^/]*$%%'`
- if test "$ac_dir" != "$ac_file" && test "$ac_dir" != .; then
- # The file is in a subdirectory.
- test ! -d "$ac_dir" && mkdir "$ac_dir"
- fi
- rm -f $ac_file
- mv conftest.h $ac_file
- fi
-fi; done
-
-EOF
-
-cat >> $CONFIG_STATUS <<EOF
-ac_sources="$sim_link_files"
-ac_dests="$sim_link_links"
-EOF
-
-cat >> $CONFIG_STATUS <<\EOF
-srcdir=$ac_given_srcdir
-while test -n "$ac_sources"; do
- set $ac_dests; ac_dest=$1; shift; ac_dests=$*
- set $ac_sources; ac_source=$1; shift; ac_sources=$*
-
- echo "linking $srcdir/$ac_source to $ac_dest"
-
- if test ! -r $srcdir/$ac_source; then
- { echo "configure: error: $srcdir/$ac_source: File not found" 1>&2; exit 1; }
- fi
- rm -f $ac_dest
-
- # Make relative symlinks.
- # Remove last slash and all that follows it. Not all systems have dirname.
- ac_dest_dir=`echo $ac_dest|sed 's%/[^/][^/]*$%%'`
- if test "$ac_dest_dir" != "$ac_dest" && test "$ac_dest_dir" != .; then
- # The dest file is in a subdirectory.
- test ! -d "$ac_dest_dir" && mkdir "$ac_dest_dir"
- ac_dest_dir_suffix="/`echo $ac_dest_dir|sed 's%^\./%%'`"
- # A "../" for each directory in $ac_dest_dir_suffix.
- ac_dots=`echo $ac_dest_dir_suffix|sed 's%/[^/]*%../%g'`
- else
- ac_dest_dir_suffix= ac_dots=
- fi
-
- case "$srcdir" in
- [/$]*) ac_rel_source="$srcdir/$ac_source" ;;
- *) ac_rel_source="$ac_dots$srcdir/$ac_source" ;;
- esac
-
- # Make a symlink if possible; otherwise try a hard link.
- if ln -s $ac_rel_source $ac_dest 2>/dev/null ||
- ln $srcdir/$ac_source $ac_dest; then :
- else
- { echo "configure: error: can not link $ac_dest to $srcdir/$ac_source" 1>&2; exit 1; }
- fi
-done
-EOF
-cat >> $CONFIG_STATUS <<EOF
-
-EOF
-cat >> $CONFIG_STATUS <<\EOF
-case "x$CONFIG_FILES" in
- xMakefile*)
- echo "Merging Makefile.sim+Make-common.sim into Makefile ..."
- rm -f Makesim1.tmp Makesim2.tmp Makefile
- sed -n -e '/^## COMMON_PRE_/,/^## End COMMON_PRE_/ p' <Make-common.sim >Makesim1.tmp
- sed -n -e '/^## COMMON_POST_/,/^## End COMMON_POST_/ p' <Make-common.sim >Makesim2.tmp
- sed -e '/^## COMMON_PRE_/ r Makesim1.tmp' \
- -e '/^## COMMON_POST_/ r Makesim2.tmp' \
- <Makefile.sim >Makefile
- rm -f Makefile.sim Make-common.sim Makesim1.tmp Makesim2.tmp
- ;;
- esac
- case "x$CONFIG_HEADERS" in xconfig.h:config.in) echo > stamp-h ;; esac
-
-exit 0
-EOF
-chmod +x $CONFIG_STATUS
-rm -fr confdefs* $ac_clean_files
-test "$no_create" = yes || ${CONFIG_SHELL-/bin/sh} $CONFIG_STATUS || exit 1
-
-
diff --git a/sim/mn10300/configure.in b/sim/mn10300/configure.in
deleted file mode 100644
index 8160609d690..00000000000
--- a/sim/mn10300/configure.in
+++ /dev/null
@@ -1,37 +0,0 @@
-dnl Process this file with autoconf to produce a configure script.
-sinclude(../common/aclocal.m4)
-dnl 2.12 botches SHELL substitution
-AC_PREREQ(2.12.1)dnl
-AC_INIT(Makefile.in)
-
-SIM_AC_COMMON
-
-SIM_AC_OPTION_ENDIAN(LITTLE_ENDIAN)
-SIM_AC_OPTION_ALIGNMENT(NONSTRICT_ALIGNMENT)
-SIM_AC_OPTION_HOSTENDIAN
-SIM_AC_OPTION_WARNINGS
-SIM_AC_OPTION_RESERVED_BITS
-SIM_AC_OPTION_BITSIZE(32,31)
-SIM_AC_OPTION_INLINE()
-SIM_AC_OPTION_HARDWARE(yes,,mn103cpu mn103int mn103tim mn103ser mn103iop)
-
-AC_CHECK_FUNCS(time chmod utime fork execve execv chown)
-AC_CHECK_HEADERS(unistd.h stdlib.h string.h strings.h utime.h time.h)
-
-#
-# Enable common
-#
-AC_ARG_ENABLE(sim-common,
-[ --enable-sim-common Enable common simulator],
-[case "${enableval}" in
- yes) sim_gen="-DWITH_COMMON=1"; mn10300_common="WITH";;
- no) sim_gen="-DWITH_COMMON=0"; mn10300_common="WITHOUT";;
- *) AC_MSG_ERROR("Unknown value $enableval passed to --enable-sim-common"); sim_gen="";;
-esac
-if test x"$silent" != x"yes" && test x"$sim_gen" != x""; then
- echo "Setting sim_common = $sim_common" 6>&1
-fi],[sim_gen="-DWITH_COMMON=1"; mn10300_common="WITH"])dnl
-AC_SUBST(sim_gen)
-AC_SUBST(mn10300_common)
-
-SIM_AC_OUTPUT
diff --git a/sim/mn10300/dv-mn103cpu.c b/sim/mn10300/dv-mn103cpu.c
deleted file mode 100644
index 17245a24b5a..00000000000
--- a/sim/mn10300/dv-mn103cpu.c
+++ /dev/null
@@ -1,431 +0,0 @@
-/* This file is part of the program GDB, the GNU debugger.
-
- Copyright (C) 1998 Free Software Foundation, Inc.
- Contributed by Cygnus Solutions.
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-#include "sim-main.h"
-#include "hw-main.h"
-
-/* DEVICE
-
-
- mn103cpu - mn10300 cpu virtual device
-
-
- DESCRIPTION
-
-
- Implements the external mn10300 functionality. This includes the
- delivery of interrupts generated from other devices and the
- handling of device specific registers.
-
-
- PROPERTIES
-
-
- reg = <address> <size>
-
- Specify the address of the mn10300's control register block. This
- block contains the Interrupt Vector Registers.
-
- The reg property value `0x20000000 0x42' locates the register block
- at the address specified in the mn10300 user guide.
-
-
- PORTS
-
-
- reset (input)
-
- Currently ignored.
-
-
- nmi (input)
-
- Deliver a non-maskable interrupt to the processor.
-
-
- level (input)
-
- Maskable interrupt level port port. The interrupt controller
- notifies the processor of any change in the level of pending
- requested interrupts via this port.
-
-
- ack (output)
-
- Output signal indicating that the processor is delivering a level
- interrupt. The value passed with the event specifies the level of
- the interrupt being delivered.
-
-
- BUGS
-
-
- When delivering an interrupt, this code assumes that there is only
- one processor (number 0).
-
- This code does not attempt to be efficient at handling pending
- interrupts. It simply schedules the interrupt delivery handler
- every instruction cycle until all pending interrupts go away. An
- alternative implementation might modify instructions that change
- the PSW and have them check to see if the change makes an interrupt
- delivery possible.
-
- */
-
-
-/* The interrupt vectors */
-
-enum { NR_VECTORS = 7, };
-
-
-/* The interrupt controller register address blocks */
-
-struct mn103cpu_block {
- unsigned_word base;
- unsigned_word bound;
-};
-
-
-struct mn103cpu {
- struct mn103cpu_block block;
- struct hw_event *pending_handler;
- int pending_level;
- int pending_nmi;
- int pending_reset;
- /* the visible registers */
- unsigned16 interrupt_vector[NR_VECTORS];
- unsigned16 internal_memory_control;
- unsigned16 cpu_mode;
-};
-
-
-
-/* input port ID's */
-
-enum {
- RESET_PORT,
- NMI_PORT,
- LEVEL_PORT,
-};
-
-
-/* output port ID's */
-
-enum {
- ACK_PORT,
-};
-
-static const struct hw_port_descriptor mn103cpu_ports[] = {
-
- /* interrupt inputs */
- { "reset", RESET_PORT, 0, input_port, },
- { "nmi", NMI_PORT, 0, input_port, },
- { "level", LEVEL_PORT, 0, input_port, },
-
- /* interrupt ack (latch) output from cpu */
- { "ack", ACK_PORT, 0, output_port, },
-
- { NULL, },
-};
-
-
-/* Finish off the partially created hw device. Attach our local
- callbacks. Wire up our port names etc */
-
-static hw_io_read_buffer_method mn103cpu_io_read_buffer;
-static hw_io_write_buffer_method mn103cpu_io_write_buffer;
-static hw_port_event_method mn103cpu_port_event;
-
-static void
-attach_mn103cpu_regs (struct hw *me,
- struct mn103cpu *controller)
-{
- unsigned_word attach_address;
- int attach_space;
- unsigned attach_size;
- reg_property_spec reg;
- if (hw_find_property (me, "reg") == NULL)
- hw_abort (me, "Missing \"reg\" property");
- if (!hw_find_reg_array_property (me, "reg", 0, &reg))
- hw_abort (me, "\"reg\" property must contain three addr/size entries");
- hw_unit_address_to_attach_address (hw_parent (me),
- &reg.address,
- &attach_space,
- &attach_address,
- me);
- controller->block.base = attach_address;
- hw_unit_size_to_attach_size (hw_parent (me),
- &reg.size,
- &attach_size, me);
- controller->block.bound = attach_address + (attach_size - 1);
- if ((controller->block.base & 3) != 0)
- hw_abort (me, "cpu register block must be 4 byte aligned");
- hw_attach_address (hw_parent (me),
- 0,
- attach_space, attach_address, attach_size,
- me);
-}
-
-
-static void
-mn103cpu_finish (struct hw *me)
-{
- struct mn103cpu *controller;
-
- controller = HW_ZALLOC (me, struct mn103cpu);
- set_hw_data (me, controller);
- set_hw_io_read_buffer (me, mn103cpu_io_read_buffer);
- set_hw_io_write_buffer (me, mn103cpu_io_write_buffer);
- set_hw_ports (me, mn103cpu_ports);
- set_hw_port_event (me, mn103cpu_port_event);
-
- /* Attach ourself to our parent bus */
- attach_mn103cpu_regs (me, controller);
-
- /* Initialize the read-only registers */
- controller->pending_level = 7; /* FIXME */
- /* ... */
-}
-
-
-
-/* An event arrives on an interrupt port */
-
-static void
-deliver_mn103cpu_interrupt (struct hw *me,
- void *data)
-{
- struct mn103cpu *controller = hw_data (me);
- SIM_DESC simulator = hw_system (me);
- sim_cpu *cpu = STATE_CPU (simulator, 0);
-
- if (controller->pending_reset)
- {
- controller->pending_reset = 0;
- /* need to clear all registers et.al! */
- HW_TRACE ((me, "Reset!"));
- hw_abort (me, "Reset!");
- }
- else if (controller->pending_nmi)
- {
- controller->pending_nmi = 0;
- store_word (SP - 4, CIA_GET (cpu));
- store_half (SP - 8, PSW);
- PSW &= ~PSW_IE;
- SP = SP - 8;
- CIA_SET (cpu, 0x40000008);
- HW_TRACE ((me, "nmi pc=0x%08lx psw=0x%04x sp=0x%08lx",
- (long) CIA_GET (cpu), (unsigned) PSW, (long) SP));
- }
- else if ((controller->pending_level < EXTRACT_PSW_LM)
- && (PSW & PSW_IE))
- {
- /* Don't clear pending level. Request continues to be pending
- until the interrupt controller clears/changes it */
- store_word (SP - 4, CIA_GET (cpu));
- store_half (SP - 8, PSW);
- PSW &= ~PSW_IE;
- PSW &= ~PSW_LM;
- PSW |= INSERT_PSW_LM (controller->pending_level);
- SP = SP - 8;
- CIA_SET (cpu, 0x40000000 + controller->interrupt_vector[controller->pending_level]);
- HW_TRACE ((me, "port-out ack %d", controller->pending_level));
- hw_port_event (me, ACK_PORT, controller->pending_level);
- HW_TRACE ((me, "int level=%d pc=0x%08lx psw=0x%04x sp=0x%08lx",
- controller->pending_level,
- (long) CIA_GET (cpu), (unsigned) PSW, (long) SP));
- }
-
- if (controller->pending_level < 7) /* FIXME */
- {
- /* As long as there is the potential need to deliver an
- interrupt we keep rescheduling this routine. */
- if (controller->pending_handler != NULL)
- controller->pending_handler =
- hw_event_queue_schedule (me, 1, deliver_mn103cpu_interrupt, NULL);
- }
- else
- {
- /* Don't bother re-scheduling the interrupt handler as there is
- nothing to deliver */
- controller->pending_handler = NULL;
- }
-
-}
-
-
-static void
-mn103cpu_port_event (struct hw *me,
- int my_port,
- struct hw *source,
- int source_port,
- int level)
-{
- struct mn103cpu *controller = hw_data (me);
-
- /* Schedule our event handler *now* */
- if (controller->pending_handler == NULL)
- controller->pending_handler =
- hw_event_queue_schedule (me, 0, deliver_mn103cpu_interrupt, NULL);
-
- switch (my_port)
- {
-
- case RESET_PORT:
- controller->pending_reset = 1;
- HW_TRACE ((me, "port-in reset"));
- break;
-
- case NMI_PORT:
- controller->pending_nmi = 1;
- HW_TRACE ((me, "port-in nmi"));
- break;
-
- case LEVEL_PORT:
- controller->pending_level = level;
- HW_TRACE ((me, "port-in level=%d", level));
- break;
-
- default:
- hw_abort (me, "bad switch");
- break;
-
- }
-}
-
-
-/* Read/write to a CPU register */
-
-enum mn103cpu_regs {
- INVALID_REG,
- IVR0_REG,
- IVR1_REG,
- IVR2_REG,
- IVR3_REG,
- IVR4_REG,
- IVR5_REG,
- IVR6_REG,
- IMCR_REG,
- CPUM_REG,
-};
-
-static enum mn103cpu_regs
-decode_mn103cpu_addr (struct hw *me,
- struct mn103cpu *controller,
- unsigned_word base)
-{
- switch (base - controller->block.base)
- {
- case 0x000: return IVR0_REG;
- case 0x004: return IVR1_REG;
- case 0x008: return IVR2_REG;
- case 0x00c: return IVR3_REG;
- case 0x010: return IVR4_REG;
- case 0x014: return IVR5_REG;
- case 0x018: return IVR6_REG;
- case 0x020: return IMCR_REG;
- case 0x040: return CPUM_REG;
- default: return INVALID_REG;
- }
-}
-
-static unsigned
-mn103cpu_io_read_buffer (struct hw *me,
- void *dest,
- int space,
- unsigned_word base,
- unsigned nr_bytes)
-{
- struct mn103cpu *controller = hw_data (me);
- unsigned16 val = 0;
- enum mn103cpu_regs reg = decode_mn103cpu_addr (me, controller, base);
-
- switch (reg)
- {
- case IVR0_REG:
- case IVR1_REG:
- case IVR2_REG:
- case IVR3_REG:
- case IVR4_REG:
- case IVR5_REG:
- case IVR6_REG:
- val = controller->interrupt_vector[reg - IVR0_REG];
- break;
- case IMCR_REG:
- val = controller->internal_memory_control;
- break;
- case CPUM_REG:
- val = controller->cpu_mode;
- break;
- default:
- /* just ignore the read */
- break;
- }
-
- if (nr_bytes == 2)
- *(unsigned16*) dest = H2LE_2 (val);
-
- return nr_bytes;
-}
-
-static unsigned
-mn103cpu_io_write_buffer (struct hw *me,
- const void *source,
- int space,
- unsigned_word base,
- unsigned nr_bytes)
-{
- struct mn103cpu *controller = hw_data (me);
- unsigned16 val;
- enum mn103cpu_regs reg;
-
- if (nr_bytes != 2)
- hw_abort (me, "must be two byte write");
-
- reg = decode_mn103cpu_addr (me, controller, base);
- val = LE2H_2 (* (unsigned16 *) source);
-
- switch (reg)
- {
- case IVR0_REG:
- case IVR1_REG:
- case IVR2_REG:
- case IVR3_REG:
- case IVR4_REG:
- case IVR5_REG:
- case IVR6_REG:
- controller->interrupt_vector[reg - IVR0_REG] = val;
- HW_TRACE ((me, "ivr%d = 0x%04lx", reg - IVR0_REG, (long) val));
- break;
- default:
- /* just ignore the write */
- break;
- }
-
- return nr_bytes;
-}
-
-
-const struct hw_descriptor dv_mn103cpu_descriptor[] = {
- { "mn103cpu", mn103cpu_finish, },
- { NULL },
-};
diff --git a/sim/mn10300/dv-mn103int.c b/sim/mn10300/dv-mn103int.c
deleted file mode 100644
index d64e0074a1d..00000000000
--- a/sim/mn10300/dv-mn103int.c
+++ /dev/null
@@ -1,831 +0,0 @@
-/* This file is part of the program GDB, the GNU debugger.
-
- Copyright (C) 1998 Free Software Foundation, Inc.
- Contributed by Cygnus Solutions.
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-#include "sim-main.h"
-#include "hw-main.h"
-#include "sim-hw.h"
-
-/* DEVICE
-
-
- mn103int - mn103002 interrupt controller
-
-
- DESCRIPTION
-
-
- Implements the mn103002 interrupt controller described in the
- mn103002 user guide.
-
-
- PROPERTIES
-
-
- reg = <icr-adr> <icr-siz> <iagr-adr> <iadr-siz> <extmd-adr> <extmd-siz>
-
- Specify the address of the ICR (total of 30 registers), IAGR and
- EXTMD registers (within the parent bus).
-
- The reg property value `0x34000100 0x7C 0x34000200 0x8 0x3400280
- 0x8' locates the interrupt controller at the addresses specified in
- the mn103002 interrupt controller user guide.
-
-
- PORTS
-
-
- nmi (output)
-
- Non-maskable interrupt output port. An event on this output ports
- indicates a NMI request from the interrupt controller. The value
- attached to the event should be ignored.
-
-
- level (output)
-
- Maskable interrupt level output port. An event on this output port
- indicates a maskable interrupt request at the specified level. The
- event value defines the level being requested.
-
- The interrupt controller will generate an event on this port
- whenever there is a change to the internal state of the interrupt
- controller.
-
-
- ack (input)
-
- Signal from processor indicating that a maskable interrupt has been
- accepted and the interrupt controller should latch the IAGR with
- value of the current highest priority interrupting group.
-
- The event value is the interrupt level being accepted by the
- processor. It should be consistent with the most recent LEVEL sent
- to the processor from the interrupt controller.
-
-
- int[0..100] (input)
-
- Level or edge triggered interrupt input port. Each of the 30
- groups (0..30) can have up to 4 (0..3) interrupt inputs. The
- interpretation of a port event/value is determined by the
- configuration of the corresponding interrupt group.
-
- For convenience, numerous aliases to these interrupt inputs are
- provided.
-
-
- BUGS
-
-
- For edge triggered interrupts, the interrupt controller does not
- differentiate between POSITIVE (rising) and NEGATIVE (falling)
- edges. Instead any input port event is considered to be an
- interrupt trigger.
-
- For level sensitive interrupts, the interrupt controller ignores
- active HIGH/LOW settings and instead always interprets a nonzero
- port value as an interrupt assertion and a zero port value as a
- negation.
-
- */
-
-
-/* The interrupt groups - numbered according to mn103002 convention */
-
-enum mn103int_trigger {
- ACTIVE_LOW,
- ACTIVE_HIGH,
- POSITIVE_EDGE,
- NEGATIVE_EDGE,
-};
-
-enum mn103int_type {
- NMI_GROUP,
- LEVEL_GROUP,
-};
-
-struct mn103int_group {
- int gid;
- int level;
- unsigned enable;
- unsigned request;
- unsigned input;
- enum mn103int_trigger trigger;
- enum mn103int_type type;
-};
-
-enum {
- FIRST_NMI_GROUP = 0,
- LAST_NMI_GROUP = 1,
- FIRST_LEVEL_GROUP = 2,
- LAST_LEVEL_GROUP = 30,
- NR_GROUPS,
-};
-
-enum {
- LOWEST_LEVEL = 7,
-};
-
-/* The interrupt controller register address blocks */
-
-struct mn103int_block {
- unsigned_word base;
- unsigned_word bound;
-};
-
-enum { ICR_BLOCK, IAGR_BLOCK, EXTMD_BLOCK, NR_BLOCKS };
-
-
-struct mn103int {
- struct mn103int_block block[NR_BLOCKS];
- struct mn103int_group group[NR_GROUPS];
- unsigned interrupt_accepted_group;
-};
-
-
-
-/* output port ID's */
-
-enum {
- NMI_PORT,
- LEVEL_PORT,
-};
-
-
-/* input port ID's */
-
-enum {
- G0_PORT = 0,
- G1_PORT = 4,
- G2_PORT = 8,
- G3_PORT = 12,
- G4_PORT = 16,
- G5_PORT = 20,
- G6_PORT = 24,
- G7_PORT = 28,
- G8_PORT = 32,
- G9_PORT = 36,
- G10_PORT = 40,
- G11_PORT = 44,
- G12_PORT = 48,
- G13_PORT = 52,
- G14_PORT = 56,
- G15_PORT = 60,
- G16_PORT = 64,
- G17_PORT = 68,
- G18_PORT = 72,
- G19_PORT = 76,
- G20_PORT = 80,
- G21_PORT = 84,
- G22_PORT = 88,
- G23_PORT = 92,
- IRQ0_PORT = G23_PORT,
- G24_PORT = 96,
- G25_PORT = 100,
- G26_PORT = 104,
- G27_PORT = 108,
- IRQ4_PORT = G27_PORT,
- G28_PORT = 112,
- G29_PORT = 116,
- G30_PORT = 120,
- NR_G_PORTS = 124,
- ACK_PORT,
-};
-
-static const struct hw_port_descriptor mn103int_ports[] = {
-
- /* interrupt outputs */
-
- { "nmi", NMI_PORT, 0, output_port, },
- { "level", LEVEL_PORT, 0, output_port, },
-
- /* interrupt ack (latch) input from cpu */
-
- { "ack", ACK_PORT, 0, input_port, },
-
- /* interrupt inputs (as names) */
-
- { "nmirq", G0_PORT + 0, 0, input_port, },
- { "watchdog", G0_PORT + 1, 0, input_port, },
- { "syserr", G0_PORT + 2, 0, input_port, },
-
- { "timer-0-underflow", G2_PORT, 0, input_port, },
- { "timer-1-underflow", G3_PORT, 0, input_port, },
- { "timer-2-underflow", G4_PORT, 0, input_port, },
- { "timer-3-underflow", G5_PORT, 0, input_port, },
- { "timer-4-underflow", G6_PORT, 0, input_port, },
- { "timer-5-underflow", G7_PORT, 0, input_port, },
- { "timer-6-underflow", G8_PORT, 0, input_port, },
-
- { "timer-6-compare-a", G9_PORT, 0, input_port, },
- { "timer-6-compare-b", G10_PORT, 0, input_port, },
-
- { "dma-0-end", G12_PORT, 0, input_port, },
- { "dma-1-end", G13_PORT, 0, input_port, },
- { "dma-2-end", G14_PORT, 0, input_port, },
- { "dma-3-end", G15_PORT, 0, input_port, },
-
- { "serial-0-receive", G16_PORT, 0, input_port, },
- { "serial-0-transmit", G17_PORT, 0, input_port, },
-
- { "serial-1-receive", G18_PORT, 0, input_port, },
- { "serial-1-transmit", G19_PORT, 0, input_port, },
-
- { "serial-2-receive", G20_PORT, 0, input_port, },
- { "serial-2-transmit", G21_PORT, 0, input_port, },
-
- { "irq-0", G23_PORT, 0, input_port, },
- { "irq-1", G24_PORT, 0, input_port, },
- { "irq-2", G25_PORT, 0, input_port, },
- { "irq-3", G26_PORT, 0, input_port, },
- { "irq-4", G27_PORT, 0, input_port, },
- { "irq-5", G28_PORT, 0, input_port, },
- { "irq-6", G29_PORT, 0, input_port, },
- { "irq-7", G30_PORT, 0, input_port, },
-
- /* interrupt inputs (as generic numbers) */
-
- { "int", 0, NR_G_PORTS, input_port, },
-
- { NULL, },
-};
-
-
-/* Macros for extracting/restoring the various register bits */
-
-#define EXTRACT_ID(X) (LSEXTRACTED8 ((X), 3, 0))
-#define INSERT_ID(X) (LSINSERTED8 ((X), 3, 0))
-
-#define EXTRACT_IR(X) (LSEXTRACTED8 ((X), 7, 4))
-#define INSERT_IR(X) (LSINSERTED8 ((X), 7, 4))
-
-#define EXTRACT_IE(X) (LSEXTRACTED8 ((X), 3, 0))
-#define INSERT_IE(X) (LSINSERTED8 ((X), 3, 0))
-
-#define EXTRACT_LV(X) (LSEXTRACTED8 ((X), 6, 4))
-#define INSERT_LV(X) (LSINSERTED8 ((X), 6, 4))
-
-
-
-/* Finish off the partially created hw device. Attach our local
- callbacks. Wire up our port names etc */
-
-static hw_io_read_buffer_method mn103int_io_read_buffer;
-static hw_io_write_buffer_method mn103int_io_write_buffer;
-static hw_port_event_method mn103int_port_event;
-static hw_ioctl_method mn103int_ioctl;
-
-
-
-static void
-attach_mn103int_regs (struct hw *me,
- struct mn103int *controller)
-{
- int i;
- if (hw_find_property (me, "reg") == NULL)
- hw_abort (me, "Missing \"reg\" property");
- for (i = 0; i < NR_BLOCKS; i++)
- {
- unsigned_word attach_address;
- int attach_space;
- unsigned attach_size;
- reg_property_spec reg;
- if (!hw_find_reg_array_property (me, "reg", i, &reg))
- hw_abort (me, "\"reg\" property must contain three addr/size entries");
- hw_unit_address_to_attach_address (hw_parent (me),
- &reg.address,
- &attach_space,
- &attach_address,
- me);
- controller->block[i].base = attach_address;
- hw_unit_size_to_attach_size (hw_parent (me),
- &reg.size,
- &attach_size, me);
- controller->block[i].bound = attach_address + (attach_size - 1);
- hw_attach_address (hw_parent (me),
- 0,
- attach_space, attach_address, attach_size,
- me);
- }
-}
-
-static void
-mn103int_finish (struct hw *me)
-{
- int gid;
- struct mn103int *controller;
-
- controller = HW_ZALLOC (me, struct mn103int);
- set_hw_data (me, controller);
- set_hw_io_read_buffer (me, mn103int_io_read_buffer);
- set_hw_io_write_buffer (me, mn103int_io_write_buffer);
- set_hw_ports (me, mn103int_ports);
- set_hw_port_event (me, mn103int_port_event);
- me->to_ioctl = mn103int_ioctl;
-
- /* Attach ourself to our parent bus */
- attach_mn103int_regs (me, controller);
-
- /* Initialize all the groups according to their default configuration */
- for (gid = 0; gid < NR_GROUPS; gid++)
- {
- struct mn103int_group *group = &controller->group[gid];
- group->trigger = NEGATIVE_EDGE;
- group->gid = gid;
- if (FIRST_NMI_GROUP <= gid && gid <= LAST_NMI_GROUP)
- {
- group->enable = 0xf;
- group->type = NMI_GROUP;
- }
- else if (FIRST_LEVEL_GROUP <= gid && gid <= LAST_LEVEL_GROUP)
- {
- group->enable = 0x0;
- group->type = LEVEL_GROUP;
- }
- else
- hw_abort (me, "internal error - unknown group id");
- }
-}
-
-
-
-/* Perform the nasty work of figuring out which of the interrupt
- groups should have its interrupt delivered. */
-
-static int
-find_highest_interrupt_group (struct hw *me,
- struct mn103int *controller)
-{
- int gid;
- int selected;
-
- /* FIRST_NMI_GROUP (group zero) is used as a special default value
- when searching for an interrupt group.*/
- selected = FIRST_NMI_GROUP;
- controller->group[FIRST_NMI_GROUP].level = 7;
-
- for (gid = FIRST_LEVEL_GROUP; gid <= LAST_LEVEL_GROUP; gid++)
- {
- struct mn103int_group *group = &controller->group[gid];
- if ((group->request & group->enable) != 0)
- {
- /* Remember, lower level, higher priority. */
- if (group->level < controller->group[selected].level)
- {
- selected = gid;
- }
- }
- }
- return selected;
-}
-
-
-/* Notify the processor of an interrupt level update */
-
-static void
-push_interrupt_level (struct hw *me,
- struct mn103int *controller)
-{
- int selected = find_highest_interrupt_group (me, controller);
- int level = controller->group[selected].level;
- HW_TRACE ((me, "port-out - selected=%d level=%d", selected, level));
- hw_port_event (me, LEVEL_PORT, level);
-}
-
-
-/* An event arrives on an interrupt port */
-
-static void
-mn103int_port_event (struct hw *me,
- int my_port,
- struct hw *source,
- int source_port,
- int level)
-{
- struct mn103int *controller = hw_data (me);
-
- switch (my_port)
- {
-
- case ACK_PORT:
- {
- int selected = find_highest_interrupt_group (me, controller);
- if (controller->group[selected].level != level)
- hw_abort (me, "botched level synchronisation");
- controller->interrupt_accepted_group = selected;
- HW_TRACE ((me, "port-event port=ack level=%d - selected=%d",
- level, selected));
- break;
- }
-
- default:
- {
- int gid;
- int iid;
- struct mn103int_group *group;
- unsigned interrupt;
- if (my_port > NR_G_PORTS)
- hw_abort (me, "Event on unknown port %d", my_port);
-
- /* map the port onto an interrupt group */
- gid = (my_port % NR_G_PORTS) / 4;
- group = &controller->group[gid];
- iid = (my_port % 4);
- interrupt = 1 << iid;
-
- /* update our cached input */
- if (level)
- group->input |= interrupt;
- else
- group->input &= ~interrupt;
-
- /* update the request bits */
- switch (group->trigger)
- {
- case ACTIVE_LOW:
- case ACTIVE_HIGH:
- if (level)
- group->request |= interrupt;
- break;
- case NEGATIVE_EDGE:
- case POSITIVE_EDGE:
- group->request |= interrupt;
- }
-
- /* force a corresponding output */
- switch (group->type)
- {
-
- case NMI_GROUP:
- {
- /* for NMI's the event is the trigger */
- HW_TRACE ((me, "port-in port=%d group=%d interrupt=%d - NMI",
- my_port, gid, iid));
- if ((group->request & group->enable) != 0)
- {
- HW_TRACE ((me, "port-out NMI"));
- hw_port_event (me, NMI_PORT, 1);
- }
- break;
- }
-
- case LEVEL_GROUP:
- {
- /* if an interrupt is now pending */
- HW_TRACE ((me, "port-in port=%d group=%d interrupt=%d - INT",
- my_port, gid, iid));
- push_interrupt_level (me, controller);
- break;
- }
- }
- break;
- }
-
- }
-}
-
-/* Read/write to to an ICR (group control register) */
-
-static struct mn103int_group *
-decode_group (struct hw *me,
- struct mn103int *controller,
- unsigned_word base,
- unsigned_word *offset)
-{
- int gid = (base / 4) % NR_GROUPS;
- *offset = (base % 4);
- return &controller->group[gid];
-}
-
-static unsigned8
-read_icr (struct hw *me,
- struct mn103int *controller,
- unsigned_word base)
-{
- unsigned_word offset;
- struct mn103int_group *group = decode_group (me, controller, base, &offset);
- unsigned8 val = 0;
- switch (group->type)
- {
-
- case NMI_GROUP:
- switch (offset)
- {
- case 0:
- val = INSERT_ID (group->request);
- HW_TRACE ((me, "read-icr group=%d:0 nmi 0x%02x",
- group->gid, val));
- break;
- default:
- break;
- }
- break;
-
- case LEVEL_GROUP:
- switch (offset)
- {
- case 0:
- val = (INSERT_IR (group->request)
- | INSERT_ID (group->request & group->enable));
- HW_TRACE ((me, "read-icr group=%d:0 level 0x%02x",
- group->gid, val));
- break;
- case 1:
- val = (INSERT_LV (group->level)
- | INSERT_IE (group->enable));
- HW_TRACE ((me, "read-icr level-%d:1 level 0x%02x",
- group->gid, val));
- break;
- }
- break;
-
- default:
- break;
-
- }
-
- return val;
-}
-
-static void
-write_icr (struct hw *me,
- struct mn103int *controller,
- unsigned_word base,
- unsigned8 val)
-{
- unsigned_word offset;
- struct mn103int_group *group = decode_group (me, controller, base, &offset);
- switch (group->type)
- {
-
- case NMI_GROUP:
- switch (offset)
- {
- case 0:
- HW_TRACE ((me, "write-icr group=%d:0 nmi 0x%02x",
- group->gid, val));
- group->request &= ~EXTRACT_ID (val);
- break;
- /* Special backdoor access to SYSEF flag from CPU. See
- interp.c:program_interrupt(). */
- case 3:
- HW_TRACE ((me, "write-icr-special group=%d:0 nmi 0x%02x",
- group->gid, val));
- group->request |= EXTRACT_ID (val);
- default:
- break;
- }
- break;
-
- case LEVEL_GROUP:
- switch (offset)
- {
- case 0: /* request/detect */
- /* Clear any ID bits and then set them according to IR */
- HW_TRACE ((me, "write-icr group=%d:0 level 0x%02x %x:%x:%x",
- group->gid, val,
- group->request, EXTRACT_IR (val), EXTRACT_ID (val)));
- group->request =
- ((EXTRACT_IR (val) & EXTRACT_ID (val))
- | (EXTRACT_IR (val) & group->request)
- | (~EXTRACT_IR (val) & ~EXTRACT_ID (val) & group->request));
- break;
- case 1: /* level/enable */
- HW_TRACE ((me, "write-icr group=%d:1 level 0x%02x",
- group->gid, val));
- group->level = EXTRACT_LV (val);
- group->enable = EXTRACT_IE (val);
- break;
- default:
- /* ignore */
- break;
- }
- push_interrupt_level (me, controller);
- break;
-
- default:
- break;
-
- }
-}
-
-
-/* Read the IAGR (Interrupt accepted group register) */
-
-static unsigned8
-read_iagr (struct hw *me,
- struct mn103int *controller,
- unsigned_word offset)
-{
- unsigned8 val;
- switch (offset)
- {
- case 0:
- {
- if (!(controller->group[controller->interrupt_accepted_group].request
- & controller->group[controller->interrupt_accepted_group].enable))
- {
- /* oops, lost the request */
- val = 0;
- HW_TRACE ((me, "read-iagr:0 lost-0"));
- }
- else
- {
- val = (controller->interrupt_accepted_group << 2);
- HW_TRACE ((me, "read-iagr:0 %d", (int) val));
- }
- break;
- }
- case 1:
- val = 0;
- HW_TRACE ((me, "read-iagr:1 %d", (int) val));
- break;
- default:
- val = 0;
- HW_TRACE ((me, "read-iagr 0x%08lx bad offset", (long) offset));
- break;
- }
- return val;
-}
-
-
-/* Reads/writes to the EXTMD (external interrupt trigger configuration
- register) */
-
-static struct mn103int_group *
-external_group (struct mn103int *controller,
- unsigned_word offset)
-{
- switch (offset)
- {
- case 0:
- return &controller->group[IRQ0_PORT/4];
- case 1:
- return &controller->group[IRQ4_PORT/4];
- default:
- return NULL;
- }
-}
-
-static unsigned8
-read_extmd (struct hw *me,
- struct mn103int *controller,
- unsigned_word offset)
-{
- int gid;
- unsigned8 val = 0;
- struct mn103int_group *group = external_group (controller, offset);
- if (group != NULL)
- {
- for (gid = 0; gid < 4; gid++)
- {
- val |= (group[gid].trigger << (gid * 2));
- }
- }
- HW_TRACE ((me, "read-extmd 0x%02lx", (long) val));
- return val;
-}
-
-static void
-write_extmd (struct hw *me,
- struct mn103int *controller,
- unsigned_word offset,
- unsigned8 val)
-{
- int gid;
- struct mn103int_group *group = external_group (controller, offset);
- if (group != NULL)
- {
- for (gid = 0; gid < 4; gid++)
- {
- group[gid].trigger = (val >> (gid * 2)) & 0x3;
- /* MAYBE: interrupts already pending? */
- }
- }
- HW_TRACE ((me, "write-extmd 0x%02lx", (long) val));
-}
-
-
-/* generic read/write */
-
-static int
-decode_addr (struct hw *me,
- struct mn103int *controller,
- unsigned_word address,
- unsigned_word *offset)
-{
- int i;
- for (i = 0; i < NR_BLOCKS; i++)
- {
- if (address >= controller->block[i].base
- && address <= controller->block[i].bound)
- {
- *offset = address - controller->block[i].base;
- return i;
- }
- }
- hw_abort (me, "bad address");
- return -1;
-}
-
-static unsigned
-mn103int_io_read_buffer (struct hw *me,
- void *dest,
- int space,
- unsigned_word base,
- unsigned nr_bytes)
-{
- struct mn103int *controller = hw_data (me);
- unsigned8 *buf = dest;
- unsigned byte;
- /* HW_TRACE ((me, "read 0x%08lx %d", (long) base, (int) nr_bytes)); */
- for (byte = 0; byte < nr_bytes; byte++)
- {
- unsigned_word address = base + byte;
- unsigned_word offset;
- switch (decode_addr (me, controller, address, &offset))
- {
- case ICR_BLOCK:
- buf[byte] = read_icr (me, controller, offset);
- break;
- case IAGR_BLOCK:
- buf[byte] = read_iagr (me, controller, offset);
- break;
- case EXTMD_BLOCK:
- buf[byte] = read_extmd (me, controller, offset);
- break;
- default:
- hw_abort (me, "bad switch");
- }
- }
- return nr_bytes;
-}
-
-static unsigned
-mn103int_io_write_buffer (struct hw *me,
- const void *source,
- int space,
- unsigned_word base,
- unsigned nr_bytes)
-{
- struct mn103int *controller = hw_data (me);
- const unsigned8 *buf = source;
- unsigned byte;
- /* HW_TRACE ((me, "write 0x%08lx %d", (long) base, (int) nr_bytes)); */
- for (byte = 0; byte < nr_bytes; byte++)
- {
- unsigned_word address = base + byte;
- unsigned_word offset;
- switch (decode_addr (me, controller, address, &offset))
- {
- case ICR_BLOCK:
- write_icr (me, controller, offset, buf[byte]);
- break;
- case IAGR_BLOCK:
- /* not allowed */
- break;
- case EXTMD_BLOCK:
- write_extmd (me, controller, offset, buf[byte]);
- break;
- default:
- hw_abort (me, "bad switch");
- }
- }
- return nr_bytes;
-}
-
-static int
-mn103int_ioctl(struct hw *me,
- hw_ioctl_request request,
- va_list ap)
-{
- struct mn103int *controller = (struct mn103int *)hw_data(me);
- controller->group[0].request = EXTRACT_ID(4);
- mn103int_port_event(me, 2 /* nmi_port(syserr) */, NULL, 0, 0);
- return 0;
-}
-
-
-const struct hw_descriptor dv_mn103int_descriptor[] = {
- { "mn103int", mn103int_finish, },
- { NULL },
-};
diff --git a/sim/mn10300/dv-mn103iop.c b/sim/mn10300/dv-mn103iop.c
deleted file mode 100644
index f1379fc9b8d..00000000000
--- a/sim/mn10300/dv-mn103iop.c
+++ /dev/null
@@ -1,555 +0,0 @@
-/* This file is part of the program GDB, the GNU debugger.
-
- Copyright (C) 1998 Free Software Foundation, Inc.
- Contributed by Cygnus Solutions.
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-#include "sim-main.h"
-#include "hw-main.h"
-
-/* DEVICE
-
-
- mn103iop - mn103002 I/O ports 0-3.
-
-
- DESCRIPTION
-
- Implements the mn103002 i/o ports as described in the mn103002 user guide.
-
-
- PROPERTIES
-
- reg = <ioport-addr> <ioport-size> ...
-
-
- BUGS
-
- */
-
-
-/* The I/O ports' registers' address block */
-
-struct mn103iop_block {
- unsigned_word base;
- unsigned_word bound;
-};
-
-
-
-enum io_port_register_types {
- P0OUT,
- P1OUT,
- P2OUT,
- P3OUT,
- P0MD,
- P1MD,
- P2MD,
- P3MD,
- P2SS,
- P4SS,
- P0DIR,
- P1DIR,
- P2DIR,
- P3DIR,
- P0IN,
- P1IN,
- P2IN,
- P3IN,
-};
-
-#define NR_PORTS 4
-
-enum {
- OUTPUT_BLOCK,
- MODE_BLOCK,
- DED_CTRL_BLOCK,
- CTRL_BLOCK,
- PIN_BLOCK,
- NR_BLOCKS
-};
-
-typedef struct _mn10300_ioport {
- unsigned8 output, output_mode, control, pin;
- struct hw_event *event;
-} mn10300_ioport;
-
-
-
-struct mn103iop {
- struct mn103iop_block block[NR_BLOCKS];
- mn10300_ioport port[NR_PORTS];
- unsigned8 p2ss, p4ss;
-};
-
-
-/* Finish off the partially created hw device. Attach our local
- callbacks. Wire up our port names etc */
-
-static hw_io_read_buffer_method mn103iop_io_read_buffer;
-static hw_io_write_buffer_method mn103iop_io_write_buffer;
-
-static void
-attach_mn103iop_regs (struct hw *me,
- struct mn103iop *io_port)
-{
- int i;
- unsigned_word attach_address;
- int attach_space;
- unsigned attach_size;
- reg_property_spec reg;
-
- if (hw_find_property (me, "reg") == NULL)
- hw_abort (me, "Missing \"reg\" property");
-
- for (i=0; i < NR_BLOCKS; ++i )
- {
- if (!hw_find_reg_array_property (me, "reg", i, &reg))
- hw_abort (me, "\"reg\" property must contain five addr/size entries");
- hw_unit_address_to_attach_address (hw_parent (me),
- &reg.address,
- &attach_space,
- &attach_address,
- me);
- io_port->block[i].base = attach_address;
- hw_unit_size_to_attach_size (hw_parent (me),
- &reg.size,
- &attach_size, me);
- io_port->block[i].bound = attach_address + (attach_size - 1);
- hw_attach_address (hw_parent (me),
- 0,
- attach_space, attach_address, attach_size,
- me);
- }
-}
-
-static void
-mn103iop_finish (struct hw *me)
-{
- struct mn103iop *io_port;
- int i;
-
- io_port = HW_ZALLOC (me, struct mn103iop);
- set_hw_data (me, io_port);
- set_hw_io_read_buffer (me, mn103iop_io_read_buffer);
- set_hw_io_write_buffer (me, mn103iop_io_write_buffer);
-
- /* Attach ourself to our parent bus */
- attach_mn103iop_regs (me, io_port);
-
- /* Initialize the i/o port registers. */
- for ( i=0; i<NR_PORTS; ++i )
- {
- io_port->port[i].output = 0;
- io_port->port[i].output_mode = 0;
- io_port->port[i].control = 0;
- io_port->port[i].pin = 0;
- }
- io_port->port[2].output_mode = 0xff;
- io_port->p2ss = 0;
- io_port->p4ss = 0x0f;
-}
-
-
-/* read and write */
-
-static int
-decode_addr (struct hw *me,
- struct mn103iop *io_port,
- unsigned_word address)
-{
- unsigned_word offset;
- offset = address - io_port->block[0].base;
- switch (offset)
- {
- case 0x00: return P0OUT;
- case 0x01: return P1OUT;
- case 0x04: return P2OUT;
- case 0x05: return P3OUT;
- case 0x20: return P0MD;
- case 0x21: return P1MD;
- case 0x24: return P2MD;
- case 0x25: return P3MD;
- case 0x44: return P2SS;
- case 0x48: return P4SS;
- case 0x60: return P0DIR;
- case 0x61: return P1DIR;
- case 0x64: return P2DIR;
- case 0x65: return P3DIR;
- case 0x80: return P0IN;
- case 0x81: return P1IN;
- case 0x84: return P2IN;
- case 0x85: return P3IN;
- default:
- {
- hw_abort (me, "bad address");
- return -1;
- }
- }
-}
-
-
-static void
-read_output_reg (struct hw *me,
- struct mn103iop *io_port,
- unsigned_word io_port_reg,
- const void *dest,
- unsigned nr_bytes)
-{
- if ( nr_bytes == 1 )
- {
- *(unsigned8 *)dest = io_port->port[io_port_reg].output;
- }
- else
- {
- hw_abort (me, "bad read size of %d bytes from P%dOUT.", nr_bytes,
- io_port_reg);
- }
-}
-
-
-static void
-read_output_mode_reg (struct hw *me,
- struct mn103iop *io_port,
- unsigned_word io_port_reg,
- const void *dest,
- unsigned nr_bytes)
-{
- if ( nr_bytes == 1 )
- {
- /* check if there are fields which can't be written and
- take appropriate action depending what bits are set */
- *(unsigned8 *)dest = io_port->port[io_port_reg].output_mode;
- }
- else
- {
- hw_abort (me, "bad read size of %d bytes to P%dMD.", nr_bytes,
- io_port_reg);
- }
-}
-
-
-static void
-read_control_reg (struct hw *me,
- struct mn103iop *io_port,
- unsigned_word io_port_reg,
- const void *dest,
- unsigned nr_bytes)
-{
- if ( nr_bytes == 1 )
- {
- *(unsigned8 *)dest = io_port->port[io_port_reg].control;
- }
- else
- {
- hw_abort (me, "bad read size of %d bytes to P%dDIR.", nr_bytes,
- io_port_reg);
- }
-}
-
-
-static void
-read_pin_reg (struct hw *me,
- struct mn103iop *io_port,
- unsigned_word io_port_reg,
- const void *dest,
- unsigned nr_bytes)
-{
- if ( nr_bytes == 1 )
- {
- *(unsigned8 *)dest = io_port->port[io_port_reg].pin;
- }
- else
- {
- hw_abort (me, "bad read size of %d bytes to P%dIN.", nr_bytes,
- io_port_reg);
- }
-}
-
-
-static void
-read_dedicated_control_reg (struct hw *me,
- struct mn103iop *io_port,
- unsigned_word io_port_reg,
- const void *dest,
- unsigned nr_bytes)
-{
- if ( nr_bytes == 1 )
- {
- /* select on io_port_reg: */
- if ( io_port_reg == P2SS )
- {
- *(unsigned8 *)dest = io_port->p2ss;
- }
- else
- {
- *(unsigned8 *)dest = io_port->p4ss;
- }
- }
- else
- {
- hw_abort (me, "bad read size of %d bytes to PSS.", nr_bytes);
- }
-}
-
-
-static unsigned
-mn103iop_io_read_buffer (struct hw *me,
- void *dest,
- int space,
- unsigned_word base,
- unsigned nr_bytes)
-{
- struct mn103iop *io_port = hw_data (me);
- enum io_port_register_types io_port_reg;
- HW_TRACE ((me, "read 0x%08lx %d", (long) base, (int) nr_bytes));
-
- io_port_reg = decode_addr (me, io_port, base);
- switch (io_port_reg)
- {
- /* Port output registers */
- case P0OUT:
- case P1OUT:
- case P2OUT:
- case P3OUT:
- read_output_reg(me, io_port, io_port_reg-P0OUT, dest, nr_bytes);
- break;
-
- /* Port output mode registers */
- case P0MD:
- case P1MD:
- case P2MD:
- case P3MD:
- read_output_mode_reg(me, io_port, io_port_reg-P0MD, dest, nr_bytes);
- break;
-
- /* Port control registers */
- case P0DIR:
- case P1DIR:
- case P2DIR:
- case P3DIR:
- read_control_reg(me, io_port, io_port_reg-P0DIR, dest, nr_bytes);
- break;
-
- /* Port pin registers */
- case P0IN:
- case P1IN:
- case P2IN:
- read_pin_reg(me, io_port, io_port_reg-P0IN, dest, nr_bytes);
- break;
-
- case P2SS:
- case P4SS:
- read_dedicated_control_reg(me, io_port, io_port_reg, dest, nr_bytes);
- break;
-
- default:
- hw_abort(me, "invalid address");
- }
-
- return nr_bytes;
-}
-
-
-static void
-write_output_reg (struct hw *me,
- struct mn103iop *io_port,
- unsigned_word io_port_reg,
- const void *source,
- unsigned nr_bytes)
-{
- unsigned8 buf = *(unsigned8 *)source;
- if ( nr_bytes == 1 )
- {
- if ( io_port_reg == 3 && (buf & 0xfc) != 0 )
- {
- hw_abort(me, "Cannot write to read-only bits of P3OUT.");
- }
- else
- {
- io_port->port[io_port_reg].output = buf;
- }
- }
- else
- {
- hw_abort (me, "bad read size of %d bytes from P%dOUT.", nr_bytes,
- io_port_reg);
- }
-}
-
-
-static void
-write_output_mode_reg (struct hw *me,
- struct mn103iop *io_port,
- unsigned_word io_port_reg,
- const void *source,
- unsigned nr_bytes)
-{
- unsigned8 buf = *(unsigned8 *)source;
- if ( nr_bytes == 1 )
- {
- /* check if there are fields which can't be written and
- take appropriate action depending what bits are set */
- if ( ( io_port_reg == 3 && (buf & 0xfc) != 0 )
- || ( (io_port_reg == 0 || io_port_reg == 1) && (buf & 0xfe) != 0 ) )
- {
- hw_abort(me, "Cannot write to read-only bits of output mode register.");
- }
- else
- {
- io_port->port[io_port_reg].output_mode = buf;
- }
- }
- else
- {
- hw_abort (me, "bad write size of %d bytes to P%dMD.", nr_bytes,
- io_port_reg);
- }
-}
-
-
-static void
-write_control_reg (struct hw *me,
- struct mn103iop *io_port,
- unsigned_word io_port_reg,
- const void *source,
- unsigned nr_bytes)
-{
- unsigned8 buf = *(unsigned8 *)source;
- if ( nr_bytes == 1 )
- {
- if ( io_port_reg == 3 && (buf & 0xfc) != 0 )
- {
- hw_abort(me, "Cannot write to read-only bits of P3DIR.");
- }
- else
- {
- io_port->port[io_port_reg].control = buf;
- }
- }
- else
- {
- hw_abort (me, "bad write size of %d bytes to P%dDIR.", nr_bytes,
- io_port_reg);
- }
-}
-
-
-static void
-write_dedicated_control_reg (struct hw *me,
- struct mn103iop *io_port,
- unsigned_word io_port_reg,
- const void *source,
- unsigned nr_bytes)
-{
- unsigned8 buf = *(unsigned8 *)source;
- if ( nr_bytes == 1 )
- {
- /* select on io_port_reg: */
- if ( io_port_reg == P2SS )
- {
- if ( (buf && 0xfc) != 0 )
- {
- hw_abort(me, "Cannot write to read-only bits in p2ss.");
- }
- else
- {
- io_port->p2ss = buf;
- }
- }
- else
- {
- if ( (buf && 0xf0) != 0 )
- {
- hw_abort(me, "Cannot write to read-only bits in p4ss.");
- }
- else
- {
- io_port->p4ss = buf;
- }
- }
- }
- else
- {
- hw_abort (me, "bad write size of %d bytes to PSS.", nr_bytes);
- }
-}
-
-
-static unsigned
-mn103iop_io_write_buffer (struct hw *me,
- const void *source,
- int space,
- unsigned_word base,
- unsigned nr_bytes)
-{
- struct mn103iop *io_port = hw_data (me);
- enum io_port_register_types io_port_reg;
- HW_TRACE ((me, "write 0x%08lx %d", (long) base, (int) nr_bytes));
-
- io_port_reg = decode_addr (me, io_port, base);
- switch (io_port_reg)
- {
- /* Port output registers */
- case P0OUT:
- case P1OUT:
- case P2OUT:
- case P3OUT:
- write_output_reg(me, io_port, io_port_reg-P0OUT, source, nr_bytes);
- break;
-
- /* Port output mode registers */
- case P0MD:
- case P1MD:
- case P2MD:
- case P3MD:
- write_output_mode_reg(me, io_port, io_port_reg-P0MD, source, nr_bytes);
- break;
-
- /* Port control registers */
- case P0DIR:
- case P1DIR:
- case P2DIR:
- case P3DIR:
- write_control_reg(me, io_port, io_port_reg-P0DIR, source, nr_bytes);
- break;
-
- /* Port pin registers */
- case P0IN:
- case P1IN:
- case P2IN:
- hw_abort(me, "Cannot write to pin register.");
- break;
-
- case P2SS:
- case P4SS:
- write_dedicated_control_reg(me, io_port, io_port_reg, source, nr_bytes);
- break;
-
- default:
- hw_abort(me, "invalid address");
- }
-
- return nr_bytes;
-}
-
-
-const struct hw_descriptor dv_mn103iop_descriptor[] = {
- { "mn103iop", mn103iop_finish, },
- { NULL },
-};
diff --git a/sim/mn10300/dv-mn103ser.c b/sim/mn10300/dv-mn103ser.c
deleted file mode 100644
index 7f20ed1f6b2..00000000000
--- a/sim/mn10300/dv-mn103ser.c
+++ /dev/null
@@ -1,712 +0,0 @@
-/* This file is part of the program GDB, the GNU debugger.
-
- Copyright (C) 1998 Free Software Foundation, Inc.
- Contributed by Cygnus Solutions.
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-#include "sim-main.h"
-#include "hw-main.h"
-#include "dv-sockser.h"
-
-
-/* DEVICE
-
-
- mn103ser - mn103002 serial devices 0, 1 and 2.
-
-
- DESCRIPTION
-
- Implements the mn103002 serial interfaces as described in the
- mn103002 user guide.
-
-
- PROPERTIES
-
- reg = <serial-addr> <serial-size>
-
-
- BUGS
-
- */
-
-
-/* The serial devices' registers' address block */
-
-struct mn103ser_block {
- unsigned_word base;
- unsigned_word bound;
-};
-
-
-
-enum serial_register_types {
- SC0CTR,
- SC1CTR,
- SC2CTR,
- SC0ICR,
- SC1ICR,
- SC2ICR,
- SC0TXB,
- SC1TXB,
- SC2TXB,
- SC0RXB,
- SC1RXB,
- SC2RXB,
- SC0STR,
- SC1STR,
- SC2STR,
- SC2TIM,
-};
-
-
-/* Access dv-sockser state */
-extern char* sockser_addr;
-#define USE_SOCKSER_P (sockser_addr != NULL)
-
-
-#define NR_SERIAL_DEVS 3
-#define SIO_STAT_RRDY 0x0010
-
-typedef struct _mn10300_serial {
- unsigned16 status, control;
- unsigned8 txb, rxb, intmode;
- struct hw_event *event;
-} mn10300_serial;
-
-
-
-struct mn103ser {
- struct mn103ser_block block;
- mn10300_serial device[NR_SERIAL_DEVS];
- unsigned8 serial2_timer_reg;
- do_hw_poll_read_method *reader;
-};
-
-/* output port ID's */
-
-/* for mn103002 */
-enum {
- SERIAL0_RECEIVE,
- SERIAL1_RECEIVE,
- SERIAL2_RECEIVE,
- SERIAL0_SEND,
- SERIAL1_SEND,
- SERIAL2_SEND,
-};
-
-
-static const struct hw_port_descriptor mn103ser_ports[] = {
-
- { "serial-0-receive", SERIAL0_RECEIVE, 0, output_port, },
- { "serial-1-receive", SERIAL1_RECEIVE, 0, output_port, },
- { "serial-2-receive", SERIAL2_RECEIVE, 0, output_port, },
- { "serial-0-transmit", SERIAL0_SEND, 0, output_port, },
- { "serial-1-transmit", SERIAL1_SEND, 0, output_port, },
- { "serial-2-transmit", SERIAL2_SEND, 0, output_port, },
-
- { NULL, },
-};
-
-
-
-/* Finish off the partially created hw device. Attach our local
- callbacks. Wire up our port names etc */
-
-static hw_io_read_buffer_method mn103ser_io_read_buffer;
-static hw_io_write_buffer_method mn103ser_io_write_buffer;
-
-static void
-attach_mn103ser_regs (struct hw *me,
- struct mn103ser *serial)
-{
- unsigned_word attach_address;
- int attach_space;
- unsigned attach_size;
- reg_property_spec reg;
-
- if (hw_find_property (me, "reg") == NULL)
- hw_abort (me, "Missing \"reg\" property");
-
- if (!hw_find_reg_array_property (me, "reg", 0, &reg))
- hw_abort (me, "\"reg\" property must contain three addr/size entries");
- hw_unit_address_to_attach_address (hw_parent (me),
- &reg.address,
- &attach_space,
- &attach_address,
- me);
- serial->block.base = attach_address;
- hw_unit_size_to_attach_size (hw_parent (me),
- &reg.size,
- &attach_size, me);
- serial->block.bound = attach_address + (attach_size - 1);
- hw_attach_address (hw_parent (me),
- 0,
- attach_space, attach_address, attach_size,
- me);
-}
-
-static void
-mn103ser_finish (struct hw *me)
-{
- struct mn103ser *serial;
- int i;
-
- serial = HW_ZALLOC (me, struct mn103ser);
- set_hw_data (me, serial);
- set_hw_io_read_buffer (me, mn103ser_io_read_buffer);
- set_hw_io_write_buffer (me, mn103ser_io_write_buffer);
- set_hw_ports (me, mn103ser_ports);
-
- /* Attach ourself to our parent bus */
- attach_mn103ser_regs (me, serial);
-
- /* If so configured, enable polled input */
- if (hw_find_property (me, "poll?") != NULL
- && hw_find_boolean_property (me, "poll?"))
- {
- serial->reader = sim_io_poll_read;
- }
- else
- {
- serial->reader = sim_io_read;
- }
-
- /* Initialize the serial device registers. */
- for ( i=0; i<NR_SERIAL_DEVS; ++i )
- {
- serial->device[i].txb = 0;
- serial->device[i].rxb = 0;
- serial->device[i].status = 0;
- serial->device[i].control = 0;
- serial->device[i].intmode = 0;
- serial->device[i].event = NULL;
- }
-}
-
-
-/* read and write */
-
-static int
-decode_addr (struct hw *me,
- struct mn103ser *serial,
- unsigned_word address)
-{
- unsigned_word offset;
- offset = address - serial->block.base;
- switch (offset)
- {
- case 0x00: return SC0CTR;
- case 0x04: return SC0ICR;
- case 0x08: return SC0TXB;
- case 0x09: return SC0RXB;
- case 0x0C: return SC0STR;
- case 0x10: return SC1CTR;
- case 0x14: return SC1ICR;
- case 0x18: return SC1TXB;
- case 0x19: return SC1RXB;
- case 0x1C: return SC1STR;
- case 0x20: return SC2CTR;
- case 0x24: return SC2ICR;
- case 0x28: return SC2TXB;
- case 0x29: return SC2RXB;
- case 0x2C: return SC2STR;
- case 0x2D: return SC2TIM;
- default:
- {
- hw_abort (me, "bad address");
- return -1;
- }
- }
-}
-
-static void
-do_polling_event (struct hw *me,
- void *data)
-{
- struct mn103ser *serial = hw_data(me);
- int serial_reg = (int) data;
- char c;
- int count;
-
- if(USE_SOCKSER_P)
- {
- int rd;
- rd = dv_sockser_read (hw_system (me));
- if(rd != -1)
- {
- c = (char) rd;
- count = 1;
- }
- else
- {
- count = HW_IO_NOT_READY;
- }
- }
- else
- {
- count = do_hw_poll_read (me, serial->reader,
- 0/*STDIN*/, &c, sizeof(c));
- }
-
-
- switch (count)
- {
- case HW_IO_NOT_READY:
- case HW_IO_EOF:
- serial->device[serial_reg].rxb = 0;
- serial->device[serial_reg].status &= ~SIO_STAT_RRDY;
- break;
- default:
- serial->device[serial_reg].rxb = c;
- serial->device[serial_reg].status |= SIO_STAT_RRDY;
- hw_port_event (me, serial_reg+SERIAL0_RECEIVE, 1);
- }
-
- /* Schedule next polling event */
- serial->device[serial_reg].event
- = hw_event_queue_schedule (me, 1000,
- do_polling_event, (void *)serial_reg);
-
-}
-
-static void
-read_control_reg (struct hw *me,
- struct mn103ser *serial,
- unsigned_word serial_reg,
- void *dest,
- unsigned nr_bytes)
-{
- /* really allow 1 byte read, too */
- if ( nr_bytes == 2 )
- {
- *(unsigned16 *)dest = H2LE_2 (serial->device[serial_reg].control);
- }
- else
- {
- hw_abort (me, "bad read size of %d bytes from SC%dCTR.", nr_bytes,
- serial_reg);
- }
-}
-
-
-static void
-read_intmode_reg (struct hw *me,
- struct mn103ser *serial,
- unsigned_word serial_reg,
- void *dest,
- unsigned nr_bytes)
-{
- if ( nr_bytes == 1 )
- {
- *(unsigned8 *)dest = serial->device[serial_reg].intmode;
- }
- else
- {
- hw_abort (me, "bad read size of %d bytes from SC%dICR.", nr_bytes,
- serial_reg);
- }
-}
-
-
-static void
-read_txb (struct hw *me,
- struct mn103ser *serial,
- unsigned_word serial_reg,
- void *dest,
- unsigned nr_bytes)
-{
- if ( nr_bytes == 1 )
- {
- *(unsigned8 *)dest = serial->device[serial_reg].txb;
- }
- else
- {
- hw_abort (me, "bad read size of %d bytes from SC%dTXB.", nr_bytes,
- serial_reg);
- }
-}
-
-
-static void
-read_rxb (struct hw *me,
- struct mn103ser *serial,
- unsigned_word serial_reg,
- void *dest,
- unsigned nr_bytes)
-{
- if ( nr_bytes == 1 )
- {
- *(unsigned8 *)dest = serial->device[serial_reg].rxb;
- /* Reception buffer is now empty. */
- serial->device[serial_reg].status &= ~SIO_STAT_RRDY;
- }
- else
- {
- hw_abort (me, "bad read size of %d bytes from SC%dRXB.", nr_bytes,
- serial_reg);
- }
-}
-
-
-static void
-read_status_reg (struct hw *me,
- struct mn103ser *serial,
- unsigned_word serial_reg,
- void *dest,
- unsigned nr_bytes)
-{
- char c;
- int count;
-
- if ( (serial->device[serial_reg].status & SIO_STAT_RRDY) == 0 )
- {
- /* FIFO is empty */
- /* Kill current poll event */
- if ( NULL != serial->device[serial_reg].event )
- {
- hw_event_queue_deschedule (me, serial->device[serial_reg].event);
- serial->device[serial_reg].event = NULL;
- }
-
- if(USE_SOCKSER_P)
- {
- int rd;
- rd = dv_sockser_read (hw_system (me));
- if(rd != -1)
- {
- c = (char) rd;
- count = 1;
- }
- else
- {
- count = HW_IO_NOT_READY;
- }
- }
- else
- {
- count = do_hw_poll_read (me, serial->reader,
- 0/*STDIN*/, &c, sizeof(c));
- }
-
- switch (count)
- {
- case HW_IO_NOT_READY:
- case HW_IO_EOF:
- serial->device[serial_reg].rxb = 0;
- serial->device[serial_reg].status &= ~SIO_STAT_RRDY;
- break;
- default:
- serial->device[serial_reg].rxb = c;
- serial->device[serial_reg].status |= SIO_STAT_RRDY;
- hw_port_event (me, serial_reg+SERIAL0_RECEIVE, 1);
- }
-
- /* schedule polling event */
- serial->device[serial_reg].event
- = hw_event_queue_schedule (me, 1000,
- do_polling_event,
- (void *)serial_reg);
- }
-
- if ( nr_bytes == 1 )
- {
- *(unsigned8 *)dest = (unsigned8)serial->device[serial_reg].status;
- }
- else if ( nr_bytes == 2 && serial_reg != SC2STR )
- {
- *(unsigned16 *)dest = H2LE_2 (serial->device[serial_reg].status);
- }
- else
- {
- hw_abort (me, "bad read size of %d bytes from SC%dSTR.", nr_bytes,
- serial_reg);
- }
-}
-
-
-static void
-read_serial2_timer_reg (struct hw *me,
- struct mn103ser *serial,
- void *dest,
- unsigned nr_bytes)
-{
- if ( nr_bytes == 1 )
- {
- * (unsigned8 *) dest = (unsigned8) serial->serial2_timer_reg;
- }
- else
- {
- hw_abort (me, "bad read size of %d bytes to SC2TIM.", nr_bytes);
- }
-}
-
-
-static unsigned
-mn103ser_io_read_buffer (struct hw *me,
- void *dest,
- int space,
- unsigned_word base,
- unsigned nr_bytes)
-{
- struct mn103ser *serial = hw_data (me);
- enum serial_register_types serial_reg;
- HW_TRACE ((me, "read 0x%08lx %d", (long) base, (int) nr_bytes));
-
- serial_reg = decode_addr (me, serial, base);
- switch (serial_reg)
- {
- /* control registers */
- case SC0CTR:
- case SC1CTR:
- case SC2CTR:
- read_control_reg(me, serial, serial_reg-SC0CTR, dest, nr_bytes);
- HW_TRACE ((me, "read - ctrl reg%d has 0x%x\n", serial_reg-SC0CTR,
- *(unsigned8 *)dest));
- break;
-
- /* interrupt mode registers */
- case SC0ICR:
- case SC1ICR:
- case SC2ICR:
- read_intmode_reg(me, serial, serial_reg-SC0ICR, dest, nr_bytes);
- HW_TRACE ((me, "read - intmode reg%d has 0x%x\n", serial_reg-SC0ICR,
- *(unsigned8 *)dest));
- break;
-
- /* transmission buffers */
- case SC0TXB:
- case SC1TXB:
- case SC2TXB:
- read_txb(me, serial, serial_reg-SC0TXB, dest, nr_bytes);
- HW_TRACE ((me, "read - txb%d has %c\n", serial_reg-SC0TXB,
- *(char *)dest));
- break;
-
- /* reception buffers */
- case SC0RXB:
- case SC1RXB:
- case SC2RXB:
- read_rxb(me, serial, serial_reg-SC0RXB, dest, nr_bytes);
- HW_TRACE ((me, "read - rxb%d has %c\n", serial_reg-SC0RXB,
- *(char *)dest));
- break;
-
- /* status registers */
- case SC0STR:
- case SC1STR:
- case SC2STR:
- read_status_reg(me, serial, serial_reg-SC0STR, dest, nr_bytes);
- HW_TRACE ((me, "read - status reg%d has 0x%x\n", serial_reg-SC0STR,
- *(unsigned8 *)dest));
- break;
-
- case SC2TIM:
- read_serial2_timer_reg(me, serial, dest, nr_bytes);
- HW_TRACE ((me, "read - serial2 timer reg %d\n", *(unsigned8 *)dest));
- break;
-
- default:
- hw_abort(me, "invalid address");
- }
-
- return nr_bytes;
-}
-
-
-static void
-write_control_reg (struct hw *me,
- struct mn103ser *serial,
- unsigned_word serial_reg,
- const void *source,
- unsigned nr_bytes)
-{
- unsigned16 val = LE2H_2 (*(unsigned16 *)source);
-
- /* really allow 1 byte write, too */
- if ( nr_bytes == 2 )
- {
- if ( serial_reg == 2 && (val & 0x0C04) != 0 )
- {
- hw_abort(me, "Cannot write to read-only bits of SC2CTR.");
- }
- else
- {
- serial->device[serial_reg].control = val;
- }
- }
- else
- {
- hw_abort (me, "bad read size of %d bytes from SC%dSTR.", nr_bytes,
- serial_reg);
- }
-}
-
-
-static void
-write_intmode_reg (struct hw *me,
- struct mn103ser *serial,
- unsigned_word serial_reg,
- const void *source,
- unsigned nr_bytes)
-{
-unsigned8 val = *(unsigned8 *)source;
-
- if ( nr_bytes == 1 )
- {
- /* Check for attempt to write to read-only bits of register. */
- if ( ( serial_reg == 2 && (val & 0xCA) != 0 )
- || ( serial_reg != 2 && (val & 0x4A) != 0 ) )
- {
- hw_abort(me, "Cannot write to read-only bits of SC%dICR.",
- serial_reg);
- }
- else
- {
- serial->device[serial_reg].intmode = val;
- }
- }
- else
- {
- hw_abort (me, "bad write size of %d bytes to SC%dICR.", nr_bytes,
- serial_reg);
- }
-}
-
-
-static void
-write_txb (struct hw *me,
- struct mn103ser *serial,
- unsigned_word serial_reg,
- const void *source,
- unsigned nr_bytes)
-{
- if ( nr_bytes == 1 )
- {
- serial->device[serial_reg].txb = *(unsigned8 *)source;
-
- if(USE_SOCKSER_P)
- {
- dv_sockser_write(hw_system (me), * (char*) source);
- }
- else
- {
- sim_io_write_stdout(hw_system (me), (char *)source, 1);
- sim_io_flush_stdout(hw_system (me));
- }
-
- hw_port_event (me, serial_reg+SERIAL0_SEND, 1);
- }
- else
- {
- hw_abort (me, "bad write size of %d bytes to SC%dTXB.", nr_bytes,
- serial_reg);
- }
-}
-
-
-static void
-write_serial2_timer_reg (struct hw *me,
- struct mn103ser *serial,
- const void *source,
- unsigned nr_bytes)
-{
- if ( nr_bytes == 1 )
- {
- serial->serial2_timer_reg = *(unsigned8 *)source;
- }
- else
- {
- hw_abort (me, "bad write size of %d bytes to SC2TIM.", nr_bytes);
- }
-}
-
-
-static unsigned
-mn103ser_io_write_buffer (struct hw *me,
- const void *source,
- int space,
- unsigned_word base,
- unsigned nr_bytes)
-{
- struct mn103ser *serial = hw_data (me);
- enum serial_register_types serial_reg;
- HW_TRACE ((me, "write 0x%08lx %d", (long) base, (int) nr_bytes));
-
- serial_reg = decode_addr (me, serial, base);
- switch (serial_reg)
- {
- /* control registers */
- case SC0CTR:
- case SC1CTR:
- case SC2CTR:
- HW_TRACE ((me, "write - ctrl reg%d has 0x%x, nrbytes=%d.\n",
- serial_reg-SC0CTR, *(unsigned8 *)source, nr_bytes));
- write_control_reg(me, serial, serial_reg-SC0CTR, source, nr_bytes);
- break;
-
- /* interrupt mode registers */
- case SC0ICR:
- case SC1ICR:
- case SC2ICR:
- HW_TRACE ((me, "write - intmode reg%d has 0x%x, nrbytes=%d.\n",
- serial_reg-SC0ICR, *(unsigned8 *)source, nr_bytes));
- write_intmode_reg(me, serial, serial_reg-SC0ICR, source, nr_bytes);
- break;
-
- /* transmission buffers */
- case SC0TXB:
- case SC1TXB:
- case SC2TXB:
- HW_TRACE ((me, "write - txb%d has %c, nrbytes=%d.\n",
- serial_reg-SC0TXB, *(char *)source, nr_bytes));
- write_txb(me, serial, serial_reg-SC0TXB, source, nr_bytes);
- break;
-
- /* reception buffers */
- case SC0RXB:
- case SC1RXB:
- case SC2RXB:
- hw_abort(me, "Cannot write to reception buffer.");
- break;
-
- /* status registers */
- case SC0STR:
- case SC1STR:
- case SC2STR:
- hw_abort(me, "Cannot write to status register.");
- break;
-
- case SC2TIM:
- HW_TRACE ((me, "read - serial2 timer reg %d (nrbytes=%d)\n",
- *(unsigned8 *)source, nr_bytes));
- write_serial2_timer_reg(me, serial, source, nr_bytes);
- break;
-
- default:
- hw_abort(me, "invalid address");
- }
-
- return nr_bytes;
-}
-
-
-const struct hw_descriptor dv_mn103ser_descriptor[] = {
- { "mn103ser", mn103ser_finish, },
- { NULL },
-};
diff --git a/sim/mn10300/dv-mn103tim.c b/sim/mn10300/dv-mn103tim.c
deleted file mode 100644
index cd79f918fbf..00000000000
--- a/sim/mn10300/dv-mn103tim.c
+++ /dev/null
@@ -1,1032 +0,0 @@
-/* This file is part of the program GDB, the GNU debugger.
-
- Copyright (C) 1998 Free Software Foundation, Inc.
- Contributed by Cygnus Solutions.
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-#include "sim-main.h"
-#include "hw-main.h"
-#include "sim-assert.h"
-
-/* DEVICE
-
-
- mn103tim - mn103002 timers (8 and 16 bit)
-
-
- DESCRIPTION
-
- Implements the mn103002 8 and 16 bit timers as described in the mn103002 user guide.
-
-
- PROPERTIES
-
- reg = <8bit-timers-addr> <8bit-timers-size> <16bit-timers-addr> <16bit-timers-size>
-
-
- BUGS
-
- */
-
-
-/* The timers' register address blocks */
-
-struct mn103tim_block {
- unsigned_word base;
- unsigned_word bound;
-};
-
-enum { TIMER8_BLOCK, TIMER16_BLOCK, NR_TIMER_BLOCKS };
-
-enum timer_register_types {
- FIRST_MODE_REG = 0,
- TM0MD = FIRST_MODE_REG,
- TM1MD,
- TM2MD,
- TM3MD,
- TM4MD,
- TM5MD,
- TM6MD,
- LAST_MODE_REG = TM6MD,
- FIRST_BASE_REG,
- TM0BR = FIRST_BASE_REG,
- TM1BR,
- TM2BR,
- TM3BR,
- TM4BR,
- TM5BR,
- LAST_BASE_REG = TM5BR,
- FIRST_COUNTER,
- TM0BC = FIRST_COUNTER,
- TM1BC,
- TM2BC,
- TM3BC,
- TM4BC,
- TM5BC,
- TM6BC,
- LAST_COUNTER = TM6BC,
- TM6MDA,
- TM6MDB,
- TM6CA,
- TM6CB,
- LAST_TIMER_REG = TM6BC,
-};
-
-
-/* Don't include timer 6 because it's handled specially. */
-#define NR_8BIT_TIMERS 4
-#define NR_16BIT_TIMERS 2
-#define NR_REG_TIMERS 6 /* Exclude timer 6 - it's handled specially. */
-#define NR_TIMERS 7
-
-typedef struct _mn10300_timer_regs {
- unsigned32 base;
- unsigned8 mode;
-} mn10300_timer_regs;
-
-typedef struct _mn10300_timer {
- unsigned32 div_ratio, start;
- struct hw_event *event;
-} mn10300_timer;
-
-
-struct mn103tim {
- struct mn103tim_block block[NR_TIMER_BLOCKS];
- mn10300_timer_regs reg[NR_REG_TIMERS];
- mn10300_timer timer[NR_TIMERS];
-
- /* treat timer 6 registers specially. */
- unsigned16 tm6md0, tm6md1, tm6bc, tm6ca, tm6cb;
- unsigned8 tm6mda, tm6mdb; /* compare/capture mode regs for timer 6 */
-};
-
-/* output port ID's */
-
-/* for mn103002 */
-enum {
- TIMER0_UFLOW,
- TIMER1_UFLOW,
- TIMER2_UFLOW,
- TIMER3_UFLOW,
- TIMER4_UFLOW,
- TIMER5_UFLOW,
- TIMER6_UFLOW,
- TIMER6_CMPA,
- TIMER6_CMPB,
-};
-
-
-static const struct hw_port_descriptor mn103tim_ports[] = {
-
- { "timer-0-underflow", TIMER0_UFLOW, 0, output_port, },
- { "timer-1-underflow", TIMER1_UFLOW, 0, output_port, },
- { "timer-2-underflow", TIMER2_UFLOW, 0, output_port, },
- { "timer-3-underflow", TIMER3_UFLOW, 0, output_port, },
- { "timer-4-underflow", TIMER4_UFLOW, 0, output_port, },
- { "timer-5-underflow", TIMER5_UFLOW, 0, output_port, },
-
- { "timer-6-underflow", TIMER6_UFLOW, 0, output_port, },
- { "timer-6-compare-a", TIMER6_CMPA, 0, output_port, },
- { "timer-6-compare-b", TIMER6_CMPB, 0, output_port, },
-
- { NULL, },
-};
-
-#define bits2to5_mask 0x3c
-#define bits0to2_mask 0x07
-#define load_mask 0x40
-#define count_mask 0x80
-#define count_and_load_mask (load_mask | count_mask)
-#define clock_mask 0x03
-#define clk_ioclk 0x00
-#define clk_cascaded 0x03
-
-
-/* Finish off the partially created hw device. Attach our local
- callbacks. Wire up our port names etc */
-
-static hw_io_read_buffer_method mn103tim_io_read_buffer;
-static hw_io_write_buffer_method mn103tim_io_write_buffer;
-
-static void
-attach_mn103tim_regs (struct hw *me,
- struct mn103tim *timers)
-{
- int i;
- if (hw_find_property (me, "reg") == NULL)
- hw_abort (me, "Missing \"reg\" property");
- for (i = 0; i < NR_TIMER_BLOCKS; i++)
- {
- unsigned_word attach_address;
- int attach_space;
- unsigned attach_size;
- reg_property_spec reg;
- if (!hw_find_reg_array_property (me, "reg", i, &reg))
- hw_abort (me, "\"reg\" property must contain three addr/size entries");
- hw_unit_address_to_attach_address (hw_parent (me),
- &reg.address,
- &attach_space,
- &attach_address,
- me);
- timers->block[i].base = attach_address;
- hw_unit_size_to_attach_size (hw_parent (me),
- &reg.size,
- &attach_size, me);
- timers->block[i].bound = attach_address + (attach_size - 1);
- hw_attach_address (hw_parent (me),
- 0,
- attach_space, attach_address, attach_size,
- me);
- }
-}
-
-static void
-mn103tim_finish (struct hw *me)
-{
- struct mn103tim *timers;
- int i;
-
- timers = HW_ZALLOC (me, struct mn103tim);
- set_hw_data (me, timers);
- set_hw_io_read_buffer (me, mn103tim_io_read_buffer);
- set_hw_io_write_buffer (me, mn103tim_io_write_buffer);
- set_hw_ports (me, mn103tim_ports);
-
- /* Attach ourself to our parent bus */
- attach_mn103tim_regs (me, timers);
-
- /* Initialize the timers */
- for ( i=0; i < NR_REG_TIMERS; ++i )
- {
- timers->reg[i].mode = 0x00;
- timers->reg[i].base = 0;
- }
- for ( i=0; i < NR_TIMERS; ++i )
- {
- timers->timer[i].event = NULL;
- timers->timer[i].div_ratio = 0;
- timers->timer[i].start = 0;
- }
- timers->tm6md0 = 0x00;
- timers->tm6md1 = 0x00;
- timers->tm6bc = 0x0000;
- timers->tm6ca = 0x0000;
- timers->tm6cb = 0x0000;
- timers->tm6mda = 0x00;
- timers->tm6mdb = 0x00;
-}
-
-
-
-/* read and write */
-
-static int
-decode_addr (struct hw *me,
- struct mn103tim *timers,
- unsigned_word address)
-{
- unsigned_word offset;
- offset = address - timers->block[0].base;
-
- switch (offset)
- {
- case 0x00: return TM0MD;
- case 0x01: return TM1MD;
- case 0x02: return TM2MD;
- case 0x03: return TM3MD;
- case 0x10: return TM0BR;
- case 0x11: return TM1BR;
- case 0x12: return TM2BR;
- case 0x13: return TM3BR;
- case 0x20: return TM0BC;
- case 0x21: return TM1BC;
- case 0x22: return TM2BC;
- case 0x23: return TM3BC;
- case 0x80: return TM4MD;
- case 0x82: return TM5MD;
- case 0x84: /* fall through */
- case 0x85: return TM6MD;
- case 0x90: return TM4BR;
- case 0x92: return TM5BR;
- case 0xa0: return TM4BC;
- case 0xa2: return TM5BC;
- case 0xa4: return TM6BC;
- case 0xb4: return TM6MDA;
- case 0xb5: return TM6MDB;
- case 0xc4: return TM6CA;
- case 0xd4: return TM6CB;
- default:
- {
- hw_abort (me, "bad address");
- return -1;
- }
- }
-}
-
-static void
-read_mode_reg (struct hw *me,
- struct mn103tim *timers,
- int timer_nr,
- void *dest,
- unsigned nr_bytes)
-{
- unsigned16 val16;
- unsigned32 val32;
-
- switch ( nr_bytes )
- {
- case 1:
- /* Accessing 1 byte is ok for all mode registers. */
- if ( timer_nr == 6 )
- {
- *(unsigned8*)dest = timers->tm6md0;
- }
- else
- {
- *(unsigned8*)dest = timers->reg[timer_nr].mode;
- }
- break;
-
- case 2:
- if ( timer_nr == 6 )
- {
- *(unsigned16 *)dest = (timers->tm6md0 << 8) | timers->tm6md1;
- }
- else if ( timer_nr == 0 || timer_nr == 2 )
- {
- val16 = (timers->reg[timer_nr].mode << 8)
- | timers->reg[timer_nr+1].mode;
- *(unsigned16*)dest = val16;
- }
- else
- {
- hw_abort (me, "bad read size of 2 bytes to TM%dMD.", timer_nr);
- }
- break;
-
- case 4:
- if ( timer_nr == 0 )
- {
- val32 = (timers->reg[0].mode << 24 )
- | (timers->reg[1].mode << 16)
- | (timers->reg[2].mode << 8)
- | timers->reg[3].mode;
- *(unsigned32*)dest = val32;
- }
- else
- {
- hw_abort (me, "bad read size of 4 bytes to TM%dMD.", timer_nr);
- }
- break;
-
- default:
- hw_abort (me, "bad read size of %d bytes to TM%dMD.",
- nr_bytes, timer_nr);
- }
-}
-
-
-static void
-read_base_reg (struct hw *me,
- struct mn103tim *timers,
- int timer_nr,
- void *dest,
- unsigned nr_bytes)
-{
- unsigned16 val16;
- unsigned32 val32;
-
- /* Check nr_bytes: accesses of 1, 2 and 4 bytes allowed depending on timer. */
- switch ( nr_bytes )
- {
- case 1:
- /* Reading 1 byte is ok for all registers. */
- if ( timer_nr < NR_8BIT_TIMERS )
- {
- *(unsigned8*)dest = timers->reg[timer_nr].base;
- }
- break;
-
- case 2:
- if ( timer_nr == 1 || timer_nr == 3 )
- {
- hw_abort (me, "bad read size of 2 bytes to TM%dBR.", timer_nr);
- }
- else
- {
- if ( timer_nr < NR_8BIT_TIMERS )
- {
- val16 = (timers->reg[timer_nr].base<<8)
- | timers->reg[timer_nr+1].base;
- }
- else
- {
- val16 = timers->reg[timer_nr].base;
- }
- *(unsigned16*)dest = val16;
- }
- break;
-
- case 4:
- if ( timer_nr == 0 )
- {
- val32 = (timers->reg[0].base << 24) | (timers->reg[1].base << 16)
- | (timers->reg[2].base << 8) | timers->reg[3].base;
- *(unsigned32*)dest = val32;
- }
- else if ( timer_nr == 4 )
- {
- val32 = (timers->reg[4].base << 16) | timers->reg[5].base;
- *(unsigned32*)dest = val32;
- }
- else
- {
- hw_abort (me, "bad read size of 4 bytes to TM%dBR.", timer_nr);
- }
- break;
-
- default:
- hw_abort (me, "bad read size must of %d bytes to TM%dBR.",
- nr_bytes, timer_nr);
- }
-}
-
-
-static void
-read_counter (struct hw *me,
- struct mn103tim *timers,
- int timer_nr,
- void *dest,
- unsigned nr_bytes)
-{
- unsigned32 val;
-
- if ( NULL == timers->timer[timer_nr].event )
- {
- /* Timer is not counting, use value in base register. */
- if ( timer_nr == 6 )
- {
- val = 0; /* timer 6 is an up counter */
- }
- else
- {
- val = timers->reg[timer_nr].base;
- }
- }
- else
- {
- if ( timer_nr == 6 ) /* timer 6 is an up counter. */
- {
- val = hw_event_queue_time(me) - timers->timer[timer_nr].start;
- }
- else
- {
- /* ticks left = start time + div ratio - curr time */
- /* Cannot use base register because it can be written during counting and it
- doesn't affect counter until underflow occurs. */
-
- val = timers->timer[timer_nr].start + timers->timer[timer_nr].div_ratio
- - hw_event_queue_time(me);
- }
- }
-
- switch (nr_bytes) {
- case 1:
- *(unsigned8 *)dest = val;
- break;
-
- case 2:
- *(unsigned16 *)dest = val;
- break;
-
- case 4:
- *(unsigned32 *)dest = val;
- break;
-
- default:
- hw_abort(me, "bad read size for reading counter");
- }
-
-}
-
-
-static void
-read_special_timer6_reg (struct hw *me,
- struct mn103tim *timers,
- int timer_nr,
- void *dest,
- unsigned nr_bytes)
-{
- unsigned32 val;
-
- switch (nr_bytes) {
- case 1:
- {
- switch ( timer_nr ) {
- case TM6MDA:
- *(unsigned8 *)dest = timers->tm6mda;
- break;
-
- case TM6MDB:
- *(unsigned8 *)dest = timers->tm6mdb;
- break;
-
- case TM6CA:
- *(unsigned8 *)dest = timers->tm6ca;
- break;
-
- case TM6CB:
- *(unsigned8 *)dest = timers->tm6cb;
- break;
-
- default:
- }
- break;
- }
-
- case 2:
- if ( timer_nr == TM6CA )
- {
- *(unsigned16 *)dest = timers->tm6ca;
- }
- else if ( timer_nr == TM6CB )
- {
- *(unsigned16 *)dest = timers->tm6cb;
- }
- else
- {
- hw_abort(me, "bad read size for timer 6 mode A/B register");
- }
- break;
-
- default:
- hw_abort(me, "bad read size for timer 6 register");
- }
-
-}
-
-
-static unsigned
-mn103tim_io_read_buffer (struct hw *me,
- void *dest,
- int space,
- unsigned_word base,
- unsigned nr_bytes)
-{
- struct mn103tim *timers = hw_data (me);
- enum timer_register_types timer_reg;
-
- HW_TRACE ((me, "read 0x%08lx %d", (long) base, (int) nr_bytes));
-
- timer_reg = decode_addr (me, timers, base);
-
- /* It can be either a mode register, a base register, a binary counter, */
- /* or a special timer 6 register. Check in that order. */
- if ( timer_reg >= FIRST_MODE_REG && timer_reg <= LAST_MODE_REG )
- {
- read_mode_reg(me, timers, timer_reg-FIRST_MODE_REG, dest, nr_bytes);
- }
- else if ( timer_reg <= LAST_BASE_REG )
- {
- read_base_reg(me, timers, timer_reg-FIRST_BASE_REG, dest, nr_bytes);
- }
- else if ( timer_reg <= LAST_COUNTER )
- {
- read_counter(me, timers, timer_reg-FIRST_COUNTER, dest, nr_bytes);
- }
- else if ( timer_reg <= LAST_TIMER_REG )
- {
- read_special_timer6_reg(me, timers, timer_reg, dest, nr_bytes);
- }
- else
- {
- hw_abort(me, "invalid timer register address.");
- }
-
- return nr_bytes;
-}
-
-
-static void
-do_counter_event (struct hw *me,
- void *data)
-{
- struct mn103tim *timers = hw_data(me);
- int timer_nr = (int) data;
- int next_timer;
-
- /* Check if counting is still enabled. */
- if ( (timers->reg[timer_nr].mode & count_mask) != 0 )
- {
- /* Generate an interrupt for the timer underflow (TIMERn_UFLOW). */
-
- /* Port event occurs on port of last cascaded timer. */
- /* This works across timer range from 0 to NR_REG_TIMERS because */
- /* the first 16 bit timer (timer 4) is not allowed to be set as */
- /* a cascading timer. */
- for ( next_timer = timer_nr+1; next_timer < NR_REG_TIMERS; ++next_timer )
- {
- if ( (timers->reg[next_timer].mode & clock_mask) != clk_cascaded )
- {
- break;
- }
- }
- hw_port_event (me, next_timer-1, 1);
-
- /* Schedule next timeout. */
- timers->timer[timer_nr].start = hw_event_queue_time(me);
- /* FIX: Check if div_ratio has changed and if it's now 0. */
- timers->timer[timer_nr].event
- = hw_event_queue_schedule (me, timers->timer[timer_nr].div_ratio,
- do_counter_event, (void *)timer_nr);
- }
- else
- {
- timers->timer[timer_nr].event = NULL;
- }
-
-}
-
-
-static void
-do_counter6_event (struct hw *me,
- void *data)
-{
- struct mn103tim *timers = hw_data(me);
- int timer_nr = (int) data;
- int next_timer;
-
- /* Check if counting is still enabled. */
- if ( (timers->reg[timer_nr].mode & count_mask) != 0 )
- {
- /* Generate an interrupt for the timer underflow (TIMERn_UFLOW). */
- hw_port_event (me, timer_nr, 1);
-
- /* Schedule next timeout. */
- timers->timer[timer_nr].start = hw_event_queue_time(me);
- /* FIX: Check if div_ratio has changed and if it's now 0. */
- timers->timer[timer_nr].event
- = hw_event_queue_schedule (me, timers->timer[timer_nr].div_ratio,
- do_counter6_event, (void *)timer_nr);
- }
- else
- {
- timers->timer[timer_nr].event = NULL;
- }
-
-}
-
-static void
-write_base_reg (struct hw *me,
- struct mn103tim *timers,
- int timer_nr,
- const void *source,
- unsigned nr_bytes)
-{
- unsigned i;
- const unsigned8 *buf8 = source;
- const unsigned16 *buf16 = source;
-
- /* If TMnCNE == 0 (counting is off), writing to the base register
- (TMnBR) causes a simultaneous write to the counter reg (TMnBC).
- Else, the TMnBC is reloaded with the value from TMnBR when
- underflow occurs. Since the counter register is not explicitly
- maintained, this functionality is handled in read_counter. */
-
- /* Check nr_bytes: write of 1, 2 or 4 bytes allowed depending on timer. */
- switch ( nr_bytes )
- {
- case 1:
- /* Storing 1 byte is ok for all registers. */
- timers->reg[timer_nr].base = buf8[0];
- break;
-
- case 2:
- if ( timer_nr == 1 || timer_nr == 3 )
- {
- hw_abort (me, "bad write size of 2 bytes to TM%dBR.", timer_nr);
- }
- else
- {
- if ( timer_nr < NR_8BIT_TIMERS )
- {
- timers->reg[timer_nr].base = buf8[0];
- timers->reg[timer_nr+1].base = buf8[1];
- }
- else
- {
- timers->reg[timer_nr].base = buf16[0];
- }
- }
- break;
-
- case 4:
- if ( timer_nr == 0 )
- {
- timers->reg[0].base = buf8[0];
- timers->reg[1].base = buf8[1];
- timers->reg[2].base = buf8[2];
- timers->reg[3].base = buf8[3];
- }
- else if ( timer_nr == 4 )
- {
- timers->reg[4].base = buf16[0];
- timers->reg[5].base = buf16[1];
- }
- else
- {
- hw_abort (me, "bad write size of 4 bytes to TM%dBR.", timer_nr);
- }
- break;
-
- default:
- hw_abort (me, "bad write size must of %d bytes to TM%dBR.",
- nr_bytes, timer_nr);
- }
-
-}
-
-static void
-write_mode_reg (struct hw *me,
- struct mn103tim *timers,
- int timer_nr,
- const void *source,
- unsigned nr_bytes)
- /* for timers 0 to 5 */
-{
- unsigned i;
- unsigned8 mode_val, next_mode_val;
- unsigned32 div_ratio;
-
- if ( nr_bytes != 1 )
- {
- hw_abort (me, "bad write size of %d bytes to TM%dMD.", nr_bytes, timer_nr);
- }
-
- mode_val = *(unsigned8 *)source;
- timers->reg[timer_nr].mode = mode_val;
-
- if ( ( mode_val & count_and_load_mask ) == count_and_load_mask )
- {
- hw_abort(me, "Cannot load base reg and start counting simultaneously.");
- }
- if ( ( mode_val & bits2to5_mask ) != 0 )
- {
- hw_abort(me, "Cannot write to bits 2 to 5 of mode register");
- }
-
- if ( mode_val & count_mask )
- {
- /* - de-schedule any previous event. */
- /* - add new event to queue to start counting. */
- /* - assert that counter == base reg? */
-
- /* For cascaded timers, */
- if ( (mode_val & clock_mask) == clk_cascaded )
- {
- if ( timer_nr == 0 || timer_nr == 4 )
- {
- hw_abort(me, "Timer %d cannot be cascaded.", timer_nr);
- }
- }
- else
- {
- div_ratio = timers->reg[timer_nr].base;
-
- /* Check for cascading. */
- if ( timer_nr < NR_8BIT_TIMERS )
- {
- for ( i = timer_nr + 1; i <= 3; ++i )
- {
- next_mode_val = timers->reg[i].mode;
- if ( ( next_mode_val & clock_mask ) == clk_cascaded )
- {
- /* Check that CNE is on. */
- if ( ( next_mode_val & count_mask ) == 0 )
- {
- hw_abort (me, "cascaded timer not ready for counting");
- }
- ASSERT(timers->timer[i].event == NULL);
- ASSERT(timers->timer[i].div_ratio == 0);
- div_ratio = div_ratio
- | (timers->reg[i].base << (8*(i-timer_nr)));
- }
- else
- {
- break;
- }
- }
- }
- else
- {
- /* Mode register for a 16 bit timer */
- next_mode_val = timers->reg[timer_nr+1].mode;
- if ( ( next_mode_val & clock_mask ) == clk_cascaded )
- {
- /* Check that CNE is on. */
- if ( ( next_mode_val & count_mask ) == 0 )
- {
- hw_abort (me, "cascaded timer not ready for counting");
- }
- ASSERT(timers->timer[timer_nr+1].event == NULL);
- ASSERT(timers->timer[timer_nr+1].div_ratio == 0);
- div_ratio = div_ratio | (timers->reg[timer_nr+1].base << 16);
- }
- }
-
- timers->timer[timer_nr].div_ratio = div_ratio;
-
- if ( NULL != timers->timer[timer_nr].event )
- {
- hw_event_queue_deschedule (me, timers->timer[timer_nr].event);
- timers->timer[timer_nr].event = NULL;
- }
-
- if ( div_ratio > 0 )
- {
- /* Set start time. */
- timers->timer[timer_nr].start = hw_event_queue_time(me);
- timers->timer[timer_nr].event
- = hw_event_queue_schedule(me, div_ratio,
- do_counter_event,
- (void *)(timer_nr));
- }
- }
- }
- else
- {
- /* Turn off counting */
- if ( NULL != timers->timer[timer_nr].event )
- {
- ASSERT((timers->reg[timer_nr].mode & clock_mask) != clk_cascaded);
- hw_event_queue_deschedule (me, timers->timer[timer_nr].event);
- timers->timer[timer_nr].event = NULL;
- }
- else
- {
- if ( (timers->reg[timer_nr].mode & clock_mask) == clk_cascaded )
- {
- ASSERT(timers->timer[timer_nr].event == NULL);
- }
- }
-
- }
-
-}
-
-static void
-write_tm6md (struct hw *me,
- struct mn103tim *timers,
- unsigned_word address,
- const void *source,
- unsigned nr_bytes)
-{
- unsigned8 mode_val0 = 0x00, mode_val1 = 0x00;
- unsigned32 div_ratio;
- int timer_nr = 6;
-
- unsigned_word offset = address - timers->block[0].base;
-
- if ((offset != 0x84 && nr_bytes > 1) || nr_bytes > 2 )
- {
- hw_abort (me, "Bad write size of %d bytes to TM6MD", nr_bytes);
- }
-
- if ( offset == 0x84 ) /* address of TM6MD */
- {
- /* Fill in first byte of mode */
- mode_val0 = *(unsigned8 *)source;
- timers->tm6md0 = mode_val0;
-
- if ( ( mode_val0 & 0x26 ) != 0 )
- {
- hw_abort(me, "Cannot write to bits 5, 3, and 2 of TM6MD");
- }
- }
-
- if ( offset == 0x85 || nr_bytes == 2 )
- {
- /* Fill in second byte of mode */
- if ( nr_bytes == 2 )
- {
- mode_val1 = *(unsigned8 *)source+1;
- }
- else
- {
- mode_val1 = *(unsigned8 *)source;
- }
-
- timers->tm6md1 = mode_val1;
-
- if ( ( mode_val1 & count_and_load_mask ) == count_and_load_mask )
- {
- hw_abort(me, "Cannot load base reg and start counting simultaneously.");
- }
- if ( ( mode_val1 & bits0to2_mask ) != 0 )
- {
- hw_abort(me, "Cannot write to bits 8 to 10 of TM6MD");
- }
- }
-
- if ( mode_val1 & count_mask )
- {
- /* - de-schedule any previous event. */
- /* - add new event to queue to start counting. */
- /* - assert that counter == base reg? */
-
- div_ratio = timers->tm6ca; /* binary counter for timer 6 */
- timers->timer[timer_nr].div_ratio = div_ratio;
- if ( NULL != timers->timer[timer_nr].event )
- {
- hw_event_queue_deschedule (me, timers->timer[timer_nr].event);
- timers->timer[timer_nr].event = NULL;
- }
-
- if ( div_ratio > 0 )
- {
- /* Set start time. */
- timers->timer[timer_nr].start = hw_event_queue_time(me);
- timers->timer[timer_nr].event
- = hw_event_queue_schedule(me, div_ratio,
- do_counter6_event,
- (void *)(timer_nr));
- }
- }
- else
- {
- /* Turn off counting */
- if ( NULL != timers->timer[timer_nr].event )
- {
- hw_event_queue_deschedule (me, timers->timer[timer_nr].event);
- timers->timer[timer_nr].event = NULL;
- }
- }
-}
-
-
-
-static void
-write_special_timer6_reg (struct hw *me,
- struct mn103tim *timers,
- int timer_nr,
- const void *source,
- unsigned nr_bytes)
-{
- unsigned32 val;
-
- switch (nr_bytes) {
- case 1:
- {
- switch ( timer_nr ) {
- case TM6MDA:
- timers->tm6mda = *(unsigned8 *)source;
- break;
-
- case TM6MDB:
- timers->tm6mdb = *(unsigned8 *)source;
- break;
-
- case TM6CA:
- timers->tm6ca = *(unsigned8 *)source;
- break;
-
- case TM6CB:
- timers->tm6cb = *(unsigned8 *)source;
- break;
-
- default:
- }
- break;
- }
-
- case 2:
- if ( timer_nr == TM6CA )
- {
- timers->tm6ca = *(unsigned16 *)source;
- }
- else if ( timer_nr == TM6CB )
- {
- timers->tm6cb = *(unsigned16 *)source;
- }
- else
- {
- hw_abort(me, "bad read size for timer 6 mode A/B register");
- }
- break;
-
- default:
- hw_abort(me, "bad read size for timer 6 register");
- }
-
-}
-
-
-static unsigned
-mn103tim_io_write_buffer (struct hw *me,
- const void *source,
- int space,
- unsigned_word base,
- unsigned nr_bytes)
-{
- struct mn103tim *timers = hw_data (me);
- enum timer_register_types timer_reg;
-
- HW_TRACE ((me, "write to 0x%08lx length %d with 0x%x", (long) base,
- (int) nr_bytes, *(unsigned32 *)source));
-
- timer_reg = decode_addr (me, timers, base);
-
- /* It can be either a mode register, a base register, a binary counter, */
- /* or a special timer 6 register. Check in that order. */
- if ( timer_reg <= LAST_MODE_REG )
- {
- if ( timer_reg == 6 )
- {
- write_tm6md(me, timers, base, source, nr_bytes);
- }
- else
- {
- write_mode_reg(me, timers, timer_reg-FIRST_MODE_REG,
- source, nr_bytes);
- }
- }
- else if ( timer_reg <= LAST_BASE_REG )
- {
- write_base_reg(me, timers, timer_reg-FIRST_BASE_REG, source, nr_bytes);
- }
- else if ( timer_reg <= LAST_COUNTER )
- {
- hw_abort(me, "cannot write to counter");
- }
- else if ( timer_reg <= LAST_TIMER_REG )
- {
- write_special_timer6_reg(me, timers, timer_reg, source, nr_bytes);
- }
- else
- {
- hw_abort(me, "invalid reg type");
- }
-
- return nr_bytes;
-}
-
-
-const struct hw_descriptor dv_mn103tim_descriptor[] = {
- { "mn103tim", mn103tim_finish, },
- { NULL },
-};
diff --git a/sim/mn10300/gencode.c b/sim/mn10300/gencode.c
deleted file mode 100644
index bef312c0e83..00000000000
--- a/sim/mn10300/gencode.c
+++ /dev/null
@@ -1,163 +0,0 @@
-#include "mn10300_sim.h"
-
-static void write_header PARAMS ((void));
-static void write_opcodes PARAMS ((void));
-static void write_template PARAMS ((void));
-
-long Opcodes[512];
-static int curop=0;
-
-int
-main (argc, argv)
- int argc;
- char *argv[];
-{
- if ((argc > 1) && (strcmp (argv[1], "-h") == 0))
- write_header();
- else if ((argc > 1) && (strcmp (argv[1], "-t") == 0))
- write_template ();
- else
- write_opcodes();
- return 0;
-}
-
-
-static void
-write_header ()
-{
- struct mn10300_opcode *opcode;
-
- for (opcode = (struct mn10300_opcode *)mn10300_opcodes; opcode->name; opcode++)
- printf("void OP_%X PARAMS ((unsigned long, unsigned long));\t\t/* %s */\n",
- opcode->opcode, opcode->name);
-}
-
-
-/* write_template creates a file all required functions, ready */
-/* to be filled out */
-
-static void
-write_template ()
-{
- struct mn10300_opcode *opcode;
- int i,j;
-
- printf ("#include \"mn10300_sim.h\"\n");
- printf ("#include \"simops.h\"\n");
-
- for (opcode = (struct mn10300_opcode *)mn10300_opcodes; opcode->name; opcode++)
- {
- printf("/* %s */\nvoid\nOP_%X (insn, extension)\n unsigned long insn, extension;\n{\n", opcode->name, opcode->opcode);
-
- /* count operands */
- j = 0;
- for (i = 0; i < 6; i++)
- {
- int flags = mn10300_operands[opcode->operands[i]].flags;
-
- if (flags)
- j++;
- }
- switch (j)
- {
- case 0:
- printf ("printf(\" %s\\n\");\n", opcode->name);
- break;
- case 1:
- printf ("printf(\" %s\\t%%x\\n\", OP[0]);\n", opcode->name);
- break;
- case 2:
- printf ("printf(\" %s\\t%%x,%%x\\n\",OP[0],OP[1]);\n",
- opcode->name);
- break;
- case 3:
- printf ("printf(\" %s\\t%%x,%%x,%%x\\n\",OP[0],OP[1],OP[2]);\n",
- opcode->name);
- break;
- default:
- fprintf (stderr,"Too many operands: %d\n", j);
- }
- printf ("}\n\n");
- }
-}
-
-static void
-write_opcodes ()
-{
- struct mn10300_opcode *opcode;
- int i, j;
- int numops;
-
- /* write out opcode table */
- printf ("#include \"mn10300_sim.h\"\n");
- printf ("#include \"simops.h\"\n\n");
- printf ("struct simops Simops[] = {\n");
-
- for (opcode = (struct mn10300_opcode *)mn10300_opcodes; opcode->name; opcode++)
- {
- int size;
-
- if (opcode->format == FMT_S0)
- size = 1;
- else if (opcode->format == FMT_S1
- || opcode->format == FMT_D0)
- size = 2;
- else if (opcode->format == FMT_S2
- || opcode->format == FMT_D1)
- size = 3;
- else if (opcode->format == FMT_S4)
- size = 5;
- else if (opcode->format == FMT_D2)
- size = 4;
- else if (opcode->format == FMT_D4)
- size = 6;
- else
- size = 7;
-
- printf (" { 0x%x,0x%x,OP_%X,%d,%d,",
- opcode->opcode, opcode->mask, opcode->opcode,
- size, opcode->format);
-
- Opcodes[curop++] = opcode->opcode;
-
- /* count operands */
- j = 0;
- for (i = 0; i < 6; i++)
- {
- int flags = mn10300_operands[opcode->operands[i]].flags;
-
- if (flags)
- j++;
- }
- printf ("%d,{",j);
-
- j = 0;
- numops = 0;
- for (i = 0; i < 6; i++)
- {
- int flags = mn10300_operands[opcode->operands[i]].flags;
- int shift = mn10300_operands[opcode->operands[i]].shift;
-
- if (flags)
- {
- if (j)
- printf (", ");
- printf ("%d,%d,%d", shift,
- mn10300_operands[opcode->operands[i]].bits,flags);
- j = 1;
- numops++;
- }
- }
-
- switch (numops)
- {
- case 0:
- printf ("0,0,0");
- case 1:
- printf (",0,0,0");
- }
-
- printf ("}},\n");
- }
- printf ("{ 0,0,NULL,0,0,0,{0,0,0,0,0,0}},\n};\n");
-}
diff --git a/sim/mn10300/interp.c b/sim/mn10300/interp.c
deleted file mode 100644
index 2003c2d9bcd..00000000000
--- a/sim/mn10300/interp.c
+++ /dev/null
@@ -1,1422 +0,0 @@
-#include <signal.h>
-
-#if WITH_COMMON
-#include "sim-main.h"
-#include "sim-options.h"
-#include "sim-hw.h"
-#else
-#include "mn10300_sim.h"
-#endif
-
-#include "sysdep.h"
-#include "bfd.h"
-#include "sim-assert.h"
-
-
-#ifdef HAVE_STDLIB_H
-#include <stdlib.h>
-#endif
-
-#ifdef HAVE_STRING_H
-#include <string.h>
-#else
-#ifdef HAVE_STRINGS_H
-#include <strings.h>
-#endif
-#endif
-
-#include "bfd.h"
-
-#ifndef INLINE
-#ifdef __GNUC__
-#define INLINE inline
-#else
-#define INLINE
-#endif
-#endif
-
-
-host_callback *mn10300_callback;
-int mn10300_debug;
-struct _state State;
-
-
-/* simulation target board. NULL=default configuration */
-static char* board = NULL;
-
-static DECLARE_OPTION_HANDLER (mn10300_option_handler);
-
-enum {
- OPTION_BOARD = OPTION_START,
-};
-
-static SIM_RC
-mn10300_option_handler (sd, cpu, opt, arg, is_command)
- SIM_DESC sd;
- sim_cpu *cpu;
- int opt;
- char *arg;
- int is_command;
-{
- int cpu_nr;
- switch (opt)
- {
- case OPTION_BOARD:
- {
- if (arg)
- {
- board = zalloc(strlen(arg) + 1);
- strcpy(board, arg);
- }
- return SIM_RC_OK;
- }
- }
-
- return SIM_RC_OK;
-}
-
-static const OPTION mn10300_options[] =
-{
-#define BOARD_AM32 "stdeval1"
- { {"board", required_argument, NULL, OPTION_BOARD},
- '\0', "none" /* rely on compile-time string concatenation for other options */
- "|" BOARD_AM32
- , "Customize simulation for a particular board.", mn10300_option_handler },
-
- { {NULL, no_argument, NULL, 0}, '\0', NULL, NULL, NULL }
-};
-
-#if WITH_COMMON
-#else
-static void dispatch PARAMS ((uint32, uint32, int));
-static long hash PARAMS ((long));
-static void init_system PARAMS ((void));
-
-static SIM_OPEN_KIND sim_kind;
-static char *myname;
-#define MAX_HASH 127
-
-struct hash_entry
-{
- struct hash_entry *next;
- long opcode;
- long mask;
- struct simops *ops;
-#ifdef HASH_STAT
- unsigned long count;
-#endif
-};
-
-static int max_mem = 0;
-struct hash_entry hash_table[MAX_HASH+1];
-
-
-/* This probably doesn't do a very good job at bucket filling, but
- it's simple... */
-static INLINE long
-hash(insn)
- long insn;
-{
- /* These are one byte insns, we special case these since, in theory,
- they should be the most heavily used. */
- if ((insn & 0xffffff00) == 0)
- {
- switch (insn & 0xf0)
- {
- case 0x00:
- return 0x70;
-
- case 0x40:
- return 0x71;
-
- case 0x10:
- return 0x72;
-
- case 0x30:
- return 0x73;
-
- case 0x50:
- return 0x74;
-
- case 0x60:
- return 0x75;
-
- case 0x70:
- return 0x76;
-
- case 0x80:
- return 0x77;
-
- case 0x90:
- return 0x78;
-
- case 0xa0:
- return 0x79;
-
- case 0xb0:
- return 0x7a;
-
- case 0xe0:
- return 0x7b;
-
- default:
- return 0x7c;
- }
- }
-
- /* These are two byte insns */
- if ((insn & 0xffff0000) == 0)
- {
- if ((insn & 0xf000) == 0x2000
- || (insn & 0xf000) == 0x5000)
- return ((insn & 0xfc00) >> 8) & 0x7f;
-
- if ((insn & 0xf000) == 0x4000)
- return ((insn & 0xf300) >> 8) & 0x7f;
-
- if ((insn & 0xf000) == 0x8000
- || (insn & 0xf000) == 0x9000
- || (insn & 0xf000) == 0xa000
- || (insn & 0xf000) == 0xb000)
- return ((insn & 0xf000) >> 8) & 0x7f;
-
- if ((insn & 0xff00) == 0xf000
- || (insn & 0xff00) == 0xf100
- || (insn & 0xff00) == 0xf200
- || (insn & 0xff00) == 0xf500
- || (insn & 0xff00) == 0xf600)
- return ((insn & 0xfff0) >> 4) & 0x7f;
-
- if ((insn & 0xf000) == 0xc000)
- return ((insn & 0xff00) >> 8) & 0x7f;
-
- return ((insn & 0xffc0) >> 6) & 0x7f;
- }
-
- /* These are three byte insns. */
- if ((insn & 0xff000000) == 0)
- {
- if ((insn & 0xf00000) == 0x000000)
- return ((insn & 0xf30000) >> 16) & 0x7f;
-
- if ((insn & 0xf00000) == 0x200000
- || (insn & 0xf00000) == 0x300000)
- return ((insn & 0xfc0000) >> 16) & 0x7f;
-
- if ((insn & 0xff0000) == 0xf80000)
- return ((insn & 0xfff000) >> 12) & 0x7f;
-
- if ((insn & 0xff0000) == 0xf90000)
- return ((insn & 0xfffc00) >> 10) & 0x7f;
-
- return ((insn & 0xff0000) >> 16) & 0x7f;
- }
-
- /* These are four byte or larger insns. */
- if ((insn & 0xf0000000) == 0xf0000000)
- return ((insn & 0xfff00000) >> 20) & 0x7f;
-
- return ((insn & 0xff000000) >> 24) & 0x7f;
-}
-
-static INLINE void
-dispatch (insn, extension, length)
- uint32 insn;
- uint32 extension;
- int length;
-{
- struct hash_entry *h;
-
- h = &hash_table[hash(insn)];
-
- while ((insn & h->mask) != h->opcode
- || (length != h->ops->length))
- {
- if (!h->next)
- {
- (*mn10300_callback->printf_filtered) (mn10300_callback,
- "ERROR looking up hash for 0x%x, PC=0x%x\n", insn, PC);
- exit(1);
- }
- h = h->next;
- }
-
-
-#ifdef HASH_STAT
- h->count++;
-#endif
-
- /* Now call the right function. */
- (h->ops->func)(insn, extension);
- PC += length;
-}
-
-void
-sim_size (power)
- int power;
-
-{
- if (State.mem)
- free (State.mem);
-
- max_mem = 1 << power;
- State.mem = (uint8 *) calloc (1, 1 << power);
- if (!State.mem)
- {
- (*mn10300_callback->printf_filtered) (mn10300_callback, "Allocation of main memory failed.\n");
- exit (1);
- }
-}
-
-static void
-init_system ()
-{
- if (!State.mem)
- sim_size(19);
-}
-
-int
-sim_write (sd, addr, buffer, size)
- SIM_DESC sd;
- SIM_ADDR addr;
- unsigned char *buffer;
- int size;
-{
- int i;
-
- init_system ();
-
- for (i = 0; i < size; i++)
- store_byte (addr + i, buffer[i]);
-
- return size;
-}
-
-/* Compare two opcode table entries for qsort. */
-static int
-compare_simops (arg1, arg2)
- const PTR arg1;
- const PTR arg2;
-{
- unsigned long code1 = ((struct simops *)arg1)->opcode;
- unsigned long code2 = ((struct simops *)arg2)->opcode;
-
- if (code1 < code2)
- return -1;
- if (code2 < code1)
- return 1;
- return 0;
-}
-
-SIM_DESC
-sim_open (kind, cb, abfd, argv)
- SIM_OPEN_KIND kind;
- host_callback *cb;
- struct _bfd *abfd;
- char **argv;
-{
- struct simops *s;
- struct hash_entry *h;
- char **p;
- int i;
-
- mn10300_callback = cb;
-
- /* Sort the opcode array from smallest opcode to largest.
- This will generally improve simulator performance as the smaller
- opcodes are generally preferred to the larger opcodes. */
- for (i = 0, s = Simops; s->func; s++, i++)
- ;
- qsort (Simops, i, sizeof (Simops[0]), compare_simops);
-
- sim_kind = kind;
- myname = argv[0];
-
- for (p = argv + 1; *p; ++p)
- {
- if (strcmp (*p, "-E") == 0)
- ++p; /* ignore endian spec */
- else
-#ifdef DEBUG
- if (strcmp (*p, "-t") == 0)
- mn10300_debug = DEBUG;
- else
-#endif
- (*mn10300_callback->printf_filtered) (mn10300_callback, "ERROR: unsupported option(s): %s\n",*p);
- }
-
- /* put all the opcodes in the hash table */
- for (s = Simops; s->func; s++)
- {
- h = &hash_table[hash(s->opcode)];
-
- /* go to the last entry in the chain */
- while (h->next)
- {
- /* Don't insert the same opcode more than once. */
- if (h->opcode == s->opcode
- && h->mask == s->mask
- && h->ops == s)
- break;
- else
- h = h->next;
- }
-
- /* Don't insert the same opcode more than once. */
- if (h->opcode == s->opcode
- && h->mask == s->mask
- && h->ops == s)
- continue;
-
- if (h->ops)
- {
- h->next = calloc(1,sizeof(struct hash_entry));
- h = h->next;
- }
- h->ops = s;
- h->mask = s->mask;
- h->opcode = s->opcode;
-#if HASH_STAT
- h->count = 0;
-#endif
- }
-
-
- /* fudge our descriptor for now */
- return (SIM_DESC) 1;
-}
-
-
-void
-sim_close (sd, quitting)
- SIM_DESC sd;
- int quitting;
-{
- /* nothing to do */
-}
-
-void
-sim_set_profile (n)
- int n;
-{
- (*mn10300_callback->printf_filtered) (mn10300_callback, "sim_set_profile %d\n", n);
-}
-
-void
-sim_set_profile_size (n)
- int n;
-{
- (*mn10300_callback->printf_filtered) (mn10300_callback, "sim_set_profile_size %d\n", n);
-}
-
-int
-sim_stop (sd)
- SIM_DESC sd;
-{
- return 0;
-}
-
-void
-sim_resume (sd, step, siggnal)
- SIM_DESC sd;
- int step, siggnal;
-{
- uint32 inst;
- reg_t oldpc;
- struct hash_entry *h;
-
- if (step)
- State.exception = SIGTRAP;
- else
- State.exception = 0;
-
- State.exited = 0;
-
- do
- {
- unsigned long insn, extension;
-
- /* Fetch the current instruction. */
- inst = load_mem_big (PC, 2);
- oldpc = PC;
-
- /* Using a giant case statement may seem like a waste because of the
- code/rodata size the table itself will consume. However, using
- a giant case statement speeds up the simulator by 10-15% by avoiding
- cascading if/else statements or cascading case statements. */
-
- switch ((inst >> 8) & 0xff)
- {
- /* All the single byte insns except 0x80, 0x90, 0xa0, 0xb0
- which must be handled specially. */
- case 0x00:
- case 0x04:
- case 0x08:
- case 0x0c:
- case 0x10:
- case 0x11:
- case 0x12:
- case 0x13:
- case 0x14:
- case 0x15:
- case 0x16:
- case 0x17:
- case 0x18:
- case 0x19:
- case 0x1a:
- case 0x1b:
- case 0x1c:
- case 0x1d:
- case 0x1e:
- case 0x1f:
- case 0x3c:
- case 0x3d:
- case 0x3e:
- case 0x3f:
- case 0x40:
- case 0x41:
- case 0x44:
- case 0x45:
- case 0x48:
- case 0x49:
- case 0x4c:
- case 0x4d:
- case 0x50:
- case 0x51:
- case 0x52:
- case 0x53:
- case 0x54:
- case 0x55:
- case 0x56:
- case 0x57:
- case 0x60:
- case 0x61:
- case 0x62:
- case 0x63:
- case 0x64:
- case 0x65:
- case 0x66:
- case 0x67:
- case 0x68:
- case 0x69:
- case 0x6a:
- case 0x6b:
- case 0x6c:
- case 0x6d:
- case 0x6e:
- case 0x6f:
- case 0x70:
- case 0x71:
- case 0x72:
- case 0x73:
- case 0x74:
- case 0x75:
- case 0x76:
- case 0x77:
- case 0x78:
- case 0x79:
- case 0x7a:
- case 0x7b:
- case 0x7c:
- case 0x7d:
- case 0x7e:
- case 0x7f:
- case 0xcb:
- case 0xd0:
- case 0xd1:
- case 0xd2:
- case 0xd3:
- case 0xd4:
- case 0xd5:
- case 0xd6:
- case 0xd7:
- case 0xd8:
- case 0xd9:
- case 0xda:
- case 0xdb:
- case 0xe0:
- case 0xe1:
- case 0xe2:
- case 0xe3:
- case 0xe4:
- case 0xe5:
- case 0xe6:
- case 0xe7:
- case 0xe8:
- case 0xe9:
- case 0xea:
- case 0xeb:
- case 0xec:
- case 0xed:
- case 0xee:
- case 0xef:
- case 0xff:
- insn = (inst >> 8) & 0xff;
- extension = 0;
- dispatch (insn, extension, 1);
- break;
-
- /* Special cases where dm == dn is used to encode a different
- instruction. */
- case 0x80:
- case 0x85:
- case 0x8a:
- case 0x8f:
- case 0x90:
- case 0x95:
- case 0x9a:
- case 0x9f:
- case 0xa0:
- case 0xa5:
- case 0xaa:
- case 0xaf:
- case 0xb0:
- case 0xb5:
- case 0xba:
- case 0xbf:
- insn = inst;
- extension = 0;
- dispatch (insn, extension, 2);
- break;
-
- case 0x81:
- case 0x82:
- case 0x83:
- case 0x84:
- case 0x86:
- case 0x87:
- case 0x88:
- case 0x89:
- case 0x8b:
- case 0x8c:
- case 0x8d:
- case 0x8e:
- case 0x91:
- case 0x92:
- case 0x93:
- case 0x94:
- case 0x96:
- case 0x97:
- case 0x98:
- case 0x99:
- case 0x9b:
- case 0x9c:
- case 0x9d:
- case 0x9e:
- case 0xa1:
- case 0xa2:
- case 0xa3:
- case 0xa4:
- case 0xa6:
- case 0xa7:
- case 0xa8:
- case 0xa9:
- case 0xab:
- case 0xac:
- case 0xad:
- case 0xae:
- case 0xb1:
- case 0xb2:
- case 0xb3:
- case 0xb4:
- case 0xb6:
- case 0xb7:
- case 0xb8:
- case 0xb9:
- case 0xbb:
- case 0xbc:
- case 0xbd:
- case 0xbe:
- insn = (inst >> 8) & 0xff;
- extension = 0;
- dispatch (insn, extension, 1);
- break;
-
- /* The two byte instructions. */
- case 0x20:
- case 0x21:
- case 0x22:
- case 0x23:
- case 0x28:
- case 0x29:
- case 0x2a:
- case 0x2b:
- case 0x42:
- case 0x43:
- case 0x46:
- case 0x47:
- case 0x4a:
- case 0x4b:
- case 0x4e:
- case 0x4f:
- case 0x58:
- case 0x59:
- case 0x5a:
- case 0x5b:
- case 0x5c:
- case 0x5d:
- case 0x5e:
- case 0x5f:
- case 0xc0:
- case 0xc1:
- case 0xc2:
- case 0xc3:
- case 0xc4:
- case 0xc5:
- case 0xc6:
- case 0xc7:
- case 0xc8:
- case 0xc9:
- case 0xca:
- case 0xce:
- case 0xcf:
- case 0xf0:
- case 0xf1:
- case 0xf2:
- case 0xf3:
- case 0xf4:
- case 0xf5:
- case 0xf6:
- insn = inst;
- extension = 0;
- dispatch (insn, extension, 2);
- break;
-
- /* The three byte insns with a 16bit operand in little endian
- format. */
- case 0x01:
- case 0x02:
- case 0x03:
- case 0x05:
- case 0x06:
- case 0x07:
- case 0x09:
- case 0x0a:
- case 0x0b:
- case 0x0d:
- case 0x0e:
- case 0x0f:
- case 0x24:
- case 0x25:
- case 0x26:
- case 0x27:
- case 0x2c:
- case 0x2d:
- case 0x2e:
- case 0x2f:
- case 0x30:
- case 0x31:
- case 0x32:
- case 0x33:
- case 0x34:
- case 0x35:
- case 0x36:
- case 0x37:
- case 0x38:
- case 0x39:
- case 0x3a:
- case 0x3b:
- case 0xcc:
- insn = load_byte (PC);
- insn <<= 16;
- insn |= load_half (PC + 1);
- extension = 0;
- dispatch (insn, extension, 3);
- break;
-
- /* The three byte insns without 16bit operand. */
- case 0xde:
- case 0xdf:
- case 0xf8:
- case 0xf9:
- insn = load_mem_big (PC, 3);
- extension = 0;
- dispatch (insn, extension, 3);
- break;
-
- /* Four byte insns. */
- case 0xfa:
- case 0xfb:
- if ((inst & 0xfffc) == 0xfaf0
- || (inst & 0xfffc) == 0xfaf4
- || (inst & 0xfffc) == 0xfaf8)
- insn = load_mem_big (PC, 4);
- else
- {
- insn = inst;
- insn <<= 16;
- insn |= load_half (PC + 2);
- extension = 0;
- }
- dispatch (insn, extension, 4);
- break;
-
- /* Five byte insns. */
- case 0xcd:
- insn = load_byte (PC);
- insn <<= 24;
- insn |= (load_half (PC + 1) << 8);
- insn |= load_byte (PC + 3);
- extension = load_byte (PC + 4);
- dispatch (insn, extension, 5);
- break;
-
- case 0xdc:
- insn = load_byte (PC);
- insn <<= 24;
- extension = load_word (PC + 1);
- insn |= (extension & 0xffffff00) >> 8;
- extension &= 0xff;
- dispatch (insn, extension, 5);
- break;
-
- /* Six byte insns. */
- case 0xfc:
- case 0xfd:
- insn = (inst << 16);
- extension = load_word (PC + 2);
- insn |= ((extension & 0xffff0000) >> 16);
- extension &= 0xffff;
- dispatch (insn, extension, 6);
- break;
-
- case 0xdd:
- insn = load_byte (PC) << 24;
- extension = load_word (PC + 1);
- insn |= ((extension >> 8) & 0xffffff);
- extension = (extension & 0xff) << 16;
- extension |= load_byte (PC + 5) << 8;
- extension |= load_byte (PC + 6);
- dispatch (insn, extension, 7);
- break;
-
- case 0xfe:
- insn = inst << 16;
- extension = load_word (PC + 2);
- insn |= ((extension >> 16) & 0xffff);
- extension <<= 8;
- extension &= 0xffff00;
- extension |= load_byte (PC + 6);
- dispatch (insn, extension, 7);
- break;
-
- default:
- abort ();
- }
- }
- while (!State.exception);
-
-#ifdef HASH_STAT
- {
- int i;
- for (i = 0; i < MAX_HASH; i++)
- {
- struct hash_entry *h;
- h = &hash_table[i];
-
- printf("hash 0x%x:\n", i);
-
- while (h)
- {
- printf("h->opcode = 0x%x, count = 0x%x\n", h->opcode, h->count);
- h = h->next;
- }
-
- printf("\n\n");
- }
- fflush (stdout);
- }
-#endif
-
-}
-
-int
-sim_trace (sd)
- SIM_DESC sd;
-{
-#ifdef DEBUG
- mn10300_debug = DEBUG;
-#endif
- sim_resume (sd, 0, 0);
- return 1;
-}
-
-void
-sim_info (sd, verbose)
- SIM_DESC sd;
- int verbose;
-{
- (*mn10300_callback->printf_filtered) (mn10300_callback, "sim_info\n");
-}
-
-SIM_RC
-sim_create_inferior (sd, abfd, argv, env)
- SIM_DESC sd;
- struct _bfd *abfd;
- char **argv;
- char **env;
-{
- if (abfd != NULL)
- PC = bfd_get_start_address (abfd);
- else
- PC = 0;
- return SIM_RC_OK;
-}
-
-void
-sim_set_callbacks (p)
- host_callback *p;
-{
- mn10300_callback = p;
-}
-
-/* All the code for exiting, signals, etc needs to be revamped.
-
- This is enough to get c-torture limping though. */
-
-void
-sim_stop_reason (sd, reason, sigrc)
- SIM_DESC sd;
- enum sim_stop *reason;
- int *sigrc;
-{
- if (State.exited)
- *reason = sim_exited;
- else
- *reason = sim_stopped;
-
- if (State.exception == SIGQUIT)
- *sigrc = 0;
- else
- *sigrc = State.exception;
-}
-
-int
-sim_read (sd, addr, buffer, size)
- SIM_DESC sd;
- SIM_ADDR addr;
- unsigned char *buffer;
- int size;
-{
- int i;
- for (i = 0; i < size; i++)
- buffer[i] = load_byte (addr + i);
-
- return size;
-}
-
-void
-sim_do_command (sd, cmd)
- SIM_DESC sd;
- char *cmd;
-{
- (*mn10300_callback->printf_filtered) (mn10300_callback, "\"%s\" is not a valid mn10300 simulator command.\n", cmd);
-}
-
-SIM_RC
-sim_load (sd, prog, abfd, from_tty)
- SIM_DESC sd;
- char *prog;
- bfd *abfd;
- int from_tty;
-{
- extern bfd *sim_load_file (); /* ??? Don't know where this should live. */
- bfd *prog_bfd;
-
- prog_bfd = sim_load_file (sd, myname, mn10300_callback, prog, abfd,
- sim_kind == SIM_OPEN_DEBUG,
- 0, sim_write);
- if (prog_bfd == NULL)
- return SIM_RC_FAIL;
- if (abfd == NULL)
- bfd_close (prog_bfd);
- return SIM_RC_OK;
-}
-#endif /* not WITH_COMMON */
-
-
-#if WITH_COMMON
-
-/* For compatibility */
-SIM_DESC simulator;
-
-/* These default values correspond to expected usage for the chip. */
-
-SIM_DESC
-sim_open (kind, cb, abfd, argv)
- SIM_OPEN_KIND kind;
- host_callback *cb;
- struct _bfd *abfd;
- char **argv;
-{
- SIM_DESC sd = sim_state_alloc (kind, cb);
- mn10300_callback = cb;
-
- SIM_ASSERT (STATE_MAGIC (sd) == SIM_MAGIC_NUMBER);
-
- /* for compatibility */
- simulator = sd;
-
- /* FIXME: should be better way of setting up interrupts. For
- moment, only support watchpoints causing a breakpoint (gdb
- halt). */
- STATE_WATCHPOINTS (sd)->pc = &(PC);
- STATE_WATCHPOINTS (sd)->sizeof_pc = sizeof (PC);
- STATE_WATCHPOINTS (sd)->interrupt_handler = NULL;
- STATE_WATCHPOINTS (sd)->interrupt_names = NULL;
-
- if (sim_pre_argv_init (sd, argv[0]) != SIM_RC_OK)
- return 0;
- sim_add_option_table (sd, NULL, mn10300_options);
-
- /* Allocate core managed memory */
- sim_do_command (sd, "memory region 0,0x100000");
- sim_do_command (sd, "memory region 0x40000000,0x200000");
-
- /* getopt will print the error message so we just have to exit if this fails.
- FIXME: Hmmm... in the case of gdb we need getopt to call
- print_filtered. */
- if (sim_parse_args (sd, argv) != SIM_RC_OK)
- {
- /* Uninstall the modules to avoid memory leaks,
- file descriptor leaks, etc. */
- sim_module_uninstall (sd);
- return 0;
- }
-
- if ( NULL != board
- && (strcmp(board, BOARD_AM32) == 0 ) )
- {
- /* environment */
- STATE_ENVIRONMENT (sd) = OPERATING_ENVIRONMENT;
-
- sim_do_command (sd, "memory region 0x44000000,0x40000");
- sim_do_command (sd, "memory region 0x48000000,0x400000");
-
- /* device support for mn1030002 */
- /* interrupt controller */
-
- sim_hw_parse (sd, "/mn103int@0x34000100/reg 0x34000100 0x7C 0x34000200 0x8 0x34000280 0x8");
-
- /* DEBUG: NMI input's */
- sim_hw_parse (sd, "/glue@0x30000000/reg 0x30000000 12");
- sim_hw_parse (sd, "/glue@0x30000000 > int0 nmirq /mn103int");
- sim_hw_parse (sd, "/glue@0x30000000 > int1 watchdog /mn103int");
- sim_hw_parse (sd, "/glue@0x30000000 > int2 syserr /mn103int");
-
- /* DEBUG: ACK input */
- sim_hw_parse (sd, "/glue@0x30002000/reg 0x30002000 4");
- sim_hw_parse (sd, "/glue@0x30002000 > int ack /mn103int");
-
- /* DEBUG: LEVEL output */
- sim_hw_parse (sd, "/glue@0x30004000/reg 0x30004000 8");
- sim_hw_parse (sd, "/mn103int > nmi int0 /glue@0x30004000");
- sim_hw_parse (sd, "/mn103int > level int1 /glue@0x30004000");
-
- /* DEBUG: A bunch of interrupt inputs */
- sim_hw_parse (sd, "/glue@0x30006000/reg 0x30006000 32");
- sim_hw_parse (sd, "/glue@0x30006000 > int0 irq-0 /mn103int");
- sim_hw_parse (sd, "/glue@0x30006000 > int1 irq-1 /mn103int");
- sim_hw_parse (sd, "/glue@0x30006000 > int2 irq-2 /mn103int");
- sim_hw_parse (sd, "/glue@0x30006000 > int3 irq-3 /mn103int");
- sim_hw_parse (sd, "/glue@0x30006000 > int4 irq-4 /mn103int");
- sim_hw_parse (sd, "/glue@0x30006000 > int5 irq-5 /mn103int");
- sim_hw_parse (sd, "/glue@0x30006000 > int6 irq-6 /mn103int");
- sim_hw_parse (sd, "/glue@0x30006000 > int7 irq-7 /mn103int");
-
- /* processor interrupt device */
-
- /* the device */
- sim_hw_parse (sd, "/mn103cpu@0x20000000");
- sim_hw_parse (sd, "/mn103cpu@0x20000000/reg 0x20000000 0x42");
-
- /* DEBUG: ACK output wired upto a glue device */
- sim_hw_parse (sd, "/glue@0x20002000");
- sim_hw_parse (sd, "/glue@0x20002000/reg 0x20002000 4");
- sim_hw_parse (sd, "/mn103cpu > ack int0 /glue@0x20002000");
-
- /* DEBUG: RESET/NMI/LEVEL wired up to a glue device */
- sim_hw_parse (sd, "/glue@0x20004000");
- sim_hw_parse (sd, "/glue@0x20004000/reg 0x20004000 12");
- sim_hw_parse (sd, "/glue@0x20004000 > int0 reset /mn103cpu");
- sim_hw_parse (sd, "/glue@0x20004000 > int1 nmi /mn103cpu");
- sim_hw_parse (sd, "/glue@0x20004000 > int2 level /mn103cpu");
-
- /* REAL: The processor wired up to the real interrupt controller */
- sim_hw_parse (sd, "/mn103cpu > ack ack /mn103int");
- sim_hw_parse (sd, "/mn103int > level level /mn103cpu");
- sim_hw_parse (sd, "/mn103int > nmi nmi /mn103cpu");
-
-
- /* PAL */
-
- /* the device */
- sim_hw_parse (sd, "/pal@0x31000000");
- sim_hw_parse (sd, "/pal@0x31000000/reg 0x31000000 64");
- sim_hw_parse (sd, "/pal@0x31000000/poll? true");
-
- /* DEBUG: PAL wired up to a glue device */
- sim_hw_parse (sd, "/glue@0x31002000");
- sim_hw_parse (sd, "/glue@0x31002000/reg 0x31002000 16");
- sim_hw_parse (sd, "/pal@0x31000000 > countdown int0 /glue@0x31002000");
- sim_hw_parse (sd, "/pal@0x31000000 > timer int1 /glue@0x31002000");
- sim_hw_parse (sd, "/pal@0x31000000 > int int2 /glue@0x31002000");
- sim_hw_parse (sd, "/glue@0x31002000 > int0 int3 /glue@0x31002000");
- sim_hw_parse (sd, "/glue@0x31002000 > int1 int3 /glue@0x31002000");
- sim_hw_parse (sd, "/glue@0x31002000 > int2 int3 /glue@0x31002000");
-
- /* REAL: The PAL wired up to the real interrupt controller */
- sim_hw_parse (sd, "/pal@0x31000000 > countdown irq-0 /mn103int");
- sim_hw_parse (sd, "/pal@0x31000000 > timer irq-1 /mn103int");
- sim_hw_parse (sd, "/pal@0x31000000 > int irq-2 /mn103int");
-
- /* 8 and 16 bit timers */
- sim_hw_parse (sd, "/mn103tim@0x34001000/reg 0x34001000 36 0x34001080 100 0x34004000 16");
-
- /* Hook timer interrupts up to interrupt controller */
- sim_hw_parse (sd, "/mn103tim > timer-0-underflow timer-0-underflow /mn103int");
- sim_hw_parse (sd, "/mn103tim > timer-1-underflow timer-1-underflow /mn103int");
- sim_hw_parse (sd, "/mn103tim > timer-2-underflow timer-2-underflow /mn103int");
- sim_hw_parse (sd, "/mn103tim > timer-3-underflow timer-3-underflow /mn103int");
- sim_hw_parse (sd, "/mn103tim > timer-4-underflow timer-4-underflow /mn103int");
- sim_hw_parse (sd, "/mn103tim > timer-5-underflow timer-5-underflow /mn103int");
- sim_hw_parse (sd, "/mn103tim > timer-6-underflow timer-6-underflow /mn103int");
- sim_hw_parse (sd, "/mn103tim > timer-6-compare-a timer-6-compare-a /mn103int");
- sim_hw_parse (sd, "/mn103tim > timer-6-compare-b timer-6-compare-b /mn103int");
-
-
- /* Serial devices 0,1,2 */
- sim_hw_parse (sd, "/mn103ser@0x34000800/reg 0x34000800 48");
- sim_hw_parse (sd, "/mn103ser@0x34000800/poll? true");
-
- /* Hook serial interrupts up to interrupt controller */
- sim_hw_parse (sd, "/mn103ser > serial-0-receive serial-0-receive /mn103int");
- sim_hw_parse (sd, "/mn103ser > serial-0-transmit serial-0-transmit /mn103int");
- sim_hw_parse (sd, "/mn103ser > serial-1-receive serial-1-receive /mn103int");
- sim_hw_parse (sd, "/mn103ser > serial-1-transmit serial-1-transmit /mn103int");
- sim_hw_parse (sd, "/mn103ser > serial-2-receive serial-2-receive /mn103int");
- sim_hw_parse (sd, "/mn103ser > serial-2-transmit serial-2-transmit /mn103int");
-
- sim_hw_parse (sd, "/mn103iop@0x36008000/reg 0x36008000 8 0x36008020 8 0x36008040 0xc 0x36008060 8 0x36008080 8");
-
- /* Memory control registers */
- sim_do_command (sd, "memory region 0x32000020,0x30");
- /* Cache control register */
- sim_do_command (sd, "memory region 0x20000070,0x4");
- /* Cache purge regions */
- sim_do_command (sd, "memory region 0x28400000,0x800");
- sim_do_command (sd, "memory region 0x28401000,0x800");
- /* DMA registers */
- sim_do_command (sd, "memory region 0x32000100,0xF");
- sim_do_command (sd, "memory region 0x32000200,0xF");
- sim_do_command (sd, "memory region 0x32000400,0xF");
- sim_do_command (sd, "memory region 0x32000800,0xF");
- }
- else
- {
- if (board != NULL)
- {
- sim_io_eprintf (sd, "Error: Board `%s' unknown.\n", board);
- return 0;
- }
- }
-
-
-
- /* check for/establish the a reference program image */
- if (sim_analyze_program (sd,
- (STATE_PROG_ARGV (sd) != NULL
- ? *STATE_PROG_ARGV (sd)
- : NULL),
- abfd) != SIM_RC_OK)
- {
- sim_module_uninstall (sd);
- return 0;
- }
-
- /* establish any remaining configuration options */
- if (sim_config (sd) != SIM_RC_OK)
- {
- sim_module_uninstall (sd);
- return 0;
- }
-
- if (sim_post_argv_init (sd) != SIM_RC_OK)
- {
- /* Uninstall the modules to avoid memory leaks,
- file descriptor leaks, etc. */
- sim_module_uninstall (sd);
- return 0;
- }
-
-
- /* set machine specific configuration */
-/* STATE_CPU (sd, 0)->psw_mask = (PSW_NP | PSW_EP | PSW_ID | PSW_SAT */
-/* | PSW_CY | PSW_OV | PSW_S | PSW_Z); */
-
- return sd;
-}
-
-
-void
-sim_close (sd, quitting)
- SIM_DESC sd;
- int quitting;
-{
- sim_module_uninstall (sd);
-}
-
-
-SIM_RC
-sim_create_inferior (sd, prog_bfd, argv, env)
- SIM_DESC sd;
- struct _bfd *prog_bfd;
- char **argv;
- char **env;
-{
- memset (&State, 0, sizeof (State));
- if (prog_bfd != NULL) {
- PC = bfd_get_start_address (prog_bfd);
- } else {
- PC = 0;
- }
- CIA_SET (STATE_CPU (sd, 0), (unsigned64) PC);
-
- return SIM_RC_OK;
-}
-
-void
-sim_do_command (sd, cmd)
- SIM_DESC sd;
- char *cmd;
-{
- char *mm_cmd = "memory-map";
- char *int_cmd = "interrupt";
-
- if (sim_args_command (sd, cmd) != SIM_RC_OK)
- {
- if (strncmp (cmd, mm_cmd, strlen (mm_cmd) == 0))
- sim_io_eprintf (sd, "`memory-map' command replaced by `sim memory'\n");
- else if (strncmp (cmd, int_cmd, strlen (int_cmd)) == 0)
- sim_io_eprintf (sd, "`interrupt' command replaced by `sim watch'\n");
- else
- sim_io_eprintf (sd, "Unknown command `%s'\n", cmd);
- }
-}
-#endif /* WITH_COMMON */
-
-/* FIXME These would more efficient to use than load_mem/store_mem,
- but need to be changed to use the memory map. */
-
-uint8
-get_byte (x)
- uint8 *x;
-{
- return *x;
-}
-
-uint16
-get_half (x)
- uint8 *x;
-{
- uint8 *a = x;
- return (a[1] << 8) + (a[0]);
-}
-
-uint32
-get_word (x)
- uint8 *x;
-{
- uint8 *a = x;
- return (a[3]<<24) + (a[2]<<16) + (a[1]<<8) + (a[0]);
-}
-
-void
-put_byte (addr, data)
- uint8 *addr;
- uint8 data;
-{
- uint8 *a = addr;
- a[0] = data;
-}
-
-void
-put_half (addr, data)
- uint8 *addr;
- uint16 data;
-{
- uint8 *a = addr;
- a[0] = data & 0xff;
- a[1] = (data >> 8) & 0xff;
-}
-
-void
-put_word (addr, data)
- uint8 *addr;
- uint32 data;
-{
- uint8 *a = addr;
- a[0] = data & 0xff;
- a[1] = (data >> 8) & 0xff;
- a[2] = (data >> 16) & 0xff;
- a[3] = (data >> 24) & 0xff;
-}
-
-int
-sim_fetch_register (sd, rn, memory, length)
- SIM_DESC sd;
- int rn;
- unsigned char *memory;
- int length;
-{
- put_word (memory, State.regs[rn]);
- return -1;
-}
-
-int
-sim_store_register (sd, rn, memory, length)
- SIM_DESC sd;
- int rn;
- unsigned char *memory;
- int length;
-{
- State.regs[rn] = get_word (memory);
- return -1;
-}
-
-
-void
-mn10300_core_signal (SIM_DESC sd,
- sim_cpu *cpu,
- sim_cia cia,
- unsigned map,
- int nr_bytes,
- address_word addr,
- transfer_type transfer,
- sim_core_signals sig)
-{
- const char *copy = (transfer == read_transfer ? "read" : "write");
- address_word ip = CIA_ADDR (cia);
-
- switch (sig)
- {
- case sim_core_unmapped_signal:
- sim_io_eprintf (sd, "mn10300-core: %d byte %s to unmapped address 0x%lx at 0x%lx\n",
- nr_bytes, copy,
- (unsigned long) addr, (unsigned long) ip);
- program_interrupt(sd, cpu, cia, SIM_SIGSEGV);
- break;
-
- case sim_core_unaligned_signal:
- sim_io_eprintf (sd, "mn10300-core: %d byte %s to unaligned address 0x%lx at 0x%lx\n",
- nr_bytes, copy,
- (unsigned long) addr, (unsigned long) ip);
- program_interrupt(sd, cpu, cia, SIM_SIGBUS);
- break;
-
- default:
- sim_engine_abort (sd, cpu, cia,
- "mn10300_core_signal - internal error - bad switch");
- }
-}
-
-
-void
-program_interrupt (SIM_DESC sd,
- sim_cpu *cpu,
- sim_cia cia,
- SIM_SIGNAL sig)
-{
- int status;
- struct hw *device;
- static int in_interrupt = 0;
-
-#ifdef SIM_CPU_EXCEPTION_TRIGGER
- SIM_CPU_EXCEPTION_TRIGGER(sd,cpu,cia);
-#endif
-
- /* avoid infinite recursion */
- if (in_interrupt)
- {
- (*mn10300_callback->printf_filtered) (mn10300_callback,
- "ERROR: recursion in program_interrupt during software exception dispatch.");
- }
- else
- {
- in_interrupt = 1;
- /* copy NMI handler code from dv-mn103cpu.c */
- store_word (SP - 4, CIA_GET (cpu));
- store_half (SP - 8, PSW);
-
- /* Set the SYSEF flag in NMICR by backdoor method. See
- dv-mn103int.c:write_icr(). This is necessary because
- software exceptions are not modelled by actually talking to
- the interrupt controller, so it cannot set its own SYSEF
- flag. */
- if ((NULL != board) && (strcmp(board, BOARD_AM32) == 0))
- store_byte (0x34000103, 0x04);
- }
-
- PSW &= ~PSW_IE;
- SP = SP - 8;
- CIA_SET (cpu, 0x40000008);
-
- in_interrupt = 0;
- sim_engine_halt(sd, cpu, NULL, cia, sim_stopped, sig);
-}
-
-
-void
-mn10300_cpu_exception_trigger(SIM_DESC sd, sim_cpu* cpu, address_word cia)
-{
- ASSERT(cpu != NULL);
-
- if(State.exc_suspended > 0)
- sim_io_eprintf(sd, "Warning, nested exception triggered (%d)\n", State.exc_suspended);
-
- CIA_SET (cpu, cia);
- memcpy(State.exc_trigger_regs, State.regs, sizeof(State.exc_trigger_regs));
- State.exc_suspended = 0;
-}
-
-void
-mn10300_cpu_exception_suspend(SIM_DESC sd, sim_cpu* cpu, int exception)
-{
- ASSERT(cpu != NULL);
-
- if(State.exc_suspended > 0)
- sim_io_eprintf(sd, "Warning, nested exception signal (%d then %d)\n",
- State.exc_suspended, exception);
-
- memcpy(State.exc_suspend_regs, State.regs, sizeof(State.exc_suspend_regs));
- memcpy(State.regs, State.exc_trigger_regs, sizeof(State.regs));
- CIA_SET (cpu, PC); /* copy PC back from new State.regs */
- State.exc_suspended = exception;
-}
-
-void
-mn10300_cpu_exception_resume(SIM_DESC sd, sim_cpu* cpu, int exception)
-{
- ASSERT(cpu != NULL);
-
- if(exception == 0 && State.exc_suspended > 0)
- {
- if(State.exc_suspended != SIGTRAP) /* warn not for breakpoints */
- sim_io_eprintf(sd, "Warning, resuming but ignoring pending exception signal (%d)\n",
- State.exc_suspended);
- }
- else if(exception != 0 && State.exc_suspended > 0)
- {
- if(exception != State.exc_suspended)
- sim_io_eprintf(sd, "Warning, resuming with mismatched exception signal (%d vs %d)\n",
- State.exc_suspended, exception);
-
- memcpy(State.regs, State.exc_suspend_regs, sizeof(State.regs));
- CIA_SET (cpu, PC); /* copy PC back from new State.regs */
- }
- else if(exception != 0 && State.exc_suspended == 0)
- {
- sim_io_eprintf(sd, "Warning, ignoring spontanous exception signal (%d)\n", exception);
- }
- State.exc_suspended = 0;
-}
diff --git a/sim/mn10300/mn10300.dc b/sim/mn10300/mn10300.dc
deleted file mode 100644
index 9ebf3fd3803..00000000000
--- a/sim/mn10300/mn10300.dc
+++ /dev/null
@@ -1,4 +0,0 @@
-switch : 7 : 0 : : : : 0 : :
-switch : 7 : 0 : : : : 1 : :
-switch : 7 : 0 : : : : 2 : :
-switch : 7 : 0 : : : : 3 : :
diff --git a/sim/mn10300/mn10300.igen b/sim/mn10300/mn10300.igen
deleted file mode 100644
index b0ab89fba64..00000000000
--- a/sim/mn10300/mn10300.igen
+++ /dev/null
@@ -1,4352 +0,0 @@
-// -*- C -*-
-:option:::insn-bit-size:8
-:option:::insn-specifying-widths:true
-:option:::hi-bit-nr:7
-:model:::mn10300:mn10300:
-:model:::am33:am33:
-
-// What do we do with an illegal instruction?
-:internal::::illegal:
-{
- PC = cia;
- program_interrupt(SD, CPU, cia, SIM_SIGILL);
-}
-
-// 1000 DnDn imm8....; mov imm8,Dn (imm8 is sign extended)
-4.0x8,2.DM1,2.DN0=DM1+8.IMM8:S0i:::mov
-"mov"
-*mn10300
-*am33
-{
- /* OP_8000 (); */
- signed32 immed = EXTEND8 (IMM8);
- State.regs[REG_D0+DN0] = immed;
- PC = cia;
-}
-
-// 1000 DmDn; mov Dm,Dn (Dm != Dn, see above when Dm == Dn)
-4.0x8,2.DM1,2.DN0!DM1:S0:::mov
-"mov"
-*mn10300
-*am33
-{
- PC = cia;
- /* OP_80 (); */
- State.regs[REG_D0+DN0] = State.regs[REG_D0+DM1];
-}
-
-
-// 1111 0001 1110 DmAn; mov Dm,An
-8.0xf1+1110,2.DM1,2.AN0:D0:::mov
-"mov"
-*mn10300
-*am33
-{
- /* OP_F1E0 (); */
- PC = cia;
- State.regs[REG_A0 + AN0] = State.regs[REG_D0 + DM1];
-}
-
-
-// 1111 0001 1101 AmDn; mov Am,Dn
-8.0xf1+1101,2.AM1,2.DN0:D0a:::mov
-"mov"
-*mn10300
-*am33
-{
- /* OP_F1D0 (); */
- PC = cia;
- State.regs[REG_D0 + DN0] = State.regs[REG_A0 + AM1];
-}
-
-
-// 1001 AnAn imm8....; mov imm8,An (imm8 is zero-extended)
-4.0x9,2.AM1,2.AN0=AM1+8.IMM8:S0ai:::mov
-"mov"
-*mn10300
-*am33
-{
- PC = cia;
- /* OP_9000 (); */
- State.regs[REG_A0+AN0] = IMM8;
-}
-
-
-// 1001 AmAn; mov Am,An (Am != An, save above when Am == An)
-4.0x9,2.AM1,2.AN0!AM1:S0a:::mov
-"mov"
-*mn10300
-*am33
-{
- PC = cia;
- /* OP_90 (); */
- State.regs[REG_A0+AN0] = State.regs[REG_A0+AM1];
-}
-
-
-// 0011 11An; mov SP,An
-4.0x3,11,2.AN0:S0b:::mov
-"mov"
-*mn10300
-*am33
-{
- /* OP_3C (); */
- PC = cia;
- State.regs[REG_A0 + AN0] = State.regs[REG_SP];
-}
-
-
-// 1111 0010 1111 Am00; mov Am,SP
-8.0xf2+4.0xf,2.AM1,00:D0b:::mov
-"mov"
-*mn10300
-*am33
-{
- /* OP_F2F0 (); */
- PC = cia;
- State.regs[REG_SP] = State.regs[REG_A0 + AM1];
-}
-
-
-// 1111 0010 1110 01Dn; mov PSW,Dn
-8.0xf2+4.0xe,01,2.DN0:D0c:::mov
-"mov"
-*mn10300
-*am33
-{
- /* OP_F2E4 (); */
- PC = cia;
- State.regs[REG_D0 + DN0] = PSW;
-}
-
-
-// 1111 0010 1111 Dm11; mov Dm,PSW
-8.0xf2+4.0xf,2.DM1,11:D0d:::mov
-"mov"
-*mn10300
-*am33
-{
- /* OP_F2F3 (); */
- PC = cia;
- PSW = State.regs[REG_D0 + DM1];
-}
-
-
-// 1111 0010 1110 00Dn; mov MDR,Dn
-8.0xf2+4.0xe,00,2.DN0:D0e:::mov
-"mov"
-*mn10300
-*am33
-{
- /* OP_F2E0 (); */
- PC = cia;
- State.regs[REG_D0 + DN0] = State.regs[REG_MDR];
-}
-
-
-// 1111 0010 1111 Dm10; mov Dm,MDR
-8.0xf2+4.0xf,2.DM1,10:D0f:::mov
-"mov"
-*mn10300
-*am33
-{
- /* OP_F2F2 (); */
- PC = cia;
- State.regs[REG_MDR] = State.regs[REG_D0 + DM1];
-}
-
-
-// 0111 DnAm; mov (Am),Dn
-4.0x7,2.DN1,2.AM0:S0c:::mov
-"mov"
-*mn10300
-*am33
-{
- /* OP_70 (); */
- PC = cia;
- State.regs[REG_D0 + DN1] = load_word (State.regs[REG_A0 + AM0]);
-}
-
-
-// 1111 1000 0000 DnAm d8......; mov (d8,Am),Dn (d8 is sign-extended)
-8.0xf8+4.0x0,2.DN1,2.AM0+8.D8:D1:::mov
-"mov"
-*mn10300
-*am33
-{
- /* OP_F80000 (); */
- PC = cia;
- State.regs[REG_D0 + DN1]
- = load_word ((State.regs[REG_A0 + AM0] + EXTEND8 (D8)));
-}
-
-
-// 1111 1010 0000 DnAm d16.....; mov (d16,Am),Dn (d16 is sign-extended.)
-8.0xfa+4.0x0,2.DN1,2.AM0+8.D16A+8.D16B:D2:::mov
-"mov"
-*mn10300
-*am33
-{
- /* OP_FA000000 (); */
- PC = cia;
- State.regs[REG_D0 + DN1]
- = load_word ((State.regs[REG_A0 + AM0] + EXTEND16 (FETCH16(D16A, D16B))));
-}
-
-
-// 1111 1100 0000 DnAm d32.....; mov (d32,Am),Dn
-8.0xfc+4.0x0,2.DN1,2.AM0+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D4:::mov
-"mov"
-*mn10300
-*am33
-{
- /* OP_FC000000 (); */
- PC = cia;
- State.regs[REG_D0 + DN1]
- = load_word ((State.regs[REG_A0 + AM0]
- + FETCH32(IMM32A, IMM32B, IMM32C, IMM32D)));
-}
-
-
-// 0101 10Dn d8......; mov (d8,SP),Dn (d8 is zero-extended)
-4.0x5,10,2.DN0+8.D8:S1:::mov
-"mov"
-*mn10300
-*am33
-{
- /* OP_5800 (); */
- PC = cia;
- State.regs[REG_D0 + DN0] = load_word (State.regs[REG_SP] + D8);
-}
-
-
-// 1111 1010 1011 01Dn d16.....; mov (d16,SP),Dn (d16 is zero-extended.)
-8.0xfa+4.0xb,01,2.DN0+8.IMM16A+8.IMM16B:D2a:::mov
-"mov"
-*mn10300
-*am33
-{
- /* OP_FAB40000 (); */
- PC = cia;
- State.regs[REG_D0 + DN0]
- = load_word (State.regs[REG_SP] + FETCH16(IMM16A, IMM16B));
-}
-
-
-// 1111 1010 1011 01Dn d32.....; mov (d32,SP),Dn
-8.0xfc+4.0xb,01,2.DN0+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D4a:::mov
-"mov"
-*mn10300
-*am33
-{
- /* OP_FCB40000 (); */
- PC = cia;
- State.regs[REG_D0 + DN0]
- = load_word (State.regs[REG_SP] + FETCH32(IMM32A, IMM32B, IMM32C, IMM32D));
-}
-
-
-// 1111 0011 00Dn DiAm; mov (Di,Am),Dn
-8.0xf3+00,2.DN2,2.DI,2.AM0:D0g:::mov
-"mov"
-*mn10300
-*am33
-{
- /* OP_F300 (); */
- PC = cia;
- State.regs[REG_D0 + DN2]
- = load_word ((State.regs[REG_A0 + AM0] + State.regs[REG_D0 + DI]));
-}
-
-
-// 0011 00Dn abs16...; mov (abs16),Dn (abs16 is zero-extended)
-4.0x3,00,2.DN0+8.IMM16A+8.IMM16B:S2:::mov
-"mov"
-*mn10300
-*am33
-{
- /* OP_300000 (); */
- PC = cia;
- State.regs[REG_D0 + DN0] = load_word (FETCH16(IMM16A, IMM16B));
-}
-
-// 1111 1100 1010 01Dn abs32...; mov (abs32),Dn
-8.0xfc+4.0xa,01,2.DN0+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D4b:::mov
-"mov"
-*mn10300
-*am33
-{
- /* OP_FCA40000 (); */
- PC = cia;
- State.regs[REG_D0 + DN0] = load_word (FETCH32(IMM32A, IMM32B, IMM32C, IMM32D));
-}
-
-
-// 1111 0000 0000 AnAm; mov (Am),An
-8.0xf0+4.0x0,2.AN1,2.AM0:D0h:::mov
-"mov"
-*mn10300
-*am33
-{
- /* OP_F000 (); */
- PC = cia;
- State.regs[REG_A0 + AN1] = load_word (State.regs[REG_A0 + AM0]);
-}
-
-
-// 1111 1000 0010 AnAm d8......; mov (d8,Am),An (d8 is sign-extended)
-8.0xf8+4.0x2,2.AN1,2.AM0+8.D8:D1a:::mov
-"mov"
-*mn10300
-*am33
-{
- /* OP_F82000 (); */
- PC = cia;
- State.regs[REG_A0 + AN1]
- = load_word ((State.regs[REG_A0 + AM0] + EXTEND8 (D8)));
-}
-
-
-// 1111 1010 0010 AnAm d16.....; mov (d16,Am),An (d16 is sign-extended.)
-8.0xfa+4.0x2,2.AN1,2.AM0+8.D16A+8.D16B:D2b:::mov
-"mov"
-*mn10300
-*am33
-{
- /* OP_FA200000 (); */
- PC = cia;
- State.regs[REG_A0 + AN1]
- = load_word ((State.regs[REG_A0 + AM0]
- + EXTEND16 (FETCH16(D16A, D16B))));
-}
-
-
-// 1111 1100 0010 AnAm d32.....; mov (d32,Am),An
-8.0xfc+4.0x2,2.AN1,2.AM0+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D4c:::mov
-"mov"
-*mn10300
-*am33
-{
- /* OP_FC200000 (); */
- PC = cia;
- State.regs[REG_A0 + AN1]
- = load_word ((State.regs[REG_A0 + AM0]
- + FETCH32(IMM32A, IMM32B, IMM32C, IMM32D)));
-}
-
-
-// 0101 11An d8......; mov (d8,SP),An (d8 is zero-extended)
-4.0x5,11,2.AN0+8.D8:S1a:::mov
-"mov"
-*mn10300
-*am33
-{
- /* OP_5C00 (); */
- PC = cia;
- State.regs[REG_A0 + AN0]
- = load_word (State.regs[REG_SP] + D8);
-}
-
-
-// 1111 1010 1011 00An d16.....; mov (d16,SP),An (d16 is zero-extended.)
-8.0xfa+4.0xb,00,2.AN0+8.IMM16A+8.IMM16B:D2c:::mov
-"mov"
-*mn10300
-*am33
-{
- /* OP_FAB00000 (); */
- PC = cia;
- State.regs[REG_A0 + AN0]
- = load_word (State.regs[REG_SP] + FETCH16(IMM16A, IMM16B));
-}
-
-
-// 1111 1100 1011 00An d32.....; mov (d32,SP),An
-8.0xfc+4.0xb,00,2.AN0+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D4d:::mov
-"mov"
-*mn10300
-*am33
-{
- /* OP_FCB00000 (); */
- PC = cia;
- State.regs[REG_A0 + AN0]
- = load_word (State.regs[REG_SP]
- + FETCH32(IMM32A, IMM32B, IMM32C, IMM32D));
-}
-
-
-// 1111 0011 10An DiAm; mov (Di,Am),An
-8.0xf3+10,2.AN2,2.DI,2.AM0:D0i:::mov
-"mov"
-*mn10300
-*am33
-{
- /* OP_F380 (); */
- PC = cia;
- State.regs[REG_A0 + AN2]
- = load_word ((State.regs[REG_A0 + AM0]
- + State.regs[REG_D0 + DI]));
-}
-
-
-// 1111 1010 1010 00An abs16...; mov (abs16),An (abs16 is zero-extended)
-8.0xfa+4.0xa,00,2.AN0+8.IMM16A+8.IMM16B:D2d:::mov
-"mov"
-*mn10300
-*am33
-{
- /* OP_FAA00000 (); */
- PC = cia;
- State.regs[REG_A0 + AN0] = load_word (FETCH16(IMM16A, IMM16B));
-}
-
-
-// 1111 1100 1010 00An abs32...; mov (abs32),An
-8.0xfc+4.0xa,00,2.AN0+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D4e:::mov
-"mov"
-*mn10300
-*am33
-{
- /* OP_FCA00000 (); */
- PC = cia;
- State.regs[REG_A0 + AN0]
- = load_word (FETCH32(IMM32A, IMM32B, IMM32C, IMM32D));
-}
-
-
-// 1111 1000 1111 00Am d8......; mov (d8,Am),SP (d8 is sign-extended)
-8.0xf8+4.0xf,00,2.AM0+8.D8:D1b:::mov
-"mov"
-*mn10300
-*am33
-{
- /* OP_F8F000 (); */
- PC = cia;
- State.regs[REG_SP]
- = load_word ((State.regs[REG_A0 + AM0] + EXTEND8 (D8)));
-}
-
-
-// 0110 DmAn; mov Dm,(An)
-4.0x6,2.DM1,2.AN0:S0d:::mov
-"mov"
-*mn10300
-*am33
-{
- /* OP_60 (); */
- PC = cia;
- store_word (State.regs[REG_A0 + AN0], State.regs[REG_D0 + DM1]);
-}
-
-
-// 1111 1000 0001 DmAn d8......; mov Dm,(d8,An) (d8 is sign-extended)
-8.0xf8+4.0x1,2.DM1,2.AN0+8.D8:D1c:::mov
-"mov"
-*mn10300
-*am33
-{
- /* OP_F81000 (); */
- PC = cia;
- store_word ((State.regs[REG_A0 + AN0] + EXTEND8 (D8)),
- State.regs[REG_D0 + DM1]);
-}
-
-
-// 1111 1010 0001 DmAn d16.....; mov Dm,(d16,An) (d16 is sign-extended.)
-8.0xfa+4.0x1,2.DM1,2.AN0+8.D16A+8.D16B:D2e:::mov
-"mov"
-*mn10300
-*am33
-{
- /* OP_FA100000 (); */
- PC = cia;
- store_word ((State.regs[REG_A0 + AN0] + EXTEND16 (FETCH16(D16A, D16B))),
- State.regs[REG_D0 + DM1]);
-}
-
-
-// 1111 1100 0001 DmAn d32.....; mov Dm,(d32,An)
-8.0xfc+4.0x1,2.DM1,2.AN0+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D4f:::mov
-"mov"
-*mn10300
-*am33
-{
- /* OP_FC100000 (); */
- PC = cia;
- store_word ((State.regs[REG_A0 + AN0]
- + FETCH32(IMM32A, IMM32B, IMM32C, IMM32D)),
- State.regs[REG_D0 + DM1]);
-}
-
-
-// 0100 Dm10 d8......; mov Dm,(d8,SP) (d8 is zero-extended)
-4.0x4,2.DM1,10+8.D8:S1b:::mov
-"mov"
-*mn10300
-*am33
-{
- /* OP_4200 (); */
- PC = cia;
- store_word (State.regs[REG_SP] + D8, State.regs[REG_D0 + DM1]);
-}
-
-
-// 1111 1010 1001 Dm01 d16.....; mov Dm,(d16,SP) (d16 is zero-extended.)
-8.0xfa+4.0x9,2.DM1,01+8.IMM16A+8.IMM16B:D2f:::mov
-"mov"
-*mn10300
-*am33
-{
- /* OP_FA910000 (); */
- PC = cia;
- store_word (State.regs[REG_SP] + FETCH16(IMM16A, IMM16B),
- State.regs[REG_D0 + DM1]);
-}
-
-
-// 1111 1100 1001 Dm01 d32.....; mov Dm,(d32,SP)
-8.0xfc+4.0x9,2.DM1,01+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D4g:::mov
-"mov"
-*mn10300
-*am33
-{
- /* OP_FC910000 (); */
- PC = cia;
- store_word (State.regs[REG_SP] + FETCH32(IMM32A, IMM32B, IMM32C, IMM32D),
- State.regs[REG_D0 + DM1]);
-}
-
-
-// 1111 0011 01Dm DiAn; mov Dm,(Di,An)
-8.0xf3+01,2.DM2,2.DI,2.AN0:D0j:::mov
-"mov"
-*mn10300
-*am33
-{
- /* OP_F340 (); */
- PC = cia;
- store_word ((State.regs[REG_A0 + AN0] + State.regs[REG_D0 + DI]),
- State.regs[REG_D0 + DM2]);
-}
-
-
-// 0000 Dm01 abs16..., mov Dm,(abs16) (abs16 is zero-extended).
-4.0x0,2.DM1,01+8.IMM16A+8.IMM16B:S2a:::mov
-"mov"
-*mn10300
-*am33
-{
- /* OP_10000 (); */
- PC = cia;
- store_word (FETCH16(IMM16A, IMM16B), State.regs[REG_D0 + DM1]);
-}
-
-
-// 1111 1100 1000 Dm01 abs32...; mov Dm,(abs32)
-8.0xfc+4.0x8,2.DM1,01+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D4h:::mov
-"mov"
-*mn10300
-*am33
-{
- /* OP_FC810000 (); */
- PC = cia;
- store_word (FETCH32(IMM32A, IMM32B, IMM32C, IMM32D),
- State.regs[REG_D0 + DM1]);
-}
-
-
-// 1111 0000 0001 AmAn; mov Am,(An)
-8.0xf0+4.0x1,2.AM1,2.AN0:D0k:::mov
-"mov"
-*mn10300
-*am33
-{
- /* OP_F010 (); */
- PC = cia;
- store_word (State.regs[REG_A0 + AN0], State.regs[REG_A0 + AM1]);
-}
-
-
-// 1111 1000 0011 AmAn d8......; mov Am,(d8,An) (d8 is sign-extended)
-8.0xf8+4.0x3,2.AM1,2.AN0+8.D8:D1d:::mov
-"mov"
-*mn10300
-*am33
-{
- /* OP_F83000 (); */
- PC = cia;
- store_word ((State.regs[REG_A0 + AN0] + EXTEND8 (D8)),
- State.regs[REG_A0 + AM1]);
-}
-
-
-// 1111 1010 0011 AmAn d16.....; mov Am,(d16,An) (d16 is sign-extended.)
-8.0xfa+4.0x3,2.AM1,2.AN0+8.D16A+8.D16B:D2g:::mov
-"mov"
-*mn10300
-*am33
-{
- /* OP_FA300000 (); */
- PC = cia;
- store_word ((State.regs[REG_A0 + AN0] + EXTEND16 (FETCH16(D16A, D16B))),
- State.regs[REG_A0 + AM1]);
-}
-
-
-// 1111 1100 0011 AmAn d32.....; mov Am,(d32,An)
-8.0xfc+4.0x3,2.AM1,2.AN0+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D4i:::mov
-"mov"
-*mn10300
-*am33
-{
- /* OP_FC300000 (); */
- PC = cia;
- store_word ((State.regs[REG_A0 + AN0]
- + FETCH32(IMM32A, IMM32B, IMM32C, IMM32D)),
- State.regs[REG_A0 + AM1]);
-}
-
-
-// 0100 Am11 d8......; mov Am,(d8,SP) (d8 is zero-extended)
-4.0x4,2.AM1,11+8.D8:S1c:::mov
-"mov"
-*mn10300
-
-*am33
-
-{
- /* OP_4300 (); */
- PC = cia;
- store_word (State.regs[REG_SP] + (D8), State.regs[REG_A0 + (AM1)]);
-}
-
-
-// 1111 1010 1001 Am00 d16.....; mov Am,(d16,SP) (d16 is zero-extended.)
-8.0xfa+4.0x9,2.AM1,00+8.IMM16A+8.IMM16B:D2h:::mov
-"mov"
-*mn10300
-
-*am33
-
-{
- /* OP_FA900000 (); */
- PC = cia;
- store_word (State.regs[REG_SP] + FETCH16(IMM16A, IMM16B),
- State.regs[REG_A0 + AM1]);
-}
-
-
-// 1111 1100 1001 Am00 d32.....; mov Am,(d32,SP)
-8.0xfc+4.0x9,2.AM1,00+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D4j:::mov
-"mov"
-*mn10300
-
-*am33
-
-{
- /* OP_FC900000 (); */
- PC = cia;
- store_word (State.regs[REG_SP] + FETCH32(IMM32A, IMM32B, IMM32C, IMM32D),
- State.regs[REG_A0 + AM1]);
-}
-
-
-// 1111 0011 11Am DiAn; mov Am,(Di,An)
-8.0xf3+11,2.AM2,2.DI,2.AN0:D0l:::mov
-"mov"
-*mn10300
-
-*am33
-
-{
- /* OP_F3C0 (); */
- PC = cia;
- store_word ((State.regs[REG_A0 + AN0] + State.regs[REG_D0 + DI]),
- State.regs[REG_A0 + AM2]);
-}
-
-
-// 1111 1010 1000 Am00 abs16...; mov Am,(abs16) (abs16 is zero-extended)
-8.0xfa+4.0x8,2.AM1,00+8.IMM16A+8.IMM16B:D2i:::mov
-"mov"
-*mn10300
-
-*am33
-
-{
- /* OP_FA800000 (); */
- PC = cia;
- store_word (FETCH16(IMM16A, IMM16B),
- State.regs[REG_A0 + AM1]);
-}
-
-
-// 1111 1100 1000 Am00 abs32...; mov Am,(abs32)
-8.0xfc+4.0x8,2.AM1,00+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D4k:::mov
-"mov"
-*mn10300
-
-*am33
-
-{
- /* OP_FC800000 (); */
- PC = cia;
- store_word (FETCH32(IMM32A, IMM32B, IMM32C, IMM32D),
- State.regs[REG_A0 + AM1]);
-}
-
-
-// 1111 1000 1111 01An d8......; mov SP,(d8,An) (d8 is sign-extended)
-8.0xf8+4.0xf,01,2.AN0+8.D8:D1e:::mov
-"mov"
-*mn10300
-
-*am33
-
-{
- /* OP_F8F400 (); */
- PC = cia;
- store_word (State.regs[REG_A0 + AN0] + EXTEND8 (D8),
- State.regs[REG_SP]);
-}
-
-
-// 0010 11Dn imm16...; mov imm16,Dn (imm16 is sign-extended)
-4.0x2,11,2.DN0+8.IMM16A+8.IMM16B:S2b:::mov
-"mov"
-*mn10300
-
-*am33
-
-{
- /* OP_2C0000 (); */
- unsigned32 value;
-
- PC = cia;
- value = EXTEND16 (FETCH16(IMM16A, IMM16B));
- State.regs[REG_D0 + DN0] = value;
-}
-
-
-// 1111 1100 1100 11Dn imm32...; mov imm32,Dn
-8.0xfc+4.0xc,11,2.DN0+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D4l:::mov
-"mov"
-*mn10300
-
-*am33
-
-{
- /* OP_FCCC0000 (); */
- unsigned32 value;
-
- PC = cia;
- value = FETCH32(IMM32A, IMM32B, IMM32C, IMM32D);
- State.regs[REG_D0 + DN0] = value;
-}
-
-
-// 0010 01An imm16...; mov imm16,An (imm16 is zero-extended)
-4.0x2,01,2.AN0+8.IMM16A+8.IMM16B:S2c:::mov
-"mov"
-*mn10300
-
-*am33
-
-{
- /* OP_240000 (); */
- unsigned32 value;
-
- PC = cia;
- value = FETCH16(IMM16A, IMM16B);
- State.regs[REG_A0 + AN0] = value;
-}
-
-
-// 1111 1100 1101 11An imm32...; mov imm32,An
-8.0xfc+4.0xd,11,2.AN0+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D4m:::mov
-"mov"
-*mn10300
-
-*am33
-
-{
- /* OP_FCDC0000 (); */
- PC = cia;
- State.regs[REG_A0 + AN0] = FETCH32(IMM32A, IMM32B, IMM32C, IMM32D);
-}
-
-
-// 1111 0000 0100 DnAm; movbu (Am),Dn
-8.0xf0+4.0x4,2.DN1,2.AM0:D0:::movbu
-"movbu"
-*mn10300
-
-*am33
-
-{
- /* OP_F040 (); */
- PC = cia;
- State.regs[REG_D0 + DN1]
- = load_byte (State.regs[REG_A0 + AM0]);
-}
-
-
-// 1111 1000 0100 DnAm d8......; movbu (d8,Am),Dn (d8 is sign-extended)
-8.0xf8+4.0x4,2.DN1,2.AM0+8.D8:D1f:::movbu
-"movbu"
-*mn10300
-
-*am33
-
-{
- /* OP_F84000 (); */
- PC = cia;
- State.regs[REG_D0 + DN1]
- = load_byte ((State.regs[REG_A0 + AM0] + EXTEND8 (D8)));
-}
-
-
-// 1111 1010 0100 DnAm d16.....; movbu (d16,Am),Dn (d16 is sign-extended.)
-8.0xfa+4.0x4,2.DN1,2.AM0+8.D16A+8.D16B:D2:::movbu
-"movbu"
-*mn10300
-
-*am33
-
-{
- /* OP_FA400000 (); */
- PC = cia;
- State.regs[REG_D0 + DN1]
- = load_byte ((State.regs[REG_A0 + AM0]
- + EXTEND16 (FETCH16(D16A, D16B))));
-}
-
-
-// 1111 1100 0100 DnAm d32.....; movbu (d32,Am),Dn
-8.0xfc+4.0x4,2.DN1,2.AM0+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D4:::movbu
-"movbu"
-*mn10300
-
-*am33
-
-{
- /* OP_FC400000 (); */
- PC = cia;
- State.regs[REG_D0 + DN1]
- = load_byte ((State.regs[REG_A0 + AM0]
- + FETCH32(IMM32A, IMM32B, IMM32C, IMM32D)));
-}
-
-
-// 1111 1000 1011 10Dn d8......; movbu (d8,SP),Dn (d8 is zero-extended)
-8.0xf8+4.0xb,10,2.DN0+8.D8:D1a:::movbu
-"movbu"
-*mn10300
-
-*am33
-
-{
- /* OP_F8B800 (); */
- PC = cia;
- State.regs[REG_D0 + DN0]
- = load_byte ((State.regs[REG_SP] + (D8)));
-}
-
-
-// 1111 1010 1011 10Dn d16.....; movbu (d16,SP),Dn (d16 is zero-extended.)
-8.0xfa+4.0xb,10,2.DN0+8.IMM16A+8.IMM16B:D2a:::movbu
-"movbu"
-*mn10300
-
-*am33
-
-{
- /* OP_FAB80000 (); */
- PC = cia;
- State.regs[REG_D0 + DN0]
- = load_byte ((State.regs[REG_SP]
- + FETCH16(IMM16A, IMM16B)));
-}
-
-
-// 1111 1100 1011 10Dn d32.....; movbu (d32,SP),Dn
-8.0xfc+4.0xb,10,2.DN0+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D4a:::movbu
-"movbu"
-*mn10300
-
-*am33
-
-{
- /* OP_FCB80000 (); */
- PC = cia;
- State.regs[REG_D0 + DN0]
- = load_byte (State.regs[REG_SP]
- + FETCH32(IMM32A, IMM32B, IMM32C, IMM32D));
-}
-
-
-// 1111 0100 00Dn DiAm; movbu (Di,Am),Dn
-8.0xf4+00,2.DN2,2.DI,2.AM0:D0a:::movbu
-"movbu"
-*mn10300
-
-*am33
-
-{
- /* OP_F400 (); */
- PC = cia;
- State.regs[REG_D0 + DN2]
- = load_byte ((State.regs[REG_A0 + AM0]
- + State.regs[REG_D0 + DI]));
-}
-
-
-// 0011 01Dn abs16...; movbu (abs16),Dn (abs16 is zero-extended)
-4.0x3,01,2.DN0+8.IMM16A+8.IMM16B:S2:::movbu
-"movbu"
-*mn10300
-
-*am33
-
-{
- /* OP_340000 (); */
- PC = cia;
- State.regs[REG_D0 + DN0] = load_byte (FETCH16(IMM16A, IMM16B));
-}
-
-
-// 1111 1100 1010 10Dn abs32...; movbu (abs32),Dn
-8.0xfc+4.0xa,10,2.DN0+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D4b:::movbu
-"movbu"
-*mn10300
-
-*am33
-
-{
- /* OP_FCA80000 (); */
- PC = cia;
- State.regs[REG_D0 + DN0]
- = load_byte (FETCH32(IMM32A, IMM32B, IMM32C, IMM32D));
-}
-
-
-// 1111 0000 0101 DmAn; movbu Dm,(An)
-8.0xf0+4.0x5,2.DM1,2.AN0:D0b:::movbu
-"movbu"
-*mn10300
-
-*am33
-
-{
- /* OP_F050 (); */
- PC = cia;
- store_byte (State.regs[REG_A0 + AN0], State.regs[REG_D0 + DM1]);
-}
-
-
-// 1111 1000 0101 DmAn d8......; movbu Dm,(d8,An) (d8 is sign-extended)
-8.0xf8+4.0x5,2.DM1,2.AN0+8.D8:D1b:::movbu
-"movbu"
-*mn10300
-
-*am33
-
-{
- /* OP_F85000 (); */
- PC = cia;
- store_byte ((State.regs[REG_A0 + AN0] + EXTEND8 (D8)),
- State.regs[REG_D0 + DM1]);
-}
-
-
-// 1111 1010 0101 DmAn d16.....; movbu Dm,(d16,An) (d16 is sign-extended.)
-8.0xfa+4.0x5,2.DM1,2.AN0+8.D16A+8.D16B:D2b:::movbu
-"movbu"
-*mn10300
-
-*am33
-
-{
- /* OP_FA500000 (); */
- PC = cia;
- store_byte ((State.regs[REG_A0 + AN0] + EXTEND16 (FETCH16(D16A, D16B))),
- State.regs[REG_D0 + DM1]);
-}
-
-
-// 1111 1100 0101 DmAn d32.....; movbu Dm,(d32,An)
-8.0xfc+4.0x5,2.DM1,2.AN0+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D4c:::movbu
-"movbu"
-*mn10300
-
-*am33
-
-{
- /* OP_FC500000 (); */
- PC = cia;
- store_byte ((State.regs[REG_A0 + AN0]
- + FETCH32(IMM32A, IMM32B, IMM32C, IMM32D)),
- State.regs[REG_D0 + DM1]);
-}
-
-
-// 1111 1000 1001 Dm10 d8......; movbu Dm,(d8,SP) (d8 is zero-extended)
-8.0xf8+4.0x9,2.DM1,10+8.D8:D1c:::movbu
-"movbu"
-*mn10300
-
-*am33
-
-{
- /* OP_F89200 (); */
- PC = cia;
- store_byte (State.regs[REG_SP] + (D8), State.regs[REG_D0 + DM1]);
-}
-
-
-// 1111 1010 1001 Dm10 d16.....; movbu Dm,(d16,SP) (d16 is zero-extended.)
-8.0xfa+4.0x9,2.DM1,10+8.IMM16A+8.IMM16B:D2c:::movbu
-"movbu"
-*mn10300
-
-*am33
-
-{
- /* OP_FA920000 (); */
- PC = cia;
- store_byte (State.regs[REG_SP] + FETCH16(IMM16A, IMM16B),
- State.regs[REG_D0 + DM1]);
-}
-
-
-// 1111 1100 1001 Dm10 d32.....; movbu Dm,(d32,SP)
-8.0xfc+4.0x9,2.DM1,10+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D4d:::movbu
-"movbu"
-*mn10300
-
-*am33
-
-{
- /* OP_FC920000 (); */
- PC = cia;
- store_byte (State.regs[REG_SP] + FETCH32(IMM32A, IMM32B, IMM32C, IMM32D),
- State.regs[REG_D0 + DM1]);
-}
-
-
-// 1111 0100 01Dm DiAn; movbu Dm,(Di,An)
-8.0xf4+01,2.DM2,2.DI,2.AN0:D0c:::movbu
-"movbu"
-*mn10300
-
-*am33
-
-{
- /* OP_F440 (); */
- PC = cia;
- store_byte ((State.regs[REG_A0 + AN0] + State.regs[REG_D0 + DI]),
- State.regs[REG_D0 + DM2]);
-}
-
-
-// 0000 Dm10 abs16...; movbu Dm,(abs16) (abs16 is zero-extended)
-4.0x0,2.DM1,10+8.IMM16A+8.IMM16B:S2a:::movbu
-"movbu"
-*mn10300
-
-*am33
-
-{
- /* OP_20000 (); */
- PC = cia;
- store_byte (FETCH16(IMM16A, IMM16B),
- State.regs[REG_D0 + DM1]);
-}
-
-
-// 1111 1100 1000 Dm10 abs32...; movbu Dm,(abs32)
-8.0xfc+4.0x8,2.DM1,10+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D4e:::movbu
-"movbu"
-*mn10300
-
-*am33
-
-{
- /* OP_FC820000 (); */
- PC = cia;
- store_byte (FETCH32(IMM32A, IMM32B, IMM32C, IMM32D),
- State.regs[REG_D0 + DM1]);
-}
-
-
-// 1111 0000 0110 DnAm; movhu (Am),Dn
-8.0xf0+4.0x6,2.DN1,2.AM0:D0:::movhu
-"movhu"
-*mn10300
-
-*am33
-
-{
- /* OP_F060 (); */
- PC = cia;
- State.regs[REG_D0 + DN1]
- = load_half (State.regs[REG_A0 + AM0]);
-}
-
-
-// 1111 1000 0110 DnAm d8......; movhu (d8,Am),Dn (d8 is sign-extended)
-8.0xf8+4.0x6,2.DN1,2.AM0+8.D8:D1d:::movhu
-"movhu"
-*mn10300
-
-*am33
-
-{
- /* OP_F86000 (); */
- PC = cia;
- State.regs[REG_D0 + DN1]
- = load_half ((State.regs[REG_A0 + AM0] + EXTEND8 (D8)));
-}
-
-
-// 1111 1010 0110 DnAm d16.....; movhu (d16,Am),Dn (d16 is sign-extended.)
-8.0xfa+4.0x6,2.DN1,2.AM0+8.D16A+8.D16B:D2:::movhu
-"movhu"
-*mn10300
-
-*am33
-
-{
- /* OP_FA600000 (); */
- PC = cia;
- State.regs[REG_D0 + DN1]
- = load_half ((State.regs[REG_A0 + AM0]
- + EXTEND16 (FETCH16(D16A, D16B))));
-}
-
-
-// 1111 1100 0110 DnAm d32.....; movhu (d32,Am),Dn
-8.0xfc+4.0x6,2.DN1,2.AM0+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D4:::movhu
-"movhu"
-*mn10300
-
-*am33
-
-{
- /* OP_FC600000 (); */
- PC = cia;
- State.regs[REG_D0 + DN1]
- = load_half ((State.regs[REG_A0 + AM0]
- + FETCH32(IMM32A, IMM32B, IMM32C, IMM32D)));
-}
-
-
-// 1111 1000 1011 11Dn d8.....; movhu (d8,SP),Dn (d8 is zero-extended)
-8.0xf8+4.0xb,11,2.DN0+8.D8:D1a:::movhu
-"movhu"
-*mn10300
-
-*am33
-
-{
- /* OP_F8BC00 (); */
- PC = cia;
- State.regs[REG_D0 + DN0]
- = load_half ((State.regs[REG_SP] + (D8)));
-}
-
-
-// 1111 1010 1011 11Dn d16.....; movhu (d16,SP),Dn (d16 is zero-extended.)
-8.0xfa+4.0xb,11,2.DN0+8.IMM16A+8.IMM16B:D2a:::movhu
-"movhu"
-*mn10300
-
-*am33
-
-{
- /* OP_FABC0000 (); */
- PC = cia;
- State.regs[REG_D0 + DN0]
- = load_half ((State.regs[REG_SP] + FETCH16(IMM16A, IMM16B)));
-}
-
-
-// 1111 1100 1011 11Dn d32.....; movhu (d32,SP),Dn
-8.0xfc+4.0xb,11,2.DN0+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D4a:::movhu
-"movhu"
-*mn10300
-
-*am33
-
-{
- /* OP_FCBC0000 (); */
- PC = cia;
- State.regs[REG_D0 + DN0]
- = load_half (State.regs[REG_SP] + FETCH32(IMM32A, IMM32B, IMM32C, IMM32D));
-}
-
-
-// 1111 0100 10Dn DiAm; movhu (Di,Am),Dn
-8.0xf4+10,2.DN2,2.DI,2.AM0:D0a:::movhu
-"movhu"
-*mn10300
-
-*am33
-
-{
- /* OP_F480 (); */
- PC = cia;
- State.regs[REG_D0 + DN2]
- = load_half ((State.regs[REG_A0 + AM0] + State.regs[REG_D0 + DI]));
-}
-
-
-// 0011 10Dn abs16...; movhu (abs16),Dn (abs16 is zero-extended)
-4.0x3,10,2.DN0+8.IMM16A+8.IMM16B:S2:::movhu
-"movhu"
-*mn10300
-
-*am33
-
-{
- /* OP_380000 (); */
- PC = cia;
- State.regs[REG_D0 + DN0] = load_half (FETCH16(IMM16A, IMM16B));
-}
-
-
-// 1111 1100 1010 11Dn abs32...; movhu (abs32),Dn
-8.0xfc+4.0xa,11,2.DN0+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D4b:::movhu
-"movhu"
-*mn10300
-
-*am33
-
-{
- /* OP_FCAC0000 (); */
- PC = cia;
- State.regs[REG_D0 + DN0]
- = load_half (FETCH32(IMM32A, IMM32B, IMM32C, IMM32D));
-}
-
-
-// 1111 0000 0111 DmAn; movhu Dm,(An)
-8.0xf0+4.0x7,2.DM1,2.AN0:D0b:::movhu
-"movhu"
-*mn10300
-
-*am33
-
-{
- /* OP_F070 (); */
- PC = cia;
- store_half (State.regs[REG_A0 + AN0],
- State.regs[REG_D0 + DM1]);
-}
-
-
-// 1111 1000 0111 DmAn d8......; movhu Dm,(d8,An) (d8 is sign-extended)
-8.0xf8+4.0x7,2.DM1,2.AN0+8.D8:D1b:::movhu
-"movhu"
-*mn10300
-
-*am33
-
-{
- /* OP_F87000 (); */
- PC = cia;
- store_half ((State.regs[REG_A0 + AN0] + EXTEND8 (D8)),
- State.regs[REG_D0 + DM1]);
-}
-
-
-// 1111 1010 0111 DnAm d16.....; movhu Dm,(d16,An) (d16 is sign-extended.)
-8.0xfa+4.0x7,2.DM1,2.AN0+8.D16A+8.D16B:D2b:::movhu
-"movhu"
-*mn10300
-
-*am33
-
-{
- /* OP_FA700000 (); */
- PC = cia;
- store_half ((State.regs[REG_A0 + AN0] + EXTEND16 (FETCH16(D16A, D16B))),
- State.regs[REG_D0 + DM1]);
-}
-
-
-// 1111 1100 0111 DmAn d32.....; movhu Dm,(d32,An)
-8.0xfc+4.0x7,2.DM1,2.AN0+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D4c:::movhu
-"movhu"
-*mn10300
-
-*am33
-
-{
- /* OP_FC700000 (); */
- PC = cia;
- store_half ((State.regs[REG_A0 + AN0]
- + FETCH32(IMM32A, IMM32B, IMM32C, IMM32D)),
- State.regs[REG_D0 + DM1]);
-}
-
-
-// 1111 1000 1001 Dm11 d8....; movhu Dm,(d8,SP) (d8 is zero-extended)
-8.0xf8+4.0x9,2.DM1,11+8.D8:D1c:::movhu
-"movhu"
-*mn10300
-
-*am33
-
-{
- /* OP_F89300 (); */
- PC = cia;
- store_half (State.regs[REG_SP] + (D8),
- State.regs[REG_D0 + DM1]);
-}
-
-
-// 1111 1010 1001 Dm11 d16.....; movhu Dm,(d16,SP) (d16 is zero-extended.)
-8.0xfa+4.0x9,2.DM1,11+8.IMM16A+8.IMM16B:D2c:::movhu
-"movhu"
-*mn10300
-
-*am33
-
-{
- /* OP_FA930000 (); */
- PC = cia;
- store_half (State.regs[REG_SP] + FETCH16(IMM16A, IMM16B),
- State.regs[REG_D0 + DM1]);
-}
-
-
-// 1111 1100 1001 Dm11 d32.....; movhu Dm,(d32,SP)
-8.0xfc+4.0x9,2.DM1,11+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D4d:::movhu
-"movhu"
-*mn10300
-
-*am33
-
-{
- /* OP_FC930000 (); */
- PC = cia;
- store_half (State.regs[REG_SP] + FETCH32(IMM32A, IMM32B, IMM32C, IMM32D),
- State.regs[REG_D0 + DM1]);
-}
-
-
-// 1111 0100 11Dm DiAn; movhu Dm,(Di,An)
-8.0xf4+11,2.DM2,2.DI,2.AN0:D0c:::movhu
-"movhu"
-*mn10300
-
-*am33
-
-{
- /* OP_F4C0 (); */
- PC = cia;
- store_half ((State.regs[REG_A0 + AN0] + State.regs[REG_D0 + DI]),
- State.regs[REG_D0 + DM2]);
-}
-
-
-// 0000 Dm11 abs16...; movhu Dm,(abs16) (abs16 is zero-extended)
-4.0x0,2.DM1,11+8.IMM16A+8.IMM16B:S2a:::movhu
-"movhu"
-*mn10300
-
-*am33
-
-{
- /* OP_30000 (); */
- PC = cia;
- store_half (FETCH16(IMM16A, IMM16B), State.regs[REG_D0 + DM1]);
-}
-
-
-// 1111 1100 1000 Dm11 abs32...; movhu Dm,(abs32)
-8.0xfc+4.0x8,2.DM1,11+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D4e:::movhu
-"movhu"
-*mn10300
-
-*am33
-
-{
- /* OP_FC830000 (); */
- PC = cia;
- store_half (FETCH32(IMM32A, IMM32B, IMM32C, IMM32D),
- State.regs[REG_D0 + DM1]);
-}
-
-
-// 1111 0010 1101 00Dn; ext Dn
-8.0xf2+4.0xd,00,2.DN0:D0:::ext
-"ext"
-*mn10300
-
-*am33
-
-{
- /* OP_F2D0 (); */
- PC = cia;
- if (State.regs[REG_D0 + DN0] & 0x80000000)
- State.regs[REG_MDR] = -1;
- else
- State.regs[REG_MDR] = 0;
-}
-
-
-// 0001 00Dn; extb Dn
-4.0x1,00,2.DN0:S0:::extb
-"extb"
-*mn10300
-
-*am33
-
-{
- /* OP_10 (); */
- PC = cia;
- State.regs[REG_D0 + DN0] = EXTEND8 (State.regs[REG_D0 + DN0]);
-}
-
-
-// 0001 01Dn; extbu Dn
-4.0x1,01,2.DN0:S0:::extbu
-"extbu"
-*mn10300
-
-*am33
-
-{
- /* OP_14 (); */
- PC = cia;
- State.regs[REG_D0 + DN0] &= 0xff;
-}
-
-
-// 0001 10Dn; exth Dn
-4.0x1,10,2.DN0:S0:::exth
-"exth"
-*mn10300
-
-*am33
-
-{
- /* OP_18 (); */
- PC = cia;
- State.regs[REG_D0 + DN0] = EXTEND16 (State.regs[REG_D0 + DN0]);
-}
-
-
-// 0001 11Dn; exthu Dn
-4.0x1,11,2.DN0:S0:::exthu
-"exthu"
-*mn10300
-
-*am33
-
-{
- /* OP_1C (); */
- PC = cia;
- State.regs[REG_D0 + DN0] &= 0xffff;
-}
-
-
-// 0000 Dn00; clr Dn
-4.0x0,2.DN1,00:S0:::clr
-"clr"
-*mn10300
-
-*am33
-
-{
- /* OP_0 (); */
- PC = cia;
- State.regs[REG_D0 + DN1] = 0;
-
- PSW |= PSW_Z;
- PSW &= ~(PSW_V | PSW_C | PSW_N);
-}
-
-
-// 1110 DmDn; add Dm,Dn
-4.0xe,2.DM1,2.DN0:S0:::add
-"add"
-*mn10300
-
-*am33
-
-{
- /* OP_E0 (); */
- PC = cia;
- genericAdd(State.regs[REG_D0 + DM1], REG_D0 + DN0);
-}
-
-// 1111 0001 0110 DmAn; add Dm,An
-8.0xf1+4.0x6,2.DM1,2.AN0:D0:::add
-"add"
-*mn10300
-
-*am33
-
-{
- /* OP_F160 (); */
- PC = cia;
- genericAdd(State.regs[REG_D0 + DM1], REG_A0 + AN0);
-}
-
-
-// 1111 0001 0101 AmDn; add Am,Dn
-8.0xf1+4.0x5,2.AM1,2.DN0:D0a:::add
-"add"
-*mn10300
-
-*am33
-
-{
- /* OP_F150 (); */
- PC = cia;
- genericAdd(State.regs[REG_A0 + AM1], REG_D0 + DN0);
-}
-
-
-// 1111 0001 0111 AmAn; add Am,An
-8.0xf1+4.0x7,2.AM1,2.AN0:D0b:::add
-"add"
-*mn10300
-
-*am33
-
-{
- /* OP_F170 (); */
- PC = cia;
- genericAdd(State.regs[REG_A0 + AM1], REG_A0 + AN0);
-}
-
-
-// 0010 10Dn imm8....; add imm8,Dn (imm8 is sign-extended)
-4.0x2,10,2.DN0+8.IMM8:S1:::add
-"add"
-*mn10300
-
-*am33
-
-{
- /* OP_2800 (); */
- PC = cia;
- genericAdd(EXTEND8(IMM8), REG_D0 + DN0);
-}
-
-
-// 1111 1010 1100 00Dn imm16...; add imm16,Dn
-8.0xfa+4.0xc,00,2.DN0+8.IMM16A+8.IMM16B:D2:::add
-"add"
-*mn10300
-
-*am33
-
-{
- /* OP_FAC00000 (); */
- PC = cia;
- genericAdd(EXTEND16(FETCH16(IMM16A, IMM16B)), REG_D0 + DN0);
-}
-
-
-// 1111 1100 1100 00Dn imm32...; add imm32,Dn
-8.0xfc+4.0xc,00,2.DN0+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D4:::add
-"add"
-*mn10300
-
-*am33
-
-{
- /* OP_FCC00000 (); */
- PC = cia;
- genericAdd(FETCH32(IMM32A, IMM32B, IMM32C, IMM32D), REG_D0 + DN0);
-}
-
-
-// 0010 00An imm8....; add imm8,An (imm8 is sign-extended)
-4.0x2,00,2.AN0+8.IMM8:S1a:::add
-"add"
-*mn10300
-
-*am33
-
-{
- /* OP_2000 (); */
- PC = cia;
- genericAdd(EXTEND8(IMM8), REG_A0 + AN0);
-}
-
-
-// 1111 1010 1101 00An imm16...; add imm16,An (imm16 is sign-extended.)
-8.0xfa+4.0xd,00,2.AN0+8.IMM16A+8.IMM16B:D2a:::add
-"add"
-*mn10300
-
-*am33
-
-{
- /* OP_FAD00000 (); */
- PC = cia;
- genericAdd(EXTEND16(FETCH16(IMM16A, IMM16B)), REG_A0 + AN0);
-}
-
-
-// 1111 1100 1101 00An imm32...; add imm32,An
-8.0xfc+4.0xd,00,2.AN0+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D4a:::add
-"add"
-*mn10300
-
-*am33
-
-{
- /* OP_FCD00000 (); */
- PC = cia;
- genericAdd(FETCH32(IMM32A, IMM32B, IMM32C, IMM32D), REG_A0 + AN0);
-}
-
-
-// 1111 1000 1111 1110 imm8....; add imm8,SP (imm8 is sign-extended.)
-8.0xf8+8.0xfe+8.IMM8:D1:::add
-"add"
-*mn10300
-
-*am33
-
-{
- /* OP_F8FE00 (); */
- unsigned32 imm;
-
- /* Note: no PSW changes. */
- PC = cia;
- imm = EXTEND8 (IMM8);
- State.regs[REG_SP] += imm;
-}
-
-
-// 1111 1010 1111 1110 imm16...; add imm16,SP (imm16 is sign-extended.)
-8.0xfa+8.0xfe+8.IMM16A+8.IMM16B:D2b:::add
-"add"
-*mn10300
-
-*am33
-
-{
- /* OP_FAFE0000 (); */
- unsigned32 imm;
-
- /* Note: no PSW changes. */
- PC = cia;
- imm = EXTEND16 (FETCH16(IMM16A, IMM16B));
- State.regs[REG_SP] += imm;
-}
-
-
-// 1111 1100 1111 1110 imm32...; add imm32,SP
-8.0xfc+8.0xfe+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D4b:::add
-"add"
-*mn10300
-
-*am33
-
-{
- /* OP_FCFE0000 (); */
- unsigned32 imm;
-
- /* Note: no PSW changes. */
- PC = cia;
- imm = FETCH32(IMM32A, IMM32B, IMM32C, IMM32D);
- State.regs[REG_SP] += imm;
-}
-
-
-// 1111 0001 0100 DmDn; addc Dm,Dn
-8.0xf1+4.0x4,2.DM1,2.DN0:D0:::addc
-"addc"
-*mn10300
-
-*am33
-
-{
- /* OP_F140 (); */
- int z, c, n, v;
- unsigned32 reg1, reg2, sum;
-
- PC = cia;
- reg1 = State.regs[REG_D0 + DM1];
- reg2 = State.regs[REG_D0 + DN0];
- sum = reg1 + reg2 + ((PSW & PSW_C) != 0);
- State.regs[REG_D0 + DN0] = sum;
-
- z = ((PSW & PSW_Z) != 0) && (sum == 0);
- n = (sum & 0x80000000);
- c = (sum < reg1) || (sum < reg2);
- v = ((reg2 & 0x80000000) == (reg1 & 0x80000000)
- && (reg2 & 0x80000000) != (sum & 0x80000000));
-
- PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
- PSW |= ((z ? PSW_Z : 0) | ( n ? PSW_N : 0)
- | (c ? PSW_C : 0) | (v ? PSW_V : 0));
-}
-
-
-// 1111 0001 0000 DmDn; sub Dm,Dn
-8.0xf1+4.0x0,2.DM1,2.DN0:D0:::sub
-"sub"
-*mn10300
-
-*am33
-
-{
- /* OP_F100 (); */
- PC = cia;
- genericSub(State.regs[REG_D0 + DM1], REG_D0 + DN0);
-}
-
-// 1111 0001 0010 DmAn; sub DmAn
-8.0xf1+4.0x2,2.DM1,2.AN0:D0a:::sub
-"sub"
-*mn10300
-
-*am33
-
-{
- /* OP_F120 (); */
- PC = cia;
- genericSub(State.regs[REG_D0 + DM1], REG_A0 + AN0);
-}
-
-
-// 1111 0001 0001 AmDn; sub AmDn
-8.0xf1+4.0x1,2.AM1,2.DN0:D0b:::sub
-"sub"
-*mn10300
-
-*am33
-
-{
- /* OP_F110 (); */
- PC = cia;
- genericSub(State.regs[REG_A0 + AM1], REG_D0 + DN0);
-}
-
-
-// 1111 0001 0011 AmAn; sub Am,An
-8.0xf1+4.0x3,2.AM1,2.AN0:D0c:::sub
-"sub"
-*mn10300
-
-*am33
-
-{
- /* OP_F130 (); */
- PC = cia;
- genericSub(State.regs[REG_A0 + AM1], REG_A0 + AN0);
-}
-
-
-// 1111 1100 1100 01Dn imm32...; sub imm32,Dn
-8.0xfc+4.0xc,01,2.DN0+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D4:::sub
-"sub"
-*mn10300
-
-*am33
-
-{
- /* OP_FCC40000 (); */
- PC = cia;
- genericSub(FETCH32(IMM32A, IMM32B, IMM32C, IMM32D), REG_D0 + DN0);
-}
-
-
-// 1111 1100 1101 01An imm32...; sub imm32,An
-8.0xfc+4.0xd,01,2.AN0+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D4a:::sub
-"sub"
-*mn10300
-
-*am33
-
-{
- /* OP_FCD40000 (); */
- PC = cia;
- genericSub(FETCH32(IMM32A, IMM32B, IMM32C, IMM32D), REG_A0 + AN0);
-}
-
-
-// 1111 0001 1000 DmDn; subc Dm,Dn
-8.0xf1+4.0x8,2.DM1,2.DN0:D0:::subc
-"subc"
-*mn10300
-
-*am33
-
-{
- /* OP_F180 (); */
- int z, c, n, v;
- unsigned32 reg1, reg2, difference;
-
- PC = cia;
- reg1 = State.regs[REG_D0 + DM1];
- reg2 = State.regs[REG_D0 + DN0];
- difference = reg2 - reg1 - ((PSW & PSW_C) != 0);
- State.regs[REG_D0 + DN0] = difference;
-
- z = ((PSW & PSW_Z) != 0) && (difference == 0);
- n = (difference & 0x80000000);
- c = (reg1 > reg2);
- v = ((reg2 & 0x80000000) != (reg1 & 0x80000000)
- && (reg2 & 0x80000000) != (difference & 0x80000000));
-
- PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
- PSW |= ((z ? PSW_Z : 0) | ( n ? PSW_N : 0)
- | (c ? PSW_C : 0) | (v ? PSW_V : 0));
-}
-
-
-// 1111 0010 0100 DmDn; mul Dm,Dn
-8.0xf2+4.0x4,2.DM1,2.DN0:D0:::mul
-"mul"
-*mn10300
-
-*am33
-
-{
- /* OP_F240 (); */
- unsigned64 temp;
- int n, z;
-
- PC = cia;
- temp = ((signed64)(signed32)State.regs[REG_D0 + DN0]
- * (signed64)(signed32)State.regs[REG_D0 + DM1]);
- State.regs[REG_D0 + DN0] = temp & 0xffffffff;
- State.regs[REG_MDR] = (temp & 0xffffffff00000000LL) >> 32;;
- z = (State.regs[REG_D0 + DN0] == 0);
- n = (State.regs[REG_D0 + DN0] & 0x80000000) != 0;
- PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
- PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0));
-}
-
-
-// 1111 0010 0101 DmDn; mulu Dm,Dn
-8.0xf2+4.0x5,2.DM1,2.DN0:D0:::mulu
-"mulu"
-*mn10300
-
-*am33
-
-{
- /* OP_F250 (); */
- unsigned64 temp;
- int n, z;
-
- PC = cia;
- temp = ((unsigned64)State.regs[REG_D0 + DN0]
- * (unsigned64)State.regs[REG_D0 + DM1]);
- State.regs[REG_D0 + DN0] = temp & 0xffffffff;
- State.regs[REG_MDR] = (temp & 0xffffffff00000000LL) >> 32;
- z = (State.regs[REG_D0 + DN0] == 0);
- n = (State.regs[REG_D0 + DN0] & 0x80000000) != 0;
- PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
- PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0));
-}
-
-
-// 1111 0010 0110 DmDn; div Dm,Dn
-8.0xf2+4.0x6,2.DM1,2.DN0:D0:::div
-"div"
-*mn10300
-
-*am33
-
-{
- /* OP_F260 (); */
- signed64 temp;
- signed32 denom;
- int n, z, v;
-
- PC = cia;
- denom = (signed32)State.regs[REG_D0 + DM1];
-
- temp = State.regs[REG_MDR];
- temp <<= 32;
- temp |= State.regs[REG_D0 + DN0];
- if ( !(v = (0 == denom)) )
- {
- State.regs[REG_MDR] = temp % (signed32)State.regs[REG_D0 + DM1];
- temp /= (signed32)State.regs[REG_D0 + DM1];
- State.regs[REG_D0 + DN0] = temp & 0xffffffff;
- }
- else
- {
- State.regs[REG_MDR] = temp;
- State.regs[REG_D0 + DN0] = 0xff;
- }
- z = (State.regs[REG_D0 + DN0] == 0);
- n = (State.regs[REG_D0 + DN0] & 0x80000000) != 0;
- PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
- PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0) | (v ? PSW_V : 0));
-}
-
-
-// 1111 0010 0111 DmDn; divu Dm,Dn
-8.0xf2+4.0x7,2.DM1,2.DN0:D0:::divu
-"divu"
-*mn10300
-
-*am33
-
-{
- /* OP_F270 (); */
- unsigned64 temp;
- unsigned32 denom;
- int n, z, v;
-
- PC = cia;
- denom = (unsigned32)State.regs[REG_D0 + DM1];
- temp = State.regs[REG_MDR];
- temp <<= 32;
- temp |= State.regs[REG_D0 + DN0];
- if ( !(v = (0 == denom)) )
- {
- State.regs[REG_MDR] = temp % State.regs[REG_D0 + DM1];
- temp /= State.regs[REG_D0 + DM1];
- State.regs[REG_D0 + DN0] = temp & 0xffffffff;
- }
- else
- {
- State.regs[REG_MDR] = temp;
- State.regs[REG_D0 + DN0] = 0xff;
- }
- z = (State.regs[REG_D0 + DN0] == 0);
- n = (State.regs[REG_D0 + DN0] & 0x80000000) != 0;
- PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
- PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0) | (v ? PSW_V : 0));
-}
-
-
-// 0100 Dn00; inc Dn
-4.0x4,2.DN1,00:S0:::inc
-"inc"
-*mn10300
-
-*am33
-
-{
- /* OP_40 (); */
- unsigned32 imm;
-
- PC = cia;
- imm = 1;
- genericAdd(imm, REG_D0 + DN1);
-}
-
-
-// 0100 An01
-4.0x4,2.AN1,01:S0a:::inc
-"inc"
-*mn10300
-
-*am33
-
-{
- /* OP_41 (); */
- PC = cia;
- State.regs[REG_A0 + AN1] += 1;
-}
-
-
-// 0101 00An; inc4 An
-4.0x5,00,2.AN0:S0:::inc4
-"inc4"
-*mn10300
-
-*am33
-
-{
- /* OP_50 (); */
- PC = cia;
- State.regs[REG_A0 + AN0] += 4;
-}
-
-
-// 1010 DnDn imm8....; cmp imm8,Dn (imm8 is sign-extended.)
-4.0xa,2.DM1,2.DN0=DM1+IMM8:S0i:::cmp
-"cmp"
-*mn10300
-
-*am33
-
-{
- PC = cia;
- /* OP_A000 (); */
- genericCmp(EXTEND8 (IMM8), State.regs[REG_D0 + DN0]);
-}
-
-
-// 1010 DmDn; cmp Dm,Dn (Dm != Dn, see above when Dm == Dn)
-4.0xa,2.DM1,2.DN0!DM1:S0:::cmp
-"cmp"
-*mn10300
-
-*am33
-
-{
- PC = cia;
- /* OP_A0 (); */
- genericCmp(State.regs[REG_D0 + DM1], State.regs[REG_D0 + DN0]);
-}
-
-
-// 1111 0001 1010 DmAn; cmp Dm,An
-8.0xf1+4.0xa,2.DM1,2.AN0:D0:::cmp
-"cmp"
-*mn10300
-
-*am33
-
-{
- /* OP_F1A0 (); */
- PC = cia;
- genericCmp(State.regs[REG_D0 + DM1], State.regs[REG_A0 + AN0]);
-}
-
-
-// 1111 0001 1001 AmDn; cmp Am,Dn
-8.0xf1+4.0x9,2.AM1,2.DN0:D0a:::cmp
-"cmp"
-*mn10300
-
-*am33
-
-{
- /* OP_F190 (); */
- PC = cia;
- genericCmp(State.regs[REG_A0 + AM1], State.regs[REG_D0 + DN0]);
-}
-
-
-// 1011 AnAn imm8....; cmp imm8,An (imm8 is zero-extended.)
-4.0xb,2.AM1,2.AN0=AM1+IMM8:S0ai:::cmp
-"cmp"
-*mn10300
-
-*am33
-
-{
- PC = cia;
- /* OP_B000 (); */
- genericCmp(IMM8,
- State.regs[REG_A0 + AN0]);
-}
-
-
-// 1011 AmAn; cmp Am,An (Dm != Dn, see above when Dm == Dn)
-4.0xb,2.AM1,2.AN0!AM1:S0a:::cmp
-"cmp"
-*mn10300
-
-*am33
-
-{
- PC = cia;
- /* OP_B0 (); */
- genericCmp(State.regs[REG_A0 + AM1], State.regs[REG_A0 + AN0]);
-}
-
-
-// 1111 1010 1100 10Dn imm16...; cmp imm16,Dn (imm16 is sign-extended.)
-8.0xfa+4.0xc,10,2.DN0+8.IMM16A+8.IMM16B:D2:::cmp
-"cmp"
-*mn10300
-
-*am33
-
-{
- /* OP_FAC80000 (); */
- PC = cia;
- genericCmp(EXTEND16(FETCH16(IMM16A, IMM16B)),
- State.regs[REG_D0 + DN0]);
-}
-
-
-// 1111 1100 1100 10Dn imm32...; cmp imm32,Dn
-8.0xfc+4.0xc,10,2.DN0+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D4:::cmp
-"cmp"
-*mn10300
-
-*am33
-
-{
- /* OP_FCC80000 (); */
- PC = cia;
- genericCmp(FETCH32(IMM32A, IMM32B, IMM32C, IMM32D),
- State.regs[REG_D0 + DN0]);
-}
-
-
-// 1111 1010 1101 10An imm16...; cmp imm16,An (imm16 is zero-extended.)
-8.0xfa+4.0xd,10,2.AN0+8.IMM16A+8.IMM16B:D2a:::cmp
-"cmp"
-*mn10300
-
-*am33
-
-{
- /* OP_FAD80000 (); */
- PC = cia;
- genericCmp(FETCH16(IMM16A, IMM16B),
- State.regs[REG_A0 + AN0]);
-}
-
-
-// 1111 1100 1101 10An imm32...; cmp imm32,An
-8.0xfc+4.0xd,10,2.AN0+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D4a:::cmp
-"cmp"
-*mn10300
-
-*am33
-
-{
- /* OP_FCD80000 (); */
- PC = cia;
- genericCmp(FETCH32(IMM32A, IMM32B, IMM32C, IMM32D),
- State.regs[REG_A0 + AN0]);
-}
-
-
-// 1111 0010 0000 DmDn; and Dm,Dn
-8.0xf2+4.0x0,2.DM1,2.DN0:D0:::and
-"and"
-*mn10300
-
-*am33
-
-{
- /* OP_F200 (); */
- int n, z;
-
- PC = cia;
- State.regs[REG_D0 + DN0] &= State.regs[REG_D0 + DM1];
- z = (State.regs[REG_D0 + DN0] == 0);
- n = (State.regs[REG_D0 + DN0] & 0x80000000) != 0;
- PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
- PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0));
-}
-
-
-// 1111 1000 1110 00Dn imm8....; and imm8,Dn (imm8 is zero-extended.)
-8.0xf8+4.0xe,00,2.DN0+8.IMM8:D1:::and
-"and"
-*mn10300
-
-*am33
-
-{
- /* OP_F8E000 (); */
- int n, z;
-
- PC = cia;
- State.regs[REG_D0 + DN0] &= IMM8;
- z = (State.regs[REG_D0 + DN0] == 0);
- n = (State.regs[REG_D0 + DN0] & 0x80000000) != 0;
- PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
- PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0));
-}
-
-
-// 1111 1010 1110 00Dn imm16...; and imm16,Dn (imm16 is zero-extended.)
-8.0xfa+4.0xe,00,2.DN0+8.IMM16A+8.IMM16B:D2:::and
-"and"
-*mn10300
-
-*am33
-
-{
- /* OP_FAE00000 (); */
- int n, z;
-
- PC = cia;
- State.regs[REG_D0 + DN0] &= FETCH16(IMM16A, IMM16B);
- z = (State.regs[REG_D0 + DN0] == 0);
- n = (State.regs[REG_D0 + DN0] & 0x80000000) != 0;
- PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
- PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0));
-}
-
-
-// 1111 1100 1110 00Dn imm32...; and imm32,Dn
-8.0xfc+4.0xe,00,2.DN0+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D4:::and
-"and"
-*mn10300
-
-*am33
-
-{
- /* OP_FCE00000 (); */
- int n, z;
-
- PC = cia;
- State.regs[REG_D0 + DN0]
- &= FETCH32(IMM32A, IMM32B, IMM32C, IMM32D);
- z = (State.regs[REG_D0 + DN0] == 0);
- n = (State.regs[REG_D0 + DN0] & 0x80000000) != 0;
- PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
- PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0));
-}
-
-
-// 1111 1010 1111 1100 imm16...; and imm16,PSW (imm16 is zero-extended.)
-8.0xfa+8.0xfc+8.IMM16A+8.IMM16B:D2a:::and
-"and"
-*mn10300
-
-*am33
-
-{
- /* OP_FAFC0000 (); */
- PC = cia;
- PSW &= FETCH16(IMM16A, IMM16B);
-}
-
-
-
-// 1111 0010 0001 DmDn; or DmDn
-8.0xf2+4.0x1,2.DM1,2.DN0:D0:::or
-"or"
-*mn10300
-
-*am33
-
-{
- /* OP_F210 (); */
- PC = cia;
- genericOr(State.regs[REG_D0 + DM1], REG_D0 + DN0);
-}
-
-
-// 1111 1000 1110 01Dn imm8....; or imm8,Dn (imm8 is zero-extended.)n
-8.0xf8+4.0xe,01,2.DN0+8.IMM8:D1:::or
-"or"
-*mn10300
-
-*am33
-
-{
- /* OP_F8E400 (); */
- PC = cia;
- genericOr(IMM8, REG_D0 + DN0);
-}
-
-
-// 1111 1010 1110 01Dn imm16...; or imm16,DN (imm16 is zero-extended.)
-8.0xfa+4.0xe,01,2.DN0+8.IMM16A+8.IMM16B:D2:::or
-"or"
-*mn10300
-
-*am33
-
-{
- /* OP_FAE40000 (); */
- PC = cia;
- genericOr(FETCH16(IMM16A, IMM16B), REG_D0 + DN0);
-}
-
-
-// 1111 1100 1110 01Dn imm32...; or imm32,Dn
-8.0xfc+4.0xe,01,2.DN0+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D4:::or
-"or"
-*mn10300
-
-*am33
-
-{
- /* OP_FCE40000 (); */
- PC = cia;
- genericOr(FETCH32(IMM32A, IMM32B, IMM32C, IMM32D), REG_D0 + DN0);
-}
-
-
-// 1111 1010 1111 1101 imm16...; or imm16,PSW (imm16 is zero-extended.)
-8.0xfa+8.0xfd+8.IMM16A+8.IMM16B:D2a:::or
-"or"
-*mn10300
-
-*am33
-
-{
- /* OP_FAFD0000 (); */
- PC = cia;
- PSW |= FETCH16(IMM16A, IMM16B);
-}
-
-
-// 1111 0010 0010 DmDn; xor Dm,Dn
-8.0xf2+4.0x2,2.DM1,2.DN0:D0:::xor
-"xor"
-*mn10300
-
-*am33
-
-{
- /* OP_F220 (); */
- PC = cia;
- genericXor(State.regs[REG_D0 + DM1], REG_D0 + DN0);
-}
-
-
-// 1111 1010 1110 10Dn imm16...; xor imm16,Dn (imm16 is zero-extended.)
-8.0xfa+4.0xe,10,2.DN0+8.IMM16A+8.IMM16B:D2:::xor
-"xor"
-*mn10300
-
-*am33
-
-{
- /* OP_FAE80000 (); */
- PC = cia;
- genericXor(FETCH16(IMM16A, IMM16B), REG_D0 + DN0);
-}
-
-
-// 1111 1100 1110 10Dn imm32...; xor imm32,Dn
-8.0xfc+4.0xe,10,2.DN0+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D4:::xor
-"xor"
-*mn10300
-
-*am33
-
-{
- /* OP_FCE80000 (); */
- PC = cia;
- genericXor(FETCH32(IMM32A, IMM32B, IMM32C, IMM32D), REG_D0 + DN0);
-}
-
-
-// 1111 0010 0011 00Dn; not Dn
-8.0xf2+4.0x3,00,2.DN0:D0:::not
-"not"
-*mn10300
-
-*am33
-
-{
- /* OP_F230 (); */
- int n, z;
-
- PC = cia;
- State.regs[REG_D0 + DN0] = ~State.regs[REG_D0 + DN0];
- z = (State.regs[REG_D0 + DN0] == 0);
- n = (State.regs[REG_D0 + DN0] & 0x80000000) != 0;
- PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
- PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0));
-}
-
-
-// 1111 1000 1110 11Dn imm8....; btst imm8,Dn (imm8 is zero-extended.)
-8.0xf8+4.0xe,11,2.DN0+8.IMM8:D1:::btst
-"btst"
-*mn10300
-
-*am33
-
-{
- /* OP_F8EC00 (); */
- PC = cia;
- genericBtst(IMM8, State.regs[REG_D0 + DN0]);
-}
-
-
-// 1111 1010 1110 11Dn imm16.....; btst imm16,Dn (imm16 is zero-extended.)
-8.0xfa+4.0xe,11,2.DN0+8.IMM16A+8.IMM16B:D2:::btst
-"btst"
-*mn10300
-
-*am33
-
-{
- /* OP_FAEC0000 (); */
- PC = cia;
- genericBtst(FETCH16(IMM16A, IMM16B), State.regs[REG_D0 + DN0]);
-}
-
-
-// 1111 1100 1110 11Dn imm32...; btst imm32,Dn
-8.0xfc+4.0xe,11,2.DN0+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D4:::btst
-"btst"
-*mn10300
-
-*am33
-
-{
- /* OP_FCEC0000 (); */
- PC = cia;
- genericBtst(FETCH32(IMM32A, IMM32B, IMM32C, IMM32D),
- State.regs[REG_D0 + DN0]);
-}
-
-
-// 1111 1110 0000 0010 abs32... imm8....; btst imm8,(abs32) (imm8 is zero-extended., processing unit: byte)
-8.0xfe+8.0x02+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D+8.IMM8:D5:::btst
-"btst"
-*mn10300
-
-*am33
-
-{
- /* OP_FE020000 (); */
- PC = cia;
- genericBtst(IMM8,
- load_byte(FETCH32(IMM32A, IMM32B, IMM32C, IMM32D)));
-}
-
-
-// 1111 1010 1111 10An d8...... imm8....;
-// btst imm8,(d8,An) (d8 is sign-extended,imm8 is zero-extended., processing unit: byte)
-8.0xfa+4.0xf,10,2.AN0+8.D8+8.IMM8:D2a:::btst
-"btst"
-*mn10300
-
-*am33
-
-{
- /* OP_FAF80000 (); */
- PC = cia;
- genericBtst(IMM8,
- load_byte(State.regs[REG_A0 + AN0] + EXTEND8(D8)));
-}
-
-
-// 1111 0000 1000 DmAn; bset Dm,(An) (Processing unit byte)
-8.0xf0+4.8,2.DM1,2.AN0:D0:::bset
-"bset"
-*mn10300
-
-*am33
-
-{
- /* OP_F080 (); */
- unsigned32 temp;
- int z;
-
- PC = cia;
- temp = load_byte (State.regs[REG_A0 + AN0]);
- z = (temp & State.regs[REG_D0 + DM1]) == 0;
- temp |= State.regs[REG_D0 + DM1];
- store_byte (State.regs[REG_A0 + AN0], temp);
- PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
- PSW |= (z ? PSW_Z : 0);
-}
-
-
-// 1111 1110 0000 0000 abs32... imm8....;
-// bset imm8,(abs32) (imm8 is zero-extended., processing unit: byte)
-8.0xfe+8.0x00+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D+8.IMM8:D5:::bset
-"bset"
-*mn10300
-
-*am33
-
-{
- /* OP_FE000000 (); */
- unsigned32 temp;
- int z;
-
- PC = cia;
- temp = load_byte (FETCH32(IMM32A, IMM32B, IMM32C, IMM32D));
- z = (temp & IMM8) == 0;
- temp |= IMM8;
- store_byte (FETCH32(IMM32A, IMM32B, IMM32C, IMM32D), temp);
- PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
- PSW |= (z ? PSW_Z : 0);
-}
-
-
-// 1111 1010 1111 00AnAn d8...... imm8....;
-// bset imm8,(d8,An) (d8 is sign-extended, imm8 is zero-extended., processing unit: byte)
-8.0xfa+4.0xf,00,2.AN0+8.D8+8.IMM8:D2:::bset
-"bset"
-*mn10300
-
-*am33
-
-{
- /* OP_FAF00000 (); */
- unsigned32 temp;
- int z;
-
- PC = cia;
- temp = load_byte ((State.regs[REG_A0 + AN0] + EXTEND8 (D8)));
- z = (temp & (IMM8)) == 0;
- temp |= (IMM8);
- store_byte ((State.regs[REG_A0 + AN0] + EXTEND8 (D8)), temp);
- PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
- PSW |= (z ? PSW_Z : 0);
-}
-
-
-// 1111 0000 1001 DmAn; bclr Dm,(An) (Processing unit byte)
-8.0xf0+4.0x9,2.DM1,2.AN0:D0:::bclr
-"bclr"
-*mn10300
-
-*am33
-
-{
- /* OP_F090 (); */
- unsigned32 temp;
- int z;
-
- PC = cia;
- temp = load_byte (State.regs[REG_A0 + AN0]);
- z = (temp & State.regs[REG_D0 + DM1]) == 0;
- temp = temp & ~State.regs[REG_D0 + DM1];
- store_byte (State.regs[REG_A0 + AN0], temp);
- PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
- PSW |= (z ? PSW_Z : 0);
-}
-
-
-// 1111 1110 0000 0001 abs32... imm8....;
-// bclr imm8,(abs32) (imm8 is zero-extended., processing unit: byte)
-8.0xfe+8.0x01+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D+8.IMM8:D5:::bclr
-"bclr"
-*mn10300
-
-*am33
-
-{
- /* OP_FE010000 (); */
- unsigned32 temp;
- int z;
-
- PC = cia;
- temp = load_byte (FETCH32(IMM32A, IMM32B, IMM32C, IMM32D));
- z = (temp & IMM8) == 0;
- temp = temp & ~(IMM8);
- store_byte (FETCH32(IMM32A, IMM32B, IMM32C, IMM32D), temp);
- PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
- PSW |= (z ? PSW_Z : 0);
-}
-
-
-// 1111 1010 1111 01An d8...... imm8....;
-// bclr imm8,(d8,An) (d8 is sign-extended, imm8 is zero-extended., processing unit: byte)
-8.0xfa+4.0xf,01,2.AN0+8.D8+8.IMM8:D2:::bclr
-"bclr"
-*mn10300
-
-*am33
-
-{
- /* OP_FAF40000 (); */
- unsigned32 temp;
- int z;
-
- PC = cia;
- temp = load_byte ((State.regs[REG_A0 + AN0] + EXTEND8 (D8)));
- z = (temp & (IMM8)) == 0;
- temp = temp & ~(IMM8);
- store_byte ((State.regs[REG_A0 + AN0] + EXTEND8 (D8)), temp);
- PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
- PSW |= (z ? PSW_Z : 0);
-}
-
-
-// 1111 0010 1011 DmDn; asr Dm,Dn
-8.0xf2+4.0xb,2.DM1,2.DN0:D0:::asr
-"asr"
-*mn10300
-
-*am33
-
-{
- /* OP_F2B0 (); */
- signed32 temp;
- int z, n, c;
-
- PC = cia;
- temp = State.regs[REG_D0 + DN0];
- c = temp & 1;
- temp >>= State.regs[REG_D0 + DM1];
- State.regs[REG_D0 + DN0] = temp;
- z = (State.regs[REG_D0 + DN0] == 0);
- n = (State.regs[REG_D0 + DN0] & 0x80000000) != 0;
- PSW &= ~(PSW_Z | PSW_N | PSW_C);
- PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0) | (c ? PSW_C : 0));
-}
-
-
-// 1111 1000 1100 10Dn imm8...; asr imm8,Dn (imm8 is zero-extended.)
-8.0xf8+4.0xc,10,2.DN0+8.IMM8:D1:::asr
-"asr"
-*mn10300
-
-*am33
-
-{
- /* OP_F8C800 (); */
- signed32 temp;
- int z, n, c;
-
- PC = cia;
- temp = State.regs[REG_D0 + DN0];
- c = temp & 1;
- temp >>= IMM8;
- State.regs[REG_D0 + DN0] = temp;
- z = (State.regs[REG_D0 + DN0] == 0);
- n = (State.regs[REG_D0 + DN0] & 0x80000000) != 0;
- PSW &= ~(PSW_Z | PSW_N | PSW_C);
- PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0) | (c ? PSW_C : 0));
-}
-
-
-// 1111 0010 1010 DmDn; lsr Dm,Dn
-8.0xf2+4.0xa,2.DM1,2.DN0:D0:::lsr
-"lsr"
-*mn10300
-
-*am33
-
-{
- /* OP_F2A0 (); */
- int z, n, c;
-
- PC = cia;
- c = State.regs[REG_D0 + DN0] & 1;
- State.regs[REG_D0 + DN0]
- >>= State.regs[REG_D0 + DM1];
- z = (State.regs[REG_D0 + DN0] == 0);
- n = (State.regs[REG_D0 + DN0] & 0x80000000) != 0;
- PSW &= ~(PSW_Z | PSW_N | PSW_C);
- PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0) | (c ? PSW_C : 0));
-}
-
-
-// 1111 1000 1100 01Dn imm8...; lsr imm8,Dn (imm8 is zero-extended.)
-8.0xf8+4.0xc,01,2.DN0+8.IMM8:D1:::lsr
-"lsr"
-*mn10300
-
-*am33
-
-{
- /* OP_F8C400 (); */
- int z, n, c;
-
- PC = cia;
- c = State.regs[REG_D0 + DN0] & 1;
- State.regs[REG_D0 + DN0] >>= IMM8;
- z = (State.regs[REG_D0 + DN0] == 0);
- n = (State.regs[REG_D0 + DN0] & 0x80000000) != 0;
- PSW &= ~(PSW_Z | PSW_N | PSW_C);
- PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0) | (c ? PSW_C : 0));
-}
-
-
-// 1111 0010 1001 DmDn; asl Dm,Dn
-8.0xf2+4.0x9,2.DM1,2.DN0:D0:::asl
-"asl"
-*mn10300
-
-*am33
-
-{
- /* OP_F290 (); */
- int n, z;
-
- PC = cia;
- State.regs[REG_D0 + DN0]
- <<= State.regs[REG_D0 + DM1];
- z = (State.regs[REG_D0 + DN0] == 0);
- n = (State.regs[REG_D0 + DN0] & 0x80000000) != 0;
- PSW &= ~(PSW_Z | PSW_N);
- PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0));
-}
-
-
-// 1111 1000 1100 00Dn imm8...; asl imm8,Dn (imm8 is zero-extended.)
-8.0xf8+4.0xc,00,2.DN0+8.IMM8:D1:::asl
-"asl"
-*mn10300
-
-*am33
-
-{
- /* OP_F8C000 (); */
- int n, z;
-
- PC = cia;
- State.regs[REG_D0 + DN0] <<= IMM8;
- z = (State.regs[REG_D0 + DN0] == 0);
- n = (State.regs[REG_D0 + DN0] & 0x80000000) != 0;
- PSW &= ~(PSW_Z | PSW_N);
- PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0));
-}
-
-
-// 0101 01Dn; als2 Dn
-4.0x5,01,2.DN0:S0:::asl2
-"asl2"
-*mn10300
-
-*am33
-
-{
- /* OP_54 (); */
- int n, z;
- PC = cia;
-
- State.regs[REG_D0 + DN0] <<= 2;
- z = (State.regs[REG_D0 + DN0] == 0);
- n = (State.regs[REG_D0 + DN0] & 0x80000000) != 0;
- PSW &= ~(PSW_Z | PSW_N);
- PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0));
-}
-
-
-// 1111 0010 1000 01Dn; ror Dn
-8.0xf2+4.0x8,01,2.DN0:D0:::ror
-"ror"
-*mn10300
-
-*am33
-
-{
- /* OP_F284 (); */
- unsigned32 value;
- int c,n,z;
-
- PC = cia;
- value = State.regs[REG_D0 + DN0];
- c = (value & 0x1);
-
- value >>= 1;
- value |= ((PSW & PSW_C) != 0) ? 0x80000000 : 0;
- State.regs[REG_D0 + DN0] = value;
- z = (value == 0);
- n = (value & 0x80000000) != 0;
- PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
- PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0) | (c ? PSW_C : 0));
-}
-
-
-// 1111 0010 1000 00Dn; rol Dn
-8.0xf2+4.0x8,00,2.DN0:D0:::rol
-"rol"
-*mn10300
-
-*am33
-
-{
- /* OP_F280 (); */
- unsigned32 value;
- int c,n,z;
-
- PC = cia;
- value = State.regs[REG_D0 + DN0];
- c = (value & 0x80000000) ? 1 : 0;
-
- value <<= 1;
- value |= ((PSW & PSW_C) != 0);
- State.regs[REG_D0 + DN0] = value;
- z = (value == 0);
- n = (value & 0x80000000) != 0;
- PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
- PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0) | (c ? PSW_C : 0));
-}
-
-
-// 1100 1000 d8......; beq (d8,PC) (d8 is sign-extended)
-8.0xc8+8.D8:S1:::beq
-"beq"
-*mn10300
-
-*am33
-
-{
- /* OP_C800 (); */
- PC = cia;
- if ((PSW & PSW_Z))
- {
- State.regs[REG_PC] += EXTEND8 (D8);
- nia = PC;
- }
-}
-
-
-// 1100 1001 d8......; bne (d8,PC) (d8 is sign-extended)
-8.0xc9+8.D8:S1:::bne
-"bne"
-*mn10300
-
-*am33
-
-{
- /* OP_C900 (); */
- PC = cia;
- if (!(PSW & PSW_Z))
- {
- State.regs[REG_PC] += EXTEND8 (D8);
- nia = PC;
- }
-}
-
-
-// 1100 0001 d8......; bgt (d8,PC) (d8 is sign-extended)
-8.0xc1+8.D8:S1:::bgt
-"bgt"
-*mn10300
-
-*am33
-
-{
- /* OP_C100 (); */
- PC = cia;
- if (!((PSW & PSW_Z)
- || (((PSW & PSW_N) != 0) ^ ((PSW & PSW_V) != 0))))
- {
- State.regs[REG_PC] += EXTEND8 (D8);
- nia = PC;
- }
-}
-
-
-// 1100 0010 d8......; bge (d8,PC) (d8 is sign-extended)
-8.0xc2+8.D8:S1:::bge
-"bge"
-*mn10300
-
-*am33
-
-{
- /* OP_C200 (); */
- PC = cia;
- if (!(((PSW & PSW_N) != 0) ^ ((PSW & PSW_V) != 0)))
- {
- State.regs[REG_PC] += EXTEND8 (D8);
- nia = PC;
- }
-}
-
-
-// 1100 0011 d8......; ble (d8,PC) (d8 is sign-extended)
-8.0xc3+8.D8:S1:::ble
-"ble"
-*mn10300
-
-*am33
-
-{
- /* OP_C300 (); */
- PC = cia;
- if ((PSW & PSW_Z)
- || (((PSW & PSW_N) != 0) ^ ((PSW & PSW_V) != 0)))
- {
- State.regs[REG_PC] += EXTEND8 (D8);
- nia = PC;
- }
-}
-
-
-// 1100 0000 d8......; blt (d8,PC) (d8 is sign-extended)
-8.0xc0+8.D8:S1:::blt
-"blt"
-*mn10300
-
-*am33
-
-{
- /* OP_C000 (); */
- PC = cia;
- if (((PSW & PSW_N) != 0) ^ ((PSW & PSW_V) != 0))
- {
- State.regs[REG_PC] += EXTEND8 (D8);
- nia = PC;
- }
-}
-
-
-// 1100 0101 d8......; bhi (d8,PC) (d8 is sign-extended)
-8.0xc5+8.D8:S1:::bhi
-"bhi"
-*mn10300
-
-*am33
-
-{
- /* OP_C500 (); */
- PC = cia;
- if (!(((PSW & PSW_C) != 0) || (PSW & PSW_Z) != 0))
- {
- State.regs[REG_PC] += EXTEND8 (D8);
- nia = PC;
- }
-}
-
-
-// 1100 0110 d8......; bcc (d8,PC) (d8 is sign-extended)
-8.0xc6+8.D8:S1:::bcc
-"bcc"
-*mn10300
-
-*am33
-
-{
- /* OP_C600 (); */
- PC = cia;
- if (!(PSW & PSW_C))
- {
- State.regs[REG_PC] += EXTEND8 (D8);
- nia = PC;
- }
-}
-
-
-// 1100 0101 d8......; bls (d8,PC) (d8 is sign-extended)
-8.0xc7+8.D8:S1:::bls
-"bls"
-*mn10300
-
-*am33
-
-{
- /* OP_C700 (); */
- PC = cia;
- if (((PSW & PSW_C) != 0) || (PSW & PSW_Z) != 0)
- {
- State.regs[REG_PC] += EXTEND8 (D8);
- nia = PC;
- }
-}
-
-
-// 1100 0100 d8......; bcs (d8,PC) (d8 is sign-extended)
-8.0xc4+8.D8:S1:::bcs
-"bcs"
-*mn10300
-
-*am33
-
-{
- /* OP_C400 (); */
- PC = cia;
- if (PSW & PSW_C)
- {
- State.regs[REG_PC] += EXTEND8 (D8);
- nia = PC;
- }
-}
-
-
-// 1111 1000 1110 1000 d8......; bvc (d8,PC) (d8 is sign-extended)
-8.0xf8+8.0xe8+8.D8:D1:::bvc
-"bvc"
-*mn10300
-
-*am33
-
-{
- /* OP_F8E800 (); */
- PC = cia;
- if (!(PSW & PSW_V))
- {
- State.regs[REG_PC] += EXTEND8 (D8);
- nia = PC;
- }
-}
-
-
-// 1111 1000 1110 1001 d8......; bvs (d8,PC) (d8 is sign-extended)
-8.0xf8+8.0xe9+8.D8:D1:::bvs
-"bvs"
-*mn10300
-
-*am33
-
-{
- /* OP_F8E900 (); */
- PC = cia;
- if (PSW & PSW_V)
- {
- State.regs[REG_PC] += EXTEND8 (D8);
- nia = PC;
- }
-}
-
-
-// 1111 1000 1110 1010 d8......; bnc (d8,PC) (d8 is sign-extended)
-8.0xf8+8.0xea+8.D8:D1:::bnc
-"bnc"
-*mn10300
-
-*am33
-
-{
- /* OP_F8EA00 (); */
- PC = cia;
- if (!(PSW & PSW_N))
- {
- State.regs[REG_PC] += EXTEND8 (D8);
- nia = PC;
- }
-}
-
-
-// 1111 1000 1110 1010 d8......; bns (d8,PC) (d8 is sign-extended)
-8.0xf8+8.0xeb+8.D8:D1:::bns
-"bns"
-*mn10300
-
-*am33
-
-{
- /* OP_F8EB00 (); */
- PC = cia;
- if (PSW & PSW_N)
- {
- State.regs[REG_PC] += EXTEND8 (D8);
- nia = PC;
- }
-}
-
-
-// 1100 1010 d8......; bra (d8,PC) (d8 is sign-extended)
-8.0xca+8.D8:S1:::bra
-"bra"
-*mn10300
-
-*am33
-
-{
- /* OP_CA00 (); */
- PC = cia;
- State.regs[REG_PC] += EXTEND8 (D8);
- nia = PC;
-}
-
-
-// 1101 1000; leq
-8.0xd8:S0:::leq
-"leq"
-*mn10300
-
-*am33
-
-{
- /* OP_D8 (); */
- PC = cia;
- if (PSW & PSW_Z)
- {
- State.regs[REG_PC] = State.regs[REG_LAR] - 4;
- nia = PC;
- }
-}
-
-
-// 1101 1001; lne
-8.0xd9:S0:::lne
-"lne"
-*mn10300
-
-*am33
-
-{
- /* OP_D9 (); */
- PC = cia;
- if (!(PSW & PSW_Z))
- {
- State.regs[REG_PC] = State.regs[REG_LAR] - 4;
- nia = PC;
- }
-}
-
-
-// 1101 0001; lgt
-8.0xd1:S0:::lgt
-"lgt"
-*mn10300
-
-*am33
-
-{
- /* OP_D1 (); */
- PC = cia;
- if (!((PSW & PSW_Z)
- || (((PSW & PSW_N) != 0) ^ ((PSW & PSW_V) != 0))))
- {
- State.regs[REG_PC] = State.regs[REG_LAR] - 4;
- nia = PC;
- }
-}
-
-
-// 1101 0010; lge
-8.0xd2:S0:::lge
-"lge"
-*mn10300
-
-*am33
-
-{
- /* OP_D2 (); */
- PC = cia;
- if (!(((PSW & PSW_N) != 0) ^ ((PSW & PSW_V) != 0)))
- {
- State.regs[REG_PC] = State.regs[REG_LAR] - 4;
- nia = PC;
- }
-}
-
-
-// 1101 0011; lle
-8.0xd3:S0:::lle
-"lle"
-*mn10300
-
-*am33
-
-{
- /* OP_D3 (); */
- PC = cia;
- if ((PSW & PSW_Z)
- || (((PSW & PSW_N) != 0) ^ ((PSW & PSW_V) != 0)))
- {
- State.regs[REG_PC] = State.regs[REG_LAR] - 4;
- nia = PC;
- }
-}
-
-
-// 1101 0000; llt
-8.0xd0:S0:::llt
-"llt"
-*mn10300
-
-*am33
-
-{
- /* OP_D0 (); */
- PC = cia;
- if (((PSW & PSW_N) != 0) ^ ((PSW & PSW_V) != 0))
- {
- State.regs[REG_PC] = State.regs[REG_LAR] - 4;
- nia = PC;
- }
-}
-
-
-// 1101 0101; lhi
-8.0xd5:S0:::lhi
-"lhi"
-*mn10300
-
-*am33
-
-{
- /* OP_D5 (); */
- PC = cia;
- if (!(((PSW & PSW_C) != 0) || (PSW & PSW_Z) != 0))
- {
- State.regs[REG_PC] = State.regs[REG_LAR] - 4;
- nia = PC;
- }
-}
-
-
-// 1101 0110; lcc
-8.0xd6:S0:::lcc
-"lcc"
-*mn10300
-
-*am33
-
-{
- /* OP_D6 (); */
- PC = cia;
- if (!(PSW & PSW_C))
- {
- State.regs[REG_PC] = State.regs[REG_LAR] - 4;
- nia = PC;
- }
-}
-
-
-// 1101 0111; lls
-8.0xd7:S0:::lls
-"lls"
-*mn10300
-
-*am33
-
-{
- /* OP_D7 (); */
- PC = cia;
- if (((PSW & PSW_C) != 0) || (PSW & PSW_Z) != 0)
- {
- State.regs[REG_PC] = State.regs[REG_LAR] - 4;
- nia = PC;
- }
-}
-
-
-// 1101 0100; lcs
-8.0xd4:S0:::lcs
-"lcs"
-*mn10300
-
-*am33
-
-{
- /* OP_D4 (); */
- PC = cia;
- if (PSW & PSW_C)
- {
- State.regs[REG_PC] = State.regs[REG_LAR] - 4;
- nia = PC;
- }
-}
-
-
-// 1101 1010; lra
-8.0xda:S0:::lra
-"lra"
-*mn10300
-
-*am33
-
-{
- /* OP_DA (); */
- PC = cia;
- State.regs[REG_PC] = State.regs[REG_LAR] - 4;
- nia = PC;
-}
-
-
-// 1101 1010; setlb
-8.0xdb:S0:::setlb
-"setlb"
-*mn10300
-
-*am33
-
-{
- /* OP_DB (); */
- PC = cia;
- State.regs[REG_LIR] = load_word (State.regs[REG_PC] + 1);
- State.regs[REG_LAR] = State.regs[REG_PC] + 5;
-}
-
-
-// 1111 0000 1111 01An; jmp (An)
-8.0xf0+4.0xf,01,2.AN0:D0:::jmp
-"jmp"
-*mn10300
-
-*am33
-
-{
- /* OP_F0F4 (); */
- PC = State.regs[REG_A0 + AN0];
- nia = PC;
-}
-
-
-// 1100 1100 d16.....; jmp (d16,PC) (d16 is sign-extended.)
-8.0xcc+8.D16A+8.D16B:S2:::jmp
-"jmp"
-*mn10300
-
-*am33
-
-{
- /* OP_CC0000 (); */
- PC = cia + EXTEND16(FETCH16(D16A, D16B));
- nia = PC;
-}
-
-
-// 1101 1100 d32........; jmp (d32, PC)
-8.0xdc+8.D32A+8.D32B+8.D32C+8.D32D:S4:::jmp
-"jmp"
-*mn10300
-
-*am33
-
-{
- /* OP_DC000000 (); */
- PC = cia + FETCH32(D32A, D32B, D32C, D32D);
- nia = PC;
-}
-
-
-// 1111 0000 1111 00An; calls (An)
-8.0xf0+4.0xf,00,2.AN0:D0:::calls
-"calls"
-*mn10300
-
-*am33
-
-{
- /* OP_F0F0 (); */
- unsigned32 next_pc, sp;
-
- PC = cia;
- sp = State.regs[REG_SP];
- next_pc = State.regs[REG_PC] + 2;
- store_word(sp, next_pc);
- State.regs[REG_MDR] = next_pc;
- State.regs[REG_PC] = State.regs[REG_A0 + AN0];
- nia = PC;
-}
-
-
-// 1111 1010 1111 1111 d16.....; calls (d16,PC) (d16 is sign-extended.)
-8.0xfa+8.0xff+8.D16A+8.D16B:D2:::calls
-"calls"
-*mn10300
-
-*am33
-
-{
- /* OP_FAFF0000 (); */
- unsigned32 next_pc, sp;
-
- PC = cia;
- sp = State.regs[REG_SP];
- next_pc = State.regs[REG_PC] + 4;
- store_word(sp, next_pc);
- State.regs[REG_MDR] = next_pc;
- State.regs[REG_PC] += EXTEND16 (FETCH16(D16A, D16B));
- nia = PC;
-}
-
-
-// 1111 1100 1111 1111 d32.....; calls (d32,PC)
-8.0xfc+8.0xff+8.D32A+8.D32B+8.D32C+8.D32D:D4:::calls
-"calls"
-*mn10300
-
-*am33
-
-{
- /* OP_FCFF0000 (); */
- unsigned32 next_pc, sp;
-
- PC = cia;
- sp = State.regs[REG_SP];
- next_pc = State.regs[REG_PC] + 6;
- store_word(sp, next_pc);
- State.regs[REG_MDR] = next_pc;
- State.regs[REG_PC] += FETCH32(D32A, D32B, D32C, D32D);
- nia = PC;
-}
-
-
-// 1111 0000 1111 1100; rets
-8.0xf0+8.0xfc:D0:::rets
-"rets"
-*mn10300
-
-*am33
-
-{
- /* OP_F0FC (); */
- unsigned32 sp;
-
- sp = State.regs[REG_SP];
- State.regs[REG_PC] = load_word(sp);
- nia = PC;
-}
-
-
-// 1111 0000 1111 1101; rti
-8.0xf0+8.0xfd:D0:::rti
-"rti"
-*mn10300
-
-*am33
-
-{
- /* OP_F0FD (); */
- unsigned32 sp;
-
- sp = State.regs[REG_SP];
- PSW = load_half(sp);
- State.regs[REG_PC] = load_word(sp+4);
- State.regs[REG_SP] +=8;
- nia = PC;
-}
-
-
-// 1111 0000 1111 1110; trap
-8.0xf0+8.0xfe:D0:::trap
-"trap"
-*mn10300
-
-*am33
-
-{
- /* OP_F0FE (); */
- unsigned32 sp, next_pc;
-
- PC = cia;
- sp = State.regs[REG_SP];
- next_pc = State.regs[REG_PC] + 2;
- store_word(sp, next_pc);
- nia = PC;
-}
-
-
-// 1111 0000 1111 1111; rtm
-8.0xf0+8.0xff:D0:::rtm
-"rtm"
-*mn10300
-
-*am33
-
-{
- /* OP_F0FF (); */
- PC = cia;
- abort ();
-}
-
-
-// 1100 1011; nop
-8.0xcb:S0:::nop
-"nop"
-*mn10300
-
-*am33
-
-{
- /* OP_CB (); */
- PC = cia;
-}
-
-
-// 1111 0101 0000 DmDn; udf20 Dm,Dn
-8.0xf5+4.0x0,2.DM1,2.DN0:D0:::putx
-"putx"
-*mn10300
-{
- /* OP_F500 (); */
- PC = cia;
- State.regs[REG_MDRQ] = State.regs[REG_D0 + DN0];
-}
-
-
-// 1111 0110 1111 DmDn; udf15 Dm,Dn
-8.0xf6+4.0xf,2.DM1,2.DN0:D0:::getx
-"getx"
-*mn10300
-
-*am33
-
-{
- /* OP_F6F0 (); */
- int z, n;
-
- PC = cia;
- z = (State.regs[REG_MDRQ] == 0);
- n = ((State.regs[REG_MDRQ] & 0x80000000) != 0);
- State.regs[REG_D0 + DN0] = State.regs[REG_MDRQ];
-
- PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
- PSW |= (z ? PSW_Z : 0) | (n ? PSW_N : 0);
-}
-
-
-// 1111 0110 0000 DmDn; udf00 Dm,Dn
-8.0xf6+4.0x0,2.DM1,2.DN0:D0:::mulq
-"mulq"
-*mn10300
-
-*am33
-
-{
- /* OP_F600 (); */
- unsigned64 temp;
- int n, z;
-
- PC = cia;
- temp = ((signed64)(signed32)State.regs[REG_D0 + DN0]
- * (signed64)(signed32)State.regs[REG_D0 + DM1]);
- State.regs[REG_D0 + DN0] = temp & 0xffffffff;
- State.regs[REG_MDRQ] = (temp & 0xffffffff00000000LL) >> 32;;
- z = (State.regs[REG_D0 + DN0] == 0);
- n = (State.regs[REG_D0 + DN0] & 0x80000000) != 0;
- PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
- PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0));
-}
-
-
-// 1111 1001 0000 00Dn imm8....; udf00 imm8,Dn (imm8 is sign-extended.)
-8.0xf9+4.0x,00,2.DN0+8.IMM8:D1:::mulq
-"mulq"
-*mn10300
-
-*am33
-
-{
- /* OP_F90000 (); */
- unsigned64 temp;
- int n, z;
-
- PC = cia;
- temp = ((signed64)(signed32)State.regs[REG_D0 + DN0]
- * (signed64)(signed32)EXTEND8 (IMM8));
- State.regs[REG_D0 + DN0] = temp & 0xffffffff;
- State.regs[REG_MDRQ] = (temp & 0xffffffff00000000LL) >> 32;;
- z = (State.regs[REG_D0 + DN0] == 0);
- n = (State.regs[REG_D0 + DN0] & 0x80000000) != 0;
- PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
- PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0));
-}
-
-
-// 1111 1011 0000 00Dn imm16...; udf00 imm16,Dn (imm16 is sign-extended.)
-8.0xfb+4.0x0,00,2.DN0+8.IMM16A+8.IMM16B:D2:::mulq
-"mulq"
-*mn10300
-
-*am33
-
-{
- /* OP_FB000000 (); */
- unsigned64 temp;
- int n, z;
-
- PC = cia;
- temp = ((signed64)(signed32)State.regs[REG_D0 + DN0]
- * (signed64)(signed32)EXTEND16 (FETCH16(IMM16A, IMM16B)));
- State.regs[REG_D0 + DN0] = temp & 0xffffffff;
- State.regs[REG_MDRQ] = (temp & 0xffffffff00000000LL) >> 32;;
- z = (State.regs[REG_D0 + DN0] == 0);
- n = (State.regs[REG_D0 + DN0] & 0x80000000) != 0;
- PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
- PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0));
-}
-
-
-// 1111 1101 0000 00Dn imm32...; udf00 imm32,Dn
-8.0xfd+4.0x0,00,2.DN0+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D4:::mulq
-"mulq"
-*mn10300
-
-*am33
-
-{
- /* OP_FD000000 (); */
- unsigned64 temp;
- int n, z;
-
- PC = cia;
- temp = ((signed64)(signed32)State.regs[REG_D0 + DN0]
- * (signed64)(signed32)(FETCH32(IMM32A, IMM32B, IMM32C, IMM32D)));
- State.regs[REG_D0 + DN0] = temp & 0xffffffff;
- State.regs[REG_MDRQ] = (temp & 0xffffffff00000000LL) >> 32;;
- z = (State.regs[REG_D0 + DN0] == 0);
- n = (State.regs[REG_D0 + DN0] & 0x80000000) != 0;
- PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
- PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0));
-}
-
-
-// 1111 0110 0001 DmDn; udf01 Dm,Dn
-8.0xf6+4.0x1,2.DM1,2.DN0:D0:::mulqu
-"mulqu"
-*mn10300
-
-*am33
-
-{
- /* OP_F610 (); */
- unsigned64 temp;
- int n, z;
-
- PC = cia;
- temp = ((unsigned64) State.regs[REG_D0 + DN0]
- * (unsigned64) State.regs[REG_D0 + DM1]);
- State.regs[REG_D0 + DN0] = temp & 0xffffffff;
- State.regs[REG_MDRQ] = (temp & 0xffffffff00000000LL) >> 32;;
- z = (State.regs[REG_D0 + DN0] == 0);
- n = (State.regs[REG_D0 + DN0] & 0x80000000) != 0;
- PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
- PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0));
-}
-
-
-// 1111 1001 0001 01Dn imm8....; udfu01 imm8,Dn (imm8 is zero-extended.)
-8.0xf9+4.0x1,01,2.DN0+8.IMM8:D1:::mulqu
-"mulqu"
-*mn10300
-
-*am33
-
-{
- /* OP_F91400 (); */
- unsigned64 temp;
- int n, z;
-
- PC = cia;
- temp = ((unsigned64)State.regs[REG_D0 + DN0]
- * (unsigned64)EXTEND8 (IMM8));
- State.regs[REG_D0 + DN0] = temp & 0xffffffff;
- State.regs[REG_MDRQ] = (temp & 0xffffffff00000000LL) >> 32;;
- z = (State.regs[REG_D0 + DN0] == 0);
- n = (State.regs[REG_D0 + DN0] & 0x80000000) != 0;
- PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
- PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0));
-}
-
-
-// 1111 1011 0001 01Dn imm16...; udfu01 imm16,Dn (imm16 is zero-extended.)
-8.0xfb+4.0x1,01,2.DN0+8.IMM16A+8.IMM16B:D2:::mulqu
-"mulqu"
-*mn10300
-
-*am33
-
-{
- /* OP_FB140000 (); */
- unsigned64 temp;
- int n, z;
-
- PC = cia;
- temp = ((unsigned64)State.regs[REG_D0 + DN0]
- * (unsigned64) EXTEND16 (FETCH16(IMM16A, IMM16B)));
- State.regs[REG_D0 + DN0] = temp & 0xffffffff;
- State.regs[REG_MDRQ] = (temp & 0xffffffff00000000LL) >> 32;;
- z = (State.regs[REG_D0 + DN0] == 0);
- n = (State.regs[REG_D0 + DN0] & 0x80000000) != 0;
- PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
- PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0));
-}
-
-
-// 1111 1101 0001 01Dn imm32...; udfu01 imm32,Dn
-8.0xfd+4.0x1,01,2.DN0+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D4:::mulqu
-"mulqu"
-*mn10300
-
-*am33
-
-{
- /* OP_FD140000 (); */
- unsigned64 temp;
- int n, z;
-
- PC = cia;
- temp = ((unsigned64)State.regs[REG_D0 + DN0]
- * (unsigned64)(FETCH32(IMM32A, IMM32B, IMM32C, IMM32D)));
- State.regs[REG_D0 + DN0] = temp & 0xffffffff;
- State.regs[REG_MDRQ] = (temp & 0xffffffff00000000LL) >> 32;;
- z = (State.regs[REG_D0 + DN0] == 0);
- n = (State.regs[REG_D0 + DN0] & 0x80000000) != 0;
- PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
- PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0));
-}
-
-
-// 1111 0110 0100 DmDn; udf04 Dm,Dn
-8.0xf6+4.0x4,2.DM1,2.DN0:D0:::sat16
-"sat16"
-*mn10300
-
-*am33
-
-{
- /* OP_F640 (); */
- int temp;
-
- PC = cia;
- temp = State.regs[REG_D0 + DM1];
- temp = (temp > 0x7fff ? 0x7fff : temp);
- temp = (temp < -0x8000 ? -0x8000 : temp);
- State.regs[REG_D0 + DN0] = temp;
-}
-
-
-// 1111 0110 0101 DmDn; udf05 Dm,Dn
-8.0xf6+4.0x5,2.DM1,2.DN0:D0:::sat24
-"sat24"
-*mn10300
-
-*am33
-
-{
- /* OP_F650 (); */
- int temp;
-
- PC = cia;
- temp = State.regs[REG_D0 + DM1];
- temp = (temp > 0x7fffff ? 0x7fffff : temp);
- temp = (temp < -0x800000 ? -0x800000 : temp);
- State.regs[REG_D0 + DN0] = temp;
-}
-
-
-// 1111 0110 0111 DmDn; udf07 Dm,Dn
-8.0xf6+4.0x7,2.DM1,2.DN0:D0:::bsch
-"bsch"
-*mn10300
-
-*am33
-
-{
- /* OP_F670 (); */
- int temp, c;
-
- PC = cia;
- temp = State.regs[REG_D0 + DM1];
- temp <<= (State.regs[REG_D0 + DN0] & 0x1f);
- c = (temp != 0 ? 1 : 0);
- PSW &= ~(PSW_C);
- PSW |= (c ? PSW_C : 0);
-}
-
-
-// 1111 0000 1100 0000; syscall
-8.0xf0+8.0xc0:D0:::syscall
-"syscall"
-*mn10300
-
-*am33
-
-{
- /* OP_F0C0 (); */
- PC = cia;
- do_syscall ();
-}
-
-
-// 1111 1111; break
-8.0xff:S0:::break
-"break"
-*mn10300
-
-*am33
-
-{
- /* OP_FF (); */
- PC = cia;
- program_interrupt(SD, CPU, cia, SIM_SIGTRAP);
-}
-
-// 1100 1110 regs....; movm (SP),regs
-8.0xce+8.REGS:S1:::movm
-"movm"
-*mn10300
-
-*am33
-
-{
- /* OP_CE00 (); */
- unsigned32 sp = State.regs[REG_SP];
- unsigned32 mask;
-
- PC = cia;
- mask = REGS;
-
- if (mask & 0x8)
- {
- sp += 4;
- State.regs[REG_LAR] = load_word (sp);
- sp += 4;
- State.regs[REG_LIR] = load_word (sp);
- sp += 4;
- State.regs[REG_MDR] = load_word (sp);
- sp += 4;
- State.regs[REG_A0 + 1] = load_word (sp);
- sp += 4;
- State.regs[REG_A0] = load_word (sp);
- sp += 4;
- State.regs[REG_D0 + 1] = load_word (sp);
- sp += 4;
- State.regs[REG_D0] = load_word (sp);
- sp += 4;
- }
-
- if (mask & 0x10)
- {
- State.regs[REG_A0 + 3] = load_word (sp);
- sp += 4;
- }
-
- if (mask & 0x20)
- {
- State.regs[REG_A0 + 2] = load_word (sp);
- sp += 4;
- }
-
- if (mask & 0x40)
- {
- State.regs[REG_D0 + 3] = load_word (sp);
- sp += 4;
- }
-
- if (mask & 0x80)
- {
- State.regs[REG_D0 + 2] = load_word (sp);
- sp += 4;
- }
-
- if (STATE_ARCHITECTURE (sd)->mach == bfd_mach_am33
- )
- {
- if (mask & 0x1)
- {
- /* Need to restore MDRQ, MCRH, MCRL, and MCVF */
- sp += 16;
- State.regs[REG_E0 + 1] = load_word (sp);
- sp += 4;
- State.regs[REG_E0 + 0] = load_word (sp);
- sp += 4;
- }
-
- if (mask & 0x2)
- {
- State.regs[REG_E0 + 7] = load_word (sp);
- sp += 4;
- State.regs[REG_E0 + 6] = load_word (sp);
- sp += 4;
- State.regs[REG_E0 + 5] = load_word (sp);
- sp += 4;
- State.regs[REG_E0 + 4] = load_word (sp);
- sp += 4;
- }
-
- if (mask & 0x4)
- {
- State.regs[REG_E0 + 3] = load_word (sp);
- sp += 4;
- State.regs[REG_E0 + 2] = load_word (sp);
- sp += 4;
- }
- }
-
- /* And make sure to update the stack pointer. */
- State.regs[REG_SP] = sp;
-}
-
-
-// 1100 1111 regs....; movm regs,(SP)
-8.0xcf+8.REGS:S1a:::movm
-"movm"
-*mn10300
-
-*am33
-
-{
- /* OP_CF00 (); */
- unsigned32 sp = State.regs[REG_SP];
- unsigned32 mask;
-
- PC = cia;
- mask = REGS;
-
- if (STATE_ARCHITECTURE (sd)->mach == bfd_mach_am33
- )
- {
- if (mask & 0x4)
- {
- sp -= 4;
- store_word (sp, State.regs[REG_E0 + 2]);
- sp -= 4;
- store_word (sp, State.regs[REG_E0 + 3]);
- }
-
- if (mask & 0x2)
- {
- sp -= 4;
- store_word (sp, State.regs[REG_E0 + 4]);
- sp -= 4;
- store_word (sp, State.regs[REG_E0 + 5]);
- sp -= 4;
- store_word (sp, State.regs[REG_E0 + 6]);
- sp -= 4;
- store_word (sp, State.regs[REG_E0 + 7]);
- }
-
- if (mask & 0x1)
- {
- sp -= 4;
- store_word (sp, State.regs[REG_E0 + 0]);
- sp -= 4;
- store_word (sp, State.regs[REG_E0 + 1]);
- sp -= 16;
- /* Need to save MDRQ, MCRH, MCRL, and MCVF */
- }
- }
-
- if (mask & 0x80)
- {
- sp -= 4;
- store_word (sp, State.regs[REG_D0 + 2]);
- }
-
- if (mask & 0x40)
- {
- sp -= 4;
- store_word (sp, State.regs[REG_D0 + 3]);
- }
-
- if (mask & 0x20)
- {
- sp -= 4;
- store_word (sp, State.regs[REG_A0 + 2]);
- }
-
- if (mask & 0x10)
- {
- sp -= 4;
- store_word (sp, State.regs[REG_A0 + 3]);
- }
-
- if (mask & 0x8)
- {
- sp -= 4;
- store_word (sp, State.regs[REG_D0]);
- sp -= 4;
- store_word (sp, State.regs[REG_D0 + 1]);
- sp -= 4;
- store_word (sp, State.regs[REG_A0]);
- sp -= 4;
- store_word (sp, State.regs[REG_A0 + 1]);
- sp -= 4;
- store_word (sp, State.regs[REG_MDR]);
- sp -= 4;
- store_word (sp, State.regs[REG_LIR]);
- sp -= 4;
- store_word (sp, State.regs[REG_LAR]);
- sp -= 4;
- }
-
- /* And make sure to update the stack pointer. */
- State.regs[REG_SP] = sp;
-}
-
-// 1100 1101 d16..... regs.... imm8....;
-// call (d16,PC),regs,imm8 (d16 is sign-extended., imm8 is zero-extended.)
-8.0xcd+8.D16A+8.D16B+8.REGS+8.IMM8:S4:::call
-"call"
-*mn10300
-
-*am33
-
-{
- /* OP_CD000000 (); */
- unsigned32 next_pc, sp;
- unsigned32 mask;
-
- PC = cia;
- sp = State.regs[REG_SP];
- next_pc = PC + 5;
- store_word(sp, next_pc);
-
- mask = REGS;
-
- if (STATE_ARCHITECTURE (sd)->mach == bfd_mach_am33
- )
- {
- if (mask & 0x4)
- {
- sp -= 4;
- store_word (sp, State.regs[REG_E0 + 2]);
- sp -= 4;
- store_word (sp, State.regs[REG_E0 + 3]);
- }
-
- if (mask & 0x2)
- {
- sp -= 4;
- store_word (sp, State.regs[REG_E0 + 4]);
- sp -= 4;
- store_word (sp, State.regs[REG_E0 + 5]);
- sp -= 4;
- store_word (sp, State.regs[REG_E0 + 6]);
- sp -= 4;
- store_word (sp, State.regs[REG_E0 + 7]);
- }
-
- if (mask & 0x1)
- {
- sp -= 4;
- store_word (sp, State.regs[REG_E0 + 0]);
- sp -= 4;
- store_word (sp, State.regs[REG_E0 + 1]);
- sp -= 16;
- /* Need to save MDRQ, MCRH, MCRL, and MCVF */
- }
- }
-
- if (mask & 0x80)
- {
- sp -= 4;
- store_word (sp, State.regs[REG_D0 + 2]);
- }
-
- if (mask & 0x40)
- {
- sp -= 4;
- store_word (sp, State.regs[REG_D0 + 3]);
- }
-
- if (mask & 0x20)
- {
- sp -= 4;
- store_word (sp, State.regs[REG_A0 + 2]);
- }
-
- if (mask & 0x10)
- {
- sp -= 4;
- store_word (sp, State.regs[REG_A0 + 3]);
- }
-
- if (mask & 0x8)
- {
- sp -= 4;
- store_word (sp, State.regs[REG_D0]);
- sp -= 4;
- store_word (sp, State.regs[REG_D0 + 1]);
- sp -= 4;
- store_word (sp, State.regs[REG_A0]);
- sp -= 4;
- store_word (sp, State.regs[REG_A0 + 1]);
- sp -= 4;
- store_word (sp, State.regs[REG_MDR]);
- sp -= 4;
- store_word (sp, State.regs[REG_LIR]);
- sp -= 4;
- store_word (sp, State.regs[REG_LAR]);
- sp -= 4;
- }
-
- /* Update the stack pointer, note that the register saves to do not
- modify SP. The SP adjustment is derived totally from the imm8
- field. */
- State.regs[REG_SP] -= IMM8;
- State.regs[REG_MDR] = next_pc;
- State.regs[REG_PC] += EXTEND16 (FETCH16(D16A, D16B));
- nia = PC;
-}
-
-
-// 1101 1101 d32..... regs.... imm8....;
-// call (d32,PC),regs,imm8 (imm8 is zero-extended.)
-8.0xdd+8.D32A+8.D32B+8.D32C+8.D32D+8.REGS+8.IMM8:S6:::call
-"call"
-*mn10300
-
-*am33
-
-{
- /* OP_DD000000 (); */
- unsigned32 next_pc, sp;
- unsigned32 mask;
-
- PC = cia;
- sp = State.regs[REG_SP];
- next_pc = State.regs[REG_PC] + 7;
- /* could assert that nia == next_pc here */
- store_word(sp, next_pc);
-
- mask = REGS;
-
- if (STATE_ARCHITECTURE (sd)->mach == bfd_mach_am33
- )
- {
- if (mask & 0x4)
- {
- sp -= 4;
- store_word (sp, State.regs[REG_E0 + 2]);
- sp -= 4;
- store_word (sp, State.regs[REG_E0 + 3]);
- }
-
- if (mask & 0x2)
- {
- sp -= 4;
- store_word (sp, State.regs[REG_E0 + 4]);
- sp -= 4;
- store_word (sp, State.regs[REG_E0 + 5]);
- sp -= 4;
- store_word (sp, State.regs[REG_E0 + 6]);
- sp -= 4;
- store_word (sp, State.regs[REG_E0 + 7]);
- }
-
- if (mask & 0x1)
- {
- sp -= 4;
- store_word (sp, State.regs[REG_E0 + 0]);
- sp -= 4;
- store_word (sp, State.regs[REG_E0 + 1]);
- sp -= 16;
- /* Need to save MDRQ, MCRH, MCRL, and MCVF */
- }
- }
-
- if (mask & 0x80)
- {
- sp -= 4;
- store_word (sp, State.regs[REG_D0 + 2]);
- }
-
- if (mask & 0x40)
- {
- sp -= 4;
- store_word (sp, State.regs[REG_D0 + 3]);
- }
-
- if (mask & 0x20)
- {
- sp -= 4;
- store_word (sp, State.regs[REG_A0 + 2]);
- }
-
- if (mask & 0x10)
- {
- sp -= 4;
- store_word (sp, State.regs[REG_A0 + 3]);
- }
-
- if (mask & 0x8)
- {
- sp -= 4;
- store_word (sp, State.regs[REG_D0]);
- sp -= 4;
- store_word (sp, State.regs[REG_D0 + 1]);
- sp -= 4;
- store_word (sp, State.regs[REG_A0]);
- sp -= 4;
- store_word (sp, State.regs[REG_A0 + 1]);
- sp -= 4;
- store_word (sp, State.regs[REG_MDR]);
- sp -= 4;
- store_word (sp, State.regs[REG_LIR]);
- sp -= 4;
- store_word (sp, State.regs[REG_LAR]);
- sp -= 4;
- }
-
- /* Update the stack pointer, note that the register saves to do not
- modify SP. The SP adjustment is derived totally from the imm8
- field. */
- State.regs[REG_SP] -= IMM8;
- State.regs[REG_MDR] = next_pc;
- State.regs[REG_PC] += FETCH32(D32A, D32B, D32C, D32D);
- nia = PC;
-}
-
-
-// 1101 1111 regs.... imm8....; ret regs,imm8 (imm8 is zero-extended.)
-8.0xdf+8.REGS+8.IMM8:S2:::ret
-"ret"
-*mn10300
-
-*am33
-
-{
- /* OP_DF0000 (); */
- unsigned32 sp, offset;
- unsigned32 mask;
-
- PC = cia;
- State.regs[REG_SP] += IMM8;
- sp = State.regs[REG_SP];
-
- offset = -4;
- mask = REGS;
-
- if (STATE_ARCHITECTURE (sd)->mach == bfd_mach_am33
- )
- {
-
- if (mask & 0x4)
- {
- State.regs[REG_E0 + 2] = load_word (sp + offset);
- offset -= 4;
- State.regs[REG_E0 + 3] = load_word (sp + offset);
- offset -= 4;
- }
-
- if (mask & 0x2)
- {
- State.regs[REG_E0 + 4] = load_word (sp + offset);
- offset -= 4;
- State.regs[REG_E0 + 5] = load_word (sp + offset);
- offset -= 4;
- State.regs[REG_E0 + 6] = load_word (sp + offset);
- offset -= 4;
- State.regs[REG_E0 + 7] = load_word (sp + offset);
- offset -= 4;
- }
-
- if (mask & 0x1)
- {
- /* Need to restore MDRQ, MCRH, MCRL, and MCVF */
- offset -= 16;
- State.regs[REG_E0 + 0] = load_word (sp + offset);
- offset -= 4;
- State.regs[REG_E0 + 1] = load_word (sp + offset);
- offset -= 4;
- }
-
- }
-
- if (mask & 0x80)
- {
- State.regs[REG_D0 + 2] = load_word (sp + offset);
- offset -= 4;
- }
-
- if (mask & 0x40)
- {
- State.regs[REG_D0 + 3] = load_word (sp + offset);
- offset -= 4;
- }
-
- if (mask & 0x20)
- {
- State.regs[REG_A0 + 2] = load_word (sp + offset);
- offset -= 4;
- }
-
- if (mask & 0x10)
- {
- State.regs[REG_A0 + 3] = load_word (sp + offset);
- offset -= 4;
- }
-
- if (mask & 0x8)
- {
- State.regs[REG_D0] = load_word (sp + offset);
- offset -= 4;
- State.regs[REG_D0 + 1] = load_word (sp + offset);
- offset -= 4;
- State.regs[REG_A0] = load_word (sp + offset);
- offset -= 4;
- State.regs[REG_A0 + 1] = load_word (sp + offset);
- offset -= 4;
- State.regs[REG_MDR] = load_word (sp + offset);
- offset -= 4;
- State.regs[REG_LIR] = load_word (sp + offset);
- offset -= 4;
- State.regs[REG_LAR] = load_word (sp + offset);
- offset -= 4;
- }
-
- /* Restore the PC value. */
- State.regs[REG_PC] = load_word(sp);
- nia = PC;
-}
-
-
-// 1101 1110 regs.... imm8....; retf regs,imm8 (imm8 is zero-extended.)
-8.0xde+8.REGS+8.IMM8:S2:::retf
-"retf"
-*mn10300
-
-*am33
-
-{
- /* OP_DE0000 (); */
- unsigned32 sp, offset;
- unsigned32 mask;
-
- PC = cia;
- State.regs[REG_SP] += IMM8;
- sp = State.regs[REG_SP];
- State.regs[REG_PC] = State.regs[REG_MDR];
-
- offset = -4;
- mask = REGS;
-
- if (STATE_ARCHITECTURE (sd)->mach == bfd_mach_am33
- )
- {
-
- if (mask & 0x4)
- {
- State.regs[REG_E0 + 2] = load_word (sp + offset);
- offset -= 4;
- State.regs[REG_E0 + 3] = load_word (sp + offset);
- offset -= 4;
- }
-
- if (mask & 0x2)
- {
- State.regs[REG_E0 + 4] = load_word (sp + offset);
- offset -= 4;
- State.regs[REG_E0 + 5] = load_word (sp + offset);
- offset -= 4;
- State.regs[REG_E0 + 6] = load_word (sp + offset);
- offset -= 4;
- State.regs[REG_E0 + 7] = load_word (sp + offset);
- offset -= 4;
- }
-
- if (mask & 0x1)
- {
- /* Need to restore MDRQ, MCRH, MCRL, and MCVF */
- offset -= 16;
- State.regs[REG_E0 + 0] = load_word (sp + offset);
- offset -= 4;
- State.regs[REG_E0 + 1] = load_word (sp + offset);
- offset -= 4;
- }
-
- }
-
- if (mask & 0x80)
- {
- State.regs[REG_D0 + 2] = load_word (sp + offset);
- offset -= 4;
- }
-
- if (mask & 0x40)
- {
- State.regs[REG_D0 + 3] = load_word (sp + offset);
- offset -= 4;
- }
-
- if (mask & 0x20)
- {
- State.regs[REG_A0 + 2] = load_word (sp + offset);
- offset -= 4;
- }
-
- if (mask & 0x10)
- {
- State.regs[REG_A0 + 3] = load_word (sp + offset);
- offset -= 4;
- }
-
- if (mask & 0x8)
- {
- State.regs[REG_D0] = load_word (sp + offset);
- offset -= 4;
- State.regs[REG_D0 + 1] = load_word (sp + offset);
- offset -= 4;
- State.regs[REG_A0] = load_word (sp + offset);
- offset -= 4;
- State.regs[REG_A0 + 1] = load_word (sp + offset);
- offset -= 4;
- State.regs[REG_MDR] = load_word (sp + offset);
- offset -= 4;
- State.regs[REG_LIR] = load_word (sp + offset);
- offset -= 4;
- State.regs[REG_LAR] = load_word (sp + offset);
- offset -= 4;
- }
- nia = PC;
-}
-
-
-:include::am33:am33.igen
-
diff --git a/sim/mn10300/mn10300_sim.h b/sim/mn10300/mn10300_sim.h
deleted file mode 100644
index da6c25915be..00000000000
--- a/sim/mn10300/mn10300_sim.h
+++ /dev/null
@@ -1,390 +0,0 @@
-#include <stdio.h>
-#include <ctype.h>
-#include "ansidecl.h"
-#include "callback.h"
-#include "opcode/mn10300.h"
-#include <limits.h>
-#include "remote-sim.h"
-#include "bfd.h"
-
-#ifndef INLINE
-#ifdef __GNUC__
-#define INLINE inline
-#else
-#define INLINE
-#endif
-#endif
-
-extern host_callback *mn10300_callback;
-extern SIM_DESC simulator;
-
-#define DEBUG_TRACE 0x00000001
-#define DEBUG_VALUES 0x00000002
-
-extern int mn10300_debug;
-
-#if UCHAR_MAX == 255
-typedef unsigned char uint8;
-typedef signed char int8;
-#else
-#error "Char is not an 8-bit type"
-#endif
-
-#if SHRT_MAX == 32767
-typedef unsigned short uint16;
-typedef signed short int16;
-#else
-#error "Short is not a 16-bit type"
-#endif
-
-#if INT_MAX == 2147483647
-
-typedef unsigned int uint32;
-typedef signed int int32;
-
-#else
-# if LONG_MAX == 2147483647
-
-typedef unsigned long uint32;
-typedef signed long int32;
-
-# else
-# error "Neither int nor long is a 32-bit type"
-# endif
-#endif
-
-typedef uint32 reg_t;
-
-struct simops
-{
- long opcode;
- long mask;
- void (*func)();
- int length;
- int format;
- int numops;
- int operands[16];
-};
-
-/* The current state of the processor; registers, memory, etc. */
-
-struct _state
-{
- reg_t regs[32]; /* registers, d0-d3, a0-a3, sp, pc, mdr, psw,
- lir, lar, mdrq, plus some room for processor
- specific regs. */
- uint8 *mem; /* main memory */
- int exception;
- int exited;
-
- /* All internal state modified by signal_exception() that may need to be
- rolled back for passing moment-of-exception image back to gdb. */
- reg_t exc_trigger_regs[32];
- reg_t exc_suspend_regs[32];
- int exc_suspended;
-
-#define SIM_CPU_EXCEPTION_TRIGGER(SD,CPU,CIA) mn10300_cpu_exception_trigger(SD,CPU,CIA)
-#define SIM_CPU_EXCEPTION_SUSPEND(SD,CPU,EXC) mn10300_cpu_exception_suspend(SD,CPU,EXC)
-#define SIM_CPU_EXCEPTION_RESUME(SD,CPU,EXC) mn10300_cpu_exception_resume(SD,CPU,EXC)
-};
-
-extern struct _state State;
-extern uint32 OP[4];
-extern struct simops Simops[];
-
-#define PC (State.regs[REG_PC])
-#define SP (State.regs[REG_SP])
-
-#define PSW (State.regs[11])
-#define PSW_Z 0x1
-#define PSW_N 0x2
-#define PSW_C 0x4
-#define PSW_V 0x8
-#define PSW_IE LSBIT (11)
-#define PSW_LM LSMASK (10, 8)
-
-#define EXTRACT_PSW_LM LSEXTRACTED16 (PSW, 10, 8)
-#define INSERT_PSW_LM(l) LSINSERTED16 ((l), 10, 8)
-
-#define REG_D0 0
-#define REG_A0 4
-#define REG_SP 8
-#define REG_PC 9
-#define REG_MDR 10
-#define REG_PSW 11
-#define REG_LIR 12
-#define REG_LAR 13
-#define REG_MDRQ 14
-#define REG_E0 15
-#define REG_SSP 23
-#define REG_MSP 24
-#define REG_USP 25
-#define REG_MCRH 26
-#define REG_MCRL 27
-#define REG_MCVF 28
-
-#if WITH_COMMON
-/* These definitions conflict with similar macros in common. */
-#else
-#define SEXT3(x) ((((x)&0x7)^(~0x3))+0x4)
-
-/* sign-extend a 4-bit number */
-#define SEXT4(x) ((((x)&0xf)^(~0x7))+0x8)
-
-/* sign-extend a 5-bit number */
-#define SEXT5(x) ((((x)&0x1f)^(~0xf))+0x10)
-
-/* sign-extend an 8-bit number */
-#define SEXT8(x) ((((x)&0xff)^(~0x7f))+0x80)
-
-/* sign-extend a 9-bit number */
-#define SEXT9(x) ((((x)&0x1ff)^(~0xff))+0x100)
-
-/* sign-extend a 16-bit number */
-#define SEXT16(x) ((((x)&0xffff)^(~0x7fff))+0x8000)
-
-/* sign-extend a 22-bit number */
-#define SEXT22(x) ((((x)&0x3fffff)^(~0x1fffff))+0x200000)
-
-#define MAX32 0x7fffffffLL
-#define MIN32 0xff80000000LL
-#define MASK32 0xffffffffLL
-#define MASK40 0xffffffffffLL
-#endif /* not WITH_COMMON */
-
-#ifdef _WIN32
-#define SIGTRAP 5
-#define SIGQUIT 3
-#endif
-
-#if WITH_COMMON
-
-#define FETCH32(a,b,c,d) \
- ((a)+((b)<<8)+((c)<<16)+((d)<<24))
-
-#define FETCH24(a,b,c) \
- ((a)+((b)<<8)+((c)<<16))
-
-#define FETCH16(a,b) ((a)+((b)<<8))
-
-#define load_byte(ADDR) \
-sim_core_read_unaligned_1 (STATE_CPU (simulator, 0), PC, read_map, (ADDR))
-
-#define load_half(ADDR) \
-sim_core_read_unaligned_2 (STATE_CPU (simulator, 0), PC, read_map, (ADDR))
-
-#define load_word(ADDR) \
-sim_core_read_unaligned_4 (STATE_CPU (simulator, 0), PC, read_map, (ADDR))
-
-#define store_byte(ADDR, DATA) \
-sim_core_write_unaligned_1 (STATE_CPU (simulator, 0), \
- PC, write_map, (ADDR), (DATA))
-
-
-#define store_half(ADDR, DATA) \
-sim_core_write_unaligned_2 (STATE_CPU (simulator, 0), \
- PC, write_map, (ADDR), (DATA))
-
-
-#define store_word(ADDR, DATA) \
-sim_core_write_unaligned_4 (STATE_CPU (simulator, 0), \
- PC, write_map, (ADDR), (DATA))
-#endif /* WITH_COMMON */
-
-#if WITH_COMMON
-#else
-#define load_mem_big(addr,len) \
- (len == 1 ? *((addr) + State.mem) : \
- len == 2 ? ((*((addr) + State.mem) << 8) \
- | *(((addr) + 1) + State.mem)) : \
- len == 3 ? ((*((addr) + State.mem) << 16) \
- | (*(((addr) + 1) + State.mem) << 8) \
- | *(((addr) + 2) + State.mem)) : \
- ((*((addr) + State.mem) << 24) \
- | (*(((addr) + 1) + State.mem) << 16) \
- | (*(((addr) + 2) + State.mem) << 8) \
- | *(((addr) + 3) + State.mem)))
-
-static INLINE uint32
-load_byte (addr)
- SIM_ADDR addr;
-{
- uint8 *p = (addr & 0xffffff) + State.mem;
-
-#ifdef CHECK_ADDR
- if ((addr & 0xffffff) > max_mem)
- abort ();
-#endif
-
- return p[0];
-}
-
-static INLINE uint32
-load_half (addr)
- SIM_ADDR addr;
-{
- uint8 *p = (addr & 0xffffff) + State.mem;
-
-#ifdef CHECK_ADDR
- if ((addr & 0xffffff) > max_mem)
- abort ();
-#endif
-
- return p[1] << 8 | p[0];
-}
-
-static INLINE uint32
-load_3_byte (addr)
- SIM_ADDR addr;
-{
- uint8 *p = (addr & 0xffffff) + State.mem;
-
-#ifdef CHECK_ADDR
- if ((addr & 0xffffff) > max_mem)
- abort ();
-#endif
-
- return p[2] << 16 | p[1] << 8 | p[0];
-}
-
-static INLINE uint32
-load_word (addr)
- SIM_ADDR addr;
-{
- uint8 *p = (addr & 0xffffff) + State.mem;
-
-#ifdef CHECK_ADDR
- if ((addr & 0xffffff) > max_mem)
- abort ();
-#endif
-
- return p[3] << 24 | p[2] << 16 | p[1] << 8 | p[0];
-}
-
-static INLINE uint32
-load_mem (addr, len)
- SIM_ADDR addr;
- int len;
-{
- uint8 *p = (addr & 0xffffff) + State.mem;
-
-#ifdef CHECK_ADDR
- if ((addr & 0xffffff) > max_mem)
- abort ();
-#endif
-
- switch (len)
- {
- case 1:
- return p[0];
- case 2:
- return p[1] << 8 | p[0];
- case 3:
- return p[2] << 16 | p[1] << 8 | p[0];
- case 4:
- return p[3] << 24 | p[2] << 16 | p[1] << 8 | p[0];
- default:
- abort ();
- }
-}
-
-static INLINE void
-store_byte (addr, data)
- SIM_ADDR addr;
- uint32 data;
-{
- uint8 *p = (addr & 0xffffff) + State.mem;
-
-#ifdef CHECK_ADDR
- if ((addr & 0xffffff) > max_mem)
- abort ();
-#endif
-
- p[0] = data;
-}
-
-static INLINE void
-store_half (addr, data)
- SIM_ADDR addr;
- uint32 data;
-{
- uint8 *p = (addr & 0xffffff) + State.mem;
-
-#ifdef CHECK_ADDR
- if ((addr & 0xffffff) > max_mem)
- abort ();
-#endif
-
- p[0] = data;
- p[1] = data >> 8;
-}
-
-static INLINE void
-store_3_byte (addr, data)
- SIM_ADDR addr;
- uint32 data;
-{
- uint8 *p = (addr & 0xffffff) + State.mem;
-
-#ifdef CHECK_ADDR
- if ((addr & 0xffffff) > max_mem)
- abort ();
-#endif
-
- p[0] = data;
- p[1] = data >> 8;
- p[2] = data >> 16;
-}
-
-static INLINE void
-store_word (addr, data)
- SIM_ADDR addr;
- uint32 data;
-{
- uint8 *p = (addr & 0xffffff) + State.mem;
-
-#ifdef CHECK_ADDR
- if ((addr & 0xffffff) > max_mem)
- abort ();
-#endif
-
- p[0] = data;
- p[1] = data >> 8;
- p[2] = data >> 16;
- p[3] = data >> 24;
-}
-#endif /* not WITH_COMMON */
-
-/* Function declarations. */
-
-uint32 get_word PARAMS ((uint8 *));
-uint16 get_half PARAMS ((uint8 *));
-uint8 get_byte PARAMS ((uint8 *));
-void put_word PARAMS ((uint8 *, uint32));
-void put_half PARAMS ((uint8 *, uint16));
-void put_byte PARAMS ((uint8 *, uint8));
-
-extern uint8 *map PARAMS ((SIM_ADDR addr));
-
-INLINE_SIM_MAIN (void) genericAdd PARAMS ((unsigned32 source, unsigned32 destReg));
-INLINE_SIM_MAIN (void) genericSub PARAMS ((unsigned32 source, unsigned32 destReg));
-INLINE_SIM_MAIN (void) genericCmp PARAMS ((unsigned32 leftOpnd, unsigned32 rightOpnd));
-INLINE_SIM_MAIN (void) genericOr PARAMS ((unsigned32 source, unsigned32 destReg));
-INLINE_SIM_MAIN (void) genericXor PARAMS ((unsigned32 source, unsigned32 destReg));
-INLINE_SIM_MAIN (void) genericBtst PARAMS ((unsigned32 leftOpnd, unsigned32 rightOpnd));
-INLINE_SIM_MAIN (int) syscall_read_mem PARAMS ((host_callback *cb,
- struct cb_syscall *sc,
- unsigned long taddr,
- char *buf,
- int bytes));
-INLINE_SIM_MAIN (int) syscall_write_mem PARAMS ((host_callback *cb,
- struct cb_syscall *sc,
- unsigned long taddr,
- const char *buf,
- int bytes));
-INLINE_SIM_MAIN (void) do_syscall PARAMS ((void));
-void program_interrupt (SIM_DESC sd, sim_cpu *cpu, sim_cia cia, SIM_SIGNAL sig);
-
-void mn10300_cpu_exception_trigger(SIM_DESC sd, sim_cpu* cpu, address_word pc);
-void mn10300_cpu_exception_suspend(SIM_DESC sd, sim_cpu* cpu, int exception);
-void mn10300_cpu_exception_resume(SIM_DESC sd, sim_cpu* cpu, int exception);
diff --git a/sim/mn10300/op_utils.c b/sim/mn10300/op_utils.c
deleted file mode 100644
index b46210f6b40..00000000000
--- a/sim/mn10300/op_utils.c
+++ /dev/null
@@ -1,227 +0,0 @@
-#include "sim-main.h"
-#include "targ-vals.h"
-
-#ifdef HAVE_UTIME_H
-#include <utime.h>
-#endif
-
-#ifdef HAVE_TIME_H
-#include <time.h>
-#endif
-
-#ifdef HAVE_UNISTD_H
-#include <unistd.h>
-#endif
-
-#ifdef HAVE_STRING_H
-#include <string.h>
-#else
-#ifdef HAVE_STRINGS_H
-#include <strings.h>
-#endif
-#endif
-#include <sys/stat.h>
-#include <sys/times.h>
-#include <sys/time.h>
-
-
-
-#define REG0(X) ((X) & 0x3)
-#define REG1(X) (((X) & 0xc) >> 2)
-#define REG0_4(X) (((X) & 0x30) >> 4)
-#define REG0_8(X) (((X) & 0x300) >> 8)
-#define REG1_8(X) (((X) & 0xc00) >> 10)
-#define REG0_16(X) (((X) & 0x30000) >> 16)
-#define REG1_16(X) (((X) & 0xc0000) >> 18)
-
-
-INLINE_SIM_MAIN (void)
-genericAdd(unsigned32 source, unsigned32 destReg)
-{
- int z, c, n, v;
- unsigned32 dest, sum;
-
- dest = State.regs[destReg];
- sum = source + dest;
- State.regs[destReg] = sum;
-
- z = (sum == 0);
- n = (sum & 0x80000000);
- c = (sum < source) || (sum < dest);
- v = ((dest & 0x80000000) == (source & 0x80000000)
- && (dest & 0x80000000) != (sum & 0x80000000));
-
- PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
- PSW |= ((z ? PSW_Z : 0) | ( n ? PSW_N : 0)
- | (c ? PSW_C : 0) | (v ? PSW_V : 0));
-}
-
-
-
-
-INLINE_SIM_MAIN (void)
-genericSub(unsigned32 source, unsigned32 destReg)
-{
- int z, c, n, v;
- unsigned32 dest, difference;
-
- dest = State.regs[destReg];
- difference = dest - source;
- State.regs[destReg] = difference;
-
- z = (difference == 0);
- n = (difference & 0x80000000);
- c = (source > dest);
- v = ((dest & 0x80000000) != (source & 0x80000000)
- && (dest & 0x80000000) != (difference & 0x80000000));
-
- PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
- PSW |= ((z ? PSW_Z : 0) | ( n ? PSW_N : 0)
- | (c ? PSW_C : 0) | (v ? PSW_V : 0));
-}
-
-INLINE_SIM_MAIN (void)
-genericCmp(unsigned32 leftOpnd, unsigned32 rightOpnd)
-{
- int z, c, n, v;
- unsigned32 value;
-
- value = rightOpnd - leftOpnd;
-
- z = (value == 0);
- n = (value & 0x80000000);
- c = (leftOpnd > rightOpnd);
- v = ((rightOpnd & 0x80000000) != (leftOpnd & 0x80000000)
- && (rightOpnd & 0x80000000) != (value & 0x80000000));
-
- PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
- PSW |= ((z ? PSW_Z : 0) | ( n ? PSW_N : 0)
- | (c ? PSW_C : 0) | (v ? PSW_V : 0));
-}
-
-
-INLINE_SIM_MAIN (void)
-genericOr(unsigned32 source, unsigned32 destReg)
-{
- int n, z;
-
- State.regs[destReg] |= source;
- z = (State.regs[destReg] == 0);
- n = (State.regs[destReg] & 0x80000000) != 0;
- PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
- PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0));
-}
-
-
-INLINE_SIM_MAIN (void)
-genericXor(unsigned32 source, unsigned32 destReg)
-{
- int n, z;
-
- State.regs[destReg] ^= source;
- z = (State.regs[destReg] == 0);
- n = (State.regs[destReg] & 0x80000000) != 0;
- PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
- PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0));
-}
-
-
-INLINE_SIM_MAIN (void)
-genericBtst(unsigned32 leftOpnd, unsigned32 rightOpnd)
-{
- unsigned32 temp;
- int z, n;
-
- temp = rightOpnd;
- temp &= leftOpnd;
- n = (temp & 0x80000000) != 0;
- z = (temp == 0);
- PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
- PSW |= (z ? PSW_Z : 0) | (n ? PSW_N : 0);
-}
-
-/* Read/write functions for system call interface. */
-INLINE_SIM_MAIN (int)
-syscall_read_mem (host_callback *cb, struct cb_syscall *sc,
- unsigned long taddr, char *buf, int bytes)
-{
- SIM_DESC sd = (SIM_DESC) sc->p1;
- sim_cpu *cpu = STATE_CPU(sd, 0);
-
- return sim_core_read_buffer (sd, cpu, read_map, buf, taddr, bytes);
-}
-
-INLINE_SIM_MAIN (int)
-syscall_write_mem (host_callback *cb, struct cb_syscall *sc,
- unsigned long taddr, const char *buf, int bytes)
-{
- SIM_DESC sd = (SIM_DESC) sc->p1;
- sim_cpu *cpu = STATE_CPU(sd, 0);
-
- return sim_core_write_buffer (sd, cpu, write_map, buf, taddr, bytes);
-}
-
-
-/* syscall */
-INLINE_SIM_MAIN (void)
-do_syscall ()
-{
-
- /* We use this for simulated system calls; we may need to change
- it to a reserved instruction if we conflict with uses at
- Matsushita. */
- int save_errno = errno;
- errno = 0;
-
-/* Registers passed to trap 0 */
-
-/* Function number. */
-#define FUNC (State.regs[0])
-
-/* Parameters. */
-#define PARM1 (State.regs[1])
-#define PARM2 (load_word (State.regs[REG_SP] + 12))
-#define PARM3 (load_word (State.regs[REG_SP] + 16))
-
-/* Registers set by trap 0 */
-
-#define RETVAL State.regs[0] /* return value */
-#define RETERR State.regs[1] /* return error code */
-
-/* Turn a pointer in a register into a pointer into real memory. */
-#define MEMPTR(x) (State.mem + x)
-
- if ( FUNC == TARGET_SYS_exit )
- {
- /* EXIT - caller can look in PARM1 to work out the reason */
- if (PARM1 == 0xdead)
- State.exception = SIGABRT;
- else
- {
- sim_engine_halt (simulator, STATE_CPU (simulator, 0), NULL, PC,
- sim_exited, PARM1);
- State.exception = SIGQUIT;
- }
- State.exited = 1;
- }
- else
- {
- CB_SYSCALL syscall;
-
- CB_SYSCALL_INIT (&syscall);
- syscall.arg1 = PARM1;
- syscall.arg2 = PARM2;
- syscall.arg3 = PARM3;
- syscall.func = FUNC;
- syscall.p1 = (PTR) simulator;
- syscall.read_mem = syscall_read_mem;
- syscall.write_mem = syscall_write_mem;
- cb_syscall (STATE_CALLBACK (simulator), &syscall);
- RETERR = syscall.errcode;
- RETVAL = syscall.result;
- }
-
-
- errno = save_errno;
-}
-
diff --git a/sim/mn10300/sim-main.c b/sim/mn10300/sim-main.c
deleted file mode 100644
index a04099d341b..00000000000
--- a/sim/mn10300/sim-main.c
+++ /dev/null
@@ -1,4 +0,0 @@
-#ifndef SIM_MAIN_C
-#define SIM_MAIN_C
-#include "op_utils.c"
-#endif
diff --git a/sim/mn10300/sim-main.h b/sim/mn10300/sim-main.h
deleted file mode 100644
index d0ff4e47325..00000000000
--- a/sim/mn10300/sim-main.h
+++ /dev/null
@@ -1,107 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1997, Andrew Cagney <cagney@highland.com.au>
- Copyright (C) 1997, Free Software Foundation
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-#ifndef SIM_MAIN_H
-#define SIM_MAIN_H
-
-#define WITH_CORE
-#define WITH_WATCHPOINTS 1
-#define SIM_HANDLES_LMA 1
-
-#define SIM_ENGINE_HALT_HOOK(SD,LAST_CPU,CIA) 0 /* disable this hook */
-
-#include "sim-basics.h"
-#include "sim-signal.h"
-
-#include <signal.h> /* For kill() in insns:do_trap */
-
-#include <errno.h>
-#ifdef HAVE_UNISTD_H
-#include <unistd.h>
-#endif
-
-/* These are generated files. */
-#include "itable.h"
-#include "idecode.h"
-#include "idecode.h"
-
-typedef instruction_address sim_cia;
-static const sim_cia null_cia = {0}; /* Dummy */
-#define NULL_CIA null_cia
-/* FIXME: Perhaps igen should generate access macros for
- `instruction_address' that we could use. */
-/*#define CIA_ADDR(cia) ((cia).ip) doesn't work for mn10300*/
-
-#define WITH_WATCHPOINTS 1
-
-#define SIM_CORE_SIGNAL(SD,CPU,CIA,MAP,NR_BYTES,ADDR,TRANSFER,ERROR) \
-mn10300_core_signal ((SD), (CPU), (CIA), (MAP), (NR_BYTES), (ADDR), (TRANSFER), (ERROR))
-
-
-#include "sim-base.h"
-
-#include "mn10300_sim.h"
-
-/* Bring data in from the cold */
-
-#define IMEM8(EA) \
-(sim_core_read_aligned_1(STATE_CPU(sd, 0), EA, exec_map, (EA)))
-
-#define IMEM8_IMMED(EA, N) \
-(sim_core_read_aligned_1(STATE_CPU(sd, 0), EA, exec_map, (EA) + (N)))
-
-
-/* FIXME: For moment, save/restore PC value found in struct State.
- Struct State will one day go away, being placed in the sim_cpu
- state. */
-#define CIA_GET(CPU) ((PC) + 0)
-#define CIA_SET(CPU,VAL) ((CPU)->cia = (VAL), PC = (VAL))
-
-
-struct _sim_cpu {
- sim_event *pending_nmi;
- sim_cia cia;
- sim_cpu_base base;
-};
-
-
-struct sim_state {
-
- /* the processors proper */
- sim_cpu cpu;
-#define STATE_CPU(sd, n) (&(sd)->cpu)
-
- /* The base class. */
- sim_state_base base;
-
-};
-
-/* For compatibility, until all functions converted to passing
- SIM_DESC as an argument */
-extern SIM_DESC simulator;
-
-/* (re) initialize the simulator */
-
-extern void engine_init(SIM_DESC sd);
-extern SIM_CORE_SIGNAL_FN mn10300_core_signal;
-
-#endif
diff --git a/sim/mn10300/simops.c b/sim/mn10300/simops.c
deleted file mode 100644
index 7a190566bcb..00000000000
--- a/sim/mn10300/simops.c
+++ /dev/null
@@ -1,3239 +0,0 @@
-#include "config.h"
-
-#include <signal.h>
-#ifdef HAVE_UNISTD_H
-#include <unistd.h>
-#endif
-#include "mn10300_sim.h"
-#include "simops.h"
-#include "sim-types.h"
-#include "targ-vals.h"
-#include "bfd.h"
-#include <errno.h>
-#include <sys/stat.h>
-#include <sys/times.h>
-#include <sys/time.h>
-
-#define REG0(X) ((X) & 0x3)
-#define REG1(X) (((X) & 0xc) >> 2)
-#define REG0_4(X) (((X) & 0x30) >> 4)
-#define REG0_8(X) (((X) & 0x300) >> 8)
-#define REG1_8(X) (((X) & 0xc00) >> 10)
-#define REG0_16(X) (((X) & 0x30000) >> 16)
-#define REG1_16(X) (((X) & 0xc0000) >> 18)
-
-/* mov imm8, dn */
-void OP_8000 (insn, extension)
- unsigned long insn, extension;
-{
- State.regs[REG_D0 + REG0_8 (insn)] = SEXT8 (insn & 0xff);
-}
-
-/* mov dm, dn */
-void OP_80 (insn, extension)
- unsigned long insn, extension;
-{
- State.regs[REG_D0 + REG0 (insn)] = State.regs[REG_D0 + REG1 (insn)];
-}
-
-/* mov dm, an */
-void OP_F1E0 (insn, extension)
- unsigned long insn, extension;
-{
- State.regs[REG_A0 + REG0 (insn)] = State.regs[REG_D0 + REG1 (insn)];
-}
-
-/* mov am, dn */
-void OP_F1D0 (insn, extension)
- unsigned long insn, extension;
-{
- State.regs[REG_D0 + REG0 (insn)] = State.regs[REG_A0 + REG1 (insn)];
-}
-
-/* mov imm8, an */
-void OP_9000 (insn, extension)
- unsigned long insn, extension;
-{
- State.regs[REG_A0 + REG0_8 (insn)] = insn & 0xff;
-}
-
-/* mov am, an */
-void OP_90 (insn, extension)
- unsigned long insn, extension;
-{
- State.regs[REG_A0 + REG0 (insn)] = State.regs[REG_A0 + REG1 (insn)];
-}
-
-/* mov sp, an */
-void OP_3C (insn, extension)
- unsigned long insn, extension;
-{
- State.regs[REG_A0 + REG0 (insn)] = State.regs[REG_SP];
-}
-
-/* mov am, sp */
-void OP_F2F0 (insn, extension)
- unsigned long insn, extension;
-{
- State.regs[REG_SP] = State.regs[REG_A0 + REG1 (insn)];
-}
-
-/* mov psw, dn */
-void OP_F2E4 (insn, extension)
- unsigned long insn, extension;
-{
- State.regs[REG_D0 + REG0 (insn)] = PSW;
-}
-
-/* mov dm, psw */
-void OP_F2F3 (insn, extension)
- unsigned long insn, extension;
-{
- PSW = State.regs[REG_D0 + REG1 (insn)];
-}
-
-/* mov mdr, dn */
-void OP_F2E0 (insn, extension)
- unsigned long insn, extension;
-{
- State.regs[REG_D0 + REG0 (insn)] = State.regs[REG_MDR];
-}
-
-/* mov dm, mdr */
-void OP_F2F2 (insn, extension)
- unsigned long insn, extension;
-{
- State.regs[REG_MDR] = State.regs[REG_D0 + REG1 (insn)];
-}
-
-/* mov (am), dn */
-void OP_70 (insn, extension)
- unsigned long insn, extension;
-{
- State.regs[REG_D0 + REG1 (insn)]
- = load_word (State.regs[REG_A0 + REG0 (insn)]);
-}
-
-/* mov (d8,am), dn */
-void OP_F80000 (insn, extension)
- unsigned long insn, extension;
-{
- State.regs[REG_D0 + REG1_8 (insn)]
- = load_word ((State.regs[REG_A0 + REG0_8 (insn)] + SEXT8 (insn & 0xff)));
-}
-
-/* mov (d16,am), dn */
-void OP_FA000000 (insn, extension)
- unsigned long insn, extension;
-{
- State.regs[REG_D0 + REG1_16 (insn)]
- = load_word ((State.regs[REG_A0 + REG0_16 (insn)]
- + SEXT16 (insn & 0xffff)));
-}
-
-/* mov (d32,am), dn */
-void OP_FC000000 (insn, extension)
- unsigned long insn, extension;
-{
- State.regs[REG_D0 + REG1_16 (insn)]
- = load_word ((State.regs[REG_A0 + REG0_16 (insn)]
- + ((insn & 0xffff) << 16) + extension));
-}
-
-/* mov (d8,sp), dn */
-void OP_5800 (insn, extension)
- unsigned long insn, extension;
-{
- State.regs[REG_D0 + REG0_8 (insn)]
- = load_word (State.regs[REG_SP] + (insn & 0xff));
-}
-
-/* mov (d16,sp), dn */
-void OP_FAB40000 (insn, extension)
- unsigned long insn, extension;
-{
- State.regs[REG_D0 + REG0_16 (insn)]
- = load_word (State.regs[REG_SP] + (insn & 0xffff));
-}
-
-/* mov (d32,sp), dn */
-void OP_FCB40000 (insn, extension)
- unsigned long insn, extension;
-{
- State.regs[REG_D0 + REG0_16 (insn)]
- = load_word (State.regs[REG_SP] + (((insn & 0xffff) << 16) + extension));
-}
-
-/* mov (di,am), dn */
-void OP_F300 (insn, extension)
- unsigned long insn, extension;
-{
- State.regs[REG_D0 + REG0_4 (insn)]
- = load_word ((State.regs[REG_A0 + REG0 (insn)]
- + State.regs[REG_D0 + REG1 (insn)]));
-}
-
-/* mov (abs16), dn */
-void OP_300000 (insn, extension)
- unsigned long insn, extension;
-{
- State.regs[REG_D0 + REG0_16 (insn)] = load_word ((insn & 0xffff));
-}
-
-/* mov (abs32), dn */
-void OP_FCA40000 (insn, extension)
- unsigned long insn, extension;
-{
- State.regs[REG_D0 + REG0_16 (insn)]
- = load_word ((((insn & 0xffff) << 16) + extension));
-}
-
-/* mov (am), an */
-void OP_F000 (insn, extension)
- unsigned long insn, extension;
-{
- State.regs[REG_A0 + REG1 (insn)]
- = load_word (State.regs[REG_A0 + REG0 (insn)]);
-}
-
-/* mov (d8,am), an */
-void OP_F82000 (insn, extension)
- unsigned long insn, extension;
-{
- State.regs[REG_A0 + REG1_8 (insn)]
- = load_word ((State.regs[REG_A0 + REG0_8 (insn)]
- + SEXT8 (insn & 0xff)));
-}
-
-/* mov (d16,am), an */
-void OP_FA200000 (insn, extension)
- unsigned long insn, extension;
-{
- State.regs[REG_A0 + REG1_16 (insn)]
- = load_word ((State.regs[REG_A0 + REG0_16 (insn)]
- + SEXT16 (insn & 0xffff)));
-}
-
-/* mov (d32,am), an */
-void OP_FC200000 (insn, extension)
- unsigned long insn, extension;
-{
- State.regs[REG_A0 + REG1_16 (insn)]
- = load_word ((State.regs[REG_A0 + REG0_16 (insn)]
- + ((insn & 0xffff) << 16) + extension));
-}
-
-/* mov (d8,sp), an */
-void OP_5C00 (insn, extension)
- unsigned long insn, extension;
-{
- State.regs[REG_A0 + REG0_8 (insn)]
- = load_word (State.regs[REG_SP] + (insn & 0xff));
-}
-
-/* mov (d16,sp), an */
-void OP_FAB00000 (insn, extension)
- unsigned long insn, extension;
-{
- State.regs[REG_A0 + REG0_16 (insn)]
- = load_word (State.regs[REG_SP] + (insn & 0xffff));
-}
-
-/* mov (d32,sp), an */
-void OP_FCB00000 (insn, extension)
- unsigned long insn, extension;
-{
- State.regs[REG_A0 + REG0_16 (insn)]
- = load_word (State.regs[REG_SP] + (((insn & 0xffff) << 16) + extension));
-}
-
-/* mov (di,am), an */
-void OP_F380 (insn, extension)
- unsigned long insn, extension;
-{
- State.regs[REG_A0 + REG0_4 (insn)]
- = load_word ((State.regs[REG_A0 + REG0 (insn)]
- + State.regs[REG_D0 + REG1 (insn)]));
-}
-
-/* mov (abs16), an */
-void OP_FAA00000 (insn, extension)
- unsigned long insn, extension;
-{
- State.regs[REG_A0 + REG0_16 (insn)] = load_word ((insn & 0xffff));
-}
-
-/* mov (abs32), an */
-void OP_FCA00000 (insn, extension)
- unsigned long insn, extension;
-{
- State.regs[REG_A0 + REG0_16 (insn)]
- = load_word ((((insn & 0xffff) << 16) + extension));
-}
-
-/* mov (d8,am), sp */
-void OP_F8F000 (insn, extension)
- unsigned long insn, extension;
-{
- State.regs[REG_SP]
- = load_word ((State.regs[REG_A0 + REG0_8 (insn)]
- + SEXT8 (insn & 0xff)));
-}
-
-/* mov dm, (an) */
-void OP_60 (insn, extension)
- unsigned long insn, extension;
-{
- store_word (State.regs[REG_A0 + REG0 (insn)],
- State.regs[REG_D0 + REG1 (insn)]);
-}
-
-/* mov dm, (d8,an) */
-void OP_F81000 (insn, extension)
- unsigned long insn, extension;
-{
- store_word ((State.regs[REG_A0 + REG0_8 (insn)] + SEXT8 (insn & 0xff)),
- State.regs[REG_D0 + REG1_8 (insn)]);
-}
-
-/* mov dm (d16,an) */
-void OP_FA100000 (insn, extension)
- unsigned long insn, extension;
-{
- store_word ((State.regs[REG_A0 + REG0_16 (insn)] + SEXT16 (insn & 0xffff)),
- State.regs[REG_D0 + REG1_16 (insn)]);
-}
-
-/* mov dm (d32,an) */
-void OP_FC100000 (insn, extension)
- unsigned long insn, extension;
-{
- store_word ((State.regs[REG_A0 + REG0_16 (insn)]
- + ((insn & 0xffff) << 16) + extension),
- State.regs[REG_D0 + REG1_16 (insn)]);
-}
-
-/* mov dm, (d8,sp) */
-void OP_4200 (insn, extension)
- unsigned long insn, extension;
-{
- store_word (State.regs[REG_SP] + (insn & 0xff),
- State.regs[REG_D0 + REG1_8 (insn)]);
-}
-
-/* mov dm, (d16,sp) */
-void OP_FA910000 (insn, extension)
- unsigned long insn, extension;
-{
- store_word (State.regs[REG_SP] + (insn & 0xffff),
- State.regs[REG_D0 + REG1_16 (insn)]);
-}
-
-/* mov dm, (d32,sp) */
-void OP_FC910000 (insn, extension)
- unsigned long insn, extension;
-{
- store_word (State.regs[REG_SP] + (((insn & 0xffff) << 16) + extension),
- State.regs[REG_D0 + REG1_16 (insn)]);
-}
-
-/* mov dm, (di,an) */
-void OP_F340 (insn, extension)
- unsigned long insn, extension;
-{
- store_word ((State.regs[REG_A0 + REG0 (insn)]
- + State.regs[REG_D0 + REG1 (insn)]),
- State.regs[REG_D0 + REG0_4 (insn)]);
-}
-
-/* mov dm, (abs16) */
-void OP_10000 (insn, extension)
- unsigned long insn, extension;
-{
- store_word ((insn & 0xffff), State.regs[REG_D0 + REG1_16 (insn)]);
-}
-
-/* mov dm, (abs32) */
-void OP_FC810000 (insn, extension)
- unsigned long insn, extension;
-{
- store_word ((((insn & 0xffff) << 16) + extension),
- State.regs[REG_D0 + REG1_16 (insn)]);
-}
-
-/* mov am, (an) */
-void OP_F010 (insn, extension)
- unsigned long insn, extension;
-{
- store_word (State.regs[REG_A0 + REG0 (insn)],
- State.regs[REG_A0 + REG1 (insn)]);
-}
-
-/* mov am, (d8,an) */
-void OP_F83000 (insn, extension)
- unsigned long insn, extension;
-{
- store_word ((State.regs[REG_A0 + REG0_8 (insn)] + SEXT8 (insn & 0xff)),
- State.regs[REG_A0 + REG1_8 (insn)]);
-}
-
-/* mov am, (d16,an) */
-void OP_FA300000 (insn, extension)
- unsigned long insn, extension;
-{
- store_word ((State.regs[REG_A0 + REG0_16 (insn)] + SEXT16 (insn & 0xffff)),
- State.regs[REG_A0 + REG1_16 (insn)]);
-}
-
-/* mov am, (d32,an) */
-void OP_FC300000 (insn, extension)
- unsigned long insn, extension;
-{
- store_word ((State.regs[REG_A0 + REG0_16 (insn)]
- + ((insn & 0xffff) << 16) + extension),
- State.regs[REG_A0 + REG1_16 (insn)]);
-}
-
-/* mov am, (d8,sp) */
-void OP_4300 (insn, extension)
- unsigned long insn, extension;
-{
- store_word (State.regs[REG_SP] + (insn & 0xff),
- State.regs[REG_A0 + REG1_8 (insn)]);
-}
-
-/* mov am, (d16,sp) */
-void OP_FA900000 (insn, extension)
- unsigned long insn, extension;
-{
- store_word (State.regs[REG_SP] + (insn & 0xffff),
- State.regs[REG_A0 + REG1_16 (insn)]);
-}
-
-/* mov am, (d32,sp) */
-void OP_FC900000 (insn, extension)
- unsigned long insn, extension;
-{
- store_word (State.regs[REG_SP] + (((insn & 0xffff) << 16) + extension),
- State.regs[REG_A0 + REG1_16 (insn)]);
-}
-
-/* mov am, (di,an) */
-void OP_F3C0 (insn, extension)
- unsigned long insn, extension;
-{
- store_word ((State.regs[REG_A0 + REG0 (insn)]
- + State.regs[REG_D0 + REG1 (insn)]),
- State.regs[REG_A0 + REG0_4 (insn)]);
-}
-
-/* mov am, (abs16) */
-void OP_FA800000 (insn, extension)
- unsigned long insn, extension;
-{
- store_word ((insn & 0xffff), State.regs[REG_A0 + REG1_16 (insn)]);
-}
-
-/* mov am, (abs32) */
-void OP_FC800000 (insn, extension)
- unsigned long insn, extension;
-{
- store_word ((((insn & 0xffff) << 16) + extension), State.regs[REG_A0 + REG1_16 (insn)]);
-}
-
-/* mov sp, (d8,an) */
-void OP_F8F400 (insn, extension)
- unsigned long insn, extension;
-{
- store_word (State.regs[REG_A0 + REG0_8 (insn)] + SEXT8 (insn & 0xff),
- State.regs[REG_SP]);
-}
-
-/* mov imm16, dn */
-void OP_2C0000 (insn, extension)
- unsigned long insn, extension;
-{
- unsigned long value;
-
- value = SEXT16 (insn & 0xffff);
- State.regs[REG_D0 + REG0_16 (insn)] = value;
-}
-
-/* mov imm32,dn */
-void OP_FCCC0000 (insn, extension)
- unsigned long insn, extension;
-{
- unsigned long value;
-
- value = ((insn & 0xffff) << 16) + extension;
- State.regs[REG_D0 + REG0_16 (insn)] = value;
-}
-
-/* mov imm16, an */
-void OP_240000 (insn, extension)
- unsigned long insn, extension;
-{
- unsigned long value;
-
- value = insn & 0xffff;
- State.regs[REG_A0 + REG0_16 (insn)] = value;
-}
-
-/* mov imm32, an */
-void OP_FCDC0000 (insn, extension)
- unsigned long insn, extension;
-{
- unsigned long value;
-
- value = ((insn & 0xffff) << 16) + extension;
- State.regs[REG_A0 + REG0_16 (insn)] = value;
-}
-
-/* movbu (am), dn */
-void OP_F040 (insn, extension)
- unsigned long insn, extension;
-{
- State.regs[REG_D0 + REG1 (insn)]
- = load_byte (State.regs[REG_A0 + REG0 (insn)]);
-}
-
-/* movbu (d8,am), dn */
-void OP_F84000 (insn, extension)
- unsigned long insn, extension;
-{
- State.regs[REG_D0 + REG1_8 (insn)]
- = load_byte ((State.regs[REG_A0 + REG0_8 (insn)]
- + SEXT8 (insn & 0xff)));
-}
-
-/* movbu (d16,am), dn */
-void OP_FA400000 (insn, extension)
- unsigned long insn, extension;
-{
- State.regs[REG_D0 + REG1_16 (insn)]
- = load_byte ((State.regs[REG_A0 + REG0_16 (insn)]
- + SEXT16 (insn & 0xffff)));
-}
-
-/* movbu (d32,am), dn */
-void OP_FC400000 (insn, extension)
- unsigned long insn, extension;
-{
- State.regs[REG_D0 + REG1_16 (insn)]
- = load_byte ((State.regs[REG_A0 + REG0_16 (insn)]
- + ((insn & 0xffff) << 16) + extension));
-}
-
-/* movbu (d8,sp), dn */
-void OP_F8B800 (insn, extension)
- unsigned long insn, extension;
-{
- State.regs[REG_D0 + REG0_8 (insn)]
- = load_byte ((State.regs[REG_SP] + (insn & 0xff)));
-}
-
-/* movbu (d16,sp), dn */
-void OP_FAB80000 (insn, extension)
- unsigned long insn, extension;
-{
- State.regs[REG_D0 + REG0_16 (insn)]
- = load_byte ((State.regs[REG_SP] + (insn & 0xffff)));
-}
-
-/* movbu (d32,sp), dn */
-void OP_FCB80000 (insn, extension)
- unsigned long insn, extension;
-{
- State.regs[REG_D0 + REG0_16 (insn)]
- = load_byte (State.regs[REG_SP] + (((insn & 0xffff) << 16) + extension));
-}
-
-/* movbu (di,am), dn */
-void OP_F400 (insn, extension)
- unsigned long insn, extension;
-{
- State.regs[REG_D0 + REG0_4 (insn)]
- = load_byte ((State.regs[REG_A0 + REG0 (insn)]
- + State.regs[REG_D0 + REG1 (insn)]));
-}
-
-/* movbu (abs16), dn */
-void OP_340000 (insn, extension)
- unsigned long insn, extension;
-{
- State.regs[REG_D0 + REG0_16 (insn)] = load_byte ((insn & 0xffff));
-}
-
-/* movbu (abs32), dn */
-void OP_FCA80000 (insn, extension)
- unsigned long insn, extension;
-{
- State.regs[REG_D0 + REG0_16 (insn)]
- = load_byte ((((insn & 0xffff) << 16) + extension));
-}
-
-/* movbu dm, (an) */
-void OP_F050 (insn, extension)
- unsigned long insn, extension;
-{
- store_byte (State.regs[REG_A0 + REG0 (insn)],
- State.regs[REG_D0 + REG1 (insn)]);
-}
-
-/* movbu dm, (d8,an) */
-void OP_F85000 (insn, extension)
- unsigned long insn, extension;
-{
- store_byte ((State.regs[REG_A0 + REG0_8 (insn)] + SEXT8 (insn & 0xff)),
- State.regs[REG_D0 + REG1_8 (insn)]);
-}
-
-/* movbu dm, (d16,an) */
-void OP_FA500000 (insn, extension)
- unsigned long insn, extension;
-{
- store_byte ((State.regs[REG_A0 + REG0_16 (insn)] + SEXT16 (insn & 0xffff)),
- State.regs[REG_D0 + REG1_16 (insn)]);
-}
-
-/* movbu dm, (d32,an) */
-void OP_FC500000 (insn, extension)
- unsigned long insn, extension;
-{
- store_byte ((State.regs[REG_A0 + REG0_16 (insn)]
- + ((insn & 0xffff) << 16) + extension),
- State.regs[REG_D0 + REG1_16 (insn)]);
-}
-
-/* movbu dm, (d8,sp) */
-void OP_F89200 (insn, extension)
- unsigned long insn, extension;
-{
- store_byte (State.regs[REG_SP] + (insn & 0xff),
- State.regs[REG_D0 + REG1_8 (insn)]);
-}
-
-/* movbu dm, (d16,sp) */
-void OP_FA920000 (insn, extension)
- unsigned long insn, extension;
-{
- store_byte (State.regs[REG_SP] + (insn & 0xffff),
- State.regs[REG_D0 + REG1_16 (insn)]);
-}
-
-/* movbu dm (d32,sp) */
-void OP_FC920000 (insn, extension)
- unsigned long insn, extension;
-{
- store_byte (State.regs[REG_SP] + (((insn & 0xffff) << 16) + extension),
- State.regs[REG_D0 + REG1_16 (insn)]);
-}
-
-/* movbu dm, (di,an) */
-void OP_F440 (insn, extension)
- unsigned long insn, extension;
-{
- store_byte ((State.regs[REG_A0 + REG0 (insn)]
- + State.regs[REG_D0 + REG1 (insn)]),
- State.regs[REG_D0 + REG0_4 (insn)]);
-}
-
-/* movbu dm, (abs16) */
-void OP_20000 (insn, extension)
- unsigned long insn, extension;
-{
- store_byte ((insn & 0xffff), State.regs[REG_D0 + REG1_16 (insn)]);
-}
-
-/* movbu dm, (abs32) */
-void OP_FC820000 (insn, extension)
- unsigned long insn, extension;
-{
- store_byte ((((insn & 0xffff) << 16) + extension), State.regs[REG_D0 + REG1_16 (insn)]);
-}
-
-/* movhu (am), dn */
-void OP_F060 (insn, extension)
- unsigned long insn, extension;
-{
- State.regs[REG_D0 + REG1 (insn)]
- = load_half (State.regs[REG_A0 + REG0 (insn)]);
-}
-
-/* movhu (d8,am), dn */
-void OP_F86000 (insn, extension)
- unsigned long insn, extension;
-{
- State.regs[REG_D0 + REG1_8 (insn)]
- = load_half ((State.regs[REG_A0 + REG0_8 (insn)]
- + SEXT8 (insn & 0xff)));
-}
-
-/* movhu (d16,am), dn */
-void OP_FA600000 (insn, extension)
- unsigned long insn, extension;
-{
- State.regs[REG_D0 + REG1_16 (insn)]
- = load_half ((State.regs[REG_A0 + REG0_16 (insn)]
- + SEXT16 (insn & 0xffff)));
-}
-
-/* movhu (d32,am), dn */
-void OP_FC600000 (insn, extension)
- unsigned long insn, extension;
-{
- State.regs[REG_D0 + REG1_16 (insn)]
- = load_half ((State.regs[REG_A0 + REG0_16 (insn)]
- + ((insn & 0xffff) << 16) + extension));
-}
-
-/* movhu (d8,sp) dn */
-void OP_F8BC00 (insn, extension)
- unsigned long insn, extension;
-{
- State.regs[REG_D0 + REG0_8 (insn)]
- = load_half ((State.regs[REG_SP] + (insn & 0xff)));
-}
-
-/* movhu (d16,sp), dn */
-void OP_FABC0000 (insn, extension)
- unsigned long insn, extension;
-{
- State.regs[REG_D0 + REG0_16 (insn)]
- = load_half ((State.regs[REG_SP] + (insn & 0xffff)));
-}
-
-/* movhu (d32,sp), dn */
-void OP_FCBC0000 (insn, extension)
- unsigned long insn, extension;
-{
- State.regs[REG_D0 + REG0_16 (insn)]
- = load_half (State.regs[REG_SP] + (((insn & 0xffff) << 16) + extension));
-}
-
-/* movhu (di,am), dn */
-void OP_F480 (insn, extension)
- unsigned long insn, extension;
-{
- State.regs[REG_D0 + REG0_4 (insn)]
- = load_half ((State.regs[REG_A0 + REG0 (insn)]
- + State.regs[REG_D0 + REG1 (insn)]));
-}
-
-/* movhu (abs16), dn */
-void OP_380000 (insn, extension)
- unsigned long insn, extension;
-{
- State.regs[REG_D0 + REG0_16 (insn)] = load_half ((insn & 0xffff));
-}
-
-/* movhu (abs32), dn */
-void OP_FCAC0000 (insn, extension)
- unsigned long insn, extension;
-{
- State.regs[REG_D0 + REG0_16 (insn)]
- = load_half ((((insn & 0xffff) << 16) + extension));
-}
-
-/* movhu dm, (an) */
-void OP_F070 (insn, extension)
- unsigned long insn, extension;
-{
- store_half (State.regs[REG_A0 + REG0 (insn)],
- State.regs[REG_D0 + REG1 (insn)]);
-}
-
-/* movhu dm, (d8,an) */
-void OP_F87000 (insn, extension)
- unsigned long insn, extension;
-{
- store_half ((State.regs[REG_A0 + REG0_8 (insn)] + SEXT8 (insn & 0xff)),
- State.regs[REG_D0 + REG1_8 (insn)]);
-}
-
-/* movhu dm, (d16,an) */
-void OP_FA700000 (insn, extension)
- unsigned long insn, extension;
-{
- store_half ((State.regs[REG_A0 + REG0_16 (insn)] + SEXT16 (insn & 0xffff)),
- State.regs[REG_D0 + REG1_16 (insn)]);
-}
-
-/* movhu dm, (d32,an) */
-void OP_FC700000 (insn, extension)
- unsigned long insn, extension;
-{
- store_half ((State.regs[REG_A0 + REG0_16 (insn)]
- + ((insn & 0xffff) << 16) + extension),
- State.regs[REG_D0 + REG1_16 (insn)]);
-}
-
-/* movhu dm,(d8,sp) */
-void OP_F89300 (insn, extension)
- unsigned long insn, extension;
-{
- store_half (State.regs[REG_SP] + (insn & 0xff),
- State.regs[REG_D0 + REG1_8 (insn)]);
-}
-
-/* movhu dm,(d16,sp) */
-void OP_FA930000 (insn, extension)
- unsigned long insn, extension;
-{
- store_half (State.regs[REG_SP] + (insn & 0xffff),
- State.regs[REG_D0 + REG1_16 (insn)]);
-}
-
-/* movhu dm,(d32,sp) */
-void OP_FC930000 (insn, extension)
- unsigned long insn, extension;
-{
- store_half (State.regs[REG_SP] + (((insn & 0xffff) << 16) + extension),
- State.regs[REG_D0 + REG1_16 (insn)]);
-}
-
-/* movhu dm, (di,an) */
-void OP_F4C0 (insn, extension)
- unsigned long insn, extension;
-{
- store_half ((State.regs[REG_A0 + REG0 (insn)]
- + State.regs[REG_D0 + REG1 (insn)]),
- State.regs[REG_D0 + REG0_4 (insn)]);
-}
-
-/* movhu dm, (abs16) */
-void OP_30000 (insn, extension)
- unsigned long insn, extension;
-{
- store_half ((insn & 0xffff), State.regs[REG_D0 + REG1_16 (insn)]);
-}
-
-/* movhu dm, (abs32) */
-void OP_FC830000 (insn, extension)
- unsigned long insn, extension;
-{
- store_half ((((insn & 0xffff) << 16) + extension), State.regs[REG_D0 + REG1_16 (insn)]);
-}
-
-/* ext dn */
-void OP_F2D0 (insn, extension)
- unsigned long insn, extension;
-{
- if (State.regs[REG_D0 + REG0 (insn)] & 0x80000000)
- State.regs[REG_MDR] = -1;
- else
- State.regs[REG_MDR] = 0;
-}
-
-/* extb dn */
-void OP_10 (insn, extension)
- unsigned long insn, extension;
-{
- State.regs[REG_D0 + REG0 (insn)] = SEXT8 (State.regs[REG_D0 + REG0 (insn)]);
-}
-
-/* extbu dn */
-void OP_14 (insn, extension)
- unsigned long insn, extension;
-{
- State.regs[REG_D0 + REG0 (insn)] &= 0xff;
-}
-
-/* exth dn */
-void OP_18 (insn, extension)
- unsigned long insn, extension;
-{
- State.regs[REG_D0 + REG0 (insn)]
- = SEXT16 (State.regs[REG_D0 + REG0 (insn)]);
-}
-
-/* exthu dn */
-void OP_1C (insn, extension)
- unsigned long insn, extension;
-{
- State.regs[REG_D0 + REG0 (insn)] &= 0xffff;
-}
-
-/* movm (sp), reg_list */
-void OP_CE00 (insn, extension)
- unsigned long insn, extension;
-{
- unsigned long sp = State.regs[REG_SP];
- unsigned long mask;
-
- mask = insn & 0xff;
-
- if (mask & 0x8)
- {
- sp += 4;
- State.regs[REG_LAR] = load_word (sp);
- sp += 4;
- State.regs[REG_LIR] = load_word (sp);
- sp += 4;
- State.regs[REG_MDR] = load_word (sp);
- sp += 4;
- State.regs[REG_A0 + 1] = load_word (sp);
- sp += 4;
- State.regs[REG_A0] = load_word (sp);
- sp += 4;
- State.regs[REG_D0 + 1] = load_word (sp);
- sp += 4;
- State.regs[REG_D0] = load_word (sp);
- sp += 4;
- }
-
- if (mask & 0x10)
- {
- State.regs[REG_A0 + 3] = load_word (sp);
- sp += 4;
- }
-
- if (mask & 0x20)
- {
- State.regs[REG_A0 + 2] = load_word (sp);
- sp += 4;
- }
-
- if (mask & 0x40)
- {
- State.regs[REG_D0 + 3] = load_word (sp);
- sp += 4;
- }
-
- if (mask & 0x80)
- {
- State.regs[REG_D0 + 2] = load_word (sp);
- sp += 4;
- }
-
- /* And make sure to update the stack pointer. */
- State.regs[REG_SP] = sp;
-}
-
-/* movm reg_list, (sp) */
-void OP_CF00 (insn, extension)
- unsigned long insn, extension;
-{
- unsigned long sp = State.regs[REG_SP];
- unsigned long mask;
-
- mask = insn & 0xff;
-
- if (mask & 0x80)
- {
- sp -= 4;
- store_word (sp, State.regs[REG_D0 + 2]);
- }
-
- if (mask & 0x40)
- {
- sp -= 4;
- store_word (sp, State.regs[REG_D0 + 3]);
- }
-
- if (mask & 0x20)
- {
- sp -= 4;
- store_word (sp, State.regs[REG_A0 + 2]);
- }
-
- if (mask & 0x10)
- {
- sp -= 4;
- store_word (sp, State.regs[REG_A0 + 3]);
- }
-
- if (mask & 0x8)
- {
- sp -= 4;
- store_word (sp, State.regs[REG_D0]);
- sp -= 4;
- store_word (sp, State.regs[REG_D0 + 1]);
- sp -= 4;
- store_word (sp, State.regs[REG_A0]);
- sp -= 4;
- store_word (sp, State.regs[REG_A0 + 1]);
- sp -= 4;
- store_word (sp, State.regs[REG_MDR]);
- sp -= 4;
- store_word (sp, State.regs[REG_LIR]);
- sp -= 4;
- store_word (sp, State.regs[REG_LAR]);
- sp -= 4;
- }
-
- /* And make sure to update the stack pointer. */
- State.regs[REG_SP] = sp;
-}
-
-/* clr dn */
-void OP_0 (insn, extension)
- unsigned long insn, extension;
-{
- State.regs[REG_D0 + REG1 (insn)] = 0;
-
- PSW |= PSW_Z;
- PSW &= ~(PSW_V | PSW_C | PSW_N);
-}
-
-/* add dm,dn */
-void OP_E0 (insn, extension)
- unsigned long insn, extension;
-{
- int z, c, n, v;
- unsigned long reg1, reg2, value;
-
- reg1 = State.regs[REG_D0 + REG1 (insn)];
- reg2 = State.regs[REG_D0 + REG0 (insn)];
- value = reg1 + reg2;
- State.regs[REG_D0 + REG0 (insn)] = value;
-
- z = (value == 0);
- n = (value & 0x80000000);
- c = (value < reg1) || (value < reg2);
- v = ((reg2 & 0x80000000) == (reg1 & 0x80000000)
- && (reg2 & 0x80000000) != (value & 0x80000000));
-
- PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
- PSW |= ((z ? PSW_Z : 0) | ( n ? PSW_N : 0)
- | (c ? PSW_C : 0) | (v ? PSW_V : 0));
-}
-
-/* add dm, an */
-void OP_F160 (insn, extension)
- unsigned long insn, extension;
-{
- int z, c, n, v;
- unsigned long reg1, reg2, value;
-
- reg1 = State.regs[REG_D0 + REG1 (insn)];
- reg2 = State.regs[REG_A0 + REG0 (insn)];
- value = reg1 + reg2;
- State.regs[REG_A0 + REG0 (insn)] = value;
-
- z = (value == 0);
- n = (value & 0x80000000);
- c = (value < reg1) || (value < reg2);
- v = ((reg2 & 0x80000000) == (reg1 & 0x80000000)
- && (reg2 & 0x80000000) != (value & 0x80000000));
-
- PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
- PSW |= ((z ? PSW_Z : 0) | ( n ? PSW_N : 0)
- | (c ? PSW_C : 0) | (v ? PSW_V : 0));
-}
-
-/* add am, dn */
-void OP_F150 (insn, extension)
- unsigned long insn, extension;
-{
- int z, c, n, v;
- unsigned long reg1, reg2, value;
-
- reg1 = State.regs[REG_A0 + REG1 (insn)];
- reg2 = State.regs[REG_D0 + REG0 (insn)];
- value = reg1 + reg2;
- State.regs[REG_D0 + REG0 (insn)] = value;
-
- z = (value == 0);
- n = (value & 0x80000000);
- c = (value < reg1) || (value < reg2);
- v = ((reg2 & 0x80000000) == (reg1 & 0x80000000)
- && (reg2 & 0x80000000) != (value & 0x80000000));
-
- PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
- PSW |= ((z ? PSW_Z : 0) | ( n ? PSW_N : 0)
- | (c ? PSW_C : 0) | (v ? PSW_V : 0));
-}
-
-/* add am,an */
-void OP_F170 (insn, extension)
- unsigned long insn, extension;
-{
- int z, c, n, v;
- unsigned long reg1, reg2, value;
-
- reg1 = State.regs[REG_A0 + REG1 (insn)];
- reg2 = State.regs[REG_A0 + REG0 (insn)];
- value = reg1 + reg2;
- State.regs[REG_A0 + REG0 (insn)] = value;
-
- z = (value == 0);
- n = (value & 0x80000000);
- c = (value < reg1) || (value < reg2);
- v = ((reg2 & 0x80000000) == (reg1 & 0x80000000)
- && (reg2 & 0x80000000) != (value & 0x80000000));
-
- PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
- PSW |= ((z ? PSW_Z : 0) | ( n ? PSW_N : 0)
- | (c ? PSW_C : 0) | (v ? PSW_V : 0));
-}
-
-/* add imm8, dn */
-void OP_2800 (insn, extension)
- unsigned long insn, extension;
-{
- int z, c, n, v;
- unsigned long reg1, imm, value;
-
- reg1 = State.regs[REG_D0 + REG0_8 (insn)];
- imm = SEXT8 (insn & 0xff);
- value = reg1 + imm;
- State.regs[REG_D0 + REG0_8 (insn)] = value;
-
- z = (value == 0);
- n = (value & 0x80000000);
- c = (value < reg1) || (value < imm);
- v = ((reg1 & 0x80000000) == (imm & 0x80000000)
- && (reg1 & 0x80000000) != (value & 0x80000000));
-
- PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
- PSW |= ((z ? PSW_Z : 0) | ( n ? PSW_N : 0)
- | (c ? PSW_C : 0) | (v ? PSW_V : 0));
-}
-
-/* add imm16, dn */
-void OP_FAC00000 (insn, extension)
- unsigned long insn, extension;
-{
- int z, c, n, v;
- unsigned long reg1, imm, value;
-
- reg1 = State.regs[REG_D0 + REG0_16 (insn)];
- imm = SEXT16 (insn & 0xffff);
- value = reg1 + imm;
- State.regs[REG_D0 + REG0_16 (insn)] = value;
-
- z = (value == 0);
- n = (value & 0x80000000);
- c = (value < reg1) || (value < imm);
- v = ((reg1 & 0x80000000) == (imm & 0x80000000)
- && (reg1 & 0x80000000) != (value & 0x80000000));
-
- PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
- PSW |= ((z ? PSW_Z : 0) | ( n ? PSW_N : 0)
- | (c ? PSW_C : 0) | (v ? PSW_V : 0));
-}
-
-/* add imm32,dn */
-void OP_FCC00000 (insn, extension)
- unsigned long insn, extension;
-{
- int z, c, n, v;
- unsigned long reg1, imm, value;
-
- reg1 = State.regs[REG_D0 + REG0_16 (insn)];
- imm = ((insn & 0xffff) << 16) + extension;
- value = reg1 + imm;
- State.regs[REG_D0 + REG0_16 (insn)] = value;
-
- z = (value == 0);
- n = (value & 0x80000000);
- c = (value < reg1) || (value < imm);
- v = ((reg1 & 0x80000000) == (imm & 0x80000000)
- && (reg1 & 0x80000000) != (value & 0x80000000));
-
- PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
- PSW |= ((z ? PSW_Z : 0) | ( n ? PSW_N : 0)
- | (c ? PSW_C : 0) | (v ? PSW_V : 0));
-}
-
-/* add imm8, an */
-void OP_2000 (insn, extension)
- unsigned long insn, extension;
-{
- int z, c, n, v;
- unsigned long reg1, imm, value;
-
- reg1 = State.regs[REG_A0 + REG0_8 (insn)];
- imm = SEXT8 (insn & 0xff);
- value = reg1 + imm;
- State.regs[REG_A0 + REG0_8 (insn)] = value;
-
- z = (value == 0);
- n = (value & 0x80000000);
- c = (value < reg1) || (value < imm);
- v = ((reg1 & 0x80000000) == (imm & 0x80000000)
- && (reg1 & 0x80000000) != (value & 0x80000000));
-
- PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
- PSW |= ((z ? PSW_Z : 0) | ( n ? PSW_N : 0)
- | (c ? PSW_C : 0) | (v ? PSW_V : 0));
-}
-
-/* add imm16, an */
-void OP_FAD00000 (insn, extension)
- unsigned long insn, extension;
-{
- int z, c, n, v;
- unsigned long reg1, imm, value;
-
- reg1 = State.regs[REG_A0 + REG0_16 (insn)];
- imm = SEXT16 (insn & 0xffff);
- value = reg1 + imm;
- State.regs[REG_A0 + REG0_16 (insn)] = value;
-
- z = (value == 0);
- n = (value & 0x80000000);
- c = (value < reg1) || (value < imm);
- v = ((reg1 & 0x80000000) == (imm & 0x80000000)
- && (reg1 & 0x80000000) != (value & 0x80000000));
-
- PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
- PSW |= ((z ? PSW_Z : 0) | ( n ? PSW_N : 0)
- | (c ? PSW_C : 0) | (v ? PSW_V : 0));
-}
-
-/* add imm32, an */
-void OP_FCD00000 (insn, extension)
- unsigned long insn, extension;
-{
- int z, c, n, v;
- unsigned long reg1, imm, value;
-
- reg1 = State.regs[REG_A0 + REG0_16 (insn)];
- imm = ((insn & 0xffff) << 16) + extension;
- value = reg1 + imm;
- State.regs[REG_A0 + REG0_16 (insn)] = value;
-
- z = (value == 0);
- n = (value & 0x80000000);
- c = (value < reg1) || (value < imm);
- v = ((reg1 & 0x80000000) == (imm & 0x80000000)
- && (reg1 & 0x80000000) != (value & 0x80000000));
-
- PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
- PSW |= ((z ? PSW_Z : 0) | ( n ? PSW_N : 0)
- | (c ? PSW_C : 0) | (v ? PSW_V : 0));
-}
-
-/* add imm8, sp */
-void OP_F8FE00 (insn, extension)
- unsigned long insn, extension;
-{
- unsigned long reg1, imm, value;
-
- reg1 = State.regs[REG_SP];
- imm = SEXT8 (insn & 0xff);
- value = reg1 + imm;
- State.regs[REG_SP] = value;
-}
-
-/* add imm16,sp */
-void OP_FAFE0000 (insn, extension)
- unsigned long insn, extension;
-{
- unsigned long reg1, imm, value;
-
- reg1 = State.regs[REG_SP];
- imm = SEXT16 (insn & 0xffff);
- value = reg1 + imm;
- State.regs[REG_SP] = value;
-}
-
-/* add imm32, sp */
-void OP_FCFE0000 (insn, extension)
- unsigned long insn, extension;
-{
- unsigned long reg1, imm, value;
-
- reg1 = State.regs[REG_SP];
- imm = ((insn & 0xffff) << 16) + extension;
- value = reg1 + imm;
- State.regs[REG_SP] = value;
-}
-
-/* addc dm,dn */
-void OP_F140 (insn, extension)
- unsigned long insn, extension;
-{
- int z, c, n, v;
- unsigned long reg1, reg2, value;
-
- reg1 = State.regs[REG_D0 + REG1 (insn)];
- reg2 = State.regs[REG_D0 + REG0 (insn)];
- value = reg1 + reg2 + ((PSW & PSW_C) != 0);
- State.regs[REG_D0 + REG0 (insn)] = value;
-
- z = (value == 0);
- n = (value & 0x80000000);
- c = (value < reg1) || (value < reg2);
- v = ((reg2 & 0x80000000) == (reg1 & 0x80000000)
- && (reg2 & 0x80000000) != (value & 0x80000000));
-
- PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
- PSW |= ((z ? PSW_Z : 0) | ( n ? PSW_N : 0)
- | (c ? PSW_C : 0) | (v ? PSW_V : 0));
-}
-
-/* sub dm, dn */
-void OP_F100 (insn, extension)
- unsigned long insn, extension;
-{
- int z, c, n, v;
- unsigned long reg1, reg2, value;
-
- reg1 = State.regs[REG_D0 + REG1 (insn)];
- reg2 = State.regs[REG_D0 + REG0 (insn)];
- value = reg2 - reg1;
- State.regs[REG_D0 + REG0 (insn)] = value;
-
- z = (value == 0);
- n = (value & 0x80000000);
- c = (reg1 > reg2);
- v = ((reg2 & 0x80000000) != (reg1 & 0x80000000)
- && (reg2 & 0x80000000) != (value & 0x80000000));
-
- PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
- PSW |= ((z ? PSW_Z : 0) | ( n ? PSW_N : 0)
- | (c ? PSW_C : 0) | (v ? PSW_V : 0));
-}
-
-/* sub dm, an */
-void OP_F120 (insn, extension)
- unsigned long insn, extension;
-{
- int z, c, n, v;
- unsigned long reg1, reg2, value;
-
- reg1 = State.regs[REG_D0 + REG1 (insn)];
- reg2 = State.regs[REG_A0 + REG0 (insn)];
- value = reg2 - reg1;
- State.regs[REG_A0 + REG0 (insn)] = value;
-
- z = (value == 0);
- n = (value & 0x80000000);
- c = (reg1 > reg2);
- v = ((reg2 & 0x80000000) != (reg1 & 0x80000000)
- && (reg2 & 0x80000000) != (value & 0x80000000));
-
- PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
- PSW |= ((z ? PSW_Z : 0) | ( n ? PSW_N : 0)
- | (c ? PSW_C : 0) | (v ? PSW_V : 0));
-}
-
-/* sub am, dn */
-void OP_F110 (insn, extension)
- unsigned long insn, extension;
-{
- int z, c, n, v;
- unsigned long reg1, reg2, value;
-
- reg1 = State.regs[REG_A0 + REG1 (insn)];
- reg2 = State.regs[REG_D0 + REG0 (insn)];
- value = reg2 - reg1;
- State.regs[REG_D0 + REG0 (insn)] = value;
-
- z = (value == 0);
- n = (value & 0x80000000);
- c = (reg1 > reg2);
- v = ((reg2 & 0x80000000) != (reg1 & 0x80000000)
- && (reg2 & 0x80000000) != (value & 0x80000000));
-
- PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
- PSW |= ((z ? PSW_Z : 0) | ( n ? PSW_N : 0)
- | (c ? PSW_C : 0) | (v ? PSW_V : 0));
-}
-
-/* sub am, an */
-void OP_F130 (insn, extension)
- unsigned long insn, extension;
-{
- int z, c, n, v;
- unsigned long reg1, reg2, value;
-
- reg1 = State.regs[REG_A0 + REG1 (insn)];
- reg2 = State.regs[REG_A0 + REG0 (insn)];
- value = reg2 - reg1;
- State.regs[REG_A0 + REG0 (insn)] = value;
-
- z = (value == 0);
- n = (value & 0x80000000);
- c = (reg1 > reg2);
- v = ((reg2 & 0x80000000) != (reg1 & 0x80000000)
- && (reg2 & 0x80000000) != (value & 0x80000000));
-
- PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
- PSW |= ((z ? PSW_Z : 0) | ( n ? PSW_N : 0)
- | (c ? PSW_C : 0) | (v ? PSW_V : 0));
-}
-
-/* sub imm32, dn */
-void OP_FCC40000 (insn, extension)
- unsigned long insn, extension;
-{
- int z, c, n, v;
- unsigned long reg1, imm, value;
-
- reg1 = State.regs[REG_D0 + REG0_16 (insn)];
- imm = ((insn & 0xffff) << 16) + extension;
- value = reg1 - imm;
- State.regs[REG_D0 + REG0_16 (insn)] = value;
-
- z = (value == 0);
- n = (value & 0x80000000);
- c = (reg1 < imm);
- v = ((reg1 & 0x80000000) != (imm & 0x80000000)
- && (reg1 & 0x80000000) != (value & 0x80000000));
-
- PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
- PSW |= ((z ? PSW_Z : 0) | ( n ? PSW_N : 0)
- | (c ? PSW_C : 0) | (v ? PSW_V : 0));
-}
-
-/* sub imm32, an */
-void OP_FCD40000 (insn, extension)
- unsigned long insn, extension;
-{
- int z, c, n, v;
- unsigned long reg1, imm, value;
-
- reg1 = State.regs[REG_A0 + REG0_16 (insn)];
- imm = ((insn & 0xffff) << 16) + extension;
- value = reg1 - imm;
- State.regs[REG_A0 + REG0_16 (insn)] = value;
-
- z = (value == 0);
- n = (value & 0x80000000);
- c = (reg1 < imm);
- v = ((reg1 & 0x80000000) != (imm & 0x80000000)
- && (reg1 & 0x80000000) != (value & 0x80000000));
-
- PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
- PSW |= ((z ? PSW_Z : 0) | ( n ? PSW_N : 0)
- | (c ? PSW_C : 0) | (v ? PSW_V : 0));
-}
-
-/* subc dm, dn */
-void OP_F180 (insn, extension)
- unsigned long insn, extension;
-{
- int z, c, n, v;
- unsigned long reg1, reg2, value;
-
- reg1 = State.regs[REG_D0 + REG1 (insn)];
- reg2 = State.regs[REG_D0 + REG0 (insn)];
- value = reg2 - reg1 - ((PSW & PSW_C) != 0);
- State.regs[REG_D0 + REG0 (insn)] = value;
-
- z = (value == 0);
- n = (value & 0x80000000);
- c = (reg1 > reg2);
- v = ((reg2 & 0x80000000) != (reg1 & 0x80000000)
- && (reg2 & 0x80000000) != (value & 0x80000000));
-
- PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
- PSW |= ((z ? PSW_Z : 0) | ( n ? PSW_N : 0)
- | (c ? PSW_C : 0) | (v ? PSW_V : 0));
-}
-
-/* mul dm, dn */
-void OP_F240 (insn, extension)
- unsigned long insn, extension;
-{
- unsigned long long temp;
- int n, z;
-
- temp = ((signed64)(signed32)State.regs[REG_D0 + REG0 (insn)]
- * (signed64)(signed32)State.regs[REG_D0 + REG1 (insn)]);
- State.regs[REG_D0 + REG0 (insn)] = temp & 0xffffffff;
- State.regs[REG_MDR] = (temp & 0xffffffff00000000LL) >> 32;;
- z = (State.regs[REG_D0 + REG0 (insn)] == 0);
- n = (State.regs[REG_D0 + REG0 (insn)] & 0x80000000) != 0;
- PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
- PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0));
-}
-
-/* mulu dm, dn */
-void OP_F250 (insn, extension)
- unsigned long insn, extension;
-{
- unsigned long long temp;
- int n, z;
-
- temp = ((unsigned64)State.regs[REG_D0 + REG0 (insn)]
- * (unsigned64)State.regs[REG_D0 + REG1 (insn)]);
- State.regs[REG_D0 + REG0 (insn)] = temp & 0xffffffff;
- State.regs[REG_MDR] = (temp & 0xffffffff00000000LL) >> 32;
- z = (State.regs[REG_D0 + REG0 (insn)] == 0);
- n = (State.regs[REG_D0 + REG0 (insn)] & 0x80000000) != 0;
- PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
- PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0));
-}
-
-/* div dm, dn */
-void OP_F260 (insn, extension)
- unsigned long insn, extension;
-{
- long long temp;
- int n, z;
-
- temp = State.regs[REG_MDR];
- temp <<= 32;
- temp |= State.regs[REG_D0 + REG0 (insn)];
- State.regs[REG_MDR] = temp % (long)State.regs[REG_D0 + REG1 (insn)];
- temp /= (long)State.regs[REG_D0 + REG1 (insn)];
- State.regs[REG_D0 + REG0 (insn)] = temp & 0xffffffff;
- z = (State.regs[REG_D0 + REG0 (insn)] == 0);
- n = (State.regs[REG_D0 + REG0 (insn)] & 0x80000000) != 0;
- PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
- PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0));
-}
-
-/* divu dm, dn */
-void OP_F270 (insn, extension)
- unsigned long insn, extension;
-{
- unsigned long long temp;
- int n, z;
-
- temp = State.regs[REG_MDR];
- temp <<= 32;
- temp |= State.regs[REG_D0 + REG0 (insn)];
- State.regs[REG_MDR] = temp % State.regs[REG_D0 + REG1 (insn)];
- temp /= State.regs[REG_D0 + REG1 (insn)];
- State.regs[REG_D0 + REG0 (insn)] = temp & 0xffffffff;
- z = (State.regs[REG_D0 + REG0 (insn)] == 0);
- n = (State.regs[REG_D0 + REG0 (insn)] & 0x80000000) != 0;
- PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
- PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0));
-}
-
-/* inc dn */
-void OP_40 (insn, extension)
- unsigned long insn, extension;
-{
- int z,n,c,v;
- unsigned int value, imm, reg1;
-
- reg1 = State.regs[REG_D0 + REG1 (insn)];
- imm = 1;
- value = reg1 + imm;
- State.regs[REG_D0 + REG1 (insn)] = value;
-
- z = (value == 0);
- n = (value & 0x80000000);
- c = (value < imm);
- v = ((reg1 & 0x80000000) == (imm & 0x80000000)
- && (reg1 & 0x80000000) != (value & 0x80000000));
-
- PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
- PSW |= ((z ? PSW_Z : 0) | ( n ? PSW_N : 0)
- | (c ? PSW_C : 0) | (v ? PSW_V : 0));
-}
-
-/* inc an */
-void OP_41 (insn, extension)
- unsigned long insn, extension;
-{
- State.regs[REG_A0 + REG1 (insn)] += 1;
-}
-
-/* inc4 an */
-void OP_50 (insn, extension)
- unsigned long insn, extension;
-{
- State.regs[REG_A0 + REG0 (insn)] += 4;
-}
-
-/* cmp imm8, dn */
-void OP_A000 (insn, extension)
- unsigned long insn, extension;
-{
- int z, c, n, v;
- unsigned long reg1, imm, value;
-
- reg1 = State.regs[REG_D0 + REG0_8 (insn)];
- imm = SEXT8 (insn & 0xff);
- value = reg1 - imm;
-
- z = (value == 0);
- n = (value & 0x80000000);
- c = (reg1 < imm);
- v = ((reg1 & 0x80000000) != (imm & 0x80000000)
- && (reg1 & 0x80000000) != (value & 0x80000000));
-
- PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
- PSW |= ((z ? PSW_Z : 0) | ( n ? PSW_N : 0)
- | (c ? PSW_C : 0) | (v ? PSW_V : 0));
-}
-
-/* cmp dm, dn */
-void OP_A0 (insn, extension)
- unsigned long insn, extension;
-{
- int z, c, n, v;
- unsigned long reg1, reg2, value;
-
- reg1 = State.regs[REG_D0 + REG1 (insn)];
- reg2 = State.regs[REG_D0 + REG0 (insn)];
- value = reg2 - reg1;
-
- z = (value == 0);
- n = (value & 0x80000000);
- c = (reg1 > reg2);
- v = ((reg2 & 0x80000000) != (reg1 & 0x80000000)
- && (reg2 & 0x80000000) != (value & 0x80000000));
-
- PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
- PSW |= ((z ? PSW_Z : 0) | ( n ? PSW_N : 0)
- | (c ? PSW_C : 0) | (v ? PSW_V : 0));
-}
-
-/* cmp dm, an */
-void OP_F1A0 (insn, extension)
- unsigned long insn, extension;
-{
- int z, c, n, v;
- unsigned long reg1, reg2, value;
-
- reg1 = State.regs[REG_D0 + REG1 (insn)];
- reg2 = State.regs[REG_A0 + REG0 (insn)];
- value = reg2 - reg1;
-
- z = (value == 0);
- n = (value & 0x80000000);
- c = (reg1 > reg2);
- v = ((reg2 & 0x80000000) != (reg1 & 0x80000000)
- && (reg2 & 0x80000000) != (value & 0x80000000));
-
- PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
- PSW |= ((z ? PSW_Z : 0) | ( n ? PSW_N : 0)
- | (c ? PSW_C : 0) | (v ? PSW_V : 0));
-}
-
-/* cmp am, dn */
-void OP_F190 (insn, extension)
- unsigned long insn, extension;
-{
- int z, c, n, v;
- unsigned long reg1, reg2, value;
-
- reg1 = State.regs[REG_A0 + REG1 (insn)];
- reg2 = State.regs[REG_D0 + REG0 (insn)];
- value = reg2 - reg1;
-
- z = (value == 0);
- n = (value & 0x80000000);
- c = (reg1 > reg2);
- v = ((reg2 & 0x80000000) != (reg1 & 0x80000000)
- && (reg2 & 0x80000000) != (value & 0x80000000));
-
- PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
- PSW |= ((z ? PSW_Z : 0) | ( n ? PSW_N : 0)
- | (c ? PSW_C : 0) | (v ? PSW_V : 0));
-}
-
-/* cmp imm8, an */
-void OP_B000 (insn, extension)
- unsigned long insn, extension;
-{
- int z, c, n, v;
- unsigned long reg1, imm, value;
-
- reg1 = State.regs[REG_A0 + REG0_8 (insn)];
- imm = insn & 0xff;
- value = reg1 - imm;
-
- z = (value == 0);
- n = (value & 0x80000000);
- c = (reg1 < imm);
- v = ((reg1 & 0x80000000) != (imm & 0x80000000)
- && (reg1 & 0x80000000) != (value & 0x80000000));
-
- PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
- PSW |= ((z ? PSW_Z : 0) | ( n ? PSW_N : 0)
- | (c ? PSW_C : 0) | (v ? PSW_V : 0));
-}
-
-/* cmp am, an */
-void OP_B0 (insn, extension)
- unsigned long insn, extension;
-{
- int z, c, n, v;
- unsigned long reg1, reg2, value;
-
- reg1 = State.regs[REG_A0 + REG1 (insn)];
- reg2 = State.regs[REG_A0 + REG0 (insn)];
- value = reg2 - reg1;
-
- z = (value == 0);
- n = (value & 0x80000000);
- c = (reg1 > reg2);
- v = ((reg2 & 0x80000000) != (reg1 & 0x80000000)
- && (reg2 & 0x80000000) != (value & 0x80000000));
-
- PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
- PSW |= ((z ? PSW_Z : 0) | ( n ? PSW_N : 0)
- | (c ? PSW_C : 0) | (v ? PSW_V : 0));
-}
-
-/* cmp imm16, dn */
-void OP_FAC80000 (insn, extension)
- unsigned long insn, extension;
-{
- int z, c, n, v;
- unsigned long reg1, imm, value;
-
- reg1 = State.regs[REG_D0 + REG0_16 (insn)];
- imm = SEXT16 (insn & 0xffff);
- value = reg1 - imm;
-
- z = (value == 0);
- n = (value & 0x80000000);
- c = (reg1 < imm);
- v = ((reg1 & 0x80000000) != (imm & 0x80000000)
- && (reg1 & 0x80000000) != (value & 0x80000000));
-
- PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
- PSW |= ((z ? PSW_Z : 0) | ( n ? PSW_N : 0)
- | (c ? PSW_C : 0) | (v ? PSW_V : 0));
-}
-
-/* cmp imm32, dn */
-void OP_FCC80000 (insn, extension)
- unsigned long insn, extension;
-{
- int z, c, n, v;
- unsigned long reg1, imm, value;
-
- reg1 = State.regs[REG_D0 + REG0_16 (insn)];
- imm = ((insn & 0xffff) << 16) + extension;
- value = reg1 - imm;
-
- z = (value == 0);
- n = (value & 0x80000000);
- c = (reg1 < imm);
- v = ((reg1 & 0x80000000) != (imm & 0x80000000)
- && (reg1 & 0x80000000) != (value & 0x80000000));
-
- PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
- PSW |= ((z ? PSW_Z : 0) | ( n ? PSW_N : 0)
- | (c ? PSW_C : 0) | (v ? PSW_V : 0));
-}
-
-/* cmp imm16, an */
-void OP_FAD80000 (insn, extension)
- unsigned long insn, extension;
-{
- int z, c, n, v;
- unsigned long reg1, imm, value;
-
- reg1 = State.regs[REG_A0 + REG0_16 (insn)];
- imm = insn & 0xffff;
- value = reg1 - imm;
-
- z = (value == 0);
- n = (value & 0x80000000);
- c = (reg1 < imm);
- v = ((reg1 & 0x80000000) != (imm & 0x80000000)
- && (reg1 & 0x80000000) != (value & 0x80000000));
-
- PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
- PSW |= ((z ? PSW_Z : 0) | ( n ? PSW_N : 0)
- | (c ? PSW_C : 0) | (v ? PSW_V : 0));
-}
-
-/* cmp imm32, an */
-void OP_FCD80000 (insn, extension)
- unsigned long insn, extension;
-{
- int z, c, n, v;
- unsigned long reg1, imm, value;
-
- reg1 = State.regs[REG_A0 + REG0_16 (insn)];
- imm = ((insn & 0xffff) << 16) + extension;
- value = reg1 - imm;
-
- z = (value == 0);
- n = (value & 0x80000000);
- c = (reg1 < imm);
- v = ((reg1 & 0x80000000) != (imm & 0x80000000)
- && (reg1 & 0x80000000) != (value & 0x80000000));
-
- PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
- PSW |= ((z ? PSW_Z : 0) | ( n ? PSW_N : 0)
- | (c ? PSW_C : 0) | (v ? PSW_V : 0));
-}
-
-/* and dm, dn */
-void OP_F200 (insn, extension)
- unsigned long insn, extension;
-{
- int n, z;
-
- State.regs[REG_D0 + REG0 (insn)] &= State.regs[REG_D0 + REG1 (insn)];
- z = (State.regs[REG_D0 + REG0 (insn)] == 0);
- n = (State.regs[REG_D0 + REG0 (insn)] & 0x80000000) != 0;
- PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
- PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0));
-}
-
-/* and imm8, dn */
-void OP_F8E000 (insn, extension)
- unsigned long insn, extension;
-{
- int n, z;
-
- State.regs[REG_D0 + REG0_8 (insn)] &= (insn & 0xff);
- z = (State.regs[REG_D0 + REG0_8 (insn)] == 0);
- n = (State.regs[REG_D0 + REG0_8 (insn)] & 0x80000000) != 0;
- PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
- PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0));
-}
-
-/* and imm16, dn */
-void OP_FAE00000 (insn, extension)
- unsigned long insn, extension;
-{
- int n, z;
-
- State.regs[REG_D0 + REG0_16 (insn)] &= (insn & 0xffff);
- z = (State.regs[REG_D0 + REG0_16 (insn)] == 0);
- n = (State.regs[REG_D0 + REG0_16 (insn)] & 0x80000000) != 0;
- PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
- PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0));
-}
-
-/* and imm32, dn */
-void OP_FCE00000 (insn, extension)
- unsigned long insn, extension;
-{
- int n, z;
-
- State.regs[REG_D0 + REG0_16 (insn)]
- &= ((insn & 0xffff) << 16) + extension;
- z = (State.regs[REG_D0 + REG0_16 (insn)] == 0);
- n = (State.regs[REG_D0 + REG0_16 (insn)] & 0x80000000) != 0;
- PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
- PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0));
-}
-
-/* and imm16, psw */
-void OP_FAFC0000 (insn, extension)
- unsigned long insn, extension;
-{
- PSW &= (insn & 0xffff);
-}
-
-/* or dm, dn*/
-void OP_F210 (insn, extension)
- unsigned long insn, extension;
-{
- int n, z;
-
- State.regs[REG_D0 + REG0 (insn)] |= State.regs[REG_D0 + REG1 (insn)];
- z = (State.regs[REG_D0 + REG0 (insn)] == 0);
- n = (State.regs[REG_D0 + REG0 (insn)] & 0x80000000) != 0;
- PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
- PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0));
-}
-
-/* or imm8, dn */
-void OP_F8E400 (insn, extension)
- unsigned long insn, extension;
-{
- int n, z;
-
- State.regs[REG_D0 + REG0_8 (insn)] |= insn & 0xff;
- z = (State.regs[REG_D0 + REG0_8 (insn)] == 0);
- n = (State.regs[REG_D0 + REG0_8 (insn)] & 0x80000000) != 0;
- PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
- PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0));
-}
-
-/* or imm16, dn*/
-void OP_FAE40000 (insn, extension)
- unsigned long insn, extension;
-{
- int n, z;
-
- State.regs[REG_D0 + REG0_16 (insn)] |= insn & 0xffff;
- z = (State.regs[REG_D0 + REG0_16 (insn)] == 0);
- n = (State.regs[REG_D0 + REG0_16 (insn)] & 0x80000000) != 0;
- PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
- PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0));
-}
-
-/* or imm32, dn */
-void OP_FCE40000 (insn, extension)
- unsigned long insn, extension;
-{
- int n, z;
-
- State.regs[REG_D0 + REG0_16 (insn)]
- |= ((insn & 0xffff) << 16) + extension;
- z = (State.regs[REG_D0 + REG0_16 (insn)] == 0);
- n = (State.regs[REG_D0 + REG0_16 (insn)] & 0x80000000) != 0;
- PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
- PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0));
-}
-
-/* or imm16,psw */
-void OP_FAFD0000 (insn, extension)
- unsigned long insn, extension;
-{
- PSW |= (insn & 0xffff);
-}
-
-/* xor dm, dn */
-void OP_F220 (insn, extension)
- unsigned long insn, extension;
-{
- int n, z;
-
- State.regs[REG_D0 + REG0 (insn)] ^= State.regs[REG_D0 + REG1 (insn)];
- z = (State.regs[REG_D0 + REG0 (insn)] == 0);
- n = (State.regs[REG_D0 + REG0 (insn)] & 0x80000000) != 0;
- PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
- PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0));
-}
-
-/* xor imm16, dn */
-void OP_FAE80000 (insn, extension)
- unsigned long insn, extension;
-{
- int n, z;
-
- State.regs[REG_D0 + REG0_16 (insn)] ^= insn & 0xffff;
- z = (State.regs[REG_D0 + REG0_16 (insn)] == 0);
- n = (State.regs[REG_D0 + REG0_16 (insn)] & 0x80000000) != 0;
- PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
- PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0));
-}
-
-/* xor imm32, dn */
-void OP_FCE80000 (insn, extension)
- unsigned long insn, extension;
-{
- int n, z;
-
- State.regs[REG_D0 + REG0_16 (insn)]
- ^= ((insn & 0xffff) << 16) + extension;
- z = (State.regs[REG_D0 + REG0_16 (insn)] == 0);
- n = (State.regs[REG_D0 + REG0_16 (insn)] & 0x80000000) != 0;
- PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
- PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0));
-}
-
-/* not dn */
-void OP_F230 (insn, extension)
- unsigned long insn, extension;
-{
- int n, z;
-
- State.regs[REG_D0 + REG0 (insn)] = ~State.regs[REG_D0 + REG0 (insn)];
- z = (State.regs[REG_D0 + REG0 (insn)] == 0);
- n = (State.regs[REG_D0 + REG0 (insn)] & 0x80000000) != 0;
- PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
- PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0));
-}
-
-/* btst imm8, dn */
-void OP_F8EC00 (insn, extension)
- unsigned long insn, extension;
-{
- unsigned long temp;
- int z, n;
-
- temp = State.regs[REG_D0 + REG0_8 (insn)];
- temp &= (insn & 0xff);
- n = (temp & 0x80000000) != 0;
- z = (temp == 0);
- PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
- PSW |= (z ? PSW_Z : 0) | (n ? PSW_N : 0);
-}
-
-/* btst imm16, dn */
-void OP_FAEC0000 (insn, extension)
- unsigned long insn, extension;
-{
- unsigned long temp;
- int z, n;
-
- temp = State.regs[REG_D0 + REG0_16 (insn)];
- temp &= (insn & 0xffff);
- n = (temp & 0x80000000) != 0;
- z = (temp == 0);
- PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
- PSW |= (z ? PSW_Z : 0) | (n ? PSW_N : 0);
-}
-
-/* btst imm32, dn */
-void OP_FCEC0000 (insn, extension)
- unsigned long insn, extension;
-{
- unsigned long temp;
- int z, n;
-
- temp = State.regs[REG_D0 + REG0_16 (insn)];
- temp &= ((insn & 0xffff) << 16) + extension;
- n = (temp & 0x80000000) != 0;
- z = (temp == 0);
- PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
- PSW |= (z ? PSW_Z : 0) | (n ? PSW_N : 0);
-}
-
-/* btst imm8,(abs32) */
-void OP_FE020000 (insn, extension)
- unsigned long insn, extension;
-{
- unsigned long temp;
- int n, z;
-
- temp = load_byte (((insn & 0xffff) << 16) | (extension >> 8));
- temp &= (extension & 0xff);
- n = (temp & 0x80000000) != 0;
- z = (temp == 0);
- PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
- PSW |= (z ? PSW_Z : 0) | (n ? PSW_N : 0);
-}
-
-/* btst imm8,(d8,an) */
-void OP_FAF80000 (insn, extension)
- unsigned long insn, extension;
-{
- unsigned long temp;
- int n, z;
-
- temp = load_byte ((State.regs[REG_A0 + REG0_16 (insn)]
- + SEXT8 ((insn & 0xff00) >> 8)));
- temp &= (insn & 0xff);
- n = (temp & 0x80000000) != 0;
- z = (temp == 0);
- PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
- PSW |= (z ? PSW_Z : 0) | (n ? PSW_N : 0);
-}
-
-/* bset dm, (an) */
-void OP_F080 (insn, extension)
- unsigned long insn, extension;
-{
- unsigned long temp;
- int z;
-
- temp = load_byte (State.regs[REG_A0 + REG0 (insn)]);
- z = (temp & State.regs[REG_D0 + REG1 (insn)]) == 0;
- temp |= State.regs[REG_D0 + REG1 (insn)];
- store_byte (State.regs[REG_A0 + REG0 (insn)], temp);
- PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
- PSW |= (z ? PSW_Z : 0);
-}
-
-/* bset imm8, (abs32) */
-void OP_FE000000 (insn, extension)
- unsigned long insn, extension;
-{
- unsigned long temp;
- int z;
-
- temp = load_byte (((insn & 0xffff) << 16 | (extension >> 8)));
- z = (temp & (extension & 0xff)) == 0;
- temp |= (extension & 0xff);
- store_byte ((((insn & 0xffff) << 16) | (extension >> 8)), temp);
- PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
- PSW |= (z ? PSW_Z : 0);
-}
-
-/* bset imm8,(d8,an) */
-void OP_FAF00000 (insn, extension)
- unsigned long insn, extension;
-{
- unsigned long temp;
- int z;
-
- temp = load_byte ((State.regs[REG_A0 + REG0_16 (insn)]
- + SEXT8 ((insn & 0xff00) >> 8)));
- z = (temp & (insn & 0xff)) == 0;
- temp |= (insn & 0xff);
- store_byte ((State.regs[REG_A0 + REG0_16 (insn)]
- + SEXT8 ((insn & 0xff00) >> 8)), temp);
- PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
- PSW |= (z ? PSW_Z : 0);
-}
-
-/* bclr dm, (an) */
-void OP_F090 (insn, extension)
- unsigned long insn, extension;
-{
- unsigned long temp;
- int z;
-
- temp = load_byte (State.regs[REG_A0 + REG0 (insn)]);
- z = (temp & State.regs[REG_D0 + REG1 (insn)]) == 0;
- temp = temp & ~State.regs[REG_D0 + REG1 (insn)];
- store_byte (State.regs[REG_A0 + REG0 (insn)], temp);
- PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
- PSW |= (z ? PSW_Z : 0);
-}
-
-/* bclr imm8, (abs32) */
-void OP_FE010000 (insn, extension)
- unsigned long insn, extension;
-{
- unsigned long temp;
- int z;
-
- temp = load_byte (((insn & 0xffff) << 16) | (extension >> 8));
- z = (temp & (extension & 0xff)) == 0;
- temp = temp & ~(extension & 0xff);
- store_byte (((insn & 0xffff) << 16) | (extension >> 8), temp);
- PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
- PSW |= (z ? PSW_Z : 0);
-}
-
-/* bclr imm8,(d8,an) */
-void OP_FAF40000 (insn, extension)
- unsigned long insn, extension;
-{
- unsigned long temp;
- int z;
-
- temp = load_byte ((State.regs[REG_A0 + REG0_16 (insn)]
- + SEXT8 ((insn & 0xff00) >> 8)));
- z = (temp & (insn & 0xff)) == 0;
- temp = temp & ~(insn & 0xff);
- store_byte ((State.regs[REG_A0 + REG0_16 (insn)]
- + SEXT8 ((insn & 0xff00) >> 8)), temp);
- PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
- PSW |= (z ? PSW_Z : 0);
-}
-
-/* asr dm, dn */
-void OP_F2B0 (insn, extension)
- unsigned long insn, extension;
-{
- long temp;
- int z, n, c;
-
- temp = State.regs[REG_D0 + REG0 (insn)];
- c = temp & 1;
- temp >>= State.regs[REG_D0 + REG1 (insn)];
- State.regs[REG_D0 + REG0 (insn)] = temp;
- z = (State.regs[REG_D0 + REG0 (insn)] == 0);
- n = (State.regs[REG_D0 + REG0 (insn)] & 0x80000000) != 0;
- PSW &= ~(PSW_Z | PSW_N | PSW_C);
- PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0) | (c ? PSW_C : 0));
-}
-
-/* asr imm8, dn */
-void OP_F8C800 (insn, extension)
- unsigned long insn, extension;
-{
- long temp;
- int z, n, c;
-
- temp = State.regs[REG_D0 + REG0_8 (insn)];
- c = temp & 1;
- temp >>= (insn & 0xff);
- State.regs[REG_D0 + REG0_8 (insn)] = temp;
- z = (State.regs[REG_D0 + REG0_8 (insn)] == 0);
- n = (State.regs[REG_D0 + REG0_8 (insn)] & 0x80000000) != 0;
- PSW &= ~(PSW_Z | PSW_N | PSW_C);
- PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0) | (c ? PSW_C : 0));
-}
-
-/* lsr dm, dn */
-void OP_F2A0 (insn, extension)
- unsigned long insn, extension;
-{
- int z, n, c;
-
- c = State.regs[REG_D0 + REG0 (insn)] & 1;
- State.regs[REG_D0 + REG0 (insn)]
- >>= State.regs[REG_D0 + REG1 (insn)];
- z = (State.regs[REG_D0 + REG0 (insn)] == 0);
- n = (State.regs[REG_D0 + REG0 (insn)] & 0x80000000) != 0;
- PSW &= ~(PSW_Z | PSW_N | PSW_C);
- PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0) | (c ? PSW_C : 0));
-}
-
-/* lsr imm8, dn */
-void OP_F8C400 (insn, extension)
- unsigned long insn, extension;
-{
- int z, n, c;
-
- c = State.regs[REG_D0 + REG0_8 (insn)] & 1;
- State.regs[REG_D0 + REG0_8 (insn)] >>= (insn & 0xff);
- z = (State.regs[REG_D0 + REG0_8 (insn)] == 0);
- n = (State.regs[REG_D0 + REG0_8 (insn)] & 0x80000000) != 0;
- PSW &= ~(PSW_Z | PSW_N | PSW_C);
- PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0) | (c ? PSW_C : 0));
-}
-
-/* asl dm, dn */
-void OP_F290 (insn, extension)
- unsigned long insn, extension;
-{
- int n, z;
-
- State.regs[REG_D0 + REG0 (insn)]
- <<= State.regs[REG_D0 + REG1 (insn)];
- z = (State.regs[REG_D0 + REG0 (insn)] == 0);
- n = (State.regs[REG_D0 + REG0 (insn)] & 0x80000000) != 0;
- PSW &= ~(PSW_Z | PSW_N);
- PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0));
-}
-
-/* asl imm8, dn */
-void OP_F8C000 (insn, extension)
- unsigned long insn, extension;
-{
- int n, z;
-
- State.regs[REG_D0 + REG0_8 (insn)] <<= (insn & 0xff);
- z = (State.regs[REG_D0 + REG0_8 (insn)] == 0);
- n = (State.regs[REG_D0 + REG0_8 (insn)] & 0x80000000) != 0;
- PSW &= ~(PSW_Z | PSW_N);
- PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0));
-}
-
-/* asl2 dn */
-void OP_54 (insn, extension)
- unsigned long insn, extension;
-{
- int n, z;
-
- State.regs[REG_D0 + REG0 (insn)] <<= 2;
- z = (State.regs[REG_D0 + REG0 (insn)] == 0);
- n = (State.regs[REG_D0 + REG0 (insn)] & 0x80000000) != 0;
- PSW &= ~(PSW_Z | PSW_N);
- PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0));
-}
-
-/* ror dn */
-void OP_F284 (insn, extension)
- unsigned long insn, extension;
-{
- unsigned long value;
- int c,n,z;
-
- value = State.regs[REG_D0 + REG0 (insn)];
- c = (value & 0x1);
-
- value >>= 1;
- value |= ((PSW & PSW_C) != 0) ? 0x80000000 : 0;
- State.regs[REG_D0 + REG0 (insn)] = value;
- z = (value == 0);
- n = (value & 0x80000000) != 0;
- PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
- PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0) | (c ? PSW_C : 0));
-}
-
-/* rol dn */
-void OP_F280 (insn, extension)
- unsigned long insn, extension;
-{
- unsigned long value;
- int c,n,z;
-
- value = State.regs[REG_D0 + REG0 (insn)];
- c = (value & 0x80000000) ? 1 : 0;
-
- value <<= 1;
- value |= ((PSW & PSW_C) != 0);
- State.regs[REG_D0 + REG0 (insn)] = value;
- z = (value == 0);
- n = (value & 0x80000000) != 0;
- PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
- PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0) | (c ? PSW_C : 0));
-}
-
-/* beq label:8 */
-void OP_C800 (insn, extension)
- unsigned long insn, extension;
-{
- /* The dispatching code will add 2 after we return, so
- we subtract two here to make things right. */
- if (PSW & PSW_Z)
- State.regs[REG_PC] += SEXT8 (insn & 0xff) - 2;
-}
-
-/* bne label:8 */
-void OP_C900 (insn, extension)
- unsigned long insn, extension;
-{
- /* The dispatching code will add 2 after we return, so
- we subtract two here to make things right. */
- if (!(PSW & PSW_Z))
- State.regs[REG_PC] += SEXT8 (insn & 0xff) - 2;
-}
-
-/* bgt label:8 */
-void OP_C100 (insn, extension)
- unsigned long insn, extension;
-{
- /* The dispatching code will add 2 after we return, so
- we subtract two here to make things right. */
- if (!((PSW & PSW_Z)
- || (((PSW & PSW_N) != 0) ^ ((PSW & PSW_V) != 0))))
- State.regs[REG_PC] += SEXT8 (insn & 0xff) - 2;
-}
-
-/* bge label:8 */
-void OP_C200 (insn, extension)
- unsigned long insn, extension;
-{
- /* The dispatching code will add 2 after we return, so
- we subtract two here to make things right. */
- if (!(((PSW & PSW_N) != 0) ^ ((PSW & PSW_V) != 0)))
- State.regs[REG_PC] += SEXT8 (insn & 0xff) - 2;
-}
-
-/* ble label:8 */
-void OP_C300 (insn, extension)
- unsigned long insn, extension;
-{
- /* The dispatching code will add 2 after we return, so
- we subtract two here to make things right. */
- if ((PSW & PSW_Z)
- || (((PSW & PSW_N) != 0) ^ ((PSW & PSW_V) != 0)))
- State.regs[REG_PC] += SEXT8 (insn & 0xff) - 2;
-}
-
-/* blt label:8 */
-void OP_C000 (insn, extension)
- unsigned long insn, extension;
-{
- /* The dispatching code will add 2 after we return, so
- we subtract two here to make things right. */
- if (((PSW & PSW_N) != 0) ^ ((PSW & PSW_V) != 0))
- State.regs[REG_PC] += SEXT8 (insn & 0xff) - 2;
-}
-
-/* bhi label:8 */
-void OP_C500 (insn, extension)
- unsigned long insn, extension;
-{
- /* The dispatching code will add 2 after we return, so
- we subtract two here to make things right. */
- if (!(((PSW & PSW_C) != 0) || (PSW & PSW_Z) != 0))
- State.regs[REG_PC] += SEXT8 (insn & 0xff) - 2;
-}
-
-/* bcc label:8 */
-void OP_C600 (insn, extension)
- unsigned long insn, extension;
-{
- /* The dispatching code will add 2 after we return, so
- we subtract two here to make things right. */
- if (!(PSW & PSW_C))
- State.regs[REG_PC] += SEXT8 (insn & 0xff) - 2;
-}
-
-/* bls label:8 */
-void OP_C700 (insn, extension)
- unsigned long insn, extension;
-{
- /* The dispatching code will add 2 after we return, so
- we subtract two here to make things right. */
- if (((PSW & PSW_C) != 0) || (PSW & PSW_Z) != 0)
- State.regs[REG_PC] += SEXT8 (insn & 0xff) - 2;
-}
-
-/* bcs label:8 */
-void OP_C400 (insn, extension)
- unsigned long insn, extension;
-{
- /* The dispatching code will add 2 after we return, so
- we subtract two here to make things right. */
- if (PSW & PSW_C)
- State.regs[REG_PC] += SEXT8 (insn & 0xff) - 2;
-}
-
-/* bvc label:8 */
-void OP_F8E800 (insn, extension)
- unsigned long insn, extension;
-{
- /* The dispatching code will add 3 after we return, so
- we subtract two here to make things right. */
- if (!(PSW & PSW_V))
- State.regs[REG_PC] += SEXT8 (insn & 0xff) - 3;
-}
-
-/* bvs label:8 */
-void OP_F8E900 (insn, extension)
- unsigned long insn, extension;
-{
- /* The dispatching code will add 3 after we return, so
- we subtract two here to make things right. */
- if (PSW & PSW_V)
- State.regs[REG_PC] += SEXT8 (insn & 0xff) - 3;
-}
-
-/* bnc label:8 */
-void OP_F8EA00 (insn, extension)
- unsigned long insn, extension;
-{
- /* The dispatching code will add 3 after we return, so
- we subtract two here to make things right. */
- if (!(PSW & PSW_N))
- State.regs[REG_PC] += SEXT8 (insn & 0xff) - 3;
-}
-
-/* bns label:8 */
-void OP_F8EB00 (insn, extension)
- unsigned long insn, extension;
-{
- /* The dispatching code will add 3 after we return, so
- we subtract two here to make things right. */
- if (PSW & PSW_N)
- State.regs[REG_PC] += SEXT8 (insn & 0xff) - 3;
-}
-
-/* bra label:8 */
-void OP_CA00 (insn, extension)
- unsigned long insn, extension;
-{
- /* The dispatching code will add 2 after we return, so
- we subtract two here to make things right. */
- State.regs[REG_PC] += SEXT8 (insn & 0xff) - 2;
-}
-
-/* leq */
-void OP_D8 (insn, extension)
- unsigned long insn, extension;
-{
- /* The dispatching code will add 1 after we return, so
- we subtract one here to make things right. */
- if (PSW & PSW_Z)
- State.regs[REG_PC] = State.regs[REG_LAR] - 4 - 1;
-}
-
-/* lne */
-void OP_D9 (insn, extension)
- unsigned long insn, extension;
-{
- /* The dispatching code will add 1 after we return, so
- we subtract one here to make things right. */
- if (!(PSW & PSW_Z))
- State.regs[REG_PC] = State.regs[REG_LAR] - 4 - 1;
-}
-
-/* lgt */
-void OP_D1 (insn, extension)
- unsigned long insn, extension;
-{
- /* The dispatching code will add 1 after we return, so
- we subtract one here to make things right. */
- if (!((PSW & PSW_Z)
- || (((PSW & PSW_N) != 0) ^ ((PSW & PSW_V) != 0))))
- State.regs[REG_PC] = State.regs[REG_LAR] - 4 - 1;
-}
-
-/* lge */
-void OP_D2 (insn, extension)
- unsigned long insn, extension;
-{
- /* The dispatching code will add 1 after we return, so
- we subtract one here to make things right. */
- if (!(((PSW & PSW_N) != 0) ^ ((PSW & PSW_V) != 0)))
- State.regs[REG_PC] = State.regs[REG_LAR] - 4 - 1;
-}
-
-/* lle */
-void OP_D3 (insn, extension)
- unsigned long insn, extension;
-{
- /* The dispatching code will add 1 after we return, so
- we subtract one here to make things right. */
- if ((PSW & PSW_Z)
- || (((PSW & PSW_N) != 0) ^ ((PSW & PSW_V) != 0)))
- State.regs[REG_PC] = State.regs[REG_LAR] - 4 - 1;
-}
-
-/* llt */
-void OP_D0 (insn, extension)
- unsigned long insn, extension;
-{
- /* The dispatching code will add 1 after we return, so
- we subtract one here to make things right. */
- if (((PSW & PSW_N) != 0) ^ ((PSW & PSW_V) != 0))
- State.regs[REG_PC] = State.regs[REG_LAR] - 4 - 1;
-}
-
-/* lhi */
-void OP_D5 (insn, extension)
- unsigned long insn, extension;
-{
- /* The dispatching code will add 1 after we return, so
- we subtract one here to make things right. */
- if (!(((PSW & PSW_C) != 0) || (PSW & PSW_Z) != 0))
- State.regs[REG_PC] = State.regs[REG_LAR] - 4 - 1;
-}
-
-/* lcc */
-void OP_D6 (insn, extension)
- unsigned long insn, extension;
-{
- /* The dispatching code will add 1 after we return, so
- we subtract one here to make things right. */
- if (!(PSW & PSW_C))
- State.regs[REG_PC] = State.regs[REG_LAR] - 4 - 1;
-}
-
-/* lls */
-void OP_D7 (insn, extension)
- unsigned long insn, extension;
-{
- /* The dispatching code will add 1 after we return, so
- we subtract one here to make things right. */
- if (((PSW & PSW_C) != 0) || (PSW & PSW_Z) != 0)
- State.regs[REG_PC] = State.regs[REG_LAR] - 4 - 1;
-}
-
-/* lcs */
-void OP_D4 (insn, extension)
- unsigned long insn, extension;
-{
- /* The dispatching code will add 1 after we return, so
- we subtract one here to make things right. */
- if (PSW & PSW_C)
- State.regs[REG_PC] = State.regs[REG_LAR] - 4 - 1;
-}
-
-/* lra */
-void OP_DA (insn, extension)
- unsigned long insn, extension;
-{
- State.regs[REG_PC] = State.regs[REG_LAR] - 4 - 1;
-}
-
-/* setlb */
-void OP_DB (insn, extension)
- unsigned long insn, extension;
-{
- State.regs[REG_LIR] = load_mem_big (State.regs[REG_PC] + 1, 4);
- State.regs[REG_LAR] = State.regs[REG_PC] + 5;
-}
-
-/* jmp (an) */
-void OP_F0F4 (insn, extension)
- unsigned long insn, extension;
-{
- State.regs[REG_PC] = State.regs[REG_A0 + REG0 (insn)] - 2;
-}
-
-/* jmp label:16 */
-void OP_CC0000 (insn, extension)
- unsigned long insn, extension;
-{
- State.regs[REG_PC] += SEXT16 (insn & 0xffff) - 3;
-}
-
-/* jmp label:32 */
-void OP_DC000000 (insn, extension)
- unsigned long insn, extension;
-{
- State.regs[REG_PC] += (((insn & 0xffffff) << 8) + extension) - 5;
-}
-
-/* call label:16,reg_list,imm8 */
-void OP_CD000000 (insn, extension)
- unsigned long insn, extension;
-{
- unsigned int next_pc, sp;
- unsigned long mask;
-
- sp = State.regs[REG_SP];
- next_pc = State.regs[REG_PC] + 5;
- State.mem[sp] = next_pc & 0xff;
- State.mem[sp+1] = (next_pc & 0xff00) >> 8;
- State.mem[sp+2] = (next_pc & 0xff0000) >> 16;
- State.mem[sp+3] = (next_pc & 0xff000000) >> 24;
-
- mask = insn & 0xff;
-
- if (mask & 0x80)
- {
- sp -= 4;
- store_word (sp, State.regs[REG_D0 + 2]);
- }
-
- if (mask & 0x40)
- {
- sp -= 4;
- store_word (sp, State.regs[REG_D0 + 3]);
- }
-
- if (mask & 0x20)
- {
- sp -= 4;
- store_word (sp, State.regs[REG_A0 + 2]);
- }
-
- if (mask & 0x10)
- {
- sp -= 4;
- store_word (sp, State.regs[REG_A0 + 3]);
- }
-
- if (mask & 0x8)
- {
- sp -= 4;
- store_word (sp, State.regs[REG_D0]);
- sp -= 4;
- store_word (sp, State.regs[REG_D0 + 1]);
- sp -= 4;
- store_word (sp, State.regs[REG_A0]);
- sp -= 4;
- store_word (sp, State.regs[REG_A0 + 1]);
- sp -= 4;
- store_word (sp, State.regs[REG_MDR]);
- sp -= 4;
- store_word (sp, State.regs[REG_LIR]);
- sp -= 4;
- store_word (sp, State.regs[REG_LAR]);
- sp -= 4;
- }
-
- /* Update the stack pointer, note that the register saves to do not
- modify SP. The SP adjustment is derived totally from the imm8
- field. */
- State.regs[REG_SP] -= extension;
- State.regs[REG_MDR] = next_pc;
- State.regs[REG_PC] += SEXT16 ((insn & 0xffff00) >> 8) - 5;
-}
-
-/* call label:32,reg_list,imm8*/
-void OP_DD000000 (insn, extension)
- unsigned long insn, extension;
-{
- unsigned int next_pc, sp, adjust;
- unsigned long mask;
-
- sp = State.regs[REG_SP];
- next_pc = State.regs[REG_PC] + 7;
- State.mem[sp] = next_pc & 0xff;
- State.mem[sp+1] = (next_pc & 0xff00) >> 8;
- State.mem[sp+2] = (next_pc & 0xff0000) >> 16;
- State.mem[sp+3] = (next_pc & 0xff000000) >> 24;
-
- mask = (extension & 0xff00) >> 8;
-
- if (mask & 0x80)
- {
- sp -= 4;
- store_word (sp, State.regs[REG_D0 + 2]);
- }
-
- if (mask & 0x40)
- {
- sp -= 4;
- store_word (sp, State.regs[REG_D0 + 3]);
- }
-
- if (mask & 0x20)
- {
- sp -= 4;
- store_word (sp, State.regs[REG_A0 + 2]);
- }
-
- if (mask & 0x10)
- {
- sp -= 4;
- store_word (sp, State.regs[REG_A0 + 3]);
- }
-
- if (mask & 0x8)
- {
- sp -= 4;
- store_word (sp, State.regs[REG_D0]);
- sp -= 4;
- store_word (sp, State.regs[REG_D0 + 1]);
- sp -= 4;
- store_word (sp, State.regs[REG_A0]);
- sp -= 4;
- store_word (sp, State.regs[REG_A0 + 1]);
- sp -= 4;
- store_word (sp, State.regs[REG_MDR]);
- sp -= 4;
- store_word (sp, State.regs[REG_LIR]);
- sp -= 4;
- store_word (sp, State.regs[REG_LAR]);
- sp -= 4;
- }
-
- /* Update the stack pointer, note that the register saves to do not
- modify SP. The SP adjustment is derived totally from the imm8
- field. */
- State.regs[REG_SP] -= (extension & 0xff);
- State.regs[REG_MDR] = next_pc;
- State.regs[REG_PC] += (((insn & 0xffffff) << 8) | ((extension & 0xff0000) >> 16)) - 7;
-}
-
-/* calls (an) */
-void OP_F0F0 (insn, extension)
- unsigned long insn, extension;
-{
- unsigned int next_pc, sp;
-
- sp = State.regs[REG_SP];
- next_pc = State.regs[REG_PC] + 2;
- State.mem[sp] = next_pc & 0xff;
- State.mem[sp+1] = (next_pc & 0xff00) >> 8;
- State.mem[sp+2] = (next_pc & 0xff0000) >> 16;
- State.mem[sp+3] = (next_pc & 0xff000000) >> 24;
- State.regs[REG_MDR] = next_pc;
- State.regs[REG_PC] = State.regs[REG_A0 + REG0 (insn)] - 2;
-}
-
-/* calls label:16 */
-void OP_FAFF0000 (insn, extension)
- unsigned long insn, extension;
-{
- unsigned int next_pc, sp;
-
- sp = State.regs[REG_SP];
- next_pc = State.regs[REG_PC] + 4;
- State.mem[sp] = next_pc & 0xff;
- State.mem[sp+1] = (next_pc & 0xff00) >> 8;
- State.mem[sp+2] = (next_pc & 0xff0000) >> 16;
- State.mem[sp+3] = (next_pc & 0xff000000) >> 24;
- State.regs[REG_MDR] = next_pc;
- State.regs[REG_PC] += SEXT16 (insn & 0xffff) - 4;
-}
-
-/* calls label:32 */
-void OP_FCFF0000 (insn, extension)
- unsigned long insn, extension;
-{
- unsigned int next_pc, sp;
-
- sp = State.regs[REG_SP];
- next_pc = State.regs[REG_PC] + 6;
- State.mem[sp] = next_pc & 0xff;
- State.mem[sp+1] = (next_pc & 0xff00) >> 8;
- State.mem[sp+2] = (next_pc & 0xff0000) >> 16;
- State.mem[sp+3] = (next_pc & 0xff000000) >> 24;
- State.regs[REG_MDR] = next_pc;
- State.regs[REG_PC] += (((insn & 0xffff) << 16) + extension) - 6;
-}
-
-/* ret reg_list, imm8 */
-void OP_DF0000 (insn, extension)
- unsigned long insn, extension;
-{
- unsigned int sp, offset;
- unsigned long mask;
-
- State.regs[REG_SP] += insn & 0xff;
- sp = State.regs[REG_SP];
-
- offset = -4;
- mask = (insn & 0xff00) >> 8;
-
- if (mask & 0x80)
- {
- State.regs[REG_D0 + 2] = load_word (sp + offset);
- offset -= 4;
- }
-
- if (mask & 0x40)
- {
- State.regs[REG_D0 + 3] = load_word (sp + offset);
- offset -= 4;
- }
-
- if (mask & 0x20)
- {
- State.regs[REG_A0 + 2] = load_word (sp + offset);
- offset -= 4;
- }
-
- if (mask & 0x10)
- {
- State.regs[REG_A0 + 3] = load_word (sp + offset);
- offset -= 4;
- }
-
- if (mask & 0x8)
- {
- State.regs[REG_D0] = load_word (sp + offset);
- offset -= 4;
- State.regs[REG_D0 + 1] = load_word (sp + offset);
- offset -= 4;
- State.regs[REG_A0] = load_word (sp + offset);
- offset -= 4;
- State.regs[REG_A0 + 1] = load_word (sp + offset);
- offset -= 4;
- State.regs[REG_MDR] = load_word (sp + offset);
- offset -= 4;
- State.regs[REG_LIR] = load_word (sp + offset);
- offset -= 4;
- State.regs[REG_LAR] = load_word (sp + offset);
- offset -= 4;
- }
-
- /* Restore the PC value. */
- State.regs[REG_PC] = (State.mem[sp] | (State.mem[sp+1] << 8)
- | (State.mem[sp+2] << 16) | (State.mem[sp+3] << 24));
- State.regs[REG_PC] -= 3;
-}
-
-/* retf reg_list,imm8 */
-void OP_DE0000 (insn, extension)
- unsigned long insn, extension;
-{
- unsigned int sp, offset;
- unsigned long mask;
-
- State.regs[REG_SP] += (insn & 0xff);
- sp = State.regs[REG_SP];
- State.regs[REG_PC] = State.regs[REG_MDR] - 3;
-
- offset = -4;
- mask = (insn & 0xff00) >> 8;
-
- if (mask & 0x80)
- {
- State.regs[REG_D0 + 2] = load_word (sp + offset);
- offset -= 4;
- }
-
- if (mask & 0x40)
- {
- State.regs[REG_D0 + 3] = load_word (sp + offset);
- offset -= 4;
- }
-
- if (mask & 0x20)
- {
- State.regs[REG_A0 + 2] = load_word (sp + offset);
- offset -= 4;
- }
-
- if (mask & 0x10)
- {
- State.regs[REG_A0 + 3] = load_word (sp + offset);
- offset -= 4;
- }
-
- if (mask & 0x8)
- {
- State.regs[REG_D0] = load_word (sp + offset);
- offset -= 4;
- State.regs[REG_D0 + 1] = load_word (sp + offset);
- offset -= 4;
- State.regs[REG_A0] = load_word (sp + offset);
- offset -= 4;
- State.regs[REG_A0 + 1] = load_word (sp + offset);
- offset -= 4;
- State.regs[REG_MDR] = load_word (sp + offset);
- offset -= 4;
- State.regs[REG_LIR] = load_word (sp + offset);
- offset -= 4;
- State.regs[REG_LAR] = load_word (sp + offset);
- offset -= 4;
- }
-}
-
-/* rets */
-void OP_F0FC (insn, extension)
- unsigned long insn, extension;
-{
- unsigned int sp;
-
- sp = State.regs[REG_SP];
- State.regs[REG_PC] = (State.mem[sp] | (State.mem[sp+1] << 8)
- | (State.mem[sp+2] << 16) | (State.mem[sp+3] << 24));
- State.regs[REG_PC] -= 2;
-}
-
-/* rti */
-void OP_F0FD (insn, extension)
- unsigned long insn, extension;
-{
- unsigned int sp, next_pc;
-
- sp = State.regs[REG_SP];
- PSW = State.mem[sp] | (State.mem[sp + 1] << 8);
- State.regs[REG_PC] = (State.mem[sp+4] | (State.mem[sp+5] << 8)
- | (State.mem[sp+6] << 16) | (State.mem[sp+7] << 24));
- State.regs[REG_SP] += 8;
-}
-
-/* trap */
-void OP_F0FE (insn, extension)
- unsigned long insn, extension;
-{
- unsigned int sp, next_pc;
-
- sp = State.regs[REG_SP];
- next_pc = State.regs[REG_PC] + 2;
- State.mem[sp] = next_pc & 0xff;
- State.mem[sp+1] = (next_pc & 0xff00) >> 8;
- State.mem[sp+2] = (next_pc & 0xff0000) >> 16;
- State.mem[sp+3] = (next_pc & 0xff000000) >> 24;
- State.regs[REG_PC] = 0x40000010 - 2;
-}
-
-/* syscall */
-void OP_F0C0 (insn, extension)
- unsigned long insn, extension;
-{
- /* We use this for simulated system calls; we may need to change
- it to a reserved instruction if we conflict with uses at
- Matsushita. */
- int save_errno = errno;
- errno = 0;
-
-/* Registers passed to trap 0 */
-
-/* Function number. */
-#define FUNC (State.regs[0])
-
-/* Parameters. */
-#define PARM1 (State.regs[1])
-#define PARM2 (load_word (State.regs[REG_SP] + 12))
-#define PARM3 (load_word (State.regs[REG_SP] + 16))
-
-/* Registers set by trap 0 */
-
-#define RETVAL State.regs[0] /* return value */
-#define RETERR State.regs[1] /* return error code */
-
-/* Turn a pointer in a register into a pointer into real memory. */
-
-#define MEMPTR(x) (State.mem + x)
-
- switch (FUNC)
- {
-#if !defined(__GO32__) && !defined(_WIN32)
-#ifdef TARGET_SYS_fork
- case TARGET_SYS_fork:
- RETVAL = fork ();
- break;
-#endif
-#ifdef TARGET_SYS_execve
- case TARGET_SYS_execve:
- RETVAL = execve (MEMPTR (PARM1), (char **) MEMPTR (PARM2),
- (char **)MEMPTR (PARM3));
- break;
-#endif
-#ifdef TARGET_SYS_execv
- case TARGET_SYS_execv:
- RETVAL = execve (MEMPTR (PARM1), (char **) MEMPTR (PARM2), NULL);
- break;
-#endif
-#endif /* ! GO32 and ! WIN32 */
-
- case TARGET_SYS_read:
- RETVAL = mn10300_callback->read (mn10300_callback, PARM1,
- MEMPTR (PARM2), PARM3);
- break;
- case TARGET_SYS_write:
- RETVAL = (int)mn10300_callback->write (mn10300_callback, PARM1,
- MEMPTR (PARM2), PARM3);
- break;
- case TARGET_SYS_lseek:
- RETVAL = mn10300_callback->lseek (mn10300_callback, PARM1, PARM2, PARM3);
- break;
- case TARGET_SYS_close:
- RETVAL = mn10300_callback->close (mn10300_callback, PARM1);
- break;
- case TARGET_SYS_open:
- RETVAL = mn10300_callback->open (mn10300_callback, MEMPTR (PARM1), PARM2);
- break;
- case TARGET_SYS_exit:
- /* EXIT - caller can look in PARM1 to work out the
- reason */
- if (PARM1 == 0xdead)
- State.exception = SIGABRT;
- else
- State.exception = SIGQUIT;
- State.exited = 1;
- break;
-
- case TARGET_SYS_stat: /* added at hmsi */
- /* stat system call */
- {
- struct stat host_stat;
- reg_t buf;
-
- RETVAL = stat (MEMPTR (PARM1), &host_stat);
-
- buf = PARM2;
-
- /* Just wild-assed guesses. */
- store_half (buf, host_stat.st_dev);
- store_half (buf + 2, host_stat.st_ino);
- store_word (buf + 4, host_stat.st_mode);
- store_half (buf + 8, host_stat.st_nlink);
- store_half (buf + 10, host_stat.st_uid);
- store_half (buf + 12, host_stat.st_gid);
- store_half (buf + 14, host_stat.st_rdev);
- store_word (buf + 16, host_stat.st_size);
- store_word (buf + 20, host_stat.st_atime);
- store_word (buf + 28, host_stat.st_mtime);
- store_word (buf + 36, host_stat.st_ctime);
- }
- break;
-
-#ifdef TARGET_SYS_chown
- case TARGET_SYS_chown:
- RETVAL = chown (MEMPTR (PARM1), PARM2, PARM3);
- break;
-#endif
- case TARGET_SYS_chmod:
- RETVAL = chmod (MEMPTR (PARM1), PARM2);
- break;
-#ifdef TARGET_SYS_time
- case TARGET_SYS_time:
- RETVAL = time ((void*) MEMPTR (PARM1));
- break;
-#endif
-#ifdef TARGET_SYS_times
- case TARGET_SYS_times:
- {
- struct tms tms;
- RETVAL = times (&tms);
- store_word (PARM1, tms.tms_utime);
- store_word (PARM1 + 4, tms.tms_stime);
- store_word (PARM1 + 8, tms.tms_cutime);
- store_word (PARM1 + 12, tms.tms_cstime);
- break;
- }
-#endif
-#ifdef TARGET_SYS_gettimeofday
- case TARGET_SYS_gettimeofday:
- {
- struct timeval t;
- struct timezone tz;
- RETVAL = gettimeofday (&t, &tz);
- store_word (PARM1, t.tv_sec);
- store_word (PARM1 + 4, t.tv_usec);
- store_word (PARM2, tz.tz_minuteswest);
- store_word (PARM2 + 4, tz.tz_dsttime);
- break;
- }
-#endif
-#ifdef TARGET_SYS_utime
- case TARGET_SYS_utime:
- /* Cast the second argument to void *, to avoid type mismatch
- if a prototype is present. */
- RETVAL = utime (MEMPTR (PARM1), (void *) MEMPTR (PARM2));
- break;
-#endif
- default:
- abort ();
- }
- RETERR = errno;
- errno = save_errno;
-}
-
-/* rtm */
-void OP_F0FF (insn, extension)
- unsigned long insn, extension;
-{
- abort ();
-}
-
-/* nop */
-void OP_CB (insn, extension)
- unsigned long insn, extension;
-{
-}
-
-/* putx dm,dm */
-void OP_F500 (insn, extension)
- unsigned long insn, extension;
-{
- State.regs[REG_MDRQ] = State.regs[REG_D0 + REG0 (insn)];
-}
-
-/* getx dm,dm */
-void OP_F6F0 (insn, extension)
- unsigned long insn, extension;
-{
- int z, n;
- z = (State.regs[REG_MDRQ] == 0);
- n = ((State.regs[REG_MDRQ] & 0x80000000) != 0);
- State.regs[REG_D0 + REG0 (insn)] = State.regs[REG_MDRQ];
-
- PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
- PSW |= (z ? PSW_Z : 0) | (n ? PSW_N : 0);
-}
-
-/* mulq dm,dn */
-void OP_F600 (insn, extension)
- unsigned long insn, extension;
-{
- unsigned long long temp;
- int n, z;
-
- temp = ((signed64)(signed32)State.regs[REG_D0 + REG0 (insn)]
- * (signed64)(signed32)State.regs[REG_D0 + REG1 (insn)]);
- State.regs[REG_D0 + REG0 (insn)] = temp & 0xffffffff;
- State.regs[REG_MDRQ] = (temp & 0xffffffff00000000LL) >> 32;;
- z = (State.regs[REG_D0 + REG0 (insn)] == 0);
- n = (State.regs[REG_D0 + REG0 (insn)] & 0x80000000) != 0;
- PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
- PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0));
-}
-
-/* mulq imm8,dn */
-void OP_F90000 (insn, extension)
- unsigned long insn, extension;
-{
- unsigned long long temp;
- int n, z;
-
- temp = ((signed64)(signed32)State.regs[REG_D0 + REG0_8 (insn)]
- * (signed64)(signed32)SEXT8 (insn & 0xff));
- State.regs[REG_D0 + REG0_8 (insn)] = temp & 0xffffffff;
- State.regs[REG_MDRQ] = (temp & 0xffffffff00000000LL) >> 32;;
- z = (State.regs[REG_D0 + REG0_8 (insn)] == 0);
- n = (State.regs[REG_D0 + REG0_8 (insn)] & 0x80000000) != 0;
- PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
- PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0));
-}
-
-/* mulq imm16,dn */
-void OP_FB000000 (insn, extension)
- unsigned long insn, extension;
-{
- unsigned long long temp;
- int n, z;
-
- temp = ((signed64)(signed32)State.regs[REG_D0 + REG0_16 (insn)]
- * (signed64)(signed32)SEXT16 (insn & 0xffff));
- State.regs[REG_D0 + REG0_16 (insn)] = temp & 0xffffffff;
- State.regs[REG_MDRQ] = (temp & 0xffffffff00000000LL) >> 32;;
- z = (State.regs[REG_D0 + REG0_16 (insn)] == 0);
- n = (State.regs[REG_D0 + REG0_16 (insn)] & 0x80000000) != 0;
- PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
- PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0));
-}
-
-/* mulq imm32,dn */
-void OP_FD000000 (insn, extension)
- unsigned long insn, extension;
-{
- unsigned long long temp;
- int n, z;
-
- temp = ((signed64)(signed32)State.regs[REG_D0 + REG0_16 (insn)]
- * (signed64)(signed32)(((insn & 0xffff) << 16) + extension));
- State.regs[REG_D0 + REG0_16 (insn)] = temp & 0xffffffff;
- State.regs[REG_MDRQ] = (temp & 0xffffffff00000000LL) >> 32;;
- z = (State.regs[REG_D0 + REG0_16 (insn)] == 0);
- n = (State.regs[REG_D0 + REG0_16 (insn)] & 0x80000000) != 0;
- PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
- PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0));
-}
-
-/* mulqu dm,dn */
-void OP_F610 (insn, extension)
- unsigned long insn, extension;
-{
- unsigned long long temp;
- int n, z;
-
- temp = ((unsigned64) State.regs[REG_D0 + REG0 (insn)]
- * (unsigned64) State.regs[REG_D0 + REG1 (insn)]);
- State.regs[REG_D0 + REG0 (insn)] = temp & 0xffffffff;
- State.regs[REG_MDRQ] = (temp & 0xffffffff00000000LL) >> 32;;
- z = (State.regs[REG_D0 + REG0 (insn)] == 0);
- n = (State.regs[REG_D0 + REG0 (insn)] & 0x80000000) != 0;
- PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
- PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0));
-}
-
-/* mulqu imm8,dn */
-void OP_F91400 (insn, extension)
- unsigned long insn, extension;
-{
- unsigned long long temp;
- int n, z;
-
- temp = ((unsigned64)State.regs[REG_D0 + REG0_8 (insn)]
- * (unsigned64)SEXT8 (insn & 0xff));
- State.regs[REG_D0 + REG0_8 (insn)] = temp & 0xffffffff;
- State.regs[REG_MDRQ] = (temp & 0xffffffff00000000LL) >> 32;;
- z = (State.regs[REG_D0 + REG0_8 (insn)] == 0);
- n = (State.regs[REG_D0 + REG0_8 (insn)] & 0x80000000) != 0;
- PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
- PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0));
-}
-
-/* mulqu imm16,dn */
-void OP_FB140000 (insn, extension)
- unsigned long insn, extension;
-{
- unsigned long long temp;
- int n, z;
-
- temp = ((unsigned64)State.regs[REG_D0 + REG0_16 (insn)]
- * (unsigned64) SEXT16 (insn & 0xffff));
- State.regs[REG_D0 + REG0_16 (insn)] = temp & 0xffffffff;
- State.regs[REG_MDRQ] = (temp & 0xffffffff00000000LL) >> 32;;
- z = (State.regs[REG_D0 + REG0_16 (insn)] == 0);
- n = (State.regs[REG_D0 + REG0_16 (insn)] & 0x80000000) != 0;
- PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
- PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0));
-}
-
-/* mulqu imm32,dn */
-void OP_FD140000 (insn, extension)
- unsigned long insn, extension;
-{
- unsigned long long temp;
- int n, z;
-
- temp = ((unsigned64)State.regs[REG_D0 + REG0_16 (insn)]
- * (unsigned64)(((insn & 0xffff) << 16) + extension));
- State.regs[REG_D0 + REG0_16 (insn)] = temp & 0xffffffff;
- State.regs[REG_MDRQ] = (temp & 0xffffffff00000000LL) >> 32;;
- z = (State.regs[REG_D0 + REG0_16 (insn)] == 0);
- n = (State.regs[REG_D0 + REG0_16 (insn)] & 0x80000000) != 0;
- PSW &= ~(PSW_Z | PSW_N | PSW_C | PSW_V);
- PSW |= ((z ? PSW_Z : 0) | (n ? PSW_N : 0));
-}
-
-/* sat16 dm,dn */
-void OP_F640 (insn, extension)
- unsigned long insn, extension;
-{
- int temp;
-
- temp = State.regs[REG_D0 + REG1 (insn)];
- temp = (temp > 0x7fff ? 0x7fff : temp);
- temp = (temp < -0x8000 ? -0x8000 : temp);
- State.regs[REG_D0 + REG0 (insn)] = temp;
-}
-
-/* sat24 dm,dn */
-void OP_F650 (insn, extension)
- unsigned long insn, extension;
-{
- int temp;
-
- temp = State.regs[REG_D0 + REG1 (insn)];
- temp = (temp > 0x7fffff ? 0x7fffff : temp);
- temp = (temp < -0x800000 ? -0x800000 : temp);
- State.regs[REG_D0 + REG0 (insn)] = temp;
-}
-
-/* bsch dm,dn */
-void OP_F670 (insn, extension)
- unsigned long insn, extension;
-{
- int temp, c;
-
- temp = State.regs[REG_D0 + REG1 (insn)];
- temp <<= (State.regs[REG_D0 + REG0 (insn)] & 0x1f);
- c = (temp != 0 ? 1 : 0);
- PSW &= ~(PSW_C);
- PSW |= (c ? PSW_C : 0);
-}
-
-/* breakpoint */
-void
-OP_FF (insn, extension)
- unsigned long insn, extension;
-{
- State.exception = SIGTRAP;
- PC -= 1;
-}
-
diff --git a/sim/mn10300/tconfig.in b/sim/mn10300/tconfig.in
deleted file mode 100644
index 521b6e77694..00000000000
--- a/sim/mn10300/tconfig.in
+++ /dev/null
@@ -1,26 +0,0 @@
-/* mn10300 target configuration file. */
-
-/* FIXME: This is unnecessarily necessary: */
-#include "ansidecl.h"
-#include "callback.h"
-#include "remote-sim.h"
-#include "sim-module.h"
-
-MODULE_INSTALL_FN dv_sockser_install;
-#define MODULE_LIST dv_sockser_install,
-
-/* Define this if the simulator supports profiling.
- See the mips simulator for an example.
- This enables the `-p foo' and `-s bar' options.
- The target is required to provide sim_set_profile{,_size}. */
-/* #define SIM_HAVE_PROFILE */
-
-/* Define this if the simulator uses an instruction cache.
- See the h8/300 simulator for an example.
- This enables the `-c size' option to set the size of the cache.
- The target is required to provide sim_set_simcache_size. */
-/* #define SIM_HAVE_SIMCACHE */
-
-/* Define this if the target cpu is bi-endian
- and the simulator supports it. */
-/* #define SIM_HAVE_BIENDIAN */
diff --git a/sim/ppc/.gdbinit b/sim/ppc/.gdbinit
deleted file mode 100644
index e1e62d62a8c..00000000000
--- a/sim/ppc/.gdbinit
+++ /dev/null
@@ -1,2 +0,0 @@
-set output-radix 16
-break error
diff --git a/sim/ppc/BUGS b/sim/ppc/BUGS
deleted file mode 100644
index 362b079e90c..00000000000
--- a/sim/ppc/BUGS
+++ /dev/null
@@ -1,123 +0,0 @@
-ChangeLog
-
-See the ChangeLog file looking for lines taged with the word FIXME.
-
-
-COREFILE.C:
-
-The implementation of corefile.c (defined by corefile.h) isn't the
-best. It is intended to be functionaly correct rather than fast. One
-option being considered is to add a data cache to reduce the overhead
-of the most common case of data read/writes.
-
-
-VEA:
-
-Missing VEA system calls.
-
-ppc-instructions:
-
-Missing or commented out instructions.
-
-
-64bit:
-
-64bit target untested. 64bit host broken. For instance use of scanf
-"%x", &long long.
-
-
-
-hw_*.c:
-
-Better and more devices.
-
-PORTABILITY:
-
-(Notes taken from Michael Meissner): Heavy use of the ## operator -
-fix using the clasic X/**/Y hack; Use of the signed keyword. In
-particular, signed char has no analogue in classic C (though most
-implementations of classic C use signed chars); Use of long long which
-restricts the target compiler to be GCC.
-
-
-TRACING:
-
-debug.c: Macro's should be extended to include:
-
- IS_*TRACE: True if tracing enabled
- *TRACE_PREFIX: Outputs just the prefix line
-
-hw_trace.c: Flush, replace with a psim_set_tracing or some
- such program.
-
-
-CIA/NIA:
-
-Replace with functions to return/increment the CIA?
-
-
-
-SMP & GDB:
-
-GDB doesn't understand SMP!
-
-
-
-
-OVERALL STRUCTURE:
-
-A new file pstruct.h is to be created that contains a single flat data
-structure containing:
-
- pstruct {
- events;
- core;
- processor[nr_cpus];
- monitor;
- devices;
- trace;
- }
-
-The CPU's structure, in turn would contain the VM sub structures.
-
-When SMP==0, everything would have PSTRUCT passed. In SMP mode,
-however, there are two choices: PSTRUCT + CPU_NR or PROCESSOR. I
-suspect the latter is better.
-
-It is believed that this would significantly improve performance (at
-the price of reduced control over object scope).
-
-
-
-
-IGEN:
-
-Igen at present can't do the following:
-
- o duplication is an all or nothing afair.
-
- It should be configurable according to
- the instruction or the sub-table.
-
-
- o Due to the naming, only a single generated
- simulator can be included in a program.
-
- IGEN should be able to generate multiple
- engines that can all be included in a program
-
- o handle alternate architectures.
-
-
- o Igen should support the generation of a
- disasembler and posibly an assembler.
-
- I suggest that the table be extended to
- include, for each instruction, additional
- lines describing the extual format of the
- instruction.
-
- One possible format is:
-
- "mtlr %RS":SPR.something
- "mtspr %SPR, %RS"
diff --git a/sim/ppc/COPYING b/sim/ppc/COPYING
deleted file mode 100644
index 60549be514a..00000000000
--- a/sim/ppc/COPYING
+++ /dev/null
@@ -1,340 +0,0 @@
- GNU GENERAL PUBLIC LICENSE
- Version 2, June 1991
-
- Copyright (C) 1989, 1991 Free Software Foundation, Inc.
- 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- Everyone is permitted to copy and distribute verbatim copies
- of this license document, but changing it is not allowed.
-
- Preamble
-
- The licenses for most software are designed to take away your
-freedom to share and change it. By contrast, the GNU General Public
-License is intended to guarantee your freedom to share and change free
-software--to make sure the software is free for all its users. This
-General Public License applies to most of the Free Software
-Foundation's software and to any other program whose authors commit to
-using it. (Some other Free Software Foundation software is covered by
-the GNU Library General Public License instead.) You can apply it to
-your programs, too.
-
- When we speak of free software, we are referring to freedom, not
-price. Our General Public Licenses are designed to make sure that you
-have the freedom to distribute copies of free software (and charge for
-this service if you wish), that you receive source code or can get it
-if you want it, that you can change the software or use pieces of it
-in new free programs; and that you know you can do these things.
-
- To protect your rights, we need to make restrictions that forbid
-anyone to deny you these rights or to ask you to surrender the rights.
-These restrictions translate to certain responsibilities for you if you
-distribute copies of the software, or if you modify it.
-
- For example, if you distribute copies of such a program, whether
-gratis or for a fee, you must give the recipients all the rights that
-you have. You must make sure that they, too, receive or can get the
-source code. And you must show them these terms so they know their
-rights.
-
- We protect your rights with two steps: (1) copyright the software, and
-(2) offer you this license which gives you legal permission to copy,
-distribute and/or modify the software.
-
- Also, for each author's protection and ours, we want to make certain
-that everyone understands that there is no warranty for this free
-software. If the software is modified by someone else and passed on, we
-want its recipients to know that what they have is not the original, so
-that any problems introduced by others will not reflect on the original
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-
- Finally, any free program is threatened constantly by software
-patents. We wish to avoid the danger that redistributors of a free
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-program proprietary. To prevent this, we have made it clear that any
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-
- The precise terms and conditions for copying, distribution and
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-
- GNU GENERAL PUBLIC LICENSE
- TERMS AND CONDITIONS FOR COPYING, DISTRIBUTION AND MODIFICATION
-
- 0. This License applies to any program or other work which contains
-a notice placed by the copyright holder saying it may be distributed
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-Activities other than copying, distribution and modification are not
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-You may charge a fee for the physical act of transferring a copy, and
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- Gnomovision version 69, Copyright (C) 19yy name of author
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- This is free software, and you are welcome to redistribute it
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diff --git a/sim/ppc/COPYING.LIB b/sim/ppc/COPYING.LIB
deleted file mode 100644
index eb685a5ec98..00000000000
--- a/sim/ppc/COPYING.LIB
+++ /dev/null
@@ -1,481 +0,0 @@
- GNU LIBRARY GENERAL PUBLIC LICENSE
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-That's all there is to it!
diff --git a/sim/ppc/ChangeLog b/sim/ppc/ChangeLog
deleted file mode 100644
index 2b9e6669a57..00000000000
--- a/sim/ppc/ChangeLog
+++ /dev/null
@@ -1,3270 +0,0 @@
-Wed Mar 7 10:45:12 HST 2001 Glen Nakamura <gen@lava.net>
-
- * hw_init.c (dma_file): Fixed problem with loading last 1KB of
- file.
-
-2001-03-04 Andrew Cagney <ac131313@redhat.com>
-
- * emul_netbsd.c [WITH_NetBSD_HOST]: Include <sys/mount.h> and
- <errno.h>.
- (do_stat): Only do SYS test when SYS_stat defined.
- (do_sigprocmask): Ditto for SYS_sigprocmask.
- (do_fstat): Ditto for SYS_fstat.
- (do_getdirentries): Ditto for SYS_getdirentries.
- (do_lstat): Ditto for SYS_lstat.
-
-2001-01-15 Geoffrey Keating <geoffk@redhat.com>
-
- * emul_netbsd.c (do_open): Translate the flag parameter to the
- open syscall to the numbers supported by the host.
-
-2000-12-12 Geoffrey Keating <geoffk@redhat.com>
-
- * sim-endian.h: Don't have parameters on macro definitions which
- are simply renaming functions, to permit use of XCONCAT2 in both
- the macro name and the arguments in a use of such a definition.
-
-2000-11-15 Jim Blandy <jimb@redhat.com>
-
- * sim_calls.c: Doc fix.
- (sim_fetch_register, sim_store_register): Call
- gdbarch_register_name directly, instead of going through
- REGISTER_NAME macro.
-
-2000-10-24 Geoff Keating <geoffk@cygnus.com>
-
- * ppc-instructions (lfsux): Correct XO field of lfsux instruction.
-
-Tue May 23 21:39:23 2000 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Fri Apr 28 15:59:27 2000 Andrew Cagney <cagney@b1.cygnus.com>
-
- * events.c (event_queue_process): Call update_time_from_event
- every time an event is removed from the queue.
- (update_time_from_event): Delete assertion that a negative
- time_from_event implies an empty event queue.
-
-Fri Apr 28 15:53:54 2000 Andrew Cagney <cagney@b1.cygnus.com>
-
- * interrupts.c (deliver_hardware_interrupt): Print time trace in
- decimal.
- * events.c (event_queue_process): Cleanup trace message.
- (update_time_from_event): Trace full event queue.
-
-2000-03-25 Geoff Keating <geoffk@cygnus.com>
-
- * ppc-instructions (Disabled_Exponent_Underflow): Increment
- the exponent when denormalizing.
-
-Thu Sep 2 18:15:53 1999 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-1999-05-08 Felix Lee <flee@cygnus.com>
-
- * configure.in: Use AC_EXEEXT instead of AM_EXEEXT.
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-1999-04-02 Keith Seitz <keiths@cygnus.com>
-
- * sim_calls.c (POLL_QUIT_INTERVAL): Define. Used to tweak
- the frequency at which the poll_quit callback is called.
- (poll_quit_count): New global.
- (sim_io_poll_quit): Only call the poll_quit callback
- after the specified POLL_QUIT_INTERVAL.
-
-1999-02-22 Jim Lemke <jlemke@cygnus.com>
-
- * dc-complex: Force expansion on all bits of field BO.
- Previously, the least-significant (prediction) bit was ignored.
- * ppc-instructions (conditional branches): Implement mpc860c0 option.
- * igen.c (gen_semantics_[ch]): Setup for mpc860c0 option.
- * psim.c (is_num, psim_options): Added parsing for mpc860c0 option.
- * interrupts.h: Added "mpc860c0_instruction_program_interrupt".
- * interrupts.c (program_interrupt): Added handling for above interrupt.
-
-1999-02-01 Jim Blandy <jimb@zwingli.cygnus.com>
-
- Make the simulator compatible with the MPC750. It would be nicer
- to make this a real multi-sim, but that's more work than we have
- time for.
- * emul_generic.c (emul_add_tree_options): Only require strict
- alignment if it was explicitly requested at configuration time.
- Don't make it the default for little-endian machines.
- * ppc-spr-table (UMMCR0, UMMCR1, UPMC1, UPMC2, USIA, UPMC3, UPMC4,
- MMCR0, PMC1, PMC2, SIA, MMCR1, PMC3, PMC4, L2CR, ICTC, THRM1,
- THRM2, THRM3): Plop in the MPC750 SPR registers.
- (DABR): This is weird. This was HID5, but the PPC spec says this
- should be DABR; why did some random processor use it for something
- else? The HID5 entry dates back to the original checkin of the
- simulator code in 1995, so remove it.
- * sim_calls.c (register_names): Delete this; since the user can
- now change GDB's list of register names dynamically, we can't
- pretend there's a static mapping here.
- (sim_fetch_register, sim_store_register): Call GDB's REGISTER_NAME
- function to get the register name. That ought to be accurate.
- However, we're changing a compile-time dependency (using the
- REGISTER_NAMES macro) into a link- and run-time dependency
- (calling REGISTER_NAME, which happens to be a function call on the
- PPC).
-
-1999-01-22 Jim Lemke <jlemke@cygnus.com>
-
- * igen.c(gen_semantics_[ch]): setup/use of new option
- (-o mpc860c0[=n]).
- interrupts.[ch](mpc860c0_instruction_program_interrupt): added.
- ppc-instructions(the four branch insn groups): detect problematic br's.
- psim.c(is_num - added, psim_options): Parse and init new option.
- These changes are currently under #ifdef WITH_OPTION_MPC860C0.
-
-1998-12-01 Ken Raeburn <raeburn@cygnus.com>
-
- * hw_nvram.c (hw_nvram_bcd): Force value to fit in 0..99.
-
-Fri Nov 20 12:17:28 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * main.c (sim_io_poll_quit): Stub function.
-
- * events.c (SIM_EVENTS_POLL_RATE): Define.
- (sim_events_poll): Copy function from common/sim-events.c.
- (event_queue_init): Copy scheduling of sim_events_poll from same.
-
- * sim_callbacks.h, sim_calls.c (sim_io_poll_quit): New function,
- poll the external environment.
-
-1998-11-19 Michael Meissner <meissner@cygnus.com>
-
- * ppc-instructions (is_{NaN,inf}): Use unsigned64 to get the
- fractional type, so that quiet NaN's aren't treated like
- Infinities.
-
-Mon Sep 28 09:42:45 1998 Drew Moseley <dmoseley@cygnus.com>
-
- * table.c (table_open): For cygwin hosts, we need to use the
- return value from the read routine as the number of bytes to
- process. This apparently is due to text-mode vs binary-mode. If
- the mounts are done text-mode, then the size returnedby fstat()
- may be different than the number of bytes "read" in text mode.
-
-Sun Oct 4 00:50:47 1998 Felix Lee <flee@cygnus.com>
-
- * emul_netbsd.c (do_open): fix order-of-evaluation problem.
- (do_close): ditto.
- (do_fstat): ditto.
- (do_lstat): ditto.
-
-1998-09-03 Michael Meissner <meissner@cygnus.com>
-
- * emul_{netbsd,unix}.c: Update copyright year.
-
-Mon Jun 29 10:57:36 1998 Michael Snyder <msnyder@cleaver.cygnus.com>
-
- * sim_calls.c (sim_fetch_register, sim_store_register):
- return zero when nothing to do.
-
-1998-06-26 Michael Meissner <meissner@cygnus.com>
-
- * configure.in (AC_CHECK_HEADERS): Don't check for sys/mount.h.
- * configure: Regenerate.
- * emul_{netbsd,unix}.c (toplevel): No longer try to include
- sys/mount.h. It conflicts on Linux when gnu libc2 is used.
-
-Tue May 12 12:10:33 PDT 1998 James Ingham <jingham@leda.cygnus.com>
-
- * Makefile.in: The run target depended on a target psim$(EXEEXT),
- but there was no such target, only plain psim. So I changed the
- run target to depend on psim.
-
-Sat May 2 01:10:12 1998 Stu Grossman <grossman@babylon-5.cygnus.com>
-
- * aclocal.m4: Remove defs of AM_EXEEXT and AM_CYGWIN32. These are
- now defined in ../common/aclocal.m4, and the double definition causes
- problems with AC_SUBST of EXEEXT.
- * configure: Regenerate.
-
-Wed Apr 29 15:44:52 1998 Geoffrey Noer <noer@cygnus.com>
-
- * aclocal.m4: new file for AM_EXEEXT macro
- * configure.in: call AM_EXEEXT
- * configure: regenerate with autoconf 2.12.1.
- * Makefile.in: add EXEEXT support
-
-Sun Apr 26 15:31:55 1998 Tom Tromey <tromey@creche>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
- * config.in: Ditto.
-
-Sun Apr 26 15:19:51 1998 Tom Tromey <tromey@cygnus.com>
-
- * acconfig.h: New file.
- * configure.in: Reverted change of Apr 24; use sinclude again.
- Don't call AC_C_CROSS.
-
-Fri Apr 24 14:16:40 1998 Tom Tromey <tromey@creche>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
- * config.in: Ditto.
-
-Fri Apr 24 11:18:46 1998 Tom Tromey <tromey@cygnus.com>
-
- * Makefile.in (top_builddir): New macro.
- (INTLLIBS): New macro.
- (INTLDEPS): Likewise.
- (psim): Depend on INTLDEPS; link against INTLLIBS.
- * configure.in: Call CY_GNU_GETTEXT.
-
-Wed Apr 22 14:28:48 1998 Michael Meissner <meissner@cygnus.com>
-
- * configure: Regenerate with autoconf 2.12.1.
-
-Fri Mar 13 09:25:58 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * psim.c (psim_read_register, psim_write_register): Handle updates
- for FPSCR.
-
- * registers.c (register_description): Reconize "FPSCR".
-
- * emul_netbsd.c (emul_netbsd_create): When FP available, enable
- MSR FP exception mode. Do not enable FPSCR bits.
- * emul_unix.c (emul_unix_create): Ditto.
-
-Tue Feb 17 12:48:58 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim_calls.c (sim_store_register, sim_fetch_register): Pass in
- length parameter. Return -1.
-
-Mon Feb 9 14:13:14 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * ppc-instructions (fdiv, fdivs): Check for divide by zero.
- (is_invalid_zero_divide, invalid_zero_divide_operation): New
- functions.
-
-Wed Dec 10 17:38:28 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim_calls.c (sim_load): Do not parse PROG using buildargv, use
- raw value instead.
-
-1997-11-05 Felix Lee <flee@cygnus.com>
-
- * emul_chirp.c: #ifdef HAVE_UNISTD_H
-
-Wed Oct 15 08:50:54 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * corefile.c (core_attach): Pad out allocated memory regions so
- that they are always correctly aligned.
- (struct _core_mapping, core_map_attach, core_init,
- new_core_mapping): Change free_buffer to type void*.
-
-Mon Oct 6 18:09:26 1997 Michael Meissner <meissner@cygnus.com>
-
- * sim_calls.c (zfree): Call free correctly.
-
-Mon Sep 29 10:05:01 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim_calls.c (zfree): Use free, not mfree.
- (sim_io_flush_stdoutput): Replace gdb_flush with callback ->
- flush_stdout.
-
-Fri Sep 26 09:50:29 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * ppc-instructions (sraw, slw, srw): From Charles Lefurgy, Fix
- mask extracting shift amount. Correctly condition for setting XER
- in sraw.
- (ldhau): From Johannes Reisinger, update rA after load.
-
-Tue Sep 9 22:13:23 1997 Felix Lee <flee@cygnus.com>
-
- * basics.h (CONCAT*): token-pasting macros, if ALMOST_STDC,
- for MSVC.
- * words.h: __int64 instead of long long for MSVC.
-
-Wed Aug 27 10:24:15 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim_calls.c (sim_create_inferior): Check the simulator was
- initialized before creating inferior.
-
- * idecode_expression.h (ALU_END): From Charles Lefurgy - Extract
- sign bit using 64 bit and not a 32 bit mask.
-
-Wed Aug 27 10:15:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim_calls.c (sim_load): From Ian Lance Taylor - free argv after
- it has been used, not before.
-
-Tue Aug 26 10:41:35 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim_calls.c (sim_kill): Delete.
- (sim_create_inferior): Add ABFD argument.
- (entry_point): Delete variable.
- (sim_load): Move setting of PC from here.
- (sim_create_inferior): To here.
-
-Mon Aug 25 16:17:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim_calls.c (sim_open): Add ABFD argument.
-
-Thu Jul 3 10:18:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * ppc-instructions (PPC_INSN_INT): From Michael Thies - Monitoring
- CR register updates dependant on RC value had logic backwards.
-
- * ppc-instructions (Load String Word Immediate): From Brad Parker
- - sense of wrap test in check for overwriting RA wrong.
- (Load String Word Indexed): Ditto.
-
- * configure.in: From Erik Landry - set sim_default_model not
- sim_model for sim-default-model option.
- * configure: Regenerate.
-
- * interrupts.c (check_masked_interrupts): Schedule a hardware
- interrupt delivery when FP interrupts get enabled.
- (program_interrupt): Generate FP exceptions instead of aborting.
- (deliver_hardware_interrupt): Deliver a FP exception if so
- enabled.
-
- * registers.h: Add definition of fpscr_vx_bits.
-
- * idecode_expression.h (FPSCR_END): Always update FEX and VX bits
- in FPSCR.
- (FPSCR_END): Explicitly check for possible floating point
- exception conditions.
- (FPSCR_BEGIN): Simplify.
-
- * ppc-instructions (Move From FPSCR): Enable.
- (Move To FPSCR Bit 1): Ditto.
- (Move To FPSCR Bit 0): Ditto.
- (Move To FPSCR Field Immediate): Ditto.
- (Move to Condition Register from FPSCR): Simplify.
- (invalid_arithemetic_operation): Generate a QNaN when invalid
- operation exception disabled.
-
-Tue May 20 10:22:50 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim_calls.c (sim_open): Add callback argument.
- (sim_set_callbacks): Delete.
-
-Tue Apr 22 22:36:57 1997 Mike Meissner <meissner@cygnus.com>
-
- * sim_callbacks.h (error): Make declaration match gdb's.
- * main.c (error): Ditto.
-
-Fri Apr 18 17:03:09 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim_calls.c (sim_stop_reason): Simplify. Was running implies
- stopped/SIGINT. Exit implies a status code.
-
- * psim.c (cntrl_c_simulation): From main.c. Event function that
- halts the simulator.
- (psim_stop): New. Asynchronously schedule a stop simulator event.
- (psim_run_until_stop): Delete. Made redundant by psim_stop.
-
- * main.c (cntrl_c): Update.
- (cntrl_c_simulation): Moved to psim.c.
-
- * sim_calls.c (sim_stop): New function. Use psim_stop which
- schedules a stop event.
- (sim_resume): Drop SIGINT handler, now in gdb/main.c.
- (sim_resume): Use psim_run as stop variable no longer needed.
-
-Fri Apr 18 17:03:08 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * psim.c (psim_options): Handle -E option correctly.
- (psim_usage): Document.
-
-Thu Apr 17 03:28:03 1997 Doug Evans <dje@canuck.cygnus.com>
-
- * psim.c (psim_options): Ignore -E option (sets endianness).
- * sim_calls.c: #include bfd.h.
- (entry_point): New static local.
- (sim_load): Return SIM_RC. New arg abfd. Set start address from bfd.
- (sim_create_inferior): Return SIM_RC. Delete arg start_address.
-
-Tue Apr 15 14:57:18 1997 Ian Lance Taylor <ian@cygnus.com>
-
- * Makefile.in (INSTALL): Set to @INSTALL@.
- (INSTALL_XFORM, INSTALL_XFORM1): Remove.
- (install): Depend upon installdirs. Use $(program_transform_name)
- directly, rather than using $(INSTALL_XFORM).
- (installdirs): New target.
-
-Fri Apr 4 17:54:36 1997 Jim Wilson <wilson@cygnus.com>
-
- * Makefile.in (tmp-hw, tmp-pk): Use for loop to eliminate duplicates
- rather than the non-portable cat -n.
-
-Mon Apr 14 16:29:51 1997 Ian Lance Taylor <ian@cygnus.com>
-
- * Makefile.in (INSTALL): Change install.sh to install-sh.
-
-Tue Apr 1 18:15:14 1997 Jim Wilson <wilson@cygnus.com>
-
- * ppc-instructions: Change milhwu to mulhwu.
-
-Wed Apr 2 15:38:08 1997 Doug Evans <dje@canuck.cygnus.com>
-
- * sim_calls.c (sim_open): New arg `kind'.
-
-Wed Apr 2 14:51:17 1997 Ian Lance Taylor <ian@cygnus.com>
-
- * COPYING: Update FSF address.
-
-Tue Mar 25 16:17:59 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
-
- * main.c (sim_io_read_stdin): Only compile unbuffered IO code if
- all the required features are supported by the host OS.
-
-Tue Mar 25 12:13:02 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
-
- * emul_bugapi.c (emul_bugapi_create): Guard against NULL images.
-
- * configure.in (enable-sim-endain): Correct typo in usage (from
- Erik Landry <landry@ENGR.ORST.EDU>).
- * configure: Re-generate.
-
-Fri Mar 14 18:23:02 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
-
- * Makefile.in (targ-vals.def): Re-do rule so that it works with
- FreeBSD's make. Didn't like $<.
-
-Thu Mar 13 12:55:48 1997 Doug Evans <dje@canuck.cygnus.com>
-
- * sim_calls.c (sim_open): New SIM_DESC result. Argument is now
- in argv form.
- (other sim_*): New SIM_DESC argument.
-
-Thu Feb 13 10:35:14 1997 Andrew Cagney <cagney@phydeaux.cygnus.com>
-
- * ppc-opcode-simple-array, ppc-opcode-simple-goto,
- ppc-opcode-simple-switch, ppc-opcode-complex-array,
- ppc-opcode-complex-goto, ppc-opcode-complex-switch,
- ppc-opcode-jump, ppc-opcode-goto, ppc-opcode-flat: Delete,
- superseeded by --sim-decode-mechanism option.
-
- * ppc-opcode-simple, dc-simple: Rename to be 8.3
- * ppc-opcode-complex, dc-complex: Ditto.
- * ppc-opcode-stupid, dc-stupid: Ditto.
- * ppc-opcode-test-1, dc-test.01: Ditto.
- * ppc-opcode-test-2, dc-test.02: Ditto.
-
- * configure.in (--enable-sim-opcode): Change prefix to dc- instead
- of ppc-opcode-.
-
-Wed Feb 12 19:33:45 1997 Andrew Cagney <cagney@phydeaux.cygnus.com>
-
- * Many of the ppc-opcode-* files are identical baring the type of
- lookup table. Instead of having multiple tables, igen can do this
- via an additional option.
-
- * ld-decode.h, ld-decode.c (force_decode_gen_type): New function,
- allow the type of generated table specified in the decode file to
- be overridden.
-
- * ld-decode.c (load_decode_table): Allow the table type to be
- overridden.
-
- * igen.c (main): Add -T <mechanism> option so that an overriding
- instruction decode mechanism can be specified.
-
- * configure.in: New option --sim-decode-mechanism to control
- igen's new -T <mechanism> flag.
- * Makefile.in (IGEN_FLAGS): Add IGEN_IDECODE_MECHANISM set by the
- configure script.
- * configure: Regenerate.
-
-Tue Feb 11 13:49:10 1997 Michael Meissner <meissner@tiktok.cygnus.com>
-
- * events.c (event_queue_create): Don't use NULL to initialize an
- integer field.
- (even_queue_{init,schedule_after_signal,tick}): Conditionalize use
- of sigprocmask to appropriate autoconf test.
-
- * main.c ({cntrl_c,main}): Use RETSIGTYPE for signal return type,
- don't assume void.
- * sim_calls.c (sim_{ctrl_c,resume}): Ditto.
-
- * Makefile.in (callback.o): Define HAVE_CONFIG_H, so callback.c
- includes our config.h.
-
-Tue Feb 4 13:42:59 1997 Doug Evans <dje@canuck.cygnus.com>
-
- * configure.in: Fix typo in test for callback.c.
- * configure: Regenerated.
-
-Fri Feb 7 10:04:25 1997 Andrew Cagney <cagney@kremvax.tpgi.com.au>
-
- * emul_chirp.c (emul_chirp_create): Handle a virtbase of -1 being
- found in the device tree.
-
-Wed Feb 5 10:56:27 1997 Andrew Cagney <cagney@kremvax.tpgi.com.au>
-
- * Property create/initialization still wasn't correctly ordered.
- Should be delaying everything related to ihandle creation until
- after the rest of the tree has been established.
-
- * device.c (device_find_ihandle_runtime_property): Update.
- (device_add_ihandle_runtime_property): Update.
-
- * tree.c (parse_ihandle_property): Delay lookup of the device to
- be opened until the ihandle initialization phase.
- * tree.c (print_properties): Update.
-
-Wed Feb 5 10:56:27 1997 Andrew Cagney <cagney@kremvax.tpgi.com.au>
-
- * gen-icache.c (print_icache_extraction): Add a reason parameter.
- Augment each extracted field with a comment citing the codes
- origin. Should simplify tracking down incorrect cache
- extractions.
-
-Tue Feb 4 17:44:51 1997 Andrew Cagney <cagney@kremvax.tpgi.com.au>
-
- * gen-icache.c: Generalize code handling XXX_is_NNN so that it
- works for normal and boolean table entries.
-
- * psim.c (psim_write_memory): last_cpu == -1 or nr_cpus is now
- valid. Handle this just like *_{read,write}_register now handles
- it.
-
-Mon Feb 3 17:18:16 1997 Andrew Cagney <cagney@kremvax.tpgi.com.au>
-
- * events.c (insert_event_entry): Correct loop termination
- assertions.
-
-Fri Jan 31 16:20:26 1997 Andrew Cagney <cagney@kremvax.tpgi.com.au>
-
- * psim.c (psim_options): Add new option -c for max-iterations or
- count.
- (psim_usage): Document.
- (psim_max_iterations_exceeded): New function, abort simulation if
- max iterations exceeded.
-
- * gen-idecode.c: Re-work the table lookup code so that it assumes
- that the entry is a leaf by default. Simplify the boolean table
- entry code so that it involves a mask + test instead of shift +
- shift + mask + test.
-
- * gen-idecode.c: Correct generated igen body so that it no drops
- or doubles clock interrupts.
-
-
-Thu Jan 30 11:23:20 1997 Andrew Cagney <cagney@kremvax.tpgi.com.au>
-
- * Makefile.in (BUILT_SRC_WO_CONFIG): Change targ-vals.* to
- @sim_targ_vals@
-
- * configure.in (sim_callback, sim_targ_vals): Set sim_targ_valls
- if common callback is present.
-
-Wed Jan 29 12:32:41 1997 Michael Meissner <meissner@tiktok.cygnus.com>
-
- * configure.in (sim_callback): If the gdb is post 4.16, configure
- callback support from the common directory.
- * configure: Regenerate.
-
- * Makefile.in (BUILT_SRC_WO_CONFIG): Add targ-vals.{h,def} and
- targ-map.c.
- (GDB_OBJ): Add callback support configured in.
- (gentmap,targ-vals.def): Build from common directory.
- (targ-vals.h,targ-map.c): Build by running gentmap.
- (callback.o): Build from source in common directory.
- (targ-map.o): Add dependency.
- (clean): Remove gentmap.
-
-Wed Jan 29 12:14:19 1997 Andrew Cagney <cagney@kremvax.tpgi.com.au>
-
- * igen wasn't aborting if the opcode table contained no valid
- fields.
-
- * misc.c (name2i): Possibly abort if an invalid name is
- encountered.
- * ld-decode.c: Abort if the table type isn't found.
-
-Wed Jan 29 12:14:19 1997 Andrew Cagney <cagney@kremvax.tpgi.com.au>
-
- * When performance monitoring is disabled, it is still possible to
- determine the simulation speed by looking at the number of elapsed
- ticks recorded by the event queue.
-
- * psim.c (psim_write_register, psim_read_register): Force the cpu
- to zero when it is either of `-1' or `nr_cpus'. In both cases the
- next cpu would be zero any way.
-
- * mon.c (mon_print_info): If possible, print the system cycle
- performance. This is an indication of the number of instructions
- per second.
-
-Wed Jan 29 12:14:19 1997 Andrew Cagney <cagney@kremvax.tpgi.com.au>
-
- * The code to allow an event queue to be updated during a signal
- was missing. For main.c, a cntrl-c simulation termination wasn't
- handled cleanly.
-
- * The simulation would not correctly restart if an event requested
- that the simulation be halted.
-
- * psim.c (psim_options): Add hack to -i option to optionally
- include a level vis -i2.
- (psim_usage): Document.
-
- * main.c (cntrl_c, cntrl_c_simulation): New functions. When a
- cntrl-c occures schedule an event to halt the simulation.
- (main): Catch CNTRL-C signals with the function cntrl_c.
-
- * events.c (event_queue_process): Mask interrupts while
- manipulating the async event queue.
- (event_queue_init): Ditto.
- (event_queue_schedule_after_signal): Ditto.
-
- * events.c (event_queue_process): Mark the event queue as being in
- the processing state when processing has started. Adjust code
- so that it is tolerant of halts.
- (event_queue_init): Start the event queue out with processing
- false.
- (event_queue_tick): Check that processing isn't still being
- performed.
-
- * gen-idecode.c (print_run_until_stop_body): Call
- event_queue_process_events to clear possibly pending events before
- starting a simulation run. Re-arange main loop so that simulator
- is correctly restarted when an event halts the simulation.
-
- * psim.c (psim_halt): Handle an event halting the simulation.
- * psim.c (psim_init): Adjust initial cpu - == -1 - to match
- reworked idecode.
-
-Wed Jan 29 12:14:19 1997 Andrew Cagney <cagney@kremvax.tpgi.com.au>
-
- * ppc-opcode-complex: Correct typo - was expanding ORA instead of
- RA. Based on instruction frequency stats, expand additional
- instructions.
- * ppc-instructions: Change all `RA == 0' to RA_is_0.
-
- * ppc-opcode-stupid: Move all but the basic table in -complex into
- here. Update to new format.
-
- * Makefile.in (tmp-defines): New target. Force defines.h to always
- be built. Hence get ppc-opcode-goto to build.
-
-Tue Jan 28 13:00:19 1997 Andrew Cagney <cagney@kremvax.tpgi.com.au>
-
- * hw_com.c (hw_com_instance_read, hw_com_instance_write):
- Implement.
-
-Thu Jan 23 09:07:26 1997 Andrew Cagney <cagney@kremvax.tpgi.com.au>
-
- * hw_trace.c (hw_trace_init_data): Delete. The trace options need
- to be initialized independant of the rest of the simulation
- initalization. Otherwize a trace option explictly set from gdb
- could be overridden by hw_trace.
-
- * psim.c (psim_options): Clarify reason why the trace ioctl occures.
-
- * FIXME: The trace code is too scattered - hw_trace.c, psim.c,
- debug.c. It could be much simpler.
-
-Thu Jan 23 09:07:26 1997 Andrew Cagney <cagney@kremvax.tpgi.com.au>
-
- * Some devices support removable media. Add hooks to the disk
- device so that it supports this.
-
- * device.c (device_add_string_array_property,
- device_find_string_array_property): New functions, manipulate
- properties containing an array of strings.
- (device_find_string_property): Allow a string array.
- (device_init_static_properties): Update.
- (device_init_runtime_properties): Update.
-
- * hw_disk.c (hw_disk_ioctl): Add ioctl for changing the disk
- media. If no file image is specified, use the next one in the
- image property list.
- (hw_disk_init_address): Change the file property so that it is a
- string array - use the first entry for the initial file image.
-
- * tree.c (print_string_aray_property): New function - print a
- string array.
- (print_properties): Adjust.
- (print_string): Write a string, handling double quotes.
-
- * device.h: Define an ioctl to `change-media' with an optional new
- media image.
-
- * hw_disk.c: Allow floppy disk devices to be specified.
-
- * psim.c (psim_command): New function, parse more complex psim
- commands such as "change-media" and "trace".
- * sim_calls.c (sim_do_command): Use.
-
-Wed Jan 22 09:38:33 1997 Andrew Cagney <cagney@kremvax.tpgi.com.au>
-
- * For expressions like (RA == 0) that are entered in to the cache
- as RA_is_0. If possible generate the result of the expression so
- that the compiler gets a better chance of eliminating dead
- branches.
-
- * gen-icache.c (print_icache_extraction): For a cache entry of
- the form <name>_is_<const> where it is a boolean field, generate
- the result of the expression instead of the expression its self.
- (print_icache_body): Remove code that was looking for *_is_0 and
- then generating corresponding definitions.
-
- * gen-icache.c (print_icache_struct): If there is no cache, do not
- output expressions in idecode.h file.
-
- * gen-icache.c (print_icache_body): Output them here.
-
- * ppc-opcode-complex: Clarify constant values for SPR==LR register
- expansion.
-
- * ppc-cache-rules (RA_is_0, SPR_is_256): Two new cache entries.
-
-Wed Jan 22 12:24:52 1997 Andrew Cagney <cagney@kremvax.tpgi.com.au>
-
- * The code that put values in and extracted values from the cache
- was too compilicated. The cache table did not allow values to be
- computed from cache entries. #defines could only be used when a
- cache was present, remove the restriction.
-
- * ld-cache.h, ld-cache.c: Add a new cache entry type - SCRATCH. A
- scratch variable is defined when a cache entry is beinf
- filled. Change the definition of a COMPUTE variable to be defined
- when the cache entry is being used.
- * gen-icache.c: Update.
-
- * ld-cache.h, ld-cache.c: Change field names so that their meaning
- is more obvious. old_name->field_name, new_name->derived_name.
- * gen-icache.c: Update
-
- * gen-icache.h, gen-icache.c (print_icache_body): Make the three
- different types of cache code - put into cache, extract from
- cache, no cache - an explicit argument to print_icache_body.
- * gen-icache.c (print_icache_extraction): Ditto.
-
- * gen-semantics.c (print_c_semantic): Update use.
- * gen-idecode.c (print_jump_insn): Update use.
- * gen-icache.c (print_icache_function): Update use.
-
- * igen.c (main): Change 'R' option so that it does not force the
- cache.
-
- * configure.in (enable-sim-icache): Clarify description. Make
- #define one of the defaults regardless of the cache. Probably
- should revamp and add a separate option.
-
-Tue Jan 21 13:26:10 1997 Andrew Cagney <cagney@kremvax.tpgi.com.au>
-
- * pk_disklabel.c (block_is_fdisk): Tidy up traces - use dos
- partition numbering.
- (pk_disklabel_create_instance): Partition 1..4 are valid - not
- 1..3.
- (is_iso9660): New function, verify a CD9660 File system.
- (pk_disklabel_create_instance): Start expanding so that active
- partition selection is supported.
-
-Mon Jan 20 11:20:15 1997 Andrew Cagney <cagney@kremvax.tpgi.com.au>
-
- * The cap object was retaining a reference to the instance of a
- device after it was deleted. Instead add and remove cap's from the
- cap db as they are created and deleted. This ensuring that a
- capibility is only used during the lifetime of the corresponding
- object.
-
- * cap.h, cap.c: Correct cap type - was signed32 should be
- signed_cell.
-
- * cap.c (cap_add, cap_remove): New methods for cap object that
- allow the explicit addition and removal of internal objects that
- the cap knows about.
-
- * cap.c (cap_init): Rewrite. Verify that the only objects
- remaining in the cap data base are those that were entered first.
- Thse objects will be the permenant ones.
- * device.c (device_init_address): Remember to initialize the cap
- database.
-
- * device.c (device_create_instance_from): Explicitly add device
- instances to the cap database. Simplify create code.
- (device_instance_delete): Explicitly remove device instances from
- the cap database.
-
- * device.c (device_create_from): Explicitly add a device to the
- cap data base.
-
- * device.c (device_create_from): Always set the cap members.
-
- * hw_disk.c: Output the instance when tracing.
-
-Sun Jan 19 16:44:29 1997 Andrew Cagney <cagney@kremvax.tpgi.com.au>
-
- * tree.c (split_device_specifier): Add support for aliases when
- looking up a device. Now needs a device as an argument.
- (split_property_specifier): Ditto.
-
-Sun Jan 19 15:28:23 1997 Andrew Cagney <cagney@kremvax.tpgi.com.au>
-
- * The memory "claim" and "release" methods take an address and
- size as arguments. These may be multi cell values. Initially fix
- the memory code so that they check/detect this. Leave the
- adjustment of any clients to later.
-
- * hw_memory.c (hw_memory_instance_claim,
- hw_memory_instance_release): Handle multi-cell memory devices.
-
- * hw_memory.c (hw_memory_instance_claim): Be tolerant towards the
- release of memory regions that were not claimed.
-
-Fri Jan 17 12:01:07 1997 Andrew Cagney <cagney@kremvax.tpgi.com.au>
-
- * device.h, device.c (device_instance_call_method): Correct return
- type - can return either 0 or -1, hence should be a signed type.
- * device_table.h: Ditto.
-
- * hw_memory.c (hw_memory_instance_claim,
- hw_memory_instance_release): Update.
- * hw_disk.c (hw_disk_max_transfer, hw_disk_block_size,
- hw_disk_nr_blocks): Ditto.
-
-Fri Jan 17 11:50:13 1997 Andrew Cagney <cagney@kremvax.tpgi.com.au>
-
- * emul_chirp.c (chirp_emul_claim): Implement using the "claim"
- method belonging to "/chosen/memory".
- (chirm_emul_release): Ditto.
-
- * Makefile.in (LIB_INLINE_SRC): Remove emul_* from list of files
- that are inlined. These modules are called via a table and are
- not made inline.
-
- * hw_init.c (update_for_binary_section): Fix failure to allocate
- memory used by the binary in real-mode executions. If "claim"
- property is present, allocate memory from the "/chosen/memory"
- device.
-
- * emul_chirp.c (emul_chirp_create): Specify that memory should be
- claimed when loading a real image.
-
- * hw_memory.c (hw_memory_instance_claim): Don't page align memory
- allocations.
-
- * hw_memory.c (hw_memory_instance_release): Avoid infinite loop
- when merging adjacent memory chunks.
-
-Thu Jan 16 08:51:25 1997 Andrew Cagney <cagney@kremvax.tpgi.com.au>
-
- * vm.h (vm_data_map_read_buffer, vm_data_map_write_buffer): Add
- optional PROCESSOR & CIA args so that this routine also abort an
- access.
-
- * vm_n.h (vm_data_map_read_N, vm_data_map_write_N): For a
- miss-aligned access when a transfer fails abort.
-
- * emul_bugapi.c (emul_bugapi_do_write): Use emul_read_buffer
- instead of the vm_read_buffer.
- * emul_netbsd.c (do_write): Ditto.
- * emul_unix.c (do_unix_write): Ditto.
-
-Wed Jan 15 14:38:25 1997 Andrew Cagney <cagney@kremvax.tpgi.com.au>
-
- * configure.in (--enable-sim-jump): Default is NULL and not -E.
- * configure: Regenerate.
-
- * basics.h (__attribute__): Enable attributes if GCC >= 2.6.
- (UNUSED): Only enable UNUSED if GCC >= 2.7.
-
- * gen-icache.c (print_icache_extraction): Print UNUSED macro
- instead of explicit __unused__ attribute.
- (print_icache_body): Ditto.
- * idecode_expression.h (FPSCR_BEGIN): Use UNUSED.
-
-Wed Jan 15 13:54:50 1997 Andrew Cagney <cagney@kremvax.tpgi.com.au>
-
- * cpu.h, cpu.c (cpu_synchronize_context): Add CIA argument as
- reference point.
-
- * vm.c (vm_synchronize_context): Add PROCESSOR and CIA as
- arguments so that there is a reference point for recovery.
- (vm_synchronize_context): Pass processor+cia for errors.
- (om_unpack_sr): Ditto.
- (om_unpack_srs): Ditto.
- * vm.c (vm_create): Review error messages.
-
- * vm.c: Include "cpu.h" so that cpu_error is visible.
-
- * ppc-instructions (Return From Interrupt): Pass CIA.
- (Instruction Synchronize): Ditto.
- * psim.c (psim_init): Ditto.
-
-Wed Jan 15 12:25:11 1997 Andrew Cagney <cagney@kremvax.tpgi.com.au>
-
- * cpu.h, cpu.c (cpu_error): Aborts simulation with error message,
- but also saves current processor state.
-
- * basics.h: Move #include <stdarg.h> to here from device_table.h.
-
- * interrupts.c (perform_oea_interrupt): Use. No longer loose CIA
- when simulation aborted.
- (program_interrupt): Ditto.
- (floating_point_unavailable_interrupt): Ditto.
- (alignment_interrupt): Ditto.
- (floating_point_assist_interrupt): Ditto.
- (perform_oea_interrupt): Ditto.
- (machine_check_interrupt): Ditto.
-
-Tue Jan 14 12:19:10 1997 Andrew Cagney <cagney@kremvax.tpgi.com.au>
-
- * ppc-instructions (Move from Special Purpose Register): Support
- move from DEC.
-
-Mon Jan 13 16:58:12 1997 Andrew Cagney <cagney@kremvax.tpgi.com.au>
-
- * debug.h, debug.c: Add "interrupts" trace option.
-
- * interrupts.c (data_storage_interrupt): Add tracing.
- (machine_check_interrupt): Ditto.
- (instruction_storage_interrupt): Ditto.
- (alignment_interrupt): Ditto.
- (program_interrupt): Ditto.
- (floating_point_unavailable_interrupt): Ditto.
- (system_call_interrupt): Ditto.
- (floating_point_assist_interrupt): Ditto.
- (deliver_hardware_interrupt): Ditto.
-
- * interrupts.c (program_interrupt): For UEA mode, halt the
- processor - so that the current state is saved - instead of
- aborting.
- (floating_point_unavailable_interrupt): Ditto.
- (floating_point_assist_interrupt): Ditto.
-
-Thu Jan 2 09:10:41 1997 Andrew Cagney <cagney@kremvax.tpgi.com.au>
-
- * interrupts.c (perform_oea_interrupt): Halt rather than abort on
- a double interrupt.
-
-Wed Jan 1 22:54:52 1997 Andrew Cagney <cagney@kremvax.tpgi.com.au>
-
- * ppc-instructions (Store Multiple Word, Load Multiple Word):
- Enable.
-
- * tree.c (print_properties): For an array consider printing it out
- as an integer array.
-
- * hw_memory.c (hw_memory_init_address): If an "available" property
- is present, use that to initialize the available memory instead of
- using the reg property.
-
- * emul_generic.c (emul_add_tree_hardware): Add "available"
- property to memory device.
-
-Fri Dec 20 13:19:07 1996 Andrew Cagney <cagney@kremvax.tpgi.com.au>
-
- * ppc-instructions (Rotate Left Word then AND with Mask): Enable.
-
- * device.c (device_instance_call_method): Was only looking at the
- first method.
-
- * hw_disk.c (hw_disk_nr_blocks): Implement #blocks method.
- (hw_disk_block_size): Implement block-size method.
- (hw_disk_max_transfer): Implement max-transfer method.
-
- * hw_phb.c (hw_phb_init_address): Reinit the rest of the PHB.
-
- * emul_chirp.c (chirp_emul_instance_to_path): Recover from an
- invalid ihandle.
- (chirp_emul_instance_to_package): Ditto.
- (chirp_emul_method): Ditto.
- (chirp_emul_read): Ditto.
- (chirp_emul_write): Ditto.
- (chirp_emul_close): Ditto.
- (chirp_emul_seek): Ditto.
- (chirp_emul_package_to_path): Ditto (for phandle).
- (chirp_emul_package_to_path): Return the length.
-
- * psim.c (psim_merge_device_file): Allow continuation lines.
-
-Thu Dec 19 11:09:43 1996 Andrew Cagney <cagney@kremvax.tpgi.com.au>
-
- * emul_chirp.c (chirp_emul_boot): Implement. Well report the new
- string and exit.
-
- * emul_chirp.c (chirp_emul_exit): Correct type of args struct
- members - *_cell not host dependant int.
-
-Wed Dec 18 17:49:59 1996 Andrew Cagney <cagney@kremvax.tpgi.com.au>
-
- * interrupts.c (perform_oea_interrupt): Print additional
- information if a double interrupt is encountered.
-
-Wed Dec 18 17:49:59 1996 Andrew Cagney <cagney@kremvax.tpgi.com.au>
-
- * psim.c (psim_merge_device_file): Tolerate an incorrect file-name
- being specified with the -f option.
- (psim_merge_device_file): Correct check for end of string.
-
-Wed Dec 18 17:49:59 1996 Andrew Cagney <cagney@kremvax.tpgi.com.au>
-
- * emul_chirp.c (chirp_emul_peer): Was falling off the end of the
- list of devices. Return zero to the client instead.
- * emul_chirp.c (chirp_emul_child): Ditto
- * emul_chirp.c (chirp_emul_parent): Ditto
-
- * device.c (device_root): Assert assumption about the device being
- valid.
-
-Tue Dec 17 15:12:38 1996 Andrew Cagney <cagney@kremvax.tpgi.com.au>
-
- * emul_chirp.c (emul_chirp_create): Add description property to
- each significant node in the device tree.
- * emul_bugapi.c (emul_bugapi_create): Ditto.
-
-Fri Dec 13 14:30:31 1996 Andrew Cagney <cagney@kremvax.tpgi.com.au>
-
- * main.c (sim_io_read_stdin): For a single byte STDIO read, use a
- tempoary two byte buffer. Single byte read with fgets will not
- work.
- * main.c: Include errno.h.
- (sim_io_read_stdin): For non-STDIO, make it work.
-
- * emul_chirp.c (chirp_emul_read): Return the correct error status.
-
-Fri Dec 13 14:30:31 1996 Andrew Cagney <cagney@kremvax.tpgi.com.au>
-
- * std-config.h (WITH_STDIO): Don't hard-wire the STDIO mechanism.
- Instead have each emulation default it to DO_USE_STDIO.
-
- * emul_generic.c (emul_add_tree_options): Select the STDIO I/O
- mechanism as the default if enabled or if nothing selected.
-
- * sim_calls.c (sim_io_read_stdin): Passify GCC's desire for a
- return value.
- (sim_io_write_stdout): Ditto.
- (sim_io_write_stderr): Ditto.
- * main.c (sim_io_write_stdout): Ditto.
- (sim_io_write_stderr): Ditto.
- (sim_io_read_stdin): Ditto.
-
-Tue Dec 10 10:31:48 1996 Michael Meissner <meissner@tiktok.cygnus.com>
-
- * emul_chirp.c (emul_chirp_instruction_call): Make *printf calls
- type correct.
- * vm.c (om_effective_to_virtual): Ditto.
- * events.c (event_queue_schedule{,_after_signal}): Ditto.
- (event_queue_{deschedule,process}): Ditto.
- * hw_htab.c (htab_decode_hash_table): Ditto.
- (htab_map_{page,binary}): Ditto.
- * hw_opic.c (hw_opic_init_data): Ditto.
- (handle_interrupt): Ditto.
- (do_processor_init_register_{read,write}): Ditto.
- (write_vector_priority_register): Ditto.
- ({read,write}_destination_register): Ditto.
- (do_suprious_vector_register_{read,write}): Ditto.
- (do_current_task_priority_register_N_{read,write}): Ditto.
- (do_timer_frequency_reporting_register_{read,write}): Ditto.
- (do_timer_N_{current,base}_count_register_{read,write}): Ditto.
- (do_ipi_N_dispatch_register_write): Ditto.
- (do_vendor_identification_register_read): Ditto.
- (do_feature_reporting_register_N_read): Ditto.
- (do_global_configuration_register_N_{read,write}): Ditto.
- * hw_phb.c (hw_phb_attach_address): Ditto.
- (hw_phb_unit_decode): Ditto.
- (hw_phb_address_to_attach_address): Ditto.
- (hw_phb_io_{read,write}_buffer): Ditto.
- * hw_ide.c (setup_fifo): Ditto.
-
- * sim_calls.c ({defs,callback,remote-sim}.h): Find gdb include
- files via -I<dir> instead of using "../../gdb/" prefixes.
-
-Tue Dec 10 10:12:44 1996 Andrew Cagney <cagney@kremvax.tpgi.com.au>
-
- * debug.h: Add tracing for the pal device.
- * hw_pal.c: Update.
-
- * emul_chirp.c (chirp_emul_getprop): More tracing.
-
-Tue Dec 10 10:12:44 1996 Andrew Cagney <cagney@kremvax.tpgi.com.au>
-
- * device.h, device.c (device_find_ihandle_runtime_property): New
- function. Reverse of add_ihandle_runtime property.
- (device_init_runtime_properties): Use it.
-
- * device.c (find_property_entry): New function returns the
- internal property spec.
- (device_set_property): Use.
- (device_find_property): Use.
-
-Tue Dec 10 10:12:44 1996 Andrew Cagney <cagney@kremvax.tpgi.com.au>
-
- * psim.c (psim_merge_device_file): Strip newline from device
- specs.
-
-Tue Dec 10 10:12:44 1996 Andrew Cagney <cagney@kremvax.tpgi.com.au>
-
- * hw_htab.c (htab_map_binary): For overlapping text / data maps
- merge the two. Also check that the merge is safe.
-
- * emul_chirp.c (emul_chirp_create): Add a description property to
- the pte's so that they are easier to identify.
-
- (emul_chirp_create): Don't specify a load address for the CHRP
- image. Always use the values specified by the executable.
-
- * hw_htab.c (htab_map_page): Abort if a duplicate map is
- encountered.
-
-Mon Dec 9 12:08:46 1996 Andrew Cagney <cagney@kremvax.tpgi.com.au>
-
- * hw_htab.c (htab_map_page): Formatting.
-
- * emul_chirp.c (emul_chirp_instruction_call): Check for a NULL
- method name when handling the client call. Also check for other
- bad call arguments.
-
- * emul_chirp.c (emul_chirp_create): Allow real-mode?, real-base,
- etc to be overriden.
-
-Mon Dec 9 12:08:46 1996 Andrew Cagney <cagney@kremvax.tpgi.com.au>
-
- * os_emul.c (os_emul_create): Use tree find property instead of
- device find property - sigh.
-
-Thu Dec 5 10:46:42 1996 Andrew Cagney <cagney@kremvax.tpgi.com.au>
-
- * 961205: Release snapshot 961205.
-
-Thu Dec 5 10:46:42 1996 Andrew Cagney <cagney@kremvax.tpgi.com.au>
-
- * configure.in (hostbitsize, bitsize): Fix typo in error message -
- cannot contain a comma.
- (sim-warnings): Check for more potential errors.
-
- * psim.c (psim_usage): Add -f <file> option. Specifies a file
- containing device tree specifications that should be merged into
- the device tree.
-
- * configure.in: Sort options.
- * configure: Rebuild
-
-Wed Dec 4 13:57:31 1996 Andrew Cagney <cagney@kremvax.tpgi.com.au>
-
- * psim.c (psim_usage): Add -n option - specify number of
- processors.
-
- * emul_chirp.c: Add description.
- * emul_bugapi.c: Ditto.
- * emul_unix.c: Ditto.
- * emul_netbsd.c: Ditto.
-
-Fri Nov 29 11:12:22 1996 Andrew Cagney <cagney@kremvax.tpgi.com.au>
-
- * hw_pal.c (hw_pal_attach_address): New function, if an attach is
- encountered, assume that it is the single disk.
- * hw_pal.c: Add generic device/size decode methods.
-
- * hw_nvram.c (hw_nvram_init_address): Use the first nonzero reg
- property entry when determining the nvram size.
-
- * hw_core.c: Add generic address/size decode methods.
-
- * emul_chirp.c (emul_chirp_instruction_call): Return and trace
- nonzero status from client functions.
-
- * main.c (error): Always include a cariage return when writing out
- errors.
-
-Wed Nov 20 00:36:55 1996 Doug Evans <dje@canuck.cygnus.com>
-
- * sim_calls.c (sim_resume): Reset sim_should_run if single
- stepping.
-
-Thu Nov 28 13:19:46 1996 Andrew Cagney <cagney@kremvax.tpgi.com.au>
-
- * emul_bugapi.c (emul_bugapi_do_diskio): Add support for multiple
- optional disks.
-
- * emul_generic.c (emul_add_tree_hardware): Drop the dummy eeprom.
- Attach the pal - for I/O - as a pseudo device haning from the
- firmware sub tree.
-
- * emul_bugapi.c (emul_bugapi_create): Add a small memory device to
- the device tree at the address of the hi-mem interrupt vector
- addreses. Used by bugapi to establish its trap instructions.
-
- * debug.h: Add a new macro DITRACE for tracing device instances.
-
- * debug.h: Extend the DTRACE macro so that it can also tests for
- device specific tracint.
-
- * device.h, device.c (device_trace): Add method to determine
- device specific tracing.
- (device_init_address): Set the devices tracing level.
-
-Thu Nov 21 12:05:32 1996 Andrew Cagney <cagney@kremvax.highland.com.au>
-
- * tree.h, tree.c (tree_device): New files - separate out the
- device parser and other tree operations from the device.
-
- * inline.h, inline.c (INLINE_TREE): Add.
- * device.h, device.c (device_tree_add_parsed): Delete.
- * Makefile.in (tree.c): Add rules for new file.
- * Makefile.in: Better order the emul_* files.
-
- * emul_generic.c (emul_add_tree_hardware): Update.
- * emul_netbsd.c (emul_netbsd_create): Update.
- * emul_unix.c (emul_unix_create): Ditto.
- * emul_chirp.c (emul_chirp_create): Ditto.
- * emul_bugapi.c (emul_bugapi_create): Ditto.
- * psim.c (psim_tree): Ditto.
- * hw_init.c: Ditto.
-
- * emul_generic.h: Include tree.h
- * Makefile.in: Add to EMUL_GENERIC_H dependencies.
-
- * device.h, device.c (device_root): New function - returns the
- root of the tree.
- * corefile.c: Use.
-
- * device.h, device.c (device_clean): New function, clean up device
- ready for next simulation run. This includes things like deleting
- interrupt edges and properties created during the simulation and
- also scrubbing any pre-defined properties.
- * tree.c (tree_init): Use.
-
- * device.h, device.c (device_init_static_properties): New
- function. Initialize any static predefined properties. By static
- we mean those that have values that can be determined before the
- device tree initialization has started.
- * tree.c (tree_init): Use.
-
- * device.h, device.c (device_init_address): Add code to
- check/verify the devices #address-cells and #size-cells.
- (device_add_integer_property): Delete corresponding code.
- (device_nr_address_cells, device_nr_data_cells): Check for
- property when returning value.
-
- * device.h, device.c (device_init_runtime_properties): New
- function. Initialize those properties that are not `static'. At
- present the only such property is the ihandle.
- * tree.c (tree_init): Use.
-
- * device.h, device.c (reg, ranges): Rework these so that they use
- an array of the fundamental type - single reg or single range
- entry.
-
- * device.h, device.c (device_add_ihandle_runtime_property):
- Re-implement the adding of an ihandle during tree construction so
- that it better fits in with device initialization.
-
-Thu Nov 21 12:05:32 1996 Andrew Cagney <cagney@kremvax.highland.com.au>
-
- * device.h, device.c (device_ioctl): Add additional argument -
- request - so that the caller must always specify the type of
- the ioctl request.
-
- * device_table.h: Update.
- * hw_trace.c (hw_trace_ioctl): Ditto.
- * hw_vm.c (hw_vm_ioctl_callback): Ditto.
- * hw_init.c (hw_stack_ioctl_callback): Ditto.
- * psim.c (psim_options): Ditto.
-
-Thu Nov 21 12:05:32 1996 Andrew Cagney <cagney@kremvax.highland.com.au>
-
- * BUGS: Updated a bit.
-
-Wed Nov 20 14:06:37 1996 Andrew Cagney <cagney@kremvax.highland.com.au>
-
- * hw_opic.c: Finish - third round.
-
-Wed Nov 20 12:02:08 1996 Andrew Cagney <cagney@kremvax.highland.com.au>
-
- * hw_glue.c (hw_glue_io_read_buffer_callback): Fix miscalc of glue
- reg index.
- (hw_glue_io_write_buffer_callback): Ditto.
-
-Tue Nov 19 21:17:08 1996 Andrew Cagney <cagney@kremvax.highland.com.au>
-
- * events.c (event_queue_process): Was incorrectly consuming future
- events on the queue when they should be left alone.
-
- * debug.h, debug.c (events): Add support for event queue tracing.
- * events.c: Add event tracing.
-
- * debug.h, debug.c: Order device trace options.
-
-Fri Nov 15 15:23:39 1996 Michael Meissner <meissner@tiktok.cygnus.com>
-
- * pk_disklabel.c (pk_disklabel_create_instance): Fix up some
- warnings generated by GCC.
-
-Sun Nov 17 17:59:14 1996 Andrew Cagney <cagney@kremvax.highland.com.au>
-
- * sim-endian.h: Add LE versions of byte swap macros. Needed for
- PCI devices which are little-endian.
-
- * sim-endian-n.h (endian_le2h_N, endian_h2le_N): Ditto
-
-Sun Nov 17 17:59:14 1996 Andrew Cagney <cagney@kremvax.highland.com.au>
-
- * hw_iobus.c (hw_iobus_attach_address_callback): Change the iobus
- so that it is implementing a 1-1 address map.
-
- * emul_generic.c (emul_add_tree_hardware): Adjust.
-
- * emul_generic.c (emul_add_tree_hardware): Don't add the nvram as
- a default.
-
-Sun Nov 17 17:59:14 1996 Andrew Cagney <cagney@kremvax.highland.com.au>
-
- * device.c (split_find_device): Be tolerant of missing unit
- addresses.
-
-Fri Nov 15 16:49:49 1996 Andrew Cagney <cagney@kremvax.highland.com.au>
-
- * basics.h (port_direction): New type, specify the direction of
- any `port'.
-
- * device.h, device.c (device_interrupt_decode): Include
- specification of port direction in operations.
- (device_interrupt_encode): Ditto.
-
- * device_table.h: Add a direction field to the interrupt port
- table.
-
- * device.c (device_tree_add_parsed): Specify port direction.
-
-Thu Nov 14 21:38:13 1996 Andrew Cagney <cagney@kremvax.highland.com.au>
-
- * hw_opic.c: Finish - second round.
-
-Thu Nov 7 00:18:59 1996 Andrew Cagney <cagney@kremvax.highland.com.au>
-
- * hw_htab.c (htab_init_data_callback): Allow the virtual-address
- to be specified as an array which allows 64bit addresses.
-
- * device.c (device_find_integer_array_property): New function.
- Simplify the querying of elements of an integer array.
- (device_add_integer_property, device_find_integer_property):
- Update to correctly use the cell type.
-
- * vm.c (om_unpack_sr): Clarify shifting comment.
- (om_pte_0_masked_vsid): Ditto. Add 64bit version.
-
- * emul_chirp.c (emul_chirp_create): Initialize the segment
- registers.
-
- * vm.c (om_effective_to_virtual): Trace segment register use.
-
- * hw_htab.c (htab_map_page): Print out the pteg base address to
- simplify cross checking between vm and the htab.
- (htab_decode_hash_table): Use device_error instead of error.
- (htab_map_page): Ditto.
- (htab_dma_binary): Ditto.
- (htab_map_binary): Ditto.
- (htab_init_data_callback): Ditto.
-
-Wed Nov 6 20:20:58 1996 Andrew Cagney <cagney@kremvax.highland.com.au>
-
- * interrupts.h: Clarify what the optional instruction program
- interrupt is - a subset of illegal instruction program interrupt.
-
- * interrupts.c (program_interrupt): For UEA mode, clarify what an
- optional instruction program interrupt is.
- (program_interrupt): For OEA mode, as per spec, generate an
- illegal instruction program interrupt when an optional instruction
- is encountered.
-
- * gen-semantics.c (print_semantic_body): Delete code
- differentiating between an unimplemented floating point and normal
- instruction. Instead, such a case can be handled explicitly.
-
- * ppc-instructions (store floating-point as integer word indexed):
- Mark as optional.
- (Floating Convert to Integer Doubleword): Make the floating point
- assist interrupt explicit.
- (Floating Convert To Integer Doubleword with round towards Zero):
- Ditto.
- (Floating Convert To Integer Word): Ditto
- (Move From FPSCR): Ditto.
- (Move to Condition Register from FPSCR): Ditto.
- (Move To FPSCR Fields): Ditto.
- (Move To FPSCR Field Immediate): Ditto.
- (Move To FPSCR Bit 0): Ditto.
- (Move To FPSCR Bit 1): Ditto.
-
-Mon Nov 4 12:49:13 1996 Andrew Cagney <cagney@kremvax.highland.com.au>
-
- * corefile.c (core_map_read_buffer, core_map_write_buffer): Avoid
- breaking up transfers.
-
- * corefile.c: Adjust arguments so that the client server
- relationship is clarified.
-
- * hw_glue.c (hw_glue_init_address): Update so it can be attached
- to a PCI bus.
-
- * hw_disk.c (hw_disk_instance_write): Add more checks to disk IO -
- looking for things like overflow/underflow.
-
-Sun Nov 3 18:45:20 1996 Andrew Cagney <cagney@kremvax.highland.com.au>
-
- * emul_generic.c (emul_add_tree_hardware): Hang the disk off the
- PAL device instead of the IOBUS. The disk must be attached to a
- logical bus.
-
- * hw_disk.c (hw_disk_init_address): Just use the unit address
- directly in the attach - the rest isn't relevant.
-
-Sat Nov 2 21:48:57 1996 Andrew Cagney <cagney@kremvax.highland.com.au>
-
- * configure.in (sim-hardware, sim-packages): Allow additional
- hardware and packages to be prefixed as well as appended.
-
- * Makefile.in (tmp-hw, tmp-pk): Retain the user specified order of
- packages when building them. Consequently, a user can override a
- standard device by prefixing their own version.
-
- * Makefile.in (hw_opic.o, hw_pci.o, hw_ide.o): Add dependencies.
-
-Fri Nov 1 14:42:57 1996 Michael Meissner <meissner@tiktok.cygnus.com>
-
- * mon.c (_cpu_mon): Add fields for counting 1, 2, 4, and 8 byte
- reads and writes.
- (mon_{read,write}): Count 1, 2, 4, and 8 byte reads/writes.
- (mon_print_info): Correct typo regarding # of unaligned reads and
- writes. Print out how many 1, 2, 4, and 8 byte reads/writes there
- are.
-
-Tue Oct 29 17:55:43 1996 Michael Meissner <meissner@tiktok.cygnus.com>
-
- * configure.in (AC_CHECK_FUNCS): Add access.
- * config{.in,ure}: Regenerate.
-
- * emul_unix.c (do_unix_nop): System call that always succeeds.
- (do_unix_access): Support access system call.
- (solaris_descriptors): Make sigaltstack and sigaction nops.
- ({solaris,linux}_descriptors): Add support for access.
-
-Tue, 8 Oct 18:42:26 1996 Jason Molenda <crash@cygnus.co.jp>
-
- * Makefile.in (clean): Move config.log to distclean.
-
-Fri Nov 1 16:44:28 1996 Andrew Cagney <cagney@kremvax.highland.com.au>
-
- * corefile-n.h (core_map_write_N): Improve abort messages.
-
- * device.h, device.c (device_attach_address): Remove unused name
- parameter.
- (device_detach_address): Ditto.
- * device_table.h, device_table.c: Update.
- * hw_iobus.c (hw_iobus_attach_address_callback): Ditto.
- * hw_nvram.c (hw_nvram_init_address): Ditto.
- * hw_memory.c (hw_memory_init_address): Ditto.
- * hw_vm.c (hw_vm_init_address_callback): Ditto.
- (hw_vm_attach_address): Ditto.
- (hw_vm_add_space): Ditto.
- * hw_init.c (update_for_binary_section): Ditto.
- * hw_core.c (hw_core_attach_address_callback): Ditto.
-
- * hw_iobus.c (hw_iobus_attach_address_callback): Rewrite to handle
- configurable parent busses.
-
-Wed Oct 30 18:46:32 1996 Andrew Cagney <cagney@kremvax.highland.com.au>
-
- * device_table.c (generic_device_size_to_attach_size): Provide
- limited support for multi-cell sizes.
- (generic_device_address_to_attach_address): Ditto for addresses.
-
-Tue Oct 29 02:01:29 1996 Andrew Cagney <cagney@kremvax.highland.com.au>
-
- * device.c (device_add_integer_property): Check for setting of
- #address-cells and #size-cells properties. For these, update the
- corresponding device values.
- (device_nr_address_cells, device_nr_size_cells): Use the value
- from the device instead of the property.
-
- * hw_core.c: Use generic address and size conversions for the top
- bus.
-
- * hw_memory.c (hw_memory_init_address): Tolerate case where
- #address and #size cells is greater than 1.
-
- * device.c (device_tree_print_device): Clean out printing of
- properties.
-
- * device.c (split_device_specifier): Don't detect comments here -
- "#" can be a valid prefix - eg #size-cells.
-
- * psim.c (psim_merge_device_file): Suppress comments and blank
- lines here.
-
- * emul_generic.c (emul_add_tree_hardware): Fix typo of incorrect
- pal unit address. Add the property /#address-cells to the root of
- the tree.
-
- * device.c (device_template_create_device): Check that the unit
- address was successfully parsed.
-
- * device_table.c (generic_device_unit_decode): Rewrite to better
- handle multi-cell addresses.
- (generic_device_unit_encode): Ditto.
-
- * emul_generic.c (emul_add_tree_hardware): "reg" properties no
- longer need the explicit array type - the parser takes care of it.
-
- * pk_disklabel.c (pk_disklabel_create_instance): Add NULL return
- to keep GCC happy.
-
-Mon Oct 28 22:55:48 1996 Andrew Cagney <cagney@kremvax.highland.com.au>
-
- * hw_ide.c: New file. Model of a basic IDE interface attached to
- a PCI bus.
-
- * configure.in (hardware): Add the ide device to the default
- configuration.
- * configure: Regenerate.
-
- * debug.h, debug.c: Add tracing option for the IDE device.
-
-Fri Oct 25 21:28:25 1996 Andrew Cagney <cagney@kremvax.highland.com.au>
-
- * hw_phb.c, hw_phb.h: New files - implement a PHB.
-
- * configure.in (hardware): Add the phb to the list of devices to
- build by default.
-
-Fri Oct 25 21:28:25 1996 Andrew Cagney <cagney@kremvax.highland.com.au>
-
- * hw_com.c: Review description.
- * hw_disk.c: Ditto.
- * hw_htab.c: Ditto.
- * hw_eeprom.c: Ditto.
- * hw_init.c: Ditto.
- * hw_cpu.c: Ditto.
-
- * hw_com.c: Update event handling.
-
- * hw_disk.c: Implement tracing.
-
-Fri Oct 25 21:28:25 1996 Andrew Cagney <cagney@kremvax.highland.com.au>
-
- * device_table.c (generic_device_init_address): Use
- assigned-addresses property in preference to any other reg
- property.
-
-Fri Oct 25 21:28:25 1996 Andrew Cagney <cagney@kremvax.highland.com.au>
-
- * device.h, device.c (device_find_ranges_property): New function.
- Simplify the manipulation of "ranges" properties.
-
- * device.c (device_add_parsed): Extend to include support for the
- ranges property.
-
- * device.c (device_add_parsed): Add assigned-addresses to the list
- of reg type properties.
-
- * device.c (device_tree_print_device): Add code to format and
- print a ranges property.
-
- * device.h, device.c (device_nr_address_cells,
- device_nr_size_cells): New functions. Determine the values of the
- standard properties #address-cells and #size-cells. Both of which
- are optional and have default values of two and one respectfuly.
- Previously, code that determined #address-cells was incorrectly
- using a value of one.
-
-Fri Oct 25 21:28:25 1996 Andrew Cagney <cagney@kremvax.highland.com.au>
-
- * debug.h, debug.c: Sort debug options, Add entries for the
- comming PHB device.
-
-Fri Oct 18 12:12:21 1996 Michael Meissner <meissner@tiktok.cygnus.com>
-
- * ppc-instructions (Floating Select): Add support for fsel unless
- model is 601. Allow user to filter out instruction unless -Fs is
- passed to igen.
- (Store Floating-Point as Integer Word Indexed): Raise optional
- instruction program abort. Allow user to filter out instruction
- unless -Fs is passed to igen.
- (Floating Square Root{, Single}): Ditto.
- (Floating Reciprocal Estimate Single): Ditto.
- (Floating Reciprocal Square Root Estimate): Ditto.
-
- * configure.in (--enable-sim-filter): If not passed, pass 32,f,s
- to igen.
- * configure: Regenerate.
-
- * interrupts.h (program_interrupt_reasons): Add
- optional_instruction_program_interrupt.
-
- * interrupts.c (program_interrupt): Call error with more detailed
- information on program interrupts, particularly in user mode. Add
- support for optional_instruction_program_interrupt.
-
-Wed Sep 25 10:20:29 1996 Andrew Cagney <cagney@kremvax.highland.com.au>
-
- * hw_glue.c: New device. Hooks for manipulating interrupt ports.
-
- * debug.h, debug.c (trace_glue_device): Add tracing support for
- the interrupt glue logic device.
-
- * configure.in (hardware): Add glue device.
- * configure: Regenerate.
-
-Tue Sep 24 20:55:38 1996 Andrew Cagney <cagney@kremvax.highland.com.au>
-
- * device.c (device_tree_parse_integer_property): New function,
- parse a list of integers as an array property.
- (device_tree_add_parsed): Call it.
-
- * device.c (device_tree_parse_string_property): New function,
- parse a list of strings as a string property (with embeded
- null's). For moment, don't try to implement a complext string
- parser.
- (device_tree_add_parsed): Call it.
-
-Tue Sep 24 16:30:48 1996 Andrew Cagney <cagney@kremvax.highland.com.au>
-
- * hw_opic.c: New file. OpenPIC interrupt controller.
-
- * configure.in (hardware): Add opic device.
- * configure: re-generate.
-
- * hw_pic.c: Delete, replaced with hw_opic.c.
-
- * debug.h, debug.c: Add debug option for OpenPIC device. -
- opic-device.
-
-Tue Sep 24 16:30:48 1996 Andrew Cagney <cagney@kremvax.highland.com.au>
-
- * Makefile.in (psim.o, idecode.o): Since idecode and not psim is
- now the file that does all the inlining.
-
- * Makefile.in (LIB_SRC, LIB_INLINE_SRC, idecode.o): Break out the
- library source code that could be involved in an inlining. Make
- idecode.o only dependant on the inlined library source code.
-
- * Makefile.in (LIB_OBJ): Put options last on the list so that it
- is compiled last.
-
- * std-config.h (DEVICE_INLINE): Only inline locals when the
- default is to inline.
-
-Mon Sep 23 00:37:49 1996 Andrew Cagney <cagney@kremvax.highland.com.au>
-
- * hw_htab.c (htab_sum_binary): Determine the real-base for the
- binary.
-
- * hw_htab.c (htab_map_binary): Depending on the value of the
- load-base, either map the program in as a contiguous section or as
- separate sections controled by th binaries lma values.
- (htab_init_data_callback): Ditto.
-
-Sun Sep 22 15:56:22 1996 Andrew Cagney <cagney@kremvax.highland.com.au>
-
- * emul_generic.c (emul_add_tree_options): Remove load-base option.
-
- * emul_chirp.c (map_over_chirp_note): Add load_base field to note
- struct. Don't require the load_base field to be present - just
- issue warning - it is a recent addition.
- (emul_chirp_create): Support both virtual and physical modes.
-
- * emul_chirp.c (emul_chirp_create): Add a stack initialization
- property so that any arguments specified on the command line can
- be passed on to user programs.
-
- * hw_init.c (create_ppc_chirp_bootargs): Add support for chirp
- argument passing to the pseudo device stack.
-
-Sat Sep 21 19:39:56 1996 Andrew Cagney <cagney@kremvax.highland.com.au>
-
- * device.c (device_error): Make it more tolerant to incomplete
- devices.
-
- * hw_init.c (hw_data_init_data_callback): Extend the data device
- so that it can perform initialization operations either dma or a
- more complex instance open, seek, write operation.
- * hw_init.c: Update the description of the data device to reflect
- this.
-
-Sat Sep 21 00:13:02 1996 Andrew Cagney <cagney@kremvax.highland.com.au>
-
- * device.c (device_event_queue_schedule,
- device_event_queue_deschedule, device_event_queue_time): Have the
- device object export the event operations. Making these available
- from the device object should hopefully simplify writing device
- models.
-
-Fri Sep 20 14:04:40 1996 Andrew Cagney <cagney@kremvax.highland.com.au>
-
- * configure.in (sim-hardware): Add eeprom device to default build.
-
- * hw_eeprom.c: Rewrite so it works.
-
- * debug.h, debug.c: Add tracing support for the eeprom and com
- devices.
-
-Thu Sep 19 14:40:40 1996 Andrew Cagney <cagney@kremvax.highland.com.au>
-
- * debug.h: Add disklabel-package and disk-device trace options.
- debug.h (PTRACE): Add macro to simplify tracing in packages.
-
-Thu Sep 19 14:40:40 1996 Andrew Cagney <cagney@kremvax.highland.com.au>
-
- * device.c (device_create_instance_from): Tighten up loop
- searching for device instances.
- (device_instance_delete): Ditto.
- (device_instance_delete): Only leaf instances need to be removed
- from a devices list of active instances.
-
-Thu Sep 19 14:40:40 1996 Andrew Cagney <cagney@kremvax.highland.com.au>
-
- * hw_disk.c: Add the cdrom as an alias.
-
- * pk_disklabel.c (disklabel_delete): Implement, remembering to
- delete the raw disk instance while we're at it.
-
- * pk_disklabel.c (pk_disklabel_create_instance): Implement a
- little bit more - still a long way to go.
-
- * pk_disklabel.c (disklabel_write, disklabel_read): Remember the
- new head position after a read or write.
-
-Thu Sep 19 13:05:40 1996 Andrew Cagney <cagney@kremvax.highland.com.au>
-
- * emul_chirp.c (chirp_emul_read): Allow reads to be longer then
- the internal buffer.
-
-Thu Sep 19 13:05:40 1996 Andrew Cagney <cagney@kremvax.highland.com.au>
-
- * emul_chirp.c (chirp_read_t2h_args): Call memset-0 with the args
- in the correct order.
-
- * emul_chirp.c (chirp_emul_call_method): Correct computation for
- the address of the first stack argument passed in from the client
- program.
-
-Wed Sep 18 19:33:54 1996 Andrew Cagney <cagney@kremvax.highland.com.au>
-
- * words.h: Add new types signed_cell and unsigned_cell which
- correspond to the signed and unsigned IEEE 1275 memory locations.
- * device.h, device.c, emul_chirp.c: Where refering to an IEEE 1275
- memory cell, replace uses of unsigned32 with unsigned_cell.
- * device_table.h: Ditto.
-
- * sim-endian.h: Add new macros H2BE_cell and BE2H_cell which
- convert cell sized values to from big endian.
- * device.c, emul_chirp.c: Where refering to IEEE 1275 memory cells
- use these new macros.
-
-Tue Sep 17 15:57:44 1996 Andrew Cagney <cagney@kremvax.highland.com.au>
-
- * device.c (device_tree_add_parsed): Detect and report an
- interrupt being attached to an invalid device. Was dumping core.
-
-Mon Sep 16 23:09:12 1996 Andrew Cagney <cagney@kremvax.highland.com.au>
-
- * device.h, device.c (device_address_to_attach_address,
- device_size_to_attach_size): New functions. Convert a devices
- unit address or unit size structure into a form suitable for
- passing on to the attach and detach functions.
- * device_table.h: Add extra methods to device table.
-
- * device.h, device.c (device_find_reg_property): New function.
- For a reg type property, return the selected address + size
- tupple, along with a positive success status. Add a reg_property
- to the list of property types.
- * (device_tree_add_parsed): Make array properties with the name
- reg or alternate-reg of type reg_property.
-
- * hw_memory.c (hw_memory_init_address): Rewrite to use new
- find_reg_property method.
- * hw_nvram.c (hw_nvram_init_address): Ditto.
-
- * device.c (device_tree_print_device): Add code to print out a reg
- property.
-
- * device_table.c (generic_device_address_to_attach_address,
- generic_device_size_to_attach_size ): New functions. Generic
- functions for converting between unit and attach address or size.
-
- * device_table.c (generic_device_init_address): Rewrite to use the
- new find_reg and address convert functions. Look for both reg and
- alternate-reg properties.
-
-Mon Sep 16 23:09:12 1996 Andrew Cagney <cagney@kremvax.highland.com.au>
-
- * hw_com.c: New file. A '550 serial device that can quickly be
- attached to any bus.
- * configure.in (enable-sim-hardware): Add the com device.
- * configure: re-generate.
-
-Thu Sep 12 17:30:56 1996 Andrew Cagney <cagney@kremvax.highland.com.au>
-
- * device.c (device_tree_verify_reg_unit_address): New
- function. Check that the unit address as specified by the reg
- property correctly corresponds to any unit address previously
- specified by the devices name.
- (device_tree_add_parsed): When adding a reg property, verify
- that the unit-address - first value of property - correctly
- matches any previous value specified when creating the device
- node.
-
-Thu Sep 12 17:30:56 1996 Andrew Cagney <cagney@kremvax.highland.com.au>
-
- * mon.c (mon_event): Remove assertion that an unsigned is >= 0.
-
-Fri Aug 16 12:05:24 1996 Michael Meissner <meissner@tiktok.cygnus.com>
-
- * device.c (device_full_name): Cast strdup to char *, since AIX
- 3.2.5 mistakenly declares the function to be const char *.
- (device_create_from): Ditto.
- (device_create_instance_from): Ditto.
- (device_add_property): Ditto.
-
-Tue Aug 13 11:40:14 1996 Michael Meissner <meissner@tiktok.cygnus.com>
-
- * debug.c (trace_option): For -t all, do not set the
- trace_dump_device_tree flag, so that the simulator is run.
-
-Tue Aug 13 11:40:14 1996 Michael Meissner <meissner@tiktok.cygnus.com>
-
- * Makefile.in (options.o): Depend on defines.h.
- (defines.h): New rule, go through config.h and make strings of all
- of the #define HAVE_xxx macros.
- (distclean): Remove defines.h.
-
- * options.c (print_options): Print whether many of the
- configuration macros are defined.
-
- * main.c (main): If -t options and no filename, just print the
- options, and don't print the usage message.
-
-Mon Aug 12 18:42:37 1996 Michael Meissner <meissner@tiktok.cygnus.com>
-
- * configure.in: Test whether /dev/zero works on the system, and if
- it does, define HAVE_DEVZERO.
- * configure: Regenerate.
-
- * emul_generic.c (emul_add_tree_hardware): Do not add /iobus/disk
- if we don't have a working /dev/zero on the system.
-
- * emul_bugapi.c (emul_bugapi_init): If HAVE_DEVZERO is not
- defined, don't add disk support.
- (emul_bugapi_do_diskio): Ditto.
- (emul_bugapi_instruction_call): Ditto.
-
-Wed Aug 7 14:34:20 1996 Michael Meissner <meissner@tiktok.cygnus.com>
-
- * emul_unix.c (HAVE_TCGETATTR): If HAVE_TERMIOS_STRUCTURE is not
- defined, make sure HAVE_TCGETATTR is #undef'ed
-
-Wed Aug 7 14:34:20 1996 Michael Meissner <meissner@tiktok.cygnus.com>
-
- * std-config.h (REGPARM): Only define REGPARM attributes if using
- GNU C. Test for __i686__ in case GCC ever defines it. If not on
- a x86 platform, define REGPARM as nothing.
-
- * sim-endian.h (WITH_HOST_BYTE_ORDER): Test for i686 and __i686__
- also.
-
-Wed Aug 7 20:19:55 1996 Andrew Cagney <cagney@kremvax.highland.com.au>
-
- * ld-decode.h, ld-decode.c: Rename goto_gen to the more correct
- goto_switch_gen.
- * gen-idecode.c: Ditto.
-
- * gen-idecode.c (print_idecode_table): Comment out check for
- switch/table combination until a bug with it is fixed.
-
- * ppc-opcode-goto: New file. Like complex and flat but uses
- goto-switch instead of padded-switch for the tables.
-
- * gen-idecode.c (print_goto_switch_name): New function.
- (print_goto_switch_table_leaf): New function.
- (print_goto_switch_break): New function.
- (print_goto_switch_table): New function. Prints a jump table
- that can be jumped into instead of a switch statement.
-
- * gen-idecode.c (*switch_*): As an option output a switch that is
- implemented using a jump table but only if the switch is not
- boolean.
-
-Tue Aug 6 09:28:22 1996 Michael Meissner <meissner@tiktok.cygnus.com>
-
- * configure.in (--enable-sim-{hardware,packages}): Fix typos.
- * configure: Regenerate.
-
- * device.c (device_instance_call_method): Fixup format message in
- error case. Return 0 in case of error to shut up compiler
- warnings.
-
-Wed Aug 7 00:17:37 1996 Andrew Cagney <cagney@kremvax.highland.com.au>
-
- * device_table.c (generic_device_unit_decode): Require a comma
- between elements of a unit address.
-
- * device.c (device_tree_print_device): For reg, alternate-reg and
- ranges properties use special print functions.
- (device_print_ranges_property): Print formatted ranges property.
- (device_print_reg_property): Print formatted reg property.
-
-Tue Aug 6 21:35:18 1996 Andrew Cagney <cagney@kremvax.highland.com.au>
-
- * device.c (device_tree_add_parsed): For reg, ranges and
- alternate-reg properties use a special parser.
- (device_tree_parse_reg_property): New function to parse a reg
- property.
- (device_tree_parse_ranges_property): New function to parse a
- ranges property.
- (device_encode_unit): Wrapper for encode_unit callback.
- (device_decoce_unit): Wrapper for decode_unit callback.
-
-Wed Jul 31 00:02:30 1996 Andrew Cagney <cagney@kremvax.highland.com.au>
-
- * device_table.h (device_instance_callbacks): Relace the claim and
- release methods with a more general table mapping from method-name
- to method-function.
-
- * device.c (device_instance_call_method): New function. Implement
- the OpenBoot call-method client interface. Attempts to locate the
- instances method in the callback table.
- (device_instance_claim, device_instance_release): Delete.
- Replaced with call-method and a lookup table.
-
- * emul_chirp.c (chirp_emul_call_method): Use the new device
- instance call method and let that handle a client claim call.
-
- * hw_htab.c (claim_memory): Wrapper function to call the memory
- devices "claim" method using the new device-instance call-method
- interface. Replaces the previous direct calls to claim.
- (htab_map_region): Use claim_memory.
- (htab_init_data_callback): Ditto.
-
- * hw_memory.c (hw_memory_instance_claim): Update function
- interface so that it is compatible with call-method.
- (hw_memory_instance_release): Ditto.
- (hw_memory_instance_methods): New table of memory specific
- methods claim and release. Add to the hw_memory_callback
- table.
-
-Tue Jul 30 21:26:14 1996 Andrew Cagney <cagney@kremvax.highland.com.au>
-
- * psim.c (psim_init): Back out of change to initial value of
- system->last_cpu.
-
-Tue Jul 30 21:12:24 1996 Andrew Cagney <cagney@kremvax.highland.com.au>
-
- * sim_callbacks.h (sim_io_printf_filtered): Replace
- printf_filtered with a local simulator specific version. Add
- #define printf_filtered to simplify updating of existing code.
-
- * sim_callbacks.h (sim_io_write_stdout, sim_io_read_stdin,
- sim_io_write_stderr): New functions. Read / write to the
- simulations stdin and stdout and stderr interfaces. Merge in code
- from hw_pal that previously handled async I/O.
- (sim_io_flush_stdoutput): Rename flush_stdoutput. Add #define
- flush_stdoutput to simplify updating of existing code.
-
- * hw_pal.c (scan_hw_pal, write_hw_pal,
- hw_pal_instance_write_callback): Use the new sim_io functions.
-
- * main.c: Implement standalone versions of the new sim_io
- functions. Include support for async I/O.
- * sim_calls.c: Ditto. This time using the gdb callback table.
-
- * std-config.h (CURRENT_STDIO, current_stdio): New macro. Set up
- stdio configuration so that it works in the same way as the rest
- of the simulation.
- * psim.c (psim_create): Initialize current_stdio from the device
- tree.
- * emul_generic.c (emul_add_tree_options): Enter a default value
- for use-stdio in the device tree.
-
-Fri Jul 26 19:43:03 1996 Andrew Cagney <cagney@kremvax.highland.com.au>
-
- * gen-idecode.c (print_jump): Was always generating a jump back to
- idecode. Only necessary at tail of semantic code.
- (print_jump): Was always setting the processor's cia, even during
- startup when the processor was still undefined.
- (print_jump): For safety, restart smp loop when cpu_nr >= nr_cpus,
- not just equal.
-
- * options.c (print_options): Add printing of WITH_REGPARM and
- WITH_STDCALL.
-
- * std-config.h (WITH_REGPARM, WITH_STDCALL): Provide default
- (disabled) values if not defined.
-
-Fri Jul 26 00:36:35 1996 Andrew Cagney <cagney@kremvax.highland.com.au>
-
- * ppc-cache-rules (cache): Change RS and RB to cache instead of
- compute. The block move instructions use them.
-
- * idecode_expression.h (FPSCR_SET): New macro, set specific FPSCR
- register.
- (CR_FIELD): New macro, extract specific CR register.
- (FPSCR_FIELD): New macro, extract specific FPSCR register.
-
- * registers.h (GPR): New macro, simplify accesses to GPR[i].
-
- * bits.c (INSERTED): Covert INSERTED macro into a function.
- (EXTRACTED): Conditionally compile on correct bit size macro.
-
- * bits.h (BIT8): New macro, set a single bit in an 8 bit byte.
-
- * ppc-instructions: With hints from Paul Martin, type in missing
- some instruction semantics. Leave disabled for the moment.
- (Load Multiple Word): Ditto.
- (Store Multiple Word): Ditto.
- (Load String Word Immediate): Ditto.
- (Load String Word Indexed): Ditto.
- (Store String Word Immedate): Ditto.
- (Store String Word Indexed): Ditto.
- (Move to Condition Register from XER): Ditto.
- (Move From Condition Register): Ditto.
- (Move From FPSCR): Ditto.
- (Move to Condition Register from FPSCR): Ditto.
- (Move To FPSCR Field Immediate): Ditto.
- (Move To FPSCR Fields): Ditto.
- (Move To FPSCR Bit 0): Ditto.
- (Move To FPSCR Bit 1): Ditto.
-
-Thu Jul 25 22:10:40 1996 Andrew Cagney <cagney@kremvax.highland.com.au>
-
- * std-config.h (SEMANTICS_INLINE): By default, mask out the
- inlining of semantic functions from DEFAULT_INLINE. Almost all
- configurations call the semantic code via a pointer so there is
- little benefit.
-
- * std-config.h (ICACHE_INLINE): Ditto.
-
-Thu Jul 25 20:07:30 1996 Andrew Cagney <cagney@kremvax.highland.com.au>
-
- * configure.in (sim_regparm): Add configuration option for
- enabling GCC's regparm attribute.
- * (sim_stdcall): Add configuration option for enabling GCC's
- stdcall attribute.
-
- * Makefile.in (REGPARM_CFLAGS): Pass regparam configuration onto
- compilations.
- * (STDCALL_CFLAGS): Pass stdcall configuration onto compilations.
-
- * std-config.h (REGPARM): Extend construction of REGPARM macro so
- that it can include __stdcall__ function attribute.
-
-Wed Jul 24 19:04:20 1996 Andrew Cagney <cagney@sawnoff>
-
- * options.c (print_options): Include SUPPORT_INLINE in information
- dump.
-
- * gen-idecode.c (print_run_until_stop_body): Only generate loop
- termination test if creating idecode_run_until_stop. Push the
- loop termination test back into each alternative branch.
-
-Wed Jul 24 15:47:09 1996 Andrew Cagney <cagney@kremvax.highland.com.au>
-
- * gen-icache.c (print_icache_function): Have the cache function
- always update the cache_entries semantic and address fields.
-
- * gen-idecode.c (print_idecode_switch_illegal): Include a break
- when generating illegal instructions. This was commented out
- which is a hangover from looking a at switch statements generated
- using indirect jumps.
-
-Tue Jul 23 20:57:01 1996 Andrew Cagney <cagney@kremvax.highland.com.au>
-
- * igen.c (print_my_defines): Replaces print_define_my_index.
- Print both a definition for MY_INDEX and MY_PREFIX.
- * gen-icache.c (print_icache_function): Adjust.
- * gen-idecode.c (print_jump_insn): Adjust.
- * gen-semantics.c (print_c_semantic): Adjust.
-
- * gen-support.c (gen_support_h): Add optional include to created
- support.h so that, like cpu, it is optionally inlined for all
- modules that include it.
- * inline.h, inline.c: Adjust so that support.[hc] is handled the
- same as cpu.[hc].
-
- * idecode_fields.h (LABEL, GOTO): Macro's that create a unique
- name for a lable and then branch to it.
-
- * ppc-instructions (convert_to_integer, Floating Round to
- Single-Precision, Floating Convert from Integer Doubleword): Use
- LABEL and GOTO instead of the recently added switch statements.
-
-Wed Jul 24 14:02:42 1996 Andrew Cagney <cagney@sawnoff.highland.com.au>
-
- * gen-idecode.c (print_run_until_stop_body): Too many rparen in
- generated code.
-
-Tue Jul 23 20:57:01 1996 Andrew Cagney <cagney@kremvax.highland.com.au>
-
- * configure.in (--enable-sim-line-nr): Typo - sim_line-nr.
- * (--enable-sim-inline): Reorder patern matching of arguments so
- that SUPPORT=ALL_INLINE is reconized as *=* and not *_INLINE.
-
- * configure: rebuild.
-
-Mon Jul 22 23:25:08 1996 Andrew Cagney <cagney@highland.com.au>
-
- * configure.in (--enable-sim-hardware, --enable-sim-packages): New
- configuration options. Let the user specify the packages or
- hardware devices that are to be included in the build. Makes it
- possible for user packages to be specified.
-
- * Makefile.in (tmp-pk, tmp-hw): Just use the list of packages and
- hardware instead of checking it using ls. configure.in should
- have taken care of any problems.
- (HW_SRC, HW_OBJ, PACKAGE_SRC, PACKAGE_OBJ): Set by configure.
-
-Mon Jul 22 22:38:59 1996 Andrew Cagney <cagney@highland.com.au>
-
- * psim.c (psim_options): Enter the argument to the memory size
- option directly into the device tree. Was using atol() which is
- dangerously non portable.
-
-Mon Jul 22 22:17:08 1996 Andrew Cagney <cagney@highland.com.au>
-
- * configure.in (icache): Extend icache flag to include an insn
- option. If specifyed the insn - aka instruction - is included in
- the instruction cache. Make this the default.
- * configure: re-generate.
-
- * igen.c (main), igen.h: Add option -S - inSn - for specifying
- that the instruction should be included in the icache.
-
- * gen-icache.c (print_icache_body): If enabled, output code to put
- the instruction into the icache.
- (print_icache_struct): If enabled, add insn to the icache struct.
-
-Mon Jul 22 20:46:12 1996 Andrew Cagney <cagney@highland.com.au>
-
- * Makefile.in (BUILD_CFLAGS): Include -g when building the
- generators.
-
-Mon Jul 22 20:00:25 1996 Andrew Cagney <cagney@highland.com.au>
-
- * emul_generic.c (emul_add_tree_options): Was incorrectly setting
- the strict-alignment option when hardwired for non-strict
- alignment.
-
-Sun Jul 21 21:18:05 1996 Andrew Cagney <cagney@kremvax.highland.com.au>
-
- * gen-semantics.c: Make the my_index variable a macro MY_INDEX.
-
- * ppc-instructions: Adjust so that references are to MY_INDEX and
- not my_index.
-
-Sun Jul 21 21:18:05 1996 Andrew Cagney <cagney@kremvax.highland.com.au>
-
- * gen-idecode.c: Output the complete run_until_stop function
- instead of just the code to handle a single instruction issue.
- * : Have the generated idecode.c include inline.c (instead of psim.c).
-
- * std-config.h: Change psim.c so that it isn't inlined (as this is
- no longer needed).
-
- * psim.c (run_until_stop): Delete the old run_until_stop function
- instead calling the idecode_run and idecode_run_until_stop
- functions that gen-idecode.c is now creating.
-
-Sun Jul 21 21:18:05 1996 Andrew Cagney <cagney@kremvax.highland.com.au>
-
- * dgen.c: Maintenance - update to use new features found in lf.c.
-
- * filter_filename.c (filter_filename): Maintenance - make the
- string constant.
-
-Sun Jul 21 21:18:05 1996 Andrew Cagney <cagney@kremvax.highland.com.au>
-
- * debug.c (TRACE, ITRACE, DTRACE): Have GCC instead of CPP
- eliminate trace statements.
-
- * debug.c: Change trace format so that it is consistent
- (file:line-nr) with CC's error output.
-
- * gen-itable.c (itable_c_insn): Add the source file name and
- source line number to the instruction's informational entry.
-
- * debug.c (ITRACE): Use the itable (and my_index) to get the
- current instructions name and source line number.
-
- * gen-semantics.c, gen-icache.c: Adjust generated ITRACE calls to
- match new interface.
-
- * emul_bugapi.c (emul_bugapi_instruction_call): Adjust
- corresponding call to ITRACE so that it still matches.
-
- * idecode_expression.h (ALU_END, CR0_COMPARE): Use TRACE instead
- of ITRACE. The CPP line directives would have previously set the
- line-nr and file name so ITRACE isn't needed.
-
-Sun Jul 21 21:18:05 1996 Andrew Cagney <cagney@kremvax.highland.com.au>
-
- * gen-idecode.c (print_jump_until_stop_body): New function and
- idecode generation option. Instead of generating and calling
- separate functions containing the semantic and icache code
- generate a single monolythic function and use goto's (and GCC's
- indirect jump) to move between code blocks.
-
- * Makefile.in: Add sim_jump flag to those passed to igen.
-
- * configure.in: New option --enable-sim-jump (default disabled)
-
- * ppc-instructions: Eliminate any uses of labels and goto's.
- These result in duplicate declarations when a single flat function
- is being create.
-
- * ppc-opcode-jump: New file. Set of opcode rules useful when
- testing jumping idecodes.
-
-Sun Jul 21 21:18:05 1996 Andrew Cagney <cagney@kremvax.highland.com.au>
-
- * gen-idecode.c: Optionally include the semantic code for an
- instruction in the function that is doing the decoding.
-
- * igen.c: Add option (-C) to generate semantics in the instruction
- decode functions.
-
- * configure.in (--enable-sim-icache): Accept an option list such
- as 1024,define. Add a new choice to the list - semantic - which
- will cause igen to generate instruction decode functions that
- include the corresponding semantic code.
-
-Sun Jul 21 21:18:05 1996 Andrew Cagney <cagney@kremvax.highland.com.au>
-
- * configure.in: New option --enable-sim-line-nr (default enabled).
- Enable/disable the inclusion of CPP line directives in the
- generated files. Such directives refer back to the source files
- used when generating the simulator code.
-
- * Makefile.in (sim_line_nr): Pass to igen.
-
-Sun Jul 21 21:18:05 1996 Andrew Cagney <cagney@kremvax.highland.com.au>
-
- * igen.c (main): Revamp the options so that more letters are
- available.
-
- * configure.in: Adjust to match igen's revamped options
-
-Sun Jul 21 21:18:05 1996 Andrew Cagney <cagney@kremvax.highland.com.au>
-
- * Makefile.in (pk.h, hw.h): Rewrite depenencies for hw.h (etc) so
- that they use the same technique as igen (ie a dummy targets
- tmp-pk and tmp-hw are created).
-
-Mon Jun 24 22:28:00 1996 Andrew Cagney <cagney@kremvax.highland.com.au>
-
- * Makefile.in (BUILD_CFLAGS): Include WARNING_CFLAGS.
-
-Wed Jun 19 21:45:28 1996 Andrew Cagney <cagney@kremvax.highland.com.au>
-
- * ld-cache.[hc], ld-decode.[hc], ld-insn.[hc]: New files. Separate
- out the loading of each of the tables from the rest of igen.
- * Makefile.in: Adjust.
- * igen.c: Adjust.
-
- * gen-icache.[hc], gen-idecode.[hc], gen-itable.[hc],
- gen-model.[hc], gen-semantics.[hc]: New files. Separate out the
- code creating each separate set of generated files.
- * Makefile.in: Adjust.
- * igen.c: Adjust.
-
- * gen-support.[ch]: New files. Output the support functions (found
- in the ppc-instructions file) into a separate file.
- * Makefile.in: Add.
- * inline.h, inline.c: Add.
- * std-config.h: Add.
-
- * ld-cache.c: Re-design the cache table format.
- * ppc-cache-rules: Update to new format.
-
- * ld-decode.c: Re-design the decode table format.
- * ppc-opcode-simple: Update to new format
- * ppc-opcode-complex: Ditto
- * ppc-opcode-flat: Ditto
-
- * filter.h, filter.c: New files. Separate the opcode filter table
- reading code from the rest of igen.c. Re-design the filter so that
- it works inclusivly not exclusivly.
- * igen.c: Remove the opcode filter table loading code.
- * Makefile.in (filter.o): Adjust
- * configure.in: Adjust filter flag so that default includes 32bit
- and floating point.
- * ppc-instructions: Clean up filter fields so that only in use
- entries are specifed (ie delete `be').
-
- * misc.c (name2i, i2name): New function. Map between a string and
- an integer value.
-
-Mon Jun 17 20:08:03 1996 Andrew Cagney <cagney@kremvax.highland.com.au>
-
- * sim_calls.c (sim_close): If simulator not created, skip printing
- of run information.
-
-Mon Jun 17 20:08:03 1996 Andrew Cagney <cagney@kremvax.highland.com.au>
-
- * registers.c (register_description): Typo, insns not insn.
-
- * ppc-instructions (model_get_number_of_stalls): New model function,
- returns number of stalls for the specified processor.
- * psim.c (psim_read_register): Add call to new function
- model_get_number_of_stalls().
-
- * ppc-instructions (model_get_number_of_cycles): New model function,
- returns number of stalls for the specified processor.
- * psim.c (psim_read_register): Add call to new function
- model_get_number_of_cycles().
-
-Fri Jun 14 00:11:56 1996 Andrew Cagney <cagney@kremvax.highland.com.au>
-
- * device_table.h: Don't pass the parent device into a devices
- create function. This makes the create function consistent with
- the documentation.
- * device.c (device_template_create_device): Ditto
- * hw_pal.c (hw_pal_create): Ditto
- * hw_core.c (hw_core_create): Ditto
- * hw_vm.c (hw_vm_create): Ditto
- * hw_disk.c (hw_disk_create): Ditto
- * hw_nvram.c (hw_nvram_create): Ditto
- * hw_memory.c (hw_memory_create): Ditto
- * hw_cpu.c (hw_cpu_create): Ditto.
-
- * device.c (split_find_device): Allow a null initial parent device.
- (device_template_create_device): Ditto.
-
- * device.c (device_create_from): Make local (static) only used
- within device.c.
- * device_table.h: typedef device_callbacks moved here (from
- device.h) where it belongs.
-
- * hw_core.c: New file. Implements just the core device using the
- core object.
-
- * corefile.c: Moved all core device functions into the new
- hw_core.c file. core_device_create() disapears.
-
- * psim.c (psim_tree): Use device_tree_add_parsed() to create the
- core device.
-
-Thu Jun 13 00:09:29 1996 Andrew Cagney <cagney@kremvax.highland.com.au>
-
- * hw_init.c: Correct typo in comment.
-
- * corefile.c (core_init): Remove any remaining references to a
- default map.
- (core_map_find_mapping): Ditto.
-
-Wed Jun 12 22:30:32 1996 Andrew Cagney <cagney@kremvax.highland.com.au>
-
- * corefile.c (core_init): Make function global so that other
- devices are able to use the full core object.
-
- * corefile.c (core_create, core_from_device): Break core_create
- into two functions. The first creates a core object, the second
- returns the core object associated with a core device.
-
- * corefile.c (core_device_create): Use core_create to make the
- core object.
-
- * psim.c (psim_create): Use core_from_device() instead of
- core_create().
-
- * device.c (device_template_create_device): Make static as only
- needed by functions internal to device.c.
-
-Fri Jun 7 23:47:18 1996 Andrew Cagney <cagney@kremvax.highland.com.au>
-
- * ppc-opcode-test-2: Remove description of fields.
- * ppc-opcode-complex: Ditto
- * ppc-opcode-flat: Ditto
- * ppc-opcode-simple: Ditto
- * ppc-opcode-stupid: Ditto
- * ppc-opcode-test-1: Ditto
- * ppc-cache-rules: Ditto
-
- * igen.c: Add description of files as a comment at the front.
-
-Wed Jun 26 12:50:33 1996 Michael Meissner <meissner@tiktok.cygnus.com>
-
- * configure.in: Check for whether the termios and termio
- structures are really defined, and whether or not, they define the
- c_line field.
- * configure: Regenerate.
-
- * Makefile.in ({,TERMIO_}CFLAGS): Add TERMIO_CFLAGS options set by
- configure.
-
- * emul_unix.c: Various changes to allow for building on systems
- with different termio and termios structures. If host has both
- termio and termios, just use termios. No longer include
- sys/ioctl.h.
-
-Wed Jun 26 12:26:55 1996 Jason Molenda (crash@godzilla.cygnus.co.jp)
-
- * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
- INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
- (docdir): Removed.
- * configure.in (AC_PREREQ): autoconf 2.5 or higher.
- (AC_PROG_INSTALL): Added.
- * configure: Rebuilt.
-
-Wed Jun 5 23:53:42 1996 Andrew Cagney <cagney@kremvax.highland.com.au>
-
- * corefile.h: Rewrite documentation so that it can be extracted and
- converted into texinfo (and hence ready for translation into html,
- tex or nroff).
- * device.h: Ditto
-
-Thu Jun 6 09:52:37 1996 Michael Meissner <meissner@tiktok.cygnus.com>
-
- * hw_disk.c (SEEK_SET): If SEEK_SET is not defined, define as 0.
-
-Wed Jun 5 11:46:52 1996 Andrew Cagney <cagney@puddin>
-
- * hw_disk.c: Include <unistd.h> if available. Under SunOS, that
- is the source of SEEK_SET.
-
-Wed Jun 5 01:39:07 1996 Andrew Cagney <cagney@kremvax.highland.com.au>
-
- * psim.c (psim_options): Correct type of dummy arguments being
- passed to a device_ioctl call.
-
- * hw_init.c (hw_data_init_data_callback): Adjust printf arguments.
- (write_stack_arguments): Ditto.
- * hw_trace.c: Instance callback entry no longer a table.
-
-Wed Jun 5 01:39:07 1996 Andrew Cagney <cagney@kremvax.highland.com.au>
-
- * emul_unix.c (do_unix_umask): Cast printf argument.
- (convert_to_linux_termios): Use LINUX_VSWTC not LINUX_VSWCH
-
-Mon Jun 3 15:02:04 1996 Michael Meissner <meissner@tiktok.cygnus.com>
-
- * hw_init.c (update_for_binary_section): Abort if we find an
- .interp section, which indicates the need for shared libraries to
- be loaded.
-
-Mon Jun 3 15:02:04 1996 Michael Meissner <meissner@tiktok.cygnus.com>
-
- * emul_unix.c (do_unix_{time,gettimeofday,getrusage}): Add support
- for time, gettimeofday, and getrusage system calls.
- ({solaris,linux}_descriptors): Add new system calls.
- (do_get{,e}{uid,gid}): Use gid_t/uid_t types.
- (do_get{,p}pid): Use pic_t types.
-
- * configure.in (AC_TYPE_{GETGROUPS,SIGNAL}): Define.
- (AC_TYPE_{MODE,OFF,PID,SIZE,UID}_T): Define.
- * config{.in,ure}: Regenerate.
-
-Mon Jun 3 23:19:57 1996 Andrew Cagney <cagney@kremvax.highland.com.au>
-
- * emul_netbsd.c (emul_netbsd_create): Use the more specific names
- `ppc-elf' and `ppc-xcoff' for the stack-type.
- * emul_unix.c (emul_unix_create): Ditto.
- * emul_bugapi.c (emul_bugapi_create): Ditto.
- * hw_init.c: Reconize the new names.
-
- * emul_unix.c (do_unix_break): Adjust so that the updated ioctl
- call is used (no system parameter).
-
-Sun Jun 2 11:21:17 1996 Michael Meissner <meissner@tiktok.cygnus.com>
-
- * emul_unix.{h,c}: New files to provide Solaris and Linux system
- call emulations.
-
- * Makefile.in (LIB_{SRC,OBJ}): Add emul_unix.{c,o}.
- (os_emul.o): Depend on emul_unix.h.
- (emul_unix.o): New dependency.
-
- * configure.in (--enable-sim-alignment): Add 0|default to mean set
- alignment to 0, which means use appropriate alignment for mode.
- (AC_CHECK_FUNCS): Add new functions needed by emul_unix.c.
- (AC_CHECK_HEADERS): Add new include files needed by emul_unix.c.
- * config.in: Regenerate.
- * configure: Regenerate.
-
- * emul_generic.c (emul_write2_status): New function to return
- results in r3 and r4 for Solaris system calls.
- (emul_do_system_call): If the system call is not support, but
- there is a string for the system call name, print out the string
- instead of the system call number.
-
- * emul_generic.h (emul_write2_status): Declare it.
-
- * emul_netbsd.c: Use /* */ around comment on #endif.
-
- * os_emul.c: Include emul_unix.h.
- (os_emulations): Add emulations for Solaris, and Linux.
-
- * psim.c (psim_usage): Add message about solaris, linux
- emulations.
-
-Thu May 30 00:00:10 1996 Andrew Cagney <cagney@kremvax.highland.com.au>
-
- * hw_iobus.c: Tidy up notes so that they can be auto-extracted.
-
- * README: Correct PSIM's title
-
-Wed May 29 23:50:26 1996 Andrew Cagney <cagney@kremvax.highland.com.au>
-
- * basics.h: New global type object_disposition, used to indicate
- the status of objects when things are restarted.
-
-Fri May 17 17:28:52 1996 Andrew Cagney <cagney@benjimen.highland.com.au>
-
- * device_table.h: Change the interrupt descriptor structure so
- that it includes an additional member - an upper bound on the
- interrupts by that name.
-
- * device.c (device_interrupt_decode): Allow a range of interrupt
- ports (eg rst0 .. rst6) if the port descriptors bound is non zero.
-
- * device.c (device_tree_print_device): Include a list of valid
- interrupt ports when listing supported devices.
-
- * device.h, device.c (device_child_interrupt_*): Delete. Not used.
-
- * emul_generic.c (emul_add_tree_hardware): Modify the creation of
- the interrupt net so that it uses int0 .. intN.
-
-Tue May 14 23:03:53 1996 Andrew Cagney <cagney@kremvax.highland.com.au>
-
- * device.h, device.c (device_ioctl): Drop the system argument.
- Devices can not obtain this using the device_system() call.
- * device_table.h: Adjust accordingly.
- * hw_*.c: Adjust accordingly.
- * emul_netbsd.c (do_break): Adjust call to vm device accordingly.
- * psim.c (psim_options): Use a device_ioctl call to force the
- hw_trace device to update the trace options.
- * hw_trace.c: Replace the init function with an ioctl call. Adjust
- doc accordingly.
-
- * psim.c (psim_init): Re-order initialization so that the
- os-emulation is initialized after the device tree. Without this,
- os-emul's are not able to create instances or access properties
- that contain an instance handle.
-
- * device.h, device.c (device_add_*_property): Make these functions
- internal to device.c. The user has access to the more generic
- device_tree_add_parsed function. Differentiate between the initial
- and current value for each property.
- * (clean_device_properties): New function that deletes any
- properties created after the start of a simulation and restores
- the initial value of any others (ignoring ihandles).
- * (init_device_properties): (Re)Initialize any properties that
- contain ihandles. create
-
- * (device_tree_init): Include calls to clean the device tree's
- properties and then initialize them. Document this in the device.h
- file.
-
-Mon May 6 17:36:15 1996 Andrew Cagney <cagney@kremvax.highland.com.au>
-
- * interrupts.c (decrementer_interrupt): Always pend a decrementer
- interrupt even if it is not yet possible to deliver it.
-
-Wed May 1 12:26:51 1996 Andrew Cagney <cagney@benjimen>
-
- * mon.h, mon.c (mon_get_number_of_insns): Make this externally
- visable adjusting the arguments so that the interface is correct.
- (mon_print_info): Adjust calls.
-
- * registers.h, registers.c (register_description): Add phony
- cycle, insn and stall registers.
-
- * psim.c (psim_read_register): Return nr of instructions for given
- processor.
-
-Tue Apr 30 22:09:09 1996 Andrew Cagney <cagney@kremvax.highland.com.au>
-
- * hw_htab.c: New file. Extract contents from disk_table.c.
- Contains a device that, during initialization will create a
- PowerPC htab in memory.
- * hw_register.c: New file. Extract contents from disk_table.c.
- Contains a device that, during initialization, will parse its
- property list and use that to initialize various processor
- registers (not target specific).
- * hw_vm.c: New file. Extract contents from disk_table.c. Contains
- a device that handles accesses to invalid virtual memory addresses
- (in user mode).
- * hw_init.c: New file. Extract contents from disk_table.c. Misc
- devices that can initialize memory from a file.
- * hw_trace.c: New file. Extract contents from disk_table.c.
- Configure trace options from property values.
-
- * Makefile.in (hw_htab.o, hw_register.o, hw_vm.o, hw_init.o,
- hw_trace.c): Add new device files.
-
- * device_table.c: Remove above code, now in separate independant
- files.
-
-Fri Apr 26 00:00:07 1996 Andrew Cagney <cagney@kremvax.highland.com.au>
-
- * hw_disk.c: New file. Disk and CDROM device.
-
- * Makefile.in (hw_disk.o): Add device hw_disk.c.
-
- * pk_disklabel.c: New file. Implement the miss-named disk-label
- package.
-
- * Makefile.in (pk.h): Create the file pk.h that contains a list of all
- the packages.
-
- * Makefile.in (hw.h, hw.c): Add dependancy on Makefile so that
- they are re-created when the makefile is updated.
-
- * emul_generic.c (emul_add_tree_hardware): Add a disk device
- (below the iobus) to the device tree. Include an ihandle of
- the disk as /chosen/disk.
-
- * emul_bugapi.c (emul_bugapi_create): Don't initialize the input,
- output and (new) disk handles yet.
- * (emul_bugapi_init): Initialize the input, output (and just added)
- disk ihandles here.
- * (emul_bugapi_do_diskio): New. Performs disk i/o (well at least
- what I think the behavour is).
- * emul_bugapi.c (emul_bugapi_instruction_call): Add hook to disk
- i/o bug call. For RETURN call, exit using gpr[3]'s status even
- though this isn't part of the spec - makes it possible for machine
- code to signal the aporting of a simulation run.
-
- * emul_chirp.c (chirp_emul_call_method): Add support for the
- claim/release methods.
- * (chirp_emul_exit): Add an optional exit status argument to
- the exit method. Makes it possible for chirp emul simulations
- to abort upon an error.
- * device.h, device.c (device_instance_claim,
- device_instance_release): New methods for claiming and releasing
- memory.
- * hw_memory.c: add claim and release memory methods.
- * hw_*: Use the claim memory method when allocating physical
- memory.
-
-Thu Apr 18 23:38:10 1996 Andrew Cagney <cagney@kremvax.highland.com.au>
-
- * hw_nvram.c (hw_nvram_update_clock): Use the current not previous
- time when updating the clock.
-
- * hw_nvram.c: Tidy up documentation
-
-Fri May 24 10:08:10 1996 Michael Meissner <meissner@tiktok.cygnus.com>
-
- * configure.in (AC_STRUCT_ST_{BLKSIZE,BLOCKS,RDEV}): Use these
- macros to determine whether or not the appropriate st_<xxx> fields
- exist in the stat structure.
- (AC_CHECK_FUNCS): Check for all unix system calls used, except for
- the real basic ones like open, read, write, etc.
- * config{.in,ure}: Regenerate.
-
- * emul_netbsd.c: Add support for missing system calls, and/or
- missing stat fields.
- (MAXPATHLEN): Undefine if including unistd.h, since sys/param.h
- might define it.
-
- * hw_pal.c (WITH_STDIO): Redefine if O_NDELAY, F_GETFL, or F_SETFL
- are not defined.
- (scan_hw_pal): Do not cause syntax error if O_NDELAY, F_GETFL, or
- F_SETFL not defined.
-
-Tue May 21 17:24:45 1996 Michael Meissner <meissner@tiktok.cygnus.com>
-
- * emul_netbsd.c (write_stat): Don't convert st_blocks unless the
- host is netbsd.
-
-Thu May 16 10:56:45 1996 Michael Meissner <meissner@tiktok.cygnus.com>
-
- * configure.in (AC_CHECK_HEADERS): Add sys/ioctl.h.
- * config{.in,ure}: Regenerate.
- * emul_netbsd.c: If HAVE_SYS_IOCTL_H is not defined, don't include
- sys/ioctl.h.
-
-Tue May 7 17:28:12 1996 Michael Meissner <meissner@tiktok.cygnus.com>
-
- * hw_pal.c (hw_pal_instance_read_callback): Remove unused
- variable.
-
- * misc.c ({,target_}a2i): Rewrite to not use strtoul.
-
- * Makefile.in ({spreg,misc}.o): Add dependency on .c file.
- ({i,d}gen): Don't link in liberity. Use BUILD_LIBS instead of
- LIBS.
-
-Mon May 6 11:31:43 1996 Michael Meissner <meissner@tiktok.cygnus.com>
-
- * hw_pal.c (hw_pal_instance_read_callback): If using stdio, use
- fgets to read line. If not using stdio, do a simple blocking read
- of len bytes.
-
-Fri May 3 15:07:42 1996 Michael Meissner <meissner@tiktok.cygnus.com>
-
- * Makefile.in: Correctly build simulator for build machine != host
- machine.
-
-Tue Apr 30 18:46:05 1996 Michael Meissner <meissner@tiktok.cygnus.com>
-
- * configure.in (--enable-hostendian): Rework so the default uses
- the AC_C_BIGENDIAN results. Only run AC_C_BIGENDIAN if not cross
- compiling.
- * configure: Regenerate.
-
- * sim-endian.h: Add more tests for host endian to support more
- platforms in a cross compilation environment.
-
-Wed Apr 17 14:38:06 1996 Michael Meissner <meissner@tiktok.cygnus.com>
-
- * hw_pal.c ({scan,write}_hw_pal): If WITH_STDIO == DO_USE_STDIO,
- use stdio, instead of unpended read/printf_filtered.
- (hw_pal_instance_write_callback): If WITH_STDIO == DO_USE_STDIO,
- flush stdout after writing the characters.
-
- * options.c (print_options): Print out WITH_STDIO.
-
- * Makefile.in (STDIO_CFLAGS): Pass on result of @sim_stdio@
- configuration variable.
- (CONFIG_CFLAGS): Include STDIO_CFLAGS.
- (hw.{c,h}): Allow for source dir != build dir, and for HW_SRC
- files to contain directory pieces.
-
- * std-config.h (DO{,NT}_USE_STDIO): New flags for whether we
- should use stdio for console input.
- (WITH_STDIO): If not defined, define as DONT_USE_STDIO.
-
- * configure.in (--enable-sim-stdio): Add new switch to control
- whether stdio is used for console I/O.
- * configure: Regenerate.
-
- * interrupts.c (external_interrupt): Declare it to be
- INLINE_INTERRUPTS, not INLINE_CPU.
-
-Mon Apr 15 23:30:56 1996 Andrew Cagney <cagney@kremvax.highland.com.au>
-
- * events.c (insert_event_entry): Allow events to be scheduled
- *NOW* (at delta time 0). Add assertions to clarify behavour of
- event queue.
-
- * events.c (update_time_from_event): New function. Calculates the
- number of ticks from the next event. Use this.
-
-Sun Apr 14 21:39:45 1996 Andrew Cagney <cagney@highland.com.au>
-
- * emul_netbsd.c (do_break): Return 0 if success (instead of
- adjusted break).
-
- * device_table.c (vm_ioctl_callback): Don't return adjusted break
- (isn't needed).
-
-Sun Apr 14 21:32:41 1996 Andrew Cagney <cagney@highland.com.au>
-
- * device_table.h: Change type of the device ioctl so that it
- returns an int (status).
- * device.h (device_ioctl): Ditto.
- * device.c (device_ioctl): Ditto.
-
- * device_table.c (stack_ioctl_callback): Return 0 status.
- (vm_ioctl_callback): Ditto
-
-Sat Apr 13 00:00:24 1996 Andrew Cagney <cagney@kremvax.highland.com.au>
-
- * emul_netbsd.c (do_read): Correctly set the return value.
- (do_getpid): Ditto.
- (do_getuid): Ditto.
- (do_geteuid): Ditto.
- (do_dup): Ditto.
- (do_getegid): Ditto.
- (do_getgid): Ditto.
- (do_sigprocmask): Ditto.
- (do_umask): Ditto.
- (do_dup2): Ditto.
- (do_gettimeofday): Ditto.
- (do_getrusage): Ditto.
- (do_fstat): Ditto.
- (do_stat): Ditto.
- (do_lseek): Ditto.
- (do___sysctl): Ditto.
-
-Fri Apr 12 20:56:47 1996 Andrew Cagney <cagney@kremvax.highland.com.au>
-
- * device_table.c (vm_ioctl_callback): Don't access the processor
- registers directly, instead leave it to the caller to handle this.
-
- * emul_netbsd.c (do_break): Which calls vm_ioctl_callback to
- perform a break. Pass in the new break value and set the
- registers according to the result.
-
- * emul_generic.c (emul_write_status): Change so that r3 contains
- either status or errno and failure is indicated by SO.
-
-Thu Apr 4 23:03:38 1996 Andrew Cagney <cagney@kremvax.highland.com.au>
-
- * emul_bugapi.c (emul_bugapi_create): More strict check of OEA
- address.
-
-Thu Apr 4 20:58:05 1996 Andrew Cagney <cagney@highland.com.au>
-
- * interrupts.h (interrupts): New structure contains state of
- pending interrupts.
-
- * cpu.c (cpu_interrupts): New function. Pending interrupt status
- in the cpu and grant access to it. Add interrupts to cpu
- structure.
-
-Fri Mar 29 22:09:25 1996 Andrew Cagney <cagney@highland.com.au>
-
- * device.c (device_tree_add_parsed): Check that the creation of a
- device instance worked before using it.
-
- * psim.c (psim_halt): Remove cia argument from psim_halt. This
- function does not save the CIA so do not pass it in.
-
-Fri Mar 29 21:30:56 1996 Andrew Cagney <cagney@highland.com.au>
-
- * hw_pal.c (hw_pal): Merge the halt and icu and console devices
- found in device_table.c into a single hack pal.
-
- * device_table.c (halt, icu, console): Delete.
-
- * Makefile.in (hw_pal.o): New dependency.
-
- * emul_generic.c (emul_add_tree_hardware): Re-arange device tree
- so that it uses the pal instead of the icu/halt/console devices.
- Wire the pal's interrupt ports up to the cpu nodes.
-
-Fri Mar 29 20:17:17 1996 Andrew Cagney <cagney@highland.com.au>
-
- * hw_iobus.c (hw_iobus_attach_address_callback): Move from
- device_table.c to here.
-
- * Makefile.in (hw_iobus.o): New dependency.
-
-Fri Mar 29 12:17:58 1996 Andrew Cagney <cagney@kremvax.highland.com.au>
-
- * emul_bugapi.c (_os_emul_data): Add fields for output, input.
- (emul_bugapi_create): Create input, output from /chosen/stdin and
- /chosen/stdout.
- (emul_bugapi_do_{read,write}): Switch to use device_instance
- interface.
- (emul_bugapi_instruction_call): Change calls to
- emul_bugapi_do_{read,write} to pass device instance argument.
-
-Tue Mar 26 14:57:58 1996 Michael Meissner <meissner@tiktok.cygnus.com>
-
- * igen.c (idecode_switch_end): Fix 2/26 change so that an extra
- default is not written out if a default was already written.
-
- * psim.c (psim_{read,write}_register): Use sizeof unsigned_8 to
- size cooked_buf, not sizeof natural_word, since floating point
- registers are 8 bytes.
-
-Mon Mar 25 22:07:13 1996 Andrew Cagney <cagney@kremvax.highland.com.au>
-
- * configure: Regenerate with autoconf 2.9.
-
-Thu Mar 21 00:14:26 1996 Andrew Cagney <cagney@highland.com.au>
-
- * device_table.h: Always include string headers.
-
-Thu Mar 21 00:06:09 1996 Andrew Cagney <cagney@kremvax.highland.com.au>
-
- * main.c (error): Be careful to not try to print out statistics
- when the simulation was never created.
-
-Sun Mar 17 22:40:57 1996 Andrew Cagney <cagney@highland.com.au>
-
- * basics.h: Move the event queue's definition to here so that it
- can be refered to globally with out importing all of events.h.
-
- * psim.h, psim.c (psim_event_queue): New function. Grant access
- to the simulation event queue. Will make this the single point of
- access (there is after all only one event queue in the
- simulation).
-
- * cpu.c (cpu_create): Use psim_event_queue to obtain the event
- queue instead of it being passed in. No longer allow access to
- the cpu's copy of the event queue.
-
-Sun Mar 17 22:40:57 1996 Andrew Cagney <cagney@highland.com.au>
-
- * events.h, events.c (event_handler): Remove event_queue from
- arguments passed to an event handler. That argument is redundant
- - the `data' should refer to a data structure that contains the
- event queue if queing is needed.
-
- * cpu.c (cpu_decrement_event): adjust
-
- * events.c (event_queue_process): adjust
-
-Sun Mar 17 22:40:57 1996 Andrew Cagney <cagney@highland.com.au>
-
- * device.h, device.c (device_system): New, returns a handle for
- the system given the device.
-
- * device.c (device_address_init): Store a pointer back to the
- system in each devices node.
-
- * device_table.h: Don't pass `system' into each device when it is
- being initialized, this is now available using device_system(me).
-
- * device.c (device_address_init, device_data_init): Adjust.
-
- * hw_cpu.c, hw_nvram.c, hw_memory.c, hw_eeprom.c, device_table.c:
- Adjust.
-
-Sun Mar 17 22:40:57 1996 Andrew Cagney <cagney@highland.com.au>
-
- * interrupts.c (decrementer_interrupt, external_interrupt):
- Remember that an interrupt wasn't delivered so that it can be
- tried again later.
-
- * interrupts.c (check_masked_interrupt): New function. (re)
- checks for the posibility that a recent change to the MSR may have
- made it possible to deliver an interrupt that was previously
- masked be the EE bit.
-
- * ppc-instructions (mtmsr, mfmsr, rfi): Check for posibility of
- a pending interrupt being delivered using check_masked_interrupt().
-
- * cpu.c (cpu_decrement_event): Just call decrementer_interrupt()
- leaving it to that module to handle both interrupt synchronization
- and masking.
-
- * cpu.c (struct _cpu): remove variables that were going to record
- pending decrementer and external interrupts.
-
-Sun Mar 17 22:40:57 1996 Andrew Cagney <cagney@highland.com.au>
-
- * hw_cpu.c, hw_cpu.h: New files. Implement a device that sits
- between the interrupt controller and the simulators internal
- processor model. Maps device interrupts onto the processor
- interrupt function calls.
-
-Mon Mar 4 06:06:54 1996 Andrew Cagney <cagney@kremvax.highland.com.au>
-
- * hw_nvram.c: NVRAM device that includes a real-time clock that is
- updated each second.
-
-Mon Mar 4 04:18:50 1996 Andrew Cagney <cagney@kremvax.highland.com.au>
-
- * device.h (attach_type): Remove attach_default type address
- spaces. Will replace with levels of callback memory.
-
- * corefile.h, corefile.c (new_core_mapping), corefile.c
- (core_map_attach): Replace default attach with a layerd callback
- approach.
-
-Sun Mar 3 03:58:46 1996 Andrew Cagney <cagney@kremvax.highland.com.au>
-
- * device.c (split_property_specifier): ensure that only a single
- property is found.
- (split_value): New function, parses the value part of a device
- spec.
-
- * device.c (device_tree_add_parsed): Use the interrupt conversion
- functions to determine the interrupt port numbers.
-
- * device_table.h: Add table that maps between an interrupts
- symbolic name and its port number.
-
- * device.h, device.c (device_interrupt_decode,
- device_interrupt_encode): new functions use the recently added
- interrupt port name/number tables to perform conversion.
-
-Sun Mar 3 03:23:59 1996 Andrew Cagney <cagney@kremvax.highland.com.au>
-
- * device.h, device.c (device_set_array_property,
- device_set_boolean_property, device_set_ihandle_property,
- device_set_integer_property, device_set_string_property): New
- functions - allow the value of a given property to be changed.
-
- * device.h, device.c: Re-order declaration and definition of
- property functions.
-
-Sun Mar 3 03:10:22 1996 Andrew Cagney <cagney@kremvax.highland.com.au>
-
- * device.c (device_tree_print_device, device_tree_add_parsed):
- Remove references to phandle properties.
-
-Wed Feb 28 00:43:07 1996 Andrew Cagney - aka Noid <cagney@highland.com.au>
-
- * Makefile.in (corefile.o): missing dependency on device_table.h
- etc.
-
-Tue Feb 27 23:59:35 1996 Andrew Cagney - aka Noid <cagney@highland.com.au>
-
- * device_table.h: Revamp device init callbacks so that they are a
- sub structure.
- * device.c (device_init_data, device_init_address): If an init
- callback is NULL assume it should do nothing.
- * device_table.c (ignore_device_init, unimp_device_init): delete
- as redundant.
- * device_table.c, hw_memory.c: adjust.
-
- * (io): ditto.
- * (dma): ditto.
- * (device_instance): ditto.
- * (ioctl): ditto.
- * (address nee config_address): ditto.
- * (interrupt): ditto.
-
-Mon Feb 26 21:11:20 1996 Andrew Cagney - aka Noid <cagney@highland.com.au>
-
- * igen.c (idecode_switch_end): Output a default entry when the
- switch statement is perfect. Firstly stops GCC complaining about
- an incomplete switch and secondly it will be eliminated by a good
- compiler any way.
-
-Mon Feb 26 22:47:15 1996 Andrew Cagney - aka Noid <cagney@highland.com.au>
-
- * Makefile.in (hw.h, hw.c): New targets. Create from the list of
- hw_*.c files. hw.h declares a device descriptor table for each hw
- device while hw.c lists those tables in a form suitable for the
- construction of a top leveltable in device_table.c.
-
- * Makefile.in (device_table.o): now depends on hw.c a generated
- table of hw.
-
- * device_table.c (device_table): Re-arange the table of devices so
- that two levels are possible. Make use of hw.c.
- * device_table.h: ditto.
-
- * device.c (device_template_create_device): Handle new two level
- device lookup table.
- * device.c (device_usage): ditto.
-
-Mon Feb 26 22:24:00 1996 Andrew Cagney - aka Noid <cagney@highland.com.au>
-
- * device_table.c: Delete the memory device (moved to hw_memory.c).
-
- * hw_memory.c: New file. Just an OpenBoot memory device.
-
-Wed Jan 17 21:47:34 1996 Andrew Cagney <cagney@highland.com.au>
-
- * device.c (device_init_address): New. Split initialization into
- two stages, address and address spaces
- * device.c (device_init_data): New. ... and data or other work.
- With out this, devices try to modify memory before it as been
- attached.
-
- * device.c (device_tree_init): Update to perform staged
- initialization.
-
- * device.c (device_init): Delete.
-
-Wed Jan 17 21:43:09 1996 Andrew Cagney <cagney@highland.com.au>
-
- * device_table.c (data_*): Rewrite to make heaver use of property
- nodes. Allow initialization by different data types.
- * device_table.c (htab_* pte_*): Rewrite to use properties.
-
- * emul_chirp.c (emul_chirp_create): Use
- * emul_bugapi.c (emul_bugapi_create): Ditto
- * emul_netbsd.c (emul_netbsd_create): Ditto
-
-Wed Jan 17 21:24:50 1996 Andrew Cagney <cagney@highland.com.au>
-
- * emul_generic.c (emul_add_tree_options): Annotate existing tree
- with options that haven't yet been specified.
- * emul_generic.c (emul_add_tree_hardware): Annotate existing tree
- with demo devices and properties.
-
- * emul_chirp.c (emul_chirp_create): Update to use new
- device_tree_add_parsed call and additional information now
- included in the device tree. Use emul_add_tree* functions to add
- any missing details.
- * emul_bugapi.c (emul_bugapi_create): Ditto
- * emul_netbsd.c (emul_netbsd_create): Ditto
-
-Wed Jan 17 21:18:27 1996 Andrew Cagney <cagney@highland.com.au>
-
- * device.c (device_instance_create): New. Create/delete and
- operate on instances of a device.
- * device.c (device_instance_delete): Ditto
- * device.c (device_instance_read): Ditto
- * device.c (device_instance_write): Ditto
- * device.c (device_instance_seek): Ditto
- * device.c (device_instance_data): Ditto
- * device.c (device_instance_name): Ditto
- * device.c (device_instance_path): Ditto
-
- * emul_chirp.c (chirp_emul_open): Implement using device_instance.
- * emul_chirp.c (chirp_emul_close): Ditto
- * emul_chirp.c (chirp_emul_read): Ditto
- * emul_chirp.c (chirp_emul_write): Ditto
- * emul_chirp.c (chirp_emul_seek): Ditto
-
- * emul_chirp.c (chirp_read_t2h_args): Read arguments from device.
- Being careful to convert all from target to host byte order.
- * emul_chirp.c (chirp_write_h2t_args): Converse.
-
-Wed Jan 17 20:07:15 1996 Andrew Cagney <cagney@highland.com.au>
-
- * device.c (device_tree_add_parsed): New. Rewrite code to add
- devices to the device tree so that a single printf style function
- is used.
-
- * device.c (device_tree_add_*): Delete. Replaced by above.
-
- * device.c (split_device_specifier): Functions to manipulate a
- device specifier (path) breaking it into its components
- * device.c (split_property_specifier): Ditto
- * device.c (split_device_name): Ditto
- * device.c (split_find_device): Ditto
-
- * device.c (scan_*): Delete
-
- * device.c (device_tree_find_device): Rewrite to use above.
- * device.c (device_add_property): Ditto
-
-Wed Jan 17 19:51:56 1996 Andrew Cagney <cagney@highland.com.au>
-
- * psim.c(psim_options): Parse the psim options, installing their
- value in the device tree. Options are now first entered into a
- device tree and then extracted out again when needed. This allows
- greater flexability in configuration.
-
- * psim.c (psim_tree): Returns a basic device tree ready for
- parsing by psim_options.
- * psim.c (psim_usage): New. Give usage to varing levels of detail
- according to the verbosity. In turn output device and trace
- usage.
-
- * main.c (main): Update to use new system
- * sim_calls.c (sim_open, sim_do_command): Ditto
-
- * psim.c (psim_options): Add `r' option - ram size.
- * psim.c (psim_options): Add `o' option - openboot tree entry.
- * psim.c (psim_options): Add `h'/`H' options - more help.
-
- * debug.c (trace_usage): Add more detailed help.
- * device.c (device_usage): New. Output help including a list of
- the devices currently available in the device table.
- * device_table.c: Add usage operator to each device.
-
- * corefile.c (core_create, core_device_create): Adjust so that the
- core device is created earlier for psim_tree(). Core can later be
- created from it.
-
- * psim.c (psim_create): Update to handle above way of creating
- things. Extract all information from the device tree.
-
- * device_tree.c (trace_*): New device node, its properties are
- used to set the value of the trace options. Init this device (in
- psim_options) when ever the options are updated.
-
-Wed Jan 17 19:46:07 1996 Andrew Cagney <cagney@highland.com.au>
-
- * debug.h: Add trace_print_info, trace_print_device_tree and
- trace_dump_device_tree. The first is a replacement for the
- variable `print_info' found in main.c and sim_calls.c. The latter
- two enable the dumping of the entire device tree.
-
- * debug.c: Add to trace_description table.
-
- * main.c (main): Use above trace instead of local variable
- * sim_calls.c (sim_close): Ditto
-
- * device.c (device_tree_print_device): New. Prints the device
- tree in a format that is consistent with what can be parsed by the
- device tree load from file code.
-
- * psim.c (psim_create): Dump device tree if enabled. If nump
- selected, exit psim immediatly.
-
-Wed Jan 17 19:36:52 1996 Andrew Cagney <cagney@highland.com.au>
-
- * corefile-n.h (core_map_read_N): When mapping from an address to
- a device, do not subtract the devices base. The device its self
- can do this. Brings the behavour into line with OpenBoot.
- * corefile-n.h (core_map_write_N): Ditto
- * corefile.c (core_map_read_buffer): Ditto
- * corefile.c (core_map_write_buffer): Ditto
-
- * device_table.c (console_io_read_buffer_callback): Adjust to
- handle biased address.
- * device_table.c (console_io_write_buffer_callback): Ditto
-
-Wed Jan 17 18:36:09 1996 Andrew Cagney <cagney@highland.com.au>
-
- * device.c (attach_device_interrupt_edge): New. Interrupt model
- did not allow interrupts to be wired up as a general net (edges).
- Re-implement so that interrupt events can be passed to multiple
- controllers and interrupt controllers can further propogate
- interrupt events.
-
- * device.c (attach_device_interrupt_edge) : New, Ditto
- * device.c (detach_device_interrupt_edge) : New, Ditto
- * device.c (clean_device_interrupt_edges) : New, Ditto
- * device.c (device_interrupt_event) : New, Ditto
- * device.c (device_interrupt_attach) : New, Ditto
- * device.c (device_interrupt_detach) : New, Ditto
- * device.c (device_child_interrupt_attach) : New, Ditto
- * device.c (device_child_interrupt_detach) : New, Ditto
-
- * device.c (device_attach_interrupt) : Delete old
- * device.c (device_detach_interrupt) : Delete old
- * device.c (device_interrupt) : Delete old
- * device.c (device_interrupt_ack) : Delete old
-
- * device_table.c (unimp_*) : Update to match
-
- * device_table.c (icu_io_write_buffer_callback) : Update to use
- interface.
- * device_table.c (icu_interrupt_event_callback) : Ditto
-
-Wed Jan 17 18:18:40 1996 Andrew Cagney <cagney@highland.com.au>
-
- * device.c (external_to_device) : New function that provides a
- standard mapping between a devices internal representation (a
- pointer) and its external (or what is passed to a client)
- representation (a phandle). Implement using the cap object
- attached to the root node.
-
- * device.c (device_to_external) : Ditto
- * device.c (external_to_device_instance) : Ditto but for ihandle
- and device instance.
- * device.c (device_instance_to_external) : Ditto
-
- * Makefile (device.o): Add dependency on cap.
-
- * emul_chirp.c (struct _emul_chirp_data) : Elimate use of cap. Code
- needing to translate between internal and external representations
- changed to use the external_to_device et.al. device operations.
- * emul_chirp.c (chirp_emul_*) : Ditto
-
- * Makefile (emul_chirp.o): Remove dependency on cap
-
-Sat Jan 6 10:13:26 1996 Andrew Cagney - aka Noid <cagney@highland.com.au>
-
- * emul_chirp.c (map_over_chirp_note): Tighten up (and fix) checks
- on OpenBoot note section.
-
-Fri Jan 5 20:28:53 1996 Andrew Cagney <cagney@hignland.com.au>
-
- * emul_generic.c (emul_write_buffer): Use vm faulting byte
- read/write calls for buffer transfers. This will cause a fault to
- occure if the transfer fails. CHRP catches the fault while the
- others suffer the consequences.
- (emul_read_buffer): Ditto.
- (emul_write_word): Ditto.
- (emul_read_word): Ditto.
- (emul_read_string): Ditto.
-
-Fri Jan 5 18:55:34 1996 Andrew Cagney <cagney@highland.com.au>
-
- * emul_chirp.c (emul_chirp_create, emul_chirp_instruction_call),
- emul_generic (emul_blr_instruction): Use a real blr instruction to
- return from a client service call.
-
- * emul_chirp.c (services): Add all OpenBoot services to table.
-
- * emul_generic.h, emul_bugapi.c (emul_bugapi_create), emul_chirp.c
- (emul_chirp_create) : Use names instead of numbers for
- instructions being stored in memory.
-
-Fri Jan 5 18:52:28 1996 Andrew Cagney <cagney@highland.com.au>
-
- * Makefile.in (maintainer-clean): Remove .log, core and *.core
- (From NetBSD) files.
-
-Wed May 29 22:57:40 1996 Andrew Cagney <cagney@kremvax.highland.com.au>
-
- * ChangeLog.00, ChangeLog: ChangeLog from gdb-4.16 becomes
- ChangeLog.00
-
diff --git a/sim/ppc/ChangeLog.00 b/sim/ppc/ChangeLog.00
deleted file mode 100644
index 8b8be820fc7..00000000000
--- a/sim/ppc/ChangeLog.00
+++ /dev/null
@@ -1,2168 +0,0 @@
-Wed May 29 22:57:40 1996 Andrew Cagney <cagney@kremvax.highland.com.au>
-
- * ChangeLog.00, ChangeLog: ChangeLog from gdb-4.16 becomes
- ChangeLog.00
-
-Thu Apr 4 15:17:22 1996 Michael Meissner <meissner@tiktok.cygnus.com>
-
- * INSTALL: Fix some long lines and remove x86 specific options in
- the examples.
-
-Sun Mar 31 15:47:33 1996 Andrew Cagney <cagney@kremvax.highland.com.au>
-
- * INSTALL: Update to reflect gdb-4.16.
-
- * RUN: Update to reflect gdb-4.16. Review notes on building a BSD
- runtime environment.
-
- * README: Point out copyright status of simulator in introduction.
-
-Thu Mar 7 19:53:49 1996 Michael Meissner <meissner@cygnus.com>
-
- * emul_netbsd.c: Only include sys/mount.h if HAVE_SYS_MOUNT_H is
- defined.
- * configure.in: Test for sys/mount.h.
- * configure,config.in: Regenerate.
-
-Thu Feb 22 22:48:57 1996 Andrew Cagney <cagney@highland.com.au>
-
- * README, RUN, INSTALL: Update to reflect announcement
- * psim: PSIM 1.0.1 released
-
-Thu Feb 22 14:01:56 1996 Michael Meissner <meissner@tiktok.cygnus.com>
-
- * emul_bugapi.c (emul_bugapi_do_read): New function to handle
- reads.
- (emul_bugapi_instruction_call): Add support for .INCHR/.INLN
- system calls.
-
- * emul_bugapi.c (emul_bugapi_do_write): Call flush_stdoutput.
- * emul_netbsd.c (do_write): Call flush_stdoutput.
-
- * main.c (flush_stdoutput): Do fflush (stdout).
- * sim_calls.c (flush_stdoutput): Do gdb_flush (gdb_stdout);
- * sim_callbacks.h (flush_stdoutput): Declare.
-
-Wed Feb 21 10:39:35 1996 Michael Meissner <meissner@tiktok.cygnus.com>
-
- * emul_bugapi.c (bug_mapping): New structure to map bug system
- call numbers to a string.
- (toplevel): Add remaining bugapi system calls.
- (emul_bugapi_instruction_name): Map bugapi system call number to a
- string.
- (emul_bugapi_do_write): Common code to process write system calls.
- (emul_bugapi_instruction_call): If os-emul tracing is on, trace
- the system call. Use the name to print unknown system call.
- Correct implementation of _OUTLN. Add support for _OUTSTR and
- _PCRLR system calls.
-
-Wed Feb 21 17:07:27 1996 Andrew Cagney <cagney@highland.com.au>
-
- * NOTES: New file. Ramblings on why things were done they way
- they were.
-
- * psim.c (psim_options): Didn't enter the model value into the
- device tree as a string.
-
- * cpu.c (cpu_synchronize_context): Wrong test for conditional
- flush of cache.
-
- * emul_generic.c (emul_add_tree_hardware): reg value didn't match
- bus address.
-
- * ppc-opcode-flat: new file. Generate an instruction decode
- function like ppc-opcode-complex but use switch statements.
-
- * INSTALL: document new opcode file, add example configurations.
-
-Tue Feb 20 18:42:31 1996 Andrew Cagney <cagney@highland.com.au>
-
- * main.c (main): rename psim instance (system) to simulation and
- make global.
- * main.c (error): print out performance even when an error occures.
-
- * emul_bugapi.c (emul_bugapi_create): Fix argument passing.
-
- * emul_generic.c (emul_add_tree_hardware): Move hardware devices
- to 0x80000000 from 0x400000.
-
-Mon Feb 19 22:54:40 1996 Andrew Cagney <cagney@highland.com.au>
-
- * ppc-instructions (TLB Invalidate Entry, TLB Invalidate ALL):
- Implement by passing on request to all processors.
- * ppc-instructions (TLB Synchronize): Implement as empty, processor
- tlb's are always in sync.
-
- * cpu.c (cpu_page_tlb_invalidate_all): New function. Pass on TLB
- invalidate request to processors VM sub-system.
- * cpu.c (cpu_page_tlb_invalidate_entry): Ditto.
-
- * vm.c (vm_page_tlb_invalidate_all): New function. Mark all page
- TLB entries as invalid.
- * vm.c (vm_page_tlb_invalidate_entry): New function. Ditt but only
- invalidate one TLB entry.
-
- * psim.c (psim_init): Invalidate TLB's before (re)starting.
-
-Mon Feb 19 21:25:56 1996 Andrew Cagney <cagney@highland.com.au>
-
- * emul_generic.c (emul_add_tree_options): Add argument
- oea_interrupt_prefix (0 or 1) that specifies the prefix MSR[IP]
- and hence the location of the interrupt vectors. Add this to the
- device tree.
-
- * emul_chirp.c (emul_chirp_create): Allow configuration of
- floating-point and interrupt prefix (default 0) using the above.
-
- * emul_netbsd.c (emul_netbsd_create): Pass dummy arg for
- interrupt-prefix.
-
- * emul_bugapi.c (emul_bugapi_create): Allow configuration of
- interrupt prefix (default 1) and configure interrupt table traps
- accordingly.
-
- * emul_generic.c (emul_add_tree_hardware): Include a small eeprom
- in the list of devices.
-
- * device_table.c: For moment fake eeprom device by a memory
- device. In future will need a proper eeprom device.
-
-Tue Feb 20 17:01:26 1996 J.T. Conklin <jtc@rtl.cygnus.com>
-
- * config.in: Regenerated.
-
-Fri Feb 16 10:42:27 1996 Michael Meissner <meissner@tiktok.cygnus.com>
-
- * psim.c: Include options.h so print_options is declared.
-
-Thu Feb 15 18:10:13 1996 Michael Meissner <meissner@tiktok.cygnus.com>
-
- * emul_netbsd.c (toplevel): Do not include sys/resource.h if the
- system doesn't have it, and turn off getrusage processing.
- (write_rusage): #ifdef out if we don't have getrusage.
- (do_getrusage): Define as 0 if we don't have getrusage.
-
-Wed Feb 14 17:38:12 1996 J. T. Conklin <jtc@cygnus.com>
-
- * configure.in (AC_HEADER_DIRENT): Add, so that we can figure out
- where the directory functions are declared.
- * configure: Regenerate
-
- * emul_netbsd.c: Use the macros defined by configure to find the
- appropriate directory functions.
-
-Thu Feb 8 00:53:13 1996 Andrew Cagney <cagney@highland.com.au>
-
- * configure.in (xor_endian): Trace setting of xor-endian flag.
-
-Wed Feb 7 18:20:56 1996 Andrew Cagney <cagney@highland.com.au>
-
- * psim.c (psim_usage): Extend documentation.
-
- * ppc-instructions (model-print): fix typo.
-
-Sun Feb 4 23:58:02 1996 Andrew Cagney <cagney@highland.com.au>
-
- * configure.in (with-smp): Default configuration allow up to
- five processors (but enable only one).
-
- * emul_bugapi.c (emul_bugapi_create): If floating-point is
- allowed, enable the floating point instruction set in the
- msr.
-
-Tue Jan 30 22:52:32 1996 Andrew Cagney <cagney@highland.com.au>
-
- * emul_chirp.c (chirp_emul_seek, chirp_emul_read,
- chirp_emul_write): Tolerate invalid ihandles.
-
- * device.c (device_instance_create, device_instance_delete):
- init/delete instance name
-
- * emul_chirp.c (emul_chirp_instruction_call): Read the nr args and
- returns when determining the service.
-
- * emul_chirp.c (chirp_read_t2h_args): Allow variable number of
- args for the method "call-method".
-
- * emul_chirp.c (chirp_emul_getprop): Tolerate a n_returns of zero
- - should be one. Some OpenBoot code doesn't pass correct arg.
-
- * emul_chirp.c (chirp_emul_getprop): Trace more property types.
-
-Tue Jan 30 19:12:29 1996 Andrew Cagney <cagney@highland.com.au>
-
- * RUN: New file. Describe how to run PSIM
- * INSTALL: New file. Describe how to install PSIM
- * README: New file. Overview PSIM.
- * BUGS: New file. Briefly discuss bugs and limitations
-
-Wed Jan 24 20:28:08 1996 Andrew Cagney <cagney@highland.com.au>
-
- * emul_bugapi.c (OEA_START_ADDRESS): Put it back to 0x100000,
- wasn't correctly using GLD.
-
-Mon Jan 22 22:44:13 1996 Andrew Cagney <cagney@highland.com.au>
-
- * emul_generic.c (emul_add_tree_options): Make default number of
- active processors 1 (even when SMP enabled).
-
-Mon Jan 22 22:37:34 1996 Andrew Cagney <cagney@highland.com.au>
-
- * device_table.c (icu_io_read_buffer_callback): Add extra register
- (at addr + 4) that returns number of processors.
-
- * emul_generic.c (emul_add_tree_hardware): Update device node to
- match.
-
-Mon Jan 22 22:00:42 1996 Andrew Cagney <cagney@highland.com.au>
-
- * emul_bugapi.c (OEA_START_ADDRESS): Change to 0x4000 so that it
- matches gas-960116/ld.
-
-Fri Jan 19 00:32:27 1996 Andrew Cagney <cagney@highland.com.au>
-
- * psim-960119 released - psim-1.0b01.
-
-Fri Jan 19 00:32:27 1996 Andrew Cagney - aka Noid <cagney@highland.au.com>
-
- * psim.c (psim_create): Re-order so that all options are set
- before the CPU's are created. Was breaking mon_create();
-
- * psim.c (psim_create): Tidy up conflicting configuration errors.
-
- * debug.c: Add missing print-info entry to trace table.
-
- * os_emul.c (os_emul_create): Fix `-e' option. Was looking under
- wrong name.
-
- * psim.c (psim_options): Fix `-r' option. Was entering under wrong
- name.
-
-Thu Jan 18 20:33:48 1996 Andrew Cagney <cagney@highland.com.au>
-
- * vm.c (om_unpack_bats): Fix checking of bat bits.
-
- * emul_chirp.c (emul_chirp_create): Store address of OB in memory
- in the os_emul_data structure.
-
- * emul_bugapi.c (emul_bugapi_create): Store the address of the
- bugapi code (in main memory) in the os_emul_data structure.
-
-Thu Jan 18 01:14:55 1996 Andrew Cagney <cagney@highland.com.au>
-
- * vm.c (om_translate_effective_to_real): Fix trace output.
-
-Wed Jan 17 22:21:55 1996 Andrew Cagney <cagney@highland.com.au>
-
- * device_table.c (generic_device_init_address): Create memory from
- information obtained from `reg' property.
- * device_table.c (vm_init_address_callback): Use information
- obtained from properties.
- * emul_netbsd.c (emul_netbsd_create): Update to create device and
- property entries to match
-
-Tue Jan 16 09:50:53 1996 Michael Meissner <meissner@tiktok.cygnus.com>
-
- * idecode_expression.h (ALU_END): Add ITRACE of the result.
-
- * ppc-instructions (Equivalent): Enable this instruction.
- (Add to Minus One Extended): Ditto.
- (Subtract from Minus One Extended): Ditto.
- (Add/And/Or/Xor Immediate): Add alu trace of result.
- (Add/And/Or/Xor Shifted Immediate): Ditto.
- (And/Or/Equivalent/Nand/Nor): Ditto.
- (And/Or with Complement): Ditto.
- (Extend Sign Byte/Half Word): Ditto.
- (Count Leading Zeros): Ditto.
- (Shift Right Algerbraic Word): Ditto.
- (Shift Right Algerbraic Word Immediate): Ditto.
-
-Tue Jan 9 15:10:27 1996 Andrew Cagney <cagney@highland.com.au>
-
- * emul_bugapi.c (emul_bugapi_instruction_call) : Make format type
- correct.
- * emul_chirp.c (map_over_chirp_note) : Ditto
- * emul_chirp.c (chirp_emul_test) : Ditto
- * device_table.c (register_init): Ditto
-
-Tue Jan 9 14:16:26 1996 Andrew Cagney <cagney@highland.com.au>
-
- * configure.in: Make disable-sim-switch default. Switch only
- useful if using --enable-sim-opcode=ppc-opcode-stupid and then
- only marginally so.
-
-Mon Jan 8 12:17:22 1996 Michael Meissner <meissner@tiktok.cygnus.com>
-
- * device_table.c (register_init): Make format type correct.
-
-Wed Jan 3 19:21:46 1996 Andrew Cagney <cagney@highland.com.au>
-
- * emul_bugapi.c (emul_bugapi_create): Add nodes to init the
- system-call trap to the emul instruction call instruction (Along
- with an rfi and infinate loop).
-
- * emul_bugapi.c (emul_bugapi_instruction_call): Expand to include
- a few real PPC bug calls. Test with simple hello world.
-
-Tue Jan 2 20:51:19 1996 Andrew Cagney - aka Noid <cagney@highland.com.au>
-
- * device.h, device.c (device_child, device_sibling): New
- functions. Return corresponding device value.
-
- * emul_chirp.c (chirp_emul_child, chirp_emul_peer,
- chirp_emul_parent): New functions - emulate corresponding OpenBoot
- interfaces.
-
- * device_table.c (register_init): Extend properties attached to
- register init node to allow a specific processor's register to be
- specified.
-
- * emul_chirp.c (emul_chirp_create): Init SMP correctly - the
- initial PC for all processors is an infinate loop but then, for
- processor zero, is quickly changed to be the correct code starting
- address.
-
- * emul_chirp.c (emul_chirp_create): Add fake bootpath
- et.al. properties to tree.
-
- * emul_chirp.c (chirp_emul_getproplen): New function. Emulate the
- getproplen OpenBoot call.
-
- * emul_chirp.c (emul_chirp_instruction_call): Document other
- possible chirp emulation internal states.
-
- * emul_chirp.c (emul_chirp_instruction_call): Trace failed lookups
- as well as successful ones.
-
- * emul_chirp.c (emul_chirp_open): New function - handle open
- client call.
-
- * Makefile.in (maintainer-clean): Proper rule that eliminates more
- junk.
-
-Tue Dec 19 13:00:11 1995 Andrew Cagney <cagney@highland.com.au>
-
- * emul_chirp.c (chirp_emul_exit): Full out call.
-
- * device_table.c (htab_map_page): Wasn't handling byte swap when
- creating entries in the hash table.
-
- * device.c (device_tree_find_node): Allow primative wild-card match
- of device names with the path.
-
- FIXME: As mentioned earlier, the device stuff needs work to bring
- it into line with OpenBoot. Part of this work is rewriting the
- find_node function so that it behaves as specified in p1275.
-
-Mon Dec 18 19:58:56 1995 Andrew Cagney <cagney@highland.com.au>
-
- * emul_chrp.c (chirp_emul_write, chirp_emul_finddevice): add
- better tracing.
-
- * emul_chrp.c: Change return type of emul functions to int. Emul
- functions either return -1 or zero so unsigned was a bit
- dangerous.
-
- * inline.h (*), igen.c, dgen.c, *: Update INLINE macros so that
- they are paramaterised with the type of the function. Gets around
- the problem of `static' needing to come first with `attribute'
- comming last. Format declarations and definitions so that emacs
- doesn't get confused.
-
-Fri Dec 15 17:06:44 1995 Andrew Cagney <cagney@highland.com.au>
-
- * std-config.h (PSIM_INLINE): Add missing inline configuration
- control for the main loop.
-
- * mon.c (mon_print_info): If monitoring disabled still print out
- the number seconds used.
-
- * psim.c (run_until_stop): Don't monitor the cache misses when
- monitoring is disabled.
-
- * configure.in (sim_mon, sim_monitor): Correct typo - sim_mon ->
- sim_monitor for shell variable (or should that have been the other
- way around?).
-
- * vm.c (vm_synchronize_context): Fix wrong test for unsuported
- change in endian-mode.
-
- * std-config.h (WITH_REGPARM), inline.h (IDECODE_INLINE,
- SEMANTICS_INLINE): Add -DWITH_REGPARM=<n> option. Enables the
- __attribute__((__regparm(WITH_REGPARM))) for some functions.
- configure with --enable-sim-cflags="-DWITH_REGPARAM=3" (say).
- Unfortunatly it tickles a bug (gcc?) and can't be used.
-
-Mon Dec 18 13:36:06 1995 Michael Meissner <meissner@tiktok.cygnus.com>
-
- * device.c (device_tree_add_device): Make trace fprintf arguments
- type correct.
- * device_table.c (htab_decode_hash_table): Ditto.
- (htab_map_binary): Ditto.
- (htab_init_callback): Ditto.
- * vm.c (om_virtual_to_real): Ditto.
-
-Sat Dec 16 09:54:18 1995 Michael Meissner <meissner@wogglebug.tiac.net>
-
- * emul_netbsd.c (emul_netbsd_create): Deal with new BFD that
- changed how big/little endian support is recorded, while remaining
- compatible with the old BFD with #ifdefs.
- * emul_chirp.c (emul_chirp_create): Ditto.
- * emul_bugapi.c (emul_bugapi_create): Ditto.
-
-Fri Dec 15 15:55:56 1995 Michael Meissner <meissner@tiktok.cygnus.com>
-
- * std-config.h (MODEL_INLINE): Turn off INLINE_MODULE by default.
-
- * corefile.h: Delete declarations for unknown functions.
- * device.h: Ditto.
- * interrupts.h: Ditto.
- * interrupts.c: Ditto.
-
-Thu Dec 14 18:49:34 1995 Andrew Cagney <cagney@highland.com.au>
-
- * lf.c (lf_print_function_type): New function. Munges a function
- type so that the prefix (eg INLINE...) is inserted after the type
- but before any `*'.
-
- * igen.c: Change to output functions using this.
-
-Wed Dec 13 23:47:00 1995 Andrew Cagney <cagney@highland.com.au>
-
- FIXME: Emul CHIRP does not correctly implement the find device
- function.
-
- FIXME: Emul CHIRP and device do not implement device instance
- operations.
-
-Wed Dec 13 23:47:00 1995 Andrew Cagney <cagney@highland.com.au>
-
- * options.c (options_inline): Function to output meaningful
- description of the INLINE options.
-
- * configure.in (inline): Replace inline magic numbers with macro
- names. Map 1->LOCALS_INLINE and 2->ALL_INLINE.
-
- * inline.h, inline.c: update to use inline method.
-
- * std-config.h (CPU_INLINE), cpu.h, inline.h, inline.c: make cpu.h
- inline always.
-
- * std-config.h (EVENTS_INLINE): Inline events in psim.
-
-Wed Dec 13 22:01:21 1995 Andrew Cagney <cagney@highland.com.au>
-
- * device_table.c (htab_sum_binary): DMA binaries to correct byte
- within a page.
-
-Tue Dec 12 22:51:18 1995 Andrew Cagney <cagney@highland.com.au>
-
- * psim.c (psim_merge_device_file): Change `=' to `==', was this an
- error?
-
-Tue Dec 5 11:56:14 1995 Andrew Cagney <cagney@highland.com.au>
-
- * ppc-instructions (ppc_nr_mtcrf_crs, ppc_branch_conditional_name,
- ppc_function_unit_name): Simplify by declaring these arrays as
- pure and simple static (instead of STATIC_MODEL).
-
-Tue Dec 5 00:45:34 1995 Andrew Cagney <cagney@highland.com.au>
-
- * sim_calls.c (sim_create, sim_load), main.c (main), psim.c: Pass
- an options device into psim_create() so that options can be merged
- into the tree.
-
- * device.c (*add*): Change semantics so the add functions only add
- when the new device (or property) doesn't already exist. This
- allows merging of options and data.
-
-Mon Dec 4 17:12:13 1995 Andrew Cagney <cagney@highland.com.au>
-
- * Makefile.in (BASICS_H): Didn't include basics.h in the list of
- header files to depend on.
-
-Mon Dec 4 17:12:13 1995 Andrew Cagney <cagney@highland.com.au>
-
- * std-config.h: (*_MODULE): Extend the <module>_inline macro's so
- that they also allow control over static functions. Rewrite
- document to reflect this.
-
- * std-config.h: (INLINE): Simplify definition, the above and
- earlier changes to igen.h eliminate the need to be defensive about
- enabling the inline of static functions.
-
- * std-config.h: (SIM_ENDIAN_INLINE, BITS_INLINE): Document limited
- suport for inlineing of modules for all callers. Adjust relevant
- macro's so that DEFAULT_INLINE will enable this.
-
- * basics.h: Re-order #includes and definitions so that c-code for
- basic include files does not call functions delcared in later
- #includes.
-
- * basics.h (__attribute__), sim_callbacks.h: Move attribute macro
- to basics.h and add hack (include <stdio.h>) to try and bring that
- and other possible conflicting macros into scope much earler.
-
- * sim-endian.h,c (SIM_ENDIAN_INLINE) bits.h,c (BITS_INLINE):
- Change to use the updated inline definitions. If enabled
- immediatly include the corresponding c-code so that it will inline
- for all modules.
-
- * inline.h, inline.c (SIM_ENDIAN_INLINE, BITS_INLINE): Remove
- these cases, moved to module specific header files.
-
-Sat Dec 2 18:37:51 1995 Andrew Cagney <cagney@highland.com.au>
-
- * vm.c, vm_n.c: Fix htab code.
-
- * vm.c (vm_data_map_read_buffer): Was using EA not RA when reading
- the data from core.
-
- * device.c: Fix htab create code.
-
-Fri Nov 24 23:10:09 1995 Andrew Cagney <cagney@highland.com.au>
-
- * bits.h, bits.c (EXTRACTED): Convert to function, fix - had &&
- instead of &.
-
- * sim-endian.h (SWAP_N), sim-endian-n.h, sim-endian.c: How
- embarasing - fix yet another bug in the swap code! Simplify
- everything by using more functions. Add host to big-endian byte
- swapping support.
-
-Fri Nov 24 23:10:09 1995 Andrew Cagney <cagney@highland.com.au>
-
- * devices.h, devices.c: delete, replaced by the files
- device_table.[ch] and device.[ch].
- * device_tree.h, device_tree.c: ditto
-
- * device_table.h, device_table.c: New files. Contain a table of
- devices.
-
- * device.h, device.c, Makefile.in, std-config.h (DEVICE_INLINE),
- options.c (print_options): New files. Define the device object
- along with any attached properties.
-
- * device_tree.h, device_tree.c: Update to use new device object.
- For convenience, change the printd functions into device_tree_add
- functions.
-
- * psim.c (create_*_tree): Use new device_tree create functions.
-
- * corefile.h, corefile.c corefile-n.h (core_n.h): Update to use
- the new device.h / device_table.h interface. Rename core_n.h to
- corefile-n.h to be consistent with other n files.
-
- * Makefile.in (run): add corefile-n.h to dependencies for
- corefile.
-
- * basics.h (device_instance), device.h, device.c, device_table.h,
- device_table.c: Add the concept of a device instance and operators
- on these instances - corresponds to ihandle in OpenBoot speak.
- Don't yet implement it.
-
-Tue Nov 14 12:27:08 1995 Andrew Cagney <cagney@highland.com.au>
-
- * emul_generic.h, emul_generic.c (emul_syscall_enter,
- emul_syscall_exit): rename from emul_enter_call /
- emul_exit_call. As only used by emul_do_system_call simplify
- associated code.
-
- * os_emul.h, os_emul.c, emul_generic.h: Correct and fill an
- os_emul interface.
-
- * os_emul.c, emul_bugapi.h, emul_bugapi.c, Makefile.in: Add
- preliminary hooks for a kernel mode rom emulation.
-
- * cap.h (new), cap.c (new): Capability data base. Some emulations
- pass object identifiers (capabilities?) to/from the simulated code
- (for instance the phandle in OpenBoot). The cap object is able to
- check/map between internal and external (target program)
- representations of each identifier.
-
- * os_emul.c, emul_chirp.h, emul_chirp.c, Makefile.in: Add
- preliminary hooks for a kernel mode IEEE-1275 emulation.
-
- * cpu.h, cpu.c (cpu_create, cpu_os_emulation, cpu): Add os_emul to
- list of arguments passed in when creating a cpu. Grant access to
- the element.
-
- * std-config.h (OS_EMUL_INLINE), options.c (print_options),
- inline.h, inline.c: New to allow control over inline of
- corresponding code files.
-
- * ppc-instructions (instruction_call): Add illegal instruction to
- call the instruction-call emulation handler.
-
- * interrupts.c (system_call_interrupt): Call renamed
- os_emul_system_call function().
-
- * emul_netbsd.c: Update to interface to generic emulation. Since
- all its functions are called via a table don't worry about any
- inline.
-
- * emul_generic.h, emul_generic.c, spa-*(delete): Remove references
- and code for spa, no longer to be used.
-
- * psim.c (create_chirp_device_tree): Fill out what was previously
- the openboot create function so that it starts to create a full
- OpenBoot device tree.
-
-Tue Nov 28 21:48:06 1995 Andrew Cagney <cagney@highland.com.au>
-
- * debug.h, debug.c: pte trace is made redundant by htab trace,
- delete it. Add vm to list of options. Simplify tracing output so
- lines are not as long.
-
-Tue Nov 14 12:27:08 1995 Andrew Cagney <cagney@highland.com.au>
-
- * events.h, events.c (event_queue_init), psim.c (psim_init): (re)
- initialize the event queue.
-
-
-
-
-
-
-Tue Nov 28 13:38:26 1995 Michael Meissner <meissner@tiktok.cygnus.com>
-
- * sim-endian.h: Look at WORDS_BIGENDIAN to determine if the host
- is big endian or little endian. For SWAP_n, use htonl/htons if
- host is little endian, not big endian and if WITH_NTOH is defined.
-
- * configure{,.in} (--enable-sim-model-issue): Instead of defining
- 0/1, define it to be MODEL_ISSUE_{PROCESS,IGNORE}. Add
- AC_C_BIGENDIAN to determine if the host is big endian or not.
- * config.in: Regenerate.
-
- * std-config.h (WITH_MODEL_ISSUE): Default to 0.
- (CURRENT_MODEL_ISSUE): Reference WITH_MODEL_ISSUE, and if that is
- 0, use current_model_issue.
- (MODEL_ISSUE_{PROCESS,IGNORE}): Define as -1/1.
-
- * psim.c (current_model_issue): New global variable.
-
- * cpu.c (cpu_create): Use CURRENT_MODEL_ISSUE > 0 instead of
- WITH_MODEL_ISSUE.
- (cpu_{init,halt}): Ditto.
- * mon.c (mon_print_info): Ditto.
- * ppc-instructions (PPC_INSN_* macros, branch handling): Ditto.
-
- * mon.c (mon_print_info): Print instructions/second if verbose > 0,
- rather than > 1.
-
- * main.c (main): Set current_model_issue to MODEL_ISSUE_PROCESS if
- the -I switch is used.
- * sim_calls (sim_open): Ditto.
-
- * ppc-instructions (model support): Add support for determining
- when we don't have enough writeback slots. Add tracing for the
- beginning of each cycle.
-
-Mon Nov 27 17:46:33 1995 Michael Meissner <meissner@tiktok.cygnus.com>
-
- * mon.c: Check for whether to include sys/types.h and sys/time.h.
-
- * configure.in: Check for include files sys/types.h and
- sys/time.h.
- * configure: Regenerate.
- * config.in: Regenerate.
-
- * cpu.h (CONST_ATTRIBUTE): Define as __attribute__((__const__)) if
- not already defined.
- (cpu_system): Use CONST_ATTRIBUTE, so that when we're not inlining
- the world, the optimizer has a fair chance of CSE'ing function
- calls.
- (cpu_{monitor,nr,registers,model}): Ditto.
-
- * std-config.h (MODEL_INLINE): If not defined, define as 1 if
- DEFAULT_INLINE is non-zero, 0 otherwise, rather than just the
- value of DEFAULT_INLINE.
-
-Fri Nov 24 11:24:34 1995 Michael Meissner <meissner@tiktok.cygnus.com>
-
- * lf.h (__attribute__): If not GCC and at least 2.7.0, define as
- nothing.
- (lf_printf): Add printf __attribute__, so the compiler will
- automatically check the format string.
-
- * configure{,.in} (--enable-sim-icache): If argument is define,
- add -R to flags passed to igen.
-
- * igen.c (stdlib.h): Include if the system supplies one.
- (semantics_use_cache_struct): New global for -R flag to say
- semantics is to use the cache structure directly rather than
- putting the values into local variables.
- (first_undef, last_undef): New structures to remember names to
- #undef if -R.
- (lf_print_c_extraction): If -R and this is semantics, emit names
- as #defines pointing to the cache structure, rather than loading
- the values into local variables.
- (lf_print_c_semantic_function): If -R, #undef all of the names
- defined in lf_print_c_extraction.
- (main): Recognize -R.
-
- * idecode_fields.h (SPR_*): Redefine spr_* macros as SPR_* to
- avoid a name confict if -R passed to igen.
-
- * ppc-instructions (mfspr, mtspr): Rename spr field to SPR.
- (model_data): Add field to count the various # of CRs that the
- mtcrf instruction used.
- (model_mon_info): Return structures counting the # of CRs that the
- mtcrf instruction used.
- (branches, sync instructions): Do not call model functions if
- WITH_MODEL_ISSUE is 0.
-
- * mon.c (stdlib.h): Include if the system supplies one.
- (mon_sort_instruction_names): New function to sort instruction
- names alphabetically.
- (mon_print_info): Call qsort with mon_sort_instruction_names to
- sort instruction names. Don't abort if WITH_MODEL_ISSUE is 0.
-
- * debug.h (ITRACE): Make printf_filtered arguments type correct.
- * idecode_expression.h (CR0_COMPARE): Ditto.
- * psim.c (psim_read_register): Ditto.
-
- * igen.c (lf_print_my_prefix): Use __attribute__((__unused__)) to
- silence compiler warnings about unused automatically generated
- variables.
- (lf_print_c_extraction): Ditto.
- * idecode_expression.h (FPSCR_BEGIN): Ditto.
-
- * ppc-cache-rules: Define rules for making a bitmask for all
- registers.
-
- * ppc-instructions: Rewrite model specific functions to use the
- bitmask of the register number, instead of using the register
- pointer to get the register number, and then making the bitmask.
-
-Wed Nov 22 15:24:27 1995 Michael Meissner <meissner@tiktok.cygnus.com>
-
- * ppc-instructions (model_branches): Add conditional argument to
- count the number of times each type of conditional branch is used.
- (conditional branches): Pass B0 or -1 to model_branches.
- (model_mon_info): Print out conditional branch counts.
- (model-data): Add support for printing out conditional branch
- types.
-
-Tue Nov 21 16:31:25 1995 Michael Meissner <meissner@tiktok.cygnus.com>
-
- * igen.c (insn_table_load_insns): Add support for model-static for
- internal functions that should not be inlined.
- (lf_print_c_semantic): Remove model_cleanup.
- (gen_model_{c,h}): Ditto.
-
- * ppc-instructions: Redo model specific support once again. Add
- floating point support to the model specific information. Flesh
- out all of the floating mutiply add/subtract instructions. Add
- better tracing support to the model specific information.
-
-Sun Nov 19 23:00:52 1995 Michael Meissner <meissner@tiktok.cygnus.com>
-
- * ppc-instructions (model data, model_busy): Rather than using a
- bit mask for the busy units, just use a char array. Also, only
- support 2 function units an insn can use, rather than a loop.
-
-Fri Nov 17 14:08:08 1995 Michael Meissner <meissner@tiktok.cygnus.com>
-
- * table.c (table_entry_read): Move setting entry->line_nr to after
- the model specific fields so the line numbers for the annex are
- correct.
-
- * cpu.c (cpu_{create,init,halt}): Check for WITH_MODEL_ISSUE
- before calling the model functions.
-
- * debug.c (trace_descriptor): Add trace_model support.
- * debug.h (trace_options): Ditto.
-
- * igen.c (gen_icache_h): Create type idecode_cache as void if not
- caching instructions.
- (gen_model_{c,h}): Drop model_issue support. Add support for
- model_cleanup.
- (lf_print_my_prefix): Initialize a const itable_index with the
- current index.
- (lf_print_c_semantic): Call model_cleanup at the end of the
- function to check for instructions that aren't supported yet by
- the scheduling code.
-
- * mon.h (count_type): New type for counters.
- * mon.c: Use count_type instead of unsigned.
-
- * ppc-instructions: Redo scheduling code once again. Make it all
- inline friendly. Instead of having general code emitted by igen,
- go the route of having each semantic routine call the appropriate
- module.
-
-Thu Nov 16 09:52:26 1995 Michael Meissner <meissner@tiktok.cygnus.com>
-
- * table.c (table_entry_read): Allow the annex to have blank lines.
-
- * ppc-instructions: Change lines in model stuff that just have a
- tab to just newline. Add 601 support. Document most instructions
- in terms of model specific timing information. Drop 'FUNCTION'
- from PPC_FUNCTION_UNIT_xxx enums. Change PPC_UNIT_UNKNOWN ->
- PPC_UNIT_BAD. Add TRACE(trace_tbd) for all data cache
- instruction.s. Signal illegal instruciton if data cache block
- invalidate is issued from problem state.
-
- * igen.c (max_model_fields_len): New static to keep track of the
- max size for the model specific fields.
- (model_c_insn): Use max_model_fields_len to size fields.
- (insn_table_insert_insn): Set max_model_fields_len.
- (model_table_insert): Ditto.
- (gen_model_{c,h}): Model_issue is now called with a processor
- argument.
-
- * debug.c (trace_description): Add support for trace_tbd.
-
- * mon.c (mon_issue): Pass processor argument to model_issue.
-
- * Makefile.in: Delete all function unit support, since the newer
- table driven model support replaces it.
- * cpu.{c,h}: Ditto.
- * mon.c: Ditto.
- * inline.{c,h}: Ditto.
- * std-config.h: Ditto.
- * options.c: Ditto.
- * configure{,.in}: Ditto.
- * Makefile.in: Ditto.
- * psim.c: Ditto.
- * function_unit.{c,h}: Delete these now usused files.
-
- * std-config.h (WITH_MODEL_ISSUE): Add new macro on whether to
- trace instructions in a model specific manor.
- * options.c (print_options): Print it out.
- * configure{,.in}: Add --enable-sim-model-issue option.
- * Makefile.in: Add --enable-sim-model-issue flags.
- * igen.c (lf_print_c_semantic): Add call to mon_issue here. Check
- for WITH_MODEL_ISSUE.
- * mon.c (mon_issue): Remove call to mon_issue_here.
-
- * ppc-instructions: Move branch tracing to the actual branch
- instructions, rather than testing it in model_issue. Add code to
- code successful/unsuccessful branch predictions, and the number of
- conditional branches that fell through.
-
-Wed Nov 15 17:32:13 1995 Michael Meissner <meissner@tiktok.cygnus.com>
-
- * cpu.h (cpu_model): Add declaration.
-
- * cpu.c (struct _cpu): Add model_ptr to hold model specific
- information.
- (cpu_model): Return the model internal pointer.
- (cpu_{create,init,halt}): Call the appropriate model function.
-
- * inline.c (mon.c): Move include of mon.c after model.c.
-
- * mon.c (_cpu_mon): Add fields to count unaligned memory
- references.
- (mon_issue): Call model_issue, not function_unit_issue.
- (mon_{read,write}): Count # of unaligned memory accesses.
- (mon_print_info): Switch to calling model_mon_info and
- model_mon_info_free instead of function_unit version. Print out
- number of unaligned reads/writes.
-
- * {ppc-instructions,igen.c}: More global changes to add model
- specific features.
-
- * inline.{c,h}: Provide for inlining options.c.
- * options.{c,h}: Ditto.
- * std-config.h: Add OPTIONS_INLINE.
-
-Tue Nov 14 04:47:25 1995 Michael Meissner <meissner@tiktok.cygnus.com>
-
- * Makefile.in (devices.o, main.o): Update dependency.
-
- * igen.c (gen_model_h): Use correct variable in loop.
- (gen_model_c): Use strcmp, strcasecmp.
- (gen_model_c): Use EXTERN_MODEL for arrays.
- (gen_model_h): Use STATIC_MODEL for arrays.
- (lf_print_c_semantic_function_header): Delete unused function.
-
- * main.c (cpu.h): Include cpu.h to get model.h.
-
- * inline.h ({EXTERN,STATIC}_MODEL): Define.
-
-Mon Nov 13 09:14:13 1995 Michael Meissner <meissner@tiktok.cygnus.com>
-
- * igen.c ({insn,model}_table_fields): Spell mnemonic correctly.
- (gen_itable_h,itable_c_insn): Ditto.
- (model support): Move model support around, add support for
- model-data, model-internal. Use annex field for model-macros
- now.
-
- * configure.in (--enable-sim-inline): If --enable-sim-inline=no,
- also define INLINE as nothing.
- * configure: Regenerate.
-
- * std-config.h (INLINE): Rather than nuking INLINE, only define it
- as __inline__ if any of the INLINE flags are non-zero.
-
- * options.c (print_options): Print out WITH_XOR_ENDAIN.
-
-Mon Nov 13 23:03:45 1995 Andrew Cagney <cagneyhighland.com.au>
-
- * ppc-instructions (rfi): Add missing code.
-
- * cpu.c (cpu_get_time_base): Fix calculation of current value of
- time base register.
-
- * ppc-spr-table (TBL, TBU): Fix TBL/TBU entries - was confusing
- m[tf]tb with m[tf]spr.
-
- * ppc-instructions (mtspr, mfspr): Fix mttbl - wasn't storing
- lower word.
-
-Mon Nov 13 21:35:37 1995 Andrew Cagney <cagneyhighland.com.au>
-
- * std-config.h (INLINE, STATIC_INLINE): Was being set to static
- inline.. Only problem being that with ppc-opcode-simple this gave
- it the chance to inline all the idecode functions with potentially
- disasterous results on a 16mb PC. For moment hobble INLINE.
-
- * configure.in, std-config.h (WITH_SMP): Make that 5 processors by
- default ...
-
- * configure.in: Tweek flags passed to gcc for --with-sim-warnings.
- Firstly make them errors and secondly remove the options gcc-245
- doesn't reconize.
-
-Mon Nov 13 17:57:24 1995 Andrew Cagney <cagney@highland.com.au>
-
- * misc.c (zalloc), cpu.c (cpu_init), devices
- (console_io_read_buffer_callback, icu_io_read_buffer_callback,
- vm_io_read_buffer_callback), main.c (zalloc), mon.c (memset),
- sim_calls.c (zalloc) : replace bzero() with memset().
-
- * emul_netbsd.c (write_direntries), psim.c (psim_read_register,
- psim_write_register): replace bcopy() with memcpy().
-
-Sun Nov 12 20:55:41 1995 Andrew Cagney <cagneyhighland.com.au>
-
- * configure.in: for --disable-sim-inline (--enable-sim-inline=no),
- force DEFAULT_INLINE to 0 rather then trusting the std
- configuration.
-
-Sun Nov 12 20:55:41 1995 Andrew Cagney <cagneyhighland.com.au>
-
- * igen.c (lf_print_idecode_table, idecode_table_leaf): Fix
- generation of switch entries in tables - treat the same as
- cracking/semantic functions.
-
- * igen.c (idecode_switch_end, idecode_switch_leaf): Fix generation
- of a boolean switch statement (field zero or non-zero).
-
- * ppc-opcode-test-1, ppc-opcode-test-2: New files. These test the
- switch/table generation ability of igen.
-
- * igen.c (idecode_switch_leaf): Fix code output when a switch
- statement needs to look up a table.
-
- * igen.c (idecode_declare_if_switch): New function called from
- gen_idecode_c - need to declare any idecode switch functions
- before they are used in idecode tables.
-
- * igen.c (lf_print_c_cracker_function, idecode_crack_leaf,
- idecode_crack_insn): Add is_inline_function argument to code
- printing cracker functions which indicates if STATIC_IDECODE or
- STATIC_INLINE_IDECODE should be used for definition. For
- idecode_crack_insn (which implies not duplicating/expanding) don't
- declare function as inline - we assume that the only time this is
- code is generated is when things are being tested. For
- idecode_crack_leaf, make static (instead of INLINE) if the
- instructions parent is a table as function will always be called
- via a table.
-
- * igen.c (idecode_expand_if_switch): Declare as STATIC_IDECODE not
- STATIC_INLINE_IDECODE. Only the outermost idecode switch will be
- called directly, all others are called via a table.
-
- * igen.c (lf_print_semantic_function_header, semantics_h_leaf,
- semantics_h_insn, semantics_h_function,
- lf_print_c_semantic_function, semantics_c_function): Add
- is_inline_function argument to lf_print_semantic_function_header
- to indicate if an inline or static function declaration/definition
- should be output. Depending on situtation call accordingly:
- functions (not instruction semantic routines) are always inline;
- Semantic routines are made inline when there is no icache (cache
- will contain the function address) and are duplicating (see above)
- and the parent of the instruction is a switch statement.
-
- * igen.c (opcode_field_new): Delete. Code changed to use ZALLOC
- and moved to insn_table_find_opcode_field.
-
- * table.c (table_open): Fix typo (nr_model_fields vs nr_fields).
-
- * igen.c (model_c_insn): Suggestion - document the name of the
- instruction on each line of the instruction model table.
-
-Fri Nov 10 00:44:38 1995 Andrew Cagney <cagneyhighland.com.au>
-
- * emul_netbsd.c (do_ioctl): Cleanup compilation.
-
- * sim_callbacks.h (__attribute__): Only define if not defined (was
- already defined on NetBSD host).
-
-Wed Nov 8 21:49:52 1995 Andrew Cagney <cagneyhighland.com.au>
-
- * std-config.h (WITH_XOR_ENDIAN), configure.in, Makefile.in: New
- macro, indicates if the PowerPC's horrible XOR endian mode should
- be suported. Add to configure and make.
-
- * vm_n.h (vm_data_map_read_N, vm_data_map_write_N), vm.c
- (vm_instruction_map_read): If XOR endian, xor the address
- with a value from an xor table (indexed by size of access).
-
- * vm.c (vm_synchronize_context), cpu.c (cpu_synchronize_context):
- set up xor table to xor if there is a conflict between the
- CURRENT_TARGET_ENDIAN and the endian indicated in the MSR. Move
- check of suported change of endian mode from cpu.c to vm.c.
-
- * vm.c (vm_data_map_write_buffer, vm_data_map_read_buffer):
- Hopefully added correct hack to handle XOR endian mode.
-
- FIXME: If NONSTRICT alignment and XOR ENDIAN and MSR indicates
- little endian mode, the model accepts miss aligned transfers.
-
- FIXME: Need to create an `init' device that, during
- initializatioin for XOR mode, it mushes (XOR address) all the dma
- data before passing it on to the core for storage. Just like the
- real thing really.
-
-Wed Nov 8 21:49:52 1995 Andrew Cagney <cagneyhighland.com.au>
-
- * devices.c (halt_io_write_buffer_callback): Use value written to
- halt device to determine exit status. Thus allowing
- success/failure of OEA tests.
-
-Wed Nov 8 00:10:38 1995 Andrew Cagney <cagneyhighland.com.au>
-
- * ppc-instructions (icbi): If icache present flush it.
-
-Tue Nov 7 23:36:31 1995 Andrew Cagney <cagneyhighland.com.au>
-
- * devices.c (htab_init_callback): Add code to create htab/pte.
-
- * devices.c (dma_file, file_init_callback, htab_init_callback):
- New function - Dma the named file into memory at the specified
- address. Use.
-
- * device_tree.h, device_tree.c (scand_*): New functions.
-
-Tue Nov 7 23:36:31 1995 Andrew Cagney <cagneyhighland.com.au>
-
- * filter_filename.c, Makefile.in: Change so that only dependant on
- a very limited nr of files. Stops an unnecessary dependency.
-
-Tue Nov 7 15:44:33 1995 Andrew Cagney <cagney@highland.com.au>
-
- * core.c (core_map_find_mapping): Use cpu_halt rather than error
- to abort an access to an undefined address.
-
-Sun Nov 12 07:58:09 1995 Michael Meissner <meissner@tiktok.cygnus.com>
-
- * igen.c (model_table_insert_{macro,function}): New functions.
- (insn_table_load_insns): Call them.
- (gen_model_h): Move section emiting model-macros to be first.
- (model_{c,h}_function): New functions cloned from semantic
- functions to print out the prototype and function for
- model-functions.
- (gen_model_{c,h}): Print out model-functions.
-
- * ppc-instructions (model_{start,halt,print_info}): Add dummy
- model-functions.
-
- * options.c (print_options): Print out WITH_{,DEFAULT_}MODEL, not
- WITH_PPC_{,DEFAULT_}_MODEL.
- (options_ppc): Delete now unused function.
- (cpu.h): Include cpu.h, not just basics.h.
-
- * std-config.h (WITH_{,DEFAULT_}MODEL): Define.
-
- * igen.c (model_macros, last_model_macro): New statics to keep
- track of macros to go in model.h.
- (insn_table_load_insns): Add model-macros to model_macros linked
- list.
- (model_table_fields): Add field for printable name.
- (gen_model_h): If there are model macros defined, print them out.
- Print out DEFAULT_MODEL as the first model if there any models
- specified, otherwise MODEL_NONE. Print out external decl for
- current_model. Print out decl for model_set.
- (gen_model_c): Add function model_set. Switch to use printable
- name for the model, not the internal identifier used.
-
- * psim.c (current_model): New global variable.
-
- * ppc-instructions: Add macros for flag defines. Switch first
- model so 604 is first.
-
- * main.c (main): Call model_set, not function_unit_model.
- * sim_calls.c (sim_open): Ditto.
- * sim_calls.c, Makefile.in: sim_calls.c now includes cpu.h.
-
-Sat Nov 11 07:27:41 1995 Michael Meissner <meissner@tiktok.cygnus.com>
-
- * mon.h (mon_events): New enumeration for other events we want to
- handle.
- (mon_event): Add declaration for function.
-
- * mon.c (mon_event): New function.
- (mon_print_info): Print icache misses.
-
- * psim.c (run_until_stop): Monitor icache misses.
-
- * configure.in (--enable-sim-inline): Fix typos in handling comma
- separated inline options.
- (--enable-sim-icache): Echo icache size.
- * configure: Regenerate.
-
- * igen.c (semantics_h_print_function): Emit STATIC_SEMANTICS
- instead of INLINE_SEMANTICS so that the compiler won't keep all of
- the semantic functions as inline RTL, given that the address of
- the function is taken which forces outline calls anyway.
- (lf_print_c_semantic_function_header): Ditto.
- (gen_semantics_h): Define STATIC_SEMANTICS as nothing if not
- defined.
- (lf_print_c_cracker_function): Emit STATIC_IDECODE instead of
- STATIC_INLINE_IDECODE.
- (gen_idecode_c): Define STATIC_IDECODE if not defined.
- (gen_model_h): Use #ifdefs to define types to hold model units,
- cycles, and flags.
- (model_table_insert): Add a sentinel functional unit at the end to
- simplify loop processing.
- (model_c_insn): Use <function-unit>_SENTINAL instead of 0 for any
- instruction not specifing a function unit for the current model.
- (gen_model_{c,h}): Provide bounds for model_time_mapping.
-
- * inline.h (STATIC_SEMANTICS): Define to be static if
- SEMANTICS_INLINE is defined.
- (STATIC_IDECODE): Define to be static if IDECODE_INLINE is
- defined.
-
- * options.c (print_options): Fix typo.
-
-Fri Nov 10 06:39:46 1995 Michael Meissner <meissner@tiktok.cygnus.com>
-
- * configure.in (--enable-sim-{opcode,config}): Use $srcdir when
- check for the existence of files.
- * configure: Regenerate.
-
- * table.c (table): New field nr_model_fields.
- (table_open): New parameter nr_model_fields.
- (table_entry_read): Parse model fields that begin with a '*' after
- each instruction.
- * igen.c, dgen.c: Change callers of table_open.
-
- * igen.c: Add support for dumping model specific information in
- model.h and model.c.
- (insn_field_name): Delete unused array.
- (global variables): Make global variables static, so we can tell
- when they are no longer used.
- (cache_semantic_actual): Delete unused variable.
- (insn_table_load_insns): If the insn is really a machine model,
- call model_table_insert instead of other processing.
- (model_table_insert): New function to handle defining the
- functional units of a particular machine model.
- (insn_table): Add last_function field so we can add functions at
- the end.
- (insn_table_insert_function): Use last_function field when
- appending new function.
-
- * ppc-instructions: Add a few model specific information for 603,
- 603e, and 604 for testing purposes.
-
- * table.h (table_model_entry): New linked list to hold model
- specific information, one per line.
- (table_entry): Add model_first, model_last fields.
-
- * configure.in (--enable-sim-inline): If gcc is found and
- --enable-sim-inline is not specified, defaine DEFAULT_INLINE to 1,
- not 2.
- (--enable-sim-reserved-bits): New switch to check whether reserved
- bits are set in the instruction.
- (--enable-sim-opcode): Make complex the default.
- (all switches): Add appropriate checks and error messages.
- * configure: Regenerate.
-
- * Makefile.in (RESERVED_CFLAGS): New variable set by
- --enable-sim-reserved-bits.
- (CONFIG_CFLAGS): Include RESERVED_CFLAGS.
- (BUILT_SRC): igen now generates model.c and model.h.
- (LIB_OBJ): Include table.o.
- (tmp-igen): Add -m/-M options to write model.c/model.h.
- (model.o): New object.
- (CPU_H): Include model.h.
-
- * cpu.h: Include model.h.
-
- * std-config.h (WITH_RESERVED_BITS): Define.
- (MODEL_INLINE): Ditto.
-
- * options.c (print_options): Print out WITH_RESERVED_BITS.
-
-Thu Nov 9 12:22:15 1995 Michael Meissner <meissner@tiktok.cygnus.com>
-
- * configure.in: If --silent, don't output information messages.
- * configure: Regenerate.
-
- * configure.in (--enable-sim-alignment): Fix typo in specifing non
- strict alignment.
- (--enable-sim-switch): Make default on.
- (--enable-sim-duplicate): Make default on.
- (--enable-sim-smp): Make default 0.
- (--enable-sim-mon): Don't set sim_float if not set.
- (--enable-sim-inline): If gcc is found and --enable-sim-inline is
- not specified, define DEFAULT_INLINE to be 2.
- (all --enable-sim-* rules): Echo rules set to non empty to file
- descriptor 6.
- * configure: Regenerate.
-
- * options.c (options_env): Fix typo if WITH_ENV is 0.
- (print_options): Print GCC compiler version if available and
- date/time options was compiled. If OPCODE_RULES, IGEN_FLAGS,
- and/or DGEN_FLAGS are defined, print them.
-
- * Makefile.in (all link actions): Pass SIM_CFLAGS as well as
- CFLAGS.
- (options.o): Compile options.o with OPCODE_RULES, IGEN_FLAGS, and
- DGEN_FLAGS defined, so they can be printed out.
-
- * igen.c (lf_print_c_validate): Check for WITH_ASSERT, so that
- this test can be compiled away if the user really wants a fast
- simulator by not doing assertion failures.
-
-Wed Nov 8 13:19:47 1995 Michael Meissner <meissner@tiktok.cygnus.com>
-
- * options.c: New file to print out all of the WITH_ options.
- * options.h: New include file to declare print_options.
- * debug.h (trace_options): Add trace_opts to call print_options.
- * debug.c (trace_description): Add trace_opts support.
- * main.c (main): If user requested options, print them.
- * sim_calls.c (sim_open): Ditto.
-
- * igen.c (opcode_field_new): Add void to make it a proper prototype.
-
- * emul_generic.c (emul_enter_call): Make printf_filtered arguments
- type correct.
- * emul_netbsd.c (do_kill): Ditto.
- * registers.c (registers_dump): Ditto.
- * vm.c (om_translate_effective_to_real): Ditto.
- * vm_n.h (vm_data_map_read_N): Ditto.
- (vm_data_map_write_N): Ditto.
- * devices.h (DTRACE_INIT): Ditto.
- (DTRACE_{ATTACH,DETACH}_ADDRESS): Ditto.
- (DTRACE_IO_{READ,WRITE}_BUFFER): Ditto.
- (DTRACE_DMA_{READ,WRITE}_BUFFER): Ditto.
- * devices.c (update_for_binary_section): Ditto.
- (write_stack_arguments): Ditto.
- (stack_ioctl_callback): Ditto.
- * device_tree.c (device_tree_add_passthrough): Ditto.
- (device_tree_{add,find}_device): Ditto.
- (device_tree_{add,find}_integer): Ditto.
- (device_tree_find_{string,boolean}): Ditto.
- (device_tree_init{,_device}): Ditto.
- (device_tree_dump): Ditto.
- * sim_calls.c (sim_{read,write}): Ditto.
- (sim_{fetch,store}_register): Ditto.
- (sim_stop_reason): Ditto.
-
- * sim_callbacks.h (printf_filtered): Declare with attribute
- printf, so we can enable format checks.
-
- * devices.c (console_io_{read,write}_buffer_callback): Cast swtich
- argument to int, since ANSI doesn't allow long switch values.
- * emul_netbsd.c (do___sysctl): Ditto.
-
- * emul_netbsd.c (do___sysctl): Fix up printf call.
-
- * corefile.c (core_translate): Don't do arithmetic with void *
- pointers. Cast to char * first.
-
- * function_unit.c (FUNC_{LOAD,STORE}): Rename from {LOAD,STORE}
- and change all uses.
-
- * Makefile.in ({FUNC,MODEL,WARNING}_CFLAGS): New flags set by
- configure --enable switches.
- (CONFIG_CFLAGS): Include FUNC_CFLAGS and MODE_CFLAGS.
- (.c.o): Include WARNING_CFLAGS.
- (CPU_H): Include function_unit.h.
- (LIB_OBJ): Include function_unit.o.
- (BUILT_SRC_WO_CONFIG): Split from BUILT_SRC and do not include
- config.h or ppc-config.h.
- (BUILT_SRC): Include BUILT_SRC_WO_CONFIG, config.h and
- ppc-config.h.
- (filter_filename.o): Include config.h/ppc-config.h dependencies.
- (idecode.o, semantics.o, psim.o): Specify CC line without
- WARNING_CFLAGS so that we don't get all of the unused variable
- warnings that are generated.
- (function_unit.o): Add rule to build.
- (main.o, sim_calls.o): Add function_unit.h, itable.h dependencies.
- (mon.o): Include mon.c dependency.
- (TAGS): Depend on BUILT_SRC.
- (clean): Don't delete config.h or ppc-config.h
-
- * basics.h (sim_callbacks.h): Move include after the include of
- config.h and ppc-config.h.
-
- * bits.{h,c} (ROTL32,ROTL64): Move these functions to bits.c. Add
- support for BITS_INLINE to inline these. Add declarations to
- bits.h.
-
- * configure.in (--enable-sim-warnings): Add new option to specify
- compiler warnings for all modules except idecode.o and semantics.o
- which have lots of unused variables because they are machine
- generated.
- (--enable-sim-function-unit): New switch to configure whether
- function unit support is compiled in or not.
- (--enable-sim-{,default-}mode): New switches to control which cpu
- model is used.
- * configure: Regenerate.
-
- * corefile.c (core_attach_address_callback): Delete unused
- variable device_address.
-
- * cpu.c (struct _cpu): Add function unit pointer field func_unit.
- (cpu_create): If WITH_FUNCTION_UNIT, call function_unit_create.
- (cpu_init): If WITH_FUNCTION_UNIT, call function_unit_init.
- (cpu_halt): If WITH_FUNCTION_UNIT, call function_unit_halt.
- (cpu_function_unit): New function to return func_unit field.
-
- * cpu.h (function_unit.h): Include new include file.
- (cpu_function_unit): Declare.
-
- * debug.c (stdlib.h): Test HAVE_STDLIB_H, not HAVE_STDLIB.
- (config.h): Include config.h.
-
- * devices.c (icu_io_write_buffer_callback): Delete unused variable
- system.
-
- * emul_generic.c (emul_exit_call): Print out status value.
-
- * emul_netbsd.c (do_read): Delete unused variable nr_moved.
-
- * filter_filename.h (includes): Include config.h, ppc-config.h,
- not basics.h.
-
- * inline.c: Include bits.c if BITS_INLINE. Include
- function_unit.c if FUNCTION_UNIT_INLINE.
-
- * inline.h (INLINE_BITS): Define if BITS_INLINE.
- (INLINE_FUNCTION_UNIT): Define if FUNCTION_UNIT_INLINE.
-
- * interrupts.c (instruction_storage_interrupt): Delete unused
- variable nia.
-
- * lf.h (config.h): Include config.h.
-
- * main.c (includes): Include function_unit.c. If HAVE_UNISTD_H,
- include unistd.h.
- (usage): Update for -m model, -i, and -I options.
- (main): Delete unused variables stack_pointer and i. Add support
- for -i, -m model arguments. Call psim_print_info with verbose ==
- 1 if -i, and verbose == 2 if -I.
-
- * mon.c (stdio.h): Include stdio.h to pick up sprintf prototype.
- (mon_issue): Call function_unit_issue if function units are
- supported.
- (mon_print_info): Take psim * argument. Print out information
- from function_unit if available. Move read/write stats to always
- print, instead of printing if verbose > 1. Fix up plural
- vs. singular usage.
-
- * mon.h (mon_print_info): Update prototype.
-
- * psim.c (current_ppc_model): Add global variable.
- (psim_print_info): Pass system argument to mon_print_info.
-
- * sim_calls.c (function_unit.h): Include.
- (sim_open): Add support for -i and -m model options. If -i call
- psim_print_info with verbose == 1, if -I, with verbose == 2.
- (sim_resume): Delete unused variable program_counter.
-
- * std-config.h (WITH_FUNCTION_UNIT): Define.
- (ppc_model): Add enumeration giving all PowerPC models currently
- known about.
- ({WITH,CURRENT}_PPC_MODEL): Define.
- (FUNCTION_UNIT_INLINE): Define.
-
- * table.c (config.h): Include config.h.
-
- * vm.c (om_virtual_to_real): Print pte_word_{0,1} so the compiler
- doesn't complain that they're unused.
-
- * vm_n.h (vm_data_map_read_N): Delete unused variable rval.
-
-Mon Nov 6 23:15:54 1995 Andrew Cagney <cagney@highland.com.au>
-
- * sim-endian.c (ppc-endian.c), sim-endian.h (ppc-endian.h):
- renameed. These files are target independant.
- * Makefile.in, basics.h: update for new name.
-
- * sim-endian.h (SWAP_N), sim-endian.c (_SWAP_1): Rename existing
- SWAP_<N> to _SWAP_<N> so that sim-endian.h can contain SWAP_N
- macro's as required.
-
- * sim-endian.c, sim-endian-n.h (new file): Move endian code into a
- debugable header file.
-
- * ppc-instructions (Byte-Reverse): Enable byte reverse
- instructions using SWAP_N macros.
-
-Mon Nov 6 10:39:28 1995 Michael Meissner <meissner@tiktok.cygnus.com>
-
- * Makefile.in (config.status): Remove references to config.make
- and config.hdr.
-
- * config.{make,hdr}: Delete, no longer used.
- * build-psim: Ditto.
-
-Mon Nov 6 20:49:56 1995 Andrew Cagney <cagney@highland.com.au>
-
- * sim_calls.c (sim_open): Fix parsing of `target sim' options.
-
- * device_tree.c (device_tree_add_string): Wasn't saving the value
- of the string being entered into the tree.
-
- * psim.c (create_filed_device_tree): Not terminating string device
- names with a null.
-
- * psim.c (psim_create): Use `env' instead of
- `environment-architecture' to be consistent with configure.
- Reconize user/uea, virtual/vea and operating/oea.
-
-Sat Nov 4 12:29:45 1995 Fred Fish <fnf@cygnus.com>
-
- * core.c: Rename to corefile.c
- * core.h: Rename to corefile.h
- * inline.c: Include corefile.h, renamed from core.h.
- * cpu.h: Include corefile.h, renamed from core.h
- * vm.c: Include corefile.h, renamed from core.h
- * corefile.c: Include corefile.h rather than core.h
- * README.psim (KNOWN PROBLEMS): Change core.* references to corefile.*
- references.
- * Makefile.in (CPU_H): Change core.h to corefile.h
- (vm.o): Change dependency to corefile.h
- (LIB_SRC): Change core.c to corefile.c.
- (LIB_OBJ): Change core.o to corefile.o.
- (corefile.o): Change dependencies to corefile.c, corefile.h.
-
-Fri Nov 3 11:37:24 1995 Michael Meissner <meissner@tiktok.cygnus.com>
-
- * ppc-instructions (data cache instructions): Make all data cache
- instructions nops instead of invalid instructions.
-
- * Makefile.in (CONFIG_CFLAGS): Add ALIGNMENT_CFLAGS and
- TIMEBASE_CFLAGS which weren't included.
-
-Thu Nov 2 08:54:04 1995 Michael Meissner <meissner@tiktok.cygnus.com>
-
- * Makefile.in: Uncomment built file dependencies.
-
- * configure.in: Rewrite --enable-sim switch handling to use the
- autoconf builtins so it works correctly if the configure or
- Makefile.in files are modified and make decides to rebuild
- Makefile. Also document all of the --enable-sim switches
- supported. Check whether getrusage and sys/resource.h are
- supported.
- * config.in: Regenerate.
- * configure: Regenerate.
- * Makefile.in: Add support for all of the variables set with
- --enable-sim switches.
-
- * Makefile.in (clean): make clean now removes all built sources as
- well.
-
- * cpu.c: Use HAVE_STRING_H, HAVE_STRINGS_H, HAVE_UNISTD_H,
- HAVE_TIME_H, HAVE_SYS_TIMES_H, HAVE_SYS_RESOURCE_H defined in
- the generated config.h.
- * debug.c: Ditto.
- * device_tree.c: Ditto.
- * devices.c: Ditto.
- * dgen.c: Ditto.
- * emul_netbsd.c: Ditto.
- * igen.c: Ditto.
- * lf.c: Ditto.
- * misc.c: Ditto.
- * psim.c: Ditto.
- * registers.c: Ditto.
- * sim_calls.c: Ditt.
- * table.c: Ditto.
-
-
- * main.c (main): Call psim_print_info with verbose == 2.
-
- * mon.c (mon_print_info): Align the cpu number and number of
- instructions fields. Do not print an instruction category if the
- CPU did not execute any of those instructions. Print out number
- of reads and writes. If getrusage is supported, print out number
- of simulated instructins per second.
-
- * configure.in: Add support for --enable-sim-opcode=stupid.
- * configure: Regenerate.
-
-Wed Nov 1 23:46:59 1995 Andrew Cagney <cagney@highland.com.au>
-
- * std-config (INLINE_DEVICE_TREE): Don't inline either of
- device_tree.c or devices.c. There is no significant gain.
-
- * configure.in, Makefile.in: add --enable-sim-icache=[0-9]* and
- IGEN_ICACHE macro.
-
-Wed Nov 1 23:46:59 1995 Andrew Cagney <cagney@highland.com.au>
-
- * igen.c (main), misc.h (target_a2i, i2target), misc.c: Add
- functions to convert between target and igen internal bit numbers.
- Make IO go through these functions. Add -b (bit size) and -h (high
- bit nr) options to igen. Typical usage would be: ./igen -b 16 -h
- 15 for a 16 bit instruction format with the msb given a number 15.
-
-Wed Nov 1 22:17:32 1995 Andrew Cagney <cagney@highland.com.au>
-
- * dgen.c (main): Was outputting optarg even when it was NULL.
-
-Tue Oct 31 23:48:33 1995 Andrew Cagney <cagney@highland.com.au>
-
- * vm_n.h (vm_data_map_load_N, vm_data_map_store_n), debug.h,
- debug.c: Add tracing of load/store unit (virtual) with -t
- load-store.
-
-Tue Oct 31 21:44:01 1995 Andrew Cagney <cagney@highland.com.au>
-
- * std-config.h (WITH_ENVIRONMENT): Add USER_ENVIRONMENT which does
- not include things such as the time base and events.
-
- * interrupt.c, sim_calls.c, cpu.h, vm.c, configure.in: Add UEA to
- all environment switches for above.
-
- * psim.c (psim_create): ditto - new device tree node name is
- /options/environment-architecture with values user, virtual and
- operating.
-
-Tue Oct 31 21:31:32 1995 Andrew Cagney <cagney@highland.com.au>
-
- * ppc-opcode-stupid: Third example of use of opcode table - this
- one expands all mtspr/mfspr and branch instructions. Appears to
- give about a 10% gain in performance if everything enabled. Also
- takes about 150mb of swap to build.
-
-Wed Nov 1 10:49:48 1995 Michael Meissner <meissner@tiktok.cygnus.com>
-
- * emul_netbsd.c (do_exit): Print arguments and close parenthesis
- if tracing, since exit doesn't go through emul_exit_call.
- (do_read): Print arguments if tracing.
- (do_write): Ditto.
- (do_open): Ditto.
- (do_break): Ditto.
- (do_kill): Ditto.
- (do_dup): Ditto.
- (do_sigprocmask): Replace trace with printing arguments if
- tracing.
- (do_ioctl): Print arguments if tracing.
- (do_umask): Ditto.
- (do_dup2): Ditto.
- (do_fcntl): Ditto.
- (do_gettimeofday): Ditto.
- (do_getrusage): Ditto.
- (do_fstatfs): Ditto.
-
- * filter_filename.c: New file to provide filter_filename to strip
- the directory prefix from a file.
- * filter_filename.h: New include file to declare filter_filename.
-
- * debug.h: Include filter_filename.h.
- (TRACE,DTRACE,ERROR): Use filter_filename on __FILE__.
-
- * misc.h: Include filter_filename.h.
- (ASSERT): Use filter_filename on __FILE__.
-
- * igen.c (lf_print_my_prefix): Use filter_filename on the filename
- argument.
-
- * Makefile.in: Add filter_filename support.
-
- * ppc-instructions (dcbi, icbi): Make these NOPs rather than
- invalid instructions.
-
- * configure.in: Add support for more --enable-sim-* switches.
- Use config.make and config.hdr to write to Makefile and config.h
- respectively. Don't rewrite Makefile, just append to it.
- * configure: Regenerate.
- * config.{make,hdr}: New shell scripts.
-
- * Makefile.in: Remove all variables set by configure.in.
- (psim.o): Depend on $(BUILT_SRC) also.
-
- * emul_netbsd.c (do_gettimeofday,do_getrusage): When comparing an
- integer, use 0, not NULL.
-
-Tue Oct 31 15:20:04 1995 Michael Meissner <meissner@tiktok.cygnus.com>
-
- * configure.in: Add support for --enable-sim-inline,
- --enable-sim-bswap, --enable-sim-cflags, --enable-sim-complex,
- --enable-sim-switch, --enable-sim-duplicate, --enable-sim-filter,
- and --enable-sim-endian switch to control various Makefile
- variables.
- * configure: Regenerate from configure.in.
- * Makefile.in: Add various Make variables that the various
- switches alter.
-
- * std-config.h (DEFAULT_INLINE): Don't set this to 2 if using GCC
- and optimizing by default.
-
-Fri Oct 27 19:26:27 1995 Andrew Cagney <cagney@highland.com.au>
-
- * bits.h (ROTL32, ROTL64): Were functions, made them macros, now
- make them functions again. Appears 2.6.3 is confused by just a
- macro.
-
-Thu Oct 26 18:31:58 1995 Andrew Cagney <cagney@highland.com.au>
-
- * ppc-endian.c (SWAP_8): Fix 8 byte swap!
-
- * psim.c (psim_create): Not correctly checking that runtime
- configuration of things like ENDIAN, ENVIRONMENT and ALIGNMENT
- matched the compiled in ones.
-
- * debug.h (ITRACE), igen.c: Tidy up more tracing flags -
- trace_semantics is now different to trace_idecode, the former
- checks the cache.
-
-Tue Oct 24 21:54:13 1995 Andrew Cagney <cagney@highland.com.au>
-
- * ppc-instructions (mtsrin): Missing instruction
- * ppc-instructions (mfsrin): Missing instruction
- * ppc-instructions (eieio): Missing instruction
-
-Tue Oct 24 20:55:29 1995 Andrew Cagney <cagney@highland.com.au>
-
- * build-psim: New shell script - see internals for usage,
- simplifies the process of building custom simulators.
-
-Mon Oct 23 23:48:59 1995 Andrew Cagney <cagney@highland.com.au>
-
- * std-config.h (SEMANTICS_INLINE): Tidy up notes on each of the
- INLINE macros. Make SEMANTICS_INLINE == 1 if DEFAULT_INLINE == 2.
- Don't use DEFAULT_INLINE to define REGISTERS_INLINE DEVICES_INLINE
- DEVICE_TREE_INLINE or INTERRUPTS_INLINE as none of these are on
- the instruction or data critical paths.
-
- * FIXME: devices.c/emul_netbsd.c would benefit (slightly) from
- the inclusion of device_tree.c/emul_generic.c.
-
-Mon Oct 23 00:31:50 1995 Andrew Cagney <cagney@highland.com.au>
-
- * os_emul.[hc], emul_generic.[hc], emul_netbsd.[hc]: replace
- system.[hc]. Start of suport for multiple emulations and
- emulation state (os_emul object).
-
- * emul_generic.[hc]: Start of code to implement proper system call
- tracing (from spy).
-
-Sun Oct 22 21:33:51 1995 Andrew Cagney <cagney@highland.com.au>
-
- * cpu.h, cpu.c (cpu_init): New function, zero the registers before
- the processor is started. Fixes problem of registers being
- undefined when restarting from within gdb.
-
- * cpu.h, cpu.c (cpu_flush_icache): New function, flushes the
- instruction cache (if present). Fixes problem of cpu caching gdb
- breakpoint instructions.
-
- FIXME: PSIM sometimes aborts calling error(), it should instead
- call sim_error() say which takes care of housekeeping such as
- saving the CIA before calling error.
-
- * NOTE: cpu_flush_cache() instead of cpu_synchronize_context() is
- used when restarting a simulation because the latter has the
- unwanted side effect (well I as a kernel hacker think it is) of
- performing an isync when the instruction stream doesn't contain
- one.
-
-Sun Oct 22 19:27:48 1995 Andrew Cagney <cagney@highland.com.au>
-
- * mon.h (new), mon.c (new), std-config.h (WITH_MON): Performance
- monitoring module. Counts both instructions issued and
- load/stores.
-
- * NOTE: mon does not contain to count instruction loads as this
- information is already available from the mon_issue() hook.
-
- * igen.c (lf_print_c_semantic), vm_n.h: Add counting code.
-
- * psim.h, psim.c (psim_create), cpu.h, cpu.c (cpu_create): Attach
- a common monitor to each of the cpus. Delete
- cpu_increment_number_of_insns() and cpu_get_number_of_insns()
- replaced by copied code in mon.[hc].
-
-Sun Oct 22 18:42:45 1995 Andrew Cagney <cagney@highland.com.au>
-
- * sim_calls.c, main.c, psim.c (psim_create): always create
- `WITH_SMP' cpus. The actual number of CPU's active in a
- simulation run is taken from the device node: /init/smp (an
- integer). WITH_SMP changed to 2 (remember to put it back to 0).
-
-Fri Oct 20 17:26:54 1995 Andrew Cagney <cagney@highland.com.au>
-
- * system.c: More system call emulation. If code appears NetBSD
- specific, make conditional to being compiled on a NetBSD system
- (sigh).
-
-Wed Oct 18 23:02:20 1995 Andrew Cagney <cagney@highland.com.au>
-
- * Makefile.in, gen.c(delete), igen.c(new), dgen.c(new),
- lf.[ch](new), table.[ch](new): Split into two generators - igen
- that outputs the instruction tables and dgen that outputs the spr
- tables. Add -f (filter out) flag to igen to filter out certain
- instructions (ex 64 bit ones) from the created tables. Include
- $(LIBIBERTY_LIB) in link options in case host lacks some libc
- functions.
-
- * NOTE: igen, since it was originally written for the
- PowerPC/RS6000, things the MSB is 0 and the LSB is 63{31}.
-
- * Makefile.in, std-config.h, ppc-cache-rules(new),
- ppc-opcode-complex(new), ppc-opcode-simple(new): (for igen) Create
- cache-rule and opcode-rule tables from macros found std-config.h.
- Delete corresponding macro's from std-config.h.
-
- * igen.c (gen_itable_c, gen_itable_h), Makefile.in: code to output
- an table of all the instructions. Code to output a type
- enumerating all the instructin names.
-
- * igen.c(lf_print_c_semantic): Move call to increment instruction
- counter so that it occures _after_ the instruction has been fully
- validated, was double counting illegal/invalid instructions. Add
- conditional so only compiled in when WITH_PROFILE enabled (enabled
- by default).
-
- * igen.c, cpu.h, cpu.c(cpu_increment_number_of_insns): Include
- itable.h, count individual instruction types not just total,
- adjust reporting functions to output this.
-
- * ppc-instructions (64 bit Load Doubleword with Update Indexed):
- Had 32./ instead of 31./
-
- * ppc-instructions (64 bit Store Double Word Conditional Indexed):
- bitrot - updated to use newer CR register operators.
-
- * ppc-instructions (64bit Floating Convert from Integer
- Doubleword): Correct call to Round_Float().
-
-Mon Oct 16 00:31:20 1995 Andrew Cagney <cagney@highland.com.au>
-
- * basics.h: #include "sim_callbacks.h" earlier so that its
- prototypes are declared in all other header files.
-
- * bits.h, bits.c, idecode_expression.h (ROTL32, ROTL64): Update
- doc in bits.h, remove dead code in bits.c, move ROTL32/ROTL64 into
- bits.h.
-
- * cpu.c(cpu_add_commas), device_tree.h, device_tree.c(scand_*):
- Add size of buffer argument to functions writing a string into a
- buffer. Check for buffer overflow.
-
-Sun Oct 15 22:16:11 1995 Andrew Cagney <cagney@highland.com.au>
-
- * devices.h, devices.c, debug.h, debug.c: add macro's for tracing
- of each device. Make parameter names consistent so macros work.
- Use macro's in device functions.
-
- * device_tree.c, devices.h, devices.c: include path to device in a
- devices node when creating it.
-
- * device_tree.c, debug.h, debug.c: Add tracing of `device-tree'.
-
- * core.c: add tracing of core-device, adjust parameter names in
- core functions to be consistent with those in devices*.
-
-Sun Oct 15 20:33:20 1995 Andrew Cagney <cagney@highland.com.au>
-
- * debug.h, debug.c (trace_option): New function. Parses the trace
- option, updating the trace array.
-
- * debug.h, debug.c (trace_usage): New function. Outputs the list
- of all possible trace options.
-
- * sim_calls.c (sim_open), main.c (main): Use new trace_option() to
- parse trace options specified with the simpler -t flag. Adjust
- usage.
-
- * FIXME: basic parsing of command line options is still duplicated
- by main.c and sim_calls.c
-
-Thu Oct 26 10:42:28 1995 Michael Meissner <meissner@tiktok.cygnus.com>
-
- * Makefile.in (clean): Delete *.i and *.out files.
-
- * ppc-endian.c (SWAP_n): Add SET argument to allow use of SWAP
- macros for either assignment or return. Fix SWAP_8 to use a
- union, and two SWAP_4's. Delete SWAP_N, since nobody uses it now.
- (ENDIAN_N): Add SET argument to SWAP_n calls. Delete macro defs
- that hardwired swapping on/off, let optimizer delete dead code.
-
- * main.c (main): Add printf that we caught a signal and print out
- the failing address.
-
-Thu Oct 19 21:43:39 1995 Fred Fish <fnf@fishfood.amigalib.com>
-
- * Makefile.in: Remove tabs from otherwise empty line.
- Confuses many non-GNU versions of "make".
-
-Wed Oct 18 08:51:25 1995 Michael Meissner <meissner@tiktok.cygnus.com>
-
- * Makefile.in (clean): Delete files produced by gen.
-
-Mon Oct 16 17:34:24 1995 Michael Meissner <meissner@tiktok.cygnus.com>
-
- * gen.c (lf_print_c_semantic_function): Move counting # of
- instructions here so it works with caching.
- (gen_idecode_c): Move from here.
-
-Wed Oct 11 17:13:15 1995 Andrew Cagney <cagney@highland.com.au>
-
- * gen.c, ppc-instructions, psim.c: Fix code for generating
- cracking instruction cache. Delete the code that cached just the
- result from doing an instruction lookup - this ran slower than no
- cache at all.
-
-Fri Oct 13 09:58:43 1995 Michael Meissner <meissner@tiktok.cygnus.com>
-
- * Makefile.in (gen.o): Include $(INLINE_CFLAGS).
-
- * debug.h (ppc_trace): Rename from trace, to avoid a conflict with
- TCL when gdb is linked with the simulator.
- * debug.c (ppc_trace): Ditto.
- * sim_calls.c (sim_open): Change trace -> ppc_trace.
- * main.c (main): Ditto.
-
- * cpu.c (cpu_add_commas): Remove extra static.
-
-Thu Oct 12 11:35:53 1995 Michael Meissner <meissner@tiktok.cygnus.com>
-
- * Makefile.in (psim.o): Now that inlines are turned on, make
- psim.o depend on all sources.
-
- * cpu.c (cpu_add_commas): New function to format a long with
- commas.
- (cpu_print_info): Use it to print number_of_insns.
-
- * ppc-endian.c (SWAP_n): New macros to speed up byte swapping for
- 2, 4, and 8 bytes.
- (ENDIAN_N): If both target and host byte orders are known, don't
- bother testing CURRENT_{TARGET,HOST}_BYTE_ORDER.
-
- * ppc-endian.h (target specific H2T_n/T2H_n macros): Remove #if 0
- to allow target specific H2T_n/T2H_n macros to be used.
- (htonl, ntohl): If compiled on a 486 by GCC and WITH_BSWAP is
- non-zero, redefine the htonl/ntohl macros to use the BSWAP instead
- of the 3 instruction sequence that runs on 386s.
-
- * std-config.h (WITH_{HOST,TARGET}_BYTE_ORDER): Don't override if
- specified on the compile line.
- (WITH_BSWAP): If not defined, define as 0.
-
- * Makefile.in (INLINE_CFLAGS): Add -DDEFAULT_INLINE=2 to add
- default inline support. Pass INLINE_CFLAGS when compiling.
-
- * devices.{h,c} (unimp_device_ioctl): Use STATIC_DEVICES, not
- INLINE_DEVICES since GCC doesn't like inline functions that
- accept variable arguments.
- (stack_ioctl_callback): Make function just static because GCC
- doesn't like inline functions that accept variable arguments.
-
- * devices.h (STATIC_DEVICES): Define as empty if not defined.
-
- * inline.c: Correct pathnames of included C files to match current
- implementation.
-
- * inline.h (STATIC_DEVICES): If DEVICES_INLINE is defined to be
- non-zero, define STATIC_DEVICES to be static.
-
- * std-config.h (INLINE): If GNU C and optimizing, define this as
- __inline__.
- (DEFAULT_INLINE): If not defined, define as 0.
- (ENDIAN_INLINE): If not defined, define as DEFAULT_INLINE.
- ({CORE,VM,CPU,EVENTS,REGISTERS,INTERRUPTS}_INLINE): Ditto.
- ({SPREG,IDECODE}_INLINE): Ditto.
-
-Wed Oct 11 17:13:15 1995 Andrew Cagney <cagney@highland.com.au>
-
- * ppc-instructions: Initial cut of floating point suport added.
- Of note include - use of host IEEE floating point instructions,
- use of PowerPC manual pseudo code to handle the FPSCR. It is not
- currently a pretty sight.
-
- * memory_map.h, memory_map.c, memory_map_n.h, core.h, core.c:
- merge into core.h, core.c, core_n.h. The type memory_map replaced
- with core_map. This removes a level of pointer indirection when
- translating an address.
-
- * memory_map.h, memory_map.c, memory_map_n.h: delete.
-
- * Makefile.in et.al (sorry): tweek to use new core, core_map and
- core.h.
-
-Wed Oct 11 12:10:26 1995 Andrew Cagney <cagney@highland.com.au>
-
- * sim_calls.c, main.c: Add -g (trace_gdb) option, add tracing to
- most of the other functions in sim_calls.c.
-
- * basics.h (CONCAT3), memory_map.c, memory_map_n.h, Makefile.in:
- Add macros to better cover up `generic' code. Makes it possible
- to step through the generic code!
-
- * vm.c, vm_n.h, Makefile.in: ditto
-
-Tue Oct 10 15:42:59 1995 Andrew Cagney <cagney@highland.com.au>
-
- * devices.h, devices.c, memory_map.h, memory_map.c: Changed
- callback interface so that there is a read/write buffer but no
- read/write_word. VEA default memory read/write handler sometimes
- couldn't resolve an access and of those some were for a memory
- fault and some were because gdb was making a bogus request.
-
- * devices.h, devices.c, memory_map.h, memory_map.c, vm.h, vm.c:
- eliminate transfer_mode (raw or cooked) parameter from read/write
- buffer.
-
-Fri Oct 6 20:23:56 1995 Andrew Cagney <cagney@highland.com.au>
-
- * ppc-instructions (fmul, fmuls): correct instruction format - had
- FRB instead of FRC.
-
-Wed Oct 4 17:31:12 1995 Andrew Cagney <cagney@highland.com.au>
-
- * psim.c, device_tree.h, device_tree.c, devices.c (printd_*,
- scand_*): new functions to parse/print fields in device names
- while hiding any machine dependency.
-
- * devices.c, psim.c: Change the stack init code so that it is
- handled by a device. Arguments passed across using a device ioctl
- (hack).
-
- * devices.h, devices.c: device ioctl callback changed to allow a
- variable number of arguments. This gives greater flexability and
- greater chance of bugs.
-
-Tue Oct 3 22:01:56 1995 Andrew Cagney <cagney@highland.com.au>
-
- * main.c (printf_filtered, error): Missing va_end() to close off
- variable argument use.
-
- * Makefile.in (tmp-gencode): comment out hack to get around some
- versions of make not handling files being created as side-effects.
-
- * gen.c (lf_open): Add -n (real_file_name) option. Specifies an
- alternative file name to use in output files for things like #line
- macros.
-
- Makefile.in (tmp-gencode): Use gen -n so that debug info is
- correct.
-
- * Makefile.in (TARGETLIB): Use this instead of libsim.a in the
- Makefile.
-
-Sat Oct 7 22:40:59 1995 Michael Meissner <meissner@tiktok.cygnus.com>
-
- * sim_calls.c (sim_set_callbacks): Define new function.
-
-Fri Oct 6 17:23:10 1995 Michael Meissner <meissner@tiktok.cygnus.com>
-
- * psim.c (psim_print_info): Print exit status or signal number.
-
-Mon Oct 2 11:46:37 1995 Michael Meissner <meissner@tiktok.cygnus.com>
-
- * cpu.c (struct _cpu): Add number_of_insns field to trace how many
- instructions are executed.
- (cpu_increment_number_of_insns): New function to increment the
- number of instructions issued.
- (cpu_get_number_of_insns): New function to return the number of
- instructions issued.
- (cpu_print_info): New function to print cpu related information.
- At present, print the number of instructions executed.
-
- * gen_idecode_c: Emit call to cpu_increment_number_of_insns within
- idecode_issue.
-
- * psim.c (psim_print_info): New function to iterate over each of
- the CPU's calling cpu_print_info.
-
- * psim.h,cpu.h: Add new declarations.
-
- * sim_calls.c (sim_open): Add argument processing to add the same
- switches main.c accepts for the standalone processor.
- (sim_close): Call psim_print_info if -I.
-
- * main.c (main): Add comment saying to update sim_calls.c when
- adding switches. Add -I to call psim_print_info when done.
- (usage): Update usage message.
-
-Sun Oct 1 13:52:59 1995 Michael Meissner <meissner@tiktok.cygnus.com>
-
- * main.c (printf_filtered): Correct to match new prototype.
-
-Sat Sep 30 20:47:05 1995 Michael Meissner <meissner@tiktok.cygnus.com>
-
- * sim_callbacks.h (printf_filtered): Correct prototype.
-
-Thu Sep 21 16:26:49 1995 Michael Meissner <meissner@tiktok.cygnus.com>
-
- * device_tree.c (OEA_MEMORY_SIZE): Define if not defined to
- 0x100000.
- (clayton_memory_size): Define as OEA_MEMORY_SIZE.
-
- * std-config.h (WITH_TRACE): Default to 1 now.
-
- * psim.c (write_stack_arguments): Don't write any stack arguments
- if OEA.
-
- * main.c (main): Switch to using getopt. Make -p also set
- trace_semantics. Make -a turn on all trace flags. Make -C turn
- on console tracing.
-
- * device_tree.c (create_option_device_node): Assume a program is
- OEA if the start address is < 4096, not just == 0.
-
-Wed Sep 20 13:36:06 1995 Ian Lance Taylor <ian@cygnus.com>
-
- * Makefile.in (maintainer-clean): New synonym for realclean.
-
-Sun Sep 10 10:23:56 1995 Michael Tiemann <tiemann@axon.cygnus.com>
-
- * registers.c (register_description): Add gdb synonyms for cr
- (cnd) and msr (ps).
-
-Fri Sep 8 13:16:10 1995 Ian Lance Taylor <ian@cygnus.com>
-
- * Makefile.in (install): Don't install in $(tooldir).
-
- * configure.in: Call AC_CONFIG_HEADER. Don't try to use
- bfd/hosts/*.h file or bfd/config/*.mh file. Call AC_PROG_CC and
- AC_PROG_RANLIB. Substitute in values for CFLAGS, HDEFINES, AR,
- and CC_FOR_BUILD. Call AC_CHECK_HEADERS for various header files.
- Touch stamp.h if creating config.h.
- * configure: Rebuild.
- * config.in: New file, created by autoheader.
- * Makefile.in (AR): Define as @AR@.
- (CC): New variable, defined as @CC@.
- (CFLAGS): Define as @CFLAGS@.
- (CC_FOR_BUILD): New variable, defined as @CC_FOR_BUILD@.
- (RANLIB): Define as @RANLIB@.
- (HDEFINES, TDEFINES): New variables.
- (@host_makefile_frag@): Remove.
- (mostlyclean): Make the same as clean, not distclean.
- (clean): Remove config.log.
- (distclean): Remove config.h and stamp-h.
- (Makefile): Don't depend upon @frags@. Just rebuild Makefile when
- invoking config.status.
- (config.h, stamp-h): New targets.
- (gen, gen.o): Build with CC_FOR_BUILD, not CC.
- (ppc-config.h): Rename from old config.h build.
- * (basics.h,gen.c,ppc-endian.c,psim.c): Include ppc-config.h.
-
-Fri Sep 8 09:51:03 1995 Michael Meissner <meissner@tiktok.cygnus.com>
-
- * configure{,.in}: Don't include sysdep.h from bfd, since bfd no
- longer provides it.
- * basics.h (sysdep.h): Don't include it.
- * Makefile.in (BASICS_H): Remove sysdep.h.
-
-Wed Sep 6 13:25:42 1995 Andrew Cagney <cagney@highland.com.au>
-
- * core.c (core_add_data): First growth of bss was being put at
- wrong address (0) instead of &end.
-
- * core.c (core_add_stack, core_add_data): Was not handling case
- where bss/stack is grown across the current end-of-{bss,stack}.
-
-Wed Sep 6 00:46:10 1995 Andrew Cagney <cagney@highland.com.au>
-
- * system.c (system_call): Fix SYS_break - was aligning bss to a
- page boundary instead of just an 8 byte one; On first call sbrk(0)
- != sbrk(0).
-
-Thu Aug 24 14:48:54 1995 Michael Meissner <meissner@tiktok.cygnus.com>
-
- * Makefile.in (install): Fix install rule.
-
-Tue Aug 22 09:31:18 1995 Michael Meissner <meissner@tiktok.cygnus.com>
-
- * system.c (system_call): Add read support.
-
- * main.c (main): -t sets trace_device_tree. Correct usage message
- to current reality.
-
- * device_tree.c (update_memory_node_for_section): Make tracing
- output line up. If not code or readonly, assume that the section
- is a data section and has read/write permissions. Add readonly
- support.
-
- * core.c (create_core_from_addresses): Print end address in traces
- and make tracing output line up.
-
- * Makefile.in: Rewrite from Makefile to work with the Cygnus
- environment, and support compiling in a different directory than
- the sources reside in.
-
- * ppc-endian.h: Rename from endian.h so that it doesn't get
- confused with /usr/include/sys/endian.h on Linux. Add Linux
- endian support.
-
- * ppc-endian.c: Rename to be consistant with ppc-endian.h.
- Include ppc-endian.h, not endian.h.
-
- * basics.h (sysdep.h): Include sysdep.h that configure makes.
- Include ppc-endian.h, not endian.h.
-
- * std-config.h: Rename from ppc-config. Put #ifndefs around most
- configuration macros, so they can be overridden via CFLAGS. By
- default, turn off tracing.
-
- * configure.in: Clone from other simulator targets.
- * configure: Generate via autoconf from configure.in.
-
-Sat Aug 19 09:05:32 1995 Andrew Cagney <cagney@highland.com.au>
-
- * ppc-instructions: fix srawi (was geting XER[CA] real wrong).
-
- * interrupts.c (data_storage_interrupt): allow stack to grow by
- upto one MB per increment.
-
- * ppc-instructions: divw was computing rA / rA not rA / rB
-
- * main.c (main): really stupid. Wasn't exiting with correct status
-
-Fri Aug 18 00:38:01 1995 Andrew Cagney <cagney@highland.com.au>
-
- * system.c (system_call): add system calls kill(2) and getpid(2).
-
- * main.c (main): Check/return exit status when simulation
- finishes.
-
-Thu Aug 17 14:29:18 1995 Andrew Cagney <cagney@highland.com.au>
-
- * device_tree.c (create_option_device_node): Alignment rules (at
- least for the moment) now are for strict alignment only for LE OEA
- mode. (Because of compiler problems).
-
- * system.c (system_call) SYS_exit: Wasn't exiting with correct status.
-
-Thu Aug 17 01:16:38 1995 Andrew Cagney <cagney@highland.com.au>
-
- * vm.c (DEFINE_VM_DATA_MAP_WRITE_N): For miss aligned transfer
- forgot to return.
-
- * system.c (system_call): didn't page align break argument before
- determining increment break increment.
-
- * psim/ppc: Re-arange entire directory structure so that
- everything lives in the one directory. While a pain for cleaning,
- makes building across multiple architectures much simpler.
-
- * devices.c, device_tree.c: Added code that provides a simple
- illustration of how an interrupt control device could be
- implemented.
-
- * devices.c: Added code so that the dumb console device can read
- (from stdin) as well as write to stdout.
-
diff --git a/sim/ppc/INSTALL b/sim/ppc/INSTALL
deleted file mode 100644
index da288f1629d..00000000000
--- a/sim/ppc/INSTALL
+++ /dev/null
@@ -1,812 +0,0 @@
-
- PSIM - model the PowerPC environment
-
- Copyright (C) 1994-1996, Andrew Cagney <cagney@highland.com.au>.
-
- ----------------------------------------------------------------------
-
-
- Building PSIM
-
- This file describes how to build the program PSIM
-
- o Walk through a basic build
-
- o Discussion of PSIM's components and
- how they relate to the build process
-
- o Detailed description of each of PSIM's
- compile time configuration options
-
-
- ----------------------------------------------------------------------
-
-
-BUILDING PSIM:
-
-PSIM 1.0.2 is included in GDB-4.16. To build PSIM you will need the
-following:
-
- gdb-4.16.tar.gz Available from your favorite GNU
- ftp site
-
- gcc GCC version two includes suport
- for long long (64bit integer)
- arrithemetic which PSIM uses. Hence
- it is recommended that you build PSIM
- using GCC.
-
-Method:
-
- 1. Unpack gdb
-
- $ cd .../scratch
- $ gunzip < gdb-4.16.tar.gz | tar xf -
-
-
- 2. Configure gdb
-
- First consult the gdb documentation
-
- $ cd .../scratch
- $ cd gdb-4.16
- $ more README
- $ more gdb/README
-
- then something like (I assume SH):
-
- $ CC=gcc ./configure \
- --enable-sim-powerpc \
- --target=powerpc-unknown-eabi \
- --prefix=/applications/psim
-
-
- 4. Build (again specifying GCC)
-
- $ make CC=gcc
-
- alternatively, if you are short on disk space or only
- want to build the simulator:
-
- $ ( cd libiberty && make CC=gcc )
- $ ( cd bfd && make CC=gcc )
- $ ( cd sim/ppc && make CC=gcc )
-
-
- 5. Install
-
- $ make CC=gcc install
-
- or just
-
- $ cp gdb/gdb ~/bin/powerpc-unknown-eabisim-gdb
- $ cp sim/ppc/run ~/bin/powerpc-unknown-eabisim-run
-
-
- ----------------------------------------------------------------------
-
-
-UPDATING PSIM:
-
-
-A PSIM is an ongoing development. Occasional snapshots which both contain new
-features and fix old bugs are made available. See the ftp directory:
-
- ftp://ftp.ci.com.au/pub/psim/beta
-or ftp://cambridge.cygnus.com/pub/psim/beta
-
-for the latest version. To build/install one of these snapshots, you
-replace the sim/ppc found in the gdb archive with with one from the
-snapshot. Then just re-configure and rebuild/install.
-
- Procedure:
-
- 0. A starting point
-
- $ cd gdb-4.16
-
-
- 1. Remove the old psim directory
-
- $ mv sim/ppc sim/old.ppc
-
-
- 2. Unpack the new one
-
- $ gunzip < ../psim-NNNNNN.tar.gz | tar tf -
- $ gunzip < ../psim-NNNNNN.tar.gz | tar tf -
-
-
- 3. Reconfigure/rebuild (as seen above):
-
- $ CC=gcc ./configure \
- --enable-sim-powerpc \
- --target=powerpc-unknown-eabi \
- --prefix=/applications/psim
- $ make CC=gcc
-
-
- ----------------------------------------------------------------------
-
-
-UPDATES TO GDB:
-
-From time to time, problems involving the integration of PSIM into gdb
-are found. While eventually each of these problems is resolved there
-can be periouds during which a local hack may be needed.
-
-At the time of writing the following were outstanding:
-
- ATTACH command:
-
- ftp://ftp.ci.com.au/pub/psim/gdb-4.15+attach.diff.gz
- or ftp://cambridge.cygnus.com/pub/psim/gdb-4.15+attach.diff.gz
-
- PSIM, unlike the other simulators found in GDB, is able to load
- the description of a target machine (including the initial
- state of all processor registers) from a file.
-
- Unfortunatly GDB does not yet have a standard command that
- facilitates the use of this feature. Until such a command is
- added, the patch (hack?) gdb-4.15+attach.diff.gz can be used to
- extend GDB's attach command so that it can be used to initialize
- the simulators configuration from a file.
-
-
-
- ----------------------------------------------------------------------
-
-
-RUNNING PROGRAMS:
-
-
-See the file:
-
- ftp://ftp.ci.com.au/pub/psim/RUN
-or ftp://cambridge.cygnus.com/pub/psim/RUN
-
-
- ----------------------------------------------------------------------
-
-
-COMPILE TIME CONFIGURATION OPTIONS:
-
-
-PSIM's compile time configuration is controlled by autoconf. PSIM's
-configure script recognises options of the form:
-
- --enable-sim-<option>[=<val>]
-
-And can be specified on the configure command line (at the top level
-of the gdb directory tree) vis:
-
- $ cd gdb-4.15
- $ CC=gcc ./configure \
- --target=powerpc-unknown-eabisim \
- --prefix=/applications/psim \
- --enable-sim-inline
- $ make CC=gcc
-
-For a brief list of PSIM's configuration options, configure --help
-will list them vis:
-
- $ cd sim/ppc
- $ ./configure --help
-
-Each PSIM specific option is discussed in detail below.
-
-
-
---enable-sim-cflags=<opts>
-
-
-Specify additional C compiler flags that are to be used when compiling
-just PSIM.
-
-PSIM places heavy demands on both the host machine and its C compiler. So that
-the builder has better control over the compiler the above option can be used
-to pass additional options to the compiler while PSIM is being built.
-
-Ex: No debug information
-
-PSIM can be built with everything inline. Unfortunately, because of
-all the debugging information generated the C compiler can grow very
-very large as a result. For GCC, the debug information can be
-restricted with the `-g0' option. To specify that this option should
-be include in the CFLAGS when compiling the psim source code use:
-
- --enable-sim-cflags=-g0
-
-Ex: Additional optimization flags
-
-A significant gain in performance can be achieved by tuning the
-optimization flags passed to the C compiler. For instance on an x86
-you may consider:
-
- --enable-sim-cflags='-g0 -O2 -fno-strength-reduce -f...'
-
-
-
---enable-sim-warnings=<flags>
-
-
-Turn on additional GCC specific checks.
-
-Some hosts (NetBSD, Linux, Solaris-2.5) have complete header files
-that include correct prototypes for all library functions. On such
-hosts, PSIM can be built with many more than the standard C checks
-enabled. The option --enable-sim-warnings controls this.
-
-Ex: Default warnings
-
-With just --enable-sim-warnings, the following -W options are enabled:
--Werror -Wall -Wpointer-arith -Wmissing-prototypes.
-
-
-
---enable-sim-opcode=which
-
-
-Specify the file containing the rules for generating the instruction
-decode and execute functions from the file ppc-instructions.
-
-The form of the instruction decode and execute functions is controlled
-by an opcode table. It specifies: the combination of switch
-statements and jump tables to use when decoding an instruction and how
-much of each instruction should be decoded before calling the
-instruction execute function.
-
-PSIM includes a number of opcode tables:
-
- psim-opcode-simple
- Generates a small compact two level switch statement
- that will compile quickly and run reasonably fast.
-
- This may be useful on a small machine.
-
- psim-opcode-complex
- (the default) A fairly aggressive instruction decode
- table that includes the breaking out of a number
- of special instruction cases (eg RA==0 vs RA!=0).
-
- psim-opcode-flat
- Identical to complex except a switch statement
- is used. Ideal for when the icache is being
- disabled.
-
- psim-opcode-stupid
- In addition to the instruction decodes performed
- by psim-opcode-complex, this also full decodes mtspr,
- mfspr, and branch instructions. The table generated
- is very large and, as a consequence, only performs
- well on machines with large caches.
-
- ppc-opcode-test-1
- ppc-opcode-test-2
- Generate test (but workable) tables. These exercise
- PSIM's ability to generate instruction decode functions
- that are a combination of jump-tables and switch statements.
-
-The program igen generates the instruction tables from the opcode
-table and the ppc-instruction table.
-
-
-
---enable-sim-switch
-
-
-Enable/disable the use of a switch statement when looking up the
-attributes of a SPR register.
-
-The PowerPC architecture defines a number of Special Purpose Registers
-(SPR's). Associated with each of these registers are a number of
-attributes (such as validity or size) which the instructions
-mtspr/mfspr query as part of their execution.
-
-For PSIM, this information is kept in a table (ppc-spr-table). The
-program dgen converts this table into lookup routines (contained in
-the generated files spreg.h spreg.c) that can be used to query an
-SPR's attributes. Those lookup routines are either implemented as
-a table or alternatively as a number of switch statements:
-
- spr_table spr_info[] = { .... };
- int spr_length(sprs spr) { return spr_info[spr].length; }
-
-vs
-
- int spr_length(sprs spr) { switch (spr) { case ..: return ..; } }
-
-In general the first implementation (a table) is the most efficient.
-It may, however, prove that when performing an aggressive optimization
-where both the SPR is known and the above function is being inlined
-(with the consequence that GCC can eliminate the switch statement)
-that the second choice is improves performance.
-
-In practice, only a marginal (if any benefit) has ever been seen.
-
-
-
---enable-sim-duplicate
-
-
-Create a duplicate copy of each instruction function hardwiring
-instruction fields that would have otherwise have been variable.
-
-As discussed above, igen outputs a C function generated from the file
-ppc-instructions (using the opcode rules) for each of the
-instructions. Thus multiple entries in the instruction decode tables
-may be pointing back at the same function. Enabling duplicate, will
-result in psim creating a duplicate of the instruction's function for
-each different entry in the instruction decode tables.
-
-For instance, given the branch instruction:
-
- 0.19,6.BO,11.BI,16./,21.528,31.LK
- ...
- if (LK) LR = (spreg)IEA(CIA + 4);
- ...
-
-igen as part of its instruction lookup table may have generated two
-different entries - one for LK=0 and one for LK=1. With duplicate
-enabled, igen outputs (almost) duplicate copies of branch function,
-one with LK hardwired to 0 and one with LK hardwired to 1.
-
-By doing this the compiler is provided with additional information that
-will allow it possibly eliminate dead code. (such as the assignment
-to LK if LR==0).
-
-Ex: default
-
-Because this feature is such a big win, --enable-sim-duplicate is
-turned on by default.
-
-Ex: A small machine
-
-Only rarely (eg on a very small host) would this feature need to be
-disabled (using: --disable-sim-duplicate).
-
-
-
---enable-sim-filter=rule
-
-
-Include/exclude PowerPC instructions that are specific to a particular
-implementation.
-
-Some of the PowerPC instructions included in the file ppc-instructions
-are limited to certain specific PPC implementations. For instance,
-the instruction:
-
- 0.58,6.RT,11.RA,16.DS,30.2:DS:64::Load Word Algebraic
-
-Is only valid for the 64bit architecture. The enable-sim-filter flag
-is passed to igen so that it can `filter out' any invalid
-instructions. The filter rule has the form:
-
- -f <name>
-
-thus:
-
- --enable-sim-filter='-f 64'
-
-(the default) would filter out all 64bit instructions.
-
-Ex: Remove floating point instructions
-
-A given 32bit PowerPC implementation may not include floating point
-hardware. Consequently there is little point in including floating
-point instructions in the instruction table. The option:
-
- --enable-sim-filter='-f 64 -f f'
-
-will eliminate all floating point instructions from the instruction
-table.
-
-
-
---enable-sim-icache=size
-
-
-Set the size of the cache used to hold decoded instructions.
-
-Psim executes instructions in two separate steps:
-
- o instruction fetch/decode
-
- o instruction execution
-
-For a given instruction, the first stage need only be executed once
-(the first time the instruction is encountered) while the second stage
-must be executed every time the program `executes' that instruction.
-
-Exploiting this, PSIM can maintain a cache of decoded instructions.
-It will then use the decoded instruction from the cache in preference
-to fetching/decoding the real instruction from memory.
-
-Ex: default
-
-Because this feature is normally such a big win, it is enabled by
-default (with the cache size set to 1024 entries).
-
-The 1024 entries equals 4096 bytes (or one page) of instructions.
-Larger caches can be used but with caution - PSIM does not check for
-address aliasing within its instruction cache.
-
-Ex: disable the cache
-
-There may be cases (for instance where the cache has a low hit rate)
-where the psim performs better with no instruction cache. For such
-situations, the cache can be disabled vis: --disable-sim-icache.
-
-
-
---enable-sim-inline[=module]
-
-
-Specify the inlining of one or more modules.
-
-Many architectures (in particular the x86) suffer from a large
-function call overhead. By eliminating function calls (through
-inlining of functions) a large performance gain can be achieved.
-
-In PSIM, modules are inlined in one of two possible ways. Some
-modules (such as the byte swapping code) can be inlined into any
-module that calls them. Other modules, due to complex
-interdependencies, are only inlined as a group when compiling the
-external interface module psim.c.
-
-Ex: default
-
-By default the modules endian (handle be/le), bits (manipulate
-bit-fields within words), cpu (the processor object) and events
-(timers) are inlined in any module that calls them. This gives a
-reasonable performance gain with little additional compilation
-overhead.
-
-Ex: recommended --enable-sim-inline
-
-Assuming you machine is reasonably well configured, this option is
-highly recommended. On the x86 several orders of magnitude
-improvement in performance is possible.
-
-Ex: fine tuning
-
-The file std-config.h contains a detailed description of how the
-inlining works. Individual modules can be inlined by specifying them.
-For if you have a very large cache the model module could be inlined
-with:
-
- --enable-sim-inline=MODEL
-
-
-
---enable-sim-bswap
-
-
-(x86 specific) Use the i486/P5/P6 byte swap instruction.
-
-PSIM contains generic byte swapping code. For the x86 (P[4-6]) PSIM
-can be built so that it uses the bswap instruction instead of relying
-on the compiler to generate byte swap code.
-
-Ex: default
-
-By default, when compiling with GCC-2 on an i486/P5/P6 the bswap
-instruction is used.
-
-
-
---enable-sim-endian=endian
-
-
-Specify the byte order of the target.
-
-By default, PSIM is able to execute both big and little endian
-executables. As a consequence, every byte swap routine includes a
-test to see if the byte swap is really needed. By specifying the byte
-order of the target (and the host below) the need for this test can be
-eliminated.
-
-Clearly setting the byte order of the target is only useful when known
-before hand.
-
-
-
---enable-sim-hostendain=end
-
-
-As above but for the host.
-
-Normally this option should not be needed. configure (autoconf) should
-determine the byte order of the host automatically. However if for
-some reason there is a problem, this option can be used to override
-autoconf.
-
-
-
---enable-sim-smp=n
-
-
-Set the maximum number of processors that PSIM can model.
-
-Psim can model (with small limitation discussed else where) a
-multi-processor PowerPC environment. While the overhead of
-co-ordinating the execution of a number of processors is relatively
-small it is still significant when compared to handling only one
-processor.
-
-This option only sets the maximum number of processors that can be
-simulated. The number active during a given simulation run us
-determined at run time.
-
-Ex: default
-
-By default 5 processors are configured but only one is enabled.
-Additional processors can be enabled with the runtime option:
-
- -o '/openprom/options/smp 5'
-
-Ex: recommended
-
-Unless you intend studying multi-processor systems there is little reason for
-having PSIM configured with SMP support. Specifying:
-
- --disable-sim-smp
-or --enable-sim-smp=0
-
-will eliminate any SMP such as:
-
- for (cpu = 0; cpu < nr_cpus; cpu++)
- ...
-
-
-
---enable-sim-xor-endian=n
-
-
-Set the byte-size of the bus involved in the PowerPC's xor endian byte
-swapping.
-
-The PowerPC's implementation of BE/LE mode is different to what a
-programmer may first expect. The details of this implementation are
-discussed at length in PowerPC documentation.
-
-Ex: default
-
-By default this is configured with a value of 8 (the bus size of most
-60x processors).
-
-Ex: recommended
-
-Unless you are expecting to test/debug PowerPC be/le switching code
-this option is of little use and should be disabled:
-
- --disable-sim-xor-endian
-
-
-
---enable-sim-bitsize=n
-
-
-Specify the bit size (32/64) of the PowerPC to be modelled.
-
-Note: By default 32 is specified. The implementation of the 64bit
-architecture is still under development.
-
-
---enable-sim-hostbitsize=32|64
-
-As above but for the host.
-
-NOTE: Psim has yet to be built on a 64bit host.
-
-
-
---enable-sim-env=env
-
-
-Hardwire the PowerPC environment being modelled (user, virtual or
-operating).
-
-The PowerPC architecture defines three different levels of compliance to its
-architectural specification. These environments are discussed in detail in
-PowerPC publications.
-
- user - normal user programs
- virtual - an extension of the user environment (includes timers)
- operating - kernel code
-
-Ex: default
-
-By default all three environments are supported.
-
-Ex: recommended
-
-If you only intend running psim with user (or operating) code then
-PSIM should be configured accordingly. For user code, it eliminates:
-support for timers and events and redundant VM calls.
-
-
-
---enable-sim-timebase
-
-
-Enable/disable the time base register.
-
-The PowerPC architecture (virtual environment) includes a time base
-register. Maintaining that register incurs an overhead in
-performance that can be eliminated by eliminating time-base register
-support.
-
-Ex: default
-
-Normally this option is not used. Instead --enable-sim-env (above) us
-used to disable/enable features such as the timebase register.
-
-
-
---enable-sim-alignment=align
-
-
-Control the PowerPC's memory access alignment restrictions.
-
-The PowerPC in LE mode only allows memory transfers of a correctly
-aligned size/address. The above option controls how misaligned
-accesses are handled.
-
- strict All accesses must be correctly aligned
-
- nonstrict Unaligned access allowed (the are split
- into a number of aligned accesses).
-
-Ex: default
-
-Unless otherwise specified PSIM will auto configure a BE program to
-allow miss-aligned accesses while a LE program will not.
-
-Ex: 604e
-
-The recently announced 604e processor allows miss-aligned accesses in both
-BE and LE modes. If modeling the 604e then you should specify:
-
- --enable-sim-alignment=nonstrict
-
-
-
---enable-sim-trace
-
-
-Include code to trace PSIM's internal progress (also controlled by the
--t option).
-
-Checking to see if a trace message should be output slows down a
-simulation. Disabling this option (--disable-sim-trace) eliminates
-completely that code.
-
-
-
---enable-sim-assert
-
-
-Include the code that checks the correctness of parts of PSIM.
-
-Eliminating such code (--disable-sim-assert) eliminates internal
-consistency tests and their overhead.
-
-
-
---enable-sim-reserved-bits
-
-
-Include code to check that the reserved fields of the instruction are
-zero.
-
-The PowerPC architecture defines certain fields of some instructions
-as reserved (`/'). By default, for each instruction, PSIM will check
-the reserved fields causing an invalid instruction exception if a
-field is invalid. Disabling this option eliminates this test. This
-is at the slight risk of PSIM treating an invalid instruction as
-valid.
-
-
-
---enable-sim-float
-
-
-Include support for hardware floating point.
-
-
-
---enable-sim-monitor=mon
-
-
-Include support for basic instruction counting.
-
-If you are not interested in the performance of either you program or
-the simulator then you can disable this option.
-
-
-
---enable-sim-model=which
-
-Hardwire the processor that will be used as a reference when modeling
-execution units.
-
-
-
---enable-sim-default-model=which
-
-
-Specify the processor of choice for the execution unit model.
-
-
-
---enable-sim-model-issue
-
-
-Include support for the modeling of processor execution units.
-
- ----------------------------------------------------------------------
-
-TYPICAL CONFIGURATION OPTIONS:
-
-
- VEA CODE ONLY:
-
- Here of note are:
-
- o ramp up the compiler options (some
- of the below are P5 specific).
-
- o disable anything not used
-
- CC=gcc ./configure \
- --prefix=/applications/psim \
- --target=powerpc-unknown-eabi \
- --enable-sim-powerpc \
- --enable-sim-warnings \
- --enable-sim-inline \
- --disable-sim-smp \
- --enable-sim-duplicate \
- --enable-sim-endian=big \
- --disable-sim-xor-endian \
- --enable-sim-env=user \
- --disable-sim-reserved-bits \
- --disable-sim-assert \
- --disable-sim-trace \
- --enable-sim-cflags='-g0,-O2,-fno-strength-reduce,-fomit-frame-pointer'
-
-
- OEA CODE ONLY:
-
- The key configuration changes are:
-
- o turn off the instruction cache. The overhead
- of flushing and reloading it is greater than
- not having a cache.
-
- o use a switch statement (ppc-opcode-flat) for
- the instruction decode and then (-O3) fully
- inline all functions.
-
- o --enable-sim-warnings is not present. GCC (2.7.2)
- gets confused by the instruction decode table
- generated by igen (contains a perfect switch)
- and, as a consequence, generates a bogus warning.
-
- CC=gcc ./configure \
- --prefix=/applications/psim \
- --target=powerpc-unknown-eabi \
- --enable-sim-powerpc \
- --enable-sim-inline \
- --disable-sim-smp \
- --enable-sim-duplicate \
- --enable-sim-endian=big \
- --disable-sim-xor-endian \
- --enable-sim-env=operating \
- --disable-sim-reserved-bits \
- --disable-sim-assert \
- --disable-sim-trace \
- --enable-sim-opcode=ppc-opcode-flat \
- --disable-sim-icache \
- --enable-sim-cflags='-g0,-O3,-fno-strength-reduce,-fomit-frame-pointer'
diff --git a/sim/ppc/Makefile.in b/sim/ppc/Makefile.in
deleted file mode 100644
index 6f2b3102f66..00000000000
--- a/sim/ppc/Makefile.in
+++ /dev/null
@@ -1,660 +0,0 @@
-#
-# This file is part of the program psim.
-#
-# Copyright (C) 1994-1997, Andrew Cagney <cagney@highland.com.au>
-#
-# This program is free software; you can redistribute it and/or modify
-# it under the terms of the GNU General Public License as published by
-# the Free Software Foundation; either version 2 of the License, or
-# (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-#
-
-default: all
-
-VPATH = @srcdir@
-srcdir = @srcdir@
-srcroot = $(srcdir)/../..
-
-prefix = @prefix@
-exec_prefix = @exec_prefix@
-
-host_alias = @host_alias@
-target_alias = @target_alias@
-program_transform_name = @program_transform_name@
-bindir = @bindir@
-libdir = @libdir@
-tooldir = $(libdir)/$(target_alias)
-
-datadir = @datadir@
-mandir = @mandir@
-man1dir = $(mandir)/man1
-man2dir = $(mandir)/man2
-man3dir = $(mandir)/man3
-man4dir = $(mandir)/man4
-man5dir = $(mandir)/man5
-man6dir = $(mandir)/man6
-man7dir = $(mandir)/man7
-man8dir = $(mandir)/man8
-man9dir = $(mandir)/man9
-infodir = @infodir@
-includedir = @includedir@
-
-# This can be referenced by the gettext configuration code.
-top_builddir = ..
-
-EXEEXT = @EXEEXT@
-SHELL = /bin/sh
-
-INSTALL = @INSTALL@
-INSTALL_PROGRAM = @INSTALL_PROGRAM@
-INSTALL_DATA = @INSTALL_DATA@
-
-AR = @AR@
-AR_FLAGS = rc
-CC = @CC@
-CFLAGS = @CFLAGS@
-CC_FOR_BUILD = @CC_FOR_BUILD@
-BISON = bison
-MAKEINFO = makeinfo
-RANLIB = @RANLIB@
-
-SIM_CFLAGS = @sim_cflags@
-INLINE_CFLAGS = @sim_inline@
-BSWAP_CFLAGS = @sim_bswap@
-ENDIAN_CFLAGS = @sim_endian@
-REGPARM_CFLAGS = @sim_regparm@
-STDCALL_CFLAGS = @sim_stdcall@
-HOSTENDIAN_CFLAGS = @sim_hostendian@
-SMP_CFLAGS = @sim_smp@
-XOR_ENDIAN_CFLAGS = @sim_xor_endian@
-BITSIZE_CFLAGS = @sim_bitsize@
-HOSTBITSIZE_CFLAGS = @sim_hostbitsize@
-ENV_CFLAGS = @sim_env@
-TIMEBASE_CFLAGS = @sim_timebase@
-ALIGNMENT_CFLAGS = @sim_alignment@
-FLOAT_CFLAGS = @sim_float@
-TRACE_CFLAGS = @sim_trace@
-ASSERT_CFLAGS = @sim_assert@
-RESERVED_CFLAGS = @sim_reserved@
-MONITOR_CFLAGS = @sim_monitor@
-MODEL_CFLAGS = @sim_model@ @sim_default_model@ @sim_model_issue@
-STDIO_CFLAGS = @sim_stdio@
-TERMIO_CFLAGS = @sim_termio@
-WARNING_CFLAGS = @sim_warnings@
-DEVZERO_CFLAGS = @sim_devzero@
-CONFIG_CFLAGS = $(BSWAP_CFLAGS) \
- $(ENDIAN_CFLAGS) \
- $(REGPARM_CFLAGS) \
- $(STDCALL_CFLAGS) \
- $(HOSTENDIAN_CFLAGS) \
- $(SMP_CFLAGS) \
- $(XOR_ENDIAN_CFLAGS) \
- $(BITSIZE_CFLAGS) \
- $(HOSTBITSIZE_CFLAGS) \
- $(ENV_CFLAGS) \
- $(TIMEBASE_CFLAGS) \
- $(ALIGNMENT_CFLAGS) \
- $(FLOAT_CFLAGS) \
- $(TRACE_CFLAGS) \
- $(ASSERT_CFLAGS) \
- $(RESERVED_CFLAGS) \
- $(MONITOR_CFLAGS) \
- $(MODEL_CFLAGS) \
- $(STDIO_CFLAGS) \
- $(TERMIO_CFLAGS) \
- $(DEVZERO_CFLAGS)
-
-STD_CFLAGS = $(CFLAGS) $(INLINE_CFLAGS) $(CONFIG_CFLAGS) $(WARNING_CFLAGS) $(SIM_CFLAGS) $(HDEFINES) $(TDEFINES) $(INCLUDES)
-NOWARN_CFLAGS = $(CFLAGS) $(INLINE_CFLAGS) $(CONFIG_CFLAGS) $(SIM_CFLAGS) $(HDEFINES) $(TDEFINES) $(INCLUDES)
-BUILD_CFLAGS = -g -O $(INCLUDES) $(WARNING_CFLAGS)
-
-BUILD_LDFLAGS =
-
-CONFIG_FILE = @sim_config@
-IGEN_OPCODE_RULES = @sim_opcode@
-IGEN_DECODE_MECHANISM = @sim_decode_mechanism@
-IGEN_DUPLICATE = @sim_dup@
-IGEN_JUMP = @sim_jump@
-IGEN_FILTER = @sim_filter@
-IGEN_ICACHE = @sim_icache@
-IGEN_SMP = @sim_igen_smp@
-IGEN_LINE_NR = @sim_line_nr@
-DGEN_FLAGS = @sim_switch@
-
-HDEFINES = @HDEFINES@
-TDEFINES =
-IGEN_FLAGS = \
- $(IGEN_DECODE_MECHANISM) \
- $(IGEN_DUPLICATE) \
- $(IGEN_JUMP) \
- $(IGEN_FILTER) \
- $(IGEN_ICACHE) \
- $(IGEN_SMP) \
- $(IGEN_LINE_NR)
-
-.NOEXPORT:
-MAKEOVERRIDES=
-
-LIB_INCLUDES = -I$(srcdir)/../../include
-BFD_INCLUDES = -I../../bfd -I$(srcdir)/../../bfd
-GDB_INCLUDES = -I../../gdb -I$(srcdir)/../../gdb -I$(srcdir)/../../gdb/config -I$(srcdir)/../../mmalloc
-INCLUDES = -I. -I$(srcdir) $(LIB_INCLUDES) $(BFD_INCLUDES) $(GDB_INCLUDES)
-
-LIBIBERTY_LIB = ../../libiberty/libiberty.a
-BFD_LIB = ../../bfd/libbfd.a
-
-INTLLIBS = @INTLLIBS@
-INTLDEPS = @INTLDEPS@
-
-TARGETLIB = libsim.a
-
-all: run $(TARGETLIB) $(GDB_OBJ)
-
-.c.o:
- $(CC) -c $(STD_CFLAGS) $<
-
-
-
-BASICS_H = \
- basics.h \
- config.h \
- ppc-config.h \
- inline.h \
- sim_callbacks.h \
- debug.h filter_filename.h \
- words.h \
- bits.h \
- sim-endian.h
-
-PSIM_H = \
- psim.h \
- $(BASICS_H)
-
-IDECODE_H = \
- idecode.h \
- idecode_expression.h \
- idecode_branch.h \
- idecode_fields.h \
- icache.h
-
-REGISTERS_H = \
- registers.h \
- spreg.h
-
-CPU_H = \
- cpu.h \
- $(BASICS_H) \
- $(REGISTERS_H) \
- $(IDECODE_H) \
- device.h \
- corefile.h \
- vm.h \
- events.h \
- interrupts.h \
- psim.h \
- itable.h \
- mon.h \
- model.h
-
-DEVICE_TABLE_H = \
- $(BASICS_H) \
- device_table.h \
- device.h \
- tree.h \
- hw.h
-
-EMUL_GENERIC_H = \
- $(CPU_H) \
- $(IDECODE_H) \
- emul_generic.h \
- tree.h \
- os_emul.h
-
-
-INLINE = \
- inline.h \
- inline.c
-
-BUILT_SRC_WO_CONFIG = \
- icache.h icache.c \
- support.h support.c \
- idecode.h idecode.c \
- semantics.h semantics.c \
- itable.h itable.c \
- spreg.h spreg.c \
- model.h model.c \
- support.h support.c \
- pk.h \
- hw.h hw.c \
- filter_host.c \
- @sim_targ_vals@
-
-BUILT_SRC = \
- $(BUILT_SRC_WO_CONFIG) \
- config.h \
- ppc-config.h
-
-LIB_INLINE_SRC = \
- psim.c \
- bits.c \
- debug.c \
- sim-endian.c \
- sim-endian.h \
- sim-endian-n.h \
- vm.c \
- vm_n.h \
- corefile.c \
- events.c \
- os_emul.c \
- registers.c \
- cpu.c \
- interrupts.c \
- device.c \
- tree.c \
- device_table.c \
- cap.c \
- mon.c \
- options.c
-
-LIB_SRC = \
- $(PACKAGE_SRC) \
- $(HW_SRC) \
- $(LIB_INLINE_SRC)
-
-MAIN_SRC = \
- main.c \
- sim_calls.c
-
-
-# NOTE: semantics, idecode and psim put last so smaller files are compiled
-# first
-LIB_OBJ = \
- debug.o \
- filter_filename.o \
- bits.o \
- sim-endian.o \
- os_emul.o \
- emul_generic.o \
- emul_bugapi.o \
- emul_chirp.o \
- emul_netbsd.o \
- emul_unix.o \
- registers.o \
- vm.o \
- corefile.o \
- model.o \
- spreg.o \
- cpu.o \
- interrupts.o \
- events.o \
- cap.o \
- device.o \
- tree.o \
- device_table.o \
- itable.o \
- mon.o \
- icache.o \
- semantics.o \
- idecode.o \
- support.o \
- psim.o \
- $(PACKAGE_OBJ) \
- $(HW_OBJ) \
- options.o
-
-
-GDB_OBJ = sim_calls.o @sim_callback@
-
-HW_SRC = @sim_hw_src@
-HW_OBJ = @sim_hw_obj@
-
-PACKAGE_SRC = @sim_pk_src@
-PACKAGE_OBJ = @sim_pk_obj@
-
-
-psim: $(TARGETLIB) main.o $(LIBIBERTY_LIB) $(BFD_LIB) $(LIBS) $(INTLDEPS)
- $(CC) $(CFLAGS) $(SIM_CFLAGS) $(LDFLAGS) -o psim$(EXEEXT) main.o $(TARGETLIB) $(BFD_LIB) $(INTLLIBS) $(LIBIBERTY_LIB) $(LIBS)
-
-run: psim
- rm -f run$(EXEEXT)
- ln psim$(EXEEXT) run$(EXEEXT)
-
-$(TARGETLIB): tmp-igen tmp-dgen tmp-hw tmp-pk tmp-defines $(LIB_OBJ) $(GDB_OBJ)
- rm -f $(TARGETLIB)
- $(AR) $(AR_FLAGS) $(TARGETLIB) $(LIB_OBJ) $(GDB_OBJ)
- $(RANLIB) $(TARGETLIB)
-
-psim.o: psim.c psim.h tree.h $(CPU_H) $(IDECODE_H)
-
-bits.o: bits.c $(BASICS_H)
-
-debug.o: debug.c $(BASICS_H)
-filter_filename.o: filter_filename.c filter_filename.h config.h ppc-config.h
-
-sim-endian.o: sim-endian.c sim-endian-n.h $(BASICS_H)
-
-os_emul.o: os_emul.c emul_netbsd.h emul_unix.h emul_chirp.h emul_bugapi.h $(EMUL_GENERIC_H)
-emul_generic.o: emul_generic.c $(EMUL_GENERIC_H)
-
-emul_bugapi.o: emul_bugapi.c emul_bugapi.h $(EMUL_GENERIC_H)
-emul_chirp.o: emul_chirp.c emul_chirp.h $(EMUL_GENERIC_H)
-emul_netbsd.o: emul_netbsd.c emul_netbsd.h $(EMUL_GENERIC_H)
-emul_unix.o: emul_unix.c emul_unix.h $(EMUL_GENERIC_H)
-
-registers.o: registers.c $(REGISTERS_H) $(BASICS_H)
-
-cpu.o: cpu.c $(CPU_H) $(IDECODE_H)
-
-interrupts.o: interrupts.c $(CPU_H) $(IDECODE_H) os_emul.h
-
-# Given that inlines are turned on now, rebuild idecode whenever
-# anything changes.
-idecode.o: idecode.c $(CPU_H) $(IDECODE_H) semantics.h $(LIB_INLINE_SRC) $(BUILT_SRC)
- $(CC) -c $(NOWARN_CFLAGS) $<
-
-# double.o: double.c dp-bit.c
-
-vm.o: vm.c vm.h vm_n.h $(CPU_H)
-
-corefile.o: corefile.c corefile.h corefile-n.h $(BASICS_H) $(DEVICE_TABLE_H)
-
-model.o: model.c $(CPU_H)
-
-events.o: events.c events.h $(BASICS_H)
-
-sim_calls.o: sim_calls.c $(PSIM_H) itable.h ../../gdb/tm.h options.h
-
-spreg.o: spreg.c spreg.h spreg.c $(BASICS_H)
-
-main.o: main.c $(PSIM_H) itable.h options.h
-
-device.o: device.c $(DEVICE_TABLE_H) cap.h
-
-tree.o: tree.c tree.h device.h $(DEVICE_TABLE_H)
-
-device_table.o: device_table.c $(DEVICE_TABLE_H) events.h hw.c
-
-cap.o: cap.c cap.h $(BASICS_H)
-
-semantics.o: semantics.c semantics.h $(CPU_H) $(IDECODE_H)
- $(CC) -c $(NOWARN_CFLAGS) $<
-
-icache.o: icache.c icache.h $(IDECODE_H) $(CPU_H)
- $(CC) -c $(NOWARN_CFLAGS) $<
-
-support.o: support.c support.h $(IDECODE_H) $(CPU_H)
-
-itable.o: itable.c itable.h
-
-mon.o: mon.c $(CPU_H)
-
-# GDB after 4.16 expects the default_callback structure to be setup.
-# As a kludge, build the common stuff here for now.
-gentmap: ../common/gentmap.c Makefile targ-vals.def
- $(CC_FOR_BUILD) $(BUILD_FLAGS) -I. -I../common -I$(srcdir)/../common -o gentmap $< $(BUILD_LIBS)
-
-targ-vals.def: $(srcdir)/../common/nltvals.def
- rm -f targ-vals.def tmp-def
- cat $(srcdir)/../common/nltvals.def > tmp-vals.def
- $(srcdir)/../../move-if-change tmp-vals.def targ-vals.def
-
-targ-vals.h: Makefile gentmap $(srcdir)/../../move-if-change
- rm -f tmp-vals.h
- ./gentmap -h > tmp-vals.h
- $(srcdir)/../../move-if-change tmp-vals.h targ-vals.h
-
-targ-map.c: Makefile gentmap $(srcdir)/../../move-if-change
- rm -f tmp-map.c
- ./gentmap -c > tmp-map.c
- $(srcdir)/../../move-if-change tmp-map.c targ-map.c
-
-callback.o: ../common/callback.c targ-vals.h config.h
- $(CC) -c $(STD_CFLAGS) -DHAVE_CONFIG_H $<
-
-targ-map.o: targ-map.c targ-vals.h
-
-# Rebuild options whenever something changes so the date/time is up to date.
-options.o: options.c $(BASICS_H) $(CPU_H) $(IDECODE_H) $(INLINE) $(LIB_SRC) $(BUILT_SRC) config.status Makefile defines.h
- $(CC) -c $(STD_CFLAGS) '-DOPCODE_RULES="@sim_opcode@"' '-DIGEN_FLAGS="$(IGEN_FLAGS)"' '-DDGEN_FLAGS="$(DGEN_FLAGS)"' $<
-
-tmp-defines: config.h Makefile
- sed -n -e '/^#define HAVE_/s/ 1$$/",/' -e '/^#define HAVE_/s//"HAVE_/p' < config.h > tmp-defines.h
- $(srcdir)/../../move-if-change tmp-defines.h defines.h
- touch tmp-defines
-
-#
-# Rules to create the built c source code files
-#
-
-ppc-config.h: $(CONFIG_FILE)
- cp $(srcdir)/$(CONFIG_FILE) ppc-config.h
-
-
-tmp-dgen: dgen ppc-spr-table $(srcdir)/../../move-if-change
- ./dgen $(DGEN_FLAGS) \
- -r $(srcdir)/ppc-spr-table \
- -n spreg.h -hp tmp-spreg.h \
- -n spreg.c -p tmp-spreg.c
- $(srcdir)/../../move-if-change tmp-spreg.h spreg.h
- $(srcdir)/../../move-if-change tmp-spreg.c spreg.c
- touch tmp-dgen
-
-
-tmp-igen: igen ppc-instructions $(IGEN_OPCODE_RULES) ppc-cache-rules $(srcdir)/../../move-if-change tmp-ld-decode tmp-ld-cache tmp-ld-insn tmp-filter
- ./igen $(IGEN_FLAGS) \
- -o $(srcdir)/$(IGEN_OPCODE_RULES) \
- -k $(srcdir)/ppc-cache-rules \
- -i $(srcdir)/ppc-instructions \
- -n icache.h -hc tmp-icache.h \
- -n icache.c -c tmp-icache.c \
- -n semantics.h -hs tmp-semantics.h \
- -n semantics.c -s tmp-semantics.c \
- -n idecode.h -hd tmp-idecode.h \
- -n idecode.c -d tmp-idecode.c \
- -n itable.h -ht tmp-itable.h \
- -n itable.c -t tmp-itable.c \
- -n model.h -hm tmp-model.h \
- -n model.c -m tmp-model.c \
- -n support.h -hf tmp-support.h \
- -n support.c -f tmp-support.c
- $(srcdir)/../../move-if-change tmp-icache.h icache.h
- $(srcdir)/../../move-if-change tmp-icache.c icache.c
- $(srcdir)/../../move-if-change tmp-idecode.h idecode.h
- $(srcdir)/../../move-if-change tmp-idecode.c idecode.c
- $(srcdir)/../../move-if-change tmp-semantics.h semantics.h
- $(srcdir)/../../move-if-change tmp-semantics.c semantics.c
- $(srcdir)/../../move-if-change tmp-itable.h itable.h
- $(srcdir)/../../move-if-change tmp-itable.c itable.c
- $(srcdir)/../../move-if-change tmp-model.h model.h
- $(srcdir)/../../move-if-change tmp-model.c model.c
- $(srcdir)/../../move-if-change tmp-support.h support.h
- $(srcdir)/../../move-if-change tmp-support.c support.c
- touch tmp-igen
-
-# NOTE: Some versions of make don't handle files created as side-effects
-# uncomment the below if that is the case.
-
-$(TARGETLIB): tmp-igen tmp-dgen
-itable.h itable.c icache.h icache.c idecode.h idecode.c semantics.h semantics.c model.h model.c support.h support.c: tmp-igen
-spreg.h spreg.c: tmp-dgen
-
-dgen: dgen.o table.o lf.o misc.o filter_host.o
- $(CC_FOR_BUILD) $(BUILD_CFLAGS) -o dgen dgen.o table.o lf.o misc.o filter_host.o $(BUILD_LIBS)
-
-igen: igen.o table.o lf.o misc.o filter_host.o ld-decode.o ld-cache.o filter.o ld-insn.o gen-model.o gen-itable.o gen-icache.o gen-semantics.o gen-idecode.o gen-support.o
- $(CC_FOR_BUILD) $(BUILD_CFLAGS) $(BUILD_LDFLAGS) -o igen igen.o table.o lf.o misc.o filter_host.o ld-decode.o ld-cache.o filter.o ld-insn.o gen-model.o gen-itable.o gen-icache.o gen-semantics.o gen-idecode.o gen-support.o $(BUILD_LIBS)
-
-filter_host.c: filter_filename.c
- cat $(srcdir)/filter_filename.c > filter_host.c
-
-filter_host.o: filter_host.c filter_filename.h config.h ppc-config.h
- $(CC_FOR_BUILD) $(BUILD_CFLAGS) -c filter_host.c
-
-table.o: table.c misc.h filter_filename.h lf.h table.h
- $(CC_FOR_BUILD) $(BUILD_CFLAGS) -c $(srcdir)/table.c
-
-lf.o: lf.c misc.h filter_filename.h lf.h
- $(CC_FOR_BUILD) $(BUILD_CFLAGS) -c $(srcdir)/lf.c
-
-filter.o: filter.c misc.h lf.h table.h filter.h
- $(CC_FOR_BUILD) $(BUILD_CFLAGS) -c $(srcdir)/filter.c
-tmp-filter: filter.c misc.h misc.o
- $(CC_FOR_BUILD) $(BUILD_CFLAGS) $(BUILD_LDFLAGS) -o tmp-filter -DMAIN $(srcdir)/filter.c misc.o $(BUILD_LIBS)
-
-ld-decode.o: ld-decode.c misc.h lf.h table.h ld-decode.h
- $(CC_FOR_BUILD) $(BUILD_CFLAGS) -c $(srcdir)/ld-decode.c
-tmp-ld-decode: ld-decode.o misc.o lf.o table.o filter_host.o
- $(CC_FOR_BUILD) $(BUILD_CFLAGS) $(BUILD_LDFLAGS) -o tmp-ld-decode -DMAIN $(srcdir)/ld-decode.c misc.o lf.o table.o filter_host.o $(BUILD_LIBS)
-
-ld-cache.o: ld-cache.c misc.h lf.h table.h ld-cache.h
- $(CC_FOR_BUILD) $(BUILD_CFLAGS) -c $(srcdir)/ld-cache.c
-tmp-ld-cache: ld-cache.o misc.o lf.o table.o filter_host.o
- $(CC_FOR_BUILD) $(BUILD_CFLAGS) $(BUILD_LDFLAGS) -o tmp-ld-cache -DMAIN $(srcdir)/ld-cache.c misc.o lf.o table.o filter_host.o $(BUILD_LIBS)
-
-ld-insn.o: ld-insn.c misc.h lf.h table.h ld-insn.h ld-decode.h igen.h
- $(CC_FOR_BUILD) $(BUILD_CFLAGS) -c $(srcdir)/ld-insn.c
-tmp-ld-insn: ld-insn.o misc.o lf.o table.o ld-decode.o filter_host.o filter.o
- $(CC_FOR_BUILD) $(BUILD_CFLAGS) $(BUILD_LDFLAGS) -o tmp-ld-insn -DMAIN $(srcdir)/ld-insn.c misc.o lf.o table.o ld-decode.o filter_host.o filter.o $(BUILD_LIBS)
-
-gen-model.o: gen-model.c misc.h lf.h table.h gen-model.h ld-decode.h igen.h ld-insn.h
- $(CC_FOR_BUILD) $(BUILD_CFLAGS) -c $(srcdir)/gen-model.c
-
-gen-itable.o: gen-itable.c misc.h lf.h table.h gen-itable.h ld-decode.h igen.h ld-insn.h igen.h
- $(CC_FOR_BUILD) $(BUILD_CFLAGS) -c $(srcdir)/gen-itable.c
-
-gen-icache.o: gen-icache.c misc.h lf.h table.h gen-icache.h ld-decode.h igen.h ld-insn.h gen-semantics.h gen-idecode.h
- $(CC_FOR_BUILD) $(BUILD_CFLAGS) -c $(srcdir)/gen-icache.c
-
-gen-semantics.o: gen-semantics.c misc.h lf.h table.h gen-semantics.h ld-decode.h igen.h ld-insn.h
- $(CC_FOR_BUILD) $(BUILD_CFLAGS) -c $(srcdir)/gen-semantics.c
-
-gen-idecode.o: gen-idecode.c misc.h lf.h table.h gen-idecode.h gen-icache.h gen-semantics.h ld-decode.h igen.h ld-insn.h
- $(CC_FOR_BUILD) $(BUILD_CFLAGS) -c $(srcdir)/gen-idecode.c
-
-gen-support.o: gen-support.c misc.h lf.h table.h gen-support.h ld-decode.h igen.h ld-insn.h
- $(CC_FOR_BUILD) $(BUILD_CFLAGS) -c $(srcdir)/gen-support.c
-
-dgen.o: dgen.c misc.h filter_filename.h lf.h table.h
- $(CC_FOR_BUILD) $(BUILD_CFLAGS) -c $(srcdir)/dgen.c
-
-igen.o: igen.c misc.h filter_filename.h lf.h table.h ld-decode.h ld-cache.h ld-insn.h filter.h gen-model.h gen-itable.h gen-icache.h gen-idecode.h gen-semantics.h gen-support.h igen.h
- $(CC_FOR_BUILD) $(BUILD_CFLAGS) -c $(srcdir)/igen.c
-
-misc.o: misc.c misc.h filter_filename.h
- $(CC_FOR_BUILD) $(BUILD_CFLAGS) -c $(srcdir)/misc.c
-
-
-
-# real hardware
-tmp-hw: Makefile $(HW_SRC) $(srcdir)/../../move-if-change
- # The first for loop is to remove duplicates.
- f=""; \
- for i in $(HW_SRC) ; do \
- case " $$f " in \
- *" $$i "*) ;; \
- *) f="$$f $$i" ;; \
- esac ; \
- done ; \
- for hw in $$f ; do echo $$hw ; done \
- | sed -e 's/^.*\(hw_.*\)\.c/\1/' \
- -e 's/^/extern const device_descriptor /' \
- -e 's/$$/_device_descriptor\[\];/' \
- > tmp-hw.h
- f=""; \
- for i in $(HW_SRC) ; do \
- case " $$f " in \
- *" $$i "*) ;; \
- *) f="$$f $$i" ;; \
- esac ; \
- done ; \
- for hw in $$f ; do echo $$hw ; done \
- | sed -e 's/^.*\(hw_.*\)\.c/\1/' \
- -e 's/^/ /' \
- -e 's/$$/_device_descriptor,/' \
- > tmp-hw.c
- $(srcdir)/../../move-if-change tmp-hw.h hw.h
- $(srcdir)/../../move-if-change tmp-hw.c hw.c
- touch tmp-hw
-
-hw_cpu.o: hw_cpu.c $(DEVICE_TABLE_H)
-hw_core.o: hw_core.c $(DEVICE_TABLE_H)
-hw_disk.o: hw_disk.c $(DEVICE_TABLE_H) pk.h
-hw_glue.o: hw_glue.c $(DEVICE_TABLE_H)
-hw_htab.o: hw_htab.c $(DEVICE_TABLE_H)
-hw_ide.o: hw_ide.c $(DEVICE_TABLE_H)
-hw_init.o: hw_init.c $(DEVICE_TABLE_H)
-hw_iobus.o: hw_iobus.c $(DEVICE_TABLE_H)
-hw_memory.o: hw_memory.c $(DEVICE_TABLE_H)
-hw_nvram.o: hw_nvram.c $(DEVICE_TABLE_H)
-hw_opic.o: hw_opic.c $(DEVICE_TABLE_H)
-hw_pal.o: hw_pal.c $(DEVICE_TABLE_H)
-hw_phb.o: hw_phb.c $(DEVICE_TABLE_H) hw_phb.h
-hw_register.o: hw_register.c $(DEVICE_TABLE_H)
-hw_trace.o: hw_trace.c $(DEVICE_TABLE_H)
-hw_vm.o: hw_vm.c $(DEVICE_TABLE_H)
-# ignore this line, it stops make from getting confused
-
-
-
-# real packages
-tmp-pk: Makefile $(PACKAGE_SRC) $(srcdir)/../../move-if-change
- # The first for loop is to remove duplicates.
- f=""; \
- for i in $(PACKAGE_SRC) ; do \
- case " $$f " in \
- *" $$i "*) ;; \
- *) f="$$f $$i" ;; \
- esac ; \
- done ; \
- for pk in $$f ; do echo $$pk ; done \
- | sed -e 's/^.*pk_\(.*\)\.c/\1/' \
- -e 's/^/extern package_create_instance_callback pk_/' \
- -e 's/$$/_create_instance;/' \
- > tmp-pk.h
- $(srcdir)/../../move-if-change tmp-pk.h pk.h
- touch tmp-pk
-
-pk_disklabel.o: pk.h $(DEVICE_TABLE_H)
-# ignore this line, it stops make from getting confused
-
-
-
-tags etags: TAGS
-
-TAGS: $(BUILT_SRC)
- etags $(srcdir)/*.h $(srcdir)/*.c $(BUILT_SRC)
-
-clean mostlyclean:
- rm -f tmp-* *.[oasi] core psim$(EXEEXT) run$(EXEEXT) igen dgen $(BUILT_SRC_WO_CONFIG) gentmap
-
-distclean realclean: clean
- rm -f TAGS Makefile config.cache config.status config.h defines.h stamp-h config.log
-
-maintainer-clean: distclean
- rm -f *~ *.log ppc-config.h core *.core
-
-Makefile: Makefile.in config.status
- CONFIG_FILES=Makefile CONFIG_HEADERS= $(SHELL) ./config.status
-
-config.h: stamp-h ; @true
-stamp-h: config.in config.status
- CONFIG_FILES= CONFIG_HEADERS=config.h:config.in $(SHELL) ./config.status
-
-config.status: configure
- $(SHELL) ./config.status --recheck
-
-install: installdirs
- n=`echo run | sed '$(program_transform_name)'`; \
- $(INSTALL_PROGRAM) run$(EXEEXT) $(bindir)/$$n$(EXEEXT)
-
-installdirs:
- $(SHELL) $(srcdir)/../../mkinstalldirs $(bindir)
diff --git a/sim/ppc/README b/sim/ppc/README
deleted file mode 100644
index ff3fbd2b349..00000000000
--- a/sim/ppc/README
+++ /dev/null
@@ -1,353 +0,0 @@
-
-
- PSIM 1.0.1 - Model of the PowerPC Environments
-
-
- Copyright (C) 1994-1996, Andrew Cagney <cagney@highland.com.au>.
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
-
- ----------------------------------------------------------------------
-
-
-PSIM is a program written in extended ANSI-C that implements an
-instruction level simulation of the PowerPC environment. It is freely
-available in source code form under the terms of the GNU General
-Public License (version 2 or later).
-
-The PowerPC Architecture is described as having three levels of
-compliance:
-
- UEA - User Environment Architecture
- VEA - Virtual Environment Architecture
- OEA - Operating Environment Architecture
-
-PSIM both implements all three levels of the PowerPC and includes (for
-each level) a corresponding simulated run-time environment.
-
-In addition, PSIM, to the execution unit level, models the performance
-of most of the current PowerPC implementations (contributed by Michael
-Meissner). This detailed performance monitoring (unlike many other
-simulators) resulting in only a relatively marginal reduction in the
-simulators performance.
-
-
-A description of how to build PSIM is contained in the file:
-
- ftp://ftp.ci.com.au/pub/psim/INSTALL
- or ftp://cambridge.cygnus.com/pub/psim/INSTALL
-
-while an overview of how to use PSIM is in:
-
- ftp://ftp.ci.com.au/pub/psim/RUN
-or ftp://cambridge.cygnus.com/pub/psim/RUN
-
-This file is found in:
-
- ftp://ftp.ci.com.au/pub/psim/README
-or ftp://cambridge.cygnus.com/pub/psim/README
-
-
-Thanks goes firstly to:
-
- Corinthian Engineering Pty Ltd
- Cygnus Support
- Highland Logic Pty Ltd
-
-who provided the resources needed for making this software available
-on the Internet.
-
-More importantly I'd like to thank the following individuals who each
-contributed in their own unique way:
-
- Allen Briggs, Bett Koch, David Edelsohn, Gordon Irlam,
- Michael Meissner, Bob Mercier, Richard Perini, Dale Rahn,
- Richard Stallman, Mitchele Walker
-
-
- Andrew Cagney
- Feb, 1995
-
-
- ----------------------------------------------------------------------
-
-
- What features does PSIM include?
-
- Monitoring and modeling
-
- PSIM includes (thanks to Michael Meissner)
- a detailed model of most of the PowerPC
- implementations to the functional unit level.
-
-
- SMP
-
- The PowerPC ISA defines SMP synchronizing instructions.
- This simulator implements a limited, but functional,
- subset of the PowerPC synchronization instructions
- behaviour. Programs that restrict their synchronization
- primitives to those that work with this functional
- sub-set (eg P() and V()) are able to run on the SMP
- version of PSIM.
-
- People intending to use this system should study
- the code implementing the lwarx instruction.
-
- ENDIAN SUPPORT
-
- PSIM implements the PowerPC's big and little (xor
- endian) modes and correctly simulates code that
- switches between these two modes.
-
- In addition, psim can model a true little-endian
- machine.
-
- ISA (Instruction Set Architecture) models
-
- PSIM includes a model of the UEA, VEA and OEA. This
- includes the time base registers (VEA) and HTAB
- and BATS (OEA).
-
- In addition, a preliminary model of the 64 bit
- PowerPC architecture is implemented.
-
- IO Hardware
-
- PSIM's internals are based around the concept
- of a Device Tree. This tree intentionally
- resembles that of the Device Tree found in
- OpenBoot firmware. PSIM is flexible enough
- to allow the user to fully configure this device
- tree (and consequently the hardware model) at
- run time.
-
- Run-time environments:
-
- PSIM's UEA model includes emulation for BSD
- based UNIX system calls.
-
- PSIM's OEA model includes emulation of either:
-
- o OpenBoot client interface
-
- o MOTO's BUG interface.
-
-
- Floating point
-
- Preliminary support for floating point is included.
-
-
- Who would be interested in PSIM?
-
- o the curious
-
- Using psim, gdb, gcc and binutils the curious
- user can construct an environment that allows
- them to play with PowerPC Environment without
- the need for real hardware.
-
-
- o the analyst
-
- PSIM includes many (contributed) monitoring
- features which (unlike many other simulators)
- do not come with a great penalty in performance.
-
- Thus the performance analyst is able to use
- this simulator to analyse the performance of
- the system under test.
-
- If PSIM doesn't monitor a components of interest,
- the source code is freely available, and hence
- there is no hinderance to changing things
- to meet a specific analysts needs.
-
-
- o the serious SW developer
-
- PSIM models all three levels of the PowerPC
- Architecture: UEA, VEA and OEA. Further,
- the internal design is such that PSIM can
- be extended to support additional requirements.
-
-
- What performance analysis measurements can PSIM perform?
-
- Below is the output from a recent analysis run
- (contributed by Michael Meissner):
-
- For the following program:
-
- long
- simple_rand ()
- {
- static unsigned long seed = 47114711;
- unsigned long this = seed * 1103515245 + 12345;
- seed = this;
- /* cut-cut-cut - see the file RUN.psim */
- }
-
- Here is the current output generated with the -I switch on a P90
- (the compiler used is the development version of GCC with a new
- scheduler replacing the old one):
-
- CPU #1 executed 41,994 AND instructions.
- CPU #1 executed 519,785 AND Immediate instructions.
- .
- .
- .
- CPU #1 executed 1 System Call instruction.
- CPU #1 executed 207,746 XOR instructions.
-
- CPU #1 executed 23,740,856 cycles.
- CPU #1 executed 10,242,780 stalls waiting for data.
- CPU #1 executed 1 stall waiting for a function unit.
- .
- .
- .
- CPU #1 executed 3,136,229 branch functional unit instructions.
- CPU #1 executed 16,949,396 instructions that were accounted for in timing info.
- CPU #1 executed 871,920 data reads.
- CPU #1 executed 971,926 data writes.
- CPU #1 executed 221 icache misses.
- CPU #1 executed 16,949,396 instructions in total.
-
- Simulator speed was 250,731 instructions/second
-
-
- What motivated PSIM?
-
- As an idea, psim was first discussed seriously during mid
- 1994. At that time its main objectives were:
-
-
- o good performance
-
- Many simulators loose out by only providing
- a binary interface to the internals. This
- interface eventually becomes a bottle neck
- in the simulators performance.
-
- It was intended that PSIM would avoid this
- problem by giving the user access to the
- full source code.
-
- Further, by exploiting the power of modern
- compilers it was hoped that PSIM would achieve
- good performance with out having to compromise
- its internal design.
-
-
- o practical portability
-
- Rather than try to be portable to every
- C compiler on every platform, it was decided
- that PSIM would restrict its self to supporting
- ANSI compilers that included the extension
- of a long long type.
-
- GCC is one such compiler, consequently PSIM
- should be portable to any machine running GCC.
-
-
- o flexibility in its design
-
- PSIM should allow the user to select the
- features required and customise the build
- accordingly. By having the source code,
- the compiler is able to eliminate any un
- used features of the simulator.
-
- After all, let the compiler do the work.
-
-
- o SMP
-
- A model that allowed the simulation of
- SMP platforms with out the large overhead
- often encountered with such models.
-
-
- PSIM achieves each of these objectives.
-
-
- Is PSIM PowerPC Platform (PPCP) (nee CHRP) Compliant?
-
- No.
-
- Among other things it does not have an Apple ROM socket.
-
-
- Could PSIM be extended so that it models a CHRP machine?
-
- Yes.
-
- PSIM has been designed with the CHRP spec in mind. To model
- a CHRP desktop the following would need to be added:
-
- o An apple ROM socket :-)
-
- o Model of each of the desktop IO devices
-
- o An OpenPIC device.
-
- o RTAS (Run Time Abstraction Services).
-
- o A fully populated device tree.
-
-
- Is the source code available?
-
- Yes.
-
- The source code to PSIM is available under the terms of
- the GNU Public Licence. This allows you to distribute
- the source code for free but with certain conditions.
-
- See the file:
-
- ftp://archie.au/gnu/COPYING
-
- For details of the terms and conditions.
-
-
- Where do I send bugs or report problems?
-
- There is a mailing list (subscribe through majordomo@ci.com.au) at:
-
- powerpc-psim@ci.com.au
-
- If I get the ftp archive updated I post a note to that mailing list.
- In addition your welcome to send bugs or problems either to me or to
- that e-mail list.
-
- This list currently averages zero articles a day.
-
-
- Does PSIM have any limitations or problems?
-
- PSIM can't run rs6000/AIX binaries - At present PSIM can only
- simulate static executables. Since an AIX executable is
- never static, PSIM is unable to simulate its execution.
-
- PSIM is still under development - consequently there are going
- to be bugs.
-
- See the file BUGS (included in the distribution) for any
- other outstanding issues.
-
diff --git a/sim/ppc/RUN b/sim/ppc/RUN
deleted file mode 100644
index 6c3cfefcb25..00000000000
--- a/sim/ppc/RUN
+++ /dev/null
@@ -1,949 +0,0 @@
-
- PSIM - model the PowerPC environment
-
- Copyright (C) 1994-1996, Andrew Cagney <cagney@highland.com.au>.
-
- ----------------------------------------------------------------------
-
- Running PSIM
-
- This file describes how to run the program PSIM.
-
- o Walk through a number of examples from the
- pre-built tar archive psim-test.
-
- o Looks at the device tree used by PSIM.
-
- o Notes on building a programmer environment to
- use with PSIM (BSD/UEA and BUG/OEA)
-
-
- ----------------------------------------------------------------------
-
-
-RUNNING PSIM:
-
-
-The compressed tar archive psim-test available from:
-
- ftp://ftp.ci.com.au/pub/psim/psim-test-1.0.1.tar.gz
-or ftp://cambridge.cygnus.com/pub/psim/psim-test-1.0.1.tar.gz
-
-contains a number of pre-built programs for running under PSIM. Each
-pre-built binary is built both big and little endian. The suffixes
-.be/.le (executables) .bo/.lo (object files) and .ba/.la (libraries)
-are used.
-
-
-To run one of these programs, use:
-
- powerpc-unknown-eabi-run <image>
-
-for instance:
-
- powerpc-unknown-eabi-run psim-test/uea/envp
-
-The program envp prints out your shells environment - very useful!
-More generally psim is run as (this is part of the output from the -h
-option):
-
- psim [ <psim-option> ... ] <image> [ <image-arg> ... ]
-
-Where
-
- <image> Name of the PowerPC program to run.
- This can either be a PowerPC binary or
- a text file containing a device tree
- specification.
- PSIM will attempt to determine from the
- specified <image> the intended emulation
- environment.
- If PSIM gets it wrong, the emulation
- environment can be specified using the
- `-e' option (described below).
-
- <image-arg> Argument to be passed to <image>
- These arguments will be passed to
- <image> (as standard C argv, argc)
- when <image> is started.
-
- <psim-option> See below
-
-The following are valid <psim-option>s:
-
- -m <model> Specify the processor to model (604)
- Selects the processor to use when
- modeling execution units. Includes:
- 604, 603 and 603e
-
- -e <os-emul> specify an OS or platform to model
- Can be any of the following:
- bug - OEA + MOTO BUG ROM calls
- netbsd - UEA + NetBSD system calls
- chirp - OEA + a few OpenBoot calls
-
- -i Print instruction counting statistics
-
- -I Print execution unit statistics
-
- -r <size> Set RAM size in bytes (OEA environments)
-
- -t [!]<trace> Enable (disable) <trace> option
-
- -o <spec> add device <spec> to the device tree
-
- -h -? -H give more detailed usage
-
-
-The `-H' option gives a long usage output. This includes a complete
-list of all the pre-configured devices.
-
-
- ----------------------------------------------------------------------
-
-
-RUNNING GDB:
-
-
-If you built PSIM with gdb then the following is a quick start
-tutorial.
-
-At present GDB, if configured big-endian (say) unlike PSIM, does not
-support the debugging of little endian binaries. If you find that
-your program won't run at all, make certain that GDB and your
-program's endianness match.
-
-
-The most important thing is that before you can run the simulator you
-must enable it. For the simulator, gdb is started like any program:
-
- $ powerpc-unknown-eabi-gdb psim-test/uea/envp.be
-
-Next the simulator is enabled. The command `target sim' accepts the
-same options as can be specified on the PSIM command line.
-
- (gdb) target sim
-
-To trace the communication between psim and gdb specify `target sim -t
-gdb'. Once enabled, the binary needs to be loaded, any breakpoints of
-interest set, and the program run:
-
- (gdb) load
- (gdb) break main
- (gdb) run
- .
- .
- .
-
-In addition, if you are wanting to run a program described by a device
-tree you can `attach' to the simulation using (I assume that you have
-applied the attach patch):
-
- $ cd psim-test/tree
- $ powerpc-unknown-eabi-gdb
- (gdb) target sim
- (gdb) attach device-tree
- (gdb) run
-
-Here GDB takes the programs initial state from the attached
-device-tree instead of forcing initialisation.
-
-
- ----------------------------------------------------------------------
-
-
-PROFILING:
-
-
-PSIM includes a number of performance monitoring (profiling)
-facilities:
-
- o instruction frequency counting
-
- o execution unit modeling (records
- effective usage of units).
-
- o instruction cache performance
-
-As discussed in the file INSTALL, each can be configured to individual
-requirements.
-
-
- -i Enable instruction counting.
-
- The frequency of all instructions is tabulated. In
- addition (f configured) the hit/miss rate of the
- instruction cache is output.
-
-
- -I Enable execution unit analysis.
-
- In addition to counting basic instructions also model
- the performance of the processors execution units
-
-
- -m <processor>
-
- Select the processor to be modelled.
-
- For execution unit analysis specify the processor that
- is to be analysed. By default the 604 is modelled
- however, support for other processors such as the
- 603 and 603e is included.
-
-The output from a performance run (on a P90) for the program
-psim-test/profile/bench is below. In this run psim was fairly
-agressively configured (see the file INSTALL for compile time
-configuration).
-
- CPU #1 executed 41,994 AND instructions.
- CPU #1 executed 519,785 AND Immediate instructions.
- CPU #1 executed 680,058 Add instructions.
- CPU #1 executed 41,994 Add Extended instructions.
- CPU #1 executed 921,916 Add Immediate instructions.
- CPU #1 executed 221,199 Add Immediate Carrying instructions.
- CPU #1 executed 943,823 Add Immediate Shifted instructions.
- CPU #1 executed 471,909 Add to Zero Extended instructions.
- CPU #1 executed 571,915 Branch instructions.
- CPU #1 executed 1,992,403 Branch Conditional instructions.
- CPU #1 executed 571,910 Branch Conditional to Link Register instructions.
- CPU #1 executed 320,431 Compare instructions.
- CPU #1 executed 471,911 Compare Immediate instructions.
- CPU #1 executed 145,867 Compare Logical instructions.
- CPU #1 executed 442,414 Compare Logical Immediate instructions.
- CPU #1 executed 1 Condition Register XOR instruction.
- CPU #1 executed 103,873 Divide Word instructions.
- CPU #1 executed 104,275 Divide Word Unsigned instructions.
- CPU #1 executed 132,510 Extend Sign Byte instructions.
- CPU #1 executed 178,895 Extend Sign Half Word instructions.
- CPU #1 executed 871,920 Load Word and Zero instructions.
- CPU #1 executed 41,994 Move From Condition Register instructions.
- CPU #1 executed 100,005 Move from Special Purpose Register instructions.
- CPU #1 executed 100,002 Move to Special Purpose Register instructions.
- CPU #1 executed 804,619 Multiply Low Word instructions.
- CPU #1 executed 421,201 OR instructions.
- CPU #1 executed 471,910 OR Immediate instructions.
- CPU #1 executed 1,292,020 Rotate Left Word Immediate then AND with Mask instructions.
- CPU #1 executed 663,613 Shift Left Word instructions.
- CPU #1 executed 1,151,564 Shift Right Algebraic Word Immediate instructions.
- CPU #1 executed 871,922 Store Word instructions.
- CPU #1 executed 100,004 Store Word with Update instructions.
- CPU #1 executed 887,804 Subtract From instructions.
- CPU #1 executed 83,988 Subtract From Immediate Carrying instructions.
- CPU #1 executed 1 System Call instruction.
- CPU #1 executed 207,746 XOR instructions.
-
- CPU #1 executed 23,740,856 cycles.
- CPU #1 executed 10,242,780 stalls waiting for data.
- CPU #1 executed 1 stall waiting for a function unit.
- CPU #1 executed 1 stall waiting for serialization.
- CPU #1 executed 1,757,900 times a write-back slot was unavailable.
- CPU #1 executed 1,088,135 branches.
- CPU #1 executed 2,048,093 conditional branches fell through.
- CPU #1 executed 1,088,135 successful branch predictions.
- CPU #1 executed 904,268 unsuccessful branch predictions.
- CPU #1 executed 742,557 branch if the condition is FALSE conditional branches.
- CPU #1 executed 1,249,846 branch if the condition is TRUE conditional branches.
- CPU #1 executed 571,910 branch always conditional branches.
- CPU #1 executed 9,493,653 1st single cycle integer functional unit instructions.
- CPU #1 executed 1,220,900 2nd single cycle integer functional unit instructions.
- CPU #1 executed 1,254,768 multiple cycle integer functional unit instructions.
- CPU #1 executed 1,843,846 load/store functional unit instructions.
- CPU #1 executed 3,136,229 branch functional unit instructions.
- CPU #1 executed 16,949,396 instructions that were accounted for in timing info.
- CPU #1 executed 871,920 data reads.
- CPU #1 executed 971,926 data writes.
- CPU #1 executed 221 icache misses.
- CPU #1 executed 16,949,396 instructions in total.
-
- Simulator speed was 250,731 instructions/second
-
-
- ----------------------------------------------------------------------
-
-
-PSIM CONFIGURATION - THE DEVICE TREE
-
-
-Internally PSIM's configuration is controlled by a tree data
-structure. This structure, created at run-time, intentionally
-resembles the device tree used by OpenBoot firmware to describe a
-machines hardware configuration.
-
-PSIM can either create its device tree using a builtin emulation or
-from one read in from a file.
-
-During startup, the device tree is created using the following steps:
-
- o Initial empty tree is created
-
- o Any tree entry options specified on the
- command line are merged in (the -o <entry>
- option is used).
-
- It should be pointed out that most of the
- command line options (eg -r, -e, -m, -t
- are all just short hand for corresponding
- -o options).
-
- o If the specified program is a device tree spec, that
- is loaded.
-
- If the specified program is a text file it is assumed
- that that file contains a further specification of the
- simulators device tree. That tree is loaded and
- merged with the current tree options.
-
- o The selected emulation fills out any remaining details.
-
- By this stage the emulation environment that the program
- needs will either be specified in the device tree
- (through the -e option) or determined from the
- characteristics of the binary.
-
- The selected emulation will then fill out any missing
- nodes in the device tree.
-
-Most importantly earlier additions to the tree are not overridden by
-later additions. Thus, command line options override information
-found in the program file and both override any builtin emulation
-entries.
-
-The following is a summary of the most useful runtime configuration
-options:
-
- -e <os-emul>
- -o '/openprom/options/os-emul <os-emul>'
-
- Run program using the <emulation> run-time
- environment.
-
- -r <ram-size>
- -o '/openprom/options/oea-memory-size <ram-size>'
-
- Set the size of the first bank of memory
- (RAM from address 0 up).
-
- -t print-device-tree
- -o '/openprom/trace/print-device-tree 1'
-
- -t dump-device-tree
- -o '/openprom/trace/dump-device-tree 1'
-
- Print out the device tree once it has been fully
- populated. For dump-device-tree, exit simulator after
- dumping the tree.
-
- PSIM is able to reload the dumped device tree.
-
- The format of the dumped tree is under development.
-
- -o '/openprom/options/smp <N>'
-
- Enable <N> processors for the simulation run.
- See the directory psim-test/oea for an example.
-
- -o '/openprom/options/alignment <N>'
-
- Where <N> is 1 - nonstrict or 2 - strict.
- Specify if the missaligned access are allowed
- (non-strict) or result in an alignment exception
- (strict).
-
-Devices (if included in the file device_table.c) can also be specified
-in a similar way. For instance, to add a second serial port, a
-command like:
-
- -o '/iobus@0x400000/console@0x000010'
-
-would create a `console' device at offset 0x10 within the `iobus' at
-memory address 0x400000.
-
-For more detailed information on device specifiers see the notes on
-the function dump_device_tree in the file device.c (found in the
-source code).
-
-
- ----------------------------------------------------------------------
-
-
-BUILDING A BUG/OEA DEVELOPMENT ENVIRONMENT
-
-
-Background:
-
-
-Included in many PowerPC systems is Motorola's BUG monitor. This
-monitor includes, for client programs, a set of services that allow
-that program to interact with hardware devices such as the console using
-a simple system call interface.
-
-PSIM is able to emulate a number of the services (including the
-console IO calls). If additional services are needed they can easily
-be added.
-
-Cygnus support's newlib library includes includes an interface to the
-MOTO BUG services. The notes below discuss how I both built and run
-programs compiled using this library on PSIM.
-
-The only confusing part about building a development environment based
-around newlib/binutils/gcc is a chicken/egg problem with include
-files:
-
- For GCC to build, a fairly complete set of include
- files must be installed but newlib won't install its
- include files until it has been built with gcc ...
-
-I get around this by installing the problematic include files by hand.
-
-
-Preparation:
-
-
-The following files are needed:
-
-From your favorite FTP site, the sources to gas/ld and gcc - mine
-happens to be archie.au :
-
- ftp://archie.au/gnu/binutils-2.6.tar.gz
- ftp://archie.au/gnu/gcc-2.7.2.tar.gz
-
-From ftp://ftp.cygnus.com/pub/newlib the source code to a library:
-
- ftp://ftp.cygnus.com/pub/newlib/newlib-1.7.0.tar.gz
-
-From ftp://ftp.ci.com.au/pub/psim some minor patches and updates to
-the above library:
-
- ftp://ftp.ci.com.au/pub/psim/newlib-1.7.0+float+ppc-asm.tar.gz
- ftp://ftp.ci.com.au/pub/psim/newlib-1.7.0+ppc-fix.diff.gz
- ftp://ftp.ci.com.au/pub/psim/binutils-2.6+note.diff.gz
-
-In addition you'll need to decide where you will be installing the
-development environment. You will notice that in the below I install
-things well away /usr/local instead installing everything under its
-own directory in /applications.
-
-
-Method:
-
-
-These notes are based on an installation performed on a Sun-OS-4/SPARC
-host. For other hosts and other configurations, the below should be
-considered as a guideline only.
-
-
- o Sanity check
-
- $ cd .../scratch # your scratch directory
- $ ls -1
- binutils-2.6.tar.gz
- binutils-2.6+note.diff.gz
- gcc-2.7.2,tar.gz
- newlib-1.7.0+float+ppc-asm.tar.gz
- newlib-1.7.0+ppc-fix.diff.gz
- newlib-1.7.0.tar.gz
-
-
- o Unpack/build/install binutils
-
- This is done first so that there is a gas/ld ready
- for the building of GCC and NEWLIB.
-
- $ cd .../scratch
- $ gunzip < binutils-2.6.tar.gz | tar xf -
- $ cd binutils-2.6
-
- Optionally apply the note patch
-
- $ gunzip ../binutils-2.6+note.diff.gz | patch
-
- Then continue with the build
-
- $ ./configure --target=powerpc-unknown-eabi \
- --prefix=/applications/psim
- $ make
- $ make install
- $ cd ..
- $ rm -rf binutils-2.6
-
- This also creates much of the installation directory
- tree.
-
-
- o Unpack newlib, install the include files so that they
- are ready for GCC's build.
-
- $ cd .../scratch
- $ gunzip < newlib-1.7.0.tar.gz | tar xf -
-
- New lib-1.7.0 had a few minor bugs (fixed in current):
- the header files float.h and ppc-asm.h were missing;
- the configure and Makefile's for the rs6000 (ppc) directory
- contained typos:
-
- $ cd .../scratch
- $ cd newlib-1.7.0
- $ gunzip < ../newlib-1.7.0+float+ppc-asm.tar.gz | tar xvf -
- $ gunzip < ../newlib-1.7.0+ppc-fix.diff.gz | patch -p1
-
- Finally copy the include files to where GCC will see them:
-
- $ cd .../scratch
- $ cd newlib-1.7.0/newlib/libc
- $ tar cf - include | \
- ( cd /applications/psim/powerpc-unknown-eabi && tar xf - )
-
-
- o Unpack/build gcc
-
- $ cd .../scratch
- $ gunzip < gcc-2.7.2,tar.gz | tar xf -
- $ cd gcc-2.7.2
- $ ./configure --target=powerpc-unknown-eabi \
- --prefix=/applications/psim
- $ make
- $ make install
- $ cd ..
- $ rm -rf gcc-2.7.2
-
- Gcc likes to install its own dummy version of float that
- just returns an error.
-
- $ more /applications/psim/lib/gcc-lib/powerpc-unknown-eabi/2.7.2/include/float.h
- $ rm /applications/psim/lib/gcc-lib/powerpc-unknown-eabi/2.7.2/include/float.h
-
-
- o Finish building/installing newlib
-
- $ cd .../scratch
- $ cd newlib-1.7.0
- $ ./configure --target=powerpc-unknown-eabi \
- --prefix=/applications/psim
-
- Your path will need to include the recently installed
- gas/gcc when building. Either add it to your path or
- use:
-
- $ PATH=/applications/psim/bin:$PATH make
- $ PATH=/applications/psim/bin:$PATH make install
-
-
- o Finally, test out the build
-
- $ cat hello.c
- main()
- {
- printf("hello world\n");
- }
-
- The binary is linked with an entry point less than 0x100000
- (1mb) so that psim will recognize the binary as needing
- the BUG/OEA instead of the BSD/UEA runtime environment.
-
- $ powerpc-unknown-eabi-gcc -v -o hello \
- -Wl,-Ttext,0x4000,-Tdata,0x10000 \
- /applications/psim/powerpc-unknown-eabi/lib/mvme-crt0.o \
- hello.c \
- -lc -lmvme
- $ powerpc-unknown-eabi-objdump -h hello
- $ powerpc-unknown-eabi-run hello
-
- It is also possible to force psim to use a specific
- run-time environment using the -e option vis:
-
- $ powerpc-unknown-eabi-run -e bug hello
-
-
-
-
- ----------------------------------------------------------------------
-
-
-BUILDING A BSD/UEA DEVELOPMENT ENVIRONMENT
-
-
-Background:
-
-
-For a UEA to be useful it needs a supporting run-time environment.
-PSIM implements a runtime environment based on the NetBSD system call
-interface.
-
-More than any thing, this user level emulation was the first
-implemented because I happened to have the NetBSD source code lying
-around.
-
-
-Preparation:
-
-
-This requires the NetBSD-1.1 source tree online. It can either be
-obtained vi ftp:
-
- try http://www.netbsd.org or ftp://ftp.netbsd.org
-
-Alternatively obtain one of the NetBSD cdrom's. Patches to this source
-tree that fill out much of the PowerPC code are available in:
-
- ftp://ftp.ci.com.au/pub/clayton
-
-Fetch everything in that directory - diffs, tar archives and scripts.
-In addition patches to the bintuils and gcc are in:
-
- ftp://ftp.ci.com.au/pub/psim/binutils-2.6+note.diff.gz
- ftp://ftp.ci.com.au/pub/psim/gcc-2.7.2+sys-types.diff.gz
-
-while the compiler (gcc) and assember (binutils) can be found at your
-favorite gnu ftp site. I used versions:
-
- gcc-2.7.2.tar.gz
- binutils-2.6.tar.gz
-
-
-
-
-Method:
-
-
-These notes are based on an installation performed on a Solaris2/x86
-host. For other hosts and other configurations, the below should be
-considered as a guideline only.
-
-
- o Sanity check
-
- I assume that you have already obtained the NetBSD-1.1 source
- code and unpacked it into the directory bsd-src. While the
- full NetBSD source tree may not be needed, things are easier
- if it is all online.
-
- $ cd .../scratch
- $ ls -1
- binutils-2.6.tar.gz
- binutils-2.6+note.diff.gz
- clayton-include-960203.diff.gz
- clayton-lib-960203.diff.gz
- clayton-lib-960203.tar.gz
- clayton-sys-960203.diff.gz
- clayton-sys-960203.tar.gz
- clayton.chown.sh
- clayton.install.sh
- clayton.lorder.sh
- clayton.make.sh
- gcc-2.7.2.tar.gz
- gcc-2.7.2+sys-types.diff.gz
- make.tar.gz
- make.diff.gz
-
-
- o Prepare the destination directory ready for installation.
-
- Firstly create many of the needed directories (some are
- created automatically later):
-
- $ for d in \
- /applications/psim \
- /applications/psim/bsd-root \
- /applications/psim/bsd-root/usr \
- /applications/psim/bsd-root/usr/share \
- /applications/psim/bsd-root/usr/share/doc \
- /applications/psim/bsd-root/usr/share/doc/psd \
- /applications/psim/bsd-root/usr/share/doc/psd/19.curses \
- /applications/psim/bsd-root/usr/include \
- /applications/psim/bsd-root/usr/lib \
- /applications/psim/powerpc-unknown-eabi \
- /applications/psim/powerpc-unknown-eabi/bin \
- ; \
- do test -d $d || mkdir $d ; done
-
- Next, link the BSD and GNU include directories together.
- GCC expects include files to be in one location while the
- bsd install expects them in a second. The link is in
- the direction below because bsd's install also insists on
- a directory (not a link) for its install destination.
-
- $ rm -rf /applications/psim/powerpc-unknown-eabi/include
- $ ln -s /applications/psim/bsd-root/usr/include \
- /applications/psim/powerpc-unknown-eabi/include
-
- $ ls -l /applications/psim/powerpc-unknown-eabi/include
- lrwxr-xr-x 1 cagney wheel 39 Mar 21 18:09
- /applications/psim/powerpc-unknown-eabi/include
- -> /applications/psim/bsd-root/usr/include
-
-
- o Build/install Berkeley make
-
- The tar archive make.tar.gz contains a recent snapshot
- of bmake from the NetBSD source tree. The notes below
- describe how to build/install it. If you have access
- to an even more recent version of bmake, use that.
-
- Unpack the source code:
-
- $ cd .../scratch
- $ gunzip < make.tar.gz | tar xf -
- $ cd make
-
- Apply the patch in make.diff.gz that fixes a minor
- problem with a build under Solaris (by now it should
- be fixed in the NetBSD-current source tree).
-
- $ gunzip < ../make.diff.gz | more
- $ gunzip < ../make.diff.gz | patch
-
- Build it
-
- $ make -f Makefile.boot 'CC=gcc -g -DPOSIX'
-
- With bmake built, install it into the target specific bin
- directory:
-
- $ cp bmake /applications/psim/powerpc-unknown-eabi/bin/make
- $ cd ..
- $ rm -rf make
-
-
- o Set up a number of wrapper scripts for bmake so that it works.
-
- In addition to needing BSD make the build process assumes
- a number of BSD specific commands. To get around this
- several wrapper scripts are available.
-
- powerpc-unknown-eabi-make (clayton.make.sh)
-
- Front end to Berkeley make setting it up for a
- cross compilation
-
- $ cp clayton.make.sh \
- /applications/psim/bin/powerpc-unknown-eabi-make
- $ chmod a+x \
- /applications/psim/bin/powerpc-unknown-eabi-make
-
- chown (clayton.chown.sh)
-
- Wrapper that does not do any thing.
- Avoids the need to be root when installing.
-
- $ cp clayton.chown.sh \
- /applications/psim/powerpc-unknown-eabi/bin/chown
- $ chmod a+x \
- /applications/psim/powerpc-unknown-eabi/bin/chown
-
- install (clayton.install.sh)
-
- Wrapper to strip away a number of bsd specific install
- arguments.
-
- $ cp clayton.install.sh \
- /applications/psim/powerpc-unknown-eabi/bin/install
- $ chmod a+x \
- /applications/psim/powerpc-unknown-eabi/bin/install
-
- lorder (clayton.lorder.sh)
-
- Tweaked lorder script that will use nm etc from
- binutils.
-
- $ cp clayton.lorder.sh \
- /applications/psim/powerpc-unknown-eabi/bin/lorder
- $ chmod a+x \
- /applications/psim/powerpc-unknown-eabi/bin/lorder
-
-
- printf (?)
-
- Some operating systems don't include the program
- printf. If you host doesn't have one, then a
- good source is the gnu sh-utils version.
-
- Again, if that program is missing, then I suggest
- installing it onto the powerpc specific program
- directory:
-
- /applications/psim/powerpc-unknown-eabi/bin
-
-
- o Unpack the bsd source code (if you haven't already)
-
- If you're short on disk space (like me) just unpack:
-
- sys, lib, share/mk, include, usr.sbin/config,
- usr.sbin/dbsym, gnu/lib/libg++/g++-include,
- usr.bin/lex
-
- Otherwize, assuming you have a CD-DRIVE:
-
- $ cd .../scratch
- $ mkdir bsd-src
- $ cd bsd-src
- $ for d in /cdrom/bsdisc_12_95_disc2/NetBSD-1.1/source/*11
- do
- echo $d
- cat $d/*.?? | gunzip | tar xf -
- done
-
- Flatten the directory structure a little.
-
- $ mv usr/src/* .
- $ rmdir usr/src usr
- $ cd ..
-
-
- o Apply the clayton (PowerPC) patches to your constructed
- tree.
-
- $ cd .../scratch
- $ cd bsd-src
-
- Diffs are applied using something like:
-
- $ gunzip < ../clayton-include-960312.diff.gz | patch -p1
- $ gunzip < ../clayton-lib-960203.diff.gz | patch -p1
- $ gunzip < ../clayton-sys-960203.diff.gz | patch -p1
-
- The patch to sys/dev/pci/ncr.c.rej might fail.
-
- The tar archives have a different problem, you need
- to remove the `src' prefix. I used
-
- $ ln -s . src
- $ gunzip < ../clayton-lib-960203.tar.gz | tar xvf -
- $ gunzip < ../clayton-sys-960203.tar.gz | tar xvf -
-
- So that src/xxx unpacked into ./xxx
-
- $ cd ..
-
-
- o install Berkeley make's include (mk) files.
-
- $ cd .../scrath
- $ cd bsd-src/share
- $ tar cf - mk | ( cd /applications/psim/bsd-root/usr/share \
- && tar xvf - )
- $ cd ../..
-
-
- o Install the include files
-
- $ cd .../scratch
- $ cd bsd-src/include
- $ powerpc-unknown-eabi-make install
- $ cd ../..
-
-
- o Install a few other include files.
-
- As discussed above in the section on building libnew,
- the build process can have chicken/egg problems. In the
- case of BSD's libc, it wants to use several include files
- (from the installed include directory) before they are
- installed. Just copy them in as seen below:
-
- $ cd .../scratch
- $ cd bsd-src
- $ cp gnu/lib/libg++/g++-include/values.h \
- /applications/psim/powerpc-unknown-eabi/include
- $ cp lib/libcurses/curses.h \
- /applications/psim/powerpc-unknown-eabi/include
- $ cd ..
-
-
- o Unpack/patch/build/install BINUTILS
-
- $ cd .../scratch
- $ gunzip < binutils-2.6.tar.gz | tar xf -
-
- gas (bfd) 2.6 didn't support the reading and writing of
- note sections. The patch binutils-2.6+note.diff.gz
- adds support for this. PowerPC/ELF boot files being loaded
- by OpenBoot ROM's should contain a PowerPC note section.
-
- $ cd .../scratch
- $ cd binutils-2.6/bfd
- $ gunzip < ../../binutils-2.6+note.diff.gz | more
- $ gunzip < ../../binutils-2.6+note.diff.gz | patch
- $ cd ../..
-
- Then continue with the build
-
- $ cd .../scratch
- $ cd binutils-2.6
- $ ./configure --target=powerpc-unknown-eabi \
- --prefix=/applications/psim
- $ make
- $ make install
- $ cd ..
- $ rm -rf binutils-2.6
-
- This has the intended side effect of partially populating
- the psim directory tree which makes follow on steps easier.
-
-
- o Unpack/patch/build/install GCC
-
- $ cd .../scratch
- $ gunzip < gcc-2.7.2.tar.gz | tar xf -
- $ cd gcc-2.7.2
-
- GCC-2.7.2 and the BSD include files have a conflicting type
- declaration. The patch below gets around this problem
- (it may still be applicable to more recent versions of
- GCC):
-
- $ gunzip < ../gcc-2.7.2+sys-types.diff.gz | more
- $ gunzip < ../gcc-2.7.2+sys-types.diff.gz | patch
-
- If your version of GCC includes the file ginclude/ppc-asm.h
- then you should install that header file into the directory:
- /applications/psim/powerpc-unknown-eabi/include. More
- recent versions of GCC expect this file to be installed:
-
- $ test -r ginclude/ppc-asm.h \
- && cp ginclude/ppc-asm.h \
- /applications/psim/powerpc-unknown-eabi/include
-
- Other than that, assuming the include files installed
- okay, the rest should be fine ....
-
- $ ./configure --target=powerpc-unknown-eabi \
- --prefix=/applications/psim
- $ make CC=gcc
- $ make CC=gcc install
- $ cd ..
- $ rm -rf gcc-2.7.2
-
-
- o Build/install the Berkeley library:
-
- $ cd .../scratch
- $ cd bsd-src/lib
- $ powerpc-unknown-eabi-make
- $ powerpc-unknown-eabi-make install
- $ cd ../..
-
- If you encounter problems check the following (each
- discussed above):
-
- o GCC and BSD have a common include
- directory
-
- o all the missing include files installed
-
- o all the wrapper programs installed
-
-
- o Build/run a simple BSD program
-
- $ cd .../scratch
- $ cd bsd-src/usr.bin/printenv
- $ powerpc-unknown-eabi-make
- $ powerpc-unknown-eabi-run printenv
- .
- .
- .
-
-
- ----------------------------------------------------------------------
diff --git a/sim/ppc/acconfig.h b/sim/ppc/acconfig.h
deleted file mode 100644
index f9b87a10c60..00000000000
--- a/sim/ppc/acconfig.h
+++ /dev/null
@@ -1,15 +0,0 @@
-
-/* Define to 1 if NLS is requested. */
-#undef ENABLE_NLS
-
-/* Define as 1 if you have catgets and don't want to use GNU gettext. */
-#undef HAVE_CATGETS
-
-/* Define as 1 if you have gettext and don't want to use GNU gettext. */
-#undef HAVE_GETTEXT
-
-/* Define as 1 if you have the stpcpy function. */
-#undef HAVE_STPCPY
-
-/* Define if your locale.h file contains LC_MESSAGES. */
-#undef HAVE_LC_MESSAGES
diff --git a/sim/ppc/aclocal.m4 b/sim/ppc/aclocal.m4
deleted file mode 100644
index e69de29bb2d..00000000000
--- a/sim/ppc/aclocal.m4
+++ /dev/null
diff --git a/sim/ppc/basics.h b/sim/ppc/basics.h
deleted file mode 100644
index 1520023178c..00000000000
--- a/sim/ppc/basics.h
+++ /dev/null
@@ -1,139 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1997, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-#ifndef _BASICS_H_
-#define _BASICS_H_
-
-
-/* from Michael Meissner, macro's to handle concating symbols better */
-
-#if defined(__STDC__) || defined(ALMOST_STDC)
-#define CONCAT2(a,b) a##b
-#define CONCAT3(a,b,c) a##b##c
-#define CONCAT4(a,b,c,d) a##b##c##d
-#else
-#define CONCAT2(a,b) a/**/b
-#define CONCAT3(a,b,c) a/**/b/**/c
-#define CONCAT4(a,b,c,d) a/**/b/**/c/**/d
-#endif
-
-#define XCONCAT2(a,b) CONCAT2(a,b)
-#define XCONCAT3(a,b,c) CONCAT3(a,b,c)
-#define XCONCAT4(a,b,c,d) CONCAT4(a,b,c,d)
-
-
-/* many things pass around the cpu and psim object with out knowing
- what it is */
-
-typedef struct _cpu cpu;
-typedef struct _psim psim;
-typedef struct _device device;
-typedef struct _device_instance device_instance;
-typedef struct _event_queue event_queue;
-typedef struct _event_entry_tag *event_entry_tag;
-
-
-/* many things are moving data between the host and target */
-
-typedef enum {
- cooked_transfer,
- raw_transfer,
-} transfer_mode;
-
-
-/* possible exit statuses */
-
-typedef enum {
- was_continuing, was_trap, was_exited, was_signalled
-} stop_reason;
-
-
-/* disposition of an object when things are next restarted */
-
-typedef enum {
- permenant_object,
- tempoary_object,
-} object_disposition;
-
-
-/* directions */
-
-typedef enum {
- bidirect_port,
- input_port,
- output_port,
-} port_direction;
-
-
-
-/* Basic configuration */
-
-#include "config.h"
-#include "ppc-config.h"
-#include "inline.h"
-
-
-/* Basic host dependant mess - hopefully <stdio.h> + <stdarg.h> will
- bring potential conflicts out in the open */
-
-#include <stdarg.h>
-#include <stdio.h>
-
-
-#ifndef NORETURN
-#define NORETURN
-#endif
-
-#ifndef NULL
-#define NULL 0
-#endif
-
-#if !defined (__attribute__)
-#if (!defined(__GNUC__) \
- || (__GNUC__ < 2) \
- || (__GNUC__ == 2 && __GNUC_MINOR__ < 6))
-#define __attribute__(arg)
-#endif
-#endif
-
-#if !defined (UNUSED)
-#if (!defined(__GNUC__) \
- || (__GNUC__ < 2) \
- || (__GNUC__ == 2 && __GNUC_MINOR__ < 7))
-#define UNUSED
-#else
-#define UNUSED __attribute__((__unused__))
-#endif
-#endif
-
-
-/* Basic definitions - ordered so that nothing calls what comes after
- it */
-
-#include "sim_callbacks.h"
-
-#include "debug.h"
-
-#include "words.h"
-#include "bits.h"
-#include "sim-endian.h"
-
-#endif /* _BASICS_H_ */
diff --git a/sim/ppc/bits.c b/sim/ppc/bits.c
deleted file mode 100644
index 00bba518aac..00000000000
--- a/sim/ppc/bits.c
+++ /dev/null
@@ -1,114 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1995, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-#ifndef _BITS_C_
-#define _BITS_C_
-
-#include "basics.h"
-
-
-INLINE_BITS\
-(unsigned32)
-MASKED32(unsigned32 word,
- unsigned start,
- unsigned stop)
-{
- return (word & MASK32(start, stop));
-}
-
-INLINE_BITS\
-(unsigned64)
-MASKED64(unsigned64 word,
- unsigned start,
- unsigned stop)
-{
- return (word & MASK64(start, stop));
-}
-
-INLINE_BITS\
-(unsigned_word)
-MASKED(unsigned_word word,
- unsigned start,
- unsigned stop)
-{
- return ((word) & MASK(start, stop));
-}
-
-
-
-INLINE_BITS\
-(unsigned_word)
-EXTRACTED(unsigned_word word,
- unsigned start,
- unsigned stop)
-{
- ASSERT(start <= stop);
-#if (WITH_TARGET_WORD_BITSIZE == 64)
- return _EXTRACTEDn(64, word, start, stop);
-#else
- if (stop < 32)
- return 0;
- else
- return ((word >> (63 - stop))
- & MASK(start+(63-stop), 63));
-#endif
-}
-
-
-INLINE_BITS\
-(unsigned_word)
-INSERTED(unsigned_word word,
- unsigned start,
- unsigned stop)
-{
- ASSERT(start <= stop);
-#if (WITH_TARGET_WORD_BITSIZE == 64)
- return _INSERTEDn(64, word, start, stop);
-#else
- if (stop < 32)
- return 0;
- else
- return ((word & MASK(start+(63-stop), 63))
- << (63 - stop));
-#endif
-}
-
-
-INLINE_BITS\
-(unsigned32)
-ROTL32(unsigned32 val,
- long shift)
-{
- ASSERT(shift >= 0 && shift <= 32);
- return _ROTLn(32, val, shift);
-}
-
-
-INLINE_BITS\
-(unsigned64)
-ROTL64(unsigned64 val,
- long shift)
-{
- ASSERT(shift >= 0 && shift <= 64);
- return _ROTLn(64, val, shift);
-}
-
-#endif /* _BITS_C_ */
diff --git a/sim/ppc/bits.h b/sim/ppc/bits.h
deleted file mode 100644
index 06898e07e9b..00000000000
--- a/sim/ppc/bits.h
+++ /dev/null
@@ -1,257 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1995, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-#ifndef _BITS_H_
-#define _BITS_H_
-
-
-/* bit manipulation routines:
-
- Bit numbering: The bits are numbered according to the PowerPC
- convention - the left most (or most significant) is bit 0 while the
- right most (least significant) is bit 1.
-
- Size convention: Each macro is in three forms - <MACRO>32 which
- operates in 32bit quantity (bits are numbered 0..31); <MACRO>64
- which operates using 64bit quantites (and bits are numbered 0..64);
- and <MACRO> which operates using the bit size of the target
- architecture (bits are still numbered 0..63), with 32bit
- architectures ignoring the first 32bits having bit 32 as the most
- significant.
-
- BIT*(POS): Quantity with just 1 bit set.
-
- MASK*(FIRST, LAST): Create a constant bit mask of the specified
- size with bits [FIRST .. LAST] set.
-
- MASKED*(VALUE, FIRST, LAST): Masks out all but bits [FIRST
- .. LAST].
-
- EXTRACTED*(VALUE, FIRST, LAST): Masks out bits [FIRST .. LAST] but
- also right shifts the masked value so that bit LAST becomes the
- least significant (right most).
-
- SHUFFLED**(VALUE, OLD, NEW): Mask then move a single bit from OLD
- new NEW.
-
- MOVED**(VALUE, OLD_FIRST, OLD_LAST, NEW_FIRST, NEW_LAST): Moves
- things around so that bits OLD_FIRST..OLD_LAST are masked then
- moved to NEW_FIRST..NEW_LAST.
-
- INSERTED*(VALUE, FIRST, LAST): Takes VALUE and `inserts' the (LAST
- - FIRST + 1) least significant bits into bit positions [ FIRST
- .. LAST ]. This is almost the complement to EXTRACTED.
-
- IEA_MASKED(SHOULD_MASK, ADDR): Convert the address to the targets
- natural size. If in 32bit mode, discard the high 32bits.
-
- EXTENDED(VALUE): Convert VALUE (32bits of it) to the targets
- natural size. If in 64bit mode, sign extend the value.
-
- ALIGN_*(VALUE): Round upwards the value so that it is aligned.
-
- FLOOR_*(VALUE): Truncate the value so that it is aligned.
-
- ROTL*(VALUE, NR_BITS): Return the value rotated by NR_BITS
-
- */
-
-#define _MAKE_SHIFT(WIDTH, pos) ((WIDTH) - 1 - (pos))
-
-
-/* MakeBit */
-#define _BITn(WIDTH, pos) (((natural##WIDTH)(1)) \
- << _MAKE_SHIFT(WIDTH, pos))
-
-#define BIT4(POS) (1 << _MAKE_SHIFT(4, POS))
-#define BIT5(POS) (1 << _MAKE_SHIFT(5, POS))
-#define BIT8(POS) (1 << _MAKE_SHIFT(8, POS))
-#define BIT10(POS) (1 << _MAKE_SHIFT(10, POS))
-#define BIT32(POS) _BITn(32, POS)
-#define BIT64(POS) _BITn(64, POS)
-
-#if (WITH_TARGET_WORD_BITSIZE == 64)
-#define BIT(POS) BIT64(POS)
-#else
-#define BIT(POS) (((POS) < 32) ? 0 : _BITn(32, (POS)-32))
-#endif
-
-
-/* multi bit mask */
-#define _MASKn(WIDTH, START, STOP) \
-(((((unsigned##WIDTH)0) - 1) \
- >> (WIDTH - ((STOP) - (START) + 1))) \
- << (WIDTH - 1 - (STOP)))
-
-#define MASK32(START, STOP) _MASKn(32, START, STOP)
-#define MASK64(START, STOP) _MASKn(64, START, STOP)
-
-#if (WITH_TARGET_WORD_BITSIZE == 64)
-#define MASK(START, STOP) \
-(((START) <= (STOP)) \
- ? _MASKn(64, START, STOP) \
- : (_MASKn(64, 0, STOP) \
- | _MASKn(64, START, 63)))
-#else
-#define MASK(START, STOP) \
-(((START) <= (STOP)) \
- ? (((STOP) < 32) \
- ? 0 \
- : _MASKn(32, \
- (START) < 32 ? 0 : (START) - 32, \
- (STOP)-32)) \
- : (_MASKn(32, \
- (START) < 32 ? 0 : (START) - 32, \
- 31) \
- | (((STOP) < 32) \
- ? 0 \
- : _MASKn(32, \
- 0, \
- (STOP) - 32))))
-#endif
-
-
-/* mask the required bits, leaving them in place */
-
-INLINE_BITS\
-(unsigned32) MASKED32
-(unsigned32 word,
- unsigned start,
- unsigned stop);
-
-INLINE_BITS\
-(unsigned64) MASKED64
-(unsigned64 word,
- unsigned start,
- unsigned stop);
-
-INLINE_BITS\
-(unsigned_word) MASKED
-(unsigned_word word,
- unsigned start,
- unsigned stop);
-
-
-/* extract the required bits aligning them with the lsb */
-#define _EXTRACTEDn(WIDTH, WORD, START, STOP) \
-((((natural##WIDTH)(WORD)) >> (WIDTH - (STOP) - 1)) \
- & _MASKn(WIDTH, WIDTH-1+(START)-(STOP), WIDTH-1))
-
-/* #define EXTRACTED10(WORD, START, STOP) _EXTRACTEDn(10, WORD, START, STOP) */
-#define EXTRACTED32(WORD, START, STOP) _EXTRACTEDn(32, WORD, START, STOP)
-#define EXTRACTED64(WORD, START, STOP) _EXTRACTEDn(64, WORD, START, STOP)
-
-INLINE_BITS\
-(unsigned_word) EXTRACTED
-(unsigned_word val,
- unsigned start,
- unsigned stop);
-
-
-/* move a single bit around */
-/* NB: the wierdness (N>O?N-O:0) is to stop a warning from GCC */
-#define _SHUFFLEDn(N, WORD, OLD, NEW) \
-((OLD) < (NEW) \
- ? (((unsigned##N)(WORD) \
- >> (((NEW) > (OLD)) ? ((NEW) - (OLD)) : 0)) \
- & MASK32((NEW), (NEW))) \
- : (((unsigned##N)(WORD) \
- << (((OLD) > (NEW)) ? ((OLD) - (NEW)) : 0)) \
- & MASK32((NEW), (NEW))))
-
-#define SHUFFLED32(WORD, OLD, NEW) _SHUFFLEDn(32, WORD, OLD, NEW)
-#define SHUFFLED64(WORD, OLD, NEW) _SHUFFLEDn(64, WORD, OLD, NEW)
-
-#define SHUFFLED(WORD, OLD, NEW) _SHUFFLEDn(_word, WORD, OLD, NEW)
-
-
-/* move a group of bits around */
-#define _INSERTEDn(N, WORD, START, STOP) \
-(((natural##N)(WORD) << _MAKE_SHIFT(N, STOP)) & _MASKn(N, START, STOP))
-
-#define INSERTED32(WORD, START, STOP) _INSERTEDn(32, WORD, START, STOP)
-#define INSERTED64(WORD, START, STOP) _INSERTEDn(64, WORD, START, STOP)
-
-INLINE_BITS\
-(unsigned_word) INSERTED
-(unsigned_word val,
- unsigned start,
- unsigned stop);
-
-
-/* depending on MODE return a 64bit or 32bit (sign extended) value */
-#if (WITH_TARGET_WORD_BITSIZE == 64)
-#define EXTENDED(X) ((signed64)(signed32)(X))
-#else
-#define EXTENDED(X) (X)
-#endif
-
-
-/* memory alignment macro's */
-#define _ALIGNa(A,X) (((X) + ((A) - 1)) & ~((A) - 1))
-#define _FLOORa(A,X) ((X) & ~((A) - 1))
-
-#define ALIGN_8(X) _ALIGNa(8, X)
-#define ALIGN_16(X) _ALIGNa(16, X)
-
-#define ALIGN_PAGE(X) _ALIGNa(0x1000, X)
-#define FLOOR_PAGE(X) ((X) & ~(0x1000 - 1))
-
-
-/* bit bliting macro's */
-#define BLIT32(V, POS, BIT) \
-do { \
- if (BIT) \
- V |= BIT32(POS); \
- else \
- V &= ~BIT32(POS); \
-} while (0)
-#define MBLIT32(V, LO, HI, VAL) \
-do { \
- (V) = (((V) & ~MASK32((LO), (HI))) \
- | INSERTED32(VAL, LO, HI)); \
-} while (0)
-
-
-/* some rotate functions to make things easier
-
- NOTE: These are functions not macro's as the latter tickles bugs in
- gcc-2.6.3 */
-
-#define _ROTLn(N, VAL, SHIFT) \
-(((VAL) << (SHIFT)) | ((VAL) >> ((N)-(SHIFT))))
-
-INLINE_BITS\
-(unsigned32) ROTL32
-(unsigned32 val,
- long shift);
-
-INLINE_BITS\
-(unsigned64) ROTL64
-(unsigned64 val,
- long shift);
-
-
-#if (BITS_INLINE & INCLUDE_MODULE)
-#include "bits.c"
-#endif
-
-#endif /* _BITS_H_ */
diff --git a/sim/ppc/cap.c b/sim/ppc/cap.c
deleted file mode 100644
index a3be304c81f..00000000000
--- a/sim/ppc/cap.c
+++ /dev/null
@@ -1,134 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1995,1997, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-#ifndef _CAP_C_
-#define _CAP_C_
-
-#include "cap.h"
-
-typedef struct _cap_mapping cap_mapping;
-struct _cap_mapping {
- unsigned_cell external;
- void *internal;
- cap_mapping *next;
-};
-
-struct _cap {
- int nr_mappings;
- cap_mapping *mappings;
-};
-
-INLINE_CAP\
-(cap *)
-cap_create(const char *key)
-{
- return ZALLOC(cap);
-}
-
-INLINE_CAP\
-(void)
-cap_init(cap *db)
-{
- cap_mapping *current_map = db->mappings;
- if (current_map != NULL) {
- db->nr_mappings = db->mappings->external;
- /* verify that the mappings that were not removed are in sequence
- down to nr 1 */
- while (current_map->next != NULL) {
- if (current_map->external != current_map->next->external + 1)
- error("cap: cap database possibly corrupt");
- current_map = current_map->next;
- }
- ASSERT(current_map->next == NULL);
- if (current_map->external != 1)
- error("cap: cap database possibly currupt");
- }
- else {
- db->nr_mappings = 0;
- }
-}
-
-INLINE_CAP\
-(void *)
-cap_internal(cap *db,
- signed_cell external)
-{
- cap_mapping *current_map = db->mappings;
- while (current_map != NULL) {
- if (current_map->external == external)
- return current_map->internal;
- current_map = current_map->next;
- }
- return (void*)0;
-}
-
-INLINE_CAP\
-(signed_cell)
-cap_external(cap *db,
- void *internal)
-{
- cap_mapping *current_map = db->mappings;
- while (current_map != NULL) {
- if (current_map->internal == internal)
- return current_map->external;
- current_map = current_map->next;
- }
- return 0;
-}
-
-INLINE_CAP\
-(void)
-cap_add(cap *db,
- void *internal)
-{
- if (cap_external(db, internal) != 0) {
- error("cap: attempting to add an object already in the data base");
- }
- else {
- /* insert at the front making things in decending order */
- cap_mapping *new_map = ZALLOC(cap_mapping);
- new_map->next = db->mappings;
- new_map->internal = internal;
- db->nr_mappings += 1;
- new_map->external = db->nr_mappings;
- db->mappings = new_map;
- }
-}
-
-INLINE_CAP\
-(void)
-cap_remove(cap *db,
- void *internal)
-{
- cap_mapping **current_map = &db->mappings;
- while (*current_map != NULL) {
- if ((*current_map)->internal == internal) {
- cap_mapping *delete = *current_map;
- *current_map = delete->next;
- zfree(delete);
- return;
- }
- current_map = &(*current_map)->next;
- }
- error("cap: attempt to remove nonexistant internal object");
-}
-
-#endif
diff --git a/sim/ppc/cap.h b/sim/ppc/cap.h
deleted file mode 100644
index 6c91752af8d..00000000000
--- a/sim/ppc/cap.h
+++ /dev/null
@@ -1,60 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1995,1997, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-/* Export a capability data base that maps between internal data
- values and those given to a simulation */
-
-#ifndef _CAP_H_
-#define _CAP_H_
-
-#include "basics.h"
-
-typedef struct _cap cap;
-
-INLINE_CAP\
-(cap *) cap_create
-(const char *name);
-
-INLINE_CAP\
-(void) cap_init
-(cap *db);
-
-INLINE_CAP\
-(signed_cell) cap_external
-(cap *db,
- void *internal);
-
-INLINE_CAP\
-(void *) cap_internal
-(cap *db,
- signed_cell external);
-
-INLINE_CAP\
-(void) cap_add
-(cap *db,
- void *internal);
-
-INLINE_CAP\
-(void) cap_remove
-(cap *db,
- void *internal);
-
-#endif
diff --git a/sim/ppc/config.in b/sim/ppc/config.in
deleted file mode 100644
index c53a833c01c..00000000000
--- a/sim/ppc/config.in
+++ /dev/null
@@ -1,362 +0,0 @@
-/* config.in. Generated automatically from configure.in by autoheader. */
-
-/* Define if using alloca.c. */
-#undef C_ALLOCA
-
-/* Define to empty if the keyword does not work. */
-#undef const
-
-/* Define to one of _getb67, GETB67, getb67 for Cray-2 and Cray-YMP systems.
- This function is required for alloca.c support on those systems. */
-#undef CRAY_STACKSEG_END
-
-/* Define to the type of elements in the array set by `getgroups'.
- Usually this is either `int' or `gid_t'. */
-#undef GETGROUPS_T
-
-/* Define to `int' if <sys/types.h> doesn't define. */
-#undef gid_t
-
-/* Define if you have alloca, as a function or macro. */
-#undef HAVE_ALLOCA
-
-/* Define if you have <alloca.h> and it should be used (not on Ultrix). */
-#undef HAVE_ALLOCA_H
-
-/* Define if you have a working `mmap' system call. */
-#undef HAVE_MMAP
-
-/* Define if your struct stat has st_blksize. */
-#undef HAVE_ST_BLKSIZE
-
-/* Define if your struct stat has st_blocks. */
-#undef HAVE_ST_BLOCKS
-
-/* Define if your struct stat has st_rdev. */
-#undef HAVE_ST_RDEV
-
-/* Define if your struct tm has tm_zone. */
-#undef HAVE_TM_ZONE
-
-/* Define if you don't have tm_zone but do have the external array
- tzname. */
-#undef HAVE_TZNAME
-
-/* Define as __inline if that's what the C compiler calls it. */
-#undef inline
-
-/* Define to `int' if <sys/types.h> doesn't define. */
-#undef mode_t
-
-/* Define to `long' if <sys/types.h> doesn't define. */
-#undef off_t
-
-/* Define to `int' if <sys/types.h> doesn't define. */
-#undef pid_t
-
-/* Define if you need to in order for stat and other things to work. */
-#undef _POSIX_SOURCE
-
-/* Define as the return type of signal handlers (int or void). */
-#undef RETSIGTYPE
-
-/* Define to `unsigned' if <sys/types.h> doesn't define. */
-#undef size_t
-
-/* If using the C implementation of alloca, define if you know the
- direction of stack growth for your system; otherwise it will be
- automatically deduced at run-time.
- STACK_DIRECTION > 0 => grows toward higher addresses
- STACK_DIRECTION < 0 => grows toward lower addresses
- STACK_DIRECTION = 0 => direction of growth unknown
- */
-#undef STACK_DIRECTION
-
-/* Define if you have the ANSI C header files. */
-#undef STDC_HEADERS
-
-/* Define if your <sys/time.h> declares struct tm. */
-#undef TM_IN_SYS_TIME
-
-/* Define to `int' if <sys/types.h> doesn't define. */
-#undef uid_t
-
-/* Define if your processor stores words with the most significant
- byte first (like Motorola and SPARC, unlike Intel and VAX). */
-#undef WORDS_BIGENDIAN
-
-/* Define to 1 if NLS is requested. */
-#undef ENABLE_NLS
-
-/* Define as 1 if you have gettext and don't want to use GNU gettext. */
-#undef HAVE_GETTEXT
-
-/* Define as 1 if you have the stpcpy function. */
-#undef HAVE_STPCPY
-
-/* Define if your locale.h file contains LC_MESSAGES. */
-#undef HAVE_LC_MESSAGES
-
-/* Define if you have the __argz_count function. */
-#undef HAVE___ARGZ_COUNT
-
-/* Define if you have the __argz_next function. */
-#undef HAVE___ARGZ_NEXT
-
-/* Define if you have the __argz_stringify function. */
-#undef HAVE___ARGZ_STRINGIFY
-
-/* Define if you have the access function. */
-#undef HAVE_ACCESS
-
-/* Define if you have the cfgetispeed function. */
-#undef HAVE_CFGETISPEED
-
-/* Define if you have the cfgetospeed function. */
-#undef HAVE_CFGETOSPEED
-
-/* Define if you have the cfsetispeed function. */
-#undef HAVE_CFSETISPEED
-
-/* Define if you have the cfsetospeed function. */
-#undef HAVE_CFSETOSPEED
-
-/* Define if you have the chdir function. */
-#undef HAVE_CHDIR
-
-/* Define if you have the chmod function. */
-#undef HAVE_CHMOD
-
-/* Define if you have the chown function. */
-#undef HAVE_CHOWN
-
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-
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-
-/* Define if you have the dup2 function. */
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-
-/* Define if you have the fchmod function. */
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-
-/* Define if you have the fchown function. */
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-
-/* Define if you have the fcntl function. */
-#undef HAVE_FCNTL
-
-/* Define if you have the fstat function. */
-#undef HAVE_FSTAT
-
-/* Define if you have the fstatfs function. */
-#undef HAVE_FSTATFS
-
-/* Define if you have the getcwd function. */
-#undef HAVE_GETCWD
-
-/* Define if you have the getdirentries function. */
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-
-/* Define if you have the getegid function. */
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-
-/* Define if you have the geteuid function. */
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-
-/* Define if you have the getgid function. */
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-
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-
-/* Define if you have the getpid function. */
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-
-/* Define if you have the getppid function. */
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-
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-
-/* Define if you have the gettimeofday function. */
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-
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-
-/* Define if you have the ioctl function. */
-#undef HAVE_IOCTL
-
-/* Define if you have the kill function. */
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-
-/* Define if you have the link function. */
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-
-/* Define if you have the lseek function. */
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-
-/* Define if you have the lstat function. */
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-
-/* Define if you have the mkdir function. */
-#undef HAVE_MKDIR
-
-/* Define if you have the munmap function. */
-#undef HAVE_MUNMAP
-
-/* Define if you have the pipe function. */
-#undef HAVE_PIPE
-
-/* Define if you have the putenv function. */
-#undef HAVE_PUTENV
-
-/* Define if you have the readlink function. */
-#undef HAVE_READLINK
-
-/* Define if you have the rmdir function. */
-#undef HAVE_RMDIR
-
-/* Define if you have the setenv function. */
-#undef HAVE_SETENV
-
-/* Define if you have the setlocale function. */
-#undef HAVE_SETLOCALE
-
-/* Define if you have the setregid function. */
-#undef HAVE_SETREGID
-
-/* Define if you have the setreuid function. */
-#undef HAVE_SETREUID
-
-/* Define if you have the sigprocmask function. */
-#undef HAVE_SIGPROCMASK
-
-/* Define if you have the stat function. */
-#undef HAVE_STAT
-
-/* Define if you have the stpcpy function. */
-#undef HAVE_STPCPY
-
-/* Define if you have the strcasecmp function. */
-#undef HAVE_STRCASECMP
-
-/* Define if you have the strchr function. */
-#undef HAVE_STRCHR
-
-/* Define if you have the symlink function. */
-#undef HAVE_SYMLINK
-
-/* Define if you have the tcdrain function. */
-#undef HAVE_TCDRAIN
-
-/* Define if you have the tcflow function. */
-#undef HAVE_TCFLOW
-
-/* Define if you have the tcflush function. */
-#undef HAVE_TCFLUSH
-
-/* Define if you have the tcgetattr function. */
-#undef HAVE_TCGETATTR
-
-/* Define if you have the tcgetpgrp function. */
-#undef HAVE_TCGETPGRP
-
-/* Define if you have the tcsendbreak function. */
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-/* Define if you have the time function. */
-#undef HAVE_TIME
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-/* Define if you have the umask function. */
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-/* Define if you have the unlink function. */
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-/* Define if you have the <argz.h> header file. */
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-
-/* Define if you have the <dirent.h> header file. */
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-
-/* Define if you have the <fcntl.h> header file. */
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-
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-
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-#undef HAVE_SYS_IOCTL_H
-
-/* Define if you have the <sys/mount.h> header file. */
-#undef HAVE_SYS_MOUNT_H
-
-/* Define if you have the <sys/ndir.h> header file. */
-#undef HAVE_SYS_NDIR_H
-
-/* Define if you have the <sys/param.h> header file. */
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-
-/* Define if you have the <sys/resource.h> header file. */
-#undef HAVE_SYS_RESOURCE_H
-
-/* Define if you have the <sys/stat.h> header file. */
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-
-/* Define if you have the <sys/termio.h> header file. */
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-
-/* Define if you have the <sys/termios.h> header file. */
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-
-/* Define if you have the <sys/time.h> header file. */
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-
-/* Define if you have the <sys/times.h> header file. */
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-
-/* Define if you have the <sys/types.h> header file. */
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-
-/* Define if you have the <time.h> header file. */
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-
-/* Define if you have the <unistd.h> header file. */
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-
-/* Define if you have the <values.h> header file. */
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diff --git a/sim/ppc/configure b/sim/ppc/configure
deleted file mode 100755
index dcedf5d3843..00000000000
--- a/sim/ppc/configure
+++ /dev/null
@@ -1,5290 +0,0 @@
-#! /bin/sh
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-
-
-
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-
-
-
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-
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-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-sim_inline="-DDEFAULT_INLINE=0"
-
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-#
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-# serial 3
-
-
-
-
-
-# Search path for a program which passes the given test.
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-#
-# This file file be copied and used freely without restrictions. It can
-# be used in projects which are not available under the GNU Public License
-# but which still want to provide support for the GNU gettext functionality.
-# Please note that the actual code is *not* freely available.
-
-# serial 1
-
-
-
-# Check whether LC_MESSAGES is available in <locale.h>.
-# Ulrich Drepper <drepper@cygnus.com>, 1995.
-#
-# This file file be copied and used freely without restrictions. It can
-# be used in projects which are not available under the GNU Public License
-# but which still want to provide support for the GNU gettext functionality.
-# Please note that the actual code is *not* freely available.
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-# serial 1
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-
-
-
-
-
-# Guess values for system-dependent variables and create Makefiles.
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-# gives unlimited permission to copy, distribute and modify it.
-
-# Defaults:
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-ac_help="$ac_help
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-ac_help="$ac_help
- --enable-sim-alignment=align Specify strict or nonstrict alignment."
-ac_help="$ac_help
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-ac_help="$ac_help
- --enable-sim-bitsize=n Specify target bitsize (32 or 64)."
-ac_help="$ac_help
- --enable-sim-bswap Use the BSWAP instruction on Intel 486s and Pentiums."
-ac_help="$ac_help
- --enable-sim-cflags=opts Extra CFLAGS for use in building simulator"
-ac_help="$ac_help
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-ac_help="$ac_help
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-ac_help="$ac_help
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-ac_help="$ac_help
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-ac_help="$ac_help
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-ac_help="$ac_help
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-ac_help="$ac_help
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-ac_help="$ac_help
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-ac_help="$ac_help
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-ac_help="$ac_help
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-ac_help="$ac_help
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-ac_help="$ac_help
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-ac_help="$ac_help
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-ac_help="$ac_help
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-ac_help="$ac_help
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-rm -f conftest*
-
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-if { (eval echo configure:1287: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null
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-#line 1316 "configure"
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-if { (eval echo configure:1365: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
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- echo "configure: failed program was:" >&5
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-if { (eval echo configure:1400: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
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- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
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-
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-
-echo "$ac_t""$ac_cv_c_inline" 1>&6
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-if eval "test \"`echo '$''{'ac_cv_type_off_t'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
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- cat > conftest.$ac_ext <<EOF
-#line 1431 "configure"
-#include "confdefs.h"
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-#include <stdlib.h>
-#include <stddef.h>
-#endif
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-if (eval "$ac_cpp conftest.$ac_ext") 2>&5 |
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- rm -rf conftest*
- ac_cv_type_off_t=no
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-rm -f conftest*
-
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-echo "$ac_t""$ac_cv_type_off_t" 1>&6
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-
-fi
-
-echo $ac_n "checking for size_t""... $ac_c" 1>&6
-echo "configure:1459: checking for size_t" >&5
-if eval "test \"`echo '$''{'ac_cv_type_size_t'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1464 "configure"
-#include "confdefs.h"
-#include <sys/types.h>
-#if STDC_HEADERS
-#include <stdlib.h>
-#include <stddef.h>
-#endif
-EOF
-if (eval "$ac_cpp conftest.$ac_ext") 2>&5 |
- egrep "(^|[^a-zA-Z_0-9])size_t[^a-zA-Z_0-9]" >/dev/null 2>&1; then
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- ac_cv_type_size_t=yes
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- rm -rf conftest*
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-rm -f conftest*
-
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- cat > conftest.$ac_ext <<EOF
-#line 1499 "configure"
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-if { (eval echo configure:1506: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
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- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- ac_cv_header_alloca_h=no
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-rm -f conftest*
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-
-echo "$ac_t""$ac_cv_header_alloca_h" 1>&6
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-
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-
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-#line 1532 "configure"
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-if { (eval echo configure:1560: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
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- ac_cv_func_alloca_works=yes
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- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
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-rm -f conftest*
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-
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-
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-echo "configure:1592: checking whether alloca needs Cray hooks" >&5
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- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1597 "configure"
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-if (eval "$ac_cpp conftest.$ac_ext") 2>&5 |
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- ac_cv_os_cray=yes
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- rm -rf conftest*
- ac_cv_os_cray=no
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-rm -f conftest*
-
-fi
-
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-echo "configure:1622: checking for $ac_func" >&5
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- cat > conftest.$ac_ext <<EOF
-#line 1627 "configure"
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-char $ac_func();
-
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-if { (eval echo configure:1650: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
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- eval "ac_cv_func_$ac_func=yes"
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- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=no"
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-
-if eval "test \"`echo '$ac_cv_func_'$ac_func`\" = yes"; then
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-
- break
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- echo "$ac_t""no" 1>&6
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-
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-
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-echo "configure:1677: checking stack direction for C alloca" >&5
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- if test "$cross_compiling" = yes; then
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- cat > conftest.$ac_ext <<EOF
-#line 1685 "configure"
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-{
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-{
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-if { (eval echo configure:1704: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null
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- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -fr conftest*
- ac_cv_c_stack_direction=-1
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-rm -fr conftest*
-fi
-
-fi
-
-echo "$ac_t""$ac_cv_c_stack_direction" 1>&6
-cat >> confdefs.h <<EOF
-#define STACK_DIRECTION $ac_cv_c_stack_direction
-EOF
-
-fi
-
-for ac_hdr in unistd.h
-do
-ac_safe=`echo "$ac_hdr" | sed 'y%./+-%__p_%'`
-echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6
-echo "configure:1729: checking for $ac_hdr" >&5
-if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1734 "configure"
-#include "confdefs.h"
-#include <$ac_hdr>
-EOF
-ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:1739: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
-ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
-if test -z "$ac_err"; then
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=yes"
-else
- echo "$ac_err" >&5
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=no"
-fi
-rm -f conftest*
-fi
-if eval "test \"`echo '$ac_cv_header_'$ac_safe`\" = yes"; then
- echo "$ac_t""yes" 1>&6
- ac_tr_hdr=HAVE_`echo $ac_hdr | sed 'y%abcdefghijklmnopqrstuvwxyz./-%ABCDEFGHIJKLMNOPQRSTUVWXYZ___%'`
- cat >> confdefs.h <<EOF
-#define $ac_tr_hdr 1
-EOF
-
-else
- echo "$ac_t""no" 1>&6
-fi
-done
-
-for ac_func in getpagesize
-do
-echo $ac_n "checking for $ac_func""... $ac_c" 1>&6
-echo "configure:1768: checking for $ac_func" >&5
-if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1773 "configure"
-#include "confdefs.h"
-/* System header to define __stub macros and hopefully few prototypes,
- which can conflict with char $ac_func(); below. */
-#include <assert.h>
-/* Override any gcc2 internal prototype to avoid an error. */
-/* We use char because int might match the return type of a gcc2
- builtin and then its argument prototype would still apply. */
-char $ac_func();
-
-int main() {
-
-/* The GNU C library defines this for functions which it implements
- to always fail with ENOSYS. Some functions are actually named
- something starting with __ and the normal name is an alias. */
-#if defined (__stub_$ac_func) || defined (__stub___$ac_func)
-choke me
-#else
-$ac_func();
-#endif
-
-; return 0; }
-EOF
-if { (eval echo configure:1796: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=yes"
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=no"
-fi
-rm -f conftest*
-fi
-
-if eval "test \"`echo '$ac_cv_func_'$ac_func`\" = yes"; then
- echo "$ac_t""yes" 1>&6
- ac_tr_func=HAVE_`echo $ac_func | tr 'abcdefghijklmnopqrstuvwxyz' 'ABCDEFGHIJKLMNOPQRSTUVWXYZ'`
- cat >> confdefs.h <<EOF
-#define $ac_tr_func 1
-EOF
-
-else
- echo "$ac_t""no" 1>&6
-fi
-done
-
-echo $ac_n "checking for working mmap""... $ac_c" 1>&6
-echo "configure:1821: checking for working mmap" >&5
-if eval "test \"`echo '$''{'ac_cv_func_mmap_fixed_mapped'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- if test "$cross_compiling" = yes; then
- ac_cv_func_mmap_fixed_mapped=no
-else
- cat > conftest.$ac_ext <<EOF
-#line 1829 "configure"
-#include "confdefs.h"
-
-/* Thanks to Mike Haertel and Jim Avera for this test.
- Here is a matrix of mmap possibilities:
- mmap private not fixed
- mmap private fixed at somewhere currently unmapped
- mmap private fixed at somewhere already mapped
- mmap shared not fixed
- mmap shared fixed at somewhere currently unmapped
- mmap shared fixed at somewhere already mapped
- For private mappings, we should verify that changes cannot be read()
- back from the file, nor mmap's back from the file at a different
- address. (There have been systems where private was not correctly
- implemented like the infamous i386 svr4.0, and systems where the
- VM page cache was not coherent with the filesystem buffer cache
- like early versions of FreeBSD and possibly contemporary NetBSD.)
- For shared mappings, we should conversely verify that changes get
- propogated back to all the places they're supposed to be.
-
- Grep wants private fixed already mapped.
- The main things grep needs to know about mmap are:
- * does it exist and is it safe to write into the mmap'd area
- * how to use it (BSD variants) */
-#include <sys/types.h>
-#include <fcntl.h>
-#include <sys/mman.h>
-
-/* This mess was copied from the GNU getpagesize.h. */
-#ifndef HAVE_GETPAGESIZE
-# ifdef HAVE_UNISTD_H
-# include <unistd.h>
-# endif
-
-/* Assume that all systems that can run configure have sys/param.h. */
-# ifndef HAVE_SYS_PARAM_H
-# define HAVE_SYS_PARAM_H 1
-# endif
-
-# ifdef _SC_PAGESIZE
-# define getpagesize() sysconf(_SC_PAGESIZE)
-# else /* no _SC_PAGESIZE */
-# ifdef HAVE_SYS_PARAM_H
-# include <sys/param.h>
-# ifdef EXEC_PAGESIZE
-# define getpagesize() EXEC_PAGESIZE
-# else /* no EXEC_PAGESIZE */
-# ifdef NBPG
-# define getpagesize() NBPG * CLSIZE
-# ifndef CLSIZE
-# define CLSIZE 1
-# endif /* no CLSIZE */
-# else /* no NBPG */
-# ifdef NBPC
-# define getpagesize() NBPC
-# else /* no NBPC */
-# ifdef PAGESIZE
-# define getpagesize() PAGESIZE
-# endif /* PAGESIZE */
-# endif /* no NBPC */
-# endif /* no NBPG */
-# endif /* no EXEC_PAGESIZE */
-# else /* no HAVE_SYS_PARAM_H */
-# define getpagesize() 8192 /* punt totally */
-# endif /* no HAVE_SYS_PARAM_H */
-# endif /* no _SC_PAGESIZE */
-
-#endif /* no HAVE_GETPAGESIZE */
-
-#ifdef __cplusplus
-extern "C" { void *malloc(unsigned); }
-#else
-char *malloc();
-#endif
-
-int
-main()
-{
- char *data, *data2, *data3;
- int i, pagesize;
- int fd;
-
- pagesize = getpagesize();
-
- /*
- * First, make a file with some known garbage in it.
- */
- data = malloc(pagesize);
- if (!data)
- exit(1);
- for (i = 0; i < pagesize; ++i)
- *(data + i) = rand();
- umask(0);
- fd = creat("conftestmmap", 0600);
- if (fd < 0)
- exit(1);
- if (write(fd, data, pagesize) != pagesize)
- exit(1);
- close(fd);
-
- /*
- * Next, try to mmap the file at a fixed address which
- * already has something else allocated at it. If we can,
- * also make sure that we see the same garbage.
- */
- fd = open("conftestmmap", O_RDWR);
- if (fd < 0)
- exit(1);
- data2 = malloc(2 * pagesize);
- if (!data2)
- exit(1);
- data2 += (pagesize - ((int) data2 & (pagesize - 1))) & (pagesize - 1);
- if (data2 != mmap(data2, pagesize, PROT_READ | PROT_WRITE,
- MAP_PRIVATE | MAP_FIXED, fd, 0L))
- exit(1);
- for (i = 0; i < pagesize; ++i)
- if (*(data + i) != *(data2 + i))
- exit(1);
-
- /*
- * Finally, make sure that changes to the mapped area
- * do not percolate back to the file as seen by read().
- * (This is a bug on some variants of i386 svr4.0.)
- */
- for (i = 0; i < pagesize; ++i)
- *(data2 + i) = *(data2 + i) + 1;
- data3 = malloc(pagesize);
- if (!data3)
- exit(1);
- if (read(fd, data3, pagesize) != pagesize)
- exit(1);
- for (i = 0; i < pagesize; ++i)
- if (*(data + i) != *(data3 + i))
- exit(1);
- close(fd);
- unlink("conftestmmap");
- exit(0);
-}
-
-EOF
-if { (eval echo configure:1969: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null
-then
- ac_cv_func_mmap_fixed_mapped=yes
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -fr conftest*
- ac_cv_func_mmap_fixed_mapped=no
-fi
-rm -fr conftest*
-fi
-
-fi
-
-echo "$ac_t""$ac_cv_func_mmap_fixed_mapped" 1>&6
-if test $ac_cv_func_mmap_fixed_mapped = yes; then
- cat >> confdefs.h <<\EOF
-#define HAVE_MMAP 1
-EOF
-
-fi
-
-
- for ac_hdr in argz.h limits.h locale.h nl_types.h malloc.h string.h \
-unistd.h values.h sys/param.h
-do
-ac_safe=`echo "$ac_hdr" | sed 'y%./+-%__p_%'`
-echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6
-echo "configure:1997: checking for $ac_hdr" >&5
-if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 2002 "configure"
-#include "confdefs.h"
-#include <$ac_hdr>
-EOF
-ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:2007: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
-ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
-if test -z "$ac_err"; then
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=yes"
-else
- echo "$ac_err" >&5
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=no"
-fi
-rm -f conftest*
-fi
-if eval "test \"`echo '$ac_cv_header_'$ac_safe`\" = yes"; then
- echo "$ac_t""yes" 1>&6
- ac_tr_hdr=HAVE_`echo $ac_hdr | sed 'y%abcdefghijklmnopqrstuvwxyz./-%ABCDEFGHIJKLMNOPQRSTUVWXYZ___%'`
- cat >> confdefs.h <<EOF
-#define $ac_tr_hdr 1
-EOF
-
-else
- echo "$ac_t""no" 1>&6
-fi
-done
-
- for ac_func in getcwd munmap putenv setenv setlocale strchr strcasecmp \
-__argz_count __argz_stringify __argz_next
-do
-echo $ac_n "checking for $ac_func""... $ac_c" 1>&6
-echo "configure:2037: checking for $ac_func" >&5
-if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 2042 "configure"
-#include "confdefs.h"
-/* System header to define __stub macros and hopefully few prototypes,
- which can conflict with char $ac_func(); below. */
-#include <assert.h>
-/* Override any gcc2 internal prototype to avoid an error. */
-/* We use char because int might match the return type of a gcc2
- builtin and then its argument prototype would still apply. */
-char $ac_func();
-
-int main() {
-
-/* The GNU C library defines this for functions which it implements
- to always fail with ENOSYS. Some functions are actually named
- something starting with __ and the normal name is an alias. */
-#if defined (__stub_$ac_func) || defined (__stub___$ac_func)
-choke me
-#else
-$ac_func();
-#endif
-
-; return 0; }
-EOF
-if { (eval echo configure:2065: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=yes"
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=no"
-fi
-rm -f conftest*
-fi
-
-if eval "test \"`echo '$ac_cv_func_'$ac_func`\" = yes"; then
- echo "$ac_t""yes" 1>&6
- ac_tr_func=HAVE_`echo $ac_func | tr 'abcdefghijklmnopqrstuvwxyz' 'ABCDEFGHIJKLMNOPQRSTUVWXYZ'`
- cat >> confdefs.h <<EOF
-#define $ac_tr_func 1
-EOF
-
-else
- echo "$ac_t""no" 1>&6
-fi
-done
-
-
- if test "${ac_cv_func_stpcpy+set}" != "set"; then
- for ac_func in stpcpy
-do
-echo $ac_n "checking for $ac_func""... $ac_c" 1>&6
-echo "configure:2094: checking for $ac_func" >&5
-if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 2099 "configure"
-#include "confdefs.h"
-/* System header to define __stub macros and hopefully few prototypes,
- which can conflict with char $ac_func(); below. */
-#include <assert.h>
-/* Override any gcc2 internal prototype to avoid an error. */
-/* We use char because int might match the return type of a gcc2
- builtin and then its argument prototype would still apply. */
-char $ac_func();
-
-int main() {
-
-/* The GNU C library defines this for functions which it implements
- to always fail with ENOSYS. Some functions are actually named
- something starting with __ and the normal name is an alias. */
-#if defined (__stub_$ac_func) || defined (__stub___$ac_func)
-choke me
-#else
-$ac_func();
-#endif
-
-; return 0; }
-EOF
-if { (eval echo configure:2122: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=yes"
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=no"
-fi
-rm -f conftest*
-fi
-
-if eval "test \"`echo '$ac_cv_func_'$ac_func`\" = yes"; then
- echo "$ac_t""yes" 1>&6
- ac_tr_func=HAVE_`echo $ac_func | tr 'abcdefghijklmnopqrstuvwxyz' 'ABCDEFGHIJKLMNOPQRSTUVWXYZ'`
- cat >> confdefs.h <<EOF
-#define $ac_tr_func 1
-EOF
-
-else
- echo "$ac_t""no" 1>&6
-fi
-done
-
- fi
- if test "${ac_cv_func_stpcpy}" = "yes"; then
- cat >> confdefs.h <<\EOF
-#define HAVE_STPCPY 1
-EOF
-
- fi
-
- if test $ac_cv_header_locale_h = yes; then
- echo $ac_n "checking for LC_MESSAGES""... $ac_c" 1>&6
-echo "configure:2156: checking for LC_MESSAGES" >&5
-if eval "test \"`echo '$''{'am_cv_val_LC_MESSAGES'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 2161 "configure"
-#include "confdefs.h"
-#include <locale.h>
-int main() {
-return LC_MESSAGES
-; return 0; }
-EOF
-if { (eval echo configure:2168: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- rm -rf conftest*
- am_cv_val_LC_MESSAGES=yes
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- am_cv_val_LC_MESSAGES=no
-fi
-rm -f conftest*
-fi
-
-echo "$ac_t""$am_cv_val_LC_MESSAGES" 1>&6
- if test $am_cv_val_LC_MESSAGES = yes; then
- cat >> confdefs.h <<\EOF
-#define HAVE_LC_MESSAGES 1
-EOF
-
- fi
- fi
- echo $ac_n "checking whether NLS is requested""... $ac_c" 1>&6
-echo "configure:2189: checking whether NLS is requested" >&5
- # Check whether --enable-nls or --disable-nls was given.
-if test "${enable_nls+set}" = set; then
- enableval="$enable_nls"
- USE_NLS=$enableval
-else
- USE_NLS=yes
-fi
-
- echo "$ac_t""$USE_NLS" 1>&6
-
-
- USE_INCLUDED_LIBINTL=no
-
- if test "$USE_NLS" = "yes"; then
- cat >> confdefs.h <<\EOF
-#define ENABLE_NLS 1
-EOF
-
- echo $ac_n "checking whether included gettext is requested""... $ac_c" 1>&6
-echo "configure:2209: checking whether included gettext is requested" >&5
- # Check whether --with-included-gettext or --without-included-gettext was given.
-if test "${with_included_gettext+set}" = set; then
- withval="$with_included_gettext"
- nls_cv_force_use_gnu_gettext=$withval
-else
- nls_cv_force_use_gnu_gettext=no
-fi
-
- echo "$ac_t""$nls_cv_force_use_gnu_gettext" 1>&6
-
- nls_cv_use_gnu_gettext="$nls_cv_force_use_gnu_gettext"
- if test "$nls_cv_force_use_gnu_gettext" != "yes"; then
- nls_cv_header_intl=
- nls_cv_header_libgt=
- CATOBJEXT=NONE
-
- ac_safe=`echo "libintl.h" | sed 'y%./+-%__p_%'`
-echo $ac_n "checking for libintl.h""... $ac_c" 1>&6
-echo "configure:2228: checking for libintl.h" >&5
-if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 2233 "configure"
-#include "confdefs.h"
-#include <libintl.h>
-EOF
-ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:2238: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
-ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
-if test -z "$ac_err"; then
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=yes"
-else
- echo "$ac_err" >&5
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=no"
-fi
-rm -f conftest*
-fi
-if eval "test \"`echo '$ac_cv_header_'$ac_safe`\" = yes"; then
- echo "$ac_t""yes" 1>&6
- echo $ac_n "checking for gettext in libc""... $ac_c" 1>&6
-echo "configure:2255: checking for gettext in libc" >&5
-if eval "test \"`echo '$''{'gt_cv_func_gettext_libc'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 2260 "configure"
-#include "confdefs.h"
-#include <libintl.h>
-int main() {
-return (int) gettext ("")
-; return 0; }
-EOF
-if { (eval echo configure:2267: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- rm -rf conftest*
- gt_cv_func_gettext_libc=yes
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- gt_cv_func_gettext_libc=no
-fi
-rm -f conftest*
-fi
-
-echo "$ac_t""$gt_cv_func_gettext_libc" 1>&6
-
- if test "$gt_cv_func_gettext_libc" != "yes"; then
- echo $ac_n "checking for bindtextdomain in -lintl""... $ac_c" 1>&6
-echo "configure:2283: checking for bindtextdomain in -lintl" >&5
-ac_lib_var=`echo intl'_'bindtextdomain | sed 'y%./+-%__p_%'`
-if eval "test \"`echo '$''{'ac_cv_lib_$ac_lib_var'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- ac_save_LIBS="$LIBS"
-LIBS="-lintl $LIBS"
-cat > conftest.$ac_ext <<EOF
-#line 2291 "configure"
-#include "confdefs.h"
-/* Override any gcc2 internal prototype to avoid an error. */
-/* We use char because int might match the return type of a gcc2
- builtin and then its argument prototype would still apply. */
-char bindtextdomain();
-
-int main() {
-bindtextdomain()
-; return 0; }
-EOF
-if { (eval echo configure:2302: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- rm -rf conftest*
- eval "ac_cv_lib_$ac_lib_var=yes"
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_lib_$ac_lib_var=no"
-fi
-rm -f conftest*
-LIBS="$ac_save_LIBS"
-
-fi
-if eval "test \"`echo '$ac_cv_lib_'$ac_lib_var`\" = yes"; then
- echo "$ac_t""yes" 1>&6
- echo $ac_n "checking for gettext in libintl""... $ac_c" 1>&6
-echo "configure:2318: checking for gettext in libintl" >&5
-if eval "test \"`echo '$''{'gt_cv_func_gettext_libintl'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 2323 "configure"
-#include "confdefs.h"
-
-int main() {
-return (int) gettext ("")
-; return 0; }
-EOF
-if { (eval echo configure:2330: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- rm -rf conftest*
- gt_cv_func_gettext_libintl=yes
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- gt_cv_func_gettext_libintl=no
-fi
-rm -f conftest*
-fi
-
-echo "$ac_t""$gt_cv_func_gettext_libintl" 1>&6
-else
- echo "$ac_t""no" 1>&6
-fi
-
- fi
-
- if test "$gt_cv_func_gettext_libc" = "yes" \
- || test "$gt_cv_func_gettext_libintl" = "yes"; then
- cat >> confdefs.h <<\EOF
-#define HAVE_GETTEXT 1
-EOF
-
- # Extract the first word of "msgfmt", so it can be a program name with args.
-set dummy msgfmt; ac_word=$2
-echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:2358: checking for $ac_word" >&5
-if eval "test \"`echo '$''{'ac_cv_path_MSGFMT'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- case "$MSGFMT" in
- /*)
- ac_cv_path_MSGFMT="$MSGFMT" # Let the user override the test with a path.
- ;;
- *)
- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS="${IFS}:"
- for ac_dir in $PATH; do
- test -z "$ac_dir" && ac_dir=.
- if test -f $ac_dir/$ac_word; then
- if test -z "`$ac_dir/$ac_word -h 2>&1 | grep 'dv '`"; then
- ac_cv_path_MSGFMT="$ac_dir/$ac_word"
- break
- fi
- fi
- done
- IFS="$ac_save_ifs"
- test -z "$ac_cv_path_MSGFMT" && ac_cv_path_MSGFMT="no"
- ;;
-esac
-fi
-MSGFMT="$ac_cv_path_MSGFMT"
-if test -n "$MSGFMT"; then
- echo "$ac_t""$MSGFMT" 1>&6
-else
- echo "$ac_t""no" 1>&6
-fi
- if test "$MSGFMT" != "no"; then
- for ac_func in dcgettext
-do
-echo $ac_n "checking for $ac_func""... $ac_c" 1>&6
-echo "configure:2392: checking for $ac_func" >&5
-if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 2397 "configure"
-#include "confdefs.h"
-/* System header to define __stub macros and hopefully few prototypes,
- which can conflict with char $ac_func(); below. */
-#include <assert.h>
-/* Override any gcc2 internal prototype to avoid an error. */
-/* We use char because int might match the return type of a gcc2
- builtin and then its argument prototype would still apply. */
-char $ac_func();
-
-int main() {
-
-/* The GNU C library defines this for functions which it implements
- to always fail with ENOSYS. Some functions are actually named
- something starting with __ and the normal name is an alias. */
-#if defined (__stub_$ac_func) || defined (__stub___$ac_func)
-choke me
-#else
-$ac_func();
-#endif
-
-; return 0; }
-EOF
-if { (eval echo configure:2420: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=yes"
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=no"
-fi
-rm -f conftest*
-fi
-
-if eval "test \"`echo '$ac_cv_func_'$ac_func`\" = yes"; then
- echo "$ac_t""yes" 1>&6
- ac_tr_func=HAVE_`echo $ac_func | tr 'abcdefghijklmnopqrstuvwxyz' 'ABCDEFGHIJKLMNOPQRSTUVWXYZ'`
- cat >> confdefs.h <<EOF
-#define $ac_tr_func 1
-EOF
-
-else
- echo "$ac_t""no" 1>&6
-fi
-done
-
- # Extract the first word of "gmsgfmt", so it can be a program name with args.
-set dummy gmsgfmt; ac_word=$2
-echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:2447: checking for $ac_word" >&5
-if eval "test \"`echo '$''{'ac_cv_path_GMSGFMT'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- case "$GMSGFMT" in
- /*)
- ac_cv_path_GMSGFMT="$GMSGFMT" # Let the user override the test with a path.
- ;;
- ?:/*)
- ac_cv_path_GMSGFMT="$GMSGFMT" # Let the user override the test with a dos path.
- ;;
- *)
- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
- ac_dummy="$PATH"
- for ac_dir in $ac_dummy; do
- test -z "$ac_dir" && ac_dir=.
- if test -f $ac_dir/$ac_word; then
- ac_cv_path_GMSGFMT="$ac_dir/$ac_word"
- break
- fi
- done
- IFS="$ac_save_ifs"
- test -z "$ac_cv_path_GMSGFMT" && ac_cv_path_GMSGFMT="$MSGFMT"
- ;;
-esac
-fi
-GMSGFMT="$ac_cv_path_GMSGFMT"
-if test -n "$GMSGFMT"; then
- echo "$ac_t""$GMSGFMT" 1>&6
-else
- echo "$ac_t""no" 1>&6
-fi
-
- # Extract the first word of "xgettext", so it can be a program name with args.
-set dummy xgettext; ac_word=$2
-echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:2483: checking for $ac_word" >&5
-if eval "test \"`echo '$''{'ac_cv_path_XGETTEXT'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- case "$XGETTEXT" in
- /*)
- ac_cv_path_XGETTEXT="$XGETTEXT" # Let the user override the test with a path.
- ;;
- *)
- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS="${IFS}:"
- for ac_dir in $PATH; do
- test -z "$ac_dir" && ac_dir=.
- if test -f $ac_dir/$ac_word; then
- if test -z "`$ac_dir/$ac_word -h 2>&1 | grep '(HELP)'`"; then
- ac_cv_path_XGETTEXT="$ac_dir/$ac_word"
- break
- fi
- fi
- done
- IFS="$ac_save_ifs"
- test -z "$ac_cv_path_XGETTEXT" && ac_cv_path_XGETTEXT=":"
- ;;
-esac
-fi
-XGETTEXT="$ac_cv_path_XGETTEXT"
-if test -n "$XGETTEXT"; then
- echo "$ac_t""$XGETTEXT" 1>&6
-else
- echo "$ac_t""no" 1>&6
-fi
-
- cat > conftest.$ac_ext <<EOF
-#line 2515 "configure"
-#include "confdefs.h"
-
-int main() {
-extern int _nl_msg_cat_cntr;
- return _nl_msg_cat_cntr
-; return 0; }
-EOF
-if { (eval echo configure:2523: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- rm -rf conftest*
- CATOBJEXT=.gmo
- DATADIRNAME=share
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- CATOBJEXT=.mo
- DATADIRNAME=lib
-fi
-rm -f conftest*
- INSTOBJEXT=.mo
- fi
- fi
-
-else
- echo "$ac_t""no" 1>&6
-fi
-
-
-
- if test "$CATOBJEXT" = "NONE"; then
- nls_cv_use_gnu_gettext=yes
- fi
- fi
-
- if test "$nls_cv_use_gnu_gettext" = "yes"; then
- INTLOBJS="\$(GETTOBJS)"
- # Extract the first word of "msgfmt", so it can be a program name with args.
-set dummy msgfmt; ac_word=$2
-echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:2555: checking for $ac_word" >&5
-if eval "test \"`echo '$''{'ac_cv_path_MSGFMT'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- case "$MSGFMT" in
- /*)
- ac_cv_path_MSGFMT="$MSGFMT" # Let the user override the test with a path.
- ;;
- *)
- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS="${IFS}:"
- for ac_dir in $PATH; do
- test -z "$ac_dir" && ac_dir=.
- if test -f $ac_dir/$ac_word; then
- if test -z "`$ac_dir/$ac_word -h 2>&1 | grep 'dv '`"; then
- ac_cv_path_MSGFMT="$ac_dir/$ac_word"
- break
- fi
- fi
- done
- IFS="$ac_save_ifs"
- test -z "$ac_cv_path_MSGFMT" && ac_cv_path_MSGFMT="msgfmt"
- ;;
-esac
-fi
-MSGFMT="$ac_cv_path_MSGFMT"
-if test -n "$MSGFMT"; then
- echo "$ac_t""$MSGFMT" 1>&6
-else
- echo "$ac_t""no" 1>&6
-fi
-
- # Extract the first word of "gmsgfmt", so it can be a program name with args.
-set dummy gmsgfmt; ac_word=$2
-echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:2589: checking for $ac_word" >&5
-if eval "test \"`echo '$''{'ac_cv_path_GMSGFMT'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- case "$GMSGFMT" in
- /*)
- ac_cv_path_GMSGFMT="$GMSGFMT" # Let the user override the test with a path.
- ;;
- ?:/*)
- ac_cv_path_GMSGFMT="$GMSGFMT" # Let the user override the test with a dos path.
- ;;
- *)
- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
- ac_dummy="$PATH"
- for ac_dir in $ac_dummy; do
- test -z "$ac_dir" && ac_dir=.
- if test -f $ac_dir/$ac_word; then
- ac_cv_path_GMSGFMT="$ac_dir/$ac_word"
- break
- fi
- done
- IFS="$ac_save_ifs"
- test -z "$ac_cv_path_GMSGFMT" && ac_cv_path_GMSGFMT="$MSGFMT"
- ;;
-esac
-fi
-GMSGFMT="$ac_cv_path_GMSGFMT"
-if test -n "$GMSGFMT"; then
- echo "$ac_t""$GMSGFMT" 1>&6
-else
- echo "$ac_t""no" 1>&6
-fi
-
- # Extract the first word of "xgettext", so it can be a program name with args.
-set dummy xgettext; ac_word=$2
-echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:2625: checking for $ac_word" >&5
-if eval "test \"`echo '$''{'ac_cv_path_XGETTEXT'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- case "$XGETTEXT" in
- /*)
- ac_cv_path_XGETTEXT="$XGETTEXT" # Let the user override the test with a path.
- ;;
- *)
- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS="${IFS}:"
- for ac_dir in $PATH; do
- test -z "$ac_dir" && ac_dir=.
- if test -f $ac_dir/$ac_word; then
- if test -z "`$ac_dir/$ac_word -h 2>&1 | grep '(HELP)'`"; then
- ac_cv_path_XGETTEXT="$ac_dir/$ac_word"
- break
- fi
- fi
- done
- IFS="$ac_save_ifs"
- test -z "$ac_cv_path_XGETTEXT" && ac_cv_path_XGETTEXT=":"
- ;;
-esac
-fi
-XGETTEXT="$ac_cv_path_XGETTEXT"
-if test -n "$XGETTEXT"; then
- echo "$ac_t""$XGETTEXT" 1>&6
-else
- echo "$ac_t""no" 1>&6
-fi
-
-
- USE_INCLUDED_LIBINTL=yes
- CATOBJEXT=.gmo
- INSTOBJEXT=.mo
- DATADIRNAME=share
- INTLDEPS='$(top_builddir)/../intl/libintl.a'
- INTLLIBS=$INTLDEPS
- LIBS=`echo $LIBS | sed -e 's/-lintl//'`
- nls_cv_header_intl=libintl.h
- nls_cv_header_libgt=libgettext.h
- fi
-
- if test "$XGETTEXT" != ":"; then
- if $XGETTEXT --omit-header /dev/null 2> /dev/null; then
- : ;
- else
- echo "$ac_t""found xgettext programs is not GNU xgettext; ignore it" 1>&6
- XGETTEXT=":"
- fi
- fi
-
- # We need to process the po/ directory.
- POSUB=po
- else
- DATADIRNAME=share
- nls_cv_header_intl=libintl.h
- nls_cv_header_libgt=libgettext.h
- fi
-
- # If this is used in GNU gettext we have to set USE_NLS to `yes'
- # because some of the sources are only built for this goal.
- if test "$PACKAGE" = gettext; then
- USE_NLS=yes
- USE_INCLUDED_LIBINTL=yes
- fi
-
- for lang in $ALL_LINGUAS; do
- GMOFILES="$GMOFILES $lang.gmo"
- POFILES="$POFILES $lang.po"
- done
-
-
-
-
-
-
-
-
-
-
-
-
-
-
- if test "x$CATOBJEXT" != "x"; then
- if test "x$ALL_LINGUAS" = "x"; then
- LINGUAS=
- else
- echo $ac_n "checking for catalogs to be installed""... $ac_c" 1>&6
-echo "configure:2715: checking for catalogs to be installed" >&5
- NEW_LINGUAS=
- for lang in ${LINGUAS=$ALL_LINGUAS}; do
- case "$ALL_LINGUAS" in
- *$lang*) NEW_LINGUAS="$NEW_LINGUAS $lang" ;;
- esac
- done
- LINGUAS=$NEW_LINGUAS
- echo "$ac_t""$LINGUAS" 1>&6
- fi
-
- if test -n "$LINGUAS"; then
- for lang in $LINGUAS; do CATALOGS="$CATALOGS $lang$CATOBJEXT"; done
- fi
- fi
-
- if test $ac_cv_header_locale_h = yes; then
- INCLUDE_LOCALE_H="#include <locale.h>"
- else
- INCLUDE_LOCALE_H="\
-/* The system does not provide the header <locale.h>. Take care yourself. */"
- fi
-
-
- if test -f $srcdir/po2tbl.sed.in; then
- if test "$CATOBJEXT" = ".cat"; then
- ac_safe=`echo "linux/version.h" | sed 'y%./+-%__p_%'`
-echo $ac_n "checking for linux/version.h""... $ac_c" 1>&6
-echo "configure:2743: checking for linux/version.h" >&5
-if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 2748 "configure"
-#include "confdefs.h"
-#include <linux/version.h>
-EOF
-ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:2753: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
-ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
-if test -z "$ac_err"; then
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=yes"
-else
- echo "$ac_err" >&5
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=no"
-fi
-rm -f conftest*
-fi
-if eval "test \"`echo '$ac_cv_header_'$ac_safe`\" = yes"; then
- echo "$ac_t""yes" 1>&6
- msgformat=linux
-else
- echo "$ac_t""no" 1>&6
-msgformat=xopen
-fi
-
-
- sed -e '/^#/d' $srcdir/$msgformat-msg.sed > po2msg.sed
- fi
- sed -e '/^#.*[^\\]$/d' -e '/^#$/d' \
- $srcdir/po2tbl.sed.in > po2tbl.sed
- fi
-
- if test "$PACKAGE" = "gettext"; then
- GT_NO="#NO#"
- GT_YES=
- else
- GT_NO=
- GT_YES="#YES#"
- fi
-
-
-
- MKINSTALLDIRS="\$(srcdir)/../../mkinstalldirs"
-
-
- l=
-
-
- if test -d $srcdir/po; then
- test -d po || mkdir po
- if test "x$srcdir" != "x."; then
- if test "x`echo $srcdir | sed 's@/.*@@'`" = "x"; then
- posrcprefix="$srcdir/"
- else
- posrcprefix="../$srcdir/"
- fi
- else
- posrcprefix="../"
- fi
- rm -f po/POTFILES
- sed -e "/^#/d" -e "/^\$/d" -e "s,.*, $posrcprefix& \\\\," -e "\$s/\(.*\) \\\\/\1/" \
- < $srcdir/po/POTFILES.in > po/POTFILES
- fi
-
-
-
-# Check whether --enable-sim-alignment or --disable-sim-alignment was given.
-if test "${enable_sim_alignment+set}" = set; then
- enableval="$enable_sim_alignment"
- case "${enableval}" in
- yes | strict | STRICT) sim_alignment="-DWITH_ALIGNMENT=STRICT_ALIGNMENT";;
- no | nonstrict | NONSTRICT) sim_alignment="-DWITH_ALIGNMENT=NONSTRICT_ALIGNMENT";;
- 0 | default | DEFAULT) sim_alignment="-DWITH_ALIGNMENT=0";;
- *) { echo "configure: error: "Unknown value $enableval passed to --enable-sim-alignment"" 1>&2; exit 1; }; sim_alignment="";;
-esac
-if test x"$silent" != x"yes" && test x"$sim_alignment" != x""; then
- echo "Setting alignment flags = $sim_alignment" 6>&1
-fi
-else
- sim_alignment=""
-fi
-
-
-# Check whether --enable-sim-assert or --disable-sim-assert was given.
-if test "${enable_sim_assert+set}" = set; then
- enableval="$enable_sim_assert"
- case "${enableval}" in
- yes) sim_assert="-DWITH_ASSERT=1";;
- no) sim_assert="-DWITH_ASSERT=0";;
- *) { echo "configure: error: "--enable-sim-assert does not take a value"" 1>&2; exit 1; }; sim_assert="";;
-esac
-if test x"$silent" != x"yes" && test x"$sim_assert" != x""; then
- echo "Setting assert flags = $sim_assert" 6>&1
-fi
-else
- sim_assert=""
-fi
-
-
-# Check whether --enable-sim-bitsize or --disable-sim-bitsize was given.
-if test "${enable_sim_bitsize+set}" = set; then
- enableval="$enable_sim_bitsize"
- case "${enableval}" in
- 32|64) sim_bitsize="-DWITH_TARGET_WORD_BITSIZE=$enableval";;
- *) { echo "configure: error: "--enable-sim-bitsize was given $enableval. Expected 32 or 64"" 1>&2; exit 1; }; sim_bitsize="";;
-esac
-if test x"$silent" != x"yes" && test x"$sim_bitsize" != x""; then
- echo "Setting bitsize flags = $sim_bitsize" 6>&1
-fi
-else
- sim_bitsize=""
-fi
-
-
-# Check whether --enable-sim-bswap or --disable-sim-bswap was given.
-if test "${enable_sim_bswap+set}" = set; then
- enableval="$enable_sim_bswap"
- case "${enableval}" in
- yes) sim_bswap="-DWITH_BSWAP=1";;
- no) sim_bswap="-DWITH_BSWAP=0";;
- *) { echo "configure: error: "--enable-sim-bswap does not take a value"" 1>&2; exit 1; }; sim_bswap="";;
-esac
-if test x"$silent" != x"yes" && test x"$sim_bswap" != x""; then
- echo "Setting bswap flags = $sim_bswap" 6>&1
-fi
-else
- sim_bswap=""
-fi
-
-
-# Check whether --enable-sim-cflags or --disable-sim-cflags was given.
-if test "${enable_sim_cflags+set}" = set; then
- enableval="$enable_sim_cflags"
- case "${enableval}" in
- yes) sim_cflags="-O2 -fomit-frame-pointer";;
- no) sim_cflags="";;
- *) sim_cflags=`echo "${enableval}" | sed -e "s/,/ /g"`;;
-esac
-if test x"$silent" != x"yes" && test x"$sim_cflags" != x""; then
- echo "Setting sim cflags = $sim_cflags" 6>&1
-fi
-else
- sim_cflags=""
-fi
-
-
-# Check whether --enable-sim-config or --disable-sim-config was given.
-if test "${enable_sim_config+set}" = set; then
- enableval="$enable_sim_config"
- case "${enableval}" in
- yes|no) { echo "configure: error: "No value supplied for --enable-sim-config=file"" 1>&2; exit 1; };;
- *) if test -f "${srcdir}/${enableval}"; then
- sim_config="${enableval}";
- elif test -f "${srcdir}/${enableval}-config.h"; then
- sim_config="${enableval}-config.h"
- else
- { echo "configure: error: "Config file $enableval was not found"" 1>&2; exit 1; };
- sim_config=std-config.h
- fi;;
-esac
-if test x"$silent" != x"yes" && test x"$sim_config" != x""; then
- echo "Setting config flags = $sim_config" 6>&1
-fi
-else
- sim_config="std-config.h"
-if test x"$silent" != x"yes"; then
- echo "Setting config flags = $sim_config" 6>&1
-fi
-fi
-
-
-# Check whether --enable-sim-decode-mechanism or --disable-sim-decode-mechanism was given.
-if test "${enable_sim_decode_mechanism+set}" = set; then
- enableval="$enable_sim_decode_mechanism"
- case "${enableval}" in
- yes|no) { echo "configure: error: "No value supplied for --enable-sim-decode-mechanism=file"" 1>&2; exit 1; };;
- array|switch|padded-switch|goto-switch) sim_decode_mechanism="-T ${enableval}";;
- *) { echo "configure: error: "File $enableval is not an opcode rules file"" 1>&2; exit 1; };
- sim_decode_mechanism="switch";;
-esac
-if test x"$silent" != x"yes" && test x"$sim_decode_mechanism" != x""; then
- echo "Setting decode mechanism flags = $sim_decode_mechanism" 6>&1
-fi
-else
- sim_decode_mechanism=""
-if test x"$silent" != x"yes"; then
- echo "Setting decode mechanism flags = $sim_decode_mechanism"
-fi
-fi
-
-
-# Check whether --enable-sim-default-model or --disable-sim-default-model was given.
-if test "${enable_sim_default_model+set}" = set; then
- enableval="$enable_sim_default_model"
- case "${enableval}" in
- yes|no) { echo "configure: error: "No value supplied for --enable-sim-default-model=model"" 1>&2; exit 1; };;
- *) sim_default_model="-DWITH_DEFAULT_MODEL=${enableval}";;
-esac
-if test x"$silent" != x"yes" && test x"$sim_default_model" != x""; then
- echo "Setting default-model flags = $sim_default_model" 6>&1
-fi
-else
- sim_default_model=""
-fi
-
-
-# Check whether --enable-sim-duplicate or --disable-sim-duplicate was given.
-if test "${enable_sim_duplicate+set}" = set; then
- enableval="$enable_sim_duplicate"
- case "${enableval}" in
- yes) sim_dup="-E";;
- no) sim_dup="";;
- *) { echo "configure: error: "--enable-sim-duplicate does not take a value"" 1>&2; exit 1; }; sim_dup="";;
-esac
-if test x"$silent" != x"yes" && test x"$sim_dup" != x""; then
- echo "Setting duplicate flags = $sim_dup" 6>&1
-fi
-else
- sim_dup="-E"
-if test x"$silent" != x"yes"; then
- echo "Setting duplicate flags = $sim_dup" 6>&1
-fi
-fi
-
-
-# Check whether --enable-sim-endian or --disable-sim-endian was given.
-if test "${enable_sim_endian+set}" = set; then
- enableval="$enable_sim_endian"
- case "${enableval}" in
- yes) case "$target" in
- *powerpc-*) sim_endian="-DWITH_TARGET_BYTE_ORDER=BIG_ENDIAN";;
- *powerpcle-*) sim_endian="-DWITH_TARGET_BYTE_ORDER=LITTLE_ENDIAN";;
- *) echo "Unknown target $target" 1>&6; sim_endian="-DWITH_TARGET_BYTE_ORDER=0";;
- esac;;
- no) sim_endian="-DWITH_TARGET_BYTE_ORDER=0";;
- b*|B*) sim_endian="-DWITH_TARGET_BYTE_ORDER=BIG_ENDIAN";;
- l*|L*) sim_endian="-DWITH_TARGET_BYTE_ORDER=LITTLE_ENDIAN";;
- *) { echo "configure: error: "Unknown value $enableval for --enable-sim-endian"" 1>&2; exit 1; }; sim_endian="";;
-esac
-if test x"$silent" != x"yes" && test x"$sim_endian" != x""; then
- echo "Setting endian flags = $sim_endian" 6>&1
-fi
-else
- sim_endian=""
-fi
-
-
-# Check whether --enable-sim-env or --disable-sim-env was given.
-if test "${enable_sim_env+set}" = set; then
- enableval="$enable_sim_env"
- case "${enableval}" in
- operating | os | oea) sim_env="-DWITH_ENVIRONMENT=OPERATING_ENVIRONMENT";;
- virtual | vea) sim_env="-DWITH_ENVIRONMENT=VIRTUAL_ENVIRONMENT";;
- user | uea) sim_env="-DWITH_ENVIRONMENT=USER_ENVIRONMENT";;
- no) sim_env="-DWITH_ENVIRONMENT=0";;
- *) { echo "configure: error: "Unknown value $enableval passed to --enable-sim-env"" 1>&2; exit 1; }; sim_env="";;
-esac
-if test x"$silent" != x"yes" && test x"$sim_env" != x""; then
- echo "Setting env flags = $sim_env" 6>&1
-fi
-else
- sim_env=""
-fi
-
-
-# Check whether --enable-sim-filter or --disable-sim-filter was given.
-if test "${enable_sim_filter+set}" = set; then
- enableval="$enable_sim_filter"
- case "${enableval}" in
- yes) { echo "configure: error: "--enable-sim-filter must be specified with a rule to filter or no"" 1>&2; exit 1; }; sim_filter="";;
- no) sim_filter="";;
- *) sim_filter="-F $enableval";;
-esac
-if test x"$silent" != x"yes" && test x"$sim_filter" != x""; then
- echo "Setting filter flags = $sim_filter" 6>&1
-fi
-else
- sim_filter="-F 32,f,o"
-if test x"$silent" != x"yes"; then
- echo "Setting filter flags = $sim_filter" 6>&1
-fi
-fi
-
-
-# Check whether --enable-sim-float or --disable-sim-float was given.
-if test "${enable_sim_float+set}" = set; then
- enableval="$enable_sim_float"
- case "${enableval}" in
- yes | hard) sim_float="-DWITH_FLOATING_POINT=HARD_FLOATING_POINT";;
- no | soft) sim_float="-DWITH_FLOATING_POINT=SOFT_FLOATING_POINT";;
- *) { echo "configure: error: "Unknown value $enableval passed to --enable-sim-float"" 1>&2; exit 1; }; sim_float="";;
-esac
-if test x"$silent" != x"yes" && test x"$sim_float" != x""; then
- echo "Setting float flags = $sim_float" 6>&1
-fi
-else
- sim_float=""
-fi
-
-
-# Check whether --enable-sim-hardware or --disable-sim-hardware was given.
-if test "${enable_sim_hardware+set}" = set; then
- enableval="$enable_sim_hardware"
- hardware="cpu,memory,nvram,iobus,htab,disk,trace,register,vm,init,core,pal,com,eeprom,opic,glue,phb,ide"
-case "${enableval}" in
- yes) ;;
- no) { echo "configure: error: "List of hardware must be specified for --enable-sim-hardware"" 1>&2; exit 1; }; hardware="";;
- ,*) hardware="${hardware}${enableval}";;
- *,) hardware="${enableval}${hardware}";;
- *) hardware="${enableval}"'';;
-esac
-sim_hw_src=`echo $hardware | sed -e 's/,/.c hw_/g' -e 's/^/hw_/' -e s'/$/.c/'`
-sim_hw_obj=`echo $sim_hw_src | sed -e 's/\.c/.o/g'`
-if test x"$silent" != x"yes" && test x"$hardware" != x""; then
- echo "Setting hardware to $sim_hw_src, $sim_hw_obj"
-fi
-else
- hardware="cpu,memory,nvram,iobus,htab,disk,trace,register,vm,init,core,pal,com,eeprom,opic,glue,phb,ide"
-sim_hw_src=`echo $hardware | sed -e 's/,/.c hw_/g' -e 's/^/hw_/' -e s'/$/.c/'`
-sim_hw_obj=`echo $sim_hw_src | sed -e 's/\.c/.o/g'`
-if test x"$silent" != x"yes"; then
- echo "Setting hardware to $sim_hw_src, $sim_hw_obj"
-fi
-fi
-
-
-# Check whether --enable-sim-hostbitsize or --disable-sim-hostbitsize was given.
-if test "${enable_sim_hostbitsize+set}" = set; then
- enableval="$enable_sim_hostbitsize"
- case "${enableval}" in
- 32|64) sim_hostbitsize="-DWITH_HOST_WORD_BITSIZE=$enableval";;
- *) { echo "configure: error: "--enable-sim-hostbitsize was given $enableval. Expected 32 or 64"" 1>&2; exit 1; }; sim_hostbitsize="";;
-esac
-if test x"$silent" != x"yes" && test x"$sim_hostbitsize" != x""; then
- echo "Setting hostbitsize flags = $sim_hostbitsize" 6>&1
-fi
-else
- sim_hostbitsize=""
-fi
-
-
-# Check whether --enable-sim-hostendian or --disable-sim-hostendian was given.
-if test "${enable_sim_hostendian+set}" = set; then
- enableval="$enable_sim_hostendian"
- case "${enableval}" in
- no) sim_hostendian="-DWITH_HOST_BYTE_ORDER=0";;
- b*|B*) sim_hostendian="-DWITH_HOST_BYTE_ORDER=BIG_ENDIAN";;
- l*|L*) sim_hostendian="-DWITH_HOST_BYTE_ORDER=LITTLE_ENDIAN";;
- *) { echo "configure: error: "Unknown value $enableval for --enable-sim-hostendian"" 1>&2; exit 1; }; sim_hostendian="";;
-esac
-if test x"$silent" != x"yes" && test x"$sim_hostendian" != x""; then
- echo "Setting hostendian flags = $sim_hostendian" 6>&1
-fi
-else
-
-if test "x$cross_compiling" = "xno"; then
- echo $ac_n "checking whether byte ordering is bigendian""... $ac_c" 1>&6
-echo "configure:3107: checking whether byte ordering is bigendian" >&5
-if eval "test \"`echo '$''{'ac_cv_c_bigendian'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- ac_cv_c_bigendian=unknown
-# See if sys/param.h defines the BYTE_ORDER macro.
-cat > conftest.$ac_ext <<EOF
-#line 3114 "configure"
-#include "confdefs.h"
-#include <sys/types.h>
-#include <sys/param.h>
-int main() {
-
-#if !BYTE_ORDER || !BIG_ENDIAN || !LITTLE_ENDIAN
- bogus endian macros
-#endif
-; return 0; }
-EOF
-if { (eval echo configure:3125: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
- rm -rf conftest*
- # It does; now see whether it defined to BIG_ENDIAN or not.
-cat > conftest.$ac_ext <<EOF
-#line 3129 "configure"
-#include "confdefs.h"
-#include <sys/types.h>
-#include <sys/param.h>
-int main() {
-
-#if BYTE_ORDER != BIG_ENDIAN
- not big endian
-#endif
-; return 0; }
-EOF
-if { (eval echo configure:3140: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
- rm -rf conftest*
- ac_cv_c_bigendian=yes
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- ac_cv_c_bigendian=no
-fi
-rm -f conftest*
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
-fi
-rm -f conftest*
-if test $ac_cv_c_bigendian = unknown; then
-if test "$cross_compiling" = yes; then
- { echo "configure: error: can not run test program while cross compiling" 1>&2; exit 1; }
-else
- cat > conftest.$ac_ext <<EOF
-#line 3160 "configure"
-#include "confdefs.h"
-main () {
- /* Are we little or big endian? From Harbison&Steele. */
- union
- {
- long l;
- char c[sizeof (long)];
- } u;
- u.l = 1;
- exit (u.c[sizeof (long) - 1] == 1);
-}
-EOF
-if { (eval echo configure:3173: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null
-then
- ac_cv_c_bigendian=no
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -fr conftest*
- ac_cv_c_bigendian=yes
-fi
-rm -fr conftest*
-fi
-
-fi
-fi
-
-echo "$ac_t""$ac_cv_c_bigendian" 1>&6
-if test $ac_cv_c_bigendian = yes; then
- cat >> confdefs.h <<\EOF
-#define WORDS_BIGENDIAN 1
-EOF
-
-fi
-
- if test $ac_cv_c_bigendian = yes; then
- sim_hostendian="-DWITH_HOST_BYTE_ORDER=BIG_ENDIAN"
- else
- sim_hostendian="-DWITH_HOST_BYTE_ORDER=LITTLE_ENDIAN"
- fi
-else
- sim_hostendian="-DWITH_HOST_BYTE_ORDER=0"
-fi
-fi
-
-
-# Check whether --enable-sim-icache or --disable-sim-icache was given.
-if test "${enable_sim_icache+set}" = set; then
- enableval="$enable_sim_icache"
- icache="-R"
- case "${enableval}" in
- yes) icache="1024"; sim_icache="-I $icache";;
- no) sim_icache="-R";;
- *) icache=1024
- sim_icache="-"
- for x in `echo "${enableval}" | sed -e "s/,/ /g"`; do
- case "$x" in
- define) sim_icache="${sim_icache}R";;
- semantic) sim_icache="${sim_icache}C";;
- insn) sim_icache="${sim_icache}S";;
- 0*|1*|2*|3*|4*|5*|6*|7*|8*|9*) icache=$x;;
- *) { echo "configure: error: "Unknown value $x for --enable-sim-icache"" 1>&2; exit 1; }; sim_icache="";;
- esac
- done
- sim_icache="${sim_icache}I $icache";;
-esac
-if test x"$silent" != x"yes" && test x"$icache" != x""; then
- echo "Setting instruction cache size to $icache ($sim_icache)"
-fi
-else
- sim_icache="-CSRI 1024"
-if test x"$silent" != x"yes"; then
- echo "Setting instruction cache size to 1024 ($sim_icache)"
-fi
-fi
-
-
-# Check whether --enable-sim-inline or --disable-sim-inline was given.
-if test "${enable_sim_inline+set}" = set; then
- enableval="$enable_sim_inline"
- sim_inline=""
-case "$enableval" in
- no) sim_inline="-DDEFAULT_INLINE=0";;
- 0) sim_inline="-DDEFAULT_INLINE=0";;
- yes | 2) sim_inline="-DDEFAULT_INLINE=ALL_INLINE";;
- 1) sim_inline="-DDEFAULT_INLINE=INLINE_LOCALS";;
- *) for x in `echo "$enableval" | sed -e "s/,/ /g"`; do
- new_flag=""
- case "$x" in
- *_INLINE=*) new_flag="-D$x";;
- *=*) new_flag=`echo "$x" | sed -e "s/=/_INLINE=/" -e "s/^/-D/"`;;
- *_INLINE) new_flag="-D$x=ALL_INLINE";;
- *) new_flag="-D$x""_INLINE=ALL_INLINE";;
- esac
- if test x"$sim_inline" = x""; then
- sim_inline="$new_flag"
- else
- sim_inline="$sim_inline $new_flag"
- fi
- done;;
-esac
-if test x"$silent" != x"yes" && test x"$sim_inline" != x""; then
- echo "Setting inline flags = $sim_inline" 6>&1
-fi
-else
- if test x"$GCC" != ""; then
- sim_inline="-DDEFAULT_INLINE=INLINE_LOCALS"
- if test x"$silent" != x"yes"; then
- echo "Setting inline flags = $sim_inline" 6>&1
- fi
-else
- sim_inline=""
-fi
-fi
-
-
-# Check whether --enable-sim-jump or --disable-sim-jump was given.
-if test "${enable_sim_jump+set}" = set; then
- enableval="$enable_sim_jump"
- case "${enableval}" in
- yes) sim_jump="-J";;
- no) sim_jump="";;
- *) { echo "configure: error: "--enable-sim-jump does not take a value"" 1>&2; exit 1; }; sim_jump="";;
-esac
-if test x"$silent" != x"yes" && test x"$sim_jump" != x""; then
- echo "Setting jump flag = $sim_jump" 6>&1
-fi
-else
- sim_jump=""
-if test x"$silent" != x"yes"; then
- echo "Setting jump flag = $sim_jump" 6>&1
-fi
-fi
-
-
-# Check whether --enable-sim-line-nr or --disable-sim-line-nr was given.
-if test "${enable_sim_line_nr+set}" = set; then
- enableval="$enable_sim_line_nr"
- case "${enableval}" in
- yes) sim_line_nr="";;
- no) sim_line_nr="-L";;
- *) { echo "configure: error: "--enable-sim-line-nr does not take a value"" 1>&2; exit 1; }; sim_line_nr="";;
-esac
-if test x"$silent" != x"yes" && test x"$sim_line_nr" != x""; then
- echo "Setting warning flags = $sim_line_nr" 6>&1
-fi
-else
- sim_line_nr=""
-fi
-
-
-# Check whether --enable-sim-model or --disable-sim-model was given.
-if test "${enable_sim_model+set}" = set; then
- enableval="$enable_sim_model"
- case "${enableval}" in
- yes|no) { echo "configure: error: "No value supplied for --enable-sim-model=model"" 1>&2; exit 1; };;
- *) sim_model="-DWITH_MODEL=${enableval}";;
-esac
-if test x"$silent" != x"yes" && test x"$sim_model" != x""; then
- echo "Setting model flags = $sim_model" 6>&1
-fi
-else
- sim_model=""
-fi
-
-
-# Check whether --enable-sim-model-issue or --disable-sim-model-issue was given.
-if test "${enable_sim_model_issue+set}" = set; then
- enableval="$enable_sim_model_issue"
- case "${enableval}" in
- yes) sim_model_issue="-DWITH_MODEL_ISSUE=MODEL_ISSUE_PROCESS";;
- no) sim_model_issue="-DWITH_MODEL_ISSUE=MODEL_ISSUE_IGNORE";;
- *) { echo "configure: error: "--enable-sim-model-issue does not take a value"" 1>&2; exit 1; }; sim_model_issue="";;
-esac
-if test x"$silent" != x"yes"; then
- echo "Setting model-issue flags = $sim_model_issue" 6>&1
-fi
-else
- sim_model_issue=""
-fi
-
-
-# Check whether --enable-sim-monitor or --disable-sim-monitor was given.
-if test "${enable_sim_monitor+set}" = set; then
- enableval="$enable_sim_monitor"
- case "${enableval}" in
- yes) sim_monitor="-DWITH_MON='MONITOR_INSTRUCTION_ISSUE | MONITOR_LOAD_STORE_UNIT'";;
- no) sim_monitor="-DWITH_MON=0";;
- instruction) sim_monitor="-DWITH_MON=MONITOR_INSTRUCTION_ISSUE";;
- memory) sim_monitor="-DWITH_MON=MONITOR_LOAD_STORE_UNIT";;
- *) { echo "configure: error: "Unknown value $enableval passed to --enable-sim-mon"" 1>&2; exit 1; }; sim_env="";;
-esac
-if test x"$silent" != x"yes" && test x"$sim_monitor" != x""; then
- echo "Setting monitor flags = $sim_monitor" 6>&1
-fi
-else
- sim_monitor=""
-fi
-
-
-# Check whether --enable-sim-opcode or --disable-sim-opcode was given.
-if test "${enable_sim_opcode+set}" = set; then
- enableval="$enable_sim_opcode"
- case "${enableval}" in
- yes|no) { echo "configure: error: "No value supplied for --enable-sim-opcode=file"" 1>&2; exit 1; };;
- *) if test -f "${srcdir}/${enableval}"; then
- sim_opcode="${enableval}"
- elif test -f "${srcdir}/dc-${enableval}"; then
- sim_opcode="dc-${enableval}"
- else
- { echo "configure: error: "File $enableval is not an opcode rules file"" 1>&2; exit 1; };
- sim_opcode="dc-complex"
- fi;;
-esac
-if test x"$silent" != x"yes" && test x"$sim_opcode" != x""; then
- echo "Setting opcode flags = $sim_opcode" 6>&1
-fi
-else
- sim_opcode="dc-complex"
-if test x"$silent" != x"yes"; then
- echo "Setting opcode flags = $sim_opcode"
-fi
-fi
-
-
-# Check whether --enable-sim-packages or --disable-sim-packages was given.
-if test "${enable_sim_packages+set}" = set; then
- enableval="$enable_sim_packages"
- packages=disklabel
-case "${enableval}" in
- yes) ;;
- no) { echo "configure: error: "List of packages must be specified for --enable-sim-packages"" 1>&2; exit 1; }; packages="";;
- ,*) packages="${packages}${enableval}";;
- *,) packages="${enableval}${packages}";;
- *) packages="${enableval}"'';;
-esac
-sim_pk_src=`echo $packages | sed -e 's/,/.c pk_/g' -e 's/^/pk_/' -e 's/$/.c/'`
-sim_pk_obj=`echo $sim_pk_src | sed -e 's/\.c/.o/g'`
-if test x"$silent" != x"yes" && test x"$packages" != x""; then
- echo "Setting packages to $sim_pk_src, $sim_pk_obj"
-fi
-else
- packages=disklabel
-sim_pk_src=`echo $packages | sed -e 's/,/.c pk_/g' -e 's/^/pk_/' -e 's/$/.c/'`
-sim_pk_obj=`echo $sim_pk_src | sed -e 's/\.c/.o/g'`
-if test x"$silent" != x"yes"; then
- echo "Setting packages to $sim_pk_src, $sim_pk_obj"
-fi
-fi
-
-
-# Check whether --enable-sim-regparm or --disable-sim-regparm was given.
-if test "${enable_sim_regparm+set}" = set; then
- enableval="$enable_sim_regparm"
- case "${enableval}" in
- 0*|1*|2*|3*|4*|5*|6*|7*|8*|9*) sim_regparm="-DWITH_REGPARM=${enableval}";;
- no) sim_regparm="" ;;
- yes) sim_regparm="-DWITH_REGPARM=3";;
- *) { echo "configure: error: "Unknown value $enableval for --enable-sim-regparm"" 1>&2; exit 1; }; sim_regparm="";;
-esac
-if test x"$silent" != x"yes" && test x"$sim_regparm" != x""; then
- echo "Setting regparm flags = $sim_regparm" 6>&1
-fi
-else
- sim_regparm=""
-fi
-
-
-# Check whether --enable-sim-reserved-bits or --disable-sim-reserved-bits was given.
-if test "${enable_sim_reserved_bits+set}" = set; then
- enableval="$enable_sim_reserved_bits"
- case "${enableval}" in
- yes) sim_reserved="-DWITH_RESERVED_BITS=1";;
- no) sim_reserved="-DWITH_RESERVED_BITS=0";;
- *) { echo "configure: error: "--enable-sim-reserved-bits does not take a value"" 1>&2; exit 1; }; sim_reserved="";;
-esac
-if test x"$silent" != x"yes" && test x"$sim_reserved" != x""; then
- echo "Setting reserved flags = $sim_reserved" 6>&1
-fi
-else
- sim_reserved=""
-fi
-
-
-# Check whether --enable-sim-smp or --disable-sim-smp was given.
-if test "${enable_sim_smp+set}" = set; then
- enableval="$enable_sim_smp"
- case "${enableval}" in
- yes) sim_smp="-DWITH_SMP=5" ; sim_igen_smp="-N 5";;
- no) sim_smp="-DWITH_SMP=0" ; sim_igen_smp="-N 0";;
- *) sim_smp="-DWITH_SMP=$enableval" ; sim_igen_smp="-N $enableval";;
-esac
-if test x"$silent" != x"yes" && test x"$sim_smp" != x""; then
- echo "Setting smp flags = $sim_smp" 6>&1
-fi
-else
- sim_smp="-DWITH_SMP=5" ; sim_igen_smp="-N 5"
-if test x"$silent" != x"yes"; then
- echo "Setting smp flags = $sim_smp" 6>&1
-fi
-fi
-
-
-# Check whether --enable-sim-stdcall or --disable-sim-stdcall was given.
-if test "${enable_sim_stdcall+set}" = set; then
- enableval="$enable_sim_stdcall"
- case "${enableval}" in
- no) sim_stdcall="" ;;
- std*) sim_stdcall="-DWITH_STDCALL=1";;
- yes) sim_stdcall="-DWITH_STDCALL=1";;
- *) { echo "configure: error: "Unknown value $enableval for --enable-sim-stdcall"" 1>&2; exit 1; }; sim_stdcall="";;
-esac
-if test x"$silent" != x"yes" && test x"$sim_stdcall" != x""; then
- echo "Setting function call flags = $sim_stdcall" 6>&1
-fi
-else
- sim_stdcall=""
-fi
-
-
-# Check whether --enable-sim-stdio or --disable-sim-stdio was given.
-if test "${enable_sim_stdio+set}" = set; then
- enableval="$enable_sim_stdio"
- case "${enableval}" in
- yes) sim_stdio="-DWITH_STDIO=DO_USE_STDIO";;
- no) sim_stdio="-DWITH_STDIO=DONT_USE_STDIO";;
- *) { echo "configure: error: "Unknown value $enableval passed to --enable-sim-stdio"" 1>&2; exit 1; }; sim_stdio="";;
-esac
-if test x"$silent" != x"yes" && test x"$sim_stdio" != x""; then
- echo "Setting stdio flags = $sim_stdio" 6>&1
-fi
-else
- sim_stdio=""
-fi
-
-
-# Check whether --enable-sim-switch or --disable-sim-switch was given.
-if test "${enable_sim_switch+set}" = set; then
- enableval="$enable_sim_switch"
- case "${enableval}" in
- yes) sim_switch="-s";;
- no) sim_switch="";;
- *) { echo "configure: error: "--enable-sim-switch does not take a value"" 1>&2; exit 1; }; sim_switch="";;
-esac
-if test x"$silent" != x"yes" && test x"$sim_switch" != x""; then
- echo "Setting switch flags = $sim_switch" 6>&1
-fi
-else
- sim_switch="";
-if test x"$silent" != x"yes"; then
- echo "Setting switch flags = $sim_switch" 6>&1
-fi
-fi
-
-
-# Check whether --enable-sim-timebase or --disable-sim-timebase was given.
-if test "${enable_sim_timebase+set}" = set; then
- enableval="$enable_sim_timebase"
- case "${enableval}" in
- yes) sim_timebase="-DWITH_TIME_BASE=1";;
- no) sim_timebase="-DWITH_TIME_BASE=0";;
- *) { echo "configure: error: "--enable-sim-timebase does not take a value"" 1>&2; exit 1; }; sim_timebase="";;
-esac
-if test x"$silent" != x"yes" && test x"$sim_timebase" != x""; then
- echo "Setting timebase flags = $sim_timebase" 6>&1
-fi
-else
- sim_timebase=""
-fi
-
-
-# Check whether --enable-sim-trace or --disable-sim-trace was given.
-if test "${enable_sim_trace+set}" = set; then
- enableval="$enable_sim_trace"
- case "${enableval}" in
- yes) sim_trace="-DWITH_TRACE=1";;
- no) sim_trace="-DWITH_TRACE=0";;
- *) { echo "configure: error: "--enable-sim-trace does not take a value"" 1>&2; exit 1; }; sim_trace="";;
-esac
-if test x"$silent" != x"yes" && test x"$sim_trace" != x""; then
- echo "Setting trace flags = $sim_trace" 6>&1
-fi
-else
- sim_trace=""
-fi
-
-
-# Check whether --enable-sim-warnings or --disable-sim-warnings was given.
-if test "${enable_sim_warnings+set}" = set; then
- enableval="$enable_sim_warnings"
- case "${enableval}" in
- yes) sim_warnings="-Werror -Wall -Wpointer-arith -Wmissing-prototypes -Wmissing-declarations ";;
- no) sim_warnings="-w";;
- *) sim_warnings=`echo "${enableval}" | sed -e "s/,/ /g"`;;
-esac
-if test x"$silent" != x"yes" && test x"$sim_warnings" != x""; then
- echo "Setting warning flags = $sim_warnings" 6>&1
-fi
-else
- sim_warnings=""
-fi
-
-
-# Check whether --enable-sim-xor-endian or --disable-sim-xor-endian was given.
-if test "${enable_sim_xor_endian+set}" = set; then
- enableval="$enable_sim_xor_endian"
- case "${enableval}" in
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- no) sim_xor_endian="-DWITH_XOR_ENDIAN=0";;
- *) sim_xor_endian="-DWITH_XOR_ENDIAN=$enableval";;
-esac
-if test x"$silent" != x"yes" && test x"$sim_xor_endian" != x""; then
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-fi
-else
- sim_xor_endian=""
-fi
-
-
-ac_aux_dir=
-for ac_dir in `cd $srcdir;pwd`/../.. $srcdir/`cd $srcdir;pwd`/../..; do
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- ac_aux_dir=$ac_dir
- ac_install_sh="$ac_aux_dir/install-sh -c"
- break
- elif test -f $ac_dir/install.sh; then
- ac_aux_dir=$ac_dir
- ac_install_sh="$ac_aux_dir/install.sh -c"
- break
- fi
-done
-if test -z "$ac_aux_dir"; then
- { echo "configure: error: can not find install-sh or install.sh in `cd $srcdir;pwd`/../.. $srcdir/`cd $srcdir;pwd`/../.." 1>&2; exit 1; }
-fi
-ac_config_guess=$ac_aux_dir/config.guess
-ac_config_sub=$ac_aux_dir/config.sub
-ac_configure=$ac_aux_dir/configure # This should be Cygnus configure.
-
-
-# Do some error checking and defaulting for the host and target type.
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-#
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-# same time.
-# 2. Host defaults to nonopt.
-# 3. If nonopt is not specified, then host defaults to the current host,
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-# 4. Target and build default to nonopt.
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-
-# The aliases save the names the user supplied, while $host etc.
-# will get canonicalized.
-case $host---$target---$nonopt in
-NONE---*---* | *---NONE---* | *---*---NONE) ;;
-*) { echo "configure: error: can only configure for one host and one target at a time" 1>&2; exit 1; } ;;
-esac
-
-
-# Make sure we can run config.sub.
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-
-echo $ac_n "checking host system type""... $ac_c" 1>&6
-echo "configure:3627: checking host system type" >&5
-
-host_alias=$host
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- case $nonopt in
- NONE)
- if host_alias=`${CONFIG_SHELL-/bin/sh} $ac_config_guess`; then :
- else { echo "configure: error: can not guess host type; you must specify one" 1>&2; exit 1; }
- fi ;;
- *) host_alias=$nonopt ;;
- esac ;;
-esac
-
-host=`${CONFIG_SHELL-/bin/sh} $ac_config_sub $host_alias`
-host_cpu=`echo $host | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\1/'`
-host_vendor=`echo $host | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\2/'`
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-
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-echo "configure:3648: checking target system type" >&5
-
-target_alias=$target
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-NONE)
- case $nonopt in
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- *) target_alias=$nonopt ;;
- esac ;;
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-
-target=`${CONFIG_SHELL-/bin/sh} $ac_config_sub $target_alias`
-target_cpu=`echo $target | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\1/'`
-target_vendor=`echo $target | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\2/'`
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-
-echo $ac_n "checking build system type""... $ac_c" 1>&6
-echo "configure:3666: checking build system type" >&5
-
-build_alias=$build
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-NONE)
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- *) build_alias=$nonopt ;;
- esac ;;
-esac
-
-build=`${CONFIG_SHELL-/bin/sh} $ac_config_sub $build_alias`
-build_cpu=`echo $build | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\1/'`
-build_vendor=`echo $build | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\2/'`
-build_os=`echo $build | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\3/'`
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-
-test "$host_alias" != "$target_alias" &&
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-
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-s,\\,\\\\,g; s,\$,$$,g
-EOF_SED
- program_transform_name="`echo $program_transform_name|sed -f conftestsed`"
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-test "$program_prefix" != NONE &&
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-# Use a double $ so make ignores it.
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- program_transform_name="s,\$\$,${program_suffix},; $program_transform_name"
-
-# sed with no file args requires a program.
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-
-
-. ${srcdir}/../../bfd/configure.host
-
-
-
-echo $ac_n "checking for st_blksize in struct stat""... $ac_c" 1>&6
-echo "configure:3713: checking for st_blksize in struct stat" >&5
-if eval "test \"`echo '$''{'ac_cv_struct_st_blksize'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 3718 "configure"
-#include "confdefs.h"
-#include <sys/types.h>
-#include <sys/stat.h>
-int main() {
-struct stat s; s.st_blksize;
-; return 0; }
-EOF
-if { (eval echo configure:3726: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
- rm -rf conftest*
- ac_cv_struct_st_blksize=yes
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- ac_cv_struct_st_blksize=no
-fi
-rm -f conftest*
-fi
-
-echo "$ac_t""$ac_cv_struct_st_blksize" 1>&6
-if test $ac_cv_struct_st_blksize = yes; then
- cat >> confdefs.h <<\EOF
-#define HAVE_ST_BLKSIZE 1
-EOF
-
-fi
-
-echo $ac_n "checking for st_blocks in struct stat""... $ac_c" 1>&6
-echo "configure:3747: checking for st_blocks in struct stat" >&5
-if eval "test \"`echo '$''{'ac_cv_struct_st_blocks'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 3752 "configure"
-#include "confdefs.h"
-#include <sys/types.h>
-#include <sys/stat.h>
-int main() {
-struct stat s; s.st_blocks;
-; return 0; }
-EOF
-if { (eval echo configure:3760: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
- rm -rf conftest*
- ac_cv_struct_st_blocks=yes
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- ac_cv_struct_st_blocks=no
-fi
-rm -f conftest*
-fi
-
-echo "$ac_t""$ac_cv_struct_st_blocks" 1>&6
-if test $ac_cv_struct_st_blocks = yes; then
- cat >> confdefs.h <<\EOF
-#define HAVE_ST_BLOCKS 1
-EOF
-
-else
- LIBOBJS="$LIBOBJS fileblocks.${ac_objext}"
-fi
-
-echo $ac_n "checking for st_rdev in struct stat""... $ac_c" 1>&6
-echo "configure:3783: checking for st_rdev in struct stat" >&5
-if eval "test \"`echo '$''{'ac_cv_struct_st_rdev'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 3788 "configure"
-#include "confdefs.h"
-#include <sys/types.h>
-#include <sys/stat.h>
-int main() {
-struct stat s; s.st_rdev;
-; return 0; }
-EOF
-if { (eval echo configure:3796: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
- rm -rf conftest*
- ac_cv_struct_st_rdev=yes
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- ac_cv_struct_st_rdev=no
-fi
-rm -f conftest*
-fi
-
-echo "$ac_t""$ac_cv_struct_st_rdev" 1>&6
-if test $ac_cv_struct_st_rdev = yes; then
- cat >> confdefs.h <<\EOF
-#define HAVE_ST_RDEV 1
-EOF
-
-fi
-
-echo $ac_n "checking whether struct tm is in sys/time.h or time.h""... $ac_c" 1>&6
-echo "configure:3817: checking whether struct tm is in sys/time.h or time.h" >&5
-if eval "test \"`echo '$''{'ac_cv_struct_tm'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 3822 "configure"
-#include "confdefs.h"
-#include <sys/types.h>
-#include <time.h>
-int main() {
-struct tm *tp; tp->tm_sec;
-; return 0; }
-EOF
-if { (eval echo configure:3830: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
- rm -rf conftest*
- ac_cv_struct_tm=time.h
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- ac_cv_struct_tm=sys/time.h
-fi
-rm -f conftest*
-fi
-
-echo "$ac_t""$ac_cv_struct_tm" 1>&6
-if test $ac_cv_struct_tm = sys/time.h; then
- cat >> confdefs.h <<\EOF
-#define TM_IN_SYS_TIME 1
-EOF
-
-fi
-
-echo $ac_n "checking for tm_zone in struct tm""... $ac_c" 1>&6
-echo "configure:3851: checking for tm_zone in struct tm" >&5
-if eval "test \"`echo '$''{'ac_cv_struct_tm_zone'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 3856 "configure"
-#include "confdefs.h"
-#include <sys/types.h>
-#include <$ac_cv_struct_tm>
-int main() {
-struct tm tm; tm.tm_zone;
-; return 0; }
-EOF
-if { (eval echo configure:3864: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
- rm -rf conftest*
- ac_cv_struct_tm_zone=yes
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- ac_cv_struct_tm_zone=no
-fi
-rm -f conftest*
-fi
-
-echo "$ac_t""$ac_cv_struct_tm_zone" 1>&6
-if test "$ac_cv_struct_tm_zone" = yes; then
- cat >> confdefs.h <<\EOF
-#define HAVE_TM_ZONE 1
-EOF
-
-else
- echo $ac_n "checking for tzname""... $ac_c" 1>&6
-echo "configure:3884: checking for tzname" >&5
-if eval "test \"`echo '$''{'ac_cv_var_tzname'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 3889 "configure"
-#include "confdefs.h"
-#include <time.h>
-#ifndef tzname /* For SGI. */
-extern char *tzname[]; /* RS6000 and others reject char **tzname. */
-#endif
-int main() {
-atoi(*tzname);
-; return 0; }
-EOF
-if { (eval echo configure:3899: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- rm -rf conftest*
- ac_cv_var_tzname=yes
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- ac_cv_var_tzname=no
-fi
-rm -f conftest*
-fi
-
-echo "$ac_t""$ac_cv_var_tzname" 1>&6
- if test $ac_cv_var_tzname = yes; then
- cat >> confdefs.h <<\EOF
-#define HAVE_TZNAME 1
-EOF
-
- fi
-fi
-
-
-echo $ac_n "checking for uid_t in sys/types.h""... $ac_c" 1>&6
-echo "configure:3922: checking for uid_t in sys/types.h" >&5
-if eval "test \"`echo '$''{'ac_cv_type_uid_t'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 3927 "configure"
-#include "confdefs.h"
-#include <sys/types.h>
-EOF
-if (eval "$ac_cpp conftest.$ac_ext") 2>&5 |
- egrep "uid_t" >/dev/null 2>&1; then
- rm -rf conftest*
- ac_cv_type_uid_t=yes
-else
- rm -rf conftest*
- ac_cv_type_uid_t=no
-fi
-rm -f conftest*
-
-fi
-
-echo "$ac_t""$ac_cv_type_uid_t" 1>&6
-if test $ac_cv_type_uid_t = no; then
- cat >> confdefs.h <<\EOF
-#define uid_t int
-EOF
-
- cat >> confdefs.h <<\EOF
-#define gid_t int
-EOF
-
-fi
-
-echo $ac_n "checking type of array argument to getgroups""... $ac_c" 1>&6
-echo "configure:3956: checking type of array argument to getgroups" >&5
-if eval "test \"`echo '$''{'ac_cv_type_getgroups'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- if test "$cross_compiling" = yes; then
- ac_cv_type_getgroups=cross
-else
- cat > conftest.$ac_ext <<EOF
-#line 3964 "configure"
-#include "confdefs.h"
-
-/* Thanks to Mike Rendell for this test. */
-#include <sys/types.h>
-#define NGID 256
-#undef MAX
-#define MAX(x, y) ((x) > (y) ? (x) : (y))
-main()
-{
- gid_t gidset[NGID];
- int i, n;
- union { gid_t gval; long lval; } val;
-
- val.lval = -1;
- for (i = 0; i < NGID; i++)
- gidset[i] = val.gval;
- n = getgroups (sizeof (gidset) / MAX (sizeof (int), sizeof (gid_t)) - 1,
- gidset);
- /* Exit non-zero if getgroups seems to require an array of ints. This
- happens when gid_t is short but getgroups modifies an array of ints. */
- exit ((n > 0 && gidset[n] != val.gval) ? 1 : 0);
-}
-
-EOF
-if { (eval echo configure:3989: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null
-then
- ac_cv_type_getgroups=gid_t
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -fr conftest*
- ac_cv_type_getgroups=int
-fi
-rm -fr conftest*
-fi
-
-if test $ac_cv_type_getgroups = cross; then
- cat > conftest.$ac_ext <<EOF
-#line 4003 "configure"
-#include "confdefs.h"
-#include <unistd.h>
-EOF
-if (eval "$ac_cpp conftest.$ac_ext") 2>&5 |
- egrep "getgroups.*int.*gid_t" >/dev/null 2>&1; then
- rm -rf conftest*
- ac_cv_type_getgroups=gid_t
-else
- rm -rf conftest*
- ac_cv_type_getgroups=int
-fi
-rm -f conftest*
-
-fi
-fi
-
-echo "$ac_t""$ac_cv_type_getgroups" 1>&6
-cat >> confdefs.h <<EOF
-#define GETGROUPS_T $ac_cv_type_getgroups
-EOF
-
-
-echo $ac_n "checking for mode_t""... $ac_c" 1>&6
-echo "configure:4027: checking for mode_t" >&5
-if eval "test \"`echo '$''{'ac_cv_type_mode_t'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 4032 "configure"
-#include "confdefs.h"
-#include <sys/types.h>
-#if STDC_HEADERS
-#include <stdlib.h>
-#include <stddef.h>
-#endif
-EOF
-if (eval "$ac_cpp conftest.$ac_ext") 2>&5 |
- egrep "(^|[^a-zA-Z_0-9])mode_t[^a-zA-Z_0-9]" >/dev/null 2>&1; then
- rm -rf conftest*
- ac_cv_type_mode_t=yes
-else
- rm -rf conftest*
- ac_cv_type_mode_t=no
-fi
-rm -f conftest*
-
-fi
-echo "$ac_t""$ac_cv_type_mode_t" 1>&6
-if test $ac_cv_type_mode_t = no; then
- cat >> confdefs.h <<\EOF
-#define mode_t int
-EOF
-
-fi
-
-echo $ac_n "checking for off_t""... $ac_c" 1>&6
-echo "configure:4060: checking for off_t" >&5
-if eval "test \"`echo '$''{'ac_cv_type_off_t'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 4065 "configure"
-#include "confdefs.h"
-#include <sys/types.h>
-#if STDC_HEADERS
-#include <stdlib.h>
-#include <stddef.h>
-#endif
-EOF
-if (eval "$ac_cpp conftest.$ac_ext") 2>&5 |
- egrep "(^|[^a-zA-Z_0-9])off_t[^a-zA-Z_0-9]" >/dev/null 2>&1; then
- rm -rf conftest*
- ac_cv_type_off_t=yes
-else
- rm -rf conftest*
- ac_cv_type_off_t=no
-fi
-rm -f conftest*
-
-fi
-echo "$ac_t""$ac_cv_type_off_t" 1>&6
-if test $ac_cv_type_off_t = no; then
- cat >> confdefs.h <<\EOF
-#define off_t long
-EOF
-
-fi
-
-echo $ac_n "checking for pid_t""... $ac_c" 1>&6
-echo "configure:4093: checking for pid_t" >&5
-if eval "test \"`echo '$''{'ac_cv_type_pid_t'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 4098 "configure"
-#include "confdefs.h"
-#include <sys/types.h>
-#if STDC_HEADERS
-#include <stdlib.h>
-#include <stddef.h>
-#endif
-EOF
-if (eval "$ac_cpp conftest.$ac_ext") 2>&5 |
- egrep "(^|[^a-zA-Z_0-9])pid_t[^a-zA-Z_0-9]" >/dev/null 2>&1; then
- rm -rf conftest*
- ac_cv_type_pid_t=yes
-else
- rm -rf conftest*
- ac_cv_type_pid_t=no
-fi
-rm -f conftest*
-
-fi
-echo "$ac_t""$ac_cv_type_pid_t" 1>&6
-if test $ac_cv_type_pid_t = no; then
- cat >> confdefs.h <<\EOF
-#define pid_t int
-EOF
-
-fi
-
-echo $ac_n "checking return type of signal handlers""... $ac_c" 1>&6
-echo "configure:4126: checking return type of signal handlers" >&5
-if eval "test \"`echo '$''{'ac_cv_type_signal'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 4131 "configure"
-#include "confdefs.h"
-#include <sys/types.h>
-#include <signal.h>
-#ifdef signal
-#undef signal
-#endif
-#ifdef __cplusplus
-extern "C" void (*signal (int, void (*)(int)))(int);
-#else
-void (*signal ()) ();
-#endif
-
-int main() {
-int i;
-; return 0; }
-EOF
-if { (eval echo configure:4148: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
- rm -rf conftest*
- ac_cv_type_signal=void
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- ac_cv_type_signal=int
-fi
-rm -f conftest*
-fi
-
-echo "$ac_t""$ac_cv_type_signal" 1>&6
-cat >> confdefs.h <<EOF
-#define RETSIGTYPE $ac_cv_type_signal
-EOF
-
-
-echo $ac_n "checking for size_t""... $ac_c" 1>&6
-echo "configure:4167: checking for size_t" >&5
-if eval "test \"`echo '$''{'ac_cv_type_size_t'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 4172 "configure"
-#include "confdefs.h"
-#include <sys/types.h>
-#if STDC_HEADERS
-#include <stdlib.h>
-#include <stddef.h>
-#endif
-EOF
-if (eval "$ac_cpp conftest.$ac_ext") 2>&5 |
- egrep "(^|[^a-zA-Z_0-9])size_t[^a-zA-Z_0-9]" >/dev/null 2>&1; then
- rm -rf conftest*
- ac_cv_type_size_t=yes
-else
- rm -rf conftest*
- ac_cv_type_size_t=no
-fi
-rm -f conftest*
-
-fi
-echo "$ac_t""$ac_cv_type_size_t" 1>&6
-if test $ac_cv_type_size_t = no; then
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-#define size_t unsigned
-EOF
-
-fi
-
-echo $ac_n "checking for uid_t in sys/types.h""... $ac_c" 1>&6
-echo "configure:4200: checking for uid_t in sys/types.h" >&5
-if eval "test \"`echo '$''{'ac_cv_type_uid_t'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 4205 "configure"
-#include "confdefs.h"
-#include <sys/types.h>
-EOF
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-if { (eval echo configure:4433: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
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-
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-if { (eval echo configure:4476: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
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- ac_cv_termios_struct=yes
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- echo "configure: failed program was:" >&5
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-#line 4500 "configure"
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-if { (eval echo configure:4508: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
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-
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-
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-echo "configure:4531: checking for struct termio" >&5
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- cat > conftest.$ac_ext <<EOF
-#line 4536 "configure"
-#include "confdefs.h"
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-int main() {
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-if { (eval echo configure:4549: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
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-
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-
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-#line 4576 "configure"
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-if { (eval echo configure:4584: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
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-
-
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-
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-#line 4615 "configure"
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- for (i = 0; i < sizeof (buf); i++)
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-if { (eval echo configure:4634: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null
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-
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-
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-
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-echo "configure:4656: checking for common simulator directory" >&5
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- sim_callback="callback.o targ-map.o"
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- sim_callback=""
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-
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-else
- cat > conftest.$ac_ext <<EOF
-#line 4673 "configure"
-#include "confdefs.h"
-
-int main() {
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-#ifndef __CYGWIN__
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-if { (eval echo configure:4684: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
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- ac_cv_cygwin=yes
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
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-rm -f conftest*
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-CYGWIN=
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-echo $ac_n "checking for mingw32 environment""... $ac_c" 1>&6
-echo "configure:4701: checking for mingw32 environment" >&5
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-else
- cat > conftest.$ac_ext <<EOF
-#line 4706 "configure"
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-
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-if { (eval echo configure:4713: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
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- ac_cv_mingw32=yes
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- ac_cv_exeext=
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-ac_exeext=$EXEEXT
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-
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-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-trap '' 1 2 15
-cat > confcache <<\EOF
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-#
-# By default, configure uses ./config.cache as the cache file,
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-# the --cache-file=FILE option to use a different cache file; that is
-# what configure does when it calls configure scripts in
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-#
-EOF
-# The following way of writing the cache mishandles newlines in values,
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- case `(ac_space=' '; set | grep ac_space) 2>&1` in
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- # `set' does not quote correctly, so add quotes (double-quote substitution
- # turns \\\\ into \\, and sed turns \\ into \).
- sed -n \
- -e "s/'/'\\\\''/g" \
- -e "s/^\\([a-zA-Z0-9_]*_cv_[a-zA-Z0-9_]*\\)=\\(.*\\)/\\1=\${\\1='\\2'}/p"
- ;;
- *)
- # `set' quotes correctly as required by POSIX, so do not add quotes.
- sed -n -e 's/^\([a-zA-Z0-9_]*_cv_[a-zA-Z0-9_]*\)=\(.*\)/\1=${\1=\2}/p'
- ;;
- esac >> confcache
-if cmp -s $cache_file confcache; then
- :
-else
- if test -w $cache_file; then
- echo "updating cache $cache_file"
- cat confcache > $cache_file
- else
- echo "not updating unwritable cache $cache_file"
- fi
-fi
-rm -f confcache
-
-trap 'rm -fr conftest* confdefs* core core.* *.core $ac_clean_files; exit 1' 1 2 15
-
-test "x$prefix" = xNONE && prefix=$ac_default_prefix
-# Let make expand exec_prefix.
-test "x$exec_prefix" = xNONE && exec_prefix='${prefix}'
-
-# Any assignment to VPATH causes Sun make to only execute
-# the first set of double-colon rules, so remove it if not needed.
-# If there is a colon in the path, we need to keep it.
-if test "x$srcdir" = x.; then
- ac_vpsub='/^[ ]*VPATH[ ]*=[^:]*$/d'
-fi
-
-trap 'rm -f $CONFIG_STATUS conftest*; exit 1' 1 2 15
-
-DEFS=-DHAVE_CONFIG_H
-
-# Without the "./", some shells look in PATH for config.status.
-: ${CONFIG_STATUS=./config.status}
-
-echo creating $CONFIG_STATUS
-rm -f $CONFIG_STATUS
-cat > $CONFIG_STATUS <<EOF
-#! /bin/sh
-# Generated automatically by configure.
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-#
-# $0 $ac_configure_args
-#
-# Compiler output produced by configure, useful for debugging
-# configure, is in ./config.log if it exists.
-
-ac_cs_usage="Usage: $CONFIG_STATUS [--recheck] [--version] [--help]"
-for ac_option
-do
- case "\$ac_option" in
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- echo "running \${CONFIG_SHELL-/bin/sh} $0 $ac_configure_args --no-create --no-recursion"
- exec \${CONFIG_SHELL-/bin/sh} $0 $ac_configure_args --no-create --no-recursion ;;
- -version | --version | --versio | --versi | --vers | --ver | --ve | --v)
- echo "$CONFIG_STATUS generated by autoconf version 2.13"
- exit 0 ;;
- -help | --help | --hel | --he | --h)
- echo "\$ac_cs_usage"; exit 0 ;;
- *) echo "\$ac_cs_usage"; exit 1 ;;
- esac
-done
-
-ac_given_srcdir=$srcdir
-ac_given_INSTALL="$INSTALL"
-
-trap 'rm -fr `echo "Makefile config.h:config.in" | sed "s/:[^ ]*//g"` conftest*; exit 1' 1 2 15
-EOF
-cat >> $CONFIG_STATUS <<EOF
-
-# Protect against being on the right side of a sed subst in config.status.
-sed 's/%@/@@/; s/@%/@@/; s/%g\$/@g/; /@g\$/s/[\\\\&%]/\\\\&/g;
- s/@@/%@/; s/@@/@%/; s/@g\$/%g/' > conftest.subs <<\\CEOF
-$ac_vpsub
-$extrasub
-s%@sim_environment@%$sim_environment%g
-s%@sim_alignment@%$sim_alignment%g
-s%@sim_assert@%$sim_assert%g
-s%@sim_bitsize@%$sim_bitsize%g
-s%@sim_endian@%$sim_endian%g
-s%@sim_hostendian@%$sim_hostendian%g
-s%@sim_float@%$sim_float%g
-s%@sim_scache@%$sim_scache%g
-s%@sim_default_model@%$sim_default_model%g
-s%@sim_hw_cflags@%$sim_hw_cflags%g
-s%@sim_hw_objs@%$sim_hw_objs%g
-s%@sim_hw@%$sim_hw%g
-s%@sim_inline@%$sim_inline%g
-s%@sim_packages@%$sim_packages%g
-s%@sim_regparm@%$sim_regparm%g
-s%@sim_reserved_bits@%$sim_reserved_bits%g
-s%@sim_smp@%$sim_smp%g
-s%@sim_stdcall@%$sim_stdcall%g
-s%@sim_xor_endian@%$sim_xor_endian%g
-s%@WARN_CFLAGS@%$WARN_CFLAGS%g
-s%@WERROR_CFLAGS@%$WERROR_CFLAGS%g
-s%@SHELL@%$SHELL%g
-s%@CFLAGS@%$CFLAGS%g
-s%@CPPFLAGS@%$CPPFLAGS%g
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-s%@DEFS@%$DEFS%g
-s%@LDFLAGS@%$LDFLAGS%g
-s%@LIBS@%$LIBS%g
-s%@exec_prefix@%$exec_prefix%g
-s%@prefix@%$prefix%g
-s%@program_transform_name@%$program_transform_name%g
-s%@bindir@%$bindir%g
-s%@sbindir@%$sbindir%g
-s%@libexecdir@%$libexecdir%g
-s%@datadir@%$datadir%g
-s%@sysconfdir@%$sysconfdir%g
-s%@sharedstatedir@%$sharedstatedir%g
-s%@localstatedir@%$localstatedir%g
-s%@libdir@%$libdir%g
-s%@includedir@%$includedir%g
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-s%@infodir@%$infodir%g
-s%@mandir@%$mandir%g
-s%@INSTALL_PROGRAM@%$INSTALL_PROGRAM%g
-s%@INSTALL_SCRIPT@%$INSTALL_SCRIPT%g
-s%@INSTALL_DATA@%$INSTALL_DATA%g
-s%@CC@%$CC%g
-s%@SET_MAKE@%$SET_MAKE%g
-s%@RANLIB@%$RANLIB%g
-s%@CPP@%$CPP%g
-s%@ALLOCA@%$ALLOCA%g
-s%@USE_NLS@%$USE_NLS%g
-s%@MSGFMT@%$MSGFMT%g
-s%@GMSGFMT@%$GMSGFMT%g
-s%@XGETTEXT@%$XGETTEXT%g
-s%@USE_INCLUDED_LIBINTL@%$USE_INCLUDED_LIBINTL%g
-s%@CATALOGS@%$CATALOGS%g
-s%@CATOBJEXT@%$CATOBJEXT%g
-s%@DATADIRNAME@%$DATADIRNAME%g
-s%@GMOFILES@%$GMOFILES%g
-s%@INSTOBJEXT@%$INSTOBJEXT%g
-s%@INTLDEPS@%$INTLDEPS%g
-s%@INTLLIBS@%$INTLLIBS%g
-s%@INTLOBJS@%$INTLOBJS%g
-s%@POFILES@%$POFILES%g
-s%@POSUB@%$POSUB%g
-s%@INCLUDE_LOCALE_H@%$INCLUDE_LOCALE_H%g
-s%@GT_NO@%$GT_NO%g
-s%@GT_YES@%$GT_YES%g
-s%@MKINSTALLDIRS@%$MKINSTALLDIRS%g
-s%@l@%$l%g
-s%@host@%$host%g
-s%@host_alias@%$host_alias%g
-s%@host_cpu@%$host_cpu%g
-s%@host_vendor@%$host_vendor%g
-s%@host_os@%$host_os%g
-s%@target@%$target%g
-s%@target_alias@%$target_alias%g
-s%@target_cpu@%$target_cpu%g
-s%@target_vendor@%$target_vendor%g
-s%@target_os@%$target_os%g
-s%@build@%$build%g
-s%@build_alias@%$build_alias%g
-s%@build_cpu@%$build_cpu%g
-s%@build_vendor@%$build_vendor%g
-s%@build_os@%$build_os%g
-s%@LIBOBJS@%$LIBOBJS%g
-s%@EXEEXT@%$EXEEXT%g
-s%@CC_FOR_BUILD@%$CC_FOR_BUILD%g
-s%@HDEFINES@%$HDEFINES%g
-s%@AR@%$AR%g
-s%@sim_cflags@%$sim_cflags%g
-s%@sim_warnings@%$sim_warnings%g
-s%@sim_line_nr@%$sim_line_nr%g
-s%@sim_config@%$sim_config%g
-s%@sim_opcode@%$sim_opcode%g
-s%@sim_switch@%$sim_switch%g
-s%@sim_dup@%$sim_dup%g
-s%@sim_decode_mechanism@%$sim_decode_mechanism%g
-s%@sim_jump@%$sim_jump%g
-s%@sim_filter@%$sim_filter%g
-s%@sim_icache@%$sim_icache%g
-s%@sim_hw_src@%$sim_hw_src%g
-s%@sim_hw_obj@%$sim_hw_obj%g
-s%@sim_pk_src@%$sim_pk_src%g
-s%@sim_pk_obj@%$sim_pk_obj%g
-s%@sim_bswap@%$sim_bswap%g
-s%@sim_igen_smp@%$sim_igen_smp%g
-s%@sim_hostbitsize@%$sim_hostbitsize%g
-s%@sim_env@%$sim_env%g
-s%@sim_timebase@%$sim_timebase%g
-s%@sim_trace@%$sim_trace%g
-s%@sim_reserved@%$sim_reserved%g
-s%@sim_monitor@%$sim_monitor%g
-s%@sim_model@%$sim_model%g
-s%@sim_model_issue@%$sim_model_issue%g
-s%@sim_stdio@%$sim_stdio%g
-s%@sim_termio@%$sim_termio%g
-s%@sim_devzero@%$sim_devzero%g
-s%@sim_callback@%$sim_callback%g
-s%@sim_targ_vals@%$sim_targ_vals%g
-
-CEOF
-EOF
-
-cat >> $CONFIG_STATUS <<\EOF
-
-# Split the substitutions into bite-sized pieces for seds with
-# small command number limits, like on Digital OSF/1 and HP-UX.
-ac_max_sed_cmds=90 # Maximum number of lines to put in a sed script.
-ac_file=1 # Number of current file.
-ac_beg=1 # First line for current file.
-ac_end=$ac_max_sed_cmds # Line after last line for current file.
-ac_more_lines=:
-ac_sed_cmds=""
-while $ac_more_lines; do
- if test $ac_beg -gt 1; then
- sed "1,${ac_beg}d; ${ac_end}q" conftest.subs > conftest.s$ac_file
- else
- sed "${ac_end}q" conftest.subs > conftest.s$ac_file
- fi
- if test ! -s conftest.s$ac_file; then
- ac_more_lines=false
- rm -f conftest.s$ac_file
- else
- if test -z "$ac_sed_cmds"; then
- ac_sed_cmds="sed -f conftest.s$ac_file"
- else
- ac_sed_cmds="$ac_sed_cmds | sed -f conftest.s$ac_file"
- fi
- ac_file=`expr $ac_file + 1`
- ac_beg=$ac_end
- ac_end=`expr $ac_end + $ac_max_sed_cmds`
- fi
-done
-if test -z "$ac_sed_cmds"; then
- ac_sed_cmds=cat
-fi
-EOF
-
-cat >> $CONFIG_STATUS <<EOF
-
-CONFIG_FILES=\${CONFIG_FILES-"Makefile"}
-EOF
-cat >> $CONFIG_STATUS <<\EOF
-for ac_file in .. $CONFIG_FILES; do if test "x$ac_file" != x..; then
- # Support "outfile[:infile[:infile...]]", defaulting infile="outfile.in".
- case "$ac_file" in
- *:*) ac_file_in=`echo "$ac_file"|sed 's%[^:]*:%%'`
- ac_file=`echo "$ac_file"|sed 's%:.*%%'` ;;
- *) ac_file_in="${ac_file}.in" ;;
- esac
-
- # Adjust a relative srcdir, top_srcdir, and INSTALL for subdirectories.
-
- # Remove last slash and all that follows it. Not all systems have dirname.
- ac_dir=`echo $ac_file|sed 's%/[^/][^/]*$%%'`
- if test "$ac_dir" != "$ac_file" && test "$ac_dir" != .; then
- # The file is in a subdirectory.
- test ! -d "$ac_dir" && mkdir "$ac_dir"
- ac_dir_suffix="/`echo $ac_dir|sed 's%^\./%%'`"
- # A "../" for each directory in $ac_dir_suffix.
- ac_dots=`echo $ac_dir_suffix|sed 's%/[^/]*%../%g'`
- else
- ac_dir_suffix= ac_dots=
- fi
-
- case "$ac_given_srcdir" in
- .) srcdir=.
- if test -z "$ac_dots"; then top_srcdir=.
- else top_srcdir=`echo $ac_dots|sed 's%/$%%'`; fi ;;
- /*) srcdir="$ac_given_srcdir$ac_dir_suffix"; top_srcdir="$ac_given_srcdir" ;;
- *) # Relative path.
- srcdir="$ac_dots$ac_given_srcdir$ac_dir_suffix"
- top_srcdir="$ac_dots$ac_given_srcdir" ;;
- esac
-
- case "$ac_given_INSTALL" in
- [/$]*) INSTALL="$ac_given_INSTALL" ;;
- *) INSTALL="$ac_dots$ac_given_INSTALL" ;;
- esac
-
- echo creating "$ac_file"
- rm -f "$ac_file"
- configure_input="Generated automatically from `echo $ac_file_in|sed 's%.*/%%'` by configure."
- case "$ac_file" in
- *Makefile*) ac_comsub="1i\\
-# $configure_input" ;;
- *) ac_comsub= ;;
- esac
-
- ac_file_inputs=`echo $ac_file_in|sed -e "s%^%$ac_given_srcdir/%" -e "s%:% $ac_given_srcdir/%g"`
- sed -e "$ac_comsub
-s%@configure_input@%$configure_input%g
-s%@srcdir@%$srcdir%g
-s%@top_srcdir@%$top_srcdir%g
-s%@INSTALL@%$INSTALL%g
-" $ac_file_inputs | (eval "$ac_sed_cmds") > $ac_file
-fi; done
-rm -f conftest.s*
-
-# These sed commands are passed to sed as "A NAME B NAME C VALUE D", where
-# NAME is the cpp macro being defined and VALUE is the value it is being given.
-#
-# ac_d sets the value in "#define NAME VALUE" lines.
-ac_dA='s%^\([ ]*\)#\([ ]*define[ ][ ]*\)'
-ac_dB='\([ ][ ]*\)[^ ]*%\1#\2'
-ac_dC='\3'
-ac_dD='%g'
-# ac_u turns "#undef NAME" with trailing blanks into "#define NAME VALUE".
-ac_uA='s%^\([ ]*\)#\([ ]*\)undef\([ ][ ]*\)'
-ac_uB='\([ ]\)%\1#\2define\3'
-ac_uC=' '
-ac_uD='\4%g'
-# ac_e turns "#undef NAME" without trailing blanks into "#define NAME VALUE".
-ac_eA='s%^\([ ]*\)#\([ ]*\)undef\([ ][ ]*\)'
-ac_eB='$%\1#\2define\3'
-ac_eC=' '
-ac_eD='%g'
-
-if test "${CONFIG_HEADERS+set}" != set; then
-EOF
-cat >> $CONFIG_STATUS <<EOF
- CONFIG_HEADERS="config.h:config.in"
-EOF
-cat >> $CONFIG_STATUS <<\EOF
-fi
-for ac_file in .. $CONFIG_HEADERS; do if test "x$ac_file" != x..; then
- # Support "outfile[:infile[:infile...]]", defaulting infile="outfile.in".
- case "$ac_file" in
- *:*) ac_file_in=`echo "$ac_file"|sed 's%[^:]*:%%'`
- ac_file=`echo "$ac_file"|sed 's%:.*%%'` ;;
- *) ac_file_in="${ac_file}.in" ;;
- esac
-
- echo creating $ac_file
-
- rm -f conftest.frag conftest.in conftest.out
- ac_file_inputs=`echo $ac_file_in|sed -e "s%^%$ac_given_srcdir/%" -e "s%:% $ac_given_srcdir/%g"`
- cat $ac_file_inputs > conftest.in
-
-EOF
-
-# Transform confdefs.h into a sed script conftest.vals that substitutes
-# the proper values into config.h.in to produce config.h. And first:
-# Protect against being on the right side of a sed subst in config.status.
-# Protect against being in an unquoted here document in config.status.
-rm -f conftest.vals
-cat > conftest.hdr <<\EOF
-s/[\\&%]/\\&/g
-s%[\\$`]%\\&%g
-s%#define \([A-Za-z_][A-Za-z0-9_]*\) *\(.*\)%${ac_dA}\1${ac_dB}\1${ac_dC}\2${ac_dD}%gp
-s%ac_d%ac_u%gp
-s%ac_u%ac_e%gp
-EOF
-sed -n -f conftest.hdr confdefs.h > conftest.vals
-rm -f conftest.hdr
-
-# This sed command replaces #undef with comments. This is necessary, for
-# example, in the case of _POSIX_SOURCE, which is predefined and required
-# on some systems where configure will not decide to define it.
-cat >> conftest.vals <<\EOF
-s%^[ ]*#[ ]*undef[ ][ ]*[a-zA-Z_][a-zA-Z_0-9]*%/* & */%
-EOF
-
-# Break up conftest.vals because some shells have a limit on
-# the size of here documents, and old seds have small limits too.
-
-rm -f conftest.tail
-while :
-do
- ac_lines=`grep -c . conftest.vals`
- # grep -c gives empty output for an empty file on some AIX systems.
- if test -z "$ac_lines" || test "$ac_lines" -eq 0; then break; fi
- # Write a limited-size here document to conftest.frag.
- echo ' cat > conftest.frag <<CEOF' >> $CONFIG_STATUS
- sed ${ac_max_here_lines}q conftest.vals >> $CONFIG_STATUS
- echo 'CEOF
- sed -f conftest.frag conftest.in > conftest.out
- rm -f conftest.in
- mv conftest.out conftest.in
-' >> $CONFIG_STATUS
- sed 1,${ac_max_here_lines}d conftest.vals > conftest.tail
- rm -f conftest.vals
- mv conftest.tail conftest.vals
-done
-rm -f conftest.vals
-
-cat >> $CONFIG_STATUS <<\EOF
- rm -f conftest.frag conftest.h
- echo "/* $ac_file. Generated automatically by configure. */" > conftest.h
- cat conftest.in >> conftest.h
- rm -f conftest.in
- if cmp -s $ac_file conftest.h 2>/dev/null; then
- echo "$ac_file is unchanged"
- rm -f conftest.h
- else
- # Remove last slash and all that follows it. Not all systems have dirname.
- ac_dir=`echo $ac_file|sed 's%/[^/][^/]*$%%'`
- if test "$ac_dir" != "$ac_file" && test "$ac_dir" != .; then
- # The file is in a subdirectory.
- test ! -d "$ac_dir" && mkdir "$ac_dir"
- fi
- rm -f $ac_file
- mv conftest.h $ac_file
- fi
-fi; done
-
-EOF
-cat >> $CONFIG_STATUS <<EOF
-
-EOF
-cat >> $CONFIG_STATUS <<\EOF
-case x$CONFIG_HEADERS in xconfig.h:config.in) echo > stamp-h ;; esac
-exit 0
-EOF
-chmod +x $CONFIG_STATUS
-rm -fr confdefs* $ac_clean_files
-test "$no_create" = yes || ${CONFIG_SHELL-/bin/sh} $CONFIG_STATUS || exit 1
-
diff --git a/sim/ppc/configure.in b/sim/ppc/configure.in
deleted file mode 100644
index 728f136e966..00000000000
--- a/sim/ppc/configure.in
+++ /dev/null
@@ -1,745 +0,0 @@
-dnl Process this file with autoconf to produce a configure script.
-sinclude(../common/aclocal.m4)
-AC_PREREQ(2.5)dnl
-AC_INIT(Makefile.in)
-
-AC_PROG_INSTALL
-AC_PROG_CC
-
-# Put a plausible default for CC_FOR_BUILD in Makefile.
-if test "x$cross_compiling" = "xno"; then
- CC_FOR_BUILD='$(CC)'
-else
- CC_FOR_BUILD=gcc
-fi
-
-dnl We don't use gettext, but bfd does. So we do the appropriate checks
-dnl to see if there are intl libraries we should link against.
-ALL_LINGUAS=
-CY_GNU_GETTEXT
-
-
-AC_ARG_ENABLE(sim-alignment,
-[ --enable-sim-alignment=align Specify strict or nonstrict alignment.],
-[case "${enableval}" in
- yes | strict | STRICT) sim_alignment="-DWITH_ALIGNMENT=STRICT_ALIGNMENT";;
- no | nonstrict | NONSTRICT) sim_alignment="-DWITH_ALIGNMENT=NONSTRICT_ALIGNMENT";;
- 0 | default | DEFAULT) sim_alignment="-DWITH_ALIGNMENT=0";;
- *) AC_MSG_ERROR("Unknown value $enableval passed to --enable-sim-alignment"); sim_alignment="";;
-esac
-if test x"$silent" != x"yes" && test x"$sim_alignment" != x""; then
- echo "Setting alignment flags = $sim_alignment" 6>&1
-fi],[sim_alignment=""])dnl
-
-
-AC_ARG_ENABLE(sim-assert,
-[ --enable-sim-assert Specify whether to perform random assertions.],
-[case "${enableval}" in
- yes) sim_assert="-DWITH_ASSERT=1";;
- no) sim_assert="-DWITH_ASSERT=0";;
- *) AC_MSG_ERROR("--enable-sim-assert does not take a value"); sim_assert="";;
-esac
-if test x"$silent" != x"yes" && test x"$sim_assert" != x""; then
- echo "Setting assert flags = $sim_assert" 6>&1
-fi],[sim_assert=""])dnl
-
-
-AC_ARG_ENABLE(sim-bitsize,
-[ --enable-sim-bitsize=n Specify target bitsize (32 or 64).],
-[case "${enableval}" in
- 32|64) sim_bitsize="-DWITH_TARGET_WORD_BITSIZE=$enableval";;
- *) AC_MSG_ERROR("--enable-sim-bitsize was given $enableval. Expected 32 or 64"); sim_bitsize="";;
-esac
-if test x"$silent" != x"yes" && test x"$sim_bitsize" != x""; then
- echo "Setting bitsize flags = $sim_bitsize" 6>&1
-fi],[sim_bitsize=""])dnl
-
-
-AC_ARG_ENABLE(sim-bswap,
-[ --enable-sim-bswap Use the BSWAP instruction on Intel 486s and Pentiums.],
-[case "${enableval}" in
- yes) sim_bswap="-DWITH_BSWAP=1";;
- no) sim_bswap="-DWITH_BSWAP=0";;
- *) AC_MSG_ERROR("--enable-sim-bswap does not take a value"); sim_bswap="";;
-esac
-if test x"$silent" != x"yes" && test x"$sim_bswap" != x""; then
- echo "Setting bswap flags = $sim_bswap" 6>&1
-fi],[sim_bswap=""])dnl
-
-
-AC_ARG_ENABLE(sim-cflags,
-[ --enable-sim-cflags=opts Extra CFLAGS for use in building simulator],
-[case "${enableval}" in
- yes) sim_cflags="-O2 -fomit-frame-pointer";;
- no) sim_cflags="";;
- *) sim_cflags=`echo "${enableval}" | sed -e "s/,/ /g"`;;
-esac
-if test x"$silent" != x"yes" && test x"$sim_cflags" != x""; then
- echo "Setting sim cflags = $sim_cflags" 6>&1
-fi],[sim_cflags=""])dnl
-
-
-AC_ARG_ENABLE(sim-config,
-[ --enable-sim-config=file Override default config file],
-[case "${enableval}" in
- yes|no) AC_MSG_ERROR("No value supplied for --enable-sim-config=file");;
- *) if test -f "${srcdir}/${enableval}"; then
- sim_config="${enableval}";
- elif test -f "${srcdir}/${enableval}-config.h"; then
- sim_config="${enableval}-config.h"
- else
- AC_MSG_ERROR("Config file $enableval was not found");
- sim_config=std-config.h
- fi;;
-esac
-if test x"$silent" != x"yes" && test x"$sim_config" != x""; then
- echo "Setting config flags = $sim_config" 6>&1
-fi],[sim_config="std-config.h"
-if test x"$silent" != x"yes"; then
- echo "Setting config flags = $sim_config" 6>&1
-fi])dnl
-
-
-AC_ARG_ENABLE(sim-decode-mechanism,
-[ --enable-sim-decode-mechanism=which Specify the instruction decode mechanism.],
-[case "${enableval}" in
- yes|no) AC_MSG_ERROR("No value supplied for --enable-sim-decode-mechanism=file");;
- array|switch|padded-switch|goto-switch) sim_decode_mechanism="-T ${enableval}";;
- *) AC_MSG_ERROR("File $enableval is not an opcode rules file");
- sim_decode_mechanism="switch";;
-esac
-if test x"$silent" != x"yes" && test x"$sim_decode_mechanism" != x""; then
- echo "Setting decode mechanism flags = $sim_decode_mechanism" 6>&1
-fi],[sim_decode_mechanism=""
-if test x"$silent" != x"yes"; then
- echo "Setting decode mechanism flags = $sim_decode_mechanism"
-fi])dnl
-
-
-AC_ARG_ENABLE(sim-default-model,
-[ --enable-sim-default-model=which Specify default PowerPC to model.],
-[case "${enableval}" in
- yes|no) AC_MSG_ERROR("No value supplied for --enable-sim-default-model=model");;
- *) sim_default_model="-DWITH_DEFAULT_MODEL=${enableval}";;
-esac
-if test x"$silent" != x"yes" && test x"$sim_default_model" != x""; then
- echo "Setting default-model flags = $sim_default_model" 6>&1
-fi],[sim_default_model=""])dnl
-
-
-AC_ARG_ENABLE(sim-duplicate,
-[ --enable-sim-duplicate Expand (duplicate) semantic functions.],
-[case "${enableval}" in
- yes) sim_dup="-E";;
- no) sim_dup="";;
- *) AC_MSG_ERROR("--enable-sim-duplicate does not take a value"); sim_dup="";;
-esac
-if test x"$silent" != x"yes" && test x"$sim_dup" != x""; then
- echo "Setting duplicate flags = $sim_dup" 6>&1
-fi],[sim_dup="-E"
-if test x"$silent" != x"yes"; then
- echo "Setting duplicate flags = $sim_dup" 6>&1
-fi])dnl
-
-
-AC_ARG_ENABLE(sim-endian,
-[ --enable-sim-endian=endian Specify target byte endian orientation.],
-[case "${enableval}" in
- yes) case "$target" in
- *powerpc-*) sim_endian="-DWITH_TARGET_BYTE_ORDER=BIG_ENDIAN";;
- *powerpcle-*) sim_endian="-DWITH_TARGET_BYTE_ORDER=LITTLE_ENDIAN";;
- *) echo "Unknown target $target" 1>&6; sim_endian="-DWITH_TARGET_BYTE_ORDER=0";;
- esac;;
- no) sim_endian="-DWITH_TARGET_BYTE_ORDER=0";;
- b*|B*) sim_endian="-DWITH_TARGET_BYTE_ORDER=BIG_ENDIAN";;
- l*|L*) sim_endian="-DWITH_TARGET_BYTE_ORDER=LITTLE_ENDIAN";;
- *) AC_MSG_ERROR("Unknown value $enableval for --enable-sim-endian"); sim_endian="";;
-esac
-if test x"$silent" != x"yes" && test x"$sim_endian" != x""; then
- echo "Setting endian flags = $sim_endian" 6>&1
-fi],[sim_endian=""])dnl
-
-
-AC_ARG_ENABLE(sim-env,
-[ --enable-sim-env=env Specify target environment (operating, virtual, user).],
-[case "${enableval}" in
- operating | os | oea) sim_env="-DWITH_ENVIRONMENT=OPERATING_ENVIRONMENT";;
- virtual | vea) sim_env="-DWITH_ENVIRONMENT=VIRTUAL_ENVIRONMENT";;
- user | uea) sim_env="-DWITH_ENVIRONMENT=USER_ENVIRONMENT";;
- no) sim_env="-DWITH_ENVIRONMENT=0";;
- *) AC_MSG_ERROR("Unknown value $enableval passed to --enable-sim-env"); sim_env="";;
-esac
-if test x"$silent" != x"yes" && test x"$sim_env" != x""; then
- echo "Setting env flags = $sim_env" 6>&1
-fi],[sim_env=""])dnl
-
-
-AC_ARG_ENABLE(sim-filter,
-[ --enable-sim-filter=rule Specify filter rules.],
-[case "${enableval}" in
- yes) AC_MSG_ERROR("--enable-sim-filter must be specified with a rule to filter or no"); sim_filter="";;
- no) sim_filter="";;
- *) sim_filter="-F $enableval";;
-esac
-if test x"$silent" != x"yes" && test x"$sim_filter" != x""; then
- echo "Setting filter flags = $sim_filter" 6>&1
-fi],[sim_filter="-F 32,f,o"
-if test x"$silent" != x"yes"; then
- echo "Setting filter flags = $sim_filter" 6>&1
-fi])dnl
-
-
-AC_ARG_ENABLE(sim-float,
-[ --enable-sim-float Specify whether to use host floating point or simulate.],
-[case "${enableval}" in
- yes | hard) sim_float="-DWITH_FLOATING_POINT=HARD_FLOATING_POINT";;
- no | soft) sim_float="-DWITH_FLOATING_POINT=SOFT_FLOATING_POINT";;
- *) AC_MSG_ERROR("Unknown value $enableval passed to --enable-sim-float"); sim_float="";;
-esac
-if test x"$silent" != x"yes" && test x"$sim_float" != x""; then
- echo "Setting float flags = $sim_float" 6>&1
-fi],[sim_float=""])dnl
-
-
-AC_ARG_ENABLE(sim-hardware,
-[ --enable-sim-hardware=list Specify the hardware to be included in the build.],
-[hardware="cpu,memory,nvram,iobus,htab,disk,trace,register,vm,init,core,pal,com,eeprom,opic,glue,phb,ide"
-case "${enableval}" in
- yes) ;;
- no) AC_MSG_ERROR("List of hardware must be specified for --enable-sim-hardware"); hardware="";;
- ,*) hardware="${hardware}${enableval}";;
- *,) hardware="${enableval}${hardware}";;
- *) hardware="${enableval}"'';;
-esac
-sim_hw_src=`echo $hardware | sed -e 's/,/.c hw_/g' -e 's/^/hw_/' -e s'/$/.c/'`
-sim_hw_obj=`echo $sim_hw_src | sed -e 's/\.c/.o/g'`
-if test x"$silent" != x"yes" && test x"$hardware" != x""; then
- echo "Setting hardware to $sim_hw_src, $sim_hw_obj"
-fi],[hardware="cpu,memory,nvram,iobus,htab,disk,trace,register,vm,init,core,pal,com,eeprom,opic,glue,phb,ide"
-sim_hw_src=`echo $hardware | sed -e 's/,/.c hw_/g' -e 's/^/hw_/' -e s'/$/.c/'`
-sim_hw_obj=`echo $sim_hw_src | sed -e 's/\.c/.o/g'`
-if test x"$silent" != x"yes"; then
- echo "Setting hardware to $sim_hw_src, $sim_hw_obj"
-fi])dnl
-
-
-AC_ARG_ENABLE(sim-hostbitsize,
-[ --enable-sim-hostbitsize=32|64 Specify host bitsize (32 or 64).],
-[case "${enableval}" in
- 32|64) sim_hostbitsize="-DWITH_HOST_WORD_BITSIZE=$enableval";;
- *) AC_MSG_ERROR("--enable-sim-hostbitsize was given $enableval. Expected 32 or 64"); sim_hostbitsize="";;
-esac
-if test x"$silent" != x"yes" && test x"$sim_hostbitsize" != x""; then
- echo "Setting hostbitsize flags = $sim_hostbitsize" 6>&1
-fi],[sim_hostbitsize=""])dnl
-
-
-AC_ARG_ENABLE(sim-hostendian,
-[ --enable-sim-hostendian=end Specify host byte endian orientation.],
-[case "${enableval}" in
- no) sim_hostendian="-DWITH_HOST_BYTE_ORDER=0";;
- b*|B*) sim_hostendian="-DWITH_HOST_BYTE_ORDER=BIG_ENDIAN";;
- l*|L*) sim_hostendian="-DWITH_HOST_BYTE_ORDER=LITTLE_ENDIAN";;
- *) AC_MSG_ERROR("Unknown value $enableval for --enable-sim-hostendian"); sim_hostendian="";;
-esac
-if test x"$silent" != x"yes" && test x"$sim_hostendian" != x""; then
- echo "Setting hostendian flags = $sim_hostendian" 6>&1
-fi],[
-if test "x$cross_compiling" = "xno"; then
- AC_C_BIGENDIAN
- if test $ac_cv_c_bigendian = yes; then
- sim_hostendian="-DWITH_HOST_BYTE_ORDER=BIG_ENDIAN"
- else
- sim_hostendian="-DWITH_HOST_BYTE_ORDER=LITTLE_ENDIAN"
- fi
-else
- sim_hostendian="-DWITH_HOST_BYTE_ORDER=0"
-fi])dnl
-
-
-AC_ARG_ENABLE(sim-icache,
-[ --enable-sim-icache=size Specify instruction-decode cache size and type.],
-[icache="-R"
- case "${enableval}" in
- yes) icache="1024"; sim_icache="-I $icache";;
- no) sim_icache="-R";;
- *) icache=1024
- sim_icache="-"
- for x in `echo "${enableval}" | sed -e "s/,/ /g"`; do
- case "$x" in
- define) sim_icache="${sim_icache}R";;
- semantic) sim_icache="${sim_icache}C";;
- insn) sim_icache="${sim_icache}S";;
- 0*|1*|2*|3*|4*|5*|6*|7*|8*|9*) icache=$x;;
- *) AC_MSG_ERROR("Unknown value $x for --enable-sim-icache"); sim_icache="";;
- esac
- done
- sim_icache="${sim_icache}I $icache";;
-esac
-if test x"$silent" != x"yes" && test x"$icache" != x""; then
- echo "Setting instruction cache size to $icache ($sim_icache)"
-fi],[sim_icache="-CSRI 1024"
-if test x"$silent" != x"yes"; then
- echo "Setting instruction cache size to 1024 ($sim_icache)"
-fi])dnl
-
-
-AC_ARG_ENABLE(sim-inline,
-[ --enable-sim-inline=inlines Specify which functions should be inlined.],
-[sim_inline=""
-case "$enableval" in
- no) sim_inline="-DDEFAULT_INLINE=0";;
- 0) sim_inline="-DDEFAULT_INLINE=0";;
- yes | 2) sim_inline="-DDEFAULT_INLINE=ALL_INLINE";;
- 1) sim_inline="-DDEFAULT_INLINE=INLINE_LOCALS";;
- *) for x in `echo "$enableval" | sed -e "s/,/ /g"`; do
- new_flag=""
- case "$x" in
- *_INLINE=*) new_flag="-D$x";;
- *=*) new_flag=`echo "$x" | sed -e "s/=/_INLINE=/" -e "s/^/-D/"`;;
- *_INLINE) new_flag="-D$x=ALL_INLINE";;
- *) new_flag="-D$x""_INLINE=ALL_INLINE";;
- esac
- if test x"$sim_inline" = x""; then
- sim_inline="$new_flag"
- else
- sim_inline="$sim_inline $new_flag"
- fi
- done;;
-esac
-if test x"$silent" != x"yes" && test x"$sim_inline" != x""; then
- echo "Setting inline flags = $sim_inline" 6>&1
-fi],[if test x"$GCC" != ""; then
- sim_inline="-DDEFAULT_INLINE=INLINE_LOCALS"
- if test x"$silent" != x"yes"; then
- echo "Setting inline flags = $sim_inline" 6>&1
- fi
-else
- sim_inline=""
-fi])dnl
-
-
-AC_ARG_ENABLE(sim-jump,
-[ --enable-sim-jump Jump between semantic code (instead of call/return).],
-[case "${enableval}" in
- yes) sim_jump="-J";;
- no) sim_jump="";;
- *) AC_MSG_ERROR("--enable-sim-jump does not take a value"); sim_jump="";;
-esac
-if test x"$silent" != x"yes" && test x"$sim_jump" != x""; then
- echo "Setting jump flag = $sim_jump" 6>&1
-fi],[sim_jump=""
-if test x"$silent" != x"yes"; then
- echo "Setting jump flag = $sim_jump" 6>&1
-fi])dnl
-
-
-AC_ARG_ENABLE(sim-line-nr,
-[ --enable-sim-line-nr=opts Generate extra CPP code that references source rather than generated code],
-[case "${enableval}" in
- yes) sim_line_nr="";;
- no) sim_line_nr="-L";;
- *) AC_MSG_ERROR("--enable-sim-line-nr does not take a value"); sim_line_nr="";;
-esac
-if test x"$silent" != x"yes" && test x"$sim_line_nr" != x""; then
- echo "Setting warning flags = $sim_line_nr" 6>&1
-fi],[sim_line_nr=""])dnl
-
-
-AC_ARG_ENABLE(sim-model,
-[ --enable-sim-model=which Specify PowerPC to model.],
-[case "${enableval}" in
- yes|no) AC_MSG_ERROR("No value supplied for --enable-sim-model=model");;
- *) sim_model="-DWITH_MODEL=${enableval}";;
-esac
-if test x"$silent" != x"yes" && test x"$sim_model" != x""; then
- echo "Setting model flags = $sim_model" 6>&1
-fi],[sim_model=""])dnl
-
-
-AC_ARG_ENABLE(sim-model-issue,
-[ --enable-sim-model-issue Specify whether to simulate model specific actions],
-[case "${enableval}" in
- yes) sim_model_issue="-DWITH_MODEL_ISSUE=MODEL_ISSUE_PROCESS";;
- no) sim_model_issue="-DWITH_MODEL_ISSUE=MODEL_ISSUE_IGNORE";;
- *) AC_MSG_ERROR("--enable-sim-model-issue does not take a value"); sim_model_issue="";;
-esac
-if test x"$silent" != x"yes"; then
- echo "Setting model-issue flags = $sim_model_issue" 6>&1
-fi],[sim_model_issue=""])dnl
-
-
-AC_ARG_ENABLE(sim-monitor,
-[ --enable-sim-monitor=mon Specify whether to enable monitoring events.],
-[case "${enableval}" in
- yes) sim_monitor="-DWITH_MON='MONITOR_INSTRUCTION_ISSUE | MONITOR_LOAD_STORE_UNIT'";;
- no) sim_monitor="-DWITH_MON=0";;
- instruction) sim_monitor="-DWITH_MON=MONITOR_INSTRUCTION_ISSUE";;
- memory) sim_monitor="-DWITH_MON=MONITOR_LOAD_STORE_UNIT";;
- *) AC_MSG_ERROR("Unknown value $enableval passed to --enable-sim-mon"); sim_env="";;
-esac
-if test x"$silent" != x"yes" && test x"$sim_monitor" != x""; then
- echo "Setting monitor flags = $sim_monitor" 6>&1
-fi],[sim_monitor=""])dnl
-
-
-AC_ARG_ENABLE(sim-opcode,
-[ --enable-sim-opcode=which Override default opcode lookup.],
-[case "${enableval}" in
- yes|no) AC_MSG_ERROR("No value supplied for --enable-sim-opcode=file");;
- *) if test -f "${srcdir}/${enableval}"; then
- sim_opcode="${enableval}"
- elif test -f "${srcdir}/dc-${enableval}"; then
- sim_opcode="dc-${enableval}"
- else
- AC_MSG_ERROR("File $enableval is not an opcode rules file");
- sim_opcode="dc-complex"
- fi;;
-esac
-if test x"$silent" != x"yes" && test x"$sim_opcode" != x""; then
- echo "Setting opcode flags = $sim_opcode" 6>&1
-fi],[sim_opcode="dc-complex"
-if test x"$silent" != x"yes"; then
- echo "Setting opcode flags = $sim_opcode"
-fi])dnl
-
-
-AC_ARG_ENABLE(sim-packages,
-[ --enable-sim-packages=list Specify the packages to be included in the build.],
-[packages=disklabel
-case "${enableval}" in
- yes) ;;
- no) AC_MSG_ERROR("List of packages must be specified for --enable-sim-packages"); packages="";;
- ,*) packages="${packages}${enableval}";;
- *,) packages="${enableval}${packages}";;
- *) packages="${enableval}"'';;
-esac
-sim_pk_src=`echo $packages | sed -e 's/,/.c pk_/g' -e 's/^/pk_/' -e 's/$/.c/'`
-sim_pk_obj=`echo $sim_pk_src | sed -e 's/\.c/.o/g'`
-if test x"$silent" != x"yes" && test x"$packages" != x""; then
- echo "Setting packages to $sim_pk_src, $sim_pk_obj"
-fi],[packages=disklabel
-sim_pk_src=`echo $packages | sed -e 's/,/.c pk_/g' -e 's/^/pk_/' -e 's/$/.c/'`
-sim_pk_obj=`echo $sim_pk_src | sed -e 's/\.c/.o/g'`
-if test x"$silent" != x"yes"; then
- echo "Setting packages to $sim_pk_src, $sim_pk_obj"
-fi])dnl
-
-
-AC_ARG_ENABLE(sim-regparm,
-[ --enable-sim-regparm=nr-parm Pass parameters in registers instead of on the stack - x86/GCC specific.],
-[case "${enableval}" in
- 0*|1*|2*|3*|4*|5*|6*|7*|8*|9*) sim_regparm="-DWITH_REGPARM=${enableval}";;
- no) sim_regparm="" ;;
- yes) sim_regparm="-DWITH_REGPARM=3";;
- *) AC_MSG_ERROR("Unknown value $enableval for --enable-sim-regparm"); sim_regparm="";;
-esac
-if test x"$silent" != x"yes" && test x"$sim_regparm" != x""; then
- echo "Setting regparm flags = $sim_regparm" 6>&1
-fi],[sim_regparm=""])dnl
-
-
-AC_ARG_ENABLE(sim-reserved-bits,
-[ --enable-sim-reserved-bits Specify whether to check reserved bits in instruction.],
-[case "${enableval}" in
- yes) sim_reserved="-DWITH_RESERVED_BITS=1";;
- no) sim_reserved="-DWITH_RESERVED_BITS=0";;
- *) AC_MSG_ERROR("--enable-sim-reserved-bits does not take a value"); sim_reserved="";;
-esac
-if test x"$silent" != x"yes" && test x"$sim_reserved" != x""; then
- echo "Setting reserved flags = $sim_reserved" 6>&1
-fi],[sim_reserved=""])dnl
-
-
-AC_ARG_ENABLE(sim-smp,
-[ --enable-sim-smp=n Specify number of processors to configure for.],
-[case "${enableval}" in
- yes) sim_smp="-DWITH_SMP=5" ; sim_igen_smp="-N 5";;
- no) sim_smp="-DWITH_SMP=0" ; sim_igen_smp="-N 0";;
- *) sim_smp="-DWITH_SMP=$enableval" ; sim_igen_smp="-N $enableval";;
-esac
-if test x"$silent" != x"yes" && test x"$sim_smp" != x""; then
- echo "Setting smp flags = $sim_smp" 6>&1
-fi],[sim_smp="-DWITH_SMP=5" ; sim_igen_smp="-N 5"
-if test x"$silent" != x"yes"; then
- echo "Setting smp flags = $sim_smp" 6>&1
-fi])dnl
-
-
-AC_ARG_ENABLE(sim-stdcall,
-[ --enable-sim-stdcall=type Use an alternative function call/return mechanism - x86/GCC specific.],
-[case "${enableval}" in
- no) sim_stdcall="" ;;
- std*) sim_stdcall="-DWITH_STDCALL=1";;
- yes) sim_stdcall="-DWITH_STDCALL=1";;
- *) AC_MSG_ERROR("Unknown value $enableval for --enable-sim-stdcall"); sim_stdcall="";;
-esac
-if test x"$silent" != x"yes" && test x"$sim_stdcall" != x""; then
- echo "Setting function call flags = $sim_stdcall" 6>&1
-fi],[sim_stdcall=""])dnl
-
-
-AC_ARG_ENABLE(sim-stdio,
-[ --enable-sim-stdio Specify whether to use stdio for console input/output.],
-[case "${enableval}" in
- yes) sim_stdio="-DWITH_STDIO=DO_USE_STDIO";;
- no) sim_stdio="-DWITH_STDIO=DONT_USE_STDIO";;
- *) AC_MSG_ERROR("Unknown value $enableval passed to --enable-sim-stdio"); sim_stdio="";;
-esac
-if test x"$silent" != x"yes" && test x"$sim_stdio" != x""; then
- echo "Setting stdio flags = $sim_stdio" 6>&1
-fi],[sim_stdio=""])dnl
-
-
-AC_ARG_ENABLE(sim-switch,
-[ --enable-sim-switch Use a switch instead of a table for instruction call.],
-[case "${enableval}" in
- yes) sim_switch="-s";;
- no) sim_switch="";;
- *) AC_MSG_ERROR("--enable-sim-switch does not take a value"); sim_switch="";;
-esac
-if test x"$silent" != x"yes" && test x"$sim_switch" != x""; then
- echo "Setting switch flags = $sim_switch" 6>&1
-fi],[sim_switch="";
-if test x"$silent" != x"yes"; then
- echo "Setting switch flags = $sim_switch" 6>&1
-fi])dnl
-
-
-AC_ARG_ENABLE(sim-timebase,
-[ --enable-sim-timebase Specify whether the PPC timebase is supported.],
-[case "${enableval}" in
- yes) sim_timebase="-DWITH_TIME_BASE=1";;
- no) sim_timebase="-DWITH_TIME_BASE=0";;
- *) AC_MSG_ERROR("--enable-sim-timebase does not take a value"); sim_timebase="";;
-esac
-if test x"$silent" != x"yes" && test x"$sim_timebase" != x""; then
- echo "Setting timebase flags = $sim_timebase" 6>&1
-fi],[sim_timebase=""])dnl
-
-
-AC_ARG_ENABLE(sim-trace,
-[ --enable-sim-trace Specify whether tracing is supported.],
-[case "${enableval}" in
- yes) sim_trace="-DWITH_TRACE=1";;
- no) sim_trace="-DWITH_TRACE=0";;
- *) AC_MSG_ERROR("--enable-sim-trace does not take a value"); sim_trace="";;
-esac
-if test x"$silent" != x"yes" && test x"$sim_trace" != x""; then
- echo "Setting trace flags = $sim_trace" 6>&1
-fi],[sim_trace=""])dnl
-
-
-AC_ARG_ENABLE(sim-warnings,
-[ --enable-sim-warnings=opts Extra CFLAGS for turning on compiler warnings except for idecode.o, semantics.o and psim.o],
-[case "${enableval}" in
- yes) sim_warnings="-Werror -Wall -Wpointer-arith -Wmissing-prototypes -Wmissing-declarations ";;
- no) sim_warnings="-w";;
- *) sim_warnings=`echo "${enableval}" | sed -e "s/,/ /g"`;;
-esac
-if test x"$silent" != x"yes" && test x"$sim_warnings" != x""; then
- echo "Setting warning flags = $sim_warnings" 6>&1
-fi],[sim_warnings=""])dnl
-
-
-AC_ARG_ENABLE(sim-xor-endian,
-[ --enable-sim-xor-endian=n Specify number bytes involved in PowerPC XOR bi-endian mode (default 8).],
-[case "${enableval}" in
- yes) sim_xor_endian="-DWITH_XOR_ENDIAN=8";;
- no) sim_xor_endian="-DWITH_XOR_ENDIAN=0";;
- *) sim_xor_endian="-DWITH_XOR_ENDIAN=$enableval";;
-esac
-if test x"$silent" != x"yes" && test x"$sim_xor_endian" != x""; then
- echo "Setting xor-endian flag = $sim_xor_endian" 6>&1
-fi],[sim_xor_endian=""])dnl
-
-
-AC_CONFIG_AUX_DIR(`cd $srcdir;pwd`/../..)
-AC_CANONICAL_SYSTEM
-AC_ARG_PROGRAM
-
-. ${srcdir}/../../bfd/configure.host
-
-AC_CONFIG_HEADER(config.h:config.in)
-
-AC_STRUCT_ST_BLKSIZE
-AC_STRUCT_ST_BLOCKS
-AC_STRUCT_ST_RDEV
-AC_STRUCT_TIMEZONE
-
-AC_TYPE_GETGROUPS
-AC_TYPE_MODE_T
-AC_TYPE_OFF_T
-AC_TYPE_PID_T
-AC_TYPE_SIGNAL
-AC_TYPE_SIZE_T
-AC_TYPE_UID_T
-
-AC_CHECK_FUNCS(access cfgetispeed cfgetospeed cfsetispeed cfsetospeed chdir chmod chown dup dup2 fchmod fchown fcntl fstat fstatfs getdirentries getegid geteuid getgid getpid getppid getrusage gettimeofday getuid ioctl kill link lseek lstat mkdir pipe readlink rmdir setreuid setregid stat sigprocmask stat symlink tcgetattr tcsetattr tcsendbreak tcdrain tcflush tcflow tcgetpgrp tcsetpgrp time umask unlink)
-
-AC_CHECK_HEADERS(fcntl.h stdlib.h string.h strings.h sys/ioctl.h sys/param.h sys/resource.h sys/stat.h sys/termio.h sys/termios.h sys/time.h sys/times.h sys/types.h time.h unistd.h)
-AC_HEADER_DIRENT
-
-dnl Figure out what type of termio/termios support there is
-sim_termio=""
-AC_MSG_CHECKING(for struct termios)
-AC_CACHE_VAL(ac_cv_termios_struct,
-[AC_TRY_COMPILE([#include <sys/types.h>
-#include <sys/termios.h>],
-[static struct termios x;
- x.c_iflag = 0;
- x.c_oflag = 0;
- x.c_cflag = 0;
- x.c_lflag = 0;
- x.c_cc[NCCS] = 0;],
-ac_cv_termios_struct=yes, ac_cv_termios_struct=no)])
-AC_MSG_RESULT($ac_cv_termios_struct)
-if test $ac_cv_termios_struct = yes; then
- sim_termio="$sim_termio -DHAVE_TERMIOS_STRUCTURE"
-fi
-
-if test "$ac_cv_termios_struct" = "yes"; then
- AC_MSG_CHECKING(for c_line field in struct termios)
- AC_CACHE_VAL(ac_cv_termios_cline,
- [AC_TRY_COMPILE([#include <sys/types.h>
-#include <sys/termios.h>],
-[static struct termios x; x.c_line = 0;],
- ac_cv_termios_cline=yes, ac_cv_termios_cline=no)])
-
- AC_MSG_RESULT($ac_cv_termios_cline)
- if test $ac_cv_termios_cline = yes; then
- sim_termio="$sim_termio -DHAVE_TERMIOS_CLINE"
- fi
-else
- ac_cv_termios_cline=no
-fi
-
-if test "$ac_cv_termios_struct" != "yes"; then
- AC_MSG_CHECKING(for struct termio)
- AC_CACHE_VAL(ac_cv_termio_struct,
- [AC_TRY_COMPILE([#include <sys/types.h>
-#include <sys/termio.h>],
-[static struct termio x;
- x.c_iflag = 0;
- x.c_oflag = 0;
- x.c_cflag = 0;
- x.c_lflag = 0;
- x.c_cc[NCC] = 0;],
-ac_cv_termio_struct=yes, ac_cv_termio_struct=no)])
- AC_MSG_RESULT($ac_cv_termio_struct)
- if test $ac_cv_termio_struct = yes; then
- sim_termio="$sim_termio -DHAVE_TERMIO_STRUCTURE"
- fi
-else
- ac_cv_termio_struct=no
-fi
-
-if test "$ac_cv_termio_struct" = "yes"; then
- AC_MSG_CHECKING(for c_line field in struct termio)
- AC_CACHE_VAL(ac_cv_termio_cline,
- [AC_TRY_COMPILE([#include <sys/types.h>
-#include <sys/termio.h>],
-[static struct termio x; x.c_line = 0;],
- ac_cv_termio_cline=yes, ac_cv_termio_cline=no)])
-
- AC_MSG_RESULT($ac_cv_termio_cline)
- if test $ac_cv_termio_cline = yes; then
- sim_termio="$sim_termio -DHAVE_TERMIO_CLINE"
- fi
-else
- ac_cv_termio_cline=no
-fi
-
-dnl Figure out if /dev/zero exists or not
-sim_devzero=""
-AC_MSG_CHECKING(for /dev/zero)
-AC_CACHE_VAL(ac_cv_devzero,
-[AC_TRY_RUN([#include <fcntl.h>
-main () {
- char buf[2048];
- int i;
- int fd = open ("/dev/zero", O_RDONLY);
- if (fd < 0)
- return 1;
- for (i = 0; i < sizeof (buf); i++)
- buf[i] = 1;
- if (read (fd, buf, sizeof (buf)) != sizeof (buf))
- return 1;
- for (i = 0; i < sizeof (buf); i++)
- if (buf[i])
- return 1;
- return 0;
-}],[ac_cv_devzero=yes],[ac_cv_devzero=no],[ac_cv_devzero=no])])
-AC_MSG_RESULT($ac_cv_devzero)
-if test $ac_cv_devzero = yes; then
- sim_devzero="-DHAVE_DEVZERO"
-else
- sim_devzero=""
-fi
-
-dnl Figure out if we are in the new Cygnus tree with a common directory or not
-AC_MSG_CHECKING(for common simulator directory)
-if test -f "${srcdir}/../common/callback.c"; then
- AC_MSG_RESULT(yes)
- sim_callback="callback.o targ-map.o"
- sim_targ_vals="targ-vals.h targ-map.c targ-vals.def"
-else
- AC_MSG_RESULT(no)
- sim_callback=""
- sim_targ_vals=""
-fi
-
-dnl Check for exe extension
-AC_EXEEXT
-
-AC_SUBST(CC_FOR_BUILD)
-AC_SUBST(CFLAGS)
-AC_SUBST(HDEFINES)
-AR=${AR-ar}
-AC_SUBST(AR)
-AC_PROG_RANLIB
-AC_SUBST(sim_cflags)
-AC_SUBST(sim_warnings)
-AC_SUBST(sim_line_nr)
-AC_SUBST(sim_config)
-AC_SUBST(sim_opcode)
-AC_SUBST(sim_switch)
-AC_SUBST(sim_dup)
-AC_SUBST(sim_decode_mechanism)
-AC_SUBST(sim_jump)
-AC_SUBST(sim_filter)
-AC_SUBST(sim_icache)
-AC_SUBST(sim_hw_src)
-AC_SUBST(sim_hw_obj)
-AC_SUBST(sim_pk_src)
-AC_SUBST(sim_pk_obj)
-AC_SUBST(sim_inline)
-AC_SUBST(sim_bswap)
-AC_SUBST(sim_endian)
-AC_SUBST(sim_regparm)
-AC_SUBST(sim_stdcall)
-AC_SUBST(sim_xor_endian)
-AC_SUBST(sim_hostendian)
-AC_SUBST(sim_smp)
-AC_SUBST(sim_igen_smp)
-AC_SUBST(sim_bitsize)
-AC_SUBST(sim_hostbitsize)
-AC_SUBST(sim_env)
-AC_SUBST(sim_timebase)
-AC_SUBST(sim_alignment)
-AC_SUBST(sim_float)
-AC_SUBST(sim_trace)
-AC_SUBST(sim_assert)
-AC_SUBST(sim_reserved)
-AC_SUBST(sim_monitor)
-AC_SUBST(sim_model)
-AC_SUBST(sim_default_model)
-AC_SUBST(sim_model_issue)
-AC_SUBST(sim_stdio)
-AC_SUBST(sim_termio)
-AC_SUBST(sim_devzero)
-AC_SUBST(sim_callback)
-AC_SUBST(sim_targ_vals)
-
-AC_OUTPUT(Makefile,
-[case x$CONFIG_HEADERS in xconfig.h:config.in) echo > stamp-h ;; esac])
diff --git a/sim/ppc/corefile-n.h b/sim/ppc/corefile-n.h
deleted file mode 100644
index 0e4cae8fcbc..00000000000
--- a/sim/ppc/corefile-n.h
+++ /dev/null
@@ -1,97 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1996, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-#ifndef N
-#error "N must be #defined"
-#endif
-
-/* NOTE: see end of file for #undef of these macros */
-#define unsigned_N XCONCAT2(unsigned_,N)
-#define T2H_N XCONCAT2(T2H_,N)
-#define H2T_N XCONCAT2(H2T_,N)
-
-#define core_map_read_N XCONCAT2(core_map_read_,N)
-#define core_map_write_N XCONCAT2(core_map_write_,N)
-
-INLINE_CORE(unsigned_N)
-core_map_read_N(core_map *map,
- unsigned_word addr,
- cpu *processor,
- unsigned_word cia)
-{
- core_mapping *mapping = core_map_find_mapping(map,
- addr,
- sizeof(unsigned_N),
- processor,
- cia,
- 1); /*abort*/
- if (WITH_CALLBACK_MEMORY && mapping->device != NULL) {
- unsigned_N data;
- if (device_io_read_buffer(mapping->device,
- &data,
- mapping->space,
- addr,
- sizeof(unsigned_N), /* nr_bytes */
- processor,
- cia) != sizeof(unsigned_N))
- device_error(mapping->device, "internal error - core_read_N() - io_read_buffer should not fail");
- return T2H_N(data);
- }
- else
- return T2H_N(*(unsigned_N*)core_translate(mapping, addr));
-}
-
-
-
-INLINE_CORE(void)
-core_map_write_N(core_map *map,
- unsigned_word addr,
- unsigned_N val,
- cpu *processor,
- unsigned_word cia)
-{
- core_mapping *mapping = core_map_find_mapping(map,
- addr,
- sizeof(unsigned_N),
- processor,
- cia,
- 1); /*abort*/
- if (WITH_CALLBACK_MEMORY && mapping->device != NULL) {
- unsigned_N data = H2T_N(val);
- if (device_io_write_buffer(mapping->device,
- &data,
- mapping->space,
- addr,
- sizeof(unsigned_N), /* nr_bytes */
- processor,
- cia) != sizeof(unsigned_N))
- device_error(mapping->device, "internal error - core_write_N() - io_write_buffer should not fail");
- }
- else
- *(unsigned_N*)core_translate(mapping, addr) = H2T_N(val);
-}
-
-/* NOTE: see start of file for #define of these macros */
-#undef unsigned_N
-#undef T2H_N
-#undef H2T_N
-#undef core_map_read_N
-#undef core_map_write_N
diff --git a/sim/ppc/corefile.c b/sim/ppc/corefile.c
deleted file mode 100644
index 00295bb2a62..00000000000
--- a/sim/ppc/corefile.c
+++ /dev/null
@@ -1,415 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1996, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-#ifndef _CORE_C_
-#define _CORE_C_
-
-#include "basics.h"
-#include "device_table.h"
-#include "corefile.h"
-
-typedef struct _core_mapping core_mapping;
-struct _core_mapping {
- /* common */
- int level;
- int space;
- unsigned_word base;
- unsigned_word bound;
- unsigned nr_bytes;
- /* memory map */
- void *free_buffer;
- void *buffer;
- /* callback map */
- device *device;
- /* growth */
- core_mapping *next;
-};
-
-struct _core_map {
- core_mapping *first;
-};
-
-typedef enum {
- core_read_map,
- core_write_map,
- core_execute_map,
- nr_core_map_types,
-} core_map_types;
-
-struct _core {
- core_map map[nr_core_map_types];
-};
-
-
-INLINE_CORE\
-(core *)
-core_create(void)
-{
- return ZALLOC(core);
-}
-
-
-INLINE_CORE\
-(core *)
-core_from_device(device *root)
-{
- root = device_root(root);
- ASSERT(strcmp(device_name(root), "core") == 0);
- return device_data(root);
-}
-
-
-INLINE_CORE\
-(void)
-core_init(core *memory)
-{
- core_map_types access_type;
- for (access_type = 0;
- access_type < nr_core_map_types;
- access_type++) {
- core_map *map = memory->map + access_type;
- /* blow away old mappings */
- core_mapping *curr = map->first;
- while (curr != NULL) {
- core_mapping *tbd = curr;
- curr = curr->next;
- if (tbd->free_buffer != NULL) {
- ASSERT(tbd->buffer != NULL);
- zfree(tbd->free_buffer);
- }
- zfree(tbd);
- }
- map->first = NULL;
- }
-}
-
-
-
-/* the core has three sub mappings that the more efficient
- read/write fixed quantity functions use */
-
-INLINE_CORE\
-(core_map *)
-core_readable(core *memory)
-{
- return memory->map + core_read_map;
-}
-
-INLINE_CORE\
-(core_map *)
-core_writeable(core *memory)
-{
- return memory->map + core_write_map;
-}
-
-INLINE_CORE\
-(core_map *)
-core_executable(core *memory)
-{
- return memory->map + core_execute_map;
-}
-
-
-
-STATIC_INLINE_CORE\
-(core_mapping *)
-new_core_mapping(attach_type attach,
- int space,
- unsigned_word addr,
- unsigned nr_bytes,
- device *device,
- void *buffer,
- void *free_buffer)
-{
- core_mapping *new_mapping = ZALLOC(core_mapping);
- /* common */
- new_mapping->level = attach;
- new_mapping->space = space;
- new_mapping->base = addr;
- new_mapping->nr_bytes = nr_bytes;
- new_mapping->bound = addr + (nr_bytes - 1);
- if (attach == attach_raw_memory) {
- new_mapping->buffer = buffer;
- new_mapping->free_buffer = free_buffer;
- }
- else if (attach >= attach_callback) {
- new_mapping->device = device;
- }
- else {
- error("new_core_mapping() - internal error - unknown attach type %d\n",
- attach);
- }
- return new_mapping;
-}
-
-
-STATIC_INLINE_CORE\
-(void)
-core_map_attach(core_map *access_map,
- attach_type attach,
- int space,
- unsigned_word addr,
- unsigned nr_bytes, /* host limited */
- device *client, /*callback/default*/
- void *buffer, /*raw_memory*/
- void *free_buffer) /*raw_memory*/
-{
- /* find the insertion point for this additional mapping and insert */
- core_mapping *next_mapping;
- core_mapping **last_mapping;
-
- /* actually do occasionally get a zero size map */
- if (nr_bytes == 0) {
- device_error(client, "called on core_map_attach() with size zero");
- }
-
- /* find the insertion point (between last/next) */
- next_mapping = access_map->first;
- last_mapping = &access_map->first;
- while(next_mapping != NULL
- && (next_mapping->level < attach
- || (next_mapping->level == attach
- && next_mapping->bound < addr))) {
- /* provided levels are the same */
- /* assert: next_mapping->base > all bases before next_mapping */
- /* assert: next_mapping->bound >= all bounds before next_mapping */
- last_mapping = &next_mapping->next;
- next_mapping = next_mapping->next;
- }
-
- /* check insertion point correct */
- ASSERT(next_mapping == NULL || next_mapping->level >= attach);
- if (next_mapping != NULL && next_mapping->level == attach
- && next_mapping->base < (addr + (nr_bytes - 1))) {
- device_error(client, "map overlap when attaching %d:0x%lx (%ld)",
- space, (long)addr, (long)nr_bytes);
- }
-
- /* create/insert the new mapping */
- *last_mapping = new_core_mapping(attach,
- space, addr, nr_bytes,
- client, buffer, free_buffer);
- (*last_mapping)->next = next_mapping;
-}
-
-
-INLINE_CORE\
-(void)
-core_attach(core *memory,
- attach_type attach,
- int space,
- access_type access,
- unsigned_word addr,
- unsigned nr_bytes, /* host limited */
- device *client) /*callback/default*/
-{
- core_map_types access_map;
- void *buffer;
- void *free_buffer;
- if (attach == attach_raw_memory) {
- /* Padd out the raw buffer to ensure that ADDR starts on a
- correctly aligned boundary */
- int padding = (addr % sizeof (unsigned64));
- free_buffer = zalloc(nr_bytes + padding);
- buffer = (char*)free_buffer + padding;
- }
- else {
- buffer = NULL;
- free_buffer = &buffer; /* marker for assertion */
- }
- for (access_map = 0;
- access_map < nr_core_map_types;
- access_map++) {
- switch (access_map) {
- case core_read_map:
- if (access & access_read)
- core_map_attach(memory->map + access_map,
- attach,
- space, addr, nr_bytes,
- client, buffer, free_buffer);
- free_buffer = NULL;
- break;
- case core_write_map:
- if (access & access_write)
- core_map_attach(memory->map + access_map,
- attach,
- space, addr, nr_bytes,
- client, buffer, free_buffer);
- free_buffer = NULL;
- break;
- case core_execute_map:
- if (access & access_exec)
- core_map_attach(memory->map + access_map,
- attach,
- space, addr, nr_bytes,
- client, buffer, free_buffer);
- free_buffer = NULL;
- break;
- default:
- error("core_attach() internal error\n");
- break;
- }
- }
- /* allocated buffer must attach to at least one thing */
- ASSERT(free_buffer == NULL);
-}
-
-
-STATIC_INLINE_CORE\
-(core_mapping *)
-core_map_find_mapping(core_map *map,
- unsigned_word addr,
- unsigned nr_bytes,
- cpu *processor,
- unsigned_word cia,
- int abort) /*either 0 or 1 - helps inline */
-{
- core_mapping *mapping = map->first;
- ASSERT((addr & (nr_bytes - 1)) == 0); /* must be aligned */
- ASSERT((addr + (nr_bytes - 1)) >= addr); /* must not wrap */
- while (mapping != NULL) {
- if (addr >= mapping->base
- && (addr + (nr_bytes - 1)) <= mapping->bound)
- return mapping;
- mapping = mapping->next;
- }
- if (abort)
- error("core_find_mapping() - access to unmaped address, attach a default map to handle this - addr=0x%x nr_bytes=0x%x processor=0x%x cia=0x%x\n",
- addr, nr_bytes, processor, cia);
- return NULL;
-}
-
-
-STATIC_INLINE_CORE\
-(void *)
-core_translate(core_mapping *mapping,
- unsigned_word addr)
-{
- return (void *)(((char *)mapping->buffer) + addr - mapping->base);
-}
-
-
-INLINE_CORE\
-(unsigned)
-core_map_read_buffer(core_map *map,
- void *buffer,
- unsigned_word addr,
- unsigned len)
-{
- unsigned count = 0;
- while (count < len) {
- unsigned_word raddr = addr + count;
- core_mapping *mapping =
- core_map_find_mapping(map,
- raddr, 1,
- NULL, /*processor*/
- 0, /*cia*/
- 0); /*dont-abort*/
- if (mapping == NULL)
- break;
- if (mapping->device != NULL) {
- int nr_bytes = len - count;
- if (raddr + nr_bytes - 1> mapping->bound)
- nr_bytes = mapping->bound - raddr + 1;
- if (device_io_read_buffer(mapping->device,
- (unsigned_1*)buffer + count,
- mapping->space,
- raddr,
- nr_bytes,
- 0, /*processor*/
- 0 /*cpu*/) != nr_bytes)
- break;
- count += nr_bytes;
- }
- else {
- ((unsigned_1*)buffer)[count] =
- *(unsigned_1*)core_translate(mapping, raddr);
- count += 1;
- }
- }
- return count;
-}
-
-
-INLINE_CORE\
-(unsigned)
-core_map_write_buffer(core_map *map,
- const void *buffer,
- unsigned_word addr,
- unsigned len)
-{
- unsigned count = 0;
- while (count < len) {
- unsigned_word raddr = addr + count;
- core_mapping *mapping = core_map_find_mapping(map,
- raddr, 1,
- NULL, /*processor*/
- 0, /*cia*/
- 0); /*dont-abort*/
- if (mapping == NULL)
- break;
- if (mapping->device != NULL) {
- int nr_bytes = len - count;
- if (raddr + nr_bytes - 1 > mapping->bound)
- nr_bytes = mapping->bound - raddr + 1;
- if (device_io_write_buffer(mapping->device,
- (unsigned_1*)buffer + count,
- mapping->space,
- raddr,
- nr_bytes,
- 0, /*processor*/
- 0 /*cpu*/) != nr_bytes)
- break;
- count += nr_bytes;
- }
- else {
- *(unsigned_1*)core_translate(mapping, raddr) =
- ((unsigned_1*)buffer)[count];
- count += 1;
- }
- }
- return count;
-}
-
-
-/* define the read/write 1/2/4/8/word functions */
-
-#define N 1
-#include "corefile-n.h"
-#undef N
-
-#define N 2
-#include "corefile-n.h"
-#undef N
-
-#define N 4
-#include "corefile-n.h"
-#undef N
-
-#define N 8
-#include "corefile-n.h"
-#undef N
-
-#define N word
-#include "corefile-n.h"
-#undef N
-
-#endif /* _CORE_C_ */
diff --git a/sim/ppc/corefile.h b/sim/ppc/corefile.h
deleted file mode 100644
index 726470ca3f3..00000000000
--- a/sim/ppc/corefile.h
+++ /dev/null
@@ -1,227 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1996, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-#ifndef _CORE_H_
-#define _CORE_H_
-
-/* Introduction:
-
- The core device, positioned at the top of the device tree that
- models the architecure being simulated, acts as an interface
- between the processor engines and the modeled devices.
-
- On the one side the processor engines issue read and write requests
- to the core (each request further catagorised as being for an
- instruction or data subunit) while on the other side, the core is
- receiving address configuration and DMA requests from child
- devices.
-
- In the below a synopsis of the core object and device in PSIM is
- given, details of the object can be found in the files
- <<corefile.h>> and <<corefile.c>>.
-
- */
-
-/* Core::
-
- At the heart of the interface between devices and processor engines
- is a single core object. This object, in turn, has two children:
-
- o a core device which exists in the device tree and provides
- an interface to the core object to child devices.
-
- o a set of access maps which provide an efficient
- interface to the core object for the processor engines.
-
- */
-
-/* basic types */
-
-typedef struct _core core;
-typedef struct _core_map core_map;
-
-/* constructor */
-
-INLINE_CORE\
-(core *) core_create
-(void);
-
-INLINE_CORE\
-(core *) core_from_device
-(device *root);
-
-INLINE_CORE\
-(void) core_init
-(core *memory);
-
-/* Core map management:::
-
- The core ojbect manages two different types of address maps:
-
- o raw-memory - the address range can be implemented using
- a simple byte array. No device needs to be notifed of
- any accesses to the specified memory range.
-
- o callback - Any access to the specified address range
- should be passed on to the associated device. That device
- can in turn resolve the access - handling or aborting or
- restarting it.
-
- For callback maps it is possible to further order them by
- specifiying specifying a callback level (eg callback + 1).
-
- When the core is resolving an access it searches each of the maps
- in order. First raw-memory and then callback maps (in assending
- order of level). This search order makes it possible for latter
- maps to overlap earlier ones. For instance, a device that wants to
- be notified of all accesses that are not covered by raw-memory maps
- could attach its self with an address range of the entire address
- space.
-
- In addition, each attached address map as an associated set of
- access attributes (readable, writeable, executable) which are
- verified as part of resolving each access.
-
- */
-
-INLINE_CORE\
-(void) core_attach
-(core *map,
- attach_type attach,
- int address_space,
- access_type access,
- unsigned_word addr,
- unsigned nr_bytes, /* host limited */
- device *device); /*callback/default*/
-
-/* Bugs:::
-
- At present there is no method for removing address maps. That will
- be implemented in a future release.
-
- The operation of mapping between an address and its destination
- device or memory array is currently implemented using a simple
- linked list. The posibility of replacing this list with a more
- powerfull data structure exists.
-
- */
-
-
-/* Device::
-
- The device that corresponds to the core object is described
- separatly in the devices section.
-
- */
-
-/* Access maps::
-
- Providing an interface between the processor engines and the core
- object are the access maps (core_map). Three access maps are
- provided, one for each of the possible access requests that can be
- generated by a processor.
-
- o read
-
- o write
-
- o execute
-
- A processor being able to request a read (or write) or write
- operation to any of the maps. Those operations can either be
- highly efficient (by specifying a specific transfer size) or
- generic (specifying a parameterized number of bytes).
-
- Internally the core object takes the request, determines the
- approperiate attached address space that it should handle it passes
- it on.
-
- */
-
-INLINE_CORE\
-(core_map *) core_readable
-(core *memory);
-
-INLINE_CORE\
-(core_map *) core_writeable
-(core *memory);
-
-INLINE_CORE\
-(core_map *) core_executable
-(core *memory);
-
-/* Variable sized read/write
-
- Transfer (zero) a variable size block of data between the host and
- target (possibly byte swapping it). Should any problems occure,
- the number of bytes actually transfered is returned. */
-
-INLINE_CORE\
-(unsigned) core_map_read_buffer
-(core_map *map,
- void *buffer,
- unsigned_word addr,
- unsigned nr_bytes);
-
-INLINE_CORE\
-(unsigned) core_map_write_buffer
-(core_map *map,
- const void *buffer,
- unsigned_word addr,
- unsigned nr_bytes);
-
-
-/* Fixed sized read/write
-
- Transfer a fixed amout of memory between the host and target. The
- memory always being translated and the operation always aborting
- should a problem occure */
-
-#define DECLARE_CORE_WRITE_N(N) \
-INLINE_CORE\
-(void) core_map_write_##N \
-(core_map *map, \
- unsigned_word addr, \
- unsigned_##N val, \
- cpu *processor, \
- unsigned_word cia);
-
-DECLARE_CORE_WRITE_N(1)
-DECLARE_CORE_WRITE_N(2)
-DECLARE_CORE_WRITE_N(4)
-DECLARE_CORE_WRITE_N(8)
-DECLARE_CORE_WRITE_N(word)
-
-#define DECLARE_CORE_READ_N(N) \
-INLINE_CORE\
-(unsigned_##N) core_map_read_##N \
-(core_map *map, \
- unsigned_word addr, \
- cpu *processor, \
- unsigned_word cia);
-
-DECLARE_CORE_READ_N(1)
-DECLARE_CORE_READ_N(2)
-DECLARE_CORE_READ_N(4)
-DECLARE_CORE_READ_N(8)
-DECLARE_CORE_READ_N(word)
-
-#endif
diff --git a/sim/ppc/cpu.c b/sim/ppc/cpu.c
deleted file mode 100644
index bce82f1d141..00000000000
--- a/sim/ppc/cpu.c
+++ /dev/null
@@ -1,404 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1997, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-#ifndef _CPU_C_
-#define _CPU_C_
-
-#include <setjmp.h>
-
-#include "cpu.h"
-#include "idecode.h"
-
-#ifdef HAVE_STRING_H
-#include <string.h>
-#else
-#ifdef HAVE_STRINGS_H
-#include <strings.h>
-#endif
-#endif
-
-struct _cpu {
-
- /* the registers */
- registers regs;
-
- /* current instruction address */
- unsigned_word program_counter;
-
- /* the memory maps */
- core *physical; /* all of memory */
- vm *virtual;
- vm_instruction_map *instruction_map; /* instructions */
- vm_data_map *data_map; /* data */
-
- /* the system this processor is contained within */
- cpu_mon *monitor;
- os_emul *os_emulation;
- psim *system;
- event_queue *events;
- int cpu_nr;
-
- /* Current CPU model information */
- model_data *model_ptr;
-
-#if WITH_IDECODE_CACHE_SIZE
- /* a cache to store cracked instructions */
- idecode_cache icache[WITH_IDECODE_CACHE_SIZE];
-#endif
-
- /* any interrupt state */
- interrupts ints;
-
- /* address reservation: keep the physical address and the contents
- of memory at that address */
- memory_reservation reservation;
-
- /* offset from event time to this cpu's idea of the local time */
- signed64 time_base_local_time;
- signed64 decrementer_local_time;
- event_entry_tag decrementer_event;
-
-};
-
-INLINE_CPU\
-(cpu *)
-cpu_create(psim *system,
- core *memory,
- cpu_mon *monitor,
- os_emul *os_emulation,
- int cpu_nr)
-{
- cpu *processor = ZALLOC(cpu);
-
- /* create the virtual memory map from the core */
- processor->physical = memory;
- processor->virtual = vm_create(memory);
- processor->instruction_map = vm_create_instruction_map(processor->virtual);
- processor->data_map = vm_create_data_map(processor->virtual);
-
- if (CURRENT_MODEL_ISSUE > 0)
- processor->model_ptr = model_create (processor);
-
- /* link back to core system */
- processor->system = system;
- processor->events = psim_event_queue(system);
- processor->cpu_nr = cpu_nr;
- processor->monitor = monitor;
- processor->os_emulation = os_emulation;
-
- return processor;
-}
-
-
-INLINE_CPU\
-(void)
-cpu_init(cpu *processor)
-{
- memset(&processor->regs, 0, sizeof(processor->regs));
- /* vm init is delayed until after the device tree has been init as
- the devices may further init the cpu */
- if (CURRENT_MODEL_ISSUE > 0)
- model_init (processor->model_ptr);
-}
-
-
-/* find ones way home */
-
-INLINE_CPU\
-(psim *)
-cpu_system(cpu *processor)
-{
- return processor->system;
-}
-
-INLINE_CPU\
-(int)
-cpu_nr(cpu *processor)
-{
- return processor->cpu_nr;
-}
-
-INLINE_CPU\
-(cpu_mon *)
-cpu_monitor(cpu *processor)
-{
- return processor->monitor;
-}
-
-INLINE_CPU\
-(os_emul *)
-cpu_os_emulation(cpu *processor)
-{
- return processor->os_emulation;
-}
-
-INLINE_CPU\
-(model_data *)
-cpu_model(cpu *processor)
-{
- return processor->model_ptr;
-}
-
-
-/* program counter manipulation */
-
-INLINE_CPU\
-(void)
-cpu_set_program_counter(cpu *processor,
- unsigned_word new_program_counter)
-{
- processor->program_counter = new_program_counter;
-}
-
-INLINE_CPU\
-(unsigned_word)
-cpu_get_program_counter(cpu *processor)
-{
- return processor->program_counter;
-}
-
-
-INLINE_CPU\
-(void)
-cpu_restart(cpu *processor,
- unsigned_word nia)
-{
- ASSERT(processor != NULL);
- cpu_set_program_counter(processor, nia);
- psim_restart(processor->system, processor->cpu_nr);
-}
-
-INLINE_CPU\
-(void)
-cpu_halt(cpu *processor,
- unsigned_word nia,
- stop_reason reason,
- int signal)
-{
- ASSERT(processor != NULL);
- if (CURRENT_MODEL_ISSUE > 0)
- model_halt(processor->model_ptr);
- cpu_set_program_counter(processor, nia);
- psim_halt(processor->system, processor->cpu_nr, reason, signal);
-}
-
-EXTERN_CPU\
-(void)
-cpu_error(cpu *processor,
- unsigned_word cia,
- const char *fmt,
- ...)
-{
- char message[1024];
- va_list ap;
-
- /* format the message */
- va_start(ap, fmt);
- vsprintf(message, fmt, ap);
- va_end(ap);
-
- /* sanity check */
- if (strlen(message) >= sizeof(message))
- error("cpu_error: buffer overflow");
-
- if (processor != NULL) {
- printf_filtered("cpu %d, cia 0x%lx: %s\n",
- processor->cpu_nr + 1, (unsigned long)cia, message);
- cpu_halt(processor, cia, was_signalled, -1);
- }
- else {
- error("cpu: %s", message);
- }
-}
-
-
-/* The processors local concept of time */
-
-INLINE_CPU\
-(signed64)
-cpu_get_time_base(cpu *processor)
-{
- return (event_queue_time(processor->events)
- - processor->time_base_local_time);
-}
-
-INLINE_CPU\
-(void)
-cpu_set_time_base(cpu *processor,
- signed64 time_base)
-{
- processor->time_base_local_time = (event_queue_time(processor->events)
- - time_base);
-}
-
-INLINE_CPU\
-(signed32)
-cpu_get_decrementer(cpu *processor)
-{
- return (processor->decrementer_local_time
- - event_queue_time(processor->events));
-}
-
-STATIC_INLINE_CPU\
-(void)
-cpu_decrement_event(void *data)
-{
- cpu *processor = (cpu*)data;
- processor->decrementer_event = NULL;
- decrementer_interrupt(processor);
-}
-
-INLINE_CPU\
-(void)
-cpu_set_decrementer(cpu *processor,
- signed32 decrementer)
-{
- signed64 old_decrementer = cpu_get_decrementer(processor);
- event_queue_deschedule(processor->events, processor->decrementer_event);
- processor->decrementer_event = NULL;
- processor->decrementer_local_time = (event_queue_time(processor->events)
- + decrementer);
- if (decrementer < 0 && old_decrementer >= 0)
- /* A decrementer interrupt occures if the sign of the decrement
- register is changed from positive to negative by the load
- instruction */
- decrementer_interrupt(processor);
- else if (decrementer >= 0)
- processor->decrementer_event = event_queue_schedule(processor->events,
- decrementer,
- cpu_decrement_event,
- processor);
-}
-
-
-#if WITH_IDECODE_CACHE_SIZE
-/* allow access to the cpu's instruction cache */
-INLINE_CPU\
-(idecode_cache *)
-cpu_icache_entry(cpu *processor,
- unsigned_word cia)
-{
- return &processor->icache[cia / 4 % WITH_IDECODE_CACHE_SIZE];
-}
-
-
-INLINE_CPU\
-(void)
-cpu_flush_icache(cpu *processor)
-{
- int i;
- /* force all addresses to 0xff... so that they never hit */
- for (i = 0; i < WITH_IDECODE_CACHE_SIZE; i++)
- processor->icache[i].address = MASK(0, 63);
-}
-#endif
-
-
-/* address map revelation */
-
-INLINE_CPU\
-(vm_instruction_map *)
-cpu_instruction_map(cpu *processor)
-{
- return processor->instruction_map;
-}
-
-INLINE_CPU\
-(vm_data_map *)
-cpu_data_map(cpu *processor)
-{
- return processor->data_map;
-}
-
-INLINE_CPU\
-(void)
-cpu_page_tlb_invalidate_entry(cpu *processor,
- unsigned_word ea)
-{
- vm_page_tlb_invalidate_entry(processor->virtual, ea);
-}
-
-INLINE_CPU\
-(void)
-cpu_page_tlb_invalidate_all(cpu *processor)
-{
- vm_page_tlb_invalidate_all(processor->virtual);
-}
-
-
-/* interrupt access */
-
-INLINE_CPU\
-(interrupts *)
-cpu_interrupts(cpu *processor)
-{
- return &processor->ints;
-}
-
-
-
-/* reservation access */
-
-INLINE_CPU\
-(memory_reservation *)
-cpu_reservation(cpu *processor)
-{
- return &processor->reservation;
-}
-
-
-/* register access */
-
-INLINE_CPU\
-(registers *)
-cpu_registers(cpu *processor)
-{
- return &processor->regs;
-}
-
-INLINE_CPU\
-(void)
-cpu_synchronize_context(cpu *processor,
- unsigned_word cia)
-{
-#if (WITH_IDECODE_CACHE_SIZE)
- /* kill of the cache */
- cpu_flush_icache(processor);
-#endif
-
- /* update virtual memory */
- vm_synchronize_context(processor->virtual,
- processor->regs.spr,
- processor->regs.sr,
- processor->regs.msr,
- processor, cia);
-}
-
-
-/* might again be useful one day */
-
-INLINE_CPU\
-(void)
-cpu_print_info(cpu *processor, int verbose)
-{
-}
-
-#endif /* _CPU_C_ */
diff --git a/sim/ppc/cpu.h b/sim/ppc/cpu.h
deleted file mode 100644
index 840f5815742..00000000000
--- a/sim/ppc/cpu.h
+++ /dev/null
@@ -1,254 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1997, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-#ifndef _CPU_H_
-#define _CPU_H_
-
-#include "basics.h"
-#include "registers.h"
-#include "device.h"
-#include "corefile.h"
-#include "vm.h"
-#include "events.h"
-#include "interrupts.h"
-#include "psim.h"
-#include "idecode.h"
-#include "itable.h"
-#include "os_emul.h"
-#include "mon.h"
-#include "model.h"
-
-#ifndef CONST_ATTRIBUTE
-#define CONST_ATTRIBUTE __attribute__((__const__))
-#endif
-
-/* typedef struct _cpu cpu;
-
- Declared in basics.h because it is used opaquely throughout the
- code */
-
-
-/* Create a cpu object */
-
-INLINE_CPU\
-(cpu *) cpu_create
-(psim *system,
- core *memory,
- cpu_mon *monitor,
- os_emul *cpu_emulation,
- int cpu_nr);
-
-INLINE_CPU\
-(void) cpu_init
-(cpu *processor);
-
-/* Find our way home */
-
-INLINE_CPU\
-(psim *) cpu_system
-(cpu *processor) CONST_ATTRIBUTE;
-
-INLINE_CPU\
-(cpu_mon *) cpu_monitor
-(cpu *processor) CONST_ATTRIBUTE;
-
-INLINE_CPU\
-(os_emul *) cpu_os_emulation
-(cpu *processor);
-
-INLINE_CPU\
-(int) cpu_nr
-(cpu *processor) CONST_ATTRIBUTE;
-
-
-/* manipulate the processors program counter and execution state.
-
- The program counter is not included in the register file. Instead
- it is extracted and then later restored (set, reset, halt). This
- is to give the user of the cpu (and the compiler) the chance to
- minimize the need to load/store the cpu's PC value. (Especially in
- the case of a single processor) */
-
-INLINE_CPU\
-(void) cpu_set_program_counter
-(cpu *processor,
- unsigned_word new_program_counter);
-
-INLINE_CPU\
-(unsigned_word) cpu_get_program_counter
-(cpu *processor);
-
-INLINE_CPU\
-(void) cpu_restart
-(cpu *processor,
- unsigned_word nia);
-
-INLINE_CPU\
-(void) cpu_halt
-(cpu *processor,
- unsigned_word nia,
- stop_reason reason,
- int signal);
-
-EXTERN_CPU\
-(void) cpu_error
-(cpu *processor,
- unsigned_word cia,
- const char *fmt,
- ...) __attribute__ ((format (printf, 3, 4)));
-
-
-/* The processors local concept of time */
-
-INLINE_CPU\
-(signed64) cpu_get_time_base
-(cpu *processor);
-
-INLINE_CPU\
-(void) cpu_set_time_base
-(cpu *processor,
- signed64 time_base);
-
-INLINE_CPU\
-(signed32) cpu_get_decrementer
-(cpu *processor);
-
-INLINE_CPU\
-(void) cpu_set_decrementer
-(cpu *processor,
- signed32 decrementer);
-
-
-#if WITH_IDECODE_CACHE_SIZE
-/* Return the cache entry that matches the given CIA. No guarentee
- that the cache entry actually contains the instruction for that
- address */
-
-INLINE_CPU\
-(idecode_cache) *cpu_icache_entry
-(cpu *processor,
- unsigned_word cia);
-
-INLINE_CPU\
-(void) cpu_flush_icache
-(cpu *processor);
-#endif
-
-
-/* reveal the processors VM:
-
- At first sight it may seem better to, instead of exposing the cpu's
- inner vm maps, to have the cpu its self provide memory manipulation
- functions. (eg cpu_instruction_fetch() cpu_data_read_4())
-
- Unfortunatly in addition to these functions is the need (for the
- debugger) to be able to read/write to memory in ways that violate
- the vm protection (eg store breakpoint instruction in the
- instruction map). */
-
-INLINE_CPU\
-(vm_data_map *) cpu_data_map
-(cpu *processor);
-
-INLINE_CPU\
-(vm_instruction_map *) cpu_instruction_map
-(cpu *processor);
-
-INLINE_CPU\
-(void) cpu_page_tlb_invalidate_entry
-(cpu *processor,
- unsigned_word ea);
-
-INLINE_CPU\
-(void) cpu_page_tlb_invalidate_all
-(cpu *processor);
-
-
-/* reveal the processors interrupt state */
-
-INLINE_CPU\
-(interrupts *) cpu_interrupts
-(cpu *processor);
-
-
-/* grant access to the reservation information */
-
-typedef struct _memory_reservation {
- int valid;
- unsigned_word addr;
- unsigned_word data;
-} memory_reservation;
-
-INLINE_CPU\
-(memory_reservation *) cpu_reservation
-(cpu *processor);
-
-
-/* Registers:
-
- This model exploits the PowerPC's requirement for a synchronization
- to occure after (or before) the update of any context controlling
- register. All context sync points must call the sync function
- below to when ever a synchronization point is reached */
-
-INLINE_CPU\
-(registers *) cpu_registers
-(cpu *processor) CONST_ATTRIBUTE;
-
-INLINE_CPU\
-(void) cpu_synchronize_context
-(cpu *processor,
- unsigned_word cia);
-
-#define IS_PROBLEM_STATE(PROCESSOR) \
-(CURRENT_ENVIRONMENT == OPERATING_ENVIRONMENT \
- ? (cpu_registers(PROCESSOR)->msr & msr_problem_state) \
- : 1)
-
-#define IS_64BIT_MODE(PROCESSOR) \
-(WITH_TARGET_WORD_BITSIZE == 64 \
- ? (CURRENT_ENVIRONMENT == OPERATING_ENVIRONMENT \
- ? (cpu_registers(PROCESSOR)->msr & msr_64bit_mode) \
- : 1) \
- : 0)
-
-#define IS_FP_AVAILABLE(PROCESSOR) \
-(CURRENT_ENVIRONMENT == OPERATING_ENVIRONMENT \
- ? (cpu_registers(PROCESSOR)->msr & msr_floating_point_available) \
- : 1)
-
-
-
-INLINE_CPU\
-(void) cpu_print_info
-(cpu *processor,
- int verbose);
-
-INLINE_CPU\
-(model_data *) cpu_model
-(cpu *processor) CONST_ATTRIBUTE;
-
-
-#if (CPU_INLINE & INCLUDE_MODULE)
-# include "cpu.c"
-#endif
-
-#endif
diff --git a/sim/ppc/dc-complex b/sim/ppc/dc-complex
deleted file mode 100644
index 34a58615dcb..00000000000
--- a/sim/ppc/dc-complex
+++ /dev/null
@@ -1,58 +0,0 @@
-#
-# This file is part of the program psim.
-#
-# Copyright (C) 1994-1995, Andrew Cagney <cagney@highland.com.au>
-#
-# This program is free software; you can redistribute it and/or modify
-# it under the terms of the GNU General Public License as published by
-# the Free Software Foundation; either version 2 of the License, or
-# (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-#
-array,normal: 0: 5: 0: 5:
-array,normal: 21:31:32:-1:OE,LR,AA,Rc,LK:
-##
-## Branch Conditional instruction - Expand BO{0:4}
-##
-array,expand-forced: 6:10: 6:10:BO: 0xfc000000:0x40000000
-##
-## Expand RA on equality with 0 in Add instructions were if(RA==0) appears.
-##
-# Add Immediate
-array,boolean: 11:15:11:15:RA: 0xfc000000:0x38000000:0
-# Add Immediate Shifted
-array,boolean: 11:15:11:15:RA: 0xfc000000:0x3c000000:0
-##
-## Ditto for high frequency load/store instructions.
-##
-# Store Byte
-#array,boolean: 11:15:11:15:RA: 0xfc000000:0x98000000:0
-# Store Word
-#array,boolean: 11:15:11:15:RA: 0xfc000000:0x90000000:0
-# Load Word and Zero
-#array,boolean: 11:15:11:15:RA: 0xfc000000:0x80000000:0
-##
-## Move to/from SPR instructions - LR=8 is munged into 0x100 == 256
-##
-#array,boolean: 11:20:11:20:SPR: 0xfc0007ff:0x7c0003a6:256
-#array,boolean: 11:20:11:20:SPR: 0xfc0007ff:0x7c0002a6:256
-##
-## Compare Immediate instruction - separate out L == 0 and L == 1
-##
-# Compare Immediate
-#array,normal: 10:11:10:11:L: 0xfc000000:0x2c000000:0
-##
-## Move to/from SPR instructions - separate out LR case
-##
-# Move to SPR
-array,boolean: 11:20:11:20:SPR: 0xfc0007ff:0x7c0003a6:256
-# Move from SPR
-array,boolean: 11:20:11:20:SPR: 0xfc0007ff:0x7c0002a6:256
diff --git a/sim/ppc/dc-simple b/sim/ppc/dc-simple
deleted file mode 100644
index 9ea823e66c0..00000000000
--- a/sim/ppc/dc-simple
+++ /dev/null
@@ -1,25 +0,0 @@
-#
-# This file is part of the program psim.
-#
-# Copyright (C) 1994-1995, Andrew Cagney <cagney@highland.com.au>
-#
-# This program is free software; you can redistribute it and/or modify
-# it under the terms of the GNU General Public License as published by
-# the Free Software Foundation; either version 2 of the License, or
-# (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-#
-#
-# Create a two level switch statement. The first level branches on bits
-# 0..5 while the second level branches on bits 21..31
-#
-switch: 0: 5: 0: 5
-switch:21:31
diff --git a/sim/ppc/dc-stupid b/sim/ppc/dc-stupid
deleted file mode 100644
index 4238bdb9c09..00000000000
--- a/sim/ppc/dc-stupid
+++ /dev/null
@@ -1,58 +0,0 @@
-#
-# This file is part of the program psim.
-#
-# Copyright (C) 1994-1995, Andrew Cagney <cagney@highland.com.au>
-#
-# This program is free software; you can redistribute it and/or modify
-# it under the terms of the GNU General Public License as published by
-# the Free Software Foundation; either version 2 of the License, or
-# (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-#
-array,normal: 0: 5: 0: 5:
-array,normal:21:31:32:-1:OE,LR,AA,Rc,LK:
-##
-## Branch Conditional instruction - Expand BO{0:4} only, ignore BO{5}
-##
-array,expand-forced: 6: 9: 6: 9:BO: 0xfc000000:0x40000000
-##
-## Expand RA on equality with 0 in Add instructions were if(RA==0) appears.
-##
-# Add Immediate
-#array,boolean: 11:15:11:15:RA: 0xfc000000:0x38000000:0
-# Add Immediate Shifted
-#array,boolean: 11:15:11:15:RA: 0xfc000000:0x3c000000:0
-##
-## Ditto for high frequency load/store instructions.
-##
-# Store Byte
-#array,boolean: 11:15:11:15:RA: 0xfc000000:0x98000000:0
-# Store Word
-#array,boolean: 11:15:11:15:RA: 0xfc000000:0x90000000:0
-# Load Word and Zero
-#array,boolean: 11:15:11:15:RA: 0xfc000000:0x80000000:0
-##
-## Move to/from SPR instructions - LR=8 is munged into 0x100 == 256
-##
-#array,boolean: 11:20:11:20:SPR: 0xfc0007ff:0x7c0003a6:256
-#array,boolean: 11:20:11:20:SPR: 0xfc0007ff:0x7c0002a6:256
-##
-## Compare Immediate instruction - separate out L == 0 and L == 1
-##
-# Compare Immediate
-#array,boolean: 10:11:10:11:L: 0xfc000000:0x2c000000:0
-##
-## Move to/from SPR instructions - separate out LR case
-##
-# Move to SPR
-#array,boolean: 11:20:11:20:SPR: 0xfc0007ff:0x7c0003a6:256
-# Move from SPR
-#array,boolean: 11:20:11:20:SPR: 0xfc0007ff:0x7c0002a6:256
diff --git a/sim/ppc/dc-test.01 b/sim/ppc/dc-test.01
deleted file mode 100644
index df8c175cc0d..00000000000
--- a/sim/ppc/dc-test.01
+++ /dev/null
@@ -1,24 +0,0 @@
-#
-# This file is part of the program psim.
-#
-# Copyright (C) 1994-1995, Andrew Cagney <cagney@highland.com.au>
-#
-# This program is free software; you can redistribute it and/or modify
-# it under the terms of the GNU General Public License as published by
-# the Free Software Foundation; either version 2 of the License, or
-# (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-#
- 0: 5: 0: 5:0:: 2:0x00000000:0x00000000:0
-21:31:32:-1:0:OE,LR,AA,Rc,LK:0:0x00000000:0x00000000:0
- 6: 9: 6: 9:0:BO: 0:0xfc000000:0x40000000:1
-11:15:11:15:0:RA: 1:0xfc000000:0x38000000:2
-11:15:11:15:0:RA: 1:0xfc000000:0x3c000000:2
diff --git a/sim/ppc/dc-test.02 b/sim/ppc/dc-test.02
deleted file mode 100644
index a98d0a78e2c..00000000000
--- a/sim/ppc/dc-test.02
+++ /dev/null
@@ -1,24 +0,0 @@
-#
-# This file is part of the program psim.
-#
-# Copyright (C) 1994-1995, Andrew Cagney <cagney@highland.com.au>
-#
-# This program is free software; you can redistribute it and/or modify
-# it under the terms of the GNU General Public License as published by
-# the Free Software Foundation; either version 2 of the License, or
-# (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-#
- 0: 5: 0: 5:0:: 0:0x00000000:0x00000000:0
-21:31:32:-1:0:OE,LR,AA,Rc,LK:0:0x00000000:0x00000000:0
- 6: 9: 6: 9:0:BO: 0:0xfc000000:0x40000000:1
-11:15:11:15:0:RA: 1:0xfc000000:0x38000000:2
-11:15:11:15:0:RA: 1:0xfc000000:0x3c000000:2
diff --git a/sim/ppc/debug.c b/sim/ppc/debug.c
deleted file mode 100644
index 5931d1e338a..00000000000
--- a/sim/ppc/debug.c
+++ /dev/null
@@ -1,153 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1997, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-#ifndef _DEBUG_C_
-#define _DEBUG_C_
-
-#include "config.h"
-#include "basics.h"
-
-#ifdef HAVE_STDLIB_H
-#include <stdlib.h>
-#endif
-
-int ppc_trace[nr_trace_options];
-
-typedef struct _trace_option_descriptor {
- trace_options option;
- const char *name;
- const char *description;
-} trace_option_descriptor;
-
-static trace_option_descriptor trace_description[] = {
- { trace_gdb, "gdb", "calls made by gdb to the sim_calls.c file" },
- { trace_os_emul, "os-emul", "VEA mode sytem calls - like strace" },
- { trace_events, "events", "event queue handling" },
- /* decode/issue */
- { trace_semantics, "semantics", "Instruction execution (issue)" },
- { trace_idecode, "idecode", "instruction decode (when miss in icache)" },
- { trace_alu, "alu", "results of integer ALU" },
- { trace_vm, "vm", "OEA address translation" },
- { trace_load_store, "load-store", "transfers between registers and memory" },
- { trace_model, "model", "model specific information" },
- { trace_interrupts, "interrupts", "interrupt handling" },
- /* devices */
- { trace_device_tree, "device-tree", },
- { trace_devices, "devices" },
- { trace_binary_device, "binary-device" },
- { trace_com_device, "com-device" },
- { trace_console_device, "console-device" },
- { trace_core_device, "core-device" },
- { trace_disk_device, "disk-device" },
- { trace_eeprom_device, "eeprom-device" },
- { trace_file_device, "file-device" },
- { trace_glue_device, "glue-device" },
- { trace_halt_device, "halt-device" },
- { trace_htab_device, "htab-device" },
- { trace_icu_device, "icu-device" },
- { trace_ide_device, "ide-device" },
- { trace_memory_device, "memory-device" },
- { trace_opic_device, "opic-device" },
- { trace_pal_device, "pal-device" },
- { trace_pass_device, "pass-device" },
- { trace_phb_device, "phb-device" },
- { trace_register_device, "register-device", "Device initializing registers" },
- { trace_stack_device, "stack-device" },
- { trace_vm_device, "vm-device" },
- /* packages */
- { trace_disklabel_package, "disklabel-package" },
- /* misc */
- { trace_print_info, "print-info", "Print performance analysis information" },
- { trace_opts, "options", "Print options simulator was compiled with" },
- /*{ trace_tbd, "tbd", "Trace any missing features" },*/
- { trace_print_device_tree, "print-device-tree", "Output the contents of the device tree" },
- { trace_dump_device_tree, "dump-device-tree", "Output the contents of the device tree then exit" },
- /* sentinal */
- { nr_trace_options, NULL },
-};
-
-extern void
-trace_option(const char *option,
- int setting)
-{
- if (strcmp(option, "all") == 0) {
- trace_options i;
- for (i = 0; i < nr_trace_options; i++)
- if (i != trace_dump_device_tree) {
- ppc_trace[i] = setting;
- }
- }
- else {
- int i = 0;
- while (trace_description[i].option < nr_trace_options
- && strcmp(option, trace_description[i].name) != 0)
- i++;
- if (trace_description[i].option < nr_trace_options)
- ppc_trace[trace_description[i].option] = setting;
- else {
- i = strtoul(option, 0, 0);
- if (i > 0 && i < nr_trace_options)
- ppc_trace[i] = setting;
- else
- error("Unknown trace option: %s\n", option);
- }
-
- }
-}
-
-
-extern void
-trace_usage(int verbose)
-{
- if (verbose) {
- printf_filtered("\n");
- printf_filtered("The following are possible <trace> options:\n");
- printf_filtered("\n");
- }
- if (verbose == 1) {
- int pos;
- int i;
- printf_filtered(" all");
- pos = strlen("all") + 2;
- for (i = 0; trace_description[i].option < nr_trace_options; i++) {
- pos += strlen(trace_description[i].name) + 2;
- if (pos > 75) {
- pos = strlen(trace_description[i].name) + 2;
- printf_filtered("\n");
- }
- printf_filtered(" %s", trace_description[i].name);
- }
- printf_filtered("\n");
- }
- if (verbose > 1) {
- const char *format = "\t%-18s%s\n";
- int i;
- printf_filtered(format, "all", "enable all the trace options");
- for (i = 0; trace_description[i].option < nr_trace_options; i++)
- printf_filtered(format,
- trace_description[i].name,
- (trace_description[i].description
- ? trace_description[i].description
- : ""));
- }
-}
-
-#endif /* _DEBUG_C_ */
diff --git a/sim/ppc/debug.h b/sim/ppc/debug.h
deleted file mode 100644
index 1fdb36ebac3..00000000000
--- a/sim/ppc/debug.h
+++ /dev/null
@@ -1,172 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1997, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-#ifndef _DEBUG_H_
-#define _DEBUG_H_
-
-#include "filter_filename.h"
-
-typedef enum {
- trace_invalid,
- trace_tbd,
- /**/
- trace_gdb,
- trace_os_emul,
- /**/
- trace_events,
- trace_device_tree,
- trace_devices,
- trace_binary_device,
- trace_com_device,
- trace_console_device,
- trace_core_device,
- trace_disk_device,
- trace_eeprom_device,
- trace_file_device,
- trace_glue_device,
- trace_halt_device,
- trace_htab_device,
- trace_icu_device,
- trace_ide_device,
- trace_memory_device,
- trace_opic_device,
- trace_pal_device,
- trace_pass_device,
- trace_phb_device,
- trace_stack_device,
- trace_register_device,
- trace_vm_device,
- /**/
- trace_disklabel_package,
- /**/
- trace_semantics,
- trace_idecode,
- trace_alu,
- trace_load_store,
- trace_model,
- /**/
- trace_vm,
- trace_core,
- trace_interrupts,
- trace_psim,
- trace_device_init,
- trace_cpu,
- trace_breakpoint,
- trace_opts,
- trace_print_info,
- trace_print_device_tree,
- trace_dump_device_tree,
- nr_trace_options
-} trace_options;
-
-
-
-extern int ppc_trace[nr_trace_options];
-
-/* simple */
-#define TRACE(OBJECT, ARGS) \
-do { \
- if (WITH_TRACE) { \
- if (ppc_trace[OBJECT]) { \
- printf_filtered("%s:%d: ", filter_filename(__FILE__), __LINE__); \
- printf_filtered ARGS; \
- } \
- } \
-} while (0)
-
-/* issue */
-#define ITRACE(OBJECT, ARGS) \
-do { \
- if (WITH_TRACE) { \
- if (ppc_trace[OBJECT]) { \
- printf_filtered("%s:%d:0x%08lx:%s ", itable[MY_INDEX].file, itable[MY_INDEX].line_nr, (long)cia, itable[MY_INDEX].name); \
- printf_filtered ARGS; \
- } \
- } \
-} while (0)
-
-/* device */
-#define DTRACE(OBJECT, ARGS) \
-do { \
- if (WITH_TRACE) { \
- int trace_device = device_trace(me); \
- if (ppc_trace[trace_devices] \
- || ppc_trace[trace_##OBJECT##_device] \
- || trace_device) { \
- printf_filtered("%s:%d:%s:%s%s ", \
- filter_filename(__FILE__), __LINE__, #OBJECT, \
- trace_device ? device_path(me) : "", \
- trace_device ? ":" : ""); \
- printf_filtered ARGS; \
- } \
- } \
-} while (0)
-
-/* device instance */
-#define DITRACE(OBJECT, ARGS) \
-do { \
- if (WITH_TRACE) { \
- device *me = device_instance_device(instance); \
- int trace_device = device_trace(me); \
- if (ppc_trace[trace_devices] \
- || ppc_trace[trace_##OBJECT##_device] \
- || trace_device) { \
- printf_filtered("%s:%d:%s:%s%s ", \
- filter_filename(__FILE__), __LINE__, #OBJECT, \
- trace_device ? device_path(me) : "", \
- trace_device ? ":" : ""); \
- printf_filtered ARGS; \
- } \
- } \
-} while (0)
-
-/* package */
-#define PTRACE(OBJECT, ARGS) \
-do { \
- if (WITH_TRACE) { \
- if (ppc_trace[trace_##OBJECT##_package]) { \
- printf_filtered("%s:%d:%s: ", filter_filename(__FILE__), __LINE__, #OBJECT); \
- printf_filtered ARGS; \
- } \
- } \
-} while (0)
-
-
-#define ASSERT(EXPRESSION) \
-do { \
- if (WITH_ASSERT) { \
- if (!(EXPRESSION)) { \
- error("%s:%d: assertion failed - %s\n", \
- filter_filename(__FILE__), __LINE__, #EXPRESSION); \
- } \
- } \
-} while (0)
-
-/* Parse OPTION updating the trace array */
-extern void
-trace_option(const char *option, int setting);
-
-/* Output the list of trace options */
-extern void trace_usage
-(int verbose);
-
-
-#endif /* _DEBUG_H_ */
diff --git a/sim/ppc/device.c b/sim/ppc/device.c
deleted file mode 100644
index ffb094324c4..00000000000
--- a/sim/ppc/device.c
+++ /dev/null
@@ -1,1998 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1997, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-#ifndef _DEVICE_C_
-#define _DEVICE_C_
-
-#include <stdio.h>
-
-#include "device_table.h"
-#include "cap.h"
-
-#include "events.h"
-#include "psim.h"
-
-#ifdef HAVE_STDLIB_H
-#include <stdlib.h>
-#endif
-
-#ifdef HAVE_STRING_H
-#include <string.h>
-#else
-#ifdef HAVE_STRINGS_H
-#include <strings.h>
-#endif
-#endif
-
-#include <ctype.h>
-
-STATIC_INLINE_DEVICE (void) clean_device_properties(device *);
-
-/* property entries */
-
-typedef struct _device_property_entry device_property_entry;
-struct _device_property_entry {
- device_property_entry *next;
- device_property *value;
- const void *init_array;
- unsigned sizeof_init_array;
-};
-
-
-/* Interrupt edges */
-
-typedef struct _device_interrupt_edge device_interrupt_edge;
-struct _device_interrupt_edge {
- int my_port;
- device *dest;
- int dest_port;
- device_interrupt_edge *next;
- object_disposition disposition;
-};
-
-STATIC_INLINE_DEVICE\
-(void)
-attach_device_interrupt_edge(device_interrupt_edge **list,
- int my_port,
- device *dest,
- int dest_port,
- object_disposition disposition)
-{
- device_interrupt_edge *new_edge = ZALLOC(device_interrupt_edge);
- new_edge->my_port = my_port;
- new_edge->dest = dest;
- new_edge->dest_port = dest_port;
- new_edge->next = *list;
- new_edge->disposition = disposition;
- *list = new_edge;
-}
-
-STATIC_INLINE_DEVICE\
-(void)
-detach_device_interrupt_edge(device *me,
- device_interrupt_edge **list,
- int my_port,
- device *dest,
- int dest_port)
-{
- while (*list != NULL) {
- device_interrupt_edge *old_edge = *list;
- if (old_edge->dest == dest
- && old_edge->dest_port == dest_port
- && old_edge->my_port == my_port) {
- if (old_edge->disposition == permenant_object)
- device_error(me, "attempt to delete permenant interrupt");
- *list = old_edge->next;
- zfree(old_edge);
- return;
- }
- }
- device_error(me, "attempt to delete unattached interrupt");
-}
-
-STATIC_INLINE_DEVICE\
-(void)
-clean_device_interrupt_edges(device_interrupt_edge **list)
-{
- while (*list != NULL) {
- device_interrupt_edge *old_edge = *list;
- switch (old_edge->disposition) {
- case permenant_object:
- list = &old_edge->next;
- break;
- case tempoary_object:
- *list = old_edge->next;
- zfree(old_edge);
- break;
- }
- }
-}
-
-
-/* A device */
-
-struct _device {
-
- /* my name is ... */
- const char *name;
- device_unit unit_address;
- const char *path;
- int nr_address_cells;
- int nr_size_cells;
-
- /* device tree */
- device *parent;
- device *children;
- device *sibling;
-
- /* its template methods */
- void *data; /* device specific data */
- const device_callbacks *callback;
-
- /* device properties */
- device_property_entry *properties;
-
- /* interrupts */
- device_interrupt_edge *interrupt_destinations;
-
- /* any open instances of this device */
- device_instance *instances;
-
- /* the internal/external mappings and other global requirements */
- cap *ihandles;
- cap *phandles;
- psim *system;
-
- /* debugging */
- int trace;
-};
-
-
-/* an instance of a device */
-struct _device_instance {
- void *data;
- char *args;
- char *path;
- const device_instance_callbacks *callback;
- /* the root instance */
- device *owner;
- device_instance *next;
- /* interposed instance */
- device_instance *parent;
- device_instance *child;
-};
-
-
-
-/* creation */
-
-STATIC_INLINE_DEVICE\
-(const char *)
-device_full_name(device *leaf,
- char *buf,
- unsigned sizeof_buf)
-{
- /* get a buffer */
- char full_name[1024];
- if (buf == (char*)0) {
- buf = full_name;
- sizeof_buf = sizeof(full_name);
- }
-
- /* construct a name */
- if (leaf->parent == NULL) {
- if (sizeof_buf < 1)
- error("device_full_name: buffer overflow");
- *buf = '\0';
- }
- else {
- char unit[1024];
- device_full_name(leaf->parent, buf, sizeof_buf);
- if (leaf->parent != NULL
- && device_encode_unit(leaf->parent,
- &leaf->unit_address,
- unit+1,
- sizeof(unit)-1) > 0)
- unit[0] = '@';
- else
- unit[0] = '\0';
- if (strlen(buf) + strlen("/") + strlen(leaf->name) + strlen(unit)
- >= sizeof_buf)
- error("device_full_name: buffer overflow");
- strcat(buf, "/");
- strcat(buf, leaf->name);
- strcat (buf, unit);
- }
-
- /* return it usefully */
- if (buf == full_name)
- buf = (char *) strdup(full_name);
- return buf;
-}
-
-STATIC_INLINE_DEVICE\
-(device *)
-device_create_from(const char *name,
- const device_unit *unit_address,
- void *data,
- const device_callbacks *callbacks,
- device *parent)
-{
- device *new_device = ZALLOC(device);
-
- /* insert it into the device tree */
- new_device->parent = parent;
- new_device->children = NULL;
- if (parent != NULL) {
- device **sibling = &parent->children;
- while ((*sibling) != NULL)
- sibling = &(*sibling)->sibling;
- *sibling = new_device;
- }
-
- /* give it a name */
- new_device->name = (char *) strdup(name);
- new_device->unit_address = *unit_address;
- new_device->path = device_full_name(new_device, NULL, 0);
-
- /* its template */
- new_device->data = data;
- new_device->callback = callbacks;
-
- /* its properties - already null */
- /* interrupts - already null */
-
- /* mappings - if needed */
- if (parent == NULL) {
- new_device->ihandles = cap_create(name);
- new_device->phandles = cap_create(name);
- }
- else {
- new_device->ihandles = device_root(parent)->ihandles;
- new_device->phandles = device_root(parent)->phandles;
- }
-
- cap_add(new_device->phandles, new_device);
- return new_device;
-}
-
-
-
-INLINE_DEVICE\
-(device *)
-device_create(device *parent,
- const char *base,
- const char *name,
- const char *unit_address,
- const char *args)
-{
- const device_descriptor *const *table;
- for (table = device_table; *table != NULL; table++) {
- const device_descriptor *descr;
- for (descr = *table; descr->name != NULL; descr++) {
- if (strcmp(base, descr->name) == 0) {
- device_unit address = { 0 };
- void *data = NULL;
- if (parent != NULL)
- if (device_decode_unit(parent, unit_address, &address) < 0)
- device_error(parent, "invalid address %s for device %s",
- unit_address, name);
- if (descr->creator != NULL)
- data = descr->creator(name, &address, args);
- return device_create_from(name, &address, data,
- descr->callbacks, parent);
- }
- }
- }
- device_error(parent, "attempt to attach unknown device %s", name);
- return NULL;
-}
-
-
-
-INLINE_DEVICE\
-(void)
-device_usage(int verbose)
-{
- const device_descriptor *const *table;
- if (verbose == 1) {
- int pos = 0;
- for (table = device_table; *table != NULL; table++) {
- const device_descriptor *descr;
- for (descr = *table; descr->name != NULL; descr++) {
- pos += strlen(descr->name) + 2;
- if (pos > 75) {
- pos = strlen(descr->name) + 2;
- printf_filtered("\n");
- }
- printf_filtered(" %s", descr->name);
- }
- printf_filtered("\n");
- }
- }
- if (verbose > 1) {
- for (table = device_table; *table != NULL; table++) {
- const device_descriptor *descr;
- for (descr = *table; descr->name != NULL; descr++) {
- printf_filtered(" %s:\n", descr->name);
- /* interrupt ports */
- if (descr->callbacks->interrupt.ports != NULL) {
- const device_interrupt_port_descriptor *ports =
- descr->callbacks->interrupt.ports;
- printf_filtered(" interrupt ports:");
- while (ports->name != NULL) {
- printf_filtered(" %s", ports->name);
- ports++;
- }
- printf_filtered("\n");
- }
- /* general info */
- if (descr->callbacks->usage != NULL)
- descr->callbacks->usage(verbose);
- }
- }
- }
-}
-
-
-
-
-
-/* Device node: */
-
-INLINE_DEVICE\
-(device *)
-device_parent(device *me)
-{
- return me->parent;
-}
-
-INLINE_DEVICE\
-(device *)
-device_root(device *me)
-{
- ASSERT(me != NULL);
- while (me->parent != NULL)
- me = me->parent;
- return me;
-}
-
-INLINE_DEVICE\
-(device *)
-device_sibling(device *me)
-{
- return me->sibling;
-}
-
-INLINE_DEVICE\
-(device *)
-device_child(device *me)
-{
- return me->children;
-}
-
-INLINE_DEVICE\
-(const char *)
-device_name(device *me)
-{
- return me->name;
-}
-
-INLINE_DEVICE\
-(const char *)
-device_path(device *me)
-{
- return me->path;
-}
-
-INLINE_DEVICE\
-(void *)
-device_data(device *me)
-{
- return me->data;
-}
-
-INLINE_DEVICE\
-(psim *)
-device_system(device *me)
-{
- return me->system;
-}
-
-INLINE_DEVICE\
-(const device_unit *)
-device_unit_address(device *me)
-{
- return &me->unit_address;
-}
-
-
-INLINE_DEVICE\
-(int)
-device_address_to_attach_address(device *me,
- const device_unit *address,
- int *attach_space,
- unsigned_word *attach_address,
- device *client)
-{
- if (me->callback->convert.address_to_attach_address == NULL)
- device_error(me, "no convert.address_to_attach_address method");
- return me->callback->convert.address_to_attach_address(me, address, attach_space, attach_address, client);
-}
-
-
-INLINE_DEVICE\
-(int)
-device_size_to_attach_size(device *me,
- const device_unit *size,
- unsigned *nr_bytes,
- device *client)
-{
- if (me->callback->convert.size_to_attach_size == NULL)
- device_error(me, "no convert.size_to_attach_size method");
- return me->callback->convert.size_to_attach_size(me, size, nr_bytes, client);
-}
-
-
-INLINE_DEVICE\
-(int)
-device_decode_unit(device *bus,
- const char *unit,
- device_unit *address)
-{
- if (bus->callback->convert.decode_unit == NULL)
- device_error(bus, "no convert.decode_unit method");
- return bus->callback->convert.decode_unit(bus, unit, address);
-}
-
-
-INLINE_DEVICE\
-(int)
-device_encode_unit(device *bus,
- const device_unit *unit_address,
- char *buf,
- int sizeof_buf)
-{
- if (bus->callback->convert.encode_unit == NULL)
- device_error(bus, "no convert.encode_unit method");
- return bus->callback->convert.encode_unit(bus, unit_address, buf, sizeof_buf);
-}
-
-INLINE_DEVICE\
-(unsigned)
-device_nr_address_cells(device *me)
-{
- if (me->nr_address_cells == 0) {
- if (device_find_property(me, "#address-cells") != NULL)
- me->nr_address_cells = device_find_integer_property(me, "#address-cells");
- else
- me->nr_address_cells = 2;
- }
- return me->nr_address_cells;
-}
-
-INLINE_DEVICE\
-(unsigned)
-device_nr_size_cells(device *me)
-{
- if (me->nr_size_cells == 0) {
- if (device_find_property(me, "#size-cells") != NULL)
- me->nr_size_cells = device_find_integer_property(me, "#size-cells");
- else
- me->nr_size_cells = 1;
- }
- return me->nr_size_cells;
-}
-
-
-
-/* device-instance: */
-
-INLINE_DEVICE\
-(device_instance *)
-device_create_instance_from(device *me,
- device_instance *parent,
- void *data,
- const char *path,
- const char *args,
- const device_instance_callbacks *callbacks)
-{
- device_instance *instance = ZALLOC(device_instance);
- if ((me == NULL) == (parent == NULL))
- device_error(me, "can't have both parent instance and parent device");
- /*instance->unit*/
- /* link this instance into the devices list */
- if (me != NULL) {
- ASSERT(parent == NULL);
- instance->owner = me;
- instance->parent = NULL;
- /* link this instance into the front of the devices instance list */
- instance->next = me->instances;
- me->instances = instance;
- }
- if (parent != NULL) {
- device_instance **previous;
- ASSERT(parent->child == NULL);
- parent->child = instance;
- ASSERT(me == NULL);
- instance->owner = parent->owner;
- instance->parent = parent;
- /* in the devices instance list replace the parent instance with
- this one */
- instance->next = parent->next;
- /* replace parent with this new node */
- previous = &instance->owner->instances;
- while (*previous != parent) {
- ASSERT(*previous != NULL);
- previous = &(*previous)->next;
- }
- *previous = instance;
- }
- instance->data = data;
- instance->args = (args == NULL ? NULL : (char *) strdup(args));
- instance->path = (path == NULL ? NULL : (char *) strdup(path));
- instance->callback = callbacks;
- cap_add(instance->owner->ihandles, instance);
- return instance;
-}
-
-
-INLINE_DEVICE\
-(device_instance *)
-device_create_instance(device *me,
- const char *path,
- const char *args)
-{
- /* create the instance */
- if (me->callback->instance_create == NULL)
- device_error(me, "no instance_create method");
- return me->callback->instance_create(me, path, args);
-}
-
-
-STATIC_INLINE_DEVICE\
-(void)
-clean_device_instances(device *me)
-{
- device_instance **instance = &me->instances;
- while (*instance != NULL) {
- device_instance *old_instance = *instance;
- device_instance_delete(old_instance);
- instance = &me->instances;
- }
-}
-
-
-INLINE_DEVICE\
-(void)
-device_instance_delete(device_instance *instance)
-{
- device *me = instance->owner;
- if (instance->callback->delete == NULL)
- device_error(me, "no delete method");
- instance->callback->delete(instance);
- if (instance->args != NULL)
- zfree(instance->args);
- if (instance->path != NULL)
- zfree(instance->path);
- if (instance->child == NULL) {
- /* only remove leaf nodes */
- device_instance **curr = &me->instances;
- while (*curr != instance) {
- ASSERT(*curr != NULL);
- curr = &(*curr)->next;
- }
- *curr = instance->next;
- }
- else {
- /* check it isn't in the instance list */
- device_instance *curr = me->instances;
- while (curr != NULL) {
- ASSERT(curr != instance);
- curr = curr->next;
- }
- /* unlink the child */
- ASSERT(instance->child->parent == instance);
- instance->child->parent = NULL;
- }
- cap_remove(me->ihandles, instance);
- zfree(instance);
-}
-
-INLINE_DEVICE\
-(int)
-device_instance_read(device_instance *instance,
- void *addr,
- unsigned_word len)
-{
- device *me = instance->owner;
- if (instance->callback->read == NULL)
- device_error(me, "no read method");
- return instance->callback->read(instance, addr, len);
-}
-
-INLINE_DEVICE\
-(int)
-device_instance_write(device_instance *instance,
- const void *addr,
- unsigned_word len)
-{
- device *me = instance->owner;
- if (instance->callback->write == NULL)
- device_error(me, "no write method");
- return instance->callback->write(instance, addr, len);
-}
-
-INLINE_DEVICE\
-(int)
-device_instance_seek(device_instance *instance,
- unsigned_word pos_hi,
- unsigned_word pos_lo)
-{
- device *me = instance->owner;
- if (instance->callback->seek == NULL)
- device_error(me, "no seek method");
- return instance->callback->seek(instance, pos_hi, pos_lo);
-}
-
-INLINE_DEVICE\
-(int)
-device_instance_call_method(device_instance *instance,
- const char *method_name,
- int n_stack_args,
- unsigned_cell stack_args[/*n_stack_args*/],
- int n_stack_returns,
- unsigned_cell stack_returns[/*n_stack_args*/])
-{
- device *me = instance->owner;
- const device_instance_methods *method = instance->callback->methods;
- if (method == NULL) {
- device_error(me, "no methods (want %s)", method_name);
- }
- while (method->name != NULL) {
- if (strcmp(method->name, method_name) == 0) {
- return method->method(instance,
- n_stack_args, stack_args,
- n_stack_returns, stack_returns);
- }
- method++;
- }
- device_error(me, "no %s method", method_name);
- return 0;
-}
-
-
-INLINE_DEVICE\
-(device *)
-device_instance_device(device_instance *instance)
-{
- return instance->owner;
-}
-
-INLINE_DEVICE\
-(const char *)
-device_instance_path(device_instance *instance)
-{
- return instance->path;
-}
-
-INLINE_DEVICE\
-(void *)
-device_instance_data(device_instance *instance)
-{
- return instance->data;
-}
-
-
-
-/* Device Properties: */
-
-STATIC_INLINE_DEVICE\
-(device_property_entry *)
-find_property_entry(device *me,
- const char *property)
-{
- device_property_entry *entry;
- ASSERT(property != NULL);
- entry = me->properties;
- while (entry != NULL) {
- if (strcmp(entry->value->name, property) == 0)
- return entry;
- entry = entry->next;
- }
- return NULL;
-}
-
-STATIC_INLINE_DEVICE\
-(void)
-device_add_property(device *me,
- const char *property,
- device_property_type type,
- const void *init_array,
- unsigned sizeof_init_array,
- const void *array,
- unsigned sizeof_array,
- const device_property *original,
- object_disposition disposition)
-{
- device_property_entry *new_entry = NULL;
- device_property *new_value = NULL;
-
- /* find the list end */
- device_property_entry **insertion_point = &me->properties;
- while (*insertion_point != NULL) {
- if (strcmp((*insertion_point)->value->name, property) == 0)
- return;
- insertion_point = &(*insertion_point)->next;
- }
-
- /* create a new value */
- new_value = ZALLOC(device_property);
- new_value->name = (char *) strdup(property);
- new_value->type = type;
- if (sizeof_array > 0) {
- void *new_array = zalloc(sizeof_array);
- memcpy(new_array, array, sizeof_array);
- new_value->array = new_array;
- new_value->sizeof_array = sizeof_array;
- }
- new_value->owner = me;
- new_value->original = original;
- new_value->disposition = disposition;
-
- /* insert the value into the list */
- new_entry = ZALLOC(device_property_entry);
- *insertion_point = new_entry;
- if (sizeof_init_array > 0) {
- void *new_init_array = zalloc(sizeof_init_array);
- memcpy(new_init_array, init_array, sizeof_init_array);
- new_entry->init_array = new_init_array;
- new_entry->sizeof_init_array = sizeof_init_array;
- }
- new_entry->value = new_value;
-}
-
-
-/* local - not available externally */
-STATIC_INLINE_DEVICE\
-(void)
-device_set_property(device *me,
- const char *property,
- device_property_type type,
- const void *array,
- int sizeof_array)
-{
- /* find the property */
- device_property_entry *entry = find_property_entry(me, property);
- if (entry != NULL) {
- /* existing property - update it */
- void *new_array = 0;
- device_property *value = entry->value;
- /* check the type matches */
- if (value->type != type)
- device_error(me, "conflict between type of new and old value for property %s", property);
- /* replace its value */
- if (value->array != NULL)
- zfree((void*)value->array);
- new_array = (sizeof_array > 0
- ? zalloc(sizeof_array)
- : (void*)0);
- value->array = new_array;
- value->sizeof_array = sizeof_array;
- if (sizeof_array > 0)
- memcpy(new_array, array, sizeof_array);
- return;
- }
- else {
- /* new property - create it */
- device_add_property(me, property, type,
- NULL, 0, array, sizeof_array,
- NULL, tempoary_object);
- }
-}
-
-
-STATIC_INLINE_DEVICE\
-(void)
-clean_device_properties(device *me)
-{
- device_property_entry **delete_point = &me->properties;
- while (*delete_point != NULL) {
- device_property_entry *current = *delete_point;
- switch (current->value->disposition) {
- case permenant_object:
- /* zap the current value, will be initialized later */
- ASSERT(current->init_array != NULL);
- if (current->value->array != NULL) {
- zfree((void*)current->value->array);
- current->value->array = NULL;
- }
- delete_point = &(*delete_point)->next;
- break;
- case tempoary_object:
- /* zap the actual property, was created during simulation run */
- ASSERT(current->init_array == NULL);
- *delete_point = current->next;
- if (current->value->array != NULL)
- zfree((void*)current->value->array);
- zfree(current->value);
- zfree(current);
- break;
- }
- }
-}
-
-
-INLINE_DEVICE\
-(void)
-device_init_static_properties(device *me,
- void *data)
-{
- device_property_entry *property;
- for (property = me->properties;
- property != NULL;
- property = property->next) {
- ASSERT(property->init_array != NULL);
- ASSERT(property->value->array == NULL);
- ASSERT(property->value->disposition == permenant_object);
- switch (property->value->type) {
- case array_property:
- case boolean_property:
- case range_array_property:
- case reg_array_property:
- case string_property:
- case string_array_property:
- case integer_property:
- /* delete the property, and replace it with the original */
- device_set_property(me, property->value->name,
- property->value->type,
- property->init_array,
- property->sizeof_init_array);
- break;
- case ihandle_property:
- break;
- }
- }
-}
-
-
-INLINE_DEVICE\
-(void)
-device_init_runtime_properties(device *me,
- void *data)
-{
- device_property_entry *property;
- for (property = me->properties;
- property != NULL;
- property = property->next) {
- switch (property->value->disposition) {
- case permenant_object:
- switch (property->value->type) {
- case ihandle_property:
- {
- device_instance *ihandle;
- ihandle_runtime_property_spec spec;
- ASSERT(property->init_array != NULL);
- ASSERT(property->value->array == NULL);
- device_find_ihandle_runtime_property(me, property->value->name, &spec);
- ihandle = tree_instance(me, spec.full_path);
- device_set_ihandle_property(me, property->value->name, ihandle);
- break;
- }
- case array_property:
- case boolean_property:
- case range_array_property:
- case integer_property:
- case reg_array_property:
- case string_property:
- case string_array_property:
- ASSERT(property->init_array != NULL);
- ASSERT(property->value->array != NULL);
- break;
- }
- break;
- case tempoary_object:
- ASSERT(property->init_array == NULL);
- ASSERT(property->value->array != NULL);
- break;
- }
- }
-}
-
-
-INLINE_DEVICE\
-(const device_property *)
-device_next_property(const device_property *property)
-{
- /* find the property in the list */
- device *owner = property->owner;
- device_property_entry *entry = owner->properties;
- while (entry != NULL && entry->value != property)
- entry = entry->next;
- /* now return the following property */
- ASSERT(entry != NULL); /* must be a member! */
- if (entry->next != NULL)
- return entry->next->value;
- else
- return NULL;
-}
-
-
-INLINE_DEVICE\
-(const device_property *)
-device_find_property(device *me,
- const char *property)
-{
- if (me == NULL) {
- return NULL;
- }
- else if (property == NULL || strcmp(property, "") == 0) {
- if (me->properties == NULL)
- return NULL;
- else
- return me->properties->value;
- }
- else {
- device_property_entry *entry = find_property_entry(me, property);
- if (entry != NULL)
- return entry->value;
- }
- return NULL;
-}
-
-
-INLINE_DEVICE\
-(void)
-device_add_array_property(device *me,
- const char *property,
- const void *array,
- int sizeof_array)
-{
- device_add_property(me, property, array_property,
- array, sizeof_array, array, sizeof_array,
- NULL, permenant_object);
-}
-
-INLINE_DEVICE\
-(void)
-device_set_array_property(device *me,
- const char *property,
- const void *array,
- int sizeof_array)
-{
- device_set_property(me, property, array_property, array, sizeof_array);
-}
-
-INLINE_DEVICE\
-(const device_property *)
-device_find_array_property(device *me,
- const char *property)
-{
- const device_property *node;
- node = device_find_property(me, property);
- if (node == (device_property*)0
- || node->type != array_property)
- device_error(me, "property %s not found or of wrong type", property);
- return node;
-}
-
-
-INLINE_DEVICE\
-(void)
-device_add_boolean_property(device *me,
- const char *property,
- int boolean)
-{
- signed32 new_boolean = (boolean ? -1 : 0);
- device_add_property(me, property, boolean_property,
- &new_boolean, sizeof(new_boolean),
- &new_boolean, sizeof(new_boolean),
- NULL, permenant_object);
-}
-
-INLINE_DEVICE\
-(int)
-device_find_boolean_property(device *me,
- const char *property)
-{
- const device_property *node;
- unsigned_cell boolean;
- node = device_find_property(me, property);
- if (node == (device_property*)0
- || node->type != boolean_property)
- device_error(me, "property %s not found or of wrong type", property);
- ASSERT(sizeof(boolean) == node->sizeof_array);
- memcpy(&boolean, node->array, sizeof(boolean));
- return boolean;
-}
-
-
-INLINE_DEVICE\
-(void)
-device_add_ihandle_runtime_property(device *me,
- const char *property,
- const ihandle_runtime_property_spec *ihandle)
-{
- /* enter the full path as the init array */
- device_add_property(me, property, ihandle_property,
- ihandle->full_path, strlen(ihandle->full_path) + 1,
- NULL, 0,
- NULL, permenant_object);
-}
-
-INLINE_DEVICE\
-(void)
-device_find_ihandle_runtime_property(device *me,
- const char *property,
- ihandle_runtime_property_spec *ihandle)
-{
- device_property_entry *entry = find_property_entry(me, property);
- TRACE(trace_devices,
- ("device_find_ihandle_runtime_property(me=0x%lx, property=%s)\n",
- (long)me, property));
- if (entry == NULL
- || entry->value->type != ihandle_property
- || entry->value->disposition != permenant_object)
- device_error(me, "property %s not found or of wrong type", property);
- ASSERT(entry->init_array != NULL);
- /* the full path */
- ihandle->full_path = entry->init_array;
-}
-
-
-
-INLINE_DEVICE\
-(void)
-device_set_ihandle_property(device *me,
- const char *property,
- device_instance *ihandle)
-{
- unsigned_cell cells;
- cells = H2BE_cell(device_instance_to_external(ihandle));
- device_set_property(me, property, ihandle_property,
- &cells, sizeof(cells));
-
-}
-
-INLINE_DEVICE\
-(device_instance *)
-device_find_ihandle_property(device *me,
- const char *property)
-{
- const device_property *node;
- unsigned_cell ihandle;
- device_instance *instance;
-
- node = device_find_property(me, property);
- if (node == NULL || node->type != ihandle_property)
- device_error(me, "property %s not found or of wrong type", property);
- if (node->array == NULL)
- device_error(me, "runtime property %s not yet initialized", property);
-
- ASSERT(sizeof(ihandle) == node->sizeof_array);
- memcpy(&ihandle, node->array, sizeof(ihandle));
- instance = external_to_device_instance(me, BE2H_cell(ihandle));
- ASSERT(instance != NULL);
- return instance;
-}
-
-
-INLINE_DEVICE\
-(void)
-device_add_integer_property(device *me,
- const char *property,
- signed_cell integer)
-{
- H2BE(integer);
- device_add_property(me, property, integer_property,
- &integer, sizeof(integer),
- &integer, sizeof(integer),
- NULL, permenant_object);
-}
-
-INLINE_DEVICE\
-(signed_cell)
-device_find_integer_property(device *me,
- const char *property)
-{
- const device_property *node;
- signed_cell integer;
- TRACE(trace_devices,
- ("device_find_integer(me=0x%lx, property=%s)\n",
- (long)me, property));
- node = device_find_property(me, property);
- if (node == (device_property*)0
- || node->type != integer_property)
- device_error(me, "property %s not found or of wrong type", property);
- ASSERT(sizeof(integer) == node->sizeof_array);
- memcpy(&integer, node->array, sizeof(integer));
- return BE2H_cell(integer);
-}
-
-INLINE_DEVICE\
-(int)
-device_find_integer_array_property(device *me,
- const char *property,
- unsigned index,
- signed_cell *integer)
-{
- const device_property *node;
- int sizeof_integer = sizeof(*integer);
- signed_cell *cell;
- TRACE(trace_devices,
- ("device_find_integer(me=0x%lx, property=%s)\n",
- (long)me, property));
-
- /* check things sane */
- node = device_find_property(me, property);
- if (node == (device_property*)0
- || (node->type != integer_property
- && node->type != array_property))
- device_error(me, "property %s not found or of wrong type", property);
- if ((node->sizeof_array % sizeof_integer) != 0)
- device_error(me, "property %s contains an incomplete number of cells", property);
- if (node->sizeof_array <= sizeof_integer * index)
- return 0;
-
- /* Find and convert the value */
- cell = ((signed_cell*)node->array) + index;
- *integer = BE2H_cell(*cell);
-
- return node->sizeof_array / sizeof_integer;
-}
-
-
-STATIC_INLINE_DEVICE\
-(unsigned_cell *)
-unit_address_to_cells(const device_unit *unit,
- unsigned_cell *cell,
- int nr_cells)
-{
- int i;
- ASSERT(nr_cells == unit->nr_cells);
- for (i = 0; i < unit->nr_cells; i++) {
- *cell = H2BE_cell(unit->cells[i]);
- cell += 1;
- }
- return cell;
-}
-
-
-STATIC_INLINE_DEVICE\
-(const unsigned_cell *)
-cells_to_unit_address(const unsigned_cell *cell,
- device_unit *unit,
- int nr_cells)
-{
- int i;
- memset(unit, 0, sizeof(*unit));
- unit->nr_cells = nr_cells;
- for (i = 0; i < unit->nr_cells; i++) {
- unit->cells[i] = BE2H_cell(*cell);
- cell += 1;
- }
- return cell;
-}
-
-
-STATIC_INLINE_DEVICE\
-(unsigned)
-nr_range_property_cells(device *me,
- int nr_ranges)
-{
- return ((device_nr_address_cells(me)
- + device_nr_address_cells(device_parent(me))
- + device_nr_size_cells(me))
- ) * nr_ranges;
-}
-
-INLINE_DEVICE\
-(void)
-device_add_range_array_property(device *me,
- const char *property,
- const range_property_spec *ranges,
- unsigned nr_ranges)
-{
- unsigned sizeof_cells = (nr_range_property_cells(me, nr_ranges)
- * sizeof(unsigned_cell));
- unsigned_cell *cells = zalloc(sizeof_cells);
- unsigned_cell *cell;
- int i;
-
- /* copy the property elements over */
- cell = cells;
- for (i = 0; i < nr_ranges; i++) {
- const range_property_spec *range = &ranges[i];
- /* copy the child address */
- cell = unit_address_to_cells(&range->child_address, cell,
- device_nr_address_cells(me));
- /* copy the parent address */
- cell = unit_address_to_cells(&range->parent_address, cell,
- device_nr_address_cells(device_parent(me)));
- /* copy the size */
- cell = unit_address_to_cells(&range->size, cell,
- device_nr_size_cells(me));
- }
- ASSERT(cell == &cells[nr_range_property_cells(me, nr_ranges)]);
-
- /* add it */
- device_add_property(me, property, range_array_property,
- cells, sizeof_cells,
- cells, sizeof_cells,
- NULL, permenant_object);
-
- zfree(cells);
-}
-
-INLINE_DEVICE\
-(int)
-device_find_range_array_property(device *me,
- const char *property,
- unsigned index,
- range_property_spec *range)
-{
- const device_property *node;
- unsigned sizeof_entry = (nr_range_property_cells(me, 1)
- * sizeof(unsigned_cell));
- const unsigned_cell *cells;
-
- /* locate the property */
- node = device_find_property(me, property);
- if (node == (device_property*)0
- || node->type != range_array_property)
- device_error(me, "property %s not found or of wrong type", property);
-
- /* aligned ? */
- if ((node->sizeof_array % sizeof_entry) != 0)
- device_error(me, "property %s contains an incomplete number of entries",
- property);
-
- /* within bounds? */
- if (node->sizeof_array < sizeof_entry * (index + 1))
- return 0;
-
- /* find the range of interest */
- cells = (unsigned_cell*)((char*)node->array + sizeof_entry * index);
-
- /* copy the child address out - converting as we go */
- cells = cells_to_unit_address(cells, &range->child_address,
- device_nr_address_cells(me));
-
- /* copy the parent address out - converting as we go */
- cells = cells_to_unit_address(cells, &range->parent_address,
- device_nr_address_cells(device_parent(me)));
-
- /* copy the size - converting as we go */
- cells = cells_to_unit_address(cells, &range->size,
- device_nr_size_cells(me));
-
- return node->sizeof_array / sizeof_entry;
-}
-
-
-STATIC_INLINE_DEVICE\
-(unsigned)
-nr_reg_property_cells(device *me,
- int nr_regs)
-{
- return (device_nr_address_cells(device_parent(me))
- + device_nr_size_cells(device_parent(me))
- ) * nr_regs;
-}
-
-INLINE_DEVICE\
-(void)
-device_add_reg_array_property(device *me,
- const char *property,
- const reg_property_spec *regs,
- unsigned nr_regs)
-{
- unsigned sizeof_cells = (nr_reg_property_cells(me, nr_regs)
- * sizeof(unsigned_cell));
- unsigned_cell *cells = zalloc(sizeof_cells);
- unsigned_cell *cell;
- int i;
-
- /* copy the property elements over */
- cell = cells;
- for (i = 0; i < nr_regs; i++) {
- const reg_property_spec *reg = &regs[i];
- /* copy the address */
- cell = unit_address_to_cells(&reg->address, cell,
- device_nr_address_cells(device_parent(me)));
- /* copy the size */
- cell = unit_address_to_cells(&reg->size, cell,
- device_nr_size_cells(device_parent(me)));
- }
- ASSERT(cell == &cells[nr_reg_property_cells(me, nr_regs)]);
-
- /* add it */
- device_add_property(me, property, reg_array_property,
- cells, sizeof_cells,
- cells, sizeof_cells,
- NULL, permenant_object);
-
- zfree(cells);
-}
-
-INLINE_DEVICE\
-(int)
-device_find_reg_array_property(device *me,
- const char *property,
- unsigned index,
- reg_property_spec *reg)
-{
- const device_property *node;
- unsigned sizeof_entry = (nr_reg_property_cells(me, 1)
- * sizeof(unsigned_cell));
- const unsigned_cell *cells;
-
- /* locate the property */
- node = device_find_property(me, property);
- if (node == (device_property*)0
- || node->type != reg_array_property)
- device_error(me, "property %s not found or of wrong type", property);
-
- /* aligned ? */
- if ((node->sizeof_array % sizeof_entry) != 0)
- device_error(me, "property %s contains an incomplete number of entries",
- property);
-
- /* within bounds? */
- if (node->sizeof_array < sizeof_entry * (index + 1))
- return 0;
-
- /* find the range of interest */
- cells = (unsigned_cell*)((char*)node->array + sizeof_entry * index);
-
- /* copy the address out - converting as we go */
- cells = cells_to_unit_address(cells, &reg->address,
- device_nr_address_cells(device_parent(me)));
-
- /* copy the size out - converting as we go */
- cells = cells_to_unit_address(cells, &reg->size,
- device_nr_size_cells(device_parent(me)));
-
- return node->sizeof_array / sizeof_entry;
-}
-
-
-INLINE_DEVICE\
-(void)
-device_add_string_property(device *me,
- const char *property,
- const char *string)
-{
- device_add_property(me, property, string_property,
- string, strlen(string) + 1,
- string, strlen(string) + 1,
- NULL, permenant_object);
-}
-
-INLINE_DEVICE\
-(const char *)
-device_find_string_property(device *me,
- const char *property)
-{
- const device_property *node;
- const char *string;
- node = device_find_property(me, property);
- if (node == (device_property*)0
- || node->type != string_property)
- device_error(me, "property %s not found or of wrong type", property);
- string = node->array;
- ASSERT(strlen(string) + 1 == node->sizeof_array);
- return string;
-}
-
-INLINE_DEVICE\
-(void)
-device_add_string_array_property(device *me,
- const char *property,
- const string_property_spec *strings,
- unsigned nr_strings)
-{
- int sizeof_array;
- int string_nr;
- char *array;
- char *chp;
- if (nr_strings == 0)
- device_error(me, "property %s must be non-null", property);
- /* total up the size of the needed array */
- for (sizeof_array = 0, string_nr = 0;
- string_nr < nr_strings;
- string_nr ++) {
- sizeof_array += strlen(strings[string_nr]) + 1;
- }
- /* create the array */
- array = (char*)zalloc(sizeof_array);
- chp = array;
- for (string_nr = 0;
- string_nr < nr_strings;
- string_nr++) {
- strcpy(chp, strings[string_nr]);
- chp += strlen(chp) + 1;
- }
- ASSERT(chp == array + sizeof_array);
- /* now enter it */
- device_add_property(me, property, string_array_property,
- array, sizeof_array,
- array, sizeof_array,
- NULL, permenant_object);
-}
-
-INLINE_DEVICE\
-(int)
-device_find_string_array_property(device *me,
- const char *property,
- unsigned index,
- string_property_spec *string)
-{
- const device_property *node;
- node = device_find_property(me, property);
- if (node == (device_property*)0)
- device_error(me, "property %s not found", property);
- switch (node->type) {
- default:
- device_error(me, "property %s of wrong type", property);
- break;
- case string_property:
- if (index == 0) {
- *string = node->array;
- ASSERT(strlen(*string) + 1 == node->sizeof_array);
- return 1;
- }
- break;
- case array_property:
- if (node->sizeof_array == 0
- || ((char*)node->array)[node->sizeof_array - 1] != '\0')
- device_error(me, "property %s invalid for string array", property);
- /* FALL THROUGH */
- case string_array_property:
- ASSERT(node->sizeof_array > 0);
- ASSERT(((char*)node->array)[node->sizeof_array - 1] == '\0');
- {
- const char *chp = node->array;
- int nr_entries = 0;
- /* count the number of strings, keeping an eye out for the one
- we're looking for */
- *string = chp;
- do {
- if (*chp == '\0') {
- /* next string */
- nr_entries++;
- chp++;
- if (nr_entries == index)
- *string = chp;
- }
- else {
- chp++;
- }
- } while (chp < (char*)node->array + node->sizeof_array);
- if (index < nr_entries)
- return nr_entries;
- else {
- *string = NULL;
- return 0;
- }
- }
- break;
- }
- return 0;
-}
-
-INLINE_DEVICE\
-(void)
-device_add_duplicate_property(device *me,
- const char *property,
- const device_property *original)
-{
- device_property_entry *master;
- TRACE(trace_devices,
- ("device_add_duplicate_property(me=0x%lx, property=%s, ...)\n",
- (long)me, property));
- if (original->disposition != permenant_object)
- device_error(me, "Can only duplicate permenant objects");
- /* find the original's master */
- master = original->owner->properties;
- while (master->value != original) {
- master = master->next;
- ASSERT(master != NULL);
- }
- /* now duplicate it */
- device_add_property(me, property,
- original->type,
- master->init_array, master->sizeof_init_array,
- original->array, original->sizeof_array,
- original, permenant_object);
-}
-
-
-
-/* Device Hardware: */
-
-INLINE_DEVICE\
-(unsigned)
-device_io_read_buffer(device *me,
- void *dest,
- int space,
- unsigned_word addr,
- unsigned nr_bytes,
- cpu *processor,
- unsigned_word cia)
-{
- if (me->callback->io.read_buffer == NULL)
- device_error(me, "no io.read_buffer method");
- return me->callback->io.read_buffer(me, dest, space,
- addr, nr_bytes,
- processor, cia);
-}
-
-INLINE_DEVICE\
-(unsigned)
-device_io_write_buffer(device *me,
- const void *source,
- int space,
- unsigned_word addr,
- unsigned nr_bytes,
- cpu *processor,
- unsigned_word cia)
-{
- if (me->callback->io.write_buffer == NULL)
- device_error(me, "no io.write_buffer method");
- return me->callback->io.write_buffer(me, source, space,
- addr, nr_bytes,
- processor, cia);
-}
-
-INLINE_DEVICE\
-(unsigned)
-device_dma_read_buffer(device *me,
- void *dest,
- int space,
- unsigned_word addr,
- unsigned nr_bytes)
-{
- if (me->callback->dma.read_buffer == NULL)
- device_error(me, "no dma.read_buffer method");
- return me->callback->dma.read_buffer(me, dest, space,
- addr, nr_bytes);
-}
-
-INLINE_DEVICE\
-(unsigned)
-device_dma_write_buffer(device *me,
- const void *source,
- int space,
- unsigned_word addr,
- unsigned nr_bytes,
- int violate_read_only_section)
-{
- if (me->callback->dma.write_buffer == NULL)
- device_error(me, "no dma.write_buffer method");
- return me->callback->dma.write_buffer(me, source, space,
- addr, nr_bytes,
- violate_read_only_section);
-}
-
-INLINE_DEVICE\
-(void)
-device_attach_address(device *me,
- attach_type attach,
- int space,
- unsigned_word addr,
- unsigned nr_bytes,
- access_type access,
- device *client) /*callback/default*/
-{
- if (me->callback->address.attach == NULL)
- device_error(me, "no address.attach method");
- me->callback->address.attach(me, attach, space,
- addr, nr_bytes, access, client);
-}
-
-INLINE_DEVICE\
-(void)
-device_detach_address(device *me,
- attach_type attach,
- int space,
- unsigned_word addr,
- unsigned nr_bytes,
- access_type access,
- device *client) /*callback/default*/
-{
- if (me->callback->address.detach == NULL)
- device_error(me, "no address.detach method");
- me->callback->address.detach(me, attach, space,
- addr, nr_bytes, access, client);
-}
-
-
-
-/* Interrupts: */
-
-INLINE_DEVICE(void)
-device_interrupt_event(device *me,
- int my_port,
- int level,
- cpu *processor,
- unsigned_word cia)
-{
- int found_an_edge = 0;
- device_interrupt_edge *edge;
- /* device's interrupt lines directly connected */
- for (edge = me->interrupt_destinations;
- edge != NULL;
- edge = edge->next) {
- if (edge->my_port == my_port) {
- if (edge->dest->callback->interrupt.event == NULL)
- device_error(me, "no interrupt method");
- edge->dest->callback->interrupt.event(edge->dest,
- edge->dest_port,
- me,
- my_port,
- level,
- processor, cia);
- found_an_edge = 1;
- }
- }
- if (!found_an_edge) {
- device_error(me, "No interrupt edge for port %d", my_port);
- }
-}
-
-INLINE_DEVICE\
-(void)
-device_interrupt_attach(device *me,
- int my_port,
- device *dest,
- int dest_port,
- object_disposition disposition)
-{
- attach_device_interrupt_edge(&me->interrupt_destinations,
- my_port,
- dest,
- dest_port,
- disposition);
-}
-
-INLINE_DEVICE\
-(void)
-device_interrupt_detach(device *me,
- int my_port,
- device *dest,
- int dest_port)
-{
- detach_device_interrupt_edge(me,
- &me->interrupt_destinations,
- my_port,
- dest,
- dest_port);
-}
-
-INLINE_DEVICE\
-(void)
-device_interrupt_traverse(device *me,
- device_interrupt_traverse_function *handler,
- void *data)
-{
- device_interrupt_edge *interrupt_edge;
- for (interrupt_edge = me->interrupt_destinations;
- interrupt_edge != NULL;
- interrupt_edge = interrupt_edge->next) {
- handler(me, interrupt_edge->my_port,
- interrupt_edge->dest, interrupt_edge->dest_port,
- data);
- }
-}
-
-INLINE_DEVICE\
-(int)
-device_interrupt_decode(device *me,
- const char *port_name,
- port_direction direction)
-{
- if (port_name == NULL || port_name[0] == '\0')
- return 0;
- if (isdigit(port_name[0])) {
- return strtoul(port_name, NULL, 0);
- }
- else {
- const device_interrupt_port_descriptor *ports =
- me->callback->interrupt.ports;
- if (ports != NULL) {
- while (ports->name != NULL) {
- if (ports->direction == bidirect_port
- || ports->direction == direction) {
- if (ports->nr_ports > 0) {
- int len = strlen(ports->name);
- if (strncmp(port_name, ports->name, len) == 0) {
- if (port_name[len] == '\0')
- return ports->number;
- else if(isdigit(port_name[len])) {
- int port = ports->number + strtoul(&port_name[len], NULL, 0);
- if (port >= ports->number + ports->nr_ports)
- device_error(me, "Interrupt port %s out of range",
- port_name);
- return port;
- }
- }
- }
- else if (strcmp(port_name, ports->name) == 0)
- return ports->number;
- }
- ports++;
- }
- }
- }
- device_error(me, "Unreconized interrupt port %s", port_name);
- return 0;
-}
-
-INLINE_DEVICE\
-(int)
-device_interrupt_encode(device *me,
- int port_number,
- char *buf,
- int sizeof_buf,
- port_direction direction)
-{
- const device_interrupt_port_descriptor *ports = NULL;
- ports = me->callback->interrupt.ports;
- if (ports != NULL) {
- while (ports->name != NULL) {
- if (ports->direction == bidirect_port
- || ports->direction == direction) {
- if (ports->nr_ports > 0) {
- if (port_number >= ports->number
- && port_number < ports->number + ports->nr_ports) {
- strcpy(buf, ports->name);
- sprintf(buf + strlen(buf), "%d", port_number - ports->number);
- if (strlen(buf) >= sizeof_buf)
- error("device_interrupt_encode: buffer overflow");
- return strlen(buf);
- }
- }
- else {
- if (ports->number == port_number) {
- if (strlen(ports->name) >= sizeof_buf)
- error("device_interrupt_encode: buffer overflow");
- strcpy(buf, ports->name);
- return strlen(buf);
- }
- }
- }
- ports++;
- }
- }
- sprintf(buf, "%d", port_number);
- if (strlen(buf) >= sizeof_buf)
- error("device_interrupt_encode: buffer overflow");
- return strlen(buf);
-}
-
-
-
-/* IOCTL: */
-
-EXTERN_DEVICE\
-(int)
-device_ioctl(device *me,
- cpu *processor,
- unsigned_word cia,
- device_ioctl_request request,
- ...)
-{
- int status;
- va_list ap;
- va_start(ap, request);
- if (me->callback->ioctl == NULL)
- device_error(me, "no ioctl method");
- status = me->callback->ioctl(me, processor, cia, request, ap);
- va_end(ap);
- return status;
-}
-
-
-
-/* I/O */
-
-EXTERN_DEVICE\
-(void volatile)
-device_error(device *me,
- const char *fmt,
- ...)
-{
- char message[1024];
- va_list ap;
- /* format the message */
- va_start(ap, fmt);
- vsprintf(message, fmt, ap);
- va_end(ap);
- /* sanity check */
- if (strlen(message) >= sizeof(message))
- error("device_error: buffer overflow");
- if (me == NULL)
- error("device: %s", message);
- else if (me->path != NULL && me->path[0] != '\0')
- error("%s: %s", me->path, message);
- else if (me->name != NULL && me->name[0] != '\0')
- error("%s: %s", me->name, message);
- else
- error("device: %s", message);
- while(1);
-}
-
-INLINE_DEVICE\
-(int)
-device_trace(device *me)
-{
- return me->trace;
-}
-
-
-/* External representation */
-
-INLINE_DEVICE\
-(device *)
-external_to_device(device *tree_member,
- unsigned_cell phandle)
-{
- device *me = cap_internal(tree_member->phandles, phandle);
- return me;
-}
-
-INLINE_DEVICE\
-(unsigned_cell)
-device_to_external(device *me)
-{
- unsigned_cell phandle = cap_external(me->phandles, me);
- return phandle;
-}
-
-INLINE_DEVICE\
-(device_instance *)
-external_to_device_instance(device *tree_member,
- unsigned_cell ihandle)
-{
- device_instance *instance = cap_internal(tree_member->ihandles, ihandle);
- return instance;
-}
-
-INLINE_DEVICE\
-(unsigned_cell)
-device_instance_to_external(device_instance *instance)
-{
- unsigned_cell ihandle = cap_external(instance->owner->ihandles, instance);
- return ihandle;
-}
-
-
-/* Map onto the event functions */
-
-INLINE_DEVICE\
-(event_entry_tag)
-device_event_queue_schedule(device *me,
- signed64 delta_time,
- device_event_handler *handler,
- void *data)
-{
- return event_queue_schedule(psim_event_queue(me->system),
- delta_time,
- handler,
- data);
-}
-
-INLINE_DEVICE\
-(void)
-device_event_queue_deschedule(device *me,
- event_entry_tag event_to_remove)
-{
- event_queue_deschedule(psim_event_queue(me->system),
- event_to_remove);
-}
-
-INLINE_DEVICE\
-(signed64)
-device_event_queue_time(device *me)
-{
- return event_queue_time(psim_event_queue(me->system));
-}
-
-
-/* Initialization: */
-
-
-INLINE_DEVICE\
-(void)
-device_clean(device *me,
- void *data)
-{
- psim *system;
- system = (psim*)data;
- TRACE(trace_device_init, ("device_clean - initializing %s", me->path));
- clean_device_interrupt_edges(&me->interrupt_destinations);
- clean_device_instances(me);
- clean_device_properties(me);
-}
-
-/* Device initialization: */
-
-INLINE_DEVICE\
-(void)
-device_init_address(device *me,
- void *data)
-{
- psim *system = (psim*)data;
- int nr_address_cells;
- int nr_size_cells;
- TRACE(trace_device_init, ("device_init_address - initializing %s", me->path));
-
- /* ensure the cap database is valid */
- if (me->parent == NULL) {
- cap_init(me->ihandles);
- cap_init(me->phandles);
- }
-
- /* some basics */
- me->system = system; /* misc things not known until now */
- me->trace = (device_find_property(me, "trace")
- ? device_find_integer_property(me, "trace")
- : 0);
-
- /* Ensure that the first address found in the reg property matches
- anything that was specified as part of the devices name */
- if (device_find_property(me, "reg") != NULL) {
- reg_property_spec unit;
- device_find_reg_array_property(me, "reg", 0, &unit);
- if (memcmp(device_unit_address(me), &unit.address, sizeof(unit.address))
- != 0)
- device_error(me, "Unit address as specified by the reg property in conflict with the value previously specified in the devices path");
- }
-
- /* ensure that the devices #address/size-cells is consistent */
- nr_address_cells = device_nr_address_cells(me);
- if (device_find_property(me, "#address-cells") != NULL
- && (nr_address_cells
- != device_find_integer_property(me, "#address-cells")))
- device_error(me, "#address-cells property used before defined");
- nr_size_cells = device_nr_size_cells(me);
- if (device_find_property(me, "#size-cells") != NULL
- && (nr_size_cells
- != device_find_integer_property(me, "#size-cells")))
- device_error(me, "#size-cells property used before defined");
-
- /* now init it */
- if (me->callback->init.address != NULL)
- me->callback->init.address(me);
-}
-
-INLINE_DEVICE\
-(void)
-device_init_data(device *me,
- void *data)
-{
- TRACE(trace_device_init, ("device_init_data - initializing %s", me->path));
- if (me->callback->init.data != NULL)
- me->callback->init.data(me);
-}
-
-#endif /* _DEVICE_C_ */
diff --git a/sim/ppc/device.h b/sim/ppc/device.h
deleted file mode 100644
index 56c8ce54d99..00000000000
--- a/sim/ppc/device.h
+++ /dev/null
@@ -1,797 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1997, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-#ifndef _DEVICE_H_
-#define _DEVICE_H_
-
-#ifndef INLINE_DEVICE
-#define INLINE_DEVICE
-#endif
-
-/* declared in basics.h, this object is used everywhere */
-/* typedef struct _device device; */
-
-
-/* Introduction:
-
- As explained in earlier sections, the device, device instance,
- property and interrupts lie at the heart of PSIM's device model.
-
- In the below a synopsis of the device object and the operations it
- supports are given. Details of this object can be found in the
- files <<device.h>> and <<device.c>>.
-
- */
-
-
-/* Device creation: */
-
-INLINE_DEVICE\
-(device *) device_create
-(device *parent,
- const char *base,
- const char *name,
- const char *unit_address,
- const char *args);
-
-INLINE_DEVICE\
-(void) device_usage
-(int verbose);
-
-
-/* Device initialization: */
-
-INLINE_DEVICE\
-(void) device_clean
-(device *root,
- void *data);
-
-INLINE_DEVICE\
-(void) device_init_static_properties
-(device *me,
- void *data);
-
-INLINE_DEVICE\
-(void) device_init_address
-(device *me,
- void *data);
-
-INLINE_DEVICE\
-(void) device_init_runtime_properties
-(device *me,
- void *data);
-
-INLINE_DEVICE\
-(void) device_init_data
-(device *me,
- void *data);
-
-
-/* Relationships:
-
- A device is able to determine its relationship to other devices
- within the tree. Operations include querying for a devices parent,
- sibling, child, name, and path (from the root).
-
- */
-
-INLINE_DEVICE\
-(device *) device_parent
-(device *me);
-
-INLINE_DEVICE\
-(device *) device_root
-(device *me);
-
-INLINE_DEVICE\
-(device *) device_sibling
-(device *me);
-
-INLINE_DEVICE\
-(device *) device_child
-(device *me);
-
-INLINE_DEVICE\
-(const char *) device_name
-(device *me);
-
-INLINE_DEVICE\
-(const char *) device_base
-(device *me);
-
-INLINE_DEVICE\
-(const char *) device_path
-(device *me);
-
-INLINE_DEVICE\
-(void *) device_data
-(device *me);
-
-INLINE_DEVICE\
-(psim *) device_system
-(device *me);
-
-typedef struct _device_unit {
- int nr_cells;
- unsigned_cell cells[4]; /* unused cells are zero */
-} device_unit;
-
-INLINE_DEVICE\
-(const device_unit *) device_unit_address
-(device *me);
-
-INLINE_DEVICE\
-(int) device_decode_unit
-(device *bus,
- const char *unit,
- device_unit *address);
-
-INLINE_DEVICE\
-(int) device_encode_unit
-(device *bus,
- const device_unit *unit_address,
- char *buf,
- int sizeof_buf);
-
-
-/* Convert an Open Firmware size into a form suitable for attach
- address calls.
-
- Return a zero result if the address should be ignored when looking
- for attach addresses */
-
-INLINE_DEVICE\
-(int) device_address_to_attach_address
-(device *me,
- const device_unit *address,
- int *attach_space,
- unsigned_word *attach_address,
- device *client);
-
-
-/* Convert an Open Firmware size into a form suitable for attach
- address calls
-
- Return a zero result if the address should be ignored */
-
-INLINE_DEVICE\
-(int) device_size_to_attach_size
-(device *me,
- const device_unit *size,
- unsigned *nr_bytes,
- device *client);
-
-
-INLINE_DEVICE\
-(unsigned) device_nr_address_cells
-(device *me);
-
-INLINE_DEVICE\
-(unsigned) device_nr_size_cells
-(device *me);
-
-
-/* Properties:
-
- Attached to a device are a number of properties. Each property has
- a size and type (both of which can be queried). A device is able
- to iterate over or query and set a properties value.
-
- */
-
-/* The following are valid property types. The property `array' is
- for generic untyped data. */
-
-typedef enum {
- array_property,
- boolean_property,
- ihandle_property, /*runtime*/
- integer_property,
- range_array_property,
- reg_array_property,
- string_property,
- string_array_property,
-} device_property_type;
-
-typedef struct _device_property device_property;
-struct _device_property {
- device *owner;
- const char *name;
- device_property_type type;
- unsigned sizeof_array;
- const void *array;
- const device_property *original;
- object_disposition disposition;
-};
-
-
-/* iterate through the properties attached to a device */
-
-INLINE_DEVICE\
-(const device_property *) device_next_property
-(const device_property *previous);
-
-INLINE_DEVICE\
-(const device_property *) device_find_property
-(device *me,
- const char *property); /* NULL for first property */
-
-
-/* Manipulate the properties belonging to a given device.
-
- SET on the other hand will force the properties value. The
- simulation is aborted if the property was present but of a
- conflicting type.
-
- FIND returns the specified properties value, aborting the
- simulation if the property is missing. Code locating a property
- should first check its type (using device_find_property above) and
- then obtain its value using the below.
-
- void device_add_<type>_property(device *, const char *, <type>)
- void device_add_*_array_property(device *, const char *, const <type>*, int)
- void device_set_*_property(device *, const char *, <type>)
- void device_set_*_array_property(device *, const char *, const <type>*, int)
- <type> device_find_*_property(device *, const char *)
- int device_find_*_array_property(device *, const char *, int, <type>*)
-
- */
-
-
-INLINE_DEVICE\
-(void) device_add_array_property
-(device *me,
- const char *property,
- const void *array,
- int sizeof_array);
-
-INLINE_DEVICE\
-(void) device_set_array_property
-(device *me,
- const char *property,
- const void *array,
- int sizeof_array);
-
-INLINE_DEVICE\
-(const device_property *) device_find_array_property
-(device *me,
- const char *property);
-
-
-
-INLINE_DEVICE\
-(void) device_add_boolean_property
-(device *me,
- const char *property,
- int bool);
-
-INLINE_DEVICE\
-(int) device_find_boolean_property
-(device *me,
- const char *property);
-
-
-
-typedef struct _ihandle_runtime_property_spec {
- const char *full_path;
-} ihandle_runtime_property_spec;
-
-INLINE_DEVICE\
-(void) device_add_ihandle_runtime_property
-(device *me,
- const char *property,
- const ihandle_runtime_property_spec *ihandle);
-
-INLINE_DEVICE\
-(void) device_find_ihandle_runtime_property
-(device *me,
- const char *property,
- ihandle_runtime_property_spec *ihandle);
-
-INLINE_DEVICE\
-(void) device_set_ihandle_property
-(device *me,
- const char *property,
- device_instance *ihandle);
-
-INLINE_DEVICE\
-(device_instance *) device_find_ihandle_property
-(device *me,
- const char *property);
-
-
-
-INLINE_DEVICE\
-(void) device_add_integer_property
-(device *me,
- const char *property,
- signed_cell integer);
-
-INLINE_DEVICE\
-(signed_cell) device_find_integer_property
-(device *me,
- const char *property);
-
-INLINE_DEVICE\
-(int) device_find_integer_array_property
-(device *me,
- const char *property,
- unsigned index,
- signed_word *integer);
-
-
-
-typedef struct _range_property_spec {
- device_unit child_address;
- device_unit parent_address;
- device_unit size;
-} range_property_spec;
-
-INLINE_DEVICE\
-(void) device_add_range_array_property
-(device *me,
- const char *property,
- const range_property_spec *ranges,
- unsigned nr_ranges);
-
-INLINE_DEVICE\
-(int) device_find_range_array_property
-(device *me,
- const char *property,
- unsigned index,
- range_property_spec *range);
-
-
-
-typedef struct _reg_property_spec {
- device_unit address;
- device_unit size;
-} reg_property_spec;
-
-INLINE_DEVICE\
-(void) device_add_reg_array_property
-(device *me,
- const char *property,
- const reg_property_spec *reg,
- unsigned nr_regs);
-
-INLINE_DEVICE\
-(int) device_find_reg_array_property
-(device *me,
- const char *property,
- unsigned index,
- reg_property_spec *reg);
-
-
-
-INLINE_DEVICE\
-(void) device_add_string_property
-(device *me,
- const char *property,
- const char *string);
-
-INLINE_DEVICE\
-(const char *) device_find_string_property
-(device *me,
- const char *property);
-
-
-
-typedef const char *string_property_spec;
-
-INLINE_DEVICE\
-(void) device_add_string_array_property
-(device *me,
- const char *property,
- const string_property_spec *strings,
- unsigned nr_strings);
-
-INLINE_DEVICE\
-(int) device_find_string_array_property
-(device *me,
- const char *property,
- unsigned index,
- string_property_spec *string);
-
-
-
-INLINE_DEVICE\
-(void) device_add_duplicate_property
-(device *me,
- const char *property,
- const device_property *original);
-
-
-
-/* Instances:
-
- As with IEEE1275, a device can be opened, creating an instance.
- Instances provide more abstract interfaces to the underlying
- hardware. For example, the instance methods for a disk may include
- code that is able to interpret file systems found on disks. Such
- methods would there for allow the manipulation of files on the
- disks file system. The operations would be implemented using the
- basic block I/O model provided by the disk.
-
- This model includes methods that faciliate the creation of device
- instance and (should a given device support it) standard operations
- on those instances.
-
- */
-
-typedef struct _device_instance_callbacks device_instance_callbacks;
-
-INLINE_DEVICE\
-(device_instance *) device_create_instance_from
-(device *me, /*OR*/ device_instance *parent,
- void *data,
- const char *path,
- const char *args,
- const device_instance_callbacks *callbacks);
-
-INLINE_DEVICE\
-(device_instance *) device_create_instance
-(device *me,
- const char *full_path,
- const char *args);
-
-INLINE_DEVICE\
-(void) device_instance_delete
-(device_instance *instance);
-
-INLINE_DEVICE\
-(int) device_instance_read
-(device_instance *instance,
- void *addr,
- unsigned_word len);
-
-INLINE_DEVICE\
-(int) device_instance_write
-(device_instance *instance,
- const void *addr,
- unsigned_word len);
-
-INLINE_DEVICE\
-(int) device_instance_seek
-(device_instance *instance,
- unsigned_word pos_hi,
- unsigned_word pos_lo);
-
-INLINE_DEVICE\
-(int) device_instance_call_method
-(device_instance *instance,
- const char *method,
- int n_stack_args,
- unsigned_cell stack_args[/*n_stack_args*/],
- int n_stack_returns,
- unsigned_cell stack_returns[/*n_stack_returns*/]);
-
-INLINE_DEVICE\
-(device *) device_instance_device
-(device_instance *instance);
-
-INLINE_DEVICE\
-(const char *) device_instance_path
-(device_instance *instance);
-
-INLINE_DEVICE\
-(void *) device_instance_data
-(device_instance *instance);
-
-
-/* Interrupts:
-
- */
-
-/* Interrupt Source
-
- A device drives its interrupt line using the call
-
- */
-
-INLINE_DEVICE\
-(void) device_interrupt_event
-(device *me,
- int my_port,
- int value,
- cpu *processor,
- unsigned_word cia);
-
-/* This interrupt event will then be propogated to any attached
- interrupt destinations.
-
- Any interpretation of PORT and VALUE is model dependant. However
- as guidelines the following are recommended: PCI interrupts a-d
- correspond to lines 0-3; level sensative interrupts be requested
- with a value of one and withdrawn with a value of 0; edge sensative
- interrupts always have a value of 1, the event its self is treated
- as the interrupt.
-
-
- Interrupt Destinations
-
- Attached to each interrupt line of a device can be zero or more
- desitinations. These destinations consist of a device/port pair.
- A destination is attached/detached to a device line using the
- attach and detach calls. */
-
-INLINE_DEVICE\
-(void) device_interrupt_attach
-(device *me,
- int my_port,
- device *dest,
- int dest_port,
- object_disposition disposition);
-
-INLINE_DEVICE\
-(void) device_interrupt_detach
-(device *me,
- int my_port,
- device *dest,
- int dest_port);
-
-typedef void (device_interrupt_traverse_function)
- (device *me,
- int my_port,
- device *dest,
- int my_dest,
- void *data);
-
-INLINE_DEVICE\
-(void) device_interrupt_traverse
-(device *me,
- device_interrupt_traverse_function *handler,
- void *data);
-
-
-/* DESTINATION is attached (detached) to LINE of the device ME
-
-
- Interrupt conversion
-
- Users refer to interrupt port numbers symbolically. For instance a
- device may refer to its `INT' signal which is internally
- represented by port 3.
-
- To convert to/from the symbolic and internal representation of a
- port name/number. The following functions are available. */
-
-INLINE_DEVICE\
-(int) device_interrupt_decode
-(device *me,
- const char *symbolic_name,
- port_direction direction);
-
-INLINE_DEVICE\
-(int) device_interrupt_encode
-(device *me,
- int port_number,
- char *buf,
- int sizeof_buf,
- port_direction direction);
-
-
-/* Hardware operations:
-
- */
-
-INLINE_DEVICE\
-(unsigned) device_io_read_buffer
-(device *me,
- void *dest,
- int space,
- unsigned_word addr,
- unsigned nr_bytes,
- cpu *processor,
- unsigned_word cia);
-
-INLINE_DEVICE\
-(unsigned) device_io_write_buffer
-(device *me,
- const void *source,
- int space,
- unsigned_word addr,
- unsigned nr_bytes,
- cpu *processor,
- unsigned_word cia);
-
-
-/* Conversly, the device pci1000,1@1 my need to perform a dma transfer
- into the cpu/memory core. Just as I/O moves towards the leaves,
- dma transfers move towards the core via the initiating devices
- parent nodes. The root device (special) converts the DMA transfer
- into reads/writes to memory */
-
-INLINE_DEVICE\
-(unsigned) device_dma_read_buffer
-(device *me,
- void *dest,
- int space,
- unsigned_word addr,
- unsigned nr_bytes);
-
-INLINE_DEVICE\
-(unsigned) device_dma_write_buffer
-(device *me,
- const void *source,
- int space,
- unsigned_word addr,
- unsigned nr_bytes,
- int violate_read_only_section);
-
-/* To avoid the need for an intermediate (bridging) node to ask each
- of its child devices in turn if an IO access is intended for them,
- parent nodes maintain a table mapping addresses directly to
- specific devices. When a device is `connected' to its bus it
- attaches its self to its parent. */
-
-/* Address access attributes */
-typedef enum _access_type {
- access_invalid = 0,
- access_read = 1,
- access_write = 2,
- access_read_write = 3,
- access_exec = 4,
- access_read_exec = 5,
- access_write_exec = 6,
- access_read_write_exec = 7,
-} access_type;
-
-/* Address attachement types */
-typedef enum _attach_type {
- attach_invalid,
- attach_raw_memory,
- attach_callback,
- /* ... */
-} attach_type;
-
-INLINE_DEVICE\
-(void) device_attach_address
-(device *me,
- attach_type attach,
- int space,
- unsigned_word addr,
- unsigned nr_bytes,
- access_type access,
- device *client); /*callback/default*/
-
-INLINE_DEVICE\
-(void) device_detach_address
-(device *me,
- attach_type attach,
- int space,
- unsigned_word addr,
- unsigned nr_bytes,
- access_type access,
- device *client); /*callback/default*/
-
-/* Utilities:
-
- */
-
-/* IOCTL::
-
- Often devices require `out of band' operations to be performed.
- For instance a pal device may need to notify a PCI bridge device
- that an interrupt ack cycle needs to be performed on the PCI bus.
- Within PSIM such operations are performed by using the generic
- ioctl call <<device_ioctl()>>.
-
- */
-
-typedef enum {
- device_ioctl_break, /* unsigned_word requested_break */
- device_ioctl_set_trace, /* void */
- device_ioctl_create_stack, /* unsigned_word *sp, char **argv, char **envp */
- device_ioctl_change_media, /* const char *new_image (possibly NULL) */
- nr_device_ioctl_requests,
-} device_ioctl_request;
-
-EXTERN_DEVICE\
-(int) device_ioctl
-(device *me,
- cpu *processor,
- unsigned_word cia,
- device_ioctl_request request,
- ...);
-
-
-/* Error reporting::
-
- So that errors originating from devices appear in a consistent
- format, the <<device_error()>> function can be used. Formats and
- outputs the error message before aborting the simulation
-
- Devices should use this function to abort the simulation except
- when the abort reason leaves the simulation in a hazardous
- condition (for instance a failed malloc).
-
- */
-
-EXTERN_DEVICE\
-(void volatile) device_error
-(device *me,
- const char *fmt,
- ...) __attribute__ ((format (printf, 2, 3)));
-
-INLINE_DEVICE\
-(int) device_trace
-(device *me);
-
-
-
-/* External representation:
-
- Both device nodes and device instances, in OpenBoot firmware have
- an external representation (phandles and ihandles) and these values
- are both stored in the device tree in property nodes and passed
- between the client program and the simulator during emulation
- calls.
-
- To limit the potential risk associated with trusing `data' from the
- client program, the following mapping operators `safely' convert
- between the two representations
-
- */
-
-INLINE_DEVICE\
-(device *) external_to_device
-(device *tree_member,
- unsigned_cell phandle);
-
-INLINE_DEVICE\
-(unsigned_cell) device_to_external
-(device *me);
-
-INLINE_DEVICE\
-(device_instance *) external_to_device_instance
-(device *tree_member,
- unsigned_cell ihandle);
-
-INLINE_DEVICE\
-(unsigned_cell) device_instance_to_external
-(device_instance *me);
-
-
-/* Event queue:
-
- The device inherets certain event queue operations from the main
- simulation. */
-
-typedef void device_event_handler(void *data);
-
-INLINE_DEVICE\
-(event_entry_tag) device_event_queue_schedule
-(device *me,
- signed64 delta_time,
- device_event_handler *handler,
- void *data);
-
-INLINE_EVENTS\
-(void) device_event_queue_deschedule
-(device *me,
- event_entry_tag event_to_remove);
-
-INLINE_EVENTS\
-(signed64) device_event_queue_time
-(device *me);
-
-#endif /* _DEVICE_H_ */
diff --git a/sim/ppc/device_table.c b/sim/ppc/device_table.c
deleted file mode 100644
index 09772aba6b4..00000000000
--- a/sim/ppc/device_table.c
+++ /dev/null
@@ -1,310 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1996, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-#ifndef _DEVICE_TABLE_C_
-#define _DEVICE_TABLE_C_
-
-#include "device_table.h"
-
-#if HAVE_STDLIB_H
-#include <stdlib.h>
-#endif
-
-#include <ctype.h>
-
-
-/* Helper functions */
-
-
-/* Go through the devices various reg properties for those that
- specify attach addresses */
-
-
-void
-generic_device_init_address(device *me)
-{
- static const char *(reg_property_names[]) = {
- "attach-addresses",
- "assigned-addresses",
- "reg",
- "alternate-reg" ,
- NULL
- };
- const char **reg_property_name;
- int nr_valid_reg_properties = 0;
- for (reg_property_name = reg_property_names;
- *reg_property_name != NULL;
- reg_property_name++) {
- if (device_find_property(me, *reg_property_name) != NULL) {
- reg_property_spec reg;
- int reg_entry;
- for (reg_entry = 0;
- device_find_reg_array_property(me, *reg_property_name, reg_entry,
- &reg);
- reg_entry++) {
- unsigned_word attach_address;
- int attach_space;
- unsigned attach_size;
- if (!device_address_to_attach_address(device_parent(me),
- &reg.address,
- &attach_space, &attach_address,
- me))
- continue;
- if (!device_size_to_attach_size(device_parent(me),
- &reg.size,
- &attach_size, me))
- continue;
- device_attach_address(device_parent(me),
- attach_callback,
- attach_space, attach_address, attach_size,
- access_read_write_exec,
- me);
- nr_valid_reg_properties++;
- }
- /* if first option matches don't try for any others */
- if (reg_property_name == reg_property_names)
- break;
- }
- }
-}
-
-int
-generic_device_unit_decode(device *bus,
- const char *unit,
- device_unit *phys)
-{
- memset(phys, 0, sizeof(device_unit));
- if (unit == NULL)
- return 0;
- else {
- int nr_cells = 0;
- const int max_nr_cells = device_nr_address_cells(bus);
- while (1) {
- char *end = NULL;
- unsigned long val;
- val = strtoul(unit, &end, 0);
- /* parse error? */
- if (unit == end)
- return -1;
- /* two many cells? */
- if (nr_cells >= max_nr_cells)
- return -1;
- /* save it */
- phys->cells[nr_cells] = val;
- nr_cells++;
- unit = end;
- /* more to follow? */
- if (isspace(*unit) || *unit == '\0')
- break;
- if (*unit != ',')
- return -1;
- unit++;
- }
- if (nr_cells < max_nr_cells) {
- /* shift everything to correct position */
- int i;
- for (i = 1; i <= nr_cells; i++)
- phys->cells[max_nr_cells - i] = phys->cells[nr_cells - i];
- for (i = 0; i < (max_nr_cells - nr_cells); i++)
- phys->cells[i] = 0;
- }
- phys->nr_cells = max_nr_cells;
- return max_nr_cells;
- }
-}
-
-int
-generic_device_unit_encode(device *bus,
- const device_unit *phys,
- char *buf,
- int sizeof_buf)
-{
- int i;
- int len;
- char *pos = buf;
- /* skip leading zero's */
- for (i = 0; i < phys->nr_cells; i++) {
- if (phys->cells[i] != 0)
- break;
- }
- /* don't output anything if empty */
- if (phys->nr_cells == 0) {
- strcpy(pos, "");
- len = 0;
- }
- else if (i == phys->nr_cells) {
- /* all zero */
- strcpy(pos, "0");
- len = 1;
- }
- else {
- for (; i < phys->nr_cells; i++) {
- if (pos != buf) {
- strcat(pos, ",");
- pos = strchr(pos, '\0');
- }
- if (phys->cells[i] < 10)
- sprintf(pos, "%ld", (unsigned long)phys->cells[i]);
- else
- sprintf(pos, "0x%lx", (unsigned long)phys->cells[i]);
- pos = strchr(pos, '\0');
- }
- len = pos - buf;
- }
- if (len >= sizeof_buf)
- error("generic_unit_encode - buffer overflow\n");
- return len;
-}
-
-int
-generic_device_address_to_attach_address(device *me,
- const device_unit *address,
- int *attach_space,
- unsigned_word *attach_address,
- device *client)
-{
- int i;
- for (i = 0; i < address->nr_cells - 2; i++) {
- if (address->cells[i] != 0)
- device_error(me, "Only 32bit addresses supported");
- }
- if (address->nr_cells >= 2)
- *attach_space = address->cells[address->nr_cells - 2];
- else
- *attach_space = 0;
- *attach_address = address->cells[address->nr_cells - 1];
- return 1;
-}
-
-int
-generic_device_size_to_attach_size(device *me,
- const device_unit *size,
- unsigned *nr_bytes,
- device *client)
-{
- int i;
- for (i = 0; i < size->nr_cells - 1; i++) {
- if (size->cells[i] != 0)
- device_error(me, "Only 32bit sizes supported");
- }
- *nr_bytes = size->cells[0];
- return *nr_bytes;
-}
-
-
-/* ignore/passthrough versions of each function */
-
-void
-passthrough_device_address_attach(device *me,
- attach_type attach,
- int space,
- unsigned_word addr,
- unsigned nr_bytes,
- access_type access,
- device *client) /*callback/default*/
-{
- device_attach_address(device_parent(me), attach,
- space, addr, nr_bytes,
- access,
- client);
-}
-
-void
-passthrough_device_address_detach(device *me,
- attach_type attach,
- int space,
- unsigned_word addr,
- unsigned nr_bytes,
- access_type access,
- device *client) /*callback/default*/
-{
- device_detach_address(device_parent(me), attach,
- space, addr, nr_bytes, access,
- client);
-}
-
-unsigned
-passthrough_device_dma_read_buffer(device *me,
- void *dest,
- int space,
- unsigned_word addr,
- unsigned nr_bytes)
-{
- return device_dma_read_buffer(device_parent(me), dest,
- space, addr, nr_bytes);
-}
-
-unsigned
-passthrough_device_dma_write_buffer(device *me,
- const void *source,
- int space,
- unsigned_word addr,
- unsigned nr_bytes,
- int violate_read_only_section)
-{
- return device_dma_write_buffer(device_parent(me), source,
- space, addr,
- nr_bytes,
- violate_read_only_section);
-}
-
-int
-ignore_device_unit_decode(device *me,
- const char *unit,
- device_unit *phys)
-{
- memset(phys, 0, sizeof(device_unit));
- return 0;
-}
-
-
-static const device_callbacks passthrough_callbacks = {
- { NULL, }, /* init */
- { passthrough_device_address_attach,
- passthrough_device_address_detach, },
- { NULL, }, /* IO */
- { passthrough_device_dma_read_buffer, passthrough_device_dma_write_buffer, },
- { NULL, }, /* interrupt */
- { generic_device_unit_decode,
- generic_device_unit_encode, },
-};
-
-
-static const device_descriptor ob_device_table[] = {
- /* standard OpenBoot devices */
- { "aliases", NULL, &passthrough_callbacks },
- { "options", NULL, &passthrough_callbacks },
- { "chosen", NULL, &passthrough_callbacks },
- { "packages", NULL, &passthrough_callbacks },
- { "cpus", NULL, &passthrough_callbacks },
- { "openprom", NULL, &passthrough_callbacks },
- { "init", NULL, &passthrough_callbacks },
- { NULL },
-};
-
-const device_descriptor *const device_table[] = {
- ob_device_table,
-#include "hw.c"
- NULL,
-};
-
-
-#endif /* _DEVICE_TABLE_C_ */
diff --git a/sim/ppc/device_table.h b/sim/ppc/device_table.h
deleted file mode 100644
index af6c28d697d..00000000000
--- a/sim/ppc/device_table.h
+++ /dev/null
@@ -1,323 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1996, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-#ifndef _DEVICE_TABLE_H_
-#define _DEVICE_TABLE_H_
-
-#include "basics.h"
-#include "device.h"
-#include "tree.h"
-
-#ifdef HAVE_STRING_H
-#include <string.h>
-#else
-#ifdef HAVE_STRINGS_H
-#include <strings.h>
-#endif
-#endif
-
-
-typedef struct _device_callbacks device_callbacks;
-
-
-/* The creator, returns a pointer to any data that should be allocated
- once during (multiple) simulation runs */
-
-typedef void *(device_creator)
- (const char *name,
- const device_unit *unit_address,
- const char *args);
-
-
-/* two stages of initialization */
-
-typedef void (device_init_callback)
- (device *me);
-
-typedef struct _device_init_callbacks {
- device_init_callback *address; /* NULL - ignore */
- device_init_callback *data; /* NULL - ignore */
-} device_init_callbacks;
-
-
-/* attaching/detaching a devices address space to its parent */
-
-typedef void (device_address_callback)
- (device *me,
- attach_type attach,
- int space,
- unsigned_word addr,
- unsigned nr_bytes,
- access_type access,
- device *client); /*callback/default*/
-
-typedef struct _device_address_callbacks {
- device_address_callback *attach;
- device_address_callback *detach;
-} device_address_callbacks;
-
-
-/* I/O operations - from parent */
-
-typedef unsigned (device_io_read_buffer_callback)
- (device *me,
- void *dest,
- int space,
- unsigned_word addr,
- unsigned nr_bytes,
- cpu *processor,
- unsigned_word cia);
-
-typedef unsigned (device_io_write_buffer_callback)
- (device *me,
- const void *source,
- int space,
- unsigned_word addr,
- unsigned nr_bytes,
- cpu *processor,
- unsigned_word cia);
-
-typedef struct _device_io_callbacks { /* NULL - error */
- device_io_read_buffer_callback *read_buffer;
- device_io_write_buffer_callback *write_buffer;
-} device_io_callbacks;
-
-
-/* DMA transfers by a device via its parent */
-
-typedef unsigned (device_dma_read_buffer_callback)
- (device *me,
- void *dest,
- int space,
- unsigned_word addr,
- unsigned nr_bytes);
-
-typedef unsigned (device_dma_write_buffer_callback)
- (device *me,
- const void *source,
- int space,
- unsigned_word addr,
- unsigned nr_bytes,
- int violate_read_only_section);
-
-typedef struct _device_dma_callbacks { /* NULL - error */
- device_dma_read_buffer_callback *read_buffer;
- device_dma_write_buffer_callback *write_buffer;
-} device_dma_callbacks;
-
-
-/* Interrupts */
-
-typedef void (device_interrupt_event_callback)
- (device *me,
- int my_port,
- device *source,
- int source_port,
- int level,
- cpu *processor,
- unsigned_word cia);
-
-typedef void (device_child_interrupt_event_callback)
- (device *me,
- device *parent,
- device *source,
- int source_port,
- int level,
- cpu *processor,
- unsigned_word cia);
-
-typedef struct _device_interrupt_port_descriptor {
- const char *name;
- int number;
- int nr_ports;
- port_direction direction;
-} device_interrupt_port_descriptor;
-
-typedef struct _device_interrupt_callbacks {
- device_interrupt_event_callback *event;
- device_child_interrupt_event_callback *child_event;
- const device_interrupt_port_descriptor *ports;
-} device_interrupt_callbacks;
-
-
-/* symbolic value decoding */
-
-typedef int (device_unit_decode_callback)
- (device *bus,
- const char *unit,
- device_unit *address);
-
-typedef int (device_unit_encode_callback)
- (device *bus,
- const device_unit *unit_address,
- char *buf,
- int sizeof_buf);
-
-typedef int (device_address_to_attach_address_callback)
- (device *bus,
- const device_unit *address,
- int *attach_space,
- unsigned_word *attach_address,
- device *client);
-
-typedef int (device_size_to_attach_size_callback)
- (device *bus,
- const device_unit *size,
- unsigned *nr_bytes,
- device *client);
-
-typedef struct _device_convert_callbacks {
- device_unit_decode_callback *decode_unit;
- device_unit_encode_callback *encode_unit;
- device_address_to_attach_address_callback *address_to_attach_address;
- device_size_to_attach_size_callback *size_to_attach_size;
-} device_convert_callbacks;
-
-
-/* instances */
-
-typedef void (device_instance_delete_callback)
- (device_instance *instance);
-
-typedef int (device_instance_read_callback)
- (device_instance *instance,
- void *buf,
- unsigned_word len);
-
-typedef int (device_instance_write_callback)
- (device_instance *instance,
- const void *buf,
- unsigned_word len);
-
-typedef int (device_instance_seek_callback)
- (device_instance *instance,
- unsigned_word pos_hi,
- unsigned_word pos_lo);
-
-typedef int (device_instance_method)
- (device_instance *instance,
- int n_stack_args,
- unsigned_cell stack_args[/*n_stack_args*/],
- int n_stack_returns,
- unsigned_cell stack_returns[/*n_stack_returns*/]);
-
-typedef struct _device_instance_methods {
- const char *name;
- device_instance_method *method;
-} device_instance_methods;
-
-struct _device_instance_callbacks { /* NULL - error */
- device_instance_delete_callback *delete;
- device_instance_read_callback *read;
- device_instance_write_callback *write;
- device_instance_seek_callback *seek;
- const device_instance_methods *methods;
-};
-
-typedef device_instance *(device_create_instance_callback)
- (device *me,
- const char *full_path,
- const char *args);
-
-typedef device_instance *(package_create_instance_callback)
- (device_instance *parent,
- const char *args);
-
-
-/* all else fails */
-
-typedef int (device_ioctl_callback)
- (device *me,
- cpu *processor,
- unsigned_word cia,
- device_ioctl_request request,
- va_list ap);
-
-typedef void (device_usage_callback)
- (int verbose);
-
-
-/* the callbacks */
-
-struct _device_callbacks {
-
- /* initialization */
- device_init_callbacks init;
-
- /* address/data config - from child */
- device_address_callbacks address;
-
- /* address/data transfer - from parent */
- device_io_callbacks io;
-
- /* address/data transfer - from child */
- device_dma_callbacks dma;
-
- /* interrupt signalling */
- device_interrupt_callbacks interrupt;
-
- /* bus address decoding */
- device_convert_callbacks convert;
-
- /* instances */
- device_create_instance_callback *instance_create;
-
- /* back door to anything we've forgot */
- device_ioctl_callback *ioctl;
- device_usage_callback *usage;
-};
-
-
-/* Table of all the devices and a function to lookup/create a device
- from its name */
-
-typedef struct _device_descriptor device_descriptor;
-struct _device_descriptor {
- const char *name;
- device_creator *creator;
- const device_callbacks *callbacks;
-};
-
-extern const device_descriptor *const device_table[];
-#include "hw.h"
-
-
-/* Pass through, ignore and generic callback functions. A call going
- towards the root device are passed on up, local calls are ignored
- and call downs abort */
-
-extern device_address_callback passthrough_device_address_attach;
-extern device_address_callback passthrough_device_address_detach;
-extern device_dma_read_buffer_callback passthrough_device_dma_read_buffer;
-extern device_dma_write_buffer_callback passthrough_device_dma_write_buffer;
-
-extern device_unit_decode_callback ignore_device_unit_decode;
-
-extern device_init_callback generic_device_init_address;
-extern device_unit_decode_callback generic_device_unit_decode;
-extern device_unit_encode_callback generic_device_unit_encode;
-extern device_address_to_attach_address_callback generic_device_address_to_attach_address;
-extern device_size_to_attach_size_callback generic_device_size_to_attach_size;
-
-
-extern const device_callbacks passthrough_device_callbacks;
-
-#endif /* _DEVICE_TABLE_H_ */
diff --git a/sim/ppc/dgen.c b/sim/ppc/dgen.c
deleted file mode 100644
index 54e0e2657c9..00000000000
--- a/sim/ppc/dgen.c
+++ /dev/null
@@ -1,336 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1995, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-#include <sys/types.h>
-#include <sys/stat.h>
-#include <fcntl.h>
-#include <getopt.h>
-#include <stdio.h>
-#include <ctype.h>
-#include <stdarg.h>
-
-#include "config.h"
-#include "misc.h"
-#include "lf.h"
-#include "table.h"
-
-#ifdef HAVE_UNISTD_H
-#include <unistd.h>
-#endif
-
-#ifdef HAVE_STDLIB_H
-#include <stdlib.h>
-#endif
-
-#ifdef HAVE_STRING_H
-#include <string.h>
-#else
-#ifdef HAVE_STRINGS_H
-#include <strings.h>
-#endif
-#endif
-
-/****************************************************************/
-
-int spreg_lookup_table = 1;
-enum {
- nr_of_sprs = 1024,
-};
-
-/****************************************************************/
-
-
-typedef enum {
- spreg_name,
- spreg_reg_nr,
- spreg_readonly,
- spreg_length,
- nr_spreg_fields,
-} spreg_fields;
-
-typedef struct _spreg_table_entry spreg_table_entry;
-struct _spreg_table_entry {
- char *name;
- int spreg_nr;
- int is_readonly;
- int length;
- table_entry *entry;
- spreg_table_entry *next;
-};
-
-typedef struct _spreg_table spreg_table;
-struct _spreg_table {
- spreg_table_entry *sprs;
-};
-
-static void
-spreg_table_insert(spreg_table *table, table_entry *entry)
-{
- /* create a new spr entry */
- spreg_table_entry *new_spr = ZALLOC(spreg_table_entry);
- new_spr->next = NULL;
- new_spr->entry = entry;
- new_spr->spreg_nr = atoi(entry->fields[spreg_reg_nr]);
- new_spr->is_readonly = (entry->fields[spreg_readonly]
- ? atoi(entry->fields[spreg_readonly])
- : 0);
- new_spr->length = atoi(entry->fields[spreg_length]);
- new_spr->name = (char*)zalloc(strlen(entry->fields[spreg_name]) + 1);
- ASSERT(new_spr->name != NULL);
- {
- int i;
- for (i = 0; entry->fields[spreg_name][i] != '\0'; i++) {
- if (isupper(entry->fields[spreg_name][i]))
- new_spr->name[i] = tolower(entry->fields[spreg_name][i]);
- else
- new_spr->name[i] = entry->fields[spreg_name][i];
- }
- }
-
- /* insert, by spreg_nr order */
- {
- spreg_table_entry **ptr_to_spreg_entry = &table->sprs;
- spreg_table_entry *spreg_entry = *ptr_to_spreg_entry;
- while (spreg_entry != NULL && spreg_entry->spreg_nr < new_spr->spreg_nr) {
- ptr_to_spreg_entry = &spreg_entry->next;
- spreg_entry = *ptr_to_spreg_entry;
- }
- ASSERT(spreg_entry == NULL || spreg_entry->spreg_nr != new_spr->spreg_nr);
- *ptr_to_spreg_entry = new_spr;
- new_spr->next = spreg_entry;
- }
-
-}
-
-
-static spreg_table *
-spreg_table_load(char *file_name)
-{
- table *file = table_open(file_name, nr_spreg_fields, 0);
- spreg_table *table = ZALLOC(spreg_table);
-
- {
- table_entry *entry;
- while ((entry = table_entry_read(file)) != NULL) {
- spreg_table_insert(table, entry);
- }
- }
-
- return table;
-}
-
-
-/****************************************************************/
-
-char *spreg_attributes[] = {
- "is_valid",
- "is_readonly",
- "name",
- "index",
- "length",
- 0
-};
-
-static void
-gen_spreg_h(spreg_table *table, lf *file)
-{
- spreg_table_entry *entry;
- char **attribute;
-
- lf_print__gnu_copyleft(file);
- lf_printf(file, "\n");
- lf_printf(file, "#ifndef _SPREG_H_\n");
- lf_printf(file, "#define _SPREG_H_\n");
- lf_printf(file, "\n");
- lf_printf(file, "typedef unsigned_word spreg;\n");
- lf_printf(file, "\n");
- lf_printf(file, "typedef enum {\n");
-
- for (entry = table->sprs;
- entry != NULL ;
- entry = entry->next) {
- lf_printf(file, " spr_%s = %d,\n", entry->name, entry->spreg_nr);
- }
-
- lf_printf(file, " nr_of_sprs = %d\n", nr_of_sprs);
- lf_printf(file, "} sprs;\n");
- lf_printf(file, "\n");
- for (attribute = spreg_attributes;
- *attribute != NULL;
- attribute++) {
- if (strcmp(*attribute, "name") == 0) {
- lf_print_function_type(file, "const char *", "INLINE_SPREG", " ");
- lf_printf(file, "spr_%s(sprs spr);\n", *attribute);
- }
- else {
- lf_print_function_type(file, "int", "INLINE_SPREG", " ");
- lf_printf(file, "spr_%s(sprs spr);\n", *attribute);
- }
- }
- lf_printf(file, "\n");
- lf_printf(file, "#endif /* _SPREG_H_ */\n");
-}
-
-
-static void
-gen_spreg_c(spreg_table *table, lf *file)
-{
- spreg_table_entry *entry;
- char **attribute;
- int spreg_nr;
-
- lf_print__gnu_copyleft(file);
- lf_printf(file, "\n");
- lf_printf(file, "#ifndef _SPREG_C_\n");
- lf_printf(file, "#define _SPREG_C_\n");
- lf_printf(file, "\n");
- lf_printf(file, "#include \"basics.h\"\n");
- lf_printf(file, "#include \"spreg.h\"\n");
-
- lf_printf(file, "\n");
- lf_printf(file, "typedef struct _spreg_info {\n");
- lf_printf(file, " char *name;\n");
- lf_printf(file, " int is_valid;\n");
- lf_printf(file, " int length;\n");
- lf_printf(file, " int is_readonly;\n");
- lf_printf(file, " int index;\n");
- lf_printf(file, "} spreg_info;\n");
- lf_printf(file, "\n");
- lf_printf(file, "static spreg_info spr_info[nr_of_sprs+1] = {\n");
- entry = table->sprs;
- for (spreg_nr = 0; spreg_nr < nr_of_sprs+1; spreg_nr++) {
- if (entry == NULL || spreg_nr < entry->spreg_nr)
- lf_printf(file, " { 0, 0, 0, 0, %d},\n", spreg_nr);
- else {
- lf_printf(file, " { \"%s\", %d, %d, %d, spr_%s /*%d*/ },\n",
- entry->name, 1, entry->length, entry->is_readonly,
- entry->name, entry->spreg_nr);
- entry = entry->next;
- }
- }
- lf_printf(file, "};\n");
-
- for (attribute = spreg_attributes;
- *attribute != NULL;
- attribute++) {
- lf_printf(file, "\n");
- if (strcmp(*attribute, "name") == 0) {
- lf_print_function_type(file, "const char *", "INLINE_SPREG", "\n");
- }
- else {
- lf_print_function_type(file, "int", "INLINE_SPREG", "\n");
- }
- lf_printf(file, "spr_%s(sprs spr)\n", *attribute);
- lf_printf(file, "{\n");
- if (spreg_lookup_table
- || strcmp(*attribute, "name") == 0
- || strcmp(*attribute, "index") == 0)
- lf_printf(file, " return spr_info[spr].%s;\n",
- *attribute);
- else {
- spreg_table_entry *entry;
- lf_printf(file, " switch (spr) {\n");
- for (entry = table->sprs; entry != NULL; entry = entry->next) {
- lf_printf(file, " case %d:\n", entry->spreg_nr);
- if (strcmp(*attribute, "is_valid") == 0)
- lf_printf(file, " return 1;\n");
- else if (strcmp(*attribute, "is_readonly") == 0)
- lf_printf(file, " return %d;\n", entry->is_readonly);
- else if (strcmp(*attribute, "length") == 0)
- lf_printf(file, " return %d;\n", entry->length);
- else
- ASSERT(0);
- }
- lf_printf(file, " default:\n");
- lf_printf(file, " return 0;\n");
- lf_printf(file, " }\n");
- }
- lf_printf(file, "}\n");
- }
-
- lf_printf(file, "\n");
- lf_printf(file, "#endif /* _SPREG_C_ */\n");
-}
-
-
-
-/****************************************************************/
-
-
-int
-main(int argc,
- char **argv,
- char **envp)
-{
- lf_file_references file_references = lf_include_references;
- spreg_table *sprs = NULL;
- char *real_file_name = NULL;
- int is_header = 0;
- int ch;
-
- if (argc <= 1) {
- printf("Usage: dgen ...\n");
- printf("-s Use switch instead of table\n");
- printf("-n <file-name> Use this as cpp line numbering name\n");
- printf("-h Output header file\n");
- printf("-p <spreg-file> Output spreg.h(P) or spreg.c(p)\n");
- printf("-L Suppress cpp line numbering in output files\n");
- }
-
-
- while ((ch = getopt(argc, argv, "hLsn:r:p:")) != -1) {
- fprintf(stderr, "\t-%c %s\n", ch, ( optarg ? optarg : ""));
- switch(ch) {
- case 's':
- spreg_lookup_table = 0;
- break;
- case 'r':
- sprs = spreg_table_load(optarg);
- break;
- case 'n':
- real_file_name = strdup(optarg);
- break;
- case 'L':
- file_references = lf_omit_references;
- break;
- case 'h':
- is_header = 1;
- break;
- case 'p':
- {
- lf *file = lf_open(optarg, real_file_name, file_references,
- (is_header ? lf_is_h : lf_is_c),
- argv[0]);
- if (is_header)
- gen_spreg_h(sprs, file);
- else
- gen_spreg_c(sprs, file);
- lf_close(file);
- is_header = 0;
- }
- real_file_name = NULL;
- break;
- default:
- error("unknown option\n");
- }
- }
- return 0;
-}
diff --git a/sim/ppc/double.c b/sim/ppc/double.c
deleted file mode 100644
index 85943010883..00000000000
--- a/sim/ppc/double.c
+++ /dev/null
@@ -1,42 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1995, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-#ifndef _DOUBLE_C_
-#define _DOUBLE_C_
-
-#include "basics.h"
-
-#define SFtype unsigned32
-#define DFtype unsigned64
-
-#define HItype signed16
-#define SItype signed32
-#define DItype signed64
-
-#define UHItype unsigned16
-#define USItype unsigned32
-#define UDItype unsigned64
-
-
-#define US_SOFTWARE_GOFAST
-#include "dp-bit.c"
-
-#endif
diff --git a/sim/ppc/dp-bit.c b/sim/ppc/dp-bit.c
deleted file mode 100644
index 3313132a50f..00000000000
--- a/sim/ppc/dp-bit.c
+++ /dev/null
@@ -1,1307 +0,0 @@
-/* This is a software floating point library which can be used instead of
- the floating point routines in libgcc1.c for targets without hardware
- floating point. */
-
-/* Copyright (C) 1994 Free Software Foundation, Inc.
-
-This file is free software; you can redistribute it and/or modify it
-under the terms of the GNU General Public License as published by the
-Free Software Foundation; either version 2, or (at your option) any
-later version.
-
-In addition to the permissions in the GNU General Public License, the
-Free Software Foundation gives you unlimited permission to link the
-compiled version of this file with other programs, and to distribute
-those programs without any restriction coming from the use of this
-file. (The General Public License restrictions do apply in other
-respects; for example, they cover modification of the file, and
-distribution when not linked into another program.)
-
-This file is distributed in the hope that it will be useful, but
-WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
-General Public License for more details.
-
-You should have received a copy of the GNU General Public License
-along with this program; see the file COPYING. If not, write to
-the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
-
-/* As a special exception, if you link this library with other files,
- some of which are compiled with GCC, to produce an executable,
- this library does not by itself cause the resulting executable
- to be covered by the GNU General Public License.
- This exception does not however invalidate any other reasons why
- the executable file might be covered by the GNU General Public License. */
-
-/* This implements IEEE 754 format arithmetic, but does not provide a
- mechanism for setting the rounding mode, or for generating or handling
- exceptions.
-
- The original code by Steve Chamberlain, hacked by Mark Eichin and Jim
- Wilson, all of Cygnus Support. */
-
-/* The intended way to use this file is to make two copies, add `#define FLOAT'
- to one copy, then compile both copies and add them to libgcc.a. */
-
-/* The following macros can be defined to change the behaviour of this file:
- FLOAT: Implement a `float', aka SFmode, fp library. If this is not
- defined, then this file implements a `double', aka DFmode, fp library.
- FLOAT_ONLY: Used with FLOAT, to implement a `float' only library, i.e.
- don't include float->double conversion which requires the double library.
- This is useful only for machines which can't support doubles, e.g. some
- 8-bit processors.
- CMPtype: Specify the type that floating point compares should return.
- This defaults to SItype, aka int.
- US_SOFTWARE_GOFAST: This makes all entry points use the same names as the
- US Software goFast library. If this is not defined, the entry points use
- the same names as libgcc1.c.
- _DEBUG_BITFLOAT: This makes debugging the code a little easier, by adding
- two integers to the FLO_union_type.
- NO_NANS: Disable nan and infinity handling
- SMALL_MACHINE: Useful when operations on QIs and HIs are faster
- than on an SI */
-
-#ifndef SFtype
-typedef SFtype __attribute__ ((mode (SF)));
-#endif
-#ifndef DFtype
-typedef DFtype __attribute__ ((mode (DF)));
-#endif
-
-#ifndef HItype
-typedef int HItype __attribute__ ((mode (HI)));
-#endif
-#ifndef SItype
-typedef int SItype __attribute__ ((mode (SI)));
-#endif
-#ifndef DItype
-typedef int DItype __attribute__ ((mode (DI)));
-#endif
-
-/* The type of the result of a fp compare */
-#ifndef CMPtype
-#define CMPtype SItype
-#endif
-
-#ifndef UHItype
-typedef unsigned int UHItype __attribute__ ((mode (HI)));
-#endif
-#ifndef USItype
-typedef unsigned int USItype __attribute__ ((mode (SI)));
-#endif
-#ifndef UDItype
-typedef unsigned int UDItype __attribute__ ((mode (DI)));
-#endif
-
-#define MAX_SI_INT ((SItype) ((unsigned) (~0)>>1))
-#define MAX_USI_INT ((USItype) ~0)
-
-
-#ifdef FLOAT_ONLY
-#define NO_DI_MODE
-#endif
-
-#ifdef FLOAT
-# define NGARDS 7L
-# define GARDROUND 0x3f
-# define GARDMASK 0x7f
-# define GARDMSB 0x40
-# define EXPBITS 8
-# define EXPBIAS 127
-# define FRACBITS 23
-# define EXPMAX (0xff)
-# define QUIET_NAN 0x100000L
-# define FRAC_NBITS 32
-# define FRACHIGH 0x80000000L
-# define FRACHIGH2 0xc0000000L
- typedef USItype fractype;
- typedef UHItype halffractype;
- typedef SFtype FLO_type;
- typedef SItype intfrac;
-
-#else
-# define PREFIXFPDP dp
-# define PREFIXSFDF df
-# define NGARDS 8L
-# define GARDROUND 0x7f
-# define GARDMASK 0xff
-# define GARDMSB 0x80
-# define EXPBITS 11
-# define EXPBIAS 1023
-# define FRACBITS 52
-# define EXPMAX (0x7ff)
-# define QUIET_NAN 0x8000000000000LL
-# define FRAC_NBITS 64
-# define FRACHIGH 0x8000000000000000LL
-# define FRACHIGH2 0xc000000000000000LL
- typedef UDItype fractype;
- typedef USItype halffractype;
- typedef DFtype FLO_type;
- typedef DItype intfrac;
-#endif
-
-#ifdef US_SOFTWARE_GOFAST
-# ifdef FLOAT
-# define add fpadd
-# define sub fpsub
-# define multiply fpmul
-# define divide fpdiv
-# define compare fpcmp
-# define si_to_float sitofp
-# define float_to_si fptosi
-# define float_to_usi fptoui
-# define negate __negsf2
-# define sf_to_df fptodp
-# define dptofp dptofp
-#else
-# define add dpadd
-# define sub dpsub
-# define multiply dpmul
-# define divide dpdiv
-# define compare dpcmp
-# define si_to_float litodp
-# define float_to_si dptoli
-# define float_to_usi dptoul
-# define negate __negdf2
-# define df_to_sf dptofp
-#endif
-#else
-# ifdef FLOAT
-# define add __addsf3
-# define sub __subsf3
-# define multiply __mulsf3
-# define divide __divsf3
-# define compare __cmpsf2
-# define _eq_f2 __eqsf2
-# define _ne_f2 __nesf2
-# define _gt_f2 __gtsf2
-# define _ge_f2 __gesf2
-# define _lt_f2 __ltsf2
-# define _le_f2 __lesf2
-# define si_to_float __floatsisf
-# define float_to_si __fixsfsi
-# define float_to_usi __fixunssfsi
-# define negate __negsf2
-# define sf_to_df __extendsfdf2
-#else
-# define add __adddf3
-# define sub __subdf3
-# define multiply __muldf3
-# define divide __divdf3
-# define compare __cmpdf2
-# define _eq_f2 __eqdf2
-# define _ne_f2 __nedf2
-# define _gt_f2 __gtdf2
-# define _ge_f2 __gedf2
-# define _lt_f2 __ltdf2
-# define _le_f2 __ledf2
-# define si_to_float __floatsidf
-# define float_to_si __fixdfsi
-# define float_to_usi __fixunsdfsi
-# define negate __negdf2
-# define df_to_sf __truncdfsf2
-# endif
-#endif
-
-
-#ifndef INLINE
-#define INLINE __inline__
-#endif
-
-/* Preserve the sticky-bit when shifting fractions to the right. */
-#define LSHIFT(a) { a = (a & 1) | (a >> 1); }
-
-/* numeric parameters */
-/* F_D_BITOFF is the number of bits offset between the MSB of the mantissa
- of a float and of a double. Assumes there are only two float types.
- (double::FRAC_BITS+double::NGARGS-(float::FRAC_BITS-float::NGARDS))
- */
-#define F_D_BITOFF (52+8-(23+7))
-
-
-#define NORMAL_EXPMIN (-(EXPBIAS)+1)
-#define IMPLICIT_1 (1LL<<(FRACBITS+NGARDS))
-#define IMPLICIT_2 (1LL<<(FRACBITS+1+NGARDS))
-
-/* common types */
-
-typedef enum
-{
- CLASS_SNAN,
- CLASS_QNAN,
- CLASS_ZERO,
- CLASS_NUMBER,
- CLASS_INFINITY
-} fp_class_type;
-
-typedef struct
-{
-#ifdef SMALL_MACHINE
- char class;
- unsigned char sign;
- short normal_exp;
-#else
- fp_class_type class;
- unsigned int sign;
- int normal_exp;
-#endif
-
- union
- {
- fractype ll;
- halffractype l[2];
- } fraction;
-} fp_number_type;
-
-typedef union
-{
- FLO_type value;
-#ifdef _DEBUG_BITFLOAT
- int l[2];
-#endif
- struct
- {
-#ifndef FLOAT_BIT_ORDER_MISMATCH
- unsigned int sign:1 __attribute__ ((packed));
- unsigned int exp:EXPBITS __attribute__ ((packed));
- fractype fraction:FRACBITS __attribute__ ((packed));
-#else
- fractype fraction:FRACBITS __attribute__ ((packed));
- unsigned int exp:EXPBITS __attribute__ ((packed));
- unsigned int sign:1 __attribute__ ((packed));
-#endif
- }
- bits;
-}
-FLO_union_type;
-
-
-/* end of header */
-
-/* IEEE "special" number predicates */
-
-#ifdef NO_NANS
-
-#define nan() 0
-#define isnan(x) 0
-#define isinf(x) 0
-#else
-
-INLINE
-static fp_number_type *
-nan ()
-{
- static fp_number_type thenan;
-
- return &thenan;
-}
-
-INLINE
-static int
-isnan ( fp_number_type * x)
-{
- return x->class == CLASS_SNAN || x->class == CLASS_QNAN;
-}
-
-INLINE
-static int
-isinf ( fp_number_type * x)
-{
- return x->class == CLASS_INFINITY;
-}
-
-#endif
-
-INLINE
-static int
-iszero ( fp_number_type * x)
-{
- return x->class == CLASS_ZERO;
-}
-
-INLINE
-static void
-flip_sign ( fp_number_type * x)
-{
- x->sign = !x->sign;
-}
-
-static FLO_type
-pack_d ( fp_number_type * src)
-{
- FLO_union_type dst;
- fractype fraction = src->fraction.ll; /* wasn't unsigned before? */
-
- dst.bits.sign = src->sign;
-
- if (isnan (src))
- {
- dst.bits.exp = EXPMAX;
- dst.bits.fraction = src->fraction.ll;
- if (src->class == CLASS_QNAN || 1)
- {
- dst.bits.fraction |= QUIET_NAN;
- }
- }
- else if (isinf (src))
- {
- dst.bits.exp = EXPMAX;
- dst.bits.fraction = 0;
- }
- else if (iszero (src))
- {
- dst.bits.exp = 0;
- dst.bits.fraction = 0;
- }
- else if (fraction == 0)
- {
- dst.value = 0;
- }
- else
- {
- if (src->normal_exp < NORMAL_EXPMIN)
- {
- /* This number's exponent is too low to fit into the bits
- available in the number, so we'll store 0 in the exponent and
- shift the fraction to the right to make up for it. */
-
- int shift = NORMAL_EXPMIN - src->normal_exp;
-
- dst.bits.exp = 0;
-
- if (shift > FRAC_NBITS - NGARDS)
- {
- /* No point shifting, since it's more that 64 out. */
- fraction = 0;
- }
- else
- {
- /* Shift by the value */
- fraction >>= shift;
- }
- fraction >>= NGARDS;
- dst.bits.fraction = fraction;
- }
- else if (src->normal_exp > EXPBIAS)
- {
- dst.bits.exp = EXPMAX;
- dst.bits.fraction = 0;
- }
- else
- {
- dst.bits.exp = src->normal_exp + EXPBIAS;
- /* IF the gard bits are the all zero, but the first, then we're
- half way between two numbers, choose the one which makes the
- lsb of the answer 0. */
- if ((fraction & GARDMASK) == GARDMSB)
- {
- if (fraction & (1 << NGARDS))
- fraction += GARDROUND + 1;
- }
- else
- {
- /* Add a one to the guards to round up */
- fraction += GARDROUND;
- }
- if (fraction >= IMPLICIT_2)
- {
- fraction >>= 1;
- dst.bits.exp += 1;
- }
- fraction >>= NGARDS;
- dst.bits.fraction = fraction;
- }
- }
- return dst.value;
-}
-
-static void
-unpack_d (FLO_union_type * src, fp_number_type * dst)
-{
- fractype fraction = src->bits.fraction;
-
- dst->sign = src->bits.sign;
- if (src->bits.exp == 0)
- {
- /* Hmm. Looks like 0 */
- if (fraction == 0)
- {
- /* tastes like zero */
- dst->class = CLASS_ZERO;
- }
- else
- {
- /* Zero exponent with non zero fraction - it's denormalized,
- so there isn't a leading implicit one - we'll shift it so
- it gets one. */
- dst->normal_exp = src->bits.exp - EXPBIAS + 1;
- fraction <<= NGARDS;
-
- dst->class = CLASS_NUMBER;
-#if 1
- while (fraction < IMPLICIT_1)
- {
- fraction <<= 1;
- dst->normal_exp--;
- }
-#endif
- dst->fraction.ll = fraction;
- }
- }
- else if (src->bits.exp == EXPMAX)
- {
- /* Huge exponent*/
- if (fraction == 0)
- {
- /* Attached to a zero fraction - means infinity */
- dst->class = CLASS_INFINITY;
- }
- else
- {
- /* Non zero fraction, means nan */
- if (dst->sign)
- {
- dst->class = CLASS_SNAN;
- }
- else
- {
- dst->class = CLASS_QNAN;
- }
- /* Keep the fraction part as the nan number */
- dst->fraction.ll = fraction;
- }
- }
- else
- {
- /* Nothing strange about this number */
- dst->normal_exp = src->bits.exp - EXPBIAS;
- dst->class = CLASS_NUMBER;
- dst->fraction.ll = (fraction << NGARDS) | IMPLICIT_1;
- }
-}
-
-static fp_number_type *
-_fpadd_parts (fp_number_type * a,
- fp_number_type * b,
- fp_number_type * tmp)
-{
- intfrac tfraction;
-
- /* Put commonly used fields in local variables. */
- int a_normal_exp;
- int b_normal_exp;
- fractype a_fraction;
- fractype b_fraction;
-
- if (isnan (a))
- {
- return a;
- }
- if (isnan (b))
- {
- return b;
- }
- if (isinf (a))
- {
- /* Adding infinities with opposite signs yields a NaN. */
- if (isinf (b) && a->sign != b->sign)
- return nan ();
- return a;
- }
- if (isinf (b))
- {
- return b;
- }
- if (iszero (b))
- {
- return a;
- }
- if (iszero (a))
- {
- return b;
- }
-
- /* Got two numbers. shift the smaller and increment the exponent till
- they're the same */
- {
- int diff;
-
- a_normal_exp = a->normal_exp;
- b_normal_exp = b->normal_exp;
- a_fraction = a->fraction.ll;
- b_fraction = b->fraction.ll;
-
- diff = a_normal_exp - b_normal_exp;
-
- if (diff < 0)
- diff = -diff;
- if (diff < FRAC_NBITS)
- {
- /* ??? This does shifts one bit at a time. Optimize. */
- while (a_normal_exp > b_normal_exp)
- {
- b_normal_exp++;
- LSHIFT (b_fraction);
- }
- while (b_normal_exp > a_normal_exp)
- {
- a_normal_exp++;
- LSHIFT (a_fraction);
- }
- }
- else
- {
- /* Somethings's up.. choose the biggest */
- if (a_normal_exp > b_normal_exp)
- {
- b_normal_exp = a_normal_exp;
- b_fraction = 0;
- }
- else
- {
- a_normal_exp = b_normal_exp;
- a_fraction = 0;
- }
- }
- }
-
- if (a->sign != b->sign)
- {
- if (a->sign)
- {
- tfraction = -a_fraction + b_fraction;
- }
- else
- {
- tfraction = a_fraction - b_fraction;
- }
- if (tfraction > 0)
- {
- tmp->sign = 0;
- tmp->normal_exp = a_normal_exp;
- tmp->fraction.ll = tfraction;
- }
- else
- {
- tmp->sign = 1;
- tmp->normal_exp = a_normal_exp;
- tmp->fraction.ll = -tfraction;
- }
- /* and renormalize it */
-
- while (tmp->fraction.ll < IMPLICIT_1 && tmp->fraction.ll)
- {
- tmp->fraction.ll <<= 1;
- tmp->normal_exp--;
- }
- }
- else
- {
- tmp->sign = a->sign;
- tmp->normal_exp = a_normal_exp;
- tmp->fraction.ll = a_fraction + b_fraction;
- }
- tmp->class = CLASS_NUMBER;
- /* Now the fraction is added, we have to shift down to renormalize the
- number */
-
- if (tmp->fraction.ll >= IMPLICIT_2)
- {
- LSHIFT (tmp->fraction.ll);
- tmp->normal_exp++;
- }
- return tmp;
-
-}
-
-FLO_type
-add (FLO_type arg_a, FLO_type arg_b)
-{
- fp_number_type a;
- fp_number_type b;
- fp_number_type tmp;
- fp_number_type *res;
-
- unpack_d ((FLO_union_type *) & arg_a, &a);
- unpack_d ((FLO_union_type *) & arg_b, &b);
-
- res = _fpadd_parts (&a, &b, &tmp);
-
- return pack_d (res);
-}
-
-FLO_type
-sub (FLO_type arg_a, FLO_type arg_b)
-{
- fp_number_type a;
- fp_number_type b;
- fp_number_type tmp;
- fp_number_type *res;
-
- unpack_d ((FLO_union_type *) & arg_a, &a);
- unpack_d ((FLO_union_type *) & arg_b, &b);
-
- b.sign ^= 1;
-
- res = _fpadd_parts (&a, &b, &tmp);
-
- return pack_d (res);
-}
-
-static fp_number_type *
-_fpmul_parts ( fp_number_type * a,
- fp_number_type * b,
- fp_number_type * tmp)
-{
- fractype low = 0;
- fractype high = 0;
-
- if (isnan (a))
- {
- a->sign = a->sign != b->sign;
- return a;
- }
- if (isnan (b))
- {
- b->sign = a->sign != b->sign;
- return b;
- }
- if (isinf (a))
- {
- if (iszero (b))
- return nan ();
- a->sign = a->sign != b->sign;
- return a;
- }
- if (isinf (b))
- {
- if (iszero (a))
- {
- return nan ();
- }
- b->sign = a->sign != b->sign;
- return b;
- }
- if (iszero (a))
- {
- a->sign = a->sign != b->sign;
- return a;
- }
- if (iszero (b))
- {
- b->sign = a->sign != b->sign;
- return b;
- }
-
- /* Calculate the mantissa by multiplying both 64bit numbers to get a
- 128 bit number */
- {
- fractype x = a->fraction.ll;
- fractype ylow = b->fraction.ll;
- fractype yhigh = 0;
- int bit;
-
-#if defined(NO_DI_MODE)
- {
- /* ??? This does multiplies one bit at a time. Optimize. */
- for (bit = 0; bit < FRAC_NBITS; bit++)
- {
- int carry;
-
- if (x & 1)
- {
- carry = (low += ylow) < ylow;
- high += yhigh + carry;
- }
- yhigh <<= 1;
- if (ylow & FRACHIGH)
- {
- yhigh |= 1;
- }
- ylow <<= 1;
- x >>= 1;
- }
- }
-#elif defined(FLOAT)
- {
- /* Multiplying two 32 bit numbers to get a 64 bit number on
- a machine with DI, so we're safe */
-
- DItype answer = (DItype)(a->fraction.ll) * (DItype)(b->fraction.ll);
-
- high = answer >> 32;
- low = answer;
- }
-#else
- /* Doing a 64*64 to 128 */
- {
- UDItype nl = a->fraction.ll & 0xffffffff;
- UDItype nh = a->fraction.ll >> 32;
- UDItype ml = b->fraction.ll & 0xffffffff;
- UDItype mh = b->fraction.ll >>32;
- UDItype pp_ll = ml * nl;
- UDItype pp_hl = mh * nl;
- UDItype pp_lh = ml * nh;
- UDItype pp_hh = mh * nh;
- UDItype res2 = 0;
- UDItype res0 = 0;
- UDItype ps_hh__ = pp_hl + pp_lh;
- if (ps_hh__ < pp_hl)
- res2 += 0x100000000LL;
- pp_hl = (ps_hh__ << 32) & 0xffffffff00000000LL;
- res0 = pp_ll + pp_hl;
- if (res0 < pp_ll)
- res2++;
- res2 += ((ps_hh__ >> 32) & 0xffffffffL) + pp_hh;
- high = res2;
- low = res0;
- }
-#endif
- }
-
- tmp->normal_exp = a->normal_exp + b->normal_exp;
- tmp->sign = a->sign != b->sign;
-#ifdef FLOAT
- tmp->normal_exp += 2; /* ??????????????? */
-#else
- tmp->normal_exp += 4; /* ??????????????? */
-#endif
- while (high >= IMPLICIT_2)
- {
- tmp->normal_exp++;
- if (high & 1)
- {
- low >>= 1;
- low |= FRACHIGH;
- }
- high >>= 1;
- }
- while (high < IMPLICIT_1)
- {
- tmp->normal_exp--;
-
- high <<= 1;
- if (low & FRACHIGH)
- high |= 1;
- low <<= 1;
- }
- /* rounding is tricky. if we only round if it won't make us round later. */
-#if 0
- if (low & FRACHIGH2)
- {
- if (((high & GARDMASK) != GARDMSB)
- && (((high + 1) & GARDMASK) == GARDMSB))
- {
- /* don't round, it gets done again later. */
- }
- else
- {
- high++;
- }
- }
-#endif
- if ((high & GARDMASK) == GARDMSB)
- {
- if (high & (1 << NGARDS))
- {
- /* half way, so round to even */
- high += GARDROUND + 1;
- }
- else if (low)
- {
- /* but we really weren't half way */
- high += GARDROUND + 1;
- }
- }
- tmp->fraction.ll = high;
- tmp->class = CLASS_NUMBER;
- return tmp;
-}
-
-FLO_type
-multiply (FLO_type arg_a, FLO_type arg_b)
-{
- fp_number_type a;
- fp_number_type b;
- fp_number_type tmp;
- fp_number_type *res;
-
- unpack_d ((FLO_union_type *) & arg_a, &a);
- unpack_d ((FLO_union_type *) & arg_b, &b);
-
- res = _fpmul_parts (&a, &b, &tmp);
-
- return pack_d (res);
-}
-
-static fp_number_type *
-_fpdiv_parts (fp_number_type * a,
- fp_number_type * b,
- fp_number_type * tmp)
-{
- fractype low = 0;
- fractype high = 0;
- fractype r0, r1, y0, y1, bit;
- fractype q;
- fractype numerator;
- fractype denominator;
- fractype quotient;
- fractype remainder;
-
- if (isnan (a))
- {
- return a;
- }
- if (isnan (b))
- {
- return b;
- }
- if (isinf (a) || iszero (a))
- {
- if (a->class == b->class)
- return nan ();
- return a;
- }
- a->sign = a->sign ^ b->sign;
-
- if (isinf (b))
- {
- a->fraction.ll = 0;
- a->normal_exp = 0;
- return a;
- }
- if (iszero (b))
- {
- a->class = CLASS_INFINITY;
- return b;
- }
-
- /* Calculate the mantissa by multiplying both 64bit numbers to get a
- 128 bit number */
- {
- int carry;
- intfrac d0, d1; /* weren't unsigned before ??? */
-
- /* quotient =
- ( numerator / denominator) * 2^(numerator exponent - denominator exponent)
- */
-
- a->normal_exp = a->normal_exp - b->normal_exp;
- numerator = a->fraction.ll;
- denominator = b->fraction.ll;
-
- if (numerator < denominator)
- {
- /* Fraction will be less than 1.0 */
- numerator *= 2;
- a->normal_exp--;
- }
- bit = IMPLICIT_1;
- quotient = 0;
- /* ??? Does divide one bit at a time. Optimize. */
- while (bit)
- {
- if (numerator >= denominator)
- {
- quotient |= bit;
- numerator -= denominator;
- }
- bit >>= 1;
- numerator *= 2;
- }
-
- if ((quotient & GARDMASK) == GARDMSB)
- {
- if (quotient & (1 << NGARDS))
- {
- /* half way, so round to even */
- quotient += GARDROUND + 1;
- }
- else if (numerator)
- {
- /* but we really weren't half way, more bits exist */
- quotient += GARDROUND + 1;
- }
- }
-
- a->fraction.ll = quotient;
- return (a);
- }
-}
-
-FLO_type
-divide (FLO_type arg_a, FLO_type arg_b)
-{
- fp_number_type a;
- fp_number_type b;
- fp_number_type tmp;
- fp_number_type *res;
-
- unpack_d ((FLO_union_type *) & arg_a, &a);
- unpack_d ((FLO_union_type *) & arg_b, &b);
-
- res = _fpdiv_parts (&a, &b, &tmp);
-
- return pack_d (res);
-}
-
-/* according to the demo, fpcmp returns a comparison with 0... thus
- a<b -> -1
- a==b -> 0
- a>b -> +1
- */
-
-static int
-_fpcmp_parts (fp_number_type * a, fp_number_type * b)
-{
-#if 0
- /* either nan -> unordered. Must be checked outside of this routine. */
- if (isnan (a) && isnan (b))
- {
- return 1; /* still unordered! */
- }
-#endif
-
- if (isnan (a) || isnan (b))
- {
- return 1; /* how to indicate unordered compare? */
- }
- if (isinf (a) && isinf (b))
- {
- /* +inf > -inf, but +inf != +inf */
- /* b \a| +inf(0)| -inf(1)
- ______\+--------+--------
- +inf(0)| a==b(0)| a<b(-1)
- -------+--------+--------
- -inf(1)| a>b(1) | a==b(0)
- -------+--------+--------
- So since unordered must be non zero, just line up the columns...
- */
- return b->sign - a->sign;
- }
- /* but not both... */
- if (isinf (a))
- {
- return a->sign ? -1 : 1;
- }
- if (isinf (b))
- {
- return b->sign ? 1 : -1;
- }
- if (iszero (a) && iszero (b))
- {
- return 0;
- }
- if (iszero (a))
- {
- return b->sign ? 1 : -1;
- }
- if (iszero (b))
- {
- return a->sign ? -1 : 1;
- }
- /* now both are "normal". */
- if (a->sign != b->sign)
- {
- /* opposite signs */
- return a->sign ? -1 : 1;
- }
- /* same sign; exponents? */
- if (a->normal_exp > b->normal_exp)
- {
- return a->sign ? -1 : 1;
- }
- if (a->normal_exp < b->normal_exp)
- {
- return a->sign ? 1 : -1;
- }
- /* same exponents; check size. */
- if (a->fraction.ll > b->fraction.ll)
- {
- return a->sign ? -1 : 1;
- }
- if (a->fraction.ll < b->fraction.ll)
- {
- return a->sign ? 1 : -1;
- }
- /* after all that, they're equal. */
- return 0;
-}
-
-CMPtype
-compare (FLO_type arg_a, FLO_type arg_b)
-{
- fp_number_type a;
- fp_number_type b;
-
- unpack_d ((FLO_union_type *) & arg_a, &a);
- unpack_d ((FLO_union_type *) & arg_b, &b);
-
- return _fpcmp_parts (&a, &b);
-}
-
-#ifndef US_SOFTWARE_GOFAST
-
-/* These should be optimized for their specific tasks someday. */
-
-CMPtype
-_eq_f2 (FLO_type arg_a, FLO_type arg_b)
-{
- fp_number_type a;
- fp_number_type b;
-
- unpack_d ((FLO_union_type *) & arg_a, &a);
- unpack_d ((FLO_union_type *) & arg_b, &b);
-
- if (isnan (&a) || isnan (&b))
- return 1; /* false, truth == 0 */
-
- return _fpcmp_parts (&a, &b) ;
-}
-
-CMPtype
-_ne_f2 (FLO_type arg_a, FLO_type arg_b)
-{
- fp_number_type a;
- fp_number_type b;
-
- unpack_d ((FLO_union_type *) & arg_a, &a);
- unpack_d ((FLO_union_type *) & arg_b, &b);
-
- if (isnan (&a) || isnan (&b))
- return 1; /* true, truth != 0 */
-
- return _fpcmp_parts (&a, &b) ;
-}
-
-CMPtype
-_gt_f2 (FLO_type arg_a, FLO_type arg_b)
-{
- fp_number_type a;
- fp_number_type b;
-
- unpack_d ((FLO_union_type *) & arg_a, &a);
- unpack_d ((FLO_union_type *) & arg_b, &b);
-
- if (isnan (&a) || isnan (&b))
- return -1; /* false, truth > 0 */
-
- return _fpcmp_parts (&a, &b);
-}
-
-CMPtype
-_ge_f2 (FLO_type arg_a, FLO_type arg_b)
-{
- fp_number_type a;
- fp_number_type b;
-
- unpack_d ((FLO_union_type *) & arg_a, &a);
- unpack_d ((FLO_union_type *) & arg_b, &b);
-
- if (isnan (&a) || isnan (&b))
- return -1; /* false, truth >= 0 */
- return _fpcmp_parts (&a, &b) ;
-}
-
-CMPtype
-_lt_f2 (FLO_type arg_a, FLO_type arg_b)
-{
- fp_number_type a;
- fp_number_type b;
-
- unpack_d ((FLO_union_type *) & arg_a, &a);
- unpack_d ((FLO_union_type *) & arg_b, &b);
-
- if (isnan (&a) || isnan (&b))
- return 1; /* false, truth < 0 */
-
- return _fpcmp_parts (&a, &b);
-}
-
-CMPtype
-_le_f2 (FLO_type arg_a, FLO_type arg_b)
-{
- fp_number_type a;
- fp_number_type b;
-
- unpack_d ((FLO_union_type *) & arg_a, &a);
- unpack_d ((FLO_union_type *) & arg_b, &b);
-
- if (isnan (&a) || isnan (&b))
- return 1; /* false, truth <= 0 */
-
- return _fpcmp_parts (&a, &b) ;
-}
-
-#endif /* ! US_SOFTWARE_GOFAST */
-
-FLO_type
-si_to_float (SItype arg_a)
-{
- fp_number_type in;
-
- in.class = CLASS_NUMBER;
- in.sign = arg_a < 0;
- if (!arg_a)
- {
- in.class = CLASS_ZERO;
- }
- else
- {
- in.normal_exp = FRACBITS + NGARDS;
- if (in.sign)
- {
- /* Special case for minint, since there is no +ve integer
- representation for it */
- if (arg_a == 0x80000000)
- {
- return -2147483648.0;
- }
- in.fraction.ll = (-arg_a);
- }
- else
- in.fraction.ll = arg_a;
-
- while (in.fraction.ll < (1LL << (FRACBITS + NGARDS)))
- {
- in.fraction.ll <<= 1;
- in.normal_exp -= 1;
- }
- }
- return pack_d (&in);
-}
-
-SItype
-float_to_si (FLO_type arg_a)
-{
- fp_number_type a;
- SItype tmp;
-
- unpack_d ((FLO_union_type *) & arg_a, &a);
- if (iszero (&a))
- return 0;
- if (isnan (&a))
- return 0;
- /* get reasonable MAX_SI_INT... */
- if (isinf (&a))
- return a.sign ? MAX_SI_INT : (-MAX_SI_INT)-1;
- /* it is a number, but a small one */
- if (a.normal_exp < 0)
- return 0;
- if (a.normal_exp > 30)
- return a.sign ? (-MAX_SI_INT)-1 : MAX_SI_INT;
- tmp = a.fraction.ll >> ((FRACBITS + NGARDS) - a.normal_exp);
- return a.sign ? (-tmp) : (tmp);
-}
-
-#ifdef US_SOFTWARE_GOFAST
-/* While libgcc2.c defines its own __fixunssfsi and __fixunsdfsi routines,
- we also define them for GOFAST because the ones in libgcc2.c have the
- wrong names and I'd rather define these here and keep GOFAST CYG-LOC's
- out of libgcc2.c. We can't define these here if not GOFAST because then
- there'd be duplicate copies. */
-
-USItype
-float_to_usi (FLO_type arg_a)
-{
- fp_number_type a;
-
- unpack_d ((FLO_union_type *) & arg_a, &a);
- if (iszero (&a))
- return 0;
- if (isnan (&a))
- return 0;
- /* get reasonable MAX_USI_INT... */
- if (isinf (&a))
- return a.sign ? MAX_USI_INT : 0;
- /* it is a negative number */
- if (a.sign)
- return 0;
- /* it is a number, but a small one */
- if (a.normal_exp < 0)
- return 0;
- if (a.normal_exp > 31)
- return MAX_USI_INT;
- else if (a.normal_exp > (FRACBITS + NGARDS))
- return a.fraction.ll << ((FRACBITS + NGARDS) - a.normal_exp);
- else
- return a.fraction.ll >> ((FRACBITS + NGARDS) - a.normal_exp);
-}
-#endif
-
-FLO_type
-negate (FLO_type arg_a)
-{
- fp_number_type a;
-
- unpack_d ((FLO_union_type *) & arg_a, &a);
- flip_sign (&a);
- return pack_d (&a);
-}
-
-#ifdef FLOAT
-
-SFtype
-__make_fp(fp_class_type class,
- unsigned int sign,
- int exp,
- USItype frac)
-{
- fp_number_type in;
-
- in.class = class;
- in.sign = sign;
- in.normal_exp = exp;
- in.fraction.ll = frac;
- return pack_d (&in);
-}
-
-#ifndef FLOAT_ONLY
-
-/* This enables one to build an fp library that supports float but not double.
- Otherwise, we would get an undefined reference to __make_dp.
- This is needed for some 8-bit ports that can't handle well values that
- are 8-bytes in size, so we just don't support double for them at all. */
-
-extern DFtype __make_dp (fp_class_type, unsigned int, int, UDItype frac);
-
-DFtype
-sf_to_df (SFtype arg_a)
-{
- fp_number_type in;
-
- unpack_d ((FLO_union_type *) & arg_a, &in);
- return __make_dp (in.class, in.sign, in.normal_exp,
- ((UDItype) in.fraction.ll) << F_D_BITOFF);
-}
-
-#endif
-#endif
-
-#ifndef FLOAT
-
-extern SFtype __make_fp (fp_class_type, unsigned int, int, USItype);
-
-DFtype
-__make_dp (fp_class_type class, unsigned int sign, int exp, UDItype frac)
-{
- fp_number_type in;
-
- in.class = class;
- in.sign = sign;
- in.normal_exp = exp;
- in.fraction.ll = frac;
- return pack_d (&in);
-}
-
-SFtype
-df_to_sf (DFtype arg_a)
-{
- fp_number_type in;
-
- unpack_d ((FLO_union_type *) & arg_a, &in);
- return __make_fp (in.class, in.sign, in.normal_exp,
- in.fraction.ll >> F_D_BITOFF);
-}
-
-#endif
diff --git a/sim/ppc/emul_bugapi.c b/sim/ppc/emul_bugapi.c
deleted file mode 100644
index 97028bf9de9..00000000000
--- a/sim/ppc/emul_bugapi.c
+++ /dev/null
@@ -1,581 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1997, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-#ifndef _EMUL_BUGAPI_C_
-#define _EMUL_BUGAPI_C_
-
-/* Note: this module is called via a table. There is no benefit in
- making it inline */
-
-#include "emul_generic.h"
-#include "emul_bugapi.h"
-
-#ifdef HAVE_UNISTD_H
-#include <unistd.h>
-#endif
-
-#ifdef HAVE_STDLIB_H
-#include <stdlib.h>
-#endif
-
-#ifdef HAVE_STRING_H
-#include <string.h>
-#else
-#ifdef HAVE_STRINGS_H
-#include <strings.h>
-#endif
-#endif
-
-
-/* EMULATION
-
- BUG - Motorola's embeded firmware BUG interface
-
- DESCRIPTION
-
-
-
- */
-
-
-/* from PowerPCBug Debugging Package User's Manual, part 2 of 2 and also bug.S - Dale Rahn */
-#define _INCHR 0x000 /* Input character */
-#define _INSTAT 0x001 /* Input serial port status */
-#define _INLN 0x002 /* Input line (pointer / pointer format) */
-#define _READSTR 0x003 /* Input string (pointer / count format) */
-#define _READLN 0x004 /* Input line (pointer / count format) */
-#define _CHKBRK 0x005 /* Check for break */
-#define _DSKRD 0x010 /* Disk read */
-#define _DSKWR 0x011 /* Disk write */
-#define _DSKCFIG 0x012 /* Disk configure */
-#define _DSKFMT 0x014 /* Disk format */
-#define _DSKCTRL 0x015 /* Disk control */
-#define _NETRD 0x018 /* Read from host */
-#define _NETWR 0x019 /* Write to host */
-#define _NETCFIG 0x01a /* Configure network parameters */
-#define _NETOPN 0x01b /* Open file for reading */
-#define _NETFRD 0x01c /* Retreive specified file blocks */
-#define _NETCTRL 0x01d /* Implement special control functions */
-#define _OUTCHR 0x020 /* Output character (pointer / pointer format) */
-#define _OUTSTR 0x021 /* Output string (pointer / pointer format) */
-#define _OUTLN 0x022 /* Output line (pointer / pointer format) */
-#define _WRITE 0x023 /* Output string (pointer / count format) */
-#define _WRITELN 0x024 /* Output line (pointer / count format) */
-#define _WRITDLN 0x025 /* Output line with data (pointer / count format) */
-#define _PCRLF 0x026 /* Output carriage return and line feed */
-#define _ERASLN 0x027 /* Erase line */
-#define _WRITD 0x028 /* Output string with data (pointer / count format) */
-#define _SNDBRK 0x029 /* Send break */
-#define _DELAY 0x043 /* Timer delay */
-#define _RTC_TM 0x050 /* Time initialization for RTC */
-#define _RTC_DT 0x051 /* Date initialization for RTC */
-#define _RTC_DSP 0x052 /* Display RTC time and date */
-#define _RTC_RD 0x053 /* Read the RTC registers */
-#define _REDIR 0x060 /* Redirect I/O of a system call function */
-#define _REDIR_I 0x061 /* Redirect input */
-#define _REDIR_O 0x062 /* Redirect output */
-#define _RETURN 0x063 /* Return to PPCbug */
-#define _BINDEC 0x064 /* Convert binary to binary coded decimal (BCD) */
-#define _CHANGEV 0x067 /* Parse value */
-#define _STRCMP 0x068 /* Compare two strings (pointer / count format) */
-#define _MULU32 0x069 /* Multiply two 32-bit unsigned integers */
-#define _DIVU32 0x06a /* Divide two 32-bit unsigned integers */
-#define _CHK_SUM 0x06b /* Generate checksum */
-#define _BRD_ID 0x070 /* Return pointer to board ID packet */
-#define _ENVIRON 0x071 /* Access boot environment parameters */
-#define _DIAGFCN 0x074 /* Diagnostic function(s) */
-#define _SIOPEPS 0x090 /* Retrieve SCSI pointers */
-#define _IOINQ 0x120 /* Port inquire */
-#define _IOINFORM 0x124 /* Port inform */
-#define _IOCONFIG 0x128 /* Port configure */
-#define _IODELETE 0x12c /* Port delete */
-#define _SYMBOLTA 0x130 /* Attach symbol table */
-#define _SYMBOLDA 0x131 /* Detach symbol table */
-
-struct bug_map {
- int value;
- const char *info;
-};
-
-static const struct bug_map bug_mapping[] = {
- { _INCHR, ".INCHR -- Input character" },
- { _INSTAT, ".INSTAT -- Input serial port status" },
- { _INLN, ".INLN -- Input line (pointer / pointer format)" },
- { _READSTR, ".READSTR -- Input string (pointer / count format)" },
- { _READLN, ".READLN -- Input line (pointer / count format)" },
- { _CHKBRK, ".CHKBRK -- Check for break" },
- { _DSKRD, ".DSKRD -- Disk read" },
- { _DSKWR, ".DSKWR -- Disk write" },
- { _DSKCFIG, ".DSKCFIG -- Disk configure" },
- { _DSKFMT, ".DSKFMT -- Disk format" },
- { _DSKCTRL, ".DSKCTRL -- Disk control" },
- { _NETRD, ".NETRD -- Read from host" },
- { _NETWR, ".NETWR -- Write to host" },
- { _NETCFIG, ".NETCFIG -- Configure network parameters" },
- { _NETOPN, ".NETOPN -- Open file for reading" },
- { _NETFRD, ".NETFRD -- Retreive specified file blocks" },
- { _NETCTRL, ".NETCTRL -- Implement special control functions" },
- { _OUTCHR, ".OUTCHR -- Output character" },
- { _OUTSTR, ".OUTSTR -- Output string (pointer / pointer format)" },
- { _OUTLN, ".OUTLN -- Output line (pointer / pointer format)" },
- { _WRITE, ".WRITE -- Output string (pointer / count format)" },
- { _WRITELN, ".WRITELN -- Output line (pointer / count format)" },
- { _WRITDLN, ".WRITDLN -- Output line with data (pointer / count format)" },
- { _PCRLF, ".PCRLF -- Output carriage return and line feed" },
- { _ERASLN, ".ERASLN -- Erase line" },
- { _WRITD, ".WRITD -- Output string with data (pointer / count format)" },
- { _SNDBRK, ".SNDBRK -- Send break" },
- { _DELAY, ".DELAY -- Timer delay" },
- { _RTC_TM, ".RTC_TM -- Time initialization for RTC" },
- { _RTC_DT, ".RTC_DT -- Date initialization for RTC" },
- { _RTC_DSP, ".RTC_DSP -- Display RTC time and date" },
- { _RTC_RD, ".RTC_RD -- Read the RTC registers" },
- { _REDIR, ".REDIR -- Redirect I/O of a system call function" },
- { _REDIR, ".REDIR -- Redirect input" },
- { _REDIR, ".REDIR -- Redirect output" },
- { _RETURN, ".RETURN -- Return to PPCbug" },
- { _BINDEC, ".BINDEC -- Convert binary to binary coded decimal (BCD)" },
- { _CHANGEV, ".CHANGEV -- Parse value" },
- { _STRCMP, ".STRCMP -- Compare two strings (pointer / count format)" },
- { _MULU32, ".MULU32 -- Multiply two 32-bit unsigned integers" },
- { _DIVU32, ".DIVU32 -- Divide two 32-bit unsigned integers" },
- { _CHK_SUM, ".CHK_SUM -- Generate checksum" },
- { _BRD_ID, ".BRD_ID -- Return pointer to board ID packet" },
- { _ENVIRON, ".ENVIRON -- Access boot environment parameters" },
- { _DIAGFCN, ".DIAGFCN -- Diagnostic function(s)" },
- { _SIOPEPS, ".SIOPEPS -- Retrieve SCSI pointers" },
- { _IOINQ, ".IOINQ -- Port inquire" },
- { _IOINFORM, ".IOINFORM -- Port inform" },
- { _IOCONFIG, ".IOCONFIG -- Port configure" },
- { _IODELETE, ".IODELETE -- Port delete" },
- { _SYMBOLTA, ".SYMBOLTA -- Attach symbol table" },
- { _SYMBOLDA, ".SYMBOLDA -- Detach symbol table" },
-};
-
-#ifndef BUGAPI_END_ADDRESS
-#define BUGAPI_END_ADDRESS 0x100000
-#endif
-
-enum {
- nr_bugapi_disks = 2,
-};
-
-
-struct _os_emul_data {
- device *root;
- unsigned_word memory_size;
- unsigned_word top_of_stack;
- int interrupt_prefix;
- unsigned_word interrupt_vector_address;
- unsigned_word system_call_address;
- unsigned_word stall_cpu_loop_address;
- int little_endian;
- int floating_point_available;
- /* I/O devices */
- device_instance *output;
- device_instance *input;
- device_instance *(disk[nr_bugapi_disks]);
-};
-
-
-static os_emul_data *
-emul_bugapi_create(device *root,
- bfd *image,
- const char *name)
-{
- device *node;
- os_emul_data *bugapi;
-
- /* check it really is for us */
- if (name != NULL
- && strcmp(name, "bugapi") != 0
- && strcmp(name, "bug") != 0)
- return NULL;
- if (image != NULL
- && name == NULL
- && bfd_get_start_address(image) >= BUGAPI_END_ADDRESS)
- return NULL;
-
- bugapi = ZALLOC(os_emul_data);
-
- /* options */
- emul_add_tree_options(root, image, "bug", "oea",
- 1 /*oea-interrupt-prefix*/);
-
- /* add some real hardware, include eeprom memory for the eeprom trap
- addresses */
- emul_add_tree_hardware(root);
- node = tree_parse(root, "/openprom/memory@0xfff00000");
- tree_parse(node, "./psim,description \"eeprom trap addresses");
- tree_parse(node, "./reg 0xfff00000 0x3000");
-
- bugapi->root = root;
-
- bugapi->memory_size
- = tree_find_integer_property(root, "/openprom/options/oea-memory-size");
- bugapi->interrupt_prefix =
- tree_find_integer_property(root, "/openprom/options/oea-interrupt-prefix");
- bugapi->interrupt_vector_address = (bugapi->interrupt_prefix
- ? MASK(0, 43)
- : 0);
- bugapi->system_call_address = (bugapi->interrupt_vector_address + 0x00c00);
- bugapi->stall_cpu_loop_address = (bugapi->system_call_address + 0x000f0);
- bugapi->top_of_stack = bugapi->memory_size - 0x1000;
- bugapi->little_endian
- = tree_find_boolean_property(root, "/options/little-endian?");
- bugapi->floating_point_available
- = tree_find_boolean_property(root, "/openprom/options/floating-point?");
- bugapi->input = NULL;
- bugapi->output = NULL;
-
- /* initialization */
- if (image != NULL)
- tree_parse(root, "/openprom/init/register/0.pc 0x%lx",
- (unsigned long)bfd_get_start_address(image));
- tree_parse(root, "/openprom/init/register/pc 0x%lx",
- (unsigned long)bugapi->stall_cpu_loop_address);
- tree_parse(root, "/openprom/init/register/sp 0x%lx",
- (unsigned long)(bugapi->top_of_stack - 16));
- tree_parse(root, "/openprom/init/register/msr 0x%x",
- (msr_recoverable_interrupt
- | (bugapi->little_endian
- ? (msr_little_endian_mode
- | msr_interrupt_little_endian_mode)
- : 0)
- | (bugapi->floating_point_available
- ? msr_floating_point_available
- : 0)
- | (bugapi->interrupt_prefix
- ? msr_interrupt_prefix
- : 0)
- ));
-
- /* patch the system call instruction to call this emulation and then
- do an rfi */
- node = tree_parse(root, "/openprom/init/data@0x%lx",
- (unsigned long)bugapi->system_call_address);
- tree_parse(node, "./psim,description \"system-call trap instruction");
- tree_parse(node, "./real-address 0x%lx",
- (unsigned long)bugapi->system_call_address);
- tree_parse(node, "./data 0x%x", emul_call_instruction);
- node = tree_parse(root, "/openprom/init/data@0x%lx",
- (unsigned long)bugapi->system_call_address + 4);
- tree_parse(node, "./psim,description \"return from interrupt instruction");
- tree_parse(node, "./real-address 0x%lx",
- (unsigned long)bugapi->system_call_address + 4);
- tree_parse(node, "./data 0x%x",
- emul_rfi_instruction);
-
- /* patch the end of the system call instruction so that it contains
- a loop to self instruction and point all the cpu's at this */
- node = tree_parse(root, "/openprom/init/data@0x%lx",
- (unsigned long)bugapi->stall_cpu_loop_address);
- tree_parse(node, "./psim,description \"cpu-loop instruction");
- tree_parse(node, "./real-address 0x%lx",
- (unsigned long)bugapi->stall_cpu_loop_address);
- tree_parse(node, "./data 0x%lx",
- (unsigned long)emul_loop_instruction);
-
- if (image != NULL)
- tree_parse(root, "/openprom/init/stack/stack-type %s",
- (image->xvec->flavour == bfd_target_elf_flavour
- ? "ppc-elf"
- : "ppc-xcoff"));
-
- if (image != NULL)
- tree_parse(root, "/openprom/init/load-binary/file-name \"%s",
- bfd_get_filename(image));
-
- return bugapi;
-}
-
-static void
-emul_bugapi_init(os_emul_data *bugapi,
- int nr_cpus)
-{
- int i;
- /* get the current input/output devices that were created during
- device tree initialization */
- bugapi->input = tree_find_ihandle_property(bugapi->root, "/chosen/stdin");
- bugapi->output = tree_find_ihandle_property(bugapi->root, "/chosen/stdout");
- /* if present, extract the selected disk devices */
- for (i = 0; i < nr_bugapi_disks; i++) {
- char disk[32];
- char *chp;
- strcpy(disk, "/chosen/disk0");
- ASSERT(sizeof(disk) > strlen(disk));
- chp = strchr(disk, '0');
- *chp = *chp + i;
- if (tree_find_property(bugapi->root, disk) != NULL)
- bugapi->disk[i] = tree_find_ihandle_property(bugapi->root, disk);
- }
-}
-
-static const char *
-emul_bugapi_instruction_name(int call_id)
-{
- static char buffer[40];
- int i;
-
- for (i = 0; i < sizeof (bug_mapping) / sizeof (bug_mapping[0]); i++)
- {
- if (bug_mapping[i].value == call_id)
- return bug_mapping[i].info;
- }
-
- (void) sprintf (buffer, "Unknown bug call 0x%x", call_id);
- return buffer;
-}
-
-static int
-emul_bugapi_do_read(os_emul_data *bugapi,
- cpu *processor,
- unsigned_word cia,
- unsigned_word buf,
- int nbytes)
-{
- unsigned char *scratch_buffer;
- int status;
-
- /* get a tempoary bufer */
- scratch_buffer = (unsigned char *) zalloc(nbytes);
-
- /* check if buffer exists by reading it */
- emul_read_buffer((void *)scratch_buffer, buf, nbytes, processor, cia);
-
- /* read */
- status = device_instance_read(bugapi->input,
- (void *)scratch_buffer, nbytes);
-
- /* -1 = error, -2 = nothing available - see "serial" [IEEE1275] */
- if (status < 0) {
- status = 0;
- }
-
- if (status > 0) {
- emul_write_buffer((void *)scratch_buffer, buf, status, processor, cia);
-
- /* Bugapi chops off the trailing n, but leaves it in the buffer */
- if (scratch_buffer[status-1] == '\n' || scratch_buffer[status-1] == '\r')
- status--;
- }
-
- zfree(scratch_buffer);
- return status;
-}
-
-static void
-emul_bugapi_do_diskio(os_emul_data *bugapi,
- cpu *processor,
- unsigned_word cia,
- unsigned_word descriptor_addr,
- int call_id)
-{
- struct dskio_descriptor {
- unsigned_1 ctrl_lun;
- unsigned_1 dev_lun;
- unsigned_2 status;
- unsigned_word pbuffer;
- unsigned_4 blk_num;
- unsigned_2 blk_cnt;
- unsigned_1 flag;
-#define BUG_FILE_MARK 0x80
-#define IGNORE_FILENUM 0x02
-#define END_OF_FILE 0x01
- unsigned_1 addr_mod;
- } descriptor;
- int block;
- emul_read_buffer(&descriptor, descriptor_addr, sizeof(descriptor),
- processor, cia);
- T2H(descriptor.ctrl_lun);
- T2H(descriptor.dev_lun);
- T2H(descriptor.status);
- T2H(descriptor.pbuffer);
- T2H(descriptor.blk_num);
- T2H(descriptor.blk_cnt);
- T2H(descriptor.flag);
- T2H(descriptor.addr_mod);
- if (descriptor.dev_lun >= nr_bugapi_disks
- || bugapi->disk[descriptor.dev_lun] == NULL) {
- error("emul_bugapi_do_diskio: attempt to access unconfigured disk /chosen/disk%d",
- descriptor.dev_lun);
- }
- else {
- for (block = 0; block < descriptor.blk_cnt; block++) {
- device_instance *disk = bugapi->disk[descriptor.dev_lun];
- unsigned_1 buf[512]; /*????*/
- unsigned_word block_nr = descriptor.blk_num + block;
- unsigned_word byte_nr = block_nr * sizeof(buf);
- unsigned_word block_addr = descriptor.pbuffer + block*sizeof(buf);
- if (device_instance_seek(disk, 0, byte_nr) < 0)
- error("emul_bugapi_do_diskio: bad seek\n");
- switch (call_id) {
- case _DSKRD:
- if (device_instance_read(disk, buf, sizeof(buf)) != sizeof(buf))
- error("emul_`bugapi_do_diskio: bad read\n");
- emul_write_buffer(buf, block_addr, sizeof(buf), processor, cia);
- break;
- case _DSKWR:
- emul_read_buffer(buf, block_addr, sizeof(buf), processor, cia);
- if (device_instance_write(disk, buf, sizeof(buf)) != sizeof(buf))
- error("emul_bugapi_do_diskio: bad write\n");
- break;
- default:
- error("emul_bugapi_do_diskio: bad switch\n");
- }
- }
- }
-}
-
-static void
-emul_bugapi_do_write(os_emul_data *bugapi,
- cpu *processor,
- unsigned_word cia,
- unsigned_word buf,
- int nbytes,
- const char *suffix)
-{
- void *scratch_buffer = NULL;
-
- /* get a tempoary bufer */
- if (nbytes > 0)
- {
- scratch_buffer = zalloc(nbytes);
-
- /* copy in */
- emul_read_buffer(scratch_buffer, buf, nbytes,
- processor, cia);
-
- /* write */
- device_instance_write(bugapi->output, scratch_buffer, nbytes);
-
- zfree(scratch_buffer);
- }
-
- if (suffix)
- device_instance_write(bugapi->output, suffix, strlen(suffix));
-
- flush_stdoutput ();
-}
-
-static int
-emul_bugapi_instruction_call(cpu *processor,
- unsigned_word cia,
- unsigned_word ra,
- os_emul_data *bugapi)
-{
- const int call_id = cpu_registers(processor)->gpr[10];
- unsigned char uc;
-
-#define MY_INDEX itable_instruction_call
- ITRACE (trace_os_emul,
- (" 0x%x %s, r3 = 0x%lx, r4 = 0x%lx\n",
- call_id, emul_bugapi_instruction_name (call_id),
- (long)cpu_registers(processor)->gpr[3],
- (long)cpu_registers(processor)->gpr[4]));;
-
- /* check that this isn't an invalid instruction */
- if (cia != bugapi->system_call_address)
- return 0;
-
- switch (call_id) {
- default:
- error("emul-bugapi: unimplemented bugapi %s from address 0x%lx\n",
- emul_bugapi_instruction_name (call_id), SRR0);
- break;
-
- /* read a single character, output r3 = byte */
- /* FIXME: Add support to unbuffer input */
- case _INCHR:
- if (device_instance_read(bugapi->input, (void *)&uc, 1) <= 0)
- uc = 0;
- cpu_registers(processor)->gpr[3] = uc;
- break;
-
- /* read a line of at most 256 bytes, r3 = ptr to 1st byte, output r3 = ptr to last byte+1 */
- case _INLN:
- cpu_registers(processor)->gpr[3] += emul_bugapi_do_read(bugapi,
- processor, cia,
- cpu_registers(processor)->gpr[3],
- 256);
- break;
-
- /* output a character, r3 = character */
- case _OUTCHR:
- {
- char out = (char)cpu_registers(processor)->gpr[3];
- device_instance_write(bugapi->output, &out, 1);
- break;
- }
-
- /* output a string, r3 = ptr to 1st byte, r4 = ptr to last byte+1 */
- case _OUTSTR:
- emul_bugapi_do_write(bugapi,
- processor, cia,
- cpu_registers(processor)->gpr[3],
- cpu_registers(processor)->gpr[4] - cpu_registers(processor)->gpr[3],
- (const char *)0);
- break;
-
- /* output a string followed by \r\n, r3 = ptr to 1st byte, r4 = ptr to last byte+1 */
- case _OUTLN:
-
- emul_bugapi_do_write(bugapi,
- processor, cia,
- cpu_registers(processor)->gpr[3],
- cpu_registers(processor)->gpr[4] - cpu_registers(processor)->gpr[3],
- "\n");
- break;
-
- /* output a \r\n */
- case _PCRLF:
- device_instance_write(bugapi->output, "\n", 1);
- break;
-
- /* read/write blocks of data to/from the disk */
- case _DSKWR:
- case _DSKRD:
- emul_bugapi_do_diskio(bugapi, processor, cia,
- cpu_registers(processor)->gpr[3],
- call_id);
- break;
-
- /* return to ppcbug monitor (exiting with gpr[3] as status is not
- part of the bug monitor) */
- case _RETURN:
- cpu_halt(processor, cia, was_exited, cpu_registers(processor)->gpr[3]);
- break;
- }
- return 1;
- /* the instruction following this one is a RFI. Thus by just
- continuing the return from system call is performed */
-}
-
-const os_emul emul_bugapi = {
- "bugapi",
- emul_bugapi_create,
- emul_bugapi_init,
- 0, /*system_call*/
- emul_bugapi_instruction_call,
- 0 /*data*/
-};
-
-#endif
diff --git a/sim/ppc/emul_bugapi.h b/sim/ppc/emul_bugapi.h
deleted file mode 100644
index fd3e3838fbd..00000000000
--- a/sim/ppc/emul_bugapi.h
+++ /dev/null
@@ -1,27 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1995, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-#ifndef _EMUL_BUGAPI_H_
-#define _EMUL_BUGAPI_H_
-
-extern const os_emul emul_bugapi;
-
-#endif
diff --git a/sim/ppc/emul_chirp.c b/sim/ppc/emul_chirp.c
deleted file mode 100644
index c9bb89c5e0c..00000000000
--- a/sim/ppc/emul_chirp.c
+++ /dev/null
@@ -1,2010 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1997, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-#ifndef _EMUL_CHIRP_C_
-#define _EMUL_CHIRP_C_
-
-/* Note: this module is called via a table. There is no benefit in
- making it inline */
-
-#include "emul_generic.h"
-#include "emul_chirp.h"
-
-#ifdef HAVE_STRING_H
-#include <string.h>
-#else
-#ifdef HAVE_STRINGS_H
-#include <strings.h>
-#endif
-#endif
-
-#ifdef HAVE_UNISTD_H
-#include <unistd.h>
-#endif
-
-#ifndef STATIC_INLINE_EMUL_CHIRP
-#define STATIC_INLINE_EMUL_CHIRP STATIC_INLINE
-#endif
-
-
-/* EMULATION
-
-
- OpenFirmware - IEEE Standard for Boot (Initialization
- Configuration) Firmware.
-
-
- DESCRIPTION
-
-
- BUGS
-
-
- This code assumes that the memory node has #address-cells and
- #size-cells set to one. For future implementations, this may not
- be the case.
-
- */
-
-
-
-
-/* Descriptor of the open boot services being emulated */
-
-typedef int (chirp_handler)
- (os_emul_data *data,
- cpu *processor,
- unsigned_word cia);
-
-typedef struct _chirp_services {
- const char *name;
- chirp_handler *handler;
-} chirp_services;
-
-
-/* The OpenBoot emulation is, at any time either waiting for a client
- request or waiting on a client callback */
-typedef enum {
- serving,
- emulating,
- faulting,
-} chirp_emul_state;
-
-struct _os_emul_data {
- chirp_emul_state state;
- unsigned_word return_address;
- unsigned_word arguments;
- unsigned_word n_args;
- unsigned_word n_returns;
- chirp_services *service;
- device *root;
- chirp_services *services;
- /* configuration */
- unsigned_word memory_size;
- unsigned_word real_base;
- unsigned_word real_size;
- unsigned_word virt_base;
- unsigned_word virt_size;
- int real_mode;
- int little_endian;
- int floating_point_available;
- int interrupt_prefix;
- unsigned_word load_base;
- /* hash table */
- unsigned_word nr_page_table_entry_groups;
- unsigned_word htab_offset;
- unsigned_word htab_ra;
- unsigned_word htab_va;
- unsigned_word sizeof_htab;
- /* virtual address of htab */
- unsigned_word stack_offset;
- unsigned_word stack_ra;
- unsigned_word stack_va;
- unsigned_word sizeof_stack;
- /* addresses of emulation instructions virtual/real */
- unsigned_word code_offset;
- unsigned_word code_va;
- unsigned_word code_ra;
- unsigned_word sizeof_code;
- unsigned_word code_client_va;
- unsigned_word code_client_ra;
- unsigned_word code_callback_va;
- unsigned_word code_callback_ra;
- unsigned_word code_loop_va;
- unsigned_word code_loop_ra;
-};
-
-
-/* returns the name of the corresponding Ihandle */
-static const char *
-ihandle_name(device_instance *ihandle)
-{
- if (ihandle == NULL)
- return "";
- else
- return device_name(device_instance_device(ihandle));
-}
-
-
-
-/* Read/write the argument list making certain that all values are
- converted to/from host byte order.
-
- In the below only n_args+n_returns is read/written */
-
-static int
-chirp_read_t2h_args(void *args,
- int sizeof_args,
- int n_args,
- int n_returns,
- os_emul_data *data,
- cpu *processor,
- unsigned_word cia)
-{
- unsigned_cell *words;
- int i;
- /* check against the number of arguments specified by the client
- program */
- if ((n_args >= 0 && data->n_args != n_args)
- || (n_returns >= 0 && data->n_returns != n_returns)) {
- TRACE(trace_os_emul, ("%s - invalid nr of args - n_args=%ld, n_returns=%ld\n",
- data->service->name,
- (long)data->n_args,
- (long)data->n_returns));
- return -1;
- }
- /* check that there is enough space */
- if (sizeof(unsigned_cell) * (data->n_args + data->n_returns) > sizeof_args)
- return -1;
- /* bring in the data */
- memset(args, 0, sizeof_args);
- emul_read_buffer(args, data->arguments + 3 * sizeof(unsigned_cell),
- sizeof(unsigned_cell) * (data->n_args + data->n_returns),
- processor, cia);
- /* convert all words to host format */
- words = args;
- for (i = 0; i < (sizeof_args / sizeof(unsigned_cell)); i++)
- words[i] = T2H_cell(words[i]);
- return 0;
-}
-
-static void
-chirp_write_h2t_args(void *args,
- int sizeof_args,
- os_emul_data *data,
- cpu *processor,
- unsigned_word cia)
-{
- int i;
- unsigned_cell *words;
- /* convert to target everything */
- words = args;
- for (i = 0; i < (sizeof_args / sizeof(unsigned_cell)); i++)
- words[i] = H2T_cell(words[i]);
- /* bring in the data */
- emul_write_buffer(args, data->arguments + 3 * sizeof(unsigned_cell),
- sizeof(unsigned_cell) * (data->n_args + data->n_returns),
- processor, cia);
-}
-
-
-/* OpenBoot emulation functions */
-
-/* client interface */
-
-static int
-chirp_emul_test(os_emul_data *data,
- cpu *processor,
- unsigned_word cia)
-{
- struct test_args {
- /*in*/
- unsigned_cell name; /*string*/
- /*out*/
- unsigned_cell missing;
- } args;
- char name[32];
- chirp_services *service = NULL;
- /* read in the arguments */
- if (chirp_read_t2h_args(&args, sizeof(args), 1, 1, data, processor, cia))
- return -1;
- emul_read_string(name, args.name, sizeof(name),
- processor, cia);
- TRACE(trace_os_emul, ("test - in - name=`%s'\n", name));
- /* see if we know about the service */
- service = data->services;
- while (service->name != NULL && strcmp(service->name, name) != 0) {
- service++;
- }
- if (service->name == NULL)
- args.missing = -1;
- else
- args.missing = 0;
- /* write the arguments back out */
- TRACE(trace_os_emul, ("test - out - missing=%ld\n",
- (long)args.missing));
- chirp_write_h2t_args(&args,
- sizeof(args),
- data,
- processor, cia);
- return 0;
-}
-
-
-/* Device tree */
-
-static int
-chirp_emul_peer(os_emul_data *data,
- cpu *processor,
- unsigned_word cia)
-{
- struct peer_args {
- /*in*/
- unsigned_cell phandle;
- /*out*/
- unsigned_cell sibling_phandle;
- } args;
- device *phandle;
- device *sibling_phandle = NULL;
- /* read in the arguments */
- if (chirp_read_t2h_args(&args, sizeof(args), 1, 1, data, processor, cia))
- return -1;
- phandle = external_to_device(data->root, args.phandle);
- TRACE(trace_os_emul, ("peer - in - phandle=0x%lx(0x%lx`%s')\n",
- (unsigned long)args.phandle,
- (unsigned long)phandle,
- (phandle == NULL ? "" : device_name(phandle))));
- /* find the peer */
- if (args.phandle == 0) {
- sibling_phandle = data->root;
- args.sibling_phandle = device_to_external(sibling_phandle);
- }
- else if (phandle == NULL) {
- sibling_phandle = NULL;
- args.sibling_phandle = -1;
- }
- else {
- sibling_phandle = device_sibling(phandle);
- if (sibling_phandle == NULL)
- args.sibling_phandle = 0;
- else
- args.sibling_phandle = device_to_external(sibling_phandle);
- }
- /* write the arguments back out */
- TRACE(trace_os_emul, ("peer - out - sibling_phandle=0x%lx(0x%lx`%s')\n",
- (unsigned long)args.sibling_phandle,
- (unsigned long)sibling_phandle,
- (sibling_phandle == NULL ? "" : device_name(sibling_phandle))));
- chirp_write_h2t_args(&args,
- sizeof(args),
- data,
- processor, cia);
- return 0;
-}
-
-static int
-chirp_emul_child(os_emul_data *data,
- cpu *processor,
- unsigned_word cia)
-{
- struct child_args {
- /*in*/
- unsigned_cell phandle;
- /*out*/
- unsigned_cell child_phandle;
- } args;
- device *phandle;
- device *child_phandle;
- /* read the arguments in */
- if (chirp_read_t2h_args(&args, sizeof(args), 1, 1, data, processor, cia))
- return -1;
- phandle = external_to_device(data->root, args.phandle);
- TRACE(trace_os_emul, ("child - in - phandle=0x%lx(0x%lx`%s')\n",
- (unsigned long)args.phandle,
- (unsigned long)phandle,
- (phandle == NULL ? "" : device_name(phandle))));
- /* find a child */
- if (args.phandle == 0
- || phandle == NULL) {
- child_phandle = NULL;
- args.child_phandle = -1;
- }
- else {
- child_phandle = device_child(phandle);
- if (child_phandle == NULL)
- args.child_phandle = 0;
- else
- args.child_phandle = device_to_external(child_phandle);
- }
- /* write the result out */
- TRACE(trace_os_emul, ("child - out - child_phandle=0x%lx(0x%lx`%s')\n",
- (unsigned long)args.child_phandle,
- (unsigned long)child_phandle,
- (child_phandle == NULL ? "" : device_name(child_phandle))));
- chirp_write_h2t_args(&args,
- sizeof(args),
- data,
- processor, cia);
- return 0;
-}
-
-static int
-chirp_emul_parent(os_emul_data *data,
- cpu *processor,
- unsigned_word cia)
-{
- struct parent_args {
- /*in*/
- unsigned_cell phandle;
- /*out*/
- unsigned_cell parent_phandle;
- } args;
- device *phandle;
- device *parent_phandle;
- /* read the args in */
- if (chirp_read_t2h_args(&args, sizeof(args), 1, 1, data, processor, cia))
- return -1;
- phandle = external_to_device(data->root, args.phandle);
- TRACE(trace_os_emul, ("parent - in - phandle=0x%lx(0x%lx`%s')\n",
- (unsigned long)args.phandle,
- (unsigned long)phandle,
- (phandle == NULL ? "" : device_name(phandle))));
- /* find a parent */
- if (args.phandle == 0
- || phandle == NULL) {
- parent_phandle = NULL;
- args.parent_phandle = -1;
- }
- else {
- parent_phandle = device_parent(phandle);
- if (parent_phandle == NULL)
- args.parent_phandle = 0;
- else
- args.parent_phandle = device_to_external(parent_phandle);
- }
- /* return the result */
- TRACE(trace_os_emul, ("parent - out - parent_phandle=0x%lx(0x%lx`%s')\n",
- (unsigned long)args.parent_phandle,
- (unsigned long)parent_phandle,
- (parent_phandle == NULL ? "" : device_name(parent_phandle))));
- chirp_write_h2t_args(&args,
- sizeof(args),
- data,
- processor, cia);
- return 0;
-}
-
-static int
-chirp_emul_instance_to_package(os_emul_data *data,
- cpu *processor,
- unsigned_word cia)
-{
- struct instance_to_package_args {
- /*in*/
- unsigned_cell ihandle;
- /*out*/
- unsigned_cell phandle;
- } args;
- device_instance *ihandle;
- device *phandle = NULL;
- /* read the args in */
- if (chirp_read_t2h_args(&args, sizeof(args), 1, 1, data, processor, cia))
- return -1;
- ihandle = external_to_device_instance(data->root, args.ihandle);
- TRACE(trace_os_emul, ("instance-to-package - in - ihandle=0x%lx(0x%lx`%s')\n",
- (unsigned long)args.ihandle,
- (unsigned long)ihandle,
- ihandle_name(ihandle)));
- /* find the corresponding phandle */
- if (ihandle == NULL) {
- phandle = NULL;
- args.phandle = -1;
- }
- else {
- phandle = device_instance_device(ihandle);
- args.phandle = device_to_external(phandle);
- }
- /* return the result */
- TRACE(trace_os_emul, ("instance-to-package - out - phandle=0x%lx(0x%lx`%s')\n",
- (unsigned long)args.phandle,
- (unsigned long)phandle,
- (phandle == NULL ? "" : device_name(phandle))));
- chirp_write_h2t_args(&args,
- sizeof(args),
- data,
- processor, cia);
- return 0;
-}
-
-static int
-chirp_emul_getproplen(os_emul_data *data,
- cpu *processor,
- unsigned_word cia)
-{
- struct getproplen_args {
- /*in*/
- unsigned_cell phandle;
- unsigned_cell name;
- /*out*/
- unsigned_cell proplen;
- } args;
- char name[32];
- device *phandle;
- /* read the args in */
- if (chirp_read_t2h_args(&args, sizeof(args), 2, 1, data, processor, cia))
- return -1;
- phandle = external_to_device(data->root, args.phandle);
- emul_read_string(name,
- args.name,
- sizeof(name),
- processor, cia);
- TRACE(trace_os_emul, ("getproplen - in - phandle=0x%lx(0x%lx`%s') name=`%s'\n",
- (unsigned long)args.phandle,
- (unsigned long)phandle,
- (phandle == NULL ? "" : device_name(phandle)),
- name));
- /* find our prop and get its length */
- if (args.phandle == 0
- || phandle == NULL) {
- args.proplen = -1;
- }
- else {
- const device_property *prop = device_find_property(phandle, name);
- if (prop == (device_property*)0) {
- args.proplen = -1;
- }
- else {
- args.proplen = prop->sizeof_array;
- }
- }
- /* return the result */
- TRACE(trace_os_emul, ("getproplen - out - proplen=%ld\n",
- (unsigned long)args.proplen));
- chirp_write_h2t_args(&args,
- sizeof(args),
- data,
- processor, cia);
- return 0;
-}
-
-static int
-chirp_emul_getprop(os_emul_data *data,
- cpu *processor,
- unsigned_word cia)
-{
- struct getprop_args {
- /*in*/
- unsigned_cell phandle;
- unsigned_cell name;
- unsigned_cell buf;
- unsigned_cell buflen;
- /*out*/
- unsigned_cell size;
- } args;
- char name[32];
- device *phandle;
- /* read in the args, the return is optional */
- if (chirp_read_t2h_args(&args, sizeof(args), 4, -1, data, processor, cia))
- return -1;
- phandle = external_to_device(data->root, args.phandle);
- emul_read_string(name,
- args.name,
- sizeof(name),
- processor, cia);
- TRACE(trace_os_emul, ("getprop - in - phandle=0x%lx(0x%lx`%s') name=`%s' buf=0x%lx buflen=%ld\n",
- (unsigned long)args.phandle,
- (unsigned long)phandle,
- (phandle == NULL ? "" : device_name(phandle)),
- name,
- (unsigned long)args.buf,
- (unsigned long)args.buflen));
- /* get the property */
- if (args.phandle == 0
- || phandle == NULL) {
- args.size = -1;
- }
- else {
- const device_property *prop = device_find_property(phandle, name);
- if (prop == NULL) {
- args.size = -1;
- }
- else {
- int size = args.buflen;
- if (size > prop->sizeof_array)
- size = prop->sizeof_array;
- emul_write_buffer(prop->array, args.buf,
- size,
- processor, cia);
- args.size = size;
- switch (prop->type) {
- case string_property:
- TRACE(trace_os_emul, ("getprop - string `%s'\n",
- device_find_string_property(phandle, name)));
- break;
- case ihandle_property:
- TRACE(trace_os_emul, ("getprop - ihandle=0x%lx(0x%lx`%s')\n",
- BE2H_cell(*(unsigned_cell*)prop->array),
- (unsigned long)device_find_ihandle_property(phandle, name),
- ihandle_name(device_find_ihandle_property(phandle, name))));
- break;
- default:
- break;
- }
- }
- }
- /* write back the result */
- if (data->n_returns == 0)
- TRACE(trace_os_emul, ("getprop - out - size=%ld (not returned)\n",
- (unsigned long)args.size));
- else {
- TRACE(trace_os_emul, ("getprop - out - size=%ld\n",
- (unsigned long)args.size));
- chirp_write_h2t_args(&args,
- sizeof(args),
- data,
- processor, cia);
- }
- return 0;
-}
-
-static int
-chirp_emul_nextprop(os_emul_data *data,
- cpu *processor,
- unsigned_word cia)
-{
- struct nextprop_args {
- /*in*/
- unsigned_cell phandle;
- unsigned_cell previous;
- unsigned_cell buf;
- /*out*/
- unsigned_cell flag;
- } args;
- char previous[32];
- device *phandle;
- /* read in the args */
- if (chirp_read_t2h_args(&args, sizeof(args), 3, 1, data, processor, cia))
- return -1;
- phandle = external_to_device(data->root, args.phandle);
- emul_read_string(previous,
- args.previous,
- sizeof(previous),
- processor, cia);
- TRACE(trace_os_emul, ("nextprop - in - phandle=0x%lx(0x%lx`%s') previous=`%s' buf=0x%lx\n",
- (unsigned long)args.phandle,
- (unsigned long)phandle,
- (phandle == NULL ? "" : device_name(phandle)),
- previous,
- (unsigned long)args.buf));
- /* find the next property */
- if (args.phandle == 0
- || phandle == NULL) {
- args.flag = -1;
- }
- else {
- const device_property *prev_prop = device_find_property(phandle, previous);
- if (prev_prop == NULL) {
- args.flag = -1; /* name invalid */
- }
- else {
- const device_property *next_prop;
- next_prop = device_next_property(prev_prop);
- if (next_prop == NULL) {
- args.flag = 0; /* last property */
- }
- else {
- emul_write_buffer(next_prop->name, args.buf, strlen(next_prop->name),
- processor, cia);
- TRACE(trace_os_emul, ("nextprop - name=`%s'\n", next_prop->name));
- args.flag = 1; /* worked ok */
- }
- }
- }
- /* write back the result */
- TRACE(trace_os_emul, ("nextprop - out - flag=%ld\n",
- (unsigned long)args.flag));
- chirp_write_h2t_args(&args,
- sizeof(args),
- data,
- processor, cia);
- return 0;
-}
-
-#if 0
-static int
-chirp_emul_setprop(os_emul_data *data,
- cpu *processor,
- unsigned_word cia)
-{
- error("chirp: setprop method not implemented\n");
- return 0;
-}
-#endif
-
-static int
-chirp_emul_canon(os_emul_data *data,
- cpu *processor,
- unsigned_word cia)
-{
- struct canon_args {
- /*in*/
- unsigned_cell device_specifier;
- unsigned_cell buf;
- unsigned_cell buflen;
- /*out*/
- unsigned_cell length;
- } args;
- char device_specifier[1024];
- device *phandle;
- const char *path;
- int length;
- /* read in the args */
- if (chirp_read_t2h_args(&args, sizeof(args), 3, 1, data, processor, cia))
- return -1;
- emul_read_string(device_specifier,
- args.device_specifier,
- sizeof(device_specifier),
- processor, cia);
- TRACE(trace_os_emul, ("canon - in - device_specifier=`%s' buf=0x%lx buflen=%lx\n",
- device_specifier,
- (unsigned long)args.buf,
- (unsigned long)args.buflen));
- /* canon the name */
- phandle = tree_find_device(data->root, device_specifier);
- if (phandle == NULL) {
- length = -1;
- path = "";
- args.length = -1;
- }
- else {
- path = device_path(phandle);
- length = strlen(path);
- if (length >= args.buflen)
- length = args.buflen - 1;
- emul_write_buffer(path, args.buf, length,
- processor, cia);
- args.length = length;
- }
- /* write back the result */
- TRACE(trace_os_emul, ("canon - out - length=%ld buf=`%s'\n",
- (unsigned long)args.length,
- path));
- chirp_write_h2t_args(&args,
- sizeof(args),
- data,
- processor, cia);
- return 0;
-}
-
-static int
-chirp_emul_finddevice(os_emul_data *data,
- cpu *processor,
- unsigned_word cia)
-{
- struct finddevice_args {
- /*in*/
- unsigned_cell device_specifier;
- /*out*/
- unsigned_cell phandle;
- } args;
- char device_specifier[1024];
- device *phandle;
- /* get the args */
- if (chirp_read_t2h_args(&args, sizeof(args), 1, 1, data, processor, cia))
- return -1;
- emul_read_string(device_specifier,
- args.device_specifier,
- sizeof(device_specifier),
- processor, cia);
- TRACE(trace_os_emul, ("finddevice - in - device_specifier=`%s'\n",
- device_specifier));
- /* find the device */
- phandle = tree_find_device(data->root, device_specifier);
- if (phandle == NULL)
- args.phandle = -1;
- else
- args.phandle = device_to_external(phandle);
- /* return its phandle */
- TRACE(trace_os_emul, ("finddevice - out - phandle=0x%lx(0x%lx`%s')\n",
- (unsigned long)args.phandle,
- (unsigned long)phandle,
- (phandle == NULL ? "" : device_name(phandle))));
- chirp_write_h2t_args(&args,
- sizeof(args),
- data,
- processor, cia);
- return 0;
-}
-
-static int
-chirp_emul_instance_to_path(os_emul_data *data,
- cpu *processor,
- unsigned_word cia)
-{
- struct instance_to_path_args {
- /*in*/
- unsigned_cell ihandle;
- unsigned_cell buf;
- unsigned_cell buflen;
- /*out*/
- unsigned_cell length;
- } args;
- device_instance *ihandle;
- const char *path;
- int length;
- /* get the args */
- if (chirp_read_t2h_args(&args, sizeof(args), 3, 1, data, processor, cia))
- return -1;
- ihandle = external_to_device_instance(data->root, args.ihandle);
- TRACE(trace_os_emul, ("instance-to-path - in - ihandle=0x%lx(0x%lx`%s') buf=0x%lx buflen=%ld\n",
- (unsigned long)args.ihandle,
- (unsigned long)ihandle,
- ihandle_name(ihandle),
- (unsigned long)args.buf,
- (unsigned long)args.buflen));
- /* get the devices name */
- if (ihandle == NULL) {
- args.length = -1;
- path = "(null)";
- }
- else {
- path = device_instance_path(ihandle);
- length = strlen(path);
- if (length >= args.buflen)
- length = args.buflen - 1;
- emul_write_buffer(path, args.buf, length,
- processor, cia);
- args.length = length;
- }
- /* return its phandle */
- TRACE(trace_os_emul, ("instance-to-path - out - length=%ld buf=`%s')\n",
- (unsigned long)args.length,
- path));
- chirp_write_h2t_args(&args,
- sizeof(args),
- data,
- processor, cia);
- return 0;
-}
-
-static int
-chirp_emul_package_to_path(os_emul_data *data,
- cpu *processor,
- unsigned_word cia)
-{
- struct package_to_path_args {
- /*in*/
- unsigned_cell phandle;
- unsigned_cell buf;
- unsigned_cell buflen;
- /*out*/
- unsigned_cell length;
- } args;
- device *phandle;
- const char *path;
- /* get the args */
- if (chirp_read_t2h_args(&args, sizeof(args), 3, 1, data, processor, cia))
- return -1;
- phandle = external_to_device(data->root, args.phandle);
- TRACE(trace_os_emul, ("package-to-path - in - phandle=0x%lx(0x%lx`%s') buf=0x%lx buflen=%ld\n",
- (unsigned long)args.phandle,
- (unsigned long)phandle,
- (phandle == NULL ? "" : device_name(phandle)),
- (unsigned long)args.buf,
- (unsigned long)args.buflen));
- /* get the devices name */
- if (phandle == NULL) {
- args.length = -1;
- path = "(null)";
- }
- else {
- int length;
- path = device_path(phandle);
- length = strlen(path);
- if (length >= args.buflen)
- length = args.buflen - 1;
- emul_write_buffer(path, args.buf, length,
- processor, cia);
- args.length = length;
- }
- /* return its phandle */
- TRACE(trace_os_emul, ("package-to-path - out - length=%ld buf=`%s')\n",
- (unsigned long)args.length,
- path));
- chirp_write_h2t_args(&args,
- sizeof(args),
- data,
- processor, cia);
- return 0;
-}
-
-static int
-chirp_emul_call_method(os_emul_data *data,
- cpu *processor,
- unsigned_word cia)
-{
- struct call_method_args {
- /*in*/
- unsigned_cell method;
- unsigned_cell ihandle;
- /*in/out*/
- unsigned_cell stack[13]; /*6in + 6out + catch */
- } args;
- char method[32];
- device_instance *ihandle;
- /* some useful info about our mini stack */
- int n_stack_args;
- int n_stack_returns;
- int stack_catch_result;
- int stack_returns;
- /* read the args */
- if (chirp_read_t2h_args(&args, sizeof(args), -1, -1, data, processor, cia))
- return -1;
- emul_read_string(method,
- args.method,
- sizeof(method),
- processor, cia);
- ihandle = external_to_device_instance(data->root, args.ihandle);
- n_stack_args = data->n_args - 2;
- n_stack_returns = data->n_returns - 1;
- stack_catch_result = n_stack_args;
- stack_returns = stack_catch_result + 1;
- TRACE(trace_os_emul, ("call-method - in - n_args=%ld n_returns=%ld method=`%s' ihandle=0x%lx(0x%lx`%s')\n",
- (unsigned long)data->n_args,
- (unsigned long)data->n_returns,
- method,
- (unsigned long)args.ihandle,
- (unsigned long)ihandle,
- ihandle_name(ihandle)));
- /* see if we can emulate this method */
- if (ihandle == NULL) {
- /* OpenFirmware doesn't define this error */
- error("chirp: invalid ihandle passed to call-method method");
- }
- else {
- args.stack[stack_catch_result] =
- device_instance_call_method(ihandle,
- method,
- n_stack_args,
- &args.stack[0],
- n_stack_returns,
- &args.stack[stack_returns]);
- }
- /* finished */
- TRACE(trace_os_emul, ("call-method - out - catch-result=%ld\n",
- (unsigned long)args.stack[stack_catch_result]));
- chirp_write_h2t_args(&args,
- sizeof(args),
- data,
- processor, cia);
- return 0;
-}
-
-
-/* Device I/O */
-
-static int
-chirp_emul_open(os_emul_data *data,
- cpu *processor,
- unsigned_word cia)
-{
- struct open_args {
- /*in*/
- unsigned_cell device_specifier;
- /*out*/
- unsigned_cell ihandle;
- } args;
- char device_specifier[1024];
- device_instance *ihandle;
- /* read the args */
- if (chirp_read_t2h_args(&args, sizeof(args), 1, 1, data, processor, cia))
- return -1;
- emul_read_string(device_specifier,
- args.device_specifier,
- sizeof(device_specifier),
- processor, cia);
- TRACE(trace_os_emul, ("open - in - device_specifier=`%s'\n",
- device_specifier));
- /* open the device */
- ihandle = tree_instance(data->root, device_specifier);
- if (ihandle == NULL)
- args.ihandle = -1;
- else
- args.ihandle = device_instance_to_external(ihandle);
- /* return the ihandle result */
- TRACE(trace_os_emul, ("open - out - ihandle=0x%lx(0x%lx`%s')\n",
- (unsigned long)args.ihandle,
- (unsigned long)ihandle,
- ihandle_name(ihandle)));
- chirp_write_h2t_args(&args,
- sizeof(args),
- data,
- processor, cia);
- return 0;
-}
-
-static int
-chirp_emul_close(os_emul_data *data,
- cpu *processor,
- unsigned_word cia)
-{
- struct close_args {
- /*in*/
- unsigned_cell ihandle;
- /*out*/
- } args;
- device_instance *ihandle;
- /* read the args */
- if (chirp_read_t2h_args(&args, sizeof(args), 1, 0, data, processor, cia))
- return -1;
- ihandle = external_to_device_instance(data->root, args.ihandle);
- TRACE(trace_os_emul, ("close - in - ihandle=0x%lx(0x%lx`%s')\n",
- (unsigned long)args.ihandle,
- (unsigned long)ihandle,
- ihandle_name(ihandle)));
- /* close the device */
- if (ihandle == NULL) {
- /* OpenFirmware doesn't define this error */
- error("chirp: invalid ihandle passed to close method");
- }
- else {
- device_instance_delete(ihandle);
- }
- /* return the ihandle result */
- TRACE(trace_os_emul, ("close - out\n"));
- chirp_write_h2t_args(&args,
- sizeof(args),
- data,
- processor, cia);
- return 0;
-}
-
-static int
-chirp_emul_read(os_emul_data *data,
- cpu *processor,
- unsigned_word cia)
-{
- struct read_args {
- /*in*/
- unsigned_cell ihandle;
- unsigned_cell addr;
- unsigned_cell len;
- /*out*/
- unsigned_cell actual;
- } args;
- char buf[1024];
- device_instance *ihandle;
- /* read the args */
- if (chirp_read_t2h_args(&args, sizeof(args), 3, 1, data, processor, cia))
- return -1;
- ihandle = external_to_device_instance(data->root, args.ihandle);
- TRACE(trace_os_emul, ("read - in - ihandle=0x%lx(0x%lx`%s') addr=0x%lx len=%ld\n",
- (unsigned long)args.ihandle,
- (unsigned long)ihandle,
- ihandle_name(ihandle),
- (unsigned long)args.addr,
- (unsigned long)args.len));
- if (ihandle == NULL) {
- /* OpenFirmware doesn't define this error */
- error("chirp: invalid ihandle passed to read method");
- }
- else {
- /* do the reads */
- int actual = 0;
- while (actual < args.len) {
- int remaining = args.len - actual;
- int to_read = (remaining <= sizeof(buf) ? remaining : sizeof(buf));
- int nr_read = device_instance_read(ihandle, buf, to_read);
- if (nr_read < 0) {
- actual = nr_read; /* the error */
- break;
- }
- else if (nr_read == 0) {
- break;
- }
- emul_write_buffer(buf,
- args.addr + actual,
- nr_read,
- processor, cia);
- actual += nr_read;
- }
- if (actual >= 0) {
- args.actual = actual;
- if (actual < sizeof(buf))
- buf[actual] = '\0';
- else
- buf[sizeof(buf) - 1] = '\0';
- }
- else {
- switch (actual) {
- case sim_io_eof:
- args.actual = 0;
- break;
- case sim_io_not_ready:
- ASSERT(sim_io_not_ready == -2);
- args.actual = sim_io_not_ready;
- break;
- default:
- error("Bad error value %ld", (long)actual);
- break;
- }
- }
- }
- /* return the result */
- TRACE(trace_os_emul, ("read - out - actual=%ld `%s'\n",
- (long)args.actual,
- ((args.actual > 0 && args.actual < sizeof(buf)) ? buf : "")
- ));
- chirp_write_h2t_args(&args,
- sizeof(args),
- data,
- processor, cia);
- return 0;
-}
-
-static int
-chirp_emul_write(os_emul_data *data,
- cpu *processor,
- unsigned_word cia)
-{
- struct write_args {
- /*in*/
- unsigned_cell ihandle;
- unsigned_cell addr;
- unsigned_cell len;
- /*out*/
- unsigned_cell actual;
- } args;
- char buf[1024];
- device_instance *ihandle;
- int actual;
- /* get the args */
- if (chirp_read_t2h_args(&args, sizeof(args), 3, 1, data, processor, cia))
- return -1;
- actual = args.len;
- if (actual >= sizeof(buf))
- actual = sizeof(buf) - 1;
- emul_read_buffer(buf,
- args.addr,
- actual,
- processor, cia);
- buf[actual] = '\0';
- ihandle = external_to_device_instance(data->root, args.ihandle);
- TRACE(trace_os_emul, ("write - in - ihandle=0x%lx(0x%lx`%s') `%s' (%ld)\n",
- (unsigned long)args.ihandle,
- (unsigned long)ihandle,
- ihandle_name(ihandle),
- buf, (long)actual));
- if (ihandle == NULL) {
- /* OpenFirmware doesn't define this error */
- error("chirp: invalid ihandle passed to write method");
- }
- else {
- /* write it out */
- actual = device_instance_write(ihandle, buf, actual);
- if (actual < 0)
- args.actual = 0;
- else
- args.actual = actual;
- }
- /* return the result */
- TRACE(trace_os_emul, ("write - out - actual=%ld\n",
- (long)args.actual));
- chirp_write_h2t_args(&args,
- sizeof(args),
- data,
- processor, cia);
- return 0;
-}
-
-static int
-chirp_emul_seek(os_emul_data *data,
- cpu *processor,
- unsigned_word cia)
-{
- struct seek_args {
- /*in*/
- unsigned_cell ihandle;
- unsigned_cell pos_hi;
- unsigned_cell pos_lo;
- /*out*/
- unsigned_cell status;
- } args;
- int status;
- device_instance *ihandle;
- /* get the args */
- if (chirp_read_t2h_args(&args, sizeof(args), 3, 1, data, processor, cia))
- return -1;
- ihandle = external_to_device_instance(data->root, args.ihandle);
- TRACE(trace_os_emul, ("seek - in - ihandle=0x%lx(0x%lx`%s') pos.hi=0x%lx pos.lo=0x%lx\n",
- (unsigned long)args.ihandle,
- (unsigned long)ihandle,
- ihandle_name(ihandle),
- args.pos_hi, args.pos_lo));
- if (ihandle == NULL) {
- /* OpenFirmware doesn't define this error */
- error("chirp: invalid ihandle passed to seek method");
- }
- else {
- /* seek it out */
- status = device_instance_seek(ihandle, args.pos_hi, args.pos_lo);
- args.status = status;
- }
- /* return the result */
- TRACE(trace_os_emul, ("seek - out - status=%ld\n",
- (long)args.status));
- chirp_write_h2t_args(&args,
- sizeof(args),
- data,
- processor, cia);
- return 0;
-}
-
-
-/* memory */
-
-static int
-chirp_emul_claim(os_emul_data *data,
- cpu *processor,
- unsigned_word cia)
-{
- /* NOTE: the client interface claim routine is *very* different to
- the "claim" method described in IEEE-1275 appendix A. The latter
- uses real addresses while this uses virtual (effective)
- addresses. */
- struct claim_args {
- /* in */
- unsigned_cell virt;
- unsigned_cell size;
- unsigned_cell align;
- /* out */
- unsigned_cell baseaddr;
- } args;
- /* read the args */
- if (chirp_read_t2h_args(&args, sizeof(args),
- 3 /*n_args*/, 1 /*n_returns*/,
- data, processor, cia))
- return -1;
- TRACE(trace_os_emul, ("claim - in - virt=0x%lx size=%ld align=%d\n",
- (unsigned long)args.virt,
- (long int)args.size,
- (int)args.align));
- /* use the memory device to allocate (real) memory at the requested
- address */
- {
- device_instance *memory = tree_find_ihandle_property(data->root, "/chosen/memory");
- unsigned_cell mem_in[3];
- unsigned_cell mem_out[1];
- mem_in[0] = args.align; /*top-of-stack*/
- mem_in[1] = args.size;
- mem_in[2] = args.virt;
- if (device_instance_call_method(memory, "claim",
- 3, mem_in, 1, mem_out) < 0)
- error("chirp: claim failed to allocate memory virt=0x%lx size=%ld align=%d",
- (unsigned long)args.virt,
- (long int)args.size,
- (int)args.align);
- args.baseaddr = mem_out[0];
- }
- /* if using virtual addresses, create a 1-1 map of this address space */
- if (!data->real_mode) {
- error("chirp: claim method does not support virtual mode");
- }
- /* return the base address */
- TRACE(trace_os_emul, ("claim - out - baseaddr=0x%lx\n",
- (unsigned long)args.baseaddr));
- chirp_write_h2t_args(&args,
- sizeof(args),
- data,
- processor, cia);
- return 0;
-}
-
-static int
-chirp_emul_release(os_emul_data *data,
- cpu *processor,
- unsigned_word cia)
-{
- /* NOTE: the client interface release routine is *very* different to
- the "claim" method described in IEEE-1275 appendix A. The latter
- uses real addresses while this uses virtual (effective)
- addresses. */
- struct claim_args {
- /* in */
- unsigned_cell virt;
- unsigned_cell size;
- /* out */
- } args;
- /* read the args */
- if (chirp_read_t2h_args(&args, sizeof(args),
- 2 /*n_args*/, 0 /*n_returns*/,
- data, processor, cia))
- return -1;
- TRACE(trace_os_emul, ("release - in - virt=0x%lx size=%ld\n",
- (unsigned long)args.virt,
- (long int)args.size));
- /* use the memory device to release (real) memory at the requested
- address */
- {
- device_instance *memory = tree_find_ihandle_property(data->root, "/chosen/memory");
- unsigned_cell mem_in[2];
- mem_in[0] = args.size;
- mem_in[1] = args.virt;
- if (device_instance_call_method(memory, "release",
- 2, mem_in, 0, NULL) < 0)
- error("chirp: claim failed to release memory virt=0x%lx size=%ld",
- (unsigned long)args.virt,
- (long int)args.size);
- }
- /* if using virtual addresses, remove the 1-1 map of this address space */
- if (!data->real_mode) {
- error("chirp: release method does not support virtual mode");
- }
- /* return the base address */
- TRACE(trace_os_emul, ("release - out\n"));
- chirp_write_h2t_args(&args,
- sizeof(args),
- data,
- processor, cia);
- return 0;
-}
-
-
-/* Control transfer */
-
-static int
-chirp_emul_boot(os_emul_data *data,
- cpu *processor,
- unsigned_word cia)
-{
- /* unlike OpenFirmware this one can take an argument */
- struct boot_args {
- /*in*/
- unsigned_cell bootspec;
- /*out*/
- } args;
- char bootspec[1024];
- /* read in the arguments */
- if (chirp_read_t2h_args(&args, sizeof(args), -1, 0, data, processor, cia))
- cpu_halt(processor, cia, was_exited, -1);
- if (args.bootspec != 0)
- emul_read_string(bootspec, args.bootspec, sizeof(bootspec),
- processor, cia);
- else
- strcpy(bootspec, "(null)");
- TRACE(trace_os_emul, ("boot - in bootspec=`%s'\n", bootspec));
- /* just report this and exit */
- printf_filtered("chrp: boot %s called, exiting.\n", bootspec);
- cpu_halt(processor, cia, was_exited, 0);
- return 0;
-}
-
-static int
-chirp_emul_enter(os_emul_data *data,
- cpu *processor,
- unsigned_word cia)
-{
- error("chirp: enter method not implemented\n");
- return 0;
-}
-
-static int
-chirp_emul_exit(os_emul_data *data,
- cpu *processor,
- unsigned_word cia)
-{
- /* unlike OpenBoot this one can take an argument */
- struct exit_args {
- /*in*/
- signed_cell status;
- /*out*/
- } args;
- if (chirp_read_t2h_args(&args, sizeof(args), -1, 0, data, processor, cia))
- cpu_halt(processor, cia, was_exited, -1);
- cpu_halt(processor, cia, was_exited, args.status);
- return 0;
-}
-
-static int
-chirp_emul_chain(os_emul_data *data,
- cpu *processor,
- unsigned_word cia)
-{
- error("chirp: chain method not implemented\n");
- return 0;
-}
-
-
-/* user interface */
-
-static int
-chirp_emul_interpret(os_emul_data *data,
- cpu *processor,
- unsigned_word cia)
-{
- error("chirp: interpret method not implemented\n");
- return 0;
-}
-
-static int
-chirp_emul_set_callback(os_emul_data *data,
- cpu *processor,
- unsigned_word cia)
-{
- error("chirp: set_callback method not implemented\n");
- return 0;
-}
-
-static int
-chirp_emul_set_symbol_lookup(os_emul_data *data,
- cpu *processor,
- unsigned_word cia)
-{
- error("chirp: set_symbol_lookup method not implemented\n");
- return 0;
-}
-
-
-/* Time */
-
-static int
-chirp_emul_milliseconds(os_emul_data *data,
- cpu *processor,
- unsigned_word cia)
-{
- struct test_args {
- /*in*/
- /*out*/
- unsigned_cell ms;
- } args;
- unsigned64 time;
- /* read in the arguments */
- if (chirp_read_t2h_args(&args, sizeof(args), 1, 1, data, processor, cia))
- return -1;
- /* make up a number */
- time = event_queue_time(psim_event_queue(cpu_system(processor))) / 1000000;
- args.ms = time;
- /* write the arguments back out */
- TRACE(trace_os_emul, ("milliseconds - out - ms=%ld\n",
- (unsigned long)args.ms));
- chirp_write_h2t_args(&args,
- sizeof(args),
- data,
- processor, cia);
- return 0;
-}
-
-
-
-
-static chirp_services services[] = {
-
- /* client interface */
- { "test", chirp_emul_test },
-
- /* device tree */
- { "peer", chirp_emul_peer },
- { "child", chirp_emul_child },
- { "parent", chirp_emul_parent },
- { "instance-to-package", chirp_emul_instance_to_package },
- { "getproplen", chirp_emul_getproplen },
- { "getprop", chirp_emul_getprop },
- { "nextprop", chirp_emul_nextprop },
- /* { "setprop", chirp_emul_setprop }, */
- { "canon", chirp_emul_canon },
- { "finddevice", chirp_emul_finddevice },
- { "instance-to-path", chirp_emul_instance_to_path },
- { "package-to-path", chirp_emul_package_to_path },
- { "call-method", chirp_emul_call_method },
-
- /* device I/O */
- { "open", chirp_emul_open },
- { "close", chirp_emul_close },
- { "read", chirp_emul_read },
- { "write", chirp_emul_write },
- { "seek", chirp_emul_seek },
- { "write", chirp_emul_write },
-
- /* memory */
- { "claim", chirp_emul_claim },
- { "release", chirp_emul_release },
-
- /* control transfer */
- { "boot", chirp_emul_boot },
- { "enter", chirp_emul_enter },
- { "exit", chirp_emul_exit },
- { "chain", chirp_emul_chain },
-
- /* user interface */
- { "interpret", chirp_emul_interpret },
- { "set_callback", chirp_emul_set_callback },
- { "set_symbol_lookup", chirp_emul_set_symbol_lookup },
-
- /* time */
- { "milliseconds", chirp_emul_milliseconds },
-
- { 0, /* sentinal */ },
-};
-
-
-/* main handlers */
-
-/* Any starting address greater than this is assumed to be an Chirp
- rather than VEA */
-
-#ifndef CHIRP_START_ADDRESS
-#define CHIRP_START_ADDRESS 0x80000000
-#endif
-#ifndef CHIRP_LOAD_BASE
-#define CHIRP_LOAD_BASE -1
-#endif
-
-
-typedef struct _chirp_note_desc {
- signed32 real_mode;
- signed32 real_base;
- signed32 real_size;
- signed32 virt_base;
- signed32 virt_size;
- signed32 load_base;
-} chirp_note_desc;
-
-typedef enum {
- note_missing,
- note_found,
- note_correct,
-} note_found_status;
-typedef struct _chirp_note {
- chirp_note_desc desc;
- note_found_status found;
-} chirp_note;
-
-typedef struct _chirp_note_head {
- unsigned32 namesz;
- unsigned32 descsz;
- unsigned32 type;
-} chirp_note_head;
-
-static void
-map_over_chirp_note(bfd *image,
- asection *sect,
- PTR obj)
-{
- chirp_note *note = (chirp_note*)obj;
- if (strcmp(sect->name, ".note") == 0) {
- chirp_note_head head;
- char name[16];
- /* check the head */
- if (!bfd_get_section_contents(image, sect,
- &head, 0, sizeof(head)))
- return;
- head.namesz = bfd_get_32(image, (void*)&head.namesz);
- head.descsz = bfd_get_32(image, (void*)&head.descsz);
- head.type = bfd_get_32(image, (void*)&head.type);
- if (head.type != 0x1275)
- return;
- /* check the name field */
- if (head.namesz > sizeof(name)) {
- error("chirp: note name too long (%d > %d)\n", (int)head.namesz, sizeof(name));
- }
- if (!bfd_get_section_contents(image, sect,
- name, sizeof(head), head.namesz)) {
- error("chirp: note name unreadable\n");
- }
- if (strcmp(name, "PowerPC") != 0) {
- printf_filtered("chirp: note name (%s) not `PowerPC'\n", name);
- }
- /* check the size */
- if (head.descsz == sizeof(note->desc) - sizeof(signed32)) {
- sim_io_printf_filtered("chirp: note descriptor missing load-base\n");
- }
- else if (head.descsz != sizeof(note->desc)) {
- sim_io_printf_filtered("chirp: note descriptor of wrong size\n");
- note->found = note_found;
- return;
- }
- note->found = note_correct;
- /* get the contents */
- if (!bfd_get_section_contents(image, sect,
- &note->desc, /* page align start */
- ((sizeof(head) + head.namesz) + 3) & ~3,
- head.descsz)) {
- error("chirp: note descriptor unreadable\n");
- }
- note->desc.real_mode = bfd_get_32(image, (void*)&note->desc.real_mode);
- note->desc.real_base = bfd_get_32(image, (void*)&note->desc.real_base);
- note->desc.real_size = bfd_get_32(image, (void*)&note->desc.real_size);
- note->desc.virt_base = bfd_get_32(image, (void*)&note->desc.virt_base);
- note->desc.virt_size = bfd_get_32(image, (void*)&note->desc.virt_size);
- if (head.descsz == sizeof(note->desc))
- note->desc.load_base = bfd_get_32(image, (void*)&note->desc.load_base);
- else
- note->desc.load_base = CHIRP_LOAD_BASE;
- }
-}
-
-
-static os_emul_data *
-emul_chirp_create(device *root,
- bfd *image,
- const char *name)
-{
- os_emul_data *chirp;
- device *node;
- chirp_note note;
- int i;
-
- /* Sanity check that this really is the chosen emulation */
- if (name == NULL && image == NULL)
- return NULL;
- if (name != NULL
- && strcmp(name, "ob") != 0
- && strcmp(name, "ieee1274") != 0
- && strcmp(name, "chrp") != 0
- && strcmp(name, "chirp") != 0
- && strcmp(name, "openboot") != 0)
- return NULL;
-
- /* look for an elf note section, enter its values into the device tree */
- memset(&note, 0, sizeof(note));
- if (image != NULL)
- bfd_map_over_sections(image, map_over_chirp_note, &note);
- if (name == NULL && image != NULL && note.found == note_missing)
- return NULL;
-
- /* Assume that it is a chirp emulation */
-
- chirp = ZALLOC(os_emul_data);
- chirp->root = root;
- chirp->services = services;
-
- /* the root node */
- tree_parse(root, "/name \"gpl,clayton");
-
- /* default options */
- emul_add_tree_options(root, image, "chirp", "oea",
- 0 /*oea-interrupt-prefix*/);
-
- /* hardware */
- emul_add_tree_hardware(root);
-
- /* basic information */
- chirp->memory_size
- = tree_find_integer_property(root, "/openprom/options/oea-memory-size");
- chirp->little_endian
- = tree_find_boolean_property(root, "/options/little-endian?");
- chirp->floating_point_available
- = tree_find_boolean_property(root, "/openprom/options/floating-point?");
- chirp->interrupt_prefix =
- tree_find_integer_property(root, "/openprom/options/oea-interrupt-prefix");
-
-
- /* Perform an interum layout of the openboot firmware in memory */
-
-
- /* a page for firmware calls */
- chirp->sizeof_code = 4096;
- chirp->code_offset = 0x4000; /* possible space for interrupt table */
-
- /* the stack */
- chirp->sizeof_stack = 32 * 1024;
- chirp->stack_offset = chirp->code_offset + chirp->sizeof_code;
-
- /* the hash table */
- if (!note.desc.real_mode) {
- chirp->nr_page_table_entry_groups = (chirp->memory_size < 0x800000
- ? 1024 /* min allowed */
- : (chirp->memory_size / 4096 / 2));
- chirp->sizeof_htab = chirp->nr_page_table_entry_groups * 64;
- }
- chirp->htab_offset = chirp->stack_offset + chirp->sizeof_stack;
-
- /* the actual amount of space needed */
- chirp->real_size = chirp->htab_offset + chirp->sizeof_htab;
-
-
- /* now go through and see if it fits in what is available */
-
-
- /* resolve real-mode? */
- if (note.found == note_correct)
- chirp->real_mode = note.desc.real_mode;
- else if (tree_find_property(root, "/options/real-mode?") != NULL)
- chirp->real_mode = tree_find_boolean_property(root, "/options/real-mode?");
- else
- chirp->real_mode = 0;
- if (tree_find_property(root, "/options/real-mode?") != NULL) {
- if (!chirp->real_mode
- != !tree_find_boolean_property(root, "/options/real-mode?"))
- error("chirp: /options/real-mode? conflicts with note section\n");
- }
- else
- tree_parse(root, "/options/real-mode? %s",
- chirp->real_mode ? "true" : "false");
-
- /* resolve real-base */
- if (note.found == note_correct
- && note.desc.real_base != (signed32)-1)
- chirp->real_base = note.desc.real_base;
- else if (tree_find_property(root, "/options/real-base") != NULL)
- chirp->real_base = tree_find_integer_property(root, "/options/real-base");
- else
- chirp->real_base = chirp->memory_size - chirp->real_size;
- if (tree_find_property(root, "/options/real-base") != NULL) {
- if (chirp->real_base != tree_find_integer_property(root, "/options/real-base"))
- error("chirp: /options/real-base conflicts with note section\n");
- }
- else
- tree_parse(root, "/options/real-base 0x%lx",
- (unsigned long)chirp->real_base);
-
- /* resolve real-size */
- if (note.found == note_correct
- && note.desc.real_size != (signed32)-1
- && note.desc.real_size != 0
- && chirp->real_size > note.desc.real_size)
- error("chirp: insufficient physical memory for firmware\n");
- if (tree_find_property(root, "/options/real-size") != NULL) {
- if (chirp->real_size > tree_find_integer_property(root, "/options/real-size"))
- error("chirp: /options/real-size conflicts with note section\n");
- }
- else
- tree_parse(root, "/options/real-size 0x%lx",
- (unsigned long)chirp->real_size);
-
- /* resolve virt-base */
- if (chirp->real_mode)
- chirp->virt_base = chirp->real_base;
- else if (note.found == note_correct && note.desc.virt_base != -1)
- chirp->virt_base = note.desc.virt_base;
- else if (tree_find_property(root, "/options/virt-base") != NULL)
- chirp->virt_base = tree_find_integer_property(root, "/options/virt-base");
- else
- chirp->virt_base = CHIRP_START_ADDRESS;
- if (tree_find_property(root, "/options/virt-base") != NULL) {
- unsigned_word virt_base = tree_find_integer_property(root, "/options/virt-base");
- if (virt_base != -1 && chirp->virt_base != virt_base)
- error("chirp: /options/virt-base conflicts with note section\n");
- }
- else
- tree_parse(root, "/options/virt-base 0x%lx",
- chirp->real_mode ? -1 : (unsigned long)chirp->virt_base);
-
- /* resolve virt-size */
- chirp->virt_size = chirp->real_size;
- if (note.found == note_correct
- && note.desc.virt_size != (signed32)-1
- && note.desc.virt_size != 0
- && !chirp->real_mode
- && chirp->virt_size > note.desc.virt_size)
- error("chirp: insufficent virtual memory for firmware\n");
- if (tree_find_property(root, "/options/virt-size") != NULL) {
- if (chirp->virt_size > tree_find_integer_property(root, "/options/virt-size"))
- error("chirp: /options/virt-size conflicts with note section\n");
- }
- else
- tree_parse(root, "/options/virt-size 0x%lx",
- chirp->real_mode ? -1 : (unsigned long)chirp->virt_size);
-
- /* resolve load-base */
- if (note.found == note_correct
- && note.desc.load_base != (signed32)-1)
- chirp->load_base = note.desc.load_base;
- else if (tree_find_property(root, "/options/load-base") != NULL)
- chirp->load_base = tree_find_integer_property(root, "/options/load-base");
- else
- chirp->load_base = CHIRP_LOAD_BASE;
- if (tree_find_property(root, "/options/load-base") != NULL) {
- if (chirp->load_base != tree_find_integer_property(root, "/options/load-base"))
- error("chirp: /options/load-base conflicts with note section\n");
- }
- else
- tree_parse(root, "/options/load-base 0x%lx",
- (unsigned long)chirp->load_base);
-
- /* now adjust the preliminary firmware addresses to final values */
- chirp->code_ra = chirp->code_offset + chirp->real_base;
- chirp->stack_ra = chirp->stack_offset + chirp->real_base;
- chirp->htab_ra = chirp->htab_offset + chirp->real_base;
-
- /* the virtual addresses. In real mode these are real addresses. */
-
- chirp->code_va = chirp->code_offset + chirp->virt_base;
- chirp->stack_va = chirp->stack_offset + chirp->virt_base;
- chirp->htab_va = chirp->htab_offset + chirp->virt_base;
-
- chirp->code_client_va = chirp->code_va;
- chirp->code_client_ra = chirp->code_ra;
-
- chirp->code_callback_va = chirp->code_client_va + 16;
- chirp->code_callback_ra = chirp->code_client_ra + 16;
-
- chirp->code_loop_va = chirp->code_callback_va + 16;
- chirp->code_loop_ra = chirp->code_callback_ra + 16;
-
- /* initialization */
-
- tree_parse(root, "/openprom/init");
- tree_parse(root, "/openprom/init/register");
- tree_parse(root, "/openprom/init/register/0.pc 0x%lx",
- (unsigned long)bfd_get_start_address(image));
- tree_parse(root, "/openprom/init/register/pc 0x%lx",
- (unsigned long)chirp->code_loop_va);
- tree_parse(root, "/openprom/init/register/msr 0x%x",
- (msr_machine_check_enable
- | (chirp->real_mode
- ? 0
- : (msr_instruction_relocate
- | msr_data_relocate))
- | (chirp->little_endian
- ? (msr_little_endian_mode
- | msr_interrupt_little_endian_mode)
- : 0)
- | (chirp->floating_point_available
- ? msr_floating_point_available
- : 0)
- | (chirp->interrupt_prefix
- ? msr_interrupt_prefix
- : 0)
- ));
- tree_parse(root, "/openprom/init/register/sdr1 0x%lx",
- (unsigned long)(chirp->htab_ra
- | MASK32(16, 22)
- | ((chirp->sizeof_htab - 1) >> 16)));
- /* make certain that the segment registers map straight through */
- for (i = 0; i < 16; i++) {
- tree_parse(root, "/openprom/init/register/sr%d 0x%lx",
- i, (unsigned long)i);
- }
-
- /* establish an initial state for all processors */
-
-
- /* the client interface address */
- tree_parse(root, "/openprom/init/register/r5 0x%lx",
- (unsigned long)chirp->code_client_va);
- /* a stack */
- tree_parse(root, "/openprom/init/register/sp 0x%lx",
- (unsigned long)(chirp->stack_va + chirp->sizeof_stack - 16));
- /* in chrp mode any arguments end up being concatinated */
- tree_parse(root, "/openprom/init/stack/stack-type chirp");
-
-
- /* client interface - emul-call followed by return instruction */
-
-
- node = tree_parse(root, "/openprom/init/data@0x%lx",
- (unsigned long)chirp->code_client_ra);
- tree_parse(node, "./psim,description \"client-interface instruction");
- tree_parse(node, "./real-address 0x%lx",
- (unsigned long)chirp->code_client_ra);
- tree_parse(node, "./data 0x%lx",
- (unsigned long)emul_call_instruction);
-
- node = tree_parse(root, "/openprom/init/data@0x%lx",
- (unsigned long)(chirp->code_client_ra + 4));
- tree_parse(node, "./psim,description \"client-interface return instruction");
- tree_parse(node, "./real-address 0x%lx",
- (unsigned long)(chirp->code_client_ra + 4));
- tree_parse(node, "./data 0x%lx",
- (unsigned long)emul_blr_instruction);
-
-
- /* return address for client callbacks - an emul-call instruction
- that is again followed by a return instruction */
-
-
- node = tree_parse(root, "/openprom/init/data@0x%lx",
- (unsigned long)chirp->code_callback_ra);
- tree_parse(node, "./psim,description \"client-callback instruction");
- tree_parse(node, "./real-address 0x%lx",
- (unsigned long)chirp->code_callback_ra);
- tree_parse(node, "./data 0x%lx",
- (unsigned long)emul_call_instruction);
-
- node = tree_parse(root, "/openprom/init/data@0x%lx",
- (unsigned long)(chirp->code_callback_ra + 4));
- tree_parse(node, "./psim,description \"client-callback return instruction");
- tree_parse(node, "./real-address 0x%lx",
- (unsigned long)(chirp->code_callback_ra + 4));
- tree_parse(node, "./data 0x%lx",
- (unsigned long)emul_blr_instruction);
-
- /* loop to keep other processors busy */
-
- node = tree_parse(root, "/openprom/init/data@0x%lx",
- (unsigned long)chirp->code_loop_ra);
- tree_parse(node, "./psim,description \"processor busy loop");
- tree_parse(node, "./real-address 0x%lx",
- (unsigned long)chirp->code_loop_ra);
- tree_parse(node, "./data 0x%lx",
- (unsigned long)emul_loop_instruction);
-
- /* hash table */
-
- /* create a hash table */
-
- if (!chirp->real_mode) {
- node = tree_parse(root, "/openprom/init/htab@0x%lx",
- (unsigned long)chirp->htab_ra);
- tree_parse(node, "./claim 0");
- tree_parse(node, "./real-address 0x%lx",
- (unsigned long)chirp->htab_ra);
- tree_parse(node, "./nr-bytes 0x%lx",
- (unsigned long)chirp->sizeof_htab);
- }
-
- /* map in the stack */
-
- if (!chirp->real_mode) {
- node = tree_parse(root, "/openprom/init/htab/pte@0x%lx",
- (unsigned long)chirp->stack_ra);
- tree_parse(node, "./psim,description \"map in the stack");
- tree_parse(node, "./claim 1");
- tree_parse(node, "./virtual-address 0x%lx",
- (unsigned long)chirp->stack_va);
- tree_parse(node, "./real-address 0x%lx",
- (unsigned long)chirp->stack_ra);
- tree_parse(node, "./nr-bytes 0x%lx",
- (unsigned long)chirp->sizeof_stack);
- tree_parse(node, "./wimg %d", 0x7);
- tree_parse(node, "./pp %d", 0x2);
- }
-
- /* map in the chrp openboot callback code */
-
- if (!chirp->real_mode) {
- node = tree_parse(root, "/openprom/init/htab/pte@0x%lx",
- (unsigned long)chirp->code_ra);
- tree_parse(node, "./psim,description \"map in chrp openboot callback code");
- tree_parse(node, "./claim 1");
- tree_parse(node, "./virtual-address 0x%lx",
- (unsigned long)chirp->code_va);
- tree_parse(node, "./real-address 0x%lx",
- (unsigned long)chirp->code_ra);
- tree_parse(node, "./nr-bytes 0x%lx",
- (unsigned long)chirp->sizeof_code);
- tree_parse(node, "./wimg %d", 0x7);
- tree_parse(node, "./pp %d", 0x2);
- }
-
- /* map in the program to run */
-
- if (chirp->real_mode) {
- node = tree_parse(node, "/openprom/init/load-binary");
- tree_parse(node, "./psim,description \"load the binary");
- tree_parse(node, "./file-name %s", bfd_get_filename(image));
- tree_parse(node, "./claim 1");
- }
- else {
- node = tree_parse(root, "/openprom/init/htab/pte@0x%lx",
- (unsigned long)chirp->load_base);
- tree_parse(node, "./psim,description \"load & map the binary");
- tree_parse(node, "./claim 1");
- tree_parse(node, "./file-name \"%s", bfd_get_filename(image));
- tree_parse(node, "./wimg %d", 0x7);
- tree_parse(node, "./pp %d", 0x2);
- }
-
- return chirp;
-}
-
-static void
-emul_chirp_init(os_emul_data *emul_data,
- int nr_cpus)
-{
- emul_data->state = serving;
-}
-
-static int
-emul_chirp_instruction_call(cpu *processor,
- unsigned_word cia,
- unsigned_word ra,
- os_emul_data *emul_data)
-{
- unsigned_word service_name_addr;
- unsigned_word result;
- char service_buf[32];
- char *service_name;
- chirp_services *service;
-
- switch (emul_data->state) {
-
- case serving:
- /* we are waiting on an OpenBoot request from the client program
- via the client interface */
- if (cia != emul_data->code_client_va)
- return 0;
- emul_data->return_address = LR;
- emul_data->arguments = cpu_registers(processor)->gpr[3];
- /* try to determine what to do */
- service_name_addr = emul_read_word(cpu_registers(processor)->gpr[3],
- processor, cia);
- service_name = emul_read_string(service_buf, service_name_addr,
- sizeof(service_buf), processor, cia);
- emul_data->n_args = emul_read_word(emul_data->arguments + sizeof(unsigned_cell),
- processor, cia);
- emul_data->n_returns = emul_read_word(emul_data->arguments + 2 * sizeof(unsigned_cell),
- processor, cia);
- /* verify what was passed */
- if (service_name_addr == 0
- || service_name == NULL) {
- error("OpenFirmware called with invalid (NULL) service name from 0x%lx with args 0x%lx\n",
- (unsigned long)emul_data->return_address,
- (unsigned long)emul_data->arguments);
- }
- if (emul_data->n_args > 6) { /* See iee1275 requirements on nr returns */
- error("OpenFirmware service %s called from 0x%lx with args 0x%lx, too many args (%d)\n",
- (unsigned long)emul_data->return_address,
- (unsigned long)emul_data->arguments,
- emul_data->n_returns);
- }
- if (emul_data->n_returns > 6) {
- error("OpenFirmware service %s called from 0x%lx with args 0x%lx, with too many returns (%d)\n",
- (unsigned long)emul_data->return_address,
- (unsigned long)emul_data->arguments,
- emul_data->n_args);
- }
- /* look it up */
- TRACE(trace_os_emul, ("%s called from 0x%lx with args 0x%lx\n",
- service_name,
- (unsigned long)emul_data->return_address,
- (unsigned long)emul_data->arguments));
- service = services;
- while (service->name != NULL && strcmp(service->name, service_name) != 0)
- service++;
- /* found or not? */
- if (service->name == NULL) {
- error("OpenBoot service `%s' not found\n", service_name);
- TRACE(trace_os_emul, ("%s not found\n", service_name));
- cpu_registers(processor)->gpr[3] = -1;
- }
- else {
- emul_data->service = service;
- /* call upon it */
- result = service->handler(emul_data, processor, cia);
- if (result != 0)
- TRACE(trace_os_emul, ("%s aborted with %ld\n", service_name, (long)result));
- cpu_registers(processor)->gpr[3] = result;
- }
- break;
-
- default:
- error("emul_chirp_instruction_call() unknown internal state\n");
- result = -1;
- break;
-
- }
-
- /* return to caller - instruction following this is a function return */
- return 1;
-}
-
-const os_emul emul_chirp = {
- "chirp",
- emul_chirp_create,
- emul_chirp_init,
- NULL, /*system_call*/
- emul_chirp_instruction_call,
- 0 /*data*/
-};
-
-#endif
diff --git a/sim/ppc/emul_chirp.h b/sim/ppc/emul_chirp.h
deleted file mode 100644
index 2265f5c3ee4..00000000000
--- a/sim/ppc/emul_chirp.h
+++ /dev/null
@@ -1,75 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1997, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-#ifndef _EMUL_CHIRP_H_
-#define _EMUL_CHIRP_H_
-
-/* EMUL_CHIRP:
-
- The emulation of the OpenBoot client interface (as defined in 1275)
- illustrates how it is possible for PSIM to implement an interface
- that is both running in virtual memory and is called using a
- standard function call interface.
-
- The OpenBoot client interface is implemented by using two
- instructions:
-
- client_interface:
- <emul_call>
- blr
-
- A client program makes a function call to `client_interface' using
- the `bl' instruction. The simulator will then execute the
- <emul_call> instruction (which calls emul_chirp) and then the `blr'
- which will return to the caller.
-
- In addition to providing the `client_interface' entry point, while
- a client request is being handled, emul_chirp patches (well it will
- one day) the data access exception vector with a <emul_call>
- instruction. By doing this, emul_chirp is able to catch and handle
- any invalid data accesses it makes while emulating a client call.
-
- When such an exception occures, emul_chirp is able to recover by
- restoring the processor and then calling the clients callback
- interface so that the client can recover from the data exception.
-
- Handling this are the emul_chirp states:
-
- serving---.
- / |
- Emulation compleated ^ v Client makes call to
- - restore int vectors | | emulated interface
- ^ v - patch exception vectors
- | /
- `-emulating-. emulating the request
- / |
- | v Emulation encounters
- Client callback recovers ^ | data access exception
- from data exception and | v - re-enable vm
- returns. ^ | - call client callback
- - restart request | /
- `--faulting
- */
-
-
-extern const os_emul emul_chirp;
-
-#endif
diff --git a/sim/ppc/emul_generic.c b/sim/ppc/emul_generic.c
deleted file mode 100644
index 1d431750dda..00000000000
--- a/sim/ppc/emul_generic.c
+++ /dev/null
@@ -1,343 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1997, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-#ifndef _EMUL_GENERIC_C_
-#define _EMUL_GENERIC_C_
-
-#include "emul_generic.h"
-
-#ifndef STATIC_INLINE_EMUL_GENERIC
-#define STATIC_INLINE_EMUL_GENERIC STATIC_INLINE
-#endif
-
-
-STATIC_INLINE_EMUL_GENERIC void
-emul_syscall_enter(emul_syscall *emul,
- int call,
- int arg0,
- cpu *processor,
- unsigned_word cia)
-{
- printf_filtered("%d:0x%lx:%s(",
- cpu_nr(processor) + 1,
- (long)cia,
- emul->syscall_descriptor[call].name);
-}
-
-
-STATIC_INLINE_EMUL_GENERIC void
-emul_syscall_exit(emul_syscall *emul,
- int call,
- int arg0,
- cpu *processor,
- unsigned_word cia)
-{
- int status = cpu_registers(processor)->gpr[3];
- int error = cpu_registers(processor)->gpr[0];
- printf_filtered(")=%d", status);
- if (error > 0 && error < emul->nr_error_names)
- printf_filtered("[%s]", emul->error_names[error]);
- printf_filtered("\n");
-}
-
-
-INLINE_EMUL_GENERIC unsigned64
-emul_read_gpr64(cpu *processor,
- int g)
-{
- unsigned32 hi;
- unsigned32 lo;
- if (CURRENT_TARGET_BYTE_ORDER == BIG_ENDIAN) {
- hi = cpu_registers(processor)->gpr[g];
- lo = cpu_registers(processor)->gpr[g+1];
- }
- else {
- lo = cpu_registers(processor)->gpr[g];
- hi = cpu_registers(processor)->gpr[g+1];
- }
- return (INSERTED64(hi, 0, 31) | INSERTED64(lo, 32, 63));
-}
-
-
-INLINE_EMUL_GENERIC void
-emul_write_gpr64(cpu *processor,
- int g,
- unsigned64 val)
-{
- unsigned32 hi = EXTRACTED64(val, 0, 31);
- unsigned32 lo = EXTRACTED64(val, 32, 63);
- if (CURRENT_TARGET_BYTE_ORDER == BIG_ENDIAN) {
- cpu_registers(processor)->gpr[g] = hi;
- cpu_registers(processor)->gpr[g+1] = lo;
- }
- else {
- cpu_registers(processor)->gpr[g] = lo;
- cpu_registers(processor)->gpr[g+1] = hi;
- }
-}
-
-
-INLINE_EMUL_GENERIC char *
-emul_read_string(char *dest,
- unsigned_word addr,
- unsigned nr_bytes,
- cpu *processor,
- unsigned_word cia)
-{
- unsigned nr_moved = 0;
- if (addr == 0)
- return NULL;
- while (1) {
- dest[nr_moved] = vm_data_map_read_1(cpu_data_map(processor),
- addr + nr_moved,
- processor, cia);
- if (dest[nr_moved] == '\0' || nr_moved >= nr_bytes)
- break;
- nr_moved++;
- }
- dest[nr_moved] = '\0';
- return dest;
-}
-
-
-INLINE_EMUL_GENERIC void
-emul_write_status(cpu *processor,
- int status,
- int errno)
-{
- if (status == -1 && errno != 0) {
- cpu_registers(processor)->gpr[3] = errno;
- CR_SET(0, cr_i_summary_overflow);
- }
- else {
- cpu_registers(processor)->gpr[3] = status;
- CR_SET(0, 0);
- }
-}
-
-
-INLINE_EMUL_GENERIC void
-emul_write2_status(cpu *processor,
- int status1,
- int status2,
- int errno)
-{
- if (status1 == -1 && errno != 0) {
- cpu_registers(processor)->gpr[3] = errno;
- CR_SET(0, cr_i_summary_overflow);
- }
- else {
- cpu_registers(processor)->gpr[3] = status1;
- cpu_registers(processor)->gpr[4] = status2;
- CR_SET(0, 0);
- }
-}
-
-
-INLINE_EMUL_GENERIC unsigned_word
-emul_read_word(unsigned_word addr,
- cpu *processor,
- unsigned_word cia)
-{
- return vm_data_map_read_word(cpu_data_map(processor),
- addr,
- processor, cia);
-}
-
-
-INLINE_EMUL_GENERIC void
-emul_write_word(unsigned_word addr,
- unsigned_word buf,
- cpu *processor,
- unsigned_word cia)
-{
- vm_data_map_write_word(cpu_data_map(processor),
- addr,
- buf,
- processor, cia);
-}
-
-
-INLINE_EMUL_GENERIC void
-emul_write_buffer(const void *source,
- unsigned_word addr,
- unsigned nr_bytes,
- cpu *processor,
- unsigned_word cia)
-{
- int nr_moved;
- for (nr_moved = 0; nr_moved < nr_bytes; nr_moved++) {
- vm_data_map_write_1(cpu_data_map(processor),
- addr + nr_moved,
- ((const char*)source)[nr_moved],
- processor, cia);
- }
-}
-
-
-INLINE_EMUL_GENERIC void
-emul_read_buffer(void *dest,
- unsigned_word addr,
- unsigned nr_bytes,
- cpu *processor,
- unsigned_word cia)
-{
- int nr_moved;
- for (nr_moved = 0; nr_moved < nr_bytes; nr_moved++) {
- ((char*)dest)[nr_moved] = vm_data_map_read_1(cpu_data_map(processor),
- addr + nr_moved,
- processor, cia);
- }
-}
-
-
-INLINE_EMUL_GENERIC void
-emul_do_system_call(os_emul_data *emul_data,
- emul_syscall *emul,
- unsigned call,
- const int arg0,
- cpu *processor,
- unsigned_word cia)
-{
- emul_syscall_handler *handler = NULL;
- if (call >= emul->nr_system_calls)
- error("do_call() os_emul call %d out-of-range\n", call);
-
- handler = emul->syscall_descriptor[call].handler;
- if (handler == NULL) {
- if (emul->syscall_descriptor[call].name) {
- error("do_call() unimplemented call %s\n", emul->syscall_descriptor[call].name);
- } else {
- error("do_call() unimplemented call %d\n", call);
- }
- }
-
- if (WITH_TRACE && ppc_trace[trace_os_emul])
- emul_syscall_enter(emul, call, arg0, processor, cia);
-
- cpu_registers(processor)->gpr[0] = 0; /* default success */
- handler(emul_data, call, arg0, processor, cia);
-
- if (WITH_TRACE && ppc_trace[trace_os_emul])
- emul_syscall_exit(emul, call, arg0, processor, cia);
-}
-
-
-/* default size for the first bank of memory */
-
-#ifndef OEA_MEMORY_SIZE
-#define OEA_MEMORY_SIZE 0x100000
-#endif
-
-
-/* Add options to the device tree */
-
-INLINE_EMUL_GENERIC void
-emul_add_tree_options(device *tree,
- bfd *image,
- const char *emul,
- const char *env,
- int oea_interrupt_prefix)
-{
- int little_endian = 0;
-
- /* sort out little endian */
- if (tree_find_property(tree, "/options/little-endian?"))
- little_endian = tree_find_boolean_property(tree, "/options/little-endian?");
- else {
-#ifdef bfd_little_endian /* new bfd */
- little_endian = (image != NULL && bfd_little_endian(image));
-#else
- little_endian = (image != NULL &&
- !image->xvec->byteorder_big_p);
-#endif
- tree_parse(tree, "/options/little-endian? %s",
- little_endian ? "true" : "false");
- }
-
- /* misc other stuff */
- tree_parse(tree, "/openprom/options/oea-memory-size 0x%x",
- OEA_MEMORY_SIZE);
- tree_parse(tree, "/openprom/options/oea-interrupt-prefix %d",
- oea_interrupt_prefix);
- tree_parse(tree, "/openprom/options/smp 1");
- tree_parse(tree, "/openprom/options/env %s", env);
- tree_parse(tree, "/openprom/options/os-emul %s", emul);
- tree_parse(tree, "/openprom/options/strict-alignment? %s",
- (WITH_ALIGNMENT == STRICT_ALIGNMENT)
- ? "true" : "false");
- tree_parse(tree, "/openprom/options/floating-point? %s",
- WITH_FLOATING_POINT ? "true" : "false");
- tree_parse(tree, "/openprom/options/use-stdio? %s",
- ((WITH_STDIO == DO_USE_STDIO
- || WITH_STDIO == 0)
- ? "true" : "false"));
- tree_parse(tree, "/openprom/options/model \"%s",
- model_name[WITH_DEFAULT_MODEL]);
- tree_parse(tree, "/openprom/options/model-issue %d",
- MODEL_ISSUE_IGNORE);
-
- /* useful options */
-}
-
-INLINE_EMUL_GENERIC void
-emul_add_tree_hardware(device *root)
-{
- int i;
- int nr_cpus = tree_find_integer_property(root, "/openprom/options/smp");
-
- /* sanity check the number of processors */
- if (nr_cpus > MAX_NR_PROCESSORS)
- error("Specified number of processors (%d) exceeds the number configured (%d).\n",
- nr_cpus, MAX_NR_PROCESSORS);
-
- /* set the number of address cells (1 or 2) */
- tree_parse(root, "#address-cells %d", WITH_TARGET_WORD_BITSIZE / 32);
-
- /* add some memory */
- if (tree_find_device(root, "/memory") == NULL) {
- unsigned_word memory_size =
- tree_find_integer_property(root, "/openprom/options/oea-memory-size");
- const unsigned_word avail_start = 0x3000;
- tree_parse(root, "/memory@0/reg 0x0 0x%lx",
- (unsigned long)memory_size);
- /* reserve the first 0x3000 for the PowerPC interrupt table */
- tree_parse(root, "/memory@0/available 0x%lx 0x%lx",
- (unsigned long)avail_start,
- (unsigned long)memory_size - avail_start);
- }
-
- /* our processors */
- for (i = 0; i < nr_cpus; i++) {
- tree_parse(root, "/cpus/cpu@%d/cpu-nr %d", i, i);
- }
-
- /* the debugging pal - hide it in the openprom and don't attach it
- to any bus */
- tree_parse(root, "/openprom/pal");
-
- /* chosen etc */
- tree_parse(root, "/chosen/stdin */openprom/pal");
- tree_parse(root, "/chosen/stdout !/chosen/stdin");
- tree_parse(root, "/chosen/memory */memory");
-}
-
-#endif /* _EMUL_GENERIC_C_ */
diff --git a/sim/ppc/emul_generic.h b/sim/ppc/emul_generic.h
deleted file mode 100644
index a86026e9b9d..00000000000
--- a/sim/ppc/emul_generic.h
+++ /dev/null
@@ -1,178 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1996, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-#ifndef _EMUL_GENERIC_H_
-#define _EMUL_GENERIC_H_
-
-#include "cpu.h"
-#include "idecode.h"
-#include "os_emul.h"
-
-#include "tree.h"
-
-#include "bfd.h"
-
-#ifndef INLINE_EMUL_GENERIC
-#define INLINE_EMUL_GENERIC
-#endif
-
-/* various PowerPC instructions for writing into memory */
-enum {
- emul_call_instruction = 0x1,
- emul_loop_instruction = 0x48000000, /* branch to . */
- emul_rfi_instruction = 0x4c000064,
- emul_blr_instruction = 0x4e800020,
-};
-
-
-/* emulation specific data */
-
-typedef struct _os_emul_data os_emul_data;
-
-typedef os_emul_data *(os_emul_create_handler)
- (device *tree,
- bfd *image,
- const char *emul_name);
-typedef void (os_emul_init_handler)
- (os_emul_data *emul_data,
- int nr_cpus);
-typedef void (os_emul_system_call_handler)
- (cpu *processor,
- unsigned_word cia,
- os_emul_data *emul_data);
-typedef int (os_emul_instruction_call_handler)
- (cpu *processor,
- unsigned_word cia,
- unsigned_word ra,
- os_emul_data *emul_data);
-
-struct _os_emul {
- const char *name;
- os_emul_create_handler *create;
- os_emul_init_handler *init;
- os_emul_system_call_handler *system_call;
- os_emul_instruction_call_handler *instruction_call;
- os_emul_data *data;
-};
-
-
-/* One class of emulation - system call is pretty general, provide a
- common template for implementing this */
-
-typedef struct _emul_syscall emul_syscall;
-typedef struct _emul_syscall_descriptor emul_syscall_descriptor;
-
-typedef void (emul_syscall_handler)
- (os_emul_data *emul_data,
- unsigned call,
- const int arg0,
- cpu *processor,
- unsigned_word cia);
-
-struct _emul_syscall_descriptor {
- emul_syscall_handler *handler;
- const char *name;
-};
-
-struct _emul_syscall {
- emul_syscall_descriptor *syscall_descriptor;
- int nr_system_calls;
- char **error_names;
- int nr_error_names;
- char **signal_names;
- int nr_signal_names;
-};
-
-
-INLINE_EMUL_GENERIC void emul_do_system_call
-(os_emul_data *emul_data,
- emul_syscall *syscall,
- unsigned call,
- const int arg0,
- cpu *processor,
- unsigned_word cia);
-
-
-INLINE_EMUL_GENERIC unsigned64 emul_read_gpr64
-(cpu *processor,
- int g);
-
-INLINE_EMUL_GENERIC void emul_write_gpr64
-(cpu *processor,
- int g,
- unsigned64 val);
-
-INLINE_EMUL_GENERIC void emul_write_status
-(cpu *processor,
- int status,
- int errno);
-
-INLINE_EMUL_GENERIC void emul_write2_status
-(cpu *processor,
- int status1,
- int status2,
- int errno);
-
-INLINE_EMUL_GENERIC char *emul_read_string
-(char *dest,
- unsigned_word addr,
- unsigned nr_bytes,
- cpu *processor,
- unsigned_word cia);
-
-INLINE_EMUL_GENERIC unsigned_word emul_read_word
-(unsigned_word addr,
- cpu *processor,
- unsigned_word cia);
-
-INLINE_EMUL_GENERIC void emul_write_word
-(unsigned_word addr,
- unsigned_word buf,
- cpu *processor,
- unsigned_word cia);
-
-INLINE_EMUL_GENERIC void emul_read_buffer
-(void *dest,
- unsigned_word addr,
- unsigned nr_bytes,
- cpu *processor,
- unsigned_word cia);
-
-INLINE_EMUL_GENERIC void emul_write_buffer
-(const void *source,
- unsigned_word addr,
- unsigned nr_bytes,
- cpu *processor,
- unsigned_word cia);
-
-/* Simplify the construction of device trees */
-
-INLINE_EMUL_GENERIC void emul_add_tree_options
-(device *tree,
- bfd *image,
- const char *emul,
- const char *env,
- int oea_interrupt_prefix);
-
-INLINE_EMUL_GENERIC void emul_add_tree_hardware
-(device *tree);
-
-#endif /* _EMUL_GENERIC_H_ */
diff --git a/sim/ppc/emul_netbsd.c b/sim/ppc/emul_netbsd.c
deleted file mode 100644
index 13897face2d..00000000000
--- a/sim/ppc/emul_netbsd.c
+++ /dev/null
@@ -1,1469 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1998, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-#ifndef _EMUL_NETBSD_C_
-#define _EMUL_NETBSD_C_
-
-
-/* Note: this module is called via a table. There is no benefit in
- making it inline */
-
-#include "emul_generic.h"
-#include "emul_netbsd.h"
-
-#ifdef HAVE_STRING_H
-#include <string.h>
-#else
-#ifdef HAVE_STRINGS_H
-#include <strings.h>
-#endif
-#endif
-
-#include <sys/types.h>
-#include <sys/stat.h>
-#include <stdio.h>
-#include <signal.h>
-#include <fcntl.h>
-#include <errno.h>
-#include <sys/errno.h>
-#include <sys/param.h>
-#include <sys/time.h>
-
-#ifdef HAVE_GETRUSAGE
-#ifndef HAVE_SYS_RESOURCE_H
-#undef HAVE_GETRUSAGE
-#endif
-#endif
-
-#ifdef HAVE_GETRUSAGE
-#include <sys/resource.h>
-int getrusage();
-#endif
-
-#if HAVE_SYS_IOCTL_H
-#include <sys/ioctl.h>
-#endif
-
-#if HAVE_DIRENT_H
-# include <dirent.h>
-# define NAMLEN(dirent) strlen((dirent)->d_name)
-#else
-# define dirent direct
-# define NAMLEN(dirent) (dirent)->d_namlen
-# if HAVE_SYS_NDIR_H
-# include <sys/ndir.h>
-# endif
-# if HAVE_SYS_DIR_H
-# include <sys/dir.h>
-# endif
-# if HAVE_NDIR_H
-# include <ndir.h>
-# endif
-#endif
-
-#ifdef HAVE_UNISTD_H
-#undef MAXPATHLEN /* sys/param.h might define this also */
-#include <unistd.h>
-#endif
-
-#ifdef HAVE_STDLIB_H
-#include <stdlib.h>
-#endif
-
-#define WITH_NetBSD_HOST (NetBSD >= 199306)
-#if WITH_NetBSD_HOST /* here NetBSD as that is what we're emulating */
-#include <sys/syscall.h> /* FIXME - should not be including this one */
-#include <sys/sysctl.h>
-#include <sys/mount.h>
-extern int getdirentries(int fd, char *buf, int nbytes, long *basep);
-#else
-
-/* If this is not netbsd, don't allow fstatfs or getdirentries at this time */
-#undef HAVE_FSTATFS
-#undef HAVE_GETDIRENTRIES
-#endif
-
-#if (BSD < 199306) /* here BSD as just a bug */
-extern int errno;
-#endif
-
-#ifndef STATIC_INLINE_EMUL_NETBSD
-#define STATIC_INLINE_EMUL_NETBSD STATIC_INLINE
-#endif
-
-
-#if WITH_NetBSD_HOST
-#define SYS(X) ASSERT(call == (SYS_##X))
-#else
-#define SYS(X)
-#endif
-
-#if WITH_NetBSD_HOST && (PATH_MAX != 1024)
-#error "PATH_MAX not 1024"
-#elif !defined(PATH_MAX)
-#define PATH_MAX 1024
-#endif
-
-
-/* EMULATION
-
- NetBSD - Emulation of user programs for NetBSD/PPC
-
- DESCRIPTION
-
- */
-
-
-/* NetBSD's idea of what is needed to implement emulations */
-
-struct _os_emul_data {
- device *vm;
- emul_syscall *syscalls;
-};
-
-
-
-STATIC_INLINE_EMUL_NETBSD void
-write_stat(unsigned_word addr,
- struct stat buf,
- cpu *processor,
- unsigned_word cia)
-{
- H2T(buf.st_dev);
- H2T(buf.st_ino);
- H2T(buf.st_mode);
- H2T(buf.st_nlink);
- H2T(buf.st_uid);
- H2T(buf.st_gid);
- H2T(buf.st_size);
- H2T(buf.st_atime);
- /* H2T(buf.st_spare1); */
- H2T(buf.st_mtime);
- /* H2T(buf.st_spare2); */
- H2T(buf.st_ctime);
- /* H2T(buf.st_spare3); */
-#ifdef AC_STRUCT_ST_RDEV
- H2T(buf.st_rdev);
-#endif
-#ifdef AC_STRUCT_ST_BLKSIZE
- H2T(buf.st_blksize);
-#endif
-#ifdef AC_STRUCT_ST_BLOCKS
- H2T(buf.st_blocks);
-#endif
-#if WITH_NetBSD_HOST
- H2T(buf.st_flags);
- H2T(buf.st_gen);
-#endif
- emul_write_buffer(&buf, addr, sizeof(buf), processor, cia);
-}
-
-
-#ifdef HAVE_FSTATFS
-STATIC_INLINE_EMUL_NETBSD void
-write_statfs(unsigned_word addr,
- struct statfs buf,
- cpu *processor,
- unsigned_word cia)
-{
- H2T(buf.f_type);
- H2T(buf.f_flags);
- H2T(buf.f_bsize);
- H2T(buf.f_iosize);
- H2T(buf.f_blocks);
- H2T(buf.f_bfree);
- H2T(buf.f_bavail);
- H2T(buf.f_files);
- H2T(buf.f_ffree);
- H2T(buf.f_fsid.val[0]);
- H2T(buf.f_fsid.val[1]);
- H2T(buf.f_owner);
- /* f_spare[4]; */
- /* f_fstypename[MFSNAMELEN]; */
- /* f_mntonname[MNAMELEN]; */
- /* f_mntfromname[MNAMELEN]; */
- emul_write_buffer(&buf, addr, sizeof(buf), processor, cia);
-}
-#endif
-
-
-STATIC_INLINE_EMUL_NETBSD void
-write_timeval(unsigned_word addr,
- struct timeval t,
- cpu *processor,
- unsigned_word cia)
-{
- H2T(t.tv_sec);
- H2T(t.tv_usec);
- emul_write_buffer(&t, addr, sizeof(t), processor, cia);
-}
-
-
-STATIC_INLINE_EMUL_NETBSD void
-write_timezone(unsigned_word addr,
- struct timezone tz,
- cpu *processor,
- unsigned_word cia)
-{
- H2T(tz.tz_minuteswest);
- H2T(tz.tz_dsttime);
- emul_write_buffer(&tz, addr, sizeof(tz), processor, cia);
-}
-
-
-#ifdef HAVE_GETDIRENTRIES
-STATIC_INLINE_EMUL_NETBSD void
-write_direntries(unsigned_word addr,
- char *buf,
- int nbytes,
- cpu *processor,
- unsigned_word cia)
-{
- while (nbytes > 0) {
- struct dirent *out;
- struct dirent *in = (struct dirent*)buf;
- ASSERT(in->d_reclen <= nbytes);
- out = (struct dirent*)zalloc(in->d_reclen);
- memcpy(out/*dest*/, in/*src*/, in->d_reclen);
- H2T(out->d_fileno);
- H2T(out->d_reclen);
- H2T(out->d_type);
- H2T(out->d_namlen);
- emul_write_buffer(out, addr, in->d_reclen, processor, cia);
- nbytes -= in->d_reclen;
- addr += in->d_reclen;
- buf += in->d_reclen;
- zfree(out);
- }
-}
-#endif
-
-
-#ifdef HAVE_GETRUSAGE
-STATIC_INLINE_EMUL_NETBSD void
-write_rusage(unsigned_word addr,
- struct rusage rusage,
- cpu *processor,
- unsigned_word cia)
-{
- H2T(rusage.ru_utime.tv_sec); /* user time used */
- H2T(rusage.ru_utime.tv_usec);
- H2T(rusage.ru_stime.tv_sec); /* system time used */
- H2T(rusage.ru_stime.tv_usec);
- H2T(rusage.ru_maxrss); /* integral max resident set size */
- H2T(rusage.ru_ixrss); /* integral shared text memory size */
- H2T(rusage.ru_idrss); /* integral unshared data size */
- H2T(rusage.ru_isrss); /* integral unshared stack size */
- H2T(rusage.ru_minflt); /* page reclaims */
- H2T(rusage.ru_majflt); /* page faults */
- H2T(rusage.ru_nswap); /* swaps */
- H2T(rusage.ru_inblock); /* block input operations */
- H2T(rusage.ru_oublock); /* block output operations */
- H2T(rusage.ru_msgsnd); /* messages sent */
- H2T(rusage.ru_msgrcv); /* messages received */
- H2T(rusage.ru_nsignals); /* signals received */
- H2T(rusage.ru_nvcsw); /* voluntary context switches */
- H2T(rusage.ru_nivcsw); /* involuntary context switches */
- emul_write_buffer(&rusage, addr, sizeof(rusage), processor, cia);
-}
-#endif
-
-static void
-do_exit(os_emul_data *emul,
- unsigned call,
- const int arg0,
- cpu *processor,
- unsigned_word cia)
-{
- int status = (int)cpu_registers(processor)->gpr[arg0];
- SYS(exit);
- if (WITH_TRACE && ppc_trace[trace_os_emul])
- printf_filtered ("%d)\n", status);
-
- cpu_halt(processor, cia, was_exited, status);
-}
-
-
-static void
-do_read(os_emul_data *emul,
- unsigned call,
- const int arg0,
- cpu *processor,
- unsigned_word cia)
-{
- void *scratch_buffer;
- int d = (int)cpu_registers(processor)->gpr[arg0];
- unsigned_word buf = cpu_registers(processor)->gpr[arg0+1];
- int nbytes = cpu_registers(processor)->gpr[arg0+2];
- int status;
- SYS(read);
-
- if (WITH_TRACE && ppc_trace[trace_os_emul])
- printf_filtered ("%d, 0x%lx, %d", d, (long)buf, nbytes);
-
- /* get a tempoary bufer */
- scratch_buffer = zalloc(nbytes);
-
- /* check if buffer exists by reading it */
- emul_read_buffer(scratch_buffer, buf, nbytes, processor, cia);
-
- /* read */
-#if 0
- if (d == 0) {
- status = fread (scratch_buffer, 1, nbytes, stdin);
- if (status == 0 && ferror (stdin))
- status = -1;
- }
-#endif
- status = read (d, scratch_buffer, nbytes);
-
- emul_write_status(processor, status, errno);
- if (status > 0)
- emul_write_buffer(scratch_buffer, buf, status, processor, cia);
-
- zfree(scratch_buffer);
-}
-
-
-static void
-do_write(os_emul_data *emul,
- unsigned call,
- const int arg0,
- cpu *processor,
- unsigned_word cia)
-{
- void *scratch_buffer = NULL;
- int d = (int)cpu_registers(processor)->gpr[arg0];
- unsigned_word buf = cpu_registers(processor)->gpr[arg0+1];
- int nbytes = cpu_registers(processor)->gpr[arg0+2];
- int status;
- SYS(write);
-
- if (WITH_TRACE && ppc_trace[trace_os_emul])
- printf_filtered ("%d, 0x%lx, %d", d, (long)buf, nbytes);
-
- /* get a tempoary bufer */
- scratch_buffer = zalloc(nbytes); /* FIXME - nbytes == 0 */
-
- /* copy in */
- emul_read_buffer(scratch_buffer, buf, nbytes,
- processor, cia);
-
- /* write */
- status = write(d, scratch_buffer, nbytes);
- emul_write_status(processor, status, errno);
- zfree(scratch_buffer);
-
- flush_stdoutput();
-}
-
-
-static void
-do_open(os_emul_data *emul,
- unsigned call,
- const int arg0,
- cpu *processor,
- unsigned_word cia)
-{
- unsigned_word path_addr = cpu_registers(processor)->gpr[arg0];
- char path_buf[PATH_MAX];
- char *path = emul_read_string(path_buf, path_addr, PATH_MAX, processor, cia);
- int flags = (int)cpu_registers(processor)->gpr[arg0+1];
- int mode = (int)cpu_registers(processor)->gpr[arg0+2];
- int hostflags;
- int status;
-
- if (WITH_TRACE && ppc_trace[trace_os_emul])
- printf_filtered ("0x%lx [%s], 0x%x, 0x%x", (long)path_addr, path, flags, mode);
-
- SYS(open);
-
- /* Do some translation on 'flags' to match it to the host's version. */
- /* These flag values were taken from the NetBSD 1.4 header files. */
- if ((flags & 3) == 0)
- hostflags = O_RDONLY;
- else if ((flags & 3) == 1)
- hostflags = O_WRONLY;
- else
- hostflags = O_RDWR;
- if (flags & 0x00000008)
- hostflags |= O_APPEND;
- if (flags & 0x00000200)
- hostflags |= O_CREAT;
- if (flags & 0x00000400)
- hostflags |= O_TRUNC;
- if (flags & 0x00000800)
- hostflags |= O_EXCL;
-
- /* Can't combine these statements, cuz open sets errno. */
- status = open(path, hostflags, mode);
- emul_write_status(processor, status, errno);
-}
-
-
-static void
-do_close(os_emul_data *emul,
- unsigned call,
- const int arg0,
- cpu *processor,
- unsigned_word cia)
-{
- int d = (int)cpu_registers(processor)->gpr[arg0];
- int status;
-
- if (WITH_TRACE && ppc_trace[trace_os_emul])
- printf_filtered ("%d", d);
-
- SYS(close);
-
- /* Can't combine these statements, cuz close sets errno. */
- status = close(d);
- emul_write_status(processor, status, errno);
-}
-
-
-static void
-do_break(os_emul_data *emul,
- unsigned call,
- const int arg0,
- cpu *processor,
- unsigned_word cia)
-{
- /* just pass this onto the `vm' device */
- unsigned_word new_break = cpu_registers(processor)->gpr[arg0];
- int status;
-
- if (WITH_TRACE && ppc_trace[trace_os_emul])
- printf_filtered ("0x%lx", (long)cpu_registers(processor)->gpr[arg0]);
-
- SYS(break);
- status = device_ioctl(emul->vm,
- processor,
- cia,
- device_ioctl_break,
- new_break); /*ioctl-data*/
- emul_write_status(processor, 0, status);
-}
-
-
-#ifndef HAVE_GETPID
-#define do_getpid 0
-#else
-static void
-do_getpid(os_emul_data *emul,
- unsigned call,
- const int arg0,
- cpu *processor,
- unsigned_word cia)
-{
- SYS(getpid);
- emul_write_status(processor, (int)getpid(), 0);
-}
-#endif
-
-#ifndef HAVE_GETUID
-#define do_getuid 0
-#else
-static void
-do_getuid(os_emul_data *emul,
- unsigned call,
- const int arg0,
- cpu *processor,
- unsigned_word cia)
-{
- SYS(getuid);
- emul_write_status(processor, (int)getuid(), 0);
-}
-#endif
-
-#ifndef HAVE_GETEUID
-#define do_geteuid 0
-#else
-static void
-do_geteuid(os_emul_data *emul,
- unsigned call,
- const int arg0,
- cpu *processor,
- unsigned_word cia)
-{
- SYS(geteuid);
- emul_write_status(processor, (int)geteuid(), 0);
-}
-#endif
-
-#ifndef HAVE_KILL
-#define do_kill 0
-#else
-static void
-do_kill(os_emul_data *emul,
- unsigned call,
- const int arg0,
- cpu *processor,
- unsigned_word cia)
-{
- pid_t pid = cpu_registers(processor)->gpr[arg0];
- int sig = cpu_registers(processor)->gpr[arg0+1];
-
- if (WITH_TRACE && ppc_trace[trace_os_emul])
- printf_filtered ("%d, %d", (int)pid, sig);
-
- SYS(kill);
- printf_filtered("SYS_kill at 0x%lx - more to this than just being killed\n",
- (long)cia);
- cpu_halt(processor, cia, was_signalled, sig);
-}
-#endif
-
-#ifndef HAVE_DUP
-#define do_dup 0
-#else
-static void
-do_dup(os_emul_data *emul,
- unsigned call,
- const int arg0,
- cpu *processor,
- unsigned_word cia)
-{
- int oldd = cpu_registers(processor)->gpr[arg0];
- int status = dup(oldd);
- int err = errno;
-
- if (WITH_TRACE && ppc_trace[trace_os_emul])
- printf_filtered ("%d", oldd);
-
- SYS(dup);
- emul_write_status(processor, status, err);
-}
-#endif
-
-#ifndef HAVE_GETEGID
-#define do_getegid 0
-#else
-static void
-do_getegid(os_emul_data *emul,
- unsigned call,
- const int arg0,
- cpu *processor,
- unsigned_word cia)
-{
- SYS(getegid);
- emul_write_status(processor, (int)getegid(), 0);
-}
-#endif
-
-#ifndef HAVE_GETGID
-#define do_getgid 0
-#else
-static void
-do_getgid(os_emul_data *emul,
- unsigned call,
- const int arg0,
- cpu *processor,
- unsigned_word cia)
-{
- SYS(getgid);
- emul_write_status(processor, (int)getgid(), 0);
-}
-#endif
-
-#ifndef HAVE_SIGPROCMASK
-#define do_sigprocmask 0
-#else
-static void
-do_sigprocmask(os_emul_data *emul,
- unsigned call,
- const int arg0,
- cpu *processor,
- unsigned_word cia)
-{
- natural_word how = cpu_registers(processor)->gpr[arg0];
- unsigned_word set = cpu_registers(processor)->gpr[arg0+1];
- unsigned_word oset = cpu_registers(processor)->gpr[arg0+2];
-#ifdef SYS_sigprocmask
- SYS(sigprocmask);
-#endif
-
- if (WITH_TRACE && ppc_trace[trace_os_emul])
- printf_filtered ("%ld, 0x%ld, 0x%ld", (long)how, (long)set, (long)oset);
-
- emul_write_status(processor, 0, 0);
- cpu_registers(processor)->gpr[4] = set;
-}
-#endif
-
-#ifndef HAVE_IOCTL
-#define do_ioctl 0
-#else
-static void
-do_ioctl(os_emul_data *emul,
- unsigned call,
- const int arg0,
- cpu *processor,
- unsigned_word cia)
-{
- int d = cpu_registers(processor)->gpr[arg0];
- unsigned request = cpu_registers(processor)->gpr[arg0+1];
- unsigned_word argp_addr = cpu_registers(processor)->gpr[arg0+2];
-
-#if !WITH_NetBSD_HOST
- cpu_registers(processor)->gpr[arg0] = 0; /* just succeed */
-#else
- unsigned dir = request & IOC_DIRMASK;
- int status;
- SYS(ioctl);
- /* what we haven't done */
- if (dir & IOC_IN /* write into the io device */
- || dir & IOC_OUT
- || !(dir & IOC_VOID))
- error("do_ioctl() read or write of parameter not implemented\n");
- status = ioctl(d, request, NULL);
- emul_write_status(processor, status, errno);
-#endif
-
- if (WITH_TRACE && ppc_trace[trace_os_emul])
- printf_filtered ("%d, 0x%x, 0x%lx", d, request, (long)argp_addr);
-}
-#endif
-
-#ifndef HAVE_UMASK
-#define do_umask 0
-#else
-static void
-do_umask(os_emul_data *emul,
- unsigned call,
- const int arg0,
- cpu *processor,
- unsigned_word cia)
-{
- int mask = cpu_registers(processor)->gpr[arg0];
-
- if (WITH_TRACE && ppc_trace[trace_os_emul])
- printf_filtered ("0%o", mask);
-
- SYS(umask);
- emul_write_status(processor, umask(mask), 0);
-}
-#endif
-
-#ifndef HAVE_DUP2
-#define do_dup2 0
-#else
-static void
-do_dup2(os_emul_data *emul,
- unsigned call,
- const int arg0,
- cpu *processor,
- unsigned_word cia)
-{
- int oldd = cpu_registers(processor)->gpr[arg0];
- int newd = cpu_registers(processor)->gpr[arg0+1];
- int status = dup2(oldd, newd);
- int err = errno;
-
- if (WITH_TRACE && ppc_trace[trace_os_emul])
- printf_filtered ("%d, %d", oldd, newd);
-
- SYS(dup2);
- emul_write_status(processor, status, err);
-}
-#endif
-
-#ifndef HAVE_FCNTL
-#define do_fcntl 0
-#else
-static void
-do_fcntl(os_emul_data *emul,
- unsigned call,
- const int arg0,
- cpu *processor,
- unsigned_word cia)
-{
- int fd = cpu_registers(processor)->gpr[arg0];
- int cmd = cpu_registers(processor)->gpr[arg0+1];
- int arg = cpu_registers(processor)->gpr[arg0+2];
- int status;
-
- if (WITH_TRACE && ppc_trace[trace_os_emul])
- printf_filtered ("%d, %d, %d", fd, cmd, arg);
-
- SYS(fcntl);
- status = fcntl(fd, cmd, arg);
- emul_write_status(processor, status, errno);
-}
-#endif
-
-#ifndef HAVE_GETTIMEOFDAY
-#define do_gettimeofday 0
-#else
-static void
-do_gettimeofday(os_emul_data *emul,
- unsigned call,
- const int arg0,
- cpu *processor,
- unsigned_word cia)
-{
- unsigned_word t_addr = cpu_registers(processor)->gpr[arg0];
- unsigned_word tz_addr = cpu_registers(processor)->gpr[arg0+1];
- struct timeval t;
- struct timezone tz;
- int status = gettimeofday((t_addr != 0 ? &t : NULL),
- (tz_addr != 0 ? &tz : NULL));
- int err = errno;
-
- if (WITH_TRACE && ppc_trace[trace_os_emul])
- printf_filtered ("0x%lx, 0x%lx", (long)t_addr, (long)tz_addr);
-
- SYS(gettimeofday);
- emul_write_status(processor, status, err);
- if (status == 0) {
- if (t_addr != 0)
- write_timeval(t_addr, t, processor, cia);
- if (tz_addr != 0)
- write_timezone(tz_addr, tz, processor, cia);
- }
-}
-#endif
-
-#ifndef HAVE_GETRUSAGE
-#define do_getrusage 0
-#else
-static void
-do_getrusage(os_emul_data *emul,
- unsigned call,
- const int arg0,
- cpu *processor,
- unsigned_word cia)
-{
- int who = cpu_registers(processor)->gpr[arg0];
- unsigned_word rusage_addr = cpu_registers(processor)->gpr[arg0+1];
- struct rusage rusage;
- int status = getrusage(who, (rusage_addr != 0 ? &rusage : NULL));
- int err = errno;
-
- if (WITH_TRACE && ppc_trace[trace_os_emul])
- printf_filtered ("%d, 0x%lx", who, (long)rusage_addr);
-
- SYS(getrusage);
- emul_write_status(processor, status, err);
- if (status == 0) {
- if (rusage_addr != 0)
- write_rusage(rusage_addr, rusage, processor, cia);
- }
-}
-#endif
-
-
-#ifndef HAVE_FSTATFS
-#define do_fstatfs 0
-#else
-static void
-do_fstatfs(os_emul_data *emul,
- unsigned call,
- const int arg0,
- cpu *processor,
- unsigned_word cia)
-{
- int fd = cpu_registers(processor)->gpr[arg0];
- unsigned_word buf_addr = cpu_registers(processor)->gpr[arg0+1];
- struct statfs buf;
- int status;
-
- if (WITH_TRACE && ppc_trace[trace_os_emul])
- printf_filtered ("%d, 0x%lx", fd, (long)buf_addr);
-
- SYS(fstatfs);
- status = fstatfs(fd, (buf_addr == 0 ? NULL : &buf));
- emul_write_status(processor, status, errno);
- if (status == 0) {
- if (buf_addr != 0)
- write_statfs(buf_addr, buf, processor, cia);
- }
-}
-#endif
-
-#ifndef HAVE_STAT
-#define do_stat 0
-#else
-static void
-do_stat(os_emul_data *emul,
- unsigned call,
- const int arg0,
- cpu *processor,
- unsigned_word cia)
-{
- char path_buf[PATH_MAX];
- unsigned_word path_addr = cpu_registers(processor)->gpr[arg0];
- unsigned_word stat_buf_addr = cpu_registers(processor)->gpr[arg0+1];
- char *path = emul_read_string(path_buf, path_addr, PATH_MAX, processor, cia);
- struct stat buf;
- int status;
-#ifdef SYS_stat
- SYS(stat);
-#endif
- status = stat(path, &buf);
- emul_write_status(processor, status, errno);
- if (status == 0)
- write_stat(stat_buf_addr, buf, processor, cia);
-}
-#endif
-
-#ifndef HAVE_FSTAT
-#define do_fstat 0
-#else
-static void
-do_fstat(os_emul_data *emul,
- unsigned call,
- const int arg0,
- cpu *processor,
- unsigned_word cia)
-{
- int fd = cpu_registers(processor)->gpr[arg0];
- unsigned_word stat_buf_addr = cpu_registers(processor)->gpr[arg0+1];
- struct stat buf;
- int status;
-#ifdef SYS_fstat
- SYS(fstat);
-#endif
- /* Can't combine these statements, cuz fstat sets errno. */
- status = fstat(fd, &buf);
- emul_write_status(processor, status, errno);
- write_stat(stat_buf_addr, buf, processor, cia);
-}
-#endif
-
-#ifndef HAVE_LSTAT
-#define do_lstat 0
-#else
-static void
-do_lstat(os_emul_data *emul,
- unsigned call,
- const int arg0,
- cpu *processor,
- unsigned_word cia)
-{
- char path_buf[PATH_MAX];
- unsigned_word path_addr = cpu_registers(processor)->gpr[arg0];
- char *path = emul_read_string(path_buf, path_addr, PATH_MAX, processor, cia);
- unsigned_word stat_buf_addr = cpu_registers(processor)->gpr[arg0+1];
- struct stat buf;
- int status;
-#ifdef SYS_lstat
- SYS(lstat);
-#endif
- /* Can't combine these statements, cuz lstat sets errno. */
- status = lstat(path, &buf);
- emul_write_status(processor, status, errno);
- write_stat(stat_buf_addr, buf, processor, cia);
-}
-#endif
-
-#ifndef HAVE_GETDIRENTRIES
-#define do_getdirentries 0
-#else
-static void
-do_getdirentries(os_emul_data *emul,
- unsigned call,
- const int arg0,
- cpu *processor,
- unsigned_word cia)
-{
- int fd = cpu_registers(processor)->gpr[arg0];
- unsigned_word buf_addr = cpu_registers(processor)->gpr[arg0+1];
- char *buf;
- int nbytes = cpu_registers(processor)->gpr[arg0+2];
- unsigned_word basep_addr = cpu_registers(processor)->gpr[arg0+3];
- long basep;
- int status;
-#ifdef SYS_getdirentries
- SYS(getdirentries);
-#endif
- if (buf_addr != 0 && nbytes >= 0)
- buf = zalloc(nbytes);
- else
- buf = NULL;
- status = getdirentries(fd,
- (buf_addr == 0 ? NULL : buf),
- nbytes,
- (basep_addr == 0 ? NULL : &basep));
- emul_write_status(processor, status, errno);
- if (basep_addr != 0)
- emul_write_word(basep_addr, basep, processor, cia);
- if (status > 0)
- write_direntries(buf_addr, buf, status, processor, cia);
- if (buf != NULL)
- zfree(buf);
-}
-#endif
-
-
-static void
-do___syscall(os_emul_data *emul,
- unsigned call,
- const int arg0,
- cpu *processor,
- unsigned_word cia)
-{
- SYS(__syscall);
- emul_do_system_call(emul,
- emul->syscalls,
- cpu_registers(processor)->gpr[arg0],
- arg0 + 1,
- processor,
- cia);
-}
-
-#ifndef HAVE_LSEEK
-#define do_lseek 0
-#else
-static void
-do_lseek(os_emul_data *emul,
- unsigned call,
- const int arg0,
- cpu *processor,
- unsigned_word cia)
-{
- int fildes = cpu_registers(processor)->gpr[arg0];
- off_t offset = emul_read_gpr64(processor, arg0+2);
- int whence = cpu_registers(processor)->gpr[arg0+4];
- off_t status;
- SYS(lseek);
- status = lseek(fildes, offset, whence);
- if (status == -1)
- emul_write_status(processor, -1, errno);
- else {
- emul_write_status(processor, 0, 0); /* success */
- emul_write_gpr64(processor, 3, status);
- }
-}
-#endif
-
-static void
-do___sysctl(os_emul_data *emul,
- unsigned call,
- const int arg0,
- cpu *processor,
- unsigned_word cia)
-{
- /* call the arguments by their real name */
- unsigned_word name = cpu_registers(processor)->gpr[arg0];
- natural_word namelen = cpu_registers(processor)->gpr[arg0+1];
- unsigned_word oldp = cpu_registers(processor)->gpr[arg0+2];
- unsigned_word oldlenp = cpu_registers(processor)->gpr[arg0+3];
- natural_word oldlen;
- natural_word mib;
- natural_word int_val;
- SYS(__sysctl);
-
- /* pluck out the management information base id */
- if (namelen < 1)
- error("system_call()SYS___sysctl bad name[0]\n");
- mib = vm_data_map_read_word(cpu_data_map(processor),
- name,
- processor,
- cia);
- name += sizeof(mib);
-
- /* see what to do with it ... */
- switch ((int)mib) {
- case 6/*CTL_HW*/:
-#if WITH_NetBSD_HOST && (CTL_HW != 6)
-# error "CTL_HW"
-#endif
- if (namelen < 2)
- error("system_call()SYS___sysctl - CTL_HW - bad name[1]\n");
- mib = vm_data_map_read_word(cpu_data_map(processor),
- name,
- processor,
- cia);
- name += sizeof(mib);
- switch ((int)mib) {
- case 7/*HW_PAGESIZE*/:
-#if WITH_NetBSD_HOST && (HW_PAGESIZE != 7)
-# error "HW_PAGESIZE"
-#endif
- oldlen = vm_data_map_read_word(cpu_data_map(processor),
- oldlenp,
- processor,
- cia);
- if (sizeof(natural_word) > oldlen)
- error("system_call()sysctl - CTL_HW.HW_PAGESIZE - to small\n");
- int_val = 8192;
- oldlen = sizeof(int_val);
- emul_write_word(oldp, int_val, processor, cia);
- emul_write_word(oldlenp, oldlen, processor, cia);
- break;
- default:
- error("sysctl() CTL_HW.%d unknown\n", mib);
- break;
- }
- break;
- default:
- error("sysctl() name[0]=%d unknown\n", (int)mib);
- break;
- }
- emul_write_status(processor, 0, 0); /* always succeed */
-}
-
-
-
-static emul_syscall_descriptor netbsd_descriptors[] = {
- /* 0 */ { 0, "syscall" },
- /* 1 */ { do_exit, "exit" },
- /* 2 */ { 0, "fork" },
- /* 3 */ { do_read, "read" },
- /* 4 */ { do_write, "write" },
- /* 5 */ { do_open, "open" },
- /* 6 */ { do_close, "close" },
- /* 7 */ { 0, "wait4" },
- { 0, }, /* 8 is old creat */
- /* 9 */ { 0, "link" },
- /* 10 */ { 0, "unlink" },
- { 0, }, /* 11 is obsolete execv */
- /* 12 */ { 0, "chdir" },
- /* 13 */ { 0, "fchdir" },
- /* 14 */ { 0, "mknod" },
- /* 15 */ { 0, "chmod" },
- /* 16 */ { 0, "chown" },
- /* 17 */ { do_break, "break" },
- /* 18 */ { 0, "getfsstat" },
- { 0, }, /* 19 is old lseek */
- /* 20 */ { do_getpid, "getpid" },
- /* 21 */ { 0, "mount" },
- /* 22 */ { 0, "unmount" },
- /* 23 */ { 0, "setuid" },
- /* 24 */ { do_getuid, "getuid" },
- /* 25 */ { do_geteuid, "geteuid" },
- /* 26 */ { 0, "ptrace" },
- /* 27 */ { 0, "recvmsg" },
- /* 28 */ { 0, "sendmsg" },
- /* 29 */ { 0, "recvfrom" },
- /* 30 */ { 0, "accept" },
- /* 31 */ { 0, "getpeername" },
- /* 32 */ { 0, "getsockname" },
- /* 33 */ { 0, "access" },
- /* 34 */ { 0, "chflags" },
- /* 35 */ { 0, "fchflags" },
- /* 36 */ { 0, "sync" },
- /* 37 */ { do_kill, "kill" },
- { 0, }, /* 38 is old stat */
- /* 39 */ { 0, "getppid" },
- { 0, }, /* 40 is old lstat */
- /* 41 */ { do_dup, "dup" },
- /* 42 */ { 0, "pipe" },
- /* 43 */ { do_getegid, "getegid" },
- /* 44 */ { 0, "profil" },
- /* 45 */ { 0, "ktrace" },
- /* 46 */ { 0, "sigaction" },
- /* 47 */ { do_getgid, "getgid" },
- /* 48 */ { do_sigprocmask, "sigprocmask" },
- /* 49 */ { 0, "getlogin" },
- /* 50 */ { 0, "setlogin" },
- /* 51 */ { 0, "acct" },
- /* 52 */ { 0, "sigpending" },
- /* 53 */ { 0, "sigaltstack" },
- /* 54 */ { do_ioctl, "ioctl" },
- /* 55 */ { 0, "reboot" },
- /* 56 */ { 0, "revoke" },
- /* 57 */ { 0, "symlink" },
- /* 58 */ { 0, "readlink" },
- /* 59 */ { 0, "execve" },
- /* 60 */ { do_umask, "umask" },
- /* 61 */ { 0, "chroot" },
- { 0, }, /* 62 is old fstat */
- { 0, }, /* 63 is old getkerninfo */
- { 0, }, /* 64 is old getpagesize */
- /* 65 */ { 0, "msync" },
- /* 66 */ { 0, "vfork" },
- { 0, }, /* 67 is obsolete vread */
- { 0, }, /* 68 is obsolete vwrite */
- /* 69 */ { 0, "sbrk" },
- /* 70 */ { 0, "sstk" },
- { 0, }, /* 71 is old mmap */
- /* 72 */ { 0, "vadvise" },
- /* 73 */ { 0, "munmap" },
- /* 74 */ { 0, "mprotect" },
- /* 75 */ { 0, "madvise" },
- { 0, }, /* 76 is obsolete vhangup */
- { 0, }, /* 77 is obsolete vlimit */
- /* 78 */ { 0, "mincore" },
- /* 79 */ { 0, "getgroups" },
- /* 80 */ { 0, "setgroups" },
- /* 81 */ { 0, "getpgrp" },
- /* 82 */ { 0, "setpgid" },
- /* 83 */ { 0, "setitimer" },
- { 0, }, /* 84 is old wait */
- /* 85 */ { 0, "swapon" },
- /* 86 */ { 0, "getitimer" },
- { 0, }, /* 87 is old gethostname */
- { 0, }, /* 88 is old sethostname */
- { 0, }, /* 89 is old getdtablesize */
- { do_dup2, "dup2" },
- { 0, }, /* 91 */
- /* 92 */ { do_fcntl, "fcntl" },
- /* 93 */ { 0, "select" },
- { 0, }, /* 94 */
- /* 95 */ { 0, "fsync" },
- /* 96 */ { 0, "setpriority" },
- /* 97 */ { 0, "socket" },
- /* 98 */ { 0, "connect" },
- { 0, }, /* 99 is old accept */
- /* 100 */ { 0, "getpriority" },
- { 0, }, /* 101 is old send */
- { 0, }, /* 102 is old recv */
- /* 103 */ { 0, "sigreturn" },
- /* 104 */ { 0, "bind" },
- /* 105 */ { 0, "setsockopt" },
- /* 106 */ { 0, "listen" },
- { 0, }, /* 107 is obsolete vtimes */
- { 0, }, /* 108 is old sigvec */
- { 0, }, /* 109 is old sigblock */
- { 0, }, /* 110 is old sigsetmask */
- /* 111 */ { 0, "sigsuspend" },
- { 0, }, /* 112 is old sigstack */
- { 0, }, /* 113 is old recvmsg */
- { 0, }, /* 114 is old sendmsg */
- /* - is obsolete vtrace */ { 0, "vtrace 115" },
- /* 116 */ { do_gettimeofday, "gettimeofday" },
- /* 117 */ { do_getrusage, "getrusage" },
- /* 118 */ { 0, "getsockopt" },
- /* 119 */ { 0, "resuba" },
- /* 120 */ { 0, "readv" },
- /* 121 */ { 0, "writev" },
- /* 122 */ { 0, "settimeofday" },
- /* 123 */ { 0, "fchown" },
- /* 124 */ { 0, "fchmod" },
- { 0, }, /* 125 is old recvfrom */
- { 0, }, /* 126 is old setreuid */
- { 0, }, /* 127 is old setregid */
- /* 128 */ { 0, "rename" },
- { 0, }, /* 129 is old truncate */
- { 0, }, /* 130 is old ftruncate */
- /* 131 */ { 0, "flock" },
- /* 132 */ { 0, "mkfifo" },
- /* 133 */ { 0, "sendto" },
- /* 134 */ { 0, "shutdown" },
- /* 135 */ { 0, "socketpair" },
- /* 136 */ { 0, "mkdir" },
- /* 137 */ { 0, "rmdir" },
- /* 138 */ { 0, "utimes" },
- { 0, }, /* 139 is obsolete 4.2 sigreturn */
- /* 140 */ { 0, "adjtime" },
- { 0, }, /* 141 is old getpeername */
- { 0, }, /* 142 is old gethostid */
- { 0, }, /* 143 is old sethostid */
- { 0, }, /* 144 is old getrlimit */
- { 0, }, /* 145 is old setrlimit */
- { 0, }, /* 146 is old killpg */
- /* 147 */ { 0, "setsid" },
- /* 148 */ { 0, "quotactl" },
- { 0, }, /* 149 is old quota */
- { 0, }, /* 150 is old getsockname */
- { 0, }, /* 151 */
- { 0, }, /* 152 */
- { 0, }, /* 153 */
- { 0, }, /* 154 */
- /* 155 */ { 0, "nfssvc" },
- { 0, }, /* 156 is old getdirentries */
- /* 157 */ { 0, "statfs" },
- /* 158 */ { do_fstatfs, "fstatfs" },
- { 0, }, /* 159 */
- { 0, }, /* 160 */
- /* 161 */ { 0, "getfh" },
- { 0, }, /* 162 is old getdomainname */
- { 0, }, /* 163 is old setdomainname */
- { 0, }, /* 164 is old uname */
- /* 165 */ { 0, "sysarch" },
- { 0, }, /* 166 */
- { 0, }, /* 167 */
- { 0, }, /* 168 */
- /* 169 */ { 0, "semsys" },
- /* 170 */ { 0, "msgsys" },
- /* 171 */ { 0, "shmsys" },
- { 0, }, /* 172 */
- { 0, }, /* 173 */
- { 0, }, /* 174 */
- { 0, }, /* 175 */
- { 0, }, /* 176 */
- { 0, }, /* 177 */
- { 0, }, /* 178 */
- { 0, }, /* 179 */
- { 0, }, /* 180 */
- /* 181 */ { 0, "setgid" },
- /* 182 */ { 0, "setegid" },
- /* 183 */ { 0, "seteuid" },
- /* 184 */ { 0, "lfs_bmapv" },
- /* 185 */ { 0, "lfs_markv" },
- /* 186 */ { 0, "lfs_segclean" },
- /* 187 */ { 0, "lfs_segwait" },
- /* 188 */ { do_stat, "stat" },
- /* 189 */ { do_fstat, "fstat" },
- /* 190 */ { do_lstat, "lstat" },
- /* 191 */ { 0, "pathconf" },
- /* 192 */ { 0, "fpathconf" },
- { 0, }, /* 193 */
- /* 194 */ { 0, "getrlimit" },
- /* 195 */ { 0, "setrlimit" },
- /* 196 */ { do_getdirentries, "getdirentries" },
- /* 197 */ { 0, "mmap" },
- /* 198 */ { do___syscall, "__syscall" },
- /* 199 */ { do_lseek, "lseek" },
- /* 200 */ { 0, "truncate" },
- /* 201 */ { 0, "ftruncate" },
- /* 202 */ { do___sysctl, "__sysctl" },
- /* 203 */ { 0, "mlock" },
- /* 204 */ { 0, "munlock" },
-};
-
-static char *(netbsd_error_names[]) = {
- /* 0 */ "ESUCCESS",
- /* 1 */ "EPERM",
- /* 2 */ "ENOENT",
- /* 3 */ "ESRCH",
- /* 4 */ "EINTR",
- /* 5 */ "EIO",
- /* 6 */ "ENXIO",
- /* 7 */ "E2BIG",
- /* 8 */ "ENOEXEC",
- /* 9 */ "EBADF",
- /* 10 */ "ECHILD",
- /* 11 */ "EDEADLK",
- /* 12 */ "ENOMEM",
- /* 13 */ "EACCES",
- /* 14 */ "EFAULT",
- /* 15 */ "ENOTBLK",
- /* 16 */ "EBUSY",
- /* 17 */ "EEXIST",
- /* 18 */ "EXDEV",
- /* 19 */ "ENODEV",
- /* 20 */ "ENOTDIR",
- /* 21 */ "EISDIR",
- /* 22 */ "EINVAL",
- /* 23 */ "ENFILE",
- /* 24 */ "EMFILE",
- /* 25 */ "ENOTTY",
- /* 26 */ "ETXTBSY",
- /* 27 */ "EFBIG",
- /* 28 */ "ENOSPC",
- /* 29 */ "ESPIPE",
- /* 30 */ "EROFS",
- /* 31 */ "EMLINK",
- /* 32 */ "EPIPE",
- /* 33 */ "EDOM",
- /* 34 */ "ERANGE",
- /* 35 */ "EAGAIN",
- /* 36 */ "EINPROGRESS",
- /* 37 */ "EALREADY",
- /* 38 */ "ENOTSOCK",
- /* 39 */ "EDESTADDRREQ",
- /* 40 */ "EMSGSIZE",
- /* 41 */ "EPROTOTYPE",
- /* 42 */ "ENOPROTOOPT",
- /* 43 */ "EPROTONOSUPPORT",
- /* 44 */ "ESOCKTNOSUPPORT",
- /* 45 */ "EOPNOTSUPP",
- /* 46 */ "EPFNOSUPPORT",
- /* 47 */ "EAFNOSUPPORT",
- /* 48 */ "EADDRINUSE",
- /* 49 */ "EADDRNOTAVAIL",
- /* 50 */ "ENETDOWN",
- /* 51 */ "ENETUNREACH",
- /* 52 */ "ENETRESET",
- /* 53 */ "ECONNABORTED",
- /* 54 */ "ECONNRESET",
- /* 55 */ "ENOBUFS",
- /* 56 */ "EISCONN",
- /* 57 */ "ENOTCONN",
- /* 58 */ "ESHUTDOWN",
- /* 59 */ "ETOOMANYREFS",
- /* 60 */ "ETIMEDOUT",
- /* 61 */ "ECONNREFUSED",
- /* 62 */ "ELOOP",
- /* 63 */ "ENAMETOOLONG",
- /* 64 */ "EHOSTDOWN",
- /* 65 */ "EHOSTUNREACH",
- /* 66 */ "ENOTEMPTY",
- /* 67 */ "EPROCLIM",
- /* 68 */ "EUSERS",
- /* 69 */ "EDQUOT",
- /* 70 */ "ESTALE",
- /* 71 */ "EREMOTE",
- /* 72 */ "EBADRPC",
- /* 73 */ "ERPCMISMATCH",
- /* 74 */ "EPROGUNAVAIL",
- /* 75 */ "EPROGMISMATCH",
- /* 76 */ "EPROCUNAVAIL",
- /* 77 */ "ENOLCK",
- /* 78 */ "ENOSYS",
- /* 79 */ "EFTYPE",
- /* 80 */ "EAUTH",
- /* 81 */ "ENEEDAUTH",
- /* 81 */ "ELAST",
-};
-
-static char *(netbsd_signal_names[]) = {
- /* 0 */ 0,
- /* 1 */ "SIGHUP",
- /* 2 */ "SIGINT",
- /* 3 */ "SIGQUIT",
- /* 4 */ "SIGILL",
- /* 5 */ "SIGTRAP",
- /* 6 */ "SIGABRT",
- /* 7 */ "SIGEMT",
- /* 8 */ "SIGFPE",
- /* 9 */ "SIGKILL",
- /* 10 */ "SIGBUS",
- /* 11 */ "SIGSEGV",
- /* 12 */ "SIGSYS",
- /* 13 */ "SIGPIPE",
- /* 14 */ "SIGALRM",
- /* 15 */ "SIGTERM",
- /* 16 */ "SIGURG",
- /* 17 */ "SIGSTOP",
- /* 18 */ "SIGTSTP",
- /* 19 */ "SIGCONT",
- /* 20 */ "SIGCHLD",
- /* 21 */ "SIGTTIN",
- /* 22 */ "SIGTTOU",
- /* 23 */ "SIGIO",
- /* 24 */ "SIGXCPU",
- /* 25 */ "SIGXFSZ",
- /* 26 */ "SIGVTALRM",
- /* 27 */ "SIGPROF",
- /* 28 */ "SIGWINCH",
- /* 29 */ "SIGINFO",
- /* 30 */ "SIGUSR1",
- /* 31 */ "SIGUSR2",
-};
-
-static emul_syscall emul_netbsd_syscalls = {
- netbsd_descriptors,
- sizeof(netbsd_descriptors) / sizeof(netbsd_descriptors[0]),
- netbsd_error_names,
- sizeof(netbsd_error_names) / sizeof(netbsd_error_names[0]),
- netbsd_signal_names,
- sizeof(netbsd_signal_names) / sizeof(netbsd_signal_names[0]),
-};
-
-
-/* NetBSD's os_emul interface, most are just passed on to the generic
- syscall stuff */
-
-static os_emul_data *
-emul_netbsd_create(device *root,
- bfd *image,
- const char *name)
-{
- unsigned_word top_of_stack;
- unsigned stack_size;
- int elf_binary;
- os_emul_data *bsd_data;
- device *vm;
-
- /* check that this emulation is really for us */
- if (name != NULL && strcmp(name, "netbsd") != 0)
- return NULL;
- if (image == NULL)
- return NULL;
-
-
- /* merge any emulation specific entries into the device tree */
-
- /* establish a few defaults */
- if (image->xvec->flavour == bfd_target_elf_flavour) {
- elf_binary = 1;
- top_of_stack = 0xe0000000;
- stack_size = 0x00100000;
- }
- else {
- elf_binary = 0;
- top_of_stack = 0x20000000;
- stack_size = 0x00100000;
- }
-
- /* options */
- emul_add_tree_options(root, image, "netbsd",
- (WITH_ENVIRONMENT == USER_ENVIRONMENT
- ? "user" : "virtual"),
- 0 /*oea-interrupt-prefix*/);
-
- /* virtual memory - handles growth of stack/heap */
- vm = tree_parse(root, "/openprom/vm");
- tree_parse(vm, "./stack-base 0x%lx",
- (unsigned long)(top_of_stack - stack_size));
- tree_parse(vm, "./nr-bytes 0x%x", stack_size);
-
- tree_parse(root, "/openprom/vm/map-binary/file-name %s",
- bfd_get_filename(image));
-
- /* finish the init */
- tree_parse(root, "/openprom/init/register/pc 0x%lx",
- (unsigned long)bfd_get_start_address(image));
- tree_parse(root, "/openprom/init/register/sp 0x%lx",
- (unsigned long)top_of_stack);
- tree_parse(root, "/openprom/init/register/msr 0x%x",
- ((tree_find_boolean_property(root, "/options/little-endian?")
- ? msr_little_endian_mode
- : 0)
- | (tree_find_boolean_property(root, "/openprom/options/floating-point?")
- ? (msr_floating_point_available
- | msr_floating_point_exception_mode_0
- | msr_floating_point_exception_mode_1)
- : 0)));
- tree_parse(root, "/openprom/init/stack/stack-type %s",
- (elf_binary ? "ppc-elf" : "ppc-xcoff"));
-
- /* finally our emulation data */
- bsd_data = ZALLOC(os_emul_data);
- bsd_data->vm = vm;
- bsd_data->syscalls = &emul_netbsd_syscalls;
- return bsd_data;
-}
-
-static void
-emul_netbsd_init(os_emul_data *emul_data,
- int nr_cpus)
-{
- /* nothing yet */
-}
-
-static void
-emul_netbsd_system_call(cpu *processor,
- unsigned_word cia,
- os_emul_data *emul_data)
-{
- emul_do_system_call(emul_data,
- emul_data->syscalls,
- cpu_registers(processor)->gpr[0],
- 3, /*r3 contains arg0*/
- processor,
- cia);
-}
-
-const os_emul emul_netbsd = {
- "netbsd",
- emul_netbsd_create,
- emul_netbsd_init,
- emul_netbsd_system_call,
- 0, /*instruction_call*/
- 0 /*data*/
-};
-
-#endif _EMUL_NETBSD_C_
diff --git a/sim/ppc/emul_netbsd.h b/sim/ppc/emul_netbsd.h
deleted file mode 100644
index f9a3e85e8be..00000000000
--- a/sim/ppc/emul_netbsd.h
+++ /dev/null
@@ -1,27 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1995, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-#ifndef _EMUL_NETBSD_H_
-#define _EMUL_NETBSD_H_
-
-extern const os_emul emul_netbsd;
-
-#endif
diff --git a/sim/ppc/emul_unix.c b/sim/ppc/emul_unix.c
deleted file mode 100644
index d5e56296105..00000000000
--- a/sim/ppc/emul_unix.c
+++ /dev/null
@@ -1,2812 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1996-1998, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-#ifndef _EMUL_UNIX_C_
-#define _EMUL_UNIX_C_
-
-
-/* Note: this module is called via a table. There is no benefit in
- making it inline */
-
-#include "emul_generic.h"
-#include "emul_unix.h"
-
-#ifdef HAVE_STRING_H
-#include <string.h>
-#else
-#ifdef HAVE_STRINGS_H
-#include <strings.h>
-#endif
-#endif
-
-#ifdef HAVE_SYS_TYPES_H
-#include <sys/types.h>
-#endif
-
-#ifdef HAVE_SYS_TYPES_H
-#include <sys/stat.h>
-#else
-#undef HAVE_STAT
-#undef HAVE_LSTAT
-#undef HAVE_FSTAT
-#endif
-
-#include <stdio.h>
-#include <signal.h>
-#include <errno.h>
-
-#ifdef HAVE_FCNTL_H
-#include <fcntl.h>
-#endif
-
-#ifdef HAVE_SYS_PARAM_H
-#include <sys/param.h>
-#endif
-
-#ifdef HAVE_SYS_TIME_H
-#include <sys/time.h>
-#endif
-
-#ifndef HAVE_TERMIOS_STRUCTURE
-#undef HAVE_SYS_TERMIOS_H
-#undef HAVE_TCGETATTR
-#else
-#ifndef HAVE_SYS_TERMIOS_H
-#undef HAVE_TERMIOS_STRUCTURE
-#endif
-#endif
-
-#ifdef HAVE_TERMIOS_STRUCTURE
-#include <sys/termios.h>
-
-/* If we have TERMIOS, use that for the termio structure, since some systems
- don't like including both sys/termios.h and sys/termio.h at the same
- time. */
-#undef HAVE_TERMIO_STRUCTURE
-#undef TCGETA
-#undef termio
-#define termio termios
-#endif
-
-#ifndef HAVE_TERMIO_STRUCTURE
-#undef HAVE_SYS_TERMIO_H
-#else
-#ifndef HAVE_SYS_TERMIO_H
-#undef HAVE_TERMIO_STRUCTURE
-#endif
-#endif
-
-#ifdef HAVE_TERMIO_STRUCTURE
-#include <sys/termio.h>
-#endif
-
-#ifdef HAVE_GETRUSAGE
-#ifndef HAVE_SYS_RESOURCE_H
-#undef HAVE_GETRUSAGE
-#endif
-#endif
-
-#ifdef HAVE_GETRUSAGE
-#include <sys/resource.h>
-int getrusage();
-#endif
-
-#if HAVE_DIRENT_H
-# include <dirent.h>
-# define NAMLEN(dirent) strlen((dirent)->d_name)
-#else
-# define dirent direct
-# define NAMLEN(dirent) (dirent)->d_namlen
-# if HAVE_SYS_NDIR_H
-# include <sys/ndir.h>
-# endif
-# if HAVE_SYS_DIR_H
-# include <sys/dir.h>
-# endif
-# if HAVE_NDIR_H
-# include <ndir.h>
-# endif
-#endif
-
-#ifdef HAVE_UNISTD_H
-#undef MAXPATHLEN /* sys/param.h might define this also */
-#include <unistd.h>
-#endif
-
-#ifdef HAVE_STDLIB_H
-#include <stdlib.h>
-#endif
-
-#if defined(BSD) && !defined(errno) && (BSD < 199306) /* here BSD as just a bug */
-extern int errno;
-#endif
-
-#ifndef STATIC_INLINE_EMUL_UNIX
-#define STATIC_INLINE_EMUL_UNIX STATIC_INLINE
-#endif
-
-#ifndef PATH_MAX
-#define PATH_MAX 1024
-#endif
-
-#ifndef EINVAL
-#define EINVAL -1
-#endif
-
-/* UNIX's idea of what is needed to implement emulations */
-
-struct _os_emul_data {
- device *vm;
- emul_syscall *syscalls;
-};
-
-
-/* Emulation of simple UNIX system calls that are common on all systems. */
-
-/* Structures that are common agmonst the UNIX varients */
-struct unix_timeval {
- signed32 tv_sec; /* seconds */
- signed32 tv_usec; /* microseconds */
-};
-
-struct unix_timezone {
- signed32 tz_minuteswest; /* minutes west of Greenwich */
- signed32 tz_dsttime; /* type of dst correction */
-};
-
-#define UNIX_RUSAGE_SELF 0
-#define UNIX_RUSAGE_CHILDREN (-1)
-#define UNIX_RUSAGE_BOTH (-2) /* sys_wait4() uses this */
-
-struct unix_rusage {
- struct unix_timeval ru_utime; /* user time used */
- struct unix_timeval ru_stime; /* system time used */
- signed32 ru_maxrss; /* maximum resident set size */
- signed32 ru_ixrss; /* integral shared memory size */
- signed32 ru_idrss; /* integral unshared data size */
- signed32 ru_isrss; /* integral unshared stack size */
- signed32 ru_minflt; /* any page faults not requiring I/O */
- signed32 ru_majflt; /* any page faults requiring I/O */
- signed32 ru_nswap; /* swaps */
- signed32 ru_inblock; /* block input operations */
- signed32 ru_oublock; /* block output operations */
- signed32 ru_msgsnd; /* messages sent */
- signed32 ru_msgrcv; /* messages received */
- signed32 ru_nsignals; /* signals received */
- signed32 ru_nvcsw; /* voluntary context switches */
- signed32 ru_nivcsw; /* involuntary " */
-};
-
-
-static void
-do_unix_exit(os_emul_data *emul,
- unsigned call,
- const int arg0,
- cpu *processor,
- unsigned_word cia)
-{
- int status = (int)cpu_registers(processor)->gpr[arg0];
- if (WITH_TRACE && ppc_trace[trace_os_emul])
- printf_filtered ("%d)\n", status);
-
- cpu_halt(processor, cia, was_exited, status);
-}
-
-
-static void
-do_unix_read(os_emul_data *emul,
- unsigned call,
- const int arg0,
- cpu *processor,
- unsigned_word cia)
-{
- void *scratch_buffer;
- int d = (int)cpu_registers(processor)->gpr[arg0];
- unsigned_word buf = cpu_registers(processor)->gpr[arg0+1];
- int nbytes = cpu_registers(processor)->gpr[arg0+2];
- int status;
-
- if (WITH_TRACE && ppc_trace[trace_os_emul])
- printf_filtered ("%d, 0x%lx, %d", d, (long)buf, nbytes);
-
- /* get a tempoary bufer */
- scratch_buffer = zalloc(nbytes);
-
- /* check if buffer exists by reading it */
- emul_read_buffer(scratch_buffer, buf, nbytes, processor, cia);
-
- /* read */
- status = read (d, scratch_buffer, nbytes);
-
- emul_write_status(processor, status, errno);
- if (status > 0)
- emul_write_buffer(scratch_buffer, buf, status, processor, cia);
-
- zfree(scratch_buffer);
-}
-
-
-static void
-do_unix_write(os_emul_data *emul,
- unsigned call,
- const int arg0,
- cpu *processor,
- unsigned_word cia)
-{
- void *scratch_buffer = NULL;
- int d = (int)cpu_registers(processor)->gpr[arg0];
- unsigned_word buf = cpu_registers(processor)->gpr[arg0+1];
- int nbytes = cpu_registers(processor)->gpr[arg0+2];
- int status;
-
- if (WITH_TRACE && ppc_trace[trace_os_emul])
- printf_filtered ("%d, 0x%lx, %d", d, (long)buf, nbytes);
-
- /* get a tempoary bufer */
- scratch_buffer = zalloc(nbytes); /* FIXME - nbytes == 0 */
-
- /* copy in */
- emul_read_buffer(scratch_buffer, buf, nbytes,
- processor, cia);
-
- /* write */
- status = write(d, scratch_buffer, nbytes);
- emul_write_status(processor, status, errno);
- zfree(scratch_buffer);
-
- flush_stdoutput();
-}
-
-
-static void
-do_unix_open(os_emul_data *emul,
- unsigned call,
- const int arg0,
- cpu *processor,
- unsigned_word cia)
-{
- unsigned_word path_addr = cpu_registers(processor)->gpr[arg0];
- char path_buf[PATH_MAX];
- char *path = emul_read_string(path_buf, path_addr, PATH_MAX, processor, cia);
- int flags = (int)cpu_registers(processor)->gpr[arg0+1];
- int mode = (int)cpu_registers(processor)->gpr[arg0+2];
- int status;
-
- if (WITH_TRACE && ppc_trace[trace_os_emul])
- printf_filtered ("0x%lx [%s], 0x%x, 0x%x", (long)path_addr, path, flags, mode);
-
- status = open(path, flags, mode);
- emul_write_status(processor, status, errno);
-}
-
-
-static void
-do_unix_close(os_emul_data *emul,
- unsigned call,
- const int arg0,
- cpu *processor,
- unsigned_word cia)
-{
- int d = (int)cpu_registers(processor)->gpr[arg0];
- int status;
-
- if (WITH_TRACE && ppc_trace[trace_os_emul])
- printf_filtered ("%d", d);
-
- status = close(d);
- emul_write_status(processor, status, errno);
-}
-
-
-static void
-do_unix_break(os_emul_data *emul,
- unsigned call,
- const int arg0,
- cpu *processor,
- unsigned_word cia)
-{
- /* just pass this onto the `vm' device */
- unsigned_word new_break = cpu_registers(processor)->gpr[arg0];
- int status;
-
- if (WITH_TRACE && ppc_trace[trace_os_emul])
- printf_filtered ("0x%lx", (long)cpu_registers(processor)->gpr[arg0]);
-
- status = device_ioctl(emul->vm,
- processor,
- cia,
- device_ioctl_break,
- new_break); /*ioctl-data*/
-
- emul_write_status(processor, 0, status);
-}
-
-#ifndef HAVE_ACCESS
-#define do_unix_access 0
-#else
-static void
-do_unix_access(os_emul_data *emul,
- unsigned call,
- const int arg0,
- cpu *processor,
- unsigned_word cia)
-{
- unsigned_word path_addr = cpu_registers(processor)->gpr[arg0];
- char path_buf[PATH_MAX];
- char *path = emul_read_string(path_buf, path_addr, PATH_MAX, processor, cia);
- int mode = (int)cpu_registers(processor)->gpr[arg0+1];
- int status;
-
- if (WITH_TRACE && ppc_trace[trace_os_emul])
- printf_filtered ("0x%lx [%s], 0x%x [0%o]", (long)path_addr, path, mode, mode);
-
- status = access(path, mode);
- emul_write_status(processor, status, errno);
-}
-#endif
-
-#ifndef HAVE_GETPID
-#define do_unix_getpid 0
-#else
-static void
-do_unix_getpid(os_emul_data *emul,
- unsigned call,
- const int arg0,
- cpu *processor,
- unsigned_word cia)
-{
- pid_t status = getpid();
- emul_write_status(processor, (int)status, errno);
-}
-#endif
-
-#ifndef HAVE_GETPPID
-#define do_unix_getppid 0
-#else
-static void
-do_unix_getppid(os_emul_data *emul,
- unsigned call,
- const int arg0,
- cpu *processor,
- unsigned_word cia)
-{
- pid_t status = getppid();
- emul_write_status(processor, (int)status, errno);
-}
-#endif
-
-#if !defined(HAVE_GETPID) || !defined(HAVE_GETPPID)
-#define do_unix_getpid2 0
-#else
-static void
-do_unix_getpid2(os_emul_data *emul,
- unsigned call,
- const int arg0,
- cpu *processor,
- unsigned_word cia)
-{
- int pid = (int)getpid();
- int ppid = (int)getppid();
- emul_write2_status(processor, pid, ppid, errno);
-}
-#endif
-
-#if !defined(HAVE_GETUID) || !defined(HAVE_GETEUID)
-#define do_unix_getuid2 0
-#else
-static void
-do_unix_getuid2(os_emul_data *emul,
- unsigned call,
- const int arg0,
- cpu *processor,
- unsigned_word cia)
-{
- uid_t uid = getuid();
- uid_t euid = geteuid();
- emul_write2_status(processor, (int)uid, (int)euid, errno);
-}
-#endif
-
-#ifndef HAVE_GETUID
-#define do_unix_getuid 0
-#else
-static void
-do_unix_getuid(os_emul_data *emul,
- unsigned call,
- const int arg0,
- cpu *processor,
- unsigned_word cia)
-{
- uid_t status = getuid();
- emul_write_status(processor, (int)status, errno);
-}
-#endif
-
-#ifndef HAVE_GETEUID
-#define do_unix_geteuid 0
-#else
-static void
-do_unix_geteuid(os_emul_data *emul,
- unsigned call,
- const int arg0,
- cpu *processor,
- unsigned_word cia)
-{
- uid_t status = geteuid();
- emul_write_status(processor, (int)status, errno);
-}
-#endif
-
-#if 0
-#ifndef HAVE_KILL
-#define do_unix_kill 0
-#else
-static void
-do_unix_kill(os_emul_data *emul,
- unsigned call,
- const int arg0,
- cpu *processor,
- unsigned_word cia)
-{
- pid_t pid = cpu_registers(processor)->gpr[arg0];
- int sig = cpu_registers(processor)->gpr[arg0+1];
-
- if (WITH_TRACE && ppc_trace[trace_os_emul])
- printf_filtered ("%d, %d", (int)pid, sig);
-
- printf_filtered("SYS_kill at 0x%lx - more to this than just being killed\n",
- (long)cia);
-
- cpu_halt(processor, cia, was_signalled, sig);
-}
-#endif
-#endif
-
-#ifndef HAVE_DUP
-#define do_unix_dup 0
-#else
-static void
-do_unix_dup(os_emul_data *emul,
- unsigned call,
- const int arg0,
- cpu *processor,
- unsigned_word cia)
-{
- int oldd = cpu_registers(processor)->gpr[arg0];
- int status = dup(oldd);
- int err = errno;
-
- if (WITH_TRACE && ppc_trace[trace_os_emul])
- printf_filtered ("%d", oldd);
-
- emul_write_status(processor, status, err);
-}
-#endif
-
-#ifndef HAVE_DUP2
-#define do_unix_dup2 0
-#else
-static void
-do_unix_dup2(os_emul_data *emul,
- unsigned call,
- const int arg0,
- cpu *processor,
- unsigned_word cia)
-{
- int oldd = cpu_registers(processor)->gpr[arg0];
- int newd = cpu_registers(processor)->gpr[arg0+1];
- int status = dup2(oldd, newd);
- int err = errno;
-
- if (WITH_TRACE && ppc_trace[trace_os_emul])
- printf_filtered ("%d, %d", oldd, newd);
-
- emul_write_status(processor, status, err);
-}
-#endif
-
-#ifndef HAVE_LSEEK
-#define do_unix_lseek 0
-#else
-static void
-do_unix_lseek(os_emul_data *emul,
- unsigned call,
- const int arg0,
- cpu *processor,
- unsigned_word cia)
-{
- int fildes = (int)cpu_registers(processor)->gpr[arg0];
- off_t offset = (off_t)cpu_registers(processor)->gpr[arg0+1];
- int whence = (int)cpu_registers(processor)->gpr[arg0+2];
- off_t status;
-
- if (WITH_TRACE && ppc_trace[trace_os_emul])
- printf_filtered ("%d %ld %d", fildes, (long)offset, whence);
-
- status = lseek(fildes, offset, whence);
- emul_write_status(processor, (int)status, errno);
-}
-#endif
-
-
-#if !defined(HAVE_GETGID) || !defined(HAVE_GETEGID)
-#define do_unix_getgid2 0
-#else
-static void
-do_unix_getgid2(os_emul_data *emul,
- unsigned call,
- const int arg0,
- cpu *processor,
- unsigned_word cia)
-{
- gid_t gid = getgid();
- gid_t egid = getegid();
- emul_write2_status(processor, (int)gid, (int)egid, errno);
-}
-#endif
-
-#ifndef HAVE_GETGID
-#define do_unix_getgid 0
-#else
-static void
-do_unix_getgid(os_emul_data *emul,
- unsigned call,
- const int arg0,
- cpu *processor,
- unsigned_word cia)
-{
- gid_t status = getgid();
- emul_write_status(processor, (int)status, errno);
-}
-#endif
-
-#ifndef HAVE_GETEGID
-#define do_unix_getegid 0
-#else
-static void
-do_unix_getegid(os_emul_data *emul,
- unsigned call,
- const int arg0,
- cpu *processor,
- unsigned_word cia)
-{
- gid_t status = getegid();
- emul_write_status(processor, (int)status, errno);
-}
-#endif
-
-#ifndef HAVE_UMASK
-#define do_unix_umask 0
-#else
-static void
-do_unix_umask(os_emul_data *emul,
- unsigned call,
- const int arg0,
- cpu *processor,
- unsigned_word cia)
-{
- mode_t mask = (mode_t)cpu_registers(processor)->gpr[arg0];
- int status = umask(mask);
-
- if (WITH_TRACE && ppc_trace[trace_os_emul])
- printf_filtered ("0%o", (unsigned int)mask);
-
- emul_write_status(processor, status, errno);
-}
-#endif
-
-#ifndef HAVE_CHDIR
-#define do_unix_chdir 0
-#else
-static void
-do_unix_chdir(os_emul_data *emul,
- unsigned call,
- const int arg0,
- cpu *processor,
- unsigned_word cia)
-{
- unsigned_word path_addr = cpu_registers(processor)->gpr[arg0];
- char path_buf[PATH_MAX];
- char *path = emul_read_string(path_buf, path_addr, PATH_MAX, processor, cia);
- int status;
-
- if (WITH_TRACE && ppc_trace[trace_os_emul])
- printf_filtered ("0x%lx [%s]", (long)path_addr, path);
-
- status = chdir(path);
- emul_write_status(processor, status, errno);
-}
-#endif
-
-#ifndef HAVE_LINK
-#define do_unix_link 0
-#else
-static void
-do_unix_link(os_emul_data *emul,
- unsigned call,
- const int arg0,
- cpu *processor,
- unsigned_word cia)
-{
- unsigned_word path1_addr = cpu_registers(processor)->gpr[arg0];
- char path1_buf[PATH_MAX];
- char *path1 = emul_read_string(path1_buf, path1_addr, PATH_MAX, processor, cia);
- unsigned_word path2_addr = cpu_registers(processor)->gpr[arg0+1];
- char path2_buf[PATH_MAX];
- char *path2 = emul_read_string(path2_buf, path2_addr, PATH_MAX, processor, cia);
- int status;
-
- if (WITH_TRACE && ppc_trace[trace_os_emul])
- printf_filtered ("0x%lx [%s], 0x%lx [%s]", (long)path1_addr, path1, (long)path2_addr, path2);
-
- status = link(path1, path2);
- emul_write_status(processor, status, errno);
-}
-#endif
-
-#ifndef HAVE_SYMLINK
-#define do_unix_symlink 0
-#else
-static void
-do_unix_symlink(os_emul_data *emul,
- unsigned call,
- const int arg0,
- cpu *processor,
- unsigned_word cia)
-{
- unsigned_word path1_addr = cpu_registers(processor)->gpr[arg0];
- char path1_buf[PATH_MAX];
- char *path1 = emul_read_string(path1_buf, path1_addr, PATH_MAX, processor, cia);
- unsigned_word path2_addr = cpu_registers(processor)->gpr[arg0+1];
- char path2_buf[PATH_MAX];
- char *path2 = emul_read_string(path2_buf, path2_addr, PATH_MAX, processor, cia);
- int status;
-
- if (WITH_TRACE && ppc_trace[trace_os_emul])
- printf_filtered ("0x%lx [%s], 0x%lx [%s]", (long)path1_addr, path1, (long)path2_addr, path2);
-
- status = symlink(path1, path2);
- emul_write_status(processor, status, errno);
-}
-#endif
-
-#ifndef HAVE_UNLINK
-#define do_unix_unlink 0
-#else
-static void
-do_unix_unlink(os_emul_data *emul,
- unsigned call,
- const int arg0,
- cpu *processor,
- unsigned_word cia)
-{
- unsigned_word path_addr = cpu_registers(processor)->gpr[arg0];
- char path_buf[PATH_MAX];
- char *path = emul_read_string(path_buf, path_addr, PATH_MAX, processor, cia);
- int status;
-
- if (WITH_TRACE && ppc_trace[trace_os_emul])
- printf_filtered ("0x%lx [%s]", (long)path_addr, path);
-
- status = unlink(path);
- emul_write_status(processor, status, errno);
-}
-#endif
-
-#ifndef HAVE_MKDIR
-#define do_unix_mkdir 0
-#else
-static void
-do_unix_mkdir(os_emul_data *emul,
- unsigned call,
- const int arg0,
- cpu *processor,
- unsigned_word cia)
-{
- unsigned_word path_addr = cpu_registers(processor)->gpr[arg0];
- char path_buf[PATH_MAX];
- char *path = emul_read_string(path_buf, path_addr, PATH_MAX, processor, cia);
- int mode = (int)cpu_registers(processor)->gpr[arg0+1];
- int status;
-
- if (WITH_TRACE && ppc_trace[trace_os_emul])
- printf_filtered ("0x%lx [%s], 0%3o", (long)path_addr, path, mode);
-
- status = mkdir(path, mode);
- emul_write_status(processor, status, errno);
-}
-#endif
-
-#ifndef HAVE_RMDIR
-#define do_unix_rmdir 0
-#else
-static void
-do_unix_rmdir(os_emul_data *emul,
- unsigned call,
- const int arg0,
- cpu *processor,
- unsigned_word cia)
-{
- unsigned_word path_addr = cpu_registers(processor)->gpr[arg0];
- char path_buf[PATH_MAX];
- char *path = emul_read_string(path_buf, path_addr, PATH_MAX, processor, cia);
- int status;
-
- if (WITH_TRACE && ppc_trace[trace_os_emul])
- printf_filtered ("0x%lx [%s]", (long)path_addr, path);
-
- status = rmdir(path);
- emul_write_status(processor, status, errno);
-}
-#endif
-
-#ifndef HAVE_TIME
-#define do_unix_time 0
-#else
-static void
-do_unix_time(os_emul_data *emul,
- unsigned call,
- const int arg0,
- cpu *processor,
- unsigned_word cia)
-{
- unsigned_word tp = cpu_registers(processor)->gpr[arg0];
- time_t now = time ((time_t *)0);
- unsigned_word status = H2T_4(now);
-
- if (WITH_TRACE && ppc_trace[trace_os_emul])
- printf_filtered ("0x%lx", (long)tp);
-
- emul_write_status(processor, (int)status, errno);
-
- if (tp)
- emul_write_buffer(&status, tp, sizeof(status), processor, cia);
-}
-#endif
-
-#if !defined(HAVE_GETTIMEOFDAY) || !defined(HAVE_SYS_TIME_H)
-#define do_unix_gettimeofday 0
-#else
-static void
-do_unix_gettimeofday(os_emul_data *emul,
- unsigned call,
- const int arg0,
- cpu *processor,
- unsigned_word cia)
-{
- unsigned_word tv = cpu_registers(processor)->gpr[arg0];
- unsigned_word tz = cpu_registers(processor)->gpr[arg0+1];
- struct unix_timeval target_timeval;
- struct timeval host_timeval;
- struct unix_timezone target_timezone;
- struct timezone host_timezone;
- int status;
-
- if (WITH_TRACE && ppc_trace[trace_os_emul])
- printf_filtered ("0x%lx, 0x%lx", (long)tv, (long)tz);
-
- /* Just in case the system doesn't set the timezone structure */
- host_timezone.tz_minuteswest = 0;
- host_timezone.tz_dsttime = 0;
-
- status = gettimeofday(&host_timeval, &host_timezone);
- if (status >= 0) {
- if (tv) {
- target_timeval.tv_sec = H2T_4(host_timeval.tv_sec);
- target_timeval.tv_usec = H2T_4(host_timeval.tv_usec);
- emul_write_buffer((void *) &target_timeval, tv, sizeof(target_timeval), processor, cia);
- }
-
- if (tz) {
- target_timezone.tz_minuteswest = H2T_4(host_timezone.tz_minuteswest);
- target_timezone.tz_dsttime = H2T_4(host_timezone.tz_dsttime);
- emul_write_buffer((void *) &target_timezone, tv, sizeof(target_timezone), processor, cia);
- }
- }
-
- emul_write_status(processor, (int)status, errno);
-}
-#endif
-
-
-#ifndef HAVE_GETRUSAGE
-#define do_unix_getrusage 0
-#else
-static void
-do_unix_getrusage(os_emul_data *emul,
- unsigned call,
- const int arg0,
- cpu *processor,
- unsigned_word cia)
-{
- signed_word who = (signed_word)cpu_registers(processor)->gpr[arg0];
- unsigned_word usage = cpu_registers(processor)->gpr[arg0+1];
- struct rusage host_rusage, host_rusage2;
- struct unix_rusage target_rusage;
- int status;
-
- if (WITH_TRACE && ppc_trace[trace_os_emul])
- printf_filtered ("%ld, 0x%lx", (long)who, (long)usage);
-
- switch (who) {
- default:
- status = -1;
- errno = EINVAL;
- break;
-
- case UNIX_RUSAGE_SELF:
- status = getrusage(RUSAGE_SELF, &host_rusage);
- break;
-
- case UNIX_RUSAGE_CHILDREN:
- status = getrusage(RUSAGE_CHILDREN, &host_rusage);
- break;
-
- case UNIX_RUSAGE_BOTH:
- status = getrusage(RUSAGE_SELF, &host_rusage);
- if (status >= 0) {
- status = getrusage(RUSAGE_CHILDREN, &host_rusage2);
- if (status >= 0) {
- host_rusage.ru_utime.tv_sec += host_rusage2.ru_utime.tv_sec;
- host_rusage.ru_utime.tv_usec += host_rusage2.ru_utime.tv_usec;
- host_rusage.ru_stime.tv_sec += host_rusage2.ru_stime.tv_sec;
- host_rusage.ru_stime.tv_usec += host_rusage2.ru_stime.tv_usec;
- host_rusage.ru_maxrss += host_rusage2.ru_maxrss;
- host_rusage.ru_ixrss += host_rusage2.ru_ixrss;
- host_rusage.ru_idrss += host_rusage2.ru_idrss;
- host_rusage.ru_isrss += host_rusage2.ru_isrss;
- host_rusage.ru_minflt += host_rusage2.ru_minflt;
- host_rusage.ru_majflt += host_rusage2.ru_majflt;
- host_rusage.ru_nswap += host_rusage2.ru_nswap;
- host_rusage.ru_inblock += host_rusage2.ru_inblock;
- host_rusage.ru_oublock += host_rusage2.ru_oublock;
- host_rusage.ru_msgsnd += host_rusage2.ru_msgsnd;
- host_rusage.ru_msgrcv += host_rusage2.ru_msgrcv;
- host_rusage.ru_nsignals += host_rusage2.ru_nsignals;
- host_rusage.ru_nvcsw += host_rusage2.ru_nvcsw;
- host_rusage.ru_nivcsw += host_rusage2.ru_nivcsw;
- }
- }
- }
-
- if (status >= 0) {
- target_rusage.ru_utime.tv_sec = H2T_4(host_rusage2.ru_utime.tv_sec);
- target_rusage.ru_utime.tv_usec = H2T_4(host_rusage2.ru_utime.tv_usec);
- target_rusage.ru_stime.tv_sec = H2T_4(host_rusage2.ru_stime.tv_sec);
- target_rusage.ru_stime.tv_usec = H2T_4(host_rusage2.ru_stime.tv_usec);
- target_rusage.ru_maxrss = H2T_4(host_rusage2.ru_maxrss);
- target_rusage.ru_ixrss = H2T_4(host_rusage2.ru_ixrss);
- target_rusage.ru_idrss = H2T_4(host_rusage2.ru_idrss);
- target_rusage.ru_isrss = H2T_4(host_rusage2.ru_isrss);
- target_rusage.ru_minflt = H2T_4(host_rusage2.ru_minflt);
- target_rusage.ru_majflt = H2T_4(host_rusage2.ru_majflt);
- target_rusage.ru_nswap = H2T_4(host_rusage2.ru_nswap);
- target_rusage.ru_inblock = H2T_4(host_rusage2.ru_inblock);
- target_rusage.ru_oublock = H2T_4(host_rusage2.ru_oublock);
- target_rusage.ru_msgsnd = H2T_4(host_rusage2.ru_msgsnd);
- target_rusage.ru_msgrcv = H2T_4(host_rusage2.ru_msgrcv);
- target_rusage.ru_nsignals = H2T_4(host_rusage2.ru_nsignals);
- target_rusage.ru_nvcsw = H2T_4(host_rusage2.ru_nvcsw);
- target_rusage.ru_nivcsw = H2T_4(host_rusage2.ru_nivcsw);
- emul_write_buffer((void *) &target_rusage, usage, sizeof(target_rusage), processor, cia);
- }
-
- emul_write_status(processor, status, errno);
-}
-#endif
-
-
-static void
-do_unix_nop(os_emul_data *emul,
- unsigned call,
- const int arg0,
- cpu *processor,
- unsigned_word cia)
-{
- if (WITH_TRACE && ppc_trace[trace_os_emul])
- printf_filtered ("0x%lx 0x%lx 0x%lx 0x%lx 0x%lx 0x%lx",
- (long)cpu_registers(processor)->gpr[arg0],
- (long)cpu_registers(processor)->gpr[arg0+1],
- (long)cpu_registers(processor)->gpr[arg0+2],
- (long)cpu_registers(processor)->gpr[arg0+3],
- (long)cpu_registers(processor)->gpr[arg0+4],
- (long)cpu_registers(processor)->gpr[arg0+5]);
-
- emul_write_status(processor, 0, errno);
-}
-
-
-/* Common code for initializing the system call stuff */
-
-static os_emul_data *
-emul_unix_create(device *root,
- bfd *image,
- const char *name,
- emul_syscall *syscall)
-{
- unsigned_word top_of_stack;
- unsigned stack_size;
- int elf_binary;
- os_emul_data *data;
- device *vm;
-
- /* merge any emulation specific entries into the device tree */
-
- /* establish a few defaults */
- if (image->xvec->flavour == bfd_target_elf_flavour) {
- elf_binary = 1;
- top_of_stack = 0xe0000000;
- stack_size = 0x00100000;
- }
- else {
- elf_binary = 0;
- top_of_stack = 0x20000000;
- stack_size = 0x00100000;
- }
-
- /* options */
- emul_add_tree_options(root, image, name,
- (WITH_ENVIRONMENT == USER_ENVIRONMENT
- ? "user" : "virtual"),
- 0 /*oea-interrupt-prefix*/);
-
- /* virtual memory - handles growth of stack/heap */
- vm = tree_parse(root, "/openprom/vm@0x%lx",
- (unsigned long)(top_of_stack - stack_size));
- tree_parse(vm, "./stack-base 0x%lx",
- (unsigned long)(top_of_stack - stack_size));
- tree_parse(vm, "./nr-bytes 0x%x", stack_size);
-
- tree_parse(root, "/openprom/vm/map-binary/file-name %s",
- bfd_get_filename(image));
-
- /* finish the init */
- tree_parse(root, "/openprom/init/register/pc 0x%lx",
- (unsigned long)bfd_get_start_address(image));
- tree_parse(root, "/openprom/init/register/sp 0x%lx",
- (unsigned long)top_of_stack);
- tree_parse(root, "/openprom/init/register/msr 0x%x",
- ((tree_find_boolean_property(root, "/options/little-endian?")
- ? msr_little_endian_mode
- : 0)
- | (tree_find_boolean_property(root, "/openprom/options/floating-point?")
- ? (msr_floating_point_available
- | msr_floating_point_exception_mode_0
- | msr_floating_point_exception_mode_1)
- : 0)));
- tree_parse(root, "/openprom/init/stack/stack-type %s",
- (elf_binary ? "ppc-elf" : "ppc-xcoff"));
-
- /* finally our emulation data */
- data = ZALLOC(os_emul_data);
- data->vm = vm;
- data->syscalls = syscall;
- return data;
-}
-
-
-/* EMULATION
-
- Solaris - Emulation of user programs for Solaris/PPC
-
- DESCRIPTION
-
- */
-
-
-/* Solaris specific implementation */
-
-typedef signed32 solaris_uid_t;
-typedef signed32 solaris_gid_t;
-typedef signed32 solaris_off_t;
-typedef signed32 solaris_pid_t;
-typedef signed32 solaris_time_t;
-typedef unsigned32 solaris_dev_t;
-typedef unsigned32 solaris_ino_t;
-typedef unsigned32 solaris_mode_t;
-typedef unsigned32 solaris_nlink_t;
-
-#ifdef HAVE_SYS_STAT_H
-#define SOLARIS_ST_FSTYPSZ 16 /* array size for file system type name */
-
-struct solaris_stat {
- solaris_dev_t st_dev;
- signed32 st_pad1[3]; /* reserved for network id */
- solaris_ino_t st_ino;
- solaris_mode_t st_mode;
- solaris_nlink_t st_nlink;
- solaris_uid_t st_uid;
- solaris_gid_t st_gid;
- solaris_dev_t st_rdev;
- signed32 st_pad2[2];
- solaris_off_t st_size;
- signed32 st_pad3; /* future off_t expansion */
- struct unix_timeval st_atim;
- struct unix_timeval st_mtim;
- struct unix_timeval st_ctim;
- signed32 st_blksize;
- signed32 st_blocks;
- char st_fstype[SOLARIS_ST_FSTYPSZ];
- signed32 st_pad4[8]; /* expansion area */
-};
-
-/* Convert from host stat structure to solaris stat structure */
-STATIC_INLINE_EMUL_UNIX void
-convert_to_solaris_stat(unsigned_word addr,
- struct stat *host,
- cpu *processor,
- unsigned_word cia)
-{
- struct solaris_stat target;
- int i;
-
- target.st_dev = H2T_4(host->st_dev);
- target.st_ino = H2T_4(host->st_ino);
- target.st_mode = H2T_4(host->st_mode);
- target.st_nlink = H2T_4(host->st_nlink);
- target.st_uid = H2T_4(host->st_uid);
- target.st_gid = H2T_4(host->st_gid);
- target.st_size = H2T_4(host->st_size);
-
-#ifdef HAVE_ST_RDEV
- target.st_rdev = H2T_4(host->st_rdev);
-#else
- target.st_rdev = 0;
-#endif
-
-#ifdef HAVE_ST_BLKSIZE
- target.st_blksize = H2T_4(host->st_blksize);
-#else
- target.st_blksize = 0;
-#endif
-
-#ifdef HAVE_ST_BLOCKS
- target.st_blocks = H2T_4(host->st_blocks);
-#else
- target.st_blocks = 0;
-#endif
-
- target.st_atim.tv_sec = H2T_4(host->st_atime);
- target.st_atim.tv_usec = 0;
-
- target.st_ctim.tv_sec = H2T_4(host->st_ctime);
- target.st_ctim.tv_usec = 0;
-
- target.st_mtim.tv_sec = H2T_4(host->st_mtime);
- target.st_mtim.tv_usec = 0;
-
- for (i = 0; i < sizeof (target.st_pad1) / sizeof (target.st_pad1[0]); i++)
- target.st_pad1[i] = 0;
-
- for (i = 0; i < sizeof (target.st_pad2) / sizeof (target.st_pad2[0]); i++)
- target.st_pad2[i] = 0;
-
- target.st_pad3 = 0;
-
- for (i = 0; i < sizeof (target.st_pad4) / sizeof (target.st_pad4[0]); i++)
- target.st_pad4[i] = 0;
-
- /* For now, just punt and always say it is a ufs file */
- strcpy (target.st_fstype, "ufs");
-
- emul_write_buffer(&target, addr, sizeof(target), processor, cia);
-}
-#endif /* HAVE_SYS_STAT_H */
-
-#ifndef HAVE_STAT
-#define do_solaris_stat 0
-#else
-static void
-do_solaris_stat(os_emul_data *emul,
- unsigned call,
- const int arg0,
- cpu *processor,
- unsigned_word cia)
-{
- unsigned_word path_addr = cpu_registers(processor)->gpr[arg0];
- unsigned_word stat_pkt = cpu_registers(processor)->gpr[arg0+1];
- char path_buf[PATH_MAX];
- struct stat buf;
- char *path = emul_read_string(path_buf, path_addr, PATH_MAX, processor, cia);
- int status;
-
- if (WITH_TRACE && ppc_trace[trace_os_emul])
- printf_filtered ("0x%lx [%s], 0x%lx", (long)path_addr, path, (long)stat_pkt);
-
- status = stat (path, &buf);
- if (status == 0)
- convert_to_solaris_stat (stat_pkt, &buf, processor, cia);
-
- emul_write_status(processor, status, errno);
-}
-#endif
-
-#ifndef HAVE_LSTAT
-#define do_solaris_lstat 0
-#else
-static void
-do_solaris_lstat(os_emul_data *emul,
- unsigned call,
- const int arg0,
- cpu *processor,
- unsigned_word cia)
-{
- unsigned_word path_addr = cpu_registers(processor)->gpr[arg0];
- unsigned_word stat_pkt = cpu_registers(processor)->gpr[arg0+1];
- char path_buf[PATH_MAX];
- struct stat buf;
- char *path = emul_read_string(path_buf, path_addr, PATH_MAX, processor, cia);
- int status;
-
- if (WITH_TRACE && ppc_trace[trace_os_emul])
- printf_filtered ("0x%lx [%s], 0x%lx", (long)path_addr, path, (long)stat_pkt);
-
- status = lstat (path, &buf);
- if (status == 0)
- convert_to_solaris_stat (stat_pkt, &buf, processor, cia);
-
- emul_write_status(processor, status, errno);
-}
-#endif
-
-#ifndef HAVE_FSTAT
-#define do_solaris_fstat 0
-#else
-static void
-do_solaris_fstat(os_emul_data *emul,
- unsigned call,
- const int arg0,
- cpu *processor,
- unsigned_word cia)
-{
- int fildes = (int)cpu_registers(processor)->gpr[arg0];
- unsigned_word stat_pkt = cpu_registers(processor)->gpr[arg0+1];
- struct stat buf;
- int status;
-
- if (WITH_TRACE && ppc_trace[trace_os_emul])
- printf_filtered ("%d, 0x%lx", fildes, (long)stat_pkt);
-
- status = fstat (fildes, &buf);
- if (status == 0)
- convert_to_solaris_stat (stat_pkt, &buf, processor, cia);
-
- emul_write_status(processor, status, errno);
-}
-#endif
-
-#if defined(HAVE_TERMIO_STRUCTURE) || defined(HAVE_TERMIOS_STRUCTURE)
-#define SOLARIS_TIOC ('T'<<8)
-#define SOLARIS_NCC 8
-#define SOLARIS_NCCS 19
-
-#define SOLARIS_VINTR 0
-#define SOLARIS_VQUIT 1
-#define SOLARIS_VERASE 2
-#define SOLARIS_VKILL 3
-#define SOLARIS_VEOF 4
-#define SOLARIS_VEOL 5
-#define SOLARIS_VEOL2 6
-#define SOLARIS_VSWTCH 7
-#define SOLARIS_VSTART 8
-#define SOLARIS_VSTOP 9
-#define SOLARIS_VSUSP 10
-#define SOLARIS_VDSUSP 11
-#define SOLARIS_VREPRINT 12
-#define SOLARIS_VDISCARD 13
-#define SOLARIS_VWERASE 14
-#define SOLARIS_VLNEXT 15
-#endif
-
-#if defined(HAVE_TERMIO_STRUCTURE) || defined(HAVE_TERMIOS_STRUCTURE)
-/* Convert to/from host termio structure */
-
-struct solaris_termio {
- unsigned16 c_iflag; /* input modes */
- unsigned16 c_oflag; /* output modes */
- unsigned16 c_cflag; /* control modes */
- unsigned16 c_lflag; /* line discipline modes */
- unsigned8 c_line; /* line discipline */
- unsigned8 c_cc[SOLARIS_NCC]; /* control chars */
-};
-
-STATIC_INLINE_EMUL_UNIX void
-convert_to_solaris_termio(unsigned_word addr,
- struct termio *host,
- cpu *processor,
- unsigned_word cia)
-{
- struct solaris_termio target;
- int i;
-
- target.c_iflag = H2T_2 (host->c_iflag);
- target.c_oflag = H2T_2 (host->c_oflag);
- target.c_cflag = H2T_2 (host->c_cflag);
- target.c_lflag = H2T_2 (host->c_lflag);
-
-#if defined(HAVE_TERMIO_CLINE) || defined(HAVE_TERMIOS_CLINE)
- target.c_line = host->c_line;
-#else
- target.c_line = 0;
-#endif
-
- for (i = 0; i < SOLARIS_NCC; i++)
- target.c_cc[i] = 0;
-
-#ifdef VINTR
- target.c_cc[SOLARIS_VINTR] = host->c_cc[VINTR];
-#endif
-
-#ifdef VQUIT
- target.c_cc[SOLARIS_VQUIT] = host->c_cc[VQUIT];
-#endif
-
-#ifdef VERASE
- target.c_cc[SOLARIS_VERASE] = host->c_cc[VERASE];
-#endif
-
-#ifdef VKILL
- target.c_cc[SOLARIS_VKILL] = host->c_cc[VKILL];
-#endif
-
-#ifdef VEOF
- target.c_cc[SOLARIS_VEOF] = host->c_cc[VEOF];
-#endif
-
-#ifdef VEOL
- target.c_cc[SOLARIS_VEOL] = host->c_cc[VEOL];
-#endif
-
-#ifdef VEOL2
- target.c_cc[SOLARIS_VEOL2] = host->c_cc[VEOL2];
-#endif
-
-#ifdef VSWTCH
- target.c_cc[SOLARIS_VSWTCH] = host->c_cc[VSWTCH];
-
-#else
-#ifdef VSWTC
- target.c_cc[SOLARIS_VSWTCH] = host->c_cc[VSWTC];
-#endif
-#endif
-
- emul_write_buffer(&target, addr, sizeof(target), processor, cia);
-}
-#endif /* HAVE_TERMIO_STRUCTURE || HAVE_TERMIOS_STRUCTURE */
-
-#ifdef HAVE_TERMIOS_STRUCTURE
-/* Convert to/from host termios structure */
-
-typedef unsigned32 solaris_tcflag_t;
-typedef unsigned8 solaris_cc_t;
-typedef unsigned32 solaris_speed_t;
-
-struct solaris_termios {
- solaris_tcflag_t c_iflag;
- solaris_tcflag_t c_oflag;
- solaris_tcflag_t c_cflag;
- solaris_tcflag_t c_lflag;
- solaris_cc_t c_cc[SOLARIS_NCCS];
-};
-
-STATIC_INLINE_EMUL_UNIX void
-convert_to_solaris_termios(unsigned_word addr,
- struct termios *host,
- cpu *processor,
- unsigned_word cia)
-{
- struct solaris_termios target;
- int i;
-
- target.c_iflag = H2T_4 (host->c_iflag);
- target.c_oflag = H2T_4 (host->c_oflag);
- target.c_cflag = H2T_4 (host->c_cflag);
- target.c_lflag = H2T_4 (host->c_lflag);
-
- for (i = 0; i < SOLARIS_NCCS; i++)
- target.c_cc[i] = 0;
-
-#ifdef VINTR
- target.c_cc[SOLARIS_VINTR] = host->c_cc[VINTR];
-#endif
-
-#ifdef VQUIT
- target.c_cc[SOLARIS_VQUIT] = host->c_cc[VQUIT];
-#endif
-
-#ifdef VERASE
- target.c_cc[SOLARIS_VERASE] = host->c_cc[VERASE];
-#endif
-
-#ifdef VKILL
- target.c_cc[SOLARIS_VKILL] = host->c_cc[VKILL];
-#endif
-
-#ifdef VEOF
- target.c_cc[SOLARIS_VEOF] = host->c_cc[VEOF];
-#endif
-
-#ifdef VEOL
- target.c_cc[SOLARIS_VEOL] = host->c_cc[VEOL];
-#endif
-
-#ifdef VEOL2
- target.c_cc[SOLARIS_VEOL2] = host->c_cc[VEOL2];
-#endif
-
-#ifdef VSWTCH
- target.c_cc[SOLARIS_VSWTCH] = host->c_cc[VSWTCH];
-
-#else
-#ifdef VSWTC
- target.c_cc[SOLARIS_VSWTCH] = host->c_cc[VSWTC];
-#endif
-#endif
-
-#ifdef VSTART
- target.c_cc[SOLARIS_VSTART] = host->c_cc[VSTART];
-#endif
-
-#ifdef VSTOP
- target.c_cc[SOLARIS_VSTOP] = host->c_cc[VSTOP];
-#endif
-
-#ifdef VSUSP
- target.c_cc[SOLARIS_VSUSP] = host->c_cc[VSUSP];
-#endif
-
-#ifdef VDSUSP
- target.c_cc[SOLARIS_VDSUSP] = host->c_cc[VDSUSP];
-#endif
-
-#ifdef VREPRINT
- target.c_cc[SOLARIS_VREPRINT] = host->c_cc[VREPRINT];
-#endif
-
-#ifdef VDISCARD
- target.c_cc[SOLARIS_VDISCARD] = host->c_cc[VDISCARD];
-#endif
-
-#ifdef VWERASE
- target.c_cc[SOLARIS_VWERASE] = host->c_cc[VWERASE];
-#endif
-
-#ifdef VLNEXT
- target.c_cc[SOLARIS_VLNEXT] = host->c_cc[VLNEXT];
-#endif
-
- emul_write_buffer(&target, addr, sizeof(target), processor, cia);
-}
-#endif /* HAVE_TERMIOS_STRUCTURE */
-
-#ifndef HAVE_IOCTL
-#define do_solaris_ioctl 0
-#else
-static void
-do_solaris_ioctl(os_emul_data *emul,
- unsigned call,
- const int arg0,
- cpu *processor,
- unsigned_word cia)
-{
- int fildes = cpu_registers(processor)->gpr[arg0];
- unsigned request = cpu_registers(processor)->gpr[arg0+1];
- unsigned_word argp_addr = cpu_registers(processor)->gpr[arg0+2];
- int status = 0;
- const char *name = "<unknown>";
-
-#ifdef HAVE_TERMIOS_STRUCTURE
- struct termios host_termio;
-
-#else
-#ifdef HAVE_TERMIO_STRUCTURE
- struct termio host_termio;
-#endif
-#endif
-
- switch (request)
- {
- case 0: /* make sure we have at least one case */
- default:
- status = -1;
- errno = EINVAL;
- break;
-
-#if defined(HAVE_TERMIO_STRUCTURE) || defined(HAVE_TERMIOS_STRUCTURE)
-#if defined(TCGETA) || defined(TCGETS) || defined(HAVE_TCGETATTR)
- case SOLARIS_TIOC | 1: /* TCGETA */
- name = "TCGETA";
-#ifdef HAVE_TCGETATTR
- status = tcgetattr(fildes, &host_termio);
-#elif defined(TCGETS)
- status = ioctl (fildes, TCGETS, &host_termio);
-#else
- status = ioctl (fildes, TCGETA, &host_termio);
-#endif
- if (status == 0)
- convert_to_solaris_termio (argp_addr, &host_termio, processor, cia);
- break;
-#endif /* TCGETA */
-#endif /* HAVE_TERMIO_STRUCTURE */
-
-#ifdef HAVE_TERMIOS_STRUCTURE
-#if defined(TCGETS) || defined(HAVE_TCGETATTR)
- case SOLARIS_TIOC | 13: /* TCGETS */
- name = "TCGETS";
-#ifdef HAVE_TCGETATTR
- status = tcgetattr(fildes, &host_termio);
-#else
- status = ioctl (fildes, TCGETS, &host_termio);
-#endif
- if (status == 0)
- convert_to_solaris_termios (argp_addr, &host_termio, processor, cia);
- break;
-#endif /* TCGETS */
-#endif /* HAVE_TERMIOS_STRUCTURE */
- }
-
- emul_write_status(processor, status, errno);
-
- if (WITH_TRACE && ppc_trace[trace_os_emul])
- printf_filtered ("%d, 0x%x [%s], 0x%lx", fildes, request, name, (long)argp_addr);
-}
-#endif /* HAVE_IOCTL */
-
-static emul_syscall_descriptor solaris_descriptors[] = {
- /* 0 */ { 0, "syscall" },
- /* 1 */ { do_unix_exit, "exit" },
- /* 2 */ { 0, "fork" },
- /* 3 */ { do_unix_read, "read" },
- /* 4 */ { do_unix_write, "write" },
- /* 5 */ { do_unix_open, "open" },
- /* 6 */ { do_unix_close, "close" },
- /* 7 */ { 0, "wait" },
- /* 8 */ { 0, "creat" },
- /* 9 */ { do_unix_link, "link" },
- /* 10 */ { do_unix_unlink, "unlink" },
- /* 11 */ { 0, "exec" },
- /* 12 */ { do_unix_chdir, "chdir" },
- /* 13 */ { do_unix_time, "time" },
- /* 14 */ { 0, "mknod" },
- /* 15 */ { 0, "chmod" },
- /* 16 */ { 0, "chown" },
- /* 17 */ { do_unix_break, "brk" },
- /* 18 */ { do_solaris_stat, "stat" },
- /* 19 */ { do_unix_lseek, "lseek" },
- /* 20 */ { do_unix_getpid2, "getpid" },
- /* 21 */ { 0, "mount" },
- /* 22 */ { 0, "umount" },
- /* 23 */ { 0, "setuid" },
- /* 24 */ { do_unix_getuid2, "getuid" },
- /* 25 */ { 0, "stime" },
- /* 26 */ { 0, "ptrace" },
- /* 27 */ { 0, "alarm" },
- /* 28 */ { do_solaris_fstat, "fstat" },
- /* 29 */ { 0, "pause" },
- /* 30 */ { 0, "utime" },
- /* 31 */ { 0, "stty" },
- /* 32 */ { 0, "gtty" },
- /* 33 */ { do_unix_access, "access" },
- /* 34 */ { 0, "nice" },
- /* 35 */ { 0, "statfs" },
- /* 36 */ { 0, "sync" },
- /* 37 */ { 0, "kill" },
- /* 38 */ { 0, "fstatfs" },
- /* 39 */ { 0, "pgrpsys" },
- /* 40 */ { 0, "xenix" },
- /* 41 */ { do_unix_dup, "dup" },
- /* 42 */ { 0, "pipe" },
- /* 43 */ { 0, "times" },
- /* 44 */ { 0, "profil" },
- /* 45 */ { 0, "plock" },
- /* 46 */ { 0, "setgid" },
- /* 47 */ { do_unix_getgid2, "getgid" },
- /* 48 */ { 0, "signal" },
- /* 49 */ { 0, "msgsys" },
- /* 50 */ { 0, "syssun" },
- /* 51 */ { 0, "acct" },
- /* 52 */ { 0, "shmsys" },
- /* 53 */ { 0, "semsys" },
- /* 54 */ { do_solaris_ioctl, "ioctl" },
- /* 55 */ { 0, "uadmin" },
- /* 56 */ { 0, 0 /* reserved for exch */ },
- /* 57 */ { 0, "utssys" },
- /* 58 */ { 0, "fdsync" },
- /* 59 */ { 0, "execve" },
- /* 60 */ { do_unix_umask, "umask" },
- /* 61 */ { 0, "chroot" },
- /* 62 */ { 0, "fcntl" },
- /* 63 */ { 0, "ulimit" },
- /* 64 */ { 0, 0 /* reserved for UNIX PC */ },
- /* 64 */ { 0, 0 /* reserved for UNIX PC */ },
- /* 65 */ { 0, 0 /* reserved for UNIX PC */ },
- /* 66 */ { 0, 0 /* reserved for UNIX PC */ },
- /* 67 */ { 0, 0 /* reserved for UNIX PC */ },
- /* 68 */ { 0, 0 /* reserved for UNIX PC */ },
- /* 69 */ { 0, 0 /* reserved for UNIX PC */ },
- /* 70 */ { 0, 0 /* was advfs */ },
- /* 71 */ { 0, 0 /* was unadvfs */ },
- /* 72 */ { 0, 0 /* was rmount */ },
- /* 73 */ { 0, 0 /* was rumount */ },
- /* 74 */ { 0, 0 /* was rfstart */ },
- /* 75 */ { 0, 0 /* was sigret */ },
- /* 76 */ { 0, 0 /* was rdebug */ },
- /* 77 */ { 0, 0 /* was rfstop */ },
- /* 78 */ { 0, 0 /* was rfsys */ },
- /* 79 */ { do_unix_rmdir, "rmdir" },
- /* 80 */ { do_unix_mkdir, "mkdir" },
- /* 81 */ { 0, "getdents" },
- /* 82 */ { 0, 0 /* was libattach */ },
- /* 83 */ { 0, 0 /* was libdetach */ },
- /* 84 */ { 0, "sysfs" },
- /* 85 */ { 0, "getmsg" },
- /* 86 */ { 0, "putmsg" },
- /* 87 */ { 0, "poll" },
- /* 88 */ { do_solaris_lstat, "lstat" },
- /* 89 */ { do_unix_symlink, "symlink" },
- /* 90 */ { 0, "readlink" },
- /* 91 */ { 0, "setgroups" },
- /* 92 */ { 0, "getgroups" },
- /* 93 */ { 0, "fchmod" },
- /* 94 */ { 0, "fchown" },
- /* 95 */ { 0, "sigprocmask" },
- /* 96 */ { 0, "sigsuspend" },
- /* 97 */ { do_unix_nop, "sigaltstack" },
- /* 98 */ { do_unix_nop, "sigaction" },
- /* 99 */ { 0, "sigpending" },
- /* 100 */ { 0, "context" },
- /* 101 */ { 0, "evsys" },
- /* 102 */ { 0, "evtrapret" },
- /* 103 */ { 0, "statvfs" },
- /* 104 */ { 0, "fstatvfs" },
- /* 105 */ { 0, 0 /* reserved */ },
- /* 106 */ { 0, "nfssys" },
- /* 107 */ { 0, "waitsys" },
- /* 108 */ { 0, "sigsendsys" },
- /* 109 */ { 0, "hrtsys" },
- /* 110 */ { 0, "acancel" },
- /* 111 */ { 0, "async" },
- /* 112 */ { 0, "priocntlsys" },
- /* 113 */ { 0, "pathconf" },
- /* 114 */ { 0, "mincore" },
- /* 115 */ { 0, "mmap" },
- /* 116 */ { 0, "mprotect" },
- /* 117 */ { 0, "munmap" },
- /* 118 */ { 0, "fpathconf" },
- /* 119 */ { 0, "vfork" },
- /* 120 */ { 0, "fchdir" },
- /* 121 */ { 0, "readv" },
- /* 122 */ { 0, "writev" },
- /* 123 */ { 0, "xstat" },
- /* 124 */ { 0, "lxstat" },
- /* 125 */ { 0, "fxstat" },
- /* 126 */ { 0, "xmknod" },
- /* 127 */ { 0, "clocal" },
- /* 128 */ { 0, "setrlimit" },
- /* 129 */ { 0, "getrlimit" },
- /* 130 */ { 0, "lchown" },
- /* 131 */ { 0, "memcntl" },
- /* 132 */ { 0, "getpmsg" },
- /* 133 */ { 0, "putpmsg" },
- /* 134 */ { 0, "rename" },
- /* 135 */ { 0, "uname" },
- /* 136 */ { 0, "setegid" },
- /* 137 */ { 0, "sysconfig" },
- /* 138 */ { 0, "adjtime" },
- /* 139 */ { 0, "systeminfo" },
- /* 140 */ { 0, 0 /* reserved */ },
- /* 141 */ { 0, "seteuid" },
- /* 142 */ { 0, "vtrace" },
- /* 143 */ { 0, "fork1" },
- /* 144 */ { 0, "sigtimedwait" },
- /* 145 */ { 0, "lwp_info" },
- /* 146 */ { 0, "yield" },
- /* 147 */ { 0, "lwp_sema_wait" },
- /* 148 */ { 0, "lwp_sema_post" },
- /* 149 */ { 0, 0 /* reserved */ },
- /* 150 */ { 0, 0 /* reserved */ },
- /* 151 */ { 0, 0 /* reserved */ },
- /* 152 */ { 0, "modctl" },
- /* 153 */ { 0, "fchroot" },
- /* 154 */ { 0, "utimes" },
- /* 155 */ { 0, "vhangup" },
- /* 156 */ { do_unix_gettimeofday, "gettimeofday" },
- /* 157 */ { 0, "getitimer" },
- /* 158 */ { 0, "setitimer" },
- /* 159 */ { 0, "lwp_create" },
- /* 160 */ { 0, "lwp_exit" },
- /* 161 */ { 0, "lwp_suspend" },
- /* 162 */ { 0, "lwp_continue" },
- /* 163 */ { 0, "lwp_kill" },
- /* 164 */ { 0, "lwp_self" },
- /* 165 */ { 0, "lwp_setprivate" },
- /* 166 */ { 0, "lwp_getprivate" },
- /* 167 */ { 0, "lwp_wait" },
- /* 168 */ { 0, "lwp_mutex_unlock" },
- /* 169 */ { 0, "lwp_mutex_lock" },
- /* 170 */ { 0, "lwp_cond_wait" },
- /* 171 */ { 0, "lwp_cond_signal" },
- /* 172 */ { 0, "lwp_cond_broadcast" },
- /* 173 */ { 0, "pread" },
- /* 174 */ { 0, "pwrite" },
- /* 175 */ { 0, "llseek" },
- /* 176 */ { 0, "inst_sync" },
- /* 177 */ { 0, 0 /* reserved */ },
- /* 178 */ { 0, "kaio" },
- /* 179 */ { 0, 0 /* reserved */ },
- /* 180 */ { 0, 0 /* reserved */ },
- /* 181 */ { 0, 0 /* reserved */ },
- /* 182 */ { 0, 0 /* reserved */ },
- /* 183 */ { 0, 0 /* reserved */ },
- /* 184 */ { 0, "tsolsys" },
- /* 185 */ { 0, "acl" },
- /* 186 */ { 0, "auditsys" },
- /* 187 */ { 0, "processor_bind" },
- /* 188 */ { 0, "processor_info" },
- /* 189 */ { 0, "p_online" },
- /* 190 */ { 0, "sigqueue" },
- /* 191 */ { 0, "clock_gettime" },
- /* 192 */ { 0, "clock_settime" },
- /* 193 */ { 0, "clock_getres" },
- /* 194 */ { 0, "timer_create" },
- /* 195 */ { 0, "timer_delete" },
- /* 196 */ { 0, "timer_settime" },
- /* 197 */ { 0, "timer_gettime" },
- /* 198 */ { 0, "timer_getoverrun" },
- /* 199 */ { 0, "nanosleep" },
- /* 200 */ { 0, "facl" },
- /* 201 */ { 0, "door" },
- /* 202 */ { 0, "setreuid" },
- /* 203 */ { 0, "setregid" },
- /* 204 */ { 0, "install_utrap" },
- /* 205 */ { 0, 0 /* reserved */ },
- /* 206 */ { 0, 0 /* reserved */ },
- /* 207 */ { 0, 0 /* reserved */ },
- /* 208 */ { 0, 0 /* reserved */ },
- /* 209 */ { 0, 0 /* reserved */ },
- /* 210 */ { 0, "signotifywait" },
- /* 211 */ { 0, "lwp_sigredirect" },
- /* 212 */ { 0, "lwp_alarm" },
-};
-
-static char *(solaris_error_names[]) = {
- /* 0 */ "ESUCCESS",
- /* 1 */ "EPERM",
- /* 2 */ "ENOENT",
- /* 3 */ "ESRCH",
- /* 4 */ "EINTR",
- /* 5 */ "EIO",
- /* 6 */ "ENXIO",
- /* 7 */ "E2BIG",
- /* 8 */ "ENOEXEC",
- /* 9 */ "EBADF",
- /* 10 */ "ECHILD",
- /* 11 */ "EAGAIN",
- /* 12 */ "ENOMEM",
- /* 13 */ "EACCES",
- /* 14 */ "EFAULT",
- /* 15 */ "ENOTBLK",
- /* 16 */ "EBUSY",
- /* 17 */ "EEXIST",
- /* 18 */ "EXDEV",
- /* 19 */ "ENODEV",
- /* 20 */ "ENOTDIR",
- /* 21 */ "EISDIR",
- /* 22 */ "EINVAL",
- /* 23 */ "ENFILE",
- /* 24 */ "EMFILE",
- /* 25 */ "ENOTTY",
- /* 26 */ "ETXTBSY",
- /* 27 */ "EFBIG",
- /* 28 */ "ENOSPC",
- /* 29 */ "ESPIPE",
- /* 30 */ "EROFS",
- /* 31 */ "EMLINK",
- /* 32 */ "EPIPE",
- /* 33 */ "EDOM",
- /* 34 */ "ERANGE",
- /* 35 */ "ENOMSG",
- /* 36 */ "EIDRM",
- /* 37 */ "ECHRNG",
- /* 38 */ "EL2NSYNC",
- /* 39 */ "EL3HLT",
- /* 40 */ "EL3RST",
- /* 41 */ "ELNRNG",
- /* 42 */ "EUNATCH",
- /* 43 */ "ENOCSI",
- /* 44 */ "EL2HLT",
- /* 45 */ "EDEADLK",
- /* 46 */ "ENOLCK",
- /* 47 */ "ECANCELED",
- /* 48 */ "ENOTSUP",
- /* 49 */ "EDQUOT",
- /* 50 */ "EBADE",
- /* 51 */ "EBADR",
- /* 52 */ "EXFULL",
- /* 53 */ "ENOANO",
- /* 54 */ "EBADRQC",
- /* 55 */ "EBADSLT",
- /* 56 */ "EDEADLOCK",
- /* 57 */ "EBFONT",
- /* 58 */ "Error code 58",
- /* 59 */ "Error code 59",
- /* 60 */ "ENOSTR",
- /* 61 */ "ENODATA",
- /* 62 */ "ETIME",
- /* 63 */ "ENOSR",
- /* 64 */ "ENONET",
- /* 65 */ "ENOPKG",
- /* 66 */ "EREMOTE",
- /* 67 */ "ENOLINK",
- /* 68 */ "EADV",
- /* 69 */ "ESRMNT",
- /* 70 */ "ECOMM",
- /* 71 */ "EPROTO",
- /* 72 */ "Error code 72",
- /* 73 */ "Error code 73",
- /* 74 */ "EMULTIHOP",
- /* 75 */ "Error code 75",
- /* 76 */ "Error code 76",
- /* 77 */ "EBADMSG",
- /* 78 */ "ENAMETOOLONG",
- /* 79 */ "EOVERFLOW",
- /* 80 */ "ENOTUNIQ",
- /* 81 */ "EBADFD",
- /* 82 */ "EREMCHG",
- /* 83 */ "ELIBACC",
- /* 84 */ "ELIBBAD",
- /* 85 */ "ELIBSCN",
- /* 86 */ "ELIBMAX",
- /* 87 */ "ELIBEXEC",
- /* 88 */ "EILSEQ",
- /* 89 */ "ENOSYS",
- /* 90 */ "ELOOP",
- /* 91 */ "ERESTART",
- /* 92 */ "ESTRPIPE",
- /* 93 */ "ENOTEMPTY",
- /* 94 */ "EUSERS",
- /* 95 */ "ENOTSOCK",
- /* 96 */ "EDESTADDRREQ",
- /* 97 */ "EMSGSIZE",
- /* 98 */ "EPROTOTYPE",
- /* 99 */ "ENOPROTOOPT",
- /* 100 */ "Error code 100",
- /* 101 */ "Error code 101",
- /* 102 */ "Error code 102",
- /* 103 */ "Error code 103",
- /* 104 */ "Error code 104",
- /* 105 */ "Error code 105",
- /* 106 */ "Error code 106",
- /* 107 */ "Error code 107",
- /* 108 */ "Error code 108",
- /* 109 */ "Error code 109",
- /* 110 */ "Error code 110",
- /* 111 */ "Error code 111",
- /* 112 */ "Error code 112",
- /* 113 */ "Error code 113",
- /* 114 */ "Error code 114",
- /* 115 */ "Error code 115",
- /* 116 */ "Error code 116",
- /* 117 */ "Error code 117",
- /* 118 */ "Error code 118",
- /* 119 */ "Error code 119",
- /* 120 */ "EPROTONOSUPPORT",
- /* 121 */ "ESOCKTNOSUPPORT",
- /* 122 */ "EOPNOTSUPP",
- /* 123 */ "EPFNOSUPPORT",
- /* 124 */ "EAFNOSUPPORT",
- /* 125 */ "EADDRINUSE",
- /* 126 */ "EADDRNOTAVAIL",
- /* 127 */ "ENETDOWN",
- /* 128 */ "ENETUNREACH",
- /* 129 */ "ENETRESET",
- /* 130 */ "ECONNABORTED",
- /* 131 */ "ECONNRESET",
- /* 132 */ "ENOBUFS",
- /* 133 */ "EISCONN",
- /* 134 */ "ENOTCONN",
- /* 135 */ "Error code 135", /* XENIX has 135 - 142 */
- /* 136 */ "Error code 136",
- /* 137 */ "Error code 137",
- /* 138 */ "Error code 138",
- /* 139 */ "Error code 139",
- /* 140 */ "Error code 140",
- /* 141 */ "Error code 141",
- /* 142 */ "Error code 142",
- /* 143 */ "ESHUTDOWN",
- /* 144 */ "ETOOMANYREFS",
- /* 145 */ "ETIMEDOUT",
- /* 146 */ "ECONNREFUSED",
- /* 147 */ "EHOSTDOWN",
- /* 148 */ "EHOSTUNREACH",
- /* 149 */ "EALREADY",
- /* 150 */ "EINPROGRESS",
- /* 151 */ "ESTALE",
-};
-
-static char *(solaris_signal_names[]) = {
- /* 0 */ 0,
- /* 1 */ "SIGHUP",
- /* 2 */ "SIGINT",
- /* 3 */ "SIGQUIT",
- /* 4 */ "SIGILL",
- /* 5 */ "SIGTRAP",
- /* 6 */ "SIGABRT",
- /* 7 */ "SIGEMT",
- /* 8 */ "SIGFPE",
- /* 9 */ "SIGKILL",
- /* 10 */ "SIGBUS",
- /* 11 */ "SIGSEGV",
- /* 12 */ "SIGSYS",
- /* 13 */ "SIGPIPE",
- /* 14 */ "SIGALRM",
- /* 15 */ "SIGTERM",
- /* 16 */ "SIGUSR1",
- /* 17 */ "SIGUSR2",
- /* 18 */ "SIGCHLD",
- /* 19 */ "SIGPWR",
- /* 20 */ "SIGWINCH",
- /* 21 */ "SIGURG",
- /* 22 */ "SIGPOLL",
- /* 23 */ "SIGSTOP",
- /* 24 */ "SIGTSTP",
- /* 25 */ "SIGCONT",
- /* 26 */ "SIGTTIN",
- /* 27 */ "SIGTTOU",
- /* 28 */ "SIGVTALRM",
- /* 29 */ "SIGPROF",
- /* 30 */ "SIGXCPU",
- /* 31 */ "SIGXFSZ",
- /* 32 */ "SIGWAITING",
- /* 33 */ "SIGLWP",
- /* 34 */ "SIGFREEZE",
- /* 35 */ "SIGTHAW",
- /* 36 */ "SIGCANCEL",
-};
-
-static emul_syscall emul_solaris_syscalls = {
- solaris_descriptors,
- sizeof(solaris_descriptors) / sizeof(solaris_descriptors[0]),
- solaris_error_names,
- sizeof(solaris_error_names) / sizeof(solaris_error_names[0]),
- solaris_signal_names,
- sizeof(solaris_signal_names) / sizeof(solaris_signal_names[0]),
-};
-
-
-/* Solaris's os_emul interface, most are just passed on to the generic
- syscall stuff */
-
-static os_emul_data *
-emul_solaris_create(device *root,
- bfd *image,
- const char *name)
-{
- /* check that this emulation is really for us */
- if (name != NULL && strcmp(name, "solaris") != 0)
- return NULL;
-
- if (image == NULL)
- return NULL;
-
- return emul_unix_create(root, image, "solaris", &emul_solaris_syscalls);
-}
-
-static void
-emul_solaris_init(os_emul_data *emul_data,
- int nr_cpus)
-{
- /* nothing yet */
-}
-
-static void
-emul_solaris_system_call(cpu *processor,
- unsigned_word cia,
- os_emul_data *emul_data)
-{
- emul_do_system_call(emul_data,
- emul_data->syscalls,
- cpu_registers(processor)->gpr[0],
- 3, /*r3 contains arg0*/
- processor,
- cia);
-}
-
-const os_emul emul_solaris = {
- "solaris",
- emul_solaris_create,
- emul_solaris_init,
- emul_solaris_system_call,
- 0, /*instruction_call*/
- 0 /*data*/
-};
-
-
-/* EMULATION
-
- Linux - Emulation of user programs for Linux/PPC
-
- DESCRIPTION
-
- */
-
-
-/* Linux specific implementation */
-
-typedef unsigned32 linux_dev_t;
-typedef unsigned32 linux_ino_t;
-typedef unsigned32 linux_mode_t;
-typedef unsigned16 linux_nlink_t;
-typedef signed32 linux_off_t;
-typedef signed32 linux_pid_t;
-typedef unsigned32 linux_uid_t;
-typedef unsigned32 linux_gid_t;
-typedef unsigned32 linux_size_t;
-typedef signed32 linux_ssize_t;
-typedef signed32 linux_ptrdiff_t;
-typedef signed32 linux_time_t;
-typedef signed32 linux_clock_t;
-typedef signed32 linux_daddr_t;
-
-#ifdef HAVE_SYS_STAT_H
-/* For the PowerPC, don't both with the 'old' stat structure, since there
- should be no extant binaries with that structure. */
-
-struct linux_stat {
- linux_dev_t st_dev;
- linux_ino_t st_ino;
- linux_mode_t st_mode;
- linux_nlink_t st_nlink;
- linux_uid_t st_uid;
- linux_gid_t st_gid;
- linux_dev_t st_rdev;
- linux_off_t st_size;
- unsigned32 st_blksize;
- unsigned32 st_blocks;
- unsigned32 st_atimx; /* don't use st_{a,c,m}time, that might a macro */
- unsigned32 __unused1; /* defined by the host's stat.h */
- unsigned32 st_mtimx;
- unsigned32 __unused2;
- unsigned32 st_ctimx;
- unsigned32 __unused3;
- unsigned32 __unused4;
- unsigned32 __unused5;
-};
-
-/* Convert from host stat structure to solaris stat structure */
-STATIC_INLINE_EMUL_UNIX void
-convert_to_linux_stat(unsigned_word addr,
- struct stat *host,
- cpu *processor,
- unsigned_word cia)
-{
- struct linux_stat target;
-
- target.st_dev = H2T_4(host->st_dev);
- target.st_ino = H2T_4(host->st_ino);
- target.st_mode = H2T_4(host->st_mode);
- target.st_nlink = H2T_2(host->st_nlink);
- target.st_uid = H2T_4(host->st_uid);
- target.st_gid = H2T_4(host->st_gid);
- target.st_size = H2T_4(host->st_size);
-
-#ifdef HAVE_ST_RDEV
- target.st_rdev = H2T_4(host->st_rdev);
-#else
- target.st_rdev = 0;
-#endif
-
-#ifdef HAVE_ST_BLKSIZE
- target.st_blksize = H2T_4(host->st_blksize);
-#else
- target.st_blksize = 0;
-#endif
-
-#ifdef HAVE_ST_BLOCKS
- target.st_blocks = H2T_4(host->st_blocks);
-#else
- target.st_blocks = 0;
-#endif
-
- target.st_atimx = H2T_4(host->st_atime);
- target.st_ctimx = H2T_4(host->st_ctime);
- target.st_mtimx = H2T_4(host->st_mtime);
- target.__unused1 = 0;
- target.__unused2 = 0;
- target.__unused3 = 0;
- target.__unused4 = 0;
- target.__unused5 = 0;
-
- emul_write_buffer(&target, addr, sizeof(target), processor, cia);
-}
-#endif /* HAVE_SYS_STAT_H */
-
-#ifndef HAVE_STAT
-#define do_linux_stat 0
-#else
-static void
-do_linux_stat(os_emul_data *emul,
- unsigned call,
- const int arg0,
- cpu *processor,
- unsigned_word cia)
-{
- unsigned_word path_addr = cpu_registers(processor)->gpr[arg0];
- unsigned_word stat_pkt = cpu_registers(processor)->gpr[arg0+1];
- char path_buf[PATH_MAX];
- struct stat buf;
- char *path = emul_read_string(path_buf, path_addr, PATH_MAX, processor, cia);
- int status;
-
- if (WITH_TRACE && ppc_trace[trace_os_emul])
- printf_filtered ("0x%lx [%s], 0x%lx", (long)path_addr, path, (long)stat_pkt);
-
- status = stat (path, &buf);
- if (status == 0)
- convert_to_linux_stat (stat_pkt, &buf, processor, cia);
-
- emul_write_status(processor, status, errno);
-}
-#endif
-
-#ifndef HAVE_LSTAT
-#define do_linux_lstat 0
-#else
-static void
-do_linux_lstat(os_emul_data *emul,
- unsigned call,
- const int arg0,
- cpu *processor,
- unsigned_word cia)
-{
- unsigned_word path_addr = cpu_registers(processor)->gpr[arg0];
- unsigned_word stat_pkt = cpu_registers(processor)->gpr[arg0+1];
- char path_buf[PATH_MAX];
- struct stat buf;
- char *path = emul_read_string(path_buf, path_addr, PATH_MAX, processor, cia);
- int status;
-
- if (WITH_TRACE && ppc_trace[trace_os_emul])
- printf_filtered ("0x%lx [%s], 0x%lx", (long)path_addr, path, (long)stat_pkt);
-
- status = lstat (path, &buf);
- if (status == 0)
- convert_to_linux_stat (stat_pkt, &buf, processor, cia);
-
- emul_write_status(processor, status, errno);
-}
-#endif
-
-#ifndef HAVE_FSTAT
-#define do_linux_fstat 0
-#else
-static void
-do_linux_fstat(os_emul_data *emul,
- unsigned call,
- const int arg0,
- cpu *processor,
- unsigned_word cia)
-{
- int fildes = (int)cpu_registers(processor)->gpr[arg0];
- unsigned_word stat_pkt = cpu_registers(processor)->gpr[arg0+1];
- struct stat buf;
- int status;
-
- if (WITH_TRACE && ppc_trace[trace_os_emul])
- printf_filtered ("%d, 0x%lx", fildes, (long)stat_pkt);
-
- status = fstat (fildes, &buf);
- if (status == 0)
- convert_to_linux_stat (stat_pkt, &buf, processor, cia);
-
- emul_write_status(processor, status, errno);
-}
-#endif
-
-#if defined(HAVE_TERMIO_STRUCTURE) || defined(HAVE_TERMIOS_STRUCTURE)
-#define LINUX_NCC 10
-#define LINUX_NCCS 19
-
-#define LINUX_VINTR 0
-#define LINUX_VQUIT 1
-#define LINUX_VERASE 2
-#define LINUX_VKILL 3
-#define LINUX_VEOF 4
-#define LINUX_VMIN 5
-#define LINUX_VEOL 6
-#define LINUX_VTIME 7
-#define LINUX_VEOL2 8
-#define LINUX_VSWTC 9
-#define LINUX_VWERASE 10
-#define LINUX_VREPRINT 11
-#define LINUX_VSUSP 12
-#define LINUX_VSTART 13
-#define LINUX_VSTOP 14
-#define LINUX_VLNEXT 15
-#define LINUX_VDISCARD 16
-
-#define LINUX_IOC_NRBITS 8
-#define LINUX_IOC_TYPEBITS 8
-#define LINUX_IOC_SIZEBITS 13
-#define LINUX_IOC_DIRBITS 3
-
-#define LINUX_IOC_NRMASK ((1 << LINUX_IOC_NRBITS)-1)
-#define LINUX_IOC_TYPEMASK ((1 << LINUX_IOC_TYPEBITS)-1)
-#define LINUX_IOC_SIZEMASK ((1 << LINUX_IOC_SIZEBITS)-1)
-#define LINUX_IOC_DIRMASK ((1 << LINUX_IOC_DIRBITS)-1)
-
-#define LINUX_IOC_NRSHIFT 0
-#define LINUX_IOC_TYPESHIFT (LINUX_IOC_NRSHIFT+LINUX_IOC_NRBITS)
-#define LINUX_IOC_SIZESHIFT (LINUX_IOC_TYPESHIFT+LINUX_IOC_TYPEBITS)
-#define LINUX_IOC_DIRSHIFT (LINUX_IOC_SIZESHIFT+LINUX_IOC_SIZEBITS)
-
-/*
- * Direction bits _IOC_NONE could be 0, but OSF/1 gives it a bit.
- * And this turns out useful to catch old ioctl numbers in header
- * files for us.
- */
-#define LINUX_IOC_NONE 1U
-#define LINUX_IOC_READ 2U
-#define LINUX_IOC_WRITE 4U
-
-#define LINUX_IOC(dir,type,nr,size) \
- (((dir) << LINUX_IOC_DIRSHIFT) | \
- ((type) << LINUX_IOC_TYPESHIFT) | \
- ((nr) << LINUX_IOC_NRSHIFT) | \
- ((size) << LINUX_IOC_SIZESHIFT))
-
-/* used to create numbers */
-#define LINUX_IO(type,nr) LINUX_IOC(LINUX_IOC_NONE,(type),(nr),0)
-#define LINUX_IOR(type,nr,size) LINUX_IOC(LINUX_IOC_READ,(type),(nr),sizeof(size))
-#define LINUX_IOW(type,nr,size) LINUX_IOC(LINUX_IOC_WRITE,(type),(nr),sizeof(size))
-#define LINUX_IOWR(type,nr,size) LINUX_IOC(LINUX_IOC_READ|LINUX_IOC_WRITE,(type),(nr),sizeof(size))
-#endif
-
-#if defined(HAVE_TERMIO_STRUCTURE) || defined(HAVE_TERMIOS_STRUCTURE)
-/* Convert to/from host termio structure */
-
-struct linux_termio {
- unsigned16 c_iflag; /* input modes */
- unsigned16 c_oflag; /* output modes */
- unsigned16 c_cflag; /* control modes */
- unsigned16 c_lflag; /* line discipline modes */
- unsigned8 c_line; /* line discipline */
- unsigned8 c_cc[LINUX_NCC]; /* control chars */
-};
-
-STATIC_INLINE_EMUL_UNIX void
-convert_to_linux_termio(unsigned_word addr,
- struct termio *host,
- cpu *processor,
- unsigned_word cia)
-{
- struct linux_termio target;
- int i;
-
- target.c_iflag = H2T_2 (host->c_iflag);
- target.c_oflag = H2T_2 (host->c_oflag);
- target.c_cflag = H2T_2 (host->c_cflag);
- target.c_lflag = H2T_2 (host->c_lflag);
-
-#if defined(HAVE_TERMIO_CLINE) || defined(HAVE_TERMIOS_CLINE)
- target.c_line = host->c_line;
-#else
- target.c_line = 0;
-#endif
-
- for (i = 0; i < LINUX_NCC; i++)
- target.c_cc[i] = 0;
-
-#ifdef VINTR
- target.c_cc[LINUX_VINTR] = host->c_cc[VINTR];
-#endif
-
-#ifdef VQUIT
- target.c_cc[LINUX_VQUIT] = host->c_cc[VQUIT];
-#endif
-
-#ifdef VERASE
- target.c_cc[LINUX_VERASE] = host->c_cc[VERASE];
-#endif
-
-#ifdef VKILL
- target.c_cc[LINUX_VKILL] = host->c_cc[VKILL];
-#endif
-
-#ifdef VEOF
- target.c_cc[LINUX_VEOF] = host->c_cc[VEOF];
-#endif
-
-#ifdef VMIN
- target.c_cc[LINUX_VMIN] = host->c_cc[VMIN];
-#endif
-
-#ifdef VEOL
- target.c_cc[LINUX_VEOL] = host->c_cc[VEOL];
-#endif
-
-#ifdef VTIME
- target.c_cc[LINUX_VTIME] = host->c_cc[VTIME];
-#endif
-
-#ifdef VEOL2
- target.c_cc[LINUX_VEOL2] = host->c_cc[VEOL2];
-#endif
-
-#ifdef VSWTC
- target.c_cc[LINUX_VSWTC] = host->c_cc[VSWTC];
-#endif
-
-#ifdef VSWTCH
- target.c_cc[LINUX_VSWTC] = host->c_cc[VSWTCH];
-#endif
-
- emul_write_buffer(&target, addr, sizeof(target), processor, cia);
-}
-#endif /* HAVE_TERMIO_STRUCTURE */
-
-#ifdef HAVE_TERMIOS_STRUCTURE
-/* Convert to/from host termios structure */
-
-typedef unsigned32 linux_tcflag_t;
-typedef unsigned8 linux_cc_t;
-typedef unsigned32 linux_speed_t;
-
-struct linux_termios {
- linux_tcflag_t c_iflag;
- linux_tcflag_t c_oflag;
- linux_tcflag_t c_cflag;
- linux_tcflag_t c_lflag;
- linux_cc_t c_cc[LINUX_NCCS];
- linux_cc_t c_line;
- signed32 c_ispeed;
- signed32 c_ospeed;
-};
-
-STATIC_INLINE_EMUL_UNIX void
-convert_to_linux_termios(unsigned_word addr,
- struct termios *host,
- cpu *processor,
- unsigned_word cia)
-{
- struct linux_termios target;
- int i;
-
- target.c_iflag = H2T_4 (host->c_iflag);
- target.c_oflag = H2T_4 (host->c_oflag);
- target.c_cflag = H2T_4 (host->c_cflag);
- target.c_lflag = H2T_4 (host->c_lflag);
-
- for (i = 0; i < LINUX_NCCS; i++)
- target.c_cc[i] = 0;
-
-#ifdef VINTR
- target.c_cc[LINUX_VINTR] = host->c_cc[VINTR];
-#endif
-
-#ifdef VQUIT
- target.c_cc[LINUX_VQUIT] = host->c_cc[VQUIT];
-#endif
-
-#ifdef VERASE
- target.c_cc[LINUX_VERASE] = host->c_cc[VERASE];
-#endif
-
-#ifdef VKILL
- target.c_cc[LINUX_VKILL] = host->c_cc[VKILL];
-#endif
-
-#ifdef VEOF
- target.c_cc[LINUX_VEOF] = host->c_cc[VEOF];
-#endif
-
-#ifdef VEOL
- target.c_cc[LINUX_VEOL] = host->c_cc[VEOL];
-#endif
-
-#ifdef VEOL2
- target.c_cc[LINUX_VEOL2] = host->c_cc[VEOL2];
-#endif
-
-#ifdef VSWTCH
- target.c_cc[LINUX_VSWTC] = host->c_cc[VSWTCH];
-#endif
-
-#ifdef HAVE_TERMIOS_CLINE
- target.c_line = host->c_line;
-#else
- target.c_line = 0;
-#endif
-
-#ifdef HAVE_CFGETISPEED
- target.c_ispeed = cfgetispeed (host);
-#else
- target.c_ispeed = 0;
-#endif
-
-#ifdef HAVE_CFGETOSPEED
- target.c_ospeed = cfgetospeed (host);
-#else
- target.c_ospeed = 0;
-#endif
-
- emul_write_buffer(&target, addr, sizeof(target), processor, cia);
-}
-#endif /* HAVE_TERMIOS_STRUCTURE */
-
-#ifndef HAVE_IOCTL
-#define do_linux_ioctl 0
-#else
-static void
-do_linux_ioctl(os_emul_data *emul,
- unsigned call,
- const int arg0,
- cpu *processor,
- unsigned_word cia)
-{
- int fildes = cpu_registers(processor)->gpr[arg0];
- unsigned request = cpu_registers(processor)->gpr[arg0+1];
- unsigned_word argp_addr = cpu_registers(processor)->gpr[arg0+2];
- int status = 0;
- const char *name = "<unknown>";
-
-#ifdef HAVE_TERMIOS_STRUCTURE
- struct termios host_termio;
-
-#else
-#ifdef HAVE_TERMIO_STRUCTURE
- struct termio host_termio;
-#endif
-#endif
-
- switch (request)
- {
- case 0: /* make sure we have at least one case */
- default:
- status = -1;
- errno = EINVAL;
- break;
-
-#if defined(HAVE_TERMIO_STRUCTURE) || defined(HAVE_TERMIOS_STRUCTURE)
-#if defined(TCGETA) || defined(TCGETS) || defined(HAVE_TCGETATTR)
- case LINUX_IOR('t', 23, struct linux_termio): /* TCGETA */
- name = "TCGETA";
-#ifdef HAVE_TCGETATTR
- status = tcgetattr(fildes, &host_termio);
-#elif defined(TCGETS)
- status = ioctl (fildes, TCGETS, &host_termio);
-#else
- status = ioctl (fildes, TCGETA, &host_termio);
-#endif
- if (status == 0)
- convert_to_linux_termio (argp_addr, &host_termio, processor, cia);
- break;
-#endif /* TCGETA */
-#endif /* HAVE_TERMIO_STRUCTURE */
-
-#ifdef HAVE_TERMIOS_STRUCTURE
-#if defined(TCGETS) || defined(HAVE_TCGETATTR)
- case LINUX_IOR('t', 19, struct linux_termios): /* TCGETS */
- name = "TCGETS";
-#ifdef HAVE_TCGETATTR
- status = tcgetattr(fildes, &host_termio);
-#else
- status = ioctl (fildes, TCGETS, &host_termio);
-#endif
- if (status == 0)
- convert_to_linux_termios (argp_addr, &host_termio, processor, cia);
- break;
-#endif /* TCGETS */
-#endif /* HAVE_TERMIOS_STRUCTURE */
- }
-
- emul_write_status(processor, status, errno);
-
- if (WITH_TRACE && ppc_trace[trace_os_emul])
- printf_filtered ("%d, 0x%x [%s], 0x%lx", fildes, request, name, (long)argp_addr);
-}
-#endif /* HAVE_IOCTL */
-
-static emul_syscall_descriptor linux_descriptors[] = {
- /* 0 */ { 0, "setup" },
- /* 1 */ { do_unix_exit, "exit" },
- /* 2 */ { 0, "fork" },
- /* 3 */ { do_unix_read, "read" },
- /* 4 */ { do_unix_write, "write" },
- /* 5 */ { do_unix_open, "open" },
- /* 6 */ { do_unix_close, "close" },
- /* 7 */ { 0, "waitpid" },
- /* 8 */ { 0, "creat" },
- /* 9 */ { do_unix_link, "link" },
- /* 10 */ { do_unix_unlink, "unlink" },
- /* 11 */ { 0, "execve" },
- /* 12 */ { do_unix_chdir, "chdir" },
- /* 13 */ { do_unix_time, "time" },
- /* 14 */ { 0, "mknod" },
- /* 15 */ { 0, "chmod" },
- /* 16 */ { 0, "chown" },
- /* 17 */ { 0, "break" },
- /* 18 */ { 0, "stat" },
- /* 19 */ { do_unix_lseek, "lseek" },
- /* 20 */ { do_unix_getpid, "getpid" },
- /* 21 */ { 0, "mount" },
- /* 22 */ { 0, "umount" },
- /* 23 */ { 0, "setuid" },
- /* 24 */ { do_unix_getuid, "getuid" },
- /* 25 */ { 0, "stime" },
- /* 26 */ { 0, "ptrace" },
- /* 27 */ { 0, "alarm" },
- /* 28 */ { 0, "fstat" },
- /* 29 */ { 0, "pause" },
- /* 30 */ { 0, "utime" },
- /* 31 */ { 0, "stty" },
- /* 32 */ { 0, "gtty" },
- /* 33 */ { do_unix_access, "access" },
- /* 34 */ { 0, "nice" },
- /* 35 */ { 0, "ftime" },
- /* 36 */ { 0, "sync" },
- /* 37 */ { 0, "kill" },
- /* 38 */ { 0, "rename" },
- /* 39 */ { do_unix_mkdir, "mkdir" },
- /* 40 */ { do_unix_rmdir, "rmdir" },
- /* 41 */ { do_unix_dup, "dup" },
- /* 42 */ { 0, "pipe" },
- /* 43 */ { 0, "times" },
- /* 44 */ { 0, "prof" },
- /* 45 */ { do_unix_break, "brk" },
- /* 46 */ { 0, "setgid" },
- /* 47 */ { do_unix_getgid, "getgid" },
- /* 48 */ { 0, "signal" },
- /* 49 */ { do_unix_geteuid, "geteuid" },
- /* 50 */ { do_unix_getegid, "getegid" },
- /* 51 */ { 0, "acct" },
- /* 52 */ { 0, "phys" },
- /* 53 */ { 0, "lock" },
- /* 54 */ { do_linux_ioctl, "ioctl" },
- /* 55 */ { 0, "fcntl" },
- /* 56 */ { 0, "mpx" },
- /* 57 */ { 0, "setpgid" },
- /* 58 */ { 0, "ulimit" },
- /* 59 */ { 0, "olduname" },
- /* 60 */ { do_unix_umask, "umask" },
- /* 61 */ { 0, "chroot" },
- /* 62 */ { 0, "ustat" },
- /* 63 */ { do_unix_dup2, "dup2" },
- /* 64 */ { do_unix_getppid, "getppid" },
- /* 65 */ { 0, "getpgrp" },
- /* 66 */ { 0, "setsid" },
- /* 67 */ { 0, "sigaction" },
- /* 68 */ { 0, "sgetmask" },
- /* 69 */ { 0, "ssetmask" },
- /* 70 */ { 0, "setreuid" },
- /* 71 */ { 0, "setregid" },
- /* 72 */ { 0, "sigsuspend" },
- /* 73 */ { 0, "sigpending" },
- /* 74 */ { 0, "sethostname" },
- /* 75 */ { 0, "setrlimit" },
- /* 76 */ { 0, "getrlimit" },
- /* 77 */ { do_unix_getrusage, "getrusage" },
- /* 78 */ { do_unix_gettimeofday, "gettimeofday" },
- /* 79 */ { 0, "settimeofday" },
- /* 80 */ { 0, "getgroups" },
- /* 81 */ { 0, "setgroups" },
- /* 82 */ { 0, "select" },
- /* 83 */ { do_unix_symlink, "symlink" },
- /* 84 */ { 0, "lstat" },
- /* 85 */ { 0, "readlink" },
- /* 86 */ { 0, "uselib" },
- /* 87 */ { 0, "swapon" },
- /* 88 */ { 0, "reboot" },
- /* 89 */ { 0, "readdir" },
- /* 90 */ { 0, "mmap" },
- /* 91 */ { 0, "munmap" },
- /* 92 */ { 0, "truncate" },
- /* 93 */ { 0, "ftruncate" },
- /* 94 */ { 0, "fchmod" },
- /* 95 */ { 0, "fchown" },
- /* 96 */ { 0, "getpriority" },
- /* 97 */ { 0, "setpriority" },
- /* 98 */ { 0, "profil" },
- /* 99 */ { 0, "statfs" },
- /* 100 */ { 0, "fstatfs" },
- /* 101 */ { 0, "ioperm" },
- /* 102 */ { 0, "socketcall" },
- /* 103 */ { 0, "syslog" },
- /* 104 */ { 0, "setitimer" },
- /* 105 */ { 0, "getitimer" },
- /* 106 */ { do_linux_stat, "newstat" },
- /* 107 */ { do_linux_lstat, "newlstat" },
- /* 108 */ { do_linux_fstat, "newfstat" },
- /* 109 */ { 0, "uname" },
- /* 110 */ { 0, "iopl" },
- /* 111 */ { 0, "vhangup" },
- /* 112 */ { 0, "idle" },
- /* 113 */ { 0, "vm86" },
- /* 114 */ { 0, "wait4" },
- /* 115 */ { 0, "swapoff" },
- /* 116 */ { 0, "sysinfo" },
- /* 117 */ { 0, "ipc" },
- /* 118 */ { 0, "fsync" },
- /* 119 */ { 0, "sigreturn" },
- /* 120 */ { 0, "clone" },
- /* 121 */ { 0, "setdomainname" },
- /* 122 */ { 0, "newuname" },
- /* 123 */ { 0, "modify_ldt" },
- /* 124 */ { 0, "adjtimex" },
- /* 125 */ { 0, "mprotect" },
- /* 126 */ { 0, "sigprocmask" },
- /* 127 */ { 0, "create_module" },
- /* 128 */ { 0, "init_module" },
- /* 129 */ { 0, "delete_module" },
- /* 130 */ { 0, "get_kernel_syms" },
- /* 131 */ { 0, "quotactl" },
- /* 132 */ { 0, "getpgid" },
- /* 133 */ { 0, "fchdir" },
- /* 134 */ { 0, "bdflush" },
- /* 135 */ { 0, "sysfs" },
- /* 136 */ { 0, "personality" },
- /* 137 */ { 0, "afs_syscall" },
- /* 138 */ { 0, "setfsuid" },
- /* 139 */ { 0, "setfsgid" },
- /* 140 */ { 0, "llseek" },
- /* 141 */ { 0, "getdents" },
- /* 142 */ { 0, "newselect" },
- /* 143 */ { 0, "flock" },
- /* 144 */ { 0, "msync" },
- /* 145 */ { 0, "readv" },
- /* 146 */ { 0, "writev" },
- /* 147 */ { 0, "getsid" },
- /* 148 */ { 0, "fdatasync" },
- /* 149 */ { 0, "sysctl" },
- /* 150 */ { 0, "mlock" },
- /* 151 */ { 0, "munlock" },
- /* 152 */ { 0, "mlockall" },
- /* 153 */ { 0, "munlockall" },
- /* 154 */ { 0, "sched_setparam" },
- /* 155 */ { 0, "sched_getparam" },
- /* 156 */ { 0, "sched_setscheduler" },
- /* 157 */ { 0, "sched_getscheduler" },
- /* 158 */ { 0, "sched_yield" },
- /* 159 */ { 0, "sched_get_priority_max" },
- /* 160 */ { 0, "sched_get_priority_min" },
- /* 161 */ { 0, "sched_rr_get_interval" },
-};
-
-static char *(linux_error_names[]) = {
- /* 0 */ "ESUCCESS",
- /* 1 */ "EPERM",
- /* 2 */ "ENOENT",
- /* 3 */ "ESRCH",
- /* 4 */ "EINTR",
- /* 5 */ "EIO",
- /* 6 */ "ENXIO",
- /* 7 */ "E2BIG",
- /* 8 */ "ENOEXEC",
- /* 9 */ "EBADF",
- /* 10 */ "ECHILD",
- /* 11 */ "EAGAIN",
- /* 12 */ "ENOMEM",
- /* 13 */ "EACCES",
- /* 14 */ "EFAULT",
- /* 15 */ "ENOTBLK",
- /* 16 */ "EBUSY",
- /* 17 */ "EEXIST",
- /* 18 */ "EXDEV",
- /* 19 */ "ENODEV",
- /* 20 */ "ENOTDIR",
- /* 21 */ "EISDIR",
- /* 22 */ "EINVAL",
- /* 23 */ "ENFILE",
- /* 24 */ "EMFILE",
- /* 25 */ "ENOTTY",
- /* 26 */ "ETXTBSY",
- /* 27 */ "EFBIG",
- /* 28 */ "ENOSPC",
- /* 29 */ "ESPIPE",
- /* 30 */ "EROFS",
- /* 31 */ "EMLINK",
- /* 32 */ "EPIPE",
- /* 33 */ "EDOM",
- /* 34 */ "ERANGE",
- /* 35 */ "EDEADLK",
- /* 36 */ "ENAMETOOLONG",
- /* 37 */ "ENOLCK",
- /* 38 */ "ENOSYS",
- /* 39 */ "ENOTEMPTY",
- /* 40 */ "ELOOP",
- /* 41 */ 0,
- /* 42 */ "ENOMSG",
- /* 43 */ "EIDRM",
- /* 44 */ "ECHRNG",
- /* 45 */ "EL2NSYNC",
- /* 46 */ "EL3HLT",
- /* 47 */ "EL3RST",
- /* 48 */ "ELNRNG",
- /* 49 */ "EUNATCH",
- /* 50 */ "ENOCSI",
- /* 51 */ "EL2HLT",
- /* 52 */ "EBADE",
- /* 53 */ "EBADR",
- /* 54 */ "EXFULL",
- /* 55 */ "ENOANO",
- /* 56 */ "EBADRQC",
- /* 57 */ "EBADSLT",
- /* 58 */ "EDEADLOCK",
- /* 59 */ "EBFONT",
- /* 60 */ "ENOSTR",
- /* 61 */ "ENODATA",
- /* 62 */ "ETIME",
- /* 63 */ "ENOSR",
- /* 64 */ "ENONET",
- /* 65 */ "ENOPKG",
- /* 66 */ "EREMOTE",
- /* 67 */ "ENOLINK",
- /* 68 */ "EADV",
- /* 69 */ "ESRMNT",
- /* 70 */ "ECOMM",
- /* 71 */ "EPROTO",
- /* 72 */ "EMULTIHOP",
- /* 73 */ "EDOTDOT",
- /* 74 */ "EBADMSG",
- /* 75 */ "EOVERFLOW",
- /* 76 */ "ENOTUNIQ",
- /* 77 */ "EBADFD",
- /* 78 */ "EREMCHG",
- /* 79 */ "ELIBACC",
- /* 80 */ "ELIBBAD",
- /* 81 */ "ELIBSCN",
- /* 82 */ "ELIBMAX",
- /* 83 */ "ELIBEXEC",
- /* 84 */ "EILSEQ",
- /* 85 */ "ERESTART",
- /* 86 */ "ESTRPIPE",
- /* 87 */ "EUSERS",
- /* 88 */ "ENOTSOCK",
- /* 89 */ "EDESTADDRREQ",
- /* 90 */ "EMSGSIZE",
- /* 91 */ "EPROTOTYPE",
- /* 92 */ "ENOPROTOOPT",
- /* 93 */ "EPROTONOSUPPORT",
- /* 94 */ "ESOCKTNOSUPPORT",
- /* 95 */ "EOPNOTSUPP",
- /* 96 */ "EPFNOSUPPORT",
- /* 97 */ "EAFNOSUPPORT",
- /* 98 */ "EADDRINUSE",
- /* 99 */ "EADDRNOTAVAIL",
- /* 100 */ "ENETDOWN",
- /* 101 */ "ENETUNREACH",
- /* 102 */ "ENETRESET",
- /* 103 */ "ECONNABORTED",
- /* 104 */ "ECONNRESET",
- /* 105 */ "ENOBUFS",
- /* 106 */ "EISCONN",
- /* 107 */ "ENOTCONN",
- /* 108 */ "ESHUTDOWN",
- /* 109 */ "ETOOMANYREFS",
- /* 110 */ "ETIMEDOUT",
- /* 111 */ "ECONNREFUSED",
- /* 112 */ "EHOSTDOWN",
- /* 113 */ "EHOSTUNREACH",
- /* 114 */ "EALREADY",
- /* 115 */ "EINPROGRESS",
- /* 116 */ "ESTALE",
- /* 117 */ "EUCLEAN",
- /* 118 */ "ENOTNAM",
- /* 119 */ "ENAVAIL",
- /* 120 */ "EISNAM",
- /* 121 */ "EREMOTEIO",
- /* 122 */ "EDQUOT",
-};
-
-static char *(linux_signal_names[]) = {
- /* 0 */ 0,
- /* 1 */ "SIGHUP",
- /* 2 */ "SIGINT",
- /* 3 */ "SIGQUIT",
- /* 4 */ "SIGILL",
- /* 5 */ "SIGTRAP",
- /* 6 */ "SIGABRT",
- /* 6 */ "SIGIOT",
- /* 7 */ "SIGBUS",
- /* 8 */ "SIGFPE",
- /* 9 */ "SIGKILL",
- /* 10 */ "SIGUSR1",
- /* 11 */ "SIGSEGV",
- /* 12 */ "SIGUSR2",
- /* 13 */ "SIGPIPE",
- /* 14 */ "SIGALRM",
- /* 15 */ "SIGTERM",
- /* 16 */ "SIGSTKFLT",
- /* 17 */ "SIGCHLD",
- /* 18 */ "SIGCONT",
- /* 19 */ "SIGSTOP",
- /* 20 */ "SIGTSTP",
- /* 21 */ "SIGTTIN",
- /* 22 */ "SIGTTOU",
- /* 23 */ "SIGURG",
- /* 24 */ "SIGXCPU",
- /* 25 */ "SIGXFSZ",
- /* 26 */ "SIGVTALRM",
- /* 27 */ "SIGPROF",
- /* 28 */ "SIGWINCH",
- /* 29 */ "SIGIO",
- /* 30 */ "SIGPWR",
- /* 31 */ "SIGUNUSED",
-};
-
-static emul_syscall emul_linux_syscalls = {
- linux_descriptors,
- sizeof(linux_descriptors) / sizeof(linux_descriptors[0]),
- linux_error_names,
- sizeof(linux_error_names) / sizeof(linux_error_names[0]),
- linux_signal_names,
- sizeof(linux_signal_names) / sizeof(linux_signal_names[0]),
-};
-
-
-/* Linux's os_emul interface, most are just passed on to the generic
- syscall stuff */
-
-static os_emul_data *
-emul_linux_create(device *root,
- bfd *image,
- const char *name)
-{
- /* check that this emulation is really for us */
- if (name != NULL && strcmp(name, "linux") != 0)
- return NULL;
-
- if (image == NULL)
- return NULL;
-
- return emul_unix_create(root, image, "linux", &emul_linux_syscalls);
-}
-
-static void
-emul_linux_init(os_emul_data *emul_data,
- int nr_cpus)
-{
- /* nothing yet */
-}
-
-static void
-emul_linux_system_call(cpu *processor,
- unsigned_word cia,
- os_emul_data *emul_data)
-{
- emul_do_system_call(emul_data,
- emul_data->syscalls,
- cpu_registers(processor)->gpr[0],
- 3, /*r3 contains arg0*/
- processor,
- cia);
-}
-
-const os_emul emul_linux = {
- "linux",
- emul_linux_create,
- emul_linux_init,
- emul_linux_system_call,
- 0, /*instruction_call*/
- 0 /*data*/
-};
-
-#endif /* _EMUL_UNIX_C_ */
diff --git a/sim/ppc/emul_unix.h b/sim/ppc/emul_unix.h
deleted file mode 100644
index 6695cc7aa81..00000000000
--- a/sim/ppc/emul_unix.h
+++ /dev/null
@@ -1,28 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1996, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-#ifndef _EMUL_UNIX_H_
-#define _EMUL_UNIX_H_
-
-extern const os_emul emul_solaris;
-extern const os_emul emul_linux;
-
-#endif
diff --git a/sim/ppc/events.c b/sim/ppc/events.c
deleted file mode 100644
index 72c91386bea..00000000000
--- a/sim/ppc/events.c
+++ /dev/null
@@ -1,408 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1998, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-#ifndef _EVENTS_C_
-#define _EVENTS_C_
-
-#include "basics.h"
-#include "events.h"
-
-#include <signal.h>
-
-#if !defined (SIM_EVENTS_POLL_RATE)
-#define SIM_EVENTS_POLL_RATE 0x1000
-#endif
-
-
-
-/* The event queue maintains a single absolute time using two
- variables.
-
- TIME_OF_EVENT: this holds the time at which the next event is ment
- to occure. If no next event it will hold the time of the last
- event.
-
- TIME_FROM_EVENT: The current distance from TIME_OF_EVENT. If an
- event is pending, this will be positive. If no future event is
- pending this will be negative. This variable is decremented once
- for each iteration of a clock cycle.
-
- Initially, the clock is started at time one (1) with TIME_OF_EVENT
- == 0 and TIME_FROM_EVENT == -1.
-
- Clearly there is a bug in that this code assumes that the absolute
- time counter will never become greater than 2^62. */
-
-typedef struct _event_entry event_entry;
-struct _event_entry {
- void *data;
- event_handler *handler;
- signed64 time_of_event;
- event_entry *next;
-};
-
-struct _event_queue {
- int processing;
- event_entry *queue;
- event_entry *volatile held;
- event_entry *volatile *volatile held_end;
- signed64 time_of_event;
- signed64 time_from_event;
-};
-
-
-STATIC_INLINE_EVENTS\
-(void)
-sim_events_poll (void *data)
-{
- event_queue *queue = data;
- /* just re-schedule in 1000 million ticks time */
- event_queue_schedule (queue, SIM_EVENTS_POLL_RATE, sim_events_poll, queue);
- sim_io_poll_quit ();
-}
-
-
-INLINE_EVENTS\
-(event_queue *)
-event_queue_create(void)
-{
- event_queue *new_event_queue = ZALLOC(event_queue);
-
- new_event_queue->processing = 0;
- new_event_queue->queue = NULL;
- new_event_queue->held = NULL;
- new_event_queue->held_end = &new_event_queue->held;
-
- /* both times are already zero */
- return new_event_queue;
-}
-
-
-INLINE_EVENTS\
-(void)
-event_queue_init(event_queue *queue)
-{
- event_entry *event;
-
- /* drain the interrupt queue */
- {
-#if defined(HAVE_SIGPROCMASK) && defined(SIG_SETMASK)
- sigset_t old_mask;
- sigset_t new_mask;
- sigfillset(&new_mask);
- /*-LOCK-*/ sigprocmask(SIG_SETMASK, &new_mask, &old_mask);
-#endif
- event = queue->held;
- while (event != NULL) {
- event_entry *dead = event;
- event = event->next;
- zfree(dead);
- }
- queue->held = NULL;
- queue->held_end = &queue->held;
-#if defined(HAVE_SIGPROCMASK) && defined(SIG_SETMASK)
- /*-UNLOCK-*/ sigprocmask(SIG_SETMASK, &old_mask, NULL);
-#endif
- }
-
- /* drain the normal queue */
- event = queue->queue;
- while (event != NULL) {
- event_entry *dead = event;
- event = event->next;
- zfree(dead);
- }
- queue->queue = NULL;
-
- /* wind time back to one */
- queue->processing = 0;
- queue->time_of_event = 0;
- queue->time_from_event = -1;
-
- /* schedule our initial counter event */
- event_queue_schedule (queue, 0, sim_events_poll, queue);
-}
-
-INLINE_EVENTS\
-(signed64)
-event_queue_time(event_queue *queue)
-{
- return queue->time_of_event - queue->time_from_event;
-}
-
-STATIC_INLINE_EVENTS\
-(void)
-update_time_from_event(event_queue *events)
-{
- signed64 current_time = event_queue_time(events);
- if (events->queue != NULL) {
- events->time_from_event = (events->queue->time_of_event - current_time);
- events->time_of_event = events->queue->time_of_event;
- }
- else {
- events->time_of_event = current_time - 1;
- events->time_from_event = -1;
- }
- if (WITH_TRACE && ppc_trace[trace_events])
- {
- event_entry *event;
- int i;
- for (event = events->queue, i = 0;
- event != NULL;
- event = event->next, i++)
- {
- TRACE(trace_events, ("event time-from-event - time %ld, delta %ld - event %d, tag 0x%lx, time %ld, handler 0x%lx, data 0x%lx\n",
- (long)current_time,
- (long)events->time_from_event,
- i,
- (long)event,
- (long)event->time_of_event,
- (long)event->handler,
- (long)event->data));
- }
- }
- ASSERT(current_time == event_queue_time(events));
-}
-
-STATIC_INLINE_EVENTS\
-(void)
-insert_event_entry(event_queue *events,
- event_entry *new_event,
- signed64 delta)
-{
- event_entry *curr;
- event_entry **prev;
- signed64 time_of_event;
-
- if (delta < 0)
- error("what is past is past!\n");
-
- /* compute when the event should occure */
- time_of_event = event_queue_time(events) + delta;
-
- /* find the queue insertion point - things are time ordered */
- prev = &events->queue;
- curr = events->queue;
- while (curr != NULL && time_of_event >= curr->time_of_event) {
- ASSERT(curr->next == NULL
- || curr->time_of_event <= curr->next->time_of_event);
- prev = &curr->next;
- curr = curr->next;
- }
- ASSERT(curr == NULL || time_of_event < curr->time_of_event);
-
- /* insert it */
- new_event->next = curr;
- *prev = new_event;
- new_event->time_of_event = time_of_event;
-
- /* adjust the time until the first event */
- update_time_from_event(events);
-}
-
-INLINE_EVENTS\
-(event_entry_tag)
-event_queue_schedule(event_queue *events,
- signed64 delta_time,
- event_handler *handler,
- void *data)
-{
- event_entry *new_event = ZALLOC(event_entry);
- new_event->data = data;
- new_event->handler = handler;
- insert_event_entry(events, new_event, delta_time);
- TRACE(trace_events, ("event scheduled at %ld - tag 0x%lx - time %ld, handler 0x%lx, data 0x%lx\n",
- (long)event_queue_time(events),
- (long)new_event,
- (long)new_event->time_of_event,
- (long)new_event->handler,
- (long)new_event->data));
- return (event_entry_tag)new_event;
-}
-
-
-INLINE_EVENTS\
-(event_entry_tag)
-event_queue_schedule_after_signal(event_queue *events,
- signed64 delta_time,
- event_handler *handler,
- void *data)
-{
- event_entry *new_event = ZALLOC(event_entry);
-
- new_event->data = data;
- new_event->handler = handler;
- new_event->time_of_event = delta_time; /* work it out later */
- new_event->next = NULL;
-
- {
-#if defined(HAVE_SIGPROCMASK) && defined(SIG_SETMASK)
- sigset_t old_mask;
- sigset_t new_mask;
- sigfillset(&new_mask);
- /*-LOCK-*/ sigprocmask(SIG_SETMASK, &new_mask, &old_mask);
-#endif
- if (events->held == NULL) {
- events->held = new_event;
- }
- else {
- *events->held_end = new_event;
- }
- events->held_end = &new_event->next;
-#if defined(HAVE_SIGPROCMASK) && defined(SIG_SETMASK)
- /*-UNLOCK-*/ sigprocmask(SIG_SETMASK, &old_mask, NULL);
-#endif
- }
-
- TRACE(trace_events, ("event scheduled at %ld - tag 0x%lx - time %ld, handler 0x%lx, data 0x%lx\n",
- (long)event_queue_time(events),
- (long)new_event,
- (long)new_event->time_of_event,
- (long)new_event->handler,
- (long)new_event->data));
-
- return (event_entry_tag)new_event;
-}
-
-
-INLINE_EVENTS\
-(void)
-event_queue_deschedule(event_queue *events,
- event_entry_tag event_to_remove)
-{
- event_entry *to_remove = (event_entry*)event_to_remove;
- ASSERT((events->time_from_event >= 0) == (events->queue != NULL));
- if (event_to_remove != NULL) {
- event_entry *current;
- event_entry **ptr_to_current;
- for (ptr_to_current = &events->queue, current = *ptr_to_current;
- current != NULL && current != to_remove;
- ptr_to_current = &current->next, current = *ptr_to_current);
- if (current == to_remove) {
- *ptr_to_current = current->next;
- TRACE(trace_events, ("event descheduled at %ld - tag 0x%lx - time %ld, handler 0x%lx, data 0x%lx\n",
- (long)event_queue_time(events),
- (long)event_to_remove,
- (long)current->time_of_event,
- (long)current->handler,
- (long)current->data));
- zfree(current);
- update_time_from_event(events);
- }
- else {
- TRACE(trace_events, ("event descheduled at %ld - tag 0x%lx - not found\n",
- (long)event_queue_time(events),
- (long)event_to_remove));
- }
- }
- ASSERT((events->time_from_event >= 0) == (events->queue != NULL));
-}
-
-
-
-
-INLINE_EVENTS\
-(int)
-event_queue_tick(event_queue *events)
-{
- signed64 time_from_event;
-
- /* we should only be here when the previous tick has been fully processed */
- ASSERT(!events->processing);
-
- /* move any events that were queued by any signal handlers onto the
- real event queue. BTW: When inlining, having this code here,
- instead of in event_queue_process() causes GCC to put greater
- weight on keeping the pointer EVENTS in a register. This, in
- turn results in better code being output. */
- if (events->held != NULL) {
- event_entry *held_events;
- event_entry *curr_event;
-
- {
-#if defined(HAVE_SIGPROCMASK) && defined(SIG_SETMASK)
- sigset_t old_mask;
- sigset_t new_mask;
- sigfillset(&new_mask);
- /*-LOCK-*/ sigprocmask(SIG_SETMASK, &new_mask, &old_mask);
-#endif
- held_events = events->held;
- events->held = NULL;
- events->held_end = &events->held;
-#if defined(HAVE_SIGPROCMASK) && defined(SIG_SETMASK)
- /*-UNLOCK-*/ sigprocmask(SIG_SETMASK, &old_mask, NULL);
-#endif
- }
-
- do {
- curr_event = held_events;
- held_events = curr_event->next;
- insert_event_entry(events, curr_event, curr_event->time_of_event);
- } while (held_events != NULL);
- }
-
- /* advance time, checking to see if we've reached time zero which
- would indicate the time for the next event has arrived */
- time_from_event = events->time_from_event;
- events->time_from_event = time_from_event - 1;
- return time_from_event == 0;
-}
-
-
-
-INLINE_EVENTS\
-(void)
-event_queue_process(event_queue *events)
-{
- signed64 event_time = event_queue_time(events);
-
- ASSERT((events->time_from_event == -1 && events->queue != NULL)
- || events->processing); /* something to do */
-
- /* consume all events for this or earlier times. Be careful to
- allow a new event to appear under our feet */
- events->processing = 1;
- while (events->queue != NULL
- && events->queue->time_of_event <= event_time) {
- event_entry *to_do = events->queue;
- event_handler *handler = to_do->handler;
- void *data = to_do->data;
- events->queue = to_do->next;
- TRACE(trace_events, ("event issued at %ld - tag 0x%lx - time %ld, handler 0x%lx, data 0x%lx\n",
- (long)event_time,
- (long)to_do,
- (long)to_do->time_of_event,
- (long)handler,
- (long)data));
- zfree(to_do);
- /* Always re-compute the time to the next event so that HANDLER()
- can safely insert new events into the queue. */
- update_time_from_event(events);
- handler(data);
- }
- events->processing = 0;
-
- ASSERT(events->time_from_event > 0);
- ASSERT(events->queue != NULL); /* always poll event */
-}
-
-
-#endif /* _EVENTS_C_ */
diff --git a/sim/ppc/events.h b/sim/ppc/events.h
deleted file mode 100644
index be7be50cfcb..00000000000
--- a/sim/ppc/events.h
+++ /dev/null
@@ -1,79 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1995, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-#ifndef _EVENTS_H_
-#define _EVENTS_H_
-
-/* typedef struct _event_queue event_queue; */
-/* typedef struct _event_entry_tag *event_entry_tag; */
-
-typedef void event_handler(void *data);
-
-INLINE_EVENTS\
-(event_queue *) event_queue_create
-(void);
-
-INLINE_EVENTS\
-(void) event_queue_init
-(event_queue *queue);
-
-
-/* (de)Schedule things to happen in the future. */
-
-INLINE_EVENTS\
-(event_entry_tag) event_queue_schedule
-(event_queue *queue,
- signed64 delta_time,
- event_handler *handler,
- void *data);
-
-INLINE_EVENTS\
-(event_entry_tag) event_queue_schedule_after_signal
-(event_queue *queue,
- signed64 delta_time,
- event_handler *handler,
- void *data);
-
-INLINE_EVENTS\
-(void) event_queue_deschedule
-(event_queue *queue,
- event_entry_tag event_to_remove);
-
-
-/* progress time. In to parts so that if something is pending, the
- caller has a chance to save any cached state */
-
-INLINE_EVENTS\
-(int) event_queue_tick
-(event_queue *queue);
-
-INLINE_EVENTS\
-(void) event_queue_process
-(event_queue *events);
-
-
-/* local concept of time */
-
-INLINE_EVENTS\
-(signed64) event_queue_time
-(event_queue *queue);
-
-#endif /* _EVENTS_H_ */
diff --git a/sim/ppc/filter.c b/sim/ppc/filter.c
deleted file mode 100644
index c901a1777f1..00000000000
--- a/sim/ppc/filter.c
+++ /dev/null
@@ -1,150 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1995, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-#include <stdio.h>
-
-#include "config.h"
-
-#ifdef HAVE_STRING_H
-#include <string.h>
-#else
-#ifdef HAVE_STRINGS_H
-#include <strings.h>
-#endif
-#endif
-
-#include "misc.h"
-#include "filter.h"
-
-struct _filter {
- char *flag;
- filter *next;
-};
-
-
-filter *
-new_filter(const char *filt,
- filter *filters)
-{
- while (strlen(filt) > 0) {
- filter *new_filter;
- /* break up the filt list */
- char *end = strchr(filt, ',');
- char *next;
- int len;
- if (end == NULL) {
- end = strchr(filt, '\0');
- next = end;
- }
- else {
- next = end + 1;
- }
- len = end - filt;
- /* add to filter list */
- new_filter = ZALLOC(filter);
- new_filter->flag = (char*)zalloc(len + 1);
- strncpy(new_filter->flag, filt, len);
- new_filter->next = filters;
- filters = new_filter;
- filt = next;
- }
- return filters;
-}
-
-
-int
-is_filtered_out(const char *flags,
- filter *filters)
-{
- while (strlen(flags) > 0) {
- int present;
- filter *filt = filters;
- /* break the string up */
- char *end = strchr(flags, ',');
- char *next;
- int len;
- if (end == NULL) {
- end = strchr(flags, '\0');
- next = end;
- }
- else {
- next = end + 1;
- }
- len = end - flags;
- /* check that it is present */
- present = 0;
- filt = filters;
- while (filt != NULL) {
- if (strncmp(flags, filt->flag, len) == 0
- && strlen(filt->flag) == len) {
- present = 1;
- break;
- }
- filt = filt->next;
- }
- if (!present)
- return 1;
- flags = next;
- }
- return 0;
-}
-
-
-int
-it_is(const char *flag,
- const char *flags)
-{
- int flag_len = strlen(flag);
- while (*flags != '\0') {
- if (!strncmp(flags, flag, flag_len)
- && (flags[flag_len] == ',' || flags[flag_len] == '\0'))
- return 1;
- while (*flags != ',') {
- if (*flags == '\0')
- return 0;
- flags++;
- }
- flags++;
- }
- return 0;
-}
-
-
-#ifdef MAIN
-int
-main(int argc, char **argv)
-{
- filter *filters = NULL;
- int i;
- if (argc < 2) {
- printf("Usage: filter <flags> <filter> ...\n");
- exit (1);
- }
- /* load the filter up */
- for (i = 2; i < argc; i++)
- filters = new_filter(argv[i], filters);
- if (is_filtered_out(argv[1], filters))
- printf("fail\n");
- else
- printf("pass\n");
- return 0;
-}
-#endif
diff --git a/sim/ppc/filter.h b/sim/ppc/filter.h
deleted file mode 100644
index 814f704f8d2..00000000000
--- a/sim/ppc/filter.h
+++ /dev/null
@@ -1,43 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1995, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-typedef struct _filter filter;
-
-
-/* append the filter onto the end of the list */
-
-extern filter *new_filter
-(const char *filt,
- filter *filters);
-
-
-/* returns true if the flags are non empty and some are missing from the filter list */
-
-extern int is_filtered_out
-(const char *flags,
- filter *filters);
-
-/* true if the flag is in the list */
-
-extern int it_is
-(const char *flag,
- const char *flags);
-
diff --git a/sim/ppc/filter_filename.c b/sim/ppc/filter_filename.c
deleted file mode 100644
index 6d62d7a35ae..00000000000
--- a/sim/ppc/filter_filename.c
+++ /dev/null
@@ -1,38 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1995, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-#include "config.h"
-#include "ppc-config.h"
-#include "filter_filename.h"
-
-/* Shorten traces by eliminating the directory component to filenames. */
-extern const char *
-filter_filename (const char *filename)
-{
- const char *p = filename;
- const char *last = filename;
- int ch;
-
- while ((ch = *p++) != '\0' && ch != ':')
- if (ch == '/')
- last = p;
-
- return last;
-}
diff --git a/sim/ppc/filter_filename.h b/sim/ppc/filter_filename.h
deleted file mode 100644
index a60b4f2d7dc..00000000000
--- a/sim/ppc/filter_filename.h
+++ /dev/null
@@ -1,27 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1995, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-#ifndef _FILTER_FILENAME_H
-#define _FILTER_FILENAME_H
-
-/* Remove directory part from filename */
-extern const char *
-filter_filename(const char *filename);
-#endif
diff --git a/sim/ppc/gen-icache.c b/sim/ppc/gen-icache.c
deleted file mode 100644
index 0d58ab1873a..00000000000
--- a/sim/ppc/gen-icache.c
+++ /dev/null
@@ -1,675 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1997, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-#include "misc.h"
-#include "lf.h"
-#include "table.h"
-
-#include "filter.h"
-
-#include "ld-decode.h"
-#include "ld-cache.h"
-#include "ld-insn.h"
-
-#include "igen.h"
-
-#include "gen-semantics.h"
-#include "gen-idecode.h"
-#include "gen-icache.h"
-
-
-
-static void
-print_icache_function_header(lf *file,
- const char *basename,
- insn_bits *expanded_bits,
- int is_function_definition)
-{
- lf_printf(file, "\n");
- lf_print_function_type(file, ICACHE_FUNCTION_TYPE, "EXTERN_ICACHE", " ");
- print_function_name(file,
- basename,
- expanded_bits,
- function_name_prefix_icache);
- lf_printf(file, "\n(%s)", ICACHE_FUNCTION_FORMAL);
- if (!is_function_definition)
- lf_printf(file, ";");
- lf_printf(file, "\n");
-}
-
-
-void
-print_icache_declaration(insn_table *entry,
- lf *file,
- void *data,
- insn *instruction,
- int depth)
-{
- if (generate_expanded_instructions) {
- ASSERT(entry->nr_insn == 1);
- print_icache_function_header(file,
- entry->insns->file_entry->fields[insn_name],
- entry->expanded_bits,
- 0/* is not function definition */);
- }
- else {
- print_icache_function_header(file,
- instruction->file_entry->fields[insn_name],
- NULL,
- 0/* is not function definition */);
- }
-}
-
-
-
-static void
-print_icache_extraction(lf *file,
- insn *instruction,
- const char *entry_name,
- const char *entry_type,
- const char *entry_expression,
- const char *original_name,
- const char *file_name,
- int line_nr,
- insn_field *cur_field,
- insn_bits *bits,
- icache_decl_type what_to_declare,
- icache_body_type what_to_do,
- const char *reason)
-{
- const char *expression;
- ASSERT(entry_name != NULL);
-
- /* Define a storage area for the cache element */
- if (what_to_declare == undef_variables) {
- /* We've finished with the value - destory it */
- lf_indent_suppress(file);
- lf_printf(file, "#undef %s\n", entry_name);
- return;
- }
- else if (what_to_declare == define_variables) {
- lf_indent_suppress(file);
- lf_printf(file, "#define %s ", entry_name);
- }
- else {
- if (file_name != NULL)
- lf_print__external_reference(file, line_nr, file_name);
- lf_printf(file, "%s const %s UNUSED = ",
- entry_type == NULL ? "unsigned" : entry_type,
- entry_name);
- }
-
- /* define a value for that storage area as determined by what is in
- the cache */
- if (bits != NULL
- && strcmp(entry_name, cur_field->val_string) == 0
- && ((bits->opcode->is_boolean && bits->value == 0)
- || (!bits->opcode->is_boolean))) {
- /* The simple field has been made constant (as a result of
- expanding instructions or similar). Remember that for a
- boolean field, value is either 0 (implying the required
- boolean_constant) or nonzero (implying some other value and
- handled later below) - Define the variable accordingly */
- expression = "constant field";
- ASSERT(bits->field == cur_field);
- ASSERT(entry_type == NULL);
- if (bits->opcode->is_boolean)
- lf_printf(file, "%d", bits->opcode->boolean_constant);
- else if (bits->opcode->last < bits->field->last)
- lf_printf(file, "%d",
- bits->value << (bits->field->last - bits->opcode->last));
- else
- lf_printf(file, "%d", bits->value);
- }
- else if (bits != NULL
- && original_name != NULL
- && strncmp(entry_name,
- original_name, strlen(original_name)) == 0
- && strncmp(entry_name + strlen(original_name),
- "_is_", strlen("_is_")) == 0
- && ((bits->opcode->is_boolean
- && (atol(entry_name + strlen(original_name) + strlen("_is_"))
- == bits->opcode->boolean_constant))
- || (!bits->opcode->is_boolean))) {
- expression = "constant compare";
- /* An entry, derived from ORIGINAL_NAME, is testing to see of the
- ORIGINAL_NAME has a specific constant value. That value
- matching a boolean or constant field */
- if (bits->opcode->is_boolean)
- lf_printf(file, "%d /* %s == %d */",
- bits->value == 0,
- original_name,
- bits->opcode->boolean_constant);
- else if (bits->opcode->last < bits->field->last)
- lf_printf(file, "%d /* %s == %d */",
- (atol(entry_name + strlen(original_name) + strlen("_is_"))
- == (bits->value << (bits->field->last - bits->opcode->last))),
- original_name,
- (bits->value << (bits->field->last - bits->opcode->last)));
- else
- lf_printf(file, "%d /* %s == %d */",
- (atol(entry_name + strlen(original_name) + strlen("_is_"))
- == bits->value),
- original_name,
- bits->value);
- }
- else {
- /* put the field in the local variable, possibly also enter it
- into the cache */
- expression = "extraction";
- /* handle the cache */
- if ((what_to_do & get_values_from_icache)
- || (what_to_do & put_values_in_icache)) {
- lf_printf(file, "cache_entry->crack.%s.%s",
- instruction->file_entry->fields[insn_form],
- entry_name);
- if (what_to_do & put_values_in_icache) /* also put it in the cache? */
- lf_printf(file, " = ");
- }
- if ((what_to_do & put_values_in_icache)
- || what_to_do == do_not_use_icache) {
- if (cur_field != NULL && strcmp(entry_name, cur_field->val_string) == 0)
- lf_printf(file, "EXTRACTED32(instruction, %d, %d)",
- i2target(hi_bit_nr, cur_field->first),
- i2target(hi_bit_nr, cur_field->last));
- else if (entry_expression != NULL)
- lf_printf(file, "%s", entry_expression);
- else
- lf_printf(file, "eval_%s", entry_name);
- }
- }
-
- if (!((what_to_declare == define_variables)
- || (what_to_declare == undef_variables)))
- lf_printf(file, ";");
- if (reason != NULL)
- lf_printf(file, " /* %s - %s */", reason, expression);
- lf_printf(file, "\n");
-}
-
-
-void
-print_icache_body(lf *file,
- insn *instruction,
- insn_bits *expanded_bits,
- cache_table *cache_rules,
- icache_decl_type what_to_declare,
- icache_body_type what_to_do)
-{
- insn_field *cur_field;
-
- /* extract instruction fields */
- lf_printf(file, "/* extraction: %s ",
- instruction->file_entry->fields[insn_format]);
- switch (what_to_declare) {
- case define_variables:
- lf_printf(file, "#define");
- break;
- case declare_variables:
- lf_printf(file, "declare");
- break;
- case undef_variables:
- lf_printf(file, "#undef");
- break;
- }
- lf_printf(file, " ");
- switch (what_to_do) {
- case get_values_from_icache:
- lf_printf(file, "get-values-from-icache");
- break;
- case put_values_in_icache:
- lf_printf(file, "put-values-in-icache");
- break;
- case both_values_and_icache:
- lf_printf(file, "get-values-from-icache|put-values-in-icache");
- break;
- case do_not_use_icache:
- lf_printf(file, "do-not-use-icache");
- break;
- }
- lf_printf(file, " */\n");
-
- for (cur_field = instruction->fields->first;
- cur_field->first < insn_bit_size;
- cur_field = cur_field->next) {
- if (cur_field->is_string) {
- insn_bits *bits;
- int found_rule = 0;
- /* find any corresponding value */
- for (bits = expanded_bits;
- bits != NULL;
- bits = bits->last) {
- if (bits->field == cur_field)
- break;
- }
- /* try the cache rule table for what to do */
- {
- cache_table *cache_rule;
- for (cache_rule = cache_rules;
- cache_rule != NULL;
- cache_rule = cache_rule->next) {
- if (strcmp(cur_field->val_string, cache_rule->field_name) == 0) {
- found_rule = 1;
- if (cache_rule->type == scratch_value
- && ((what_to_do & put_values_in_icache)
- || what_to_do == do_not_use_icache))
- print_icache_extraction(file,
- instruction,
- cache_rule->derived_name,
- cache_rule->type_def,
- cache_rule->expression,
- cache_rule->field_name,
- cache_rule->file_entry->file_name,
- cache_rule->file_entry->line_nr,
- cur_field,
- bits,
- what_to_declare,
- do_not_use_icache,
- "icache scratch");
- else if (cache_rule->type == compute_value
- && ((what_to_do & get_values_from_icache)
- || what_to_do == do_not_use_icache))
- print_icache_extraction(file,
- instruction,
- cache_rule->derived_name,
- cache_rule->type_def,
- cache_rule->expression,
- cache_rule->field_name,
- cache_rule->file_entry->file_name,
- cache_rule->file_entry->line_nr,
- cur_field,
- bits,
- what_to_declare,
- do_not_use_icache,
- "semantic compute");
- else if (cache_rule->type == cache_value
- && ((what_to_declare != undef_variables)
- || !(what_to_do & put_values_in_icache)))
- print_icache_extraction(file,
- instruction,
- cache_rule->derived_name,
- cache_rule->type_def,
- cache_rule->expression,
- cache_rule->field_name,
- cache_rule->file_entry->file_name,
- cache_rule->file_entry->line_nr,
- cur_field,
- bits,
- ((what_to_do & put_values_in_icache)
- ? declare_variables
- : what_to_declare),
- what_to_do,
- "in icache");
- }
- }
- }
- /* No rule at all, assume that this is needed in the semantic
- function (when values are extracted from the icache) and
- hence must be put into the cache */
- if (found_rule == 0
- && ((what_to_declare != undef_variables)
- || !(what_to_do & put_values_in_icache)))
- print_icache_extraction(file,
- instruction,
- cur_field->val_string,
- NULL, NULL, NULL, /* type, exp, orig */
- instruction->file_entry->file_name,
- instruction->file_entry->line_nr,
- cur_field,
- bits,
- ((what_to_do & put_values_in_icache)
- ? declare_variables
- : what_to_declare),
- what_to_do,
- "default in icache");
- /* any thing else ... */
- }
- }
-
- lf_print__internal_reference(file);
-
- if ((code & generate_with_insn_in_icache)) {
- lf_printf(file, "\n");
- print_icache_extraction(file,
- instruction,
- "insn",
- "instruction_word",
- "instruction",
- NULL, /* origin */
- NULL, 0, /* file_name & line_nr */
- NULL, NULL,
- what_to_declare,
- what_to_do,
- NULL);
- }
-}
-
-
-
-typedef struct _icache_tree icache_tree;
-struct _icache_tree {
- char *name;
- icache_tree *next;
- icache_tree *children;
-};
-
-static icache_tree *
-icache_tree_insert(icache_tree *tree,
- char *name)
-{
- icache_tree *new_tree;
- /* find it */
- icache_tree **ptr_to_cur_tree = &tree->children;
- icache_tree *cur_tree = *ptr_to_cur_tree;
- while (cur_tree != NULL
- && strcmp(cur_tree->name, name) < 0) {
- ptr_to_cur_tree = &cur_tree->next;
- cur_tree = *ptr_to_cur_tree;
- }
- ASSERT(cur_tree == NULL
- || strcmp(cur_tree->name, name) >= 0);
- /* already in the tree */
- if (cur_tree != NULL
- && strcmp(cur_tree->name, name) == 0)
- return cur_tree;
- /* missing, insert it */
- ASSERT(cur_tree == NULL
- || strcmp(cur_tree->name, name) > 0);
- new_tree = ZALLOC(icache_tree);
- new_tree->name = name;
- new_tree->next = cur_tree;
- *ptr_to_cur_tree = new_tree;
- return new_tree;
-}
-
-
-static icache_tree *
-insn_table_cache_fields(insn_table *table)
-{
- icache_tree *tree = ZALLOC(icache_tree);
- insn *instruction;
- for (instruction = table->insns;
- instruction != NULL;
- instruction = instruction->next) {
- insn_field *field;
- icache_tree *form =
- icache_tree_insert(tree,
- instruction->file_entry->fields[insn_form]);
- for (field = instruction->fields->first;
- field != NULL;
- field = field->next) {
- if (field->is_string)
- icache_tree_insert(form, field->val_string);
- }
- }
- return tree;
-}
-
-
-
-extern void
-print_icache_struct(insn_table *instructions,
- cache_table *cache_rules,
- lf *file)
-{
- icache_tree *tree = insn_table_cache_fields(instructions);
-
- lf_printf(file, "\n");
- lf_printf(file, "#define WITH_IDECODE_CACHE_SIZE %d\n",
- (code & generate_with_icache) ? icache_size : 0);
- lf_printf(file, "\n");
-
- /* create an instruction cache if being used */
- if ((code & generate_with_icache)) {
- icache_tree *form;
- lf_printf(file, "typedef struct _idecode_cache {\n");
- lf_printf(file, " unsigned_word address;\n");
- lf_printf(file, " void *semantic;\n");
- lf_printf(file, " union {\n");
- for (form = tree->children;
- form != NULL;
- form = form->next) {
- icache_tree *field;
- lf_printf(file, " struct {\n");
- if (code & generate_with_insn_in_icache)
- lf_printf(file, " instruction_word insn;\n");
- for (field = form->children;
- field != NULL;
- field = field->next) {
- cache_table *cache_rule;
- int found_rule = 0;
- for (cache_rule = cache_rules;
- cache_rule != NULL;
- cache_rule = cache_rule->next) {
- if (strcmp(field->name, cache_rule->field_name) == 0) {
- found_rule = 1;
- if (cache_rule->derived_name != NULL)
- lf_printf(file, " %s %s; /* %s */\n",
- (cache_rule->type_def == NULL
- ? "unsigned"
- : cache_rule->type_def),
- cache_rule->derived_name,
- cache_rule->field_name);
- }
- }
- if (!found_rule)
- lf_printf(file, " unsigned %s;\n", field->name);
- }
- lf_printf(file, " } %s;\n", form->name);
- }
- lf_printf(file, " } crack;\n");
- lf_printf(file, "} idecode_cache;\n");
- }
- else {
- /* alernativly, since no cache, emit a dummy definition for
- idecode_cache so that code refering to the type can still compile */
- lf_printf(file, "typedef void idecode_cache;\n");
- }
- lf_printf(file, "\n");
-}
-
-
-
-static void
-print_icache_function(lf *file,
- insn *instruction,
- insn_bits *expanded_bits,
- opcode_field *opcodes,
- cache_table *cache_rules)
-{
- int indent;
-
- /* generate code to enter decoded instruction into the icache */
- lf_printf(file, "\n");
- lf_print_function_type(file, ICACHE_FUNCTION_TYPE, "EXTERN_ICACHE", "\n");
- indent = print_function_name(file,
- instruction->file_entry->fields[insn_name],
- expanded_bits,
- function_name_prefix_icache);
- lf_indent(file, +indent);
- lf_printf(file, "(%s)\n", ICACHE_FUNCTION_FORMAL);
- lf_indent(file, -indent);
-
- /* function header */
- lf_printf(file, "{\n");
- lf_indent(file, +2);
-
- print_my_defines(file, expanded_bits, instruction->file_entry);
- print_itrace(file, instruction->file_entry, 1/*putting-value-in-cache*/);
-
- print_idecode_validate(file, instruction, opcodes);
-
- lf_printf(file, "\n");
- lf_printf(file, "{\n");
- lf_indent(file, +2);
- if ((code & generate_with_semantic_icache))
- lf_printf(file, "unsigned_word nia;\n");
- print_icache_body(file,
- instruction,
- expanded_bits,
- cache_rules,
- ((code & generate_with_direct_access)
- ? define_variables
- : declare_variables),
- ((code & generate_with_semantic_icache)
- ? both_values_and_icache
- : put_values_in_icache));
-
- lf_printf(file, "\n");
- lf_printf(file, "cache_entry->address = cia;\n");
- lf_printf(file, "cache_entry->semantic = ");
- print_function_name(file,
- instruction->file_entry->fields[insn_name],
- expanded_bits,
- function_name_prefix_semantics);
- lf_printf(file, ";\n");
- lf_printf(file, "\n");
-
- if ((code & generate_with_semantic_icache)) {
- lf_printf(file, "/* semantic routine */\n");
- print_semantic_body(file,
- instruction,
- expanded_bits,
- opcodes);
- lf_printf(file, "return nia;\n");
- }
-
- if (!(code & generate_with_semantic_icache)) {
- lf_printf(file, "/* return the function proper */\n");
- lf_printf(file, "return ");
- print_function_name(file,
- instruction->file_entry->fields[insn_name],
- expanded_bits,
- function_name_prefix_semantics);
- lf_printf(file, ";\n");
- }
-
- if ((code & generate_with_direct_access))
- print_icache_body(file,
- instruction,
- expanded_bits,
- cache_rules,
- undef_variables,
- ((code & generate_with_semantic_icache)
- ? both_values_and_icache
- : put_values_in_icache));
-
- lf_indent(file, -2);
- lf_printf(file, "}\n");
- lf_indent(file, -2);
- lf_printf(file, "}\n");
-}
-
-
-void
-print_icache_definition(insn_table *entry,
- lf *file,
- void *data,
- insn *instruction,
- int depth)
-{
- cache_table *cache_rules = (cache_table*)data;
- if (generate_expanded_instructions) {
- ASSERT(entry->nr_insn == 1
- && entry->opcode == NULL
- && entry->parent != NULL
- && entry->parent->opcode != NULL);
- ASSERT(entry->nr_insn == 1
- && entry->opcode == NULL
- && entry->parent != NULL
- && entry->parent->opcode != NULL
- && entry->parent->opcode_rule != NULL);
- print_icache_function(file,
- entry->insns,
- entry->expanded_bits,
- entry->opcode,
- cache_rules);
- }
- else {
- print_icache_function(file,
- instruction,
- NULL,
- NULL,
- cache_rules);
- }
-}
-
-
-
-void
-print_icache_internal_function_declaration(insn_table *table,
- lf *file,
- void *data,
- table_entry *function)
-{
- ASSERT((code & generate_with_icache) != 0);
- if (it_is("internal", function->fields[insn_flags])) {
- lf_printf(file, "\n");
- lf_print_function_type(file, ICACHE_FUNCTION_TYPE, "INLINE_ICACHE",
- "\n");
- print_function_name(file,
- function->fields[insn_name],
- NULL,
- function_name_prefix_icache);
- lf_printf(file, "\n(%s);\n", ICACHE_FUNCTION_FORMAL);
- }
-}
-
-
-void
-print_icache_internal_function_definition(insn_table *table,
- lf *file,
- void *data,
- table_entry *function)
-{
- ASSERT((code & generate_with_icache) != 0);
- if (it_is("internal", function->fields[insn_flags])) {
- lf_printf(file, "\n");
- lf_print_function_type(file, ICACHE_FUNCTION_TYPE, "INLINE_ICACHE",
- "\n");
- print_function_name(file,
- function->fields[insn_name],
- NULL,
- function_name_prefix_icache);
- lf_printf(file, "\n(%s)\n", ICACHE_FUNCTION_FORMAL);
- lf_printf(file, "{\n");
- lf_indent(file, +2);
- lf_printf(file, "/* semantic routine */\n");
- table_entry_print_cpp_line_nr(file, function);
- if ((code & generate_with_semantic_icache)) {
- lf_print__c_code(file, function->annex);
- lf_printf(file, "error(\"Internal function must longjump\\n\");\n");
- lf_printf(file, "return 0;\n");
- }
- else {
- lf_printf(file, "return ");
- print_function_name(file,
- function->fields[insn_name],
- NULL,
- function_name_prefix_semantics);
- lf_printf(file, ";\n");
- }
-
- lf_print__internal_reference(file);
- lf_indent(file, -2);
- lf_printf(file, "}\n");
- }
-}
diff --git a/sim/ppc/gen-icache.h b/sim/ppc/gen-icache.h
deleted file mode 100644
index 7d9e0e16c01..00000000000
--- a/sim/ppc/gen-icache.h
+++ /dev/null
@@ -1,68 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1997 Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-
-/* Output code to manipulate the instruction cache: either create it
- or reference it */
-
-typedef enum {
- declare_variables,
- define_variables,
- undef_variables,
-} icache_decl_type;
-
-typedef enum {
- do_not_use_icache = 0,
- get_values_from_icache = 0x1,
- put_values_in_icache = 0x2,
- both_values_and_icache = 0x3,
-} icache_body_type;
-
-extern void print_icache_body
-(lf *file,
- insn *instruction,
- insn_bits *expanded_bits,
- cache_table *cache_rules,
- icache_decl_type what_to_declare,
- icache_body_type what_to_do);
-
-
-/* Output an instruction cache decode function */
-
-extern insn_handler print_icache_declaration;
-extern insn_handler print_icache_definition;
-
-
-/* Output an instruction cache support function */
-
-extern function_handler print_icache_internal_function_declaration;
-extern function_handler print_icache_internal_function_definition;
-
-
-/* Output the instruction cache table data structure */
-
-extern void print_icache_struct
-(insn_table *instructions,
- cache_table *cache_rules,
- lf *file);
-
-
-/* Output a single instructions decoder */
diff --git a/sim/ppc/gen-idecode.c b/sim/ppc/gen-idecode.c
deleted file mode 100644
index 397dcde1816..00000000000
--- a/sim/ppc/gen-idecode.c
+++ /dev/null
@@ -1,1545 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1997, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-#include "misc.h"
-#include "lf.h"
-#include "table.h"
-
-#include "filter.h"
-
-#include "ld-decode.h"
-#include "ld-cache.h"
-#include "ld-insn.h"
-
-#include "igen.h"
-
-#include "gen-idecode.h"
-#include "gen-icache.h"
-#include "gen-semantics.h"
-
-
-
-static void
-lf_print_opcodes(lf *file,
- insn_table *table)
-{
- if (table != NULL) {
- while (1) {
- ASSERT(table->opcode != NULL);
- lf_printf(file, "_%d_%d",
- table->opcode->first,
- table->opcode->last);
- if (table->parent == NULL) break;
- lf_printf(file, "__%d", table->opcode_nr);
- table = table->parent;
- }
- }
-}
-
-/****************************************************************/
-
-
-static void
-lf_print_table_name(lf *file,
- insn_table *table)
-{
- lf_printf(file, "idecode_table");
- lf_print_opcodes(file, table);
-}
-
-
-
-static void
-print_idecode_table(lf *file,
- insn_table *entry,
- const char *result)
-{
- lf_printf(file, "/* prime the search */\n");
- lf_printf(file, "idecode_table_entry *table = ");
- lf_print_table_name(file, entry);
- lf_printf(file, ";\n");
- lf_printf(file, "int opcode = EXTRACTED32(instruction, %d, %d);\n",
- i2target(hi_bit_nr, entry->opcode->first),
- i2target(hi_bit_nr, entry->opcode->last));
- lf_printf(file, "idecode_table_entry *table_entry = table + opcode;\n");
-
- lf_printf(file, "\n");
- lf_printf(file, "/* iterate until a leaf */\n");
- lf_printf(file, "while (1) {\n");
- lf_printf(file, " signed shift = table_entry->shift;\n");
- lf_printf(file, "if (shift == function_entry) break;\n");
- lf_printf(file, " if (shift >= 0) {\n");
- lf_printf(file, " table = ((idecode_table_entry*)\n");
- lf_printf(file, " table_entry->function_or_table);\n");
- lf_printf(file, " opcode = ((instruction & table_entry->mask)\n");
- lf_printf(file, " >> shift);\n");
- lf_printf(file, " table_entry = table + opcode;\n");
- lf_printf(file, " }\n");
- lf_printf(file, " else {\n");
- lf_printf(file, " /* must be a boolean */\n");
- lf_printf(file, " ASSERT(table_entry->shift == boolean_entry);\n");
- lf_printf(file, " opcode = ((instruction & table_entry->mask)\n");
- lf_printf(file, " != table_entry->value);\n");
- lf_printf(file, " table = ((idecode_table_entry*)\n");
- lf_printf(file, " table_entry->function_or_table);\n");
- lf_printf(file, " table_entry = table + opcode;\n");
- lf_printf(file, " }\n");
- lf_printf(file, "}\n");
-
- lf_printf(file, "\n");
- lf_printf(file, "/* call the leaf code */\n");
- if ((code & generate_jumps)) {
- lf_printf(file, "goto *table_entry->function_or_table;\n");
- }
- else {
- lf_printf(file, "%s ", result);
- if ((code & generate_with_icache)) {
- lf_printf(file, "(((idecode_icache*)table_entry->function_or_table)\n");
- lf_printf(file, " (%s));\n", ICACHE_FUNCTION_ACTUAL);
- }
- else {
- lf_printf(file, "((idecode_semantic*)table_entry->function_or_table)\n");
- lf_printf(file, " (%s);\n", SEMANTIC_FUNCTION_ACTUAL);
- }
- }
-}
-
-
-static void
-print_idecode_table_start(insn_table *table,
- lf *file,
- void *data,
- int depth)
-{
- ASSERT(depth == 0);
- /* start of the table */
- if (table->opcode_rule->gen == array_gen) {
- lf_printf(file, "\n");
- lf_printf(file, "static idecode_table_entry ");
- lf_print_table_name(file, table);
- lf_printf(file, "[] = {\n");
- }
-}
-
-static void
-print_idecode_table_leaf(insn_table *entry,
- lf *file,
- void *data,
- insn *instruction,
- int depth)
-{
- ASSERT(entry->parent != NULL);
- ASSERT(depth == 0);
-
- /* add an entry to the table */
- if (entry->parent->opcode_rule->gen == array_gen) {
- lf_printf(file, " /*%d*/ { ", entry->opcode_nr);
- if (entry->opcode == NULL) {
- /* table leaf entry */
- lf_printf(file, "function_entry, 0, 0, ");
- if ((code & generate_jumps))
- lf_printf(file, "&&");
- print_function_name(file,
- entry->insns->file_entry->fields[insn_name],
- entry->expanded_bits,
- ((code & generate_with_icache)
- ? function_name_prefix_icache
- : function_name_prefix_semantics));
- }
- else if (entry->opcode_rule->gen == switch_gen
- || entry->opcode_rule->gen == goto_switch_gen
- || entry->opcode_rule->gen == padded_switch_gen) {
- /* table calling switch statement */
- lf_printf(file, "function_entry, 0, 0, ");
- if ((code & generate_jumps))
- lf_printf(file, "&&");
- lf_print_table_name(file, entry);
- }
- else if (entry->opcode->is_boolean) {
- /* table `calling' boolean table */
- lf_printf(file, "boolean_entry, ");
- lf_printf(file, "MASK32(%d, %d), ",
- i2target(hi_bit_nr, entry->opcode->first),
- i2target(hi_bit_nr, entry->opcode->last));
- lf_printf(file, "INSERTED32(%d, %d, %d), ",
- entry->opcode->boolean_constant,
- i2target(hi_bit_nr, entry->opcode->first),
- i2target(hi_bit_nr, entry->opcode->last));
- lf_print_table_name(file, entry);
- }
- else {
- /* table `calling' another table */
- lf_printf(file, "%d, ", insn_bit_size - entry->opcode->last - 1);
- lf_printf(file, "MASK32(%d,%d), ",
- i2target(hi_bit_nr, entry->opcode->first),
- i2target(hi_bit_nr, entry->opcode->last));
- lf_printf(file, "0, ");
- lf_print_table_name(file, entry);
- }
- lf_printf(file, " },\n");
- }
-}
-
-static void
-print_idecode_table_end(insn_table *table,
- lf *file,
- void *data,
- int depth)
-{
- ASSERT(depth == 0);
- if (table->opcode_rule->gen == array_gen) {
- lf_printf(file, "};\n");
- }
-}
-
-static void
-print_idecode_table_padding(insn_table *table,
- lf *file,
- void *data,
- int depth,
- int opcode_nr)
-{
- ASSERT(depth == 0);
- if (table->opcode_rule->gen == array_gen) {
- lf_printf(file, " /*%d*/ { function_entry, 0, 0, ", opcode_nr);
- if ((code & generate_jumps))
- lf_printf(file, "&&");
- lf_printf(file, "%s_illegal },\n",
- ((code & generate_with_icache) ? "icache" : "semantic"));
- }
-}
-
-
-/****************************************************************/
-
-
-static void
-print_goto_switch_name(lf *file,
- insn_table *entry)
-{
- lf_printf(file, "case_");
- if (entry->opcode == NULL)
- print_function_name(file,
- entry->insns->file_entry->fields[insn_name],
- entry->expanded_bits,
- ((code & generate_with_icache)
- ? function_name_prefix_icache
- : function_name_prefix_semantics));
- else
- lf_print_table_name(file, entry);
-}
-
-static void
-print_goto_switch_table_leaf(insn_table *entry,
- lf *file,
- void *data,
- insn *instruction,
- int depth)
-{
- ASSERT(entry->parent != NULL);
- ASSERT(depth == 0);
- ASSERT(entry->parent->opcode_rule->gen == goto_switch_gen);
- ASSERT(entry->parent->opcode);
-
- lf_printf(file, "&&");
- print_goto_switch_name(file, entry);
- lf_printf(file, ",\n");
-}
-
-static void
-print_goto_switch_table_padding(insn_table *table,
- lf *file,
- void *data,
- int depth,
- int opcode_nr)
-{
- ASSERT(depth == 0);
- ASSERT(table->opcode_rule->gen == goto_switch_gen);
-
- lf_printf(file, "&&illegal_");
- lf_print_table_name(file, table);
- lf_printf(file, ",\n");
-}
-
-static void
-print_goto_switch_break(lf *file,
- insn_table *entry)
-{
- lf_printf(file, "goto break_");
- lf_print_table_name(file, entry->parent);
- lf_printf(file, ";\n");
-}
-
-
-static void
-print_goto_switch_table(lf *file,
- insn_table *table)
-{
- lf_printf(file, "const static void *");
- lf_print_table_name(file, table);
- lf_printf(file, "[] = {\n");
- lf_indent(file, +2);
- insn_table_traverse_tree(table,
- file, NULL/*data*/,
- 0,
- NULL/*start*/,
- print_goto_switch_table_leaf,
- NULL/*end*/,
- print_goto_switch_table_padding);
- lf_indent(file, -2);
- lf_printf(file, "};\n");
-}
-
-
-void print_idecode_switch
-(lf *file,
- insn_table *table,
- const char *result);
-
-static void
-idecode_switch_start(insn_table *table,
- lf *file,
- void *data,
- int depth)
-{
- /* const char *result = data; */
- ASSERT(depth == 0);
- ASSERT(table->opcode_rule->gen == switch_gen
- || table->opcode_rule->gen == goto_switch_gen
- || table->opcode_rule->gen == padded_switch_gen);
-
- if (table->opcode->is_boolean
- || table->opcode_rule->gen == switch_gen
- || table->opcode_rule->gen == padded_switch_gen) {
- lf_printf(file, "switch (EXTRACTED32(instruction, %d, %d)) {\n",
- i2target(hi_bit_nr, table->opcode->first),
- i2target(hi_bit_nr, table->opcode->last));
- }
- else if (table->opcode_rule->gen == goto_switch_gen) {
- if (table->parent != NULL
- && (table->parent->opcode_rule->gen == switch_gen
- || table->parent->opcode_rule->gen == goto_switch_gen
- || table->parent->opcode_rule->gen == padded_switch_gen)) {
- lf_printf(file, "{\n");
- lf_indent(file, +2);
- }
- print_goto_switch_table(file, table);
- lf_printf(file, "ASSERT(EXTRACTED32(instruction, %d, %d)\n",
- i2target(hi_bit_nr, table->opcode->first),
- i2target(hi_bit_nr, table->opcode->last));
- lf_printf(file, " < (sizeof(");
- lf_print_table_name(file, table);
- lf_printf(file, ") / sizeof(void*)));\n");
- lf_printf(file, "goto *");
- lf_print_table_name(file, table);
- lf_printf(file, "[EXTRACTED32(instruction, %d, %d)];\n",
- i2target(hi_bit_nr, table->opcode->first),
- i2target(hi_bit_nr, table->opcode->last));
- }
- else {
- ASSERT("bad switch" == NULL);
- }
-}
-
-
-static void
-idecode_switch_leaf(insn_table *entry,
- lf *file,
- void *data,
- insn *instruction,
- int depth)
-{
- const char *result = data;
- ASSERT(entry->parent != NULL);
- ASSERT(depth == 0);
- ASSERT(entry->parent->opcode_rule->gen == switch_gen
- || entry->parent->opcode_rule->gen == goto_switch_gen
- || entry->parent->opcode_rule->gen == padded_switch_gen);
- ASSERT(entry->parent->opcode);
-
- if (entry->parent->opcode->is_boolean
- && entry->opcode_nr == 0) {
- /* boolean false target */
- lf_printf(file, "case %d:\n", entry->parent->opcode->boolean_constant);
- }
- else if (entry->parent->opcode->is_boolean
- && entry->opcode_nr != 0) {
- /* boolean true case */
- lf_printf(file, "default:\n");
- }
- else if (entry->parent->opcode_rule->gen == switch_gen
- || entry->parent->opcode_rule->gen == padded_switch_gen) {
- /* normal goto */
- lf_printf(file, "case %d:\n", entry->opcode_nr);
- }
- else if (entry->parent->opcode_rule->gen == goto_switch_gen) {
- /* lf_indent(file, -1); */
- print_goto_switch_name(file, entry);
- lf_printf(file, ":\n");
- /* lf_indent(file, +1); */
- }
- else {
- ASSERT("bad switch" == NULL);
- }
- lf_indent(file, +2);
- {
- if (entry->opcode == NULL) {
- /* switch calling leaf */
- if ((code & generate_jumps))
- lf_printf(file, "goto ");
- if ((code & generate_calls))
- lf_printf(file, "%s ", result);
- print_function_name(file,
- entry->insns->file_entry->fields[insn_name],
- entry->expanded_bits,
- ((code & generate_with_icache)
- ? function_name_prefix_icache
- : function_name_prefix_semantics));
- if ((code & generate_calls))
- lf_printf(file, "(%s)", SEMANTIC_FUNCTION_ACTUAL);
- lf_printf(file, ";\n");
- }
- else if (entry->opcode_rule->gen == switch_gen
- || entry->opcode_rule->gen == goto_switch_gen
- || entry->opcode_rule->gen == padded_switch_gen) {
- /* switch calling switch */
- print_idecode_switch(file, entry, result);
- }
- else {
- /* switch looking up a table */
- lf_printf(file, "{\n");
- lf_indent(file, -2);
- print_idecode_table(file, entry, result);
- lf_indent(file, -2);
- lf_printf(file, "}\n");
- }
- if (entry->parent->opcode->is_boolean
- || entry->parent->opcode_rule->gen == switch_gen
- || entry->parent->opcode_rule->gen == padded_switch_gen) {
- lf_printf(file, "break;\n");
- }
- else if (entry->parent->opcode_rule->gen == goto_switch_gen) {
- print_goto_switch_break(file, entry);
- }
- else {
- ASSERT("bad switch" == NULL);
- }
- }
- lf_indent(file, -2);
-}
-
-
-static void
-print_idecode_switch_illegal(lf *file,
- const char *result)
-{
- lf_indent(file, +2);
- print_idecode_illegal(file, result);
- lf_printf(file, "break;\n");
- lf_indent(file, -2);
-}
-
-static void
-idecode_switch_end(insn_table *table,
- lf *file,
- void *data,
- int depth)
-{
- const char *result = data;
- ASSERT(depth == 0);
- ASSERT(table->opcode_rule->gen == switch_gen
- || table->opcode_rule->gen == goto_switch_gen
- || table->opcode_rule->gen == padded_switch_gen);
- ASSERT(table->opcode);
-
- if (table->opcode->is_boolean) {
- lf_printf(file, "}\n");
- }
- else if (table->opcode_rule->gen == switch_gen
- || table->opcode_rule->gen == padded_switch_gen) {
- lf_printf(file, "default:\n");
- switch (table->opcode_rule->gen) {
- case switch_gen:
- print_idecode_switch_illegal(file, result);
- break;
- case padded_switch_gen:
- lf_printf(file, " error(\"Internal error - bad switch generated\\n\");\n");
- lf_printf(file, " break;\n");
- break;
- default:
- ASSERT("bad switch" == NULL);
- }
- lf_printf(file, "}\n");
- }
- else if (table->opcode_rule->gen == goto_switch_gen) {
- lf_printf(file, "illegal_");
- lf_print_table_name(file, table);
- lf_printf(file, ":\n");
- print_idecode_illegal(file, result);
- lf_printf(file, "break_");
- lf_print_table_name(file, table);
- lf_printf(file, ":;\n");
- if (table->parent != NULL
- && (table->parent->opcode_rule->gen == switch_gen
- || table->parent->opcode_rule->gen == goto_switch_gen
- || table->parent->opcode_rule->gen == padded_switch_gen)) {
- lf_indent(file, -2);
- lf_printf(file, "}\n");
- }
- }
- else {
- ASSERT("bad switch" == NULL);
- }
-}
-
-static void
-idecode_switch_padding(insn_table *table,
- lf *file,
- void *data,
- int depth,
- int opcode_nr)
-{
- const char *result = data;
- ASSERT(depth == 0);
- ASSERT(table->opcode_rule->gen == switch_gen
- || table->opcode_rule->gen == goto_switch_gen
- || table->opcode_rule->gen == padded_switch_gen);
-
- switch (table->opcode_rule->gen) {
- case switch_gen:
- break;
- case padded_switch_gen:
- lf_printf(file, "case %d:\n", opcode_nr);
- print_idecode_switch_illegal(file, result);
- break;
- case goto_switch_gen:
- /* no padding needed */
- break;
- default:
- ASSERT("bad switch" != NULL);
- }
-}
-
-
-void
-print_idecode_switch(lf *file,
- insn_table *table,
- const char *result)
-{
- insn_table_traverse_tree(table,
- file, (void*)result,
- 0,
- idecode_switch_start,
- idecode_switch_leaf,
- idecode_switch_end,
- idecode_switch_padding);
-}
-
-
-static void
-print_idecode_switch_function_header(lf *file,
- insn_table *table,
- int is_function_definition)
-{
- lf_printf(file, "\n");
- if ((code & generate_calls)) {
- lf_printf(file, "static ");
- if ((code & generate_with_icache))
- lf_printf(file, "idecode_semantic *");
- else
- lf_printf(file, "unsigned_word");
- if (is_function_definition)
- lf_printf(file, "\n");
- else
- lf_printf(file, " ");
- lf_print_table_name(file, table);
- lf_printf(file, "\n(%s)", ICACHE_FUNCTION_FORMAL);
- if (!is_function_definition)
- lf_printf(file, ";");
- lf_printf(file, "\n");
- }
- if ((code & generate_jumps) && is_function_definition) {
- lf_indent(file, -1);
- lf_print_table_name(file, table);
- lf_printf(file, ":\n");
- lf_indent(file, +1);
- }
-}
-
-
-static void
-idecode_declare_if_switch(insn_table *table,
- lf *file,
- void *data,
- int depth)
-{
- if ((table->opcode_rule->gen == switch_gen
- || table->opcode_rule->gen == goto_switch_gen
- || table->opcode_rule->gen == padded_switch_gen)
- && table->parent != NULL /* don't declare the top one yet */
- && table->parent->opcode_rule->gen == array_gen) {
- print_idecode_switch_function_header(file,
- table,
- 0/*isnt function definition*/);
- }
-}
-
-
-static void
-idecode_expand_if_switch(insn_table *table,
- lf *file,
- void *data,
- int depth)
-{
- if ((table->opcode_rule->gen == switch_gen
- || table->opcode_rule->gen == goto_switch_gen
- || table->opcode_rule->gen == padded_switch_gen)
- && table->parent != NULL /* don't expand the top one yet */
- && table->parent->opcode_rule->gen == array_gen) {
- print_idecode_switch_function_header(file,
- table,
- 1/*is function definition*/);
- if ((code & generate_calls)) {
- lf_printf(file, "{\n");
- lf_indent(file, +2);
- }
- print_idecode_switch(file, table, "return");
- if ((code & generate_calls)) {
- lf_indent(file, -2);
- lf_printf(file, "}\n");
- }
- }
-}
-
-
-/****************************************************************/
-
-
-static void
-print_idecode_lookups(lf *file,
- insn_table *table,
- cache_table *cache_rules)
-{
- int depth;
-
- /* output switch function declarations where needed by tables */
- insn_table_traverse_tree(table,
- file, NULL,
- 1,
- idecode_declare_if_switch, /* START */
- NULL, NULL, NULL);
-
- /* output tables where needed */
- for (depth = insn_table_depth(table);
- depth > 0;
- depth--) {
- insn_table_traverse_tree(table,
- file, NULL,
- 1-depth,
- print_idecode_table_start,
- print_idecode_table_leaf,
- print_idecode_table_end,
- print_idecode_table_padding);
- }
-
- /* output switch functions where needed */
- insn_table_traverse_tree(table,
- file, NULL,
- 1,
- idecode_expand_if_switch, /* START */
- NULL, NULL, NULL);
-}
-
-
-static void
-print_idecode_body(lf *file,
- insn_table *table,
- const char *result)
-{
- if (table->opcode_rule->gen == switch_gen
- || table->opcode_rule->gen == goto_switch_gen
- || table->opcode_rule->gen == padded_switch_gen)
- print_idecode_switch(file, table, result);
- else
- print_idecode_table(file, table, result);
-}
-
-
-/****************************************************************/
-
-
-static void
-print_run_until_stop_body(lf *file,
- insn_table *table,
- int can_stop)
-{
- /* Output the function to execute real code:
-
- Unfortunatly, there are multiple cases to consider vis:
-
- <icache> X <smp> X <events> X <keep-running-flag> X ...
-
- Consequently this function is written in multiple different ways */
-
- lf_putstr(file, "{\n");
- lf_indent(file, +2);
- lf_putstr(file, "jmp_buf halt;\n");
- lf_putstr(file, "jmp_buf restart;\n");
- if (!generate_smp) {
- lf_putstr(file, "cpu *processor = NULL;\n");
- lf_putstr(file, "unsigned_word cia = -1;\n");
- }
- lf_putstr(file, "int last_cpu;\n");
- if (generate_smp) {
- lf_putstr(file, "int current_cpu;\n");
- }
-
- if ((code & generate_with_icache)) {
- lf_putstr(file, "int cpu_nr;\n");
- lf_putstr(file, "\n");
- lf_putstr(file, "/* flush the icache of a possible break insn */\n");
- lf_putstr(file, "for (cpu_nr = 0; cpu_nr < nr_cpus; cpu_nr++)\n");
- lf_putstr(file, " cpu_flush_icache(processors[cpu_nr]);\n");
- }
-
- lf_putstr(file, "\n");
- lf_putstr(file, "/* set the halt target initially */\n");
- lf_putstr(file, "psim_set_halt_and_restart(system, &halt, NULL);\n");
- lf_putstr(file, "if (setjmp(halt))\n");
- lf_putstr(file, " return;\n");
-
- lf_putstr(file, "\n");
- lf_putstr(file, "/* where were we before the halt? */\n");
- lf_putstr(file, "last_cpu = psim_last_cpu(system);\n");
-
- lf_putstr(file, "\n");
- lf_putstr(file, "/* check for need to force event processing first */\n");
- lf_putstr(file, "if (WITH_EVENTS) {\n");
- lf_putstr(file, " if (last_cpu == nr_cpus) {\n");
- lf_putstr(file, " /* halted during event processing */\n");
- lf_putstr(file, " event_queue_process(events);\n");
- lf_putstr(file, " last_cpu = -1;\n");
- lf_putstr(file, " }\n");
- lf_putstr(file, " else if (last_cpu == nr_cpus - 1) {\n");
- lf_putstr(file, " /* last cpu did halt */\n");
- lf_putstr(file, " if (event_queue_tick(events)) {\n");
- lf_putstr(file, " event_queue_process(events);\n");
- lf_putstr(file, " }\n");
- lf_putstr(file, " last_cpu = -1;\n");
- lf_putstr(file, " }\n");
- lf_putstr(file, "}\n");
- lf_putstr(file, "else {\n");
- lf_putstr(file, " if (last_cpu == nr_cpus - 1)\n");
- lf_putstr(file, " /* cpu zero is next */\n");
- lf_putstr(file, " last_cpu = -1;\n");
- lf_putstr(file, "}\n");
-
- lf_putstr(file, "\n");
- lf_putstr(file, "/* have ensured that the event queue can not be first */\n");
- lf_putstr(file, "ASSERT(last_cpu >= -1 && last_cpu < nr_cpus - 1);\n");
-
- if (!generate_smp) {
-
- lf_putstr(file, "
-/* CASE 1: NO SMP (with or with out instruction cache).
-
- In this case, we can take advantage of the fact that the current
- instruction address does not need to be returned to the cpu object
- after every execution of an instruction. Instead it only needs to
- be saved when either A. the main loop exits or B. A cpu-halt or
- cpu-restart call forces the loop to be re-enered. The later
- functions always save the current cpu instruction address.
-
- Two subcases also exist that with and that without an instruction
- cache.
-
- An additional complexity is the need to ensure that a 1:1 ratio
- is maintained between the execution of an instruction and the
- incrementing of the simulation clock */");
-
- lf_putstr(file, "\n");
-
- lf_putstr(file, "\n");
- lf_putstr(file, "/* now add restart target as ready to run */\n");
- lf_putstr(file, "psim_set_halt_and_restart(system, &halt, &restart);\n");
- lf_putstr(file, "if (setjmp(restart)) {\n");
- lf_putstr(file, " if (WITH_EVENTS) {\n");
- lf_putstr(file, " /* when restart, cpu must have been last, clock next */\n");
- lf_putstr(file, " if (event_queue_tick(events)) {\n");
- lf_putstr(file, " event_queue_process(events);\n");
- lf_putstr(file, " }\n");
- lf_putstr(file, " }\n");
- lf_putstr(file, "}\n");
-
- lf_putstr(file, "\n");
- lf_putstr(file, "/* prime the main loop */\n");
- lf_putstr(file, "processor = processors[0];\n");
- lf_putstr(file, "cia = cpu_get_program_counter(processor);\n");
-
- lf_putstr(file, "\n");
- lf_putstr(file, "while (1) {\n");
- lf_indent(file, +2);
-
- if (!(code & generate_with_icache)) {
- lf_putstr(file, "instruction_word instruction =\n");
- lf_putstr(file, " vm_instruction_map_read(cpu_instruction_map(processor), processor, cia);\n");
- lf_putstr(file, "\n");
- print_idecode_body(file, table, "cia =");;
- }
-
- if ((code & generate_with_icache)) {
- lf_putstr(file, "idecode_cache *cache_entry =\n");
- lf_putstr(file, " cpu_icache_entry(processor, cia);\n");
- lf_putstr(file, "if (cache_entry->address == cia) {\n");
- lf_putstr(file, " /* cache hit */\n");
- lf_putstr(file, " idecode_semantic *const semantic = cache_entry->semantic;\n");
- lf_putstr(file, " cia = semantic(processor, cache_entry, cia);\n");
- /* tail */
- if (can_stop) {
- lf_putstr(file, "if (keep_running != NULL && !*keep_running)\n");
- lf_putstr(file, " cpu_halt(processor, cia, was_continuing, 0/*ignore*/);\n");
- }
- lf_putstr(file, "}\n");
- lf_putstr(file, "else {\n");
- lf_putstr(file, " /* cache miss */\n");
- if (!(code & generate_with_semantic_icache)) {
- lf_indent(file, +2);
- lf_putstr(file, "idecode_semantic *semantic;\n");
- lf_indent(file, -2);
- }
- lf_putstr(file, " instruction_word instruction =\n");
- lf_putstr(file, " vm_instruction_map_read(cpu_instruction_map(processor), processor, cia);\n");
- lf_putstr(file, " if (WITH_MON != 0)\n");
- lf_putstr(file, " mon_event(mon_event_icache_miss, processor, cia);\n");
- if ((code & generate_with_semantic_icache)) {
- lf_putstr(file, "{\n");
- lf_indent(file, +2);
- print_idecode_body(file, table, "cia =");
- lf_indent(file, -2);
- lf_putstr(file, "}\n");
- }
- else {
- print_idecode_body(file, table, "semantic =");
- lf_putstr(file, " cia = semantic(processor, cache_entry, cia);\n");
- }
- lf_putstr(file, "}\n");
- }
-
- /* events */
- lf_putstr(file, "\n");
- lf_putstr(file, "/* process any events */\n");
- lf_putstr(file, "if (WITH_EVENTS) {\n");
- lf_putstr(file, " if (event_queue_tick(events)) {\n");
- lf_putstr(file, " cpu_set_program_counter(processor, cia);\n");
- lf_putstr(file, " event_queue_process(events);\n");
- lf_putstr(file, " cia = cpu_get_program_counter(processor);\n");
- lf_putstr(file, " }\n");
- lf_putstr(file, "}\n");
-
- /* tail */
- if (can_stop) {
- lf_putstr(file, "\n");
- lf_putstr(file, "/* abort if necessary */\n");
- lf_putstr(file, "if (keep_running != NULL && !*keep_running)\n");
- lf_putstr(file, " cpu_halt(processor, cia, was_continuing, 0/*not important*/);\n");
- }
-
- lf_indent(file, -2);
- lf_putstr(file, "}\n");
- }
-
- if (generate_smp) {
-
- lf_putstr(file, "
-/* CASE 2: SMP (With or without ICACHE)
-
- The complexity here comes from needing to correctly restart the
- system when it is aborted. In particular if cpu0 requests a
- restart, the next cpu is still cpu1. Cpu0 being restarted after
- all the other CPU's and the event queue have been processed */");
-
- lf_putstr(file, "\n");
-
- lf_putstr(file, "\n");
- lf_putstr(file, "/* now establish the restart target */\n");
- lf_putstr(file, "psim_set_halt_and_restart(system, &halt, &restart);\n");
- lf_putstr(file, "if (setjmp(restart)) {\n");
- lf_putstr(file, " current_cpu = psim_last_cpu(system);\n");
- lf_putstr(file, " ASSERT(current_cpu >= 0 && current_cpu < nr_cpus);\n");
- lf_putstr(file, "}\n");
- lf_putstr(file, "else {\n");
- lf_putstr(file, " current_cpu = last_cpu;\n");
- lf_putstr(file, " ASSERT(current_cpu >= -1 && current_cpu < nr_cpus);\n");
- lf_putstr(file, "}\n");
-
-
- lf_putstr(file, "\n");
- lf_putstr(file, "while (1) {\n");
- lf_indent(file, +2);
-
- lf_putstr(file, "\n");
- lf_putstr(file, "if (WITH_EVENTS) {\n");
- lf_putstr(file, " current_cpu += 1;\n");
- lf_putstr(file, " if (current_cpu == nr_cpus) {\n");
- lf_putstr(file, " if (event_queue_tick(events)) {\n");
- lf_putstr(file, " event_queue_process(events);\n");
- lf_putstr(file, " }\n");
- lf_putstr(file, " current_cpu = 0;\n");
- lf_putstr(file, " }\n");
- lf_putstr(file, "}\n");
- lf_putstr(file, "else {\n");
- lf_putstr(file, " current_cpu = (current_cpu + 1) % nr_cpus;\n");
- lf_putstr(file, "}\n");
-
- lf_putstr(file, "\n");
- lf_putstr(file, "{\n");
- lf_indent(file, +2);
- lf_putstr(file, "cpu *processor = processors[current_cpu];\n");
- lf_putstr(file, "unsigned_word cia =\n");
- lf_putstr(file, " cpu_get_program_counter(processor);\n");
-
- if (!(code & generate_with_icache)) {
- lf_putstr(file, "instruction_word instruction =\n");
- lf_putstr(file, " vm_instruction_map_read(cpu_instruction_map(processor), processor, cia);\n");
- print_idecode_body(file, table, "cia =");
- if (can_stop) {
- lf_putstr(file, "if (keep_running != NULL && !*keep_running)\n");
- lf_putstr(file, " cpu_halt(processor, cia, was_continuing, 0/*ignore*/);\n");
- }
- lf_putstr(file, "cpu_set_program_counter(processor, cia);\n");
- }
-
- if ((code & generate_with_icache)) {
- lf_putstr(file, "idecode_cache *cache_entry =\n");
- lf_putstr(file, " cpu_icache_entry(processor, cia);\n");
- lf_putstr(file, "\n");
- lf_putstr(file, "if (cache_entry->address == cia) {\n");
- {
- lf_indent(file, +2);
- lf_putstr(file, "\n");
- lf_putstr(file, "/* cache hit */\n");
- lf_putstr(file, "idecode_semantic *semantic = cache_entry->semantic;\n");
- lf_putstr(file, "cia = semantic(processor, cache_entry, cia);\n");
- /* tail */
- if (can_stop) {
- lf_putstr(file, "if (keep_running != NULL && !*keep_running)\n");
- lf_putstr(file, " cpu_halt(processor, cia, was_continuing, 0/*ignore-signal*/);\n");
- }
- lf_putstr(file, "cpu_set_program_counter(processor, cia);\n");
- lf_putstr(file, "\n");
- lf_indent(file, -2);
- }
- lf_putstr(file, "}\n");
- lf_putstr(file, "else {\n");
- {
- lf_indent(file, +2);
- lf_putstr(file, "\n");
- lf_putstr(file, "/* cache miss */\n");
- if (!(code & generate_with_semantic_icache)) {
- lf_putstr(file, "idecode_semantic *semantic;\n");
- }
- lf_putstr(file, "instruction_word instruction =\n");
- lf_putstr(file, " vm_instruction_map_read(cpu_instruction_map(processor), processor, cia);\n");
- lf_putstr(file, "if (WITH_MON != 0)\n");
- lf_putstr(file, " mon_event(mon_event_icache_miss, processors[current_cpu], cia);\n");
- if ((code & generate_with_semantic_icache)) {
- lf_putstr(file, "{\n");
- lf_indent(file, +2);
- print_idecode_body(file, table, "cia =");
- lf_indent(file, -2);
- lf_putstr(file, "}\n");
- }
- else {
- print_idecode_body(file, table, "semantic = ");
- lf_putstr(file, "cia = semantic(processor, cache_entry, cia);\n");
- }
- /* tail */
- if (can_stop) {
- lf_putstr(file, "if (keep_running != NULL && !*keep_running)\n");
- lf_putstr(file, " cpu_halt(processor, cia, was_continuing, 0/*ignore-signal*/);\n");
- }
- lf_putstr(file, "cpu_set_program_counter(processor, cia);\n");
- lf_putstr(file, "\n");
- lf_indent(file, -2);
- }
- lf_putstr(file, "}\n");
- }
-
- /* close */
- lf_indent(file, -2);
- lf_putstr(file, "}\n");
-
- /* tail */
- lf_indent(file, -2);
- lf_putstr(file, "}\n");
- }
-
-
- lf_indent(file, -2);
- lf_putstr(file, "}\n");
-}
-
-
-/****************************************************************/
-
-static void
-print_jump(lf *file,
- int is_tail)
-{
- if (is_tail) {
- lf_putstr(file, "if (keep_running != NULL && !*keep_running)\n");
- lf_putstr(file, " cpu_halt(processor, nia, was_continuing, 0/*na*/);\n");
- }
-
- if (!generate_smp) {
- lf_putstr(file, "if (WITH_EVENTS) {\n");
- lf_putstr(file, " if (event_queue_tick(events)) {\n");
- lf_putstr(file, " cpu_set_program_counter(processor, nia);\n");
- lf_putstr(file, " event_queue_process(events);\n");
- lf_putstr(file, " nia = cpu_get_program_counter(processor);\n");
- lf_putstr(file, " }\n");
- lf_putstr(file, "}\n");
- }
-
- if (generate_smp) {
- if (is_tail)
- lf_putstr(file, "cpu_set_program_counter(processor, nia);\n");
- lf_putstr(file, "if (WITH_EVENTS) {\n");
- lf_putstr(file, " current_cpu += 1;\n");
- lf_putstr(file, " if (current_cpu >= nr_cpus) {\n");
- lf_putstr(file, " if (event_queue_tick(events)) {\n");
- lf_putstr(file, " event_queue_process(events);\n");
- lf_putstr(file, " }\n");
- lf_putstr(file, " current_cpu = 0;\n");
- lf_putstr(file, " }\n");
- lf_putstr(file, "}\n");
- lf_putstr(file, "else {\n");
- lf_putstr(file, " current_cpu = (current_cpu + 1) % nr_cpus;\n");
- lf_putstr(file, "}\n");
- lf_putstr(file, "processor = processors[current_cpu];\n");
- lf_putstr(file, "nia = cpu_get_program_counter(processor);\n");
- }
-
- if ((code & generate_with_icache)) {
- lf_putstr(file, "cache_entry = cpu_icache_entry(processor, nia);\n");
- lf_putstr(file, "if (cache_entry->address == nia) {\n");
- lf_putstr(file, " /* cache hit */\n");
- lf_putstr(file, " goto *cache_entry->semantic;\n");
- lf_putstr(file, "}\n");
- if (is_tail) {
- lf_putstr(file, "goto cache_miss;\n");
- }
- }
-
- if (!(code & generate_with_icache) && is_tail) {
- lf_printf(file, "goto idecode;\n");
- }
-
-}
-
-
-
-
-
-static void
-print_jump_insn(lf *file,
- insn *instruction,
- insn_bits *expanded_bits,
- opcode_field *opcodes,
- cache_table *cache_rules)
-{
-
- /* what we are for the moment */
- lf_printf(file, "\n");
- print_my_defines(file, expanded_bits, instruction->file_entry);
-
- /* output the icache entry */
- if ((code & generate_with_icache)) {
- lf_printf(file, "\n");
- lf_indent(file, -1);
- print_function_name(file,
- instruction->file_entry->fields[insn_name],
- expanded_bits,
- function_name_prefix_icache);
- lf_printf(file, ":\n");
- lf_indent(file, +1);
- lf_printf(file, "{\n");
- lf_indent(file, +2);
- lf_putstr(file, "const unsigned_word cia = nia;\n");
- print_itrace(file, instruction->file_entry, 1/*putting-value-in-cache*/);
- print_idecode_validate(file, instruction, opcodes);
- lf_printf(file, "\n");
- lf_printf(file, "{\n");
- lf_indent(file, +2);
- print_icache_body(file,
- instruction,
- expanded_bits,
- cache_rules,
- 0, /*use_defines*/
- put_values_in_icache);
- lf_printf(file, "cache_entry->address = nia;\n");
- lf_printf(file, "cache_entry->semantic = &&");
- print_function_name(file,
- instruction->file_entry->fields[insn_name],
- expanded_bits,
- function_name_prefix_semantics);
- lf_printf(file, ";\n");
- if ((code & generate_with_semantic_icache)) {
- print_semantic_body(file,
- instruction,
- expanded_bits,
- opcodes);
- print_jump(file, 1/*is-tail*/);
- }
- else {
- lf_printf(file, "/* goto ");
- print_function_name(file,
- instruction->file_entry->fields[insn_name],
- expanded_bits,
- function_name_prefix_semantics);
- lf_printf(file, "; */\n");
- }
- lf_indent(file, -2);
- lf_putstr(file, "}\n");
- lf_indent(file, -2);
- lf_printf(file, "}\n");
- }
-
- /* print the semantics */
- lf_printf(file, "\n");
- lf_indent(file, -1);
- print_function_name(file,
- instruction->file_entry->fields[insn_name],
- expanded_bits,
- function_name_prefix_semantics);
- lf_printf(file, ":\n");
- lf_indent(file, +1);
- lf_printf(file, "{\n");
- lf_indent(file, +2);
- lf_putstr(file, "const unsigned_word cia = nia;\n");
- print_icache_body(file,
- instruction,
- expanded_bits,
- cache_rules,
- ((code & generate_with_direct_access)
- ? define_variables
- : declare_variables),
- ((code & generate_with_icache)
- ? get_values_from_icache
- : do_not_use_icache));
- print_semantic_body(file,
- instruction,
- expanded_bits,
- opcodes);
- if (code & generate_with_direct_access)
- print_icache_body(file,
- instruction,
- expanded_bits,
- cache_rules,
- undef_variables,
- ((code & generate_with_icache)
- ? get_values_from_icache
- : do_not_use_icache));
- print_jump(file, 1/*is tail*/);
- lf_indent(file, -2);
- lf_printf(file, "}\n");
-}
-
-static void
-print_jump_definition(insn_table *entry,
- lf *file,
- void *data,
- insn *instruction,
- int depth)
-{
- cache_table *cache_rules = (cache_table*)data;
- if (generate_expanded_instructions) {
- ASSERT(entry->nr_insn == 1
- && entry->opcode == NULL
- && entry->parent != NULL
- && entry->parent->opcode != NULL);
- ASSERT(entry->nr_insn == 1
- && entry->opcode == NULL
- && entry->parent != NULL
- && entry->parent->opcode != NULL
- && entry->parent->opcode_rule != NULL);
- print_jump_insn(file,
- entry->insns,
- entry->expanded_bits,
- entry->opcode,
- cache_rules);
- }
- else {
- print_jump_insn(file,
- instruction,
- NULL,
- NULL,
- cache_rules);
- }
-}
-
-
-static void
-print_jump_internal_function(insn_table *table,
- lf *file,
- void *data,
- table_entry *function)
-{
- if (it_is("internal", function->fields[insn_flags])) {
- lf_printf(file, "\n");
- table_entry_print_cpp_line_nr(file, function);
- lf_indent(file, -1);
- print_function_name(file,
- function->fields[insn_name],
- NULL,
- ((code & generate_with_icache)
- ? function_name_prefix_icache
- : function_name_prefix_semantics));
- lf_printf(file, ":\n");
- lf_indent(file, +1);
- lf_printf(file, "{\n");
- lf_indent(file, +2);
- lf_printf(file, "const unsigned_word cia = nia;\n");
- lf_print__c_code(file, function->annex);
- lf_print__internal_reference(file);
- lf_printf(file, "error(\"Internal function must longjump\\n\");\n");
- lf_indent(file, -2);
- lf_printf(file, "}\n");
- }
-}
-
-static void
-print_jump_until_stop_body(lf *file,
- insn_table *table,
- cache_table *cache_rules,
- int can_stop)
-{
- lf_printf(file, "{\n");
- lf_indent(file, +2);
- if (!can_stop)
- lf_printf(file, "int *keep_running = NULL;\n");
- lf_putstr(file, "jmp_buf halt;\n");
- lf_putstr(file, "jmp_buf restart;\n");
- lf_putstr(file, "cpu *processor = NULL;\n");
- lf_putstr(file, "unsigned_word nia = -1;\n");
- lf_putstr(file, "instruction_word instruction = 0;\n");
- if ((code & generate_with_icache)) {
- lf_putstr(file, "idecode_cache *cache_entry = NULL;\n");
- }
- if (generate_smp) {
- lf_putstr(file, "int current_cpu = -1;\n");
- }
-
- /* all the switches and tables - they know about jumping */
- print_idecode_lookups(file, table, cache_rules);
-
- /* start the simulation up */
- if ((code & generate_with_icache)) {
- lf_putstr(file, "\n");
- lf_putstr(file, "{\n");
- lf_putstr(file, " int cpu_nr;\n");
- lf_putstr(file, " for (cpu_nr = 0; cpu_nr < nr_cpus; cpu_nr++)\n");
- lf_putstr(file, " cpu_flush_icache(processors[cpu_nr]);\n");
- lf_putstr(file, "}\n");
- }
-
- lf_putstr(file, "\n");
- lf_putstr(file, "psim_set_halt_and_restart(system, &halt, &restart);\n");
-
- lf_putstr(file, "\n");
- lf_putstr(file, "if (setjmp(halt))\n");
- lf_putstr(file, " return;\n");
-
- lf_putstr(file, "\n");
- lf_putstr(file, "setjmp(restart);\n");
-
- lf_putstr(file, "\n");
- if (!generate_smp) {
- lf_putstr(file, "processor = processors[0];\n");
- lf_putstr(file, "nia = cpu_get_program_counter(processor);\n");
- }
- else {
- lf_putstr(file, "current_cpu = psim_last_cpu(system);\n");
- }
-
- if (!(code & generate_with_icache)) {
- lf_printf(file, "\n");
- lf_indent(file, -1);
- lf_printf(file, "idecode:\n");
- lf_indent(file, +1);
- }
-
- print_jump(file, 0/*is_tail*/);
-
- if ((code & generate_with_icache)) {
- lf_indent(file, -1);
- lf_printf(file, "cache_miss:\n");
- lf_indent(file, +1);
- }
-
- lf_putstr(file, "instruction\n");
- lf_putstr(file, " = vm_instruction_map_read(cpu_instruction_map(processor),\n");
- lf_putstr(file, " processor, nia);\n");
- print_idecode_body(file, table, "/*IGORE*/");
-
- /* print out a table of all the internals functions */
- insn_table_traverse_function(table,
- file, NULL,
- print_jump_internal_function);
-
- /* print out a table of all the instructions */
- if (generate_expanded_instructions)
- insn_table_traverse_tree(table,
- file, cache_rules,
- 1,
- NULL, /* start */
- print_jump_definition, /* leaf */
- NULL, /* end */
- NULL); /* padding */
- else
- insn_table_traverse_insn(table,
- file, cache_rules,
- print_jump_definition);
- lf_indent(file, -2);
- lf_printf(file, "}\n");
-}
-
-
-/****************************************************************/
-
-
-
-static void
-print_idecode_floating_point_unavailable(lf *file)
-{
- if ((code & generate_jumps))
- lf_printf(file, "goto %s_floating_point_unavailable;\n", (code & generate_with_icache) ? "icache" : "semantic");
- else if ((code & generate_with_icache))
- lf_printf(file, "return icache_floating_point_unavailable(%s);\n",
- ICACHE_FUNCTION_ACTUAL);
- else
- lf_printf(file, "return semantic_floating_point_unavailable(%s);\n",
- SEMANTIC_FUNCTION_ACTUAL);
-}
-
-
-/* Output code to do any final checks on the decoded instruction.
- This includes things like verifying any on decoded fields have the
- correct value and checking that (for floating point) floating point
- hardware isn't disabled */
-
-void
-print_idecode_validate(lf *file,
- insn *instruction,
- opcode_field *opcodes)
-{
- /* Validate: unchecked instruction fields
-
- If any constant fields in the instruction were not checked by the
- idecode tables, output code to check that they have the correct
- value here */
- {
- unsigned check_mask = 0;
- unsigned check_val = 0;
- insn_field *field;
- opcode_field *opcode;
-
- /* form check_mask/check_val containing what needs to be checked
- in the instruction */
- for (field = instruction->fields->first;
- field->first < insn_bit_size;
- field = field->next) {
-
- check_mask <<= field->width;
- check_val <<= field->width;
-
- /* is it a constant that could need validating? */
- if (!field->is_int && !field->is_slash)
- continue;
-
- /* has it been checked by a table? */
- for (opcode = opcodes; opcode != NULL; opcode = opcode->parent) {
- if (field->first >= opcode->first
- && field->last <= opcode->last)
- break;
- }
- if (opcode != NULL)
- continue;
-
- check_mask |= (1 << field->width)-1;
- check_val |= field->val_int;
- }
-
- /* if any bits not checked by opcode tables, output code to check them */
- if (check_mask) {
- lf_printf(file, "\n");
- lf_printf(file, "/* validate: %s */\n",
- instruction->file_entry->fields[insn_format]);
- lf_printf(file, "if (WITH_RESERVED_BITS && (instruction & 0x%x) != 0x%x)\n",
- check_mask, check_val);
- lf_indent(file, +2);
- print_idecode_illegal(file, "return");
- lf_indent(file, -2);
- }
- }
-
- /* Validate floating point hardware
-
- If the simulator is being built with out floating point hardware
- (different to it being disabled in the MSR) then floating point
- instructions are invalid */
- {
- if (it_is("f", instruction->file_entry->fields[insn_flags])) {
- lf_printf(file, "\n");
- lf_printf(file, "/* Validate: FP hardware exists */\n");
- lf_printf(file, "if (CURRENT_FLOATING_POINT != HARD_FLOATING_POINT)\n");
- lf_indent(file, +2);
- print_idecode_illegal(file, "return");
- lf_indent(file, -2);
- }
- }
-
- /* Validate: Floating Point available
-
- If floating point is not available, we enter a floating point
- unavailable interrupt into the cache instead of the instruction
- proper.
-
- The PowerPC spec requires a CSI after MSR[FP] is changed and when
- ever a CSI occures we flush the instruction cache. */
-
- {
- if (it_is("f", instruction->file_entry->fields[insn_flags])) {
- lf_printf(file, "\n");
- lf_printf(file, "/* Validate: FP available according to MSR[FP] */\n");
- lf_printf(file, "if (!IS_FP_AVAILABLE(processor))\n");
- lf_indent(file, +2);
- print_idecode_floating_point_unavailable(file);
- lf_indent(file, -2);
- }
- }
-}
-
-
-/****************************************************************/
-
-
-static void
-print_idecode_run_function_header(lf *file,
- int can_stop,
- int is_definition)
-{
- int indent;
- lf_printf(file, "\n");
- lf_print_function_type(file, "void", "INLINE_IDECODE", (is_definition ? " " : "\n"));
- indent = lf_putstr(file, (can_stop ? "idecode_run_until_stop" : "idecode_run"));
- if (is_definition)
- lf_putstr(file, "\n");
- else
- lf_indent(file, +indent);
- lf_putstr(file, "(psim *system,\n");
- if (can_stop)
- lf_putstr(file, " volatile int *keep_running,\n");
- lf_printf(file, " event_queue *events,\n");
- lf_putstr(file, " cpu *const processors[],\n");
- lf_putstr(file, " const int nr_cpus)");
- if (is_definition)
- lf_putstr(file, ";");
- else
- lf_indent(file, -indent);
- lf_putstr(file, "\n");
-}
-
-
-void
-gen_idecode_h(lf *file,
- insn_table *table,
- cache_table *cache_rules)
-{
- lf_printf(file, "/* The idecode_*.h functions shall move to support */\n");
- lf_printf(file, "#include \"idecode_expression.h\"\n");
- lf_printf(file, "#include \"idecode_fields.h\"\n");
- lf_printf(file, "#include \"idecode_branch.h\"\n");
- lf_printf(file, "\n");
- print_icache_struct(table, cache_rules, file);
- lf_printf(file, "\n");
- lf_printf(file, "#define WITH_IDECODE_SMP %d\n", generate_smp);
- lf_printf(file, "\n");
- print_idecode_run_function_header(file, 0/*can stop*/, 1/*is definition*/);
- print_idecode_run_function_header(file, 1/*can stop*/, 1/*is definition*/);
-}
-
-
-void
-gen_idecode_c(lf *file,
- insn_table *table,
- cache_table *cache_rules)
-{
- /* the intro */
- lf_printf(file, "#include \"inline.c\"\n");
- lf_printf(file, "\n");
- lf_printf(file, "#include \"cpu.h\"\n");
- lf_printf(file, "#include \"idecode.h\"\n");
- lf_printf(file, "#include \"semantics.h\"\n");
- lf_printf(file, "#include \"icache.h\"\n");
- lf_printf(file, "#include \"support.h\"\n");
- lf_printf(file, "\n");
- lf_printf(file, "#include <setjmp.h>\n");
- lf_printf(file, "\n");
- lf_printf(file, "enum {\n");
- lf_printf(file, " /* greater or equal to zero => table */\n");
- lf_printf(file, " function_entry = -1,\n");
- lf_printf(file, " boolean_entry = -2,\n");
- lf_printf(file, "};\n");
- lf_printf(file, "\n");
- lf_printf(file, "typedef struct _idecode_table_entry {\n");
- lf_printf(file, " int shift;\n");
- lf_printf(file, " instruction_word mask;\n");
- lf_printf(file, " instruction_word value;");
- lf_printf(file, " void *function_or_table;\n");
- lf_printf(file, "} idecode_table_entry;\n");
- lf_printf(file, "\n");
- lf_printf(file, "\n");
-
- if ((code & generate_calls)) {
-
- print_idecode_lookups(file, table, cache_rules);
-
- /* output the main idecode routine */
- print_idecode_run_function_header(file, 0/*can stop*/, 0/*is definition*/);
- print_run_until_stop_body(file, table, 0/* have stop argument */);
-
- print_idecode_run_function_header(file, 1/*can stop*/, 0/*is definition*/);
- print_run_until_stop_body(file, table, 1/* no stop argument */);
-
- }
- else if ((code & generate_jumps)) {
-
- print_idecode_run_function_header(file, 0/*can stop*/, 0/*is definition*/);
- print_jump_until_stop_body(file, table, cache_rules, 0 /* have stop argument */);
-
- print_idecode_run_function_header(file, 1/*can stop*/, 0/*is definition*/);
- print_jump_until_stop_body(file, table, cache_rules, 1/* have stop argument */);
-
- }
- else {
- error("Something is wrong!\n");
- }
-}
diff --git a/sim/ppc/gen-idecode.h b/sim/ppc/gen-idecode.h
deleted file mode 100644
index f46376bf9ed..00000000000
--- a/sim/ppc/gen-idecode.h
+++ /dev/null
@@ -1,40 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1995, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-extern void gen_idecode_h
-(lf *file,
- insn_table *table,
- cache_table *cache_rules);
-
-extern void gen_idecode_c
-(lf *file,
- insn_table *table,
- cache_table *cache_rules);
-
-
-/* Output code to do any final checks on the decoded instruction.
- This includes things like verifying any on decoded fields have the
- correct value and checking that (for floating point) floating point
- hardware isn't disabled */
-
-extern void print_idecode_validate
-(lf *file,
- insn *instruction,
- opcode_field *opcodes);
diff --git a/sim/ppc/gen-itable.c b/sim/ppc/gen-itable.c
deleted file mode 100644
index 132aa291e08..00000000000
--- a/sim/ppc/gen-itable.c
+++ /dev/null
@@ -1,122 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1995, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-
-#include "misc.h"
-#include "lf.h"
-#include "table.h"
-
-#include "filter.h"
-
-#include "ld-decode.h"
-#include "ld-insn.h"
-
-#include "igen.h"
-#include "gen-itable.h"
-
-#ifndef NULL
-#define NULL 0
-#endif
-
-
-
-static void
-itable_h_insn(insn_table *entry,
- lf *file,
- void *data,
- insn *instruction,
- int depth)
-{
- lf_printf(file, " ");
- print_function_name(file,
- instruction->file_entry->fields[insn_name],
- NULL,
- function_name_prefix_itable);
- lf_printf(file, ",\n");
-}
-
-
-extern void
-gen_itable_h(insn_table *table, lf *file)
-{
- /* output an enumerated type for each instruction */
- lf_printf(file, "typedef enum {\n");
- insn_table_traverse_insn(table,
- file, NULL,
- itable_h_insn);
- lf_printf(file, " nr_itable_entries,\n");
- lf_printf(file, "} itable_index;\n");
- lf_printf(file, "\n");
-
- /* output the table that contains the actual instruction info */
- lf_printf(file, "typedef struct _itable_instruction_info {\n");
- lf_printf(file, " itable_index nr;\n");
- lf_printf(file, " char *format;\n");
- lf_printf(file, " char *form;\n");
- lf_printf(file, " char *flags;\n");
- lf_printf(file, " char *mnemonic;\n");
- lf_printf(file, " char *name;\n");
- lf_printf(file, " char *file;\n");
- lf_printf(file, " int line_nr;\n");
- lf_printf(file, "} itable_info;\n");
- lf_printf(file, "\n");
- lf_printf(file, "extern itable_info itable[nr_itable_entries];\n");
-}
-
-/****************************************************************/
-
-static void
-itable_c_insn(insn_table *entry,
- lf *file,
- void *data,
- insn *instruction,
- int depth)
-{
- char **fields = instruction->file_entry->fields;
- lf_printf(file, " { ");
- print_function_name(file,
- instruction->file_entry->fields[insn_name],
- NULL,
- function_name_prefix_itable);
- lf_printf(file, ",\n");
- lf_printf(file, " \"%s\",\n", fields[insn_format]);
- lf_printf(file, " \"%s\",\n", fields[insn_form]);
- lf_printf(file, " \"%s\",\n", fields[insn_flags]);
- lf_printf(file, " \"%s\",\n", fields[insn_mnemonic]);
- lf_printf(file, " \"%s\",\n", fields[insn_name]);
- lf_printf(file, " \"%s\",\n", filter_filename (instruction->file_entry->file_name));
- lf_printf(file, " %d,\n", instruction->file_entry->line_nr);
- lf_printf(file, " },\n");
-}
-
-
-extern void
-gen_itable_c(insn_table *table, lf *file)
-{
- /* output the table that contains the actual instruction info */
- lf_printf(file, "#include \"itable.h\"\n");
- lf_printf(file, "\n");
- lf_printf(file, "itable_info itable[nr_itable_entries] = {\n");
- insn_table_traverse_insn(table,
- file, NULL,
- itable_c_insn);
- lf_printf(file, "};\n");
-}
diff --git a/sim/ppc/gen-itable.h b/sim/ppc/gen-itable.h
deleted file mode 100644
index 341dc678547..00000000000
--- a/sim/ppc/gen-itable.h
+++ /dev/null
@@ -1,28 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1995, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-extern void gen_itable_h
-(insn_table *table,
- lf *file);
-
-extern void gen_itable_c
-(insn_table *table,
- lf *file);
diff --git a/sim/ppc/gen-model.c b/sim/ppc/gen-model.c
deleted file mode 100644
index 4ec167717c0..00000000000
--- a/sim/ppc/gen-model.c
+++ /dev/null
@@ -1,393 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1995, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-#include "misc.h"
-#include "lf.h"
-#include "table.h"
-
-#include "filter.h"
-
-#include "ld-decode.h"
-#include "ld-insn.h"
-
-#include "gen-model.h"
-
-#ifndef NULL
-#define NULL 0
-#endif
-
-
-static void
-model_c_or_h_data(insn_table *table,
- lf *file,
- table_entry *data)
-{
- if (data->annex) {
- table_entry_print_cpp_line_nr(file, data);
- lf_print__c_code(file, data->annex);
- lf_print__internal_reference(file);
- lf_printf(file, "\n");
- }
-}
-
-static void
-model_c_or_h_function(insn_table *entry,
- lf *file,
- table_entry *function,
- char *prefix)
-{
- if (function->fields[function_type] == NULL
- || function->fields[function_type][0] == '\0') {
- error("Model function type not specified for %s", function->fields[function_name]);
- }
- lf_printf(file, "\n");
- lf_print_function_type(file, function->fields[function_type], prefix, " ");
- lf_printf(file, "%s\n(%s);\n",
- function->fields[function_name],
- function->fields[function_param]);
- lf_printf(file, "\n");
-}
-
-void
-gen_model_h(insn_table *table, lf *file)
-{
- insn *insn_ptr;
- model *model_ptr;
- insn *macro;
- char *name;
- int model_create_p = 0;
- int model_init_p = 0;
- int model_halt_p = 0;
- int model_mon_info_p = 0;
- int model_mon_info_free_p = 0;
-
- for(macro = model_macros; macro; macro = macro->next) {
- model_c_or_h_data(table, file, macro->file_entry);
- }
-
- lf_printf(file, "typedef enum _model_enum {\n");
- lf_printf(file, " MODEL_NONE,\n");
- for (model_ptr = models; model_ptr; model_ptr = model_ptr->next) {
- lf_printf(file, " MODEL_%s,\n", model_ptr->name);
- }
- lf_printf(file, " nr_models\n");
- lf_printf(file, "} model_enum;\n");
- lf_printf(file, "\n");
-
- lf_printf(file, "#define DEFAULT_MODEL MODEL_%s\n", (models) ? models->name : "NONE");
- lf_printf(file, "\n");
-
- lf_printf(file, "typedef struct _model_data model_data;\n");
- lf_printf(file, "typedef struct _model_time model_time;\n");
- lf_printf(file, "\n");
-
- lf_printf(file, "extern model_enum current_model;\n");
- lf_printf(file, "extern const char *model_name[ (int)nr_models ];\n");
- lf_printf(file, "extern const char *const *const model_func_unit_name[ (int)nr_models ];\n");
- lf_printf(file, "extern const model_time *const model_time_mapping[ (int)nr_models ];\n");
- lf_printf(file, "\n");
-
- for(insn_ptr = model_functions; insn_ptr; insn_ptr = insn_ptr->next) {
- model_c_or_h_function(table, file, insn_ptr->file_entry, "INLINE_MODEL");
- name = insn_ptr->file_entry->fields[function_name];
- if (strcmp (name, "model_create") == 0)
- model_create_p = 1;
- else if (strcmp (name, "model_init") == 0)
- model_init_p = 1;
- else if (strcmp (name, "model_halt") == 0)
- model_halt_p = 1;
- else if (strcmp (name, "model_mon_info") == 0)
- model_mon_info_p = 1;
- else if (strcmp (name, "model_mon_info_free") == 0)
- model_mon_info_free_p = 1;
- }
-
- if (!model_create_p) {
- lf_print_function_type(file, "model_data *", "INLINE_MODEL", " ");
- lf_printf(file, "model_create\n");
- lf_printf(file, "(cpu *processor);\n");
- lf_printf(file, "\n");
- }
-
- if (!model_init_p) {
- lf_print_function_type(file, "void", "INLINE_MODEL", " ");
- lf_printf(file, "model_init\n");
- lf_printf(file, "(model_data *model_ptr);\n");
- lf_printf(file, "\n");
- }
-
- if (!model_halt_p) {
- lf_print_function_type(file, "void", "INLINE_MODEL", " ");
- lf_printf(file, "model_halt\n");
- lf_printf(file, "(model_data *model_ptr);\n");
- lf_printf(file, "\n");
- }
-
- if (!model_mon_info_p) {
- lf_print_function_type(file, "model_print *", "INLINE_MODEL", " ");
- lf_printf(file, "model_mon_info\n");
- lf_printf(file, "(model_data *model_ptr);\n");
- lf_printf(file, "\n");
- }
-
- if (!model_mon_info_free_p) {
- lf_print_function_type(file, "void", "INLINE_MODEL", " ");
- lf_printf(file, "model_mon_info_free\n");
- lf_printf(file, "(model_data *model_ptr,\n");
- lf_printf(file, " model_print *info_ptr);\n");
- lf_printf(file, "\n");
- }
-
- lf_print_function_type(file, "void", "INLINE_MODEL", " ");
- lf_printf(file, "model_set\n");
- lf_printf(file, "(const char *name);\n");
-}
-
-/****************************************************************/
-
-typedef struct _model_c_passed_data model_c_passed_data;
-struct _model_c_passed_data {
- lf *file;
- model *model_ptr;
-};
-
-static void
-model_c_insn(insn_table *entry,
- lf *phony_file,
- void *data,
- insn *instruction,
- int depth)
-{
- model_c_passed_data *data_ptr = (model_c_passed_data *)data;
- lf *file = data_ptr->file;
- char *current_name = data_ptr->model_ptr->printable_name;
- table_model_entry *model_ptr = instruction->file_entry->model_first;
-
- while (model_ptr) {
- if (model_ptr->fields[insn_model_name] == current_name) {
- lf_printf(file, " { %-*s }, /* %s */\n",
- max_model_fields_len,
- model_ptr->fields[insn_model_fields],
- instruction->file_entry->fields[insn_name]);
- return;
- }
-
- model_ptr = model_ptr->next;
- }
-
- lf_printf(file, " { %-*s }, /* %s */\n",
- max_model_fields_len,
- data_ptr->model_ptr->insn_default,
- instruction->file_entry->fields[insn_name]);
-}
-
-static void
-model_c_function(insn_table *table,
- lf *file,
- table_entry *function,
- const char *prefix)
-{
- if (function->fields[function_type] == NULL
- || function->fields[function_type][0] == '\0') {
- error("Model function return type not specified for %s", function->fields[function_name]);
- }
- else {
- lf_printf(file, "\n");
- lf_print_function_type(file, function->fields[function_type], prefix, "\n");
- lf_printf(file, "%s(%s)\n",
- function->fields[function_name],
- function->fields[function_param]);
- }
- table_entry_print_cpp_line_nr(file, function);
- lf_printf(file, "{\n");
- if (function->annex) {
- lf_indent(file, +2);
- lf_print__c_code(file, function->annex);
- lf_indent(file, -2);
- }
- lf_printf(file, "}\n");
- lf_print__internal_reference(file);
- lf_printf(file, "\n");
-}
-
-void
-gen_model_c(insn_table *table, lf *file)
-{
- insn *insn_ptr;
- model *model_ptr;
- char *name;
- int model_create_p = 0;
- int model_init_p = 0;
- int model_halt_p = 0;
- int model_mon_info_p = 0;
- int model_mon_info_free_p = 0;
-
- lf_printf(file, "\n");
- lf_printf(file, "#include \"cpu.h\"\n");
- lf_printf(file, "#include \"mon.h\"\n");
- lf_printf(file, "\n");
- lf_printf(file, "#ifdef HAVE_STDLIB_H\n");
- lf_printf(file, "#include <stdlib.h>\n");
- lf_printf(file, "#endif\n");
- lf_printf(file, "\n");
-
- for(insn_ptr = model_data; insn_ptr; insn_ptr = insn_ptr->next) {
- model_c_or_h_data(table, file, insn_ptr->file_entry);
- }
-
- for(insn_ptr = model_static; insn_ptr; insn_ptr = insn_ptr->next) {
- model_c_or_h_function(table, file, insn_ptr->file_entry, "/*h*/STATIC");
- }
-
- for(insn_ptr = model_internal; insn_ptr; insn_ptr = insn_ptr->next) {
- model_c_or_h_function(table, file, insn_ptr->file_entry, "STATIC_INLINE_MODEL");
- }
-
- for(insn_ptr = model_static; insn_ptr; insn_ptr = insn_ptr->next) {
- model_c_function(table, file, insn_ptr->file_entry, "/*c*/STATIC");
- }
-
- for(insn_ptr = model_internal; insn_ptr; insn_ptr = insn_ptr->next) {
- model_c_function(table, file, insn_ptr->file_entry, "STATIC_INLINE_MODEL");
- }
-
- for(insn_ptr = model_functions; insn_ptr; insn_ptr = insn_ptr->next) {
- model_c_function(table, file, insn_ptr->file_entry, "INLINE_MODEL");
- name = insn_ptr->file_entry->fields[function_name];
- if (strcmp (name, "model_create") == 0)
- model_create_p = 1;
- else if (strcmp (name, "model_init") == 0)
- model_init_p = 1;
- else if (strcmp (name, "model_halt") == 0)
- model_halt_p = 1;
- else if (strcmp (name, "model_mon_info") == 0)
- model_mon_info_p = 1;
- else if (strcmp (name, "model_mon_info_free") == 0)
- model_mon_info_free_p = 1;
- }
-
- if (!model_create_p) {
- lf_print_function_type(file, "model_data *", "INLINE_MODEL", "\n");
- lf_printf(file, "model_create(cpu *processor)\n");
- lf_printf(file, "{\n");
- lf_printf(file, " return (model_data *)0;\n");
- lf_printf(file, "}\n");
- lf_printf(file, "\n");
- }
-
- if (!model_init_p) {
- lf_print_function_type(file, "void", "INLINE_MODEL", "\n");
- lf_printf(file, "model_init(model_data *model_ptr)\n");
- lf_printf(file, "{\n");
- lf_printf(file, "}\n");
- lf_printf(file, "\n");
- }
-
- if (!model_halt_p) {
- lf_print_function_type(file, "void", "INLINE_MODEL", "\n");
- lf_printf(file, "model_halt(model_data *model_ptr)\n");
- lf_printf(file, "{\n");
- lf_printf(file, "}\n");
- lf_printf(file, "\n");
- }
-
- if (!model_mon_info_p) {
- lf_print_function_type(file, "model_print *", "INLINE_MODEL", "\n");
- lf_printf(file, "model_mon_info(model_data *model_ptr)\n");
- lf_printf(file, "{\n");
- lf_printf(file, " return (model_print *)0;\n");
- lf_printf(file, "}\n");
- lf_printf(file, "\n");
- }
-
- if (!model_mon_info_free_p) {
- lf_print_function_type(file, "void", "INLINE_MODEL", "\n");
- lf_printf(file, "model_mon_info_free(model_data *model_ptr,\n");
- lf_printf(file, " model_print *info_ptr)\n");
- lf_printf(file, "{\n");
- lf_printf(file, "}\n");
- lf_printf(file, "\n");
- }
-
- lf_printf(file, "/* Insn functional unit info */\n");
- for(model_ptr = models; model_ptr; model_ptr = model_ptr->next) {
- model_c_passed_data data;
-
- lf_printf(file, "static const model_time model_time_%s[] = {\n", model_ptr->name);
- data.file = file;
- data.model_ptr = model_ptr;
- insn_table_traverse_insn(table,
- NULL, (void *)&data,
- model_c_insn);
-
- lf_printf(file, "};\n");
- lf_printf(file, "\n");
- lf_printf(file, "\f\n");
- }
-
- lf_printf(file, "#ifndef _INLINE_C_\n");
- lf_printf(file, "const model_time *const model_time_mapping[ (int)nr_models ] = {\n");
- lf_printf(file, " (const model_time *const)0,\n");
- for(model_ptr = models; model_ptr; model_ptr = model_ptr->next) {
- lf_printf(file, " model_time_%s,\n", model_ptr->name);
- }
- lf_printf(file, "};\n");
- lf_printf(file, "#endif\n");
- lf_printf(file, "\n");
-
- lf_printf(file, "\f\n");
- lf_printf(file, "/* map model enumeration into printable string */\n");
- lf_printf(file, "#ifndef _INLINE_C_\n");
- lf_printf(file, "const char *model_name[ (int)nr_models ] = {\n");
- lf_printf(file, " \"NONE\",\n");
- for (model_ptr = models; model_ptr; model_ptr = model_ptr->next) {
- lf_printf(file, " \"%s\",\n", model_ptr->printable_name);
- }
- lf_printf(file, "};\n");
- lf_printf(file, "#endif\n");
- lf_printf(file, "\n");
-
- lf_print_function_type(file, "void", "INLINE_MODEL", "\n");
- lf_printf(file, "model_set(const char *name)\n");
- lf_printf(file, "{\n");
- if (models) {
- lf_printf(file, " model_enum model;\n");
- lf_printf(file, " for(model = MODEL_%s; model < nr_models; model++) {\n", models->name);
- lf_printf(file, " if(strcmp(name, model_name[model]) == 0) {\n");
- lf_printf(file, " current_model = model;\n");
- lf_printf(file, " return;\n");
- lf_printf(file, " }\n");
- lf_printf(file, " }\n");
- lf_printf(file, "\n");
- lf_printf(file, " error(\"Unknown model '%%s', Models which are known are:%%s\n\",\n");
- lf_printf(file, " name,\n");
- lf_printf(file, " \"");
- for(model_ptr = models; model_ptr; model_ptr = model_ptr->next) {
- lf_printf(file, "\\n\\t%s", model_ptr->printable_name);
- }
- lf_printf(file, "\");\n");
- } else {
- lf_printf(file, " error(\"No models are currently known about\");\n");
- }
-
- lf_printf(file, "}\n");
-}
-
diff --git a/sim/ppc/gen-model.h b/sim/ppc/gen-model.h
deleted file mode 100644
index b465a75abf8..00000000000
--- a/sim/ppc/gen-model.h
+++ /dev/null
@@ -1,30 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1995, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-
-extern void gen_model_h
-(insn_table *table,
- lf *file);
-
-
-extern void gen_model_c
-(insn_table *table,
- lf *file);
diff --git a/sim/ppc/gen-semantics.c b/sim/ppc/gen-semantics.c
deleted file mode 100644
index b4c0613fe50..00000000000
--- a/sim/ppc/gen-semantics.c
+++ /dev/null
@@ -1,250 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1997, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-
-#include "misc.h"
-#include "lf.h"
-#include "table.h"
-#include "filter.h"
-
-#include "ld-decode.h"
-#include "ld-cache.h"
-#include "ld-insn.h"
-
-#include "igen.h"
-
-#include "gen-semantics.h"
-#include "gen-icache.h"
-#include "gen-idecode.h"
-
-
-static void
-print_semantic_function_header(lf *file,
- const char *basename,
- insn_bits *expanded_bits,
- int is_function_definition)
-{
- int indent;
- lf_printf(file, "\n");
- lf_print_function_type(file, SEMANTIC_FUNCTION_TYPE, "EXTERN_SEMANTICS",
- (is_function_definition ? "\n" : " "));
- indent = print_function_name(file,
- basename,
- expanded_bits,
- function_name_prefix_semantics);
- if (is_function_definition)
- lf_indent(file, +indent);
- else
- lf_printf(file, "\n");
- lf_printf(file, "(%s)", SEMANTIC_FUNCTION_FORMAL);
- if (is_function_definition)
- lf_indent(file, -indent);
- else
- lf_printf(file, ";");
- lf_printf(file, "\n");
-}
-
-void
-print_semantic_declaration(insn_table *entry,
- lf *file,
- void *data,
- insn *instruction,
- int depth)
-{
- if (generate_expanded_instructions) {
- ASSERT(entry->nr_insn == 1);
- print_semantic_function_header(file,
- instruction->file_entry->fields[insn_name],
- entry->expanded_bits,
- 0/* is not function definition*/);
- }
- else {
- print_semantic_function_header(file,
- instruction->file_entry->fields[insn_name],
- NULL,
- 0/* is not function definition*/);
- }
-}
-
-
-
-/* generate the semantics.c file */
-
-
-void
-print_idecode_illegal(lf *file,
- const char *result)
-{
- if ((code & generate_jumps))
- lf_printf(file, "goto %s_illegal;\n", (code & generate_with_icache) ? "icache" : "semantic");
- else if ((code & generate_with_icache))
- lf_printf(file, "%s icache_illegal(%s);\n", result, ICACHE_FUNCTION_ACTUAL);
- else
- lf_printf(file, "%s semantic_illegal(%s);\n", result, SEMANTIC_FUNCTION_ACTUAL);
-}
-
-
-void
-print_semantic_body(lf *file,
- insn *instruction,
- insn_bits *expanded_bits,
- opcode_field *opcodes)
-{
- print_itrace(file, instruction->file_entry, 0/*put_value_in_cache*/);
-
- /* validate the instruction, if a cache this has already been done */
- if (!(code & generate_with_icache))
- print_idecode_validate(file, instruction, opcodes);
-
- /* generate the profiling call - this is delayed until after the
- instruction has been verified */
- lf_printf(file, "\n");
- lf_printf(file, "/* monitoring: */\n");
- lf_printf(file, "if (WITH_MON & MONITOR_INSTRUCTION_ISSUE) {\n");
- lf_printf(file, " mon_issue(");
- print_function_name(file,
- instruction->file_entry->fields[insn_name],
- NULL,
- function_name_prefix_itable);
- lf_printf(file, ", processor, cia);\n");
- lf_printf(file, "}\n");
-
- /* generate the code (or at least something */
- lf_printf(file, "\n");
- lf_printf(file, "/* semantics: */\n");
- lf_printf(file, "nia = cia + %d;\n", insn_bit_size / 8);
- if (instruction->file_entry->annex != NULL) {
- /* true code */
- table_entry_print_cpp_line_nr(file, instruction->file_entry);
- lf_printf(file, "{\n");
- lf_indent(file, +2);
- lf_print__c_code(file, instruction->file_entry->annex);
- lf_indent(file, -2);
- lf_printf(file, "}\n");
- lf_print__internal_reference(file);
- }
- else if (it_is("nop", instruction->file_entry->fields[insn_flags])) {
- lf_print__internal_reference(file);
- }
- else {
- /* abort so it is implemented now */
- table_entry_print_cpp_line_nr(file, instruction->file_entry);
- lf_putstr(file, "error(\"%s:%d:0x%08lx:%s unimplemented\\n\",\n");
- lf_printf(file, " itable[MY_INDEX].file, itable[MY_INDEX].line_nr, (long)cia, itable[MY_INDEX].name);\n");
- lf_print__internal_reference(file);
- }
-}
-
-static void
-print_c_semantic(lf *file,
- insn *instruction,
- insn_bits *expanded_bits,
- opcode_field *opcodes,
- cache_table *cache_rules)
-{
-
- lf_printf(file, "{\n");
- lf_indent(file, +2);
-
- print_my_defines(file, expanded_bits, instruction->file_entry);
- lf_printf(file, "\n");
- print_icache_body(file,
- instruction,
- expanded_bits,
- cache_rules,
- ((code & generate_with_direct_access)
- ? define_variables
- : declare_variables),
- ((code & generate_with_icache)
- ? get_values_from_icache
- : do_not_use_icache));
-
- lf_printf(file, "unsigned_word nia;\n");
- print_semantic_body(file,
- instruction,
- expanded_bits,
- opcodes);
- lf_printf(file, "return nia;\n");
-
- /* generate something to clean up any #defines created for the cache */
- if (code & generate_with_direct_access)
- print_icache_body(file,
- instruction,
- expanded_bits,
- cache_rules,
- undef_variables,
- ((code & generate_with_icache)
- ? get_values_from_icache
- : do_not_use_icache));
-
- lf_indent(file, -2);
- lf_printf(file, "}\n");
-}
-
-static void
-print_c_semantic_function(lf *file,
- insn *instruction,
- insn_bits *expanded_bits,
- opcode_field *opcodes,
- cache_table *cache_rules)
-{
- /* build the semantic routine to execute the instruction */
- print_semantic_function_header(file,
- instruction->file_entry->fields[insn_name],
- expanded_bits,
- 1/*is-function-definition*/);
- print_c_semantic(file,
- instruction,
- expanded_bits,
- opcodes,
- cache_rules);
-}
-
-void
-print_semantic_definition(insn_table *entry,
- lf *file,
- void *data,
- insn *instruction,
- int depth)
-{
- cache_table *cache_rules = (cache_table*)data;
- if (generate_expanded_instructions) {
- ASSERT(entry->nr_insn == 1
- && entry->opcode == NULL
- && entry->parent != NULL
- && entry->parent->opcode != NULL);
- ASSERT(entry->nr_insn == 1
- && entry->opcode == NULL
- && entry->parent != NULL
- && entry->parent->opcode != NULL
- && entry->parent->opcode_rule != NULL);
- print_c_semantic_function(file,
- entry->insns,
- entry->expanded_bits,
- entry->parent->opcode,
- cache_rules);
- }
- else {
- print_c_semantic_function(file, instruction,
- NULL, NULL,
- cache_rules);
- }
-}
diff --git a/sim/ppc/gen-semantics.h b/sim/ppc/gen-semantics.h
deleted file mode 100644
index 2c25715f7c7..00000000000
--- a/sim/ppc/gen-semantics.h
+++ /dev/null
@@ -1,81 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1995, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-/* Creates the files semantics.[hc].
-
- The generated file semantics contains functions that implement the
- operations required to model a single target processor instruction.
-
- Several different variations on the semantics file can be created:
-
- o uncached
-
- No instruction cache exists. The semantic function
- needs to generate any required values locally.
-
- o cached - separate cracker and semantic
-
- Two independant functions are created. Firstly the
- function that cracks an instruction entering it into a
- cache and secondly the semantic function propper that
- uses the cache.
-
- o cached - semantic + cracking semantic
-
- The function that cracks the instruction and enters
- all values into the cache also contains a copy of the
- semantic code (avoiding the need to call both the
- cracker and the semantic function when there is a
- cache miss).
-
- For each of these general forms, several refinements can occure:
-
- o do/don't duplicate/expand semantic functions
-
- As a consequence of decoding an instruction, the
- decoder, as part of its table may have effectivly made
- certain of the variable fields in an instruction
- constant. Separate functions for each of the
- alternative values for what would have been treated as
- a variable part can be created.
-
- o use cache struct directly.
-
- When a cracking cache is present, the semantic
- functions can be generated to either hold intermediate
- cache values in local variables or always refer to the
- contents of the cache directly. */
-
-
-
-extern insn_handler print_semantic_declaration;
-extern insn_handler print_semantic_definition;
-
-extern void print_idecode_illegal
-(lf *file,
- const char *result);
-
-extern void print_semantic_body
-(lf *file,
- insn *instruction,
- insn_bits *expanded_bits,
- opcode_field *opcodes);
-
diff --git a/sim/ppc/gen-support.c b/sim/ppc/gen-support.c
deleted file mode 100644
index 56edec38e5f..00000000000
--- a/sim/ppc/gen-support.c
+++ /dev/null
@@ -1,132 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1995, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-#include "misc.h"
-#include "lf.h"
-#include "table.h"
-#include "filter.h"
-
-#include "ld-decode.h"
-#include "ld-cache.h"
-#include "ld-insn.h"
-
-#include "igen.h"
-
-#include "gen-semantics.h"
-#include "gen-support.h"
-
-static void
-print_support_function_name(lf *file,
- table_entry *function,
- int is_function_definition)
-{
- if (it_is("internal", function->fields[insn_flags])) {
- lf_print_function_type(file, SEMANTIC_FUNCTION_TYPE, "INLINE_SUPPORT",
- (is_function_definition ? "\n" : " "));
- print_function_name(file,
- function->fields[function_name],
- NULL,
- function_name_prefix_semantics);
- lf_printf(file, "\n(%s)", SEMANTIC_FUNCTION_FORMAL);
- if (!is_function_definition)
- lf_printf(file, ";");
- lf_printf(file, "\n");
- }
- else {
- lf_print_function_type(file,
- function->fields[function_type],
- "INLINE_SUPPORT",
- (is_function_definition ? "\n" : " "));
- lf_printf(file, "%s\n(%s)%s",
- function->fields[function_name],
- function->fields[function_param],
- (is_function_definition ? "\n" : ";\n"));
- }
-}
-
-
-static void
-support_h_function(insn_table *entry,
- lf *file,
- void *data,
- table_entry *function)
-{
- ASSERT(function->fields[function_type] != NULL);
- ASSERT(function->fields[function_param] != NULL);
- print_support_function_name(file,
- function,
- 0/*!is_definition*/);
- lf_printf(file, "\n");
-}
-
-
-extern void
-gen_support_h(insn_table *table,
- lf *file)
-{
- /* output a declaration for all functions */
- insn_table_traverse_function(table,
- file, NULL,
- support_h_function);
- lf_printf(file, "\n");
- lf_printf(file, "#if (SUPPORT_INLINE & INCLUDE_MODULE)\n");
- lf_printf(file, "# include \"support.c\"\n");
- lf_printf(file, "#endif\n");
-}
-
-static void
-support_c_function(insn_table *table,
- lf *file,
- void *data,
- table_entry *function)
-{
- ASSERT(function->fields[function_type] != NULL);
- print_support_function_name(file,
- function,
- 1/*!is_definition*/);
- table_entry_print_cpp_line_nr(file, function);
- lf_printf(file, "{\n");
- lf_indent(file, +2);
- lf_print__c_code(file, function->annex);
- if (it_is("internal", function->fields[insn_flags])) {
- lf_printf(file, "error(\"Internal function must longjump\\n\");\n");
- lf_printf(file, "return 0;\n");
- }
- lf_indent(file, -2);
- lf_printf(file, "}\n");
- lf_print__internal_reference(file);
- lf_printf(file, "\n");
-}
-
-
-void
-gen_support_c(insn_table *table,
- lf *file)
-{
- lf_printf(file, "#include \"cpu.h\"\n");
- lf_printf(file, "#include \"idecode.h\"\n");
- lf_printf(file, "#include \"support.h\"\n");
- lf_printf(file, "\n");
-
- /* output a definition (c-code) for all functions */
- insn_table_traverse_function(table,
- file, NULL,
- support_c_function);
-}
diff --git a/sim/ppc/gen-support.h b/sim/ppc/gen-support.h
deleted file mode 100644
index 70862d76881..00000000000
--- a/sim/ppc/gen-support.h
+++ /dev/null
@@ -1,29 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1995, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-extern void gen_support_h
-(insn_table *table,
- lf *file);
-
-extern void gen_support_c
-(insn_table *table,
- lf *file);
-
diff --git a/sim/ppc/hw_com.c b/sim/ppc/hw_com.c
deleted file mode 100644
index 436232289d2..00000000000
--- a/sim/ppc/hw_com.c
+++ /dev/null
@@ -1,559 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1996, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-#ifndef _HW_COM_C_
-#define _HW_COM_C_
-
-#ifndef STATIC_INLINE_HW_COM
-#define STATIC_INLINE_HW_COM STATIC_INLINE
-#endif
-
-#include "device_table.h"
-
-#ifdef HAVE_STRING_H
-#include <string.h>
-#else
-#ifdef HAVE_STRINGS_H
-#include <strings.h>
-#endif
-#endif
-
-#ifdef HAVE_UNISTD_H
-#include <unistd.h>
-#endif
-#ifdef HAVE_STDLIB_H
-#include <stdlib.h>
-#endif
-
-/* DEVICE
-
-
- com - '550 compatible serial device
-
-
- DESCRIPTION
-
-
- Models the basics of the 8 register '550 serial device. The model
- includes an interrupt line, input and output fifos, and status
- information.
-
- Independent configuration of the devices input and output streams is
- allowed: use either the console or a file (buffered or unbuffered) as
- the data source/sink; specify the real-time delay between each character
- transfer.
-
- When the devices input stream is being taken from a file, the end of
- file is signaled by a loss of carrier (the loss of carrier may be
- incorrectly proceeded by a single null character).
-
-
- PROPERTIES
-
-
- reg = <address> <size> ... (optional - note 1)
-
- List of <address> <size> pairs. Each pair specifies an address for
- the devices 8 registers. The address should be 8 byte aligned.
-
-
- alternate-reg = <address> <size> ... (optional - note 1)
-
- Alternative addreses for the registers.
-
-
- assigned-addresses = <address> <size> ... (optional - note 1)
-
- On a PCI bus, this property specifies the addresses assigned to the
- device. The values reflect the devices configuration base registers.
-
- Note 1: At least one of "assigned-addresses", "reg" or "alternative-reg"
- must be specified. If "assigned-addresses" is specified the other
- address specifications are ignored.
-
-
- input-file = <file-name> (optional)
-
- File to take all serial port input from (instead of the simulation
- console).
-
-
- output-file = <file-name> (optional)
-
- File to send all output to (instead of the simulation console).
-
-
- input-buffering = "unbuffered" (optional)
-
- Specifying "unbuffered" buffering disables buffering on the serial
- devices input stream (all data is immediatly read). In the future,
- this option may be used to provide input buffering alternatives.
-
-
- output-buffering = "unbuffered" (optional)
-
- Specifying "unbuffered" buffering disables buffering on the serial
- devices output stream (all data is immediatly written). In the future,
- this option may be extended to include other buffering alternatives.
-
-
- input-delay = <integer-delay> (optional)
-
- Specify the number of ticks after the current character has been
- read from the serial port that the next character becomes
- available.
-
-
- output-delay = <integer-delay> (optional)
-
- Specify the number of ticks after a character has been written to
- the empty output fifo that the fifo finishes draining. Any
- characters written to the output fifo before it has drained will
- not be lost and will still be displayed.
-
-
- EXAMPLES
-
-
- | /iobus@0xf0000000/com@0x3000/reg 0x3000 8
-
- Create a simple console device at address <<0x3000>> within
- <<iobus>>. Since iobus starts at address <<0xf0000000>> the
- absolute address of the serial port will be <<0xf0003000>>.
-
- The device will always be ready for I/O (no delay properties specified)
- and both the input and output streams will use the simulation console
- (no file properties).
-
-
- | $ psim \
- | -o '/cpus/cpu@0' \
- | -o '/iobus@0xf0000000/com@0x4000/reg 0x4000 8' \
- | -o '/iobus@0xf0000000/com@0x4000/input-file /etc/passwd' \
- | -o '/iobus@0xf0000000/com@0x4000/input-delay 1000' \
- | -o '/iobus@0xf0000000/com@0x4000 > 0 int /cpus/cpu@0x0' \
- | psim-test/hw-com/cat.be 0xf0004000
-
- The serial port (at address <<0xf0004000>> is configured so that it
- takes its input from the file <</etc/passwd>> while its output is
- allowed to appear on the simulation console.
-
- The node <</cpus/cpu@0>> was explicitly specified to ensure that it had
- been created before any interrupts were attached to it.
-
- The program <<psim-test/hw-com/cat>> copies any characters on the serial
- port's input (<</etc/passwd>>) to its output (the console).
- Consequently, the aove program will display the contents of the file
- <</etc/passwd>> on the screen.
-
-
- BUGS
-
-
- IEEE 1275 requires that a device on a PCI bus have, as its first reg
- entry, the address of its configuration space registers. Currently,
- this device does not even implement configuration registers.
-
- This model does not attempt to model the '550's input and output fifos.
- Instead, the input fifo is limited to a single character at a time,
- while the output fifo is effectivly infinite. Consequently, unlike the
- '550, this device will not discard output characters once a stream of 16
- have been written to the data output register.
-
- The input and output can only be taken from a file (or the current
- terminal device). In the future, the <<com>> device should allow the
- specification of other data streams (such as an xterm or TK window).
-
- The input blocks if no data is available.
-
- Interrupts have not been tested.
-
- */
-
-enum {
- max_hw_com_registers = 8,
-};
-
-typedef struct _com_port {
- int ready;
- int delay;
- int interrupting;
- FILE *file;
-} com_port;
-
-typedef struct _com_modem {
- int carrier;
- int carrier_changed;
- int interrupting;
-} com_modem;
-
-typedef struct _hw_com_device {
- com_port input;
- com_port output;
- com_modem modem;
- char dlab[2];
- char reg[max_hw_com_registers];
- int interrupting;
-} hw_com_device;
-
-
-static void
-hw_com_device_init_data(device *me)
-{
- hw_com_device *com = (hw_com_device*)device_data(me);
- /* clean up */
- if (com->output.file != NULL)
- fclose(com->output.file);
- if (com->input.file != NULL)
- fclose(com->input.file);
- memset(com, 0, sizeof(hw_com_device));
-
- /* the fifo speed */
- com->output.delay = (device_find_property(me, "output-delay") != NULL
- ? device_find_integer_property(me, "output-delay")
- : 0);
- com->input.delay = (device_find_property(me, "input-delay") != NULL
- ? device_find_integer_property(me, "input-delay")
- : 0);
-
- /* the data source/sink */
- if (device_find_property(me, "input-file") != NULL) {
- const char *input_file = device_find_string_property(me, "input-file");
- com->input.file = fopen(input_file, "r");
- if (com->input.file == NULL)
- device_error(me, "Problem opening input file %s\n", input_file);
- if (device_find_property(me, "input-buffering") != NULL) {
- const char *buffering = device_find_string_property(me, "input-buffering");
- if (strcmp(buffering, "unbuffered") == 0)
- setbuf(com->input.file, NULL);
- }
- }
- if (device_find_property(me, "output-file") != NULL) {
- const char *output_file = device_find_string_property(me, "output-file");
- com->output.file = fopen(output_file, "w");
- if (com->input.file == NULL)
- device_error(me, "Problem opening output file %s\n", output_file);
- if (device_find_property(me, "output-buffering") != NULL) {
- const char *buffering = device_find_string_property(me, "output-buffering");
- if (strcmp(buffering, "unbuffered") == 0)
- setbuf(com->output.file, NULL);
- }
- }
-
- /* ready from the start */
- com->input.ready = 1;
- com->modem.carrier = 1;
- com->output.ready = 1;
-}
-
-
-static void
-update_com_interrupts(device *me,
- hw_com_device *com)
-{
- int interrupting;
- com->modem.interrupting = (com->modem.carrier_changed && (com->reg[1] & 0x80));
- com->input.interrupting = (com->input.ready && (com->reg[1] & 0x1));
- com->output.interrupting = (com->output.ready && (com->reg[1] & 0x2));
- interrupting = (com->input.interrupting
- || com->output.interrupting
- || com->modem.interrupting);
-
- if (interrupting) {
- if (!com->interrupting) {
- device_interrupt_event(me, 0 /*port*/, 1 /*value*/, NULL, 0);
- }
- }
- else /*!interrupting*/ {
- if (com->interrupting)
- device_interrupt_event(me, 0 /*port*/, 0 /*value*/, NULL, 0);
- }
- com->interrupting = interrupting;
-}
-
-
-static void
-make_read_ready(void *data)
-{
- device *me = (device*)data;
- hw_com_device *com = (hw_com_device*)device_data(me);
- com->input.ready = 1;
- update_com_interrupts(me, com);
-}
-
-static void
-read_com(device *me,
- hw_com_device *com,
- unsigned_word a,
- char val[1])
-{
- unsigned_word addr = a % 8;
-
- /* the divisor latch is special */
- if (com->reg[3] & 0x8 && addr < 2) {
- *val = com->dlab[addr];
- return;
- }
-
- switch (addr) {
-
- case 0:
- /* fifo */
- if (!com->modem.carrier)
- *val = '\0';
- if (com->input.ready) {
- /* read the char in */
- if (com->input.file == NULL) {
- if (sim_io_read_stdin(val, 1) < 0)
- com->modem.carrier_changed = 1;
- }
- else {
- if (fread(val, 1, 1, com->input.file) == 0)
- com->modem.carrier_changed = 1;
- }
- /* setup for next read */
- if (com->modem.carrier_changed) {
- /* once lost carrier, never ready */
- com->modem.carrier = 0;
- com->input.ready = 0;
- *val = '\0';
- }
- else if (com->input.delay > 0) {
- com->input.ready = 0;
- device_event_queue_schedule(me, com->input.delay, make_read_ready, me);
- }
- }
- else {
- /* discard it? */
- /* overflow input fifo? */
- *val = '\0';
- }
- break;
-
- case 2:
- /* interrupt ident */
- if (com->interrupting) {
- if (com->input.interrupting)
- *val = 0x4;
- else if (com->output.interrupting)
- *val = 0x2;
- else if (com->modem.interrupting == 0)
- *val = 0;
- else
- device_error(me, "bad elif for interrupts\n");
- }
- else
- *val = 0x1;
- break;
-
- case 5:
- /* line status */
- *val = ((com->input.ready ? 0x1 : 0)
- | (com->output.ready ? 0x60 : 0)
- );
- break;
-
- case 6:
- /* modem status */
- *val = ((com->modem.carrier_changed ? 0x08 : 0)
- | (com->modem.carrier ? 0x80 : 0)
- );
- com->modem.carrier_changed = 0;
- break;
-
- default:
- *val = com->reg[addr];
- break;
-
- }
- update_com_interrupts(me, com);
-}
-
-static unsigned
-hw_com_io_read_buffer_callback(device *me,
- void *dest,
- int space,
- unsigned_word addr,
- unsigned nr_bytes,
- cpu *processor,
- unsigned_word cia)
-{
- hw_com_device *com = device_data(me);
- int i;
- for (i = 0; i < nr_bytes; i++) {
- read_com(me, com, addr + i, &((char*)dest)[i]);
- }
- return nr_bytes;
-}
-
-
-static void
-make_write_ready(void *data)
-{
- device *me = (device*)data;
- hw_com_device *com = (hw_com_device*)device_data(me);
- com->output.ready = 1;
- update_com_interrupts(me, com);
-}
-
-static void
-write_com(device *me,
- hw_com_device *com,
- unsigned_word a,
- char val)
-{
- unsigned_word addr = a % 8;
-
- /* the divisor latch is special */
- if (com->reg[3] & 0x8 && addr < 2) {
- com->dlab[addr] = val;
- return;
- }
-
- switch (addr) {
-
- case 0:
- /* fifo */
- if (com->output.file == NULL) {
- sim_io_write_stdout(&val, 1);
- }
- else {
- fwrite(&val, 1, 1, com->output.file);
- }
- /* setup for next write */
- if (com->output.ready && com->output.delay > 0) {
- com->output.ready = 0;
- device_event_queue_schedule(me, com->output.delay, make_write_ready, me);
- }
- break;
-
- default:
- com->reg[addr] = val;
- break;
-
- }
- update_com_interrupts(me, com);
-}
-
-static unsigned
-hw_com_io_write_buffer_callback(device *me,
- const void *source,
- int space,
- unsigned_word addr,
- unsigned nr_bytes,
- cpu *processor,
- unsigned_word cia)
-{
- hw_com_device *com = device_data(me);
- int i;
- for (i = 0; i < nr_bytes; i++) {
- write_com(me, com, addr + i, ((char*)source)[i]);
- }
- return nr_bytes;
-}
-
-
-/* instances of the hw_com device */
-
-static void
-hw_com_instance_delete(device_instance *instance)
-{
- /* nothing to delete, the hw_com is attached to the device */
- return;
-}
-
-static int
-hw_com_instance_read(device_instance *instance,
- void *buf,
- unsigned_word len)
-{
- device *me = device_instance_device(instance);
- hw_com_device *com = device_data(me);
- if (com->input.file == NULL)
- return sim_io_read_stdin(buf, len);
- else {
- return fread(buf, 1, len, com->input.file);
- }
-}
-
-static int
-hw_com_instance_write(device_instance *instance,
- const void *buf,
- unsigned_word len)
-{
- device *me = device_instance_device(instance);
- hw_com_device *com = device_data(me);
- if (com->output.file == NULL)
- return sim_io_write_stdout(buf, len);
- else {
- return fwrite(buf, 1, len, com->output.file);
- }
-}
-
-static const device_instance_callbacks hw_com_instance_callbacks = {
- hw_com_instance_delete,
- hw_com_instance_read,
- hw_com_instance_write,
-};
-
-static device_instance *
-hw_com_create_instance(device *me,
- const char *path,
- const char *args)
-{
- /* point an instance directly at the device */
- return device_create_instance_from(me, NULL,
- device_data(me),
- path, args,
- &hw_com_instance_callbacks);
-}
-
-
-static device_callbacks const hw_com_callbacks = {
- { generic_device_init_address,
- hw_com_device_init_data },
- { NULL, }, /* address */
- { hw_com_io_read_buffer_callback,
- hw_com_io_write_buffer_callback, },
- { NULL, }, /* DMA */
- { NULL, }, /* interrupt */
- { NULL, }, /* unit */
- hw_com_create_instance,
-};
-
-
-static void *
-hw_com_create(const char *name,
- const device_unit *unit_address,
- const char *args)
-{
- /* create the descriptor */
- hw_com_device *hw_com = ZALLOC(hw_com_device);
- return hw_com;
-}
-
-
-const device_descriptor hw_com_device_descriptor[] = {
- { "com", hw_com_create, &hw_com_callbacks },
- { NULL },
-};
-
-#endif /* _HW_COM_C_ */
diff --git a/sim/ppc/hw_core.c b/sim/ppc/hw_core.c
deleted file mode 100644
index 1a439576bd9..00000000000
--- a/sim/ppc/hw_core.c
+++ /dev/null
@@ -1,143 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1996, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-#ifndef _HW_CORE_C_
-#define _HW_CORE_C_
-
-#include "device_table.h"
-
-#include "corefile.h"
-
-
-/* DEVICE
-
- core - root of the device tree
-
- DESCRIPTION
-
- The core device positioned at the root of the device tree appears
- to its child devices as a normal device just like every other
- device in the tree.
-
- Internally it is implemented using a core object. Requests to
- attach (or detach) address spaces are passed to that core object.
- Requests to transfer (DMA) data are reflected back down the device
- tree using the core_map data transfer methods.
-
- PROPERTIES
-
- None.
-
- */
-
-
-static void
-hw_core_init_address_callback(device *me)
-{
- core *memory = (core*)device_data(me);
- core_init(memory);
-}
-
-
-static void
-hw_core_attach_address_callback(device *me,
- attach_type attach,
- int space,
- unsigned_word addr,
- unsigned nr_bytes,
- access_type access,
- device *client) /*callback/default*/
-{
- core *memory = (core*)device_data(me);
- if (space != 0)
- error("core_attach_address_callback() invalid address space\n");
- core_attach(memory,
- attach,
- space,
- access,
- addr,
- nr_bytes,
- client);
-}
-
-
-static unsigned
-hw_core_dma_read_buffer_callback(device *me,
- void *dest,
- int space,
- unsigned_word addr,
- unsigned nr_bytes)
-{
- core *memory = (core*)device_data(me);
- return core_map_read_buffer(core_readable(memory),
- dest,
- addr,
- nr_bytes);
-}
-
-
-static unsigned
-hw_core_dma_write_buffer_callback(device *me,
- const void *source,
- int space,
- unsigned_word addr,
- unsigned nr_bytes,
- int violate_read_only_section)
-{
- core *memory = (core*)device_data(me);
- core_map *map = (violate_read_only_section
- ? core_readable(memory)
- : core_writeable(memory));
- return core_map_write_buffer(map,
- source,
- addr,
- nr_bytes);
-}
-
-static device_callbacks const hw_core_callbacks = {
- { hw_core_init_address_callback, },
- { hw_core_attach_address_callback, },
- { NULL, }, /* IO */
- { hw_core_dma_read_buffer_callback,
- hw_core_dma_write_buffer_callback, },
- { NULL, }, /* interrupt */
- { generic_device_unit_decode,
- generic_device_unit_encode,
- generic_device_address_to_attach_address,
- generic_device_size_to_attach_size, },
-};
-
-
-static void *
-hw_core_create(const char *name,
- const device_unit *unit_address,
- const char *args)
-{
- core *memory = core_create();
- return memory;
-}
-
-const device_descriptor hw_core_device_descriptor[] = {
- { "core", hw_core_create, &hw_core_callbacks },
- { NULL },
-};
-
-#endif /* _HW_CORE_C_ */
diff --git a/sim/ppc/hw_cpu.c b/sim/ppc/hw_cpu.c
deleted file mode 100644
index 117a4c256f2..00000000000
--- a/sim/ppc/hw_cpu.c
+++ /dev/null
@@ -1,167 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1996, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-#ifndef _HW_CPU_C_
-#define _HW_CPU_C_
-
-#ifndef STATIC_INLINE_HW_CPU
-#define STATIC_INLINE_HW_CPU STATIC_INLINE
-#endif
-
-#include "device_table.h"
-#include "hw_cpu.h"
-
-#include "interrupts.h"
-#include "cpu.h"
-
-
-/* DEVICE
-
-
- cpu - Interface to a Processor
-
-
- DESCRIPTION
-
-
- The CPU device provides the connection between the interrupt net
- (linking the devices and the interrupt controller) and the
- simulated model of each processor. This device contains interrupt
- ports that correspond directly to the external interrupt stimulus
- that can be sent to a given processor. Sending an interrupt to one
- of the ports results in an interrupt being delivered to the
- corresponding processor.
-
- Typically, an interrupt controller would have its inputs connected
- to device interrupt sources and its outputs (sreset, int, et.al.)
- connected to this device.
-
-
- PROPERTIES
-
-
- cpu-nr = <integer> (required)
-
-
- Specify the processor (1..N) that this cpu device node should
- control.
-
-
- EXAMPLES
-
-
- Connect an OpenPIC interrupt controller interrupt ports to
- processor zero.
-
- | -o '/phb/opic@0 > irq0 int /cpus/cpu@0' \
- | -o '/phb/opic@0 > init hreset /cpus/cpu@0' \
-
-
- */
-
-typedef struct _hw_cpu_device {
- int cpu_nr;
- cpu *processor;
-} hw_cpu_device;
-
-static const device_interrupt_port_descriptor hw_cpu_interrupt_ports[] = {
- { "hreset", hw_cpu_hard_reset },
- { "sreset", hw_cpu_soft_reset },
- { "int", hw_cpu_external_interrupt },
- { "mci", hw_cpu_machine_check_interrupt },
- { "smi", hw_cpu_system_management_interrupt },
- { NULL }
-};
-
-
-static void *
-hw_cpu_create(const char *name,
- const device_unit *unit_address,
- const char *args)
-{
- hw_cpu_device *hw_cpu = ZALLOC(hw_cpu_device);
- return hw_cpu;
-}
-
-
-/* during address initialization ensure that any missing cpu
- properties are added to this devices node */
-
-static void
-hw_cpu_init_address(device *me)
-{
- hw_cpu_device *hw_cpu = (hw_cpu_device*)device_data(me);
- /* populate the node with properties */
- /* clear our data */
- memset(hw_cpu, 0x0, sizeof(hw_cpu_device));
- hw_cpu->cpu_nr = device_find_integer_property(me, "cpu-nr");
- hw_cpu->processor = psim_cpu(device_system(me), hw_cpu->cpu_nr);
-}
-
-
-/* Take the interrupt and synchronize its delivery with the clock. If
- we've not yet scheduled an interrupt for the next clock tick, take
- the oportunity to do it now */
-
-static void
-hw_cpu_interrupt_event(device *me,
- int my_port,
- device *source,
- int source_port,
- int level,
- cpu *processor,
- unsigned_word cia)
-{
- hw_cpu_device *hw_cpu = (hw_cpu_device*)device_data(me);
- if (my_port < 0 || my_port >= hw_cpu_nr_interrupt_ports)
- error("hw_cpu_interrupt_event_callback: interrupt port out of range %d\n",
- my_port);
- switch (my_port) {
- /*case hw_cpu_hard_reset:*/
- /*case hw_cpu_soft_reset:*/
- case hw_cpu_external_interrupt:
- external_interrupt(hw_cpu->processor, level);
- break;
- /*case hw_cpu_machine_check_interrupt:*/
- default:
- error("hw_cpu_deliver_interrupt: unimplemented interrupt port %d\n",
- my_port);
- break;
- }
-}
-
-
-static device_callbacks const hw_cpu_callbacks = {
- { hw_cpu_init_address, }, /* init */
- { NULL, }, /* address */
- { NULL, }, /* io */
- { NULL, }, /* DMA */
- { hw_cpu_interrupt_event, NULL, hw_cpu_interrupt_ports }, /* interrupts */
- { NULL, NULL, },
-};
-
-const device_descriptor hw_cpu_device_descriptor[] = {
- { "hw-cpu", hw_cpu_create, &hw_cpu_callbacks },
- { "cpu", hw_cpu_create, &hw_cpu_callbacks },
- { NULL, },
-};
-
-#endif /* _HW_CPU_C_ */
diff --git a/sim/ppc/hw_cpu.h b/sim/ppc/hw_cpu.h
deleted file mode 100644
index 11d0298ee12..00000000000
--- a/sim/ppc/hw_cpu.h
+++ /dev/null
@@ -1,34 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1996, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-#ifndef _HW_CPU_H_
-#define _HW_CPU_H_
-
-enum {
- hw_cpu_hard_reset,
- hw_cpu_soft_reset,
- hw_cpu_external_interrupt,
- hw_cpu_machine_check_interrupt,
- hw_cpu_system_management_interrupt,
- hw_cpu_nr_interrupt_ports
-};
-
-#endif /* _HW_CPU_H_ */
diff --git a/sim/ppc/hw_disk.c b/sim/ppc/hw_disk.c
deleted file mode 100644
index 5934fead1a1..00000000000
--- a/sim/ppc/hw_disk.c
+++ /dev/null
@@ -1,557 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1997, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-#ifndef _HW_DISK_C_
-#define _HW_DISK_C_
-
-#include "device_table.h"
-
-#include "pk.h"
-
-#include <stdio.h>
-
-#ifdef HAVE_UNISTD_H
-#include <unistd.h>
-#endif
-
-#ifndef SEEK_SET
-#define SEEK_SET 0
-#endif
-
-/* DEVICE
-
-
- cdrom - read-only removable mass storage device
-
- disk - mass storage device
-
- floppy - removable mass storage device
-
-
- DESCRIPTION
-
-
- Mass storage devices such as a hard-disk or cdrom-drive are not
- normally directly connected to the processor. Instead, these
- devices are attached to a logical bus, such as SCSI or IDE, and
- then a controller of that bus is made accessible to the processor.
-
- Reflecting this, within a device tree, mass storage devices such as
- a <<cdrom>>, <<disk>> or <<floppy>> are created as children of of a
- logical bus controller node (such as a SCSI or IDE interface).
- That controller, in turn, would be made the child of a physical bus
- node that is directly accessible to the processor.
-
- The above mass storage devices provide two interfaces - a logical
- and a physical.
-
- At the physical level the <<device_io_...>> functions can be used
- perform reads and writes of the raw media. The address being
- interpreted as an offset from the start of the disk.
-
- At the logical level, it is possible to create an instance of the
- disk that provides access to any of the physical media, a disk
- partition, or even a file within a partition. The <<disk-label>>
- package, which implements this functionality, is described
- elsewhere. Both the Open Firmware and Moto BUG rom emulations
- support this interface.
-
- Block devices such as the <<floppy>> and <<cdrom>> have removable
- media. At the programmer level, the media can be changed using the
- <<change_media>> ioctl. From within GDB, a <<change-media>>
- operation can be initated by using the command.
-
- | (gdb) sim
-
-
- PROPERTIES
-
-
- file = <file-name> (required)
-
- The name of the file that contains an image of the disk. For
- <<disk>> and <<floppy>> devices, the image will be opened for both
- reading and writing. Multiple image files may be specified, the
- second and later files being opened when <<change-media>> (with a
- NULL file name) being specified.
-
-
- block-size = <nr-bytes> (optional)
-
- The value is returned by the block-size method. The default value
- is 512 bytes.
-
-
- max-transfer = <nr-bytes> (optional)
-
- The value is returned by the max-transfer method. The default value
- is 512 bytes.
-
-
- #blocks = <nr-blocks> (optional)
-
- The value is returned by the #blocks method. If no value is
- present then -1 is returned.
-
-
- read-only = <anything> (optional)
-
- If this property is present, the disk file image is always opened
- read-only.
-
- EXAMPLES
-
-
- Enable tracing
-
- | $ psim -t 'disk-device' \
-
-
- Add a CDROM and disk to an IDE bus. Specify the host operating
- system's cd drive as the CD-ROM image.
-
- | -o '/pci/ide/disk@0/file "disk-image' \
- | -o '/pci/ide/cdrom@1/file "/dev/cd0a' \
-
-
- As part of the code implementing a logical bus device (for instance
- the IDE controller), locate the CDROM device and then read block
- 47.
-
- | device *cdrom = device_tree_find_device(me, "cdrom");
- | char block[512];
- | device_io_read_buffer(cdrom, buf, 0,
- 0, 47 * sizeof(block), // space, address
- sizeof(block), NULL, 0);
-
-
- Use the device instance interface to read block 47 of the file
- called <<netbsd.elf>> on the disks default partition. Similar code
- would be used in an operating systems pre-boot loader.
-
- | device_instance *netbsd =
- | device_create_instance(root, "/pci/ide/disk:,\netbsd.elf");
- | char block[512];
- | device_instance_seek(netbsd, 0, 47 * sizeof(block));
- | device_instance_read(netbsd, block, sizeof(block));
-
-
- BUGS
-
-
- The block device specification includes mechanisms for determining
- the physical device characteristics - such as the disks size.
- Currently this mechanism is not implemented.
-
- The functionality of this device (in particular the device instance
- interface) depends on the implementation of <<disk-label>> package.
- That package may not be fully implemented.
-
- The disk does not know its size. Hence it relies on the failure of
- fread(), fwrite() and fseek() calls to detect errors.
-
- The disk size is limited by the addressable range covered by
- unsigned_word (addr). An extension would be to instead use the
- concatenated value space:addr.
-
- The method #blocks should `stat' the disk to determine the number
- of blocks if there is no #blocks property.
-
- It would appear that OpenFirmware does not define a client call for
- changing (ejecting) the media of a device.
-
- */
-
-typedef struct _hw_disk_device {
- int name_index;
- int nr_names;
- char *name;
- int read_only;
- /* unsigned_word size; */
- FILE *image;
-} hw_disk_device;
-
-typedef struct _hw_disk_instance {
- unsigned_word pos;
- hw_disk_device *disk;
-} hw_disk_instance;
-
-
-static void
-open_disk_image(device *me,
- hw_disk_device *disk,
- const char *name)
-{
- if (disk->image != NULL)
- fclose(disk->image);
- if (disk->name != NULL)
- zfree(disk->name);
- disk->name = strdup(name);
- disk->image = fopen(disk->name, disk->read_only ? "r" : "r+");
- if (disk->image == NULL) {
- perror(device_name(me));
- device_error(me, "open %s failed\n", disk->name);
- }
-
- DTRACE(disk, ("image %s (%s)\n",
- disk->name,
- (disk->read_only ? "read-only" : "read-write")));
-}
-
-static void
-hw_disk_init_address(device *me)
-{
- hw_disk_device *disk = device_data(me);
- unsigned_word address;
- int space;
- const char *name;
-
- /* attach to the parent. Since the bus is logical, attach using just
- the unit-address (size must be zero) */
- device_address_to_attach_address(device_parent(me), device_unit_address(me),
- &space, &address, me);
- device_attach_address(device_parent(me), attach_callback,
- space, address, 0/*size*/, access_read_write_exec,
- me);
-
- /* get the name of the file specifying the disk image */
- disk->name_index = 0;
- disk->nr_names = device_find_string_array_property(me, "file",
- disk->name_index, &name);
- if (!disk->nr_names)
- device_error(me, "invalid file property");
-
- /* is it a RO device? */
- disk->read_only =
- (strcmp(device_name(me), "disk") != 0
- && strcmp(device_name(me), "floppy") != 0
- && device_find_property(me, "read-only") == NULL);
-
- /* now open it */
- open_disk_image(me, disk, name);
-}
-
-static int
-hw_disk_ioctl(device *me,
- cpu *processor,
- unsigned_word cia,
- device_ioctl_request request,
- va_list ap)
-{
- switch (request) {
- case device_ioctl_change_media:
- {
- hw_disk_device *disk = device_data(me);
- const char *name = va_arg(ap, const char *);
- if (name != NULL) {
- disk->name_index = -1;
- }
- else {
- disk->name_index = (disk->name_index + 1) % disk->nr_names;
- if (!device_find_string_array_property(me, "file",
- disk->name_index, &name))
- device_error(me, "invalid file property");
- }
- open_disk_image(me, disk, name);
- }
- break;
- default:
- device_error(me, "insupported ioctl request");
- break;
- }
- return 0;
-}
-
-
-
-
-
-static unsigned
-hw_disk_io_read_buffer(device *me,
- void *dest,
- int space,
- unsigned_word addr,
- unsigned nr_bytes,
- cpu *processor,
- unsigned_word cia)
-{
- hw_disk_device *disk = device_data(me);
- unsigned nr_bytes_read;
- if (space != 0)
- device_error(me, "read - extended disk addressing unimplemented");
- if (nr_bytes == 0)
- nr_bytes_read = 0;
- else if (fseek(disk->image, addr, SEEK_SET) < 0)
- nr_bytes_read = 0;
- else if (fread(dest, nr_bytes, 1, disk->image) != 1)
- nr_bytes_read = 0;
- else
- nr_bytes_read = nr_bytes;
- DTRACE(disk, ("io-read - address 0x%lx, nr-bytes-read %d, requested %d\n",
- (unsigned long) addr, (int)nr_bytes_read, (int)nr_bytes));
- return nr_bytes_read;
-}
-
-
-static unsigned
-hw_disk_io_write_buffer(device *me,
- const void *source,
- int space,
- unsigned_word addr,
- unsigned nr_bytes,
- cpu *processor,
- unsigned_word cia)
-{
- hw_disk_device *disk = device_data(me);
- unsigned nr_bytes_written;
- if (space != 0)
- device_error(me, "write - extended disk addressing unimplemented");
- if (disk->read_only)
- nr_bytes_written = 0;
- else if (nr_bytes == 0)
- nr_bytes_written = 0;
- else if (fseek(disk->image, addr, SEEK_SET) < 0)
- nr_bytes_written = 0;
- else if (fwrite(source, nr_bytes, 1, disk->image) != 1)
- nr_bytes_written = 0;
- else
- nr_bytes_written = nr_bytes;
- DTRACE(disk, ("io-write - address 0x%lx, nr-bytes-written %d, requested %d\n",
- (unsigned long) addr, (int)nr_bytes_written, (int)nr_bytes));
- return nr_bytes_written;
-}
-
-
-/* instances of the hw_disk device */
-
-static void
-hw_disk_instance_delete(device_instance *instance)
-{
- hw_disk_instance *data = device_instance_data(instance);
- DITRACE(disk, ("delete - instance=%ld\n",
- (unsigned long)device_instance_to_external(instance)));
- zfree(data);
-}
-
-static int
-hw_disk_instance_read(device_instance *instance,
- void *buf,
- unsigned_word len)
-{
- hw_disk_instance *data = device_instance_data(instance);
- DITRACE(disk, ("read - instance=%ld len=%ld\n",
- (unsigned long)device_instance_to_external(instance),
- (long)len));
- if ((data->pos + len) < data->pos)
- return -1; /* overflow */
- if (fseek(data->disk->image, data->pos, SEEK_SET) < 0)
- return -1;
- if (fread(buf, len, 1, data->disk->image) != 1)
- return -1;
- data->pos = ftell(data->disk->image);
- return len;
-}
-
-static int
-hw_disk_instance_write(device_instance *instance,
- const void *buf,
- unsigned_word len)
-{
- hw_disk_instance *data = device_instance_data(instance);
- DITRACE(disk, ("write - instance=%ld len=%ld\n",
- (unsigned long)device_instance_to_external(instance),
- (long)len));
- if ((data->pos + len) < data->pos)
- return -1; /* overflow */
- if (data->disk->read_only)
- return -1;
- if (fseek(data->disk->image, data->pos, SEEK_SET) < 0)
- return -1;
- if (fwrite(buf, len, 1, data->disk->image) != 1)
- return -1;
- data->pos = ftell(data->disk->image);
- return len;
-}
-
-static int
-hw_disk_instance_seek(device_instance *instance,
- unsigned_word pos_hi,
- unsigned_word pos_lo)
-{
- hw_disk_instance *data = device_instance_data(instance);
- if (pos_hi != 0)
- device_error(device_instance_device(instance),
- "seek - extended addressing unimplemented");
- DITRACE(disk, ("seek - instance=%ld pos_hi=%ld pos_lo=%ld\n",
- (unsigned long)device_instance_to_external(instance),
- (long)pos_hi, (long)pos_lo));
- data->pos = pos_lo;
- return 0;
-}
-
-static int
-hw_disk_max_transfer(device_instance *instance,
- int n_stack_args,
- unsigned32 stack_args[/*n_stack_args*/],
- int n_stack_returns,
- unsigned32 stack_returns[/*n_stack_returns*/])
-{
- device *me = device_instance_device(instance);
- if ((n_stack_args != 0)
- || (n_stack_returns != 1)) {
- device_error(me, "Incorrect number of arguments for max-transfer method\n");
- return -1;
- }
- else {
- unsigned_cell max_transfer;
- if (device_find_property(me, "max-transfer"))
- max_transfer = device_find_integer_property(me, "max-transfer");
- else
- max_transfer = 512;
- DITRACE(disk, ("max-transfer - instance=%ld max-transfer=%ld\n",
- (unsigned long)device_instance_to_external(instance),
- (long int)max_transfer));
- stack_returns[0] = max_transfer;
- return 0;
- }
-}
-
-static int
-hw_disk_block_size(device_instance *instance,
- int n_stack_args,
- unsigned32 stack_args[/*n_stack_args*/],
- int n_stack_returns,
- unsigned32 stack_returns[/*n_stack_returns*/])
-{
- device *me = device_instance_device(instance);
- if ((n_stack_args != 0)
- || (n_stack_returns != 1)) {
- device_error(me, "Incorrect number of arguments for block-size method\n");
- return -1;
- }
- else {
- unsigned_cell block_size;
- if (device_find_property(me, "block-size"))
- block_size = device_find_integer_property(me, "block-size");
- else
- block_size = 512;
- DITRACE(disk, ("block-size - instance=%ld block-size=%ld\n",
- (unsigned long)device_instance_to_external(instance),
- (long int)block_size));
- stack_returns[0] = block_size;
- return 0;
- }
-}
-
-static int
-hw_disk_nr_blocks(device_instance *instance,
- int n_stack_args,
- unsigned32 stack_args[/*n_stack_args*/],
- int n_stack_returns,
- unsigned32 stack_returns[/*n_stack_returns*/])
-{
- device *me = device_instance_device(instance);
- if ((n_stack_args != 0)
- || (n_stack_returns != 1)) {
- device_error(me, "Incorrect number of arguments for block-size method\n");
- return -1;
- }
- else {
- unsigned_word nr_blocks;
- if (device_find_property(me, "#blocks"))
- nr_blocks = device_find_integer_property(me, "#blocks");
- else
- nr_blocks = -1;
- DITRACE(disk, ("#blocks - instance=%ld #blocks=%ld\n",
- (unsigned long)device_instance_to_external(instance),
- (long int)nr_blocks));
- stack_returns[0] = nr_blocks;
- return 0;
- }
-}
-
-static device_instance_methods hw_disk_instance_methods[] = {
- { "max-transfer", hw_disk_max_transfer },
- { "block-size", hw_disk_block_size },
- { "#blocks", hw_disk_nr_blocks },
- { NULL, },
-};
-
-static const device_instance_callbacks hw_disk_instance_callbacks = {
- hw_disk_instance_delete,
- hw_disk_instance_read,
- hw_disk_instance_write,
- hw_disk_instance_seek,
- hw_disk_instance_methods,
-};
-
-static device_instance *
-hw_disk_create_instance(device *me,
- const char *path,
- const char *args)
-{
- device_instance *instance;
- hw_disk_device *disk = device_data(me);
- hw_disk_instance *data = ZALLOC(hw_disk_instance);
- data->disk = disk;
- data->pos = 0;
- instance = device_create_instance_from(me, NULL,
- data,
- path, args,
- &hw_disk_instance_callbacks);
- DITRACE(disk, ("create - path=%s(%s) instance=%ld\n",
- path, args,
- (unsigned long)device_instance_to_external(instance)));
- return pk_disklabel_create_instance(instance, args);
-}
-
-static device_callbacks const hw_disk_callbacks = {
- { hw_disk_init_address, NULL },
- { NULL, }, /* address */
- { hw_disk_io_read_buffer,
- hw_disk_io_write_buffer, },
- { NULL, }, /* DMA */
- { NULL, }, /* interrupt */
- { NULL, }, /* unit */
- hw_disk_create_instance,
- hw_disk_ioctl,
-};
-
-
-static void *
-hw_disk_create(const char *name,
- const device_unit *unit_address,
- const char *args)
-{
- /* create the descriptor */
- hw_disk_device *hw_disk = ZALLOC(hw_disk_device);
- return hw_disk;
-}
-
-
-const device_descriptor hw_disk_device_descriptor[] = {
- { "disk", hw_disk_create, &hw_disk_callbacks },
- { "cdrom", hw_disk_create, &hw_disk_callbacks },
- { "floppy", hw_disk_create, &hw_disk_callbacks },
- { NULL },
-};
-
-#endif /* _HW_DISK_C_ */
diff --git a/sim/ppc/hw_eeprom.c b/sim/ppc/hw_eeprom.c
deleted file mode 100644
index 5092984369e..00000000000
--- a/sim/ppc/hw_eeprom.c
+++ /dev/null
@@ -1,839 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1996, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-#ifndef _HW_EEPROM_C_
-#define _HW_EEPROM_C_
-
-#include "device_table.h"
-
-#ifdef HAVE_STRING_H
-#include <string.h>
-#else
-#ifdef HAVE_STRINGS_H
-#include <strings.h>
-#endif
-#endif
-
-
-/* DEVICE
-
-
- eeprom - JEDEC? compatible electricaly erasable programable device
-
-
- DESCRIPTION
-
-
- This device implements a small byte addressable EEPROM.
- Programming is performed using the same write sequences as used by
- standard modern EEPROM components. Writes occure in real time, the
- device returning a progress value until the programing has been
- completed.
-
- It is based on the AMD 29F040 component.
-
-
- PROPERTIES
-
-
- reg = <address> <size> (required)
-
- Determine where the device lives in the parents address space.
-
-
- nr-sectors = <integer> (required)
-
- When erasing an entire sector is cleared at a time. This specifies
- the number of sectors in the EEPROM component.
-
-
- sector-size = <integer> (required)
-
- The number of bytes in a sector. When erasing, memory chunks of
- this size are cleared.
-
- NOTE: The product nr-sectors * sector-size does not need to map the
- size specified in the reg property. If the specified size is
- smaller part of the eeprom will not be accessible while if it is
- larger the addresses will wrap.
-
-
- byte-write-delay = <integer> (required)
-
- Number of clock ticks before the programming of a single byte
- completes.
-
-
- sector-start-delay = <integer> (required)
-
- When erasing sectors, the number of clock ticks after the sector
- has been specified that the actual erase process commences.
-
-
- erase-delay = <intger> (required)
-
- Number of clock ticks before an erase program completes
-
-
- manufacture-code = <integer> (required)
-
- The one byte value returned when the auto-select manufacturer code
- is read.
-
-
- device-code = <integer> (required)
-
- The one byte value returned when the auto-select device code is
- read.
-
-
- input-file = <file-name> (optional)
-
- Initialize the eeprom using the specified binary file.
-
-
- output-file = <file-name> (optional)
-
- When ever the eeprom is updated, save the modified image into the
- specified file.
-
-
- EXAMPLES
-
-
- Enable tracing of the eeprom:
-
- | bash$ psim -t eeprom-device \
-
-
- Configure something very like the Amd Am29F040 - 512byte EEPROM
- (but a bit faster):
-
- | -o '/eeprom@0xfff00000/reg 0xfff00000 0x80000' \
- | -o '/eeprom@0xfff00000/nr-sectors 8' \
- | -o '/eeprom@0xfff00000/sector-size 0x10000' \
- | -o '/eeprom@0xfff00000/byte-write-delay 1000' \
- | -o '/eeprom@0xfff00000/sector-start-delay 100' \
- | -o '/eeprom@0xfff00000/erase-delay 1000' \
- | -o '/eeprom@0xfff00000/manufacture-code 0x01' \
- | -o '/eeprom@0xfff00000/device-code 0xa4' \
-
-
- Initialize the eeprom from the file <</dev/zero>>:
-
- | -o '/eeprom@0xfff00000/input-file /dev/zero'
-
-
- BUGS
-
-
- */
-
-typedef enum {
- read_reset,
- write_nr_2,
- write_nr_3,
- write_nr_4,
- write_nr_5,
- write_nr_6,
- byte_program,
- byte_programming,
- chip_erase,
- sector_erase,
- sector_erase_suspend,
- autoselect,
-} hw_eeprom_states;
-
-static const char *
-state2a(hw_eeprom_states state)
-{
- switch (state) {
- case read_reset: return "read_reset";
- case write_nr_2: return "write_nr_2";
- case write_nr_3: return "write_nr_3";
- case write_nr_4: return "write_nr_4";
- case write_nr_5: return "write_nr_5";
- case write_nr_6: return "write_nr_6";
- case byte_program: return "byte_program";
- case byte_programming: return "byte_programming";
- case chip_erase: return "chip_erase";
- case sector_erase: return "sector_erase";
- case sector_erase_suspend: return "sector_erase_suspend";
- case autoselect: return "autoselect";
- }
- return NULL;
-}
-
-typedef struct _hw_eeprom_device {
- /* general */
- hw_eeprom_states state;
- unsigned8 *memory;
- unsigned sizeof_memory;
- unsigned erase_delay;
- signed64 program_start_time;
- signed64 program_finish_time;
- unsigned8 manufacture_code;
- unsigned8 device_code;
- unsigned8 toggle_bit;
- /* initialization */
- const char *input_file_name;
- const char *output_file_name;
- /* for sector and sector programming */
- hw_eeprom_states sector_state;
- unsigned8 *sectors;
- unsigned nr_sectors;
- unsigned sizeof_sector;
- unsigned sector_start_delay;
- unsigned sector_start_time;
- /* byte and byte programming */
- unsigned byte_write_delay;
- unsigned_word byte_program_address;
- unsigned8 byte_program_byte;
-} hw_eeprom_device;
-
-typedef struct _hw_eeprom_reg_spec {
- unsigned32 base;
- unsigned32 size;
-} hw_eeprom_reg_spec;
-
-static void
-hw_eeprom_init_data(device *me)
-{
- hw_eeprom_device *eeprom = (hw_eeprom_device*)device_data(me);
-
- /* have we any input or output files */
- if (device_find_property(me, "input-file") != NULL)
- eeprom->input_file_name = device_find_string_property(me, "input-file");
- if (device_find_property(me, "output-file") != NULL)
- eeprom->input_file_name = device_find_string_property(me, "output-file");
-
- /* figure out the sectors in the eeprom */
- if (eeprom->sectors == NULL) {
- eeprom->nr_sectors = device_find_integer_property(me, "nr-sectors");
- eeprom->sizeof_sector = device_find_integer_property(me, "sector-size");
- eeprom->sectors = zalloc(eeprom->nr_sectors);
- }
- else
- memset(eeprom->sectors, 0, eeprom->nr_sectors);
-
- /* initialize the eeprom */
- if (eeprom->memory == NULL) {
- eeprom->sizeof_memory = eeprom->sizeof_sector * eeprom->nr_sectors;
- eeprom->memory = zalloc(eeprom->sizeof_memory);
- }
- else
- memset(eeprom->memory, 0, eeprom->sizeof_memory);
- if (eeprom->input_file_name != NULL) {
- int i;
- FILE *input_file = fopen(eeprom->input_file_name, "r");
- if (input_file == NULL) {
- perror("eeprom");
- device_error(me, "Failed to open input file %s\n", eeprom->input_file_name);
- }
- for (i = 0; i < eeprom->sizeof_memory; i++) {
- if (fread(&eeprom->memory[i], 1, 1, input_file) != 1)
- break;
- }
- fclose(input_file);
- }
-
- /* timing */
- eeprom->byte_write_delay = device_find_integer_property(me, "byte-write-delay");
- eeprom->sector_start_delay = device_find_integer_property(me, "sector-start-delay");
- eeprom->erase_delay = device_find_integer_property(me, "erase-delay");
-
- /* misc */
- eeprom->manufacture_code = device_find_integer_property(me, "manufacture-code");
- eeprom->device_code = device_find_integer_property(me, "device-code");
-}
-
-
-static void
-invalid_read(device *me,
- hw_eeprom_states state,
- unsigned_word address,
- const char *reason)
-{
- DTRACE(eeprom, ("Invalid read to 0x%lx while in state %s (%s)\n",
- (unsigned long)address,
- state2a(state),
- reason));
-}
-
-static void
-invalid_write(device *me,
- hw_eeprom_states state,
- unsigned_word address,
- unsigned8 data,
- const char *reason)
-{
- DTRACE(eeprom, ("Invalid write of 0x%lx to 0x%lx while in state %s (%s)\n",
- (unsigned long)data,
- (unsigned long)address,
- state2a(state),
- reason));
-}
-
-static void
-dump_eeprom(device *me,
- hw_eeprom_device *eeprom)
-{
- if (eeprom->output_file_name != NULL) {
- int i;
- FILE *output_file = fopen(eeprom->output_file_name, "w");
- if (output_file == NULL) {
- perror("eeprom");
- device_error(me, "Failed to open output file %s\n",
- eeprom->output_file_name);
- }
- for (i = 0; i < eeprom->sizeof_memory; i++) {
- if (fwrite(&eeprom->memory[i], 1, 1, output_file) != 1)
- break;
- }
- fclose(output_file);
- }
-}
-
-
-/* program a single byte of eeprom */
-
-static void
-start_programming_byte(device *me,
- hw_eeprom_device *eeprom,
- unsigned_word address,
- unsigned8 new_byte)
-{
- unsigned8 old_byte = eeprom->memory[address];
- DTRACE(eeprom, ("start-programing-byte - address 0x%lx, new 0x%lx, old 0x%lx\n",
- (unsigned long)address,
- (unsigned long)new_byte,
- (unsigned long)old_byte));
- eeprom->byte_program_address = address;
- /* : old new : ~old : new&~old
- : 0 0 : 1 : 0
- : 0 1 : 1 : 1 -- can not set a bit
- : 1 0 : 0 : 0
- : 1 1 : 0 : 0 */
- if (~old_byte & new_byte)
- invalid_write(me, eeprom->state, address, new_byte, "setting cleared bit");
- /* : old new : old&new
- : 0 0 : 0
- : 0 1 : 0
- : 1 0 : 0
- : 1 1 : 1 */
- eeprom->byte_program_byte = new_byte & old_byte;
- eeprom->memory[address] = ~new_byte & ~0x24; /* LE-bits 5:3 zero */
- eeprom->program_start_time = device_event_queue_time(me);
- eeprom->program_finish_time = (eeprom->program_start_time
- + eeprom->byte_write_delay);
-}
-
-static void
-finish_programming_byte(device *me,
- hw_eeprom_device *eeprom)
-{
- DTRACE(eeprom, ("finish-programming-byte - address 0x%lx, byte 0x%lx\n",
- (unsigned long)eeprom->byte_program_address,
- (unsigned long)eeprom->byte_program_byte));
- eeprom->memory[eeprom->byte_program_address] = eeprom->byte_program_byte;
- dump_eeprom(me, eeprom);
-}
-
-
-/* erase the eeprom completly */
-
-static void
-start_erasing_chip(device *me,
- hw_eeprom_device *eeprom)
-{
- DTRACE(eeprom, ("start-erasing-chip\n"));
- memset(eeprom->memory, 0, eeprom->sizeof_memory);
- eeprom->program_start_time = device_event_queue_time(me);
- eeprom->program_finish_time = (eeprom->program_start_time
- + eeprom->erase_delay);
-}
-
-static void
-finish_erasing_chip(device *me,
- hw_eeprom_device *eeprom)
-{
- DTRACE(eeprom, ("finish-erasing-chip\n"));
- memset(eeprom->memory, 0xff, eeprom->sizeof_memory);
- dump_eeprom(me, eeprom);
-}
-
-
-/* erase a single sector of the eeprom */
-
-static void
-start_erasing_sector(device *me,
- hw_eeprom_device *eeprom,
- unsigned_word address)
-{
- int sector = address / eeprom->sizeof_sector;
- DTRACE(eeprom, ("start-erasing-sector - address 0x%lx, sector %d\n",
- (unsigned long)address, sector));
- ASSERT(sector < eeprom->nr_sectors);
- eeprom->sectors[sector] = 1;
- memset(eeprom->memory + sector * eeprom->sizeof_sector,
- 0x4, eeprom->sizeof_sector);
- eeprom->program_start_time = device_event_queue_time(me);
- eeprom->sector_start_time = (eeprom->program_start_time
- + eeprom->sector_start_delay);
- eeprom->program_finish_time = (eeprom->sector_start_time
- + eeprom->erase_delay);
-
-}
-
-static void
-finish_erasing_sector(device *me,
- hw_eeprom_device *eeprom)
-{
- int sector;
- DTRACE(eeprom, ("finish-erasing-sector\n"));
- for (sector = 0; sector < eeprom->nr_sectors; sector++) {
- if (eeprom->sectors[sector]) {
- eeprom->sectors[sector] = 0;
- memset(eeprom->memory + sector * eeprom->sizeof_sector,
- 0xff, eeprom->sizeof_sector);
- }
- }
- dump_eeprom(me, eeprom);
-}
-
-
-/* eeprom reads */
-
-static unsigned8
-toggle(hw_eeprom_device *eeprom,
- unsigned8 byte)
-{
- eeprom->toggle_bit = eeprom->toggle_bit ^ 0x40; /* le-bit 6 */
- return eeprom->toggle_bit ^ byte;
-}
-
-static unsigned8
-read_byte(device *me,
- hw_eeprom_device *eeprom,
- unsigned_word address)
-{
- /* may need multiple iterations of this */
- while (1) {
- switch (eeprom->state) {
-
- case read_reset:
- return eeprom->memory[address];
-
- case autoselect:
- if ((address & 0xff) == 0x00)
- return eeprom->manufacture_code;
- else if ((address & 0xff) == 0x01)
- return eeprom->device_code;
- else
- return 0; /* not certain about this */
-
- case byte_programming:
- if (device_event_queue_time(me) > eeprom->program_finish_time) {
- finish_programming_byte(me, eeprom);
- eeprom->state = read_reset;
- continue;
- }
- else if (address == eeprom->byte_program_address) {
- return toggle(eeprom, eeprom->memory[address]);
- }
- else {
- /* trash that memory location */
- invalid_read(me, eeprom->state, address, "not byte program address");
- eeprom->memory[address] = (eeprom->memory[address]
- & eeprom->byte_program_byte);
- return toggle(eeprom, eeprom->memory[eeprom->byte_program_address]);
- }
-
- case chip_erase:
- if (device_event_queue_time(me) > eeprom->program_finish_time) {
- finish_erasing_chip(me, eeprom);
- eeprom->state = read_reset;
- continue;
- }
- else {
- return toggle(eeprom, eeprom->memory[address]);
- }
-
- case sector_erase:
- if (device_event_queue_time(me) > eeprom->program_finish_time) {
- finish_erasing_sector(me, eeprom);
- eeprom->state = read_reset;
- continue;
- }
- else if (!eeprom->sectors[address / eeprom->sizeof_sector]) {
- /* read to wrong sector */
- invalid_read(me, eeprom->state, address, "sector not being erased");
- return toggle(eeprom, eeprom->memory[address]) & ~0x8;
- }
- else if (device_event_queue_time(me) > eeprom->sector_start_time) {
- return toggle(eeprom, eeprom->memory[address]) | 0x8;
- }
- else {
- return toggle(eeprom, eeprom->memory[address]) & ~0x8;
- }
-
- case sector_erase_suspend:
- if (!eeprom->sectors[address / eeprom->sizeof_sector]) {
- return eeprom->memory[address];
- }
- else {
- invalid_read(me, eeprom->state, address, "sector being erased");
- return eeprom->memory[address];
- }
-
- default:
- invalid_read(me, eeprom->state, address, "invalid state");
- return eeprom->memory[address];
-
- }
- }
- return 0;
-}
-
-static unsigned
-hw_eeprom_io_read_buffer(device *me,
- void *dest,
- int space,
- unsigned_word addr,
- unsigned nr_bytes,
- cpu *processor,
- unsigned_word cia)
-{
- hw_eeprom_device *eeprom = (hw_eeprom_device*)device_data(me);
- int i;
- for (i = 0; i < nr_bytes; i++) {
- unsigned_word address = (addr + i) % eeprom->sizeof_memory;
- unsigned8 byte = read_byte(me, eeprom, address);
- ((unsigned8*)dest)[i] = byte;
- }
- return nr_bytes;
-}
-
-
-/* eeprom writes */
-
-static void
-write_byte(device *me,
- hw_eeprom_device *eeprom,
- unsigned_word address,
- unsigned8 data)
-{
- /* may need multiple transitions to process a write */
- while (1) {
- switch (eeprom->state) {
-
- case read_reset:
- if (address == 0x5555 && data == 0xaa)
- eeprom->state = write_nr_2;
- else if (data == 0xf0)
- eeprom->state = read_reset;
- else {
- invalid_write(me, eeprom->state, address, data, "unexpected");
- eeprom->state = read_reset;
- }
- return;
-
- case write_nr_2:
- if (address == 0x2aaa && data == 0x55)
- eeprom->state = write_nr_3;
- else {
- invalid_write(me, eeprom->state, address, data, "unexpected");
- eeprom->state = read_reset;
- }
- return;
-
- case write_nr_3:
- if (address == 0x5555 && data == 0xf0)
- eeprom->state = read_reset;
- else if (address == 0x5555 && data == 0x90)
- eeprom->state = autoselect;
- else if (address == 0x5555 && data == 0xa0) {
- eeprom->state = byte_program;
- }
- else if (address == 0x5555 && data == 0x80)
- eeprom->state = write_nr_4;
- else {
- invalid_write(me, eeprom->state, address, data, "unexpected");
- eeprom->state = read_reset;
- }
- return;
-
- case write_nr_4:
- if (address == 0x5555 && data == 0xaa)
- eeprom->state = write_nr_5;
- else {
- invalid_write(me, eeprom->state, address, data, "unexpected");
- eeprom->state = read_reset;
- }
- return;
-
- case write_nr_5:
- if (address == 0x2aaa && data == 0x55)
- eeprom->state = write_nr_6;
- else {
- invalid_write(me, eeprom->state, address, data, "unexpected");
- eeprom->state = read_reset;
- }
- return;
-
- case write_nr_6:
- if (address == 0x5555 && data == 0x10) {
- start_erasing_chip(me, eeprom);
- eeprom->state = chip_erase;
- }
- else {
- start_erasing_sector(me, eeprom, address);
- eeprom->sector_state = read_reset;
- eeprom->state = sector_erase;
- }
- return;
-
- case autoselect:
- if (data == 0xf0)
- eeprom->state = read_reset;
- else if (address == 0x5555 && data == 0xaa)
- eeprom->state = write_nr_2;
- else {
- invalid_write(me, eeprom->state, address, data, "unsupported address");
- eeprom->state = read_reset;
- }
- return;
-
- case byte_program:
- start_programming_byte(me, eeprom, address, data);
- eeprom->state = byte_programming;
- return;
-
- case byte_programming:
- if (device_event_queue_time(me) > eeprom->program_finish_time) {
- finish_programming_byte(me, eeprom);
- eeprom->state = read_reset;
- continue;
- }
- /* ignore it */
- return;
-
- case chip_erase:
- if (device_event_queue_time(me) > eeprom->program_finish_time) {
- finish_erasing_chip(me, eeprom);
- eeprom->state = read_reset;
- continue;
- }
- /* ignore it */
- return;
-
- case sector_erase:
- if (device_event_queue_time(me) > eeprom->program_finish_time) {
- finish_erasing_sector(me, eeprom);
- eeprom->state = eeprom->sector_state;
- continue;
- }
- else if (device_event_queue_time(me) > eeprom->sector_start_time
- && data == 0xb0) {
- eeprom->sector_state = read_reset;
- eeprom->state = sector_erase_suspend;
- }
- else {
- if (eeprom->sector_state == read_reset
- && address == 0x5555 && data == 0xaa)
- eeprom->sector_state = write_nr_2;
- else if (eeprom->sector_state == write_nr_2
- && address == 0x2aaa && data == 0x55)
- eeprom->sector_state = write_nr_3;
- else if (eeprom->sector_state == write_nr_3
- && address == 0x5555 && data == 0x80)
- eeprom->sector_state = write_nr_4;
- else if (eeprom->sector_state == write_nr_4
- && address == 0x5555 && data == 0xaa)
- eeprom->sector_state = write_nr_5;
- else if (eeprom->sector_state == write_nr_5
- && address == 0x2aaa && data == 0x55)
- eeprom->sector_state = write_nr_6;
- else if (eeprom->sector_state == write_nr_6
- && address != 0x5555 && data == 0x30) {
- if (device_event_queue_time(me) > eeprom->sector_start_time) {
- DTRACE(eeprom, ("sector erase command after window closed\n"));
- eeprom->sector_state = read_reset;
- }
- else {
- start_erasing_sector(me, eeprom, address);
- eeprom->sector_state = read_reset;
- }
- }
- else {
- invalid_write(me, eeprom->state, address, data, state2a(eeprom->sector_state));
- eeprom->state = read_reset;
- }
- }
- return;
-
- case sector_erase_suspend:
- if (data == 0x30)
- eeprom->state = sector_erase;
- else {
- invalid_write(me, eeprom->state, address, data, "not resume command");
- eeprom->state = read_reset;
- }
- return;
-
- }
- }
-}
-
-static unsigned
-hw_eeprom_io_write_buffer(device *me,
- const void *source,
- int space,
- unsigned_word addr,
- unsigned nr_bytes,
- cpu *processor,
- unsigned_word cia)
-{
- hw_eeprom_device *eeprom = (hw_eeprom_device*)device_data(me);
- int i;
- for (i = 0; i < nr_bytes; i++) {
- unsigned_word address = (addr + i) % eeprom->sizeof_memory;
- unsigned8 byte = ((unsigned8*)source)[i];
- write_byte(me, eeprom, address, byte);
- }
- return nr_bytes;
-}
-
-
-/* An instance of the eeprom */
-
-typedef struct _hw_eeprom_instance {
- unsigned_word pos;
- hw_eeprom_device *eeprom;
- device *me;
-} hw_eeprom_instance;
-
-static void
-hw_eeprom_instance_delete(device_instance *instance)
-{
- hw_eeprom_instance *data = device_instance_data(instance);
- zfree(data);
-}
-
-static int
-hw_eeprom_instance_read(device_instance *instance,
- void *buf,
- unsigned_word len)
-{
- hw_eeprom_instance *data = device_instance_data(instance);
- int i;
- if (data->eeprom->state != read_reset)
- DITRACE(eeprom, ("eeprom not idle during instance read\n"));
- for (i = 0; i < len; i++) {
- ((unsigned8*)buf)[i] = data->eeprom->memory[data->pos];
- data->pos = (data->pos + 1) % data->eeprom->sizeof_memory;
- }
- return len;
-}
-
-static int
-hw_eeprom_instance_write(device_instance *instance,
- const void *buf,
- unsigned_word len)
-{
- hw_eeprom_instance *data = device_instance_data(instance);
- int i;
- if (data->eeprom->state != read_reset)
- DITRACE(eeprom, ("eeprom not idle during instance write\n"));
- for (i = 0; i < len; i++) {
- data->eeprom->memory[data->pos] = ((unsigned8*)buf)[i];
- data->pos = (data->pos + 1) % data->eeprom->sizeof_memory;
- }
- dump_eeprom(data->me, data->eeprom);
- return len;
-}
-
-static int
-hw_eeprom_instance_seek(device_instance *instance,
- unsigned_word pos_hi,
- unsigned_word pos_lo)
-{
- hw_eeprom_instance *data = device_instance_data(instance);
- if (pos_lo >= data->eeprom->sizeof_memory)
- device_error(data->me, "seek value 0x%lx out of range\n",
- (unsigned long)pos_lo);
- data->pos = pos_lo;
- return 0;
-}
-
-static const device_instance_callbacks hw_eeprom_instance_callbacks = {
- hw_eeprom_instance_delete,
- hw_eeprom_instance_read,
- hw_eeprom_instance_write,
- hw_eeprom_instance_seek,
-};
-
-static device_instance *
-hw_eeprom_create_instance(device *me,
- const char *path,
- const char *args)
-{
- hw_eeprom_device *eeprom = device_data(me);
- hw_eeprom_instance *data = ZALLOC(hw_eeprom_instance);
- data->eeprom = eeprom;
- data->me = me;
- return device_create_instance_from(me, NULL,
- data,
- path, args,
- &hw_eeprom_instance_callbacks);
-}
-
-
-
-static device_callbacks const hw_eeprom_callbacks = {
- { generic_device_init_address,
- hw_eeprom_init_data },
- { NULL, }, /* address */
- { hw_eeprom_io_read_buffer,
- hw_eeprom_io_write_buffer }, /* IO */
- { NULL, }, /* DMA */
- { NULL, }, /* interrupt */
- { NULL, }, /* unit */
- hw_eeprom_create_instance,
-};
-
-static void *
-hw_eeprom_create(const char *name,
- const device_unit *unit_address,
- const char *args)
-{
- hw_eeprom_device *eeprom = ZALLOC(hw_eeprom_device);
- return eeprom;
-}
-
-
-
-const device_descriptor hw_eeprom_device_descriptor[] = {
- { "eeprom", hw_eeprom_create, &hw_eeprom_callbacks },
- { NULL },
-};
-
-#endif /* _HW_EEPROM_C_ */
diff --git a/sim/ppc/hw_glue.c b/sim/ppc/hw_glue.c
deleted file mode 100644
index d7ad9290361..00000000000
--- a/sim/ppc/hw_glue.c
+++ /dev/null
@@ -1,371 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1996, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-#ifndef _HW_GLUE_C_
-#define _HW_GLUE_C_
-
-#include "device_table.h"
-
-
-/* DEVICE
-
-
- glue - glue to interconnect and test interrupts
-
-
- DESCRIPTION
-
-
- The glue device provides two functions. Firstly, it provides a
- mechanism for inspecting and driving the interrupt net. Secondly,
- it provides a set of boolean primitives that can be used add
- combinatorial operations to the interrupt network.
-
- Glue devices have a variable number of big endian <<output>>
- registers. Each host-word size. The registers can be both read
- and written.
-
- Writing a value to an output register causes an interrupt (of the
- specified level) to be driven on the devices corresponding output
- interrupt port.
-
- Reading an <<output>> register returns either the last value
- written or the most recently computed value (for that register) as
- a result of an interrupt ariving (which ever was computed last).
-
- At present the following sub device types are available:
-
- <<glue>>: In addition to driving its output interrupt port with any
- value written to an interrupt input port is stored in the
- corresponding <<output>> register. Such input interrupts, however,
- are not propogated to an output interrupt port.
-
- <<glue-and>>: The bit-wise AND of the interrupt inputs is computed
- and then both stored in <<output>> register zero and propogated to
- output interrupt output port zero.
-
-
- PROPERTIES
-
-
- reg = <address> <size> (required)
-
- Specify the address (within the parent bus) that this device is to
- live. The address must be 2048 * sizeof(word) (8k in a 32bit
- simulation) aligned.
-
-
- interrupt-ranges = <int-number> <range> (optional)
-
- If present, this specifies the number of valid interrupt inputs (up
- to the maximum of 2048). By default, <<int-number>> is zero and
- range is determined by the <<reg>> size.
-
-
- EXAMPLES
-
-
- Enable tracing of the device:
-
- | -t glue-device \
-
-
- Create source, bitwize-and, and sink glue devices. Since the
- device at address <<0x10000>> is of size <<8>> it will have two
- output interrupt ports.
-
- | -o '/iobus@0xf0000000/glue@0x10000/reg 0x10000 8' \
- | -o '/iobus@0xf0000000/glue-and@0x20000/reg 0x20000 4' \
- | -o '/iobus@0xf0000000/glue-and/interrupt-ranges 0 2' \
- | -o '/iobus@0xf0000000/glue@0x30000/reg 0x30000 4' \
-
-
- Wire the two source interrupts to the AND device:
-
- | -o '/iobus@0xf0000000/glue@0x10000 > 0 0 /iobus/glue-and' \
- | -o '/iobus@0xf0000000/glue@0x10000 > 1 1 /iobus/glue-and' \
-
-
- Wire the AND device up to the sink so that the and's output is not
- left open.
-
- | -o '/iobus@0xf0000000/glue-and > 0 0 /iobus/glue@0x30000' \
-
-
- With the above configuration. The client program is able to
- compute a two bit AND. For instance the <<C>> stub below prints 1
- AND 0.
-
- | unsigned *input = (void*)0xf0010000;
- | unsigned *output = (void*)0xf0030000;
- | unsigned ans;
- | input[0] = htonl(1);
- | input[1] = htonl(0);
- | ans = ntohl(*output);
- | write_string("AND is ");
- | write_int(ans);
- | write_line();
-
-
- BUGS
-
-
- A future implementation of this device may support multiple
- interrupt ranges.
-
- Some of the devices listed may not yet be fully implemented.
-
- Additional devices such as a dff, an inverter or a latch may be
- useful.
-
- */
-
-
-enum {
- max_nr_interrupts = 2048,
-};
-
-typedef enum _hw_glue_type {
- glue_undefined = 0,
- glue_io,
- glue_and,
- glue_nand,
- glue_or,
- glue_xor,
- glue_nor,
- glue_not,
-} hw_glue_type;
-
-typedef struct _hw_glue_device {
- hw_glue_type type;
- int int_number;
- int *input;
- int nr_inputs;
- unsigned sizeof_input;
- /* our output registers */
- int space;
- unsigned_word address;
- unsigned sizeof_output;
- int *output;
- int nr_outputs;
-} hw_glue_device;
-
-
-static void
-hw_glue_init_address(device *me)
-{
- hw_glue_device *glue = (hw_glue_device*)device_data(me);
-
- /* attach to my parent */
- generic_device_init_address(me);
-
- /* establish the output registers */
- if (glue->output != NULL) {
- memset(glue->output, 0, glue->sizeof_output);
- }
- else {
- reg_property_spec unit;
- int reg_nr;
- /* find a relevant reg entry */
- reg_nr = 0;
- while (device_find_reg_array_property(me, "reg", reg_nr, &unit)
- && !device_size_to_attach_size(device_parent(me), &unit.size,
- &glue->sizeof_output, me))
- reg_nr++;
- /* check out the size */
- if (glue->sizeof_output == 0)
- device_error(me, "at least one reg property size must be nonzero");
- if (glue->sizeof_output % sizeof(unsigned_word) != 0)
- device_error(me, "reg property size must be %d aligned", sizeof(unsigned_word));
- /* and the address */
- device_address_to_attach_address(device_parent(me),
- &unit.address, &glue->space, &glue->address,
- me);
- if (glue->address % (sizeof(unsigned_word) * max_nr_interrupts) != 0)
- device_error(me, "reg property address must be %d aligned",
- sizeof(unsigned_word) * max_nr_interrupts);
- glue->nr_outputs = glue->sizeof_output / sizeof(unsigned_word);
- glue->output = zalloc(glue->sizeof_output);
- }
-
- /* establish the input interrupt ports */
- if (glue->input != NULL) {
- memset(glue->input, 0, glue->sizeof_input);
- }
- else {
- const device_property *ranges = device_find_property(me, "interrupt-ranges");
- if (ranges == NULL) {
- glue->int_number = 0;
- glue->nr_inputs = glue->nr_outputs;
- }
- else if (ranges->sizeof_array != sizeof(unsigned_cell) * 2) {
- device_error(me, "invalid interrupt-ranges property (incorrect size)");
- }
- else {
- const unsigned_cell *int_range = ranges->array;
- glue->int_number = BE2H_cell(int_range[0]);
- glue->nr_inputs = BE2H_cell(int_range[1]);
- }
- glue->sizeof_input = glue->nr_inputs * sizeof(unsigned);
- glue->input = zalloc(glue->sizeof_input);
- }
-
- /* determine our type */
- if (glue->type == glue_undefined) {
- const char *name = device_name(me);
- if (strcmp(name, "glue") == 0)
- glue->type = glue_io;
- else if (strcmp(name, "glue-and") == 0)
- glue->type = glue_and;
- else
- device_error(me, "unimplemented glue type");
- }
-
- DTRACE(glue, ("int-number %d, nr_inputs %d, nr_outputs %d\n",
- glue->int_number, glue->nr_inputs, glue->nr_outputs));
-}
-
-static unsigned
-hw_glue_io_read_buffer_callback(device *me,
- void *dest,
- int space,
- unsigned_word addr,
- unsigned nr_bytes,
- cpu *processor,
- unsigned_word cia)
-{
- hw_glue_device *glue = (hw_glue_device*)device_data(me);
- int reg = ((addr - glue->address) / sizeof(unsigned_word)) % glue->nr_outputs;
- if (nr_bytes != sizeof(unsigned_word)
- || (addr % sizeof(unsigned_word)) != 0)
- device_error(me, "missaligned read access (%d:0x%lx:%d) not supported",
- space, (unsigned long)addr, nr_bytes);
- *(unsigned_word*)dest = H2BE_4(glue->output[reg]);
- DTRACE(glue, ("read - interrupt %d (0x%lx), level %d\n",
- reg, (unsigned long) addr, glue->output[reg]));
- return nr_bytes;
-}
-
-
-static unsigned
-hw_glue_io_write_buffer_callback(device *me,
- const void *source,
- int space,
- unsigned_word addr,
- unsigned nr_bytes,
- cpu *processor,
- unsigned_word cia)
-{
- hw_glue_device *glue = (hw_glue_device*)device_data(me);
- int reg = ((addr - glue->address) / sizeof(unsigned_word)) % max_nr_interrupts;
- if (nr_bytes != sizeof(unsigned_word)
- || (addr % sizeof(unsigned_word)) != 0)
- device_error(me, "missaligned write access (%d:0x%lx:%d) not supported",
- space, (unsigned long)addr, nr_bytes);
- glue->output[reg] = H2BE_4(*(unsigned_word*)source);
- DTRACE(glue, ("write - interrupt %d (0x%lx), level %d\n",
- reg, (unsigned long) addr, glue->output[reg]));
- device_interrupt_event(me, reg, glue->output[reg], processor, cia);
- return nr_bytes;
-}
-
-static void
-hw_glue_interrupt_event(device *me,
- int my_port,
- device *source,
- int source_port,
- int level,
- cpu *processor,
- unsigned_word cia)
-{
- hw_glue_device *glue = (hw_glue_device*)device_data(me);
- int i;
- if (my_port < glue->int_number
- || my_port >= glue->int_number + glue->nr_inputs)
- device_error(me, "interrupt %d outside of valid range", my_port);
- glue->input[my_port - glue->int_number] = level;
- switch (glue->type) {
- case glue_io:
- {
- int port = my_port % glue->nr_outputs;
- glue->output[port] = level;
- DTRACE(glue, ("input - interrupt %d (0x%lx), level %d\n",
- my_port,
- (unsigned long)glue->address + port * sizeof(unsigned_word),
- level));
- break;
- }
- case glue_and:
- glue->output[0] = glue->input[0];
- for (i = 1; i < glue->nr_inputs; i++)
- glue->output[0] &= glue->input[i];
- DTRACE(glue, ("and - interrupt %d, level %d arrived - output %d\n",
- my_port, level, glue->output[0]));
- device_interrupt_event(me, 0, glue->output[0], processor, cia);
- break;
- default:
- device_error(me, "operator not implemented");
- break;
- }
-}
-
-
-static const device_interrupt_port_descriptor hw_glue_interrupt_ports[] = {
- { "int", 0, max_nr_interrupts },
- { NULL }
-};
-
-
-static device_callbacks const hw_glue_callbacks = {
- { hw_glue_init_address, NULL },
- { NULL, }, /* address */
- { hw_glue_io_read_buffer_callback,
- hw_glue_io_write_buffer_callback, },
- { NULL, }, /* DMA */
- { hw_glue_interrupt_event, NULL, hw_glue_interrupt_ports }, /* interrupt */
- { NULL, }, /* unit */
- NULL, /* instance */
-};
-
-
-static void *
-hw_glue_create(const char *name,
- const device_unit *unit_address,
- const char *args)
-{
- /* create the descriptor */
- hw_glue_device *glue = ZALLOC(hw_glue_device);
- return glue;
-}
-
-
-const device_descriptor hw_glue_device_descriptor[] = {
- { "glue", hw_glue_create, &hw_glue_callbacks },
- { "glue-and", hw_glue_create, &hw_glue_callbacks },
- { "glue-nand", hw_glue_create, &hw_glue_callbacks },
- { "glue-or", hw_glue_create, &hw_glue_callbacks },
- { "glue-xor", hw_glue_create, &hw_glue_callbacks },
- { "glue-nor", hw_glue_create, &hw_glue_callbacks },
- { "glue-not", hw_glue_create, &hw_glue_callbacks },
- { NULL },
-};
-
-#endif /* _HW_GLUE_C_ */
diff --git a/sim/ppc/hw_htab.c b/sim/ppc/hw_htab.c
deleted file mode 100644
index 35aa5711371..00000000000
--- a/sim/ppc/hw_htab.c
+++ /dev/null
@@ -1,683 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1996, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-#ifndef _HW_HTAB_C_
-#define _HW_HTAB_C_
-
-#include "device_table.h"
-
-#include "bfd.h"
-
-
-/* DEVICE
-
-
- htab - pseudo-device describing a PowerPC hash table
-
-
- DESCRIPTION
-
-
- During the initialization of the device tree, the pseudo-device
- <<htab>>, in conjunction with any child <<pte>> pseudo-devices,
- will create a PowerPC hash table in memory. The hash table values
- are written using dma transfers.
-
- The size and address of the hash table are determined by properties
- of the htab node.
-
- By convention, the htab device is made a child of the
- <</openprom/init>> node.
-
- By convention, the real address of the htab is used as the htab
- nodes unit address.
-
-
- PROPERTIES
-
-
- real-address = <address> (required)
-
- The physical address of the hash table. The PowerPC architecture
- places limitations on what is a valid hash table real-address.
-
-
- nr-bytes = <size> (required)
-
- The size of the hash table (in bytes) that is to be created at
- <<real-address>>. The PowerPC architecture places limitations on
- what is a valid hash table size.
-
-
- claim = <anything> (optional)
-
- If this property is present, the memory used to construct the hash
- table will be claimed from the memory device. The memory device
- being specified by the <</chosen/memory>> ihandle property.
-
-
- EXAMPLES
-
- Enable tracing.
-
- | $ psim -t htab-device \
-
-
- Create a htab specifying the base address and minimum size.
-
- | -o '/openprom/init/htab@0x10000/real-address 0x10000' \
- | -o '/openprom/init/htab@0x10000/claim 0' \
- | -o '/openprom/init/htab@0x10000/nr-bytes 65536' \
-
-
- BUGS
-
-
- See the <<pte>> device.
-
-
- */
-
-
-/* DEVICE
-
-
- pte - pseudo-device describing a htab entry
-
-
- DESCRIPTION
-
-
- The <<pte>> pseudo-device, which must be a child of a <<htabl>>
- node, describes a virtual to physical mapping that is to be entered
- into the parents hash table.
-
- Two alternative specifications of the mapping are allowed. Either
- a section of physical memory can be mapped to a virtual address, or
- the header of an executible image can be used to define the
- mapping.
-
- By convention, the real address of the map is specified as the pte
- devices unit address.
-
-
- PROPERTIES
-
-
- real-address = <address> (required)
-
- The starting physical address that is to be mapped by the hash
- table.
-
-
- wimg = <int> (required)
- pp = <int> (required)
-
- The value of hash table protection bits that are to be used when
- creating the virtual to physical address map.
-
-
- claim = <anything> (optional)
-
- If this property is present, the real memory that is being mapped by the
- hash table will be claimed from the memory node (specified by the
- ihandle <</chosen/memory>>).
-
-
- virtual-address = <integer> [ <integer> ] (option A)
- nr-bytes = <size> (option A)
-
- Option A - Virtual virtual address (and size) at which the physical
- address is to be mapped. If multiple values are specified for the
- virtual address then they are concatenated to gether to form a
- longer virtual address.
-
-
- file-name = <string> (option B)
-
- Option B - An executable image that is to be loaded (starting at
- the physical address specified above) and then mapped in using
- informatioin taken from the executables header. information found
- in the files header.
-
-
- EXAMPLES
-
-
- Enable tracing (note that both the <<htab>> and <<pte>> device use the
- same trace option).
-
- | -t htab-device \
-
-
- Map a block of physical memory into a specified virtual address:
-
- | -o '/openprom/init/htab/pte@0x0/real-address 0' \
- | -o '/openprom/init/htab/pte@0x0/nr-bytes 4096' \
- | -o '/openprom/init/htab/pte@0x0/virtual-address 0x1000000' \
- | -o '/openprom/init/htab/pte@0x0/claim 0' \
- | -o '/openprom/init/htab/pte@0x0/wimg 0x7' \
- | -o '/openprom/init/htab/pte@0x0/pp 0x2' \
-
-
- Map a file into memory.
-
- | -o '/openprom/init/htab/pte@0x10000/real-address 0x10000' \
- | -o '/openprom/init/htab/pte@0x10000/file-name "netbsd.elf' \
- | -o '/openprom/init/htab/pte@0x10000/wimg 0x7' \
- | -o '/openprom/init/htab/pte@0x10000/pp 0x2' \
-
-
- BUGS
-
-
- For an ELF executable, the header defines both the virtual and real
- address at which each file section should be loaded. At present, the
- real addresses that are specified in the header are ignored, the file
- instead being loaded in to physical memory in a linear fashion.
-
- When claiming memory, this device assumes that the #address-cells
- and #size-cells is one. For future implementations, this may not
- be the case.
-
- */
-
-
-
-static void
-htab_decode_hash_table(device *me,
- unsigned32 *htaborg,
- unsigned32 *htabmask)
-{
- unsigned_word htab_ra;
- unsigned htab_nr_bytes;
- unsigned n;
- device *parent = device_parent(me);
- /* determine the location/size of the hash table */
- if (parent == NULL
- || strcmp(device_name(parent), "htab") != 0)
- device_error(parent, "must be a htab device");
- htab_ra = device_find_integer_property(parent, "real-address");
- htab_nr_bytes = device_find_integer_property(parent, "nr-bytes");
- for (n = htab_nr_bytes; n > 1; n = n / 2) {
- if (n % 2 != 0)
- device_error(parent, "htab size 0x%x not a power of two",
- htab_nr_bytes);
- }
- *htaborg = htab_ra;
- *htabmask = MASKED32(htab_nr_bytes - 1, 7, 31-6);
- if ((htab_ra & INSERTED32(*htabmask, 7, 15)) != 0) {
- device_error(parent, "htaborg 0x%lx not aligned to htabmask 0x%lx",
- (unsigned long)*htaborg, (unsigned long)*htabmask);
- }
- DTRACE(htab, ("htab - htaborg=0x%lx htabmask=0x%lx\n",
- (unsigned long)*htaborg, (unsigned long)*htabmask));
-}
-
-static void
-htab_map_page(device *me,
- unsigned_word ra,
- unsigned64 va,
- unsigned wimg,
- unsigned pp,
- unsigned32 htaborg,
- unsigned32 htabmask)
-{
- /* keep everything left shifted so that the numbering is easier */
- unsigned64 vpn = va << 12;
- unsigned32 vsid = INSERTED32(EXTRACTED64(vpn, 0, 23), 0, 23);
- unsigned32 vpage = INSERTED32(EXTRACTED64(vpn, 24, 39), 0, 15);
- unsigned32 hash = INSERTED32(EXTRACTED32(vsid, 5, 23)
- ^ EXTRACTED32(vpage, 0, 15),
- 7, 31-6);
- int h;
- for (h = 0; h < 2; h++) {
- unsigned32 pteg = (htaborg | (hash & htabmask));
- int pti;
- for (pti = 0; pti < 8; pti++) {
- unsigned32 pte = pteg + 8 * pti;
- unsigned32 current_target_pte0;
- unsigned32 current_pte0;
- if (device_dma_read_buffer(device_parent(me),
- &current_target_pte0,
- 0, /*space*/
- pte,
- sizeof(current_target_pte0)) != 4)
- device_error(me, "failed to read a pte at 0x%lx", (unsigned long)pte);
- current_pte0 = T2H_4(current_target_pte0);
- if (MASKED32(current_pte0, 0, 0)) {
- /* full pte, check it isn't already mapping the same virtual
- address */
- unsigned32 curr_vsid = INSERTED32(EXTRACTED32(current_pte0, 1, 24), 0, 23);
- unsigned32 curr_api = INSERTED32(EXTRACTED32(current_pte0, 26, 31), 0, 5);
- unsigned32 curr_h = EXTRACTED32(current_pte0, 25, 25);
- if (curr_h == h
- && curr_vsid == vsid
- && curr_api == MASKED32(vpage, 0, 5))
- device_error(me, "duplicate map - va=0x%08lx ra=0x%lx vsid=0x%lx h=%d vpage=0x%lx hash=0x%lx pteg=0x%lx+%2d pte0=0x%lx",
- (unsigned long)va,
- (unsigned long)ra,
- (unsigned long)vsid,
- h,
- (unsigned long)vpage,
- (unsigned long)hash,
- (unsigned long)pteg,
- pti * 8,
- (unsigned long)current_pte0);
- }
- else {
- /* empty pte fill it */
- unsigned32 pte0 = (MASK32(0, 0)
- | INSERTED32(EXTRACTED32(vsid, 0, 23), 1, 24)
- | INSERTED32(h, 25, 25)
- | INSERTED32(EXTRACTED32(vpage, 0, 5), 26, 31));
- unsigned32 target_pte0 = H2T_4(pte0);
- unsigned32 pte1 = (INSERTED32(EXTRACTED32(ra, 0, 19), 0, 19)
- | INSERTED32(wimg, 25, 28)
- | INSERTED32(pp, 30, 31));
- unsigned32 target_pte1 = H2T_4(pte1);
- if (device_dma_write_buffer(device_parent(me),
- &target_pte0,
- 0, /*space*/
- pte,
- sizeof(target_pte0),
- 1/*ro?*/) != 4
- || device_dma_write_buffer(device_parent(me),
- &target_pte1,
- 0, /*space*/
- pte + 4,
- sizeof(target_pte1),
- 1/*ro?*/) != 4)
- device_error(me, "failed to write a pte a 0x%lx", (unsigned long)pte);
- DTRACE(htab, ("map - va=0x%08lx ra=0x%lx vsid=0x%lx h=%d vpage=0x%lx hash=0x%lx pteg=0x%lx+%2d pte0=0x%lx pte1=0x%lx\n",
- (unsigned long)va,
- (unsigned long)ra,
- (unsigned long)vsid,
- h,
- (unsigned long)vpage,
- (unsigned long)hash,
- (unsigned long)pteg,
- pti * 8,
- (unsigned long)pte0,
- (unsigned long)pte1));
- return;
- }
- }
- /* re-hash */
- hash = MASKED32(~hash, 0, 18);
- }
-}
-
-static unsigned_word
-claim_memory(device *me,
- device_instance *memory,
- unsigned_word ra,
- unsigned_word size)
-{
- unsigned32 args[3];
- unsigned32 results[1];
- int status;
- args[0] = 0; /* alignment */
- args[1] = size;
- args[2] = ra;
- status = device_instance_call_method(memory, "claim", 3, args, 1, results);
- if (status != 0)
- device_error(me, "failed to claim memory");
- return results[0];
-}
-
-static void
-htab_map_region(device *me,
- device_instance *memory,
- unsigned_word pte_ra,
- unsigned64 pte_va,
- unsigned nr_bytes,
- unsigned wimg,
- unsigned pp,
- unsigned32 htaborg,
- unsigned32 htabmask)
-{
- unsigned_word ra;
- unsigned64 va;
- /* claim the memory */
- if (memory != NULL)
- claim_memory(me, memory, pte_ra, nr_bytes);
- /* go through all pages and create a pte for each */
- for (ra = pte_ra, va = pte_va;
- ra < pte_ra + nr_bytes;
- ra += 0x1000, va += 0x1000) {
- htab_map_page(me, ra, va, wimg, pp, htaborg, htabmask);
- }
-}
-
-typedef struct _htab_binary_sizes {
- unsigned_word text_ra;
- unsigned_word text_base;
- unsigned_word text_bound;
- unsigned_word data_ra;
- unsigned_word data_base;
- unsigned data_bound;
- device *me;
-} htab_binary_sizes;
-
-static void
-htab_sum_binary(bfd *abfd,
- sec_ptr sec,
- PTR data)
-{
- htab_binary_sizes *sizes = (htab_binary_sizes*)data;
- unsigned_word size = bfd_get_section_size_before_reloc (sec);
- unsigned_word vma = bfd_get_section_vma (abfd, sec);
-#define bfd_get_section_lma(abfd, sec) ((sec)->lma + 0)
- unsigned_word ra = bfd_get_section_lma (abfd, sec);
-
- /* skip the section if no memory to allocate */
- if (! (bfd_get_section_flags(abfd, sec) & SEC_ALLOC))
- return;
-
- if ((bfd_get_section_flags (abfd, sec) & SEC_CODE)
- || (bfd_get_section_flags (abfd, sec) & SEC_READONLY)) {
- if (sizes->text_bound < vma + size)
- sizes->text_bound = ALIGN_PAGE(vma + size);
- if (sizes->text_base > vma)
- sizes->text_base = FLOOR_PAGE(vma);
- if (sizes->text_ra > ra)
- sizes->text_ra = FLOOR_PAGE(ra);
- }
- else if ((bfd_get_section_flags (abfd, sec) & SEC_DATA)
- || (bfd_get_section_flags (abfd, sec) & SEC_ALLOC)) {
- if (sizes->data_bound < vma + size)
- sizes->data_bound = ALIGN_PAGE(vma + size);
- if (sizes->data_base > vma)
- sizes->data_base = FLOOR_PAGE(vma);
- if (sizes->data_ra > ra)
- sizes->data_ra = FLOOR_PAGE(ra);
- }
-}
-
-static void
-htab_dma_binary(bfd *abfd,
- sec_ptr sec,
- PTR data)
-{
- htab_binary_sizes *sizes = (htab_binary_sizes*)data;
- void *section_init;
- unsigned_word section_vma;
- unsigned_word section_size;
- unsigned_word section_ra;
- device *me = sizes->me;
-
- /* skip the section if no memory to allocate */
- if (! (bfd_get_section_flags(abfd, sec) & SEC_ALLOC))
- return;
-
- /* check/ignore any sections of size zero */
- section_size = bfd_get_section_size_before_reloc(sec);
- if (section_size == 0)
- return;
-
- /* if nothing to load, ignore this one */
- if (! (bfd_get_section_flags(abfd, sec) & SEC_LOAD))
- return;
-
- /* find where it is to go */
- section_vma = bfd_get_section_vma(abfd, sec);
- section_ra = 0;
- if ((bfd_get_section_flags (abfd, sec) & SEC_CODE)
- || (bfd_get_section_flags (abfd, sec) & SEC_READONLY))
- section_ra = (section_vma - sizes->text_base + sizes->text_ra);
- else if ((bfd_get_section_flags (abfd, sec) & SEC_DATA))
- section_ra = (section_vma - sizes->data_base + sizes->data_ra);
- else
- return; /* just ignore it */
-
- DTRACE(htab,
- ("load - name=%-7s vma=0x%.8lx size=%6ld ra=0x%.8lx flags=%3lx(%s%s%s%s%s )\n",
- bfd_get_section_name(abfd, sec),
- (long)section_vma,
- (long)section_size,
- (long)section_ra,
- (long)bfd_get_section_flags(abfd, sec),
- bfd_get_section_flags(abfd, sec) & SEC_LOAD ? " LOAD" : "",
- bfd_get_section_flags(abfd, sec) & SEC_CODE ? " CODE" : "",
- bfd_get_section_flags(abfd, sec) & SEC_DATA ? " DATA" : "",
- bfd_get_section_flags(abfd, sec) & SEC_ALLOC ? " ALLOC" : "",
- bfd_get_section_flags(abfd, sec) & SEC_READONLY ? " READONLY" : ""
- ));
-
- /* dma in the sections data */
- section_init = zalloc(section_size);
- if (!bfd_get_section_contents(abfd,
- sec,
- section_init, 0,
- section_size)) {
- bfd_perror("devices/pte");
- device_error(me, "no data loaded");
- }
- if (device_dma_write_buffer(device_parent(me),
- section_init,
- 0 /*space*/,
- section_ra,
- section_size,
- 1 /*violate_read_only*/)
- != section_size)
- device_error(me, "broken dma transfer");
- zfree(section_init); /* only free if load */
-}
-
-/* create a memory map from a binaries virtual addresses to a copy of
- the binary laid out linearly in memory */
-
-static void
-htab_map_binary(device *me,
- device_instance *memory,
- unsigned_word ra,
- unsigned wimg,
- unsigned pp,
- const char *file_name,
- unsigned32 htaborg,
- unsigned32 htabmask)
-{
- htab_binary_sizes sizes;
- bfd *image;
- sizes.text_ra = -1;
- sizes.data_ra = -1;
- sizes.text_base = -1;
- sizes.data_base = -1;
- sizes.text_bound = 0;
- sizes.data_bound = 0;
- sizes.me = me;
-
- /* open the file */
- image = bfd_openr(file_name, NULL);
- if (image == NULL) {
- bfd_perror("devices/pte");
- device_error(me, "the file %s not loaded", file_name);
- }
-
- /* check it is valid */
- if (!bfd_check_format(image, bfd_object)) {
- bfd_close(image);
- device_error(me, "the file %s has an invalid binary format", file_name);
- }
-
- /* determine the size of each of the files regions */
- bfd_map_over_sections (image, htab_sum_binary, (PTR) &sizes);
-
- /* if needed, determine the real addresses of the sections */
- if (ra != -1) {
- sizes.text_ra = ra;
- sizes.data_ra = ALIGN_PAGE(sizes.text_ra +
- (sizes.text_bound - sizes.text_base));
- }
-
- DTRACE(htab, ("text map - base=0x%lx bound=0x%lx-1 ra=0x%lx\n",
- (unsigned long)sizes.text_base,
- (unsigned long)sizes.text_bound,
- (unsigned long)sizes.text_ra));
- DTRACE(htab, ("data map - base=0x%lx bound=0x%lx-1 ra=0x%lx\n",
- (unsigned long)sizes.data_base,
- (unsigned long)sizes.data_bound,
- (unsigned long)sizes.data_ra));
-
- /* check for and fix a botched image (text and data segments
- overlap) */
- if ((sizes.text_base <= sizes.data_base
- && sizes.text_bound >= sizes.data_bound)
- || (sizes.data_base <= sizes.text_base
- && sizes.data_bound >= sizes.data_bound)
- || (sizes.text_bound > sizes.data_base
- && sizes.text_bound <= sizes.data_bound)
- || (sizes.text_base >= sizes.data_base
- && sizes.text_base < sizes.data_bound)) {
- DTRACE(htab, ("text and data segment overlaped - using just data segment\n"));
- /* check va->ra linear */
- if ((sizes.text_base - sizes.text_ra)
- != (sizes.data_base - sizes.data_ra))
- device_error(me, "overlapping but missaligned text and data segments");
- /* enlarge the data segment */
- if (sizes.text_base < sizes.data_base)
- sizes.data_base = sizes.text_base;
- if (sizes.text_bound > sizes.data_bound)
- sizes.data_bound = sizes.text_bound;
- if (sizes.text_ra < sizes.data_ra)
- sizes.data_ra = sizes.text_ra;
- /* zap the text segment */
- sizes.text_base = 0;
- sizes.text_bound = 0;
- sizes.text_ra = 0;
- DTRACE(htab, ("common map - base=0x%lx bound=0x%lx-1 ra=0x%lx\n",
- (unsigned long)sizes.data_base,
- (unsigned long)sizes.data_bound,
- (unsigned long)sizes.data_ra));
- }
-
- /* set up virtual memory maps for each of the regions */
- htab_map_region(me, memory, sizes.text_ra, sizes.text_base,
- sizes.text_bound - sizes.text_base,
- wimg, pp,
- htaborg, htabmask);
-
- htab_map_region(me, memory, sizes.data_ra, sizes.data_base,
- sizes.data_bound - sizes.data_base,
- wimg, pp,
- htaborg, htabmask);
-
- /* dma the sections into physical memory */
- bfd_map_over_sections (image, htab_dma_binary, (PTR) &sizes);
-}
-
-static void
-htab_init_data_callback(device *me)
-{
- device_instance *memory = NULL;
- if (WITH_TARGET_WORD_BITSIZE != 32)
- device_error(me, "only 32bit targets currently suported");
-
- /* find memory device */
- if (device_find_property(me, "claim") != NULL)
- memory = tree_find_ihandle_property(me, "/chosen/memory");
-
- /* for the htab, just allocate space for it */
- if (strcmp(device_name(me), "htab") == 0) {
- unsigned_word address = device_find_integer_property(me, "real-address");
- unsigned_word length = device_find_integer_property(me, "nr-bytes");
- unsigned_word base = claim_memory(me, memory, address, length);
- if (base == -1 || base != address)
- device_error(me, "cannot allocate hash table");
- }
-
- /* for the pte, do all the real work */
- if (strcmp(device_name(me), "pte") == 0) {
- unsigned32 htaborg;
- unsigned32 htabmask;
-
- htab_decode_hash_table(me, &htaborg, &htabmask);
-
- if (device_find_property(me, "file-name") != NULL) {
- /* map in a binary */
- unsigned pte_wimg = device_find_integer_property(me, "wimg");
- unsigned pte_pp = device_find_integer_property(me, "pp");
- const char *file_name = device_find_string_property(me, "file-name");
- if (device_find_property(me, "real-address") != NULL) {
- unsigned32 pte_ra = device_find_integer_property(me, "real-address");
- DTRACE(htab, ("pte - ra=0x%lx, wimg=%ld, pp=%ld, file-name=%s\n",
- (unsigned long)pte_ra,
- (unsigned long)pte_wimg,
- (long)pte_pp,
- file_name));
- htab_map_binary(me, memory, pte_ra, pte_wimg, pte_pp, file_name,
- htaborg, htabmask);
- }
- else {
- DTRACE(htab, ("pte - wimg=%ld, pp=%ld, file-name=%s\n",
- (unsigned long)pte_wimg,
- (long)pte_pp,
- file_name));
- htab_map_binary(me, memory, -1, pte_wimg, pte_pp, file_name,
- htaborg, htabmask);
- }
- }
- else {
- /* handle a normal mapping definition */
- unsigned64 pte_va = 0;
- unsigned32 pte_ra = device_find_integer_property(me, "real-address");
- unsigned pte_nr_bytes = device_find_integer_property(me, "nr-bytes");
- unsigned pte_wimg = device_find_integer_property(me, "wimg");
- unsigned pte_pp = device_find_integer_property(me, "pp");
- signed_cell partial_va;
- int i;
- for (i = 0;
- device_find_integer_array_property(me, "virtual-address", i, &partial_va);
- i++) {
- pte_va = (pte_va << WITH_TARGET_WORD_BITSIZE) | (unsigned_cell)partial_va;
- }
- DTRACE(htab, ("pte - ra=0x%lx, wimg=%ld, pp=%ld, va=0x%lx, nr_bytes=%ld\n",
- (unsigned long)pte_ra,
- (long)pte_wimg,
- (long)pte_pp,
- (unsigned long)pte_va,
- (long)pte_nr_bytes));
- htab_map_region(me, memory, pte_ra, pte_va, pte_nr_bytes, pte_wimg, pte_pp,
- htaborg, htabmask);
- }
- }
-}
-
-
-static device_callbacks const htab_callbacks = {
- { NULL, htab_init_data_callback, },
- { NULL, }, /* address */
- { NULL, }, /* IO */
- { passthrough_device_dma_read_buffer,
- passthrough_device_dma_write_buffer, },
- { NULL, }, /* interrupt */
- { generic_device_unit_decode,
- generic_device_unit_encode, },
-};
-
-const device_descriptor hw_htab_device_descriptor[] = {
- { "htab", NULL, &htab_callbacks },
- { "pte", NULL, &htab_callbacks }, /* yep - uses htab's table */
- { NULL },
-};
-
-#endif /* _HW_HTAB_C_ */
diff --git a/sim/ppc/hw_ide.c b/sim/ppc/hw_ide.c
deleted file mode 100644
index 00d54b32e1e..00000000000
--- a/sim/ppc/hw_ide.c
+++ /dev/null
@@ -1,869 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1996, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-#ifndef _HW_IDE_C_
-#define _HW_IDE_C_
-
-#include "device_table.h"
-
-
-
-/* DEVICE
-
-
- ide - Integrated Disk Electronics
-
-
- DESCRIPTION
-
-
- This device models the primary/secondary <<ide>> controller
- described in the [CHRPIO] document.
-
- The controller has separate independant interrupt outputs for each
- <<ide>> bus.
-
-
- PROPERTIES
-
-
- reg = ... (required)
-
- The <<reg>> property is described in the document [CHRPIO].
-
-
- ready-delay = <integer> (optional)
-
- If present, this specifies the time that the <<ide>> device takes
- to complete an I/O operation.
-
-
- disk@?/ide-byte-count = <integer> (optional)
-
- disk@?/ide-sector-count = <integer> (optional)
-
- disk@?/ide-head-count = <integer> (optional)
-
- The <<ide>> device checks each child (disk device) node to see if
- it has the above properties. If present, these values will be used
- to compute the <<LBA>> address in <<CHS>> addressing mode.
-
-
- EXAMPLES
-
-
- Enable tracing:
-
- | -t ide-device \
-
-
- Attach the <<ide>> device to the <<pci>> bus at slot one. Specify
- legacy I/O addresses:
-
- | -o '/phb/ide@1/assigned-addresses \
- | ni0,0,10,1f0 8 \
- | ni0,0,14,3f8 8 \
- | ni0,0,18,170 8 \
- | ni0,0,1c,378 8 \
- | ni0,0,20,200 8' \
- | -o '/phb@0x80000000/ide@1/reg \
- | 1 0 \
- | i0,0,10,0 8 \
- | i0,0,18,0 8 \
- | i0,0,14,6 1 \
- | i0,0,1c,6 1 \
- | i0,0,20,0 8' \
-
- Note: the fouth and fifth reg entries specify that the register is
- at an offset into the address specified by the base register
- (<<assigned-addresses>>); Apart from restrictions placed by the
- <<pci>> specification, no restrictions are placed on the number of
- base registers specified by the <<assigned-addresses>> property.
-
- Attach a <<disk>> to the primary and a <<cdrom>> to the secondary
- <<ide>> controller.
-
- | -o '/phb@0x80000000/ide@1/disk@0/file "zero' \
- | -o '/phb@0x80000000/ide@1/cdrom@2/file "/dev/cdrom"' \
-
- Connect the two interrupt outputs (a and b) to a <<glue>> device to
- allow testing of the interrupt port. In a real simulation they
- would be wired to the interrupt controller.
-
- | -o '/phb@0x80000000/glue@2/reg 2 0 ni0,0,0,0 8' \
- | -o '/phb@0x80000000/ide@1 > a 0 /phb@0x80000000/glue@2' \
- | -o '/phb@0x80000000/ide@1 > b 1 /phb@0x80000000/glue@2'
-
-
- BUGS
-
-
- While the DMA registers are present, DMA support has not yet been
- implemented.
-
- The number of supported commands is very limited.
-
- The standards documents appear to be vague on how to specify the
- <<unit-address>> of disk devices devices being attached to the
- <<ide>> controller. I've chosen to use integers with devices zero
- and one going to the primary controller while two and three are
- connected to the secondary controller.
-
-
- REFERENCES
-
-
- [CHRPIO] PowerPC(tm) Microprocessor Common Hardware Reference
- Platform: I/O Device Reference. http://chrp.apple.com/???.
-
- [SCHMIDT] The SCSI Bus and IDE Interface - Protocols, Applications
- and Programming. Friedhelm Schmidt (translated by Michael
- Schultz). ISBN 0-201-42284-0. Addison-Wesley Publishing Company.
-
-
- */
-
-
-
-typedef enum _io_direction {
- is_read,
- is_write,
-} io_direction;
-
-
-enum {
- nr_ide_controllers = 2,
- nr_ide_drives_per_controller = 2,
- nr_fifo_entries = 8192,
-};
-
-enum {
- /* command register block - read */
- ide_data_reg,
- ide_error_reg, /*ide_feature_reg*/
- ide_sector_count_reg,
- ide_sector_number_reg,
- ide_cylinder_reg0,
- ide_cylinder_reg1,
- ide_drive_head_reg,
- ide_status_reg, /*ide_command_reg*/
- /* command register block - write */
- ide_feature_reg, /*ide_error_reg*/
- ide_command_reg, /*ide_status_reg*/
- /* control register block - read */
- ide_alternate_status_reg, /*ide_control_reg*/
- ide_control_reg, /*ide_alternate_status_reg*/
- /* dma register block */
- ide_dma_command_reg,
- ide_dma_unused_1_reg,
- ide_dma_status_reg,
- ide_dma_unused_3_reg,
- ide_dma_prd_table_address_reg0,
- ide_dma_prd_table_address_reg1,
- ide_dma_prd_table_address_reg2,
- ide_dma_prd_table_address_reg3,
- nr_ide_registers,
-};
-
-
-typedef enum _ide_states {
- idle_state,
- busy_loaded_state,
- busy_drained_state,
- busy_dma_state,
- busy_command_state,
- loading_state,
- draining_state,
-} ide_states;
-
-static const char *
-ide_state_name(ide_states state)
-{
- switch (state) {
- case idle_state: return "idle";
- case busy_loaded_state: return "busy_loaded_state";
- case busy_drained_state: return "busy_drained_state";
- case busy_dma_state: return "busy_dma_state";
- case busy_command_state: return "busy_command_state";
- case loading_state: return "loading_state";
- case draining_state: return "draining_state";
- default: return "illegal-state";
- }
-}
-
-typedef struct _ide_geometry {
- int head;
- int sector;
- int byte;
-} ide_geometry;
-
-typedef struct _ide_drive {
- int nr;
- device *device;
- ide_geometry geometry;
- ide_geometry default_geometry;
-} ide_drive;
-
-typedef struct _ide_controller {
- int nr;
- ide_states state;
- unsigned8 reg[nr_ide_registers];
- unsigned8 fifo[nr_fifo_entries];
- int fifo_pos;
- int fifo_size;
- ide_drive *current_drive;
- int current_byte;
- int current_transfer;
- ide_drive drive[nr_ide_drives_per_controller];
- device *me;
- event_entry_tag event_tag;
- int is_interrupting;
- signed64 ready_delay;
-} ide_controller;
-
-
-
-static void
-set_interrupt(device *me,
- ide_controller *controller)
-{
- if ((controller->reg[ide_control_reg] & 0x2) == 0) {
- DTRACE(ide, ("controller %d - interrupt set\n", controller->nr));
- device_interrupt_event(me, controller->nr, 1, NULL, 0);
- controller->is_interrupting = 1;
- }
-}
-
-
-static void
-clear_interrupt(device *me,
- ide_controller *controller)
-{
- if (controller->is_interrupting) {
- DTRACE(ide, ("controller %d - interrupt clear\n", controller->nr));
- device_interrupt_event(me, controller->nr, 0, NULL, 0);
- controller->is_interrupting = 0;
- }
-}
-
-
-static void
-do_event(void *data)
-{
- ide_controller *controller = data;
- device *me = controller->me;
- controller->event_tag = 0;
- switch (controller->state) {
- case busy_loaded_state:
- case busy_drained_state:
- if (controller->current_transfer > 0) {
- controller->state = (controller->state == busy_loaded_state
- ? loading_state : draining_state);
- }
- else {
- controller->state = idle_state;
- }
- set_interrupt(me, controller);
- break;
- default:
- device_error(me, "controller %d - unexpected event", controller->nr);
- break;
- }
-}
-
-
-static void
-schedule_ready_event(device *me,
- ide_controller *controller)
-{
- if (controller->event_tag != 0)
- device_error(me, "controller %d - attempting to schedule multiple events",
- controller->nr);
- controller->event_tag =
- device_event_queue_schedule(me, controller->ready_delay,
- do_event, controller);
-}
-
-
-static void
-do_fifo_read(device *me,
- ide_controller *controller,
- void *dest,
- int nr_bytes)
-{
- if (controller->state != draining_state)
- device_error(me, "controller %d - reading fifo when not ready (%s)",
- controller->nr,
- ide_state_name(controller->state));
- if (controller->fifo_pos + nr_bytes > controller->fifo_size)
- device_error(me, "controller %d - fifo underflow", controller->nr);
- if (nr_bytes > 0) {
- memcpy(dest, &controller->fifo[controller->fifo_pos], nr_bytes);
- controller->fifo_pos += nr_bytes;
- }
- if (controller->fifo_pos == controller->fifo_size) {
- controller->current_transfer -= 1;
- if (controller->current_transfer > 0
- && controller->current_drive != NULL) {
- DTRACE(ide, ("controller %d:%d - reading %d byte block at 0x%x\n",
- controller->nr,
- controller->current_drive->nr,
- controller->fifo_size,
- controller->current_byte));
- if (device_io_read_buffer(controller->current_drive->device,
- controller->fifo,
- 0, controller->current_byte,
- controller->fifo_size,
- NULL, 0)
- != controller->fifo_size)
- device_error(me, "controller %d - disk %s io read error",
- controller->nr,
- device_path(controller->current_drive->device));
- }
- controller->state = busy_drained_state;
- controller->fifo_pos = 0;
- controller->current_byte += controller->fifo_size;
- schedule_ready_event(me, controller);
- }
-}
-
-
-static void
-do_fifo_write(device *me,
- ide_controller *controller,
- const void *source,
- int nr_bytes)
-{
- if (controller->state != loading_state)
- device_error(me, "controller %d - writing fifo when not ready (%s)",
- controller->nr,
- ide_state_name(controller->state));
- if (controller->fifo_pos + nr_bytes > controller->fifo_size)
- device_error(me, "controller %d - fifo overflow", controller->nr);
- if (nr_bytes > 0) {
- memcpy(&controller->fifo[controller->fifo_pos], source, nr_bytes);
- controller->fifo_pos += nr_bytes;
- }
- if (controller->fifo_pos == controller->fifo_size) {
- if (controller->current_transfer > 0
- && controller->current_drive != NULL) {
- DTRACE(ide, ("controller %d:%d - writing %d byte block at 0x%x\n",
- controller->nr,
- controller->current_drive->nr,
- controller->fifo_size,
- controller->current_byte));
- if (device_io_write_buffer(controller->current_drive->device,
- controller->fifo,
- 0, controller->current_byte,
- controller->fifo_size,
- NULL, 0)
- != controller->fifo_size)
- device_error(me, "controller %d - disk %s io write error",
- controller->nr,
- device_path(controller->current_drive->device));
- }
- controller->current_transfer -= 1;
- controller->fifo_pos = 0;
- controller->current_byte += controller->fifo_size;
- controller->state = busy_loaded_state;
- schedule_ready_event(me, controller);
- }
-}
-
-
-static void
-setup_fifo(device *me,
- ide_controller *controller,
- int is_simple,
- int is_with_disk,
- io_direction direction)
-{
- /* find the disk */
- if (is_with_disk) {
- int drive_nr = (controller->reg[ide_drive_head_reg] & 0x10) != 0;
- controller->current_drive = &controller->drive[drive_nr];
- }
- else {
- controller->current_drive = NULL;
- }
-
- /* number of transfers */
- if (is_simple)
- controller->current_transfer = 1;
- else {
- int sector_count = controller->reg[ide_sector_count_reg];
- if (sector_count == 0)
- controller->current_transfer = 256;
- else
- controller->current_transfer = sector_count;
- }
-
- /* the transfer size */
- if (controller->current_drive == NULL)
- controller->fifo_size = 512;
- else
- controller->fifo_size = controller->current_drive->geometry.byte;
-
- /* empty the fifo */
- controller->fifo_pos = 0;
-
- /* the starting address */
- if (controller->current_drive == NULL)
- controller->current_byte = 0;
- else if (controller->reg[ide_drive_head_reg] & 0x40) {
- /* LBA addressing mode */
- controller->current_byte = controller->fifo_size
- * (((controller->reg[ide_drive_head_reg] & 0xf) << 24)
- | (controller->reg[ide_cylinder_reg1] << 16)
- | (controller->reg[ide_cylinder_reg0] << 8)
- | (controller->reg[ide_sector_number_reg]));
- }
- else if (controller->current_drive->geometry.head != 0
- && controller->current_drive->geometry.sector != 0) {
- /* CHS addressing mode */
- int head_nr = controller->reg[ide_drive_head_reg] & 0xf;
- int cylinder_nr = ((controller->reg[ide_cylinder_reg1] << 8)
- | controller->reg[ide_cylinder_reg0]);
- int sector_nr = controller->reg[ide_sector_number_reg];
- controller->current_byte = controller->fifo_size
- * ((cylinder_nr * controller->current_drive->geometry.head + head_nr)
- * controller->current_drive->geometry.sector + sector_nr - 1);
- }
- else
- device_error(me, "controller %d:%d - CHS addressing disabled",
- controller->nr, controller->current_drive->nr);
- DTRACE(ide, ("controller %ld:%ld - transfer (%s) %ld blocks of %ld bytes from 0x%lx\n",
- (long)controller->nr,
- controller->current_drive == NULL ? -1L : (long)controller->current_drive->nr,
- direction == is_read ? "read" : "write",
- (long)controller->current_transfer,
- (long)controller->fifo_size,
- (unsigned long)controller->current_byte));
- switch (direction) {
- case is_read:
- /* force a primeing read */
- controller->current_transfer += 1;
- controller->state = draining_state;
- controller->fifo_pos = controller->fifo_size;
- do_fifo_read(me, controller, NULL, 0);
- break;
- case is_write:
- controller->state = loading_state;
- break;
- }
-}
-
-
-static void
-do_command(device *me,
- ide_controller *controller,
- int command)
-{
- if (controller->state != idle_state)
- device_error(me, "controller %d - command when not idle", controller->nr);
- switch (command) {
- case 0x20: case 0x21: /* read-sectors */
- setup_fifo(me, controller, 0/*is_simple*/, 1/*is_with_disk*/, is_read);
- break;
- case 0x30: case 0x31: /* write */
- setup_fifo(me, controller, 0/*is_simple*/, 1/*is_with_disk*/, is_write);
- break;
- }
-}
-
-static unsigned8
-get_status(device *me,
- ide_controller *controller)
-{
- switch (controller->state) {
- case loading_state:
- case draining_state:
- return 0x08; /* data req */
- case busy_loaded_state:
- case busy_drained_state:
- return 0x80; /* busy */
- case idle_state:
- return 0x40; /* drive ready */
- default:
- device_error(me, "internal error");
- return 0;
- }
-}
-
-
-/* The address presented to the IDE controler is decoded and then
- mapped onto a controller:reg pair */
-
-enum {
- nr_address_blocks = 6,
-};
-
-typedef struct _address_block {
- int space;
- unsigned_word base_addr;
- unsigned_word bound_addr;
- int controller;
- int base_reg;
-} address_block;
-
-typedef struct _address_decoder {
- address_block block[nr_address_blocks];
-} address_decoder;
-
-static void
-decode_address(device *me,
- address_decoder *decoder,
- int space,
- unsigned_word address,
- int *controller,
- int *reg,
- io_direction direction)
-{
- int i;
- for (i = 0; i < nr_address_blocks; i++) {
- if (space == decoder->block[i].space
- && address >= decoder->block[i].base_addr
- && address <= decoder->block[i].bound_addr) {
- *controller = decoder->block[i].controller;
- *reg = (address
- - decoder->block[i].base_addr
- + decoder->block[i].base_reg);
- if (direction == is_write) {
- switch (*reg) {
- case ide_error_reg: *reg = ide_feature_reg; break;
- case ide_status_reg: *reg = ide_command_reg; break;
- case ide_alternate_status_reg: *reg = ide_control_reg; break;
- default: break;
- }
- }
- return;
- }
- }
- device_error(me, "address %d:0x%lx invalid",
- space, (unsigned long)address);
-}
-
-
-static void
-build_address_decoder(device *me,
- address_decoder *decoder)
-{
- int reg;
- for (reg = 1; reg < 6; reg++) {
- reg_property_spec unit;
- int space;
- unsigned_word address;
- unsigned size;
- /* find and decode the reg property */
- if (!device_find_reg_array_property(me, "reg", reg, &unit))
- device_error(me, "missing or invalid reg entry %d", reg);
- device_address_to_attach_address(device_parent(me), &unit.address,
- &space, &address, me);
- device_size_to_attach_size(device_parent(me), &unit.size, &size, me);
- /* insert it into the address decoder */
- switch (reg) {
- case 1:
- case 2:
- /* command register block */
- if (size != 8)
- device_error(me, "reg entry %d must have a size of 8", reg);
- decoder->block[reg-1].space = space;
- decoder->block[reg-1].base_addr = address;
- decoder->block[reg-1].bound_addr = address + size - 1;
- decoder->block[reg-1].controller = (reg + 1) % nr_ide_controllers;
- decoder->block[reg-1].base_reg = ide_data_reg;
- DTRACE(ide, ("controller %d command register block at %d:0x%lx..0x%lx\n",
- decoder->block[reg-1].controller,
- decoder->block[reg-1].space,
- (unsigned long)decoder->block[reg-1].base_addr,
- (unsigned long)decoder->block[reg-1].bound_addr));
- break;
- case 3:
- case 4:
- /* control register block */
- if (size != 1)
- device_error(me, "reg entry %d must have a size of 1", reg);
- decoder->block[reg-1].space = space;
- decoder->block[reg-1].base_addr = address;
- decoder->block[reg-1].bound_addr = address + size - 1;
- decoder->block[reg-1].controller = (reg + 1) % nr_ide_controllers;
- decoder->block[reg-1].base_reg = ide_alternate_status_reg;
- DTRACE(ide, ("controller %d control register block at %d:0x%lx..0x%lx\n",
- decoder->block[reg-1].controller,
- decoder->block[reg-1].space,
- (unsigned long)decoder->block[reg-1].base_addr,
- (unsigned long)decoder->block[reg-1].bound_addr));
- break;
- case 5:
- /* dma register block */
- if (size != 8)
- device_error(me, "reg entry %d must have a size of 8", reg);
- decoder->block[reg-1].space = space;
- decoder->block[reg-1].base_addr = address;
- decoder->block[reg-1].bound_addr = address + 4 - 1;
- decoder->block[reg-1].base_reg = ide_dma_command_reg;
- decoder->block[reg-1].controller = 0;
- DTRACE(ide, ("controller %d dma register block at %d:0x%lx..0x%lx\n",
- decoder->block[reg-1].controller,
- decoder->block[reg-1].space,
- (unsigned long)decoder->block[reg-1].base_addr,
- (unsigned long)decoder->block[reg-1].bound_addr));
- decoder->block[reg].space = space;
- decoder->block[reg].base_addr = address + 4;
- decoder->block[reg].bound_addr = address + 8 - 1;
- decoder->block[reg].controller = 1;
- decoder->block[reg].base_reg = ide_dma_command_reg;
- DTRACE(ide, ("controller %d dma register block at %d:0x%lx..0x%lx\n",
- decoder->block[reg].controller,
- decoder->block[reg-1].space,
- (unsigned long)decoder->block[reg].base_addr,
- (unsigned long)decoder->block[reg].bound_addr));
- break;
- default:
- device_error(me, "internal error - bad switch");
- break;
- }
- }
-}
-
-
-
-typedef struct _hw_ide_device {
- ide_controller controller[nr_ide_controllers];
- address_decoder decoder;
-} hw_ide_device;
-
-
-static void
-hw_ide_init_address(device *me)
-{
- hw_ide_device *ide = device_data(me);
- int controller;
- int drive;
-
- /* zero some things */
- for (controller = 0; controller < nr_ide_controllers; controller++) {
- memset(&ide->controller[controller], 0, sizeof(ide_controller));
- for (drive = 0; drive < nr_ide_drives_per_controller; drive++) {
- ide->controller[controller].drive[drive].nr = drive;
- }
- ide->controller[controller].me = me;
- if (device_find_property(me, "ready-delay") != NULL)
- ide->controller[controller].ready_delay =
- device_find_integer_property(me, "ready-delay");
- }
-
- /* attach this device to its parent */
- generic_device_init_address(me);
-
- /* determine our own address map */
- build_address_decoder(me, &ide->decoder);
-
-}
-
-
-static void
-hw_ide_attach_address(device *me,
- attach_type type,
- int space,
- unsigned_word addr,
- unsigned nr_bytes,
- access_type access,
- device *client) /*callback/default*/
-{
- hw_ide_device *ide = (hw_ide_device*)device_data(me);
- int controller_nr = addr / nr_ide_drives_per_controller;
- int drive_nr = addr % nr_ide_drives_per_controller;
- ide_controller *controller;
- ide_drive *drive;
- if (controller_nr >= nr_ide_controllers)
- device_error(me, "no controller for disk %s",
- device_path(client));
-
- controller = &ide->controller[controller_nr];
- drive = &controller->drive[drive_nr];
- drive->device = client;
- if (device_find_property(client, "ide-byte-count") != NULL)
- drive->geometry.byte = device_find_integer_property(client, "ide-byte-count");
- else
- drive->geometry.byte = 512;
- if (device_find_property(client, "ide-sector-count") != NULL)
- drive->geometry.sector = device_find_integer_property(client, "ide-sector-count");
- if (device_find_property(client, "ide-head-count") != NULL)
- drive->geometry.head = device_find_integer_property(client, "ide-head-count");
- drive->default_geometry = drive->geometry;
- DTRACE(ide, ("controller %d:%d %s byte-count %d, sector-count %d, head-count %d\n",
- controller_nr,
- drive->nr,
- device_path(client),
- drive->geometry.byte,
- drive->geometry.sector,
- drive->geometry.head));
-}
-
-
-static unsigned
-hw_ide_io_read_buffer(device *me,
- void *dest,
- int space,
- unsigned_word addr,
- unsigned nr_bytes,
- cpu *processor,
- unsigned_word cia)
-{
- hw_ide_device *ide = (hw_ide_device *)device_data(me);
- int control_nr;
- int reg;
- ide_controller *controller;
-
- /* find the interface */
- decode_address(me, &ide->decoder, space, addr, &control_nr, &reg, is_read);
- controller = & ide->controller[control_nr];
-
- /* process the transfer */
- memset(dest, 0, nr_bytes);
- switch (reg) {
- case ide_data_reg:
- do_fifo_read(me, controller, dest, nr_bytes);
- break;
- case ide_status_reg:
- *(unsigned8*)dest = get_status(me, controller);
- clear_interrupt(me, controller);
- break;
- case ide_alternate_status_reg:
- *(unsigned8*)dest = get_status(me, controller);
- break;
- case ide_error_reg:
- case ide_sector_count_reg:
- case ide_sector_number_reg:
- case ide_cylinder_reg0:
- case ide_cylinder_reg1:
- case ide_drive_head_reg:
- case ide_control_reg:
- case ide_dma_command_reg:
- case ide_dma_status_reg:
- case ide_dma_prd_table_address_reg0:
- case ide_dma_prd_table_address_reg1:
- case ide_dma_prd_table_address_reg2:
- case ide_dma_prd_table_address_reg3:
- *(unsigned8*)dest = controller->reg[reg];
- break;
- default:
- device_error(me, "bus-error at address 0x%lx", addr);
- break;
- }
- return nr_bytes;
-}
-
-
-static unsigned
-hw_ide_io_write_buffer(device *me,
- const void *source,
- int space,
- unsigned_word addr,
- unsigned nr_bytes,
- cpu *processor,
- unsigned_word cia)
-{
- hw_ide_device *ide = (hw_ide_device *)device_data(me);
- int control_nr;
- int reg;
- ide_controller *controller;
-
- /* find the interface */
- decode_address(me, &ide->decoder, space, addr, &control_nr, &reg, is_write);
- controller = &ide->controller[control_nr];
-
- /* process the access */
- switch (reg) {
- case ide_data_reg:
- do_fifo_write(me, controller, source, nr_bytes);
- break;
- case ide_command_reg:
- do_command(me, controller, *(unsigned8*)source);
- break;
- case ide_control_reg:
- controller->reg[reg] = *(unsigned8*)source;
- /* possibly cancel interrupts */
- if ((controller->reg[reg] & 0x02) == 0x02)
- clear_interrupt(me, controller);
- break;
- case ide_feature_reg:
- case ide_sector_count_reg:
- case ide_sector_number_reg:
- case ide_cylinder_reg0:
- case ide_cylinder_reg1:
- case ide_drive_head_reg:
- case ide_dma_command_reg:
- case ide_dma_status_reg:
- case ide_dma_prd_table_address_reg0:
- case ide_dma_prd_table_address_reg1:
- case ide_dma_prd_table_address_reg2:
- case ide_dma_prd_table_address_reg3:
- controller->reg[reg] = *(unsigned8*)source;
- break;
- default:
- device_error(me, "bus-error at 0x%lx", addr);
- break;
- }
- return nr_bytes;
-}
-
-
-static const device_interrupt_port_descriptor hw_ide_interrupt_ports[] = {
- { "a", 0, 0 },
- { "b", 1, 0 },
- { "c", 2, 0 },
- { "d", 3, 0 },
- { NULL }
-};
-
-
-
-static device_callbacks const hw_ide_callbacks = {
- { hw_ide_init_address, },
- { hw_ide_attach_address, }, /* attach */
- { hw_ide_io_read_buffer, hw_ide_io_write_buffer, },
- { NULL, }, /* DMA */
- { NULL, NULL, hw_ide_interrupt_ports }, /* interrupt */
- { generic_device_unit_decode,
- generic_device_unit_encode,
- generic_device_address_to_attach_address,
- generic_device_size_to_attach_size },
-};
-
-
-static void *
-hw_ide_create(const char *name,
- const device_unit *unit_address,
- const char *args)
-{
- hw_ide_device *ide = ZALLOC(hw_ide_device);
- return ide;
-}
-
-
-const device_descriptor hw_ide_device_descriptor[] = {
- { "ide", hw_ide_create, &hw_ide_callbacks },
- { NULL, },
-};
-
-#endif /* _HW_IDE_ */
diff --git a/sim/ppc/hw_init.c b/sim/ppc/hw_init.c
deleted file mode 100644
index 86e753c608a..00000000000
--- a/sim/ppc/hw_init.c
+++ /dev/null
@@ -1,721 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1997, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-#ifndef _HW_INIT_C_
-#define _HW_INIT_C_
-
-#include "device_table.h"
-#include "bfd.h"
-#include "psim.h"
-
-
-/* DMA a file into memory */
-static int
-dma_file(device *me,
- const char *file_name,
- unsigned_word addr)
-{
- int count;
- int inc;
- FILE *image;
- char buf[1024];
-
- /* get it open */
- image = fopen(file_name, "r");
- if (image == NULL)
- return -1;
-
- /* read it in slowly */
- count = 0;
- while (1) {
- inc = fread(buf, 1, sizeof(buf), image);
- if (inc <= 0)
- break;
- if (device_dma_write_buffer(device_parent(me),
- buf,
- 0 /*address-space*/,
- addr+count,
- inc /*nr-bytes*/,
- 1 /*violate ro*/) != inc) {
- fclose(image);
- return -1;
- }
- count += inc;
- }
-
- /* close down again */
- fclose(image);
-
- return count;
-}
-
-
-/* DEVICE
-
- file - load a file into memory
-
- DESCRIPTION
-
- Loads the entire contents of <file-name> into memory at starting at
- <<real-address>>. Assumes that memory exists for the load.
-
- PROPERTIES
-
- file-name = <string>
-
- Name of the file to be loaded into memory
-
- real-address = <integer>
-
- Real address at which the file is to be loaded */
-
-static void
-hw_file_init_data_callback(device *me)
-{
- int count;
- const char *file_name = device_find_string_property(me, "file-name");
- unsigned_word addr = device_find_integer_property(me, "real-address");
- /* load the file */
- count = dma_file(me, file_name, addr);
- if (count < 0)
- device_error(me, "Problem loading file %s\n", file_name);
-}
-
-
-static device_callbacks const hw_file_callbacks = {
- { NULL, hw_file_init_data_callback, },
- { NULL, }, /* address */
- { NULL, }, /* IO */
- { NULL, }, /* DMA */
- { NULL, }, /* interrupt */
- { NULL, }, /* unit */
-};
-
-
-/* DEVICE
-
-
- data - initialize a memory location with specified data
-
-
- DESCRIPTION
-
-
- The pseudo device <<data>> provides a mechanism specifying the
- initialization of a small section of memory.
-
- Normally, the data would be written using a dma operation.
- However, for some addresses this will not result in the desired
- result. For instance, to initialize an address in an eeprom,
- instead of a simple dma of the data, a sequence of writes (and then
- real delays) that program the eeprom would be required.
-
- For dma write initialization, the data device will write the
- specified <<data>> to <<real-address>> using a normal dma.
-
- For instance write initialization, the specified <<instance>> is
- opened. Then a seek to the <<real-address>> is performed followed
- by a write of the data.
-
-
- Integer properties are stored using the target's endian mode.
-
-
- PROPERTIES
-
-
- data = <any-valid-property> (required)
-
- Data to be loaded into memory. The property type determines how it
- is loaded.
-
-
- real-address = <integer> (required)
-
- Start address at which the data is to be stored.
-
-
- instance = <string> (optional)
-
- Instance specification of the device that is to be opened so that
- the specified data can be written to it.
-
-
- EXAMPLES
-
-
- The examples below illustrate the two alternative mechanisms that
- can be used to store the value 0x12345678 at address 0xfff00c00,
- which is normally part of the 512k system eeprom.
-
-
- If the eeprom is being modeled by ram (<<memory>> device) then the
- standard dma initialization can be used. By convention: the data
- devices are uniquely identified by argumenting them with the
- destinations real address; and all data devices are put under the
- node <</openprom/init>>.
-
- | /openprom/memory@0xfff00000/reg 0xfff00000 0x80000
- | /openprom/init/data@0x1000/data 0x12345678
- | /openprom/init/data@0x1000/real-address 0x1000
-
-
- If instead a real eeprom was being used the instance write method
- would instead need to be used (storing just a single byte in an
- eeprom requires a complex sequence of accesses). The
- <<real-address>> is specified as <<0x0c00>> which is the offset
- into the eeprom. For brevity, most of the eeprom properties have
- been omited.
-
- | /iobus/eeprom@0xfff00000/reg 0xfff00000 0x80000
- | /openprom/init/data@0xfff00c00/real-address 0x0c00
- | /openprom/init/data@0xfff00c00/data 0x12345667
- | /openprom/init/data@0xfff00c00/instance /iobus/eeprom@0xfff00000/reg
-
-
- BUGS
-
-
- At present, only <<integer>> properties can be specified for an
- initial data value.
-
- */
-
-
-static void
-hw_data_init_data_callback(device *me)
-{
- unsigned_word addr = device_find_integer_property(me, "real-address");
- const device_property *data = device_find_property(me, "data");
- const char *instance_spec = (device_find_property(me, "instance") != NULL
- ? device_find_string_property(me, "instance")
- : NULL);
- device_instance *instance = NULL;
- if (data == NULL)
- device_error(me, "missing property <data>\n");
- if (instance_spec != NULL)
- instance = tree_instance(me, instance_spec);
- switch (data->type) {
- case integer_property:
- {
- unsigned_cell buf = device_find_integer_property(me, "data");
- H2T(buf);
- if (instance == NULL) {
- if (device_dma_write_buffer(device_parent(me),
- &buf,
- 0 /*address-space*/,
- addr,
- sizeof(buf), /*nr-bytes*/
- 1 /*violate ro*/) != sizeof(buf))
- device_error(me, "Problem storing integer 0x%x at 0x%lx\n",
- (unsigned)buf, (unsigned long)addr);
- }
- else {
- if (device_instance_seek(instance, 0, addr) < 0
- || device_instance_write(instance, &buf, sizeof(buf)) != sizeof(buf))
- device_error(me, "Problem storing integer 0x%x at 0x%lx of instance %s\n",
- (unsigned)buf, (unsigned long)addr, instance_spec);
- }
- }
- break;
- default:
- device_error(me, "Write of this data is not yet implemented\n");
- break;
- }
- if (instance != NULL)
- device_instance_delete(instance);
-}
-
-
-static device_callbacks const hw_data_callbacks = {
- { NULL, hw_data_init_data_callback, },
- { NULL, }, /* address */
- { NULL, }, /* IO */
- { NULL, }, /* DMA */
- { NULL, }, /* interrupt */
- { NULL, }, /* unit */
-};
-
-
-/* DEVICE
-
-
- load-binary - load binary segments into memory
-
-
- DESCRIPTION
-
- Each loadable segment of the specified binary is loaded into memory
- at its required address. It is assumed that the memory at those
- addresses already exists.
-
- This device is normally used to load an executable into memory as
- part of real mode simulation.
-
-
- PROPERTIES
-
-
- file-name = <string>
-
- Name of the binary to be loaded.
-
-
- claim = <anything> (optional)
-
- If this property is present, the real memory that is to be used by
- the image being loaded will be claimed from the memory node
- (specified by the ihandle <</chosen/memory>>).
-
-
- BUGS
-
-
- When loading the binary the bfd virtual-address is used. It should
- be using the bfd load-address.
-
- */
-
-/* DEVICE
-
- map-binary - map the binary into the users address space
-
- DESCRIPTION
-
- Similar to load-binary except that memory for each segment is
- created before the corresponding data for the segment is loaded.
-
- This device is normally used to load an executable into a user mode
- simulation.
-
- PROPERTIES
-
- file-name = <string>
-
- Name of the binary to be loaded.
-
- */
-
-static void
-update_for_binary_section(bfd *abfd,
- asection *the_section,
- PTR obj)
-{
- unsigned_word section_vma;
- unsigned_word section_size;
- access_type access;
- device *me = (device*)obj;
-
- /* skip the section if no memory to allocate */
- if (! (bfd_get_section_flags(abfd, the_section) & SEC_ALLOC))
- return;
-
- /* check/ignore any sections of size zero */
- section_size = bfd_get_section_size_before_reloc(the_section);
- if (section_size == 0)
- return;
-
- /* find where it is to go */
- section_vma = bfd_get_section_vma(abfd, the_section);
-
- DTRACE(binary,
- ("name=%-7s, vma=0x%.8lx, size=%6ld, flags=%3lx(%s%s%s%s%s )\n",
- bfd_get_section_name(abfd, the_section),
- (long)section_vma,
- (long)section_size,
- (long)bfd_get_section_flags(abfd, the_section),
- bfd_get_section_flags(abfd, the_section) & SEC_LOAD ? " LOAD" : "",
- bfd_get_section_flags(abfd, the_section) & SEC_CODE ? " CODE" : "",
- bfd_get_section_flags(abfd, the_section) & SEC_DATA ? " DATA" : "",
- bfd_get_section_flags(abfd, the_section) & SEC_ALLOC ? " ALLOC" : "",
- bfd_get_section_flags(abfd, the_section) & SEC_READONLY ? " READONLY" : ""
- ));
-
- /* If there is an .interp section, it means it needs a shared library interpreter. */
- if (strcmp(".interp", bfd_get_section_name(abfd, the_section)) == 0)
- error("Shared libraries are not yet supported.\n");
-
- /* determine the devices access */
- access = access_read;
- if (bfd_get_section_flags(abfd, the_section) & SEC_CODE)
- access |= access_exec;
- if (!(bfd_get_section_flags(abfd, the_section) & SEC_READONLY))
- access |= access_write;
-
- /* if claim specified, allocate region from the memory device */
- if (device_find_property(me, "claim") != NULL) {
- device_instance *memory = tree_find_ihandle_property(me, "/chosen/memory");
- unsigned_cell mem_in[3];
- unsigned_cell mem_out[1];
- mem_in[0] = 0; /*alignment - top-of-stack*/
- mem_in[1] = section_size;
- mem_in[2] = section_vma;
- if (device_instance_call_method(memory, "claim", 3, mem_in, 1, mem_out) < 0)
- device_error(me, "failed to claim memory for section at 0x%lx (0x%lx",
- section_vma,
- section_size);
- if (mem_out[0] != section_vma)
- device_error(me, "section address not as requested");
- }
-
- /* if a map, pass up a request to create the memory in core */
- if (strncmp(device_name(me), "map-binary", strlen("map-binary")) == 0)
- device_attach_address(device_parent(me),
- attach_raw_memory,
- 0 /*address space*/,
- section_vma,
- section_size,
- access,
- me);
-
- /* if a load dma in the required data */
- if (bfd_get_section_flags(abfd, the_section) & SEC_LOAD) {
- void *section_init = zalloc(section_size);
- if (!bfd_get_section_contents(abfd,
- the_section,
- section_init, 0,
- section_size)) {
- bfd_perror("binary");
- device_error(me, "load of data failed");
- return;
- }
- if (device_dma_write_buffer(device_parent(me),
- section_init,
- 0 /*space*/,
- section_vma,
- section_size,
- 1 /*violate_read_only*/)
- != section_size)
- device_error(me, "broken transfer\n");
- zfree(section_init); /* only free if load */
- }
-}
-
-static void
-hw_binary_init_data_callback(device *me)
-{
- /* get the file name */
- const char *file_name = device_find_string_property(me, "file-name");
- bfd *image;
-
- /* open the file */
- image = bfd_openr(file_name, NULL);
- if (image == NULL) {
- bfd_perror("binary");
- device_error(me, "Failed to open file %s\n", file_name);
- }
-
- /* check it is valid */
- if (!bfd_check_format(image, bfd_object)) {
- bfd_close(image);
- device_error(me, "The file %s has an invalid binary format\n", file_name);
- }
-
- /* and the data sections */
- bfd_map_over_sections(image,
- update_for_binary_section,
- (PTR)me);
-
- bfd_close(image);
-}
-
-
-static device_callbacks const hw_binary_callbacks = {
- { NULL, hw_binary_init_data_callback, },
- { NULL, }, /* address */
- { NULL, }, /* IO */
- { NULL, }, /* DMA */
- { NULL, }, /* interrupt */
- { NULL, }, /* unit */
-};
-
-
-/* DEVICE
-
- stack - create an initial stack frame in memory
-
- DESCRIPTION
-
- Creates a stack frame of the specified type in memory.
-
- Due to the startup sequence gdb uses when commencing a simulation,
- it is not possible for the data to be placed on the stack to be
- specified as part of the device tree. Instead the arguments to be
- pushed onto the stack are specified using an IOCTL call.
-
- The IOCTL takes the additional arguments:
-
- | unsigned_word stack_end -- where the stack should come down from
- | char **argv -- ...
- | char **envp -- ...
-
- PROPERTIES
-
- stack-type = <string>
-
- The form of the stack frame that is to be created.
-
- */
-
-static int
-sizeof_argument_strings(char **arg)
-{
- int sizeof_strings = 0;
-
- /* robust */
- if (arg == NULL)
- return 0;
-
- /* add up all the string sizes (padding as we go) */
- for (; *arg != NULL; arg++) {
- int len = strlen(*arg) + 1;
- sizeof_strings += ALIGN_8(len);
- }
-
- return sizeof_strings;
-}
-
-static int
-number_of_arguments(char **arg)
-{
- int nr;
- if (arg == NULL)
- return 0;
- for (nr = 0; *arg != NULL; arg++, nr++);
- return nr;
-}
-
-static int
-sizeof_arguments(char **arg)
-{
- return ALIGN_8((number_of_arguments(arg) + 1) * sizeof(unsigned_word));
-}
-
-static void
-write_stack_arguments(device *me,
- char **arg,
- unsigned_word start_block,
- unsigned_word end_block,
- unsigned_word start_arg,
- unsigned_word end_arg)
-{
- DTRACE(stack,
- ("write_stack_arguments(device=%s, arg=0x%lx, start_block=0x%lx, end_block=0x%lx, start_arg=0x%lx, end_arg=0x%lx)\n",
- device_name(me), (long)arg, (long)start_block, (long)end_block, (long)start_arg, (long)end_arg));
- if (arg == NULL)
- device_error(me, "Attempt to write a null array onto the stack\n");
- /* only copy in arguments, memory is already zero */
- for (; *arg != NULL; arg++) {
- int len = strlen(*arg)+1;
- unsigned_word target_start_block;
- DTRACE(stack,
- ("write_stack_arguments() write %s=%s at %s=0x%lx %s=0x%lx %s=0x%lx\n",
- "**arg", *arg, "start_block", (long)start_block,
- "len", (long)len, "start_arg", (long)start_arg));
- if (psim_write_memory(device_system(me), 0, *arg,
- start_block, len,
- 0/*violate_readonly*/) != len)
- device_error(me, "Write of **arg (%s) at 0x%lx of stack failed\n",
- *arg, (unsigned long)start_block);
- target_start_block = H2T_word(start_block);
- if (psim_write_memory(device_system(me), 0, &target_start_block,
- start_arg, sizeof(target_start_block),
- 0) != sizeof(target_start_block))
- device_error(me, "Write of *arg onto stack failed\n");
- start_block += ALIGN_8(len);
- start_arg += sizeof(start_block);
- }
- start_arg += sizeof(start_block); /*the null at the end*/
- if (start_block != end_block
- || ALIGN_8(start_arg) != end_arg)
- device_error(me, "Probable corrpution of stack arguments\n");
- DTRACE(stack, ("write_stack_arguments() = void\n"));
-}
-
-static void
-create_ppc_elf_stack_frame(device *me,
- unsigned_word bottom_of_stack,
- char **argv,
- char **envp)
-{
- /* fixme - this is over aligned */
-
- /* information block */
- const unsigned sizeof_envp_block = sizeof_argument_strings(envp);
- const unsigned_word start_envp_block = bottom_of_stack - sizeof_envp_block;
- const unsigned sizeof_argv_block = sizeof_argument_strings(argv);
- const unsigned_word start_argv_block = start_envp_block - sizeof_argv_block;
-
- /* auxiliary vector - contains only one entry */
- const unsigned sizeof_aux_entry = 2*sizeof(unsigned_word); /* magic */
- const unsigned_word start_aux = start_argv_block - ALIGN_8(sizeof_aux_entry);
-
- /* environment points (including null sentinal) */
- const unsigned sizeof_envp = sizeof_arguments(envp);
- const unsigned_word start_envp = start_aux - sizeof_envp;
-
- /* argument pointers (including null sentinal) */
- const int argc = number_of_arguments(argv);
- const unsigned sizeof_argv = sizeof_arguments(argv);
- const unsigned_word start_argv = start_envp - sizeof_argv;
-
- /* link register save address - alligned to a 16byte boundary */
- const unsigned_word top_of_stack = ((start_argv
- - 2 * sizeof(unsigned_word))
- & ~0xf);
-
- /* install arguments on stack */
- write_stack_arguments(me, envp,
- start_envp_block, bottom_of_stack,
- start_envp, start_aux);
- write_stack_arguments(me, argv,
- start_argv_block, start_envp_block,
- start_argv, start_envp);
-
- /* set up the registers */
- psim_write_register(device_system(me), -1,
- &top_of_stack, "sp", cooked_transfer);
- psim_write_register(device_system(me), -1,
- &argc, "r3", cooked_transfer);
- psim_write_register(device_system(me), -1,
- &start_argv, "r4", cooked_transfer);
- psim_write_register(device_system(me), -1,
- &start_envp, "r5", cooked_transfer);
- psim_write_register(device_system(me), -1,
- &start_aux, "r6", cooked_transfer);
-}
-
-static void
-create_ppc_aix_stack_frame(device *me,
- unsigned_word bottom_of_stack,
- char **argv,
- char **envp)
-{
- unsigned_word core_envp;
- unsigned_word core_argv;
- unsigned_word core_argc;
- unsigned_word core_aux;
- unsigned_word top_of_stack;
-
- /* cheat - create an elf stack frame */
- create_ppc_elf_stack_frame(me, bottom_of_stack, argv, envp);
-
- /* extract argument addresses from registers */
- psim_read_register(device_system(me), 0,
- &top_of_stack, "r1", cooked_transfer);
- psim_read_register(device_system(me), 0,
- &core_argc, "r3", cooked_transfer);
- psim_read_register(device_system(me), 0,
- &core_argv, "r4", cooked_transfer);
- psim_read_register(device_system(me), 0,
- &core_envp, "r5", cooked_transfer);
- psim_read_register(device_system(me), 0,
- &core_aux, "r6", cooked_transfer);
-
- /* extract arguments from registers */
- device_error(me, "Unfinished procedure create_ppc_aix_stack_frame\n");
-}
-
-
-static void
-create_ppc_chirp_bootargs(device *me,
- char **argv)
-{
- /* concat the arguments */
- char args[1024];
- char **chp = argv + 1;
- args[0] = '\0';
- while (*chp != NULL) {
- if (strlen(args) > 0)
- strcat(args, " ");
- if (strlen(args) + strlen(*chp) >= sizeof(args))
- device_error(me, "buffer overflow");
- strcat(args, *chp);
- chp++;
- }
-
- /* set the arguments property */
- tree_parse(me, "/chosen/bootargs \"%s", args);
-}
-
-
-static int
-hw_stack_ioctl(device *me,
- cpu *processor,
- unsigned_word cia,
- device_ioctl_request request,
- va_list ap)
-{
- switch (request) {
- case device_ioctl_create_stack:
- {
- unsigned_word stack_pointer = va_arg(ap, unsigned_word);
- char **argv = va_arg(ap, char **);
- char **envp = va_arg(ap, char **);
- const char *stack_type;
- DTRACE(stack,
- ("stack_ioctl_callback(me=0x%lx:%s processor=0x%lx cia=0x%lx argv=0x%lx envp=0x%lx)\n",
- (long)me, device_name(me),
- (long)processor,
- (long)cia,
- (long)argv,
- (long)envp));
- stack_type = device_find_string_property(me, "stack-type");
- if (strcmp(stack_type, "ppc-elf") == 0)
- create_ppc_elf_stack_frame(me, stack_pointer, argv, envp);
- else if (strcmp(stack_type, "ppc-xcoff") == 0)
- create_ppc_aix_stack_frame(me, stack_pointer, argv, envp);
- else if (strcmp(stack_type, "chirp") == 0)
- create_ppc_chirp_bootargs(me, argv);
- else if (strcmp(stack_type, "none") != 0)
- device_error(me, "Unknown initial stack frame type %s", stack_type);
- DTRACE(stack,
- ("stack_ioctl_callback() = void\n"));
- break;
- }
- default:
- device_error(me, "Unsupported ioctl requested");
- break;
- }
- return 0;
-}
-
-static device_callbacks const hw_stack_callbacks = {
- { NULL, },
- { NULL, }, /* address */
- { NULL, }, /* IO */
- { NULL, }, /* DMA */
- { NULL, }, /* interrupt */
- { NULL, }, /* unit */
- NULL, /* instance */
- hw_stack_ioctl,
-};
-
-const device_descriptor hw_init_device_descriptor[] = {
- { "file", NULL, &hw_file_callbacks },
- { "data", NULL, &hw_data_callbacks },
- { "load-binary", NULL, &hw_binary_callbacks },
- { "map-binary", NULL, &hw_binary_callbacks },
- { "stack", NULL, &hw_stack_callbacks },
- { NULL },
-};
-
-#endif _HW_INIT_C_
diff --git a/sim/ppc/hw_iobus.c b/sim/ppc/hw_iobus.c
deleted file mode 100644
index 3cd138c1c80..00000000000
--- a/sim/ppc/hw_iobus.c
+++ /dev/null
@@ -1,100 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1996, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-#ifndef _HW_IOBUS_C_
-#define _HW_IOBUS_C_
-
-#ifndef STATIC_INLINE_HW_IOBUS
-#define STATIC_INLINE_HW_IOBUS STATIC_INLINE
-#endif
-
-#include "device_table.h"
-
-
-/* DEVICE
-
- iobus - simple bus for attaching devices
-
- DESCRIPTION
-
- IOBUS provides a simple `local' bus for attaching (hanging)
- programmed IO devices from. All child devices are directly mapped
- into this devices parent address space (after checking that the
- attach address lies within the <<iobus>> address range. address).
-
- PROPERTIES
-
- None.
-
- */
-
-static void
-hw_iobus_attach_address_callback(device *me,
- attach_type type,
- int space,
- unsigned_word addr,
- unsigned nr_bytes,
- access_type access,
- device *client) /*callback/default*/
-{
- int attach_space;
- unsigned_word attach_address;
- /* sanity check */
- if (space != 0)
- device_error(me, "invalid space (%d) specified by %s",
- space, device_path(client));
- /* get the bus address */
- device_address_to_attach_address(device_parent(me),
- device_unit_address(me),
- &attach_space,
- &attach_address,
- me);
- if (addr < attach_address)
- device_error(me, "Invalid attach address 0x%lx", (unsigned long)addr);
- device_attach_address(device_parent(me),
- type,
- attach_space,
- addr,
- nr_bytes,
- access,
- client);
-}
-
-
-static device_callbacks const hw_iobus_callbacks = {
- { NULL, },
- { hw_iobus_attach_address_callback, },
- { NULL, }, /* IO */
- { NULL, }, /* DMA */
- { NULL, }, /* interrupt */
- { generic_device_unit_decode,
- generic_device_unit_encode,
- generic_device_address_to_attach_address,
- generic_device_size_to_attach_size }
-};
-
-
-const device_descriptor hw_iobus_device_descriptor[] = {
- { "iobus", NULL, &hw_iobus_callbacks },
- { NULL, },
-};
-
-#endif /* _HW_IOBUS_ */
diff --git a/sim/ppc/hw_memory.c b/sim/ppc/hw_memory.c
deleted file mode 100644
index 117324b0edd..00000000000
--- a/sim/ppc/hw_memory.c
+++ /dev/null
@@ -1,538 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1997, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-#ifndef _HW_MEMORY_C_
-#define _HW_MEMORY_C_
-
-#ifndef STATIC_INLINE_HW_MEMORY
-#define STATIC_INLINE_HW_MEMORY STATIC_INLINE
-#endif
-
-#include "device_table.h"
-
-/* DEVICE
-
-
- memory - description of system memory
-
-
- DESCRIPTION
-
-
- This device describes the size and location of the banks of
- physical memory within the simulation.
-
- In addition, this device supports the "claim" and "release" methods
- that can be used by OpenBoot client programs to manage the
- allocation of physical memory.
-
-
- PROPERTIES
-
-
- reg = { <address> <size> } (required)
-
- Each pair specify one bank of memory.
-
- available = { <address> <size> } (automatic)
-
- Each pair specifies a block of memory that is currently unallocated.
-
-
- BUGS
-
-
- OpenFirmware doesn't make it clear if, when releasing memory the
- same address + size pair as was used during the claim should be
- specified.
-
- It is assumed that #size-cells and #address-cells for the parent
- node of this device are both one i.e. an address or size can be
- specified using a single memory cell (word).
-
- Significant work will be required before the <<memory>> device can
- support 64bit addresses (#address-cells equal two).
-
- */
-
-typedef struct _memory_reg_spec {
- unsigned_cell base;
- unsigned_cell size;
-} memory_reg_spec;
-
-typedef struct _hw_memory_chunk hw_memory_chunk;
-struct _hw_memory_chunk {
- unsigned_word address;
- unsigned_word size;
- int available;
- hw_memory_chunk *next;
-};
-
-typedef struct _hw_memory_device {
- hw_memory_chunk *heap;
-} hw_memory_device;
-
-
-static void *
-hw_memory_create(const char *name,
- const device_unit *unit_address,
- const char *args)
-{
- hw_memory_device *hw_memory = ZALLOC(hw_memory_device);
- return hw_memory;
-}
-
-
-static void
-hw_memory_set_available(device *me,
- hw_memory_device *hw_memory)
-{
- hw_memory_chunk *chunk = NULL;
- memory_reg_spec *available = NULL;
- int nr_available = 0;
- int curr = 0;
- int sizeof_available = 0;
- /* determine the nr of available chunks */
- chunk = hw_memory->heap;
- nr_available = 0;
- while (chunk != NULL) {
- if (chunk->available)
- nr_available += 1;
- ASSERT(chunk->next == NULL
- || chunk->address < chunk->next->address);
- ASSERT(chunk->next == NULL
- || chunk->address + chunk->size == chunk->next->address);
- chunk = chunk->next;
- }
- /* now create the available struct */
- ASSERT(nr_available > 0);
- sizeof_available = sizeof(memory_reg_spec) * nr_available;
- available = zalloc(sizeof_available);
- chunk = hw_memory->heap;
- curr = 0;
- while (chunk != NULL) {
- if (chunk->available) {
- available[curr].base = H2BE_cell(chunk->address);
- available[curr].size = H2BE_cell(chunk->size);
- curr += 1;
- }
- chunk = chunk->next;
- }
- /* update */
- device_set_array_property(me, "available", available, sizeof_available);
- zfree(available);
-}
-
-
-static void
-hw_memory_init_address(device *me)
-{
- hw_memory_device *hw_memory = (hw_memory_device*)device_data(me);
-
- /* free up any previous structures */
- {
- hw_memory_chunk *curr_chunk = hw_memory->heap;
- hw_memory->heap = NULL;
- while (curr_chunk != NULL) {
- hw_memory_chunk *dead_chunk = curr_chunk;
- curr_chunk = dead_chunk->next;
- dead_chunk->next = NULL;
- zfree(dead_chunk);
- }
- }
-
- /* attach memory regions according to the "reg" property */
- {
- int reg_nr;
- reg_property_spec reg;
- for (reg_nr = 0;
- device_find_reg_array_property(me, "reg", reg_nr, &reg);
- reg_nr++) {
- int i;
- /* check that the entry meets restrictions */
- for (i = 0; i < reg.address.nr_cells - 1; i++)
- if (reg.address.cells[i] != 0)
- device_error(me, "Only single celled addresses supported");
- for (i = 0; i < reg.size.nr_cells - 1; i++)
- if (reg.size.cells[i] != 0)
- device_error(me, "Only single celled sizes supported");
- /* attach the range */
- device_attach_address(device_parent(me),
- attach_raw_memory,
- 0 /*address space*/,
- reg.address.cells[reg.address.nr_cells - 1],
- reg.size.cells[reg.size.nr_cells - 1],
- access_read_write_exec,
- me);
- }
- }
-
- /* create the initial `available memory' data structure */
- if (device_find_property(me, "available") != NULL) {
- hw_memory_chunk **curr_chunk = &hw_memory->heap;
- int cell_nr;
- unsigned_cell dummy;
- int nr_cells = device_find_integer_array_property(me, "available", 0, &dummy);
- if ((nr_cells % 2) != 0)
- device_error(me, "property \"available\" invalid - contains an odd number of cells");
- for (cell_nr = 0;
- cell_nr < nr_cells;
- cell_nr += 2) {
- hw_memory_chunk *new_chunk = ZALLOC(hw_memory_chunk);
- device_find_integer_array_property(me, "available", cell_nr,
- &new_chunk->address);
- device_find_integer_array_property(me, "available", cell_nr + 1,
- &new_chunk->size);
- new_chunk->available = 1;
- *curr_chunk = new_chunk;
- curr_chunk = &new_chunk->next;
- }
- }
- else {
- hw_memory_chunk **curr_chunk = &hw_memory->heap;
- int reg_nr;
- reg_property_spec reg;
- for (reg_nr = 0;
- device_find_reg_array_property(me, "reg", reg_nr, &reg);
- reg_nr++) {
- hw_memory_chunk *new_chunk;
- new_chunk = ZALLOC(hw_memory_chunk);
- new_chunk->address = reg.address.cells[reg.address.nr_cells - 1];
- new_chunk->size = reg.size.cells[reg.size.nr_cells - 1];
- new_chunk->available = 1;
- *curr_chunk = new_chunk;
- curr_chunk = &new_chunk->next;
- }
- }
-
- /* initialize the alloc property for this device */
- hw_memory_set_available(me, hw_memory);
-}
-
-static void
-hw_memory_instance_delete(device_instance *instance)
-{
- return;
-}
-
-static int
-hw_memory_instance_claim(device_instance *instance,
- int n_stack_args,
- unsigned_cell stack_args[/*n_stack_args*/],
- int n_stack_returns,
- unsigned_cell stack_returns[/*n_stack_returns*/])
-{
- hw_memory_device *hw_memory = device_instance_data(instance);
- device *me = device_instance_device(instance);
- int stackp = 0;
- unsigned_word alignment;
- unsigned_cell size;
- unsigned_cell address;
- hw_memory_chunk *chunk = NULL;
-
- /* get the alignment from the stack */
- if (n_stack_args < stackp + 1)
- device_error(me, "claim - incorrect number of arguments (alignment missing)");
- alignment = stack_args[stackp];
- stackp++;
-
- /* get the size from the stack */
- {
- int i;
- int nr_cells = device_nr_size_cells(device_parent(me));
- if (n_stack_args < stackp + nr_cells)
- device_error(me, "claim - incorrect number of arguments (size missing)");
- for (i = 0; i < nr_cells - 1; i++) {
- if (stack_args[stackp] != 0)
- device_error(me, "claim - multi-cell sizes not supported");
- stackp++;
- }
- size = stack_args[stackp];
- stackp++;
- }
-
- /* get the address from the stack */
- {
- int nr_cells = device_nr_address_cells(device_parent(me));
- if (alignment != 0) {
- if (n_stack_args != stackp) {
- if (n_stack_args == stackp + nr_cells)
- DTRACE(memory, ("claim - extra address argument ignored\n"));
- else
- device_error(me, "claim - incorrect number of arguments (optional addr)");
- }
- address = 0;
- }
- else {
- int i;
- if (n_stack_args != stackp + nr_cells)
- device_error(me, "claim - incorrect number of arguments (addr missing)");
- for (i = 0; i < nr_cells - 1; i++) {
- if (stack_args[stackp] != 0)
- device_error(me, "claim - multi-cell addresses not supported");
- stackp++;
- }
- address = stack_args[stackp];
- }
- }
-
- /* check that there is space for the result */
- if (n_stack_returns != 0
- && n_stack_returns != device_nr_address_cells(device_parent(me)))
- device_error(me, "claim - invalid number of return arguments");
-
- /* find a chunk candidate, either according to address or alignment */
- if (alignment == 0) {
- chunk = hw_memory->heap;
- while (chunk != NULL) {
- if ((address + size) <= (chunk->address + chunk->size))
- break;
- chunk = chunk->next;
- }
- if (chunk == NULL || address < chunk->address || !chunk->available)
- device_error(me, "failed to allocate %ld bytes at 0x%lx",
- (unsigned long)size, (unsigned long)address);
- DTRACE(memory, ("claim - address=0x%lx size=0x%lx\n",
- (unsigned long)address,
- (unsigned long)size));
- }
- else {
- /* adjust the alignment so that it is a power of two */
- unsigned_word align_mask = 1;
- while (align_mask < alignment && align_mask != 0)
- align_mask <<= 1;
- if (align_mask == 0)
- device_error(me, "alignment 0x%lx is to large", (unsigned long)alignment);
- align_mask -= 1;
- /* now find an aligned chunk that fits */
- chunk = hw_memory->heap;
- while (chunk != NULL) {
- address = ((chunk->address + align_mask) & ~align_mask);
- if ((chunk->available)
- && (chunk->address + chunk->size >= address + size))
- break;
- chunk = chunk->next;
- }
- if (chunk == NULL)
- device_error(me, "failed to allocate %ld bytes with alignment %ld",
- (unsigned long)size, (unsigned long)alignment);
- DTRACE(memory, ("claim - size=0x%lx alignment=%ld (0x%lx), address=0x%lx\n",
- (unsigned long)size,
- (unsigned long)alignment,
- (unsigned long)alignment,
- (unsigned long)address));
- }
-
- /* break off a bit before this chunk if needed */
- ASSERT(address >= chunk->address);
- if (address > chunk->address) {
- hw_memory_chunk *next_chunk = ZALLOC(hw_memory_chunk);
- /* insert a new chunk */
- next_chunk->next = chunk->next;
- chunk->next = next_chunk;
- /* adjust the address/size */
- next_chunk->address = address;
- next_chunk->size = chunk->address + chunk->size - next_chunk->address;
- next_chunk->available = 1;
- chunk->size = next_chunk->address - chunk->address;
- /* make this new chunk the one to allocate */
- chunk = next_chunk;
- }
- ASSERT(address == chunk->address);
-
- /* break off a bit after this chunk if needed */
- ASSERT(address + size <= chunk->address + chunk->size);
- if (address + size < chunk->address + chunk->size) {
- hw_memory_chunk *next_chunk = ZALLOC(hw_memory_chunk);
- /* insert it in to the list */
- next_chunk->next = chunk->next;
- chunk->next = next_chunk;
- /* adjust the address/size */
- next_chunk->address = address + size;
- next_chunk->size = chunk->address + chunk->size - next_chunk->address;
- next_chunk->available = 1;
- chunk->size = next_chunk->address - chunk->address;
- }
- ASSERT(address + size == chunk->address + chunk->size);
-
- /* now allocate/return it */
- chunk->available = 0;
- hw_memory_set_available(device_instance_device(instance), hw_memory);
- if (n_stack_returns > 0) {
- int i;
- for (i = 0; i < n_stack_returns - 1; i++)
- stack_returns[i] = 0;
- stack_returns[n_stack_returns - 1] = address;
- }
-
- return 0;
-}
-
-
-static int
-hw_memory_instance_release(device_instance *instance,
- int n_stack_args,
- unsigned_cell stack_args[/*n_stack_args*/],
- int n_stack_returns,
- unsigned_cell stack_returns[/*n_stack_returns*/])
-{
- hw_memory_device *hw_memory = device_instance_data(instance);
- device *me = device_instance_device(instance);
- unsigned_word length;
- unsigned_word address;
- int stackp = 0;
- hw_memory_chunk *chunk;
-
- /* get the length from the stack */
- {
- int i;
- int nr_cells = device_nr_size_cells(device_parent(me));
- if (n_stack_args < stackp + nr_cells)
- device_error(me, "release - incorrect number of arguments (length missing)");
- for (i = 0; i < nr_cells - 1; i++) {
- if (stack_args[stackp] != 0)
- device_error(me, "release - multi-cell length not supported");
- stackp++;
- }
- length = stack_args[stackp];
- stackp++;
- }
-
- /* get the address from the stack */
- {
- int i;
- int nr_cells = device_nr_address_cells(device_parent(me));
- if (n_stack_args != stackp + nr_cells)
- device_error(me, "release - incorrect number of arguments (addr missing)");
- for (i = 0; i < nr_cells - 1; i++) {
- if (stack_args[stackp] != 0)
- device_error(me, "release - multi-cell addresses not supported");
- stackp++;
- }
- address = stack_args[stackp];
- }
-
- /* returns ok */
- if (n_stack_returns != 0)
- device_error(me, "release - nonzero number of results");
-
- /* try to free the corresponding memory chunk */
- chunk = hw_memory->heap;
- while (chunk != NULL) {
- if (chunk->address == address
- && chunk->size == length) {
- /* an exact match */
- if (chunk->available)
- device_error(me, "memory chunk 0x%lx (size 0x%lx) already available",
- (unsigned long)address,
- (unsigned long)length);
- else {
- /* free this chunk */
- DTRACE(memory, ("release - address=0x%lx, length=0x%lx\n",
- (unsigned long) address,
- (unsigned long) length));
- chunk->available = 1;
- break;
- }
- }
- else if (chunk->address >= address
- && chunk->address + chunk->size <= address + length) {
- /* a sub region */
- if (!chunk->available) {
- DTRACE(memory, ("release - address=0x%lx, size=0x%lx within region 0x%lx length 0x%lx\n",
- (unsigned long) chunk->address,
- (unsigned long) chunk->size,
- (unsigned long) address,
- (unsigned long) length));
- chunk->available = 1;
- }
- }
- chunk = chunk->next;
- }
- if (chunk == NULL) {
- printf_filtered("warning: released chunks within region 0x%lx..0x%lx\n",
- (unsigned long)address,
- (unsigned long)(address + length - 1));
- }
-
- /* check for the chance to merge two adjacent available memory chunks */
- chunk = hw_memory->heap;
- while (chunk != NULL) {
- if (chunk->available
- && chunk->next != NULL && chunk->next->available) {
- /* adjacent */
- hw_memory_chunk *delete = chunk->next;
- ASSERT(chunk->address + chunk->size == delete->address);
- chunk->size += delete->size;
- chunk->next = delete->next;
- zfree(delete);
- }
- else {
- chunk = chunk->next;
- }
- }
-
- /* update the corresponding property */
- hw_memory_set_available(device_instance_device(instance), hw_memory);
-
- return 0;
-}
-
-
-static device_instance_methods hw_memory_instance_methods[] = {
- { "claim", hw_memory_instance_claim },
- { "release", hw_memory_instance_release },
- { NULL, },
-};
-
-static device_instance_callbacks const hw_memory_instance_callbacks = {
- hw_memory_instance_delete,
- NULL /*read*/, NULL /*write*/, NULL /*seek*/,
- hw_memory_instance_methods
-};
-
-static device_instance *
-hw_memory_create_instance(device *me,
- const char *path,
- const char *args)
-{
- return device_create_instance_from(me, NULL,
- device_data(me), /* nothing better */
- path, args,
- &hw_memory_instance_callbacks);
-}
-
-static device_callbacks const hw_memory_callbacks = {
- { hw_memory_init_address, },
- { NULL, }, /* address */
- { NULL, }, /* IO */
- { NULL, }, /* DMA */
- { NULL, }, /* interrupt */
- { NULL, }, /* unit */
- hw_memory_create_instance,
-};
-
-const device_descriptor hw_memory_device_descriptor[] = {
- { "memory", hw_memory_create, &hw_memory_callbacks },
- { NULL },
-};
-
-#endif /* _HW_MEMORY_C_ */
diff --git a/sim/ppc/hw_nvram.c b/sim/ppc/hw_nvram.c
deleted file mode 100644
index 4c87d05d9be..00000000000
--- a/sim/ppc/hw_nvram.c
+++ /dev/null
@@ -1,264 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1996, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-#ifndef _HW_NVRAM_C_
-#define _HW_NVRAM_C_
-
-#ifndef STATIC_INLINE_HW_NVRAM
-#define STATIC_INLINE_HW_NVRAM STATIC_INLINE
-#endif
-
-#include "device_table.h"
-
-#ifdef HAVE_TIME_H
-#include <time.h>
-#endif
-
-#ifdef HAVE_STRING_H
-#include <string.h>
-#else
-#ifdef HAVE_STRINGS_H
-#include <strings.h>
-#endif
-#endif
-
-/* DEVICE
-
-
- nvram - non-volatile memory with clock
-
-
- DESCRIPTION
-
-
- This device implements a small byte addressable non-volatile
- memory. The top 8 bytes of this memory include a real-time clock.
-
-
- PROPERTIES
-
-
- reg = <address> <size> (required)
-
- Specify the address/size of this device within its parents address
- space.
-
-
- timezone = <integer> (optional)
-
- Adjustment to the hosts current GMT (in seconds) that should be
- applied when updating the NVRAM's clock. If no timezone is
- specified, zero (GMT or UCT) is assumed.
-
-
- */
-
-typedef struct _hw_nvram_device {
- unsigned8 *memory;
- unsigned sizeof_memory;
-#ifdef HAVE_TIME_H
- time_t host_time;
-#else
- long host_time;
-#endif
- unsigned timezone;
- /* useful */
- unsigned addr_year;
- unsigned addr_month;
- unsigned addr_date;
- unsigned addr_day;
- unsigned addr_hour;
- unsigned addr_minutes;
- unsigned addr_seconds;
- unsigned addr_control;
-} hw_nvram_device;
-
-static void *
-hw_nvram_create(const char *name,
- const device_unit *unit_address,
- const char *args)
-{
- hw_nvram_device *nvram = ZALLOC(hw_nvram_device);
- return nvram;
-}
-
-typedef struct _hw_nvram_reg_spec {
- unsigned32 base;
- unsigned32 size;
-} hw_nvram_reg_spec;
-
-static void
-hw_nvram_init_address(device *me)
-{
- hw_nvram_device *nvram = (hw_nvram_device*)device_data(me);
-
- /* use the generic init code to attach this device to its parent bus */
- generic_device_init_address(me);
-
- /* find the first non zero reg property and use that as the device
- size */
- if (nvram->sizeof_memory == 0) {
- reg_property_spec reg;
- int reg_nr;
- for (reg_nr = 0;
- device_find_reg_array_property(me, "reg", reg_nr, &reg);
- reg_nr++) {
- unsigned attach_size;
- if (device_size_to_attach_size(device_parent(me),
- &reg.size, &attach_size,
- me)) {
- nvram->sizeof_memory = attach_size;
- break;
- }
- }
- if (nvram->sizeof_memory == 0)
- device_error(me, "reg property must contain a non-zero phys-addr:size tupple");
- if (nvram->sizeof_memory < 8)
- device_error(me, "NVRAM must be at least 8 bytes in size");
- }
-
- /* initialize the hw_nvram */
- if (nvram->memory == NULL) {
- nvram->memory = zalloc(nvram->sizeof_memory);
- }
- else
- memset(nvram->memory, nvram->sizeof_memory, 0);
-
- if (device_find_property(me, "timezone") == NULL)
- nvram->timezone = 0;
- else
- nvram->timezone = device_find_integer_property(me, "timezone");
-
- nvram->addr_year = nvram->sizeof_memory - 1;
- nvram->addr_month = nvram->sizeof_memory - 2;
- nvram->addr_date = nvram->sizeof_memory - 3;
- nvram->addr_day = nvram->sizeof_memory - 4;
- nvram->addr_hour = nvram->sizeof_memory - 5;
- nvram->addr_minutes = nvram->sizeof_memory - 6;
- nvram->addr_seconds = nvram->sizeof_memory - 7;
- nvram->addr_control = nvram->sizeof_memory - 8;
-
-}
-
-static int
-hw_nvram_bcd(int val)
-{
- val = val % 100;
- if (val < 0)
- val += 100;
- return ((val / 10) << 4) + (val % 10);
-}
-
-
-/* If reached an update interval and allowed, update the clock within
- the hw_nvram. While this function could be implemented using events
- it isn't on the assumption that the HW_NVRAM will hardly ever be
- referenced and hence there is little need in keeping the clock
- continually up-to-date */
-
-static void
-hw_nvram_update_clock(hw_nvram_device *nvram,
- cpu *processor)
-{
-#ifdef HAVE_TIME_H
- if (!(nvram->memory[nvram->addr_control] & 0xc0)) {
- time_t host_time = time(NULL);
- if (nvram->host_time != host_time) {
- time_t nvtime = host_time + nvram->timezone;
- struct tm *clock = gmtime(&nvtime);
- nvram->host_time = host_time;
- nvram->memory[nvram->addr_year] = hw_nvram_bcd(clock->tm_year);
- nvram->memory[nvram->addr_month] = hw_nvram_bcd(clock->tm_mon + 1);
- nvram->memory[nvram->addr_date] = hw_nvram_bcd(clock->tm_mday);
- nvram->memory[nvram->addr_day] = hw_nvram_bcd(clock->tm_wday + 1);
- nvram->memory[nvram->addr_hour] = hw_nvram_bcd(clock->tm_hour);
- nvram->memory[nvram->addr_minutes] = hw_nvram_bcd(clock->tm_min);
- nvram->memory[nvram->addr_seconds] = hw_nvram_bcd(clock->tm_sec);
- }
- }
-#else
- error("fixme - where do I find out GMT\n");
-#endif
-}
-
-static void
-hw_nvram_set_clock(hw_nvram_device *nvram, cpu *processor)
-{
- error ("fixme - how do I set the localtime\n");
-}
-
-static unsigned
-hw_nvram_io_read_buffer(device *me,
- void *dest,
- int space,
- unsigned_word addr,
- unsigned nr_bytes,
- cpu *processor,
- unsigned_word cia)
-{
- int i;
- hw_nvram_device *nvram = (hw_nvram_device*)device_data(me);
- for (i = 0; i < nr_bytes; i++) {
- unsigned address = (addr + i) % nvram->sizeof_memory;
- unsigned8 data = nvram->memory[address];
- hw_nvram_update_clock(nvram, processor);
- ((unsigned8*)dest)[i] = data;
- }
- return nr_bytes;
-}
-
-static unsigned
-hw_nvram_io_write_buffer(device *me,
- const void *source,
- int space,
- unsigned_word addr,
- unsigned nr_bytes,
- cpu *processor,
- unsigned_word cia)
-{
- int i;
- hw_nvram_device *nvram = (hw_nvram_device*)device_data(me);
- for (i = 0; i < nr_bytes; i++) {
- unsigned address = (addr + i) % nvram->sizeof_memory;
- unsigned8 data = ((unsigned8*)source)[i];
- if (address == nvram->addr_control
- && (data & 0x80) == 0
- && (nvram->memory[address] & 0x80) == 0x80)
- hw_nvram_set_clock(nvram, processor);
- else
- hw_nvram_update_clock(nvram, processor);
- nvram->memory[address] = data;
- }
- return nr_bytes;
-}
-
-static device_callbacks const hw_nvram_callbacks = {
- { hw_nvram_init_address, },
- { NULL, }, /* address */
- { hw_nvram_io_read_buffer, hw_nvram_io_write_buffer }, /* IO */
-};
-
-const device_descriptor hw_nvram_device_descriptor[] = {
- { "nvram", hw_nvram_create, &hw_nvram_callbacks },
- { NULL },
-};
-
-#endif /* _HW_NVRAM_C_ */
diff --git a/sim/ppc/hw_opic.c b/sim/ppc/hw_opic.c
deleted file mode 100644
index c314347e5a5..00000000000
--- a/sim/ppc/hw_opic.c
+++ /dev/null
@@ -1,1827 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1996, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-#ifndef _HW_OPIC_C_
-#define _HW_OPIC_C_
-
-#include "device_table.h"
-
-#ifdef HAVE_STRING_H
-#include <string.h>
-#else
-#ifdef HAVE_STRINGS_H
-#include <strings.h>
-#endif
-#endif
-
-
-/* DEVICE
-
-
- opic - Open Programmable Interrupt Controller (OpenPIC)
-
-
- DESCRIPTION
-
-
- This device implements the core of the OpenPIC interrupt controller
- as described in the OpenPIC specification 1.2 and other related
- documents.
-
- The model includes:
-
- o Up to 2048 external interrupt sources
-
- o The four count down timers
-
- o The four interprocessor multicast interrupts
-
- o multiprocessor support
-
- o Full tracing to assist help debugging
-
- o Support for all variations of edge/level x high/low polarity.
-
-
-
- PROPERTIES
-
-
- reg = <address> <size> ... (required)
-
- Determine where the device lives in the parents address space. The
- first <<address>> <<size>> pair specifies the address of the
- interrupt destination unit (which might contain an interrupt source
- unit) while successive reg entries specify additional interrupt
- source units.
-
- Note that for an <<opic>> device attached to a <<pci>> bus, the
- first <<reg>> entry may need to be ignored it will be the address
- of the devices configuration registers.
-
-
- interrupt-ranges = <int-number> <range> ... (required)
-
- A list of pairs. Each pair corresponds to a block of interrupt
- source units (the address of which being specified by the
- corresponding reg tupple). <<int-number>> is the number of the
- first interrupt in the block while <<range>> is the number of
- interrupts in the block.
-
-
- timer-frequency = <integer> (optional)
-
- If present, specifies the default value of the timer frequency
- reporting register. By default a value of 1 HZ is used. The value
- is arbitrary, the timers are always updated once per machine cycle.
-
-
- vendor-identification = <integer> (optional)
-
- If present, specifies the value to be returned when the vendor
- identification register is read.
-
-
- EXAMPLES
-
-
- See the test suite directory:
-
- | psim-test/hw-opic
-
-
- BUGS
-
- For an OPIC controller attached to a PCI bus, it is not clear what
- the value of the <<reg>> and <<interrupt-ranges>> properties should
- be. In particular, the PCI firmware bindings require the first
- value of the <<reg>> property to specify the devices configuration
- address while the OpenPIC bindings require that same entry to
- specify the address of the Interrupt Delivery Unit. This
- implementation checks for and, if present, ignores any
- configuration address (and its corresponding <<interrupt-ranges>>
- entry).
-
- The OpenPIC specification requires the controller to be fair when
- distributing interrupts between processors. At present the
- algorithm used isn't fair. It is biased towards processor zero.
-
- The OpenPIC specification includes a 8259 pass through mode. This
- is not supported.
-
-
- REFERENCES
-
-
- PowerPC Multiprocessor Interrupt Controller (MPIC), January 19,
- 1996. Available from IBM.
-
-
- The Open Programmable Interrupt Controller (PIC) Register Interface
- Specification Revision 1.2. Issue Date: Opctober 1995. Available
- somewhere on AMD's web page (http://www.amd.com/)
-
-
- PowerPC Microprocessor Common Hardware Reference Platform (CHRP)
- System bindings to: IEEE Std 1275-1994 Standard for Boot
- (Initialization, Configuration) Firmware. Revision 1.2b (INTERIM
- DRAFT). April 22, 1996. Available on the Open Firmware web site
- http://playground.sun.com/p1275/.
-
-
- */
-
-
-/* forward types */
-
-typedef struct _hw_opic_device hw_opic_device;
-
-
-/* bounds */
-
-enum {
- max_nr_interrupt_sources = 2048,
- max_nr_interrupt_destinations = 32,
- max_nr_task_priorities = 16,
-};
-
-
-enum {
- opic_alignment = 16,
-};
-
-
-/* global configuration register */
-
-enum {
- gcr0_8259_bit = 0x20000000,
- gcr0_reset_bit = 0x80000000,
-};
-
-
-/* offsets and sizes */
-
-enum {
- idu_isu_base = 0x10000,
- sizeof_isu_register_block = 32,
- idu_per_processor_register_base = 0x20000,
- sizeof_idu_per_processor_register_block = 0x1000,
- idu_timer_base = 0x01100,
- sizeof_timer_register_block = 0x00040,
-};
-
-
-/* Interrupt sources */
-
-enum {
- isu_mask_bit = 0x80000000,
- isu_active_bit = 0x40000000,
- isu_multicast_bit = 0x20000000,
- isu_positive_polarity_bit = 0x00800000,
- isu_level_triggered_bit = 0x00400000,
- isu_priority_shift = 16,
- isu_vector_bits = 0x000000ff,
-};
-
-
-typedef struct _opic_interrupt_source {
- unsigned is_masked; /* left in place */
- unsigned is_multicast; /* left in place */
- unsigned is_positive_polarity; /* left in place */
- unsigned is_level_triggered; /* left in place */
- unsigned priority;
- unsigned vector;
- /* misc */
- int nr;
- unsigned destination;
- unsigned pending;
- unsigned in_service;
-} opic_interrupt_source;
-
-
-/* interrupt destinations (normally processors) */
-
-typedef struct _opic_interrupt_destination {
- int nr;
- unsigned base_priority;
- opic_interrupt_source *current_pending;
- opic_interrupt_source *current_in_service;
- unsigned bit;
- int init_port;
- int intr_port;
-} opic_interrupt_destination;
-
-
-/* address map descriptors */
-
-typedef struct _opic_isu_block { /* interrupt source unit block */
- int space;
- unsigned_word address;
- unsigned size;
- unsigned_cell int_number;
- unsigned_cell range;
- int reg;
-} opic_isu_block;
-
-
-typedef struct _opic_idu { /* interrupt delivery unit */
- int reg;
- int space;
- unsigned_word address;
- unsigned size;
-} opic_idu;
-
-typedef enum {
- /* bad */
- invalid_opic_register,
- /* interrupt source */
- interrupt_source_N_destination_register,
- interrupt_source_N_vector_priority_register,
- /* timers */
- timer_N_destination_register,
- timer_N_vector_priority_register,
- timer_N_base_count_register,
- timer_N_current_count_register,
- timer_frequency_reporting_register,
- /* inter-processor interrupts */
- ipi_N_vector_priority_register,
- ipi_N_dispatch_register,
- /* global configuration */
- spurious_vector_register,
- processor_init_register,
- vendor_identification_register,
- global_configuration_register_N,
- feature_reporting_register_N,
- /* per processor */
- end_of_interrupt_register_N,
- interrupt_acknowledge_register_N,
- current_task_priority_register_N,
-} opic_register;
-
-static const char *
-opic_register_name(opic_register type)
-{
- switch (type) {
- case invalid_opic_register: return "invalid_opic_register";
- case interrupt_source_N_destination_register: return "interrupt_source_N_destination_register";
- case interrupt_source_N_vector_priority_register: return "interrupt_source_N_vector_priority_register";
- case timer_N_destination_register: return "timer_N_destination_register";
- case timer_N_vector_priority_register: return "timer_N_vector_priority_register";
- case timer_N_base_count_register: return "timer_N_base_count_register";
- case timer_N_current_count_register: return "timer_N_current_count_register";
- case timer_frequency_reporting_register: return "timer_frequency_reporting_register";
- case ipi_N_vector_priority_register: return "ipi_N_vector_priority_register";
- case ipi_N_dispatch_register: return "ipi_N_dispatch_register";
- case spurious_vector_register: return "spurious_vector_register";
- case processor_init_register: return "processor_init_register";
- case vendor_identification_register: return "vendor_identification_register";
- case global_configuration_register_N: return "global_configuration_register_N";
- case feature_reporting_register_N: return "feature_reporting_register_N";
- case end_of_interrupt_register_N: return "end_of_interrupt_register_N";
- case interrupt_acknowledge_register_N: return "interrupt_acknowledge_register_N";
- case current_task_priority_register_N: return "current_task_priority_register_N";
- }
- return NULL;
-}
-
-
-
-/* timers */
-
-typedef struct _opic_timer {
- int nr;
- device *me; /* find my way home */
- hw_opic_device *opic; /* ditto */
- unsigned base_count;
- int inhibited;
- signed64 count; /* *ONLY* if inhibited */
- event_entry_tag timeout_event;
- opic_interrupt_source *interrupt_source;
-} opic_timer;
-
-
-/* the OPIC */
-
-struct _hw_opic_device {
-
- /* vendor id */
- unsigned vendor_identification;
-
- /* interrupt destinations - processors */
- int nr_interrupt_destinations;
- opic_interrupt_destination *interrupt_destination;
- unsigned sizeof_interrupt_destination;
-
- /* bogus interrupts */
- int spurious_vector;
-
- /* interrupt sources - external interrupt source units + extra internal ones */
- int nr_interrupt_sources;
- opic_interrupt_source *interrupt_source;
- unsigned sizeof_interrupt_source;
-
- /* external interrupts */
- int nr_external_interrupts;
- opic_interrupt_source *external_interrupt_source;
-
- /* inter-processor-interrupts */
- int nr_interprocessor_interrupts;
- opic_interrupt_source *interprocessor_interrupt_source;
-
- /* timers */
- int nr_timer_interrupts;
- opic_timer *timer;
- unsigned sizeof_timer;
- opic_interrupt_source *timer_interrupt_source;
- unsigned timer_frequency;
-
- /* init register */
- unsigned32 init;
-
- /* address maps */
- opic_idu idu;
- int nr_isu_blocks;
- opic_isu_block *isu_block;
-};
-
-
-static void
-hw_opic_init_data(device *me)
-{
- hw_opic_device *opic = (hw_opic_device*)device_data(me);
- int isb;
- int idu_reg;
- int nr_isu_blocks;
- int i;
-
- /* determine the first valid reg property entry (there could be
- leading reg entries with invalid (zero) size fields) and the
- number of isu entries found in the reg property. */
- idu_reg = 0;
- nr_isu_blocks = 0;
- while (1) {
- reg_property_spec unit;
- int attach_space;
- unsigned_word attach_address;
- unsigned attach_size;
- if (!device_find_reg_array_property(me, "reg", idu_reg + nr_isu_blocks,
- &unit))
- break;
- if (nr_isu_blocks > 0
- || (device_address_to_attach_address(device_parent(me), &unit.address,
- &attach_space, &attach_address,
- me)
- && device_size_to_attach_size(device_parent(me), &unit.size,
- &attach_size,
- me))) {
- /* we count any thing once we've found one valid address/size pair */
- nr_isu_blocks += 1;
- }
- else {
- idu_reg += 1;
- }
- }
-
- /* determine the number and location of the multiple interrupt
- source units and the single interrupt delivery unit */
- if (opic->isu_block == NULL) {
- int reg_nr;
- opic->nr_isu_blocks = nr_isu_blocks;
- opic->isu_block = zalloc(sizeof(opic_isu_block) * opic->nr_isu_blocks);
- isb = 0;
- reg_nr = idu_reg;
- while (isb < opic->nr_isu_blocks) {
- reg_property_spec reg;
- if (!device_find_reg_array_property(me, "reg", reg_nr, &reg))
- device_error(me, "reg property missing entry number %d", reg_nr);
- opic->isu_block[isb].reg = reg_nr;
- if (!device_address_to_attach_address(device_parent(me), &reg.address,
- &opic->isu_block[isb].space,
- &opic->isu_block[isb].address,
- me)
- || !device_size_to_attach_size(device_parent(me), &reg.size,
- &opic->isu_block[isb].size,
- me)) {
- device_error(me, "reg property entry %d invalid", reg_nr);
- }
- if (!device_find_integer_array_property(me, "interrupt-ranges",
- reg_nr * 2,
- &opic->isu_block[isb].int_number)
- || !device_find_integer_array_property(me, "interrupt-ranges",
- reg_nr * 2 + 1,
- &opic->isu_block[isb].range))
- device_error(me, "missing or invalid interrupt-ranges property entry %d", reg_nr);
- /* first reg entry specifies the address of both the IDU and the
- first set of ISU registers, adjust things accordingly */
- if (reg_nr == idu_reg) {
- opic->idu.reg = opic->isu_block[isb].reg;
- opic->idu.space = opic->isu_block[isb].space;
- opic->idu.address = opic->isu_block[isb].address;
- opic->idu.size = opic->isu_block[isb].size;
- opic->isu_block[isb].address += idu_isu_base;
- opic->isu_block[isb].size = opic->isu_block[isb].range * (16 + 16);
- }
- /* was this a valid reg entry? */
- if (opic->isu_block[isb].range == 0) {
- opic->nr_isu_blocks -= 1;
- }
- else {
- opic->nr_external_interrupts += opic->isu_block[isb].range;
- isb++;
- }
- reg_nr++;
- }
- }
- DTRACE(opic, ("interrupt source unit block - effective number of blocks %d\n",
- (int)opic->nr_isu_blocks));
-
-
- /* the number of other interrupts */
- opic->nr_interprocessor_interrupts = 4;
- opic->nr_timer_interrupts = 4;
-
-
- /* create space for the interrupt source registers */
- if (opic->interrupt_source != NULL) {
- memset(opic->interrupt_source, 0, opic->sizeof_interrupt_source);
- }
- else {
- opic->nr_interrupt_sources = (opic->nr_external_interrupts
- + opic->nr_interprocessor_interrupts
- + opic->nr_timer_interrupts);
- if (opic->nr_interrupt_sources > max_nr_interrupt_sources)
- device_error(me, "number of interrupt sources exceeded");
- opic->sizeof_interrupt_source = (sizeof(opic_interrupt_source)
- * opic->nr_interrupt_sources);
- opic->interrupt_source = zalloc(opic->sizeof_interrupt_source);
- opic->external_interrupt_source = opic->interrupt_source;
- opic->interprocessor_interrupt_source = (opic->external_interrupt_source
- + opic->nr_external_interrupts);
- opic->timer_interrupt_source = (opic->interprocessor_interrupt_source
- + opic->nr_interprocessor_interrupts);
- }
- for (i = 0; i < opic->nr_interrupt_sources; i++) {
- opic_interrupt_source *source = &opic->interrupt_source[i];
- source->nr = i;
- source->is_masked = isu_mask_bit;
- }
- DTRACE(opic, ("interrupt sources - external %d, timer %d, ipi %d, total %d\n",
- opic->nr_external_interrupts,
- opic->nr_timer_interrupts,
- opic->nr_interprocessor_interrupts,
- opic->nr_interrupt_sources));
-
-
- /* timers or interprocessor interrupts */
- if (opic->timer != NULL)
- memset(opic->timer, 0, opic->sizeof_timer);
- else {
- opic->nr_timer_interrupts = 4;
- opic->sizeof_timer = sizeof(opic_timer) * opic->nr_timer_interrupts;
- opic->timer = zalloc(opic->sizeof_timer);
- }
- for (i = 0; i < opic->nr_timer_interrupts; i++) {
- opic_timer *timer = &opic->timer[i];
- timer->nr = i;
- timer->me = me;
- timer->opic = opic;
- timer->inhibited = 1;
- timer->interrupt_source = &opic->timer_interrupt_source[i];
- }
- if (device_find_property(me, "timer-frequency"))
- opic->timer_frequency = device_find_integer_property(me, "timer-frequency");
- else
- opic->timer_frequency = 1;
-
-
- /* create space for the interrupt destination registers */
- if (opic->interrupt_destination != NULL) {
- memset(opic->interrupt_destination, 0, opic->sizeof_interrupt_destination);
- }
- else {
- opic->nr_interrupt_destinations = tree_find_integer_property(me, "/openprom/options/smp");
- opic->sizeof_interrupt_destination = (sizeof(opic_interrupt_destination)
- * opic->nr_interrupt_destinations);
- opic->interrupt_destination = zalloc(opic->sizeof_interrupt_destination);
- if (opic->nr_interrupt_destinations > max_nr_interrupt_destinations)
- device_error(me, "number of interrupt destinations exceeded");
- }
- for (i = 0; i < opic->nr_interrupt_destinations; i++) {
- opic_interrupt_destination *dest = &opic->interrupt_destination[i];
- dest->bit = (1 << i);
- dest->nr = i;
- dest->init_port = (device_interrupt_decode(me, "init0", output_port)
- + i);
- dest->intr_port = (device_interrupt_decode(me, "intr0", output_port)
- + i);
- dest->base_priority = max_nr_task_priorities - 1;
- }
- DTRACE(opic, ("interrupt destinations - total %d\n",
- (int)opic->nr_interrupt_destinations));
-
-
- /* verify and print out the ISU's */
- for (isb = 0; isb < opic->nr_isu_blocks; isb++) {
- unsigned correct_size;
- if ((opic->isu_block[isb].address % opic_alignment) != 0)
- device_error(me, "interrupt source unit %d address not aligned to %d byte boundary",
- isb, opic_alignment);
- correct_size = opic->isu_block[isb].range * sizeof_isu_register_block;
- if (opic->isu_block[isb].size != correct_size)
- device_error(me, "interrupt source unit %d (reg %d) has an incorrect size, should be 0x%x",
- isb, opic->isu_block[isb].reg, correct_size);
- DTRACE(opic, ("interrupt source unit block %ld - address %d:0x%lx, size 0x%lx, int-number %ld, range %ld\n",
- (long)isb,
- (int)opic->isu_block[isb].space,
- (unsigned long)opic->isu_block[isb].address,
- (unsigned long)opic->isu_block[isb].size,
- (long)opic->isu_block[isb].int_number,
- (long)opic->isu_block[isb].range));
- }
-
-
- /* verify and print out the IDU */
- {
- unsigned correct_size;
- unsigned alternate_size;
- if ((opic->idu.address % opic_alignment) != 0)
- device_error(me, "interrupt delivery unit not aligned to %d byte boundary",
- opic_alignment);
- correct_size = (idu_per_processor_register_base
- + (sizeof_idu_per_processor_register_block
- * opic->nr_interrupt_destinations));
- alternate_size = (idu_per_processor_register_base
- + (sizeof_idu_per_processor_register_block
- * max_nr_interrupt_destinations));
- if (opic->idu.size != correct_size
- && opic->idu.size != alternate_size)
- device_error(me, "interrupt delivery unit has incorrect size, should be 0x%x or 0x%x",
- correct_size, alternate_size);
- DTRACE(opic, ("interrupt delivery unit - address %d:0x%lx, size 0x%lx\n",
- (int)opic->idu.space,
- (unsigned long)opic->idu.address,
- (unsigned long)opic->idu.size));
- }
-
- /* initialize the init interrupts */
- opic->init = 0;
-
-
- /* vendor ident */
- if (device_find_property(me, "vendor-identification") != NULL)
- opic->vendor_identification = device_find_integer_property(me, "vendor-identification");
- else
- opic->vendor_identification = 0;
-
- /* misc registers */
- opic->spurious_vector = 0xff;
-
-}
-
-
-/* interrupt related actions */
-
-static void
-assert_interrupt(device *me,
- hw_opic_device *opic,
- opic_interrupt_destination *dest)
-{
- ASSERT(dest >= opic->interrupt_destination);
- ASSERT(dest < opic->interrupt_destination + opic->nr_interrupt_destinations);
- DTRACE(opic, ("assert interrupt - intr port %d\n", dest->intr_port));
- device_interrupt_event(me, dest->intr_port, 1, NULL, 0);
-}
-
-
-static void
-negate_interrupt(device *me,
- hw_opic_device *opic,
- opic_interrupt_destination *dest)
-{
- ASSERT(dest >= opic->interrupt_destination);
- ASSERT(dest < opic->interrupt_destination + opic->nr_interrupt_destinations);
- DTRACE(opic, ("negate interrupt - intr port %d\n", dest->intr_port));
- device_interrupt_event(me, dest->intr_port, 0, NULL, 0);
-}
-
-
-static int
-can_deliver(device *me,
- opic_interrupt_source *source,
- opic_interrupt_destination *dest)
-{
- return (source != NULL && dest != NULL
- && source->priority > dest->base_priority
- && (dest->current_in_service == NULL
- || source->priority > dest->current_in_service->priority));
-}
-
-
-static unsigned
-deliver_pending(device *me,
- hw_opic_device *opic,
- opic_interrupt_destination *dest)
-{
- ASSERT(can_deliver(me, dest->current_pending, dest));
- dest->current_in_service = dest->current_pending;
- dest->current_in_service->in_service |= dest->bit;
- if (!dest->current_pending->is_level_triggered) {
- if (dest->current_pending->is_multicast)
- dest->current_pending->pending &= ~dest->bit;
- else
- dest->current_pending->pending = 0;
- }
- dest->current_pending = NULL;
- negate_interrupt(me, opic, dest);
- return dest->current_in_service->vector;
-}
-
-
-typedef enum {
- pending_interrupt,
- in_service_interrupt,
-} interrupt_class;
-
-static opic_interrupt_source *
-find_interrupt_for_dest(device *me,
- hw_opic_device *opic,
- opic_interrupt_destination *dest,
- interrupt_class class)
-{
- int i;
- opic_interrupt_source *pending = NULL;
- for (i = 0; i < opic->nr_interrupt_sources; i++) {
- opic_interrupt_source *src = &opic->interrupt_source[i];
- /* is this a potential hit? */
- switch (class) {
- case in_service_interrupt:
- if ((src->in_service & dest->bit) == 0)
- continue;
- break;
- case pending_interrupt:
- if ((src->pending & dest->bit) == 0)
- continue;
- break;
- }
- /* see if it is the highest priority */
- if (pending == NULL)
- pending = src;
- else if (src->priority > pending->priority)
- pending = src;
- }
- return pending;
-}
-
-
-static opic_interrupt_destination *
-find_lowest_dest(device *me,
- hw_opic_device *opic,
- opic_interrupt_source *src)
-{
- int i;
- opic_interrupt_destination *lowest = NULL;
- for (i = 0; i < opic->nr_interrupt_destinations; i++) {
- opic_interrupt_destination *dest = &opic->interrupt_destination[i];
- if (src->destination & dest->bit) {
- if (dest->base_priority < src->priority) {
- if (lowest == NULL)
- lowest = dest;
- else if (lowest->base_priority > dest->base_priority)
- lowest = dest;
- else if (lowest->current_in_service != NULL
- && dest->current_in_service == NULL)
- lowest = dest; /* not doing anything */
- else if (lowest->current_in_service != NULL
- && dest->current_in_service != NULL
- && (lowest->current_in_service->priority
- > dest->current_in_service->priority))
- lowest = dest; /* less urgent */
- /* FIXME - need to be more fair */
- }
- }
- }
- return lowest;
-}
-
-
-static void
-handle_interrupt(device *me,
- hw_opic_device *opic,
- opic_interrupt_source *src,
- int asserted)
-{
- if (src->is_masked) {
- DTRACE(opic, ("interrupt %d - ignore masked\n", src->nr));
- }
- else if (src->is_multicast) {
- /* always try to deliver multicast interrupts - just easier */
- int i;
- ASSERT(!src->is_level_triggered);
- ASSERT(src->is_positive_polarity);
- ASSERT(asserted);
- for (i = 0; i < opic->nr_interrupt_destinations; i++) {
- opic_interrupt_destination *dest = &opic->interrupt_destination[i];
- if (src->destination & dest->bit) {
- if (src->pending & dest->bit) {
- DTRACE(opic, ("interrupt %d - multicast still pending to %d\n",
- src->nr, dest->nr));
- }
- else if (can_deliver(me, src, dest)) {
- dest->current_pending = src;
- src->pending |= dest->bit;
- assert_interrupt(me, opic, dest);
- DTRACE(opic, ("interrupt %d - multicast to %d\n",
- src->nr, dest->nr));
- }
- else {
- src->pending |= dest->bit;
- DTRACE(opic, ("interrupt %d - multicast pending to %d\n",
- src->nr, dest->nr));
- }
- }
- }
- }
- else if (src->is_level_triggered
- && src->is_positive_polarity
- && !asserted) {
- if (src->pending)
- DTRACE(opic, ("interrupt %d - ignore withdrawn (active high)\n",
- src->nr));
- else
- DTRACE(opic, ("interrupt %d - ignore low level (active high)\n",
- src->nr));
- ASSERT(!src->is_multicast);
- src->pending = 0;
- }
- else if (src->is_level_triggered
- && !src->is_positive_polarity
- && asserted) {
- if (src->pending)
- DTRACE(opic, ("interrupt %d - ignore withdrawn (active low)\n",
- src->nr));
- else
- DTRACE(opic, ("interrupt %d - ignore high level (active low)\n",
- src->nr));
-
- ASSERT(!src->is_multicast);
- src->pending = 0;
- }
- else if (!src->is_level_triggered
- && src->is_positive_polarity
- && !asserted) {
- DTRACE(opic, ("interrupt %d - ignore falling edge (positive edge trigered)\n",
- src->nr));
- }
- else if (!src->is_level_triggered
- && !src->is_positive_polarity
- && asserted) {
- DTRACE(opic, ("interrupt %d - ignore rising edge (negative edge trigered)\n",
- src->nr));
- }
- else if (src->in_service != 0) {
- /* leave the interrupt where it is */
- ASSERT(!src->is_multicast);
- ASSERT(src->pending == 0 || src->pending == src->in_service);
- src->pending = src->in_service;
- DTRACE(opic, ("interrupt %ld - ignore already in service to 0x%lx\n",
- (long)src->nr, (long)src->in_service));
- }
- else if (src->pending != 0) {
- DTRACE(opic, ("interrupt %ld - ignore still pending to 0x%lx\n",
- (long)src->nr, (long)src->pending));
- }
- else {
- /* delivery is needed */
- opic_interrupt_destination *dest = find_lowest_dest(me, opic, src);
- if (can_deliver(me, src, dest)) {
- dest->current_pending = src;
- src->pending = dest->bit;
- DTRACE(opic, ("interrupt %d - delivered to %d\n", src->nr, dest->nr));
- assert_interrupt(me, opic, dest);
- }
- else {
- src->pending = src->destination; /* any can take this */
- DTRACE(opic, ("interrupt %ld - pending to 0x%lx\n",
- (long)src->nr, (long)src->pending));
- }
- }
-}
-
-static unsigned
-do_interrupt_acknowledge_register_N_read(device *me,
- hw_opic_device *opic,
- int dest_nr)
-{
- opic_interrupt_destination *dest = &opic->interrupt_destination[dest_nr];
- unsigned vector;
-
- ASSERT(dest_nr >= 0 && dest_nr < opic->nr_interrupt_destinations);
- ASSERT(dest_nr == dest->nr);
-
- /* try the current pending */
- if (can_deliver(me, dest->current_pending, dest)) {
- ASSERT(dest->current_pending->pending & dest->bit);
- vector = deliver_pending(me, opic, dest);
- DTRACE(opic, ("interrupt ack %d - entering %d (pending) - vector %d (%d), priority %d\n",
- dest->nr,
- dest->current_in_service->nr,
- dest->current_in_service->vector, vector,
- dest->current_in_service->priority));
- }
- else {
- /* try for something else */
- dest->current_pending = find_interrupt_for_dest(me, opic, dest, pending_interrupt);
- if (can_deliver(me, dest->current_pending, dest)) {
- vector = deliver_pending(me, opic, dest);
- DTRACE(opic, ("interrupt ack %d - entering %d (not pending) - vector %d (%d), priority %d\n",
- dest->nr,
- dest->current_in_service->nr,
- dest->current_in_service->vector, vector,
- dest->current_in_service->priority));
- }
- else {
- dest->current_pending = NULL;
- vector = opic->spurious_vector;
- DTRACE(opic, ("interrupt ack %d - spurious interrupt %d\n",
- dest->nr, vector));
- }
- }
- return vector;
-}
-
-
-static void
-do_end_of_interrupt_register_N_write(device *me,
- hw_opic_device *opic,
- int dest_nr,
- unsigned reg)
-{
- opic_interrupt_destination *dest = &opic->interrupt_destination[dest_nr];
-
- ASSERT(dest_nr >= 0 && dest_nr < opic->nr_interrupt_destinations);
- ASSERT(dest_nr == dest->nr);
-
- /* check the value written is zero */
- if (reg != 0) {
- DTRACE(opic, ("eoi %d - ignoring nonzero value\n", dest->nr));
- }
-
- /* user doing wierd things? */
- if (dest->current_in_service == NULL) {
- DTRACE(opic, ("eoi %d - strange, no current interrupt\n", dest->nr));
- return;
- }
-
- /* an internal stuff up? */
- if (!(dest->current_in_service->in_service & dest->bit)) {
- device_error(me, "eoi %d - current interrupt not in service", dest->nr);
- }
-
- /* find what was probably the previous in service interrupt */
- dest->current_in_service->in_service &= ~dest->bit;
- DTRACE(opic, ("eoi %d - ending %d - priority %d, vector %d\n",
- dest->nr,
- dest->current_in_service->nr,
- dest->current_in_service->priority,
- dest->current_in_service->vector));
- dest->current_in_service = find_interrupt_for_dest(me, opic, dest, in_service_interrupt);
- if (dest->current_in_service != NULL)
- DTRACE(opic, ("eoi %d - resuming %d - priority %d, vector %d\n",
- dest->nr,
- dest->current_in_service->nr,
- dest->current_in_service->priority,
- dest->current_in_service->vector));
- else
- DTRACE(opic, ("eoi %d - resuming none\n", dest->nr));
-
- /* check to see if that shouldn't be interrupted */
- dest->current_pending = find_interrupt_for_dest(me, opic, dest, pending_interrupt);
- if (can_deliver(me, dest->current_pending, dest)) {
- ASSERT(dest->current_pending->pending & dest->bit);
- assert_interrupt(me, opic, dest);
- }
- else {
- dest->current_pending = NULL;
- }
-}
-
-
-static void
-decode_opic_address(device *me,
- hw_opic_device *opic,
- int space,
- unsigned_word address,
- unsigned nr_bytes,
- opic_register *type,
- int *index)
-{
- int isb = 0;
-
- /* is the size valid? */
- if (nr_bytes != 4) {
- *type = invalid_opic_register;
- *index = -1;
- return;
- }
-
- /* try for a per-processor register within the interrupt delivery
- unit */
- if (space == opic->idu.space
- && address >= (opic->idu.address + idu_per_processor_register_base)
- && address < (opic->idu.address + idu_per_processor_register_base
- + (sizeof_idu_per_processor_register_block
- * opic->nr_interrupt_destinations))) {
- unsigned_word block_offset = (address
- - opic->idu.address
- - idu_per_processor_register_base);
- unsigned_word offset = block_offset % sizeof_idu_per_processor_register_block;
- *index = block_offset / sizeof_idu_per_processor_register_block;
- switch (offset) {
- case 0x040:
- *type = ipi_N_dispatch_register;
- *index = 0;
- break;
- case 0x050:
- *type = ipi_N_dispatch_register;
- *index = 1;
- break;
- case 0x060:
- *type = ipi_N_dispatch_register;
- *index = 2;
- break;
- case 0x070:
- *type = ipi_N_dispatch_register;
- *index = 3;
- break;
- case 0x080:
- *type = current_task_priority_register_N;
- break;
- case 0x0a0:
- *type = interrupt_acknowledge_register_N;
- break;
- case 0x0b0:
- *type = end_of_interrupt_register_N;
- break;
- default:
- *type = invalid_opic_register;
- break;
- }
- DTRACE(opic, ("per-processor register %d:0x%lx - %s[%d]\n",
- space, (unsigned long)address,
- opic_register_name(*type),
- *index));
- return;
- }
-
- /* try for an interrupt source unit */
- for (isb = 0; isb < opic->nr_isu_blocks; isb++) {
- if (opic->isu_block[isb].space == space
- && address >= opic->isu_block[isb].address
- && address < (opic->isu_block[isb].address + opic->isu_block[isb].size)) {
- unsigned_word block_offset = address - opic->isu_block[isb].address;
- unsigned_word offset = block_offset % sizeof_isu_register_block;
- *index = (opic->isu_block[isb].int_number
- + (block_offset / sizeof_isu_register_block));
- switch (offset) {
- case 0x00:
- *type = interrupt_source_N_vector_priority_register;
- break;
- case 0x10:
- *type = interrupt_source_N_destination_register;
- break;
- default:
- *type = invalid_opic_register;
- break;
- }
- DTRACE(opic, ("isu register %d:0x%lx - %s[%d]\n",
- space, (unsigned long)address,
- opic_register_name(*type),
- *index));
- return;
- }
- }
-
- /* try for a timer */
- if (space == opic->idu.space
- && address >= (opic->idu.address + idu_timer_base)
- && address < (opic->idu.address + idu_timer_base
- + opic->nr_timer_interrupts * sizeof_timer_register_block)) {
- unsigned_word offset = address % sizeof_timer_register_block;
- *index = ((address - opic->idu.address - idu_timer_base)
- / sizeof_timer_register_block);
- switch (offset) {
- case 0x00:
- *type = timer_N_current_count_register;
- break;
- case 0x10:
- *type = timer_N_base_count_register;
- break;
- case 0x20:
- *type = timer_N_vector_priority_register;
- break;
- case 0x30:
- *type = timer_N_destination_register;
- break;
- default:
- *type = invalid_opic_register;
- break;
- }
- DTRACE(opic, ("timer register %d:0x%lx - %s[%d]\n",
- space, (unsigned long)address,
- opic_register_name(*type),
- *index));
- return;
- }
-
- /* finally some other misc global register */
- if (space == opic->idu.space
- && address >= opic->idu.address
- && address < opic->idu.address + opic->idu.size) {
- unsigned_word block_offset = address - opic->idu.address;
- switch (block_offset) {
- case 0x010f0:
- *type = timer_frequency_reporting_register;
- *index = -1;
- break;
- case 0x010e0:
- *type = spurious_vector_register;
- *index = -1;
- break;
- case 0x010d0:
- case 0x010c0:
- case 0x010b0:
- case 0x010a0:
- *type = ipi_N_vector_priority_register;
- *index = (block_offset - 0x010a0) / 16;
- break;
- case 0x01090:
- *type = processor_init_register;
- *index = -1;
- break;
- case 0x01080:
- *type = vendor_identification_register;
- *index = -1;
- break;
- case 0x01020:
- *type = global_configuration_register_N;
- *index = 0;
- break;
- case 0x01000:
- *type = feature_reporting_register_N;
- *index = 0;
- break;
- default:
- *type = invalid_opic_register;
- *index = -1;
- break;
- }
- DTRACE(opic, ("global register %d:0x%lx - %s[%d]\n",
- space, (unsigned long)address,
- opic_register_name(*type),
- *index));
- return;
- }
-
- /* nothing matched */
- *type = invalid_opic_register;
- DTRACE(opic, ("invalid register %d:0x%lx\n",
- space, (unsigned long)address));
- return;
-}
-
-
-/* Processor init register:
-
- The bits in this register (one per processor) are directly wired to
- output "init" interrupt ports. */
-
-static unsigned
-do_processor_init_register_read(device *me,
- hw_opic_device *opic)
-{
- unsigned reg = opic->init;
- DTRACE(opic, ("processor init register - read 0x%lx\n",
- (long)reg));
- return reg;
-}
-
-static void
-do_processor_init_register_write(device *me,
- hw_opic_device *opic,
- unsigned reg)
-{
- int i;
- for (i = 0; i < opic->nr_interrupt_destinations; i++) {
- opic_interrupt_destination *dest = &opic->interrupt_destination[i];
- if ((reg & dest->bit) != (opic->init & dest->bit)) {
- if (reg & dest->bit) {
- DTRACE(opic, ("processor init register - write 0x%lx - asserting init%d\n",
- (long)reg, i));
- opic->init |= dest->bit;
- device_interrupt_event(me, dest->init_port, 1, NULL, 0);
- }
- else {
- DTRACE(opic, ("processor init register - write 0x%lx - negating init%d\n",
- (long)reg, i));
- opic->init &= ~dest->bit;
- device_interrupt_event(me, dest->init_port, 0, NULL, 0);
- }
- }
- }
-}
-
-
-
-/* Interrupt Source Vector/Priority Register: */
-
-static unsigned
-read_vector_priority_register(device *me,
- hw_opic_device *opic,
- opic_interrupt_source *interrupt,
- const char *reg_name,
- int reg_index)
-{
- unsigned reg;
- reg = 0;
- reg |= interrupt->is_masked;
- reg |= (interrupt->in_service || interrupt->pending
- ? isu_active_bit : 0); /* active */
- reg |= interrupt->is_multicast;
- reg |= interrupt->is_positive_polarity;
- reg |= interrupt->is_level_triggered; /* sense? */
- reg |= interrupt->priority << isu_priority_shift;
- reg |= interrupt->vector;
- DTRACE(opic, ("%s %d vector/priority register - read 0x%lx\n",
- reg_name, reg_index, (unsigned long)reg));
- return reg;
-}
-
-static unsigned
-do_interrupt_source_N_vector_priority_register_read(device *me,
- hw_opic_device *opic,
- int index)
-{
- unsigned reg;
- ASSERT(index < opic->nr_external_interrupts);
- reg = read_vector_priority_register(me, opic,
- &opic->interrupt_source[index],
- "interrupt source", index);
- return reg;
-}
-
-static void
-write_vector_priority_register(device *me,
- hw_opic_device *opic,
- opic_interrupt_source *interrupt,
- unsigned reg,
- const char *reg_name,
- int reg_index)
-{
- interrupt->is_masked = (reg & isu_mask_bit);
- interrupt->is_multicast = (reg & isu_multicast_bit);
- interrupt->is_positive_polarity = (reg & isu_positive_polarity_bit);
- interrupt->is_level_triggered = (reg & isu_level_triggered_bit);
- interrupt->priority = ((reg >> isu_priority_shift)
- % max_nr_task_priorities);
- interrupt->vector = (reg & isu_vector_bits);
- DTRACE(opic, ("%s %d vector/priority register - write 0x%lx - %s%s%s-polarity, %s-triggered, priority %ld vector %ld\n",
- reg_name,
- reg_index,
- (unsigned long)reg,
- interrupt->is_masked ? "masked, " : "",
- interrupt->is_multicast ? "multicast, " : "",
- interrupt->is_positive_polarity ? "positive" : "negative",
- interrupt->is_level_triggered ? "level" : "edge",
- (long)interrupt->priority,
- (long)interrupt->vector));
-}
-
-static void
-do_interrupt_source_N_vector_priority_register_write(device *me,
- hw_opic_device *opic,
- int index,
- unsigned reg)
-{
- ASSERT(index < opic->nr_external_interrupts);
- reg &= ~isu_multicast_bit; /* disable multicast */
- write_vector_priority_register(me, opic,
- &opic->interrupt_source[index],
- reg, "interrupt source", index);
-}
-
-
-
-/* Interrupt Source Destination Register: */
-
-static unsigned
-read_destination_register(device *me,
- hw_opic_device *opic,
- opic_interrupt_source *interrupt,
- const char *reg_name,
- int reg_index)
-{
- unsigned long reg;
- reg = interrupt->destination;
- DTRACE(opic, ("%s %d destination register - read 0x%lx\n",
- reg_name, reg_index, reg));
- return reg;
-}
-
-static unsigned
-do_interrupt_source_N_destination_register_read(device *me,
- hw_opic_device *opic,
- int index)
-{
- unsigned reg;
- ASSERT(index < opic->nr_external_interrupts);
- reg = read_destination_register(me, opic, &opic->external_interrupt_source[index],
- "interrupt source", index);
- return reg;
-}
-
-static void
-write_destination_register(device *me,
- hw_opic_device *opic,
- opic_interrupt_source *interrupt,
- unsigned reg,
- const char *reg_name,
- int reg_index)
-{
- reg &= (1 << opic->nr_interrupt_destinations) - 1; /* mask out invalid */
- DTRACE(opic, ("%s %d destination register - write 0x%x\n",
- reg_name, reg_index, reg));
- interrupt->destination = reg;
-}
-
-static void
-do_interrupt_source_N_destination_register_write(device *me,
- hw_opic_device *opic,
- int index,
- unsigned reg)
-{
- ASSERT(index < opic->nr_external_interrupts);
- write_destination_register(me, opic, &opic->external_interrupt_source[index],
- reg, "interrupt source", index);
-}
-
-
-
-/* Spurious vector register: */
-
-static unsigned
-do_spurious_vector_register_read(device *me,
- hw_opic_device *opic)
-{
- unsigned long reg = opic->spurious_vector;
- DTRACE(opic, ("spurious vector register - read 0x%lx\n", reg));
- return reg;
-}
-
-static void
-do_spurious_vector_register_write(device *me,
- hw_opic_device *opic,
- unsigned reg)
-{
- reg &= 0xff; /* mask off invalid */
- DTRACE(opic, ("spurious vector register - write 0x%x\n", reg));
- opic->spurious_vector = reg;
-}
-
-
-
-/* current task priority register: */
-
-static unsigned
-do_current_task_priority_register_N_read(device *me,
- hw_opic_device *opic,
- int index)
-{
- opic_interrupt_destination *interrupt_destination = &opic->interrupt_destination[index];
- unsigned reg;
- ASSERT(index >= 0 && index < opic->nr_interrupt_destinations);
- reg = interrupt_destination->base_priority;
- DTRACE(opic, ("current task priority register %d - read 0x%x\n", index, reg));
- return reg;
-}
-
-static void
-do_current_task_priority_register_N_write(device *me,
- hw_opic_device *opic,
- int index,
- unsigned reg)
-{
- opic_interrupt_destination *interrupt_destination = &opic->interrupt_destination[index];
- ASSERT(index >= 0 && index < opic->nr_interrupt_destinations);
- reg %= max_nr_task_priorities;
- DTRACE(opic, ("current task priority register %d - write 0x%x\n", index, reg));
- interrupt_destination->base_priority = reg;
-}
-
-
-
-/* Timer Frequency Reporting Register: */
-
-static unsigned
-do_timer_frequency_reporting_register_read(device *me,
- hw_opic_device *opic)
-{
- unsigned reg;
- reg = opic->timer_frequency;
- DTRACE(opic, ("timer frequency reporting register - read 0x%x\n", reg));
- return reg;
-}
-
-static void
-do_timer_frequency_reporting_register_write(device *me,
- hw_opic_device *opic,
- unsigned reg)
-{
- DTRACE(opic, ("timer frequency reporting register - write 0x%x\n", reg));
- opic->timer_frequency = reg;
-}
-
-
-/* timer registers: */
-
-static unsigned
-do_timer_N_current_count_register_read(device *me,
- hw_opic_device *opic,
- int index)
-{
- opic_timer *timer = &opic->timer[index];
- unsigned reg;
- ASSERT(index >= 0 && index < opic->nr_timer_interrupts);
- if (timer->inhibited)
- reg = timer->count; /* stalled value */
- else
- reg = timer->count - device_event_queue_time(me); /* time remaining */
- DTRACE(opic, ("timer %d current count register - read 0x%x\n", index, reg));
- return reg;
-}
-
-
-static unsigned
-do_timer_N_base_count_register_read(device *me,
- hw_opic_device *opic,
- int index)
-{
- opic_timer *timer = &opic->timer[index];
- unsigned reg;
- ASSERT(index >= 0 && index < opic->nr_timer_interrupts);
- reg = timer->base_count;
- DTRACE(opic, ("timer %d base count register - read 0x%x\n", index, reg));
- return reg;
-}
-
-
-static void
-timer_event(void *data)
-{
- opic_timer *timer = data;
- device *me = timer->me;
- if (timer->inhibited)
- device_error(timer->me, "internal-error - timer event occured when timer %d inhibited",
- timer->nr);
- handle_interrupt(timer->me, timer->opic, timer->interrupt_source, 1);
- timer->timeout_event = device_event_queue_schedule(me, timer->base_count,
- timer_event, timer);
- DTRACE(opic, ("timer %d - interrupt at %ld, next at %d\n",
- timer->nr, (long)device_event_queue_time(me), timer->base_count));
-}
-
-
-static void
-do_timer_N_base_count_register_write(device *me,
- hw_opic_device *opic,
- int index,
- unsigned reg)
-{
- opic_timer *timer = &opic->timer[index];
- int inhibit;
- ASSERT(index >= 0 && index < opic->nr_timer_interrupts);
- inhibit = reg & 0x80000000;
- if (timer->inhibited && !inhibit) {
- timer->inhibited = 0;
- if (timer->timeout_event != NULL)
- device_event_queue_deschedule(me, timer->timeout_event);
- timer->count = device_event_queue_time(me) + reg;
- timer->base_count = reg;
- timer->timeout_event = device_event_queue_schedule(me, timer->base_count,
- timer_event, (void*)timer);
- DTRACE(opic, ("timer %d base count register - write 0x%x - timer started\n",
- index, reg));
- }
- else if (!timer->inhibited && inhibit) {
- if (timer->timeout_event != NULL)
- device_event_queue_deschedule(me, timer->timeout_event);
- timer->count = timer->count - device_event_queue_time(me);
- timer->inhibited = 1;
- timer->base_count = reg;
- DTRACE(opic, ("timer %d base count register - write 0x%x - timer stopped\n",
- index, reg));
- }
- else {
- ASSERT((timer->inhibited && inhibit) || (!timer->inhibited && !inhibit));
- DTRACE(opic, ("timer %d base count register - write 0x%x\n", index, reg));
- timer->base_count = reg;
- }
-}
-
-
-static unsigned
-do_timer_N_vector_priority_register_read(device *me,
- hw_opic_device *opic,
- int index)
-{
- unsigned reg;
- ASSERT(index >= 0 && index < opic->nr_timer_interrupts);
- reg = read_vector_priority_register(me, opic,
- &opic->timer_interrupt_source[index],
- "timer", index);
- return reg;
-}
-
-static void
-do_timer_N_vector_priority_register_write(device *me,
- hw_opic_device *opic,
- int index,
- unsigned reg)
-{
- ASSERT(index >= 0 && index < opic->nr_timer_interrupts);
- reg &= ~isu_level_triggered_bit; /* force edge trigger */
- reg |= isu_positive_polarity_bit; /* force rising (positive) edge */
- reg |= isu_multicast_bit; /* force multicast */
- write_vector_priority_register(me, opic,
- &opic->timer_interrupt_source[index],
- reg, "timer", index);
-}
-
-
-static unsigned
-do_timer_N_destination_register_read(device *me,
- hw_opic_device *opic,
- int index)
-{
- unsigned reg;
- ASSERT(index >= 0 && index < opic->nr_timer_interrupts);
- reg = read_destination_register(me, opic, &opic->timer_interrupt_source[index],
- "timer", index);
- return reg;
-}
-
-static void
-do_timer_N_destination_register_write(device *me,
- hw_opic_device *opic,
- int index,
- unsigned reg)
-{
- ASSERT(index >= 0 && index < opic->nr_timer_interrupts);
- write_destination_register(me, opic, &opic->timer_interrupt_source[index],
- reg, "timer", index);
-}
-
-
-/* IPI registers */
-
-static unsigned
-do_ipi_N_vector_priority_register_read(device *me,
- hw_opic_device *opic,
- int index)
-{
- unsigned reg;
- ASSERT(index >= 0 && index < opic->nr_interprocessor_interrupts);
- reg = read_vector_priority_register(me, opic,
- &opic->interprocessor_interrupt_source[index],
- "ipi", index);
- return reg;
-}
-
-static void
-do_ipi_N_vector_priority_register_write(device *me,
- hw_opic_device *opic,
- int index,
- unsigned reg)
-{
- ASSERT(index >= 0 && index < opic->nr_interprocessor_interrupts);
- reg &= ~isu_level_triggered_bit; /* force edge trigger */
- reg |= isu_positive_polarity_bit; /* force rising (positive) edge */
- reg |= isu_multicast_bit; /* force a multicast source */
- write_vector_priority_register(me, opic,
- &opic->interprocessor_interrupt_source[index],
- reg, "ipi", index);
-}
-
-static void
-do_ipi_N_dispatch_register_write(device *me,
- hw_opic_device *opic,
- int index,
- unsigned reg)
-{
- opic_interrupt_source *source = &opic->interprocessor_interrupt_source[index];
- ASSERT(index >= 0 && index < opic->nr_interprocessor_interrupts);
- DTRACE(opic, ("ipi %d interrupt dispatch register - write 0x%x\n", index, reg));
- source->destination = reg;
- handle_interrupt(me, opic, source, 1);
-}
-
-
-/* vendor and other global registers */
-
-static unsigned
-do_vendor_identification_register_read(device *me,
- hw_opic_device *opic)
-{
- unsigned reg;
- reg = opic->vendor_identification;
- DTRACE(opic, ("vendor identification register - read 0x%x\n", reg));
- return reg;
-}
-
-static unsigned
-do_feature_reporting_register_N_read(device *me,
- hw_opic_device *opic,
- int index)
-{
- unsigned reg = 0;
- ASSERT(index == 0);
- switch (index) {
- case 0:
- reg |= (opic->nr_external_interrupts << 16);
- reg |= (opic->nr_interrupt_destinations << 8);
- reg |= (2/*version 1.2*/);
- break;
- }
- DTRACE(opic, ("feature reporting register %d - read 0x%x\n", index, reg));
- return reg;
-}
-
-static unsigned
-do_global_configuration_register_N_read(device *me,
- hw_opic_device *opic,
- int index)
-{
- unsigned reg = 0;
- ASSERT(index == 0);
- switch (index) {
- case 0:
- reg |= gcr0_8259_bit; /* hardwire 8259 disabled */
- break;
- }
- DTRACE(opic, ("global configuration register %d - read 0x%x\n", index, reg));
- return reg;
-}
-
-static void
-do_global_configuration_register_N_write(device *me,
- hw_opic_device *opic,
- int index,
- unsigned reg)
-{
- ASSERT(index == 0);
- if (reg & gcr0_reset_bit) {
- DTRACE(opic, ("global configuration register %d - write 0x%x - reseting opic\n", index, reg));
- hw_opic_init_data(me);
- }
- if (!(reg & gcr0_8259_bit)) {
- DTRACE(opic, ("global configuration register %d - write 0x%x - ignoring 8259 enable\n", index, reg));
- }
-}
-
-
-
-/* register read-write */
-
-static unsigned
-hw_opic_io_read_buffer(device *me,
- void *dest,
- int space,
- unsigned_word addr,
- unsigned nr_bytes,
- cpu *processor,
- unsigned_word cia)
-{
- hw_opic_device *opic = (hw_opic_device*)device_data(me);
- opic_register type;
- int index;
- decode_opic_address(me, opic, space, addr, nr_bytes, &type, &index);
- if (type == invalid_opic_register) {
- device_error(me, "invalid opic read access to %d:0x%lx (%d bytes)",
- space, (unsigned long)addr, nr_bytes);
- }
- else {
- unsigned reg;
- switch (type) {
- case processor_init_register:
- reg = do_processor_init_register_read(me, opic);
- break;
- case interrupt_source_N_vector_priority_register:
- reg = do_interrupt_source_N_vector_priority_register_read(me, opic, index);
- break;
- case interrupt_source_N_destination_register:
- reg = do_interrupt_source_N_destination_register_read(me, opic, index);
- break;
- case interrupt_acknowledge_register_N:
- reg = do_interrupt_acknowledge_register_N_read(me, opic, index);
- break;
- case spurious_vector_register:
- reg = do_spurious_vector_register_read(me, opic);
- break;
- case current_task_priority_register_N:
- reg = do_current_task_priority_register_N_read(me, opic, index);
- break;
- case timer_frequency_reporting_register:
- reg = do_timer_frequency_reporting_register_read(me, opic);
- break;
- case timer_N_current_count_register:
- reg = do_timer_N_current_count_register_read(me, opic, index);
- break;
- case timer_N_base_count_register:
- reg = do_timer_N_base_count_register_read(me, opic, index);
- break;
- case timer_N_vector_priority_register:
- reg = do_timer_N_vector_priority_register_read(me, opic, index);
- break;
- case timer_N_destination_register:
- reg = do_timer_N_destination_register_read(me, opic, index);
- break;
- case ipi_N_vector_priority_register:
- reg = do_ipi_N_vector_priority_register_read(me, opic, index);
- break;
- case feature_reporting_register_N:
- reg = do_feature_reporting_register_N_read(me, opic, index);
- break;
- case global_configuration_register_N:
- reg = do_global_configuration_register_N_read(me, opic, index);
- break;
- case vendor_identification_register:
- reg = do_vendor_identification_register_read(me, opic);
- break;
- default:
- reg = 0;
- device_error(me, "unimplemented read of register %s[%d]",
- opic_register_name(type), index);
- }
- *(unsigned_4*)dest = H2LE_4(reg);
- }
- return nr_bytes;
-}
-
-
-static unsigned
-hw_opic_io_write_buffer(device *me,
- const void *source,
- int space,
- unsigned_word addr,
- unsigned nr_bytes,
- cpu *processor,
- unsigned_word cia)
-{
- hw_opic_device *opic = (hw_opic_device*)device_data(me);
- opic_register type;
- int index;
- decode_opic_address(me, opic, space, addr, nr_bytes, &type, &index);
- if (type == invalid_opic_register) {
- device_error(me, "invalid opic write access to %d:0x%lx (%d bytes)",
- space, (unsigned long)addr, nr_bytes);
- }
- else {
- unsigned reg = LE2H_4(*(unsigned_4*)source);
- switch (type) {
- case processor_init_register:
- do_processor_init_register_write(me, opic, reg);
- break;
- case interrupt_source_N_vector_priority_register:
- do_interrupt_source_N_vector_priority_register_write(me, opic, index, reg);
- break;
- case interrupt_source_N_destination_register:
- do_interrupt_source_N_destination_register_write(me, opic, index, reg);
- break;
- case end_of_interrupt_register_N:
- do_end_of_interrupt_register_N_write(me, opic, index, reg);
- break;
- case spurious_vector_register:
- do_spurious_vector_register_write(me, opic, reg);
- break;
- case current_task_priority_register_N:
- do_current_task_priority_register_N_write(me, opic, index, reg);
- break;
- case timer_frequency_reporting_register:
- do_timer_frequency_reporting_register_write(me, opic, reg);
- break;
- case timer_N_base_count_register:
- do_timer_N_base_count_register_write(me, opic, index, reg);
- break;
- case timer_N_vector_priority_register:
- do_timer_N_vector_priority_register_write(me, opic, index, reg);
- break;
- case timer_N_destination_register:
- do_timer_N_destination_register_write(me, opic, index, reg);
- break;
- case ipi_N_dispatch_register:
- do_ipi_N_dispatch_register_write(me, opic, index, reg);
- break;
- case ipi_N_vector_priority_register:
- do_ipi_N_vector_priority_register_write(me, opic, index, reg);
- break;
- case global_configuration_register_N:
- do_global_configuration_register_N_write(me, opic, index, reg);
- break;
- default:
- device_error(me, "unimplemented write to register %s[%d]",
- opic_register_name(type), index);
- }
- }
- return nr_bytes;
-}
-
-
-static void
-hw_opic_interrupt_event(device *me,
- int my_port,
- device *source,
- int source_port,
- int level,
- cpu *processor,
- unsigned_word cia)
-{
- hw_opic_device *opic = (hw_opic_device*)device_data(me);
-
- int isb;
- int src_nr = 0;
-
- /* find the corresponding internal input port */
- for (isb = 0; isb < opic->nr_isu_blocks; isb++) {
- if (my_port >= opic->isu_block[isb].int_number
- && my_port < opic->isu_block[isb].int_number + opic->isu_block[isb].range) {
- src_nr += my_port - opic->isu_block[isb].int_number;
- break;
- }
- else
- src_nr += opic->isu_block[isb].range;
- }
- if (isb == opic->nr_isu_blocks)
- device_error(me, "interrupt %d out of range", my_port);
- DTRACE(opic, ("external-interrupt %d, internal %d, level %d\n",
- my_port, src_nr, level));
-
- /* pass it on */
- ASSERT(src_nr >= 0 && src_nr < opic->nr_external_interrupts);
- handle_interrupt(me, opic, &opic->external_interrupt_source[src_nr], level);
-}
-
-
-static const device_interrupt_port_descriptor hw_opic_interrupt_ports[] = {
- { "irq", 0, max_nr_interrupt_sources, input_port, },
- { "intr", 0, max_nr_interrupt_destinations, output_port, },
- { "init", max_nr_interrupt_destinations, max_nr_interrupt_destinations, output_port, },
- { NULL }
-};
-
-
-static device_callbacks const hw_opic_callbacks = {
- { generic_device_init_address,
- hw_opic_init_data },
- { NULL, }, /* address */
- { hw_opic_io_read_buffer,
- hw_opic_io_write_buffer }, /* IO */
- { NULL, }, /* DMA */
- { hw_opic_interrupt_event, NULL, hw_opic_interrupt_ports }, /* interrupt */
- { NULL, }, /* unit */
- NULL, /* instance */
-};
-
-static void *
-hw_opic_create(const char *name,
- const device_unit *unit_address,
- const char *args)
-{
- hw_opic_device *opic = ZALLOC(hw_opic_device);
- return opic;
-}
-
-
-
-const device_descriptor hw_opic_device_descriptor[] = {
- { "opic", hw_opic_create, &hw_opic_callbacks },
- { NULL },
-};
-
-#endif /* _HW_OPIC_C_ */
diff --git a/sim/ppc/hw_pal.c b/sim/ppc/hw_pal.c
deleted file mode 100644
index a4256b94f3a..00000000000
--- a/sim/ppc/hw_pal.c
+++ /dev/null
@@ -1,366 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1996, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-#ifndef _HW_PAL_C_
-#define _HW_PAL_C_
-
-#ifndef STATIC_INLINE_HW_PAL
-#define STATIC_INLINE_HW_PAL STATIC_INLINE
-#endif
-
-#include "device_table.h"
-
-#include "cpu.h"
-
-#ifdef HAVE_STRING_H
-#include <string.h>
-#else
-#ifdef HAVE_STRINGS_H
-#include <strings.h>
-#endif
-#endif
-
-#ifdef HAVE_UNISTD_H
-#include <unistd.h>
-#endif
-#ifdef HAVE_STDLIB_H
-#include <stdlib.h>
-#endif
-
-
-/* DEVICE
-
-
- pal - glue logic device containing assorted junk
-
-
- DESCRIPTION
-
-
- Typical hardware dependant hack. This device allows the firmware
- to gain access to all the things the firmware needs (but the OS
- doesn't).
-
- The pal contains the following registers. Except for the interrupt
- level register, each of the below is 8 bytes in size and must be
- accessed using correct alignment. For 16 and 32 bit accesses the
- bytes not directed to the register are ignored:
-
- |0 reset register (write)
- |4 processor id register (read)
- |8 interrupt port (write)
- |9 interrupt level (write)
- |12 processor count register (read)
- |16 tty input fifo register (read)
- |20 tty input status register (read)
- |24 tty output fifo register (write)
- |28 tty output status register (read)
-
- Reset register (write) halts the simulator exiting with the
- value written.
-
- Processor id register (read) returns the processor number (0
- .. N-1) of the processor performing the read.
-
- The interrupt registers should be accessed as a pair (using a 16 or
- 32 bit store). The low byte specifies the interrupt port while the
- high byte specifies the level to drive that port at. By
- convention, the pal's interrupt ports (int0, int1, ...) are wired
- up to the corresponding processor's level sensative external
- interrupt pin. Eg: A two byte write to address 8 of 0x0102
- (big-endian) will result in processor 2's external interrupt pin to
- be asserted.
-
- Processor count register (read) returns the total number of
- processors active in the current simulation.
-
- TTY input fifo register (read), if the TTY input status register
- indicates a character is available by being nonzero, returns the
- next available character from the pal's tty input port.
-
- Similarly, the TTY output fifo register (write), if the TTY output
- status register indicates the output fifo is not full by being
- nonzero, outputs the character written to the tty's output port.
-
-
- PROPERTIES
-
-
- reg = <address> <size> (required)
-
- Specify the address (within the parent bus) that this device is to
- live.
-
-
- */
-
-
-enum {
- hw_pal_reset_register = 0x0,
- hw_pal_cpu_nr_register = 0x4,
- hw_pal_int_register = 0x8,
- hw_pal_nr_cpu_register = 0xa,
- hw_pal_read_fifo = 0x10,
- hw_pal_read_status = 0x14,
- hw_pal_write_fifo = 0x18,
- hw_pal_write_status = 0x1a,
- hw_pal_address_mask = 0x1f,
-};
-
-
-typedef struct _hw_pal_console_buffer {
- char buffer;
- int status;
-} hw_pal_console_buffer;
-
-typedef struct _hw_pal_device {
- hw_pal_console_buffer input;
- hw_pal_console_buffer output;
- device *disk;
-} hw_pal_device;
-
-
-/* check the console for an available character */
-static void
-scan_hw_pal(hw_pal_device *hw_pal)
-{
- char c;
- int count;
- count = sim_io_read_stdin(&c, sizeof(c));
- switch (count) {
- case sim_io_not_ready:
- case sim_io_eof:
- hw_pal->input.buffer = 0;
- hw_pal->input.status = 0;
- break;
- default:
- hw_pal->input.buffer = c;
- hw_pal->input.status = 1;
- }
-}
-
-/* write the character to the hw_pal */
-static void
-write_hw_pal(hw_pal_device *hw_pal,
- char val)
-{
- sim_io_write_stdout(&val, 1);
- hw_pal->output.buffer = val;
- hw_pal->output.status = 1;
-}
-
-
-static unsigned
-hw_pal_io_read_buffer_callback(device *me,
- void *dest,
- int space,
- unsigned_word addr,
- unsigned nr_bytes,
- cpu *processor,
- unsigned_word cia)
-{
- hw_pal_device *hw_pal = (hw_pal_device*)device_data(me);
- unsigned_1 val;
- switch (addr & hw_pal_address_mask) {
- case hw_pal_cpu_nr_register:
- val = cpu_nr(processor);
- DTRACE(pal, ("read - cpu-nr %d\n", val));
- break;
- case hw_pal_nr_cpu_register:
- val = tree_find_integer_property(me, "/openprom/options/smp");
- DTRACE(pal, ("read - nr-cpu %d\n", val));
- break;
- case hw_pal_read_fifo:
- val = hw_pal->input.buffer;
- DTRACE(pal, ("read - input-fifo %d\n", val));
- break;
- case hw_pal_read_status:
- scan_hw_pal(hw_pal);
- val = hw_pal->input.status;
- DTRACE(pal, ("read - input-status %d\n", val));
- break;
- case hw_pal_write_fifo:
- val = hw_pal->output.buffer;
- DTRACE(pal, ("read - output-fifo %d\n", val));
- break;
- case hw_pal_write_status:
- val = hw_pal->output.status;
- DTRACE(pal, ("read - output-status %d\n", val));
- break;
- default:
- val = 0;
- DTRACE(pal, ("read - ???\n"));
- }
- memset(dest, 0, nr_bytes);
- *(unsigned_1*)dest = val;
- return nr_bytes;
-}
-
-
-static unsigned
-hw_pal_io_write_buffer_callback(device *me,
- const void *source,
- int space,
- unsigned_word addr,
- unsigned nr_bytes,
- cpu *processor,
- unsigned_word cia)
-{
- hw_pal_device *hw_pal = (hw_pal_device*)device_data(me);
- unsigned_1 *byte = (unsigned_1*)source;
-
- switch (addr & hw_pal_address_mask) {
- case hw_pal_reset_register:
- cpu_halt(processor, cia, was_exited, byte[0]);
- break;
- case hw_pal_int_register:
- device_interrupt_event(me,
- byte[0], /*port*/
- (nr_bytes > 1 ? byte[1] : 0), /* val */
- processor, cia);
- break;
- case hw_pal_read_fifo:
- hw_pal->input.buffer = byte[0];
- DTRACE(pal, ("write - input-fifo %d\n", byte[0]));
- break;
- case hw_pal_read_status:
- hw_pal->input.status = byte[0];
- DTRACE(pal, ("write - input-status %d\n", byte[0]));
- break;
- case hw_pal_write_fifo:
- write_hw_pal(hw_pal, byte[0]);
- DTRACE(pal, ("write - output-fifo %d\n", byte[0]));
- break;
- case hw_pal_write_status:
- hw_pal->output.status = byte[0];
- DTRACE(pal, ("write - output-status %d\n", byte[0]));
- break;
- }
- return nr_bytes;
-}
-
-
-/* instances of the hw_pal device */
-
-static void
-hw_pal_instance_delete_callback(device_instance *instance)
-{
- /* nothing to delete, the hw_pal is attached to the device */
- return;
-}
-
-static int
-hw_pal_instance_read_callback(device_instance *instance,
- void *buf,
- unsigned_word len)
-{
- DITRACE(pal, ("read - %s (%ld)", (const char*)buf, (long int)len));
- return sim_io_read_stdin(buf, len);
-}
-
-static int
-hw_pal_instance_write_callback(device_instance *instance,
- const void *buf,
- unsigned_word len)
-{
- int i;
- const char *chp = buf;
- hw_pal_device *hw_pal = device_instance_data(instance);
- DITRACE(pal, ("write - %s (%ld)", (const char*)buf, (long int)len));
- for (i = 0; i < len; i++)
- write_hw_pal(hw_pal, chp[i]);
- sim_io_flush_stdoutput();
- return i;
-}
-
-static const device_instance_callbacks hw_pal_instance_callbacks = {
- hw_pal_instance_delete_callback,
- hw_pal_instance_read_callback,
- hw_pal_instance_write_callback,
-};
-
-static device_instance *
-hw_pal_create_instance(device *me,
- const char *path,
- const char *args)
-{
- return device_create_instance_from(me, NULL,
- device_data(me),
- path, args,
- &hw_pal_instance_callbacks);
-}
-
-static const device_interrupt_port_descriptor hw_pal_interrupt_ports[] = {
- { "int", 0, MAX_NR_PROCESSORS },
- { NULL }
-};
-
-
-static void
-hw_pal_attach_address(device *me,
- attach_type attach,
- int space,
- unsigned_word addr,
- unsigned nr_bytes,
- access_type access,
- device *client)
-{
- hw_pal_device *pal = (hw_pal_device*)device_data(me);
- pal->disk = client;
-}
-
-
-static device_callbacks const hw_pal_callbacks = {
- { generic_device_init_address, },
- { hw_pal_attach_address, }, /* address */
- { hw_pal_io_read_buffer_callback,
- hw_pal_io_write_buffer_callback, },
- { NULL, }, /* DMA */
- { NULL, NULL, hw_pal_interrupt_ports }, /* interrupt */
- { generic_device_unit_decode,
- generic_device_unit_encode,
- generic_device_address_to_attach_address,
- generic_device_size_to_attach_size },
- hw_pal_create_instance,
-};
-
-
-static void *
-hw_pal_create(const char *name,
- const device_unit *unit_address,
- const char *args)
-{
- /* create the descriptor */
- hw_pal_device *hw_pal = ZALLOC(hw_pal_device);
- hw_pal->output.status = 1;
- hw_pal->output.buffer = '\0';
- hw_pal->input.status = 0;
- hw_pal->input.buffer = '\0';
- return hw_pal;
-}
-
-
-const device_descriptor hw_pal_device_descriptor[] = {
- { "pal", hw_pal_create, &hw_pal_callbacks },
- { NULL },
-};
-
-#endif /* _HW_PAL_C_ */
diff --git a/sim/ppc/hw_phb.c b/sim/ppc/hw_phb.c
deleted file mode 100644
index 0071f59faf3..00000000000
--- a/sim/ppc/hw_phb.c
+++ /dev/null
@@ -1,1068 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1996, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-#ifndef _HW_PHB_C_
-#define _HW_PHB_C_
-
-#include "device_table.h"
-
-#include "hw_phb.h"
-
-#include "corefile.h"
-
-#ifdef HAVE_STDLIB_H
-#include <stdlib.h>
-#endif
-
-#include <ctype.h>
-
-
-/* DEVICE
-
-
- phb - PCI Host Bridge
-
-
- DESCRIPTION
-
-
- PHB implements a model of the PCI-host bridge described in the PPCP
- document.
-
- For bridge devices, Open Firmware specifies that the <<ranges>>
- property be used to specify the mapping of address spaces between a
- bridges parent and child busses. This PHB model configures itsself
- according to the information specified in its ranges property. The
- <<ranges>> property is described in detail in the Open Firmware
- documentation.
-
- For DMA transfers, any access to a PCI address space which falls
- outside of the mapped memory space is assumed to be a transfer
- intended for the parent bus.
-
-
- PROPERTIES
-
-
- ranges = <my-phys-addr> <parent-phys-addr> <my-size> ... (required)
-
- Define a number of mappings from the parent bus to one of this
- devices PCI busses. The exact format of the <<parent-phys-addr>>
- is parent bus dependant. The format of <<my-phys-addr>> is
- described in the Open Firmware PCI bindings document (note that the
- address must be non-relocatable).
-
-
- #address-cells = 3 (required)
-
- Number of cells used by an Open Firmware PCI address. This
- property must be defined before specifying the <<ranges>> property.
-
-
- #size-cells = 2 (required)
-
- Number of cells used by an Open Firmware PCI size. This property
- must be defined before specifying the <<ranges>> property.
-
-
- EXAMPLES
-
-
- Enable tracing:
-
- | $ psim \
- | -t phb-device \
-
-
- Since device tree entries that are specified on the command line
- are added before most of the device tree has been built it is often
- necessary to explictly add certain device properties and thus
- ensure they are already present in the device tree. For the
- <<phb>> one such property is parent busses <<#address-cells>>.
-
- | -o '/#address-cells 1' \
-
-
- Create the PHB remembering to include the cell size properties:
-
- | -o '/phb@0x80000000/#address-cells 3' \
- | -o '/phb@0x80000000/#size-cells 2' \
-
-
- Specify that the memory address range <<0x80000000>> to
- <<0x8fffffff>> should map directly onto the PCI memory address
- space while the processor address range <<0xc0000000>> to
- <<0xc000ffff>> should map onto the PCI I/O address range starting
- at location zero:
-
- | -o '/phb@0x80000000/ranges \
- | nm0,0,0,80000000 0x80000000 0x10000000 \
- | ni0,0,0,0 0xc0000000 0x10000' \
-
-
- Insert a 4k <<nvram>> into slot zero of the PCI bus. Have it
- directly accessible in both the I/O (address <<0x100>>) and memory
- (address 0x80001000) spaces:
-
- | -o '/phb@0x80000000/nvram@0/assigned-addresses \
- | nm0,0,10,80001000 4096 \
- | ni0,0,14,100 4096'
- | -o '/phb@0x80000000/nvram@0/reg \
- | 0 0 \
- | i0,0,14,0 4096'
- | -o '/phb@0x80000000/nvram@0/alternate-reg \
- | 0 0 \
- | m0,0,10,0 4096'
-
- The <<assigned-address>> property corresponding to what (if it were
- implemented) be found in the config base registers while the
- <<reg>> and <<alternative-reg>> properties indicating the location
- of registers within each address space.
-
- Of the possible addresses, only the non-relocatable versions are
- used when attaching the device to the bus.
-
-
- BUGS
-
-
- The implementation of the PCI configuration space is left as an
- exercise for the reader. Such a restriction should only impact on
- systems wanting to dynamically configure devices on the PCI bus.
-
- The <<CHRP>> document specfies additional (optional) functionality
- of the primary PHB. The implementation of such functionality is
- left as an exercise for the reader.
-
- The Open Firmware PCI bus bindings document (rev 1.6 and 2.0) is
- unclear on the value of the "ss" bits for a 64bit memory address.
- The correct value, as used by this module, is 0b11.
-
- The Open Firmware PCI bus bindings document (rev 1.6) suggests that
- the register field of non-relocatable PCI address should be zero.
- Unfortunatly, PCI addresses specified in the <<assigned-addresses>>
- property must be both non-relocatable and have non-zero register
- fields.
-
- The unit-decode method is not inserting a bus number into any
- address that it decodes. Instead the bus-number is left as zero.
-
- Support for aliased memory and I/O addresses is left as an exercise
- for the reader.
-
- Support for interrupt-ack and special cycles are left as an
- exercise for the reader. One issue to consider when attempting
- this exercise is how to specify the address of the int-ack and
- special cycle register. Hint: <</8259-interrupt-ackowledge>> is
- the wrong answer.
-
- Children of this node can only use the client callback interface
- when attaching themselves to the <<phb>>.
-
-
- REFERENCES
-
-
- http://playground.sun.com/1275/home.html#OFDbusPCI
-
-
- */
-
-
-typedef struct _phb_space {
- core *map;
- core_map *readable;
- core_map *writeable;
- unsigned_word parent_base;
- int parent_space;
- unsigned_word my_base;
- int my_space;
- unsigned size;
- const char *name;
-} phb_space;
-
-typedef struct _hw_phb_device {
- phb_space space[nr_hw_phb_spaces];
-} hw_phb_device;
-
-
-static const char *
-hw_phb_decode_name(hw_phb_decode level)
-{
- switch (level) {
- case hw_phb_normal_decode: return "normal";
- case hw_phb_subtractive_decode: return "subtractive";
- case hw_phb_master_abort_decode: return "master-abort";
- default: return "invalid decode";
- }
-}
-
-
-static void
-hw_phb_init_address(device *me)
-{
- hw_phb_device *phb = device_data(me);
-
- /* check some basic properties */
- if (device_nr_address_cells(me) != 3)
- device_error(me, "incorrect #address-cells");
- if (device_nr_size_cells(me) != 2)
- device_error(me, "incorrect #size-cells");
-
- /* (re) initialize each PCI space */
- {
- hw_phb_spaces space_nr;
- for (space_nr = 0; space_nr < nr_hw_phb_spaces; space_nr++) {
- phb_space *pci_space = &phb->space[space_nr];
- core_init(pci_space->map);
- pci_space->size = 0;
- }
- }
-
- /* decode each of the ranges properties entering the information
- into the space table */
- {
- range_property_spec range;
- int ranges_entry;
-
- for (ranges_entry = 0;
- device_find_range_array_property(me, "ranges", ranges_entry,
- &range);
- ranges_entry++) {
- int my_attach_space;
- unsigned_word my_attach_address;
- int parent_attach_space;
- unsigned_word parent_attach_address;
- unsigned size;
- phb_space *pci_space;
- /* convert the addresses into something meaningful */
- device_address_to_attach_address(me, &range.child_address,
- &my_attach_space,
- &my_attach_address,
- me);
- device_address_to_attach_address(device_parent(me),
- &range.parent_address,
- &parent_attach_space,
- &parent_attach_address,
- me);
- device_size_to_attach_size(me, &range.size, &size, me);
- if (my_attach_space < 0 || my_attach_space >= nr_hw_phb_spaces)
- device_error(me, "ranges property contains an invalid address space");
- pci_space = &phb->space[my_attach_space];
- if (pci_space->size != 0)
- device_error(me, "ranges property contains duplicate mappings for %s address space",
- pci_space->name);
- pci_space->parent_base = parent_attach_address;
- pci_space->parent_space = parent_attach_space;
- pci_space->my_base = my_attach_address;
- pci_space->my_space = my_attach_space;
- pci_space->size = size;
- device_attach_address(device_parent(me),
- attach_callback,
- parent_attach_space, parent_attach_address, size,
- access_read_write_exec,
- me);
- DTRACE(phb, ("map %d:0x%lx to %s:0x%lx (0x%lx bytes)\n",
- (int)parent_attach_space,
- (unsigned long)parent_attach_address,
- pci_space->name,
- (unsigned long)my_attach_address,
- (unsigned long)size));
- }
-
- if (ranges_entry == 0) {
- device_error(me, "Missing or empty ranges property");
- }
-
- }
-
-}
-
-static void
-hw_phb_attach_address(device *me,
- attach_type type,
- int space,
- unsigned_word addr,
- unsigned nr_bytes,
- access_type access,
- device *client) /*callback/default*/
-{
- hw_phb_device *phb = device_data(me);
- phb_space *pci_space;
- /* sanity checks */
- if (space < 0 || space >= nr_hw_phb_spaces)
- device_error(me, "attach space (%d) specified by %s invalid",
- space, device_path(client));
- pci_space = &phb->space[space];
- if (addr + nr_bytes > pci_space->my_base + pci_space->size
- || addr < pci_space->my_base)
- device_error(me, "attach addr (0x%lx) specified by %s outside of bus address range",
- (unsigned long)addr, device_path(client));
- if (type != hw_phb_normal_decode
- && type != hw_phb_subtractive_decode)
- device_error(me, "attach type (%d) specified by %s invalid",
- type, device_path(client));
- /* attach it to the relevent bus */
- DTRACE(phb, ("attach %s - %s %s:0x%lx (0x%lx bytes)\n",
- device_path(client),
- hw_phb_decode_name(type),
- pci_space->name,
- (unsigned long)addr,
- (unsigned long)nr_bytes));
- core_attach(pci_space->map,
- type,
- space,
- access,
- addr,
- nr_bytes,
- client);
-}
-
-
-/* Extract/set various fields from a PCI unit address.
-
- Note: only the least significant 32 bits of each cell is used.
-
- Note: for PPC MSB is 0 while for PCI it is 31. */
-
-
-/* relocatable bit n */
-
-static unsigned
-extract_n(const device_unit *address)
-{
- return EXTRACTED32(address->cells[0], 0, 0);
-}
-
-static void
-set_n(device_unit *address)
-{
- BLIT32(address->cells[0], 0, 1);
-}
-
-
-/* prefetchable bit p */
-
-static unsigned
-extract_p(const device_unit *address)
-{
- ASSERT(address->nr_cells == 3);
- return EXTRACTED32(address->cells[0], 1, 1);
-}
-
-static void
-set_p(device_unit *address)
-{
- BLIT32(address->cells[0], 1, 1);
-}
-
-
-/* aliased bit t */
-
-static unsigned
-extract_t(const device_unit *address)
-{
- ASSERT(address->nr_cells == 3);
- return EXTRACTED32(address->cells[0], 2, 2);
-}
-
-static void
-set_t(device_unit *address)
-{
- BLIT32(address->cells[0], 2, 1);
-}
-
-
-/* space code ss */
-
-typedef enum {
- ss_config_code = 0,
- ss_io_code = 1,
- ss_32bit_memory_code = 2,
- ss_64bit_memory_code = 3,
-} ss_type;
-
-static ss_type
-extract_ss(const device_unit *address)
-{
- ASSERT(address->nr_cells == 3);
- return EXTRACTED32(address->cells[0], 6, 7);
-}
-
-static void
-set_ss(device_unit *address, ss_type val)
-{
- MBLIT32(address->cells[0], 6, 7, val);
-}
-
-
-/* bus number bbbbbbbb */
-
-#if 0
-static unsigned
-extract_bbbbbbbb(const device_unit *address)
-{
- ASSERT(address->nr_cells == 3);
- return EXTRACTED32(address->cells[0], 8, 15);
-}
-#endif
-
-#if 0
-static void
-set_bbbbbbbb(device_unit *address, unsigned val)
-{
- MBLIT32(address->cells[0], 8, 15, val);
-}
-#endif
-
-
-/* device number ddddd */
-
-static unsigned
-extract_ddddd(const device_unit *address)
-{
- ASSERT(address->nr_cells == 3);
- return EXTRACTED32(address->cells[0], 16, 20);
-}
-
-static void
-set_ddddd(device_unit *address, unsigned val)
-{
- MBLIT32(address->cells[0], 16, 20, val);
-}
-
-
-/* function number fff */
-
-static unsigned
-extract_fff(const device_unit *address)
-{
- ASSERT(address->nr_cells == 3);
- return EXTRACTED32(address->cells[0], 21, 23);
-}
-
-static void
-set_fff(device_unit *address, unsigned val)
-{
- MBLIT32(address->cells[0], 21, 23, val);
-}
-
-
-/* register number rrrrrrrr */
-
-static unsigned
-extract_rrrrrrrr(const device_unit *address)
-{
- ASSERT(address->nr_cells == 3);
- return EXTRACTED32(address->cells[0], 24, 31);
-}
-
-static void
-set_rrrrrrrr(device_unit *address, unsigned val)
-{
- MBLIT32(address->cells[0], 24, 31, val);
-}
-
-
-/* MSW of 64bit address hh..hh */
-
-static unsigned
-extract_hh_hh(const device_unit *address)
-{
- ASSERT(address->nr_cells == 3);
- return address->cells[1];
-}
-
-static void
-set_hh_hh(device_unit *address, unsigned val)
-{
- address->cells[2] = val;
-}
-
-
-/* LSW of 64bit address ll..ll */
-
-static unsigned
-extract_ll_ll(const device_unit *address)
-{
- ASSERT(address->nr_cells == 3);
- return address->cells[2];
-}
-
-static void
-set_ll_ll(device_unit *address, unsigned val)
-{
- address->cells[2] = val;
-}
-
-
-/* Convert PCI textual bus address into a device unit */
-
-static int
-hw_phb_unit_decode(device *me,
- const char *unit,
- device_unit *address)
-{
- char *end = NULL;
- const char *chp = unit;
- unsigned long val;
-
- if (device_nr_address_cells(me) != 3)
- device_error(me, "PCI bus should have #address-cells == 3");
- memset(address, 0, sizeof(*address));
-
- if (unit == NULL)
- return 0;
-
- address->nr_cells = 3;
-
- if (isxdigit(*chp)) {
- set_ss(address, ss_config_code);
- }
- else {
-
- /* non-relocatable? */
- if (*chp == 'n') {
- set_n(address);
- chp++;
- }
-
- /* address-space? */
- if (*chp == 'i') {
- set_ss(address, ss_io_code);
- chp++;
- }
- else if (*chp == 'm') {
- set_ss(address, ss_32bit_memory_code);
- chp++;
- }
- else if (*chp == 'x') {
- set_ss(address, ss_64bit_memory_code);
- chp++;
- }
- else
- device_error(me, "Problem parsing PCI address %s", unit);
-
- /* possible alias */
- if (*chp == 't') {
- if (extract_ss(address) == ss_64bit_memory_code)
- device_error(me, "Invalid alias bit in PCI address %s", unit);
- set_t(address);
- chp++;
- }
-
- /* possible p */
- if (*chp == 'p') {
- if (extract_ss(address) != ss_32bit_memory_code)
- device_error(me, "Invalid prefetchable bit (p) in PCI address %s",
- unit);
- set_p(address);
- chp++;
- }
-
- }
-
- /* required DD */
- if (!isxdigit(*chp))
- device_error(me, "Missing device number in PCI address %s", unit);
- val = strtoul(chp, &end, 16);
- if (chp == end)
- device_error(me, "Problem parsing device number in PCI address %s", unit);
- if ((val & 0x1f) != val)
- device_error(me, "Device number (0x%lx) out of range (0..0x1f) in PCI address %s",
- val, unit);
- set_ddddd(address, val);
- chp = end;
-
- /* For config space, the F is optional */
- if (extract_ss(address) == ss_config_code
- && (isspace(*chp) || *chp == '\0'))
- return chp - unit;
-
- /* function number F */
- if (*chp != ',')
- device_error(me, "Missing function number in PCI address %s", unit);
- chp++;
- val = strtoul(chp, &end, 10);
- if (chp == end)
- device_error(me, "Problem parsing function number in PCI address %s",
- unit);
- if ((val & 7) != val)
- device_error(me, "Function number (%ld) out of range (0..7) in PCI address %s",
- (long)val, unit);
- set_fff(address, val);
- chp = end;
-
- /* for config space, must be end */
- if (extract_ss(address) == ss_config_code) {
- if (!isspace(*chp) && *chp != '\0')
- device_error(me, "Problem parsing PCI config address %s",
- unit);
- return chp - unit;
- }
-
- /* register number RR */
- if (*chp != ',')
- device_error(me, "Missing register number in PCI address %s", unit);
- chp++;
- val = strtoul(chp, &end, 16);
- if (chp == end)
- device_error(me, "Problem parsing register number in PCI address %s",
- unit);
- switch (extract_ss(address)) {
- case ss_io_code:
-#if 0
- if (extract_n(address) && val != 0)
- device_error(me, "non-relocatable I/O register must be zero in PCI address %s", unit);
- else if (!extract_n(address)
- && val != 0x10 && val != 0x14 && val != 0x18
- && val != 0x1c && val != 0x20 && val != 0x24)
- device_error(me, "I/O register invalid in PCI address %s", unit);
-#endif
- break;
- case ss_32bit_memory_code:
-#if 0
- if (extract_n(address) && val != 0)
- device_error(me, "non-relocatable memory register must be zero in PCI address %s", unit);
- else if (!extract_n(address)
- && val != 0x10 && val != 0x14 && val != 0x18
- && val != 0x1c && val != 0x20 && val != 0x24 && val != 0x30)
- device_error(me, "I/O register (0x%lx) invalid in PCI address %s",
- val, unit);
-#endif
- break;
- case ss_64bit_memory_code:
- if (extract_n(address) && val != 0)
- device_error(me, "non-relocatable 32bit memory register must be zero in PCI address %s", unit);
- else if (!extract_n(address)
- && val != 0x10 && val != 0x18 && val != 0x20)
- device_error(me, "Register number (0x%lx) invalid in 64bit PCI address %s",
- val, unit);
- case ss_config_code:
- device_error(me, "internal error");
- }
- if ((val & 0xff) != val)
- device_error(me, "Register number (0x%lx) out of range (0..0xff) in PCI address %s",
- val, unit);
- set_rrrrrrrr(address, val);
- chp = end;
-
- /* address */
- if (*chp != ',')
- device_error(me, "Missing address in PCI address %s", unit);
- chp++;
- switch (extract_ss(address)) {
- case ss_io_code:
- case ss_32bit_memory_code:
- val = strtoul(chp, &end, 16);
- if (chp == end)
- device_error(me, "Problem parsing address in PCI address %s", unit);
- switch (extract_ss(address)) {
- case ss_io_code:
- if (extract_n(address) && extract_t(address)
- && (val & 1024) != val)
- device_error(me, "10bit aliased non-relocatable address (0x%lx) out of range in PCI address %s",
- val, unit);
- if (!extract_n(address) && extract_t(address)
- && (val & 0xffff) != val)
- device_error(me, "64k relocatable address (0x%lx) out of range in PCI address %s",
- val, unit);
- break;
- case ss_32bit_memory_code:
- if (extract_t(address) && (val & 0xfffff) != val)
- device_error(me, "1mb memory address (0x%lx) out of range in PCI address %s",
- val, unit);
- if (!extract_t(address) && (val & 0xffffffff) != val)
- device_error(me, "32bit memory address (0x%lx) out of range in PCI address %s",
- val, unit);
- break;
- case ss_64bit_memory_code:
- case ss_config_code:
- device_error(me, "internal error");
- }
- set_ll_ll(address, val);
- chp = end;
- break;
- case ss_64bit_memory_code:
- device_error(me, "64bit addresses unimplemented");
- set_hh_hh(address, val);
- set_ll_ll(address, val);
- break;
- case ss_config_code:
- device_error(me, "internal error");
- break;
- }
-
- /* finished? */
- if (!isspace(*chp) && *chp != '\0')
- device_error(me, "Problem parsing PCI address %s", unit);
-
- return chp - unit;
-}
-
-
-/* Convert PCI device unit into its corresponding textual
- representation */
-
-static int
-hw_phb_unit_encode(device *me,
- const device_unit *unit_address,
- char *buf,
- int sizeof_buf)
-{
- if (unit_address->nr_cells != 3)
- device_error(me, "Incorrect number of cells in PCI unit address");
- if (device_nr_address_cells(me) != 3)
- device_error(me, "PCI bus should have #address-cells == 3");
- if (extract_ss(unit_address) == ss_config_code
- && extract_fff(unit_address) == 0
- && extract_rrrrrrrr(unit_address) == 0
- && extract_hh_hh(unit_address) == 0
- && extract_ll_ll(unit_address) == 0) {
- /* DD - Configuration Space address */
- sprintf(buf, "%x",
- extract_ddddd(unit_address));
- }
- else if (extract_ss(unit_address) == ss_config_code
- && extract_fff(unit_address) != 0
- && extract_rrrrrrrr(unit_address) == 0
- && extract_hh_hh(unit_address) == 0
- && extract_ll_ll(unit_address) == 0) {
- /* DD,F - Configuration Space */
- sprintf(buf, "%x,%d",
- extract_ddddd(unit_address),
- extract_fff(unit_address));
- }
- else if (extract_ss(unit_address) == ss_io_code
- && extract_hh_hh(unit_address) == 0) {
- /* [n]i[t]DD,F,RR,NNNNNNNN - 32bit I/O space */
- sprintf(buf, "%si%s%x,%d,%x,%x",
- extract_n(unit_address) ? "n" : "",
- extract_t(unit_address) ? "t" : "",
- extract_ddddd(unit_address),
- extract_fff(unit_address),
- extract_rrrrrrrr(unit_address),
- extract_ll_ll(unit_address));
- }
- else if (extract_ss(unit_address) == ss_32bit_memory_code
- && extract_hh_hh(unit_address) == 0) {
- /* [n]m[t][p]DD,F,RR,NNNNNNNN - 32bit memory space */
- sprintf(buf, "%sm%s%s%x,%d,%x,%x",
- extract_n(unit_address) ? "n" : "",
- extract_t(unit_address) ? "t" : "",
- extract_p(unit_address) ? "p" : "",
- extract_ddddd(unit_address),
- extract_fff(unit_address),
- extract_rrrrrrrr(unit_address),
- extract_ll_ll(unit_address));
- }
- else if (extract_ss(unit_address) == ss_32bit_memory_code) {
- /* [n]x[p]DD,F,RR,NNNNNNNNNNNNNNNN - 64bit memory space */
- sprintf(buf, "%sx%s%x,%d,%x,%x%08x",
- extract_n(unit_address) ? "n" : "",
- extract_p(unit_address) ? "p" : "",
- extract_ddddd(unit_address),
- extract_fff(unit_address),
- extract_rrrrrrrr(unit_address),
- extract_hh_hh(unit_address),
- extract_ll_ll(unit_address));
- }
- else {
- device_error(me, "Invalid PCI unit address 0x%08lx 0x%08lx 0x%08lx",
- (unsigned long)unit_address->cells[0],
- (unsigned long)unit_address->cells[1],
- (unsigned long)unit_address->cells[2]);
- }
- if (strlen(buf) > sizeof_buf)
- error("buffer overflow");
- return strlen(buf);
-}
-
-
-static int
-hw_phb_address_to_attach_address(device *me,
- const device_unit *address,
- int *attach_space,
- unsigned_word *attach_address,
- device *client)
-{
- if (address->nr_cells != 3)
- device_error(me, "attach address has incorrect number of cells");
- if (address->cells[1] != 0)
- device_error(me, "64bit attach address unsupported");
-
- /* directly decode the address/space */
- *attach_address = address->cells[2];
- switch (extract_ss(address)) {
- case ss_config_code:
- *attach_space = hw_phb_config_space;
- break;
- case ss_io_code:
- *attach_space = hw_phb_io_space;
- break;
- case ss_32bit_memory_code:
- case ss_64bit_memory_code:
- *attach_space = hw_phb_memory_space;
- break;
- }
-
- /* if non-relocatable finished */
- if (extract_n(address))
- return 1;
-
- /* make memory and I/O addresses absolute */
- if (*attach_space == hw_phb_io_space
- || *attach_space == hw_phb_memory_space) {
- int reg_nr;
- reg_property_spec assigned;
- if (extract_ss(address) == ss_64bit_memory_code)
- device_error(me, "64bit memory address not unsuported");
- for (reg_nr = 0;
- device_find_reg_array_property(client, "assigned-addresses", reg_nr,
- &assigned);
- reg_nr++) {
- if (!extract_n(&assigned.address)
- || extract_rrrrrrrr(&assigned.address) == 0)
- device_error(me, "client %s has invalid assigned-address property",
- device_path(client));
- if (extract_rrrrrrrr(address) == extract_rrrrrrrr(&assigned.address)) {
- /* corresponding base register */
- if (extract_ss(address) != extract_ss(&assigned.address))
- device_error(me, "client %s has conflicting types for base register 0x%lx",
- device_path(client),
- (unsigned long)extract_rrrrrrrr(address));
- *attach_address += assigned.address.cells[2];
- return 0;
- }
- }
- device_error(me, "client %s missing base address register 0x%lx in assigned-addresses property",
- device_path(client),
- (unsigned long)extract_rrrrrrrr(address));
- }
-
- return 0;
-}
-
-
-static int
-hw_phb_size_to_attach_size(device *me,
- const device_unit *size,
- unsigned *nr_bytes,
- device *client)
-{
- if (size->nr_cells != 2)
- device_error(me, "size has incorrect number of cells");
- if (size->cells[0] != 0)
- device_error(me, "64bit size unsupported");
- *nr_bytes = size->cells[1];
- return size->cells[1];
-}
-
-
-static const phb_space *
-find_phb_space(hw_phb_device *phb,
- unsigned_word addr,
- unsigned nr_bytes)
-{
- hw_phb_spaces space;
- /* find the space that matches the address */
- for (space = 0; space < nr_hw_phb_spaces; space++) {
- phb_space *pci_space = &phb->space[space];
- if (addr >= pci_space->parent_base
- && (addr + nr_bytes) <= (pci_space->parent_base + pci_space->size)) {
- return pci_space;
- }
- }
- return NULL;
-}
-
-
-static unsigned_word
-map_phb_addr(const phb_space *space,
- unsigned_word addr)
-{
- return addr - space->parent_base + space->my_base;
-}
-
-
-
-static unsigned
-hw_phb_io_read_buffer(device *me,
- void *dest,
- int space,
- unsigned_word addr,
- unsigned nr_bytes,
- cpu *processor,
- unsigned_word cia)
-{
- hw_phb_device *phb = (hw_phb_device*)device_data(me);
- const phb_space *pci_space = find_phb_space(phb, addr, nr_bytes);
- unsigned_word bus_addr;
- if (pci_space == NULL)
- return 0;
- bus_addr = map_phb_addr(pci_space, addr);
- DTRACE(phb, ("io read - %d:0x%lx -> %s:0x%lx (%u bytes)\n",
- space, (unsigned long)addr, pci_space->name, (unsigned long)bus_addr,
- nr_bytes));
- return core_map_read_buffer(pci_space->readable,
- dest, bus_addr, nr_bytes);
-}
-
-
-static unsigned
-hw_phb_io_write_buffer(device *me,
- const void *source,
- int space,
- unsigned_word addr,
- unsigned nr_bytes,
- cpu *processor,
- unsigned_word cia)
-{
- hw_phb_device *phb = (hw_phb_device*)device_data(me);
- const phb_space *pci_space = find_phb_space(phb, addr, nr_bytes);
- unsigned_word bus_addr;
- if (pci_space == NULL)
- return 0;
- bus_addr = map_phb_addr(pci_space, addr);
- DTRACE(phb, ("io write - %d:0x%lx -> %s:0x%lx (%u bytes)\n",
- space, (unsigned long)addr, pci_space->name, (unsigned long)bus_addr,
- nr_bytes));
- return core_map_write_buffer(pci_space->writeable, source,
- bus_addr, nr_bytes);
-}
-
-
-static unsigned
-hw_phb_dma_read_buffer(device *me,
- void *dest,
- int space,
- unsigned_word addr,
- unsigned nr_bytes)
-{
- hw_phb_device *phb = (hw_phb_device*)device_data(me);
- const phb_space *pci_space;
- /* find the space */
- if (space != hw_phb_memory_space)
- device_error(me, "invalid dma address space %d", space);
- pci_space = &phb->space[space];
- /* check out the address */
- if ((addr >= pci_space->my_base
- && addr <= pci_space->my_base + pci_space->size)
- || (addr + nr_bytes >= pci_space->my_base
- && addr + nr_bytes <= pci_space->my_base + pci_space->size))
- device_error(me, "Do not support DMA into own bus");
- /* do it */
- DTRACE(phb, ("dma read - %s:0x%lx (%d bytes)\n",
- pci_space->name, addr, nr_bytes));
- return device_dma_read_buffer(device_parent(me),
- dest, pci_space->parent_space,
- addr, nr_bytes);
-}
-
-
-static unsigned
-hw_phb_dma_write_buffer(device *me,
- const void *source,
- int space,
- unsigned_word addr,
- unsigned nr_bytes,
- int violate_read_only_section)
-{
- hw_phb_device *phb = (hw_phb_device*)device_data(me);
- const phb_space *pci_space;
- /* find the space */
- if (space != hw_phb_memory_space)
- device_error(me, "invalid dma address space %d", space);
- pci_space = &phb->space[space];
- /* check out the address */
- if ((addr >= pci_space->my_base
- && addr <= pci_space->my_base + pci_space->size)
- || (addr + nr_bytes >= pci_space->my_base
- && addr + nr_bytes <= pci_space->my_base + pci_space->size))
- device_error(me, "Do not support DMA into own bus");
- /* do it */
- DTRACE(phb, ("dma write - %s:0x%lx (%d bytes)\n",
- pci_space->name, addr, nr_bytes));
- return device_dma_write_buffer(device_parent(me),
- source, pci_space->parent_space,
- addr, nr_bytes,
- violate_read_only_section);
-}
-
-
-static device_callbacks const hw_phb_callbacks = {
- { hw_phb_init_address, },
- { hw_phb_attach_address, },
- { hw_phb_io_read_buffer, hw_phb_io_write_buffer },
- { hw_phb_dma_read_buffer, hw_phb_dma_write_buffer },
- { NULL, }, /* interrupt */
- { hw_phb_unit_decode,
- hw_phb_unit_encode,
- hw_phb_address_to_attach_address,
- hw_phb_size_to_attach_size }
-};
-
-
-static void *
-hw_phb_create(const char *name,
- const device_unit *unit_address,
- const char *args)
-{
- /* create the descriptor */
- hw_phb_device *phb = ZALLOC(hw_phb_device);
-
- /* create the core maps now */
- hw_phb_spaces space_nr;
- for (space_nr = 0; space_nr < nr_hw_phb_spaces; space_nr++) {
- phb_space *pci_space = &phb->space[space_nr];
- pci_space->map = core_create();
- pci_space->readable = core_readable(pci_space->map);
- pci_space->writeable = core_writeable(pci_space->map);
- switch (space_nr) {
- case hw_phb_memory_space:
- pci_space->name = "memory";
- break;
- case hw_phb_io_space:
- pci_space->name = "I/O";
- break;
- case hw_phb_config_space:
- pci_space->name = "config";
- break;
- case hw_phb_special_space:
- pci_space->name = "special";
- break;
- default:
- error ("internal error");
- break;
- }
- }
-
- return phb;
-}
-
-
-const device_descriptor hw_phb_device_descriptor[] = {
- { "phb", hw_phb_create, &hw_phb_callbacks },
- { "pci", NULL, &hw_phb_callbacks },
- { NULL, },
-};
-
-#endif /* _HW_PHB_ */
diff --git a/sim/ppc/hw_phb.h b/sim/ppc/hw_phb.h
deleted file mode 100644
index 030fe0a8194..00000000000
--- a/sim/ppc/hw_phb.h
+++ /dev/null
@@ -1,40 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1996, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-#ifndef _HW_PHB_H_
-#define _HW_PHB_H_
-
-typedef enum {
- hw_phb_memory_space,
- hw_phb_io_space,
- hw_phb_config_space,
- hw_phb_special_space,
- nr_hw_phb_spaces,
-} hw_phb_spaces;
-
-typedef enum {
- hw_phb_normal_decode = attach_callback,
- hw_phb_subtractive_decode,
- hw_phb_master_abort_decode,
-} hw_phb_decode;
-
-
-#endif /* _HW_PHB_H_ */
diff --git a/sim/ppc/hw_register.c b/sim/ppc/hw_register.c
deleted file mode 100644
index f361e462527..00000000000
--- a/sim/ppc/hw_register.c
+++ /dev/null
@@ -1,131 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1996, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-#ifndef _HW_REGISTER_C_
-#define _HW_REGISTER_C_
-
-#include "device_table.h"
-#include <stdlib.h>
-#include "psim.h"
-
-/* DEVICE
-
-
- register - dummy device to initialize processor registers
-
-
- DESCRIPTION
-
- The properties of this device are used, during initialization, to
- specify the initial value of various processor registers. The
- property name specifying the register to be initialized with the
- special form <cpu-nr>.<register> being used to initialize a
- specific processor's register (eg 0.pc).
-
- Because, when the device tree is created, overriding properties are
- entered into the tree before any default values, this device must
- initialize registers in newest (default) to oldest (overriding)
- property order.
-
- The actual registers (for a given target) are defined in the file
- registers.c.
-
- This device is normally a child of the /openprom/init node.
-
-
- EXAMPLES
-
-
- Given a device tree containing the entry:
-
- | /openprom/init/register/pc 0xfff00cf0
-
- then specifying the command line option:
-
- | -o '/openprom/init/register/pc 0x0'
-
- would override the initial value of processor zero's program
- counter. The resultant device tree tree containing:
-
- | /openprom/init/register/0.pc 0x0
- | /openprom/init/register/pc 0xfff00cf0
-
- and would be processed last to first resulting in the sequence: set
- all program counters to 0xfff00cf0; set processor zero's program
- counter to zero.
-
- */
-
-static void
-do_register_init(device *me,
- const device_property *prop)
-{
- psim *system = device_system(me);
- if (prop != NULL) {
- const char *name = prop->name;
- unsigned32 value = device_find_integer_property(me, name);
- int processor;
-
- do_register_init(me, device_next_property(prop));
-
- if (strchr(name, '.') == NULL) {
- processor = -1;
- DTRACE(register, ("%s=0x%lx\n", name, (unsigned long)value));
- }
- else {
- char *end;
- processor = strtoul(name, &end, 0);
- ASSERT(end[0] == '.');
- name = end+1;
- DTRACE(register, ("%d.%s=0x%lx\n", processor, name,
- (unsigned long)value));
- }
- psim_write_register(system, processor, /* all processors */
- &value,
- name,
- cooked_transfer);
- }
-}
-
-
-static void
-register_init_data_callback(device *me)
-{
- const device_property *prop = device_find_property(me, NULL);
- do_register_init(me, prop);
-}
-
-
-static device_callbacks const register_callbacks = {
- { NULL, register_init_data_callback, },
- { NULL, }, /* address */
- { NULL, }, /* IO */
- { NULL, }, /* DMA */
- { NULL, }, /* interrupt */
- { NULL, }, /* unit */
-};
-
-const device_descriptor hw_register_device_descriptor[] = {
- { "register", NULL, &register_callbacks },
- { NULL },
-};
-
-#endif _HW_REGISTER_C_
diff --git a/sim/ppc/hw_trace.c b/sim/ppc/hw_trace.c
deleted file mode 100644
index a46483a5191..00000000000
--- a/sim/ppc/hw_trace.c
+++ /dev/null
@@ -1,103 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1996, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-#ifndef _HW_TRACE_C_
-#define _HW_TRACE_C_
-
-#include "device_table.h"
-#include <stdarg.h>
-
-/* DEVICE
-
- trace - the properties of this dummy device specify trace options
-
- DESCRIPTION
-
- The properties of this device are used, during initialization, to
- specify the value various simulation trace options. The
- initialization can occure implicitly (during device tree init) or
- explicitly using this devices ioctl method.
-
- The actual options and their default values (for a given target)
- are defined in the file debug.
-
- This device is normally a child of the /openprom node.
-
- EXAMPLE
-
- The trace option dump-device-tree can be enabled by specifying the
- option:
-
- | -o '/openprom/trace/dump-device-tree 0x1'
-
- Alternativly the shorthand version:
-
- | -t dump-device-tree
-
- can be used. */
-
-
-/* Hook to allow the initialization of the trace options at any time */
-
-static int
-hw_trace_ioctl(device *me,
- cpu *processor,
- unsigned_word cia,
- device_ioctl_request request,
- va_list ap)
-{
- switch (request) {
- case device_ioctl_set_trace:
- {
- const device_property *prop = device_find_property(me, NULL);
- while (prop != NULL) {
- const char *name = prop->name;
- unsigned32 value = device_find_integer_property(me, name);
- trace_option(name, value);
- prop = device_next_property(prop);
- }
- }
- break;
- default:
- device_error(me, "insupported ioctl request");
- break;
- }
- return 0;
-}
-
-
-static device_callbacks const hw_trace_callbacks = {
- { NULL, }, /* init */
- { NULL, }, /* address */
- { NULL, }, /* IO */
- { NULL, }, /* DMA */
- { NULL, }, /* interrupt */
- { NULL, }, /* unit */
- NULL, /* instance-create */
- hw_trace_ioctl,
-};
-
-const device_descriptor hw_trace_device_descriptor[] = {
- { "trace", NULL, &hw_trace_callbacks },
- { NULL },
-};
-
-#endif _HW_TRACE_C_
diff --git a/sim/ppc/hw_vm.c b/sim/ppc/hw_vm.c
deleted file mode 100644
index e42b8002347..00000000000
--- a/sim/ppc/hw_vm.c
+++ /dev/null
@@ -1,275 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1996, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-#ifndef _HW_VM_C_
-#define _HW_VM_C_
-
-#include "device_table.h"
-#include "cpu.h"
-
-#include <signal.h>
-
-/* DEVICE
-
- vm - virtual memory device for user simulation modes
-
- DESCRIPTION
-
- In user mode, mapped text, data and stack addresses are managed by
- the core. Unmapped addresses are passed onto this device (because
- it establishes its self as the fallback device) for processing.
-
- During initialization, children of this device will request the
- mapping of the initial text and data segments. Those requests are
- passed onto the core device so that that may establish the initial
- memory regions.
-
- Once the simulation has started (as noted above) any access to an
- unmapped address range will be passed down to this device as an IO
- access. This device will then either attach additional memory to
- the core device or signal the access as being invalid.
-
- The IOCTL function is used to notify this device of any changes to
- the users `brk' point.
-
- PROPERTIES
-
- stack-base = <number>
-
- Specifies the lower address of the stack segment in the users
- virtual address space. The initial stack page is defined by
- stack-base + nr-bytes.
-
- nr-bytes = <number>
-
- Specifies the maximum size of the stack segment in the users
- address space.
-
- */
-
-typedef struct _hw_vm_device {
- /* area of memory valid for stack addresses */
- unsigned_word stack_base; /* min possible stack value */
- unsigned_word stack_bound;
- unsigned_word stack_lower_limit;
- /* area of memory valid for heap addresses */
- unsigned_word heap_base;
- unsigned_word heap_bound;
- unsigned_word heap_upper_limit;
-} hw_vm_device;
-
-
-static void
-hw_vm_init_address_callback(device *me)
-{
- hw_vm_device *vm = (hw_vm_device*)device_data(me);
-
- /* revert the stack/heap variables to their defaults */
- vm->stack_base = device_find_integer_property(me, "stack-base");
- vm->stack_bound = (vm->stack_base
- + device_find_integer_property(me, "nr-bytes"));
- vm->stack_lower_limit = vm->stack_bound;
- vm->heap_base = 0;
- vm->heap_bound = 0;
- vm->heap_upper_limit = 0;
-
- /* establish this device as the default memory handler */
- device_attach_address(device_parent(me),
- attach_callback + 1,
- 0 /*address space - ignore*/,
- 0 /*addr - ignore*/,
- (((unsigned)0)-1) /*nr_bytes - ignore*/,
- access_read_write /*access*/,
- me);
-}
-
-
-static void
-hw_vm_attach_address(device *me,
- attach_type attach,
- int space,
- unsigned_word addr,
- unsigned nr_bytes,
- access_type access,
- device *client) /*callback/default*/
-{
- hw_vm_device *vm = (hw_vm_device*)device_data(me);
- /* update end of bss if necessary */
- if (vm->heap_base < addr + nr_bytes) {
- vm->heap_base = addr + nr_bytes;
- vm->heap_bound = addr + nr_bytes;
- vm->heap_upper_limit = addr + nr_bytes;
- }
- device_attach_address(device_parent(me),
- attach_raw_memory,
- 0 /*address space*/,
- addr,
- nr_bytes,
- access,
- me);
-}
-
-
-static unsigned
-hw_vm_add_space(device *me,
- unsigned_word addr,
- unsigned nr_bytes,
- cpu *processor,
- unsigned_word cia)
-{
- hw_vm_device *vm = (hw_vm_device*)device_data(me);
- unsigned_word block_addr;
- unsigned block_nr_bytes;
-
- /* an address in the stack area, allocate just down to the addressed
- page */
- if (addr >= vm->stack_base && addr < vm->stack_lower_limit) {
- block_addr = FLOOR_PAGE(addr);
- block_nr_bytes = vm->stack_lower_limit - block_addr;
- vm->stack_lower_limit = block_addr;
- }
- /* an address in the heap area, allocate all of the required heap */
- else if (addr >= vm->heap_upper_limit && addr < vm->heap_bound) {
- block_addr = vm->heap_upper_limit;
- block_nr_bytes = vm->heap_bound - vm->heap_upper_limit;
- vm->heap_upper_limit = vm->heap_bound;
- }
- /* oops - an invalid address - abort the cpu */
- else if (processor != NULL) {
- cpu_halt(processor, cia, was_signalled, SIGSEGV);
- return 0;
- }
- /* 2*oops - an invalid address and no processor */
- else {
- return 0;
- }
-
- /* got the parameters, allocate the space */
- device_attach_address(device_parent(me),
- attach_raw_memory,
- 0 /*address space*/,
- block_addr,
- block_nr_bytes,
- access_read_write,
- me);
- return block_nr_bytes;
-}
-
-
-static unsigned
-hw_vm_io_read_buffer_callback(device *me,
- void *dest,
- int space,
- unsigned_word addr,
- unsigned nr_bytes,
- cpu *processor,
- unsigned_word cia)
-{
- if (hw_vm_add_space(me, addr, nr_bytes, processor, cia) >= nr_bytes) {
- memset(dest, 0, nr_bytes); /* always initialized to zero */
- return nr_bytes;
- }
- else
- return 0;
-}
-
-
-static unsigned
-hw_vm_io_write_buffer_callback(device *me,
- const void *source,
- int space,
- unsigned_word addr,
- unsigned nr_bytes,
- cpu *processor,
- unsigned_word cia)
-{
- if (hw_vm_add_space(me, addr, nr_bytes, processor, cia) >= nr_bytes) {
- return device_dma_write_buffer(device_parent(me), source,
- space, addr,
- nr_bytes,
- 0/*violate_read_only*/);
- }
- else
- return 0;
-}
-
-
-static int
-hw_vm_ioctl(device *me,
- cpu *processor,
- unsigned_word cia,
- device_ioctl_request request,
- va_list ap)
-{
- /* While the caller is notified that the heap has grown by the
- requested amount, the heap is actually extended out to a page
- boundary. */
- hw_vm_device *vm = (hw_vm_device*)device_data(me);
- switch (request) {
- case device_ioctl_break:
- {
- unsigned_word requested_break = va_arg(ap, unsigned_word);
- unsigned_word new_break = ALIGN_8(requested_break);
- unsigned_word old_break = vm->heap_bound;
- signed_word delta = new_break - old_break;
- if (delta > 0)
- vm->heap_bound = ALIGN_PAGE(new_break);
- break;
- }
- default:
- device_error(me, "Unsupported ioctl request");
- break;
- }
- return 0;
-
-}
-
-
-static device_callbacks const hw_vm_callbacks = {
- { hw_vm_init_address_callback, },
- { hw_vm_attach_address,
- passthrough_device_address_detach, },
- { hw_vm_io_read_buffer_callback,
- hw_vm_io_write_buffer_callback, },
- { NULL, passthrough_device_dma_write_buffer, },
- { NULL, }, /* interrupt */
- { generic_device_unit_decode,
- generic_device_unit_encode, },
- NULL, /* instance */
- hw_vm_ioctl,
-};
-
-
-static void *
-hw_vm_create(const char *name,
- const device_unit *address,
- const char *args)
-{
- hw_vm_device *vm = ZALLOC(hw_vm_device);
- return vm;
-}
-
-const device_descriptor hw_vm_device_descriptor[] = {
- { "vm", hw_vm_create, &hw_vm_callbacks },
- { NULL },
-};
-
-#endif _HW_VM_C_
diff --git a/sim/ppc/idecode_branch.h b/sim/ppc/idecode_branch.h
deleted file mode 100644
index ecae98eb8e7..00000000000
--- a/sim/ppc/idecode_branch.h
+++ /dev/null
@@ -1,62 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1995, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-/* branch macro's:
-
- The macro's below implement the semantics of the PowerPC jump
- instructions. */
-
-
-/* If so required, update the Link Register with the next sequential
- instruction address */
-
-#define UPDATE_LK \
-do { \
- if (update_LK) { \
- ppc_ia target = cia + 4; \
- ppc_spr new_address = (ppc_spr)IEA_MASKED(ppc_is_64bit(processor), \
- target); \
- LR = new_address; \
- } \
- ITRACE(trace_branch, \
- ("UPDATE_LK - update_LK=%d lr=0x%x cia=0x%x\n", \
- update_LK, LR, cia); \
-} while (0)
-
-
-/* take the branch - absolute or relative - possibly updating the link
- register */
-
-#define BRANCH(ADDRESS) \
-do { \
- UPDATE_LK; \
- if (update_AA) { \
- ppc_ia target = (ppc_ia)(ADDRESS); \
- nia = (ppc_ia)IEA_MASKED(ppc_is_64bit(processor), target); \
- } \
- else { \
- ppc_ia target = cia + ADDRESS; \
- nia = (ppc_ia)IEA_MASKED(ppc_is_64bit(processor), target); \
- } \
- PTRACE(trace_branch, \
- ("BRANCH - update_AA=%d update_LK=%d nia=0x%x cia=0x%x\n", \
- update_AA, update_LK, nia, cia); \
-} while (0)
diff --git a/sim/ppc/idecode_expression.h b/sim/ppc/idecode_expression.h
deleted file mode 100644
index 1f9b7259add..00000000000
--- a/sim/ppc/idecode_expression.h
+++ /dev/null
@@ -1,410 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1997, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-/* 32bit target expressions:
-
- Each calculation is performed three times using each of the
- signed64, unsigned64 and long integer types. The macro ALU_END
- (in _ALU_RESULT_VAL) then selects which of the three alternative
- results will be used in the final assignment of the target
- register. As this selection is determined at compile time by
- fields in the instruction (OE, EA, Rc) the compiler has sufficient
- information to firstly simplify the selection code into a single
- case and then back anotate the equations and hence eliminate any
- resulting dead code. That dead code being the calculations that,
- as it turned out were not in the end needed.
-
- 64bit arrithemetic is used firstly because it allows the use of
- gcc's efficient long long operators (typically efficiently output
- inline) and secondly because the resultant answer will contain in
- the low 32bits the answer while in the high 32bits is either carry
- or status information. */
-
-/* 64bit target expressions:
-
- Unfortunatly 128bit arrithemetic isn't that common. Consequently
- the 32/64 bit trick can not be used. Instead all calculations are
- required to retain carry/overflow information in separate
- variables. Even with this restriction it is still possible for the
- trick of letting the compiler discard the calculation of unneeded
- values */
-
-
-/* Macro's to type cast 32bit constants to 64bits */
-#define SIGNED64(val) ((signed64)(signed32)(val))
-#define UNSIGNED64(val) ((unsigned64)(unsigned32)(val))
-
-
-/* Start a section of ALU code */
-
-#define ALU_BEGIN(val) \
-{ \
- natural_word alu_val; \
- unsigned64 alu_carry_val; \
- signed64 alu_overflow_val; \
- ALU_SET(val)
-
-
-/* assign the result to the target register */
-
-#define ALU_END(TARG,CA,OE,Rc) \
-{ /* select the result to use */ \
- signed_word const alu_result = _ALU_RESULT_VAL(CA,OE,Rc); \
- /* determine the overflow bit if needed */ \
- if (OE) { \
- if ((((unsigned64)(alu_overflow_val & BIT64(0))) \
- >> 32) \
- == (alu_overflow_val & BIT64(32))) \
- XER &= (~xer_overflow); \
- else \
- XER |= (xer_summary_overflow | xer_overflow); \
- } \
- /* Update the carry bit if needed */ \
- if (CA) { \
- XER = ((XER & ~xer_carry) \
- | SHUFFLED32((alu_carry_val >> 32), 31, xer_carry_bit)); \
- /* if (alu_carry_val & BIT64(31)) \
- XER |= (xer_carry); \
- else \
- XER &= (~xer_carry); */ \
- } \
- TRACE(trace_alu, (" Result = %ld (0x%lx), XER = %ld\n", \
- (long)alu_result, (long)alu_result, (long)XER)); \
- /* Update the Result Conditions if needed */ \
- CR0_COMPARE(alu_result, 0, Rc); \
- /* assign targ same */ \
- TARG = alu_result; \
-}}
-
-/* select the result from the different options */
-
-#define _ALU_RESULT_VAL(CA,OE,Rc) (WITH_TARGET_WORD_BITSIZE == 64 \
- ? alu_val \
- : (OE \
- ? alu_overflow_val \
- : (CA \
- ? alu_carry_val \
- : alu_val)))
-
-
-/* More basic alu operations */
-#if (WITH_TARGET_WORD_BITSIZE == 64)
-#define ALU_SET(val) \
-do { \
- alu_val = val; \
- alu_carry_val = ((unsigned64)alu_val) >> 32; \
- alu_overflow_val = ((signed64)alu_val) >> 32; \
-} while (0)
-#endif
-#if (WITH_TARGET_WORD_BITSIZE == 32)
-#define ALU_SET(val) \
-do { \
- alu_val = val; \
- alu_carry_val = (unsigned32)(alu_val); \
- alu_overflow_val = (signed32)(alu_val); \
-} while (0)
-#endif
-
-#if (WITH_TARGET_WORD_BITSIZE == 64)
-#define ALU_ADD(val) \
-do { \
- unsigned64 alu_lo = (UNSIGNED64(alu_val) \
- + UNSIGNED64(val)); \
- signed alu_carry = ((alu_lo & BIT(31)) != 0); \
- alu_carry_val = (alu_carry_val \
- + UNSIGNED64(EXTRACTED(val, 0, 31)) \
- + alu_carry); \
- alu_overflow_val = (alu_overflow_val \
- + SIGNED64(EXTRACTED(val, 0, 31)) \
- + alu_carry); \
- alu_val = alu_val + val; \
-} while (0)
-#endif
-#if (WITH_TARGET_WORD_BITSIZE == 32)
-#define ALU_ADD(val) \
-do { \
- alu_val += val; \
- alu_carry_val += (unsigned32)(val); \
- alu_overflow_val += (signed32)(val); \
-} while (0)
-#endif
-
-
-#if (WITH_TARGET_WORD_BITSIZE == 64)
-#define ALU_ADD_CA \
-do { \
- signed carry = MASKED32(XER, xer_carry_bit, xer_carry_bit) != 0; \
- ALU_ADD(carry); \
-} while (0)
-#endif
-#if (WITH_TARGET_WORD_BITSIZE == 32)
-#define ALU_ADD_CA \
-do { \
- signed carry = MASKED32(XER, xer_carry_bit, xer_carry_bit) != 0; \
- ALU_ADD(carry); \
-} while (0)
-#endif
-
-
-#if 0
-#if (WITH_TARGET_WORD_BITSIZE == 64)
-#endif
-#if (WITH_TARGET_WORD_BITSIZE == 32)
-#define ALU_SUB(val) \
-do { \
- alu_val -= val; \
- alu_carry_val -= (unsigned32)(val); \
- alu_overflow_val -= (signed32)(val); \
-} while (0)
-#endif
-#endif
-
-#if (WITH_TARGET_WORD_BITSIZE == 64)
-#endif
-#if (WITH_TARGET_WORD_BITSIZE == 32)
-#define ALU_OR(val) \
-do { \
- alu_val |= val; \
- alu_carry_val = (unsigned32)(alu_val); \
- alu_overflow_val = (signed32)(alu_val); \
-} while (0)
-#endif
-
-
-#if (WITH_TARGET_WORD_BITSIZE == 64)
-#endif
-#if (WITH_TARGET_WORD_BITSIZE == 32)
-#define ALU_XOR(val) \
-do { \
- alu_val ^= val; \
- alu_carry_val = (unsigned32)(alu_val); \
- alu_overflow_val = (signed32)(alu_val); \
-} while (0)
-#endif
-
-
-#if 0
-#if (WITH_TARGET_WORD_BITSIZE == 64)
-#endif
-#if (WITH_TARGET_WORD_BITSIZE == 32)
-#define ALU_NEGATE \
-do { \
- alu_val = -alu_val; \
- alu_carry_val = -alu_carry_val; \
- alu_overflow_val = -alu_overflow_val; \
-} while(0)
-#endif
-#endif
-
-
-#if (WITH_TARGET_WORD_BITSIZE == 64)
-#endif
-#if (WITH_TARGET_WORD_BITSIZE == 32)
-#define ALU_AND(val) \
-do { \
- alu_val &= val; \
- alu_carry_val = (unsigned32)(alu_val); \
- alu_overflow_val = (signed32)(alu_val); \
-} while (0)
-#endif
-
-
-#if (WITH_TARGET_WORD_BITSIZE == 64)
-#define ALU_NOT \
-do { \
- signed64 new_alu_val = ~alu_val; \
- ALU_SET(new_alu_val); \
-} while (0)
-#endif
-#if (WITH_TARGET_WORD_BITSIZE == 32)
-#define ALU_NOT \
-do { \
- signed new_alu_val = ~alu_val; \
- ALU_SET(new_alu_val); \
-} while(0)
-#endif
-
-
-/* Macros for updating the condition register */
-
-#define CR1_UPDATE(Rc) \
-do { \
- if (Rc) { \
- CR_SET(1, EXTRACTED32(FPSCR, fpscr_fx_bit, fpscr_ox_bit)); \
- } \
-} while (0)
-
-
-#define _DO_CR_COMPARE(LHS, RHS) \
-(((LHS) < (RHS)) \
- ? cr_i_negative \
- : (((LHS) > (RHS)) \
- ? cr_i_positive \
- : cr_i_zero))
-
-#define CR_SET(REG, VAL) MBLIT32(CR, REG*4, REG*4+3, VAL)
-#define CR_FIELD(REG) EXTRACTED32(CR, REG*4, REG*4+3)
-#define CR_SET_XER_SO(REG, VAL) \
-do { \
- creg new_bits = ((XER & xer_summary_overflow) \
- ? (cr_i_summary_overflow | VAL) \
- : VAL); \
- CR_SET(REG, new_bits); \
-} while(0)
-
-#define CR_COMPARE(REG, LHS, RHS) \
-do { \
- creg new_bits = ((XER & xer_summary_overflow) \
- ? (cr_i_summary_overflow | _DO_CR_COMPARE(LHS,RHS)) \
- : _DO_CR_COMPARE(LHS,RHS)); \
- CR_SET(REG, new_bits); \
-} while (0)
-
-#define CR0_COMPARE(LHS, RHS, Rc) \
-do { \
- if (Rc) { \
- CR_COMPARE(0, LHS, RHS); \
- TRACE(trace_alu, \
- ("CR=0x%08lx, LHS=%ld, RHS=%ld\n", \
- (unsigned long)CR, (long)LHS, (long)RHS)); \
- } \
-} while (0)
-
-
-
-/* Bring data in from the cold */
-
-#define MEM(SIGN, EA, NR_BYTES) \
-((SIGN##_##NR_BYTES) vm_data_map_read_##NR_BYTES(cpu_data_map(processor), EA, \
- processor, cia)) \
-
-#define STORE(EA, NR_BYTES, VAL) \
-do { \
- vm_data_map_write_##NR_BYTES(cpu_data_map(processor), EA, VAL, \
- processor, cia); \
-} while (0)
-
-
-
-/* some FPSCR update macros. */
-
-#define FPSCR_BEGIN \
-{ \
- fpscreg old_fpscr UNUSED = FPSCR
-
-#define FPSCR_END(Rc) { \
- /* always update VX */ \
- if ((FPSCR & fpscr_vx_bits)) \
- FPSCR |= fpscr_vx; \
- else \
- FPSCR &= ~fpscr_vx; \
- /* always update FEX */ \
- if (((FPSCR & fpscr_vx) && (FPSCR & fpscr_ve)) \
- || ((FPSCR & fpscr_ox) && (FPSCR & fpscr_oe)) \
- || ((FPSCR & fpscr_ux) && (FPSCR & fpscr_ue)) \
- || ((FPSCR & fpscr_zx) && (FPSCR & fpscr_ze)) \
- || ((FPSCR & fpscr_xx) && (FPSCR & fpscr_xe))) \
- FPSCR |= fpscr_fex; \
- else \
- FPSCR &= ~fpscr_fex; \
- CR1_UPDATE(Rc); \
- /* interrupt enabled? */ \
- if ((MSR & (msr_floating_point_exception_mode_0 \
- | msr_floating_point_exception_mode_1)) \
- && (FPSCR & fpscr_fex)) \
- program_interrupt(processor, cia, \
- floating_point_enabled_program_interrupt); \
-}}
-
-#define FPSCR_SET(REG, VAL) MBLIT32(FPSCR, REG*4, REG*4+3, VAL)
-#define FPSCR_FIELD(REG) EXTRACTED32(FPSCR, REG*4, REG*4+3)
-
-#define FPSCR_SET_FPCC(VAL) MBLIT32(FPSCR, fpscr_fpcc_bit, fpscr_fpcc_bit+3, VAL)
-
-/* Handle various exceptions */
-
-#define FPSCR_OR_VX(VAL) \
-do { \
- /* NOTE: VAL != 0 */ \
- FPSCR |= (VAL); \
- FPSCR |= fpscr_fx; \
-} while (0)
-
-#define FPSCR_SET_OX(COND) \
-do { \
- if (COND) { \
- FPSCR |= fpscr_ox; \
- FPSCR |= fpscr_fx; \
- } \
- else \
- FPSCR &= ~fpscr_ox; \
-} while (0)
-
-#define FPSCR_SET_UX(COND) \
-do { \
- if (COND) { \
- FPSCR |= fpscr_ux; \
- FPSCR |= fpscr_fx; \
- } \
- else \
- FPSCR &= ~fpscr_ux; \
-} while (0)
-
-#define FPSCR_SET_ZX(COND) \
-do { \
- if (COND) { \
- FPSCR |= fpscr_zx; \
- FPSCR |= fpscr_fx; \
- } \
- else \
- FPSCR &= ~fpscr_zx; \
-} while (0)
-
-#define FPSCR_SET_XX(COND) \
-do { \
- if (COND) { \
- FPSCR |= fpscr_xx; \
- FPSCR |= fpscr_fx; \
- } \
-} while (0)
-
-/* Note: code using SET_FI must also explicitly call SET_XX */
-
-#define FPSCR_SET_FR(COND) do { \
- if (COND) \
- FPSCR |= fpscr_fr; \
- else \
- FPSCR &= ~fpscr_fr; \
-} while (0)
-
-#define FPSCR_SET_FI(COND) \
-do { \
- if (COND) { \
- FPSCR |= fpscr_fi; \
- } \
- else \
- FPSCR &= ~fpscr_fi; \
-} while (0)
-
-#define FPSCR_SET_FPRF(VAL) \
-do { \
- FPSCR = (FPSCR & ~fpscr_fprf) | (VAL); \
-} while (0)
diff --git a/sim/ppc/idecode_fields.h b/sim/ppc/idecode_fields.h
deleted file mode 100644
index 1c449bc9769..00000000000
--- a/sim/ppc/idecode_fields.h
+++ /dev/null
@@ -1,105 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1995, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-/* Instruction field macros:
-
- The macro's below greatly simplify the process of translating the
- pseudo code found in the PowerPC manual into C.
-
- In addition to the below, more will be found in the gen program's
- cache table */
-
-
-/* map some statements and variables directly across */
-
-#define is_64bit_implementation (WITH_TARGET_WORD_BITSIZE == 64)
-#define is_64bit_mode IS_64BIT_MODE(processor)
-
-#define NIA nia
-#define CIA cia
-
-
-/* reservation */
-
-#define RESERVE cpu_reservation(processor)->valid
-#define RESERVE_ADDR cpu_reservation(processor)->addr
-#define RESERVE_DATA cpu_reservation(processor)->data
-
-#define real_addr(EA, IS_READ) vm_real_data_addr(cpu_data_map(processor), \
- EA, \
- IS_READ, \
- processor, \
- cia)
-
-
-/* depending on mode return a 32 or 64bit number */
-
-#define IEA(X) (is_64bit_mode \
- ? (X) \
- : MASKED((X), 32, 63))
-
-/* Expand argument to current architecture size */
-
-#define EXTS(X) EXTS_##X
-
-
-/* Gen translates text of the form A{XX:YY} into A_XX_YY_ the macro's
- below define such translated text into real expressions */
-
-/* the spr field as it normally is used */
-
-#define SPR_5_9_ (SPR & 0x1f)
-#define SPR_0_4_ (SPR >> 5)
-#define SPR_0_ ((SPR & BIT10(0)) != 0)
-
-#define tbr_5_9_ (tbr & 0x1f)
-#define tbr_0_4_ (tbr >> 5)
-
-
-#define TB cpu_get_time_base(processor)
-
-
-/* various registers with important masks */
-
-#define LR_0b00 (LR & ~3)
-#define CTR_0b00 (CTR & ~3)
-
-#define CR_BI_ ((CR & BIT32_BI) != 0)
-#define CR_BA_ ((CR & BIT32_BA) != 0)
-#define CR_BB_ ((CR & BIT32_BB) != 0)
-
-
-/* extended extracted fields */
-
-#define TO_0_ ((TO & BIT5(0)) != 0)
-#define TO_1_ ((TO & BIT5(1)) != 0)
-#define TO_2_ ((TO & BIT5(2)) != 0)
-#define TO_3_ ((TO & BIT5(3)) != 0)
-#define TO_4_ ((TO & BIT5(4)) != 0)
-
-#define BO_0_ ((BO & BIT5(0)) != 0)
-#define BO_1_ ((BO & BIT5(1)) != 0)
-#define BO_2_ ((BO & BIT5(2)) != 0)
-#define BO_3_ ((BO & BIT5(3)) != 0)
-#define BO_4_ ((BO & BIT5(4)) != 0)
-
-#define GOTO(dest) goto XCONCAT4(label__,dest,__,MY_PREFIX)
-#define LABEL(dest) XCONCAT4(label__,dest,__,MY_PREFIX)
diff --git a/sim/ppc/igen.c b/sim/ppc/igen.c
deleted file mode 100644
index 94dcf5130dc..00000000000
--- a/sim/ppc/igen.c
+++ /dev/null
@@ -1,513 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1997, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-
-#include <getopt.h>
-
-#include "misc.h"
-#include "lf.h"
-#include "table.h"
-#include "config.h"
-
-#include "filter.h"
-
-#include "ld-decode.h"
-#include "ld-cache.h"
-#include "ld-insn.h"
-
-#include "igen.h"
-
-#include "gen-model.h"
-#include "gen-icache.h"
-#include "gen-itable.h"
-#include "gen-idecode.h"
-#include "gen-semantics.h"
-#include "gen-support.h"
-
-int hi_bit_nr;
-int insn_bit_size = max_insn_bit_size;
-
-igen_code code = generate_calls;
-
-int generate_expanded_instructions;
-int icache_size = 1024;
-int generate_smp;
-
-/****************************************************************/
-
-static int
-print_insn_bits(lf *file, insn_bits *bits)
-{
- int nr = 0;
- if (bits == NULL)
- return nr;
- nr += print_insn_bits(file, bits->last);
- nr += lf_putchr(file, '_');
- nr += lf_putstr(file, bits->field->val_string);
- if (bits->opcode->is_boolean && bits->value == 0)
- nr += lf_putint(file, bits->opcode->boolean_constant);
- else if (!bits->opcode->is_boolean) {
- if (bits->opcode->last < bits->field->last)
- nr += lf_putint(file, bits->value << (bits->field->last - bits->opcode->last));
- else
- nr += lf_putint(file, bits->value);
- }
- return nr;
-}
-
-extern int
-print_function_name(lf *file,
- const char *basename,
- insn_bits *expanded_bits,
- lf_function_name_prefixes prefix)
-{
- int nr = 0;
- /* the prefix */
- switch (prefix) {
- case function_name_prefix_semantics:
- nr += lf_putstr(file, "semantic_");
- break;
- case function_name_prefix_idecode:
- nr += lf_printf(file, "idecode_");
- break;
- case function_name_prefix_itable:
- nr += lf_putstr(file, "itable_");
- break;
- case function_name_prefix_icache:
- nr += lf_putstr(file, "icache_");
- break;
- default:
- break;
- }
-
- /* the function name */
- {
- const char *pos;
- for (pos = basename;
- *pos != '\0';
- pos++) {
- switch (*pos) {
- case '/':
- case '-':
- break;
- case ' ':
- nr += lf_putchr(file, '_');
- break;
- default:
- nr += lf_putchr(file, *pos);
- break;
- }
- }
- }
-
- /* the suffix */
- if (generate_expanded_instructions)
- nr += print_insn_bits(file, expanded_bits);
-
- return nr;
-}
-
-
-void
-print_my_defines(lf *file,
- insn_bits *expanded_bits,
- table_entry *file_entry)
-{
- /* #define MY_INDEX xxxxx */
- lf_indent_suppress(file);
- lf_printf(file, "#undef MY_INDEX\n");
- lf_indent_suppress(file);
- lf_printf(file, "#define MY_INDEX ");
- print_function_name(file,
- file_entry->fields[insn_name],
- NULL,
- function_name_prefix_itable);
- lf_printf(file, "\n");
- /* #define MY_PREFIX xxxxxx */
- lf_indent_suppress(file);
- lf_printf(file, "#undef MY_PREFIX\n");
- lf_indent_suppress(file);
- lf_printf(file, "#define MY_PREFIX ");
- print_function_name(file,
- file_entry->fields[insn_name],
- expanded_bits,
- function_name_prefix_none);
- lf_printf(file, "\n");
-}
-
-
-void
-print_itrace(lf *file,
- table_entry *file_entry,
- int idecode)
-{
- lf_print__external_reference(file, file_entry->line_nr, file_entry->file_name);
- lf_printf(file, "ITRACE(trace_%s, (\"%s %s\\n\"));\n",
- (idecode ? "idecode" : "semantics"),
- (idecode ? "idecode" : "semantics"),
- file_entry->fields[insn_name]);
- lf_print__internal_reference(file);
-}
-
-
-/****************************************************************/
-
-
-static void
-gen_semantics_h(insn_table *table,
- lf *file,
- igen_code generate)
-{
- lf_printf(file, "typedef %s idecode_semantic\n(%s);\n",
- SEMANTIC_FUNCTION_TYPE,
- SEMANTIC_FUNCTION_FORMAL);
- lf_printf(file, "\n");
- if ((code & generate_calls)) {
- lf_printf(file, "extern int option_mpc860c0;\n");
- lf_printf(file, "#define PAGE_SIZE 0x1000\n");
- lf_printf(file, "\n");
- lf_printf(file, "EXTERN_SEMANTICS(void)\n");
- lf_printf(file, "semantic_init(device* root);\n");
- lf_printf(file, "\n");
- if (generate_expanded_instructions)
- insn_table_traverse_tree(table,
- file, NULL,
- 1,
- NULL, /* start */
- print_semantic_declaration, /* leaf */
- NULL, /* end */
- NULL); /* padding */
- else
- insn_table_traverse_insn(table,
- file, NULL,
- print_semantic_declaration);
-
- }
- else {
- lf_print__this_file_is_empty(file);
- }
-}
-
-
-static void
-gen_semantics_c(insn_table *table,
- cache_table *cache_rules,
- lf *file,
- igen_code generate)
-{
- if ((code & generate_calls)) {
- lf_printf(file, "\n");
- lf_printf(file, "#include \"cpu.h\"\n");
- lf_printf(file, "#include \"idecode.h\"\n");
- lf_printf(file, "#include \"semantics.h\"\n");
- lf_printf(file, "#include \"support.h\"\n");
- lf_printf(file, "\n");
- lf_printf(file, "int option_mpc860c0 = 0;\n");
- lf_printf(file, "\n");
- lf_printf(file, "EXTERN_SEMANTICS(void)\n");
- lf_printf(file, "semantic_init(device* root)\n");
- lf_printf(file, "{\n");
- lf_printf(file, " option_mpc860c0 = 0;\n");
- lf_printf(file, " if (tree_find_property(root, \"/options/mpc860c0\"))\n");
- lf_printf(file, " option_mpc860c0 = tree_find_integer_property(root, \"/options/mpc860c0\");\n");
- lf_printf(file, " option_mpc860c0 *= 4; /* convert word count to byte count */\n");
- lf_printf(file, "}\n");
- lf_printf(file, "\n");
- if (generate_expanded_instructions)
- insn_table_traverse_tree(table,
- file, cache_rules,
- 1,
- NULL, /* start */
- print_semantic_definition, /* leaf */
- NULL, /* end */
- NULL); /* padding */
- else
- insn_table_traverse_insn(table,
- file, cache_rules,
- print_semantic_definition);
-
- }
- else {
- lf_print__this_file_is_empty(file);
- }
-}
-
-
-/****************************************************************/
-
-
-static void
-gen_icache_h(insn_table *table,
- lf *file,
- igen_code generate)
-{
- lf_printf(file, "typedef %s idecode_icache\n(%s);\n",
- ICACHE_FUNCTION_TYPE,
- ICACHE_FUNCTION_FORMAL);
- lf_printf(file, "\n");
- if ((code & generate_calls)
- && (code & generate_with_icache)) {
- insn_table_traverse_function(table,
- file, NULL,
- print_icache_internal_function_declaration);
- if (generate_expanded_instructions)
- insn_table_traverse_tree(table,
- file, NULL,
- 1,
- NULL, /* start */
- print_icache_declaration, /* leaf */
- NULL, /* end */
- NULL); /* padding */
- else
- insn_table_traverse_insn(table,
- file, NULL,
- print_icache_declaration);
-
- }
- else {
- lf_print__this_file_is_empty(file);
- }
-}
-
-static void
-gen_icache_c(insn_table *table,
- cache_table *cache_rules,
- lf *file,
- igen_code generate)
-{
- /* output `internal' invalid/floating-point unavailable functions
- where needed */
- if ((code & generate_calls)
- && (code & generate_with_icache)) {
- lf_printf(file, "\n");
- lf_printf(file, "#include \"cpu.h\"\n");
- lf_printf(file, "#include \"idecode.h\"\n");
- lf_printf(file, "#include \"semantics.h\"\n");
- lf_printf(file, "#include \"icache.h\"\n");
- lf_printf(file, "#include \"support.h\"\n");
- lf_printf(file, "\n");
- insn_table_traverse_function(table,
- file, NULL,
- print_icache_internal_function_definition);
- lf_printf(file, "\n");
- if (generate_expanded_instructions)
- insn_table_traverse_tree(table,
- file, cache_rules,
- 1,
- NULL, /* start */
- print_icache_definition, /* leaf */
- NULL, /* end */
- NULL); /* padding */
- else
- insn_table_traverse_insn(table,
- file, cache_rules,
- print_icache_definition);
-
- }
- else {
- lf_print__this_file_is_empty(file);
- }
-}
-
-
-/****************************************************************/
-
-
-int
-main(int argc,
- char **argv,
- char **envp)
-{
- cache_table *cache_rules = NULL;
- lf_file_references file_references = lf_include_references;
- decode_table *decode_rules = NULL;
- filter *filters = NULL;
- insn_table *instructions = NULL;
- char *real_file_name = NULL;
- int is_header = 0;
- int ch;
-
- if (argc == 1) {
- printf("Usage:\n");
- printf(" igen <config-opts> ... <input-opts>... <output-opts>...\n");
- printf("Config options:\n");
- printf(" -F <filter-out-flag> eg -F 64 to skip 64bit instructions\n");
- printf(" -E Expand (duplicate) semantic functions\n");
- printf(" -I <icache-size> Generate cracking cache version\n");
- printf(" -C Include semantics in cache functions\n");
- printf(" -S Include insn (instruction) in icache\n");
- printf(" -R Use defines to reference cache vars\n");
- printf(" -L Supress line numbering in output files\n");
- printf(" -B <bit-size> Set the number of bits in an instruction\n");
- printf(" -H <high-bit> Set the nr of the high (msb bit)\n");
- printf(" -N <nr-cpus> Specify the max number of cpus the simulation will support\n");
- printf(" -J Use jumps instead of function calls\n");
- printf(" -T <mechanism> Override the mechanism used to decode an instruction\n");
- printf(" using <mechanism> instead of what was specified in the\n");
- printf(" decode-rules input file\n");
- printf("\n");
- printf("Input options (ucase version also dumps loaded table):\n");
- printf(" -o <decode-rules>\n");
- printf(" -k <cache-rules>\n");
- printf(" -i <instruction-table>\n");
- printf("\n");
- printf("Output options:\n");
- printf(" -n <real-name> Specify the real name of for the next output file\n");
- printf(" -h Generate header file\n");
- printf(" -c <output-file> output icache\n");
- printf(" -d <output-file> output idecode\n");
- printf(" -m <output-file> output model\n");
- printf(" -s <output-file> output schematic\n");
- printf(" -t <output-file> output itable\n");
- printf(" -f <output-file> output support functions\n");
- }
-
- while ((ch = getopt(argc, argv,
- "F:EI:RSLJT:CB:H:N:o:k:i:n:hc:d:m:s:t:f:"))
- != -1) {
- fprintf(stderr, "\t-%c %s\n", ch, (optarg ? optarg : ""));
- switch(ch) {
- case 'C':
- code |= generate_with_icache;
- code |= generate_with_semantic_icache;
- break;
- case 'S':
- code |= generate_with_icache;
- code |= generate_with_insn_in_icache;
- break;
- case 'L':
- file_references = lf_omit_references;
- break;
- case 'E':
- generate_expanded_instructions = 1;
- break;
- case 'I':
- icache_size = a2i(optarg);
- code |= generate_with_icache;
- break;
- case 'N':
- generate_smp = a2i(optarg);
- break;
- case 'R':
- code |= generate_with_direct_access;
- break;
- case 'B':
- insn_bit_size = a2i(optarg);
- ASSERT(insn_bit_size > 0 && insn_bit_size <= max_insn_bit_size
- && (hi_bit_nr == insn_bit_size-1 || hi_bit_nr == 0));
- break;
- case 'H':
- hi_bit_nr = a2i(optarg);
- ASSERT(hi_bit_nr == insn_bit_size-1 || hi_bit_nr == 0);
- break;
- case 'F':
- filters = new_filter(optarg, filters);
- break;
- case 'J':
- code &= ~generate_calls;
- code |= generate_jumps;
- break;
- case 'T':
- force_decode_gen_type(optarg);
- break;
- case 'i':
- if (decode_rules == NULL || cache_rules == NULL) {
- fprintf(stderr, "Must specify decode and cache tables\n");
- exit (1);
- }
- instructions = load_insn_table(optarg, decode_rules, filters);
- fprintf(stderr, "\texpanding ...\n");
- insn_table_expand_insns(instructions);
- break;
- case 'o':
- decode_rules = load_decode_table(optarg, hi_bit_nr);
- break;
- case 'k':
- cache_rules = load_cache_table(optarg, hi_bit_nr);
- break;
- case 'n':
- real_file_name = strdup(optarg);
- break;
- case 'h':
- is_header = 1;
- break;
- case 's':
- case 'd':
- case 'm':
- case 't':
- case 'f':
- case 'c':
- {
- lf *file = lf_open(optarg, real_file_name, file_references,
- (is_header ? lf_is_h : lf_is_c),
- argv[0]);
- lf_print__file_start(file);
- ASSERT(instructions != NULL);
- switch (ch) {
- case 's':
- if(is_header)
- gen_semantics_h(instructions, file, code);
- else
- gen_semantics_c(instructions, cache_rules, file, code);
- break;
- case 'd':
- if (is_header)
- gen_idecode_h(file, instructions, cache_rules);
- else
- gen_idecode_c(file, instructions, cache_rules);
- break;
- case 'm':
- if (is_header)
- gen_model_h(instructions, file);
- else
- gen_model_c(instructions, file);
- break;
- case 't':
- if (is_header)
- gen_itable_h(instructions, file);
- else
- gen_itable_c(instructions, file);
- break;
- case 'f':
- if (is_header)
- gen_support_h(instructions, file);
- else
- gen_support_c(instructions, file);
- break;
- case 'c':
- if (is_header)
- gen_icache_h(instructions, file, code);
- else
- gen_icache_c(instructions, cache_rules, file, code);
- break;
- }
- lf_print__file_finish(file);
- lf_close(file);
- is_header = 0;
- }
- real_file_name = NULL;
- break;
- default:
- error("unknown option\n");
- }
- }
- return 0;
-}
diff --git a/sim/ppc/igen.h b/sim/ppc/igen.h
deleted file mode 100644
index d3462098905..00000000000
--- a/sim/ppc/igen.h
+++ /dev/null
@@ -1,199 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994,1995,1996, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-/* What does the instruction look like - bit ordering and size */
-extern int hi_bit_nr;
-extern int insn_bit_size;
-
-
-/* generation options: */
-
-
-enum {
- generate_with_direct_access = 0x1,
- generate_with_icache = 0x2,
- generate_with_semantic_icache = 0x4,
- generate_with_insn_in_icache = 0x8,
-};
-
-
-typedef enum {
-
- /* Transfer control to an instructions semantic code using the the
- standard call/return mechanism */
-
- generate_calls = 0x100,
-
- /* In addition, when refering to fields access them directly instead
- of via variables */
-
- generate_calls_with_direct_access
- = generate_calls | generate_with_direct_access,
-
- /* In addition, pre-decode an instructions opcode fields (entering
- them into an icache) so that semantic code can avoid the need to
- re-decode fields each time it is executed */
-
- generate_calls_with_icache
- = generate_calls | generate_with_icache,
-
- /* In addition, the instruction decode code includes a duplicated
- copy of the instructions semantic code. This avoids the need to
- perform two calls (one to decode an instructions opcode fields
- and one to execute the instruction) when there is a miss of the
- icache */
-
- generate_calls_with_semantic_icache
- = generate_calls_with_icache | generate_with_semantic_icache,
-
- /* In addition, the semantic function refers to icache entries
- directly instead of first moving them into local variables */
-
- generate_calls_with_direct_access_icache
- = generate_calls_with_icache | generate_with_direct_access,
-
- generate_calls_with_direct_access_semantic_icache
- = generate_calls_with_direct_access_icache | generate_with_semantic_icache,
-
-
- /* Transfer control to an instructions semantic code using
- (computed) goto's instead of the more conventional call/return
- mechanism */
-
- generate_jumps = 0x200,
-
- /* As for generate jumps but with instruction fields accessed
- directly */
-
- generate_jumps_with_direct_access
- = generate_jumps | generate_with_direct_access,
-
- /* As for generate_calls_with_icache but applies to jumping code */
-
- generate_jumps_with_icache
- = generate_jumps | generate_with_icache,
-
- /* As for generate_calls_with_semantic_icache but applies to jumping
- code */
-
- generate_jumps_with_semantic_icache
- = generate_jumps_with_icache | generate_with_semantic_icache,
-
- /* As for generate_calls_with_direct_access */
-
- generate_jumps_with_direct_access_icache
- = generate_jumps_with_icache | generate_with_direct_access,
-
- generate_jumps_with_direct_access_semantic_icache
- = generate_jumps_with_direct_access_icache | generate_with_semantic_icache,
-
-} igen_code;
-
-extern igen_code code;
-
-
-
-
-extern int icache_size;
-
-
-/* Instruction expansion?
-
- Should the semantic code for each instruction, when the oportunity
- arrises, be expanded according to the variable opcode files that
- the instruction decode process renders constant */
-
-extern int generate_expanded_instructions;
-
-
-/* SMP?
-
- Should the generated code include SMP support (>0) and if so, for
- how many processors? */
-
-extern int generate_smp;
-
-
-
-
-/* Misc junk */
-
-
-
-/* Function header definitions */
-
-
-/* Cache functions: */
-
-#define ICACHE_FUNCTION_FORMAL \
-"cpu *processor,\n\
- instruction_word instruction,\n\
- unsigned_word cia,\n\
- idecode_cache *cache_entry"
-
-#define ICACHE_FUNCTION_ACTUAL "processor, instruction, cia, cache_entry"
-
-#define ICACHE_FUNCTION_TYPE \
-((code & generate_with_semantic_icache) \
- ? SEMANTIC_FUNCTION_TYPE \
- : "idecode_semantic *")
-
-
-/* Semantic functions: */
-
-#define SEMANTIC_FUNCTION_FORMAL \
-((code & generate_with_icache) \
- ? "cpu *processor,\n idecode_cache *cache_entry,\n unsigned_word cia" \
- : "cpu *processor,\n instruction_word instruction,\n unsigned_word cia")
-
-#define SEMANTIC_FUNCTION_ACTUAL \
-((code & generate_with_icache) \
- ? "processor, instruction, cia, cache_entry" \
- : "processor, instruction, cia")
-
-#define SEMANTIC_FUNCTION_TYPE "unsigned_word"
-
-
-
-extern void print_my_defines
-(lf *file,
- insn_bits *expanded_bits,
- table_entry *file_entry);
-
-extern void print_itrace
-(lf *file,
- table_entry *file_entry,
- int idecode);
-
-
-typedef enum {
- function_name_prefix_semantics,
- function_name_prefix_idecode,
- function_name_prefix_itable,
- function_name_prefix_icache,
- function_name_prefix_none
-} lf_function_name_prefixes;
-
-extern int print_function_name
-(lf *file,
- const char *basename,
- insn_bits *expanded_bits,
- lf_function_name_prefixes prefix);
diff --git a/sim/ppc/inline.c b/sim/ppc/inline.c
deleted file mode 100644
index 43595a53424..00000000000
--- a/sim/ppc/inline.c
+++ /dev/null
@@ -1,98 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1995, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-#ifndef _INLINE_C_
-#define _INLINE_C_
-
-#include "config.h"
-#include "ppc-config.h"
-
-#include "inline.h"
-
-#if (BITS_INLINE & INCLUDE_MODULE)
-#include "bits.c"
-#endif
-
-#if (SIM_ENDIAN_INLINE & INCLUDE_MODULE)
-#include "sim-endian.c"
-#endif
-
-#if (ICACHE_INLINE & INCLUDE_MODULE)
-#include "icache.c"
-#endif
-
-#if (CORE_INLINE & INCLUDE_MODULE)
-#include "corefile.c"
-#endif
-
-#if (VM_INLINE & INCLUDE_MODULE)
-#include "vm.c"
-#endif
-
-#if (EVENTS_INLINE & INCLUDE_MODULE)
-#include "events.c"
-#endif
-
-#if (MODEL_INLINE & INCLUDE_MODULE)
-#include "model.c"
-#endif
-
-#if (OPTIONS_INLINE & INCLUDE_MODULE)
-#include "options.c"
-#endif
-
-#if (MON_INLINE & INCLUDE_MODULE)
-#include "mon.c"
-#endif
-
-#if (REGISTERS_INLINE & INCLUDE_MODULE)
-#include "registers.c"
-#endif
-
-#if (INTERRUPTS_INLINE & INCLUDE_MODULE)
-#include "interrupts.c"
-#endif
-
-#if (DEVICE_INLINE & INCLUDE_MODULE)
-#include "device.c"
-#endif
-
-#if (TREE_INLINE & INCLUDE_MODULE)
-#include "tree.c"
-#endif
-
-#if (SPREG_INLINE & INCLUDE_MODULE)
-#include "spreg.c"
-#endif
-
-#if (SEMANTICS_INLINE & INCLUDE_MODULE)
-#include "semantics.c"
-#endif
-
-#if (IDECODE_INLINE & INCLUDE_MODULE)
-#include "idecode.c"
-#endif
-
-#if (OS_EMUL_INLINE & INCLUDE_MODULE)
-#include "os_emul.c"
-#endif
-
-#endif
diff --git a/sim/ppc/inline.h b/sim/ppc/inline.h
deleted file mode 100644
index f88cd9e4904..00000000000
--- a/sim/ppc/inline.h
+++ /dev/null
@@ -1,490 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1995, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-#ifndef _INLINE_H_
-#define _INLINE_H_
-
-
-#define STATIC(TYPE) static TYPE
-
-
-/* sim_endian is always inlined */
-
-#if !defined(_SIM_ENDIAN_C_) && (SIM_ENDIAN_INLINE & INCLUDE_MODULE)
-# if (SIM_ENDIAN_INLINE & INLINE_MODULE)
-# define INLINE_SIM_ENDIAN(TYPE) static INLINE TYPE UNUSED
-# define EXTERN_SIM_ENDIAN(TYPE) static TYPE UNUSED
-# else
-# define INLINE_SIM_ENDIAN(TYPE) static TYPE UNUSED
-# define EXTERN_SIM_ENDIAN(TYPE) static TYPE UNUSED
-# endif
-#else
-# define INLINE_SIM_ENDIAN(TYPE) TYPE
-# define EXTERN_SIM_ENDIAN(TYPE) TYPE
-#endif
-
-#if (SIM_ENDIAN_INLINE & INLINE_LOCALS)
-# define STATIC_INLINE_SIM_ENDIAN(TYPE) static INLINE TYPE
-#else
-# define STATIC_INLINE_SIM_ENDIAN(TYPE) static TYPE
-#endif
-
-
-/* bits is always inlined */
-
-#if !defined(_BITS_C_) && (BITS_INLINE & INCLUDE_MODULE)
-# if (BITS_INLINE & INLINE_MODULE)
-# define INLINE_BITS(TYPE) static INLINE TYPE UNUSED
-# define EXTERN_BITS(TYPE) static TYPE UNUSED
-# else
-# define INLINE_BITS(TYPE) static TYPE UNUSED
-# define EXTERN_BITS(TYPE) static TYPE UNUSED
-# endif
-#else
-# define INLINE_BITS(TYPE) TYPE
-# define EXTERN_BITS(TYPE) TYPE
-#endif
-
-#if (BITS_INLINE & INLINE_LOCALS)
-# define STATIC_INLINE_BITS(TYPE) static INLINE TYPE
-#else
-# define STATIC_INLINE_BITS(TYPE) static TYPE
-#endif
-
-
-/* core is inlined with inline.c */
-
-#if defined(_INLINE_C_) && !defined(_CORE_C_) && (CORE_INLINE & INCLUDE_MODULE)
-# if (CORE_INLINE & INLINE_MODULE)
-# define INLINE_CORE(TYPE) static INLINE TYPE UNUSED
-# define EXTERN_CORE(TYPE) static TYPE UNUSED
-#else
-# define INLINE_CORE(TYPE) static TYPE UNUSED
-# define EXTERN_CORE(TYPE) static TYPE UNUSED
-#endif
-#else
-# define INLINE_CORE(TYPE) TYPE
-# define EXTERN_CORE(TYPE) TYPE
-#endif
-
-#if (CORE_INLINE & INLINE_LOCALS)
-# define STATIC_INLINE_CORE(TYPE) static INLINE TYPE
-#else
-# define STATIC_INLINE_CORE(TYPE) static TYPE
-#endif
-
-
-/* vm is inlined with inline.c */
-
-#if defined(_INLINE_C_) && !defined(_VM_C_) && (VM_INLINE & INCLUDE_MODULE)
-# if (VM_INLINE & INLINE_MODULE)
-# define INLINE_VM(TYPE) static INLINE TYPE UNUSED
-# define EXTERN_VM(TYPE) static TYPE UNUSED
-#else
-# define INLINE_VM(TYPE) static TYPE UNUSED
-# define EXTERN_VM(TYPE) static TYPE UNUSED
-#endif
-#else
-# define INLINE_VM(TYPE) TYPE
-# define EXTERN_VM(TYPE) TYPE
-#endif
-
-#if (VM_INLINE & INLINE_LOCALS)
-# define STATIC_INLINE_VM(TYPE) static INLINE TYPE
-#else
-# define STATIC_INLINE_VM(TYPE) static TYPE
-#endif
-
-
-/* cpu is always inlined */
-
-#if !defined(_CPU_C_) && (CPU_INLINE & INCLUDE_MODULE)
-# if (CPU_INLINE & INLINE_MODULE)
-# define INLINE_CPU(TYPE) static INLINE TYPE UNUSED
-# define EXTERN_CPU(TYPE) static TYPE UNUSED
-#else
-# define INLINE_CPU(TYPE) static TYPE UNUSED
-# define EXTERN_CPU(TYPE) static TYPE UNUSED
-#endif
-#else
-# define INLINE_CPU(TYPE) TYPE
-# define EXTERN_CPU(TYPE) TYPE
-#endif
-
-#if (CPU_INLINE & INLINE_LOCALS)
-# define STATIC_INLINE_CPU(TYPE) static INLINE TYPE
-#else
-# define STATIC_INLINE_CPU(TYPE) static TYPE
-#endif
-
-
-/* model is inlined with inline.c */
-
-#if defined(_INLINE_C_) && !defined(_MODEL_C_) && (MODEL_INLINE & INCLUDE_MODULE)
-# if (MODEL_INLINE & INLINE_MODULE)
-# define INLINE_MODEL(TYPE) static INLINE TYPE UNUSED
-# define EXTERN_MODEL(TYPE) static TYPE UNUSED
-#else
-# define INLINE_MODEL(TYPE) static TYPE UNUSED
-# define EXTERN_MODEL(TYPE) static TYPE UNUSED
-#endif
-#else
-# define INLINE_MODEL(TYPE) TYPE
-# define EXTERN_MODEL(TYPE) TYPE
-#endif
-
-#if (MODEL_INLINE & INLINE_LOCALS)
-# define STATIC_INLINE_MODEL(TYPE) static INLINE TYPE
-#else
-# define STATIC_INLINE_MODEL(TYPE) static TYPE
-#endif
-
-
-/* events is inlined with inline.c */
-
-#if defined(_INLINE_C_) && !defined(_EVENTS_C_) && (EVENTS_INLINE & INCLUDE_MODULE)
-# if (EVENTS_INLINE & INLINE_MODULE)
-# define INLINE_EVENTS(TYPE) static INLINE TYPE UNUSED
-# define EXTERN_EVENTS(TYPE) static TYPE UNUSED
-#else
-# define INLINE_EVENTS(TYPE) static TYPE UNUSED
-# define EXTERN_EVENTS(TYPE) static TYPE UNUSED
-#endif
-#else
-# define INLINE_EVENTS(TYPE) TYPE
-# define EXTERN_EVENTS(TYPE) TYPE
-#endif
-
-#if (EVENTS_INLINE & INLINE_LOCALS)
-# define STATIC_INLINE_EVENTS(TYPE) static INLINE TYPE
-#else
-# define STATIC_INLINE_EVENTS(TYPE) static TYPE
-#endif
-
-
-/* mon is inlined with inline.c */
-
-#if defined(_INLINE_C_) && !defined(_MON_C_) && (MON_INLINE & INCLUDE_MODULE)
-# if (MON_INLINE & INLINE_MODULE)
-# define INLINE_MON(TYPE) static INLINE TYPE UNUSED
-# define EXTERN_MON(TYPE) static TYPE UNUSED
-#else
-# define INLINE_MON(TYPE) static TYPE UNUSED
-# define EXTERN_MON(TYPE) static TYPE UNUSED
-#endif
-#else
-# define INLINE_MON(TYPE) TYPE
-# define EXTERN_MON(TYPE) TYPE
-#endif
-
-#if (MON_INLINE & INLINE_LOCALS)
-# define STATIC_INLINE_MON(TYPE) static INLINE TYPE
-#else
-# define STATIC_INLINE_MON(TYPE) static TYPE
-#endif
-
-
-/* registers is inlined with inline.c */
-
-#if defined(_INLINE_C_) && !defined(_REGISTERS_C_) && (REGISTERS_INLINE & INCLUDE_MODULE)
-# if (REGISTERS_INLINE & INLINE_MODULE)
-# define INLINE_REGISTERS(TYPE) static INLINE TYPE UNUSED
-# define EXTERN_REGISTERS(TYPE) static TYPE UNUSED
-#else
-# define INLINE_REGISTERS(TYPE) static TYPE UNUSED
-# define EXTERN_REGISTERS(TYPE) static TYPE UNUSED
-#endif
-#else
-# define INLINE_REGISTERS(TYPE) TYPE
-# define EXTERN_REGISTERS(TYPE) TYPE
-#endif
-
-#if (REGISTERS_INLINE & INLINE_LOCALS)
-# define STATIC_INLINE_REGISTERS(TYPE) static INLINE TYPE
-#else
-# define STATIC_INLINE_REGISTERS(TYPE) static TYPE
-#endif
-
-
-/* interrupts is inlined with inline.c */
-
-#if defined(_INLINE_C_) && !defined(_INTERRUPTS_C_) && (INTERRUPTS_INLINE & INCLUDE_MODULE)
-# if (INTERRUPTS_INLINE & INLINE_MODULE)
-# define INLINE_INTERRUPTS(TYPE) static INLINE TYPE UNUSED
-# define EXTERN_INTERRUPTS(TYPE) static TYPE UNUSED
-#else
-# define INLINE_INTERRUPTS(TYPE) static TYPE UNUSED
-# define EXTERN_INTERRUPTS(TYPE) static TYPE UNUSED
-#endif
-#else
-# define INLINE_INTERRUPTS(TYPE) TYPE
-# define EXTERN_INTERRUPTS(TYPE) TYPE
-#endif
-
-#if (INTERRUPTS_INLINE & INLINE_LOCALS)
-# define STATIC_INLINE_INTERRUPTS(TYPE) static INLINE TYPE
-#else
-# define STATIC_INLINE_INTERRUPTS(TYPE) static TYPE
-#endif
-
-
-/* device is inlined with inline.c */
-
-#if defined(_INLINE_C_) && !defined(_DEVICE_C_) && (DEVICE_INLINE & INCLUDE_MODULE)
-# if (DEVICE_INLINE & INLINE_MODULE)
-# define INLINE_DEVICE(TYPE) static INLINE TYPE UNUSED
-# define EXTERN_DEVICE(TYPE) static TYPE UNUSED
-#else
-# define INLINE_DEVICE(TYPE) static TYPE UNUSED
-# define EXTERN_DEVICE(TYPE) static TYPE UNUSED
-#endif
-#else
-# define INLINE_DEVICE(TYPE) TYPE
-# define EXTERN_DEVICE(TYPE) TYPE
-#endif
-
-#if (DEVICE_INLINE & INLINE_LOCALS)
-# define STATIC_INLINE_DEVICE(TYPE) static INLINE TYPE
-#else
-# define STATIC_INLINE_DEVICE(TYPE) static TYPE
-#endif
-
-
-/* tree is inlined with inline.c */
-
-#if defined(_INLINE_C_) && !defined(_TREE_C_) && (TREE_INLINE & INCLUDE_MODULE)
-# if (TREE_INLINE & INLINE_MODULE)
-# define INLINE_TREE(TYPE) static INLINE TYPE UNUSED
-# define EXTERN_TREE(TYPE) static TYPE UNUSED
-#else
-# define INLINE_TREE(TYPE) static TYPE UNUSED
-# define EXTERN_TREE(TYPE) static TYPE UNUSED
-#endif
-#else
-# define INLINE_TREE(TYPE) TYPE
-# define EXTERN_TREE(TYPE) TYPE
-#endif
-
-#if (TREE_INLINE & INLINE_LOCALS)
-# define STATIC_INLINE_TREE(TYPE) static INLINE TYPE
-#else
-# define STATIC_INLINE_TREE(TYPE) static TYPE
-#endif
-
-
-/* spreg is inlined with inline.c */
-
-#if defined(_INLINE_C_) && !defined(_SPREG_C_) && (SPREG_INLINE & INCLUDE_MODULE)
-# if (SPREG_INLINE & INLINE_MODULE)
-# define INLINE_SPREG(TYPE) static INLINE TYPE UNUSED
-# define EXTERN_SPREG(TYPE) static TYPE UNUSED
-#else
-# define INLINE_SPREG(TYPE) static TYPE UNUSED
-# define EXTERN_SPREG(TYPE) static TYPE UNUSED
-#endif
-#else
-# define INLINE_SPREG(TYPE) TYPE
-# define EXTERN_SPREG(TYPE) TYPE
-#endif
-
-#if (SPREG_INLINE & INLINE_LOCALS)
-# define STATIC_INLINE_SPREG(TYPE) static INLINE TYPE
-#else
-# define STATIC_INLINE_SPREG(TYPE) static TYPE
-#endif
-
-
-/* semantics is inlined with inline.c */
-
-#if defined(_INLINE_C_) && !defined(_SEMANTICS_C_) && (SEMANTICS_INLINE & INCLUDE_MODULE)
-# if (SEMANTICS_INLINE & INLINE_MODULE)
-# define INLINE_SEMANTICS(TYPE) static INLINE TYPE UNUSED
-# define EXTERN_SEMANTICS(TYPE) static TYPE UNUSED REGPARM
-#else
-# define INLINE_SEMANTICS(TYPE) static TYPE UNUSED REGPARM
-# define EXTERN_SEMANTICS(TYPE) static TYPE UNUSED REGPARM
-#endif
-#else
-# define INLINE_SEMANTICS(TYPE) TYPE REGPARM
-# define EXTERN_SEMANTICS(TYPE) TYPE REGPARM
-#endif
-
-#if (SEMANTICS_INLINE & INLINE_LOCALS)
-# define STATIC_INLINE_SEMANTICS(TYPE) static INLINE TYPE
-#else
-# define STATIC_INLINE_SEMANTICS(TYPE) static TYPE REGPARM
-#endif
-
-
-/* idecode is actually not inlined */
-
-#if defined(_INLINE_C_) && !defined(_IDECODE_C_) && (IDECODE_INLINE & INCLUDE_MODULE)
-# if (IDECODE_INLINE & INLINE_MODULE)
-# define INLINE_IDECODE(TYPE) static INLINE TYPE UNUSED
-# define EXTERN_IDECODE(TYPE) static TYPE UNUSED REGPARM
-#else
-# define INLINE_IDECODE(TYPE) static TYPE UNUSED REGPARM
-# define EXTERN_IDECODE(TYPE) static TYPE UNUSED REGPARM
-#endif
-#else
-# define INLINE_IDECODE(TYPE) TYPE REGPARM
-# define EXTERN_IDECODE(TYPE) TYPE REGPARM
-#endif
-
-#if (IDECODE_INLINE & INLINE_LOCALS)
-# define STATIC_INLINE_IDECODE(TYPE) static INLINE TYPE
-#else
-# define STATIC_INLINE_IDECODE(TYPE) static TYPE REGPARM
-#endif
-
-
-/* icache is inlined with inline.c */
-
-#if defined(_INLINE_C_) && !defined(_ICACHE_C_) && (ICACHE_INLINE & INCLUDE_MODULE)
-# if (ICACHE_INLINE & INLINE_MODULE)
-# define INLINE_ICACHE(TYPE) static INLINE TYPE UNUSED
-# define EXTERN_ICACHE(TYPE) static TYPE UNUSED REGPARM
-#else
-# define INLINE_ICACHE(TYPE) static TYPE UNUSED REGPARM
-# define EXTERN_ICACHE(TYPE) static TYPE UNUSED REGPARM
-#endif
-#else
-# define INLINE_ICACHE(TYPE) TYPE REGPARM
-# define EXTERN_ICACHE(TYPE) TYPE REGPARM
-#endif
-
-#if (ICACHE_INLINE & INLINE_LOCALS)
-# define STATIC_INLINE_ICACHE(TYPE) static INLINE TYPE
-#else
-# define STATIC_INLINE_ICACHE(TYPE) static TYPE REGPARM
-#endif
-
-
-/* support is always inlined */
-
-#if !defined(_SUPPORT_C_) && (SUPPORT_INLINE & INCLUDE_MODULE)
-# if (SUPPORT_INLINE & INLINE_MODULE)
-# define INLINE_SUPPORT(TYPE) static INLINE TYPE UNUSED
-# define EXTERN_SUPPORT(TYPE) static TYPE UNUSED
-#else
-# define INLINE_SUPPORT(TYPE) static TYPE UNUSED
-# define EXTERN_SUPPORT(TYPE) static TYPE UNUSED
-#endif
-#else
-# define INLINE_SUPPORT(TYPE) TYPE
-# define EXTERN_SUPPORT(TYPE) TYPE
-#endif
-
-#if (SUPPORT_INLINE & INLINE_LOCALS)
-# define STATIC_INLINE_SUPPORT(TYPE) static INLINE TYPE
-#else
-# define STATIC_INLINE_SUPPORT(TYPE) static TYPE
-#endif
-
-
-/* options is inlined with inline.c */
-
-#if defined(_INLINE_C_) && !defined(_OPTIONS_C_) && (OPTIONS_INLINE & INCLUDE_MODULE)
-# if (OPTIONS_INLINE & INLINE_MODULE)
-# define INLINE_OPTIONS(TYPE) static INLINE TYPE UNUSED
-# define EXTERN_OPTIONS(TYPE) static TYPE UNUSED
-#else
-# define INLINE_OPTIONS(TYPE) static TYPE UNUSED
-# define EXTERN_OPTIONS(TYPE) static TYPE UNUSED
-#endif
-#else
-# define INLINE_OPTIONS(TYPE) TYPE
-# define EXTERN_OPTIONS(TYPE) TYPE
-#endif
-
-#if (OPTIONS_INLINE & INLINE_LOCALS)
-# define STATIC_INLINE_OPTIONS(TYPE) static INLINE TYPE
-#else
-# define STATIC_INLINE_OPTIONS(TYPE) static TYPE
-#endif
-
-
-/* os_emul is inlined with inline.c */
-
-#if defined(_INLINE_C_) && !defined(_OS_EMUL_C_) && (OS_EMUL_INLINE & INCLUDE_MODULE)
-# if (OS_EMUL_INLINE & INLINE_MODULE)
-# define INLINE_OS_EMUL(TYPE) static INLINE TYPE UNUSED
-# define EXTERN_OS_EMUL(TYPE) static TYPE UNUSED
-#else
-# define INLINE_OS_EMUL(TYPE) static TYPE UNUSED
-# define EXTERN_OS_EMUL(TYPE) static TYPE UNUSED
-#endif
-#else
-# define INLINE_OS_EMUL(TYPE) TYPE
-# define EXTERN_OS_EMUL(TYPE) TYPE
-#endif
-
-#if (OS_EMUL_INLINE & INLINE_LOCALS)
-# define STATIC_INLINE_OS_EMUL(TYPE) static INLINE TYPE
-#else
-# define STATIC_INLINE_OS_EMUL(TYPE) static TYPE
-#endif
-
-
-/* psim is actually not inlined */
-
-#if defined(_INLINE_C_) && !defined(_PSIM_C_) && (PSIM_INLINE & INCLUDE_MODULE)
-# if (PSIM_INLINE & INLINE_MODULE)
-# define INLINE_PSIM(TYPE) static INLINE TYPE UNUSED
-# define EXTERN_PSIM(TYPE) static TYPE UNUSED
-#else
-# define INLINE_PSIM(TYPE) static TYPE UNUSED
-# define EXTERN_PSIM(TYPE) static TYPE UNUSED
-#endif
-#else
-# define INLINE_PSIM(TYPE) TYPE
-# define EXTERN_PSIM(TYPE) TYPE
-#endif
-
-#if (PSIM_INLINE & INLINE_LOCALS)
-# define STATIC_INLINE_PSIM(TYPE) static INLINE TYPE
-#else
-# define STATIC_INLINE_PSIM(TYPE) static TYPE
-#endif
-
-
-/* cap is inlined with inline.c */
-
-#if defined(_INLINE_C_) && !defined(_CAP_C_) && (CAP_INLINE & INCLUDE_MODULE)
-# if (CAP_INLINE & INLINE_MODULE)
-# define INLINE_CAP(TYPE) static INLINE TYPE UNUSED
-# define EXTERN_CAP(TYPE) static TYPE UNUSED
-#else
-# define INLINE_CAP(TYPE) static TYPE UNUSED
-# define EXTERN_CAP(TYPE) static TYPE UNUSED
-#endif
-#else
-# define INLINE_CAP(TYPE) TYPE
-# define EXTERN_CAP(TYPE) TYPE
-#endif
-
-#if (CAP_INLINE & INLINE_LOCALS)
-# define STATIC_INLINE_CAP(TYPE) static INLINE TYPE
-#else
-# define STATIC_INLINE_CAP(TYPE) static TYPE
-#endif
-
-#endif
diff --git a/sim/ppc/interrupts.c b/sim/ppc/interrupts.c
deleted file mode 100644
index 681e791af7e..00000000000
--- a/sim/ppc/interrupts.c
+++ /dev/null
@@ -1,541 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1997, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-#ifndef _INTERRUPTS_C_
-#define _INTERRUPTS_C_
-
-#include <signal.h>
-
-#include "cpu.h"
-#include "idecode.h"
-#include "os_emul.h"
-
-
-/* Operating environment support code
-
- Unlike the VEA, the OEA must fully model the effect an interrupt
- has on the processors state.
-
- Each function below return updated values for registers effected by
- interrupts */
-
-
-STATIC_INLINE_INTERRUPTS\
-(msreg)
-interrupt_msr(msreg old_msr,
- msreg msr_clear,
- msreg msr_set)
-{
- msreg msr_set_to_0 = (msr_branch_trace_enable
- | msr_data_relocate
- | msr_external_interrupt_enable
- | msr_floating_point_exception_mode_0
- | msr_floating_point_exception_mode_1
- | msr_floating_point_available
- | msr_instruction_relocate
- | msr_power_management_enable
- | msr_problem_state
- | msr_recoverable_interrupt
- | msr_single_step_trace_enable);
- /* remember, in 32bit mode msr_64bit_mode is zero */
- msreg new_msr = ((((old_msr & ~msr_set_to_0)
- | msr_64bit_mode)
- & ~msr_clear)
- | msr_set);
- return new_msr;
-}
-
-
-STATIC_INLINE_INTERRUPTS\
-(msreg)
-interrupt_srr1(msreg old_msr,
- msreg srr1_clear,
- msreg srr1_set)
-{
- spreg srr1_mask = (MASK(0,32)
- | MASK(37, 41)
- | MASK(48, 63));
- spreg srr1 = (old_msr & srr1_mask & ~srr1_clear) | srr1_set;
- return srr1;
-}
-
-
-STATIC_INLINE_INTERRUPTS\
-(unsigned_word)
-interrupt_base_ea(msreg msr)
-{
- if (msr & msr_interrupt_prefix)
- return MASK(0, 43);
- else
- return 0;
-}
-
-
-/* finish off an interrupt for the OEA model, updating all registers
- and forcing a restart of the processor */
-
-STATIC_INLINE_INTERRUPTS\
-(unsigned_word)
-perform_oea_interrupt(cpu *processor,
- unsigned_word cia,
- unsigned_word vector_offset,
- msreg msr_clear,
- msreg msr_set,
- msreg srr1_clear,
- msreg srr1_set)
-{
- msreg old_msr = MSR;
- msreg new_msr = interrupt_msr(old_msr, msr_clear, msr_set);
- unsigned_word nia;
- if (!(old_msr & msr_recoverable_interrupt)) {
- cpu_error(processor, cia,
- "double interrupt - MSR[RI] bit clear when attempting to deliver interrupt, cia=0x%lx, msr=0x%lx; srr0=0x%lx(cia), srr1=0x%lx(msr); trap-vector=0x%lx, trap-msr=0x%lx",
- (unsigned long)cia,
- (unsigned long)old_msr,
- (unsigned long)SRR0,
- (unsigned long)SRR1,
- (unsigned long)vector_offset,
- (unsigned long)new_msr);
- }
- SRR0 = (spreg)(cia);
- SRR1 = interrupt_srr1(old_msr, srr1_clear, srr1_set);
- MSR = new_msr;
- nia = interrupt_base_ea(new_msr) + vector_offset;
- cpu_synchronize_context(processor, cia);
- return nia;
-}
-
-
-INLINE_INTERRUPTS\
-(void)
-machine_check_interrupt(cpu *processor,
- unsigned_word cia)
-{
- switch (CURRENT_ENVIRONMENT) {
-
- case USER_ENVIRONMENT:
- case VIRTUAL_ENVIRONMENT:
- cpu_error(processor, cia, "machine-check interrupt");
-
- case OPERATING_ENVIRONMENT:
- TRACE(trace_interrupts, ("machine-check interrupt - cia=0x%lx\n",
- (unsigned long)cia));
- cia = perform_oea_interrupt(processor, cia, 0x00200, 0, 0, 0, 0);
- cpu_restart(processor, cia);
-
- default:
- error("internal error - machine_check_interrupt - bad switch");
-
- }
-}
-
-
-INLINE_INTERRUPTS\
-(void)
-data_storage_interrupt(cpu *processor,
- unsigned_word cia,
- unsigned_word ea,
- storage_interrupt_reasons reason,
- int is_store)
-{
- switch (CURRENT_ENVIRONMENT) {
-
- case USER_ENVIRONMENT:
- case VIRTUAL_ENVIRONMENT:
- error("internal error - data_storage_interrupt - should not be called in VEA mode");
- break;
-
- case OPERATING_ENVIRONMENT:
- {
- spreg direction = (is_store ? dsisr_store_operation : 0);
- switch (reason) {
- case direct_store_storage_interrupt:
- DSISR = dsisr_direct_store_error_exception | direction;
- break;
- case hash_table_miss_storage_interrupt:
- DSISR = dsisr_hash_table_or_dbat_miss | direction;
- break;
- case protection_violation_storage_interrupt:
- DSISR = dsisr_protection_violation | direction;
- break;
- case earwax_violation_storage_interrupt:
- DSISR = dsisr_earwax_violation | direction;
- break;
- case segment_table_miss_storage_interrupt:
- DSISR = dsisr_segment_table_miss | direction;
- break;
- case earwax_disabled_storage_interrupt:
- DSISR = dsisr_earwax_disabled | direction;
- break;
- default:
- error("internal error - data_storage_interrupt - reason %d not implemented", reason);
- break;
- }
- DAR = (spreg)ea;
- TRACE(trace_interrupts, ("data storage interrupt - cia=0x%lx DAR=0x%lx DSISR=0x%lx\n",
- (unsigned long)cia,
- (unsigned long)DAR,
- (unsigned long)DSISR));
- cia = perform_oea_interrupt(processor, cia, 0x00300, 0, 0, 0, 0);
- cpu_restart(processor, cia);
- }
-
- default:
- error("internal error - data_storage_interrupt - bad switch");
-
- }
-}
-
-
-INLINE_INTERRUPTS\
-(void)
-instruction_storage_interrupt(cpu *processor,
- unsigned_word cia,
- storage_interrupt_reasons reason)
-{
- switch (CURRENT_ENVIRONMENT) {
-
- case USER_ENVIRONMENT:
- case VIRTUAL_ENVIRONMENT:
- error("internal error - instruction_storage_interrupt - should not be called in VEA mode");
-
- case OPERATING_ENVIRONMENT:
- {
- msreg srr1_set;
- switch(reason) {
- case hash_table_miss_storage_interrupt:
- srr1_set = srr1_hash_table_or_ibat_miss;
- break;
- case direct_store_storage_interrupt:
- srr1_set = srr1_direct_store_error_exception;
- break;
- case protection_violation_storage_interrupt:
- srr1_set = srr1_protection_violation;
- break;
- case segment_table_miss_storage_interrupt:
- srr1_set = srr1_segment_table_miss;
- break;
- default:
- srr1_set = 0;
- error("internal error - instruction_storage_interrupt - reason %d not implemented");
- break;
- }
- TRACE(trace_interrupts, ("instruction storage interrupt - cia=0x%lx SRR1|=0x%lx\n",
- (unsigned long)cia,
- (unsigned long)srr1_set));
- cia = perform_oea_interrupt(processor, cia, 0x00400, 0, 0, 0, srr1_set);
- cpu_restart(processor, cia);
- }
-
- default:
- error("internal error - instruction_storage_interrupt - bad switch");
-
- }
-}
-
-
-
-INLINE_INTERRUPTS\
-(void)
-alignment_interrupt(cpu *processor,
- unsigned_word cia,
- unsigned_word ra)
-{
- switch (CURRENT_ENVIRONMENT) {
-
- case USER_ENVIRONMENT:
- case VIRTUAL_ENVIRONMENT:
- cpu_error(processor, cia, "alignment interrupt - ra=0x%lx", ra);
-
- case OPERATING_ENVIRONMENT:
- DAR = (spreg)ra;
- DSISR = 0; /* FIXME */
- TRACE(trace_interrupts, ("alignment interrupt - cia=0x%lx DAR=0x%lx DSISR=0x%lx\n",
- (unsigned long)cia,
- (unsigned long)DAR,
- (unsigned long)DSISR));
- cia = perform_oea_interrupt(processor, cia, 0x00600, 0, 0, 0, 0);
- cpu_restart(processor, cia);
-
- default:
- error("internal error - alignment_interrupt - bad switch");
-
- }
-}
-
-
-
-
-INLINE_INTERRUPTS\
-(void)
-program_interrupt(cpu *processor,
- unsigned_word cia,
- program_interrupt_reasons reason)
-{
- switch (CURRENT_ENVIRONMENT) {
-
- case USER_ENVIRONMENT:
- case VIRTUAL_ENVIRONMENT:
- switch (reason) {
- case floating_point_enabled_program_interrupt:
- cpu_error(processor, cia, "program interrupt - %s",
- "floating point enabled");
- break;
- case illegal_instruction_program_interrupt:
- cpu_error(processor, cia, "program interrupt - %s",
- "illegal instruction");
- break;
- case privileged_instruction_program_interrupt:
- cpu_error(processor, cia, "program interrupt - %s",
- "privileged instruction");
- break;
- case trap_program_interrupt:
- cpu_error(processor, cia, "program interrupt - %s",
- "trap");
- break;
- case optional_instruction_program_interrupt:
- cpu_error(processor, cia, "program interrupt - %s",
- "illegal instruction (optional instruction not supported)");
- break;
- case mpc860c0_instruction_program_interrupt:
- cpu_error(processor, cia, "program interrupt - %s",
- "problematic branch detected, see MPC860 C0 errata");
- break;
- default:
- error("internal error - program_interrupt - reason %d not implemented", reason);
- }
-
- case OPERATING_ENVIRONMENT:
- {
- msreg srr1_set;
- switch (reason) {
- case floating_point_enabled_program_interrupt:
- srr1_set = srr1_floating_point_enabled;
- break;
- case optional_instruction_program_interrupt:
- case illegal_instruction_program_interrupt:
- srr1_set = srr1_illegal_instruction;
- break;
- case privileged_instruction_program_interrupt:
- srr1_set = srr1_priviliged_instruction;
- break;
- case trap_program_interrupt:
- srr1_set = srr1_trap;
- break;
- case mpc860c0_instruction_program_interrupt:
- srr1_set = 0;
- cpu_error(processor, cia, "program interrupt - %s",
- "problematic branch detected, see MPC860 C0 errata");
- break;
- default:
- srr1_set = 0;
- error("internal error - program_interrupt - reason %d not implemented", reason);
- break;
- }
- TRACE(trace_interrupts, ("program interrupt - cia=0x%lx SRR1|=0x%lx\n",
- (unsigned long)cia,
- (unsigned long)srr1_set));
- cia = perform_oea_interrupt(processor, cia, 0x00700, 0, 0, 0, srr1_set);
- cpu_restart(processor, cia);
- }
-
- default:
- error("internal error - program_interrupt - bad switch");
-
- }
-}
-
-
-INLINE_INTERRUPTS\
-(void)
-floating_point_unavailable_interrupt(cpu *processor,
- unsigned_word cia)
-{
- switch (CURRENT_ENVIRONMENT) {
-
- case USER_ENVIRONMENT:
- case VIRTUAL_ENVIRONMENT:
- cpu_error(processor, cia, "floating-point unavailable interrupt");
-
- case OPERATING_ENVIRONMENT:
- TRACE(trace_interrupts, ("floating-point unavailable interrupt - cia=0x%lx\n",
- (unsigned long)cia));
- cia = perform_oea_interrupt(processor, cia, 0x00800, 0, 0, 0, 0);
- cpu_restart(processor, cia);
-
- default:
- error("internal error - floating_point_unavailable_interrupt - bad switch");
-
- }
-}
-
-
-INLINE_INTERRUPTS\
-(void)
-system_call_interrupt(cpu *processor,
- unsigned_word cia)
-{
- TRACE(trace_interrupts, ("system-call interrupt - cia=0x%lx\n", (unsigned long)cia));
-
- switch (CURRENT_ENVIRONMENT) {
-
- case USER_ENVIRONMENT:
- case VIRTUAL_ENVIRONMENT:
- os_emul_system_call(processor, cia);
- cpu_restart(processor, cia+4);
-
- case OPERATING_ENVIRONMENT:
- cia = perform_oea_interrupt(processor, cia+4, 0x00c00, 0, 0, 0, 0);
- cpu_restart(processor, cia);
-
- default:
- error("internal error - system_call_interrupt - bad switch");
-
- }
-}
-
-INLINE_INTERRUPTS\
-(void)
-floating_point_assist_interrupt(cpu *processor,
- unsigned_word cia)
-{
- switch (CURRENT_ENVIRONMENT) {
-
- case USER_ENVIRONMENT:
- case VIRTUAL_ENVIRONMENT:
- cpu_error(processor, cia, "floating-point assist interrupt");
-
- case OPERATING_ENVIRONMENT:
- TRACE(trace_interrupts, ("floating-point assist interrupt - cia=0x%lx\n", (unsigned long)cia));
- cia = perform_oea_interrupt(processor, cia, 0x00e00, 0, 0, 0, 0);
- cpu_restart(processor, cia);
-
- default:
- error("internal error - floating_point_assist_interrupt - bad switch");
-
- }
-}
-
-
-
-/* handle an externally generated event or an interrupt that has just
- been enabled through changes to the MSR. */
-
-STATIC_INLINE_INTERRUPTS\
-(void)
-deliver_hardware_interrupt(void *data)
-{
- cpu *processor = (cpu*)data;
- interrupts *ints = cpu_interrupts(processor);
- ints->delivery_scheduled = NULL;
- if ((cpu_registers(processor)->msr & (msr_floating_point_exception_mode_0
- | msr_floating_point_exception_mode_1))
- && cpu_registers(processor)->fpscr & fpscr_fex) {
- msreg srr1_set = srr1_floating_point_enabled | srr1_subsequent_instruction;
- unsigned_word cia = cpu_get_program_counter(processor);
- unsigned_word nia = perform_oea_interrupt(processor,
- cia, 0x00700, 0, 0, 0, srr1_set);
- cpu_set_program_counter(processor, nia);
- }
- else if (cpu_registers(processor)->msr & msr_external_interrupt_enable) {
- /* external interrupts have a high priority and remain pending */
- if (ints->pending_interrupts & external_interrupt_pending) {
- unsigned_word cia = cpu_get_program_counter(processor);
- unsigned_word nia = perform_oea_interrupt(processor,
- cia, 0x00500, 0, 0, 0, 0);
- TRACE(trace_interrupts, ("external interrupt - cia=0x%lx\n", (unsigned long)cia));
- cpu_set_program_counter(processor, nia);
- }
- /* decrementer interrupts have a lower priority and are once only */
- else if (ints->pending_interrupts & decrementer_interrupt_pending) {
- unsigned_word cia = cpu_get_program_counter(processor);
- unsigned_word nia = perform_oea_interrupt(processor,
- cia, 0x00900, 0, 0, 0, 0);
- TRACE(trace_interrupts, ("decrementer interrupt - cia 0x%lx, time %ld\n",
- (unsigned long)cia,
- (unsigned long)event_queue_time(psim_event_queue(cpu_system(processor)))
- ));
- cpu_set_program_counter(processor, nia);
- ints->pending_interrupts &= ~decrementer_interrupt_pending;
- }
- }
-}
-
-STATIC_INLINE_INTERRUPTS\
-(void)
-schedule_hardware_interrupt_delivery(cpu *processor)
-{
- interrupts *ints = cpu_interrupts(processor);
- if (ints->delivery_scheduled == NULL) {
- ints->delivery_scheduled =
- event_queue_schedule(psim_event_queue(cpu_system(processor)),
- 0, deliver_hardware_interrupt, processor);
- }
-}
-
-
-INLINE_INTERRUPTS\
-(void)
-check_masked_interrupts(cpu *processor)
-{
- if (((cpu_registers(processor)->msr & (msr_floating_point_exception_mode_0
- | msr_floating_point_exception_mode_1))
- && cpu_registers(processor)->fpscr & fpscr_fex)
- || ((cpu_registers(processor)->msr & msr_external_interrupt_enable)
- && (cpu_interrupts(processor)->pending_interrupts)))
- schedule_hardware_interrupt_delivery(processor);
-}
-
-INLINE_INTERRUPTS\
-(void)
-decrementer_interrupt(cpu *processor)
-{
- interrupts *ints = cpu_interrupts(processor);
- ints->pending_interrupts |= decrementer_interrupt_pending;
- if (cpu_registers(processor)->msr & msr_external_interrupt_enable) {
- schedule_hardware_interrupt_delivery(processor);
- }
-}
-
-INLINE_INTERRUPTS\
-(void)
-external_interrupt(cpu *processor,
- int is_asserted)
-{
- interrupts *ints = cpu_interrupts(processor);
- if (is_asserted) {
- if (!ints->pending_interrupts & external_interrupt_pending) {
- ints->pending_interrupts |= external_interrupt_pending;
- if (cpu_registers(processor)->msr & msr_external_interrupt_enable)
- schedule_hardware_interrupt_delivery(processor);
- }
- else {
- /* check that we haven't missed out on a chance to deliver an
- interrupt */
- ASSERT(!(cpu_registers(processor)->msr & msr_external_interrupt_enable));
- }
- }
- else {
- ints->pending_interrupts &= ~external_interrupt_pending;
- }
-}
-
-#endif /* _INTERRUPTS_C_ */
diff --git a/sim/ppc/interrupts.h b/sim/ppc/interrupts.h
deleted file mode 100644
index 93447a874d7..00000000000
--- a/sim/ppc/interrupts.h
+++ /dev/null
@@ -1,170 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1995, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-#ifndef _INTERRUPTS_H_
-#define _INTERRUPTS_H_
-
-/* Interrupts:
-
- The code below handles two different types of interrupts.
- Synchronous and Asynchronous.
-
- Synchronous:
-
- Interrupts that must immediately force either an abort or restart
- of a current instruction are implemented by forcing an instruction
- restart. (or to put it another way, long jump). In looking at the
- code it may occure to you that, for some interrupts, they could
- return instead of restarting the cpu (eg system_call). While true
- (it once was like that) I've decided to make the behavour of all
- interrupt routines roughly identical.
-
- Because, a cpu's recorded state (ie what is in the cpu structure)
- is allowed to lag behind the cpu's true current state (eg PC not
- updated) sycnronous interrupt handers are parameterized with the
- the cpu being interrupted so that, as part of moddeling the
- interrupt, the cpu's state can be updated.
-
- Asynchronous:
-
- Interrupts such as reset or external exception are delivered using
- more normal (returning) functions. It is assumed that these
- functions are called out side of the normal processor execution
- cycle. */
-
-
-/* Software generated interrupts.
-
- The below are generated by software driven events. For instance,
- an invalid instruction or access (virtual or physical) to an
- invalid address */
-
-typedef enum {
- direct_store_storage_interrupt,
- hash_table_miss_storage_interrupt,
- protection_violation_storage_interrupt,
- earwax_violation_storage_interrupt,
- segment_table_miss_storage_interrupt,
- earwax_disabled_storage_interrupt,
- vea_storage_interrupt,
-} storage_interrupt_reasons;
-
-
-INLINE_INTERRUPTS\
-(void) data_storage_interrupt
-(cpu *processor,
- unsigned_word cia,
- unsigned_word ea,
- storage_interrupt_reasons reason,
- int is_store);
-
-INLINE_INTERRUPTS\
-(void) instruction_storage_interrupt
-(cpu *processor,
- unsigned_word cia,
- storage_interrupt_reasons reason);
-
-INLINE_INTERRUPTS\
-(void) alignment_interrupt
-(cpu *processor,
- unsigned_word cia,
- unsigned_word ra);
-
-typedef enum {
- floating_point_enabled_program_interrupt,
- illegal_instruction_program_interrupt,
- privileged_instruction_program_interrupt,
- trap_program_interrupt,
- optional_instruction_program_interrupt, /* subset of illegal instruction */
- mpc860c0_instruction_program_interrupt, /* fwd br, taken but not predicted, near EO page */
- nr_program_interrupt_reasons
-} program_interrupt_reasons;
-
-INLINE_INTERRUPTS\
-(void) program_interrupt
-(cpu *processor,
- unsigned_word cia,
- program_interrupt_reasons reason);
-
-INLINE_INTERRUPTS\
-(void) floating_point_unavailable_interrupt
-(cpu *processor,
- unsigned_word cia);
-
-INLINE_INTERRUPTS\
-(void) system_call_interrupt
-(cpu *processor,
- unsigned_word cia);
-
-INLINE_INTERRUPTS\
-(void) floating_point_assist_interrupt
-(cpu *processor,
- unsigned_word cia);
-
-INLINE_INTERRUPTS\
-(void) machine_check_interrupt
-(cpu *processor,
- unsigned_word cia);
-
-/* Hardware generated interrupts:
-
- These asynchronous hardware generated interrupts may be called at
- any time. It is the responsibility of this (the interrupts) module
- to ensure that interrupts are delivered correctly (when possible).
- The delivery of these interrupts is controlled by the MSR's
- external interrupt enable bit. When ever the MSR's value is
- changed, the processor must call the check_masked_interrupts()
- function in case delivery has been made possible.
-
- decrementer_interrupt is `edge' sensitive. Multiple edges arriving
- before the first edge has been delivered result in only one
- interrupt.
-
- external_interrupt is `level' sensitive. An external interrupt
- will only be delivered when the external interrupt port is
- `asserted'. While interrupts are disabled, the external interrupt
- can be asserted and then de-asserted without an interrupt
- eventually being delivered. */
-
-enum {
- external_interrupt_pending = 1,
- decrementer_interrupt_pending = 2,
-};
-
-typedef struct _interrupts {
- event_entry_tag delivery_scheduled;
- int pending_interrupts;
-} interrupts;
-
-INLINE_INTERRUPTS\
-(void) check_masked_interrupts
-(cpu *processor);
-
-INLINE_INTERRUPTS\
-(void) decrementer_interrupt
-(cpu *processor);
-
-INLINE_INTERRUPTS\
-(void) external_interrupt
-(cpu *processor,
- int is_asserted);
-
-#endif /* _INTERRUPTS_H_ */
diff --git a/sim/ppc/ld-cache.c b/sim/ppc/ld-cache.c
deleted file mode 100644
index 135013e5f23..00000000000
--- a/sim/ppc/ld-cache.c
+++ /dev/null
@@ -1,115 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1997, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-#include "misc.h"
-#include "lf.h"
-#include "table.h"
-#include "ld-cache.h"
-
-#ifndef NULL
-#define NULL 0
-#endif
-
-
-enum {
- ca_type,
- ca_field_name,
- ca_derived_name,
- ca_type_def,
- ca_expression,
- nr_cache_rule_fields,
-};
-
-static const name_map cache_type_map[] = {
- { "cache", cache_value },
- { "compute", compute_value },
- { "scratch", scratch_value },
- { NULL, 0 },
-};
-
-
-cache_table *
-load_cache_table(char *file_name,
- int hi_bit_nr)
-{
- table *file = table_open(file_name, nr_cache_rule_fields, 0);
- table_entry *entry;
- cache_table *table = NULL;
- cache_table **curr_rule = &table;
- while ((entry = table_entry_read(file)) != NULL) {
- cache_table *new_rule = ZALLOC(cache_table);
- new_rule->type = name2i(entry->fields[ca_type], cache_type_map);
- new_rule->field_name = entry->fields[ca_field_name];
- new_rule->derived_name = entry->fields[ca_derived_name];
- new_rule->type_def = (strlen(entry->fields[ca_type_def])
- ? entry->fields[ca_type_def]
- : NULL);
- new_rule->expression = (strlen(entry->fields[ca_expression]) > 0
- ? entry->fields[ca_expression]
- : NULL);
- new_rule->file_entry = entry;
- *curr_rule = new_rule;
- curr_rule = &new_rule->next;
- }
- return table;
-}
-
-
-
-#ifdef MAIN
-
-static void
-dump_cache_rule(cache_table* rule,
- int indent)
-{
- dumpf(indent, "((cache_table*)0x%x\n", rule);
- dumpf(indent, " (type %s)\n", i2name(rule->type, cache_type_map));
- dumpf(indent, " (field_name \"%s\")\n", rule->field_name);
- dumpf(indent, " (derived_name \"%s\")\n", rule->derived_name);
- dumpf(indent, " (type-def \"%s\")\n", rule->type_def);
- dumpf(indent, " (expression \"%s\")\n", rule->expression);
- dumpf(indent, " (next 0x%x)\n", rule->next);
- dumpf(indent, " )\n");
-}
-
-
-static void
-dump_cache_rules(cache_table* rule,
- int indent)
-{
- while (rule) {
- dump_cache_rule(rule, indent);
- rule = rule->next;
- }
-}
-
-
-int
-main(int argc, char **argv)
-{
- cache_table *rules;
- if (argc != 3)
- error("Usage: cache <cache-file> <hi-bit-nr>\n");
- rules = load_cache_table(argv[1], a2i(argv[2]));
- dump_cache_rules(rules, 0);
- return 0;
-}
-#endif
diff --git a/sim/ppc/ld-cache.h b/sim/ppc/ld-cache.h
deleted file mode 100644
index 72e39504380..00000000000
--- a/sim/ppc/ld-cache.h
+++ /dev/null
@@ -1,81 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1997, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-/* Instruction unpacking:
-
- Once the instruction has been decoded, the register (and other)
- fields within the instruction need to be extracted.
-
- The table that follows determines how each field should be treated.
- Importantly it considers the case where the extracted field is to
- be used immediatly or stored in an instruction cache.
-
- <type>
-
- Indicates what to do with the cache entry. If a cache is to be
- used. SCRATCH and CACHE values are defined when a cache entry is
- being filled while CACHE and COMPUTE values are defined in the
- semantic code.
-
- Zero marks the end of the table. More importantly 1. indicates
- that the entry is valid and can be cached. 2. indicates that that
- the entry is valid but can not be cached.
-
- <field_name>
-
- The field name as given in the instruction spec.
-
- <derived_name>
-
- A new name for <field_name> once it has been extracted from the
- instruction (and possibly stored in the instruction cache).
-
- <type>
-
- String specifying the storage type for <new_name> (the extracted
- field>.
-
- <expression>
-
- Specifies how to get <new_name> from <old_name>. If null, old and
- new name had better be the same. */
-
-
-typedef enum {
- scratch_value,
- cache_value,
- compute_value,
-} cache_rule_type;
-
-typedef struct _cache_table cache_table;
-struct _cache_table {
- cache_rule_type type;
- char *field_name;
- char *derived_name;
- char *type_def;
- char *expression;
- table_entry *file_entry;
- cache_table *next;
-};
-
-
-extern cache_table *load_cache_table
-(char *file_name,
- int hi_bit_nr);
diff --git a/sim/ppc/ld-decode.c b/sim/ppc/ld-decode.c
deleted file mode 100644
index 3964960af26..00000000000
--- a/sim/ppc/ld-decode.c
+++ /dev/null
@@ -1,155 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1997, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-/* load the opcode stat structure */
-
-#include "misc.h"
-#include "lf.h"
-#include "table.h"
-#include "ld-decode.h"
-
-#ifndef NULL
-#define NULL 0
-#endif
-
-enum {
- op_options,
- op_first,
- op_last,
- op_force_first,
- op_force_last,
- op_force_expansion,
- op_special_mask,
- op_special_value,
- op_special_constant,
- nr_decode_fields,
-};
-
-static const name_map decode_type_map[] = {
- { "normal", normal_decode_rule },
- { "expand-forced", expand_forced_rule },
- { "boolean", boolean_rule },
- { NULL, normal_decode_rule },
-};
-
-static const name_map decode_gen_map[] = {
- { "array", array_gen },
- { "switch", switch_gen },
- { "padded-switch", padded_switch_gen },
- { "goto-switch", goto_switch_gen },
- { NULL, -1 },
-};
-
-static const name_map decode_slash_map[] = {
- { "variable-slash", 0 },
- { "constant-slash", 1 },
- { NULL },
-};
-
-
-static decode_gen_type overriding_gen_type = invalid_gen;
-
-void
-force_decode_gen_type(const char *type)
-{
- overriding_gen_type = name2i(type, decode_gen_map);
-}
-
-
-decode_table *
-load_decode_table(char *file_name,
- int hi_bit_nr)
-{
- table *file = table_open(file_name, nr_decode_fields, 0);
- table_entry *entry;
- decode_table *table = NULL;
- decode_table **curr_rule = &table;
- while ((entry = table_entry_read(file)) != NULL) {
- decode_table *new_rule = ZALLOC(decode_table);
- new_rule->type = name2i(entry->fields[op_options], decode_type_map);
- new_rule->gen = (overriding_gen_type != invalid_gen
- ? overriding_gen_type
- : name2i(entry->fields[op_options], decode_gen_map));
- new_rule->force_slash = name2i(entry->fields[op_options], decode_slash_map);
- new_rule->first = target_a2i(hi_bit_nr, entry->fields[op_first]);
- new_rule->last = target_a2i(hi_bit_nr, entry->fields[op_last]);
- new_rule->force_first = (strlen(entry->fields[op_force_first])
- ? target_a2i(hi_bit_nr, entry->fields[op_force_first])
- : new_rule->last + 1);
- new_rule->force_last = (strlen(entry->fields[op_force_last])
- ? target_a2i(hi_bit_nr, entry->fields[op_force_last])
- : new_rule->first - 1);
- new_rule->force_expansion = entry->fields[op_force_expansion];
- new_rule->special_mask = a2i(entry->fields[op_special_mask]);
- new_rule->special_value = a2i(entry->fields[op_special_value]);
- new_rule->special_constant = a2i(entry->fields[op_special_constant]);
- *curr_rule = new_rule;
- curr_rule = &new_rule->next;
- }
- return table;
-}
-
-
-void
-dump_decode_rule(decode_table *rule,
- int indent)
-{
- dumpf(indent, "((decode_table*)%p\n", rule);
- if (rule) {
- dumpf(indent, " (type %s)\n", i2name(rule->type, decode_type_map));
- dumpf(indent, " (gen %s)\n", i2name(rule->gen, decode_gen_map));
- dumpf(indent, " (force_slash %d)\n", rule->force_slash);
- dumpf(indent, " (first %d)\n", rule->first);
- dumpf(indent, " (last %d)\n", rule->last);
- dumpf(indent, " (force_first %d)\n", rule->force_first);
- dumpf(indent, " (force_last %d)\n", rule->force_last);
- dumpf(indent, " (force_expansion \"%s\")\n", rule->force_expansion);
- dumpf(indent, " (special_mask 0x%x)\n", rule->special_mask);
- dumpf(indent, " (special_value 0x%x)\n", rule->special_value);
- dumpf(indent, " (special_constant 0x%x)\n", rule->special_constant);
- dumpf(indent, " (next 0x%x)\n", rule->next);
- }
- dumpf(indent, " )\n");
-}
-
-
-#ifdef MAIN
-
-static void
-dump_decode_rules(decode_table *rule,
- int indent)
-{
- while (rule) {
- dump_decode_rule(rule, indent);
- rule = rule->next;
- }
-}
-
-int
-main(int argc, char **argv)
-{
- decode_table *rules;
- if (argc != 3)
- error("Usage: decode <decode-file> <hi-bit-nr>\n");
- rules = load_decode_table(argv[1], a2i(argv[2]));
- dump_decode_rules(rules, 0);
- return 0;
-}
-#endif
diff --git a/sim/ppc/ld-decode.h b/sim/ppc/ld-decode.h
deleted file mode 100644
index de23181ba37..00000000000
--- a/sim/ppc/ld-decode.h
+++ /dev/null
@@ -1,143 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994,1995,1996, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-/* Instruction decode table:
-
- <options>:<first>:<last>:<force-first>:<force-last>:<force-expand>:<special>...
-
-
-
- Ignore the below:
-
-
- The instruction decode table contains rules that dictate how igen
- is going to firstly break down the opcode table and secondly
-
- The table that follows is used by gen to construct a decision tree
- that can identify each possible instruction. Gen then outputs this
- decision tree as (according to config) a table or switch statement
- as the function idecode.
-
- In parallel to this, as mentioned above, WITH_EXPANDED_SEMANTICS
- determines of the semantic functions themselves should be expanded
- in a similar way.
-
- <first>
- <last>
-
- Range of bits (within the instruction) that should be searched for
- an instruction field. Within such ranges, gen looks for opcodes
- (constants), registers (strings) and reserved bits (slash) and
- according to the rules that follows includes or excludes them from
- a possible instruction field.
-
- <force_first>
- <force_last>
-
- If an instruction field was found, enlarge the field size so that
- it is forced to at least include bits starting from <force_first>
- (<force_last>). To stop this occuring, use <force_first> = <last>
- + 1 and <force_last> = <first> - 1.
-
- <force_slash>
-
- Treat `/' fields as a constant instead of variable when looking for
- an instruction field.
-
- <force_expansion>
-
- Treat any contained register (string) fields as constant when
- determining the instruction field. For the instruction decode (and
- controled by IDECODE_EXPAND_SEMANTICS) this forces the expansion of
- what would otherwize be non constant bits of an instruction.
-
- <use_switch>
-
- Should this table be expanded using a switch statement (val 1) and
- if so, should it be padded with entries so as to force the compiler
- to generate a jump table (val 2). Or a branch table (val 3).
-
- <special_mask>
- <special_value>
- <special_rule>
- <special_constant>
-
- Special rule to fine tune how specific (or groups) of instructions
- are expanded. The applicability of the rule is determined by
-
- <special_mask> != 0 && (instruction> & <special_mask>) == <special_value>
-
- Where <instruction> is obtained by looking only at constant fields
- with in an instructions spec. When determining an expansion, the
- rule is only considered when a node contains a single instruction.
- <special_rule> can be any of:
-
- 0: for this instruction, expand by earlier rules
- 1: expand bits <force_low> .. <force_hi> only
- 2: boolean expansion of only zero/non-zero cases
- 3: boolean expansion of equality of special constant
-
- */
-
-
-typedef enum {
- normal_decode_rule,
- expand_forced_rule,
- boolean_rule,
- nr_decode_rules
-} decode_special_type;
-
-typedef enum {
- invalid_gen,
- array_gen,
- switch_gen,
- padded_switch_gen,
- goto_switch_gen,
- nr_decode_gen_types,
-} decode_gen_type;
-
-
-typedef struct _decode_table decode_table;
-struct _decode_table {
- decode_special_type type;
- decode_gen_type gen;
- int first;
- int last;
- int force_first;
- int force_last;
- int force_slash;
- char *force_expansion;
- unsigned special_mask;
- unsigned special_value;
- unsigned special_constant;
- decode_table *next;
-};
-
-
-extern void force_decode_gen_type
-(const char *type);
-
-extern decode_table *load_decode_table
-(char *file_name,
- int hi_bit_nr);
-
-extern void dump_decode_rule
-(decode_table *rule,
- int indent);
diff --git a/sim/ppc/ld-insn.c b/sim/ppc/ld-insn.c
deleted file mode 100644
index a190d85a83f..00000000000
--- a/sim/ppc/ld-insn.c
+++ /dev/null
@@ -1,925 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994,1995,1996, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-#include "misc.h"
-#include "lf.h"
-#include "table.h"
-#include "filter.h"
-#include "ld-decode.h"
-#include "ld-cache.h"
-#include "ld-insn.h"
-
-#include "igen.h"
-
-static void
-update_depth(insn_table *entry,
- lf *file,
- void *data,
- insn *instruction,
- int depth)
-{
- int *max_depth = (int*)data;
- if (*max_depth < depth)
- *max_depth = depth;
-}
-
-
-int
-insn_table_depth(insn_table *table)
-{
- int depth = 0;
- insn_table_traverse_tree(table,
- NULL,
- &depth,
- 1,
- NULL, /*start*/
- update_depth,
- NULL, /*end*/
- NULL); /*padding*/
- return depth;
-}
-
-
-static insn_fields *
-parse_insn_format(table_entry *entry,
- char *format)
-{
- char *chp;
- insn_fields *fields = ZALLOC(insn_fields);
-
- /* create a leading sentinal */
- fields->first = ZALLOC(insn_field);
- fields->first->first = -1;
- fields->first->last = -1;
- fields->first->width = 0;
-
- /* and a trailing sentinal */
- fields->last = ZALLOC(insn_field);
- fields->last->first = insn_bit_size;
- fields->last->last = insn_bit_size;
- fields->last->width = 0;
-
- /* link them together */
- fields->first->next = fields->last;
- fields->last->prev = fields->first;
-
- /* now work through the formats */
- chp = format;
-
- while (*chp != '\0') {
- char *start_pos;
- char *start_val;
- int strlen_val;
- int strlen_pos;
- insn_field *new_field;
-
- /* sanity check */
- if (!isdigit(*chp)) {
- error("%s:%d: missing position field at `%s'\n",
- entry->file_name, entry->line_nr, chp);
- }
-
- /* break out the bit position */
- start_pos = chp;
- while (isdigit(*chp))
- chp++;
- strlen_pos = chp - start_pos;
- if (*chp == '.' && strlen_pos > 0)
- chp++;
- else {
- error("%s:%d: missing field value at %s\n",
- entry->file_name, entry->line_nr, chp);
- break;
- }
-
- /* break out the value */
- start_val = chp;
- while ((*start_val == '/' && *chp == '/')
- || (isdigit(*start_val) && isdigit(*chp))
- || (isalpha(*start_val) && (isalnum(*chp) || *chp == '_')))
- chp++;
- strlen_val = chp - start_val;
- if (*chp == ',')
- chp++;
- else if (*chp != '\0' || strlen_val == 0) {
- error("%s:%d: missing field terminator at %s\n",
- entry->file_name, entry->line_nr, chp);
- break;
- }
-
- /* create a new field and insert it */
- new_field = ZALLOC(insn_field);
- new_field->next = fields->last;
- new_field->prev = fields->last->prev;
- new_field->next->prev = new_field;
- new_field->prev->next = new_field;
-
- /* the value */
- new_field->val_string = (char*)zalloc(strlen_val+1);
- strncpy(new_field->val_string, start_val, strlen_val);
- if (isdigit(*new_field->val_string)) {
- new_field->val_int = a2i(new_field->val_string);
- new_field->is_int = 1;
- }
- else if (new_field->val_string[0] == '/') {
- new_field->is_slash = 1;
- }
- else {
- new_field->is_string = 1;
- }
-
- /* the pos */
- new_field->pos_string = (char*)zalloc(strlen_pos+1);
- strncpy(new_field->pos_string, start_pos, strlen_pos);
- new_field->first = target_a2i(hi_bit_nr, new_field->pos_string);
- new_field->last = new_field->next->first - 1; /* guess */
- new_field->width = new_field->last - new_field->first + 1; /* guess */
- new_field->prev->last = new_field->first-1; /*fix*/
- new_field->prev->width = new_field->first - new_field->prev->first; /*fix*/
- }
-
- /* fiddle first/last so that the sentinals `disapear' */
- ASSERT(fields->first->last < 0);
- ASSERT(fields->last->first >= insn_bit_size);
- fields->first = fields->first->next;
- fields->last = fields->last->prev;
-
- /* now go over this again, pointing each bit position at a field
- record */
- {
- int i;
- insn_field *field;
- field = fields->first;
- for (i = 0; i < insn_bit_size; i++) {
- while (field->last < i)
- field = field->next;
- fields->bits[i] = field;
- }
- }
-
- /* go over each of the fields, and compute a `value' for the insn */
- {
- insn_field *field;
- fields->value = 0;
- for (field = fields->first;
- field->last < insn_bit_size;
- field = field->next) {
- fields->value <<= field->width;
- if (field->is_int)
- fields->value |= field->val_int;
- }
- }
- return fields;
-}
-
-
-static void
-model_table_insert(insn_table *table,
- table_entry *file_entry)
-{
- int len;
-
- /* create a new model */
- model *new_model = ZALLOC(model);
-
- new_model->name = file_entry->fields[model_identifer];
- new_model->printable_name = file_entry->fields[model_name];
- new_model->insn_default = file_entry->fields[model_default];
-
- while (*new_model->insn_default && isspace(*new_model->insn_default))
- new_model->insn_default++;
-
- len = strlen(new_model->insn_default);
- if (max_model_fields_len < len)
- max_model_fields_len = len;
-
- /* append it to the end of the model list */
- if (last_model)
- last_model->next = new_model;
- else
- models = new_model;
- last_model = new_model;
-}
-
-static void
-model_table_insert_specific(insn_table *table,
- table_entry *file_entry,
- insn **start_ptr,
- insn **end_ptr)
-{
- insn *ptr = ZALLOC(insn);
- ptr->file_entry = file_entry;
- if (*end_ptr)
- (*end_ptr)->next = ptr;
- else
- (*start_ptr) = ptr;
- (*end_ptr) = ptr;
-}
-
-
-static void
-insn_table_insert_function(insn_table *table,
- table_entry *file_entry)
-{
- /* create a new function */
- insn *new_function = ZALLOC(insn);
- new_function->file_entry = file_entry;
-
- /* append it to the end of the function list */
- if (table->last_function)
- table->last_function->next = new_function;
- else
- table->functions = new_function;
- table->last_function = new_function;
-}
-
-extern void
-insn_table_insert_insn(insn_table *table,
- table_entry *file_entry,
- insn_fields *fields)
-{
- insn **ptr_to_cur_insn = &table->insns;
- insn *cur_insn = *ptr_to_cur_insn;
- table_model_entry *insn_model_ptr;
- model *model_ptr;
-
- /* create a new instruction */
- insn *new_insn = ZALLOC(insn);
- new_insn->file_entry = file_entry;
- new_insn->fields = fields;
-
- /* Check out any model information returned to make sure the model
- is correct. */
- for(insn_model_ptr = file_entry->model_first; insn_model_ptr; insn_model_ptr = insn_model_ptr->next) {
- char *name = insn_model_ptr->fields[insn_model_name];
- int len = strlen (insn_model_ptr->fields[insn_model_fields]);
-
- while (len > 0 && isspace(*insn_model_ptr->fields[insn_model_fields])) {
- len--;
- insn_model_ptr->fields[insn_model_fields]++;
- }
-
- if (max_model_fields_len < len)
- max_model_fields_len = len;
-
- for(model_ptr = models; model_ptr; model_ptr = model_ptr->next) {
- if (strcmp(name, model_ptr->printable_name) == 0) {
-
- /* Replace the name field with that of the global model, so that when we
- want to print it out, we can just compare pointers. */
- insn_model_ptr->fields[insn_model_name] = model_ptr->printable_name;
- break;
- }
- }
-
- if (!model_ptr)
- error("%s:%d: machine model `%s' was not known about\n",
- file_entry->file_name, file_entry->line_nr, name);
- }
-
- /* insert it according to the order of the fields */
- while (cur_insn != NULL
- && new_insn->fields->value >= cur_insn->fields->value) {
- ptr_to_cur_insn = &cur_insn->next;
- cur_insn = *ptr_to_cur_insn;
- }
-
- new_insn->next = cur_insn;
- *ptr_to_cur_insn = new_insn;
-
- table->nr_insn++;
-}
-
-
-
-insn_table *
-load_insn_table(const char *file_name,
- decode_table *decode_rules,
- filter *filters)
-{
- table *file = table_open(file_name, nr_insn_table_fields, nr_insn_model_table_fields);
- insn_table *table = ZALLOC(insn_table);
- table_entry *file_entry;
- table->opcode_rule = decode_rules;
-
- while ((file_entry = table_entry_read(file)) != NULL) {
- if (it_is("function", file_entry->fields[insn_flags])
- || it_is("internal", file_entry->fields[insn_flags])) {
- insn_table_insert_function(table, file_entry);
- }
- else if (it_is("model", file_entry->fields[insn_flags])) {
- model_table_insert(table, file_entry);
- }
- else if (it_is("model-macro", file_entry->fields[insn_flags])) {
- model_table_insert_specific(table, file_entry, &model_macros, &last_model_macro);
- }
- else if (it_is("model-function", file_entry->fields[insn_flags])) {
- model_table_insert_specific(table, file_entry, &model_functions, &last_model_function);
- }
- else if (it_is("model-internal", file_entry->fields[insn_flags])) {
- model_table_insert_specific(table, file_entry, &model_internal, &last_model_internal);
- }
- else if (it_is("model-static", file_entry->fields[insn_flags])) {
- model_table_insert_specific(table, file_entry, &model_static, &last_model_static);
- }
- else if (it_is("model-data", file_entry->fields[insn_flags])) {
- model_table_insert_specific(table, file_entry, &model_data, &last_model_data);
- }
- else {
- insn_fields *fields;
- /* skip instructions that aren't relevant to the mode */
- if (is_filtered_out(file_entry->fields[insn_flags], filters)) {
- fprintf(stderr, "Dropping %s - %s\n",
- file_entry->fields[insn_name],
- file_entry->fields[insn_flags]);
- }
- else {
- /* create/insert the new instruction */
- fields = parse_insn_format(file_entry,
- file_entry->fields[insn_format]);
- insn_table_insert_insn(table, file_entry, fields);
- }
- }
- }
- return table;
-}
-
-
-extern void
-insn_table_traverse_tree(insn_table *table,
- lf *file,
- void *data,
- int depth,
- leaf_handler *start,
- insn_handler *leaf,
- leaf_handler *end,
- padding_handler *padding)
-{
- insn_table *entry;
- int entry_nr;
-
- ASSERT(table != NULL
- && table->opcode != NULL
- && table->nr_entries > 0
- && table->entries != 0);
-
- if (start != NULL && depth >= 0)
- start(table, file, data, depth);
-
- for (entry_nr = 0, entry = table->entries;
- entry_nr < (table->opcode->is_boolean
- ? 2
- : (1 << (table->opcode->last - table->opcode->first + 1)));
- entry_nr ++) {
- if (entry == NULL
- || (!table->opcode->is_boolean
- && entry_nr < entry->opcode_nr)) {
- if (padding != NULL && depth >= 0)
- padding(table, file, data, depth, entry_nr);
- }
- else {
- ASSERT(entry != NULL && (entry->opcode_nr == entry_nr
- || table->opcode->is_boolean));
- if (entry->opcode != NULL && depth != 0) {
- insn_table_traverse_tree(entry, file, data, depth+1,
- start, leaf, end, padding);
- }
- else if (depth >= 0) {
- if (leaf != NULL)
- leaf(entry, file, data, entry->insns, depth);
- }
- entry = entry->sibling;
- }
- }
- if (end != NULL && depth >= 0)
- end(table, file, data, depth);
-}
-
-
-extern void
-insn_table_traverse_function(insn_table *table,
- lf *file,
- void *data,
- function_handler *leaf)
-{
- insn *function;
- for (function = table->functions;
- function != NULL;
- function = function->next) {
- leaf(table, file, data, function->file_entry);
- }
-}
-
-extern void
-insn_table_traverse_insn(insn_table *table,
- lf *file,
- void *data,
- insn_handler *handler)
-{
- insn *instruction;
- for (instruction = table->insns;
- instruction != NULL;
- instruction = instruction->next) {
- handler(table, file, data, instruction, 0);
- }
-}
-
-
-/****************************************************************/
-
-typedef enum {
- field_constant_int = 1,
- field_constant_slash = 2,
- field_constant_string = 3
-} constant_field_types;
-
-
-static int
-insn_field_is_constant(insn_field *field,
- decode_table *rule)
-{
- /* field is an integer */
- if (field->is_int)
- return field_constant_int;
- /* field is `/' and treating that as a constant */
- if (field->is_slash && rule->force_slash)
- return field_constant_slash;
- /* field, though variable is on the list */
- if (field->is_string && rule->force_expansion != NULL) {
- char *forced_fields = rule->force_expansion;
- while (*forced_fields != '\0') {
- int field_len;
- char *end = strchr(forced_fields, ',');
- if (end == NULL)
- field_len = strlen(forced_fields);
- else
- field_len = end-forced_fields;
- if (strncmp(forced_fields, field->val_string, field_len) == 0
- && field->val_string[field_len] == '\0')
- return field_constant_string;
- forced_fields += field_len;
- if (*forced_fields == ',')
- forced_fields++;
- }
- }
- return 0;
-}
-
-
-static opcode_field *
-insn_table_find_opcode_field(insn *insns,
- decode_table *rule,
- int string_only)
-{
- opcode_field *curr_opcode = ZALLOC(opcode_field);
- insn *entry;
- ASSERT(rule);
-
- curr_opcode->first = insn_bit_size;
- curr_opcode->last = -1;
- for (entry = insns; entry != NULL; entry = entry->next) {
- insn_fields *fields = entry->fields;
- opcode_field new_opcode;
-
- /* find a start point for the opcode field */
- new_opcode.first = rule->first;
- while (new_opcode.first <= rule->last
- && (!string_only
- || insn_field_is_constant(fields->bits[new_opcode.first],
- rule) != field_constant_string)
- && (string_only
- || !insn_field_is_constant(fields->bits[new_opcode.first],
- rule)))
- new_opcode.first = fields->bits[new_opcode.first]->last + 1;
- ASSERT(new_opcode.first > rule->last
- || (string_only
- && insn_field_is_constant(fields->bits[new_opcode.first],
- rule) == field_constant_string)
- || (!string_only
- && insn_field_is_constant(fields->bits[new_opcode.first],
- rule)));
-
- /* find the end point for the opcode field */
- new_opcode.last = rule->last;
- while (new_opcode.last >= rule->first
- && (!string_only
- || insn_field_is_constant(fields->bits[new_opcode.last],
- rule) != field_constant_string)
- && (string_only
- || !insn_field_is_constant(fields->bits[new_opcode.last],
- rule)))
- new_opcode.last = fields->bits[new_opcode.last]->first - 1;
- ASSERT(new_opcode.last < rule->first
- || (string_only
- && insn_field_is_constant(fields->bits[new_opcode.last],
- rule) == field_constant_string)
- || (!string_only
- && insn_field_is_constant(fields->bits[new_opcode.last],
- rule)));
-
- /* now see if our current opcode needs expanding */
- if (new_opcode.first <= rule->last
- && curr_opcode->first > new_opcode.first)
- curr_opcode->first = new_opcode.first;
- if (new_opcode.last >= rule->first
- && curr_opcode->last < new_opcode.last)
- curr_opcode->last = new_opcode.last;
-
- }
-
- /* was any thing interesting found? */
- if (curr_opcode->first > rule->last) {
- ASSERT(curr_opcode->last < rule->first);
- return NULL;
- }
- ASSERT(curr_opcode->last >= rule->first);
- ASSERT(curr_opcode->first <= rule->last);
-
- /* if something was found, check it includes the forced field range */
- if (!string_only
- && curr_opcode->first > rule->force_first) {
- curr_opcode->first = rule->force_first;
- }
- if (!string_only
- && curr_opcode->last < rule->force_last) {
- curr_opcode->last = rule->force_last;
- }
- /* handle special case elminating any need to do shift after mask */
- if (string_only
- && rule->force_last == insn_bit_size-1) {
- curr_opcode->last = insn_bit_size-1;
- }
-
- /* handle any special cases */
- switch (rule->type) {
- case normal_decode_rule:
- /* let the above apply */
- break;
- case expand_forced_rule:
- /* expand a limited nr of bits, ignoring the rest */
- curr_opcode->first = rule->force_first;
- curr_opcode->last = rule->force_last;
- break;
- case boolean_rule:
- curr_opcode->is_boolean = 1;
- curr_opcode->boolean_constant = rule->special_constant;
- break;
- default:
- error("Something is going wrong\n");
- }
-
- return curr_opcode;
-}
-
-
-static void
-insn_table_insert_expanded(insn_table *table,
- insn *old_insn,
- int new_opcode_nr,
- insn_bits *new_bits)
-{
- insn_table **ptr_to_cur_entry = &table->entries;
- insn_table *cur_entry = *ptr_to_cur_entry;
-
- /* find the new table for this entry */
- while (cur_entry != NULL
- && cur_entry->opcode_nr < new_opcode_nr) {
- ptr_to_cur_entry = &cur_entry->sibling;
- cur_entry = *ptr_to_cur_entry;
- }
-
- if (cur_entry == NULL || cur_entry->opcode_nr != new_opcode_nr) {
- insn_table *new_entry = ZALLOC(insn_table);
- new_entry->opcode_nr = new_opcode_nr;
- new_entry->expanded_bits = new_bits;
- new_entry->opcode_rule = table->opcode_rule->next;
- new_entry->sibling = cur_entry;
- new_entry->parent = table;
- *ptr_to_cur_entry = new_entry;
- cur_entry = new_entry;
- table->nr_entries++;
- }
- /* ASSERT new_bits == cur_entry bits */
- ASSERT(cur_entry != NULL && cur_entry->opcode_nr == new_opcode_nr);
- insn_table_insert_insn(cur_entry,
- old_insn->file_entry,
- old_insn->fields);
-}
-
-static void
-insn_table_expand_opcode(insn_table *table,
- insn *instruction,
- int field_nr,
- int opcode_nr,
- insn_bits *bits)
-{
-
- if (field_nr > table->opcode->last) {
- insn_table_insert_expanded(table, instruction, opcode_nr, bits);
- }
- else {
- insn_field *field = instruction->fields->bits[field_nr];
- if (field->is_int || field->is_slash) {
- ASSERT(field->first >= table->opcode->first
- && field->last <= table->opcode->last);
- insn_table_expand_opcode(table, instruction, field->last+1,
- ((opcode_nr << field->width) + field->val_int),
- bits);
- }
- else {
- int val;
- int last_pos = ((field->last < table->opcode->last)
- ? field->last : table->opcode->last);
- int first_pos = ((field->first > table->opcode->first)
- ? field->first : table->opcode->first);
- int width = last_pos - first_pos + 1;
- int last_val = (table->opcode->is_boolean
- ? 2 : (1 << width));
- for (val = 0; val < last_val; val++) {
- insn_bits *new_bits = ZALLOC(insn_bits);
- new_bits->field = field;
- new_bits->value = val;
- new_bits->last = bits;
- new_bits->opcode = table->opcode;
- insn_table_expand_opcode(table, instruction, last_pos+1,
- ((opcode_nr << width) | val),
- new_bits);
- }
- }
- }
-}
-
-static void
-insn_table_insert_expanding(insn_table *table,
- insn *entry)
-{
- insn_table_expand_opcode(table,
- entry,
- table->opcode->first,
- 0,
- table->expanded_bits);
-}
-
-
-extern void
-insn_table_expand_insns(insn_table *table)
-{
-
- ASSERT(table->nr_insn >= 1);
-
- /* determine a valid opcode */
- while (table->opcode_rule) {
- /* specials only for single instructions */
- if ((table->nr_insn > 1
- && table->opcode_rule->special_mask == 0
- && table->opcode_rule->type == normal_decode_rule)
- || (table->nr_insn == 1
- && table->opcode_rule->special_mask != 0
- && ((table->insns->fields->value
- & table->opcode_rule->special_mask)
- == table->opcode_rule->special_value))
- || (generate_expanded_instructions
- && table->opcode_rule->special_mask == 0
- && table->opcode_rule->type == normal_decode_rule))
- table->opcode =
- insn_table_find_opcode_field(table->insns,
- table->opcode_rule,
- table->nr_insn == 1/*string*/
- );
- if (table->opcode != NULL)
- break;
- table->opcode_rule = table->opcode_rule->next;
- }
-
- /* did we find anything */
- if (table->opcode == NULL) {
- return;
- }
- ASSERT(table->opcode != NULL);
-
- /* back link what we found to its parent */
- if (table->parent != NULL) {
- ASSERT(table->parent->opcode != NULL);
- table->opcode->parent = table->parent->opcode;
- }
-
- /* expand the raw instructions according to the opcode */
- {
- insn *entry;
- for (entry = table->insns; entry != NULL; entry = entry->next) {
- insn_table_insert_expanding(table, entry);
- }
- }
-
- /* and do the same for the sub entries */
- {
- insn_table *entry;
- for (entry = table->entries; entry != NULL; entry = entry->sibling) {
- insn_table_expand_insns(entry);
- }
- }
-}
-
-
-
-
-#ifdef MAIN
-
-static void
-dump_insn_field(insn_field *field,
- int indent)
-{
-
- printf("(insn_field*)0x%x\n", (unsigned)field);
-
- dumpf(indent, "(first %d)\n", field->first);
-
- dumpf(indent, "(last %d)\n", field->last);
-
- dumpf(indent, "(width %d)\n", field->width);
-
- if (field->is_int)
- dumpf(indent, "(is_int %d)\n", field->val_int);
-
- if (field->is_slash)
- dumpf(indent, "(is_slash)\n");
-
- if (field->is_string)
- dumpf(indent, "(is_string `%s')\n", field->val_string);
-
- dumpf(indent, "(next 0x%x)\n", field->next);
-
- dumpf(indent, "(prev 0x%x)\n", field->prev);
-
-
-}
-
-static void
-dump_insn_fields(insn_fields *fields,
- int indent)
-{
- int i;
-
- printf("(insn_fields*)%p\n", fields);
-
- dumpf(indent, "(first 0x%x)\n", fields->first);
- dumpf(indent, "(last 0x%x)\n", fields->last);
-
- dumpf(indent, "(value 0x%x)\n", fields->value);
-
- for (i = 0; i < insn_bit_size; i++) {
- dumpf(indent, "(bits[%d] ", i, fields->bits[i]);
- dump_insn_field(fields->bits[i], indent+1);
- dumpf(indent, " )\n");
- }
-
-}
-
-
-static void
-dump_opcode_field(opcode_field *field, int indent, int levels)
-{
- printf("(opcode_field*)%p\n", field);
- if (levels && field != NULL) {
- dumpf(indent, "(first %d)\n", field->first);
- dumpf(indent, "(last %d)\n", field->last);
- dumpf(indent, "(is_boolean %d)\n", field->is_boolean);
- dumpf(indent, "(parent ");
- dump_opcode_field(field->parent, indent, levels-1);
- }
-}
-
-
-static void
-dump_insn_bits(insn_bits *bits, int indent, int levels)
-{
- printf("(insn_bits*)%p\n", bits);
-
- if (levels && bits != NULL) {
- dumpf(indent, "(value %d)\n", bits->value);
- dumpf(indent, "(opcode ");
- dump_opcode_field(bits->opcode, indent+1, 0);
- dumpf(indent, " )\n");
- dumpf(indent, "(field ");
- dump_insn_field(bits->field, indent+1);
- dumpf(indent, " )\n");
- dumpf(indent, "(last ");
- dump_insn_bits(bits->last, indent+1, levels-1);
- }
-}
-
-
-
-static void
-dump_insn(insn *entry, int indent, int levels)
-{
- printf("(insn*)%p\n", entry);
-
- if (levels && entry != NULL) {
-
- dumpf(indent, "(file_entry ");
- dump_table_entry(entry->file_entry, indent+1);
- dumpf(indent, " )\n");
-
- dumpf(indent, "(fields ");
- dump_insn_fields(entry->fields, indent+1);
- dumpf(indent, " )\n");
-
- dumpf(indent, "(next ");
- dump_insn(entry->next, indent+1, levels-1);
- dumpf(indent, " )\n");
-
- }
-
-}
-
-
-static void
-dump_insn_table(insn_table *table,
- int indent, int levels)
-{
-
- printf("(insn_table*)%p\n", table);
-
- if (levels && table != NULL) {
-
- dumpf(indent, "(opcode_nr %d)\n", table->opcode_nr);
-
- dumpf(indent, "(expanded_bits ");
- dump_insn_bits(table->expanded_bits, indent+1, -1);
- dumpf(indent, " )\n");
-
- dumpf(indent, "(int nr_insn %d)\n", table->nr_insn);
-
- dumpf(indent, "(insns ");
- dump_insn(table->insns, indent+1, table->nr_insn);
- dumpf(indent, " )\n");
-
- dumpf(indent, "(opcode_rule ");
- dump_decode_rule(table->opcode_rule, indent+1);
- dumpf(indent, " )\n");
-
- dumpf(indent, "(opcode ");
- dump_opcode_field(table->opcode, indent+1, 1);
- dumpf(indent, " )\n");
-
- dumpf(indent, "(nr_entries %d)\n", table->entries);
- dumpf(indent, "(entries ");
- dump_insn_table(table->entries, indent+1, table->nr_entries);
- dumpf(indent, " )\n");
-
- dumpf(indent, "(sibling ", table->sibling);
- dump_insn_table(table->sibling, indent+1, levels-1);
- dumpf(indent, " )\n");
-
- dumpf(indent, "(parent ", table->parent);
- dump_insn_table(table->parent, indent+1, 0);
- dumpf(indent, " )\n");
-
- }
-}
-
-int insn_bit_size = max_insn_bit_size;
-int hi_bit_nr;
-int generate_expanded_instructions;
-
-int
-main(int argc, char **argv)
-{
- filter *filters = NULL;
- decode_table *decode_rules = NULL;
- insn_table *instructions = NULL;
-
- if (argc != 5)
- error("Usage: insn <filter> <hi-bit-nr> <decode-table> <insn-table>\n");
-
- filters = new_filter(argv[1], filters);
- hi_bit_nr = a2i(argv[2]);
- ASSERT(hi_bit_nr < insn_bit_size);
- decode_rules = load_decode_table(argv[3], hi_bit_nr);
- instructions = load_insn_table(argv[4], decode_rules, filters);
- insn_table_expand_insns(instructions);
-
- dump_insn_table(instructions, 0, -1);
- return 0;
-}
-
-#endif
diff --git a/sim/ppc/ld-insn.h b/sim/ppc/ld-insn.h
deleted file mode 100644
index e800f0dac23..00000000000
--- a/sim/ppc/ld-insn.h
+++ /dev/null
@@ -1,281 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994,1995,1996, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-/*
-# --
-#
-#
-# Fields:
-#
-# 1 Instruction format as a `start-bit,content' pairs.
-# the content is one of a digit, field name or `/' (aka.0)
-#
-# 2 Format specifier
-#
-# 3 Flags: 64 - 64bit only
-# f - floating point enabled required
-#
-# 4 short name
-#
-# 5 Description
-#
-#
-# For flags marked 'model', the fields are interpreted as follows:
-#
-# 1 Not used
-#
-# 2 Not used
-#
-# 3 "macro"
-#
-# 4 String name for model
-#
-# 5 Specific CPU model, must be an identifier
-#
-# 6 Comma separated list of functional units
-
-*/
-
-
-/* Global constants */
-
-enum {
- max_insn_bit_size = 32,
-};
-
-
-typedef struct _insn_field insn_field;
-struct _insn_field {
- int first;
- int last;
- int width;
- int is_int;
- int is_slash;
- int is_string;
- int val_int;
- char *pos_string;
- char *val_string;
- insn_field *next;
- insn_field *prev;
-};
-
-typedef struct _insn_fields insn_fields;
-struct _insn_fields {
- insn_field *bits[max_insn_bit_size];
- insn_field *first;
- insn_field *last;
- unsigned value;
-};
-
-
-/****************************************************************/
-
-typedef struct _opcode_field opcode_field;
-struct _opcode_field {
- int first;
- int last;
- int is_boolean;
- unsigned boolean_constant;
- opcode_field *parent;
-};
-
-
-/****************************************************************/
-
-typedef struct _insn_bits insn_bits;
-struct _insn_bits {
- int is_expanded;
- int value;
- insn_field *field;
- opcode_field *opcode;
- insn_bits *last;
-};
-
-
-/****************************************************************/
-
-
-typedef enum {
- insn_format,
- insn_form,
- insn_flags,
- insn_mnemonic,
- insn_name,
- insn_comment,
- nr_insn_table_fields
-} insn_table_fields;
-
-typedef enum {
- function_type = insn_format,
- function_name = insn_name,
- function_param = insn_comment
-} function_table_fields;
-
-typedef enum {
- model_name = insn_mnemonic,
- model_identifer = insn_name,
- model_default = insn_comment,
-} model_table_fields;
-
-typedef struct _insn insn;
-struct _insn {
- table_entry *file_entry;
- insn_fields *fields;
- insn *next;
-};
-
-typedef struct _insn_undef insn_undef;
-struct _insn_undef {
- insn_undef *next;
- char *name;
-};
-
-typedef struct _model model;
-struct _model {
- model *next;
- char *name;
- char *printable_name;
- char *insn_default;
- table_model_entry *func_unit_start;
- table_model_entry *func_unit_end;
-};
-
-typedef struct _insn_table insn_table;
-struct _insn_table {
- int opcode_nr;
- insn_bits *expanded_bits;
- int nr_insn;
- insn *insns;
- insn *functions;
- insn *last_function;
- decode_table *opcode_rule;
- opcode_field *opcode;
- int nr_entries;
- insn_table *entries;
- insn_table *sibling;
- insn_table *parent;
-};
-
-typedef enum {
- insn_model_name,
- insn_model_fields,
- nr_insn_model_table_fields
-} insn_model_table_fields;
-
-
-extern insn_table *load_insn_table
-(const char *file_name,
- decode_table *decode_rules,
- filter *filters);
-
-model *models;
-model *last_model;
-
-insn *model_macros;
-insn *last_model_macro;
-
-insn *model_functions;
-insn *last_model_function;
-
-insn *model_internal;
-insn *last_model_internal;
-
-insn *model_static;
-insn *last_model_static;
-
-insn *model_data;
-insn *last_model_data;
-
-int max_model_fields_len;
-
-extern void insn_table_insert_insn
-(insn_table *table,
- table_entry *file_entry,
- insn_fields *fields);
-
-
-/****************************************************************/
-
-/****************************************************************/
-
-typedef void leaf_handler
-(insn_table *entry,
- lf *file,
- void *data,
- int depth);
-
-typedef void insn_handler
-(insn_table *table,
- lf *file,
- void *data,
- insn *instruction,
- int depth);
-
-typedef void padding_handler
-(insn_table *table,
- lf *file,
- void *data,
- int depth,
- int opcode_nr);
-
-
-extern void insn_table_traverse_tree
-(insn_table *table,
- lf *file,
- void *data,
- int depth,
- leaf_handler *start,
- insn_handler *handler,
- leaf_handler *end,
- padding_handler *padding);
-
-
-extern void insn_table_traverse_insn
-(insn_table *table,
- lf *file,
- void *data,
- insn_handler *handler);
-
-
-
-/****************************************************************/
-
-typedef void function_handler
-(insn_table *table,
- lf *file,
- void *data,
- table_entry *function);
-
-extern void
-insn_table_traverse_function
-(insn_table *table,
- lf *file,
- void *data,
- function_handler *leaf);
-
-/****************************************************************/
-
-
-
-extern void insn_table_expand_insns
-(insn_table *table);
-
-extern int insn_table_depth
-(insn_table *table);
diff --git a/sim/ppc/lf.c b/sim/ppc/lf.c
deleted file mode 100644
index 2a420151efa..00000000000
--- a/sim/ppc/lf.c
+++ /dev/null
@@ -1,440 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1995, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-#include <stdio.h>
-#include <stdarg.h>
-#include <ctype.h>
-
-#include "config.h"
-#include "misc.h"
-#include "lf.h"
-
-#ifdef HAVE_STDLIB_H
-#include <stdlib.h>
-#endif
-
-#ifdef HAVE_STRING_H
-#include <string.h>
-#else
-#ifdef HAVE_STRINGS_H
-#include <strings.h>
-#endif
-#endif
-
-struct _lf {
- FILE *stream;
- int line_nr; /* nr complete lines written, curr line is line_nr+1 */
- int indent;
- int line_blank;
- const char *name;
- const char *program;
- lf_file_references references;
- lf_file_type type;
-};
-
-
-lf *
-lf_open(char *name,
- char *real_name,
- lf_file_references references,
- lf_file_type type,
- const char *program)
-{
- /* create a file object */
- lf *new_lf = ZALLOC(lf);
- ASSERT(new_lf != NULL);
- new_lf->references = references;
- new_lf->type = type;
- new_lf->name = (real_name == NULL ? name : real_name);
- new_lf->program = program;
- /* attach to stdout if pipe */
- if (!strcmp(name, "-")) {
- new_lf->stream = stdout;
- }
- else {
- /* create a new file */
- new_lf->stream = fopen(name, "w");
- if (new_lf->stream == NULL) {
- perror(name);
- exit(1);
- }
- }
- return new_lf;
-}
-
-
-void
-lf_close(lf *file)
-{
- if (file->stream != stdout) {
- if (fclose(file->stream)) {
- perror("lf_close.fclose");
- exit(1);
- }
- free(file);
- }
-}
-
-
-int
-lf_putchr(lf *file,
- const char chr)
-{
- int nr = 0;
- if (chr == '\n') {
- file->line_nr += 1;
- file->line_blank = 1;
- }
- else if (file->line_blank) {
- int pad;
- for (pad = file->indent; pad > 0; pad--)
- putc(' ', file->stream);
- nr += file->indent;
- file->line_blank = 0;
- }
- putc(chr, file->stream);
- nr += 1;
- return nr;
-}
-
-void
-lf_indent_suppress(lf *file)
-{
- file->line_blank = 0;
-}
-
-
-int
-lf_putstr(lf *file,
- const char *string)
-{
- int nr = 0;
- const char *chp;
- if (string != NULL) {
- for (chp = string; *chp != '\0'; chp++) {
- nr += lf_putchr(file, *chp);
- }
- }
- return nr;
-}
-
-static int
-do_lf_putunsigned(lf *file,
- unsigned u)
-{
- int nr = 0;
- if (u > 0) {
- nr += do_lf_putunsigned(file, u / 10);
- nr += lf_putchr(file, (u % 10) + '0');
- }
- return nr;
-}
-
-
-int
-lf_putint(lf *file,
- int decimal)
-{
- int nr = 0;
- if (decimal == 0)
- nr += lf_putchr(file, '0');
- else if (decimal < 0) {
- nr += lf_putchr(file, '-');
- nr += do_lf_putunsigned(file, -decimal);
- }
- else if (decimal > 0) {
- nr += do_lf_putunsigned(file, decimal);
- }
- else
- ASSERT(0);
- return nr;
-}
-
-
-int
-lf_printf(lf *file,
- const char *fmt,
- ...)
-{
- int nr = 0;
- char buf[1024];
- va_list ap;
-
- va_start(ap, fmt);
- vsprintf(buf, fmt, ap);
- /* FIXME - this is really stuffed but so is vsprintf() on a sun! */
- ASSERT(strlen(buf) > 0 && strlen(buf) < sizeof(buf));
- nr += lf_putstr(file, buf);
- va_end(ap);
- return nr;
-}
-
-
-int
-lf_print__c_code(lf *file,
- const char *code)
-{
- int nr = 0;
- const char *chp = code;
- int in_bit_field = 0;
- while (*chp != '\0') {
- if (*chp == '\t')
- chp++;
- if (*chp == '#')
- lf_indent_suppress(file);
- while (*chp != '\0' && *chp != '\n') {
- if (chp[0] == '{' && !isspace(chp[1])) {
- in_bit_field = 1;
- nr += lf_putchr(file, '_');
- }
- else if (in_bit_field && chp[0] == ':') {
- nr += lf_putchr(file, '_');
- }
- else if (in_bit_field && *chp == '}') {
- nr += lf_putchr(file, '_');
- in_bit_field = 0;
- }
- else {
- nr += lf_putchr(file, *chp);
- }
- chp++;
- }
- if (in_bit_field)
- error("bit field paren miss match some where\n");
- if (*chp == '\n') {
- nr += lf_putchr(file, '\n');
- chp++;
- }
- }
- nr += lf_putchr(file, '\n');
- return nr;
-}
-
-
-int
-lf_print__external_reference(lf *file,
- int line_nr,
- const char *file_name)
-{
- int nr = 0;
- switch (file->references) {
- case lf_include_references:
- lf_indent_suppress(file);
- nr += lf_putstr(file, "#line ");
- nr += lf_putint(file, line_nr);
- nr += lf_putstr(file, " \"");
- nr += lf_putstr(file, file_name);
- nr += lf_putstr(file, "\"\n");
- break;
- case lf_omit_references:
- break;
- }
- return nr;
-}
-
-int
-lf_print__internal_reference(lf *file)
-{
- int nr = 0;
- nr += lf_print__external_reference(file, file->line_nr+2, file->name);
- /* line_nr == last_line, want to number from next */
- return nr;
-}
-
-void
-lf_indent(lf *file, int delta)
-{
- file->indent += delta;
-}
-
-
-int
-lf_print__gnu_copyleft(lf *file)
-{
- int nr = 0;
- switch (file->type) {
- case lf_is_c:
- case lf_is_h:
- nr += lf_printf(file, "\
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1995, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- --
-
- This file was generated by the program %s */
-", filter_filename(file->program));
- break;
- default:
- ASSERT(0);
- break;
- }
- return nr;
-}
-
-
-int
-lf_putbin(lf *file, int decimal, int width)
-{
- int nr = 0;
- int bit;
- ASSERT(width > 0);
- for (bit = 1 << (width-1); bit != 0; bit >>= 1) {
- if (decimal & bit)
- nr += lf_putchr(file, '1');
- else
- nr += lf_putchr(file, '0');
- }
- return nr;
-}
-
-int
-lf_print__this_file_is_empty(lf *file)
-{
- int nr = 0;
- switch (file->type) {
- case lf_is_c:
- case lf_is_h:
- nr += lf_printf(file,
- "/* This generated file (%s) is intentionally left blank */\n",
- file->name);
- break;
- default:
- ASSERT(0);
- }
- return nr;
-}
-
-int
-lf_print__ucase_filename(lf *file)
-{
- int nr = 0;
- const char *chp = file->name;
- while (*chp != '\0') {
- char ch = *chp;
- if (islower(ch)) {
- nr += lf_putchr(file, toupper(ch));
- }
- else if (ch == '.')
- nr += lf_putchr(file, '_');
- else
- nr += lf_putchr(file, ch);
- chp++;
- }
- return nr;
-}
-
-int
-lf_print__file_start(lf *file)
-{
- int nr = 0;
- switch (file->type) {
- case lf_is_h:
- case lf_is_c:
- nr += lf_print__gnu_copyleft(file);
- nr += lf_printf(file, "\n");
- nr += lf_printf(file, "#ifndef _");
- nr += lf_print__ucase_filename(file);
- nr += lf_printf(file, "_\n");
- nr += lf_printf(file, "#define _");
- nr += lf_print__ucase_filename(file);
- nr += lf_printf(file, "_\n");
- nr += lf_printf(file, "\n");
- break;
- default:
- ASSERT(0);
- }
- return nr;
-}
-
-
-int
-lf_print__file_finish(lf *file)
-{
- int nr = 0;
- switch (file->type) {
- case lf_is_h:
- case lf_is_c:
- nr += lf_printf(file, "\n");
- nr += lf_printf(file, "#endif /* _");
- nr += lf_print__ucase_filename(file);
- nr += lf_printf(file, "_*/\n");
- break;
- default:
- ASSERT(0);
- }
- return nr;
-}
-
-
-int
-lf_print_function_type(lf *file,
- const char *type,
- const char *prefix,
- const char *trailing_space)
-{
- int nr = 0;
- nr += lf_printf(file, "%s\\\n(%s)", prefix, type);
- if (trailing_space != NULL)
- nr += lf_printf(file, "%s", trailing_space);
-#if 0
- const char *type_pointer = strrchr(type, '*');
- int type_pointer_offset = (type_pointer != NULL
- ? type_pointer - type
- : 0);
- if (type_pointer == NULL) {
- lf_printf(file, "%s %s", type, prefix);
- }
- else {
- char *munged_type = (char*)zalloc(strlen(type)
- + strlen(prefix)
- + strlen(" * ")
- + 1);
- strcpy(munged_type, type);
- munged_type[type_pointer_offset] = '\0';
- if (type_pointer_offset > 0 && type[type_pointer_offset-1] != ' ')
- strcat(munged_type, " ");
- strcat(munged_type, prefix);
- strcat(munged_type, " ");
- strcat(munged_type, type + type_pointer_offset);
- lf_printf(file, "%s", munged_type);
- free(munged_type);
- }
- if (trailing_space != NULL && type_pointer_offset < strlen(type) - 1)
- lf_printf(file, trailing_space);
-#endif
- return nr;
-}
-
diff --git a/sim/ppc/lf.h b/sim/ppc/lf.h
deleted file mode 100644
index 7bf6d1cafff..00000000000
--- a/sim/ppc/lf.h
+++ /dev/null
@@ -1,129 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1995, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-/* LF: Line Numbered Output Stream */
-
-typedef struct _lf lf;
-
-typedef enum {
- lf_is_h,
- lf_is_c,
- lf_is_text,
-} lf_file_type;
-
-
-typedef enum {
- lf_include_references,
- lf_omit_references,
-} lf_file_references;
-
-
-/* Open the file NAME for writing. REAL_NAME is to be included in any
- line number outputs. The output of line number information can be
- suppressed with LINE_NUMBERS */
-
-extern lf *lf_open
-(char *name,
- char *real_name,
- lf_file_references file_references,
- lf_file_type type,
- const char *program);
-
-extern void lf_close
-(lf *file);
-
-
-/* Basic output functions */
-
-extern int lf_putchr
-(lf *file,
- const char ch);
-
-extern int lf_putstr
-(lf *file,
- const char *string);
-
-extern int lf_putint
-(lf *file,
- int decimal);
-
-extern int lf_putbin
-(lf *file,
- int decimal,
- int width);
-
-extern int lf_printf
-(lf *file,
- const char *fmt,
- ...) __attribute__((format(printf, 2, 3)));
-
-
-/* Indentation control.
-
- lf_indent_suppress suppresses indentation on the next line (current
- line if that has not yet been started) */
-
-extern void lf_indent_suppress
-(lf *file);
-
-extern void lf_indent
-(lf *file,
- int delta);
-
-
-/* Print generic text: */
-
-
-extern int lf_print__gnu_copyleft
-(lf *file);
-
-extern int lf_print__file_start
-(lf *file);
-
-extern int lf_print__this_file_is_empty
-(lf *file);
-
-extern int lf_print__file_finish
-(lf *file);
-
-extern int lf_print__internal_reference
-(lf *file);
-
-extern int lf_print__external_reference
-(lf *file,
- int line_nr,
- const char *file_name);
-
-extern int lf_print__ucase_filename
-(lf *file);
-
-/* Tab prefix is suppressed */
-
-extern int lf_print__c_code
-(lf *file,
- const char *code);
-
-
-extern int lf_print_function_type
-(lf *file,
- const char *type,
- const char *prefix,
- const char *trailing_space);
diff --git a/sim/ppc/main.c b/sim/ppc/main.c
deleted file mode 100644
index a2948e0a6b0..00000000000
--- a/sim/ppc/main.c
+++ /dev/null
@@ -1,318 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1997, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-#include <stdarg.h>
-#include <stdio.h>
-#include <fcntl.h>
-
-#include <signal.h>
-
-#include "psim.h"
-#include "options.h"
-#include "device.h" /* FIXME: psim should provide the interface */
-#include "events.h" /* FIXME: psim should provide the interface */
-
-#ifdef HAVE_STDLIB_H
-#include <stdlib.h>
-#endif
-
-#ifdef HAVE_UNISTD_H
-#include <unistd.h>
-#endif
-
-#ifdef HAVE_STRING_H
-#include <string.h>
-#else
-#ifdef HAVE_STRINGS_H
-#include <strings.h>
-#endif
-#endif
-
-#include <errno.h>
-
-#if !defined(O_NDELAY) || !defined(F_GETFL) || !defined(F_SETFL)
-#undef WITH_STDIO
-#define WITH_STDIO DO_USE_STDIO
-#endif
-
-
-extern char **environ;
-
-static psim *simulation = NULL;
-
-
-void
-sim_io_poll_quit (void)
-{
- /* nothing to do */
-}
-
-void
-sim_io_printf_filtered(const char *msg, ...)
-{
- va_list ap;
- va_start(ap, msg);
- vprintf(msg, ap);
- va_end(ap);
-}
-
-void
-error (const char *msg, ...)
-{
- va_list ap;
- va_start(ap, msg);
- vprintf(msg, ap);
- printf("\n");
- va_end(ap);
-
- /* any final clean up */
- if (ppc_trace[trace_print_info] && simulation != NULL)
- psim_print_info (simulation, ppc_trace[trace_print_info]);
-
- exit (1);
-}
-
-int
-sim_io_write_stdout(const char *buf,
- int sizeof_buf)
-{
- switch (CURRENT_STDIO) {
- case DO_USE_STDIO:
- {
- int i;
- for (i = 0; i < sizeof_buf; i++) {
- putchar(buf[i]);
- }
- return i;
- }
- break;
- case DONT_USE_STDIO:
- return write(1, buf, sizeof_buf);
- break;
- default:
- error("sim_io_write_stdout: invalid switch\n");
- }
- return 0;
-}
-
-int
-sim_io_write_stderr(const char *buf,
- int sizeof_buf)
-{
- switch (CURRENT_STDIO) {
- case DO_USE_STDIO:
- {
- int i;
- for (i = 0; i < sizeof_buf; i++) {
- fputc(buf[i], stderr);
- }
- return i;
- }
- break;
- case DONT_USE_STDIO:
- return write(2, buf, sizeof_buf);
- break;
- default:
- error("sim_io_write_stdout: invalid switch\n");
- }
- return 0;
-}
-
-int
-sim_io_read_stdin(char *buf,
- int sizeof_buf)
-{
- switch (CURRENT_STDIO) {
- case DO_USE_STDIO:
- if (sizeof_buf > 1) {
- if (fgets(buf, sizeof_buf, stdin) != NULL)
- return strlen(buf);
- }
- else if (sizeof_buf == 1) {
- char b[2];
- if (fgets(b, sizeof(b), stdin) != NULL) {
- memcpy(buf, b, strlen(b));
- return strlen(b);
- }
- }
- else if (sizeof_buf == 0)
- return 0;
- return sim_io_eof;
- break;
- case DONT_USE_STDIO:
-#if defined(O_NDELAY) && defined(F_GETFL) && defined(F_SETFL)
- {
- /* check for input */
- int flags;
- int status;
- int nr_read;
- int result;
- /* get the old status */
- flags = fcntl(0, F_GETFL, 0);
- if (flags == -1) {
- perror("sim_io_read_stdin");
- return sim_io_eof;
- }
- /* temp, disable blocking IO */
- status = fcntl(0, F_SETFL, flags | O_NDELAY);
- if (status == -1) {
- perror("sim_io_read_stdin");
- return sim_io_eof;
- }
- /* try for input */
- nr_read = read(0, buf, sizeof_buf);
- if (nr_read > 0
- || (nr_read == 0 && sizeof_buf == 0))
- result = nr_read;
- else if (nr_read == 0)
- result = sim_io_eof;
- else { /* nr_read < 0 */
- if (errno == EAGAIN)
- result = sim_io_not_ready;
- else
- result = sim_io_eof;
- }
- /* return to regular vewing */
- status = fcntl(0, F_SETFL, flags);
- if (status == -1) {
- perror("sim_io_read_stdin");
- return sim_io_eof;
- }
- return result;
- }
- break;
-#endif
- default:
- error("sim_io_read_stdin: invalid switch\n");
- break;
- }
- return 0;
-}
-
-void
-sim_io_flush_stdoutput(void)
-{
- switch (CURRENT_STDIO) {
- case DO_USE_STDIO:
- fflush (stdout);
- break;
- case DONT_USE_STDIO:
- break;
- default:
- error("sim_io_flush_stdoutput: invalid switch\n");
- break;
- }
-}
-
-
-void *
-zalloc(long size)
-{
- void *memory = malloc(size);
- if (memory == NULL)
- error("zmalloc failed\n");
- memset(memory, 0, size);
- return memory;
-}
-
-void
-zfree(void *chunk)
-{
- free(chunk);
-}
-
-/* When a CNTRL-C occures, queue an event to shut down the simulation */
-
-static RETSIGTYPE
-cntrl_c(int sig)
-{
- psim_stop (simulation);
-}
-
-
-int
-main(int argc, char **argv)
-{
- const char *name_of_file;
- char *arg_;
- psim_status status;
- device *root = psim_tree();
-
- /* parse the arguments */
- argv = psim_options(root, argv + 1);
- if (argv[0] == NULL) {
- if (ppc_trace[trace_opts]) {
- print_options ();
- return 0;
- } else {
- psim_usage(0);
- }
- }
- name_of_file = argv[0];
-
- if (ppc_trace[trace_opts])
- print_options ();
-
- /* create the simulator */
- simulation = psim_create(name_of_file, root);
-
- /* fudge the environment so that _=prog-name */
- arg_ = (char*)zalloc(strlen(argv[0]) + strlen("_=") + 1);
- strcpy(arg_, "_=");
- strcat(arg_, argv[0]);
- putenv(arg_);
-
- /* initialize it */
- psim_init(simulation);
- psim_stack(simulation, argv, environ);
-
- {
- RETSIGTYPE (*prev) ();
- prev = signal(SIGINT, cntrl_c);
- psim_run(simulation);
- signal(SIGINT, prev);
- }
-
- /* any final clean up */
- if (ppc_trace[trace_print_info])
- psim_print_info (simulation, ppc_trace[trace_print_info]);
-
- /* why did we stop */
- status = psim_get_status(simulation);
- switch (status.reason) {
- case was_continuing:
- error("psim: continuing while stoped!\n");
- return 0;
- case was_trap:
- error("psim: no trap insn\n");
- return 0;
- case was_exited:
- return status.signal;
- case was_signalled:
- printf ("%s: Caught signal %d at address 0x%lx\n",
- name_of_file, (int)status.signal,
- (long)status.program_counter);
- return status.signal;
- default:
- error("unknown halt condition\n");
- return 0;
- }
-}
diff --git a/sim/ppc/misc.c b/sim/ppc/misc.c
deleted file mode 100644
index d8e54ed497b..00000000000
--- a/sim/ppc/misc.c
+++ /dev/null
@@ -1,215 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1997, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-#include <stdio.h>
-#include <stdarg.h>
-#include <ctype.h>
-
-#include "config.h"
-#include "misc.h"
-
-#ifdef HAVE_STDLIB_H
-#include <stdlib.h>
-#endif
-
-#ifdef HAVE_STRING_H
-#include <string.h>
-#else
-#ifdef HAVE_STRINGS_H
-#include <strings.h>
-#endif
-#endif
-
-void
-error (char *msg, ...)
-{
- va_list ap;
- va_start(ap, msg);
- vprintf(msg, ap);
- va_end(ap);
- exit (1);
-}
-
-void *
-zalloc(long size)
-{
- void *memory = malloc(size);
- if (memory == NULL)
- error("zalloc failed\n");
- memset(memory, 0, size);
- return memory;
-}
-
-void
-dumpf (int indent, char *msg, ...)
-{
- va_list ap;
- for (; indent > 0; indent--)
- printf(" ");
- va_start(ap, msg);
- vprintf(msg, ap);
- va_end(ap);
-}
-
-
-unsigned
-a2i(const char *a)
-{
- int neg = 0;
- int base = 10;
- unsigned num = 0;
- int looping;
-
- while (isspace (*a))
- a++;
-
- if (*a == '-') {
- neg = 1;
- a++;
- }
-
- if (*a == '0') {
- if (a[1] == 'x' || a[1] == 'X') {
- a += 2;
- base = 16;
- }
- else
- base = 8;
- }
-
- looping = 1;
- while (looping) {
- int ch = *a++;
-
- switch (base) {
- default:
- looping = 0;
- break;
-
- case 10:
- if (ch >= '0' && ch <= '9') {
- num = (num * 10) + (ch - '0');
- } else {
- looping = 0;
- }
- break;
-
- case 8:
- if (ch >= '0' && ch <= '7') {
- num = (num * 8) + (ch - '0');
- } else {
- looping = 0;
- }
- break;
-
- case 16:
- if (ch >= '0' && ch <= '9') {
- num = (num * 16) + (ch - '0');
- } else if (ch >= 'a' && ch <= 'f') {
- num = (num * 16) + (ch - 'a' + 10);
- } else if (ch >= 'A' && ch <= 'F') {
- num = (num * 16) + (ch - 'A' + 10);
- } else {
- looping = 0;
- }
- break;
- }
- }
-
- if (neg)
- num = - num;
-
- return num;
-}
-
-unsigned
-target_a2i(int ms_bit_nr,
- const char *a)
-{
- if (ms_bit_nr)
- return (ms_bit_nr - a2i(a));
- else
- return a2i(a);
-}
-
-unsigned
-i2target(int ms_bit_nr,
- unsigned bit)
-{
- if (ms_bit_nr)
- return ms_bit_nr - bit;
- else
- return bit;
-}
-
-
-int
-name2i(const char *names,
- const name_map *map)
-{
- const name_map *curr;
- const char *name = names;
- while (*name != '\0') {
- /* find our name */
- char *end = strchr(name, ',');
- char *next;
- int len;
- if (end == NULL) {
- end = strchr(name, '\0');
- next = end;
- }
- else {
- next = end + 1;
- }
- len = end - name;
- /* look it up */
- curr = map;
- while (curr->name != NULL) {
- if (strncmp(curr->name, name, len) == 0
- && strlen(curr->name) == len)
- return curr->i;
- curr++;
- }
- name = next;
- }
- /* nothing found, possibly return a default */
- curr = map;
- while (curr->name != NULL)
- curr++;
- if (curr->i >= 0)
- return curr->i;
- else
- error("%s contains no valid names\n", names);
- return 0;
-}
-
-const char *
-i2name(const int i,
- const name_map *map)
-{
- while (map->name != NULL) {
- if (map->i == i)
- return map->name;
- map++;
- }
- error("map lookup failed for %d\n", i);
- return NULL;
-}
diff --git a/sim/ppc/misc.h b/sim/ppc/misc.h
deleted file mode 100644
index 041bd6d2cac..00000000000
--- a/sim/ppc/misc.h
+++ /dev/null
@@ -1,94 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1995, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-/* Frustrating header junk */
-
-#include "config.h"
-
-#include <stdio.h>
-#include <ctype.h>
-
-#ifdef HAVE_STRING_H
-#include <string.h>
-#else
-#ifdef HAVE_STRINGS_H
-#include <strings.h>
-#endif
-#endif
-
-#ifdef HAVE_STDLIB_H
-#include <stdlib.h>
-#endif
-
-#if !defined (__attribute__) && (!defined(__GNUC__) || __GNUC__ < 2 || (__GNUC__ == 2 && __GNUC_MINOR__ < 7))
-#define __attribute__(arg)
-#endif
-
-
-
-#include "filter_filename.h"
-
-extern void error
-(char *msg, ...);
-
-#define ASSERT(EXPRESSION) \
-do { \
- if (!(EXPRESSION)) { \
- error("%s:%d: assertion failed - %s\n", \
- filter_filename (__FILE__), __LINE__, #EXPRESSION); \
- } \
-} while (0)
-
-#define ZALLOC(TYPE) (TYPE*)zalloc(sizeof(TYPE))
-
-extern void *zalloc
-(long size);
-
-extern void dumpf
-(int indent, char *msg, ...);
-
-extern unsigned target_a2i
-(int ms_bit_nr,
- const char *a);
-
-extern unsigned i2target
-(int ms_bit_nr,
- unsigned bit);
-
-extern unsigned a2i
-(const char *a);
-
-/* Try looking for name in the map table (returning the corresponding
- integer value). If that fails, try converting the name into an
- integer */
-
-typedef struct _name_map {
- const char *name;
- int i;
-} name_map;
-
-extern int name2i
-(const char *name,
- const name_map *map);
-
-extern const char *i2name
-(const int i,
- const name_map *map);
diff --git a/sim/ppc/mon.c b/sim/ppc/mon.c
deleted file mode 100644
index 2bdaf474158..00000000000
--- a/sim/ppc/mon.c
+++ /dev/null
@@ -1,445 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1997, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-#ifndef _MON_C_
-#define _MON_C_
-
-#include "basics.h"
-#include "cpu.h"
-#include "mon.h"
-#include <stdio.h>
-
-#ifdef HAVE_STRING_H
-#include <string.h>
-#else
-#ifdef HAVE_STRINGS_H
-#include <strings.h>
-#endif
-#endif
-
-#ifdef HAVE_UNISTD_H
-#include <unistd.h>
-#endif
-
-#ifdef HAVE_STDLIB_H
-#include <stdlib.h>
-#endif
-
-#ifdef HAVE_SYS_TYPES_H
-#include <sys/types.h>
-#endif
-
-#ifdef HAVE_TIME_H
-#include <time.h>
-#endif
-
-#ifdef HAVE_SYS_TIMES_H
-#include <sys/times.h>
-#endif
-
-#ifdef HAVE_SYS_TIME_H
-#include <sys/time.h>
-#endif
-
-#ifdef HAVE_SYS_RESOURCE_H
-#include <sys/resource.h>
-int getrusage();
-#endif
-
-#define MAX_BYTE_READWRITE 9
-#define MAX_SHIFT_READWRITE 3
-
-struct _cpu_mon {
- count_type issue_count[nr_itable_entries];
- count_type read_count;
- count_type read_byte_count[MAX_BYTE_READWRITE];
- count_type write_count;
- count_type write_byte_count[MAX_BYTE_READWRITE];
- count_type unaligned_read_count;
- count_type unaligned_write_count;
- count_type event_count[nr_mon_events];
-};
-
-struct _mon {
- int nr_cpus;
- cpu_mon cpu_monitor[MAX_NR_PROCESSORS];
-};
-
-
-INLINE_MON\
-(mon *)
-mon_create(void)
-{
- mon *monitor = ZALLOC(mon);
- return monitor;
-}
-
-
-INLINE_MON\
-(cpu_mon *)
-mon_cpu(mon *monitor,
- int cpu_nr)
-{
- if (cpu_nr < 0 || cpu_nr >= MAX_NR_PROCESSORS)
- error("mon_cpu() - invalid cpu number\n");
- return &monitor->cpu_monitor[cpu_nr];
-}
-
-
-INLINE_MON\
-(void)
-mon_init(mon *monitor,
- int nr_cpus)
-{
- memset(monitor, 0, sizeof(*monitor));
- monitor->nr_cpus = nr_cpus;
-}
-
-
-INLINE_MON\
-(void)
-mon_issue(itable_index index,
- cpu *processor,
- unsigned_word cia)
-{
- cpu_mon *monitor = cpu_monitor(processor);
- ASSERT(index <= nr_itable_entries);
- monitor->issue_count[index] += 1;
-}
-
-
-INLINE_MON\
-(void)
-mon_read(unsigned_word ea,
- unsigned_word ra,
- unsigned nr_bytes,
- cpu *processor,
- unsigned_word cia)
-{
- cpu_mon *monitor = cpu_monitor(processor);
- monitor->read_count += 1;
- monitor->read_byte_count[nr_bytes] += 1;
- if ((nr_bytes - 1) & ea)
- monitor->unaligned_read_count += 1;
-}
-
-
-INLINE_MON\
-(void)
-mon_write(unsigned_word ea,
- unsigned_word ra,
- unsigned nr_bytes,
- cpu *processor,
- unsigned_word cia)
-{
- cpu_mon *monitor = cpu_monitor(processor);
- monitor->write_count += 1;
- monitor->write_byte_count[nr_bytes] += 1;
- if ((nr_bytes - 1) & ea)
- monitor->unaligned_write_count += 1;
-}
-
-INLINE_MON\
-(void)
-mon_event(mon_events event,
- cpu *processor,
- unsigned_word cia)
-{
- cpu_mon *monitor = cpu_monitor(processor);
- ASSERT(event < nr_mon_events);
- monitor->event_count[event] += 1;
-}
-
-INLINE_MON\
-(unsigned)
-mon_get_number_of_insns(mon *monitor,
- int cpu_nr)
-{
- itable_index index;
- unsigned total_insns = 0;
- ASSERT(cpu_nr >= 0 && cpu_nr < monitor->nr_cpus);
- for (index = 0; index < nr_itable_entries; index++)
- total_insns += monitor->cpu_monitor[cpu_nr].issue_count[index];
- return total_insns;
-}
-
-STATIC_INLINE_MON\
-(int)
-mon_sort_instruction_names(const void *ptr_a, const void *ptr_b)
-{
- itable_index a = *(const itable_index *)ptr_a;
- itable_index b = *(const itable_index *)ptr_b;
-
- return strcmp (itable[a].name, itable[b].name);
-}
-
-STATIC_INLINE_MON\
-(char *)
-mon_add_commas(char *buf,
- int sizeof_buf,
- count_type value)
-{
- int comma = 3;
- char *endbuf = buf + sizeof_buf - 1;
-
- *--endbuf = '\0';
- do {
- if (comma-- == 0)
- {
- *--endbuf = ',';
- comma = 2;
- }
-
- *--endbuf = (value % 10) + '0';
- } while ((value /= 10) != 0);
-
- ASSERT(endbuf >= buf);
- return endbuf;
-}
-
-
-INLINE_MON\
-(void)
-mon_print_info(psim *system,
- mon *monitor,
- int verbose)
-{
- char buffer[20];
- char buffer1[20];
- char buffer2[20];
- char buffer4[20];
- char buffer8[20];
- int cpu_nr;
- int len_cpu;
- int len_num = 0;
- int len_sub_num[MAX_BYTE_READWRITE];
- int len;
- int i;
- long total_insns = 0;
- long cpu_insns_second = 0;
- long total_sim_cycles = 0;
- long sim_cycles_second = 0;
- double cpu_time = 0.0;
-
- for (i = 0; i < MAX_BYTE_READWRITE; i++)
- len_sub_num[i] = 0;
-
- for (cpu_nr = 0; cpu_nr < monitor->nr_cpus; cpu_nr++) {
- count_type num_insns = mon_get_number_of_insns(monitor, cpu_nr);
-
- total_insns += num_insns;
- len = strlen (mon_add_commas(buffer, sizeof(buffer), num_insns));
- if (len_num < len)
- len_num = len;
-
- for (i = 0; i <= MAX_SHIFT_READWRITE; i++) {
- int size = 1<<i;
- len = strlen (mon_add_commas(buffer, sizeof(buffer),
- monitor->cpu_monitor[cpu_nr].read_byte_count[size]));
- if (len_sub_num[size] < len)
- len_sub_num[size] = len;
-
- len = strlen (mon_add_commas(buffer, sizeof(buffer),
- monitor->cpu_monitor[cpu_nr].write_byte_count[size]));
- if (len_sub_num[size] < len)
- len_sub_num[size] = len;
- }
- }
-
- sprintf (buffer, "%d", (int)monitor->nr_cpus + 1);
- len_cpu = strlen (buffer);
-
-#ifdef HAVE_GETRUSAGE
- {
- struct rusage mytime;
- if (getrusage (RUSAGE_SELF, &mytime) == 0
- && (mytime.ru_utime.tv_sec > 0 || mytime.ru_utime.tv_usec > 0)) {
-
- cpu_time = (double)mytime.ru_utime.tv_sec + (((double)mytime.ru_utime.tv_usec) / 1000000.0);
- }
- }
- if (WITH_EVENTS)
- total_sim_cycles = event_queue_time(psim_event_queue(system)) - 1;
- if (cpu_time > 0) {
- if (total_insns > 0)
- cpu_insns_second = (long)(((double)total_insns / cpu_time) + 0.5);
- if (total_sim_cycles) {
- sim_cycles_second = (long)(((double)total_sim_cycles / cpu_time) + 0.5);
- }
- }
-#endif
-
- for (cpu_nr = 0; cpu_nr < monitor->nr_cpus; cpu_nr++) {
-
- if (verbose > 1) {
- itable_index sort_insns[nr_itable_entries];
- int nr_sort_insns = 0;
- itable_index index;
- int index2;
-
- if (cpu_nr)
- printf_filtered ("\n");
-
- for (index = 0; index < nr_itable_entries; index++) {
- if (monitor->cpu_monitor[cpu_nr].issue_count[index]) {
- sort_insns[nr_sort_insns++] = index;
- }
- }
-
- qsort((void *)sort_insns, nr_sort_insns, sizeof(sort_insns[0]), mon_sort_instruction_names);
-
- for (index2 = 0; index2 < nr_sort_insns; index2++) {
- index = sort_insns[index2];
- printf_filtered("CPU #%*d executed %*s %s instruction%s.\n",
- len_cpu, cpu_nr+1,
- len_num, mon_add_commas(buffer,
- sizeof(buffer),
- monitor->cpu_monitor[cpu_nr].issue_count[index]),
- itable[index].name,
- (monitor->cpu_monitor[cpu_nr].issue_count[index] == 1) ? "" : "s");
- }
-
- printf_filtered ("\n");
- }
-
- if (CURRENT_MODEL_ISSUE > 0)
- {
- model_data *model_ptr = cpu_model(psim_cpu(system, cpu_nr));
- model_print *ptr = model_mon_info(model_ptr);
- model_print *orig_ptr = ptr;
-
- while (ptr) {
- if (ptr->count)
- printf_filtered("CPU #%*d executed %*s %s%s.\n",
- len_cpu, cpu_nr+1,
- len_num, mon_add_commas(buffer,
- sizeof(buffer),
- ptr->count),
- ptr->name,
- ((ptr->count == 1)
- ? ptr->suffix_singular
- : ptr->suffix_plural));
-
- ptr = ptr->next;
- }
-
- model_mon_info_free(model_ptr, orig_ptr);
- }
-
- if (monitor->cpu_monitor[cpu_nr].read_count)
- printf_filtered ("CPU #%*d executed %*s read%s (%*s 1-byte, %*s 2-byte, %*s 4-byte, %*s 8-byte).\n",
- len_cpu, cpu_nr+1,
- len_num, mon_add_commas(buffer,
- sizeof(buffer),
- monitor->cpu_monitor[cpu_nr].read_count),
- (monitor->cpu_monitor[cpu_nr].read_count == 1) ? "" : "s",
- len_sub_num[1], mon_add_commas(buffer1,
- sizeof(buffer1),
- monitor->cpu_monitor[cpu_nr].read_byte_count[1]),
- len_sub_num[2], mon_add_commas(buffer2,
- sizeof(buffer2),
- monitor->cpu_monitor[cpu_nr].read_byte_count[2]),
- len_sub_num[4], mon_add_commas(buffer4,
- sizeof(buffer4),
- monitor->cpu_monitor[cpu_nr].read_byte_count[4]),
- len_sub_num[8], mon_add_commas(buffer8,
- sizeof(buffer8),
- monitor->cpu_monitor[cpu_nr].read_byte_count[8]));
-
- if (monitor->cpu_monitor[cpu_nr].write_count)
- printf_filtered ("CPU #%*d executed %*s write%s (%*s 1-byte, %*s 2-byte, %*s 4-byte, %*s 8-byte).\n",
- len_cpu, cpu_nr+1,
- len_num, mon_add_commas(buffer,
- sizeof(buffer),
- monitor->cpu_monitor[cpu_nr].write_count),
- (monitor->cpu_monitor[cpu_nr].write_count == 1) ? "" : "s",
- len_sub_num[1], mon_add_commas(buffer1,
- sizeof(buffer1),
- monitor->cpu_monitor[cpu_nr].write_byte_count[1]),
- len_sub_num[2], mon_add_commas(buffer2,
- sizeof(buffer2),
- monitor->cpu_monitor[cpu_nr].write_byte_count[2]),
- len_sub_num[4], mon_add_commas(buffer4,
- sizeof(buffer4),
- monitor->cpu_monitor[cpu_nr].write_byte_count[4]),
- len_sub_num[8], mon_add_commas(buffer8,
- sizeof(buffer8),
- monitor->cpu_monitor[cpu_nr].write_byte_count[8]));
-
- if (monitor->cpu_monitor[cpu_nr].unaligned_read_count)
- printf_filtered ("CPU #%*d executed %*s unaligned read%s.\n",
- len_cpu, cpu_nr+1,
- len_num, mon_add_commas(buffer,
- sizeof(buffer),
- monitor->cpu_monitor[cpu_nr].unaligned_read_count),
- (monitor->cpu_monitor[cpu_nr].unaligned_read_count == 1) ? "" : "s");
-
- if (monitor->cpu_monitor[cpu_nr].unaligned_write_count)
- printf_filtered ("CPU #%*d executed %*s unaligned write%s.\n",
- len_cpu, cpu_nr+1,
- len_num, mon_add_commas(buffer,
- sizeof(buffer),
- monitor->cpu_monitor[cpu_nr].unaligned_write_count),
- (monitor->cpu_monitor[cpu_nr].unaligned_write_count == 1) ? "" : "s");
-
- if (monitor->cpu_monitor[cpu_nr].event_count[mon_event_icache_miss])
- printf_filtered ("CPU #%*d executed %*s icache miss%s.\n",
- len_cpu, cpu_nr+1,
- len_num, mon_add_commas(buffer,
- sizeof(buffer),
- monitor->cpu_monitor[cpu_nr].event_count[mon_event_icache_miss]),
- (monitor->cpu_monitor[cpu_nr].event_count[mon_event_icache_miss] == 1) ? "" : "es");
-
- {
- long nr_insns = mon_get_number_of_insns(monitor, cpu_nr);
- if (nr_insns > 0)
- printf_filtered("CPU #%*d executed %*s instructions in total.\n",
- len_cpu, cpu_nr+1,
- len_num, mon_add_commas(buffer,
- sizeof(buffer),
- nr_insns));
- }
- }
-
- if (total_insns > 0) {
- if (monitor->nr_cpus > 1)
- printf_filtered("\nAll CPUs executed %s instructions in total.\n",
- mon_add_commas(buffer, sizeof(buffer), total_insns));
- }
- else if (total_sim_cycles > 0) {
- printf_filtered("\nSimulator performed %s simulation cycles.\n",
- mon_add_commas(buffer, sizeof(buffer), total_sim_cycles));
- }
-
- if (cpu_insns_second)
- printf_filtered ("%sSimulator speed was %s instructions/second.\n",
- (monitor->nr_cpus > 1) ? "" : "\n",
- mon_add_commas(buffer, sizeof(buffer), cpu_insns_second));
- else if (sim_cycles_second)
- printf_filtered ("Simulator speed was %s simulation cycles/second\n",
- mon_add_commas(buffer, sizeof(buffer), sim_cycles_second));
- else if (cpu_time > 0.0)
- printf_filtered ("%sSimulator executed for %.2f seconds\n",
- (monitor->nr_cpus > 1) ? "" : "\n", cpu_time);
-
-}
-
-#endif /* _MON_C_ */
diff --git a/sim/ppc/mon.h b/sim/ppc/mon.h
deleted file mode 100644
index ab64b8e13c4..00000000000
--- a/sim/ppc/mon.h
+++ /dev/null
@@ -1,108 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1995, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-#ifndef _MON_H_
-#define _MON_H_
-
-#include "basics.h"
-#include "itable.h"
-
-/* monitor/logger: counts what the simulation is up to */
-
-typedef unsigned long count_type;
-
-/* Interfact to model to return model specific information */
-typedef struct _model_print model_print;
-struct _model_print {
- model_print *next;
- const char *name;
- const char *suffix_singular;
- const char *suffix_plural;
- count_type count;
-};
-
-/* Additional events to monitor */
-typedef enum _mon_events {
- mon_event_icache_miss,
- nr_mon_events
-} mon_events;
-
-typedef struct _mon mon;
-typedef struct _cpu_mon cpu_mon;
-
-INLINE_MON\
-(mon *) mon_create
-(void);
-
-INLINE_MON\
-(cpu_mon *) mon_cpu
-(mon *monitor,
- int cpu_nr);
-
-INLINE_MON\
-(void) mon_init
-(mon *monitor,
- int nr_cpus);
-
-INLINE_MON\
-(void) mon_issue
-(itable_index index,
- cpu *processor,
- unsigned_word cia);
-
-/* NOTE - there is no mon_iload - it is made reduntant by mon_issue()
- and besides when the cpu's have their own cache, the information is
- wrong */
-
-INLINE_MON\
-(void) mon_read
-(unsigned_word ea,
- unsigned_word ra,
- unsigned nr_bytes,
- cpu *processor,
- unsigned_word cia);
-
-INLINE_MON\
-(void) mon_write
-(unsigned_word ea,
- unsigned_word ra,
- unsigned nr_bytes,
- cpu *processor,
- unsigned_word cia);
-
-INLINE_MON\
-(void) mon_event
-(mon_events event,
- cpu *processor,
- unsigned_word cia);
-
-INLINE_MON\
-(unsigned) mon_get_number_of_insns
-(mon *monitor,
- int cpu_nr);
-
-INLINE_MON\
-(void) mon_print_info
-(psim *system,
- mon *monitor,
- int verbose);
-
-#endif
diff --git a/sim/ppc/options.c b/sim/ppc/options.c
deleted file mode 100644
index 2d31124752a..00000000000
--- a/sim/ppc/options.c
+++ /dev/null
@@ -1,247 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1995, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-#ifndef _OPTIONS_C_
-#define _OPTIONS_C_
-
-#include "cpu.h"
-#include "options.h"
-
-STATIC_INLINE_OPTIONS\
-(const char *)
-options_byte_order (int order)
-{
- switch (order) {
- case 0: return "0";
- case BIG_ENDIAN: return "BIG_ENDIAN";
- case LITTLE_ENDIAN: return "LITTLE_ENDIAN";
- }
-
- return "UNKNOWN";
-}
-
-STATIC_INLINE_OPTIONS\
-(const char *)
-options_env (int env)
-{
- switch (env) {
- case OPERATING_ENVIRONMENT: return "OPERATING";
- case VIRTUAL_ENVIRONMENT: return "VIRTUAL";
- case USER_ENVIRONMENT: return "USER";
- case 0: return "0";
- }
-
- return "UNKNOWN";
-}
-
-STATIC_INLINE_OPTIONS\
-(const char *)
-options_align (int align)
-{
- switch (align) {
- case NONSTRICT_ALIGNMENT: return "NONSTRICT";
- case STRICT_ALIGNMENT: return "STRICT";
- case 0: return "0";
- }
-
- return "UNKNOWN";
-}
-
-STATIC_INLINE_OPTIONS\
-(const char *)
-options_float (int float_type)
-{
- switch (float_type) {
- case SOFT_FLOATING_POINT: return "SOFTWARE";
- case HARD_FLOATING_POINT: return "HARDWARE";
- }
-
- return "UNKNOWN";
-}
-
-STATIC_INLINE_OPTIONS\
-(const char *)
-options_mon (int mon)
-{
- switch (mon) {
- case MONITOR_INSTRUCTION_ISSUE|MONITOR_LOAD_STORE_UNIT: return "ALL";
- case MONITOR_INSTRUCTION_ISSUE: return "INSTRUCTION";
- case MONITOR_LOAD_STORE_UNIT: return "MEMORY";
- case 0: return "0";
- }
-
- return "UNKNOWN";
-}
-
-STATIC_INLINE_OPTIONS\
-(const char *)
-options_inline (int in)
-{
- switch (in) {
- case /*0*/ 0: return "0";
- case /*1*/ REVEAL_MODULE: return "REVEAL_MODULE";
- case /*2*/ INLINE_MODULE: return "INLINE_MODULE";
- case /*3*/ REVEAL_MODULE|INLINE_MODULE: return "REVEAL_MODULE|INLINE_MODULE";
- case /*4*/ INLINE_LOCALS: return "LOCALS_INLINE";
- case /*5*/ INLINE_LOCALS|REVEAL_MODULE: return "INLINE_LOCALS|REVEAL_MODULE";
- case /*6*/ INLINE_LOCALS|INLINE_MODULE: return "INLINE_LOCALS|INLINE_MODULE";
- case /*7*/ ALL_INLINE: return "ALL_INLINE";
- }
- return "0";
-}
-
-
-INLINE_OPTIONS\
-(void)
-print_options (void)
-{
-#if defined(_GNUC_) && defined(__VERSION__)
- printf_filtered ("Compiled by GCC %s on %s %s\n", __VERSION__, __DATE__, __TIME__);
-#else
- printf_filtered ("Compiled on %s %s\n", __DATE__, __TIME__);
-#endif
-
- printf_filtered ("WITH_HOST_BYTE_ORDER = %s\n", options_byte_order (WITH_HOST_BYTE_ORDER));
- printf_filtered ("WITH_TARGET_BYTE_ORDER = %s\n", options_byte_order (WITH_TARGET_BYTE_ORDER));
- printf_filtered ("WITH_XOR_ENDIAN = %d\n", WITH_XOR_ENDIAN);
- printf_filtered ("WITH_BSWAP = %d\n", WITH_BSWAP);
- printf_filtered ("WITH_SMP = %d\n", WITH_SMP);
- printf_filtered ("WITH_HOST_WORD_BITSIZE = %d\n", WITH_HOST_WORD_BITSIZE);
- printf_filtered ("WITH_TARGET_WORD_BITSIZE = %d\n", WITH_TARGET_WORD_BITSIZE);
- printf_filtered ("WITH_ENVIRONMENT = %s\n", options_env(WITH_ENVIRONMENT));
- printf_filtered ("WITH_EVENTS = %d\n", WITH_EVENTS);
- printf_filtered ("WITH_TIME_BASE = %d\n", WITH_TIME_BASE);
- printf_filtered ("WITH_CALLBACK_MEMORY = %d\n", WITH_CALLBACK_MEMORY);
- printf_filtered ("WITH_ALIGNMENT = %s\n", options_align (WITH_ALIGNMENT));
- printf_filtered ("WITH_FLOATING_POINT = %s\n", options_float (WITH_FLOATING_POINT));
- printf_filtered ("WITH_TRACE = %d\n", WITH_TRACE);
- printf_filtered ("WITH_ASSERT = %d\n", WITH_ASSERT);
- printf_filtered ("WITH_MON = %s\n", options_mon (WITH_MON));
- printf_filtered ("WITH_DEFAULT_MODEL = %s\n", model_name[WITH_DEFAULT_MODEL]);
- printf_filtered ("WITH_MODEL = %s\n", model_name[WITH_MODEL]);
- printf_filtered ("WITH_MODEL_ISSUE = %d\n", WITH_MODEL_ISSUE);
- printf_filtered ("WITH_RESERVED_BITS = %d\n", WITH_RESERVED_BITS);
- printf_filtered ("WITH_STDIO = %d\n", WITH_STDIO);
- printf_filtered ("WITH_REGPARM = %d\n", WITH_REGPARM);
- printf_filtered ("WITH_STDCALL = %d\n", WITH_STDCALL);
- printf_filtered ("DEFAULT_INLINE = %s\n", options_inline (DEFAULT_INLINE));
- printf_filtered ("SIM_ENDIAN_INLINE = %s\n", options_inline (SIM_ENDIAN_INLINE));
- printf_filtered ("BITS_INLINE = %s\n", options_inline (BITS_INLINE));
- printf_filtered ("CPU_INLINE = %s\n", options_inline (CPU_INLINE));
- printf_filtered ("VM_INLINE = %s\n", options_inline (VM_INLINE));
- printf_filtered ("CORE_INLINE = %s\n", options_inline (CORE_INLINE));
- printf_filtered ("EVENTS_INLINE = %s\n", options_inline (EVENTS_INLINE));
- printf_filtered ("MON_INLINE = %s\n", options_inline (MON_INLINE));
- printf_filtered ("INTERRUPTS_INLINE = %s\n", options_inline (INTERRUPTS_INLINE));
- printf_filtered ("REGISTERS_INLINE = %s\n", options_inline (REGISTERS_INLINE));
- printf_filtered ("DEVICE_INLINE = %s\n", options_inline (DEVICE_INLINE));
- printf_filtered ("SPREG_INLINE = %s\n", options_inline (SPREG_INLINE));
- printf_filtered ("SEMANTICS_INLINE = %s\n", options_inline (SEMANTICS_INLINE));
- printf_filtered ("IDECODE_INLINE = %s\n", options_inline (IDECODE_INLINE));
- printf_filtered ("OPTIONS_INLINE = %s\n", options_inline (OPTIONS_INLINE));
- printf_filtered ("OS_EMUL_INLINE = %s\n", options_inline (OS_EMUL_INLINE));
- printf_filtered ("SUPPORT_INLINE = %s\n", options_inline (SUPPORT_INLINE));
-
-#ifdef OPCODE_RULES
- printf_filtered ("OPCODE rules = %s\n", OPCODE_RULES);
-#endif
-
-#ifdef IGEN_FLAGS
- printf_filtered ("IGEN_FLAGS = %s\n", IGEN_FLAGS);
-#endif
-
-#ifdef DGEN_FLAGS
- printf_filtered ("DGEN_FLAGS = %s\n", DGEN_FLAGS);
-#endif
-
- {
- static const char *const defines[] = {
-#ifdef __GNUC__
- "__GNUC__",
-#endif
-
-#ifdef __STRICT_ANSI__
- "__STRICT_ANSI__",
-#endif
-
-#ifdef __CHAR_UNSIGNED__
- "__CHAR_UNSIGNED__",
-#endif
-
-#ifdef __OPTIMIZE__
- "__OPTIMIZE__",
-#endif
-
-#ifdef STDC_HEADERS
- "STDC_HEADERS",
-#endif
-
-#include "defines.h"
-
-#ifdef HAVE_TERMIOS_CLINE
- "HAVE_TERMIOS_CLINE",
-#endif
-
-#ifdef HAVE_TERMIOS_STRUCTURE
- "HAVE_TERMIOS_STRUCTURE",
-#endif
-
-#ifdef HAVE_TERMIO_CLINE
- "HAVE_TERMIO_CLINE",
-#endif
-
-#ifdef HAVE_TERMIO_STRUCTURE
- "HAVE_TERMIO_STRUCTURE",
-#endif
-
-#ifdef HAVE_DEVZERO
- "HAVE_DEVZERO",
-#endif
- };
-
- int i;
- int max_len = 0;
- int cols;
-
- for (i = 0; i < sizeof (defines) / sizeof (defines[0]); i++) {
- int len = strlen (defines[i]);
- if (len > max_len)
- max_len = len;
- }
-
- cols = 78 / (max_len + 2);
- if (cols < 0)
- cols = 1;
-
- printf_filtered ("\n#defines:");
- for (i = 0; i < sizeof (defines) / sizeof (defines[0]); i++) {
- const char *const prefix = ((i % cols) == 0) ? "\n" : "";
- printf_filtered ("%s %s%*s", prefix, defines[i],
- (((i == (sizeof (defines) / sizeof (defines[0])) - 1)
- || (((i + 1) % cols) == 0))
- ? 0
- : max_len + 4 - strlen (defines[i])),
- "");
- }
- printf_filtered ("\n");
- }
-}
-
-#endif /* _OPTIONS_C_ */
diff --git a/sim/ppc/options.h b/sim/ppc/options.h
deleted file mode 100644
index 5adb9ebcf1b..00000000000
--- a/sim/ppc/options.h
+++ /dev/null
@@ -1,30 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1995, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-#ifndef _OPTIONS_H_
-#define _OPTIONS_H_
-
-#ifndef INLINE_OPTIONS
-#define INLINE_OPTIONS
-#endif
-
-INLINE_OPTIONS(void) print_options (void);
-
-#endif /* _OPTIONS_H_ */
diff --git a/sim/ppc/os_emul.c b/sim/ppc/os_emul.c
deleted file mode 100644
index dc60c8f6641..00000000000
--- a/sim/ppc/os_emul.c
+++ /dev/null
@@ -1,146 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1996, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-#ifndef _OS_EMUL_C_
-#define _OS_EMUL_C_
-
-#include "cpu.h"
-#include "idecode.h"
-#include "os_emul.h"
-
-#include "emul_generic.h"
-#include "emul_netbsd.h"
-#include "emul_unix.h"
-#include "emul_chirp.h"
-#include "emul_bugapi.h"
-
-static const os_emul *(os_emulations[]) = {
- &emul_chirp,
- &emul_bugapi,
- &emul_netbsd,
- &emul_solaris,
- &emul_linux,
- 0
-};
-
-
-INLINE_OS_EMUL\
-(os_emul *)
-os_emul_create(const char *file_name,
- device *root)
-{
- const char *emulation_name = NULL;
- bfd *image;
- os_emul *chosen_emulation = NULL;
-
- bfd_init(); /* would never hurt */
-
- /* open the file */
- image = bfd_openr(file_name, NULL);
- if (image == NULL) {
- bfd_perror(file_name);
- error("nothing loaded\n");
- }
-
- /* check it is an executable */
- if (!bfd_check_format(image, bfd_object)) {
- TRACE(trace_tbd,
- ("FIXME - should check more than just bfd_check_format\n"));
- TRACE(trace_os_emul,
- ("%s not an executable, assumeing a device file\n", file_name));
- bfd_close(image);
- image = NULL;
- }
-
- /* if a device file, load that before trying the emulations on */
- if (image == NULL) {
- psim_merge_device_file(root, file_name);
- }
-
- /* see if the device tree already specifies the required emulation */
- if (tree_find_property(root, "/openprom/options/os-emul") != NULL)
- emulation_name =
- tree_find_string_property(root, "/openprom/options/os-emul");
- else
- emulation_name = NULL;
-
- /* go through each emulation to see if they reconize it. FIXME -
- should have some sort of imported table from a separate file */
- {
- os_emul_data *emul_data;
- const os_emul **possible_emulation;
- chosen_emulation = NULL;
- for (possible_emulation = os_emulations, emul_data = NULL;
- *possible_emulation != NULL && emul_data == NULL;
- possible_emulation++) {
- emul_data = (*possible_emulation)->create(root,
- image,
- emulation_name);
- if (emul_data != NULL) {
- chosen_emulation = ZALLOC(os_emul);
- *chosen_emulation = **possible_emulation;
- chosen_emulation->data = emul_data;
- }
- }
- }
-
- /* clean up */
- if (image != NULL)
- bfd_close(image);
- return chosen_emulation;
-}
-
-INLINE_OS_EMUL\
-(void)
-os_emul_init(os_emul *emulation,
- int nr_cpus)
-{
- if (emulation != (os_emul*)0)
- emulation->init(emulation->data, nr_cpus);
-}
-
-INLINE_OS_EMUL\
-(void)
-os_emul_system_call(cpu *processor,
- unsigned_word cia)
-{
- os_emul *emulation = cpu_os_emulation(processor);
- if (emulation != (os_emul*)0 && emulation->system_call != 0)
- emulation->system_call(processor, cia, emulation->data);
- else
- error("System call emulation not available\n");
-}
-
-INLINE_OS_EMUL\
-(int)
-os_emul_instruction_call(cpu *processor,
- unsigned_word cia,
- unsigned_word ra)
-{
- os_emul *emulation = cpu_os_emulation(processor);
- if (emulation != (os_emul*)0 && emulation->instruction_call != 0)
- return emulation->instruction_call(processor, cia, ra, emulation->data);
- else
- return 0;
-}
-
-
-#endif /* _OS_EMUL_C_ */
diff --git a/sim/ppc/os_emul.h b/sim/ppc/os_emul.h
deleted file mode 100644
index 6d74e9c6f93..00000000000
--- a/sim/ppc/os_emul.h
+++ /dev/null
@@ -1,60 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1995, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-#ifndef _OS_EMUL_H_
-#define _OS_EMUL_H_
-
-typedef struct _os_emul os_emul;
-
-INLINE_OS_EMUL\
-(os_emul *) os_emul_create
-(const char *file_name,
- device *root);
-
-INLINE_OS_EMUL\
-(void) os_emul_init
-(os_emul *emulation,
- int nr_cpus);
-
-
-/* System-call emulation - for user code. Instead of trapping system
- calls to kernel mode, the simulator emulates the kernels behavour */
-
-INLINE_OS_EMUL\
-(void) os_emul_system_call
-(cpu *processor,
- unsigned_word cia);
-
-
-/* Instruction emulation - for kernel code. Extra (normally illegal)
- instructions are added to the instruction table that when executed
- call this emulation function. The instruction call emulator should
- verify the address that the instruction appears before emulating
- the required behavour. If the verification fails, a zero value
- should be returned (indicating instruction illegal). */
-
-INLINE_OS_EMUL\
-(int) os_emul_instruction_call
-(cpu *processor,
- unsigned_word cia,
- unsigned_word ra);
-
-#endif
diff --git a/sim/ppc/pk_disklabel.c b/sim/ppc/pk_disklabel.c
deleted file mode 100644
index 91dcf7ce562..00000000000
--- a/sim/ppc/pk_disklabel.c
+++ /dev/null
@@ -1,401 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1997, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-#ifndef _PK_DISKLABEL_C_
-#define _PK_DISKLABEL_C_
-
-#ifndef STATIC_INLINE_PK_DISKLABEL
-#define STATIC_INLINE_PK_DISKLABEL STATIC_INLINE
-#endif
-
-#include "device_table.h"
-
-#include "pk.h"
-
-#ifdef HAVE_STDLIB_H
-#include <stdlib.h>
-#endif
-
-
-
-/* PACKAGE
-
- disk-label - all knowing disk I/O package
-
- DESCRIPTION
-
- The disk-label package provides a generic interface to disk
- devices. It uses the arguments specified when an instance is being
- created to determine if the raw disk, a partition, or a file within
- a partition should be opened.
-
- An instance create call to disk-label could result, for instance,
- in the opening of a DOS file system contained within a dos
- partition contained within a physical disk.
-
- */
-
-/* taken from bfd/ppcboot.c by Michael Meissner */
-
-/* PPCbug location structure */
-typedef struct ppcboot_location {
- unsigned8 ind;
- unsigned8 head;
- unsigned8 sector;
- unsigned8 cylinder;
-} ppcboot_location_t;
-
-/* PPCbug partition table layout */
-typedef struct ppcboot_partition {
- ppcboot_location_t partition_begin; /* partition begin */
- ppcboot_location_t partition_end; /* partition end */
- unsigned8 sector_begin[4]; /* 32-bit start RBA (zero-based), little endian */
- unsigned8 sector_length[4]; /* 32-bit RBA count (one-based), little endian */
-} ppcboot_partition_t;
-
-#if 0
-/* PPCbug boot layout. */
-typedef struct ppcboot_hdr {
- unsigned8 pc_compatibility[446]; /* x86 instruction field */
- ppcboot_partition_t partition[4]; /* partition information */
- unsigned8 signature[2]; /* 0x55 and 0xaa */
- unsigned8 entry_offset[4]; /* entry point offset, little endian */
- unsigned8 length[4]; /* load image length, little endian */
- unsigned8 flags; /* flag field */
- unsigned8 os_id; /* OS_ID */
- char partition_name[32]; /* partition name */
- unsigned8 reserved1[470]; /* reserved */
-} ppcboot_hdr_t;
-#endif
-
-
-typedef struct _disklabel {
- device_instance *parent;
- device_instance *raw_disk;
- unsigned_word pos;
- unsigned_word sector_begin;
- unsigned_word sector_length;
-} disklabel;
-
-
-static unsigned_word
-sector2uw(unsigned8 s[4])
-{
- return ((s[3] << 24)
- + (s[2] << 16)
- + (s[1] << 8)
- + (s[0] << 0));
-}
-
-
-static void
-disklabel_delete(device_instance *instance)
-{
- disklabel *label = device_instance_data(instance);
- device_instance_delete(label->raw_disk);
- zfree(label);
-}
-
-
-static int
-disklabel_read(device_instance *instance,
- void *buf,
- unsigned_word len)
-{
- disklabel *label = device_instance_data(instance);
- int nr_read;
- if (label->pos + len > label->sector_length)
- len = label->sector_length - label->pos;
- if (device_instance_seek(label->raw_disk, 0,
- label->sector_begin + label->pos) < 0)
- return -1;
- nr_read = device_instance_read(label->raw_disk, buf, len);
- if (nr_read > 0)
- label->pos += nr_read;
- return nr_read;
-}
-
-static int
-disklabel_write(device_instance *instance,
- const void *buf,
- unsigned_word len)
-{
- disklabel *label = device_instance_data(instance);
- int nr_written;
- if (label->pos + len > label->sector_length)
- len = label->sector_length - label->pos;
- if (device_instance_seek(label->raw_disk, 0,
- label->sector_begin + label->pos) < 0)
- return -1;
- nr_written = device_instance_write(label->raw_disk, buf, len);
- if (nr_written > 0)
- label->pos += nr_written;
- return nr_written;
-}
-
-static int
-disklabel_seek(device_instance *instance,
- unsigned_word pos_hi,
- unsigned_word pos_lo)
-{
- disklabel *label = device_instance_data(instance);
- if (pos_lo >= label->sector_length || pos_hi != 0)
- return -1;
- label->pos = pos_lo;
- return 0;
-}
-
-
-static const device_instance_callbacks package_disklabel_callbacks = {
- disklabel_delete,
- disklabel_read,
- disklabel_write,
- disklabel_seek,
-};
-
-/* Reconize different types of boot block */
-
-static int
-block0_is_bpb(const unsigned8 block[])
-{
- const char ebdic_ibma[] = { 0xc9, 0xc2, 0xd4, 0xc1 };
- /* ref PowerPC Microprocessor CHRP bindings 1.2b - page 47 */
- /* can't start with IBMA */
- if (memcmp(block, ebdic_ibma, sizeof(ebdic_ibma)) == 0)
- return 0;
- /* must have LE 0xAA55 signature at offset 510 */
- if (block[511] != 0xAA && block[510] != 0x55)
- return 0;
- /* valid 16 bit LE bytes per sector - 256, 512, 1024 */
- if (block[11] != 0
- || (block[12] != 1 && block[12] != 2 && block[12] != 4))
- return 0;
- /* nr fats is 1 or 2 */
- if (block[16] != 1 && block[16] != 2)
- return 0;
- return 1;
-}
-
-
-/* Verify that the device contains an ISO-9660 File system */
-
-static int
-is_iso9660(device_instance *raw_disk)
-{
- /* ref PowerPC Microprocessor CHRP bindings 1.2b - page 47 */
- unsigned8 block[512];
- if (device_instance_seek(raw_disk, 0, 512 * 64) < 0)
- return 0;
- if (device_instance_read(raw_disk, block, sizeof(block)) != sizeof(block))
- return 0;
- if (block[0] == 0x01
- && block[1] == 'C'
- && block[2] == 'D'
- && block[3] == '0'
- && block[4] == '0'
- && block[5] == '1')
- return 1;
- return 0;
-}
-
-
-/* Verify that the disk block contains a valid DOS partition table.
- While we're at it have a look around for active partitions etc.
-
- Return 0: invalid
- Return 1..4: valid, value returned is the first active partition
- Return -1: no active partition */
-
-static int
-block0_is_fdisk(const unsigned8 block[])
-{
- const int partition_type_fields[] = { 0, 0x1c2, 0x1d2, 0x1e2, 0x1f2 };
- const int partition_active_fields[] = { 0, 0x1be, 0x1ce, 0x1de, 0xee };
- int partition;
- int active = -1;
- /* ref PowerPC Microprocessor CHRP bindings 1.2b - page 47 */
- /* must have LE 0xAA55 signature at offset 510 */
- if (block[511/*0x1ff*/] != 0xAA && block[510/*0x1fe*/] != 0x55)
- return 0;
- /* must contain valid partition types */
- for (partition = 1; partition <= 4 && active != 0; partition++) {
- int partition_type = block[partition_type_fields[partition]];
- int is_active = block[partition_active_fields[partition]] == 0x80;
- const char *type;
- switch (partition_type) {
- case 0x00:
- type = "UNUSED";
- break;
- case 0x01:
- type = "FAT 12 File system";
- break;
- case 0x04:
- type = "FAT 16 File system";
- break;
- case 0x05:
- case 0x06:
- type = "rejected - extended/chained partition not supported";
- active = 0;
- break;
- case 0x41:
- type = "Single program image";
- break;
- case 0x82:
- type = "Solaris?";
- break;
- case 0x96:
- type = "ISO 9660 File system";
- break;
- default:
- type = "rejected - unknown type";
- active = 0;
- break;
- }
- PTRACE(disklabel, ("partition %d of type 0x%02x - %s%s\n",
- partition,
- partition_type,
- type,
- is_active && active != 0 ? " (active)" : ""));
- if (partition_type != 0 && is_active && active < 0)
- active = partition;
- }
- return active;
-}
-
-
-/* Verify that block0 corresponds to a MAC disk */
-
-static int
-block0_is_mac_disk(const unsigned8 block[])
-{
- /* ref PowerPC Microprocessor CHRP bindings 1.2b - page 47 */
- /* signature - BEx4552 at offset 0 */
- if (block[0] != 0x45 || block[1] != 0x52)
- return 0;
- return 1;
-}
-
-
-/* Open a logical disk/file */
-
-device_instance *
-pk_disklabel_create_instance(device_instance *raw_disk,
- const char *args)
-{
- int partition;
- char *filename;
-
- /* parse the arguments */
- if (args == NULL) {
- partition = 0;
- filename = NULL;
- }
- else {
- partition = strtoul((char*)args, &filename, 0);
- if (filename == args)
- partition = -1; /* not specified */
- if (*filename == ',')
- filename++;
- if (*filename == '\0')
- filename = NULL; /* easier */
- }
-
- if (partition == 0) {
- /* select the raw disk */
- return raw_disk;
- }
- else {
- unsigned8 boot_block[512];
- /* get the boot block for examination */
- if (device_instance_seek(raw_disk, 0, 0) < 0)
- device_error(device_instance_device(raw_disk),
- "Problem seeking on raw disk");
- if (device_instance_read(raw_disk, &boot_block, sizeof(boot_block))
- != sizeof(boot_block))
- device_error(device_instance_device(raw_disk), "Problem reading boot block");
-
- if (partition < 0) {
- /* select the active partition */
- if (block0_is_bpb(boot_block)) {
- device_error(device_instance_device(raw_disk), "Unimplemented active BPB");
- }
- else if (block0_is_fdisk(boot_block)) {
- int active = block0_is_fdisk(boot_block);
- device_error(device_instance_device(raw_disk), "Unimplemented active FDISK (%d)",
- active);
- }
- else if (is_iso9660(raw_disk)) {
- device_error(device_instance_device(raw_disk), "Unimplemented active ISO9660");
- }
- else if (block0_is_mac_disk(boot_block)) {
- device_error(device_instance_device(raw_disk), "Unimplemented active MAC DISK");
- }
- else {
- device_error(device_instance_device(raw_disk), "Unreconized bootblock");
- }
- }
- else {
- /* select the specified disk partition */
- if (block0_is_bpb(boot_block)) {
- device_error(device_instance_device(raw_disk), "Unimplemented BPB");
- }
- else if (block0_is_fdisk(boot_block)) {
- /* return an instance */
- ppcboot_partition_t *partition_table = (ppcboot_partition_t*) &boot_block[446];
- ppcboot_partition_t *partition_entry;
- disklabel *label;
- if (partition > 4)
- device_error(device_instance_device(raw_disk),
- "Only FDISK partitions 1..4 supported");
- partition_entry = &partition_table[partition - 1];
- label = ZALLOC(disklabel);
- label->raw_disk = raw_disk;
- label->pos = 0;
- label->sector_begin = 512 * sector2uw(partition_entry->sector_begin);
- label->sector_length = 512 * sector2uw(partition_entry->sector_length);
- PTRACE(disklabel, ("partition %ld, sector-begin %ld, length %ld\n",
- (long)partition,
- (long)label->sector_begin,
- (long)label->sector_length));
- if (filename != NULL)
- device_error(device_instance_device(raw_disk),
- "FDISK file names not yet supported");
- return device_create_instance_from(NULL, raw_disk,
- label,
- NULL, args,
- &package_disklabel_callbacks);
- }
- else if (block0_is_mac_disk(boot_block)) {
- device_error(device_instance_device(raw_disk), "Unimplemented MAC DISK");
- }
- else {
- device_error(device_instance_device(raw_disk),
- "Unreconized bootblock");
- }
- }
- }
-
- return NULL;
-}
-
-
-#endif /* _PK_DISKLABEL_C_ */
-
diff --git a/sim/ppc/ppc-cache-rules b/sim/ppc/ppc-cache-rules
deleted file mode 100644
index 2b5f4722175..00000000000
--- a/sim/ppc/ppc-cache-rules
+++ /dev/null
@@ -1,65 +0,0 @@
-#
-# This file is part of the program psim.
-#
-# Copyright (C) 1994-1995, Andrew Cagney <cagney@highland.com.au>
-#
-# This program is free software; you can redistribute it and/or modify
-# it under the terms of the GNU General Public License as published by
-# the Free Software Foundation; either version 2 of the License, or
-# (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-#
-cache:RA:RA::
-cache:RA:rA:signed_word *:(cpu_registers(processor)->gpr + RA)
-cache:RA:RA_BITMASK:unsigned32:(1 << RA)
-compute:RA:RA_is_0:int:(RA == 0)
-cache:RT:RT::
-cache:RT:rT:signed_word *:(cpu_registers(processor)->gpr + RT)
-cache:RT:RT_BITMASK:unsigned32:(1 << RT)
-cache:RS:RS::
-cache:RS:rS:signed_word *:(cpu_registers(processor)->gpr + RS)
-cache:RS:RS_BITMASK:unsigned32:(1 << RS)
-cache:RB:RB::
-cache:RB:rB:signed_word *:(cpu_registers(processor)->gpr + RB)
-cache:RB:RB_BITMASK:unsigned32:(1 << RB)
-scratch:FRA:FRA::
-cache:FRA:frA:unsigned64 *:(cpu_registers(processor)->fpr + FRA)
-cache:FRA:FRA_BITMASK:unsigned32:(1 << FRA)
-scratch:FRB:FRB::
-cache:FRB:frB:unsigned64 *:(cpu_registers(processor)->fpr + FRB)
-cache:FRB:FRB_BITMASK:unsigned32:(1 << FRB)
-scratch:FRC:FRC::
-cache:FRC:frC:unsigned64 *:(cpu_registers(processor)->fpr + FRC)
-cache:FRC:FRC_BITMASK:unsigned32:(1 << FRC)
-scratch:FRS:FRS::
-cache:FRS:frS:unsigned64 *:(cpu_registers(processor)->fpr + FRS)
-cache:FRS:FRS_BITMASK:unsigned32:(1 << FRS)
-scratch:FRT:FRT::
-cache:FRT:frT:unsigned64 *:(cpu_registers(processor)->fpr + FRT)
-cache:FRT:FRT_BITMASK:unsigned32:(1 << FRT)
-cache:SI:EXTS_SI:unsigned_word:((signed_word)(signed16)instruction)
-scratch:BI:BI::
-cache:BI:BIT32_BI::BIT32(BI)
-cache:BF:BF::
-cache:BF:BF_BITMASK:unsigned32:(1 << BF)
-scratch:BA:BA::
-cache:BA:BIT32_BA::BIT32(BA)
-cache:BA:BA_BITMASK:unsigned32:(1 << BA)
-scratch:BB:BB::
-cache:BB:BIT32_BB::BIT32(BB)
-cache:BB:BB_BITMASK:unsigned32:(1 << BB)
-cache:BT:BT::
-cache:BT:BT_BITMASK:unsigned32:(1 << BT)
-cache:BD:EXTS_BD_0b00:unsigned_word:(((signed_word)(signed16)instruction) & ~3)
-cache:LI:EXTS_LI_0b00:unsigned_word:((((signed_word)(signed32)(instruction << 6)) >> 6) & ~0x3)
-cache:D:EXTS_D:unsigned_word:((signed_word)(signed16)(instruction))
-cache:DS:EXTS_DS_0b00:unsigned_word:(((signed_word)(signed16)instruction) & ~0x3)
-#compute:SPR:SPR_is_256:int:(SPR == 256)
diff --git a/sim/ppc/ppc-instructions b/sim/ppc/ppc-instructions
deleted file mode 100644
index 25a9d78c685..00000000000
--- a/sim/ppc/ppc-instructions
+++ /dev/null
@@ -1,4927 +0,0 @@
-#
-# This file is part of the program psim.
-#
-# Copyright (C) 1994-1997, Andrew Cagney <cagney@highland.com.au>
-#
-# --
-#
-# The pseudo-code that appears below, translated into C, was copied
-# by Andrew Cagney of Moss Vale, Australia.
-#
-# This pseudo-code is copied by permission from the publication
-# "The PowerPC Architecture: A Specification for A New Family of
-# RISC Processors" (ISBN 1-55860-316-6) copyright 1993, 1994 by
-# International Business Machines Corporation.
-#
-# THIS PERMISSION IS PROVIDED WITHOUT WARRANTY OF ANY KIND, EITHER
-# EXPRESSED OR IMPLIED, INCLUDING BUT NOT LIMITED TO IMPLIED WARRANTIES
-# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.
-#
-# --
-#
-# This program is free software; you can redistribute it and/or modify
-# it under the terms of the GNU General Public License as published by
-# the Free Software Foundation; either version 2 of the License, or
-# (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-#
-
-# PowerPC models
-::model:604:ppc604: PPC_UNIT_BAD, PPC_UNIT_BAD, 1, 1, 0
-::model:603e:ppc603e:PPC_UNIT_BAD, PPC_UNIT_BAD, 1, 1, 0
-::model:603:ppc603: PPC_UNIT_BAD, PPC_UNIT_BAD, 1, 1, 0
-::model:601:ppc601: PPC_UNIT_BAD, PPC_UNIT_BAD, 1, 1, 0
-
-# Flags for model.h
-::model-macro:::
- #define PPC_INSN_INT(OUT_MASK, IN_MASK, RC) \
- do { \
- if (CURRENT_MODEL_ISSUE > 0) { \
- if (RC) \
- ppc_insn_int_cr(MY_INDEX, cpu_model(processor), OUT_MASK, IN_MASK, 1 << 0); \
- else \
- ppc_insn_int(MY_INDEX, cpu_model(processor), OUT_MASK, IN_MASK); \
- } \
- } while (0)
-
- #define PPC_INSN_INT_CR(OUT_MASK, IN_MASK, CR_MASK) \
- do { \
- if (CURRENT_MODEL_ISSUE > 0) \
- ppc_insn_int_cr(MY_INDEX, cpu_model(processor), OUT_MASK, IN_MASK, CR_MASK); \
- } while (0)
-
- #define PPC_INSN_CR(OUT_MASK, IN_MASK) \
- do { \
- if (CURRENT_MODEL_ISSUE > 0) \
- ppc_insn_cr(MY_INDEX, cpu_model(processor), OUT_MASK, IN_MASK); \
- } while (0)
-
- #define PPC_INSN_FLOAT(OUT_MASK, IN_MASK, RC) \
- do { \
- if (CURRENT_MODEL_ISSUE > 0) { \
- if (RC) \
- ppc_insn_float(MY_INDEX, cpu_model(processor), OUT_MASK, IN_MASK); \
- else \
- ppc_insn_float_cr(MY_INDEX, cpu_model(processor), OUT_MASK, IN_MASK, 1 << 0); \
- } \
- } while (0)
-
- #define PPC_INSN_FLOAT_CR(OUT_MASK, IN_MASK, CR_MASK) \
- do { \
- if (CURRENT_MODEL_ISSUE > 0) \
- ppc_insn_float_cr(MY_INDEX, cpu_model(processor), OUT_MASK, IN_MASK, CR_MASK); \
- } while (0)
-
- #define PPC_INSN_INT_FLOAT(OUT_INT_MASK, OUT_FP_MASK, IN_INT_MASK, IN_FP_MASK) \
- do { \
- if (CURRENT_MODEL_ISSUE > 0) \
- ppc_insn_int_float(MY_INDEX, cpu_model(processor), OUT_INT_MASK, OUT_FP_MASK, IN_INT_MASK, IN_FP_MASK); \
- } while (0)
-
- #define PPC_INSN_FROM_SPR(INT_MASK, SPR) \
- do { \
- if (CURRENT_MODEL_ISSUE > 0) \
- ppc_insn_from_spr(MY_INDEX, cpu_model(processor), INT_MASK, SPR); \
- } while (0)
-
- #define PPC_INSN_TO_SPR(INT_MASK, SPR) \
- do { \
- if (CURRENT_MODEL_ISSUE > 0) \
- ppc_insn_to_spr(MY_INDEX, cpu_model(processor), INT_MASK, SPR); \
- } while (0)
-
- #define PPC_INSN_MFCR(INT_MASK) \
- do { \
- if (CURRENT_MODEL_ISSUE > 0) \
- ppc_insn_mfcr(MY_INDEX, cpu_model(processor), INT_MASK); \
- } while (0)
-
- #define PPC_INSN_MTCR(INT_MASK, FXM) \
- do { \
- if (CURRENT_MODEL_ISSUE > 0) \
- ppc_insn_mtcr(MY_INDEX, cpu_model(processor), INT_MASK, FXM); \
- } while (0)
-
-::model-data:::
- typedef enum _ppc_function_unit {
- PPC_UNIT_BAD, /* unknown function unit */
- PPC_UNIT_IU, /* integer unit (601/603 style) */
- PPC_UNIT_SRU, /* system register unit (601/603 style) */
- PPC_UNIT_SCIU1, /* 1st single cycle integer unit (604 style) */
- PPC_UNIT_SCIU2, /* 2nd single cycle integer unit (604 style) */
- PPC_UNIT_MCIU, /* multiple cycle integer unit (604 style) */
- PPC_UNIT_FPU, /* floating point unit */
- PPC_UNIT_LSU, /* load/store unit */
- PPC_UNIT_BPU, /* branch unit */
- nr_ppc_function_units
- } ppc_function_unit;
-
- /* Structure to hold timing information on a per instruction basis */
- struct _model_time {
- ppc_function_unit first_unit; /* first functional unit this insn could use */
- ppc_function_unit second_unit; /* second functional unit this insn could use */
- signed16 issue; /* # cycles before function unit can process other insns */
- signed16 done; /* # cycles before insn is done */
- unsigned32 flags; /* any flags that are needed */
- };
-
- /* Register mappings in status masks */
- #define PPC_CR_REG 0 /* start of CR0 .. CR7 */
- #define PPC_FPSCR_REG (PPC_CR_REG + 8) /* start of fpscr register */
-
- #define PPC_NO_SPR (-1) /* flag for no SPR register */
-
- /* Return if 1 bit set */
- #define PPC_ONE_BIT_SET_P(x) (((x) & ((x)-1)) == 0)
-
- /* Structure for each functional unit that is busy */
- typedef struct _model_busy model_busy;
- struct _model_busy {
- model_busy *next; /* next function unit */
- ppc_function_unit unit; /* function unit name */
- unsigned32 int_busy; /* int registers that are busy */
- unsigned32 fp_busy; /* floating point registers that are busy */
- unsigned32 cr_fpscr_busy; /* CR/FPSCR registers that are busy */
- signed16 spr_busy; /* SPR register that is busy or PPC_NO_SPR */
- signed16 issue; /* # of cycles until unit can accept another insn */
- signed16 done; /* # of cycles until insn is done */
- signed16 nr_writebacks; /* # of registers this unit writes back */
- };
-
- /* Structure to hold the current state information for the simulated CPU model */
- struct _model_data {
- cpu *processor; /* point back to processor */
- const char *name; /* model name */
- const model_time *timing; /* timing information */
- model_busy busy_head; /* dummy entry to head list of busy function units */
- model_busy *busy_tail; /* tail of list of busy function units */
- model_busy *free_list; /* list of model_busy structs not in use */
- count_type nr_cycles; /* # cycles */
- count_type nr_branches; /* # branches */
- count_type nr_branches_fallthrough; /* # conditional branches that fell through */
- count_type nr_branch_predict_trues; /* # branches predicted correctly */
- count_type nr_branch_predict_falses; /* # branches predicted incorrectly */
- count_type nr_branch_conditional[32]; /* # of each type of bc */
- count_type nr_mtcrf_crs[9]; /* # of CR's moved in a mtcrf instruction */
- count_type nr_stalls_data; /* # of stalls for data */
- count_type nr_stalls_unit; /* # of stalls waiting for a function unit */
- count_type nr_stalls_serialize; /* # of stalls waiting for things to quiet down */
- count_type nr_stalls_writeback; /* # of stalls waiting for a writeback slot */
- count_type nr_units[nr_ppc_function_units]; /* function unit counts */
- int max_nr_writebacks; /* max # of writeback slots available */
- unsigned32 int_busy; /* int registers that are busy */
- unsigned32 fp_busy; /* floating point registers that are busy */
- unsigned32 cr_fpscr_busy; /* CR/FPSCR registers that are busy */
- unsigned8 spr_busy[nr_of_sprs]; /* SPR registers that are busy */
- unsigned8 busy[nr_ppc_function_units]; /* whether a function is busy or not */
- };
-
- static const char *const ppc_function_unit_name[ (int)nr_ppc_function_units ] = {
- "unknown functional unit instruction",
- "integer functional unit instruction",
- "system register functional unit instruction",
- "1st single cycle integer functional unit instruction",
- "2nd single cycle integer functional unit instruction",
- "multiple cycle integer functional unit instruction",
- "floating point functional unit instruction",
- "load/store functional unit instruction",
- "branch functional unit instruction",
- };
-
- static const char *const ppc_branch_conditional_name[32] = {
- "branch if --CTR != 0 and condition is FALSE", /* 0000y */
- "branch if --CTR != 0 and condition is FALSE, reverse branch likely",
- "branch if --CTR == 0 and condition is FALSE", /* 0001y */
- "branch if --CTR == 0 and condition is FALSE, reverse branch likely",
- "branch if the condition is FALSE", /* 001zy */
- "branch if the condition is FALSE, reverse branch likely",
- "branch if the condition is FALSE (ignored bit 1 set to 1)", /* 001zy */
- "branch if the condition is FALSE, reverse branch likely (ignored bit 4 set to 1)",
- "branch if --CTR != 0 and condition is TRUE", /* 0100y */
- "branch if --CTR != 0 and condition is TRUE, reverse branch likely",
- "branch if --CTR == 0 and condition is TRUE", /* 0101y */
- "branch if --CTR == 0 and condition is TRUE, reverse branch likely",
- "branch if the condition is TRUE", /* 011zy */
- "branch if the condition is TRUE, reverse branch likely",
- "branch if the condition is TRUE (ignored bit 1 set to 1)", /* 011zy */
- "branch if the condition is TRUE, reverse branch likely (ignored bit 4 set to 1)",
- "branch if --CTR != 0", /* 1z00y */
- "branch if --CTR != 0, reverse branch likely",
- "branch if --CTR == 0", /* 1z01y */
- "branch if --CTR == 0, reverse branch likely",
- "branch always", /* 1z1zz */
- "branch always (ignored bit 5 set to 1)",
- "branch always (ignored bit 4 set to 1)", /* 1z1zz */
- "branch always (ignored bits 4,5 set to 1)",
- "branch if --CTR != 0 (ignored bit 1 set to 1)", /* 1z00y */
- "branch if --CTR != 0, reverse branch likely (ignored bit 1 set to 1)",
- "branch if --CTR == 0 (ignored bit 1 set to 1)", /* 1z01y */
- "branch if --CTR == 0, reverse branch likely (ignored bit 1 set to 1)",
- "branch always (ignored bit 1 set to 1)", /* 1z1zz */
- "branch always (ignored bits 1,5 set to 1)",
- "branch always (ignored bits 1,4 set to 1)", /* 1z1zz */
- "branch always (ignored bits 1,4,5 set to 1)",
- };
-
- static const char *const ppc_nr_mtcrf_crs[9] = {
- "mtcrf moving 0 CRs",
- "mtcrf moving 1 CR",
- "mtcrf moving 2 CRs",
- "mtcrf moving 3 CRs",
- "mtcrf moving 4 CRs",
- "mtcrf moving 5 CRs",
- "mtcrf moving 6 CRs",
- "mtcrf moving 7 CRs",
- "mtcrf moving all CRs",
- };
-
-# Trace releasing resources
-void::model-static::model_trace_release:model_data *model_ptr, model_busy *busy
- int i;
- TRACE(trace_model,("done, %s, %d writeback%s\n", ppc_function_unit_name[busy->unit],
- busy->nr_writebacks, busy->nr_writebacks == 1 ? "" : "s"));
- if (busy->int_busy) {
- for(i = 0; i < 32; i++) {
- if (((1 << i) & busy->int_busy) != 0) {
- TRACE(trace_model, ("Register r%d is now available.\n", i));
- }
- }
- }
- if (busy->fp_busy) {
- for(i = 0; i < 32; i++) {
- if (((1 << i) & busy->fp_busy) != 0) {
- TRACE(trace_model, ("Register f%d is now available.\n", i));
- }
- }
- }
- if (busy->cr_fpscr_busy) {
- for(i = 0; i < 8; i++) {
- if (((1 << i) & busy->cr_fpscr_busy) != 0) {
- TRACE(trace_model, ("Register cr%d is now available.\n", i));
- }
- }
- if (busy->cr_fpscr_busy & 0x100)
- TRACE(trace_model, ("Register fpscr is now available.\n"));
- }
- if (busy->spr_busy != PPC_NO_SPR)
- TRACE(trace_model, ("Register %s is now available.\n", spr_name(busy->spr_busy)));
-
-# Trace making registers busy
-void::model-static::model_trace_make_busy:model_data *model_ptr, unsigned32 int_mask, unsigned32 fp_mask, unsigned32 cr_mask
- int i;
- if (int_mask) {
- for(i = 0; i < 32; i++) {
- if (((1 << i) & int_mask) != 0) {
- TRACE(trace_model, ("Register r%d is now busy.\n", i));
- }
- }
- }
- if (fp_mask) {
- for(i = 0; i < 32; i++) {
- if (((1 << i) & fp_mask) != 0) {
- TRACE(trace_model, ("Register f%d is now busy.\n", i));
- }
- }
- }
- if (cr_mask) {
- for(i = 0; i < 8; i++) {
- if (((1 << i) & cr_mask) != 0) {
- TRACE(trace_model, ("Register cr%d is now busy.\n", i));
- }
- }
- }
-
-# Trace waiting for registers to become available
-void::model-static::model_trace_busy_p:model_data *model_ptr, unsigned32 int_busy, unsigned32 fp_busy, unsigned32 cr_or_fpscr_busy, int spr_busy
- int i;
- if (int_busy) {
- int_busy &= model_ptr->int_busy;
- for(i = 0; i < 32; i++) {
- if (((1 << i) & int_busy) != 0) {
- TRACE(trace_model, ("Waiting for register r%d.\n", i));
- }
- }
- }
- if (fp_busy) {
- fp_busy &= model_ptr->fp_busy;
- for(i = 0; i < 32; i++) {
- if (((1 << i) & fp_busy) != 0) {
- TRACE(trace_model, ("Waiting for register f%d.\n", i));
- }
- }
- }
- if (cr_or_fpscr_busy) {
- cr_or_fpscr_busy &= model_ptr->cr_fpscr_busy;
- for(i = 0; i < 8; i++) {
- if (((1 << i) & cr_or_fpscr_busy) != 0) {
- TRACE(trace_model, ("Waiting for register cr%d.\n", i));
- }
- }
- if (cr_or_fpscr_busy & 0x100)
- TRACE(trace_model, ("Waiting for register fpscr.\n"));
- }
- if (spr_busy != PPC_NO_SPR && model_ptr->spr_busy[spr_busy])
- TRACE(trace_model, ("Waiting for register %s.\n", spr_name(spr_busy)));
-
-# Advance state to next cycle, releasing any registers allocated
-void::model-internal::model_new_cycle:model_data *model_ptr
- model_busy *cur_busy = model_ptr->busy_head.next;
- model_busy *free_list = model_ptr->free_list;
- model_busy *busy_tail = &model_ptr->busy_head;
- int nr_writebacks = model_ptr->max_nr_writebacks;
- model_busy *next;
-
- model_ptr->nr_cycles++;
- TRACE(trace_model,("New cycle %lu\n", (unsigned long)model_ptr->nr_cycles));
- for ( ; cur_busy; cur_busy = next) {
- next = cur_busy->next;
- if (--cur_busy->done <= 0) { /* function unit done, release registers if we have writeback slots */
- nr_writebacks -= cur_busy->nr_writebacks;
- if (nr_writebacks >= 0) {
- model_ptr->int_busy &= ~cur_busy->int_busy;
- model_ptr->fp_busy &= ~cur_busy->fp_busy;
- model_ptr->cr_fpscr_busy &= ~cur_busy->cr_fpscr_busy;
- if (cur_busy->spr_busy != PPC_NO_SPR)
- model_ptr->spr_busy[cur_busy->spr_busy] = 0;
-
- if (WITH_TRACE && ppc_trace[trace_model])
- model_trace_release(model_ptr, cur_busy);
-
- model_ptr->busy[cur_busy->unit] = 0;
- cur_busy->next = free_list;
- free_list = cur_busy;
- }
- else { /* writeback slots not available */
- TRACE(trace_model,("%d writeback slot%s not available for %s\n",
- cur_busy->nr_writebacks,
- cur_busy->nr_writebacks == 1 ? " is" : "s are",
- ppc_function_unit_name[cur_busy->unit]));
- cur_busy->done++; /* undo -- above */
- model_ptr->nr_stalls_writeback++;
- busy_tail->next = cur_busy;
- busy_tail = cur_busy;
- }
- }
- else if (--cur_busy->issue <= 0) { /* function unit pipelined, allow new use */
- TRACE(trace_model,("pipeline, %s ready for next client\n", ppc_function_unit_name[cur_busy->unit]));
- model_ptr->busy[cur_busy->unit] = 0;
- busy_tail->next = cur_busy;
- busy_tail = cur_busy;
- }
- else {
- TRACE(trace_model,("%s still working, issue = %d, done = %d\n",
- ppc_function_unit_name[cur_busy->unit],
- cur_busy->issue,
- cur_busy->done));
- busy_tail->next = cur_busy;
- busy_tail = cur_busy;
- }
- }
-
- busy_tail->next = (model_busy *)0;
- model_ptr->busy_tail = busy_tail;
- model_ptr->free_list = free_list;
-
-# Mark a function unit as busy, return the busy structure
-model_busy *::model-internal::model_make_busy:model_data *model_ptr, ppc_function_unit unit, int issue, int done
- model_busy *busy;
-
- TRACE(trace_model,("unit = %s, issue = %d, done = %d\n", ppc_function_unit_name[unit], issue, done));
-
- if (!model_ptr->free_list) {
- busy = ZALLOC(model_busy);
- }
- else {
- busy = model_ptr->free_list;
- model_ptr->free_list = busy->next;
- busy->next = (model_busy *)0;
- busy->int_busy = 0;
- busy->fp_busy = 0;
- busy->cr_fpscr_busy = 0;
- busy->nr_writebacks = 0;
- }
-
- busy->unit = unit;
- busy->issue = issue;
- busy->done = done;
- busy->spr_busy = PPC_NO_SPR;
- model_ptr->busy_tail->next = busy;
- model_ptr->busy_tail = busy;
- model_ptr->busy[unit] = 1;
- model_ptr->nr_units[unit]++;
- return busy;
-
-# Wait until a function unit is non-busy, and then allocate a busy pointer & return the pointer
-model_busy *::model-internal::model_wait_for_unit:itable_index index, model_data *const model_ptr, const model_time *const time_ptr
- ppc_function_unit first_unit = time_ptr->first_unit;
- ppc_function_unit second_unit = time_ptr->second_unit;
- int stall_increment = 0;
-
- for (;;) {
- if (!model_ptr->busy[first_unit])
- return model_make_busy(model_ptr, first_unit,
- model_ptr->timing[index].issue,
- model_ptr->timing[index].done);
-
- if (!model_ptr->busy[second_unit])
- return model_make_busy(model_ptr, second_unit,
- model_ptr->timing[index].issue,
- model_ptr->timing[index].done);
-
- TRACE(trace_model,("all function units are busy for %s\n", itable[index].name));
- model_ptr->nr_stalls_unit += stall_increment; /* don't count first stall */
- stall_increment = 1;
- model_new_cycle(model_ptr);
- }
-
-# Serialize the processor, waiting for all instructions to drain out before adding an instruction.
-void::model-function::model_serialize:itable_index index, model_data *model_ptr
- while (model_ptr->busy_head.next) {
- TRACE(trace_model,("waiting for pipeline to empty\n"));
- model_ptr->nr_stalls_serialize++;
- model_new_cycle(model_ptr);
- }
- (void) model_make_busy(model_ptr,
- model_ptr->timing[index].first_unit,
- model_ptr->timing[index].issue,
- model_ptr->timing[index].done);
-
-# Wait for a CR to become unbusy
-void::model-function::model_wait_for_cr:model_data *model_ptr, unsigned CRBIT
- unsigned u;
- unsigned32 cr_mask;
- int cr_var = 0;
- for (u = 0xc0000000; (u != 0) && (CRBIT & u) == 0; u >>= 4 )
- cr_var++;
-
- cr_mask = (1 << cr_var);
- while ((model_ptr->cr_fpscr_busy & cr_mask) != 0) {
- TRACE(trace_model,("waiting for CR %d\n", cr_var));
- model_ptr->nr_stalls_data++;
- model_new_cycle(model_ptr);
- }
-
-# Schedule an instruction that takes integer input registers and produces output registers
-void::model-function::ppc_insn_int:itable_index index, model_data *model_ptr, const unsigned32 out_mask, const unsigned32 in_mask
- const unsigned32 int_mask = out_mask | in_mask;
- model_busy *busy_ptr;
-
- if ((model_ptr->int_busy & int_mask) != 0) {
- model_new_cycle(model_ptr); /* don't count first dependency as a stall */
-
- while ((model_ptr->int_busy & int_mask) != 0) {
- if (WITH_TRACE && ppc_trace[trace_model])
- model_trace_busy_p(model_ptr, int_mask, 0, 0, PPC_NO_SPR);
-
- model_ptr->nr_stalls_data++;
- model_new_cycle(model_ptr);
- }
- }
-
- busy_ptr = model_wait_for_unit(index, model_ptr, &model_ptr->timing[index]);
- model_ptr->int_busy |= out_mask;
- busy_ptr->int_busy |= out_mask;
- if (out_mask)
- busy_ptr->nr_writebacks = (PPC_ONE_BIT_SET_P(out_mask)) ? 1 : 2;
-
- if (WITH_TRACE && ppc_trace[trace_model])
- model_trace_make_busy(model_ptr, out_mask, 0, 0);
-
-# Schedule an instruction that takes integer input registers and produces output registers & sets a CR register
-void::model-function::ppc_insn_int_cr:itable_index index, model_data *model_ptr, const unsigned32 out_mask, const unsigned32 in_mask, const unsigned32 cr_mask
- const unsigned32 int_mask = out_mask | in_mask;
- model_busy *busy_ptr;
-
- if ((model_ptr->int_busy & int_mask) || (model_ptr->cr_fpscr_busy & cr_mask)) {
- model_new_cycle(model_ptr); /* don't count first dependency as a stall */
-
- while ((model_ptr->int_busy & int_mask) || (model_ptr->cr_fpscr_busy & cr_mask)) {
- if (WITH_TRACE && ppc_trace[trace_model])
- model_trace_busy_p(model_ptr, int_mask, 0, cr_mask, PPC_NO_SPR);
-
- model_ptr->nr_stalls_data++;
- model_new_cycle(model_ptr);
- }
- }
-
- busy_ptr = model_wait_for_unit(index, model_ptr, &model_ptr->timing[index]);
- model_ptr->int_busy |= out_mask;
- busy_ptr->int_busy |= out_mask;
- model_ptr->cr_fpscr_busy |= cr_mask;
- busy_ptr->cr_fpscr_busy |= cr_mask;
- if (out_mask)
- busy_ptr->nr_writebacks = (PPC_ONE_BIT_SET_P(out_mask)) ? 1 : 2;
-
- if (cr_mask)
- busy_ptr->nr_writebacks++;
-
- if (WITH_TRACE && ppc_trace[trace_model])
- model_trace_make_busy(model_ptr, out_mask, 0, cr_mask);
-
-
-# Schedule an instruction that takes CR input registers and produces output CR registers
-void::model-function::ppc_insn_cr:itable_index index, model_data *model_ptr, const unsigned32 out_mask, const unsigned32 in_mask
- const unsigned32 cr_mask = out_mask | in_mask;
- model_busy *busy_ptr;
-
- if ((model_ptr->cr_fpscr_busy & cr_mask) != 0) {
- model_new_cycle(model_ptr); /* don't count first dependency as a stall */
-
- while ((model_ptr->cr_fpscr_busy & cr_mask) != 0) {
- if (WITH_TRACE && ppc_trace[trace_model])
- model_trace_busy_p(model_ptr, 0, 0, cr_mask, PPC_NO_SPR);
-
- model_ptr->nr_stalls_data++;
- model_new_cycle(model_ptr);
- }
- }
-
- busy_ptr = model_wait_for_unit(index, model_ptr, &model_ptr->timing[index]);
- model_ptr->cr_fpscr_busy |= out_mask;
- busy_ptr->cr_fpscr_busy |= out_mask;
- if (out_mask)
- busy_ptr->nr_writebacks = 1;
-
- if (WITH_TRACE && ppc_trace[trace_model])
- model_trace_make_busy(model_ptr, 0, 0, out_mask);
-
-
-# Schedule an instruction that takes floating point input registers and produces an output fp register
-void::model-function::ppc_insn_float:itable_index index, model_data *model_ptr, const unsigned32 out_mask, const unsigned32 in_mask
- const unsigned32 fp_mask = out_mask | in_mask;
- model_busy *busy_ptr;
-
- if ((model_ptr->fp_busy & fp_mask) != 0) {
- model_new_cycle(model_ptr); /* don't count first dependency as a stall */
-
- while ((model_ptr->fp_busy & fp_mask) != 0) {
- if (WITH_TRACE && ppc_trace[trace_model])
- model_trace_busy_p(model_ptr, 0, fp_mask, 0, PPC_NO_SPR);
-
- model_ptr->nr_stalls_data++;
- model_new_cycle(model_ptr);
- }
- }
-
- busy_ptr = model_wait_for_unit(index, model_ptr, &model_ptr->timing[index]);
- model_ptr->fp_busy |= out_mask;
- busy_ptr->fp_busy |= out_mask;
- busy_ptr->nr_writebacks = 1;
- if (WITH_TRACE && ppc_trace[trace_model])
- model_trace_make_busy(model_ptr, 0, out_mask, 0);
-
-
-# Schedule an instruction that takes floating point input registers and produces an output fp register & sets a CR reg
-void::model-function::ppc_insn_float_cr:itable_index index, model_data *model_ptr, const unsigned32 out_mask, const unsigned32 in_mask, const unsigned32 cr_mask
- const unsigned32 fp_mask = out_mask | in_mask;
- model_busy *busy_ptr;
-
- if ((model_ptr->fp_busy & fp_mask) || (model_ptr->cr_fpscr_busy & cr_mask)) {
- model_new_cycle(model_ptr); /* don't count first dependency as a stall */
-
- while ((model_ptr->fp_busy & fp_mask) || (model_ptr->cr_fpscr_busy & cr_mask)) {
- if (WITH_TRACE && ppc_trace[trace_model])
- model_trace_busy_p(model_ptr, 0, fp_mask, cr_mask, PPC_NO_SPR);
-
- model_ptr->nr_stalls_data++;
- model_new_cycle(model_ptr);
- }
- }
-
- busy_ptr = model_wait_for_unit(index, model_ptr, &model_ptr->timing[index]);
- model_ptr->fp_busy |= out_mask;
- busy_ptr->fp_busy |= out_mask;
- model_ptr->cr_fpscr_busy |= cr_mask;
- busy_ptr->cr_fpscr_busy |= cr_mask;
- busy_ptr->nr_writebacks = (cr_mask) ? 2 : 1;
- if (WITH_TRACE && ppc_trace[trace_model])
- model_trace_make_busy(model_ptr, 0, out_mask, cr_mask);
-
-
-# Schedule an instruction that takes both int/float input registers and produces output int/float registers
-void::model-function::ppc_insn_int_float:itable_index index, model_data *model_ptr, const unsigned32 out_int_mask, const unsigned32 out_fp_mask, const unsigned32 in_int_mask, const unsigned32 in_fp_mask
- const unsigned32 int_mask = out_int_mask | in_int_mask;
- const unsigned32 fp_mask = out_fp_mask | in_fp_mask;
- model_busy *busy_ptr;
-
- if ((model_ptr->int_busy & int_mask) || (model_ptr->fp_busy & fp_mask)) {
- model_new_cycle(model_ptr); /* don't count first dependency as a stall */
-
- while ((model_ptr->int_busy & int_mask) || (model_ptr->fp_busy & fp_mask)) {
- if (WITH_TRACE && ppc_trace[trace_model])
- model_trace_busy_p(model_ptr, int_mask, fp_mask, 0, PPC_NO_SPR);
-
- model_ptr->nr_stalls_data++;
- model_new_cycle(model_ptr);
- }
-
- busy_ptr = model_wait_for_unit(index, model_ptr, &model_ptr->timing[index]);
- model_ptr->int_busy |= out_int_mask;
- busy_ptr->int_busy |= out_int_mask;
- model_ptr->fp_busy |= out_fp_mask;
- busy_ptr->fp_busy |= out_fp_mask;
- busy_ptr->nr_writebacks = ((out_int_mask) ? 1 : 0) + ((out_fp_mask) ? 1 : 0);
- if (WITH_TRACE && ppc_trace[trace_model])
- model_trace_make_busy(model_ptr, out_int_mask, out_fp_mask, 0);
- return;
- }
-
-# Schedule an MFSPR instruction that takes 1 special purpose register and produces an integer output register
-void::model-function::ppc_insn_from_spr:itable_index index, model_data *model_ptr, const unsigned32 int_mask, const unsigned nSPR
- model_busy *busy_ptr;
-
- while ((model_ptr->int_busy & int_mask) != 0 || model_ptr->spr_busy[nSPR] != 0) {
- if (WITH_TRACE && ppc_trace[trace_model])
- model_trace_busy_p(model_ptr, int_mask, 0, 0, nSPR);
-
- model_ptr->nr_stalls_data++;
- model_new_cycle(model_ptr);
- }
-
- busy_ptr = model_wait_for_unit(index, model_ptr, &model_ptr->timing[index]);
- model_ptr->int_busy |= int_mask;
- busy_ptr->int_busy |= int_mask;
- busy_ptr->nr_writebacks = 1;
- if (WITH_TRACE && ppc_trace[trace_model])
- model_trace_make_busy(model_ptr, int_mask, 0, 0);
-
-# Schedule an MTSPR instruction that takes 1 integer register and produces a special purpose output register
-void::model-function::ppc_insn_to_spr:itable_index index, model_data *model_ptr, const unsigned32 int_mask, const unsigned nSPR
- model_busy *busy_ptr;
-
- while ((model_ptr->int_busy & int_mask) != 0 || model_ptr->spr_busy[nSPR] != 0) {
- if (WITH_TRACE && ppc_trace[trace_model])
- model_trace_busy_p(model_ptr, int_mask, 0, 0, nSPR);
-
- model_ptr->nr_stalls_data++;
- model_new_cycle(model_ptr);
- }
-
- busy_ptr = model_wait_for_unit(index, model_ptr, &model_ptr->timing[index]);
- busy_ptr->spr_busy = nSPR;
- model_ptr->spr_busy[nSPR] = 1;
- busy_ptr->nr_writebacks = 1;
- TRACE(trace_model,("Making register %s busy.\n", spr_name(nSPR)));
-
-# Schedule a MFCR instruction that moves the CR into an integer regsiter
-void::model-function::ppc_insn_mfcr:itable_index index, model_data *model_ptr, unsigned32 int_mask
- const unsigned32 cr_mask = 0xff;
- model_busy *busy_ptr;
-
- while (((model_ptr->int_busy & int_mask) | (model_ptr->cr_fpscr_busy & cr_mask)) != 0) {
- if (WITH_TRACE && ppc_trace[trace_model])
- model_trace_busy_p(model_ptr, int_mask, 0, cr_mask, PPC_NO_SPR);
-
- model_ptr->nr_stalls_data++;
- model_new_cycle(model_ptr);
- }
-
- busy_ptr = model_wait_for_unit(index, model_ptr, &model_ptr->timing[index]);
- model_ptr->int_busy |= int_mask;
- busy_ptr->int_busy |= int_mask;
- busy_ptr->nr_writebacks = 1;
- if (WITH_TRACE && ppc_trace[trace_model])
- model_trace_make_busy(model_ptr, int_mask, 0, 0);
-
-# Schedule a MTCR instruction that moves an integer register into the CR
-void::model-function::ppc_insn_mtcr:itable_index index, model_data *model_ptr, unsigned32 int_mask, unsigned FXM
- int f;
- int nr_crs = 0;
- unsigned32 cr_mask = 0;
- const model_time *normal_time = &model_ptr->timing[index];
- static const model_time ppc604_1bit_time = { PPC_UNIT_SCIU1, PPC_UNIT_SCIU2, 1, 1, 0 };
- model_busy *busy_ptr;
-
- for (f = 0; f < 8; f++) {
- if (FXM & (0x80 >> f)) {
- cr_mask |= (1 << f);
- nr_crs++;
- }
- }
-
- while (((model_ptr->int_busy & int_mask) | (model_ptr->cr_fpscr_busy & cr_mask)) != 0) {
- if (WITH_TRACE && ppc_trace[trace_model])
- model_trace_busy_p(model_ptr, int_mask, 0, cr_mask, PPC_NO_SPR);
-
- model_ptr->nr_stalls_data++;
- model_new_cycle(model_ptr);
- }
-
- /* If only one CR is being moved, use the SCIU, not the MCIU on the 604 */
- if (CURRENT_MODEL == MODEL_ppc604 && nr_crs == 1) {
- normal_time = &ppc604_1bit_time;
- }
-
- busy_ptr = model_wait_for_unit(index, model_ptr, normal_time);
- busy_ptr->cr_fpscr_busy |= cr_mask;
- model_ptr->cr_fpscr_busy |= cr_mask;
- model_ptr->nr_mtcrf_crs[nr_crs]++;
- busy_ptr->nr_writebacks = 1;
- if (WITH_TRACE && ppc_trace[trace_model])
- model_trace_make_busy(model_ptr, 0, 0, cr_mask);
-
-model_data *::model-function::model_create:cpu *processor
- model_data *model_ptr = ZALLOC(model_data);
- model_ptr->name = model_name[CURRENT_MODEL];
- model_ptr->timing = model_time_mapping[CURRENT_MODEL];
- model_ptr->processor = processor;
- model_ptr->nr_cycles = 1;
- model_ptr->busy_tail = &model_ptr->busy_head;
- switch (CURRENT_MODEL) {
- case MODEL_ppc601: model_ptr->max_nr_writebacks = 1; break; /* ??? */
- case MODEL_ppc603: model_ptr->max_nr_writebacks = 2; break;
- case MODEL_ppc603e: model_ptr->max_nr_writebacks = 2; break;
- case MODEL_ppc604: model_ptr->max_nr_writebacks = 2; break;
- default: error ("Unknown model %d\n", CURRENT_MODEL);
- }
- return model_ptr;
-
-void::model-function::model_init:model_data *model_ptr
-
-void::model-function::model_halt:model_data *model_ptr
- /* Let pipeline drain */
- while (model_ptr->busy_head.next)
- model_new_cycle(model_ptr);
-
-unsigned_word::model-function::model_get_number_of_stalls:model_data *model_ptr
- return (model_ptr->nr_stalls_data
- + model_ptr->nr_stalls_unit
- + model_ptr->nr_stalls_serialize
- + model_ptr->nr_stalls_writeback);
-
-unsigned_word::model-function::model_get_number_of_cycles:model_data *model_ptr
- return (model_ptr->nr_cycles);
-
-model_print *::model-function::model_mon_info:model_data *model_ptr
- model_print *head;
- model_print *tail;
- ppc_function_unit i;
- count_type nr_insns;
- int j;
-
- head = tail = ZALLOC(model_print);
- tail->count = model_ptr->nr_cycles;
- tail->name = "cycle";
- tail->suffix_plural = "s";
- tail->suffix_singular = "";
-
- if (model_ptr->nr_stalls_data) {
- tail->next = ZALLOC(model_print);
- tail = tail->next;
- tail->count = model_ptr->nr_stalls_data;
- tail->name = "stall";
- tail->suffix_plural = "s waiting for data";
- tail->suffix_singular = " waiting for data";
- }
-
- if (model_ptr->nr_stalls_unit) {
- tail->next = ZALLOC(model_print);
- tail = tail->next;
- tail->count = model_ptr->nr_stalls_unit;
- tail->name = "stall";
- tail->suffix_plural = "s waiting for a function unit";
- tail->suffix_singular = " waiting for a function unit";
- }
-
- if (model_ptr->nr_stalls_serialize) {
- tail->next = ZALLOC(model_print);
- tail = tail->next;
- tail->count = model_ptr->nr_stalls_serialize;
- tail->name = "stall";
- tail->suffix_plural = "s waiting for serialization";
- tail->suffix_singular = " waiting for serialization";
- }
-
- if (model_ptr->nr_stalls_writeback) {
- tail->next = ZALLOC(model_print);
- tail = tail->next;
- tail->count = model_ptr->nr_stalls_writeback;
- tail->name = "";
- tail->suffix_plural = "times a write-back slot was unavailable";
- tail->suffix_singular = "time a writeback was unavailable";
- }
-
- if (model_ptr->nr_branches) {
- tail->next = ZALLOC(model_print);
- tail = tail->next;
- tail->count = model_ptr->nr_branches;
- tail->name = "branch";
- tail->suffix_plural = "es";
- tail->suffix_singular = "";
- }
-
- if (model_ptr->nr_branches_fallthrough) {
- tail->next = ZALLOC(model_print);
- tail = tail->next;
- tail->count = model_ptr->nr_branches_fallthrough;
- tail->name = "conditional branch";
- tail->suffix_plural = "es fell through";
- tail->suffix_singular = " fell through";
- }
-
- if (model_ptr->nr_branch_predict_trues) {
- tail->next = ZALLOC(model_print);
- tail = tail->next;
- tail->count = model_ptr->nr_branch_predict_trues;
- tail->name = "successful branch prediction";
- tail->suffix_plural = "s";
- tail->suffix_singular = "";
- }
-
- if (model_ptr->nr_branch_predict_falses) {
- tail->next = ZALLOC(model_print);
- tail = tail->next;
- tail->count = model_ptr->nr_branch_predict_falses;
- tail->name = "unsuccessful branch prediction";
- tail->suffix_plural = "s";
- tail->suffix_singular = "";
- }
-
- for (j = 0; j < (sizeof(ppc_branch_conditional_name) / sizeof(ppc_branch_conditional_name[0])) ; j++) {
- if (model_ptr->nr_branch_conditional[j]) {
- tail->next = ZALLOC(model_print);
- tail = tail->next;
- tail->count = model_ptr->nr_branch_conditional[j];
- tail->name = ppc_branch_conditional_name[j];
- tail->suffix_plural = " conditional branches";
- tail->suffix_singular = " conditional branch";
- }
- }
-
- for (j = 0; j < 9; j++) {
- if (model_ptr->nr_mtcrf_crs[j]) {
- tail->next = ZALLOC(model_print);
- tail = tail->next;
- tail->count = model_ptr->nr_mtcrf_crs[j];
- tail->name = ppc_nr_mtcrf_crs[j];
- tail->suffix_plural = " instructions";
- tail->suffix_singular = " instruction";
- }
- }
-
- nr_insns = 0;
- for (i = PPC_UNIT_BAD; i < nr_ppc_function_units; i++) {
- if (model_ptr->nr_units[i]) {
- nr_insns += model_ptr->nr_units[i];
- tail->next = ZALLOC(model_print);
- tail = tail->next;
- tail->count = model_ptr->nr_units[i];
- tail->name = ppc_function_unit_name[i];
- tail->suffix_plural = "s";
- tail->suffix_singular = "";
- }
- }
-
- tail->next = ZALLOC(model_print);
- tail = tail->next;
- tail->count = nr_insns;
- tail->name = "instruction";
- tail->suffix_plural = "s that were accounted for in timing info";
- tail->suffix_singular = " that was accounted for in timing info";
-
- tail->next = (model_print *)0;
- return head;
-
-void::model-function::model_mon_info_free:model_data *model_ptr, model_print *ptr
- while (ptr) {
- model_print *next = ptr->next;
- free((void *)ptr);
- ptr = next;
- }
-
-void::model-function::model_branches:model_data *model_ptr, int failed, int conditional
- model_ptr->nr_units[PPC_UNIT_BPU]++;
- if (failed)
- model_ptr->nr_branches_fallthrough++;
- else
- model_ptr->nr_branches++;
- if (conditional >= 0)
- model_ptr->nr_branch_conditional[conditional]++;
- model_new_cycle(model_ptr); /* A branch always ends the current cycle */
-
-void::model-function::model_branch_predict:model_data *model_ptr, int success
- if (success)
- model_ptr->nr_branch_predict_trues++;
- else
- model_ptr->nr_branch_predict_falses++;
-
-
-# The following (illegal) instruction is `known' by gen and is
-# called when ever an illegal instruction is encountered
-::internal::illegal
- program_interrupt(processor, cia,
- illegal_instruction_program_interrupt);
-
-
-# The following (floating point unavailable) instruction is `known' by gen
-# and is called when ever an a floating point instruction is to be
-# executed but floating point is make unavailable by the MSR
-::internal::floating_point_unavailable
- floating_point_unavailable_interrupt(processor, cia);
-
-
-#
-# Floating point support functions
-#
-
-# Convert 32bit single to 64bit double
-unsigned64::function::DOUBLE:unsigned32 WORD
- unsigned64 FRT;
- if (EXTRACTED32(WORD, 1, 8) > 0
- && EXTRACTED32(WORD, 1, 8) < 255) {
- /* normalized operand */
- int not_word_1_1 = !EXTRACTED32(WORD, 1, 1); /*2.6.3 bug*/
- FRT = (INSERTED64(EXTRACTED32(WORD, 0, 1), 0, 1)
- | INSERTED64(not_word_1_1, 2, 2)
- | INSERTED64(not_word_1_1, 3, 3)
- | INSERTED64(not_word_1_1, 4, 4)
- | INSERTED64(EXTRACTED32(WORD, 2, 31), 5, (63 - 29)));
- }
- else if (EXTRACTED32(WORD, 1, 8) == 0
- && EXTRACTED32(WORD, 9, 31) != 0) {
- /* denormalized operand */
- int sign = EXTRACTED32(WORD, 0, 0);
- int exp = -126;
- unsigned64 frac = INSERTED64(EXTRACTED32(WORD, 9, 31), 1, (52 - 29));
- /* normalize the operand */
- while (MASKED64(frac, 0, 0) == 0) {
- frac <<= 1;
- exp -= 1;
- }
- FRT = (INSERTED64(sign, 0, 0)
- | INSERTED64(exp + 1023, 1, 11)
- | INSERTED64(EXTRACTED64(frac, 1, 52), 12, 63));
- }
- else if (EXTRACTED32(WORD, 1, 8) == 255
- || EXTRACTED32(WORD, 1, 31) == 0) {
- FRT = (INSERTED64(EXTRACTED32(WORD, 0, 1), 0, 1)
- | INSERTED64(EXTRACTED32(WORD, 1, 1), 2, 2)
- | INSERTED64(EXTRACTED32(WORD, 1, 1), 3, 3)
- | INSERTED64(EXTRACTED32(WORD, 1, 1), 4, 4)
- | INSERTED64(EXTRACTED32(WORD, 2, 31), 5, (63 - 29)));
- }
- else {
- error("DOUBLE - unknown case\n");
- FRT = 0;
- }
- return FRT;
-
-# Convert 64bit single to 32bit double
-unsigned32::function::SINGLE:unsigned64 FRS
- unsigned32 WORD;
- if (EXTRACTED64(FRS, 1, 11) > 896
- || EXTRACTED64(FRS, 1, 63) == 0) {
- /* no denormalization required (includes Zero/Infinity/NaN) */
- WORD = (INSERTED32(EXTRACTED64(FRS, 0, 1), 0, 1)
- | INSERTED32(EXTRACTED64(FRS, 5, 34), 2, 31));
- }
- else if (874 <= EXTRACTED64(FRS, 1, 11)
- && EXTRACTED64(FRS, 1, 11) <= 896) {
- /* denormalization required */
- int sign = EXTRACTED64(FRS, 0, 0);
- int exp = EXTRACTED64(FRS, 1, 11) - 1023;
- unsigned64 frac = (BIT64(0)
- | INSERTED64(EXTRACTED64(FRS, 12, 63), 1, 52));
- /* denormalize the operand */
- while (exp < -126) {
- frac = INSERTED64(EXTRACTED64(frac, 0, 62), 1, 63);
- exp += 1;
- }
- WORD = (INSERTED32(sign, 0, 0)
- | INSERTED32(0x00, 1, 8)
- | INSERTED32(EXTRACTED64(frac, 1, 23), 9, 31));
- }
- else {
- WORD = 0x0; /* ??? */
- }
- return WORD;
-
-
-# round 64bit double to 64bit but single
-void::function::Round_Single:cpu *processor, int sign, int *exp, unsigned64 *frac_grx
- /* comparisons ignore u bits */
- unsigned64 out;
- int inc = 0;
- int lsb = EXTRACTED64(*frac_grx, 23, 23);
- int gbit = EXTRACTED64(*frac_grx, 24, 24);
- int rbit = EXTRACTED64(*frac_grx, 25, 25);
- int xbit = EXTRACTED64(*frac_grx, 26, 55) != 0;
- if ((FPSCR & fpscr_rn) == fpscr_rn_round_to_nearest) {
- if (lsb == 1 && gbit == 1) inc = 1;
- if (lsb == 0 && gbit == 1 && rbit == 1) inc = 1;
- if (lsb == 0 && gbit == 1 && xbit == 1) inc = 1;
- }
- if ((FPSCR & fpscr_rn) == fpscr_rn_round_towards_pos_infinity) {
- if (sign == 0 && gbit == 1) inc = 1;
- if (sign == 0 && rbit == 1) inc = 1;
- if (sign == 0 && xbit == 1) inc = 1;
- }
- if ((FPSCR & fpscr_rn) == fpscr_rn_round_towards_neg_infinity) {
- if (sign == 1 && gbit == 1) inc = 1;
- if (sign == 1 && rbit == 1) inc = 1;
- if (sign == 1 && xbit == 1) inc = 1;
- }
- /* work out addition in low 25 bits of out */
- out = EXTRACTED64(*frac_grx, 0, 23) + inc;
- *frac_grx = INSERTED64(out, 0, 23);
- if (out & BIT64(64 - 23 - 1 - 1)) {
- *frac_grx = (BIT64(0) |
- INSERTED64(EXTRACTED64(*frac_grx, 0, 22), 1, 23));
- *exp = *exp + 1;
- }
- /* frac_grx[24:52] = 0 already */
- FPSCR_SET_FR(inc);
- FPSCR_SET_FI(gbit || rbit || xbit);
-
-
-#
-void::function::Round_Integer:cpu *processor, int sign, unsigned64 *frac, int *frac64, int gbit, int rbit, int xbit, fpscreg round_mode
- int inc = 0;
- if (round_mode == fpscr_rn_round_to_nearest) {
- if (*frac64 == 1 && gbit == 1) inc = 1;
- if (*frac64 == 0 && gbit == 1 && rbit == 1) inc = 1;
- if (*frac64 == 0 && gbit == 1 && xbit == 1) inc = 1;
- }
- if (round_mode == fpscr_rn_round_towards_pos_infinity) {
- if (sign == 0 && gbit == 1) inc = 1;
- if (sign == 0 && rbit == 1) inc = 1;
- if (sign == 0 && xbit == 1) inc = 1;
- }
- if (round_mode == fpscr_rn_round_towards_neg_infinity) {
- if (sign == 1 && gbit == 1) inc = 1;
- if (sign == 1 && rbit == 1) inc = 1;
- if (sign == 1 && xbit == 1) inc = 1;
- }
- /* frac[0:64] = frac[0:64} + inc */
- *frac += (*frac64 && inc ? 1 : 0);
- *frac64 = (*frac64 + inc) & 0x1;
- FPSCR_SET_FR(inc);
- FPSCR_SET_FI(gbit | rbit | xbit);
-
-
-void::function::Round_Float:cpu *processor, int sign, int *exp, unsigned64 *frac, fpscreg round_mode
- int carry_out;
- int inc = 0;
- int lsb = EXTRACTED64(*frac, 52, 52);
- int gbit = EXTRACTED64(*frac, 53, 53);
- int rbit = EXTRACTED64(*frac, 54, 54);
- int xbit = EXTRACTED64(*frac, 55, 55);
- if (round_mode == fpscr_rn_round_to_nearest) {
- if (lsb == 1 && gbit == 1) inc = 1;
- if (lsb == 0 && gbit == 1 && rbit == 1) inc = 1;
- if (lsb == 0 && gbit == 1 && xbit == 1) inc = 1;
- }
- if (round_mode == fpscr_rn_round_towards_pos_infinity) {
- if (sign == 0 && gbit == 1) inc = 1;
- if (sign == 0 && rbit == 1) inc = 1;
- if (sign == 0 && xbit == 1) inc = 1;
- }
- if (round_mode == fpscr_rn_round_towards_neg_infinity) {
- if (sign == 1 && gbit == 1) inc = 1;
- if (sign == 1 && rbit == 1) inc = 1;
- if (sign == 1 && xbit == 1) inc = 1;
- }
- /* frac//carry_out = frac + inc */
- *frac = (*frac >> 1) + (INSERTED64(inc, 52, 52) >> 1);
- carry_out = EXTRACTED64(*frac, 0, 0);
- *frac <<= 1;
- if (carry_out == 1) *exp = *exp + 1;
- FPSCR_SET_FR(inc);
- FPSCR_SET_FI(gbit | rbit | xbit);
- FPSCR_SET_XX(FPSCR & fpscr_fi);
-
-
-# conversion of FP to integer
-void::function::convert_to_integer:cpu *processor, unsigned_word cia, unsigned64 *frt, unsigned64 frb, fpscreg round_mode, int tgt_precision
- int i;
- int exp = 0;
- unsigned64 frac = 0;
- int frac64 = 0;
- int gbit = 0;
- int rbit = 0;
- int xbit = 0;
- int sign = EXTRACTED64(frb, 0, 0);
- /***/
- if (EXTRACTED64(frb, 1, 11) == 2047 && EXTRACTED64(frb, 12, 63) == 0)
- GOTO(Infinity_Operand);
- if (EXTRACTED64(frb, 1, 11) == 2047 && EXTRACTED64(frb, 12, 12) == 0)
- GOTO(SNaN_Operand);
- if (EXTRACTED64(frb, 1, 11) == 2047 && EXTRACTED64(frb, 12, 12) == 1)
- GOTO(QNaN_Operand);
- if (EXTRACTED64(frb, 1, 11) > 1086) GOTO(Large_Operand);
- if (EXTRACTED64(frb, 1, 11) > 0) exp = EXTRACTED64(frb, 1, 11) - 1023;
- if (EXTRACTED64(frb, 1, 11) == 0) exp = -1022;
- if (EXTRACTED64(frb, 1, 11) > 0) { /* normal */
- frac = BIT64(1) | INSERTED64(EXTRACTED64(frb, 12, 63), 2, 53);
- frac64 = 0;
- }
- if (EXTRACTED64(frb, 1, 11) == 0) { /* denorm */
- frac = INSERTED64(EXTRACTED64(frb, 12, 63), 2, 53);
- frac64 = 0;
- }
- gbit = 0, rbit = 0, xbit = 0;
- for (i = 1; i <= 63 - exp; i++) {
- xbit = rbit | xbit;
- rbit = gbit;
- gbit = frac64;
- frac64 = EXTRACTED64(frac, 63, 63);
- frac = INSERTED64(EXTRACTED64(frac, 0, 62), 1, 63);
- }
- Round_Integer(processor, sign, &frac, &frac64, gbit, rbit, xbit, round_mode);
- if (sign == 1) { /* frac[0:64] = ~frac[0:64] + 1 */
- frac = ~frac;
- frac64 ^= 1;
- frac += (frac64 ? 1 : 0);
- frac64 = (frac64 + 1) & 0x1;
- }
- if (tgt_precision == 32 /* can ignore frac64 in compare */
- && (signed64)frac > (signed64)MASK64(33+1, 63)/*2^31-1 >>1*/)
- GOTO(Large_Operand);
- if (tgt_precision == 64 /* can ignore frac64 in compare */
- && (signed64)frac > (signed64)MASK64(1+1, 63)/*2^63-1 >>1*/)
- GOTO(Large_Operand);
- if (tgt_precision == 32 /* can ignore frac64 in compare */
- && (signed64)frac < (signed64)MASK64(0, 32+1)/*-2^31 >>1*/)
- GOTO(Large_Operand);
- if (tgt_precision == 64 /* can ignore frac64 in compare */
- && (signed64)frac < (signed64)MASK64(0, 0+1)/*-2^63 >>1*/)
- GOTO(Large_Operand);
- FPSCR_SET_XX(FPSCR & fpscr_fi);
- if (tgt_precision == 32)
- *frt = MASKED64(*frt, 0, 31) | (EXTRACTED64(frac, 33, 63) << 1) | frac64;
- if (tgt_precision == 64)
- *frt = (EXTRACTED64(frac, 1, 63) << 1) | frac64;
- /*FPSCR[fprf] = undefined */
- GOTO(Done);
- /**/
- LABEL(Infinity_Operand):
- FPSCR_SET_FR(0);
- FPSCR_SET_FI(0);
- FPSCR_OR_VX(fpscr_vxcvi);
- if ((FPSCR & fpscr_ve) == 0) {
- if (tgt_precision == 32) {
- if (sign == 0) *frt = MASKED64(*frt, 0, 31) | 0x7FFFFFFF;
- if (sign == 1) *frt = MASKED64(*frt, 0, 31) | 0x80000000;
- }
- else {
- if (sign == 0) *frt = MASK64(1, 63); /*0x7FFF_FFFF_FFFF_FFFF*/
- if (sign == 1) *frt = BIT64(0); /*0x8000_0000_0000_0000*/
- }
- /* FPSCR[FPRF] = undefined */
- }
- GOTO(Done);
- /**/
- LABEL(SNaN_Operand):
- FPSCR_SET_FR(0);
- FPSCR_SET_FI(0);
- FPSCR_OR_VX(fpscr_vxsnan | fpscr_vxcvi);
- if ((FPSCR & fpscr_ve) == 0) {
- if (tgt_precision == 32) *frt = MASKED64(*frt, 0, 31) | 0x80000000;
- if (tgt_precision == 64) *frt = BIT64(0); /*0x8000_0000_0000_0000*/
- /* FPSCR[fprf] = undefined */
- }
- GOTO(Done);
- /**/
- LABEL(QNaN_Operand):
- FPSCR_SET_FR(0);
- FPSCR_SET_FI(0);
- FPSCR_OR_VX(fpscr_vxcvi);
- if ((FPSCR & fpscr_ve) == 0) {
- if (tgt_precision == 32) *frt = MASKED64(*frt, 0, 31) | 0x80000000;
- if (tgt_precision == 64) *frt = BIT64(0);/*0x8000_0000_0000_0000*/
- /* FPSCR[fprf] = undefined */
- }
- GOTO(Done);
- /**/
- LABEL(Large_Operand):
- FPSCR_SET_FR(0);
- FPSCR_SET_FI(0);
- FPSCR_OR_VX(fpscr_vxcvi);
- if ((FPSCR & fpscr_ve) == 0) {
- if (tgt_precision == 32) {
- if (sign == 0) *frt = MASKED64(*frt, 0, 31) | 0x7fffffff;
- if (sign == 1) *frt = MASKED64(*frt, 0, 31) | 0x80000000;
- }
- else {
- if (sign == 0) *frt = MASK64(1, 63); /*0x7FFF_FFFF_FFFF_FFFF*/
- if (sign == 1) *frt = BIT64(0); /*0x8000_0000_0000_0000*/
- }
- /* FPSCR[fprf] = undefined */
- }
- /**/
- LABEL(Done):
-
-
-# extract out raw fields of a FP number
-int::function::sign:unsigned64 FRS
- return (MASKED64(FRS, 0, 0)
- ? -1
- : 1);
-int::function::biased_exp:unsigned64 frs, int single
- if (single)
- return EXTRACTED64(frs, 1, 8);
- else
- return EXTRACTED64(frs, 1, 11);
-unsigned64::function::fraction:unsigned64 frs, int single
- if (single)
- return EXTRACTED64(frs, 9, 31);
- else
- return EXTRACTED64(frs, 12, 63);
-
-# a number?, each of the below return +1 or -1 (based on sign bit)
-# if true.
-int::function::is_nor:unsigned64 frs, int single
- int exp = biased_exp(frs, single);
- return (exp >= 1
- && exp <= (single ? 254 : 2046));
-int::function::is_zero:unsigned64 FRS
- return (MASKED64(FRS, 1, 63) == 0
- ? sign(FRS)
- : 0);
-int::function::is_den:unsigned64 frs, int single
- int exp = biased_exp(frs, single);
- unsigned64 frac = fraction(frs, single);
- return (exp == 0 && frac != 0
- ? sign(frs)
- : 0);
-int::function::is_inf:unsigned64 frs, int single
- int exp = biased_exp(frs, single);
- unsigned64 frac = fraction(frs, single);
- return (exp == (single ? 255 : 2047) && frac == 0
- ? sign(frs)
- : 0);
-int::function::is_NaN:unsigned64 frs, int single
- int exp = biased_exp(frs, single);
- unsigned64 frac = fraction(frs, single);
- return (exp == (single ? 255 : 2047) && frac != 0
- ? sign(frs)
- : 0);
-int::function::is_SNaN:unsigned64 frs, int single
- return (is_NaN(frs, single)
- && !(frs & (single ? MASK64(9, 9) : MASK64(12, 12)))
- ? sign(frs)
- : 0);
-int::function::is_QNaN:unsigned64 frs, int single
- return (is_NaN(frs, single) && !is_SNaN(frs, single));
-int::function::is_less_than:unsigned64 *fra, unsigned64 *frb
- return *(double*)fra < *(double*)frb;
-int::function::is_greater_than:unsigned64 *fra, unsigned64 *frb
- return *(double*)fra > *(double*)frb;
-int::function::is_equan_to:unsigned64 *fra, unsigned64 *frb
- return *(double*)fra == *(double*)frb;
-
-
-# which quiet nan should become the result
-unsigned64::function::select_qnan:unsigned64 fra, unsigned64 frb, unsigned64 frc, int instruction_is_frsp, int generate_qnan, int single
- unsigned64 frt = 0;
- if (is_NaN(fra, single))
- frt = fra;
- else if (is_NaN(frb, single))
- if (instruction_is_frsp)
- frt = MASKED64(frb, 0, 34);
- else
- frt = frb;
- else if (is_NaN(frc, single))
- frt = frc;
- else if (generate_qnan)
- frt = MASK64(1, 12); /* 0x7FF8_0000_0000_0000 */
- else
- error("select_qnan - default reached\n");
- return frt;
-
-
-# detect invalid operation
-int::function::is_invalid_operation:cpu *processor, unsigned_word cia, unsigned64 fra, unsigned64 frb, fpscreg check, int single, int negate
- int fail = 0;
- if ((check & fpscr_vxsnan)
- && (is_SNaN(fra, single) || is_SNaN(frb, single))) {
- FPSCR_OR_VX(fpscr_vxsnan);
- fail = 1;
- }
- if ((check & fpscr_vxisi)
- && (is_inf(fra, single) && is_inf(frb, single))
- && ((negate && sign(fra) != sign(frb))
- || (!negate && sign(fra) == sign(frb)))) {
- /*FIXME: don't handle inf-inf VS inf+-inf */
- FPSCR_OR_VX(fpscr_vxisi);
- fail = 1;
- }
- if ((check & fpscr_vxidi)
- && (is_inf(fra, single) && is_inf(frb, single))) {
- FPSCR_OR_VX(fpscr_vxidi);
- fail = 1;
- }
- if ((check & fpscr_vxzdz)
- && (is_zero(fra) && is_zero(frb))) {
- FPSCR_OR_VX(fpscr_vxzdz);
- fail = 1;
- }
- if ((check & fpscr_vximz)
- && (is_zero(fra) && is_inf(frb, single))) {
- FPSCR_OR_VX(fpscr_vximz);
- fail = 1;
- }
- if ((check & fpscr_vxvc)
- && (is_NaN(fra, single) || is_NaN(frb, single))) {
- FPSCR_OR_VX(fpscr_vxvc);
- fail = 1;
- }
- if ((check & fpscr_vxsoft)) {
- FPSCR_OR_VX(fpscr_vxsoft);
- fail = 1;
- }
- if ((check & fpscr_vxsqrt)
- && sign(fra) < 0) {
- FPSCR_OR_VX(fpscr_vxsqrt);
- fail = 1;
- }
- /* if ((check && fpscr_vxcvi) {
- && (is_inf(fra, single) || is_NaN(fra, single) || is_large(fra, single)))
- FPSCR_OR_VX(fpscr_vxcvi);
- fail = 1;
- }
- */
- return fail;
-
-
-
-
-
-# handle case of invalid operation
-void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, unsigned64 *frt, unsigned64 fra, unsigned64 frb, unsigned64 frc, int instruction_is_frsp, int instruction_is_convert_to_64bit, int instruction_is_convert_to_32bit, int single
- if (FPSCR & fpscr_ve) {
- /* invalid operation exception enabled */
- /* FRT unchaged */
- FPSCR_SET_FR(0);
- FPSCR_SET_FI(0);
- /* fpscr_FPRF unchanged */
- }
- else {
- /* invalid operation exception disabled */
- if (instruction_is_convert_to_64bit) {
- error("oopsi");
- }
- else if (instruction_is_convert_to_32bit) {
- error("oopsi");
- }
- else { /* arrith, frsp */
- *frt = select_qnan(fra, frb, frc,
- instruction_is_frsp, 1/*generate*/, single);
- FPSCR_SET_FR(0);
- FPSCR_SET_FI(0);
- FPSCR_SET_FPRF(fpscr_rf_quiet_nan);
- }
- }
-
-
-
-
-# detect divide by zero
-int::function::is_invalid_zero_divide:cpu *processor, unsigned_word cia, unsigned64 fra, unsigned64 frb, int single
- int fail = 0;
- if (is_zero (frb)) {
- FPSCR_SET_ZX (1);
- fail = 1;
- }
- return fail;
-
-
-
-
-# handle case of invalid operation
-void::function::invalid_zero_divide_operation:cpu *processor, unsigned_word cia, unsigned64 *frt, unsigned64 fra, unsigned64 frb, int single
- if (FPSCR & fpscr_ze) {
- /* zero-divide exception enabled */
- /* FRT unchaged */
- FPSCR_SET_FR(0);
- FPSCR_SET_FI(0);
- /* fpscr_FPRF unchanged */
- }
- else {
- /* zero-divide exception disabled */
- FPSCR_SET_FR(0);
- FPSCR_SET_FI(0);
- if ((sign (fra) < 0 && sign (frb) < 0)
- || (sign (fra) > 0 && sign (frb) > 0)) {
- *frt = MASK64 (1, 11); /* 0 : 2047 : 0..0 */
- FPSCR_SET_FPRF(fpscr_rf_pos_infinity);
- }
- else {
- *frt = MASK64 (0, 11); /* 1 : 2047 : 0..0 */
- FPSCR_SET_FPRF(fpscr_rf_neg_infinity);
- }
- }
-
-
-
-
-
-#
-# 0.0.0.0 Illegal instruction used for kernel mode emulation
-#
-0.0,6./,11./,16./,21./,31.1:X:::instruction_call
- if (!os_emul_instruction_call(processor, cia, real_addr(cia, 1)))
- program_interrupt(processor, cia,
- illegal_instruction_program_interrupt);
-
-#
-# I.2.4.1 Branch Instructions
-#
-0.18,6.LI,30.AA,31.LK:I:::Branch
-*601: PPC_UNIT_BPU, PPC_UNIT_BPU, 1, 1, 0
-*603: PPC_UNIT_BPU, PPC_UNIT_BPU, 1, 1, 0
-*603e:PPC_UNIT_BPU, PPC_UNIT_BPU, 1, 1, 0
-*604: PPC_UNIT_BPU, PPC_UNIT_BPU, 1, 1, 0
- /* option_mpc860c0:
- No problem here because this branch is predicted taken (unconditional). */
- if (AA) NIA = IEA(EXTS(LI_0b00));
- else NIA = IEA(CIA + EXTS(LI_0b00));
- if (LK) LR = (spreg)CIA+4;
- if (CURRENT_MODEL_ISSUE > 0)
- model_branches(cpu_model(processor), 1, -1);
-
-0.16,6.BO,11.BI,16.BD,30.AA,31.LK:B:::Branch Conditional
-*601: PPC_UNIT_BPU, PPC_UNIT_BPU, 1, 1, 0
-*603: PPC_UNIT_BPU, PPC_UNIT_BPU, 1, 1, 0
-*603e:PPC_UNIT_BPU, PPC_UNIT_BPU, 1, 1, 0
-*604: PPC_UNIT_BPU, PPC_UNIT_BPU, 1, 1, 0
- int M, ctr_ok, cond_ok, succeed;
- if (CURRENT_MODEL_ISSUE > 0 && ! BO{0})
- model_wait_for_cr(cpu_model(processor), BIT32_BI);
- if (is_64bit_implementation && is_64bit_mode) M = 0;
- else M = 32;
- if (!BO{2}) CTR = CTR - 1;
- ctr_ok = BO{2} || ((MASKED(CTR, M, 63) != 0) != (BO{3}));
- cond_ok = BO{0} || ((CR{BI}) == (BO{1}));
- if (ctr_ok && cond_ok) {
- if (AA) NIA = IEA(EXTS(BD_0b00));
- else NIA = IEA(CIA + EXTS(BD_0b00));
- succeed = 1;
- }
- else
- succeed = 0;
- if (LK) LR = (spreg)IEA(CIA + 4);
- if (option_mpc860c0 && (!BO{0} || !BO{2}) && !BO{4}) {
- /* This branch is predicted as "normal".
- If this is a forward branch and it is near the end of a page,
- we've detected a problematic branch. */
- if (succeed && NIA > CIA) {
- if (PAGE_SIZE - (CIA & (PAGE_SIZE-1)) <= option_mpc860c0)
- program_interrupt(processor, cia, mpc860c0_instruction_program_interrupt);
- }
- }
- if (CURRENT_MODEL_ISSUE > 0)
- model_branches(cpu_model(processor), succeed, BO);
- if (! BO{0}) {
- int reverse;
- if (BO{4}) { /* branch prediction bit set, reverse sense of test */
- reverse = EXTS(BD_0b00) < 0;
- } else { /* branch prediction bit not set */
- reverse = EXTS(BD_0b00) >= 0;
- }
- if (CURRENT_MODEL_ISSUE > 0)
- model_branch_predict(cpu_model(processor), reverse ? !succeed : succeed);
- }
-
-0.19,6.BO,11.BI,16./,21.16,31.LK:XL:::Branch Conditional to Link Register
-*601: PPC_UNIT_BPU, PPC_UNIT_BPU, 1, 1, 0
-*603: PPC_UNIT_BPU, PPC_UNIT_BPU, 1, 1, 0
-*603e:PPC_UNIT_BPU, PPC_UNIT_BPU, 1, 1, 0
-*604: PPC_UNIT_BPU, PPC_UNIT_BPU, 1, 1, 0
- int M, ctr_ok, cond_ok, succeed;
- if (is_64bit_implementation && is_64bit_mode) M = 0;
- else M = 32;
- if (CURRENT_MODEL_ISSUE > 0 && ! BO{0})
- model_wait_for_cr(cpu_model(processor), BIT32_BI);
- if (!BO{2}) CTR = CTR - 1;
- ctr_ok = BO{2} || ((MASKED(CTR, M, 63) != 0) != BO{3});
- cond_ok = BO{0} || (CR{BI} == BO{1});
- if (ctr_ok && cond_ok) {
- NIA = IEA(LR_0b00);
- succeed = 1;
- }
- else
- succeed = 0;
- if (LK) LR = (spreg)IEA(CIA + 4);
- if (option_mpc860c0 && (!BO{0} || !BO{2}) && !BO{4}) {
- /* This branch is predicted as not-taken.
- If this is a forward branch and it is near the end of a page,
- we've detected a problematic branch. */
- if (succeed && NIA > CIA) {
- if (PAGE_SIZE - (CIA & (PAGE_SIZE-1)) <= option_mpc860c0)
- program_interrupt(processor, cia, mpc860c0_instruction_program_interrupt);
- }
- }
- if (CURRENT_MODEL_ISSUE > 0) {
- model_branches(cpu_model(processor), succeed, BO);
- if (! BO{0})
- model_branch_predict(cpu_model(processor), BO{4} ? !succeed : succeed);
- }
-
-0.19,6.BO,11.BI,16./,21.528,31.LK:XL:::Branch Conditional to Count Register
-*601: PPC_UNIT_BPU, PPC_UNIT_BPU, 1, 1, 0
-*603: PPC_UNIT_BPU, PPC_UNIT_BPU, 1, 1, 0
-*603e:PPC_UNIT_BPU, PPC_UNIT_BPU, 1, 1, 0
-*604: PPC_UNIT_BPU, PPC_UNIT_BPU, 1, 1, 0
- int cond_ok, succeed;
- if (CURRENT_MODEL_ISSUE > 0 && ! BO{0})
- model_wait_for_cr(cpu_model(processor), BIT32_BI);
- cond_ok = BO{0} || (CR{BI} == BO{1});
- if (cond_ok) {
- NIA = IEA(CTR_0b00);
- succeed = 1;
- }
- else
- succeed = 0;
- if (LK) LR = (spreg)IEA(CIA + 4);
- if (option_mpc860c0 && (!BO{0} || !BO{2}) && !BO{4}) {
- /* This branch is predicted as not-taken.
- If this is a forward branch and it is near the end of a page,
- we've detected a problematic branch. */
- if (succeed && NIA > CIA) {
- if (PAGE_SIZE - (CIA & (PAGE_SIZE-1)) <= option_mpc860c0)
- program_interrupt(processor, cia, mpc860c0_instruction_program_interrupt);
- }
- }
- if (CURRENT_MODEL_ISSUE > 0) {
- model_branches(cpu_model(processor), succeed, BO);
- if (! BO{0})
- model_branch_predict(cpu_model(processor), BO{4} ? !succeed : succeed);
- }
-
-#
-# I.2.4.2 System Call Instruction
-#
-0.17,6./,11./,16./,30.1,31./:SC:::System Call
-*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*603: PPC_UNIT_SRU, PPC_UNIT_SRU, 3, 3, 0
-*603e:PPC_UNIT_SRU, PPC_UNIT_SRU, 3, 3, 0
-*604: PPC_UNIT_SCIU1, PPC_UNIT_SCIU2, 1, 1, 0
- if (CURRENT_MODEL_ISSUE > 0)
- model_serialize(MY_INDEX, cpu_model(processor));
- system_call_interrupt(processor, cia);
-
-#
-# I.2.4.3 Condition Register Logical Instructions
-#
-0.19,6.BT,11.BA,16.BB,21.257,31./:XL::crand:Condition Register AND
-*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*603: PPC_UNIT_SRU, PPC_UNIT_SRU, 1, 1, 0
-*603e:PPC_UNIT_SRU, PPC_UNIT_SRU, 1, 1, 0
-*604: PPC_UNIT_BPU, PPC_UNIT_BPU, 1, 1, 0
- BLIT32(CR, BT, CR{BA} && CR{BB});
- PPC_INSN_CR(BT_BITMASK, BA_BITMASK | BB_BITMASK);
-
-0.19,6.BT,11.BA,16.BB,21.449,31./:XL::cror:Condition Register OR
-*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*603: PPC_UNIT_SRU, PPC_UNIT_SRU, 1, 1, 0
-*603e:PPC_UNIT_SRU, PPC_UNIT_SRU, 1, 1, 0
-*604: PPC_UNIT_BPU, PPC_UNIT_BPU, 1, 1, 0
- BLIT32(CR, BT, CR{BA} || CR{BB});
- PPC_INSN_CR(BT_BITMASK, BA_BITMASK | BB_BITMASK);
-
-0.19,6.BT,11.BA,16.BB,21.193,31./:XL::crxor:Condition Register XOR
-*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*603: PPC_UNIT_SRU, PPC_UNIT_SRU, 1, 1, 0
-*603e:PPC_UNIT_SRU, PPC_UNIT_SRU, 1, 1, 0
-*604: PPC_UNIT_BPU, PPC_UNIT_BPU, 1, 1, 0
- BLIT32(CR, BT, CR{BA} != CR{BB});
- PPC_INSN_CR(BT_BITMASK, BA_BITMASK | BB_BITMASK);
-
-0.19,6.BT,11.BA,16.BB,21.225,31./:XL::crnand:Condition Register NAND
-*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*603: PPC_UNIT_SRU, PPC_UNIT_SRU, 1, 1, 0
-*603e:PPC_UNIT_SRU, PPC_UNIT_SRU, 1, 1, 0
-*604: PPC_UNIT_BPU, PPC_UNIT_BPU, 1, 1, 0
- BLIT32(CR, BT, !(CR{BA} && CR{BB}));
- PPC_INSN_CR(BT_BITMASK, BA_BITMASK | BB_BITMASK);
-
-0.19,6.BT,11.BA,16.BB,21.33,31./:XL::crnor:Condition Register NOR
-*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*603: PPC_UNIT_SRU, PPC_UNIT_SRU, 1, 1, 0
-*603e:PPC_UNIT_SRU, PPC_UNIT_SRU, 1, 1, 0
-*604: PPC_UNIT_BPU, PPC_UNIT_BPU, 1, 1, 0
- BLIT32(CR, BT, !(CR{BA} || CR{BB}));
- PPC_INSN_CR(BT_BITMASK, BA_BITMASK | BB_BITMASK);
-
-0.19,6.BT,11.BA,16.BB,21.289,31./:XL::creqv:Condition Register Equivalent
-*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*603: PPC_UNIT_SRU, PPC_UNIT_SRU, 1, 1, 0
-*603e:PPC_UNIT_SRU, PPC_UNIT_SRU, 1, 1, 0
-*604: PPC_UNIT_BPU, PPC_UNIT_BPU, 1, 1, 0
- BLIT32(CR, BT, CR{BA} == CR{BB});
- PPC_INSN_CR(BT_BITMASK, BA_BITMASK | BB_BITMASK);
-
-0.19,6.BT,11.BA,16.BB,21.129,31./:XL::crandc:Condition Register AND with Complement
-*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*603: PPC_UNIT_SRU, PPC_UNIT_SRU, 1, 1, 0
-*603e:PPC_UNIT_SRU, PPC_UNIT_SRU, 1, 1, 0
-*604: PPC_UNIT_BPU, PPC_UNIT_BPU, 1, 1, 0
- BLIT32(CR, BT, CR{BA} && !CR{BB});
- PPC_INSN_CR(BT_BITMASK, BA_BITMASK | BB_BITMASK);
-
-0.19,6.BT,11.BA,16.BB,21.417,31./:XL::crorc:Condition Register OR with Complement
-*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*603: PPC_UNIT_SRU, PPC_UNIT_SRU, 1, 1, 0
-*603e:PPC_UNIT_SRU, PPC_UNIT_SRU, 1, 1, 0
-*604: PPC_UNIT_BPU, PPC_UNIT_BPU, 1, 1, 0
- BLIT32(CR, BT, CR{BA} || !CR{BB});
- PPC_INSN_CR(BT_BITMASK, BA_BITMASK | BB_BITMASK);
-
-#
-# I.2.4.4 Condition Register Field Instruction
-#
-0.19,6.BF,9./,11.BFA,14./,16./,21.0,31./:XL:::Move Condition Register Field
-*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*603: PPC_UNIT_SRU, PPC_UNIT_SRU, 1, 1, 0
-*603e:PPC_UNIT_SRU, PPC_UNIT_SRU, 1, 1, 0
-*604: PPC_UNIT_BPU, PPC_UNIT_BPU, 1, 1, 0
- MBLIT32(CR, 4*BF, 4*BF+3, EXTRACTED32(CR, 4*BFA, 4*BFA+3));
- PPC_INSN_CR(BF_BITMASK, 1 << BFA);
-
-
-#
-# I.3.3.2 Fixed-Point Load Instructions
-#
-
-0.34,6.RT,11.RA,16.D:D:::Load Byte and Zero
-*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 2, 0
-*603: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0
-*603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0
-*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0
- unsigned_word b;
- unsigned_word EA;
- if (RA_is_0) b = 0;
- else b = *rA;
- EA = b + EXTS(D);
- *rT = MEM(unsigned, EA, 1);
- PPC_INSN_INT(RT_BITMASK, (RA_BITMASK & ~1), 0);
-
-
-0.31,6.RT,11.RA,16.RB,21.87,31./:X:::Load Byte and Zero Indexed
-*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 2, 0
-*603: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0
-*603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0
-*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0
- unsigned_word b;
- unsigned_word EA;
- if (RA_is_0) b = 0;
- else b = *rA;
- EA = b + *rB;
- *rT = MEM(unsigned, EA, 1);
- PPC_INSN_INT(RT_BITMASK, (RA_BITMASK & ~1) | RB_BITMASK, 0);
-
-0.35,6.RT,11.RA,16.D:D:::Load Byte and Zero with Update
-*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 2, 0
-*603: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0
-*603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0
-*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0
- unsigned_word EA;
- if (RA_is_0 || RA == RT)
- program_interrupt(processor, cia,
- illegal_instruction_program_interrupt);
- EA = *rA + EXTS(D);
- *rT = MEM(unsigned, EA, 1);
- *rA = EA;
- PPC_INSN_INT(RT_BITMASK | RA_BITMASK, RA_BITMASK, 0);
-
-0.31,6.RT,11.RA,16.RB,21.119,31./:X:::Load Byte and Zero with Update Indexed
-*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 2, 0
-*603: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0
-*603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0
-*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0
- unsigned_word EA;
- if (RA_is_0 || RA == RT)
- program_interrupt(processor, cia,
- illegal_instruction_program_interrupt);
- EA = *rA + *rB;
- *rT = MEM(unsigned, EA, 1);
- *rA = EA;
- PPC_INSN_INT(RT_BITMASK | RA_BITMASK, RA_BITMASK | RB_BITMASK, 0);
-
-0.40,6.RT,11.RA,16.D:D:::Load Halfword and Zero
-*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 2, 0
-*603: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0
-*603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0
-*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0
- unsigned_word b;
- unsigned_word EA;
- if (RA_is_0) b = 0;
- else b = *rA;
- EA = b + EXTS(D);
- *rT = MEM(unsigned, EA, 2);
- PPC_INSN_INT(RT_BITMASK, (RA_BITMASK & ~1), 0);
-
-0.31,6.RT,11.RA,16.RB,21.279,31./:X:::Load Halfword and Zero Indexed
-*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 2, 0
-*603: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0
-*603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0
-*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0
- unsigned_word b;
- unsigned_word EA;
- if (RA_is_0) b = 0;
- else b = *rA;
- EA = b + *rB;
- *rT = MEM(unsigned, EA, 2);
- PPC_INSN_INT(RT_BITMASK, (RA_BITMASK & ~1) | RB_BITMASK, 0);
-
-0.41,6.RT,11.RA,16.D:D:::Load Halfword and Zero with Update
-*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 2, 0
-*603: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0
-*603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0
-*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0
- unsigned_word EA;
- if (RA_is_0 || RA == RT)
- program_interrupt(processor, cia,
- illegal_instruction_program_interrupt);
- EA = *rA + EXTS(D);
- *rT = MEM(unsigned, EA, 2);
- *rA = EA;
- PPC_INSN_INT(RT_BITMASK | RA_BITMASK, RA_BITMASK, 0);
-
-0.31,6.RT,11.RA,16.RB,21.311,31./:X:::Load Halfword and Zero with Update Indexed
-*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 2, 0
-*603: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0
-*603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0
-*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0
- unsigned_word EA;
- if (RA_is_0 || RA == RT)
- program_interrupt(processor, cia,
- illegal_instruction_program_interrupt);
- EA = *rA + *rB;
- *rT = MEM(unsigned, EA, 2);
- *rA = EA;
- PPC_INSN_INT(RT_BITMASK | RA_BITMASK, RA_BITMASK | RB_BITMASK, 0);
-
-0.42,6.RT,11.RA,16.D:D:::Load Halfword Algebraic
-*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 2, 0
-*603: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0
-*603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0
-*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0
- unsigned_word b;
- unsigned_word EA;
- if (RA_is_0) b = 0;
- else b = *rA;
- EA = b + EXTS(D);
- *rT = MEM(signed, EA, 2);
- PPC_INSN_INT(RT_BITMASK, (RA_BITMASK & ~1), 0);
-
-0.31,6.RT,11.RA,16.RB,21.343,31./:X:::Load Halfword Algebraic Indexed
-*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 2, 0
-*603: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0
-*603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0
-*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0
- unsigned_word b;
- unsigned_word EA;
- if (RA_is_0) b = 0;
- else b = *rA;
- EA = b + *rB;
- *rT = MEM(signed, EA, 2);
- PPC_INSN_INT(RT_BITMASK, (RA_BITMASK & ~1) | RB_BITMASK, 0);
-
-0.43,6.RT,11.RA,16.D:D:::Load Halfword Algebraic with Update
-*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 2, 0
-*603: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0
-*603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0
-*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0
- unsigned_word EA;
- if (RA_is_0 || RA == RT)
- program_interrupt(processor, cia,
- illegal_instruction_program_interrupt);
- EA = *rA + EXTS(D);
- *rT = MEM(signed, EA, 2);
- *rA = EA;
- PPC_INSN_INT(RT_BITMASK | RA_BITMASK, RA_BITMASK, 0);
-
-0.31,6.RT,11.RA,16.RB,21.375,31./:X:::Load Halfword Algebraic with Update Indexed
-*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 2, 0
-*603: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0
-*603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0
-*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0
- unsigned_word EA;
- if (RA_is_0 || RA == RT)
- program_interrupt(processor, cia,
- illegal_instruction_program_interrupt);
- EA = *rA + *rB;
- *rT = MEM(signed, EA, 2);
- *rA = EA;
- PPC_INSN_INT(RT_BITMASK | RA_BITMASK, RA_BITMASK | RB_BITMASK, 0);
-
-0.32,6.RT,11.RA,16.D:D:::Load Word and Zero
-*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 2, 0
-*603: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0
-*603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0
-*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0
- unsigned_word b;
- unsigned_word EA;
- if (RA_is_0) b = 0;
- else b = *rA;
- EA = b + EXTS(D);
- *rT = MEM(unsigned, EA, 4);
- PPC_INSN_INT(RT_BITMASK, (RA_BITMASK & ~1), 0);
-
-0.31,6.RT,11.RA,16.RB,21.23,31./:X:::Load Word and Zero Indexed
-*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 2, 0
-*603: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0
-*603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0
-*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0
- unsigned_word b;
- unsigned_word EA;
- if (RA_is_0) b = 0;
- else b = *rA;
- EA = b + *rB;
- *rT = MEM(unsigned, EA, 4);
- PPC_INSN_INT(RT_BITMASK, (RA_BITMASK & ~1) | RB_BITMASK, 0);
-
-0.33,6.RT,11.RA,16.D:D:::Load Word and Zero with Update
-*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 2, 0
-*603: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0
-*603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0
-*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0
- unsigned_word EA;
- if (RA_is_0 || RA == RT)
- program_interrupt(processor, cia,
- illegal_instruction_program_interrupt);
- EA = *rA + EXTS(D);
- *rT = MEM(unsigned, EA, 4);
- *rA = EA;
- PPC_INSN_INT(RT_BITMASK | RA_BITMASK, RA_BITMASK, 0);
-
-0.31,6.RT,11.RA,16.RB,21.55,31./:X:::Load Word and Zero with Update Indexed
-*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 2, 0
-*603: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0
-*603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0
-*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0
- unsigned_word EA;
- if (RA_is_0 || RA == RT)
- program_interrupt(processor, cia,
- illegal_instruction_program_interrupt);
- EA = *rA + *rB;
- *rT = MEM(unsigned, EA, 4);
- *rA = EA;
- PPC_INSN_INT(RT_BITMASK | RA_BITMASK, RA_BITMASK | RB_BITMASK, 0);
-
-0.58,6.RT,11.RA,16.DS,30.2:DS:64::Load Word Algebraic
-# unsigned_word b;
-# unsigned_word EA;
-# if (RA_is_0) b = 0;
-# else b = *rA;
-# EA = b + EXTS(DS_0b00);
-# *rT = MEM(signed, EA, 4);
-
-0.31,6.RT,11.RA,16.RB,21.341,31./:X:64::Load Word Algebraic Indexed
-# unsigned_word b;
-# unsigned_word EA;
-# if (RA_is_0) b = 0;
-# else b = *rA;
-# EA = b + *rB;;
-# *rT = MEM(signed, EA, 4);
-
-0.31,6.RT,11.RA,16.RB,21.373,31./:X:64::Load Word Algebraic with Update Indexed
-# unsigned_word EA;
-# if (RA_is_0 || RA == RT)
-# program_interrupt(processor, cia
-# illegal_instruction_program_interrupt);
-# EA = *rA + *rB;
-# *rT = MEM(signed, EA, 4);
-# *rA = EA;
-
-0.58,6.RT,11.RA,16.DS,30.0:DS:64::Load Doubleword
-# unsigned_word b;
-# unsigned_word EA;
-# if (RA_is_0) b = 0;
-# else b = *rA;
-# EA = b + EXTS(DS_0b00);
-# *rT = MEM(unsigned, EA, 8);
-
-0.31,6.RT,11.RA,16.RB,21.21,31./:X:64::Load Doubleword Indexed
-# unsigned_word b;
-# unsigned_word EA;
-# if (RA_is_0) b = 0;
-# else b = *rA;
-# EA = b + *rB;
-# *rT = MEM(unsigned, EA, 8);
-
-0.58,6.RT,11.RA,16.DS,30.1:DS:64::Load Doubleword with Update
-# unsigned_word EA;
-# if (RA_is_0 || RA == RT)
-# program_interrupt(processor, cia
-# illegal_instruction_program_interrupt);
-# EA = *rA + EXTS(DS_0b00);
-# *rT = MEM(unsigned, EA, 8);
-# *rA = EA;
-
-0.31,6.RT,11.RA,16.RB,21.53,31./:DS:64::Load Doubleword with Update Indexed
-# unsigned_word EA;
-# if (RA_is_0 || RA == RT)
-# program_interrupt(processor, cia
-# illegal_instruction_program_interrupt);
-# EA = *rA + *rB;
-# *rT = MEM(unsigned, EA, 8);
-# *rA = EA;
-
-
-
-#
-# I.3.3.3 Fixed-Point Store Instructions
-#
-
-0.38,6.RS,11.RA,16.D:D:::Store Byte
-*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*603: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0
-*603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0
-*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 3, 0
- unsigned_word b;
- unsigned_word EA;
- if (RA_is_0) b = 0;
- else b = *rA;
- EA = b + EXTS(D);
- STORE(EA, 1, *rS);
- PPC_INSN_INT(0, (RA_BITMASK & ~1) | RS_BITMASK, 0);
-
-0.31,6.RS,11.RA,16.RB,21.215,31./:X:::Store Byte Indexed
-*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*603: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0
-*603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0
-*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 3, 0
- unsigned_word b;
- unsigned_word EA;
- if (RA_is_0) b = 0;
- else b = *rA;
- EA = b + *rB;
- STORE(EA, 1, *rS);
- PPC_INSN_INT(0, (RA_BITMASK & ~1) | RB_BITMASK | RS_BITMASK, 0);
-
-0.39,6.RS,11.RA,16.D:D:::Store Byte with Update
-*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*603: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0
-*603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0
-*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 3, 0
- unsigned_word EA;
- if (RA_is_0)
- program_interrupt(processor, cia,
- illegal_instruction_program_interrupt);
- EA = *rA + EXTS(D);
- STORE(EA, 1, *rS);
- *rA = EA;
- PPC_INSN_INT(RA_BITMASK, RA_BITMASK | RS_BITMASK, 0);
-
-0.31,6.RS,11.RA,16.RB,21.247,31./:X:::Store Byte with Update Indexed
-*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*603: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0
-*603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0
-*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 3, 0
- unsigned_word EA;
- if (RA_is_0)
- program_interrupt(processor, cia,
- illegal_instruction_program_interrupt);
- EA = *rA + *rB;
- STORE(EA, 1, *rS);
- *rA = EA;
- PPC_INSN_INT(RA_BITMASK, RA_BITMASK | RB_BITMASK | RS_BITMASK, 0);
-
-0.44,6.RS,11.RA,16.D:D:::Store Half Word
-*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*603: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0
-*603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0
-*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 3, 0
- unsigned_word b;
- unsigned_word EA;
- if (RA_is_0) b = 0;
- else b = *rA;
- EA = b + EXTS(D);
- STORE(EA, 2, *rS);
- PPC_INSN_INT(0, (RA_BITMASK & ~1) | RS_BITMASK, 0);
-
-0.31,6.RS,11.RA,16.RB,21.407,31./:X:::Store Half Word Indexed
-*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*603: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0
-*603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0
-*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 3, 0
- unsigned_word b;
- unsigned_word EA;
- if (RA_is_0) b = 0;
- else b = *rA;
- EA = b + *rB;
- STORE(EA, 2, *rS);
- PPC_INSN_INT(0, (RA_BITMASK & ~1) | RB_BITMASK | RS_BITMASK, 0);
-
-0.45,6.RS,11.RA,16.D:D:::Store Half Word with Update
-*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*603: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0
-*603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0
-*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 3, 0
- unsigned_word EA;
- if (RA_is_0)
- program_interrupt(processor, cia,
- illegal_instruction_program_interrupt);
- EA = *rA + EXTS(D);
- STORE(EA, 2, *rS);
- *rA = EA;
- PPC_INSN_INT(RA_BITMASK, RA_BITMASK | RS_BITMASK, 0);
-
-0.31,6.RS,11.RA,16.RB,21.439,31./:X:::Store Half Word with Update Indexed
-*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*603: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0
-*603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0
-*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 3, 0
- unsigned_word EA;
- if (RA_is_0)
- program_interrupt(processor, cia,
- illegal_instruction_program_interrupt);
- EA = *rA + *rB;
- STORE(EA, 2, *rS);
- *rA = EA;
- PPC_INSN_INT(RA_BITMASK, RA_BITMASK | RB_BITMASK | RS_BITMASK, 0);
-
-0.36,6.RS,11.RA,16.D:D:::Store Word
-*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*603: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0
-*603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0
-*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 3, 0
- unsigned_word b;
- unsigned_word EA;
- if (RA_is_0) b = 0;
- else b = *rA;
- EA = b + EXTS(D);
- STORE(EA, 4, *rS);
- PPC_INSN_INT(0, (RA_BITMASK & ~1) | RS_BITMASK, 0);
-
-0.31,6.RS,11.RA,16.RB,21.151,31./:X:::Store Word Indexed
-*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*603: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0
-*603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0
-*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 3, 0
- unsigned_word b;
- unsigned_word EA;
- if (RA_is_0) b = 0;
- else b = *rA;
- EA = b + *rB;
- STORE(EA, 4, *rS);
- PPC_INSN_INT(0, (RA_BITMASK & ~1) | RB_BITMASK | RS_BITMASK, 0);
-
-0.37,6.RS,11.RA,16.D:D:::Store Word with Update
-*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*603: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0
-*603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0
-*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 3, 0
- unsigned_word EA;
- if (RA_is_0)
- program_interrupt(processor, cia,
- illegal_instruction_program_interrupt);
- EA = *rA + EXTS(D);
- STORE(EA, 4, *rS);
- *rA = EA;
- PPC_INSN_INT(RA_BITMASK, RA_BITMASK | RS_BITMASK, 0);
-
-0.31,6.RS,11.RA,16.RB,21.183,31./:X:::Store Word with Update Indexed
-*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*603: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0
-*603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0
-*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 3, 0
- unsigned_word EA;
- if (RA_is_0)
- program_interrupt(processor, cia,
- illegal_instruction_program_interrupt);
- EA = *rA + *rB;
- STORE(EA, 4, *rS);
- *rA = EA;
- PPC_INSN_INT(RA_BITMASK, RA_BITMASK | RB_BITMASK | RS_BITMASK, 0);
-
-0.62,6.RS,11.RA,16.DS,30.0:DS:64::Store Doubleword
-# unsigned_word b;
-# unsigned_word EA;
-# if (RA_is_0) b = 0;
-# else b = *rA;
-# EA = b + EXTS(DS_0b00);
-# STORE(EA, 8, *rS);
-0.31,6.RS,11.RA,16.RB,21.149,31./:X:64::Store Doubleword Indexed
-# unsigned_word b;
-# unsigned_word EA;
-# if (RA_is_0) b = 0;
-# else b = *rA;
-# EA = b + *rB;
-# STORE(EA, 8, *rS);
-0.62,6.RS,11.RA,16.DS,30.1:DS:64::Store Doubleword with Update
-# unsigned_word EA;
-# if (RA_is_0)
-# program_interrupt(processor, cia
-# illegal_instruction_program_interrupt);
-# EA = *rA + EXTS(DS_0b00);
-# STORE(EA, 8, *rS);
-# *rA = EA;
-0.31,6.RS,11.RA,16.RB,21.181,31./:X:64::Store Doubleword with Update Indexed
-# unsigned_word EA;
-# if (RA_is_0)
-# program_interrupt(processor, cia
-# illegal_instruction_program_interrupt);
-# EA = *rA + *rB;
-# STORE(EA, 8, *rS);
-# *rA = EA;
-
-
-#
-# I.3.3.4 Fixed-Point Load and Store with Byte Reversal Instructions
-#
-
-0.31,6.RT,11.RA,16.RB,21.790,31./:X:::Load Halfword Byte-Reverse Indexed
-*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*603: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0
-*603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0
-*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 3, 0
- unsigned_word b;
- unsigned_word EA;
- if (RA_is_0) b = 0;
- else b = *rA;
- EA = b + *rB;
- *rT = SWAP_2(MEM(unsigned, EA, 2));
- PPC_INSN_INT(RT_BITMASK, (RA_BITMASK & ~1) | RB_BITMASK, 0);
-
-0.31,6.RT,11.RA,16.RB,21.534,31./:X:::Load Word Byte-Reverse Indexed
-*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*603: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0
-*603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0
-*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 3, 0
- unsigned_word b;
- unsigned_word EA;
- if (RA_is_0) b = 0;
- else b = *rA;
- EA = b + *rB;
- *rT = SWAP_4(MEM(unsigned, EA, 4));
- PPC_INSN_INT(RT_BITMASK, (RA_BITMASK & ~1) | RB_BITMASK, 0);
-
-0.31,6.RS,11.RA,16.RB,21.918,31./:X:::Store Half Word Byte-Reversed Indexed
-*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*603: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0
-*603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0
-*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 3, 0
- unsigned_word b;
- unsigned_word EA;
- if (RA_is_0) b = 0;
- else b = *rA;
- EA = b + *rB;
- STORE(EA, 2, SWAP_2(*rS));
- PPC_INSN_INT(0, (RA_BITMASK & ~1) | RB_BITMASK | RS_BITMASK, 0);
-
-0.31,6.RS,11.RA,16.RB,21.662,31./:X:::Store Word Byte-Reversed Indexed
-*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*603: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0
-*603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0
-*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 3, 0
- unsigned_word b;
- unsigned_word EA;
- if (RA_is_0) b = 0;
- else b = *rA;
- EA = b + *rB;
- STORE(EA, 4, SWAP_4(*rS));
- PPC_INSN_INT(0, (RA_BITMASK & ~1) | RB_BITMASK | RS_BITMASK, 0);
-
-
-#
-# I.3.3.5 Fixed-Point Load and Store Multiple Instrctions
-#
-
-0.46,6.RT,11.RA,16.D:D:::Load Multiple Word
- unsigned_word EA;
- unsigned_word b;
- int r;
- if (RA_is_0) b = 0;
- else b = *rA;
- EA = b + EXTS(D);
- r = RT;
- if (RA >= r)
- program_interrupt(processor, cia,
- illegal_instruction_program_interrupt);
- if (CURRENT_ALIGNMENT == STRICT_ALIGNMENT || (EA % 4 != 0))
- alignment_interrupt(processor, cia, EA);
- while (r <= 31) {
- GPR(r) = MEM(unsigned, EA, 4);
- r = r + 1;
- EA = EA + 4;
- }
-
-0.47,6.RS,11.RA,16.D:D:::Store Multiple Word
- unsigned_word EA;
- unsigned_word b;
- int r;
- if (RA_is_0) b = 0;
- else b = *rA;
- EA = b + EXTS(D);
- if (CURRENT_ALIGNMENT == STRICT_ALIGNMENT
- || (EA % 4 != 0))
- alignment_interrupt(processor, cia, EA);
- r = RS;
- while (r <= 31) {
- STORE(EA, 4, GPR(r));
- r = r + 1;
- EA = EA + 4;
- }
-
-
-#
-# I.3.3.6 Fixed-Point Move Assist Instructions
-#
-
-0.31,6.RT,11.RA,16.NB,21.597,31./:X:::Load String Word Immediate
- unsigned_word EA;
- int n;
- int r;
- int i;
- int nr;
- if (RA_is_0) EA = 0;
- else EA = *rA;
- if (NB == 0) n = 32;
- else n = NB;
- r = RT - 1;
- i = 32;
- nr = (n + 3) / 4;
- if ((RT + nr >= 32)
- ? (RA >= RT || RA < (RT + nr) % 32)
- : (RA >= RT && RA < RT + nr))
- program_interrupt(processor, cia,
- illegal_instruction_program_interrupt);
- if (CURRENT_ALIGNMENT == STRICT_ALIGNMENT)
- alignment_interrupt(processor, cia, EA);
- while (n > 0) {
- if (i == 32) {
- r = (r + 1) % 32;
- GPR(r) = 0;
- }
- GPR(r) |= INSERTED(MEM(unsigned, EA, 1), i, i+7);
- if (i == 64) i = 32;
- EA = EA + 1;
- n = n - 1;
- }
-
-0.31,6.RT,11.RA,16.RB,21.533,31./:X:::Load String Word Indexed
- unsigned_word EA;
- unsigned_word b;
- int n;
- int r;
- int i;
- int nr;
- if (RA_is_0) b = 0;
- else b = *rA;
- EA = b + *rB;
- n = EXTRACTED32(XER, 25, 31);
- r = RT - 1;
- i = 32;
- nr = (n + 3) / 4;
- if (((RT + n >= 32)
- ? ((RA >= RT || RA < (RT + n) % 32)
- || (RB >= RT || RB < (RT + n) % 32))
- : ((RA >= RT && RA < RT + n)
- || (RB >= RT && RB < RT + n)))
- || (RT == RA || RT == RB))
- program_interrupt(processor, cia,
- illegal_instruction_program_interrupt);
- if (CURRENT_ALIGNMENT == STRICT_ALIGNMENT)
- alignment_interrupt(processor, cia, EA);
- while (n > 0) {
- if (i == 32) {
- r = (r + 1) % 32;
- GPR(i) = 0;
- }
- GPR(r) |= INSERTED(MEM(unsigned, EA, 1), i, i+7);
- i = i + 8;
- if (i == 64) i = 32;
- EA = EA + 1;
- n = n - 1;
- }
-
-0.31,6.RS,11.RA,16.NB,21.725,31./:X:::Store String Word Immedate
- unsigned_word EA;
- int n;
- int r;
- int i;
- if (RA_is_0) EA = 0;
- else EA = *rA;
- if (NB == 0) n = 32;
- else n = NB;
- r = RS - 1;
- i = 32;
- if (CURRENT_ALIGNMENT == STRICT_ALIGNMENT)
- alignment_interrupt(processor, cia, EA);
- while (n > 0) {
- if (i == 32) r = (r + 1) % 32;
- STORE(EA, 1, EXTRACTED(GPR(r), i, i+7));
- i = i + 8;
- if (i == 64) i = 32;
- EA = EA + 1;
- n = n - 1;
- }
-
-0.31,6.RS,11.RA,16.RB,21.661,31./:X:::Store String Word Indexed
- unsigned_word EA;
- unsigned_word b;
- int n;
- int r;
- int i;
- if (RA_is_0) b = 0;
- else b = *rA;
- EA = b + *rB;
- if (CURRENT_ALIGNMENT == STRICT_ALIGNMENT)
- alignment_interrupt(processor, cia, EA);
- n = EXTRACTED32(XER, 25, 31);
- r = RS - 1;
- i = 32;
- while (n > 0) {
- if (i == 32) r = (r + 1) % 32;
- STORE(EA, 1, EXTRACTED(GPR(r), i, i+7));
- i = i + 8;
- if (i == 64) i = 32;
- EA = EA + 1;
- n = n - 1;
- }
-
-
-#
-# I.3.3.7 Storage Synchronization Instructions
-#
-# HACK: Rather than monitor addresses looking for a reason
-# to cancel a reservation. This code instead keeps
-# a copy of the data read from memory. Before performing
-# a store, the memory area is checked to see if it has
-# been changed.
-0.31,6.RT,11.RA,16.RB,21.20,31./:X:::Load Word And Reserve Indexed
-*601: PPC_UNIT_IU, PPC_UNIT_IU, 2, 2, 0
-*603: PPC_UNIT_LSU, PPC_UNIT_IU, 1, 2, 0
-*603e:PPC_UNIT_LSU, PPC_UNIT_IU, 1, 2, 0
-*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 3, 0
- unsigned_word b;
- unsigned_word EA;
- if (RA_is_0) b = 0;
- else b = *rA;
- EA = b + *rB;
- RESERVE = 1;
- RESERVE_ADDR = real_addr(EA, 1/*is-read?*/);
- RESERVE_DATA = MEM(unsigned, EA, 4);
- *rT = RESERVE_DATA;
- PPC_INSN_INT(RT_BITMASK, (RA_BITMASK & ~1) | RB_BITMASK, 0);
-
-0.31,6.RT,11.RA,16.RB,21.84,31./:X:64::Load Doubleword And Reserve Indexed
- unsigned_word b;
- unsigned_word EA;
- if (RA_is_0) b = 0;
- else b = *rA;
- EA = b + *rB;
- RESERVE = 1;
- RESERVE_ADDR = real_addr(EA, 1/*is-read?*/);
- RESERVE_DATA = MEM(unsigned, EA, 8);
- *rT = RESERVE_DATA;
- PPC_INSN_INT(RT_BITMASK, (RA_BITMASK & ~1) | RB_BITMASK, 0);
-
-0.31,6.RS,11.RA,16.RB,21.150,31.1:X:::Store Word Conditional Indexed
-*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*603: PPC_UNIT_SRU, PPC_UNIT_SRU, 8, 8, 0
-*603e:PPC_UNIT_SRU, PPC_UNIT_SRU, 8, 8, 0
-*604: PPC_UNIT_BPU, PPC_UNIT_BPU, 1, 3, 0
- unsigned_word b;
- unsigned_word EA;
- if (RA_is_0) b = 0;
- else b = *rA;
- EA = b + *rB;
- if (RESERVE) {
- if (RESERVE_ADDR == real_addr(EA, 0/*is-read?*/)
- && /*HACK*/ RESERVE_DATA == MEM(unsigned, EA, 4)) {
- STORE(EA, 4, *rS);
- CR_SET_XER_SO(0, cr_i_zero);
- }
- else {
- /* ment to randomly to store, we never do! */
- CR_SET_XER_SO(0, 0);
- }
- RESERVE = 0;
- }
- else {
- CR_SET_XER_SO(0, 0);
- }
- PPC_INSN_INT(0, (RA_BITMASK & ~1) | RB_BITMASK | RS_BITMASK, 1/*Rc*/);
-
-0.31,6.RS,11.RA,16.RB,21.214,31.1:X:64::Store Doubleword Conditional Indexed
- unsigned_word b;
- unsigned_word EA;
- if (RA_is_0) b = 0;
- else b = *rA;
- EA = b + *rB;
- if (RESERVE) {
- if (RESERVE_ADDR == real_addr(EA, 0/*is-read?*/)
- && /*HACK*/ RESERVE_DATA == MEM(unsigned, EA, 8)) {
- STORE(EA, 8, *rS);
- CR_SET_XER_SO(0, cr_i_zero);
- }
- else {
- /* ment to randomly to store, we never do */
- CR_SET_XER_SO(0, 0);
- }
- RESERVE = 0;
- }
- else {
- CR_SET_XER_SO(0, 0);
- }
- PPC_INSN_INT(0, (RA_BITMASK & ~1) | RB_BITMASK | RS_BITMASK, 1/*Rc*/);
-
-0.31,6./,11./,16./,21.598,31./:X::sync:Synchronize
-*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*603: PPC_UNIT_SRU, PPC_UNIT_SRU, 1, 1, 0
-*603e:PPC_UNIT_SRU, PPC_UNIT_SRU, 1, 1, 0
-*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 1, 0
- /* do nothing */
-
-
-#
-# I.3.3.9 Fixed-Point Arithmetic Instructions
-#
-
-0.14,6.RT,11.RA,16.SI:D:::Add Immediate
-*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*603: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*603e:PPC_UNIT_IU, PPC_UNIT_SRU, 1, 1, 0
-*604: PPC_UNIT_SCIU1, PPC_UNIT_SCIU2, 1, 1, 0
- if (RA_is_0) *rT = EXTS(SI);
- else *rT = *rA + EXTS(SI);
- ITRACE(trace_alu, (" Result = %ld (0x%lx)\n", (long)*rT, (long)*rT));
- PPC_INSN_INT(RT_BITMASK, (RA_BITMASK & ~1), 0);
-
-0.15,6.RT,11.RA,16.SI:D:::Add Immediate Shifted
-*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*603: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*603e:PPC_UNIT_IU, PPC_UNIT_SRU, 1, 1, 0
-*604: PPC_UNIT_SCIU1, PPC_UNIT_SCIU2, 1, 1, 0
- if (RA_is_0) *rT = EXTS(SI) << 16;
- else *rT = *rA + (EXTS(SI) << 16);
- ITRACE(trace_alu, (" Result = %ld (0x%lx)\n", (long)*rT, (long)*rT));
- PPC_INSN_INT(RT_BITMASK, (RA_BITMASK & ~1), 0);
-
-0.31,6.RT,11.RA,16.RB,21.OE,22.266,31.Rc:XO:::Add
-*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*603: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*603e:PPC_UNIT_IU, PPC_UNIT_SRU, 1, 1, 0
-*604: PPC_UNIT_SCIU1, PPC_UNIT_SCIU2, 1, 1, 0
- ALU_BEGIN(*rA);
- ALU_ADD(*rB);
- ALU_END(*rT, 0/*CA*/, OE, Rc);
- PPC_INSN_INT(RT_BITMASK, RA_BITMASK | RB_BITMASK, Rc);
-
-0.31,6.RT,11.RA,16.RB,21.OE,22.40,31.Rc:XO:::Subtract From
-*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*603: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*603e:PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*604: PPC_UNIT_SCIU1, PPC_UNIT_SCIU2, 1, 1, 0
- ALU_BEGIN(*rA);
- ALU_NOT;
- ALU_ADD(*rB);
- ALU_ADD(1);
- ALU_END(*rT, 0/*CA*/, OE, Rc);
- PPC_INSN_INT(RT_BITMASK, RA_BITMASK | RB_BITMASK, Rc);
-
-0.12,6.RT,11.RA,16.SI:D:::Add Immediate Carrying
-*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*603: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*603e:PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*604: PPC_UNIT_SCIU1, PPC_UNIT_SCIU2, 1, 1, 0
- ALU_BEGIN(*rA);
- ALU_ADD(EXTS(SI));
- ALU_END(*rT, 1/*CA*/, 0/*OE*/, 0/*Rc*/);
- PPC_INSN_INT(RT_BITMASK, RA_BITMASK, 0/*Rc*/);
-
-0.13,6.RT,11.RA,16.SI:D:::Add Immediate Carrying and Record
-*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*603: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*603e:PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*604: PPC_UNIT_SCIU1, PPC_UNIT_SCIU2, 1, 1, 0
- ALU_BEGIN(*rA);
- ALU_ADD(EXTS(SI));
- ALU_END(*rT, 1/*CA*/, 0/*OE*/, 1/*Rc*/);
- PPC_INSN_INT(RT_BITMASK, RA_BITMASK, 1/*Rc*/);
-
-0.8,6.RT,11.RA,16.SI:D:::Subtract From Immediate Carrying
-*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*603: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*603e:PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*604: PPC_UNIT_SCIU1, PPC_UNIT_SCIU2, 1, 1, 0
- ALU_BEGIN(*rA);
- ALU_NOT;
- ALU_ADD(EXTS(SI));
- ALU_ADD(1);
- ALU_END(*rT, 1/*CA*/, 0/*OE*/, 0/*Rc*/);
- PPC_INSN_INT(RT_BITMASK, RA_BITMASK, 0/*Rc*/);
-
-0.31,6.RT,11.RA,16.RB,21.OE,22.10,31.Rc:XO:::Add Carrying
-*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*603: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*603e:PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*604: PPC_UNIT_SCIU1, PPC_UNIT_SCIU2, 1, 1, 0
- ALU_BEGIN(*rA);
- ALU_ADD(*rB);
- ALU_END(*rT, 1/*CA*/, OE, Rc);
- PPC_INSN_INT(RT_BITMASK, RA_BITMASK | RB_BITMASK, Rc);
-
-0.31,6.RT,11.RA,16.RB,21.OE,22.8,31.Rc:XO:::Subtract From Carrying
-*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*603: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*603e:PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*604: PPC_UNIT_SCIU1, PPC_UNIT_SCIU2, 1, 1, 0
- /* RT <- ~RA + RB + 1 === RT <- RB - RA */
- ALU_BEGIN(*rA);
- ALU_NOT;
- ALU_ADD(*rB);
- ALU_ADD(1);
- ALU_END(*rT, 1/*CA*/, OE, Rc);
- PPC_INSN_INT(RT_BITMASK, RA_BITMASK | RB_BITMASK, Rc);
-
-0.31,6.RT,11.RA,16.RB,21.OE,22.138,31.Rc:XO:::Add Extended
-*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*603: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*603e:PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*604: PPC_UNIT_SCIU1, PPC_UNIT_SCIU2, 1, 1, 0
- ALU_BEGIN(*rA);
- ALU_ADD(*rB);
- ALU_ADD_CA;
- ALU_END(*rT, 1/*CA*/, OE, Rc);
- PPC_INSN_INT(RT_BITMASK, RA_BITMASK | RB_BITMASK, Rc);
-
-0.31,6.RT,11.RA,16.RB,21.OE,22.136,31.Rc:XO:::Subtract From Extended
-*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*603: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*603e:PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*604: PPC_UNIT_SCIU1, PPC_UNIT_SCIU2, 1, 1, 0
- ALU_BEGIN(*rA);
- ALU_NOT;
- ALU_ADD(*rB);
- ALU_ADD_CA;
- ALU_END(*rT, 1/*CA*/, OE, Rc);
- PPC_INSN_INT(RT_BITMASK, RA_BITMASK | RB_BITMASK, Rc);
-
-0.31,6.RT,11.RA,16./,21.OE,22.234,31.Rc:XO:::Add to Minus One Extended
-*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*603: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*603e:PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*604: PPC_UNIT_SCIU1, PPC_UNIT_SCIU2, 1, 1, 0
- ALU_BEGIN(*rA);
- ALU_ADD_CA;
- ALU_ADD(-1);
- ALU_END(*rT, 1/*CA*/, OE, Rc);
- PPC_INSN_INT(RT_BITMASK, RA_BITMASK, Rc);
-
-0.31,6.RT,11.RA,16./,21.OE,22.232,31.Rc:XO:::Subtract From Minus One Extended
-*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*603: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*603e:PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*604: PPC_UNIT_SCIU1, PPC_UNIT_SCIU2, 1, 1, 0
- ALU_BEGIN(*rA);
- ALU_NOT;
- ALU_ADD_CA;
- ALU_ADD(-1);
- ALU_END(*rT, 1/*CA*/, OE, Rc);
- PPC_INSN_INT(RT_BITMASK, RA_BITMASK, Rc);
-
-0.31,6.RT,11.RA,16./,21.OE,22.202,31.Rc:XO::addze:Add to Zero Extended
-*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*603: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*603e:PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*604: PPC_UNIT_SCIU1, PPC_UNIT_SCIU2, 1, 1, 0
- ALU_BEGIN(*rA);
- ALU_ADD_CA;
- ALU_END(*rT, 1/*CA*/, OE, Rc);
- PPC_INSN_INT(RT_BITMASK, RA_BITMASK, Rc);
-
-0.31,6.RT,11.RA,16./,21.OE,22.200,31.Rc:XO:::Subtract from Zero Extended
-*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*603: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*603e:PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*604: PPC_UNIT_SCIU1, PPC_UNIT_SCIU2, 1, 1, 0
- ALU_BEGIN(*rA);
- ALU_NOT;
- ALU_ADD_CA;
- ALU_END(*rT, 1/*CA*/, OE, Rc);
- PPC_INSN_INT(RT_BITMASK, RA_BITMASK, Rc);
-
-0.31,6.RT,11.RA,16./,21.OE,22.104,31.Rc:XO:::Negate
-*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*603: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*603e:PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*604: PPC_UNIT_SCIU1, PPC_UNIT_SCIU2, 1, 1, 0
- ALU_BEGIN(*rA);
- ALU_NOT;
- ALU_ADD(1);
- ALU_END(*rT,0/*CA*/,OE,Rc);
- PPC_INSN_INT(RT_BITMASK, RA_BITMASK, Rc);
-
-0.7,6.RT,11.RA,16.SI:D::mulli:Multiply Low Immediate
-*601: PPC_UNIT_IU, PPC_UNIT_IU, 5, 5, 0
-*603: PPC_UNIT_IU, PPC_UNIT_IU, 3, 3, 0
-*603e:PPC_UNIT_IU, PPC_UNIT_IU, 3, 3, 0
-*604: PPC_UNIT_MCIU, PPC_UNIT_MCIU, 3, 3, 0
- signed_word prod = *rA * EXTS(SI);
- *rT = prod;
- PPC_INSN_INT(RT_BITMASK, RA_BITMASK, 0/*Rc*/);
-
-0.31,6.RT,11.RA,16.RB,21.OE,22.233,31.Rc:D:64::Multiply Low Doubleword
-
-0.31,6.RT,11.RA,16.RB,21.OE,22.235,31.Rc:XO::mullw:Multiply Low Word
-*601: PPC_UNIT_IU, PPC_UNIT_IU, 5, 5, 0
-*603: PPC_UNIT_IU, PPC_UNIT_IU, 5, 5, 0
-*603e:PPC_UNIT_IU, PPC_UNIT_IU, 5, 5, 0
-*604: PPC_UNIT_MCIU, PPC_UNIT_MCIU, 4, 4, 0
- signed64 a = (signed32)(*rA);
- signed64 b = (signed32)(*rB);
- signed64 prod = a * b;
- signed_word t = prod;
- *rT = *rA * *rB;
- if (t != prod && OE)
- XER |= (xer_overflow | xer_summary_overflow);
- CR0_COMPARE(t, 0, Rc);
- PPC_INSN_INT(RT_BITMASK, RA_BITMASK | RB_BITMASK, Rc);
-
-0.31,6.RT,11.RA,16.RB,21./,22.73,31.Rc:XO:64::Multiply High Doubleword
-
-0.31,6.RT,11.RA,16.RB,21./,22.75,31.Rc:XO::mulhw:Multiply High Word
-*601: PPC_UNIT_IU, PPC_UNIT_IU, 5, 5, 0
-*603: PPC_UNIT_IU, PPC_UNIT_IU, 5, 5, 0
-*603e:PPC_UNIT_IU, PPC_UNIT_IU, 5, 5, 0
-*604: PPC_UNIT_MCIU, PPC_UNIT_MCIU, 4, 4, 0
- signed64 a = (signed32)(*rA);
- signed64 b = (signed32)(*rB);
- signed64 prod = a * b;
- signed_word t = EXTRACTED64(prod, 0, 31);
- *rT = t;
- CR0_COMPARE(t, 0, Rc);
- PPC_INSN_INT(RT_BITMASK, RA_BITMASK | RB_BITMASK, Rc);
-
-0.31,6.RT,11.RA,16.RB,21./,22.9,31.Rc:XO:64::Multiply High Doubleword Unsigned
-
-0.31,6.RT,11.RA,16.RB,21./,22.11,31.Rc:XO::mulhwu:Multiply High Word Unsigned
-*601: PPC_UNIT_IU, PPC_UNIT_IU, 10, 10, 0
-*603: PPC_UNIT_IU, PPC_UNIT_IU, 6, 6, 0
-*603e:PPC_UNIT_IU, PPC_UNIT_IU, 6, 6, 0
-*604: PPC_UNIT_MCIU, PPC_UNIT_MCIU, 4, 4, 0
- unsigned64 a = (unsigned32)(*rA);
- unsigned64 b = (unsigned32)(*rB);
- unsigned64 prod = a * b;
- signed_word t = EXTRACTED64(prod, 0, 31);
- *rT = t;
- CR0_COMPARE(t, 0, Rc);
- PPC_INSN_INT(RT_BITMASK, RA_BITMASK | RB_BITMASK, Rc);
-
-0.31,6.RT,11.RA,16.RB,21.OE,22.489,31.Rc:XO:64::Divide Doubleword
-
-0.31,6.RT,11.RA,16.RB,21.OE,22.491,31.Rc:XO::divw:Divide Word
-*601: PPC_UNIT_IU, PPC_UNIT_IU, 36, 36, 0
-*603: PPC_UNIT_IU, PPC_UNIT_IU, 37, 37, 0
-*603e:PPC_UNIT_IU, PPC_UNIT_IU, 37, 37, 0
-*604: PPC_UNIT_MCIU, PPC_UNIT_MCIU, 20, 20, 0
- signed64 dividend = (signed32)(*rA);
- signed64 divisor = (signed32)(*rB);
- if (divisor == 0 /* nb 0x8000..0 is sign extended */
- || (dividend == 0x80000000 && divisor == -1)) {
- if (OE)
- XER |= (xer_overflow | xer_summary_overflow);
- CR0_COMPARE(0, 0, Rc);
- }
- else {
- signed64 quotent = dividend / divisor;
- *rT = quotent;
- CR0_COMPARE((signed_word)quotent, 0, Rc);
- }
- PPC_INSN_INT(RT_BITMASK, RA_BITMASK | RB_BITMASK, Rc);
-
-0.31,6.RT,11.RA,16.RB,21.OE,22.457,31.Rc:XO:64::Divide Doubleword Unsigned
-
-0.31,6.RT,11.RA,16.RB,21.OE,22.459,31.Rc:XO::divwu:Divide Word Unsigned
-*601: PPC_UNIT_IU, PPC_UNIT_IU, 36, 36, 0
-*603: PPC_UNIT_IU, PPC_UNIT_IU, 37, 37, 0
-*603e:PPC_UNIT_IU, PPC_UNIT_IU, 37, 37, 0
-*604: PPC_UNIT_MCIU, PPC_UNIT_MCIU, 20, 20, 0
- unsigned64 dividend = (unsigned32)(*rA);
- unsigned64 divisor = (unsigned32)(*rB);
- if (divisor == 0) {
- if (OE)
- XER |= (xer_overflow | xer_summary_overflow);
- CR0_COMPARE(0, 0, Rc);
- }
- else {
- unsigned64 quotent = dividend / divisor;
- *rT = quotent;
- CR0_COMPARE((signed_word)quotent, 0, Rc);
- }
- PPC_INSN_INT(RT_BITMASK, RA_BITMASK | RB_BITMASK, Rc);
-
-
-#
-# I.3.3.10 Fixed-Point Compare Instructions
-#
-
-0.11,6.BF,9./,10.L,11.RA,16.SI:D:::Compare Immediate
-*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*603: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*603e:PPC_UNIT_IU, PPC_UNIT_SRU, 1, 1, 0
-*604: PPC_UNIT_SCIU1, PPC_UNIT_SCIU2, 1, 1, 0
- if (!is_64bit_mode && L)
- program_interrupt(processor, cia,
- illegal_instruction_program_interrupt);
- else {
- signed_word a;
- signed_word b = EXTS(SI);
- if (L == 0)
- a = EXTENDED(*rA);
- else
- a = *rA;
- CR_COMPARE(BF, a, b);
- }
- PPC_INSN_INT_CR(0, RA_BITMASK, BF_BITMASK);
-
-0.31,6.BF,9./,10.L,11.RA,16.RB,21.0,31./:X:::Compare
-*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*603: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*603e:PPC_UNIT_IU, PPC_UNIT_SRU, 1, 1, 0
-*604: PPC_UNIT_SCIU1, PPC_UNIT_SCIU2, 1, 1, 0
- if (!is_64bit_mode && L)
- program_interrupt(processor, cia,
- illegal_instruction_program_interrupt);
- else {
- signed_word a;
- signed_word b;
- if (L == 0) {
- a = EXTENDED(*rA);
- b = EXTENDED(*rB);
- }
- else {
- a = *rA;
- b = *rB;
- }
- CR_COMPARE(BF, a, b);
- }
- PPC_INSN_INT_CR(0, RA_BITMASK | RB_BITMASK, BF_BITMASK);
-
-0.10,6.BF,9./,10.L,11.RA,16.UI:D:::Compare Logical Immediate
-*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*603: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*603e:PPC_UNIT_IU, PPC_UNIT_SRU, 1, 1, 0
-*604: PPC_UNIT_SCIU1, PPC_UNIT_SCIU2, 1, 1, 0
- if (!is_64bit_mode && L)
- program_interrupt(processor, cia,
- illegal_instruction_program_interrupt);
- else {
- unsigned_word a;
- unsigned_word b = UI;
- if (L == 0)
- a = MASKED(*rA, 32, 63);
- else
- a = *rA;
- CR_COMPARE(BF, a, b);
- }
- PPC_INSN_INT_CR(0, RA_BITMASK, BF_BITMASK);
-
-0.31,6.BF,9./,10.L,11.RA,16.RB,21.32,31./:X:::Compare Logical
-*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*603: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*603e:PPC_UNIT_IU, PPC_UNIT_SRU, 1, 1, 0
-*604: PPC_UNIT_SCIU1, PPC_UNIT_SCIU2, 1, 1, 0
- if (!is_64bit_mode && L)
- program_interrupt(processor, cia,
- illegal_instruction_program_interrupt);
- else {
- unsigned_word a;
- unsigned_word b;
- if (L == 0) {
- a = MASKED(*rA, 32, 63);
- b = MASKED(*rB, 32, 63);
- }
- else {
- a = *rA;
- b = *rB;
- }
- CR_COMPARE(BF, a, b);
- }
- PPC_INSN_INT_CR(0, RA_BITMASK | RB_BITMASK, BF_BITMASK);
-
-
-#
-# I.3.3.11 Fixed-Point Trap Instructions
-#
-
-0.2,6.TO,11.RA,16.SI:D:64::Trap Doubleword Immediate
- if (!is_64bit_mode)
- program_interrupt(processor, cia,
- illegal_instruction_program_interrupt);
- else {
- signed_word a = *rA;
- signed_word b = EXTS(SI);
- if ((a < b && TO{0})
- || (a > b && TO{1})
- || (a == b && TO{2})
- || ((unsigned_word)a < (unsigned_word)b && TO{3})
- || ((unsigned_word)a > (unsigned_word)b && TO{4})
- )
- program_interrupt(processor, cia,
- trap_program_interrupt);
- }
-
-0.3,6.TO,11.RA,16.SI:D:::Trap Word Immediate
-*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*603: PPC_UNIT_IU, PPC_UNIT_IU, 2, 2, 0
-*603e:PPC_UNIT_IU, PPC_UNIT_IU, 2, 2, 0
-*604: PPC_UNIT_SCIU1, PPC_UNIT_SCIU2, 1, 1, 0
- signed_word a = EXTENDED(*rA);
- signed_word b = EXTS(SI);
- if ((a < b && TO{0})
- || (a > b && TO{1})
- || (a == b && TO{2})
- || ((unsigned_word)a < (unsigned_word)b && TO{3})
- || ((unsigned_word)a > (unsigned_word)b && TO{4})
- )
- program_interrupt(processor, cia,
- trap_program_interrupt);
-
-0.31,6.TO,11.RA,16.RB,21.68,31./:X:64::Trap Doubleword
- if (!is_64bit_mode)
- program_interrupt(processor, cia,
- illegal_instruction_program_interrupt);
- else {
- signed_word a = *rA;
- signed_word b = *rB;
- if ((a < b && TO{0})
- || (a > b && TO{1})
- || (a == b && TO{2})
- || ((unsigned_word)a < (unsigned_word)b && TO{3})
- || ((unsigned_word)a > (unsigned_word)b && TO{4})
- )
- program_interrupt(processor, cia,
- trap_program_interrupt);
- }
-
-0.31,6.TO,11.RA,16.RB,21.4,31./:X:::Trap Word
-*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*603: PPC_UNIT_IU, PPC_UNIT_IU, 2, 2, 0
-*603e:PPC_UNIT_IU, PPC_UNIT_IU, 2, 2, 0
-*604: PPC_UNIT_SCIU1, PPC_UNIT_SCIU2, 1, 1, 0
- signed_word a = EXTENDED(*rA);
- signed_word b = EXTENDED(*rB);
- if (TO == 12 && rA == rB) {
- ITRACE(trace_breakpoint, ("breakpoint\n"));
- cpu_halt(processor, cia, was_trap, 0);
- }
- else if ((a < b && TO{0})
- || (a > b && TO{1})
- || (a == b && TO{2})
- || ((unsigned_word)a < (unsigned_word)b && TO{3})
- || ((unsigned_word)a > (unsigned_word)b && TO{4})
- )
- program_interrupt(processor, cia,
- trap_program_interrupt);
-
-#
-# I.3.3.12 Fixed-Point Logical Instructions
-#
-
-0.28,6.RS,11.RA,16.UI:D:::AND Immediate
-*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*603: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*603e:PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*604: PPC_UNIT_SCIU1, PPC_UNIT_SCIU2, 1, 1, 0
- *rA = *rS & UI;
- CR0_COMPARE(*rA, 0, 1/*Rc*/);
- ITRACE(trace_alu, (" Result = %ld (0x%lx)\n", (long)*rA, (long)*rA));
- PPC_INSN_INT(RA_BITMASK, RS_BITMASK, 1/*Rc*/);
-
-0.29,6.RS,11.RA,16.UI:D:::AND Immediate Shifted
-*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*603: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*603e:PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*604: PPC_UNIT_SCIU1, PPC_UNIT_SCIU2, 1, 1, 0
- *rA = *rS & (UI << 16);
- CR0_COMPARE(*rA, 0, 1/*Rc*/);
- ITRACE(trace_alu, (" Result = %ld (0x%lx)\n", (long)*rA, (long)*rA));
- PPC_INSN_INT(RA_BITMASK, RS_BITMASK, 1/*Rc*/);
-
-0.24,6.RS,11.RA,16.UI:D:::OR Immediate
-*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*603: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*603e:PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*604: PPC_UNIT_SCIU1, PPC_UNIT_SCIU2, 1, 1, 0
- *rA = *rS | UI;
- ITRACE(trace_alu, (" Result = %ld (0x%lx)\n", (long)*rA, (long)*rA));
- PPC_INSN_INT(RA_BITMASK, RS_BITMASK, 0/*Rc*/);
-
-0.25,6.RS,11.RA,16.UI:D:::OR Immediate Shifted
-*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*603: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*603e:PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*604: PPC_UNIT_SCIU1, PPC_UNIT_SCIU2, 1, 1, 0
- *rA = *rS | (UI << 16);
- ITRACE(trace_alu, (" Result = %ld (0x%lx)\n", (long)*rA, (long)*rA));
- PPC_INSN_INT(RA_BITMASK, RS_BITMASK, 0/*Rc*/);
-
-0.26,6.RS,11.RA,16.UI:D:::XOR Immediate
-*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*603: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*603e:PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*604: PPC_UNIT_SCIU1, PPC_UNIT_SCIU2, 1, 1, 0
- *rA = *rS ^ UI;
- ITRACE(trace_alu, (" Result = %ld (0x%lx)\n", (long)*rA, (long)*rA));
- PPC_INSN_INT(RA_BITMASK, RS_BITMASK, 0/*Rc*/);
-
-0.27,6.RS,11.RA,16.UI:D:::XOR Immediate Shifted
-*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*603: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*603e:PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*604: PPC_UNIT_SCIU1, PPC_UNIT_SCIU2, 1, 1, 0
- *rA = *rS ^ (UI << 16);
- ITRACE(trace_alu, (" Result = %ld (0x%lx)\n", (long)*rA, (long)*rA));
- PPC_INSN_INT(RA_BITMASK, RS_BITMASK, 0/*Rc*/);
-
-0.31,6.RS,11.RA,16.RB,21.28,31.Rc:X:::AND
-*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*603: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*603e:PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*604: PPC_UNIT_SCIU1, PPC_UNIT_SCIU2, 1, 1, 0
- *rA = *rS & *rB;
- CR0_COMPARE(*rA, 0, Rc);
- ITRACE(trace_alu, (" Result = %ld (0x%lx)\n", (long)*rA, (long)*rA));
- PPC_INSN_INT(RA_BITMASK, RS_BITMASK | RB_BITMASK, Rc);
-
-0.31,6.RS,11.RA,16.RB,21.444,31.Rc:X:::OR
-*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*603: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*603e:PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*604: PPC_UNIT_SCIU1, PPC_UNIT_SCIU2, 1, 1, 0
- *rA = *rS | *rB;
- CR0_COMPARE(*rA, 0, Rc);
- ITRACE(trace_alu, (" Result = %ld (0x%lx)\n", (long)*rA, (long)*rA));
- PPC_INSN_INT(RA_BITMASK, RS_BITMASK | RB_BITMASK, Rc);
-
-0.31,6.RS,11.RA,16.RB,21.316,31.Rc:X:::XOR
-*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*603: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*603e:PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*604: PPC_UNIT_SCIU1, PPC_UNIT_SCIU2, 1, 1, 0
- *rA = *rS ^ *rB;
- CR0_COMPARE(*rA, 0, Rc);
- ITRACE(trace_alu, (" Result = %ld (0x%lx)\n", (long)*rA, (long)*rA));
- PPC_INSN_INT(RA_BITMASK, RS_BITMASK | RB_BITMASK, Rc);
-
-0.31,6.RS,11.RA,16.RB,21.476,31.Rc:X:::NAND
-*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*603: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*603e:PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*604: PPC_UNIT_SCIU1, PPC_UNIT_SCIU2, 1, 1, 0
- *rA = ~(*rS & *rB);
- CR0_COMPARE(*rA, 0, Rc);
- ITRACE(trace_alu, (" Result = %ld (0x%lx)\n", (long)*rA, (long)*rA));
- PPC_INSN_INT(RA_BITMASK, RS_BITMASK | RB_BITMASK, Rc);
-
-0.31,6.RS,11.RA,16.RB,21.124,31.Rc:X:::NOR
-*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*603: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*603e:PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*604: PPC_UNIT_SCIU1, PPC_UNIT_SCIU2, 1, 1, 0
- *rA = ~(*rS | *rB);
- CR0_COMPARE(*rA, 0, Rc);
- ITRACE(trace_alu, (" Result = %ld (0x%lx)\n", (long)*rA, (long)*rA));
- PPC_INSN_INT(RA_BITMASK, RS_BITMASK | RB_BITMASK, Rc);
-
-0.31,6.RS,11.RA,16.RB,21.284,31.Rc:X:::Equivalent
-*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*603: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*603e:PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*604: PPC_UNIT_SCIU1, PPC_UNIT_SCIU2, 1, 1, 0
- *rA = ~(*rS ^ *rB); /* A === B */
- CR0_COMPARE(*rA, 0, Rc);
- ITRACE(trace_alu, (" Result = %ld (0x%lx)\n", (long)*rA, (long)*rA));
- PPC_INSN_INT(RA_BITMASK, RS_BITMASK | RB_BITMASK, Rc);
-
-0.31,6.RS,11.RA,16.RB,21.60,31.Rc:X:::AND with Complement
-*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*603: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*603e:PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*604: PPC_UNIT_SCIU1, PPC_UNIT_SCIU2, 1, 1, 0
- *rA = *rS & ~*rB;
- CR0_COMPARE(*rA, 0, Rc);
- ITRACE(trace_alu, (" Result = %ld (0x%lx)\n", (long)*rA, (long)*rA));
- PPC_INSN_INT(RA_BITMASK, RS_BITMASK | RB_BITMASK, Rc);
-
-0.31,6.RS,11.RA,16.RB,21.412,31.Rc:X:::OR with Complement
-*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*603: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*603e:PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*604: PPC_UNIT_SCIU1, PPC_UNIT_SCIU2, 1, 1, 0
- *rA = *rS | ~*rB;
- CR0_COMPARE(*rA, 0, Rc);
- ITRACE(trace_alu, (" Result = %ld (0x%lx)\n", (long)*rA, (long)*rA));
- PPC_INSN_INT(RA_BITMASK, RS_BITMASK | RB_BITMASK, Rc);
-
-0.31,6.RS,11.RA,16./,21.954,31.Rc:X::extsb:Extend Sign Byte
-*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*603: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*603e:PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*604: PPC_UNIT_SCIU1, PPC_UNIT_SCIU2, 1, 1, 0
- *rA = (signed_word)(signed8)*rS;
- CR0_COMPARE(*rA, 0, Rc);
- ITRACE(trace_alu, (" Result = %ld (0x%lx)\n", (long)*rA, (long)*rA));
- PPC_INSN_INT(RA_BITMASK, RS_BITMASK, Rc);
-
-0.31,6.RS,11.RA,16./,21.922,31.Rc:X::extsh:Extend Sign Half Word
-*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*603: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*603e:PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*604: PPC_UNIT_SCIU1, PPC_UNIT_SCIU2, 1, 1, 0
- *rA = (signed_word)(signed16)*rS;
- CR0_COMPARE(*rA, 0, Rc);
- ITRACE(trace_alu, (" Result = %ld (0x%lx)\n", (long)*rA, (long)*rA));
- PPC_INSN_INT(RA_BITMASK, RS_BITMASK, Rc);
-
-0.31,6.RS,11.RA,16./,21.986,31.Rc:X:64::Extend Sign Word
-*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*603: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*603e:PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*604: PPC_UNIT_SCIU1, PPC_UNIT_SCIU2, 1, 1, 0
-# *rA = (signed_word)(signed32)*rS;
-# CR0_COMPARE(*rA, 0, Rc);
-
-0.31,6.RS,11.RA,16./,21.58,31.Rc:X:64::Count Leading Zeros Doubleword
-# int count = 0;
-# unsigned64 mask = BIT64(0);
-# unsigned64 source = *rS;
-# while (!(source & mask) && mask != 0) {
-# mask >>= 1;
-# count++;
-# }
-# *rA = count;
-# CR0_COMPARE(count, 0, Rc); /* FIXME - is this correct */
-
-0.31,6.RS,11.RA,16./,21.26,31.Rc:X:::Count Leading Zeros Word
-*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*603: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*603e:PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*604: PPC_UNIT_SCIU1, PPC_UNIT_SCIU2, 1, 1, 0
- int count = 0;
- unsigned32 mask = BIT32(0);
- unsigned32 source = *rS;
- while (!(source & mask) && mask != 0) {
- mask >>= 1;
- count++;
- }
- *rA = count;
- ITRACE(trace_alu, (" Result = %ld (0x%lx)\n", (long)*rA, (long)*rA));
- CR0_COMPARE(count, 0, Rc); /* FIXME - is this correct */
-
-
-#
-# I.3.3.13 Fixed-Point Rotate and Shift Instructions
-#
-
-0.30,6.RS,11.RA,16.sh_0_4,21.mb,27.0,30.sh_5,31.Rc:MD:64::Rotate Left Doubleword Immediate then Clear Left
-# long n = (sh_5 << 4) | sh_0_4;
-# unsigned_word r = ROTL64(*rS, n);
-# long b = (mb_5 << 4) | mb_0_4;
-# unsigned_word m = MASK(b, 63);
-# signed_word result = r & m;
-# *rA = result;
-# ITRACE(trace_alu, (" Result = %ld (0x%lx)\n", (long)*rA, (long)*rA));
-# CR0_COMPARE(result, 0, Rc); /* FIXME - is this correct */
-
-0.30,6.RS,11.RA,16.sh_0_4,21.me,27.1,30.sh_5,31.Rc:MD:64::Rotate Left Doubleword Immediate then Clear Right
-# long n = (sh_5 << 4) | sh_0_4;
-# unsigned_word r = ROTL64(*rS, n);
-# long e = (me_5 << 4) | me_0_4;
-# unsigned_word m = MASK(0, e);
-# signed_word result = r & m;
-# *rA = result;
-# CR0_COMPARE(result, 0, Rc); /* FIXME - is this correct */
-
-0.30,6.RS,11.RA,16.sh_0_4,21.mb,27.2,30.sh_5,31.Rc:MD:64::Rotate Left Doubleword Immediate then Clear
-# long n = (sh_5 << 4) | sh_0_4;
-# unsigned_word r = ROTL64(*rS, n);
-# long b = (mb_5 << 4) | mb_0_4;
-# unsigned_word m = MASK(0, (64-n));
-# signed_word result = r & m;
-# *rA = result;
-# CR0_COMPARE(result, 0, Rc); /* FIXME - is this correct */
-
-0.21,6.RS,11.RA,16.SH,21.MB,26.ME,31.Rc:M:::Rotate Left Word Immediate then AND with Mask
-*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*603: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*603e:PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*604: PPC_UNIT_SCIU1, PPC_UNIT_SCIU2, 1, 1, 0
- long n = SH;
- unsigned32 s = *rS;
- unsigned32 r = ROTL32(s, n);
- unsigned32 m = MASK(MB+32, ME+32);
- signed_word result = r & m;
- *rA = result;
- CR0_COMPARE(result, 0, Rc);
- ITRACE(trace_alu,
- ("n=%ld, s=0x%lx, r=0x%lx, m=0x%lx, result=0x%lx, cr=0x%lx\n",
- n, (unsigned long)s, (unsigned long)r, (unsigned long)m,
- (unsigned long)result, (unsigned long)CR));
- PPC_INSN_INT(RA_BITMASK, RS_BITMASK, Rc);
-
-0.30,6.RS,11.RA,16.RB,21.mb,27.8,31.Rc:MDS:64::Rotate Left Doubleword then Clear Left
-# long n = MASKED(*rB, 58, 63);
-# unsigned_word r = ROTL64(*rS, n);
-# long b = (mb_5 << 4) | mb_0_4;
-# unsigned_word m = MASK(b, 63);
-# signed_word result = r & m;
-# *rA = result;
-# CR0_COMPARE(result, 0, Rc);
-
-0.30,6.RS,11.RA,16.RB,21.me,27.9,31.Rc:MDS:64::Rotate Left Doubleword then Clear Right
-# long n = MASKED(*rB, 58, 63);
-# unsigned_word r = ROTL64(*rS, n);
-# long e = (me_5 << 4) | me_0_4;
-# unsigned_word m = MASK(0, e);
-# signed_word result = r & m;
-# *rA = result;
-# CR0_COMPARE(result, 0, Rc);
-
-0.23,6.RS,11.RA,16.RB,21.MB,26.ME,31.Rc:M:::Rotate Left Word then AND with Mask
- long n = MASKED(*rB, 59, 63);
- unsigned32 r = ROTL32(*rS, n);
- unsigned32 m = MASK(MB+32, ME+32);
- signed_word result = r & m;
- *rA = result;
- CR0_COMPARE(result, 0, Rc);
-
-0.30,6.RS,11.RA,16.sh_0_4,21.mb,27.3,30.sh_5,31.Rc:MD:64::Rotate Left Doubleword Immediate then Mask Insert
-# long n = (sh_5 << 4) | sh_0_4;
-# unsigned_word r = ROTL64(*rS, n);
-# long b = (mb_5 << 4) | mb_0_4;
-# unsigned_word m = MASK(b, (64-n));
-# signed_word result = (r & m) | (*rA & ~m)
-# *rA = result;
-# CR0_COMPARE(result, 0, Rc);
-
-0.20,6.RS,11.RA,16.SH,21.MB,26.ME,31.Rc:M::rlwimi:Rotate Left Word Immediate then Mask Insert
-*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*603: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*603e:PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*604: PPC_UNIT_SCIU1, PPC_UNIT_SCIU2, 1, 1, 0
- long n = SH;
- unsigned32 r = ROTL32(*rS, n);
- unsigned32 m = MASK(MB+32, ME+32);
- signed_word result = (r & m) | (*rA & ~m);
- *rA = result;
- ITRACE(trace_alu, (": n=%ld *rS=0x%lx r=0x%lx m=0x%lx result=0x%lx\n",
- n, (unsigned long)*rS, (unsigned long)r, (unsigned long)m,
- (unsigned long)result));
- CR0_COMPARE(result, 0, Rc);
- PPC_INSN_INT(RA_BITMASK, RS_BITMASK, Rc);
-
-
-0.31,6.RS,11.RA,16.RB,21.27,31.Rc:X:64::Shift Left Doubleword
-
-0.31,6.RS,11.RA,16.RB,21.24,31.Rc:X:::Shift Left Word
-*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*603: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*603e:PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*604: PPC_UNIT_SCIU1, PPC_UNIT_SCIU2, 1, 1, 0
- int n = MASKED(*rB, 58, 63);
- unsigned32 source = *rS;
- signed_word shifted;
- if (n < 32)
- shifted = (source << n);
- else
- shifted = 0;
- *rA = shifted;
- CR0_COMPARE(shifted, 0, Rc);
- ITRACE(trace_alu,
- ("n=%d, source=0x%lx, shifted=0x%lx\n",
- n, (unsigned long)source, (unsigned long)shifted));
- PPC_INSN_INT(RA_BITMASK, RS_BITMASK, Rc);
-
-0.31,6.RS,11.RA,16.RB,21.539,31.Rc:X:64::Shift Right Doubleword
-
-0.31,6.RS,11.RA,16.RB,21.536,31.Rc:X:::Shift Right Word
-*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*603: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*603e:PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*604: PPC_UNIT_SCIU1, PPC_UNIT_SCIU2, 1, 1, 0
- int n = MASKED(*rB, 58, 63);
- unsigned32 source = *rS;
- signed_word shifted;
- if (n < 32)
- shifted = (source >> n);
- else
- shifted = 0;
- *rA = shifted;
- CR0_COMPARE(shifted, 0, Rc);
- ITRACE(trace_alu, \
- ("n=%d, source=0x%lx, shifted=0x%lx\n",
- n, (unsigned long)source, (unsigned long)shifted));
- PPC_INSN_INT(RA_BITMASK, RS_BITMASK, Rc);
-
-0.31,6.RS,11.RA,16.sh_0_4,21.413,30.sh_5,31.Rc:XS:64::Shift Right Algebraic Doubleword Immediate
-
-0.31,6.RS,11.RA,16.SH,21.824,31.Rc:X:::Shift Right Algebraic Word Immediate
-*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*603: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*603e:PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*604: PPC_UNIT_SCIU1, PPC_UNIT_SCIU2, 1, 1, 0
- int n = SH;
- signed_word r = ROTL32(*rS, /*64*/32-n);
- signed_word m = MASK(n+32, 63);
- int S = MASKED(*rS, 32, 32);
- signed_word shifted = (r & m) | (S ? ~m : 0);
- *rA = shifted;
- if (S && ((r & ~m) & MASK(32, 63)) != 0)
- XER |= xer_carry;
- else
- XER &= ~xer_carry;
- CR0_COMPARE(shifted, 0, Rc);
- ITRACE(trace_alu, (" Result = %ld (0x%lx), XER = %ld\n",
- (long)*rA, (long)*rA, (long)XER));
- PPC_INSN_INT(RA_BITMASK, RS_BITMASK, Rc);
-
-0.31,6.RS,11.RA,16.RB,21.794,31.Rc:X:64::Shift Right Algebraic Doubleword
-
-0.31,6.RS,11.RA,16.RB,21.792,31.Rc:X:::Shift Right Algebraic Word
-*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*603: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*603e:PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*604: PPC_UNIT_SCIU1, PPC_UNIT_SCIU2, 1, 1, 0
- unsigned64 mask;
- int n = MASKED(*rB, 59, 63);
- signed32 source = (signed32)*rS; /* signed to keep sign bit */
- signed32 shifted = source >> n;
- int S = (MASKED(*rS,32,32) != 0);
- signed64 r = ((unsigned64) source);
- r = ((unsigned64) source) << 32 | (unsigned32) source;
- r = ROTL64(r,64-n);
- if (MASKED(*rB,58,58) == 0)
- mask = (unsigned64) MASK64(n+32,63);
- else
- mask = (unsigned64) 0;
- *rA = (signed_word) (r & mask | ((signed64) -1*S) & ~mask); /* if 64bit will sign extend */
- if (S && (MASKED(r & ~mask,32,63)!=0))
- XER |= xer_carry;
- else
- XER &= ~xer_carry;
- CR0_COMPARE(*rA, 0, Rc);
- ITRACE(trace_alu, (" Result = %ld (0x%lx), XER = %ld\n",
- (long)*rA, (long)*rA, (long)XER));
- PPC_INSN_INT(RA_BITMASK, RS_BITMASK, Rc);
-
-#
-# I.3.3.14 Move to/from System Register Instructions
-#
-
-0.31,6.RS,11.SPR,21.467,31./:XFX::mtspr %SPR, %RS:Move to Special Purpose Register
-*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*603: PPC_UNIT_SRU, PPC_UNIT_SRU, 2, 2, 0
-*603e:PPC_UNIT_SRU, PPC_UNIT_SRU, 2, 2, 0
-*604: PPC_UNIT_MCIU, PPC_UNIT_MCIU, 1, 1, 0
- int n = (SPR{5:9} << 5) | SPR{0:4};
- if (SPR{0} && IS_PROBLEM_STATE(processor))
- program_interrupt(processor, cia,
- privileged_instruction_program_interrupt);
- else if (!spr_is_valid(n)
- || spr_is_readonly(n))
- program_interrupt(processor, cia,
- illegal_instruction_program_interrupt);
- else {
- spreg new_val = (spr_length(n) == 64
- ? *rS
- : MASKED(*rS, 32, 63));
- /* HACK - time base registers need to be updated immediatly */
- if (WITH_TIME_BASE) {
- switch (n) {
- case spr_tbu:
- cpu_set_time_base(processor,
- (MASKED64(cpu_get_time_base(processor), 32, 63)
- | INSERTED64(new_val, 0, 31)));
- break;
- case spr_tbl:
- cpu_set_time_base(processor,
- (MASKED64(cpu_get_time_base(processor), 0, 31)
- | INSERTED64(new_val, 32, 63)));
- break;
- case spr_dec:
- cpu_set_decrementer(processor, new_val);
- break;
- default:
- SPREG(n) = new_val;
- break;
- }
- }
- else {
- SPREG(n) = new_val;
- }
- }
- PPC_INSN_TO_SPR(RS_BITMASK, n);
-
-0.31,6.RT,11.SPR,21.339,31./:XFX::mfspr %RT, %SPR:Move from Special Purpose Register
-*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*603: PPC_UNIT_SRU, PPC_UNIT_SRU, 1, 1, 0
-*603e:PPC_UNIT_SRU, PPC_UNIT_SRU, 1, 1, 0
-*604: PPC_UNIT_MCIU, PPC_UNIT_MCIU, 3, 3, 0
- int n = (SPR{5:9} << 5) | SPR{0:4};
- if (SPR{0} && IS_PROBLEM_STATE(processor))
- program_interrupt(processor, cia,
- privileged_instruction_program_interrupt);
- else if (!spr_is_valid(n))
- program_interrupt(processor, cia,
- illegal_instruction_program_interrupt);
- else {
- /* HACK - time base registers need to be calculated */
- if (WITH_TIME_BASE) {
- switch (n) {
- case spr_dec:
- *rT = cpu_get_decrementer(processor);
- break;
- case spr_tbu:
- case spr_tbl:
- /* NOTE - these SPR's are not readable. Use mftb[ul] */
- default:
- *rT = SPREG(n);
- break;
- }
- }
- else {
- *rT = SPREG(n);
- }
- }
- PPC_INSN_FROM_SPR(RT_BITMASK, n);
-
-0.31,6.RS,11./,12.FXM,20./,21.144,31./:XFX::mtfcr:Move to Condition Register Fields
-*601: PPC_UNIT_IU, PPC_UNIT_IU, 2, 2, 0
-*603: PPC_UNIT_SRU, PPC_UNIT_SRU, 1, 1, 0
-*603e:PPC_UNIT_SRU, PPC_UNIT_SRU, 1, 1, 0
-*604: PPC_UNIT_MCIU, PPC_UNIT_MCIU, 1, 1, 0
- if (FXM == 0xff) {
- CR = *rS;
- }
- else {
- unsigned_word mask = 0;
- unsigned_word f;
- for (f = 0; f < 8; f++) {
- if (FXM & (0x80 >> f))
- mask |= (0xf << 4*(7-f));
- }
- CR = (MASKED(*rS, 32, 63) & mask) | (CR & ~mask);
- }
- PPC_INSN_MTCR(RS_BITMASK, FXM);
-
-0.31,6.BF,9./,11./,16./,21.512,31./:X:::Move to Condition Register from XER
-# CR_SET(BF, EXTRACTED32(XER, 0, 3));
-# MBLIT32(XER, 0, 3, 0);
-
-0.31,6.RT,11./,16./,21.19,31./:X:::Move From Condition Register
-*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*603: PPC_UNIT_SRU, PPC_UNIT_SRU, 1, 1, 0
-*603e:PPC_UNIT_SRU, PPC_UNIT_SRU, 1, 1, 0
-*604: PPC_UNIT_MCIU, PPC_UNIT_MCIU, 3, 3, 0
- *rT = (unsigned32)CR;
- PPC_INSN_MFCR(RT_BITMASK);
-
-#
-# I.4.6.2 Floating-Point Load Instructions
-#
-
-0.48,6.FRT,11.RA,16.D:D:f:lfs:Load Floating-Point Single
-*601: PPC_UNIT_IU, PPC_UNIT_IU, 3, 3, 0
-*603: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0
-*603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0
-*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 3, 0
- unsigned_word b;
- unsigned_word EA;
- if (RA_is_0) b = 0;
- else b = *rA;
- EA = b + EXTS(D);
- *frT = DOUBLE(MEM(unsigned, EA, 4));
- PPC_INSN_INT_FLOAT(0, FRT_BITMASK, (RA_BITMASK & ~1), 0);
-
-0.31,6.FRT,11.RA,16.RB,21.535,31./:X:f::Load Floating-Point Single Indexed
-*601: PPC_UNIT_IU, PPC_UNIT_IU, 3, 3, 0
-*603: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0
-*603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0
-*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 3, 0
- unsigned_word b;
- unsigned_word EA;
- if (RA_is_0) b = 0;
- else b = *rA;
- EA = b + *rB;
- *frT = DOUBLE(MEM(unsigned, EA, 4));
- PPC_INSN_INT_FLOAT(0, FRT_BITMASK, (RA_BITMASK & ~1) | RB_BITMASK, 0);
-
-0.49,6.FRT,11.RA,16.D:D:f::Load Floating-Point Single with Update
-*601: PPC_UNIT_IU, PPC_UNIT_IU, 3, 3, 0
-*603: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0
-*603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0
-*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 3, 0
- unsigned_word EA;
- if (RA_is_0)
- program_interrupt(processor, cia,
- illegal_instruction_program_interrupt);
- EA = *rA + EXTS(D);
- *frT = DOUBLE(MEM(unsigned, EA, 4));
- *rA = EA;
- PPC_INSN_INT_FLOAT(RA_BITMASK, FRT_BITMASK, (RA_BITMASK & ~1), 0);
-
-0.31,6.FRT,11.RA,16.RB,21.567,31./:X:f::Load Floating-Point Single with Update Indexed
-*601: PPC_UNIT_IU, PPC_UNIT_IU, 3, 3, 0
-*603: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0
-*603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0
-*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 3, 0
- unsigned_word EA;
- if (RA_is_0)
- program_interrupt(processor, cia,
- illegal_instruction_program_interrupt);
- EA = *rA + *rB;
- *frT = DOUBLE(MEM(unsigned, EA, 4));
- *rA = EA;
- PPC_INSN_INT_FLOAT(RA_BITMASK, FRT_BITMASK, (RA_BITMASK & ~1) | RB_BITMASK, 0);
-
-0.50,6.FRT,11.RA,16.D:D:f::Load Floating-Point Double
-*601: PPC_UNIT_IU, PPC_UNIT_IU, 3, 3, 0
-*603: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0
-*603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0
-*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 3, 0
- unsigned_word b;
- unsigned_word EA;
- if (RA_is_0) b = 0;
- else b = *rA;
- EA = b + EXTS(D);
- *frT = MEM(unsigned, EA, 8);
- PPC_INSN_INT_FLOAT(0, FRT_BITMASK, (RA_BITMASK & ~1), 0);
-
-0.31,6.FRT,11.RA,16.RB,21.599,31./:X:f::Load Floating-Point Double Indexed
-*601: PPC_UNIT_IU, PPC_UNIT_IU, 3, 3, 0
-*603: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0
-*603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0
-*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 3, 0
- unsigned_word b;
- unsigned_word EA;
- if (RA_is_0) b = 0;
- else b = *rA;
- EA = b + *rB;
- *frT = MEM(unsigned, EA, 8);
- PPC_INSN_INT_FLOAT(0, FRT_BITMASK, (RA_BITMASK & ~1) | RB_BITMASK, 0);
-
-0.51,6.FRT,11.RA,16.D:D:f::Load Floating-Point Double with Update
-*601: PPC_UNIT_IU, PPC_UNIT_IU, 3, 3, 0
-*603: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0
-*603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0
-*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 3, 0
- unsigned_word EA;
- if (RA_is_0)
- program_interrupt(processor, cia,
- illegal_instruction_program_interrupt);
- EA = *rA + EXTS(D);
- *frT = MEM(unsigned, EA, 8);
- *rA = EA;
- PPC_INSN_INT_FLOAT(RA_BITMASK, FRT_BITMASK, (RA_BITMASK & ~1), 0);
-
-0.31,6.FRT,11.RA,16.RB,21.631,31./:X:f::Load Floating-Point Double with Update Indexed
-*601: PPC_UNIT_IU, PPC_UNIT_IU, 3, 3, 0
-*603: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0
-*603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0
-*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 3, 0
- unsigned_word EA;
- if (RA_is_0)
- program_interrupt(processor, cia,
- illegal_instruction_program_interrupt);
- EA = *rA + *rB;
- *frT = MEM(unsigned, EA, 8);
- *rA = EA;
- PPC_INSN_INT_FLOAT(RA_BITMASK, FRT_BITMASK, (RA_BITMASK & ~1) | RB_BITMASK, 0);
-
-
-#
-# I.4.6.3 Floating-Point Store Instructions
-#
-
-0.52,6.FRS,11.RA,16.D:D:f::Store Floating-Point Single
-*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*603: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0
-*603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0
-*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 3, 0
- unsigned_word b;
- unsigned_word EA;
- if (RA_is_0) b = 0;
- else b = *rA;
- EA = b + EXTS(D);
- STORE(EA, 4, SINGLE(*frS));
- PPC_INSN_INT_FLOAT(0, 0, (RA_BITMASK & ~1), FRS_BITMASK);
-
-0.31,6.FRS,11.RA,16.RB,21.663,31./:X:f::Store Floating-Point Single Indexed
-*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*603: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0
-*603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0
-*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 3, 0
- unsigned_word b;
- unsigned_word EA;
- if (RA_is_0) b = 0;
- else b = *rA;
- EA = b + *rB;
- STORE(EA, 4, SINGLE(*frS));
- PPC_INSN_INT_FLOAT(0, 0, (RA_BITMASK & ~1) | RB_BITMASK, FRS_BITMASK);
-
-0.53,6.FRS,11.RA,16.D:D:f::Store Floating-Point Single with Update
-*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*603: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0
-*603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0
-*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 3, 0
- unsigned_word EA;
- if (RA_is_0)
- program_interrupt(processor, cia,
- illegal_instruction_program_interrupt);
- EA = *rA + EXTS(D);
- STORE(EA, 4, SINGLE(*frS));
- *rA = EA;
- PPC_INSN_INT_FLOAT(RA_BITMASK, 0, (RA_BITMASK & ~1), FRS_BITMASK);
-
-0.31,6.FRS,11.RA,16.RB,21.695,31./:X:f::Store Floating-Point Single with Update Indexed
-*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*603: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0
-*603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0
-*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 3, 0
- unsigned_word EA;
- if (RA_is_0)
- program_interrupt(processor, cia,
- illegal_instruction_program_interrupt);
- EA = *rA + *rB;
- STORE(EA, 4, SINGLE(*frS));
- *rA = EA;
- PPC_INSN_INT_FLOAT(RA_BITMASK, 0, (RA_BITMASK & ~1) | RB_BITMASK, FRS_BITMASK);
-
-0.54,6.FRS,11.RA,16.D:D:f::Store Floating-Point Double
-*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*603: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0
-*603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0
-*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 3, 0
- unsigned_word b;
- unsigned_word EA;
- if (RA_is_0) b = 0;
- else b = *rA;
- EA = b + EXTS(D);
- STORE(EA, 8, *frS);
- PPC_INSN_INT_FLOAT(0, 0, (RA_BITMASK & ~1), FRS_BITMASK);
-
-0.31,6.FRS,11.RA,16.RB,21.727,31./:X:f::Store Floating-Point Double Indexed
-*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*603: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0
-*603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0
-*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 3, 0
- unsigned_word b;
- unsigned_word EA;
- if (RA_is_0) b = 0;
- else b = *rA;
- EA = b + *rB;
- STORE(EA, 8, *frS);
- PPC_INSN_INT_FLOAT(0, 0, (RA_BITMASK & ~1) | RB_BITMASK, FRS_BITMASK);
-
-0.55,6.FRS,11.RA,16.D:D:f::Store Floating-Point Double with Update
-*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*603: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0
-*603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0
-*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 3, 0
- unsigned_word EA;
- if (RA_is_0)
- program_interrupt(processor, cia,
- illegal_instruction_program_interrupt);
- EA = *rA + EXTS(D);
- STORE(EA, 8, *frS);
- *rA = EA;
- PPC_INSN_INT_FLOAT(RA_BITMASK, 0, (RA_BITMASK & ~1), FRS_BITMASK);
-
-0.31,6.FRS,11.RA,16.RB,21.759,31./:X:f::Store Floating-Point Double with Update Indexed
-*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*603: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0
-*603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0
-*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 3, 0
- unsigned_word EA;
- if (RA_is_0)
- program_interrupt(processor, cia,
- illegal_instruction_program_interrupt);
- EA = *rA + *rB;
- STORE(EA, 8, *frS);
- *rA = EA;
- PPC_INSN_INT_FLOAT(RA_BITMASK, 0, (RA_BITMASK & ~1) | RB_BITMASK, FRS_BITMASK);
-
-
-#
-# I.4.6.4 Floating-Point Move Instructions
-#
-
-0.63,6.FRT,11./,16.FRB,21.72,31.Rc:X:f::Floating Move Register
-*601: PPC_UNIT_FPU, PPC_UNIT_FPU, 4, 4, 0
-*603: PPC_UNIT_FPU, PPC_UNIT_FPU, 1, 3, 0
-*603e:PPC_UNIT_FPU, PPC_UNIT_FPU, 1, 3, 0
-*604: PPC_UNIT_FPU, PPC_UNIT_FPU, 1, 3, 0
- *frT = *frB;
- CR1_UPDATE(Rc);
- PPC_INSN_FLOAT(FRT_BITMASK, FRB_BITMASK, Rc);
-
-0.63,6.FRT,11./,16.FRB,21.40,31.Rc:X:f::Floating Negate
-*601: PPC_UNIT_FPU, PPC_UNIT_FPU, 4, 4, 0
-*603: PPC_UNIT_FPU, PPC_UNIT_FPU, 1, 3, 0
-*603e:PPC_UNIT_FPU, PPC_UNIT_FPU, 1, 3, 0
-*604: PPC_UNIT_FPU, PPC_UNIT_FPU, 1, 3, 0
- *frT = *frB ^ BIT64(0);
- CR1_UPDATE(Rc);
- PPC_INSN_FLOAT(FRT_BITMASK, FRB_BITMASK, Rc);
-
-0.63,6.FRT,11./,16.FRB,21.264,31.Rc:X:f::Floating Absolute Value
-*601: PPC_UNIT_FPU, PPC_UNIT_FPU, 4, 4, 0
-*603: PPC_UNIT_FPU, PPC_UNIT_FPU, 1, 3, 0
-*603e:PPC_UNIT_FPU, PPC_UNIT_FPU, 1, 3, 0
-*604: PPC_UNIT_FPU, PPC_UNIT_FPU, 1, 3, 0
- *frT = *frB & ~BIT64(0);
- CR1_UPDATE(Rc);
- PPC_INSN_FLOAT(FRT_BITMASK, FRB_BITMASK, Rc);
-
-0.63,6.FRT,11./,16.FRB,21.136,31.Rc:X:f::Floating Negative Absolute Value
-*601: PPC_UNIT_FPU, PPC_UNIT_FPU, 4, 4, 0
-*603: PPC_UNIT_FPU, PPC_UNIT_FPU, 1, 3, 0
-*603e:PPC_UNIT_FPU, PPC_UNIT_FPU, 1, 3, 0
-*604: PPC_UNIT_FPU, PPC_UNIT_FPU, 1, 3, 0
- *frT = *frB | BIT64(0);
- CR1_UPDATE(Rc);
- PPC_INSN_FLOAT(FRT_BITMASK, FRB_BITMASK, Rc);
-
-
-#
-# I.4.6.5 Floating-Point Arithmetic Instructions
-#
-
-0.63,6.FRT,11.FRA,16.FRB,21./,26.21,31.Rc:A:f:fadd:Floating Add
-*601: PPC_UNIT_FPU, PPC_UNIT_FPU, 4, 4, 0
-*603: PPC_UNIT_FPU, PPC_UNIT_FPU, 1, 3, 0
-*603e:PPC_UNIT_FPU, PPC_UNIT_FPU, 1, 3, 0
-*604: PPC_UNIT_FPU, PPC_UNIT_FPU, 1, 3, 0
- FPSCR_BEGIN;
- if (is_invalid_operation(processor, cia,
- *frA, *frB,
- fpscr_vxsnan | fpscr_vxisi,
- 0, /*single?*/
- 0) /*negate?*/) {
- invalid_arithemetic_operation(processor, cia,
- frT, *frA, *frB, 0,
- 0, /*instruction_is_frsp*/
- 0, /*instruction_is_convert_to_64bit*/
- 0, /*instruction_is_convert_to_32bit*/
- 0); /*single-precision*/
- }
- else {
- /*HACK!*/
- double s = *(double*)frA + *(double*)frB;
- *(double*)frT = s;
- }
- FPSCR_END(Rc);
- PPC_INSN_FLOAT(FRT_BITMASK, FRA_BITMASK | FRB_BITMASK, Rc);
-
-0.59,6.FRT,11.FRA,16.FRB,21./,26.21,31.Rc:A:f:fadds:Floating Add Single
-*601: PPC_UNIT_FPU, PPC_UNIT_FPU, 4, 4, 0
-*603: PPC_UNIT_FPU, PPC_UNIT_FPU, 1, 3, 0
-*603e:PPC_UNIT_FPU, PPC_UNIT_FPU, 1, 3, 0
-*604: PPC_UNIT_FPU, PPC_UNIT_FPU, 1, 3, 0
- FPSCR_BEGIN;
- if (is_invalid_operation(processor, cia,
- *frA, *frB,
- fpscr_vxsnan | fpscr_vxisi,
- 1, /*single?*/
- 0) /*negate?*/) {
- invalid_arithemetic_operation(processor, cia,
- frT, *frA, *frB, 0,
- 0, /*instruction_is_frsp*/
- 0, /*instruction_is_convert_to_64bit*/
- 0, /*instruction_is_convert_to_32bit*/
- 1); /*single-precision*/
- }
- else {
- /*HACK!*/
- float s = *(double*)frA + *(double*)frB;
- *(double*)frT = s;
- }
- FPSCR_END(Rc);
- PPC_INSN_FLOAT(FRT_BITMASK, FRA_BITMASK | FRB_BITMASK, Rc);
-
-0.63,6.FRT,11.FRA,16.FRB,21./,26.20,31.Rc:A:f:fsub:Floating Subtract
-*601: PPC_UNIT_FPU, PPC_UNIT_FPU, 4, 4, 0
-*603: PPC_UNIT_FPU, PPC_UNIT_FPU, 1, 3, 0
-*603e:PPC_UNIT_FPU, PPC_UNIT_FPU, 1, 3, 0
-*604: PPC_UNIT_FPU, PPC_UNIT_FPU, 1, 3, 0
- FPSCR_BEGIN;
- if (is_invalid_operation(processor, cia,
- *frA, *frB,
- fpscr_vxsnan | fpscr_vxisi,
- 0, /*single?*/
- 1) /*negate?*/) {
- invalid_arithemetic_operation(processor, cia,
- frT, *frA, *frB, 0,
- 0, /*instruction_is_frsp*/
- 0, /*instruction_is_convert_to_64bit*/
- 0, /*instruction_is_convert_to_32bit*/
- 0); /*single-precision*/
- }
- else {
- /*HACK!*/
- double s = *(double*)frA - *(double*)frB;
- *(double*)frT = s;
- }
- FPSCR_END(Rc);
- PPC_INSN_FLOAT(FRT_BITMASK, FRA_BITMASK | FRB_BITMASK, Rc);
-
-0.59,6.FRT,11.FRA,16.FRB,21./,26.20,31.Rc:A:f:fsubs:Floating Subtract Single
-*601: PPC_UNIT_FPU, PPC_UNIT_FPU, 4, 4, 0
-*603: PPC_UNIT_FPU, PPC_UNIT_FPU, 1, 3, 0
-*603e:PPC_UNIT_FPU, PPC_UNIT_FPU, 1, 3, 0
-*604: PPC_UNIT_FPU, PPC_UNIT_FPU, 1, 3, 0
- FPSCR_BEGIN;
- if (is_invalid_operation(processor, cia,
- *frA, *frB,
- fpscr_vxsnan | fpscr_vxisi,
- 1, /*single?*/
- 1) /*negate?*/) {
- invalid_arithemetic_operation(processor, cia,
- frT, *frA, *frB, 0,
- 0, /*instruction_is_frsp*/
- 0, /*instruction_is_convert_to_64bit*/
- 0, /*instruction_is_convert_to_32bit*/
- 1); /*single-precision*/
- }
- else {
- /*HACK!*/
- float s = *(double*)frA - *(double*)frB;
- *(double*)frT = s;
- }
- FPSCR_END(Rc);
- PPC_INSN_FLOAT(FRT_BITMASK, FRA_BITMASK | FRB_BITMASK, Rc);
-
-0.63,6.FRT,11.FRA,16./,21.FRC,26.25,31.Rc:A:f:fmul:Floating Multiply
-*601: PPC_UNIT_FPU, PPC_UNIT_FPU, 5, 5, 0
-*603: PPC_UNIT_FPU, PPC_UNIT_FPU, 2, 4, 0
-*603e:PPC_UNIT_FPU, PPC_UNIT_FPU, 2, 4, 0
-*604: PPC_UNIT_FPU, PPC_UNIT_FPU, 1, 3, 0
- FPSCR_BEGIN;
- if (is_invalid_operation(processor, cia,
- *frA, *frC,
- fpscr_vxsnan | fpscr_vximz,
- 0, /*single?*/
- 0) /*negate?*/) {
- invalid_arithemetic_operation(processor, cia,
- frT, *frA, 0, *frC,
- 0, /*instruction_is_frsp*/
- 0, /*instruction_is_convert_to_64bit*/
- 0, /*instruction_is_convert_to_32bit*/
- 0); /*single-precision*/
- }
- else {
- /*HACK!*/
- double s = *(double*)frA * *(double*)frC;
- *(double*)frT = s;
- }
- FPSCR_END(Rc);
- PPC_INSN_FLOAT(FRT_BITMASK, FRA_BITMASK | FRC_BITMASK, Rc);
-
-0.59,6.FRT,11.FRA,16./,21.FRC,26.25,31.Rc:A:f:fmuls:Floating Multiply Single
-*601: PPC_UNIT_FPU, PPC_UNIT_FPU, 4, 4, 0
-*603: PPC_UNIT_FPU, PPC_UNIT_FPU, 1, 3, 0
-*603e:PPC_UNIT_FPU, PPC_UNIT_FPU, 1, 3, 0
-*604: PPC_UNIT_FPU, PPC_UNIT_FPU, 1, 3, 0
- FPSCR_BEGIN;
- if (is_invalid_operation(processor, cia,
- *frA, *frC,
- fpscr_vxsnan | fpscr_vximz,
- 1, /*single?*/
- 0) /*negate?*/) {
- invalid_arithemetic_operation(processor, cia,
- frT, *frA, 0, *frC,
- 0, /*instruction_is_frsp*/
- 0, /*instruction_is_convert_to_64bit*/
- 0, /*instruction_is_convert_to_32bit*/
- 1); /*single-precision*/
- }
- else {
- /*HACK!*/
- float s = *(double*)frA * *(double*)frC;
- *(double*)frT = s;
- }
- FPSCR_END(Rc);
- PPC_INSN_FLOAT(FRT_BITMASK, FRA_BITMASK | FRC_BITMASK, Rc);
-
-0.63,6.FRT,11.FRA,16.FRB,21./,26.18,31.Rc:A:f:fdiv:Floating Divide
-*601: PPC_UNIT_FPU, PPC_UNIT_FPU, 31, 31, 0
-*603: PPC_UNIT_FPU, PPC_UNIT_FPU, 33, 33, 0
-*603e:PPC_UNIT_FPU, PPC_UNIT_FPU, 33, 33, 0
-*604: PPC_UNIT_FPU, PPC_UNIT_FPU, 32, 32, 0
- FPSCR_BEGIN;
- if (is_invalid_operation(processor, cia,
- *frA, *frB,
- fpscr_vxsnan | fpscr_vxzdz,
- 0, /*single?*/
- 0) /*negate?*/) {
- invalid_arithemetic_operation(processor, cia,
- frT, *frA, *frB, 0,
- 0, /*instruction_is_frsp*/
- 0, /*instruction_is_convert_to_64bit*/
- 0, /*instruction_is_convert_to_32bit*/
- 0); /*single-precision*/
- }
- else if (is_invalid_zero_divide (processor, cia,
- *frA, *frB,
- 0 /*single?*/)) {
- invalid_zero_divide_operation (processor, cia,
- frT, *frA, *frB,
- 0 /*single?*/);
- }
- else {
- /*HACK!*/
- double s = *(double*)frA / *(double*)frB;
- *(double*)frT = s;
- }
- FPSCR_END(Rc);
- PPC_INSN_FLOAT(FRT_BITMASK, FRA_BITMASK | FRB_BITMASK, Rc);
-
-0.59,6.FRT,11.FRA,16.FRB,21./,26.18,31.Rc:A:f:fdivs:Floating Divide Single
-*601: PPC_UNIT_FPU, PPC_UNIT_FPU, 17, 17, 0
-*603: PPC_UNIT_FPU, PPC_UNIT_FPU, 18, 18, 0
-*603e:PPC_UNIT_FPU, PPC_UNIT_FPU, 18, 18, 0
-*604: PPC_UNIT_FPU, PPC_UNIT_FPU, 18, 18, 0
- FPSCR_BEGIN;
- if (is_invalid_operation(processor, cia,
- *frA, *frB,
- fpscr_vxsnan | fpscr_vxzdz,
- 1, /*single?*/
- 0) /*negate?*/) {
- invalid_arithemetic_operation(processor, cia,
- frT, *frA, *frB, 0,
- 0, /*instruction_is_frsp*/
- 0, /*instruction_is_convert_to_64bit*/
- 0, /*instruction_is_convert_to_32bit*/
- 1); /*single-precision*/
- }
- else if (is_invalid_zero_divide (processor, cia,
- *frA, *frB,
- 1 /*single?*/)) {
- invalid_zero_divide_operation (processor, cia,
- frT, *frA, *frB,
- 1 /*single?*/);
- }
- else {
- /*HACK!*/
- float s = *(double*)frA / *(double*)frB;
- *(double*)frT = s;
- }
- FPSCR_END(Rc);
- PPC_INSN_FLOAT(FRT_BITMASK, FRA_BITMASK | FRB_BITMASK, Rc);
-
-0.63,6.FRT,11.FRA,16.FRB,21.FRC,26.29,31.Rc:A:f:fmadd:Floating Multiply-Add
-*601: PPC_UNIT_FPU, PPC_UNIT_FPU, 5, 5, 0
-*603: PPC_UNIT_FPU, PPC_UNIT_FPU, 2, 4, 0
-*603e:PPC_UNIT_FPU, PPC_UNIT_FPU, 2, 4, 0
-*604: PPC_UNIT_FPU, PPC_UNIT_FPU, 1, 3, 0
- FPSCR_BEGIN;
- double product; /*HACK! - incorrectly loosing precision ... */
- /* compute the multiply */
- if (is_invalid_operation(processor, cia,
- *frA, *frC,
- fpscr_vxsnan | fpscr_vximz,
- 0, /*single?*/
- 0) /*negate?*/) {
- invalid_arithemetic_operation(processor, cia,
- (unsigned64*)&product, *frA, 0, *frC,
- 0, /*instruction_is_frsp*/
- 0, /*instruction_is_convert_to_64bit*/
- 0, /*instruction_is_convert_to_32bit*/
- 0); /*single-precision*/
- }
- else {
- /*HACK!*/
- product = *(double*)frA * *(double*)frC;
- }
- /* compute the add */
- if (is_invalid_operation(processor, cia,
- product, *frB,
- fpscr_vxsnan | fpscr_vxisi,
- 0, /*single?*/
- 0) /*negate?*/) {
- invalid_arithemetic_operation(processor, cia,
- frT, product, *frB, 0,
- 0, /*instruction_is_frsp*/
- 0, /*instruction_is_convert_to_64bit*/
- 0, /*instruction_is_convert_to_32bit*/
- 0); /*single-precision*/
- }
- else {
- /*HACK!*/
- double s = product + *(double*)frB;
- *(double*)frT = s;
- }
- FPSCR_END(Rc);
- PPC_INSN_FLOAT(FRT_BITMASK, FRA_BITMASK | FRB_BITMASK | FRC_BITMASK, Rc);
-
-0.59,6.FRT,11.FRA,16.FRB,21.FRC,26.29,31.Rc:A:f::Floating Multiply-Add Single
-*601: PPC_UNIT_FPU, PPC_UNIT_FPU, 4, 4, 0
-*603: PPC_UNIT_FPU, PPC_UNIT_FPU, 1, 3, 0
-*603e:PPC_UNIT_FPU, PPC_UNIT_FPU, 1, 3, 0
-*604: PPC_UNIT_FPU, PPC_UNIT_FPU, 1, 3, 0
- FPSCR_BEGIN;
- float product; /*HACK! - incorrectly loosing precision ... */
- /* compute the multiply */
- if (is_invalid_operation(processor, cia,
- *frA, *frC,
- fpscr_vxsnan | fpscr_vximz,
- 1, /*single?*/
- 0) /*negate?*/) {
- invalid_arithemetic_operation(processor, cia,
- (unsigned64*)&product, *frA, 0, *frC,
- 0, /*instruction_is_frsp*/
- 0, /*instruction_is_convert_to_64bit*/
- 0, /*instruction_is_convert_to_32bit*/
- 0); /*single-precision*/
- }
- else {
- /*HACK!*/
- product = *(double*)frA * *(double*)frC;
- }
- /* compute the add */
- if (is_invalid_operation(processor, cia,
- product, *frB,
- fpscr_vxsnan | fpscr_vxisi,
- 1, /*single?*/
- 0) /*negate?*/) {
- invalid_arithemetic_operation(processor, cia,
- frT, product, *frB, 0,
- 0, /*instruction_is_frsp*/
- 0, /*instruction_is_convert_to_64bit*/
- 0, /*instruction_is_convert_to_32bit*/
- 0); /*single-precision*/
- }
- else {
- /*HACK!*/
- float s = product + *(double*)frB;
- *(double*)frT = (double)s;
- }
- FPSCR_END(Rc);
- PPC_INSN_FLOAT(FRT_BITMASK, FRA_BITMASK | FRB_BITMASK | FRC_BITMASK, Rc);
-
-0.63,6.FRT,11.FRA,16.FRB,21.FRC,26.28,31.Rc:A:f::Floating Multiply-Subtract
-*601: PPC_UNIT_FPU, PPC_UNIT_FPU, 5, 5, 0
-*603: PPC_UNIT_FPU, PPC_UNIT_FPU, 2, 4, 0
-*603e:PPC_UNIT_FPU, PPC_UNIT_FPU, 2, 4, 0
-*604: PPC_UNIT_FPU, PPC_UNIT_FPU, 1, 3, 0
- FPSCR_BEGIN;
- double product; /*HACK! - incorrectly loosing precision ... */
- /* compute the multiply */
- if (is_invalid_operation(processor, cia,
- *frA, *frC,
- fpscr_vxsnan | fpscr_vximz,
- 0, /*single?*/
- 0) /*negate?*/) {
- invalid_arithemetic_operation(processor, cia,
- (unsigned64*)&product, *frA, 0, *frC,
- 0, /*instruction_is_frsp*/
- 0, /*instruction_is_convert_to_64bit*/
- 0, /*instruction_is_convert_to_32bit*/
- 0); /*single-precision*/
- }
- else {
- /*HACK!*/
- product = *(double*)frA * *(double*)frC;
- }
- /* compute the subtract */
- if (is_invalid_operation(processor, cia,
- product, *frB,
- fpscr_vxsnan | fpscr_vxisi,
- 0, /*single?*/
- 0) /*negate?*/) {
- invalid_arithemetic_operation(processor, cia,
- frT, product, *frB, 0,
- 0, /*instruction_is_frsp*/
- 0, /*instruction_is_convert_to_64bit*/
- 0, /*instruction_is_convert_to_32bit*/
- 0); /*single-precision*/
- }
- else {
- /*HACK!*/
- double s = product - *(double*)frB;
- *(double*)frT = s;
- }
- FPSCR_END(Rc);
- PPC_INSN_FLOAT(FRT_BITMASK, FRA_BITMASK | FRB_BITMASK | FRC_BITMASK, Rc);
-
-0.59,6.FRT,11.FRA,16.FRB,21.FRC,26.28,31.Rc:A:f::Floating Multiply-Subtract Single
-*601: PPC_UNIT_FPU, PPC_UNIT_FPU, 4, 4, 0
-*603: PPC_UNIT_FPU, PPC_UNIT_FPU, 1, 3, 0
-*603e:PPC_UNIT_FPU, PPC_UNIT_FPU, 1, 3, 0
-*604: PPC_UNIT_FPU, PPC_UNIT_FPU, 1, 3, 0
- FPSCR_BEGIN;
- float product; /*HACK! - incorrectly loosing precision ... */
- /* compute the multiply */
- if (is_invalid_operation(processor, cia,
- *frA, *frC,
- fpscr_vxsnan | fpscr_vximz,
- 1, /*single?*/
- 0) /*negate?*/) {
- invalid_arithemetic_operation(processor, cia,
- (unsigned64*)&product, *frA, 0, *frC,
- 0, /*instruction_is_frsp*/
- 0, /*instruction_is_convert_to_64bit*/
- 0, /*instruction_is_convert_to_32bit*/
- 0); /*single-precision*/
- }
- else {
- /*HACK!*/
- product = *(double*)frA * *(double*)frC;
- }
- /* compute the subtract */
- if (is_invalid_operation(processor, cia,
- product, *frB,
- fpscr_vxsnan | fpscr_vxisi,
- 1, /*single?*/
- 0) /*negate?*/) {
- invalid_arithemetic_operation(processor, cia,
- frT, product, *frB, 0,
- 0, /*instruction_is_frsp*/
- 0, /*instruction_is_convert_to_64bit*/
- 0, /*instruction_is_convert_to_32bit*/
- 0); /*single-precision*/
- }
- else {
- /*HACK!*/
- float s = product - *(double*)frB;
- *(double*)frT = (double)s;
- }
- FPSCR_END(Rc);
- PPC_INSN_FLOAT(FRT_BITMASK, FRA_BITMASK | FRB_BITMASK | FRC_BITMASK, Rc);
-
-0.63,6.FRT,11.FRA,16.FRB,21.FRC,26.31,31.Rc:A:f::Floating Negative Multiply-Add
-*601: PPC_UNIT_FPU, PPC_UNIT_FPU, 5, 5, 0
-*603: PPC_UNIT_FPU, PPC_UNIT_FPU, 2, 4, 0
-*603e:PPC_UNIT_FPU, PPC_UNIT_FPU, 2, 4, 0
-*604: PPC_UNIT_FPU, PPC_UNIT_FPU, 1, 3, 0
- FPSCR_BEGIN;
- double product; /*HACK! - incorrectly loosing precision ... */
- /* compute the multiply */
- if (is_invalid_operation(processor, cia,
- *frA, *frC,
- fpscr_vxsnan | fpscr_vximz,
- 0, /*single?*/
- 0) /*negate?*/) {
- invalid_arithemetic_operation(processor, cia,
- (unsigned64*)&product, *frA, 0, *frC,
- 0, /*instruction_is_frsp*/
- 0, /*instruction_is_convert_to_64bit*/
- 0, /*instruction_is_convert_to_32bit*/
- 0); /*single-precision*/
- }
- else {
- /*HACK!*/
- product = *(double*)frA * *(double*)frC;
- }
- /* compute the add */
- if (is_invalid_operation(processor, cia,
- product, *frB,
- fpscr_vxsnan | fpscr_vxisi,
- 0, /*single?*/
- 0) /*negate?*/) {
- invalid_arithemetic_operation(processor, cia,
- frT, product, *frB, 0,
- 0, /*instruction_is_frsp*/
- 0, /*instruction_is_convert_to_64bit*/
- 0, /*instruction_is_convert_to_32bit*/
- 0); /*single-precision*/
- }
- else {
- /*HACK!*/
- double s = -(product + *(double*)frB);
- *(double*)frT = s;
- }
- FPSCR_END(Rc);
- PPC_INSN_FLOAT(FRT_BITMASK, FRA_BITMASK | FRB_BITMASK | FRC_BITMASK, Rc);
-
-0.59,6.FRT,11.FRA,16.FRB,21.FRC,26.31,31.Rc:A:f::Floating Negative Multiply-Add Single
-*601: PPC_UNIT_FPU, PPC_UNIT_FPU, 4, 4, 0
-*603: PPC_UNIT_FPU, PPC_UNIT_FPU, 1, 3, 0
-*603e:PPC_UNIT_FPU, PPC_UNIT_FPU, 1, 3, 0
-*604: PPC_UNIT_FPU, PPC_UNIT_FPU, 1, 3, 0
- FPSCR_BEGIN;
- float product; /*HACK! - incorrectly loosing precision ... */
- /* compute the multiply */
- if (is_invalid_operation(processor, cia,
- *frA, *frC,
- fpscr_vxsnan | fpscr_vximz,
- 1, /*single?*/
- 0) /*negate?*/) {
- invalid_arithemetic_operation(processor, cia,
- (unsigned64*)&product, *frA, 0, *frC,
- 0, /*instruction_is_frsp*/
- 0, /*instruction_is_convert_to_64bit*/
- 0, /*instruction_is_convert_to_32bit*/
- 0); /*single-precision*/
- }
- else {
- /*HACK!*/
- product = *(double*)frA * *(double*)frC;
- }
- /* compute the add */
- if (is_invalid_operation(processor, cia,
- product, *frB,
- fpscr_vxsnan | fpscr_vxisi,
- 1, /*single?*/
- 0) /*negate?*/) {
- invalid_arithemetic_operation(processor, cia,
- frT, product, *frB, 0,
- 0, /*instruction_is_frsp*/
- 0, /*instruction_is_convert_to_64bit*/
- 0, /*instruction_is_convert_to_32bit*/
- 0); /*single-precision*/
- }
- else {
- /*HACK!*/
- float s = -(product + *(double*)frB);
- *(double*)frT = (double)s;
- }
- FPSCR_END(Rc);
- PPC_INSN_FLOAT(FRT_BITMASK, FRA_BITMASK | FRB_BITMASK | FRC_BITMASK, Rc);
-
-0.63,6.FRT,11.FRA,16.FRB,21.FRC,26.30,31.Rc:A:f::Floating Negative Multiply-Subtract
-*601: PPC_UNIT_FPU, PPC_UNIT_FPU, 5, 5, 0
-*603: PPC_UNIT_FPU, PPC_UNIT_FPU, 2, 4, 0
-*603e:PPC_UNIT_FPU, PPC_UNIT_FPU, 2, 4, 0
-*604: PPC_UNIT_FPU, PPC_UNIT_FPU, 1, 3, 0
- FPSCR_BEGIN;
- double product; /*HACK! - incorrectly loosing precision ... */
- /* compute the multiply */
- if (is_invalid_operation(processor, cia,
- *frA, *frC,
- fpscr_vxsnan | fpscr_vximz,
- 0, /*single?*/
- 0) /*negate?*/) {
- invalid_arithemetic_operation(processor, cia,
- (unsigned64*)&product, *frA, 0, *frC,
- 0, /*instruction_is_frsp*/
- 0, /*instruction_is_convert_to_64bit*/
- 0, /*instruction_is_convert_to_32bit*/
- 0); /*single-precision*/
- }
- else {
- /*HACK!*/
- product = *(double*)frA * *(double*)frC;
- }
- /* compute the subtract */
- if (is_invalid_operation(processor, cia,
- product, *frB,
- fpscr_vxsnan | fpscr_vxisi,
- 0, /*single?*/
- 0) /*negate?*/) {
- invalid_arithemetic_operation(processor, cia,
- frT, product, *frB, 0,
- 0, /*instruction_is_frsp*/
- 0, /*instruction_is_convert_to_64bit*/
- 0, /*instruction_is_convert_to_32bit*/
- 0); /*single-precision*/
- }
- else {
- /*HACK!*/
- double s = -(product - *(double*)frB);
- *(double*)frT = s;
- }
- FPSCR_END(Rc);
- PPC_INSN_FLOAT(FRT_BITMASK, FRA_BITMASK | FRB_BITMASK | FRC_BITMASK, Rc);
-
-0.59,6.FRT,11.FRA,16.FRB,21.FRC,26.30,31.Rc:A:f::Floating Negative Multiply-Subtract Single
-*601: PPC_UNIT_FPU, PPC_UNIT_FPU, 4, 4, 0
-*603: PPC_UNIT_FPU, PPC_UNIT_FPU, 1, 3, 0
-*603e:PPC_UNIT_FPU, PPC_UNIT_FPU, 1, 3, 0
-*604: PPC_UNIT_FPU, PPC_UNIT_FPU, 1, 3, 0
- FPSCR_BEGIN;
- float product; /*HACK! - incorrectly loosing precision ... */
- /* compute the multiply */
- if (is_invalid_operation(processor, cia,
- *frA, *frC,
- fpscr_vxsnan | fpscr_vximz,
- 1, /*single?*/
- 0) /*negate?*/) {
- invalid_arithemetic_operation(processor, cia,
- (unsigned64*)&product, *frA, 0, *frC,
- 0, /*instruction_is_frsp*/
- 0, /*instruction_is_convert_to_64bit*/
- 0, /*instruction_is_convert_to_32bit*/
- 0); /*single-precision*/
- }
- else {
- /*HACK!*/
- product = *(double*)frA * *(double*)frC;
- }
- /* compute the subtract */
- if (is_invalid_operation(processor, cia,
- product, *frB,
- fpscr_vxsnan | fpscr_vxisi,
- 1, /*single?*/
- 0) /*negate?*/) {
- invalid_arithemetic_operation(processor, cia,
- frT, product, *frB, 0,
- 0, /*instruction_is_frsp*/
- 0, /*instruction_is_convert_to_64bit*/
- 0, /*instruction_is_convert_to_32bit*/
- 0); /*single-precision*/
- }
- else {
- /*HACK!*/
- float s = -(product - *(double*)frB);
- *(double*)frT = (double)s;
- }
- FPSCR_END(Rc);
- PPC_INSN_FLOAT(FRT_BITMASK, FRA_BITMASK | FRB_BITMASK | FRC_BITMASK, Rc);
-
-
-#
-# I.4.6.6 Floating-Point Rounding and Conversion Instructions
-#
-
-0.63,6.FRT,11./,16.FRB,21.12,31.Rc:X:f::Floating Round to Single-Precision
-*601: PPC_UNIT_FPU, PPC_UNIT_FPU, 4, 4, 0
-*603: PPC_UNIT_FPU, PPC_UNIT_FPU, 1, 3, 0
-*603e:PPC_UNIT_FPU, PPC_UNIT_FPU, 1, 3, 0
-*604: PPC_UNIT_FPU, PPC_UNIT_FPU, 1, 3, 0
- int sign;
- int exp;
- unsigned64 frac_grx;
- /***/
- /* split off cases for what to do */
- if (EXTRACTED64(*frB, 1, 11) < 897
- && EXTRACTED64(*frB, 1, 63) > 0) {
- if ((FPSCR & fpscr_ue) == 0) GOTO(Disabled_Exponent_Underflow);
- if ((FPSCR & fpscr_ue) != 0) GOTO(Enabled_Exponent_Underflow);
- }
- if (EXTRACTED64(*frB, 1, 11) > 1150
- && EXTRACTED64(*frB, 1, 11) < 2047) {
- if ((FPSCR & fpscr_oe) == 0) GOTO(Disabled_Exponent_Overflow);
- if ((FPSCR & fpscr_oe) != 0) GOTO(Enabled_Exponent_Overflow);
- }
- if (EXTRACTED64(*frB, 1, 11) > 896
- && EXTRACTED64(*frB, 1, 11) < 1151) GOTO(Normal_Operand);
- if (EXTRACTED64(*frB, 1, 63) == 0) GOTO(Zero_Operand);
- if (EXTRACTED64(*frB, 1, 11) == 2047) {
- if (EXTRACTED64(*frB, 12, 63) == 0) GOTO(Infinity_Operand);
- if (EXTRACTED64(*frB, 12, 12) == 1) GOTO(QNaN_Operand);
- if (EXTRACTED64(*frB, 12, 12) == 0
- && EXTRACTED64(*frB, 13, 63) > 0) GOTO(SNaN_Operand);
- }
- /**/
- LABEL(Disabled_Exponent_Underflow):
- sign = EXTRACTED64(*frB, 0, 0);
- if (EXTRACTED64(*frB, 1, 11) == 0) {
- exp = -1022;
- frac_grx = INSERTED64(EXTRACTED64(*frB, 12, 63), 1, 52);
- }
- if (EXTRACTED64(*frB, 1, 11) > 0) {
- exp = EXTRACTED64(*frB, 1, 11) - 1023;
- frac_grx = BIT64(0) | INSERTED64(EXTRACTED64(*frB, 12, 63), 1, 52);
- }
- /* G|R|X == zero from above */
- while (exp < -126) {
- exp = exp + 1;
- frac_grx = (INSERTED64(EXTRACTED64(frac_grx, 0, 54), 1, 55)
- | MASKED64(frac_grx, 55, 55));
- }
- FPSCR_SET_UX(EXTRACTED64(frac_grx, 24, 55) > 0);
- Round_Single(processor, sign, &exp, &frac_grx);
- FPSCR_SET_XX(FPSCR & fpscr_fi);
- if (EXTRACTED64(frac_grx, 0, 52) == 0) {
- *frT = INSERTED64(sign, 0, 0);
- if (sign == 0) FPSCR_SET_FPRF(fpscr_rf_pos_zero);
- if (sign == 1) FPSCR_SET_FPRF(fpscr_rf_neg_zero);
- }
- if (EXTRACTED64(frac_grx, 0, 52) > 0) {
- if (EXTRACTED64(frac_grx, 0, 0) == 1) {
- if (sign == 0) FPSCR_SET_FPRF(fpscr_rf_pos_normal_number);
- if (sign == 1) FPSCR_SET_FPRF(fpscr_rf_neg_normal_number);
- }
- if (EXTRACTED64(frac_grx, 0, 0) == 0) {
- if (sign == 0) FPSCR_SET_FPRF(fpscr_rf_pos_denormalized_number);
- if (sign == 1) FPSCR_SET_FPRF(fpscr_rf_neg_denormalized_number);
- }
- /*Normalize_Operand:*/
- while (EXTRACTED64(frac_grx, 0, 0) == 0) {
- exp = exp - 1;
- frac_grx = INSERTED64(EXTRACTED64(frac_grx, 1, 52), 0, 51);
- }
- *frT = (INSERTED64(sign, 0, 0)
- | INSERTED64(exp + 1023, 1, 11)
- | INSERTED64(EXTRACTED64(frac_grx, 1, 52), 12, 63));
- }
- GOTO(Done);
- /**/
- LABEL(Enabled_Exponent_Underflow):
- FPSCR_SET_UX(1);
- sign = EXTRACTED64(*frB, 0, 0);
- if (EXTRACTED64(*frB, 1, 11) == 0) {
- exp = -1022;
- frac_grx = INSERTED64(EXTRACTED64(*frB, 12, 63), 1, 52);
- }
- if (EXTRACTED64(*frB, 1, 11) > 0) {
- exp = EXTRACTED64(*frB, 1, 11) - 1023;
- frac_grx = (BIT64(0) |
- INSERTED64(EXTRACTED64(*frB, 12, 63), 1, 52));
- }
- /*Normalize_Operand:*/
- while (EXTRACTED64(frac_grx, 0, 0) == 0) {
- exp = exp - 1;
- frac_grx = INSERTED64(EXTRACTED64(frac_grx, 1, 52), 0, 51);
- }
- Round_Single(processor, sign, &exp, &frac_grx);
- FPSCR_SET_XX(FPSCR & fpscr_fi);
- exp = exp + 192;
- *frT = (INSERTED64(sign, 0, 0)
- | INSERTED64(exp + 1023, 1, 11)
- | INSERTED64(EXTRACTED64(frac_grx, 1, 52), 12, 63));
- if (sign == 0) FPSCR_SET_FPRF(fpscr_rf_pos_normal_number);
- if (sign == 1) FPSCR_SET_FPRF(fpscr_rf_neg_normal_number);
- GOTO(Done);
- /**/
- LABEL(Disabled_Exponent_Overflow):
- FPSCR_SET_OX(1);
- if ((FPSCR & fpscr_rn) == fpscr_rn_round_to_nearest) {
- if (EXTRACTED64(*frB, 0, 0) == 0) {
- *frT = INSERTED64(0x7FF00000, 0, 31) | 0x00000000;
- FPSCR_SET_FPRF(fpscr_rf_pos_infinity);
- }
- if (EXTRACTED64(*frB, 0, 0) == 1) {
- *frT = INSERTED64(0xFFF00000, 0, 31) | 0x00000000;
- FPSCR_SET_FPRF(fpscr_rf_neg_infinity);
- }
- }
- if ((FPSCR & fpscr_rn) == fpscr_rn_round_towards_zero) {
- if (EXTRACTED64(*frB, 0, 0) == 0) {
- *frT = INSERTED64(0x47EFFFFF, 0, 31) | 0xE0000000;
- FPSCR_SET_FPRF(fpscr_rf_pos_normal_number);
- }
- if (EXTRACTED64(*frB, 0, 0) == 1) {
- *frT = INSERTED64(0xC7EFFFFF, 0, 31) | 0xE0000000;
- FPSCR_SET_FPRF(fpscr_rf_neg_normal_number);
- }
- }
- if ((FPSCR & fpscr_rn) == fpscr_rn_round_towards_pos_infinity) {
- if (EXTRACTED64(*frB, 0, 0) == 0) {
- *frT = INSERTED64(0x7FF00000, 0, 31) | 0x00000000;
- FPSCR_SET_FPRF(fpscr_rf_pos_infinity);
- }
- if (EXTRACTED64(*frB, 0, 0) == 1) {
- *frT = INSERTED64(0xC7EFFFFF, 0, 31) | 0xE0000000;
- FPSCR_SET_FPRF(fpscr_rf_neg_normal_number);
- }
- }
- if ((FPSCR & fpscr_rn) == fpscr_rn_round_towards_neg_infinity) {
- if (EXTRACTED64(*frB, 0, 0) == 0) {
- *frT = INSERTED64(0x47EFFFFF, 0, 31) | 0xE0000000;
- FPSCR_SET_FPRF(fpscr_rf_pos_normal_number);
- }
- if (EXTRACTED64(*frB, 0, 0) == 1) {
- *frT = INSERTED64(0xFFF00000, 0, 31) | 0x00000000;
- FPSCR_SET_FPRF(fpscr_rf_neg_infinity);
- }
- }
- /* FPSCR[FR] <- undefined */
- FPSCR_SET_FI(1);
- FPSCR_SET_XX(1);
- GOTO(Done);
- /**/
- LABEL(Enabled_Exponent_Overflow):
- sign = EXTRACTED64(*frB, 0, 0);
- exp = EXTRACTED64(*frB, 1, 11) - 1023;
- frac_grx = BIT64(0) | INSERTED64(EXTRACTED64(*frB, 12, 63), 1, 52);
- Round_Single(processor, sign, &exp, &frac_grx);
- FPSCR_SET_XX(FPSCR & fpscr_fi);
- /**/
- LABEL(Enabled_Overflow):
- FPSCR_SET_OX(1);
- exp = exp - 192;
- *frT = (INSERTED64(sign, 0, 0)
- | INSERTED64(exp + 1023, 1, 11)
- | INSERTED64(EXTRACTED64(frac_grx, 1, 52), 12, 63));
- if (sign == 0) FPSCR_SET_FPRF(fpscr_rf_pos_normal_number);
- if (sign == 1) FPSCR_SET_FPRF(fpscr_rf_neg_normal_number);
- GOTO(Done);
- /**/
- LABEL(Zero_Operand):
- *frT = *frB;
- if (EXTRACTED64(*frB, 0, 0) == 0) FPSCR_SET_FPRF(fpscr_rf_pos_zero);
- if (EXTRACTED64(*frB, 0, 0) == 1) FPSCR_SET_FPRF(fpscr_rf_neg_zero);
- FPSCR_SET_FR(0);
- FPSCR_SET_FI(0);
- GOTO(Done);
- /**/
- LABEL(Infinity_Operand):
- *frT = *frB;
- if (EXTRACTED64(*frB, 0, 0) == 0) FPSCR_SET_FPRF(fpscr_rf_pos_infinity);
- if (EXTRACTED64(*frB, 0, 0) == 1) FPSCR_SET_FPRF(fpscr_rf_neg_infinity);
- FPSCR_SET_FR(0);
- FPSCR_SET_FI(0);
- GOTO(Done);
- /**/
- LABEL(QNaN_Operand):
- *frT = INSERTED64(EXTRACTED64(*frB, 0, 34), 0, 34);
- FPSCR_SET_FPRF(fpscr_rf_quiet_nan);
- FPSCR_SET_FR(0);
- FPSCR_SET_FI(0);
- GOTO(Done);
- /**/
- LABEL(SNaN_Operand):
- FPSCR_OR_VX(fpscr_vxsnan);
- if ((FPSCR & fpscr_ve) == 0) {
- *frT = (MASKED64(*frB, 0, 11)
- | BIT64(12)
- | MASKED64(*frB, 13, 34));
- FPSCR_SET_FPRF(fpscr_rf_quiet_nan);
- }
- FPSCR_SET_FR(0);
- FPSCR_SET_FI(0);
- GOTO(Done);
- /**/
- LABEL(Normal_Operand):
- sign = EXTRACTED64(*frB, 0, 0);
- exp = EXTRACTED64(*frB, 1, 11) - 1023;
- frac_grx = BIT64(0) | INSERTED64(EXTRACTED64(*frB, 12, 63), 1, 52);
- Round_Single(processor, sign, &exp, &frac_grx);
- FPSCR_SET_XX(FPSCR & fpscr_fi);
- if (exp > 127 && (FPSCR & fpscr_oe) == 0) GOTO(Disabled_Exponent_Overflow);
- if (exp > 127 && (FPSCR & fpscr_oe) != 0) GOTO(Enabled_Overflow);
- *frT = (INSERTED64(sign, 0, 0)
- | INSERTED64(exp + 1023, 1, 11)
- | INSERTED64(EXTRACTED64(frac_grx, 1, 52), 12, 63));
- if (sign == 0) FPSCR_SET_FPRF(fpscr_rf_pos_normal_number);
- if (sign == 1) FPSCR_SET_FPRF(fpscr_rf_neg_normal_number);
- GOTO(Done);
- /**/
- LABEL(Done):
- PPC_INSN_FLOAT(FRT_BITMASK, FRB_BITMASK, Rc);
-
-
-0.63,6.FRT,11./,16.FRB,21.814,31.Rc:X:64,f::Floating Convert To Integer Doubleword
- floating_point_assist_interrupt(processor, cia);
-
-0.63,6.FRT,11./,16.FRB,21.815,31.Rc:X:64,f::Floating Convert To Integer Doubleword with round towards Zero
- floating_point_assist_interrupt(processor, cia);
-
-0.63,6.FRT,11./,16.FRB,21.14,31.Rc:X:f::Floating Convert To Integer Word
- floating_point_assist_interrupt(processor, cia);
-
-0.63,6.FRT,11./,16.FRB,21.15,31.Rc:X:f:fctiwz:Floating Convert To Integer Word with round towards Zero
-*601: PPC_UNIT_FPU, PPC_UNIT_FPU, 4, 4, 0
-*603: PPC_UNIT_FPU, PPC_UNIT_FPU, 1, 3, 0
-*603e:PPC_UNIT_FPU, PPC_UNIT_FPU, 1, 3, 0
-*604: PPC_UNIT_FPU, PPC_UNIT_FPU, 1, 3, 0
- FPSCR_BEGIN;
- convert_to_integer(processor, cia,
- frT, *frB,
- fpscr_rn_round_towards_zero, 32);
- FPSCR_END(Rc);
- PPC_INSN_FLOAT(FRT_BITMASK, FRB_BITMASK, Rc);
-
-0.63,6.FRT,11./,16.FRB,21.846,31.Rc:X:64,f::Floating Convert from Integer Doubleword
- int sign = EXTRACTED64(*frB, 0, 0);
- int exp = 63;
- unsigned64 frac = *frB;
- /***/
- if (frac == 0) GOTO(Zero_Operand);
- if (sign == 1) frac = ~frac + 1;
- while (EXTRACTED64(frac, 0, 0) == 0) {
- /*??? do the loop 0 times if (FRB) = max negative integer */
- frac = INSERTED64(EXTRACTED64(frac, 1, 63), 0, 62);
- exp = exp - 1;
- }
- Round_Float(processor, sign, &exp, &frac, FPSCR & fpscr_rn);
- if (sign == 0) FPSCR_SET_FPRF(fpscr_rf_pos_normal_number);
- if (sign == 1) FPSCR_SET_FPRF(fpscr_rf_pos_normal_number);
- *frT = (INSERTED64(sign, 0, 0)
- | INSERTED64(exp + 1023, 1, 11)
- | INSERTED64(EXTRACTED64(frac, 1, 52), 12, 63));
- GOTO(Done);
- /**/
- LABEL(Zero_Operand):
- FPSCR_SET_FR(0);
- FPSCR_SET_FI(0);
- FPSCR_SET_FPRF(fpscr_rf_pos_zero);
- *frT = 0;
- GOTO(Done);
- /**/
- LABEL(Done):
- PPC_INSN_FLOAT(FRT_BITMASK, FRB_BITMASK, Rc);
-
-
-#
-# I.4.6.7 Floating-Point Compare Instructions
-#
-
-0.63,6.BF,9./,11.FRA,16.FRB,21.0,31./:X:f:fcmpu:Floating Compare Unordered
-*601: PPC_UNIT_FPU, PPC_UNIT_FPU, 4, 4, 0
-*603: PPC_UNIT_FPU, PPC_UNIT_FPU, 1, 3, 0
-*603e:PPC_UNIT_FPU, PPC_UNIT_FPU, 1, 3, 0
-*604: PPC_UNIT_FPU, PPC_UNIT_FPU, 1, 3, 0
- FPSCR_BEGIN;
- unsigned c;
- if (is_NaN(*frA, 0) || is_NaN(*frB, 0))
- c = cr_i_summary_overflow; /* 0b0001 - (FRA) ? (FRB) */
- else if (is_less_than(frA, frB))
- c = cr_i_negative; /* 0b1000 - (FRA) < (FRB) */
- else if (is_greater_than(frA, frB))
- c = cr_i_positive; /* 0b0100 - (FRA) > (FRB) */
- else
- c = cr_i_zero; /* 0b0010 - (FRA) = (FRB) */
- FPSCR_SET_FPCC(c);
- CR_SET(BF, c); /* CR[4*BF..4*BF+3] = c */
- if (is_SNaN(*frA, 0) || is_SNaN(*frB, 0))
- FPSCR_OR_VX(fpscr_vxsnan);
- FPSCR_END(0);
- PPC_INSN_FLOAT_CR(0, FRA_BITMASK | FRB_BITMASK, BF_BITMASK);
-
-0.63,6.BF,9./,11.FRA,16.FRB,21.32,31./:X:f:fcmpo:Floating Compare Ordered
-*601: PPC_UNIT_FPU, PPC_UNIT_FPU, 4, 4, 0
-*603: PPC_UNIT_FPU, PPC_UNIT_FPU, 1, 3, 0
-*603e:PPC_UNIT_FPU, PPC_UNIT_FPU, 1, 3, 0
-*604: PPC_UNIT_FPU, PPC_UNIT_FPU, 1, 3, 0
- FPSCR_BEGIN;
- unsigned c;
- if (is_NaN(*frA, 0) || is_NaN(*frB, 0))
- c = cr_i_summary_overflow; /* 0b0001 - (FRA) ? (FRB) */
- else if (is_less_than(frA, frB))
- c = cr_i_negative; /* 0b1000 - (FRA) < (FRB) */
- else if (is_greater_than(frA, frB))
- c = cr_i_positive; /* 0b0100 - (FRA) > (FRB) */
- else
- c = cr_i_zero; /* 0b0010 - (FRA) = (FRB) */
- FPSCR_SET_FPCC(c);
- CR_SET(BF, c); /* CR[4*BF..4*BF+3] = c */
- if (is_SNaN(*frA, 0) || is_SNaN(*frB, 0)) {
- FPSCR_OR_VX(fpscr_vxsnan);
- if ((FPSCR & fpscr_ve) == 0)
- FPSCR_OR_VX(fpscr_vxvc);
- }
- else if (is_QNaN(*frA, 0) || is_QNaN(*frB, 0)) {
- FPSCR_OR_VX(fpscr_vxvc);
- }
- FPSCR_END(0);
- PPC_INSN_FLOAT_CR(0, FRA_BITMASK | FRB_BITMASK, BF_BITMASK);
-
-
-#
-# I.4.6.8 Floating-Point Status and Control Register Instructions
-#
-
-0.63,6.FRT,11./,16./,21.583,31.Rc:X:f::Move From FPSCR
- FPSCR_BEGIN;
- *frT = FPSCR;
- FPSCR_END(Rc);
-
-0.63,6.BF,9./,11.BFA,14./,16./,21.64,31./:X:f::Move to Condition Register from FPSCR
- FPSCR_BEGIN;
- unsigned field = FPSCR_FIELD(BFA);
- CR_SET(BF, field);
- FPSCR_SET(BFA, 0); /* FPSCR_END fixes up FEX/VX */
- FPSCR_END(0);
-
-0.64,6.BF,9./,11./,16.U,20./,21.134,31.Rc:X:f::Move To FPSCR Field Immediate
- FPSCR_BEGIN;
- FPSCR_SET(BF, U);
- FPSCR_END(Rc);
-
-0.63,6./,7.FLM,15./,16.FRB,21.711,31.Rc:XFL:f::Move To FPSCR Fields
- FPSCR_BEGIN;
- int i;
- for (i = 0; i < 8; i++) {
- if ((FLM & BIT8(i))) {
- FPSCR &= ~MASK32(i*4, i*4+3);
- FPSCR |= MASKED32(*frB, i*4, i*4+3);
- }
- }
- FPSCR_END(Rc);
-
-0.63,6.BT,11./,16./,21.70,31.Rc:X:f::Move To FPSCR Bit 0
- FPSCR_BEGIN;
- unsigned32 bit = BIT32(BT);
- FPSCR &= ~bit;
- FPSCR_END(Rc);
-
-0.63,6.BT,11./,16./,21.38,31.Rc:X:f::Move To FPSCR Bit 1
- FPSCR_BEGIN;
- unsigned32 bit = BIT32(BT);
- if (bit & fpscr_fi)
- bit |= fpscr_xx;
- if ((bit & fpscr_vx_bits))
- bit |= fpscr_fx;
- /* note - omit vx bit */
- if ((bit & (fpscr_ox | fpscr_ux | fpscr_zx | fpscr_xx)))
- bit |= fpscr_fx;
- FPSCR |= bit;
- FPSCR_END(Rc);
-
-
-#
-# I.A.1.1 Floating-Point Store Instruction
-#
-0.31,6.FRS,11.RA,16.RB,21.983,31./:X:f,o::Store Floating-Point as Integer Word Indexed
- program_interrupt(processor, cia, optional_instruction_program_interrupt);
-
-#
-# I.A.1.2 Floating-Point Arithmetic Instructions
-#
-
-0.63,6.FRT,11./,16.FRB,21./,26.22,31.Rc:A:f,o::Floating Square Root
- program_interrupt(processor, cia, optional_instruction_program_interrupt);
-
-0.59,6.FRT,11./,16.FRB,21./,26.22,31.Rc:A:f,o::Floating Square Root Single
- program_interrupt(processor, cia, optional_instruction_program_interrupt);
-
-0.59,6.FRT,11./,16.FRB,21./,26.24,31.Rc:A:f,o::Floating Reciprocal Estimate Single
- program_interrupt(processor, cia, optional_instruction_program_interrupt);
-
-0.63,6.FRT,11./,16.FRB,21./,26.26,31.Rc:A:f,o::Floating Reciprocal Square Root Estimate
- program_interrupt(processor, cia, optional_instruction_program_interrupt);
-
-#
-# I.A.1.3 Floating-Point Select Instruction
-#
-
-0.63,6.FRT,11.FRA,16.FRB,21.FRC,26.23,31.Rc:A:f,o::Floating Select
-*601: PPC_UNIT_BAD, PPC_UNIT_BAD, 0, 0, 0
-*603: PPC_UNIT_FPU, PPC_UNIT_FPU, 1, 3, 0
-*603e:PPC_UNIT_FPU, PPC_UNIT_FPU, 1, 3, 0
-*604: PPC_UNIT_FPU, PPC_UNIT_FPU, 1, 3, 0
- if (CURRENT_MODEL == MODEL_ppc601) {
- program_interrupt(processor, cia, optional_instruction_program_interrupt);
- } else {
- unsigned64 zero = 0;
- FPSCR_BEGIN;
- if (is_NaN(*frA, 0) || is_less_than (frA, &zero)) *frT = *frB;
- else *frT = *frC;
- FPSCR_END(Rc);
- PPC_INSN_FLOAT(FRT_BITMASK, FRA_BITMASK | FRB_BITMASK | FRC_BITMASK, Rc);
- }
-
-#
-# II.3.2 Cache Management Instructions
-#
-
-0.31,6./,11.RA,16.RB,21.982,31./:X::icbi:Instruction Cache Block Invalidate
-*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*603: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 3, 0
-*603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 3, 0
-*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 1, 0
- /* blindly flush all instruction cache entries */
- #if WITH_IDECODE_CACHE_SIZE
- cpu_flush_icache(processor);
- #endif
- PPC_INSN_INT(0, (RA_BITMASK & ~1) | RB_BITMASK, 0);
-
-0.19,6./,11./,16./,21.150,31./:XL::isync:Instruction Synchronize
-*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*603: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 3, 0
-*603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 3, 0
-*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 1, 0
- cpu_synchronize_context(processor, cia);
- PPC_INSN_INT(0, 0, 0);
-
-
-#
-# II.3.2.2 Data Cache Instructions
-#
-
-0.31,6./,11.RA,16.RB,21.278,31./:X:::Data Cache Block Touch
-*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*603: PPC_UNIT_LSU, PPC_UNIT_LSU, 2, 2, 0
-*603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 2, 2, 0
-*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 1, 0
- TRACE(trace_tbd,("Data Cache Block Touch\n"));
- PPC_INSN_INT(0, (RA_BITMASK & ~1) | RB_BITMASK, 0/*Rc*/);
-
-0.31,6./,11.RA,16.RB,21.246,31./:X:::Data Cache Block Touch for Store
-*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*603: PPC_UNIT_LSU, PPC_UNIT_LSU, 2, 2, 0
-*603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 2, 2, 0
-*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 3, 0
- TRACE(trace_tbd,("Data Cache Block Touch for Store\n"));
- PPC_INSN_INT(0, (RA_BITMASK & ~1) | RB_BITMASK, 0/*Rc*/);
-
-0.31,6./,11.RA,16.RB,21.1014,31./:X:::Data Cache Block set to Zero
-*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*603: PPC_UNIT_LSU, PPC_UNIT_LSU, 10, 10, 0
-*603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 10, 10, 0
-*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 3, 0
- TRACE(trace_tbd,("Data Cache Block set to Zero\n"));
- PPC_INSN_INT(0, (RA_BITMASK & ~1) | RB_BITMASK, 0/*Rc*/);
-
-0.31,6./,11.RA,16.RB,21.54,31./:X:::Data Cache Block Store
-*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*603: PPC_UNIT_LSU, PPC_UNIT_LSU, 5, 5, 0
-*603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 5, 5, 0
-*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 1, 0
- TRACE(trace_tbd,("Data Cache Block Store\n"));
- PPC_INSN_INT(0, (RA_BITMASK & ~1) | RB_BITMASK, 0/*Rc*/);
-
-0.31,6./,11.RA,16.RB,21.86,31./:X:::Data Cache Block Flush
-*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*603: PPC_UNIT_LSU, PPC_UNIT_LSU, 5, 5, 0
-*603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 5, 5, 0
-*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 1, 0
- TRACE(trace_tbd,("Data Cache Block Flush\n"));
- PPC_INSN_INT(0, (RA_BITMASK & ~1) | RB_BITMASK, 0/*Rc*/);
-
-#
-# II.3.3 Enforce In-order Execution of I/O Instruction
-#
-
-0.31,6./,11./,16./,21.854,31./:X::eieio:Enforce In-order Execution of I/O
- /* Since this model has no instruction overlap
- this instruction need do nothing */
-
-#
-# II.4.1 Time Base Instructions
-#
-
-0.31,6.RT,11.tbr,21.371,31./:XFX::mftb:Move From Time Base
-*603: PPC_UNIT_SRU, PPC_UNIT_SRU, 1, 1, 0
-*603e:PPC_UNIT_SRU, PPC_UNIT_SRU, 1, 1, 0
-*604: PPC_UNIT_MCIU, PPC_UNIT_MCIU, 3, 3, 0
- int n = (tbr{5:9} << 5) | tbr{0:4};
- if (n == 268) {
- if (is_64bit_implementation) *rT = TB;
- else *rT = EXTRACTED64(TB, 32, 63);
- }
- else if (n == 269) {
- if (is_64bit_implementation) *rT = EXTRACTED64(TB, 0, 31);
- else *rT = EXTRACTED64(TB, 0, 31);
- }
- else
- program_interrupt(processor, cia,
- illegal_instruction_program_interrupt);
-
-
-#
-# III.2.3.1 System Linkage Instructions
-#
-
-0.19,6./,11./,16./,21.50,31./:XL::rfi:Return From Interrupt
-*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*603: PPC_UNIT_SRU, PPC_UNIT_SRU, 3, 3, 0
-*603e:PPC_UNIT_SRU, PPC_UNIT_SRU, 3, 3, 0
-*604: PPC_UNIT_MCIU, PPC_UNIT_MCIU, 3, 3, 0
- if (IS_PROBLEM_STATE(processor)) {
- program_interrupt(processor, cia,
- privileged_instruction_program_interrupt);
- }
- else {
- MSR = (MASKED(SRR1, 0, 32)
- | MASKED(SRR1, 37, 41)
- | MASKED(SRR1, 48, 63));
- NIA = MASKED(SRR0, 0, 61);
- cpu_synchronize_context(processor, cia);
- check_masked_interrupts(processor);
- }
-
-#
-# III.3.4.1 Move to/from System Register Instructions
-#
-
-#0.31,6.RS,11.SPR,21.467,31./:XFX:::Move To Special Purpose Register
-#0.31,6.RT,11.SPR,21.339,31./:XFX:::Move From Special Purpose Register
-0.31,6.RS,11./,16./,21.146,31./:X:::Move To Machine State Register
-*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*603: PPC_UNIT_SRU, PPC_UNIT_SRU, 2, 2, 0
-*603e:PPC_UNIT_SRU, PPC_UNIT_SRU, 2, 2, 0
-*604: PPC_UNIT_MCIU, PPC_UNIT_MCIU, 1, 1, 0
- if (IS_PROBLEM_STATE(processor))
- program_interrupt(processor, cia,
- privileged_instruction_program_interrupt);
- else {
- MSR = *rS;
- check_masked_interrupts(processor);
- }
-
-0.31,6.RT,11./,16./,21.83,31./:X:::Move From Machine State Register
-*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*603: PPC_UNIT_SRU, PPC_UNIT_SRU, 1, 1, 0
-*603e:PPC_UNIT_SRU, PPC_UNIT_SRU, 1, 1, 0
-*604: PPC_UNIT_MCIU, PPC_UNIT_MCIU, 3, 3, 0
- if (IS_PROBLEM_STATE(processor))
- program_interrupt(processor, cia,
- privileged_instruction_program_interrupt);
- else {
- *rT = MSR;
- check_masked_interrupts(processor);
- }
-
-
-#
-# III.4.11.1 Cache Management Instructions
-#
-
-0.31,6./,11.RA,16.RB,21.470,31./:X::dcbi:Data Cache Block Invalidate
-*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*603: PPC_UNIT_LSU, PPC_UNIT_LSU, 2, 2, 0
-*603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 2, 2, 0
-*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 3, 0
- if (IS_PROBLEM_STATE(processor))
- program_interrupt(processor, cia,
- privileged_instruction_program_interrupt);
- else
- TRACE(trace_tbd,("Data Cache Block Invalidate\n"));
-
-#
-# III.4.11.2 Segment Register Manipulation Instructions
-#
-
-0.31,6.RS,11./,12.SR,16./,21.210,31./:X:32:mtsr %SR,%RS:Move To Segment Register
-*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*603: PPC_UNIT_SRU, PPC_UNIT_SRU, 2, 2, 0
-*603e:PPC_UNIT_SRU, PPC_UNIT_SRU, 2, 2, 0
-*604: PPC_UNIT_MCIU, PPC_UNIT_MCIU, 1, 1, 0
- if (IS_PROBLEM_STATE(processor))
- program_interrupt(processor, cia,
- privileged_instruction_program_interrupt);
- else
- SEGREG(SR) = *rS;
-
-0.31,6.RS,11./,16.RB,21.242,31./:X:32:mtsrin %RS,%RB:Move To Segment Register Indirect
-*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
-*603: PPC_UNIT_SRU, PPC_UNIT_SRU, 2, 2, 0
-*603e:PPC_UNIT_SRU, PPC_UNIT_SRU, 2, 2, 0
-*604: PPC_UNIT_MCIU, PPC_UNIT_MCIU, 1, 1, 0
- if (IS_PROBLEM_STATE(processor))
- program_interrupt(processor, cia,
- privileged_instruction_program_interrupt);
- else
- SEGREG(EXTRACTED32(*rB, 0, 3)) = *rS;
-
-0.31,6.RT,11./,12.SR,16./,21.595,31./:X:32:mfsr %RT,%RS:Move From Segment Register
-*601: PPC_UNIT_IU, PPC_UNIT_IU, 2, 2, 0
-*603: PPC_UNIT_SRU, PPC_UNIT_SRU, 3, 3, 0
-*603e:PPC_UNIT_SRU, PPC_UNIT_SRU, 3, 3, 0
-*604: PPC_UNIT_MCIU, PPC_UNIT_MCIU, 1, 1, 0
- if (IS_PROBLEM_STATE(processor))
- program_interrupt(processor, cia,
- privileged_instruction_program_interrupt);
- else
- *rT = SEGREG(SR);
-
-0.31,6.RT,11./,16.RB,21.659,31./:X:32:mfsrin %RT,%RB:Move From Segment Register Indirect
-*601: PPC_UNIT_IU, PPC_UNIT_IU, 2, 2, 0
-*603: PPC_UNIT_SRU, PPC_UNIT_SRU, 3, 3, 0
-*603e:PPC_UNIT_SRU, PPC_UNIT_SRU, 3, 3, 0
-*604: PPC_UNIT_MCIU, PPC_UNIT_MCIU, 1, 1, 0
- if (IS_PROBLEM_STATE(processor))
- program_interrupt(processor, cia,
- privileged_instruction_program_interrupt);
- else
- *rT = SEGREG(EXTRACTED32(*rB, 0, 3));
-
-
-#
-# III.4.11.3 Lookaside Buffer Management Instructions (Optional)
-#
-
-0.31,6./,11./,16.RB,21.434,31./:X:64::SLB Invalidate Entry
-
-0.31,6./,11./,16./,21.498,31./:X:64::SLB Invalidate All
-
-0.31,6./,11./,16.RB,21.306,31./:X:::TLB Invalidate Entry
- if (IS_PROBLEM_STATE(processor))
- program_interrupt(processor, cia,
- privileged_instruction_program_interrupt);
- else {
- int nr = 0;
- cpu *proc;
- while (1) {
- proc = psim_cpu(cpu_system(processor), nr);
- if (proc == NULL) break;
- cpu_page_tlb_invalidate_entry(proc, *rB);
- nr++;
- }
- }
-
-0.31,6./,11./,16./,21.370,31./:X:::TLB Invalidate All
- if (IS_PROBLEM_STATE(processor))
- program_interrupt(processor, cia,
- privileged_instruction_program_interrupt);
- else {
- int nr = 0;
- cpu *proc;
- while (1) {
- proc = psim_cpu(cpu_system(processor), nr);
- if (proc == NULL) break;
- cpu_page_tlb_invalidate_all(proc);
- nr++;
- }
- }
-
-0.31,6./,11./,16./,21.566,31./:X:::TLB Synchronize
- /* nothing happens here - always in sync */
-
-#
-# III.A.1.2 External Access Instructions
-#
-
-0.31,6.RT,11.RA,16.RB,21.310,31./:X:earwax::External Control In Word Indexed
-
-0.31,6.RS,11.RA,16.RB,21.438,31./:X:earwax::External Control Out Word Indexed
diff --git a/sim/ppc/ppc-spr-table b/sim/ppc/ppc-spr-table
deleted file mode 100644
index 93e65325239..00000000000
--- a/sim/ppc/ppc-spr-table
+++ /dev/null
@@ -1,88 +0,0 @@
-#
-# This file is part of the program psim.
-#
-# Copyright (C) 1994-1995, Andrew Cagney <cagney@highland.com.au>
-#
-# This program is free software; you can redistribute it and/or modify
-# it under the terms of the GNU General Public License as published by
-# the Free Software Foundation; either version 2 of the License, or
-# (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-#
-
-# Name:reg-nr:read-only:length
-MQ:0:0:0
-XER:1:0:0
-RTCU:4:0:0
-RTCL:5:0:0
-LR:8:0:0
-CTR:9:0:0
-DSISR:18:0:0
-DAR:19:0:0
-DEC:22:0:0
-SDR1:25:0:0
-SRR0:26:0:0
-SRR1:27:0:0
-SPRG0:272:0:0
-SPRG1:273:0:0
-SPRG2:274:0:0
-SPRG3:275:0:0
-EAR:282:0:0
-TBL:284:0:0
-TBU:285:0:0
-PVR:287:0:0
-IBAT0U:528:0:0
-IBAT0L:529:0:0
-IBAT1U:530:0:0
-IBAT1L:531:0:0
-IBAT2U:532:0:0
-IBAT2L:533:0:0
-IBAT3U:534:0:0
-IBAT3L:535:0:0
-DBAT0U:536:0:0
-DBAT0L:537:0:0
-DBAT1U:538:0:0
-DBAT1L:539:0:0
-DBAT2U:540:0:0
-DBAT2L:541:0:0
-DBAT3U:542:0:0
-DBAT3L:543:0:0
-UMMCR0:936:0:0
-UMMCR1:940:0:0
-UPMC1:937:0:0
-UPMC2:938:0:0
-USIA:939:0:0
-UPMC3:941:0:0
-UPMC4:942:0:0
-MMCR0:952:0:0
-PMC1:953:0:0
-PMC2:954:0:0
-SIA:955:0:0
-MMCR1:956:0:0
-PMC3:957:0:0
-PMC4:958:0:0
-DMISS:976:0:0
-DCMP:977:0:0
-HASH1:978:0:0
-HASH2:979:0:0
-IMISS:980:0:0
-ICMP:981:0:0
-RPA:982:0:0
-HID0:1008:0:0
-HID1:1009:0:0
-IABR:1010:0:0
-DABR:1013:0:0
-L2CR:1017:0:0
-ICTC:1019:0:0
-THRM1:1020:0:0
-THRM2:1021:0:0
-THRM3:1022:0:0
-HID15:1023:0:0
diff --git a/sim/ppc/ppc.mt b/sim/ppc/ppc.mt
deleted file mode 100644
index ef3ea683cd2..00000000000
--- a/sim/ppc/ppc.mt
+++ /dev/null
@@ -1,3 +0,0 @@
-ALL=all-ppc
-CLEAN=clean-ppc
-DO_INSTALL=install-ppc
diff --git a/sim/ppc/psim.c b/sim/ppc/psim.c
deleted file mode 100644
index 20d843b80bf..00000000000
--- a/sim/ppc/psim.c
+++ /dev/null
@@ -1,1099 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1997, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-#ifndef _PSIM_C_
-#define _PSIM_C_
-
-#include "cpu.h" /* includes psim.h */
-#include "idecode.h"
-#include "options.h"
-
-#include "tree.h"
-
-#include <signal.h>
-
-#include <stdio.h>
-#include <ctype.h>
-
-#ifdef HAVE_STDLIB_H
-#include <stdlib.h>
-#endif
-
-#include <setjmp.h>
-
-#ifdef HAVE_STRING_H
-#include <string.h>
-#else
-#ifdef HAVE_STRINGS_H
-#include <strings.h>
-#endif
-#endif
-
-
-#include "bfd.h"
-
-
-/* system structure, actual size of processor array determined at
- runtime */
-
-struct _psim {
- event_queue *events;
- device *devices;
- mon *monitor;
- os_emul *os_emulation;
- core *memory;
-
- /* escape routine for inner functions */
- void *path_to_halt;
- void *path_to_restart;
-
- /* status from last halt */
- psim_status halt_status;
-
- /* the processors proper */
- int nr_cpus;
- int last_cpu; /* CPU that last (tried to) execute an instruction */
- cpu *processors[MAX_NR_PROCESSORS];
-};
-
-
-int current_target_byte_order;
-int current_host_byte_order;
-int current_environment;
-int current_alignment;
-int current_floating_point;
-int current_model_issue = MODEL_ISSUE_IGNORE;
-int current_stdio = DO_USE_STDIO;
-model_enum current_model = WITH_DEFAULT_MODEL;
-
-
-/* create the device tree */
-
-INLINE_PSIM\
-(device *)
-psim_tree(void)
-{
- device *root = tree_parse(NULL, "core");
- tree_parse(root, "/aliases");
- tree_parse(root, "/options");
- tree_parse(root, "/chosen");
- tree_parse(root, "/packages");
- tree_parse(root, "/cpus");
- tree_parse(root, "/openprom");
- tree_parse(root, "/openprom/init");
- tree_parse(root, "/openprom/trace");
- tree_parse(root, "/openprom/options");
- return root;
-}
-
-STATIC_INLINE_PSIM\
-(char *)
-find_arg(char *err_msg,
- int *ptr_to_argp,
- char **argv)
-{
- *ptr_to_argp += 1;
- if (argv[*ptr_to_argp] == NULL)
- error(err_msg);
- return argv[*ptr_to_argp];
-}
-
-INLINE_PSIM\
-(void)
-psim_usage(int verbose)
-{
- printf_filtered("Usage:\n");
- printf_filtered("\n");
- printf_filtered("\tpsim [ <psim-option> ... ] <image> [ <image-arg> ... ]\n");
- printf_filtered("\n");
- printf_filtered("Where\n");
- printf_filtered("\n");
- printf_filtered("\t<image> Name of the PowerPC program to run.\n");
- if (verbose) {
- printf_filtered("\t This can either be a PowerPC binary or\n");
- printf_filtered("\t a text file containing a device tree\n");
- printf_filtered("\t specification.\n");
- printf_filtered("\t PSIM will attempt to determine from the\n");
- printf_filtered("\t specified <image> the intended emulation\n");
- printf_filtered("\t environment.\n");
- printf_filtered("\t If PSIM gets it wrong, the emulation\n");
- printf_filtered("\t environment can be specified using the\n");
- printf_filtered("\t `-e' option (described below).\n");
- printf_filtered("\n"); }
- printf_filtered("\t<image-arg> Argument to be passed to <image>\n");
- if (verbose) {
- printf_filtered("\t These arguments will be passed to\n");
- printf_filtered("\t <image> (as standard C argv, argc)\n");
- printf_filtered("\t when <image> is started.\n");
- printf_filtered("\n"); }
- printf_filtered("\t<psim-option> See below\n");
- printf_filtered("\n");
- printf_filtered("The following are valid <psim-option>s:\n");
- printf_filtered("\n");
-
- printf_filtered("\t-c <count> Limit the simulation to <count> iterations\n");
- if (verbose) {
- printf_filtered("\n");
- }
-
- printf_filtered("\t-i or -i2 Print instruction counting statistics\n");
- if (verbose) {
- printf_filtered("\t Specify -i2 for a more detailed display\n");
- printf_filtered("\n");
- }
-
- printf_filtered("\t-I Print execution unit statistics\n");
- if (verbose) { printf_filtered("\n"); }
-
- printf_filtered("\t-e <os-emul> specify an OS or platform to model\n");
- if (verbose) {
- printf_filtered("\t Can be any of the following:\n");
- printf_filtered("\t bug - OEA + MOTO BUG ROM calls\n");
- printf_filtered("\t netbsd - UEA + NetBSD system calls\n");
- printf_filtered("\t solaris - UEA + Solaris system calls\n");
- printf_filtered("\t linux - UEA + Linux system calls\n");
- printf_filtered("\t chirp - OEA + a few OpenBoot calls\n");
- printf_filtered("\n"); }
-
- printf_filtered("\t-E <endian> Specify the endianness of the target\n");
- if (verbose) {
- printf_filtered("\t Can be any of the following:\n");
- printf_filtered("\t big - big endian target\n");
- printf_filtered("\t little - little endian target\n");
- printf_filtered("\n"); }
-
- printf_filtered("\t-f <file> Merge <file> into the device tree\n");
- if (verbose) { printf_filtered("\n"); }
-
- printf_filtered("\t-h -? -H give more detailed usage\n");
- if (verbose) { printf_filtered("\n"); }
-
- printf_filtered("\t-m <model> Specify the processor to model (604)\n");
- if (verbose) {
- printf_filtered("\t Selects the processor to use when\n");
- printf_filtered("\t modeling execution units. Includes:\n");
- printf_filtered("\t 604, 603 and 603e\n");
- printf_filtered("\n"); }
-
- printf_filtered("\t-n <nr-smp> Specify the number of processors in SMP simulations\n");
- if (verbose) {
- printf_filtered("\t Specifies the number of processors that are\n");
- printf_filtered("\t to be modeled in a symetric multi-processor (SMP)\n");
- printf_filtered("\t simulation\n");
- printf_filtered("\n"); }
-
- printf_filtered("\t-o <dev-spec> Add device <dev-spec> to the device tree\n");
- if (verbose) { printf_filtered("\n"); }
-
- printf_filtered("\t-r <ram-size> Set RAM size in bytes (OEA environments)\n");
- if (verbose) { printf_filtered("\n"); }
-
- printf_filtered("\t-t [!]<trace> Enable (disable) <trace> option\n");
- if (verbose) { printf_filtered("\n"); }
-
- printf_filtered("\n");
- trace_usage(verbose);
- device_usage(verbose);
- if (verbose > 1) {
- printf_filtered("\n");
- print_options();
- }
- error("");
-}
-
-/* Test "string" for containing a string of digits that form a number
-between "min" and "max". The return value is the number or "err". */
-static
-int is_num( char *string, int min, int max, int err)
-{
- int result = 0;
-
- for ( ; *string; ++string)
- {
- if (!isdigit(*string))
- {
- result = err;
- break;
- }
- result = result * 10 + (*string - '0');
- }
- if (result < min || result > max)
- result = err;
-
- return result;
-}
-
-INLINE_PSIM\
-(char **)
-psim_options(device *root,
- char **argv)
-{
- device *current = root;
- int argp;
- if (argv == NULL)
- return NULL;
- argp = 0;
- while (argv[argp] != NULL && argv[argp][0] == '-') {
- char *p = argv[argp] + 1;
- char *param;
- while (*p != '\0') {
- switch (*p) {
- default:
- psim_usage(0);
- error ("");
- break;
- case 'c':
- param = find_arg("Missing <count> option for -c (max-iterations)\n", &argp, argv);
- tree_parse(root, "/openprom/options/max-iterations %s", param);
- break;
- case 'e':
- param = find_arg("Missing <emul> option for -e (os-emul)\n", &argp, argv);
- tree_parse(root, "/openprom/options/os-emul %s", param);
- break;
- case 'E':
- /* endian spec, ignored for now */
- param = find_arg("Missing <endian> option for -E (target-endian)\n", &argp, argv);
- if (strcmp (param, "big") == 0)
- tree_parse (root, "/options/little-endian? false");
- else if (strcmp (param, "little") == 0)
- tree_parse (root, "/options/little-endian? true");
- else
- {
- printf_filtered ("Invalid <endian> option for -E (target-endian)\n");
- psim_usage (0);
- }
- break;
- case 'f':
- param = find_arg("Missing <file> option for -f\n", &argp, argv);
- psim_merge_device_file(root, param);
- break;
- case 'h':
- case '?':
- psim_usage(1);
- break;
- case 'H':
- psim_usage(2);
- break;
- case 'i':
- if (isdigit(p[1])) {
- tree_parse(root, "/openprom/trace/print-info %c", p[1]);
- p++;
- }
- else {
- tree_parse(root, "/openprom/trace/print-info 1");
- }
- break;
- case 'I':
- tree_parse(root, "/openprom/trace/print-info 2");
- tree_parse(root, "/openprom/options/model-issue %d",
- MODEL_ISSUE_PROCESS);
- break;
- case 'm':
- param = find_arg("Missing <model> option for -m (model)\n", &argp, argv);
- tree_parse(root, "/openprom/options/model \"%s", param);
- break;
- case 'n':
- param = find_arg("Missing <nr-smp> option for -n (smp)\n", &argp, argv);
- tree_parse(root, "/openprom/options/smp %s", param);
- break;
- case 'o':
- param = find_arg("Missing <dev-spec> option for -o\n", &argp, argv);
- if (memcmp(param, "mpc860c0", 8) == 0)
- {
- if (param[8] == '\0')
- tree_parse(root, "/options/mpc860c0 5");
- else if (param[8] == '=' && is_num(param+9, 1, 10, 0))
- {
- tree_parse(root, "/options/mpc860c0 %s", param+9);
- }
- else error("Invalid mpc860c0 option for -o\n");
- }
- else
- current = tree_parse(current, "%s", param);
- break;
- case 'r':
- param = find_arg("Missing <ram-size> option for -r (oea-memory-size)\n", &argp, argv);
- tree_parse(root, "/openprom/options/oea-memory-size %s",
- param);
- break;
- case 't':
- param = find_arg("Missing <trace> option for -t (trace/*)\n", &argp, argv);
- if (param[0] == '!')
- tree_parse(root, "/openprom/trace/%s 0", param+1);
- else
- tree_parse(root, "/openprom/trace/%s 1", param);
- break;
- }
- p += 1;
- }
- argp += 1;
- }
- /* force the trace node to process its options now *before* the tree
- initialization occures */
- device_ioctl(tree_find_device(root, "/openprom/trace"),
- NULL, 0,
- device_ioctl_set_trace);
-
- {
- void semantic_init(device* root);
- semantic_init(root);
- }
-
- /* return where the options end */
- return argv + argp;
-}
-
-INLINE_PSIM\
-(void)
-psim_command(device *root,
- char **argv)
-{
- int argp = 0;
- if (argv[argp] == NULL) {
- return;
- }
- else if (strcmp(argv[argp], "trace") == 0) {
- const char *opt = find_arg("Missing <trace> option", &argp, argv);
- if (opt[0] == '!')
- trace_option(opt + 1, 0);
- else
- trace_option(opt, 1);
- }
- else if (strcmp(*argv, "change-media") == 0) {
- char *device = find_arg("Missing device name", &argp, argv);
- char *media = argv[++argp];
- device_ioctl(tree_find_device(root, device), NULL, 0,
- device_ioctl_change_media, media);
- }
- else {
- printf_filtered("Unknown PSIM command %s, try\n", argv[argp]);
- printf_filtered(" trace <trace-option>\n");
- printf_filtered(" change-media <device> [ <new-image> ]\n");
- }
-}
-
-
-/* create the simulator proper from the device tree and executable */
-
-INLINE_PSIM\
-(psim *)
-psim_create(const char *file_name,
- device *root)
-{
- int cpu_nr;
- const char *env;
- psim *system;
- os_emul *os_emulation;
- int nr_cpus;
-
- /* given this partially populated device tree, os_emul_create() uses
- it and file_name to determine the selected emulation and hence
- further populate the tree with any other required nodes. */
-
- os_emulation = os_emul_create(file_name, root);
- if (os_emulation == NULL)
- error("psim: either file %s was not reconized or unreconized or unknown os-emulation type\n", file_name);
-
- /* fill in the missing real number of CPU's */
- nr_cpus = tree_find_integer_property(root, "/openprom/options/smp");
- if (MAX_NR_PROCESSORS < nr_cpus)
- error("target and configured number of cpus conflict\n");
-
- /* fill in the missing TARGET BYTE ORDER information */
- current_target_byte_order
- = (tree_find_boolean_property(root, "/options/little-endian?")
- ? LITTLE_ENDIAN
- : BIG_ENDIAN);
- if (CURRENT_TARGET_BYTE_ORDER != current_target_byte_order)
- error("target and configured byte order conflict\n");
-
- /* fill in the missing HOST BYTE ORDER information */
- current_host_byte_order = (current_host_byte_order = 1,
- (*(char*)(&current_host_byte_order)
- ? LITTLE_ENDIAN
- : BIG_ENDIAN));
- if (CURRENT_HOST_BYTE_ORDER != current_host_byte_order)
- error("host and configured byte order conflict\n");
-
- /* fill in the missing OEA/VEA information */
- env = tree_find_string_property(root, "/openprom/options/env");
- current_environment = ((strcmp(env, "user") == 0
- || strcmp(env, "uea") == 0)
- ? USER_ENVIRONMENT
- : (strcmp(env, "virtual") == 0
- || strcmp(env, "vea") == 0)
- ? VIRTUAL_ENVIRONMENT
- : (strcmp(env, "operating") == 0
- || strcmp(env, "oea") == 0)
- ? OPERATING_ENVIRONMENT
- : 0);
- if (current_environment == 0)
- error("unreconized /options env property\n");
- if (CURRENT_ENVIRONMENT != current_environment)
- error("target and configured environment conflict\n");
-
- /* fill in the missing ALLIGNMENT information */
- current_alignment
- = (tree_find_boolean_property(root, "/openprom/options/strict-alignment?")
- ? STRICT_ALIGNMENT
- : NONSTRICT_ALIGNMENT);
- if (CURRENT_ALIGNMENT != current_alignment)
- error("target and configured alignment conflict\n");
-
- /* fill in the missing FLOATING POINT information */
- current_floating_point
- = (tree_find_boolean_property(root, "/openprom/options/floating-point?")
- ? HARD_FLOATING_POINT
- : SOFT_FLOATING_POINT);
- if (CURRENT_FLOATING_POINT != current_floating_point)
- error("target and configured floating-point conflict\n");
-
- /* fill in the missing STDIO information */
- current_stdio
- = (tree_find_boolean_property(root, "/openprom/options/use-stdio?")
- ? DO_USE_STDIO
- : DONT_USE_STDIO);
- if (CURRENT_STDIO != current_stdio)
- error("target and configured stdio interface conflict\n");
-
- /* sort out the level of detail for issue modeling */
- current_model_issue
- = tree_find_integer_property(root, "/openprom/options/model-issue");
- if (CURRENT_MODEL_ISSUE != current_model_issue)
- error("target and configured model-issue conflict\n");
-
- /* sort out our model architecture - wrong.
-
- FIXME: this should be obtaining the required information from the
- device tree via the "/chosen" property "cpu" which is an instance
- (ihandle) for the only executing processor. By converting that
- ihandle into the corresponding cpu's phandle and then querying
- the "name" property, the cpu type can be determined. Ok? */
-
- model_set(tree_find_string_property(root, "/openprom/options/model"));
-
- /* create things */
- system = ZALLOC(psim);
- system->events = event_queue_create();
- system->memory = core_from_device(root);
- system->monitor = mon_create();
- system->nr_cpus = nr_cpus;
- system->os_emulation = os_emulation;
- system->devices = root;
-
- /* now all the processors attaching to each their per-cpu information */
- for (cpu_nr = 0; cpu_nr < MAX_NR_PROCESSORS; cpu_nr++) {
- system->processors[cpu_nr] = cpu_create(system,
- system->memory,
- mon_cpu(system->monitor,
- cpu_nr),
- system->os_emulation,
- cpu_nr);
- }
-
- /* dump out the contents of the device tree */
- if (ppc_trace[trace_print_device_tree] || ppc_trace[trace_dump_device_tree])
- tree_print(root);
- if (ppc_trace[trace_dump_device_tree])
- error("");
-
- return system;
-}
-
-
-/* allow the simulation to stop/restart abnormaly */
-
-INLINE_PSIM\
-(void)
-psim_set_halt_and_restart(psim *system,
- void *halt_jmp_buf,
- void *restart_jmp_buf)
-{
- system->path_to_halt = halt_jmp_buf;
- system->path_to_restart = restart_jmp_buf;
-}
-
-INLINE_PSIM\
-(void)
-psim_clear_halt_and_restart(psim *system)
-{
- system->path_to_halt = NULL;
- system->path_to_restart = NULL;
-}
-
-INLINE_PSIM\
-(void)
-psim_restart(psim *system,
- int current_cpu)
-{
- ASSERT(current_cpu >= 0 && current_cpu < system->nr_cpus);
- ASSERT(system->path_to_restart != NULL);
- system->last_cpu = current_cpu;
- longjmp(*(jmp_buf*)(system->path_to_restart), current_cpu + 1);
-}
-
-
-static void
-cntrl_c_simulation(void *data)
-{
- psim *system = data;
- psim_halt(system,
- psim_nr_cpus(system),
- was_continuing,
- SIGINT);
-}
-
-INLINE_PSIM\
-(void)
-psim_stop(psim *system)
-{
- event_queue_schedule_after_signal(psim_event_queue(system),
- 0 /*NOW*/,
- cntrl_c_simulation,
- system);
-}
-
-INLINE_PSIM\
-(void)
-psim_halt(psim *system,
- int current_cpu,
- stop_reason reason,
- int signal)
-{
- ASSERT(current_cpu >= 0 && current_cpu <= system->nr_cpus);
- ASSERT(system->path_to_halt != NULL);
- system->last_cpu = current_cpu;
- system->halt_status.reason = reason;
- system->halt_status.signal = signal;
- if (current_cpu == system->nr_cpus) {
- system->halt_status.cpu_nr = 0;
- system->halt_status.program_counter =
- cpu_get_program_counter(system->processors[0]);
- }
- else {
- system->halt_status.cpu_nr = current_cpu;
- system->halt_status.program_counter =
- cpu_get_program_counter(system->processors[current_cpu]);
- }
- longjmp(*(jmp_buf*)(system->path_to_halt), current_cpu + 1);
-}
-
-
-INLINE_PSIM\
-(int)
-psim_last_cpu(psim *system)
-{
- return system->last_cpu;
-}
-
-INLINE_PSIM\
-(int)
-psim_nr_cpus(psim *system)
-{
- return system->nr_cpus;
-}
-
-INLINE_PSIM\
-(psim_status)
-psim_get_status(psim *system)
-{
- return system->halt_status;
-}
-
-
-INLINE_PSIM\
-(cpu *)
-psim_cpu(psim *system,
- int cpu_nr)
-{
- if (cpu_nr < 0 || cpu_nr >= system->nr_cpus)
- return NULL;
- else
- return system->processors[cpu_nr];
-}
-
-
-INLINE_PSIM\
-(device *)
-psim_device(psim *system,
- const char *path)
-{
- return tree_find_device(system->devices, path);
-}
-
-INLINE_PSIM\
-(event_queue *)
-psim_event_queue(psim *system)
-{
- return system->events;
-}
-
-
-
-STATIC_INLINE_PSIM\
-(void)
-psim_max_iterations_exceeded(void *data)
-{
- psim *system = data;
- psim_halt(system,
- system->nr_cpus, /* halted during an event */
- was_signalled,
- -1);
-}
-
-
-INLINE_PSIM\
-(void)
-psim_init(psim *system)
-{
- int cpu_nr;
-
- /* scrub the monitor */
- mon_init(system->monitor, system->nr_cpus);
-
- /* trash any pending events */
- event_queue_init(system->events);
-
- /* if needed, schedule a halt event. FIXME - In the future this
- will be replaced by a more generic change to psim_command(). A
- new command `schedule NNN halt' being added. */
- if (tree_find_property(system->devices, "/openprom/options/max-iterations")) {
- event_queue_schedule(system->events,
- tree_find_integer_property(system->devices,
- "/openprom/options/max-iterations") - 2,
- psim_max_iterations_exceeded,
- system);
- }
-
- /* scrub all the cpus */
- for (cpu_nr = 0; cpu_nr < system->nr_cpus; cpu_nr++)
- cpu_init(system->processors[cpu_nr]);
-
- /* init all the devices (which updates the cpus) */
- tree_init(system->devices, system);
-
- /* and the emulation (which needs an initialized device tree) */
- os_emul_init(system->os_emulation, system->nr_cpus);
-
- /* now sync each cpu against the initialized state of its registers */
- for (cpu_nr = 0; cpu_nr < system->nr_cpus; cpu_nr++) {
- cpu *processor = system->processors[cpu_nr];
- cpu_synchronize_context(processor, cpu_get_program_counter(processor));
- cpu_page_tlb_invalidate_all(processor);
- }
-
- /* force loop to start with first cpu */
- system->last_cpu = -1;
-}
-
-INLINE_PSIM\
-(void)
-psim_stack(psim *system,
- char **argv,
- char **envp)
-{
- /* pass the stack device the argv/envp and let it work out what to
- do with it */
- device *stack_device = tree_find_device(system->devices,
- "/openprom/init/stack");
- if (stack_device != (device*)0) {
- unsigned_word stack_pointer;
- psim_read_register(system, 0, &stack_pointer, "sp", cooked_transfer);
- device_ioctl(stack_device,
- NULL, /*cpu*/
- 0, /*cia*/
- device_ioctl_create_stack,
- stack_pointer,
- argv,
- envp);
- }
-}
-
-
-
-/* SIMULATE INSTRUCTIONS, various different ways of achieving the same
- thing */
-
-INLINE_PSIM\
-(void)
-psim_step(psim *system)
-{
- volatile int keep_running = 0;
- idecode_run_until_stop(system, &keep_running,
- system->events, system->processors, system->nr_cpus);
-}
-
-INLINE_PSIM\
-(void)
-psim_run(psim *system)
-{
- idecode_run(system,
- system->events, system->processors, system->nr_cpus);
-}
-
-
-/* storage manipulation functions */
-
-INLINE_PSIM\
-(void)
-psim_read_register(psim *system,
- int which_cpu,
- void *buf,
- const char reg[],
- transfer_mode mode)
-{
- register_descriptions description;
- char cooked_buf[sizeof(unsigned_8)];
- cpu *processor;
-
- /* find our processor */
- if (which_cpu == MAX_NR_PROCESSORS) {
- if (system->last_cpu == system->nr_cpus
- || system->last_cpu == -1)
- which_cpu = 0;
- else
- which_cpu = system->last_cpu;
- }
- ASSERT(which_cpu >= 0 && which_cpu < system->nr_cpus);
-
- processor = system->processors[which_cpu];
-
- /* find the register description */
- description = register_description(reg);
- if (description.type == reg_invalid)
- error("psim_read_register() invalid register name `%s'\n", reg);
-
- /* get the cooked value */
- switch (description.type) {
-
- case reg_gpr:
- *(gpreg*)cooked_buf = cpu_registers(processor)->gpr[description.index];
- break;
-
- case reg_spr:
- *(spreg*)cooked_buf = cpu_registers(processor)->spr[description.index];
- break;
-
- case reg_sr:
- *(sreg*)cooked_buf = cpu_registers(processor)->sr[description.index];
- break;
-
- case reg_fpr:
- *(fpreg*)cooked_buf = cpu_registers(processor)->fpr[description.index];
- break;
-
- case reg_pc:
- *(unsigned_word*)cooked_buf = cpu_get_program_counter(processor);
- break;
-
- case reg_cr:
- *(creg*)cooked_buf = cpu_registers(processor)->cr;
- break;
-
- case reg_msr:
- *(msreg*)cooked_buf = cpu_registers(processor)->msr;
- break;
-
- case reg_fpscr:
- *(fpscreg*)cooked_buf = cpu_registers(processor)->fpscr;
- break;
-
- case reg_insns:
- *(unsigned_word*)cooked_buf = mon_get_number_of_insns(system->monitor,
- which_cpu);
- break;
-
- case reg_stalls:
- if (cpu_model(processor) == NULL)
- error("$stalls only valid if processor unit model enabled (-I)\n");
- *(unsigned_word*)cooked_buf = model_get_number_of_stalls(cpu_model(processor));
- break;
-
- case reg_cycles:
- if (cpu_model(processor) == NULL)
- error("$cycles only valid if processor unit model enabled (-I)\n");
- *(unsigned_word*)cooked_buf = model_get_number_of_cycles(cpu_model(processor));
- break;
-
- default:
- printf_filtered("psim_read_register(processor=0x%lx,buf=0x%lx,reg=%s) %s\n",
- (unsigned long)processor, (unsigned long)buf, reg,
- "read of this register unimplemented");
- break;
-
- }
-
- /* the PSIM internal values are in host order. To fetch raw data,
- they need to be converted into target order and then returned */
- if (mode == raw_transfer) {
- /* FIXME - assumes that all registers are simple integers */
- switch (description.size) {
- case 1:
- *(unsigned_1*)buf = H2T_1(*(unsigned_1*)cooked_buf);
- break;
- case 2:
- *(unsigned_2*)buf = H2T_2(*(unsigned_2*)cooked_buf);
- break;
- case 4:
- *(unsigned_4*)buf = H2T_4(*(unsigned_4*)cooked_buf);
- break;
- case 8:
- *(unsigned_8*)buf = H2T_8(*(unsigned_8*)cooked_buf);
- break;
- }
- }
- else {
- memcpy(buf/*dest*/, cooked_buf/*src*/, description.size);
- }
-
-}
-
-
-
-INLINE_PSIM\
-(void)
-psim_write_register(psim *system,
- int which_cpu,
- const void *buf,
- const char reg[],
- transfer_mode mode)
-{
- cpu *processor;
- register_descriptions description;
- char cooked_buf[sizeof(unsigned_8)];
-
- /* find our processor */
- if (which_cpu == MAX_NR_PROCESSORS) {
- if (system->last_cpu == system->nr_cpus
- || system->last_cpu == -1)
- which_cpu = 0;
- else
- which_cpu = system->last_cpu;
- }
- if (which_cpu == -1) {
- int i;
- for (i = 0; i < system->nr_cpus; i++)
- psim_write_register(system, i, buf, reg, mode);
- return;
- }
- ASSERT(which_cpu >= 0 && which_cpu < system->nr_cpus);
-
- processor = system->processors[which_cpu];
-
- /* find the description of the register */
- description = register_description(reg);
- if (description.type == reg_invalid)
- error("psim_write_register() invalid register name %s\n", reg);
-
- /* If the data is comming in raw (target order), need to cook it
- into host order before putting it into PSIM's internal structures */
- if (mode == raw_transfer) {
- switch (description.size) {
- case 1:
- *(unsigned_1*)cooked_buf = T2H_1(*(unsigned_1*)buf);
- break;
- case 2:
- *(unsigned_2*)cooked_buf = T2H_2(*(unsigned_2*)buf);
- break;
- case 4:
- *(unsigned_4*)cooked_buf = T2H_4(*(unsigned_4*)buf);
- break;
- case 8:
- *(unsigned_8*)cooked_buf = T2H_8(*(unsigned_8*)buf);
- break;
- }
- }
- else {
- memcpy(cooked_buf/*dest*/, buf/*src*/, description.size);
- }
-
- /* put the cooked value into the register */
- switch (description.type) {
-
- case reg_gpr:
- cpu_registers(processor)->gpr[description.index] = *(gpreg*)cooked_buf;
- break;
-
- case reg_fpr:
- cpu_registers(processor)->fpr[description.index] = *(fpreg*)cooked_buf;
- break;
-
- case reg_pc:
- cpu_set_program_counter(processor, *(unsigned_word*)cooked_buf);
- break;
-
- case reg_spr:
- cpu_registers(processor)->spr[description.index] = *(spreg*)cooked_buf;
- break;
-
- case reg_sr:
- cpu_registers(processor)->sr[description.index] = *(sreg*)cooked_buf;
- break;
-
- case reg_cr:
- cpu_registers(processor)->cr = *(creg*)cooked_buf;
- break;
-
- case reg_msr:
- cpu_registers(processor)->msr = *(msreg*)cooked_buf;
- break;
-
- case reg_fpscr:
- cpu_registers(processor)->fpscr = *(fpscreg*)cooked_buf;
- break;
-
- default:
- printf_filtered("psim_write_register(processor=0x%lx,cooked_buf=0x%lx,reg=%s) %s\n",
- (unsigned long)processor, (unsigned long)cooked_buf, reg,
- "read of this register unimplemented");
- break;
-
- }
-
-}
-
-
-
-INLINE_PSIM\
-(unsigned)
-psim_read_memory(psim *system,
- int which_cpu,
- void *buffer,
- unsigned_word vaddr,
- unsigned nr_bytes)
-{
- cpu *processor;
- if (which_cpu == MAX_NR_PROCESSORS) {
- if (system->last_cpu == system->nr_cpus
- || system->last_cpu == -1)
- which_cpu = 0;
- else
- which_cpu = system->last_cpu;
- }
- processor = system->processors[which_cpu];
- return vm_data_map_read_buffer(cpu_data_map(processor),
- buffer, vaddr, nr_bytes,
- NULL, -1);
-}
-
-
-INLINE_PSIM\
-(unsigned)
-psim_write_memory(psim *system,
- int which_cpu,
- const void *buffer,
- unsigned_word vaddr,
- unsigned nr_bytes,
- int violate_read_only_section)
-{
- cpu *processor;
- if (which_cpu == MAX_NR_PROCESSORS) {
- if (system->last_cpu == system->nr_cpus
- || system->last_cpu == -1)
- which_cpu = 0;
- else
- which_cpu = system->last_cpu;
- }
- ASSERT(which_cpu >= 0 && which_cpu < system->nr_cpus);
- processor = system->processors[which_cpu];
- return vm_data_map_write_buffer(cpu_data_map(processor),
- buffer, vaddr, nr_bytes, 1/*violate-read-only*/,
- NULL, -1);
-}
-
-
-INLINE_PSIM\
-(void)
-psim_print_info(psim *system,
- int verbose)
-{
- mon_print_info(system, system->monitor, verbose);
-}
-
-
-/* Merge a device tree and a device file. */
-
-INLINE_PSIM\
-(void)
-psim_merge_device_file(device *root,
- const char *file_name)
-{
- FILE *description;
- int line_nr;
- char device_path[1000];
- device *current;
-
- /* try opening the file */
- description = fopen(file_name, "r");
- if (description == NULL) {
- perror(file_name);
- error("Invalid file %s specified", file_name);
- }
-
- line_nr = 0;
- current = root;
- while (fgets(device_path, sizeof(device_path), description)) {
- char *device;
- /* check that the full line was read */
- if (strchr(device_path, '\n') == NULL) {
- fclose(description);
- error("%s:%d: line to long - %s",
- file_name, line_nr, device_path);
- }
- else
- *strchr(device_path, '\n') = '\0';
- line_nr++;
- /* skip comments ("#" or ";") and blank lines lines */
- for (device = device_path;
- *device != '\0' && isspace(*device);
- device++);
- if (device[0] == '#'
- || device[0] == ';'
- || device[0] == '\0')
- continue;
- /* merge any appended lines */
- while (device_path[strlen(device_path) - 1] == '\\') {
- int curlen = strlen(device_path) - 1;
- /* zap \ */
- device_path[curlen] = '\0';
- /* append the next line */
- if (!fgets(device_path + curlen, sizeof(device_path) - curlen, description)) {
- fclose(description);
- error("%s:%s: unexpected eof in line continuation - %s",
- file_name, line_nr, device_path);
- }
- if (strchr(device_path, '\n') == NULL) {
- fclose(description);
- error("%s:%d: line to long - %s",
- file_name, line_nr, device_path);
- }
- else
- *strchr(device_path, '\n') = '\0';
- line_nr++;
- }
- /* parse this line */
- current = tree_parse(current, "%s", device);
- }
- fclose(description);
-}
-
-
-#endif /* _PSIM_C_ */
diff --git a/sim/ppc/psim.h b/sim/ppc/psim.h
deleted file mode 100644
index f0cf3a5d8b4..00000000000
--- a/sim/ppc/psim.h
+++ /dev/null
@@ -1,181 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1996, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-#ifndef _PSIM_H_
-#define _PSIM_H_
-
-#include "basics.h"
-
-
-/* the system object */
-/* typedef struct _psim psim; */
-/* typedef struct _device device; */
-
-/* when the `system' stops, find out why. FIXME - at this point this
- is really a bit puzzling. After all, how can there be a status
- when there several processors involved */
-
-typedef struct _psim_status {
- int cpu_nr;
- stop_reason reason;
- int signal;
- unsigned_word program_counter;
-} psim_status;
-
-
-/* create an initial device tree and then populate it using
- information obtained from either the command line or a file */
-
-extern device *psim_tree
-(void);
-
-extern char **psim_options
-(device *root,
- char **argv);
-
-extern void psim_command
-(device *root,
- char **argv);
-
-
-extern void psim_merge_device_file
-(device *root,
- const char *file_name);
-
-extern void psim_usage
-(int verbose);
-
-
-/* create a new simulator from the device tree */
-
-extern psim *psim_create
-(const char *file_name,
- device *root);
-
-
-/* Given the created simulator (re) initialize it */
-
-extern void psim_init
-(psim *system);
-
-extern void psim_stack
-(psim *system,
- char **argv,
- char **envp);
-
-
-/* Run/stop the system */
-
-extern void psim_step
-(psim *system);
-
-extern void psim_run
-(psim *system);
-
-extern void psim_restart
-(psim *system,
- int cpu_nr);
-
-extern void psim_set_halt_and_restart
-(psim *system,
- void *halt_jmp_buf,
- void *restart_jmp_buf);
-
-extern void psim_clear_halt_and_restart
-(psim *system);
-
-extern void psim_stop
-(psim *system);
-
-extern void psim_halt
-(psim *system,
- int cpu_nr,
- stop_reason reason,
- int signal);
-
-extern int psim_last_cpu
-(psim *system);
-
-extern int psim_nr_cpus
-(psim *system);
-
-
-extern psim_status psim_get_status
-(psim *system);
-
-
-/* reveal the internals of the simulation. Grant access to the
- processor (cpu) device tree (device) and events (event_queue). */
-
-extern cpu *psim_cpu
-(psim *system,
- int cpu_nr);
-
-extern device *psim_device
-(psim *system,
- const char *path);
-
-extern event_queue *psim_event_queue
-(psim *system);
-
-
-
-/* manipulate the state (registers or memory) of a processor within
- the system. In the case of memory, the read/write is performed
- using the specified processors address translation tables.
-
- Where applicable, WHICH_CPU == -1 indicates all processors and
- WHICH_CPU == <nr_cpus> indicates the `current' processor. */
-
-extern void psim_read_register
-(psim *system,
- int which_cpu,
- void *host_ordered_buf,
- const char reg[],
- transfer_mode mode);
-
-extern void psim_write_register
-(psim *system,
- int which_cpu,
- const void *buf,
- const char reg[],
- transfer_mode mode);
-
-extern unsigned psim_read_memory
-(psim *system,
- int which_cpu,
- void *buf,
- unsigned_word vaddr,
- unsigned len);
-
-extern unsigned psim_write_memory
-(psim *system,
- int which_cpu,
- const void *buf,
- unsigned_word vaddr,
- unsigned len,
- int violate_read_only_section);
-
-extern void psim_print_info
-(psim *system,
- int verbose);
-
-#endif /* _PSIM_H_ */
diff --git a/sim/ppc/psim.texinfo b/sim/ppc/psim.texinfo
deleted file mode 100644
index f81e46099c4..00000000000
--- a/sim/ppc/psim.texinfo
+++ /dev/null
@@ -1,1105 +0,0 @@
-\input texinfo.tex @c -*-texinfo-*-
-@comment %**start of header
-@setfilename texinfo
-@settitle Texinfo @value{edition}
-@syncodeindex vr fn
-@footnotestyle separate
-@paragraphindent 2
-@smallbook
-@comment %**end of header
-
-@c Set smallbook if printing in smallbook format so the example of the
-@c smallbook font is actually written using smallbook; in bigbook, a kludge
-@c is used for TeX output.
-@set smallbook
-@c @@clear smallbook
-
-@ignore
-@ifinfo
-@format
-START-INFO-DIR-ENTRY
-* Texinfo: (texinfo). The documentation format for the GNU Project.
-END-INFO-DIR-ENTRY
-@end format
-@end ifinfo
-@end ignore
-
-@set edition 2.21
-@set update-date 7 June 1995
-@set update-month June 1995
-
-@c Experiment with smaller amounts of whitespace between chapters
-@c and sections.
-@tex
-\global\chapheadingskip = 15pt plus 4pt minus 2pt
-\global\secheadingskip = 12pt plus 3pt minus 2pt
-\global\subsecheadingskip = 9pt plus 2pt minus 2pt
-@end tex
-
-@c Experiment with smaller amounts of whitespace between paragraphs in
-@c the 8.5 by 11 inch format.
-@ifclear smallbook
-@tex
-\global\parskip 6pt plus 1pt
-@end tex
-@end ifclear
-
-@finalout
-
-@c Currently undocumented command, 5 December 1993:
-@c
-@c nwnode (Same as node, but no warnings; for `makeinfo'.)
-
-@ifinfo
-This file documents Texinfo, a documentation system that uses a single
-source file to produce both on-line information and a printed manual.
-
-Copyright (C) 1988, 1990, 1991, 1992, 1993, 1995 Free Software Foundation, Inc.
-
-This is the second edition of the Texinfo documentation,@*
-and is consistent with version 2 of @file{texinfo.tex}.
-
-Permission is granted to make and distribute verbatim copies of
-this manual provided the copyright notice and this permission notice
-are preserved on all copies.
-
-@ignore
-Permission is granted to process this file through TeX and print the
-results, provided the printed document carries copying permission
-notice identical to this one except for the removal of this paragraph
-(this paragraph not being relevant to the printed manual).
-
-@end ignore
-Permission is granted to copy and distribute modified versions of this
-manual under the conditions for verbatim copying, provided that the entire
-resulting derived work is distributed under the terms of a permission
-notice identical to this one.
-
-Permission is granted to copy and distribute translations of this manual
-into another language, under the above conditions for modified versions,
-except that this permission notice may be stated in a translation approved
-by the Free Software Foundation.
-@end ifinfo
-
-@setchapternewpage odd
-
-@shorttitlepage Texinfo
-
-@titlepage
-@c use the new format for titles
-@title Texinfo
-@subtitle The GNU Documentation Format
-@subtitle Edition @value{edition}, for Texinfo Version Three
-@subtitle @value{update-month}
-
-@author by Robert J. Chassell and Richard M. Stallman
-
-@comment Include the Distribution inside the titlepage so
-@c that headings are turned off.
-
-@page
-@vskip 0pt plus 1filll
-Copyright @copyright{} 1988, 1990, 1991, 1992, 1993, 1995 Free Software Foundation, Inc.
-
-@sp 2
-This is the second edition of the Texinfo documentation,@*
-and is consistent with version 2 of @file{texinfo.tex}.
-@sp 2
-
-Published by the Free Software Foundation @*
-59 Temple Place Suite 330, @*
-Boston, MA 02111-1307 USA @*
-Printed copies are available for $15 each.@*
-ISBN 1-882114-63-9
-@c ISBN number 1-882114-63-9 is for edition 2.20 of 28 February 1995
-
-Permission is granted to make and distribute verbatim copies of
-this manual provided the copyright notice and this permission notice
-are preserved on all copies.
-
-Permission is granted to copy and distribute modified versions of this
-manual under the conditions for verbatim copying, provided that the entire
-resulting derived work is distributed under the terms of a permission
-notice identical to this one.
-
-Permission is granted to copy and distribute translations of this manual
-into another language, under the above conditions for modified versions,
-except that this permission notice may be stated in a translation approved
-by the Free Software Foundation.
-@sp 2
-Cover art by Etienne Suvasa.
-@end titlepage
-
-@ifinfo
-@node Top, Copying, (dir), (dir)
-@top Texinfo
-
-Texinfo is a documentation system that uses a single source file to
-produce both on-line information and printed output.@refill
-
-The first part of this master menu lists the major nodes in this Info
-document, including the @@-command and concept indices. The rest of
-the menu lists all the lower level nodes in the document.@refill
-
-This is Edition @value{edition} of the Texinfo documentation,
-@w{@value{update-date},} for Texinfo Version Three.
-@end ifinfo
-
-@c Here is a spare copy of the chapter menu entry descriptions,
-@c in case they are accidently deleted
-@ignore
-Your rights.
-Texinfo in brief.
-How to use Texinfo mode.
-What is at the beginning of a Texinfo file?
-What is at the end of a Texinfo file?
-How to create chapters, sections, subsections,
- appendices, and other parts.
-How to provide structure for a document.
-How to write nodes.
-How to write menus.
-How to write cross references.
-How to mark words and phrases as code,
- keyboard input, meta-syntactic
- variables, and the like.
-How to write quotations, examples, etc.
-How to write lists and tables.
-How to create indices.
-How to insert @@-signs, braces, etc.
-How to indicate results of evaluation,
- expansion of macros, errors, etc.
-How to force and prevent line and page breaks.
-How to describe functions and the like in a uniform manner.
-How to write footnotes.
-How to specify text for either @TeX{} or Info.
-How to print hardcopy.
-How to create an Info file.
-How to install an Info file
-A list of all the Texinfo @@-commands.
-Hints on how to write a Texinfo document.
-A sample Texinfo file to look at.
-Tell readers they have the right to copy
- and distribute.
-How to incorporate other Texinfo files.
-How to write page headings and footings.
-How to find formatting mistakes.
-All about paragraph refilling.
-A description of @@-Command syntax.
-Texinfo second edition features.
-A menu containing commands and variables.
-A menu covering many topics.
-@end ignore
-
-@menu
-* Copying:: Your rights.
-* Overview:: Texinfo in brief.
-* Texinfo Mode:: How to use Texinfo mode.
-* Beginning a File:: What is at the beginning of a Texinfo file?
-* Ending a File:: What is at the end of a Texinfo file?
-* Structuring:: How to create chapters, sections, subsections,
- appendices, and other parts.
-* Nodes:: How to write nodes.
-* Menus:: How to write menus.
-* Cross References:: How to write cross references.
-* Marking Text:: How to mark words and phrases as code,
- keyboard input, meta-syntactic
- variables, and the like.
-* Quotations and Examples:: How to write quotations, examples, etc.
-* Lists and Tables:: How to write lists and tables.
-* Indices:: How to create indices.
-* Insertions:: How to insert @@-signs, braces, etc.
-* Glyphs:: How to indicate results of evaluation,
- expansion of macros, errors, etc.
-* Breaks:: How to force and prevent line and page breaks.
-* Definition Commands:: How to describe functions and the like
- in a uniform manner.
-* Footnotes:: How to write footnotes.
-* Conditionals:: How to specify text for either @TeX{} or Info.
-* Format/Print Hardcopy:: How to convert a Texinfo file to a file
- for printing and how to print that file.
-* Create an Info File:: Convert a Texinfo file into an Info file.
-* Install an Info File:: Make an Info file accessible to users.
-* Command List:: All the Texinfo @@-commands.
-* Tips:: Hints on how to write a Texinfo document.
-* Sample Texinfo File:: A sample Texinfo file to look at.
-* Sample Permissions:: Tell readers they have the right to copy
- and distribute.
-* Include Files:: How to incorporate other Texinfo files.
-* Headings:: How to write page headings and footings.
-* Catching Mistakes:: How to find formatting mistakes.
-* Refilling Paragraphs:: All about paragraph refilling.
-* Command Syntax:: A description of @@-Command syntax.
-* Obtaining TeX:: How to Obtain @TeX{}.
-* New Features:: Texinfo second edition features.
-* Command and Variable Index:: A menu containing commands and variables.
-* Concept Index:: A menu covering many topics.
-
- --- The Detailed Node Listing ---
-
-Overview of Texinfo
-
-* Using Texinfo:: Create a conventional printed book
- or an Info file.
-* Info Files:: What is an Info file?
-* Printed Books:: Characteristics of a printed book or manual.
-* Formatting Commands:: @@-commands are used for formatting.
-* Conventions:: General rules for writing a Texinfo file.
-* Comments:: How to write comments and mark regions that
- the formatting commands will ignore.
-* Minimum:: What a Texinfo file must have.
-* Six Parts:: Usually, a Texinfo file has six parts.
-* Short Sample:: A short sample Texinfo file.
-* Acknowledgements::
-
-Using Texinfo Mode
-
-* Texinfo Mode Overview:: How Texinfo mode can help you.
-* Emacs Editing:: Texinfo mode adds to GNU Emacs' general
- purpose editing features.
-* Inserting:: How to insert frequently used @@-commands.
-* Showing the Structure:: How to show the structure of a file.
-* Updating Nodes and Menus:: How to update or create new nodes and menus.
-* Info Formatting:: How to format for Info.
-* Printing:: How to format and print part or all of a file.
-* Texinfo Mode Summary:: Summary of all the Texinfo mode commands.
-
-Updating Nodes and Menus
-
-* Updating Commands:: Five major updating commands.
-* Updating Requirements:: How to structure a Texinfo file for
- using the updating command.
-* Other Updating Commands:: How to indent descriptions, insert
- missing nodes lines, and update
- nodes in sequence.
-
-Beginning a Texinfo File
-
-* Four Parts:: Four parts begin a Texinfo file.
-* Sample Beginning:: Here is a sample beginning for a Texinfo file.
-* Header:: The very beginning of a Texinfo file.
-* Info Summary and Permissions:: Summary and copying permissions for Info.
-* Titlepage & Copyright Page:: Creating the title and copyright pages.
-* The Top Node:: Creating the `Top' node and master menu.
-* Software Copying Permissions:: Ensure that you and others continue to
- have the right to use and share software.
-
-The Texinfo File Header
-
-* First Line:: The first line of a Texinfo file.
-* Start of Header:: Formatting a region requires this.
-* setfilename:: Tell Info the name of the Info file.
-* settitle:: Create a title for the printed work.
-* setchapternewpage:: Start chapters on right-hand pages.
-* paragraphindent:: An option to specify paragraph indentation.
-* End of Header:: Formatting a region requires this.
-
-The Title and Copyright Pages
-
-* titlepage:: Create a title for the printed document.
-* titlefont center sp:: The @code{@@titlefont}, @code{@@center},
- and @code{@@sp} commands.
-* title subtitle author:: The @code{@@title}, @code{@@subtitle},
- and @code{@@author} commands.
-* Copyright & Permissions:: How to write the copyright notice and
- include copying permissions.
-* end titlepage:: Turn on page headings after the title and
- copyright pages.
-* headings on off:: An option for turning headings on and off
- and double or single sided printing.
-
-The `Top' Node and Master Menu
-
-* Title of Top Node:: Sketch what the file is about.
-* Master Menu Parts:: A master menu has three or more parts.
-
-Ending a Texinfo File
-
-* Printing Indices & Menus:: How to print an index in hardcopy and
- generate index menus in Info.
-* Contents:: How to create a table of contents.
-* File End:: How to mark the end of a file.
-
-Chapter Structuring
-
-* Tree Structuring:: A manual is like an upside down tree @dots{}
-* Structuring Command Types:: How to divide a manual into parts.
-* makeinfo top:: The @code{@@top} command, part of the `Top' node.
-* chapter::
-* unnumbered & appendix::
-* majorheading & chapheading::
-* section::
-* unnumberedsec appendixsec heading::
-* subsection::
-* unnumberedsubsec appendixsubsec subheading::
-* subsubsection:: Commands for the lowest level sections.
-* Raise/lower sections:: How to change commands' hierarchical level.
-
-Nodes
-
-* Two Paths:: Different commands to structure
- Info output and printed output.
-* Node Menu Illustration:: A diagram, and sample nodes and menus.
-* node:: How to write a node, in detail.
-* makeinfo Pointer Creation:: How to create node pointers with @code{makeinfo}.
-
-The @code{@@node} Command
-
-* Node Names:: How to choose node and pointer names.
-* Writing a Node:: How to write an @code{@@node} line.
-* Node Line Tips:: Keep names short.
-* Node Line Requirements:: Keep names unique, without @@-commands.
-* First Node:: How to write a `Top' node.
-* makeinfo top command:: How to use the @code{@@top} command.
-* Top Node Summary:: Write a brief description for readers.
-
-Menus
-
-* Menu Location:: Put a menu in a short node.
-* Writing a Menu:: What is a menu?
-* Menu Parts:: A menu entry has three parts.
-* Less Cluttered Menu Entry:: Two part menu entry.
-* Menu Example:: Two and three part menu entries.
-* Other Info Files:: How to refer to a different Info file.
-
-Cross References
-
-* References:: What cross references are for.
-* Cross Reference Commands:: A summary of the different commands.
-* Cross Reference Parts:: A cross reference has several parts.
-* xref:: Begin a reference with `See' @dots{}
-* Top Node Naming:: How to refer to the beginning of another file.
-* ref:: A reference for the last part of a sentence.
-* pxref:: How to write a parenthetical cross reference.
-* inforef:: How to refer to an Info-only file.
-
-@code{@@xref}
-
-* Reference Syntax:: What a reference looks like and requires.
-* One Argument:: @code{@@xref} with one argument.
-* Two Arguments:: @code{@@xref} with two arguments.
-* Three Arguments:: @code{@@xref} with three arguments.
-* Four and Five Arguments:: @code{@@xref} with four and five arguments.
-
-Marking Words and Phrases
-
-* Indicating:: How to indicate definitions, files, etc.
-* Emphasis:: How to emphasize text.
-
-Indicating Definitions, Commands, etc.
-
-* Useful Highlighting:: Highlighting provides useful information.
-* code:: How to indicate code.
-* kbd:: How to show keyboard input.
-* key:: How to specify keys.
-* samp:: How to show a literal sequence of characters.
-* var:: How to indicate a metasyntactic variable.
-* file:: How to indicate the name of a file.
-* dfn:: How to specify a definition.
-* cite:: How to refer to a book that is not in Info.
-
-Emphasizing Text
-
-* emph & strong:: How to emphasize text in Texinfo.
-* Smallcaps:: How to use the small caps font.
-* Fonts:: Various font commands for printed output.
-* Customized Highlighting:: How to define highlighting commands.
-
-Quotations and Examples
-
-* Block Enclosing Commands:: Use different constructs for
- different purposes.
-* quotation:: How to write a quotation.
-* example:: How to write an example in a fixed-width font.
-* noindent:: How to prevent paragraph indentation.
-* Lisp Example:: How to illustrate Lisp code.
-* smallexample & smalllisp:: Forms for the @code{@@smallbook} option.
-* display:: How to write an example in the current font.
-* format:: How to write an example that does not narrow
- the margins.
-* exdent:: How to undo the indentation of a line.
-* flushleft & flushright:: How to push text flushleft or flushright.
-* cartouche:: How to draw cartouches around examples.
-
-Making Lists and Tables
-
-* Introducing Lists:: Texinfo formats lists for you.
-* itemize:: How to construct a simple list.
-* enumerate:: How to construct a numbered list.
-* Two-column Tables:: How to construct a two-column table.
-
-Making a Two-column Table
-
-* table:: How to construct a two-column table.
-* ftable vtable:: How to construct a two-column table
- with automatic indexing.
-* itemx:: How to put more entries in the first column.
-
-Creating Indices
-
-* Index Entries:: Choose different words for index entries.
-* Predefined Indices:: Use different indices for different kinds
- of entry.
-* Indexing Commands:: How to make an index entry.
-* Combining Indices:: How to combine indices.
-* New Indices:: How to define your own indices.
-
-Combining Indices
-
-* syncodeindex:: How to merge two indices, using @code{@@code}
- font for the merged-from index.
-* synindex:: How to merge two indices, using the
- default font of the merged-to index.
-
-Special Insertions
-
-* Braces Atsigns Periods:: How to insert braces, @samp{@@} and periods.
-* dmn:: How to format a dimension.
-* Dots Bullets:: How to insert dots and bullets.
-* TeX and copyright:: How to insert the @TeX{} logo
- and the copyright symbol.
-* minus:: How to insert a minus sign.
-* math:: How to format a mathematical expression.
-
-Inserting @samp{@@}, Braces, and Periods
-
-* Inserting An Atsign::
-* Inserting Braces:: How to insert @samp{@{} and @samp{@}}
-* Controlling Spacing:: How to insert the right amount of space
- after punctuation within a sentence.
-
-Inserting Ellipsis, Dots, and Bullets
-
-* dots:: How to insert dots @dots{}
-* bullet:: How to insert a bullet.
-
-Inserting @TeX{} and the Copyright Symbol
-
-* tex:: How to insert the @TeX{} logo.
-* copyright symbol:: How to use @code{@@copyright}@{@}.
-
-Glyphs for Examples
-
-* Glyphs Summary::
-* result:: How to show the result of expression.
-* expansion:: How to indicate an expansion.
-* Print Glyph:: How to indicate printed output.
-* Error Glyph:: How to indicate an error message.
-* Equivalence:: How to indicate equivalence.
-* Point Glyph:: How to indicate the location of point.
-
-Making and Preventing Breaks
-
-* Break Commands:: Cause and prevent splits.
-* Line Breaks:: How to force a single line to use two lines.
-* w:: How to prevent unwanted line breaks.
-* sp:: How to insert blank lines.
-* page:: How to force the start of a new page.
-* group:: How to prevent unwanted page breaks.
-* need:: Another way to prevent unwanted page breaks.
-
-Definition Commands
-
-* Def Cmd Template:: How to structure a description using a
- definition command.
-* Optional Arguments:: How to handle optional and repeated arguments.
-* deffnx:: How to group two or more `first' lines.
-* Def Cmds in Detail:: All the definition commands.
-* Def Cmd Conventions:: Conventions for writing definitions.
-* Sample Function Definition::
-
-The Definition Commands
-
-* Functions Commands:: Commands for functions and similar entities.
-* Variables Commands:: Commands for variables and similar entities.
-* Typed Functions:: Commands for functions in typed languages.
-* Typed Variables:: Commands for variables in typed languages.
-* Abstract Objects:: Commands for object-oriented programming.
-* Data Types:: The definition command for data types.
-
-Footnotes
-
-* Footnote Commands:: How to write a footnote in Texinfo.
-* Footnote Styles:: Controlling how footnotes appear in Info.
-
-Conditionally Visible Text
-
-* Conditional Commands:: How to specify text for Info or @TeX{}.
-* Using Ordinary TeX Commands:: You can use any and all @TeX{} commands.
-* set clear value:: How to designate which text to format (for
- both Info and @TeX{}); and how to set a
- flag to a string that you can insert.
-
-@code{@@set}, @code{@@clear}, and @code{@@value}
-
-* ifset ifclear:: Format a region if a flag is set.
-* value:: Replace a flag with a string.
-* value Example:: An easy way to update edition information.
-
-Format and Print Hardcopy
-
-* Use TeX:: Use @TeX{} to format for hardcopy.
-* Format with tex/texindex:: How to format in a shell.
-* Format with texi2dvi:: A simpler way to use the shell.
-* Print with lpr:: How to print.
-* Within Emacs:: How to format and print from an Emacs shell.
-* Texinfo Mode Printing:: How to format and print in Texinfo mode.
-* Compile-Command:: How to print using Emacs's compile command.
-* Requirements Summary:: @TeX{} formatting requirements summary.
-* Preparing for TeX:: What you need to do to use @TeX{}.
-* Overfull hboxes:: What are and what to do with overfull hboxes.
-* smallbook:: How to print small format books and manuals.
-* A4 Paper:: How to print on European A4 paper.
-* Cropmarks and Magnification:: How to print marks to indicate the size
- of pages and how to print scaled up output.
-
-Creating an Info File
-
-* makeinfo advantages:: @code{makeinfo} provides better error checking.
-* Invoking makeinfo:: How to run @code{makeinfo} from a shell.
-* makeinfo options:: Specify fill-column and other options.
-* Pointer Validation:: How to check that pointers point somewhere.
-* makeinfo in Emacs:: How to run @code{makeinfo} from Emacs.
-* texinfo-format commands:: Two Info formatting commands written
- in Emacs Lisp are an alternative
- to @code{makeinfo}.
-* Batch Formatting:: How to format for Info in Emacs Batch mode.
-* Tag and Split Files:: How tagged and split files help Info
- to run better.
-
-Installing an Info File
-
-* Directory file:: The top level menu for all Info files.
-* New Info File:: Listing a new info file.
-* Other Info Directories:: How to specify Info files that are
- located in other directories.
-
-Sample Permissions
-
-* Inserting Permissions:: How to put permissions in your document.
-* ifinfo Permissions:: Sample @samp{ifinfo} copying permissions.
-* Titlepage Permissions:: Sample Titlepage copying permissions.
-
-Include Files
-
-* Using Include Files:: How to use the @code{@@include} command.
-* texinfo-multiple-files-update:: How to create and update nodes and
- menus when using included files.
-* Include File Requirements:: What @code{texinfo-multiple-files-update} expects.
-* Sample Include File:: A sample outer file with included files
- within it; and a sample included file.
-* Include Files Evolution:: How use of the @code{@@include} command
- has changed over time.
-
-Page Headings
-
-* Headings Introduced:: Conventions for using page headings.
-* Heading Format:: Standard page heading formats.
-* Heading Choice:: How to specify the type of page heading.
-* Custom Headings:: How to create your own headings and footings.
-
-Formatting Mistakes
-
-* makeinfo preferred:: @code{makeinfo} finds errors.
-* Debugging with Info:: How to catch errors with Info formatting.
-* Debugging with TeX:: How to catch errors with @TeX{} formatting.
-* Using texinfo-show-structure:: How to use @code{texinfo-show-structure}.
-* Using occur:: How to list all lines containing a pattern.
-* Running Info-Validate:: How to find badly referenced nodes.
-
-Finding Badly Referenced Nodes
-
-* Using Info-validate:: How to run @code{Info-validate}.
-* Unsplit:: How to create an unsplit file.
-* Tagifying:: How to tagify a file.
-* Splitting:: How to split a file manually.
-
-Second Edition Features
-
-* New Texinfo Mode Commands:: The updating commands are especially useful.
-* New Commands:: Many newly described @@-commands.
-@end menu
-
-@node Copying, Overview, Top, Top
-@comment node-name, next, previous, up
-@unnumbered Texinfo Copying Conditions
-@cindex Copying conditions
-@cindex Conditions for copying Texinfo
-
-The programs currently being distributed that relate to Texinfo include
-portions of GNU Emacs, plus other separate programs (including
-@code{makeinfo}, @code{info}, @code{texindex}, and @file{texinfo.tex}).
-These programs are @dfn{free}; this means that everyone is free to use
-them and free to redistribute them on a free basis. The Texinfo-related
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-are restrictions on their distribution, but these restrictions are
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-
- Specifically, we want to make sure that you have the right to give
-away copies of the programs that relate to Texinfo, that you receive
-source code or else can get it if you want it, that you can change these
-programs or use pieces of them in new free programs, and that you know
-you can do these things.@refill
-
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-deprive anyone else of these rights. For example, if you distribute
-copies of the Texinfo related programs, you must give the recipients all
-the rights that you have. You must make sure that they, too, receive or
-can get the source code. And you must tell them their rights.@refill
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-out that there is no warranty for the programs that relate to Texinfo.
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-
-@node Overview, Texinfo Mode, Copying, Top
-@comment node-name, next, previous, up
-@chapter Overview of Texinfo
-@cindex Overview of Texinfo
-@cindex Texinfo overview
-
-@dfn{Texinfo}@footnote{Note that the first syllable of ``Texinfo'' is
-pronounced like ``speck'', not ``hex''. This odd pronunciation is
-derived from, but is not the same as, the pronunciation of @TeX{}. In
-the word @TeX{}, the @samp{X} is actually the Greek letter ``chi''
-rather than the English letter ``ex''. Pronounce @TeX{} as if the
-@samp{X} were the last sound in the name `Bach'; but pronounce Texinfo
-as if the @samp{x} were a `k'. Spell ``Texinfo'' with a capital ``T''
-and write the other letters in lower case.}
-is a documentation system that uses a single source file to produce both
-on-line information and printed output. This means that instead of
-writing two different documents, one for the on-line help or other on-line
-information and the other for a typeset manual or other printed work, you
-need write only one document. When the work is revised, you need revise
-only one document. (You can read the on-line information, known as an
-@dfn{Info file}, with an Info documentation-reading program.)@refill
-
-@menu
-* Using Texinfo:: Create a conventional printed book
- or an Info file.
-* Info Files:: What is an Info file?
-* Printed Books:: Characteristics of a printed book or manual.
-* Formatting Commands:: @@-commands are used for formatting.
-* Conventions:: General rules for writing a Texinfo file.
-* Comments:: How to write comments and mark regions that
- the formatting commands will ignore.
-* Minimum:: What a Texinfo file must have.
-* Six Parts:: Usually, a Texinfo file has six parts.
-* Short Sample:: A short sample Texinfo file.
-* Acknowledgements::
-@end menu
-
-@c ************************************************************************
-
-
-
-\input texinfo @c -*-texinfo-*-
-@c %**start of header
-@setfilename psim.info
-@settitle PSIM
-@setchapternewpage odd
-@c %**end of header
-
-
-
-@ifinfo
-This file documents the program PSIM.
-
-Copyright (C) 1994-1996, Andrew Cagney.
-
-Permission is granted to make and distribute verbatim copies of
-this manual provided the copyright notice and this permission notice
-are preserved on all copies.
-
-@ignore
-Permission is granted to process this file through Tex and print the
-results, provided the printed document carries copying permission
-notice identical to this one except for the removal of this paragraph
-(this paragraph not being relevant to the printed manual).
-
-@end ignore
-Permission is granted to copy and distribute modified versions of this
-manual under the conditions for verbatim copying, subject to the terms
-of the GNU General Public License, which includes the provision that the
-entire resulting derived work is distributed under the terms of a
-permission notice identical to this one.
-
-Permission is granted to copy and distribute translations of this manual
-into another language, under the above conditions for modified versions.
-@end ifinfo
-
-
-@titlepage
-@title PSIM
-@subtitle Model of the PowerPC Environments
-@author Andrew Cagney
-
-@page
-@vskip Opt plus ifill
-Copyright @copyright{} 1994-1996, Andrew Cagney
-
-This is the first edition of the PSIM manual and is consistent with PSIM
-version 1.0.
-
-Permission is granted to make and distribute verbatim copies of
-this manual provided the copyright notice and this permission notice
-are preserved on all copies.
-
-Permission is granted to copy and distribute modified versions of this
-manual under the conditions for verbatim copying, subject to the terms
-of the GNU General Public License, which includes the provision that the
-entire resulting derived work is distributed under the terms of a
-permission notice identical to this one.
-
-Permission is granted to copy and distribute translations of this manual
-into another language, under the above conditions for modified versions.
-@end titlepage
-
-
-
-@menu
-
-* Copying:: Your rights and freedoms.
-* First Chappeter:: Getting started ....
-* Second Chapter:: Getting finished ....
-
-
-@end menu
-
-
-PSIM is a program written in extended ANSI-C that implements an
-instruction level simulation of the PowerPC environment. It is freely
-available in source code form under the terms of the GNU General
-Public License (version 2 or later).
-
-The PowerPC Architecture is described as having three levels of
-compliance:
-
- UEA - User Environment Architecture
- VEA - Virtual Environment Architecture
- OEA - Operating Environment Architecture
-
-PSIM both implements all three levels of the PowerPC and includes (for
-each level) a corresponding simulated run-time environment.
-
-In addition, PSIM, to the execution unit level, models the performance
-of most of the current PowerPC implementations (contributed by Michael
-Meissner). This detailed performance monitoring (unlike many other
-simulators) resulting in only a relatively marginal reduction in the
-simulators performance.
-
-
-A description of how to build PSIM is contained in the file:
-
- ftp://ftp.ci.com.au/pub/psim/INSTALL
- or ftp://cambridge.cygnus.com/pub/psim/INSTALL
-
-while an overview of how to use PSIM is in:
-
- ftp://ftp.ci.com.au/pub/psim/RUN
-or ftp://cambridge.cygnus.com/pub/psim/RUN
-
-This file is found in:
-
- ftp://ftp.ci.com.au/pub/psim/README
-or ftp://cambridge.cygnus.com/pub/psim/README
-
-
-Thanks goes firstly to:
-
- Corinthian Engineering Pty Ltd
- Cygnus Support
- Highland Logic Pty Ltd
-
-who provided the resources needed for making this software available
-on the Internet.
-
-More importantly I'd like to thank the following individuals who each
-contributed in their own unique way:
-
- Allen Briggs, Bett Koch, David Edelsohn, Gordon Irlam,
- Michael Meissner, Bob Mercier, Richard Perini, Dale Rahn,
- Richard Stallman, Mitchele Walker
-
-
- Andrew Cagney
- Feb, 1995
-
-
- ----------------------------------------------------------------------
-
-
- What features does PSIM include?
-
- Monitoring and modeling
-
- PSIM includes (thanks to Michael Meissner)
- a detailed model of most of the PowerPC
- implementations to the functional unit level.
-
-
- SMP
-
- The PowerPC ISA defines SMP synchronizing instructions.
- This simulator implements a limited, but functional,
- subset of the PowerPC synchronization instructions
- behaviour. Programs that restrict their synchronization
- primitives to those that work with this functional
- sub-set (eg P() and V()) are able to run on the SMP
- version of PSIM.
-
- People intending to use this system should study
- the code implementing the lwarx instruction.
-
- ENDIAN SUPPORT
-
- PSIM implements the PowerPC's big and little (xor
- endian) modes and correctly simulates code that
- switches between these two modes.
-
- In addition, psim can model a true little-endian
- machine.
-
- ISA (Instruction Set Architecture) models
-
- PSIM includes a model of the UEA, VEA and OEA. This
- includes the time base registers (VEA) and HTAB
- and BATS (OEA).
-
- In addition, a preliminary model of the 64 bit
- PowerPC architecture is implemented.
-
- IO Hardware
-
- PSIM's internals are based around the concept
- of a Device Tree. This tree intentionally
- resembles that of the Device Tree found in
- OpenBoot firmware. PSIM is flexible enough
- to allow the user to fully configure this device
- tree (and consequently the hardware model) at
- run time.
-
- Run-time environments:
-
- PSIM's UEA model includes emulation for BSD
- based UNIX system calls.
-
- PSIM's OEA model includes emulation of either:
-
- o OpenBoot client interface
-
- o MOTO's BUG interface.
-
-
- Floating point
-
- Preliminary support for floating point is included.
-
-
- Who would be interested in PSIM?
-
- o the curious
-
- Using psim, gdb, gcc and binutils the curious
- user can construct an environment that allows
- them to play with PowerPC Environment without
- the need for real hardware.
-
-
- o the analyst
-
- PSIM includes many (contributed) monitoring
- features which (unlike many other simulators)
- do not come with a great penalty in performance.
-
- Thus the performance analyst is able to use
- this simulator to analyse the performance of
- the system under test.
-
- If PSIM doesn't monitor a components of interest,
- the source code is freely available, and hence
- there is no hinderance to changing things
- to meet a specific analysts needs.
-
-
- o the serious SW developer
-
- PSIM models all three levels of the PowerPC
- Architecture: UEA, VEA and OEA. Further,
- the internal design is such that PSIM can
- be extended to support additional requirements.
-
-
- What performance analysis measurements can PSIM perform?
-
- Below is the output from a recent analysis run
- (contributed by Michael Meissner):
-
- For the following program:
-
- long
- simple_rand ()
- {
- static unsigned long seed = 47114711;
- unsigned long this = seed * 1103515245 + 12345;
- seed = this;
- /* cut-cut-cut - see the file RUN.psim */
- }
-
- Here is the current output generated with the -I switch on a P90
- (the compiler used is the development version of GCC with a new
- scheduler replacing the old one):
-
- CPU #1 executed 41,994 AND instructions.
- CPU #1 executed 519,785 AND Immediate instructions.
- .
- .
- .
- CPU #1 executed 1 System Call instruction.
- CPU #1 executed 207,746 XOR instructions.
-
- CPU #1 executed 23,740,856 cycles.
- CPU #1 executed 10,242,780 stalls waiting for data.
- CPU #1 executed 1 stall waiting for a function unit.
- .
- .
- .
- CPU #1 executed 3,136,229 branch functional unit instructions.
- CPU #1 executed 16,949,396 instructions that were accounted for in timing info.
- CPU #1 executed 871,920 data reads.
- CPU #1 executed 971,926 data writes.
- CPU #1 executed 221 icache misses.
- CPU #1 executed 16,949,396 instructions in total.
-
- Simulator speed was 250,731 instructions/second
-
-
- What motivated PSIM?
-
- As an idea, psim was first discussed seriously during mid
- 1994. At that time its main objectives were:
-
-
- o good performance
-
- Many simulators loose out by only providing
- a binary interface to the internals. This
- interface eventually becomes a bottle neck
- in the simulators performance.
-
- It was intended that PSIM would avoid this
- problem by giving the user access to the
- full source code.
-
- Further, by exploiting the power of modern
- compilers it was hoped that PSIM would achieve
- good performance with out having to compromise
- its internal design.
-
-
- o practical portability
-
- Rather than try to be portable to every
- C compiler on every platform, it was decided
- that PSIM would restrict its self to supporting
- ANSI compilers that included the extension
- of a long long type.
-
- GCC is one such compiler, consequently PSIM
- should be portable to any machine running GCC.
-
-
- o flexibility in its design
-
- PSIM should allow the user to select the
- features required and customise the build
- accordingly. By having the source code,
- the compiler is able to eliminate any un
- used features of the simulator.
-
- After all, let the compiler do the work.
-
-
- o SMP
-
- A model that allowed the simulation of
- SMP platforms with out the large overhead
- often encountered with such models.
-
-
- PSIM achieves each of these objectives.
-
-
- Is PSIM PowerPC Platform (PPCP) (nee CHRP) Compliant?
-
- No.
-
- Among other things it does not have an Apple ROM socket.
-
-
- Could PSIM be extended so that it models a CHRP machine?
-
- Yes.
-
- PSIM has been designed with the CHRP spec in mind. To model
- a CHRP desktop the following would need to be added:
-
- o An apple ROM socket :-)
-
- o Model of each of the desktop IO devices
-
- o An OpenPIC device.
-
- o RTAS (Run Time Abstraction Services).
-
- o A fully populated device tree.
-
-
- Is the source code available?
-
- Yes.
-
- The source code to PSIM is available under the terms of
- the GNU Public Licence. This allows you to distribute
- the source code for free but with certain conditions.
-
- See the file:
-
- ftp://archie.au/gnu/COPYING
-
- For details of the terms and conditions.
-
-
- Where do I send bugs or report problems?
-
- There is a mailing list (subscribe through majordomo@ci.com.au) at:
-
- powerpc-psim@ci.com.au
-
- If I get the ftp archive updated I post a note to that mailing list.
- In addition your welcome to send bugs or problems either to me or to
- that e-mail list.
-
- This list currently averages zero articles a day.
-
-
- Does PSIM have any limitations or problems?
-
- PSIM can't run rs6000/AIX binaries - At present PSIM can only
- simulate static executables. Since an AIX executable is
- never static, PSIM is unable to simulate its execution.
-
- PSIM is still under development - consequently there are going
- to be bugs.
-
- See the file BUGS (included in the distribution) for any
- other outstanding issues.
-
diff --git a/sim/ppc/registers.c b/sim/ppc/registers.c
deleted file mode 100644
index 2181cedd94a..00000000000
--- a/sim/ppc/registers.c
+++ /dev/null
@@ -1,169 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1995, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-#ifndef _REGISTERS_C_
-#define _REGISTERS_C_
-
-#include <ctype.h>
-
-#include "basics.h"
-#include "registers.h"
-
-#ifdef HAVE_STDLIB_H
-#include <stdlib.h>
-#endif
-
-#ifdef HAVE_STRING_H
-#include <string.h>
-#else
-#ifdef HAVE_STRINGS_H
-#include <strings.h>
-#endif
-#endif
-
-
-INLINE_REGISTERS\
-(void)
-registers_dump(registers *registers)
-{
- int i;
- int j;
- for (i = 0; i < 8; i++) {
- printf_filtered("GPR %2d:", i*4);
- for (j = 0; j < 4; j++) {
- printf_filtered(" 0x%08lx", (long)registers->gpr[i*4 + j]);
- }
- printf_filtered("\n");
- }
-}
-
-STATIC_INLINE_REGISTERS\
-(sprs)
-find_spr(const char name[])
-{
- sprs spr;
- for (spr = 0; spr < nr_of_sprs; spr++)
- if (spr_is_valid(spr)
- && !strcmp(name, spr_name(spr))
- && spr_index(spr) == spr)
- return spr;
- return nr_of_sprs;
-}
-
-STATIC_INLINE_REGISTERS\
-(int)
-are_digits(const char *digits)
-{
- while (isdigit(*digits))
- digits++;
- return *digits == '\0';
-}
-
-
-INLINE_REGISTERS\
-(register_descriptions)
-register_description(const char reg[])
-{
- register_descriptions description;
-
- /* try for a general-purpose integer or floating point register */
- if (reg[0] == 'r' && are_digits(reg + 1)) {
- description.type = reg_gpr;
- description.index = atoi(reg+1);
- description.size = sizeof(gpreg);
- }
- else if (reg[0] == 'f' && are_digits(reg + 1)) {
- description.type = reg_fpr;
- description.index = atoi(reg+1);
- description.size = sizeof(fpreg);
- }
- else if (!strcmp(reg, "pc") || !strcmp(reg, "nia")) {
- description.type = reg_pc;
- description.index = 0;
- description.size = sizeof(unsigned_word);
- }
- else if (!strcmp(reg, "sp")) {
- description.type = reg_gpr;
- description.index = 1;
- description.size = sizeof(gpreg);
- }
- else if (!strcmp(reg, "toc")) {
- description.type = reg_gpr;
- description.index = 2;
- description.size = sizeof(gpreg);
- }
- else if (!strcmp(reg, "cr") || !strcmp(reg, "cnd")) {
- description.type = reg_cr;
- description.index = 0;
- description.size = sizeof(creg); /* FIXME */
- }
- else if (!strcmp(reg, "msr") || !strcmp(reg, "ps")) {
- description.type = reg_msr;
- description.index = 0;
- description.size = sizeof(msreg);
- }
- else if (!strcmp(reg, "fpscr")) {
- description.type = reg_fpscr;
- description.index = 0;
- description.size = sizeof(fpscreg);
- }
- else if (!strncmp(reg, "sr", 2) && are_digits(reg + 2)) {
- description.type = reg_sr;
- description.index = atoi(reg+2);
- description.size = sizeof(sreg);
- }
- else if (!strcmp(reg, "cnt")) {
- description.type = reg_spr;
- description.index = spr_ctr;
- description.size = sizeof(spreg);
- }
- else if (!strcmp(reg, "insns")) {
- description.type = reg_insns;
- description.index = spr_ctr;
- description.size = sizeof(unsigned_word);
- }
- else if (!strcmp(reg, "stalls")) {
- description.type = reg_stalls;
- description.index = spr_ctr;
- description.size = sizeof(unsigned_word);
- }
- else if (!strcmp(reg, "cycles")) {
- description.type = reg_cycles;
- description.index = spr_ctr;
- description.size = sizeof(unsigned_word);
- }
- else {
- sprs spr = find_spr(reg);
- if (spr != nr_of_sprs) {
- description.type = reg_spr;
- description.index = spr;
- description.size = sizeof(spreg);
- }
- else {
- description.type = reg_invalid;
- description.index = 0;
- description.size = 0;
- }
- }
- return description;
-}
-
-#endif /* _REGISTERS_C_ */
diff --git a/sim/ppc/registers.h b/sim/ppc/registers.h
deleted file mode 100644
index 4da6ea4bbe6..00000000000
--- a/sim/ppc/registers.h
+++ /dev/null
@@ -1,324 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1997, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-#ifndef _REGISTERS_H_
-#define _REGISTERS_H_
-
-
-/*
- * The PowerPC registers
- *
- */
-
-
-/**
- ** General Purpose Registers
- **/
-
-typedef signed_word gpreg;
-
-
-
-/**
- ** Floating Point Registers
- **/
-
-typedef unsigned64 fpreg;
-
-
-
-/**
- ** The condition register
- **
- **/
-
-typedef unsigned32 creg;
-
-/* The following sub bits are defined for the condition register */
-enum {
- cr_i_negative = BIT4(0),
- cr_i_positive = BIT4(1),
- cr_i_zero = BIT4(2),
- cr_i_summary_overflow = BIT4(3),
-#if 0
- /* cr0 - integer status */
- cr0_i_summary_overflow_bit = 3,
- cr0_i_negative = BIT32(0),
- cr0_i_positive = BIT32(1),
- cr0_i_zero = BIT32(2),
- cr0_i_summary_overflow = BIT32(3),
- cr0_i_mask = MASK32(0,3),
-#endif
- /* cr1 - floating-point status */
- cr1_i_floating_point_exception_summary_bit = 4,
- cr1_i_floating_point_enabled_exception_summary_bit = 5,
- cr1_i_floating_point_invalid_operation_exception_summary_bit = 6,
- cr1_i_floating_point_overflow_exception_bit = 7,
- cr1_i_floating_point_exception_summary = BIT32(4),
- cr1_i_floating_point_enabled_exception_summary = BIT32(5),
- cr1_i_floating_point_invalid_operation_exception_summary = BIT32(6),
- cr1_i_floating_point_overflow_exception = BIT32(7),
- cr1_i_mask = MASK32(4,7),
-};
-
-
-/* Condition register 1 contains the result of floating point arithmetic */
-enum {
- cr_fp_exception = BIT4(0),
- cr_fp_enabled_exception = BIT4(1),
- cr_fp_invalid_exception = BIT4(2),
- cr_fp_overflow_exception = BIT4(3),
-};
-
-
-
-/**
- ** Floating-Point Status and Control Register
- **/
-
-typedef unsigned32 fpscreg;
-enum {
- fpscr_fx_bit = 0,
- fpscr_fx = BIT32(0),
- fpscr_fex_bit = 1,
- fpscr_fex = BIT32(1),
- fpscr_vx_bit = 2,
- fpscr_vx = BIT32(2),
- fpscr_ox_bit = 3,
- fpscr_ox = BIT32(3),
- fpscr_ux = BIT32(4),
- fpscr_zx = BIT32(5),
- fpscr_xx = BIT32(6),
- fpscr_vxsnan = BIT32(7), /* SNAN */
- fpscr_vxisi = BIT32(8), /* INF - INF */
- fpscr_vxidi = BIT32(9), /* INF / INF */
- fpscr_vxzdz = BIT32(10), /* 0 / 0 */
- fpscr_vximz = BIT32(11), /* INF * 0 */
- fpscr_vxvc = BIT32(12),
- fpscr_fr = BIT32(13),
- fpscr_fi = BIT32(14),
- fpscr_fprf = MASK32(15, 19),
- fpscr_c = BIT32(15),
- fpscr_fpcc_bit = 16, /* well sort of */
- fpscr_fpcc = MASK32(16, 19),
- fpscr_fl = BIT32(16),
- fpscr_fg = BIT32(17),
- fpscr_fe = BIT32(18),
- fpscr_fu = BIT32(19),
- fpscr_rf_quiet_nan = fpscr_c | fpscr_fu,
- fpscr_rf_neg_infinity = fpscr_fl | fpscr_fu,
- fpscr_rf_neg_normal_number = fpscr_fl,
- fpscr_rf_neg_denormalized_number = fpscr_c | fpscr_fl,
- fpscr_rf_neg_zero = fpscr_c | fpscr_fe,
- fpscr_rf_pos_zero = fpscr_fe,
- fpscr_rf_pos_denormalized_number = fpscr_c | fpscr_fg,
- fpscr_rf_pos_normal_number = fpscr_fg,
- fpscr_rf_pos_infinity = fpscr_fg | fpscr_fu,
- fpscr_reserved_20 = BIT32(20),
- fpscr_vxsoft = BIT32(21),
- fpscr_vxsqrt = BIT32(22),
- fpscr_vxcvi = BIT32(23),
- fpscr_ve = BIT32(24),
- fpscr_oe = BIT32(25),
- fpscr_ue = BIT32(26),
- fpscr_ze = BIT32(27),
- fpscr_xe = BIT32(28),
- fpscr_ni = BIT32(29),
- fpscr_rn = MASK32(30, 31),
- fpscr_rn_round_to_nearest = 0,
- fpscr_rn_round_towards_zero = MASK32(31,31),
- fpscr_rn_round_towards_pos_infinity = MASK32(30,30),
- fpscr_rn_round_towards_neg_infinity = MASK32(30,31),
- fpscr_vx_bits = (fpscr_vxsnan | fpscr_vxisi | fpscr_vxidi
- | fpscr_vxzdz | fpscr_vximz | fpscr_vxvc
- | fpscr_vxsoft | fpscr_vxsqrt | fpscr_vxcvi),
-};
-
-
-
-/**
- ** XER Register
- **/
-
-typedef unsigned32 xereg;
-
-enum {
- xer_summary_overflow = BIT32(0), xer_summary_overflow_bit = 0,
- xer_carry = BIT32(2), xer_carry_bit = 2,
- xer_overflow = BIT32(1),
- xer_reserved_3_24 = MASK32(3,24),
- xer_byte_count_mask = MASK32(25,31)
-};
-
-
-/**
- ** SPR's
- **/
-
-#include "spreg.h"
-
-
-/**
- ** Segment Registers
- **/
-
-typedef unsigned32 sreg;
-enum {
- nr_of_srs = 16
-};
-
-
-/**
- ** Machine state register
- **/
-typedef unsigned_word msreg; /* 32 or 64 bits */
-
-enum {
-#if (WITH_TARGET_WORD_BITSIZE == 64)
- msr_64bit_mode = BIT(0),
-#endif
-#if (WITH_TARGET_WORD_BITSIZE == 32)
- msr_64bit_mode = 0,
-#endif
- msr_power_management_enable = BIT(45),
- msr_tempoary_gpr_remapping = BIT(46), /* 603 specific */
- msr_interrupt_little_endian_mode = BIT(47),
- msr_external_interrupt_enable = BIT(48),
- msr_problem_state = BIT(49),
- msr_floating_point_available = BIT(50),
- msr_machine_check_enable = BIT(51),
- msr_floating_point_exception_mode_0 = BIT(52),
- msr_single_step_trace_enable = BIT(53),
- msr_branch_trace_enable = BIT(54),
- msr_floating_point_exception_mode_1 = BIT(55),
- msr_interrupt_prefix = BIT(57),
- msr_instruction_relocate = BIT(58),
- msr_data_relocate = BIT(59),
- msr_recoverable_interrupt = BIT(62),
- msr_little_endian_mode = BIT(63)
-};
-
-enum {
- srr1_hash_table_or_ibat_miss = BIT(33),
- srr1_direct_store_error_exception = BIT(35),
- srr1_protection_violation = BIT(36),
- srr1_segment_table_miss = BIT(42),
- srr1_floating_point_enabled = BIT(43),
- srr1_illegal_instruction = BIT(44),
- srr1_priviliged_instruction = BIT(45),
- srr1_trap = BIT(46),
- srr1_subsequent_instruction = BIT(47)
-};
-
-
-/**
- ** storage interrupt registers
- **/
-
-typedef enum {
- dsisr_direct_store_error_exception = BIT32(0),
- dsisr_hash_table_or_dbat_miss = BIT32(1),
- dsisr_protection_violation = BIT32(4),
- dsisr_earwax_violation = BIT32(5),
- dsisr_store_operation = BIT32(6),
- dsisr_segment_table_miss = BIT32(10),
- dsisr_earwax_disabled = BIT32(11)
-} dsisr_status;
-
-
-
-/**
- ** And the registers proper
- **/
-typedef struct _registers {
-
- gpreg gpr[32];
- fpreg fpr[32];
- creg cr;
- fpscreg fpscr;
-
- /* Machine state register */
- msreg msr;
-
- /* Spr's */
- spreg spr[nr_of_sprs];
-
- /* Segment Registers */
- sreg sr[nr_of_srs];
-
-} registers;
-
-
-/* dump out all the registers */
-
-INLINE_REGISTERS\
-(void) registers_dump
-(registers *regs);
-
-
-/* return information on a register based on name */
-
-typedef enum {
- reg_invalid,
- reg_gpr, reg_fpr, reg_spr, reg_msr,
- reg_cr, reg_fpscr, reg_pc, reg_sr,
- reg_insns, reg_stalls, reg_cycles,
- nr_register_types
-} register_types;
-
-typedef struct {
- register_types type;
- int index;
- int size;
-} register_descriptions;
-
-INLINE_REGISTERS\
-(register_descriptions) register_description
-(const char reg[]);
-
-
-/* Special purpose registers by their more common names */
-
-#define SPREG(N) cpu_registers(processor)->spr[N]
-#define XER SPREG(spr_xer)
-#define LR SPREG(spr_lr)
-#define CTR SPREG(spr_ctr)
-#define SRR0 SPREG(spr_srr0)
-#define SRR1 SPREG(spr_srr1)
-#define DAR SPREG(spr_dar)
-#define DSISR SPREG(spr_dsisr)
-
-/* general purpose registers - indexed access */
-#define GPR(N) cpu_registers(processor)->gpr[N]
-
-/* segment registers */
-#define SEGREG(N) cpu_registers(processor)->sr[N]
-
-/* condition register */
-#define CR cpu_registers(processor)->cr
-
-/* machine status register */
-#define MSR cpu_registers(processor)->msr
-
-/* floating-point status condition register */
-#define FPSCR cpu_registers(processor)->fpscr
-
-#endif /* _REGISTERS_H_ */
diff --git a/sim/ppc/sim-endian-n.h b/sim/ppc/sim-endian-n.h
deleted file mode 100644
index 4d0410a92b2..00000000000
--- a/sim/ppc/sim-endian-n.h
+++ /dev/null
@@ -1,134 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1995, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-#ifndef N
-#error "N must be #defined"
-#endif
-
-/* NOTE: See end of file for #undef */
-#define unsigned_N XCONCAT2(unsigned_,N)
-#define endian_t2h_N XCONCAT2(endian_t2h_,N)
-#define endian_h2t_N XCONCAT2(endian_h2t_,N)
-#define _SWAP_N XCONCAT2(_SWAP_,N)
-#define swap_N XCONCAT2(swap_,N)
-#define endian_h2be_N XCONCAT2(endian_h2be_,N)
-#define endian_be2h_N XCONCAT2(endian_be2h_,N)
-#define endian_h2le_N XCONCAT2(endian_h2le_,N)
-#define endian_le2h_N XCONCAT2(endian_le2h_,N)
-
-
-INLINE_SIM_ENDIAN\
-(unsigned_N)
-endian_t2h_N(unsigned_N raw_in)
-{
- if (CURRENT_TARGET_BYTE_ORDER == CURRENT_HOST_BYTE_ORDER) {
- return raw_in;
- }
- else {
- _SWAP_N(return,raw_in);
- }
-}
-
-
-INLINE_SIM_ENDIAN\
-(unsigned_N)
-endian_h2t_N(unsigned_N raw_in)
-{
- if (CURRENT_TARGET_BYTE_ORDER == CURRENT_HOST_BYTE_ORDER) {
- return raw_in;
- }
- else {
- _SWAP_N(return,raw_in);
- }
-}
-
-
-INLINE_SIM_ENDIAN\
-(unsigned_N)
-swap_N(unsigned_N raw_in)
-{
- _SWAP_N(return,raw_in);
-}
-
-
-
-INLINE_SIM_ENDIAN\
-(unsigned_N)
-endian_h2be_N(unsigned_N raw_in)
-{
- if (CURRENT_HOST_BYTE_ORDER == BIG_ENDIAN) {
- return raw_in;
- }
- else {
- _SWAP_N(return,raw_in);
- }
-}
-
-
-INLINE_SIM_ENDIAN\
-(unsigned_N)
-endian_be2h_N(unsigned_N raw_in)
-{
- if (CURRENT_HOST_BYTE_ORDER == BIG_ENDIAN) {
- return raw_in;
- }
- else {
- _SWAP_N(return,raw_in);
- }
-}
-
-
-INLINE_SIM_ENDIAN\
-(unsigned_N)
-endian_h2le_N(unsigned_N raw_in)
-{
- if (CURRENT_HOST_BYTE_ORDER == LITTLE_ENDIAN) {
- return raw_in;
- }
- else {
- _SWAP_N(return,raw_in);
- }
-}
-
-
-INLINE_SIM_ENDIAN\
-(unsigned_N)
-endian_le2h_N(unsigned_N raw_in)
-{
- if (CURRENT_HOST_BYTE_ORDER == LITTLE_ENDIAN) {
- return raw_in;
- }
- else {
- _SWAP_N(return,raw_in);
- }
-}
-
-
-/* NOTE: See start of file for #define */
-#undef unsigned_N
-#undef endian_t2h_N
-#undef endian_h2t_N
-#undef _SWAP_N
-#undef swap_N
-#undef endian_h2be_N
-#undef endian_be2h_N
-#undef endian_h2le_N
-#undef endian_le2h_N
diff --git a/sim/ppc/sim-endian.c b/sim/ppc/sim-endian.c
deleted file mode 100644
index 9fe36692fd0..00000000000
--- a/sim/ppc/sim-endian.c
+++ /dev/null
@@ -1,74 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1995, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-#ifndef _SIM_ENDIAN_C_
-#define _SIM_ENDIAN_C_
-
-#include "config.h"
-#include "basics.h"
-
-
-#if !defined(_SWAP_1)
-#define _SWAP_1(SET,RAW) SET (RAW)
-#endif
-
-#if !defined(_SWAP_2) && (WITH_HOST_BYTE_ORDER == LITTLE_ENDIAN) && defined(htons)
-#define _SWAP_2(SET,RAW) SET htons (RAW)
-#endif
-
-#ifndef _SWAP_2
-#define _SWAP_2(SET,RAW) SET (((RAW) >> 8) | ((RAW) << 8))
-#endif
-
-#if !defined(_SWAP_4) && (WITH_HOST_BYTE_ORDER == LITTLE_ENDIAN) && defined(htonl)
-#define _SWAP_4(SET,RAW) SET htonl (RAW)
-#endif
-
-#ifndef _SWAP_4
-#define _SWAP_4(SET,RAW) SET (((RAW) << 24) | (((RAW) & 0xff00) << 8) | (((RAW) & 0xff0000) >> 8) | ((RAW) >> 24))
-#endif
-
-#ifndef _SWAP_8
-#define _SWAP_8(SET,RAW) \
- union { unsigned_8 dword; unsigned_4 words[2]; } in, out; \
- in.dword = RAW; \
- _SWAP_4 (out.words[0] =, in.words[1]); \
- _SWAP_4 (out.words[1] =, in.words[0]); \
- SET out.dword;
-#endif
-
-#define N 1
-#include "sim-endian-n.h"
-#undef N
-
-#define N 2
-#include "sim-endian-n.h"
-#undef N
-
-#define N 4
-#include "sim-endian-n.h"
-#undef N
-
-#define N 8
-#include "sim-endian-n.h"
-#undef N
-
-#endif /* _SIM_ENDIAN_C_ */
diff --git a/sim/ppc/sim-endian.h b/sim/ppc/sim-endian.h
deleted file mode 100644
index 74e8f1b2b69..00000000000
--- a/sim/ppc/sim-endian.h
+++ /dev/null
@@ -1,409 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1995, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-#ifndef _SIM_ENDIAN_H_
-#define _SIM_ENDIAN_H_
-
-
-/* C byte conversion functions */
-
-INLINE_SIM_ENDIAN(unsigned_1) endian_h2t_1(unsigned_1 x);
-INLINE_SIM_ENDIAN(unsigned_2) endian_h2t_2(unsigned_2 x);
-INLINE_SIM_ENDIAN(unsigned_4) endian_h2t_4(unsigned_4 x);
-INLINE_SIM_ENDIAN(unsigned_8) endian_h2t_8(unsigned_8 x);
-
-INLINE_SIM_ENDIAN(unsigned_1) endian_t2h_1(unsigned_1 x);
-INLINE_SIM_ENDIAN(unsigned_2) endian_t2h_2(unsigned_2 x);
-INLINE_SIM_ENDIAN(unsigned_4) endian_t2h_4(unsigned_4 x);
-INLINE_SIM_ENDIAN(unsigned_8) endian_t2h_8(unsigned_8 x);
-
-INLINE_SIM_ENDIAN(unsigned_1) swap_1(unsigned_1 x);
-INLINE_SIM_ENDIAN(unsigned_2) swap_2(unsigned_2 x);
-INLINE_SIM_ENDIAN(unsigned_4) swap_4(unsigned_4 x);
-INLINE_SIM_ENDIAN(unsigned_8) swap_8(unsigned_8 x);
-
-INLINE_SIM_ENDIAN(unsigned_1) endian_h2be_1(unsigned_1 x);
-INLINE_SIM_ENDIAN(unsigned_2) endian_h2be_2(unsigned_2 x);
-INLINE_SIM_ENDIAN(unsigned_4) endian_h2be_4(unsigned_4 x);
-INLINE_SIM_ENDIAN(unsigned_8) endian_h2be_8(unsigned_8 x);
-
-INLINE_SIM_ENDIAN(unsigned_1) endian_be2h_1(unsigned_1 x);
-INLINE_SIM_ENDIAN(unsigned_2) endian_be2h_2(unsigned_2 x);
-INLINE_SIM_ENDIAN(unsigned_4) endian_be2h_4(unsigned_4 x);
-INLINE_SIM_ENDIAN(unsigned_8) endian_be2h_8(unsigned_8 x);
-
-INLINE_SIM_ENDIAN(unsigned_1) endian_h2le_1(unsigned_1 x);
-INLINE_SIM_ENDIAN(unsigned_2) endian_h2le_2(unsigned_2 x);
-INLINE_SIM_ENDIAN(unsigned_4) endian_h2le_4(unsigned_4 x);
-INLINE_SIM_ENDIAN(unsigned_8) endian_h2le_8(unsigned_8 x);
-
-INLINE_SIM_ENDIAN(unsigned_1) endian_le2h_1(unsigned_1 x);
-INLINE_SIM_ENDIAN(unsigned_2) endian_le2h_2(unsigned_2 x);
-INLINE_SIM_ENDIAN(unsigned_4) endian_le2h_4(unsigned_4 x);
-INLINE_SIM_ENDIAN(unsigned_8) endian_le2h_8(unsigned_8 x);
-
-
-/* Host dependant:
-
- The CPP below defines information about the compilation host. In
- particular it defines the macro's:
-
- WITH_HOST_BYTE_ORDER The byte order of the host. Could
- be any of LITTLE_ENDIAN, BIG_ENDIAN
- or 0 (unknown). Those macro's also
- need to be defined.
-
- */
-
-
-/* NetBSD:
-
- NetBSD is easy, everything you could ever want is in a header file
- (well almost :-) */
-
-#if defined(__NetBSD__)
-# include <machine/endian.h>
-# if (WITH_HOST_BYTE_ORDER == 0)
-# undef WITH_HOST_BYTE_ORDER
-# define WITH_HOST_BYTE_ORDER BYTE_ORDER
-# endif
-# if (BYTE_ORDER != WITH_HOST_BYTE_ORDER)
-# error "host endian incorrectly configured, check config.h"
-# endif
-#endif
-
-/* Linux is similarly easy. */
-
-#if defined(__linux__)
-# include <endian.h>
-# include <asm/byteorder.h>
-# if defined(__LITTLE_ENDIAN) && !defined(LITTLE_ENDIAN)
-# define LITTLE_ENDIAN __LITTLE_ENDIAN
-# endif
-# if defined(__BIG_ENDIAN) && !defined(BIG_ENDIAN)
-# define BIG_ENDIAN __BIG_ENDIAN
-# endif
-# if defined(__BYTE_ORDER) && !defined(BYTE_ORDER)
-# define BYTE_ORDER __BYTE_ORDER
-# endif
-# if (WITH_HOST_BYTE_ORDER == 0)
-# undef WITH_HOST_BYTE_ORDER
-# define WITH_HOST_BYTE_ORDER BYTE_ORDER
-# endif
-# if (BYTE_ORDER != WITH_HOST_BYTE_ORDER)
-# error "host endian incorrectly configured, check config.h"
-# endif
-#endif
-
-/* INSERT HERE - hosts that have available LITTLE_ENDIAN and
- BIG_ENDIAN macro's */
-
-
-/* Some hosts don't define LITTLE_ENDIAN or BIG_ENDIAN, help them out */
-
-#ifndef LITTLE_ENDIAN
-#define LITTLE_ENDIAN 1234
-#endif
-#ifndef BIG_ENDIAN
-#define BIG_ENDIAN 4321
-#endif
-
-
-/* SunOS on SPARC:
-
- Big endian last time I looked */
-
-#if defined(sparc) || defined(__sparc__)
-# if (WITH_HOST_BYTE_ORDER == 0)
-# undef WITH_HOST_BYTE_ORDER
-# define WITH_HOST_BYTE_ORDER BIG_ENDIAN
-# endif
-# if (WITH_HOST_BYTE_ORDER != BIG_ENDIAN)
-# error "sun was big endian last time I looked ..."
-# endif
-#endif
-
-
-/* Random x86
-
- Little endian last time I looked */
-
-#if defined(i386) || defined(i486) || defined(i586) || defined (i686) || defined(__i386__) || defined(__i486__) || defined(__i586__) || defined (__i686__)
-# if (WITH_HOST_BYTE_ORDER == 0)
-# undef WITH_HOST_BYTE_ORDER
-# define WITH_HOST_BYTE_ORDER LITTLE_ENDIAN
-# endif
-# if (WITH_HOST_BYTE_ORDER != LITTLE_ENDIAN)
-# error "x86 was little endian last time I looked ..."
-# endif
-#endif
-
-#if (defined (__i486__) || defined (__i586__) || defined (__i686__)) && defined(__GNUC__) && WITH_BSWAP
-#undef htonl
-#undef ntohl
-#define htonl(IN) __extension__ ({ int _out; __asm__ ("bswap %0" : "=r" (_out) : "0" (IN)); _out; })
-#define ntohl(IN) __extension__ ({ int _out; __asm__ ("bswap %0" : "=r" (_out) : "0" (IN)); _out; })
-#endif
-
-/* Power or PowerPC running AIX */
-#if defined(_POWER) && defined(_AIX)
-# if (WITH_HOST_BYTE_ORDER == 0)
-# undef WITH_HOST_BYTE_ORDER
-# define WITH_HOST_BYTE_ORDER BIG_ENDIAN
-# endif
-# if (WITH_HOST_BYTE_ORDER != BIG_ENDIAN)
-# error "Power/PowerPC AIX was big endian last time I looked ..."
-# endif
-#endif
-
-/* Solaris running PowerPC */
-#if defined(__PPC) && defined(__sun__)
-# if (WITH_HOST_BYTE_ORDER == 0)
-# undef WITH_HOST_BYTE_ORDER
-# define WITH_HOST_BYTE_ORDER LITTLE_ENDIAN
-# endif
-# if (WITH_HOST_BYTE_ORDER != LITTLE_ENDIAN)
-# error "Solaris on PowerPCs was little endian last time I looked ..."
-# endif
-#endif
-
-/* HP/PA */
-#if defined(__hppa__)
-# if (WITH_HOST_BYTE_ORDER == 0)
-# undef WITH_HOST_BYTE_ORDER
-# define WITH_HOST_BYTE_ORDER BIG_ENDIAN
-# endif
-# if (WITH_HOST_BYTE_ORDER != BIG_ENDIAN)
-# error "HP/PA was big endian last time I looked ..."
-# endif
-#endif
-
-/* Big endian MIPS */
-#if defined(__MIPSEB__)
-# if (WITH_HOST_BYTE_ORDER == 0)
-# undef WITH_HOST_BYTE_ORDER
-# define WITH_HOST_BYTE_ORDER BIG_ENDIAN
-# endif
-# if (WITH_HOST_BYTE_ORDER != BIG_ENDIAN)
-# error "MIPSEB was big endian last time I looked ..."
-# endif
-#endif
-
-/* Little endian MIPS */
-#if defined(__MIPSEL__)
-# if (WITH_HOST_BYTE_ORDER == 0)
-# undef WITH_HOST_BYTE_ORDER
-# define WITH_HOST_BYTE_ORDER LITTLE_ENDIAN
-# endif
-# if (WITH_HOST_BYTE_ORDER != LITTLE_ENDIAN)
-# error "MIPSEL was little endian last time I looked ..."
-# endif
-#endif
-
-/* Windows NT */
-#if defined(__WIN32__)
-# if (WITH_HOST_BYTE_ORDER == 0)
-# undef WITH_HOST_BYTE_ORDER
-# define WITH_HOST_BYTE_ORDER LITTLE_ENDIAN
-# endif
-# if (WITH_HOST_BYTE_ORDER != LITTLE_ENDIAN)
-# error "Windows NT was little endian last time I looked ..."
-# endif
-#endif
-
-/* Alpha running DEC unix */
-#if defined(__osf__) && defined(__alpha__)
-# if (WITH_HOST_BYTE_ORDER == 0)
-# undef WITH_HOST_BYTE_ORDER
-# define WITH_HOST_BYTE_ORDER LITTLE_ENDIAN
-# endif
-# if (WITH_HOST_BYTE_ORDER != LITTLE_ENDIAN)
-# error "AXP running DEC unix was little endian last time I looked ..."
-# endif
-#endif
-
-
-/* INSERT HERE - additional hosts that do not have LITTLE_ENDIAN and
- BIG_ENDIAN definitions available. */
-
-/* SWAP */
-
-#define SWAP_1 swap_1
-#define SWAP_2 swap_2
-#define SWAP_4 swap_4
-#define SWAP_8 swap_8
-
-
-/* HOST to BE */
-
-#define H2BE_1 endian_h2be_1
-#define H2BE_2 endian_h2be_2
-#define H2BE_4 endian_h2be_4
-#define H2BE_8 endian_h2be_8
-#define BE2H_1 endian_be2h_1
-#define BE2H_2 endian_be2h_2
-#define BE2H_4 endian_be2h_4
-#define BE2H_8 endian_be2h_8
-
-
-/* HOST to LE */
-
-#define H2LE_1 endian_h2le_1
-#define H2LE_2 endian_h2le_2
-#define H2LE_4 endian_h2le_4
-#define H2LE_8 endian_h2le_8
-#define LE2H_1 endian_le2h_1
-#define LE2H_2 endian_le2h_2
-#define LE2H_4 endian_le2h_4
-#define LE2H_8 endian_le2h_8
-
-
-/* HOST to TARGET */
-
-#define H2T_1 endian_h2t_1
-#define H2T_2 endian_h2t_2
-#define H2T_4 endian_h2t_4
-#define H2T_8 endian_h2t_8
-#define T2H_1 endian_t2h_1
-#define T2H_2 endian_t2h_2
-#define T2H_4 endian_t2h_4
-#define T2H_8 endian_t2h_8
-
-
-/* CONVERT IN PLACE
-
- These macros, given an argument of unknown size, swap its value in
- place if a host/target conversion is required. */
-
-#define H2T(VARIABLE) \
-do { \
- switch (sizeof(VARIABLE)) { \
- case 1: VARIABLE = H2T_1(VARIABLE); break; \
- case 2: VARIABLE = H2T_2(VARIABLE); break; \
- case 4: VARIABLE = H2T_4(VARIABLE); break; \
- case 8: VARIABLE = H2T_8(VARIABLE); break; \
- } \
-} while (0)
-
-#define T2H(VARIABLE) \
-do { \
- switch (sizeof(VARIABLE)) { \
- case 1: VARIABLE = T2H_1(VARIABLE); break; \
- case 2: VARIABLE = T2H_2(VARIABLE); break; \
- case 4: VARIABLE = T2H_4(VARIABLE); break; \
- case 8: VARIABLE = T2H_8(VARIABLE); break; \
- } \
-} while (0)
-
-#define SWAP(VARIABLE) \
-do { \
- switch (sizeof(VARIABLE)) { \
- case 1: VARIABLE = SWAP_1(VARIABLE); break; \
- case 2: VARIABLE = SWAP_2(VARIABLE); break; \
- case 4: VARIABLE = SWAP_4(VARIABLE); break; \
- case 8: VARIABLE = SWAP_8(VARIABLE); break; \
- } \
-} while (0)
-
-#define H2BE(VARIABLE) \
-do { \
- switch (sizeof(VARIABLE)) { \
- case 1: VARIABLE = H2BE_1(VARIABLE); break; \
- case 2: VARIABLE = H2BE_2(VARIABLE); break; \
- case 4: VARIABLE = H2BE_4(VARIABLE); break; \
- case 8: VARIABLE = H2BE_8(VARIABLE); break; \
- } \
-} while (0)
-
-#define BE2H(VARIABLE) \
-do { \
- switch (sizeof(VARIABLE)) { \
- case 1: VARIABLE = BE2H_1(VARIABLE); break; \
- case 2: VARIABLE = BE2H_2(VARIABLE); break; \
- case 4: VARIABLE = BE2H_4(VARIABLE); break; \
- case 8: VARIABLE = BE2H_8(VARIABLE); break; \
- } \
-} while (0)
-
-#define H2LE(VARIABLE) \
-do { \
- switch (sizeof(VARIABLE)) { \
- case 1: VARIABLE = H2LE_1(VARIABLE); break; \
- case 2: VARIABLE = H2LE_2(VARIABLE); break; \
- case 4: VARIABLE = H2LE_4(VARIABLE); break; \
- case 8: VARIABLE = H2LE_8(VARIABLE); break; \
- } \
-} while (0)
-
-#define LE2H(VARIABLE) \
-do { \
- switch (sizeof(VARIABLE)) { \
- case 1: VARIABLE = LE2H_1(VARIABLE); break; \
- case 2: VARIABLE = LE2H_2(VARIABLE); break; \
- case 4: VARIABLE = LE2H_4(VARIABLE); break; \
- case 8: VARIABLE = LE2H_8(VARIABLE); break; \
- } \
-} while (0)
-
-
-
-/* TARGET WORD:
-
- Byte swap a quantity the size of the targets word */
-
-#if (WITH_TARGET_WORD_BITSIZE == 64)
-#define H2T_word H2T_8
-#define T2H_word T2H_8
-#define H2BE_word H2BE_8
-#define BE2H_word BE2H_8
-#define H2LE_word H2LE_8
-#define LE2H_word LE2H_8
-#define SWAP_word SWAP_8
-#endif
-#if (WITH_TARGET_WORD_BITSIZE == 32)
-#define H2T_word H2T_4
-#define T2H_word T2H_4
-#define H2BE_word H2BE_4
-#define BE2H_word BE2H_4
-#define H2LE_word H2LE_4
-#define LE2H_word LE2H_4
-#define SWAP_word SWAP_4
-#endif
-
-
-/* TARGET CELL:
-
- Byte swap a quantity the size of the targets IEEE 1275 memory cell */
-
-#define H2T_cell H2T_4
-#define T2H_cell T2H_4
-#define H2BE_cell H2BE_4
-#define BE2H_cell BE2H_4
-#define H2LE_cell H2LE_4
-#define LE2H_cell LE2H_4
-#define SWAP_cell SWAP_4
-
-
-#if (SIM_ENDIAN_INLINE & INCLUDE_MODULE)
-# include "sim-endian.c"
-#endif
-
-#endif /* _SIM_ENDIAN_H_ */
diff --git a/sim/ppc/sim_callbacks.h b/sim/ppc/sim_callbacks.h
deleted file mode 100644
index 322af9de8a1..00000000000
--- a/sim/ppc/sim_callbacks.h
+++ /dev/null
@@ -1,115 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1995,1998, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-#ifndef _SIM_CALLBACKS_H_
-#define _SIM_CALLBACKS_H_
-
-/* Simulator output:
-
- Functions to report diagnostic information to the user. */
-
-#define printf_filtered sim_io_printf_filtered
-void sim_io_printf_filtered
-(const char *msg, ...) __attribute__ ((format (printf, 1, 2)));
-
-void NORETURN error
-(const char *msg, ...);
-
-
-/* External environment:
-
- Some HOST OS's require regular polling so that external events such
- as GUI io can be handled. */
-
-void sim_io_poll_quit
-(void);
-
-
-
-/* Model I/O:
-
- These functions provide the interface between the modeled targets
- standard input and output streams and the hosts external
- environment.
-
- The underlying model is responsible for co-ordinating I/O
- interactions such as:
-
- main()
- {
- const char mess[] = "Hello World\r\n";
- int out;
- out = dup(1);
- close(1);
- write(out, mess, sizeof(mess))
- }
-
- That is to say, the underlying model would, in implementing dup()
- recorded the fact that any output directed at fid-OUT should be
- displayed using sim_io_write_stdout(). While for the code stub:
-
- main()
- {
- const char mess[] = "Hello World\r\n";
- int out;
- close(1);
- out = open("output", 0x0001|0x0200, 0); // write+create
- out = dup(1);
- write(out, mess, sizeof(mess))
- }
-
- would result in output to fid-1 being directed towards the file
- "output". */
-
-
-int
-sim_io_write_stdout
-(const char *buf,
- int sizeof_buf);
-
-int
-sim_io_write_stderr
-(const char *buf,
- int sizeof_buf);
-
-/* read results */
-enum { sim_io_eof = -1, sim_io_not_ready = -2, }; /* See: IEEE 1275 */
-
-int
-sim_io_read_stdin
-(char *buf,
- int sizeof_buf);
-
-#define flush_stdoutput sim_io_flush_stdoutput
-void sim_io_flush_stdoutput
-(void);
-
-
-/* Memory management with an allocator that clears memory before use. */
-
-void *zalloc
-(long size);
-
-#define ZALLOC(TYPE) (TYPE*)zalloc(sizeof (TYPE))
-
-void zfree(void*);
-
-#endif
diff --git a/sim/ppc/sim_calls.c b/sim/ppc/sim_calls.c
deleted file mode 100644
index b6defa0778b..00000000000
--- a/sim/ppc/sim_calls.c
+++ /dev/null
@@ -1,459 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1996,1998, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-#include <signal.h> /* FIXME - should be machine dependant version */
-#include <stdarg.h>
-#include <ctype.h>
-
-#include "psim.h"
-#include "options.h"
-
-#undef printf_filtered /* blow away the mapping */
-
-#ifdef HAVE_STDLIB_H
-#include <stdlib.h>
-#endif
-
-#ifdef HAVE_STRING_H
-#include <string.h>
-#else
-#ifdef HAVE_STRINGS_H
-#include <strings.h>
-#endif
-#endif
-
-#include "defs.h"
-#include "bfd.h"
-#include "callback.h"
-#include "remote-sim.h"
-
-/* Define the rate at which the simulator should poll the host
- for a quit. */
-#ifndef POLL_QUIT_INTERVAL
-#define POLL_QUIT_INTERVAL 0x20
-#endif
-
-static int poll_quit_count = POLL_QUIT_INTERVAL;
-
-/* Structures used by the simulator, for gdb just have static structures */
-
-static psim *simulator;
-static device *root_device;
-static host_callback *callbacks;
-
-/* We use GDB's gdbarch_register_name function to map GDB register
- numbers onto names, which we can then look up in the register
- table. Since the `set architecture' command can select a new
- processor variant at run-time, the meanings of the register numbers
- can change, so we need to make sure the sim uses the same
- name/number mapping that GDB uses.
-
- (We don't use the REGISTER_NAME macro, which is a wrapper for
- gdbarch_register_name. We #include GDB's "defs.h", which tries to
- #include GDB's "config.h", but gets ours instead, and REGISTER_NAME
- ends up not getting defined. Simpler to just use
- gdbarch_register_name directly.)
-
- We used to just use the REGISTER_NAMES macro from GDB's
- target-dependent header files, which expanded into an initializer
- for an array of strings. That was kind of nice, because it meant
- that libsim.a had only a compile-time dependency on GDB; using
- gdbarch_register_name directly means that there are now link-time
- and run-time dependencies too.
-
- Perhaps the host_callback structure could provide a function for
- retrieving register names; that would be cleaner. */
-
-SIM_DESC
-sim_open (SIM_OPEN_KIND kind,
- host_callback *callback,
- struct _bfd *abfd,
- char **argv)
-{
- callbacks = callback;
-
- /* Note: The simulation is not created by sim_open() because
- complete information is not yet available */
- /* trace the call */
- TRACE(trace_gdb, ("sim_open called\n"));
-
- if (root_device != NULL)
- sim_io_printf_filtered("Warning - re-open of simulator leaks memory\n");
- root_device = psim_tree();
- simulator = NULL;
-
- psim_options(root_device, argv + 1);
-
- if (ppc_trace[trace_opts])
- print_options ();
-
- /* fudge our descriptor for now */
- return (SIM_DESC) 1;
-}
-
-
-void
-sim_close (SIM_DESC sd, int quitting)
-{
- TRACE(trace_gdb, ("sim_close(quitting=%d) called\n", quitting));
- if (ppc_trace[trace_print_info] && simulator != NULL)
- psim_print_info (simulator, ppc_trace[trace_print_info]);
-}
-
-
-SIM_RC
-sim_load (SIM_DESC sd, char *prog, bfd *abfd, int from_tty)
-{
- TRACE(trace_gdb, ("sim_load(prog=%s, from_tty=%d) called\n",
- prog, from_tty));
- ASSERT(prog != NULL);
-
- /* create the simulator */
- TRACE(trace_gdb, ("sim_load() - first time, create the simulator\n"));
- simulator = psim_create(prog, root_device);
-
- /* bring in all the data section */
- psim_init(simulator);
-
- /* get the start address */
- if (abfd == NULL)
- {
- abfd = bfd_openr (prog, 0);
- if (abfd == NULL)
- error ("psim: can't open \"%s\": %s\n",
- prog, bfd_errmsg (bfd_get_error ()));
- if (!bfd_check_format (abfd, bfd_object))
- {
- const char *errmsg = bfd_errmsg (bfd_get_error ());
- bfd_close (abfd);
- error ("psim: \"%s\" is not an object file: %s\n",
- prog, errmsg);
- }
- bfd_close (abfd);
- }
-
- return SIM_RC_OK;
-}
-
-
-int
-sim_read (SIM_DESC sd, SIM_ADDR mem, unsigned char *buf, int length)
-{
- int result = psim_read_memory(simulator, MAX_NR_PROCESSORS,
- buf, mem, length);
- TRACE(trace_gdb, ("sim_read(mem=0x%lx, buf=0x%lx, length=%d) = %d\n",
- (long)mem, (long)buf, length, result));
- return result;
-}
-
-
-int
-sim_write (SIM_DESC sd, SIM_ADDR mem, unsigned char *buf, int length)
-{
- int result = psim_write_memory(simulator, MAX_NR_PROCESSORS,
- buf, mem, length,
- 1/*violate_ro*/);
- TRACE(trace_gdb, ("sim_write(mem=0x%lx, buf=0x%lx, length=%d) = %d\n",
- (long)mem, (long)buf, length, result));
- return result;
-}
-
-
-int
-sim_fetch_register (SIM_DESC sd, int regno, unsigned char *buf, int length)
-{
- char *regname;
-
- if (simulator == NULL) {
- return 0;
- }
-
- /* GDB will sometimes ask for the contents of a register named "";
- we ignore such requests, and leave garbage in *BUF. In GDB
- terms, the empty string means "the register with this number is
- not present in the currently selected architecture variant."
- That's following the kludge we're using for the MIPS processors.
- But there are loops that just walk through the entire list of
- names and try to get everything. */
- regname = gdbarch_register_name (current_gdbarch, regno);
- if (! regname || regname[0] == '\0')
- return -1;
-
- TRACE(trace_gdb, ("sim_fetch_register(regno=%d(%s), buf=0x%lx)\n",
- regno, regname, (long)buf));
- psim_read_register(simulator, MAX_NR_PROCESSORS,
- buf, regname, raw_transfer);
- return -1;
-}
-
-
-int
-sim_store_register (SIM_DESC sd, int regno, unsigned char *buf, int length)
-{
- char *regname;
-
- if (simulator == NULL)
- return 0;
-
- /* See comments in sim_fetch_register, above. */
- regname = gdbarch_register_name (current_gdbarch, regno);
- if (! regname || regname[0] == '\0')
- return -1;
-
- TRACE(trace_gdb, ("sim_store_register(regno=%d(%s), buf=0x%lx)\n",
- regno, regname, (long)buf));
- psim_write_register(simulator, MAX_NR_PROCESSORS,
- buf, regname, raw_transfer);
- return -1;
-}
-
-
-void
-sim_info (SIM_DESC sd, int verbose)
-{
- TRACE(trace_gdb, ("sim_info(verbose=%d) called\n", verbose));
- psim_print_info (simulator, verbose);
-}
-
-
-SIM_RC
-sim_create_inferior (SIM_DESC sd,
- struct _bfd *abfd,
- char **argv,
- char **envp)
-{
- unsigned_word entry_point;
- TRACE(trace_gdb, ("sim_create_inferior(start_address=0x%x, ...)\n",
- entry_point));
-
- if (simulator == NULL)
- error ("No program loaded");
-
- if (abfd != NULL)
- entry_point = bfd_get_start_address (abfd);
- else
- entry_point = 0xfff00000; /* ??? */
-
- psim_init(simulator);
- psim_stack(simulator, argv, envp);
-
- psim_write_register(simulator, -1 /* all start at same PC */,
- &entry_point, "pc", cooked_transfer);
- return SIM_RC_OK;
-}
-
-
-void
-sim_stop_reason (SIM_DESC sd, enum sim_stop *reason, int *sigrc)
-{
- psim_status status = psim_get_status(simulator);
-
- switch (status.reason) {
- case was_continuing:
- *reason = sim_stopped;
- if (status.signal == 0)
- *sigrc = SIGTRAP;
- else
- *sigrc = status.signal;
- break;
- case was_trap:
- *reason = sim_stopped;
- *sigrc = SIGTRAP;
- break;
- case was_exited:
- *reason = sim_exited;
- *sigrc = status.signal;
- break;
- case was_signalled:
- *reason = sim_signalled;
- *sigrc = status.signal;
- break;
- }
-
- TRACE(trace_gdb, ("sim_stop_reason(reason=0x%lx(%ld), sigrc=0x%lx(%ld))\n",
- (long)reason, (long)*reason, (long)sigrc, (long)*sigrc));
-}
-
-
-
-/* Run (or resume) the program. */
-
-int
-sim_stop (SIM_DESC sd)
-{
- psim_stop (simulator);
- return 1;
-}
-
-void
-sim_resume (SIM_DESC sd, int step, int siggnal)
-{
- TRACE(trace_gdb, ("sim_resume(step=%d, siggnal=%d)\n",
- step, siggnal));
-
- if (step)
- {
- psim_step (simulator);
- }
- else
- {
- psim_run (simulator);
- }
-}
-
-void
-sim_do_command (SIM_DESC sd, char *cmd)
-{
- TRACE(trace_gdb, ("sim_do_commands(cmd=%s) called\n",
- cmd ? cmd : "(null)"));
- if (cmd != NULL) {
- char **argv = buildargv(cmd);
- psim_command(root_device, argv);
- freeargv(argv);
- }
-}
-
-
-/* Polling, if required */
-
-void
-sim_io_poll_quit (void)
-{
- if (callbacks->poll_quit != NULL && poll_quit_count-- < 0)
- {
- poll_quit_count = POLL_QUIT_INTERVAL;
- if (callbacks->poll_quit (callbacks))
- psim_stop (simulator);
- }
-}
-
-
-
-/* Map simulator IO operations onto the corresponding GDB I/O
- functions.
-
- NB: Only a limited subset of operations are mapped across. More
- advanced operations (such as dup or write) must either be mapped to
- one of the below calls or handled internally */
-
-int
-sim_io_read_stdin(char *buf,
- int sizeof_buf)
-{
- switch (CURRENT_STDIO) {
- case DO_USE_STDIO:
- return callbacks->read_stdin(callbacks, buf, sizeof_buf);
- break;
- case DONT_USE_STDIO:
- return callbacks->read(callbacks, 0, buf, sizeof_buf);
- break;
- default:
- error("sim_io_read_stdin: unaccounted switch\n");
- break;
- }
- return 0;
-}
-
-int
-sim_io_write_stdout(const char *buf,
- int sizeof_buf)
-{
- switch (CURRENT_STDIO) {
- case DO_USE_STDIO:
- return callbacks->write_stdout(callbacks, buf, sizeof_buf);
- break;
- case DONT_USE_STDIO:
- return callbacks->write(callbacks, 1, buf, sizeof_buf);
- break;
- default:
- error("sim_io_write_stdout: unaccounted switch\n");
- break;
- }
- return 0;
-}
-
-int
-sim_io_write_stderr(const char *buf,
- int sizeof_buf)
-{
- switch (CURRENT_STDIO) {
- case DO_USE_STDIO:
- /* NB: I think there should be an explicit write_stderr callback */
- return callbacks->write(callbacks, 3, buf, sizeof_buf);
- break;
- case DONT_USE_STDIO:
- return callbacks->write(callbacks, 3, buf, sizeof_buf);
- break;
- default:
- error("sim_io_write_stderr: unaccounted switch\n");
- break;
- }
- return 0;
-}
-
-
-void
-sim_io_printf_filtered(const char *fmt,
- ...)
-{
- char message[1024];
- va_list ap;
- /* format the message */
- va_start(ap, fmt);
- vsprintf(message, fmt, ap);
- va_end(ap);
- /* sanity check */
- if (strlen(message) >= sizeof(message))
- error("sim_io_printf_filtered: buffer overflow\n");
- callbacks->printf_filtered(callbacks, "%s", message);
-}
-
-void
-sim_io_flush_stdoutput(void)
-{
- switch (CURRENT_STDIO) {
- case DO_USE_STDIO:
- callbacks->flush_stdout (callbacks);
- break;
- case DONT_USE_STDIO:
- break;
- default:
- error("sim_io_read_stdin: unaccounted switch\n");
- break;
- }
-}
-
-/****/
-
-void *
-zalloc(long size)
-{
- void *memory = (void*)xmalloc(size);
- if (memory == NULL)
- error("xmalloc failed\n");
- memset(memory, 0, size);
- return memory;
-}
-
-void zfree(void *data)
-{
- free(data);
-}
diff --git a/sim/ppc/std-config.h b/sim/ppc/std-config.h
deleted file mode 100644
index eaf35582346..00000000000
--- a/sim/ppc/std-config.h
+++ /dev/null
@@ -1,672 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1995, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-#ifndef _PSIM_CONFIG_H_
-#define _PSIM_CONFIG_H_
-
-
-/* endianness of the host/target:
-
- If the build process is aware (at compile time) of the endianness
- of the host/target it is able to eliminate slower generic endian
- handling code.
-
- Possible values are 0 (unknown), LITTLE_ENDIAN, BIG_ENDIAN */
-
-#ifndef WITH_HOST_BYTE_ORDER
-#define WITH_HOST_BYTE_ORDER 0 /*unknown*/
-#endif
-
-#ifndef WITH_TARGET_BYTE_ORDER
-#define WITH_TARGET_BYTE_ORDER 0 /*unknown*/
-#endif
-
-extern int current_host_byte_order;
-#define CURRENT_HOST_BYTE_ORDER (WITH_HOST_BYTE_ORDER \
- ? WITH_HOST_BYTE_ORDER \
- : current_host_byte_order)
-extern int current_target_byte_order;
-#define CURRENT_TARGET_BYTE_ORDER (WITH_TARGET_BYTE_ORDER \
- ? WITH_TARGET_BYTE_ORDER \
- : current_target_byte_order)
-
-
-/* PowerPC XOR endian.
-
- In addition to the above, the simulator can support the PowerPC's
- horrible XOR endian mode. This feature makes it possible to
- control the endian mode of a processor using the MSR. */
-
-#ifndef WITH_XOR_ENDIAN
-#define WITH_XOR_ENDIAN 8
-#endif
-
-
-/* Intel host BSWAP support:
-
- Whether to use bswap on the 486 and pentiums rather than the 386
- sequence that uses xchgb/rorl/xchgb */
-#ifndef WITH_BSWAP
-#define WITH_BSWAP 0
-#endif
-
-
-/* SMP support:
-
- Sets a limit on the number of processors that can be simulated. If
- WITH_SMP is set to zero (0), the simulator is restricted to
- suporting only on processor (and as a consequence leaves the SMP
- code out of the build process).
-
- The actual number of processors is taken from the device
- /options/smp@<nr-cpu> */
-
-#ifndef WITH_SMP
-#define WITH_SMP 5
-#endif
-#if WITH_SMP
-#define MAX_NR_PROCESSORS WITH_SMP
-#else
-#define MAX_NR_PROCESSORS 1
-#endif
-
-
-/* Word size of host/target:
-
- Set these according to your host and target requirements. At this
- point in time, I've only compiled (not run) for a 64bit and never
- built for a 64bit host. This will always remain a compile time
- option */
-
-#ifndef WITH_TARGET_WORD_BITSIZE
-#define WITH_TARGET_WORD_BITSIZE 32 /* compiled only */
-#endif
-
-#ifndef WITH_HOST_WORD_BITSIZE
-#define WITH_HOST_WORD_BITSIZE 32 /* 64bit ready? */
-#endif
-
-
-/* Program environment:
-
- Three environments are available - UEA (user), VEA (virtual) and
- OEA (perating). The former two are environment that users would
- expect to see (VEA includes things like coherency and the time
- base) while OEA is what an operating system expects to see. By
- setting these to specific values, the build process is able to
- eliminate non relevent environment code
-
- CURRENT_ENVIRONMENT specifies which of vea or oea is required for
- the current runtime. */
-
-#define USER_ENVIRONMENT 1
-#define VIRTUAL_ENVIRONMENT 2
-#define OPERATING_ENVIRONMENT 3
-
-#ifndef WITH_ENVIRONMENT
-#define WITH_ENVIRONMENT 0
-#endif
-
-extern int current_environment;
-#define CURRENT_ENVIRONMENT (WITH_ENVIRONMENT \
- ? WITH_ENVIRONMENT \
- : current_environment)
-
-
-/* Optional VEA/OEA code:
-
- The below, required for the OEA model may also be included in the
- VEA model however, as far as I can tell only make things
- slower... */
-
-
-/* Events. Devices modeling real H/W need to be able to efficiently
- schedule things to do at known times in the future. The event
- queue implements this. Unfortunatly this adds the need to check
- for any events once each full instruction cycle. */
-
-#define WITH_EVENTS (WITH_ENVIRONMENT != USER_ENVIRONMENT)
-
-
-/* Time base:
-
- The PowerPC architecture includes the addition of both a time base
- register and a decrement timer. Like events adds to the overhead
- of of some instruction cycles. */
-
-#ifndef WITH_TIME_BASE
-#define WITH_TIME_BASE (WITH_ENVIRONMENT != USER_ENVIRONMENT)
-#endif
-
-
-/* Callback/Default Memory.
-
- Core includes a builtin memory type (raw_memory) that is
- implemented using an array. raw_memory does not require any
- additional functions etc.
-
- Callback memory is where the core calls a core device for the data
- it requires.
-
- Default memory is an extenstion of this where for addresses that do
- not map into either a callback or core memory range a default map
- can be used.
-
- The OEA model uses callback memory for devices and default memory
- for buses.
-
- The VEA model uses callback memory to capture `page faults'.
-
- While it may be possible to eliminate callback/default memory (and
- hence also eliminate an additional test per memory fetch) it
- probably is not worth the effort.
-
- BTW, while raw_memory could have been implemented as a callback,
- profiling has shown that there is a biger win (at least for the
- x86) in eliminating a function call for the most common
- (raw_memory) case. */
-
-#define WITH_CALLBACK_MEMORY 1
-
-
-/* Alignment:
-
- The PowerPC may or may not handle miss aligned transfers. An
- implementation normally handles miss aligned transfers in big
- endian mode but generates an exception in little endian mode.
-
- This model. Instead allows both little and big endian modes to
- either take exceptions or handle miss aligned transfers.
-
- If 0 is specified then for big-endian mode miss alligned accesses
- are permitted (NONSTRICT_ALIGNMENT) while in little-endian mode the
- processor will fault on them (STRICT_ALIGNMENT). */
-
-#define NONSTRICT_ALIGNMENT 1
-#define STRICT_ALIGNMENT 2
-
-#ifndef WITH_ALIGNMENT
-#define WITH_ALIGNMENT 0
-#endif
-
-extern int current_alignment;
-#define CURRENT_ALIGNMENT (WITH_ALIGNMENT \
- ? WITH_ALIGNMENT \
- : current_alignment)
-
-
-/* Floating point suport:
-
- Still under development. */
-
-#define SOFT_FLOATING_POINT 1
-#define HARD_FLOATING_POINT 2
-
-#ifndef WITH_FLOATING_POINT
-#define WITH_FLOATING_POINT HARD_FLOATING_POINT
-#endif
-extern int current_floating_point;
-#define CURRENT_FLOATING_POINT (WITH_FLOATING_POINT \
- ? WITH_FLOATING_POINT \
- : current_floating_point)
-
-
-/* Debugging:
-
- Control the inclusion of debugging code. */
-
-/* Include the tracing code. Disabling this eliminates all tracing
- code */
-
-#ifndef WITH_TRACE
-#define WITH_TRACE 1
-#endif
-
-/* include code that checks assertions scattered through out the
- program */
-
-#ifndef WITH_ASSERT
-#define WITH_ASSERT 1
-#endif
-
-/* Whether to check instructions for reserved bits being set */
-
-#ifndef WITH_RESERVED_BITS
-#define WITH_RESERVED_BITS 1
-#endif
-
-/* include monitoring code */
-
-#define MONITOR_INSTRUCTION_ISSUE 1
-#define MONITOR_LOAD_STORE_UNIT 2
-#ifndef WITH_MON
-#define WITH_MON (MONITOR_LOAD_STORE_UNIT \
- | MONITOR_INSTRUCTION_ISSUE)
-#endif
-
-/* Current CPU model (models are in the generated models.h include file) */
-#ifndef WITH_MODEL
-#define WITH_MODEL 0
-#endif
-
-#define CURRENT_MODEL (WITH_MODEL \
- ? WITH_MODEL \
- : current_model)
-
-#ifndef WITH_DEFAULT_MODEL
-#define WITH_DEFAULT_MODEL DEFAULT_MODEL
-#endif
-
-#define MODEL_ISSUE_IGNORE (-1)
-#define MODEL_ISSUE_PROCESS 1
-
-#ifndef WITH_MODEL_ISSUE
-#define WITH_MODEL_ISSUE 0
-#endif
-
-extern int current_model_issue;
-#define CURRENT_MODEL_ISSUE (WITH_MODEL_ISSUE \
- ? WITH_MODEL_ISSUE \
- : current_model_issue)
-
-/* Whether or not input/output just uses stdio, or uses printf_filtered for
- output, and polling input for input. */
-
-#define DONT_USE_STDIO 2
-#define DO_USE_STDIO 1
-
-#ifndef WITH_STDIO
-#define WITH_STDIO 0
-#endif
-
-extern int current_stdio;
-#define CURRENT_STDIO (WITH_STDIO \
- ? WITH_STDIO \
- : current_stdio)
-
-
-
-/* INLINE CODE SELECTION:
-
- GCC -O3 attempts to inline any function or procedure in scope. The
- options below facilitate fine grained control over what is and what
- isn't made inline. For instance it can control things down to a
- specific modules static routines. Doing this allows the compiler
- to both eliminate the overhead of function calls and (as a
- consequence) also eliminate further dead code.
-
- On a CISC (x86) I've found that I can achieve an order of magintude
- speed improvement (x3-x5). In the case of RISC (sparc) while the
- performance gain isn't as great it is still significant.
-
- Each module is controled by the macro <module>_INLINE which can
- have the values described below
-
- 0 Do not inline any thing for the given module
-
- The following additional values are `bit fields' and can be
- combined.
-
- REVEAL_MODULE:
-
- Include the C file for the module into the file being compiled
- but do not make the functions within the module inline.
-
- While of no apparent benefit, this makes it possible for the
- included module, when compiled to inline its calls to what
- would otherwize be external functions.
-
- INLINE_MODULE:
-
- Make external functions within the module `inline'. Thus if
- the module is included into a file being compiled, calls to
- its funtions can be eliminated. 2 implies 1.
-
- INLINE_LOCALS:
-
- Make internal (static) functions within the module `inline'.
-
- The following abreviations are available:
-
- INCLUDE_MODULE == (REVEAL_MODULE | INLINE_MODULE)
-
- ALL_INLINE == (REVEAL_MODULE | INLINE_MODULE | INLINE_LOCALS)
-
- In addition to this, modules have been put into two categories.
-
- Simple modules - eg sim-endian.h bits.h
-
- Because these modules are small and simple and do not have
- any complex interpendencies they are configured, if
- <module>_INLINE is so enabled, to inline themselves in all
- modules that include those files.
-
- For the default build, this is a real win as all byte
- conversion and bit manipulation functions are inlined.
-
- Complex modules - the rest
-
- These are all handled using the files inline.h and inline.c.
- psim.c includes the above which in turn include any remaining
- code.
-
- IMPLEMENTATION:
-
- The inline ability is enabled by prefixing every data / function
- declaration and definition with one of the following:
-
-
- INLINE_<module>
-
- Prefix to any global function that is a candidate for being
- inline.
-
- values - `', `static', `static INLINE'
-
-
- EXTERN_<module>
-
- Prefix to any global data structures for the module. Global
- functions that are not to be inlined shall also be prefixed
- with this.
-
- values - `', `static', `static'
-
-
- STATIC_INLINE_<module>
-
- Prefix to any local (static) function that is a candidate for
- being made inline.
-
- values - `static', `static INLINE'
-
-
- static
-
- Prefix all local data structures. Local functions that are not
- to be inlined shall also be prefixed with this.
-
- values - `static', `static'
-
- nb: will not work for modules that are being inlined for every
- use (white lie).
-
-
- extern
- #ifndef _INLINE_C_
- #endif
-
- Prefix to any declaration of a global object (function or
- variable) that should not be inlined and should have only one
- definition. The #ifndef wrapper goes around the definition
- propper to ensure that only one copy is generated.
-
- nb: this will not work when a module is being inlined for every
- use.
-
-
- STATIC_<module>
-
- Replaced by either `static' or `EXTERN_MODULE'.
-
-
- REALITY CHECK:
-
- This is not for the faint hearted. I've seen GCC get up to 500mb
- trying to compile what this can create.
-
- Some of the modules do not yet implement the WITH_INLINE_STATIC
- option. Instead they use the macro STATIC_INLINE to control their
- local function.
-
- Because of the way that GCC parses __attribute__(), the macro's
- need to be adjacent to the functioin name rather then at the start
- of the line vis:
-
- int STATIC_INLINE_MODULE f(void);
- void INLINE_MODULE *g(void);
-
- */
-
-#define REVEAL_MODULE 1
-#define INLINE_MODULE 2
-#define INCLUDE_MODULE (INLINE_MODULE | REVEAL_MODULE)
-#define INLINE_LOCALS 4
-#define ALL_INLINE 7
-
-/* Your compilers inline reserved word */
-
-#ifndef INLINE
-#if defined(__GNUC__) && defined(__OPTIMIZE__)
-#define INLINE __inline__
-#else
-#define INLINE /*inline*/
-#endif
-#endif
-
-
-/* Your compilers pass parameters in registers reserved word */
-
-#ifndef WITH_REGPARM
-#define WITH_REGPARM 0
-#endif
-
-/* Your compilers use an alternative calling sequence reserved word */
-
-#ifndef WITH_STDCALL
-#define WITH_STDCALL 0
-#endif
-
-#if !defined REGPARM
-#if defined(__GNUC__) && (defined(__i386__) || defined(__i486__) || defined(__i586__) || defined(__i686__))
-#if (WITH_REGPARM && WITH_STDCALL)
-#define REGPARM __attribute__((__regparm__(WITH_REGPARM),__stdcall__))
-#else
-#if (WITH_REGPARM && !WITH_STDCALL)
-#define REGPARM __attribute__((__regparm__(WITH_REGPARM)))
-#else
-#if (!WITH_REGPARM && WITH_STDCALL)
-#define REGPARM __attribute__((__stdcall__))
-#endif
-#endif
-#endif
-#endif
-#endif
-
-#if !defined REGPARM
-#define REGPARM
-#endif
-
-
-
-/* Default prefix for static functions */
-
-#ifndef STATIC_INLINE
-#define STATIC_INLINE static INLINE
-#endif
-
-/* Default macro to simplify control several of key the inlines */
-
-#ifndef DEFAULT_INLINE
-#define DEFAULT_INLINE INLINE_LOCALS
-#endif
-
-/* Code that converts between hosts and target byte order. Used on
- every memory access (instruction and data). See sim-endian.h for
- additional byte swapping configuration information. This module
- can inline for all callers */
-
-#ifndef SIM_ENDIAN_INLINE
-#define SIM_ENDIAN_INLINE (DEFAULT_INLINE ? ALL_INLINE : 0)
-#endif
-
-/* Low level bit manipulation routines. This module can inline for all
- callers */
-
-#ifndef BITS_INLINE
-#define BITS_INLINE (DEFAULT_INLINE ? ALL_INLINE : 0)
-#endif
-
-/* Code that gives access to various CPU internals such as registers.
- Used every time an instruction is executed */
-
-#ifndef CPU_INLINE
-#define CPU_INLINE (DEFAULT_INLINE ? ALL_INLINE : 0)
-#endif
-
-/* Code that translates between an effective and real address. Used
- by every load or store. */
-
-#ifndef VM_INLINE
-#define VM_INLINE DEFAULT_INLINE
-#endif
-
-/* Code that loads/stores data to/from the memory data structure.
- Used by every load or store */
-
-#ifndef CORE_INLINE
-#define CORE_INLINE DEFAULT_INLINE
-#endif
-
-/* Code to check for and process any events scheduled in the future.
- Called once per instruction cycle */
-
-#ifndef EVENTS_INLINE
-#define EVENTS_INLINE (DEFAULT_INLINE ? ALL_INLINE : 0)
-#endif
-
-/* Code monotoring the processors performance. It counts events on
- every instruction cycle */
-
-#ifndef MON_INLINE
-#define MON_INLINE (DEFAULT_INLINE ? ALL_INLINE : 0)
-#endif
-
-/* Code called on the rare occasions that an interrupt occures. */
-
-#ifndef INTERRUPTS_INLINE
-#define INTERRUPTS_INLINE DEFAULT_INLINE
-#endif
-
-/* Code called on the rare occasion that either gdb or the device tree
- need to manipulate a register within a processor */
-
-#ifndef REGISTERS_INLINE
-#define REGISTERS_INLINE DEFAULT_INLINE
-#endif
-
-/* Code called on the rare occasion that a processor is manipulating
- real hardware instead of RAM.
-
- Also, most of the functions in devices.c are always called through
- a jump table. */
-
-#ifndef DEVICE_INLINE
-#define DEVICE_INLINE (DEFAULT_INLINE ? INLINE_LOCALS : 0)
-#endif
-
-/* Code called used while the device tree is being built.
-
- Inlining this is of no benefit */
-
-#ifndef TREE_INLINE
-#define TREE_INLINE (DEFAULT_INLINE ? INLINE_LOCALS : 0)
-#endif
-
-/* Code called whenever information on a Special Purpose Register is
- required. Called by the mflr/mtlr pseudo instructions */
-
-#ifndef SPREG_INLINE
-#define SPREG_INLINE DEFAULT_INLINE
-#endif
-
-/* Functions modeling the semantics of each instruction. Two cases to
- consider, firstly of idecode is implemented with a switch then this
- allows the idecode function to inline each semantic function
- (avoiding a call). The second case is when idecode is using a
- table, even then while the semantic functions can't be inlined,
- setting it to one still enables each semantic function to inline
- anything they call (if that code is marked for being inlined).
-
- WARNING: you need lots (like 200mb of swap) of swap. Setting this
- to 1 is useful when using a table as it enables the sematic code to
- inline all of their called functions */
-
-#ifndef SEMANTICS_INLINE
-#define SEMANTICS_INLINE (DEFAULT_INLINE & ~INLINE_MODULE)
-#endif
-
-/* When using the instruction cache, code to decode an instruction and
- install it into the cache. Normally called when ever there is a
- miss in the instruction cache. */
-
-#ifndef ICACHE_INLINE
-#define ICACHE_INLINE (DEFAULT_INLINE & ~INLINE_MODULE)
-#endif
-
-/* General functions called by semantics functions but part of the
- instruction table. Although called by the semantic functions the
- frequency of calls is low. Consequently the need to inline this
- code is reduced. */
-
-#ifndef SUPPORT_INLINE
-#define SUPPORT_INLINE INLINE_LOCALS
-#endif
-
-/* Model specific code used in simulating functional units. Note, it actaully
- pays NOT to inline the PowerPC model functions (at least on the x86). This
- is because if it is inlined, each PowerPC instruction gets a separate copy
- of the code, which is not friendly to the cache. */
-
-#ifndef MODEL_INLINE
-#define MODEL_INLINE (DEFAULT_INLINE & ~INLINE_MODULE)
-#endif
-
-/* Code to print out what options we were compiled with. Because this
- is called at process startup, it doesn't have to be inlined, but
- if it isn't brought in and the model routines are inline, the model
- routines will be pulled in twice. */
-
-#ifndef OPTIONS_INLINE
-#define OPTIONS_INLINE MODEL_INLINE
-#endif
-
-/* idecode acts as the hub of the system, everything else is imported
- into this file */
-
-#ifndef IDECOCE_INLINE
-#define IDECODE_INLINE INLINE_LOCALS
-#endif
-
-/* psim, isn't actually inlined */
-
-#ifndef PSIM_INLINE
-#define PSIM_INLINE INLINE_LOCALS
-#endif
-
-/* Code to emulate os or rom compatibility. This code is called via a
- table and hence there is little benefit in making it inline */
-
-#ifndef OS_EMUL_INLINE
-#define OS_EMUL_INLINE 0
-#endif
-
-#endif /* _PSIM_CONFIG_H */
diff --git a/sim/ppc/table.c b/sim/ppc/table.c
deleted file mode 100644
index 1994d0d3ce0..00000000000
--- a/sim/ppc/table.c
+++ /dev/null
@@ -1,279 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1995, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-#include <sys/types.h>
-#include <sys/stat.h>
-#include <stdio.h>
-#include <fcntl.h>
-#include <ctype.h>
-
-#include "config.h"
-#include "misc.h"
-#include "lf.h"
-#include "table.h"
-
-#ifdef HAVE_UNISTD_H
-#include <unistd.h>
-#endif
-
-#ifdef HAVE_STDLIB_H
-#include <stdlib.h>
-#endif
-
-struct _table {
- size_t size;
- char *buffer;
- char *pos;
- int line_nr;
- int nr_fields;
- int nr_model_fields;
- char *file_name;
-};
-
-extern table *
-table_open(const char *file_name,
- int nr_fields,
- int nr_model_fields)
-{
- int fd;
- struct stat stat_buf;
- table *file;
- int nr;
-
- /* create a file descriptor */
- file = ZALLOC(table);
- ASSERT(file != NULL);
- file->nr_fields = nr_fields;
- file->nr_model_fields = nr_model_fields;
-
- /* save the file name */
- file->file_name = (char*)zalloc(strlen(file_name) + 1);
- ASSERT(file->file_name != NULL);
- strcpy(file->file_name, file_name);
-
- /* open the file */
- fd = open(file->file_name, O_RDONLY, 0);
- ASSERT(fd >= 0);
-
- /* determine the size */
- if (fstat(fd, &stat_buf) < 0) {
- perror("table_open.fstat");
- exit(1);
- }
- file->size = stat_buf.st_size;
-
- /* allocate this much memory */
- file->buffer = (char*)zalloc(file->size+1);
- if(file->buffer == NULL) {
- perror("table_open.calloc.file->size+1");
- exit(1);
- }
- file->pos = file->buffer;
-
- /* read it in */
-#ifdef __CYGWIN32__
- if ((file->size) && ((nr = read(fd, file->buffer, file->size)) <= 0)) {
-#else
- if ((nr = read(fd, file->buffer, file->size)) < file->size) {
-#endif
- perror("table_open.read");
- exit(1);
- }
- file->size = nr;
- file->buffer[file->size] = '\0';
-
- /* done */
- close(fd);
- return file;
-}
-
-
-extern table_entry *
-table_entry_read(table *file)
-{
- int field;
- table_entry *entry;
-
- /* skip comments/blanks */
- while(1) {
- /* leading white space */
- while (*file->pos != '\0'
- && *file->pos != '\n'
- && isspace(*file->pos))
- file->pos++;
- /* comment */
- if (*file->pos == '#') {
- do {
- file->pos++;
- } while (*file->pos != '\0' && *file->pos != '\n');
- }
- /* end of line? */
- if (*file->pos == '\n') {
- file->pos++;
- file->line_nr++;
- }
- else
- break;
- }
- if (*file->pos == '\0')
- return NULL;
-
- /* create this new entry */
- entry = (table_entry*)zalloc(sizeof(table_entry)
- + (file->nr_fields + 1) * sizeof(char*));
- ASSERT(entry != NULL);
- entry->file_name = file->file_name;
- entry->nr_fields = file->nr_fields;
-
- /* break the line into its colon delimitered fields */
- for (field = 0; field < file->nr_fields-1; field++) {
- entry->fields[field] = file->pos;
- while(*file->pos && *file->pos != ':' && *file->pos != '\n')
- file->pos++;
- if (*file->pos == ':') {
- *file->pos = '\0';
- file->pos++;
- }
- }
-
- /* any trailing stuff not the last field */
- ASSERT(field == file->nr_fields-1);
- entry->fields[field] = file->pos;
- while (*file->pos && *file->pos != '\n') {
- file->pos++;
- }
- if (*file->pos == '\n') {
- *file->pos = '\0';
- file->pos++;
- }
- file->line_nr++;
-
- /* if following lines begin with a star, add them to the model
- section. */
- while ((file->nr_model_fields > 0) && (*file->pos == '*')) {
- table_model_entry *model = (table_model_entry*)zalloc(sizeof(table_model_entry)
- + (file->nr_model_fields + 1) * sizeof(char*));
- if (entry->model_last)
- entry->model_last->next = model;
- else
- entry->model_first = model;
- entry->model_last = model;
-
- /* break the line into its colon delimitered fields */
- file->pos++;
- for (field = 0; field < file->nr_model_fields-1; field++) {
- model->fields[field] = file->pos;
- while(*file->pos && *file->pos != ':' && *file->pos != '\n')
- file->pos++;
- if (*file->pos == ':') {
- *file->pos = '\0';
- file->pos++;
- }
- }
-
- /* any trailing stuff not the last field */
- ASSERT(field == file->nr_model_fields-1);
- model->fields[field] = file->pos;
- while (*file->pos && *file->pos != '\n') {
- file->pos++;
- }
- if (*file->pos == '\n') {
- *file->pos = '\0';
- file->pos++;
- }
-
- file->line_nr++;
- model->line_nr = file->line_nr;
- }
-
- entry->line_nr = file->line_nr;
-
- /* if following lines are tab indented, put in the annex */
- if (*file->pos == '\t') {
- entry->annex = file->pos;
- do {
- do {
- file->pos++;
- } while (*file->pos != '\0' && *file->pos != '\n');
- if (*file->pos == '\n') {
- char *save_pos = ++file->pos;
- int extra_lines = 0;
- file->line_nr++;
- /* Allow tab indented to have blank lines */
- while (*save_pos == '\n') {
- save_pos++;
- extra_lines++;
- }
- if (*save_pos == '\t') {
- file->pos = save_pos;
- file->line_nr += extra_lines;
- }
- }
- } while (*file->pos != '\0' && *file->pos == '\t');
- if (file->pos[-1] == '\n')
- file->pos[-1] = '\0';
- }
- else
- entry->annex = NULL;
-
- /* return it */
- return entry;
-
-}
-
-
-extern void
-dump_table_entry(table_entry *entry,
- int indent)
-{
- printf("(table_entry*)%p\n", entry);
-
- if (entry != NULL) {
- int field;
- char sep;
-
- sep = ' ';
- dumpf(indent, "(fields");
- for (field = 0; field < entry->nr_fields; field++) {
- printf("%c%s", sep, entry->fields[field]);
- sep = ':';
- }
- printf(")\n");
-
- dumpf(indent, "(line_nr %d)\n", entry->line_nr);
-
- dumpf(indent, "(file_name %s)\n", entry->file_name);
-
- dumpf(indent, "(annex\n%s\n", entry->annex);
- dumpf(indent, " )\n");
-
- }
-}
-
-
-extern void
-table_entry_print_cpp_line_nr(lf *file,
- table_entry *entry)
-{
- lf_print__external_reference(file, entry->line_nr, entry->file_name);
-}
-
-
diff --git a/sim/ppc/table.h b/sim/ppc/table.h
deleted file mode 100644
index 509fb22870e..00000000000
--- a/sim/ppc/table.h
+++ /dev/null
@@ -1,60 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1995, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-/* load a table into memory */
-
-typedef struct _table table;
-
-typedef struct _table_model_entry table_model_entry;
-struct _table_model_entry {
- table_model_entry *next;
- int line_nr;
- int nr_fields;
- char *fields[0]; /* User defined */
-};
-
-typedef struct _table_entry table_entry;
-struct _table_entry {
- int line_nr;
- int nr_fields;
- char *file_name;
- table_model_entry *model_first;
- table_model_entry *model_last;
- char *annex;
- char *fields[0]; /* User defined */
-};
-
-
-extern table *table_open
-(const char *file_name,
- int max_nr_fields,
- int max_nr_model_fields);
-
-extern table_entry *table_entry_read
-(table *file);
-
-extern void dump_table_entry
-(table_entry *entry,
- int indent);
-
-extern void table_entry_print_cpp_line_nr
-(lf *file,
- table_entry *entry);
diff --git a/sim/ppc/tree.c b/sim/ppc/tree.c
deleted file mode 100644
index 360059353ce..00000000000
--- a/sim/ppc/tree.c
+++ /dev/null
@@ -1,1256 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1997, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-#ifndef _PARSE_C_
-#define _PARSE_C_
-
-#include <stdio.h>
-#include <stdarg.h>
-
-#include "basics.h"
-
-#include "device.h"
-#include "tree.h"
-
-
-#ifdef HAVE_STDLIB_H
-#include <stdlib.h>
-#endif
-
-#ifdef HAVE_STRING_H
-#include <string.h>
-#else
-#ifdef HAVE_STRINGS_H
-#include <strings.h>
-#endif
-#endif
-
-#include <ctype.h>
-
-
-/* manipulate/lookup device names */
-
-typedef struct _name_specifier {
- /* components in the full length name */
- char *path;
- char *property;
- char *value;
- /* current device */
- char *name;
- char *base;
- char *unit;
- char *args;
- /* previous device */
- char *last_name;
- char *last_base;
- char *last_unit;
- char *last_args;
- /* work area */
- char buf[1024];
-} name_specifier;
-
-
-
-/* Given a device specifier, break it up into its main components:
- path (and if present) property name and property value. */
-
-STATIC_INLINE_TREE\
-(int)
-split_device_specifier(device *current,
- const char *device_specifier,
- name_specifier *spec)
-{
- char *chp = NULL;
-
- /* expand any leading alias if present */
- if (current != NULL
- && *device_specifier != '\0'
- && *device_specifier != '.'
- && *device_specifier != '/') {
- device *aliases = tree_find_device(current, "/aliases");
- char alias[32];
- int len = 0;
- while (device_specifier[len] != '\0'
- && device_specifier[len] != '/'
- && device_specifier[len] != ':'
- && !isspace(device_specifier[len])) {
- alias[len] = device_specifier[len];
- len++;
- if (len >= sizeof(alias))
- error("split_device_specifier: buffer overflow");
- }
- alias[len] = '\0';
- if (aliases != NULL
- && device_find_property(aliases, alias)) {
- strcpy(spec->buf, device_find_string_property(aliases, alias));
- strcat(spec->buf, device_specifier + len);
- }
- else {
- strcpy(spec->buf, device_specifier);
- }
- }
- else {
- strcpy(spec->buf, device_specifier);
- }
-
- /* check no overflow */
- if (strlen(spec->buf) >= sizeof(spec->buf))
- error("split_device_specifier: buffer overflow\n");
-
- /* strip leading spaces */
- chp = spec->buf;
- while (*chp != '\0' && isspace(*chp))
- chp++;
- if (*chp == '\0')
- return 0;
-
- /* find the path and terminate it with null */
- spec->path = chp;
- while (*chp != '\0' && !isspace(*chp))
- chp++;
- if (*chp != '\0') {
- *chp = '\0';
- chp++;
- }
-
- /* and any value */
- while (*chp != '\0' && isspace(*chp))
- chp++;
- spec->value = chp;
-
- /* now go back and chop the property off of the path */
- if (spec->value[0] == '\0') {
- spec->property = NULL; /*not a property*/
- spec->value = NULL;
- }
- else if (spec->value[0] == '>'
- || spec->value[0] == '<') {
- /* an interrupt spec */
- spec->property = NULL;
- }
- else {
- chp = strrchr(spec->path, '/');
- if (chp == NULL) {
- spec->property = spec->path;
- spec->path = strchr(spec->property, '\0');
- }
- else {
- *chp = '\0';
- spec->property = chp+1;
- }
- }
-
- /* and mark the rest as invalid */
- spec->name = NULL;
- spec->base = NULL;
- spec->unit = NULL;
- spec->args = NULL;
- spec->last_name = NULL;
- spec->last_base = NULL;
- spec->last_unit = NULL;
- spec->last_args = NULL;
-
- return 1;
-}
-
-
-/* given a device specifier break it up into its main components -
- path and property name - assuming that the last `device' is a
- property name. */
-
-STATIC_INLINE_DEVICE\
-(int)
-split_property_specifier(device *current,
- const char *property_specifier,
- name_specifier *spec)
-{
- if (split_device_specifier(current, property_specifier, spec)) {
- if (spec->property == NULL) {
- /* force the last name to be a property name */
- char *chp = strrchr(spec->path, '/');
- if (chp == NULL) {
- spec->property = spec->path;
- spec->path = strrchr(spec->property, '\0');;
- }
- else {
- *chp = '\0';
- spec->property = chp+1;
- }
- }
- return 1;
- }
- else
- return 0;
-}
-
-
-/* device the next device name and split it up, return 0 when no more
- names to device */
-
-STATIC_INLINE_TREE\
-(int)
-split_device_name(name_specifier *spec)
-{
- char *chp;
- /* remember what came before */
- spec->last_name = spec->name;
- spec->last_base = spec->base;
- spec->last_unit = spec->unit;
- spec->last_args = spec->args;
- /* finished? */
- if (spec->path[0] == '\0') {
- spec->name = NULL;
- spec->base = NULL;
- spec->unit = NULL;
- spec->args = NULL;
- return 0;
- }
- /* break the current device spec from the path */
- spec->name = spec->path;
- chp = strchr(spec->name, '/');
- if (chp == NULL)
- spec->path = strchr(spec->name, '\0');
- else {
- spec->path = chp+1;
- *chp = '\0';
- }
- /* break out the base */
- if (spec->name[0] == '(') {
- chp = strchr(spec->name, ')');
- if (chp == NULL) {
- spec->base = spec->name;
- }
- else {
- *chp = '\0';
- spec->base = spec->name + 1;
- spec->name = chp + 1;
- }
- }
- else {
- spec->base = spec->name;
- }
- /* now break out the unit */
- chp = strchr(spec->name, '@');
- if (chp == NULL) {
- spec->unit = NULL;
- chp = spec->name;
- }
- else {
- *chp = '\0';
- chp += 1;
- spec->unit = chp;
- }
- /* finally any args */
- chp = strchr(chp, ':');
- if (chp == NULL)
- spec->args = NULL;
- else {
- *chp = '\0';
- spec->args = chp+1;
- }
- return 1;
-}
-
-
-/* device the value, returning the next non-space token */
-
-STATIC_INLINE_TREE\
-(char *)
-split_value(name_specifier *spec)
-{
- char *token;
- if (spec->value == NULL)
- return NULL;
- /* skip leading white space */
- while (isspace(spec->value[0]))
- spec->value++;
- if (spec->value[0] == '\0') {
- spec->value = NULL;
- return NULL;
- }
- token = spec->value;
- /* find trailing space */
- while (spec->value[0] != '\0' && !isspace(spec->value[0]))
- spec->value++;
- /* chop this value out */
- if (spec->value[0] != '\0') {
- spec->value[0] = '\0';
- spec->value++;
- }
- return token;
-}
-
-
-
-/* traverse the path specified by spec starting at current */
-
-STATIC_INLINE_TREE\
-(device *)
-split_find_device(device *current,
- name_specifier *spec)
-{
- /* strip off (and process) any leading ., .., ./ and / */
- while (1) {
- if (strncmp(spec->path, "/", strlen("/")) == 0) {
- /* cd /... */
- while (current != NULL && device_parent(current) != NULL)
- current = device_parent(current);
- spec->path += strlen("/");
- }
- else if (strncmp(spec->path, "./", strlen("./")) == 0) {
- /* cd ./... */
- current = current;
- spec->path += strlen("./");
- }
- else if (strncmp(spec->path, "../", strlen("../")) == 0) {
- /* cd ../... */
- if (current != NULL && device_parent(current) != NULL)
- current = device_parent(current);
- spec->path += strlen("../");
- }
- else if (strcmp(spec->path, ".") == 0) {
- /* cd . */
- current = current;
- spec->path += strlen(".");
- }
- else if (strcmp(spec->path, "..") == 0) {
- /* cd . */
- if (current != NULL && device_parent(current) != NULL)
- current = device_parent(current);
- spec->path += strlen("..");
- }
- else
- break;
- }
-
- /* now go through the path proper */
-
- if (current == NULL) {
- split_device_name(spec);
- return NULL;
- }
-
- while (split_device_name(spec)) {
- device *child;
- for (child = device_child(current);
- child != NULL; child = device_sibling(child)) {
- if (strcmp(spec->name, device_name(child)) == 0) {
- if (spec->unit == NULL)
- break;
- else {
- device_unit phys;
- device_decode_unit(current, spec->unit, &phys);
- if (memcmp(&phys, device_unit_address(child),
- sizeof(device_unit)) == 0)
- break;
- }
- }
- }
- if (child == NULL)
- return current; /* search failed */
- current = child;
- }
-
- return current;
-}
-
-
-STATIC_INLINE_TREE\
-(device *)
-split_fill_path(device *current,
- const char *device_specifier,
- name_specifier *spec)
-{
- /* break it up */
- if (!split_device_specifier(current, device_specifier, spec))
- device_error(current, "error parsing %s\n", device_specifier);
-
- /* fill our tree with its contents */
- current = split_find_device(current, spec);
-
- /* add any additional devices as needed */
- if (spec->name != NULL) {
- do {
- current = device_create(current, spec->base, spec->name,
- spec->unit, spec->args);
- } while (split_device_name(spec));
- }
-
- return current;
-}
-
-
-INLINE_TREE\
-(void)
-tree_init(device *root,
- psim *system)
-{
- TRACE(trace_device_tree, ("tree_init(root=0x%lx, system=0x%lx)\n",
- (long)root,
- (long)system));
- /* remove the old, rebuild the new */
- tree_traverse(root, device_clean, NULL, system);
- tree_traverse(root, device_init_static_properties, NULL, system);
- tree_traverse(root, device_init_address, NULL, system);
- tree_traverse(root, device_init_runtime_properties, NULL, system);
- tree_traverse(root, device_init_data, NULL, system);
-}
-
-
-
-/* <non-white-space> */
-
-STATIC_INLINE_TREE\
-(const char *)
-skip_token(const char *chp)
-{
- while (!isspace(*chp) && *chp != '\0')
- chp++;
- while (isspace(*chp) && *chp != '\0')
- chp++;
- return chp;
-}
-
-
-/* count the number of entries */
-
-STATIC_INLINE_TREE\
-(int)
-count_entries(device *current,
- const char *property_name,
- const char *property_value,
- int modulo)
-{
- const char *chp = property_value;
- int nr_entries = 0;
- while (*chp != '\0') {
- nr_entries += 1;
- chp = skip_token(chp);
- }
- if ((nr_entries % modulo) != 0) {
- device_error(current, "incorrect number of entries for %s property %s, should be multiple of %d",
- property_name, property_value, modulo);
- }
- return nr_entries / modulo;
-}
-
-
-
-/* parse: <address> ::= <token> ; device dependant */
-
-STATIC_INLINE_TREE\
-(const char *)
-parse_address(device *current,
- device *bus,
- const char *chp,
- device_unit *address)
-{
- if (device_decode_unit(bus, chp, address) < 0)
- device_error(current, "invalid unit address in %s", chp);
- return skip_token(chp);
-}
-
-
-/* parse: <size> ::= <number> { "," <number> } ; */
-
-STATIC_INLINE_TREE\
-(const char *)
-parse_size(device *current,
- device *bus,
- const char *chp,
- device_unit *size)
-{
- int i;
- int nr;
- const char *curr = chp;
- memset(size, 0, sizeof(*size));
- /* parse the numeric list */
- size->nr_cells = device_nr_size_cells(bus);
- nr = 0;
- while (1) {
- char *next;
- size->cells[nr] = strtoul(curr, &next, 0);
- if (curr == next)
- device_error(current, "Problem parsing <size> %s", chp);
- nr += 1;
- if (next[0] != ',')
- break;
- if (nr == size->nr_cells)
- device_error(current, "Too many values in <size> %s", chp);
- curr = next + 1;
- }
- ASSERT(nr > 0 && nr <= size->nr_cells);
- /* right align the numbers */
- for (i = 1; i <= size->nr_cells; i++) {
- if (i <= nr)
- size->cells[size->nr_cells - i] = size->cells[nr - i];
- else
- size->cells[size->nr_cells - i] = 0;
- }
- return skip_token(chp);
-}
-
-
-/* parse: <reg> ::= { <address> <size> } ; */
-
-STATIC_INLINE_TREE\
-(void)
-parse_reg_property(device *current,
- const char *property_name,
- const char *property_value)
-{
- int nr_regs;
- int reg_nr;
- reg_property_spec *regs;
- const char *chp;
-
- /* determine the number of reg entries by counting tokens */
- nr_regs = count_entries(current, property_name, property_value, 2);
-
- /* create working space */
- regs = zalloc(nr_regs * sizeof(*regs));
-
- /* fill it in */
- chp = property_value;
- for (reg_nr = 0; reg_nr < nr_regs; reg_nr++) {
- chp = parse_address(current, device_parent(current),
- chp, &regs[reg_nr].address);
- chp = parse_size(current, device_parent(current),
- chp, &regs[reg_nr].size);
- }
-
- /* create it */
- device_add_reg_array_property(current, property_name,
- regs, nr_regs);
-
- zfree(regs);
-}
-
-
-/* { <child-address> <parent-address> <child-size> }* */
-
-STATIC_INLINE_TREE\
-(void)
-parse_ranges_property(device *current,
- const char *property_name,
- const char *property_value)
-{
- int nr_ranges;
- int range_nr;
- range_property_spec *ranges;
- const char *chp;
-
- /* determine the number of ranges specified */
- nr_ranges = count_entries(current, property_name, property_value, 3);
-
- /* create a property of that size */
- ranges = zalloc(nr_ranges * sizeof(*ranges));
-
- /* fill it in */
- chp = property_value;
- for (range_nr = 0; range_nr < nr_ranges; range_nr++) {
- chp = parse_address(current, current,
- chp, &ranges[range_nr].child_address);
- chp = parse_address(current, device_parent(current),
- chp, &ranges[range_nr].parent_address);
- chp = parse_size(current, current,
- chp, &ranges[range_nr].size);
- }
-
- /* create it */
- device_add_range_array_property(current, property_name, ranges, nr_ranges);
-
- zfree(ranges);
-}
-
-
-/* <integer> ... */
-
-STATIC_INLINE_TREE\
-(void)
-parse_integer_property(device *current,
- const char *property_name,
- const char *property_value)
-{
- int nr_entries;
- unsigned_cell words[1024];
- /* integer or integer array? */
- nr_entries = 0;
- while (1) {
- char *end;
- words[nr_entries] = strtoul(property_value, &end, 0);
- if (property_value == end)
- break;
- nr_entries += 1;
- if (nr_entries * sizeof(words[0]) >= sizeof(words))
- device_error(current, "buffer overflow");
- property_value = end;
- }
- if (nr_entries == 0)
- device_error(current, "error parsing integer property %s (%s)",
- property_name, property_value);
- else if (nr_entries == 1)
- device_add_integer_property(current, property_name, words[0]);
- else {
- int i;
- for (i = 0; i < nr_entries; i++) {
- H2BE(words[i]);
- }
- /* perhaphs integer array property is better */
- device_add_array_property(current, property_name, words,
- sizeof(words[0]) * nr_entries);
- }
-}
-
-
-/* <string> ... */
-
-STATIC_INLINE_TREE\
-(void)
-parse_string_property(device *current,
- const char *property_name,
- const char *property_value)
-{
- char **strings;
- const char *chp;
- int nr_strings;
- int approx_nr_strings;
-
- /* get an estimate as to the number of strings by counting double
- quotes */
- approx_nr_strings = 2;
- for (chp = property_value; *chp; chp++) {
- if (*chp == '"')
- approx_nr_strings++;
- }
- approx_nr_strings = (approx_nr_strings) / 2;
-
- /* create a string buffer for that many (plus a null) */
- strings = (char**)zalloc((approx_nr_strings + 1) * sizeof(char*));
-
- /* now find all the strings */
- chp = property_value;
- nr_strings = 0;
- while (1) {
-
- /* skip leading space */
- while (*chp != '\0' && isspace(*chp))
- chp += 1;
- if (*chp == '\0')
- break;
-
- /* copy it in */
- if (*chp == '"') {
- /* a quoted string - watch for '\' et.al. */
- /* estimate the size and allocate space for it */
- int pos;
- chp++;
- pos = 0;
- while (chp[pos] != '\0' && chp[pos] != '"') {
- if (chp[pos] == '\\' && chp[pos+1] != '\0')
- pos += 2;
- else
- pos += 1;
- }
- strings[nr_strings] = zalloc(pos + 1);
- /* copy the string over */
- pos = 0;
- while (*chp != '\0' && *chp != '"') {
- if (*chp == '\\' && *(chp+1) != '\0') {
- strings[nr_strings][pos] = *(chp+1);
- chp += 2;
- pos++;
- }
- else {
- strings[nr_strings][pos] = *chp;
- chp += 1;
- pos++;
- }
- }
- if (*chp != '\0')
- chp++;
- strings[nr_strings][pos] = '\0';
- }
- else {
- /* copy over a single unquoted token */
- int len = 0;
- while (chp[len] != '\0' && !isspace(chp[len]))
- len++;
- strings[nr_strings] = zalloc(len + 1);
- strncpy(strings[nr_strings], chp, len);
- strings[nr_strings][len] = '\0';
- chp += len;
- }
- nr_strings++;
- if (nr_strings > approx_nr_strings)
- device_error(current, "String property %s badly formatted",
- property_name);
- }
- ASSERT(strings[nr_strings] == NULL); /* from zalloc */
-
- /* install it */
- if (nr_strings == 0)
- device_add_string_property(current, property_name, "");
- else if (nr_strings == 1)
- device_add_string_property(current, property_name, strings[0]);
- else {
- const char **specs = (const char**)strings; /* stop a bogus error */
- device_add_string_array_property(current, property_name,
- specs, nr_strings);
- }
-
- /* flush the created string */
- while (nr_strings > 0) {
- nr_strings--;
- zfree(strings[nr_strings]);
- }
- zfree(strings);
-}
-
-
-/* <path-to-ihandle-device> */
-
-STATIC_INLINE_TREE\
-(void)
-parse_ihandle_property(device *current,
- const char *property,
- const char *value)
-{
- ihandle_runtime_property_spec ihandle;
-
- /* pass the full path */
- ihandle.full_path = value;
-
- /* save this ready for the ihandle create */
- device_add_ihandle_runtime_property(current, property,
- &ihandle);
-}
-
-
-
-EXTERN_TREE\
-(device *)
-tree_parse(device *current,
- const char *fmt,
- ...)
-{
- char device_specifier[1024];
- name_specifier spec;
-
- /* format the path */
- {
- va_list ap;
- va_start(ap, fmt);
- vsprintf(device_specifier, fmt, ap);
- va_end(ap);
- if (strlen(device_specifier) >= sizeof(device_specifier))
- error("device_tree_add_deviced: buffer overflow\n");
- }
-
- /* construct the tree down to the final device */
- current = split_fill_path(current, device_specifier, &spec);
-
- /* is there an interrupt spec */
- if (spec.property == NULL
- && spec.value != NULL) {
- char *op = split_value(&spec);
- switch (op[0]) {
- case '>':
- {
- char *my_port_name = split_value(&spec);
- int my_port;
- char *dest_port_name = split_value(&spec);
- int dest_port;
- name_specifier dest_spec;
- char *dest_device_name = split_value(&spec);
- device *dest;
- /* find my name */
- my_port = device_interrupt_decode(current, my_port_name,
- output_port);
- /* find the dest device and port */
- dest = split_fill_path(current, dest_device_name, &dest_spec);
- dest_port = device_interrupt_decode(dest, dest_port_name,
- input_port);
- /* connect the two */
- device_interrupt_attach(current,
- my_port,
- dest,
- dest_port,
- permenant_object);
- }
- break;
- default:
- device_error(current, "unreconised interrupt spec %s\n", spec.value);
- break;
- }
- }
-
- /* is there a property */
- if (spec.property != NULL) {
- if (strcmp(spec.value, "true") == 0)
- device_add_boolean_property(current, spec.property, 1);
- else if (strcmp(spec.value, "false") == 0)
- device_add_boolean_property(current, spec.property, 0);
- else {
- const device_property *property;
- switch (spec.value[0]) {
- case '*':
- parse_ihandle_property(current, spec.property, spec.value + 1);
- break;
- case '[':
- {
- unsigned8 words[1024];
- char *curr = spec.value + 1;
- int nr_words = 0;
- while (1) {
- char *next;
- words[nr_words] = H2BE_1(strtoul(curr, &next, 0));
- if (curr == next)
- break;
- curr = next;
- nr_words += 1;
- }
- device_add_array_property(current, spec.property,
- words, sizeof(words[0]) * nr_words);
- }
- break;
- case '"':
- parse_string_property(current, spec.property, spec.value);
- break;
- case '!':
- spec.value++;
- property = tree_find_property(current, spec.value);
- if (property == NULL)
- device_error(current, "property %s not found\n", spec.value);
- device_add_duplicate_property(current,
- spec.property,
- property);
- break;
- default:
- if (strcmp(spec.property, "reg") == 0
- || strcmp(spec.property, "assigned-addresses") == 0
- || strcmp(spec.property, "alternate-reg") == 0){
- parse_reg_property(current, spec.property, spec.value);
- }
- else if (strcmp(spec.property, "ranges") == 0) {
- parse_ranges_property(current, spec.property, spec.value);
- }
- else if (isdigit(spec.value[0])
- || (spec.value[0] == '-' && isdigit(spec.value[1]))
- || (spec.value[0] == '+' && isdigit(spec.value[1]))) {
- parse_integer_property(current, spec.property, spec.value);
- }
- else
- parse_string_property(current, spec.property, spec.value);
- break;
- }
- }
- }
- return current;
-}
-
-
-INLINE_TREE\
-(void)
-tree_traverse(device *root,
- tree_traverse_function *prefix,
- tree_traverse_function *postfix,
- void *data)
-{
- device *child;
- if (prefix != NULL)
- prefix(root, data);
- for (child = device_child(root);
- child != NULL;
- child = device_sibling(child)) {
- tree_traverse(child, prefix, postfix, data);
- }
- if (postfix != NULL)
- postfix(root, data);
-}
-
-
-STATIC_INLINE_TREE\
-(void)
-print_address(device *bus,
- const device_unit *phys)
-{
- char unit[32];
- device_encode_unit(bus, phys, unit, sizeof(unit));
- printf_filtered(" %s", unit);
-}
-
-STATIC_INLINE_TREE\
-(void)
-print_size(device *bus,
- const device_unit *size)
-{
- int i;
- for (i = 0; i < size->nr_cells; i++)
- if (size->cells[i] != 0)
- break;
- if (i < size->nr_cells) {
- printf_filtered(" 0x%lx", (unsigned long)size->cells[i]);
- i++;
- for (; i < size->nr_cells; i++)
- printf_filtered(",0x%lx", (unsigned long)size->cells[i]);
- }
- else
- printf_filtered(" 0");
-}
-
-STATIC_INLINE_TREE\
-(void)
-print_reg_property(device *me,
- const device_property *property)
-{
- int reg_nr;
- reg_property_spec reg;
- for (reg_nr = 0;
- device_find_reg_array_property(me, property->name, reg_nr, &reg);
- reg_nr++) {
- print_address(device_parent(me), &reg.address);
- print_size(me, &reg.size);
- }
-}
-
-STATIC_INLINE_TREE\
-(void)
-print_ranges_property(device *me,
- const device_property *property)
-{
- int range_nr;
- range_property_spec range;
- for (range_nr = 0;
- device_find_range_array_property(me, property->name, range_nr, &range);
- range_nr++) {
- print_address(me, &range.child_address);
- print_address(device_parent(me), &range.parent_address);
- print_size(me, &range.size);
- }
-}
-
-STATIC_INLINE_TREE\
-(void)
-print_string(const char *string)
-{
- printf_filtered(" \"");
- while (*string != '\0') {
- switch (*string) {
- case '"':
- printf_filtered("\\\"");
- break;
- case '\\':
- printf_filtered("\\\\");
- break;
- default:
- printf_filtered("%c", *string);
- break;
- }
- string++;
- }
- printf_filtered("\"");
-}
-
-STATIC_INLINE_TREE\
-(void)
-print_string_array_property(device *me,
- const device_property *property)
-{
- int nr;
- string_property_spec string;
- for (nr = 0;
- device_find_string_array_property(me, property->name, nr, &string);
- nr++) {
- print_string(string);
- }
-}
-
-STATIC_INLINE_TREE\
-(void)
-print_properties(device *me)
-{
- const device_property *property;
- for (property = device_find_property(me, NULL);
- property != NULL;
- property = device_next_property(property)) {
- printf_filtered("%s/%s", device_path(me), property->name);
- if (property->original != NULL) {
- printf_filtered(" !");
- printf_filtered("%s/%s",
- device_path(property->original->owner),
- property->original->name);
- }
- else {
- switch (property->type) {
- case array_property:
- if ((property->sizeof_array % sizeof(signed_cell)) == 0) {
- unsigned_cell *w = (unsigned_cell*)property->array;
- int cell_nr;
- for (cell_nr = 0;
- cell_nr < (property->sizeof_array / sizeof(unsigned_cell));
- cell_nr++) {
- printf_filtered(" 0x%lx", (unsigned long)BE2H_cell(w[cell_nr]));
- }
- }
- else {
- unsigned8 *w = (unsigned8*)property->array;
- printf_filtered(" [");
- while ((char*)w - (char*)property->array < property->sizeof_array) {
- printf_filtered(" 0x%2x", BE2H_1(*w));
- w++;
- }
- }
- break;
- case boolean_property:
- {
- int b = device_find_boolean_property(me, property->name);
- printf_filtered(" %s", b ? "true" : "false");
- }
- break;
- case ihandle_property:
- {
- if (property->array != NULL) {
- device_instance *instance = device_find_ihandle_property(me, property->name);
- printf_filtered(" *%s", device_instance_path(instance));
- }
- else {
- /* not yet initialized, ask the device for the path */
- ihandle_runtime_property_spec spec;
- device_find_ihandle_runtime_property(me, property->name, &spec);
- printf_filtered(" *%s", spec.full_path);
- }
- }
- break;
- case integer_property:
- {
- unsigned_word w = device_find_integer_property(me, property->name);
- printf_filtered(" 0x%lx", (unsigned long)w);
- }
- break;
- case range_array_property:
- print_ranges_property(me, property);
- break;
- case reg_array_property:
- print_reg_property(me, property);
- break;
- case string_property:
- {
- const char *s = device_find_string_property(me, property->name);
- print_string(s);
- }
- break;
- case string_array_property:
- print_string_array_property(me, property);
- break;
- }
- }
- printf_filtered("\n");
- }
-}
-
-STATIC_INLINE_TREE\
-(void)
-print_interrupts(device *me,
- int my_port,
- device *dest,
- int dest_port,
- void *ignore_or_null)
-{
- char src[32];
- char dst[32];
- device_interrupt_encode(me, my_port, src, sizeof(src), output_port);
- device_interrupt_encode(dest, dest_port, dst, sizeof(dst), input_port);
- printf_filtered("%s > %s %s %s\n",
- device_path(me),
- src, dst,
- device_path(dest));
-}
-
-STATIC_INLINE_TREE\
-(void)
-print_device(device *me,
- void *ignore_or_null)
-{
- printf_filtered("%s\n", device_path(me));
- print_properties(me);
- device_interrupt_traverse(me, print_interrupts, NULL);
-}
-
-INLINE_TREE\
-(void)
-tree_print(device *root)
-{
- tree_traverse(root,
- print_device, NULL,
- NULL);
-}
-
-
-INLINE_TREE\
-(void)
-tree_usage(int verbose)
-{
- if (verbose == 1) {
- printf_filtered("\n");
- printf_filtered("A device/property specifier has the form:\n");
- printf_filtered("\n");
- printf_filtered(" /path/to/a/device [ property-value ]\n");
- printf_filtered("\n");
- printf_filtered("and a possible device is\n");
- printf_filtered("\n");
- }
- if (verbose > 1) {
- printf_filtered("\n");
- printf_filtered("A device/property specifier (<spec>) has the format:\n");
- printf_filtered("\n");
- printf_filtered(" <spec> ::= <path> [ <value> ] ;\n");
- printf_filtered(" <path> ::= { <prefix> } { <node> \"/\" } <node> ;\n");
- printf_filtered(" <prefix> ::= ( | \"/\" | \"../\" | \"./\" ) ;\n");
- printf_filtered(" <node> ::= <name> [ \"@\" <unit> ] [ \":\" <args> ] ;\n");
- printf_filtered(" <unit> ::= <number> { \",\" <number> } ;\n");
- printf_filtered("\n");
- printf_filtered("Where:\n");
- printf_filtered("\n");
- printf_filtered(" <name> is the name of a device (list below)\n");
- printf_filtered(" <unit> is the unit-address relative to the parent bus\n");
- printf_filtered(" <args> additional arguments used when creating the device\n");
- printf_filtered(" <value> ::= ( <number> # integer property\n");
- printf_filtered(" | \"[\" { <number> } # array property (byte)\n");
- printf_filtered(" | \"{\" { <number> } # array property (cell)\n");
- printf_filtered(" | [ \"true\" | \"false\" ] # boolean property\n");
- printf_filtered(" | \"*\" <path> # ihandle property\n");
- printf_filtered(" | \"!\" <path> # copy property\n");
- printf_filtered(" | \">\" [ <number> ] <path> # attach interrupt\n");
- printf_filtered(" | \"<\" <path> # attach child interrupt\n");
- printf_filtered(" | \"\\\"\" <text> # string property\n");
- printf_filtered(" | <text> # string property\n");
- printf_filtered(" ) ;\n");
- printf_filtered("\n");
- printf_filtered("And the following are valid device names:\n");
- printf_filtered("\n");
- }
-}
-
-
-
-INLINE_TREE\
-(device_instance *)
-tree_instance(device *root,
- const char *device_specifier)
-{
- /* find the device node */
- device *me;
- name_specifier spec;
- if (!split_device_specifier(root, device_specifier, &spec))
- return NULL;
- me = split_find_device(root, &spec);
- if (spec.name != NULL)
- return NULL;
- /* create the instance */
- return device_create_instance(me, device_specifier, spec.last_args);
-}
-
-
-INLINE_TREE\
-(device *)
-tree_find_device(device *root,
- const char *path_to_device)
-{
- device *node;
- name_specifier spec;
-
- /* parse the path */
- split_device_specifier(root, path_to_device, &spec);
- if (spec.value != NULL)
- return NULL; /* something wierd */
-
- /* now find it */
- node = split_find_device(root, &spec);
- if (spec.name != NULL)
- return NULL; /* not a leaf */
-
- return node;
-}
-
-
-INLINE_TREE\
-(const device_property *)
-tree_find_property(device *root,
- const char *path_to_property)
-{
- name_specifier spec;
- if (!split_property_specifier(root, path_to_property, &spec))
- device_error(root, "Invalid property path %s", path_to_property);
- root = split_find_device(root, &spec);
- return device_find_property(root, spec.property);
-}
-
-INLINE_TREE\
-(int)
-tree_find_boolean_property(device *root,
- const char *path_to_property)
-{
- name_specifier spec;
- if (!split_property_specifier(root, path_to_property, &spec))
- device_error(root, "Invalid property path %s", path_to_property);
- root = split_find_device(root, &spec);
- return device_find_boolean_property(root, spec.property);
-}
-
-INLINE_TREE\
-(signed_cell)
-tree_find_integer_property(device *root,
- const char *path_to_property)
-{
- name_specifier spec;
- if (!split_property_specifier(root, path_to_property, &spec))
- device_error(root, "Invalid property path %s", path_to_property);
- root = split_find_device(root, &spec);
- return device_find_integer_property(root, spec.property);
-}
-
-INLINE_TREE\
-(device_instance *)
-tree_find_ihandle_property(device *root,
- const char *path_to_property)
-{
- name_specifier spec;
- if (!split_property_specifier(root, path_to_property, &spec))
- device_error(root, "Invalid property path %s", path_to_property);
- root = split_find_device(root, &spec);
- return device_find_ihandle_property(root, spec.property);
-}
-
-INLINE_TREE\
-(const char *)
-tree_find_string_property(device *root,
- const char *path_to_property)
-{
- name_specifier spec;
- if (!split_property_specifier(root, path_to_property, &spec))
- device_error(root, "Invalid property path %s", path_to_property);
- root = split_find_device(root, &spec);
- return device_find_string_property(root, spec.property);
-}
-
-
-#endif /* _PARSE_C_ */
diff --git a/sim/ppc/tree.h b/sim/ppc/tree.h
deleted file mode 100644
index 46590cb6266..00000000000
--- a/sim/ppc/tree.h
+++ /dev/null
@@ -1,139 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1996, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-#ifndef _TREE_H_
-#define _TREE_H_
-
-#ifndef INLINE_TREE
-#define INLINE_TREE
-#endif
-
-/* Constructing the device tree:
-
- The initial device tree populated with devices and basic properties
- is created using the function <<device_tree_add_parsed()>>. This
- function parses a PSIM device specification and uses it to populate
- the tree accordingly.
-
- This function accepts a printf style formatted string as the
- argument that describes the entry. Any properties or interrupt
- connections added to a device tree using this function are marked
- as having a permenant disposition. When the tree is (re)
- initialized they will be restored to their initial value.
-
- */
-
-EXTERN_TREE\
-(device *) tree_parse
-(device *root,
- const char *fmt,
- ...) __attribute__ ((format (printf, 2, 3)));
-
-
-INLINE_TREE\
-(void) tree_usage
-(int verbose);
-
-INLINE_TREE\
-(void) tree_print
-(device *root);
-
-INLINE_TREE\
-(device_instance*) tree_instance
-(device *root,
- const char *device_specifier);
-
-
-/* Tree traversal::
-
- The entire device tree can be traversed using the
- <<device_tree_traverse()>> function. The traversal can be in
- either pre- or postfix order.
-
- */
-
-typedef void (tree_traverse_function)
- (device *device,
- void *data);
-
-INLINE_DEVICE\
-(void) tree_traverse
-(device *root,
- tree_traverse_function *prefix,
- tree_traverse_function *postfix,
- void *data);
-
-
-/* Tree lookup::
-
- The function <<tree_find_device()>> will attempt to locate
- the specified device within the tree. If the device is not found a
- NULL device is returned.
-
- */
-
-INLINE_TREE\
-(device *) tree_find_device
-(device *root,
- const char *path);
-
-
-INLINE_TREE\
-(const device_property *) tree_find_property
-(device *root,
- const char *path_to_property);
-
-INLINE_TREE\
-(int) tree_find_boolean_property
-(device *root,
- const char *path_to_property);
-
-INLINE_TREE\
-(signed_cell) tree_find_integer_property
-(device *root,
- const char *path_to_property);
-
-INLINE_TREE\
-(device_instance *) tree_find_ihandle_property
-(device *root,
- const char *path_to_property);
-
-INLINE_TREE\
-(const char *) tree_find_string_property
-(device *root,
- const char *path_to_property);
-
-
-/* Initializing the created tree:
-
- Once a device tree has been created the <<device_tree_init()>>
- function is used to initialize it. The exact sequence of events
- that occure during initialization are described separatly.
-
- */
-
-INLINE_TREE\
-(void) tree_init
-(device *root,
- psim *system);
-
-
-#endif /* _TREE_H_ */
diff --git a/sim/ppc/vm.c b/sim/ppc/vm.c
deleted file mode 100644
index bff962cc31e..00000000000
--- a/sim/ppc/vm.c
+++ /dev/null
@@ -1,1198 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1997, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-#ifndef _VM_C_
-#define _VM_C_
-
-#if 0
-#include "basics.h"
-#include "registers.h"
-#include "device.h"
-#include "corefile.h"
-#include "vm.h"
-#include "interrupts.h"
-#include "mon.h"
-#endif
-
-#include "cpu.h"
-
-/* OEA vs VEA
-
- For the VEA model, the VM layer is almost transparent. It's only
- purpose is to maintain separate core_map's for the instruction
- and data address spaces. This being so that writes to instruction
- space or execution of a data space is prevented.
-
- For the OEA model things are more complex. The reason for separate
- instruction and data models becomes crucial. The OEA model is
- built out of three parts. An instruction map, a data map and an
- underlying structure that provides access to the VM data kept in
- main memory. */
-
-
-/* OEA data structures:
-
- The OEA model maintains internal data structures that shadow the
- semantics of the various OEA VM registers (BAT, SR, etc). This
- allows a simple efficient model of the VM to be implemented.
-
- Consistency between OEA registers and this model's internal data
- structures is maintained by updating the structures at
- `synchronization' points. Of particular note is that (at the time
- of writing) the memory data types for BAT registers are rebuilt
- when ever the processor moves between problem and system states.
-
- Unpacked values are stored in the OEA so that they correctly align
- to where they will be needed by the PTE address. */
-
-
-/* Protection table:
-
- Matrix of processor state, type of access and validity */
-
-typedef enum {
- om_supervisor_state,
- om_problem_state,
- nr_om_modes
-} om_processor_modes;
-
-typedef enum {
- om_data_read, om_data_write,
- om_instruction_read, om_access_any,
- nr_om_access_types
-} om_access_types;
-
-static int om_valid_access[2][4][nr_om_access_types] = {
- /* read, write, instruction, any */
- /* K bit == 0 */
- { /*r w i a pp */
- { 1, 1, 1, 1 }, /* 00 */
- { 1, 1, 1, 1 }, /* 01 */
- { 1, 1, 1, 1 }, /* 10 */
- { 1, 0, 1, 1 }, /* 11 */
- },
- /* K bit == 1 or P bit valid */
- { /*r w i a pp */
- { 0, 0, 0, 0 }, /* 00 */
- { 1, 0, 1, 1 }, /* 01 */
- { 1, 1, 1, 1 }, /* 10 */
- { 1, 0, 1, 1 }, /* 11 */
- }
-};
-
-
-/* Bat translation:
-
- The bat data structure only contains information on valid BAT
- translations for the current processor mode and type of access. */
-
-typedef struct _om_bat {
- unsigned_word block_effective_page_index;
- unsigned_word block_effective_page_index_mask;
- unsigned_word block_length_mask;
- unsigned_word block_real_page_number;
- int protection_bits;
-} om_bat;
-
-enum _nr_om_bat_registers {
- nr_om_bat_registers = 4
-};
-
-typedef struct _om_bats {
- int nr_valid_bat_registers;
- om_bat bat[nr_om_bat_registers];
-} om_bats;
-
-
-/* Segment TLB:
-
- In this model the 32 and 64 bit segment tables are treated in very
- similar ways. The 32bit segment registers are treated as a
- simplification of the 64bit segment tlb */
-
-enum _om_segment_tlb_constants {
-#if (WITH_TARGET_WORD_BITSIZE == 64)
- sizeof_segment_table_entry_group = 128,
- sizeof_segment_table_entry = 16,
-#endif
- om_segment_tlb_index_start_bit = 32,
- om_segment_tlb_index_stop_bit = 35,
- nr_om_segment_tlb_entries = 16,
- nr_om_segment_tlb_constants
-};
-
-typedef struct _om_segment_tlb_entry {
- int key[nr_om_modes];
- om_access_types invalid_access; /* set to instruction if no_execute bit */
- unsigned_word masked_virtual_segment_id; /* aligned ready for pte group addr */
-#if (WITH_TARGET_WORD_BITSIZE == 64)
- int is_valid;
- unsigned_word masked_effective_segment_id;
-#endif
-} om_segment_tlb_entry;
-
-typedef struct _om_segment_tlb {
- om_segment_tlb_entry entry[nr_om_segment_tlb_entries];
-} om_segment_tlb;
-
-
-/* Page TLB:
-
- This OEA model includes a small direct map Page TLB. The tlb is to
- cut down on the need for the OEA to perform walks of the page hash
- table. */
-
-enum _om_page_tlb_constants {
- om_page_tlb_index_start_bit = 46,
- om_page_tlb_index_stop_bit = 51,
- nr_om_page_tlb_entries = 64,
-#if (WITH_TARGET_WORD_BITSIZE == 64)
- sizeof_pte_group = 128,
- sizeof_pte = 16,
-#endif
-#if (WITH_TARGET_WORD_BITSIZE == 32)
- sizeof_pte_group = 64,
- sizeof_pte = 8,
-#endif
- nr_om_page_tlb_constants
-};
-
-typedef struct _om_page_tlb_entry {
- int protection;
- int changed;
- unsigned_word real_address_of_pte_1;
- unsigned_word masked_virtual_segment_id;
- unsigned_word masked_page;
- unsigned_word masked_real_page_number;
-} om_page_tlb_entry;
-
-typedef struct _om_page_tlb {
- om_page_tlb_entry entry[nr_om_page_tlb_entries];
-} om_page_tlb;
-
-
-/* memory translation:
-
- OEA memory translation possibly involves BAT, SR, TLB and HTAB
- information*/
-
-typedef struct _om_map {
-
- /* local cache of register values */
- int is_relocate;
- int is_problem_state;
-
- /* block address translation */
- om_bats *bat_registers;
-
- /* failing that, translate ea to va using segment tlb */
-#if (WITH_TARGET_WORD_BITSIZE == 64)
- unsigned_word real_address_of_segment_table;
-#endif
- om_segment_tlb *segment_tlb;
-
- /* then va to ra using hashed page table and tlb */
- unsigned_word real_address_of_page_table;
- unsigned_word page_table_hash_mask;
- om_page_tlb *page_tlb;
-
- /* physical memory for fetching page table entries */
- core_map *physical;
-
- /* address xor for PPC endian */
- unsigned xor[WITH_XOR_ENDIAN];
-
-} om_map;
-
-
-/* VM objects:
-
- External objects defined by vm.h */
-
-struct _vm_instruction_map {
- /* real memory for last part */
- core_map *code;
- /* translate effective to real */
- om_map translation;
-};
-
-struct _vm_data_map {
- /* translate effective to real */
- om_map translation;
- /* real memory for translated address */
- core_map *read;
- core_map *write;
-};
-
-
-/* VM:
-
- Underlying memory object. For the VEA this is just the
- core_map. For OEA it is the instruction and data memory
- translation's */
-
-struct _vm {
-
- /* OEA: base address registers */
- om_bats ibats;
- om_bats dbats;
-
- /* OEA: segment registers */
- om_segment_tlb segment_tlb;
-
- /* OEA: translation lookaside buffers */
- om_page_tlb instruction_tlb;
- om_page_tlb data_tlb;
-
- /* real memory */
- core *physical;
-
- /* memory maps */
- vm_instruction_map instruction_map;
- vm_data_map data_map;
-
-};
-
-
-/* OEA Support procedures */
-
-
-STATIC_INLINE_VM\
-(unsigned_word)
-om_segment_tlb_index(unsigned_word ea)
-{
- unsigned_word index = EXTRACTED(ea,
- om_segment_tlb_index_start_bit,
- om_segment_tlb_index_stop_bit);
- return index;
-}
-
-STATIC_INLINE_VM\
-(unsigned_word)
-om_page_tlb_index(unsigned_word ea)
-{
- unsigned_word index = EXTRACTED(ea,
- om_page_tlb_index_start_bit,
- om_page_tlb_index_stop_bit);
- return index;
-}
-
-STATIC_INLINE_VM\
-(unsigned_word)
-om_hash_page(unsigned_word masked_vsid,
- unsigned_word ea)
-{
- unsigned_word extracted_ea = EXTRACTED(ea, 36, 51);
-#if (WITH_TARGET_WORD_BITSIZE == 32)
- unsigned_word masked_ea = INSERTED32(extracted_ea, 7, 31-6);
- unsigned_word hash = masked_vsid ^ masked_ea;
-#endif
-#if (WITH_TARGET_WORD_BITSIZE == 64)
- unsigned_word masked_ea = INSERTED64(extracted_ea, 18, 63-7);
- unsigned_word hash = masked_vsid ^ masked_ea;
-#endif
- TRACE(trace_vm, ("ea=0x%lx - masked-vsid=0x%lx masked-ea=0x%lx hash=0x%lx\n",
- (unsigned long)ea,
- (unsigned long)masked_vsid,
- (unsigned long)masked_ea,
- (unsigned long)hash));
- return hash;
-}
-
-STATIC_INLINE_VM\
-(unsigned_word)
-om_pte_0_api(unsigned_word pte_0)
-{
-#if (WITH_TARGET_WORD_BITSIZE == 32)
- return EXTRACTED32(pte_0, 26, 31);
-#endif
-#if (WITH_TARGET_WORD_BITSIZE == 64)
- return EXTRACTED64(pte_0, 52, 56);
-#endif
-}
-
-STATIC_INLINE_VM\
-(unsigned_word)
-om_pte_0_hash(unsigned_word pte_0)
-{
-#if (WITH_TARGET_WORD_BITSIZE == 32)
- return EXTRACTED32(pte_0, 25, 25);
-#endif
-#if (WITH_TARGET_WORD_BITSIZE == 64)
- return EXTRACTED64(pte_0, 62, 62);
-#endif
-}
-
-STATIC_INLINE_VM\
-(int)
-om_pte_0_valid(unsigned_word pte_0)
-{
-#if (WITH_TARGET_WORD_BITSIZE == 32)
- return MASKED32(pte_0, 0, 0) != 0;
-#endif
-#if (WITH_TARGET_WORD_BITSIZE == 64)
- return MASKED64(pte_0, 63, 63) != 0;
-#endif
-}
-
-STATIC_INLINE_VM\
-(unsigned_word)
-om_ea_masked_page(unsigned_word ea)
-{
- return MASKED(ea, 36, 51);
-}
-
-STATIC_INLINE_VM\
-(unsigned_word)
-om_ea_masked_byte(unsigned_word ea)
-{
- return MASKED(ea, 52, 63);
-}
-
-/* return the VSID aligned for pte group addr */
-STATIC_INLINE_VM\
-(unsigned_word)
-om_pte_0_masked_vsid(unsigned_word pte_0)
-{
-#if (WITH_TARGET_WORD_BITSIZE == 32)
- return INSERTED32(EXTRACTED32(pte_0, 1, 24), 31-6-24+1, 31-6);
-#endif
-#if (WITH_TARGET_WORD_BITSIZE == 64)
- return INSERTED64(EXTRACTED64(pte_0, 0, 51), 63-7-52+1, 63-7);
-#endif
-}
-
-STATIC_INLINE_VM\
-(unsigned_word)
-om_pte_1_pp(unsigned_word pte_1)
-{
- return MASKED(pte_1, 62, 63); /*PP*/
-}
-
-STATIC_INLINE_VM\
-(int)
-om_pte_1_referenced(unsigned_word pte_1)
-{
- return EXTRACTED(pte_1, 55, 55);
-}
-
-STATIC_INLINE_VM\
-(int)
-om_pte_1_changed(unsigned_word pte_1)
-{
- return EXTRACTED(pte_1, 56, 56);
-}
-
-STATIC_INLINE_VM\
-(int)
-om_pte_1_masked_rpn(unsigned_word pte_1)
-{
- return MASKED(pte_1, 0, 51); /*RPN*/
-}
-
-STATIC_INLINE_VM\
-(unsigned_word)
-om_ea_api(unsigned_word ea)
-{
- return EXTRACTED(ea, 36, 41);
-}
-
-
-/* Page and Segment table read/write operators, these need to still
- account for the PPC's XOR operation */
-
-STATIC_INLINE_VM\
-(unsigned_word)
-om_read_word(om_map *map,
- unsigned_word ra,
- cpu *processor,
- unsigned_word cia)
-{
- if (WITH_XOR_ENDIAN)
- ra ^= map->xor[sizeof(instruction_word) - 1];
- return core_map_read_word(map->physical, ra, processor, cia);
-}
-
-STATIC_INLINE_VM\
-(void)
-om_write_word(om_map *map,
- unsigned_word ra,
- unsigned_word val,
- cpu *processor,
- unsigned_word cia)
-{
- if (WITH_XOR_ENDIAN)
- ra ^= map->xor[sizeof(instruction_word) - 1];
- core_map_write_word(map->physical, ra, val, processor, cia);
-}
-
-
-/* Bring things into existance */
-
-INLINE_VM\
-(vm *)
-vm_create(core *physical)
-{
- vm *virtual;
-
- /* internal checks */
- if (nr_om_segment_tlb_entries
- != (1 << (om_segment_tlb_index_stop_bit
- - om_segment_tlb_index_start_bit + 1)))
- error("internal error - vm_create - problem with om_segment constants\n");
- if (nr_om_page_tlb_entries
- != (1 << (om_page_tlb_index_stop_bit
- - om_page_tlb_index_start_bit + 1)))
- error("internal error - vm_create - problem with om_page constants\n");
-
- /* create the new vm register file */
- virtual = ZALLOC(vm);
-
- /* set up core */
- virtual->physical = physical;
-
- /* set up the address decoders */
- virtual->instruction_map.translation.bat_registers = &virtual->ibats;
- virtual->instruction_map.translation.segment_tlb = &virtual->segment_tlb;
- virtual->instruction_map.translation.page_tlb = &virtual->instruction_tlb;
- virtual->instruction_map.translation.is_relocate = 0;
- virtual->instruction_map.translation.is_problem_state = 0;
- virtual->instruction_map.translation.physical = core_readable(physical);
- virtual->instruction_map.code = core_readable(physical);
-
- virtual->data_map.translation.bat_registers = &virtual->dbats;
- virtual->data_map.translation.segment_tlb = &virtual->segment_tlb;
- virtual->data_map.translation.page_tlb = &virtual->data_tlb;
- virtual->data_map.translation.is_relocate = 0;
- virtual->data_map.translation.is_problem_state = 0;
- virtual->data_map.translation.physical = core_readable(physical);
- virtual->data_map.read = core_readable(physical);
- virtual->data_map.write = core_writeable(physical);
-
- return virtual;
-}
-
-
-STATIC_INLINE_VM\
-(om_bat *)
-om_effective_to_bat(om_map *map,
- unsigned_word ea)
-{
- int curr_bat = 0;
- om_bats *bats = map->bat_registers;
- int nr_bats = bats->nr_valid_bat_registers;
-
- for (curr_bat = 0; curr_bat < nr_bats; curr_bat++) {
- om_bat *bat = bats->bat + curr_bat;
- if ((ea & bat->block_effective_page_index_mask)
- != bat->block_effective_page_index)
- continue;
- return bat;
- }
-
- return NULL;
-}
-
-
-STATIC_INLINE_VM\
-(om_segment_tlb_entry *)
-om_effective_to_virtual(om_map *map,
- unsigned_word ea,
- cpu *processor,
- unsigned_word cia)
-{
- /* first try the segment tlb */
- om_segment_tlb_entry *segment_tlb_entry = (map->segment_tlb->entry
- + om_segment_tlb_index(ea));
-
-#if (WITH_TARGET_WORD_BITSIZE == 32)
- TRACE(trace_vm, ("ea=0x%lx - sr[%ld] - masked-vsid=0x%lx va=0x%lx%07lx\n",
- (unsigned long)ea,
- (long)om_segment_tlb_index(ea),
- (unsigned long)segment_tlb_entry->masked_virtual_segment_id,
- (unsigned long)EXTRACTED32(segment_tlb_entry->masked_virtual_segment_id, 31-6-24+1, 31-6),
- (unsigned long)EXTRACTED32(ea, 4, 31)));
- return segment_tlb_entry;
-#endif
-
-#if (WITH_TARGET_WORD_BITSIZE == 64)
- if (segment_tlb_entry->is_valid
- && (segment_tlb_entry->masked_effective_segment_id == MASKED(ea, 0, 35))) {
- error("fixme - is there a need to update any bits\n");
- return segment_tlb_entry;
- }
-
- /* drats, segment tlb missed */
- {
- unsigned_word segment_id_hash = ea;
- int current_hash = 0;
- for (current_hash = 0; current_hash < 2; current_hash += 1) {
- unsigned_word segment_table_entry_group =
- (map->real_address_of_segment_table
- | (MASKED64(segment_id_hash, 31, 35) >> (56-35)));
- unsigned_word segment_table_entry;
- for (segment_table_entry = segment_table_entry_group;
- segment_table_entry < (segment_table_entry_group
- + sizeof_segment_table_entry_group);
- segment_table_entry += sizeof_segment_table_entry) {
- /* byte order? */
- unsigned_word segment_table_entry_dword_0 =
- om_read_word(map->physical, segment_table_entry, processor, cia);
- unsigned_word segment_table_entry_dword_1 =
- om_read_word(map->physical, segment_table_entry + 8,
- processor, cia);
- int is_valid = MASKED64(segment_table_entry_dword_0, 56, 56) != 0;
- unsigned_word masked_effective_segment_id =
- MASKED64(segment_table_entry_dword_0, 0, 35);
- if (is_valid && masked_effective_segment_id == MASKED64(ea, 0, 35)) {
- /* don't permit some things */
- if (MASKED64(segment_table_entry_dword_0, 57, 57))
- error("om_effective_to_virtual() - T=1 in STE not supported\n");
- /* update segment tlb */
- segment_tlb_entry->is_valid = is_valid;
- segment_tlb_entry->masked_effective_segment_id =
- masked_effective_segment_id;
- segment_tlb_entry->key[om_supervisor_state] =
- EXTRACTED64(segment_table_entry_dword_0, 58, 58);
- segment_tlb_entry->key[om_problem_state] =
- EXTRACTED64(segment_table_entry_dword_0, 59, 59);
- segment_tlb_entry->invalid_access =
- (MASKED64(segment_table_entry_dword_0, 60, 60)
- ? om_instruction_read
- : om_access_any);
- segment_tlb_entry->masked_virtual_segment_id =
- INSERTED64(EXTRACTED64(segment_table_entry_dword_1, 0, 51),
- 18-13, 63-7); /* aligned ready for pte group addr */
- return segment_tlb_entry;
- }
- }
- segment_id_hash = ~segment_id_hash;
- }
- }
- return NULL;
-#endif
-}
-
-
-
-STATIC_INLINE_VM\
-(om_page_tlb_entry *)
-om_virtual_to_real(om_map *map,
- unsigned_word ea,
- om_segment_tlb_entry *segment_tlb_entry,
- om_access_types access,
- cpu *processor,
- unsigned_word cia)
-{
- om_page_tlb_entry *page_tlb_entry = (map->page_tlb->entry
- + om_page_tlb_index(ea));
-
- /* is it a tlb hit? */
- if ((page_tlb_entry->masked_virtual_segment_id
- == segment_tlb_entry->masked_virtual_segment_id)
- && (page_tlb_entry->masked_page
- == om_ea_masked_page(ea))) {
- TRACE(trace_vm, ("ea=0x%lx - tlb hit - tlb=0x%lx\n",
- (long)ea, (long)page_tlb_entry));
- return page_tlb_entry;
- }
-
- /* drats, it is a tlb miss */
- {
- unsigned_word page_hash =
- om_hash_page(segment_tlb_entry->masked_virtual_segment_id, ea);
- int current_hash;
- for (current_hash = 0; current_hash < 2; current_hash += 1) {
- unsigned_word real_address_of_pte_group =
- (map->real_address_of_page_table
- | (page_hash & map->page_table_hash_mask));
- unsigned_word real_address_of_pte_0;
- TRACE(trace_vm,
- ("ea=0x%lx - htab search %d - htab=0x%lx hash=0x%lx mask=0x%lx pteg=0x%lx\n",
- (long)ea, current_hash,
- map->real_address_of_page_table,
- page_hash,
- map->page_table_hash_mask,
- (long)real_address_of_pte_group));
- for (real_address_of_pte_0 = real_address_of_pte_group;
- real_address_of_pte_0 < (real_address_of_pte_group
- + sizeof_pte_group);
- real_address_of_pte_0 += sizeof_pte) {
- unsigned_word pte_0 = om_read_word(map,
- real_address_of_pte_0,
- processor, cia);
- /* did we hit? */
- if (om_pte_0_valid(pte_0)
- && (current_hash == om_pte_0_hash(pte_0))
- && (segment_tlb_entry->masked_virtual_segment_id
- == om_pte_0_masked_vsid(pte_0))
- && (om_ea_api(ea) == om_pte_0_api(pte_0))) {
- unsigned_word real_address_of_pte_1 = (real_address_of_pte_0
- + sizeof_pte / 2);
- unsigned_word pte_1 = om_read_word(map,
- real_address_of_pte_1,
- processor, cia);
- page_tlb_entry->protection = om_pte_1_pp(pte_1);
- page_tlb_entry->changed = om_pte_1_changed(pte_1);
- page_tlb_entry->masked_virtual_segment_id = segment_tlb_entry->masked_virtual_segment_id;
- page_tlb_entry->masked_page = om_ea_masked_page(ea);
- page_tlb_entry->masked_real_page_number = om_pte_1_masked_rpn(pte_1);
- page_tlb_entry->real_address_of_pte_1 = real_address_of_pte_1;
- if (!om_pte_1_referenced(pte_1)) {
- om_write_word(map,
- real_address_of_pte_1,
- pte_1 | BIT(55),
- processor, cia);
- TRACE(trace_vm,
- ("ea=0x%lx - htab hit - set ref - tlb=0x%lx &pte1=0x%lx\n",
- (long)ea, (long)page_tlb_entry, (long)real_address_of_pte_1));
- }
- else {
- TRACE(trace_vm,
- ("ea=0x%lx - htab hit - tlb=0x%lx &pte1=0x%lx\n",
- (long)ea, (long)page_tlb_entry, (long)real_address_of_pte_1));
- }
- return page_tlb_entry;
- }
- }
- page_hash = ~page_hash; /*???*/
- }
- }
- return NULL;
-}
-
-
-STATIC_INLINE_VM\
-(void)
-om_interrupt(cpu *processor,
- unsigned_word cia,
- unsigned_word ea,
- om_access_types access,
- storage_interrupt_reasons reason)
-{
- switch (access) {
- case om_data_read:
- data_storage_interrupt(processor, cia, ea, reason, 0/*!is_store*/);
- break;
- case om_data_write:
- data_storage_interrupt(processor, cia, ea, reason, 1/*is_store*/);
- break;
- case om_instruction_read:
- instruction_storage_interrupt(processor, cia, reason);
- break;
- default:
- error("internal error - om_interrupt - unexpected access type %d", access);
- }
-}
-
-
-STATIC_INLINE_VM\
-(unsigned_word)
-om_translate_effective_to_real(om_map *map,
- unsigned_word ea,
- om_access_types access,
- cpu *processor,
- unsigned_word cia,
- int abort)
-{
- om_bat *bat = NULL;
- om_segment_tlb_entry *segment_tlb_entry = NULL;
- om_page_tlb_entry *page_tlb_entry = NULL;
- unsigned_word ra;
-
- if (!map->is_relocate) {
- ra = ea;
- TRACE(trace_vm, ("ea=0x%lx - direct map - ra=0x%lx\n",
- (long)ea, (long)ra));
- return ra;
- }
-
- /* match with BAT? */
- bat = om_effective_to_bat(map, ea);
- if (bat != NULL) {
- if (!om_valid_access[1][bat->protection_bits][access]) {
- TRACE(trace_vm, ("ea=0x%lx - bat access violation\n", (long)ea));
- if (abort)
- om_interrupt(processor, cia, ea, access,
- protection_violation_storage_interrupt);
- else
- return MASK(0, 63);
- }
-
- ra = ((ea & bat->block_length_mask) | bat->block_real_page_number);
- TRACE(trace_vm, ("ea=0x%lx - bat translation - ra=0x%lx\n",
- (long)ea, (long)ra));
- return ra;
- }
-
- /* translate ea to va using segment map */
- segment_tlb_entry = om_effective_to_virtual(map, ea, processor, cia);
-#if (WITH_TARGET_WORD_BITSIZE == 64)
- if (segment_tlb_entry == NULL) {
- TRACE(trace_vm, ("ea=0x%lx - segment tlb miss\n", (long)ea));
- if (abort)
- om_interrupt(processor, cia, ea, access,
- segment_table_miss_storage_interrupt);
- else
- return MASK(0, 63);
- }
-#endif
- /* check for invalid segment access type */
- if (segment_tlb_entry->invalid_access == access) {
- TRACE(trace_vm, ("ea=0x%lx - segment access invalid\n", (long)ea));
- if (abort)
- om_interrupt(processor, cia, ea, access,
- protection_violation_storage_interrupt);
- else
- return MASK(0, 63);
- }
-
- /* lookup in PTE */
- page_tlb_entry = om_virtual_to_real(map, ea, segment_tlb_entry,
- access,
- processor, cia);
- if (page_tlb_entry == NULL) {
- TRACE(trace_vm, ("ea=0x%lx - page tlb miss\n", (long)ea));
- if (abort)
- om_interrupt(processor, cia, ea, access,
- hash_table_miss_storage_interrupt);
- else
- return MASK(0, 63);
- }
- if (!(om_valid_access
- [segment_tlb_entry->key[map->is_problem_state]]
- [page_tlb_entry->protection]
- [access])) {
- TRACE(trace_vm, ("ea=0x%lx - page tlb access violation\n", (long)ea));
- if (abort)
- om_interrupt(processor, cia, ea, access,
- protection_violation_storage_interrupt);
- else
- return MASK(0, 63);
- }
-
- /* update change bit as needed */
- if (access == om_data_write &&!page_tlb_entry->changed) {
- unsigned_word pte_1 = om_read_word(map,
- page_tlb_entry->real_address_of_pte_1,
- processor, cia);
- om_write_word(map,
- page_tlb_entry->real_address_of_pte_1,
- pte_1 | BIT(56),
- processor, cia);
- TRACE(trace_vm, ("ea=0x%lx - set change bit - tlb=0x%lx &pte1=0x%lx\n",
- (long)ea, (long)page_tlb_entry,
- (long)page_tlb_entry->real_address_of_pte_1));
- }
-
- ra = (page_tlb_entry->masked_real_page_number | om_ea_masked_byte(ea));
- TRACE(trace_vm, ("ea=0x%lx - page translation - ra=0x%lx\n",
- (long)ea, (long)ra));
- return ra;
-}
-
-
-/*
- * Definition of operations for memory management
- */
-
-
-/* rebuild all the relevant bat information */
-STATIC_INLINE_VM\
-(void)
-om_unpack_bat(om_bat *bat,
- spreg ubat,
- spreg lbat)
-{
- /* for extracting out the offset within a page */
- bat->block_length_mask = ((MASKED(ubat, 51, 61) << (17-2))
- | MASK(63-17+1, 63));
-
- /* for checking the effective page index */
- bat->block_effective_page_index = MASKED(ubat, 0, 46);
- bat->block_effective_page_index_mask = ~bat->block_length_mask;
-
- /* protection information */
- bat->protection_bits = EXTRACTED(lbat, 62, 63);
- bat->block_real_page_number = MASKED(lbat, 0, 46);
-}
-
-
-/* rebuild the given bat table */
-STATIC_INLINE_VM\
-(void)
-om_unpack_bats(om_bats *bats,
- spreg *raw_bats,
- msreg msr)
-{
- int i;
- bats->nr_valid_bat_registers = 0;
- for (i = 0; i < nr_om_bat_registers*2; i += 2) {
- spreg ubat = raw_bats[i];
- spreg lbat = raw_bats[i+1];
- if ((msr & msr_problem_state)
- ? EXTRACTED(ubat, 63, 63)
- : EXTRACTED(ubat, 62, 62)) {
- om_unpack_bat(&bats->bat[bats->nr_valid_bat_registers],
- ubat, lbat);
- bats->nr_valid_bat_registers += 1;
- }
- }
-}
-
-
-#if (WITH_TARGET_WORD_BITSIZE == 32)
-STATIC_INLINE_VM\
-(void)
-om_unpack_sr(vm *virtual,
- sreg *srs,
- int which_sr,
- cpu *processor,
- unsigned_word cia)
-{
- om_segment_tlb_entry *segment_tlb_entry = 0;
- sreg new_sr_value = 0;
-
- /* check register in range */
- ASSERT(which_sr >= 0 && which_sr < nr_om_segment_tlb_entries);
-
- /* get the working values */
- segment_tlb_entry = &virtual->segment_tlb.entry[which_sr];
- new_sr_value = srs[which_sr];
-
- /* do we support this */
- if (MASKED32(new_sr_value, 0, 0))
- cpu_error(processor, cia, "unsupported value of T in segment register %d",
- which_sr);
-
- /* update info */
- segment_tlb_entry->key[om_supervisor_state] = EXTRACTED32(new_sr_value, 1, 1);
- segment_tlb_entry->key[om_problem_state] = EXTRACTED32(new_sr_value, 2, 2);
- segment_tlb_entry->invalid_access = (MASKED32(new_sr_value, 3, 3)
- ? om_instruction_read
- : om_access_any);
- segment_tlb_entry->masked_virtual_segment_id =
- INSERTED32(EXTRACTED32(new_sr_value, 8, 31),
- 31-6-24+1, 31-6); /* aligned ready for pte group addr */
-}
-#endif
-
-
-#if (WITH_TARGET_WORD_BITSIZE == 32)
-STATIC_INLINE_VM\
-(void)
-om_unpack_srs(vm *virtual,
- sreg *srs,
- cpu *processor,
- unsigned_word cia)
-{
- int which_sr;
- for (which_sr = 0; which_sr < nr_om_segment_tlb_entries; which_sr++) {
- om_unpack_sr(virtual, srs, which_sr,
- processor, cia);
- }
-}
-#endif
-
-
-/* Rebuild all the data structures for the new context as specifed by
- the passed registers */
-INLINE_VM\
-(void)
-vm_synchronize_context(vm *virtual,
- spreg *sprs,
- sreg *srs,
- msreg msr,
- /**/
- cpu *processor,
- unsigned_word cia)
-{
-
- /* enable/disable translation */
- int problem_state = (msr & msr_problem_state) != 0;
- int data_relocate = (msr & msr_data_relocate) != 0;
- int instruction_relocate = (msr & msr_instruction_relocate) != 0;
- int little_endian = (msr & msr_little_endian_mode) != 0;
-
- unsigned_word page_table_hash_mask;
- unsigned_word real_address_of_page_table;
-
- /* update current processor mode */
- virtual->instruction_map.translation.is_relocate = instruction_relocate;
- virtual->instruction_map.translation.is_problem_state = problem_state;
- virtual->data_map.translation.is_relocate = data_relocate;
- virtual->data_map.translation.is_problem_state = problem_state;
-
- /* update bat registers for the new context */
- om_unpack_bats(&virtual->ibats, &sprs[spr_ibat0u], msr);
- om_unpack_bats(&virtual->dbats, &sprs[spr_dbat0u], msr);
-
- /* unpack SDR1 - the storage description register 1 */
-#if (WITH_TARGET_WORD_BITSIZE == 64)
- real_address_of_page_table = MASKED64(sprs[spr_sdr1], 0, 45);
- page_table_hash_mask = MASK64(18+28-EXTRACTED64(sprs[spr_sdr1], 59, 63),
- 63-7);
-#endif
-#if (WITH_TARGET_WORD_BITSIZE == 32)
- real_address_of_page_table = MASKED32(sprs[spr_sdr1], 0, 15);
- page_table_hash_mask = (INSERTED32(EXTRACTED32(sprs[spr_sdr1], 23, 31),
- 7, 7+9-1)
- | MASK32(7+9, 31-6));
-#endif
- virtual->instruction_map.translation.real_address_of_page_table = real_address_of_page_table;
- virtual->instruction_map.translation.page_table_hash_mask = page_table_hash_mask;
- virtual->data_map.translation.real_address_of_page_table = real_address_of_page_table;
- virtual->data_map.translation.page_table_hash_mask = page_table_hash_mask;
-
-
- /* unpack the segment tlb registers */
-#if (WITH_TARGET_WORD_BITSIZE == 32)
- om_unpack_srs(virtual, srs,
- processor, cia);
-#endif
-
- /* set up the XOR registers if the current endian mode conflicts
- with what is in the MSR */
- if (WITH_XOR_ENDIAN) {
- int i = 1;
- unsigned mask;
- if ((little_endian && CURRENT_TARGET_BYTE_ORDER == LITTLE_ENDIAN)
- || (!little_endian && CURRENT_TARGET_BYTE_ORDER == BIG_ENDIAN))
- mask = 0;
- else
- mask = WITH_XOR_ENDIAN - 1;
- while (i - 1 < WITH_XOR_ENDIAN) {
- virtual->instruction_map.translation.xor[i-1] = mask;
- virtual->data_map.translation.xor[i-1] = mask;
- mask = (mask << 1) & (WITH_XOR_ENDIAN - 1);
- i = i * 2;
- }
- }
- else {
- /* don't allow the processor to change endian modes */
- if ((little_endian && CURRENT_TARGET_BYTE_ORDER != LITTLE_ENDIAN)
- || (!little_endian && CURRENT_TARGET_BYTE_ORDER != BIG_ENDIAN))
- cpu_error(processor, cia, "attempt to change hardwired byte order");
- }
-}
-
-/* update vm data structures due to a TLB operation */
-
-INLINE_VM\
-(void)
-vm_page_tlb_invalidate_entry(vm *memory,
- unsigned_word ea)
-{
- int i = om_page_tlb_index(ea);
- memory->instruction_tlb.entry[i].masked_virtual_segment_id = MASK(0, 63);
- memory->data_tlb.entry[i].masked_virtual_segment_id = MASK(0, 63);
- TRACE(trace_vm, ("ea=0x%lx - tlb invalidate entry\n", (long)ea));
-}
-
-INLINE_VM\
-(void)
-vm_page_tlb_invalidate_all(vm *memory)
-{
- int i;
- for (i = 0; i < nr_om_page_tlb_entries; i++) {
- memory->instruction_tlb.entry[i].masked_virtual_segment_id = MASK(0, 63);
- memory->data_tlb.entry[i].masked_virtual_segment_id = MASK(0, 63);
- }
- TRACE(trace_vm, ("tlb invalidate all\n"));
-}
-
-
-
-INLINE_VM\
-(vm_data_map *)
-vm_create_data_map(vm *memory)
-{
- return &memory->data_map;
-}
-
-
-INLINE_VM\
-(vm_instruction_map *)
-vm_create_instruction_map(vm *memory)
-{
- return &memory->instruction_map;
-}
-
-
-STATIC_INLINE_VM\
-(unsigned_word)
-vm_translate(om_map *map,
- unsigned_word ea,
- om_access_types access,
- cpu *processor,
- unsigned_word cia,
- int abort)
-{
- switch (CURRENT_ENVIRONMENT) {
- case USER_ENVIRONMENT:
- case VIRTUAL_ENVIRONMENT:
- return ea;
- case OPERATING_ENVIRONMENT:
- return om_translate_effective_to_real(map, ea, access,
- processor, cia,
- abort);
- default:
- error("internal error - vm_translate - bad switch");
- return 0;
- }
-}
-
-
-INLINE_VM\
-(unsigned_word)
-vm_real_data_addr(vm_data_map *map,
- unsigned_word ea,
- int is_read,
- cpu *processor,
- unsigned_word cia)
-{
- return vm_translate(&map->translation,
- ea,
- is_read ? om_data_read : om_data_write,
- processor,
- cia,
- 1); /*abort*/
-}
-
-
-INLINE_VM\
-(unsigned_word)
-vm_real_instruction_addr(vm_instruction_map *map,
- cpu *processor,
- unsigned_word cia)
-{
- return vm_translate(&map->translation,
- cia,
- om_instruction_read,
- processor,
- cia,
- 1); /*abort*/
-}
-
-INLINE_VM\
-(instruction_word)
-vm_instruction_map_read(vm_instruction_map *map,
- cpu *processor,
- unsigned_word cia)
-{
- unsigned_word ra = vm_real_instruction_addr(map, processor, cia);
- ASSERT((cia & 0x3) == 0); /* always aligned */
- if (WITH_XOR_ENDIAN)
- ra ^= map->translation.xor[sizeof(instruction_word) - 1];
- return core_map_read_4(map->code, ra, processor, cia);
-}
-
-
-INLINE_VM\
-(int)
-vm_data_map_read_buffer(vm_data_map *map,
- void *target,
- unsigned_word addr,
- unsigned nr_bytes,
- cpu *processor,
- unsigned_word cia)
-{
- unsigned count;
- for (count = 0; count < nr_bytes; count++) {
- unsigned_1 byte;
- unsigned_word ea = addr + count;
- unsigned_word ra = vm_translate(&map->translation,
- ea, om_data_read,
- processor, /*processor*/
- cia, /*cia*/
- processor != NULL); /*abort?*/
- if (ra == MASK(0, 63))
- break;
- if (WITH_XOR_ENDIAN)
- ra ^= map->translation.xor[0];
- if (core_map_read_buffer(map->read, &byte, ra, sizeof(byte))
- != sizeof(byte))
- break;
- ((unsigned_1*)target)[count] = T2H_1(byte);
- }
- return count;
-}
-
-
-INLINE_VM\
-(int)
-vm_data_map_write_buffer(vm_data_map *map,
- const void *source,
- unsigned_word addr,
- unsigned nr_bytes,
- int violate_read_only_section,
- cpu *processor,
- unsigned_word cia)
-{
- unsigned count;
- unsigned_1 byte;
- for (count = 0; count < nr_bytes; count++) {
- unsigned_word ea = addr + count;
- unsigned_word ra = vm_translate(&map->translation,
- ea, om_data_write,
- processor,
- cia,
- processor != NULL); /*abort?*/
- if (ra == MASK(0, 63))
- break;
- if (WITH_XOR_ENDIAN)
- ra ^= map->translation.xor[0];
- byte = T2H_1(((unsigned_1*)source)[count]);
- if (core_map_write_buffer((violate_read_only_section
- ? map->read
- : map->write),
- &byte, ra, sizeof(byte)) != sizeof(byte))
- break;
- }
- return count;
-}
-
-
-/* define the read/write 1/2/4/8/word functions */
-
-#define N 1
-#include "vm_n.h"
-#undef N
-
-#define N 2
-#include "vm_n.h"
-#undef N
-
-#define N 4
-#include "vm_n.h"
-#undef N
-
-#define N 8
-#include "vm_n.h"
-#undef N
-
-#define N word
-#include "vm_n.h"
-#undef N
-
-
-
-#endif /* _VM_C_ */
diff --git a/sim/ppc/vm.h b/sim/ppc/vm.h
deleted file mode 100644
index b8c4c8c234b..00000000000
--- a/sim/ppc/vm.h
+++ /dev/null
@@ -1,155 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1997, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-#ifndef _VM_H_
-#define _VM_H_
-
-typedef struct _vm vm;
-typedef struct _vm_data_map vm_data_map;
-typedef struct _vm_instruction_map vm_instruction_map;
-
-
-/* each PowerPC requires two virtual memory maps */
-
-INLINE_VM\
-(vm *) vm_create
-(core *memory);
-
-INLINE_VM\
-(vm_data_map *) vm_create_data_map
-(vm *memory);
-
-INLINE_VM\
-(vm_instruction_map *) vm_create_instruction_map
-(vm *memory);
-
-
-/* address translation, if the translation is invalid
- these will not return */
-
-INLINE_VM\
-(unsigned_word) vm_real_data_addr
-(vm_data_map *data_map,
- unsigned_word ea,
- int is_read,
- cpu *processor,
- unsigned_word cia);
-
-INLINE_VM\
-(unsigned_word) vm_real_instruction_addr
-(vm_instruction_map *instruction_map,
- cpu *processor,
- unsigned_word cia);
-
-
-/* generic block transfers. Dependant on the presence of the
- PROCESSOR arg, either returns the number of bytes transfered or (if
- PROCESSOR is non NULL) aborts the simulation */
-
-INLINE_VM\
-(int) vm_data_map_read_buffer
-(vm_data_map *map,
- void *target,
- unsigned_word addr,
- unsigned len,
- cpu *processor,
- unsigned_word cia);
-
-INLINE_VM\
-(int) vm_data_map_write_buffer
-(vm_data_map *map,
- const void *source,
- unsigned_word addr,
- unsigned len,
- int violate_read_only_section,
- cpu *processor,
- unsigned_word cia);
-
-
-/* fetch the next instruction from memory */
-
-INLINE_VM\
-(instruction_word) vm_instruction_map_read
-(vm_instruction_map *instruction_map,
- cpu *processor,
- unsigned_word cia);
-
-
-/* read data from memory */
-
-#define DECLARE_VM_DATA_MAP_READ_N(N) \
-INLINE_VM\
-(unsigned_##N) vm_data_map_read_##N \
-(vm_data_map *map, \
- unsigned_word ea, \
- cpu *processor, \
- unsigned_word cia);
-
-DECLARE_VM_DATA_MAP_READ_N(1)
-DECLARE_VM_DATA_MAP_READ_N(2)
-DECLARE_VM_DATA_MAP_READ_N(4)
-DECLARE_VM_DATA_MAP_READ_N(8)
-DECLARE_VM_DATA_MAP_READ_N(word)
-
-
-/* write data to memory */
-
-#define DECLARE_VM_DATA_MAP_WRITE_N(N) \
-INLINE_VM\
-(void) vm_data_map_write_##N \
-(vm_data_map *map, \
- unsigned_word addr, \
- unsigned_##N val, \
- cpu *processor, \
- unsigned_word cia);
-
-DECLARE_VM_DATA_MAP_WRITE_N(1)
-DECLARE_VM_DATA_MAP_WRITE_N(2)
-DECLARE_VM_DATA_MAP_WRITE_N(4)
-DECLARE_VM_DATA_MAP_WRITE_N(8)
-DECLARE_VM_DATA_MAP_WRITE_N(word)
-
-
-/* update vm data structures due to a synchronization point */
-
-INLINE_VM\
-(void) vm_synchronize_context
-(vm *memory,
- spreg *sprs,
- sreg *srs,
- msreg msr,
- /**/
- cpu *processor,
- unsigned_word cia);
-
-
-/* update vm data structures due to a TLB operation */
-
-INLINE_VM\
-(void) vm_page_tlb_invalidate_entry
-(vm *memory,
- unsigned_word ea);
-
-INLINE_VM\
-(void) vm_page_tlb_invalidate_all
-(vm *memory);
-
-#endif
diff --git a/sim/ppc/vm_n.h b/sim/ppc/vm_n.h
deleted file mode 100644
index 9222ffa2cc0..00000000000
--- a/sim/ppc/vm_n.h
+++ /dev/null
@@ -1,134 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1997, Andrew Cagney <cagney@highland.com.au>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-#ifndef N
-#error "N must be #defined"
-#endif
-
-/* NOTE: See end of file for #undef */
-#define unsigned_N XCONCAT2(unsigned_,N)
-#define T2H_N XCONCAT2(T2H_,N)
-#define H2T_N XCONCAT2(H2T_,N)
-#define vm_data_map_read_N XCONCAT2(vm_data_map_read_,N)
-#define vm_data_map_write_N XCONCAT2(vm_data_map_write_,N)
-
-
-INLINE_VM\
-(unsigned_N)
-vm_data_map_read_N(vm_data_map *map,
- unsigned_word ea,
- cpu *processor,
- unsigned_word cia)
-{
- if ((ea & (sizeof(unsigned_N)-1)) == 0) {
- unsigned ra = vm_real_data_addr(map, ea, 1/*is-read*/, processor, cia);
- unsigned_N val;
- if (WITH_XOR_ENDIAN)
- ra ^= map->translation.xor[sizeof(unsigned_N) - 1];
- val = XCONCAT2(core_map_read_,N)(map->read, ra, processor, cia);
- if (WITH_MON & MONITOR_LOAD_STORE_UNIT)
- mon_read(ea, ra, sizeof(unsigned_N), processor, cia);
- TRACE(trace_load_store, ("load cia=0x%lx ea=0x%lx N=%ld val=0x%lx\n",
- (long)cia, (long)ea, (long)sizeof(unsigned_N), (long)val));
- return val;
- }
- else {
- switch (CURRENT_ALIGNMENT) {
- case STRICT_ALIGNMENT:
- alignment_interrupt(processor, cia, ea);
- return 0;
- case NONSTRICT_ALIGNMENT:
- {
- unsigned_N val;
- if (vm_data_map_read_buffer(map, &val, ea, sizeof(unsigned_N), processor, cia)
- != sizeof(unsigned_N)) {
- cpu_error(processor, cia, "misaligned %d byte read to 0x%lx failed",
- sizeof(unsigned_N), (unsigned long)ea);
- }
- val = T2H_N(val);
- if (WITH_MON & MONITOR_LOAD_STORE_UNIT) {
- /* YUCK */
- unsigned ra = vm_real_data_addr(map, ea, 1, processor, cia);
- mon_read(ea, ra, sizeof(unsigned_N), processor, cia);
- }
- TRACE(trace_load_store, ("load cia=0x%lx ea=0x%lx N=%ld data=0x%lx\n",
- (long)cia, (long)ea, (long)sizeof(unsigned_N), (long)val));
- return val;
- }
- default:
- error("internal error - vm_data_map_read_N - bad switch");
- return 0;
- }
- }
-}
-
-INLINE_VM\
-(void)
-vm_data_map_write_N(vm_data_map *map,
- unsigned_word ea,
- unsigned_N val,
- cpu *processor,
- unsigned_word cia)
-{
- if ((ea & (sizeof(unsigned_N)-1)) == 0) {
- unsigned ra = vm_real_data_addr(map, ea, 0/*is-read?*/, processor, cia);
- if (WITH_XOR_ENDIAN)
- ra ^= map->translation.xor[sizeof(unsigned_N) - 1];
- XCONCAT2(core_map_write_,N)(map->write, ra, val, processor, cia);
- if (WITH_MON & MONITOR_LOAD_STORE_UNIT)
- mon_write(ea, ra, sizeof(unsigned_N), processor, cia);
- TRACE(trace_load_store, ("store cia=0x%lx ea=0x%lx N=%ld val=0x%lx\n",
- (long)cia, (long)ea, (long)sizeof(unsigned_N), (long)val));
- }
- else {
- switch (CURRENT_ALIGNMENT) {
- case STRICT_ALIGNMENT:
- alignment_interrupt(processor, cia, ea);
- break;
- case NONSTRICT_ALIGNMENT:
- {
- unsigned_N data = H2T_N(val);
- if (vm_data_map_write_buffer(map, &data, ea, sizeof(unsigned_N), 0, processor, cia)
- != sizeof(unsigned_N)) {
- cpu_error(processor, cia, "misaligned %d byte write to 0x%lx failed",
- sizeof(unsigned_N), (unsigned long)ea);
- }
- if (WITH_MON & MONITOR_LOAD_STORE_UNIT) {
- /* YUCK */
- unsigned ra = vm_real_data_addr(map, ea, 1, processor, cia);
- mon_write(ea, ra, sizeof(unsigned_N), processor, cia);
- }
- TRACE(trace_load_store, ("store cia=0x%lx ea=0x%lx N=%ld val=0x%lx\n",
- (long)cia, (long)ea, (long)sizeof(unsigned_N), (long)val));
- }
- break;
- default:
- error("internal error - vm_data_map_write_N - bad switch");
- }
- }
-}
-
-/* NOTE: see start of file for #define */
-#undef unsigned_N
-#undef T2H_N
-#undef H2T_N
-#undef vm_data_map_read_N
-#undef vm_data_map_write_N
diff --git a/sim/ppc/words.h b/sim/ppc/words.h
deleted file mode 100644
index 1c18df42ebf..00000000000
--- a/sim/ppc/words.h
+++ /dev/null
@@ -1,116 +0,0 @@
-/* This file is part of psim (model of the PowerPC(tm) architecture)
-
- Copyright (C) 1994-1995, Andrew Cagney <cagney@highland.com.au>
-
- This library is free software; you can redistribute it and/or
- modify it under the terms of the GNU Library General Public License
- as published by the Free Software Foundation; either version 2 of
- the License, or (at your option) any later version.
-
- This library is distributed in the hope that it will be useful, but
- WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
- Library General Public License for more details.
-
- You should have received a copy of the GNU Library General Public
- License along with this library; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- --
-
- PowerPC is a trademark of International Business Machines Corporation. */
-
-
-/* Basic type sizes for the PowerPC */
-
-#ifndef _WORDS_H_
-#define _WORDS_H_
-
-/* TYPES:
-
- natural* sign determined by host
- signed* signed type of the given size
- unsigned* The corresponding insigned type
-
- SIZES
-
- *NN Size based on the number of bits
- *_NN Size according to the number of bytes
- *_word Size based on the target architecture's word
- word size (32/64 bits)
- *_cell Size based on the target architecture's
- IEEE 1275 cell size (almost always 32 bits)
-
-*/
-
-
-/* bit based */
-typedef char natural8;
-typedef short natural16;
-typedef long natural32;
-
-typedef signed char signed8;
-typedef signed short signed16;
-typedef signed long signed32;
-
-typedef unsigned char unsigned8;
-typedef unsigned short unsigned16;
-typedef unsigned long unsigned32;
-
-#ifdef __GNUC__
-typedef long long natural64;
-typedef signed long long signed64;
-typedef unsigned long long unsigned64;
-#endif
-
-#ifdef _MSC_VER
-typedef __int64 natural64;
-typedef signed __int64 signed64;
-typedef unsigned __int64 unsigned64;
-#endif
-
-
-/* byte based */
-typedef natural8 natural_1;
-typedef natural16 natural_2;
-typedef natural32 natural_4;
-typedef natural64 natural_8;
-
-typedef signed8 signed_1;
-typedef signed16 signed_2;
-typedef signed32 signed_4;
-typedef signed64 signed_8;
-
-typedef unsigned8 unsigned_1;
-typedef unsigned16 unsigned_2;
-typedef unsigned32 unsigned_4;
-typedef unsigned64 unsigned_8;
-
-
-/* for general work, the following are defined */
-/* unsigned: >= 32 bits */
-/* signed: >= 32 bits */
-/* long: >= 32 bits, sign undefined */
-/* int: small indicator */
-
-/* target architecture based */
-#if (WITH_TARGET_WORD_BITSIZE == 64)
-typedef natural64 natural_word;
-typedef unsigned64 unsigned_word;
-typedef signed64 signed_word;
-#else
-typedef natural32 natural_word;
-typedef unsigned32 unsigned_word;
-typedef signed32 signed_word;
-#endif
-
-
-/* Other instructions */
-typedef unsigned32 instruction_word;
-
-/* IEEE 1275 cell size - only support 32bit mode at present */
-typedef natural32 natural_cell;
-typedef unsigned32 unsigned_cell;
-typedef signed32 signed_cell;
-
-#endif /* _WORDS_H_ */
diff --git a/sim/sh/ChangeLog b/sim/sh/ChangeLog
deleted file mode 100644
index 541ed1f27d2..00000000000
--- a/sim/sh/ChangeLog
+++ /dev/null
@@ -1,979 +0,0 @@
-2001-01-30 Ben Elliston <bje@redhat.com>
-
- * interp.c (sim_create_inferior): Record program arguments for
- later inspection by the trap handler.
- (count_argc): New function.
- (prog_argv): Declare static.
- (sim_write): Declare.
- (trap): Implement argc, argnlen and argn system calls. Do not
- abort on unknown system calls--simply return -1.
- * syscall.h (SYS_argc, SYS_argnlen, SYS_argn): Define.
-
-2001-01-24 Alexandre Oliva <aoliva@redhat.com>
-
- * interp.c (trap): Implement time.
-
-2000-10-24 Ben Elliston <bje@redhat.com>
-
- * gencode.c (tab): Delimit strings with commas where applicable.
-
-Tue May 23 21:39:23 2000 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Mon May 15 22:04:51 2000 J"orn Rennecke <amylaar@cygnus.co.uk>
-
-sh-dsp support, simulator speedup by using host byte order:
-
- * Makefile.in (interp.o): Depends on ppi.c .
- (ppi.c): New rule.
- * gencode.c (printonmatch, think, genopc): Deleted.
- (MAX_NR_STUFF): Now 42.
- (tab): Add SH-DSP CPU instructions.
- Amalgamate ldc / stc / lds / sts instructions with similar
- bit patterns. Fix opcodes of stc Rm_BANK,@-<REG_N>.
- Fix semantics of lds.l @<REG_N>+,MACH (no sign extend).
- (movsxy_tab): New array.
- For movs, change MMMM field to GGGG, and mmmm field to MMMM.
- Added entries for movx, movy and parallel processing insns.
- (ppi_tab): New array.
- (qfunc): Stabilize sort.
- (expand_opcode): Handle [01][01]NN, [01][01]xx and [01][01]yy.
- Handle 'M', 'G' 's' 'X', 'a', 'Y' and 'A'.
- (dumptable): Now takes three arguments. Changed all callers.
- Emit just one contigous jump table.
- (filltable): Now takes an argument. Changed all callers.
- Make index static.
- (ppi_moves, expand_ppi_code, ppi_filltable, ppi_gensim): New functions.
- (gensim_caselist): New function, broken out of gensim.
- Handle opcode fields 'x', 'y', 's', 'M', 'G', 'X', 'a', and 'Y'.
- Handle ref '9'.
- (gensim): Handle 'N' in code field and '8' in refs field.
- Call gensim_caselist - twice.
- (ppi_index): New static variable.
- (main): Unsupport default action.
- Add dsp support for -x / -s option. Add -p option.
- * interp.c (sh_jump_table, sh_dsp_table, ppi_table): Declare.
- (saved_state_type): Rearrange to allow amalgamated ldc / stc /
- lds / sts to work efficiently.
- (target_dsp): New static variable.
- (GBR, VBR, SSR, SPC, MACH, MACL): Reflect saved_state_type change.
- (FPUL, Rn_BANK, SET_Rn_BANK, M, Q, S, T, SR_BL, SR_RB): Likewise.
- (SR_MD, SR_RC, SET_SR_BIT, GET_SR, SET_RC, GET_FPSCR): Likewise.
- (RS, RE, MOD, MOD_ME, DSP_R): Likewise.
- (set_fpscr1): Likewise. Use target_dsp to check for dsp.
- (MOD_MSi, SIG_BUS_FETCH): Deleted.
- (CREG, SREG, PR, SR_MASK_DMY, SR_MASK_DMX, SR_DMY): New macros.
- (SR_DMX, DSR, MOD_DELTA, GET_DSP_GRD): Likewise.
- (SET_MOD): Reflect saved_state_type change. Set MOD_DELTA instead
- of MOD_MS, and encode SR_DMY / SR_DMX into high word of MOD_ME.
- (set_sr): Reflect saved_state_type change. Fix SR_RB handling.
- Use SET_MOD.
- (MA, L, TL, TB): Now controlled by ACE_FAST.
- (SEXT32): Just cast to int.
- (SIGN32): Fixed to only shift by 31.
- (CHECK_INSN_PTR): SIGBUS at insn fetch now represented by insn_end 0.
- (ppi_insn): Declare.
- (ppi.c): Include.
- (init_dsp): Set target_dsp. When it changes, switch end of
- sh_jump_table with sh_dsp_table.
- (sim_resume) Don't declare sh_jump_table0. Use sh_jump_table instead.
- Don't Declare PR if it's #defined.
- Fix single-stepping (Was broken in Mar 6 16:59:10 patch).
- (sim_store_register, sim_read_register): Translate accesses to
- reflect saved_state_type change.
-
- * interp.c (set_sr): Set sr.
- (SET_RC, MOD, MOD_MS, MOD_ME, SET_MOD, MOD_MS, MOD_ME): New macros.
- (set_fpscr1): Don't bank-switch fpu registers when simulating sh-dsp.
- (DSP_R): Fix definition.
- (sim_resume): Remove outdated SET_SR use.
-
- * interp.c (saved_state): New members for struct member asregs:
- rs, re, insn_end, xram_start, yram_start.
- (struct loop_bounds): New struct.
- (SKIP_INSN): New macro.
- (get_loop_bounds): New function.
- (endianw): Renamed to global_endianw.
- (maskw): negated bits.
- (PC): Now insn_ptr.
- (SR_MASK_RC, SR_RC_INCREMENT, SR_RC, RAISE_EXCEPTION): New macros.
- (RS, RE, DSP_R, DSP_GRD, A1, A0, X0, X1, Y0, Y1, M0, A1G): Likewise.
- (M1, A0G, RIAT, PT2H, PH2T, SET_NIP, CHECK_INSN_PTR): Likewise.
- (SIG_BUS_FETCH): Likewise
- (raise_exception, riat_fast): New functions.
- (raise_buserror, sim_stop): Use raise_exception.
- (PROCESS_SPECIAL_ADDRESS): Use xram_start / yram_start.
- (BUSERROR, WRITE_BUSERROR, READ_BUSERROR):
- Reverse sense of mask argument.
- (FP_OP, set_dr): Use RAISE_EXCEPTION.
- (wlat_fast, wwat_fast, wbat_fast, rlat_fast, rwat_fast, rbat_fast):
- Declare. Remove redundant masking.
- (wwat_fast, rwat_fast): Add argument endianw. Changed callers.
- (MA): Updated for change pc -> PC.
- (Delay_Slot): Use RIAT.
- (empty): Deleted.
- (trap): Remove argument little_endian. Add argument endianw.
- Changed all callers. Use raise_exception.
- (macw): Add argument endainw. Changed all callers.
- (init_dsp): New function, extended after broken out of init_pointers.
- (sim_resume): Replace pc with insn_ptr. Replace little_endian with
- endianw. Replace nia with nip. Reverse sense of maskb / maskw /
- maskl. Implement logic for zero-overhead loops. Don't try to
- interpret garbage when getting a SIGBUS at insn fetch.
- (sim_open): Call init_dsp.
- * gencode.c (tab): Use SET_NIP instead of nia = . Use PH2T / PT2H /
- RAISE_EXCEPTION where appropriate.
- Add extra cycles for brai, braf , bsr, bsrf, jmp, jsr.
-
- * interp.c (sim_store_register, sim_fetch_register):
- Do proper endianness switch.
-
- * interp.c (saved_state_type): New members for struct member asregs:
- xymem_select, xmem, ymem, xmem_offset, ymem_offset.
- (special_address): Delete.
- (BUSERROR): Now a two-argument predicate.
- (PROCESS_SPECIAL_ADDRESS, WRITE_BUSERROR, READ_BUSERROR): New macros.
- (wlat_little, wwat_little, wbat_any, wlat_big, wwat_big): Delete.
- (process_wlat_addr, process_wwat_addr): New functions.
- (process_wbat_addr, process_rlat_addr, process_rwat_addr): Likewise.
- (process_rbat_addr): Likewise.
- (wlat_fast, wwat_fast, wbat_fast): Use WRITE_BUSERROR.
- (rlat_little, rwat_little, rbat_any, rlat_big, rwat_big): Delete.
- (rlat_fast, rwat_fast, rbat_fast): Use READ_BUSERROR.
- (RWAT, RLAT, RBAT, WWAT, WLAT, WBAT): Delete SLOW versions.
- (do_rdat, trap): Delete SLOW code.
- (SEXT32, SIGN32): New macros.
- (swap, swap16): Now integer in - integer out. Changed all callers.
- (strswaplen, strnswap): Delete SLOW versions.
- (init_pointers): Initialize dsp memory selection (preliminary).
- (sim_store_register, sim_fetch_register): Use swap instead of
- big / little endian read / write functions.
-
- * interp.c (maskl): Deleted.
- (endianw, endianb): New variables.
- (special_address): Now inline.
- (bp_holder): Put raising of buserror there, rename to:
- (raise_buserror).
- (BUSERROR): Now yields a value. Changed all users.
- (wbat_big): Delete.
- (wlat_fast, wwat_fast, wbat_fast): New functions.
- (rlat_fast, rwat_fast, rbat_fast): Likewise.
- (RWAT, RLAT, RBAT, WWAT, WLAT, WBAT): Use new functions.
- (do_rdat, do_wdat): Likewise. Take maskl argument instead of
- little_endian one. Changed caller macros.
- (swap, swap16): Use w[rw]lat_big / w[rw]lat_little directly.
- (strswaplen, strnswap): New functions.
- (trap): Use them to fix up endian mismatches;
- disable SYS_execve and SYS_execv; fix double address translation for
- SYS_pipe and SYS_stat.
- (sym_write, sym_read): Add endianness translation.
- (sym_store_register, sym_fetch_register): Add maskl local variable.
- (sim_open): Set endianw and endianb.
-
-Thu Sep 2 18:15:53 1999 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Wed Aug 25 07:55:23 1999 Brendan Kehoe <brendan@cygnus.com>
-
- * gencode.c (fcnvds <DR_N>,FPUL): Rewrite to use a local anonymous
- union type, instead of casting to an int* then a float*.
- (fcnvsd FPUL,<DR_N>): Likewise.
- (flds <FREG_N>,FPUL): Likewise.
- (fsts FPUL,<FREG_N>): Likewise.
-
-1999-05-08 Felix Lee <flee@cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-1999-04-02 Keith Seitz <keiths@cygnus.com>
-
- * interp.c (POLL_QUIT_INTERVAL): Define. Used to tweak the
- frequency at which the poll_quit callback is called.
- (sim_resume): Use POLL_QUIT_INTERVAL instead of a
- hard-coded value.
-
-Thu Sep 10 02:16:39 1997 J"orn Rennecke <amylaar@cygnus.co.uk>
-
- * interp.c (saved_state.asregs): Add new member pad_dummy.
- (sim_store_register, sim_fetch_regsiter): Add 1 to rn for use
- as index into saved_state.asints.
-
-Mon Jun 29 19:35:24 1998 Jason Molenda (crash@bugshack.cygnus.com)
-
- * interp.c (sim_open): set endianness based on the ABFD if a -E
- option is not present and we have an ABFD.
-
-Tue Apr 28 18:33:31 1998 Geoffrey Noer <noer@cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Sun Apr 26 15:31:55 1998 Tom Tromey <tromey@creche>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
- * config.in: Ditto.
-
-Sun Apr 26 15:19:48 1998 Tom Tromey <tromey@cygnus.com>
-
- * acconfig.h: New file.
- * configure.in: Reverted change of Apr 24; use sinclude again.
-
-Fri Apr 24 14:16:40 1998 Tom Tromey <tromey@creche>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
- * config.in: Ditto.
-
-Fri Apr 24 11:18:35 1998 Tom Tromey <tromey@cygnus.com>
-
- * configure.in: Don't call sinclude.
-
-Sat Apr 4 20:36:25 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Fri Mar 27 16:15:52 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Wed Mar 25 12:35:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Wed Mar 18 12:38:12 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Tue Feb 17 12:49:44 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * interp.c (sim_fetch_register, sim_store_register): Pass in
- length parameter. Return -1.
-
-Sun Feb 1 16:47:51 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Sat Jan 31 18:15:41 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Mon Jan 19 22:26:29 1998 Doug Evans <devans@seba>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Mon Dec 15 23:17:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
- * config.in: Ditto.
-
-Thu Dec 4 09:21:05 1997 Doug Evans <devans@canuck.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Wed Oct 22 14:43:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * interp.c (sim_load): Pass lma_p and sim_write args to
- sim_load_file.
-
-Fri Oct 3 09:28:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Wed Sep 24 17:38:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Tue Sep 23 11:04:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Mon Sep 22 11:46:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Fri Sep 19 17:45:25 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Mon Sep 15 17:36:15 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Tue Sep 9 20:52:21 1997 Felix Lee <flee@cygnus.com>
-
- * interp.c (sim_resume): poll_quit() at least once per call;
- otherwise gdb can loop sim_resume() uninterruptably.
-
-Thu Sep 4 17:21:23 1997 Doug Evans <dje@seba>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Tue Sep 2 13:15:27 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * gencode.c (tab): Order instructions according to SH3 document.
-
-Wed Aug 27 18:13:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
- * config.in: Ditto.
-
-Tue Aug 26 10:41:55 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * interp.c (sim_kill): Delete.
- (sim_create_inferior): Add ABFD argument.
- (sim_load): Move setting of PC from here.
- (sim_create_inferior): To here.
-
-Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
- * config.in: Ditto.
-
-Mon Aug 25 16:17:51 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * interp.c (sim_open): Add ABFD argument.
-
-Mon Jun 23 15:49:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * interp.c (get_dr): Avoid SIGFPE by moving integers instead of
- FP's around.
- (set_dr): Ditto.
-
-Mon Jun 23 15:02:40 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * interp.c (XD, SET_XD): Delete.
- (XF, SET_XF, XD_TO_XF): Define, move around registers in either
- FP bank.
-
- * gencode.c (fmov): Update.
-
-Sun Jun 22 19:33:33 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * interp.c (set_fpscr1): From J"orn Rennecke
- <amylaar@cygnus.co.uk>, Fix typo. Ditto for comment.
-
-Tue Aug 12 00:19:11 1997 J"orn Rennecke <amylaar@cygnus.co.uk>
-
- * interp.c (special_address): New function.
- (BUSERROR): Call it. Added parameters bits_written and data.
- Changed all callers.
- * gencode.c (tab): Fixed ocbwb and pref.
-
-Fri Jun 20 22:03:18 1997 J"orn Rennecke <amylaar@cygnus.co.uk>
-
- * interp.c (do_wdat, do_wdat): Fix bug in register number calculation.
-
-Thu Jun 19 00:28:08 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * interp.c (sim_create_inferior): Clear registers each time an
- inferior is started.
-
-Mon Jun 16 14:01:55 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * interp.c (*FP, FP_OP, FP_CMP, FP_UNARY): Provide a hook for
- when a host doesn't support IEEE FP.
- (*DP): Provide alternative definition that supports 64bit floating
- point.
- (target_little_endian): Combine little_endian and little_endian_p.
- (saved_state_type): Make fpscr and sr simple integers.
- (SET_FPSCR, GET_FPSCR): Use macros to update fpscr register.
- (set_fpscr1): New function. Handle swapping when PR / FR bits
- changed. Call via *_FPSCR macro.
- (SET_SR*, GET_SR*): Use macro's to access the SR bits - avoids
- endian problems.
-
- * gencode.c (tab): Update.
-
-Sun Jun 15 15:22:52 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * gencode.c (main): Perform basic checks on tab entries.
-
- * Makefile.in (gencode): Always compile with -g.
-
-Sat Jun 14 13:45:09 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * gencode.c (gensim): Move ref checking code to before `stuff'.
- For branches with delay slots refs were not being checked.
-
- * interp.c (sim_resume): Use nia to specify the next instruction
- address instead of overloading pc.
- (C): Delete definiton - refer to cycles directly.
- (SEXT12): New macro - sign extend a 12 bit quantity.
- (Delay_Slot): Rename from SL.
-
- * gencode.c (tab): Update/simplify.
-
- * gencode.c (gensim): Better formatting of output code.
- (gensim): Replace 10 with constant MAX_NR_STUFF- define as 15.
- (tab): Sort alphabetically. Break `stuff' into multiple lines.
-
-Fri Jun 13 22:10:13 1997 J"orn Rennecke <amylaar@cygnus.co.uk>
-
- * gencode.c (braf, bsrf): Fix branch destination calculation to
- be in accordance with the documentation.
-
-Fri Jun 13 15:33:53 1997 J"orn Rennecke <amylaar@cygnus.co.uk>
-
- * interp.c (init_pointers): Fix little endian test.
-
-Thu Jun 5 12:56:08 1997 J"orn Rennecke <amylaar@cygnus.co.uk>
-
- * interp.c (init_pointers): SH4 hardware is always WORDS_BIT_ENDIAN.
- * gencode (fmov from/to memory): take endian_mismatch into account
- for 32 bit moves too.
-
-Wed May 28 23:42:35 1997 J"orn Rennecke <amylaar@cygnus.co.uk>
-
- * gencode.c (swap.b): Fix treatment of high word.
-
-Wed May 28 23:42:35 1997 J"orn Rennecke <amylaar@cygnus.co.uk>
-
- * sh/gencode.c,
- * interp.c: experimental SH4 support.
- DFmode moves are probaly broken for target little endian.
-
-Tue May 20 10:23:28 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * interp.c (sim_open): Add callback argument.
- (sim_set_callbacks): Delete SIM_DESC argument.
-
-Wed Apr 30 11:38:08 1997 Doug Evans <dje@canuck.cygnus.com>
-
- * Makefile.in (SIM_EXTRA_CLEAN): Define.
- (clean targets): Delete.
- (sh-clean): New target.
-
-Thu Apr 24 00:39:51 1997 Doug Evans <dje@canuck.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Wed Apr 23 17:55:22 1997 Doug Evans <dje@canuck.cygnus.com>
-
- * tconfig.in: New file.
- * interp.c (sim_open): Handle missing arg to -E.
-
-Tue Apr 22 08:55:35 1997 Stu Grossman (grossman@critters.cygnus.com)
-
- * Makefile.in: Add clean targets.
-
-Fri Apr 18 18:57:04 1997 Stu Grossman (grossman@critters.cygnus.com)
-
- * interp.c: Include float.h and define SIGTRAP if _WIN32.
- WIN32 -> _WIN32.
- * (trap): Do do SYS_chown for _WIN32.
-
-Fri Apr 18 13:33:09 1997 Doug Evans <dje@canuck.cygnus.com>
-
- * interp.c (sim_resume): Fix argument to poll_quit.
-
-Fri Apr 18 14:14:49 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * interp.c (sim_stop): New function.
- (sim_resume): Use poll_quit for polling.
-
-Thu Apr 17 03:32:04 1997 Doug Evans <dje@canuck.cygnus.com>
-
- * Makefile.in (SIM_OBJS): Add sim-load.o.
- * interp.c (target_byte_order): Delete.
- (sim_kind, myname, little_endian_p): New static locals.
- (init_pointers): Use little_endian_p instead of target_byte_order.
- (sim_resume): Likewise.
- (sim_open): Set sim_kind, myname. Set little_endian_p from -E arg.
- (sim_load): Return SIM_RC. New arg abfd. Call sim_load_file to
- load file into simulator. Set start address from bfd.
- (sim_create_inferior): Return SIM_RC. Delete arg start_address.
-
-Mon Apr 7 15:45:02 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
- * config.in: Ditto.
-
-Wed Apr 2 15:06:28 1997 Doug Evans <dje@canuck.cygnus.com>
-
- * interp.c (sim_open): New arg `kind'.
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Wed Apr 2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Wed Mar 19 09:34:36 1997 Fred Fish <fnf@cygnus.com>
-
- * interp.c (sim_do_command): Check for NULL command or empty
- string and handle it the same as a "help" command. Use callback
- to print error message for unrecognized commands. Replace
- hardcoded tab in literal string with a \t. Other minor code
- cleanup.
-
-Wed Mar 19 01:14:00 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Mon Mar 17 15:10:07 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
-
- * configure: Re-generate.
-
-Fri Mar 14 10:34:11 1997 Michael Meissner <meissner@cygnus.com>
-
- * configure: Regenerate to track ../common/aclocal.m4 changes.
-
-Thu Mar 13 13:00:00 1997 Doug Evans <dje@canuck.cygnus.com>
-
- * interp.c (sim_open): New SIM_DESC result. Argument is now
- in argv form.
- (other sim_*): New SIM_DESC argument.
-
-Tue Feb 4 13:33:30 1997 Doug Evans <dje@canuck.cygnus.com>
-
- * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
- COMMON_{PRE,POST}_CONFIG_FRAG instead.
- * configure.in: sinclude ../common/aclocal.m4.
- * configure: Regenerated.
-
-Thu Jan 23 11:46:23 1997 Stu Grossman (grossman@critters.cygnus.com)
-
- * configure configure.in Makefile.in: Update to new configure
- scheme which is more compatible with WinGDB builds.
- * configure.in: Improve comment on how to run autoconf.
- * configure: Re-run autoconf to get new ../common/aclocal.m4.
- * Makefile.in: Use autoconf substitution to install common
- makefile fragment.
-
-Wed Nov 20 02:04:32 1996 Doug Evans <dje@canuck.cygnus.com>
-
- * Makefile.in: Delete stuff moved to ../common/Make-common.in.
- (SIM_OBJS,SIM_EXTRA_LIBS): Define.
- * configure.in: Simplify using macros in ../common/aclocal.m4.
- Call AC_CHECK_HEADERS(unistd.h).
- * configure: Regenerated.
- * config.in: New file.
- * interp.c: #include "config.h". #include <unistd.h> if present.
- (trap): Fetch errno value with callback->get_errno.
-
-Tue Nov 12 13:34:00 1996 Dawn Perchik <dawn@cygnus.com>
-
- * interp.c: Don't include windows polling code if inside simluator.
-
-Fri Sep 20 14:57:50 1996 Stan Shebs <shebs@andros.cygnus.com>
-
- * interp.c: Minor formatting improvements.
- (saved_state_type): Add bank registers.
- (bp_holder): New function, use to break on when debugging BUSERROR.
- (BUSERROR): Call it if bus error occurs.
-
-Wed Jun 26 12:29:22 1996 Jason Molenda (crash@godzilla.cygnus.co.jp)
-
- * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
- INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
- (docdir): Removed.
- * configure.in (AC_PREREQ): autoconf 2.5 or higher.
- (AC_PROG_INSTALL): Added.
- * configure: Rebuilt.
-
-Thu May 16 15:44:29 1996 Ian Lance Taylor <ian@cygnus.com>
-
- * interp.c (saved_state_type): Add memstalls field.
- (MA) Define macro.
- (sim_resume): New local variable memstalls. Add it back in to
- saved_state at the end of the function.
- (sim_info): Report memstalls.
- * gencode.c (tab): Add MA() to the execution string of all
- instructions which access memory.
-
-Wed Feb 21 12:16:41 1996 Ian Lance Taylor <ian@cygnus.com>
-
- * configure: Regenerate with autoconf 2.7.
-
-Tue Dec 5 16:38:55 1995 Stu Grossman (grossman@cygnus.com)
-
- * gencode.c (mac.l): Don't abort GDB if executing mac.l
- instruction (which is unimplemented). Generate a SIGTRAP (in the
- simulated target) instead.
-
-Mon Dec 4 12:22:24 1995 J.T. Conklin <jtc@rtl.cygnus.com>
-
- * gencode.c (tab): Added several sh3 opcodes.
- (think): Added printonmatch for A_SSR and A_SPC.
- * interp.c (SSR, SPC): Added definitions.
- (saved_state_type): Added ssr and spc registers.
-
-Wed Nov 29 12:39:27 1995 Jim Wilson <wilson@chestnut.cygnus.com>
-
- * gencode.c (tab): In shad/shld definitions, negate R[m] before
- the and operation instead of after. For shad delete cast. For shld
- use UR instead of R and delete cast.
-
-Fri Nov 17 12:48:55 1995 Jim Wilson <wilson@chestnut.cygnus.com>
-
- * gencode.c (tab): Add explicit NaN support for ftrc instruction.
-
-Wed Nov 15 11:25:27 1995 Stu Grossman (grossman@cygnus.com)
-
- * interp.c: Make target_byte_order be extern to prevent SGI cc from
- issuing warnings about the use of common symbols.
-
-Tue Nov 14 15:19:43 1995 Stu Grossman (grossman@cygnus.com)
-
- * gencode.c: jsr, bsr and bsrf actually save pc+4 in pr, and rts
- actually uses pr+0.
-
-Sat Oct 21 13:01:18 1995 Jim Wilson <wilson@chestnut.cygnus.com>
-
- * sh/interp.c (sim_stop_reason): Catch SIGQUIT and indicate
- program exited.
- (sim_get_quit_code): Delete.
-
- * gencode.c (gensim): Indicate SIGILL instead of calling abort for
- default case.
-
-Mon Oct 16 18:24:03 1995 Jim Wilson <wilson@chestnut.cygnus.com>
-
- * interp.c (saved_state_type): Move FP registers to immediately
- after SR.
-
-Tue Oct 10 11:12:15 1995 Fred Fish <fnf@cygnus.com>
-
- * Makefile.in (BISON): Remove macro.
-
-Fri Oct 6 12:08:18 1995 Jim Wilson <wilson@chestnut.cygnus.com>
-
- * interp.c (trap, case SYS_utime): Cast second arg of utime to
- void * to avoid compiler error.
-
- * interp.c (callback): Remove last change. It is initialized by
- a sim_set_callbacks call.
-
-Thu Oct 5 14:13:29 1995 steve chamberlain <sac@slash.cygnus.com>
-
- * interp.c (callback): Initialize to default callback.
-
-Thu Sep 28 15:26:59 1995 steve chamberlain <sac@slash.cygnus.com>
-
- * run.c: Moved to ../common.
- * interp.c (trap): Use gdb's callback interface.
- * Makefile.in: Updated.
-
-Wed Sep 20 13:35:13 1995 Ian Lance Taylor <ian@cygnus.com>
-
- * Makefile.in (maintainer-clean): New synonym for realclean.
-
-Wed Sep 20 09:51:50 1995 steve chamberlain <sac@slash.cygnus.com>
-
- * run.c (sim_callback_write_stdout): New.
- * interp.c (trap): Call sim_callback_write_stdout when needed.
-
-Mon Sep 18 18:42:27 1995 steve chamberlain <sac@slash.cygnus.com>
-
- * interp.c (trap): Remove useless code.
-
-Fri Sep 15 19:30:05 1995 steve chamberlain <sac@slash.cygnus.com>
-
- * syscall.h: Copy from newlib.
-
-Thu Sep 14 19:32:59 1995 Stu Grossman (grossman@cygnus.com)
-
- * gencode.c: Back up PC by 2 for breakpoints.
- * interp.c: Move fp regs beyond pc/pr/etc to avoid confusing GDB,
- which expect pc to immediatly follow regs[].
-
-Fri Sep 8 14:18:13 1995 Ian Lance Taylor <ian@cygnus.com>
-
- * configure.in: Define CC_FOR_BUILD. Don't call AC_PROG_INSTALL.
- * configure: Rebuild.
- * Makefile.in (INSTALL): Revert to using install.sh.
- (INSTALL_PROGRAM, INSTALL_DATA): Set to $(INSTALL).
- (INSTALL_XFORM, INSTALL_XFORM1): Restore.
- (CC_FOR_BUILD): Restore.
- (gencode): Build using $(CC_FOR_BUILD).
- (install): Don't install in $(tooldir).
-
-Thu Sep 7 15:02:31 1995 J.T. Conklin <jtc@rtl.cygnus.com>
-
- (Try to) Update to new bfd autoconf scheme.
- * run.c: Don't include sysdep.h.
- * Makefile.in (INSTALL{,_PROGRAM,_DATA}): Use autoconf computed value.
- (CC, CFLAGS, AR, RANLIB): Likewise.
- (HDEFINES, TDEFINES): Define.
- (CC_FOR_BUILD): Delete.
- (host_makefile_frag): Delete.
- (Makefile): Don't depend on frags.
- * configure.in (sysdep.h): Don't create symlink.
- (host_makefile_frag, frags): Deleted.
- (CC, CFLAGS, AR, RANLIB, INSTALL): Compute values.
- * configure: Regenerated.
-
-Thu Aug 31 12:39:07 1995 Jim Wilson <wilson@chestnut.cygnus.com>
-
- * interp.c: Include <math.h>.
-
-Wed Aug 30 22:05:17 1995 Jeff Law (law@snake.cs.utah.edu)
-
- * Makefile.in (run): Link in math library too.
- * gencode.c (gensim): abort if an unknown opcode is encountered.
- * interp.c (FPSCR, FPUL): Define.
- (struct save_state): Add fields for floating point registers,
- FPSCR and FPUL.
- (sim_resume): Add 'F' for accessing floating point registers
- in the save state structure.
- * gencode.c: Add sh3e opcodes.
- (gensym): Define a buffer for int<->fp conversions.
-
-Tue Aug 22 14:16:46 1995 J.T. Conklin <jtc@rtl.cygnus.com>
-
- * interp.c (trap): Use trap vector 34 for host system interface.
- * gencode.c: Add 34 to conditional which determines which traps
- will be handled by simulator.
-
-Fri Aug 11 17:59:15 1995 Jim Wilson <wilson@chestnut.cygnus.com>
-
- * run.c: Include <signal.h>. Define SIGQUIT if not defined.
- (main): New variables reason and sigrc. After simulator exits,
- check to see if it exited because of a signal, and if so, then
- use the signal number as the return value.
-
-Thu Aug 3 10:45:37 1995 Fred Fish <fnf@cygnus.com>
-
- * Update all FSF addresses except those in COPYING* files.
-
-Tue Jul 18 23:33:10 1995 Fred Fish <fnf@fishbowl>
-
- * interp.c (trap): Only use SYS_execv if defined. Might be
- implemented as execve(arg1,arg2,0), as with Unixware 2.0.
- (sim_resume): In sbit initializer, cast shifted arg to unsigned
- to avoid signed integer overflow.
-
-Wed Jul 5 14:32:54 1995 J.T. Conklin <jtc@rtl.cygnus.com>
-
- * Makefile.in (clean): Remove run, libsim.a.
- (distclean, mostlyclean, realclean): Remove Makefile and
- autoconf files.
-
- * sh.mt: Removed.
-
- * Makefile.in, configure.in: converted to autoconf.
- * configure: New file, generated with autconf 2.4.
-
-Fri Jun 30 16:51:38 1995 Stan Shebs <shebs@andros.cygnus.com>
-
- * interp.c (sim_open): If argument supplied, interpret as
- desired memory size.
- (parse_and_set_memory_size): New function.
- (sim_do_command): New function.
-
-Thu Jun 29 10:02:28 1995 Fred Fish <fnf@deneb.cygnus.com>
-
- * interp.c (SYS_wait): Define as SYS_wait4 if available and
- SYS_wait is not already defined (SunOS 4.1.3 for example).
- (SYS_utime): Define as SYS_utimes if available and
- SYS_utime is not already defined.
-
-Thu Jun 22 17:25:57 1995 Steve Chamberlain <sac@slash.cygnus.com>
-
- * interp.c: Don't include sys/times.h or sys/param.h
-
-Wed Jun 21 15:03:49 1995 Steve Chamberlain <sac@slash.cygnus.com>
-
- * interp.c (SIGBUS, SIGTERM): Define if not.
- (sim_memory_size): default to 2^19 on PCs.
- (sim_resume): Poll for quits on win32.
-
-Wed May 24 16:22:48 1995 Jim Wilson <wilson@chestnut.cygnus.com>
-
- * gencode.c (op_tab): Add SH3 support.
-
-Wed May 24 14:07:11 1995 Steve Chamberlain <sac@slash.cygnus.com>
-
- * gencode.c (tab): Add bsrf and braf.
-
-Mon Apr 24 15:09:49 1995 Jason Molenda (crash@cygnus.com)
-
- * configure.in: use ../../bfd/hosts/std-host.h, not
- ../bfd/hosts/std-host.h (which doesn't exist).
-
-Mon Mar 27 10:32:34 1995 J.T. Conklin <jtc@rtl.cygnus.com>
-
- * run.c: parse arguments with getopt().
-
-Sun Feb 26 15:27:24 1995 Steve Chamberlain <sac@cygnus.com>
-
- * configure.in: Use ../../bfd/hosts/std-host.h if specific
- host unavailable.
-
-Mon Jan 23 16:10:58 1995 Torbjorn Granlund <tege@rtl.cygnus.com>
-
- * interp.c (macw): Sign extend MACH at bit 10 for non-saturating case.
-
-Sun Jan 22 13:55:36 1995 Torbjorn Granlund <tege@rtl.cygnus.com>
-
- * gencode.c (op_tab): Make MAC.W call macw, not abort.
- * interp.c (macw): New function.
- (S): New #define.
-
-Sat Jan 21 15:52:30 1995 Torbjorn Granlund <tege@rtl.cygnus.com>
-
- * gencode.c (op_tab): New code for ADDV and SUBV.
- Make MAC.L abort sicne it is not implemented.
-
- * interp.c (dmul): Handle the signed case by adjusting after unsigned multiply.
- Get rid of __GNUC__ conditional.
-
-aThu Jan 19 05:50:50 1995 Torbjorn Granlund <tege@rtl.cygnus.com>
-
- * gencode.c (op_tab): Also replace NEGC, and try again with SUBC.
- Change ADDC for symmetry.
-
- * gencode.c (op_tab): Replace code for ADDC and SUBC.
-
-Mon Jan 9 15:43:53 1995 Stu Grossman (grossman@cygnus.com)
-
- * interp.c: Remove def of INLINE. This comes from bfd.h. Also,
- declare IOMEM before using it.
-
-Wed Dec 28 21:25:31 1994 Steve Chamberlain (sac@jonny.cygnus.com)
-
- * interp.c (BUSERROR): New macro.
- ([r|w][bwl]at[little|big]) New functions.
- (sim_resume): If GO32 check for interrupt every now
- and again. Decrement PC if SIGBUS seen.
- * run.c (main): Return result of simulated _exit.
-
-Mon Dec 5 21:59:51 1994 Doug Evans <dje@canuck.cygnus.com>
-
- * Makefile.in (gencode): Allow build in different directory.
-
-Wed Nov 30 17:47:13 1994 Jim Wilson <wilson@chestnut.cygnus.com>
-
- * Makefile.in (gencode): Change $< to gencode.c for portability.
-
-Wed Nov 23 21:31:55 1994 Steve Chamberlain (sac@jonny.cygnus.com)
-
- * interp.c ([wr][bwl]at): New functions.
- (trap): Cope with both byte modes.
-
-Thu Sep 8 17:35:07 1994 Steve Chamberlain (sac@jonny.cygnus.com)
-
- * gencode.c (tab): Simulate T bit after a negc insn right.
- * interp.c (RSBAT): Sign extend the arg.
- (ACE_FAST): New macro.
- (sim_resume): Remove obsolete test of sim_timeout.
-
-Fri Aug 5 14:12:31 1994 Steve Chamberlain (sac@jonny.cygnus.com)
-
- * interp.c (IOMEM): New function, simulates very basic I/O area of
- the SH.
- (WBAT, RBAT) : Call I/O functions.
- * gencode.c (tab): Special case trapa #3.
-
-Mon Jun 27 18:04:54 1994 Steve Chamberlain (sac@cirdan.cygnus.com)
-
- * run.c (main): Specify the file type again.
-
-Thu May 26 19:04:37 1994 Steve Chamberlain (sac@thepub.cygnus.com)
-
- * interp.c (trap): Fix irix incompatibility.
- * run.c (main): open without specifying file type.
-
-Wed May 18 14:18:53 1994 Doug Evans (dje@canuck.cygnus.com)
-
- * interp.c (sim_*): Make result void where there isn't one.
- (sim_set_pc): Delete.
- (sim_info): Delete printf_fn arg, all callers changed.
- Call printf_filtered instead.
- (sim_close): New function.
- (sim_load): New function.
- (sim_create_inferior): Renamed from sim_set_args, all callers changed.
- * run.c: #include <varargs.h>, "remote-sim.h".
- (printf_filtered): New function.
-
-Wed Apr 27 12:03:48 1994 Steve Chamberlain (sac@cygnus.com)
-
- * gencode.c (table): Get direction of some opcodes right.
- (trapa, rte): Implement fully.
- * interp.c (trap): Make stat call more portable.
-
-Fri Feb 11 21:59:38 1994 Steve Chamberlain (sac@sphagnum.cygnus.com)
-
- * gencode.c (main, gendefines): New -d option prints table of defines.
- * interp.c (trap): Add a load of system calls.
- (sim_memory_size): Now default to 8Mbyte.
- (PARANOID): Keep vector of registers with undefined contents.
-
-Mon Nov 15 14:37:18 1993 Steve Chamberlain (sac@jonny.cygnus.com)
-
- * gencode.c: mova uses aligned addresses
- * interp.c (trap): Return results in r0.
-
-Tue Oct 26 10:38:55 1993 Doug Evans (dje@canuck.cygnus.com)
-
- * Makefile.in (CSEARCH): Add -I$(srcdir)/../../gdb
- * interp.c: #include "remote-sim.h".
- (sim_resume): int result, new arg `siggnal'.
- (sim_write): Use SIM_ADDR for type of arg `addr'.
- (sim_read): Use SIM_ADDR for type of arg `addr'.
- Use unsigned char * for `buffer'.
- (sim_store_register): int result.
- (sim_fetch_register): Ditto.
- (sim_stop_reason): Renamed from sim_stop_signal. New arg `reason'.
- (sim_set_pc): int result, use SIM_ADDR for type of arg `x'.
- (sim_info): int result, new args `verbose', `printf_fn'.
- (sim_kill): int result.
- (sim_open): int result, new arg `name'.
- * run.c: #include <stdio.h>
- (main): Update call to sim_info.
-
-Sat Oct 23 15:09:29 1993 Doug Evans (dje@canuck.cygnus.com)
-
- * interp.c (sim_stop_signal): Result is now enum sim_stop.
-
-Fri Oct 8 10:47:09 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
-
- * gencode.c (table): Becomes unsigned.
- * interp.c (trap): Get right breakpoint SIGnum. (sim_write,
- sim_read): Return number of bytes copied. (sim_store_register):
- Value passed by reference. (sim_kill, sim_open, sim_set_args): New functions.
-
-Tue Sep 7 16:24:13 1993 Stan Shebs (shebs@rtl.cygnus.com)
-
- * interp.c (sim_info): Fix small typo in printf string.
-
-Thu Aug 5 11:37:48 1993 Stan Shebs (shebs@rtl.cygnus.com)
-
- * interp.c (sim_resume): Set memory after pointers inited.
-
-Mon Aug 2 14:13:22 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
-
- * interp.c (get_now): Use time system call.
- * Makefile.in: install correctly.
-
-Tue Jul 6 10:30:46 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
-
- * run.c (main), interp.c (sim_set_timeout): Remove timeout
- functionality.
-
-Thu Jun 24 13:29:57 1993 david d `zoo' zuhn (zoo at rtl.cygnus.com)
-
- * Makefile.in: don't run indent everytime; also add a space in the
- includes
-
-Thu Jun 17 18:30:42 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
-
- * gencode.c: Fix some opcodes.
- * interp.c: Support for profiling and portability fixes.
- * run.c (main): Get profiling args.
-
-Wed May 5 13:17:22 1993 Steve Chamberlain (sac@cygnus.com)
-
- * gencode.c (tab): Lint for sgi compiler
- * interp.c: Lint for sgi compiler.
-
-Mon May 3 15:25:33 1993 Steve Chamberlain (sac@thepub.cygnus.com)
-
- * run.c (main): Support for resizing simulated RAM.
- * Makefile.in: Support for broken makes.
- * interp.c, gencode.c: Lint.
-
-Mon Apr 26 18:01:10 1993 Steve Chamberlain (sac@thepub.cygnus.com)
-
- * created
-
diff --git a/sim/sh/Makefile.in b/sim/sh/Makefile.in
deleted file mode 100644
index 62aaeaf630c..00000000000
--- a/sim/sh/Makefile.in
+++ /dev/null
@@ -1,44 +0,0 @@
-# Makefile template for Configure for the SH sim library.
-# Copyright (C) 1990, 91, 92, 95, 96, 1997 Free Software Foundation, Inc.
-# Written by Cygnus Support.
-#
-# This program is free software; you can redistribute it and/or modify
-# it under the terms of the GNU General Public License as published by
-# the Free Software Foundation; either version 2 of the License, or
-# (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
-## COMMON_PRE_CONFIG_FRAG
-
-SIM_OBJS = interp.o table.o sim-load.o
-SIM_EXTRA_LIBS = -lm
-SIM_EXTRA_CLEAN = sh-clean
-
-## COMMON_POST_CONFIG_FRAG
-
-interp.o: interp.c code.c table.c ppi.c
-
-code.c: gencode
- ./gencode -x >code.c
-# indent code.c
-
-table.c: gencode
- ./gencode -s >table.c
-# indent table.c
-
-ppi.c: gencode
- ./gencode -p >ppi.c
-
-gencode: gencode.c
- $(CC_FOR_BUILD) -o gencode $(srcdir)/gencode.c
-
-sh-clean:
- rm -f gencode code.c table.c
diff --git a/sim/sh/acconfig.h b/sim/sh/acconfig.h
deleted file mode 100644
index f9b87a10c60..00000000000
--- a/sim/sh/acconfig.h
+++ /dev/null
@@ -1,15 +0,0 @@
-
-/* Define to 1 if NLS is requested. */
-#undef ENABLE_NLS
-
-/* Define as 1 if you have catgets and don't want to use GNU gettext. */
-#undef HAVE_CATGETS
-
-/* Define as 1 if you have gettext and don't want to use GNU gettext. */
-#undef HAVE_GETTEXT
-
-/* Define as 1 if you have the stpcpy function. */
-#undef HAVE_STPCPY
-
-/* Define if your locale.h file contains LC_MESSAGES. */
-#undef HAVE_LC_MESSAGES
diff --git a/sim/sh/config.in b/sim/sh/config.in
deleted file mode 100644
index 1f87a2bee4e..00000000000
--- a/sim/sh/config.in
+++ /dev/null
@@ -1,158 +0,0 @@
-/* config.in. Generated automatically from configure.in by autoheader. */
-
-/* Define if using alloca.c. */
-#undef C_ALLOCA
-
-/* Define to empty if the keyword does not work. */
-#undef const
-
-/* Define to one of _getb67, GETB67, getb67 for Cray-2 and Cray-YMP systems.
- This function is required for alloca.c support on those systems. */
-#undef CRAY_STACKSEG_END
-
-/* Define if you have alloca, as a function or macro. */
-#undef HAVE_ALLOCA
-
-/* Define if you have <alloca.h> and it should be used (not on Ultrix). */
-#undef HAVE_ALLOCA_H
-
-/* Define if you have a working `mmap' system call. */
-#undef HAVE_MMAP
-
-/* Define as __inline if that's what the C compiler calls it. */
-#undef inline
-
-/* Define to `long' if <sys/types.h> doesn't define. */
-#undef off_t
-
-/* Define if you need to in order for stat and other things to work. */
-#undef _POSIX_SOURCE
-
-/* Define as the return type of signal handlers (int or void). */
-#undef RETSIGTYPE
-
-/* Define to `unsigned' if <sys/types.h> doesn't define. */
-#undef size_t
-
-/* If using the C implementation of alloca, define if you know the
- direction of stack growth for your system; otherwise it will be
- automatically deduced at run-time.
- STACK_DIRECTION > 0 => grows toward higher addresses
- STACK_DIRECTION < 0 => grows toward lower addresses
- STACK_DIRECTION = 0 => direction of growth unknown
- */
-#undef STACK_DIRECTION
-
-/* Define if you have the ANSI C header files. */
-#undef STDC_HEADERS
-
-/* Define to 1 if NLS is requested. */
-#undef ENABLE_NLS
-
-/* Define as 1 if you have gettext and don't want to use GNU gettext. */
-#undef HAVE_GETTEXT
-
-/* Define as 1 if you have the stpcpy function. */
-#undef HAVE_STPCPY
-
-/* Define if your locale.h file contains LC_MESSAGES. */
-#undef HAVE_LC_MESSAGES
-
-/* Define if you have the __argz_count function. */
-#undef HAVE___ARGZ_COUNT
-
-/* Define if you have the __argz_next function. */
-#undef HAVE___ARGZ_NEXT
-
-/* Define if you have the __argz_stringify function. */
-#undef HAVE___ARGZ_STRINGIFY
-
-/* Define if you have the __setfpucw function. */
-#undef HAVE___SETFPUCW
-
-/* Define if you have the dcgettext function. */
-#undef HAVE_DCGETTEXT
-
-/* Define if you have the getcwd function. */
-#undef HAVE_GETCWD
-
-/* Define if you have the getpagesize function. */
-#undef HAVE_GETPAGESIZE
-
-/* Define if you have the getrusage function. */
-#undef HAVE_GETRUSAGE
-
-/* Define if you have the munmap function. */
-#undef HAVE_MUNMAP
-
-/* Define if you have the putenv function. */
-#undef HAVE_PUTENV
-
-/* Define if you have the setenv function. */
-#undef HAVE_SETENV
-
-/* Define if you have the setlocale function. */
-#undef HAVE_SETLOCALE
-
-/* Define if you have the sigaction function. */
-#undef HAVE_SIGACTION
-
-/* Define if you have the stpcpy function. */
-#undef HAVE_STPCPY
-
-/* Define if you have the strcasecmp function. */
-#undef HAVE_STRCASECMP
-
-/* Define if you have the strchr function. */
-#undef HAVE_STRCHR
-
-/* Define if you have the time function. */
-#undef HAVE_TIME
-
-/* Define if you have the <argz.h> header file. */
-#undef HAVE_ARGZ_H
-
-/* Define if you have the <fcntl.h> header file. */
-#undef HAVE_FCNTL_H
-
-/* Define if you have the <fpu_control.h> header file. */
-#undef HAVE_FPU_CONTROL_H
-
-/* Define if you have the <limits.h> header file. */
-#undef HAVE_LIMITS_H
-
-/* Define if you have the <locale.h> header file. */
-#undef HAVE_LOCALE_H
-
-/* Define if you have the <malloc.h> header file. */
-#undef HAVE_MALLOC_H
-
-/* Define if you have the <nl_types.h> header file. */
-#undef HAVE_NL_TYPES_H
-
-/* Define if you have the <stdlib.h> header file. */
-#undef HAVE_STDLIB_H
-
-/* Define if you have the <string.h> header file. */
-#undef HAVE_STRING_H
-
-/* Define if you have the <strings.h> header file. */
-#undef HAVE_STRINGS_H
-
-/* Define if you have the <sys/param.h> header file. */
-#undef HAVE_SYS_PARAM_H
-
-/* Define if you have the <sys/resource.h> header file. */
-#undef HAVE_SYS_RESOURCE_H
-
-/* Define if you have the <sys/time.h> header file. */
-#undef HAVE_SYS_TIME_H
-
-/* Define if you have the <time.h> header file. */
-#undef HAVE_TIME_H
-
-/* Define if you have the <unistd.h> header file. */
-#undef HAVE_UNISTD_H
-
-/* Define if you have the <values.h> header file. */
-#undef HAVE_VALUES_H
diff --git a/sim/sh/configure b/sim/sh/configure
deleted file mode 100755
index 2720d6b5d38..00000000000
--- a/sim/sh/configure
+++ /dev/null
@@ -1,4024 +0,0 @@
-#! /bin/sh
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-sim_inline="-DDEFAULT_INLINE=0"
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-# This file is derived from `gettext.m4'. The difference is that the
-# included macros assume Cygnus-style source and build trees.
-
-# Macro to add for using GNU gettext.
-# Ulrich Drepper <drepper@cygnus.com>, 1995.
-#
-# This file file be copied and used freely without restrictions. It can
-# be used in projects which are not available under the GNU Public License
-# but which still want to provide support for the GNU gettext functionality.
-# Please note that the actual code is *not* freely available.
-
-# serial 3
-
-
-
-
-
-# Search path for a program which passes the given test.
-# Ulrich Drepper <drepper@cygnus.com>, 1996.
-#
-# This file file be copied and used freely without restrictions. It can
-# be used in projects which are not available under the GNU Public License
-# but which still want to provide support for the GNU gettext functionality.
-# Please note that the actual code is *not* freely available.
-
-# serial 1
-
-
-
-# Check whether LC_MESSAGES is available in <locale.h>.
-# Ulrich Drepper <drepper@cygnus.com>, 1995.
-#
-# This file file be copied and used freely without restrictions. It can
-# be used in projects which are not available under the GNU Public License
-# but which still want to provide support for the GNU gettext functionality.
-# Please note that the actual code is *not* freely available.
-
-# serial 1
-
-
-
-
-
-
-# Guess values for system-dependent variables and create Makefiles.
-# Generated automatically using autoconf version 2.13
-# Copyright (C) 1992, 93, 94, 95, 96 Free Software Foundation, Inc.
-#
-# This configure script is free software; the Free Software Foundation
-# gives unlimited permission to copy, distribute and modify it.
-
-# Defaults:
-ac_help=
-ac_default_prefix=/usr/local
-# Any additions from configure.in:
-ac_help="$ac_help
- --disable-nls do not use Native Language Support"
-ac_help="$ac_help
- --with-included-gettext use the GNU gettext library included here"
-ac_help="$ac_help
- --enable-maintainer-mode Enable developer functionality."
-ac_help="$ac_help
- --enable-sim-bswap Use Host specific BSWAP instruction."
-ac_help="$ac_help
- --enable-sim-cflags=opts Extra CFLAGS for use in building simulator"
-ac_help="$ac_help
- --enable-sim-debug=opts Enable debugging flags"
-ac_help="$ac_help
- --enable-sim-stdio Specify whether to use stdio for console input/output."
-ac_help="$ac_help
- --enable-sim-trace=opts Enable tracing flags"
-ac_help="$ac_help
- --enable-sim-profile=opts Enable profiling flags"
-
-# Initialize some variables set by options.
-# The variables have the same names as the options, with
-# dashes changed to underlines.
-build=NONE
-cache_file=./config.cache
-exec_prefix=NONE
-host=NONE
-no_create=
-nonopt=NONE
-no_recursion=
-prefix=NONE
-program_prefix=NONE
-program_suffix=NONE
-program_transform_name=s,x,x,
-silent=
-site=
-sitefile=
-srcdir=
-target=NONE
-verbose=
-x_includes=NONE
-x_libraries=NONE
-bindir='${exec_prefix}/bin'
-sbindir='${exec_prefix}/sbin'
-libexecdir='${exec_prefix}/libexec'
-datadir='${prefix}/share'
-sysconfdir='${prefix}/etc'
-sharedstatedir='${prefix}/com'
-localstatedir='${prefix}/var'
-libdir='${exec_prefix}/lib'
-includedir='${prefix}/include'
-oldincludedir='/usr/include'
-infodir='${prefix}/info'
-mandir='${prefix}/man'
-
-# Initialize some other variables.
-subdirs=
-MFLAGS= MAKEFLAGS=
-SHELL=${CONFIG_SHELL-/bin/sh}
-# Maximum number of lines to put in a shell here document.
-ac_max_here_lines=12
-
-ac_prev=
-for ac_option
-do
-
- # If the previous option needs an argument, assign it.
- if test -n "$ac_prev"; then
- eval "$ac_prev=\$ac_option"
- ac_prev=
- continue
- fi
-
- case "$ac_option" in
- -*=*) ac_optarg=`echo "$ac_option" | sed 's/[-_a-zA-Z0-9]*=//'` ;;
- *) ac_optarg= ;;
- esac
-
- # Accept the important Cygnus configure options, so we can diagnose typos.
-
- case "$ac_option" in
-
- -bindir | --bindir | --bindi | --bind | --bin | --bi)
- ac_prev=bindir ;;
- -bindir=* | --bindir=* | --bindi=* | --bind=* | --bin=* | --bi=*)
- bindir="$ac_optarg" ;;
-
- -build | --build | --buil | --bui | --bu)
- ac_prev=build ;;
- -build=* | --build=* | --buil=* | --bui=* | --bu=*)
- build="$ac_optarg" ;;
-
- -cache-file | --cache-file | --cache-fil | --cache-fi \
- | --cache-f | --cache- | --cache | --cach | --cac | --ca | --c)
- ac_prev=cache_file ;;
- -cache-file=* | --cache-file=* | --cache-fil=* | --cache-fi=* \
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- cache_file="$ac_optarg" ;;
-
- -datadir | --datadir | --datadi | --datad | --data | --dat | --da)
- ac_prev=datadir ;;
- -datadir=* | --datadir=* | --datadi=* | --datad=* | --data=* | --dat=* \
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- datadir="$ac_optarg" ;;
-
- -disable-* | --disable-*)
- ac_feature=`echo $ac_option|sed -e 's/-*disable-//'`
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- ac_feature=`echo $ac_feature| sed 's/-/_/g'`
- eval "enable_${ac_feature}=no" ;;
-
- -enable-* | --enable-*)
- ac_feature=`echo $ac_option|sed -e 's/-*enable-//' -e 's/=.*//'`
- # Reject names that are not valid shell variable names.
- if test -n "`echo $ac_feature| sed 's/[-_a-zA-Z0-9]//g'`"; then
- { echo "configure: error: $ac_feature: invalid feature name" 1>&2; exit 1; }
- fi
- ac_feature=`echo $ac_feature| sed 's/-/_/g'`
- case "$ac_option" in
- *=*) ;;
- *) ac_optarg=yes ;;
- esac
- eval "enable_${ac_feature}='$ac_optarg'" ;;
-
- -exec-prefix | --exec_prefix | --exec-prefix | --exec-prefi \
- | --exec-pref | --exec-pre | --exec-pr | --exec-p | --exec- \
- | --exec | --exe | --ex)
- ac_prev=exec_prefix ;;
- -exec-prefix=* | --exec_prefix=* | --exec-prefix=* | --exec-prefi=* \
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- | --exec=* | --exe=* | --ex=*)
- exec_prefix="$ac_optarg" ;;
-
- -gas | --gas | --ga | --g)
- # Obsolete; use --with-gas.
- with_gas=yes ;;
-
- -help | --help | --hel | --he)
- # Omit some internal or obsolete options to make the list less imposing.
- # This message is too long to be a string in the A/UX 3.1 sh.
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- --help print this message
- --no-create do not create output files
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- --version print the version of autoconf that created configure
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- [PREFIX/share]
- --sysconfdir=DIR read-only single-machine data in DIR [PREFIX/etc]
- --sharedstatedir=DIR modifiable architecture-independent data in DIR
- [PREFIX/com]
- --localstatedir=DIR modifiable single-machine data in DIR [PREFIX/var]
- --libdir=DIR object code libraries in DIR [EPREFIX/lib]
- --includedir=DIR C header files in DIR [PREFIX/include]
- --oldincludedir=DIR C header files for non-gcc in DIR [/usr/include]
- --infodir=DIR info documentation in DIR [PREFIX/info]
- --mandir=DIR man documentation in DIR [PREFIX/man]
- --srcdir=DIR find the sources in DIR [configure dir or ..]
- --program-prefix=PREFIX prepend PREFIX to installed program names
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- --program-transform-name=PROGRAM
- run sed PROGRAM on installed program names
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- cat << EOF
-Host type:
- --build=BUILD configure for building on BUILD [BUILD=HOST]
- --host=HOST configure for HOST [guessed]
- --target=TARGET configure for TARGET [TARGET=HOST]
-Features and packages:
- --disable-FEATURE do not include FEATURE (same as --enable-FEATURE=no)
- --enable-FEATURE[=ARG] include FEATURE [ARG=yes]
- --with-PACKAGE[=ARG] use PACKAGE [ARG=yes]
- --without-PACKAGE do not use PACKAGE (same as --with-PACKAGE=no)
- --x-includes=DIR X include files are in DIR
- --x-libraries=DIR X library files are in DIR
-EOF
- if test -n "$ac_help"; then
- echo "--enable and --with options recognized:$ac_help"
- fi
- exit 0 ;;
-
- -host | --host | --hos | --ho)
- ac_prev=host ;;
- -host=* | --host=* | --hos=* | --ho=*)
- host="$ac_optarg" ;;
-
- -includedir | --includedir | --includedi | --included | --include \
- | --includ | --inclu | --incl | --inc)
- ac_prev=includedir ;;
- -includedir=* | --includedir=* | --includedi=* | --included=* | --include=* \
- | --includ=* | --inclu=* | --incl=* | --inc=*)
- includedir="$ac_optarg" ;;
-
- -infodir | --infodir | --infodi | --infod | --info | --inf)
- ac_prev=infodir ;;
- -infodir=* | --infodir=* | --infodi=* | --infod=* | --info=* | --inf=*)
- infodir="$ac_optarg" ;;
-
- -libdir | --libdir | --libdi | --libd)
- ac_prev=libdir ;;
- -libdir=* | --libdir=* | --libdi=* | --libd=*)
- libdir="$ac_optarg" ;;
-
- -libexecdir | --libexecdir | --libexecdi | --libexecd | --libexec \
- | --libexe | --libex | --libe)
- ac_prev=libexecdir ;;
- -libexecdir=* | --libexecdir=* | --libexecdi=* | --libexecd=* | --libexec=* \
- | --libexe=* | --libex=* | --libe=*)
- libexecdir="$ac_optarg" ;;
-
- -localstatedir | --localstatedir | --localstatedi | --localstated \
- | --localstate | --localstat | --localsta | --localst \
- | --locals | --local | --loca | --loc | --lo)
- ac_prev=localstatedir ;;
- -localstatedir=* | --localstatedir=* | --localstatedi=* | --localstated=* \
- | --localstate=* | --localstat=* | --localsta=* | --localst=* \
- | --locals=* | --local=* | --loca=* | --loc=* | --lo=*)
- localstatedir="$ac_optarg" ;;
-
- -mandir | --mandir | --mandi | --mand | --man | --ma | --m)
- ac_prev=mandir ;;
- -mandir=* | --mandir=* | --mandi=* | --mand=* | --man=* | --ma=* | --m=*)
- mandir="$ac_optarg" ;;
-
- -nfp | --nfp | --nf)
- # Obsolete; use --without-fp.
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-
- -no-create | --no-create | --no-creat | --no-crea | --no-cre \
- | --no-cr | --no-c)
- no_create=yes ;;
-
- -no-recursion | --no-recursion | --no-recursio | --no-recursi \
- | --no-recurs | --no-recur | --no-recu | --no-rec | --no-re | --no-r)
- no_recursion=yes ;;
-
- -oldincludedir | --oldincludedir | --oldincludedi | --oldincluded \
- | --oldinclude | --oldinclud | --oldinclu | --oldincl | --oldinc \
- | --oldin | --oldi | --old | --ol | --o)
- ac_prev=oldincludedir ;;
- -oldincludedir=* | --oldincludedir=* | --oldincludedi=* | --oldincluded=* \
- | --oldinclude=* | --oldinclud=* | --oldinclu=* | --oldincl=* | --oldinc=* \
- | --oldin=* | --oldi=* | --old=* | --ol=* | --o=*)
- oldincludedir="$ac_optarg" ;;
-
- -prefix | --prefix | --prefi | --pref | --pre | --pr | --p)
- ac_prev=prefix ;;
- -prefix=* | --prefix=* | --prefi=* | --pref=* | --pre=* | --pr=* | --p=*)
- prefix="$ac_optarg" ;;
-
- -program-prefix | --program-prefix | --program-prefi | --program-pref \
- | --program-pre | --program-pr | --program-p)
- ac_prev=program_prefix ;;
- -program-prefix=* | --program-prefix=* | --program-prefi=* \
- | --program-pref=* | --program-pre=* | --program-pr=* | --program-p=*)
- program_prefix="$ac_optarg" ;;
-
- -program-suffix | --program-suffix | --program-suffi | --program-suff \
- | --program-suf | --program-su | --program-s)
- ac_prev=program_suffix ;;
- -program-suffix=* | --program-suffix=* | --program-suffi=* \
- | --program-suff=* | --program-suf=* | --program-su=* | --program-s=*)
- program_suffix="$ac_optarg" ;;
-
- -program-transform-name | --program-transform-name \
- | --program-transform-nam | --program-transform-na \
- | --program-transform-n | --program-transform- \
- | --program-transform | --program-transfor \
- | --program-transfo | --program-transf \
- | --program-trans | --program-tran \
- | --progr-tra | --program-tr | --program-t)
- ac_prev=program_transform_name ;;
- -program-transform-name=* | --program-transform-name=* \
- | --program-transform-nam=* | --program-transform-na=* \
- | --program-transform-n=* | --program-transform-=* \
- | --program-transform=* | --program-transfor=* \
- | --program-transfo=* | --program-transf=* \
- | --program-trans=* | --program-tran=* \
- | --progr-tra=* | --program-tr=* | --program-t=*)
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-
- -q | -quiet | --quiet | --quie | --qui | --qu | --q \
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-
- -sbindir | --sbindir | --sbindi | --sbind | --sbin | --sbi | --sb)
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- -sbindir=* | --sbindir=* | --sbindi=* | --sbind=* | --sbin=* \
- | --sbi=* | --sb=*)
- sbindir="$ac_optarg" ;;
-
- -sharedstatedir | --sharedstatedir | --sharedstatedi \
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- ac_prev=sharedstatedir ;;
- -sharedstatedir=* | --sharedstatedir=* | --sharedstatedi=* \
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- sharedstatedir="$ac_optarg" ;;
-
- -site | --site | --sit)
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- -site=* | --site=* | --sit=*)
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-
- -site-file | --site-file | --site-fil | --site-fi | --site-f)
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- -site-file=* | --site-file=* | --site-fil=* | --site-fi=* | --site-f=*)
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-
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-
- -sysconfdir | --sysconfdir | --sysconfdi | --sysconfd | --sysconf \
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- -sysconfdir=* | --sysconfdir=* | --sysconfdi=* | --sysconfd=* | --sysconf=* \
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-
- -target | --target | --targe | --targ | --tar | --ta | --t)
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-
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-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- ac_cv_header_alloca_h=no
-fi
-rm -f conftest*
-fi
-
-echo "$ac_t""$ac_cv_header_alloca_h" 1>&6
-if test $ac_cv_header_alloca_h = yes; then
- cat >> confdefs.h <<\EOF
-#define HAVE_ALLOCA_H 1
-EOF
-
-fi
-
-echo $ac_n "checking for alloca""... $ac_c" 1>&6
-echo "configure:1127: checking for alloca" >&5
-if eval "test \"`echo '$''{'ac_cv_func_alloca_works'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1132 "configure"
-#include "confdefs.h"
-
-#ifdef __GNUC__
-# define alloca __builtin_alloca
-#else
-# ifdef _MSC_VER
-# include <malloc.h>
-# define alloca _alloca
-# else
-# if HAVE_ALLOCA_H
-# include <alloca.h>
-# else
-# ifdef _AIX
- #pragma alloca
-# else
-# ifndef alloca /* predefined by HP cc +Olibcalls */
-char *alloca ();
-# endif
-# endif
-# endif
-# endif
-#endif
-
-int main() {
-char *p = (char *) alloca(1);
-; return 0; }
-EOF
-if { (eval echo configure:1160: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- rm -rf conftest*
- ac_cv_func_alloca_works=yes
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- ac_cv_func_alloca_works=no
-fi
-rm -f conftest*
-fi
-
-echo "$ac_t""$ac_cv_func_alloca_works" 1>&6
-if test $ac_cv_func_alloca_works = yes; then
- cat >> confdefs.h <<\EOF
-#define HAVE_ALLOCA 1
-EOF
-
-fi
-
-if test $ac_cv_func_alloca_works = no; then
- # The SVR3 libPW and SVR4 libucb both contain incompatible functions
- # that cause trouble. Some versions do not even contain alloca or
- # contain a buggy version. If you still want to use their alloca,
- # use ar to extract alloca.o from them instead of compiling alloca.c.
- ALLOCA=alloca.${ac_objext}
- cat >> confdefs.h <<\EOF
-#define C_ALLOCA 1
-EOF
-
-
-echo $ac_n "checking whether alloca needs Cray hooks""... $ac_c" 1>&6
-echo "configure:1192: checking whether alloca needs Cray hooks" >&5
-if eval "test \"`echo '$''{'ac_cv_os_cray'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1197 "configure"
-#include "confdefs.h"
-#if defined(CRAY) && ! defined(CRAY2)
-webecray
-#else
-wenotbecray
-#endif
-
-EOF
-if (eval "$ac_cpp conftest.$ac_ext") 2>&5 |
- egrep "webecray" >/dev/null 2>&1; then
- rm -rf conftest*
- ac_cv_os_cray=yes
-else
- rm -rf conftest*
- ac_cv_os_cray=no
-fi
-rm -f conftest*
-
-fi
-
-echo "$ac_t""$ac_cv_os_cray" 1>&6
-if test $ac_cv_os_cray = yes; then
-for ac_func in _getb67 GETB67 getb67; do
- echo $ac_n "checking for $ac_func""... $ac_c" 1>&6
-echo "configure:1222: checking for $ac_func" >&5
-if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1227 "configure"
-#include "confdefs.h"
-/* System header to define __stub macros and hopefully few prototypes,
- which can conflict with char $ac_func(); below. */
-#include <assert.h>
-/* Override any gcc2 internal prototype to avoid an error. */
-/* We use char because int might match the return type of a gcc2
- builtin and then its argument prototype would still apply. */
-char $ac_func();
-
-int main() {
-
-/* The GNU C library defines this for functions which it implements
- to always fail with ENOSYS. Some functions are actually named
- something starting with __ and the normal name is an alias. */
-#if defined (__stub_$ac_func) || defined (__stub___$ac_func)
-choke me
-#else
-$ac_func();
-#endif
-
-; return 0; }
-EOF
-if { (eval echo configure:1250: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=yes"
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=no"
-fi
-rm -f conftest*
-fi
-
-if eval "test \"`echo '$ac_cv_func_'$ac_func`\" = yes"; then
- echo "$ac_t""yes" 1>&6
- cat >> confdefs.h <<EOF
-#define CRAY_STACKSEG_END $ac_func
-EOF
-
- break
-else
- echo "$ac_t""no" 1>&6
-fi
-
-done
-fi
-
-echo $ac_n "checking stack direction for C alloca""... $ac_c" 1>&6
-echo "configure:1277: checking stack direction for C alloca" >&5
-if eval "test \"`echo '$''{'ac_cv_c_stack_direction'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- if test "$cross_compiling" = yes; then
- ac_cv_c_stack_direction=0
-else
- cat > conftest.$ac_ext <<EOF
-#line 1285 "configure"
-#include "confdefs.h"
-find_stack_direction ()
-{
- static char *addr = 0;
- auto char dummy;
- if (addr == 0)
- {
- addr = &dummy;
- return find_stack_direction ();
- }
- else
- return (&dummy > addr) ? 1 : -1;
-}
-main ()
-{
- exit (find_stack_direction() < 0);
-}
-EOF
-if { (eval echo configure:1304: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null
-then
- ac_cv_c_stack_direction=1
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -fr conftest*
- ac_cv_c_stack_direction=-1
-fi
-rm -fr conftest*
-fi
-
-fi
-
-echo "$ac_t""$ac_cv_c_stack_direction" 1>&6
-cat >> confdefs.h <<EOF
-#define STACK_DIRECTION $ac_cv_c_stack_direction
-EOF
-
-fi
-
-for ac_hdr in unistd.h
-do
-ac_safe=`echo "$ac_hdr" | sed 'y%./+-%__p_%'`
-echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6
-echo "configure:1329: checking for $ac_hdr" >&5
-if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1334 "configure"
-#include "confdefs.h"
-#include <$ac_hdr>
-EOF
-ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:1339: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
-ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
-if test -z "$ac_err"; then
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=yes"
-else
- echo "$ac_err" >&5
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=no"
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-rm -f conftest*
-fi
-if eval "test \"`echo '$ac_cv_header_'$ac_safe`\" = yes"; then
- echo "$ac_t""yes" 1>&6
- ac_tr_hdr=HAVE_`echo $ac_hdr | sed 'y%abcdefghijklmnopqrstuvwxyz./-%ABCDEFGHIJKLMNOPQRSTUVWXYZ___%'`
- cat >> confdefs.h <<EOF
-#define $ac_tr_hdr 1
-EOF
-
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- echo "$ac_t""no" 1>&6
-fi
-done
-
-for ac_func in getpagesize
-do
-echo $ac_n "checking for $ac_func""... $ac_c" 1>&6
-echo "configure:1368: checking for $ac_func" >&5
-if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1373 "configure"
-#include "confdefs.h"
-/* System header to define __stub macros and hopefully few prototypes,
- which can conflict with char $ac_func(); below. */
-#include <assert.h>
-/* Override any gcc2 internal prototype to avoid an error. */
-/* We use char because int might match the return type of a gcc2
- builtin and then its argument prototype would still apply. */
-char $ac_func();
-
-int main() {
-
-/* The GNU C library defines this for functions which it implements
- to always fail with ENOSYS. Some functions are actually named
- something starting with __ and the normal name is an alias. */
-#if defined (__stub_$ac_func) || defined (__stub___$ac_func)
-choke me
-#else
-$ac_func();
-#endif
-
-; return 0; }
-EOF
-if { (eval echo configure:1396: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=yes"
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=no"
-fi
-rm -f conftest*
-fi
-
-if eval "test \"`echo '$ac_cv_func_'$ac_func`\" = yes"; then
- echo "$ac_t""yes" 1>&6
- ac_tr_func=HAVE_`echo $ac_func | tr 'abcdefghijklmnopqrstuvwxyz' 'ABCDEFGHIJKLMNOPQRSTUVWXYZ'`
- cat >> confdefs.h <<EOF
-#define $ac_tr_func 1
-EOF
-
-else
- echo "$ac_t""no" 1>&6
-fi
-done
-
-echo $ac_n "checking for working mmap""... $ac_c" 1>&6
-echo "configure:1421: checking for working mmap" >&5
-if eval "test \"`echo '$''{'ac_cv_func_mmap_fixed_mapped'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- if test "$cross_compiling" = yes; then
- ac_cv_func_mmap_fixed_mapped=no
-else
- cat > conftest.$ac_ext <<EOF
-#line 1429 "configure"
-#include "confdefs.h"
-
-/* Thanks to Mike Haertel and Jim Avera for this test.
- Here is a matrix of mmap possibilities:
- mmap private not fixed
- mmap private fixed at somewhere currently unmapped
- mmap private fixed at somewhere already mapped
- mmap shared not fixed
- mmap shared fixed at somewhere currently unmapped
- mmap shared fixed at somewhere already mapped
- For private mappings, we should verify that changes cannot be read()
- back from the file, nor mmap's back from the file at a different
- address. (There have been systems where private was not correctly
- implemented like the infamous i386 svr4.0, and systems where the
- VM page cache was not coherent with the filesystem buffer cache
- like early versions of FreeBSD and possibly contemporary NetBSD.)
- For shared mappings, we should conversely verify that changes get
- propogated back to all the places they're supposed to be.
-
- Grep wants private fixed already mapped.
- The main things grep needs to know about mmap are:
- * does it exist and is it safe to write into the mmap'd area
- * how to use it (BSD variants) */
-#include <sys/types.h>
-#include <fcntl.h>
-#include <sys/mman.h>
-
-/* This mess was copied from the GNU getpagesize.h. */
-#ifndef HAVE_GETPAGESIZE
-# ifdef HAVE_UNISTD_H
-# include <unistd.h>
-# endif
-
-/* Assume that all systems that can run configure have sys/param.h. */
-# ifndef HAVE_SYS_PARAM_H
-# define HAVE_SYS_PARAM_H 1
-# endif
-
-# ifdef _SC_PAGESIZE
-# define getpagesize() sysconf(_SC_PAGESIZE)
-# else /* no _SC_PAGESIZE */
-# ifdef HAVE_SYS_PARAM_H
-# include <sys/param.h>
-# ifdef EXEC_PAGESIZE
-# define getpagesize() EXEC_PAGESIZE
-# else /* no EXEC_PAGESIZE */
-# ifdef NBPG
-# define getpagesize() NBPG * CLSIZE
-# ifndef CLSIZE
-# define CLSIZE 1
-# endif /* no CLSIZE */
-# else /* no NBPG */
-# ifdef NBPC
-# define getpagesize() NBPC
-# else /* no NBPC */
-# ifdef PAGESIZE
-# define getpagesize() PAGESIZE
-# endif /* PAGESIZE */
-# endif /* no NBPC */
-# endif /* no NBPG */
-# endif /* no EXEC_PAGESIZE */
-# else /* no HAVE_SYS_PARAM_H */
-# define getpagesize() 8192 /* punt totally */
-# endif /* no HAVE_SYS_PARAM_H */
-# endif /* no _SC_PAGESIZE */
-
-#endif /* no HAVE_GETPAGESIZE */
-
-#ifdef __cplusplus
-extern "C" { void *malloc(unsigned); }
-#else
-char *malloc();
-#endif
-
-int
-main()
-{
- char *data, *data2, *data3;
- int i, pagesize;
- int fd;
-
- pagesize = getpagesize();
-
- /*
- * First, make a file with some known garbage in it.
- */
- data = malloc(pagesize);
- if (!data)
- exit(1);
- for (i = 0; i < pagesize; ++i)
- *(data + i) = rand();
- umask(0);
- fd = creat("conftestmmap", 0600);
- if (fd < 0)
- exit(1);
- if (write(fd, data, pagesize) != pagesize)
- exit(1);
- close(fd);
-
- /*
- * Next, try to mmap the file at a fixed address which
- * already has something else allocated at it. If we can,
- * also make sure that we see the same garbage.
- */
- fd = open("conftestmmap", O_RDWR);
- if (fd < 0)
- exit(1);
- data2 = malloc(2 * pagesize);
- if (!data2)
- exit(1);
- data2 += (pagesize - ((int) data2 & (pagesize - 1))) & (pagesize - 1);
- if (data2 != mmap(data2, pagesize, PROT_READ | PROT_WRITE,
- MAP_PRIVATE | MAP_FIXED, fd, 0L))
- exit(1);
- for (i = 0; i < pagesize; ++i)
- if (*(data + i) != *(data2 + i))
- exit(1);
-
- /*
- * Finally, make sure that changes to the mapped area
- * do not percolate back to the file as seen by read().
- * (This is a bug on some variants of i386 svr4.0.)
- */
- for (i = 0; i < pagesize; ++i)
- *(data2 + i) = *(data2 + i) + 1;
- data3 = malloc(pagesize);
- if (!data3)
- exit(1);
- if (read(fd, data3, pagesize) != pagesize)
- exit(1);
- for (i = 0; i < pagesize; ++i)
- if (*(data + i) != *(data3 + i))
- exit(1);
- close(fd);
- unlink("conftestmmap");
- exit(0);
-}
-
-EOF
-if { (eval echo configure:1569: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null
-then
- ac_cv_func_mmap_fixed_mapped=yes
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -fr conftest*
- ac_cv_func_mmap_fixed_mapped=no
-fi
-rm -fr conftest*
-fi
-
-fi
-
-echo "$ac_t""$ac_cv_func_mmap_fixed_mapped" 1>&6
-if test $ac_cv_func_mmap_fixed_mapped = yes; then
- cat >> confdefs.h <<\EOF
-#define HAVE_MMAP 1
-EOF
-
-fi
-
-echo $ac_n "checking for Cygwin environment""... $ac_c" 1>&6
-echo "configure:1592: checking for Cygwin environment" >&5
-if eval "test \"`echo '$''{'ac_cv_cygwin'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1597 "configure"
-#include "confdefs.h"
-
-int main() {
-
-#ifndef __CYGWIN__
-#define __CYGWIN__ __CYGWIN32__
-#endif
-return __CYGWIN__;
-; return 0; }
-EOF
-if { (eval echo configure:1608: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
- rm -rf conftest*
- ac_cv_cygwin=yes
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- ac_cv_cygwin=no
-fi
-rm -f conftest*
-rm -f conftest*
-fi
-
-echo "$ac_t""$ac_cv_cygwin" 1>&6
-CYGWIN=
-test "$ac_cv_cygwin" = yes && CYGWIN=yes
-echo $ac_n "checking for mingw32 environment""... $ac_c" 1>&6
-echo "configure:1625: checking for mingw32 environment" >&5
-if eval "test \"`echo '$''{'ac_cv_mingw32'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1630 "configure"
-#include "confdefs.h"
-
-int main() {
-return __MINGW32__;
-; return 0; }
-EOF
-if { (eval echo configure:1637: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
- rm -rf conftest*
- ac_cv_mingw32=yes
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- ac_cv_mingw32=no
-fi
-rm -f conftest*
-rm -f conftest*
-fi
-
-echo "$ac_t""$ac_cv_mingw32" 1>&6
-MINGW32=
-test "$ac_cv_mingw32" = yes && MINGW32=yes
-
-# autoconf.info says this should be called right after AC_INIT.
-
-
-ac_aux_dir=
-for ac_dir in `cd $srcdir;pwd`/../.. $srcdir/`cd $srcdir;pwd`/../..; do
- if test -f $ac_dir/install-sh; then
- ac_aux_dir=$ac_dir
- ac_install_sh="$ac_aux_dir/install-sh -c"
- break
- elif test -f $ac_dir/install.sh; then
- ac_aux_dir=$ac_dir
- ac_install_sh="$ac_aux_dir/install.sh -c"
- break
- fi
-done
-if test -z "$ac_aux_dir"; then
- { echo "configure: error: can not find install-sh or install.sh in `cd $srcdir;pwd`/../.. $srcdir/`cd $srcdir;pwd`/../.." 1>&2; exit 1; }
-fi
-ac_config_guess=$ac_aux_dir/config.guess
-ac_config_sub=$ac_aux_dir/config.sub
-ac_configure=$ac_aux_dir/configure # This should be Cygnus configure.
-
-
-# Do some error checking and defaulting for the host and target type.
-# The inputs are:
-# configure --host=HOST --target=TARGET --build=BUILD NONOPT
-#
-# The rules are:
-# 1. You are not allowed to specify --host, --target, and nonopt at the
-# same time.
-# 2. Host defaults to nonopt.
-# 3. If nonopt is not specified, then host defaults to the current host,
-# as determined by config.guess.
-# 4. Target and build default to nonopt.
-# 5. If nonopt is not specified, then target and build default to host.
-
-# The aliases save the names the user supplied, while $host etc.
-# will get canonicalized.
-case $host---$target---$nonopt in
-NONE---*---* | *---NONE---* | *---*---NONE) ;;
-*) { echo "configure: error: can only configure for one host and one target at a time" 1>&2; exit 1; } ;;
-esac
-
-
-# Make sure we can run config.sub.
-if ${CONFIG_SHELL-/bin/sh} $ac_config_sub sun4 >/dev/null 2>&1; then :
-else { echo "configure: error: can not run $ac_config_sub" 1>&2; exit 1; }
-fi
-
-echo $ac_n "checking host system type""... $ac_c" 1>&6
-echo "configure:1704: checking host system type" >&5
-
-host_alias=$host
-case "$host_alias" in
-NONE)
- case $nonopt in
- NONE)
- if host_alias=`${CONFIG_SHELL-/bin/sh} $ac_config_guess`; then :
- else { echo "configure: error: can not guess host type; you must specify one" 1>&2; exit 1; }
- fi ;;
- *) host_alias=$nonopt ;;
- esac ;;
-esac
-
-host=`${CONFIG_SHELL-/bin/sh} $ac_config_sub $host_alias`
-host_cpu=`echo $host | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\1/'`
-host_vendor=`echo $host | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\2/'`
-host_os=`echo $host | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\3/'`
-echo "$ac_t""$host" 1>&6
-
-echo $ac_n "checking target system type""... $ac_c" 1>&6
-echo "configure:1725: checking target system type" >&5
-
-target_alias=$target
-case "$target_alias" in
-NONE)
- case $nonopt in
- NONE) target_alias=$host_alias ;;
- *) target_alias=$nonopt ;;
- esac ;;
-esac
-
-target=`${CONFIG_SHELL-/bin/sh} $ac_config_sub $target_alias`
-target_cpu=`echo $target | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\1/'`
-target_vendor=`echo $target | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\2/'`
-target_os=`echo $target | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\3/'`
-echo "$ac_t""$target" 1>&6
-
-echo $ac_n "checking build system type""... $ac_c" 1>&6
-echo "configure:1743: checking build system type" >&5
-
-build_alias=$build
-case "$build_alias" in
-NONE)
- case $nonopt in
- NONE) build_alias=$host_alias ;;
- *) build_alias=$nonopt ;;
- esac ;;
-esac
-
-build=`${CONFIG_SHELL-/bin/sh} $ac_config_sub $build_alias`
-build_cpu=`echo $build | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\1/'`
-build_vendor=`echo $build | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\2/'`
-build_os=`echo $build | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\3/'`
-echo "$ac_t""$build" 1>&6
-
-test "$host_alias" != "$target_alias" &&
- test "$program_prefix$program_suffix$program_transform_name" = \
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- program_prefix=${target_alias}-
-
-if test "$program_transform_name" = s,x,x,; then
- program_transform_name=
-else
- # Double any \ or $. echo might interpret backslashes.
- cat <<\EOF_SED > conftestsed
-s,\\,\\\\,g; s,\$,$$,g
-EOF_SED
- program_transform_name="`echo $program_transform_name|sed -f conftestsed`"
- rm -f conftestsed
-fi
-test "$program_prefix" != NONE &&
- program_transform_name="s,^,${program_prefix},; $program_transform_name"
-# Use a double $ so make ignores it.
-test "$program_suffix" != NONE &&
- program_transform_name="s,\$\$,${program_suffix},; $program_transform_name"
-
-# sed with no file args requires a program.
-test "$program_transform_name" = "" && program_transform_name="s,x,x,"
-
-# Extract the first word of "gcc", so it can be a program name with args.
-set dummy gcc; ac_word=$2
-echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:1787: checking for $ac_word" >&5
-if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- if test -n "$CC"; then
- ac_cv_prog_CC="$CC" # Let the user override the test.
-else
- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
- ac_dummy="$PATH"
- for ac_dir in $ac_dummy; do
- test -z "$ac_dir" && ac_dir=.
- if test -f $ac_dir/$ac_word; then
- ac_cv_prog_CC="gcc"
- break
- fi
- done
- IFS="$ac_save_ifs"
-fi
-fi
-CC="$ac_cv_prog_CC"
-if test -n "$CC"; then
- echo "$ac_t""$CC" 1>&6
-else
- echo "$ac_t""no" 1>&6
-fi
-
-if test -z "$CC"; then
- # Extract the first word of "cc", so it can be a program name with args.
-set dummy cc; ac_word=$2
-echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:1817: checking for $ac_word" >&5
-if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- if test -n "$CC"; then
- ac_cv_prog_CC="$CC" # Let the user override the test.
-else
- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
- ac_prog_rejected=no
- ac_dummy="$PATH"
- for ac_dir in $ac_dummy; do
- test -z "$ac_dir" && ac_dir=.
- if test -f $ac_dir/$ac_word; then
- if test "$ac_dir/$ac_word" = "/usr/ucb/cc"; then
- ac_prog_rejected=yes
- continue
- fi
- ac_cv_prog_CC="cc"
- break
- fi
- done
- IFS="$ac_save_ifs"
-if test $ac_prog_rejected = yes; then
- # We found a bogon in the path, so make sure we never use it.
- set dummy $ac_cv_prog_CC
- shift
- if test $# -gt 0; then
- # We chose a different compiler from the bogus one.
- # However, it has the same basename, so the bogon will be chosen
- # first if we set CC to just the basename; use the full file name.
- shift
- set dummy "$ac_dir/$ac_word" "$@"
- shift
- ac_cv_prog_CC="$@"
- fi
-fi
-fi
-fi
-CC="$ac_cv_prog_CC"
-if test -n "$CC"; then
- echo "$ac_t""$CC" 1>&6
-else
- echo "$ac_t""no" 1>&6
-fi
-
- if test -z "$CC"; then
- case "`uname -s`" in
- *win32* | *WIN32*)
- # Extract the first word of "cl", so it can be a program name with args.
-set dummy cl; ac_word=$2
-echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:1868: checking for $ac_word" >&5
-if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- if test -n "$CC"; then
- ac_cv_prog_CC="$CC" # Let the user override the test.
-else
- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
- ac_dummy="$PATH"
- for ac_dir in $ac_dummy; do
- test -z "$ac_dir" && ac_dir=.
- if test -f $ac_dir/$ac_word; then
- ac_cv_prog_CC="cl"
- break
- fi
- done
- IFS="$ac_save_ifs"
-fi
-fi
-CC="$ac_cv_prog_CC"
-if test -n "$CC"; then
- echo "$ac_t""$CC" 1>&6
-else
- echo "$ac_t""no" 1>&6
-fi
- ;;
- esac
- fi
- test -z "$CC" && { echo "configure: error: no acceptable cc found in \$PATH" 1>&2; exit 1; }
-fi
-
-echo $ac_n "checking whether the C compiler ($CC $CFLAGS $LDFLAGS) works""... $ac_c" 1>&6
-echo "configure:1900: checking whether the C compiler ($CC $CFLAGS $LDFLAGS) works" >&5
-
-ac_ext=c
-# CFLAGS is not in ac_cpp because -g, -O, etc. are not valid cpp options.
-ac_cpp='$CPP $CPPFLAGS'
-ac_compile='${CC-cc} -c $CFLAGS $CPPFLAGS conftest.$ac_ext 1>&5'
-ac_link='${CC-cc} -o conftest${ac_exeext} $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS 1>&5'
-cross_compiling=$ac_cv_prog_cc_cross
-
-cat > conftest.$ac_ext << EOF
-
-#line 1911 "configure"
-#include "confdefs.h"
-
-main(){return(0);}
-EOF
-if { (eval echo configure:1916: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- ac_cv_prog_cc_works=yes
- # If we can't run a trivial program, we are probably using a cross compiler.
- if (./conftest; exit) 2>/dev/null; then
- ac_cv_prog_cc_cross=no
- else
- ac_cv_prog_cc_cross=yes
- fi
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- ac_cv_prog_cc_works=no
-fi
-rm -fr conftest*
-ac_ext=c
-# CFLAGS is not in ac_cpp because -g, -O, etc. are not valid cpp options.
-ac_cpp='$CPP $CPPFLAGS'
-ac_compile='${CC-cc} -c $CFLAGS $CPPFLAGS conftest.$ac_ext 1>&5'
-ac_link='${CC-cc} -o conftest${ac_exeext} $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS 1>&5'
-cross_compiling=$ac_cv_prog_cc_cross
-
-echo "$ac_t""$ac_cv_prog_cc_works" 1>&6
-if test $ac_cv_prog_cc_works = no; then
- { echo "configure: error: installation or configuration problem: C compiler cannot create executables." 1>&2; exit 1; }
-fi
-echo $ac_n "checking whether the C compiler ($CC $CFLAGS $LDFLAGS) is a cross-compiler""... $ac_c" 1>&6
-echo "configure:1942: checking whether the C compiler ($CC $CFLAGS $LDFLAGS) is a cross-compiler" >&5
-echo "$ac_t""$ac_cv_prog_cc_cross" 1>&6
-cross_compiling=$ac_cv_prog_cc_cross
-
-echo $ac_n "checking whether we are using GNU C""... $ac_c" 1>&6
-echo "configure:1947: checking whether we are using GNU C" >&5
-if eval "test \"`echo '$''{'ac_cv_prog_gcc'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.c <<EOF
-#ifdef __GNUC__
- yes;
-#endif
-EOF
-if { ac_try='${CC-cc} -E conftest.c'; { (eval echo configure:1956: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }; } | egrep yes >/dev/null 2>&1; then
- ac_cv_prog_gcc=yes
-else
- ac_cv_prog_gcc=no
-fi
-fi
-
-echo "$ac_t""$ac_cv_prog_gcc" 1>&6
-
-if test $ac_cv_prog_gcc = yes; then
- GCC=yes
-else
- GCC=
-fi
-
-ac_test_CFLAGS="${CFLAGS+set}"
-ac_save_CFLAGS="$CFLAGS"
-CFLAGS=
-echo $ac_n "checking whether ${CC-cc} accepts -g""... $ac_c" 1>&6
-echo "configure:1975: checking whether ${CC-cc} accepts -g" >&5
-if eval "test \"`echo '$''{'ac_cv_prog_cc_g'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- echo 'void f(){}' > conftest.c
-if test -z "`${CC-cc} -g -c conftest.c 2>&1`"; then
- ac_cv_prog_cc_g=yes
-else
- ac_cv_prog_cc_g=no
-fi
-rm -f conftest*
-
-fi
-
-echo "$ac_t""$ac_cv_prog_cc_g" 1>&6
-if test "$ac_test_CFLAGS" = set; then
- CFLAGS="$ac_save_CFLAGS"
-elif test $ac_cv_prog_cc_g = yes; then
- if test "$GCC" = yes; then
- CFLAGS="-g -O2"
- else
- CFLAGS="-g"
- fi
-else
- if test "$GCC" = yes; then
- CFLAGS="-O2"
- else
- CFLAGS=
- fi
-fi
-
-# Find a good install program. We prefer a C program (faster),
-# so one script is as good as another. But avoid the broken or
-# incompatible versions:
-# SysV /etc/install, /usr/sbin/install
-# SunOS /usr/etc/install
-# IRIX /sbin/install
-# AIX /bin/install
-# AIX 4 /usr/bin/installbsd, which doesn't work without a -g flag
-# AFS /usr/afsws/bin/install, which mishandles nonexistent args
-# SVR4 /usr/ucb/install, which tries to use the nonexistent group "staff"
-# ./install, which can be erroneously created by make from ./install.sh.
-echo $ac_n "checking for a BSD compatible install""... $ac_c" 1>&6
-echo "configure:2018: checking for a BSD compatible install" >&5
-if test -z "$INSTALL"; then
-if eval "test \"`echo '$''{'ac_cv_path_install'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- IFS="${IFS= }"; ac_save_IFS="$IFS"; IFS=":"
- for ac_dir in $PATH; do
- # Account for people who put trailing slashes in PATH elements.
- case "$ac_dir/" in
- /|./|.//|/etc/*|/usr/sbin/*|/usr/etc/*|/sbin/*|/usr/afsws/bin/*|/usr/ucb/*) ;;
- *)
- # OSF1 and SCO ODT 3.0 have their own names for install.
- # Don't use installbsd from OSF since it installs stuff as root
- # by default.
- for ac_prog in ginstall scoinst install; do
- if test -f $ac_dir/$ac_prog; then
- if test $ac_prog = install &&
- grep dspmsg $ac_dir/$ac_prog >/dev/null 2>&1; then
- # AIX install. It has an incompatible calling convention.
- :
- else
- ac_cv_path_install="$ac_dir/$ac_prog -c"
- break 2
- fi
- fi
- done
- ;;
- esac
- done
- IFS="$ac_save_IFS"
-
-fi
- if test "${ac_cv_path_install+set}" = set; then
- INSTALL="$ac_cv_path_install"
- else
- # As a last resort, use the slow shell script. We don't cache a
- # path for INSTALL within a source directory, because that will
- # break other packages using the cache if that directory is
- # removed, or if the path is relative.
- INSTALL="$ac_install_sh"
- fi
-fi
-echo "$ac_t""$INSTALL" 1>&6
-
-# Use test -z because SunOS4 sh mishandles braces in ${var-val}.
-# It thinks the first close brace ends the variable substitution.
-test -z "$INSTALL_PROGRAM" && INSTALL_PROGRAM='${INSTALL}'
-
-test -z "$INSTALL_SCRIPT" && INSTALL_SCRIPT='${INSTALL_PROGRAM}'
-
-test -z "$INSTALL_DATA" && INSTALL_DATA='${INSTALL} -m 644'
-
-
-# Put a plausible default for CC_FOR_BUILD in Makefile.
-if test "x$cross_compiling" = "xno"; then
- CC_FOR_BUILD='$(CC)'
-else
- CC_FOR_BUILD=gcc
-fi
-
-
-
-
-AR=${AR-ar}
-
-# Extract the first word of "ranlib", so it can be a program name with args.
-set dummy ranlib; ac_word=$2
-echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:2086: checking for $ac_word" >&5
-if eval "test \"`echo '$''{'ac_cv_prog_RANLIB'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- if test -n "$RANLIB"; then
- ac_cv_prog_RANLIB="$RANLIB" # Let the user override the test.
-else
- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
- ac_dummy="$PATH"
- for ac_dir in $ac_dummy; do
- test -z "$ac_dir" && ac_dir=.
- if test -f $ac_dir/$ac_word; then
- ac_cv_prog_RANLIB="ranlib"
- break
- fi
- done
- IFS="$ac_save_ifs"
- test -z "$ac_cv_prog_RANLIB" && ac_cv_prog_RANLIB=":"
-fi
-fi
-RANLIB="$ac_cv_prog_RANLIB"
-if test -n "$RANLIB"; then
- echo "$ac_t""$RANLIB" 1>&6
-else
- echo "$ac_t""no" 1>&6
-fi
-
-
-ALL_LINGUAS=
-
- for ac_hdr in argz.h limits.h locale.h nl_types.h malloc.h string.h \
-unistd.h values.h sys/param.h
-do
-ac_safe=`echo "$ac_hdr" | sed 'y%./+-%__p_%'`
-echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6
-echo "configure:2121: checking for $ac_hdr" >&5
-if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 2126 "configure"
-#include "confdefs.h"
-#include <$ac_hdr>
-EOF
-ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:2131: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
-ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
-if test -z "$ac_err"; then
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=yes"
-else
- echo "$ac_err" >&5
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=no"
-fi
-rm -f conftest*
-fi
-if eval "test \"`echo '$ac_cv_header_'$ac_safe`\" = yes"; then
- echo "$ac_t""yes" 1>&6
- ac_tr_hdr=HAVE_`echo $ac_hdr | sed 'y%abcdefghijklmnopqrstuvwxyz./-%ABCDEFGHIJKLMNOPQRSTUVWXYZ___%'`
- cat >> confdefs.h <<EOF
-#define $ac_tr_hdr 1
-EOF
-
-else
- echo "$ac_t""no" 1>&6
-fi
-done
-
- for ac_func in getcwd munmap putenv setenv setlocale strchr strcasecmp \
-__argz_count __argz_stringify __argz_next
-do
-echo $ac_n "checking for $ac_func""... $ac_c" 1>&6
-echo "configure:2161: checking for $ac_func" >&5
-if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 2166 "configure"
-#include "confdefs.h"
-/* System header to define __stub macros and hopefully few prototypes,
- which can conflict with char $ac_func(); below. */
-#include <assert.h>
-/* Override any gcc2 internal prototype to avoid an error. */
-/* We use char because int might match the return type of a gcc2
- builtin and then its argument prototype would still apply. */
-char $ac_func();
-
-int main() {
-
-/* The GNU C library defines this for functions which it implements
- to always fail with ENOSYS. Some functions are actually named
- something starting with __ and the normal name is an alias. */
-#if defined (__stub_$ac_func) || defined (__stub___$ac_func)
-choke me
-#else
-$ac_func();
-#endif
-
-; return 0; }
-EOF
-if { (eval echo configure:2189: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=yes"
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=no"
-fi
-rm -f conftest*
-fi
-
-if eval "test \"`echo '$ac_cv_func_'$ac_func`\" = yes"; then
- echo "$ac_t""yes" 1>&6
- ac_tr_func=HAVE_`echo $ac_func | tr 'abcdefghijklmnopqrstuvwxyz' 'ABCDEFGHIJKLMNOPQRSTUVWXYZ'`
- cat >> confdefs.h <<EOF
-#define $ac_tr_func 1
-EOF
-
-else
- echo "$ac_t""no" 1>&6
-fi
-done
-
-
- if test "${ac_cv_func_stpcpy+set}" != "set"; then
- for ac_func in stpcpy
-do
-echo $ac_n "checking for $ac_func""... $ac_c" 1>&6
-echo "configure:2218: checking for $ac_func" >&5
-if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 2223 "configure"
-#include "confdefs.h"
-/* System header to define __stub macros and hopefully few prototypes,
- which can conflict with char $ac_func(); below. */
-#include <assert.h>
-/* Override any gcc2 internal prototype to avoid an error. */
-/* We use char because int might match the return type of a gcc2
- builtin and then its argument prototype would still apply. */
-char $ac_func();
-
-int main() {
-
-/* The GNU C library defines this for functions which it implements
- to always fail with ENOSYS. Some functions are actually named
- something starting with __ and the normal name is an alias. */
-#if defined (__stub_$ac_func) || defined (__stub___$ac_func)
-choke me
-#else
-$ac_func();
-#endif
-
-; return 0; }
-EOF
-if { (eval echo configure:2246: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=yes"
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=no"
-fi
-rm -f conftest*
-fi
-
-if eval "test \"`echo '$ac_cv_func_'$ac_func`\" = yes"; then
- echo "$ac_t""yes" 1>&6
- ac_tr_func=HAVE_`echo $ac_func | tr 'abcdefghijklmnopqrstuvwxyz' 'ABCDEFGHIJKLMNOPQRSTUVWXYZ'`
- cat >> confdefs.h <<EOF
-#define $ac_tr_func 1
-EOF
-
-else
- echo "$ac_t""no" 1>&6
-fi
-done
-
- fi
- if test "${ac_cv_func_stpcpy}" = "yes"; then
- cat >> confdefs.h <<\EOF
-#define HAVE_STPCPY 1
-EOF
-
- fi
-
- if test $ac_cv_header_locale_h = yes; then
- echo $ac_n "checking for LC_MESSAGES""... $ac_c" 1>&6
-echo "configure:2280: checking for LC_MESSAGES" >&5
-if eval "test \"`echo '$''{'am_cv_val_LC_MESSAGES'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 2285 "configure"
-#include "confdefs.h"
-#include <locale.h>
-int main() {
-return LC_MESSAGES
-; return 0; }
-EOF
-if { (eval echo configure:2292: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- rm -rf conftest*
- am_cv_val_LC_MESSAGES=yes
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- am_cv_val_LC_MESSAGES=no
-fi
-rm -f conftest*
-fi
-
-echo "$ac_t""$am_cv_val_LC_MESSAGES" 1>&6
- if test $am_cv_val_LC_MESSAGES = yes; then
- cat >> confdefs.h <<\EOF
-#define HAVE_LC_MESSAGES 1
-EOF
-
- fi
- fi
- echo $ac_n "checking whether NLS is requested""... $ac_c" 1>&6
-echo "configure:2313: checking whether NLS is requested" >&5
- # Check whether --enable-nls or --disable-nls was given.
-if test "${enable_nls+set}" = set; then
- enableval="$enable_nls"
- USE_NLS=$enableval
-else
- USE_NLS=yes
-fi
-
- echo "$ac_t""$USE_NLS" 1>&6
-
-
- USE_INCLUDED_LIBINTL=no
-
- if test "$USE_NLS" = "yes"; then
- cat >> confdefs.h <<\EOF
-#define ENABLE_NLS 1
-EOF
-
- echo $ac_n "checking whether included gettext is requested""... $ac_c" 1>&6
-echo "configure:2333: checking whether included gettext is requested" >&5
- # Check whether --with-included-gettext or --without-included-gettext was given.
-if test "${with_included_gettext+set}" = set; then
- withval="$with_included_gettext"
- nls_cv_force_use_gnu_gettext=$withval
-else
- nls_cv_force_use_gnu_gettext=no
-fi
-
- echo "$ac_t""$nls_cv_force_use_gnu_gettext" 1>&6
-
- nls_cv_use_gnu_gettext="$nls_cv_force_use_gnu_gettext"
- if test "$nls_cv_force_use_gnu_gettext" != "yes"; then
- nls_cv_header_intl=
- nls_cv_header_libgt=
- CATOBJEXT=NONE
-
- ac_safe=`echo "libintl.h" | sed 'y%./+-%__p_%'`
-echo $ac_n "checking for libintl.h""... $ac_c" 1>&6
-echo "configure:2352: checking for libintl.h" >&5
-if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 2357 "configure"
-#include "confdefs.h"
-#include <libintl.h>
-EOF
-ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:2362: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
-ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
-if test -z "$ac_err"; then
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=yes"
-else
- echo "$ac_err" >&5
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=no"
-fi
-rm -f conftest*
-fi
-if eval "test \"`echo '$ac_cv_header_'$ac_safe`\" = yes"; then
- echo "$ac_t""yes" 1>&6
- echo $ac_n "checking for gettext in libc""... $ac_c" 1>&6
-echo "configure:2379: checking for gettext in libc" >&5
-if eval "test \"`echo '$''{'gt_cv_func_gettext_libc'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 2384 "configure"
-#include "confdefs.h"
-#include <libintl.h>
-int main() {
-return (int) gettext ("")
-; return 0; }
-EOF
-if { (eval echo configure:2391: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- rm -rf conftest*
- gt_cv_func_gettext_libc=yes
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
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-
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-if { (eval echo configure:2426: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
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-
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-fi
-
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-
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-
- # Extract the first word of "msgfmt", so it can be a program name with args.
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- IFS="$ac_save_ifs"
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-if { (eval echo configure:2544: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
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- echo "configure: failed program was:" >&5
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- ac_tr_func=HAVE_`echo $ac_func | tr 'abcdefghijklmnopqrstuvwxyz' 'ABCDEFGHIJKLMNOPQRSTUVWXYZ'`
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-
- # Extract the first word of "gmsgfmt", so it can be a program name with args.
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-echo "configure:2571: checking for $ac_word" >&5
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- echo $ac_n "(cached) $ac_c" 1>&6
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- ?:/*)
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- ;;
- *)
- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
- ac_dummy="$PATH"
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- IFS="$ac_save_ifs"
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-else
- echo "$ac_t""no" 1>&6
-fi
-
- # Extract the first word of "xgettext", so it can be a program name with args.
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-echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:2607: checking for $ac_word" >&5
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-else
- case "$XGETTEXT" in
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- ac_cv_path_XGETTEXT="$XGETTEXT" # Let the user override the test with a path.
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- *)
- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS="${IFS}:"
- for ac_dir in $PATH; do
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- IFS="$ac_save_ifs"
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-XGETTEXT="$ac_cv_path_XGETTEXT"
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-else
- echo "$ac_t""no" 1>&6
-fi
-
- cat > conftest.$ac_ext <<EOF
-#line 2639 "configure"
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-
-int main() {
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-if { (eval echo configure:2647: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
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- CATOBJEXT=.gmo
- DATADIRNAME=share
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- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- CATOBJEXT=.mo
- DATADIRNAME=lib
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-rm -f conftest*
- INSTOBJEXT=.mo
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-
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- echo "$ac_t""no" 1>&6
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-
-
-
- if test "$CATOBJEXT" = "NONE"; then
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- # Extract the first word of "msgfmt", so it can be a program name with args.
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-echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:2679: checking for $ac_word" >&5
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-else
- case "$MSGFMT" in
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- ac_cv_path_MSGFMT="$MSGFMT" # Let the user override the test with a path.
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- *)
- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS="${IFS}:"
- for ac_dir in $PATH; do
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- if test -f $ac_dir/$ac_word; then
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- ac_cv_path_MSGFMT="$ac_dir/$ac_word"
- break
- fi
- fi
- done
- IFS="$ac_save_ifs"
- test -z "$ac_cv_path_MSGFMT" && ac_cv_path_MSGFMT="msgfmt"
- ;;
-esac
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-MSGFMT="$ac_cv_path_MSGFMT"
-if test -n "$MSGFMT"; then
- echo "$ac_t""$MSGFMT" 1>&6
-else
- echo "$ac_t""no" 1>&6
-fi
-
- # Extract the first word of "gmsgfmt", so it can be a program name with args.
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-echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:2713: checking for $ac_word" >&5
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- ?:/*)
- ac_cv_path_GMSGFMT="$GMSGFMT" # Let the user override the test with a dos path.
- ;;
- *)
- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
- ac_dummy="$PATH"
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- done
- IFS="$ac_save_ifs"
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- echo "$ac_t""no" 1>&6
-fi
-
- # Extract the first word of "xgettext", so it can be a program name with args.
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-echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:2749: checking for $ac_word" >&5
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- *)
- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS="${IFS}:"
- for ac_dir in $PATH; do
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- IFS="$ac_save_ifs"
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-else
- echo "$ac_t""no" 1>&6
-fi
-
-
- USE_INCLUDED_LIBINTL=yes
- CATOBJEXT=.gmo
- INSTOBJEXT=.mo
- DATADIRNAME=share
- INTLDEPS='$(top_builddir)/../intl/libintl.a'
- INTLLIBS=$INTLDEPS
- LIBS=`echo $LIBS | sed -e 's/-lintl//'`
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-
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- else
- echo "$ac_t""found xgettext programs is not GNU xgettext; ignore it" 1>&6
- XGETTEXT=":"
- fi
- fi
-
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- else
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-
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-
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- POFILES="$POFILES $lang.po"
- done
-
-
-
-
-
-
-
-
-
-
-
-
-
-
- if test "x$CATOBJEXT" != "x"; then
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- LINGUAS=
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- echo $ac_n "checking for catalogs to be installed""... $ac_c" 1>&6
-echo "configure:2839: checking for catalogs to be installed" >&5
- NEW_LINGUAS=
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- esac
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- fi
-
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- fi
- fi
-
- if test $ac_cv_header_locale_h = yes; then
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- else
- INCLUDE_LOCALE_H="\
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- fi
-
-
- if test -f $srcdir/po2tbl.sed.in; then
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-echo $ac_n "checking for linux/version.h""... $ac_c" 1>&6
-echo "configure:2867: checking for linux/version.h" >&5
-if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then
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-{ (eval echo configure:2877: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
-ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
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- eval "ac_cv_header_$ac_safe=yes"
-else
- echo "$ac_err" >&5
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=no"
-fi
-rm -f conftest*
-fi
-if eval "test \"`echo '$ac_cv_header_'$ac_safe`\" = yes"; then
- echo "$ac_t""yes" 1>&6
- msgformat=linux
-else
- echo "$ac_t""no" 1>&6
-msgformat=xopen
-fi
-
-
- sed -e '/^#/d' $srcdir/$msgformat-msg.sed > po2msg.sed
- fi
- sed -e '/^#.*[^\\]$/d' -e '/^#$/d' \
- $srcdir/po2tbl.sed.in > po2tbl.sed
- fi
-
- if test "$PACKAGE" = "gettext"; then
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- GT_YES=
- else
- GT_NO=
- GT_YES="#YES#"
- fi
-
-
-
- MKINSTALLDIRS="\$(srcdir)/../../mkinstalldirs"
-
-
- l=
-
-
- if test -d $srcdir/po; then
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- if test "x$srcdir" != "x."; then
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- else
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- fi
- else
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- fi
- rm -f po/POTFILES
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- < $srcdir/po/POTFILES.in > po/POTFILES
- fi
-
-
-# Check for common headers.
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-# At one point there were hardcoded AC_DEFINE's if ${host} = i386-*-windows*.
-for ac_hdr in stdlib.h string.h strings.h unistd.h time.h
-do
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-echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6
-echo "configure:2946: checking for $ac_hdr" >&5
-if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 2951 "configure"
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-#include <$ac_hdr>
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-ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:2956: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
-ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
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- eval "ac_cv_header_$ac_safe=yes"
-else
- echo "$ac_err" >&5
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=no"
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-fi
-if eval "test \"`echo '$ac_cv_header_'$ac_safe`\" = yes"; then
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- ac_tr_hdr=HAVE_`echo $ac_hdr | sed 'y%abcdefghijklmnopqrstuvwxyz./-%ABCDEFGHIJKLMNOPQRSTUVWXYZ___%'`
- cat >> confdefs.h <<EOF
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-
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-
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-echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6
-echo "configure:2986: checking for $ac_hdr" >&5
-if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then
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-else
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-#line 2991 "configure"
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-#include <$ac_hdr>
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-ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:2996: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
-ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
-if test -z "$ac_err"; then
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- eval "ac_cv_header_$ac_safe=yes"
-else
- echo "$ac_err" >&5
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=no"
-fi
-rm -f conftest*
-fi
-if eval "test \"`echo '$ac_cv_header_'$ac_safe`\" = yes"; then
- echo "$ac_t""yes" 1>&6
- ac_tr_hdr=HAVE_`echo $ac_hdr | sed 'y%abcdefghijklmnopqrstuvwxyz./-%ABCDEFGHIJKLMNOPQRSTUVWXYZ___%'`
- cat >> confdefs.h <<EOF
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-
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-fi
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-
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-echo "configure:3026: checking for $ac_hdr" >&5
-if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then
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-else
- cat > conftest.$ac_ext <<EOF
-#line 3031 "configure"
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-
-
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- sim_debug=""
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-
-
-
-# Check whether --enable-sim-stdio or --disable-sim-stdio was given.
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- sim_stdio=""
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-
-
-
-# Check whether --enable-sim-trace or --disable-sim-trace was given.
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- sim_trace=""
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- sim_trace="${sim_trace}|TRACE_$x"
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- sim_trace=""
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-
-
-
-# Check whether --enable-sim-profile or --disable-sim-profile was given.
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-
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- cat > conftest.$ac_ext <<EOF
-#line 3407 "configure"
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-#include <sys/types.h>
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-
-int main() {
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-if { (eval echo configure:3424: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
- rm -rf conftest*
- ac_cv_type_signal=void
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- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- ac_cv_type_signal=int
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-
-echo "$ac_t""$ac_cv_type_signal" 1>&6
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-
-
-
-
-
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- ac_cv_exeext=
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- { echo "configure: error: installation or configuration problem: compiler cannot create executables." 1>&2; exit 1; }
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-ac_exeext=$EXEEXT
-
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-sim_link_links=tconfig.h
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-
-# targ-vals.def points to the libc macro description file.
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-
-
-
-for ac_hdr in unistd.h
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- ac_tr_hdr=HAVE_`echo $ac_hdr | sed 'y%abcdefghijklmnopqrstuvwxyz./-%ABCDEFGHIJKLMNOPQRSTUVWXYZ___%'`
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-
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-
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-ac_given_srcdir=$srcdir
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-cat >> $CONFIG_STATUS <<EOF
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-# Protect against being on the right side of a sed subst in config.status.
-sed 's/%@/@@/; s/@%/@@/; s/%g\$/@g/; /@g\$/s/[\\\\&%]/\\\\&/g;
- s/@@/%@/; s/@@/@%/; s/@g\$/%g/' > conftest.subs <<\\CEOF
-$ac_vpsub
-$extrasub
-s%@sim_environment@%$sim_environment%g
-s%@sim_alignment@%$sim_alignment%g
-s%@sim_assert@%$sim_assert%g
-s%@sim_bitsize@%$sim_bitsize%g
-s%@sim_endian@%$sim_endian%g
-s%@sim_hostendian@%$sim_hostendian%g
-s%@sim_float@%$sim_float%g
-s%@sim_scache@%$sim_scache%g
-s%@sim_default_model@%$sim_default_model%g
-s%@sim_hw_cflags@%$sim_hw_cflags%g
-s%@sim_hw_objs@%$sim_hw_objs%g
-s%@sim_hw@%$sim_hw%g
-s%@sim_inline@%$sim_inline%g
-s%@sim_packages@%$sim_packages%g
-s%@sim_regparm@%$sim_regparm%g
-s%@sim_reserved_bits@%$sim_reserved_bits%g
-s%@sim_smp@%$sim_smp%g
-s%@sim_stdcall@%$sim_stdcall%g
-s%@sim_xor_endian@%$sim_xor_endian%g
-s%@WARN_CFLAGS@%$WARN_CFLAGS%g
-s%@WERROR_CFLAGS@%$WERROR_CFLAGS%g
-s%@SHELL@%$SHELL%g
-s%@CFLAGS@%$CFLAGS%g
-s%@CPPFLAGS@%$CPPFLAGS%g
-s%@CXXFLAGS@%$CXXFLAGS%g
-s%@FFLAGS@%$FFLAGS%g
-s%@DEFS@%$DEFS%g
-s%@LDFLAGS@%$LDFLAGS%g
-s%@LIBS@%$LIBS%g
-s%@exec_prefix@%$exec_prefix%g
-s%@prefix@%$prefix%g
-s%@program_transform_name@%$program_transform_name%g
-s%@bindir@%$bindir%g
-s%@sbindir@%$sbindir%g
-s%@libexecdir@%$libexecdir%g
-s%@datadir@%$datadir%g
-s%@sysconfdir@%$sysconfdir%g
-s%@sharedstatedir@%$sharedstatedir%g
-s%@localstatedir@%$localstatedir%g
-s%@libdir@%$libdir%g
-s%@includedir@%$includedir%g
-s%@oldincludedir@%$oldincludedir%g
-s%@infodir@%$infodir%g
-s%@mandir@%$mandir%g
-s%@host@%$host%g
-s%@host_alias@%$host_alias%g
-s%@host_cpu@%$host_cpu%g
-s%@host_vendor@%$host_vendor%g
-s%@host_os@%$host_os%g
-s%@target@%$target%g
-s%@target_alias@%$target_alias%g
-s%@target_cpu@%$target_cpu%g
-s%@target_vendor@%$target_vendor%g
-s%@target_os@%$target_os%g
-s%@build@%$build%g
-s%@build_alias@%$build_alias%g
-s%@build_cpu@%$build_cpu%g
-s%@build_vendor@%$build_vendor%g
-s%@build_os@%$build_os%g
-s%@CC@%$CC%g
-s%@INSTALL_PROGRAM@%$INSTALL_PROGRAM%g
-s%@INSTALL_SCRIPT@%$INSTALL_SCRIPT%g
-s%@INSTALL_DATA@%$INSTALL_DATA%g
-s%@CC_FOR_BUILD@%$CC_FOR_BUILD%g
-s%@HDEFINES@%$HDEFINES%g
-s%@AR@%$AR%g
-s%@RANLIB@%$RANLIB%g
-s%@SET_MAKE@%$SET_MAKE%g
-s%@CPP@%$CPP%g
-s%@ALLOCA@%$ALLOCA%g
-s%@USE_NLS@%$USE_NLS%g
-s%@MSGFMT@%$MSGFMT%g
-s%@GMSGFMT@%$GMSGFMT%g
-s%@XGETTEXT@%$XGETTEXT%g
-s%@USE_INCLUDED_LIBINTL@%$USE_INCLUDED_LIBINTL%g
-s%@CATALOGS@%$CATALOGS%g
-s%@CATOBJEXT@%$CATOBJEXT%g
-s%@DATADIRNAME@%$DATADIRNAME%g
-s%@GMOFILES@%$GMOFILES%g
-s%@INSTOBJEXT@%$INSTOBJEXT%g
-s%@INTLDEPS@%$INTLDEPS%g
-s%@INTLLIBS@%$INTLLIBS%g
-s%@INTLOBJS@%$INTLOBJS%g
-s%@POFILES@%$POFILES%g
-s%@POSUB@%$POSUB%g
-s%@INCLUDE_LOCALE_H@%$INCLUDE_LOCALE_H%g
-s%@GT_NO@%$GT_NO%g
-s%@GT_YES@%$GT_YES%g
-s%@MKINSTALLDIRS@%$MKINSTALLDIRS%g
-s%@l@%$l%g
-s%@MAINT@%$MAINT%g
-s%@sim_bswap@%$sim_bswap%g
-s%@sim_cflags@%$sim_cflags%g
-s%@sim_debug@%$sim_debug%g
-s%@sim_stdio@%$sim_stdio%g
-s%@sim_trace@%$sim_trace%g
-s%@sim_profile@%$sim_profile%g
-s%@EXEEXT@%$EXEEXT%g
-
-CEOF
-EOF
-
-cat >> $CONFIG_STATUS <<\EOF
-
-# Split the substitutions into bite-sized pieces for seds with
-# small command number limits, like on Digital OSF/1 and HP-UX.
-ac_max_sed_cmds=90 # Maximum number of lines to put in a sed script.
-ac_file=1 # Number of current file.
-ac_beg=1 # First line for current file.
-ac_end=$ac_max_sed_cmds # Line after last line for current file.
-ac_more_lines=:
-ac_sed_cmds=""
-while $ac_more_lines; do
- if test $ac_beg -gt 1; then
- sed "1,${ac_beg}d; ${ac_end}q" conftest.subs > conftest.s$ac_file
- else
- sed "${ac_end}q" conftest.subs > conftest.s$ac_file
- fi
- if test ! -s conftest.s$ac_file; then
- ac_more_lines=false
- rm -f conftest.s$ac_file
- else
- if test -z "$ac_sed_cmds"; then
- ac_sed_cmds="sed -f conftest.s$ac_file"
- else
- ac_sed_cmds="$ac_sed_cmds | sed -f conftest.s$ac_file"
- fi
- ac_file=`expr $ac_file + 1`
- ac_beg=$ac_end
- ac_end=`expr $ac_end + $ac_max_sed_cmds`
- fi
-done
-if test -z "$ac_sed_cmds"; then
- ac_sed_cmds=cat
-fi
-EOF
-
-cat >> $CONFIG_STATUS <<EOF
-
-CONFIG_FILES=\${CONFIG_FILES-"Makefile.sim:Makefile.in Make-common.sim:../common/Make-common.in .gdbinit:../common/gdbinit.in"}
-EOF
-cat >> $CONFIG_STATUS <<\EOF
-for ac_file in .. $CONFIG_FILES; do if test "x$ac_file" != x..; then
- # Support "outfile[:infile[:infile...]]", defaulting infile="outfile.in".
- case "$ac_file" in
- *:*) ac_file_in=`echo "$ac_file"|sed 's%[^:]*:%%'`
- ac_file=`echo "$ac_file"|sed 's%:.*%%'` ;;
- *) ac_file_in="${ac_file}.in" ;;
- esac
-
- # Adjust a relative srcdir, top_srcdir, and INSTALL for subdirectories.
-
- # Remove last slash and all that follows it. Not all systems have dirname.
- ac_dir=`echo $ac_file|sed 's%/[^/][^/]*$%%'`
- if test "$ac_dir" != "$ac_file" && test "$ac_dir" != .; then
- # The file is in a subdirectory.
- test ! -d "$ac_dir" && mkdir "$ac_dir"
- ac_dir_suffix="/`echo $ac_dir|sed 's%^\./%%'`"
- # A "../" for each directory in $ac_dir_suffix.
- ac_dots=`echo $ac_dir_suffix|sed 's%/[^/]*%../%g'`
- else
- ac_dir_suffix= ac_dots=
- fi
-
- case "$ac_given_srcdir" in
- .) srcdir=.
- if test -z "$ac_dots"; then top_srcdir=.
- else top_srcdir=`echo $ac_dots|sed 's%/$%%'`; fi ;;
- /*) srcdir="$ac_given_srcdir$ac_dir_suffix"; top_srcdir="$ac_given_srcdir" ;;
- *) # Relative path.
- srcdir="$ac_dots$ac_given_srcdir$ac_dir_suffix"
- top_srcdir="$ac_dots$ac_given_srcdir" ;;
- esac
-
- case "$ac_given_INSTALL" in
- [/$]*) INSTALL="$ac_given_INSTALL" ;;
- *) INSTALL="$ac_dots$ac_given_INSTALL" ;;
- esac
-
- echo creating "$ac_file"
- rm -f "$ac_file"
- configure_input="Generated automatically from `echo $ac_file_in|sed 's%.*/%%'` by configure."
- case "$ac_file" in
- *Makefile*) ac_comsub="1i\\
-# $configure_input" ;;
- *) ac_comsub= ;;
- esac
-
- ac_file_inputs=`echo $ac_file_in|sed -e "s%^%$ac_given_srcdir/%" -e "s%:% $ac_given_srcdir/%g"`
- sed -e "$ac_comsub
-s%@configure_input@%$configure_input%g
-s%@srcdir@%$srcdir%g
-s%@top_srcdir@%$top_srcdir%g
-s%@INSTALL@%$INSTALL%g
-" $ac_file_inputs | (eval "$ac_sed_cmds") > $ac_file
-fi; done
-rm -f conftest.s*
-
-# These sed commands are passed to sed as "A NAME B NAME C VALUE D", where
-# NAME is the cpp macro being defined and VALUE is the value it is being given.
-#
-# ac_d sets the value in "#define NAME VALUE" lines.
-ac_dA='s%^\([ ]*\)#\([ ]*define[ ][ ]*\)'
-ac_dB='\([ ][ ]*\)[^ ]*%\1#\2'
-ac_dC='\3'
-ac_dD='%g'
-# ac_u turns "#undef NAME" with trailing blanks into "#define NAME VALUE".
-ac_uA='s%^\([ ]*\)#\([ ]*\)undef\([ ][ ]*\)'
-ac_uB='\([ ]\)%\1#\2define\3'
-ac_uC=' '
-ac_uD='\4%g'
-# ac_e turns "#undef NAME" without trailing blanks into "#define NAME VALUE".
-ac_eA='s%^\([ ]*\)#\([ ]*\)undef\([ ][ ]*\)'
-ac_eB='$%\1#\2define\3'
-ac_eC=' '
-ac_eD='%g'
-
-if test "${CONFIG_HEADERS+set}" != set; then
-EOF
-cat >> $CONFIG_STATUS <<EOF
- CONFIG_HEADERS="config.h:config.in"
-EOF
-cat >> $CONFIG_STATUS <<\EOF
-fi
-for ac_file in .. $CONFIG_HEADERS; do if test "x$ac_file" != x..; then
- # Support "outfile[:infile[:infile...]]", defaulting infile="outfile.in".
- case "$ac_file" in
- *:*) ac_file_in=`echo "$ac_file"|sed 's%[^:]*:%%'`
- ac_file=`echo "$ac_file"|sed 's%:.*%%'` ;;
- *) ac_file_in="${ac_file}.in" ;;
- esac
-
- echo creating $ac_file
-
- rm -f conftest.frag conftest.in conftest.out
- ac_file_inputs=`echo $ac_file_in|sed -e "s%^%$ac_given_srcdir/%" -e "s%:% $ac_given_srcdir/%g"`
- cat $ac_file_inputs > conftest.in
-
-EOF
-
-# Transform confdefs.h into a sed script conftest.vals that substitutes
-# the proper values into config.h.in to produce config.h. And first:
-# Protect against being on the right side of a sed subst in config.status.
-# Protect against being in an unquoted here document in config.status.
-rm -f conftest.vals
-cat > conftest.hdr <<\EOF
-s/[\\&%]/\\&/g
-s%[\\$`]%\\&%g
-s%#define \([A-Za-z_][A-Za-z0-9_]*\) *\(.*\)%${ac_dA}\1${ac_dB}\1${ac_dC}\2${ac_dD}%gp
-s%ac_d%ac_u%gp
-s%ac_u%ac_e%gp
-EOF
-sed -n -f conftest.hdr confdefs.h > conftest.vals
-rm -f conftest.hdr
-
-# This sed command replaces #undef with comments. This is necessary, for
-# example, in the case of _POSIX_SOURCE, which is predefined and required
-# on some systems where configure will not decide to define it.
-cat >> conftest.vals <<\EOF
-s%^[ ]*#[ ]*undef[ ][ ]*[a-zA-Z_][a-zA-Z_0-9]*%/* & */%
-EOF
-
-# Break up conftest.vals because some shells have a limit on
-# the size of here documents, and old seds have small limits too.
-
-rm -f conftest.tail
-while :
-do
- ac_lines=`grep -c . conftest.vals`
- # grep -c gives empty output for an empty file on some AIX systems.
- if test -z "$ac_lines" || test "$ac_lines" -eq 0; then break; fi
- # Write a limited-size here document to conftest.frag.
- echo ' cat > conftest.frag <<CEOF' >> $CONFIG_STATUS
- sed ${ac_max_here_lines}q conftest.vals >> $CONFIG_STATUS
- echo 'CEOF
- sed -f conftest.frag conftest.in > conftest.out
- rm -f conftest.in
- mv conftest.out conftest.in
-' >> $CONFIG_STATUS
- sed 1,${ac_max_here_lines}d conftest.vals > conftest.tail
- rm -f conftest.vals
- mv conftest.tail conftest.vals
-done
-rm -f conftest.vals
-
-cat >> $CONFIG_STATUS <<\EOF
- rm -f conftest.frag conftest.h
- echo "/* $ac_file. Generated automatically by configure. */" > conftest.h
- cat conftest.in >> conftest.h
- rm -f conftest.in
- if cmp -s $ac_file conftest.h 2>/dev/null; then
- echo "$ac_file is unchanged"
- rm -f conftest.h
- else
- # Remove last slash and all that follows it. Not all systems have dirname.
- ac_dir=`echo $ac_file|sed 's%/[^/][^/]*$%%'`
- if test "$ac_dir" != "$ac_file" && test "$ac_dir" != .; then
- # The file is in a subdirectory.
- test ! -d "$ac_dir" && mkdir "$ac_dir"
- fi
- rm -f $ac_file
- mv conftest.h $ac_file
- fi
-fi; done
-
-EOF
-
-cat >> $CONFIG_STATUS <<EOF
-ac_sources="$sim_link_files"
-ac_dests="$sim_link_links"
-EOF
-
-cat >> $CONFIG_STATUS <<\EOF
-srcdir=$ac_given_srcdir
-while test -n "$ac_sources"; do
- set $ac_dests; ac_dest=$1; shift; ac_dests=$*
- set $ac_sources; ac_source=$1; shift; ac_sources=$*
-
- echo "linking $srcdir/$ac_source to $ac_dest"
-
- if test ! -r $srcdir/$ac_source; then
- { echo "configure: error: $srcdir/$ac_source: File not found" 1>&2; exit 1; }
- fi
- rm -f $ac_dest
-
- # Make relative symlinks.
- # Remove last slash and all that follows it. Not all systems have dirname.
- ac_dest_dir=`echo $ac_dest|sed 's%/[^/][^/]*$%%'`
- if test "$ac_dest_dir" != "$ac_dest" && test "$ac_dest_dir" != .; then
- # The dest file is in a subdirectory.
- test ! -d "$ac_dest_dir" && mkdir "$ac_dest_dir"
- ac_dest_dir_suffix="/`echo $ac_dest_dir|sed 's%^\./%%'`"
- # A "../" for each directory in $ac_dest_dir_suffix.
- ac_dots=`echo $ac_dest_dir_suffix|sed 's%/[^/]*%../%g'`
- else
- ac_dest_dir_suffix= ac_dots=
- fi
-
- case "$srcdir" in
- [/$]*) ac_rel_source="$srcdir/$ac_source" ;;
- *) ac_rel_source="$ac_dots$srcdir/$ac_source" ;;
- esac
-
- # Make a symlink if possible; otherwise try a hard link.
- if ln -s $ac_rel_source $ac_dest 2>/dev/null ||
- ln $srcdir/$ac_source $ac_dest; then :
- else
- { echo "configure: error: can not link $ac_dest to $srcdir/$ac_source" 1>&2; exit 1; }
- fi
-done
-EOF
-cat >> $CONFIG_STATUS <<EOF
-
-EOF
-cat >> $CONFIG_STATUS <<\EOF
-case "x$CONFIG_FILES" in
- xMakefile*)
- echo "Merging Makefile.sim+Make-common.sim into Makefile ..."
- rm -f Makesim1.tmp Makesim2.tmp Makefile
- sed -n -e '/^## COMMON_PRE_/,/^## End COMMON_PRE_/ p' <Make-common.sim >Makesim1.tmp
- sed -n -e '/^## COMMON_POST_/,/^## End COMMON_POST_/ p' <Make-common.sim >Makesim2.tmp
- sed -e '/^## COMMON_PRE_/ r Makesim1.tmp' \
- -e '/^## COMMON_POST_/ r Makesim2.tmp' \
- <Makefile.sim >Makefile
- rm -f Makefile.sim Make-common.sim Makesim1.tmp Makesim2.tmp
- ;;
- esac
- case "x$CONFIG_HEADERS" in xconfig.h:config.in) echo > stamp-h ;; esac
-
-exit 0
-EOF
-chmod +x $CONFIG_STATUS
-rm -fr confdefs* $ac_clean_files
-test "$no_create" = yes || ${CONFIG_SHELL-/bin/sh} $CONFIG_STATUS || exit 1
-
-
diff --git a/sim/sh/configure.in b/sim/sh/configure.in
deleted file mode 100644
index 033b0bc1615..00000000000
--- a/sim/sh/configure.in
+++ /dev/null
@@ -1,10 +0,0 @@
-dnl Process this file with autoconf to produce a configure script.
-sinclude(../common/aclocal.m4)
-AC_PREREQ(2.5)dnl
-AC_INIT(Makefile.in)
-
-SIM_AC_COMMON
-
-AC_CHECK_HEADERS(unistd.h)
-
-SIM_AC_OUTPUT
diff --git a/sim/sh/gencode.c b/sim/sh/gencode.c
deleted file mode 100644
index ba6ee4c1bc6..00000000000
--- a/sim/sh/gencode.c
+++ /dev/null
@@ -1,2617 +0,0 @@
-/* Simulator/Opcode generator for the Hitachi Super-H architecture.
-
- Written by Steve Chamberlain of Cygnus Support.
- sac@cygnus.com
-
- This file is part of SH sim
-
-
- THIS SOFTWARE IS NOT COPYRIGHTED
-
- Cygnus offers the following for use in the public domain. Cygnus
- makes no warranty with regard to the software or it's performance
- and the user accepts the software "AS IS" with all faults.
-
- CYGNUS DISCLAIMS ANY WARRANTIES, EXPRESS OR IMPLIED, WITH REGARD TO
- THIS SOFTWARE INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.
-
-*/
-
-/* This program generates the opcode table for the assembler and
- the simulator code
-
- -t prints a pretty table for the assembler manual
- -s generates the simulator code jump table
- -d generates a define table
- -x generates the simulator code switch statement
- default used to generate the opcode tables
-
-*/
-
-#include <stdio.h>
-
-#define MAX_NR_STUFF 42
-
-typedef struct
-{
- char *defs;
- char *refs;
- char *name;
- char *code;
- char *stuff[MAX_NR_STUFF];
- int index;
-} op;
-
-
-op tab[] =
-{
-
- { "n", "", "add #<imm>,<REG_N>", "0111nnnni8*1....",
- "R[n] += SEXT(i);",
- "if (i == 0) {",
- " UNDEF(n); /* see #ifdef PARANOID */",
- " break;",
- "}",
- },
- { "n", "mn", "add <REG_M>,<REG_N>", "0011nnnnmmmm1100",
- "R[n] += R[m];",
- },
-
- { "n", "mn", "addc <REG_M>,<REG_N>", "0011nnnnmmmm1110",
- "ult = R[n] + T;",
- "SET_SR_T (ult < R[n]);",
- "R[n] = ult + R[m];",
- "SET_SR_T (T || (R[n] < ult));",
- },
-
- { "n", "mn", "addv <REG_M>,<REG_N>", "0011nnnnmmmm1111",
- "ult = R[n] + R[m];",
- "SET_SR_T ((~(R[n] ^ R[m]) & (ult ^ R[n])) >> 31);",
- "R[n] = ult;",
- },
-
- { "0", "", "and #<imm>,R0", "11001001i8*1....",
- "R0 &= i;",
- },
- { "n", "nm", "and <REG_M>,<REG_N>", "0010nnnnmmmm1001",
- "R[n] &= R[m];",
- },
- { "", "0", "and.b #<imm>,@(R0,GBR)", "11001101i8*1....",
- "MA (1);",
- "WBAT (GBR + R0, RBAT (GBR + R0) & i);",
- },
-
- { "", "", "bf <bdisp8>", "10001011i8p1....",
- "if (!T) {",
- " SET_NIP (PC + 4 + (SEXT(i) * 2));",
- " cycles += 2;",
- "}",
- },
-
- { "", "", "bf.s <bdisp8>", "10001111i8p1....",
- "if (!T) {",
- " SET_NIP (PC + 4 + (SEXT (i) * 2));",
- " cycles += 2;",
- " Delay_Slot (PC + 2);",
- "}",
- },
-
- { "", "", "bra <bdisp12>", "1010i12.........",
- "SET_NIP (PC + 4 + (SEXT12 (i) * 2));",
- "cycles += 2;",
- "Delay_Slot (PC + 2);",
- },
-
- { "", "n", "braf <REG_N>", "0000nnnn00100011",
- "SET_NIP (PC + 4 + R[n]);",
- "cycles += 2;",
- "Delay_Slot (PC + 2);",
- },
-
- { "", "", "bsr <bdisp12>", "1011i12.........",
- "PR = PH2T (PC + 4);",
- "SET_NIP (PC + 4 + (SEXT12 (i) * 2));",
- "cycles += 2;",
- "Delay_Slot (PC + 2);",
- },
-
- { "", "n", "bsrf <REG_N>", "0000nnnn00000011",
- "PR = PH2T (PC) + 4;",
- "SET_NIP (PC + 4 + R[n]);",
- "cycles += 2;",
- "Delay_Slot (PC + 2);",
- },
-
- { "", "", "bt <bdisp8>", "10001001i8p1....",
- "if (T) {",
- " SET_NIP (PC + 4 + (SEXT (i) * 2));",
- " cycles += 2;",
- "}",
- },
-
- { "", "", "bt.s <bdisp8>", "10001101i8p1....",
- "if (T) {",
- " SET_NIP (PC + 4 + (SEXT (i) * 2));",
- " cycles += 2;",
- " Delay_Slot (PC + 2);",
- "}",
- },
-
- { "", "", "clrmac", "0000000000101000",
- "MACH = 0;",
- "MACL = 0;",
- },
-
- { "", "", "clrs", "0000000001001000",
- "SET_SR_S (0);",
- },
-
- { "", "", "clrt", "0000000000001000",
- "SET_SR_T (0);",
- },
-
- { "", "0", "cmp/eq #<imm>,R0", "10001000i8*1....",
- "SET_SR_T (R0 == SEXT (i));",
- },
- { "", "mn", "cmp/eq <REG_M>,<REG_N>", "0011nnnnmmmm0000",
- "SET_SR_T (R[n] == R[m]);",
- },
- { "", "mn", "cmp/ge <REG_M>,<REG_N>", "0011nnnnmmmm0011",
- "SET_SR_T (R[n] >= R[m]);",
- },
- { "", "mn", "cmp/gt <REG_M>,<REG_N>", "0011nnnnmmmm0111",
- "SET_SR_T (R[n] > R[m]);",
- },
- { "", "mn", "cmp/hi <REG_M>,<REG_N>", "0011nnnnmmmm0110",
- "SET_SR_T (UR[n] > UR[m]);",
- },
- { "", "mn", "cmp/hs <REG_M>,<REG_N>", "0011nnnnmmmm0010",
- "SET_SR_T (UR[n] >= UR[m]);",
- },
- { "", "n", "cmp/pl <REG_N>", "0100nnnn00010101",
- "SET_SR_T (R[n] > 0);",
- },
- { "", "n", "cmp/pz <REG_N>", "0100nnnn00010001",
- "SET_SR_T (R[n] >= 0);",
- },
- { "", "mn", "cmp/str <REG_M>,<REG_N>", "0010nnnnmmmm1100",
- "ult = R[n] ^ R[m];",
- "SET_SR_T (((ult & 0xff000000) == 0)",
- " | ((ult & 0xff0000) == 0)",
- " | ((ult & 0xff00) == 0)",
- " | ((ult & 0xff) == 0));",
- },
-
- { "", "mn", "div0s <REG_M>,<REG_N>", "0010nnnnmmmm0111",
- "SET_SR_Q ((R[n] & sbit) != 0);",
- "SET_SR_M ((R[m] & sbit) != 0);",
- "SET_SR_T (M != Q);",
- },
-
- { "", "", "div0u", "0000000000011001",
- "SET_SR_M (0);",
- "SET_SR_Q (0);",
- "SET_SR_T (0);",
- },
-
- { "", "", "div1 <REG_M>,<REG_N>", "0011nnnnmmmm0100",
- "div1 (R, m, n/*, T*/);",
- },
-
- { "", "nm", "dmuls.l <REG_M>,<REG_N>", "0011nnnnmmmm1101",
- "dmul (1/*signed*/, R[n], R[m]);",
- },
-
- { "", "nm", "dmulu.l <REG_M>,<REG_N>", "0011nnnnmmmm0101",
- "dmul (0/*unsigned*/, R[n], R[m]);",
- },
-
- { "n", "n", "dt <REG_N>", "0100nnnn00010000",
- "R[n]--;",
- "SET_SR_T (R[n] == 0);",
- },
-
- { "n", "m", "exts.b <REG_M>,<REG_N>", "0110nnnnmmmm1110",
- "R[n] = SEXT (R[m]);",
- },
- { "n", "m", "exts.w <REG_M>,<REG_N>", "0110nnnnmmmm1111",
- "R[n] = SEXTW (R[m]);",
- },
-
- { "n", "m", "extu.b <REG_M>,<REG_N>", "0110nnnnmmmm1100",
- "R[n] = (R[m] & 0xff);",
- },
- { "n", "m", "extu.w <REG_M>,<REG_N>", "0110nnnnmmmm1101",
- "R[n] = (R[m] & 0xffff);",
- },
-
- /* sh3e */
- { "", "", "fabs <FREG_N>", "1111nnnn01011101",
- "FP_UNARY (n, fabs);",
- "/* FIXME: FR(n) &= 0x7fffffff; */",
- },
-
- /* sh3e */
- { "", "", "fadd <FREG_M>,<FREG_N>", "1111nnnnmmmm0000",
- "FP_OP (n, +, m);",
- },
-
- /* sh3e */
- { "", "", "fcmp/eq <FREG_M>,<FREG_N>", "1111nnnnmmmm0100",
- "FP_CMP (n, ==, m);",
- },
- /* sh3e */
- { "", "", "fcmp/gt <FREG_M>,<FREG_N>", "1111nnnnmmmm0101",
- "FP_CMP (n, >, m);",
- },
-
- /* sh4 */
- { "", "", "fcnvds <DR_N>,FPUL", "1111nnnn10111101",
- "if (! FPSCR_PR || n & 1)",
- " RAISE_EXCEPTION (SIGILL);",
- "else",
- "{",
- " union",
- " {",
- " int i;",
- " float f;",
- " } u;",
- " u.f = DR(n);",
- " FPUL = u.i;",
- "}",
- },
-
- /* sh4 */
- { "", "", "fcnvsd FPUL,<DR_N>", "1111nnnn10101101",
- "if (! FPSCR_PR || n & 1)",
- " RAISE_EXCEPTION (SIGILL);",
- "else",
- "{",
- " union",
- " {",
- " int i;",
- " float f;",
- " } u;",
- " u.i = FPUL;",
- " SET_DR(n, u.f);",
- "}",
- },
-
- /* sh3e */
- { "", "", "fdiv <FREG_M>,<FREG_N>", "1111nnnnmmmm0011",
- "FP_OP (n, /, m);",
- "/* FIXME: check for DP and (n & 1) == 0? */",
- },
-
- /* sh4 */
- { "", "", "fipr <FV_M>,<FV_N>", "1111nnmm11101101",
- "/* FIXME: not implemented */",
- "RAISE_EXCEPTION (SIGILL);",
- "/* FIXME: check for DP and (n & 1) == 0? */",
- },
-
- /* sh3e */
- { "", "", "fldi0 <FREG_N>", "1111nnnn10001101",
- "SET_FR (n, (float)0.0);",
- "/* FIXME: check for DP and (n & 1) == 0? */",
- },
-
- /* sh3e */
- { "", "", "fldi1 <FREG_N>", "1111nnnn10011101",
- "SET_FR (n, (float)1.0);",
- "/* FIXME: check for DP and (n & 1) == 0? */",
- },
-
- /* sh3e */
- { "", "", "flds <FREG_N>,FPUL", "1111nnnn00011101",
- " union",
- " {",
- " int i;",
- " float f;",
- " } u;",
- " u.f = FR(n);",
- " FPUL = u.i;",
- },
-
- /* sh3e */
- { "", "", "float FPUL,<FREG_N>", "1111nnnn00101101",
- /* sh4 */
- "if (FPSCR_PR)",
- " SET_DR (n, (double)FPUL);",
- "else",
- "{",
- " SET_FR (n, (float)FPUL);",
- "}",
- },
-
- /* sh3e */
- { "", "", "fmac <FREG_0>,<FREG_M>,<FREG_N>", "1111nnnnmmmm1110",
- "SET_FR (n, FR(m) * FR(0) + FR(n));",
- "/* FIXME: check for DP and (n & 1) == 0? */",
- },
-
- /* sh3e */
- { "", "", "fmov <FREG_M>,<FREG_N>", "1111nnnnmmmm1100",
- /* sh4 */
- "if (FPSCR_SZ) {",
- " int ni = XD_TO_XF (n);",
- " int mi = XD_TO_XF (m);",
- " SET_XF (ni + 0, XF (mi + 0));",
- " SET_XF (ni + 1, XF (mi + 1));",
- "}",
- "else",
- "{",
- " SET_FR (n, FR (m));",
- "}",
- },
- /* sh3e */
- { "", "", "fmov.s <FREG_M>,@<REG_N>", "1111nnnnmmmm1010",
- /* sh4 */
- "if (FPSCR_SZ) {",
- " MA (2);",
- " WDAT (R[n], m);",
- "}",
- "else",
- "{",
- " MA (1);",
- " WLAT (R[n], FI(m));",
- "}",
- },
- /* sh3e */
- { "", "", "fmov.s @<REG_M>,<FREG_N>", "1111nnnnmmmm1000",
- /* sh4 */
- "if (FPSCR_SZ) {",
- " MA (2);",
- " RDAT (R[m], n);",
- "}",
- "else",
- "{",
- " MA (1);",
- " SET_FI(n, RLAT(R[m]));",
- "}",
- },
- /* sh3e */
- { "", "", "fmov.s @<REG_M>+,<FREG_N>", "1111nnnnmmmm1001",
- /* sh4 */
- "if (FPSCR_SZ) {",
- " MA (2);",
- " RDAT (R[m], n);",
- " R[m] += 8;",
- "}",
- "else",
- "{",
- " MA (1);",
- " SET_FI (n, RLAT (R[m]));",
- " R[m] += 4;",
- "}",
- },
- /* sh3e */
- { "", "", "fmov.s <FREG_M>,@-<REG_N>", "1111nnnnmmmm1011",
- /* sh4 */
- "if (FPSCR_SZ) {",
- " MA (2);",
- " R[n] -= 8;",
- " WDAT (R[n], m);",
- "}",
- "else",
- "{",
- " MA (1);",
- " R[n] -= 4;",
- " WLAT (R[n], FI(m));",
- "}",
- },
- /* sh3e */
- { "", "", "fmov.s @(R0,<REG_M>),<FREG_N>", "1111nnnnmmmm0110",
- /* sh4 */
- "if (FPSCR_SZ) {",
- " MA (2);",
- " RDAT (R[0]+R[m], n);",
- "}",
- "else",
- "{",
- " MA (1);",
- " SET_FI(n, RLAT(R[0] + R[m]));",
- "}",
- },
- /* sh3e */
- { "", "", "fmov.s <FREG_M>,@(R0,<REG_N>)", "1111nnnnmmmm0111",
- /* sh4 */
- "if (FPSCR_SZ) {",
- " MA (2);",
- " WDAT (R[0]+R[n], m);",
- "}",
- "else",
- "{",
- " MA (1);",
- " WLAT((R[0]+R[n]), FI(m));",
- "}",
- },
-
- /* sh4: See fmov instructions above for move to/from extended fp registers */
-
- /* sh3e */
- { "", "", "fmul <FREG_M>,<FREG_N>", "1111nnnnmmmm0010",
- "FP_OP(n, *, m);",
- },
-
- /* sh3e */
- { "", "", "fneg <FREG_N>", "1111nnnn01001101",
- "FP_UNARY(n, -);",
- },
-
- /* sh4 */
- { "", "", "frchg", "1111101111111101",
- "SET_FPSCR (GET_FPSCR() ^ FPSCR_MASK_FR);",
- },
-
- /* sh4 */
- { "", "", "fschg", "1111001111111101",
- "SET_FPSCR (GET_FPSCR() ^ FPSCR_MASK_SZ);",
- },
-
- /* sh3e */
- { "", "", "fsqrt <FREG_N>", "1111nnnn01101101",
- "FP_UNARY(n, sqrt);",
- },
-
- /* sh3e */
- { "", "", "fsub <FREG_M>,<FREG_N>", "1111nnnnmmmm0001",
- "FP_OP(n, -, m);",
- },
-
- /* sh3e */
- { "", "", "ftrc <FREG_N>, FPUL", "1111nnnn00111101",
- /* sh4 */
- "if (FPSCR_PR) {",
- " if (DR(n) != DR(n)) /* NaN */",
- " FPUL = 0x80000000;",
- " else",
- " FPUL = (int)DR(n);",
- "}",
- "else",
- "if (FR(n) != FR(n)) /* NaN */",
- " FPUL = 0x80000000;",
- "else",
- " FPUL = (int)FR(n);",
- },
-
- /* sh3e */
- { "", "", "fsts FPUL,<FREG_N>", "1111nnnn00001101",
- " union",
- " {",
- " int i;",
- " float f;",
- " } u;",
- " u.i = FPUL;",
- " SET_FR (n, u.f);",
- },
-
- { "", "n", "jmp @<REG_N>", "0100nnnn00101011",
- "SET_NIP (PT2H (R[n]));",
- "cycles += 2;",
- "Delay_Slot (PC + 2);",
- },
-
- { "", "n", "jsr @<REG_N>", "0100nnnn00001011",
- "PR = PH2T (PC + 4);",
- "if (~doprofile)",
- " gotcall (PR, R[n]);",
- "SET_NIP (PT2H (R[n]));",
- "cycles += 2;",
- "Delay_Slot (PC + 2);",
- },
-
- { "", "n", "ldc <REG_N>,<CREG_M>", "0100nnnnmmmm1110",
- "CREG (m) = R[n];",
- "/* FIXME: user mode */",
- },
- { "", "n", "ldc <REG_N>,SR", "0100nnnn00001110",
- "SET_SR (R[n]);",
- "/* FIXME: user mode */",
- },
- { "", "n", "ldc <REG_N>,MOD", "0100nnnn01011110",
- "SET_MOD (R[n]);",
- },
-#if 0
- { "", "n", "ldc <REG_N>,DBR", "0100nnnn11111010",
- "DBR = R[n];",
- "/* FIXME: user mode */",
- },
-#endif
- { "", "n", "ldc.l @<REG_N>+,<CREG_M>", "0100nnnnmmmm0111",
- "MA (1);",
- "CREG (m) = RLAT (R[n]);",
- "R[n] += 4;",
- "/* FIXME: user mode */",
- },
- { "", "n", "ldc.l @<REG_N>+,SR", "0100nnnn00000111",
- "MA (1);",
- "SET_SR (RLAT (R[n]));",
- "R[n] += 4;",
- "/* FIXME: user mode */",
- },
- { "", "n", "ldc.l @<REG_N>+,MOD", "0100nnnn01010111",
- "MA (1);",
- "SET_MOD (RLAT (R[n]));",
- "R[n] += 4;",
- },
-#if 0
- { "", "n", "ldc.l @<REG_N>+,DBR", "0100nnnn11110110",
- "MA (1);",
- "DBR = RLAT (R[n]);",
- "R[n] += 4;",
- "/* FIXME: user mode */",
- },
-#endif
-
- /* sh-dsp */
- { "", "", "ldre @(<disp>,PC)", "10001110i8p1....",
- "RE = SEXT (i) * 2 + 4 + PH2T (PC);",
- },
- { "", "", "ldrs @(<disp>,PC)", "10001100i8p1....",
- "RS = SEXT (i) * 2 + 4 + PH2T (PC);",
- },
-
- { "", "n", "lds <REG_N>,<SREG_M>", "0100nnnnssss1010",
- "SREG (m) = R[n];",
- },
- { "", "n", "lds.l @<REG_N>+,<SREG_M>", "0100nnnnssss0110",
- "MA (1);",
- "SREG (m) = RLAT(R[n]);",
- "R[n] += 4;",
- },
- /* sh3e / sh-dsp (lds <REG_N>,DSR) */
- { "", "n", "lds <REG_N>,FPSCR", "0100nnnn01101010",
- "SET_FPSCR(R[n]);",
- },
- /* sh3e / sh-dsp (lds.l @<REG_N>+,DSR) */
- { "", "n", "lds.l @<REG_N>+,FPSCR", "0100nnnn01100110",
- "MA (1);",
- "SET_FPSCR (RLAT(R[n]));",
- "R[n] += 4;",
- },
-
- { "", "", "ldtlb", "0000000000111000",
- "/* FIXME: XXX*/ abort();",
- },
-
- { "", "nm", "mac.l @<REG_M>+,@<REG_N>+", "0000nnnnmmmm1111",
- "trap (255,R0,memory,maskl,maskw, endianw);",
- "/* FIXME: mac.l support */",
- },
-
- { "", "nm", "mac.w @<REG_M>+,@<REG_N>+", "0100nnnnmmmm1111",
- "macw(R0,memory,n,m,endianw);",
- },
-
- { "n", "", "mov #<imm>,<REG_N>", "1110nnnni8*1....",
- "R[n] = SEXT(i);",
- },
- { "n", "m", "mov <REG_M>,<REG_N>", "0110nnnnmmmm0011",
- "R[n] = R[m];",
- },
-
- { "0", "", "mov.b @(<disp>,GBR),R0", "11000100i8*1....",
- "MA (1);",
- "R0 = RSBAT (i + GBR);",
- "L (0);",
- },
- { "0", "m", "mov.b @(<disp>,<REG_M>),R0", "10000100mmmmi4*1",
- "MA (1);",
- "R0 = RSBAT (i + R[m]);",
- "L (0);",
- },
- { "n", "0m", "mov.b @(R0,<REG_M>),<REG_N>", "0000nnnnmmmm1100",
- "MA (1);",
- "R[n] = RSBAT (R0 + R[m]);",
- "L (n);",
- },
- { "n", "m", "mov.b @<REG_M>+,<REG_N>", "0110nnnnmmmm0100",
- "MA (1);",
- "R[n] = RSBAT (R[m]);",
- "R[m] += 1;",
- "L (n);",
- },
- { "", "mn", "mov.b <REG_M>,@<REG_N>", "0010nnnnmmmm0000",
- "MA (1);",
- "WBAT (R[n], R[m]);",
- },
- { "", "0", "mov.b R0,@(<disp>,GBR)", "11000000i8*1....",
- "MA (1);",
- "WBAT (i + GBR, R0);",
- },
- { "", "m0", "mov.b R0,@(<disp>,<REG_M>)", "10000000mmmmi4*1",
- "MA (1);",
- "WBAT (i + R[m], R0);",
- },
- { "", "mn0", "mov.b <REG_M>,@(R0,<REG_N>)", "0000nnnnmmmm0100",
- "MA (1);",
- "WBAT (R[n] + R0, R[m]);",
- },
- { "", "nm", "mov.b <REG_M>,@-<REG_N>", "0010nnnnmmmm0100",
- "MA (1);",
- "R[n] -= 1;",
- "WBAT (R[n], R[m]);",
- },
- { "n", "m", "mov.b @<REG_M>,<REG_N>", "0110nnnnmmmm0000",
- "MA (1);",
- "R[n] = RSBAT (R[m]);",
- "L (n);",
- },
-
- { "0", "", "mov.l @(<disp>,GBR),R0", "11000110i8*4....",
- "MA (1);",
- "R0 = RLAT (i + GBR);",
- "L (0);",
- },
- { "n", "", "mov.l @(<disp>,PC),<REG_N>", "1101nnnni8p4....",
- "MA (1);",
- "R[n] = RLAT ((PH2T (PC) & ~3) + 4 + i);",
- "L (n);",
- },
- { "n", "m", "mov.l @(<disp>,<REG_M>),<REG_N>", "0101nnnnmmmmi4*4",
- "MA (1);",
- "R[n] = RLAT (i + R[m]);",
- "L (n);",
- },
- { "n", "m0", "mov.l @(R0,<REG_M>),<REG_N>", "0000nnnnmmmm1110",
- "MA (1);",
- "R[n] = RLAT (R0 + R[m]);",
- "L (n);",
- },
- { "nm", "m", "mov.l @<REG_M>+,<REG_N>", "0110nnnnmmmm0110",
- "MA (1);",
- "R[n] = RLAT (R[m]);",
- "R[m] += 4;",
- "L (n);",
- },
- { "n", "m", "mov.l @<REG_M>,<REG_N>", "0110nnnnmmmm0010",
- "MA (1);",
- "R[n] = RLAT (R[m]);",
- "L (n);",
- },
- { "", "0", "mov.l R0,@(<disp>,GBR)", "11000010i8*4....",
- "MA (1);",
- "WLAT (i + GBR, R0);",
- },
- { "", "nm", "mov.l <REG_M>,@(<disp>,<REG_N>)", "0001nnnnmmmmi4*4",
- "MA (1);",
- "WLAT (i + R[n], R[m]);",
- },
- { "", "nm0", "mov.l <REG_M>,@(R0,<REG_N>)", "0000nnnnmmmm0110",
- "MA (1);",
- "WLAT (R0 + R[n], R[m]);",
- },
- { "", "nm", "mov.l <REG_M>,@-<REG_N>", "0010nnnnmmmm0110",
- "MA (1) ;",
- "R[n] -= 4;",
- "WLAT (R[n], R[m]);",
- },
- { "", "nm", "mov.l <REG_M>,@<REG_N>", "0010nnnnmmmm0010",
- "MA (1);",
- "WLAT (R[n], R[m]);",
- },
-
- { "0", "", "mov.w @(<disp>,GBR),R0", "11000101i8*2....",
- "MA (1)",
- ";R0 = RSWAT (i + GBR);",
- "L (0);",
- },
- { "n", "", "mov.w @(<disp>,PC),<REG_N>", "1001nnnni8p2....",
- "MA (1);",
- "R[n] = RSWAT (PH2T (PC + 4 + i));",
- "L (n);",
- },
- { "0", "m", "mov.w @(<disp>,<REG_M>),R0", "10000101mmmmi4*2",
- "MA (1);",
- "R0 = RSWAT (i + R[m]);",
- "L (0);",
- },
- { "n", "m0", "mov.w @(R0,<REG_M>),<REG_N>", "0000nnnnmmmm1101",
- "MA (1);",
- "R[n] = RSWAT (R0 + R[m]);",
- "L (n);",
- },
- { "nm", "n", "mov.w @<REG_M>+,<REG_N>", "0110nnnnmmmm0101",
- "MA (1);",
- "R[n] = RSWAT (R[m]);",
- "R[m] += 2;",
- "L (n);",
- },
- { "n", "m", "mov.w @<REG_M>,<REG_N>", "0110nnnnmmmm0001",
- "MA (1);",
- "R[n] = RSWAT (R[m]);",
- "L (n);",
- },
- { "", "0", "mov.w R0,@(<disp>,GBR)", "11000001i8*2....",
- "MA (1);",
- "WWAT (i + GBR, R0);",
- },
- { "", "0m", "mov.w R0,@(<disp>,<REG_M>)", "10000001mmmmi4*2",
- "MA (1);",
- "WWAT (i + R[m], R0);",
- },
- { "", "m0n", "mov.w <REG_M>,@(R0,<REG_N>)", "0000nnnnmmmm0101",
- "MA (1);",
- "WWAT (R0 + R[n], R[m]);",
- },
- { "n", "mn", "mov.w <REG_M>,@-<REG_N>", "0010nnnnmmmm0101",
- "MA (1);",
- "R[n] -= 2;",
- "WWAT (R[n], R[m]);",
- },
- { "", "nm", "mov.w <REG_M>,@<REG_N>", "0010nnnnmmmm0001",
- "MA (1);",
- "WWAT (R[n], R[m]);",
- },
-
- { "0", "", "mova @(<disp>,PC),R0", "11000111i8p4....",
- "R0 = ((i + 4 + PH2T (PC)) & ~0x3);",
- },
-
- { "0", "", "movca.l @R0, <REG_N>", "0000nnnn11000011",
- "/* FIXME: Not implemented */",
- "RAISE_EXCEPTION (SIGILL);",
- },
-
- { "n", "", "movt <REG_N>", "0000nnnn00101001",
- "R[n] = T;",
- },
-
- { "", "mn", "mul.l <REG_M>,<REG_N>", "0000nnnnmmmm0111",
- "MACL = ((int)R[n]) * ((int)R[m]);",
- },
-#if 0
- { "", "nm", "mul.l <REG_M>,<REG_N>", "0000nnnnmmmm0111",
- "MACL = R[n] * R[m];",
- },
-#endif
-
- /* muls.w - see muls */
- { "", "mn", "muls <REG_M>,<REG_N>", "0010nnnnmmmm1111",
- "MACL = ((int)(short)R[n]) * ((int)(short)R[m]);",
- },
-
- /* mulu.w - see mulu */
- { "", "mn", "mulu <REG_M>,<REG_N>", "0010nnnnmmmm1110",
- "MACL = (((unsigned int)(unsigned short)R[n])",
- " * ((unsigned int)(unsigned short)R[m]));",
- },
-
- { "n", "m", "neg <REG_M>,<REG_N>", "0110nnnnmmmm1011",
- "R[n] = - R[m];",
- },
-
- { "n", "m", "negc <REG_M>,<REG_N>", "0110nnnnmmmm1010",
- "ult = -T;",
- "SET_SR_T (ult > 0);",
- "R[n] = ult - R[m];",
- "SET_SR_T (T || (R[n] > ult));",
- },
-
- { "", "", "nop", "0000000000001001",
- "/* nop */",
- },
-
- { "n", "m", "not <REG_M>,<REG_N>", "0110nnnnmmmm0111",
- "R[n] = ~R[m];",
- },
-
- { "0", "", "ocbi @<REG_N>", "0000nnnn10010011",
- "/* FIXME: Not implemented */",
- "RAISE_EXCEPTION (SIGILL);",
- },
-
- { "0", "", "ocbp @<REG_N>", "0000nnnn10100011",
- "/* FIXME: Not implemented */",
- "RAISE_EXCEPTION (SIGILL);",
- },
-
- { "", "n", "ocbwb @<REG_N>", "0000nnnn10110011",
- "RSBAT (R[n]); /* Take exceptions like byte load. */",
- "/* FIXME: Cache not implemented */",
- },
-
- { "0", "", "or #<imm>,R0", "11001011i8*1....",
- "R0 |= i;",
- },
- { "n", "m", "or <REG_M>,<REG_N>", "0010nnnnmmmm1011",
- "R[n] |= R[m];",
- },
- { "", "0", "or.b #<imm>,@(R0,GBR)", "11001111i8*1....",
- "MA (1);",
- "WBAT (R0 + GBR, (RBAT (R0 + GBR) | i));",
- },
-
- { "", "n", "pref @<REG_N>", "0000nnnn10000011",
- "/* Except for the effect on the cache - which is not simulated -",
- " this is like a nop. */",
- },
-
- { "n", "n", "rotcl <REG_N>", "0100nnnn00100100",
- "ult = R[n] < 0;",
- "R[n] = (R[n] << 1) | T;",
- "SET_SR_T (ult);",
- },
-
- { "n", "n", "rotcr <REG_N>", "0100nnnn00100101",
- "ult = R[n] & 1;",
- "R[n] = (UR[n] >> 1) | (T << 31);",
- "SET_SR_T (ult);",
- },
-
- { "n", "n", "rotl <REG_N>", "0100nnnn00000100",
- "SET_SR_T (R[n] < 0);",
- "R[n] <<= 1;",
- "R[n] |= T;",
- },
-
- { "n", "n", "rotr <REG_N>", "0100nnnn00000101",
- "SET_SR_T (R[n] & 1);",
- "R[n] = UR[n] >> 1;",
- "R[n] |= (T << 31);",
- },
-
- { "", "", "rte", "0000000000101011",
-#if 0
- /* SH-[12] */
- "int tmp = PC;",
- "SET_NIP (PT2H (RLAT (R[15]) + 2));",
- "R[15] += 4;",
- "SET_SR (RLAT (R[15]) & 0x3f3);",
- "R[15] += 4;",
- "Delay_Slot (PC + 2);",
-#else
- "SET_SR (SSR);",
- "SET_NIP (PT2H (SPC));",
- "cycles += 2;",
- "Delay_Slot (PC + 2);",
-#endif
- },
-
- { "", "", "rts", "0000000000001011",
- "SET_NIP (PT2H (PR));",
- "cycles += 2;",
- "Delay_Slot (PC + 2);",
- },
-
- /* sh-dsp */
- { "", "n", "setrc <REG_N>", "0100nnnn00010100",
- "SET_RC (R[n]);",
- },
- { "", "n", "setrc #<imm>", "10000010i8*1....",
- /* It would be more realistic to let loop_start point to some static
- memory that contains an illegal opcode and then give a bus error when
- the loop is eventually encountered, but it seems not only simpler,
- but also more debugging-friendly to just catch the failure here. */
- "if (BUSERROR (RS | RE, maskw))",
- " RAISE_EXCEPTION (SIGILL);",
- "else {",
- " SET_RC (i);",
- " loop = get_loop_bounds (RS, RE, memory, mem_end, maskw, endianw);",
- " CHECK_INSN_PTR (insn_ptr);",
- "}",
- },
-
- { "", "", "sets", "0000000001011000",
- "SET_SR_S (1);",
- },
-
- { "", "", "sett", "0000000000011000",
- "SET_SR_T (1);",
- },
-
- { "n", "mn", "shad <REG_M>,<REG_N>", "0100nnnnmmmm1100",
- "R[n] = (R[m] < 0) ? (R[n] >> ((-R[m])&0x1f)) : (R[n] << (R[m] & 0x1f));",
- },
-
- { "n", "n", "shal <REG_N>", "0100nnnn00100000",
- "SET_SR_T (R[n] < 0);",
- "R[n] <<= 1;",
- },
-
- { "n", "n", "shar <REG_N>", "0100nnnn00100001",
- "SET_SR_T (R[n] & 1);",
- "R[n] = R[n] >> 1;",
- },
-
- { "n", "mn", "shld <REG_M>,<REG_N>", "0100nnnnmmmm1101",
- "R[n] = (R[m] < 0) ? (UR[n] >> ((-R[m])&0x1f)): (R[n] << (R[m] & 0x1f));",
- },
-
- { "n", "n", "shll <REG_N>", "0100nnnn00000000",
- "SET_SR_T (R[n] < 0);",
- "R[n] <<= 1;",
- },
-
- { "n", "n", "shll2 <REG_N>", "0100nnnn00001000",
- "R[n] <<= 2;",
- },
- { "n", "n", "shll8 <REG_N>", "0100nnnn00011000",
- "R[n] <<= 8;",
- },
- { "n", "n", "shll16 <REG_N>", "0100nnnn00101000",
- "R[n] <<= 16;",
- },
-
- { "n", "n", "shlr <REG_N>", "0100nnnn00000001",
- "SET_SR_T (R[n] & 1);",
- "R[n] = UR[n] >> 1;",
- },
-
- { "n", "n", "shlr2 <REG_N>", "0100nnnn00001001",
- "R[n] = UR[n] >> 2;",
- },
- { "n", "n", "shlr8 <REG_N>", "0100nnnn00011001",
- "R[n] = UR[n] >> 8;",
- },
- { "n", "n", "shlr16 <REG_N>", "0100nnnn00101001",
- "R[n] = UR[n] >> 16;",
- },
-
- { "", "", "sleep", "0000000000011011",
- "nip = PC;",
- "trap (0xc3, R0, memory, maskl, maskw, endianw);",
- },
-
- { "n", "", "stc <CREG_M>,<REG_N>", "0000nnnnmmmm0010",
- "R[n] = CREG (m);",
- },
-
-#if 0
- { "n", "", "stc SGR,<REG_N>", "0000nnnn00111010",
- "R[n] = SGR;",
- },
- { "n", "", "stc DBR,<REG_N>", "0000nnnn11111010",
- "R[n] = DBR;",
- },
-#endif
- { "n", "n", "stc.l <CREG_M>,@-<REG_N>", "0100nnnnmmmm0011",
- "MA (1);",
- "R[n] -= 4;",
- "WLAT (R[n], CREG (m));",
- },
-#if 0
- { "n", "n", "stc.l SGR,@-<REG_N>", "0100nnnn00110010",
- "MA (1);",
- "R[n] -= 4;",
- "WLAT (R[n], SGR);",
- },
- { "n", "n", "stc.l DBR,@-<REG_N>", "0100nnnn11110010",
- "MA (1);",
- "R[n] -= 4;",
- "WLAT (R[n], DBR);",
- },
-#endif
-
- { "n", "", "sts <SREG_M>,<REG_N>", "0000nnnnssss1010",
- "R[n] = SREG (m);",
- },
- { "n", "n", "sts.l <SREG_M>,@-<REG_N>", "0100nnnnssss0010",
- "MA (1);",
- "R[n] -= 4;",
- "WLAT (R[n], SREG (m));",
- },
-
- { "n", "nm", "sub <REG_M>,<REG_N>", "0011nnnnmmmm1000",
- "R[n] -= R[m];",
- },
-
- { "n", "nm", "subc <REG_M>,<REG_N>", "0011nnnnmmmm1010",
- "ult = R[n] - T;",
- "SET_SR_T (ult > R[n]);",
- "R[n] = ult - R[m];",
- "SET_SR_T (T || (R[n] > ult));",
- },
-
- { "n", "nm", "subv <REG_M>,<REG_N>", "0011nnnnmmmm1011",
- "ult = R[n] - R[m];",
- "SET_SR_T (((R[n] ^ R[m]) & (ult ^ R[n])) >> 31);",
- "R[n] = ult;",
- },
-
- { "n", "nm", "swap.b <REG_M>,<REG_N>", "0110nnnnmmmm1000",
- "R[n] = ((R[m] & 0xffff0000)",
- " | ((R[m] << 8) & 0xff00)",
- " | ((R[m] >> 8) & 0x00ff));",
- },
- { "n", "nm", "swap.w <REG_M>,<REG_N>", "0110nnnnmmmm1001",
- "R[n] = (((R[m] << 16) & 0xffff0000)",
- " | ((R[m] >> 16) & 0x00ffff));",
- },
-
- { "", "n", "tas.b @<REG_N>", "0100nnnn00011011",
- "MA (1);",
- "ult = RBAT(R[n]);",
- "SET_SR_T (ult == 0);",
- "WBAT(R[n],ult|0x80);",
- },
-
- { "0", "", "trapa #<imm>", "11000011i8*1....",
-#if 0
- /* SH-[12] */
- "long imm = 0xff & i;",
- "if (i==0xc3)",
- " PC-=2;",
- "if (i<20||i==34||i==0xc3)",
- " trap(i,R,memory,maskl,maskw,endianw);",
- "else {",
- " R[15]-=4;",
- " WLAT(R[15],GET_SR());",
- " R[15]-=4;",
- " WLAT(R[15],PC+2);",
- " PC=RLAT(VBR+(imm<<2))-2;",
- "}",
-#else
- "if (i == 0xc3)",
- " {",
- " nip = PC;",
- " trap (i, R, memory, maskl, maskw,endianw);",
- " }",
- "else if (i < 20 || i==34 || i==0xc3)",
- " trap (i, R, memory, maskl, maskw,endianw);",
- "else if (!SR_BL) {",
- " /* FIXME: TRA = (imm << 2); */",
- " SSR = GET_SR();",
- " SPC = PH2T (PC + 2);",
- " SET_SR (GET_SR() | SR_MASK_MD | SR_MASK_BL | SR_MASK_RB);",
- " /* FIXME: EXPEVT = 0x00000160; */",
- " SET_NIP (PT2H (VBR + 0x00000100));",
- "}",
-#endif
- },
-
- { "", "mn", "tst <REG_M>,<REG_N>", "0010nnnnmmmm1000",
- "SET_SR_T ((R[n] & R[m]) == 0);",
- },
- { "", "0", "tst #<imm>,R0", "11001000i8*1....",
- "SET_SR_T ((R0 & i) == 0);",
- },
- { "", "0", "tst.b #<imm>,@(R0,GBR)", "11001100i8*1....",
- "MA (1);",
- "SET_SR_T ((RBAT (GBR+R0) & i) == 0);",
- },
-
- { "", "0", "xor #<imm>,R0", "11001010i8*1....",
- "R0 ^= i;",
- },
- { "n", "mn", "xor <REG_M>,<REG_N>", "0010nnnnmmmm1010",
- "R[n] ^= R[m];",
- },
- { "", "0", "xor.b #<imm>,@(R0,GBR)", "11001110i8*1....",
- "MA (1);",
- "ult = RBAT (GBR+R0);",
- "ult ^= i;",
- "WBAT (GBR + R0, ult);",
- },
-
- { "n", "nm", "xtrct <REG_M>,<REG_N>", "0010nnnnmmmm1101",
- "R[n] = (((R[n] >> 16) & 0xffff)",
- " | ((R[m] << 16) & 0xffff0000));",
- },
-
-#if 0
- { "divs.l <REG_M>,<REG_N>", "0100nnnnmmmm1110",
- "divl(0,R[n],R[m]);",
- },
- { "divu.l <REG_M>,<REG_N>", "0100nnnnmmmm1101",
- "divl(0,R[n],R[m]);",
- },
-#endif
-
- {0, 0}};
-
-op movsxy_tab[] =
-{
-/* If this is disabled, the simulator speeds up by about 12% on a
- 450 MHz PIII - 9% with ACE_FAST.
- Maybe we should have separate simulator loops? */
-#if 1
- { "n", "n", "movs.w @-<REG_N>,<DSP_REG_M>", "111101NNMMMM0000",
- "MA (1);",
- "R[n] -= 2;",
- "DSP_R (m) = RSWAT (R[n]) << 16;",
- "DSP_GRD (m) = SIGN32 (DSP_R (m));",
- },
- { "", "n", "movs.w @<REG_N>,<DSP_REG_M>", "111101NNMMMM0100",
- "MA (1);",
- "DSP_R (m) = RSWAT (R[n]) << 16;",
- "DSP_GRD (m) = SIGN32 (DSP_R (m));",
- },
- { "n", "n", "movs.w @<REG_N>+,<DSP_REG_M>", "111101NNMMMM1000",
- "MA (1);",
- "DSP_R (m) = RSWAT (R[n]) << 16;",
- "DSP_GRD (m) = SIGN32 (DSP_R (m));",
- "R[n] += 2;",
- },
- { "n", "n8","movs.w @<REG_N>+REG_8,<DSP_REG_M>", "111101NNMMMM1100",
- "MA (1);",
- "DSP_R (m) = RSWAT (R[n]) << 16;",
- "DSP_GRD (m) = SIGN32 (DSP_R (m));",
- "R[n] += R[8];",
- },
- { "n", "n", "movs.w @-<REG_N>,<DSP_GRD_M>", "111101NNGGGG0000",
- "MA (1);",
- "R[n] -= 2;",
- "DSP_R (m) = RSWAT (R[n]);",
- },
- { "", "n", "movs.w @<REG_N>,<DSP_GRD_M>", "111101NNGGGG0100",
- "MA (1);",
- "DSP_R (m) = RSWAT (R[n]);",
- },
- { "n", "n", "movs.w @<REG_N>+,<DSP_GRD_M>", "111101NNGGGG1000",
- "MA (1);",
- "DSP_R (m) = RSWAT (R[n]);",
- "R[n] += 2;",
- },
- { "n", "n8","movs.w @<REG_N>+REG_8,<DSP_GRD_M>", "111101NNGGGG1100",
- "MA (1);",
- "DSP_R (m) = RSWAT (R[n]);",
- "R[n] += R[8];",
- },
- { "n", "n", "<DSP_REG_M>,movs.w @-<REG_N>", "111101NNMMMM0001",
- "MA (1);",
- "R[n] -= 2;",
- "WWAT (R[n], DSP_R (m) >> 16);",
- },
- { "", "n", "movs.w <DSP_REG_M>,@<REG_N>", "111101NNMMMM0101",
- "MA (1);",
- "WWAT (R[n], DSP_R (m) >> 16);",
- },
- { "n", "n", "movs.w <DSP_REG_M>,@<REG_N>+", "111101NNMMMM1001",
- "MA (1);",
- "WWAT (R[n], DSP_R (m) >> 16);",
- "R[n] += 2;",
- },
- { "n", "n8","movs.w <DSP_REG_M>,@<REG_N>+REG_8", "111101NNMMMM1101",
- "MA (1);",
- "WWAT (R[n], DSP_R (m) >> 16);",
- "R[n] += R[8];",
- },
- { "n", "n", "movs.w <DSP_GRD_M>,@-<REG_N>", "111101NNGGGG0001",
- "MA (1);",
- "R[n] -= 2;",
- "WWAT (R[n], SEXT (DSP_R (m)));",
- },
- { "", "n", "movs.w <DSP_GRD_M>,@<REG_N>", "111101NNGGGG0101",
- "MA (1);",
- "WWAT (R[n], SEXT (DSP_R (m)));",
- },
- { "n", "n", "movs.w <DSP_GRD_M>,@<REG_N>+", "111101NNGGGG1001",
- "MA (1);",
- "WWAT (R[n], SEXT (DSP_R (m)));",
- "R[n] += 2;",
- },
- { "n", "n8","movs.w <DSP_GRD_M>,@<REG_N>+REG_8", "111101NNGGGG1101",
- "MA (1);",
- "WWAT (R[n], SEXT (DSP_R (m)));",
- "R[n] += R[8];",
- },
- { "n", "n", "movs.l @-<REG_N>,<DSP_REG_M>", "111101NNMMMM0010",
- "MA (1);",
- "R[n] -= 4;",
- "DSP_R (m) = RLAT (R[n]);",
- "DSP_GRD (m) = SIGN32 (DSP_R (m));",
- },
- { "", "n", "movs.l @<REG_N>,<DSP_REG_M>", "111101NNMMMM0110",
- "MA (1);",
- "DSP_R (m) = RLAT (R[n]);",
- "DSP_GRD (m) = SIGN32 (DSP_R (m));",
- },
- { "n", "n", "movs.l @<REG_N>+,<DSP_REG_M>", "111101NNMMMM1010",
- "MA (1);",
- "DSP_R (m) = RLAT (R[n]);",
- "DSP_GRD (m) = SIGN32 (DSP_R (m));",
- "R[n] += 4;",
- },
- { "n", "n8","movs.l @<REG_N>+REG_8,<DSP_REG_M>", "111101NNMMMM1110",
- "MA (1);",
- "DSP_R (m) = RLAT (R[n]);",
- "DSP_GRD (m) = SIGN32 (DSP_R (m));",
- "R[n] += R[8];",
- },
- { "n", "n", "<DSP_REG_M>,movs.l @-<REG_N>", "111101NNMMMM0011",
- "MA (1);",
- "R[n] -= 4;",
- "WLAT (R[n], DSP_R (m));",
- },
- { "", "n", "movs.l <DSP_REG_M>,@<REG_N>", "111101NNMMMM0111",
- "MA (1);",
- "WLAT (R[n], DSP_R (m));",
- },
- { "n", "n", "movs.l <DSP_REG_M>,@<REG_N>+", "111101NNMMMM1011",
- "MA (1);",
- "WLAT (R[n], DSP_R (m));",
- "R[n] += 4;",
- },
- { "n", "n8","movs.l <DSP_REG_M>,@<REG_N>+REG_8", "111101NNMMMM1111",
- "MA (1);",
- "WLAT (R[n], DSP_R (m));",
- "R[n] += R[8];",
- },
- { "n", "n", "<DSP_GRD_M>,movs.l @-<REG_N>", "111101NNGGGG0011",
- "MA (1);",
- "R[n] -= 4;",
- "WLAT (R[n], SEXT (DSP_R (m)));",
- },
- { "", "n", "movs.l <DSP_GRD_M>,@<REG_N>", "111101NNGGGG0111",
- "MA (1);",
- "WLAT (R[n], SEXT (DSP_R (m)));",
- },
- { "n", "n", "movs.l <DSP_GRD_M>,@<REG_N>+", "111101NNGGGG1011",
- "MA (1);",
- "WLAT (R[n], SEXT (DSP_R (m)));",
- "R[n] += 4;",
- },
- { "n", "n8","movs.l <DSP_GRD_M>,@<REG_N>+REG_8", "111101NNGGGG1111",
- "MA (1);",
- "WLAT (R[n], SEXT (DSP_R (m)));",
- "R[n] += R[8];",
- },
- { "", "n", "movx.w @<REG_x>,<DSP_XX>", "111100xxXX000100",
- "DSP_R (m) = RSWAT (R[n]) << 16;",
- "iword &= 0xfd53; goto top;",
- },
- { "n", "n", "movx.w @<REG_x>+,<DSP_XX>", "111100xxXX001000",
- "DSP_R (m) = RSWAT (R[n]) << 16;",
- "R[n] += ((R[n] & 0xffff) == MOD_ME) ? MOD_DELTA : 2;",
- "iword &= 0xfd53; goto top;",
- },
- { "n", "n8","movx.w @<REG_x>+REG_8,<DSP_XX>", "111100xxXX001000",
- "DSP_R (m) = RSWAT (R[n]) << 16;",
- "R[n] += ((R[n] & 0xffff) == MOD_ME) ? MOD_DELTA : R[8];",
- "iword &= 0xfd53; goto top;",
- },
- { "", "n", "movx.w <DSP_Aa>,@<REG_x>", "111100xxaa100100",
- "WWAT (R[n], DSP_R (m) >> 16);",
- "iword &= 0xfd53; goto top;",
- },
- { "n", "n", "movx.w <DSP_Aa>,@<REG_x>+", "111100xxaa101000",
- "WWAT (R[n], DSP_R (m) >> 16);",
- "R[n] += ((R[n] & 0xffff) == MOD_ME) ? MOD_DELTA : 2;",
- "iword &= 0xfd53; goto top;",
- },
- { "n", "n8","movx.w <DSP_Aa>,@<REG_x>+REG_8","111100xxaa101000",
- "WWAT (R[n], DSP_R (m) >> 16);",
- "R[n] += ((R[n] & 0xffff) == MOD_ME) ? MOD_DELTA : R[8];",
- "iword &= 0xfd53; goto top;",
- },
- { "", "n", "movy.w @<REG_y>,<DSP_YY>", "111100yyYY000001",
- "DSP_R (m) = RSWAT (R[n]) << 16;",
- },
- { "n", "n", "movy.w @<REG_x>+,<DSP_YY>", "111100yyYY000010",
- "DSP_R (m) = RSWAT (R[n]) << 16;",
- "R[n] += ((R[n] | ~0xffff) == MOD_ME) ? MOD_DELTA : 2;",
- },
- { "n", "n9","movy.w @<REG_x>+REG_9,<DSP_YY>", "111100yyYY000010",
- "DSP_R (m) = RSWAT (R[n]) << 16;",
- "R[n] += ((R[n] | ~0xffff) == MOD_ME) ? MOD_DELTA : R[9];",
- },
- { "", "n", "movy.w <DSP_Aa>,@<REG_x>", "111100yyAA010001",
- "WWAT (R[n], DSP_R (m) >> 16);",
- },
- { "n", "n", "movy.w <DSP_Aa>,@<REG_x>+", "111100yyAA010010",
- "WWAT (R[n], DSP_R (m) >> 16);",
- "R[n] += ((R[n] | ~0xffff) == MOD_ME) ? MOD_DELTA : 2;",
- },
- { "n", "n9", "movy.w <DSP_Aa>,@<REG_x>+REG_9", "111100yyAA010010",
- "WWAT (R[n], DSP_R (m) >> 16);",
- "R[n] += ((R[n] | ~0xffff) == MOD_ME) ? MOD_DELTA : R[9];",
- },
- { "", "", "nopx nopy", "1111000000000000",
- "/* nop */",
- },
- { "", "", "ppi", "1111100000000000",
- "ppi_insn (RIAT (nip));",
- "nip += 2;",
- "iword &= 0xf7ff; goto top;",
- },
-#endif
- {0, 0}};
-
-op ppi_tab[] =
-{
- { "","", "pshl #<imm>,dz", "00000iiim16.zzzz",
- "int Sz = DSP_R (z) & 0xffff0000;",
- "",
- "if (i < 16)",
- " res = Sz << i;",
- "else if (i >= 128 - 16)",
- " res = Sz >> 128 - i;",
- "else",
- " {",
- " RAISE_EXCEPTION (SIGILL);",
- " return;",
- " }",
- "res &= 0xffff0000;",
- "res_grd = 0;",
- "goto logical;",
- },
- { "","", "psha #<imm>,dz", "00010iiim32.zzzz",
- "int Sz = DSP_R (z);",
- "int Sz_grd = GET_DSP_GRD (z);",
- "",
- "if (i < 32)",
- " {",
- " if (i == 32)",
- " {",
- " res = 0;",
- " res_grd = Sz;",
- " }",
- " else",
- " {",
- " res = Sz << i;",
- " res_grd = Sz_grd << i | (unsigned) Sz >> 32 - i;",
- " }",
- " res_grd = SEXT (res_grd);",
- " carry = res_grd & 1;",
- " }",
- "else if (i >= 96)",
- " {",
- " i = 128 - i;",
- " if (i == 32)",
- " {",
- " res_grd = SIGN32 (Sz_grd);",
- " res = Sz_grd;",
- " }",
- " else",
- " {",
- " res = Sz >> i | Sz_grd << 32 - i;",
- " res_grd = Sz_grd >> i;",
- " }",
- " carry = Sz >> (i - 1) & 1;",
- " }",
- "else",
- " {",
- " RAISE_EXCEPTION (SIGILL);",
- " return;",
- " }",
- "COMPUTE_OVERFLOW;",
- "greater_equal = 0;",
- },
- { "","", "pmuls Se,Sf,Dg", "0100eeffxxyygguu",
- "res = (DSP_R (e)) >> 16 * (DSP_R (f) >> 16) * 2;",
- "if (res == 0x80000000)",
- " res = 0x7fffffff;",
- "DSP_R (g) = res;",
- "DSP_GRD (g) = SIGN32 (res);",
- "return;",
- },
- { "","", "psub Sx,Sy,Du pmuls Se,Sf,Dg", "0110eeffxxyygguu",
- "int Sx = DSP_R (x);",
- "int Sx_grd = GET_DSP_GRD (x);",
- "int Sy = DSP_R (y);",
- "int Sy_grd = SIGN32 (Sy);",
- "",
- "res = (DSP_R (e)) >> 16 * (DSP_R (f) >> 16) * 2;",
- "if (res == 0x80000000)",
- " res = 0x7fffffff;",
- "DSP_R (g) = res;",
- "DSP_GRD (g) = SIGN32 (res);",
- "",
- "z = u;",
- "res = Sx - Sy;",
- "carry = (unsigned) res > (unsigned) Sx;",
- "res_grd = Sx_grd - Sy_grd - carry;",
- "COMPUTE_OVERFLOW;",
- "ADD_SUB_GE;",
- },
- { "","", "padd Sx,Sy,Du pmuls Se,Sf,Dg", "0111eeffxxyygguu",
- "int Sx = DSP_R (x);",
- "int Sx_grd = GET_DSP_GRD (x);",
- "int Sy = DSP_R (y);",
- "int Sy_grd = SIGN32 (Sy);",
- "",
- "res = (DSP_R (e)) >> 16 * (DSP_R (f) >> 16) * 2;",
- "if (res == 0x80000000)",
- " res = 0x7fffffff;",
- "DSP_R (g) = res;",
- "DSP_GRD (g) = SIGN32 (res);",
- "",
- "z = u;",
- "res = Sx + Sy;",
- "carry = (unsigned) res < (unsigned) Sx;",
- "res_grd = Sx_grd + Sy_grd + carry;",
- "COMPUTE_OVERFLOW;",
- },
- { "","", "psubc Sx,Sy,Dz", "10100000xxyyzzzz",
- "int Sx = DSP_R (x);",
- "int Sx_grd = GET_DSP_GRD (x);",
- "int Sy = DSP_R (y);",
- "int Sy_grd = SIGN32 (Sy);",
- "",
- "res = Sx - Sy - (DSR & 1);",
- "carry = (unsigned) res > (unsigned) Sx || (res == Sx && Sy);",
- "res_grd = Sx_grd + Sy_grd + carry;",
- "COMPUTE_OVERFLOW;",
- "ADD_SUB_GE;",
- "DSR &= ~0xf1;\n",
- "if (res || res_grd)\n",
- " DSR |= greater_equal | res_grd >> 2 & DSR_MASK_N | overflow;\n",
- "else\n",
- " DSR |= DSR_MASK_Z | overflow;\n",
- "DSR |= carry;\n",
- "goto assign_z;\n",
- },
- { "","", "paddc Sx,Sy,Dz", "10110000xxyyzzzz",
- "int Sx = DSP_R (x);",
- "int Sx_grd = GET_DSP_GRD (x);",
- "int Sy = DSP_R (y);",
- "int Sy_grd = SIGN32 (Sy);",
- "",
- "res = Sx + Sy + (DSR & 1);",
- "carry = (unsigned) res < (unsigned) Sx || (res == Sx && Sy);",
- "res_grd = Sx_grd + Sy_grd + carry;",
- "COMPUTE_OVERFLOW;",
- "ADD_SUB_GE;",
- "DSR &= ~0xf1;\n",
- "if (res || res_grd)\n",
- " DSR |= greater_equal | res_grd >> 2 & DSR_MASK_N | overflow;\n",
- "else\n",
- " DSR |= DSR_MASK_Z | overflow;\n",
- "DSR |= carry;\n",
- "goto assign_z;\n",
- },
- { "","", "pcmp Sx,Sy", "10000100xxyy....",
- "int Sx = DSP_R (x);",
- "int Sx_grd = GET_DSP_GRD (x);",
- "int Sy = DSP_R (y);",
- "int Sy_grd = SIGN32 (Sy);",
- "",
- "z = 17; /* Ignore result. */",
- "res = Sx - Sy;",
- "carry = (unsigned) res > (unsigned) Sx;",
- "res_grd = Sx_grd - Sy_grd - carry;",
- "COMPUTE_OVERFLOW;",
- "ADD_SUB_GE;",
- },
- { "","", "pwsb Sx,Sy,Dz", "10100100xxyyzzzz",
- },
- { "","", "pwad Sx,Sy,Dz", "10110100xxyyzzzz",
- },
- { "","", "pabs Sx,Dz", "10001000xx..zzzz",
- "res = DSP_R (x);",
- "res_grd = GET_DSP_GRD (x);",
- "if (res >= 0)",
- " carry = 0;",
- "else",
- " {",
- " res = -res;",
- " carry = (res != 0); /* The manual has a bug here. */",
- " res_grd = -res_grd - carry;",
- " }",
- "COMPUTE_OVERFLOW;",
- "/* ??? The re-computing of overflow after",
- " saturation processing is specific to pabs. */",
- "overflow = res_grd != SIGN32 (res) ? DSR_MASK_V : 0;",
- "ADD_SUB_GE;",
- },
- { "","", "prnd Sx,Dz", "10011000xx..zzzz",
- "int Sx = DSP_R (x);",
- "int Sx_grd = GET_DSP_GRD (x);",
- "",
- "res = Sx + 0x8000;",
- "carry = (unsigned) res < (unsigned) Sx;",
- "res_grd = Sx_grd + carry;",
- "COMPUTE_OVERFLOW;",
- "ADD_SUB_GE;",
- },
- { "","", "pabs Sy,Dz", "10101000..yyzzzz",
- "res = DSP_R (y);",
- "res_grd = 0;",
- "overflow = 0;",
- "greater_equal = DSR_MASK_G;",
- "if (res >= 0)",
- " carry = 0;",
- "else",
- " {",
- " res = -res;",
- " carry = 1;",
- " if (res < 0)",
- " {",
- " if (S)",
- " res = 0x7fffffff;",
- " else",
- " {",
- " overflow = DSR_MASK_V;",
- " greater_equal = 0;",
- " }",
- " }",
- " }",
- },
- { "","", "prnd Sy,Dz", "10111000..yyzzzz",
- "int Sy = DSP_R (y);",
- "int Sy_grd = SIGN32 (Sy);",
- "",
- "res = Sy + 0x8000;",
- "carry = (unsigned) res < (unsigned) Sy;",
- "res_grd = Sy_grd + carry;",
- "COMPUTE_OVERFLOW;",
- "ADD_SUB_GE;",
- },
- { "","", "(if cc) pshl Sx,Sy,Dz", "100000ccxxyyzzzz",
- "int Sx = DSP_R (x) & 0xffff0000;",
- "int Sy = DSP_R (y) >> 16 & 0x7f;",
- "",
- "if (Sy < 16)",
- " res = Sx << Sy;",
- "else if (Sy >= 128 - 16)",
- " res = Sx >> 128 - Sy;",
- "else",
- " {",
- " RAISE_EXCEPTION (SIGILL);",
- " return;",
- " }",
- "goto cond_logical;",
- },
- { "","", "(if cc) psha Sx,Sy,Dz", "100100ccxxyyzzzz",
- "int Sx = DSP_R (x);",
- "int Sx_grd = GET_DSP_GRD (x);",
- "int Sy = DSP_R (y) >> 16 & 0x7f;",
- "",
- "if (Sy < 32)",
- " {",
- " if (Sy == 32)",
- " {",
- " res = 0;",
- " res_grd = Sx;",
- " }",
- " else",
- " {",
- " res = Sx << Sy;",
- " res_grd = Sx_grd << Sy | (unsigned) Sx >> 32 - Sy;",
- " }",
- " res_grd = SEXT (res_grd);",
- " carry = res_grd & 1;",
- " }",
- "else if (Sy >= 96)",
- " {",
- " Sy = 128 - Sy;",
- " if (Sy == 32)",
- " {",
- " res_grd = SIGN32 (Sx_grd);",
- " res = Sx_grd;",
- " }",
- " else",
- " {",
- " res = Sx >> Sy | Sx_grd << 32 - Sy;",
- " res_grd = Sx_grd >> Sy;",
- " }",
- " carry = Sx >> (Sy - 1) & 1;",
- " }",
- "else",
- " {",
- " RAISE_EXCEPTION (SIGILL);",
- " return;",
- " }",
- "COMPUTE_OVERFLOW;",
- "greater_equal = 0;",
- },
- { "","", "(if cc) psub Sx,Sy,Dz", "101000ccxxyyzzzz",
- "int Sx = DSP_R (x);",
- "int Sx_grd = GET_DSP_GRD (x);",
- "int Sy = DSP_R (y);",
- "int Sy_grd = SIGN32 (Sy);",
- "",
- "res = Sx - Sy;",
- "carry = (unsigned) res > (unsigned) Sx;",
- "res_grd = Sx_grd - Sy_grd - carry;",
- "COMPUTE_OVERFLOW;",
- "ADD_SUB_GE;",
- },
- { "","", "(if cc) padd Sx,Sy,Dz", "101100ccxxyyzzzz",
- "int Sx = DSP_R (x);",
- "int Sx_grd = GET_DSP_GRD (x);",
- "int Sy = DSP_R (y);",
- "int Sy_grd = SIGN32 (Sy);",
- "",
- "res = Sx + Sy;",
- "carry = (unsigned) res < (unsigned) Sx;",
- "res_grd = Sx_grd + Sy_grd + carry;",
- "COMPUTE_OVERFLOW;",
- "ADD_SUB_GE;",
- },
- { "","", "(if cc) pand Sx,Sy,Dz", "100101ccxxyyzzzz",
- "res = DSP_R (x) & DSP_R (y);",
- "cond_logical:",
- "res &= 0xffff0000;",
- "res_grd = 0;",
- "if (iword & 0x200)\n",
- " goto assign_z;\n",
- "logical:",
- "carry = 0;",
- "overflow = 0;",
- "greater_equal = 0;",
- "DSR &= ~0xf1;\n",
- "if (res)\n",
- " DSR |= res >> 26 & DSR_MASK_N;\n",
- "else\n",
- " DSR |= DSR_MASK_Z;\n",
- "goto assign_dc;\n",
- },
- { "","", "(if cc) pxor Sx,Sy,Dz", "101001ccxxyyzzzz",
- "res = DSP_R (x) ^ DSP_R (y);",
- "goto cond_logical;",
- },
- { "","", "(if cc) por Sx,Sy,Dz", "101101ccxxyyzzzz",
- "res = DSP_R (x) | DSP_R (y);",
- "goto cond_logical;",
- },
- { "","", "(if cc) pdec Sx,Dz", "100010ccxx..zzzz",
- "int Sx = DSP_R (x);",
- "int Sx_grd = GET_DSP_GRD (x);",
- "",
- "res = Sx - 0x10000;",
- "carry = res > Sx;",
- "res_grd = Sx_grd - carry;",
- "COMPUTE_OVERFLOW;",
- "ADD_SUB_GE;",
- "res &= 0xffff0000;",
- },
- { "","", "(if cc) pinc Sx,Dz", "100110ccxx..zzzz",
- "int Sx = DSP_R (x);",
- "int Sx_grd = GET_DSP_GRD (x);",
- "",
- "res = Sx + 0x10000;",
- "carry = res < Sx;",
- "res_grd = Sx_grd + carry;",
- "COMPUTE_OVERFLOW;",
- "ADD_SUB_GE;",
- "res &= 0xffff0000;",
- },
- { "","", "(if cc) pdec Sy,Dz", "101010cc..yyzzzz",
- "int Sy = DSP_R (y);",
- "int Sy_grd = SIGN32 (Sy);",
- "",
- "res = Sy - 0x10000;",
- "carry = res > Sy;",
- "res_grd = Sy_grd - carry;",
- "COMPUTE_OVERFLOW;",
- "ADD_SUB_GE;",
- "res &= 0xffff0000;",
- },
- { "","", "(if cc) pinc Sy,Dz", "101110cc..yyzzzz",
- "int Sy = DSP_R (y);",
- "int Sy_grd = SIGN32 (Sy);",
- "",
- "res = Sy + 0x10000;",
- "carry = res < Sy;",
- "res_grd = Sy_grd + carry;",
- "COMPUTE_OVERFLOW;",
- "ADD_SUB_GE;",
- "res &= 0xffff0000;",
- },
- { "","", "(if cc) pclr Dz", "100011cc....zzzz",
- "res = 0;",
- "res_grd = 0;",
- "carry = 0;",
- "overflow = 0;",
- "greater_equal = 1;",
- },
- { "","", "(if cc) pdmsb Sx,Dz", "100111ccxx..zzzz",
- "unsigned Sx = DSP_R (x);",
- "int Sx_grd = GET_DSP_GRD (x);",
- "int i = 16;",
- "",
- "if (Sx_grd < 0)",
- " {",
- " Sx_grd = ~Sx_grd;",
- " Sx = ~Sx;",
- " }",
- "if (Sx_grd)",
- " {",
- " Sx = Sx_grd;",
- " res = -2;",
- " }",
- "else if (Sx)",
- " res = 30;",
- "else",
- " res = 31;",
- "do",
- " {",
- " if (Sx & ~0 << i)",
- " {",
- " res -= i;",
- " Sx >>= i;",
- " }",
- " }",
- "while (i >>= 1);",
- "res <<= 16;",
- "res_grd = SIGN32 (res);",
- "carry = 0;",
- "overflow = 0;",
- "ADD_SUB_GE;",
- },
- { "","", "(if cc) pdmsb Sy,Dz", "101111cc..yyzzzz",
- "unsigned Sy = DSP_R (y);",
- "int i;",
- "",
- "if (Sy < 0)",
- " Sy = ~Sy;",
- "Sy <<= 1;",
- "res = 31;",
- "do",
- " {",
- " if (Sy & ~0 << i)",
- " {",
- " res -= i;",
- " Sy >>= i;",
- " }",
- " }",
- "while (i >>= 1);",
- "res <<= 16;",
- "res_grd = SIGN32 (res);",
- "carry = 0;",
- "overflow = 0;",
- "ADD_SUB_GE;",
- },
- { "","", "(if cc) pneg Sx,Dz", "110010ccxx..zzzz",
- "int Sx = DSP_R (x);",
- "int Sx_grd = GET_DSP_GRD (x);",
- "",
- "res = 0 - Sx;",
- "carry = res != 0;",
- "res_grd = 0 - Sx_grd - carry;",
- "COMPUTE_OVERFLOW;",
- "ADD_SUB_GE;",
- },
- { "","", "(if cc) pcopy Sx,Dz", "110110ccxx..zzzz",
- "res = DSP_R (x);",
- "res_grd = GET_DSP_GRD (x);",
- "carry = 0;",
- "COMPUTE_OVERFLOW;",
- "ADD_SUB_GE;",
- },
- { "","", "(if cc) pneg Sy,Dz", "111010cc..yyzzzz",
- "int Sy = DSP_R (y);",
- "int Sy_grd = SIGN32 (Sy);",
- "",
- "res = 0 - Sy;",
- "carry = res != 0;",
- "res_grd = 0 - Sy_grd - carry;",
- "COMPUTE_OVERFLOW;",
- "ADD_SUB_GE;",
- },
- { "","", "(if cc) pcopy Sy,Dz", "111110cc..yyzzzz",
- "res = DSP_R (y);",
- "res_grd = SIGN32 (res);",
- "carry = 0;",
- "COMPUTE_OVERFLOW;",
- "ADD_SUB_GE;",
- },
- { "","", "(if cc) psts MACH,Dz", "110011cc....zzzz",
- "res = MACH;",
- "res_grd = SIGN32 (res);",
- "goto assign_z;",
- },
- { "","", "(if cc) psts MACL,Dz", "110111cc....zzzz",
- "res = MACL;",
- "res_grd = SIGN32 (res);",
- "goto assign_z;",
- },
- { "","", "(if cc) plds Dz,MACH", "111011cc....zzzz",
- "if (0xa05f >> z & 1)",
- " RAISE_EXCEPTION (SIGILL);",
- "else",
- " MACH = DSP_R (z);",
- "return;",
- },
- { "","", "(if cc) plds Dz,MACL", "111111cc....zzzz",
- "if (0xa05f >> z & 1)",
- " RAISE_EXCEPTION (SIGILL);",
- "else",
- " MACL = DSP_R (z) = res;",
- "return;",
- },
- {0, 0}
-};
-
-/* Tables of things to put into enums for sh-opc.h */
-static char *nibble_type_list[] =
-{
- "HEX_0",
- "HEX_1",
- "HEX_2",
- "HEX_3",
- "HEX_4",
- "HEX_5",
- "HEX_6",
- "HEX_7",
- "HEX_8",
- "HEX_9",
- "HEX_A",
- "HEX_B",
- "HEX_C",
- "HEX_D",
- "HEX_E",
- "HEX_F",
- "REG_N",
- "REG_M",
- "BRANCH_12",
- "BRANCH_8",
- "DISP_8",
- "DISP_4",
- "IMM_4",
- "IMM_4BY2",
- "IMM_4BY4",
- "PCRELIMM_8BY2",
- "PCRELIMM_8BY4",
- "IMM_8",
- "IMM_8BY2",
- "IMM_8BY4",
- 0
-};
-static
-char *arg_type_list[] =
-{
- "A_END",
- "A_BDISP12",
- "A_BDISP8",
- "A_DEC_M",
- "A_DEC_N",
- "A_DISP_GBR",
- "A_DISP_PC",
- "A_DISP_REG_M",
- "A_DISP_REG_N",
- "A_GBR",
- "A_IMM",
- "A_INC_M",
- "A_INC_N",
- "A_IND_M",
- "A_IND_N",
- "A_IND_R0_REG_M",
- "A_IND_R0_REG_N",
- "A_MACH",
- "A_MACL",
- "A_PR",
- "A_R0",
- "A_R0_GBR",
- "A_REG_M",
- "A_REG_N",
- "A_SR",
- "A_VBR",
- "A_SSR",
- "A_SPC",
- 0,
-};
-
-static void
-make_enum_list (name, s)
- char *name;
- char **s;
-{
- int i = 1;
- printf ("typedef enum {\n");
- while (*s)
- {
- printf ("\t%s,\n", *s);
- s++;
- i++;
- }
- printf ("} %s;\n", name);
-}
-
-static int
-qfunc (a, b)
- op *a;
- op *b;
-{
- char bufa[9];
- char bufb[9];
- int diff;
-
- memcpy (bufa, a->code, 4);
- memcpy (bufa + 4, a->code + 12, 4);
- bufa[8] = 0;
-
- memcpy (bufb, b->code, 4);
- memcpy (bufb + 4, b->code + 12, 4);
- bufb[8] = 0;
- diff = strcmp (bufa, bufb);
- /* Stabilize the sort, so that later entries can override more general
- preceding entries. */
- return diff ? diff : a - b;
-}
-
-static void
-sorttab ()
-{
- op *p = tab;
- int len = 0;
-
- while (p->name)
- {
- p++;
- len++;
- }
- qsort (tab, len, sizeof (*p), qfunc);
-}
-
-static void
-gengastab ()
-{
- op *p;
- sorttab ();
- for (p = tab; p->name; p++)
- {
- printf ("%s %-30s\n", p->code, p->name);
- }
-
-
-}
-
-/* Convert a string of 4 binary digits into an int */
-
-static
-int
-bton (s)
- char *s;
-
-{
- int n = 0;
- int v = 8;
- while (v)
- {
- if (*s == '1')
- n |= v;
- v >>= 1;
- s++;
- }
- return n;
-}
-
-static unsigned char table[1 << 16];
-
-/* Take an opcode expand all varying fields in it out and fill all the
- right entries in 'table' with the opcode index*/
-
-static void
-expand_opcode (shift, val, i, s)
- int shift;
- int val;
- int i;
- char *s;
-{
- int j;
-
- if (*s == 0)
- {
- table[val] = i;
- }
- else
- {
- switch (s[0])
- {
-
- case '0':
- case '1':
- {
- int m, mv;
-
- val |= bton (s) << shift;
- if (s[2] == '0' || s[2] == '1')
- expand_opcode (shift - 4, val, i, s + 4);
- else if (s[2] == 'N')
- for (j = 0; j < 4; j++)
- expand_opcode (shift - 4, val | (j << shift), i, s + 4);
- else if (s[2] == 'x')
- for (j = 0; j < 4; j += 2)
- for (m = 0; m < 32; m++)
- {
- /* Ignore illegal nopy */
- if ((m & 7) == 0 && m != 0)
- continue;
- mv = m & 3 | (m & 4) << 2 | (m & 8) << 3 | (m & 16) << 4;
- expand_opcode (shift - 4, val | mv | (j << shift), i,
- s + 4);
- }
- else if (s[2] == 'y')
- for (j = 0; j < 2; j++)
- expand_opcode (shift - 4, val | (j << shift), i, s + 4);
- break;
- }
- case 'n':
- case 'm':
- for (j = 0; j < 16; j++)
- {
- expand_opcode (shift - 4, val | (j << shift), i, s + 4);
-
- }
- break;
- case 'M':
- /* A1, A0,X0,X1,Y0,Y1,M0,A1G,M1,M1G */
- for (j = 5; j < 16; j++)
- if (j != 6)
- expand_opcode (shift - 4, val | (j << shift), i, s + 4);
- break;
- case 'G':
- /* A1G, A0G: */
- for (j = 13; j <= 15; j +=2)
- expand_opcode (shift - 4, val | (j << shift), i, s + 4);
- break;
- case 's':
- /* System registers mach, macl, pr: */
- for (j = 0; j < 3; j++)
- expand_opcode (shift - 4, val | (j << shift), i, s + 4);
- /* System registers fpul, fpscr/dsr, a0, x0, x1, y0, y1: */
- for (j = 5; j < 12; j++)
- expand_opcode (shift - 4, val | (j << shift), i, s + 4);
- break;
- case 'X':
- case 'a':
- val |= bton (s) << shift;
- for (j = 0; j < 16; j += 8)
- expand_opcode (shift - 4, val | (j << shift), i, s + 4);
- break;
- case 'Y':
- case 'A':
- val |= bton (s) << shift;
- for (j = 0; j < 8; j += 4)
- expand_opcode (shift - 4, val | (j << shift), i, s + 4);
- break;
-
- default:
- for (j = 0; j < (1 << (shift + 4)); j++)
- {
- table[val | j] = i;
- }
- }
- }
-}
-
-/* Print the jump table used to index an opcode into a switch
- statement entry. */
-
-static void
-dumptable (name, size, start)
- char *name;
- int size;
- int start;
-{
- int lump = 256;
- int online = 16;
-
- int i = start;
-
- printf ("unsigned char %s[%d]={\n", name, size);
- while (i < start + size)
- {
- int j = 0;
-
- printf ("/* 0x%x */\n", i);
-
- while (j < lump)
- {
- int k = 0;
- while (k < online)
- {
- printf ("%2d", table[i + j + k]);
- if (j + k < lump)
- printf (",");
-
- k++;
- }
- j += k;
- printf ("\n");
- }
- i += j;
- }
- printf ("};\n");
-}
-
-
-static void
-filltable (p)
- op *p;
-{
- static int index = 1;
-
- sorttab ();
- for (; p->name; p++)
- {
- p->index = index++;
- expand_opcode (12, 0, p->index, p->code);
- }
-}
-
-/* Table already contais all the switch case tags for 16-bit opcode double
- data transfer (ddt) insns, and the switch case tag for processing parallel
- processing insns (ppi) for code 0xf800 (ppi nopx nopy). Copy the
- latter tag to represent all combinations of ppi with ddt. */
-static void
-ppi_moves ()
-{
- int i;
-
- for (i = 0xf000; i < 0xf400; i++)
- if (table[i])
- table[i + 0x800] = table[0xf800];
-}
-
-static void
-gensim_caselist (p)
- op *p;
-{
- for (; p->name; p++)
- {
- int j;
- int sextbit = -1;
- int needm = 0;
- int needn = 0;
-
- char *s = p->code;
-
- printf (" /* %s %s */\n", p->name, p->code);
- printf (" case %d: \n", p->index);
-
- printf (" {\n");
- while (*s)
- {
- switch (*s)
- {
- case '0':
- case '1':
- s += 2;
- break;
- case '.':
- s += 4;
- break;
- case 'n':
- printf (" int n = (iword >>8) & 0xf;\n");
- needn = 1;
- s += 4;
- break;
- case 'N':
- printf (" int n = (((iword >> 8) - 2) & 0x3) + 2;\n");
- s += 2;
- break;
- case 'x':
- printf (" int n = ((iword >> 9) & 1) + 4;\n");
- needn = 1;
- s += 2;
- break;
- case 'y':
- printf (" int n = ((iword >> 8) & 1) + 4;\n");
- needn = 1;
- s += 2;
- break;
- case 'm':
- needm = 1;
- case 's':
- case 'M':
- case 'G':
- printf (" int m = (iword >>4) & 0xf;\n");
- s += 4;
- break;
- case 'X':
- printf (" int m = ((iword >> 7) & 1) + 8;\n");
- s += 2;
- break;
- case 'a':
- printf (" int m = 7 - ((iword >> 6) & 2);\n");
- s += 2;
- break;
- case 'Y':
- printf (" int m = ((iword >> 6) & 1) + 10;\n");
- s += 2;
- break;
- case 'A':
- printf (" int m = 7 - ((iword >> 5) & 2);\n");
- s += 2;
- break;
-
- case 'i':
- printf (" int i = (iword & 0x");
-
- switch (s[1])
- {
- case '4':
- printf ("f");
- break;
- case '8':
- printf ("ff");
- break;
- case '1':
- sextbit = 12;
-
- printf ("fff");
- break;
- }
- printf (")");
-
- switch (s[3])
- {
- case '1':
- break;
- case '2':
- printf ("<<1");
- break;
- case '4':
- printf ("<<2");
- break;
- }
- printf (";\n");
- s += 4;
- }
- }
- if (sextbit > 0)
- {
- printf (" i = (i ^ (1<<%d))-(1<<%d);\n",
- sextbit - 1, sextbit - 1);
- }
-
- if (needm && needn)
- printf (" TB(m,n);\n");
- else if (needm)
- printf (" TL(m);\n");
- else if (needn)
- printf (" TL(n);\n");
-
- {
- /* Do the refs */
- char *r;
- for (r = p->refs; *r; r++)
- {
- if (*r == '0') printf(" CREF(0);\n");
- if (*r == '8') printf(" CREF(8);\n");
- if (*r == '9') printf(" CREF(9);\n");
- if (*r == 'n') printf(" CREF(n);\n");
- if (*r == 'm') printf(" CREF(m);\n");
- }
- }
-
- printf (" {\n");
- for (j = 0; j < MAX_NR_STUFF; j++)
- {
- if (p->stuff[j])
- {
- printf (" %s\n", p->stuff[j]);
- }
- }
- printf (" }\n");
-
- {
- /* Do the defs */
- char *r;
- for (r = p->defs; *r; r++)
- {
- if (*r == '0') printf(" CDEF(0);\n");
- if (*r == 'n') printf(" CDEF(n);\n");
- if (*r == 'm') printf(" CDEF(m);\n");
- }
- }
-
- printf (" break;\n");
- printf (" }\n");
- }
-}
-
-static void
-gensim ()
-{
- printf ("{\n");
- printf (" switch (jump_table[iword]) {\n");
-
- gensim_caselist (tab);
- gensim_caselist (movsxy_tab);
-
- printf (" default:\n");
- printf (" {\n");
- printf (" RAISE_EXCEPTION (SIGILL);\n");
- printf (" }\n");
- printf (" }\n");
- printf ("}\n");
-}
-
-static void
-gendefines ()
-{
- op *p;
- filltable (tab);
- for (p = tab; p->name; p++)
- {
- char *s = p->name;
- printf ("#define OPC_");
- while (*s) {
- if (isupper(*s))
- *s = tolower(*s);
- if (isalpha(*s)) printf("%c", *s);
- if (*s == ' ') printf("_");
- if (*s == '@') printf("ind_");
- if (*s == ',') printf("_");
- s++;
- }
- printf(" %d\n",p->index);
- }
-}
-
-static int ppi_index;
-
-/* Take an ppi code, expand all varying fields in it and fill all the
- right entries in 'table' with the opcode index. */
-
-static void
-expand_ppi_code (val, i, s)
- int val;
- int i;
- char *s;
-{
- int j;
-
- for (;;)
- {
- switch (s[0])
- {
- /* The last eight bits are disregarded for the switch table. */
- case 'm':
- case 'x':
- case '.':
- table[val] = i;
- return;
- case '0':
- val += val;
- s++;
- break;
- case '1':
- val += val + 1;
- s++;
- break;
- case 'i':
- case 'e': case 'f':
- val += val;
- s++;
- expand_ppi_code (val, i, s);
- val++;
- break;
- case 'c':
- val <<= 2;
- s += 2;
- val++;
- expand_ppi_code (val, ppi_index++, s);
- val++;
- expand_ppi_code (val, i, s);
- val++;
- break;
- }
- }
-}
-
-static void
-ppi_filltable ()
-{
- op *p;
- ppi_index = 1;
-
- for (p = ppi_tab; p->name; p++)
- {
- p->index = ppi_index++;
- expand_ppi_code (0, p->index, p->code);
- }
-}
-
-static void
-ppi_gensim ()
-{
- op *p = ppi_tab;
-
- printf ("#define DSR_MASK_G 0x80\n");
- printf ("#define DSR_MASK_Z 0x40\n");
- printf ("#define DSR_MASK_N 0x20\n");
- printf ("#define DSR_MASK_V 0x10\n");
- printf ("\n");
- printf ("#define COMPUTE_OVERFLOW do {\\\n");
- printf (" overflow = res_grd != SIGN32 (res) ? DSR_MASK_V : 0; \\\n");
- printf (" if (overflow && S) \\\n");
- printf (" { \\\n");
- printf (" if (res_grd & 0x80) \\\n");
- printf (" { \\\n");
- printf (" res = 0x80000000; \\\n");
- printf (" res_grd |= 0xff; \\\n");
- printf (" } \\\n");
- printf (" else \\\n");
- printf (" { \\\n");
- printf (" res = 0x7fffffff; \\\n");
- printf (" res_grd &= ~0xff; \\\n");
- printf (" } \\\n");
- printf (" overflow = 0; \\\n");
- printf (" } \\\n");
- printf ("} while (0)\n");
- printf ("\n");
- printf ("#define ADD_SUB_GE \\\n");
- printf (" (greater_equal = ~(overflow << 3 & res_grd) & DSR_MASK_G)\n");
- printf ("\n");
- printf ("static void\n");
- printf ("ppi_insn (iword)\n");
- printf (" int iword;\n");
- printf ("{\n");
- printf (" static char e_tab[] = { 8, 9, 10, 5};\n");
- printf (" static char f_tab[] = {10, 11, 8, 5};\n");
- printf (" static char x_tab[] = { 8, 9, 7, 5};\n");
- printf (" static char y_tab[] = {10, 11, 12, 14};\n");
- printf (" static char g_tab[] = {12, 14, 7, 5};\n");
- printf (" static char u_tab[] = { 8, 10, 7, 5};\n");
- printf ("\n");
- printf (" int z;\n");
- printf (" int res, res_grd;\n");
- printf (" int carry, overflow, greater_equal;\n");
- printf ("\n");
- printf (" switch (ppi_table[iword >> 8]) {\n");
-
- for (; p->name; p++)
- {
- int shift, j;
- int cond = 0;
- int havedecl = 0;
-
- char *s = p->code;
-
- printf (" /* %s %s */\n", p->name, p->code);
- printf (" case %d: \n", p->index);
-
- printf (" {\n");
- for (shift = 16; *s; )
- {
- switch (*s)
- {
- case 'i':
- printf (" int i = (iword >> 4) & 0x7f;\n");
- s += 6;
- break;
- case 'e':
- case 'f':
- case 'x':
- case 'y':
- case 'g':
- case 'u':
- shift -= 2;
- printf (" int %c = %c_tab[(iword >> %d) & 3];\n",
- *s, *s, shift);
- havedecl = 1;
- s += 2;
- break;
- case 'c':
- printf (" if ((((iword >> 8) ^ DSR) & 1) == 0)\n");
- printf ("\tbreak;\n");
- printf (" }\n");
- printf (" case %d: \n", p->index + 1);
- printf (" {\n");
- cond = 1;
- case '0':
- case '1':
- case '.':
- shift -= 2;
- s += 2;
- break;
- case 'z':
- if (havedecl)
- printf ("\n");
- printf (" z = iword & 0xf;\n");
- havedecl = 2;
- s += 4;
- break;
- }
- }
- if (havedecl == 1)
- printf ("\n");
- else if (havedecl == 2)
- printf (" {\n");
- for (j = 0; j < MAX_NR_STUFF; j++)
- {
- if (p->stuff[j])
- {
- printf (" %s%s\n",
- (havedecl == 2 ? " " : ""),
- p->stuff[j]);
- }
- }
- if (havedecl == 2)
- printf (" }\n");
- if (cond)
- {
- printf (" if (iword & 0x200)\n");
- printf (" goto assign_z;\n");
- }
- printf (" break;\n");
- printf (" }\n");
- }
-
- printf (" default:\n");
- printf (" {\n");
- printf (" RAISE_EXCEPTION (SIGILL);\n");
- printf (" return;\n");
- printf (" }\n");
- printf (" }\n");
- printf (" DSR &= ~0xf1;\n");
- printf (" if (res || res_grd)\n");
- printf (" DSR |= greater_equal | res_grd >> 2 & DSR_MASK_N | overflow;\n");
- printf (" else\n");
- printf (" DSR |= DSR_MASK_Z | overflow;\n");
- printf (" assign_dc:\n");
- printf (" switch (DSR >> 1 & 7)\n");
- printf (" {\n");
- printf (" case 0: /* Carry Mode */\n");
- printf (" DSR |= carry;\n");
- printf (" case 1: /* Negative Value Mode */\n");
- printf (" DSR |= res_grd >> 7 & 1;\n");
- printf (" case 2: /* Zero Value Mode */\n");
- printf (" DSR |= DSR >> 6 & 1;\n");
- printf (" case 3: /* Overflow mode\n");
- printf (" DSR |= overflow >> 4;\n");
- printf (" case 4: /* Signed Greater Than Mode */\n");
- printf (" DSR |= DSR >> 7 & 1;\n");
- printf (" case 4: /* Signed Greater Than Or Equal Mode */\n");
- printf (" DSR |= greater_equal >> 7;\n");
- printf (" }\n");
- printf (" assign_z:\n");
- printf (" if (0xa05f >> z & 1)\n");
- printf (" {\n");
- printf (" RAISE_EXCEPTION (SIGILL);\n");
- printf (" return;\n");
- printf (" }\n");
- printf (" DSP_R (z) = res;\n");
- printf (" DSP_GRD (z) = res_grd;\n");
- printf ("}\n");
-}
-
-int
-main (ac, av)
- int ac;
- char **av;
-{
- /* verify the table before anything else */
- {
- op *p;
- for (p = tab; p->name; p++)
- {
- /* check that the code field contains 16 bits */
- if (strlen (p->code) != 16)
- {
- fprintf (stderr, "Code `%s' length wrong (%d) for `%s'\n",
- p->code, strlen (p->code), p->name);
- abort ();
- }
- }
- }
-
- /* now generate the requested data */
- if (ac > 1)
- {
- if (strcmp (av[1], "-t") == 0)
- {
- gengastab ();
- }
- else if (strcmp (av[1], "-d") == 0)
- {
- gendefines ();
- }
- else if (strcmp (av[1], "-s") == 0)
- {
- filltable (tab);
- dumptable ("sh_jump_table", 1 << 16, 0);
-
- memset (table, 0, sizeof table);
- filltable (movsxy_tab);
- ppi_moves ();
- dumptable ("sh_dsp_table", 1 << 12, 0xf000);
-
- memset (table, 0, sizeof table);
- ppi_filltable ();
- dumptable ("ppi_table", 1 << 8, 0);
- }
- else if (strcmp (av[1], "-x") == 0)
- {
- filltable (tab);
- filltable (movsxy_tab);
- gensim ();
- }
- else if (strcmp (av[1], "-p") == 0)
- {
- ppi_filltable ();
- ppi_gensim ();
- }
- }
- else
- fprintf (stderr, "Opcode table generation no longer supported.\n");
- return 0;
-}
diff --git a/sim/sh/interp.c b/sim/sh/interp.c
deleted file mode 100644
index 99f51d16a2c..00000000000
--- a/sim/sh/interp.c
+++ /dev/null
@@ -1,2235 +0,0 @@
-/* Simulator for the Hitachi SH architecture.
-
- Written by Steve Chamberlain of Cygnus Support.
- sac@cygnus.com
-
- This file is part of SH sim
-
-
- THIS SOFTWARE IS NOT COPYRIGHTED
-
- Cygnus offers the following for use in the public domain. Cygnus
- makes no warranty with regard to the software or it's performance
- and the user accepts the software "AS IS" with all faults.
-
- CYGNUS DISCLAIMS ANY WARRANTIES, EXPRESS OR IMPLIED, WITH REGARD TO
- THIS SOFTWARE INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.
-
-*/
-
-#include "config.h"
-
-#include <signal.h>
-#ifdef HAVE_UNISTD_H
-#include <unistd.h>
-#endif
-
-#include "sysdep.h"
-#include "bfd.h"
-#include "callback.h"
-#include "remote-sim.h"
-
-/* This file is local - if newlib changes, then so should this. */
-#include "syscall.h"
-
-#include <math.h>
-
-#ifdef _WIN32
-#include <float.h> /* Needed for _isnan() */
-#define isnan _isnan
-#endif
-
-#ifndef SIGBUS
-#define SIGBUS SIGSEGV
-#endif
-
-#ifndef SIGQUIT
-#define SIGQUIT SIGTERM
-#endif
-
-#ifndef SIGTRAP
-#define SIGTRAP 5
-#endif
-
-extern unsigned char sh_jump_table[], sh_dsp_table[0x1000], ppi_table[];
-
-int sim_write (SIM_DESC sd, SIM_ADDR addr, unsigned char *buffer, int size);
-
-#define O_RECOMPILE 85
-#define DEFINE_TABLE
-#define DISASSEMBLER_TABLE
-
-/* Define the rate at which the simulator should poll the host
- for a quit. */
-#define POLL_QUIT_INTERVAL 0x60000
-
-typedef union
-{
-
- struct
- {
- int regs[16];
- int pc;
-
- /* System registers. For sh-dsp this also includes A0 / X0 / X1 / Y0 / Y1
- which are located in fregs, i.e. strictly speaking, these are
- out-of-bounds accesses of sregs.i . This wart of the code could be
- fixed by making fregs part of sregs, and including pc too - to avoid
- alignment repercussions - but this would cause very onerous union /
- structure nesting, which would only be managable with anonymous
- unions and structs. */
- union
- {
- struct
- {
- int mach;
- int macl;
- int pr;
- int dummy3, dummy4;
- int fpul; /* A1 for sh-dsp - but only for movs etc. */
- int fpscr; /* dsr for sh-dsp */
- } named;
- int i[7];
- } sregs;
-
- /* sh3e / sh-dsp */
- union fregs_u
- {
- float f[16];
- double d[8];
- int i[16];
- }
- fregs[2];
-
- /* Control registers; on the SH4, ldc / stc is privileged, except when
- accessing gbr. */
- union
- {
- struct
- {
- int sr;
- int gbr;
- int vbr;
- int ssr;
- int spc;
- int mod;
- /* sh-dsp */
- int rs;
- int re;
- /* sh3 */
- int bank[8];
- } named;
- int i[16];
- } cregs;
-
- unsigned char *insn_end;
-
- int ticks;
- int stalls;
- int memstalls;
- int cycles;
- int insts;
-
- int prevlock;
- int thislock;
- int exception;
-
- int end_of_registers;
-
- int msize;
-#define PROFILE_FREQ 1
-#define PROFILE_SHIFT 2
- int profile;
- unsigned short *profile_hist;
- unsigned char *memory;
- int xyram_select, xram_start, yram_start;
- unsigned char *xmem;
- unsigned char *ymem;
- unsigned char *xmem_offset;
- unsigned char *ymem_offset;
- }
- asregs;
- int asints[40];
-} saved_state_type;
-
-saved_state_type saved_state;
-
-struct loop_bounds { unsigned char *start, *end; };
-
-/* These variables are at file scope so that functions other than
- sim_resume can use the fetch/store macros */
-
-static int target_little_endian;
-static int global_endianw, endianb;
-static int target_dsp;
-static int host_little_endian;
-static char **prog_argv;
-
-#if 1
-static int maskw = 0;
-#endif
-
-static SIM_OPEN_KIND sim_kind;
-static char *myname;
-
-
-/* Short hand definitions of the registers */
-
-#define SBIT(x) ((x)&sbit)
-#define R0 saved_state.asregs.regs[0]
-#define Rn saved_state.asregs.regs[n]
-#define Rm saved_state.asregs.regs[m]
-#define UR0 (unsigned int)(saved_state.asregs.regs[0])
-#define UR (unsigned int)R
-#define UR (unsigned int)R
-#define SR0 saved_state.asregs.regs[0]
-#define CREG(n) (saved_state.asregs.cregs.i[(n)])
-#define GBR saved_state.asregs.cregs.named.gbr
-#define VBR saved_state.asregs.cregs.named.vbr
-#define SSR saved_state.asregs.cregs.named.ssr
-#define SPC saved_state.asregs.cregs.named.spc
-#define SREG(n) (saved_state.asregs.sregs.i[(n)])
-#define MACH saved_state.asregs.sregs.named.mach
-#define MACL saved_state.asregs.sregs.named.macl
-#define PR saved_state.asregs.sregs.named.pr
-#define FPUL saved_state.asregs.sregs.named.fpul
-
-#define PC insn_ptr
-
-
-
-/* Alternate bank of registers r0-r7 */
-
-/* Note: code controling SR handles flips between BANK0 and BANK1 */
-#define Rn_BANK(n) (saved_state.asregs.cregs.named.bank[(n)])
-#define SET_Rn_BANK(n, EXP) do { saved_state.asregs.cregs.named.bank[(n)] = (EXP); } while (0)
-
-
-/* Manipulate SR */
-
-#define SR_MASK_DMY (1 << 11)
-#define SR_MASK_DMX (1 << 10)
-#define SR_MASK_M (1 << 9)
-#define SR_MASK_Q (1 << 8)
-#define SR_MASK_I (0xf << 4)
-#define SR_MASK_S (1 << 1)
-#define SR_MASK_T (1 << 0)
-
-#define SR_MASK_BL (1 << 28)
-#define SR_MASK_RB (1 << 29)
-#define SR_MASK_MD (1 << 30)
-#define SR_MASK_RC 0x0fff0000
-#define SR_RC_INCREMENT -0x00010000
-
-#define M ((saved_state.asregs.cregs.named.sr & SR_MASK_M) != 0)
-#define Q ((saved_state.asregs.cregs.named.sr & SR_MASK_Q) != 0)
-#define S ((saved_state.asregs.cregs.named.sr & SR_MASK_S) != 0)
-#define T ((saved_state.asregs.cregs.named.sr & SR_MASK_T) != 0)
-
-#define SR_BL ((saved_state.asregs.cregs.named.sr & SR_MASK_BL) != 0)
-#define SR_RB ((saved_state.asregs.cregs.named.sr & SR_MASK_RB) != 0)
-#define SR_MD ((saved_state.asregs.cregs.named.sr & SR_MASK_MD) != 0)
-#define SR_DMY ((saved_state.asregs.cregs.named.sr & SR_MASK_DMY) != 0)
-#define SR_DMX ((saved_state.asregs.cregs.named.sr & SR_MASK_DMX) != 0)
-#define SR_RC ((saved_state.asregs.cregs.named.sr & SR_MASK_RC))
-
-/* Note: don't use this for privileged bits */
-#define SET_SR_BIT(EXP, BIT) \
-do { \
- if ((EXP) & 1) \
- saved_state.asregs.cregs.named.sr |= (BIT); \
- else \
- saved_state.asregs.cregs.named.sr &= ~(BIT); \
-} while (0)
-
-#define SET_SR_M(EXP) SET_SR_BIT ((EXP), SR_MASK_M)
-#define SET_SR_Q(EXP) SET_SR_BIT ((EXP), SR_MASK_Q)
-#define SET_SR_S(EXP) SET_SR_BIT ((EXP), SR_MASK_S)
-#define SET_SR_T(EXP) SET_SR_BIT ((EXP), SR_MASK_T)
-
-/* stc currently relies on being able to read SR without modifications. */
-#define GET_SR() (saved_state.asregs.cregs.named.sr - 0)
-
-#define SET_SR(x) set_sr (x)
-
-#define SET_RC(x) \
- (saved_state.asregs.cregs.named.sr \
- = saved_state.asregs.cregs.named.sr & 0xf000ffff | ((x) & 0xfff) << 16)
-
-/* Manipulate FPSCR */
-
-#define FPSCR_MASK_FR (1 << 21)
-#define FPSCR_MASK_SZ (1 << 20)
-#define FPSCR_MASK_PR (1 << 19)
-
-#define FPSCR_FR ((GET_FPSCR() & FPSCR_MASK_FR) != 0)
-#define FPSCR_SZ ((GET_FPSCR() & FPSCR_MASK_SZ) != 0)
-#define FPSCR_PR ((GET_FPSCR() & FPSCR_MASK_PR) != 0)
-
-/* Count the number of arguments in an argv. */
-static int
-count_argc (char **argv)
-{
- int i;
-
- if (! argv)
- return -1;
-
- for (i = 0; argv[i] != NULL; ++i)
- continue;
- return i;
-}
-
-static void
-set_fpscr1 (x)
- int x;
-{
- int old = saved_state.asregs.sregs.named.fpscr;
- saved_state.asregs.sregs.named.fpscr = (x);
- /* swap the floating point register banks */
- if ((saved_state.asregs.sregs.named.fpscr ^ old) & FPSCR_MASK_FR
- /* Ignore bit change if simulating sh-dsp. */
- && ! target_dsp)
- {
- union fregs_u tmpf = saved_state.asregs.fregs[0];
- saved_state.asregs.fregs[0] = saved_state.asregs.fregs[1];
- saved_state.asregs.fregs[1] = tmpf;
- }
-}
-
-/* sts relies on being able to read fpscr directly. */
-#define GET_FPSCR() (saved_state.asregs.sregs.named.fpscr)
-#define SET_FPSCR(x) \
-do { \
- set_fpscr1 (x); \
-} while (0)
-
-#define DSR (saved_state.asregs.sregs.named.fpscr)
-
-int
-fail ()
-{
- abort ();
-}
-
-#define RAISE_EXCEPTION(x) \
- (saved_state.asregs.exception = x, saved_state.asregs.insn_end = 0)
-
-/* This function exists mainly for the purpose of setting a breakpoint to
- catch simulated bus errors when running the simulator under GDB. */
-
-void
-raise_exception (x)
- int x;
-{
- RAISE_EXCEPTION(x);
-}
-
-void
-raise_buserror ()
-{
- raise_exception (SIGBUS);
-}
-
-#define PROCESS_SPECIAL_ADDRESS(addr, endian, ptr, bits_written, \
- forbidden_addr_bits, data, retval) \
-do { \
- if (addr & forbidden_addr_bits) \
- { \
- raise_buserror (); \
- return retval; \
- } \
- else if ((addr & saved_state.asregs.xyram_select) \
- == saved_state.asregs.xram_start) \
- ptr = (void *) &saved_state.asregs.xmem_offset[addr ^ endian]; \
- else if ((addr & saved_state.asregs.xyram_select) \
- == saved_state.asregs.yram_start) \
- ptr = (void *) &saved_state.asregs.ymem_offset[addr ^ endian]; \
- else if ((unsigned) addr >> 24 == 0xf0 \
- && bits_written == 32 && (data & 1) == 0) \
- /* This invalidates (if not associative) or might invalidate \
- (if associative) an instruction cache line. This is used for \
- trampolines. Since we don't simulate the cache, this is a no-op \
- as far as the simulator is concerned. */ \
- return retval; \
- else \
- { \
- if (bits_written == 8 && addr > 0x5000000) \
- IOMEM (addr, 1, data); \
- /* We can't do anything useful with the other stuff, so fail. */ \
- raise_buserror (); \
- return retval; \
- } \
-} while (0)
-
-/* FIXME: sim_resume should be renamed to sim_engine_run. sim_resume
- being implemented by ../common/sim_resume.c and the below should
- make a call to sim_engine_halt */
-
-#define BUSERROR(addr, mask) ((addr) & (mask))
-
-#define WRITE_BUSERROR(addr, mask, data, addr_func) \
- do \
- { \
- if (addr & mask) \
- { \
- addr_func (addr, data); \
- return; \
- } \
- } \
- while (0)
-
-#define READ_BUSERROR(addr, mask, addr_func) \
- do \
- { \
- if (addr & mask) \
- return addr_func (addr); \
- } \
- while (0)
-
-/* Define this to enable register lifetime checking.
- The compiler generates "add #0,rn" insns to mark registers as invalid,
- the simulator uses this info to call fail if it finds a ref to an invalid
- register before a def
-
- #define PARANOID
-*/
-
-#ifdef PARANOID
-int valid[16];
-#define CREF(x) if(!valid[x]) fail();
-#define CDEF(x) valid[x] = 1;
-#define UNDEF(x) valid[x] = 0;
-#else
-#define CREF(x)
-#define CDEF(x)
-#define UNDEF(x)
-#endif
-
-static void parse_and_set_memory_size PARAMS ((char *str));
-static int IOMEM PARAMS ((int addr, int write, int value));
-static struct loop_bounds get_loop_bounds PARAMS((int, int, unsigned char *,
- unsigned char *, int, int));
-static void process_wlat_addr PARAMS((int, int));
-static void process_wwat_addr PARAMS((int, int));
-static void process_wbat_addr PARAMS((int, int));
-static int process_rlat_addr PARAMS((int));
-static int process_rwat_addr PARAMS((int));
-static int process_rbat_addr PARAMS((int));
-static void INLINE wlat_fast PARAMS ((unsigned char *, int, int, int));
-static void INLINE wwat_fast PARAMS ((unsigned char *, int, int, int, int));
-static void INLINE wbat_fast PARAMS ((unsigned char *, int, int, int));
-static int INLINE rlat_fast PARAMS ((unsigned char *, int, int));
-static int INLINE rwat_fast PARAMS ((unsigned char *, int, int, int));
-static int INLINE rbat_fast PARAMS ((unsigned char *, int, int));
-
-static host_callback *callback;
-
-
-
-/* Floating point registers */
-
-#define DR(n) (get_dr (n))
-static double
-get_dr (n)
- int n;
-{
- n = (n & ~1);
- if (host_little_endian)
- {
- union
- {
- int i[2];
- double d;
- } dr;
- dr.i[1] = saved_state.asregs.fregs[0].i[n + 0];
- dr.i[0] = saved_state.asregs.fregs[0].i[n + 1];
- return dr.d;
- }
- else
- return (saved_state.asregs.fregs[0].d[n >> 1]);
-}
-
-#define SET_DR(n, EXP) set_dr ((n), (EXP))
-static void
-set_dr (n, exp)
- int n;
- double exp;
-{
- n = (n & ~1);
- if (host_little_endian)
- {
- union
- {
- int i[2];
- double d;
- } dr;
- dr.d = exp;
- saved_state.asregs.fregs[0].i[n + 0] = dr.i[1];
- saved_state.asregs.fregs[0].i[n + 1] = dr.i[0];
- }
- else
- saved_state.asregs.fregs[0].d[n >> 1] = exp;
-}
-
-#define SET_FI(n,EXP) (saved_state.asregs.fregs[0].i[(n)] = (EXP))
-#define FI(n) (saved_state.asregs.fregs[0].i[(n)])
-
-#define FR(n) (saved_state.asregs.fregs[0].f[(n)])
-#define SET_FR(n,EXP) (saved_state.asregs.fregs[0].f[(n)] = (EXP))
-
-#define XD_TO_XF(n) ((((n) & 1) << 5) | ((n) & 0x1e))
-#define XF(n) (saved_state.asregs.fregs[(n) >> 5].i[(n) & 0x1f])
-#define SET_XF(n,EXP) (saved_state.asregs.fregs[(n) >> 5].i[(n) & 0x1f] = (EXP))
-
-#define RS saved_state.asregs.cregs.named.rs
-#define RE saved_state.asregs.cregs.named.re
-#define MOD (saved_state.asregs.cregs.named.mod)
-#define SET_MOD(i) \
-(MOD = (i), \
- MOD_ME = (unsigned) MOD >> 16 | (SR_DMY ? ~0xffff : (SR_DMX ? 0 : 0x10000)), \
- MOD_DELTA = (MOD & 0xffff) - ((unsigned) MOD >> 16))
-
-#define DSP_R(n) saved_state.asregs.sregs.i[(n)]
-#define DSP_GRD(n) DSP_R ((n) + 8)
-#define GET_DSP_GRD(n) ((n | 2) == 7 ? SEXT (DSP_GRD (n)) : SIGN32 (DSP_R (n)))
-#define A1 DSP_R (5)
-#define A0 DSP_R (7)
-#define X0 DSP_R (8)
-#define X1 DSP_R (9)
-#define Y0 DSP_R (10)
-#define Y1 DSP_R (11)
-#define M0 DSP_R (12)
-#define A1G DSP_R (13)
-#define M1 DSP_R (14)
-#define A0G DSP_R (15)
-/* DSP_R (16) / DSP_GRD (16) are used as a fake destination for pcmp. */
-#define MOD_ME DSP_GRD (17)
-#define MOD_DELTA DSP_GRD (18)
-
-#define FP_OP(n, OP, m) \
-{ \
- if (FPSCR_PR) \
- { \
- if (((n) & 1) || ((m) & 1)) \
- RAISE_EXCEPTION (SIGILL); \
- else \
- SET_DR(n, (DR(n) OP DR(m))); \
- } \
- else \
- SET_FR(n, (FR(n) OP FR(m))); \
-} while (0)
-
-#define FP_UNARY(n, OP) \
-{ \
- if (FPSCR_PR) \
- { \
- if ((n) & 1) \
- RAISE_EXCEPTION (SIGILL); \
- else \
- SET_DR(n, (OP (DR(n)))); \
- } \
- else \
- SET_FR(n, (OP (FR(n)))); \
-} while (0)
-
-#define FP_CMP(n, OP, m) \
-{ \
- if (FPSCR_PR) \
- { \
- if (((n) & 1) || ((m) & 1)) \
- RAISE_EXCEPTION (SIGILL); \
- else \
- SET_SR_T (DR(n) OP DR(m)); \
- } \
- else \
- SET_SR_T (FR(n) OP FR(m)); \
-} while (0)
-
-static void
-set_sr (new_sr)
- int new_sr;
-{
- /* do we need to swap banks */
- int old_gpr = SR_MD && SR_RB;
- int new_gpr = (new_sr & SR_MASK_MD) && (new_sr & SR_MASK_RB);
- if (old_gpr != new_gpr)
- {
- int i, tmp;
- for (i = 0; i < 8; i++)
- {
- tmp = saved_state.asregs.cregs.named.bank[i];
- saved_state.asregs.cregs.named.bank[i] = saved_state.asregs.regs[i];
- saved_state.asregs.regs[i] = tmp;
- }
- }
- saved_state.asregs.cregs.named.sr = new_sr;
- SET_MOD (MOD);
-}
-
-static void INLINE
-wlat_fast (memory, x, value, maskl)
- unsigned char *memory;
-{
- int v = value;
- unsigned int *p = (unsigned int *)(memory + x);
- WRITE_BUSERROR (x, maskl, v, process_wlat_addr);
- *p = v;
-}
-
-static void INLINE
-wwat_fast (memory, x, value, maskw, endianw)
- unsigned char *memory;
-{
- int v = value;
- unsigned short *p = (unsigned short *)(memory + (x ^ endianw));
- WRITE_BUSERROR (x, maskw, v, process_wwat_addr);
- *p = v;
-}
-
-static void INLINE
-wbat_fast (memory, x, value, maskb)
- unsigned char *memory;
-{
- unsigned char *p = memory + (x ^ endianb);
- WRITE_BUSERROR (x, maskb, value, process_wbat_addr);
-
- p[0] = value;
-}
-
-/* Read functions */
-
-static int INLINE
-rlat_fast (memory, x, maskl)
- unsigned char *memory;
-{
- unsigned int *p = (unsigned int *)(memory + x);
- READ_BUSERROR (x, maskl, process_rlat_addr);
-
- return *p;
-}
-
-static int INLINE
-rwat_fast (memory, x, maskw, endianw)
- unsigned char *memory;
- int x, maskw, endianw;
-{
- unsigned short *p = (unsigned short *)(memory + (x ^ endianw));
- READ_BUSERROR (x, maskw, process_rwat_addr);
-
- return *p;
-}
-
-static int INLINE
-riat_fast (insn_ptr, endianw)
- unsigned char *insn_ptr;
-{
- unsigned short *p = (unsigned short *)((size_t) insn_ptr ^ endianw);
-
- return *p;
-}
-
-static int INLINE
-rbat_fast (memory, x, maskb)
- unsigned char *memory;
-{
- unsigned char *p = memory + (x ^ endianb);
- READ_BUSERROR (x, maskb, process_rbat_addr);
-
- return *p;
-}
-
-#define RWAT(x) (rwat_fast (memory, x, maskw, endianw))
-#define RLAT(x) (rlat_fast (memory, x, maskl))
-#define RBAT(x) (rbat_fast (memory, x, maskb))
-#define RIAT(p) (riat_fast ((p), endianw))
-#define WWAT(x,v) (wwat_fast (memory, x, v, maskw, endianw))
-#define WLAT(x,v) (wlat_fast (memory, x, v, maskl))
-#define WBAT(x,v) (wbat_fast (memory, x, v, maskb))
-
-#define RUWAT(x) (RWAT(x) & 0xffff)
-#define RSWAT(x) ((short)(RWAT(x)))
-#define RSBAT(x) (SEXT(RBAT(x)))
-
-#define RDAT(x, n) (do_rdat (memory, (x), (n), (maskl)))
-static int
-do_rdat (memory, x, n, maskl)
- char *memory;
- int x;
- int n;
- int maskl;
-{
- int f0;
- int f1;
- int i = (n & 1);
- int j = (n & ~1);
- f0 = rlat_fast (memory, x + 0, maskl);
- f1 = rlat_fast (memory, x + 4, maskl);
- saved_state.asregs.fregs[i].i[(j + 0)] = f0;
- saved_state.asregs.fregs[i].i[(j + 1)] = f1;
- return 0;
-}
-
-#define WDAT(x, n) (do_wdat (memory, (x), (n), (maskl)))
-static int
-do_wdat (memory, x, n, maskl)
- char *memory;
- int x;
- int n;
- int maskl;
-{
- int f0;
- int f1;
- int i = (n & 1);
- int j = (n & ~1);
- f0 = saved_state.asregs.fregs[i].i[(j + 0)];
- f1 = saved_state.asregs.fregs[i].i[(j + 1)];
- wlat_fast (memory, (x + 0), f0, maskl);
- wlat_fast (memory, (x + 4), f1, maskl);
- return 0;
-}
-
-static void
-process_wlat_addr (addr, value)
- int addr;
- int value;
-{
- unsigned int *ptr;
-
- PROCESS_SPECIAL_ADDRESS (addr, endianb, ptr, 32, 3, value, );
- *ptr = value;
-}
-
-static void
-process_wwat_addr (addr, value)
- int addr;
- int value;
-{
- unsigned short *ptr;
-
- PROCESS_SPECIAL_ADDRESS (addr, endianb, ptr, 16, 1, value, );
- *ptr = value;
-}
-
-static void
-process_wbat_addr (addr, value)
- int addr;
- int value;
-{
- unsigned char *ptr;
-
- PROCESS_SPECIAL_ADDRESS (addr, endianb, ptr, 8, 0, value, );
- *ptr = value;
-}
-
-static int
-process_rlat_addr (addr)
- int addr;
-{
- unsigned char *ptr;
-
- PROCESS_SPECIAL_ADDRESS (addr, endianb, ptr, -32, 3, -1, 0);
- return *ptr;
-}
-
-static int
-process_rwat_addr (addr)
- int addr;
-{
- unsigned char *ptr;
-
- PROCESS_SPECIAL_ADDRESS (addr, endianb, ptr, -16, 1, -1, 0);
- return *ptr;
-}
-
-static int
-process_rbat_addr (addr)
- int addr;
-{
- unsigned char *ptr;
-
- PROCESS_SPECIAL_ADDRESS (addr, endianb, ptr, -8, 0, -1, 0);
- return *ptr;
-}
-
-#define SEXT(x) (((x & 0xff) ^ (~0x7f))+0x80)
-#define SEXT12(x) (((x & 0xfff) ^ 0x800) - 0x800)
-#define SEXTW(y) ((int)((short)y))
-#if 0
-#define SEXT32(x) ((int)((x & 0xffffffff) ^ 0x80000000U) - 0x7fffffff - 1)
-#else
-#define SEXT32(x) ((int)(x))
-#endif
-#define SIGN32(x) (SEXT32 (x) >> 31)
-
-/* convert pointer from target to host value. */
-#define PT2H(x) ((x) + memory)
-/* convert pointer from host to target value. */
-#define PH2T(x) ((x) - memory)
-
-#define SKIP_INSN(p) ((p) += ((RIAT (p) & 0xfc00) == 0xf800 ? 4 : 2))
-
-#define SET_NIP(x) nip = (x); CHECK_INSN_PTR (nip);
-
-#define Delay_Slot(TEMPPC) iword = RIAT (TEMPPC); goto top;
-
-#define CHECK_INSN_PTR(p) \
-do { \
- if (saved_state.asregs.exception || PH2T (p) & maskw) \
- saved_state.asregs.insn_end = 0; \
- else if (p < loop.end) \
- saved_state.asregs.insn_end = loop.end; \
- else \
- saved_state.asregs.insn_end = mem_end; \
-} while (0)
-
-#ifdef ACE_FAST
-
-#define MA(n)
-#define L(x)
-#define TL(x)
-#define TB(x)
-
-#else
-
-#define MA(n) \
- do { memstalls += ((((int) PC & 3) != 0) ? (n) : ((n) - 1)); } while (0)
-
-#define L(x) thislock = x;
-#define TL(x) if ((x) == prevlock) stalls++;
-#define TB(x,y) if ((x) == prevlock || (y)==prevlock) stalls++;
-
-#endif
-
-#if defined(__GO32__) || defined(_WIN32)
-int sim_memory_size = 19;
-#else
-int sim_memory_size = 24;
-#endif
-
-static int sim_profile_size = 17;
-static int nsamples;
-
-#undef TB
-#define TB(x,y)
-
-#define SMR1 (0x05FFFEC8) /* Channel 1 serial mode register */
-#define BRR1 (0x05FFFEC9) /* Channel 1 bit rate register */
-#define SCR1 (0x05FFFECA) /* Channel 1 serial control register */
-#define TDR1 (0x05FFFECB) /* Channel 1 transmit data register */
-#define SSR1 (0x05FFFECC) /* Channel 1 serial status register */
-#define RDR1 (0x05FFFECD) /* Channel 1 receive data register */
-
-#define SCI_RDRF 0x40 /* Recieve data register full */
-#define SCI_TDRE 0x80 /* Transmit data register empty */
-
-static int
-IOMEM (addr, write, value)
- int addr;
- int write;
- int value;
-{
- if (write)
- {
- switch (addr)
- {
- case TDR1:
- if (value != '\r')
- {
- putchar (value);
- fflush (stdout);
- }
- break;
- }
- }
- else
- {
- switch (addr)
- {
- case RDR1:
- return getchar ();
- }
- }
- return 0;
-}
-
-static int
-get_now ()
-{
- return time ((long *) 0);
-}
-
-static int
-now_persec ()
-{
- return 1;
-}
-
-static FILE *profile_file;
-
-static unsigned INLINE
-swap (n)
- unsigned n;
-{
- if (endianb)
- n = (n << 24 | (n & 0xff00) << 8
- | (n & 0xff0000) >> 8 | (n & 0xff000000) >> 24);
- return n;
-}
-
-static unsigned short INLINE
-swap16 (n)
- unsigned short n;
-{
- if (endianb)
- n = n << 8 | (n & 0xff00) >> 8;
- return n;
-}
-
-static void
-swapout (n)
- int n;
-{
- if (profile_file)
- {
- union { char b[4]; int n; } u;
- u.n = swap (n);
- fwrite (u.b, 4, 1, profile_file);
- }
-}
-
-static void
-swapout16 (n)
- int n;
-{
- union { char b[4]; int n; } u;
- u.n = swap16 (n);
- fwrite (u.b, 2, 1, profile_file);
-}
-
-/* Turn a pointer in a register into a pointer into real memory. */
-
-static char *
-ptr (x)
- int x;
-{
- return (char *) (x + saved_state.asregs.memory);
-}
-
-static int
-strswaplen (str)
- int str;
-{
- unsigned char *memory = saved_state.asregs.memory;
- int start, end;
- int endian = endianb;
-
- if (! endian)
- return 0;
- end = str;
- for (end = str; memory[end ^ endian]; end++) ;
- return end - str;
-}
-
-static void
-strnswap (str, len)
- int str;
- int len;
-{
- int *start, *end;
-
- if (! endianb || ! len)
- return;
- start = (int *) ptr (str & ~3);
- end = (int *) ptr (str + len);
- do
- {
- int old = *start;
- *start = (old << 24 | (old & 0xff00) << 8
- | (old & 0xff0000) >> 8 | (old & 0xff000000) >> 24);
- start++;
- }
- while (start < end);
-}
-
-/* Simulate a monitor trap, put the result into r0 and errno into r1 */
-
-static void
-trap (i, regs, memory, maskl, maskw, endianw)
- int i;
- int *regs;
- unsigned char *memory;
-{
- switch (i)
- {
- case 1:
- printf ("%c", regs[0]);
- break;
- case 2:
- raise_exception (SIGQUIT);
- break;
- case 3: /* FIXME: for backwards compat, should be removed */
- case 34:
- {
- extern int errno;
- int perrno = errno;
- errno = 0;
-
- switch (regs[4])
- {
-
-#if !defined(__GO32__) && !defined(_WIN32)
- case SYS_fork:
- regs[0] = fork ();
- break;
-/* This would work only if endianness matched between host and target.
- Besides, it's quite dangerous. */
-#if 0
- case SYS_execve:
- regs[0] = execve (ptr (regs[5]), (char **)ptr (regs[6]), (char **)ptr (regs[7]));
- break;
- case SYS_execv:
- regs[0] = execve (ptr (regs[5]),(char **) ptr (regs[6]), 0);
- break;
-#endif
- case SYS_pipe:
- {
- regs[0] = (BUSERROR (regs[5], maskl)
- ? -EINVAL
- : pipe ((int *) ptr (regs[5])));
- }
- break;
-
- case SYS_wait:
- regs[0] = wait (ptr (regs[5]));
- break;
-#endif /* !defined(__GO32__) && !defined(_WIN32) */
-
- case SYS_read:
- strnswap (regs[6], regs[7]);
- regs[0]
- = callback->read (callback, regs[5], ptr (regs[6]), regs[7]);
- strnswap (regs[6], regs[7]);
- break;
- case SYS_write:
- strnswap (regs[6], regs[7]);
- if (regs[5] == 1)
- regs[0] = (int)callback->write_stdout (callback, ptr(regs[6]), regs[7]);
- else
- regs[0] = (int)callback->write (callback, regs[5], ptr (regs[6]), regs[7]);
- strnswap (regs[6], regs[7]);
- break;
- case SYS_lseek:
- regs[0] = callback->lseek (callback,regs[5], regs[6], regs[7]);
- break;
- case SYS_close:
- regs[0] = callback->close (callback,regs[5]);
- break;
- case SYS_open:
- {
- int len = strswaplen (regs[5]);
- strnswap (regs[5], len);
- regs[0] = callback->open (callback,ptr (regs[5]), regs[6]);
- strnswap (regs[5], len);
- break;
- }
- case SYS_exit:
- /* EXIT - caller can look in r5 to work out the reason */
- raise_exception (SIGQUIT);
- regs[0] = regs[5];
- break;
-
- case SYS_stat: /* added at hmsi */
- /* stat system call */
- {
- struct stat host_stat;
- int buf;
- int len = strswaplen (regs[5]);
-
- strnswap (regs[5], len);
- regs[0] = stat (ptr (regs[5]), &host_stat);
- strnswap (regs[5], len);
-
- buf = regs[6];
-
- WWAT (buf, host_stat.st_dev);
- buf += 2;
- WWAT (buf, host_stat.st_ino);
- buf += 2;
- WLAT (buf, host_stat.st_mode);
- buf += 4;
- WWAT (buf, host_stat.st_nlink);
- buf += 2;
- WWAT (buf, host_stat.st_uid);
- buf += 2;
- WWAT (buf, host_stat.st_gid);
- buf += 2;
- WWAT (buf, host_stat.st_rdev);
- buf += 2;
- WLAT (buf, host_stat.st_size);
- buf += 4;
- WLAT (buf, host_stat.st_atime);
- buf += 4;
- WLAT (buf, 0);
- buf += 4;
- WLAT (buf, host_stat.st_mtime);
- buf += 4;
- WLAT (buf, 0);
- buf += 4;
- WLAT (buf, host_stat.st_ctime);
- buf += 4;
- WLAT (buf, 0);
- buf += 4;
- WLAT (buf, 0);
- buf += 4;
- WLAT (buf, 0);
- buf += 4;
- }
- break;
-
-#ifndef _WIN32
- case SYS_chown:
- {
- int len = strswaplen (regs[5]);
-
- strnswap (regs[5], len);
- regs[0] = chown (ptr (regs[5]), regs[6], regs[7]);
- strnswap (regs[5], len);
- break;
- }
-#endif /* _WIN32 */
- case SYS_chmod:
- {
- int len = strswaplen (regs[5]);
-
- strnswap (regs[5], len);
- regs[0] = chmod (ptr (regs[5]), regs[6]);
- strnswap (regs[5], len);
- break;
- }
- case SYS_utime:
- {
- /* Cast the second argument to void *, to avoid type mismatch
- if a prototype is present. */
- int len = strswaplen (regs[5]);
-
- strnswap (regs[5], len);
- regs[0] = utime (ptr (regs[5]), (void *) ptr (regs[6]));
- strnswap (regs[5], len);
- break;
- }
- case SYS_argc:
- regs[0] = count_argc (prog_argv);
- break;
- case SYS_argnlen:
- if (regs[5] < count_argc (prog_argv))
- regs[0] = strlen (prog_argv[regs[5]]);
- else
- regs[0] = -1;
- break;
- case SYS_argn:
- if (regs[5] < count_argc (prog_argv))
- {
- /* Include the termination byte. */
- int i = strlen (prog_argv[regs[5]]) + 1;
- regs[0] = sim_write (0, regs[6], prog_argv[regs[5]], i);
- }
- else
- regs[0] = -1;
- break;
- case SYS_time:
- regs[0] = get_now ();
- break;
- default:
- regs[0] = -1;
- break;
- }
- regs[1] = callback->get_errno (callback);
- errno = perrno;
- }
- break;
-
- case 0xc3:
- case 255:
- raise_exception (SIGTRAP);
- break;
- }
-
-}
-
-void
-control_c (sig, code, scp, addr)
- int sig;
- int code;
- char *scp;
- char *addr;
-{
- raise_exception (SIGINT);
-}
-
-static int
-div1 (R, iRn2, iRn1/*, T*/)
- int *R;
- int iRn1;
- int iRn2;
- /* int T;*/
-{
- unsigned long tmp0;
- unsigned char old_q, tmp1;
-
- old_q = Q;
- SET_SR_Q ((unsigned char) ((0x80000000 & R[iRn1]) != 0));
- R[iRn1] <<= 1;
- R[iRn1] |= (unsigned long) T;
-
- switch (old_q)
- {
- case 0:
- switch (M)
- {
- case 0:
- tmp0 = R[iRn1];
- R[iRn1] -= R[iRn2];
- tmp1 = (R[iRn1] > tmp0);
- switch (Q)
- {
- case 0:
- SET_SR_Q (tmp1);
- break;
- case 1:
- SET_SR_Q ((unsigned char) (tmp1 == 0));
- break;
- }
- break;
- case 1:
- tmp0 = R[iRn1];
- R[iRn1] += R[iRn2];
- tmp1 = (R[iRn1] < tmp0);
- switch (Q)
- {
- case 0:
- SET_SR_Q ((unsigned char) (tmp1 == 0));
- break;
- case 1:
- SET_SR_Q (tmp1);
- break;
- }
- break;
- }
- break;
- case 1:
- switch (M)
- {
- case 0:
- tmp0 = R[iRn1];
- R[iRn1] += R[iRn2];
- tmp1 = (R[iRn1] < tmp0);
- switch (Q)
- {
- case 0:
- SET_SR_Q (tmp1);
- break;
- case 1:
- SET_SR_Q ((unsigned char) (tmp1 == 0));
- break;
- }
- break;
- case 1:
- tmp0 = R[iRn1];
- R[iRn1] -= R[iRn2];
- tmp1 = (R[iRn1] > tmp0);
- switch (Q)
- {
- case 0:
- SET_SR_Q ((unsigned char) (tmp1 == 0));
- break;
- case 1:
- SET_SR_Q (tmp1);
- break;
- }
- break;
- }
- break;
- }
- /*T = (Q == M);*/
- SET_SR_T (Q == M);
- /*return T;*/
-}
-
-static void
-dmul (sign, rm, rn)
- int sign;
- unsigned int rm;
- unsigned int rn;
-{
- unsigned long RnL, RnH;
- unsigned long RmL, RmH;
- unsigned long temp0, temp1, temp2, temp3;
- unsigned long Res2, Res1, Res0;
-
- RnL = rn & 0xffff;
- RnH = (rn >> 16) & 0xffff;
- RmL = rm & 0xffff;
- RmH = (rm >> 16) & 0xffff;
- temp0 = RmL * RnL;
- temp1 = RmH * RnL;
- temp2 = RmL * RnH;
- temp3 = RmH * RnH;
- Res2 = 0;
- Res1 = temp1 + temp2;
- if (Res1 < temp1)
- Res2 += 0x00010000;
- temp1 = (Res1 << 16) & 0xffff0000;
- Res0 = temp0 + temp1;
- if (Res0 < temp0)
- Res2 += 1;
- Res2 += ((Res1 >> 16) & 0xffff) + temp3;
-
- if (sign)
- {
- if (rn & 0x80000000)
- Res2 -= rm;
- if (rm & 0x80000000)
- Res2 -= rn;
- }
-
- MACH = Res2;
- MACL = Res0;
-}
-
-static void
-macw (regs, memory, n, m, endianw)
- int *regs;
- unsigned char *memory;
- int m, n;
- int endianw;
-{
- long tempm, tempn;
- long prod, macl, sum;
-
- tempm=RSWAT(regs[m]); regs[m]+=2;
- tempn=RSWAT(regs[n]); regs[n]+=2;
-
- macl = MACL;
- prod = (long)(short) tempm * (long)(short) tempn;
- sum = prod + macl;
- if (S)
- {
- if ((~(prod ^ macl) & (sum ^ prod)) < 0)
- {
- /* MACH's lsb is a sticky overflow bit. */
- MACH |= 1;
- /* Store the smallest negative number in MACL if prod is
- negative, and the largest positive number otherwise. */
- sum = 0x7fffffff + (prod < 0);
- }
- }
- else
- {
- long mach;
- /* Add to MACH the sign extended product, and carry from low sum. */
- mach = MACH + (-(prod < 0)) + ((unsigned long) sum < prod);
- /* Sign extend at 10:th bit in MACH. */
- MACH = (mach & 0x1ff) | -(mach & 0x200);
- }
- MACL = sum;
-}
-
-static struct loop_bounds
-get_loop_bounds (rs, re, memory, mem_end, maskw, endianw)
- int rs, re;
- unsigned char *memory, *mem_end;
- int maskw, endianw;
-{
- struct loop_bounds loop;
-
- if (SR_RC)
- {
- if (RS >= RE)
- {
- loop.start = PT2H (RE - 4);
- SKIP_INSN (loop.start);
- loop.end = loop.start;
- if (RS - RE == 0)
- SKIP_INSN (loop.end);
- if (RS - RE <= 2)
- SKIP_INSN (loop.end);
- SKIP_INSN (loop.end);
- }
- else
- {
- loop.start = PT2H (RS);
- loop.end = PT2H (RE - 4);
- SKIP_INSN (loop.end);
- SKIP_INSN (loop.end);
- SKIP_INSN (loop.end);
- SKIP_INSN (loop.end);
- }
- if (loop.end >= mem_end)
- loop.end = PT2H (0);
- }
- else
- loop.end = PT2H (0);
-
- return loop;
-}
-
-static void
-ppi_insn();
-
-#include "ppi.c"
-
-/* Set the memory size to the power of two provided. */
-
-void
-sim_size (power)
- int power;
-
-{
- saved_state.asregs.msize = 1 << power;
-
- sim_memory_size = power;
-
- if (saved_state.asregs.memory)
- {
- free (saved_state.asregs.memory);
- }
-
- saved_state.asregs.memory =
- (unsigned char *) calloc (64, saved_state.asregs.msize / 64);
-
- if (!saved_state.asregs.memory)
- {
- fprintf (stderr,
- "Not enough VM for simulation of %d bytes of RAM\n",
- saved_state.asregs.msize);
-
- saved_state.asregs.msize = 1;
- saved_state.asregs.memory = (unsigned char *) calloc (1, 1);
- }
-}
-
-static void
-init_dsp (abfd)
- struct _bfd *abfd;
-{
- int was_dsp = target_dsp;
- unsigned long mach = bfd_get_mach (abfd);
-
- if (mach == bfd_mach_sh_dsp || mach == bfd_mach_sh3_dsp)
- {
- int ram_area_size, xram_start, yram_start;
- int new_select;
-
- target_dsp = 1;
- if (mach == bfd_mach_sh_dsp)
- {
- /* SH7410 (orig. sh-sdp):
- 4KB each for X & Y memory;
- On-chip X RAM 0x0800f000-0x0800ffff
- On-chip Y RAM 0x0801f000-0x0801ffff */
- xram_start = 0x0800f000;
- ram_area_size = 0x1000;
- }
- if (mach == bfd_mach_sh3_dsp)
- {
- /* SH7612:
- 8KB each for X & Y memory;
- On-chip X RAM 0x1000e000-0x1000ffff
- On-chip Y RAM 0x1001e000-0x1001ffff */
- xram_start = 0x1000e000;
- ram_area_size = 0x2000;
- }
- yram_start = xram_start + 0x10000;
- new_select = ~(ram_area_size - 1);
- if (saved_state.asregs.xyram_select != new_select)
- {
- saved_state.asregs.xyram_select = new_select;
- free (saved_state.asregs.xmem);
- free (saved_state.asregs.ymem);
- saved_state.asregs.xmem = (unsigned char *) calloc (1, ram_area_size);
- saved_state.asregs.ymem = (unsigned char *) calloc (1, ram_area_size);
-
- /* Disable use of X / Y mmeory if not allocated. */
- if (! saved_state.asregs.xmem || ! saved_state.asregs.ymem)
- {
- saved_state.asregs.xyram_select = 0;
- if (saved_state.asregs.xmem)
- free (saved_state.asregs.xmem);
- if (saved_state.asregs.ymem)
- free (saved_state.asregs.ymem);
- }
- }
- saved_state.asregs.xram_start = xram_start;
- saved_state.asregs.yram_start = yram_start;
- saved_state.asregs.xmem_offset = saved_state.asregs.xmem - xram_start;
- saved_state.asregs.ymem_offset = saved_state.asregs.ymem - yram_start;
- }
- else
- {
- target_dsp = 0;
- if (saved_state.asregs.xyram_select)
- {
- saved_state.asregs.xyram_select = 0;
- free (saved_state.asregs.xmem);
- free (saved_state.asregs.ymem);
- }
- }
-
- if (! saved_state.asregs.xyram_select)
- {
- saved_state.asregs.xram_start = 1;
- saved_state.asregs.yram_start = 1;
- }
-
- if (target_dsp != was_dsp)
- {
- int i, tmp;
-
- for (i = sizeof sh_dsp_table - 1; i >= 0; i--)
- {
- tmp = sh_jump_table[0xf000 + i];
- sh_jump_table[0xf000 + i] = sh_dsp_table[i];
- sh_dsp_table[i] = tmp;
- }
- }
-}
-
-static void
-init_pointers ()
-{
- host_little_endian = 0;
- *(char*)&host_little_endian = 1;
- host_little_endian &= 1;
-
- if (saved_state.asregs.msize != 1 << sim_memory_size)
- {
- sim_size (sim_memory_size);
- }
-
- if (saved_state.asregs.profile && !profile_file)
- {
- profile_file = fopen ("gmon.out", "wb");
- /* Seek to where to put the call arc data */
- nsamples = (1 << sim_profile_size);
-
- fseek (profile_file, nsamples * 2 + 12, 0);
-
- if (!profile_file)
- {
- fprintf (stderr, "Can't open gmon.out\n");
- }
- else
- {
- saved_state.asregs.profile_hist =
- (unsigned short *) calloc (64, (nsamples * sizeof (short) / 64));
- }
- }
-}
-
-static void
-dump_profile ()
-{
- unsigned int minpc;
- unsigned int maxpc;
- unsigned short *p;
- int i;
-
- p = saved_state.asregs.profile_hist;
- minpc = 0;
- maxpc = (1 << sim_profile_size);
-
- fseek (profile_file, 0L, 0);
- swapout (minpc << PROFILE_SHIFT);
- swapout (maxpc << PROFILE_SHIFT);
- swapout (nsamples * 2 + 12);
- for (i = 0; i < nsamples; i++)
- swapout16 (saved_state.asregs.profile_hist[i]);
-
-}
-
-static void
-gotcall (from, to)
- int from;
- int to;
-{
- swapout (from);
- swapout (to);
- swapout (1);
-}
-
-#define MMASKB ((saved_state.asregs.msize -1) & ~0)
-
-int
-sim_stop (sd)
- SIM_DESC sd;
-{
- raise_exception (SIGINT);
- return 1;
-}
-
-void
-sim_resume (sd, step, siggnal)
- SIM_DESC sd;
- int step, siggnal;
-{
- register unsigned char *insn_ptr;
- unsigned char *mem_end;
- struct loop_bounds loop;
- register int cycles = 0;
- register int stalls = 0;
- register int memstalls = 0;
- register int insts = 0;
- register int prevlock;
- register int thislock;
- register unsigned int doprofile;
- register int pollcount = 0;
- /* endianw is used for every insn fetch, hence it makes sense to cache it.
- endianb is used less often. */
- register int endianw = global_endianw;
-
- int tick_start = get_now ();
- void (*prev) ();
- void (*prev_fpe) ();
-
- register unsigned char *jump_table = sh_jump_table;
-
- register int *R = &(saved_state.asregs.regs[0]);
- /*register int T;*/
-#ifndef PR
- register int PR;
-#endif
-
- register int maskb = ~((saved_state.asregs.msize - 1) & ~0);
- register int maskw = ~((saved_state.asregs.msize - 1) & ~1);
- register int maskl = ~((saved_state.asregs.msize - 1) & ~3);
- register unsigned char *memory;
- register unsigned int sbit = ((unsigned int) 1 << 31);
-
- prev = signal (SIGINT, control_c);
- prev_fpe = signal (SIGFPE, SIG_IGN);
-
- init_pointers ();
- saved_state.asregs.exception = 0;
-
- memory = saved_state.asregs.memory;
- mem_end = memory + saved_state.asregs.msize;
-
- loop = get_loop_bounds (RS, RE, memory, mem_end, maskw, endianw);
- insn_ptr = PT2H (saved_state.asregs.pc);
- CHECK_INSN_PTR (insn_ptr);
-
-#ifndef PR
- PR = saved_state.asregs.sregs.named.pr;
-#endif
- /*T = GET_SR () & SR_MASK_T;*/
- prevlock = saved_state.asregs.prevlock;
- thislock = saved_state.asregs.thislock;
- doprofile = saved_state.asregs.profile;
-
- /* If profiling not enabled, disable it by asking for
- profiles infrequently. */
- if (doprofile == 0)
- doprofile = ~0;
-
- loop:
- if (step && insn_ptr < saved_state.asregs.insn_end)
- {
- if (saved_state.asregs.exception)
- /* This can happen if we've already been single-stepping and
- encountered a loop end. */
- saved_state.asregs.insn_end = insn_ptr;
- else
- {
- saved_state.asregs.exception = SIGTRAP;
- saved_state.asregs.insn_end = insn_ptr + 2;
- }
- }
-
- while (insn_ptr < saved_state.asregs.insn_end)
- {
- register unsigned int iword = RIAT (insn_ptr);
- register unsigned int ult;
- register unsigned char *nip = insn_ptr + 2;
-
-#ifndef ACE_FAST
- insts++;
-#endif
- top:
-
-#include "code.c"
-
-
- insn_ptr = nip;
-
- if (--pollcount < 0)
- {
- pollcount = POLL_QUIT_INTERVAL;
- if ((*callback->poll_quit) != NULL
- && (*callback->poll_quit) (callback))
- {
- sim_stop (sd);
- }
- }
-
-#ifndef ACE_FAST
- prevlock = thislock;
- thislock = 30;
- cycles++;
-
- if (cycles >= doprofile)
- {
-
- saved_state.asregs.cycles += doprofile;
- cycles -= doprofile;
- if (saved_state.asregs.profile_hist)
- {
- int n = PH2T (insn_ptr) >> PROFILE_SHIFT;
- if (n < nsamples)
- {
- int i = saved_state.asregs.profile_hist[n];
- if (i < 65000)
- saved_state.asregs.profile_hist[n] = i + 1;
- }
-
- }
- }
-#endif
- }
- if (saved_state.asregs.insn_end == loop.end)
- {
- saved_state.asregs.cregs.named.sr += SR_RC_INCREMENT;
- if (SR_RC)
- insn_ptr = loop.start;
- else
- {
- saved_state.asregs.insn_end = mem_end;
- loop.end = PT2H (0);
- }
- goto loop;
- }
-
- if (saved_state.asregs.exception == SIGILL
- || saved_state.asregs.exception == SIGBUS)
- {
- insn_ptr -= 2;
- }
- /* Check for SIGBUS due to insn fetch. */
- else if (! saved_state.asregs.exception)
- saved_state.asregs.exception == SIGBUS;
-
- saved_state.asregs.ticks += get_now () - tick_start;
- saved_state.asregs.cycles += cycles;
- saved_state.asregs.stalls += stalls;
- saved_state.asregs.memstalls += memstalls;
- saved_state.asregs.insts += insts;
- saved_state.asregs.pc = PH2T (insn_ptr);
-#ifndef PR
- saved_state.asregs.sregs.named.pr = PR;
-#endif
-
- saved_state.asregs.prevlock = prevlock;
- saved_state.asregs.thislock = thislock;
-
- if (profile_file)
- {
- dump_profile ();
- }
-
- signal (SIGFPE, prev_fpe);
- signal (SIGINT, prev);
-}
-
-int
-sim_write (sd, addr, buffer, size)
- SIM_DESC sd;
- SIM_ADDR addr;
- unsigned char *buffer;
- int size;
-{
- int i;
-
- init_pointers ();
-
- for (i = 0; i < size; i++)
- {
- saved_state.asregs.memory[(MMASKB & (addr + i)) ^ endianb] = buffer[i];
- }
- return size;
-}
-
-int
-sim_read (sd, addr, buffer, size)
- SIM_DESC sd;
- SIM_ADDR addr;
- unsigned char *buffer;
- int size;
-{
- int i;
-
- init_pointers ();
-
- for (i = 0; i < size; i++)
- {
- buffer[i] = saved_state.asregs.memory[(MMASKB & (addr + i)) ^ endianb];
- }
- return size;
-}
-
-int
-sim_store_register (sd, rn, memory, length)
- SIM_DESC sd;
- int rn;
- unsigned char *memory;
- int length;
-{
- unsigned val;
-
- init_pointers ();
- val = swap (* (int *)memory);
- switch (rn)
- {
- case 0: case 1: case 2: case 3: case 4: case 5: case 6: case 7:
- case 8: case 9: case 10: case 11: case 12: case 13: case 14: case 15:
- saved_state.asregs.regs[rn] = val;
- break;
- case 16:
- saved_state.asregs.pc = val;
- break;
- case 17:
- PR = val;
- break;
- case 18:
- GBR = val;
- break;
- case 19:
- VBR = val;
- break;
- case 20:
- MACH = val;
- break;
- case 21:
- MACL = val;
- break;
- case 22:
- SET_SR (val);
- break;
- case 23:
- FPUL = val;
- break;
- case 24:
- SET_FPSCR (val);
- break;
- case 25:
- if (target_dsp)
- A0G = val;
- else case 26:
- if (target_dsp)
- A0 = val;
- else case 27:
- if (target_dsp)
- A1G = val;
- else case 28:
- if (target_dsp)
- A1 = val;
- else case 29:
- if (target_dsp)
- M0 = val;
- else case 30:
- if (target_dsp)
- M1 = val;
- else case 31:
- if (target_dsp)
- X0 = val;
- else case 32:
- if (target_dsp)
- X1 = val;
- else case 33:
- if (target_dsp)
- Y0 = val;
- else case 34:
- if (target_dsp)
- Y1 = val;
- else case 40:
- if (target_dsp)
- SET_MOD (val);
- else case 35: case 36: case 37: case 38: case 39:
- SET_FI (rn - 25, val);
- break;
- case 41:
- SSR = val;
- break;
- case 42:
- SPC = val;
- break;
- /* The rn_bank idiosyncracies are not due to hardware differences, but to
- a weird aliasing naming scheme for sh3 / sh3e / sh4. */
- case 43:
- if (target_dsp)
- RS = val;
- else case 44:
- if (target_dsp)
- RE = val;
- else case 45: case 46: case 47: case 48: case 49: case 50:
- if (SR_MD && SR_RB)
- Rn_BANK (rn - 43) = val;
- else
- saved_state.asregs.regs[rn - 43] = val;
- break;
- case 51: case 52: case 53: case 54: case 55: case 56: case 57: case 58:
- if (target_dsp || ! SR_MD || ! SR_RB)
- SET_Rn_BANK (rn - 51, val);
- else
- saved_state.asregs.regs[rn - 51] = val;
- break;
- default:
- return 0;
- }
- return -1;
-}
-
-int
-sim_fetch_register (sd, rn, memory, length)
- SIM_DESC sd;
- int rn;
- unsigned char *memory;
- int length;
-{
- int val;
-
- init_pointers ();
- switch (rn)
- {
- case 0: case 1: case 2: case 3: case 4: case 5: case 6: case 7:
- case 8: case 9: case 10: case 11: case 12: case 13: case 14: case 15:
- val = saved_state.asregs.regs[rn];
- break;
- case 16:
- val = saved_state.asregs.pc;
- break;
- case 17:
- val = PR;
- break;
- case 18:
- val = GBR;
- break;
- case 19:
- val = VBR;
- break;
- case 20:
- val = MACH;
- break;
- case 21:
- val = MACL;
- break;
- case 22:
- val = GET_SR ();
- break;
- case 23:
- val = FPUL;
- break;
- case 24:
- val = GET_FPSCR ();
- break;
- case 25:
- val = target_dsp ? SEXT (A0G) : FI (0);
- break;
- case 26:
- val = target_dsp ? A0 : FI (1);
- break;
- case 27:
- val = target_dsp ? SEXT (A1G) : FI (2);
- break;
- case 28:
- val = target_dsp ? A1 : FI (3);
- break;
- case 29:
- val = target_dsp ? M0 : FI (4);
- break;
- case 30:
- val = target_dsp ? M1 : FI (5);
- break;
- case 31:
- val = target_dsp ? X0 : FI (6);
- break;
- case 32:
- val = target_dsp ? X1 : FI (7);
- break;
- case 33:
- val = target_dsp ? Y0 : FI (8);
- break;
- case 34:
- val = target_dsp ? Y1 : FI (9);
- break;
- case 35: case 36: case 37: case 38: case 39:
- val = FI (rn - 25);
- break;
- case 40:
- val = target_dsp ? MOD : FI (15);
- break;
- case 41:
- val = SSR;
- break;
- case 42:
- val = SPC;
- break;
- /* The rn_bank idiosyncracies are not due to hardware differences, but to
- a weird aliasing naming scheme for sh3 / sh3e / sh4. */
- case 43:
- if (target_dsp)
- val = RS;
- else case 44:
- if (target_dsp)
- val = RE;
- else case 45: case 46: case 47: case 48: case 49: case 50:
- val = (SR_MD && SR_RB
- ? Rn_BANK (rn - 43)
- : saved_state.asregs.regs[rn - 43]);
- break;
- case 51: case 52: case 53: case 54: case 55: case 56: case 57: case 58:
- val = (target_dsp || ! SR_MD || ! SR_RB
- ? Rn_BANK (rn - 51)
- : saved_state.asregs.regs[rn - 51]);
- break;
- default:
- return 0;
- }
- * (int *) memory = swap (val);
- return -1;
-}
-
-int
-sim_trace (sd)
- SIM_DESC sd;
-{
- return 0;
-}
-
-void
-sim_stop_reason (sd, reason, sigrc)
- SIM_DESC sd;
- enum sim_stop *reason;
- int *sigrc;
-{
- /* The SH simulator uses SIGQUIT to indicate that the program has
- exited, so we must check for it here and translate it to exit. */
- if (saved_state.asregs.exception == SIGQUIT)
- {
- *reason = sim_exited;
- *sigrc = saved_state.asregs.regs[5];
- }
- else
- {
- *reason = sim_stopped;
- *sigrc = saved_state.asregs.exception;
- }
-}
-
-void
-sim_info (sd, verbose)
- SIM_DESC sd;
- int verbose;
-{
- double timetaken = (double) saved_state.asregs.ticks / (double) now_persec ();
- double virttime = saved_state.asregs.cycles / 36.0e6;
-
- callback->printf_filtered (callback, "\n\n# instructions executed %10d\n",
- saved_state.asregs.insts);
- callback->printf_filtered (callback, "# cycles %10d\n",
- saved_state.asregs.cycles);
- callback->printf_filtered (callback, "# pipeline stalls %10d\n",
- saved_state.asregs.stalls);
- callback->printf_filtered (callback, "# misaligned load/store %10d\n",
- saved_state.asregs.memstalls);
- callback->printf_filtered (callback, "# real time taken %10.4f\n",
- timetaken);
- callback->printf_filtered (callback, "# virtual time taken %10.4f\n",
- virttime);
- callback->printf_filtered (callback, "# profiling size %10d\n",
- sim_profile_size);
- callback->printf_filtered (callback, "# profiling frequency %10d\n",
- saved_state.asregs.profile);
- callback->printf_filtered (callback, "# profile maxpc %10x\n",
- (1 << sim_profile_size) << PROFILE_SHIFT);
-
- if (timetaken != 0)
- {
- callback->printf_filtered (callback, "# cycles/second %10d\n",
- (int) (saved_state.asregs.cycles / timetaken));
- callback->printf_filtered (callback, "# simulation ratio %10.4f\n",
- virttime / timetaken);
- }
-}
-
-void
-sim_set_profile (n)
- int n;
-{
- saved_state.asregs.profile = n;
-}
-
-void
-sim_set_profile_size (n)
- int n;
-{
- sim_profile_size = n;
-}
-
-SIM_DESC
-sim_open (kind, cb, abfd, argv)
- SIM_OPEN_KIND kind;
- host_callback *cb;
- struct _bfd *abfd;
- char **argv;
-{
- char **p;
- int endian_set = 0;
- int i;
- union
- {
- int i;
- short s[2];
- char c[4];
- }
- mem_word;
-
- sim_kind = kind;
- myname = argv[0];
- callback = cb;
-
- for (p = argv + 1; *p != NULL; ++p)
- {
- if (strcmp (*p, "-E") == 0)
- {
- ++p;
- if (*p == NULL)
- {
- /* FIXME: This doesn't use stderr, but then the rest of the
- file doesn't either. */
- callback->printf_filtered (callback, "Missing argument to `-E'.\n");
- return 0;
- }
- target_little_endian = strcmp (*p, "big") != 0;
- endian_set = 1;
- }
- else if (isdigit (**p))
- parse_and_set_memory_size (*p);
- }
-
- if (abfd != NULL && ! endian_set)
- target_little_endian = ! bfd_big_endian (abfd);
-
- if (abfd)
- init_dsp (abfd);
-
- for (i = 4; (i -= 2) >= 0; )
- mem_word.s[i >> 1] = i;
- global_endianw = mem_word.i >> (target_little_endian ? 0 : 16) & 0xffff;
-
- for (i = 4; --i >= 0; )
- mem_word.c[i] = i;
- endianb = mem_word.i >> (target_little_endian ? 0 : 24) & 0xff;
-
- /* fudge our descriptor for now */
- return (SIM_DESC) 1;
-}
-
-static void
-parse_and_set_memory_size (str)
- char *str;
-{
- int n;
-
- n = strtol (str, NULL, 10);
- if (n > 0 && n <= 24)
- sim_memory_size = n;
- else
- callback->printf_filtered (callback, "Bad memory size %d; must be 1 to 24, inclusive\n", n);
-}
-
-void
-sim_close (sd, quitting)
- SIM_DESC sd;
- int quitting;
-{
- /* nothing to do */
-}
-
-SIM_RC
-sim_load (sd, prog, abfd, from_tty)
- SIM_DESC sd;
- char *prog;
- bfd *abfd;
- int from_tty;
-{
- extern bfd *sim_load_file (); /* ??? Don't know where this should live. */
- bfd *prog_bfd;
-
- prog_bfd = sim_load_file (sd, myname, callback, prog, abfd,
- sim_kind == SIM_OPEN_DEBUG,
- 0, sim_write);
- if (prog_bfd == NULL)
- return SIM_RC_FAIL;
- if (abfd == NULL)
- bfd_close (prog_bfd);
- return SIM_RC_OK;
-}
-
-SIM_RC
-sim_create_inferior (sd, prog_bfd, argv, env)
- SIM_DESC sd;
- struct _bfd *prog_bfd;
- char **argv;
- char **env;
-{
- /* Clear the registers. */
- memset (&saved_state, 0,
- (char*)&saved_state.asregs.end_of_registers - (char*)&saved_state);
-
- /* Set the PC. */
- if (prog_bfd != NULL)
- saved_state.asregs.pc = bfd_get_start_address (prog_bfd);
-
- /* Record the program's arguments. */
- prog_argv = argv;
-
- return SIM_RC_OK;
-}
-
-void
-sim_do_command (sd, cmd)
- SIM_DESC sd;
- char *cmd;
-{
- char *sms_cmd = "set-memory-size";
- int cmdsize;
-
- if (cmd == NULL || *cmd == '\0')
- {
- cmd = "help";
- }
-
- cmdsize = strlen (sms_cmd);
- if (strncmp (cmd, sms_cmd, cmdsize) == 0 && strchr (" \t", cmd[cmdsize]) != NULL)
- {
- parse_and_set_memory_size (cmd + cmdsize + 1);
- }
- else if (strcmp (cmd, "help") == 0)
- {
- (callback->printf_filtered) (callback, "List of SH simulator commands:\n\n");
- (callback->printf_filtered) (callback, "set-memory-size <n> -- Set the number of address bits to use\n");
- (callback->printf_filtered) (callback, "\n");
- }
- else
- {
- (callback->printf_filtered) (callback, "Error: \"%s\" is not a valid SH simulator command.\n", cmd);
- }
-}
-
-void
-sim_set_callbacks (p)
- host_callback *p;
-{
- callback = p;
-}
diff --git a/sim/sh/syscall.h b/sim/sh/syscall.h
deleted file mode 100644
index 9b818f93927..00000000000
--- a/sim/sh/syscall.h
+++ /dev/null
@@ -1,34 +0,0 @@
-
-/* !!! DANGER !!!
- This was copied from newlib. */
-
-
-#define SYS_exit 1
-#define SYS_fork 2
-#define SYS_read 3
-#define SYS_write 4
-#define SYS_open 5
-#define SYS_close 6
-#define SYS_wait4 7
-#define SYS_creat 8
-#define SYS_link 9
-#define SYS_unlink 10
-#define SYS_execv 11
-#define SYS_chdir 12
-#define SYS_mknod 14
-#define SYS_chmod 15
-#define SYS_chown 16
-#define SYS_lseek 19
-#define SYS_getpid 20
-#define SYS_isatty 21
-#define SYS_fstat 22
-#define SYS_time 23
-#define SYS_ARG 24
-#define SYS_stat 38
-#define SYS_pipe 42
-#define SYS_execve 59
-#define SYS_argc 172
-#define SYS_argnlen 173
-#define SYS_argn 174
-#define SYS_utime 201 /* not really a system call */
-#define SYS_wait 202 /* nor is this */
diff --git a/sim/sh/tconfig.in b/sim/sh/tconfig.in
deleted file mode 100644
index c5ec4fa2228..00000000000
--- a/sim/sh/tconfig.in
+++ /dev/null
@@ -1,17 +0,0 @@
-/* sh target config file */
-
-/* Define this if the simulator supports profiling.
- See the mips simulator for an example.
- This enables the `-p foo' and `-s bar' options.
- The target is required to provide sim_set_profile{,_size}. */
-/* #define SIM_HAVE_PROFILE */
-
-/* Define this if the simulator uses an instruction cache.
- See the h8/300 simulator for an example.
- This enables the `-c size' option to set the size of the cache.
- The target is required to provide sim_set_simcache_size. */
-/* #define SIM_HAVE_SIMCACHE */
-
-/* Define this if the target cpu is bi-endian
- and the simulator supports it. */
-#define SIM_HAVE_BIENDIAN
diff --git a/sim/testsuite/ChangeLog b/sim/testsuite/ChangeLog
deleted file mode 100644
index b5a72d0e875..00000000000
--- a/sim/testsuite/ChangeLog
+++ /dev/null
@@ -1,375 +0,0 @@
-2000-11-01 Dave Brolley <brolley@cygnus.com>
-
- * lib/sim-defs.exp (run_sm_test): Correct comment. "output" and
- "xerror" options do not use a list of machines. Clear options from
- previous test case. Use "$cpu_option" to identify the machine to the
- assembler, if specified.
-
-Tue May 23 21:39:23 2000 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-1999-09-15 Doug Evans <devans@casey.cygnus.com>
-
- * sim/arm/b.cgs: New testcase.
- * sim/arm/bic.cgs: New testcase.
- * sim/arm/bl.cgs: New testcase.
-
-Thu Sep 2 18:15:53 1999 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-1999-08-30 Doug Evans <devans@casey.cygnus.com>
-
- * lib/sim-defs.exp (run_sim_test): Rename all_machs arg to
- requested_machs, now is list of machs to run tests for.
- Delete locals AS,ASFLAGS,LD,LDFLAGS. Use target_assemble
- and target_link instead.
-
-1999-04-21 Doug Evans <devans@casey.cygnus.com>
-
- * sim/m32r/nop.cgs: Add missing nop insn.
-
-Mon Mar 22 13:28:56 1999 Dave Brolley <brolley@cygnus.com>
-
- * sim/fr30/stb.cgs: Correct for unaligned access.
- * sim/fr30/sth.cgs: Correct for unaligned access.
- * sim/fr30/ldub.cgs: Fix typo: lduh->ldub. Correct
- for unaligned access.
- * sim/fr30/and.cgs: Test unaligned access.
-
-Fri Feb 5 12:41:11 1999 Doug Evans <devans@canuck.cygnus.com>
-
- * lib/sim-defs.exp (sim_run): Print simulator arguments log message.
-
-1999-01-05 Doug Evans <devans@casey.cygnus.com>
-
- * lib/sim-defs.exp (run_sim_test): New arg all_machs.
- * sim/fr30/allinsn.exp: Update.
- * sim/fr30/misc.exp: Update.
- * sim/m32r/allinsn.exp: Update.
- * sim/m32r/misc.exp: Update.
-
-Fri Dec 18 17:19:34 1998 Dave Brolley <brolley@cygnus.com>
-
- * sim/fr30/ldres.cgs: New testcase.
- * sim/fr30/copld.cgs: New testcase.
- * sim/fr30/copst.cgs: New testcase.
- * sim/fr30/copsv.cgs: New testcase.
- * sim/fr30/nop.cgs: New testcase.
- * sim/fr30/andccr.cgs: New testcase.
- * sim/fr30/orccr.cgs: New testcase.
- * sim/fr30/addsp.cgs: New testcase.
- * sim/fr30/stilm.cgs: New testcase.
- * sim/fr30/extsb.cgs: New testcase.
- * sim/fr30/extub.cgs: New testcase.
- * sim/fr30/extsh.cgs: New testcase.
- * sim/fr30/extuh.cgs: New testcase.
- * sim/fr30/enter.cgs: New testcase.
- * sim/fr30/leave.cgs: New testcase.
- * sim/fr30/xchb.cgs: New testcase.
- * sim/fr30/dmovb.cgs: New testcase.
- * sim/fr30/dmov.cgs: New testcase.
- * sim/fr30/dmovh.cgs: New testcase.
-
-Thu Dec 17 17:18:43 1998 Dave Brolley <brolley@cygnus.com>
-
- * sim/fr30/testutils.inc (take_branch{_d},no_branch{_d}): New macros.
- * sim/fr30/ret.cgs: Add tests fir ret:d.
- * sim/fr30/inte.cgs: New testcase.
- * sim/fr30/reti.cgs: New testcase.
- * sim/fr30/bra.cgs: New testcase.
- * sim/fr30/bno.cgs: New testcase.
- * sim/fr30/beq.cgs: New testcase.
- * sim/fr30/bne.cgs: New testcase.
- * sim/fr30/bc.cgs: New testcase.
- * sim/fr30/bnc.cgs: New testcase.
- * sim/fr30/bn.cgs: New testcase.
- * sim/fr30/bp.cgs: New testcase.
- * sim/fr30/bv.cgs: New testcase.
- * sim/fr30/bnv.cgs: New testcase.
- * sim/fr30/blt.cgs: New testcase.
- * sim/fr30/bge.cgs: New testcase.
- * sim/fr30/ble.cgs: New testcase.
- * sim/fr30/bgt.cgs: New testcase.
- * sim/fr30/bls.cgs: New testcase.
- * sim/fr30/bhi.cgs: New testcase.
-
-Tue Dec 15 17:47:13 1998 Dave Brolley <brolley@cygnus.com>
-
- * sim/fr30/div.cgs (int): Add signed division scenario.
- * sim/fr30/int.cgs (int): Complete testcase.
- * sim/fr30/testutils.inc (_start): Initialize tbr.
- (test_s_user,test_s_system,set_i,test_i): New macros.
-
-1998-12-14 Doug Evans <devans@casey.cygnus.com>
-
- * lib/sim-defs.exp (run_sim_test): New option xerror, for expected
- errors. Translate \n sequences in expected output to newline char.
- (slurp_options): Make parentheses optional.
- (sim_run): Look for board_info sim,options.
- * sim/fr30/hello.ms: Add trailing \n to expected output.
- * sim/m32r/hello.ms: Ditto.
- * sim/m32r/hw-trap.ms: Ditto.
-
- * sim/m32r/trap.cgs: Properly align trap2_handler.
-
- * sim/m32r/uread16.ms: New testcase.
- * sim/m32r/uread32.ms: New testcase.
- * sim/m32r/uwrite16.ms: New testcase.
- * sim/m32r/uwrite32.ms: New testcase.
-
-1998-12-14 Dave Brolley <brolley@cygnus.com>
-
- * sim/fr30/call.cgs: Test ret here as well.
- * sim/fr30/ld.cgs: Remove bogus comment.
- * sim/fr30/testutils.inc (save_rp,restore_rp): New macros.
- * sim/fr30/div.ms: New testcase.
- * sim/fr30/st.cgs: New testcase.
- * sim/fr30/sth.cgs: New testcase.
- * sim/fr30/stb.cgs: New testcase.
- * sim/fr30/mov.cgs: New testcase.
- * sim/fr30/jmp.cgs: New testcase.
- * sim/fr30/ret.cgs: New testcase.
- * sim/fr30/int.cgs: New testcase.
-
-Thu Dec 10 18:46:25 1998 Dave Brolley <brolley@cygnus.com>
-
- * sim/fr30/div0s.cgs: New testcase.
- * sim/fr30/div0u.cgs: New testcase.
- * sim/fr30/div1.cgs: New testcase.
- * sim/fr30/div2.cgs: New testcase.
- * sim/fr30/div3.cgs: New testcase.
- * sim/fr30/div4s.cgs: New testcase.
- * sim/fr30/testutils.inc (mvi_h_dr,set_dbits,test_dbits): New Macros.
-
-Tue Dec 8 13:16:53 1998 Dave Brolley <brolley@cygnus.com>
-
- * sim/fr30/testutils.inc (set_s_user): Correct Mask.
- (set_s_system): Correct Mask.
- * sim/fr30/ld.cgs (ld): Move previously failing test back
- into place.
- * sim/fr30/ldm0.cgs: New testcase.
- * sim/fr30/ldm1.cgs: New testcase.
- * sim/fr30/stm0.cgs: New testcase.
- * sim/fr30/stm1.cgs: New testcase.
-
-Thu Dec 3 14:20:03 1998 Dave Brolley <brolley@cygnus.com>
-
- * sim/fr30/ld.cgs: Implement more loads.
- * sim/fr30/call.cgs: New testcase.
- * sim/fr30/testutils.inc (testr_h_dr): New macro.
- (set_s_user,set_s_system): New macros.
-
- * sim/fr30: New Directory.
-
-Wed Nov 18 10:50:19 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * common/bits-gen.c (main): Add BYTE_ORDER so that it matches
- recent sim/common/sim-basics.h changes.
- * common/Makefile.in: Update.
-
-Fri Oct 30 00:37:31 1998 Felix Lee <flee@cygnus.com>
-
- * lib/sim-defs.exp (sim_run): download target program to remote
- host, if necessary. for unix-driven win32 testing.
-
-Tue Sep 15 14:56:22 1998 Doug Evans <devans@canuck.cygnus.com>
-
- * sim/m32r/testutils.inc (test_h_gr): Use mvaddr_h_gr.
- * sim/m32r/rte.cgs: Test bbpc,bbpsw.
- * sim/m32r/trap.cgs: Test bbpc,bbpsw.
-
-Fri Jul 31 17:49:13 1998 Felix Lee <flee@cygnus.com>
-
- * lib/sim-defs.exp (sim_run): remote_spawn, use writeto instead of
- writeonly.
-
-Fri Jul 24 09:40:34 1998 Doug Evans <devans@canuck.cygnus.com>
-
- * Makefile.in (clean,mostlyclean): Change leading spaces to a tab.
-
-Wed Jul 1 15:57:54 1998 Doug Evans <devans@seba.cygnus.com>
-
- * sim/m32r/hw-trap.ms: New testcase.
-
-Tue Jun 16 15:44:01 1998 Jillian Ye <jillian@cygnus.com>
-
- * lib/sim-defs.exp: Print out timeout setting info when "-v" is used.
-
-Thu Jun 11 15:24:53 1998 Doug Evans <devans@canuck.cygnus.com>
-
- * lib/sim-defs.exp (sim_run): Argument env_vals renamed to options,
- which is now a list of options controlling the behaviour of sim_run.
-
-Wed Jun 10 10:53:20 1998 Doug Evans <devans@seba.cygnus.com>
-
- * sim/m32r/addx.cgs: Add another test.
- * sim/m32r/jmp.cgs: Add another test.
-
-Mon Jun 8 16:08:27 1998 Doug Evans <devans@canuck.cygnus.com>
-
- * sim/m32r/trap.cgs: Test trap 2.
-
-Mon Jun 1 18:54:22 1998 Frank Ch. Eigler <fche@cygnus.com>
-
- * lib/sim-defs.exp (sim_run): Add possible environment variable
- list to simulator run.
-
-Thu May 28 14:59:46 1998 Jillian Ye <jillian@cygnus.com>
-
- * Makefile.in: Take RUNTEST out of FLAG_TO_PASS
- so that make check can be invoked recursively.
-
-Thu May 14 11:48:35 1998 Doug Evans <devans@canuck.cygnus.com>
-
- * config/default.exp (CC,SIM): Delete.
-
- * lib/sim-defs.exp (sim_run): Fix handling of output redirection.
- New arg prog_opts. All callers updated.
-
-Fri May 8 18:10:28 1998 Jillian Ye <jillian@cygnus.com>
-
- * Makefile.in: Made "check" the target of two
- dependencies (test1, test2) so that test2 get a chance to
- run even when test1 failed if "make -k check" is used.
-
-Fri May 8 14:41:28 1998 Doug Evans <devans@canuck.cygnus.com>
-
- * lib/sim-defs.exp (sim_version): Simplify.
- (sim_run): Implement.
- (run_sim_test): Use sim_run.
- (sim_compile): New proc.
-
-Mon May 4 17:59:11 1998 Frank Ch. Eigler <fche@cygnus.com>
-
- * config/default.exp: Added C compiler settings.
-
-Wed Apr 22 12:26:28 1998 Doug Evans <devans@canuck.cygnus.com>
-
- * Makefile.in (TARGET_FLAGS_TO_PASS): Delete LIBS, LDFLAGS.
-
-Tue Apr 21 10:49:03 1998 Doug Evans <devans@canuck.cygnus.com>
-
- * lib/sim-defs.exp (run_sim_test): Don't exit early if one mach fails,
- try all machs.
-
- * sim/m32r/addx.cgs: Test (-1)+(-1)+1.
-
-Fri Apr 17 16:00:52 1998 Doug Evans <devans@canuck.cygnus.com>
-
- * sim/m32r/mv[ft]achi.cgs: Fix expected result
- (sign extension of top 8 bits).
-
-Wed Feb 25 11:01:17 1998 Doug Evans <devans@canuck.cygnus.com>
-
- * Makefile.in (RUNTEST): Fix path to runtest.
-
-Fri Feb 20 11:00:02 1998 Nick Clifton <nickc@cygnus.com>
-
- * sim/m32r/unlock.cgs: Fixed test.
- * sim/m32r/mvfc.cgs: Fixed test.
- * sim/m32r/remu.cgs: Fixed test.
- * sim/m32r/bnc24.cgs: Test long BNC instruction.
- * sim/m32r/bnc8.cgs: Test short BNC instruction.
- * sim/m32r/ld-plus.cgs: Test LD instruction.
- * sim/m32r/macwhi.cgs: Test MACWHI instruction.
- * sim/m32r/macwlo.cgs: Test MACWLO instruction.
- * sim/m32r/mulwhi.cgs: Test MULWHI instruction.
- * sim/m32r/mulwlo.cgs: Test MULWLO instruction.
- * sim/m32r/mvfachi.cgs: Test MVFACHI instruction.
- * sim/m32r/mvfaclo.cgs: Test MVFACLO instruction.
- * sim/m32r/mvtaclo.cgs: Test MVTACLO instruction.
- * sim/m32r/addv.cgs: Test ADDV instruction.
- * sim/m32r/addv3.cgs: Test ADDV3 instruction.
- * sim/m32r/addx.cgs: Test ADDX instruction.
- * sim/m32r/lock.cgs: Test LOCK instruction.
- * sim/m32r/neg.cgs: Test NEG instruction.
- * sim/m32r/not.cgs: Test NOT instruction.
- * sim/m32r/unlock.cgs: Test UNLOCK instruction.
-
-Thu Feb 19 11:15:45 1998 Nick Clifton <nickc@cygnus.com>
-
- * sim/m32r/testutils.inc (mvaddr_h_gr): new macro to load an
- address into a general register.
-
- * sim/m32r/or3.cgs: Test OR3 instruction.
- * sim/m32r/rach.cgs: Test RACH instruction.
- * sim/m32r/rem.cgs: Test REM instruction.
- * sim/m32r/sub.cgs: Test SUB instruction.
- * sim/m32r/mv.cgs: Test MV instruction.
- * sim/m32r/mul.cgs: Test MUL instruction.
- * sim/m32r/bl24.cgs: Test long BL instruction.
- * sim/m32r/bl8.cgs: Test short BL instruction.
- * sim/m32r/blez.cgs: Test BLEZ instruction.
- * sim/m32r/bltz.cgs: Test BLTZ instruction.
- * sim/m32r/bne.cgs: Test BNE instruction.
- * sim/m32r/bnez.cgs: Test BNEZ instruction.
- * sim/m32r/bra24.cgs: Test long BRA instruction.
- * sim/m32r/bra8.cgs: Test short BRA instruction.
- * sim/m32r/jl.cgs: Test JL instruction.
- * sim/m32r/or.cgs: Test OR instruction.
- * sim/m32r/jmp.cgs: Test JMP instruction.
- * sim/m32r/and.cgs: Test AND instruction.
- * sim/m32r/and3.cgs: Test AND3 instruction.
- * sim/m32r/beq.cgs: Test BEQ instruction.
- * sim/m32r/beqz.cgs: Test BEQZ instruction.
- * sim/m32r/bgez.cgs: Test BGEZ instruction.
- * sim/m32r/bgtz.cgs: Test BGTZ instruction.
- * sim/m32r/cmp.cgs: Test CMP instruction.
- * sim/m32r/cmpi.cgs: Test CMPI instruction.
- * sim/m32r/cmpu.cgs: Test CMPU instruction.
- * sim/m32r/cmpui.cgs: Test CMPUI instruction.
- * sim/m32r/div.cgs: Test DIV instruction.
- * sim/m32r/divu.cgs: Test DIVU instruction.
- * sim/m32r/cmpeq.cgs: Test CMPEQ instruction.
- * sim/m32r/sll.cgs: Test SLL instruction.
- * sim/m32r/sll3.cgs: Test SLL3 instruction.
- * sim/m32r/slli.cgs: Test SLLI instruction.
- * sim/m32r/sra.cgs: Test SRA instruction.
- * sim/m32r/sra3.cgs: Test SRA3 instruction.
- * sim/m32r/srai.cgs: Test SRAI instruction.
- * sim/m32r/srl.cgs: Test SRL instruction.
- * sim/m32r/srl3.cgs: Test SRL3 instruction.
- * sim/m32r/srli.cgs: Test SRLI instruction.
- * sim/m32r/xor3.cgs: Test XOR3 instruction.
- * sim/m32r/xor.cgs: Test XOR instruction.
-
-Tue Feb 17 12:46:05 1998 Doug Evans <devans@seba.cygnus.com>
-
- * config/default.exp: New file.
- * lib/sim-defs.exp: New file.
- * sim/m32r/*: m32r dejagnu simulator testsuite.
-
- * Makefile.in (build_alias): Define.
- (arch): Define.
- (RUNTEST_FOR_TARGET): Delete.
- (RUNTEST): Fix.
- (check): Depend on site.exp. Run dejagnu.
- (site.exp): New target.
- * configure.in (arch): Define from target_cpu.
- * configure: Regenerate.
-
-Wed Sep 17 10:21:26 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * common/bits-gen.c (gen_bit): Pass in the full name of the macro.
- (gen_mask): Ditto.
-
- * common/bits-tst.c (main): Add tests for LSSEXT, MSSEXT.
- (calc): Add support for 8 bit version of macros.
- (main): Add tests for 8 bit versions of macros.
- (check_sext): Check SEXT of zero clears bits.
-
- * common/bits-gen.c (main): Generate tests for 8 bit versions of
- macros.
-
-Thu Sep 11 13:04:40 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * common/Make-common.in: New file, provide generic rules for
- running checks.
-
-Mon Sep 1 16:43:55 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure.in (configdirs): Test for the target directory instead
- of matching on a target.
-
diff --git a/sim/testsuite/Makefile.in b/sim/testsuite/Makefile.in
deleted file mode 100644
index 637a8fe7aa4..00000000000
--- a/sim/testsuite/Makefile.in
+++ /dev/null
@@ -1,182 +0,0 @@
-# Makefile for regression testing the GNU debugger.
-# Copyright (C) 1997, 1998 Free Software Foundation, Inc.
-
-# This file is part of GDB.
-
-# GDB is free software; you can redistribute it and/or modify
-# it under the terms of the GNU General Public License as published by
-# the Free Software Foundation; either version 2, or (at your option)
-# any later version.
-
-# GDB is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
-VPATH = @srcdir@
-srcdir = @srcdir@
-prefix = @prefix@
-exec_prefix = @exec_prefix@
-
-build_canonical = @build@
-build_alias = @build_alias@
-host_canonical = @host@
-host_alias = @host_alias@
-target_canonical = @target@
-target_alias = @target_alias@
-program_transform_name = @program_transform_name@
-
-arch = @arch@
-
-SHELL = /bin/sh
-SUBDIRS = @subdirs@
-RPATH_ENVVAR = @RPATH_ENVVAR@
-
-EXPECT = `if [ -f $${rootme}/../../expect/expect ] ; then \
- echo $${rootme}/../../expect/expect ; \
- else echo expect ; fi`
-
-RUNTEST = `if [ -f $${srcdir}/../../dejagnu/runtest ] ; then \
- echo $${srcdir}/../../dejagnu/runtest ; else echo runtest; \
- fi`
-
-RUNTESTFLAGS =
-
-#### host, target, and site specific Makefile frags come in here.
-
-# The use of $$(x_FOR_TARGET) reduces the command line length by not
-# duplicating the lengthy definition.
-
-TARGET_FLAGS_TO_PASS = \
- "prefix=$(prefix)" \
- "exec_prefix=$(exec_prefix)" \
- "against=$(against)" \
- 'CC=$$(CC_FOR_TARGET)' \
- "CC_FOR_TARGET=$(CC_FOR_TARGET)" \
- "CFLAGS=$(TESTSUITE_CFLAGS)" \
- "CHILLFLAGS=$(CHILLFLAGS)" \
- 'CHILL=$$(CHILL_FOR_TARGET)' \
- "CHILL_FOR_TARGET=$(CHILL_FOR_TARGET)" \
- "CHILL_LIB=$(CHILL_LIB)" \
- 'CXX=$$(CXX_FOR_TARGET)' \
- "CXX_FOR_TARGET=$(CXX_FOR_TARGET)" \
- "CXXFLAGS=$(CXXFLAGS)" \
- "MAKEINFO=$(MAKEINFO)" \
- "INSTALL=$(INSTALL)" \
- "INSTALL_PROGRAM=$(INSTALL_PROGRAM)" \
- "INSTALL_DATA=$(INSTALL_DATA)" \
- "RUNTESTFLAGS=$(RUNTESTFLAGS)"
-
-# "RUNTEST=$(RUNTEST)" \
-
-all:
- @echo "Nothing to be done for all..."
-
-.NOEXPORT:
-info:
-install-info:
-dvi:
-
-install:
-
-uninstall: force
-
-installcheck:
-
-check: check-DEJAGNU check-recursive
-
-#test1:
-check-recursive:
- @for i in . ${SUBDIRS}; do \
- if [ $$i = . ] ; then continue ; fi ; \
- if [ -d ./$$i ] ; then \
- if (rootme=`pwd`/ ; export rootme ; \
- rootsrc=`cd $(srcdir); pwd`/ ; export rootsrc ; \
- echo "check recursively into $$i directory..."; \
- cd ./$$i; \
- $(MAKE) $(TARGET_FLAGS_TO_PASS) check) ; then true ; \
- else exit 1 ; fi ; \
- else true ; fi ; \
- done
-
-#test2:
-check-DEJAGNU: site.exp
- echo "Dejagnu-checking in `pwd` directory ..."
- rootme=`pwd`; export rootme; echo rootme = $$rootme; \
- srcdir=`cd ${srcdir}; pwd`; export srcdir ; echo srcdir = $$srcdir; \
- EXPECT=${EXPECT} ; export EXPECT ; echo EXPECT = $$EXPECT; \
- if [ -f $$rootme/../../expect/expect ]; then \
- TCL_LIBRARY=`cd $$srcdir/../../tcl/library && pwd`; \
- export TCL_LIBRARY; \
- fi; \
- echo TCL_LIBRARY = $$TCL_LIBRARY; \
- runtest=$(RUNTEST); echo runtest = $$runtest; \
- if $(SHELL) -c "$$runtest --version" > /dev/null 2>&1; then \
- $$runtest $(RUNTESTFLAGS); \
- else echo "WARNING: could not find \`runtest'" 1>&2; :;\
- fi
-
-
-site.exp: Makefile
- @echo 'Making a new site.exp file...'
- -@rm -f site.bak
- @echo '## these variables are automatically generated by make ##' > $@-t
- @echo '# Do not edit here. If you wish to override these values' >> $@-t
- @echo '# edit the last section' >> $@-t
- @echo 'set tool sim' >> $@-t
- @echo 'set srcdir $(srcdir)' >> $@-t
- @echo 'set objdir' `pwd` >> $@-t
- @echo 'set arch $(arch)' >> $@-t
- @echo 'set build_alias $(build_alias)' >> $@-t
- @echo 'set build_triplet $(build_canonical)' >> $@-t
- @echo 'set host_alias $(host_alias)' >> $@-t
- @echo 'set host_triplet $(host_canonical)' >> $@-t
- @echo 'set target_alias $(target_alias)' >> $@-t
- @echo 'set target_triplet $(target_canonical)' >> $@-t
- @echo '## All variables above are generated by configure. Do Not Edit ##' >> $@-t
- -@sed '1,/^## All variables above are.*##/ d' site.exp >> $@-t
- -@mv site.exp site.bak
- @mv $@-t site.exp
-
-force:;
-
-clean mostlyclean:
- -rm -f *~ core *.o a.out xgdb *.x *.grt
- -rm -f *.rum *.c *.dif *.*out
- if [ x"${SUBDIRS}" != x ] ; then \
- for dir in ${SUBDIRS}; \
- do \
- echo "$$dir:"; \
- if [ -d $$dir ]; then \
- (cd $$dir; $(MAKE) clean); \
- fi; \
- done ; \
- else true; fi
-
-distclean maintainer-clean realclean: clean
- -rm -f *~ core
- -rm -f Makefile config.status *-init.exp
- -rm -fr *.log summary detail *.plog *.sum *.psum site.*
- if [ x"${SUBDIRS}" != x ] ; then \
- for dir in ${SUBDIRS}; \
- do \
- echo "$$dir:"; \
- if [ -d $$dir ]; then \
- (cd $$dir; $(MAKE) distclean); \
- fi; \
- done ; \
- else true; fi
-
-Makefile : Makefile.in config.status
- $(SHELL) config.status
-
-config.status: $(srcdir)/configure
- $(SHELL) ./config.status --recheck
-# FIXME: Requires --enable-maintainer-mode, which one could add, but
-# it's provided by automake. Maybe switch to automake someday.
-#$(srcdir)/configure: @MAINT@ $(srcdir)/configure.in
-# cd $(srcdir) && autoconf
diff --git a/sim/testsuite/common/Make-common.in b/sim/testsuite/common/Make-common.in
deleted file mode 100644
index 7afef4a99dd..00000000000
--- a/sim/testsuite/common/Make-common.in
+++ /dev/null
@@ -1,90 +0,0 @@
-AS_FOR_TARGET = `\
- if [ -x ../../../gas/as-new ]; then \
- echo ../../../gas/as-new ; \
- else \
- echo $(target_alias)-as ; \
- fi`
-
-LD_FOR_TARGET = `\
- if [ -x ../../../ld/ld-new ]; then \
- echo ../../../ld/ld-new ; \
- else \
- echo $(target_alias)-ld ; \
- fi`
-
-RUN_FOR_TARGET = `\
- if [ -x ../../../sim/v850/run ]; then \
- echo ../../../sim/v850/run ; \
- else \
- echo $(target_alias)-run ; \
- fi`
-
-
-check: sanity $(TESTS)
-sanity:
- @eval echo AS_FOR_TARGET=$(AS_FOR_TARGET)
- @eval echo LD_FOR_TARGET=$(LD_FOR_TARGET)
- @eval echo RUN_FOR_TARGET=$(RUN_FOR_TARGET)
-
-clean:
- rm -f $(TESTS)
- rm -f *.run *.o
- rm -f core *.core
-
-# Rules for running the tests
-
-.SUFFIXES: .ok .run .hi .ko .ti
-.run.ok:
- rm -f tmp-$* $*.hi
- ulimit -t 5 ; \
- $(RUN_FOR_TARGET) $(RUNFLAGS_FOR_TARGET) $*.run > tmp-$*
- mv tmp-$* $*.ok
-.run.hi:
- rm -f tmp-$* $*.hi diff-$*
- ulimit -t 5 ; \
- $(RUN_FOR_TARGET) $(RUNFLAGS_FOR_TARGET) $*.run > tmp-$*
- echo 'Hello World!' | diff - tmp-$* > diff-$*
- cat tmp-$* diff-$* > $*.hi
-.run.ko:
- rm -f tmp-$* $*.ko
- set +e ; \
- ulimit -t 5 ; \
- $(RUN_FOR_TARGET) $(RUNFLAGS_FOR_TARGET) $*.run > tmp-$* ; \
- if [ $$? -eq 47 ] ; then \
- exit 0 ; \
- else \
- exit 1 ; \
- fi
- mv tmp-$* $*.ko
-.run.ti:
- rm -f tmp-$* $*.ti
- set +e ; \
- ulimit -t 5 ; \
- $(RUN_FOR_TARGET) $(RUNFLAGS_FOR_TARGET) $(INTFLAGS_FOR_TARGET) $*.run > tmp-$*
- test `cat tmp-$* | wc -l` -eq 10 < /dev/null
- test `grep Tick tmp-$* | wc -l` -eq 10 < /dev/null
- mv tmp-$* $*.ti
-
-
-# Rules for building the test
-# Preference is for obtaining the executable (.run) from a prebuilt image
-
-.SUFFIXES: .uue .s .S .run
-.uue.run:
- head $* | grep $*.run > /dev/null
- uudecode $*.uue
-.run.u:
- uuencode < $*.run $*.run > $*.u
-.o.run:
- $(LD_FOR_TARGET) $(LDFLAGS_FOR_TARGET) -o $*.run $*.o
-.s.o:
- $(AS_FOR_TARGET) $(ASFLAGS_FOR_TARGET) -I$(srcdir) $(srcdir)/$*.s -o $*.o
-.S.o:
- $(AS_FOR_TARGET) $(ASFLAGS_FOR_TARGET) -I$(srcdir) $(srcdir)/$*.S -o $*.o
-
-
-Makefile: Makefile.in config.status
- $(SHELL) ./config.status
-
-config.status: configure
- $(SHELL) ./config.status --recheck
diff --git a/sim/testsuite/common/Makefile.in b/sim/testsuite/common/Makefile.in
deleted file mode 100644
index d088501676e..00000000000
--- a/sim/testsuite/common/Makefile.in
+++ /dev/null
@@ -1,53 +0,0 @@
-CC=gcc
-CFLAGS = -Wall -Werror -I../../common -I../../../include -g
-default: check
-
-
-# Verify SIM-BITS
-
-check: bits32m0.ok bits32m31.ok bits64m0.ok bits64m63.ok
-all: bits32m0 bits32m31 bits64m0 bits64m63
-
-bits32m0.c: bits-gen bits-tst.c
- ./bits-gen 32 0 big > tmp-bits32m0.c
- cat bits-tst.c >> tmp-bits32m0.c
- mv tmp-bits32m0.c bits32m0.c
-bits32m31.c: bits-gen bits-tst.c
- ./bits-gen 32 31 little > tmp-bits32m31.c
- cat bits-tst.c >> tmp-bits32m31.c
- mv tmp-bits32m31.c bits32m31.c
-bits64m0.c: bits-gen bits-tst.c
- ./bits-gen 64 0 big > tmp-bits64m0.c
- cat bits-tst.c >> tmp-bits64m0.c
- mv tmp-bits64m0.c bits64m0.c
-bits64m63.c: bits-gen bits-tst.c
- ./bits-gen 64 63 little > tmp-bits64m63.c
- cat bits-tst.c >> tmp-bits64m63.c
- mv tmp-bits64m63.c bits64m63.c
-
-
-
-# Verify SIM-FPU
-#
-#check: fpu-tst.ok
-#all: fpu-tst
-
-
-
-# Verify SIM-ALU
-
-check: alu-tst.ok
-all: alu-tst
-alu-tst.o: alu-tst.c alu-n-tst.h
-
-clean:
- rm -f *.o
- rm -f *.ok
- rm -f bits32m0 bits32m31 bits64m0 bits64m63 bits-gen
- rm -f tmp-*
- rm -f alu-tst
-
-.SUFIXES: .ok
-%.ok: %
- ./$<
- touch $<.ok
diff --git a/sim/testsuite/common/alu-n-tst.h b/sim/testsuite/common/alu-n-tst.h
deleted file mode 100644
index cd218d4339d..00000000000
--- a/sim/testsuite/common/alu-n-tst.h
+++ /dev/null
@@ -1,260 +0,0 @@
-#ifndef N
-#error "N must be #defined"
-#endif
-
-#include "symcat.h"
-
-/* NOTE: see end of file for #undef of these macros */
-#define unsignedN XCONCAT2(unsigned,N)
-#define MAX_INT XCONCAT2(MAX_INT,N)
-#define MIN_INT XCONCAT2(MIN_INT,N)
-#define alu_N_tests XCONCAT3(alu_,N,_tests)
-#define do_alu_N_tests XCONCAT3(do_alu_,N,_tests)
-#define OP_BEGIN XCONCAT3(ALU,N,_BEGIN)
-#define OP_ADDC XCONCAT3(ALU,N,_ADDC)
-#define OP_ADDC_C XCONCAT3(ALU,N,_ADDC_C)
-#define OP_SUBC XCONCAT3(ALU,N,_SUBC)
-#define OP_SUBB XCONCAT3(ALU,N,_SUBB)
-#define OP_SUBB_B XCONCAT3(ALU,N,_SUBB_B)
-#define OP_SUBC_X XCONCAT3(ALU,N,_SUBC_X)
-#define OP_NEGC XCONCAT3(ALU,N,_NEGC)
-#define OP_NEGB XCONCAT3(ALU,N,_NEGB)
-#define HAD_CARRY_BORROW (XCONCAT3(ALU,N,_HAD_CARRY_BORROW) != 0)
-#define HAD_OVERFLOW (XCONCAT3(ALU,N,_HAD_OVERFLOW) != 0)
-#define RESULT XCONCAT3(ALU,N,_RESULT)
-#define CARRY_BORROW_RESULT XCONCAT3(ALU,N,_CARRY_BORROW_RESULT)
-#define OVERFLOW_RESULT XCONCAT3(ALU,N,_OVERFLOW_RESULT)
-#define do_op_N XCONCAT2(do_op_,N)
-
-
-void
-do_op_N (const alu_test *tst)
-{
- const alu_op *op;
- int borrow_p = 0;
- OP_BEGIN (tst->begin);
- print_hex (tst->begin, N);
- for (op = tst->ops; op->op != NULL; op++)
- {
- printf (" %s ", op->op);
- print_hex (op->arg, N);
- if (strcmp (op->op, "ADDC") == 0)
- OP_ADDC (op->arg);
- else if (strcmp (op->op, "ADDC_C0") == 0)
- OP_ADDC_C (op->arg, 0);
- else if (strcmp (op->op, "ADDC_C1") == 0)
- OP_ADDC_C (op->arg, 1);
- else if (strcmp (op->op, "SUBC") == 0)
- OP_SUBC (op->arg);
- else if (strcmp (op->op, "SUBC_X0") == 0)
- OP_SUBC_X (op->arg, 0);
- else if (strcmp (op->op, "SUBC_X1") == 0)
- OP_SUBC_X (op->arg, 1);
- else if (strcmp (op->op, "SUBB") == 0)
- {
- OP_SUBB (op->arg);
- borrow_p ++;
- }
- else if (strcmp (op->op, "SUBB_B0") == 0)
- {
- OP_SUBB_B (op->arg, 0);
- borrow_p ++;
- }
- else if (strcmp (op->op, "SUBB_B1") == 0)
- {
- OP_SUBB_B (op->arg, 1);
- borrow_p ++;
- }
- else if (strcmp (op->op, "NEGC") == 0)
- OP_NEGC ();
- else if (strcmp (op->op, "NEGB") == 0)
- {
- OP_NEGB ();
- borrow_p ++;
- }
- else
- {
- printf (" -- operator unknown\n");
- abort ();
- }
- }
- printf (" = ");
- print_hex (tst->result, N);
- if (borrow_p)
- printf (" B:%d", tst->carry_borrow);
- else
- printf (" C:%d", tst->carry_borrow);
- printf (" V:%d", tst->overflow);
- if (tst->carry_borrow != HAD_CARRY_BORROW)
- {
- if (borrow_p)
- printf (" -- borrow (%d) wrong", HAD_CARRY_BORROW);
- else
- printf (" -- carry (%d) wrong", HAD_CARRY_BORROW);
- errors ++;
- }
- if (tst->overflow != HAD_OVERFLOW)
- {
- printf (" -- overflow (%d) wrong", HAD_OVERFLOW);
- errors ++;
- }
- if ((unsignedN) CARRY_BORROW_RESULT != (unsignedN) tst->result)
- {
- printf (" -- result for carry/borrow wrong ");
- print_hex (CARRY_BORROW_RESULT, N);
- errors ++;
- }
- if ((unsignedN) OVERFLOW_RESULT != (unsignedN) tst->result)
- {
- printf (" -- result for overflow wrong ");
- print_hex (OVERFLOW_RESULT, N);
- errors ++;
- }
- if ((unsignedN) RESULT != (unsignedN) tst->result)
- {
- printf (" -- result wrong ");
- print_hex (RESULT, N);
- errors ++;
- }
- printf ("\n");
-}
-
-
-const alu_test alu_N_tests[] = {
-
- /* 0 + 0; 0 + 1; 1 + 0; 1 + 1 */
- { 0, { { "ADDC", 0 }, }, 0, 0, 0, },
- { 0, { { "ADDC", 1 }, }, 1, 0, 0, },
- { 1, { { "ADDC", 0 }, }, 1, 0, 0, },
- { 1, { { "ADDC", 1 }, }, 2, 0, 0, },
-
- /* 0 + 0 + 0; 0 + 0 + 1; 0 + 1 + 0; 0 + 1 + 1 */
- /* 1 + 0 + 0; 1 + 0 + 1; 1 + 1 + 0; 1 + 1 + 1 */
- { 0, { { "ADDC_C0", 0 }, }, 0, 0, 0, },
- { 0, { { "ADDC_C0", 1 }, }, 1, 0, 0, },
- { 0, { { "ADDC_C1", 0 }, }, 1, 0, 0, },
- { 0, { { "ADDC_C1", 1 }, }, 2, 0, 0, },
- { 1, { { "ADDC_C0", 0 }, }, 1, 0, 0, },
- { 1, { { "ADDC_C0", 1 }, }, 2, 0, 0, },
- { 1, { { "ADDC_C1", 0 }, }, 2, 0, 0, },
- { 1, { { "ADDC_C1", 1 }, }, 3, 0, 0, },
-
- /* */
- { MAX_INT, { { "ADDC", 1 }, }, MIN_INT, 0, 1, },
- { MIN_INT, { { "ADDC", -1 }, }, MAX_INT, 1, 1, },
- { MAX_INT, { { "ADDC", MIN_INT }, }, -1, 0, 0, },
- { MIN_INT, { { "ADDC", MAX_INT }, }, -1, 0, 0, },
- { MAX_INT, { { "ADDC", MAX_INT }, }, MAX_INT << 1, 0, 1, },
- { MIN_INT, { { "ADDC", MIN_INT }, }, 0, 1, 1, },
- /* */
- { 0, { { "ADDC_C1", -1 }, }, 0, 1, 0, },
- { 0, { { "ADDC_C1", -2 }, }, -1, 0, 0, },
- { -1, { { "ADDC_C1", 0 }, }, 0, 1, 0, },
- { 0, { { "ADDC_C0", 0 }, }, 0, 0, 0, },
- { -1, { { "ADDC_C1", -1 }, }, -1, 1, 0, },
- { -1, { { "ADDC_C1", 1 }, }, 1, 1, 0, },
- { 0, { { "ADDC_C1", MAX_INT }, }, MIN_INT, 0, 1, },
- { MAX_INT, { { "ADDC_C1", 1 }, }, MIN_INT + 1, 0, 1, },
- { MAX_INT, { { "ADDC_C1", MIN_INT }, }, 0, 1, 0, },
- { MAX_INT, { { "ADDC_C1", MAX_INT }, }, (MAX_INT << 1) + 1, 0, 1, },
- { MAX_INT, { { "ADDC_C0", MAX_INT }, }, MAX_INT << 1, 0, 1, },
-
- /* 0 - 0 */
- { 0, { { "SUBC", 0 }, }, 0, 1, 0, },
- { 0, { { "SUBB", 0 }, }, 0, 0, 0, },
-
- /* 0 - 1 */
- { 0, { { "SUBC", 1 }, }, -1, 0, 0, },
- { 0, { { "SUBB", 1 }, }, -1, 1, 0, },
-
- /* 1 - 0 */
- { 1, { { "SUBC", 0 }, }, 1, 1, 0, },
- { 1, { { "SUBB", 0 }, }, 1, 0, 0, },
-
- /* 1 - 1 */
- { 1, { { "SUBC", 1 }, }, 0, 1, 0, },
- { 1, { { "SUBB", 1 }, }, 0, 0, 0, },
-
- /* 0 - 0 - 0 */
- { 0, { { "SUBC_X0", 0 }, }, -1, 0, 0, },
- { 0, { { "SUBB_B0", 0 }, }, 0, 0, 0, },
-
- /* 0 - 0 - 1 */
- { 0, { { "SUBC_X0", 1 }, }, -2, 0, 0, },
- { 0, { { "SUBB_B0", 1 }, }, -1, 1, 0, },
-
- /* 0 - 1 - 0 */
- { 0, { { "SUBC_X1", 0 }, }, 0, 1, 0, },
- { 0, { { "SUBB_B1", 0 }, }, -1, 1, 0, },
-
- /* 0 - 1 - 1 */
- { 0, { { "SUBC_X1", 1 }, }, -1, 0, 0, },
- { 0, { { "SUBB_B1", 1 }, }, -2, 1, 0, },
-
- /* 1 - 0 - 0 */
- { 1, { { "SUBC_X0", 0 }, }, 0, 1, 0, },
- { 1, { { "SUBB_B0", 0 }, }, 1, 0, 0, },
-
- /* 1 - 0 - 1 */
- { 1, { { "SUBC_X0", 1 }, }, -1, 0, 0, },
- { 1, { { "SUBB_B0", 1 }, }, 0, 0, 0, },
-
- /* 1 - 1 - 0 */
- { 1, { { "SUBC_X1", 0 }, }, 1, 1, 0, },
- { 1, { { "SUBB_B1", 0 }, }, 0, 0, 0, },
-
- /* 1 - 1 - 1 */
- { 1, { { "SUBC_X1", 1 }, }, 0, 1, 0, },
- { 1, { { "SUBB_B1", 1 }, }, -1, 1, 0, },
-
- /* */
- { 0, { { "SUBC", MIN_INT }, }, MIN_INT, 0, 1, },
- { MIN_INT, { { "SUBC", 1 }, }, MAX_INT, 1, 1, },
- { MAX_INT, { { "SUBC", MAX_INT }, }, 0, 1, 0, },
-
- /* */
- { 0, { { "SUBC_X0", MIN_INT }, }, MAX_INT, 0, 0, },
- { MIN_INT, { { "SUBC_X1", 0 }, }, MIN_INT, 1, 0, },
- { MAX_INT, { { "SUBC_X0", MAX_INT }, }, -1, 0, 0, },
-
- /* */
- { MAX_INT, { { "NEGC", 0 }, }, MIN_INT + 1, 0, 0, },
- { MAX_INT, { { "NEGC", 0 }, }, MIN_INT + 1, 0, 0, },
- { MIN_INT, { { "NEGC", 0 }, }, MIN_INT, 0, 1, },
- { 0, { { "NEGC", 0 }, }, 0, 1, 0, },
- { -1, { { "NEGC", 0 }, }, 1, 0, 0, },
- { 1, { { "NEGC", 0 }, }, -1, 0, 0, },
-};
-
-
-static void
-do_alu_N_tests (void)
-{
- int i;
- for (i = 0; i < sizeof (alu_N_tests) / sizeof (*alu_N_tests); i++)
- {
- const alu_test *tst = &alu_N_tests[i];
- do_op_N (tst);
- }
-}
-
-
-#undef OP_BEGIN
-#undef OP_ADDC
-#undef OP_ADDC_C
-#undef OP_SUBB
-#undef OP_SUBC
-#undef OP_SUBC_X
-#undef OP_SUBB_B
-#undef HAD_OVERFLOW
-#undef HAD_CARRY_BORROW
-#undef OVERFLOW_RESULT
-#undef CARRY_BORROW_RESULT
-#undef RESULT
-#undef do_op_N
-#undef unsignedN
-#undef MAX_INT
-#undef MIN_INT
-#undef alu_N_tests
-#undef do_alu_N_tests
-
diff --git a/sim/testsuite/common/alu-tst.c b/sim/testsuite/common/alu-tst.c
deleted file mode 100644
index e7fffe502cd..00000000000
--- a/sim/testsuite/common/alu-tst.c
+++ /dev/null
@@ -1,104 +0,0 @@
-#define WITH_TARGET_WORD_MSB 0
-#define WITH_TARGET_WORD_BITSIZE 64
-#define WITH_HOST_WORD_BITSIZE (sizeof (int) * 8)
-#define WITH_TARGET_BYTE_ORDER BIG_ENDIAN /* does not matter */
-
-#define ASSERT(EXPRESSION) \
-{ \
- if (!(EXPRESSION)) { \
- fprintf (stderr, "%s:%d: assertion failed - %s\n", \
- __FILE__, __LINE__, #EXPRESSION); \
- abort (); \
- } \
-}
-
-#define SIM_BITS_INLINE (INCLUDE_MODULE | INCLUDED_BY_MODULE)
-
-#include <string.h>
-
-#include "sim-basics.h"
-
-#include "sim-alu.h"
-
-#include <stdio.h>
-
-typedef struct {
- char *op;
- unsigned64 arg;
-} alu_op;
-
-typedef struct {
- unsigned64 begin;
- alu_op ops[4];
- unsigned64 result;
- int carry_borrow;
- int overflow;
-} alu_test;
-
-#define MAX_INT8 UNSIGNED64 (127)
-#define MIN_INT8 UNSIGNED64 (128)
-
-#define MAX_INT16 UNSIGNED64 (32767)
-#define MIN_INT16 UNSIGNED64 (32768)
-
-#define MAX_INT32 UNSIGNED64 (0x7fffffff)
-#define MIN_INT32 UNSIGNED64 (0x80000000)
-
-#define MAX_INT64 UNSIGNED64 (0x7fffffffffffffff)
-#define MIN_INT64 UNSIGNED64 (0x8000000000000000)
-
-static void
-print_hex (unsigned64 val, int nr_bits)
-{
- switch (nr_bits)
- {
- case 8:
- printf ("0x%02lx", (long) (unsigned8) (val));
- break;
- case 16:
- printf ("0x%04lx", (long) (unsigned16) (val));
- break;
- case 32:
- printf ("0x%08lx", (long) (unsigned32) (val));
- break;
- case 64:
- printf ("0x%08lx%08lx",
- (long) (unsigned32) (val >> 32),
- (long) (unsigned32) (val));
- break;
- default:
- abort ();
- }
-}
-
-
-int errors = 0;
-
-
-#define N 8
-#include "alu-n-tst.h"
-#undef N
-
-#define N 16
-#include "alu-n-tst.h"
-#undef N
-
-#define N 32
-#include "alu-n-tst.h"
-#undef N
-
-#define N 64
-#include "alu-n-tst.h"
-#undef N
-
-
-
-int
-main ()
-{
- do_alu_8_tests ();
- do_alu_16_tests ();
- do_alu_32_tests ();
- do_alu_64_tests ();
- return (errors != 0);
-}
diff --git a/sim/testsuite/common/bits-gen.c b/sim/testsuite/common/bits-gen.c
deleted file mode 100644
index 71ddef303df..00000000000
--- a/sim/testsuite/common/bits-gen.c
+++ /dev/null
@@ -1,319 +0,0 @@
-/* Miscellaneous simulator utilities.
- Copyright (C) 1997 Free Software Foundation, Inc.
- Contributed by Cygnus Support.
-
-This file is part of GDB, the GNU debugger.
-
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License along
-with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
-
-
-#include <stdio.h>
-
-
-void
-gen_struct (void)
-{
- printf ("\n");
- printf ("typedef struct _test_tuples {\n");
- printf (" int line;\n");
- printf (" int row;\n");
- printf (" int col;\n");
- printf (" long long val;\n");
- printf (" long long check;\n");
- printf ("} test_tuples;\n");
- printf ("\n");
- printf ("typedef struct _test_spec {\n");
- printf (" const char *file;\n");
- printf (" const char *macro;\n");
- printf (" int nr_rows;\n");
- printf (" int nr_cols;\n");
- printf (" test_tuples *tuples;\n");
- printf ("} test_spec;\n");
-}
-
-
-void
-gen_bit (int bitsize,
- int msb,
- const char *macro,
- int nr_bits)
-{
- int i;
-
- printf ("\n/* Test the %s macro */\n", macro);
- printf ("test_tuples %s_tuples[%d] = {\n", macro, nr_bits);
- for (i = 0; i < nr_bits; i++)
- {
- /* compute what we think the value is */
- unsigned long long bit = 1;
- if (msb == 0)
- bit <<= nr_bits - i - 1;
- else
- bit <<= i;
- if (bitsize == 32)
- bit = (unsigned) bit; /* truncate it! */
- /* write it out */
- printf (" { __LINE__, ");
- printf ("%d, %2d, ", -1, i);
- printf ("%s (%2d), ", macro, i);
- printf ("UNSIGNED64 (0x%08lx%08lx), ",
- (long) (bit >> 32), (long) bit);
- printf ("},\n");
- }
- printf ("};\n");
- printf ("\n");
- printf ("test_spec %s_test = { __FILE__, \"%s\", 1, %d, %s_tuples, };\n",
- macro, macro, nr_bits, macro);
- printf ("\n");
-}
-
-
-void
-gen_enum (const char *macro,
- int nr_bits)
-{
- int i;
-
- printf ("\n/* Test the %s macro in an enum */\n", macro);
- printf ("enum enum_%s {\n", macro);
- for (i = 0; i < nr_bits; i++)
- {
- printf (" elem_%s_%d = %s (%d),\n", macro, i, macro, i);
- }
- printf ("};\n");
- printf ("\n");
-}
-
-
-void
-gen_mask (int bitsize,
- const char *msb,
- const char *macro,
- int nr_bits)
-{
- int l;
- int h;
- printf ("\n/* Test the %s%s macro */\n", msb, macro);
- printf ("test_tuples %s_tuples[%d][%d] = {\n", macro, nr_bits, nr_bits);
- for (l = 0; l < nr_bits; l++)
- {
- printf (" {\n");
- for (h = 0; h < nr_bits; h++)
- {
- printf (" { __LINE__, ");
- if ((strcmp (msb, "MS") == 0 && l <= h)
- || (strcmp (msb, "MS") != 0 && l >= h)
- || (strcmp (macro, "") == 0))
- {
- /* compute the mask */
- unsigned long long mask = 0;
- int b;
- for (b = 0; b < nr_bits; b++)
- {
- unsigned long long bit = 1;
- if (strcmp (msb, "MS") == 0)
- {
- if ((l <= b && b <= h)
- || (h < l && (b <= h || b >= l)))
- bit <<= (nr_bits - b - 1);
- else
- bit = 0;
- }
- else
- {
- if ((l >= b && b >= h)
- || (h > l && (b >= h || b <= l)))
- bit <<= b;
- else
- bit = 0;
- }
- mask |= bit;
- }
- if (bitsize == 32)
- mask = (unsigned long) mask;
- printf ("%d, %d, ", l, h);
- printf ("%s%s (%2d, %2d), ", msb, macro, l, h);
- printf ("UNSIGNED64 (0x%08lx%08lx), ",
- (long) (mask >> 32), (long) mask);
- }
- else
- printf ("-1, -1, ");
- printf ("},\n");
- }
- printf (" },\n");
- }
- printf ("};\n");
- printf ("\n");
- printf ("test_spec %s_test = { __FILE__, \"%s%s\", %d, %d, &%s_tuples[0][0], };\n",
- macro, msb, macro, nr_bits, nr_bits, macro);
- printf ("\n");
-}
-
-
-void
-usage (int reason)
-{
- fprintf (stderr, "Usage:\n");
- fprintf (stderr, " bits-gen <nr-bits> <msb> <byte-order>\n");
- fprintf (stderr, "Generate a test case for the simulator bit manipulation code\n");
- fprintf (stderr, " <nr-bits> = { 32 | 64 }\n");
- fprintf (stderr, " <msb> = { 0 | { 31 | 63 } }\n");
- fprintf (stderr, " <byte-order> = { big | little }\n");
-
- switch (reason)
- {
- case 1: fprintf (stderr, "Wrong number of arguments\n");
- break;
- case 2:
- fprintf (stderr, "Invalid <nr-bits> argument\n");
- break;
- case 3:
- fprintf (stderr, "Invalid <msb> argument\n");
- break;
- case 4:
- fprintf (stderr, "Invalid <byte-order> argument\n");
- break;
- default:
- }
-
- exit (1);
-}
-
-
-
-int
-main (argc, argv)
- int argc;
- char **argv;
-{
- int bitsize;
- int msb;
- char *ms;
- int big_endian;
-
- if (argc != 4)
- usage (1);
-
- if (strcmp (argv [1], "32") == 0)
- bitsize = 32;
- else if (strcmp (argv [1], "64") == 0)
- bitsize = 64;
- else
- usage (2);
-
- if (strcmp (argv [2], "0") == 0)
- msb = 0;
- else if (strcmp (argv [2], "31") == 0 && bitsize == 32)
- msb = 31;
- else if (strcmp (argv [2], "63") == 0 && bitsize == 64)
- msb = 63;
- else
- usage (3);
- if (msb == 0)
- ms = "MS";
- else
- ms = "LS";
-
- if (strcmp (argv [3], "big") == 0)
- big_endian = 1;
- else if (strcmp (argv [3], "little") == 0)
- big_endian = 0;
- else
- usage (4);
-
- printf ("#define WITH_TARGET_WORD_BITSIZE %d\n", bitsize);
- printf ("#define WITH_TARGET_WORD_MSB %d\n", msb);
- printf ("#define WITH_HOST_WORD_BITSIZE %d\n", sizeof (int) * 8);
- printf ("#define WITH_TARGET_BYTE_ORDER %s\n", big_endian ? "BIG_ENDIAN" : "LITTLE_ENDIAN");
- printf ("\n");
- printf ("#define SIM_BITS_INLINE (ALL_H_INLINE)\n");
- printf ("\n");
- printf ("#define ASSERT(X) do { if (!(X)) abort(); } while (0)\n");
- printf ("\n");
- printf ("#include \"sim-basics.h\"\n");
-
- gen_struct ();
-
-
-
- printf ("#define DO_BIT_TESTS\n");
- gen_bit ( 4, msb, "BIT4", 4);
- gen_bit ( 5, msb, "BIT5", 5);
- gen_bit ( 8, msb, "BIT8", 8);
- gen_bit (10, msb, "BIT10", 10);
- gen_bit (16, msb, "BIT16", 16);
- gen_bit (32, msb, "BIT32", 32);
- gen_bit (64, msb, "BIT64", 64);
- gen_bit (bitsize, msb, "BIT", 64);
-
- gen_bit ( 8, 8 - 1, "LSBIT8", 8);
- gen_bit (16, 16 - 1, "LSBIT16", 16);
- gen_bit (32, 32 - 1, "LSBIT32", 32);
- gen_bit (64, 64 - 1, "LSBIT64", 64);
- gen_bit (bitsize, bitsize - 1, "LSBIT", 64);
-
- gen_bit ( 8, 0, "MSBIT8", 8);
- gen_bit (16, 0, "MSBIT16", 16);
- gen_bit (32, 0, "MSBIT32", 32);
- gen_bit (64, 0, "MSBIT64", 64);
- gen_bit (bitsize, 0, "MSBIT", 64);
-
- printf ("test_spec *(bit_tests[]) = {\n");
- printf (" &BIT4_test,\n");
- printf (" &BIT5_test,\n");
- printf (" &BIT8_test,\n");
- printf (" &BIT10_test,\n");
- printf (" &BIT16_test,\n");
- printf (" &BIT32_test,\n");
- printf (" &BIT64_test,\n");
- printf (" &BIT_test,\n");
- printf (" &LSBIT8_test,\n");
- printf (" &LSBIT16_test,\n");
- printf (" &LSBIT32_test,\n");
- printf (" &LSBIT64_test,\n");
- printf (" &LSBIT_test,\n");
- printf (" &MSBIT8_test,\n");
- printf (" &MSBIT16_test,\n");
- printf (" &MSBIT32_test,\n");
- printf (" &MSBIT64_test,\n");
- printf (" &MSBIT_test,\n");
- printf (" 0,\n");
- printf ("};\n\n");
-
- gen_enum ("BIT", 64);
- gen_enum ("LSBIT", 64);
- gen_enum ("MSBIT", 64);
- gen_enum ("BIT32", 32);
- gen_enum ("LSBIT32", 32);
- gen_enum ("MSBIT32", 32);
-
- printf ("#define DO_MASK_TESTS\n");
- gen_mask ( 8, ms, "MASK8", 8);
- gen_mask (16, ms, "MASK16", 16);
- gen_mask (32, ms, "MASK32", 32);
- gen_mask (64, ms, "MASK64", 64);
- gen_mask (bitsize, ms, "MASK", 64);
-
- printf ("test_spec *(mask_tests[]) = {\n");
- printf (" &MASK8_test,\n");
- printf (" &MASK16_test,\n");
- printf (" &MASK32_test,\n");
- printf (" &MASK64_test,\n");
- printf (" &MASK_test,\n");
- printf (" 0,\n");
- printf ("};\n\n");
-
- return 0;
-}
diff --git a/sim/testsuite/common/bits-tst.c b/sim/testsuite/common/bits-tst.c
deleted file mode 100644
index 5a4210a76ab..00000000000
--- a/sim/testsuite/common/bits-tst.c
+++ /dev/null
@@ -1,408 +0,0 @@
-# 2 "bits-tst.c"
-
-/* Drive the bit test routines */
-
-
-long long
-calc (const char *call,
- long long val,
- int row,
- int col)
-{
- if (strcmp (call, "MASK") == 0)
- return MASKED (val, row, col);
- if (strcmp (call, "MASK8") == 0)
- return MASKED8 (val, row, col);
- if (strcmp (call, "MASK16") == 0)
- return MASKED16 (val, row, col);
- if (strcmp (call, "MASK32") == 0)
- return MASKED32 (val, row, col);
- if (strcmp (call, "MASK64") == 0)
- return MASKED64 (val, row, col);
-
- if (strcmp (call, "EXTRACT") == 0)
- return EXTRACTED (val, row, col);
- if (strcmp (call, "EXTRACT8") == 0)
- return EXTRACTED8 (val, row, col);
- if (strcmp (call, "EXTRACT16") == 0)
- return EXTRACTED16 (val, row, col);
- if (strcmp (call, "EXTRACT32") == 0)
- return EXTRACTED32 (val, row, col);
- if (strcmp (call, "EXTRACT64") == 0)
- return EXTRACTED64 (val, row, col);
-
- if (strcmp (call, "LSEXTRACT") == 0)
- return LSEXTRACTED (val, row, col);
- if (strcmp (call, "LSEXTRACT8") == 0)
- return LSEXTRACTED8 (val, row, col);
- if (strcmp (call, "LSEXTRACT16") == 0)
- return LSEXTRACTED16 (val, row, col);
- if (strcmp (call, "LSEXTRACT32") == 0)
- return LSEXTRACTED32 (val, row, col);
- if (strcmp (call, "LSEXTRACT64") == 0)
- return LSEXTRACTED64 (val, row, col);
-
- if (strcmp (call, "MSEXTRACT") == 0)
- return MSEXTRACTED (val, row, col);
- if (strcmp (call, "MSEXTRACT8") == 0)
- return MSEXTRACTED8 (val, row, col);
- if (strcmp (call, "MSEXTRACT16") == 0)
- return MSEXTRACTED16 (val, row, col);
- if (strcmp (call, "MSEXTRACT32") == 0)
- return MSEXTRACTED32 (val, row, col);
- if (strcmp (call, "MSEXTRACT64") == 0)
- return MSEXTRACTED64 (val, row, col);
-
- if (strcmp (call, "INSERT") == 0)
- return INSERTED (val, row, col);
- if (strcmp (call, "INSERT8") == 0)
- return INSERTED8 (val, row, col);
- if (strcmp (call, "INSERT16") == 0)
- return INSERTED16 (val, row, col);
- if (strcmp (call, "INSERT32") == 0)
- return INSERTED32 (val, row, col);
- if (strcmp (call, "INSERT64") == 0)
- return INSERTED64 (val, row, col);
-
- if (strcmp (call, "LSINSERT") == 0)
- return LSINSERTED (val, row, col);
- if (strcmp (call, "LSINSERT8") == 0)
- return LSINSERTED8 (val, row, col);
- if (strcmp (call, "LSINSERT16") == 0)
- return LSINSERTED16 (val, row, col);
- if (strcmp (call, "LSINSERT32") == 0)
- return LSINSERTED32 (val, row, col);
- if (strcmp (call, "LSINSERT64") == 0)
- return LSINSERTED64 (val, row, col);
-
- if (strcmp (call, "MSINSERT") == 0)
- return MSINSERTED (val, row, col);
- if (strcmp (call, "MSINSERT8") == 0)
- return MSINSERTED8 (val, row, col);
- if (strcmp (call, "MSINSERT16") == 0)
- return MSINSERTED16 (val, row, col);
- if (strcmp (call, "MSINSERT32") == 0)
- return MSINSERTED32 (val, row, col);
- if (strcmp (call, "MSINSERT64") == 0)
- return MSINSERTED64 (val, row, col);
-
- if (strcmp (call, "MSMASK") == 0)
- return MSMASKED (val, row, col);
- if (strcmp (call, "MSMASK8") == 0)
- return MSMASKED8 (val, row, col);
- if (strcmp (call, "MSMASK16") == 0)
- return MSMASKED16 (val, row, col);
- if (strcmp (call, "MSMASK32") == 0)
- return MSMASKED32 (val, row, col);
- if (strcmp (call, "MSMASK64") == 0)
- return MSMASKED64 (val, row, col);
-
- if (strcmp (call, "LSMASK") == 0)
- return LSMASKED (val, row, col);
- if (strcmp (call, "LSMASK8") == 0)
- return LSMASKED8 (val, row, col);
- if (strcmp (call, "LSMASK16") == 0)
- return LSMASKED16 (val, row, col);
- if (strcmp (call, "LSMASK32") == 0)
- return LSMASKED32 (val, row, col);
- if (strcmp (call, "LSMASK64") == 0)
- return LSMASKED64 (val, row, col);
-
- if (strcmp (call, "ROT64") == 0)
- return ROT64 (val, col);
- if (strcmp (call, "ROT8") == 0)
- return ROT8 (val, col);
- if (strcmp (call, "ROT16") == 0)
- return ROT16 (val, col);
- if (strcmp (call, "ROT32") == 0)
- return ROT32 (val, col);
-
- if (strcmp (call, "SEXT") == 0)
- return SEXT (val, col);
- if (strcmp (call, "SEXT8") == 0)
- return SEXT8 (val, col);
- if (strcmp (call, "SEXT16") == 0)
- return SEXT16 (val, col);
- if (strcmp (call, "SEXT32") == 0)
- return SEXT32 (val, col);
- if (strcmp (call, "SEXT64") == 0)
- return SEXT64 (val, col);
-
- if (strcmp (call, "LSSEXT") == 0)
- return LSSEXT (val, col);
- if (strcmp (call, "LSSEXT8") == 0)
- return LSSEXT8 (val, col);
- if (strcmp (call, "LSSEXT16") == 0)
- return LSSEXT16 (val, col);
- if (strcmp (call, "LSSEXT32") == 0)
- return LSSEXT32 (val, col);
- if (strcmp (call, "LSSEXT64") == 0)
- return LSSEXT64 (val, col);
-
- if (strcmp (call, "MSSEXT8") == 0)
- return MSSEXT8 (val, col);
- if (strcmp (call, "MSSEXT16") == 0)
- return MSSEXT16 (val, col);
- if (strcmp (call, "MSSEXT32") == 0)
- return MSSEXT32 (val, col);
- if (strcmp (call, "MSSEXT64") == 0)
- return MSSEXT64 (val, col);
- if (strcmp (call, "MSSEXT") == 0)
- return MSSEXT (val, col);
-
- else
- {
- fprintf (stderr,
- "Unknown call passed to calc (%s, 0x%08lx%08lx, %d, %d)\n",
- call, (long)(val >> 32), (long)val, row, col);
- abort ();
- return val;
- }
-}
-
-
-int
-check_sext (int nr_bits,
- int msb_nr,
- const char *sexted,
- const char *masked,
- const char *msmasked)
-{
- int errors = 0;
- int col;
- for (col = 0; col < nr_bits; col ++)
- {
- long long mask = calc (masked, -1, col, col);
- long long msmask = calc (msmasked, -1,
- 0, (msb_nr ? nr_bits - col - 1 : col));
- long long sext = calc (sexted, mask, -1, col);
- long long mask_1 = mask >> 1;
- long long sext_1 = calc (sexted, mask_1, -1, col);
- long long mask_0 = (mask << 1) | mask_1;
- long long sext_0 = calc (sexted, mask_0, -1, col);
- if (sext_0 != mask_1)
- {
- fprintf (stderr,
- "%s:%d: ", __FILE__, __LINE__);
- fprintf (stderr,
- " %s(0x%08lx%08lx,%d) == 0x%08lx%08lx wrong, != 0x%08lx%08lx\n",
- sexted, (long)(mask_0 >> 32), (long)mask_0, col,
- (long)(sext_0 >> 32), (long)sext_0,
- (long)(mask_1 >> 32), (long)mask_1);
- errors ++;
- }
- if (sext_1 != mask_1)
- {
- fprintf (stderr,
- "%s:%d: ", __FILE__, __LINE__);
- fprintf (stderr,
- " %s(0x%08lx%08lx,%d) == 0x%08lx%08lx wrong, != 0x%08lx%08lx\n",
- sexted, (long)(mask_1 >> 32), (long)mask_1, col,
- (long)(sext_1 >> 32), (long)sext_1,
- (long)(mask_1 >> 32), (long)mask_1);
- errors ++;
- }
- if (sext != msmask)
- {
- fprintf (stderr,
- "%s:%d: ", __FILE__, __LINE__);
- fprintf (stderr,
- " %s(0x%08lx%08lx,%d) == 0x%08lx%08lx wrong, != 0x%08lx%08lx (%s(%d,%d))\n",
- sexted, (long)(mask >> 32), (long)mask, col,
- (long)(sext >> 32), (long)sext,
- (long)(msmask >> 32), (long)msmask,
- msmasked, 0, (msb_nr ? nr_bits - col - 1 : col));
- errors ++;
- }
-
- }
- return errors;
-}
-
-
-int
-check_rot (int nr_bits,
- const char *roted,
- const char *masked)
-{
- int errors = 0;
- int row;
- int col;
- for (row = 0; row < nr_bits; row++)
- for (col = 0; col < nr_bits; col++)
- if ((WITH_TARGET_WORD_MSB == 0 && row <= col)
- || (WITH_TARGET_WORD_MSB != 0 && row >= col))
- {
- long long mask = calc (masked, -1, row, col);
- int shift;
- for (shift = -nr_bits + 1; shift < nr_bits; shift ++)
- {
- long long rot = calc (roted, mask, -1, shift);
- long long urot = calc (roted, rot, -1, -shift);
- if (mask != urot
- || (shift == 0 && rot != mask)
- || (shift != 0 && rot == mask && abs(row - col) != (nr_bits - 1)))
- {
- fprintf (stderr, "%s:%d: ", __FILE__, __LINE__);
- fprintf (stderr, " %s(%s(0x%08lx%08lx,%d) == 0x%08lx%08lx, %d) failed\n",
- roted, roted,
- (long)(mask >> 32), (long)mask, shift,
- (long)(urot >> 32), (long)urot, -shift);
- errors ++;
- }
- }
- }
- return errors;
-}
-
-
-int
-check_extract (int nr_bits,
- const char *extracted,
- const char *inserted,
- const char *masked)
-{
- int errors = 0;
- int row;
- int col;
- for (row = 0; row < nr_bits; row++)
- for (col = 0; col < nr_bits; col ++)
- if ((WITH_TARGET_WORD_MSB == 0 && row <= col)
- || (WITH_TARGET_WORD_MSB != 0 && row >= col))
- {
- long long mask = calc (masked, -1, row, col);
- long long extr = calc (extracted, mask, row, col);
- long long inst = calc (inserted, extr, row, col);
- if (mask != inst)
- {
- fprintf (stderr, "%s:%d: ", __FILE__, __LINE__);
- fprintf (stderr, " %s(%d,%d)=0x%08lx%08lx -> %s=0x%08lx%08lx -> %s=0x%08lx%08lx failed\n",
- masked, row, col, (long)(mask >> 32), (long)mask,
- extracted, (long)(extr >> 32), (long)extr,
- inserted, (long)(inst >> 32), (long)inst);
- errors ++;
- }
- }
- return errors;
-}
-
-
-int
-check_bits (int call,
- test_spec **tests)
-{
- int r;
- int c;
- int errors = 0;
- while (*tests != NULL)
- {
- int nr_rows = (*tests)->nr_rows;
- int nr_cols = (*tests)->nr_cols;
- test_tuples *tuples = (*tests)->tuples;
- for (r = 0; r < nr_rows; r++)
- for (c = 0; c < nr_cols; c++)
- {
- int i = r * nr_rows + c;
- test_tuples *tuple = &tuples[i];
- if (tuple->col >= 0)
- {
- long long val = (!call ? tuple->val : calc ((*tests)->macro, -1,
- tuple->row, tuple->col));
- long long check = tuple->check;
- if (val != check)
- {
- fprintf (stderr, "%s:%d:", (*tests)->file, tuple->line);
- fprintf (stderr, " %s", (*tests)->macro);
- if (tuple->row >= 0)
- fprintf (stderr, " (%d, %d)", tuple->row, tuple->col);
- else
- fprintf (stderr, " (%d)", tuple->col);
- fprintf (stderr, " == 0x%08lx%08lx wrong, != 0x%08lx%08lx\n",
- (long) (val >> 32), (long) val,
- (long) (check >> 32), (long) check);
- errors ++;
- }
- }
- }
- tests ++;
- }
- return errors;
-}
-
-
-int
-main (argc, argv)
- int argc;
- char **argv;
-{
- int errors = 0;
-
-
-#if defined (DO_BIT_TESTS)
- printf ("Checking BIT*\n");
- errors += check_bits (0, bit_tests);
-#endif
-
-
-#if defined (DO_MASK_TESTS)
- printf ("Checking MASK*\n");
- errors += check_bits (0, mask_tests);
-
- printf ("Checking MASKED*\n");
- errors += check_bits (1, mask_tests);
-#endif
-
-
-#if defined (DO_LSMASK_TESTS)
- printf ("Checking LSMASK*\n");
- errors += check_bits (0, lsmask_tests);
-
- printf ("Checking LSMASKED*\n");
- errors += check_bits (1, lsmask_tests);
-#endif
-
-
-#if defined (DO_MSMASK_TESTS)
- printf ("Checking MSMASK*\n");
- errors += check_bits (0, msmask_tests);
-
- printf ("Checking MSMASKED*\n");
- errors += check_bits (1, msmask_tests);
-#endif
-
-
- printf ("Checking EXTRACTED*\n");
- errors += check_extract ( 8, "EXTRACT8", "INSERT8", "MASK8");
- errors += check_extract (16, "EXTRACT16", "INSERT16", "MASK16");
- errors += check_extract (32, "EXTRACT32", "INSERT32", "MASK32");
- errors += check_extract (64, "EXTRACT64", "INSERT64", "MASK64");
- errors += check_extract (64, "EXTRACT", "INSERT", "MASK");
-
- printf ("Checking SEXT*\n");
- errors += check_sext ( 8, WITH_TARGET_WORD_MSB, "SEXT8", "MASK8", "MSMASK8");
- errors += check_sext (16, WITH_TARGET_WORD_MSB, "SEXT16", "MASK16", "MSMASK16");
- errors += check_sext (32, WITH_TARGET_WORD_MSB, "SEXT32", "MASK32", "MSMASK32");
- errors += check_sext (64, WITH_TARGET_WORD_MSB, "SEXT64", "MASK64", "MSMASK64");
- errors += check_sext (64, WITH_TARGET_WORD_MSB, "SEXT", "MASK", "MSMASK");
-
- printf ("Checking LSSEXT*\n");
- errors += check_sext ( 8, 8 - 1, "LSSEXT8", "LSMASK8", "MSMASK8");
- errors += check_sext (16, 16 - 1, "LSSEXT16", "LSMASK16", "MSMASK16");
- errors += check_sext (32, 32 - 1, "LSSEXT32", "LSMASK32", "MSMASK32");
- errors += check_sext (64, 64 - 1, "LSSEXT64", "LSMASK64", "MSMASK64");
- errors += check_sext (64, WITH_TARGET_WORD_BITSIZE - 1, "LSSEXT", "LSMASK", "MSMASK");
-
- printf ("Checking MSSEXT*\n");
- errors += check_sext (8, 0, "MSSEXT8", "MSMASK8", "MSMASK8");
- errors += check_sext (16, 0, "MSSEXT16", "MSMASK16", "MSMASK16");
- errors += check_sext (32, 0, "MSSEXT32", "MSMASK32", "MSMASK32");
- errors += check_sext (64, 0, "MSSEXT64", "MSMASK64", "MSMASK64");
- errors += check_sext (64, 0, "MSSEXT", "MSMASK", "MSMASK");
-
- printf ("Checking ROT*\n");
- errors += check_rot (16, "ROT16", "MASK16");
- errors += check_rot (32, "ROT32", "MASK32");
- errors += check_rot (64, "ROT64", "MASK64");
-
- return errors != 0;
-}
diff --git a/sim/testsuite/common/fpu-tst.c b/sim/testsuite/common/fpu-tst.c
deleted file mode 100644
index d347e12727d..00000000000
--- a/sim/testsuite/common/fpu-tst.c
+++ /dev/null
@@ -1,538 +0,0 @@
-#define ASSERT(EXPRESSION) \
-do { \
- if (!(EXPRESSION)) { \
- fprintf (stderr, "%s:%d: assertion failed - %s\n", \
- __FILE__, __LINE__, #EXPRESSION); \
- abort (); \
- } \
-} while (0)
-
-#define SIM_BITS_INLINE (INCLUDE_MODULE | INCLUDED_BY_MODULE)
-
-#include "milieu.h"
-#include "softfloat.h"
-#include "systfloat.h"
-#include "systmodes.h"
-
-/* #define SIM_FPU_INLINE (INCLUDE_MODULE | INCLUDED_BY_MODULE) */
-
-
-#include "sim-bits.h"
-#include "sim-fpu.h"
-#include "sim-fpu.c"
-
-
-
-static int flags;
-
-int8
-syst_float_flags_clear ()
-{
- int old_flags = 0;
- int i = 1;
- while (flags >= i)
- {
- switch ((sim_fpu_status) (flags & i))
- {
- case sim_fpu_status_denorm:
- break;
- case sim_fpu_status_invalid_snan:
- case sim_fpu_status_invalid_qnan:
- case sim_fpu_status_invalid_isi:
- case sim_fpu_status_invalid_idi:
- case sim_fpu_status_invalid_zdz:
- case sim_fpu_status_invalid_imz:
- case sim_fpu_status_invalid_cvi:
- case sim_fpu_status_invalid_cmp:
- case sim_fpu_status_invalid_sqrt:
- old_flags |= float_flag_invalid; /* v */
- break;
- case sim_fpu_status_inexact:
- old_flags |= float_flag_inexact; /* x */
- break;
- case sim_fpu_status_overflow:
- old_flags |= float_flag_overflow; /* o */
- break;
- case sim_fpu_status_underflow:
- old_flags |= float_flag_underflow; /* u */
- break;
- case sim_fpu_status_invalid_div0:
- old_flags |= float_flag_divbyzero; /* z */
- break;
- case sim_fpu_status_rounded:
- break;
- }
- i <<= 1;
- }
- flags = 0;
- return old_flags;
-}
-
-
-sim_fpu_round rounding_mode;
-
-void
-syst_float_set_rounding_mode(int8 mode)
-{
- switch (mode)
- {
- case float_round_nearest_even:
- rounding_mode = sim_fpu_round_near;
- break;
- case float_round_down:
- rounding_mode = sim_fpu_round_down;
- break;
- case float_round_up:
- rounding_mode = sim_fpu_round_up;
- break;
- case float_round_to_zero:
- rounding_mode = sim_fpu_round_zero;
- break;
- }
-}
-
-
-float32
-syst_int32_to_float32(int32 a)
-{
- float32 z;
- sim_fpu s;
- flags |= sim_fpu_i32to (&s, a, rounding_mode);
- flags |= sim_fpu_round_32 (&s, rounding_mode, 0);
- sim_fpu_to32 (&z, &s);
- return z;
-}
-
-float64
-syst_int32_to_float64( int32 a )
-{
- float64 z;
- sim_fpu s;
- flags |= sim_fpu_i32to (&s, a, rounding_mode);
- sim_fpu_to64 (&z, &s);
- return z;
-}
-
-int32
-syst_float32_to_int32_round_to_zero( float32 a )
-{
- int32 z;
- sim_fpu s;
- sim_fpu_32to (&s, a);
- flags |= sim_fpu_to32i (&z, &s, sim_fpu_round_zero);
- return z;
-}
-
-float64
-syst_float32_to_float64 (float32 a)
-{
- float64 z;
- sim_fpu s;
- sim_fpu_32to (&s, a);
- flags |= sim_fpu_round_64 (&s, rounding_mode, 0);
- sim_fpu_to64 (&z, &s);
- return z;
-}
-
-float32 syst_float32_add( float32 a, float32 b )
-{
- float32 z;
- sim_fpu A;
- sim_fpu B;
- sim_fpu ans;
- sim_fpu_32to (&A, a);
- sim_fpu_32to (&B, b);
-#if 0
- fprintf (stdout, "\n ");
- sim_fpu_print_fpu (&A, (sim_fpu_print_func*) fprintf, stdout);
- fprintf (stdout, "\n+ ");
- sim_fpu_print_fpu (&B, (sim_fpu_print_func*) fprintf, stdout);
- fprintf (stdout, "\n= ");
-#endif
- flags |= sim_fpu_add (&ans, &A, &B);
- flags |= sim_fpu_round_32 (&ans, rounding_mode, 0);
-#if 0
- sim_fpu_print_fpu (&ans, (sim_fpu_print_func*) fprintf, stdout);
- fprintf (stdout, "\n");
-#endif
- sim_fpu_to32 (&z, &ans);
- return z;
-}
-
-float32 syst_float32_sub( float32 a, float32 b )
-{
- float32 z;
- sim_fpu A;
- sim_fpu B;
- sim_fpu ans;
- sim_fpu_32to (&A, a);
- sim_fpu_32to (&B, b);
-#if 0
- sim_fpu_print_fpu (&A, (sim_fpu_print_func*) fprintf, stdout);
- fprintf (stdout, " + ");
- sim_fpu_print_fpu (&B, (sim_fpu_print_func*) fprintf, stdout);
- fprintf (stdout, " = ");
-#endif
- flags |= sim_fpu_sub (&ans, &A, &B);
- flags |= sim_fpu_round_32 (&ans, rounding_mode, 0);
-#if 0
- sim_fpu_print_fpu (&ans, (sim_fpu_print_func*) fprintf, stdout);
- fprintf (stdout, "\n");
-#endif
- sim_fpu_to32 (&z, &ans);
- return z;
-}
-
-float32 syst_float32_mul( float32 a, float32 b )
-{
- float32 z;
- sim_fpu A;
- sim_fpu B;
- sim_fpu ans;
- sim_fpu_32to (&A, a);
- sim_fpu_32to (&B, b);
-#if 0
- sim_fpu_print_fpu (&A, (sim_fpu_print_func*) fprintf, stdout);
- fprintf (stdout, " + ");
- sim_fpu_print_fpu (&B, (sim_fpu_print_func*) fprintf, stdout);
- fprintf (stdout, " = ");
-#endif
- flags |= sim_fpu_mul (&ans, &A, &B);
-#if 0
- sim_fpu_print_fpu (&ans, (sim_fpu_print_func*) fprintf, stdout);
-#endif
- flags |= sim_fpu_round_32 (&ans, rounding_mode, 0);
-#if 0
- sim_fpu_print_status (flags, (sim_fpu_print_func*) fprintf, stdout);
- fprintf (stdout, "\n");
-#endif
- sim_fpu_to32 (&z, &ans);
- return z;
-}
-
-float32 syst_float32_div( float32 a, float32 b )
-{
- float32 z;
- sim_fpu A;
- sim_fpu B;
- sim_fpu ans;
- sim_fpu_32to (&A, a);
- sim_fpu_32to (&B, b);
- flags |= sim_fpu_div (&ans, &A, &B);
- flags |= sim_fpu_round_32 (&ans, rounding_mode, 0);
- sim_fpu_to32 (&z, &ans);
- return z;
-}
-
-float32 syst_float32_sqrt( float32 a )
-{
- float32 z;
- sim_fpu A;
- sim_fpu ans;
- sim_fpu_32to (&A, a);
-#if 0
- sim_fpu_print_fpu (&A, (sim_fpu_print_func*) fprintf, stdout);
- fprintf (stdout, " sqrt> ");
-#endif
- flags |= sim_fpu_sqrt (&ans, &A);
-#if 0
- sim_fpu_print_fpu (&ans, (sim_fpu_print_func*) fprintf, stdout);
-#endif
- flags |= sim_fpu_round_32 (&ans, rounding_mode, 0);
-#if 0
- fprintf (stdout, " (%x)\n", flags);
-#endif
- sim_fpu_to32 (&z, &ans);
- return z;
-}
-
-flag syst_float32_eq( float32 a, float32 b )
-{
- sim_fpu A;
- sim_fpu B;
- int is;
- sim_fpu_32to (&A, a);
- sim_fpu_32to (&B, b);
- flags |= (sim_fpu_eq (&is, &A, &B) & ~sim_fpu_status_invalid_qnan);
- return is;
-}
-
-flag syst_float32_eq_signaling( float32 a, float32 b )
-{
- sim_fpu A;
- sim_fpu B;
- int is;
- sim_fpu_32to (&A, a);
- sim_fpu_32to (&B, b);
- flags |= sim_fpu_eq (&is, &A, &B);
- return is;
-}
-
-flag syst_float32_le( float32 a, float32 b )
-{
- sim_fpu A;
- sim_fpu B;
- int is;
- sim_fpu_32to (&A, a);
- sim_fpu_32to (&B, b);
- flags |= sim_fpu_le (&is, &A, &B);
- return is;
-}
-
-flag syst_float32_le_quiet( float32 a, float32 b )
-{
- sim_fpu A;
- sim_fpu B;
- int is;
- sim_fpu_32to (&A, a);
- sim_fpu_32to (&B, b);
- flags |= (sim_fpu_le (&is, &A, &B) & ~sim_fpu_status_invalid_qnan);
- return is;
-}
-
-flag syst_float32_lt( float32 a, float32 b )
-{
- sim_fpu A;
- sim_fpu B;
- int is;
- sim_fpu_32to (&A, a);
- sim_fpu_32to (&B, b);
- flags |= sim_fpu_lt (&is, &A, &B);
- return is;
-}
-
-flag syst_float32_lt_quiet( float32 a, float32 b )
-{
- sim_fpu A;
- sim_fpu B;
- int is;
- sim_fpu_32to (&A, a);
- sim_fpu_32to (&B, b);
- flags |= (sim_fpu_lt (&is, &A, &B) & ~sim_fpu_status_invalid_qnan);
- return is;
-}
-
-int32 syst_float64_to_int32_round_to_zero( float64 a )
-{
- int32 z;
- sim_fpu s;
- sim_fpu_64to (&s, a);
- flags |= sim_fpu_to32i (&z, &s, sim_fpu_round_zero);
- return z;
-}
-
-float32 syst_float64_to_float32( float64 a )
-{
- float32 z;
- sim_fpu s;
- sim_fpu_64to (&s, a);
-#if 0
- sim_fpu_print_fpu (&s, (sim_fpu_print_func*) fprintf, stdout);
- fprintf (stdout, " -> ");
-#endif
- flags |= sim_fpu_round_32 (&s, rounding_mode, 0);
-#if 0
- sim_fpu_print_fpu (&s, (sim_fpu_print_func*) fprintf, stdout);
- sim_fpu_print_status (flags, (sim_fpu_print_func*) fprintf, stdout);
- printf ("\n");
-#endif
- sim_fpu_to32 (&z, &s);
- return z;
-}
-
-float64 syst_float64_add( float64 a, float64 b )
-{
- float64 z;
- sim_fpu A;
- sim_fpu B;
- sim_fpu ans;
- sim_fpu_64to (&A, a);
- sim_fpu_64to (&B, b);
-#if 0
- sim_fpu_print_fpu (&A, (sim_fpu_print_func*) fprintf, stdout);
- fprintf (stdout, " + ");
- sim_fpu_print_fpu (&B, (sim_fpu_print_func*) fprintf, stdout);
- fprintf (stdout, " = ");
-#endif
- flags |= sim_fpu_add (&ans, &A, &B);
-#if 0
- sim_fpu_print_fpu (&ans, (sim_fpu_print_func*) fprintf, stdout);
-#endif
- flags |= sim_fpu_round_64 (&ans, rounding_mode, 0);
-#if 0
- fprintf (stdout, " (%x)\n", flags);
-#endif
- sim_fpu_to64 (&z, &ans);
- return z;
-}
-
-float64 syst_float64_sub( float64 a, float64 b )
-{
- float64 z;
- sim_fpu A;
- sim_fpu B;
- sim_fpu ans;
- sim_fpu_64to (&A, a);
- sim_fpu_64to (&B, b);
-#if 0
- sim_fpu_print_fpu (&A, (sim_fpu_print_func*) fprintf, stdout);
- fprintf (stdout, " + ");
- sim_fpu_print_fpu (&B, (sim_fpu_print_func*) fprintf, stdout);
- fprintf (stdout, " = ");
-#endif
- flags |= sim_fpu_sub (&ans, &A, &B);
-#if 0
- sim_fpu_print_fpu (&ans, (sim_fpu_print_func*) fprintf, stdout);
-#endif
- flags |= sim_fpu_round_64 (&ans, rounding_mode, 0);
-#if 0
- fprintf (stdout, " (%x)\n", flags);
-#endif
- sim_fpu_to64 (&z, &ans);
- return z;
-}
-
-float64 syst_float64_mul( float64 a, float64 b )
-{
- float64 z;
- sim_fpu A;
- sim_fpu B;
- sim_fpu ans;
- sim_fpu_64to (&A, a);
- sim_fpu_64to (&B, b);
-#if 0
- sim_fpu_print_fpu (&A, (sim_fpu_print_func*) fprintf, stdout);
- fprintf (stdout, " * ");
- sim_fpu_print_fpu (&B, (sim_fpu_print_func*) fprintf, stdout);
- fprintf (stdout, " = ");
-#endif
- flags |= sim_fpu_mul (&ans, &A, &B);
-#if 0
- sim_fpu_print_fpu (&ans, (sim_fpu_print_func*) fprintf, stdout);
-#endif
- flags |= sim_fpu_round_64 (&ans, rounding_mode, 0);
-#if 0
- sim_fpu_print_status (flags, (sim_fpu_print_func*) fprintf, stdout);
- fprintf (stdout, "\n");
-#endif
- sim_fpu_to64 (&z, &ans);
- return z;
-}
-
-float64 syst_float64_div( float64 a, float64 b )
-{
- float64 z;
- sim_fpu A;
- sim_fpu B;
- sim_fpu ans;
- sim_fpu_64to (&A, a);
- sim_fpu_64to (&B, b);
-#if 0
- sim_fpu_print_fpu (&A, (sim_fpu_print_func*) fprintf, stdout);
- fprintf (stdout, " + ");
- sim_fpu_print_fpu (&B, (sim_fpu_print_func*) fprintf, stdout);
- fprintf (stdout, " = ");
-#endif
- flags |= sim_fpu_div (&ans, &A, &B);
-#if 0
- sim_fpu_print_fpu (&ans, (sim_fpu_print_func*) fprintf, stdout);
-#endif
- flags |= sim_fpu_round_64 (&ans, rounding_mode, 0);
-#if 0
- sim_fpu_print_status (flags, (sim_fpu_print_func*) fprintf, stdout);
- fprintf (stdout, "\n");
-#endif
- sim_fpu_to64 (&z, &ans);
- return z;
-}
-
-float64 syst_float64_sqrt( float64 a )
-{
- float64 z;
- sim_fpu A;
- sim_fpu ans;
- sim_fpu_64to (&A, a);
-#if 0
- sim_fpu_print_fpu (&A, (sim_fpu_print_func*) fprintf, stdout);
- printf (" sqrt> ");
- printf ("\n");
-#endif
- flags |= sim_fpu_sqrt (&ans, &A);
-#if 0
- sim_fpu_print_fpu (&ans, (sim_fpu_print_func*) fprintf, stdout);
-#endif
- flags |= sim_fpu_round_64 (&ans, rounding_mode, 0);
-#if 0
- sim_fpu_print_status (flags, (sim_fpu_print_func*) fprintf, stdout);
- fprintf (stdout, "\n");
-#endif
- sim_fpu_to64 (&z, &ans);
- return z;
-}
-
-flag syst_float64_eq( float64 a, float64 b )
-{
- sim_fpu A;
- sim_fpu B;
- int is;
- sim_fpu_64to (&A, a);
- sim_fpu_64to (&B, b);
- flags |= (sim_fpu_eq (&is, &A, &B) & ~sim_fpu_status_invalid_qnan);
- return is;
-}
-
-flag syst_float64_eq_signaling( float64 a, float64 b )
-{
- sim_fpu A;
- sim_fpu B;
- int is;
- sim_fpu_64to (&A, a);
- sim_fpu_64to (&B, b);
- flags |= sim_fpu_eq (&is, &A, &B);
- return is;
-}
-
-flag syst_float64_le( float64 a, float64 b )
-{
- sim_fpu A;
- sim_fpu B;
- int is;
- sim_fpu_64to (&A, a);
- sim_fpu_64to (&B, b);
- flags |= sim_fpu_le (&is, &A, &B);
- return is;
-}
-
-flag syst_float64_le_quiet( float64 a, float64 b )
-{
- sim_fpu A;
- sim_fpu B;
- int is;
- sim_fpu_64to (&A, a);
- sim_fpu_64to (&B, b);
- flags |= (sim_fpu_le (&is, &A, &B) & ~sim_fpu_status_invalid_qnan);
- return is;
-}
-
-flag syst_float64_lt( float64 a, float64 b )
-{
- sim_fpu A;
- sim_fpu B;
- int is;
- sim_fpu_64to (&A, a);
- sim_fpu_64to (&B, b);
- flags |= sim_fpu_lt (&is, &A, &B);
- return is;
-}
-
-flag syst_float64_lt_quiet( float64 a, float64 b )
-{
- sim_fpu A;
- sim_fpu B;
- int is;
- sim_fpu_64to (&A, a);
- sim_fpu_64to (&B, b);
- flags |= (sim_fpu_lt (&is, &A, &B) & ~sim_fpu_status_invalid_qnan);
- return is;
-}
-
diff --git a/sim/testsuite/config/default.exp b/sim/testsuite/config/default.exp
deleted file mode 100644
index 56255a33f3a..00000000000
--- a/sim/testsuite/config/default.exp
+++ /dev/null
@@ -1,42 +0,0 @@
-# Simulator default dejagnu configuration file.
-
-load_lib sim-defs.exp
-
-global AS
-if ![info exists AS] {
- set AS [findfile $base_dir/../../gas/as-new $base_dir/../../gas/as-new \
- [transform as]]
-}
-
-global ASFLAGS
-if ![info exists ASFLAGS] {
- set ASFLAGS ""
-}
-
-# Compilation is achieved with sim_compile ... so we don't check $CC here.
-
-global CFLAGS
-if ![info exists CFLAGS] {
- set CFLAGS ""
-}
-
-global LD
-if ![info exists LD] {
- set LD [findfile $base_dir/../../ld/ld-new $base_dir/../../ld/ld-new \
- [transform ld]]
-}
-
-global LDFLAGS
-if ![info exists LDFLAGS] {
- set LDFLAGS ""
-}
-
-# The path to the simulator is obtained with [board_info host sim],
-# so we don't check $SIM here.
-
-global SIMFLAGS
-if ![info exists SIMFLAGS] {
- set SIMFLAGS ""
-}
-
-sim_init
diff --git a/sim/testsuite/configure b/sim/testsuite/configure
deleted file mode 100755
index 1b95177a00a..00000000000
--- a/sim/testsuite/configure
+++ /dev/null
@@ -1,1034 +0,0 @@
-#! /bin/sh
-
-# Guess values for system-dependent variables and create Makefiles.
-# Generated automatically using autoconf version 2.13
-# Copyright (C) 1992, 93, 94, 95, 96 Free Software Foundation, Inc.
-#
-# This configure script is free software; the Free Software Foundation
-# gives unlimited permission to copy, distribute and modify it.
-
-# Defaults:
-ac_help=
-ac_default_prefix=/usr/local
-# Any additions from configure.in:
-
-# Initialize some variables set by options.
-# The variables have the same names as the options, with
-# dashes changed to underlines.
-build=NONE
-cache_file=./config.cache
-exec_prefix=NONE
-host=NONE
-no_create=
-nonopt=NONE
-no_recursion=
-prefix=NONE
-program_prefix=NONE
-program_suffix=NONE
-program_transform_name=s,x,x,
-silent=
-site=
-sitefile=
-srcdir=
-target=NONE
-verbose=
-x_includes=NONE
-x_libraries=NONE
-bindir='${exec_prefix}/bin'
-sbindir='${exec_prefix}/sbin'
-libexecdir='${exec_prefix}/libexec'
-datadir='${prefix}/share'
-sysconfdir='${prefix}/etc'
-sharedstatedir='${prefix}/com'
-localstatedir='${prefix}/var'
-libdir='${exec_prefix}/lib'
-includedir='${prefix}/include'
-oldincludedir='/usr/include'
-infodir='${prefix}/info'
-mandir='${prefix}/man'
-
-# Initialize some other variables.
-subdirs=
-MFLAGS= MAKEFLAGS=
-SHELL=${CONFIG_SHELL-/bin/sh}
-# Maximum number of lines to put in a shell here document.
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-
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-
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- *) ac_optarg= ;;
- esac
-
- # Accept the important Cygnus configure options, so we can diagnose typos.
-
- case "$ac_option" in
-
- -bindir | --bindir | --bindi | --bind | --bin | --bi)
- ac_prev=bindir ;;
- -bindir=* | --bindir=* | --bindi=* | --bind=* | --bin=* | --bi=*)
- bindir="$ac_optarg" ;;
-
- -build | --build | --buil | --bui | --bu)
- ac_prev=build ;;
- -build=* | --build=* | --buil=* | --bui=* | --bu=*)
- build="$ac_optarg" ;;
-
- -cache-file | --cache-file | --cache-fil | --cache-fi \
- | --cache-f | --cache- | --cache | --cach | --cac | --ca | --c)
- ac_prev=cache_file ;;
- -cache-file=* | --cache-file=* | --cache-fil=* | --cache-fi=* \
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-
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- ac_feature=`echo $ac_feature| sed 's/-/_/g'`
- eval "enable_${ac_feature}=no" ;;
-
- -enable-* | --enable-*)
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- case "$ac_option" in
- *=*) ;;
- *) ac_optarg=yes ;;
- esac
- eval "enable_${ac_feature}='$ac_optarg'" ;;
-
- -exec-prefix | --exec_prefix | --exec-prefix | --exec-prefi \
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- ac_prev=exec_prefix ;;
- -exec-prefix=* | --exec_prefix=* | --exec-prefix=* | --exec-prefi=* \
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- | --exec=* | --exe=* | --ex=*)
- exec_prefix="$ac_optarg" ;;
-
- -gas | --gas | --ga | --g)
- # Obsolete; use --with-gas.
- with_gas=yes ;;
-
- -help | --help | --hel | --he)
- # Omit some internal or obsolete options to make the list less imposing.
- # This message is too long to be a string in the A/UX 3.1 sh.
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-Options: [defaults in brackets after descriptions]
-Configuration:
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- --no-create do not create output files
- --quiet, --silent do not print \`checking...' messages
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- --libdir=DIR object code libraries in DIR [EPREFIX/lib]
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- --mandir=DIR man documentation in DIR [PREFIX/man]
- --srcdir=DIR find the sources in DIR [configure dir or ..]
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- --program-transform-name=PROGRAM
- run sed PROGRAM on installed program names
-EOF
- cat << EOF
-Host type:
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- --host=HOST configure for HOST [guessed]
- --target=TARGET configure for TARGET [TARGET=HOST]
-Features and packages:
- --disable-FEATURE do not include FEATURE (same as --enable-FEATURE=no)
- --enable-FEATURE[=ARG] include FEATURE [ARG=yes]
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- --without-PACKAGE do not use PACKAGE (same as --with-PACKAGE=no)
- --x-includes=DIR X include files are in DIR
- --x-libraries=DIR X library files are in DIR
-EOF
- if test -n "$ac_help"; then
- echo "--enable and --with options recognized:$ac_help"
- fi
- exit 0 ;;
-
- -host | --host | --hos | --ho)
- ac_prev=host ;;
- -host=* | --host=* | --hos=* | --ho=*)
- host="$ac_optarg" ;;
-
- -includedir | --includedir | --includedi | --included | --include \
- | --includ | --inclu | --incl | --inc)
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- includedir="$ac_optarg" ;;
-
- -infodir | --infodir | --infodi | --infod | --info | --inf)
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-
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-
- -no-create | --no-create | --no-creat | --no-crea | --no-cre \
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-
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-
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- -oldincludedir=* | --oldincludedir=* | --oldincludedi=* | --oldincluded=* \
- | --oldinclude=* | --oldinclud=* | --oldinclu=* | --oldincl=* | --oldinc=* \
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-
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-
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-
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-
-# configure the subdirectories too
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-
-
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- # `set' quotes correctly as required by POSIX, so do not add quotes.
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-
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-
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-trap 'rm -f $CONFIG_STATUS conftest*; exit 1' 1 2 15
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-
-
-# Without the "./", some shells look in PATH for config.status.
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-
-echo creating $CONFIG_STATUS
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- configure_input="Generated automatically from `echo $ac_file_in|sed 's%.*/%%'` by configure."
- case "$ac_file" in
- *Makefile*) ac_comsub="1i\\
-# $configure_input" ;;
- *) ac_comsub= ;;
- esac
-
- ac_file_inputs=`echo $ac_file_in|sed -e "s%^%$ac_given_srcdir/%" -e "s%:% $ac_given_srcdir/%g"`
- sed -e "$ac_comsub
-s%@configure_input@%$configure_input%g
-s%@srcdir@%$srcdir%g
-s%@top_srcdir@%$top_srcdir%g
-" $ac_file_inputs | (eval "$ac_sed_cmds") > $ac_file
-fi; done
-rm -f conftest.s*
-
-EOF
-cat >> $CONFIG_STATUS <<EOF
-
-EOF
-cat >> $CONFIG_STATUS <<\EOF
-
-exit 0
-EOF
-chmod +x $CONFIG_STATUS
-rm -fr confdefs* $ac_clean_files
-test "$no_create" = yes || ${CONFIG_SHELL-/bin/sh} $CONFIG_STATUS || exit 1
-
-if test "$no_recursion" != yes; then
-
- # Remove --cache-file and --srcdir arguments so they do not pile up.
- ac_sub_configure_args=
- ac_prev=
- for ac_arg in $ac_configure_args; do
- if test -n "$ac_prev"; then
- ac_prev=
- continue
- fi
- case "$ac_arg" in
- -cache-file | --cache-file | --cache-fil | --cache-fi \
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- ac_prev=cache_file ;;
- -cache-file=* | --cache-file=* | --cache-fil=* | --cache-fi=* \
- | --cache-f=* | --cache-=* | --cache=* | --cach=* | --cac=* | --ca=* | --c=*)
- ;;
- -srcdir | --srcdir | --srcdi | --srcd | --src | --sr)
- ac_prev=srcdir ;;
- -srcdir=* | --srcdir=* | --srcdi=* | --srcd=* | --src=* | --sr=*)
- ;;
- *) ac_sub_configure_args="$ac_sub_configure_args $ac_arg" ;;
- esac
- done
-
- for ac_config_dir in $configdirs; do
-
- # Do not complain, so a configure script can configure whichever
- # parts of a large source tree are present.
- if test ! -d $srcdir/$ac_config_dir; then
- continue
- fi
-
- echo configuring in $ac_config_dir
-
- case "$srcdir" in
- .) ;;
- *)
- if test -d ./$ac_config_dir || mkdir ./$ac_config_dir; then :;
- else
- { echo "configure: error: can not create `pwd`/$ac_config_dir" 1>&2; exit 1; }
- fi
- ;;
- esac
-
- ac_popdir=`pwd`
- cd $ac_config_dir
-
- # A "../" for each directory in /$ac_config_dir.
- ac_dots=`echo $ac_config_dir|sed -e 's%^\./%%' -e 's%[^/]$%&/%' -e 's%[^/]*/%../%g'`
-
- case "$srcdir" in
- .) # No --srcdir option. We are building in place.
- ac_sub_srcdir=$srcdir ;;
- /*) # Absolute path.
- ac_sub_srcdir=$srcdir/$ac_config_dir ;;
- *) # Relative path.
- ac_sub_srcdir=$ac_dots$srcdir/$ac_config_dir ;;
- esac
-
- # Check for guested configure; otherwise get Cygnus style configure.
- if test -f $ac_sub_srcdir/configure; then
- ac_sub_configure=$ac_sub_srcdir/configure
- elif test -f $ac_sub_srcdir/configure.in; then
- ac_sub_configure=$ac_configure
- else
- echo "configure: warning: no configuration information is in $ac_config_dir" 1>&2
- ac_sub_configure=
- fi
-
- # The recursion is here.
- if test -n "$ac_sub_configure"; then
-
- # Make the cache file name correct relative to the subdirectory.
- case "$cache_file" in
- /*) ac_sub_cache_file=$cache_file ;;
- *) # Relative path.
- ac_sub_cache_file="$ac_dots$cache_file" ;;
- esac
-
- echo "running ${CONFIG_SHELL-/bin/sh} $ac_sub_configure $ac_sub_configure_args --cache-file=$ac_sub_cache_file --srcdir=$ac_sub_srcdir"
- # The eval makes quoting arguments work.
- if eval ${CONFIG_SHELL-/bin/sh} $ac_sub_configure $ac_sub_configure_args --cache-file=$ac_sub_cache_file --srcdir=$ac_sub_srcdir
- then :
- else
- { echo "configure: error: $ac_sub_configure failed for $ac_config_dir" 1>&2; exit 1; }
- fi
- fi
-
- cd $ac_popdir
- done
-fi
-
diff --git a/sim/testsuite/configure.in b/sim/testsuite/configure.in
deleted file mode 100644
index 0bebb7ae06d..00000000000
--- a/sim/testsuite/configure.in
+++ /dev/null
@@ -1,40 +0,0 @@
-dnl Process this file file with autoconf to produce a configure script.
-dnl This file is a shell script fragment that supplies the information
-dnl necessary to tailor a template configure script into the configure
-dnl script appropriate for this directory. For more information, check
-dnl any existing configure script.
-
-AC_PREREQ(2.5)
-AC_INIT(common/bits-tst.c)
-
-CC=${CC-cc}
-AC_SUBST(CC)
-AC_CONFIG_AUX_DIR(`cd $srcdir;pwd`/../..)
-AC_CANONICAL_SYSTEM
-
-# Directories to use in all configurations.
-configdirs=""
-
-# add test sub-directory for appropriate targets
-testdir=`echo ${target} | sed -e 's/-.*-/-/'`
-if test -r ${srcdir}/${testdir}/configure ; then
- configdirs="${configdirs} $testdir"
-fi
-
-# add any extra subdirectories
-case $target in
- *) ;;
-esac
-
-# Compute the target architecture.
-# FIXME: Will need to canonicalize some values.
-# FIXME: Should be in generally accessable place.
-case $target in
- *) arch=${target_cpu} ;;
-esac
-AC_SUBST(arch)
-
-# configure the subdirectories too
-AC_CONFIG_SUBDIRS($configdirs)
-
-AC_OUTPUT(Makefile)
diff --git a/sim/testsuite/d10v-elf/ChangeLog b/sim/testsuite/d10v-elf/ChangeLog
deleted file mode 100644
index 11d43190f10..00000000000
--- a/sim/testsuite/d10v-elf/ChangeLog
+++ /dev/null
@@ -1,121 +0,0 @@
-Tue Apr 18 16:32:07 2000 Andrew Cagney <cagney@b1.cygnus.com>
-
- * t-rie-xx.s (test_rie_xx): New test.
- * Makefile.in (TESTS): Update.
-
-Tue Feb 22 17:36:34 2000 Andrew Cagney <cagney@b1.cygnus.com>
-
- * Makefile.in: Force d10v into operating mode.
-
-Mon Jan 3 00:17:28 2000 Andrew Cagney <cagney@b1.cygnus.com>
-
- * t-ae-ld-d.s, t-ae-ld-i.s, t-ae-ld-id.s, t-ae-ld-im.s ,
- t-ae-ld-ip.s, t-ae-ld2w-d.s, t-ae-ld2w-i.s, t-ae-ld2w-id.s ,
- t-ae-ld2w-im.s, t-ae-ld2w-ip.s, t-ae-st-d.s, t-ae-st-i.s ,
- t-ae-st-id.s, t-ae-st-im.s, t-ae-st-ip.s, t-ae-st-is.s ,
- t-ae-st2w-d.s, t-ae-st2w-i.s, t-ae-st2w-id.s, t-ae-st2w-im.s ,
- t-ae-st2w-ip.s, t-ae-st2w-is.s: New tests. Check that an address
- exception occures when a word/two-word load/store is not word
- aligned.
- * Makefile.in (TESTS): Update.
-
-Fri Oct 29 18:36:34 1999 Andrew Cagney <cagney@b1.cygnus.com>
-
- * t-mvtc.s: Check that the user can not modify the DM bit in the
- BPSW or DPSW.
-
-Thu Oct 28 01:47:26 1999 Andrew Cagney <cagney@b1.cygnus.com>
-
- * t-mvtc.s: Update. Check that user can not modify DM bit.
-
-Wed Sep 8 19:34:55 MDT 1999 Diego Novillo <dnovillo@cygnus.com>
-
- * t-ld-st.s: New file.
- * t-sac.s: New file.
- * t-sachi.s: New file.
- * t-slae.s: New file.
-
-1999-01-13 Jason Molenda (jsm@bugshack.cygnus.com)
-
- * t-sadd.s: New file.
- * Makefile.in (TESTS): Add t-sadd.
-
-Mon Feb 16 09:20:57 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * t-macros.i (VEC_*): Define.
- (DMAP_REG, DMAP_BASE, DMAP_MASK): Define.
- (IMAP[01]_REG): Define.
-
- * t-rdt.s (test_tdt): New file.
-
- * t-dbt.s (test_dbt): New file.
-
- * Makefile.in (TESTS): Add t-rdt and t-dbt.
-
-
-Fri Feb 13 16:21:13 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * t-sp.s: New test.
- * Makefile.in (TESTS): Update.
-
-Wed Feb 11 17:58:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * t-macros.i: Update trap calls, func in r4, args in
- r0...
- (start): Force r0 to zero.
-
- * t-sub2w.s: Ditto.
-
-Tue Dec 9 10:41:44 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * t-rte.s (success): New file.
- * Makefile.in: Update.
-
- * t-rep.s: Check rep repeats correct number of times.
-
-Fri Dec 5 10:11:18 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * t-mvtc.s: Check for stuck-zero in MOD_E, MOD_S.
-
- * t-trap.s: New file.
- * Makefile.in (TESTS): Update.
-
-Thu Dec 4 16:56:55 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * t-macros.i: Add definitions for PSW bits.
-
- * t-mvtc.s: New file.
- * Makefile.in (TESTS): Update.
-
-Wed Dec 3 16:35:24 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * t-rac.s: New files.
-
- * t-macros.i: Add macros for checking psw and 2w quantities.
-
- * Makefile.in (TESTS): Update.
-
-Tue Dec 2 11:01:36 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * t-sub2w.s, t-mulxu.s, t-mac.s, t-mvtac.s, t-msbu.s, t-sub.s: New
- files.
-
- * Makefile.in: Update.
-
-Mon Nov 17 20:14:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * t-subi.s (test_subi): New file.
- * Makefile.in: Update.
-
-Fri Nov 14 14:06:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * t-rep.s: New file. Test case of branch to RPT_E address.
-
-Mon Nov 10 19:21:26 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * t-macros.i (_start): New file.
- * t-rachi.s: New file.
-
- * Makefile.in (RUN_FOR_TARGET): Look for simulator in d10v
- directory.
-
diff --git a/sim/testsuite/d10v-elf/Makefile.in b/sim/testsuite/d10v-elf/Makefile.in
deleted file mode 100644
index 0626ee8781c..00000000000
--- a/sim/testsuite/d10v-elf/Makefile.in
+++ /dev/null
@@ -1,181 +0,0 @@
-# Makefile for regression testing the GNU debugger.
-# Copyright (C) 1992, 1993, 1994, 1995 Free Software Foundation, Inc.
-
-# This file is part of GDB.
-
-# GDB is free software; you can redistribute it and/or modify
-# it under the terms of the GNU General Public License as published by
-# the Free Software Foundation; either version 2, or (at your option)
-# any later version.
-
-# GDB is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
-VPATH = @srcdir@
-srcdir = @srcdir@
-srcroot = $(srcdir)/..
-
-prefix = @prefix@
-exec_prefix = @exec_prefix@
-
-host_alias = @host_alias@
-target_alias = @target_alias@
-program_transform_name = @program_transform_name@
-build_canonical = @build@
-host_canonical = @host@
-target_canonical = @target@
-target_cpu = @target_cpu@
-
-
-SHELL = /bin/sh
-SUBDIRS = @subdirs@
-RPATH_ENVVAR = @RPATH_ENVVAR@
-
-TESTS = \
- exit47.ko \
- hello.hi \
- t-dbt.ok \
- t-ld-st.ok \
- t-mac.ok \
- t-mvtac.ok \
- t-mvtc.ok \
- t-msbu.ok \
- t-mulxu.ok \
- t-rac.ok \
- t-rachi.ok \
- t-rdt.ok \
- t-rep.ok \
- t-rte.ok \
- t-sac.ok \
- t-sachi.ok \
- t-sadd.ok \
- t-slae.ok \
- t-sp.ok \
- t-sub2w.ok \
- t-sub.ok \
- t-subi.ok \
- t-ae-ld-d.ok \
- t-ae-ld-i.ok \
- t-ae-ld-id.ok \
- t-ae-ld-im.ok \
- t-ae-ld-ip.ok \
- t-ae-ld2w-d.ok \
- t-ae-ld2w-i.ok \
- t-ae-ld2w-id.ok \
- t-ae-ld2w-im.ok \
- t-ae-ld2w-ip.ok \
- t-ae-st-d.ok \
- t-ae-st-i.ok \
- t-ae-st-id.ok \
- t-ae-st-im.ok \
- t-ae-st-ip.ok \
- t-ae-st-is.ok \
- t-ae-st2w-d.ok \
- t-ae-st2w-i.ok \
- t-ae-st2w-id.ok \
- t-ae-st2w-im.ok \
- t-ae-st2w-ip.ok \
- t-ae-st2w-is.ok \
- t-mod-ld-pre.ok \
- t-rie-xx.ok \
-#
-
-AS_FOR_TARGET = `\
- if [ -x ../../../gas/as-new ]; then \
- echo ../../../gas/as-new ; \
- else \
- echo $(target_alias)-as ; \
- fi`
-
-LD_FOR_TARGET = `\
- if [ -x ../../../ld/ld-new ]; then \
- echo ../../../ld/ld-new ; \
- else \
- echo $(target_alias)-ld ; \
- fi`
-
-RUN_FOR_TARGET = `\
- if [ -x ../../../sim/d10v/run ]; then \
- echo ../../../sim/d10v/run ; \
- else \
- echo $(target_alias)-run ; \
- fi`
-
-# Force d10v into operating mode.
-RUNFLAGS_FOR_TARGET=-o
-
-
-check: sanity $(TESTS)
-sanity:
- @eval echo AS_FOR_TARGET=$(AS_FOR_TARGET)
- @eval echo LD_FOR_TARGET=$(LD_FOR_TARGET)
- @eval echo RUN_FOR_TARGET=$(RUN_FOR_TARGET)
-
-clean:
- rm -f $(TESTS)
- rm -f *.run *.o
- rm -f core *.core
-
-# Rules for running the tests
-
-.SUFFIXES: .ok .run .hi .ko .ti
-.run.ok:
- rm -f tmp-$* $*.hi
- ulimit -t 5 ; \
- $(RUN_FOR_TARGET) $(RUNFLAGS_FOR_TARGET) $*.run > tmp-$*
- mv tmp-$* $*.ok
-.run.hi:
- rm -f tmp-$* $*.hi diff-$*
- ulimit -t 5 ; \
- $(RUN_FOR_TARGET) $(RUNFLAGS_FOR_TARGET) $*.run > tmp-$*
- echo 'Hello World!' | diff - tmp-$* > diff-$*
- cat tmp-$* diff-$* > $*.hi
-.run.ko:
- rm -f tmp-$* $*.ko
- set +e ; \
- ulimit -t 5 ; \
- $(RUN_FOR_TARGET) $(RUNFLAGS_FOR_TARGET) $*.run > tmp-$* ; \
- if [ $$? -eq 47 ] ; then \
- exit 0 ; \
- else \
- exit 1 ; \
- fi
- mv tmp-$* $*.ko
-.run.ti:
- rm -f tmp-$* $*.ti
- set +e ; \
- ulimit -t 5 ; \
- $(RUN_FOR_TARGET) $(RUNFLAGS_FOR_TARGET) $(INTFLAGS_FOR_TARGET) $*.run > tmp-$*
- test `cat tmp-$* | wc -l` -eq 10 < /dev/null
- test `grep Tick tmp-$* | wc -l` -eq 10 < /dev/null
- mv tmp-$* $*.ti
-
-
-# Rules for building the test
-# Preference is for obtaining the executable (.run) from a prebuilt image
-
-.SUFFIXES: .uue .s .S .run
-.uue.run:
- head $* | grep $*.run > /dev/null
- uudecode $*.uue
-.run.u:
- uuencode < $*.run $*.run > $*.u
-.o.run:
- $(LD_FOR_TARGET) $(LDFLAGS_FOR_TARGET) -o $*.run $*.o
-.s.o:
- $(AS_FOR_TARGET) $(ASFLAGS_FOR_TARGET) -I$(srcdir) $(srcdir)/$*.s -o $*.o
-.S.o:
- $(AS_FOR_TARGET) $(ASFLAGS_FOR_TARGET) -I$(srcdir) $(srcdir)/$*.S -o $*.o
-
-
-Makefile: Makefile.in config.status
- $(SHELL) ./config.status
-
-config.status: configure
- $(SHELL) ./config.status --recheck
diff --git a/sim/testsuite/d10v-elf/configure b/sim/testsuite/d10v-elf/configure
deleted file mode 100755
index b9348bb1255..00000000000
--- a/sim/testsuite/d10v-elf/configure
+++ /dev/null
@@ -1,900 +0,0 @@
-#! /bin/sh
-
-# Guess values for system-dependent variables and create Makefiles.
-# Generated automatically using autoconf version 2.12
-# Copyright (C) 1992, 93, 94, 95, 96 Free Software Foundation, Inc.
-#
-# This configure script is free software; the Free Software Foundation
-# gives unlimited permission to copy, distribute and modify it.
-
-# Defaults:
-ac_help=
-ac_default_prefix=/usr/local
-# Any additions from configure.in:
-
-# Initialize some variables set by options.
-# The variables have the same names as the options, with
-# dashes changed to underlines.
-build=NONE
-cache_file=./config.cache
-exec_prefix=NONE
-host=NONE
-no_create=
-nonopt=NONE
-no_recursion=
-prefix=NONE
-program_prefix=NONE
-program_suffix=NONE
-program_transform_name=s,x,x,
-silent=
-site=
-srcdir=
-target=NONE
-verbose=
-x_includes=NONE
-x_libraries=NONE
-bindir='${exec_prefix}/bin'
-sbindir='${exec_prefix}/sbin'
-libexecdir='${exec_prefix}/libexec'
-datadir='${prefix}/share'
-sysconfdir='${prefix}/etc'
-sharedstatedir='${prefix}/com'
-localstatedir='${prefix}/var'
-libdir='${exec_prefix}/lib'
-includedir='${prefix}/include'
-oldincludedir='/usr/include'
-infodir='${prefix}/info'
-mandir='${prefix}/man'
-
-# Initialize some other variables.
-subdirs=
-MFLAGS= MAKEFLAGS=
-# Maximum number of lines to put in a shell here document.
-ac_max_here_lines=12
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- *) ac_optarg= ;;
- esac
-
- # Accept the important Cygnus configure options, so we can diagnose typos.
-
- case "$ac_option" in
-
- -bindir | --bindir | --bindi | --bind | --bin | --bi)
- ac_prev=bindir ;;
- -bindir=* | --bindir=* | --bindi=* | --bind=* | --bin=* | --bi=*)
- bindir="$ac_optarg" ;;
-
- -build | --build | --buil | --bui | --bu)
- ac_prev=build ;;
- -build=* | --build=* | --buil=* | --bui=* | --bu=*)
- build="$ac_optarg" ;;
-
- -cache-file | --cache-file | --cache-fil | --cache-fi \
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- ac_prev=cache_file ;;
- -cache-file=* | --cache-file=* | --cache-fil=* | --cache-fi=* \
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- eval "enable_${ac_feature}=no" ;;
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- ac_feature=`echo $ac_feature| sed 's/-/_/g'`
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- *=*) ;;
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-
- -exec-prefix | --exec_prefix | --exec-prefix | --exec-prefi \
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- ac_prev=exec_prefix ;;
- -exec-prefix=* | --exec_prefix=* | --exec-prefix=* | --exec-prefi=* \
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- | --exec=* | --exe=* | --ex=*)
- exec_prefix="$ac_optarg" ;;
-
- -gas | --gas | --ga | --g)
- # Obsolete; use --with-gas.
- with_gas=yes ;;
-
- -help | --help | --hel | --he)
- # Omit some internal or obsolete options to make the list less imposing.
- # This message is too long to be a string in the A/UX 3.1 sh.
- cat << EOF
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- --help print this message
- --no-create do not create output files
- --quiet, --silent do not print \`checking...' messages
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-Directory and file names:
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- [PREFIX/share]
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-trap 'rm -f $CONFIG_STATUS conftest*; exit 1' 1 2 15
-
-# Transform confdefs.h into DEFS.
-# Protect against shell expansion while executing Makefile rules.
-# Protect against Makefile macro expansion.
-cat > conftest.defs <<\EOF
-s%#define \([A-Za-z_][A-Za-z0-9_]*\) *\(.*\)%-D\1=\2%g
-s%[ `~#$^&*(){}\\|;'"<>?]%\\&%g
-s%\[%\\&%g
-s%\]%\\&%g
-s%\$%$$%g
-EOF
-DEFS=`sed -f conftest.defs confdefs.h | tr '\012' ' '`
-rm -f conftest.defs
-
-
-# Without the "./", some shells look in PATH for config.status.
-: ${CONFIG_STATUS=./config.status}
-
-echo creating $CONFIG_STATUS
-rm -f $CONFIG_STATUS
-cat > $CONFIG_STATUS <<EOF
-#! /bin/sh
-# Generated automatically by configure.
-# Run this file to recreate the current configuration.
-# This directory was configured as follows,
-# on host `(hostname || uname -n) 2>/dev/null | sed 1q`:
-#
-# $0 $ac_configure_args
-#
-# Compiler output produced by configure, useful for debugging
-# configure, is in ./config.log if it exists.
-
-ac_cs_usage="Usage: $CONFIG_STATUS [--recheck] [--version] [--help]"
-for ac_option
-do
- case "\$ac_option" in
- -recheck | --recheck | --rechec | --reche | --rech | --rec | --re | --r)
- echo "running \${CONFIG_SHELL-/bin/sh} $0 $ac_configure_args --no-create --no-recursion"
- exec \${CONFIG_SHELL-/bin/sh} $0 $ac_configure_args --no-create --no-recursion ;;
- -version | --version | --versio | --versi | --vers | --ver | --ve | --v)
- echo "$CONFIG_STATUS generated by autoconf version 2.12"
- exit 0 ;;
- -help | --help | --hel | --he | --h)
- echo "\$ac_cs_usage"; exit 0 ;;
- *) echo "\$ac_cs_usage"; exit 1 ;;
- esac
-done
-
-ac_given_srcdir=$srcdir
-
-trap 'rm -fr `echo "Makefile" | sed "s/:[^ ]*//g"` conftest*; exit 1' 1 2 15
-EOF
-cat >> $CONFIG_STATUS <<EOF
-
-# Protect against being on the right side of a sed subst in config.status.
-sed 's/%@/@@/; s/@%/@@/; s/%g\$/@g/; /@g\$/s/[\\\\&%]/\\\\&/g;
- s/@@/%@/; s/@@/@%/; s/@g\$/%g/' > conftest.subs <<\\CEOF
-$ac_vpsub
-$extrasub
-s%@CFLAGS@%$CFLAGS%g
-s%@CPPFLAGS@%$CPPFLAGS%g
-s%@CXXFLAGS@%$CXXFLAGS%g
-s%@DEFS@%$DEFS%g
-s%@LDFLAGS@%$LDFLAGS%g
-s%@LIBS@%$LIBS%g
-s%@exec_prefix@%$exec_prefix%g
-s%@prefix@%$prefix%g
-s%@program_transform_name@%$program_transform_name%g
-s%@bindir@%$bindir%g
-s%@sbindir@%$sbindir%g
-s%@libexecdir@%$libexecdir%g
-s%@datadir@%$datadir%g
-s%@sysconfdir@%$sysconfdir%g
-s%@sharedstatedir@%$sharedstatedir%g
-s%@localstatedir@%$localstatedir%g
-s%@libdir@%$libdir%g
-s%@includedir@%$includedir%g
-s%@oldincludedir@%$oldincludedir%g
-s%@infodir@%$infodir%g
-s%@mandir@%$mandir%g
-s%@CC@%$CC%g
-s%@host@%$host%g
-s%@host_alias@%$host_alias%g
-s%@host_cpu@%$host_cpu%g
-s%@host_vendor@%$host_vendor%g
-s%@host_os@%$host_os%g
-s%@target@%$target%g
-s%@target_alias@%$target_alias%g
-s%@target_cpu@%$target_cpu%g
-s%@target_vendor@%$target_vendor%g
-s%@target_os@%$target_os%g
-s%@build@%$build%g
-s%@build_alias@%$build_alias%g
-s%@build_cpu@%$build_cpu%g
-s%@build_vendor@%$build_vendor%g
-s%@build_os@%$build_os%g
-
-CEOF
-EOF
-
-cat >> $CONFIG_STATUS <<\EOF
-
-# Split the substitutions into bite-sized pieces for seds with
-# small command number limits, like on Digital OSF/1 and HP-UX.
-ac_max_sed_cmds=90 # Maximum number of lines to put in a sed script.
-ac_file=1 # Number of current file.
-ac_beg=1 # First line for current file.
-ac_end=$ac_max_sed_cmds # Line after last line for current file.
-ac_more_lines=:
-ac_sed_cmds=""
-while $ac_more_lines; do
- if test $ac_beg -gt 1; then
- sed "1,${ac_beg}d; ${ac_end}q" conftest.subs > conftest.s$ac_file
- else
- sed "${ac_end}q" conftest.subs > conftest.s$ac_file
- fi
- if test ! -s conftest.s$ac_file; then
- ac_more_lines=false
- rm -f conftest.s$ac_file
- else
- if test -z "$ac_sed_cmds"; then
- ac_sed_cmds="sed -f conftest.s$ac_file"
- else
- ac_sed_cmds="$ac_sed_cmds | sed -f conftest.s$ac_file"
- fi
- ac_file=`expr $ac_file + 1`
- ac_beg=$ac_end
- ac_end=`expr $ac_end + $ac_max_sed_cmds`
- fi
-done
-if test -z "$ac_sed_cmds"; then
- ac_sed_cmds=cat
-fi
-EOF
-
-cat >> $CONFIG_STATUS <<EOF
-
-CONFIG_FILES=\${CONFIG_FILES-"Makefile"}
-EOF
-cat >> $CONFIG_STATUS <<\EOF
-for ac_file in .. $CONFIG_FILES; do if test "x$ac_file" != x..; then
- # Support "outfile[:infile[:infile...]]", defaulting infile="outfile.in".
- case "$ac_file" in
- *:*) ac_file_in=`echo "$ac_file"|sed 's%[^:]*:%%'`
- ac_file=`echo "$ac_file"|sed 's%:.*%%'` ;;
- *) ac_file_in="${ac_file}.in" ;;
- esac
-
- # Adjust a relative srcdir, top_srcdir, and INSTALL for subdirectories.
-
- # Remove last slash and all that follows it. Not all systems have dirname.
- ac_dir=`echo $ac_file|sed 's%/[^/][^/]*$%%'`
- if test "$ac_dir" != "$ac_file" && test "$ac_dir" != .; then
- # The file is in a subdirectory.
- test ! -d "$ac_dir" && mkdir "$ac_dir"
- ac_dir_suffix="/`echo $ac_dir|sed 's%^\./%%'`"
- # A "../" for each directory in $ac_dir_suffix.
- ac_dots=`echo $ac_dir_suffix|sed 's%/[^/]*%../%g'`
- else
- ac_dir_suffix= ac_dots=
- fi
-
- case "$ac_given_srcdir" in
- .) srcdir=.
- if test -z "$ac_dots"; then top_srcdir=.
- else top_srcdir=`echo $ac_dots|sed 's%/$%%'`; fi ;;
- /*) srcdir="$ac_given_srcdir$ac_dir_suffix"; top_srcdir="$ac_given_srcdir" ;;
- *) # Relative path.
- srcdir="$ac_dots$ac_given_srcdir$ac_dir_suffix"
- top_srcdir="$ac_dots$ac_given_srcdir" ;;
- esac
-
-
- echo creating "$ac_file"
- rm -f "$ac_file"
- configure_input="Generated automatically from `echo $ac_file_in|sed 's%.*/%%'` by configure."
- case "$ac_file" in
- *Makefile*) ac_comsub="1i\\
-# $configure_input" ;;
- *) ac_comsub= ;;
- esac
-
- ac_file_inputs=`echo $ac_file_in|sed -e "s%^%$ac_given_srcdir/%" -e "s%:% $ac_given_srcdir/%g"`
- sed -e "$ac_comsub
-s%@configure_input@%$configure_input%g
-s%@srcdir@%$srcdir%g
-s%@top_srcdir@%$top_srcdir%g
-" $ac_file_inputs | (eval "$ac_sed_cmds") > $ac_file
-fi; done
-rm -f conftest.s*
-
-EOF
-cat >> $CONFIG_STATUS <<EOF
-
-EOF
-cat >> $CONFIG_STATUS <<\EOF
-
-exit 0
-EOF
-chmod +x $CONFIG_STATUS
-rm -fr confdefs* $ac_clean_files
-test "$no_create" = yes || ${CONFIG_SHELL-/bin/sh} $CONFIG_STATUS || exit 1
-
diff --git a/sim/testsuite/d10v-elf/configure.in b/sim/testsuite/d10v-elf/configure.in
deleted file mode 100644
index e74389e551e..00000000000
--- a/sim/testsuite/d10v-elf/configure.in
+++ /dev/null
@@ -1,19 +0,0 @@
-dnl Process this file file with autoconf to produce a configure script.
-dnl This file is a shell script fragment that supplies the information
-dnl necessary to tailor a template configure script into the configure
-dnl script appropriate for this directory. For more information, check
-dnl any existing configure script.
-
-AC_PREREQ(2.5)
-dnl FIXME - think of a truly uniq file to this directory
-AC_INIT(Makefile.in)
-
-CC=${CC-cc}
-AC_SUBST(CC)
-AC_CONFIG_AUX_DIR(`cd $srcdir;pwd`/../../..)
-AC_CANONICAL_SYSTEM
-
-AC_SUBST(target_cpu)
-
-
-AC_OUTPUT(Makefile)
diff --git a/sim/testsuite/d10v-elf/exit47.s b/sim/testsuite/d10v-elf/exit47.s
deleted file mode 100644
index 93e466465e2..00000000000
--- a/sim/testsuite/d10v-elf/exit47.s
+++ /dev/null
@@ -1,4 +0,0 @@
-.include "t-macros.i"
-
- start
- exit47
diff --git a/sim/testsuite/d10v-elf/hello.s b/sim/testsuite/d10v-elf/hello.s
deleted file mode 100644
index d060c89adb0..00000000000
--- a/sim/testsuite/d10v-elf/hello.s
+++ /dev/null
@@ -1,5 +0,0 @@
- .include "t-macros.i"
-
- start
- hello
- exit0
diff --git a/sim/testsuite/d10v-elf/loop.s b/sim/testsuite/d10v-elf/loop.s
deleted file mode 100644
index e1371e4d951..00000000000
--- a/sim/testsuite/d10v-elf/loop.s
+++ /dev/null
@@ -1,6 +0,0 @@
- .text
- .globl _start
-
-_start:
- bra _start
- nop
diff --git a/sim/testsuite/d10v-elf/t-ae-ld-d.s b/sim/testsuite/d10v-elf/t-ae-ld-d.s
deleted file mode 100644
index 1be783fe984..00000000000
--- a/sim/testsuite/d10v-elf/t-ae-ld-d.s
+++ /dev/null
@@ -1,13 +0,0 @@
-.include "t-macros.i"
-
- start
-
- PSW_BITS = 0
- point_dmap_at_imem
- check_interrupt (VEC_AE&DMAP_MASK)+DMAP_BASE PSW_BITS test_ld
-
- ld r8,@0x4000
-test_ld:
- ld r8,@0x4001
- nop
- exit47
diff --git a/sim/testsuite/d10v-elf/t-ae-ld-i.s b/sim/testsuite/d10v-elf/t-ae-ld-i.s
deleted file mode 100644
index 42168e1d812..00000000000
--- a/sim/testsuite/d10v-elf/t-ae-ld-i.s
+++ /dev/null
@@ -1,16 +0,0 @@
-.include "t-macros.i"
-
- start
-
- PSW_BITS = 0
- point_dmap_at_imem
- check_interrupt (VEC_AE&DMAP_MASK)+DMAP_BASE PSW_BITS test_ld
-
- ldi r10, #0x4000
- ld r8, @r10
-
- ldi r10, #0x4001
-test_ld:
- ld r8,@r10
- nop
- exit47
diff --git a/sim/testsuite/d10v-elf/t-ae-ld-id.s b/sim/testsuite/d10v-elf/t-ae-ld-id.s
deleted file mode 100644
index 86b73823556..00000000000
--- a/sim/testsuite/d10v-elf/t-ae-ld-id.s
+++ /dev/null
@@ -1,15 +0,0 @@
-.include "t-macros.i"
-
- start
-
- PSW_BITS = 0
- point_dmap_at_imem
- check_interrupt (VEC_AE&DMAP_MASK)+DMAP_BASE PSW_BITS test_ld
-
- ldi r10, #0x4001
- ld r8, @(1,r10)
-
-test_ld:
- ld r8,@(2,r10)
- nop
- exit47
diff --git a/sim/testsuite/d10v-elf/t-ae-ld-im.s b/sim/testsuite/d10v-elf/t-ae-ld-im.s
deleted file mode 100644
index 08e2ba6d38e..00000000000
--- a/sim/testsuite/d10v-elf/t-ae-ld-im.s
+++ /dev/null
@@ -1,16 +0,0 @@
-.include "t-macros.i"
-
- start
-
- PSW_BITS = 0
- point_dmap_at_imem
- check_interrupt (VEC_AE&DMAP_MASK)+DMAP_BASE PSW_BITS test_ld
-
- ldi r10, #0x4000
- ld r8, @r10-
-
- ldi r10, #0x4001
-test_ld:
- ld r8,@r10-
- nop
- exit47
diff --git a/sim/testsuite/d10v-elf/t-ae-ld-ip.s b/sim/testsuite/d10v-elf/t-ae-ld-ip.s
deleted file mode 100644
index cad66600804..00000000000
--- a/sim/testsuite/d10v-elf/t-ae-ld-ip.s
+++ /dev/null
@@ -1,16 +0,0 @@
-.include "t-macros.i"
-
- start
-
- PSW_BITS = 0
- point_dmap_at_imem
- check_interrupt (VEC_AE&DMAP_MASK)+DMAP_BASE PSW_BITS test_ld
-
- ldi r10, #0x4000
- ld r8, @r10+
-
- ldi r10, #0x4001
-test_ld:
- ld r8,@r10+
- nop
- exit47
diff --git a/sim/testsuite/d10v-elf/t-ae-ld2w-d.s b/sim/testsuite/d10v-elf/t-ae-ld2w-d.s
deleted file mode 100644
index c8254ab191f..00000000000
--- a/sim/testsuite/d10v-elf/t-ae-ld2w-d.s
+++ /dev/null
@@ -1,13 +0,0 @@
-.include "t-macros.i"
-
- start
-
- PSW_BITS = 0
- point_dmap_at_imem
- check_interrupt (VEC_AE&DMAP_MASK)+DMAP_BASE PSW_BITS test_ld2w
-
- ld2w r8,@0x4000
-test_ld2w:
- ld2w r8,@0x4001
- nop
- exit47
diff --git a/sim/testsuite/d10v-elf/t-ae-ld2w-i.s b/sim/testsuite/d10v-elf/t-ae-ld2w-i.s
deleted file mode 100644
index 4b32df5cc32..00000000000
--- a/sim/testsuite/d10v-elf/t-ae-ld2w-i.s
+++ /dev/null
@@ -1,16 +0,0 @@
-.include "t-macros.i"
-
- start
-
- PSW_BITS = 0
- point_dmap_at_imem
- check_interrupt (VEC_AE&DMAP_MASK)+DMAP_BASE PSW_BITS test_ld2w
-
- ldi r10, #0x4000
- ld2w r8, @r10
-
- ldi r10, #0x4001
-test_ld2w:
- ld2w r8,@r10
- nop
- exit47
diff --git a/sim/testsuite/d10v-elf/t-ae-ld2w-id.s b/sim/testsuite/d10v-elf/t-ae-ld2w-id.s
deleted file mode 100644
index 906b2a0836e..00000000000
--- a/sim/testsuite/d10v-elf/t-ae-ld2w-id.s
+++ /dev/null
@@ -1,14 +0,0 @@
-.include "t-macros.i"
-
- start
-
- PSW_BITS = 0
- point_dmap_at_imem
- check_interrupt (VEC_AE&DMAP_MASK)+DMAP_BASE PSW_BITS test_ld2w
-
- ldi r10, #0x4001
- ld2w r8,@(1,r10)
-test_ld2w:
- ld2w r8,@(2,r10)
- nop
- exit47
diff --git a/sim/testsuite/d10v-elf/t-ae-ld2w-im.s b/sim/testsuite/d10v-elf/t-ae-ld2w-im.s
deleted file mode 100644
index 71a7286dfcd..00000000000
--- a/sim/testsuite/d10v-elf/t-ae-ld2w-im.s
+++ /dev/null
@@ -1,16 +0,0 @@
-.include "t-macros.i"
-
- start
-
- PSW_BITS = 0
- point_dmap_at_imem
- check_interrupt (VEC_AE&DMAP_MASK)+DMAP_BASE PSW_BITS test_ld2w
-
- ldi r10, #0x4000
- ld2w r8, @r10-
-
- ldi r10, #0x4001
-test_ld2w:
- ld2w r8,@r10-
- nop
- exit47
diff --git a/sim/testsuite/d10v-elf/t-ae-ld2w-ip.s b/sim/testsuite/d10v-elf/t-ae-ld2w-ip.s
deleted file mode 100644
index 38cfab622b1..00000000000
--- a/sim/testsuite/d10v-elf/t-ae-ld2w-ip.s
+++ /dev/null
@@ -1,16 +0,0 @@
-.include "t-macros.i"
-
- start
-
- PSW_BITS = 0
- point_dmap_at_imem
- check_interrupt (VEC_AE&DMAP_MASK)+DMAP_BASE PSW_BITS test_ld2w
-
- ldi r10, #0x4000
- ld2w r8, @r10+
-
- ldi r10, #0x4001
-test_ld2w:
- ld2w r8,@r10+
- nop
- exit47
diff --git a/sim/testsuite/d10v-elf/t-ae-st-d.s b/sim/testsuite/d10v-elf/t-ae-st-d.s
deleted file mode 100644
index 1f0edd87f25..00000000000
--- a/sim/testsuite/d10v-elf/t-ae-st-d.s
+++ /dev/null
@@ -1,13 +0,0 @@
-.include "t-macros.i"
-
- start
-
- PSW_BITS = 0
- point_dmap_at_imem
- check_interrupt (VEC_AE&DMAP_MASK)+DMAP_BASE PSW_BITS test_st
-
- st r8,@0x4000
-test_st:
- st r8,@0x4001
- nop
- exit47
diff --git a/sim/testsuite/d10v-elf/t-ae-st-i.s b/sim/testsuite/d10v-elf/t-ae-st-i.s
deleted file mode 100644
index 15245981ecf..00000000000
--- a/sim/testsuite/d10v-elf/t-ae-st-i.s
+++ /dev/null
@@ -1,16 +0,0 @@
-.include "t-macros.i"
-
- start
-
- PSW_BITS = 0
- point_dmap_at_imem
- check_interrupt (VEC_AE&DMAP_MASK)+DMAP_BASE PSW_BITS test_st
-
- ldi r10,#0x4000
- st r8, @r10
-
- ldi r10,#0x4001
-test_st:
- st r8,@r10
- nop
- exit47
diff --git a/sim/testsuite/d10v-elf/t-ae-st-id.s b/sim/testsuite/d10v-elf/t-ae-st-id.s
deleted file mode 100644
index 4caa1b4fafc..00000000000
--- a/sim/testsuite/d10v-elf/t-ae-st-id.s
+++ /dev/null
@@ -1,14 +0,0 @@
-.include "t-macros.i"
-
- start
-
- PSW_BITS = 0
- point_dmap_at_imem
- check_interrupt (VEC_AE&DMAP_MASK)+DMAP_BASE PSW_BITS test_st
-
- ldi r10,#0x4001
- st r8, @(1,r10)
-test_st:
- st r8,@(2,r10)
- nop
- exit47
diff --git a/sim/testsuite/d10v-elf/t-ae-st-im.s b/sim/testsuite/d10v-elf/t-ae-st-im.s
deleted file mode 100644
index d4c8bafe096..00000000000
--- a/sim/testsuite/d10v-elf/t-ae-st-im.s
+++ /dev/null
@@ -1,16 +0,0 @@
-.include "t-macros.i"
-
- start
-
- PSW_BITS = 0
- point_dmap_at_imem
- check_interrupt (VEC_AE&DMAP_MASK)+DMAP_BASE PSW_BITS test_st
-
- ldi r10,#0x4000
- st r8, @r10-
-
- ldi r10,#0x4001
-test_st:
- st r8,@r10-
- nop
- exit47
diff --git a/sim/testsuite/d10v-elf/t-ae-st-ip.s b/sim/testsuite/d10v-elf/t-ae-st-ip.s
deleted file mode 100644
index e3a02ee528d..00000000000
--- a/sim/testsuite/d10v-elf/t-ae-st-ip.s
+++ /dev/null
@@ -1,16 +0,0 @@
-.include "t-macros.i"
-
- start
-
- PSW_BITS = 0
- point_dmap_at_imem
- check_interrupt (VEC_AE&DMAP_MASK)+DMAP_BASE PSW_BITS test_st
-
- ldi r10,#0x4000
- st r8, @r10+
-
- ldi r10,#0x4001
-test_st:
- st r8,@r10+
- nop
- exit47
diff --git a/sim/testsuite/d10v-elf/t-ae-st-is.s b/sim/testsuite/d10v-elf/t-ae-st-is.s
deleted file mode 100644
index 4868780128c..00000000000
--- a/sim/testsuite/d10v-elf/t-ae-st-is.s
+++ /dev/null
@@ -1,16 +0,0 @@
-.include "t-macros.i"
-
- start
-
- PSW_BITS = 0
- point_dmap_at_imem
- check_interrupt (VEC_AE&DMAP_MASK)+DMAP_BASE PSW_BITS test_st
-
- ldi sp,#0x4000
- st r8, @-SP
-
- ldi sp,#0x4001
-test_st:
- st r8,@-SP
- nop
- exit47
diff --git a/sim/testsuite/d10v-elf/t-ae-st2w-d.s b/sim/testsuite/d10v-elf/t-ae-st2w-d.s
deleted file mode 100644
index a0d9c3176e9..00000000000
--- a/sim/testsuite/d10v-elf/t-ae-st2w-d.s
+++ /dev/null
@@ -1,13 +0,0 @@
-.include "t-macros.i"
-
- start
-
- PSW_BITS = 0
- point_dmap_at_imem
- check_interrupt (VEC_AE&DMAP_MASK)+DMAP_BASE PSW_BITS test_st2w
-
- st2w r8,@0x4000
-test_st2w:
- st2w r8,@0x4001
- nop
- exit47
diff --git a/sim/testsuite/d10v-elf/t-ae-st2w-i.s b/sim/testsuite/d10v-elf/t-ae-st2w-i.s
deleted file mode 100644
index 8c24bc92d75..00000000000
--- a/sim/testsuite/d10v-elf/t-ae-st2w-i.s
+++ /dev/null
@@ -1,16 +0,0 @@
-.include "t-macros.i"
-
- start
-
- PSW_BITS = 0
- point_dmap_at_imem
- check_interrupt (VEC_AE&DMAP_MASK)+DMAP_BASE PSW_BITS test_st2w
-
- ldi r10, #0x4000
- st2w r8, @r10
-
- ldi r10, #0x4001
-test_st2w:
- st2w r8,@r10
- nop
- exit47
diff --git a/sim/testsuite/d10v-elf/t-ae-st2w-id.s b/sim/testsuite/d10v-elf/t-ae-st2w-id.s
deleted file mode 100644
index bfbfd4dd69d..00000000000
--- a/sim/testsuite/d10v-elf/t-ae-st2w-id.s
+++ /dev/null
@@ -1,14 +0,0 @@
-.include "t-macros.i"
-
- start
-
- PSW_BITS = 0
- point_dmap_at_imem
- check_interrupt (VEC_AE&DMAP_MASK)+DMAP_BASE PSW_BITS test_st2w
-
- ldi r10, #0x4001
- st2w r8, @(1,r10)
-test_st2w:
- st2w r8,@(2,r10)
- nop
- exit47
diff --git a/sim/testsuite/d10v-elf/t-ae-st2w-im.s b/sim/testsuite/d10v-elf/t-ae-st2w-im.s
deleted file mode 100644
index ee0a9ebe10a..00000000000
--- a/sim/testsuite/d10v-elf/t-ae-st2w-im.s
+++ /dev/null
@@ -1,16 +0,0 @@
-.include "t-macros.i"
-
- start
-
- PSW_BITS = 0
- point_dmap_at_imem
- check_interrupt (VEC_AE&DMAP_MASK)+DMAP_BASE PSW_BITS test_st2w
-
- ldi r10, #0x4000
- st2w r8, @r10-
-
- ldi r10, #0x4001
-test_st2w:
- st2w r8,@r10-
- nop
- exit47
diff --git a/sim/testsuite/d10v-elf/t-ae-st2w-ip.s b/sim/testsuite/d10v-elf/t-ae-st2w-ip.s
deleted file mode 100644
index dc911f723fb..00000000000
--- a/sim/testsuite/d10v-elf/t-ae-st2w-ip.s
+++ /dev/null
@@ -1,16 +0,0 @@
-.include "t-macros.i"
-
- start
-
- PSW_BITS = 0
- point_dmap_at_imem
- check_interrupt (VEC_AE&DMAP_MASK)+DMAP_BASE PSW_BITS test_st2w
-
- ldi r10, #0x4000
- st2w r8, @r10+
-
- ldi r10, #0x4001
-test_st2w:
- st2w r8,@r10+
- nop
- exit47
diff --git a/sim/testsuite/d10v-elf/t-ae-st2w-is.s b/sim/testsuite/d10v-elf/t-ae-st2w-is.s
deleted file mode 100644
index e39d71ce4c0..00000000000
--- a/sim/testsuite/d10v-elf/t-ae-st2w-is.s
+++ /dev/null
@@ -1,16 +0,0 @@
-.include "t-macros.i"
-
- start
-
- PSW_BITS = 0
- point_dmap_at_imem
- check_interrupt (VEC_AE&DMAP_MASK)+DMAP_BASE PSW_BITS test_st2w
-
- ldi sp, #0x4004
- st2w r8, @-SP
-
- ldi sp, #0x4005
-test_st2w:
- st2w r8,@-SP
- nop
- exit47
diff --git a/sim/testsuite/d10v-elf/t-dbt.s b/sim/testsuite/d10v-elf/t-dbt.s
deleted file mode 100644
index 8c518475be7..00000000000
--- a/sim/testsuite/d10v-elf/t-dbt.s
+++ /dev/null
@@ -1,33 +0,0 @@
-.include "t-macros.i"
-
- start
-
- PSW_BITS = PSW_DM
-
-;;; Blat our DMAP registers so that they point at on-chip imem
-
- ldi r2, MAP_INSN | 0xf
- st r2, @(DMAP_REG,r0)
- ldi r2, MAP_INSN
- st r2, @(IMAP1_REG,r0)
-
-;;; Patch the interrupt vector's dbt entry with a jmp to success
-
- ldi r4, #trap
- ldi r5, (VEC_DBT & DMAP_MASK) + DMAP_BASE
- ld2w r2, @(0,r4)
- st2w r2, @(0,r5)
- ld2w r2, @(4,r4)
- st2w r2, @(4,r5)
-
-test_dbt:
- dbt -> nop
- exit47
-
-success:
- checkpsw2 1 PSW_BITS
- exit0
-
- .data
-trap: ldi r1, success@word
- jmp r1
diff --git a/sim/testsuite/d10v-elf/t-ld-st.s b/sim/testsuite/d10v-elf/t-ld-st.s
deleted file mode 100644
index ec9f2023f6a..00000000000
--- a/sim/testsuite/d10v-elf/t-ld-st.s
+++ /dev/null
@@ -1,32 +0,0 @@
-.include "t-macros.i"
-
- start
-
- ; Test ld and st
- ld r4, @foo
- check 1 r4 0xdead
-
- ldi r4, #0x2152
- st r4, @foo
- ld r4, @foo
- check 2 r4 0x2152
-
- ; Test ld2w and st2w
- ldi r4, #0xdead
- st r4, @foo
- ld2w r4, @foo
- check2w2 3 r4 0xdead 0xf000
-
- ldi r4, #0x2112
- ldi r5, #0x1984
- st2w r4, @foo
- ld2w r4, @foo
- check2w2 4 r4 0x2112 0x1984
-
- .data
- .align 2
-foo: .short 0xdead
-bar: .short 0xf000
- .text
-
- exit0
diff --git a/sim/testsuite/d10v-elf/t-mac.s b/sim/testsuite/d10v-elf/t-mac.s
deleted file mode 100644
index 364f61531d1..00000000000
--- a/sim/testsuite/d10v-elf/t-mac.s
+++ /dev/null
@@ -1,71 +0,0 @@
-.include "t-macros.i"
-
- start
-
- ;; clear FX
- loadpsw2 0x8005
- loadacc2 a1 0x7f 0xffff 0xffff
- load r8 0xffff
- load r9 0x8001
-test_macu1:
- MACU a1, r9, r8
- checkacc2 1 a1 0x80 0x8000 0x7FFE
-
- ;; set FX
- loadpsw2 0x8085
- loadacc2 a1 0x7f 0xffff 0xffff
- load r8 0xffff
- load r9 0x8001
-test_macu2:
- MACU a1, r9, r8
- checkacc2 2 a1 0x81 0x0000 0xfffd
-
-
-
-
- ;; clear FX
- ldi r2, #0x8005
- mvtc r2, cr0
-
- loadacc2 a1 0x7f 0xffff 0xffff
- ldi r8, #0xffff
- ldi r9, #0x7FFF
-test_macsu1:
- MACSU a1, r9, r8
- checkacc2 3 a1 0x80 0x7FFE 0x8000
-
- ;; set FX
- ldi r2, #0x8085
- mvtc r2, cr0
-
- loadacc2 a1 0x7f 0xffff 0xffff
- ldi r8, #0xffff
- ldi r9, #0x7FFF
-test_macsu2:
- MACSU a1, r9, r8
- checkacc2 4 a1 0x80 0xfffd 0x0001
-
- ;; clear FX
- ldi r2, #0x8005
- mvtc r2, cr0
-
- loadacc2 a1 0x7f 0xffff 0xffff
- ldi r8, 0xffff
- ldi r9, 0x8001
-test_macsu3:
- MACSU a1, r9, r8
- checkacc2 5 a1 0x7F 0x8001 0x7FFE
-
- ;; set FX
- ldi r2, #0x8085
- mvtc r2, cr0
-
- loadacc2 a1 0x7f 0xffff 0xffff
- ldi r8, #0xffff
- ldi r9, #0x8001
-test_macsu4:
- MACSU a1, r9, r8
- checkacc2 6 a1 0x7f 0x0002 0xFFFD
-
- exit0
-
diff --git a/sim/testsuite/d10v-elf/t-macros.i b/sim/testsuite/d10v-elf/t-macros.i
deleted file mode 100644
index f424acfa57b..00000000000
--- a/sim/testsuite/d10v-elf/t-macros.i
+++ /dev/null
@@ -1,233 +0,0 @@
- .macro start
- .text
- .align 2
- .globl _start
-_start:
- ldi r0, 0
- .endm
-
-
- .macro exit47
- ldi r4, 1
- ldi r0, 47
- trap 15
- .endm
-
-
- .macro exit0
- ldi r4, 1
- ldi r0, 0
- trap 15
- .endm
-
-
- .macro exit1
- ldi r4, 1
- ldi r0, 1
- trap 15
- .endm
-
-
- .macro exit2
- ldi r4, 1
- ldi r0, 2
- trap 15
- .endm
-
-
- .macro load reg val
- ldi \reg, #\val
- .endm
-
-
- .macro load2w reg hi lo
- ld2w \reg, @(1f,r0)
- .data
- .align 2
-1: .short \hi
- .short \lo
- .text
- .endm
-
-
- .macro check exit reg val
- cmpeqi \reg, #\val
- brf0t 1f
-0: ldi r4, 1
- ldi r0, \exit
- trap 15
-1:
- .endm
-
-
- .macro check2w2 exit reg hi lo
- st2w \reg, @(1f,r0)
- ld r2, @(1f, r0)
- cmpeqi r2, #\hi
- brf0f 0f
- ld r2, @(1f + 2, r0)
- cmpeqi r2, #\lo
- brf0f 0f
- bra 2f
-0: ldi r4, 1
- ldi r0, \exit
- trap 15
- .data
- .align 2
-1: .long 0
- .text
-2:
- .endm
-
-
- .macro loadacc2 acc guard hi lo
- ldi r2, #\lo
- mvtaclo r2, \acc
- ldi r2, #\hi
- mvtachi r2, \acc
- ldi r2, #\guard
- mvtacg r2, \acc
- .endm
-
-
- .macro checkacc2 exit acc guard hi lo
- ldi r2, #\guard
- mvfacg r3, \acc
- cmpeq r2, r3
- brf0f 0f
- ldi r2, #\hi
- mvfachi r3, \acc
- cmpeq r2, r3
- brf0f 0f
- ldi r2, #\lo
- mvfaclo r3, \acc
- cmpeq r2, r3
- brf0f 0f
- bra 4f
-0: ldi r4, 1
- ldi r0, \exit
- trap 15
-4:
- .endm
-
-
- .macro loadpsw2 val
- ldi r2, #\val
- mvtc r2, cr0
- .endm
-
-
- .macro checkpsw2 exit val
- mvfc r2, cr0
- cmpeqi r2, #\val
- brf0t 1f
- ldi r4, 1
- ldi r0, \exit
- trap 15
-1:
- .endm
-
-
- .macro hello
- ;; 4:write (1, string, strlen (string))
- ldi r4, 4
- ldi r0, 1
- ldi r1, 1f
- ldi r2, 2f-1f-1
- trap 15
- .section .rodata
-1: .string "Hello World!\n"
-2: .align 2
- .text
- .endm
-
-
-;;; Blat our DMAP registers so that they point at on-chip imem
- .macro point_dmap_at_imem
- .text
- ldi r2, MAP_INSN | 0xf
- st r2, @(DMAP_REG,r0)
- ldi r2, MAP_INSN
- st r2, @(IMAP1_REG,r0)
- .endm
-
-;;; Patch VEC so that it jumps back to code that checks PSW
-;;; and then exits with success.
- .macro check_interrupt vec psw src
-;;; Patch the interrupt vector's AE entry with a jmp to success
- .text
- ldi r4, #1f
- ldi r5, \vec
- ;;
- ld2w r2, @(0,r4)
- st2w r2, @(0,r5)
- ld2w r2, @(4,r4)
- st2w r2, @(4,r5)
- ;;
- bra 9f
- nop
-;;; Code that gets patched into the interrupt vector
- .data
-1: ldi r1, 2f@word
- jmp r1
-;;; Successfull trap jumps back to here
- .text
-;;; Verify the PSW
-2: mvfc r2, cr0
- cmpeqi r2, #\psw
- brf0t 3f
- nop
- exit1
-;;; Verify the original addr
-3: mvfc r2, bpc
- cmpeqi r2, #\src@word
- brf0t 4f
- exit2
-4: exit0
-;;; continue as normal
-9:
- .endm
-
-
- PSW_SM = 0x8000
- PSW_01 = 0x4000
- PSW_EA = 0x2000
- PSW_DB = 0x1000
- PSW_DM = 0x0800
- PSW_IE = 0x0400
- PSW_RP = 0x0200
- PSW_MD = 0x0100
- PSW_FX = 0x0080
- PSW_ST = 0x0040
- PSW_10 = 0x0020
- PSW_11 = 0x0010
- PSW_F0 = 0x0008
- PSW_F1 = 0x0004
- PSW_14 = 0x0002
- PSW_C = 0x0001
-
-
-;;;
-
- DMAP_MASK = 0x3fff
- DMAP_BASE = 0x8000
- DMAP_REG = 0xff04
-
- IMAP0_REG = 0xff00
- IMAP1_REG = 0xff02
-
- MAP_INSN = 0x1000
-
-;;;
-
- VEC_RI = 0x3ff00
- VEC_BAE = 0x3ff04
- VEC_RIE = 0x3ff08
- VEC_AE = 0x3ff0c
- VEC_TRAP = 0x3ff10
- VEC_DBT = 0x3ff50
- VEC_SDBT = 0x3fff4
- VEC_DBI = 0x3ff58
- VEC_EI = 0x3ff5c
-
-
diff --git a/sim/testsuite/d10v-elf/t-mod-ld-pre.s b/sim/testsuite/d10v-elf/t-mod-ld-pre.s
deleted file mode 100644
index 4536e0344e1..00000000000
--- a/sim/testsuite/d10v-elf/t-mod-ld-pre.s
+++ /dev/null
@@ -1,126 +0,0 @@
-.include "t-macros.i"
-
-.section .rodata
-
- .text
- .globl main
- .type main,@function
-main:
- mvfc r0, PSW || ldi.s r14, #0
- ldi.l r2, 0x100 ; MOD_E
- ldi.l r3, 0x108 ; MOD_S
-
-test_mod_dec_ld:
- mvtc r2, MOD_E || bseti r0, #7
- mvtc r3, MOD_S
- mvtc r0, PSW ; modulo mode enable
- mv r1,r3 ; r1=0x108
- ld r4, @r1- || nop ; r1=0x106
- ld r4, @r1- || nop ; r1=0x104
- ld r4, @r1- || nop ; r1=0x102
- ld r4, @r1- || nop ; r1=0x100
- ld r4, @r1- || nop ; r1=0x108
- ld r4, @r1- || nop ; r1=0x106
-
- cmpeqi r1,#0x106
- brf0f _ERR ; branch to error
-
-test_mod_inc_ld:
- mvtc r2, MOD_S
- mvtc r3, MOD_E
- mv r1,r2 ; r1=0x100
- ld r4, @r1+ || nop ; r1=0x102
- ld r4, @r1+ || nop ; r1=0x104
- ld r4, @r1+ || nop ; r1=0x106
- ld r4, @r1+ || nop ; r1=0x108
- ld r4, @r1+ || nop ; r1=0x100
- ld r4, @r1+ || nop ; r1=0x102
-
- cmpeqi r1,#0x102
- brf0f _ERR
-
-test_mod_dec_ld2w:
- mvtc r2, MOD_E
- mvtc r3, MOD_S
- mv r1,r3 ; r1=0x108
- ld2W r4, @r1- || nop ; r1=0x104
- ld2W r4, @r1- || nop ; r1=0x100
- ld2W r4, @r1- || nop ; r1=0x108
- ld2W r4, @r1- || nop ; r1=0x104
-
- cmpeqi r1,#0x104
- brf0f _ERR ; <= branch to error
-
-test_mod_inc_ld2w:
- mvtc r2, MOD_S
- mvtc r3, MOD_E || BCLRI r0, #7
- mv r1,r2 ; r1=0x100
- ld2W r4, @r1+ || nop ; r1=0x104
- ld2W r4, @r1+ || nop ; r1=0x108
- ld2W r4, @r1+ || nop ; r1=0x100
- ld2W r4, @r1+ || nop ; r1=0x104
-
- cmpeqi r1,#0x104
- brf0f _ERR
-
-test_mod_dec_ld_dis:
- mvtc r0, PSW ; modulo mode disable
- mvtc r2, MOD_E
- mvtc r3, MOD_S
- mv r1,r3 ; r1=0x108
- ld r4, @r1- || nop ; r1=0x106
- ld r4, @r1- || nop ; r1=0x104
- ld r4, @r1- || nop ; r1=0x102
- ld r4, @r1- || nop ; r1=0x100
- ld r4, @r1- || nop ; r1=0xFE
- ld r4, @r1- || nop ; r1=0xFC
-
- cmpeqi r1,#0xFC
- brf0f _ERR
-
-test_mod_inc_ld_dis:
- mvtc r2, MOD_S
- mvtc r3, MOD_E
- mv r1,r2 ; r1=0x100
- ld r4, @r1+ || nop ; r1=0x102
- ld r4, @r1+ || nop ; r1=0x104
- ld r4, @r1+ || nop ; r1=0x106
- ld r4, @r1+ || nop ; r1=0x108
- ld r4, @r1+ || nop ; r1=0x10A
- ld r4, @r1+ || nop ; r1=0x10C
-
- cmpeqi r1,#0x10C
- brf0f _ERR
-
-test_mod_dec_ld2w_dis:
- mvtc r2, MOD_E
- mvtc r3, MOD_S
- mv r1,r3 ; r1=0x108
- ld2W r4, @r1- || nop ; r1=0x104
- ld2W r4, @r1- || nop ; r1=0x100
- ld2W r4, @r1- || nop ; r1=0xFC
- ld2W r4, @r1- || nop ; r1=0xF8
-
- cmpeqi r1,#0xF8
- brf0f _ERR
-
- test_mod_inc_ld2w_dis:
- mvtc r2, MOD_S
- mvtc r3, MOD_E
- mv r1,r2 ; r1=0x100
- ld2W r4, @r1+ || nop ; r1=0x104
- ld2W r4, @r1+ || nop ; r1=0x108
- ld2W r4, @r1+ || nop ; r1=0x10C
- ld2W r4, @r1+ || nop ; r1=0x110
-
- cmpeqi r1,#0x110
- brf0f _ERR
-
-_OK:
- exit0
-
-_ERR:
- exit47
-
-
-
diff --git a/sim/testsuite/d10v-elf/t-msbu.s b/sim/testsuite/d10v-elf/t-msbu.s
deleted file mode 100644
index 04276cc25d9..00000000000
--- a/sim/testsuite/d10v-elf/t-msbu.s
+++ /dev/null
@@ -1,28 +0,0 @@
-.include "t-macros.i"
-
- start
-
- ;; clear FX
- ldi r2, #0x8005
- mvtc r2, cr0
-
- loadacc2 a1 0x7f 0xffff 0xffff
- ldi r8, 0xffff
- ldi r9, 0x8001
-test_msbu1:
- MSBU a1, r9, r8
- checkacc2 1 a1 0X7F 0x7FFF 0x8000
-
-
- ;; set FX
- ldi r2, #0x8085
- mvtc r2, cr0
-
- loadacc2 a1 0x7f 0xffff 0xffff
- ldi r8, 0xffff
- ldi r9, 0x8001
-test_msbu2:
- MSBU a1, r9, r8
- checkacc2 2 a1 0X7E 0xFFFF 0x0001
-
- exit0
diff --git a/sim/testsuite/d10v-elf/t-mulxu.s b/sim/testsuite/d10v-elf/t-mulxu.s
deleted file mode 100644
index a8e6ffc8d49..00000000000
--- a/sim/testsuite/d10v-elf/t-mulxu.s
+++ /dev/null
@@ -1,28 +0,0 @@
-.include "t-macros.i"
-
- start
-
- ;; clear FX
- ldi r2, #0x8005
- mvtc r2, cr0
-
- loadacc2 a1 0x7f 0xffff 0xffff
- ldi r8, 0xffff
- ldi r9, 0x8001
-test_mulxu1:
- MULXU a1, r9, r8
- checkacc2 1 a1 0x00 0x8000 0x7FFF
-
-
- ;; set FX
- ldi r2, #0x8085
- mvtc r2, cr0
-
- loadacc2 a1 0x7f 0xffff 0xffff
- ldi r8, 0xffff
- ldi r9, 0x8001
-test_mulxu2:
- MULXU a1, r9, r8
- checkacc2 2 a1 0x01 0x0000 0xFFFE
-
- exit0
diff --git a/sim/testsuite/d10v-elf/t-mvtac.s b/sim/testsuite/d10v-elf/t-mvtac.s
deleted file mode 100644
index 68452dc827a..00000000000
--- a/sim/testsuite/d10v-elf/t-mvtac.s
+++ /dev/null
@@ -1,19 +0,0 @@
-.include "t-macros.i"
-
- start
-
- ldi r8, 0xbeef
- mvtaclo r8, a0
- checkacc2 1 a0 0xff 0xffff 0xbeef
-
- mvtacg r0, a0
- checkacc2 2 a0 0x00 0xffff 0xbeef
-
- ldi r8, 0xdead
- mvtachi r8, a0
- checkacc2 3 a0 0xff 0xdead 0xbeef
-
- loadacc2 a1 0xfe 0xbeef 0xdead
- checkacc2 4 a1 0xfe 0xbeef 0xdead
-
- exit0
diff --git a/sim/testsuite/d10v-elf/t-mvtc.s b/sim/testsuite/d10v-elf/t-mvtc.s
deleted file mode 100644
index 2eed8331a40..00000000000
--- a/sim/testsuite/d10v-elf/t-mvtc.s
+++ /dev/null
@@ -1,129 +0,0 @@
-.include "t-macros.i"
-
- start
-
-;;; Try out each bit in the PSW
-
- loadpsw2 PSW_SM
- checkpsw2 1 PSW_SM
-
- loadpsw2 PSW_01
- checkpsw2 2 0 ;; PSW_01
-
- loadpsw2 PSW_EA
- checkpsw2 3 PSW_EA
-
- loadpsw2 PSW_DB
- checkpsw2 4 PSW_DB
-
- loadpsw2 PSW_DM
- checkpsw2 5 0 ;; PSW_DM
-
- loadpsw2 PSW_IE
- checkpsw2 6 PSW_IE
-
- loadpsw2 PSW_RP
- checkpsw2 7 PSW_RP
-
- loadpsw2 PSW_MD
- checkpsw2 8 PSW_MD
-
- loadpsw2 PSW_FX|PSW_ST
- checkpsw2 9 PSW_FX|PSW_ST
-
- ;; loadpsw2 PSW_ST
- ;; checkpsw2 10
-
- loadpsw2 PSW_10
- checkpsw2 11 0 ;; PSW_10
-
- loadpsw2 PSW_11
- checkpsw2 12 0 ;; PSW_11
-
- loadpsw2 PSW_F0
- checkpsw2 13 PSW_F0
-
- loadpsw2 PSW_F1
- checkpsw2 14 PSW_F1
-
- loadpsw2 PSW_14
- checkpsw2 15 0 ;; PSW_14
-
- loadpsw2 PSW_C
- checkpsw2 16 PSW_C
-
-
-;;; Check that bit 0 (LSB) of the MOD_E & MOD_S registers are stuck at ZERO.
-
- ldi r6, #0xdead
- mvtc r6, cr10
- ldi r6, #0xbeef
- mvtc r6, cr11
-
- mvfc r7, cr10
- check 17 r7 0xdeac
- mvfc r7, cr11
- check 18 r7 0xbeee
-
-;;; Check that certain bits of the PSW, DPSW and BPSW are hardwired to zero
-
-psw_ffff:
- ldi r6, 0xffff
- mvtc r6, psw
- mvfc r7, psw
- check 18 r7 0xb7cd
-
-bpsw_ffff:
- ldi r6, 0xffff
- mvtc r6, bpsw
- mvfc r7, bpsw
- check 18 r7 0xb7cd
-
-dpsw_ffff:
- ldi r6, 0xffff
- mvtc r6, dpsw
- mvfc r7, dpsw
- check 18 r7 0xb7cd
-
-;;; Another check. Very similar
-
-psw_dfff:
- ldi r6, 0xdfff
- mvtc r6, psw
- mvfc r7, psw
- check 18 r7 0x97cd
-
-bpsw_dfff:
- ldi r6, 0xdfff
- mvtc r6, bpsw
- mvfc r7, bpsw
- check 18 r7 0x97cd
-
-dpsw_dfff:
- ldi r6, 0xdfff
- mvtc r6, dpsw
- mvfc r7, dpsw
- check 18 r7 0x97cd
-
-;;; And again.
-
-psw_8005:
- ldi r6, 0x8005
- mvtc r6, psw
- mvfc r7, psw
- check 18 r7 0x8005
-
-bpsw_8005:
- ldi r6, 0x8005
- mvtc r6, bpsw
- mvfc r7, bpsw
- check 18 r7 0x8005
-
-dpsw_8005:
- ldi r6, 0x8005
- mvtc r6, dpsw
- mvfc r7, dpsw
- check 18 r7 0x8005
-
-
- exit0
diff --git a/sim/testsuite/d10v-elf/t-rac.s b/sim/testsuite/d10v-elf/t-rac.s
deleted file mode 100644
index f2123116c64..00000000000
--- a/sim/testsuite/d10v-elf/t-rac.s
+++ /dev/null
@@ -1,16 +0,0 @@
-.include "t-macros.i"
-
- start
-
- ;; clear FX
- loadpsw2 0x8004
- loadacc2 a0 0x80 0x0000 0x0000
- loadacc2 a1 0x00 0x0000 0x5000
- load r10 0x0123
- load r11 0x4567
-test_rac1:
- RAC r10, a0, #-2
- checkpsw2 1 0x8008
- check2w2 2 r10 0x8000 0x0000
-
- exit0
diff --git a/sim/testsuite/d10v-elf/t-rachi.s b/sim/testsuite/d10v-elf/t-rachi.s
deleted file mode 100644
index ed901959469..00000000000
--- a/sim/testsuite/d10v-elf/t-rachi.s
+++ /dev/null
@@ -1,28 +0,0 @@
-.include "t-macros.i"
-
- start
-
- loadacc2 a0 0x00 0x7FFF 0x8000
-test_rachi_1:
- rachi r4, a0, 0
- check 1 r4 0x7FFF
-
-
- loadacc2 a0 0xFF 0x8000 0x1000
-test_rachi_2:
- rachi r4, a0, 0
- check 2 r4 0x8000
-
-
- loadacc2 a0 0x00 0x1000 0xA000
-test_rachi_3:
- rachi r4, a0, 0
- check 3 r4 0x1001
-
-
- loadacc2 a0 0xFF 0xA000 0x7FFF
-test_rachi_4:
- rachi r4, a0, 0
- check 4 r4 0xa000
-
- exit0
diff --git a/sim/testsuite/d10v-elf/t-rdt.s b/sim/testsuite/d10v-elf/t-rdt.s
deleted file mode 100644
index 661b583bb13..00000000000
--- a/sim/testsuite/d10v-elf/t-rdt.s
+++ /dev/null
@@ -1,18 +0,0 @@
-.include "t-macros.i"
-
- start
-
- PSW_BITS = PSW_C|PSW_F0|PSW_F1
-
- ldi r6, #success@word
- mvtc r6, dpc
- ldi r6, #PSW_BITS
- mvtc r6, dpsw
-
-test_rdt:
- RTD
- exit47
-
-success:
- checkpsw2 1 PSW_BITS
- exit0
diff --git a/sim/testsuite/d10v-elf/t-rep.s b/sim/testsuite/d10v-elf/t-rep.s
deleted file mode 100644
index cea3ea8251d..00000000000
--- a/sim/testsuite/d10v-elf/t-rep.s
+++ /dev/null
@@ -1,45 +0,0 @@
-.include "t-macros.i"
-
- start
-
-
-
- ;; Check that the instruction @REP_E is executed when it
- ;; is reached using a branch instruction
-
- ldi r2, 1
-test_rep_1:
- rep r2, end_rep_1
- nop || nop
- nop || nop
- nop || nop
- nop || nop
- ldi r3, 46
- bra end_rep_1
- ldi r3, 42
-end_rep_1:
- addi r3, 1
-
- check 1 r3 47
-
-
- ;; Check that the loop is executed the correct number of times
-
- ldi r2, 10
- ldi r3, 0
- ldi r4, 0
-test_rep_2:
- rep r2, end_rep_2
- nop || nop
- nop || nop
- nop || nop
- nop || nop
- nop || nop
- addi r3, 1
-end_rep_2:
- addi r4, 1
-
- check 2 r3 10
- check 3 r4 10
-
- exit0
diff --git a/sim/testsuite/d10v-elf/t-rie-xx.s b/sim/testsuite/d10v-elf/t-rie-xx.s
deleted file mode 100644
index 2a6fcbdd6fc..00000000000
--- a/sim/testsuite/d10v-elf/t-rie-xx.s
+++ /dev/null
@@ -1,12 +0,0 @@
-.include "t-macros.i"
-
- start
-
- PSW_BITS = 0
- point_dmap_at_imem
- check_interrupt (VEC_RIE&DMAP_MASK)+DMAP_BASE PSW_BITS test_rie_xx
-
-test_rie_xx:
- .short 0xe120, 0x0000 ;; Example of RIE code
- nop
- exit47
diff --git a/sim/testsuite/d10v-elf/t-rte.s b/sim/testsuite/d10v-elf/t-rte.s
deleted file mode 100644
index 5ce31ddbf41..00000000000
--- a/sim/testsuite/d10v-elf/t-rte.s
+++ /dev/null
@@ -1,18 +0,0 @@
-.include "t-macros.i"
-
- start
-
- PSW_BITS = PSW_C|PSW_F0|PSW_F1
-
- ldi r6, #success@word
- mvtc r6, bpc
- ldi r6, #PSW_BITS
- mvtc r6, bpsw
-
-test_rte:
- RTE
- exit47
-
-success:
- checkpsw2 1 PSW_BITS
- exit0
diff --git a/sim/testsuite/d10v-elf/t-sac.s b/sim/testsuite/d10v-elf/t-sac.s
deleted file mode 100644
index 7042be025b1..00000000000
--- a/sim/testsuite/d10v-elf/t-sac.s
+++ /dev/null
@@ -1,23 +0,0 @@
-.include "t-macros.i"
-
- start
-
-test_sac_1:
- loadacc2 a0 0x00 0xAFFF 0x0000
- sac r4, a0
- check 1 r4 0x7FFF
- check 2 r5 0xFFFF
-
-test_sac_2:
- loadacc2 a0 0xFF 0x7000 0x0000
- sac r4, a0
- check 3 r4 0x8000
- check 4 r5 0x0000
-
-test_sac_3:
- loadacc2 a0 0x00 0x1000 0xA000
- sac r4, a0
- check 5 r4 0x1000
- check 6 r5 0xA000
-
- exit0
diff --git a/sim/testsuite/d10v-elf/t-sachi.s b/sim/testsuite/d10v-elf/t-sachi.s
deleted file mode 100644
index 7774ee04558..00000000000
--- a/sim/testsuite/d10v-elf/t-sachi.s
+++ /dev/null
@@ -1,22 +0,0 @@
-.include "t-macros.i"
-
- start
-
-test_sachi_1:
- loadacc2 a0 0x00 0xAFFF 0x0000
- sachi r4, a0
- check 1 r4 0x7FFF
-
-
-test_sachi_2:
- loadacc2 a0 0xFF 0x8000 0x1000
- sachi r4, a0
- check 2 r4 0x8000
-
-
-test_sachi_3:
- loadacc2 a0 0x00 0x1000 0xA000
- sachi r4, a0
- check 3 r4 0x1000
-
- exit0
diff --git a/sim/testsuite/d10v-elf/t-sadd.s b/sim/testsuite/d10v-elf/t-sadd.s
deleted file mode 100644
index f3e4ebe3da4..00000000000
--- a/sim/testsuite/d10v-elf/t-sadd.s
+++ /dev/null
@@ -1,38 +0,0 @@
-.include "t-macros.i"
-
- start
-
- PSW_BITS = PSW_FX|PSW_ST|PSW_SM
- loadpsw2 PSW_BITS
-
- ;; Test normal sadd
-
- loadacc2 a0 0x00 0x7fff 0xffff
- loadacc2 a1 0xff 0x8000 0x0000
- sadd a1, a0
- checkacc2 1 a0 0x00 0x7fff 0xffff
- checkacc2 2 a1 0xff 0x8000 0x7fff
-
- ;; Test overflow
-
- loadacc2 a0 0x00 0x0000 0x0000
- loadacc2 a1 0x01 0x8000 0x0000
- sadd a1, a0
- checkacc2 3 a0 0x00 0x0000 0x0000
- checkacc2 4 a1 0x00 0x7fff 0xffff
-
- loadacc2 a0 0x00 0xffff 0xffff
- loadacc2 a1 0x00 0xffff 0xffff
- sadd a1, a0
- checkacc2 5 a1 0x00 0x7fff 0xffff
- checkacc2 6 a0 0x00 0xffff 0xffff
-
- ;; Test underflow
-
- loadacc2 a0 0x00 0x0000 0x0000
- loadacc2 a1 0x80 0x8000 0x0000
- sadd a1, a0
- checkacc2 7 a0 0x00 0x0000 0x0000
- checkacc2 8 a1 0xff 0x8000 0x0000
-
- exit0
diff --git a/sim/testsuite/d10v-elf/t-slae.s b/sim/testsuite/d10v-elf/t-slae.s
deleted file mode 100644
index 6d8422d0f9f..00000000000
--- a/sim/testsuite/d10v-elf/t-slae.s
+++ /dev/null
@@ -1,39 +0,0 @@
-.include "t-macros.i"
-
- start
-
-test_slae_1:
- loadpsw2 PSW_ST|PSW_FX
- loadacc2 a0 0x00 0x0AFF 0xF000
- ldi r0, 4
- slae a0, r0
- checkacc2 1 a0 0x00 0x7FFF 0xFFFF
-
-test_slae_2:
- loadpsw2 PSW_ST|PSW_FX
- loadacc2 a0 0xFF 0xF700 0x1000
- ldi r0, 4
- slae a0, r0
- checkacc2 2 a0 0xFF 0x8000 0x0000
-
-test_slae_3:
- loadpsw2 PSW_ST|PSW_FX
- loadacc2 a0 0x00 0x0010 0xA000
- ldi r0, 4
- slae a0, r0
- checkacc2 3 a0 0x00 0x010A 0x0000
-
-test_slae_4:
- loadpsw2 0
- loadacc2 a0 0x00 0x0010 0xA000
- ldi r0, 4
- slae a0, r0
- checkacc2 4 a0 0x00 0x010A 0x0000
-
-test_slae_5:
- loadacc2 a0 0x00 0x0010 0xA000
- ldi r0, -4
- slae a0, r0
- checkacc2 4 a0 0x00 0x0001 0x0A00
-
- exit0
diff --git a/sim/testsuite/d10v-elf/t-sp.s b/sim/testsuite/d10v-elf/t-sp.s
deleted file mode 100644
index 84f9ad48676..00000000000
--- a/sim/testsuite/d10v-elf/t-sp.s
+++ /dev/null
@@ -1,17 +0,0 @@
-.include "t-macros.i"
-
- start
-
-;;; Read/Write values to SPU/SPI
-
- loadpsw2 0
- ldi sp, 0xdead
- loadpsw2 PSW_SM
- ldi sp, 0xbeef
-
- loadpsw2 0
- check 1 sp 0xdead
- loadpsw2 PSW_SM
- check 2 sp 0xbeef
-
- exit0
diff --git a/sim/testsuite/d10v-elf/t-sub.s b/sim/testsuite/d10v-elf/t-sub.s
deleted file mode 100644
index 26d0a3a1c9a..00000000000
--- a/sim/testsuite/d10v-elf/t-sub.s
+++ /dev/null
@@ -1,42 +0,0 @@
-.include "t-macros.i"
-
- start
-
-;; The d10v implements negated addition for subtraction
-
- .macro check_sub s x y r c
- ;; clear carry
- ldi r6,#0x8004
- mvtc r6,cr0
- ;; subtract
- ldi r10,#\x
- ldi r11,#\y
- sub r10, r11
- ;; verify result
- ldi r12, #\r
- cmpeq r10, r12
- brf0t 1f
- ldi r6, 1
- ldi r2, #\s
- trap 15
-1:
- ;; verify carry
- mvfc r6, cr0
- and3 r6, r6, #1
- cmpeqi r6, #\c
- brf0t 1f
- ldi r6, 1
- ldi r2, #\s
- trap 15
-1:
- .endm
-
-check_sub 1 0x0000 0x0000 0x0000 1
-check_sub 2 0x0000 0x0001 0xffff 0
-check_sub 3 0x0001 0x0000 0x0001 1
-check_sub 4 0x0001 0x0001 0x0000 1
-check_sub 5 0x0000 0x8000 0x8000 0
-check_sub 6 0x8000 0x0001 0x7fff 1
-check_sub 7 0x7fff 0x7fff 0x0000 1
-
- exit0
diff --git a/sim/testsuite/d10v-elf/t-sub2w.s b/sim/testsuite/d10v-elf/t-sub2w.s
deleted file mode 100644
index 9f1bbb7321e..00000000000
--- a/sim/testsuite/d10v-elf/t-sub2w.s
+++ /dev/null
@@ -1,57 +0,0 @@
-.include "t-macros.i"
-
- start
-
-;; The d10v implements negated addition for subtraction
-
- .macro check_sub2w s x y r c v
-
- ;; clear carry
- ldi r6,#0x8004
- mvtc r6,cr0
-
- ;; load opnds
- ld2w r6, @(1f,r0)
- ld2w r8, @(2f,r0)
- .data
-1: .long \x
-2: .long \y
- .text
-
- ;; subtract
- SUB2W r6, r8
-
- ;; verify result
- ld2w r10, @(1f,r0)
- .data
-1: .long \r
- .text
- cmpeq r6, r10
- brf0f 2f
- cmpeq r7, r11
- brf0t 3f
-2: ldi r4, 1
- ldi r0, \s
- trap 15
-3:
-
- ;; verify carry
- mvfc r6, cr0
- and3 r6, r6, #1
- cmpeqi r6, #\c
- brf0t 1f
- ldi r4, 1
- ldi r0, \s
- trap 15
-1:
- .endm
-
-check_sub2w 1 0x00000000 0x00000000 0x00000000 1 0
-check_sub2w 2 0x00000000 0x00000001 0xffffffff 0 0
-check_sub2w 3 0x00000001 0x00000000 0x00000001 1 0
-check_sub2w 3 0x00000001 0x00000001 0x00000000 1 0
-check_sub2w 5 0x00000000 0x80000000 0x80000000 0 1
-check_sub2w 6 0x80000000 0x00000001 0x7fffffff 1 1
-check_sub2w 7 0x7fffffff 0x7fffffff 0x00000000 1 0
-
- exit0
diff --git a/sim/testsuite/d10v-elf/t-subi.s b/sim/testsuite/d10v-elf/t-subi.s
deleted file mode 100644
index 81faad5ec24..00000000000
--- a/sim/testsuite/d10v-elf/t-subi.s
+++ /dev/null
@@ -1,39 +0,0 @@
-.include "t-macros.i"
-
- start
-
-;; The d10v implements negated addition for subtraction
-
- .macro check_subi s x y r c v
- ;; clear carry
- ldi r6,#0x8004
- mvtc r6,cr0
- ;; subtract
- ldi r10,#\x
- SUBI r10,#\y
- ;; verify result
- ldi r11, #\r
- cmpeq r10, r11
- brf0t 1f
- ldi r6, 1
- ldi r2, \s
- trap 15
-1:
- ;; verify carry
- mvfc r6, cr0
- and3 r6, r6, #1
- cmpeqi r6, #\c
- brf0t 1f
- ldi r6, 1
- ldi r2, \s
- trap 15
-1:
- .endm
-
- check_subi 1 0000 0x0000 0xfff0 00 ;; 0 - 0x10
- check_subi 2 0x0000 0x0001 0xffff 0 0
- check_subi 3 0x0001 0x0000 0xfff1 0 0
- check_subi 4 0x0001 0x0001 0x0000 1 0
- check_subi 5 0x8000 0x0001 0x7fff 1 1
-
- exit0
diff --git a/sim/testsuite/d10v-elf/t-trap.s b/sim/testsuite/d10v-elf/t-trap.s
deleted file mode 100644
index 6ac4ae01ef8..00000000000
--- a/sim/testsuite/d10v-elf/t-trap.s
+++ /dev/null
@@ -1,5 +0,0 @@
-.include "t-macros.i"
-
- start
-
- exit47
diff --git a/sim/testsuite/d30v-elf/ChangeLog b/sim/testsuite/d30v-elf/ChangeLog
deleted file mode 100644
index 98e5877e96d..00000000000
--- a/sim/testsuite/d30v-elf/ChangeLog
+++ /dev/null
@@ -1,64 +0,0 @@
-1999-03-17 Frank Ch. Eigler <fche@cygnus.com>
-
- * do-flags.S: Added new test for non-lkr status of MVTSYS.
-
-1999-01-12 Frank Ch. Eigler <fche@cygnus.com>
-
- * do-flags.S: Added one old, one new regression test.
-
-1999-01-11 Frank Ch. Eigler <fche@cygnus.com>
-
- * do-flags.S: New test for parallel PSW update conflicts.
- * Makefile.in (TESTS): Run it.
-
-1999-01-07 Frank Ch. Eigler <fche@cygnus.com>
-
- * do-2wordops.S: New test for sign-extension by ld2h.
-
-1998-12-08 Frank Ch. Eigler <fche@cygnus.com>
-
- * do-2wordops.S: New test for double-word load-like operations.
-
-1998-12-04 Frank Ch. Eigler <fche@cygnus.com>
-
- * do-shifts.S: Update an older test case.
-
-1998-12-03 Frank Ch. Eigler <fche@cygnus.com>
-
- * do-shifts.S: New test for more SRC shift counts.
-
-1998-11-22 Frank Ch. Eigler <fche@cygnus.com>
-
- * do-shifts.S: New test for large SRC shift counts.
-
-1998-11-12 Frank Ch. Eigler <fche@cygnus.com>
-
- * br-djsr.S: New test for new R62-update timing.
-
-1998-11-06 Frank Ch. Eigler <fche@cygnus.com>
-
- * do-shifts.S: Add test for large mvfacc shifts.
-
-Tue Oct 13 10:54:51 EDT 1998 Frank Ch. Eigler <fche@cygnus.com>
-
- * Makefile.in (TESTS): Added do-shifts test case.
- * do-shifts.S: New file.
-
-Wed Apr 29 12:49:00 1998 Frank Ch. Eigler <fche@cygnus.com>
-
- * ls-modaddr.S: New test for modular addressing.
- * Makefile.in: Run it.
-
-Wed Sep 3 14:33:35 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * Makefile.in (.S.run): Replace .d30v with .run.
-
-Wed Apr 2 14:10:43 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
-
- * Makefile.in (.d30v.ko): Limit the cpu time to 5 seconds.
-
-Wed Mar 26 11:13:42 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
-
- * Makefile.in (.d30v.ko): Disable the shell's exit-on-error which
- is enabled by BSD style make.
-
diff --git a/sim/testsuite/d30v-elf/Makefile.in b/sim/testsuite/d30v-elf/Makefile.in
deleted file mode 100644
index 6317fe4fba8..00000000000
--- a/sim/testsuite/d30v-elf/Makefile.in
+++ /dev/null
@@ -1,217 +0,0 @@
-# Makefile for regression testing the GNU debugger.
-# Copyright (C) 1992, 1993, 1994, 1995 Free Software Foundation, Inc.
-
-# This file is part of GDB.
-
-# GDB is free software; you can redistribute it and/or modify
-# it under the terms of the GNU General Public License as published by
-# the Free Software Foundation; either version 2, or (at your option)
-# any later version.
-
-# GDB is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
-VPATH = @srcdir@
-srcdir = @srcdir@
-srcroot = $(srcdir)/..
-
-prefix = @prefix@
-exec_prefix = @exec_prefix@
-
-host_alias = @host_alias@
-target_alias = @target_alias@
-program_transform_name = @program_transform_name@
-build_canonical = @build@
-host_canonical = @host@
-target_canonical = @target@
-target_cpu = @target_cpu@
-
-
-SHELL = /bin/sh
-SUBDIRS = @subdirs@
-RPATH_ENVVAR = @RPATH_ENVVAR@
-
-EXPECT = `if [ -f $${rootme}/../../expect/expect ] ; then \
- echo $${rootme}/../../expect/expect ; \
- else echo expect ; fi`
-
-RUNTEST = $(RUNTEST_FOR_TARGET)
-
-RUNTESTFLAGS =
-
-RUNTEST_FOR_TARGET = `\
- if [ -f $${srcdir}/../../../dejagnu/runtest ]; then \
- echo $${srcdir}/../../../dejagnu/runtest; \
- else \
- if [ "$(host_canonical)" = "$(target_canonical)" ]; then \
- echo runtest; \
- else \
- t='$(program_transform_name)'; echo runtest | sed -e '' $$t; \
- fi; \
- fi`
-
-
-AS_FOR_TARGET = `\
- if [ -x ../../../gas/as-new ]; then \
- echo ../../../gas/as-new ; \
- else \
- echo $(target_alias)-as ; \
- fi`
-
-LD_FOR_TARGET = `\
- if [ -x ../../../ld/ld-new ]; then \
- echo ../../../ld/ld-new ; \
- else \
- echo $(target_alias)-ld ; \
- fi`
-
-RUN_FOR_TARGET = `\
- if [ -x ../../../sim/${target_cpu}/run ]; then \
- echo ../../../sim/${target_cpu}/run ; \
- else \
- echo $(target_alias)-run ; \
- fi`
-
-TESTS = \
- em-e0.ok \
- em-e47.ko \
- em-pstr.hi \
- em-pchr.hi \
- \
- ls-ld2h.ko \
- ls-ld2w.ko \
- ls-ld4bh.ko \
- ls-ld4bhu.ko \
- ls-ldb.ko \
- ls-ldbu.ko \
- ls-ldh.ko \
- ls-ldhh.ko \
- ls-ldhu.ko \
- ls-ldw.ko \
- ls-moddec.ko \
- ls-modinc.ko \
- ls-modaddr.ok \
- ls-st2h.hi \
- ls-st2w.hi \
- ls-st4hb.hi \
- ls-stb.hi \
- ls-sth.hi \
- ls-sthh.hi \
- ls-stw.hi \
- \
- br-bra.ok \
- br-bratnz.ok \
- br-bratzr.ok \
- br-bsr.ok \
- br-dbra.ko \
- br-djmp.ko \
- br-djsr.ok \
- \
- os-dbt.ok \
- do-flags.ok \
- do-shifts.ok \
- do-2wordops.ok \
- \
- trap.ok
-
-check: sanity $(TESTS)
-sanity:
- @eval echo AS_FOR_TARGET = $(AS_FOR_TARGET)
- @eval echo LD_FOR_TARGET = $(LD_FOR_TARGET)
- @eval echo RUN_FOR_TARGET = $(RUN_FOR_TARGET)
-
-
-
-# Rules for running all the tests, put into three types
-# exit success, exit fail, print "Hello World"
-
-.u.log:
- uudecode $*.u
- $(RUN_FOR_TARGET) $* > $*.log
-
-
-# Rules for running the tests
-
-.SUFFIXES: .u .ok .run .hi .ko
-.run.ok:
- rm -f tmp-$* $*.hi
- ulimit -t 5 ; $(RUN_FOR_TARGET) $*.run > tmp-$*
- mv tmp-$* $*.ok
-.run.hi:
- rm -f tmp-$* $*.hi diff-$*
- ulimit -t 5 ; $(RUN_FOR_TARGET) $*.run > tmp-$*
- echo "Hello World" | diff - tmp-$* > diff-$*
- cat tmp-$* diff-$* > $*.hi
-.run.ko:
- rm -f tmp-$* $*.ko
- set +e ; \
- ulimit -t 5 ; $(RUN_FOR_TARGET) $*.run > tmp-$* ; \
- if [ $$? -eq 47 ] ; then \
- exit 0 ; \
- else \
- exit 1 ; \
- fi
- mv tmp-$* $*.ko
-
-
-# Rules for building all the tests and packing them into
-# uuencoded files.
-
-uuencode: em-pstr.u em-e0.u em-e47.u em-pchr.u
-
-.SUFFIXES: .u .S .run
-.S.u:
- rm -f $*.o $*.run
- $(AS_FOR_TARGET) $(srcdir)/$*.S -o $*.o
- $(LD_FOR_TARGET) -o $* $*.o
- uuencode < $* $* > $*.u
- rm -f $*.o $*
-.S.run:
- rm -f $*.o $*.run
- $(AS_FOR_TARGET) $(srcdir)/$*.S -o $*.o
- $(LD_FOR_TARGET) -o $*.run $*.o
- rm -f $*.o $*
-
-
-
-#
-# Standard
-#
-clean mostlyclean:
- -rm -f *~ core *.o a.out *.x *.grt
- rm -f $(TESTS)
-# if [ x"${SUBDIRS}" != x ] ; then \
-# for dir in ${SUBDIRS}; \
-# do \
-# echo "$$dir:"; \
-# if [ -d $$dir ]; then \
-# (cd $$dir; $(MAKE) clean); \
-# fi; \
-# done ; \
-# else true; fi
-
-distclean maintainer-clean realclean: clean
- -rm -f *~ core
- -rm -f Makefile config.status *-init.exp
- -rm -fr *.log summary detail *.plog *.sum *.psum site.*
-# if [ x"${SUBDIRS}" != x ] ; then \
-# for dir in ${SUBDIRS}; \
-# do \
-# echo "$$dir:"; \
-# if [ -d $$dir ]; then \
-# (cd $$dir; $(MAKE) distclean); \
-# fi; \
-# done ; \
-# else true; fi
-
-Makefile : Makefile.in config.status
- $(SHELL) config.status
-
-config.status: configure
- $(SHELL) config.status --recheck
diff --git a/sim/testsuite/d30v-elf/br-bra.S b/sim/testsuite/d30v-elf/br-bra.S
deleted file mode 100644
index 7758b82ba78..00000000000
--- a/sim/testsuite/d30v-elf/br-bra.S
+++ /dev/null
@@ -1,12 +0,0 @@
- add r3, r0, dest1
- sub r3, r3, off1
-off1:
- bra r3
-
- .align 4
-dest1:
- bra dest2
-
- .align 5
-dest2:
- .long 0x0e000004, 0x00f00000
diff --git a/sim/testsuite/d30v-elf/br-bratnz.S b/sim/testsuite/d30v-elf/br-bratnz.S
deleted file mode 100644
index cea048a5b4b..00000000000
--- a/sim/testsuite/d30v-elf/br-bratnz.S
+++ /dev/null
@@ -1,12 +0,0 @@
- add r3, r0, dest1
- sub r3, r3, off1
-off1:
- bratnz r3, r3
-
- .align 4
-dest1:
- bratnz r0, dest2
- .long 0x0e000004, 0x00f00000
-
- .align 5
-dest2:
diff --git a/sim/testsuite/d30v-elf/br-bratzr.S b/sim/testsuite/d30v-elf/br-bratzr.S
deleted file mode 100644
index 783336eae85..00000000000
--- a/sim/testsuite/d30v-elf/br-bratzr.S
+++ /dev/null
@@ -1,12 +0,0 @@
- add r3, r0, dest1
- sub r3, r3, off1
-off1:
- bratzr r2, r3
-
- .align 4
-dest1:
- bratzr r3, dest2
- .long 0x0e000004, 0x00f00000
-
- .align 5
-dest2:
diff --git a/sim/testsuite/d30v-elf/br-bsr.S b/sim/testsuite/d30v-elf/br-bsr.S
deleted file mode 100644
index 7629f9765b7..00000000000
--- a/sim/testsuite/d30v-elf/br-bsr.S
+++ /dev/null
@@ -1,12 +0,0 @@
- # verify that the return address is set correctly
- add r2, r0, 1
- add r3, r0, dest1
- sub r3, r3, off1
-off1:
- bsr r3 || nop
-ret1:
-
- .align 5
-dest1:
- sub r2, r62, ret1
- .long 0x0e000004, 0x00f00000
diff --git a/sim/testsuite/d30v-elf/br-dbra.S b/sim/testsuite/d30v-elf/br-dbra.S
deleted file mode 100644
index 887c59fb4ee..00000000000
--- a/sim/testsuite/d30v-elf/br-dbra.S
+++ /dev/null
@@ -1,83 +0,0 @@
-# perform a delayed branch 47 instructions later
- add r3, r0, 47
- srl r3, r3, -3
- dbra r3, dest
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
-
-.align 4
-dest:
- .long 0x0e000004, 0x00f00000
diff --git a/sim/testsuite/d30v-elf/br-djmp.S b/sim/testsuite/d30v-elf/br-djmp.S
deleted file mode 100644
index 01af9967f6a..00000000000
--- a/sim/testsuite/d30v-elf/br-djmp.S
+++ /dev/null
@@ -1,83 +0,0 @@
-# perform a delayed jump 47 instructions later
- add r3, r0, insn47
- djmp r3, dest
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
-insn47: # actually 45
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
-
-.align 4
-dest:
- .long 0x0e000004, 0x00f00000
diff --git a/sim/testsuite/d30v-elf/br-djsr.S b/sim/testsuite/d30v-elf/br-djsr.S
deleted file mode 100644
index 87d47d204b1..00000000000
--- a/sim/testsuite/d30v-elf/br-djsr.S
+++ /dev/null
@@ -1,79 +0,0 @@
- # Test macro
-
- .macro assert reg,value
- cmpeq f0,\reg,\value
- bra/fx fail
- .endm
-
-
- # PR 18230
-
- add r62,r0,0xffffffff || nop
- add r1,r0,24 || nop
- djsr r1,test_end
- add r2,r0,r62
-test_end: nop
-
- assert r2, 0x00000030
- assert r62, 0x00000030
-
-
-# check return address correctly set by a djsr insn
-
- add r3, r0, last
- sub r3, r3, start
-start:
- djsr r3, dest
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
-last:
- add r2, r2, 1 || nop
-nexti:
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
- add r2, r2, 1 || nop
-
-.align 4
-dest:
-
- assert r62,nexti
-
-
-
- # all okay
- bra ok
-
-ok:
- add r2, r0, 0
- .long 0x0e000004
- nop
-
-fail:
- add r2, r0, 47
- .long 0x0e000004
- nop
diff --git a/sim/testsuite/d30v-elf/configure b/sim/testsuite/d30v-elf/configure
deleted file mode 100755
index 94518a0c16b..00000000000
--- a/sim/testsuite/d30v-elf/configure
+++ /dev/null
@@ -1,833 +0,0 @@
-#! /bin/sh
-
-# Guess values for system-dependent variables and create Makefiles.
-# Generated automatically using autoconf version 2.10
-# Copyright (C) 1992, 93, 94, 95, 96 Free Software Foundation, Inc.
-#
-# This configure script is free software; the Free Software Foundation
-# gives unlimited permission to copy, distribute and modify it.
-
-# Defaults:
-ac_help=
-ac_default_prefix=/usr/local
-# Any additions from configure.in:
-
-# Initialize some variables set by options.
-# The variables have the same names as the options, with
-# dashes changed to underlines.
-build=NONE
-cache_file=./config.cache
-exec_prefix=NONE
-host=NONE
-no_create=
-nonopt=NONE
-no_recursion=
-prefix=NONE
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-program_suffix=NONE
-program_transform_name=s,x,x,
-silent=
-site=
-srcdir=
-target=NONE
-verbose=
-x_includes=NONE
-x_libraries=NONE
-bindir='${exec_prefix}/bin'
-sbindir='${exec_prefix}/sbin'
-libexecdir='${exec_prefix}/libexec'
-datadir='${prefix}/share'
-sysconfdir='${prefix}/etc'
-sharedstatedir='${prefix}/com'
-localstatedir='${prefix}/var'
-libdir='${exec_prefix}/lib'
-includedir='${prefix}/include'
-oldincludedir='/usr/include'
-infodir='${prefix}/info'
-mandir='${prefix}/man'
-
-# Initialize some other variables.
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-MFLAGS= MAKEFLAGS=
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-
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-
- case "$ac_option" in
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- ac_prev=bindir ;;
- -bindir=* | --bindir=* | --bindi=* | --bind=* | --bin=* | --bi=*)
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- ac_prev=cache_file ;;
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- cat << EOF
-Usage: configure [options] [host]
-Options: [defaults in brackets after descriptions]
-Configuration:
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- --help print this message
- --no-create do not create output files
- --quiet, --silent do not print \`checking...' messages
- --version print the version of autoconf that created configure
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- --datadir=DIR read-only architecture-independent data in DIR
- [PREFIX/share]
- --sysconfdir=DIR read-only single-machine data in DIR [PREFIX/etc]
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- cat << EOF
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- --host=HOST configure for HOST [guessed]
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-s%@program_transform_name@%$program_transform_name%g
-s%@bindir@%$bindir%g
-s%@sbindir@%$sbindir%g
-s%@libexecdir@%$libexecdir%g
-s%@datadir@%$datadir%g
-s%@sysconfdir@%$sysconfdir%g
-s%@sharedstatedir@%$sharedstatedir%g
-s%@localstatedir@%$localstatedir%g
-s%@libdir@%$libdir%g
-s%@includedir@%$includedir%g
-s%@oldincludedir@%$oldincludedir%g
-s%@infodir@%$infodir%g
-s%@mandir@%$mandir%g
-s%@CC@%$CC%g
-s%@host@%$host%g
-s%@host_alias@%$host_alias%g
-s%@host_cpu@%$host_cpu%g
-s%@host_vendor@%$host_vendor%g
-s%@host_os@%$host_os%g
-s%@target@%$target%g
-s%@target_alias@%$target_alias%g
-s%@target_cpu@%$target_cpu%g
-s%@target_vendor@%$target_vendor%g
-s%@target_os@%$target_os%g
-s%@build@%$build%g
-s%@build_alias@%$build_alias%g
-s%@build_cpu@%$build_cpu%g
-s%@build_vendor@%$build_vendor%g
-s%@build_os@%$build_os%g
-
-CEOF
-EOF
-cat >> $CONFIG_STATUS <<EOF
-
-CONFIG_FILES=\${CONFIG_FILES-"Makefile"}
-EOF
-cat >> $CONFIG_STATUS <<\EOF
-for ac_file in .. $CONFIG_FILES; do if test "x$ac_file" != x..; then
- # Support "outfile[:infile]", defaulting infile="outfile.in".
- case "$ac_file" in
- *:*) ac_file_in=`echo "$ac_file"|sed 's%.*:%%'`
- ac_file=`echo "$ac_file"|sed 's%:.*%%'` ;;
- *) ac_file_in="${ac_file}.in" ;;
- esac
-
- # Adjust relative srcdir, etc. for subdirectories.
-
- # Remove last slash and all that follows it. Not all systems have dirname.
- ac_dir=`echo $ac_file|sed 's%/[^/][^/]*$%%'`
- if test "$ac_dir" != "$ac_file" && test "$ac_dir" != .; then
- # The file is in a subdirectory.
- test ! -d "$ac_dir" && mkdir "$ac_dir"
- ac_dir_suffix="/`echo $ac_dir|sed 's%^\./%%'`"
- # A "../" for each directory in $ac_dir_suffix.
- ac_dots=`echo $ac_dir_suffix|sed 's%/[^/]*%../%g'`
- else
- ac_dir_suffix= ac_dots=
- fi
-
- case "$ac_given_srcdir" in
- .) srcdir=.
- if test -z "$ac_dots"; then top_srcdir=.
- else top_srcdir=`echo $ac_dots|sed 's%/$%%'`; fi ;;
- /*) srcdir="$ac_given_srcdir$ac_dir_suffix"; top_srcdir="$ac_given_srcdir" ;;
- *) # Relative path.
- srcdir="$ac_dots$ac_given_srcdir$ac_dir_suffix"
- top_srcdir="$ac_dots$ac_given_srcdir" ;;
- esac
-
- echo creating "$ac_file"
- rm -f "$ac_file"
- configure_input="Generated automatically from `echo $ac_file_in|sed 's%.*/%%'` by configure."
- case "$ac_file" in
- *Makefile*) ac_comsub="1i\\
-# $configure_input" ;;
- *) ac_comsub= ;;
- esac
- sed -e "$ac_comsub
-s%@configure_input@%$configure_input%g
-s%@srcdir@%$srcdir%g
-s%@top_srcdir@%$top_srcdir%g
-" -f conftest.subs $ac_given_srcdir/$ac_file_in > $ac_file
-fi; done
-rm -f conftest.subs
-
-
-
-exit 0
-EOF
-chmod +x $CONFIG_STATUS
-rm -fr confdefs* $ac_clean_files
-test "$no_create" = yes || ${CONFIG_SHELL-/bin/sh} $CONFIG_STATUS || exit 1
-
diff --git a/sim/testsuite/d30v-elf/configure.in b/sim/testsuite/d30v-elf/configure.in
deleted file mode 100644
index e74389e551e..00000000000
--- a/sim/testsuite/d30v-elf/configure.in
+++ /dev/null
@@ -1,19 +0,0 @@
-dnl Process this file file with autoconf to produce a configure script.
-dnl This file is a shell script fragment that supplies the information
-dnl necessary to tailor a template configure script into the configure
-dnl script appropriate for this directory. For more information, check
-dnl any existing configure script.
-
-AC_PREREQ(2.5)
-dnl FIXME - think of a truly uniq file to this directory
-AC_INIT(Makefile.in)
-
-CC=${CC-cc}
-AC_SUBST(CC)
-AC_CONFIG_AUX_DIR(`cd $srcdir;pwd`/../../..)
-AC_CANONICAL_SYSTEM
-
-AC_SUBST(target_cpu)
-
-
-AC_OUTPUT(Makefile)
diff --git a/sim/testsuite/d30v-elf/do-2wordops.S b/sim/testsuite/d30v-elf/do-2wordops.S
deleted file mode 100644
index 2fa92e62872..00000000000
--- a/sim/testsuite/d30v-elf/do-2wordops.S
+++ /dev/null
@@ -1,80 +0,0 @@
- # Test macro
-
- .macro assert reg,value
- cmpeq f0,\reg,\value
- bra/fx fail
- .endm
-
- .macro nassert reg,value
- cmpne f0,\reg,\value
- bra/fx fail
- .endm
-
-
- # PR 18452 - a.s
-
- add r1, r0, 0
- add r2,r0,0x11223344
- add r3,r0,0x8899aabb
- nop ||mulx2h r0,r2,r3
-
- assert r0, 0x0
- assert r1, 0x0
-
- # test other double-word loads
-
- add r2,r0,data
- ld2w r0,@(r2,0)
- assert r0, 0x0
- assert r1, 0x0
-
- add r2,r0,data
- ld2h r0,@(r2,0)
- assert r0, 0x0
- assert r1, 0x0
-
- add r2,r0,data
- ld4bh r0,@(r2,0)
- assert r0, 0x0
- assert r1, 0x0
-
- add r2,r0,data
- ld4bhu r0,@(r2,0)
- assert r0, 0x0
- assert r1, 0x0
-
-
- # PR 18679 - a.s
-
- ld2h r2, @(r0, b)
- ld2h r4, @(r0, d)
- assert r2, 0x00001111
- assert r3, 0xffff8899
- assert r4, 0x00001111
- assert r5, 0x00002222
-
-
- # all okay
-
- bra ok
-
-ok:
- add r2, r0, 0
- .long 0x0e000004
- nop
-
-fail:
- add r2, r0, 47
- .long 0x0e000004
- nop
-
- # some non-zero data
-data:
- .long 0x12345678
- .long 0x9abcdef0
- .long 0xdeadbeef
-
-b:
- .word 0x11118899, 0x0
-d:
- .word 0x11112222, 0x0
diff --git a/sim/testsuite/d30v-elf/do-flags.S b/sim/testsuite/d30v-elf/do-flags.S
deleted file mode 100644
index f8a15cf16b0..00000000000
--- a/sim/testsuite/d30v-elf/do-flags.S
+++ /dev/null
@@ -1,255 +0,0 @@
- # Test macro
-
- .macro assert reg,value
- cmpeq f0,\reg,\value
- bra/fx fail
- .endm
-
-
- # PR 15964 - a.s
-
- add r8,r0,0x7fff7fff ;
- add r9,r0,0x55555555 ;
- add r12,r0,0x11111111 ;
- add r1,r0,0x80000011 ; for psw
- mvtsys psw,r1 ||nop
- addhhhh r12,r8,r9 ||addhlll r13,r12,r12
- mvfsys r20,psw ||nop
- mvtsys psw,r1 || add r2,r8, r9
- mvfsys r21,psw ||nop
-
- assert r20, 0x80000000
- assert r21, 0x80000014
-
-
- # PR 15964 - b.s
-
- add r40,r0,0x7fffffff
- add r41,r0,0x7fffffff
- add r1,r0,0x80000000 ; for psw
- mvtsys psw,r1,||nop
- cmpeq f1,r40,r41,||cmpeq f0,r40,r41,;
- mvfsys r42,psw
-
- assert r42, 0x80005000
-
-
- # PR 16993 - a.s
-
- add r8,r0,0x80005555 ; for psw
- add r9,r0,0x80000000 ; for psw
- add r40,r0,0x11111111 ;
- add r41,r0,0x22222222 ;
- add r42,r0,0x00000000 ;
- mvtsys psw,r8 ||nop
- mvtsys psw,r9 ||add r42,r40,r41,;
-
- mvfsys r10,psw
- assert r10, 0x80000000
-
-
- # PR 16995 - b.s
-
- add r8,r0,0x80000000 ; for psw
- add r9,r0,0x80005555 ; for psw
- add r10,r0,0x00000000 ;
- add r40,r0,0x11111111 ;
- add r41,r0,0x22222222 ;
- add r42,r0,0x00000000 ;
- mvtsys psw,r8 ||nop
- mvtsys psw,r9 ||add r42,r40,r41,;
-
- mvfsys r10,psw
- assert r10, 0x80005544
-
-
- # PR 17006 - c.s
-
- add r8,r0,0x80005555 ; for psw
- add r9,r0,0x80000000 ; for psw
- add r10,r0,0x00000000 ;
- add r40,r0,0x00000011 ;
- add r41,r0,0x00000011 ;
- mvtsys psw,r8 ||nop
- mvtsys psw,r9 ||cmpeq f5,r40,r41,;
-
- mvfsys r10,psw
- assert r10, 0x80000010
-
-
- # PR 17006 - d.s
-
- add r9,r0,0x80000000 ; for psw
- add r40,r0,0x00000011 ;
- add r41,r0,0x00000011 ;
- nop ||nop
- mvtsys psw, r9 || nop
- nop ||nop
- nop ||cmpeq f5,r40,r41,;
-
- mvfsys r10,psw
- assert r10, 0x80000010
-
-
- # PR 17106 - a.s
-
- ; test 000 ; mvtsys(s=0) || sathl(s=0) prallel execution test
- add r8,r0,0x80005555 ; for psw
- add r9,r0,0x80000000 ; for psw
- add r40,r0,0x00000044 ;
- add r41,r0,0x00000008 ;
- mvtsys psw,r8 ||nop
- mvtsys psw,r9 ||sathl r30,r40,r41,;
- mvfsys r20, psw ||nop
- ;-------------------------------
- ; test 001 ; mvtsys(s=0) || sathl(s=1) prallel execution test
- _test_001:
- add r40,r0,0x00004444 ;
- add r41,r0,0x00000008 ;
- mvtsys psw,r8 ||nop
- mvtsys psw,r9 ||sathl r31,r40,r41,;
- mvfsys r21,psw ||nop
- ;-------------------------------
- ; test 002 ; mvtsys(s=1) || sathl(s=0) prallel execution test
- add r8,r0,0x80000000 ; for psw
- add r9,r0,0x80005555 ; for psw
- add r40,r0,0x00000044 ;
- add r41,r0,0x00000008 ;
- mvtsys psw,r8 ||nop
- mvtsys psw,r9 ||sathl r32,r40,r41,;
- mvfsys r22,psw ||nop
- ;-------------------------------
- ; test 003 ; mvtsys(s=1) || sathl(s=1) prallel execution test
- ; init-reg
- add r40,r0,0x00004444 ;
- add r41,r0,0x00000008 ;
- mvtsys psw,r8 ||nop
- mvtsys psw,r9 ||sathl r33,r40,r41,;
- mvfsys r23,psw ||nop
-
- assert r20, 0x80000000
- assert r21, 0x80000040
- assert r22, 0x80005555
- assert r23, 0x80005515
-
-
- # PR 18288 - a.s
-
- ;------------------------------------------------------------------------
- ; mvtsys (C =1, V= VA = 0) || addc (C= V= VA =0)
- ;------------------------------------------------------------------------
- test_000b:
- add r1,r0,1 ||nop ; set C bit
- mvtsys psw r0 ||nop
- mvtsys psw r1 ||addc r20,r0,1
- mvfsys r10,psw ||nop
- ; C changed in MU is not used in IU.
- ; IU prevail for resulting C.
- ;------------------------------------------------------------------------
- ; mvtsys (V =1, C = VA = 0) || add (C= V= VA =0)
- ;------------------------------------------------------------------------
- test_001b:
- add r1,r0,0x10 ||nop ; set V bit
- mvtsys psw r0 ||nop
- mvtsys psw r1 ||add r0,r0,r0
- mvfsys r11,psw ||nop
- ; IU prevail for resulting V.
- ;------------------------------------------------------------------------
- ; mvtsys (V = C= VA = 0) || add (C=0,V= VA =1)
- ;------------------------------------------------------------------------
- test_002b:
- add r1,r0,0x70000000
- add r2,r0,0x30000000
- mvtsys psw r0 ||nop
- mvtsys psw r0 ||add r0,r1,r2
- mvfsys r12,psw ||nop
- ; IU prevail for resulting V.
- ; VA is set(OR'ed)
- ;------------------------------------------------------------------------
- ; mvtsys (C= 0 V = VA = 1) || add (C= V= VA =0)
- ;------------------------------------------------------------------------
- test_003b:
- add r1,r0,0x14 ||nop ; set V and VA bit
- mvtsys psw r0 ||nop
- mvtsys psw r1 ||add r0,r0,r0
- mvfsys r13,psw ||nop
- ; IU prevail for resulging V
- ; VA is set(OR'ed)
- ;------------------------------------------------------------------------
- ; mvtsys (f3 =1) || orfg (f3) : GROUP_B
- ;------------------------------------------------------------------------
- test_004b:
- add r1,r0,0x100 ; set f3
- mvtsys psw r0 ||nop
- mvtsys psw,r1 ||orfg f3,f3,0
- mvfsys r14,psw ||nop
- ; results of IU prevail.
- ;------------------------------------------------------------------------
- ; mvtsys (f4 =1) || sathp
- ;------------------------------------------------------------------------
- test_005b:
- add r1,r0,0x40 ; set f4
- mvtsys psw r0 ||nop
- mvtsys psw r1 ||sathl r2,r1,3
- mvfsys r15,psw ||nop
- ; results of MU is used in IU
-
- assert r20, 0x1
- assert r10, 0x0
- assert r11, 0x0
- assert r12, 0x14
- assert r13, 0x4
- assert r14, 0x0
- assert r15, 0x0
-
-
- # PR 18288 - b.s
- add r7,r0,0x80000000
- mvtsys psw,r7 || nop
-
- add r8,r0,0x7fff7fff ;
- add r9,r0,0x55555555 ;
- add r12,r0,0x11111111 ;
- add r13,r0,0x00000000 ;
- addhhhh r12,r8,r9 ||addhlll r13,r12,r12
- mvfsys r60,psw ||nop
- ;------------------------------------------
- add r20,r0,0x66666666 ;
- add r21,r0,0x77777777 ;
- add r40,r0,0x22222222 ;
- add r41,r0,0x55555555 ;
- add r22,r20,r21 ||add r42,r40,r41,;
- mvfsys r61,psw ||nop
-
- assert r60, 0x80000000
- assert r61, 0x80000000
-
-
- # PR 19224
-
- add r7,r0,0x80000000
- add r2,r0,r0 || nop
- add r1,r0,0x1 || nop
- # confirm that these insns do not kill the add in the right container
- mvtsys psw,r7 -> add r2,r2,r1
- mvtsys pswh,r7 -> add r2,r2,r1
- mvtsys pswl,r7 -> add r2,r2,r1
- mvtsys f0,r7 -> add r2,r2,r1
- mvtsys mod_s,r7 -> add r2,r2,r1
-
- assert r2, 0x5
-
-
- # all okay
-
- bra ok
-
-ok:
- add r2, r0, 0
- .long 0x0e000004
- nop
-
-fail:
- add r2, r0, 47
- .long 0x0e000004
- nop
diff --git a/sim/testsuite/d30v-elf/do-shifts.S b/sim/testsuite/d30v-elf/do-shifts.S
deleted file mode 100644
index 1f0129f5211..00000000000
--- a/sim/testsuite/d30v-elf/do-shifts.S
+++ /dev/null
@@ -1,182 +0,0 @@
- # Test macro
-
- .macro assert reg,value
- cmpeq f0,\reg,\value
- bra/fx fail
- .endm
-
-
- # PR 14580 - a.s
-
- add r8,r0,0x11112222
- add r9,r0,-32
- sra r1,r8,r9 ||nop
- sra r2,r8,-32 ||nop
- srl r3,r8,r9 ||nop
- srl r4,r8,-32 ||nop
-
- assert r1, 0
- assert r2, 0
- assert r3, 0
- assert r4, 0
-
-
- # PR 17266 - a.s
-
- add r20, r0, 0xffffffff
- add r21, r0, 0xffffffff
- add r22, r0, 0xffffffff
- add r23, r0, 0xffffffff
- add r1, r0, 0x12345678
- add r2, r0, -33
- srahh r20, r1, r2
- srahl r21, r1, r2
- srlhh r22, r1, r2
- srlhl r23, r1, r2
- sra r24, r1, r2
- srl r25, r1, r2
- rot r26, r1, r2
-
- assert r20, 0xacf0ffff
- assert r21, 0xffffacf0
- assert r22, 0xacf0ffff
- assert r23, 0xffffacf0
- assert r24, 0x2468acf0
- assert r25, 0x2468acf0
- assert r26, 0x2468acf0
-
-
- # PR 17266 - a2.s
-
- add r20, r0, 0xffffffff
- add r21, r0, 0xffffffff
- add r22, r0, 0xffffffff
- add r23, r0, 0xffffffff
- add r1, r0, 0x12345678
- add r2, r0, -17
- sra2h r20, r1, r2
- srl2h r21, r1, r2
- rot2h r22, r1, r2
-
- assert r20, 0x2468acf0
- assert r21, 0x2468acf0
- assert r22, 0x2468acf0
-
-
- # PR 17685 - a.s
-
- add r20,r0,r0
- add r21,r0,r0
- add r22,r0,r0
- add r23,r0,r0
- add r24,r0,r0
- add r25,r0,r0
- add r30,r0,r0
- add r31,r0,r0
-
- add r8,r0,0x55555555
- add r9,r0,0x1f
- sra r20,r8,r9 ||nop
- srl r21,r8,r9 ||nop
- srahh r22,r8,r9 ||nop
- srahl r23,r8,r9 ||nop
- srlhh r24,r8,r9 ||nop
- srlhl r25,r8,r9 ||nop
-
- add r8,r0,0x5555aaaa
- add r9,r0,0x000ffff1
- sra2h r30,r8,r9 ||nop
- srl2h r31,r8,r9 ||nop
-
- assert r20, 0
- assert r21, 0
- assert r22, 0
- assert r23, 0
- assert r24, 0
- assert r25, 0
- assert r30, 0
- assert r31, 0
-
-
- # PR 18196 - a.s
-
- add r1,r0,0xfedcba98
- add r2,r0,0x76543210
- add r3,r0,0x41
- add r4,r0,1
- nop || mvtacc a0 r1,r2
- nop || mvfacc r10,a0 r3
- nop || mvfacc r11,a0 r4
-
- assert r10, 0x3b2a1908
- assert r11, 0x3b2a1908
-
-
- # PR 18329 - a.s
-
- add r10,r0,0 || add r2,r0,-1
- add r11,r0,0 || add r12,r0,0
- add r13,r0,0 || add r14,r0,0
- add r15,r0,0 || add r16,r0,0
- add r17,r0,0 || add r18,r0,0
-
- add r3,r0,0x00000020 ; 32
- src r10,r2,r3
- add r3,r0,0x00000021 ; 33
- src r11,r2,r3
- add r3,r0,0x0000003f ; 63
- src r12,r2,r3
- add r3,r0,0x00000040 ;64
- src r13,r2,r3
- add r3,r0,0x00000041 ;65
- src r14,r2,r3
-
- add r3,r0,0xffffffdf ;-33
- src r15,r2,r3
- add r3,r0,0xffffffc1 ;-63
- src r16,r2,r3
- add r3,r0,0xffffffc0 ;-64
- src r17,r2,r3
- add r3,r0,0xffffffbf ;-65
- src r18,r2,r3
-
- assert r10, 0x00000000
- assert r11, 0x80000000
- assert r12, 0xfffffffe
- assert r13, 0x00000000
- assert r14, 0x80000000
- assert r15, 0x00000001
- assert r16, 0x7fffffff
- assert r17, 0xffffffff
- assert r18, 0x00000001
-
-
- # PR 18364 - b.s
-
- add r1,r0,0x12345678
- add r2,r0,0x9abcdef0
- add r3,r0,0xffffffe0 ; -32
- add r4,r0,0xffffffc0 ; -64
- src r1,r2,r3 ||nop
- add r10,r1,r0 ||nop
- add r1,r0,0x12345678
- src r1,r2,r4 ||nop
- add r11,r1,r0 ||nop
-
- assert r10, 0x9abcdef0
- assert r11, 0x9abcdef0
-
-
- # all okay
-
- bra ok
-
-ok:
- add r2, r0, 0
- .long 0x0e000004
- nop
-
-fail:
- add r2, r0, 47
- .long 0x0e000004
- nop
diff --git a/sim/testsuite/d30v-elf/em-e0.S b/sim/testsuite/d30v-elf/em-e0.S
deleted file mode 100644
index d2e9335d5cc..00000000000
--- a/sim/testsuite/d30v-elf/em-e0.S
+++ /dev/null
@@ -1,4 +0,0 @@
-# Verify that the exit call works
- add r2, r0, 0 || nop
- .long 0x0e000004
- nop
diff --git a/sim/testsuite/d30v-elf/em-e47.S b/sim/testsuite/d30v-elf/em-e47.S
deleted file mode 100644
index 9830ffb0cda..00000000000
--- a/sim/testsuite/d30v-elf/em-e47.S
+++ /dev/null
@@ -1,4 +0,0 @@
-# Verify r2 = 47; exit(r47) works
- add r2, r0, 47
- .long 0x0e000004
- nop
diff --git a/sim/testsuite/d30v-elf/em-pchr.S b/sim/testsuite/d30v-elf/em-pchr.S
deleted file mode 100644
index 6b38b0b7260..00000000000
--- a/sim/testsuite/d30v-elf/em-pchr.S
+++ /dev/null
@@ -1,28 +0,0 @@
-
- add r2, r0, 'H'
- .long 0x0e000003, 0x00f00000
- add r2, r0, 'e'
- .long 0x0e000003, 0x00f00000
- add r2, r0, 'l'
- .long 0x0e000003, 0x00f00000
- add r2, r0, 'l'
- .long 0x0e000003, 0x00f00000
- add r2, r0, 'o'
- .long 0x0e000003, 0x00f00000
- add r2, r0, ' '
- .long 0x0e000003, 0x00f00000
- add r2, r0, 'W'
- .long 0x0e000003, 0x00f00000
- add r2, r0, 'o'
- .long 0x0e000003, 0x00f00000
- add r2, r0, 'r'
- .long 0x0e000003, 0x00f00000
- add r2, r0, 'l'
- .long 0x0e000003, 0x00f00000
- add r2, r0, 'd'
- .long 0x0e000003, 0x00f00000
- add r2, r0, '\n' || nop
- .long 0x0e000003, 0x00f00000
- # finished
- add r2, r0, r0 || nop
- .long 0x0e000004, 0x00f00000
diff --git a/sim/testsuite/d30v-elf/em-pstr.S b/sim/testsuite/d30v-elf/em-pstr.S
deleted file mode 100644
index 4612c35c8f1..00000000000
--- a/sim/testsuite/d30v-elf/em-pstr.S
+++ /dev/null
@@ -1,8 +0,0 @@
- add r2, r0, hello
- # putstr
- .long 0x0e000001, 0x00f00000
- # finished
- add r2, r0, r0 || nop
- .long 0x0e000004, 0x00f00000
-
-hello: .ascii "Hello World\n"
diff --git a/sim/testsuite/d30v-elf/exit47.s b/sim/testsuite/d30v-elf/exit47.s
deleted file mode 100644
index 9830ffb0cda..00000000000
--- a/sim/testsuite/d30v-elf/exit47.s
+++ /dev/null
@@ -1,4 +0,0 @@
-# Verify r2 = 47; exit(r47) works
- add r2, r0, 47
- .long 0x0e000004
- nop
diff --git a/sim/testsuite/d30v-elf/hello.s b/sim/testsuite/d30v-elf/hello.s
deleted file mode 100644
index 261629e27c3..00000000000
--- a/sim/testsuite/d30v-elf/hello.s
+++ /dev/null
@@ -1,9 +0,0 @@
-
- add r2, r0, hello
- # putstr
- .long 0x0e000001, 0x00f00000
- # finished
- add r2, r0, r0 || nop
- .long 0x0e000004, 0x00f00000
-
-hello: .ascii "Hello World\r\n"
diff --git a/sim/testsuite/d30v-elf/loop.s b/sim/testsuite/d30v-elf/loop.s
deleted file mode 100644
index 69f2692a26e..00000000000
--- a/sim/testsuite/d30v-elf/loop.s
+++ /dev/null
@@ -1 +0,0 @@
-loop: bra loop
diff --git a/sim/testsuite/d30v-elf/ls-ld2h.S b/sim/testsuite/d30v-elf/ls-ld2h.S
deleted file mode 100644
index fade14ebbe6..00000000000
--- a/sim/testsuite/d30v-elf/ls-ld2h.S
+++ /dev/null
@@ -1,11 +0,0 @@
- # compute 17(mem) + 30(mem+2) = 47
- add r3, r0, 4 || nop
- ld2h r2, @(r3,60)
- add r2, r2, r3 || nop
- .long 0x0e000004, 0x00f00000
- .long 0, 0
- .long 0, 0
- .long 0, 0
- .long -1, -1
-# address 64 - remember target is BE
- .byte 0, 17, 0, 30
diff --git a/sim/testsuite/d30v-elf/ls-ld2w.S b/sim/testsuite/d30v-elf/ls-ld2w.S
deleted file mode 100644
index 5b564ccc424..00000000000
--- a/sim/testsuite/d30v-elf/ls-ld2w.S
+++ /dev/null
@@ -1,12 +0,0 @@
- # compute 17(mem) + 30(mem+4) = 47
- add r3, r0, 4 || nop
- ld2w r2, @(r3,60)
- add r2, r2, r3 || nop
- .long 0x0e000004, 0x00f00000
- .long 0, 0
- .long 0, 0
- .long 0, 0
- .long -1, -1
-# address 64 - remember target is BE
- .byte 0, 0, 0, 17
- .byte 0, 0, 0, 30
diff --git a/sim/testsuite/d30v-elf/ls-ld4bh.S b/sim/testsuite/d30v-elf/ls-ld4bh.S
deleted file mode 100644
index 6f22cebb682..00000000000
--- a/sim/testsuite/d30v-elf/ls-ld4bh.S
+++ /dev/null
@@ -1,12 +0,0 @@
- # compute lo : 17(mem+1) + 30(mem+3) = 47
- # compute hi : -1(mem) + 1(mem+2) = 0
- add r3, r0, 4 || nop
- ld4bh r2, @(r3,60)
- add r2, r2, r3 || nop
- .long 0x0e000004, 0x00f00000
- .long 0, 0
- .long 0, 0
- .long 0, 0
- .long -1, -1
-# address 64 - remember target is BE
- .byte -1, 17, 1, 30
diff --git a/sim/testsuite/d30v-elf/ls-ld4bhu.S b/sim/testsuite/d30v-elf/ls-ld4bhu.S
deleted file mode 100644
index 4d0a9a37eb2..00000000000
--- a/sim/testsuite/d30v-elf/ls-ld4bhu.S
+++ /dev/null
@@ -1,11 +0,0 @@
- # compute lo : 48(mem+1) + 255(mem+3) - 256 = 47
- add r3, r0, 4 || nop
- ld4bhu r2, @(r3,60)
- add r2, r2, r3 || nop
- sub r2, r2, 0x100
- .long 0x0e000004, 0x00f00000
- .long 0, 0
- .long 0, 0
- .long -1, -1
-# address 64 - remember target is BE
- .byte 0, 48, 0, 255
diff --git a/sim/testsuite/d30v-elf/ls-ldb.S b/sim/testsuite/d30v-elf/ls-ldb.S
deleted file mode 100644
index c6164ce6183..00000000000
--- a/sim/testsuite/d30v-elf/ls-ldb.S
+++ /dev/null
@@ -1,11 +0,0 @@
- # compute -2(from mem) + 49 = 47
- add r3, r0, 4 || nop
- ldb r2, @(r3,60)
- add r2, r2, 49
- .long 0x0e000004, 0x00f00000
- .long 0, 0
- .long 0, 0
- .long 0, 0
- .long -1, -1
-# address 64 - remember target is BE
- .byte -2, 0xff, 0xff, 0xff
diff --git a/sim/testsuite/d30v-elf/ls-ldbu.S b/sim/testsuite/d30v-elf/ls-ldbu.S
deleted file mode 100644
index 153d6a4d3de..00000000000
--- a/sim/testsuite/d30v-elf/ls-ldbu.S
+++ /dev/null
@@ -1,11 +0,0 @@
- # compute 254(mem) - 207 = 47
- add r3, r0, 4 || nop
- ldbu r2, @(r3,60)
- sub r2, r2, 207
- .long 0x0e000004, 0x00f00000
- .long 0, 0
- .long 0, 0
- .long 0, 0
- .long -1, -1
-# address 64 - remember target is BE
- .byte -2, 0xff, 0xff, 0xff
diff --git a/sim/testsuite/d30v-elf/ls-ldh.S b/sim/testsuite/d30v-elf/ls-ldh.S
deleted file mode 100644
index 0650bc05670..00000000000
--- a/sim/testsuite/d30v-elf/ls-ldh.S
+++ /dev/null
@@ -1,11 +0,0 @@
- # load the 47@addr=60 below into r2
- add r3, r0, 4 || nop
- ldh r2, @(r3,60)
- .long 0x0e000004, 0x00f00000
- .long 0, 0
- .long 0, 0
- .long 0, 0
- .long 0, 0
- .long -1, -1
-# address 64 - remember target is BE
- .byte 0, 47, 0xff, 0xff
diff --git a/sim/testsuite/d30v-elf/ls-ldhh.S b/sim/testsuite/d30v-elf/ls-ldhh.S
deleted file mode 100644
index 146daefa75d..00000000000
--- a/sim/testsuite/d30v-elf/ls-ldhh.S
+++ /dev/null
@@ -1,11 +0,0 @@
- # compute (47 || 0|16) >> 16
- add r3, r0, 4 || nop
- ldhh r2, @(r3,60)
- srl r2, r2, 16 || nop
- .long 0x0e000004, 0x00f00000
- .long 0, 0
- .long 0, 0
- .long 0, 0
- .long -1, -1
-# address 64 - remember target is BE
- .byte 0, 47, 0xff, 0xff
diff --git a/sim/testsuite/d30v-elf/ls-ldhu.S b/sim/testsuite/d30v-elf/ls-ldhu.S
deleted file mode 100644
index b4f50e2355a..00000000000
--- a/sim/testsuite/d30v-elf/ls-ldhu.S
+++ /dev/null
@@ -1,11 +0,0 @@
- # compute 254(mem) - 207 = 47
- add r3, r0, 4 || nop
- ldhu r2, @(r3,60)
- sub r2, r2, 207
- .long 0x0e000004, 0x00f00000
- .long 0, 0
- .long 0, 0
- .long 0, 0
- .long -1, -1
-# address 64 - remember target is BE
- .byte 0xff, -2, 0xff, 0xff
diff --git a/sim/testsuite/d30v-elf/ls-ldw.S b/sim/testsuite/d30v-elf/ls-ldw.S
deleted file mode 100644
index 78d2ebfdaab..00000000000
--- a/sim/testsuite/d30v-elf/ls-ldw.S
+++ /dev/null
@@ -1,11 +0,0 @@
- # load the 47@addr=60 below into r2
- add r3, r0, 4 || nop
- ldw r2, @(r3,60)
- .long 0x0e000004, 0x00f00000
- .long 0, 0
- .long 0, 0
- .long 0, 0
- .long 0, 0
- .long 0, 0
-# address 64 - remember target is BE
- .byte 0, 0, 0, 47
diff --git a/sim/testsuite/d30v-elf/ls-modaddr.S b/sim/testsuite/d30v-elf/ls-modaddr.S
deleted file mode 100644
index 30d28ab00b0..00000000000
--- a/sim/testsuite/d30v-elf/ls-modaddr.S
+++ /dev/null
@@ -1,56 +0,0 @@
- ; Modular address postincrement/postdecrement test
-
-start:
- ; program PSW for modular address mode
- add r1,r0,0x81000000
- nop || nop
- mvtsys psw,r1 || nop
- nop || nop
-
-test1:
- ; set modular address limits: 0x18 bytes
- add r1,r0,0x20000070 ; [start, ...
- nop || nop
- mvtsys mod_s,r1 || nop
- nop || nop
- add r1,r0,0x20000088 ; ..., end)
- nop || nop
- mvtsys mod_e,r1 || nop
-
- ; modular autoincrement test
- add r30,r0,0x20000070 ; base address = mod_s
- ld2w r40,@(r30+,r0) || nop ; after: r30 = ...078
- ld2w r40,@(r30+,r0) || nop ; after: r30 = ...080
- ld2w r40,@(r30+,r0) || nop ; after: r30 = ...070
-
- add r29,r0,0x20000070 ; expected end address; wrapping around
- cmpeq f1,r30,r29
- bra/xf fail
-
-test2:
- ; set modular address limits: 0x18 bytes
- add r1,r0,0x20000088 ; [start, ...
- nop || nop
- mvtsys mod_s,r1 || nop
- nop || nop
- add r1,r0,0x20000070 ; ..., end)
- nop || nop
- mvtsys mod_e,r1 || nop
-
- ; modular autodecrement test
- add r30,r0,0x20000088 ; base address = mod_s
- ld2w r40,@(r30-,r0) || nop ; after: r30 = ...080
- ld2w r40,@(r30-,r0) || nop ; after: r30 = ...078
- ld2w r40,@(r30-,r0) || nop ; after: r30 = ...088
-
- add r29,r0,0x20000088 ; expected end address; wrapping around
- cmpeq f1,r30,r29
- bra/xf fail
-
-ok:
- add r2,r0,0
- .long 0x0e000004, 0x00f00000
-
-fail:
- add r2,r0,47
- .long 0x0e000004, 0x00f00000
diff --git a/sim/testsuite/d30v-elf/ls-moddec.S b/sim/testsuite/d30v-elf/ls-moddec.S
deleted file mode 100644
index f1b91439ec4..00000000000
--- a/sim/testsuite/d30v-elf/ls-moddec.S
+++ /dev/null
@@ -1,3 +0,0 @@
- add r2, r0, 50
- moddec r2, 3 || nop
- .long 0x0e000004, 0x00f00000
diff --git a/sim/testsuite/d30v-elf/ls-modinc.S b/sim/testsuite/d30v-elf/ls-modinc.S
deleted file mode 100644
index 520c3f60de8..00000000000
--- a/sim/testsuite/d30v-elf/ls-modinc.S
+++ /dev/null
@@ -1,3 +0,0 @@
- add r2, r0, 40
- modinc r2, 7 || nop
- .long 0x0e000004, 0x00f00000
diff --git a/sim/testsuite/d30v-elf/ls-st2h.S b/sim/testsuite/d30v-elf/ls-st2h.S
deleted file mode 100644
index d8c4b19adec..00000000000
--- a/sim/testsuite/d30v-elf/ls-st2h.S
+++ /dev/null
@@ -1,13 +0,0 @@
- add r2, r0, hello
- add r4, r0, ('H' << 8) + 'e'
- add r5, r0, ('l' << 8) + 'l'
- st2h r4, @(r2,0) || nop
- # putstr
- .long 0x0e000001, 0x00f00000
- # finished
- add r2, r0, r0 || nop
- .long 0x0e000004, 0x00f00000
-
- .align 3
-hello:
- .ascii "????o World\n"
diff --git a/sim/testsuite/d30v-elf/ls-st2w.S b/sim/testsuite/d30v-elf/ls-st2w.S
deleted file mode 100644
index 0cd8b660072..00000000000
--- a/sim/testsuite/d30v-elf/ls-st2w.S
+++ /dev/null
@@ -1,13 +0,0 @@
- add r2, r0, hello
- add r4, r0, ('H' << 24) + ('e' << 16) + ('l' << 8) + ('l' << 0)
- add r5, r0, ('o' << 24) + (' ' << 16) + ('W' << 8) + ('o' << 0)
- st2w r4, @(r2,0) || nop
- # putstr
- .long 0x0e000001, 0x00f00000
- # finished
- add r2, r0, r0 || nop
- .long 0x0e000004, 0x00f00000
-
- .align 3
-hello:
- .ascii "????....rld\n"
diff --git a/sim/testsuite/d30v-elf/ls-st4hb.S b/sim/testsuite/d30v-elf/ls-st4hb.S
deleted file mode 100644
index bf802252ef0..00000000000
--- a/sim/testsuite/d30v-elf/ls-st4hb.S
+++ /dev/null
@@ -1,13 +0,0 @@
- add r2, r0, hello
- add r4, r0, ('H' << 16) + ('e' << 0)
- add r5, r0, ('l' << 16) + ('l' << 0)
- st4hb r4, @(r2,0) || nop
- # putstr
- .long 0x0e000001, 0x00f00000
- # finished
- add r2, r0, r0 || nop
- .long 0x0e000004, 0x00f00000
-
- .align 3
-hello:
- .ascii "????o World\n"
diff --git a/sim/testsuite/d30v-elf/ls-stb.S b/sim/testsuite/d30v-elf/ls-stb.S
deleted file mode 100644
index 720a85b2dcc..00000000000
--- a/sim/testsuite/d30v-elf/ls-stb.S
+++ /dev/null
@@ -1,12 +0,0 @@
- add r2, r0, hello
- add r4, r0, 'H'
- stb r4, @(r2,0) || nop
- # putstr
- .long 0x0e000001, 0x00f00000
- # finished
- add r2, r0, r0 || nop
- .long 0x0e000004, 0x00f00000
-
- .align 3
-hello:
- .ascii "?ello World\n"
diff --git a/sim/testsuite/d30v-elf/ls-sth.S b/sim/testsuite/d30v-elf/ls-sth.S
deleted file mode 100644
index ff236407bce..00000000000
--- a/sim/testsuite/d30v-elf/ls-sth.S
+++ /dev/null
@@ -1,12 +0,0 @@
- add r2, r0, hello
- add r4, r0, ('H' << 8) + ('e' << 0)
- sth r4, @(r2,0) || nop
- # putstr
- .long 0x0e000001, 0x00f00000
- # finished
- add r2, r0, r0 || nop
- .long 0x0e000004, 0x00f00000
-
- .align 3
-hello:
- .ascii "??llo World\n"
diff --git a/sim/testsuite/d30v-elf/ls-sthh.S b/sim/testsuite/d30v-elf/ls-sthh.S
deleted file mode 100644
index 071f30960a6..00000000000
--- a/sim/testsuite/d30v-elf/ls-sthh.S
+++ /dev/null
@@ -1,12 +0,0 @@
- add r2, r0, hello
- add r4, r0, ('H' << 24) + ('e' << 16)
- sthh r4, @(r2,0) || nop
- # putstr
- .long 0x0e000001, 0x00f00000
- # finished
- add r2, r0, r0 || nop
- .long 0x0e000004, 0x00f00000
-
- .align 3
-hello:
- .ascii "??llo World\n"
diff --git a/sim/testsuite/d30v-elf/ls-stw.S b/sim/testsuite/d30v-elf/ls-stw.S
deleted file mode 100644
index ac17f2a50ac..00000000000
--- a/sim/testsuite/d30v-elf/ls-stw.S
+++ /dev/null
@@ -1,12 +0,0 @@
- add r2, r0, hello
- add r4, r0, ('H' << 24) + ('e' << 16) + ('l' << 8) + ('l' << 0)
- stw r4, @(r2,0) || nop
- # putstr
- .long 0x0e000001, 0x00f00000
- # finished
- add r2, r0, r0 || nop
- .long 0x0e000004, 0x00f00000
-
- .align 3
-hello:
- .ascii "????o World\n"
diff --git a/sim/testsuite/d30v-elf/os-dbt.S b/sim/testsuite/d30v-elf/os-dbt.S
deleted file mode 100644
index 34688674c9d..00000000000
--- a/sim/testsuite/d30v-elf/os-dbt.S
+++ /dev/null
@@ -1,38 +0,0 @@
- .globl _start
- #
- # NOTE: Registers r10-r11 are reserved for the interrupt handler
- # while the others can be used by the main loop/start code.
-
-_start:
- # patch the DBT handler
- add r1, r0, handler
- ldw r2, @(r1, 0)
- ldw r3, @(r1, 4)
- # DBT vector address
- add r1, r0, 0xfffff120
- stw r2, @(r1, 0)
- stw r3, @(r1, 4)
-
- # try out the breakpoint/return
- add r2, r0, 47
- #dbt
- nop
- .long 0x00b00000
- nop
-
- # exit with what ever the breakpoint hander set r2 to.
- nop
- .long 0x0e000004
- nop
-
-handler:
- jmp real_handler
-
- # The Breakpoint handler sets r2 to 0 if PSW was set correctly.
-real_handler:
- mvfsys r2, cr0
- sub r2, r0, 0x08000000
- #rtd
- nop
- .long 0x00a00000
- nop
diff --git a/sim/testsuite/d30v-elf/tick.s b/sim/testsuite/d30v-elf/tick.s
deleted file mode 100644
index d834ca7af9b..00000000000
--- a/sim/testsuite/d30v-elf/tick.s
+++ /dev/null
@@ -1,51 +0,0 @@
- .globl _start
- #
- # NOTE: Registers r10-r11 are reserved for the interrupt handler
- # while the others can be used by the main loop/start code.
-
-_start:
- # patch the external interrupt handlers entry
- add r1, r0, handler
- ldw r2, @(r1, 0)
- ldw r3, @(r1, 4)
- add r1, r0, 0xfffff138
- stw r2, @(r1, 0)
- stw r3, @(r1, 4)
-
- # enable external interrupts - cr0 == PSW
- mvfsys r2, cr0
- or r2, r0, 0x04000000
- mvtsys cr0, r2
-
-
- # wait for flag to be set
-loop:
- add r2, r0, flag
- ldw r3, @(r2, 0)
- bratzr r3, loop
-
- # clear the flag
- stw r0, @(r2, 0)
-
- add r2, r0, tick
- # putstr
- .long 0x0e000001, 0x00f00000
-
- bra loop
-
- # finished
- add r2, r0, r0 || nop
- .long 0x0e000004, 0x00f00000
-
-
-handler:
- jmp real_handler
-real_handler:
- add r10, r0, 1
- add r11, r0, flag
- stb r10, @(r11,0)
- reit
-
-
-flag: .long 0
-tick: .ascii "Tick\r\n"
diff --git a/sim/testsuite/d30v-elf/trap.S b/sim/testsuite/d30v-elf/trap.S
deleted file mode 100644
index 08399f9d21a..00000000000
--- a/sim/testsuite/d30v-elf/trap.S
+++ /dev/null
@@ -1,35 +0,0 @@
-# verify that trap || cmp works
- add r8,r0,0x11223344 ;
- add r9,r0,0x11223344 ;
-
- mvtsys bpsw,r0 || nop
- mvtsys bpc,r0 || nop
-
- add r1,r0,0x97000555 ; for psw
- mvtsys psw,r1 || nop
- trap 0 || cmpeq f0,r8,r9,;
-
- .long 0x0e000004, 0x00f00000
-
- .section .eit_v, "a"
- nop || nop
- nop || nop
- nop || nop
- nop || nop
-
-# save the old bpsw, psw
- mvfsys r4,bpsw || nop
- mvfsys r5,psw || nop
-
-# load up what they should be
- add r6,r0,0x97004555
- add r7,r0,0x90000000
-
-# verify that they have the right values
-# return exit value in r2 -- 0 success, 47 failure
- add r2,r0,47
- cmpeq f0,r4,r6 || nop
- cmpeq f1,r5,r7 || nop
- add/tt r2,r0,r0 || nop
-
- reit
diff --git a/sim/testsuite/fr30-elf/ChangeLog b/sim/testsuite/fr30-elf/ChangeLog
deleted file mode 100644
index 7b2d0e4e88b..00000000000
--- a/sim/testsuite/fr30-elf/ChangeLog
+++ /dev/null
@@ -1,8 +0,0 @@
-Thu Nov 26 11:34:46 1998 Dave Brolley <brolley@cygnus.com>
-
- * loop.s (_start): Removed direct address hack.
-
-Mon Nov 23 17:02:47 1998 Dave Brolley <brolley@cygnus.com>
-
- * Directory created.
-
diff --git a/sim/testsuite/fr30-elf/Makefile.in b/sim/testsuite/fr30-elf/Makefile.in
deleted file mode 100644
index e93c3efe2ce..00000000000
--- a/sim/testsuite/fr30-elf/Makefile.in
+++ /dev/null
@@ -1,157 +0,0 @@
-# Makefile for regression testing the fr30 simulator.
-# Copyright (C) 1998 Free Software Foundation, Inc.
-
-# This file is part of GDB.
-
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diff --git a/sim/testsuite/fr30-elf/configure b/sim/testsuite/fr30-elf/configure
deleted file mode 100755
index fa656cb3e6e..00000000000
--- a/sim/testsuite/fr30-elf/configure
+++ /dev/null
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- *" "*|*" "*|*[\[\]\~\#\$\^\&\*\(\)\{\}\\\|\;\<\>\?]*)
- ac_configure_args="$ac_configure_args '$ac_arg'" ;;
- *) ac_configure_args="$ac_configure_args $ac_arg" ;;
- esac
-done
-
-# NLS nuisances.
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-if test "${LC_MESSAGES+set}" = set; then LC_MESSAGES=C; export LC_MESSAGES; fi
-if test "${LC_CTYPE+set}" = set; then LC_CTYPE=C; export LC_CTYPE; fi
-
-# confdefs.h avoids OS command line length limits that DEFS can exceed.
-rm -rf conftest* confdefs.h
-# AIX cpp loses on an empty file, so make sure it contains at least a newline.
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-
-# A filename unique to this package, relative to the directory that
-# configure is in, which we can look for to find out if srcdir is correct.
-ac_unique_file=Makefile.in
-
-# Find the source files, if location was not specified.
-if test -z "$srcdir"; then
- ac_srcdir_defaulted=yes
- # Try the directory containing this script, then its parent.
- ac_prog=$0
- ac_confdir=`echo $ac_prog|sed 's%/[^/][^/]*$%%'`
- test "x$ac_confdir" = "x$ac_prog" && ac_confdir=.
- srcdir=$ac_confdir
- if test ! -r $srcdir/$ac_unique_file; then
- srcdir=..
- fi
-else
- ac_srcdir_defaulted=no
-fi
-if test ! -r $srcdir/$ac_unique_file; then
- if test "$ac_srcdir_defaulted" = yes; then
- { echo "configure: error: can not find sources in $ac_confdir or .." 1>&2; exit 1; }
- else
- { echo "configure: error: can not find sources in $srcdir" 1>&2; exit 1; }
- fi
-fi
-srcdir=`echo "${srcdir}" | sed 's%\([^/]\)/*$%\1%'`
-
-# Prefer explicitly selected file to automatically selected ones.
-if test -z "$CONFIG_SITE"; then
- if test "x$prefix" != xNONE; then
- CONFIG_SITE="$prefix/share/config.site $prefix/etc/config.site"
- else
- CONFIG_SITE="$ac_default_prefix/share/config.site $ac_default_prefix/etc/config.site"
- fi
-fi
-for ac_site_file in $CONFIG_SITE; do
- if test -r "$ac_site_file"; then
- echo "loading site script $ac_site_file"
- . "$ac_site_file"
- fi
-done
-
-if test -r "$cache_file"; then
- echo "loading cache $cache_file"
- . $cache_file
-else
- echo "creating cache $cache_file"
- > $cache_file
-fi
-
-ac_ext=c
-# CFLAGS is not in ac_cpp because -g, -O, etc. are not valid cpp options.
-ac_cpp='$CPP $CPPFLAGS'
-ac_compile='${CC-cc} -c $CFLAGS $CPPFLAGS conftest.$ac_ext 1>&5'
-ac_link='${CC-cc} -o conftest $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS 1>&5'
-cross_compiling=$ac_cv_prog_cc_cross
-
-if (echo "testing\c"; echo 1,2,3) | grep c >/dev/null; then
- # Stardent Vistra SVR4 grep lacks -e, says ghazi@caip.rutgers.edu.
- if (echo -n testing; echo 1,2,3) | sed s/-n/xn/ | grep xn >/dev/null; then
- ac_n= ac_c='
-' ac_t=' '
- else
- ac_n=-n ac_c= ac_t=
- fi
-else
- ac_n= ac_c='\c' ac_t=
-fi
-
-
-
-CC=${CC-cc}
-
-ac_aux_dir=
-for ac_dir in `cd $srcdir;pwd`/../../.. $srcdir/`cd $srcdir;pwd`/../../..; do
- if test -f $ac_dir/install-sh; then
- ac_aux_dir=$ac_dir
- ac_install_sh="$ac_aux_dir/install-sh -c"
- break
- elif test -f $ac_dir/install.sh; then
- ac_aux_dir=$ac_dir
- ac_install_sh="$ac_aux_dir/install.sh -c"
- break
- fi
-done
-if test -z "$ac_aux_dir"; then
- { echo "configure: error: can not find install-sh or install.sh in `cd $srcdir;pwd`/../../.. $srcdir/`cd $srcdir;pwd`/../../.." 1>&2; exit 1; }
-fi
-ac_config_guess=$ac_aux_dir/config.guess
-ac_config_sub=$ac_aux_dir/config.sub
-ac_configure=$ac_aux_dir/configure # This should be Cygnus configure.
-
-
-# Do some error checking and defaulting for the host and target type.
-# The inputs are:
-# configure --host=HOST --target=TARGET --build=BUILD NONOPT
-#
-# The rules are:
-# 1. You are not allowed to specify --host, --target, and nonopt at the
-# same time.
-# 2. Host defaults to nonopt.
-# 3. If nonopt is not specified, then host defaults to the current host,
-# as determined by config.guess.
-# 4. Target and build default to nonopt.
-# 5. If nonopt is not specified, then target and build default to host.
-
-# The aliases save the names the user supplied, while $host etc.
-# will get canonicalized.
-case $host---$target---$nonopt in
-NONE---*---* | *---NONE---* | *---*---NONE) ;;
-*) { echo "configure: error: can only configure for one host and one target at a time" 1>&2; exit 1; } ;;
-esac
-
-
-# Make sure we can run config.sub.
-if ${CONFIG_SHELL-/bin/sh} $ac_config_sub sun4 >/dev/null 2>&1; then :
-else { echo "configure: error: can not run $ac_config_sub" 1>&2; exit 1; }
-fi
-
-echo $ac_n "checking host system type""... $ac_c" 1>&6
-echo "configure:573: checking host system type" >&5
-
-host_alias=$host
-case "$host_alias" in
-NONE)
- case $nonopt in
- NONE)
- if host_alias=`${CONFIG_SHELL-/bin/sh} $ac_config_guess`; then :
- else { echo "configure: error: can not guess host type; you must specify one" 1>&2; exit 1; }
- fi ;;
- *) host_alias=$nonopt ;;
- esac ;;
-esac
-
-host=`${CONFIG_SHELL-/bin/sh} $ac_config_sub $host_alias`
-host_cpu=`echo $host | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\1/'`
-host_vendor=`echo $host | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\2/'`
-host_os=`echo $host | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\3/'`
-echo "$ac_t""$host" 1>&6
-
-echo $ac_n "checking target system type""... $ac_c" 1>&6
-echo "configure:594: checking target system type" >&5
-
-target_alias=$target
-case "$target_alias" in
-NONE)
- case $nonopt in
- NONE) target_alias=$host_alias ;;
- *) target_alias=$nonopt ;;
- esac ;;
-esac
-
-target=`${CONFIG_SHELL-/bin/sh} $ac_config_sub $target_alias`
-target_cpu=`echo $target | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\1/'`
-target_vendor=`echo $target | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\2/'`
-target_os=`echo $target | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\3/'`
-echo "$ac_t""$target" 1>&6
-
-echo $ac_n "checking build system type""... $ac_c" 1>&6
-echo "configure:612: checking build system type" >&5
-
-build_alias=$build
-case "$build_alias" in
-NONE)
- case $nonopt in
- NONE) build_alias=$host_alias ;;
- *) build_alias=$nonopt ;;
- esac ;;
-esac
-
-build=`${CONFIG_SHELL-/bin/sh} $ac_config_sub $build_alias`
-build_cpu=`echo $build | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\1/'`
-build_vendor=`echo $build | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\2/'`
-build_os=`echo $build | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\3/'`
-echo "$ac_t""$build" 1>&6
-
-test "$host_alias" != "$target_alias" &&
- test "$program_prefix$program_suffix$program_transform_name" = \
- NONENONEs,x,x, &&
- program_prefix=${target_alias}-
-
-
-
-
-
-trap '' 1 2 15
-cat > confcache <<\EOF
-# This file is a shell script that caches the results of configure
-# tests run on this system so they can be shared between configure
-# scripts and configure runs. It is not useful on other systems.
-# If it contains results you don't want to keep, you may remove or edit it.
-#
-# By default, configure uses ./config.cache as the cache file,
-# creating it if it does not exist already. You can give configure
-# the --cache-file=FILE option to use a different cache file; that is
-# what configure does when it calls configure scripts in
-# subdirectories, so they share the cache.
-# Giving --cache-file=/dev/null disables caching, for debugging configure.
-# config.status only pays attention to the cache file if you give it the
-# --recheck option to rerun configure.
-#
-EOF
-# The following way of writing the cache mishandles newlines in values,
-# but we know of no workaround that is simple, portable, and efficient.
-# So, don't put newlines in cache variables' values.
-# Ultrix sh set writes to stderr and can't be redirected directly,
-# and sets the high bit in the cache file unless we assign to the vars.
-(set) 2>&1 |
- case `(ac_space=' '; set) 2>&1 | grep ac_space` in
- *ac_space=\ *)
- # `set' does not quote correctly, so add quotes (double-quote substitution
- # turns \\\\ into \\, and sed turns \\ into \).
- sed -n \
- -e "s/'/'\\\\''/g" \
- -e "s/^\\([a-zA-Z0-9_]*_cv_[a-zA-Z0-9_]*\\)=\\(.*\\)/\\1=\${\\1='\\2'}/p"
- ;;
- *)
- # `set' quotes correctly as required by POSIX, so do not add quotes.
- sed -n -e 's/^\([a-zA-Z0-9_]*_cv_[a-zA-Z0-9_]*\)=\(.*\)/\1=${\1=\2}/p'
- ;;
- esac >> confcache
-if cmp -s $cache_file confcache; then
- :
-else
- if test -w $cache_file; then
- echo "updating cache $cache_file"
- cat confcache > $cache_file
- else
- echo "not updating unwritable cache $cache_file"
- fi
-fi
-rm -f confcache
-
-trap 'rm -fr conftest* confdefs* core core.* *.core $ac_clean_files; exit 1' 1 2 15
-
-test "x$prefix" = xNONE && prefix=$ac_default_prefix
-# Let make expand exec_prefix.
-test "x$exec_prefix" = xNONE && exec_prefix='${prefix}'
-
-# Any assignment to VPATH causes Sun make to only execute
-# the first set of double-colon rules, so remove it if not needed.
-# If there is a colon in the path, we need to keep it.
-if test "x$srcdir" = x.; then
- ac_vpsub='/^[ ]*VPATH[ ]*=[^:]*$/d'
-fi
-
-trap 'rm -f $CONFIG_STATUS conftest*; exit 1' 1 2 15
-
-# Transform confdefs.h into DEFS.
-# Protect against shell expansion while executing Makefile rules.
-# Protect against Makefile macro expansion.
-cat > conftest.defs <<\EOF
-s%#define \([A-Za-z_][A-Za-z0-9_]*\) *\(.*\)%-D\1=\2%g
-s%[ `~#$^&*(){}\\|;'"<>?]%\\&%g
-s%\[%\\&%g
-s%\]%\\&%g
-s%\$%$$%g
-EOF
-DEFS=`sed -f conftest.defs confdefs.h | tr '\012' ' '`
-rm -f conftest.defs
-
-
-# Without the "./", some shells look in PATH for config.status.
-: ${CONFIG_STATUS=./config.status}
-
-echo creating $CONFIG_STATUS
-rm -f $CONFIG_STATUS
-cat > $CONFIG_STATUS <<EOF
-#! /bin/sh
-# Generated automatically by configure.
-# Run this file to recreate the current configuration.
-# This directory was configured as follows,
-# on host `(hostname || uname -n) 2>/dev/null | sed 1q`:
-#
-# $0 $ac_configure_args
-#
-# Compiler output produced by configure, useful for debugging
-# configure, is in ./config.log if it exists.
-
-ac_cs_usage="Usage: $CONFIG_STATUS [--recheck] [--version] [--help]"
-for ac_option
-do
- case "\$ac_option" in
- -recheck | --recheck | --rechec | --reche | --rech | --rec | --re | --r)
- echo "running \${CONFIG_SHELL-/bin/sh} $0 $ac_configure_args --no-create --no-recursion"
- exec \${CONFIG_SHELL-/bin/sh} $0 $ac_configure_args --no-create --no-recursion ;;
- -version | --version | --versio | --versi | --vers | --ver | --ve | --v)
- echo "$CONFIG_STATUS generated by autoconf version 2.12.1"
- exit 0 ;;
- -help | --help | --hel | --he | --h)
- echo "\$ac_cs_usage"; exit 0 ;;
- *) echo "\$ac_cs_usage"; exit 1 ;;
- esac
-done
-
-ac_given_srcdir=$srcdir
-
-trap 'rm -fr `echo "Makefile" | sed "s/:[^ ]*//g"` conftest*; exit 1' 1 2 15
-EOF
-cat >> $CONFIG_STATUS <<EOF
-
-# Protect against being on the right side of a sed subst in config.status.
-sed 's/%@/@@/; s/@%/@@/; s/%g\$/@g/; /@g\$/s/[\\\\&%]/\\\\&/g;
- s/@@/%@/; s/@@/@%/; s/@g\$/%g/' > conftest.subs <<\\CEOF
-$ac_vpsub
-$extrasub
-s%@SHELL@%$SHELL%g
-s%@CFLAGS@%$CFLAGS%g
-s%@CPPFLAGS@%$CPPFLAGS%g
-s%@CXXFLAGS@%$CXXFLAGS%g
-s%@DEFS@%$DEFS%g
-s%@LDFLAGS@%$LDFLAGS%g
-s%@LIBS@%$LIBS%g
-s%@exec_prefix@%$exec_prefix%g
-s%@prefix@%$prefix%g
-s%@program_transform_name@%$program_transform_name%g
-s%@bindir@%$bindir%g
-s%@sbindir@%$sbindir%g
-s%@libexecdir@%$libexecdir%g
-s%@datadir@%$datadir%g
-s%@sysconfdir@%$sysconfdir%g
-s%@sharedstatedir@%$sharedstatedir%g
-s%@localstatedir@%$localstatedir%g
-s%@libdir@%$libdir%g
-s%@includedir@%$includedir%g
-s%@oldincludedir@%$oldincludedir%g
-s%@infodir@%$infodir%g
-s%@mandir@%$mandir%g
-s%@CC@%$CC%g
-s%@host@%$host%g
-s%@host_alias@%$host_alias%g
-s%@host_cpu@%$host_cpu%g
-s%@host_vendor@%$host_vendor%g
-s%@host_os@%$host_os%g
-s%@target@%$target%g
-s%@target_alias@%$target_alias%g
-s%@target_cpu@%$target_cpu%g
-s%@target_vendor@%$target_vendor%g
-s%@target_os@%$target_os%g
-s%@build@%$build%g
-s%@build_alias@%$build_alias%g
-s%@build_cpu@%$build_cpu%g
-s%@build_vendor@%$build_vendor%g
-s%@build_os@%$build_os%g
-
-CEOF
-EOF
-
-cat >> $CONFIG_STATUS <<\EOF
-
-# Split the substitutions into bite-sized pieces for seds with
-# small command number limits, like on Digital OSF/1 and HP-UX.
-ac_max_sed_cmds=90 # Maximum number of lines to put in a sed script.
-ac_file=1 # Number of current file.
-ac_beg=1 # First line for current file.
-ac_end=$ac_max_sed_cmds # Line after last line for current file.
-ac_more_lines=:
-ac_sed_cmds=""
-while $ac_more_lines; do
- if test $ac_beg -gt 1; then
- sed "1,${ac_beg}d; ${ac_end}q" conftest.subs > conftest.s$ac_file
- else
- sed "${ac_end}q" conftest.subs > conftest.s$ac_file
- fi
- if test ! -s conftest.s$ac_file; then
- ac_more_lines=false
- rm -f conftest.s$ac_file
- else
- if test -z "$ac_sed_cmds"; then
- ac_sed_cmds="sed -f conftest.s$ac_file"
- else
- ac_sed_cmds="$ac_sed_cmds | sed -f conftest.s$ac_file"
- fi
- ac_file=`expr $ac_file + 1`
- ac_beg=$ac_end
- ac_end=`expr $ac_end + $ac_max_sed_cmds`
- fi
-done
-if test -z "$ac_sed_cmds"; then
- ac_sed_cmds=cat
-fi
-EOF
-
-cat >> $CONFIG_STATUS <<EOF
-
-CONFIG_FILES=\${CONFIG_FILES-"Makefile"}
-EOF
-cat >> $CONFIG_STATUS <<\EOF
-for ac_file in .. $CONFIG_FILES; do if test "x$ac_file" != x..; then
- # Support "outfile[:infile[:infile...]]", defaulting infile="outfile.in".
- case "$ac_file" in
- *:*) ac_file_in=`echo "$ac_file"|sed 's%[^:]*:%%'`
- ac_file=`echo "$ac_file"|sed 's%:.*%%'` ;;
- *) ac_file_in="${ac_file}.in" ;;
- esac
-
- # Adjust a relative srcdir, top_srcdir, and INSTALL for subdirectories.
-
- # Remove last slash and all that follows it. Not all systems have dirname.
- ac_dir=`echo $ac_file|sed 's%/[^/][^/]*$%%'`
- if test "$ac_dir" != "$ac_file" && test "$ac_dir" != .; then
- # The file is in a subdirectory.
- test ! -d "$ac_dir" && mkdir "$ac_dir"
- ac_dir_suffix="/`echo $ac_dir|sed 's%^\./%%'`"
- # A "../" for each directory in $ac_dir_suffix.
- ac_dots=`echo $ac_dir_suffix|sed 's%/[^/]*%../%g'`
- else
- ac_dir_suffix= ac_dots=
- fi
-
- case "$ac_given_srcdir" in
- .) srcdir=.
- if test -z "$ac_dots"; then top_srcdir=.
- else top_srcdir=`echo $ac_dots|sed 's%/$%%'`; fi ;;
- /*) srcdir="$ac_given_srcdir$ac_dir_suffix"; top_srcdir="$ac_given_srcdir" ;;
- *) # Relative path.
- srcdir="$ac_dots$ac_given_srcdir$ac_dir_suffix"
- top_srcdir="$ac_dots$ac_given_srcdir" ;;
- esac
-
-
- echo creating "$ac_file"
- rm -f "$ac_file"
- configure_input="Generated automatically from `echo $ac_file_in|sed 's%.*/%%'` by configure."
- case "$ac_file" in
- *Makefile*) ac_comsub="1i\\
-# $configure_input" ;;
- *) ac_comsub= ;;
- esac
-
- ac_file_inputs=`echo $ac_file_in|sed -e "s%^%$ac_given_srcdir/%" -e "s%:% $ac_given_srcdir/%g"`
- sed -e "$ac_comsub
-s%@configure_input@%$configure_input%g
-s%@srcdir@%$srcdir%g
-s%@top_srcdir@%$top_srcdir%g
-" $ac_file_inputs | (eval "$ac_sed_cmds") > $ac_file
-fi; done
-rm -f conftest.s*
-
-EOF
-cat >> $CONFIG_STATUS <<EOF
-
-EOF
-cat >> $CONFIG_STATUS <<\EOF
-
-exit 0
-EOF
-chmod +x $CONFIG_STATUS
-rm -fr confdefs* $ac_clean_files
-test "$no_create" = yes || ${CONFIG_SHELL-/bin/sh} $CONFIG_STATUS || exit 1
-
diff --git a/sim/testsuite/fr30-elf/configure.in b/sim/testsuite/fr30-elf/configure.in
deleted file mode 100644
index e74389e551e..00000000000
--- a/sim/testsuite/fr30-elf/configure.in
+++ /dev/null
@@ -1,19 +0,0 @@
-dnl Process this file file with autoconf to produce a configure script.
-dnl This file is a shell script fragment that supplies the information
-dnl necessary to tailor a template configure script into the configure
-dnl script appropriate for this directory. For more information, check
-dnl any existing configure script.
-
-AC_PREREQ(2.5)
-dnl FIXME - think of a truly uniq file to this directory
-AC_INIT(Makefile.in)
-
-CC=${CC-cc}
-AC_SUBST(CC)
-AC_CONFIG_AUX_DIR(`cd $srcdir;pwd`/../../..)
-AC_CANONICAL_SYSTEM
-
-AC_SUBST(target_cpu)
-
-
-AC_OUTPUT(Makefile)
diff --git a/sim/testsuite/fr30-elf/exit47.s b/sim/testsuite/fr30-elf/exit47.s
deleted file mode 100644
index 0dc7c99dda6..00000000000
--- a/sim/testsuite/fr30-elf/exit47.s
+++ /dev/null
@@ -1,7 +0,0 @@
- ;; Return with exit code 47.
-
- .global _start
-_start:
- ldi32 #47,r4
- ldi32 #1,r0
- int #10
diff --git a/sim/testsuite/fr30-elf/hello.s b/sim/testsuite/fr30-elf/hello.s
deleted file mode 100644
index d5259cdb7a5..00000000000
--- a/sim/testsuite/fr30-elf/hello.s
+++ /dev/null
@@ -1,15 +0,0 @@
- .global _start
-_start:
-
-; write (hello world)
- ldi32 #14,r6
- ldi32 #hello,r5
- ldi32 #1,r4
- ldi32 #5,r0
- int #10
-; exit (0)
- ldi32 #0,r4
- ldi32 #1,r0
- int #10
-
-hello: .ascii "Hello World!\r\n"
diff --git a/sim/testsuite/fr30-elf/loop.s b/sim/testsuite/fr30-elf/loop.s
deleted file mode 100644
index 709b78f04eb..00000000000
--- a/sim/testsuite/fr30-elf/loop.s
+++ /dev/null
@@ -1,2 +0,0 @@
- .global _start
-_start: bra _start
diff --git a/sim/testsuite/lib/sim-defs.exp b/sim/testsuite/lib/sim-defs.exp
deleted file mode 100644
index e00b99c9c8b..00000000000
--- a/sim/testsuite/lib/sim-defs.exp
+++ /dev/null
@@ -1,351 +0,0 @@
-# Simulator dejagnu utilities.
-
-# Communicate simulator path from sim_init to sim_version.
-# For some reason [board_info target sim] doesn't work in sim_version.
-# [Presumubly because the target has been "popped" by then. Odd though.]
-set sim_path "unknown-run"
-
-# Initialize the testrun.
-# Required by dejagnu.
-
-proc sim_init { args } {
- global sim_path
- set sim_path [board_info target sim]
- # Need to return an empty string (copied from GAS).
- return ""
-}
-
-# Print the version of the simulator being tested.
-# Required by dejagnu.
-
-proc sim_version {} {
- global sim_path
- set version 0.5
- clone_output "$sim_path $version\n"
-}
-
-# Cover function to target_compile.
-# Copied from gdb_compile.
-
-proc sim_compile { source dest type options } {
- set result [target_compile $source $dest $type $options]
- regsub "\[\r\n\]*$" "$result" "" result
- regsub "^\[\r\n\]*" "$result" "" result
- if { $result != "" } {
- clone_output "sim compile output: $result"
- }
- return $result
-}
-
-# Run a program on the simulator.
-# Required by dejagnu (at least ${tool}_run used to be).
-#
-# SIM_OPTS are options for the simulator.
-# PROG_OPTS are options passed to the simulated program.
-# At present REDIR must be "" or "> foo".
-# OPTIONS is a list of options internal to this routine.
-# This is modelled after target_compile. We want to be able to add new
-# options without having to update all our users.
-# Currently:
-# env(foo)=val - set environment variable foo to val for this run
-# timeout=val - set the timeout to val for this run
-#
-# The result is a list of two elements.
-# The first is one of pass/fail/etc.
-# The second is the program's output.
-#
-# This is different than the sim_load routine provided by
-# dejagnu/config/sim.exp. It's not clear how to pass arguments to the
-# simulator (not the simulated program, the simulator) with sim_load.
-
-proc sim_run { prog sim_opts prog_opts redir options } {
- global SIMFLAGS
-
- # Set the default value of the timeout.
- # FIXME: The timeout value we actually want is a function of
- # host, target, and testcase.
- set testcase_timeout [board_info target sim_time_limit]
- if { "$testcase_timeout" == "" } {
- set testcase_timeout [board_info host testcase_timeout]
- }
- if { "$testcase_timeout" == "" } {
- set testcase_timeout 240 ;# 240 same as in dejagnu/config/sim.exp.
- }
-
- # Initial the environment we pass to the testcase.
- set testcase_env ""
-
- # Process OPTIONS ...
- foreach o $options {
- if [regexp {^env\((.*)\)=(.*)} $o full var val] {
- set testcase_env "$testcase_env $var=$val"
- } elseif [regexp {^timeout=(.*)} $o full val] {
- set testcase_timeout $val
- }
-
- }
-
- verbose "testcase timeout is set to $testcase_timeout" 1
-
- set sim [board_info target sim]
-
- if [is_remote host] {
- set prog [remote_download host $prog]
- if { $prog == "" } {
- error "download failed"
- return -1;
- }
- }
-
- set board [target_info name]
- if [board_info $board exists sim,options] {
- set always_opts [board_info $board sim,options]
- } else {
- set always_opts ""
- }
-
- # FIXME: this works for UNIX only
- if { "$testcase_env" != "" } {
- set sim "env $testcase_env $sim"
- }
-
- send_log "$sim $always_opts $SIMFLAGS $sim_opts $prog $prog_opts\n"
-
- if { "$redir" == "" } {
- remote_spawn host "$sim $always_opts $SIMFLAGS $sim_opts $prog $prog_opts"
- } else {
- remote_spawn host "$sim $always_opts $SIMFLAGS $sim_opts $prog $prog_opts $redir" writeonly
- }
- set result [remote_wait host $testcase_timeout]
-
- set return_code [lindex $result 0]
- set output [lindex $result 1]
- # Remove the \r part of "\r\n" so we don't break all the patterns
- # we want to match.
- regsub -all -- "\r" $output "" output
-
- if [is_remote host] {
- # clean up after ourselves.
- remote_file host delete $prog
- }
-
- # ??? Not sure the test for pass/fail is right.
- # We just care that the simulator ran correctly, not whether the simulated
- # program return 0 or non-zero from `main'.
- set status fail
- if { $return_code == 0 } {
- set status pass
- }
-
- return [list $status $output]
-}
-
-# Run testcase NAME.
-# NAME is either a fully specified file name, or just the file name in which
-# case $srcdir/$subdir will be prepended.
-# REQUESTED_MACHS is a list of machines to run the testcase on. If NAME isn't
-# for the specified machine(s), it is ignored.
-# Typically REQUESTED_MACHS contains just one element, it is up to the caller
-# to iterate over the desired machine variants.
-#
-# The file can contain options in the form "# option(mach list): value".
-# Possibilities:
-# mach: [all | machine names]
-# as[(mach-list)]: <assembler options>
-# ld[(mach-list)]: <linker options>
-# sim[(mach-list)]: <simulator options>
-# output: program output pattern to match with string-match
-# xerror: program is expected to return with a "failure" exit code
-# If `output' is not specified, the program must output "pass" if !xerror or
-# "fail" if xerror.
-# The parens in "optname()" are optional if the specification is for all machs.
-
-proc run_sim_test { name requested_machs } {
- global subdir srcdir
- global SIMFLAGS
- global opts
- global cpu_option
-
- if [string match "*/*" $name] {
- set file $name
- set name [file tail $name]
- } else {
- set file "$srcdir/$subdir/$name"
- }
-
- set opt_array [slurp_options "${file}"]
- if { $opt_array == -1 } {
- unresolved $subdir/$name
- return
- }
- # Clear default options
- set opts(as) ""
- set opts(ld) ""
- set opts(sim) ""
- set opts(output) ""
- set opts(mach) ""
- set opts(timeout) ""
- set opts(xerror) "no"
-
- # Clear any machine specific options specified in a previous test case
- foreach m $requested_machs {
- if [info exists opts(as,$m)] {
- unset opts(as,$m)
- }
- if [info exists opts(ld,$m)] {
- unset opts(ld,$m)
- }
- if [info exists opts(sim,$m)] {
- unset opts(sim,$m)
- }
- }
-
- foreach i $opt_array {
- set opt_name [lindex $i 0]
- set opt_machs [lindex $i 1]
- set opt_val [lindex $i 2]
- if ![info exists opts($opt_name)] {
- perror "unknown option $opt_name in file $file"
- unresolved $subdir/$name
- return
- }
- foreach m $opt_machs {
- set opts($opt_name,$m) $opt_val
- }
- if { "$opt_machs" == "" } {
- set opts($opt_name) $opt_val
- }
- }
-
- set testname $name
- set sourcefile $file
- if { $opts(output) == "" } {
- if { "$opts(xerror)" == "no" } {
- set opts(output) "pass\n"
- } else {
- set opts(output) "fail\n"
- }
- }
- # Change \n sequences to newline chars.
- regsub -all "\\\\n" $opts(output) "\n" opts(output)
-
- set testcase_machs $opts(mach)
- if { "$testcase_machs" == "all" } {
- set testcase_machs $requested_machs
- }
-
- foreach mach $testcase_machs {
- if { [lsearch $requested_machs $mach] < 0 } {
- verbose -log "Skipping $mach version of $name, not requested."
- continue
- }
-
- verbose -log "Testing $name on machine $mach."
-
- if ![info exists opts(as,$mach)] {
- set opts(as,$mach) $opts(as)
- }
-
- set as_options "$opts(as,$mach) -I$srcdir/$subdir"
- if [info exists cpu_option] {
- set as_options "$as_options $cpu_option=$mach"
- }
- set comp_output [target_assemble $sourcefile ${name}.o "$as_options"]
-
- if ![string match "" $comp_output] {
- verbose -log "$comp_output" 3
- fail "$mach $testname"
- continue
- }
-
- if ![info exists opts(ld,$mach)] {
- set opts(ld,$mach) $opts(ld)
- }
-
- set comp_output [target_link ${name}.o ${name}.x "$opts(ld,$mach)"]
-
- if ![string match "" $comp_output] {
- verbose -log "$comp_output" 3
- fail "$mach $testname"
- continue
- }
-
- # If no machine specific options, default to the general version.
- if ![info exists opts(sim,$mach)] {
- set opts(sim,$mach) $opts(sim)
- }
-
- # Build the options argument.
- set options ""
- if { "$opts(timeout)" != "" } {
- set options "$options timeout=$opts(timeout)"
- }
-
- set result [sim_run ${name}.x "$opts(sim,$mach)" "" "" "$options"]
- set status [lindex $result 0]
- set output [lindex $result 1]
-
- if { "$status" == "pass" } {
- if { "$opts(xerror)" == "no" } {
- if [string match $opts(output) $output] {
- pass "$mach $testname"
- } else {
- verbose -log "output: $output" 3
- verbose -log "pattern: $opts(output)" 3
- fail "$mach $testname"
- }
- } else {
- verbose -log "`pass' return code when expecting failure" 3
- fail "$mach $testname"
- }
- } elseif { "$status" == "fail" } {
- if { "$opts(xerror)" == "no" } {
- fail "$mach $testname"
- } else {
- if [string match $opts(output) $output] {
- pass "$mach $testname"
- } else {
- verbose -log "output: $output" 3
- verbose -log "pattern: $opts(output)" 3
- fail "$mach $testname"
- }
- }
- } else {
- $status "$mach $testname"
- }
- }
-}
-
-# Subroutine of run_sim_test to process options in FILE.
-
-proc slurp_options { file } {
- if [catch { set f [open $file r] } x] {
- #perror "couldn't open `$file': $x"
- perror "$x"
- return -1
- }
- set opt_array {}
- # whitespace expression
- set ws {[ ]*}
- set nws {[^ ]*}
- # whitespace is ignored anywhere except within the options list;
- # option names are alphabetic only
- set pat "^#${ws}(\[a-zA-Z\]*)\\(?(\[^):\]*)\\)?$ws:${ws}(.*)$ws\$"
- # Allow comment as first line of file.
- set firstline 1
- while { [gets $f line] != -1 } {
- set line [string trim $line]
- # Whitespace here is space-tab.
- if [regexp $pat $line xxx opt_name opt_machs opt_val] {
- # match!
- lappend opt_array [list $opt_name $opt_machs $opt_val]
- } else {
- if { ! $firstline } {
- break
- }
- }
- set firstline 0
- }
- close $f
- return $opt_array
-}
diff --git a/sim/testsuite/m32r-elf/ChangeLog b/sim/testsuite/m32r-elf/ChangeLog
deleted file mode 100644
index 371a839bdc1..00000000000
--- a/sim/testsuite/m32r-elf/ChangeLog
+++ /dev/null
@@ -1,4 +0,0 @@
-Thu Feb 12 19:09:38 1998 Doug Evans <devans@canuck.cygnus.com>
-
- * Directory created.
-
diff --git a/sim/testsuite/m32r-elf/Makefile.in b/sim/testsuite/m32r-elf/Makefile.in
deleted file mode 100644
index bbfb6a55322..00000000000
--- a/sim/testsuite/m32r-elf/Makefile.in
+++ /dev/null
@@ -1,157 +0,0 @@
-# Makefile for regression testing the m32r simulator.
-# Copyright (C) 1998 Free Software Foundation, Inc.
-
-# This file is part of GDB.
-
-# GDB is free software; you can redistribute it and/or modify
-# it under the terms of the GNU General Public License as published by
-# the Free Software Foundation; either version 2, or (at your option)
-# any later version.
-
-# GDB is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
-VPATH = @srcdir@
-srcdir = @srcdir@
-srcroot = $(srcdir)/../../..
-
-prefix = @prefix@
-exec_prefix = @exec_prefix@
-
-host_alias = @host_alias@
-target_alias = @target_alias@
-program_transform_name = @program_transform_name@
-build_canonical = @build@
-host_canonical = @host@
-target_canonical = @target@
-target_cpu = @target_cpu@
-
-
-SHELL = @SHELL@
-SUBDIRS = @subdirs@
-RPATH_ENVVAR = @RPATH_ENVVAR@
-
-EXPECT = `if [ -f ../../../expect/expect ] ; then \
- echo ../../../expect/expect ; \
- else echo expect ; fi`
-
-RUNTEST = $(RUNTEST_FOR_TARGET)
-
-RUNTESTFLAGS =
-
-RUNTEST_FOR_TARGET = `\
- if [ -f $${srcroot}/dejagnu/runtest ]; then \
- echo $${srcroot}/dejagnu/runtest; \
- else \
- if [ "$(host_canonical)" = "$(target_canonical)" ]; then \
- echo runtest; \
- else \
- t='$(program_transform_name)'; echo runtest | sed -e '' $$t; \
- fi; \
- fi`
-
-
-AS_FOR_TARGET = `\
- if [ -x ../../../gas/as-new ]; then \
- echo ../../../gas/as-new ; \
- else \
- echo $(target_alias)-as ; \
- fi`
-
-LD_FOR_TARGET = `\
- if [ -x ../../../ld/ld-new ]; then \
- echo ../../../ld/ld-new ; \
- else \
- echo $(target_alias)-ld ; \
- fi`
-
-RUN_FOR_TARGET = `\
- if [ -x ../../../sim/${target_cpu}/run ]; then \
- echo ../../../sim/${target_cpu}/run ; \
- else \
- echo $(target_alias)-run ; \
- fi`
-
-TESTS = \
- hello.ok \
- exit47.ko
-
-check: sanity $(TESTS)
-sanity:
- @eval echo AS_FOR_TARGET = $(AS_FOR_TARGET)
- @eval echo LD_FOR_TARGET = $(LD_FOR_TARGET)
- @eval echo RUN_FOR_TARGET = $(RUN_FOR_TARGET)
-
-
-
-# Rules for running all the tests, put into three types
-# exit success, exit fail, print "Hello World"
-
-.u.log:
- uudecode $*.u
- $(RUN_FOR_TARGET) $* > $*.log
-
-
-# Rules for running the tests
-
-.SUFFIXES: .u .ok .run .hi .ko
-.run.ok:
- rm -f tmp-$* $*.hi
- ulimit -t 5 ; $(RUN_FOR_TARGET) $*.run > tmp-$*
- mv tmp-$* $*.ok
-.run.hi:
- rm -f tmp-$* $*.hi diff-$*
- ulimit -t 5 ; $(RUN_FOR_TARGET) $*.run > tmp-$*
- echo "Hello World" | diff - tmp-$* > diff-$*
- cat tmp-$* diff-$* > $*.hi
-.run.ko:
- rm -f tmp-$* $*.ko
- set +e ; \
- ulimit -t 5 ; $(RUN_FOR_TARGET) $*.run > tmp-$* ; \
- if [ $$? -eq 47 ] ; then \
- exit 0 ; \
- else \
- exit 1 ; \
- fi
- mv tmp-$* $*.ko
-
-
-# Rules for building all the tests and packing them into
-# uuencoded files.
-
-uuencode: em-pstr.u em-e0.u em-e47.u em-pchr.u
-
-.SUFFIXES: .u .s .run
-.s.u:
- rm -f $*.o $*.run
- $(AS_FOR_TARGET) $(srcdir)/$*.s -o $*.o
- $(LD_FOR_TARGET) -o $* $*.o
- uuencode < $* $* > $*.u
- rm -f $*.o $*
-.s.run:
- rm -f $*.o $*.run
- $(AS_FOR_TARGET) $(srcdir)/$*.s -o $*.o
- $(LD_FOR_TARGET) -o $*.run $*.o
- rm -f $*.o $*
-
-
-clean mostlyclean:
- rm -f *~ core *.o a.out
- rm -f $(TESTS)
-
-distclean maintainer-clean realclean: clean
- rm -f *~ core
- rm -f Makefile config.status *-init.exp
- rm -fr *.log summary detail *.plog *.sum *.psum site.*
-
-Makefile : Makefile.in config.status
- $(SHELL) config.status
-
-config.status: configure
- $(SHELL) config.status --recheck
diff --git a/sim/testsuite/m32r-elf/configure b/sim/testsuite/m32r-elf/configure
deleted file mode 100755
index fa656cb3e6e..00000000000
--- a/sim/testsuite/m32r-elf/configure
+++ /dev/null
@@ -1,902 +0,0 @@
-#! /bin/sh
-
-# Guess values for system-dependent variables and create Makefiles.
-# Generated automatically using autoconf version 2.12.1
-# Copyright (C) 1992, 93, 94, 95, 96 Free Software Foundation, Inc.
-#
-# This configure script is free software; the Free Software Foundation
-# gives unlimited permission to copy, distribute and modify it.
-
-# Defaults:
-ac_help=
-ac_default_prefix=/usr/local
-# Any additions from configure.in:
-
-# Initialize some variables set by options.
-# The variables have the same names as the options, with
-# dashes changed to underlines.
-build=NONE
-cache_file=./config.cache
-exec_prefix=NONE
-host=NONE
-no_create=
-nonopt=NONE
-no_recursion=
-prefix=NONE
-program_prefix=NONE
-program_suffix=NONE
-program_transform_name=s,x,x,
-silent=
-site=
-srcdir=
-target=NONE
-verbose=
-x_includes=NONE
-x_libraries=NONE
-bindir='${exec_prefix}/bin'
-sbindir='${exec_prefix}/sbin'
-libexecdir='${exec_prefix}/libexec'
-datadir='${prefix}/share'
-sysconfdir='${prefix}/etc'
-sharedstatedir='${prefix}/com'
-localstatedir='${prefix}/var'
-libdir='${exec_prefix}/lib'
-includedir='${prefix}/include'
-oldincludedir='/usr/include'
-infodir='${prefix}/info'
-mandir='${prefix}/man'
-
-# Initialize some other variables.
-subdirs=
-MFLAGS= MAKEFLAGS=
-SHELL=${CONFIG_SHELL-/bin/sh}
-# Maximum number of lines to put in a shell here document.
-ac_max_here_lines=12
-
-ac_prev=
-for ac_option
-do
-
- # If the previous option needs an argument, assign it.
- if test -n "$ac_prev"; then
- eval "$ac_prev=\$ac_option"
- ac_prev=
- continue
- fi
-
- case "$ac_option" in
- -*=*) ac_optarg=`echo "$ac_option" | sed 's/[-_a-zA-Z0-9]*=//'` ;;
- *) ac_optarg= ;;
- esac
-
- # Accept the important Cygnus configure options, so we can diagnose typos.
-
- case "$ac_option" in
-
- -bindir | --bindir | --bindi | --bind | --bin | --bi)
- ac_prev=bindir ;;
- -bindir=* | --bindir=* | --bindi=* | --bind=* | --bin=* | --bi=*)
- bindir="$ac_optarg" ;;
-
- -build | --build | --buil | --bui | --bu)
- ac_prev=build ;;
- -build=* | --build=* | --buil=* | --bui=* | --bu=*)
- build="$ac_optarg" ;;
-
- -cache-file | --cache-file | --cache-fil | --cache-fi \
- | --cache-f | --cache- | --cache | --cach | --cac | --ca | --c)
- ac_prev=cache_file ;;
- -cache-file=* | --cache-file=* | --cache-fil=* | --cache-fi=* \
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- cache_file="$ac_optarg" ;;
-
- -datadir | --datadir | --datadi | --datad | --data | --dat | --da)
- ac_prev=datadir ;;
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- datadir="$ac_optarg" ;;
-
- -disable-* | --disable-*)
- ac_feature=`echo $ac_option|sed -e 's/-*disable-//'`
- # Reject names that are not valid shell variable names.
- if test -n "`echo $ac_feature| sed 's/[-a-zA-Z0-9_]//g'`"; then
- { echo "configure: error: $ac_feature: invalid feature name" 1>&2; exit 1; }
- fi
- ac_feature=`echo $ac_feature| sed 's/-/_/g'`
- eval "enable_${ac_feature}=no" ;;
-
- -enable-* | --enable-*)
- ac_feature=`echo $ac_option|sed -e 's/-*enable-//' -e 's/=.*//'`
- # Reject names that are not valid shell variable names.
- if test -n "`echo $ac_feature| sed 's/[-_a-zA-Z0-9]//g'`"; then
- { echo "configure: error: $ac_feature: invalid feature name" 1>&2; exit 1; }
- fi
- ac_feature=`echo $ac_feature| sed 's/-/_/g'`
- case "$ac_option" in
- *=*) ;;
- *) ac_optarg=yes ;;
- esac
- eval "enable_${ac_feature}='$ac_optarg'" ;;
-
- -exec-prefix | --exec_prefix | --exec-prefix | --exec-prefi \
- | --exec-pref | --exec-pre | --exec-pr | --exec-p | --exec- \
- | --exec | --exe | --ex)
- ac_prev=exec_prefix ;;
- -exec-prefix=* | --exec_prefix=* | --exec-prefix=* | --exec-prefi=* \
- | --exec-pref=* | --exec-pre=* | --exec-pr=* | --exec-p=* | --exec-=* \
- | --exec=* | --exe=* | --ex=*)
- exec_prefix="$ac_optarg" ;;
-
- -gas | --gas | --ga | --g)
- # Obsolete; use --with-gas.
- with_gas=yes ;;
-
- -help | --help | --hel | --he)
- # Omit some internal or obsolete options to make the list less imposing.
- # This message is too long to be a string in the A/UX 3.1 sh.
- cat << EOF
-Usage: configure [options] [host]
-Options: [defaults in brackets after descriptions]
-Configuration:
- --cache-file=FILE cache test results in FILE
- --help print this message
- --no-create do not create output files
- --quiet, --silent do not print \`checking...' messages
- --version print the version of autoconf that created configure
-Directory and file names:
- --prefix=PREFIX install architecture-independent files in PREFIX
- [$ac_default_prefix]
- --exec-prefix=EPREFIX install architecture-dependent files in EPREFIX
- [same as prefix]
- --bindir=DIR user executables in DIR [EPREFIX/bin]
- --sbindir=DIR system admin executables in DIR [EPREFIX/sbin]
- --libexecdir=DIR program executables in DIR [EPREFIX/libexec]
- --datadir=DIR read-only architecture-independent data in DIR
- [PREFIX/share]
- --sysconfdir=DIR read-only single-machine data in DIR [PREFIX/etc]
- --sharedstatedir=DIR modifiable architecture-independent data in DIR
- [PREFIX/com]
- --localstatedir=DIR modifiable single-machine data in DIR [PREFIX/var]
- --libdir=DIR object code libraries in DIR [EPREFIX/lib]
- --includedir=DIR C header files in DIR [PREFIX/include]
- --oldincludedir=DIR C header files for non-gcc in DIR [/usr/include]
- --infodir=DIR info documentation in DIR [PREFIX/info]
- --mandir=DIR man documentation in DIR [PREFIX/man]
- --srcdir=DIR find the sources in DIR [configure dir or ..]
- --program-prefix=PREFIX prepend PREFIX to installed program names
- --program-suffix=SUFFIX append SUFFIX to installed program names
- --program-transform-name=PROGRAM
- run sed PROGRAM on installed program names
-EOF
- cat << EOF
-Host type:
- --build=BUILD configure for building on BUILD [BUILD=HOST]
- --host=HOST configure for HOST [guessed]
- --target=TARGET configure for TARGET [TARGET=HOST]
-Features and packages:
- --disable-FEATURE do not include FEATURE (same as --enable-FEATURE=no)
- --enable-FEATURE[=ARG] include FEATURE [ARG=yes]
- --with-PACKAGE[=ARG] use PACKAGE [ARG=yes]
- --without-PACKAGE do not use PACKAGE (same as --with-PACKAGE=no)
- --x-includes=DIR X include files are in DIR
- --x-libraries=DIR X library files are in DIR
-EOF
- if test -n "$ac_help"; then
- echo "--enable and --with options recognized:$ac_help"
- fi
- exit 0 ;;
-
- -host | --host | --hos | --ho)
- ac_prev=host ;;
- -host=* | --host=* | --hos=* | --ho=*)
- host="$ac_optarg" ;;
-
- -includedir | --includedir | --includedi | --included | --include \
- | --includ | --inclu | --incl | --inc)
- ac_prev=includedir ;;
- -includedir=* | --includedir=* | --includedi=* | --included=* | --include=* \
- | --includ=* | --inclu=* | --incl=* | --inc=*)
- includedir="$ac_optarg" ;;
-
- -infodir | --infodir | --infodi | --infod | --info | --inf)
- ac_prev=infodir ;;
- -infodir=* | --infodir=* | --infodi=* | --infod=* | --info=* | --inf=*)
- infodir="$ac_optarg" ;;
-
- -libdir | --libdir | --libdi | --libd)
- ac_prev=libdir ;;
- -libdir=* | --libdir=* | --libdi=* | --libd=*)
- libdir="$ac_optarg" ;;
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- -libexecdir | --libexecdir | --libexecdi | --libexecd | --libexec \
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-sed 's/%@/@@/; s/@%/@@/; s/%g\$/@g/; /@g\$/s/[\\\\&%]/\\\\&/g;
- s/@@/%@/; s/@@/@%/; s/@g\$/%g/' > conftest.subs <<\\CEOF
-$ac_vpsub
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-s%@sbindir@%$sbindir%g
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-s%@CC@%$CC%g
-s%@host@%$host%g
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-s%@build@%$build%g
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-s%@build_os@%$build_os%g
-
-CEOF
-EOF
-
-cat >> $CONFIG_STATUS <<\EOF
-
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- fi
- if test ! -s conftest.s$ac_file; then
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- rm -f conftest.s$ac_file
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- if test -z "$ac_sed_cmds"; then
- ac_sed_cmds="sed -f conftest.s$ac_file"
- else
- ac_sed_cmds="$ac_sed_cmds | sed -f conftest.s$ac_file"
- fi
- ac_file=`expr $ac_file + 1`
- ac_beg=$ac_end
- ac_end=`expr $ac_end + $ac_max_sed_cmds`
- fi
-done
-if test -z "$ac_sed_cmds"; then
- ac_sed_cmds=cat
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-EOF
-
-cat >> $CONFIG_STATUS <<EOF
-
-CONFIG_FILES=\${CONFIG_FILES-"Makefile"}
-EOF
-cat >> $CONFIG_STATUS <<\EOF
-for ac_file in .. $CONFIG_FILES; do if test "x$ac_file" != x..; then
- # Support "outfile[:infile[:infile...]]", defaulting infile="outfile.in".
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- ac_file=`echo "$ac_file"|sed 's%:.*%%'` ;;
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- ac_dir=`echo $ac_file|sed 's%/[^/][^/]*$%%'`
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- ac_dots=`echo $ac_dir_suffix|sed 's%/[^/]*%../%g'`
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- ac_dir_suffix= ac_dots=
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-" $ac_file_inputs | (eval "$ac_sed_cmds") > $ac_file
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-
diff --git a/sim/testsuite/m32r-elf/configure.in b/sim/testsuite/m32r-elf/configure.in
deleted file mode 100644
index e74389e551e..00000000000
--- a/sim/testsuite/m32r-elf/configure.in
+++ /dev/null
@@ -1,19 +0,0 @@
-dnl Process this file file with autoconf to produce a configure script.
-dnl This file is a shell script fragment that supplies the information
-dnl necessary to tailor a template configure script into the configure
-dnl script appropriate for this directory. For more information, check
-dnl any existing configure script.
-
-AC_PREREQ(2.5)
-dnl FIXME - think of a truly uniq file to this directory
-AC_INIT(Makefile.in)
-
-CC=${CC-cc}
-AC_SUBST(CC)
-AC_CONFIG_AUX_DIR(`cd $srcdir;pwd`/../../..)
-AC_CANONICAL_SYSTEM
-
-AC_SUBST(target_cpu)
-
-
-AC_OUTPUT(Makefile)
diff --git a/sim/testsuite/m32r-elf/exit47.s b/sim/testsuite/m32r-elf/exit47.s
deleted file mode 100644
index ab814e3ab9a..00000000000
--- a/sim/testsuite/m32r-elf/exit47.s
+++ /dev/null
@@ -1,7 +0,0 @@
- ;; Return with exit code 47.
-
- .globl _start
-_start:
- ldi8 r1,#47
- ldi8 r0,#1
- trap #0
diff --git a/sim/testsuite/m32r-elf/hello.s b/sim/testsuite/m32r-elf/hello.s
deleted file mode 100644
index a61693462fb..00000000000
--- a/sim/testsuite/m32r-elf/hello.s
+++ /dev/null
@@ -1,17 +0,0 @@
-
- .globl _start
-_start:
-
-; write (hello world)
- ldi8 r3,#14
- ld24 r2,#hello
- ldi8 r1,#1
- ldi8 r0,#5
- trap #0
-; exit (0)
- ldi8 r1,#0
- ldi8 r0,#1
- trap #0
-
-length: .long 14
-hello: .ascii "Hello World!\r\n"
diff --git a/sim/testsuite/m32r-elf/loop.s b/sim/testsuite/m32r-elf/loop.s
deleted file mode 100644
index b24cfb41fdd..00000000000
--- a/sim/testsuite/m32r-elf/loop.s
+++ /dev/null
@@ -1,2 +0,0 @@
- .globl _start
-_start: bra _start
diff --git a/sim/testsuite/mips64el-elf/ChangeLog b/sim/testsuite/mips64el-elf/ChangeLog
deleted file mode 100644
index 801ad223a20..00000000000
--- a/sim/testsuite/mips64el-elf/ChangeLog
+++ /dev/null
@@ -1,5 +0,0 @@
-Thu Aug 13 22:37:29 EDT 1998 Jim Lemke <jlemke@cygnus.com>
-
- * Makefile.in, configure, configure.in:
- Create a minimal testsuite.
-
diff --git a/sim/testsuite/mips64el-elf/Makefile.in b/sim/testsuite/mips64el-elf/Makefile.in
deleted file mode 100644
index c8191aea4ae..00000000000
--- a/sim/testsuite/mips64el-elf/Makefile.in
+++ /dev/null
@@ -1,171 +0,0 @@
-# Makefile for regression testing the GNU debugger.
-# Copyright (C) 1992, 1993, 1994, 1995 Free Software Foundation, Inc.
-
-# This file is part of GDB.
-
-# GDB is free software; you can redistribute it and/or modify
-# it under the terms of the GNU General Public License as published by
-# the Free Software Foundation; either version 2, or (at your option)
-# any later version.
-
-# GDB is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
-VPATH = @srcdir@
-srcdir = @srcdir@
-srcroot = $(srcdir)/..
-
-prefix = @prefix@
-exec_prefix = @exec_prefix@
-
-host_alias = @host_alias@
-target_alias = @target_alias@
-program_transform_name = @program_transform_name@
-build_canonical = @build@
-host_canonical = @host@
-target_canonical = @target@
-target_cpu = @target_cpu@
-
-
-SHELL = /bin/sh
-SUBDIRS = @subdirs@
-RPATH_ENVVAR = @RPATH_ENVVAR@
-
-EXPECT = `if [ -f $${rootme}/../../expect/expect ] ; then \
- echo $${rootme}/../../expect/expect ; \
- else echo expect ; fi`
-
-RUNTEST = $(RUNTEST_FOR_TARGET)
-
-RUNTESTFLAGS =
-
-RUNTEST_FOR_TARGET = `\
- if [ -f $${srcdir}/../../../dejagnu/runtest ]; then \
- echo $${srcdir}/../../../dejagnu/runtest; \
- else \
- if [ "$(host_canonical)" = "$(target_canonical)" ]; then \
- echo runtest; \
- else \
- t='$(program_transform_name)'; echo runtest | sed -e '' $$t; \
- fi; \
- fi`
-
-
-AS_FOR_TARGET = `\
- if [ -x ../../../gas/as-new ]; then \
- echo ../../../gas/as-new ; \
- else \
- echo $(target_alias)-as ; \
- fi`
-
-LD_FOR_TARGET = `\
- if [ -x ../../../ld/ld-new ]; then \
- echo ../../../ld/ld-new ; \
- else \
- echo $(target_alias)-ld ; \
- fi`
-
-RUN_FOR_TARGET = `\
- if [ -x ../../../sim/mips/run ]; then \
- echo ../../../sim/mips/run ; \
- else \
- echo $(target_alias)-run ; \
- fi`
-
-TESTS =
-
-check: sanity $(TESTS)
-sanity:
- @eval echo AS_FOR_TARGET = $(AS_FOR_TARGET)
- @eval echo LD_FOR_TARGET = $(LD_FOR_TARGET)
- @eval echo RUN_FOR_TARGET = $(RUN_FOR_TARGET)
-
-
-
-# Rules for running all the tests, put into three types
-# exit success, exit fail, print "Hello World"
-
-.u.log:
- uudecode $*.u
- $(RUN_FOR_TARGET) $* > $*.log
-
-
-# Rules for running the tests
-
-.SUFFIXES: .u .uue .ok .ok .run .hi .ko .ko
-.run.ok:
- rm -f tmp-$* $*.ok
- ulimit -t 5 ; $(RUN_FOR_TARGET) $*.run > tmp-$*
- mv tmp-$* $*.ok
-.run.hi:
- rm -f tmp-$* $*.hi diff-$*
- ulimit -t 5 ; $(RUN_FOR_TARGET) $*.run > tmp-$*
- echo 'Hello World!' | diff - tmp-$* > diff-$*
- cat tmp-$* diff-$* > $*.hi
-.run.ko:
- rm -f tmp-$* $*.ko
- set +e ; \
- ulimit -t 5 ; $(RUN_FOR_TARGET) $*.run > tmp-$* ; \
- if [ $$? -eq 47 ] ; then \
- exit 0 ; \
- else \
- exit 1 ; \
- fi
- mv tmp-$* $*.ko
-
-
-# Rules for building all the tests and packing them into
-# uuencoded files.
-
-.run.u:
- uuencode < $*.run $*.run > $*.u
- @echo "Move $*.u $*.uue"
-.uue.run:
- uudecode $(srcdir)/$*.uue
-.o.run:
- $(LD_FOR_TARGET) -Ttext 0xa0020000 -o $*.run $*.o
-.s.o:
- $(AS_FOR_TARGET) -I $(srcdir) $(srcdir)/$*.s -o $*.o
-
-
-#
-# Standard
-#
-clean mostlyclean:
- -rm -f *~ core *.o a.out *.x *.grt *.run tmp-* diff-*
- rm -f $(TESTS)
-# if [ x"${SUBDIRS}" != x ] ; then \
-# for dir in ${SUBDIRS}; \
-# do \
-# echo "$$dir:"; \
-# if [ -d $$dir ]; then \
-# (cd $$dir; $(MAKE) clean); \
-# fi; \
-# done ; \
-# else true; fi
-
-distclean maintainer-clean realclean: clean
- -rm -f *~ core
- -rm -f Makefile config.status *-init.exp
- -rm -fr *.log summary detail *.plog *.sum *.psum site.*
-# if [ x"${SUBDIRS}" != x ] ; then \
-# for dir in ${SUBDIRS}; \
-# do \
-# echo "$$dir:"; \
-# if [ -d $$dir ]; then \
-# (cd $$dir; $(MAKE) distclean); \
-# fi; \
-# done ; \
-# else true; fi
-
-Makefile : Makefile.in config.status
- $(SHELL) config.status
-
-config.status: configure
- $(SHELL) config.status --recheck
diff --git a/sim/testsuite/mips64el-elf/configure b/sim/testsuite/mips64el-elf/configure
deleted file mode 100755
index 86f083625a0..00000000000
--- a/sim/testsuite/mips64el-elf/configure
+++ /dev/null
@@ -1,904 +0,0 @@
-#! /bin/sh
-
-# Guess values for system-dependent variables and create Makefiles.
-# Generated automatically using autoconf version 2.12.2
-# Copyright (C) 1992, 93, 94, 95, 96 Free Software Foundation, Inc.
-#
-# This configure script is free software; the Free Software Foundation
-# gives unlimited permission to copy, distribute and modify it.
-
-# Defaults:
-ac_help=
-ac_default_prefix=/usr/local
-# Any additions from configure.in:
-
-# Initialize some variables set by options.
-# The variables have the same names as the options, with
-# dashes changed to underlines.
-build=NONE
-cache_file=./config.cache
-exec_prefix=NONE
-host=NONE
-no_create=
-nonopt=NONE
-no_recursion=
-prefix=NONE
-program_prefix=NONE
-program_suffix=NONE
-program_transform_name=s,x,x,
-silent=
-site=
-srcdir=
-target=NONE
-verbose=
-x_includes=NONE
-x_libraries=NONE
-bindir='${exec_prefix}/bin'
-sbindir='${exec_prefix}/sbin'
-libexecdir='${exec_prefix}/libexec'
-datadir='${prefix}/share'
-sysconfdir='${prefix}/etc'
-sharedstatedir='${prefix}/com'
-localstatedir='${prefix}/var'
-libdir='${exec_prefix}/lib'
-includedir='${prefix}/include'
-oldincludedir='/usr/include'
-infodir='${prefix}/info'
-mandir='${prefix}/man'
-
-# Initialize some other variables.
-subdirs=
-MFLAGS= MAKEFLAGS=
-SHELL=${CONFIG_SHELL-/bin/sh}
-# Maximum number of lines to put in a shell here document.
-ac_max_here_lines=12
-
-ac_prev=
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-
- # If the previous option needs an argument, assign it.
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- ac_prev=
- continue
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-
- case "$ac_option" in
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- *) ac_optarg= ;;
- esac
-
- # Accept the important Cygnus configure options, so we can diagnose typos.
-
- case "$ac_option" in
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- ac_prev=bindir ;;
- -bindir=* | --bindir=* | --bindi=* | --bind=* | --bin=* | --bi=*)
- bindir="$ac_optarg" ;;
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- ac_prev=build ;;
- -build=* | --build=* | --buil=* | --bui=* | --bu=*)
- build="$ac_optarg" ;;
-
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- ac_prev=cache_file ;;
- -cache-file=* | --cache-file=* | --cache-fil=* | --cache-fi=* \
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-
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-
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- # Omit some internal or obsolete options to make the list less imposing.
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-Configuration:
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- --help print this message
- --no-create do not create output files
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- --libexecdir=DIR program executables in DIR [EPREFIX/libexec]
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- [PREFIX/share]
- --sysconfdir=DIR read-only single-machine data in DIR [PREFIX/etc]
- --sharedstatedir=DIR modifiable architecture-independent data in DIR
- [PREFIX/com]
- --localstatedir=DIR modifiable single-machine data in DIR [PREFIX/var]
- --libdir=DIR object code libraries in DIR [EPREFIX/lib]
- --includedir=DIR C header files in DIR [PREFIX/include]
- --oldincludedir=DIR C header files for non-gcc in DIR [/usr/include]
- --infodir=DIR info documentation in DIR [PREFIX/info]
- --mandir=DIR man documentation in DIR [PREFIX/man]
- --srcdir=DIR find the sources in DIR [configure dir or ..]
- --program-prefix=PREFIX prepend PREFIX to installed program names
- --program-suffix=SUFFIX append SUFFIX to installed program names
- --program-transform-name=PROGRAM
- run sed PROGRAM on installed program names
-EOF
- cat << EOF
-Host type:
- --build=BUILD configure for building on BUILD [BUILD=HOST]
- --host=HOST configure for HOST [guessed]
- --target=TARGET configure for TARGET [TARGET=HOST]
-Features and packages:
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- --enable-FEATURE[=ARG] include FEATURE [ARG=yes]
- --with-PACKAGE[=ARG] use PACKAGE [ARG=yes]
- --without-PACKAGE do not use PACKAGE (same as --with-PACKAGE=no)
- --x-includes=DIR X include files are in DIR
- --x-libraries=DIR X library files are in DIR
-EOF
- if test -n "$ac_help"; then
- echo "--enable and --with options recognized:$ac_help"
- fi
- exit 0 ;;
-
- -host | --host | --hos | --ho)
- ac_prev=host ;;
- -host=* | --host=* | --hos=* | --ho=*)
- host="$ac_optarg" ;;
-
- -includedir | --includedir | --includedi | --included | --include \
- | --includ | --inclu | --incl | --inc)
- ac_prev=includedir ;;
- -includedir=* | --includedir=* | --includedi=* | --included=* | --include=* \
- | --includ=* | --inclu=* | --incl=* | --inc=*)
- includedir="$ac_optarg" ;;
-
- -infodir | --infodir | --infodi | --infod | --info | --inf)
- ac_prev=infodir ;;
- -infodir=* | --infodir=* | --infodi=* | --infod=* | --info=* | --inf=*)
- infodir="$ac_optarg" ;;
-
- -libdir | --libdir | --libdi | --libd)
- ac_prev=libdir ;;
- -libdir=* | --libdir=* | --libdi=* | --libd=*)
- libdir="$ac_optarg" ;;
-
- -libexecdir | --libexecdir | --libexecdi | --libexecd | --libexec \
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- ac_prev=libexecdir ;;
- -libexecdir=* | --libexecdir=* | --libexecdi=* | --libexecd=* | --libexec=* \
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- libexecdir="$ac_optarg" ;;
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-s%@SHELL@%$SHELL%g
-s%@CFLAGS@%$CFLAGS%g
-s%@CPPFLAGS@%$CPPFLAGS%g
-s%@CXXFLAGS@%$CXXFLAGS%g
-s%@DEFS@%$DEFS%g
-s%@LDFLAGS@%$LDFLAGS%g
-s%@LIBS@%$LIBS%g
-s%@exec_prefix@%$exec_prefix%g
-s%@prefix@%$prefix%g
-s%@program_transform_name@%$program_transform_name%g
-s%@bindir@%$bindir%g
-s%@sbindir@%$sbindir%g
-s%@libexecdir@%$libexecdir%g
-s%@datadir@%$datadir%g
-s%@sysconfdir@%$sysconfdir%g
-s%@sharedstatedir@%$sharedstatedir%g
-s%@localstatedir@%$localstatedir%g
-s%@libdir@%$libdir%g
-s%@includedir@%$includedir%g
-s%@oldincludedir@%$oldincludedir%g
-s%@infodir@%$infodir%g
-s%@mandir@%$mandir%g
-s%@CC@%$CC%g
-s%@host@%$host%g
-s%@host_alias@%$host_alias%g
-s%@host_cpu@%$host_cpu%g
-s%@host_vendor@%$host_vendor%g
-s%@host_os@%$host_os%g
-s%@target@%$target%g
-s%@target_alias@%$target_alias%g
-s%@target_cpu@%$target_cpu%g
-s%@target_vendor@%$target_vendor%g
-s%@target_os@%$target_os%g
-s%@build@%$build%g
-s%@build_alias@%$build_alias%g
-s%@build_cpu@%$build_cpu%g
-s%@build_vendor@%$build_vendor%g
-s%@build_os@%$build_os%g
-
-CEOF
-EOF
-
-cat >> $CONFIG_STATUS <<\EOF
-
-# Split the substitutions into bite-sized pieces for seds with
-# small command number limits, like on Digital OSF/1 and HP-UX.
-ac_max_sed_cmds=90 # Maximum number of lines to put in a sed script.
-ac_file=1 # Number of current file.
-ac_beg=1 # First line for current file.
-ac_end=$ac_max_sed_cmds # Line after last line for current file.
-ac_more_lines=:
-ac_sed_cmds=""
-while $ac_more_lines; do
- if test $ac_beg -gt 1; then
- sed "1,${ac_beg}d; ${ac_end}q" conftest.subs > conftest.s$ac_file
- else
- sed "${ac_end}q" conftest.subs > conftest.s$ac_file
- fi
- if test ! -s conftest.s$ac_file; then
- ac_more_lines=false
- rm -f conftest.s$ac_file
- else
- if test -z "$ac_sed_cmds"; then
- ac_sed_cmds="sed -f conftest.s$ac_file"
- else
- ac_sed_cmds="$ac_sed_cmds | sed -f conftest.s$ac_file"
- fi
- ac_file=`expr $ac_file + 1`
- ac_beg=$ac_end
- ac_end=`expr $ac_end + $ac_max_sed_cmds`
- fi
-done
-if test -z "$ac_sed_cmds"; then
- ac_sed_cmds=cat
-fi
-EOF
-
-cat >> $CONFIG_STATUS <<EOF
-
-CONFIG_FILES=\${CONFIG_FILES-"Makefile"}
-EOF
-cat >> $CONFIG_STATUS <<\EOF
-for ac_file in .. $CONFIG_FILES; do if test "x$ac_file" != x..; then
- # Support "outfile[:infile[:infile...]]", defaulting infile="outfile.in".
- case "$ac_file" in
- *:*) ac_file_in=`echo "$ac_file"|sed 's%[^:]*:%%'`
- ac_file=`echo "$ac_file"|sed 's%:.*%%'` ;;
- *) ac_file_in="${ac_file}.in" ;;
- esac
-
- # Adjust a relative srcdir, top_srcdir, and INSTALL for subdirectories.
-
- # Remove last slash and all that follows it. Not all systems have dirname.
- ac_dir=`echo $ac_file|sed 's%/[^/][^/]*$%%'`
- if test "$ac_dir" != "$ac_file" && test "$ac_dir" != .; then
- # The file is in a subdirectory.
- test ! -d "$ac_dir" && mkdir "$ac_dir"
- ac_dir_suffix="/`echo $ac_dir|sed 's%^\./%%'`"
- # A "../" for each directory in $ac_dir_suffix.
- ac_dots=`echo $ac_dir_suffix|sed 's%/[^/]*%../%g'`
- else
- ac_dir_suffix= ac_dots=
- fi
-
- case "$ac_given_srcdir" in
- .) srcdir=.
- if test -z "$ac_dots"; then top_srcdir=.
- else top_srcdir=`echo $ac_dots|sed 's%/$%%'`; fi ;;
- /*) srcdir="$ac_given_srcdir$ac_dir_suffix"; top_srcdir="$ac_given_srcdir" ;;
- *) # Relative path.
- srcdir="$ac_dots$ac_given_srcdir$ac_dir_suffix"
- top_srcdir="$ac_dots$ac_given_srcdir" ;;
- esac
-
-
- echo creating "$ac_file"
- rm -f "$ac_file"
- configure_input="Generated automatically from `echo $ac_file_in|sed 's%.*/%%'` by configure."
- case "$ac_file" in
- *Makefile*) ac_comsub="1i\\
-# $configure_input" ;;
- *) ac_comsub= ;;
- esac
-
- ac_file_inputs=`echo $ac_file_in|sed -e "s%^%$ac_given_srcdir/%" -e "s%:% $ac_given_srcdir/%g"`
- sed -e "$ac_comsub
-s%@configure_input@%$configure_input%g
-s%@srcdir@%$srcdir%g
-s%@top_srcdir@%$top_srcdir%g
-" $ac_file_inputs | (eval "$ac_sed_cmds") > $ac_file
-fi; done
-rm -f conftest.s*
-
-EOF
-cat >> $CONFIG_STATUS <<EOF
-
-EOF
-cat >> $CONFIG_STATUS <<\EOF
-
-exit 0
-EOF
-chmod +x $CONFIG_STATUS
-rm -fr confdefs* $ac_clean_files
-test "$no_create" = yes || ${CONFIG_SHELL-/bin/sh} $CONFIG_STATUS || exit 1
-
diff --git a/sim/testsuite/mips64el-elf/configure.in b/sim/testsuite/mips64el-elf/configure.in
deleted file mode 100644
index e74389e551e..00000000000
--- a/sim/testsuite/mips64el-elf/configure.in
+++ /dev/null
@@ -1,19 +0,0 @@
-dnl Process this file file with autoconf to produce a configure script.
-dnl This file is a shell script fragment that supplies the information
-dnl necessary to tailor a template configure script into the configure
-dnl script appropriate for this directory. For more information, check
-dnl any existing configure script.
-
-AC_PREREQ(2.5)
-dnl FIXME - think of a truly uniq file to this directory
-AC_INIT(Makefile.in)
-
-CC=${CC-cc}
-AC_SUBST(CC)
-AC_CONFIG_AUX_DIR(`cd $srcdir;pwd`/../../..)
-AC_CANONICAL_SYSTEM
-
-AC_SUBST(target_cpu)
-
-
-AC_OUTPUT(Makefile)
diff --git a/sim/testsuite/sim/fr30/add.cgs b/sim/testsuite/sim/fr30/add.cgs
deleted file mode 100644
index 1409df1b6fe..00000000000
--- a/sim/testsuite/sim/fr30/add.cgs
+++ /dev/null
@@ -1,55 +0,0 @@
-# fr30 testcase for add $Rj,$Ri, add $u4,$Rj
-# mach(): fr30
-
- .include "testutils.inc"
-
- START
-
- .text
- .global add
-add:
- ; Test add $Rj,$Ri
- mvi_h_gr 1,r7
- mvi_h_gr 2,r8
- set_cc 0x0f ; Set mask opposite of expected
- add r7,r8
- test_cc 0 0 0 0
- test_h_gr 3,r8
-
- mvi_h_gr 0x7fffffff,r7
- mvi_h_gr 1,r8
- set_cc 0x05 ; Set mask opposite of expected
- add r7,r8
- test_cc 1 0 1 0
- test_h_gr 0x80000000,r8
-
- set_cc 0x08 ; Set mask opposite of expected
- add r8,r8
- test_cc 0 1 1 1
- test_h_gr 0,r8
-
- ; Test add $u4Ri
- mvi_h_gr 4,r8
- set_cc 0x0f ; Set mask opposite of expected
- add 0,r8
- test_cc 0 0 0 0
- test_h_gr 4,r8
- set_cc 0x0f ; Set mask opposite of expected
- add 1,r8
- test_cc 0 0 0 0
- test_h_gr 5,r8
- set_cc 0x0f ; Set mask opposite of expected
- add 15,r8
- test_cc 0 0 0 0
- test_h_gr 20,r8
- mvi_h_gr 0x7fffffff,r8 ; test neg and overflow bits
- set_cc 0x05 ; Set mask opposite of expected
- add 1,r8
- test_cc 1 0 1 0
- test_h_gr 0x80000000,r8
- set_cc 0x08 ; Set mask opposite of expected
- add r8,r8 ; test zero, carry and overflow bits
- test_cc 0 1 1 1;
- test_h_gr 0,r8
-
- pass
diff --git a/sim/testsuite/sim/fr30/add.ms b/sim/testsuite/sim/fr30/add.ms
deleted file mode 100644
index 9da6868a110..00000000000
--- a/sim/testsuite/sim/fr30/add.ms
+++ /dev/null
@@ -1,13 +0,0 @@
-# fr30 testcase for add $Rj,$Ri
-# cpu {}
-
- .include "testutils.inc"
-
- START
-
- .text
- .global add
-add:
- add ac,ac
- fail
- EXIT 0
diff --git a/sim/testsuite/sim/fr30/add2.cgs b/sim/testsuite/sim/fr30/add2.cgs
deleted file mode 100644
index 856acde6fe8..00000000000
--- a/sim/testsuite/sim/fr30/add2.cgs
+++ /dev/null
@@ -1,43 +0,0 @@
-# fr30 testcase for add2 $m4,$Ri
-# mach(): fr30
-
- .include "testutils.inc"
-
- START
-
- .text
- .global add
-add:
- mvi_h_gr 30,r8
- set_cc 0x0e ; Set mask opposite of expected
- add2 -16,r8 ; Max value of immediate field
- test_cc 0 0 0 1
- test_h_gr 14,r8
-
- set_cc 0x0e ; Set mask opposite of expected
- add2 -3,r8 ; Mid value of immediate field
- test_cc 0 0 0 1
- test_h_gr 11,r8
-
- set_cc 0x0e ; Set mask opposite of expected
- add2 -1,r8 ; Min value of immediate field
- test_cc 0 0 0 1
- test_h_gr 10,r8
-
- set_cc 0x0a ; Set mask opposite of expected
- add2 -10,r8 ; Test zero and carry bits
- test_cc 0 1 0 1
- test_h_gr 0,r8
-
- set_cc 0x07 ; Set mask opposite of expected
- add2 -16,r8 ; Test negative bit
- test_cc 1 0 0 0
- test_h_gr -16,r8
-
- mvi_h_gr 0x80000000,r8
- set_cc 0x0c ; Set mask opposite of expected
- add2 -1,r8 ; Test overflow bit
- test_cc 0 0 1 1
- test_h_gr 0x7fffffff,r8
-
- pass
diff --git a/sim/testsuite/sim/fr30/addc.cgs b/sim/testsuite/sim/fr30/addc.cgs
deleted file mode 100644
index e13547894b6..00000000000
--- a/sim/testsuite/sim/fr30/addc.cgs
+++ /dev/null
@@ -1,50 +0,0 @@
-# fr30 testcase for addc $Rj,$Ri
-# mach(): fr30
-
- .include "testutils.inc"
-
- START
-
- .text
- .global add
-add:
- mvi_h_gr 1,r7
- mvi_h_gr 2,r8
- set_cc 0x0e ; Make sure carry bit is off
- addc r7,r8
- test_cc 0 0 0 0
- test_h_gr 3,r8
-
- mvi_h_gr 0x7fffffff,r7
- mvi_h_gr 1,r8
- set_cc 0x04 ; Make sure carry bit is off
- addc r7,r8
- test_cc 1 0 1 0
- test_h_gr 0x80000000,r8
-
- set_cc 0x08 ; Make sure carry bit is off
- addc r8,r8
- test_cc 0 1 1 1
- test_h_gr 0,r8
-
- mvi_h_gr 1,r7
- mvi_h_gr 2,r8
- set_cc 0x0f ; Make sure carry bit is on
- addc r7,r8
- test_cc 0 0 0 0
- test_h_gr 4,r8
-
- mvi_h_gr 0x7fffffff,r7
- mvi_h_gr 0,r8
- set_cc 0x05 ; Make sure carry bit is on
- addc r7,r8
- test_cc 1 0 1 0
- test_h_gr 0x80000000,r8
-
- mvi_h_gr 0x7fffffff,r7
- set_cc 0x0b ; Make sure carry bit is on
- addc r7,r8
- test_cc 0 1 0 1;
- test_h_gr 0,r8
-
- pass
diff --git a/sim/testsuite/sim/fr30/addn.cgs b/sim/testsuite/sim/fr30/addn.cgs
deleted file mode 100644
index b7638d61995..00000000000
--- a/sim/testsuite/sim/fr30/addn.cgs
+++ /dev/null
@@ -1,55 +0,0 @@
-# fr30 testcase for addn $Rj,$Ri, addn $u4,$Rj
-# mach(): fr30
-
- .include "testutils.inc"
-
- START
-
- .text
- .global addn
-addn:
- ; Test addn $Rj,$Ri
- mvi_h_gr 1,r7
- mvi_h_gr 2,r8
- set_cc 0x0f ; Set mask opposite of normal result
- addn r7,r8
- test_cc 1 1 1 1
- test_h_gr 3,r8
-
- mvi_h_gr 0x7fffffff,r7
- mvi_h_gr 1,r8
- set_cc 0x05 ; Set mask opposite of normal result
- addn r7,r8
- test_cc 0 1 0 1
- test_h_gr 0x80000000,r8
-
- set_cc 0x08 ; Set mask opposite of normal result
- addn r8,r8
- test_cc 1 0 0 0
- test_h_gr 0,r8
-
- ; Test addn $u4Ri
- mvi_h_gr 4,r8
- set_cc 0x0f ; Set mask opposite of normal result
- addn 0,r8
- test_cc 1 1 1 1
- test_h_gr 4,r8
- set_cc 0x0f ; Set mask opposite of normal result
- addn 1,r8
- test_cc 1 1 1 1
- test_h_gr 5,r8
- set_cc 0x0f ; Set mask opposite of normal result
- addn 15,r8
- test_cc 1 1 1 1
- test_h_gr 20,r8
- mvi_h_gr 0x7fffffff,r8 ; test neg and overflow bits
- set_cc 0x05 ; Set mask opposite of normal result
- addn 1,r8
- test_cc 0 1 0 1
- test_h_gr 0x80000000,r8
- set_cc 0x08 ; Set mask opposite of normal result
- addn r8,r8 ; test zero, carry and overflow bits
- test_cc 1 0 0 0;
- test_h_gr 0,r8
-
- pass
diff --git a/sim/testsuite/sim/fr30/addn2.cgs b/sim/testsuite/sim/fr30/addn2.cgs
deleted file mode 100644
index 9525baf4502..00000000000
--- a/sim/testsuite/sim/fr30/addn2.cgs
+++ /dev/null
@@ -1,43 +0,0 @@
-# fr30 testcase for addn2 $m4,$Ri
-# mach(): fr30
-
- .include "testutils.inc"
-
- START
-
- .text
- .global add
-add:
- mvi_h_gr 30,r8
- set_cc 0x0e ; Set mask opposite of normal result
- addn2 -16,r8 ; Max value of immediate field
- test_cc 1 1 1 0
- test_h_gr 14,r8
-
- set_cc 0x0e ; Set mask opposite of normal result
- addn2 -3,r8 ; Mid value of immediate field
- test_cc 1 1 1 0
- test_h_gr 11,r8
-
- set_cc 0x0e ; Set mask opposite of normal result
- addn2 -1,r8 ; Min value of immediate field
- test_cc 1 1 1 0
- test_h_gr 10,r8
-
- set_cc 0x0a ; Set mask opposite of normal result
- addn2 -10,r8 ; Test zero and carry bits
- test_cc 1 0 1 0
- test_h_gr 0,r8
-
- set_cc 0x07 ; Set mask opposite of normal result
- addn2 -16,r8 ; Test negative bit
- test_cc 0 1 1 1
- test_h_gr -16,r8
-
- mvi_h_gr 0x80000000,r8
- set_cc 0x0c ; Set mask opposite of normal result
- addn2 -1,r8 ; Test overflow bit
- test_cc 1 1 0 0
- test_h_gr 0x7fffffff,r8
-
- pass
diff --git a/sim/testsuite/sim/fr30/addsp.cgs b/sim/testsuite/sim/fr30/addsp.cgs
deleted file mode 100644
index da5bc36b86a..00000000000
--- a/sim/testsuite/sim/fr30/addsp.cgs
+++ /dev/null
@@ -1,31 +0,0 @@
-# fr30 testcase for addsp $s10
-# mach(): fr30
-
- .include "testutils.inc"
-
- START
-
- .text
- .global addsp
-addsp:
- ; Test addsp $s10
- mvr_h_gr sp,r7 ; save stack pointer permanently
- mvr_h_gr sp,r8 ; Shadow updated sp
- set_cc 0x0f ; Condition codes are irrelevent
- addsp 508
- test_cc 1 1 1 1
- inci_h_gr 508,r8
- testr_h_gr r8,sp
-
- set_cc 0x0e ; Condition codes are irrelevent
- addsp 0
- test_cc 1 1 1 0
- testr_h_gr r8,sp
-
- set_cc 0x0d ; Condition codes are irrelevent
- addsp -512
- test_cc 1 1 0 1
- inci_h_gr -512,r8
- testr_h_gr r8,sp
-
- pass
diff --git a/sim/testsuite/sim/fr30/allinsn.exp b/sim/testsuite/sim/fr30/allinsn.exp
deleted file mode 100644
index 8c3d5121113..00000000000
--- a/sim/testsuite/sim/fr30/allinsn.exp
+++ /dev/null
@@ -1,19 +0,0 @@
-# FR30 simulator testsuite.
-
-if [istarget fr30*-*-*] {
- # load support procs
- # load_lib cgen.exp
-
- # all machines
- set all_machs "fr30"
-
- foreach src [lsort [glob -nocomplain $srcdir/$subdir/*.cgs]] {
- # If we're only testing specific files and this isn't one of them,
- # skip it.
- if ![runtest_file_p $runtests $src] {
- continue
- }
-
- run_sim_test $src $all_machs
- }
-}
diff --git a/sim/testsuite/sim/fr30/and.cgs b/sim/testsuite/sim/fr30/and.cgs
deleted file mode 100644
index 3148a311915..00000000000
--- a/sim/testsuite/sim/fr30/and.cgs
+++ /dev/null
@@ -1,57 +0,0 @@
-# fr30 testcase for and $Rj,$Ri, and $Rj,@$Ri
-# mach(): fr30
-
- .include "testutils.inc"
-
- START
-
- .text
- .global and
-and:
- ; Test and $Rj,$Ri
- mvi_h_gr 0xaaaaaaaa,r7
- mvi_h_gr 0x55555555,r8
- set_cc 0x0b ; Set mask opposite of expected
- and r7,r8
- test_cc 0 1 1 1
- test_h_gr 0,r8
-
- mvi_h_gr 0xffff0000,r8
- set_cc 0x04 ; Set mask opposite of expected
- and r7,r8
- test_cc 1 0 0 0
- test_h_gr 0xaaaa0000,r8
-
- mvi_h_gr 0xffff,r8
- set_cc 0x0d ; Set mask opposite of expected
- and r7,r8
- test_cc 0 0 0 1
- test_h_gr 0xaaaa,r8
-
- ; Test and $Rj,@$Ri
- mvi_h_gr 0xaaaaaaaa,r7
- mvi_h_mem 0x55555555,sp
- set_cc 0x0b ; Set mask opposite of expected
- and r7,@sp
- test_cc 0 1 1 1
- test_h_mem 0,sp
-
- mvi_h_mem 0xffff0000,sp
- set_cc 0x04 ; Set mask opposite of expected
- and r7,@sp
- test_cc 1 0 0 0
- test_h_mem 0xaaaa0000,sp
-
- mvr_h_gr sp,r9
- inci_h_gr 4,r9
- mvi_h_mem 0xffffffff,sp
- mvi_h_mem 0xffff0000,r9
- inci_h_gr 1,sp ; test unaligned access
- set_cc 0x05 ; Set mask opposite of expected
- and r7,@sp
- test_cc 1 0 0 1
- inci_h_gr -1,sp
- test_h_mem 0xaaaaaaaa,sp
- test_h_mem 0xffff0000,r9
-
- pass
diff --git a/sim/testsuite/sim/fr30/andb.cgs b/sim/testsuite/sim/fr30/andb.cgs
deleted file mode 100644
index c01d49d276b..00000000000
--- a/sim/testsuite/sim/fr30/andb.cgs
+++ /dev/null
@@ -1,31 +0,0 @@
-# fr30 testcase for andb $Rj,@$Ri
-# mach(): fr30
-
- .include "testutils.inc"
-
- START
-
- .text
- .global andb
-andb:
- ; Test andb $Rj,@$Ri
- mvi_h_gr 0xaaaaaaaa,r7
- mvi_h_mem 0x55555555,sp
- set_cc 0x0b ; Set mask opposite of expected
- andb r7,@sp
- test_cc 0 1 1 1
- test_h_mem 0x00555555,sp
-
- mvi_h_mem 0xffffffff,sp
- set_cc 0x04 ; Set mask opposite of expected
- andb r7,@sp
- test_cc 1 0 0 0
- test_h_mem 0xaaffffff,sp
-
- mvi_h_mem 0x0fffffff,sp
- set_cc 0x0d ; Set mask opposite of expected
- andb r7,@sp
- test_cc 0 0 0 1
- test_h_mem 0x0affffff,sp
-
- pass
diff --git a/sim/testsuite/sim/fr30/andccr.cgs b/sim/testsuite/sim/fr30/andccr.cgs
deleted file mode 100644
index 7f8f99e25f5..00000000000
--- a/sim/testsuite/sim/fr30/andccr.cgs
+++ /dev/null
@@ -1,51 +0,0 @@
-# fr30 testcase for andccr $u8
-# mach(): fr30
-
- .include "testutils.inc"
-
- START
-
- .text
- .global andccr
-andccr:
- set_cc 0x00
- set_i 0
- set_s_system
- andccr 0xff
- test_cc 0 0 0 0
- test_i 0
- test_s_system
-
- set_cc 0x0f
- set_i 1
- set_s_user
- andccr 0xff
- test_cc 1 1 1 1
- test_i 1
- test_s_user
-
- set_cc 0x0f
- set_i 1
- set_s_user
- andccr 0xaa
- test_cc 1 0 1 0
- test_i 0
- test_s_user
-
- set_cc 0x0f
- set_i 1
- set_s_user
- andccr 0xc0
- test_cc 0 0 0 0
- test_i 0
- test_s_system
-
- set_cc 0x0f
- set_i 1
- set_s_user
- andccr 0x3f ; no effect
- test_cc 1 1 1 1
- test_i 1
- test_s_user
-
- pass
diff --git a/sim/testsuite/sim/fr30/andh.cgs b/sim/testsuite/sim/fr30/andh.cgs
deleted file mode 100644
index a172fc764f2..00000000000
--- a/sim/testsuite/sim/fr30/andh.cgs
+++ /dev/null
@@ -1,31 +0,0 @@
-# fr30 testcase for andh $Rj,@$Ri
-# mach(): fr30
-
- .include "testutils.inc"
-
- START
-
- .text
- .global andh
-andh:
- ; Test andh $Rj,@$Ri
- mvi_h_gr 0xaaaaaaaa,r7
- mvi_h_mem 0x55555555,sp
- set_cc 0x0b ; Set mask opposite of expected
- andh r7,@sp
- test_cc 0 1 1 1
- test_h_mem 0x00005555,sp
-
- mvi_h_mem 0xffffffff,sp
- set_cc 0x04 ; Set mask opposite of expected
- andh r7,@sp
- test_cc 1 0 0 0
- test_h_mem 0xaaaaffff,sp
-
- mvi_h_mem 0x00ffffff,sp
- set_cc 0x0d ; Set mask opposite of expected
- andh r7,@sp
- test_cc 0 0 0 1
- test_h_mem 0x00aaffff,sp
-
- pass
diff --git a/sim/testsuite/sim/fr30/asr.cgs b/sim/testsuite/sim/fr30/asr.cgs
deleted file mode 100644
index f783d41ba3d..00000000000
--- a/sim/testsuite/sim/fr30/asr.cgs
+++ /dev/null
@@ -1,65 +0,0 @@
-# fr30 testcase for asr $Rj,$Ri, asr $u4,$Rj
-# mach(): fr30
-
- .include "testutils.inc"
-
- START
-
- .text
- .global asr
-asr:
- ; Test asr $Rj,$Ri
- mvi_h_gr 0xdeadbee0,r7 ; Shift by 0
- mvi_h_gr 0x80000000,r8
- set_cc 0x05 ; Set mask opposite of expected
- asr r7,r8
- test_cc 1 0 0 0
- test_h_gr 0x80000000,r8
-
- mvi_h_gr 0xdeadbee1,r7 ; Shift by 1
- mvi_h_gr 0x80000000,r8
- set_cc 0x07 ; Set mask opposite of expected
- asr r7,r8
- test_cc 1 0 1 0
- test_h_gr 0xc0000000,r8
-
- mvi_h_gr 0xdeadbeff,r7 ; Shift by 31
- mvi_h_gr 0x80000000,r8
- set_cc 0x07 ; Set mask opposite of expected
- asr r7,r8
- test_cc 1 0 1 0
- test_h_gr -1,r8
-
- mvi_h_gr 0xdeadbeff,r7 ; clear register
- mvi_h_gr 0x40000000,r8
- set_cc 0x0a ; Set mask opposite of expected
- asr r7,r8
- test_cc 0 1 1 1
- test_h_gr 0x00000000,r8
-
- ; Test asr $u4Ri
- mvi_h_gr 0x80000000,r8
- set_cc 0x05 ; Set mask opposite of expected
- asr 0,r8
- test_cc 1 0 0 0
- test_h_gr 0x80000000,r8
-
- mvi_h_gr 0x80000000,r8
- set_cc 0x07 ; Set mask opposite of expected
- asr 1,r8
- test_cc 1 0 1 0
- test_h_gr 0xc0000000,r8
-
- mvi_h_gr 0x80000000,r8
- set_cc 0x07 ; Set mask opposite of expected
- asr 15,r8
- test_cc 1 0 1 0
- test_h_gr 0xffff0000,r8
-
- mvi_h_gr 0x00004000,r8
- set_cc 0x0a ; Set mask opposite of expected
- asr 15,r8
- test_cc 0 1 1 1
- test_h_gr 0x00000000,r8
-
- pass
diff --git a/sim/testsuite/sim/fr30/asr2.cgs b/sim/testsuite/sim/fr30/asr2.cgs
deleted file mode 100644
index 884e40d5c84..00000000000
--- a/sim/testsuite/sim/fr30/asr2.cgs
+++ /dev/null
@@ -1,36 +0,0 @@
-# fr30 testcase for asr2 $u4,$Rj
-# mach(): fr30
-
- .include "testutils.inc"
-
- START
-
- .text
- .global asr2
-asr2:
- ; Test asr2 $u4Ri
- mvi_h_gr 0x80000000,r8
- set_cc 0x05 ; Set mask opposite of expected
- asr2 0,r8
- test_cc 1 0 0 0
- test_h_gr 0xffff8000,r8
-
- mvi_h_gr 0x80000000,r8
- set_cc 0x07 ; Set mask opposite of expected
- asr2 1,r8
- test_cc 1 0 1 0
- test_h_gr 0xffffc000,r8
-
- mvi_h_gr 0x80000000,r8
- set_cc 0x07 ; Set mask opposite of expected
- asr2 15,r8
- test_cc 1 0 1 0
- test_h_gr -1,r8
-
- mvi_h_gr 0x40000000,r8
- set_cc 0x0a ; Set mask opposite of expected
- asr2 15,r8
- test_cc 0 1 1 1
- test_h_gr 0x00000000,r8
-
- pass
diff --git a/sim/testsuite/sim/fr30/bandh.cgs b/sim/testsuite/sim/fr30/bandh.cgs
deleted file mode 100644
index 45ab5e59f3a..00000000000
--- a/sim/testsuite/sim/fr30/bandh.cgs
+++ /dev/null
@@ -1,30 +0,0 @@
-# fr30 testcase for bandh $Rj,@$Ri
-# mach(): fr30
-
- .include "testutils.inc"
-
- START
-
- .text
- .global bandh
-bandh:
- ; Test bandh $Rj,@$Ri
- mvi_h_mem 0x55555555,sp
- set_cc 0x0f ; Condition codes should not change
- bandh 0x0a,@sp
- test_cc 1 1 1 1
- test_h_mem 0x05555555,sp
-
- mvi_h_mem 0xffffffff,sp
- set_cc 0x04 ; Condition codes should not change
- bandh 0x0a,@sp
- test_cc 0 1 0 0
- test_h_mem 0xafffffff,sp
-
- mvi_h_mem 0xe5ffffff,sp
- set_cc 0x0a ; Condition codes should not change
- bandh 0x07,@sp
- test_cc 1 0 1 0
- test_h_mem 0x65ffffff,sp
-
- pass
diff --git a/sim/testsuite/sim/fr30/bandl.cgs b/sim/testsuite/sim/fr30/bandl.cgs
deleted file mode 100644
index 9cd4825965a..00000000000
--- a/sim/testsuite/sim/fr30/bandl.cgs
+++ /dev/null
@@ -1,30 +0,0 @@
-# fr30 testcase for bandl $Rj,@$Ri
-# mach(): fr30
-
- .include "testutils.inc"
-
- START
-
- .text
- .global bandl
-bandl:
- ; Test bandl $Rj,@$Ri
- mvi_h_mem 0x55555555,sp
- set_cc 0x0f ; Condition codes should not change
- bandl 0x0a,@sp
- test_cc 1 1 1 1
- test_h_mem 0x50555555,sp
-
- mvi_h_mem 0xffffffff,sp
- set_cc 0x04 ; Condition codes should not change
- bandl 0x0a,@sp
- test_cc 0 1 0 0
- test_h_mem 0xfaffffff,sp
-
- mvi_h_mem 0x5effffff,sp
- set_cc 0x0a ; Condition codes should not change
- bandl 0x07,@sp
- test_cc 1 0 1 0
- test_h_mem 0x56ffffff,sp
-
- pass
diff --git a/sim/testsuite/sim/fr30/bc.cgs b/sim/testsuite/sim/fr30/bc.cgs
deleted file mode 100644
index 0502625d32e..00000000000
--- a/sim/testsuite/sim/fr30/bc.cgs
+++ /dev/null
@@ -1,109 +0,0 @@
-# fr30 testcase for bc $label9
-# mach(): fr30
-
- .include "testutils.inc"
-
- START
-
- .text
- .global bc
-bc:
- ; Test bc $label9
- set_cc 0x0f ; condition codes are irrelevent
- take_branch bc
-
- set_cc 0x0e ; condition codes are irrelevent
- no_branch bc
-
- set_cc 0x0d ; condition codes are irrelevent
- take_branch bc
-
- set_cc 0x0c ; condition codes are irrelevent
- no_branch bc
-
- set_cc 0x0b ; condition codes are irrelevent
- take_branch bc
-
- set_cc 0x0a ; condition codes are irrelevent
- no_branch bc
-
- set_cc 0x09 ; condition codes are irrelevent
- take_branch bc
-
- set_cc 0x08 ; condition codes are irrelevent
- no_branch bc
-
- set_cc 0x07 ; condition codes are irrelevent
- take_branch bc
-
- set_cc 0x06 ; condition codes are irrelevent
- no_branch bc
-
- set_cc 0x05 ; condition codes are irrelevent
- take_branch bc
-
- set_cc 0x04 ; condition codes are irrelevent
- no_branch bc
-
- set_cc 0x03 ; condition codes are irrelevent
- take_branch bc
-
- set_cc 0x02 ; condition codes are irrelevent
- no_branch bc
-
- set_cc 0x01 ; condition codes are irrelevent
- take_branch bc
-
- set_cc 0x00 ; condition codes are irrelevent
- no_branch bc
-
- ; Test bc:d label9
- set_cc 0x0f ; condition codes are irrelevent
- take_branch_d bc:d 0xf
-
- set_cc 0x0e ; condition codes are irrelevent
- no_branch_d bc:d 0xe
-
- set_cc 0x0d ; condition codes are irrelevent
- take_branch_d bc:d 0xd
-
- set_cc 0x0c ; condition codes are irrelevent
- no_branch_d bc:d 0xc
-
- set_cc 0x0b ; condition codes are irrelevent
- take_branch_d bc:d 0xb
-
- set_cc 0x0a ; condition codes are irrelevent
- no_branch_d bc:d 0xa
-
- set_cc 0x09 ; condition codes are irrelevent
- take_branch_d bc:d 0x9
-
- set_cc 0x08 ; condition codes are irrelevent
- no_branch_d bc:d 0x8
-
- set_cc 0x07 ; condition codes are irrelevent
- take_branch_d bc:d 0x7
-
- set_cc 0x06 ; condition codes are irrelevent
- no_branch_d bc:d 0x6
-
- set_cc 0x05 ; condition codes are irrelevent
- take_branch_d bc:d 0x5
-
- set_cc 0x04 ; condition codes are irrelevent
- no_branch_d bc:d 0x4
-
- set_cc 0x03 ; condition codes are irrelevent
- take_branch_d bc:d 0x3
-
- set_cc 0x02 ; condition codes are irrelevent
- no_branch_d bc:d 0x2
-
- set_cc 0x01 ; condition codes are irrelevent
- take_branch_d bc:d 0x1
-
- set_cc 0x00 ; condition codes are irrelevent
- no_branch_d bc:d 0x0
-
- pass
diff --git a/sim/testsuite/sim/fr30/beorh.cgs b/sim/testsuite/sim/fr30/beorh.cgs
deleted file mode 100644
index 6d07f1af788..00000000000
--- a/sim/testsuite/sim/fr30/beorh.cgs
+++ /dev/null
@@ -1,36 +0,0 @@
-# fr30 testcase for beorh $Rj,@$Ri
-# mach(): fr30
-
- .include "testutils.inc"
-
- START
-
- .text
- .global beorh
-beorh:
- ; Test beorh $Rj,@$Ri
- mvi_h_mem 0x55555555,sp
- set_cc 0x0f ; Condition codes should not change
- beorh 0x0a,@sp
- test_cc 1 1 1 1
- test_h_mem 0xf5555555,sp
-
- mvi_h_mem 0x0fffffff,sp
- set_cc 0x04 ; Condition codes should not change
- beorh 0x00,@sp
- test_cc 0 1 0 0
- test_h_mem 0x0fffffff,sp
-
- mvi_h_mem 0xffffffff,sp
- set_cc 0x0a ; Condition codes should not change
- beorh 0x0f,@sp
- test_cc 1 0 1 0
- test_h_mem 0x0fffffff,sp
-
- mvi_h_mem 0x9eadbeef,sp
- set_cc 0x09 ; Condition codes should not change
- beorh 0x04,@sp
- test_cc 1 0 0 1
- test_h_mem 0xdeadbeef,sp
-
- pass
diff --git a/sim/testsuite/sim/fr30/beorl.cgs b/sim/testsuite/sim/fr30/beorl.cgs
deleted file mode 100644
index f7ea05347b3..00000000000
--- a/sim/testsuite/sim/fr30/beorl.cgs
+++ /dev/null
@@ -1,36 +0,0 @@
-# fr30 testcase for beorl $Rj,@$Ri
-# mach(): fr30
-
- .include "testutils.inc"
-
- START
-
- .text
- .global beorl
-beorl:
- ; Test beorl $Rj,@$Ri
- mvi_h_mem 0x55555555,sp
- set_cc 0x0f ; Condition codes should not change
- beorl 0x0a,@sp
- test_cc 1 1 1 1
- test_h_mem 0x5f555555,sp
-
- mvi_h_mem 0xf0ffffff,sp
- set_cc 0x04 ; Condition codes should not change
- beorl 0x00,@sp
- test_cc 0 1 0 0
- test_h_mem 0xf0ffffff,sp
-
- mvi_h_mem 0xffffffff,sp
- set_cc 0x0a ; Condition codes should not change
- beorl 0x0f,@sp
- test_cc 1 0 1 0
- test_h_mem 0xf0ffffff,sp
-
- mvi_h_mem 0xddadbeef,sp
- set_cc 0x09 ; Condition codes should not change
- beorl 0x03,@sp
- test_cc 1 0 0 1
- test_h_mem 0xdeadbeef,sp
-
- pass
diff --git a/sim/testsuite/sim/fr30/beq.cgs b/sim/testsuite/sim/fr30/beq.cgs
deleted file mode 100644
index edd797e4ed2..00000000000
--- a/sim/testsuite/sim/fr30/beq.cgs
+++ /dev/null
@@ -1,109 +0,0 @@
-# fr30 testcase for beq $label9
-# mach(): fr30
-
- .include "testutils.inc"
-
- START
-
- .text
- .global beq
-beq:
- ; Test beq $label9
- set_cc 0x0f ; condition codes are irrelevent
- take_branch beq
-
- set_cc 0x0e ; condition codes are irrelevent
- take_branch beq
-
- set_cc 0x0d ; condition codes are irrelevent
- take_branch beq
-
- set_cc 0x0c ; condition codes are irrelevent
- take_branch beq
-
- set_cc 0x0b ; condition codes are irrelevent
- no_branch beq
-
- set_cc 0x0a ; condition codes are irrelevent
- no_branch beq
-
- set_cc 0x09 ; condition codes are irrelevent
- no_branch beq
-
- set_cc 0x08 ; condition codes are irrelevent
- no_branch beq
-
- set_cc 0x07 ; condition codes are irrelevent
- take_branch beq
-
- set_cc 0x06 ; condition codes are irrelevent
- take_branch beq
-
- set_cc 0x05 ; condition codes are irrelevent
- take_branch beq
-
- set_cc 0x04 ; condition codes are irrelevent
- take_branch beq
-
- set_cc 0x03 ; condition codes are irrelevent
- no_branch beq
-
- set_cc 0x02 ; condition codes are irrelevent
- no_branch beq
-
- set_cc 0x01 ; condition codes are irrelevent
- no_branch beq
-
- set_cc 0x00 ; condition codes are irrelevent
- no_branch beq
-
- ; Test beq:d label9
- set_cc 0x0f ; condition codes are irrelevent
- take_branch_d beq:d 0xf
-
- set_cc 0x0e ; condition codes are irrelevent
- take_branch_d beq:d 0xe
-
- set_cc 0x0d ; condition codes are irrelevent
- take_branch_d beq:d 0xd
-
- set_cc 0x0c ; condition codes are irrelevent
- take_branch_d beq:d 0xc
-
- set_cc 0x0b ; condition codes are irrelevent
- no_branch_d beq:d 0xb
-
- set_cc 0x0a ; condition codes are irrelevent
- no_branch_d beq:d 0xa
-
- set_cc 0x09 ; condition codes are irrelevent
- no_branch_d beq:d 0x9
-
- set_cc 0x08 ; condition codes are irrelevent
- no_branch_d beq:d 0x8
-
- set_cc 0x07 ; condition codes are irrelevent
- take_branch_d beq:d 0x7
-
- set_cc 0x06 ; condition codes are irrelevent
- take_branch_d beq:d 0x6
-
- set_cc 0x05 ; condition codes are irrelevent
- take_branch_d beq:d 0x5
-
- set_cc 0x04 ; condition codes are irrelevent
- take_branch_d beq:d 0x4
-
- set_cc 0x03 ; condition codes are irrelevent
- no_branch_d beq:d 0x3
-
- set_cc 0x02 ; condition codes are irrelevent
- no_branch_d beq:d 0x2
-
- set_cc 0x01 ; condition codes are irrelevent
- no_branch_d beq:d 0x1
-
- set_cc 0x00 ; condition codes are irrelevent
- no_branch_d beq:d 0x0
-
- pass
diff --git a/sim/testsuite/sim/fr30/bge.cgs b/sim/testsuite/sim/fr30/bge.cgs
deleted file mode 100644
index dd7796ccd94..00000000000
--- a/sim/testsuite/sim/fr30/bge.cgs
+++ /dev/null
@@ -1,109 +0,0 @@
-# fr30 testcase for bge $label9
-# mach(): fr30
-
- .include "testutils.inc"
-
- START
-
- .text
- .global bge
-bge:
- ; Test bge $label9
- set_cc 0x0f ; condition codes are irrelevent
- take_branch bge
-
- set_cc 0x0e ; condition codes are irrelevent
- take_branch bge
-
- set_cc 0x0d ; condition codes are irrelevent
- no_branch bge
-
- set_cc 0x0c ; condition codes are irrelevent
- no_branch bge
-
- set_cc 0x0b ; condition codes are irrelevent
- take_branch bge
-
- set_cc 0x0a ; condition codes are irrelevent
- take_branch bge
-
- set_cc 0x09 ; condition codes are irrelevent
- no_branch bge
-
- set_cc 0x08 ; condition codes are irrelevent
- no_branch bge
-
- set_cc 0x07 ; condition codes are irrelevent
- no_branch bge
-
- set_cc 0x06 ; condition codes are irrelevent
- no_branch bge
-
- set_cc 0x05 ; condition codes are irrelevent
- take_branch bge
-
- set_cc 0x04 ; condition codes are irrelevent
- take_branch bge
-
- set_cc 0x03 ; condition codes are irrelevent
- no_branch bge
-
- set_cc 0x02 ; condition codes are irrelevent
- no_branch bge
-
- set_cc 0x01 ; condition codes are irrelevent
- take_branch bge
-
- set_cc 0x00 ; condition codes are irrelevent
- take_branch bge
-
- ; Test bge:d label9
- set_cc 0x0f ; condition codes are irrelevent
- take_branch_d bge:d 0xf
-
- set_cc 0x0e ; condition codes are irrelevent
- take_branch_d bge:d 0xe
-
- set_cc 0x0d ; condition codes are irrelevent
- no_branch_d bge:d 0xd
-
- set_cc 0x0c ; condition codes are irrelevent
- no_branch_d bge:d 0xc
-
- set_cc 0x0b ; condition codes are irrelevent
- take_branch_d bge:d 0xb
-
- set_cc 0x0a ; condition codes are irrelevent
- take_branch_d bge:d 0xa
-
- set_cc 0x09 ; condition codes are irrelevent
- no_branch_d bge:d 0x9
-
- set_cc 0x08 ; condition codes are irrelevent
- no_branch_d bge:d 0x8
-
- set_cc 0x07 ; condition codes are irrelevent
- no_branch_d bge:d 0x7
-
- set_cc 0x06 ; condition codes are irrelevent
- no_branch_d bge:d 0x6
-
- set_cc 0x05 ; condition codes are irrelevent
- take_branch_d bge:d 0x5
-
- set_cc 0x04 ; condition codes are irrelevent
- take_branch_d bge:d 0x4
-
- set_cc 0x03 ; condition codes are irrelevent
- no_branch_d bge:d 0x3
-
- set_cc 0x02 ; condition codes are irrelevent
- no_branch_d bge:d 0x2
-
- set_cc 0x01 ; condition codes are irrelevent
- take_branch_d bge:d 0x1
-
- set_cc 0x00 ; condition codes are irrelevent
- take_branch_d bge:d 0x0
-
- pass
diff --git a/sim/testsuite/sim/fr30/bgt.cgs b/sim/testsuite/sim/fr30/bgt.cgs
deleted file mode 100644
index 525ac2e8f32..00000000000
--- a/sim/testsuite/sim/fr30/bgt.cgs
+++ /dev/null
@@ -1,109 +0,0 @@
-# fr30 testcase for bgt $label9
-# mach(): fr30
-
- .include "testutils.inc"
-
- START
-
- .text
- .global bgt
-bgt:
- ; Test bgt $label9
- set_cc 0x0f ; condition codes are irrelevent
- no_branch bgt
-
- set_cc 0x0e ; condition codes are irrelevent
- no_branch bgt
-
- set_cc 0x0d ; condition codes are irrelevent
- no_branch bgt
-
- set_cc 0x0c ; condition codes are irrelevent
- no_branch bgt
-
- set_cc 0x0b ; condition codes are irrelevent
- take_branch bgt
-
- set_cc 0x0a ; condition codes are irrelevent
- take_branch bgt
-
- set_cc 0x09 ; condition codes are irrelevent
- no_branch bgt
-
- set_cc 0x08 ; condition codes are irrelevent
- no_branch bgt
-
- set_cc 0x07 ; condition codes are irrelevent
- no_branch bgt
-
- set_cc 0x06 ; condition codes are irrelevent
- no_branch bgt
-
- set_cc 0x05 ; condition codes are irrelevent
- no_branch bgt
-
- set_cc 0x04 ; condition codes are irrelevent
- no_branch bgt
-
- set_cc 0x03 ; condition codes are irrelevent
- no_branch bgt
-
- set_cc 0x02 ; condition codes are irrelevent
- no_branch bgt
-
- set_cc 0x01 ; condition codes are irrelevent
- take_branch bgt
-
- set_cc 0x00 ; condition codes are irrelevent
- take_branch bgt
-
- ; Test bgt:d label9
- set_cc 0x0f ; condition codes are irrelevent
- no_branch_d bgt:d 0xf
-
- set_cc 0x0e ; condition codes are irrelevent
- no_branch_d bgt:d 0xe
-
- set_cc 0x0d ; condition codes are irrelevent
- no_branch_d bgt:d 0xd
-
- set_cc 0x0c ; condition codes are irrelevent
- no_branch_d bgt:d 0xc
-
- set_cc 0x0b ; condition codes are irrelevent
- take_branch_d bgt:d 0xb
-
- set_cc 0x0a ; condition codes are irrelevent
- take_branch_d bgt:d 0xa
-
- set_cc 0x09 ; condition codes are irrelevent
- no_branch_d bgt:d 0x9
-
- set_cc 0x08 ; condition codes are irrelevent
- no_branch_d bgt:d 0x8
-
- set_cc 0x07 ; condition codes are irrelevent
- no_branch_d bgt:d 0x7
-
- set_cc 0x06 ; condition codes are irrelevent
- no_branch_d bgt:d 0x6
-
- set_cc 0x05 ; condition codes are irrelevent
- no_branch_d bgt:d 0x5
-
- set_cc 0x04 ; condition codes are irrelevent
- no_branch_d bgt:d 0x4
-
- set_cc 0x03 ; condition codes are irrelevent
- no_branch_d bgt:d 0x3
-
- set_cc 0x02 ; condition codes are irrelevent
- no_branch_d bgt:d 0x2
-
- set_cc 0x01 ; condition codes are irrelevent
- take_branch_d bgt:d 0x1
-
- set_cc 0x00 ; condition codes are irrelevent
- take_branch_d bgt:d 0x0
-
- pass
diff --git a/sim/testsuite/sim/fr30/bhi.cgs b/sim/testsuite/sim/fr30/bhi.cgs
deleted file mode 100644
index f5a15492063..00000000000
--- a/sim/testsuite/sim/fr30/bhi.cgs
+++ /dev/null
@@ -1,109 +0,0 @@
-# fr30 testcase for bhi $label9
-# mach(): fr30
-
- .include "testutils.inc"
-
- START
-
- .text
- .global bhi
-bhi:
- ; Test bhi $label9
- set_cc 0x0f ; condition codes are irrelevent
- no_branch bhi
-
- set_cc 0x0e ; condition codes are irrelevent
- no_branch bhi
-
- set_cc 0x0d ; condition codes are irrelevent
- no_branch bhi
-
- set_cc 0x0c ; condition codes are irrelevent
- no_branch bhi
-
- set_cc 0x0b ; condition codes are irrelevent
- no_branch bhi
-
- set_cc 0x0a ; condition codes are irrelevent
- take_branch bhi
-
- set_cc 0x09 ; condition codes are irrelevent
- no_branch bhi
-
- set_cc 0x08 ; condition codes are irrelevent
- take_branch bhi
-
- set_cc 0x07 ; condition codes are irrelevent
- no_branch bhi
-
- set_cc 0x06 ; condition codes are irrelevent
- no_branch bhi
-
- set_cc 0x05 ; condition codes are irrelevent
- no_branch bhi
-
- set_cc 0x04 ; condition codes are irrelevent
- no_branch bhi
-
- set_cc 0x03 ; condition codes are irrelevent
- no_branch bhi
-
- set_cc 0x02 ; condition codes are irrelevent
- take_branch bhi
-
- set_cc 0x01 ; condition codes are irrelevent
- no_branch bhi
-
- set_cc 0x00 ; condition codes are irrelevent
- take_branch bhi
-
- ; Test bhi:d label9
- set_cc 0x0f ; condition codes are irrelevent
- no_branch_d bhi:d 0xf
-
- set_cc 0x0e ; condition codes are irrelevent
- no_branch_d bhi:d 0xe
-
- set_cc 0x0d ; condition codes are irrelevent
- no_branch_d bhi:d 0xd
-
- set_cc 0x0c ; condition codes are irrelevent
- no_branch_d bhi:d 0xc
-
- set_cc 0x0b ; condition codes are irrelevent
- no_branch_d bhi:d 0xb
-
- set_cc 0x0a ; condition codes are irrelevent
- take_branch_d bhi:d 0xa
-
- set_cc 0x09 ; condition codes are irrelevent
- no_branch_d bhi:d 0x9
-
- set_cc 0x08 ; condition codes are irrelevent
- take_branch_d bhi:d 0x8
-
- set_cc 0x07 ; condition codes are irrelevent
- no_branch_d bhi:d 0x7
-
- set_cc 0x06 ; condition codes are irrelevent
- no_branch_d bhi:d 0x6
-
- set_cc 0x05 ; condition codes are irrelevent
- no_branch_d bhi:d 0x5
-
- set_cc 0x04 ; condition codes are irrelevent
- no_branch_d bhi:d 0x4
-
- set_cc 0x03 ; condition codes are irrelevent
- no_branch_d bhi:d 0x3
-
- set_cc 0x02 ; condition codes are irrelevent
- take_branch_d bhi:d 0x2
-
- set_cc 0x01 ; condition codes are irrelevent
- no_branch_d bhi:d 0x1
-
- set_cc 0x00 ; condition codes are irrelevent
- take_branch_d bhi:d 0x0
-
- pass
diff --git a/sim/testsuite/sim/fr30/ble.cgs b/sim/testsuite/sim/fr30/ble.cgs
deleted file mode 100644
index 1a33f783ce3..00000000000
--- a/sim/testsuite/sim/fr30/ble.cgs
+++ /dev/null
@@ -1,109 +0,0 @@
-# fr30 testcase for ble $label9
-# mach(): fr30
-
- .include "testutils.inc"
-
- START
-
- .text
- .global ble
-ble:
- ; Test ble $label9
- set_cc 0x0f ; condition codes are irrelevent
- take_branch ble
-
- set_cc 0x0e ; condition codes are irrelevent
- take_branch ble
-
- set_cc 0x0d ; condition codes are irrelevent
- take_branch ble
-
- set_cc 0x0c ; condition codes are irrelevent
- take_branch ble
-
- set_cc 0x0b ; condition codes are irrelevent
- no_branch ble
-
- set_cc 0x0a ; condition codes are irrelevent
- no_branch ble
-
- set_cc 0x09 ; condition codes are irrelevent
- take_branch ble
-
- set_cc 0x08 ; condition codes are irrelevent
- take_branch ble
-
- set_cc 0x07 ; condition codes are irrelevent
- take_branch ble
-
- set_cc 0x06 ; condition codes are irrelevent
- take_branch ble
-
- set_cc 0x05 ; condition codes are irrelevent
- take_branch ble
-
- set_cc 0x04 ; condition codes are irrelevent
- take_branch ble
-
- set_cc 0x03 ; condition codes are irrelevent
- take_branch ble
-
- set_cc 0x02 ; condition codes are irrelevent
- take_branch ble
-
- set_cc 0x01 ; condition codes are irrelevent
- no_branch ble
-
- set_cc 0x00 ; condition codes are irrelevent
- no_branch ble
-
- ; Test ble:d label9
- set_cc 0x0f ; condition codes are irrelevent
- take_branch_d ble:d 0xf
-
- set_cc 0x0e ; condition codes are irrelevent
- take_branch_d ble:d 0xe
-
- set_cc 0x0d ; condition codes are irrelevent
- take_branch_d ble:d 0xd
-
- set_cc 0x0c ; condition codes are irrelevent
- take_branch_d ble:d 0xc
-
- set_cc 0x0b ; condition codes are irrelevent
- no_branch_d ble:d 0xb
-
- set_cc 0x0a ; condition codes are irrelevent
- no_branch_d ble:d 0xa
-
- set_cc 0x09 ; condition codes are irrelevent
- take_branch_d ble:d 0x9
-
- set_cc 0x08 ; condition codes are irrelevent
- take_branch_d ble:d 0x8
-
- set_cc 0x07 ; condition codes are irrelevent
- take_branch_d ble:d 0x7
-
- set_cc 0x06 ; condition codes are irrelevent
- take_branch_d ble:d 0x6
-
- set_cc 0x05 ; condition codes are irrelevent
- take_branch_d ble:d 0x5
-
- set_cc 0x04 ; condition codes are irrelevent
- take_branch_d ble:d 0x4
-
- set_cc 0x03 ; condition codes are irrelevent
- take_branch_d ble:d 0x3
-
- set_cc 0x02 ; condition codes are irrelevent
- take_branch_d ble:d 0x2
-
- set_cc 0x01 ; condition codes are irrelevent
- no_branch_d ble:d 0x1
-
- set_cc 0x00 ; condition codes are irrelevent
- no_branch_d ble:d 0x0
-
- pass
diff --git a/sim/testsuite/sim/fr30/bls.cgs b/sim/testsuite/sim/fr30/bls.cgs
deleted file mode 100644
index c0148b7b901..00000000000
--- a/sim/testsuite/sim/fr30/bls.cgs
+++ /dev/null
@@ -1,109 +0,0 @@
-# fr30 testcase for bls $label9
-# mach(): fr30
-
- .include "testutils.inc"
-
- START
-
- .text
- .global bls
-bls:
- ; Test bls $label9
- set_cc 0x0f ; condition codes are irrelevent
- take_branch bls
-
- set_cc 0x0e ; condition codes are irrelevent
- take_branch bls
-
- set_cc 0x0d ; condition codes are irrelevent
- take_branch bls
-
- set_cc 0x0c ; condition codes are irrelevent
- take_branch bls
-
- set_cc 0x0b ; condition codes are irrelevent
- take_branch bls
-
- set_cc 0x0a ; condition codes are irrelevent
- no_branch bls
-
- set_cc 0x09 ; condition codes are irrelevent
- take_branch bls
-
- set_cc 0x08 ; condition codes are irrelevent
- no_branch bls
-
- set_cc 0x07 ; condition codes are irrelevent
- take_branch bls
-
- set_cc 0x06 ; condition codes are irrelevent
- take_branch bls
-
- set_cc 0x05 ; condition codes are irrelevent
- take_branch bls
-
- set_cc 0x04 ; condition codes are irrelevent
- take_branch bls
-
- set_cc 0x03 ; condition codes are irrelevent
- take_branch bls
-
- set_cc 0x02 ; condition codes are irrelevent
- no_branch bls
-
- set_cc 0x01 ; condition codes are irrelevent
- take_branch bls
-
- set_cc 0x00 ; condition codes are irrelevent
- no_branch bls
-
- ; Test bls:d label9
- set_cc 0x0f ; condition codes are irrelevent
- take_branch_d bls:d 0xf
-
- set_cc 0x0e ; condition codes are irrelevent
- take_branch_d bls:d 0xe
-
- set_cc 0x0d ; condition codes are irrelevent
- take_branch_d bls:d 0xd
-
- set_cc 0x0c ; condition codes are irrelevent
- take_branch_d bls:d 0xc
-
- set_cc 0x0b ; condition codes are irrelevent
- take_branch_d bls:d 0xb
-
- set_cc 0x0a ; condition codes are irrelevent
- no_branch_d bls:d 0xa
-
- set_cc 0x09 ; condition codes are irrelevent
- take_branch_d bls:d 0x9
-
- set_cc 0x08 ; condition codes are irrelevent
- no_branch_d bls:d 0x8
-
- set_cc 0x07 ; condition codes are irrelevent
- take_branch_d bls:d 0x7
-
- set_cc 0x06 ; condition codes are irrelevent
- take_branch_d bls:d 0x6
-
- set_cc 0x05 ; condition codes are irrelevent
- take_branch_d bls:d 0x5
-
- set_cc 0x04 ; condition codes are irrelevent
- take_branch_d bls:d 0x4
-
- set_cc 0x03 ; condition codes are irrelevent
- take_branch_d bls:d 0x3
-
- set_cc 0x02 ; condition codes are irrelevent
- no_branch_d bls:d 0x2
-
- set_cc 0x01 ; condition codes are irrelevent
- take_branch_d bls:d 0x1
-
- set_cc 0x00 ; condition codes are irrelevent
- no_branch_d bls:d 0x0
-
- pass
diff --git a/sim/testsuite/sim/fr30/blt.cgs b/sim/testsuite/sim/fr30/blt.cgs
deleted file mode 100644
index f7b6ff114bf..00000000000
--- a/sim/testsuite/sim/fr30/blt.cgs
+++ /dev/null
@@ -1,109 +0,0 @@
-# fr30 testcase for blt $label9
-# mach(): fr30
-
- .include "testutils.inc"
-
- START
-
- .text
- .global blt
-blt:
- ; Test blt $label9
- set_cc 0x0f ; condition codes are irrelevent
- no_branch blt
-
- set_cc 0x0e ; condition codes are irrelevent
- no_branch blt
-
- set_cc 0x0d ; condition codes are irrelevent
- take_branch blt
-
- set_cc 0x0c ; condition codes are irrelevent
- take_branch blt
-
- set_cc 0x0b ; condition codes are irrelevent
- no_branch blt
-
- set_cc 0x0a ; condition codes are irrelevent
- no_branch blt
-
- set_cc 0x09 ; condition codes are irrelevent
- take_branch blt
-
- set_cc 0x08 ; condition codes are irrelevent
- take_branch blt
-
- set_cc 0x07 ; condition codes are irrelevent
- take_branch blt
-
- set_cc 0x06 ; condition codes are irrelevent
- take_branch blt
-
- set_cc 0x05 ; condition codes are irrelevent
- no_branch blt
-
- set_cc 0x04 ; condition codes are irrelevent
- no_branch blt
-
- set_cc 0x03 ; condition codes are irrelevent
- take_branch blt
-
- set_cc 0x02 ; condition codes are irrelevent
- take_branch blt
-
- set_cc 0x01 ; condition codes are irrelevent
- no_branch blt
-
- set_cc 0x00 ; condition codes are irrelevent
- no_branch blt
-
- ; Test blt:d label9
- set_cc 0x0f ; condition codes are irrelevent
- no_branch_d blt:d 0xf
-
- set_cc 0x0e ; condition codes are irrelevent
- no_branch_d blt:d 0xe
-
- set_cc 0x0d ; condition codes are irrelevent
- take_branch_d blt:d 0xd
-
- set_cc 0x0c ; condition codes are irrelevent
- take_branch_d blt:d 0xc
-
- set_cc 0x0b ; condition codes are irrelevent
- no_branch_d blt:d 0xb
-
- set_cc 0x0a ; condition codes are irrelevent
- no_branch_d blt:d 0xa
-
- set_cc 0x09 ; condition codes are irrelevent
- take_branch_d blt:d 0x9
-
- set_cc 0x08 ; condition codes are irrelevent
- take_branch_d blt:d 0x8
-
- set_cc 0x07 ; condition codes are irrelevent
- take_branch_d blt:d 0x7
-
- set_cc 0x06 ; condition codes are irrelevent
- take_branch_d blt:d 0x6
-
- set_cc 0x05 ; condition codes are irrelevent
- no_branch_d blt:d 0x5
-
- set_cc 0x04 ; condition codes are irrelevent
- no_branch_d blt:d 0x4
-
- set_cc 0x03 ; condition codes are irrelevent
- take_branch_d blt:d 0x3
-
- set_cc 0x02 ; condition codes are irrelevent
- take_branch_d blt:d 0x2
-
- set_cc 0x01 ; condition codes are irrelevent
- no_branch_d blt:d 0x1
-
- set_cc 0x00 ; condition codes are irrelevent
- no_branch_d blt:d 0x0
-
- pass
diff --git a/sim/testsuite/sim/fr30/bn.cgs b/sim/testsuite/sim/fr30/bn.cgs
deleted file mode 100644
index 45858fc97ee..00000000000
--- a/sim/testsuite/sim/fr30/bn.cgs
+++ /dev/null
@@ -1,109 +0,0 @@
-# fr30 testcase for bn $label9
-# mach(): fr30
-
- .include "testutils.inc"
-
- START
-
- .text
- .global bn
-bn:
- ; Test bn $label9
- set_cc 0x0f ; condition codes are irrelevent
- take_branch bn
-
- set_cc 0x0e ; condition codes are irrelevent
- take_branch bn
-
- set_cc 0x0d ; condition codes are irrelevent
- take_branch bn
-
- set_cc 0x0c ; condition codes are irrelevent
- take_branch bn
-
- set_cc 0x0b ; condition codes are irrelevent
- take_branch bn
-
- set_cc 0x0a ; condition codes are irrelevent
- take_branch bn
-
- set_cc 0x09 ; condition codes are irrelevent
- take_branch bn
-
- set_cc 0x08 ; condition codes are irrelevent
- take_branch bn
-
- set_cc 0x07 ; condition codes are irrelevent
- no_branch bn
-
- set_cc 0x06 ; condition codes are irrelevent
- no_branch bn
-
- set_cc 0x05 ; condition codes are irrelevent
- no_branch bn
-
- set_cc 0x04 ; condition codes are irrelevent
- no_branch bn
-
- set_cc 0x03 ; condition codes are irrelevent
- no_branch bn
-
- set_cc 0x02 ; condition codes are irrelevent
- no_branch bn
-
- set_cc 0x01 ; condition codes are irrelevent
- no_branch bn
-
- set_cc 0x00 ; condition codes are irrelevent
- no_branch bn
-
- ; Test bn:d label9
- set_cc 0x0f ; condition codes are irrelevent
- take_branch_d bn:d 0xf
-
- set_cc 0x0e ; condition codes are irrelevent
- take_branch_d bn:d 0xe
-
- set_cc 0x0d ; condition codes are irrelevent
- take_branch_d bn:d 0xd
-
- set_cc 0x0c ; condition codes are irrelevent
- take_branch_d bn:d 0xc
-
- set_cc 0x0b ; condition codes are irrelevent
- take_branch_d bn:d 0xb
-
- set_cc 0x0a ; condition codes are irrelevent
- take_branch_d bn:d 0xa
-
- set_cc 0x09 ; condition codes are irrelevent
- take_branch_d bn:d 0x9
-
- set_cc 0x08 ; condition codes are irrelevent
- take_branch_d bn:d 0x8
-
- set_cc 0x07 ; condition codes are irrelevent
- no_branch_d bn:d 0x7
-
- set_cc 0x06 ; condition codes are irrelevent
- no_branch_d bn:d 0x6
-
- set_cc 0x05 ; condition codes are irrelevent
- no_branch_d bn:d 0x5
-
- set_cc 0x04 ; condition codes are irrelevent
- no_branch_d bn:d 0x4
-
- set_cc 0x03 ; condition codes are irrelevent
- no_branch_d bn:d 0x3
-
- set_cc 0x02 ; condition codes are irrelevent
- no_branch_d bn:d 0x2
-
- set_cc 0x01 ; condition codes are irrelevent
- no_branch_d bn:d 0x1
-
- set_cc 0x00 ; condition codes are irrelevent
- no_branch_d bn:d 0x0
-
- pass
diff --git a/sim/testsuite/sim/fr30/bnc.cgs b/sim/testsuite/sim/fr30/bnc.cgs
deleted file mode 100644
index 9968c43737c..00000000000
--- a/sim/testsuite/sim/fr30/bnc.cgs
+++ /dev/null
@@ -1,109 +0,0 @@
-# fr30 testcase for bnc $label9
-# mach(): fr30
-
- .include "testutils.inc"
-
- START
-
- .text
- .global bnc
-bc:
- ; Test bnc $label9
- set_cc 0x0f ; condition codes are irrelevent
- no_branch bnc
-
- set_cc 0x0e ; condition codes are irrelevent
- take_branch bnc
-
- set_cc 0x0d ; condition codes are irrelevent
- no_branch bnc
-
- set_cc 0x0c ; condition codes are irrelevent
- take_branch bnc
-
- set_cc 0x0b ; condition codes are irrelevent
- no_branch bnc
-
- set_cc 0x0a ; condition codes are irrelevent
- take_branch bnc
-
- set_cc 0x09 ; condition codes are irrelevent
- no_branch bnc
-
- set_cc 0x08 ; condition codes are irrelevent
- take_branch bnc
-
- set_cc 0x07 ; condition codes are irrelevent
- no_branch bnc
-
- set_cc 0x06 ; condition codes are irrelevent
- take_branch bnc
-
- set_cc 0x05 ; condition codes are irrelevent
- no_branch bnc
-
- set_cc 0x04 ; condition codes are irrelevent
- take_branch bnc
-
- set_cc 0x03 ; condition codes are irrelevent
- no_branch bnc
-
- set_cc 0x02 ; condition codes are irrelevent
- take_branch bnc
-
- set_cc 0x01 ; condition codes are irrelevent
- no_branch bnc
-
- set_cc 0x00 ; condition codes are irrelevent
- take_branch bnc
-
- ; Test bnc:d label9
- set_cc 0x0f ; condition codes are irrelevent
- no_branch_d bnc:d 0xf
-
- set_cc 0x0e ; condition codes are irrelevent
- take_branch_d bnc:d 0xe
-
- set_cc 0x0d ; condition codes are irrelevent
- no_branch_d bnc:d 0xd
-
- set_cc 0x0c ; condition codes are irrelevent
- take_branch_d bnc:d 0xc
-
- set_cc 0x0b ; condition codes are irrelevent
- no_branch_d bnc:d 0xb
-
- set_cc 0x0a ; condition codes are irrelevent
- take_branch_d bnc:d 0xa
-
- set_cc 0x09 ; condition codes are irrelevent
- no_branch_d bnc:d 0x9
-
- set_cc 0x08 ; condition codes are irrelevent
- take_branch_d bnc:d 0x8
-
- set_cc 0x07 ; condition codes are irrelevent
- no_branch_d bnc:d 0x7
-
- set_cc 0x06 ; condition codes are irrelevent
- take_branch_d bnc:d 0x6
-
- set_cc 0x05 ; condition codes are irrelevent
- no_branch_d bnc:d 0x5
-
- set_cc 0x04 ; condition codes are irrelevent
- take_branch_d bnc:d 0x4
-
- set_cc 0x03 ; condition codes are irrelevent
- no_branch_d bnc:d 0x3
-
- set_cc 0x02 ; condition codes are irrelevent
- take_branch_d bnc:d 0x2
-
- set_cc 0x01 ; condition codes are irrelevent
- no_branch_d bnc:d 0x1
-
- set_cc 0x00 ; condition codes are irrelevent
- take_branch_d bnc:d 0x0
-
- pass
diff --git a/sim/testsuite/sim/fr30/bne.cgs b/sim/testsuite/sim/fr30/bne.cgs
deleted file mode 100644
index 58971de1326..00000000000
--- a/sim/testsuite/sim/fr30/bne.cgs
+++ /dev/null
@@ -1,109 +0,0 @@
-# fr30 testcase for bne $label9
-# mach(): fr30
-
- .include "testutils.inc"
-
- START
-
- .text
- .global bne
-bne:
- ; Test bne $label9
- set_cc 0x0f ; condition codes are irrelevent
- no_branch bne
-
- set_cc 0x0e ; condition codes are irrelevent
- no_branch bne
-
- set_cc 0x0d ; condition codes are irrelevent
- no_branch bne
-
- set_cc 0x0c ; condition codes are irrelevent
- no_branch bne
-
- set_cc 0x0b ; condition codes are irrelevent
- take_branch bne
-
- set_cc 0x0a ; condition codes are irrelevent
- take_branch bne
-
- set_cc 0x09 ; condition codes are irrelevent
- take_branch bne
-
- set_cc 0x08 ; condition codes are irrelevent
- take_branch bne
-
- set_cc 0x07 ; condition codes are irrelevent
- no_branch bne
-
- set_cc 0x06 ; condition codes are irrelevent
- no_branch bne
-
- set_cc 0x05 ; condition codes are irrelevent
- no_branch bne
-
- set_cc 0x04 ; condition codes are irrelevent
- no_branch bne
-
- set_cc 0x03 ; condition codes are irrelevent
- take_branch bne
-
- set_cc 0x02 ; condition codes are irrelevent
- take_branch bne
-
- set_cc 0x01 ; condition codes are irrelevent
- take_branch bne
-
- set_cc 0x00 ; condition codes are irrelevent
- take_branch bne
-
- ; Test bne:d label9
- set_cc 0x0f ; condition codes are irrelevent
- no_branch_d bne:d 0xf
-
- set_cc 0x0e ; condition codes are irrelevent
- no_branch_d bne:d 0xe
-
- set_cc 0x0d ; condition codes are irrelevent
- no_branch_d bne:d 0xd
-
- set_cc 0x0c ; condition codes are irrelevent
- no_branch_d bne:d 0xc
-
- set_cc 0x0b ; condition codes are irrelevent
- take_branch_d bne:d 0xb
-
- set_cc 0x0a ; condition codes are irrelevent
- take_branch_d bne:d 0xa
-
- set_cc 0x09 ; condition codes are irrelevent
- take_branch_d bne:d 0x9
-
- set_cc 0x08 ; condition codes are irrelevent
- take_branch_d bne:d 0x8
-
- set_cc 0x07 ; condition codes are irrelevent
- no_branch_d bne:d 0x7
-
- set_cc 0x06 ; condition codes are irrelevent
- no_branch_d bne:d 0x6
-
- set_cc 0x05 ; condition codes are irrelevent
- no_branch_d bne:d 0x5
-
- set_cc 0x04 ; condition codes are irrelevent
- no_branch_d bne:d 0x4
-
- set_cc 0x03 ; condition codes are irrelevent
- take_branch_d bne:d 0x3
-
- set_cc 0x02 ; condition codes are irrelevent
- take_branch_d bne:d 0x2
-
- set_cc 0x01 ; condition codes are irrelevent
- take_branch_d bne:d 0x1
-
- set_cc 0x00 ; condition codes are irrelevent
- take_branch_d bne:d 0x0
-
- pass
diff --git a/sim/testsuite/sim/fr30/bno.cgs b/sim/testsuite/sim/fr30/bno.cgs
deleted file mode 100644
index faef9ba0380..00000000000
--- a/sim/testsuite/sim/fr30/bno.cgs
+++ /dev/null
@@ -1,109 +0,0 @@
-# fr30 testcase for bno $label9
-# mach(): fr30
-
- .include "testutils.inc"
-
- START
-
- .text
- .global bno
-bno:
- ; Test bno $label9
- set_cc 0x0f ; condition codes are irrelevent
- no_branch bno
-
- set_cc 0x0e ; condition codes are irrelevent
- no_branch bno
-
- set_cc 0x0d ; condition codes are irrelevent
- no_branch bno
-
- set_cc 0x0c ; condition codes are irrelevent
- no_branch bno
-
- set_cc 0x0b ; condition codes are irrelevent
- no_branch bno
-
- set_cc 0x0a ; condition codes are irrelevent
- no_branch bno
-
- set_cc 0x09 ; condition codes are irrelevent
- no_branch bno
-
- set_cc 0x08 ; condition codes are irrelevent
- no_branch bno
-
- set_cc 0x07 ; condition codes are irrelevent
- no_branch bno
-
- set_cc 0x06 ; condition codes are irrelevent
- no_branch bno
-
- set_cc 0x05 ; condition codes are irrelevent
- no_branch bno
-
- set_cc 0x04 ; condition codes are irrelevent
- no_branch bno
-
- set_cc 0x03 ; condition codes are irrelevent
- no_branch bno
-
- set_cc 0x02 ; condition codes are irrelevent
- no_branch bno
-
- set_cc 0x01 ; condition codes are irrelevent
- no_branch bno
-
- set_cc 0x00 ; condition codes are irrelevent
- no_branch bno
-
- ; Test bno:d label9
- set_cc 0x0f ; condition codes are irrelevent
- no_branch_d bno:d 0xf
-
- set_cc 0x0e ; condition codes are irrelevent
- no_branch_d bno:d 0xe
-
- set_cc 0x0d ; condition codes are irrelevent
- no_branch_d bno:d 0xd
-
- set_cc 0x0c ; condition codes are irrelevent
- no_branch_d bno:d 0xc
-
- set_cc 0x0b ; condition codes are irrelevent
- no_branch_d bno:d 0xb
-
- set_cc 0x0a ; condition codes are irrelevent
- no_branch_d bno:d 0xa
-
- set_cc 0x09 ; condition codes are irrelevent
- no_branch_d bno:d 0x9
-
- set_cc 0x08 ; condition codes are irrelevent
- no_branch_d bno:d 0x8
-
- set_cc 0x07 ; condition codes are irrelevent
- no_branch_d bno:d 0x7
-
- set_cc 0x06 ; condition codes are irrelevent
- no_branch_d bno:d 0x6
-
- set_cc 0x05 ; condition codes are irrelevent
- no_branch_d bno:d 0x5
-
- set_cc 0x04 ; condition codes are irrelevent
- no_branch_d bno:d 0x4
-
- set_cc 0x03 ; condition codes are irrelevent
- no_branch_d bno:d 0x3
-
- set_cc 0x02 ; condition codes are irrelevent
- no_branch_d bno:d 0x2
-
- set_cc 0x01 ; condition codes are irrelevent
- no_branch_d bno:d 0x1
-
- set_cc 0x00 ; condition codes are irrelevent
- no_branch_d bno:d 0x0
-
- pass
diff --git a/sim/testsuite/sim/fr30/bnv.cgs b/sim/testsuite/sim/fr30/bnv.cgs
deleted file mode 100644
index 7615abd6c7d..00000000000
--- a/sim/testsuite/sim/fr30/bnv.cgs
+++ /dev/null
@@ -1,109 +0,0 @@
-# fr30 testcase for bnv $label9
-# mach(): fr30
-
- .include "testutils.inc"
-
- START
-
- .text
- .global bnv
-bnv:
- ; Test bnv $label9
- set_cc 0x0f ; condition codes are irrelevent
- no_branch bnv
-
- set_cc 0x0e ; condition codes are irrelevent
- no_branch bnv
-
- set_cc 0x0d ; condition codes are irrelevent
- take_branch bnv
-
- set_cc 0x0c ; condition codes are irrelevent
- take_branch bnv
-
- set_cc 0x0b ; condition codes are irrelevent
- no_branch bnv
-
- set_cc 0x0a ; condition codes are irrelevent
- no_branch bnv
-
- set_cc 0x09 ; condition codes are irrelevent
- take_branch bnv
-
- set_cc 0x08 ; condition codes are irrelevent
- take_branch bnv
-
- set_cc 0x07 ; condition codes are irrelevent
- no_branch bnv
-
- set_cc 0x06 ; condition codes are irrelevent
- no_branch bnv
-
- set_cc 0x05 ; condition codes are irrelevent
- take_branch bnv
-
- set_cc 0x04 ; condition codes are irrelevent
- take_branch bnv
-
- set_cc 0x03 ; condition codes are irrelevent
- no_branch bnv
-
- set_cc 0x02 ; condition codes are irrelevent
- no_branch bnv
-
- set_cc 0x01 ; condition codes are irrelevent
- take_branch bnv
-
- set_cc 0x00 ; condition codes are irrelevent
- take_branch bnv
-
- ; Test bnv:d label9
- set_cc 0x0f ; condition codes are irrelevent
- no_branch_d bnv:d 0xf
-
- set_cc 0x0e ; condition codes are irrelevent
- no_branch_d bnv:d 0xe
-
- set_cc 0x0d ; condition codes are irrelevent
- take_branch_d bnv:d 0xd
-
- set_cc 0x0c ; condition codes are irrelevent
- take_branch_d bnv:d 0xc
-
- set_cc 0x0b ; condition codes are irrelevent
- no_branch_d bnv:d 0xb
-
- set_cc 0x0a ; condition codes are irrelevent
- no_branch_d bnv:d 0xa
-
- set_cc 0x09 ; condition codes are irrelevent
- take_branch_d bnv:d 0x9
-
- set_cc 0x08 ; condition codes are irrelevent
- take_branch_d bnv:d 0x8
-
- set_cc 0x07 ; condition codes are irrelevent
- no_branch_d bnv:d 0x7
-
- set_cc 0x06 ; condition codes are irrelevent
- no_branch_d bnv:d 0x6
-
- set_cc 0x05 ; condition codes are irrelevent
- take_branch_d bnv:d 0x5
-
- set_cc 0x04 ; condition codes are irrelevent
- take_branch_d bnv:d 0x4
-
- set_cc 0x03 ; condition codes are irrelevent
- no_branch_d bnv:d 0x3
-
- set_cc 0x02 ; condition codes are irrelevent
- no_branch_d bnv:d 0x2
-
- set_cc 0x01 ; condition codes are irrelevent
- take_branch_d bnv:d 0x1
-
- set_cc 0x00 ; condition codes are irrelevent
- take_branch_d bnv:d 0x0
-
- pass
diff --git a/sim/testsuite/sim/fr30/borh.cgs b/sim/testsuite/sim/fr30/borh.cgs
deleted file mode 100644
index 039f18a37e2..00000000000
--- a/sim/testsuite/sim/fr30/borh.cgs
+++ /dev/null
@@ -1,30 +0,0 @@
-# fr30 testcase for borh $Rj,@$Ri
-# mach(): fr30
-
- .include "testutils.inc"
-
- START
-
- .text
- .global borh
-borh:
- ; Test borh $Rj,@$Ri
- mvi_h_mem 0x55555555,sp
- set_cc 0x0f ; Condition codes should not change
- borh 0x0a,@sp
- test_cc 1 1 1 1
- test_h_mem 0xf5555555,sp
-
- mvi_h_mem 0x0fffffff,sp
- set_cc 0x04 ; Condition codes should not change
- borh 0x00,@sp
- test_cc 0 1 0 0
- test_h_mem 0x0fffffff,sp
-
- mvi_h_mem 0xceadbeef,sp
- set_cc 0x09 ; Condition codes should not change
- borh 0x01,@sp
- test_cc 1 0 0 1
- test_h_mem 0xdeadbeef,sp
-
- pass
diff --git a/sim/testsuite/sim/fr30/borl.cgs b/sim/testsuite/sim/fr30/borl.cgs
deleted file mode 100644
index beb2bbbaa2d..00000000000
--- a/sim/testsuite/sim/fr30/borl.cgs
+++ /dev/null
@@ -1,30 +0,0 @@
-# fr30 testcase for borl $Rj,@$Ri
-# mach(): fr30
-
- .include "testutils.inc"
-
- START
-
- .text
- .global borl
-borl:
- ; Test borl $Rj,@$Ri
- mvi_h_mem 0x55555555,sp
- set_cc 0x0f ; Condition codes should not change
- borl 0x0a,@sp
- test_cc 1 1 1 1
- test_h_mem 0x5f555555,sp
-
- mvi_h_mem 0xf0ffffff,sp
- set_cc 0x04 ; Condition codes should not change
- borl 0x00,@sp
- test_cc 0 1 0 0
- test_h_mem 0xf0ffffff,sp
-
- mvi_h_mem 0xdcadbeef,sp
- set_cc 0x09 ; Condition codes should not change
- borl 0x02,@sp
- test_cc 1 0 0 1
- test_h_mem 0xdeadbeef,sp
-
- pass
diff --git a/sim/testsuite/sim/fr30/bp.cgs b/sim/testsuite/sim/fr30/bp.cgs
deleted file mode 100644
index 375328305e0..00000000000
--- a/sim/testsuite/sim/fr30/bp.cgs
+++ /dev/null
@@ -1,109 +0,0 @@
-# fr30 testcase for bp $label9
-# mach(): fr30
-
- .include "testutils.inc"
-
- START
-
- .text
- .global bp
-bp:
- ; Test bp $label9
- set_cc 0x0f ; condition codes are irrelevent
- no_branch bp
-
- set_cc 0x0e ; condition codes are irrelevent
- no_branch bp
-
- set_cc 0x0d ; condition codes are irrelevent
- no_branch bp
-
- set_cc 0x0c ; condition codes are irrelevent
- no_branch bp
-
- set_cc 0x0b ; condition codes are irrelevent
- no_branch bp
-
- set_cc 0x0a ; condition codes are irrelevent
- no_branch bp
-
- set_cc 0x09 ; condition codes are irrelevent
- no_branch bp
-
- set_cc 0x08 ; condition codes are irrelevent
- no_branch bp
-
- set_cc 0x07 ; condition codes are irrelevent
- take_branch bp
-
- set_cc 0x06 ; condition codes are irrelevent
- take_branch bp
-
- set_cc 0x05 ; condition codes are irrelevent
- take_branch bp
-
- set_cc 0x04 ; condition codes are irrelevent
- take_branch bp
-
- set_cc 0x03 ; condition codes are irrelevent
- take_branch bp
-
- set_cc 0x02 ; condition codes are irrelevent
- take_branch bp
-
- set_cc 0x01 ; condition codes are irrelevent
- take_branch bp
-
- set_cc 0x00 ; condition codes are irrelevent
- take_branch bp
-
- ; Test bp:d label9
- set_cc 0x0f ; condition codes are irrelevent
- no_branch_d bp:d 0xf
-
- set_cc 0x0e ; condition codes are irrelevent
- no_branch_d bp:d 0xe
-
- set_cc 0x0d ; condition codes are irrelevent
- no_branch_d bp:d 0xd
-
- set_cc 0x0c ; condition codes are irrelevent
- no_branch_d bp:d 0xc
-
- set_cc 0x0b ; condition codes are irrelevent
- no_branch_d bp:d 0xb
-
- set_cc 0x0a ; condition codes are irrelevent
- no_branch_d bp:d 0xa
-
- set_cc 0x09 ; condition codes are irrelevent
- no_branch_d bp:d 0x9
-
- set_cc 0x08 ; condition codes are irrelevent
- no_branch_d bp:d 0x8
-
- set_cc 0x07 ; condition codes are irrelevent
- take_branch_d bp:d 0x7
-
- set_cc 0x06 ; condition codes are irrelevent
- take_branch_d bp:d 0x6
-
- set_cc 0x05 ; condition codes are irrelevent
- take_branch_d bp:d 0x5
-
- set_cc 0x04 ; condition codes are irrelevent
- take_branch_d bp:d 0x4
-
- set_cc 0x03 ; condition codes are irrelevent
- take_branch_d bp:d 0x3
-
- set_cc 0x02 ; condition codes are irrelevent
- take_branch_d bp:d 0x2
-
- set_cc 0x01 ; condition codes are irrelevent
- take_branch_d bp:d 0x1
-
- set_cc 0x00 ; condition codes are irrelevent
- take_branch_d bp:d 0x0
-
- pass
diff --git a/sim/testsuite/sim/fr30/bra.cgs b/sim/testsuite/sim/fr30/bra.cgs
deleted file mode 100644
index 3732f74a3ed..00000000000
--- a/sim/testsuite/sim/fr30/bra.cgs
+++ /dev/null
@@ -1,109 +0,0 @@
-# fr30 testcase for bra $label9
-# mach(): fr30
-
- .include "testutils.inc"
-
- START
-
- .text
- .global bra
-bra:
- ; Test bra $label9
- set_cc 0x0f ; condition codes are irrelevent
- take_branch bra
-
- set_cc 0x0e ; condition codes are irrelevent
- take_branch bra
-
- set_cc 0x0d ; condition codes are irrelevent
- take_branch bra
-
- set_cc 0x0c ; condition codes are irrelevent
- take_branch bra
-
- set_cc 0x0b ; condition codes are irrelevent
- take_branch bra
-
- set_cc 0x0a ; condition codes are irrelevent
- take_branch bra
-
- set_cc 0x09 ; condition codes are irrelevent
- take_branch bra
-
- set_cc 0x08 ; condition codes are irrelevent
- take_branch bra
-
- set_cc 0x07 ; condition codes are irrelevent
- take_branch bra
-
- set_cc 0x06 ; condition codes are irrelevent
- take_branch bra
-
- set_cc 0x05 ; condition codes are irrelevent
- take_branch bra
-
- set_cc 0x04 ; condition codes are irrelevent
- take_branch bra
-
- set_cc 0x03 ; condition codes are irrelevent
- take_branch bra
-
- set_cc 0x02 ; condition codes are irrelevent
- take_branch bra
-
- set_cc 0x01 ; condition codes are irrelevent
- take_branch bra
-
- set_cc 0x00 ; condition codes are irrelevent
- take_branch bra
-
- ; Test bra:d label9
- set_cc 0x0f ; condition codes are irrelevent
- take_branch_d bra:d 0xf
-
- set_cc 0x0e ; condition codes are irrelevent
- take_branch_d bra:d 0xe
-
- set_cc 0x0d ; condition codes are irrelevent
- take_branch_d bra:d 0xd
-
- set_cc 0x0c ; condition codes are irrelevent
- take_branch_d bra:d 0xc
-
- set_cc 0x0b ; condition codes are irrelevent
- take_branch_d bra:d 0xb
-
- set_cc 0x0a ; condition codes are irrelevent
- take_branch_d bra:d 0xa
-
- set_cc 0x09 ; condition codes are irrelevent
- take_branch_d bra:d 0x9
-
- set_cc 0x08 ; condition codes are irrelevent
- take_branch_d bra:d 0x8
-
- set_cc 0x07 ; condition codes are irrelevent
- take_branch_d bra:d 0x7
-
- set_cc 0x06 ; condition codes are irrelevent
- take_branch_d bra:d 0x6
-
- set_cc 0x05 ; condition codes are irrelevent
- take_branch_d bra:d 0x5
-
- set_cc 0x04 ; condition codes are irrelevent
- take_branch_d bra:d 0x4
-
- set_cc 0x03 ; condition codes are irrelevent
- take_branch_d bra:d 0x3
-
- set_cc 0x02 ; condition codes are irrelevent
- take_branch_d bra:d 0x2
-
- set_cc 0x01 ; condition codes are irrelevent
- take_branch_d bra:d 0x1
-
- set_cc 0x00 ; condition codes are irrelevent
- take_branch_d bra:d 0x0
-
- pass
diff --git a/sim/testsuite/sim/fr30/btsth.cgs b/sim/testsuite/sim/fr30/btsth.cgs
deleted file mode 100644
index 2897c340555..00000000000
--- a/sim/testsuite/sim/fr30/btsth.cgs
+++ /dev/null
@@ -1,30 +0,0 @@
-# fr30 testcase for btsth $Rj,@$Ri
-# mach(): fr30
-
- .include "testutils.inc"
-
- START
-
- .text
- .global btsth
-btsth:
- ; Test btsth $Rj,@$Ri
- mvi_h_mem 0x55555555,sp
- set_cc 0x0b ; Set mask opposite of expected
- btsth 0x0a,@sp
- test_cc 0 1 1 1
- test_h_mem 0x55555555,sp
-
- mvi_h_mem 0xffffffff,sp
- set_cc 0x04 ; Set mask opposite of expected
- btsth 0x0a,@sp
- test_cc 1 0 0 0
- test_h_mem 0xffffffff,sp
-
- mvi_h_mem 0xe5ffffff,sp
- set_cc 0x0e ; Set mask opposite of expected
- btsth 0x07,@sp
- test_cc 0 0 1 0
- test_h_mem 0xe5ffffff,sp
-
- pass
diff --git a/sim/testsuite/sim/fr30/btstl.cgs b/sim/testsuite/sim/fr30/btstl.cgs
deleted file mode 100644
index cef5a927190..00000000000
--- a/sim/testsuite/sim/fr30/btstl.cgs
+++ /dev/null
@@ -1,30 +0,0 @@
-# fr30 testcase for btstl $Rj,@$Ri
-# mach(): fr30
-
- .include "testutils.inc"
-
- START
-
- .text
- .global btstl
-btstl:
- ; Test btstl $Rj,@$Ri
- mvi_h_mem 0x55555555,sp
- set_cc 0x0b ; Set mask opposite of expected
- btstl 0x0a,@sp
- test_cc 0 1 1 1
- test_h_mem 0x55555555,sp
-
- mvi_h_mem 0xffffffff,sp
- set_cc 0x0c ; Set mask opposite of expected
- btstl 0x0a,@sp
- test_cc 0 0 0 0
- test_h_mem 0xffffffff,sp
-
- mvi_h_mem 0x5effffff,sp
- set_cc 0x0e ; Set mask opposite of expected
- btstl 0x07,@sp
- test_cc 0 0 1 0
- test_h_mem 0x5effffff,sp
-
- pass
diff --git a/sim/testsuite/sim/fr30/bv.cgs b/sim/testsuite/sim/fr30/bv.cgs
deleted file mode 100644
index 68cb9acf165..00000000000
--- a/sim/testsuite/sim/fr30/bv.cgs
+++ /dev/null
@@ -1,109 +0,0 @@
-# fr30 testcase for bv $label9
-# mach(): fr30
-
- .include "testutils.inc"
-
- START
-
- .text
- .global bv
-bv:
- ; Test bv $label9
- set_cc 0x0f ; condition codes are irrelevent
- take_branch bv
-
- set_cc 0x0e ; condition codes are irrelevent
- take_branch bv
-
- set_cc 0x0d ; condition codes are irrelevent
- no_branch bv
-
- set_cc 0x0c ; condition codes are irrelevent
- no_branch bv
-
- set_cc 0x0b ; condition codes are irrelevent
- take_branch bv
-
- set_cc 0x0a ; condition codes are irrelevent
- take_branch bv
-
- set_cc 0x09 ; condition codes are irrelevent
- no_branch bv
-
- set_cc 0x08 ; condition codes are irrelevent
- no_branch bv
-
- set_cc 0x07 ; condition codes are irrelevent
- take_branch bv
-
- set_cc 0x06 ; condition codes are irrelevent
- take_branch bv
-
- set_cc 0x05 ; condition codes are irrelevent
- no_branch bv
-
- set_cc 0x04 ; condition codes are irrelevent
- no_branch bv
-
- set_cc 0x03 ; condition codes are irrelevent
- take_branch bv
-
- set_cc 0x02 ; condition codes are irrelevent
- take_branch bv
-
- set_cc 0x01 ; condition codes are irrelevent
- no_branch bv
-
- set_cc 0x00 ; condition codes are irrelevent
- no_branch bv
-
- ; Test bv:d label9
- set_cc 0x0f ; condition codes are irrelevent
- take_branch_d bv:d 0xf
-
- set_cc 0x0e ; condition codes are irrelevent
- take_branch_d bv:d 0xe
-
- set_cc 0x0d ; condition codes are irrelevent
- no_branch_d bv:d 0xd
-
- set_cc 0x0c ; condition codes are irrelevent
- no_branch_d bv:d 0xc
-
- set_cc 0x0b ; condition codes are irrelevent
- take_branch_d bv:d 0xb
-
- set_cc 0x0a ; condition codes are irrelevent
- take_branch_d bv:d 0xa
-
- set_cc 0x09 ; condition codes are irrelevent
- no_branch_d bv:d 0x9
-
- set_cc 0x08 ; condition codes are irrelevent
- no_branch_d bv:d 0x8
-
- set_cc 0x07 ; condition codes are irrelevent
- take_branch_d bv:d 0x7
-
- set_cc 0x06 ; condition codes are irrelevent
- take_branch_d bv:d 0x6
-
- set_cc 0x05 ; condition codes are irrelevent
- no_branch_d bv:d 0x5
-
- set_cc 0x04 ; condition codes are irrelevent
- no_branch_d bv:d 0x4
-
- set_cc 0x03 ; condition codes are irrelevent
- take_branch_d bv:d 0x3
-
- set_cc 0x02 ; condition codes are irrelevent
- take_branch_d bv:d 0x2
-
- set_cc 0x01 ; condition codes are irrelevent
- no_branch_d bv:d 0x1
-
- set_cc 0x00 ; condition codes are irrelevent
- no_branch_d bv:d 0x0
-
- pass
diff --git a/sim/testsuite/sim/fr30/call.cgs b/sim/testsuite/sim/fr30/call.cgs
deleted file mode 100644
index 413840ed350..00000000000
--- a/sim/testsuite/sim/fr30/call.cgs
+++ /dev/null
@@ -1,69 +0,0 @@
-# fr30 testcase for call @$Ri
-# mach(): fr30
-
- .include "testutils.inc"
-
- START
-
- .text
- .global call
-
- ; Test call $Ri
- mvi_h_gr 0xdeadbeef,r9
- mvi_h_gr #func1,r0
- set_cc 0x0f ; condition codes shouldn't change
-call1:
- call @r0
- test_h_gr 0xbeefdead,r9
- pass
-
-func1:
- test_cc 1 1 1 1
- mvi_h_gr #call1,r7
- inci_h_gr 2,r7
- testr_h_dr r7,rp
- save_rp
-
- mvi_h_gr #func2,r0
- set_cc 0x0f ; condition codes shouldn't change
-call2:
- call:d @r0
- ldi:8 1,r0 ; Must assume this works
- restore_rp
- ret
-func2:
- test_cc 1 1 1 1
- mvi_h_gr #call2,r7
- inci_h_gr 4,r7
- testr_h_dr r7,rp
- testr_h_gr 1,r0
- save_rp
-
- set_cc 0x0f ; condition codes shouldn't change
-call3:
- call func3
- restore_rp
- ret
-func3:
- test_cc 1 1 1 1
- mvi_h_gr #call3,r7
- inci_h_gr 2,r7
- testr_h_dr r7,rp
- save_rp
-
- set_cc 0x0f ; condition codes shouldn't change
-call4:
- call:d func4
- ldi:8 1,r0 ; Must assume this works
- restore_rp
- ret
-func4:
- test_cc 1 1 1 1
- mvi_h_gr #call4,r7
- inci_h_gr 4,r7
- testr_h_dr r7,rp
- testr_h_gr 1,r0
- mvi_h_gr 0xbeefdead,r9
- ret
-
- fail
diff --git a/sim/testsuite/sim/fr30/cmp.cgs b/sim/testsuite/sim/fr30/cmp.cgs
deleted file mode 100644
index 7bfbbf8f1c9..00000000000
--- a/sim/testsuite/sim/fr30/cmp.cgs
+++ /dev/null
@@ -1,53 +0,0 @@
-# fr30 testcase for cmp $Rj,$Ri, cmp $u4,$Ri
-# mach(): fr30
-
- .include "testutils.inc"
-
- START
-
- .text
- .global cmp
-cmp:
- ; Test cmp $Rj,$Ri
- mvi_h_gr 1,r7
- mvi_h_gr 2,r8
- set_cc 0x0f ; Set mask opposite of expected
- cmp r7,r8
- test_cc 0 0 0 0
-
- mvi_h_gr 1,r7
- mvi_h_gr 0x80000000,r8
- set_cc 0x0d ; Set mask opposite of expected
- cmp r7,r8
- test_cc 0 0 1 0
-
- set_cc 0x0b ; Set mask opposite of expected
- cmp r8,r8
- test_cc 0 1 0 0
-
- mvi_h_gr 0,r8
- set_cc 0x06 ; Set mask opposite of expected
- cmp r7,r8
- test_cc 1 0 0 1
-
- ; Test cmp $u4,$Ri
- mvi_h_gr 2,r8
- set_cc 0x0f ; Set mask opposite of expected
- cmp 1,r8
- test_cc 0 0 0 0
-
- mvi_h_gr 0x80000000,r8
- set_cc 0x0d ; Set mask opposite of expected
- cmp 1,r8
- test_cc 0 0 1 0
-
- mvi_h_gr 0,r8
- set_cc 0x0b ; Set mask opposite of expected
- cmp 0,r8
- test_cc 0 1 0 0
-
- set_cc 0x06 ; Set mask opposite of expected
- cmp 15,r8
- test_cc 1 0 0 1
-
- pass
diff --git a/sim/testsuite/sim/fr30/cmp2.cgs b/sim/testsuite/sim/fr30/cmp2.cgs
deleted file mode 100644
index 7ba62013cad..00000000000
--- a/sim/testsuite/sim/fr30/cmp2.cgs
+++ /dev/null
@@ -1,27 +0,0 @@
-# fr30 testcase for cmp2 $u4,$Ri
-# mach(): fr30
-
- .include "testutils.inc"
-
- START
-
- .text
- .global cmp2
-cmp2:
- ; Test cmp2 $u4,$Ri
- mvi_h_gr 2,r8
- set_cc 0x0e ; Set mask opposite of expected
- cmp2 -1,r8
- test_cc 0 0 0 1
-
- mvi_h_gr 0x7ffffffe,r8
- set_cc 0x04 ; Set mask opposite of expected
- cmp2 -2,r8
- test_cc 1 0 1 1
-
- mvi_h_gr -16,r8
- set_cc 0x0b ; Set mask opposite of expected
- cmp2 -16,r8
- test_cc 0 1 0 0
-
- pass
diff --git a/sim/testsuite/sim/fr30/copld.cgs b/sim/testsuite/sim/fr30/copld.cgs
deleted file mode 100644
index e0ababb0e85..00000000000
--- a/sim/testsuite/sim/fr30/copld.cgs
+++ /dev/null
@@ -1,21 +0,0 @@
-# fr30 testcase for copld $u4,$cc,$Rj,CRi
-# mach(): fr30
-
- .include "testutils.inc"
-
- START
-
- .text
- .global copld
-copld:
- ; Test copld copld $u4,$cc,$Rj,CRi
- ; The current implementation is a noop
- set_cc 0x0f ; Condition codes are irrelevent
- copld 0,0,r0,cr15
- test_cc 1 1 1 1
-
- set_cc 0x0e ; Condition codes are irrelevent
- copld 15,255,r15,cr0
- test_cc 1 1 1 0
-
- pass
diff --git a/sim/testsuite/sim/fr30/copop.cgs b/sim/testsuite/sim/fr30/copop.cgs
deleted file mode 100644
index b0afd77005b..00000000000
--- a/sim/testsuite/sim/fr30/copop.cgs
+++ /dev/null
@@ -1,21 +0,0 @@
-# fr30 testcase for copop $u4,$cc,$CRj,CRi
-# mach(): fr30
-
- .include "testutils.inc"
-
- START
-
- .text
- .global copop
-copop:
- ; Test copop copop $u4,$cc,$CRj,CRi
- ; The current implementation is a noop
- set_cc 0x0f ; Condition codes are irrelevent
- copop 0,0,cr0,cr15
- test_cc 1 1 1 1
-
- set_cc 0x0e ; Condition codes are irrelevent
- copop 15,255,cr0,cr15
- test_cc 1 1 1 0
-
- pass
diff --git a/sim/testsuite/sim/fr30/copst.cgs b/sim/testsuite/sim/fr30/copst.cgs
deleted file mode 100644
index 00120b2096c..00000000000
--- a/sim/testsuite/sim/fr30/copst.cgs
+++ /dev/null
@@ -1,21 +0,0 @@
-# fr30 testcase for copst $u4,$cc,$CRj,Ri
-# mach(): fr30
-
- .include "testutils.inc"
-
- START
-
- .text
- .global copst
-copst:
- ; Test copst copst $u4,$cc,$CRj,Ri
- ; The current implementation is a noop
- set_cc 0x0f ; Condition codes are irrelevent
- copst 0,0,cr0,r15
- test_cc 1 1 1 1
-
- set_cc 0x0e ; Condition codes are irrelevent
- copst 15,255,cr15,r0
- test_cc 1 1 1 0
-
- pass
diff --git a/sim/testsuite/sim/fr30/copsv.cgs b/sim/testsuite/sim/fr30/copsv.cgs
deleted file mode 100644
index e00a4f5315c..00000000000
--- a/sim/testsuite/sim/fr30/copsv.cgs
+++ /dev/null
@@ -1,21 +0,0 @@
-# fr30 testcase for copsv $u4,$cc,$CRj,Ri
-# mach(): fr30
-
- .include "testutils.inc"
-
- START
-
- .text
- .global copsv
-copsv:
- ; Test copsv copsv $u4,$cc,$CRj,Ri
- ; The current implementation is a noop
- set_cc 0x0f ; Condition codes are irrelevent
- copsv 0,0,cr0,r15
- test_cc 1 1 1 1
-
- set_cc 0x0e ; Condition codes are irrelevent
- copsv 15,255,cr15,r0
- test_cc 1 1 1 0
-
- pass
diff --git a/sim/testsuite/sim/fr30/div.ms b/sim/testsuite/sim/fr30/div.ms
deleted file mode 100644
index 7e3aaf20ae0..00000000000
--- a/sim/testsuite/sim/fr30/div.ms
+++ /dev/null
@@ -1,176 +0,0 @@
-# fr30 testcase for division
-# mach(): fr30
-
- .include "testutils.inc"
-
- START
-
- .text
- .global div
-div:
- ; simple division 12 / 3
- mvi_h_gr 0x00000003,r2
- mvi_h_dr 0xdeadbeef,mdh
- mvi_h_dr 0x0000000c,mdl
- div0s r2
- div1 r2
- div1 r2
- div1 r2
- div1 r2
- div1 r2
- div1 r2
- div1 r2
- div1 r2
- div1 r2
- div1 r2
- div1 r2
- div1 r2
- div1 r2
- div1 r2
- div1 r2
- div1 r2
- div1 r2
- div1 r2
- div1 r2
- div1 r2
- div1 r2
- div1 r2
- div1 r2
- div1 r2
- div1 r2
- div1 r2
- div1 r2
- div1 r2
- div1 r2
- div1 r2
- div1 r2
- div1 r2
- div2 r2
- div3
- div4s
- test_h_gr 0x00000003,r2
- test_h_dr 0x00000000,mdh
- test_h_dr 0x00000004,mdl
- test_dbits 0x0
-
- ; example 1 from div0s the manual
- mvi_h_gr 0x01234567,r2
- mvi_h_dr 0xdeadbeef,mdh
- mvi_h_dr 0xfedcba98,mdl
- div0s r2
- div1 r2
- div1 r2
- div1 r2
- div1 r2
- div1 r2
- div1 r2
- div1 r2
- div1 r2
- div1 r2
- div1 r2
- div1 r2
- div1 r2
- div1 r2
- div1 r2
- div1 r2
- div1 r2
- div1 r2
- div1 r2
- div1 r2
- div1 r2
- div1 r2
- div1 r2
- div1 r2
- div1 r2
- div1 r2
- div1 r2
- div1 r2
- div1 r2
- div1 r2
- div1 r2
- div1 r2
- div1 r2
- div2 r2
- div3
- div4s
- test_h_gr 0x01234567,r2
- test_h_dr 0xffffffff,mdh
- test_h_dr 0xffffffff,mdl
- test_dbits 0x3
-
- ; example 2 from div0s the manual
- mvi_h_dr 0xdeadbeef,mdh
- mvi_h_dr 0xfedcba98,mdl
- mvi_h_gr 0x1234567,r2
- mvi_h_gr 1,r0
- mvi_h_gr 32,r1
- div0s r2
-loop1: sub r0,r1
- bne:d loop1
- div1 r2
- div2 r2
- div3
- div4s
- test_h_gr 0x01234567,r2
- test_h_dr 0xffffffff,mdh
- test_h_dr 0xffffffff,mdl
- test_dbits 0x3
-
- ; example 1 from div0u in the manual
- mvi_h_gr 0x01234567,r2
- mvi_h_dr 0xdeadbeef,mdh
- mvi_h_dr 0xfedcba98,mdl
- div0u r2
- div1 r2
- div1 r2
- div1 r2
- div1 r2
- div1 r2
- div1 r2
- div1 r2
- div1 r2
- div1 r2
- div1 r2
- div1 r2
- div1 r2
- div1 r2
- div1 r2
- div1 r2
- div1 r2
- div1 r2
- div1 r2
- div1 r2
- div1 r2
- div1 r2
- div1 r2
- div1 r2
- div1 r2
- div1 r2
- div1 r2
- div1 r2
- div1 r2
- div1 r2
- div1 r2
- div1 r2
- div1 r2
- test_h_gr 0x01234567,r2
- test_h_dr 0x00000078,mdh
- test_h_dr 0x000000e0,mdl
- test_dbits 0x0
-
- ; example 2 from div0u in the manual
- mvi_h_dr 0xdeadbeef,mdh
- mvi_h_dr 0xfedcba98,mdl
- mvi_h_gr 0x1234567,r2
- mvi_h_gr 1,r0
- mvi_h_gr 32,r1
- div0u r2
-loop2: sub r0,r1
- bne:d loop2
- div1 r2
- test_h_gr 0x01234567,r2
- test_h_dr 0x00000078,mdh
- test_h_dr 0x000000e0,mdl
- test_dbits 0x0
-
- pass
diff --git a/sim/testsuite/sim/fr30/div0s.cgs b/sim/testsuite/sim/fr30/div0s.cgs
deleted file mode 100644
index 84d76c4bfb9..00000000000
--- a/sim/testsuite/sim/fr30/div0s.cgs
+++ /dev/null
@@ -1,64 +0,0 @@
-# fr30 testcase for div0s $Ri
-# mach(): fr30
-
- .include "testutils.inc"
-
- START
-
- .text
- .global div0s
-div0s:
- ; Test div0s $Rj,$Ri
- ; example from the manual - negative dividend
- mvi_h_gr 0x0fffffff,r2
- mvi_h_dr 0x00000000,mdh
- mvi_h_dr 0xfffffff0,mdl
- set_dbits 0x0 ; Set opposite of expected
- set_cc 0x0f ; Condition codes should not change
- div0s r2
- test_cc 1 1 1 1
- test_h_gr 0x0fffffff,r2
- test_h_dr 0xffffffff,mdh
- test_h_dr 0xfffffff0,mdl
- test_dbits 0x3
-
- ; negative divisor
- mvi_h_gr 0xffffffff,r2
- mvi_h_dr 0xffffffff,mdh
- mvi_h_dr 0x7fffffff,mdl
- set_dbits 0x1 ; Set opposite of expected
- set_cc 0x0f ; Condition codes should not change
- div0s r2
- test_cc 1 1 1 1
- test_h_gr 0xffffffff,r2
- test_h_dr 0x00000000,mdh
- test_h_dr 0x7fffffff,mdl
- test_dbits 0x2
-
- ; Both sign bits 0
- mvi_h_gr 0x0fffffff,r2
- mvi_h_dr 0xffffffff,mdh
- mvi_h_dr 0x7ffffff0,mdl
- set_dbits 0x3 ; Set opposite of expected
- set_cc 0x0f ; Condition codes should not change
- div0s r2
- test_cc 1 1 1 1
- test_h_gr 0x0fffffff,r2
- test_h_dr 0x00000000,mdh
- test_h_dr 0x7ffffff0,mdl
- test_dbits 0x0
-
- ; Both sign bits 1
- mvi_h_gr 0xffffffff,r2
- mvi_h_dr 0x00000000,mdh
- mvi_h_dr 0xffffffff,mdl
- set_dbits 0x2 ; Set opposite of expected
- set_cc 0x0f ; Condition codes should not change
- div0s r2
- test_cc 1 1 1 1
- test_h_gr 0xffffffff,r2
- test_h_dr 0xffffffff,mdh
- test_h_dr 0xffffffff,mdl
- test_dbits 0x1
-
- pass
diff --git a/sim/testsuite/sim/fr30/div0u.cgs b/sim/testsuite/sim/fr30/div0u.cgs
deleted file mode 100644
index 8fd84a6c22b..00000000000
--- a/sim/testsuite/sim/fr30/div0u.cgs
+++ /dev/null
@@ -1,25 +0,0 @@
-# fr30 testcase for div0u $Ri
-# mach(): fr30
-
- .include "testutils.inc"
-
- START
-
- .text
- .global div0u
-div0u:
- ; Test div0u $Rj,$Ri
- ; operand register has no effect
- mvi_h_gr 0xdeadbeef,r2
- mvi_h_dr 0xdeadbeef,mdh
- mvi_h_dr 0x0ffffff0,mdl
- set_dbits 0x3 ; Set opposite of expected
- set_cc 0x0f ; Condition codes should not change
- div0u r2
- test_cc 1 1 1 1
- test_h_gr 0xdeadbeef,r2
- test_h_dr 0x00000000,mdh
- test_h_dr 0x0ffffff0,mdl
- test_dbits 0x0
-
- pass
diff --git a/sim/testsuite/sim/fr30/div1.cgs b/sim/testsuite/sim/fr30/div1.cgs
deleted file mode 100644
index dac35fe15c4..00000000000
--- a/sim/testsuite/sim/fr30/div1.cgs
+++ /dev/null
@@ -1,113 +0,0 @@
-# fr30 testcase for div1 $Ri
-# mach(): fr30
-
- .include "testutils.inc"
-
- START
-
- .text
- .global div1
-div1:
- ; Test div1 $Ri
- ; example from the manual -- all status bits 0
- mvi_h_gr 0x00ffffff,r2
- mvi_h_dr 0x00ffffff,mdh
- mvi_h_dr 0x00000000,mdl
- set_dbits 0x0
- set_cc 0x00
- div1 r2
- test_cc 0 0 0 0
- test_dbits 0x0
- test_h_gr 0x00ffffff,r2
- test_h_dr 0x00ffffff,mdh ; misprinted in manual?
- test_h_dr 0x00000001,mdl
-
- ; D0 == 1
- set_dbits 0x1
- set_cc 0x00
- div1 r2
- test_cc 0 0 0 0
- test_dbits 0x1
- test_h_gr 0x00ffffff,r2
- test_h_dr 0x01fffffe,mdh
- test_h_dr 0x00000002,mdl
-
- ; D1 == 1
- set_dbits 0x2
- set_cc 0x00
- div1 r2
- test_cc 0 0 0 0
- test_dbits 0x2
- test_h_gr 0x00ffffff,r2
- test_h_dr 0x03fffffc,mdh
- test_h_dr 0x00000004,mdl
-
- ; D0 == 1, D1 == 1
- set_dbits 0x3
- set_cc 0x00
- div1 r2
- test_cc 0 0 0 0
- test_dbits 0x3
- test_h_gr 0x00ffffff,r2
- test_h_dr 0x08fffff7,mdh
- test_h_dr 0x00000009,mdl
-
- ; C == 1
- mvi_h_gr 0x11ffffef,r2
- set_dbits 0x0
- set_cc 0x00
- div1 r2
- test_cc 0 0 0 1
- test_dbits 0x0
- test_h_gr 0x11ffffef,r2
- test_h_dr 0x11ffffee,mdh
- test_h_dr 0x00000012,mdl
-
- ; D0 == 1, C == 1
- mvi_h_gr 0x23ffffdd,r2
- set_dbits 0x1
- set_cc 0x00
- div1 r2
- test_cc 0 0 0 1
- test_dbits 0x1
- test_h_gr 0x23ffffdd,r2
- test_h_dr 0xffffffff,mdh
- test_h_dr 0x00000025,mdl
-
- ; D1 == 1, C == 1
- mvi_h_gr 0x00000003,r2
- set_dbits 0x2
- set_cc 0x00
- div1 r2
- test_cc 0 0 0 1
- test_dbits 0x2
- test_h_gr 0x00000003,r2
- test_h_dr 0x00000001,mdh
- test_h_dr 0x0000004b,mdl
-
- ; D0 == 1, D1 == 1, C == 1
- mvi_h_gr 0xfffffffe,r2
- set_dbits 0x3
- set_cc 0x00
- div1 r2
- test_cc 0 0 0 1
- test_dbits 0x3
- test_h_gr 0xfffffffe,r2
- test_h_dr 0x00000002,mdh
- test_h_dr 0x00000096,mdl
-
- ; remainder is zero
- mvi_h_gr 0x00000004,r2
- set_dbits 0x0
- set_cc 0x00
- div1 r2
- test_cc 0 1 0 0
- test_dbits 0x0
- test_h_gr 0x00000004,r2
- test_h_dr 0x00000000,mdh
- test_h_dr 0x0000012d,mdl
-
- pass
-
-
-
diff --git a/sim/testsuite/sim/fr30/div2.cgs b/sim/testsuite/sim/fr30/div2.cgs
deleted file mode 100644
index 03000a24242..00000000000
--- a/sim/testsuite/sim/fr30/div2.cgs
+++ /dev/null
@@ -1,120 +0,0 @@
-# fr30 testcase for div2 $Ri
-# mach(): fr30
-
- .include "testutils.inc"
-
- START
-
- .text
- .global div2
-div2:
- ; Test div2 $Ri
- ; example from the manual -- all status bits 0
- mvi_h_gr 0x00ffffff,r2
- mvi_h_dr 0x00ffffff,mdh
- mvi_h_dr 0x0000000f,mdl
- set_dbits 0x0
- set_cc 0x00
- div2 r2
- test_cc 0 1 0 0
- test_dbits 0x0
- test_h_gr 0x00ffffff,r2
- test_h_dr 0x00000000,mdh
- test_h_dr 0x0000000f,mdl
-
- ; D0 == 1
- mvi_h_dr 0x00ffffff,mdh
- set_dbits 0x1
- set_cc 0x00
- div2 r2
- test_cc 0 1 0 0
- test_dbits 0x1
- test_h_gr 0x00ffffff,r2
- test_h_dr 0x00000000,mdh
- test_h_dr 0x0000000f,mdl
-
- ; D1 == 1
- mvi_h_dr 0x00ffffff,mdh
- set_dbits 0x2
- set_cc 0x00
- div2 r2
- test_cc 0 0 0 0
- test_dbits 0x2
- test_h_gr 0x00ffffff,r2
- test_h_dr 0x00ffffff,mdh
- test_h_dr 0x0000000f,mdl
-
- ; D0 == 1, D1 == 1
- set_dbits 0x3
- set_cc 0x00
- div2 r2
- test_cc 0 0 0 0
- test_dbits 0x3
- test_h_gr 0x00ffffff,r2
- test_h_dr 0x00ffffff,mdh
- test_h_dr 0x0000000f,mdl
-
- ; C == 1
- mvi_h_dr 0x11ffffee,mdh
- mvi_h_gr 0x11ffffef,r2
- set_dbits 0x0
- set_cc 0x00
- div2 r2
- test_cc 0 0 0 1
- test_dbits 0x0
- test_h_gr 0x11ffffef,r2
- test_h_dr 0x11ffffee,mdh
- test_h_dr 0x0000000f,mdl
-
- ; D0 == 1, C == 1
- mvi_h_dr 0x23ffffdc,mdh
- mvi_h_gr 0x23ffffdd,r2
- set_dbits 0x1
- set_cc 0x00
- div2 r2
- test_cc 0 0 0 1
- test_dbits 0x1
- test_h_gr 0x23ffffdd,r2
- test_h_dr 0x23ffffdc,mdh
- test_h_dr 0x0000000f,mdl
-
- ; D1 == 1, C == 1
- mvi_h_dr 0xfffffffd,mdh
- mvi_h_gr 0x00000004,r2
- set_dbits 0x2
- set_cc 0x00
- div2 r2
- test_cc 0 0 0 1
- test_dbits 0x2
- test_h_gr 0x00000004,r2
- test_h_dr 0xfffffffd,mdh
- test_h_dr 0x0000000f,mdl
-
- ; D0 == 1, D1 == 1, C == 1
- mvi_h_dr 0x00000002,mdh
- mvi_h_gr 0xffffffff,r2
- set_dbits 0x3
- set_cc 0x00
- div2 r2
- test_cc 0 0 0 1
- test_dbits 0x3
- test_h_gr 0xffffffff,r2
- test_h_dr 0x00000002,mdh
- test_h_dr 0x0000000f,mdl
-
- ; remainder is zero
- mvi_h_dr 0x00000004,mdh
- mvi_h_gr 0x00000004,r2
- set_dbits 0x0
- set_cc 0x00
- div2 r2
- test_cc 0 1 0 0
- test_dbits 0x0
- test_h_gr 0x00000004,r2
- test_h_dr 0x00000000,mdh
- test_h_dr 0x0000000f,mdl
-
- pass
-
-
-
diff --git a/sim/testsuite/sim/fr30/div3.cgs b/sim/testsuite/sim/fr30/div3.cgs
deleted file mode 100644
index ee7da1a8042..00000000000
--- a/sim/testsuite/sim/fr30/div3.cgs
+++ /dev/null
@@ -1,34 +0,0 @@
-# fr30 testcase for div3
-# mach(): fr30
-
- .include "testutils.inc"
-
- START
-
- .text
- .global div3
-div3:
- ; Test div3
- ; example from the manual
- mvi_h_gr 0x00ffffff,r2
- mvi_h_dr 0x00000000,mdh
- mvi_h_dr 0x0000000f,mdl
- set_dbits 0x0
- set_cc 0x04
- div3
- test_cc 0 1 0 0
- test_dbits 0x0
- test_h_gr 0x00ffffff,r2
- test_h_dr 0x00000000,mdh
- test_h_dr 0x00000010,mdl
-
- set_dbits 0x0
- set_cc 0x00
- div3
- test_cc 0 0 0 0
- test_dbits 0x0
- test_h_gr 0x00ffffff,r2
- test_h_dr 0x00000000,mdh
- test_h_dr 0x00000010,mdl
-
- pass
diff --git a/sim/testsuite/sim/fr30/div4s.cgs b/sim/testsuite/sim/fr30/div4s.cgs
deleted file mode 100644
index 3b98ecaf1c3..00000000000
--- a/sim/testsuite/sim/fr30/div4s.cgs
+++ /dev/null
@@ -1,34 +0,0 @@
-# fr30 testcase for div4s
-# mach(): fr30
-
- .include "testutils.inc"
-
- START
-
- .text
- .global div4s
-div4s:
- ; Test div4s
- ; example from the manual
- mvi_h_gr 0x00ffffff,r2
- mvi_h_dr 0x00000000,mdh
- mvi_h_dr 0x0000000f,mdl
- set_dbits 0x3
- set_cc 0x0f
- div4s
- test_cc 1 1 1 1
- test_dbits 0x3
- test_h_gr 0x00ffffff,r2
- test_h_dr 0x00000000,mdh
- test_h_dr 0xfffffff1,mdl
-
- set_dbits 0x0
- set_cc 0x00
- div4s
- test_cc 0 0 0 0
- test_dbits 0x0
- test_h_gr 0x00ffffff,r2
- test_h_dr 0x00000000,mdh
- test_h_dr 0xfffffff1,mdl
-
- pass
diff --git a/sim/testsuite/sim/fr30/dmov.cgs b/sim/testsuite/sim/fr30/dmov.cgs
deleted file mode 100644
index bd2e5cc45ff..00000000000
--- a/sim/testsuite/sim/fr30/dmov.cgs
+++ /dev/null
@@ -1,73 +0,0 @@
-# fr30 testcase for dmov
-# mach(): fr30
-
- .include "testutils.inc"
- START
-
- .text
- .global dmov
-dmov:
- ; Test dmov @$dir10,$R13
- mvi_h_gr 0xdeadbeef,r1
- mvi_h_gr 0x200,r2
- mvr_h_mem r1,r2
- set_cc 0x0f ; Condition codes shouldn't change
- dmov @0x200,r13
- test_cc 1 1 1 1
- test_h_gr 0xdeadbeef,r13
-
- ; Test dmov $R13,@$dir10
- mvi_h_gr 0xbeefdead,r13
- set_cc 0x0e ; Condition codes shouldn't change
- dmov r13,@0x200
- test_cc 1 1 1 0
- test_h_mem 0xbeefdead,r2
-
- ; Test dmov @$dir10,@R13+
- mvi_h_gr 0x1fc,r13
- set_cc 0x0d ; Condition codes shouldn't change
- dmov @0x200,@r13+
- test_cc 1 1 0 1
- mvi_h_gr 0x1fc,r2
- test_h_mem 0xbeefdead,r2
- inci_h_gr 4,r2
- test_h_mem 0xbeefdead,r2
- test_h_gr 0x200,r13
-
- ; Test dmov @$R13+,@$dir10
- mvi_h_gr 0x1fc,r13
- mvi_h_mem 0xdeadbeef,r13
- set_cc 0x0c ; Condition codes shouldn't change
- dmov @r13+,@0x200
- test_cc 1 1 0 0
- mvi_h_gr 0x1fc,r2
- test_h_mem 0xdeadbeef,r2
- inci_h_gr 4,r2
- test_h_mem 0xdeadbeef,r2
- test_h_gr 0x200,r13
-
- ; Test dmov @$dir10,@-R15
- mvi_h_gr 0x200,r15
- mvi_h_mem 0xdeadbeef,r15
- set_cc 0x0b ; Condition codes shouldn't change
- dmov @0x200,@-r15
- test_cc 1 0 1 1
- mvi_h_gr 0x1fc,r2
- test_h_mem 0xdeadbeef,r2
- inci_h_gr 4,r2
- test_h_mem 0xdeadbeef,r2
- test_h_gr 0x1fc,r15
-
- ; Test dmov @$R15+,@$dir10
- mvi_h_gr 0x1fc,r15
- mvi_h_mem 0xbeefdead,r15
- set_cc 0x0a ; Condition codes shouldn't change
- dmov @r15+,@0x200
- test_cc 1 0 1 0
- mvi_h_gr 0x1fc,r2
- test_h_mem 0xbeefdead,r2
- inci_h_gr 4,r2
- test_h_mem 0xbeefdead,r2
- test_h_gr 0x200,r15
-
- pass
diff --git a/sim/testsuite/sim/fr30/dmovb.cgs b/sim/testsuite/sim/fr30/dmovb.cgs
deleted file mode 100644
index 96cfb9d3e08..00000000000
--- a/sim/testsuite/sim/fr30/dmovb.cgs
+++ /dev/null
@@ -1,46 +0,0 @@
-# fr30 testcase for dmovb
-# mach(): fr30
-
- .include "testutils.inc"
- START
-
- .text
- .global dmovb
-dmovb:
- ; Test dmovb @$dir8,$R13
- mvi_h_gr 0xdeadbeef,r1
- mvi_h_gr 0x80,r2
- mvr_h_mem r1,r2
- set_cc 0x0f ; Condition codes shouldn't change
- dmovb @0x80,r13
- test_cc 1 1 1 1
- test_h_gr 0xffffffde,r13
-
- ; Test dmovb $R13,@$dir8
- mvi_h_gr 0xbeefdead,r13
- set_cc 0x0e ; Condition codes shouldn't change
- dmovb r13,@0x80
- test_cc 1 1 1 0
- test_h_mem 0xadadbeef,r2
-
- ; Test dmovb @$dir8,@R13+
- mvi_h_gr 0x7c,r13
- mvi_h_mem 0xdeadbeef,r13
- set_cc 0x0d ; Condition codes shouldn't change
- dmovb @0x7f,@r13+
- test_cc 1 1 0 1
- mvi_h_gr 0x7c,r2
- test_h_mem 0xefadbeef,r2
- test_h_gr 0x7d,r13
-
- ; Test dmovb @$R13+,@$dir8
- mvi_h_gr 0x7c,r13
- mvi_h_mem 0xbeefdead,r13
- set_cc 0x0c ; Condition codes shouldn't change
- dmovb @r13+,@0x7f
- test_cc 1 1 0 0
- mvi_h_gr 0x7c,r2
- test_h_mem 0xbeefdebe,r2
- test_h_gr 0x7d,r13
-
- pass
diff --git a/sim/testsuite/sim/fr30/dmovh.cgs b/sim/testsuite/sim/fr30/dmovh.cgs
deleted file mode 100644
index 86afb44f411..00000000000
--- a/sim/testsuite/sim/fr30/dmovh.cgs
+++ /dev/null
@@ -1,46 +0,0 @@
-# fr30 testcase for dmovh
-# mach(): fr30
-
- .include "testutils.inc"
- START
-
- .text
- .global dmovh
-dmovh:
- ; Test dmovh @$dir9,$R13
- mvi_h_gr 0xdeadbeef,r1
- mvi_h_gr 0x100,r2
- mvr_h_mem r1,r2
- set_cc 0x0f ; Condition codes shouldn't change
- dmovh @0x100,r13
- test_cc 1 1 1 1
- test_h_gr 0xffffdead,r13
-
- ; Test dmovh $R13,@$dir9
- mvi_h_gr 0xdeadbeef,r13
- set_cc 0x0e ; Condition codes shouldn't change
- dmovh r13,@0x100
- test_cc 1 1 1 0
- test_h_mem 0xbeefbeef,r2
-
- ; Test dmovh @$dir9,@R13+
- mvi_h_gr 0x1fc,r13
- mvi_h_mem 0xdeadbeef,r13
- set_cc 0x0d ; Condition codes shouldn't change
- dmovh @0x1fe,@r13+
- test_cc 1 1 0 1
- mvi_h_gr 0x1fc,r2
- test_h_mem 0xbeefbeef,r2
- test_h_gr 0x1fe,r13
-
- ; Test dmovh @$R13+,@$dir9
- mvi_h_gr 0x1fc,r13
- mvi_h_mem 0xbeefdead,r13
- set_cc 0x0c ; Condition codes shouldn't change
- dmovh @r13+,@0x1fe
- test_cc 1 1 0 0
- mvi_h_gr 0x1fc,r2
- test_h_mem 0xbeefbeef,r2
- test_h_gr 0x1fe,r13
-
- pass
diff --git a/sim/testsuite/sim/fr30/enter.cgs b/sim/testsuite/sim/fr30/enter.cgs
deleted file mode 100644
index ae75e16a2e1..00000000000
--- a/sim/testsuite/sim/fr30/enter.cgs
+++ /dev/null
@@ -1,34 +0,0 @@
-# fr30 testcase for enter $u10
-# mach(): fr30
-
- .include "testutils.inc"
-
- START
-
- .text
- .global enter
-enter:
- ; Test enter $u10
- mvr_h_gr sp,r7 ; save stack pointer
- mvr_h_gr sp,r8 ; shadow stack pointer
- mvr_h_gr sp,r14 ; Initialize
- set_cc 0x0f ; Condition codes are irrelevent
- enter 0
- test_cc 1 1 1 1
- testr_h_gr r8,sp
- inci_h_gr -4,r8
- testr_h_gr r14,r8
- testr_h_mem r7,r14
-
- mvr_h_gr sp,r8 ; shadow stack pointer
- mvr_h_gr r14,r9 ; save
- set_cc 0x0e ; Condition codes are irrelevent
- enter 0x3fc
- test_cc 1 1 1 0
- inci_h_gr -4,r8
- testr_h_gr r14,r8
- testr_h_mem r9,r14
- inci_h_gr -0x3f8,r8
- testr_h_gr r8,sp
-
- pass
diff --git a/sim/testsuite/sim/fr30/eor.cgs b/sim/testsuite/sim/fr30/eor.cgs
deleted file mode 100644
index a87076151cf..00000000000
--- a/sim/testsuite/sim/fr30/eor.cgs
+++ /dev/null
@@ -1,69 +0,0 @@
-# fr30 testcase for eor $Rj,$Ri, eor $Rj,@$Ri
-# mach(): fr30
-
- .include "testutils.inc"
-
- START
-
- .text
- .global eor
-eor:
- ; Test eor $Rj,$Ri
- mvi_h_gr 0xaaaaaaaa,r7
- mvi_h_gr 0x55555555,r8
- set_cc 0x07 ; Set mask opposite of expected
- eor r7,r8
- test_cc 1 0 1 1
- test_h_gr 0xffffffff,r8
-
- mvi_h_gr 0x00000000,r7
- mvi_h_gr 0x00000000,r8
- set_cc 0x08 ; Set mask opposite of expected
- eor r7,r8
- test_cc 0 1 0 0
- test_h_gr 0x00000000,r8
-
- mvi_h_gr 0xaaaaaaaa,r7
- mvi_h_gr 0xaaaaaaaa,r8
- set_cc 0x0b ; Set mask opposite of expected
- eor r7,r8
- test_cc 0 1 1 1
- test_h_gr 0x00000000,r8
-
- mvi_h_gr 0xdead0000,r7
- mvi_h_gr 0x0000beef,r8
- set_cc 0x05 ; Set mask opposite of expected
- eor r7,r8
- test_cc 1 0 0 1
- test_h_gr 0xdeadbeef,r8
-
- ; Test eor $Rj,@$Ri
- mvi_h_gr 0xaaaaaaaa,r7
- mvi_h_mem 0x55555555,sp
- set_cc 0x07 ; Set mask opposite of expected
- eor r7,@sp
- test_cc 1 0 1 1
- test_h_mem 0xffffffff,sp
-
- mvi_h_gr 0x00000000,r7
- mvi_h_mem 0x00000000,sp
- set_cc 0x08 ; Set mask opposite of expected
- eor r7,@sp
- test_cc 0 1 0 0
- test_h_mem 0x00000000,sp
-
- mvi_h_gr 0xaaaaaaaa,r7
- mvi_h_mem 0xaaaaaaaa,sp
- set_cc 0x0b ; Set mask opposite of expected
- eor r7,@sp
- test_cc 0 1 1 1
- test_h_mem 0x00000000,sp
-
- mvi_h_gr 0xdead0000,r7
- mvi_h_mem 0x0000beef,sp
- set_cc 0x05 ; Set mask opposite of expected
- eor r7,@sp
- test_cc 1 0 0 1
- test_h_mem 0xdeadbeef,sp
-
- pass
diff --git a/sim/testsuite/sim/fr30/eorb.cgs b/sim/testsuite/sim/fr30/eorb.cgs
deleted file mode 100644
index 540f3f7aa1f..00000000000
--- a/sim/testsuite/sim/fr30/eorb.cgs
+++ /dev/null
@@ -1,40 +0,0 @@
-# fr30 testcase for eorb $Rj,$Ri, eorb $Rj,@$Ri
-# mach(): fr30
-
- .include "testutils.inc"
-
- START
-
- .text
- .global eorb
-eorb:
- ; Test eorb $Rj,@$Ri
- mvi_h_gr 0xaaaaaaaa,r7
- mvi_h_mem 0x55555555,sp
- set_cc 0x07 ; Set mask opposite of expected
- eorb r7,@sp
- test_cc 1 0 1 1
- test_h_mem 0xff555555,sp
-
- mvi_h_gr 0xaaaaaa00,r7
- mvi_h_mem 0x00555555,sp
- set_cc 0x08 ; Set mask opposite of expected
- eorb r7,@sp
- test_cc 0 1 0 0
- test_h_mem 0x00555555,sp
-
- mvi_h_gr 0xaaaaaa55,r7
- mvi_h_mem 0x55aaaaaa,sp
- set_cc 0x0b ; Set mask opposite of expected
- eorb r7,@sp
- test_cc 0 1 1 1
- test_h_mem 0x00aaaaaa,sp
-
- mvi_h_gr 0x000000d0,r7
- mvi_h_mem 0x0eadbeef,sp
- set_cc 0x05 ; Set mask opposite of expected
- eorb r7,@sp
- test_cc 1 0 0 1
- test_h_mem 0xdeadbeef,sp
-
- pass
diff --git a/sim/testsuite/sim/fr30/eorh.cgs b/sim/testsuite/sim/fr30/eorh.cgs
deleted file mode 100644
index 7cf84735959..00000000000
--- a/sim/testsuite/sim/fr30/eorh.cgs
+++ /dev/null
@@ -1,40 +0,0 @@
-# fr30 testcase for eorh $Rj,$Ri, eorh $Rj,@$Ri
-# mach(): fr30
-
- .include "testutils.inc"
-
- START
-
- .text
- .global eorh
-eorh:
- ; Test eorh $Rj,@$Ri
- mvi_h_gr 0xaaaaaaaa,r7
- mvi_h_mem 0x55555555,sp
- set_cc 0x07 ; Set mask opposite of expected
- eorh r7,@sp
- test_cc 1 0 1 1
- test_h_mem 0xffff5555,sp
-
- mvi_h_gr 0xaaaa0000,r7
- mvi_h_mem 0x00005555,sp
- set_cc 0x08 ; Set mask opposite of expected
- eorh r7,@sp
- test_cc 0 1 0 0
- test_h_mem 0x00005555,sp
-
- mvi_h_gr 0xaaaa5555,r7
- mvi_h_mem 0x5555aaaa,sp
- set_cc 0x0b ; Set mask opposite of expected
- eorh r7,@sp
- test_cc 0 1 1 1
- test_h_mem 0x0000aaaa,sp
-
- mvi_h_gr 0x0000de00,r7
- mvi_h_mem 0x00adbeef,sp
- set_cc 0x05 ; Set mask opposite of expected
- eorh r7,@sp
- test_cc 1 0 0 1
- test_h_mem 0xdeadbeef,sp
-
- pass
diff --git a/sim/testsuite/sim/fr30/extsb.cgs b/sim/testsuite/sim/fr30/extsb.cgs
deleted file mode 100644
index 6a18d7e7dae..00000000000
--- a/sim/testsuite/sim/fr30/extsb.cgs
+++ /dev/null
@@ -1,36 +0,0 @@
-# fr30 testcase for extsb $Ri
-# mach(): fr30
-
- .include "testutils.inc"
-
- START
-
- .text
- .global extsb
-extsb:
- ; Test extsb $Ri
- mvi_h_gr 0,r7
- set_cc 0x0f ; Condition codes are irrelevent
- extsb r7
- test_cc 1 1 1 1
- test_h_gr 0,r7
-
- mvi_h_gr 0x7f,r7
- set_cc 0x0e ; Condition codes are irrelevent
- extsb r7
- test_cc 1 1 1 0
- test_h_gr 0x7f,r7
-
- mvi_h_gr 0x80,r7
- set_cc 0x0d ; Condition codes are irrelevent
- extsb r7
- test_cc 1 1 0 1
- test_h_gr 0xffffff80,r7
-
- mvi_h_gr 0xffffff7f,r7
- set_cc 0x0c ; Condition codes are irrelevent
- extsb r7
- test_cc 1 1 0 0
- test_h_gr 0x7f,r7
-
- pass
diff --git a/sim/testsuite/sim/fr30/extsh.cgs b/sim/testsuite/sim/fr30/extsh.cgs
deleted file mode 100644
index eb12fd0aae8..00000000000
--- a/sim/testsuite/sim/fr30/extsh.cgs
+++ /dev/null
@@ -1,48 +0,0 @@
-# fr30 testcase for extsh $Ri
-# mach(): fr30
-
- .include "testutils.inc"
-
- START
-
- .text
- .global extsh
-extsh:
- ; Test extsh $Ri
- mvi_h_gr 0,r7
- set_cc 0x0f ; Condition codes are irrelevent
- extsh r7
- test_cc 1 1 1 1
- test_h_gr 0,r7
-
- mvi_h_gr 0x7f,r7
- set_cc 0x0e ; Condition codes are irrelevent
- extsh r7
- test_cc 1 1 1 0
- test_h_gr 0x7f,r7
-
- mvi_h_gr 0x80,r7
- set_cc 0x0d ; Condition codes are irrelevent
- extsh r7
- test_cc 1 1 0 1
- test_h_gr 0x80,r7
-
- mvi_h_gr 0x7fff,r7
- set_cc 0x0c ; Condition codes are irrelevent
- extsh r7
- test_cc 1 1 0 0
- test_h_gr 0x7fff,r7
-
- mvi_h_gr 0x8000,r7
- set_cc 0x0b ; Condition codes are irrelevent
- extsh r7
- test_cc 1 0 1 1
- test_h_gr 0xffff8000,r7
-
- mvi_h_gr 0xffff7fff,r7
- set_cc 0x0a ; Condition codes are irrelevent
- extsh r7
- test_cc 1 0 1 0
- test_h_gr 0x7fff,r7
-
- pass
diff --git a/sim/testsuite/sim/fr30/extub.cgs b/sim/testsuite/sim/fr30/extub.cgs
deleted file mode 100644
index ddcc68361cc..00000000000
--- a/sim/testsuite/sim/fr30/extub.cgs
+++ /dev/null
@@ -1,42 +0,0 @@
-# fr30 testcase for extub $Ri
-# mach(): fr30
-
- .include "testutils.inc"
-
- START
-
- .text
- .global extub
-extub:
- ; Test extub $Ri
- mvi_h_gr 0,r7
- set_cc 0x0f ; Condition codes are irrelevent
- extub r7
- test_cc 1 1 1 1
- test_h_gr 0,r7
-
- mvi_h_gr 0x7f,r7
- set_cc 0x0e ; Condition codes are irrelevent
- extub r7
- test_cc 1 1 1 0
- test_h_gr 0x7f,r7
-
- mvi_h_gr 0x80,r7
- set_cc 0x0d ; Condition codes are irrelevent
- extub r7
- test_cc 1 1 0 1
- test_h_gr 0x80,r7
-
- mvi_h_gr 0xffffff7f,r7
- set_cc 0x0c ; Condition codes are irrelevent
- extub r7
- test_cc 1 1 0 0
- test_h_gr 0x7f,r7
-
- mvi_h_gr 0xffffff80,r7
- set_cc 0x0b ; Condition codes are irrelevent
- extub r7
- test_cc 1 0 1 1
- test_h_gr 0x80,r7
-
- pass
diff --git a/sim/testsuite/sim/fr30/extuh.cgs b/sim/testsuite/sim/fr30/extuh.cgs
deleted file mode 100644
index fa2579e469f..00000000000
--- a/sim/testsuite/sim/fr30/extuh.cgs
+++ /dev/null
@@ -1,54 +0,0 @@
-# fr30 testcase for extuh $Ri
-# mach(): fr30
-
- .include "testutils.inc"
-
- START
-
- .text
- .global extuh
-extuh:
- ; Test extuh $Ri
- mvi_h_gr 0,r7
- set_cc 0x0f ; Condition codes are irrelevent
- extuh r7
- test_cc 1 1 1 1
- test_h_gr 0,r7
-
- mvi_h_gr 0x7f,r7
- set_cc 0x0e ; Condition codes are irrelevent
- extuh r7
- test_cc 1 1 1 0
- test_h_gr 0x7f,r7
-
- mvi_h_gr 0x80,r7
- set_cc 0x0d ; Condition codes are irrelevent
- extuh r7
- test_cc 1 1 0 1
- test_h_gr 0x80,r7
-
- mvi_h_gr 0x7fff,r7
- set_cc 0x0e ; Condition codes are irrelevent
- extuh r7
- test_cc 1 1 1 0
- test_h_gr 0x7fff,r7
-
- mvi_h_gr 0x8000,r7
- set_cc 0x0d ; Condition codes are irrelevent
- extuh r7
- test_cc 1 1 0 1
- test_h_gr 0x8000,r7
-
- mvi_h_gr 0xffff7fff,r7
- set_cc 0x0c ; Condition codes are irrelevent
- extuh r7
- test_cc 1 1 0 0
- test_h_gr 0x7fff,r7
-
- mvi_h_gr 0xffff8000,r7
- set_cc 0x0b ; Condition codes are irrelevent
- extuh r7
- test_cc 1 0 1 1
- test_h_gr 0x8000,r7
-
- pass
diff --git a/sim/testsuite/sim/fr30/hello.ms b/sim/testsuite/sim/fr30/hello.ms
deleted file mode 100644
index 0f208dfb927..00000000000
--- a/sim/testsuite/sim/fr30/hello.ms
+++ /dev/null
@@ -1,19 +0,0 @@
-# mach: fr30
-# output: Hello world!\n
-
- .global _start
-_start:
-
-; write (hello world)
- ldi32 #14,r6
- ldi32 #hello,r5
- ldi32 #1,r4
- ldi32 #5,r0
- int #10
-; exit (0)
- ldi32 #0,r4
- ldi32 #1,r0
- int #10
-
-length: .long 14
-hello: .ascii "Hello world!\r\n"
diff --git a/sim/testsuite/sim/fr30/int.cgs b/sim/testsuite/sim/fr30/int.cgs
deleted file mode 100644
index 7cdca7b8c9b..00000000000
--- a/sim/testsuite/sim/fr30/int.cgs
+++ /dev/null
@@ -1,35 +0,0 @@
-# fr30 testcase for int $u8
-# mach(): fr30
-
- .include "testutils.inc"
-
- START
-
- .text
- .global int
-int:
- ; Test int $u8 - setup and test an interrupt #0xfd (randomly chosen)
- mvr_h_gr tbr,r7
- inci_h_gr 8,r7
- mvi_h_mem pass,r7
- mvi_h_gr doint,r9
- inci_h_gr 2,r9
- mvr_h_gr ssp,r10
- set_cc 0x0f ; Condition codes should not change
- set_s_user ; Set opposite of expected
- set_i 1 ; Set opposite of expected
- mvr_h_gr ps,r8
-doint: int 0xfd
- fail
-
-pass:
- test_cc 1 1 1 1
- test_s_system
- test_i 0
- inci_h_gr -4,r10
- testr_h_mem r8,r10
- inci_h_gr -4,r10
- testr_h_mem r9,r10
- testr_h_dr r10,ssp
-
- pass
diff --git a/sim/testsuite/sim/fr30/inte.cgs b/sim/testsuite/sim/fr30/inte.cgs
deleted file mode 100644
index a15bfd978a2..00000000000
--- a/sim/testsuite/sim/fr30/inte.cgs
+++ /dev/null
@@ -1,36 +0,0 @@
-# fr30 testcase for inte
-# mach(): fr30
-
- .include "testutils.inc"
-
- START
-
- .text
- .global inte
-inte:
- ; Test inte which is essentially int #9
- mvr_h_gr tbr,r7
- inci_h_gr 0x3d8,r7
- mvi_h_mem pass,r7
- mvi_h_gr doint,r9
- inci_h_gr 2,r9
- mvr_h_gr ssp,r10
- set_cc 0x0f ; Condition codes should not change
- set_s_user ; Set opposite of expected
- set_i 1 ; Should not change
- mvr_h_gr ps,r8
-doint: inte
- fail
-
-pass:
- test_cc 1 1 1 1
- test_ilm 4
- test_s_system
- test_i 1
- inci_h_gr -4,r10
- testr_h_mem r8,r10
- inci_h_gr -4,r10
- testr_h_mem r9,r10
- testr_h_dr r10,ssp
-
- pass
diff --git a/sim/testsuite/sim/fr30/jmp.cgs b/sim/testsuite/sim/fr30/jmp.cgs
deleted file mode 100644
index db4af220d36..00000000000
--- a/sim/testsuite/sim/fr30/jmp.cgs
+++ /dev/null
@@ -1,29 +0,0 @@
-# fr30 testcase for jmp @$Ri
-# mach(): fr30
-
- .include "testutils.inc"
-
- START
-
- .text
- .global jmp
-
- ; Test jmp $Ri
- mvi_h_gr #func1,r0
- set_cc 0x0f ; condition codes shouldn't change
-jmp1:
- jmp @r0
- fail
-func1:
- test_cc 1 1 1 1
- mvi_h_gr #func2,r0
- set_cc 0x0f ; condition codes shouldn't change
-jmp2:
- jmp:d @r0
- ldi:8 1,r0 ; Must assume this works
- fail
-func2:
- test_cc 1 1 1 1
- testr_h_gr 1,r0
-
- pass
diff --git a/sim/testsuite/sim/fr30/ld.cgs b/sim/testsuite/sim/fr30/ld.cgs
deleted file mode 100644
index 3f2d30bb023..00000000000
--- a/sim/testsuite/sim/fr30/ld.cgs
+++ /dev/null
@@ -1,219 +0,0 @@
-# fr30 testcase for
-# mach(): fr30
-# ld $Rj,$Ri
-# ld @($R13,$Rj),$Ri
-# ld @($R14,$disp10),$Ri
-# ld @($R15,$udisp6),$Ri
-# ld @$R15+,$Ri
-# ld @$R15+,$Rs
-
- .include "testutils.inc"
-
- START
-
- .text
- .global ld
-ld:
- ; Test ld $Rj,$Ri
- mvi_h_mem #0x00000000,sp
- set_cc 0x0f ; condition codes should not change
- ld @sp,r7
- test_cc 1 1 1 1
- test_h_gr 0,r7
-
- mvi_h_mem #0x00000001,sp
- set_cc 0x07 ; condition codes should not change
- ld @sp,r7
- test_cc 0 1 1 1
- test_h_gr 1,r7
-
- mvi_h_mem #0x7fffffff,sp
- set_cc 0x0b ; condition codes should not change
- ld @sp,r7
- test_cc 1 0 1 1
- test_h_gr 0x7fffffff,r7
-
- mvi_h_mem #0x80000000,sp
- set_cc 0x0d ; condition codes should not change
- ld @sp,r7
- test_cc 1 1 0 1
- test_h_gr 0x80000000,r7
-
- mvi_h_mem #0xffffffff,sp
- set_cc 0x0e ; condition codes should not change
- ld @sp,r7
- test_cc 1 1 1 0
- test_h_gr -1,r7
-
- ; Test ld @($R13,$Rj),$Ri
- mvr_h_gr sp,r13
- inci_h_gr -8,r13
- mvi_h_gr 8,r8
-
- mvi_h_mem #0x00000000,sp
- set_cc 0x0f ; condition codes should not change
- ld @(r13,r8),r7
- test_cc 1 1 1 1
- test_h_gr 0,r7
-
- mvi_h_mem #0x00000001,sp
- set_cc 0x07 ; condition codes should not change
- ld @(r13,r8),r7
- test_cc 0 1 1 1
- test_h_gr 1,r7
-
- mvi_h_mem #0x7fffffff,sp
- set_cc 0x0b ; condition codes should not change
- ld @(r13,r8),r7
- test_cc 1 0 1 1
- test_h_gr 0x7fffffff,r7
-
- mvi_h_mem #0x80000000,sp
- set_cc 0x0d ; condition codes should not change
- ld @(r13,r8),r7
- test_cc 1 1 0 1
- test_h_gr 0x80000000,r7
-
- mvi_h_mem #0xffffffff,sp
- set_cc 0x0e ; condition codes should not change
- ld @(r13,r8),r7
- test_cc 1 1 1 0
- test_h_gr -1,r7
-
- ; Test ld @($R14,$disp10),$Ri
- mvi_h_mem #0xdeadbeef,sp
- mvr_h_gr sp,r14
- mvi_h_gr -0x1fc,r8
- add_h_gr r8,r14
-
- set_cc 0x0f ; condition codes should not change
- ld @(r14,0x1fc),r7
- test_cc 1 1 1 1
- test_h_gr 0xdeadbeef,r7
-
- inci_h_gr 0xfc,r14
- set_cc 0x07 ; condition codes should not change
- ld @(r14,0x100),r7
- test_cc 0 1 1 1
- test_h_gr 0xdeadbeef,r7
-
- inci_h_gr 0x100,r14
- set_cc 0x0b ; condition codes should not change
- ld @(r14,0x0),r7
- test_cc 1 0 1 1
- test_h_gr 0xdeadbeef,r7
-
- inci_h_gr 0x100,r14
- set_cc 0x0d ; condition codes should not change
- ld @(r14,-0x100),r7
- test_cc 1 1 0 1
- test_h_gr 0xdeadbeef,r7
-
- inci_h_gr 0x100,r14
- set_cc 0x0e ; condition codes should not change
- ld @(r14,-0x200),r7
- test_cc 1 1 1 0
- test_h_gr 0xdeadbeef,r7
-
- ; Test ld @($R15,$udisp6),$Ri
- mvi_h_mem #0xdeadbeef,sp
- mvr_h_gr sp,r14
- mvi_h_gr -0x3c,r8
- add_h_gr r8,r14
-
- set_cc 0x0f ; condition codes should not change
- ld @(r14,0x3c),r7
- test_cc 1 1 1 1
- test_h_gr 0xdeadbeef,r7
-
- inci_h_gr 0x1c,r14
- set_cc 0x07 ; condition codes should not change
- ld @(r14,0x20),r7
- test_cc 0 1 1 1
- test_h_gr 0xdeadbeef,r7
-
- inci_h_gr 0x20,r14
- set_cc 0x0b ; condition codes should not change
- ld @(r14,0x0),r7
- test_cc 1 0 1 1
- test_h_gr 0xdeadbeef,r7
-
- ; Test ld @$R15+,$Ri
- mvr_h_gr sp,r8 ; save original stack pointer
- mvr_h_gr r8,r9
- inci_h_gr 4,r9 ; original stack pointer + 4
- mvi_h_mem #0xdeadbeef,sp ; prime memory
-
- mvr_h_gr r8,sp ; restore original stack pointer
- set_cc 0x0f ; condition codes should not change
- ld @r15+,r7
- test_cc 1 1 1 1
- test_h_gr 0xdeadbeef,r7
- testr_h_gr sp,r9 ; should have been incremented
-
- mvr_h_gr r8,sp ; restore original stack pointer
- set_cc 0x0f ; condition codes should not change
- ld @r15+,sp
- test_cc 1 1 1 1
- test_h_gr 0xdeadbeef,sp ; should not have been incremented
-
- ; Test ld @$R15+,$Rs
- mvr_h_gr r8,sp ; restore original stack pointer
- set_cc 0x0f ; condition codes should not change
- ld @r15+,tbr
- test_cc 1 1 1 1
- test_h_dr 0xdeadbeef,tbr
- testr_h_gr sp,r9 ; should have been incremented
-
- mvr_h_gr r8,sp ; restore original stack pointer
- set_cc 0x0f ; condition codes should not change
- ld @r15+,rp
- test_cc 1 1 1 1
- test_h_dr 0xdeadbeef,rp
- testr_h_gr sp,r9 ; should have been incremented
-
- mvr_h_gr r8,sp ; restore original stack pointer
- set_cc 0x0f ; condition codes should not change
- ld @r15+,mdh
- test_cc 1 1 1 1
- test_h_dr 0xdeadbeef,mdh
- testr_h_gr sp,r9 ; should have been incremented
-
- mvr_h_gr r8,sp ; restore original stack pointer
- set_cc 0x0f ; condition codes should not change
- ld @r15+,mdl
- test_cc 1 1 1 1
- test_h_dr 0xdeadbeef,mdl
- testr_h_gr sp,r9 ; should have been incremented
-
- set_s_user
- mvr_h_gr r8,sp ; restore original stack pointer
- set_cc 0x0f ; condition codes should not change
- ld @r15+,ssp
- test_cc 1 1 1 1
- test_h_dr 0xdeadbeef,ssp
- testr_h_gr sp,r9 ; should have been incremented
-
- mvr_h_gr r8,sp ; restore original stack pointer
- set_cc 0x0f ; condition codes should not change
- ld @r15+,usp
- test_cc 1 1 1 1
- test_h_dr 0xdeadbeef,usp
- test_h_gr 0xdeadbeef,sp ; should not have been incremented
-
- set_s_system
- mvr_h_gr r8,sp ; restore original stack pointer
- set_cc 0x0f ; condition codes should not change
- ld @r15+,usp
- test_cc 1 1 1 1
- test_h_dr 0xdeadbeef,usp
- testr_h_gr sp,r9 ; should have been incremented
-
- mvr_h_gr r8,sp ; restore original stack pointer
- set_cc 0x0f ; condition codes should not change
- ld @r15+,ssp
- test_cc 1 1 1 1
- test_h_dr 0xdeadbeef,ssp
- test_h_gr 0xdeadbeef,sp ; should not have been incremented
-
- pass
diff --git a/sim/testsuite/sim/fr30/ldi20.cgs b/sim/testsuite/sim/fr30/ldi20.cgs
deleted file mode 100644
index c7a4ef4165f..00000000000
--- a/sim/testsuite/sim/fr30/ldi20.cgs
+++ /dev/null
@@ -1,37 +0,0 @@
-# fr30 testcase for ldi20 $i20,$Ri
-# mach(): fr30
-
- .include "testutils.inc"
-
- START
-
- .text
- .global ldi20
-ldi20:
- ; Test ldi20 $i20,$Ri
- set_cc 0x0f ; condition codes should not change
- ldi20 #0x00000000,r7
- test_cc 1 1 1 1
- test_h_gr 0,r7
-
- set_cc 0x07 ; condition codes should not change
- ldi:20 1,r7
- test_cc 0 1 1 1
- test_h_gr 1,r7
-
- set_cc 0x0b ; condition codes should not change
- ldi20 0x7ffff,r7
- test_cc 1 0 1 1
- test_h_gr 0x0007ffff,r7
-
- set_cc 0x0d ; condition codes should not change
- ldi:20 0x80000,r7
- test_cc 1 1 0 1
- test_h_gr 0x00080000,r7
-
- set_cc 0x0e ; condition codes should not change
- ldi20 0xfffff,r7
- test_cc 1 1 1 0
- test_h_gr 0x000fffff,r7
-
- pass
diff --git a/sim/testsuite/sim/fr30/ldi32.cgs b/sim/testsuite/sim/fr30/ldi32.cgs
deleted file mode 100644
index 3e56db741e3..00000000000
--- a/sim/testsuite/sim/fr30/ldi32.cgs
+++ /dev/null
@@ -1,37 +0,0 @@
-# fr30 testcase for ldi32 $i32,$Ri
-# mach(): fr30
-
- .include "testutils.inc"
-
- START
-
- .text
- .global ldi32
-ldi32:
- ; Test ldi32 $i32,$Ri
- set_cc 0x0f ; condition codes should not change
- ldi32 #0x00000000,r7
- test_cc 1 1 1 1
- test_h_gr 0,r7
-
- set_cc 0x07 ; condition codes should not change
- ldi:32 1,r7
- test_cc 0 1 1 1
- test_h_gr 1,r7
-
- set_cc 0x0b ; condition codes should not change
- ldi32 0x7fffffff,r7
- test_cc 1 0 1 1
- test_h_gr 0x7fffffff,r7
-
- set_cc 0x0d ; condition codes should not change
- ldi:32 0x80000000,r7
- test_cc 1 1 0 1
- test_h_gr 0x80000000,r7
-
- set_cc 0x0e ; condition codes should not change
- ldi32 0xffffffff,r7
- test_cc 1 1 1 0
- test_h_gr -1,r7
-
- pass
diff --git a/sim/testsuite/sim/fr30/ldi8.cgs b/sim/testsuite/sim/fr30/ldi8.cgs
deleted file mode 100644
index 9b15edead0c..00000000000
--- a/sim/testsuite/sim/fr30/ldi8.cgs
+++ /dev/null
@@ -1,37 +0,0 @@
-# fr30 testcase for ldi8 $i8,$Ri
-# mach(): fr30
-
- .include "testutils.inc"
-
- START
-
- .text
- .global ldi8
-ldi8:
- ; Test ldi8 $i8,$Ri
- set_cc 0x0f ; condition codes should not change
- ldi8 #0x00000000,r7
- test_cc 1 1 1 1
- test_h_gr 0,r7
-
- set_cc 0x07 ; condition codes should not change
- ldi:20 1,r7
- test_cc 0 1 1 1
- test_h_gr 1,r7
-
- set_cc 0x0b ; condition codes should not change
- ldi8 0x7f,r7
- test_cc 1 0 1 1
- test_h_gr 0x0000007f,r7
-
- set_cc 0x0d ; condition codes should not change
- ldi:20 0x80,r7
- test_cc 1 1 0 1
- test_h_gr 0x00000080,r7
-
- set_cc 0x0e ; condition codes should not change
- ldi8 0xff,r7
- test_cc 1 1 1 0
- test_h_gr 0x000000ff,r7
-
- pass
diff --git a/sim/testsuite/sim/fr30/ldm0.cgs b/sim/testsuite/sim/fr30/ldm0.cgs
deleted file mode 100644
index 9deb5642544..00000000000
--- a/sim/testsuite/sim/fr30/ldm0.cgs
+++ /dev/null
@@ -1,60 +0,0 @@
-# fr30 testcase for ldm0 ($reglist_low)
-# mach(): fr30
-
- .include "testutils.inc"
-
- START
-
- .text
- .global ldm0
-ldm0:
- ; Test ldm0 ($reglist_low)
- mvr_h_gr sp,r9 ; save stack pointer permanently
- inci_h_gr -4,sp
- mvi_h_mem 3,sp
- inci_h_gr -4,sp
- mvi_h_mem 2,sp
- inci_h_gr -4,sp
- mvi_h_mem 1,sp
- inci_h_gr -4,sp
- mvi_h_mem 0,sp
-
- set_cc 0x0f ; Condition codes should not change
- ldm0 (r0,r2,r4,r6)
- test_cc 1 1 1 1
- testr_h_gr sp,r9
- test_h_gr 0,r0
- test_h_gr 1,r2
- test_h_gr 2,r4
- test_h_gr 3,r6
-
- inci_h_gr -16,sp
- set_cc 0x0f ; Condition codes should not change
- ldm0 (r1,r3,r5,r7)
- test_cc 1 1 1 1
- testr_h_gr sp,r9
- test_h_gr 0,r1
- test_h_gr 1,r3
- test_h_gr 2,r5
- test_h_gr 3,r7
-
- inci_h_gr -16,sp
- set_cc 0x0f ; Condition codes should not change
- ldm0 (r1,r5,r7,r3) ; Order speficied should not matter
- test_cc 1 1 1 1
- testr_h_gr sp,r9
- test_h_gr 0,r1
- test_h_gr 1,r3
- test_h_gr 2,r5
- test_h_gr 3,r7
-
- set_cc 0x0f ; Condition codes should not change
- ldm0 () ; Nothing should happen
- test_cc 1 1 1 1
- testr_h_gr sp,r9
- test_h_gr 0,r1
- test_h_gr 1,r3
- test_h_gr 2,r5
- test_h_gr 3,r7
-
- pass
diff --git a/sim/testsuite/sim/fr30/ldm1.cgs b/sim/testsuite/sim/fr30/ldm1.cgs
deleted file mode 100644
index 33cfcdba770..00000000000
--- a/sim/testsuite/sim/fr30/ldm1.cgs
+++ /dev/null
@@ -1,59 +0,0 @@
-# fr30 testcase for ldm1 ($reglist_low)
-# mach(): fr30
-
- .include "testutils.inc"
-
- START
-
- .text
- .global ldm1
-ldm1:
- ; Test ldm1 ($reglist_low)
- mvr_h_gr sp,r1 ; save stack pointer permanently
- inci_h_gr -4,sp
- mvi_h_mem 3,sp
- inci_h_gr -4,sp
- mvi_h_mem 2,sp
- inci_h_gr -4,sp
- mvi_h_mem 1,sp
- inci_h_gr -4,sp
- mvi_h_mem 0,sp
-
- set_cc 0x0f ; Condition codes should not change
- ldm1 (r8,r10,r12,r14)
- test_cc 1 1 1 1
- testr_h_gr sp,r1
- test_h_gr 0,r8
- test_h_gr 1,r10
- test_h_gr 2,r12
- test_h_gr 3,r14
-
- inci_h_gr -16,sp
- set_cc 0x0f ; Condition codes should not change
- ldm1 (r9,r11,r13,r15)
- test_cc 1 1 1 1
- test_h_gr 0,r9
- test_h_gr 1,r11
- test_h_gr 2,r13
- test_h_gr 3,r15
-
- mvr_h_gr r1,sp ; restore stack pointer
- inci_h_gr -16,sp
- set_cc 0x0f ; Condition codes should not change
- ldm1 (r9,r13,r15,r11); Order speficied should not matter
- test_cc 1 1 1 1
- test_h_gr 0,r9
- test_h_gr 1,r11
- test_h_gr 2,r13
- test_h_gr 3,r15
-
- mvr_h_gr r1,sp ; restore stack pointer
- set_cc 0x0f ; Condition codes should not change
- ldm1 () ; Nothing should happen
- test_cc 1 1 1 1
- testr_h_gr sp,r1
- test_h_gr 0,r9
- test_h_gr 1,r11
- test_h_gr 2,r13
-
- pass
diff --git a/sim/testsuite/sim/fr30/ldres.cgs b/sim/testsuite/sim/fr30/ldres.cgs
deleted file mode 100644
index 008348992d2..00000000000
--- a/sim/testsuite/sim/fr30/ldres.cgs
+++ /dev/null
@@ -1,25 +0,0 @@
-# fr30 testcase for ldres $@Ri+,$u4
-# mach(): fr30
-
- .include "testutils.inc"
-
- START
-
- .text
- .global ldres
-ldres:
- ; Test ldres $@Ri+,$u4
- ; The current implementation simply increments Ri
- mvi_h_gr 0x1000,r7
- set_cc 0x0f ; Condition codes are irrelevent
- ldres @r7+,0
- test_cc 1 1 1 1
- test_h_gr 0x1004,r7
-
- mvi_h_gr 0x1000,r7
- set_cc 0x0f ; Condition codes are irrelevent
- ldres @r7+,0xf
- test_cc 1 1 1 1
- test_h_gr 0x1004,r7
-
- pass
diff --git a/sim/testsuite/sim/fr30/ldub.cgs b/sim/testsuite/sim/fr30/ldub.cgs
deleted file mode 100644
index 8d42cfa8595..00000000000
--- a/sim/testsuite/sim/fr30/ldub.cgs
+++ /dev/null
@@ -1,115 +0,0 @@
-# fr30 testcase for
-# mach(): fr30
-# ldub $Rj,$Ri
-# ldub @($R13,$Rj),$Ri
-# ldub @($R14,$disp8),$Ri
-
- .include "testutils.inc"
-
- START
-
- .text
- .global ldub
-ldub:
- ; Test ldub $Rj,$Ri
- mvi_h_mem #0x00adbeef,sp
- set_cc 0x0f ; condition codes should not change
- ldub @sp,r7
- test_cc 1 1 1 1
- test_h_gr 0,r7
-
- mvi_h_mem #0x01adbeef,sp
- set_cc 0x07 ; condition codes should not change
- ldub @sp,r7
- test_cc 0 1 1 1
- test_h_gr 1,r7
-
- mvi_h_mem #0x7fadbeef,sp
- set_cc 0x0b ; condition codes should not change
- ldub @sp,r7
- test_cc 1 0 1 1
- test_h_gr 0x7f,r7
-
- mvi_h_mem #0x80adbeef,sp
- set_cc 0x0d ; condition codes should not change
- ldub @sp,r7
- test_cc 1 1 0 1
- test_h_gr 0x80,r7
-
- mvi_h_mem #0xffadbeef,sp
- set_cc 0x0e ; condition codes should not change
- ldub @sp,r7
- test_cc 1 1 1 0
- test_h_gr 0xff,r7
-
- ; Test ldub @($R13,$Rj),$Ri
- mvr_h_gr sp,r13
- inci_h_gr -8,r13
- mvi_h_gr 8,r8
-
- mvi_h_mem #0x00adbeef,sp
- set_cc 0x0f ; condition codes should not change
- ldub @(r13,r8),r7
- test_cc 1 1 1 1
- test_h_gr 0,r7
-
- mvi_h_mem #0x01adbeef,sp
- set_cc 0x07 ; condition codes should not change
- ldub @(r13,r8),r7
- test_cc 0 1 1 1
- test_h_gr 1,r7
-
- mvi_h_mem #0x7fadbeef,sp
- set_cc 0x0b ; condition codes should not change
- ldub @(r13,r8),r7
- test_cc 1 0 1 1
- test_h_gr 0x7f,r7
-
- mvi_h_mem #0x80adbeef,sp
- set_cc 0x0d ; condition codes should not change
- ldub @(r13,r8),r7
- test_cc 1 1 0 1
- test_h_gr 0x80,r7
-
- mvi_h_mem #0xffadbeef,sp
- set_cc 0x0e ; condition codes should not change
- ldub @(r13,r8),r7
- test_cc 1 1 1 0
- test_h_gr 0xff,r7
-
- ; Test ldub @($R14,$disp8),$Ri
- mvi_h_mem #0xdeadbeef,sp
- mvr_h_gr sp,r14
- mvi_h_gr -0x7f,r8
- add_h_gr r8,r14
-
- set_cc 0x0f ; condition codes should not change
- ldub @(r14,0x7f),r7
- test_cc 1 1 1 1
- test_h_gr 0xde,r7
-
- inci_h_gr 0x3f,r14
- set_cc 0x07 ; condition codes should not change
- ldub @(r14,0x40),r7
- test_cc 0 1 1 1
- test_h_gr 0xde,r7
-
- inci_h_gr 0x40,r14
- set_cc 0x0b ; condition codes should not change
- ldub @(r14,0x0),r7
- test_cc 1 0 1 1
- test_h_gr 0xde,r7
-
- inci_h_gr 0x40,r14
- set_cc 0x0d ; condition codes should not change
- ldub @(r14,-0x40),r7
- test_cc 1 1 0 1
- test_h_gr 0xde,r7
-
- inci_h_gr 0x40,r14
- set_cc 0x0e ; condition codes should not change
- ldub @(r14,-0x80),r7
- test_cc 1 1 1 0
- test_h_gr 0xde,r7
-
- pass
diff --git a/sim/testsuite/sim/fr30/lduh.cgs b/sim/testsuite/sim/fr30/lduh.cgs
deleted file mode 100644
index 7d36b75cbcc..00000000000
--- a/sim/testsuite/sim/fr30/lduh.cgs
+++ /dev/null
@@ -1,115 +0,0 @@
-# fr30 testcase for
-# mach(): fr30
-# lduh $Rj,$Ri
-# lduh @($R13,$Rj),$Ri
-# lduh @($R14,$disp9),$Ri
-
- .include "testutils.inc"
-
- START
-
- .text
- .global lduh
-lduh:
- ; Test lduh $Rj,$Ri
- mvi_h_mem #0x0000beef,sp
- set_cc 0x0f ; condition codes should not change
- lduh @sp,r7
- test_cc 1 1 1 1
- test_h_gr 0,r7
-
- mvi_h_mem #0x0001beef,sp
- set_cc 0x07 ; condition codes should not change
- lduh @sp,r7
- test_cc 0 1 1 1
- test_h_gr 1,r7
-
- mvi_h_mem #0x7fffbeef,sp
- set_cc 0x0b ; condition codes should not change
- lduh @sp,r7
- test_cc 1 0 1 1
- test_h_gr 0x7fff,r7
-
- mvi_h_mem #0x8000beef,sp
- set_cc 0x0d ; condition codes should not change
- lduh @sp,r7
- test_cc 1 1 0 1
- test_h_gr 0x8000,r7
-
- mvi_h_mem #0xffffbeef,sp
- set_cc 0x0e ; condition codes should not change
- lduh @sp,r7
- test_cc 1 1 1 0
- test_h_gr 0xffff,r7
-
- ; Test lduh @($R13,$Rj),$Ri
- mvr_h_gr sp,r13
- inci_h_gr -8,r13
- mvi_h_gr 8,r8
-
- mvi_h_mem #0x0000beef,sp
- set_cc 0x0f ; condition codes should not change
- lduh @(r13,r8),r7
- test_cc 1 1 1 1
- test_h_gr 0,r7
-
- mvi_h_mem #0x0001beef,sp
- set_cc 0x07 ; condition codes should not change
- lduh @(r13,r8),r7
- test_cc 0 1 1 1
- test_h_gr 1,r7
-
- mvi_h_mem #0x7fffbeef,sp
- set_cc 0x0b ; condition codes should not change
- lduh @(r13,r8),r7
- test_cc 1 0 1 1
- test_h_gr 0x7fff,r7
-
- mvi_h_mem #0x8000beef,sp
- set_cc 0x0d ; condition codes should not change
- lduh @(r13,r8),r7
- test_cc 1 1 0 1
- test_h_gr 0x8000,r7
-
- mvi_h_mem #0xffffbeef,sp
- set_cc 0x0e ; condition codes should not change
- lduh @(r13,r8),r7
- test_cc 1 1 1 0
- test_h_gr 0xffff,r7
-
- ; Test lduh @($R14,$disp9),$Ri
- mvi_h_mem #0xdeadbeef,sp
- mvr_h_gr sp,r14
- mvi_h_gr -0xfe,r8
- add_h_gr r8,r14
-
- set_cc 0x0f ; condition codes should not change
- lduh @(r14,0xfe),r7
- test_cc 1 1 1 1
- test_h_gr 0xdead,r7
-
- inci_h_gr 0x7e,r14
- set_cc 0x07 ; condition codes should not change
- lduh @(r14,0x80),r7
- test_cc 0 1 1 1
- test_h_gr 0xdead,r7
-
- inci_h_gr 0x80,r14
- set_cc 0x0b ; condition codes should not change
- lduh @(r14,0x0),r7
- test_cc 1 0 1 1
- test_h_gr 0xdead,r7
-
- inci_h_gr 0x80,r14
- set_cc 0x0d ; condition codes should not change
- lduh @(r14,-0x80),r7
- test_cc 1 1 0 1
- test_h_gr 0xdead,r7
-
- inci_h_gr 0x80,r14
- set_cc 0x0e ; condition codes should not change
- lduh @(r14,-0x100),r7
- test_cc 1 1 1 0
- test_h_gr 0xdead,r7
-
- pass
diff --git a/sim/testsuite/sim/fr30/leave.cgs b/sim/testsuite/sim/fr30/leave.cgs
deleted file mode 100644
index 4d3dd70100e..00000000000
--- a/sim/testsuite/sim/fr30/leave.cgs
+++ /dev/null
@@ -1,23 +0,0 @@
-# fr30 testcase for leave
-# mach(): fr30
-
- .include "testutils.inc"
-
- START
-
- .text
- .global leave
-leave:
- ; Test leave $u10
- mvr_h_gr sp,r7 ; save Stack pointer
- mvr_h_gr sp,r14
- inci_h_gr -4,r14
- mvi_h_mem 0xdeadbeef,r14
- mvi_h_gr 0xbeefdead,r15
- set_cc 0x0f ; Condition codes are irrelevent
- leave
- test_cc 1 1 1 1
- testr_h_gr sp,r7
- test_h_gr 0xdeadbeef,r14
-
- pass
diff --git a/sim/testsuite/sim/fr30/lsl.cgs b/sim/testsuite/sim/fr30/lsl.cgs
deleted file mode 100644
index ead749fbbb5..00000000000
--- a/sim/testsuite/sim/fr30/lsl.cgs
+++ /dev/null
@@ -1,65 +0,0 @@
-# fr30 testcase for lsl $Rj,$Ri, lsl $u4,$Rj
-# mach(): fr30
-
- .include "testutils.inc"
-
- START
-
- .text
- .global lsl
-lsl:
- ; Test lsl $Rj,$Ri
- mvi_h_gr 0xdeadbee0,r7 ; Shift by 0
- mvi_h_gr 2,r8
- set_cc 0x0d ; Set mask opposite of expected
- lsl r7,r8
- test_cc 0 0 0 0
- test_h_gr 2,r8
-
- mvi_h_gr 0xdeadbee1,r7 ; Shift by 1
- mvi_h_gr 2,r8
- set_cc 0x0f ; Set mask opposite of expected
- lsl r7,r8
- test_cc 0 0 1 0
- test_h_gr 4,r8
-
- mvi_h_gr 0xdeadbeff,r7 ; Shift by 31
- mvi_h_gr 1,r8
- set_cc 0x07 ; Set mask opposite of expected
- lsl r7,r8
- test_cc 1 0 1 0
- test_h_gr 0x80000000,r8
-
- mvi_h_gr 0xdeadbeff,r7 ; clear register
- mvi_h_gr 2,r8
- set_cc 0x0a ; Set mask opposite of expected
- lsl r7,r8
- test_cc 0 1 1 1
- test_h_gr 0x00000000,r8
-
- ; Test lsl $u4Ri
- mvi_h_gr 2,r8
- set_cc 0x0d ; Set mask opposite of expected
- lsl 0,r8
- test_cc 0 0 0 0
- test_h_gr 2,r8
-
- mvi_h_gr 2,r8
- set_cc 0x0f ; Set mask opposite of expected
- lsl 1,r8
- test_cc 0 0 1 0
- test_h_gr 4,r8
-
- mvi_h_gr 1,r8
- set_cc 0x0e ; Set mask opposite of expected
- lsl 15,r8
- test_cc 0 0 1 0
- test_h_gr 0x00008000,r8
-
- mvi_h_gr 0x00020000,r8
- set_cc 0x0a ; Set mask opposite of expected
- lsl 15,r8
- test_cc 0 1 1 1
- test_h_gr 0x00000000,r8
-
- pass
diff --git a/sim/testsuite/sim/fr30/lsl2.cgs b/sim/testsuite/sim/fr30/lsl2.cgs
deleted file mode 100644
index 58acf84ef2c..00000000000
--- a/sim/testsuite/sim/fr30/lsl2.cgs
+++ /dev/null
@@ -1,36 +0,0 @@
-# fr30 testcase for lsl2 $Rj,$Ri, lsl2 $u4,$Rj
-# mach(): fr30
-
- .include "testutils.inc"
-
- START
-
- .text
- .global lsl2
-lsl2:
- ; Test lsl2 $u4Ri
- mvi_h_gr 2,r8
- set_cc 0x0d ; Set mask opposite of expected
- lsl2 0,r8
- test_cc 0 0 0 0
- test_h_gr 0x20000,r8
-
- mvi_h_gr 2,r8
- set_cc 0x0f ; Set mask opposite of expected
- lsl2 1,r8
- test_cc 0 0 1 0
- test_h_gr 0x40000,r8
-
- mvi_h_gr 1,r8
- set_cc 0x07 ; Set mask opposite of expected
- lsl2 15,r8
- test_cc 1 0 1 0
- test_h_gr 0x80000000,r8
-
- mvi_h_gr 2,r8
- set_cc 0x0a ; Set mask opposite of expected
- lsl2 15,r8
- test_cc 0 1 1 1
- test_h_gr 0x00000000,r8
-
- pass
diff --git a/sim/testsuite/sim/fr30/lsr.cgs b/sim/testsuite/sim/fr30/lsr.cgs
deleted file mode 100644
index 5b9587fe71f..00000000000
--- a/sim/testsuite/sim/fr30/lsr.cgs
+++ /dev/null
@@ -1,65 +0,0 @@
-# fr30 testcase for lsr $Rj,$Ri, lsr $u4,$Rj
-# mach(): fr30
-
- .include "testutils.inc"
-
- START
-
- .text
- .global lsr
-lsr:
- ; Test lsr $Rj,$Ri
- mvi_h_gr 0xdeadbee0,r7 ; Shift by 0
- mvi_h_gr 0x80000000,r8
- set_cc 0x05 ; Set mask opposite of expected
- lsr r7,r8
- test_cc 1 0 0 0
- test_h_gr 0x80000000,r8
-
- mvi_h_gr 0xdeadbee1,r7 ; Shift by 1
- mvi_h_gr 0x80000000,r8
- set_cc 0x0f ; Set mask opposite of expected
- lsr r7,r8
- test_cc 0 0 1 0
- test_h_gr 0x40000000,r8
-
- mvi_h_gr 0xdeadbeff,r7 ; Shift by 31
- mvi_h_gr 0x80000000,r8
- set_cc 0x0f ; Set mask opposite of expected
- lsr r7,r8
- test_cc 0 0 1 0
- test_h_gr 1,r8
-
- mvi_h_gr 0xdeadbeff,r7 ; clear register
- mvi_h_gr 0x40000000,r8
- set_cc 0x0a ; Set mask opposite of expected
- lsr r7,r8
- test_cc 0 1 1 1
- test_h_gr 0x00000000,r8
-
- ; Test lsr $u4Ri
- mvi_h_gr 0x80000000,r8
- set_cc 0x05 ; Set mask opposite of expected
- lsr 0,r8
- test_cc 1 0 0 0
- test_h_gr 0x80000000,r8
-
- mvi_h_gr 0x80000000,r8
- set_cc 0x0f ; Set mask opposite of expected
- lsr 1,r8
- test_cc 0 0 1 0
- test_h_gr 0x40000000,r8
-
- mvi_h_gr 0x80000000,r8
- set_cc 0x0e ; Set mask opposite of expected
- lsr 15,r8
- test_cc 0 0 1 0
- test_h_gr 0x00010000,r8
-
- mvi_h_gr 0x00004000,r8
- set_cc 0x0a ; Set mask opposite of expected
- lsr 15,r8
- test_cc 0 1 1 1
- test_h_gr 0x00000000,r8
-
- pass
diff --git a/sim/testsuite/sim/fr30/lsr2.cgs b/sim/testsuite/sim/fr30/lsr2.cgs
deleted file mode 100644
index fd6ceaa9ff7..00000000000
--- a/sim/testsuite/sim/fr30/lsr2.cgs
+++ /dev/null
@@ -1,36 +0,0 @@
-# fr30 testcase for lsr2 $u4,$Rj
-# mach(): fr30
-
- .include "testutils.inc"
-
- START
-
- .text
- .global lsr2
-lsr2:
- ; Test lsr2 $u4Ri
- mvi_h_gr 0x80000000,r8
- set_cc 0x0d ; Set mask opposite of expected
- lsr2 0,r8
- test_cc 0 0 0 0
- test_h_gr 0x00008000,r8
-
- mvi_h_gr 0x80000000,r8
- set_cc 0x0f ; Set mask opposite of expected
- lsr2 1,r8
- test_cc 0 0 1 0
- test_h_gr 0x00004000,r8
-
- mvi_h_gr 0x80000000,r8
- set_cc 0x0e ; Set mask opposite of expected
- lsr2 15,r8
- test_cc 0 0 1 0
- test_h_gr 1,r8
-
- mvi_h_gr 0x40000000,r8
- set_cc 0x0a ; Set mask opposite of expected
- lsr2 15,r8
- test_cc 0 1 1 1
- test_h_gr 0x00000000,r8
-
- pass
diff --git a/sim/testsuite/sim/fr30/misc.exp b/sim/testsuite/sim/fr30/misc.exp
deleted file mode 100644
index da1490dd9e4..00000000000
--- a/sim/testsuite/sim/fr30/misc.exp
+++ /dev/null
@@ -1,20 +0,0 @@
-# Miscellaneous FR30 simulator testcases
-
-if [istarget fr30*-*-*] {
- # load support procs
- # load_lib cgen.exp
-
- # all machines
- set all_machs "fr30"
-
- # The .ms suffix is for "miscellaneous .s".
- foreach src [lsort [glob -nocomplain $srcdir/$subdir/*.ms]] {
- # If we're only testing specific files and this isn't one of them,
- # skip it.
- if ![runtest_file_p $runtests $src] {
- continue
- }
-
- run_sim_test $src $all_machs
- }
-}
diff --git a/sim/testsuite/sim/fr30/mov.cgs b/sim/testsuite/sim/fr30/mov.cgs
deleted file mode 100644
index bf99252f061..00000000000
--- a/sim/testsuite/sim/fr30/mov.cgs
+++ /dev/null
@@ -1,108 +0,0 @@
-# fr30 testcase for mov $Rj,$Ri
-# mach(): fr30
-
- .include "testutils.inc"
-
- START
-
- .text
- .global mov
-mov:
- ; Test mov $Rj,$Ri
- mvi_h_gr 1,r7
- mvi_h_dr 0xa,tbr
- mvi_h_dr 0xb,rp
- mvi_h_dr 0xc,mdh
- mvi_h_dr 0xd,mdl
- mvr_h_gr sp,ssp
- mvr_h_gr sp,usp
-
- mov r7,r7
- set_cc 0x0f ; Condition codes should not change
- test_cc 1 1 1 1
- test_h_gr 1,r7
-
- mov r7,r8
- set_cc 0x0e ; Condition codes should not change
- test_cc 1 1 1 0
- test_h_gr 1,r7
- test_h_gr 1,r8
-
- ; Test mov $Rs,$Ri
- set_cc 0x0d ; Condition codes should not change
- mov tbr,r7
- test_cc 1 1 0 1
- test_h_gr 0xa,r7
-
- set_cc 0x0c ; Condition codes should not change
- mov rp,r7
- test_cc 1 1 0 0
- test_h_gr 0xb,r7
-
- set_cc 0x0b ; Condition codes should not change
- mov mdh,r7
- test_cc 1 0 1 1
- test_h_gr 0xc,r7
-
- set_cc 0x0a ; Condition codes should not change
- mov mdl,r7
- test_cc 1 0 1 0
- test_h_gr 0xd,r7
-
- set_cc 0x09 ; Condition codes should not change
- mov usp,r7
- test_cc 1 0 0 1
- testr_h_gr sp,r7
-
- set_cc 0x08 ; Condition codes should not change
- mov ssp,r7
- test_cc 1 0 0 0
- testr_h_gr sp,r7
-
- ; Test mov $Ri,$Rs
- set_cc 0x07 ; Condition codes should not change
- mov r8,tbr
- test_cc 0 1 1 1
- test_h_dr 0x1,tbr
-
- set_cc 0x06 ; Condition codes should not change
- mov r8,rp
- test_cc 0 1 1 0
- test_h_dr 0x1,rp
-
- set_cc 0x05 ; Condition codes should not change
- mov r8,mdh
- test_cc 0 1 0 1
- test_h_dr 0x1,mdh
-
- set_cc 0x04 ; Condition codes should not change
- mov r8,mdl
- test_cc 0 1 0 0
- test_h_dr 0x1,mdl
-
- set_cc 0x03 ; Condition codes should not change
- mov r8,ssp
- test_cc 0 0 1 1
- test_h_dr 0x1,ssp
-
- set_cc 0x02 ; Condition codes should not change
- mov r8,usp
- test_cc 0 0 1 0
- test_h_dr 0x1,usp
-
- ; Test mov $PS,$Ri
- set_cc 0x01 ; Condition codes affect result
- set_dbits 0x3
- mov ps,r7
- test_cc 0 0 0 1
- test_h_gr 0x00000601,r7
-
- ; Test mov $Ri,PS
- set_cc 0x01 ; Set opposite of expected
- set_dbits 0x1 ; Set opposite of expected
- mvi_h_gr 0x0000040e,r7
- mov r7,PS
- test_cc 1 1 1 0
- test_dbits 0x2
-
- pass
diff --git a/sim/testsuite/sim/fr30/mul.cgs b/sim/testsuite/sim/fr30/mul.cgs
deleted file mode 100644
index f7cbf58e50e..00000000000
--- a/sim/testsuite/sim/fr30/mul.cgs
+++ /dev/null
@@ -1,240 +0,0 @@
-# fr30 testcase for mul $Rj,$Ri
-# mach(): fr30
-
- .include "testutils.inc"
-
- START
-
- .text
- .global mul
-mul:
- ; Test mul $Rj,$Ri
- ; Positive operands
- mvi_h_gr 3,r7 ; multiply small numbers
- mvi_h_gr 2,r8
- set_cc 0x0f ; Set mask opposite of expected
- mul r7,r8
- test_cc 0 0 0 1
- test_h_dr 0,mdh
- test_h_dr 6,mdl
-
- mvi_h_gr 1,r7 ; multiply by 1
- mvi_h_gr 2,r8
- set_cc 0x0e ; Set mask opposite of expected
- mul r7,r8
- test_cc 0 0 0 0
- test_h_dr 0,mdh
- test_h_dr 2,mdl
-
- mvi_h_gr 2,r7 ; multiply by 1
- mvi_h_gr 1,r8
- set_cc 0x0f ; Set mask opposite of expected
- mul r7,r8
- test_cc 0 0 0 1
- test_h_dr 0,mdh
- test_h_dr 2,mdl
-
- mvi_h_gr 0,r7 ; multiply by 0
- mvi_h_gr 2,r8
- set_cc 0x0b ; Set mask opposite of expected
- mul r7,r8
- test_cc 0 1 0 1
- test_h_dr 0,mdh
- test_h_dr 0,mdl
-
- mvi_h_gr 2,r7 ; multiply by 0
- mvi_h_gr 0,r8
- set_cc 0x0a ; Set mask opposite of expected
- mul r7,r8
- test_cc 0 1 0 0
- test_h_dr 0,mdh
- test_h_dr 0,mdl
-
- mvi_h_gr 0x3fffffff,r7 ; 31 bit result
- mvi_h_gr 2,r8
- set_cc 0x0f ; Set mask opposite of expected
- mul r7,r8
- test_cc 0 0 0 1
- test_h_dr 0,mdh
- test_h_dr 0x7ffffffe,mdl
-
- mvi_h_gr 0x40000000,r7 ; 32 bit result
- mvi_h_gr 2,r8
- set_cc 0x04 ; Set mask opposite of expected
- mul r7,r8
- test_cc 1 0 1 0
- test_h_dr 0,mdh
- test_h_dr 0x80000000,mdl
-
- mvi_h_gr 0x40000000,r7 ; 33 bit result
- mvi_h_gr 4,r8
- set_cc 0x0d ; Set mask opposite of expected
- mul r7,r8
- test_cc 0 0 1 1
- test_h_dr 1,mdh
- test_h_dr 0x00000000,mdl
-
- mvi_h_gr 0x7fffffff,r7 ; max positive result
- mvi_h_gr 0x7fffffff,r8
- set_cc 0x0d ; Set mask opposite of expected
- mul r7,r8
- test_cc 0 0 1 1
- test_h_dr 0x3fffffff,mdh
- test_h_dr 0x00000001,mdl
-
- ; Mixed operands
- mvi_h_gr -3,r7 ; multiply small numbers
- mvi_h_gr 2,r8
- set_cc 0x07 ; Set mask opposite of expected
- mul r7,r8
- test_cc 1 0 0 1
- test_h_dr -1,mdh
- test_h_dr -6,mdl
-
- mvi_h_gr 3,r7 ; multiply small numbers
- mvi_h_gr -2,r8
- set_cc 0x07 ; Set mask opposite of expected
- mul r7,r8
- test_cc 1 0 0 1
- test_h_dr -1,mdh
- test_h_dr -6,mdl
-
- mvi_h_gr 1,r7 ; multiply by 1
- mvi_h_gr -2,r8
- set_cc 0x06 ; Set mask opposite of expected
- mul r7,r8
- test_cc 1 0 0 0
- test_h_dr -1,mdh
- test_h_dr -2,mdl
-
- mvi_h_gr -2,r7 ; multiply by 1
- mvi_h_gr 1,r8
- set_cc 0x07 ; Set mask opposite of expected
- mul r7,r8
- test_cc 1 0 0 1
- test_h_dr -1,mdh
- test_h_dr -2,mdl
-
- mvi_h_gr 0,r7 ; multiply by 0
- mvi_h_gr -2,r8
- set_cc 0x0b ; Set mask opposite of expected
- mul r7,r8
- test_cc 0 1 0 1
- test_h_dr 0,mdh
- test_h_dr 0,mdl
-
- mvi_h_gr -2,r7 ; multiply by 0
- mvi_h_gr 0,r8
- set_cc 0x0a ; Set mask opposite of expected
- mul r7,r8
- test_cc 0 1 0 0
- test_h_dr 0,mdh
- test_h_dr 0,mdl
-
- mvi_h_gr 0x20000001,r7 ; 31 bit result
- mvi_h_gr -2,r8
- set_cc 0x07 ; Set mask opposite of expected
- mul r7,r8
- test_cc 1 0 0 1
- test_h_dr 0xffffffff,mdh
- test_h_dr 0xbffffffe,mdl
-
- mvi_h_gr 0x40000000,r7 ; 32 bit result
- mvi_h_gr -2,r8
- set_cc 0x06 ; Set mask opposite of expected
- mul r7,r8
- test_cc 1 0 0 0
- test_h_dr 0xffffffff,mdh
- test_h_dr 0x80000000,mdl
-
- mvi_h_gr 0x40000001,r7 ; 32 bit result
- mvi_h_gr -2,r8
- set_cc 0x0c ; Set mask opposite of expected
- mul r7,r8
- test_cc 0 0 1 0
- test_h_dr 0xffffffff,mdh
- test_h_dr 0x7ffffffe,mdl
-
- mvi_h_gr 0x40000000,r7 ; 33 bit result
- mvi_h_gr -4,r8
- set_cc 0x0d ; Set mask opposite of expected
- mul r7,r8
- test_cc 0 0 1 1
- test_h_dr 0xffffffff,mdh
- test_h_dr 0x00000000,mdl
-
- mvi_h_gr 0x7fffffff,r7 ; max negative result
- mvi_h_gr 0x80000000,r8
- set_cc 0x05 ; Set mask opposite of expected
- mul r7,r8
- test_cc 1 0 1 1
- test_h_dr 0xc0000000,mdh
- test_h_dr 0x80000000,mdl
-
- ; Negative operands
- mvi_h_gr -3,r7 ; multiply small numbers
- mvi_h_gr -2,r8
- set_cc 0x0f ; Set mask opposite of expected
- mul r7,r8
- test_cc 0 0 0 1
- test_h_dr 0,mdh
- test_h_dr 6,mdl
-
- mvi_h_gr -1,r7 ; multiply by 1
- mvi_h_gr -2,r8
- set_cc 0x0e ; Set mask opposite of expected
- mul r7,r8
- test_cc 0 0 0 0
- test_h_dr 0,mdh
- test_h_dr 2,mdl
-
- mvi_h_gr -2,r7 ; multiply by 1
- mvi_h_gr -1,r8
- set_cc 0x0f ; Set mask opposite of expected
- mul r7,r8
- test_cc 0 0 0 1
- test_h_dr 0,mdh
- test_h_dr 2,mdl
-
- mvi_h_gr 0xc0000001,r7 ; 31 bit result
- mvi_h_gr -2,r8
- set_cc 0x0f ; Set mask opposite of expected
- mul r7,r8
- test_cc 0 0 0 1
- test_h_dr 0,mdh
- test_h_dr 0x7ffffffe,mdl
-
- mvi_h_gr 0xc0000000,r7 ; 32 bit result
- mvi_h_gr -2,r8
- set_cc 0x04 ; Set mask opposite of expected
- mul r7,r8
- test_cc 1 0 1 0
- test_h_dr 0,mdh
- test_h_dr 0x80000000,mdl
-
- mvi_h_gr 0xc0000000,r7 ; 33 bit result
- mvi_h_gr -4,r8
- set_cc 0x0d ; Set mask opposite of expected
- mul r7,r8
- test_cc 0 0 1 1
- test_h_dr 1,mdh
- test_h_dr 0x00000000,mdl
-
- mvi_h_gr 0x80000001,r7 ; almost max positive result
- mvi_h_gr 0x80000001,r8
- set_cc 0x0d ; Set mask opposite of expected
- mul r7,r8
- test_cc 0 0 1 1
- test_h_dr 0x3fffffff,mdh
- test_h_dr 0x00000001,mdl
-
-
- mvi_h_gr 0x80000000,r7 ; max positive result
- mvi_h_gr 0x80000000,r8
- set_cc 0x0d ; Set mask opposite of expected
- mul r7,r8
- test_cc 0 0 1 1
- test_h_dr 0x40000000,mdh
- test_h_dr 0x00000000,mdl
-
- pass
diff --git a/sim/testsuite/sim/fr30/mulh.cgs b/sim/testsuite/sim/fr30/mulh.cgs
deleted file mode 100644
index 1421f07b31a..00000000000
--- a/sim/testsuite/sim/fr30/mulh.cgs
+++ /dev/null
@@ -1,211 +0,0 @@
-# fr30 testcase for mulh $Rj,$Ri
-# mach(): fr30
-
- .include "testutils.inc"
-
- START
-
- .text
- .global mulh
-mulh:
- ; Test mulh $Rj,$Ri
- ; Positive operands
- mvi_h_gr 0xdead0003,r7 ; multiply small numbers
- mvi_h_gr 0xbeef0002,r8
- set_cc 0x09 ; Set mask opposite of expected
- mulh r7,r8
- test_cc 0 1 0 1
- test_h_dr 6,mdl
-
- mvi_h_gr 0xdead0001,r7 ; multiply by 1
- mvi_h_gr 0xbeef0002,r8
- set_cc 0x08 ; Set mask opposite of expected
- mulh r7,r8
- test_cc 0 1 0 0
- test_h_dr 2,mdl
-
- mvi_h_gr 0xdead0002,r7 ; multiply by 1
- mvi_h_gr 0xbeef0001,r8
- set_cc 0x09 ; Set mask opposite of expected
- mulh r7,r8
- test_cc 0 1 0 1
- test_h_dr 2,mdl
-
- mvi_h_gr 0xdead0000,r7 ; multiply by 0
- mvi_h_gr 0xbeef0002,r8
- set_cc 0x09 ; Set mask opposite of expected
- mulh r7,r8
- test_cc 0 1 0 1
- test_h_dr 0,mdl
-
- mvi_h_gr 0xdead0002,r7 ; multiply by 0
- mvi_h_gr 0xbeef0000,r8
- set_cc 0x08 ; Set mask opposite of expected
- mulh r7,r8
- test_cc 0 1 0 0
- test_h_dr 0,mdl
-
- mvi_h_gr 0xdead3fff,r7 ; 15 bit result
- mvi_h_gr 0xbeef0002,r8
- set_cc 0x09 ; Set mask opposite of expected
- mulh r7,r8
- test_cc 0 1 0 1
- test_h_dr 0x00007ffe,mdl
-
- mvi_h_gr 0xdead4000,r7 ; 16 bit result
- mvi_h_gr 0xbeef0002,r8
- set_cc 0x0a ; Set mask opposite of expected
- mulh r7,r8
- test_cc 0 1 1 0
- test_h_dr 0x00008000,mdl
-
- mvi_h_gr 0xdead4000,r7 ; 17 bit result
- mvi_h_gr 0xbeef0004,r8
- set_cc 0x0b ; Set mask opposite of expected
- mulh r7,r8
- test_cc 0 1 1 1
- test_h_dr 0x00010000,mdl
-
- mvi_h_gr 0xdead7fff,r7 ; max positive result
- mvi_h_gr 0xbeef7fff,r8
- set_cc 0x0b ; Set mask opposite of expected
- mulh r7,r8
- test_cc 0 1 1 1
- test_h_dr 0x3fff0001,mdl
-
- ; Mixed operands
- mvi_h_gr -3,r7 ; multiply small numbers
- mvi_h_gr 2,r8
- set_cc 0x05 ; Set mask opposite of expected
- mulh r7,r8
- test_cc 1 0 0 1
- test_h_dr -6,mdl
-
- mvi_h_gr 3,r7 ; multiply small numbers
- mvi_h_gr -2,r8
- set_cc 0x05 ; Set mask opposite of expected
- mulh r7,r8
- test_cc 1 0 0 1
- test_h_dr -6,mdl
-
- mvi_h_gr 1,r7 ; multiply by 1
- mvi_h_gr -2,r8
- set_cc 0x04 ; Set mask opposite of expected
- mulh r7,r8
- test_cc 1 0 0 0
- test_h_dr -2,mdl
-
- mvi_h_gr -2,r7 ; multiply by 1
- mvi_h_gr 1,r8
- set_cc 0x05 ; Set mask opposite of expected
- mulh r7,r8
- test_cc 1 0 0 1
- test_h_dr -2,mdl
-
- mvi_h_gr 0,r7 ; multiply by 0
- mvi_h_gr -2,r8
- set_cc 0x09 ; Set mask opposite of expected
- mulh r7,r8
- test_cc 0 1 0 1
- test_h_dr 0,mdl
-
- mvi_h_gr -2,r7 ; multiply by 0
- mvi_h_gr 0,r8
- set_cc 0x08 ; Set mask opposite of expected
- mulh r7,r8
- test_cc 0 1 0 0
- test_h_dr 0,mdl
-
- mvi_h_gr 0xdead2001,r7 ; 15 bit result
- mvi_h_gr -2,r8
- set_cc 0x05 ; Set mask opposite of expected
- mulh r7,r8
- test_cc 1 0 0 1
- test_h_dr 0xffffbffe,mdl
-
- mvi_h_gr 0xdead4000,r7 ; 16 bit result
- mvi_h_gr -2,r8
- set_cc 0x04 ; Set mask opposite of expected
- mulh r7,r8
- test_cc 1 0 0 0
- test_h_dr 0xffff8000,mdl
-
- mvi_h_gr 0xdead4001,r7 ; 16 bit result
- mvi_h_gr -2,r8
- set_cc 0x06 ; Set mask opposite of expected
- mulh r7,r8
- test_cc 1 0 1 0
- test_h_dr 0xffff7ffe,mdl
-
- mvi_h_gr 0xdead4000,r7 ; 17 bit result
- mvi_h_gr -4,r8
- set_cc 0x07 ; Set mask opposite of expected
- mulh r7,r8
- test_cc 1 0 1 1
- test_h_dr 0xffff0000,mdl
-
- mvi_h_gr 0xdead7fff,r7 ; max negative result
- mvi_h_gr 0xbeef8000,r8
- set_cc 0x07 ; Set mask opposite of expected
- mulh r7,r8
- test_cc 1 0 1 1
- test_h_dr 0xc0008000,mdl
-
- ; Negative operands
- mvi_h_gr -3,r7 ; multiply small numbers
- mvi_h_gr -2,r8
- set_cc 0x09 ; Set mask opposite of expected
- mulh r7,r8
- test_cc 0 1 0 1
- test_h_dr 6,mdl
-
- mvi_h_gr -1,r7 ; multiply by 1
- mvi_h_gr -2,r8
- set_cc 0x08 ; Set mask opposite of expected
- mulh r7,r8
- test_cc 0 1 0 0
- test_h_dr 2,mdl
-
- mvi_h_gr -2,r7 ; multiply by 1
- mvi_h_gr -1,r8
- set_cc 0x09 ; Set mask opposite of expected
- mulh r7,r8
- test_cc 0 1 0 1
- test_h_dr 2,mdl
-
- mvi_h_gr 0xdeadc001,r7 ; 15 bit result
- mvi_h_gr -2,r8
- set_cc 0x09 ; Set mask opposite of expected
- mulh r7,r8
- test_cc 0 1 0 1
- test_h_dr 0x00007ffe,mdl
-
- mvi_h_gr 0xdeadc000,r7 ; 16 bit result
- mvi_h_gr -2,r8
- set_cc 0x0a ; Set mask opposite of expected
- mulh r7,r8
- test_cc 0 1 1 0
- test_h_dr 0x00008000,mdl
-
- mvi_h_gr 0xdeadc000,r7 ; 17 bit result
- mvi_h_gr -4,r8
- set_cc 0x0b ; Set mask opposite of expected
- mulh r7,r8
- test_cc 0 1 1 1
- test_h_dr 0x00010000,mdl
-
- mvi_h_gr 0xdead8001,r7 ; almost max positive result
- mvi_h_gr 0xbeef8001,r8
- set_cc 0x0b ; Set mask opposite of expected
- mulh r7,r8
- test_cc 0 1 1 1
- test_h_dr 0x3fff0001,mdl
-
- mvi_h_gr 0xdead8000,r7 ; max positive result
- mvi_h_gr 0xbeef8000,r8
- set_cc 0x0b ; Set mask opposite of expected
- mulh r7,r8
- test_cc 0 1 1 1
- test_h_dr 0x40000000,mdl
-
- pass
diff --git a/sim/testsuite/sim/fr30/mulu.cgs b/sim/testsuite/sim/fr30/mulu.cgs
deleted file mode 100644
index 477583b224d..00000000000
--- a/sim/testsuite/sim/fr30/mulu.cgs
+++ /dev/null
@@ -1,101 +0,0 @@
-# fr30 testcase for mulu $Rj,$Ri
-# mach(): fr30
-
- .include "testutils.inc"
-
- START
-
- .text
- .global mulu
-mulu:
- ; Test mulu $Rj,$Ri
- ; Positive operands
- mvi_h_gr 3,r7 ; multiply small numbers
- mvi_h_gr 2,r8
- set_cc 0x0f ; Set mask opposite of expected
- mulu r7,r8
- test_cc 0 0 0 1
- test_h_dr 0,mdh
- test_h_dr 6,mdl
-
- mvi_h_gr 1,r7 ; multiply by 1
- mvi_h_gr 2,r8
- set_cc 0x0e ; Set mask opposite of expected
- mulu r7,r8
- test_cc 0 0 0 0
- test_h_dr 0,mdh
- test_h_dr 2,mdl
-
- mvi_h_gr 2,r7 ; multiply by 1
- mvi_h_gr 1,r8
- set_cc 0x0f ; Set mask opposite of expected
- mulu r7,r8
- test_cc 0 0 0 1
- test_h_dr 0,mdh
- test_h_dr 2,mdl
-
- mvi_h_gr 0,r7 ; multiply by 0
- mvi_h_gr 2,r8
- set_cc 0x0b ; Set mask opposite of expected
- mulu r7,r8
- test_cc 0 1 0 1
- test_h_dr 0,mdh
- test_h_dr 0,mdl
-
- mvi_h_gr 2,r7 ; multiply by 0
- mvi_h_gr 0,r8
- set_cc 0x0a ; Set mask opposite of expected
- mulu r7,r8
- test_cc 0 1 0 0
- test_h_dr 0,mdh
- test_h_dr 0,mdl
-
- mvi_h_gr 0x3fffffff,r7 ; 31 bit result
- mvi_h_gr 2,r8
- set_cc 0x0f ; Set mask opposite of expected
- mulu r7,r8
- test_cc 0 0 0 1
- test_h_dr 0,mdh
- test_h_dr 0x7ffffffe,mdl
-
- mvi_h_gr 0x40000000,r7 ; 32 bit result
- mvi_h_gr 2,r8
- set_cc 0x0e ; Set mask opposite of expected
- mulu r7,r8
- test_cc 0 0 0 0
- test_h_dr 0,mdh
- test_h_dr 0x80000000,mdl
-
- mvi_h_gr 0x80000000,r7 ; 33 bit result
- mvi_h_gr 2,r8
- set_cc 0x09 ; Set mask opposite of expected
- mulu r7,r8
- test_cc 0 1 1 1
- test_h_dr 1,mdh
- test_h_dr 0x00000000,mdl
-
- mvi_h_gr 0x7fffffff,r7 ; max positive result
- mvi_h_gr 0x7fffffff,r8
- set_cc 0x0d ; Set mask opposite of expected
- mulu r7,r8
- test_cc 0 0 1 1
- test_h_dr 0x3fffffff,mdh
- test_h_dr 0x00000001,mdl
-
- mvi_h_gr 0x80000000,r7 ; max positive result
- mvi_h_gr 0x80000000,r8
- set_cc 0x09 ; Set mask opposite of expected
- mulu r7,r8
- test_cc 0 1 1 1
- test_h_dr 0x40000000,mdh
- test_h_dr 0x00000000,mdl
-
- mvi_h_gr 0xffffffff,r7 ; max positive result
- mvi_h_gr 0xffffffff,r8
- set_cc 0x05 ; Set mask opposite of expected
- mulu r7,r8
- test_cc 1 0 1 1
- test_h_dr 0xfffffffe,mdh
- test_h_dr 0x00000001,mdl
-
- pass
diff --git a/sim/testsuite/sim/fr30/muluh.cgs b/sim/testsuite/sim/fr30/muluh.cgs
deleted file mode 100644
index b0c847e1b97..00000000000
--- a/sim/testsuite/sim/fr30/muluh.cgs
+++ /dev/null
@@ -1,90 +0,0 @@
-# fr30 testcase for muluh $Rj,$Ri
-# mach(): fr30
-
- .include "testutils.inc"
-
- START
-
- .text
- .global muluh
-muluh:
- ; Test muluh $Rj,$Ri
- ; Positive operands
- mvi_h_gr 0xdead0003,r7 ; multiply small numbers
- mvi_h_gr 0xbeef0002,r8
- set_cc 0x09 ; Set mask opposite of expected
- muluh r7,r8
- test_cc 0 1 0 1
- test_h_dr 6,mdl
-
- mvi_h_gr 0xdead0001,r7 ; multiply by 1
- mvi_h_gr 0xbeef0002,r8
- set_cc 0x08 ; Set mask opposite of expected
- muluh r7,r8
- test_cc 0 1 0 0
- test_h_dr 2,mdl
-
- mvi_h_gr 0xdead0002,r7 ; multiply by 1
- mvi_h_gr 0xbeef0001,r8
- set_cc 0x09 ; Set mask opposite of expected
- muluh r7,r8
- test_cc 0 1 0 1
- test_h_dr 2,mdl
-
- mvi_h_gr 0xdead0000,r7 ; multiply by 0
- mvi_h_gr 0xbeef0002,r8
- set_cc 0x09 ; Set mask opposite of expected
- muluh r7,r8
- test_cc 0 1 0 1
- test_h_dr 0,mdl
-
- mvi_h_gr 0xdead0002,r7 ; multiply by 0
- mvi_h_gr 0xbeef0000,r8
- set_cc 0x08 ; Set mask opposite of expected
- muluh r7,r8
- test_cc 0 1 0 0
- test_h_dr 0,mdl
-
- mvi_h_gr 0xdead3fff,r7 ; 15 bit result
- mvi_h_gr 0xbeef0002,r8
- set_cc 0x09 ; Set mask opposite of expected
- muluh r7,r8
- test_cc 0 1 0 1
- test_h_dr 0x00007ffe,mdl
-
- mvi_h_gr 0xdead4000,r7 ; 16 bit result
- mvi_h_gr 0xbeef0002,r8
- set_cc 0x08 ; Set mask opposite of expected
- muluh r7,r8
- test_cc 0 1 0 0
- test_h_dr 0x00008000,mdl
-
- mvi_h_gr 0xdead8000,r7 ; 17 bit result
- mvi_h_gr 0xbeef0002,r8
- set_cc 0x0b ; Set mask opposite of expected
- muluh r7,r8
- test_cc 0 1 1 1
- test_h_dr 0x00010000,mdl
-
- mvi_h_gr 0xdead7fff,r7 ; max positive result
- mvi_h_gr 0xbeef7fff,r8
- set_cc 0x0b ; Set mask opposite of expected
- muluh r7,r8
- test_cc 0 1 1 1
- test_h_dr 0x3fff0001,mdl
-
- mvi_h_gr 0xdead8000,r7 ; max positive result
- mvi_h_gr 0xbeef8000,r8
- set_cc 0x0b ; Set mask opposite of expected
- muluh r7,r8
- test_cc 0 1 1 1
- test_h_dr 0x40000000,mdl
-
- mvi_h_gr 0xdeadffff,r7 ; max positive result
- mvi_h_gr 0xbeefffff,r8
- set_cc 0x07 ; Set mask opposite of expected
- muluh r7,r8
- test_cc 1 0 1 1
- test_h_dr 0xfffe0001,mdl
-
- pass
diff --git a/sim/testsuite/sim/fr30/nop.cgs b/sim/testsuite/sim/fr30/nop.cgs
deleted file mode 100644
index 885c55cfd1a..00000000000
--- a/sim/testsuite/sim/fr30/nop.cgs
+++ /dev/null
@@ -1,16 +0,0 @@
-# fr30 testcase for nop
-# mach(): fr30
-
- .include "testutils.inc"
-
- START
-
- .text
- .global nop
-nop:
- ; Test nop
- set_cc 0x0f ; Condition codes are irrelevent
- nop
- test_cc 1 1 1 1
-
- pass
diff --git a/sim/testsuite/sim/fr30/or.cgs b/sim/testsuite/sim/fr30/or.cgs
deleted file mode 100644
index 8acb9702000..00000000000
--- a/sim/testsuite/sim/fr30/or.cgs
+++ /dev/null
@@ -1,55 +0,0 @@
-# fr30 testcase for or $Rj,$Ri, or $Rj,@$Ri
-# mach(): fr30
-
- .include "testutils.inc"
-
- START
-
- .text
- .global or
-or:
- ; Test or $Rj,$Ri
- mvi_h_gr 0xaaaaaaaa,r7
- mvi_h_gr 0x55555555,r8
- set_cc 0x07 ; Set mask opposite of expected
- or r7,r8
- test_cc 1 0 1 1
- test_h_gr 0xffffffff,r8
-
- mvi_h_gr 0x00000000,r7
- mvi_h_gr 0x00000000,r8
- set_cc 0x08 ; Set mask opposite of expected
- or r7,r8
- test_cc 0 1 0 0
- test_h_gr 0x00000000,r8
-
- mvi_h_gr 0xdead0000,r7
- mvi_h_gr 0x0000beef,r8
- set_cc 0x05 ; Set mask opposite of expected
- or r7,r8
- test_cc 1 0 0 1
- test_h_gr 0xdeadbeef,r8
-
- ; Test or $Rj,@$Ri
- mvi_h_gr 0xaaaaaaaa,r7
- mvi_h_mem 0x55555555,sp
- set_cc 0x07 ; Set mask opposite of expected
- or r7,@sp
- test_cc 1 0 1 1
- test_h_mem 0xffffffff,sp
-
- mvi_h_gr 0x00000000,r7
- mvi_h_mem 0x00000000,sp
- set_cc 0x08 ; Set mask opposite of expected
- or r7,@sp
- test_cc 0 1 0 0
- test_h_mem 0x00000000,sp
-
- mvi_h_gr 0xdead0000,r7
- mvi_h_mem 0x0000beef,sp
- set_cc 0x05 ; Set mask opposite of expected
- or r7,@sp
- test_cc 1 0 0 1
- test_h_mem 0xdeadbeef,sp
-
- pass
diff --git a/sim/testsuite/sim/fr30/orb.cgs b/sim/testsuite/sim/fr30/orb.cgs
deleted file mode 100644
index a7b36bf5284..00000000000
--- a/sim/testsuite/sim/fr30/orb.cgs
+++ /dev/null
@@ -1,33 +0,0 @@
-# fr30 testcase for orb $Rj,$Ri, orb $Rj,@$Ri
-# mach(): fr30
-
- .include "testutils.inc"
-
- START
-
- .text
- .global orb
-orb:
- ; Test orb $Rj,@$Ri
- mvi_h_gr 0xaaaaaaaa,r7
- mvi_h_mem 0x55555555,sp
- set_cc 0x07 ; Set mask opposite of expected
- orb r7,@sp
- test_cc 1 0 1 1
- test_h_mem 0xff555555,sp
-
- mvi_h_gr 0xffffff00,r7
- mvi_h_mem 0x00ffffff,sp
- set_cc 0x08 ; Set mask opposite of expected
- orb r7,@sp
- test_cc 0 1 0 0
- test_h_mem 0x00ffffff,sp
-
- mvi_h_gr 0x000000d0,r7
- mvi_h_mem 0x0eadbeef,sp
- set_cc 0x05 ; Set mask opposite of expected
- orb r7,@sp
- test_cc 1 0 0 1
- test_h_mem 0xdeadbeef,sp
-
- pass
diff --git a/sim/testsuite/sim/fr30/orccr.cgs b/sim/testsuite/sim/fr30/orccr.cgs
deleted file mode 100644
index 3bc55a84570..00000000000
--- a/sim/testsuite/sim/fr30/orccr.cgs
+++ /dev/null
@@ -1,38 +0,0 @@
-# fr30 testcase for orccr $u8
-# mach(): fr30
-
- .include "testutils.inc"
-
- START
-
- .text
- .global orccr
-orccr:
- orccr 0xff
- test_cc 1 1 1 1
- test_i 1
- test_s_user
-
- set_cc 0x0f
- orccr 0x00
- test_cc 1 1 1 1
- test_i 1
- test_s_user
-
- set_cc 0x00
- set_i 0
- set_s_system
- orccr 0xaa
- test_cc 1 0 1 0
- test_i 0
- test_s_user
-
- set_cc 0x00
- set_i 0
- set_s_system
- orccr 0xc0
- test_cc 0 0 0 0
- test_i 0
- test_s_system
-
- pass
diff --git a/sim/testsuite/sim/fr30/orh.cgs b/sim/testsuite/sim/fr30/orh.cgs
deleted file mode 100644
index b30b4028e85..00000000000
--- a/sim/testsuite/sim/fr30/orh.cgs
+++ /dev/null
@@ -1,33 +0,0 @@
-# fr30 testcase for orh $Rj,$Ri, orh $Rj,@$Ri
-# mach(): fr30
-
- .include "testutils.inc"
-
- START
-
- .text
- .global orh
-orh:
- ; Test orh $Rj,@$Ri
- mvi_h_gr 0xaaaaaaaa,r7
- mvi_h_mem 0x55555555,sp
- set_cc 0x07 ; Set mask opposite of expected
- orh r7,@sp
- test_cc 1 0 1 1
- test_h_mem 0xffff5555,sp
-
- mvi_h_gr 0xffff0000,r7
- mvi_h_mem 0x0000ffff,sp
- set_cc 0x08 ; Set mask opposite of expected
- orh r7,@sp
- test_cc 0 1 0 0
- test_h_mem 0x0000ffff,sp
-
- mvi_h_gr 0x0000de00,r7
- mvi_h_mem 0x00adbeef,sp
- set_cc 0x05 ; Set mask opposite of expected
- orh r7,@sp
- test_cc 1 0 0 1
- test_h_mem 0xdeadbeef,sp
-
- pass
diff --git a/sim/testsuite/sim/fr30/ret.cgs b/sim/testsuite/sim/fr30/ret.cgs
deleted file mode 100644
index 7bfa0b230f9..00000000000
--- a/sim/testsuite/sim/fr30/ret.cgs
+++ /dev/null
@@ -1,75 +0,0 @@
-# fr30 testcase for ret
-# mach(): fr30
-
- .include "testutils.inc"
-
- START
-
- .text
- .global ret
-
- ; Test ret
- mvi_h_gr 0xdeadbeef,r9
- mvi_h_gr #func1,r0
- set_cc 0x0f ; condition codes shouldn't change
-call1:
- call @r0
- testr_h_gr 2,r0
- test_h_gr 0xbeefdead,r9
- pass
-
-func1:
- test_cc 1 1 1 1
- mvi_h_gr #call1,r7
- inci_h_gr 2,r7
- testr_h_dr r7,rp
- save_rp
-
- mvi_h_gr #func2,r0
- set_cc 0x0f ; condition codes shouldn't change
-call2:
- call:d @r0
- ldi:8 1,r0 ; Must assume this works
- testr_h_gr 2,r0
- restore_rp
- ret
-func2:
- test_cc 1 1 1 1
- mvi_h_gr #call2,r7
- inci_h_gr 4,r7
- testr_h_dr r7,rp
- testr_h_gr 1,r0
- save_rp
-
- set_cc 0x0f ; condition codes shouldn't change
-call3:
- call func3
- testr_h_gr 2,r0
- restore_rp
- ret
-func3:
- test_cc 1 1 1 1
- mvi_h_gr #call3,r7
- inci_h_gr 2,r7
- testr_h_dr r7,rp
- save_rp
-
- set_cc 0x0f ; condition codes shouldn't change
-call4:
- call:d func4
- ldi:8 1,r0 ; Must assume this works
- testr_h_gr 3,r0
- restore_rp
- ret:d
- ldi:8 2,r0 ; Must assume this works
-func4:
- test_cc 1 1 1 1
- mvi_h_gr #call4,r7
- inci_h_gr 4,r7
- testr_h_dr r7,rp
- testr_h_gr 1,r0
- mvi_h_gr 0xbeefdead,r9
- ret:d
- ldi:8 3,r0 ; Must assume this works
-
- fail
diff --git a/sim/testsuite/sim/fr30/reti.cgs b/sim/testsuite/sim/fr30/reti.cgs
deleted file mode 100644
index 76a1af0bb82..00000000000
--- a/sim/testsuite/sim/fr30/reti.cgs
+++ /dev/null
@@ -1,57 +0,0 @@
-# fr30 testcase for reti
-# mach(): fr30
-
- .include "testutils.inc"
-
- START
-
- .text
- .global reti
-reti:
- ; Test reti with low reset of ilm allowed
- mvr_h_gr sp,r8 ; Save stack pointer
- set_s_system
- set_i 1
- set_ilm 15 ; attempt reset of low range
- set_cc 0x0f ; Condition codes should not change
- save_ps
- inci_h_gr -4,sp
- mvi_h_mem ret1,sp
- set_i 0 ; Set opposite of expected
- set_ilm 0 ; attempt reset of low range
- set_cc 0x00 ; Set opposite of expected
-
- reti
- fail
-
-ret1:
- test_cc 1 1 1 1
- test_s_system
- test_i 1
- test_ilm 15
- testr_h_gr r8,sp
-
- ; Test reti with low reset of ilm not allowed
- mvr_h_gr sp,r8 ; Save stack pointer
- set_s_system
- set_i 0
- set_ilm 15 ; attempt reset of low range
- set_cc 0x0f ; Condition codes should not change
- save_ps
- inci_h_gr -4,sp
- mvi_h_mem ret2,sp
- set_i 0 ; Set opposite of expected
- set_ilm 16 ; disallow reset of low range
- set_cc 0x00 ; Set opposite of expected
-
- reti
- fail
-
-ret2:
- test_cc 1 1 1 1
- test_s_system
- test_i 0
- test_ilm 31
- testr_h_gr r8,sp
-
- pass
diff --git a/sim/testsuite/sim/fr30/st.cgs b/sim/testsuite/sim/fr30/st.cgs
deleted file mode 100644
index e458d14001b..00000000000
--- a/sim/testsuite/sim/fr30/st.cgs
+++ /dev/null
@@ -1,194 +0,0 @@
-# fr30 testcase for
-# mach(): fr30
-# st $Ri,@$Rj
-
- .include "testutils.inc"
-
- START
-
- .text
- .global st
-st:
- mvr_h_gr sp,r9 ; Save stack pointer
- ; Test st $Ri,@Rj
- mvi_h_gr 0xdeadbeef,r8
- set_cc 0x0f ; Condition codes should not change
- st r8,@sp
- test_cc 1 1 1 1
- test_h_mem 0xdeadbeef,sp
- test_h_gr 0xdeadbeef,r8
-
- ; Test st $Ri,@(R13,Rj)
- mvi_h_gr 0xbeefdead,r8
- mvr_h_gr sp,r1
- inci_h_gr -8,sp
- mvr_h_gr sp,r2
- inci_h_gr 4,sp
-
- mvi_h_gr 4,r13
- set_cc 0x0e ; Condition codes should not change
- st r8,@(r13,sp)
- test_cc 1 1 1 0
- test_h_mem 0xbeefdead,r1
- test_h_gr 0xbeefdead,r8
-
- mvi_h_gr 0,r13
- set_cc 0x0d ; Condition codes should not change
- st r8,@(r13,sp)
- test_cc 1 1 0 1
- test_h_mem 0xbeefdead,sp
- test_h_gr 0xbeefdead,r8
-
- mvi_h_gr -4,r13
- set_cc 0x0c ; Condition codes should not change
- st r8,@(r13,sp)
- test_cc 1 1 0 0
- test_h_mem 0xbeefdead,r2
- test_h_gr 0xbeefdead,r8
-
- ; Test st $Ri,@(R14,$disp10)
- mvi_h_gr 0xdeadbeef,r8
- mvr_h_gr r9,sp ; Restore stack pointer
- mvr_h_gr sp,r14
- inci_h_gr -508,r14
- mvr_h_gr r14,r2
- inci_h_gr -512,r14
- mvr_h_gr r14,r3
- inci_h_gr 512,r14
-
- set_cc 0x0b ; Condition codes should not change
- st r8,@(r14,508)
- test_cc 1 0 1 1
- test_h_mem 0xdeadbeef,r1
- test_h_gr 0xdeadbeef,r8
-
- set_cc 0x0a ; Condition codes should not change
- st r8,@(r14,0)
- test_cc 1 0 1 0
- test_h_mem 0xdeadbeef,r2
- test_h_gr 0xdeadbeef,r8
-
- set_cc 0x09 ; Condition codes should not change
- st r8,@(r14,-512)
- test_cc 1 0 0 1
- test_h_mem 0xdeadbeef,r3
- test_h_gr 0xdeadbeef,r8
-
- ; Test st $Ri,@(R15,$udisp6)
- mvi_h_gr 0xbeefdead,r8
- mvr_h_gr r9,sp ; Restore stack pointer
- inci_h_gr -60,sp
-
- set_cc 0x08 ; Condition codes should not change
- st r8,@(r15,60)
- test_cc 1 0 0 0
- test_h_mem 0xbeefdead,r9
- test_h_gr 0xbeefdead,r8
-
- set_cc 0x07 ; Condition codes should not change
- st r8,@(r15,0)
- test_cc 0 1 1 1
- test_h_mem 0xbeefdead,r9
- test_h_gr 0xbeefdead,r8
-
- ; Test st $Ri,@-R15
- mvr_h_gr r9,sp ; Restore stack pointer
- mvr_h_gr r9,r10
-
- set_cc 0x06 ; Condition codes should not change
- st r15,@-r15
- test_cc 0 1 1 0
- testr_h_mem r9,sp ; original value stored
- inci_h_gr -4,r10
- testr_h_gr r10,sp ; was decremented
-
- mvi_h_gr 0xdeadbeef,r8
- set_cc 0x05 ; Condition codes should not change
- st r8,@-r15
- test_cc 0 1 0 1
- test_h_mem 0xdeadbeef,sp
- test_h_gr 0xdeadbeef,r8
- inci_h_gr -4,r10
- testr_h_gr r10,sp ; was decremented
-
- ; Test st $Rs,@-R15
- mvr_h_gr r9,sp ; Restore stack pointer
- mvr_h_gr r9,r10
- mvi_h_dr 0xbeefdead,tbr
- mvi_h_dr 0xdeadbeef,rp
- mvi_h_dr 0x0000dead,mdh
- mvi_h_dr 0xbeef0000,mdl
-
- set_cc 0x04 ; Condition codes should not change
- st tbr,@-r15
- test_cc 0 1 0 0
- test_h_mem 0xbeefdead,sp
- inci_h_gr -4,r10
- testr_h_gr r10,sp ; was decremented
-
- set_cc 0x03 ; Condition codes should not change
- st rp,@-r15
- test_cc 0 0 1 1
- test_h_mem 0xdeadbeef,sp
- inci_h_gr -4,r10
- testr_h_gr r10,sp ; was decremented
-
- set_cc 0x02 ; Condition codes should not change
- st mdh,@-r15
- test_cc 0 0 1 0
- test_h_mem 0x0000dead,sp
- inci_h_gr -4,r10
- testr_h_gr r10,sp ; was decremented
-
- set_cc 0x01 ; Condition codes should not change
- st mdl,@-r15
- test_cc 0 0 0 1
- test_h_mem 0xbeef0000,sp
- inci_h_gr -4,r10
- testr_h_gr r10,sp ; was decremented
-
- mvr_h_gr sp,usp
- set_s_user
- set_cc 0x00 ; Condition codes should not change
- st ssp,@-r15
- test_cc 0 0 0 0
- testr_h_mem r10,sp
- inci_h_gr -4,r10
- testr_h_gr r10,sp ; was decremented
-
- set_cc 0x00 ; Condition codes should not change
- st usp,@-r15
- test_cc 0 0 0 0
- testr_h_mem r10,sp ; original value stored
- inci_h_gr -4,r10
- testr_h_gr r10,sp ; was decremented
-
- mvr_h_gr sp,ssp
- set_s_system
- set_cc 0x00 ; Condition codes should not change
- st usp,@-r15
- test_cc 0 0 0 0
- testr_h_mem r10,sp
- inci_h_gr -4,r10
- testr_h_gr r10,sp ; was decremented
-
- set_cc 0x00 ; Condition codes should not change
- st ssp,@-r15
- test_cc 0 0 0 0
- testr_h_mem r10,sp ; original value stored
- inci_h_gr -4,r10
- testr_h_gr r10,sp ; was decremented
-
- ; Test st $PS,@-R15
- mvr_h_gr r9,sp ; Restore stack pointer
- mvr_h_gr r9,r10
-
- set_cc 0x0f ; Condition codes affect result
- set_dbits 3 ; Division bits affect result
- st ps,@-r15
- test_cc 1 1 1 1
- test_h_mem 0x0000060f,sp
- inci_h_gr -4,r10
- testr_h_gr r10,sp ; was decremented
-
- pass
diff --git a/sim/testsuite/sim/fr30/stb.cgs b/sim/testsuite/sim/fr30/stb.cgs
deleted file mode 100644
index edbf4f22c7e..00000000000
--- a/sim/testsuite/sim/fr30/stb.cgs
+++ /dev/null
@@ -1,84 +0,0 @@
-# fr30 testcase for
-# mach(): fr30
-# stb $Ri,@$Rj
-
- .include "testutils.inc"
-
- START
-
- .text
- .global stb
-stb:
- mvr_h_gr sp,r9 ; Save stack pointer
- ; Test stb $Ri,@Rj
- mvi_h_mem 0xdeadbeef,sp
- mvi_h_gr 0xaaaaaafe,r8
- set_cc 0x0f ; Condition codes should not change
- stb r8,@sp
- test_cc 1 1 1 1
- test_h_mem 0xfeadbeef,sp
- test_h_gr 0xaaaaaafe,r8
-
- ; Test stb $Ri,@(R13,Rj)
- mvi_h_mem 0xbeefdead,sp
- mvi_h_gr 0xaaaaaade,r8
- mvr_h_gr sp,r1
- inci_h_gr -8,sp
- mvr_h_gr sp,r2
- mvi_h_mem 0xbeefdead,sp
- inci_h_gr 4,sp
- mvi_h_mem 0xbeefdead,sp
-
- mvi_h_gr 4,r13
- set_cc 0x0e ; Condition codes should not change
- stb r8,@(r13,sp)
- test_cc 1 1 1 0
- test_h_mem 0xdeefdead,r1
- test_h_gr 0xaaaaaade,r8
-
- mvi_h_gr 0,r13
- set_cc 0x0d ; Condition codes should not change
- stb r8,@(r13,sp)
- test_cc 1 1 0 1
- test_h_mem 0xdeefdead,sp
- test_h_gr 0xaaaaaade,r8
-
- mvi_h_gr -4,r13
- set_cc 0x0c ; Condition codes should not change
- stb r8,@(r13,sp)
- test_cc 1 1 0 0
- test_h_mem 0xdeefdead,r2
- test_h_gr 0xaaaaaade,r8
-
- ; Test stb $Ri,@(R14,$disp8
- mvr_h_gr r9,sp ; Restore stack pointer
- mvi_h_gr 0xaaaaaafe,r8
- mvi_h_mem 0xdeadbeef,sp
- mvr_h_gr sp,r14
- inci_h_gr -128,r14 ; must be aligned
- mvi_h_mem 0xdeadbeef,r14
- mvr_h_gr r14,r2
- inci_h_gr -128,r14 ; must be aligned
- mvi_h_mem 0xdeadbeef,r14
- mvr_h_gr r14,r3
- inci_h_gr 129,r14
-
- set_cc 0x0b ; Condition codes should not change
- stb r8,@(r14,127)
- test_cc 1 0 1 1
- test_h_mem 0xfeadbeef,r1
- test_h_gr 0xaaaaaafe,r8
-
- set_cc 0x0a ; Condition codes should not change
- stb r8,@(r14,0)
- test_cc 1 0 1 0
- test_h_mem 0xdefebeef,r2
- test_h_gr 0xaaaaaafe,r8
-
- set_cc 0x09 ; Condition codes should not change
- stb r8,@(r14,-128)
- test_cc 1 0 0 1
- test_h_mem 0xdefebeef,r3
- test_h_gr 0xaaaaaafe,r8
-
- pass
diff --git a/sim/testsuite/sim/fr30/sth.cgs b/sim/testsuite/sim/fr30/sth.cgs
deleted file mode 100644
index 8c4a1156b92..00000000000
--- a/sim/testsuite/sim/fr30/sth.cgs
+++ /dev/null
@@ -1,84 +0,0 @@
-# fr30 testcase for
-# mach(): fr30
-# sth $Ri,@$Rj
-
- .include "testutils.inc"
-
- START
-
- .text
- .global sth
-sth:
- mvr_h_gr sp,r9 ; Save stack pointer
- ; Test sth $Ri,@Rj
- mvi_h_mem 0xdeadbeef,sp
- mvi_h_gr 0xaaaabeef,r8
- set_cc 0x0f ; Condition codes should not change
- sth r8,@sp
- test_cc 1 1 1 1
- test_h_mem 0xbeefbeef,sp
- test_h_gr 0xaaaabeef,r8
-
- ; Test sth $Ri,@(R13,Rj)
- mvi_h_mem 0xbeefdead,sp
- mvi_h_gr 0xaaaadead,r8
- mvr_h_gr sp,r1
- inci_h_gr -8,sp
- mvr_h_gr sp,r2
- mvi_h_mem 0xbeefdead,sp
- inci_h_gr 4,sp
- mvi_h_mem 0xbeefdead,sp
-
- mvi_h_gr 4,r13
- set_cc 0x0e ; Condition codes should not change
- sth r8,@(r13,sp)
- test_cc 1 1 1 0
- test_h_mem 0xdeaddead,r1
- test_h_gr 0xaaaadead,r8
-
- mvi_h_gr 0,r13
- set_cc 0x0d ; Condition codes should not change
- sth r8,@(r13,sp)
- test_cc 1 1 0 1
- test_h_mem 0xdeaddead,sp
- test_h_gr 0xaaaadead,r8
-
- mvi_h_gr -4,r13
- set_cc 0x0c ; Condition codes should not change
- sth r8,@(r13,sp)
- test_cc 1 1 0 0
- test_h_mem 0xdeaddead,r2
- test_h_gr 0xaaaadead,r8
-
- ; Test sth $Ri,@(R14,$disp9)
- mvr_h_gr r9,sp ; Restore stack pointer
- mvi_h_gr 0xaaaaabcd,r8
- mvi_h_mem 0xdeadbeef,sp
- mvr_h_gr sp,r14
- inci_h_gr -256,r14 ; must be aligned
- mvr_h_gr r14,r2
- mvi_h_mem 0xdeadbeef,r14
- inci_h_gr -256,r14
- mvr_h_gr r14,r3
- mvi_h_mem 0xdeadbeef,r14
- inci_h_gr 258,r14
-
- set_cc 0x0b ; Condition codes should not change
- sth r8,@(r14,254)
- test_cc 1 0 1 1
- test_h_mem 0xabcdbeef,r1
- test_h_gr 0xaaaaabcd,r8
-
- set_cc 0x0a ; Condition codes should not change
- sth r8,@(r14,0)
- test_cc 1 0 1 0
- test_h_mem 0xdeadabcd,r2
- test_h_gr 0xaaaaabcd,r8
-
- set_cc 0x09 ; Condition codes should not change
- sth r8,@(r14,-256)
- test_cc 1 0 0 1
- test_h_mem 0xdeadabcd,r3
- test_h_gr 0xaaaaabcd,r8
-
- pass
diff --git a/sim/testsuite/sim/fr30/stilm.cgs b/sim/testsuite/sim/fr30/stilm.cgs
deleted file mode 100644
index 197940bbf4f..00000000000
--- a/sim/testsuite/sim/fr30/stilm.cgs
+++ /dev/null
@@ -1,41 +0,0 @@
-# fr30 testcase for stilm $i8
-# mach(): fr30
-
- .include "testutils.inc"
-
- START
-
- .text
- .global stilm
-stilm:
- stilm 0
- test_ilm 0
-
- stilm 0xe0
- test_ilm 0
-
- stilm 1
- test_ilm 1
-
- stilm 15
- test_ilm 15
-
- stilm 16
- test_ilm 16
-
- stilm 0
- test_ilm 16
-
- stilm 1
- test_ilm 17
-
- stilm 18
- test_ilm 18
-
- stilm 31
- test_ilm 31
-
- stilm 0xff
- test_ilm 31
-
- pass
diff --git a/sim/testsuite/sim/fr30/stm0.cgs b/sim/testsuite/sim/fr30/stm0.cgs
deleted file mode 100644
index 5cc162c1a31..00000000000
--- a/sim/testsuite/sim/fr30/stm0.cgs
+++ /dev/null
@@ -1,101 +0,0 @@
-# fr30 testcase for stm0 ($reglist_low)
-# mach(): fr30
-
- .include "testutils.inc"
-
- START
-
- .text
- .global stm0
-stm0:
- ; Test stm0 ($reglist_low)
- mvr_h_gr sp,r8 ; save stack pointer temporarily
- mvr_h_gr sp,r9 ; save stack pointer permanently
- mvi_h_gr 0,r0
- mvi_h_gr 1,r1
- mvi_h_gr 2,r2
- mvi_h_gr 3,r3
- mvi_h_gr 4,r4
- mvi_h_gr 5,r5
- mvi_h_gr 6,r6
- mvi_h_gr 7,r7
- set_cc 0x0f ; Condition codes should not change
- stm0 (r0,r2,r4,r6)
- test_cc 1 1 1 1
- inci_h_gr -4,r8
- test_h_mem 6,r8
- inci_h_gr -4,r8
- test_h_mem 4,r8
- inci_h_gr -4,r8
- test_h_mem 2,r8
- inci_h_gr -4,r8
- test_h_mem 0,r8
-
- mvr_h_gr r9,sp ; restore stack pointer
- mvr_h_gr r9,r8 ; save stack pointer temporarily
- mvi_h_gr 0,r0
- mvi_h_gr 1,r1
- mvi_h_gr 2,r2
- mvi_h_gr 3,r3
- mvi_h_gr 4,r4
- mvi_h_gr 5,r5
- mvi_h_gr 6,r6
- mvi_h_gr 7,r7
- set_cc 0x0f ; Condition codes should not change
- stm0 (r1,r3,r5,r7)
- test_cc 1 1 1 1
- inci_h_gr -4,r8
- test_h_mem 7,r8
- inci_h_gr -4,r8
- test_h_mem 5,r8
- inci_h_gr -4,r8
- test_h_mem 3,r8
- inci_h_gr -4,r8
- test_h_mem 1,r8
-
- mvr_h_gr r9,sp ; restore stack pointer
- mvr_h_gr r9,r8 ; save stack pointer temporarily
- mvi_h_gr 0,r0
- mvi_h_gr 1,r1
- mvi_h_gr 2,r2
- mvi_h_gr 3,r3
- mvi_h_gr 4,r4
- mvi_h_gr 5,r5
- mvi_h_gr 6,r6
- mvi_h_gr 7,r7
- set_cc 0x0f ; Condition codes should not change
- stm0 (r1,r5,r7,r3) ; Order specified should not matter
- test_cc 1 1 1 1
- inci_h_gr -4,r8
- test_h_mem 7,r8
- inci_h_gr -4,r8
- test_h_mem 5,r8
- inci_h_gr -4,r8
- test_h_mem 3,r8
- inci_h_gr -4,r8
- test_h_mem 1,r8
-
- mvr_h_gr r9,sp ; restore stack pointer
- mvr_h_gr r9,r8 ; save stack pointer temporarily
- mvi_h_gr 9,r0
- mvi_h_gr 9,r1
- mvi_h_gr 9,r2
- mvi_h_gr 9,r3
- mvi_h_gr 9,r4
- mvi_h_gr 9,r5
- mvi_h_gr 9,r6
- mvi_h_gr 9,r7
- set_cc 0x0f ; Condition codes should not change
- stm0 () ; should do nothing
- test_cc 1 1 1 1
- testr_h_gr r9,sp
- inci_h_gr -4,r8
- test_h_mem 7,r8
- inci_h_gr -4,r8
- test_h_mem 5,r8
- inci_h_gr -4,r8
- test_h_mem 3,r8
- inci_h_gr -4,r8
- test_h_mem 1,r8
-
- pass
diff --git a/sim/testsuite/sim/fr30/stm1.cgs b/sim/testsuite/sim/fr30/stm1.cgs
deleted file mode 100644
index 2ac373d3544..00000000000
--- a/sim/testsuite/sim/fr30/stm1.cgs
+++ /dev/null
@@ -1,97 +0,0 @@
-# fr30 testcase for stm1 ($reglist_low)
-# mach(): fr30
-
- .include "testutils.inc"
-
- START
-
- .text
- .global stm1
-stm1:
- ; Test stm1 ($reglist_low)
- mvr_h_gr sp,r1 ; save stack pointer temporarily
- mvr_h_gr sp,r2 ; save stack pointer permanently
- mvi_h_gr 8,r8
- mvi_h_gr 9,r9
- mvi_h_gr 10,r10
- mvi_h_gr 11,r11
- mvi_h_gr 12,r12
- mvi_h_gr 13,r13
- mvi_h_gr 14,r14
- set_cc 0x0f ; Condition codes should not change
- stm1 (r8,r10,r12,r14)
- test_cc 1 1 1 1
- inci_h_gr -4,r1
- test_h_mem 14,r1
- inci_h_gr -4,r1
- test_h_mem 12,r1
- inci_h_gr -4,r1
- test_h_mem 10,r1
- inci_h_gr -4,r1
- testr_h_mem 8,r1
-
- mvr_h_gr r2,sp ; restore stack pointer
- mvr_h_gr r2,r1 ; save stack pointer temporarily
- mvi_h_gr 8,r8
- mvi_h_gr 9,r9
- mvi_h_gr 10,r10
- mvi_h_gr 11,r11
- mvi_h_gr 12,r12
- mvi_h_gr 13,r13
- mvi_h_gr 14,r14
- set_cc 0x0f ; Condition codes should not change
- stm1 (r9,r11,r13,r15)
- test_cc 1 1 1 1
- inci_h_gr -4,r1
- testr_h_mem r2,r1
- inci_h_gr -4,r1
- test_h_mem 13,r1
- inci_h_gr -4,r1
- test_h_mem 11,r1
- inci_h_gr -4,r1
- test_h_mem 9,r1 ; saved r15 is from before stm1
-
- mvr_h_gr r2,sp ; restore stack pointer
- mvr_h_gr r2,r1 ; save stack pointer temporarily
- mvi_h_gr 8,r8
- mvi_h_gr 9,r9
- mvi_h_gr 10,r10
- mvi_h_gr 11,r11
- mvi_h_gr 12,r12
- mvi_h_gr 13,r13
- mvi_h_gr 14,r14
- set_cc 0x0f ; Condition codes should not change
- stm1 (r9,r13,r15,r11); Order specified should not matter
- test_cc 1 1 1 1
- inci_h_gr -4,r1
- testr_h_mem r2,r1
- inci_h_gr -4,r1
- test_h_mem 13,r1
- inci_h_gr -4,r1
- test_h_mem 11,r1
- inci_h_gr -4,r1
- test_h_mem 9,r1 ; saved r15 is from before stm1
-
- mvr_h_gr r2,sp ; restore stack pointer
- mvr_h_gr r2,r1 ; save stack pointer temporarily
- mvi_h_gr 9,r8
- mvi_h_gr 9,r9
- mvi_h_gr 9,r10
- mvi_h_gr 9,r11
- mvi_h_gr 9,r12
- mvi_h_gr 9,r13
- mvi_h_gr 9,r14
- set_cc 0x0f ; Condition codes should not change
- stm1 () ; should do nothing
- test_cc 1 1 1 1
- testr_h_gr r2,sp
- inci_h_gr -4,r1
- testr_h_mem r2,r1
- inci_h_gr -4,r1
- test_h_mem 13,r1
- inci_h_gr -4,r1
- test_h_mem 11,r1
- inci_h_gr -4,r1
- test_h_mem 9,r1
-
- pass
diff --git a/sim/testsuite/sim/fr30/stres.cgs b/sim/testsuite/sim/fr30/stres.cgs
deleted file mode 100644
index a85fdf3f9f4..00000000000
--- a/sim/testsuite/sim/fr30/stres.cgs
+++ /dev/null
@@ -1,25 +0,0 @@
-# fr30 testcase for stres $@Ri+,$u4
-# mach(): fr30
-
- .include "testutils.inc"
-
- START
-
- .text
- .global stres
-stres:
- ; Test stres $@Ri+,$u4
- ; The current implementation simply increments Ri
- mvi_h_gr 0x1000,r7
- set_cc 0x0f ; Condition codes are irrelevent
- stres 0,@r7+
- test_cc 1 1 1 1
- test_h_gr 0x1004,r7
-
- mvi_h_gr 0x1000,r7
- set_cc 0x0f ; Condition codes are irrelevent
- stres 0xf,@r7+
- test_cc 1 1 1 1
- test_h_gr 0x1004,r7
-
- pass
diff --git a/sim/testsuite/sim/fr30/sub.cgs b/sim/testsuite/sim/fr30/sub.cgs
deleted file mode 100644
index eceaa79c5c6..00000000000
--- a/sim/testsuite/sim/fr30/sub.cgs
+++ /dev/null
@@ -1,36 +0,0 @@
-# fr30 testcase for sub $Rj,$Ri
-# mach(): fr30
-
- .include "testutils.inc"
-
- START
-
- .text
- .global sub
-sub:
- ; Test sub $Rj,$Ri
- mvi_h_gr 1,r7
- mvi_h_gr 2,r8
- set_cc 0x0f ; Set mask opposite of expected
- sub r7,r8
- test_cc 0 0 0 0
- test_h_gr 1,r8
-
- mvi_h_gr 1,r7
- mvi_h_gr 0x80000000,r8
- set_cc 0x0d ; Set mask opposite of expected
- sub r7,r8
- test_cc 0 0 1 0
- test_h_gr 0x7fffffff,r8
-
- set_cc 0x0b ; Set mask opposite of expected
- sub r8,r8
- test_cc 0 1 0 0
- test_h_gr 0,r8
-
- set_cc 0x06 ; Set mask opposite of expected
- sub r7,r8
- test_cc 1 0 0 1
- test_h_gr 0xffffffff,r8
-
- pass
diff --git a/sim/testsuite/sim/fr30/subc.cgs b/sim/testsuite/sim/fr30/subc.cgs
deleted file mode 100644
index 2978e40c38d..00000000000
--- a/sim/testsuite/sim/fr30/subc.cgs
+++ /dev/null
@@ -1,62 +0,0 @@
-# fr30 testcase for subc $Rj,$Ri
-# mach(): fr30
-
- .include "testutils.inc"
-
- START
-
- .text
- .global subc
-subc:
- ; Test subc $Rj,$Ri
- mvi_h_gr 1,r7
- mvi_h_gr 2,r8
- set_cc 0x0e ; Make sure carry is off
- subc r7,r8
- test_cc 0 0 0 0
- test_h_gr 1,r8
-
- mvi_h_gr 1,r7
- mvi_h_gr 0x80000000,r8
- set_cc 0x0c ; Make sure carry is off
- subc r7,r8
- test_cc 0 0 1 0
- test_h_gr 0x7fffffff,r8
-
- set_cc 0x0a ; Make sure carry is off
- subc r8,r8
- test_cc 0 1 0 0
- test_h_gr 0,r8
-
- set_cc 0x06 ; Make sure carry is off
- subc r7,r8
- test_cc 1 0 0 1
- test_h_gr 0xffffffff,r8
-
- mvi_h_gr 1,r7
- mvi_h_gr 3,r8
- set_cc 0x0f ; Make sure carry is on
- subc r7,r8
- test_cc 0 0 0 0
- test_h_gr 1,r8
-
- mvi_h_gr 0,r7
- mvi_h_gr 0x80000000,r8
- set_cc 0x0d ; Make sure carry is on
- subc r7,r8
- test_cc 0 0 1 0
- test_h_gr 0x7fffffff,r8
-
- mvi_h_gr 0x7ffffffe,r7
- set_cc 0x0b ; Make sure carry is on
- subc r7,r8
- test_cc 0 1 0 0
- test_h_gr 0,r8
-
- mvi_h_gr 0,r7
- set_cc 0x07 ; Make sure carry is on
- subc r7,r8
- test_cc 1 0 0 1
- test_h_gr 0xffffffff,r8
-
- pass
diff --git a/sim/testsuite/sim/fr30/subn.cgs b/sim/testsuite/sim/fr30/subn.cgs
deleted file mode 100644
index c4830468d22..00000000000
--- a/sim/testsuite/sim/fr30/subn.cgs
+++ /dev/null
@@ -1,36 +0,0 @@
-# fr30 testcase for subn $Rj,$Ri
-# mach(): fr30
-
- .include "testutils.inc"
-
- START
-
- .text
- .global subn
-subn:
- ; Test subn $Rj,$Ri
- mvi_h_gr 1,r7
- mvi_h_gr 2,r8
- set_cc 0x0f ; Set mask opposite of usual result
- subn r7,r8
- test_cc 1 1 1 1
- test_h_gr 1,r8
-
- mvi_h_gr 1,r7
- mvi_h_gr 0x80000000,r8
- set_cc 0x0d ; Set mask opposite of usual result
- subn r7,r8
- test_cc 1 1 0 1
- test_h_gr 0x7fffffff,r8
-
- set_cc 0x0b ; Set mask opposite of usual result
- subn r8,r8
- test_cc 1 0 1 1
- test_h_gr 0,r8
-
- set_cc 0x06 ; Set mask opposite of usual result
- subn r7,r8
- test_cc 0 1 1 0
- test_h_gr 0xffffffff,r8
-
- pass
diff --git a/sim/testsuite/sim/fr30/testutils.inc b/sim/testsuite/sim/fr30/testutils.inc
deleted file mode 100644
index 7523d6f6aa5..00000000000
--- a/sim/testsuite/sim/fr30/testutils.inc
+++ /dev/null
@@ -1,306 +0,0 @@
-# r0, r4-r6 are used as tmps, consider them call clobbered by these macros.
-
- .macro start
- .data
-failmsg:
- .ascii "fail\n"
-passmsg:
- .ascii "pass\n"
- .text
- .global _start
-_start:
- ldi32 0x7fffc,sp ; TODO -- what's a good value for this?
- ldi32 0xffc00,r0
- mov r0,tbr ; defined in manual
- mov sp,usp
- mov sp,ssp
- .endm
-
-; Exit with return code
- .macro exit rc
- ldi32 \rc,r4
- ldi32 #1,r0
- int #10
- .endm
-
-; Pass the test case
- .macro pass
- ldi32 #5,r6
- ldi32 #passmsg,r5
- ldi32 #1,r4
- ldi32 #5,r0
- int #10
- exit #0
- .endm
-
-; Fail the testcase
- .macro fail
- ldi32 #5,r6
- ldi32 #failmsg,r5
- ldi32 #1,r4
- ldi32 #5,r0
- int #10
- exit #1
- .endm
-
-; Load an immediate value into a general register
-; TODO: use minimal sized insn
- .macro mvi_h_gr val reg
- ldi32 \val,\reg
- .endm
-
-; Load an immediate value into a dedicated register
- .macro mvi_h_dr val reg
- ldi32 \val,r0
- mov r0,\reg
- .endm
-
-; Load a general register into another general register
- .macro mvr_h_gr src targ
- mov \src,\targ
- .endm
-
-; Store an immediate into a word in memory
- .macro mvi_h_mem val addr
- mvi_h_gr \val r4
- mvr_h_mem r4,\addr
- .endm
-
-; Store a register into a word in memory
- .macro mvr_h_mem reg addr
- st \reg,@\addr
- .endm
-
-; Store the current ps on the stack
- .macro save_ps
- st ps,@-r15
- .endm
-
-; Load a word value from memory
- .macro ldmem_h_gr addr reg
- ld @\addr,\reg
- .endm
-
-; Add 2 general registers
- .macro add_h_gr reg1 reg2
- add \reg1,\reg2
- .endm
-
-; Increment a register by and immediate
- .macro inci_h_gr inc reg
- mvi_h_gr \inc,r4
- add r4,\reg
- .endm
-
-; Test the value of an immediate against a general register
- .macro test_h_gr val reg
- .if (\val >= 0) && (\val <= 15)
- cmp \val,\reg
- .else
- .if (\val < 0) && (\val >= -16)
- cmp2 \val,\reg
- .else
- ldi32 \val,r4
- cmp r4,\reg
- .endif
- .endif
- beq test_gr\@
- fail
-test_gr\@:
- .endm
-
-; compare two general registers
- .macro testr_h_gr reg1 reg2
- cmp \reg1,\reg2
- beq testr_gr\@
- fail
-testr_gr\@:
- .endm
-
-; Test the value of an immediate against a dedicated register
- .macro test_h_dr val reg
- mov \reg,r5
- test_h_gr \val r5
- .endm
-
-; Test the value of an general register against a dedicated register
- .macro testr_h_dr gr dr
- mov \dr,r5
- testr_h_gr \gr r5
- .endm
-
-; Compare an immediate with word in memory
- .macro test_h_mem val addr
- ldmem_h_gr \addr r5
- test_h_gr \val r5
- .endm
-
-; Compare a general register with word in memory
- .macro testr_h_mem reg addr
- ldmem_h_gr \addr r5
- testr_h_gr \reg r5
- .endm
-
-; Set the condition codes
- .macro set_cc mask
- andccr 0xf0
- orccr \mask
- .endm
-
-; Set the stack mode
- .macro set_s_user
- orccr 0x20
- .endm
-
- .macro set_s_system
- andccr 0x1f
- .endm
-
-; Test the stack mode
- .macro test_s_user
- mvr_h_gr ps,r0
- mvi_h_gr 0x20,r4
- and r4,r0
- test_h_gr 0x20,r0
- .endm
-
- .macro test_s_system
- mvr_h_gr ps,r0
- mvi_h_gr 0x20,r4
- and r4,r0
- test_h_gr 0x0,r0
- .endm
-
-; Set the interrupt bit
- .macro set_i val
- .if (\val == 1)
- orccr 0x10
- .else
- andccr 0x2f
- .endif
- .endm
-
-; Test the stack mode
- .macro test_i val
- mvr_h_gr ps,r0
- mvi_h_gr 0x10,r4
- and r4,r0
- .if (\val == 1)
- test_h_gr 0x10,r0
- .else
- test_h_gr 0x0,r0
- .endif
- .endm
-
-; Set the ilm
- .macro set_ilm val
- stilm \val
- .endm
-
-; Test the ilm
- .macro test_ilm val
- mvr_h_gr ps,r0
- mvi_h_gr 0x1f0000,r4
- and r4,r0
- mvi_h_gr \val,r5
- mvi_h_gr 0x1f,r4
- and r4,r5
- lsl 15,r5
- lsl 1,r5
- testr_h_gr r0,r5
- .endm
-
-; Test the condition codes
- .macro test_cc N Z V C
- .if (\N == 1)
- bp fail\@
- .else
- bn fail\@
- .endif
- .if (\Z == 1)
- bne fail\@
- .else
- beq fail\@
- .endif
- .if (\V == 1)
- bnv fail\@
- .else
- bv fail\@
- .endif
- .if (\C == 1)
- bnc fail\@
- .else
- bc fail\@
- .endif
- bra test_cc\@
-fail\@:
- fail
-test_cc\@:
- .endm
-
-; Set the division bits
- .macro set_dbits val
- mvr_h_gr ps,r5
- mvi_h_gr 0xfffff8ff,r4
- and r4,r5
- mvi_h_gr \val,r0
- mvi_h_gr 3,r4
- and r4,r0
- lsl 9,r0
- or r0,r5
- mvr_h_gr r5,ps
- .endm
-
-; Test the division bits
- .macro test_dbits val
- mvr_h_gr ps,r0
- lsr 9,r0
- mvi_h_gr 3,r4
- and r4,r0
- test_h_gr \val,r0
- .endm
-
-; Save the return pointer
- .macro save_rp
- st rp,@-R15
- .ENDM
-
-; restore the return pointer
- .macro restore_rp
- ld @R15+,rp
- .endm
-
-; Ensure branch taken
- .macro take_branch opcode
- \opcode take_br\@
- fail
-take_br\@:
- .endm
-
- .macro take_branch_d opcode val
- \opcode take_brd\@
- ldi:8 \val,r0
- fail
-take_brd\@:
- test_h_gr \val,r0
- .endm
-
-; Ensure branch not taken
- .macro no_branch opcode
- \opcode no_brf\@
- bra no_brs\@
-no_brf\@:
- fail
-no_brs\@:
- .endm
-
- .macro no_branch_d opcode val
- \opcode no_brdf\@
- ldi:8 \val,r0
- bra no_brds\@
-no_brdf\@:
- fail
-no_brds\@:
- test_h_gr \val,r0
- .endm
-
diff --git a/sim/testsuite/sim/fr30/xchb.cgs b/sim/testsuite/sim/fr30/xchb.cgs
deleted file mode 100644
index 3450a2e34cd..00000000000
--- a/sim/testsuite/sim/fr30/xchb.cgs
+++ /dev/null
@@ -1,20 +0,0 @@
-# fr30 testcase for xchb @$Rj,Ri
-# mach(): fr30
-
- .include "testutils.inc"
-
- START
-
- .text
- .global xchb
-xchb:
- ; Test xchb @$Rj,Ri
- mvi_h_mem 0xdeadbeef,sp
- mvi_h_gr 0xbeefdead,r0
- set_cc 0x0f ; Condition codes are irrelevent
- xchb @sp,r0
- test_cc 1 1 1 1
- test_h_gr 0xde,r0
- test_h_mem 0xadadbeef,sp
-
- pass
diff --git a/sim/testsuite/sim/m32r/add.cgs b/sim/testsuite/sim/m32r/add.cgs
deleted file mode 100644
index 8ed2b3a2ad3..00000000000
--- a/sim/testsuite/sim/m32r/add.cgs
+++ /dev/null
@@ -1,16 +0,0 @@
-# m32r testcase for add $dr,$sr
-# mach(): m32r m32rx
-
- .include "testutils.inc"
-
- start
-
- .global add
-add:
-
- mvi_h_gr r4, 1
- mvi_h_gr r5, 2
- add r4, r5
- test_h_gr r4, 3
-
- pass
diff --git a/sim/testsuite/sim/m32r/add3.cgs b/sim/testsuite/sim/m32r/add3.cgs
deleted file mode 100644
index d1cc8480ad4..00000000000
--- a/sim/testsuite/sim/m32r/add3.cgs
+++ /dev/null
@@ -1,15 +0,0 @@
-# m32r testcase for add3 $dr,$sr,#$slo16
-# mach(): m32r m32rx
-
- .include "testutils.inc"
-
- start
-
- .global add3
-add3:
-
- mvi_h_gr r5, 1
- add3 r4, r5, 2
- test_h_gr r4, 3
-
- pass
diff --git a/sim/testsuite/sim/m32r/addi.cgs b/sim/testsuite/sim/m32r/addi.cgs
deleted file mode 100644
index 1448d0d2e2b..00000000000
--- a/sim/testsuite/sim/m32r/addi.cgs
+++ /dev/null
@@ -1,16 +0,0 @@
-# m32r testcase for addi $dr,#$simm8
-# mach(): m32r m32rx
-
- .include "testutils.inc"
-
- start
-
- .global addi
-addi:
-
- mvi_h_gr r5, 1
- addi r5, 2
- test_h_gr r5, 3
-
- pass
-
diff --git a/sim/testsuite/sim/m32r/addv.cgs b/sim/testsuite/sim/m32r/addv.cgs
deleted file mode 100644
index 704be83c914..00000000000
--- a/sim/testsuite/sim/m32r/addv.cgs
+++ /dev/null
@@ -1,21 +0,0 @@
-# m32r testcase for addv $dr,$sr
-# mach(): m32r m32rx
-
- .include "testutils.inc"
-
- start
-
- .global addv
-addv:
- mvi_h_condbit 0
- mvi_h_gr r4, 0x80000000
- mvi_h_gr r5, 0x80000000
-
- addv r4, r5
-
- bnc not_ok
- test_h_gr r4, 0
-
- pass
-not_ok:
- fail
diff --git a/sim/testsuite/sim/m32r/addv3.cgs b/sim/testsuite/sim/m32r/addv3.cgs
deleted file mode 100644
index a8c0a108561..00000000000
--- a/sim/testsuite/sim/m32r/addv3.cgs
+++ /dev/null
@@ -1,28 +0,0 @@
-# m32r testcase for addv3 $dr,$sr,#$simm16
-# mach(): m32r m32rx
-
- .include "testutils.inc"
-
- start
-
- .global addv3
-addv3:
- mvi_h_condbit 0
- mvi_h_gr r4, 1
- mvi_h_gr r5, 1
-
- addv3 r4, r5, #2
-
- bc not_ok
-
- test_h_gr r4, 3
-
- mvi_h_gr r5, 0x7fff8001
-
- addv3 r4, r5, #0x7fff
-
- bnc not_ok
-
- pass
-not_ok:
- fail
diff --git a/sim/testsuite/sim/m32r/addx.cgs b/sim/testsuite/sim/m32r/addx.cgs
deleted file mode 100644
index 630e3dbe15a..00000000000
--- a/sim/testsuite/sim/m32r/addx.cgs
+++ /dev/null
@@ -1,42 +0,0 @@
-# m32r testcase for addx $dr,$sr
-# mach(): m32r m32rx
-# timeout(): 42
-
-# timeout is set to test it
-
- .include "testutils.inc"
-
- start
-
- .global addx
-addx:
- mvi_h_condbit 1
- mvi_h_gr r4, 1
- mvi_h_gr r5, 2
- addx r4, r5
- bc not_ok
- test_h_gr r4, 4
-
- mvi_h_gr r4, 0xfffffffe
- addx r4, r5
- bnc not_ok
- test_h_gr r4, 0
-
- mvi_h_gr r4, -1
- mvi_h_gr r5, -1
- mvi_h_condbit 1
- addx r4,r5
- bnc not_ok
- test_h_gr r4, -1
-
- mvi_h_gr r4,-1
- mvi_h_gr r5,0x7fffffff
- mvi_h_condbit 1
- addx r5,r4
- bnc not_ok
- test_h_gr r5,0x7fffffff
-
- pass
-
-not_ok:
- fail
diff --git a/sim/testsuite/sim/m32r/allinsn.exp b/sim/testsuite/sim/m32r/allinsn.exp
deleted file mode 100644
index 8eed80f91d6..00000000000
--- a/sim/testsuite/sim/m32r/allinsn.exp
+++ /dev/null
@@ -1,21 +0,0 @@
-# M32R simulator testsuite.
-
-if [istarget m32r*-*-*] {
- # load support procs
- # load_lib cgen.exp
-
- # all machines
- set all_machs "m32r"
-
-
- # The .cgs suffix is for "cgen .s".
- foreach src [lsort [glob -nocomplain $srcdir/$subdir/*.cgs]] {
- # If we're only testing specific files and this isn't one of them,
- # skip it.
- if ![runtest_file_p $runtests $src] {
- continue
- }
-
- run_sim_test $src $all_machs
- }
-}
diff --git a/sim/testsuite/sim/m32r/and.cgs b/sim/testsuite/sim/m32r/and.cgs
deleted file mode 100644
index 1c268855411..00000000000
--- a/sim/testsuite/sim/m32r/and.cgs
+++ /dev/null
@@ -1,17 +0,0 @@
-# m32r testcase for and $dr,$sr
-# mach(): m32r m32rx
-
- .include "testutils.inc"
-
- start
-
- .global and
-and:
- mvi_h_gr r4, 3
- mvi_h_gr r5, 6
-
- and r4, r5
-
- test_h_gr r4, 2
-
- pass
diff --git a/sim/testsuite/sim/m32r/and3.cgs b/sim/testsuite/sim/m32r/and3.cgs
deleted file mode 100644
index 395de3028e9..00000000000
--- a/sim/testsuite/sim/m32r/and3.cgs
+++ /dev/null
@@ -1,17 +0,0 @@
-# m32r testcase for and3 $dr,$sr,#$uimm16
-# mach(): m32r m32rx
-
- .include "testutils.inc"
-
- start
-
- .global and3
-and3:
- mvi_h_gr r4, 0
- mvi_h_gr r5, 6
-
- and3 r4, r5, #3
-
- test_h_gr r4, 2
-
- pass
diff --git a/sim/testsuite/sim/m32r/bc24.cgs b/sim/testsuite/sim/m32r/bc24.cgs
deleted file mode 100644
index 6bb43334e8f..00000000000
--- a/sim/testsuite/sim/m32r/bc24.cgs
+++ /dev/null
@@ -1,24 +0,0 @@
-# m32r testcase for bc $disp24
-# mach(): m32r m32rx
-
- .include "testutils.inc"
-
- start
-
- .global bc24
-bc24:
-
- mvi_h_condbit 0
- bc.l test0fail
- bra test0pass
-test0fail:
- fail
-test0pass:
-
- mvi_h_condbit 1
- bc.l test1pass
- fail
-test1pass:
-
- pass
-
diff --git a/sim/testsuite/sim/m32r/bc8.cgs b/sim/testsuite/sim/m32r/bc8.cgs
deleted file mode 100644
index ceb622c1661..00000000000
--- a/sim/testsuite/sim/m32r/bc8.cgs
+++ /dev/null
@@ -1,23 +0,0 @@
-# m32r testcase for bc $disp8
-# mach(): m32r m32rx
-
- .include "testutils.inc"
-
- start
-
- .global bc8
-bc8:
-
- mvi_h_condbit 0
- bc.s test0fail
- bra test0pass
-test0fail:
- fail
-test0pass:
-
- mvi_h_condbit 1
- bc.s test1pass
- fail
-test1pass:
-
- pass
diff --git a/sim/testsuite/sim/m32r/beq.cgs b/sim/testsuite/sim/m32r/beq.cgs
deleted file mode 100644
index c4d6d8bf0aa..00000000000
--- a/sim/testsuite/sim/m32r/beq.cgs
+++ /dev/null
@@ -1,20 +0,0 @@
-# m32r testcase for beq $src1,$src2,$disp16
-# mach(): m32r m32rx
-
- .include "testutils.inc"
-
- start
-
- .global beq
-beq:
- mvi_h_condbit 0
- mvi_h_gr r4, 12
- mvi_h_gr r5, 12
- beq r4, r5, ok
-not_ok:
- fail
-ok:
- mvi_h_gr r5, 11
- beq r4, r5, not_ok
-
- pass
diff --git a/sim/testsuite/sim/m32r/beqz.cgs b/sim/testsuite/sim/m32r/beqz.cgs
deleted file mode 100644
index 654737d3d46..00000000000
--- a/sim/testsuite/sim/m32r/beqz.cgs
+++ /dev/null
@@ -1,18 +0,0 @@
-# m32r testcase for beqz $src2,$disp16
-# mach(): m32r m32rx
-
- .include "testutils.inc"
-
- start
-
- .global beqz
-beqz:
- mvi_h_gr r4, 0
- beqz r4, ok
-not_ok:
- fail
-ok:
- mvi_h_gr r4, 1
- beqz r4, not_ok
-
- pass
diff --git a/sim/testsuite/sim/m32r/bgez.cgs b/sim/testsuite/sim/m32r/bgez.cgs
deleted file mode 100644
index f7031f0edcb..00000000000
--- a/sim/testsuite/sim/m32r/bgez.cgs
+++ /dev/null
@@ -1,18 +0,0 @@
-# m32r testcase for bgez $src2,$disp16
-# mach(): m32r m32rx
-
- .include "testutils.inc"
-
- start
-
- .global bgez
-bgez:
- mvi_h_gr r4, 1
- bgez r4, ok
-not_ok:
- fail
-ok:
- mvi_h_gr r4, -1
- bgez r4, not_ok
-
- pass
diff --git a/sim/testsuite/sim/m32r/bgtz.cgs b/sim/testsuite/sim/m32r/bgtz.cgs
deleted file mode 100644
index 6ab8989c7e0..00000000000
--- a/sim/testsuite/sim/m32r/bgtz.cgs
+++ /dev/null
@@ -1,18 +0,0 @@
-# m32r testcase for bgtz $src2,$disp16
-# mach(): m32r m32rx
-
- .include "testutils.inc"
-
- start
-
- .global bgtz
-bgtz:
- mvi_h_gr r4, 1
- bgtz r4, ok
-not_ok:
- fail
-ok:
- mvi_h_gr r4, 0
- bgtz r4, not_ok
-
- pass
diff --git a/sim/testsuite/sim/m32r/bl24.cgs b/sim/testsuite/sim/m32r/bl24.cgs
deleted file mode 100644
index fd6f0dd69d5..00000000000
--- a/sim/testsuite/sim/m32r/bl24.cgs
+++ /dev/null
@@ -1,18 +0,0 @@
-# m32r testcase for bl $disp24
-# mach(): m32r m32rx
-
- .include "testutils.inc"
-
- start
-
- .global bl24
-bl24:
- bl.l test0pass
-test1fail:
- fail
-
-test0pass:
- mvaddr_h_gr r4, test1fail
- bne r4, r14, test1fail
-
- pass
diff --git a/sim/testsuite/sim/m32r/bl8.cgs b/sim/testsuite/sim/m32r/bl8.cgs
deleted file mode 100644
index d26369853b7..00000000000
--- a/sim/testsuite/sim/m32r/bl8.cgs
+++ /dev/null
@@ -1,18 +0,0 @@
-# m32r testcase for bl $disp8
-# mach(): m32r m32rx
-
- .include "testutils.inc"
-
- start
-
- .global bl8
-bl8:
- bl.s test0pass
-test1fail:
- fail
-
-test0pass:
- mvaddr_h_gr r4, test1fail
- bne r4, r14, test1fail
-
- pass
diff --git a/sim/testsuite/sim/m32r/blez.cgs b/sim/testsuite/sim/m32r/blez.cgs
deleted file mode 100644
index e3d198d93ad..00000000000
--- a/sim/testsuite/sim/m32r/blez.cgs
+++ /dev/null
@@ -1,19 +0,0 @@
-# m32r testcase for blez $src2,$disp16
-# mach(): m32r m32rx
-
- .include "testutils.inc"
-
- start
-
- .global blez
-blez:
- mvi_h_gr r4, 0
- blez r4, test0pass
-test1fail:
- fail
-
-test0pass:
- mvi_h_gr r4, 1
- blez r4, test1fail
-
- pass
diff --git a/sim/testsuite/sim/m32r/bltz.cgs b/sim/testsuite/sim/m32r/bltz.cgs
deleted file mode 100644
index c9377fcaab1..00000000000
--- a/sim/testsuite/sim/m32r/bltz.cgs
+++ /dev/null
@@ -1,19 +0,0 @@
-# m32r testcase for bltz $src2,$disp16
-# mach(): m32r m32rx
-
- .include "testutils.inc"
-
- start
-
- .global bltz
-bltz:
- mvi_h_gr r4, -1
- bltz r4, test0pass
-test1fail:
- fail
-
-test0pass:
- mvi_h_gr r4, 0
- bltz r4, test1fail
-
- pass
diff --git a/sim/testsuite/sim/m32r/bnc24.cgs b/sim/testsuite/sim/m32r/bnc24.cgs
deleted file mode 100644
index 692d2d58436..00000000000
--- a/sim/testsuite/sim/m32r/bnc24.cgs
+++ /dev/null
@@ -1,20 +0,0 @@
-# m32r testcase for bnc $disp24
-# mach(): m32r m32rx
-
- .include "testutils.inc"
-
- start
-
- .global bnc24
-bnc24:
- mvi_h_condbit 0
- bnc.l test0pass
-
-test1fail:
- fail
-test0pass:
-
- mvi_h_condbit 1
- bnc.l test1fail
-
- pass
diff --git a/sim/testsuite/sim/m32r/bnc8.cgs b/sim/testsuite/sim/m32r/bnc8.cgs
deleted file mode 100644
index dae2613cc9f..00000000000
--- a/sim/testsuite/sim/m32r/bnc8.cgs
+++ /dev/null
@@ -1,20 +0,0 @@
-# m32r testcase for bnc $disp8
-# mach(): m32r m32rx
-
- .include "testutils.inc"
-
- start
-
- .global bnc8
-bnc8:
- mvi_h_condbit 0
- bnc.s test0pass
-
-test1fail:
- fail
-
-test0pass:
- mvi_h_condbit 1
- bnc.s test1fail
-
- pass
diff --git a/sim/testsuite/sim/m32r/bne.cgs b/sim/testsuite/sim/m32r/bne.cgs
deleted file mode 100644
index 5e1d7a6ecc5..00000000000
--- a/sim/testsuite/sim/m32r/bne.cgs
+++ /dev/null
@@ -1,20 +0,0 @@
-# m32r testcase for bne $src1,$src2,$disp16
-# mach(): m32r m32rx
-
- .include "testutils.inc"
-
- start
-
- .global bne
-bne:
- mvi_h_gr r4, 1
- mvi_h_gr r5, 2
- bne r4, r5, test0pass
-test1fail:
- fail
-
-test0pass:
- mvi_h_gr r4, 2
- bne r4, r5, test1fail
-
- pass
diff --git a/sim/testsuite/sim/m32r/bnez.cgs b/sim/testsuite/sim/m32r/bnez.cgs
deleted file mode 100644
index 9f102895029..00000000000
--- a/sim/testsuite/sim/m32r/bnez.cgs
+++ /dev/null
@@ -1,19 +0,0 @@
-# m32r testcase for bnez $src2,$disp16
-# mach(): m32r m32rx
-
- .include "testutils.inc"
-
- start
-
- .global bnez
-bnez:
- mvi_h_gr r4, 1
- bnez r4, test0pass
-test1fail:
- fail
-
-test0pass:
- mvi_h_gr r4, 0
- bnez r4, test1fail
-
- pass
diff --git a/sim/testsuite/sim/m32r/bra24.cgs b/sim/testsuite/sim/m32r/bra24.cgs
deleted file mode 100644
index d62d2bf0ec3..00000000000
--- a/sim/testsuite/sim/m32r/bra24.cgs
+++ /dev/null
@@ -1,15 +0,0 @@
-# m32r testcase for bra $disp24
-# mach(): m32r m32rx
-
- .include "testutils.inc"
-
- start
-
- .global bra24
-bra24:
- bra.l ok
-
- fail
-
-ok:
- pass
diff --git a/sim/testsuite/sim/m32r/bra8.cgs b/sim/testsuite/sim/m32r/bra8.cgs
deleted file mode 100644
index f5f50ad2d93..00000000000
--- a/sim/testsuite/sim/m32r/bra8.cgs
+++ /dev/null
@@ -1,14 +0,0 @@
-# m32r testcase for bra $disp8
-# mach(): m32r m32rx
-
- .include "testutils.inc"
-
- start
-
- .global bra8
-bra8:
- bra.s ok
-
- fail
-ok:
- pass
diff --git a/sim/testsuite/sim/m32r/cmp.cgs b/sim/testsuite/sim/m32r/cmp.cgs
deleted file mode 100644
index 6ea67206218..00000000000
--- a/sim/testsuite/sim/m32r/cmp.cgs
+++ /dev/null
@@ -1,23 +0,0 @@
-# m32r testcase for cmp $src1,$src2
-# mach(): m32r m32rx
-
- .include "testutils.inc"
-
- start
-
- .global cmp
-cmp:
- mvi_h_condbit 0
- mvi_h_gr r4, 1
- mvi_h_gr r5, 2
- cmp r4, r5
- bc ok
-not_ok:
- fail
-ok:
- mvi_h_condbit 1
- mvi_h_gr r4, 2
- cmp r4, r5
- bc not_ok
-
- pass
diff --git a/sim/testsuite/sim/m32r/cmpi.cgs b/sim/testsuite/sim/m32r/cmpi.cgs
deleted file mode 100644
index af11283d68d..00000000000
--- a/sim/testsuite/sim/m32r/cmpi.cgs
+++ /dev/null
@@ -1,24 +0,0 @@
-# m32r testcase for cmpi $src2,#$simm16
-# mach(): m32r m32rx
-
- .include "testutils.inc"
-
- start
-
- .global cmpi
-cmpi:
- mvi_h_condbit 0
- mvi_h_gr r4, 1
-
- cmpi r4, #2
- bc ok
-not_ok:
- fail
-ok:
- mvi_h_condbit 1
- mvi_h_gr r4, 2
- cmpi r4, #2
- bc not_ok
-
-
- pass
diff --git a/sim/testsuite/sim/m32r/cmpu.cgs b/sim/testsuite/sim/m32r/cmpu.cgs
deleted file mode 100644
index e0b4ef10180..00000000000
--- a/sim/testsuite/sim/m32r/cmpu.cgs
+++ /dev/null
@@ -1,23 +0,0 @@
-# m32r testcase for cmpu $src1,$src2
-# mach(): m32r m32rx
-
- .include "testutils.inc"
-
- start
-
- .global cmpu
-cmpu:
- mvi_h_condbit 0
- mvi_h_gr r4, 1
- mvi_h_gr r5, -2
- cmpu r4, r5
- bc ok
-not_ok:
- fail
-ok:
- mvi_h_condbit 1
- mvi_h_gr r4, -1
- cmpu r4, r5
- bc not_ok
-
- pass
diff --git a/sim/testsuite/sim/m32r/cmpui.cgs b/sim/testsuite/sim/m32r/cmpui.cgs
deleted file mode 100644
index aa30207d933..00000000000
--- a/sim/testsuite/sim/m32r/cmpui.cgs
+++ /dev/null
@@ -1,22 +0,0 @@
-# m32r testcase for cmpui $src2,#$simm16
-# mach(): m32r m32rx
-
- .include "testutils.inc"
-
- start
-
- .global cmpui
-cmpui:
- mvi_h_condbit 0
- mvi_h_gr r4, 1
- cmpui r4, #2
- bc ok
-not_ok:
- fail
-ok:
- mvi_h_condbit 1
- mvi_h_gr r4, -1
- cmpui r4, #2
- bc not_ok
-
- pass
diff --git a/sim/testsuite/sim/m32r/div.cgs b/sim/testsuite/sim/m32r/div.cgs
deleted file mode 100644
index 733f3629680..00000000000
--- a/sim/testsuite/sim/m32r/div.cgs
+++ /dev/null
@@ -1,17 +0,0 @@
-# m32r testcase for div $dr,$sr
-# mach(): m32r m32rx
-
- .include "testutils.inc"
-
- start
-
- .global div
-div:
- mvi_h_gr r4, 0x18000
- mvi_h_gr r5, 8
-
- div r4, r5
-
- test_h_gr r4, 0x3000
-
- pass
diff --git a/sim/testsuite/sim/m32r/divu.cgs b/sim/testsuite/sim/m32r/divu.cgs
deleted file mode 100644
index 25342d5dccc..00000000000
--- a/sim/testsuite/sim/m32r/divu.cgs
+++ /dev/null
@@ -1,17 +0,0 @@
-# m32r testcase for divu $dr,$sr
-# mach(): m32r m32rx
-
- .include "testutils.inc"
-
- start
-
- .global divu
-divu:
- mvi_h_gr r4, 0x18000
- mvi_h_gr r5, 8
-
- divu r4, r5
-
- test_h_gr r4, 0x3000
-
- pass
diff --git a/sim/testsuite/sim/m32r/hello.ms b/sim/testsuite/sim/m32r/hello.ms
deleted file mode 100644
index 7ae22778001..00000000000
--- a/sim/testsuite/sim/m32r/hello.ms
+++ /dev/null
@@ -1,19 +0,0 @@
-# output(): Hello world!\n
-# mach(): m32r m32rx
-
- .globl _start
-_start:
-
-; write (hello world)
- ldi8 r3,#14
- ld24 r2,#hello
- ldi8 r1,#1
- ldi8 r0,#5
- trap #0
-; exit (0)
- ldi8 r1,#0
- ldi8 r0,#1
- trap #0
-
-length: .long 14
-hello: .ascii "Hello world!\r\n"
diff --git a/sim/testsuite/sim/m32r/hw-trap.ms b/sim/testsuite/sim/m32r/hw-trap.ms
deleted file mode 100644
index 2aa200b5d70..00000000000
--- a/sim/testsuite/sim/m32r/hw-trap.ms
+++ /dev/null
@@ -1,31 +0,0 @@
-# mach(): m32r m32rx
-# output(): pass\n
-
- .include "testutils.inc"
-
- start
-
-; construct bra trap2_handler in trap 2 slot
- ld24 r0,#bra_insn
- ld r0,@r0
- ld24 r1,#trap2_handler
- addi r1,#-0x48 ; pc relative address from trap 2 slot to handler
- srai r1,#2
- or r0,r1
- ld24 r2,#0x48 ; address of trap 2 slot
- st r0,@r2
-
-; perform trap
- ldi r4,#0
- trap #2
- test_h_gr r4,42
-
- pass
-
-; trap 2 handler
-trap2_handler:
- ldi r4,#42
- rte
-
-bra_insn:
- bra.l 0
diff --git a/sim/testsuite/sim/m32r/jl.cgs b/sim/testsuite/sim/m32r/jl.cgs
deleted file mode 100644
index a89c26a86bf..00000000000
--- a/sim/testsuite/sim/m32r/jl.cgs
+++ /dev/null
@@ -1,18 +0,0 @@
-# m32r testcase for jl $sr
-# mach(): m32r m32rx
-
- .include "testutils.inc"
-
- start
-
- .global jl
-jl:
- mvaddr_h_gr r4, ok
- jl r4
-not_ok:
- fail
-ok:
- mvaddr_h_gr r4, not_ok
- bne r4, r14, not_ok
-
- pass
diff --git a/sim/testsuite/sim/m32r/jmp.cgs b/sim/testsuite/sim/m32r/jmp.cgs
deleted file mode 100644
index ba0864a53f0..00000000000
--- a/sim/testsuite/sim/m32r/jmp.cgs
+++ /dev/null
@@ -1,19 +0,0 @@
-# m32r testcase for jmp $sr
-# mach(): m32r m32rx
-
- .include "testutils.inc"
-
- start
-
- .global jmp
-jmp:
- mvaddr_h_gr r4, ok1
- jmp r4
- fail
-ok1:
- mvaddr_h_gr r4, ok2
- addi r4,#1
- jmp r4
- fail
-ok2:
- pass
diff --git a/sim/testsuite/sim/m32r/ld-d.cgs b/sim/testsuite/sim/m32r/ld-d.cgs
deleted file mode 100644
index 151743672b2..00000000000
--- a/sim/testsuite/sim/m32r/ld-d.cgs
+++ /dev/null
@@ -1,22 +0,0 @@
-# m32r testcase for ld $dr,@($slo16,$sr)
-# mach(): m32r m32rx
-
- .include "testutils.inc"
-
- start
-
- .global ld_d
-ld_d:
- mvaddr_h_gr r4, data_loc
- mvi_h_gr r5, 0
-
- ld r5, @(#4, r4)
-
- test_h_gr r5, 0x12345678
-
- pass
-
-data_loc:
- .word 0x11223344
- .word 0x12345678
-
diff --git a/sim/testsuite/sim/m32r/ld-plus.cgs b/sim/testsuite/sim/m32r/ld-plus.cgs
deleted file mode 100644
index 5feaf62596e..00000000000
--- a/sim/testsuite/sim/m32r/ld-plus.cgs
+++ /dev/null
@@ -1,28 +0,0 @@
-# m32r testcase for ld $dr,@$sr+
-# mach(): m32r m32rx
-
- .include "testutils.inc"
-
- start
-
- .global ld_plus
-ld_plus:
- mvaddr_h_gr r4, data_loc
- mvi_h_gr r5, 0
-
- ld r5, @r4+
-
- test_h_gr r5, 0x12345678
-
- mvaddr_h_gr r5, data_loc2
- bne r4, r5, not_ok
-
- pass
-not_ok:
- fail
-
-data_loc:
- .word 0x12345678
-data_loc2:
- .word 0x11223344
-
diff --git a/sim/testsuite/sim/m32r/ld.cgs b/sim/testsuite/sim/m32r/ld.cgs
deleted file mode 100644
index ad0b86ff6d5..00000000000
--- a/sim/testsuite/sim/m32r/ld.cgs
+++ /dev/null
@@ -1,21 +0,0 @@
-# m32r testcase for ld $dr,@$sr
-# mach(): m32r m32rx
-
- .include "testutils.inc"
-
- start
-
- .global ld
-ld:
- mvaddr_h_gr r4, data_loc
- mvi_h_gr r5, 0
-
- ld r5, @r4
-
- test_h_gr r5, 0x12345678
-
- pass
-
-data_loc:
- .word 0x12345678
-
diff --git a/sim/testsuite/sim/m32r/ld24.cgs b/sim/testsuite/sim/m32r/ld24.cgs
deleted file mode 100644
index 74b155518c8..00000000000
--- a/sim/testsuite/sim/m32r/ld24.cgs
+++ /dev/null
@@ -1,14 +0,0 @@
-# m32r testcase for ld24 $dr,#$uimm24
-# mach(): m32r m32rx
-
- .include "testutils.inc"
-
- start
-
- .global ld24
-ld24:
- ld24 r4, #0x123456
-
- test_h_gr r4, 0x123456
-
- pass
diff --git a/sim/testsuite/sim/m32r/ldb-d.cgs b/sim/testsuite/sim/m32r/ldb-d.cgs
deleted file mode 100644
index 4a1cebb1fc3..00000000000
--- a/sim/testsuite/sim/m32r/ldb-d.cgs
+++ /dev/null
@@ -1,20 +0,0 @@
-# m32r testcase for ldb $dr,@($slo16,$sr)
-# mach(): m32r m32rx
-
- .include "testutils.inc"
-
- start
-
- .global ldb_d
-ldb_d:
- mvaddr_h_gr r4, data_loc
- mvi_h_gr r5, 0
-
- ldb r5, @(#2, r4)
-
- test_h_gr r5, 0x56 ; big endian processor
-
- pass
-
-data_loc:
- .word 0x12345678
diff --git a/sim/testsuite/sim/m32r/ldb.cgs b/sim/testsuite/sim/m32r/ldb.cgs
deleted file mode 100644
index 9b895450f08..00000000000
--- a/sim/testsuite/sim/m32r/ldb.cgs
+++ /dev/null
@@ -1,21 +0,0 @@
-# m32r testcase for ldb $dr,@$sr
-# mach(): m32r m32rx
-
- .include "testutils.inc"
-
- start
-
- .global ldb
-ldb:
- mvaddr_h_gr r4, data_loc
- mvi_h_gr r5, 0
-
- ldb r5, @r4
-
- test_h_gr r5, 0x12 ; big endian processor
-
- pass
-
-data_loc:
- .word 0x12345678
-
diff --git a/sim/testsuite/sim/m32r/ldh-d.cgs b/sim/testsuite/sim/m32r/ldh-d.cgs
deleted file mode 100644
index 0be0309b1ef..00000000000
--- a/sim/testsuite/sim/m32r/ldh-d.cgs
+++ /dev/null
@@ -1,21 +0,0 @@
-# m32r testcase for ldh $dr,@($slo16,$sr)
-# mach(): m32r m32rx
-
- .include "testutils.inc"
-
- start
-
- .global ldh_d
-ldh_d:
- mvaddr_h_gr r4, data_loc
- mvi_h_gr r5, 0
-
- ldh r5, @(#2, r4)
-
- test_h_gr r5, 0x5678 ; big endian processor
-
- pass
-
-data_loc:
- .word 0x12345678
-
diff --git a/sim/testsuite/sim/m32r/ldh.cgs b/sim/testsuite/sim/m32r/ldh.cgs
deleted file mode 100644
index 3d8db953d3d..00000000000
--- a/sim/testsuite/sim/m32r/ldh.cgs
+++ /dev/null
@@ -1,22 +0,0 @@
-# m32r testcase for ldh $dr,@$sr
-# mach(): m32r m32rx
-
- .include "testutils.inc"
-
- start
-
- .global ldh
-ldh:
- mvaddr_h_gr r4, data_loc
- mvi_h_gr r5, 0
-
- ldh r5, @r4
-
- test_h_gr r5, 0x1234 ; big endian processor
-
- pass
-
-data_loc:
- .word 0x12345678
-
- pass
diff --git a/sim/testsuite/sim/m32r/ldi16.cgs b/sim/testsuite/sim/m32r/ldi16.cgs
deleted file mode 100644
index 478df1c1b32..00000000000
--- a/sim/testsuite/sim/m32r/ldi16.cgs
+++ /dev/null
@@ -1,14 +0,0 @@
-# m32r testcase for ldi $dr,$slo16
-# mach(): m32r m32rx
-
- .include "testutils.inc"
-
- start
-
- .global ldi16
-ldi16:
- ldi r4, #0x1234
-
- test_h_gr r4, 0x1234
-
- pass
diff --git a/sim/testsuite/sim/m32r/ldi8.cgs b/sim/testsuite/sim/m32r/ldi8.cgs
deleted file mode 100644
index 081e7a86f35..00000000000
--- a/sim/testsuite/sim/m32r/ldi8.cgs
+++ /dev/null
@@ -1,14 +0,0 @@
-# m32r testcase for ldi $dr,#$simm8
-# mach(): m32r m32rx
-
- .include "testutils.inc"
-
- start
-
- .global ldi8
-ldi8:
- ldi r4, #0x78
-
- test_h_gr r4, 0x78
-
- pass
diff --git a/sim/testsuite/sim/m32r/ldub-d.cgs b/sim/testsuite/sim/m32r/ldub-d.cgs
deleted file mode 100644
index 7661071b820..00000000000
--- a/sim/testsuite/sim/m32r/ldub-d.cgs
+++ /dev/null
@@ -1,21 +0,0 @@
-# m32r testcase for ldub $dr,@($slo16,$sr)
-# mach(): m32r m32rx
-
- .include "testutils.inc"
-
- start
-
- .global ldub_d
-ldub_d:
- mvaddr_h_gr r4, data_loc
- mvi_h_gr r5, 0
-
- ldub r5, @(#2, r4)
-
- test_h_gr r5, 0xa0 ; big endian processor
-
- pass
-
-data_loc:
- .word 0x8090a0b0
-
diff --git a/sim/testsuite/sim/m32r/ldub.cgs b/sim/testsuite/sim/m32r/ldub.cgs
deleted file mode 100644
index 27913b51f59..00000000000
--- a/sim/testsuite/sim/m32r/ldub.cgs
+++ /dev/null
@@ -1,21 +0,0 @@
-# m32r testcase for ldub $dr,@$sr
-# mach(): m32r m32rx
-
- .include "testutils.inc"
-
- start
-
- .global ldub
-ldub:
- mvaddr_h_gr r4, data_loc
- mvi_h_gr r5, 0
-
- ldub r5, @r4
-
- test_h_gr r5, 0x80 ; big endian processor
-
- pass
-
-data_loc:
- .word 0x800000f0
-
diff --git a/sim/testsuite/sim/m32r/lduh-d.cgs b/sim/testsuite/sim/m32r/lduh-d.cgs
deleted file mode 100644
index 96e294f0ec8..00000000000
--- a/sim/testsuite/sim/m32r/lduh-d.cgs
+++ /dev/null
@@ -1,20 +0,0 @@
-# m32r testcase for lduh $dr,@($slo16,$sr)
-# mach(): m32r m32rx
-
- .include "testutils.inc"
-
- start
-
- .global lduh_d
-lduh_d:
- mvaddr_h_gr r4, data_loc
- mvi_h_gr r5, 0
-
- lduh r5, @(#2, r4)
-
- test_h_gr r5, 0xf000 ; big endian processor
-
- pass
-
-data_loc:
- .word 0x8000f000
diff --git a/sim/testsuite/sim/m32r/lduh.cgs b/sim/testsuite/sim/m32r/lduh.cgs
deleted file mode 100644
index a03bbee240d..00000000000
--- a/sim/testsuite/sim/m32r/lduh.cgs
+++ /dev/null
@@ -1,22 +0,0 @@
-# m32r testcase for lduh $dr,@$sr
-# mach(): m32r m32rx
-
- .include "testutils.inc"
-
- start
-
- .global lduh
-lduh:
- mvaddr_h_gr r4, data_loc
- mvi_h_gr r5, 0
-
- lduh r5, @r4
-
- test_h_gr r5, 0x8010 ; big endian processor
-
- pass
-
-data_loc:
- .word 0x8010f020
-
- pass
diff --git a/sim/testsuite/sim/m32r/lock.cgs b/sim/testsuite/sim/m32r/lock.cgs
deleted file mode 100644
index 631525ebbbf..00000000000
--- a/sim/testsuite/sim/m32r/lock.cgs
+++ /dev/null
@@ -1,25 +0,0 @@
-# m32r testcase for lock $dr,@$sr
-# mach(): m32r m32rx
-
- .include "testutils.inc"
-
- start
-
- .global lock
-lock:
- mvaddr_h_gr r4, data_loc
- mvi_h_gr r5, 0
-
- lock r5, @r4
-
- test_h_gr r5, 0x12345678
-
- ; There is no way to test the lock bit
-
- unlock r5, @r4 ; Unlock the processor
-
- pass
-
-data_loc:
- .word 0x12345678
-
diff --git a/sim/testsuite/sim/m32r/machi.cgs b/sim/testsuite/sim/m32r/machi.cgs
deleted file mode 100644
index 2e2ef00294c..00000000000
--- a/sim/testsuite/sim/m32r/machi.cgs
+++ /dev/null
@@ -1,17 +0,0 @@
-# m32r testcase for machi $src1,$src2
-# mach(): m32r m32rx
-
- .include "testutils.inc"
-
- start
-
- .global machi
-machi:
-
- mvi_h_accum0 0, 1
- mvi_h_gr r4, 0x10123
- mvi_h_gr r5, 0x20456
- machi r4, r5
- test_h_accum0 0, 0x20001
-
- pass
diff --git a/sim/testsuite/sim/m32r/maclo.cgs b/sim/testsuite/sim/m32r/maclo.cgs
deleted file mode 100644
index 5d035394dc4..00000000000
--- a/sim/testsuite/sim/m32r/maclo.cgs
+++ /dev/null
@@ -1,17 +0,0 @@
-# m32r testcase for maclo $src1,$src2
-# mach(): m32r m32rx
-
- .include "testutils.inc"
-
- start
-
- .global maclo
-maclo:
-
- mvi_h_accum0 0, 1
- mvi_h_gr r4, 0x1230001
- mvi_h_gr r5, 0x4560002
- maclo r4, r5
- test_h_accum0 0, 0x20001
-
- pass
diff --git a/sim/testsuite/sim/m32r/macwhi.cgs b/sim/testsuite/sim/m32r/macwhi.cgs
deleted file mode 100644
index 9ee7a5b0bb9..00000000000
--- a/sim/testsuite/sim/m32r/macwhi.cgs
+++ /dev/null
@@ -1,18 +0,0 @@
-# m32r testcase for macwhi $src1,$src2
-# mach(): m32r m32rx
-
- .include "testutils.inc"
-
- start
-
- .global macwhi
-macwhi:
- mvi_h_accum0 0, 1
- mvi_h_gr r4, 0x10123
- mvi_h_gr r5, 0x20456
-
- macwhi r4, r5
-
- test_h_accum0 0, 0x20247
-
- pass
diff --git a/sim/testsuite/sim/m32r/macwlo.cgs b/sim/testsuite/sim/m32r/macwlo.cgs
deleted file mode 100644
index a7ce4edac5c..00000000000
--- a/sim/testsuite/sim/m32r/macwlo.cgs
+++ /dev/null
@@ -1,18 +0,0 @@
-# m32r testcase for macwlo $src1,$src2
-# mach(): m32r m32rx
-
- .include "testutils.inc"
-
- start
-
- .global macwlo
-macwlo:
- mvi_h_accum0 0, 1
- mvi_h_gr r4, 0x10123
- mvi_h_gr r5, 0x40002
-
- macwlo r4, r5
-
- test_h_accum0 0, 0x20247
-
- pass
diff --git a/sim/testsuite/sim/m32r/misc.exp b/sim/testsuite/sim/m32r/misc.exp
deleted file mode 100644
index 6ed5638ab29..00000000000
--- a/sim/testsuite/sim/m32r/misc.exp
+++ /dev/null
@@ -1,21 +0,0 @@
-# Miscellaneous M32R simulator testcases
-
-if [istarget m32r*-*-*] {
- # load support procs
- # load_lib cgen.exp
-
- # all machines
- set all_machs "m32r"
-
-
- # The .ms suffix is for "miscellaneous .s".
- foreach src [lsort [glob -nocomplain $srcdir/$subdir/*.ms]] {
- # If we're only testing specific files and this isn't one of them,
- # skip it.
- if ![runtest_file_p $runtests $src] {
- continue
- }
-
- run_sim_test $src $all_machs
- }
-}
diff --git a/sim/testsuite/sim/m32r/mul.cgs b/sim/testsuite/sim/m32r/mul.cgs
deleted file mode 100644
index c78f24b8117..00000000000
--- a/sim/testsuite/sim/m32r/mul.cgs
+++ /dev/null
@@ -1,17 +0,0 @@
-# m32r testcase for mul $dr,$sr
-# mach(): m32r m32rx
-
- .include "testutils.inc"
-
- start
-
- .global mul
-mul:
- mvi_h_gr r4, 3
- mvi_h_gr r5, 7
-
- mul r5, r4
-
- test_h_gr r5, 21
-
- pass
diff --git a/sim/testsuite/sim/m32r/mulhi.cgs b/sim/testsuite/sim/m32r/mulhi.cgs
deleted file mode 100644
index 77c103d6f36..00000000000
--- a/sim/testsuite/sim/m32r/mulhi.cgs
+++ /dev/null
@@ -1,16 +0,0 @@
-# m32r testcase for mulhi $src1,$src2
-# mach(): m32r m32rx
-
- .include "testutils.inc"
-
- start
-
- .global mulhi
-mulhi:
-
- mvi_h_gr r4, 0x40000
- mvi_h_gr r5, 0x50000
- mulhi r4, r5
- test_h_accum0 0, 0x140000
-
- pass
diff --git a/sim/testsuite/sim/m32r/mullo.cgs b/sim/testsuite/sim/m32r/mullo.cgs
deleted file mode 100644
index 11aadff3794..00000000000
--- a/sim/testsuite/sim/m32r/mullo.cgs
+++ /dev/null
@@ -1,16 +0,0 @@
-# m32r testcase for mullo $src1,$src2
-# mach(): m32r m32rx
-
- .include "testutils.inc"
-
- start
-
- .global mullo
-mullo:
-
- mvi_h_gr r4, 4
- mvi_h_gr r5, 5
- mullo r4, r5
- test_h_accum0 0, 0x140000
-
- pass
diff --git a/sim/testsuite/sim/m32r/mulwhi.cgs b/sim/testsuite/sim/m32r/mulwhi.cgs
deleted file mode 100644
index eb18562d9e7..00000000000
--- a/sim/testsuite/sim/m32r/mulwhi.cgs
+++ /dev/null
@@ -1,18 +0,0 @@
-# m32r testcase for mulwhi $src1,$src2
-# mach(): m32r m32rx
-
- .include "testutils.inc"
-
- start
-
- .global mulwhi
-mulwhi:
- mvi_h_accum0 0, 1
- mvi_h_gr r4, 0x10123
- mvi_h_gr r5, 0x20456
-
- mulwhi r4, r5
-
- test_h_accum0 0, 0x20246
-
- pass
diff --git a/sim/testsuite/sim/m32r/mulwlo.cgs b/sim/testsuite/sim/m32r/mulwlo.cgs
deleted file mode 100644
index d22c26827cd..00000000000
--- a/sim/testsuite/sim/m32r/mulwlo.cgs
+++ /dev/null
@@ -1,18 +0,0 @@
-# m32r testcase for mulwlo $src1,$src2
-# mach(): m32r m32rx
-
- .include "testutils.inc"
-
- start
-
- .global mulwlo
-mulwlo:
- mvi_h_accum0 0, 1
- mvi_h_gr r4, 0x10123
- mvi_h_gr r5, 0x40002
-
- mulwlo r4, r5
-
- test_h_accum0 0, 0x20246
-
- pass
diff --git a/sim/testsuite/sim/m32r/mv.cgs b/sim/testsuite/sim/m32r/mv.cgs
deleted file mode 100644
index 694569535b7..00000000000
--- a/sim/testsuite/sim/m32r/mv.cgs
+++ /dev/null
@@ -1,17 +0,0 @@
-# m32r testcase for mv $dr,$sr
-# mach(): m32r m32rx
-
- .include "testutils.inc"
-
- start
-
- .global mv
-mv:
- mvi_h_gr r4, 1
- mvi_h_gr r5, 0
-
- mv r5, r4
-
- test_h_gr r5, 1
-
- pass
diff --git a/sim/testsuite/sim/m32r/mvfachi.cgs b/sim/testsuite/sim/m32r/mvfachi.cgs
deleted file mode 100644
index 0222e1b9118..00000000000
--- a/sim/testsuite/sim/m32r/mvfachi.cgs
+++ /dev/null
@@ -1,22 +0,0 @@
-# m32r testcase for mvfachi $dr
-# mach(): m32r m32rx
-
- .include "testutils.inc"
-
- start
-
- .global mvfachi
-mvfachi:
- mvi_h_accum0 0x11223344, 0x55667788
- mvi_h_gr r4, 0
-
- mvfachi r4
- test_h_gr r4, 0x223344
-
- mvi_h_accum0 0x99aabbcc, 0x55667788
- mvi_h_gr r4, 0
-
- mvfachi r4
- test_h_gr r4, 0xffaabbcc
-
- pass
diff --git a/sim/testsuite/sim/m32r/mvfaclo.cgs b/sim/testsuite/sim/m32r/mvfaclo.cgs
deleted file mode 100644
index 0a88d849aee..00000000000
--- a/sim/testsuite/sim/m32r/mvfaclo.cgs
+++ /dev/null
@@ -1,17 +0,0 @@
-# m32r testcase for mvfaclo $dr
-# mach(): m32r m32rx
-
- .include "testutils.inc"
-
- start
-
- .global mvfaclo
-mvfaclo:
- mvi_h_accum0 0x11223344, 0x55667788
- mvi_h_gr r4, 0
-
- mvfaclo r4
-
- test_h_gr r4, 0x55667788
-
- pass
diff --git a/sim/testsuite/sim/m32r/mvfacmi.cgs b/sim/testsuite/sim/m32r/mvfacmi.cgs
deleted file mode 100644
index 580bcae9890..00000000000
--- a/sim/testsuite/sim/m32r/mvfacmi.cgs
+++ /dev/null
@@ -1,15 +0,0 @@
-# m32r testcase for mvfacmi $dr
-# mach(): m32r m32rx
-
- .include "testutils.inc"
-
- start
-
- .global mvfacmi
-mvfacmi:
-
- mvi_h_accum0 0x12345678, 0x87654321
- mvfacmi r4
- test_h_gr r4, 0x56788765
-
- pass
diff --git a/sim/testsuite/sim/m32r/mvfc.cgs b/sim/testsuite/sim/m32r/mvfc.cgs
deleted file mode 100644
index ca2470e1e2d..00000000000
--- a/sim/testsuite/sim/m32r/mvfc.cgs
+++ /dev/null
@@ -1,23 +0,0 @@
-# m32r testcase for mvfc $dr,$scr
-# mach(): m32r m32rx
-
- .include "testutils.inc"
-
- start
-
- .global mvfc
-mvfc:
- mvi_h_condbit 0
- mvi_h_gr r4, 1
-
- mvfc r4, cr1
-
- test_h_gr r4, 0
-
- mvi_h_condbit 1
-
- mvfc r4, cr1
-
- test_h_gr r4, 1
-
- pass
diff --git a/sim/testsuite/sim/m32r/mvtachi.cgs b/sim/testsuite/sim/m32r/mvtachi.cgs
deleted file mode 100644
index 6d596169557..00000000000
--- a/sim/testsuite/sim/m32r/mvtachi.cgs
+++ /dev/null
@@ -1,20 +0,0 @@
-# m32r testcase for mvtachi $src1
-# mach(): m32r m32rx
-
- .include "testutils.inc"
-
- start
-
- .global mvtachi
-mvtachi:
- mvi_h_accum0 0, 0
-
- mvi_h_gr r4, 0x11223344
- mvtachi r4
- test_h_accum0 0x223344, 0x0
-
- mvi_h_gr r4, 0x99aabbcc
- mvtachi r4
- test_h_accum0 0xffaabbcc, 0x0
-
- pass
diff --git a/sim/testsuite/sim/m32r/mvtaclo.cgs b/sim/testsuite/sim/m32r/mvtaclo.cgs
deleted file mode 100644
index baafd839acb..00000000000
--- a/sim/testsuite/sim/m32r/mvtaclo.cgs
+++ /dev/null
@@ -1,17 +0,0 @@
-# m32r testcase for mvtaclo $src1
-# mach(): m32r m32rx
-
- .include "testutils.inc"
-
- start
-
- .global mvtaclo
-mvtaclo:
- mvi_h_accum0 0, 0
- mvi_h_gr r4, 0x11223344
-
- mvtaclo r4
-
- test_h_accum0 0, 0x11223344
-
- pass
diff --git a/sim/testsuite/sim/m32r/mvtc.cgs b/sim/testsuite/sim/m32r/mvtc.cgs
deleted file mode 100644
index 94780dfa11a..00000000000
--- a/sim/testsuite/sim/m32r/mvtc.cgs
+++ /dev/null
@@ -1,18 +0,0 @@
-# m32r testcase for mvtc $sr,$dcr
-# mach(): m32r m32rx
-
- .include "testutils.inc"
-
- start
-
- .global mvtc
-mvtc:
- mvi_h_condbit 0
- mvi_h_gr r4, 1
-
- mvtc r4, cr1
- bc ok
-
- fail
-ok:
- pass
diff --git a/sim/testsuite/sim/m32r/neg.cgs b/sim/testsuite/sim/m32r/neg.cgs
deleted file mode 100644
index 6051efaf256..00000000000
--- a/sim/testsuite/sim/m32r/neg.cgs
+++ /dev/null
@@ -1,17 +0,0 @@
-# m32r testcase for neg $dr,$sr
-# mach(): m32r m32rx
-
- .include "testutils.inc"
-
- start
-
- .global neg
-neg:
- mvi_h_gr r4, 1
- mvi_h_gr r5, 2
-
- neg r4, r5
-
- test_h_gr r4, -2
-
- pass
diff --git a/sim/testsuite/sim/m32r/nop.cgs b/sim/testsuite/sim/m32r/nop.cgs
deleted file mode 100644
index e06d656f20e..00000000000
--- a/sim/testsuite/sim/m32r/nop.cgs
+++ /dev/null
@@ -1,11 +0,0 @@
-# m32r testcase for nop
-# mach(): m32r m32rx
-
- .include "testutils.inc"
-
- start
-
- .global nop
-nop:
- nop
- pass
diff --git a/sim/testsuite/sim/m32r/not.cgs b/sim/testsuite/sim/m32r/not.cgs
deleted file mode 100644
index e6ceb643ebf..00000000000
--- a/sim/testsuite/sim/m32r/not.cgs
+++ /dev/null
@@ -1,17 +0,0 @@
-# m32r testcase for not $dr,$sr
-# mach(): m32r m32rx
-
- .include "testutils.inc"
-
- start
-
- .global not
-not:
- mvi_h_gr r4, 1
- mvi_h_gr r5, 2
-
- not r4, r5
-
- test_h_gr r4, 0xfffffffd
-
- pass
diff --git a/sim/testsuite/sim/m32r/or.cgs b/sim/testsuite/sim/m32r/or.cgs
deleted file mode 100644
index 1b08bd0c2a7..00000000000
--- a/sim/testsuite/sim/m32r/or.cgs
+++ /dev/null
@@ -1,17 +0,0 @@
-# m32r testcase for or $dr,$sr
-# mach(): m32r m32rx
-
- .include "testutils.inc"
-
- start
-
- .global or
-or:
- mvi_h_gr r4, 3
- mvi_h_gr r5, 6
-
- or r4, r5
-
- test_h_gr r4, 7
-
- pass
diff --git a/sim/testsuite/sim/m32r/or3.cgs b/sim/testsuite/sim/m32r/or3.cgs
deleted file mode 100644
index dc76ada9333..00000000000
--- a/sim/testsuite/sim/m32r/or3.cgs
+++ /dev/null
@@ -1,17 +0,0 @@
-# m32r testcase for or3 $dr,$sr,#$ulo16
-# mach(): m32r m32rx
-
- .include "testutils.inc"
-
- start
-
- .global or3
-or3:
- mvi_h_gr r4, 0
- mvi_h_gr r5, 6
-
- or3 r4, r5, #3
-
- test_h_gr r4, 7
-
- pass
diff --git a/sim/testsuite/sim/m32r/rac.cgs b/sim/testsuite/sim/m32r/rac.cgs
deleted file mode 100644
index 35b9ae3cd91..00000000000
--- a/sim/testsuite/sim/m32r/rac.cgs
+++ /dev/null
@@ -1,23 +0,0 @@
-# m32r testcase for rac
-# mach(): m32r m32rx
-
- .include "testutils.inc"
-
- start
-
- .global rac
-rac:
-
- mvi_h_accum0 1, 0x4001
- rac
- test_h_accum0 2, 0x10000
-
- mvi_h_accum0 0x3fff, 0xffff4000
- rac
- test_h_accum0 0x7fff, 0xffff0000
-
- mvi_h_accum0 0xffff8000, 0
- rac
- test_h_accum0 0xffff8000, 0
-
- pass
diff --git a/sim/testsuite/sim/m32r/rach.cgs b/sim/testsuite/sim/m32r/rach.cgs
deleted file mode 100644
index c22469834f7..00000000000
--- a/sim/testsuite/sim/m32r/rach.cgs
+++ /dev/null
@@ -1,22 +0,0 @@
-# m32r testcase for rach
-# mach(): m32r m32rx
-
- .include "testutils.inc"
-
- start
-
- .global rach
-rach:
- mvi_h_accum0 1, 0x40004001
- rach
- test_h_accum0 3, 0
-
- mvi_h_accum0 0x3fff, 0xc0000000
- rach
- test_h_accum0 0x7fff, 0
-
- mvi_h_accum0 0xffff8000, 0
- rach
- test_h_accum0 0xffff8000, 0
-
- pass
diff --git a/sim/testsuite/sim/m32r/rem.cgs b/sim/testsuite/sim/m32r/rem.cgs
deleted file mode 100644
index 78c11cbcf90..00000000000
--- a/sim/testsuite/sim/m32r/rem.cgs
+++ /dev/null
@@ -1,17 +0,0 @@
-# m32r testcase for rem $dr,$sr
-# mach(): m32r m32rx
-
- .include "testutils.inc"
-
- start
-
- .global rem
-rem:
- mvi_h_gr r4, 12345678
- mvi_h_gr r5, 7
-
- rem r4, r5
-
- test_h_gr r4, 2
-
- pass
diff --git a/sim/testsuite/sim/m32r/remu.cgs b/sim/testsuite/sim/m32r/remu.cgs
deleted file mode 100644
index 36336306b27..00000000000
--- a/sim/testsuite/sim/m32r/remu.cgs
+++ /dev/null
@@ -1,23 +0,0 @@
-# m32r testcase for remu $dr,$sr
-# mach(): m32r m32rx
-
- .include "testutils.inc"
-
- start
-
- .global remu
-remu:
- mvi_h_gr r4, 17
- mvi_h_gr r5, 7
-
- remu r4, r5
-
- test_h_gr r4, 3
-
- mvi_h_gr r4, -17
-
- remu r4, r5
-
- test_h_gr r4, 1
-
- pass
diff --git a/sim/testsuite/sim/m32r/rte.cgs b/sim/testsuite/sim/m32r/rte.cgs
deleted file mode 100644
index b389fe15431..00000000000
--- a/sim/testsuite/sim/m32r/rte.cgs
+++ /dev/null
@@ -1,87 +0,0 @@
-# m32r testcase for rte
-# mach(): m32r m32rx
-
- .include "testutils.inc"
-
- start
-
- .global rte
-rte:
-
-; Test 1: bbpsw = 0, bpsw = 1, psw = 0
-
- ; bbsm = 0, bie = 0, bbcond = 0
- mvi_h_gr r4, 0
- mvtc r4, cr8
-
- ; bsm = 1, bie = 1, bcond = 1, sm = 0, ie = 0, cond = 0
- mvi_h_gr r4, 0xc100
- mvtc r4, cr0
-
- ; bbpc = 0
- mvaddr_h_gr r4, 0
- mvtc r4, bbpc
-
- ; bpc = ret1
- mvaddr_h_gr r4, ret1
- mvtc r4, bpc
-
- rte
- fail
-
-ret1:
- ; test bbsm = 0, bbie = 0, bbcond = 0
- mvfc r4, cr8
- test_h_gr r4, 0
-
- ; test bsm = 0, bie = 0, bcond = 0, sm = 1, ie = 1, cond = 1
- mvfc r4, cr0
- test_h_gr r4, 0xc1
-
- ; test bbpc = 0
- mvfc r4, bbpc
- test_h_gr r4, 0
-
- ; test bpc = 0
- mvfc r4, bpc
- test_h_gr r4, 0
-
-; Test 2: bbpsw = 1, bpsw = 0, psw = 1
-
- ; bbsm = 1, bie = 1, bbcond = 1
- mvi_h_gr r4, 0xc1
- mvtc r4, cr8
-
- ; bsm = 0, bie = 0, bcond = 0, sm = 1, ie = 1, cond = 1
- mvi_h_gr r4, 0xc1
- mvtc r4, cr0
-
- ; bbpc = 42
- mvaddr_h_gr r4, 42
- mvtc r4, bbpc
-
- ; bpc = ret2 + 2
- mvaddr_h_gr r4, ret2 + 2
- mvtc r4, bpc
-
- rte
- fail
-
-ret2:
- ; test bbsm = 1, bbie = 1, bbcond = 1
- mvfc r4, cr8
- test_h_gr r4, 0xc1
-
- ; test bsm = 1, bie = 1, bcond = 1, sm = 0, ie = 0, cond = 0
- mvfc r4, cr0
- test_h_gr r4, 0xc100
-
- ; test bbpc = 42
- mvfc r4, bbpc
- test_h_gr r4, 42
-
- ; test bpc = 42
- mvfc r4, bpc
- test_h_gr r4, 42
-
- pass
diff --git a/sim/testsuite/sim/m32r/seth.cgs b/sim/testsuite/sim/m32r/seth.cgs
deleted file mode 100644
index aec3230a548..00000000000
--- a/sim/testsuite/sim/m32r/seth.cgs
+++ /dev/null
@@ -1,20 +0,0 @@
-# m32r testcase for seth $dr,#$hi16
-# mach(): m32r m32rx
-
- .include "testutils.inc"
-
- start
-
- .global seth
-seth:
- seth r4, #0x1234
-
- ; do not use test_h_gr macro since this uses seth
-
- srli r4, #16
- ld24 r5, #0x1234
- beq r4, r5, ok
-
- fail
-ok:
- pass
diff --git a/sim/testsuite/sim/m32r/sll.cgs b/sim/testsuite/sim/m32r/sll.cgs
deleted file mode 100644
index fa3cfed8861..00000000000
--- a/sim/testsuite/sim/m32r/sll.cgs
+++ /dev/null
@@ -1,15 +0,0 @@
-# m32r testcase for sll $dr,$sr
-# mach(): m32r m32rx
-
- .include "testutils.inc"
-
- start
-
- .global sll
-sll:
- mvi_h_gr r4, 6
- mvi_h_gr r5, 1
- sll r4, r5
- test_h_gr r4, 12
-
- pass
diff --git a/sim/testsuite/sim/m32r/sll3.cgs b/sim/testsuite/sim/m32r/sll3.cgs
deleted file mode 100644
index ddd360cd111..00000000000
--- a/sim/testsuite/sim/m32r/sll3.cgs
+++ /dev/null
@@ -1,15 +0,0 @@
-# m32r testcase for sll3 $dr,$sr,#$simm16
-# mach(): m32r m32rx
-
- .include "testutils.inc"
-
- start
-
- .global sll3
-sll3:
- mvi_h_gr r4, 1
- mvi_h_gr r5, 6
- sll3 r4, r5, #1
- test_h_gr r4, 12
-
- pass
diff --git a/sim/testsuite/sim/m32r/slli.cgs b/sim/testsuite/sim/m32r/slli.cgs
deleted file mode 100644
index eab77daa695..00000000000
--- a/sim/testsuite/sim/m32r/slli.cgs
+++ /dev/null
@@ -1,14 +0,0 @@
-# m32r testcase for slli $dr,#$uimm5
-# mach(): m32r m32rx
-
- .include "testutils.inc"
-
- start
-
- .global slli
-slli:
- mvi_h_gr r4, 6
- slli r4, #1
- test_h_gr r4, 12
-
- pass
diff --git a/sim/testsuite/sim/m32r/sra.cgs b/sim/testsuite/sim/m32r/sra.cgs
deleted file mode 100644
index 11671ed8658..00000000000
--- a/sim/testsuite/sim/m32r/sra.cgs
+++ /dev/null
@@ -1,16 +0,0 @@
-# m32r testcase for sra $dr,$sr
-# mach(): m32r m32rx
-
- .include "testutils.inc"
-
- start
-
- .global sra
-sra:
-
- mvi_h_gr r4, 0xf0f0f0ff
- mvi_h_gr r5, 4
- sra r4, r5
- test_h_gr r4, 0xff0f0f0f
-
- pass
diff --git a/sim/testsuite/sim/m32r/sra3.cgs b/sim/testsuite/sim/m32r/sra3.cgs
deleted file mode 100644
index 0dd387adf46..00000000000
--- a/sim/testsuite/sim/m32r/sra3.cgs
+++ /dev/null
@@ -1,16 +0,0 @@
-# m32r testcase for sra3 $dr,$sr,#$simm16
-# mach(): m32r m32rx
-
- .include "testutils.inc"
-
- start
-
- .global sra3
-sra3:
-
- mvi_h_gr r4, 0
- mvi_h_gr r5, 0xf0f0f0ff
- sra3 r4, r5, #4
- test_h_gr r4, 0xff0f0f0f
-
- pass
diff --git a/sim/testsuite/sim/m32r/srai.cgs b/sim/testsuite/sim/m32r/srai.cgs
deleted file mode 100644
index 2a1569422a5..00000000000
--- a/sim/testsuite/sim/m32r/srai.cgs
+++ /dev/null
@@ -1,14 +0,0 @@
-# m32r testcase for srai $dr,#$uimm5
-# mach(): m32r m32rx
-
- .include "testutils.inc"
-
- start
-
- .global srai
-srai:
- mvi_h_gr r5, 0xf0f0f0ff
- srai r5, #4
- test_h_gr r5, 0xff0f0f0f
-
- pass
diff --git a/sim/testsuite/sim/m32r/srl.cgs b/sim/testsuite/sim/m32r/srl.cgs
deleted file mode 100644
index 8838c2fbd48..00000000000
--- a/sim/testsuite/sim/m32r/srl.cgs
+++ /dev/null
@@ -1,15 +0,0 @@
-# m32r testcase for srl $dr,$sr
-# mach(): m32r m32rx
-
- .include "testutils.inc"
-
- start
-
- .global srl
-srl:
- mvi_h_gr r4, 6
- mvi_h_gr r5, 1
- srl r4, r5
- test_h_gr r4, 3
-
- pass
diff --git a/sim/testsuite/sim/m32r/srl3.cgs b/sim/testsuite/sim/m32r/srl3.cgs
deleted file mode 100644
index a1dc4840f63..00000000000
--- a/sim/testsuite/sim/m32r/srl3.cgs
+++ /dev/null
@@ -1,15 +0,0 @@
-# m32r testcase for srl3 $dr,$sr,#$simm16
-# mach(): m32r m32rx
-
- .include "testutils.inc"
-
- start
-
- .global srl3
-srl3:
- mvi_h_gr r4, 0
- mvi_h_gr r5, 6
- srl3 r4, r5, #1
- test_h_gr r4, 3
-
- pass
diff --git a/sim/testsuite/sim/m32r/srli.cgs b/sim/testsuite/sim/m32r/srli.cgs
deleted file mode 100644
index f358a768a7f..00000000000
--- a/sim/testsuite/sim/m32r/srli.cgs
+++ /dev/null
@@ -1,15 +0,0 @@
-# m32r testcase for srli $dr,#$uimm5
-# mach(): m32r m32rx
-
- .include "testutils.inc"
-
- start
-
- .global srli
-srli:
- mvi_h_gr r5, 6
- srli r5, #1
- test_h_gr r5, 3
-
-
- pass
diff --git a/sim/testsuite/sim/m32r/st-d.cgs b/sim/testsuite/sim/m32r/st-d.cgs
deleted file mode 100644
index e2668a05c04..00000000000
--- a/sim/testsuite/sim/m32r/st-d.cgs
+++ /dev/null
@@ -1,26 +0,0 @@
-# m32r testcase for st $src1,@($slo16,$src2)
-# mach(): m32r m32rx
-
- .include "testutils.inc"
-
- start
-
- .global st_d
-st_d:
- mvaddr_h_gr r4, data_loc
- mvi_h_gr r5, 1
-
- st r5, @(#8,r4)
-
- mvaddr_h_gr r4, data_loc2
- ld r4, @r4
- test_h_gr r4, 1
-
- pass
-
-data_loc:
- .word 0
- .word 0
-data_loc2:
- .word 0
-
diff --git a/sim/testsuite/sim/m32r/st-minus.cgs b/sim/testsuite/sim/m32r/st-minus.cgs
deleted file mode 100644
index fc90351c389..00000000000
--- a/sim/testsuite/sim/m32r/st-minus.cgs
+++ /dev/null
@@ -1,29 +0,0 @@
-# m32r testcase for st $src1,@-$src2
-# mach(): m32r m32rx
-
- .include "testutils.inc"
-
- start
-
- .global st_minus
-st_minus:
- mvaddr_h_gr r4, data_loc2
- mvi_h_gr r5, 1
-
- st r5, @-r4
-
- mvaddr_h_gr r5, data_loc
-
- bne r4, r5, not_ok
- ld r4, @r4
- test_h_gr r4, 1
-
- pass
-not_ok:
- fail
-
-data_loc:
- .word 0
-data_loc2:
- .word 0
-
diff --git a/sim/testsuite/sim/m32r/st-plus.cgs b/sim/testsuite/sim/m32r/st-plus.cgs
deleted file mode 100644
index 7bb4dd16fe7..00000000000
--- a/sim/testsuite/sim/m32r/st-plus.cgs
+++ /dev/null
@@ -1,28 +0,0 @@
-# m32r testcase for st $src1,@+$src2
-# mach(): m32r m32rx
-
- .include "testutils.inc"
-
- start
-
- .global st_plus
-st_plus:
- mvaddr_h_gr r4, data_loc
- mvi_h_gr r5, 1
-
- st r5, @+r4
-
- mvaddr_h_gr r5, data_loc2
-
- bne r4, r5, not_ok
- ld r4, @r4
- test_h_gr r4, 1
-
- pass
-not_ok:
- fail
-
-data_loc:
- .word 0
-data_loc2:
- .word 0
diff --git a/sim/testsuite/sim/m32r/st.cgs b/sim/testsuite/sim/m32r/st.cgs
deleted file mode 100644
index 9588b8c40c8..00000000000
--- a/sim/testsuite/sim/m32r/st.cgs
+++ /dev/null
@@ -1,21 +0,0 @@
-# m32r testcase for st $src1,@$src2
-# mach(): m32r m32rx
-
- .include "testutils.inc"
-
- start
-
- .global st
-st:
- mvaddr_h_gr r4, data_loc
- mvi_h_gr r5, 1
-
- st r5, @r4
-
- ld r4, @r4
- test_h_gr r4, 1
-
- pass
-
-data_loc:
- .word 0
diff --git a/sim/testsuite/sim/m32r/stb-d.cgs b/sim/testsuite/sim/m32r/stb-d.cgs
deleted file mode 100644
index 37c2d733d72..00000000000
--- a/sim/testsuite/sim/m32r/stb-d.cgs
+++ /dev/null
@@ -1,25 +0,0 @@
-# m32r testcase for stb $src1,@($slo16,$src2)
-# mach(): m32r m32rx
-
- .include "testutils.inc"
-
- start
-
- .global stb_d
-stb_d:
- mvaddr_h_gr r4, data_loc
- mvi_h_gr r5, 0x1234
-
- stb r5, @(#8,r4)
-
- mvaddr_h_gr r4, data_loc2
- ld r4, @r4
- test_h_gr r4, 0x34000000 ; big endian processor
-
- pass
-
-data_loc:
- .word 0
- .word 0
-data_loc2:
- .word 0
diff --git a/sim/testsuite/sim/m32r/stb.cgs b/sim/testsuite/sim/m32r/stb.cgs
deleted file mode 100644
index 01283169023..00000000000
--- a/sim/testsuite/sim/m32r/stb.cgs
+++ /dev/null
@@ -1,21 +0,0 @@
-# m32r testcase for stb $src1,@$src2
-# mach(): m32r m32rx
-
- .include "testutils.inc"
-
- start
-
- .global stb
-stb:
- mvaddr_h_gr r4, data_loc
- mvi_h_gr r5, 0x1234
-
- stb r5, @r4
-
- ld r4, @r4
- test_h_gr r4, 0x34000000 ; big endian processor
-
- pass
-
-data_loc:
- .word 0
diff --git a/sim/testsuite/sim/m32r/sth-d.cgs b/sim/testsuite/sim/m32r/sth-d.cgs
deleted file mode 100644
index 11aaa6d76c1..00000000000
--- a/sim/testsuite/sim/m32r/sth-d.cgs
+++ /dev/null
@@ -1,25 +0,0 @@
-# m32r testcase for sth $src1,@($slo16,$src2)
-# mach(): m32r m32rx
-
- .include "testutils.inc"
-
- start
-
- .global sth_d
-sth_d:
- mvaddr_h_gr r4, data_loc
- mvi_h_gr r5, 0x123456
-
- sth r5, @(#8,r4)
-
- mvaddr_h_gr r4, data_loc2
- ld r4, @r4
- test_h_gr r4, 0x34560000 ; big endian processor
-
- pass
-
-data_loc:
- .word 0
- .word 0
-data_loc2:
- .word 0
diff --git a/sim/testsuite/sim/m32r/sth.cgs b/sim/testsuite/sim/m32r/sth.cgs
deleted file mode 100644
index 1a10fde1ce3..00000000000
--- a/sim/testsuite/sim/m32r/sth.cgs
+++ /dev/null
@@ -1,21 +0,0 @@
-# m32r testcase for sth $src1,@$src2
-# mach(): m32r m32rx
-
- .include "testutils.inc"
-
- start
-
- .global sth
-sth:
- mvaddr_h_gr r4, data_loc
- mvi_h_gr r5, 0x123456
-
- sth r5, @r4
-
- ld r4, @r4
- test_h_gr r4, 0x34560000 ; big endian processor
-
- pass
-
-data_loc:
- .word 0
diff --git a/sim/testsuite/sim/m32r/sub.cgs b/sim/testsuite/sim/m32r/sub.cgs
deleted file mode 100644
index 4d676e58083..00000000000
--- a/sim/testsuite/sim/m32r/sub.cgs
+++ /dev/null
@@ -1,18 +0,0 @@
-# m32r testcase for sub $dr,$sr
-# mach(): m32r m32rx
-
- .include "testutils.inc"
-
- start
-
- .global sub
-sub:
-
- mvi_h_gr r4, 7
- mvi_h_gr r5, 3
-
- sub r4, r5
-
- test_h_gr r4, 4
-
- pass
diff --git a/sim/testsuite/sim/m32r/subv.cgs b/sim/testsuite/sim/m32r/subv.cgs
deleted file mode 100644
index 9474766e55b..00000000000
--- a/sim/testsuite/sim/m32r/subv.cgs
+++ /dev/null
@@ -1,20 +0,0 @@
-# m32r testcase for subv $dr,$sr
-# mach(): m32r m32rx
-
- .include "testutils.inc"
-
- start
-
- .global subv
-subv:
- mvi_h_condbit 0
- mvi_h_gr r4, 0x80000000
- mvi_h_gr r5, 3
-
- subv r4, r5
-
- bc ok
-
- fail
-ok:
- pass
diff --git a/sim/testsuite/sim/m32r/subx.cgs b/sim/testsuite/sim/m32r/subx.cgs
deleted file mode 100644
index e890fcfabd7..00000000000
--- a/sim/testsuite/sim/m32r/subx.cgs
+++ /dev/null
@@ -1,26 +0,0 @@
-# m32r testcase for subx $dr,$sr
-# mach(): m32r m32rx
-
- .include "testutils.inc"
-
- start
-
- .global subx
-subx:
- mvi_h_condbit 1
- mvi_h_gr r4, 6
- mvi_h_gr r5, 4
- subx r4, r5
- bc not_ok
- test_h_gr r4, 1
-
- mvi_h_condbit 1
- mvi_h_gr r4, 4
- mvi_h_gr r5, 4
- subx r4, r5
- bnc not_ok
- test_h_gr r4, 0xffffffff
-
- pass
-not_ok:
- fail
diff --git a/sim/testsuite/sim/m32r/testutils.inc b/sim/testsuite/sim/m32r/testutils.inc
deleted file mode 100644
index 1d8822ae098..00000000000
--- a/sim/testsuite/sim/m32r/testutils.inc
+++ /dev/null
@@ -1,95 +0,0 @@
-# r0-r3 are used as tmps, consider them call clobbered by these macros.
-
- .macro start
- .data
-failmsg:
- .ascii "fail\n"
-passmsg:
- .ascii "pass\n"
- .text
- .global _start
-_start:
- .endm
-
- .macro exit rc
- ldi8 r1, \rc
- ldi8 r0, #1
- trap #0
- .endm
-
- .macro pass
- ldi8 r3, 5
- ld24 r2, passmsg
- ldi8 r1, 1
- ldi8 r0, 5
- trap #0
- exit 0
- .endm
-
- .macro fail
- ldi8 r3, 5
- ld24 r2, failmsg
- ldi8 r1, 1
- ldi8 r0, 5
- trap #0
- exit 1
- .endm
-
- .macro mvi_h_gr reg, val
- .if (\val >= -128) && (\val <= 127)
- ldi8 \reg, \val
- .else
- seth \reg, high(\val)
- or3 \reg, \reg, low(\val)
- .endif
- .endm
-
- .macro mvaddr_h_gr reg, addr
- seth \reg, high(\addr)
- or3 \reg, \reg, low(\addr)
- .endm
-
-# Other macros know this only clobbers r0.
- .macro test_h_gr reg, val
- mvaddr_h_gr r0, \val
- beq \reg, r0, test_gr\@
- fail
-test_gr\@:
- .endm
-
- .macro mvi_h_condbit val
- ldi8 r0, 0
- ldi8 r1, 1
- .if \val
- cmp r0, r1
- .else
- cmp r1, r0
- .endif
- .endm
-
- .macro test_h_condbit val
- .if \val
- bc test_c1\@
- fail
-test_c1\@:
- .else
- bnc test_c0\@
- fail
-test_c0\@:
- .endif
- .endm
-
- .macro mvi_h_accum0 hi, lo
- mvi_h_gr r0, \hi
- mvtachi r0
- mvi_h_gr r0, \lo
- mvtaclo r0
- .endm
-
- .macro test_h_accum0 hi, lo
- mvfachi r1
- test_h_gr r1, \hi
- mvfaclo r1
- test_h_gr r1, \lo
- .endm
-
diff --git a/sim/testsuite/sim/m32r/trap.cgs b/sim/testsuite/sim/m32r/trap.cgs
deleted file mode 100644
index 59e136a0173..00000000000
--- a/sim/testsuite/sim/m32r/trap.cgs
+++ /dev/null
@@ -1,109 +0,0 @@
-# m32r testcase for trap #$uimm4
-# mach(): m32r m32rx
-
- .include "testutils.inc"
-
- start
-
- .global trap
-trap:
-
-; Test 1: bbpsw = 0, bpsw = 1, psw = 0
-
- ; bbsm = 0, bie = 0, bbcond = 0
- mvi_h_gr r4, 0
- mvtc r4, cr8
-
- ; bsm = 1, bie = 1, bcond = 1, sm = 0, ie = 0, cond = 0
- mvi_h_gr r4, 0xc100
- mvtc r4, cr0
-
- ; bbpc = 0
- mvaddr_h_gr r4, 0
- mvtc r4, bbpc
-
- ; bpc = 42
- mvaddr_h_gr r4, 42
- mvtc r4, bpc
-
- ; Copy trap2_handler to trap area of memory.
- ld24 r0,#0x48 ; address of trap 2 handler
- ld24 r1,#trap2_handler
- ld r2,@r1
- st r2,@r0
- ; Set up return address.
- ld24 r5,#trap2_ret1
-
-trap_insn1:
- trap #2
- fail
-
-trap2_ret1:
- ; test bbsm = 1, bbie = 1, bbcond = 1
- mvfc r4, cr8
- test_h_gr r4, 0xc1
-
- ; test bsm = 0, bie = 0, bcond = 0, sm = 0, ie = 0, cond = 0
- mvfc r4, cr0
- test_h_gr r4, 0
-
- ; test bbpc = 42
- mvfc r4, bbpc
- test_h_gr r4, 42
-
- ; test bpc = proper return address
- mvfc r4, bpc
- test_h_gr r4, trap_insn1 + 4
-
-; Test 2: bbpsw = 1, bpsw = 0, psw = 1
-
- ; bbsm = 1, bie = 1, bbcond = 1
- mvi_h_gr r4, 0xc1
- mvtc r4, cr8
-
- ; bsm = 0, bie = 0, bcond = 0, sm = 1, ie = 1, cond = 1
- mvi_h_gr r4, 0xc1
- mvtc r4, cr0
-
- ; bbpc = 42
- mvaddr_h_gr r4, 42
- mvtc r4, bbpc
-
- ; bpc = 0
- mvaddr_h_gr r4, 0
- mvtc r4, bpc
-
- ; Set up return address.
- ld24 r5,#trap2_ret2
-
-trap_insn2:
- trap #2
- fail
-
-trap2_ret2:
- ; test bbsm = 0, bbie = 0, bbcond = 0
- mvfc r4, cr8
- test_h_gr r4, 0
-
- ; test bsm = 1, bie = 1, bcond = 1, sm = 1, ie = 0, cond = 0
- mvfc r4, cr0
- test_h_gr r4, 0xc180
-
- ; test bbpc = 0
- mvfc r4, bbpc
- test_h_gr r4, 0
-
- ; test bpc = proper return address
- mvfc r4, bpc
- test_h_gr r4, trap_insn2 + 4
-
- pass
-
- .data
-
-; Don't use rte as it will undo the effects of trap we're testing.
-
- .p2align 2
-trap2_handler:
- jmp r5
- nop
diff --git a/sim/testsuite/sim/m32r/unlock.cgs b/sim/testsuite/sim/m32r/unlock.cgs
deleted file mode 100644
index 1a51b7ae4cf..00000000000
--- a/sim/testsuite/sim/m32r/unlock.cgs
+++ /dev/null
@@ -1,30 +0,0 @@
-# m32r testcase for unlock $src1,@$src2
-# mach(): m32r m32rx
-
- .include "testutils.inc"
-
- start
-
- .global unlock
-unlock:
- mvaddr_h_gr r4, data_loc
- mvi_h_gr r5, 1
-
- lock r5, @r4
-
- mvi_h_gr r5, 2
- unlock r5, @r4
-
- ld r6, @r4
- test_h_gr r6, 2
-
- mvi_h_gr r5, 0
- unlock r5, @r4 ; This should be a nop since the processor should be unlocked.
-
- ld r6, @r4
- test_h_gr r6, 2
-
- pass
-
-data_loc:
- .word 0
diff --git a/sim/testsuite/sim/m32r/uread16.ms b/sim/testsuite/sim/m32r/uread16.ms
deleted file mode 100644
index 550e99a2dfc..00000000000
--- a/sim/testsuite/sim/m32r/uread16.ms
+++ /dev/null
@@ -1,18 +0,0 @@
-# mach: m32r m32rx
-# xerror:
-# output: *misaligned read*
-
- .include "testutils.inc"
-
- start
-
-; construct bra trap2_handler in trap 2 slot
- ld24 r0,#foo+1
- ldh r0,@r0
- fail
- exit 0
-
-.data
- .p2align 2
-foo:
- .short 42
diff --git a/sim/testsuite/sim/m32r/uread32.ms b/sim/testsuite/sim/m32r/uread32.ms
deleted file mode 100644
index 935c71624e4..00000000000
--- a/sim/testsuite/sim/m32r/uread32.ms
+++ /dev/null
@@ -1,18 +0,0 @@
-# mach: m32r m32rx
-# xerror:
-# output: *misaligned read*
-
- .include "testutils.inc"
-
- start
-
-; construct bra trap2_handler in trap 2 slot
- ld24 r0,#foo+1
- ld r0,@r0
- fail
- exit 0
-
-.data
- .p2align 2
-foo:
- .word 42
diff --git a/sim/testsuite/sim/m32r/uwrite16.ms b/sim/testsuite/sim/m32r/uwrite16.ms
deleted file mode 100644
index 11bfd6ee2a9..00000000000
--- a/sim/testsuite/sim/m32r/uwrite16.ms
+++ /dev/null
@@ -1,18 +0,0 @@
-# mach: m32r m32rx
-# xerror:
-# output: *misaligned write*
-
- .include "testutils.inc"
-
- start
-
-; construct bra trap2_handler in trap 2 slot
- ld24 r0,#foo+1
- sth r0,@r0
- fail
- exit 0
-
-.data
- .p2align 2
-foo:
- .short 42
diff --git a/sim/testsuite/sim/m32r/uwrite32.ms b/sim/testsuite/sim/m32r/uwrite32.ms
deleted file mode 100644
index 495a123b60e..00000000000
--- a/sim/testsuite/sim/m32r/uwrite32.ms
+++ /dev/null
@@ -1,18 +0,0 @@
-# mach: m32r m32rx
-# xerror:
-# output: *misaligned write*
-
- .include "testutils.inc"
-
- start
-
-; construct bra trap2_handler in trap 2 slot
- ld24 r0,#foo+1
- st r0,@r0
- fail
- exit 0
-
-.data
- .p2align 2
-foo:
- .word 42
diff --git a/sim/testsuite/sim/m32r/xor.cgs b/sim/testsuite/sim/m32r/xor.cgs
deleted file mode 100644
index 254da798167..00000000000
--- a/sim/testsuite/sim/m32r/xor.cgs
+++ /dev/null
@@ -1,16 +0,0 @@
-# m32r testcase for xor $dr,$sr
-# mach(): m32r m32rx
-
- .include "testutils.inc"
-
- start
-
- .global xor
-xor:
-
- mvi_h_gr r4, 3
- mvi_h_gr r5, 6
- xor r4, r5
- test_h_gr r4, 5
-
- pass
diff --git a/sim/testsuite/sim/m32r/xor3.cgs b/sim/testsuite/sim/m32r/xor3.cgs
deleted file mode 100644
index eee7269f934..00000000000
--- a/sim/testsuite/sim/m32r/xor3.cgs
+++ /dev/null
@@ -1,16 +0,0 @@
-# m32r testcase for xor3 $dr,$sr,#$uimm16
-# mach(): m32r m32rx
-
- .include "testutils.inc"
-
- start
-
- .global xor3
-xor3:
-
- mvi_h_gr r5, 0
- mvi_h_gr r4, 3
- xor3 r5, r4, #6
- test_h_gr r5, 5
-
- pass
diff --git a/sim/tic80/ChangeLog b/sim/tic80/ChangeLog
deleted file mode 100644
index a98b57dad84..00000000000
--- a/sim/tic80/ChangeLog
+++ /dev/null
@@ -1,662 +0,0 @@
-Tue Jul 4 13:58:43 2000 Andrew Cagney <cagney@b1.cygnus.com>
-
- * tic80.igen: Rename insns. Re-format.
- * tic80.dc: rename dc.
- * tic80.ic: rename ic. Replace ``compute'' with ``cache''.
-
-Wed May 24 14:40:34 2000 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-2000-04-12 Frank Ch. Eigler <fche@redhat.com>
-
- * cpu.h (GPR_CLEAR): New macro.
- (GPR_SET): Removed macro.
-
-Thu Sep 2 18:15:53 1999 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-1999-05-08 Felix Lee <flee@cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Fri May 1 14:41:11 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * insns: Pass correct arguments to sim_engine_abort.
-
-Tue Apr 28 18:33:31 1998 Geoffrey Noer <noer@cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Sun Apr 26 15:31:55 1998 Tom Tromey <tromey@creche>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
- * config.in: Ditto.
-
-Sun Apr 26 15:19:45 1998 Tom Tromey <tromey@cygnus.com>
-
- * acconfig.h: New file.
- * configure.in: Reverted change of Apr 24; use sinclude again.
-
-Fri Apr 24 14:16:40 1998 Tom Tromey <tromey@creche>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
- * config.in: Ditto.
-
-Fri Apr 24 11:18:28 1998 Tom Tromey <tromey@cygnus.com>
-
- * configure.in: Don't call sinclude.
-
-Fri Apr 24 19:43:30 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * ic (rBase, rLink): Make the type a pointer.
-
-Sat Apr 4 20:36:25 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Fri Mar 27 16:15:52 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Wed Mar 25 12:35:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Wed Mar 18 12:38:12 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Wed Mar 11 14:12:56 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * alu.h (IMEM32_IMMED, IMEM32, STORE, MEM): Replace sim_core_*_map
- with read_map, write_map, exec_map resp.
-
-Thu Feb 26 19:08:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-calls.c (sim_info): Delete.
-
-Tue Feb 17 14:35:05 1998 Michael Meissner <meissner@cygnus.com>
-
- * misc.c (tic80_trace_cond_br): Take size/code arguments, and
- decode bcond conditions and bbo/bbz comparison bits.
-
- * cpu.h (tic80_trace_cond_br): Update prototype.
- (TRACE_COND_PR): Take size/code additional arguments.
-
- * insns: (bbo/bbz/bcnd): Update call to TRACE_COND_PR.
-
-Tue Feb 17 12:50:27 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-calls.c (sim_store_register, sim_fetch_register): Pass in
- length parameter. Return -1.
-
-Fri Feb 13 17:11:22 1998 Michael Meissner <meissner@cygnus.com>
-
- * insns ({get,set}_fp_reg): Tic80 floating point is little endian,
- not big endian.
-
- * misc.c (tic80_trace_fpu*): Pass address of sim_fpu structure,
- not the structure itself. Use %g consistantly to print floating
- point.
-
- * cpu.h: (tic80_trace_fpu*): Update prototypes.
-
-Tue Feb 3 16:25:47 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * alu.h (IMEM32, IMEM32_IMMED): Rename IMEM and IMEM_IMMED so that
- in sync with recent igen change.
-
-Sun Feb 1 16:47:51 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Sat Jan 31 18:15:41 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Fri Jan 30 11:47:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * cpu.h (CPU_CIA): Delete macro, replace with...
- (CIA_SET, CIA_GET): Define.
-
-Wed Jan 28 18:44:33 1998 Michael Meissner <meissner@cygnus.com>
-
- * misc.c (tic80_trace_cmp_internal): New function to return
- compare bits as a string.
- (tic80_trace_{,fpu2}cmp): New functions for tracing cmp and fcmp.
-
- * cpu.h (tic80_trace_{,fpu2}cmp): Add declaration.
- (TRACE_{,FPU2}CMP): New macros for tracing compares.
-
- * insns (do_{,f}cmp): Use compare specific tracing functions to
- print out the flag bits.
-
-Mon Jan 19 22:26:29 1998 Doug Evans <devans@seba>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Mon Dec 15 23:17:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
- * config.in: Ditto.
-
-Thu Dec 4 09:21:05 1997 Doug Evans <devans@canuck.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Mon Nov 24 14:57:58 1997 Doug Evans <devans@seba.cygnus.com>
-
- * cpu.h (TRACE_COND_BR): Use TRACE_BRANCH_P, not TRACE_ALU_P.
-
-Sat Nov 22 21:42:09 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * interp.c (engine_step): Replace SIGTRAP with SIM_SIGTRAP.
- (engine_run_until_stop): Replace SIGINT with SIM_SIGINT.
-
- * sim-main.h: Include sim-signal.h.
- (SIGTRAP): Delete definition.
-
- * interp.c, sim-calls.c: Do not include signal.h.
-
- * insns (illegal): SIGILL -> SIM_SIGILL.
- (fp_unavailable): SIGFPE -> SIM_SIGFPE.
- (do_trap): SIGTRAP -> SIM_SIGTRAP.
-
-Tue Nov 18 15:33:48 1997 Doug Evans <devans@canuck.cygnus.com>
-
- * sim-main.h (CIA_ADDR): Define.
-
- * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS).
-
-Fri Oct 17 17:26:36 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * alu.h (ALU32_END): Use ALU32_RESULT.
-
-Mon Sep 29 12:49:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * insns (get_fp_reg, set_fp_reg): Update to use changed sim_fpu
- interface.
- (do_fadd, do_fcmp, do_fdiv, do_fmpy, do_frnd, do_fsub): Ditto.
-
- * misc.c (tic80_trace_fpu3, tic80_trace_fpu2, tic80_trace_fpu1,
- tic80_trace_fpu2i) Update to use changed sim_fpu interface.
-
-Fri Oct 3 09:28:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure.in (SIM_AC_OPTIONS_BITSIZE): Define.
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Wed Sep 24 17:38:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Tue Sep 23 11:04:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Tue Sep 23 10:19:51 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * Makefile.in (SIM_WARNINGS, SIM_ALIGNMENT, SIM_ENDIAN,
- SIM_HOSTENDIAN, SIM_INLINE, SIM_RESERVED_BITS): Delete, moved to
- common.
- (SIM_EXTRA_CFLAGS): Update.
-
-Mon Sep 22 11:46:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Fri Sep 19 17:45:25 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Tue Sep 16 23:10:03 1997 Felix Lee <flee@cygnus.com>
-
- * sim-main.h (kill): macro was missing args.
- (SIGTRAP): define for MSVC.
-
-Mon Sep 15 17:36:15 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Mon Sep 8 20:10:43 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * cpu.h (CPU_CIA): Define.
-
- * sim-main.h (struct sim_state): Delete halt_ok, path_to_halt,
- restart_ok, path_to_restart members.
- (struct sim_state): Delete reason, siggnal members.
-
-Thu Sep 4 17:21:23 1997 Doug Evans <dje@seba>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Thu Sep 4 17:45:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-calls.c (sim_open): Add memory before parsing arguments.
- (sim_read): Delete, replace with sim-hrw.
- (sim_write): Delete, replace with sim-hrw.
-
-Thu Sep 4 10:48:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-calls.c (sim_open): Use sim_do_command to add memory, only
- add memory if none already present.
- (sim_open): Move init of registers from here.
- (sim_create_inferior): To here. Init modules.
-
- * Makefile.in (SIM_OBJS): Add sim-memopt.o module.
-
- * sim-calls.c (sim_open): Add zero modulo arg to sim_core_attach.
-
-Mon Sep 1 11:06:30 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-calls.c (sim_open): Use sim_state_alloc
- (simulation): Delete.
-
-Sat Aug 30 09:40:47 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * insns (do_trap): Unsigned `i' for unsigned iterator.
- (do_trap): Ditto for comparison with getpid.
-
-Wed Aug 27 18:13:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
- * config.in: Ditto.
-
-Wed Aug 27 13:41:24 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * insns (do_st): Use U8_4 instead of V4_L8.
-
- * sim-calls.c (sim_open): Add call to sim_analyze_program, update
- call to sim_config.
-
- * sim-calls.c (sim_kill): Delete.
- (sim_create_inferior): Add ABFD argument. Initialize PC from ABFD
- and not SD.
- (sim_load): Delete, use sim-hload.c.
-
- * Makefile.in (SIM_OBJS): Add sim-hload.o module.
-
-Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
- * config.in: Ditto.
-
-Mon Aug 25 16:33:29 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-calls.c (sim_open): Add ABFD argument.
- (sim_open): Move sim_config call to just after argument
- parsing. Check return status.
-
-Fri Aug 8 21:52:27 1997 Mark Alexander <marka@cygnus.com>
-
- * sim-calls.c (sim_store_register): Allow accumulators
- other than A0 to be modified. Correct error message.
-
-Thu May 29 14:02:40 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * misc.c (tic80_trace_fpu3, tic80_trace_fpu2, tic80_trace_fpu1,
- tic80_trace_fpu2i): Pass in function prefix.
- (tic80_trace_ldst): Rewrite so it calls print_one_insn directly.
-
- * Makefile.in (SIM_OBJS): Include sim-watch.o module.
-
- * sim-main.h (WITH_WATCHPOINTS): Enable watchpoints.
-
- * ic (bitnum): Compute bitnum from BITNUM.
- * insn (bbo, bbz): Use.
-
- * insn: Convert long immediate instructions to igen long immediate
- form.
- * insn: Add disasembler information.
-
-Thu May 29 12:09:13 1997 Andrew Cagney <cagney@b2.cygnus.com>
-
- * alu.h (IMEM_IMMED): New macro, fetch 32bit immediate operand N.
-
- * insns (subu i): Immediate is signed not unsigned.
-
-Tue May 27 13:22:13 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-calls.c (sim_read): Pass NULL cpu to sim_core_read_buffer.
- (sim_write): Ditto for write.
-
-Tue May 20 09:33:31 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-calls.c (sim_load): Set STATE_LOADED_P.
-
- * sim-main.h: Include <unistd.h>.
-
- * sim-calls.c (sim_set_callback): Delete.
- (sim_open): Add/install callback argument.
- (sim_size): Delete.
-
-Mon May 19 18:59:33 1997 Mike Meissner <meissner@cygnus.com>
-
- * configure.in: Check for getpid, kill functions.
- * config{.in,ure}: Regenerate.
-
- * insns (do_trap): Add support for kill, getpid system calls.
-
- * sim-main.h (errno.h): Include.
- (getpid,kill): Define as NOPs if the host doesn't have them.
-
-Mon May 19 14:58:47 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-calls.c (sim_open): Set the simulator base magic number.
- (sim_load): Delete prototype of sim_load_file.
- (sim_open): Define sd to be &simulation.
-
-Fri May 16 14:35:30 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * insns (illegal, fp_unavailable): Halt instead of abort the
- simulator.
-
- * insns: Replace calls to engine_error with sim_engine_abort.
- Ditto for engine_halt V sim_engine_halt.
-
-Tue May 13 15:24:12 1997 Andrew Cagney <cagney@b2.cygnus.com>
-
- * interp.c (engine_run_until_stop): Delete. Moved to common.
- (engine_step): Ditto.
- (engine_step): Ditto.
- (engine_halt): Ditto.
- (engine_restart): Ditto.
- (engine_halt): Ditto.
- (engine_error): Ditto.
-
- * sim-calls.c (sim_stop): Delete. Moved to common.
- (sim_stop_reason): Ditto.
- (sim_resume): Ditto.
-
- * Makefile.in (SIM_OBJS): Link in generic sim-engine, sim-run,
- sim-resume, sim-reason, sim-stop modules.
-
-Fri May 16 11:57:49 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * ic (compute): Drop check for REG == 0, now always forced to
- zero.
-
- * cpu.h (GPR_SET): New macro update the gpr.
- * insns (do_add): Use GPR_SET to update the GPR register.
-
- * sim-calls.c (sim_fetch_register): Pretend that r0 is zero.
-
- * Makefile.in (tmp-igen): Specify zero-r0 so that every
- instruction clears r0.
-
- * interp.c (engine_run_until_stop): Igen now generates code to
- clear r0.
- (engine_step): Ditto.
-
-Thu May 15 11:45:37 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * insns (do_shift): When rot==0 and zero/sign merge treat it as
- 32.
- (set_fp_reg): For interger conversion, use sim-fpu fpu2i
- functions.
- (do_fmpy): Perform iii and uuu using integer arithmetic.
-
- * Makefile.in (ENGINE_H): Assume everything depends on the fpu.
-
- * insns (get_fp_reg): Use sim_fpu_u32to to perform unsigned
- conversion.
- (do_fcmp): Update to use new fp compare functions. Make reg nr arg
- instead of reg. Stops fp overflow.
- (get_fp_reg): Assume val is valid when reg == 0.
- (set_fp_reg): Fix double conversion.
-
- * misc.c (tic80_trace_fpu1): New function, trace simple fp op.
-
- * insns (do_frnd): Add tracing.
-
- * cpu.h (TRACE_FPU1): Ditto.
-
- * insns (do_trap): Printf formatting.
-
-Wed May 14 18:05:50 1997 Mike Meissner <meissner@cygnus.com>
-
- * misc.c (tic80_trace_fpu{3,2,2i}): Align columns with other
- insns. Use %g to print floating point instead of %f in case the
- numbers are real large.
-
-Tue May 13 18:00:10 1997 Mike Meissner <meissner@cygnus.com>
-
- * insns (do_trap): For system calls that are defined, but not
- provided return EINVAL. Temporarily add traps 74-79 to just print
- the register state.
-
- * interp.c (engine_{run_until_stop,step}): Before executing
- instructions, make sure r0 == 0.
-
-Tue May 13 16:39:37 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * alu.h (IMEM): Take full cia not just IP as argument.
-
- * interp.c (engine_run_until_stop): Delete handling of annuled
- instructions.
- (engine_step): Ditto.
-
- * insn (do_branch): New function.
- (do_bbo, do_bbz, do_bcnd, do_bsr, do_jsr): Use do_branch to handle
- annuled branches.
-
-Mon May 12 17:15:52 1997 Mike Meissner <meissner@cygnus.com>
-
- * insns (do_{ld,st}): Fix tracing for ld/st.
-
-Mon May 12 11:12:24 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-calls.c (sim_stop_reason): Restore keep_running after a
- CNTRL-C, don't re-clear it.
-
- * interp.c (engine_error): stop rather than signal with SIGABRT
- when an error.
-
- * insns (do_ld): For 64bit loads, always store LSW in rDest, MSW in
- rDest + 1. Also done by Michael Meissner <meissner@cygnus.com>
- (do_st): Converse for store.
-
- * misc.c (tic80_trace_fpu2i): Correct printf format for int type.
-
-Sun May 11 11:02:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-calls.c (sim_stop_reason): Return a SIGINT if keep_running
- was cleared.
-
- * interp.c (engine_step): New function. Single step the simulator
- taking care of cntrl-c during a step.
-
- * sim-calls.c (sim_resume): Differentiate between stepping and
- running so that a cntrl-c during a step is reported.
-
-Sun May 11 10:54:31 1997 Mark Alexander <marka@cygnus.com>
-
- * sim-calls.c (sim_fetch_register): Use correct reg base.
- (sim_store_register): Ditto.
-
-Sun May 11 10:25:14 1997 Michael Meissner <meissner@cygnus.com>
-
- * cpu.h (tic80_trace_shift): Add declaration.
- (TRACE_SHIFT): New macro to trace shift instructions.
-
- * misc.c (tic80_trace_alu2): Align spacing.
- (tic80_trace_shift): New function to trace shifts.
-
- * insns (lmo): Add missing 0b prefix to bits.
- (do_shift): Use ~ (unsigned32)0, instead of -1. Use TRACE_SHIFT
- instead of TRACE_ALU2.
- (sl r): Use EndMask as is, instead of using Source+1 register.
- (subu): Operands are unsigned, not signed.
- (do_{ld,st}): Fix endian problems with ld.d/st.d.
-
-Sat May 10 12:35:47 1997 Michael Meissner <meissner@cygnus.com>
-
- * insns (and{.tt,.tf,.ft,.ff}): Immediate values are unsigned, not
- signed.
-
-Fri May 9 15:47:36 1997 Mike Meissner <meissner@cygnus.com>
-
- * insns (cmp_vals,do_cmp): Produce the correct bits as specified
- by the architecture.
- (xor): Fix xor immediate patterns to use the correct bits.
-
-Fri May 9 09:55:33 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * alu.h (long_immediate): Adjust the CIA delay-pointer as well as
- the NIA when a 64bit insn.
-
-Thu May 8 11:57:47 1997 Michael Meissner <meissner@cygnus.com>
-
- * insns (jsr,bsr): For non-allulled calls, set r31 so that the
- return address does not reexecute the instruction in the delay
- slot.
- (bbo,bbz): Complement bit number to reverse the one's complement
- that the assembler is required to do.
-
- * misc.c (tic80_trace_*): Change format slightly to accomidate
- real large decimal values.
-
-Thu May 8 14:07:16 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-calls.c (sim_do_command): Implement.
- (sim_store_register): Fix typo T2H v H2T.
-
-Wed May 7 11:48:55 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * cpu.h (TRACE_FPU2, TRACE_FPU3, TRACE_FPU2I): Add.
- * insn: Clean up fpu tracing.
-
- * sim-calls.c (sim_create_inferior): Start out with interrupts
- enabled.
-
- * cpu.h (TRACE_SINK3), misc.c (tic80_trace_sink3): Three argument
- sink
-
- * insns (rdcr, swcr, wrcr, brcr, rmo, lmo): Implement.
-
- * insns (do_*): Remove MY_INDEX/indx argument from support functions,
- igen now handles this.
-
- * cpu.h (CR): New macro - access TIc80 control registers.
-
- * misc.c: New file.
- (tic80_cr2index): New function, map control register opcode index
- into the internal CR enum.
-
- * interp.c
- (tic80_trace_{alu{2,3},nop,sink{1,2},{,u}cond_br,ldst}): Move from
- here
- * misc.c: to here.
-
- * Makefile.in (SIM_OBJS): Add misc.o.
-
-Tue May 6 15:22:58 1997 Mike Meissner <meissner@cygnus.com>
-
- * cpu.h ({,v}{S,D}P_FPR): Delete unused macros that won't work on
- big endian hosts.
- (tic80_trace_{alu{2,3},nop,sink{1,2},{,u}cond_br,ldst}): Declare
- new functions.
- (TRACE_{ALU{2,3},NOP,SINK{1,2},{,U}COND_BR,LD,ST}): New macros to
- trace various instruction types.
-
- * insns: Modify all instructions to support semantic tracing.
-
- * interp.c (toplevel): Include itable.h.
- (tic80_trace_{alu{2,3},nop,sink{1,2},{,u}cond_br,ldst}): New
- functions to provide semantic level tracing information.
-
-Mon May 5 11:50:43 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * alu.h: Update usage of core object to reflect recent changes in
- ../common/sim-*core.
- * sim-calls.c (sim_open): Ditto.
-
-Mon May 5 14:10:17 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * insn (cmnd): No-op cache flushes.
-
- * insns (do_trap): Allow writes to STDERR.
-
- * Makefile.in (SIM_OBJS): Link in sim-fpu.o.
- (SIM_EXTRA_LIBS): Link in the math library.
-
- * alu.h: Add support for floating point unit using sim-alu.
-
- * insns (fadd, fsub, fmpy, fdiv, fcmp, frnd*): Implement.
-
-Fri May 2 14:57:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-calls.c: Include sim-utils.h and sim-options.h.
-
- * sim-main.h (sim_state): Drop sim_events and sim_core members,
- moved to simulator base type.
-
- * alu.h (IMEM, MEM, STORE): Update track changes in common
- directory.
-
- * insns: Drop cia argument from functions, igen now handles this.
-
- * interp.c (engine_init): Include string.h/strings.h to define
- memset et.al.
-
- * sim-main.h (sim_cia): Delcare, tracking common dir changes.
-
- * cpu.h (sim_cpu): Update instruction_address with sim_cia.
-
-Wed Apr 30 11:26:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-main.h (signal.h): Include so that SIG* available to all
- callers of sig_halt.
-
- * insns (do_shift): New function, implement shift operations.
- (do_trap): Add handler for trap 73 - SIGTRAP.
-
-Tue Apr 29 10:58:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * alu.h (MEM, STORE): Force addresses to be correctly aligned.
-
- * insns (do_jsr): Fix.
- (do_st, do_ld): Handle 64bit transfers.
- (do_trap): Match libgloss.
- (rdcr): Implement nop - Dest == r0 - variant.
-
- * sim-calls.c (sim_create_inferior): Initialize SP.
-
- * Makefile.in (ENGINE_H): Everything now depends on sim-options.h.
- (support.o): Depends on ENGINE_H.
-
- * cpu.h: Four accumulators.
-
- * Makefile.in (tmp-igen): Include line number information in
- generated files.
-
- * insns (dld, dst): Fill in.
-
-Mon Apr 28 13:02:26 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * insns (vld): Fix instruction format wrong.
-
-Thu Apr 24 16:43:09 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * dc: Add additional rules so that minor opcode files are
- detected.
- * insns: Enable more instructions.
-
- * sim-calls.c (sim_fetch_register,sim_store_register, sim_write):
- Implement.
-
-Thu Apr 24 00:39:51 1997 Doug Evans <dje@canuck.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
- * Makefile.in (SIM_OBJS): Add sim-module.o, sim-profile.o.
- * sim-calls.c (sim_open): Call sim_module_uninstall if argument
- parsing fails. Call sim_post_argv_init.
- (sim_close): Call sim_module_uninstall.
-
-Wed Apr 23 20:05:33 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * insns (and, bbo, bcnd, bsr, dcache, jsr, or, xor, nor): Enable.
- * ic: Add fields for enabled instructions.
-
diff --git a/sim/tic80/Makefile.in b/sim/tic80/Makefile.in
deleted file mode 100644
index 7111a618d47..00000000000
--- a/sim/tic80/Makefile.in
+++ /dev/null
@@ -1,140 +0,0 @@
-# Makefile for blah ...
-# Copyright blah ...
-
-
-
-## COMMON_PRE_CONFIG_FRAG
-
-# These variables are given default values in COMMON_PRE_CONFIG_FRAG.
-# We override the ones we need to here.
-# Not all of these need to be mentioned, only the necessary ones.
-
-# List of object files, less common parts.
-SIM_OBJS = \
- $(SIM_NEW_COMMON_OBJS) \
- support.o idecode.o semantics.o itable.o misc.o \
- sim-engine.o \
- sim-calls.o \
- sim-hload.o \
- sim-hrw.o \
- sim-reason.o \
- sim-resume.o \
- sim-run.o \
- sim-stop.o \
-
-# List of extra dependencies.
-# Generally this consists of simulator specific files included by sim-main.h.
-SIM_EXTRA_DEPS = itable.h idecode.h cpu.h alu.h
-
-# List of extra libraries to link with
-SIM_EXTRA_LIBS = -lm
-
-# List of generators
-SIM_GEN=tmp-igen
-
-# List of flags to always pass to $(CC).
-
-SIM_EXTRA_CFLAGS = \
- -DWITH_TARGET_WORD_MSB=31
-
-# List of main object files for `run'.
-SIM_RUN_OBJS = nrun.o
-
-# Dependency of `clean' to clean any extra files.
-SIM_EXTRA_CLEAN = clean-igen
-
-
-## COMMON_POST_CONFIG_FRAG
-
-# Rules need to build $(SIM_OBJS), plus whatever else the target wants.
-
-# ... target specific rules ...
-
-BUILT_SRC_FROM_IGEN = \
- icache.h \
- icache.c \
- idecode.h \
- idecode.c \
- semantics.h \
- semantics.c \
- model.h \
- model.c \
- support.h \
- support.c \
- itable.h itable.c
-$(BUILT_SRC_FROM_IGEN): tmp-igen
-#
-
-.PHONY: clean-igen
-clean-igen:
- rm -f $(BUILT_SRC_FROM_IGEN)
- rm -f tmp-igen tmp-insns
-
-../igen/igen:
- cd ../igen && $(MAKE)
-
-tmp-igen: $(srcdir)/tic80.dc $(srcdir)/tic80.igen $(srcdir)/tic80.ic ../igen/igen
- cd ../igen && $(MAKE)
- ../igen/igen \
- -F f \
- -G direct-access \
- -G delayed-branch \
- -G zero-r0 \
- -F short,emul \
- -B 32 -H 31 \
- -o $(srcdir)/tic80.dc \
- -k $(srcdir)/tic80.ic \
- -i $(srcdir)/tic80.igen \
- -n icache.h -hc tmp-icache.h \
- -n icache.c -c tmp-icache.c \
- -n semantics.h -hs tmp-semantics.h \
- -n semantics.c -s tmp-semantics.c \
- -n idecode.h -hd tmp-idecode.h \
- -n idecode.c -d tmp-idecode.c \
- -n model.h -hm tmp-model.h \
- -n model.c -m tmp-model.c \
- -n support.h -hf tmp-support.h \
- -n support.c -f tmp-support.c \
- -n itable.h -ht tmp-itable.h \
- -n itable.c -t tmp-itable.c
- $(srcdir)/../../move-if-change tmp-icache.h icache.h
- $(srcdir)/../../move-if-change tmp-icache.c icache.c
- $(srcdir)/../../move-if-change tmp-idecode.h idecode.h
- $(srcdir)/../../move-if-change tmp-idecode.c idecode.c
- $(srcdir)/../../move-if-change tmp-semantics.h semantics.h
- $(srcdir)/../../move-if-change tmp-semantics.c semantics.c
- $(srcdir)/../../move-if-change tmp-model.h model.h
- $(srcdir)/../../move-if-change tmp-model.c model.c
- $(srcdir)/../../move-if-change tmp-support.h support.h
- $(srcdir)/../../move-if-change tmp-support.c support.c
- $(srcdir)/../../move-if-change tmp-itable.h itable.h
- $(srcdir)/../../move-if-change tmp-itable.c itable.c
- touch tmp-igen
-
-ENGINE_H = \
- sim-main.h \
- $(srcdir)/../common/sim-basics.h \
- config.h \
- $(srcdir)/../common/sim-config.h \
- $(srcdir)/../common/sim-inline.h \
- $(srcdir)/../common/sim-types.h \
- $(srcdir)/../common/sim-bits.h \
- $(srcdir)/../common/sim-endian.h \
- $(srcdir)/../common/sim-options.h \
- itable.h \
- idecode.h \
- cpu.h \
- alu.h \
- $(srcdir)/../common/sim-alu.h \
- $(srcdir)/../common/sim-core.h \
- $(srcdir)/../common/sim-events.h \
- $(srcdir)/../common/sim-fpu.h \
- $(srcdir)/../common/sim-engine.h \
-
-idecode.o: $(ENGINE_H)
-semantics.o: $(ENGINE_H)
-support.o: $(ENGINE_H)
-interp.o: interp.c $(ENGINE_H)
-sim-calls.o: sim-calls.c $(ENGINE_H)
-cpu.o: cpu.c $(ENGINE_H)
-misc.o: $(ENGINE_H) \ No newline at end of file
diff --git a/sim/tic80/acconfig.h b/sim/tic80/acconfig.h
deleted file mode 100644
index f9b87a10c60..00000000000
--- a/sim/tic80/acconfig.h
+++ /dev/null
@@ -1,15 +0,0 @@
-
-/* Define to 1 if NLS is requested. */
-#undef ENABLE_NLS
-
-/* Define as 1 if you have catgets and don't want to use GNU gettext. */
-#undef HAVE_CATGETS
-
-/* Define as 1 if you have gettext and don't want to use GNU gettext. */
-#undef HAVE_GETTEXT
-
-/* Define as 1 if you have the stpcpy function. */
-#undef HAVE_STPCPY
-
-/* Define if your locale.h file contains LC_MESSAGES. */
-#undef HAVE_LC_MESSAGES
diff --git a/sim/tic80/alu.h b/sim/tic80/alu.h
deleted file mode 100644
index b5bc7c1af31..00000000000
--- a/sim/tic80/alu.h
+++ /dev/null
@@ -1,75 +0,0 @@
-/* Texas Instruments TMS320C80 (MVP) Simulator.
- Copyright (C) 1997 Free Software Foundation, Inc.
- Contributed by Cygnus Support.
-
-This file is part of GDB, the GNU debugger.
-
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License along
-with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
-
-
-
-#ifndef _TIC80_ALU_H_
-#define _TIC80_ALU_H_
-
-#define ALU_CARRY 0 /* FIXME */
-
-#define ALU32_END(TARG) \
-{ \
- (TARG) = ALU32_RESULT; /* FIXME */ \
-}
-
-#define ALU_END(TARG) ALU32_END(TARG)
-
-#include "sim-alu.h"
-
-
-
-/* Bring data in from the cold */
-
-#define IMEM32(CIA) \
-(sim_core_read_aligned_4(STATE_CPU (sd, 0), CIA, exec_map, (CIA).ip))
-
-#define IMEM32_IMMED(CIA, N) \
-(sim_core_read_aligned_4 (STATE_CPU (sd, 0), CIA, exec_map, (CIA).ip + 4 * (N)))
-
-#define MEM(SIGN, EA, NR_BYTES) \
-((SIGN##_##NR_BYTES) sim_core_read_unaligned_##NR_BYTES (STATE_CPU (sd, 0), cia, \
- read_map, \
- (EA)))
-
-#define STORE(EA, NR_BYTES, VAL) \
-do { \
- sim_core_write_unaligned_##NR_BYTES (STATE_CPU (sd, 0), cia, \
- write_map, \
- (EA), (VAL)); \
-} while (0)
-
-
-#define long_immediate(VARIABLE) \
- unsigned_word VARIABLE = MEM (unsigned, nia.ip, 4); \
- cia.dp += sizeof (instruction_word); \
- nia.ip += sizeof (instruction_word); \
- nia.dp += sizeof (instruction_word);
-
-
-
-/* Floating point support */
-
-#define IS_FP_AVAILABLE ((CPU)->cr[IE_CR] & IE_CR_IE)
-
-#include "sim-fpu.h"
-
-
-#endif
diff --git a/sim/tic80/config.in b/sim/tic80/config.in
deleted file mode 100644
index fffbc5935ef..00000000000
--- a/sim/tic80/config.in
+++ /dev/null
@@ -1,168 +0,0 @@
-/* config.in. Generated automatically from configure.in by autoheader. */
-
-/* Define if using alloca.c. */
-#undef C_ALLOCA
-
-/* Define to empty if the keyword does not work. */
-#undef const
-
-/* Define to one of _getb67, GETB67, getb67 for Cray-2 and Cray-YMP systems.
- This function is required for alloca.c support on those systems. */
-#undef CRAY_STACKSEG_END
-
-/* Define if you have alloca, as a function or macro. */
-#undef HAVE_ALLOCA
-
-/* Define if you have <alloca.h> and it should be used (not on Ultrix). */
-#undef HAVE_ALLOCA_H
-
-/* Define if you have a working `mmap' system call. */
-#undef HAVE_MMAP
-
-/* Define as __inline if that's what the C compiler calls it. */
-#undef inline
-
-/* Define to `long' if <sys/types.h> doesn't define. */
-#undef off_t
-
-/* Define if you need to in order for stat and other things to work. */
-#undef _POSIX_SOURCE
-
-/* Define as the return type of signal handlers (int or void). */
-#undef RETSIGTYPE
-
-/* Define to `unsigned' if <sys/types.h> doesn't define. */
-#undef size_t
-
-/* If using the C implementation of alloca, define if you know the
- direction of stack growth for your system; otherwise it will be
- automatically deduced at run-time.
- STACK_DIRECTION > 0 => grows toward higher addresses
- STACK_DIRECTION < 0 => grows toward lower addresses
- STACK_DIRECTION = 0 => direction of growth unknown
- */
-#undef STACK_DIRECTION
-
-/* Define if you have the ANSI C header files. */
-#undef STDC_HEADERS
-
-/* Define if your processor stores words with the most significant
- byte first (like Motorola and SPARC, unlike Intel and VAX). */
-#undef WORDS_BIGENDIAN
-
-/* Define to 1 if NLS is requested. */
-#undef ENABLE_NLS
-
-/* Define as 1 if you have gettext and don't want to use GNU gettext. */
-#undef HAVE_GETTEXT
-
-/* Define as 1 if you have the stpcpy function. */
-#undef HAVE_STPCPY
-
-/* Define if your locale.h file contains LC_MESSAGES. */
-#undef HAVE_LC_MESSAGES
-
-/* Define if you have the __argz_count function. */
-#undef HAVE___ARGZ_COUNT
-
-/* Define if you have the __argz_next function. */
-#undef HAVE___ARGZ_NEXT
-
-/* Define if you have the __argz_stringify function. */
-#undef HAVE___ARGZ_STRINGIFY
-
-/* Define if you have the __setfpucw function. */
-#undef HAVE___SETFPUCW
-
-/* Define if you have the dcgettext function. */
-#undef HAVE_DCGETTEXT
-
-/* Define if you have the getcwd function. */
-#undef HAVE_GETCWD
-
-/* Define if you have the getpagesize function. */
-#undef HAVE_GETPAGESIZE
-
-/* Define if you have the getpid function. */
-#undef HAVE_GETPID
-
-/* Define if you have the getrusage function. */
-#undef HAVE_GETRUSAGE
-
-/* Define if you have the kill function. */
-#undef HAVE_KILL
-
-/* Define if you have the munmap function. */
-#undef HAVE_MUNMAP
-
-/* Define if you have the putenv function. */
-#undef HAVE_PUTENV
-
-/* Define if you have the setenv function. */
-#undef HAVE_SETENV
-
-/* Define if you have the setlocale function. */
-#undef HAVE_SETLOCALE
-
-/* Define if you have the sigaction function. */
-#undef HAVE_SIGACTION
-
-/* Define if you have the stpcpy function. */
-#undef HAVE_STPCPY
-
-/* Define if you have the strcasecmp function. */
-#undef HAVE_STRCASECMP
-
-/* Define if you have the strchr function. */
-#undef HAVE_STRCHR
-
-/* Define if you have the time function. */
-#undef HAVE_TIME
-
-/* Define if you have the <argz.h> header file. */
-#undef HAVE_ARGZ_H
-
-/* Define if you have the <fcntl.h> header file. */
-#undef HAVE_FCNTL_H
-
-/* Define if you have the <fpu_control.h> header file. */
-#undef HAVE_FPU_CONTROL_H
-
-/* Define if you have the <limits.h> header file. */
-#undef HAVE_LIMITS_H
-
-/* Define if you have the <locale.h> header file. */
-#undef HAVE_LOCALE_H
-
-/* Define if you have the <malloc.h> header file. */
-#undef HAVE_MALLOC_H
-
-/* Define if you have the <nl_types.h> header file. */
-#undef HAVE_NL_TYPES_H
-
-/* Define if you have the <stdlib.h> header file. */
-#undef HAVE_STDLIB_H
-
-/* Define if you have the <string.h> header file. */
-#undef HAVE_STRING_H
-
-/* Define if you have the <strings.h> header file. */
-#undef HAVE_STRINGS_H
-
-/* Define if you have the <sys/param.h> header file. */
-#undef HAVE_SYS_PARAM_H
-
-/* Define if you have the <sys/resource.h> header file. */
-#undef HAVE_SYS_RESOURCE_H
-
-/* Define if you have the <sys/time.h> header file. */
-#undef HAVE_SYS_TIME_H
-
-/* Define if you have the <time.h> header file. */
-#undef HAVE_TIME_H
-
-/* Define if you have the <unistd.h> header file. */
-#undef HAVE_UNISTD_H
-
-/* Define if you have the <values.h> header file. */
-#undef HAVE_VALUES_H
diff --git a/sim/tic80/configure b/sim/tic80/configure
deleted file mode 100755
index b681188344a..00000000000
--- a/sim/tic80/configure
+++ /dev/null
@@ -1,4459 +0,0 @@
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-# This file file be copied and used freely without restrictions. It can
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-
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-
-
-# Search path for a program which passes the given test.
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-#
-# This file file be copied and used freely without restrictions. It can
-# be used in projects which are not available under the GNU Public License
-# but which still want to provide support for the GNU gettext functionality.
-# Please note that the actual code is *not* freely available.
-
-# serial 1
-
-
-
-# Check whether LC_MESSAGES is available in <locale.h>.
-# Ulrich Drepper <drepper@cygnus.com>, 1995.
-#
-# This file file be copied and used freely without restrictions. It can
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-# but which still want to provide support for the GNU gettext functionality.
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-
-# serial 1
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-
-
-
-
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-# Guess values for system-dependent variables and create Makefiles.
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-ac_help="$ac_help
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-ac_help="$ac_help
- --enable-sim-cflags=opts Extra CFLAGS for use in building simulator"
-ac_help="$ac_help
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-ac_help="$ac_help
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-ac_help="$ac_help
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-ac_help="$ac_help
- --enable-sim-profile=opts Enable profiling flags"
-ac_help="$ac_help
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-
-# Initialize some variables set by options.
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-ac_exeext=
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-' ac_t=' '
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-
-
-
-echo $ac_n "checking how to run the C preprocessor""... $ac_c" 1>&6
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- SET_MAKE="MAKE=${MAKE-make}"
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-
-echo $ac_n "checking for POSIXized ISC""... $ac_c" 1>&6
-echo "configure:800: checking for POSIXized ISC" >&5
-if test -d /etc/conf/kconfig.d &&
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- echo "$ac_t""no" 1>&6
- ISC=
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-
-echo $ac_n "checking for ANSI C header files""... $ac_c" 1>&6
-echo "configure:821: checking for ANSI C header files" >&5
-if eval "test \"`echo '$''{'ac_cv_header_stdc'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 826 "configure"
-#include "confdefs.h"
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-EOF
-ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:834: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
-ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
-if test -z "$ac_err"; then
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- ac_cv_header_stdc=yes
-else
- echo "$ac_err" >&5
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- ac_cv_header_stdc=no
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-rm -f conftest*
-
-if test $ac_cv_header_stdc = yes; then
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-#line 851 "configure"
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-EOF
-if (eval "$ac_cpp conftest.$ac_ext") 2>&5 |
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- :
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- rm -rf conftest*
- ac_cv_header_stdc=no
-fi
-rm -f conftest*
-
-fi
-
-if test $ac_cv_header_stdc = yes; then
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-#line 869 "configure"
-#include "confdefs.h"
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-EOF
-if (eval "$ac_cpp conftest.$ac_ext") 2>&5 |
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-else
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-fi
-rm -f conftest*
-
-fi
-
-if test $ac_cv_header_stdc = yes; then
- # /bin/cc in Irix-4.0.5 gets non-ANSI ctype macros unless using -ansi.
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- cat > conftest.$ac_ext <<EOF
-#line 890 "configure"
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-
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-if { (eval echo configure:901: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null
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- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -fr conftest*
- ac_cv_header_stdc=no
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-rm -fr conftest*
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-
-fi
-fi
-
-echo "$ac_t""$ac_cv_header_stdc" 1>&6
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-
-fi
-
-echo $ac_n "checking for working const""... $ac_c" 1>&6
-echo "configure:925: checking for working const" >&5
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- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 930 "configure"
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-
-int main() {
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-/* Ultrix mips cc rejects this. */
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-char const *const *ccp;
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-/* NEC SVR4.0.2 mips cc rejects this. */
-struct point {int x, y;};
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-{ /* SCO 3.2v4 cc rejects this. */
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-
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-{ /* Someone thinks the Sun supposedly-ANSI compiler will reject this. */
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-{ /* Sun SC1.0 ANSI compiler rejects this -- but not the above. */
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-{ /* AIX XL C 1.02.0.0 rejects this saying
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-{ /* ULTRIX-32 V3.1 (Rev 9) vcc rejects this */
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-
-; return 0; }
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-if { (eval echo configure:979: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
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- ac_cv_c_const=yes
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- ac_cv_c_const=no
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-rm -f conftest*
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-
-echo "$ac_t""$ac_cv_c_const" 1>&6
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-
-fi
-
-echo $ac_n "checking for inline""... $ac_c" 1>&6
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- echo $ac_n "(cached) $ac_c" 1>&6
-else
- ac_cv_c_inline=no
-for ac_kw in inline __inline__ __inline; do
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-#line 1007 "configure"
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-
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-if { (eval echo configure:1014: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
- rm -rf conftest*
- ac_cv_c_inline=$ac_kw; break
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- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
-fi
-rm -f conftest*
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-
-fi
-
-echo "$ac_t""$ac_cv_c_inline" 1>&6
-case "$ac_cv_c_inline" in
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- *) cat >> confdefs.h <<EOF
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-esac
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-echo $ac_n "checking for off_t""... $ac_c" 1>&6
-echo "configure:1040: checking for off_t" >&5
-if eval "test \"`echo '$''{'ac_cv_type_off_t'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
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- cat > conftest.$ac_ext <<EOF
-#line 1045 "configure"
-#include "confdefs.h"
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-#include <stdlib.h>
-#include <stddef.h>
-#endif
-EOF
-if (eval "$ac_cpp conftest.$ac_ext") 2>&5 |
- egrep "(^|[^a-zA-Z_0-9])off_t[^a-zA-Z_0-9]" >/dev/null 2>&1; then
- rm -rf conftest*
- ac_cv_type_off_t=yes
-else
- rm -rf conftest*
- ac_cv_type_off_t=no
-fi
-rm -f conftest*
-
-fi
-echo "$ac_t""$ac_cv_type_off_t" 1>&6
-if test $ac_cv_type_off_t = no; then
- cat >> confdefs.h <<\EOF
-#define off_t long
-EOF
-
-fi
-
-echo $ac_n "checking for size_t""... $ac_c" 1>&6
-echo "configure:1073: checking for size_t" >&5
-if eval "test \"`echo '$''{'ac_cv_type_size_t'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1078 "configure"
-#include "confdefs.h"
-#include <sys/types.h>
-#if STDC_HEADERS
-#include <stdlib.h>
-#include <stddef.h>
-#endif
-EOF
-if (eval "$ac_cpp conftest.$ac_ext") 2>&5 |
- egrep "(^|[^a-zA-Z_0-9])size_t[^a-zA-Z_0-9]" >/dev/null 2>&1; then
- rm -rf conftest*
- ac_cv_type_size_t=yes
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- rm -rf conftest*
- ac_cv_type_size_t=no
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-rm -f conftest*
-
-fi
-echo "$ac_t""$ac_cv_type_size_t" 1>&6
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-
-fi
-
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- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1113 "configure"
-#include "confdefs.h"
-#include <alloca.h>
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-if { (eval echo configure:1120: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- rm -rf conftest*
- ac_cv_header_alloca_h=yes
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- ac_cv_header_alloca_h=no
-fi
-rm -f conftest*
-fi
-
-echo "$ac_t""$ac_cv_header_alloca_h" 1>&6
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-#define HAVE_ALLOCA_H 1
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-
-fi
-
-echo $ac_n "checking for alloca""... $ac_c" 1>&6
-echo "configure:1141: checking for alloca" >&5
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- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1146 "configure"
-#include "confdefs.h"
-
-#ifdef __GNUC__
-# define alloca __builtin_alloca
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-# ifdef _MSC_VER
-# include <malloc.h>
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-# else
-# if HAVE_ALLOCA_H
-# include <alloca.h>
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-# ifdef _AIX
- #pragma alloca
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-# endif
-# endif
-# endif
-# endif
-#endif
-
-int main() {
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-if { (eval echo configure:1174: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- rm -rf conftest*
- ac_cv_func_alloca_works=yes
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- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- ac_cv_func_alloca_works=no
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-rm -f conftest*
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-
-echo "$ac_t""$ac_cv_func_alloca_works" 1>&6
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-#define HAVE_ALLOCA 1
-EOF
-
-fi
-
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- cat >> confdefs.h <<\EOF
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-
-
-echo $ac_n "checking whether alloca needs Cray hooks""... $ac_c" 1>&6
-echo "configure:1206: checking whether alloca needs Cray hooks" >&5
-if eval "test \"`echo '$''{'ac_cv_os_cray'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1211 "configure"
-#include "confdefs.h"
-#if defined(CRAY) && ! defined(CRAY2)
-webecray
-#else
-wenotbecray
-#endif
-
-EOF
-if (eval "$ac_cpp conftest.$ac_ext") 2>&5 |
- egrep "webecray" >/dev/null 2>&1; then
- rm -rf conftest*
- ac_cv_os_cray=yes
-else
- rm -rf conftest*
- ac_cv_os_cray=no
-fi
-rm -f conftest*
-
-fi
-
-echo "$ac_t""$ac_cv_os_cray" 1>&6
-if test $ac_cv_os_cray = yes; then
-for ac_func in _getb67 GETB67 getb67; do
- echo $ac_n "checking for $ac_func""... $ac_c" 1>&6
-echo "configure:1236: checking for $ac_func" >&5
-if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1241 "configure"
-#include "confdefs.h"
-/* System header to define __stub macros and hopefully few prototypes,
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-#include <assert.h>
-/* Override any gcc2 internal prototype to avoid an error. */
-/* We use char because int might match the return type of a gcc2
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-char $ac_func();
-
-int main() {
-
-/* The GNU C library defines this for functions which it implements
- to always fail with ENOSYS. Some functions are actually named
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-#if defined (__stub_$ac_func) || defined (__stub___$ac_func)
-choke me
-#else
-$ac_func();
-#endif
-
-; return 0; }
-EOF
-if { (eval echo configure:1264: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=yes"
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=no"
-fi
-rm -f conftest*
-fi
-
-if eval "test \"`echo '$ac_cv_func_'$ac_func`\" = yes"; then
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- cat >> confdefs.h <<EOF
-#define CRAY_STACKSEG_END $ac_func
-EOF
-
- break
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- echo "$ac_t""no" 1>&6
-fi
-
-done
-fi
-
-echo $ac_n "checking stack direction for C alloca""... $ac_c" 1>&6
-echo "configure:1291: checking stack direction for C alloca" >&5
-if eval "test \"`echo '$''{'ac_cv_c_stack_direction'+set}'`\" = set"; then
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-else
- cat > conftest.$ac_ext <<EOF
-#line 1299 "configure"
-#include "confdefs.h"
-find_stack_direction ()
-{
- static char *addr = 0;
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- if (addr == 0)
- {
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- return find_stack_direction ();
- }
- else
- return (&dummy > addr) ? 1 : -1;
-}
-main ()
-{
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-EOF
-if { (eval echo configure:1318: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null
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- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
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- ac_cv_c_stack_direction=-1
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-
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-{ (eval echo configure:1353: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
-ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
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- echo "$ac_err" >&5
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
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- eval "ac_cv_header_$ac_safe=no"
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- ac_tr_hdr=HAVE_`echo $ac_hdr | sed 'y%abcdefghijklmnopqrstuvwxyz./-%ABCDEFGHIJKLMNOPQRSTUVWXYZ___%'`
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-
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-
-for ac_func in getpagesize
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-echo $ac_n "checking for $ac_func""... $ac_c" 1>&6
-echo "configure:1382: checking for $ac_func" >&5
-if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1387 "configure"
-#include "confdefs.h"
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-#include <assert.h>
-/* Override any gcc2 internal prototype to avoid an error. */
-/* We use char because int might match the return type of a gcc2
- builtin and then its argument prototype would still apply. */
-char $ac_func();
-
-int main() {
-
-/* The GNU C library defines this for functions which it implements
- to always fail with ENOSYS. Some functions are actually named
- something starting with __ and the normal name is an alias. */
-#if defined (__stub_$ac_func) || defined (__stub___$ac_func)
-choke me
-#else
-$ac_func();
-#endif
-
-; return 0; }
-EOF
-if { (eval echo configure:1410: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
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- eval "ac_cv_func_$ac_func=yes"
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=no"
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-
-if eval "test \"`echo '$ac_cv_func_'$ac_func`\" = yes"; then
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- ac_tr_func=HAVE_`echo $ac_func | tr 'abcdefghijklmnopqrstuvwxyz' 'ABCDEFGHIJKLMNOPQRSTUVWXYZ'`
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-
-else
- echo "$ac_t""no" 1>&6
-fi
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-
-echo $ac_n "checking for working mmap""... $ac_c" 1>&6
-echo "configure:1435: checking for working mmap" >&5
-if eval "test \"`echo '$''{'ac_cv_func_mmap_fixed_mapped'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- if test "$cross_compiling" = yes; then
- ac_cv_func_mmap_fixed_mapped=no
-else
- cat > conftest.$ac_ext <<EOF
-#line 1443 "configure"
-#include "confdefs.h"
-
-/* Thanks to Mike Haertel and Jim Avera for this test.
- Here is a matrix of mmap possibilities:
- mmap private not fixed
- mmap private fixed at somewhere currently unmapped
- mmap private fixed at somewhere already mapped
- mmap shared not fixed
- mmap shared fixed at somewhere currently unmapped
- mmap shared fixed at somewhere already mapped
- For private mappings, we should verify that changes cannot be read()
- back from the file, nor mmap's back from the file at a different
- address. (There have been systems where private was not correctly
- implemented like the infamous i386 svr4.0, and systems where the
- VM page cache was not coherent with the filesystem buffer cache
- like early versions of FreeBSD and possibly contemporary NetBSD.)
- For shared mappings, we should conversely verify that changes get
- propogated back to all the places they're supposed to be.
-
- Grep wants private fixed already mapped.
- The main things grep needs to know about mmap are:
- * does it exist and is it safe to write into the mmap'd area
- * how to use it (BSD variants) */
-#include <sys/types.h>
-#include <fcntl.h>
-#include <sys/mman.h>
-
-/* This mess was copied from the GNU getpagesize.h. */
-#ifndef HAVE_GETPAGESIZE
-# ifdef HAVE_UNISTD_H
-# include <unistd.h>
-# endif
-
-/* Assume that all systems that can run configure have sys/param.h. */
-# ifndef HAVE_SYS_PARAM_H
-# define HAVE_SYS_PARAM_H 1
-# endif
-
-# ifdef _SC_PAGESIZE
-# define getpagesize() sysconf(_SC_PAGESIZE)
-# else /* no _SC_PAGESIZE */
-# ifdef HAVE_SYS_PARAM_H
-# include <sys/param.h>
-# ifdef EXEC_PAGESIZE
-# define getpagesize() EXEC_PAGESIZE
-# else /* no EXEC_PAGESIZE */
-# ifdef NBPG
-# define getpagesize() NBPG * CLSIZE
-# ifndef CLSIZE
-# define CLSIZE 1
-# endif /* no CLSIZE */
-# else /* no NBPG */
-# ifdef NBPC
-# define getpagesize() NBPC
-# else /* no NBPC */
-# ifdef PAGESIZE
-# define getpagesize() PAGESIZE
-# endif /* PAGESIZE */
-# endif /* no NBPC */
-# endif /* no NBPG */
-# endif /* no EXEC_PAGESIZE */
-# else /* no HAVE_SYS_PARAM_H */
-# define getpagesize() 8192 /* punt totally */
-# endif /* no HAVE_SYS_PARAM_H */
-# endif /* no _SC_PAGESIZE */
-
-#endif /* no HAVE_GETPAGESIZE */
-
-#ifdef __cplusplus
-extern "C" { void *malloc(unsigned); }
-#else
-char *malloc();
-#endif
-
-int
-main()
-{
- char *data, *data2, *data3;
- int i, pagesize;
- int fd;
-
- pagesize = getpagesize();
-
- /*
- * First, make a file with some known garbage in it.
- */
- data = malloc(pagesize);
- if (!data)
- exit(1);
- for (i = 0; i < pagesize; ++i)
- *(data + i) = rand();
- umask(0);
- fd = creat("conftestmmap", 0600);
- if (fd < 0)
- exit(1);
- if (write(fd, data, pagesize) != pagesize)
- exit(1);
- close(fd);
-
- /*
- * Next, try to mmap the file at a fixed address which
- * already has something else allocated at it. If we can,
- * also make sure that we see the same garbage.
- */
- fd = open("conftestmmap", O_RDWR);
- if (fd < 0)
- exit(1);
- data2 = malloc(2 * pagesize);
- if (!data2)
- exit(1);
- data2 += (pagesize - ((int) data2 & (pagesize - 1))) & (pagesize - 1);
- if (data2 != mmap(data2, pagesize, PROT_READ | PROT_WRITE,
- MAP_PRIVATE | MAP_FIXED, fd, 0L))
- exit(1);
- for (i = 0; i < pagesize; ++i)
- if (*(data + i) != *(data2 + i))
- exit(1);
-
- /*
- * Finally, make sure that changes to the mapped area
- * do not percolate back to the file as seen by read().
- * (This is a bug on some variants of i386 svr4.0.)
- */
- for (i = 0; i < pagesize; ++i)
- *(data2 + i) = *(data2 + i) + 1;
- data3 = malloc(pagesize);
- if (!data3)
- exit(1);
- if (read(fd, data3, pagesize) != pagesize)
- exit(1);
- for (i = 0; i < pagesize; ++i)
- if (*(data + i) != *(data3 + i))
- exit(1);
- close(fd);
- unlink("conftestmmap");
- exit(0);
-}
-
-EOF
-if { (eval echo configure:1583: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null
-then
- ac_cv_func_mmap_fixed_mapped=yes
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -fr conftest*
- ac_cv_func_mmap_fixed_mapped=no
-fi
-rm -fr conftest*
-fi
-
-fi
-
-echo "$ac_t""$ac_cv_func_mmap_fixed_mapped" 1>&6
-if test $ac_cv_func_mmap_fixed_mapped = yes; then
- cat >> confdefs.h <<\EOF
-#define HAVE_MMAP 1
-EOF
-
-fi
-
-echo $ac_n "checking for Cygwin environment""... $ac_c" 1>&6
-echo "configure:1606: checking for Cygwin environment" >&5
-if eval "test \"`echo '$''{'ac_cv_cygwin'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1611 "configure"
-#include "confdefs.h"
-
-int main() {
-
-#ifndef __CYGWIN__
-#define __CYGWIN__ __CYGWIN32__
-#endif
-return __CYGWIN__;
-; return 0; }
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-if { (eval echo configure:1622: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
- rm -rf conftest*
- ac_cv_cygwin=yes
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- ac_cv_cygwin=no
-fi
-rm -f conftest*
-rm -f conftest*
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-
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-CYGWIN=
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-echo $ac_n "checking for mingw32 environment""... $ac_c" 1>&6
-echo "configure:1639: checking for mingw32 environment" >&5
-if eval "test \"`echo '$''{'ac_cv_mingw32'+set}'`\" = set"; then
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-else
- cat > conftest.$ac_ext <<EOF
-#line 1644 "configure"
-#include "confdefs.h"
-
-int main() {
-return __MINGW32__;
-; return 0; }
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-if { (eval echo configure:1651: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
- rm -rf conftest*
- ac_cv_mingw32=yes
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- ac_cv_mingw32=no
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-rm -f conftest*
-rm -f conftest*
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-
-echo "$ac_t""$ac_cv_mingw32" 1>&6
-MINGW32=
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-
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-
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- ac_install_sh="$ac_aux_dir/install-sh -c"
- break
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- ac_install_sh="$ac_aux_dir/install.sh -c"
- break
- fi
-done
-if test -z "$ac_aux_dir"; then
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-fi
-ac_config_guess=$ac_aux_dir/config.guess
-ac_config_sub=$ac_aux_dir/config.sub
-ac_configure=$ac_aux_dir/configure # This should be Cygnus configure.
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-
-# Do some error checking and defaulting for the host and target type.
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-#
-# The rules are:
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-
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-*) { echo "configure: error: can only configure for one host and one target at a time" 1>&2; exit 1; } ;;
-esac
-
-
-# Make sure we can run config.sub.
-if ${CONFIG_SHELL-/bin/sh} $ac_config_sub sun4 >/dev/null 2>&1; then :
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-
-echo $ac_n "checking host system type""... $ac_c" 1>&6
-echo "configure:1718: checking host system type" >&5
-
-host_alias=$host
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-NONE)
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- NONE)
- if host_alias=`${CONFIG_SHELL-/bin/sh} $ac_config_guess`; then :
- else { echo "configure: error: can not guess host type; you must specify one" 1>&2; exit 1; }
- fi ;;
- *) host_alias=$nonopt ;;
- esac ;;
-esac
-
-host=`${CONFIG_SHELL-/bin/sh} $ac_config_sub $host_alias`
-host_cpu=`echo $host | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\1/'`
-host_vendor=`echo $host | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\2/'`
-host_os=`echo $host | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\3/'`
-echo "$ac_t""$host" 1>&6
-
-echo $ac_n "checking target system type""... $ac_c" 1>&6
-echo "configure:1739: checking target system type" >&5
-
-target_alias=$target
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-NONE)
- case $nonopt in
- NONE) target_alias=$host_alias ;;
- *) target_alias=$nonopt ;;
- esac ;;
-esac
-
-target=`${CONFIG_SHELL-/bin/sh} $ac_config_sub $target_alias`
-target_cpu=`echo $target | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\1/'`
-target_vendor=`echo $target | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\2/'`
-target_os=`echo $target | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\3/'`
-echo "$ac_t""$target" 1>&6
-
-echo $ac_n "checking build system type""... $ac_c" 1>&6
-echo "configure:1757: checking build system type" >&5
-
-build_alias=$build
-case "$build_alias" in
-NONE)
- case $nonopt in
- NONE) build_alias=$host_alias ;;
- *) build_alias=$nonopt ;;
- esac ;;
-esac
-
-build=`${CONFIG_SHELL-/bin/sh} $ac_config_sub $build_alias`
-build_cpu=`echo $build | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\1/'`
-build_vendor=`echo $build | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\2/'`
-build_os=`echo $build | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\3/'`
-echo "$ac_t""$build" 1>&6
-
-test "$host_alias" != "$target_alias" &&
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-
-if test "$program_transform_name" = s,x,x,; then
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- # Double any \ or $. echo might interpret backslashes.
- cat <<\EOF_SED > conftestsed
-s,\\,\\\\,g; s,\$,$$,g
-EOF_SED
- program_transform_name="`echo $program_transform_name|sed -f conftestsed`"
- rm -f conftestsed
-fi
-test "$program_prefix" != NONE &&
- program_transform_name="s,^,${program_prefix},; $program_transform_name"
-# Use a double $ so make ignores it.
-test "$program_suffix" != NONE &&
- program_transform_name="s,\$\$,${program_suffix},; $program_transform_name"
-
-# sed with no file args requires a program.
-test "$program_transform_name" = "" && program_transform_name="s,x,x,"
-
-# Extract the first word of "gcc", so it can be a program name with args.
-set dummy gcc; ac_word=$2
-echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:1801: checking for $ac_word" >&5
-if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- if test -n "$CC"; then
- ac_cv_prog_CC="$CC" # Let the user override the test.
-else
- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
- ac_dummy="$PATH"
- for ac_dir in $ac_dummy; do
- test -z "$ac_dir" && ac_dir=.
- if test -f $ac_dir/$ac_word; then
- ac_cv_prog_CC="gcc"
- break
- fi
- done
- IFS="$ac_save_ifs"
-fi
-fi
-CC="$ac_cv_prog_CC"
-if test -n "$CC"; then
- echo "$ac_t""$CC" 1>&6
-else
- echo "$ac_t""no" 1>&6
-fi
-
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-echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:1831: checking for $ac_word" >&5
-if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then
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-else
- if test -n "$CC"; then
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- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
- ac_prog_rejected=no
- ac_dummy="$PATH"
- for ac_dir in $ac_dummy; do
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- if test -f $ac_dir/$ac_word; then
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- ac_prog_rejected=yes
- continue
- fi
- ac_cv_prog_CC="cc"
- break
- fi
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- IFS="$ac_save_ifs"
-if test $ac_prog_rejected = yes; then
- # We found a bogon in the path, so make sure we never use it.
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- shift
- if test $# -gt 0; then
- # We chose a different compiler from the bogus one.
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- # first if we set CC to just the basename; use the full file name.
- shift
- set dummy "$ac_dir/$ac_word" "$@"
- shift
- ac_cv_prog_CC="$@"
- fi
-fi
-fi
-fi
-CC="$ac_cv_prog_CC"
-if test -n "$CC"; then
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-else
- echo "$ac_t""no" 1>&6
-fi
-
- if test -z "$CC"; then
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- *win32* | *WIN32*)
- # Extract the first word of "cl", so it can be a program name with args.
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-echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:1882: checking for $ac_word" >&5
-if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- if test -n "$CC"; then
- ac_cv_prog_CC="$CC" # Let the user override the test.
-else
- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
- ac_dummy="$PATH"
- for ac_dir in $ac_dummy; do
- test -z "$ac_dir" && ac_dir=.
- if test -f $ac_dir/$ac_word; then
- ac_cv_prog_CC="cl"
- break
- fi
- done
- IFS="$ac_save_ifs"
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-CC="$ac_cv_prog_CC"
-if test -n "$CC"; then
- echo "$ac_t""$CC" 1>&6
-else
- echo "$ac_t""no" 1>&6
-fi
- ;;
- esac
- fi
- test -z "$CC" && { echo "configure: error: no acceptable cc found in \$PATH" 1>&2; exit 1; }
-fi
-
-echo $ac_n "checking whether the C compiler ($CC $CFLAGS $LDFLAGS) works""... $ac_c" 1>&6
-echo "configure:1914: checking whether the C compiler ($CC $CFLAGS $LDFLAGS) works" >&5
-
-ac_ext=c
-# CFLAGS is not in ac_cpp because -g, -O, etc. are not valid cpp options.
-ac_cpp='$CPP $CPPFLAGS'
-ac_compile='${CC-cc} -c $CFLAGS $CPPFLAGS conftest.$ac_ext 1>&5'
-ac_link='${CC-cc} -o conftest${ac_exeext} $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS 1>&5'
-cross_compiling=$ac_cv_prog_cc_cross
-
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-
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-
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-
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-
-
-
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- break
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-
-
-ALL_LINGUAS=
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-{ (eval echo configure:2145: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
-ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
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- echo "configure: failed program was:" >&5
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- ac_tr_hdr=HAVE_`echo $ac_hdr | sed 'y%abcdefghijklmnopqrstuvwxyz./-%ABCDEFGHIJKLMNOPQRSTUVWXYZ___%'`
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-
-int main() {
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-; return 0; }
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-if { (eval echo configure:2260: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
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- eval "ac_cv_func_$ac_func=yes"
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- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
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- eval "ac_cv_func_$ac_func=no"
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- ac_tr_func=HAVE_`echo $ac_func | tr 'abcdefghijklmnopqrstuvwxyz' 'ABCDEFGHIJKLMNOPQRSTUVWXYZ'`
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-
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-
- fi
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- if test $ac_cv_header_locale_h = yes; then
- echo $ac_n "checking for LC_MESSAGES""... $ac_c" 1>&6
-echo "configure:2294: checking for LC_MESSAGES" >&5
-if eval "test \"`echo '$''{'am_cv_val_LC_MESSAGES'+set}'`\" = set"; then
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- cat > conftest.$ac_ext <<EOF
-#line 2299 "configure"
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-if { (eval echo configure:2306: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
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- am_cv_val_LC_MESSAGES=yes
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- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- am_cv_val_LC_MESSAGES=no
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-
-echo "$ac_t""$am_cv_val_LC_MESSAGES" 1>&6
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-
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- echo $ac_n "checking whether NLS is requested""... $ac_c" 1>&6
-echo "configure:2327: checking whether NLS is requested" >&5
- # Check whether --enable-nls or --disable-nls was given.
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-
- echo "$ac_t""$USE_NLS" 1>&6
-
-
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-
- echo $ac_n "checking whether included gettext is requested""... $ac_c" 1>&6
-echo "configure:2347: checking whether included gettext is requested" >&5
- # Check whether --with-included-gettext or --without-included-gettext was given.
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-
- echo "$ac_t""$nls_cv_force_use_gnu_gettext" 1>&6
-
- nls_cv_use_gnu_gettext="$nls_cv_force_use_gnu_gettext"
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- CATOBJEXT=NONE
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- ac_safe=`echo "libintl.h" | sed 'y%./+-%__p_%'`
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- echo $ac_n "checking for gettext in libc""... $ac_c" 1>&6
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-
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- ac_save_LIBS="$LIBS"
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-
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-fi
-
- fi
-
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-
- # Extract the first word of "msgfmt", so it can be a program name with args.
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-#line 2535 "configure"
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-char $ac_func();
-
-int main() {
-
-/* The GNU C library defines this for functions which it implements
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-#else
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-
-; return 0; }
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-if { (eval echo configure:2558: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
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- eval "ac_cv_func_$ac_func=yes"
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- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=no"
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-
-if eval "test \"`echo '$ac_cv_func_'$ac_func`\" = yes"; then
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- ac_tr_func=HAVE_`echo $ac_func | tr 'abcdefghijklmnopqrstuvwxyz' 'ABCDEFGHIJKLMNOPQRSTUVWXYZ'`
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-
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- echo "$ac_t""no" 1>&6
-fi
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-
- # Extract the first word of "gmsgfmt", so it can be a program name with args.
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-echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:2585: checking for $ac_word" >&5
-if eval "test \"`echo '$''{'ac_cv_path_GMSGFMT'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- case "$GMSGFMT" in
- /*)
- ac_cv_path_GMSGFMT="$GMSGFMT" # Let the user override the test with a path.
- ;;
- ?:/*)
- ac_cv_path_GMSGFMT="$GMSGFMT" # Let the user override the test with a dos path.
- ;;
- *)
- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
- ac_dummy="$PATH"
- for ac_dir in $ac_dummy; do
- test -z "$ac_dir" && ac_dir=.
- if test -f $ac_dir/$ac_word; then
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- break
- fi
- done
- IFS="$ac_save_ifs"
- test -z "$ac_cv_path_GMSGFMT" && ac_cv_path_GMSGFMT="$MSGFMT"
- ;;
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-fi
-GMSGFMT="$ac_cv_path_GMSGFMT"
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- echo "$ac_t""$GMSGFMT" 1>&6
-else
- echo "$ac_t""no" 1>&6
-fi
-
- # Extract the first word of "xgettext", so it can be a program name with args.
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-echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:2621: checking for $ac_word" >&5
-if eval "test \"`echo '$''{'ac_cv_path_XGETTEXT'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- case "$XGETTEXT" in
- /*)
- ac_cv_path_XGETTEXT="$XGETTEXT" # Let the user override the test with a path.
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- *)
- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS="${IFS}:"
- for ac_dir in $PATH; do
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- if test -f $ac_dir/$ac_word; then
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- fi
- done
- IFS="$ac_save_ifs"
- test -z "$ac_cv_path_XGETTEXT" && ac_cv_path_XGETTEXT=":"
- ;;
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-XGETTEXT="$ac_cv_path_XGETTEXT"
-if test -n "$XGETTEXT"; then
- echo "$ac_t""$XGETTEXT" 1>&6
-else
- echo "$ac_t""no" 1>&6
-fi
-
- cat > conftest.$ac_ext <<EOF
-#line 2653 "configure"
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-int main() {
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-if { (eval echo configure:2661: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
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- CATOBJEXT=.gmo
- DATADIRNAME=share
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- CATOBJEXT=.mo
- DATADIRNAME=lib
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-rm -f conftest*
- INSTOBJEXT=.mo
- fi
- fi
-
-else
- echo "$ac_t""no" 1>&6
-fi
-
-
-
- if test "$CATOBJEXT" = "NONE"; then
- nls_cv_use_gnu_gettext=yes
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- fi
-
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- # Extract the first word of "msgfmt", so it can be a program name with args.
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-echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:2693: checking for $ac_word" >&5
-if eval "test \"`echo '$''{'ac_cv_path_MSGFMT'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- case "$MSGFMT" in
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- ac_cv_path_MSGFMT="$MSGFMT" # Let the user override the test with a path.
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- *)
- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS="${IFS}:"
- for ac_dir in $PATH; do
- test -z "$ac_dir" && ac_dir=.
- if test -f $ac_dir/$ac_word; then
- if test -z "`$ac_dir/$ac_word -h 2>&1 | grep 'dv '`"; then
- ac_cv_path_MSGFMT="$ac_dir/$ac_word"
- break
- fi
- fi
- done
- IFS="$ac_save_ifs"
- test -z "$ac_cv_path_MSGFMT" && ac_cv_path_MSGFMT="msgfmt"
- ;;
-esac
-fi
-MSGFMT="$ac_cv_path_MSGFMT"
-if test -n "$MSGFMT"; then
- echo "$ac_t""$MSGFMT" 1>&6
-else
- echo "$ac_t""no" 1>&6
-fi
-
- # Extract the first word of "gmsgfmt", so it can be a program name with args.
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-echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:2727: checking for $ac_word" >&5
-if eval "test \"`echo '$''{'ac_cv_path_GMSGFMT'+set}'`\" = set"; then
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-else
- case "$GMSGFMT" in
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- ac_cv_path_GMSGFMT="$GMSGFMT" # Let the user override the test with a path.
- ;;
- ?:/*)
- ac_cv_path_GMSGFMT="$GMSGFMT" # Let the user override the test with a dos path.
- ;;
- *)
- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
- ac_dummy="$PATH"
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- break
- fi
- done
- IFS="$ac_save_ifs"
- test -z "$ac_cv_path_GMSGFMT" && ac_cv_path_GMSGFMT="$MSGFMT"
- ;;
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-GMSGFMT="$ac_cv_path_GMSGFMT"
-if test -n "$GMSGFMT"; then
- echo "$ac_t""$GMSGFMT" 1>&6
-else
- echo "$ac_t""no" 1>&6
-fi
-
- # Extract the first word of "xgettext", so it can be a program name with args.
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-echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:2763: checking for $ac_word" >&5
-if eval "test \"`echo '$''{'ac_cv_path_XGETTEXT'+set}'`\" = set"; then
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-else
- case "$XGETTEXT" in
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- ac_cv_path_XGETTEXT="$XGETTEXT" # Let the user override the test with a path.
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- *)
- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS="${IFS}:"
- for ac_dir in $PATH; do
- test -z "$ac_dir" && ac_dir=.
- if test -f $ac_dir/$ac_word; then
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- ac_cv_path_XGETTEXT="$ac_dir/$ac_word"
- break
- fi
- fi
- done
- IFS="$ac_save_ifs"
- test -z "$ac_cv_path_XGETTEXT" && ac_cv_path_XGETTEXT=":"
- ;;
-esac
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-XGETTEXT="$ac_cv_path_XGETTEXT"
-if test -n "$XGETTEXT"; then
- echo "$ac_t""$XGETTEXT" 1>&6
-else
- echo "$ac_t""no" 1>&6
-fi
-
-
- USE_INCLUDED_LIBINTL=yes
- CATOBJEXT=.gmo
- INSTOBJEXT=.mo
- DATADIRNAME=share
- INTLDEPS='$(top_builddir)/../intl/libintl.a'
- INTLLIBS=$INTLDEPS
- LIBS=`echo $LIBS | sed -e 's/-lintl//'`
- nls_cv_header_intl=libintl.h
- nls_cv_header_libgt=libgettext.h
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-
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- : ;
- else
- echo "$ac_t""found xgettext programs is not GNU xgettext; ignore it" 1>&6
- XGETTEXT=":"
- fi
- fi
-
- # We need to process the po/ directory.
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- else
- DATADIRNAME=share
- nls_cv_header_intl=libintl.h
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-
- # If this is used in GNU gettext we have to set USE_NLS to `yes'
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- USE_INCLUDED_LIBINTL=yes
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-
- for lang in $ALL_LINGUAS; do
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- POFILES="$POFILES $lang.po"
- done
-
-
-
-
-
-
-
-
-
-
-
-
-
-
- if test "x$CATOBJEXT" != "x"; then
- if test "x$ALL_LINGUAS" = "x"; then
- LINGUAS=
- else
- echo $ac_n "checking for catalogs to be installed""... $ac_c" 1>&6
-echo "configure:2853: checking for catalogs to be installed" >&5
- NEW_LINGUAS=
- for lang in ${LINGUAS=$ALL_LINGUAS}; do
- case "$ALL_LINGUAS" in
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- esac
- done
- LINGUAS=$NEW_LINGUAS
- echo "$ac_t""$LINGUAS" 1>&6
- fi
-
- if test -n "$LINGUAS"; then
- for lang in $LINGUAS; do CATALOGS="$CATALOGS $lang$CATOBJEXT"; done
- fi
- fi
-
- if test $ac_cv_header_locale_h = yes; then
- INCLUDE_LOCALE_H="#include <locale.h>"
- else
- INCLUDE_LOCALE_H="\
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- fi
-
-
- if test -f $srcdir/po2tbl.sed.in; then
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- ac_safe=`echo "linux/version.h" | sed 'y%./+-%__p_%'`
-echo $ac_n "checking for linux/version.h""... $ac_c" 1>&6
-echo "configure:2881: checking for linux/version.h" >&5
-if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 2886 "configure"
-#include "confdefs.h"
-#include <linux/version.h>
-EOF
-ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:2891: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
-ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
-if test -z "$ac_err"; then
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=yes"
-else
- echo "$ac_err" >&5
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=no"
-fi
-rm -f conftest*
-fi
-if eval "test \"`echo '$ac_cv_header_'$ac_safe`\" = yes"; then
- echo "$ac_t""yes" 1>&6
- msgformat=linux
-else
- echo "$ac_t""no" 1>&6
-msgformat=xopen
-fi
-
-
- sed -e '/^#/d' $srcdir/$msgformat-msg.sed > po2msg.sed
- fi
- sed -e '/^#.*[^\\]$/d' -e '/^#$/d' \
- $srcdir/po2tbl.sed.in > po2tbl.sed
- fi
-
- if test "$PACKAGE" = "gettext"; then
- GT_NO="#NO#"
- GT_YES=
- else
- GT_NO=
- GT_YES="#YES#"
- fi
-
-
-
- MKINSTALLDIRS="\$(srcdir)/../../mkinstalldirs"
-
-
- l=
-
-
- if test -d $srcdir/po; then
- test -d po || mkdir po
- if test "x$srcdir" != "x."; then
- if test "x`echo $srcdir | sed 's@/.*@@'`" = "x"; then
- posrcprefix="$srcdir/"
- else
- posrcprefix="../$srcdir/"
- fi
- else
- posrcprefix="../"
- fi
- rm -f po/POTFILES
- sed -e "/^#/d" -e "/^\$/d" -e "s,.*, $posrcprefix& \\\\," -e "\$s/\(.*\) \\\\/\1/" \
- < $srcdir/po/POTFILES.in > po/POTFILES
- fi
-
-
-# Check for common headers.
-# FIXME: Seems to me this can cause problems for i386-windows hosts.
-# At one point there were hardcoded AC_DEFINE's if ${host} = i386-*-windows*.
-for ac_hdr in stdlib.h string.h strings.h unistd.h time.h
-do
-ac_safe=`echo "$ac_hdr" | sed 'y%./+-%__p_%'`
-echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6
-echo "configure:2960: checking for $ac_hdr" >&5
-if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 2965 "configure"
-#include "confdefs.h"
-#include <$ac_hdr>
-EOF
-ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:2970: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
-ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
-if test -z "$ac_err"; then
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=yes"
-else
- echo "$ac_err" >&5
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=no"
-fi
-rm -f conftest*
-fi
-if eval "test \"`echo '$ac_cv_header_'$ac_safe`\" = yes"; then
- echo "$ac_t""yes" 1>&6
- ac_tr_hdr=HAVE_`echo $ac_hdr | sed 'y%abcdefghijklmnopqrstuvwxyz./-%ABCDEFGHIJKLMNOPQRSTUVWXYZ___%'`
- cat >> confdefs.h <<EOF
-#define $ac_tr_hdr 1
-EOF
-
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- echo "$ac_t""no" 1>&6
-fi
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-
-for ac_hdr in sys/time.h sys/resource.h
-do
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-echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6
-echo "configure:3000: checking for $ac_hdr" >&5
-if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 3005 "configure"
-#include "confdefs.h"
-#include <$ac_hdr>
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-ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:3010: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
-ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
-if test -z "$ac_err"; then
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=yes"
-else
- echo "$ac_err" >&5
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=no"
-fi
-rm -f conftest*
-fi
-if eval "test \"`echo '$ac_cv_header_'$ac_safe`\" = yes"; then
- echo "$ac_t""yes" 1>&6
- ac_tr_hdr=HAVE_`echo $ac_hdr | sed 'y%abcdefghijklmnopqrstuvwxyz./-%ABCDEFGHIJKLMNOPQRSTUVWXYZ___%'`
- cat >> confdefs.h <<EOF
-#define $ac_tr_hdr 1
-EOF
-
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- echo "$ac_t""no" 1>&6
-fi
-done
-
-for ac_hdr in fcntl.h fpu_control.h
-do
-ac_safe=`echo "$ac_hdr" | sed 'y%./+-%__p_%'`
-echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6
-echo "configure:3040: checking for $ac_hdr" >&5
-if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 3045 "configure"
-#include "confdefs.h"
-#include <$ac_hdr>
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-ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:3050: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
-ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
-if test -z "$ac_err"; then
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- eval "ac_cv_header_$ac_safe=yes"
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- echo "$ac_err" >&5
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=no"
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-if eval "test \"`echo '$ac_cv_header_'$ac_safe`\" = yes"; then
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- ac_tr_hdr=HAVE_`echo $ac_hdr | sed 'y%abcdefghijklmnopqrstuvwxyz./-%ABCDEFGHIJKLMNOPQRSTUVWXYZ___%'`
- cat >> confdefs.h <<EOF
-#define $ac_tr_hdr 1
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-
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- echo "$ac_t""no" 1>&6
-fi
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-
-for ac_hdr in dlfcn.h errno.h sys/stat.h
-do
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-echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6
-echo "configure:3080: checking for $ac_hdr" >&5
-if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 3085 "configure"
-#include "confdefs.h"
-#include <$ac_hdr>
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-ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:3090: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
-ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
-if test -z "$ac_err"; then
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=yes"
-else
- echo "$ac_err" >&5
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=no"
-fi
-rm -f conftest*
-fi
-if eval "test \"`echo '$ac_cv_header_'$ac_safe`\" = yes"; then
- echo "$ac_t""yes" 1>&6
- ac_tr_hdr=HAVE_`echo $ac_hdr | sed 'y%abcdefghijklmnopqrstuvwxyz./-%ABCDEFGHIJKLMNOPQRSTUVWXYZ___%'`
- cat >> confdefs.h <<EOF
-#define $ac_tr_hdr 1
-EOF
-
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- echo "$ac_t""no" 1>&6
-fi
-done
-
-for ac_func in getrusage time sigaction __setfpucw
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-echo "configure:3119: checking for $ac_func" >&5
-if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 3124 "configure"
-#include "confdefs.h"
-/* System header to define __stub macros and hopefully few prototypes,
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-#include <assert.h>
-/* Override any gcc2 internal prototype to avoid an error. */
-/* We use char because int might match the return type of a gcc2
- builtin and then its argument prototype would still apply. */
-char $ac_func();
-
-int main() {
-
-/* The GNU C library defines this for functions which it implements
- to always fail with ENOSYS. Some functions are actually named
- something starting with __ and the normal name is an alias. */
-#if defined (__stub_$ac_func) || defined (__stub___$ac_func)
-choke me
-#else
-$ac_func();
-#endif
-
-; return 0; }
-EOF
-if { (eval echo configure:3147: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=yes"
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=no"
-fi
-rm -f conftest*
-fi
-
-if eval "test \"`echo '$ac_cv_func_'$ac_func`\" = yes"; then
- echo "$ac_t""yes" 1>&6
- ac_tr_func=HAVE_`echo $ac_func | tr 'abcdefghijklmnopqrstuvwxyz' 'ABCDEFGHIJKLMNOPQRSTUVWXYZ'`
- cat >> confdefs.h <<EOF
-#define $ac_tr_func 1
-EOF
-
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- echo "$ac_t""no" 1>&6
-fi
-done
-
-
-# Check for socket libraries
-echo $ac_n "checking for bind in -lsocket""... $ac_c" 1>&6
-echo "configure:3174: checking for bind in -lsocket" >&5
-ac_lib_var=`echo socket'_'bind | sed 'y%./+-%__p_%'`
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-else
- ac_save_LIBS="$LIBS"
-LIBS="-lsocket $LIBS"
-cat > conftest.$ac_ext <<EOF
-#line 3182 "configure"
-#include "confdefs.h"
-/* Override any gcc2 internal prototype to avoid an error. */
-/* We use char because int might match the return type of a gcc2
- builtin and then its argument prototype would still apply. */
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-if { (eval echo configure:3193: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
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- eval "ac_cv_lib_$ac_lib_var=yes"
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- cat conftest.$ac_ext >&5
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-
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- ac_tr_lib=HAVE_LIB`echo socket | sed -e 's/[^a-zA-Z0-9_]/_/g' \
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- cat >> confdefs.h <<EOF
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-
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-echo "configure:3221: checking for gethostbyname in -lnsl" >&5
-ac_lib_var=`echo nsl'_'gethostbyname | sed 'y%./+-%__p_%'`
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-#line 3229 "configure"
-#include "confdefs.h"
-/* Override any gcc2 internal prototype to avoid an error. */
-/* We use char because int might match the return type of a gcc2
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-char gethostbyname();
-
-int main() {
-gethostbyname()
-; return 0; }
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-if { (eval echo configure:3240: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
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- eval "ac_cv_lib_$ac_lib_var=yes"
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- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
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-LIBS="$ac_save_LIBS"
-
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- ac_tr_lib=HAVE_LIB`echo nsl | sed -e 's/[^a-zA-Z0-9_]/_/g' \
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- cat >> confdefs.h <<EOF
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-
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-
-. ${srcdir}/../../bfd/configure.host
-
-
-
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- *) { echo "configure: error: "--enable-maintainer-mode does not take a value"" 1>&2; exit 1; }; MAINT="#" ;;
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- MAINT="#"
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-
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-
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-fi
-else
- sim_bswap=""
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-
-
-
-# Check whether --enable-sim-cflags or --disable-sim-cflags was given.
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- trace) { echo "configure: error: "Please use --enable-sim-debug instead."" 1>&2; exit 1; }; sim_cflags="";;
- no) sim_cflags="";;
- *) sim_cflags=`echo "${enableval}" | sed -e "s/,/ /g"`;;
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- sim_cflags=""
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-
-
-
-# Check whether --enable-sim-debug or --disable-sim-debug was given.
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- enableval="$enable_sim_debug"
- case "${enableval}" in
- yes) sim_debug="-DDEBUG=7 -DWITH_DEBUG=7";;
- no) sim_debug="-DDEBUG=0 -DWITH_DEBUG=0";;
- *) sim_debug="-DDEBUG='(${enableval})' -DWITH_DEBUG='(${enableval})'";;
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-if test x"$silent" != x"yes" && test x"$sim_debug" != x""; then
- echo "Setting sim debug = $sim_debug" 6>&1
-fi
-else
- sim_debug=""
-fi
-
-
-
-# Check whether --enable-sim-stdio or --disable-sim-stdio was given.
-if test "${enable_sim_stdio+set}" = set; then
- enableval="$enable_sim_stdio"
- case "${enableval}" in
- yes) sim_stdio="-DWITH_STDIO=DO_USE_STDIO";;
- no) sim_stdio="-DWITH_STDIO=DONT_USE_STDIO";;
- *) { echo "configure: error: "Unknown value $enableval passed to --enable-sim-stdio"" 1>&2; exit 1; }; sim_stdio="";;
-esac
-if test x"$silent" != x"yes" && test x"$sim_stdio" != x""; then
- echo "Setting stdio flags = $sim_stdio" 6>&1
-fi
-else
- sim_stdio=""
-fi
-
-
-
-# Check whether --enable-sim-trace or --disable-sim-trace was given.
-if test "${enable_sim_trace+set}" = set; then
- enableval="$enable_sim_trace"
- case "${enableval}" in
- yes) sim_trace="-DTRACE=1 -DWITH_TRACE=-1";;
- no) sim_trace="-DTRACE=0 -DWITH_TRACE=0";;
- [-0-9]*)
- sim_trace="-DTRACE='(${enableval})' -DWITH_TRACE='(${enableval})'";;
- [a-z]*)
- sim_trace=""
- for x in `echo "$enableval" | sed -e "s/,/ /g"`; do
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- sim_trace="-DWITH_TRACE='(TRACE_$x"
- else
- sim_trace="${sim_trace}|TRACE_$x"
- fi
- done
- sim_trace="$sim_trace)'" ;;
-esac
-if test x"$silent" != x"yes" && test x"$sim_trace" != x""; then
- echo "Setting sim trace = $sim_trace" 6>&1
-fi
-else
- sim_trace=""
-fi
-
-
-
-# Check whether --enable-sim-profile or --disable-sim-profile was given.
-if test "${enable_sim_profile+set}" = set; then
- enableval="$enable_sim_profile"
- case "${enableval}" in
- yes) sim_profile="-DPROFILE=1 -DWITH_PROFILE=-1";;
- no) sim_profile="-DPROFILE=0 -DWITH_PROFILE=0";;
- [-0-9]*)
- sim_profile="-DPROFILE='(${enableval})' -DWITH_PROFILE='(${enableval})'";;
- [a-z]*)
- sim_profile=""
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- sim_profile="-DWITH_PROFILE='(PROFILE_$x"
- else
- sim_profile="${sim_profile}|PROFILE_$x"
- fi
- done
- sim_profile="$sim_profile)'" ;;
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-if test x"$silent" != x"yes" && test x"$sim_profile" != x""; then
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-fi
-else
- sim_profile="-DPROFILE=1 -DWITH_PROFILE=-1"
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-
-
-
-echo $ac_n "checking return type of signal handlers""... $ac_c" 1>&6
-echo "configure:3416: checking return type of signal handlers" >&5
-if eval "test \"`echo '$''{'ac_cv_type_signal'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 3421 "configure"
-#include "confdefs.h"
-#include <sys/types.h>
-#include <signal.h>
-#ifdef signal
-#undef signal
-#endif
-#ifdef __cplusplus
-extern "C" void (*signal (int, void (*)(int)))(int);
-#else
-void (*signal ()) ();
-#endif
-
-int main() {
-int i;
-; return 0; }
-EOF
-if { (eval echo configure:3438: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
- rm -rf conftest*
- ac_cv_type_signal=void
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- ac_cv_type_signal=int
-fi
-rm -f conftest*
-fi
-
-echo "$ac_t""$ac_cv_type_signal" 1>&6
-cat >> confdefs.h <<EOF
-#define RETSIGTYPE $ac_cv_type_signal
-EOF
-
-
-
-
-
-echo $ac_n "checking for executable suffix""... $ac_c" 1>&6
-echo "configure:3460: checking for executable suffix" >&5
-if eval "test \"`echo '$''{'ac_cv_exeext'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- if test "$CYGWIN" = yes || test "$MINGW32" = yes; then
- ac_cv_exeext=.exe
-else
- rm -f conftest*
- echo 'int main () { return 0; }' > conftest.$ac_ext
- ac_cv_exeext=
- if { (eval echo configure:3470: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; }; then
- for file in conftest.*; do
- case $file in
- *.c | *.o | *.obj | *.ilk | *.pdb) ;;
- *) ac_cv_exeext=`echo $file | sed -e s/conftest//` ;;
- esac
- done
- else
- { echo "configure: error: installation or configuration problem: compiler cannot create executables." 1>&2; exit 1; }
- fi
- rm -f conftest*
- test x"${ac_cv_exeext}" = x && ac_cv_exeext=no
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-fi
-
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-echo "$ac_t""${ac_cv_exeext}" 1>&6
-ac_exeext=$EXEEXT
-
-
-sim_link_files=
-sim_link_links=
-
-sim_link_links=tconfig.h
-if test -f ${srcdir}/tconfig.in
-then
- sim_link_files=tconfig.in
-else
- sim_link_files=../common/tconfig.in
-fi
-
-# targ-vals.def points to the libc macro description file.
-case "${target}" in
-*-*-*) TARG_VALS_DEF=../common/nltvals.def ;;
-esac
-sim_link_files="${sim_link_files} ${TARG_VALS_DEF}"
-sim_link_links="${sim_link_links} targ-vals.def"
-
-
-
-
-default_sim_inline="-DDEFAULT_INLINE=0"
-# Check whether --enable-sim-inline or --disable-sim-inline was given.
-if test "${enable_sim_inline+set}" = set; then
- enableval="$enable_sim_inline"
- sim_inline=""
-case "$enableval" in
- no) sim_inline="-DDEFAULT_INLINE=0";;
- 0) sim_inline="-DDEFAULT_INLINE=0";;
- yes | 2) sim_inline="-DDEFAULT_INLINE=ALL_C_INLINE";;
- 1) sim_inline="-DDEFAULT_INLINE=INLINE_LOCALS";;
- *) for x in `echo "$enableval" | sed -e "s/,/ /g"`; do
- new_flag=""
- case "$x" in
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- *_INLINE) new_flag="-D$x=ALL_C_INLINE";;
- *) new_flag="-D$x""_INLINE=ALL_C_INLINE";;
- esac
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- sim_inline="$new_flag"
- else
- sim_inline="$sim_inline $new_flag"
- fi
- done;;
-esac
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- echo "Setting inline flags = $sim_inline" 6>&1
-fi
-else
-
-if test "x$cross_compiling" = "xno"; then
- if test x"$GCC" != "x" -a x"${default_sim_inline}" != "x" ; then
- sim_inline="${default_sim_inline}"
- if test x"$silent" != x"yes"; then
- echo "Setting inline flags = $sim_inline" 6>&1
- fi
- else
- sim_inline=""
- fi
-else
- sim_inline="-DDEFAULT_INLINE=0"
-fi
-fi
-
-
-wire_endian="LITTLE_ENDIAN"
-default_endian=""
-# Check whether --enable-sim-endian or --disable-sim-endian was given.
-if test "${enable_sim_endian+set}" = set; then
- enableval="$enable_sim_endian"
- case "${enableval}" in
- b*|B*) sim_endian="-DWITH_TARGET_BYTE_ORDER=BIG_ENDIAN";;
- l*|L*) sim_endian="-DWITH_TARGET_BYTE_ORDER=LITTLE_ENDIAN";;
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- else
- if test x"$default_endian" != x; then
- sim_endian="-DWITH_TARGET_BYTE_ORDER=${default_endian}"
- else
- echo "No hard-wired endian for target $target" 1>&6
- sim_endian="-DWITH_TARGET_BYTE_ORDER=0"
- fi
- fi;;
- no) if test x"$default_endian" != x; then
- sim_endian="-DWITH_DEFAULT_TARGET_BYTE_ORDER=${default_endian}"
- else
- if test x"$wire_endian" != x; then
- sim_endian="-DWITH_DEFAULT_TARGET_BYTE_ORDER=${wire_endian}"
- else
- echo "No default endian for target $target" 1>&6
- sim_endian="-DWITH_DEFAULT_TARGET_BYTE_ORDER=0"
- fi
- fi;;
- *) { echo "configure: error: "Unknown value $enableval for --enable-sim-endian"" 1>&2; exit 1; }; sim_endian="";;
-esac
-if test x"$silent" != x"yes" && test x"$sim_endian" != x""; then
- echo "Setting endian flags = $sim_endian" 6>&1
-fi
-else
- if test x"$default_endian" != x; then
- sim_endian="-DWITH_DEFAULT_TARGET_BYTE_ORDER=${default_endian}"
-else
- if test x"$wire_endian" != x; then
- sim_endian="-DWITH_TARGET_BYTE_ORDER=${wire_endian}"
- else
- sim_endian=
- fi
-fi
-fi
-
-wire_alignment="FORCED_ALIGNMENT"
-default_alignment=""
-
-# Check whether --enable-sim-alignment or --disable-sim-alignment was given.
-if test "${enable_sim_alignment+set}" = set; then
- enableval="$enable_sim_alignment"
- case "${enableval}" in
- strict | STRICT) sim_alignment="-DWITH_ALIGNMENT=STRICT_ALIGNMENT";;
- nonstrict | NONSTRICT) sim_alignment="-DWITH_ALIGNMENT=NONSTRICT_ALIGNMENT";;
- forced | FORCED) sim_alignment="-DWITH_ALIGNMENT=FORCED_ALIGNMENT";;
- yes) if test x"$wire_alignment" != x; then
- sim_alignment="-DWITH_ALIGNMENT=${wire_alignment}"
- else
- if test x"$default_alignment" != x; then
- sim_alignment="-DWITH_ALIGNMENT=${default_alignment}"
- else
- echo "No hard-wired alignment for target $target" 1>&6
- sim_alignment="-DWITH_ALIGNMENT=0"
- fi
- fi;;
- no) if test x"$default_alignment" != x; then
- sim_alignment="-DWITH_DEFAULT_ALIGNMENT=${default_alignment}"
- else
- if test x"$wire_alignment" != x; then
- sim_alignment="-DWITH_DEFAULT_ALIGNMENT=${wire_alignment}"
- else
- echo "No default alignment for target $target" 1>&6
- sim_alignment="-DWITH_DEFAULT_ALIGNMENT=0"
- fi
- fi;;
- *) { echo "configure: error: "Unknown value $enableval passed to --enable-sim-alignment"" 1>&2; exit 1; }; sim_alignment="";;
-esac
-if test x"$silent" != x"yes" && test x"$sim_alignment" != x""; then
- echo "Setting alignment flags = $sim_alignment" 6>&1
-fi
-else
- if test x"$default_alignment" != x; then
- sim_alignment="-DWITH_DEFAULT_ALIGNMENT=${default_alignment}"
-else
- if test x"$wire_alignment" != x; then
- sim_alignment="-DWITH_ALIGNMENT=${wire_alignment}"
- else
- sim_alignment=
- fi
-fi
-fi
-
-
-# Check whether --enable-sim-hostendian or --disable-sim-hostendian was given.
-if test "${enable_sim_hostendian+set}" = set; then
- enableval="$enable_sim_hostendian"
- case "${enableval}" in
- no) sim_hostendian="-DWITH_HOST_BYTE_ORDER=0";;
- b*|B*) sim_hostendian="-DWITH_HOST_BYTE_ORDER=BIG_ENDIAN";;
- l*|L*) sim_hostendian="-DWITH_HOST_BYTE_ORDER=LITTLE_ENDIAN";;
- *) { echo "configure: error: "Unknown value $enableval for --enable-sim-hostendian"" 1>&2; exit 1; }; sim_hostendian="";;
-esac
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- echo "Setting hostendian flags = $sim_hostendian" 6>&1
-fi
-else
-
-if test "x$cross_compiling" = "xno"; then
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-echo "configure:3666: checking whether byte ordering is bigendian" >&5
-if eval "test \"`echo '$''{'ac_cv_c_bigendian'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- ac_cv_c_bigendian=unknown
-# See if sys/param.h defines the BYTE_ORDER macro.
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-#line 3673 "configure"
-#include "confdefs.h"
-#include <sys/types.h>
-#include <sys/param.h>
-int main() {
-
-#if !BYTE_ORDER || !BIG_ENDIAN || !LITTLE_ENDIAN
- bogus endian macros
-#endif
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-if { (eval echo configure:3684: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
- rm -rf conftest*
- # It does; now see whether it defined to BIG_ENDIAN or not.
-cat > conftest.$ac_ext <<EOF
-#line 3688 "configure"
-#include "confdefs.h"
-#include <sys/types.h>
-#include <sys/param.h>
-int main() {
-
-#if BYTE_ORDER != BIG_ENDIAN
- not big endian
-#endif
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-if { (eval echo configure:3699: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
- rm -rf conftest*
- ac_cv_c_bigendian=yes
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- ac_cv_c_bigendian=no
-fi
-rm -f conftest*
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
-fi
-rm -f conftest*
-if test $ac_cv_c_bigendian = unknown; then
-if test "$cross_compiling" = yes; then
- { echo "configure: error: can not run test program while cross compiling" 1>&2; exit 1; }
-else
- cat > conftest.$ac_ext <<EOF
-#line 3719 "configure"
-#include "confdefs.h"
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- /* Are we little or big endian? From Harbison&Steele. */
- union
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- long l;
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-if { (eval echo configure:3732: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null
-then
- ac_cv_c_bigendian=no
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -fr conftest*
- ac_cv_c_bigendian=yes
-fi
-rm -fr conftest*
-fi
-
-fi
-fi
-
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-if test $ac_cv_c_bigendian = yes; then
- cat >> confdefs.h <<\EOF
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-
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-
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- sim_hostendian="-DWITH_HOST_BYTE_ORDER=BIG_ENDIAN"
- else
- sim_hostendian="-DWITH_HOST_BYTE_ORDER=LITTLE_ENDIAN"
- fi
-else
- sim_hostendian="-DWITH_HOST_BYTE_ORDER=0"
-fi
-fi
-
-
-# Check whether --enable-build-warnings or --disable-build-warnings was given.
-if test "${enable_build_warnings+set}" = set; then
- enableval="$enable_build_warnings"
- build_warnings="-Wall -Wpointer-arith -Wstrict-prototypes -Wmissing-prototypes -Wmissing-declarations"
-case "${enableval}" in
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- no) build_warnings="-w";;
- ,*) t=`echo "${enableval}" | sed -e "s/,/ /g"`
- build_warnings="${build_warnings} ${t}";;
- *,) t=`echo "${enableval}" | sed -e "s/,/ /g"`
- build_warnings="${t} ${build_warnings}";;
- *) build_warnings=`echo "${enableval}" | sed -e "s/,/ /g"`;;
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-if test x"$silent" != x"yes" && test x"$build_warnings" != x""; then
- echo "Setting warning flags = $build_warnings" 6>&1
-fi
-WARN_CFLAGS=""
-WERROR_CFLAGS=""
-if test "x${build_warnings}" != x -a "x$GCC" = xyes
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- # Separate out the -Werror flag as some files just cannot be
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- for w in ${build_warnings}; do
- case $w in
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- *) WARN_CFLAGS="${WARN_CFLAGS} $w"
- esac
- done
-fi
-else
- build_warnings=""
-fi
-
-
-default_sim_reserved_bits="1"
-# Check whether --enable-sim-reserved-bits or --disable-sim-reserved-bits was given.
-if test "${enable_sim_reserved_bits+set}" = set; then
- enableval="$enable_sim_reserved_bits"
- case "${enableval}" in
- yes) sim_reserved_bits="-DWITH_RESERVED_BITS=1";;
- no) sim_reserved_bits="-DWITH_RESERVED_BITS=0";;
- *) { echo "configure: error: "--enable-sim-reserved-bits does not take a value"" 1>&2; exit 1; }; sim_reserved_bits="";;
-esac
-if test x"$silent" != x"yes" && test x"$sim_reserved_bits" != x""; then
- echo "Setting reserved flags = $sim_reserved_bits" 6>&1
-fi
-else
- sim_reserved_bits="-DWITH_RESERVED_BITS=${default_sim_reserved_bits}"
-fi
-
-wire_word_bitsize="32"
-wire_word_msb="31"
-wire_address_bitsize=""
-wire_cell_bitsize=""
-# Check whether --enable-sim-bitsize or --disable-sim-bitsize was given.
-if test "${enable_sim_bitsize+set}" = set; then
- enableval="$enable_sim_bitsize"
- sim_bitsize=
-case "${enableval}" in
- 64,63 | 64,63,* ) sim_bitsize="-DWITH_TARGET_WORD_BITSIZE=64 -DWITH_TARGET_WORD_MSB=63";;
- 32,31 | 32,31,* ) sim_bitsize="-DWITH_TARGET_WORD_BITSIZE=32 -DWITH_TARGET_WORD_MSB=31";;
- 64,0 | 64,0,* ) sim_bitsize="-DWITH_TARGET_WORD_BITSIZE=32 -DWITH_TARGET_WORD_MSB=0";;
- 32,0 | 64,0,* ) sim_bitsize="-DWITH_TARGET_WORD_BITSIZE=32 -DWITH_TARGET_WORD_MSB=0";;
- 32) if test x"$wire_word_msb" != x -a x"$wire_word_msb" != x0; then
- sim_bitsize="-DWITH_TARGET_WORD_BITSIZE=32 -DWITH_TARGET_WORD_MSB=31"
- else
- sim_bitsize="-DWITH_TARGET_WORD_BITSIZE=32 -DWITH_TARGET_WORD_MSB=0"
- fi ;;
- 64) if test x"$wire_word_msb" != x -a x"$wire_word_msb" != x0; then
- sim_bitsize="-DWITH_TARGET_WORD_BITSIZE=64 -DWITH_TARGET_WORD_MSB=63"
- else
- sim_bitsize="-DWITH_TARGET_WORD_BITSIZE=64 -DWITH_TARGET_WORD_MSB=0"
- fi ;;
- *) { echo "configure: error: "--enable-sim-bitsize was given $enableval. Expected 32 or 64"" 1>&2; exit 1; } ;;
-esac
-# address bitsize
-tmp=`echo "${enableval}" | sed -e "s/^[0-9]*,*[0-9]*,*//"`
-case x"${tmp}" in
- x ) ;;
- x32 | x32,* ) sim_bitsize="${sim_bitsize} -DWITH_TARGET_ADDRESS_BITSIZE=32" ;;
- x64 | x64,* ) sim_bitsize="${sim_bitsize} -DWITH_TARGET_ADDRESS_BITSIZE=64" ;;
- * ) { echo "configure: error: "--enable-sim-bitsize was given address size $enableval. Expected 32 or 64"" 1>&2; exit 1; } ;;
-esac
-# cell bitsize
-tmp=`echo "${enableval}" | sed -e "s/^[0-9]*,*[0-9*]*,*[0-9]*,*//"`
-case x"${tmp}" in
- x ) ;;
- x32 | x32,* ) sim_bitsize="${sim_bitsize} -DWITH_TARGET_CELL_BITSIZE=32" ;;
- x64 | x64,* ) sim_bitsize="${sim_bitsize} -DWITH_TARGET_CELL_BITSIZE=64" ;;
- * ) { echo "configure: error: "--enable-sim-bitsize was given cell size $enableval. Expected 32 or 64"" 1>&2; exit 1; } ;;
-esac
-if test x"$silent" != x"yes" && test x"$sim_bitsize" != x""; then
- echo "Setting bitsize flags = $sim_bitsize" 6>&1
-fi
-else
- sim_bitsize=""
-if test x"$wire_word_bitsize" != x; then
- sim_bitsize="$sim_bitsize -DWITH_TARGET_WORD_BITSIZE=$wire_word_bitsize"
-fi
-if test x"$wire_word_msb" != x; then
- sim_bitsize="$sim_bitsize -DWITH_TARGET_WORD_MSB=$wire_word_msb"
-fi
-if test x"$wire_address_bitsize" != x; then
- sim_bitsize="$sim_bitsize -DWITH_TARGET_ADDRESS_BITSIZE=$wire_address_bitsize"
-fi
-if test x"$wire_cell_bitsize" != x; then
- sim_bitsize="$sim_bitsize -DWITH_TARGET_CELL_BITSIZE=$wire_cell_bitsize"
-fi
-fi
-
-
-for ac_hdr in stdlib.h unistd.h string.h strings.h
-do
-ac_safe=`echo "$ac_hdr" | sed 'y%./+-%__p_%'`
-echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6
-echo "configure:3881: checking for $ac_hdr" >&5
-if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 3886 "configure"
-#include "confdefs.h"
-#include <$ac_hdr>
-EOF
-ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:3891: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
-ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
-if test -z "$ac_err"; then
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=yes"
-else
- echo "$ac_err" >&5
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=no"
-fi
-rm -f conftest*
-fi
-if eval "test \"`echo '$ac_cv_header_'$ac_safe`\" = yes"; then
- echo "$ac_t""yes" 1>&6
- ac_tr_hdr=HAVE_`echo $ac_hdr | sed 'y%abcdefghijklmnopqrstuvwxyz./-%ABCDEFGHIJKLMNOPQRSTUVWXYZ___%'`
- cat >> confdefs.h <<EOF
-#define $ac_tr_hdr 1
-EOF
-
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- echo "$ac_t""no" 1>&6
-fi
-done
-
-for ac_func in getpid kill
-do
-echo $ac_n "checking for $ac_func""... $ac_c" 1>&6
-echo "configure:3920: checking for $ac_func" >&5
-if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 3925 "configure"
-#include "confdefs.h"
-/* System header to define __stub macros and hopefully few prototypes,
- which can conflict with char $ac_func(); below. */
-#include <assert.h>
-/* Override any gcc2 internal prototype to avoid an error. */
-/* We use char because int might match the return type of a gcc2
- builtin and then its argument prototype would still apply. */
-char $ac_func();
-
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-
-/* The GNU C library defines this for functions which it implements
- to always fail with ENOSYS. Some functions are actually named
- something starting with __ and the normal name is an alias. */
-#if defined (__stub_$ac_func) || defined (__stub___$ac_func)
-choke me
-#else
-$ac_func();
-#endif
-
-; return 0; }
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-if { (eval echo configure:3948: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=yes"
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=no"
-fi
-rm -f conftest*
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-
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- ac_tr_func=HAVE_`echo $ac_func | tr 'abcdefghijklmnopqrstuvwxyz' 'ABCDEFGHIJKLMNOPQRSTUVWXYZ'`
- cat >> confdefs.h <<EOF
-#define $ac_tr_func 1
-EOF
-
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- echo "$ac_t""no" 1>&6
-fi
-done
-
-
-
-
-trap '' 1 2 15
-cat > confcache <<\EOF
-# This file is a shell script that caches the results of configure
-# tests run on this system so they can be shared between configure
-# scripts and configure runs. It is not useful on other systems.
-# If it contains results you don't want to keep, you may remove or edit it.
-#
-# By default, configure uses ./config.cache as the cache file,
-# creating it if it does not exist already. You can give configure
-# the --cache-file=FILE option to use a different cache file; that is
-# what configure does when it calls configure scripts in
-# subdirectories, so they share the cache.
-# Giving --cache-file=/dev/null disables caching, for debugging configure.
-# config.status only pays attention to the cache file if you give it the
-# --recheck option to rerun configure.
-#
-EOF
-# The following way of writing the cache mishandles newlines in values,
-# but we know of no workaround that is simple, portable, and efficient.
-# So, don't put newlines in cache variables' values.
-# Ultrix sh set writes to stderr and can't be redirected directly,
-# and sets the high bit in the cache file unless we assign to the vars.
-(set) 2>&1 |
- case `(ac_space=' '; set | grep ac_space) 2>&1` in
- *ac_space=\ *)
- # `set' does not quote correctly, so add quotes (double-quote substitution
- # turns \\\\ into \\, and sed turns \\ into \).
- sed -n \
- -e "s/'/'\\\\''/g" \
- -e "s/^\\([a-zA-Z0-9_]*_cv_[a-zA-Z0-9_]*\\)=\\(.*\\)/\\1=\${\\1='\\2'}/p"
- ;;
- *)
- # `set' quotes correctly as required by POSIX, so do not add quotes.
- sed -n -e 's/^\([a-zA-Z0-9_]*_cv_[a-zA-Z0-9_]*\)=\(.*\)/\1=${\1=\2}/p'
- ;;
- esac >> confcache
-if cmp -s $cache_file confcache; then
- :
-else
- if test -w $cache_file; then
- echo "updating cache $cache_file"
- cat confcache > $cache_file
- else
- echo "not updating unwritable cache $cache_file"
- fi
-fi
-rm -f confcache
-
-trap 'rm -fr conftest* confdefs* core core.* *.core $ac_clean_files; exit 1' 1 2 15
-
-test "x$prefix" = xNONE && prefix=$ac_default_prefix
-# Let make expand exec_prefix.
-test "x$exec_prefix" = xNONE && exec_prefix='${prefix}'
-
-# Any assignment to VPATH causes Sun make to only execute
-# the first set of double-colon rules, so remove it if not needed.
-# If there is a colon in the path, we need to keep it.
-if test "x$srcdir" = x.; then
- ac_vpsub='/^[ ]*VPATH[ ]*=[^:]*$/d'
-fi
-
-trap 'rm -f $CONFIG_STATUS conftest*; exit 1' 1 2 15
-
-DEFS=-DHAVE_CONFIG_H
-
-# Without the "./", some shells look in PATH for config.status.
-: ${CONFIG_STATUS=./config.status}
-
-echo creating $CONFIG_STATUS
-rm -f $CONFIG_STATUS
-cat > $CONFIG_STATUS <<EOF
-#! /bin/sh
-# Generated automatically by configure.
-# Run this file to recreate the current configuration.
-# This directory was configured as follows,
-# on host `(hostname || uname -n) 2>/dev/null | sed 1q`:
-#
-# $0 $ac_configure_args
-#
-# Compiler output produced by configure, useful for debugging
-# configure, is in ./config.log if it exists.
-
-ac_cs_usage="Usage: $CONFIG_STATUS [--recheck] [--version] [--help]"
-for ac_option
-do
- case "\$ac_option" in
- -recheck | --recheck | --rechec | --reche | --rech | --rec | --re | --r)
- echo "running \${CONFIG_SHELL-/bin/sh} $0 $ac_configure_args --no-create --no-recursion"
- exec \${CONFIG_SHELL-/bin/sh} $0 $ac_configure_args --no-create --no-recursion ;;
- -version | --version | --versio | --versi | --vers | --ver | --ve | --v)
- echo "$CONFIG_STATUS generated by autoconf version 2.13"
- exit 0 ;;
- -help | --help | --hel | --he | --h)
- echo "\$ac_cs_usage"; exit 0 ;;
- *) echo "\$ac_cs_usage"; exit 1 ;;
- esac
-done
-
-ac_given_srcdir=$srcdir
-ac_given_INSTALL="$INSTALL"
-
-trap 'rm -fr `echo "Makefile.sim:Makefile.in Make-common.sim:../common/Make-common.in .gdbinit:../common/gdbinit.in config.h:config.in" | sed "s/:[^ ]*//g"` conftest*; exit 1' 1 2 15
-EOF
-cat >> $CONFIG_STATUS <<EOF
-
-# Protect against being on the right side of a sed subst in config.status.
-sed 's/%@/@@/; s/@%/@@/; s/%g\$/@g/; /@g\$/s/[\\\\&%]/\\\\&/g;
- s/@@/%@/; s/@@/@%/; s/@g\$/%g/' > conftest.subs <<\\CEOF
-$ac_vpsub
-$extrasub
-s%@sim_environment@%$sim_environment%g
-s%@sim_alignment@%$sim_alignment%g
-s%@sim_assert@%$sim_assert%g
-s%@sim_bitsize@%$sim_bitsize%g
-s%@sim_endian@%$sim_endian%g
-s%@sim_hostendian@%$sim_hostendian%g
-s%@sim_float@%$sim_float%g
-s%@sim_scache@%$sim_scache%g
-s%@sim_default_model@%$sim_default_model%g
-s%@sim_hw_cflags@%$sim_hw_cflags%g
-s%@sim_hw_objs@%$sim_hw_objs%g
-s%@sim_hw@%$sim_hw%g
-s%@sim_inline@%$sim_inline%g
-s%@sim_packages@%$sim_packages%g
-s%@sim_regparm@%$sim_regparm%g
-s%@sim_reserved_bits@%$sim_reserved_bits%g
-s%@sim_smp@%$sim_smp%g
-s%@sim_stdcall@%$sim_stdcall%g
-s%@sim_xor_endian@%$sim_xor_endian%g
-s%@WARN_CFLAGS@%$WARN_CFLAGS%g
-s%@WERROR_CFLAGS@%$WERROR_CFLAGS%g
-s%@SHELL@%$SHELL%g
-s%@CFLAGS@%$CFLAGS%g
-s%@CPPFLAGS@%$CPPFLAGS%g
-s%@CXXFLAGS@%$CXXFLAGS%g
-s%@FFLAGS@%$FFLAGS%g
-s%@DEFS@%$DEFS%g
-s%@LDFLAGS@%$LDFLAGS%g
-s%@LIBS@%$LIBS%g
-s%@exec_prefix@%$exec_prefix%g
-s%@prefix@%$prefix%g
-s%@program_transform_name@%$program_transform_name%g
-s%@bindir@%$bindir%g
-s%@sbindir@%$sbindir%g
-s%@libexecdir@%$libexecdir%g
-s%@datadir@%$datadir%g
-s%@sysconfdir@%$sysconfdir%g
-s%@sharedstatedir@%$sharedstatedir%g
-s%@localstatedir@%$localstatedir%g
-s%@libdir@%$libdir%g
-s%@includedir@%$includedir%g
-s%@oldincludedir@%$oldincludedir%g
-s%@infodir@%$infodir%g
-s%@mandir@%$mandir%g
-s%@host@%$host%g
-s%@host_alias@%$host_alias%g
-s%@host_cpu@%$host_cpu%g
-s%@host_vendor@%$host_vendor%g
-s%@host_os@%$host_os%g
-s%@target@%$target%g
-s%@target_alias@%$target_alias%g
-s%@target_cpu@%$target_cpu%g
-s%@target_vendor@%$target_vendor%g
-s%@target_os@%$target_os%g
-s%@build@%$build%g
-s%@build_alias@%$build_alias%g
-s%@build_cpu@%$build_cpu%g
-s%@build_vendor@%$build_vendor%g
-s%@build_os@%$build_os%g
-s%@CC@%$CC%g
-s%@INSTALL_PROGRAM@%$INSTALL_PROGRAM%g
-s%@INSTALL_SCRIPT@%$INSTALL_SCRIPT%g
-s%@INSTALL_DATA@%$INSTALL_DATA%g
-s%@CC_FOR_BUILD@%$CC_FOR_BUILD%g
-s%@HDEFINES@%$HDEFINES%g
-s%@AR@%$AR%g
-s%@RANLIB@%$RANLIB%g
-s%@SET_MAKE@%$SET_MAKE%g
-s%@CPP@%$CPP%g
-s%@ALLOCA@%$ALLOCA%g
-s%@USE_NLS@%$USE_NLS%g
-s%@MSGFMT@%$MSGFMT%g
-s%@GMSGFMT@%$GMSGFMT%g
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-s%@USE_INCLUDED_LIBINTL@%$USE_INCLUDED_LIBINTL%g
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-s%@CATOBJEXT@%$CATOBJEXT%g
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-s%@sim_cflags@%$sim_cflags%g
-s%@sim_debug@%$sim_debug%g
-s%@sim_stdio@%$sim_stdio%g
-s%@sim_trace@%$sim_trace%g
-s%@sim_profile@%$sim_profile%g
-s%@EXEEXT@%$EXEEXT%g
-
-CEOF
-EOF
-
-cat >> $CONFIG_STATUS <<\EOF
-
-# Split the substitutions into bite-sized pieces for seds with
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- else
- sed "${ac_end}q" conftest.subs > conftest.s$ac_file
- fi
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- ac_more_lines=false
- rm -f conftest.s$ac_file
- else
- if test -z "$ac_sed_cmds"; then
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- fi
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- ac_sed_cmds=cat
-fi
-EOF
-
-cat >> $CONFIG_STATUS <<EOF
-
-CONFIG_FILES=\${CONFIG_FILES-"Makefile.sim:Makefile.in Make-common.sim:../common/Make-common.in .gdbinit:../common/gdbinit.in"}
-EOF
-cat >> $CONFIG_STATUS <<\EOF
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- ac_file=`echo "$ac_file"|sed 's%:.*%%'` ;;
- *) ac_file_in="${ac_file}.in" ;;
- esac
-
- # Adjust a relative srcdir, top_srcdir, and INSTALL for subdirectories.
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-
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- /*) srcdir="$ac_given_srcdir$ac_dir_suffix"; top_srcdir="$ac_given_srcdir" ;;
- *) # Relative path.
- srcdir="$ac_dots$ac_given_srcdir$ac_dir_suffix"
- top_srcdir="$ac_dots$ac_given_srcdir" ;;
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-
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- esac
-
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- configure_input="Generated automatically from `echo $ac_file_in|sed 's%.*/%%'` by configure."
- case "$ac_file" in
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- *) ac_comsub= ;;
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-
- ac_file_inputs=`echo $ac_file_in|sed -e "s%^%$ac_given_srcdir/%" -e "s%:% $ac_given_srcdir/%g"`
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-s%@configure_input@%$configure_input%g
-s%@srcdir@%$srcdir%g
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-" $ac_file_inputs | (eval "$ac_sed_cmds") > $ac_file
-fi; done
-rm -f conftest.s*
-
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-#
-# ac_d sets the value in "#define NAME VALUE" lines.
-ac_dA='s%^\([ ]*\)#\([ ]*define[ ][ ]*\)'
-ac_dB='\([ ][ ]*\)[^ ]*%\1#\2'
-ac_dC='\3'
-ac_dD='%g'
-# ac_u turns "#undef NAME" with trailing blanks into "#define NAME VALUE".
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-ac_uB='\([ ]\)%\1#\2define\3'
-ac_uC=' '
-ac_uD='\4%g'
-# ac_e turns "#undef NAME" without trailing blanks into "#define NAME VALUE".
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-ac_eB='$%\1#\2define\3'
-ac_eC=' '
-ac_eD='%g'
-
-if test "${CONFIG_HEADERS+set}" != set; then
-EOF
-cat >> $CONFIG_STATUS <<EOF
- CONFIG_HEADERS="config.h:config.in"
-EOF
-cat >> $CONFIG_STATUS <<\EOF
-fi
-for ac_file in .. $CONFIG_HEADERS; do if test "x$ac_file" != x..; then
- # Support "outfile[:infile[:infile...]]", defaulting infile="outfile.in".
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- ac_file=`echo "$ac_file"|sed 's%:.*%%'` ;;
- *) ac_file_in="${ac_file}.in" ;;
- esac
-
- echo creating $ac_file
-
- rm -f conftest.frag conftest.in conftest.out
- ac_file_inputs=`echo $ac_file_in|sed -e "s%^%$ac_given_srcdir/%" -e "s%:% $ac_given_srcdir/%g"`
- cat $ac_file_inputs > conftest.in
-
-EOF
-
-# Transform confdefs.h into a sed script conftest.vals that substitutes
-# the proper values into config.h.in to produce config.h. And first:
-# Protect against being on the right side of a sed subst in config.status.
-# Protect against being in an unquoted here document in config.status.
-rm -f conftest.vals
-cat > conftest.hdr <<\EOF
-s/[\\&%]/\\&/g
-s%[\\$`]%\\&%g
-s%#define \([A-Za-z_][A-Za-z0-9_]*\) *\(.*\)%${ac_dA}\1${ac_dB}\1${ac_dC}\2${ac_dD}%gp
-s%ac_d%ac_u%gp
-s%ac_u%ac_e%gp
-EOF
-sed -n -f conftest.hdr confdefs.h > conftest.vals
-rm -f conftest.hdr
-
-# This sed command replaces #undef with comments. This is necessary, for
-# example, in the case of _POSIX_SOURCE, which is predefined and required
-# on some systems where configure will not decide to define it.
-cat >> conftest.vals <<\EOF
-s%^[ ]*#[ ]*undef[ ][ ]*[a-zA-Z_][a-zA-Z_0-9]*%/* & */%
-EOF
-
-# Break up conftest.vals because some shells have a limit on
-# the size of here documents, and old seds have small limits too.
-
-rm -f conftest.tail
-while :
-do
- ac_lines=`grep -c . conftest.vals`
- # grep -c gives empty output for an empty file on some AIX systems.
- if test -z "$ac_lines" || test "$ac_lines" -eq 0; then break; fi
- # Write a limited-size here document to conftest.frag.
- echo ' cat > conftest.frag <<CEOF' >> $CONFIG_STATUS
- sed ${ac_max_here_lines}q conftest.vals >> $CONFIG_STATUS
- echo 'CEOF
- sed -f conftest.frag conftest.in > conftest.out
- rm -f conftest.in
- mv conftest.out conftest.in
-' >> $CONFIG_STATUS
- sed 1,${ac_max_here_lines}d conftest.vals > conftest.tail
- rm -f conftest.vals
- mv conftest.tail conftest.vals
-done
-rm -f conftest.vals
-
-cat >> $CONFIG_STATUS <<\EOF
- rm -f conftest.frag conftest.h
- echo "/* $ac_file. Generated automatically by configure. */" > conftest.h
- cat conftest.in >> conftest.h
- rm -f conftest.in
- if cmp -s $ac_file conftest.h 2>/dev/null; then
- echo "$ac_file is unchanged"
- rm -f conftest.h
- else
- # Remove last slash and all that follows it. Not all systems have dirname.
- ac_dir=`echo $ac_file|sed 's%/[^/][^/]*$%%'`
- if test "$ac_dir" != "$ac_file" && test "$ac_dir" != .; then
- # The file is in a subdirectory.
- test ! -d "$ac_dir" && mkdir "$ac_dir"
- fi
- rm -f $ac_file
- mv conftest.h $ac_file
- fi
-fi; done
-
-EOF
-
-cat >> $CONFIG_STATUS <<EOF
-ac_sources="$sim_link_files"
-ac_dests="$sim_link_links"
-EOF
-
-cat >> $CONFIG_STATUS <<\EOF
-srcdir=$ac_given_srcdir
-while test -n "$ac_sources"; do
- set $ac_dests; ac_dest=$1; shift; ac_dests=$*
- set $ac_sources; ac_source=$1; shift; ac_sources=$*
-
- echo "linking $srcdir/$ac_source to $ac_dest"
-
- if test ! -r $srcdir/$ac_source; then
- { echo "configure: error: $srcdir/$ac_source: File not found" 1>&2; exit 1; }
- fi
- rm -f $ac_dest
-
- # Make relative symlinks.
- # Remove last slash and all that follows it. Not all systems have dirname.
- ac_dest_dir=`echo $ac_dest|sed 's%/[^/][^/]*$%%'`
- if test "$ac_dest_dir" != "$ac_dest" && test "$ac_dest_dir" != .; then
- # The dest file is in a subdirectory.
- test ! -d "$ac_dest_dir" && mkdir "$ac_dest_dir"
- ac_dest_dir_suffix="/`echo $ac_dest_dir|sed 's%^\./%%'`"
- # A "../" for each directory in $ac_dest_dir_suffix.
- ac_dots=`echo $ac_dest_dir_suffix|sed 's%/[^/]*%../%g'`
- else
- ac_dest_dir_suffix= ac_dots=
- fi
-
- case "$srcdir" in
- [/$]*) ac_rel_source="$srcdir/$ac_source" ;;
- *) ac_rel_source="$ac_dots$srcdir/$ac_source" ;;
- esac
-
- # Make a symlink if possible; otherwise try a hard link.
- if ln -s $ac_rel_source $ac_dest 2>/dev/null ||
- ln $srcdir/$ac_source $ac_dest; then :
- else
- { echo "configure: error: can not link $ac_dest to $srcdir/$ac_source" 1>&2; exit 1; }
- fi
-done
-EOF
-cat >> $CONFIG_STATUS <<EOF
-
-EOF
-cat >> $CONFIG_STATUS <<\EOF
-case "x$CONFIG_FILES" in
- xMakefile*)
- echo "Merging Makefile.sim+Make-common.sim into Makefile ..."
- rm -f Makesim1.tmp Makesim2.tmp Makefile
- sed -n -e '/^## COMMON_PRE_/,/^## End COMMON_PRE_/ p' <Make-common.sim >Makesim1.tmp
- sed -n -e '/^## COMMON_POST_/,/^## End COMMON_POST_/ p' <Make-common.sim >Makesim2.tmp
- sed -e '/^## COMMON_PRE_/ r Makesim1.tmp' \
- -e '/^## COMMON_POST_/ r Makesim2.tmp' \
- <Makefile.sim >Makefile
- rm -f Makefile.sim Make-common.sim Makesim1.tmp Makesim2.tmp
- ;;
- esac
- case "x$CONFIG_HEADERS" in xconfig.h:config.in) echo > stamp-h ;; esac
-
-exit 0
-EOF
-chmod +x $CONFIG_STATUS
-rm -fr confdefs* $ac_clean_files
-test "$no_create" = yes || ${CONFIG_SHELL-/bin/sh} $CONFIG_STATUS || exit 1
-
-
diff --git a/sim/tic80/configure.in b/sim/tic80/configure.in
deleted file mode 100644
index 730b62e6cfd..00000000000
--- a/sim/tic80/configure.in
+++ /dev/null
@@ -1,21 +0,0 @@
-dnl Process this file with autoconf to produce a configure script.
-sinclude(../common/aclocal.m4)
-AC_PREREQ(2.5)dnl
-AC_INIT(Makefile.in)
-
-SIM_AC_COMMON
-
-dnl Options available in this module
-SIM_AC_OPTION_INLINE(0)
-SIM_AC_OPTION_ENDIAN(LITTLE_ENDIAN)
-SIM_AC_OPTION_ALIGNMENT(FORCED_ALIGNMENT)
-SIM_AC_OPTION_HOSTENDIAN
-SIM_AC_OPTION_WARNINGS
-SIM_AC_OPTION_RESERVED_BITS(1)
-SIM_AC_OPTION_BITSIZE(32,31)
-
-dnl For UNIX emulation
-AC_CHECK_HEADERS(stdlib.h unistd.h string.h strings.h)
-AC_CHECK_FUNCS(getpid kill)
-
-SIM_AC_OUTPUT
diff --git a/sim/tic80/cpu.h b/sim/tic80/cpu.h
deleted file mode 100644
index 642c18103db..00000000000
--- a/sim/tic80/cpu.h
+++ /dev/null
@@ -1,345 +0,0 @@
-/* TIc80 Simulator.
- Copyright (C) 1997, 1998 Free Software Foundation, Inc.
- Contributed by Cygnus Support.
-
-This file is part of GDB, the GNU debugger.
-
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License along
-with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
-
-
-
-/* TI C80 control registers */
-
-typedef enum {
- EPC_CR,
- EIP_CR,
- CONFIG_CR,
- INTPEN_CR,
- IE_CR,
- FPST_CR,
- PPERROR_CR,
- PKTREQ_CR,
- TCOUNT_CR,
- TSCALE_CR,
- FLTOP_CR,
- FLTADR_CR,
- FLTTAG_CR,
- FLTDLT_CR,
- FLTDTH_CR,
- FLT005_CR,
- FLT006_CR,
- FLT007_CR,
- FLT008_CR,
- FLT009_CR,
- FLT010_CR,
- FLT011_CR,
- FLT012_CR,
- FLT013_CR,
- FLT014_CR,
- FLT015_CR,
- SYSSTK_CR,
- SYSTMP_CR,
- MPC_CR,
- MIP_CR,
- ECOMCNTL_CR,
- ANASTAT_CR,
- BRK1_CR,
- BRK2_CR,
- ITAG0_CR,
- ITAG1_CR,
- ITAG2_CR,
- ITAG3_CR,
- ITAG4_CR,
- ITAG5_CR,
- ITAG6_CR,
- ITAG7_CR,
- ITAG8_CR,
- ITAG9_CR,
- ITAG10_CR,
- ITAG11_CR,
- ITAG12_CR,
- ITAG13_CR,
- ITAG14_CR,
- ITAG15_CR,
- ILRU_CR,
- DTAG0_CR,
- DTAG1_CR,
- DTAG2_CR,
- DTAG3_CR,
- DTAG4_CR,
- DTAG5_CR,
- DTAG6_CR,
- DTAG7_CR,
- DTAG8_CR,
- DTAG9_CR,
- DTAG10_CR,
- DTAG11_CR,
- DTAG12_CR,
- DTAG13_CR,
- DTAG14_CR,
- DTAG15_CR,
- DLRU_CR,
- IN0P_CR,
- IN1P_CR,
- OUTP_CR,
- SCRATCH_CR,
- nr_tic80_control_regs,
-} tic80_control_regs;
-
-/* extern int tic80_cr2index (tic80_control_regs reg); */
-
-/* Map an instruction CR index onto the corresponding internal cr enum
- or SCRATCH_CR if the index is invalid */
-
-extern tic80_control_regs tic80_index2cr (int index);
-
-
-/* TIc80 interrupt register bits */
-
-enum {
- IE_CR_PE = BIT32(31),
- IE_CR_X4 = BIT32(30),
- IE_CR_X3 = BIT32(29),
- IE_CR_BP = BIT32(28),
- IE_CR_PB = BIT32(27),
- IE_CR_PC = BIT32(26),
- IE_CR_MI = BIT32(25),
- /**/
- IE_CR_P3 = BIT32(19),
- IE_CR_P2 = BIT32(18),
- IE_CR_P1 = BIT32(17),
- IE_CR_P0 = BIT32(16),
- IE_CR_IO = BIT32(15),
- IE_CR_MF = BIT32(14),
- /**/
- IE_CR_X2 = BIT32(12),
- IE_CR_X1 = BIT32(11),
- IE_CR_TI = BIT32(10),
- IE_CR_F1 = BIT32(9),
- IE_CR_F0 = BIT32(8),
- IE_CR_FX = BIT32(7),
- IE_CR_FU = BIT32(6),
- IE_CR_FO = BIT32(5),
- /**/
- IE_CR_FZ = BIT32(3),
- IE_CR_FI = BIT32(2),
- /**/
- IE_CR_IE = BIT32(0),
-};
-
-
-
-
-struct _sim_cpu {
- unsigned32 reg[32];
- unsigned64 acc[4];
- unsigned32 cr[nr_tic80_control_regs];
- int is_user_mode; /* hidden mode latch */
- sim_cia cia;
- sim_cpu_base base;
-};
-
-#define CIA_GET(CPU) ((CPU)->cia)
-#define CIA_SET(CPU,VAL) ((CPU)->cia = (VAL))
-
-#define GPR(N) ((CPU)->reg[N])
-#define GPR_CLEAR(N) (GPR((N)) = 0)
-#define ACC(N) ((CPU)->acc[N])
-#define CR(N) ((CPU)->cr[tic80_index2cr ((N))])
-
-
-
-#if defined(WITH_TRACE)
-extern char *tic80_trace_alu3 PARAMS ((int, unsigned32, unsigned32, unsigned32));
-extern char *tic80_trace_cmp PARAMS ((int, unsigned32, unsigned32, unsigned32));
-extern char *tic80_trace_alu2 PARAMS ((int, unsigned32, unsigned32));
-extern char *tic80_trace_shift PARAMS ((int, unsigned32, unsigned32, int, int, int, int, int));
-extern void tic80_trace_fpu3 PARAMS ((SIM_DESC, sim_cpu *, sim_cia, int, sim_fpu *, sim_fpu *, sim_fpu *));
-extern void tic80_trace_fpu2 PARAMS ((SIM_DESC, sim_cpu *, sim_cia, int, sim_fpu *, sim_fpu *));
-extern void tic80_trace_fpu1 PARAMS ((SIM_DESC, sim_cpu *, sim_cia, int, sim_fpu *));
-extern void tic80_trace_fpu2i PARAMS ((SIM_DESC, sim_cpu *, sim_cia, int, unsigned32, sim_fpu *, sim_fpu *));
-extern void tic80_trace_fpu2cmp PARAMS ((SIM_DESC, sim_cpu *, sim_cia, int, unsigned32, sim_fpu *, sim_fpu *));
-extern char *tic80_trace_nop PARAMS ((int));
-extern char *tic80_trace_sink1 PARAMS ((int, unsigned32));
-extern char *tic80_trace_sink2 PARAMS ((int, unsigned32, unsigned32));
-extern char *tic80_trace_sink3 PARAMS ((int, unsigned32, unsigned32, unsigned32));
-extern char *tic80_trace_cond_br PARAMS ((int, int, unsigned32, unsigned32, int, int));
-extern char *tic80_trace_ucond_br PARAMS ((int, unsigned32));
-extern void tic80_trace_ldst PARAMS ((SIM_DESC, sim_cpu *, sim_cia, int, int, int, int, unsigned32, unsigned32, unsigned32));
-
-#define TRACE_ALU3(indx, result, input1, input2) \
-do { \
- if (TRACE_ALU_P (CPU)) { \
- trace_one_insn (SD, CPU, cia.ip, 1, itable[indx].file, \
- itable[indx].line_nr, "alu", \
- tic80_trace_alu3 (indx, result, input1, input2)); \
- } \
-} while (0)
-
-#define TRACE_CMP(indx, result, input1, input2) \
-do { \
- if (TRACE_ALU_P (CPU)) { \
- trace_one_insn (SD, CPU, cia.ip, 1, itable[indx].file, \
- itable[indx].line_nr, "alu", \
- tic80_trace_cmp (indx, result, input1, input2)); \
- } \
-} while (0)
-
-#define TRACE_ALU2(indx, result, input) \
-do { \
- if (TRACE_ALU_P (CPU)) { \
- trace_one_insn (SD, CPU, cia.ip, 1, itable[indx].file, \
- itable[indx].line_nr, "alu", \
- tic80_trace_alu2 (indx, result, input)); \
- } \
-} while (0)
-
-#define TRACE_SHIFT(indx, result, input, i, n, merge, endmask, rotate) \
-do { \
- if (TRACE_ALU_P (CPU)) { \
- trace_one_insn (SD, CPU, cia.ip, 1, itable[indx].file, \
- itable[indx].line_nr, "shift", \
- tic80_trace_shift (indx, result, input, i, n, \
- merge, endmask, rotate)); \
- } \
-} while (0)
-
-#define TRACE_FPU3(result, input1, input2) \
-do { \
- if (TRACE_FPU_P (CPU)) { \
- tic80_trace_fpu3 (SD, CPU, cia, MY_INDEX, \
- &result, &input1, &input2); \
- } \
-} while (0)
-
-#define TRACE_FPU2(result, input) \
-do { \
- if (TRACE_FPU_P (CPU)) { \
- tic80_trace_fpu2 (SD, CPU, cia, MY_INDEX, \
- &result, &input); \
- } \
-} while (0)
-
-#define TRACE_FPU1(result) \
-do { \
- if (TRACE_FPU_P (CPU)) { \
- tic80_trace_fpu1 (SD, CPU, cia, MY_INDEX, \
- &result); \
- } \
-} while (0)
-
-#define TRACE_FPU2I(result, input1, input2) \
-do { \
- if (TRACE_FPU_P (CPU)) { \
- tic80_trace_fpu2i (SD, CPU, cia, MY_INDEX, \
- result, &input1, &input2); \
- } \
-} while (0)
-
-#define TRACE_FPU2CMP(result, input1, input2) \
-do { \
- if (TRACE_FPU_P (CPU)) { \
- tic80_trace_fpu2cmp (SD, CPU, cia, MY_INDEX, \
- result, &input1, &input2); \
- } \
-} while (0)
-
-#define TRACE_NOP(indx) \
-do { \
- if (TRACE_ALU_P (CPU)) { \
- trace_one_insn (SD, CPU, cia.ip, 1, itable[indx].file, \
- itable[indx].line_nr, "nop", \
- tic80_trace_nop (indx)); \
- } \
-} while (0)
-
-#define TRACE_SINK1(indx, input) \
-do { \
- if (TRACE_ALU_P (CPU)) { \
- trace_one_insn (SD, CPU, cia.ip, 1, itable[indx].file, \
- itable[indx].line_nr, "nop", \
- tic80_trace_sink1 (indx, input)); \
- } \
-} while (0)
-
-#define TRACE_SINK2(indx, input1, input2) \
-do { \
- if (TRACE_ALU_P (CPU)) { \
- trace_one_insn (SD, CPU, cia.ip, 1, itable[indx].file, \
- itable[indx].line_nr, "nop", \
- tic80_trace_sink2 (indx, input1, input2)); \
- } \
-} while (0)
-
-#define TRACE_SINK3(indx, input1, input2, input3) \
-do { \
- if (TRACE_ALU_P (CPU)) { \
- trace_one_insn (SD, CPU, cia.ip, 1, itable[indx].file, \
- itable[indx].line_nr, "nop", \
- tic80_trace_sink3 (indx, input1, input2, input3)); \
- } \
-} while (0)
-
-#define TRACE_COND_BR(indx, jump_p, cond, target, size, code) \
-do { \
- if (TRACE_BRANCH_P (CPU)) { \
- trace_one_insn (SD, CPU, cia.ip, 1, itable[indx].file, \
- itable[indx].line_nr, "branch", \
- tic80_trace_cond_br (indx, jump_p, cond, target, \
- size, code)); \
- } \
-} while (0)
-
-#define TRACE_UCOND_BR(indx, target) \
-do { \
- if (TRACE_BRANCH_P (CPU)) { \
- trace_one_insn (SD, CPU, cia.ip, 1, itable[indx].file, \
- itable[indx].line_nr, "branch", \
- tic80_trace_ucond_br (indx, target)); \
- } \
-} while (0)
-
-#define TRACE_LD(result, m, s, addr1, addr2) \
-do { \
- if (TRACE_MEMORY_P (CPU)) { \
- tic80_trace_ldst (SD, CPU, cia, MY_INDEX, \
- 0, m, s, result, addr1, addr2); \
- } \
-} while (0)
-
-#define TRACE_ST(value, m, s, addr1, addr2) \
-do { \
- if (TRACE_MEMORY_P (CPU)) { \
- tic80_trace_ldst (SD, CPU, cia, MY_INDEX, \
- 1, m, s, value, addr1, addr2); \
- } \
-} while (0)
-
-#else
-#define TRACE_ALU3(indx, result, input1, input2)
-#define TRACE_ALU2(indx, result, input)
-#define TRACE_FPU3(result, input1, input2)
-#define TRACE_FPU2(result, input)
-#define TRACE_FPU1(result)
-#define TRACE_FPU2I(result, input1, input2)
-#define TRACE_NOP(indx)
-#define TRACE_SINK1(indx, input)
-#define TRACE_SINK2(indx, input1, input2)
-#define TRACE_SINK3(indx, input1, input2, input3)
-#define TRACE_COND_BR(indx, jump_p, cond, target, size, code)
-#define TRACE_UCOND_BR(indx, target)
-#define TRACE_LD(m, s, result, addr1, addr2)
-#define TRACE_ST(m, s, value, addr1, addr2)
-#endif
diff --git a/sim/tic80/interp.c b/sim/tic80/interp.c
deleted file mode 100644
index 17f06d486c2..00000000000
--- a/sim/tic80/interp.c
+++ /dev/null
@@ -1,127 +0,0 @@
-/* This file is part of the GDB simulators.
-
- Copyright (C) 1997, Free Software Foundation
- Condtributed by Cyngnus Solutions.
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-
-#include "sim-main.h"
-
-#include "idecode.h"
-#include "itable.h"
-
-#ifdef HAVE_STRING_H
-#include <string.h>
-#else
-#ifdef HAVE_STRINGS_H
-#include <strings.h>
-#endif
-#endif
-
-
-#if 0
-
-void
-engine_error (SIM_DESC sd,
- sim_cpu *cpu,
- instruction_address cia,
- const char *fmt,
- ...)
-{
- va_list ap;
- va_start (ap, fmt);
- sim_io_evprintf (sd, fmt, ap);
- va_end (ap);
-
- sim_halt (sd, cpu, NULL, cia, sim_stopped, SIGABRT);
-}
-
-void
-engine_halt (SIM_DESC sd,
- sim_cpu *cpu,
- instruction_address cia,
- enum sim_stop reason,
- int siggnal)
-{
- if (!sd->halt_ok)
- sim_io_error (sd, "engine_halt - bad longjmp");
- sd->reason = reason;
- sd->siggnal = siggnal;
- sd->halt_ok = 0;
- sd->restart_ok = 0;
- if (cpu != NULL)
- cpu->cia = cia;
- longjmp (sd->path_to_halt, 1);
-}
-
-void
-engine_restart (SIM_DESC sd,
- sim_cpu *cpu,
- instruction_address cia)
-{
- if (!sd->restart_ok)
- sim_io_error (sd, "engine_restart - bad longjmp");
- sd->restart_ok = 0;
- cpu->cia = cia;
- longjmp(sd->path_to_restart, 1);
-}
-
-
-void
-engine_run_until_stop (SIM_DESC sd,
- volatile int *keep_running)
-{
- if (!setjmp (sd->path_to_halt))
- {
- instruction_address cia;
- sim_cpu *cpu = STATE_CPU (sd, 0);
- sd->halt_ok = 1;
- setjmp (sd->path_to_restart);
- sd->restart_ok = 1;
- cia = cpu->cia;
- do
- {
- instruction_word insn = IMEM (cia);
- cia = idecode_issue (sd, insn, cia);
- }
- while (*keep_running);
- engine_halt (sd, cpu, cia, sim_stopped, SIM_SIGINT);
- }
-}
-
-
-void
-engine_step (SIM_DESC sd)
-{
- if (!setjmp (sd->path_to_halt))
- {
- instruction_address cia;
- instruction_word insn;
- sim_cpu *cpu = STATE_CPU (sd, 0);
- sd->halt_ok = 1;
- setjmp (sd->path_to_restart);
- sd->restart_ok = 1;
- cia = cpu->cia;
- insn = IMEM (cia);
- cia = idecode_issue (sd, insn, cia);
- engine_halt (sd, cpu, cia, sim_stopped, SIM_SIGTRAP);
- }
-}
-
-#endif
diff --git a/sim/tic80/misc.c b/sim/tic80/misc.c
deleted file mode 100644
index fc7fbec12b7..00000000000
--- a/sim/tic80/misc.c
+++ /dev/null
@@ -1,624 +0,0 @@
-/* TIc80 Simulator.
- Copyright (C) 1997, 1998 Free Software Foundation, Inc.
- Contributed by Cygnus Support.
-
-This file is part of GDB, the GNU debugger.
-
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License along
-with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
-
-
-#include "sim-main.h"
-
-#ifdef HAVE_STRING_H
-#include <string.h>
-#else
-#ifdef HAVE_STRINGS_H
-#include <strings.h>
-#endif
-#endif
-
-
-tic80_control_regs
-tic80_index2cr (int index)
-{
- switch (index)
- {
- case 0x0000: return EPC_CR;
- case 0x0001: return EIP_CR;
- case 0x0002: return CONFIG_CR;
- case 0x0004: return INTPEN_CR;
- case 0x0006: return IE_CR;
- case 0x0008: return FPST_CR;
- case 0x000A: return PPERROR_CR;
- case 0x000D: return PKTREQ_CR;
- case 0x000E: return TCOUNT_CR;
- case 0x000F: return TSCALE_CR;
- case 0x0010: return FLTOP_CR;
- case 0x0011: return FLTADR_CR;
- case 0x0012: return FLTTAG_CR;
- case 0x0013: return FLTDLT_CR;
- case 0x0014: return FLTDTH_CR;
- case 0x0015: return FLT005_CR;
- case 0x0016: return FLT006_CR;
- case 0x0017: return FLT007_CR;
- case 0x0018: return FLT008_CR;
- case 0x0019: return FLT009_CR;
- case 0x001a: return FLT010_CR;
- case 0x001b: return FLT011_CR;
- case 0x001c: return FLT012_CR;
- case 0x001d: return FLT013_CR;
- case 0x001e: return FLT014_CR;
- case 0x001f: return FLT015_CR;
- case 0x0020: return SYSSTK_CR;
- case 0x0021: return SYSTMP_CR;
- case 0x0030: return MPC_CR;
- case 0x0031: return MIP_CR;
- case 0x0033: return ECOMCNTL_CR;
- case 0x0034: return ANASTAT_CR;
- case 0x0039: return BRK1_CR;
- case 0x003A: return BRK2_CR;
- case 0x0200: return ITAG0_CR;
- case 0x0201: return ITAG1_CR;
- case 0x0202: return ITAG2_CR;
- case 0x0203: return ITAG3_CR;
- case 0x0204: return ITAG4_CR;
- case 0x0205: return ITAG5_CR;
- case 0x0206: return ITAG6_CR;
- case 0x0207: return ITAG7_CR;
- case 0x0208: return ITAG8_CR;
- case 0x0209: return ITAG9_CR;
- case 0x020a: return ITAG10_CR;
- case 0x020b: return ITAG11_CR;
- case 0x020c: return ITAG12_CR;
- case 0x020d: return ITAG13_CR;
- case 0x020e: return ITAG14_CR;
- case 0x020f: return ITAG15_CR;
- case 0x0300: return ILRU_CR;
- case 0x0400: return DTAG0_CR;
- case 0x0401: return DTAG1_CR;
- case 0x0402: return DTAG2_CR;
- case 0x0403: return DTAG3_CR;
- case 0x0404: return DTAG4_CR;
- case 0x0405: return DTAG5_CR;
- case 0x0406: return DTAG6_CR;
- case 0x0407: return DTAG7_CR;
- case 0x0408: return DTAG8_CR;
- case 0x0409: return DTAG9_CR;
- case 0x040a: return DTAG10_CR;
- case 0x040b: return DTAG11_CR;
- case 0x040c: return DTAG12_CR;
- case 0x040d: return DTAG13_CR;
- case 0x040e: return DTAG14_CR;
- case 0x040f: return DTAG15_CR;
- case 0x0500: return DLRU_CR;
- case 0x4000: return IN0P_CR;
- case 0x4001: return IN1P_CR;
- case 0x4002: return OUTP_CR;
- default: return SCRATCH_CR;
- }
-}
-
-
-
-#if defined(WITH_TRACE)
-/* Tracing support routines */
-
-static char tic80_trace_buffer[1024];
-static int tic80_size_name;
-
-#define SIZE_HEX 8
-#define SIZE_DECIMAL 11
-
-/* Initialize tracing by calculating the maximum name size */
-static void
-tic80_init_trace (void)
-{
- int i;
- int len, max_len = 0;
-
- for (i = 0; i < (int)nr_itable_entries; i++) {
- len = strlen (itable[i].name);
- if (len > max_len)
- max_len = len;
- }
-
- tic80_size_name = max_len + sizeof(":m") - 1 + sizeof (":s") - 1;
-}
-
-/* Given an integer which is the result of a comparison, return a string
- giving which bits are set. */
-
-static char *
-tic80_trace_cmp_internal (unsigned32 flag)
-{
- struct cmp_bits { unsigned32 bit; char *string; };
- static char buffer[32*8];
- static struct cmp_bits bits[] =
- {
- { BIT32(29), "hs" },
- { BIT32(28), "lo" },
- { BIT32(27), "ls" },
- { BIT32(26), "hi" },
- { BIT32(25), "ge" },
- { BIT32(24), "lt" },
- { BIT32(23), "le" },
- { BIT32(22), "gt" },
- { BIT32(21), "ne" },
- { BIT32(20), "eq" },
-
- { BIT32(19), "hs.h" },
- { BIT32(18), "lo.h" },
- { BIT32(17), "ls.h" },
- { BIT32(16), "hi.h" },
- { BIT32(15), "ge.h" },
- { BIT32(14), "lt.h" },
- { BIT32(13), "le.h" },
- { BIT32(12), "gt.h" },
- { BIT32(11), "ne.h" },
- { BIT32(10), "eq.h" },
-
- { BIT32( 9), "hs.b" },
- { BIT32( 8), "lo.b" },
- { BIT32( 7), "ls.b" },
- { BIT32( 6), "hi.b" },
- { BIT32( 5), "ge.b" },
- { BIT32( 4), "lt.b" },
- { BIT32( 3), "le.b" },
- { BIT32( 2), "gt.b" },
- { BIT32( 1), "ne.b" },
- { BIT32( 0), "eq.b" },
- { 0, (char *)0 },
- };
-
- int i;
- char *p = buffer;
-
- for (i = 0; bits[i].bit != 0; i++)
- {
- if ((flag & bits[i].bit) != 0)
- {
- if (p != buffer)
- *p++ = ' ';
-
- strcpy (p, bits[i].string);
- p += strlen (p);
- }
- }
-
- *p = '\0';
- return buffer;
-}
-
-/* Trace the result of an ALU operation with 2 integer inputs and an integer output */
-char *
-tic80_trace_alu3 (int indx,
- unsigned32 result,
- unsigned32 input1,
- unsigned32 input2)
-{
- if (!tic80_size_name)
- tic80_init_trace ();
-
- sprintf (tic80_trace_buffer, "%-*s 0x%.*lx/%*ld 0x%.*lx/%*ld => 0x%.*lx/%*ld",
- tic80_size_name, itable[indx].name,
- SIZE_HEX, input1, SIZE_DECIMAL, (long)(signed32)input1,
- SIZE_HEX, input2, SIZE_DECIMAL, (long)(signed32)input2,
- SIZE_HEX, result, SIZE_DECIMAL, (long)(signed32)result);
-
- return tic80_trace_buffer;
-}
-
-/* Trace the result of an ALU operation with 2 integer inputs and an integer output
- that sets the bits from a compare instruction. */
-char *
-tic80_trace_cmp (int indx,
- unsigned32 result,
- unsigned32 input1,
- unsigned32 input2)
-{
- if (!tic80_size_name)
- tic80_init_trace ();
-
- sprintf (tic80_trace_buffer, "%-*s 0x%.*lx/%*ld 0x%.*lx/%*ld => 0x%.*lx %s",
- tic80_size_name, itable[indx].name,
- SIZE_HEX, input1, SIZE_DECIMAL, (long)(signed32)input1,
- SIZE_HEX, input2, SIZE_DECIMAL, (long)(signed32)input2,
- SIZE_HEX, result, tic80_trace_cmp_internal (result));
-
- return tic80_trace_buffer;
-}
-
-/* Trace the result of an ALU operation with 1 integer input and an integer output */
-char *
-tic80_trace_alu2 (int indx,
- unsigned32 result,
- unsigned32 input)
-{
- if (!tic80_size_name)
- tic80_init_trace ();
-
- sprintf (tic80_trace_buffer, "%-*s 0x%.*lx/%*ld %*s => 0x%.*lx/%*ld",
- tic80_size_name, itable[indx].name,
- SIZE_HEX, input, SIZE_DECIMAL, (long)(signed32)input,
- SIZE_HEX + SIZE_DECIMAL + 3, "",
- SIZE_HEX, result, SIZE_DECIMAL, (long)(signed32)result);
-
- return tic80_trace_buffer;
-}
-
-/* Trace the result of a shift instruction */
-char *
-tic80_trace_shift (int indx,
- unsigned32 result,
- unsigned32 input,
- int i,
- int n,
- int merge,
- int endmask,
- int rotate)
-{
- const char *merge_name;
- char name[40];
- char *p;
-
- if (!tic80_size_name)
- tic80_init_trace ();
-
- switch (merge)
- {
- default: merge_name = ".??"; break;
- case 0: merge_name = ".dz"; break;
- case 1: merge_name = ".dm"; break;
- case 2: merge_name = ".ds"; break;
- case 3: merge_name = ".ez"; break;
- case 4: merge_name = ".em"; break;
- case 5: merge_name = ".es"; break;
- case 6: merge_name = ".iz"; break;
- case 7: merge_name = ".im"; break;
- }
-
- /* Don't use itable[indx].name, which is just sl {r,i}. Instead reconstruct
- the name, using the i and n fields. */
- p = strchr (itable[indx].name, ' ');
- sprintf (name, "s%s%s%s%s",
- (n) ? "r" : "l",
- (i) ? "i" : "",
- merge_name,
- (p) ? p : "");
-
- sprintf (tic80_trace_buffer, "%-*s 0x%.*lx/%*ld %*s%2d,%2d => 0x%.*lx/%*ld",
- tic80_size_name, name,
- SIZE_HEX, input, SIZE_DECIMAL, (long)(signed32)input,
- SIZE_HEX + SIZE_DECIMAL - 2, "",
- rotate, endmask,
- SIZE_HEX, result, SIZE_DECIMAL, (long)(signed32)result);
-
- return tic80_trace_buffer;
-}
-
-/* Trace the result of an FPU operation with 2 floating point inputs and a floating point output */
-void
-tic80_trace_fpu3 (SIM_DESC sd,
- sim_cpu *cpu,
- sim_cia cia,
- int indx,
- sim_fpu *result,
- sim_fpu *input1,
- sim_fpu *input2)
-{
- if (!tic80_size_name)
- tic80_init_trace ();
-
- trace_one_insn (sd, cpu, cia.ip, 1,
- itable[indx].file, itable[indx].line_nr, "fpu",
- "%-*s %*g %*g => %*g",
- tic80_size_name, itable[indx].name,
- SIZE_HEX + SIZE_DECIMAL + 3, sim_fpu_2d (input1),
- SIZE_HEX + SIZE_DECIMAL + 3, sim_fpu_2d (input2),
- SIZE_HEX + SIZE_DECIMAL + 3, sim_fpu_2d (result));
-}
-
-/* Trace the result of an FPU operation with 1 floating point input and a floating point output */
-void
-tic80_trace_fpu2 (SIM_DESC sd,
- sim_cpu *cpu,
- sim_cia cia,
- int indx,
- sim_fpu *result,
- sim_fpu *input)
-{
- if (!tic80_size_name)
- tic80_init_trace ();
-
- trace_one_insn (sd, cpu, cia.ip, 1,
- itable[indx].file, itable[indx].line_nr, "fpu",
- "%-*s %*g %-*s => %*g",
- tic80_size_name, itable[indx].name,
- SIZE_HEX + SIZE_DECIMAL + 3, sim_fpu_2d (input),
- SIZE_HEX + SIZE_DECIMAL + 3, "",
- SIZE_HEX + SIZE_DECIMAL, sim_fpu_2d (result));
-}
-
-/* Trace the result of an FPU operation with 1 floating point input and a floating point output */
-void
-tic80_trace_fpu1 (SIM_DESC sd,
- sim_cpu *cpu,
- sim_cia cia,
- int indx,
- sim_fpu *result)
-{
- if (!tic80_size_name)
- tic80_init_trace ();
-
- trace_one_insn (sd, cpu, cia.ip, 1,
- itable[indx].file, itable[indx].line_nr, "fpu",
- "%-*s %-*s %-*s => %*g",
- tic80_size_name, itable[indx].name,
- SIZE_HEX + SIZE_DECIMAL + 3, "",
- SIZE_HEX + SIZE_DECIMAL + 3, "",
- SIZE_HEX + SIZE_DECIMAL, sim_fpu_2d (result));
-}
-
-/* Trace the result of an FPU operation with 2 floating point inputs and an integer output */
-void
-tic80_trace_fpu2i (SIM_DESC sd,
- sim_cpu *cpu,
- sim_cia cia,
- int indx,
- unsigned32 result,
- sim_fpu *input1,
- sim_fpu *input2)
-{
- if (!tic80_size_name)
- tic80_init_trace ();
-
- trace_one_insn (sd, cpu, cia.ip, 1,
- itable[indx].file, itable[indx].line_nr, "fpu",
- "%-*s %*g %*g => 0x%.*lx %-*ld",
- tic80_size_name, itable[indx].name,
- SIZE_HEX + SIZE_DECIMAL + 3, sim_fpu_2d (input1),
- SIZE_HEX + SIZE_DECIMAL + 3, sim_fpu_2d (input2),
- SIZE_HEX, result, SIZE_DECIMAL, (long)(signed32)result);
-}
-
-/* Trace the result of an FPU operation with 2 floating point inputs and an integer output
- that is the result of a comparison. */
-void
-tic80_trace_fpu2cmp (SIM_DESC sd,
- sim_cpu *cpu,
- sim_cia cia,
- int indx,
- unsigned32 result,
- sim_fpu *input1,
- sim_fpu *input2)
-{
- if (!tic80_size_name)
- tic80_init_trace ();
-
- trace_one_insn (sd, cpu, cia.ip, 1,
- itable[indx].file, itable[indx].line_nr, "fpu",
- "%-*s %*g %*g => 0x%.*lx %s",
- tic80_size_name, itable[indx].name,
- SIZE_HEX + SIZE_DECIMAL + 3, sim_fpu_2d (input1),
- SIZE_HEX + SIZE_DECIMAL + 3, sim_fpu_2d (input2),
- SIZE_HEX, result, tic80_trace_cmp_internal (result));
-}
-
-/* Trace the result of a NOP operation */
-char *
-tic80_trace_nop (int indx)
-{
- if (!tic80_size_name)
- tic80_init_trace ();
-
- sprintf (tic80_trace_buffer, "%s", itable[indx].name);
- return tic80_trace_buffer;
-}
-
-/* Trace the result of a data sink with one input */
-char *
-tic80_trace_sink1 (int indx, unsigned32 input)
-{
- if (!tic80_size_name)
- tic80_init_trace ();
-
- sprintf (tic80_trace_buffer, "%-*s 0x%.*lx/%*ld",
- tic80_size_name, itable[indx].name,
- SIZE_HEX, input, SIZE_DECIMAL, (long)(signed32)input);
-
- return tic80_trace_buffer;
-}
-
-/* Trace the result of a data sink with two inputs */
-char *
-tic80_trace_sink2 (int indx, unsigned32 input1, unsigned32 input2)
-{
- if (!tic80_size_name)
- tic80_init_trace ();
-
- sprintf (tic80_trace_buffer, "%-*s 0x%.*lx/%*ld 0x%.*lx/%*ld",
- tic80_size_name, itable[indx].name,
- SIZE_HEX, input1, SIZE_DECIMAL, (long)(signed32)input1,
- SIZE_HEX, input2, SIZE_DECIMAL, (long)(signed32)input2);
-
- return tic80_trace_buffer;
-}
-
-/* Trace the result of a data sink with three inputs */
-char *
-tic80_trace_sink3 (int indx, unsigned32 input1, unsigned32 input2, unsigned32 input3)
-{
- if (!tic80_size_name)
- tic80_init_trace ();
-
- sprintf (tic80_trace_buffer, "%-*s 0x%.*lx/%*ld 0x%.*lx/%*ld 0x%.*lx/%*ld",
- tic80_size_name, itable[indx].name,
- SIZE_HEX, input1, SIZE_DECIMAL, (long)(signed32)input1,
- SIZE_HEX, input2, SIZE_DECIMAL, (long)(signed32)input2,
- SIZE_HEX, input3, SIZE_DECIMAL, (long)(signed32)input3);
-
- return tic80_trace_buffer;
-}
-
-/* Trace the result of a conditional branch operation */
-char *
-tic80_trace_cond_br (int indx,
- int jump_p,
- unsigned32 cond,
- unsigned32 target,
- int size,
- int code)
-{
- char *suffix1, *suffix2;
-
- if (!tic80_size_name)
- tic80_init_trace ();
-
- if (size >= 0 && code >= 0)
- { /* BCND */
- switch (code)
- {
- default: suffix1 = "???"; break;
- case 0: suffix1 = "nev"; break;
- case 1: suffix1 = "gt0"; break;
- case 2: suffix1 = "eq0"; break;
- case 3: suffix1 = "ge0"; break;
- case 4: suffix1 = "lt0"; break;
- case 5: suffix1 = "ne0"; break;
- case 6: suffix1 = "le0"; break;
- case 7: suffix1 = "alw"; break;
- }
-
- switch (size)
- {
- default: suffix2 = ".?"; break;
- case 0: suffix2 = ".b"; break;
- case 1: suffix2 = ".h"; break;
- case 2: suffix2 = ".w"; break;
- }
-
- } else { /* BBO/BBZ */
-
- suffix2 = "";
- switch (cond)
- {
- default: suffix1 = "??.?"; break;
- case 29: suffix1 = "hs.w"; break;
- case 28: suffix1 = "lo.w"; break;
- case 27: suffix1 = "ls.w"; break;
- case 26: suffix1 = "hi.w"; break;
- case 25: suffix1 = "ge.w"; break;
- case 24: suffix1 = "lt.w"; break;
- case 23: suffix1 = "le.w"; break;
- case 22: suffix1 = "gt.w"; break;
- case 21: suffix1 = "ne.w"; break;
- case 20: suffix1 = "eq.w"; break;
- case 19: suffix1 = "hs.h"; break;
- case 18: suffix1 = "lo.h"; break;
- case 17: suffix1 = "ls.h"; break;
- case 16: suffix1 = "hi.h"; break;
- case 15: suffix1 = "ge.h"; break;
- case 14: suffix1 = "lt.h"; break;
- case 13: suffix1 = "le.h"; break;
- case 12: suffix1 = "gt.h"; break;
- case 11: suffix1 = "ne.h"; break;
- case 10: suffix1 = "eq.h"; break;
- case 9: suffix1 = "hs.b"; break;
- case 8: suffix1 = "lo.b"; break;
- case 7: suffix1 = "ls.b"; break;
- case 6: suffix1 = "hi.b"; break;
- case 5: suffix1 = "ge.b"; break;
- case 4: suffix1 = "lt.b"; break;
- case 3: suffix1 = "le.b"; break;
- case 2: suffix1 = "gt.b"; break;
- case 1: suffix1 = "ne.b"; break;
- case 0: suffix1 = "eq.b"; break;
- }
- }
-
- if (jump_p)
- sprintf (tic80_trace_buffer,
- "%-*s 0x%.*lx %*s 0x%.*lx/%*ld => 0x%.*lx %s%s",
- tic80_size_name, itable[indx].name,
- SIZE_HEX, target, SIZE_DECIMAL, "",
- SIZE_HEX, cond, SIZE_DECIMAL, (long)(signed32)cond,
- SIZE_HEX, target,
- suffix1, suffix2);
- else
- sprintf (tic80_trace_buffer,
- "%-*s 0x%.*lx %*s 0x%.*lx/%*ld => %-*s %s%s",
- tic80_size_name, itable[indx].name,
- SIZE_HEX, target, SIZE_DECIMAL, "",
- SIZE_HEX, cond, SIZE_DECIMAL, (long)(signed32)cond,
- SIZE_HEX + 2, "[no jump]",
- suffix1, suffix2);
-
- return tic80_trace_buffer;
-}
-
-/* Trace the result of a unconditional branch operation */
-char *
-tic80_trace_ucond_br (int indx,
- unsigned32 target)
-{
- if (!tic80_size_name)
- tic80_init_trace ();
-
- sprintf (tic80_trace_buffer,
- "%-*s 0x%.*lx %*s => 0x%.*lx",
- tic80_size_name, itable[indx].name,
- SIZE_HEX, target, (SIZE_DECIMAL*2) + SIZE_HEX + 4, "",
- SIZE_HEX, target);
-
- return tic80_trace_buffer;
-}
-
-/* Trace the result of a load or store operation with 2 integer addresses
- and an integer output or input */
-void
-tic80_trace_ldst (SIM_DESC sd,
- sim_cpu *cpu,
- sim_cia cia,
- int indx,
- int st_p,
- int m_p,
- int s_p,
- unsigned32 value,
- unsigned32 input1,
- unsigned32 input2)
-{
- char name[40];
-
- if (!tic80_size_name)
- tic80_init_trace ();
-
- strcpy (name, itable[indx].name);
- if (m_p)
- strcat (name, ":m");
-
- if (s_p)
- strcat (name, ":s");
-
- trace_one_insn (sd, cpu, cia.ip, 1,
- itable[indx].file, itable[indx].line_nr, "memory",
- "%-*s 0x%.*lx/%*ld 0x%.*lx/%*ld %s 0x%.*lx/%*ld",
- tic80_size_name, name,
- SIZE_HEX, input1, SIZE_DECIMAL, (long)(signed32)input1,
- SIZE_HEX, input2, SIZE_DECIMAL, (long)(signed32)input2,
- (!st_p) ? "=>" : "<=",
- SIZE_HEX, value, SIZE_DECIMAL, (long)(signed32)value);
-}
-
-#endif /* WITH_TRACE */
diff --git a/sim/tic80/sim-calls.c b/sim/tic80/sim-calls.c
deleted file mode 100644
index c60bd9b8d21..00000000000
--- a/sim/tic80/sim-calls.c
+++ /dev/null
@@ -1,203 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1996, Andrew Cagney <cagney@highland.com.au>
- Copyright (C) 1997, Free Software Foundation
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-#include <stdarg.h>
-#include <ctype.h>
-
-#include "bfd.h"
-#include "sim-main.h"
-#include "sim-utils.h"
-#include "sim-options.h"
-
-#ifdef HAVE_STDLIB_H
-#include <stdlib.h>
-#endif
-
-#ifdef HAVE_STRING_H
-#include <string.h>
-#else
-#ifdef HAVE_STRINGS_H
-#include <strings.h>
-#endif
-#endif
-
-
-#define SIM_ADDR unsigned
-
-SIM_DESC
-sim_open (SIM_OPEN_KIND kind,
- host_callback *callback,
- struct _bfd *abfd,
- char **argv)
-{
- char *buf;
- SIM_DESC sd = sim_state_alloc (kind, callback);
-
- if (sim_pre_argv_init (sd, argv[0]) != SIM_RC_OK)
- return 0;
-
-#define TIC80_MEM_START 0x2000000
-#define TIC80_MEM_SIZE 0x100000
-
- /* main memory */
- asprintf (&buf, "memory region 0x%lx,0x%lx",
- TIC80_MEM_START, TIC80_MEM_SIZE);
- sim_do_command (sd, buf);
- free (buf);
- /* interrupt memory */
- sim_do_command (sd, "memory region 0x1010000,0x1000");
- /* some memory at zero */
- sim_do_command (sd, "memory region 0,0x100000");
-
- /* getopt will print the error message so we just have to exit if this fails.
- FIXME: Hmmm... in the case of gdb we need getopt to call
- print_filtered. */
- if (sim_parse_args (sd, argv) != SIM_RC_OK)
- {
- /* Uninstall the modules to avoid memory leaks,
- file descriptor leaks, etc. */
- sim_module_uninstall (sd);
- return 0;
- }
-
- /* check for/establish the a reference program image */
- if (sim_analyze_program (sd,
- (STATE_PROG_ARGV (sd) != NULL
- ? *STATE_PROG_ARGV (sd)
- : NULL),
- abfd) != SIM_RC_OK)
- {
- sim_module_uninstall (sd);
- return 0;
- }
-
- /* establish any remaining configuration options */
- if (sim_config (sd) != SIM_RC_OK)
- {
- sim_module_uninstall (sd);
- return 0;
- }
-
- if (sim_post_argv_init (sd) != SIM_RC_OK)
- {
- /* Uninstall the modules to avoid memory leaks,
- file descriptor leaks, etc. */
- sim_module_uninstall (sd);
- return 0;
- }
-
- /* FIXME: for now */
- return sd;
-}
-
-
-void
-sim_close (SIM_DESC sd, int quitting)
-{
- /* Uninstall the modules to avoid memory leaks,
- file descriptor leaks, etc. */
- sim_module_uninstall (sd);
-}
-
-
-/* FIXME - these magic numbers need to be moved elsewhere */
-
-#define SP_REGNUM 1 /* Contains address of top of stack */
-#define FP_REGNUM 31 /* Contains address of executing stack frame */
-#define PC_REGNUM 32 /* Contains program counter (FIXME?) */
-#define NPC_REGNUM 33 /* Contains the next program counter (FIXME?) */
-#define A0_REGNUM 34 /* Accumulator register 0 */
-#define A3_REGNUM 37 /* Accumulator register 1 */
-
-#define R0_REGNUM 0 /* General Purpose Register 0 - for sim */
-#define Rn_REGNUM 31 /* Last General Purpose Register - for sim */
-#define An_REGNUM A3_REGNUM /* Last Accumulator register - for sim */
-
-int
-sim_fetch_register (SIM_DESC sd, int regnr, unsigned char *buf, int length)
-{
- if (regnr == R0_REGNUM)
- memset (buf, 0, sizeof (unsigned32));
- else if (regnr > R0_REGNUM && regnr <= Rn_REGNUM)
- *(unsigned32*)buf = H2T_4 (STATE_CPU (sd, 0)->reg[regnr - R0_REGNUM]);
- else if (regnr == PC_REGNUM)
- *(unsigned32*)buf = H2T_4 (STATE_CPU (sd, 0)->cia.ip);
- else if (regnr == NPC_REGNUM)
- *(unsigned32*)buf = H2T_4 (STATE_CPU (sd, 0)->cia.dp);
- else if (regnr >= A0_REGNUM && regnr <= An_REGNUM)
- *(unsigned64*)buf = H2T_8 (STATE_CPU (sd, 0)->acc[regnr - A0_REGNUM]);
- else
- sim_io_error (sd, "sim_fetch_register - unknown register nr %d", regnr);
- return -1;
-}
-
-
-int
-sim_store_register (SIM_DESC sd, int regnr, unsigned char *buf, int length)
-{
- if (regnr >= R0_REGNUM && regnr <= Rn_REGNUM)
- STATE_CPU (sd, 0)->reg[regnr - R0_REGNUM] = T2H_4 (*(unsigned32*)buf);
- else if (regnr == PC_REGNUM)
- STATE_CPU (sd, 0)->cia.ip = T2H_4 (*(unsigned32*)buf);
- else if (regnr == NPC_REGNUM)
- STATE_CPU (sd, 0)->cia.dp = T2H_4 (*(unsigned32*)buf);
- else if (regnr >= A0_REGNUM && regnr <= An_REGNUM)
- STATE_CPU (sd, 0)->acc[regnr - A0_REGNUM] = T2H_8 (*(unsigned64*)buf);
- else
- sim_io_error (sd, "sim_store_register - unknown register nr %d", regnr);
- return -1;
-}
-
-
-SIM_RC
-sim_create_inferior (SIM_DESC sd,
- struct _bfd *abfd,
- char **argv,
- char **envp)
-{
- /* clear all registers */
- memset (&STATE_CPU (sd, 0)->reg, 0, sizeof (STATE_CPU (sd, 0)->reg));
- memset (&STATE_CPU (sd, 0)->acc, 0, sizeof (STATE_CPU (sd, 0)->acc));
- memset (&STATE_CPU (sd, 0)->cr, 0, sizeof (STATE_CPU (sd, 0)->cr));
- STATE_CPU (sd, 0)->is_user_mode = 0;
- memset (&STATE_CPU (sd, 0)->cia, 0, sizeof (STATE_CPU (sd, 0)->cia));
- /* initialize any modules */
- sim_module_init (sd);
- /* set the stack-pointer/program counter */
- if (abfd != NULL)
- STATE_CPU (sd, 0)->cia.ip = bfd_get_start_address (abfd);
- else
- STATE_CPU (sd, 0)->cia.ip = 0;
- STATE_CPU (sd, 0)->cia.dp = (STATE_CPU (sd, 0)->cia.ip
- + sizeof (instruction_word));
- STATE_CPU (sd, 0)->cr[IE_CR] |= IE_CR_IE;
- STATE_CPU (sd, 0)->reg[1] = TIC80_MEM_START + TIC80_MEM_SIZE - 16;
- return SIM_RC_OK;
-}
-
-
-void
-sim_do_command (SIM_DESC sd, char *cmd)
-{
- if (sim_args_command (sd, cmd) != SIM_RC_OK)
- sim_io_eprintf (sd, "Unknown command `%s'\n", cmd);
-}
diff --git a/sim/tic80/sim-main.h b/sim/tic80/sim-main.h
deleted file mode 100644
index 67db3535441..00000000000
--- a/sim/tic80/sim-main.h
+++ /dev/null
@@ -1,81 +0,0 @@
-/* This file is part of the program psim.
-
- Copyright (C) 1994-1997, Andrew Cagney <cagney@highland.com.au>
- Copyright (C) 1997, Free Software Foundation
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
- */
-
-
-#ifndef _SIM_MAIN_H_
-#define _SIM_MAIN_H_
-
-
-#include "sim-basics.h"
-#include "sim-signal.h"
-
-#include <signal.h> /* For kill() in insns:do_trap */
-
-#include <errno.h>
-#ifdef HAVE_UNISTD_H
-#include <unistd.h>
-#endif
-
-/* These are generated files. */
-#include "itable.h"
-#include "idecode.h"
-#include "idecode.h"
-
-typedef instruction_address sim_cia;
-static const sim_cia null_cia = {0}; /* Dummy */
-#define NULL_CIA null_cia
-/* FIXME: Perhaps igen should generate access macros for
- `instruction_address' that we could use. */
-#define CIA_ADDR(cia) ((cia).ip)
-
-#define WITH_WATCHPOINTS 1
-
-#include "sim-base.h"
-
-#include "alu.h"
-#include "cpu.h"
-
-
-struct sim_state {
-
- /* the processors proper */
- sim_cpu cpu;
-#define STATE_CPU(sd, n) (&(sd)->cpu)
-
- /* The base class. */
- sim_state_base base;
-
-};
-
-/* (re) initialize the simulator */
-
-extern void engine_init
-(SIM_DESC sd);
-
-
-#ifndef HAVE_GETPID
-#define getpid() 42
-#endif
-
-#ifndef HAVE_KILL
-#define kill(sig, pid) (errno = EINVAL, -1)
-#endif
-#endif
diff --git a/sim/tic80/tic80.dc b/sim/tic80/tic80.dc
deleted file mode 100644
index 41998265864..00000000000
--- a/sim/tic80/tic80.dc
+++ /dev/null
@@ -1,6 +0,0 @@
-# most instructions
-switch: 21: 12: 21: 12
-switch: 11: 7: 6: 12
-#switch: 21: 13: 21: 13
-#switch: 12: 7: 6: 13
-switch: 27: 27: 27: 27
diff --git a/sim/tic80/tic80.ic b/sim/tic80/tic80.ic
deleted file mode 100644
index de81d14a92e..00000000000
--- a/sim/tic80/tic80.ic
+++ /dev/null
@@ -1,52 +0,0 @@
-cache:Dest:Dest:
-cache:Dest:rDest:signed_word *:(&(CPU)->reg[Dest])
-#
-cache:Source1:Source1:
-cache:Source1:vSource1:signed_word:(GPR (Source1) + 0)
-#cache:Source1:vSource1:signed_word:(Source1 == 0 ? 0 : (CPU)->reg[Source1])
-#
-cache:Source2:Source2:
-cache:Source2:vSource2:signed_word:(GPR (Source2) + 0)
-#cache:Source2:vSource2:signed_word:(Source2 == 0 ? 0 : (CPU)->reg[Source2])
-#
-cache:Source:Source:
-cache:Source:vSource:signed_word:(GPR (Source) + 0)
-#cache:Source:vSource:signed_word:(Source == 0 ? 0 : (CPU)->reg[Source])
-#
-cache:IndOff:IndOff:
-cache:IndOff:rIndOff:signed_word:(GPR (IndOff) + 0)
-#cache:IndOff:rIndOff:signed_word:(IndOff == 0 ? 0 : (CPU)->reg[IndOff])
-#
-cache:Base:Base:
-cache:Base:vBase:signed_word:(GPR (Base) + 0)
-cache:Base:rBase:signed_word*:(&GPR (Base))
-#cache:Base:vBase:signed_word:(Base == 0 ? 0 : (CPU)->reg[Base])
-#
-cache:Link:Link:
-cache:Link:rLink:signed_word*:(&(CPU)->reg[Link])
-#
-# Trap Number
-cache:UTN:UTN:
-cache:INDTR:INDTR:
-cache:INDTR:UTN:unsigned_word:(INDTR == 0 ? 0 : (CPU)->reg[INDTR])
-#
-cache:A:A:
-#
-cache:SignedImmediate:SignedImmediate:
-cache:SignedImmediate:vSource1:signed_word:SEXT (SignedImmediate, 14)
-#
-cache:UnsignedImmediate:UnsignedImmediate:
-cache:UnsignedImmediate:vSource1:signed_word:UnsignedImmediate
-#
-cache:BITNUM:BITNUM:
-cache:Code:Code:
-cache:BITNUM:bitnum:int:(~BITNUM) & 0x1f
-
-#
-cache:SignedOffset:SignedOffset:
-cache:SignedOffset:vSignedOffset:signed_word:SEXT (SignedOffset, 14)
-#
-cache:UCRN:UCRN:
-cache:INDCR:INDCR:
-cache:INDCR:UCRN:unsigned32:(GPR (INDCR) + 0)
-#cache:INDCR:UCRN:unsigned32:(INDCR == 0 ? 0 : (CPU)->reg[INDCR])
diff --git a/sim/tic80/tic80.igen b/sim/tic80/tic80.igen
deleted file mode 100644
index 1595693f524..00000000000
--- a/sim/tic80/tic80.igen
+++ /dev/null
@@ -1,1615 +0,0 @@
-// Texas Instruments TMS320C80 (MVP) Simulator.
-
-
-// The following is called when ever an illegal instruction is encountered.
-:internal::::illegal:
-{
- sim_io_eprintf (SD, "0x%lx: illegal instruction\n", (unsigned long) cia.ip);
- sim_engine_halt (SD, CPU, NULL, cia, sim_signalled, SIM_SIGILL);
-}
-
-// The following is called when ever an FP op is attempted with FPU disabled.
-:internal::::fp_unavailable:
-{
- sim_io_eprintf (SD, "0x%lx: floating-point unavailable\n", (unsigned long) cia.ip);
- sim_engine_halt (SD, CPU, NULL, cia, sim_signalled, SIM_SIGFPE);
-}
-
-// Handle a branch instruction
-:function:::instruction_address:do_branch:int annul, address_word target, int rLink_p, unsigned32 *rLink
-{
- instruction_address nia;
- if (annul)
- {
- if (rLink_p)
- *rLink = cia.dp;
- nia.ip = target;
- nia.dp = target + 4;
- }
- else
- {
- if (rLink_p)
- *rLink = cia.dp + sizeof (instruction_word);
- nia.ip = cia.dp;
- nia.dp = target;
- }
- return nia;
-}
-
-// Signed Integer Add - add source1, source2, dest
-:function:::void:do_add:unsigned32 *rDest, signed32 source1, signed32 source2
-{
- unsigned32 result;
- ALU_BEGIN (source1);
- ALU_ADD (source2);
- ALU_END (result);
- *rDest = result;
- TRACE_ALU3 (MY_INDEX, result, source1, source2);
- /* FIXME - a signed add may cause an exception */
-}
-31.Dest,26.Source2,21.0b101100,15.0,14.SignedImmediate::::add i
-"add <SignedImmediate>, r<Source2>, r<Dest>"
-{
- do_add (_SD, rDest, vSource1, vSource2);
-}
-31.Dest,26.Source2,21.0b11101100,13.0,12.0,11./,4.Source1::::add r
-"add r<Source1>, r<Source2>, r<Dest>"
-{
- do_add (_SD, rDest, vSource1, vSource2);
-}
-31.Dest,26.Source2,21.0b11101100,13.0,12.1,11./+LongSignedImmediate::::add l
-"add 0x%08lx<LongSignedImmediate>, r<Source2>, r<Dest>"
-{
- do_add (_SD, rDest, LongSignedImmediate, vSource2);
-}
-
-
-// Unsigned Integer Add - addu source1, source2, dest
-:function:::void:do_addu:unsigned32 *rDest, unsigned32 source1, unsigned32 source2
-{
- unsigned32 result = source1 + source2;
- TRACE_ALU3 (MY_INDEX, result, source1, source2);
- *rDest = result;
-}
-
-31.Dest,26.Source2,21.0b101100,15.1,14.SignedImmediate::::addu i
-"addu <SignedImmediate>, r<Source2>, r<Dest>"
-{
- do_addu (_SD, rDest, vSource1, vSource2);
-}
-31.Dest,26.Source2,21.0b11101100,13.1,12.0,11./,4.Source1::::addu r
-"addu r<Source1>, r<Source2>, r<Dest>"
-{
- do_addu (_SD, rDest, vSource1, vSource2);
-}
-31.Dest,26.Source2,21.0b11101100,13.1,12.1,11./+LongSignedImmediate::::addu l
-"addu 0x%08lx<LongSignedImmediate>, r<Source2>, r<Dest>"
-{
- do_addu (_SD, rDest, LongSignedImmediate, vSource2);
-}
-
-
-:function:::void:do_and:signed32 *rDest, signed32 source1, signed32 source2
-{
- unsigned32 result = source1 & source2;
- TRACE_ALU3 (MY_INDEX, result, source1, source2);
- *rDest = result;
-}
-
-
-// and, and.tt
-31.Dest,26.Source2,21.0b0010001,14.UnsignedImmediate::::and.tt i
-"and.tt <UnsignedImmediate>, r<Source2>, r<Dest>"
-{
- do_and (_SD, rDest, vSource1, vSource2);
-}
-31.Dest,26.Source2,21.0b110010001,12.0,11./,4.Source1::::and.tt r
-"and.tt r<Source1>, r<Source2>, r<Dest>"
-{
- do_and (_SD, rDest, vSource1, vSource2);
-}
-31.Dest,26.Source2,21.0b110010001,12.1,11./+LongSignedImmediate::::and.tt l
-"and.tt 0x%08lx<LongSignedImmediate>, r<Source2>, r<Dest>"
-{
- do_and (_SD, rDest, LongSignedImmediate, vSource2);
-
-}
-
-// and.ff
-31.Dest,26.Source2,21.0b0011000,14.UnsignedImmediate::::and.ff i
-"and.ff <UnsignedImmediate>, r<Source2>, r<Dest>"
-{
- do_and (_SD, rDest, ~vSource1, ~vSource2);
-}
-31.Dest,26.Source2,21.0b110011000,12.0,11./,4.Source1::::and.ff r
-"and.ff r<Source1>, r<Source2>, r<Dest>"
-{
- do_and (_SD, rDest, ~vSource1, ~vSource2);
-}
-31.Dest,26.Source2,21.0b110011000,12.1,11./+LongSignedImmediate::::and.ff l
-"and.ff 0x%08lx<LongSignedImmediate>, r<Source2>, r<Dest>"
-{
- do_and (_SD, rDest, ~LongSignedImmediate, ~vSource2);
-}
-
-// and.ft
-31.Dest,26.Source2,21.0b0010100,14.UnsignedImmediate::::and.ft i
-"and.ft <UnsignedImmediate>, r<Source2>, r<Dest>"
-{
- do_and (_SD, rDest, ~vSource1, vSource2);
-}
-31.Dest,26.Source2,21.0b110010100,12.0,11./,4.Source1::::and.ft r
-"and.ft r<Source1>, r<Source2>, r<Dest>"
-{
- do_and (_SD, rDest, ~vSource1, vSource2);
-}
-31.Dest,26.Source2,21.0b110010100,12.1,11./+LongSignedImmediate::::and.ft l
-"and.ft 0x%08lx<LongSignedImmediate>, r<Source2>, r<Dest>"
-{
- do_and (_SD, rDest, ~LongSignedImmediate, vSource2);
-}
-
-// and.tf
-31.Dest,26.Source2,21.0b0010010,14.UnsignedImmediate::::and.tf i
-"and.tf <UnsignedImmediate>, r<Source2>, r<Dest>"
-{
- do_and (_SD, rDest, vSource1, ~vSource2);
-}
-31.Dest,26.Source2,21.0b110010010,12.0,11./,4.Source1::::and.tf r
-"and.tf r<Source1>, r<Source2>, r<Dest>"
-{
- do_and (_SD, rDest, vSource1, ~vSource2);
-}
-31.Dest,26.Source2,21.0b110010010,12.1,11./+LongSignedImmediate::::and.tf l
-"and.tf 0x%08lx<LongSignedImmediate>, r<Source2>, r<Dest>"
-{
- do_and (_SD, rDest, LongSignedImmediate, ~vSource2);
-}
-
-// bbo[.a]
-:function:::instruction_address:do_bbo:instruction_address nia, int bitnum, unsigned32 source, int annul, unsigned32 offset
-{
- int jump_p;
- address_word target = cia.ip + 4 * offset;
- if (MASKED32 (source, bitnum, bitnum))
- {
- nia = do_branch (_SD, annul, target, 0, NULL);
- jump_p = 1;
- }
- else
- jump_p = 0;
- TRACE_COND_BR(MY_INDEX, jump_p, bitnum, target, -1, -1);
- return nia;
-}
-:%s::::A:int A
-{
- if (A)
- return ".a";
- else
- return "";
-}
-31.BITNUM,26.Source,21.0b100101,15.A,14.SignedOffset::::bbo i
-"bbo%s<A> <SignedOffset>, r<Source>, <bitnum>"
-{
- nia = do_bbo (_SD, nia, bitnum, vSource, A, vSignedOffset);
-}
-31.BITNUM,26.Source,21.0b11100101,13.A,12.0,11./,4.IndOff::::bbo r
-"bbo%s<A> r<IndOff>, r<Source>, <bitnum>"
-{
- nia = do_bbo (_SD, nia, bitnum, vSource, A, rIndOff);
-}
-31.BITNUM,26.Source,21.0b11100101,13.A,12.1,11./+LongSignedImmediate::::bbo l
-"bbo%s<A> <LongSignedImmediate>, r<Source>, <bitnum>"
-{
- nia = do_bbo (_SD, nia, bitnum, vSource, A, LongSignedImmediate);
-}
-
-// bbz[.a]
-:function:::instruction_address:do_bbz:instruction_address nia, int bitnum, unsigned32 source, int annul, unsigned32 offset
-{
- int jump_p;
- address_word target = cia.ip + 4 * offset;
- if (!MASKED32 (source, bitnum, bitnum))
- {
- nia = do_branch (_SD, annul, target, 0, NULL);
- jump_p = 1;
- }
- else
- jump_p = 0;
- TRACE_COND_BR(MY_INDEX, jump_p, bitnum, target, -1, -1);
- return nia;
-}
-31.BITNUM,26.Source,21.0b100100,15.A,14.SignedOffset::::bbz i
-"bbz%s<A> <SignedOffset>, r<Source>, <bitnum>"
-{
- nia = do_bbz (_SD, nia, bitnum, vSource, A, vSignedOffset);
-}
-31.BITNUM,26.Source,21.0b11100100,13.A,12.0,11./,4.IndOff::::bbz r
-"bbz%s<A> r<IndOff>, r<Source>, <bitnum>"
-{
- nia = do_bbz (_SD, nia, bitnum, vSource, A, rIndOff);
-}
-31.BITNUM,26.Source,21.0b11100100,13.A,12.1,11./+LongSignedImmediate::::bbz l
-"bbz%s<A> <LongSignedImmediate>, r<Source>, <bitnum>"
-{
- nia = do_bbz (_SD, nia, bitnum, vSource, A, LongSignedImmediate);
-}
-
-// bcnd[.a]
-:function:::instruction_address:do_bcnd:instruction_address nia, int Cond, unsigned32 source, int annul, unsigned32 offset
-{
- int condition;
- int size = EXTRACTED32 (Cond, 31 - 27, 30 - 27);
- int code = EXTRACTED32 (Cond, 29 - 27, 27 - 27);
- signed32 val = 0;
- address_word target = cia.ip + 4 * offset;
- switch (size)
- {
- case 0: val = SEXT32 (source, 7); break;
- case 1: val = SEXT32 (source, 15); break;
- case 2: val = source; break;
- default: sim_engine_abort (SD, CPU, cia, "bcnd - reserved size");
- }
- switch (code)
- {
- case 0: condition = 0; break;
- case 1: condition = val > 0; break;
- case 2: condition = val == 0; break;
- case 3: condition = val >= 0; break;
- case 4: condition = val < 0; break;
- case 5: condition = val != 0; break;
- case 6: condition = val <= 0; break;
- default: condition = 1; break;
- }
- if (condition)
- {
- nia = do_branch (_SD, annul, target, 0, NULL);
- }
- TRACE_COND_BR(MY_INDEX, condition, val, target, size, code);
- return nia;
-}
-31.Code,26.Source,21.0b100110,15.A,14.SignedOffset::::bcnd i
-"bcnd%s<A> <SignedOffset>, r<Source>, <Code>"
-{
- nia = do_bcnd (_SD, nia, Code, vSource, A, vSignedOffset);
-}
-31.Code,26.Source,21.0b11100110,13.A,12.0,11./,4.IndOff::::bcnd r
-"bcnd%s<A> r<IndOff>, r<Source>, <Code>"
-{
- nia = do_bcnd (_SD, nia, Code, vSource, A, rIndOff);
-}
-31.Code,26.Source,21.0b11100110,13.A,12.1,11./+LongSignedImmediate::::bcnd l
-"bcnd%s<A> <LongSignedImmediate>, r<Source>, <Code>"
-{
- nia = do_bcnd (_SD, nia, Code, vSource, A, LongSignedImmediate);
-}
-
-// br[.a] - see bbz[.a]
-
-
-// brcr
-:function:::sim_cia:do_brcr:instruction_address nia, int cr
-{
- if (cr >= 0x4000 || !(CPU)->is_user_mode)
- {
- unsigned32 control = CR (cr);
- unsigned32 ie = control & 0x00000001;
- unsigned32 pc = control & 0xfffffffc;
- unsigned32 is_user_mode = control & 0x00000002;
- (CPU)->is_user_mode = is_user_mode;
- nia.dp = pc;
- if (ie)
- (CPU)->cr[IE_CR] |= IE_CR_IE;
- else
- (CPU)->cr[IE_CR] &= ~IE_CR_IE;
- }
- TRACE_UCOND_BR (MY_INDEX, nia.dp);
- return nia;
-}
-31.//,27.0,26.//,21.0b0000110,14.UCRN::::brcr i
-"brcr CR[<UCRN>]"
-{
- nia = do_brcr (_SD, nia, UCRN);
-}
-31.//,27.0,26.//,21.0b110000110,12.0,11./,4.INDCR::::brcr r
-"brcr CR[r<INDCR>]"
-{
- nia = do_brcr (_SD, nia, UCRN);
-}
-31.//,27.0,26.//,21.0b110000110,12.1,11./+UnsignedControlRegisterNumber::::brcr l
-"brcr CR[<UnsignedControlRegisterNumber>]"
-{
- nia = do_brcr (_SD, nia, UnsignedControlRegisterNumber);
-}
-
-// bsr[.a]
-:function:::instruction_address:do_bsr:instruction_address nia, signed32 *rLink, int annul, unsigned32 offset
-{
- address_word target = cia.ip + 4 * offset;
- nia = do_branch (_SD, annul, target, 1, rLink);
- TRACE_UCOND_BR (MY_INDEX, target);
- return nia;
-}
-31.Link,26./,21.0b100000,15.A,14.SignedOffset::::bsr i
-"bsr%s<A> <SignedOffset>, r<Link>"
-{
- nia = do_bsr (_SD, nia, rLink, A, vSignedOffset);
-}
-31.Link,26./,21.0b11100000,13.A,12.0,11./,4.IndOff::::bsr r
-"bsr%s<A> r<IndOff>, r<Link>"
-{
- nia = do_bsr (_SD, nia, rLink, A, rIndOff);
-}
-31.Link,26./,21.0b11100000,13.A,12.1,11./+LongSignedImmediate::::bsr l
-"bsr%s<A> <LongSignedImmediate>, r<Link>"
-{
- nia = do_bsr (_SD, nia, rLink, A, LongSignedImmediate);
-}
-
-// cmnd
-:function:::void:do_cmnd:signed32 source
-{
- int Reset = EXTRACTED32 (source, 31, 31);
- int Halt = EXTRACTED32 (source, 30, 30);
- int Unhalt = EXTRACTED32 (source, 29, 29);
- /* int ICR = EXTRACTED32 (source, 28, 28); */
- /* int DCR = EXTRACTED32 (source, 27, 27); */
- int Task = EXTRACTED32 (source, 14, 14);
- int Msg = EXTRACTED32 (source, 13, 13);
- int VC = EXTRACTED32 (source, 10, 10);
- int TC = EXTRACTED32 (source, 9, 9);
- int MP = EXTRACTED32 (source, 8, 8);
- int PP = EXTRACTED32 (source, 3, 0);
- /* what is implemented? */
- if (PP != 0)
- sim_engine_abort (SD, CPU, cia, "0x%lx: cmnd - PPs not supported",
- (unsigned long) cia.ip);
- if (VC != 0)
- sim_engine_abort (SD, CPU, cia, "0x%lx: cmnd - VC not supported",
- (unsigned long) cia.ip);
- if (TC != 0)
- sim_engine_abort (SD, CPU, cia, "0x%lx: cmnd - TC not supported",
- (unsigned long) cia.ip);
- if (MP)
- {
- if (Reset || Halt)
- sim_engine_halt (SD, CPU, NULL, cia, sim_exited, 0);
- if (Unhalt)
- sim_engine_abort (SD, CPU, cia, "0x%lx: cmnd - Can not unhalt the MP",
- (unsigned long) cia.ip);
- /* if (ICR || DCR); */
- if (Task)
- sim_engine_abort (SD, CPU, cia, "0x%lx: cmnd - Can not Task the MP",
- (unsigned long) cia.ip);
- if (Msg)
- sim_engine_abort (SD, CPU, cia, "0x%lx: cmnd - Msg to MP not suported",
- (unsigned long) cia.ip);
- }
- TRACE_SINK1 (MY_INDEX, source);
-}
-31./,21.0b0000010,14.UI::::cmnd i
-"cmnd <UI>"
-{
- do_cmnd (_SD, UI);
-}
-31./,21.0b110000010,12.0,11./,4.Source::::cmnd r
-"cmnd r<Source>"
-{
- do_cmnd (_SD, vSource);
-}
-31./,21.0b110000010,12.1,11./+LongUnsignedImmediate::::cmnd l
-"cmnd <LongUnsignedImmediate>"
-{
- do_cmnd (_SD, LongUnsignedImmediate);
-}
-
-// cmp
-:function:::unsigned32:cmp_vals:signed32 s1, unsigned32 u1, signed32 s2, unsigned32 u2
-{
- unsigned32 field = 0;
- if (s1 == s2) field |= 0x001;
- if (s1 != s2) field |= 0x002;
- if (s1 > s2) field |= 0x004;
- if (s1 <= s2) field |= 0x008;
- if (s1 < s2) field |= 0x010;
- if (s1 >= s2) field |= 0x020;
- if (u1 > u2) field |= 0x040;
- if (u1 <= u2) field |= 0x080;
- if (u1 < u2) field |= 0x100;
- if (u1 >= u2) field |= 0x200;
- return field;
-}
-:function:::void:do_cmp:unsigned32 *rDest, unsigned32 source1, unsigned32 source2
-{
- unsigned32 field = 0;
- field |= cmp_vals (_SD, source1, source1, source2, source2) << 20;
- field |= cmp_vals (_SD, (signed16)source1, (unsigned16)source1,
- (signed16)source2, (unsigned16)source2) << 10;
- field |= cmp_vals (_SD, (signed8)source1, (unsigned8)source1,
- (signed8)source2, (unsigned8)source2);
- TRACE_CMP (MY_INDEX, field, source1, source2);
- *rDest = field;
-}
-31.Dest,26.Source2,21.0b1010000,14.SignedImmediate::::cmp i
-"cmp <SignedImmediate>, r<Source2>, r<Dest>"
-{
- do_cmp (_SD, rDest, vSource1, vSource2);
-}
-31.Dest,26.Source2,21.0b111010000,12.0,11./,4.Source1::::cmp r
-"cmp r<Source1>, r<Source2>, r<Dest>"
-{
- do_cmp (_SD, rDest, vSource1, vSource2);
-}
-31.Dest,26.Source2,21.0b111010000,12.1,11./+LongSignedImmediate::::cmp l
-"cmp 0x%08lx<LongSignedImmediate>, r<Source2>, r<Dest>"
-{
- do_cmp (_SD, rDest, LongSignedImmediate, vSource2);
-}
-
-// dcache
-:%s::::F:int F
-{
- if (F)
- return "f";
- else
- return "c";
-}
-31./,27.F,26.Source2,21.0b0111,17.m,16.0b00,14.SignedOffset::::dcache i
-"dcache%s<F> <SignedOffset> (r<Source2>%s<m>)"
-{
- TRACE_NOP (MY_INDEX);
- /* NOP */
-}
-31./,27.F,26.Source2,21.0b110111,15.m,14.0b00,12.0,11./,4.Source1::::dcache r
-"dcache%s<F> r<Source1> (r<Source2>%s<m>)"
-{
- TRACE_NOP (MY_INDEX);
- /* NOP */
-}
-31./,27.F,26.Source2,21.0b110111,15.m,14.0b00,12.1,11./+LongSignedImmediate::::dcache l
-"dcache%s<F> <LongSignedImmediate> (r<Source2>%s<m>)"
-{
- TRACE_NOP (MY_INDEX);
- /* NOP */
-}
-
-// dld[{.b|.h|.d}]
-void::function::do_dld:int Dest, unsigned32 base, unsigned32 *rBase, int m , int sz, int S, unsigned32 offset
-{
- do_ld (_SD, Dest, base, rBase, m, sz, S, offset);
-}
-31.Dest,26.Base,21.0b110100,15.m,14.sz,12.0,11.S,10.1,9./,4.IndOff::::dld r
-"dld%s<sz> r<IndOff>%s<S> (r<Base>%s<m>), r<Dest>"
-{
- do_dld (_SD, Dest, vBase, rBase, m, sz, S, rIndOff);
-}
-31.Dest,26.Base,21.0b110100,15.m,14.sz,12.1,11.S,10.1,9./+LongSignedImmediateOffset::::dld l
-"dld%s<sz> 0x%08lx<LongSignedImmediateOffset>%s<S> (r<Base>%s<m>), r<Dest>"
-{
- do_dld (_SD, Dest, vBase, rBase, m, sz, S, LongSignedImmediateOffset);
-}
-
-// dld.u[{.b|.h|.d}]
-void::function::do_dld_u:unsigned32 *rDest, unsigned32 base, unsigned32 *rBase, int m , int sz, int S, unsigned32 offset
-{
- do_ld_u (_SD, rDest, base, rBase, m, sz, S, offset);
-}
-31.Dest,26.Base,21.0b110101,15.m,14.sz,12.0,11.S,10.1,9./,4.IndOff::::dld.u r
-"dld.u%s<sz> r<IndOff>%s<S> (r<Base>%s<m>), r<Dest>"
-{
- do_dld_u (_SD, rDest, vBase, rBase, m, sz, S, rIndOff);
-}
-31.Dest,26.Base,21.0b110101,15.m,14.sz,12.1,11.S,10.1,9./+LongSignedImmediateOffset::::dld.u l
-"dld.u%s<sz> 0x%08lx<LongSignedImmediateOffset>%s<S> (r<Base>%s<m>), r<Dest>"
-{
- do_dld_u (_SD, rDest, vBase, rBase, m, sz, S, LongSignedImmediateOffset);
-}
-
-// dst[{.b|.h|.d}]
-void::function::do_dst:int Source, unsigned32 base, unsigned32 *rBase, int m , int sz, int S, unsigned32 offset
-{
- do_st (_SD, Source, base, rBase, m, sz, S, offset);
-}
-31.Source,26.Base,21.0b110110,15.m,14.sz,12.0,11.S,10.1,9./,4.IndOff::::dst r
-"dst%s<sz> r<IndOff>%s<S> (r<Base>%s<m>), r<Source>"
-{
- do_dst (_SD, Source, vBase, rBase, m, sz, S, rIndOff);
-}
-31.Source,26.Base,21.0b110110,15.m,14.sz,12.1,11.S,10.1,9./+LongSignedImmediateOffset::::dst l
-"dst%s<sz> 0x%08lx<LongSignedImmediateOffset>%s<S> (r<Base>%s<m>), r<Source>"
-{
- do_dst (_SD, Source, vBase, rBase, m, sz, S, LongSignedImmediateOffset);
-}
-
-// estop
-31./,21.0b1111111,14.1,13.0,12.0,11./::::estop
-
-// etrap
-31./,27.1,26./,21.0b0000001,14.UTN::::etrap i
-31./,27.1,26./,21.0b110000001,12.0,11./,4.iUTN::::etrap r
-31./,27.1,26./,21.0b110000001,12.1,11./::::etrap l
-
-
-// exts - see shift.ds
-
-
-// extu - see shift.dz
-
-
-sim_fpu::function::get_fp_reg:int reg, unsigned32 val, int precision
-{
- sim_fpu ans;
- switch (precision)
- {
- case 0: /* single */
- sim_fpu_32to (&ans, val);
- break;
- case 1: /* double */
- if (reg < 0)
- sim_engine_abort (SD, CPU, cia, "DP immediate invalid");
- if (reg & 1)
- sim_engine_abort (SD, CPU, cia, "DP FP register must be even");
- if (reg <= 1)
- sim_engine_abort (SD, CPU, cia, "DP FP register must be >= 2");
- sim_fpu_232to (&ans, GPR (reg + 1), GPR (reg));
- break;
- case 2: /* 32 bit signed integer */
- sim_fpu_i32to (&ans, val, 0);
- break;
- case 3: /* 32 bit unsigned integer */
- sim_fpu_u32to (&ans, val, 0);
- break;
- default:
- sim_engine_abort (SD, CPU, cia, "Unsupported FP precision");
- }
- return ans;
-}
-void::function::set_fp_reg:int Dest, sim_fpu val, int PD
-{
- switch (PD)
- {
- case 0: /* single */
- {
- sim_fpu_to32 (&GPR (Dest), &val);
- break;
- }
- case 1: /* double */
- {
- if (Dest & 1)
- sim_engine_abort (SD, CPU, cia, "DP FP Dest register must be even");
- if (Dest <= 1)
- sim_engine_abort (SD, CPU, cia, "DP FP Dest register must be >= 2");
- sim_fpu_to232 (&GPR (Dest + 1), &GPR (Dest + 0), &val);
- break;
- }
- case 2: /* signed */
- {
- sim_fpu_to32i (&GPR (Dest), &val, 0);
- break;
- }
- case 3: /* unsigned */
- {
- sim_fpu_to32u (&GPR (Dest), &val, 0);
- break;
- }
- default:
- sim_engine_abort (SD, CPU, cia, "Unsupported FP precision");
- }
-
-}
-// fadd.{s|d}{s|d}{s|d}
-void::function::do_fadd:int Dest, int PD, sim_fpu s1, sim_fpu s2
-{
- sim_fpu ans;
- sim_fpu_add (&ans, &s1, &s2);
- TRACE_FPU3 (ans, s1, s2);
- set_fp_reg (_SD, Dest, ans, PD);
-}
-const char *::function::str_PX:int PX
-{
- switch (PX)
- {
- case 0: return "s";
- case 1: return "d";
- case 2: return "i";
- case 3: return "u";
- default: return "?";
- }
-}
-31.Dest,26.Source2,21.0b111110000,12.0,11.r,10.PD,8.P2,6.P1,4.Source1::f::fadd r
-"fadd.%s<PX#P1>%s<PX#P2>%s<PX#PD> r<Source1>, r<Source2>, r<Dest>"
-{
- do_fadd (_SD, Dest, PD,
- get_fp_reg (_SD, Source1, vSource1, P1),
- get_fp_reg (_SD, Source2, vSource2, P2));
-}
-31.Dest,26.Source2,21.0b111110000,12.1,11.r,10.PD,8.P2,6.P1,4./+SinglePrecisionFloatingPoint::f::fadd l
-"fadd.%s<PX#P1>%s<PX#P2>%s<PX#PD> 0x%08lx<SinglePrecisionFloatingPoint>, r<Source2>, r<Dest>"
-{
- do_fadd (_SD, Dest, PD,
- get_fp_reg (_SD, -1, SinglePrecisionFloatingPoint, P1),
- get_fp_reg (_SD, Source2, vSource2, P2));
-
-}
-
-// fcmp.{s|d}{s|d}{s|d}
-void::function::do_fcmp:unsigned32 *rDest, sim_fpu s1, sim_fpu s2
-{
- unsigned32 result = 0;
- if (sim_fpu_is_nan (&s1) || sim_fpu_is_nan (&s2))
- result |= BIT32 (30);
- else
- {
- result |= BIT32 (31);
- if (sim_fpu_is_eq (&s1, &s2)) result |= BIT32(20);
- if (sim_fpu_is_ne (&s1, &s2)) result |= BIT32(21);
- if (sim_fpu_is_gt (&s1, &s2)) result |= BIT32(22);
- if (sim_fpu_is_le (&s1, &s2)) result |= BIT32(23);
- if (sim_fpu_is_lt (&s1, &s2)) result |= BIT32(24);
- if (sim_fpu_is_ge (&s1, &s2)) result |= BIT32(25);
- if (sim_fpu_is_lt (&s1, &sim_fpu_zero)
- || sim_fpu_is_gt (&s1, &s2)) result |= BIT32(26);
- if (sim_fpu_is_lt (&sim_fpu_zero, &s1)
- && sim_fpu_is_lt (&s1, &s2)) result |= BIT32(27);
- if (sim_fpu_is_le (&sim_fpu_zero, &s1)
- && sim_fpu_is_le (&s1, &s2)) result |= BIT32(28);
- if (sim_fpu_is_le (&s1, &sim_fpu_zero)
- || sim_fpu_is_ge (&s1, &s2)) result |= BIT32(29);
- }
- *rDest = result;
- TRACE_FPU2CMP (result, s1, s2);
-}
-31.Dest,26.Source2,21.0b111110101,12.0,11./,10.0,8.P2,6.P1,4.Source1::f::fcmp r
-"fcmp.%s<PX#P1>%s<PX#P2> r<Source1>, r<Source2>, r<Dest>"
-{
- do_fcmp (_SD, rDest,
- get_fp_reg (_SD, Source1, vSource1, P1),
- get_fp_reg (_SD, Source2, vSource2, P2));
-}
-31.Dest,26.Source2,21.0b111110101,12.1,11./,10.0,8.P2,6.P1,4./+SinglePrecisionFloatingPoint::f::fcmp l
-"fcmp.%s<PX#P1>%s<PX#P2> 0x%08lx<SinglePrecisionFloatingPoint>, r<Source2>, r<Dest>"
-{
- do_fcmp (_SD, rDest,
- get_fp_reg (_SD, -1, SinglePrecisionFloatingPoint, P1),
- get_fp_reg (_SD, Source2, vSource2, P2));
-}
-
-
-// fdiv.{s|d}{s|d}{s|d}
-void::function::do_fdiv:int Dest, int PD, sim_fpu s1, sim_fpu s2
-{
- sim_fpu ans;
- sim_fpu_div (&ans, &s1, &s2);
- TRACE_FPU3 (ans, s1, s2);
- set_fp_reg (_SD, Dest, ans, PD);
-}
-31.Dest,26.Source2,21.0b111110011,12.0,11./,10.PD,8.P2,6.P1,4.Source1::f::fdiv r
-"fdiv.%s<PX#P1>%s<PX#P2>%s<PX#PD> r<Source1>, r<Source2>, r<Dest>"
-{
- do_fdiv (_SD, Dest, PD,
- get_fp_reg (_SD, Source1, vSource1, P1),
- get_fp_reg (_SD, Source2, vSource2, P2));
-}
-31.Dest,26.Source2,21.0b111110011,12.1,11./,10.PD,8.P2,6.P1,4./+SinglePrecisionFloatingPoint::f::fdiv l
-"fdiv.%s<PX#P1>%s<PX#P2>%s<PX#PD> 0x%08lx<SinglePrecisionFloatingPoint>, r<Source2>, r<Dest>"
-{
- do_fdiv (_SD, Dest, PD,
- get_fp_reg (_SD, -1, SinglePrecisionFloatingPoint, P1),
- get_fp_reg (_SD, Source2, vSource2, P2));
-}
-
-// fmpy.{s|d|i|u}{s|d|i|u}{s|d|i|u}
-void::function::do_fmpy:int Dest, int PD, sim_fpu s1, sim_fpu s2
-{
- switch (PD)
- {
- case 2: /* signed */
- {
- signed64 i1;
- signed64 i2;
- sim_fpu_to64i (&i1, &s1, 0);
- sim_fpu_to64i (&i2, &s2, 0);
- GPR (Dest) = i1 * i2;
- TRACE_FPU2I (GPR (Dest), s1, s2);
- break;
- }
- case 3: /* unsigned */
- {
- unsigned64 u1;
- unsigned64 u2;
- sim_fpu_to64u (&u1, &s1, 0);
- sim_fpu_to64u (&u2, &s2, 0);
- GPR (Dest) = u1 * u2;
- TRACE_FPU2I (GPR (Dest), s1, s2);
- break;
- }
- default:
- {
- sim_fpu ans;
- sim_fpu_mul (&ans, &s1, &s2);
- set_fp_reg (_SD, Dest, ans, PD);
- TRACE_FPU3 (ans, s1, s2);
- }
- }
-}
-31.Dest,26.Source2,21.0b111110010,12.0,11./,10.PD,8.P2,6.P1,4.Source1::f::fmpy r
-"fmpy.%s<PX#P1>%s<PX#P2>%s<PX#PD> r<Source1>, r<Source2>, r<Dest>"
-{
- do_fmpy (_SD, Dest, PD,
- get_fp_reg (_SD, Source1, vSource1, P1),
- get_fp_reg (_SD, Source2, vSource2, P2));
-}
-31.Dest,26.Source2,21.0b111110010,12.1,11./,10.PD,8.P2,6.P1,4./+SinglePrecisionFloatingPoint::f::fmpy l
-"fmpy.%s<PX#P1>%s<PX#P2>%s<PX#PD> 0x%08lx<SinglePrecisionFloatingPoint>, r<Source2>, r<Dest>"
-{
- do_fmpy (_SD, Dest, PD,
- get_fp_reg (_SD, -1, SinglePrecisionFloatingPoint, P1),
- get_fp_reg (_SD, Source2, vSource2, P2));
-}
-
-// frndm.{s|d|i|u}{s|d|i|u}
-void::function::do_frnd:int Dest, int PD, sim_fpu s1
-{
- set_fp_reg (_SD, Dest, s1, PD);
- TRACE_FPU1 (s1);
-}
-31.Dest,26./,21.0b111110100,12.0,11.r,10.PD,8.0b11,6.P1,4.Source::f::frndm r
-"frndm.%s<PX#P1>%s<PX#PD> r<Source>, r<Dest>"
-{
- do_frnd (_SD, Dest, PD,
- get_fp_reg (_SD, Source, vSource, P1));
-}
-31.Dest,26./,21.0b111110100,12.1,11.r,10.PD,8.0b11,6.P1,4./+SinglePrecisionFloatingPoint::f::frndm l
-"frndm.%s<PX#P1>%s<PX#PD> 0x%08lx<SinglePrecisionFloatingPoint>, r<Dest>"
-{
- do_frnd (_SD, Dest, PD,
- get_fp_reg (_SD, -1, SinglePrecisionFloatingPoint, P1));
-}
-
-// frndn.{s|d|i|u}{s|d|i|u}
-31.Dest,26./,21.0b111110100,12.0,11.r,10.PD,8.0b00,6.P1,4.Source::f::frndn r
-"frndn.%s<PX#P1>%s<PX#PD> r<Source>, r<Dest>"
-{
- do_frnd (_SD, Dest, PD,
- get_fp_reg (_SD, Source, vSource, P1));
-}
-31.Dest,26./,21.0b111110100,12.1,11.r,10.PD,8.0b00,6.P1,4./+SinglePrecisionFloatingPoint::f::frndn l
-"frndn.%s<PX#P1>%s<PX#PD> 0x%08lx<SinglePrecisionFloatingPoint>, r<Dest>"
-{
- do_frnd (_SD, Dest, PD,
- get_fp_reg (_SD, -1, SinglePrecisionFloatingPoint, P1));
-}
-
-// frndp.{s|d|i|u}{s|d|i|u}
-31.Dest,26./,21.0b111110100,12.0,11.r,10.PD,8.0b10,6.P1,4.Source::f::frndp r
-"frndp.%s<PX#P1>%s<PX#PD> r<Source>, r<Dest>"
-{
- do_frnd (_SD, Dest, PD,
- get_fp_reg (_SD, Source, vSource, P1));
-}
-31.Dest,26./,21.0b111110100,12.1,11.r,10.PD,8.0b10,6.P1,4./+SinglePrecisionFloatingPoint::f::frndp l
-"frndp.%s<PX#P1>%s<PX#PD> 0x%08lx<SinglePrecisionFloatingPoint>, r<Dest>"
-{
- do_frnd (_SD, Dest, PD,
- get_fp_reg (_SD, -1, SinglePrecisionFloatingPoint, P1));
-}
-
-// frndz.{s|d|i|u}{s|d|i|u}
-31.Dest,26./,21.0b111110100,12.0,11.r,10.PD,8.0b01,6.P1,4.Source::f::frndz r
-"frndz.%s<PX#P1>%s<PX#PD> r<Source>, r<Dest>"
-{
- do_frnd (_SD, Dest, PD,
- get_fp_reg (_SD, Source, vSource, P1));
-}
-31.Dest,26./,21.0b111110100,12.1,11.r,10.PD,8.0b01,6.P1,4./+SinglePrecisionFloatingPoint::f::frndz l
-"frndz.%s<PX#P1>%s<PX#PD> 0x%08lx<SinglePrecisionFloatingPoint>, r<Dest>"
-{
- do_frnd (_SD, Dest, PD,
- get_fp_reg (_SD, -1, SinglePrecisionFloatingPoint, P1));
-}
-
-// fsqrt.{s|d}{s|d}{s|d}
-#void::function::do_fsqrt:unsigned32 *rDest, unsigned32 Source, unsigned32 Source2
-# sim_io_error ("fsqrt");
-31.Dest,26./,21.0b111110111,12.0,11./,10.PD,8.//,6.P1,4.Source::f::fsqrt r
-"fsqrt.%s<PX#P1>%s<PX#PD> r<Source>, r<Dest>"
-# do_fsqrt (_SD, rDest, vSource);
-31.Dest,26./,21.0b111110111,12.1,11./,10.PD,8.//,6.P1,4./+SinglePrecisionFloatingPoint::f::fsqrt l
-"fsqrt.%s<PX#P1>%s<PX#PD> 0x%08lx<SinglePrecisionFloatingPoint>, r<Dest>"
-# do_fsqrt (_SD, rDest, SinglePrecisionFloatingPoint);
-
-
-// fsub.{s|d}{s|d}{s|d}
-void::function::do_fsub:int Dest, int PD, sim_fpu s1, sim_fpu s2
-{
- sim_fpu ans;
- sim_fpu_sub (&ans, &s1, &s2);
- TRACE_FPU3 (ans, s1, s2);
- set_fp_reg (_SD, Dest, ans, PD);
-}
-31.Dest,26.Source2,21.0b111110001,12.0,11.r,10.PD,8.P2,6.P1,4.Source1::f::fsub r
-"fsub.%s<PX#P1>%s<PX#P2>%s<PX#PD> r<Source1>, r<Source2>, r<Dest>"
-{
- do_fsub (_SD, Dest, PD,
- get_fp_reg (_SD, Source1, vSource1, P1),
- get_fp_reg (_SD, Source2, vSource2, P2));
-}
-31.Dest,26.Source2,21.0b111110001,12.1,11.r,10.PD,8.P2,6.P1,4./+SinglePrecisionFloatingPoint::f::fsub l
-"fsub.%s<PX#P1>%s<PX#P2>%s<PX#PD> 0x%08lx<SinglePrecisionFloatingPoint>, r<Source2>, r<Dest>"
-{
- do_fsub (_SD, Dest, PD,
- get_fp_reg (_SD, -1, SinglePrecisionFloatingPoint, P1),
- get_fp_reg (_SD, Source2, vSource2, P2));
-}
-
-// illop
-31./,21.0b0000000,14./::::illop
-"illop"
-31./,21.0b111111111,12./::::illop l
-"illop"
-
-
-// ins - see sl.im
-
-
-// jsr[.a]
-instruction_address::function::do_jsr:instruction_address nia, signed32 *rLink, int annul, unsigned32 offset, unsigned32 base
-{
- address_word target = offset + base;
- TRACE_UCOND_BR (MY_INDEX, target);
- nia = do_branch (_SD, annul, target, 1, rLink);
- if (nia.dp & 0x3)
- sim_engine_abort (SD, CPU, cia,
- "0x%lx: destination address 0x%lx misaligned",
- (unsigned long) cia.ip,
- (unsigned long) nia.dp);
- return nia;
-}
-31.Link,26.Base,21.0b100010,15.A,14.SignedOffset::::jsr i
-"jsr%s<A> <SignedOffset>, r<Link>"
-{
- nia = do_jsr (_SD, nia, rLink, A, vSignedOffset, vBase);
-}
-31.Link,26.Base,21.0b11100010,13.A,12.0,11./,4.IndOff::::jsr r
-"jsr%s<A> r<IndOff>, r<Link>"
-{
- nia = do_jsr (_SD, nia, rLink, A, rIndOff, vBase);
-}
-31.Link,26.Base,21.0b11100010,13.A,12.1,11./+LongSignedImmediate::::jsr l
-"jsr%s<A> <LongSignedImmediate>, r<Link>"
-{
- nia = do_jsr (_SD, nia, rLink, A, LongSignedImmediate, vBase);
-}
-
-// ld[{.b.h.d}]
-void::function::do_ld:int Dest, unsigned32 base, unsigned32 *rBase, int m , int sz, int S, unsigned32 offset
-{
- unsigned32 addr;
- switch (sz)
- {
- case 0:
- addr = base + (S ? (offset << 0) : offset);
- if (m)
- *rBase = addr;
- GPR(Dest) = MEM (signed, addr, 1);
- break;
- case 1:
- addr = base + (S ? (offset << 1) : offset);
- if (m)
- *rBase = addr;
- GPR(Dest) = MEM (signed, addr, 2);
- break;
- case 2:
- addr = base + (S ? (offset << 2) : offset);
- if (m)
- *rBase = addr;
- GPR(Dest) = MEM (signed, addr, 4);
- break;
- case 3:
- {
- signed64 val;
- if (Dest & 0x1)
- sim_engine_abort (SD, CPU, cia, "0x%lx: ld.d to odd register %d",
- cia.ip, Dest);
- addr = base + (S ? (offset << 3) : offset);
- if (m)
- *rBase = addr;
- val = MEM (signed, addr, 8);
- GPR(Dest + 1) = VH4_8 (val);
- GPR(Dest + 0) = VL4_8 (val);
- }
- break;
- default:
- addr = -1;
- sim_engine_abort (SD, CPU, cia, "ld - invalid sz %d", sz);
- }
- TRACE_LD (GPR(Dest), m, S, base, offset);
-}
-const char *::function::str_sz:int sz
-{
- switch (sz)
- {
- case 0: return ".b";
- case 1: return ".h";
- case 2: return "";
- case 3: return ".d";
- default: return "?";
- }
-}
-const char *::function::str_m:int m
-{
- if (m)
- return ":m";
- else
- return "";
-}
-const char *::function::str_S:int S
-{
- if (S)
- return ":s";
- else
- return "";
-}
-31.Dest,26.Base,21.0b0100,17.m,16.sz,14.SignedOffset::::ld i
-"ld%s<sz> <SignedOffset> (r<Base>%s<m>), r<Dest>"
-{
- do_ld (_SD, Dest, vBase, rBase, m, sz, 0, vSignedOffset);
-}
-31.Dest,26.Base,21.0b110100,15.m,14.sz,12.0,11.S,10.0,9./,4.IndOff::::ld r
-"ld%s<sz> r<IndOff>%s<S> (r<Base>%s<m>), r<Dest>"
-{
- do_ld (_SD, Dest, vBase, rBase, m, sz, S, rIndOff);
-}
-31.Dest,26.Base,21.0b110100,15.m,14.sz,12.1,11.S,10.0,9./+LongSignedImmediateOffset::::ld l
-"ld%s<sz> 0x%08lx<LongSignedImmediateOffset>%s<S> (r<Base>%s<m>), r<Dest>"
-{
- do_ld (_SD, Dest, vBase, rBase, m, sz, S, LongSignedImmediateOffset);
-}
-
-// ld.u[{.b.h.d}]
-void::function::do_ld_u:unsigned32 *rDest, unsigned32 base, unsigned32 *rBase, int m , int sz, int S, unsigned32 offset
-{
- unsigned32 addr;
- switch (sz)
- {
- case 0:
- addr = base + (S ? (offset << 0) : offset);
- *rDest = MEM (unsigned, addr, 1);
- break;
- case 1:
- addr = base + (S ? (offset << 1) : offset);
- *rDest = MEM (unsigned, addr, 2);
- break;
- default:
- addr = -1;
- sim_engine_abort (SD, CPU, cia, "ld.u - invalid sz %d", sz);
- }
- if (m)
- *rBase = addr;
- TRACE_LD (m, S, *rDest, base, offset);
-}
-31.Dest,26.Base,21.0b0101,17.m,16.sz,14.SignedOffset::::ld.u i
-"ld.u%s<sz> <SignedOffset> (r<Base>%s<m>), r<Dest>"
-{
- do_ld_u (_SD, rDest, vBase, rBase, m, sz, 0, vSignedOffset);
-}
-31.Dest,26.Base,21.0b110101,15.m,14.sz,12.0,11.S,10.0,9./,4.IndOff::::ld.u r
-"ld.u%s<sz> r<IndOff>%s<S> (r<Base>%s<m>), r<Dest>"
-{
- do_ld_u (_SD, rDest, vBase, rBase, m, sz, S, rIndOff);
-}
-31.Dest,26.Base,21.0b110101,15.m,14.sz,12.1,11.S,10.0,9./+LongSignedImmediateOffset::::ld.u l
-"ld.u%s<sz> 0x%08lx<LongSignedImmediateOffset>%s<S> (r<Base>%s<m>), r<Dest>"
-{
- do_ld_u (_SD, rDest, vBase, rBase, m, sz, S, LongSignedImmediateOffset);
-}
-
-// lmo
-31.Dest,26.Source,21.0b111111000,12.0,11./::::lmo
-"lmo r<Source>, r<Dest>"
-{
- int b;
- for (b = 0; b < 32; b++)
- if (vSource & BIT32 (31 - b))
- break;
- TRACE_ALU2 (MY_INDEX, b, vSource);
- *rDest = b;
-}
-
-
-// nop - see rdcr 0, r0
-
-
-void::function::do_or:unsigned32 *rDest, unsigned32 Source1, unsigned32 Source2
-{
- unsigned32 result = Source1 | Source2;
- TRACE_ALU3 (MY_INDEX, result, Source1, Source2);
- *rDest = result;
-}
-
-// or, or.tt
-31.Dest,26.Source2,21.0b0010111,14.UnsignedImmediate::::or.tt i
-"or.tt <UnsignedImmediate>, r<Source2>, r<Dest>"
-{
- do_or (_SD, rDest, vSource1, vSource2);
-}
-31.Dest,26.Source2,21.0b110010111,12.0,11./,4.Source1::::or.tt r
-"or.tt r<Source1>, r<Source2>, r<Dest>"
-{
- do_or (_SD, rDest, vSource1, vSource2);
-}
-31.Dest,26.Source2,21.0b110010111,12.1,11./+LongUnsignedImmediate::::or.tt l
-"or.tt 0x%08lx<LongUnsignedImmediate>, r<Source2>, r<Dest>"
-{
- do_or (_SD, rDest, LongUnsignedImmediate, vSource2);
-}
-
-// or.ff
-31.Dest,26.Source2,21.0b0011110,14.UnsignedImmediate::::or.ff i
-"or.ff <UnsignedImmediate>, r<Source2>, r<Dest>"
-{
- do_or (_SD, rDest, ~vSource1, ~vSource2);
-}
-31.Dest,26.Source2,21.0b110011110,12.0,11./,4.Source1::::or.ff r
-"or.ff r<Source1>, r<Source2>, r<Dest>"
-{
- do_or (_SD, rDest, ~vSource1, ~vSource2);
-}
-31.Dest,26.Source2,21.0b110011110,12.1,11./+LongUnsignedImmediate::::or.ff l
-"or.ff 0x%08lx<LongUnsignedImmediate>, r<Source2>, r<Dest>"
-{
- do_or (_SD, rDest, ~LongUnsignedImmediate, ~vSource2);
-}
-
-// or.ft
-31.Dest,26.Source2,21.0b0011101,14.UnsignedImmediate::::or.ft i
-"or.ft <UnsignedImmediate>, r<Source2>, r<Dest>"
-{
- do_or (_SD, rDest, ~vSource1, vSource2);
-}
-31.Dest,26.Source2,21.0b110011101,12.0,11./,4.Source1::::or.ft r
-"or.ft r<Source1>, r<Source2>, r<Dest>"
-{
- do_or (_SD, rDest, ~vSource1, vSource2);
-}
-31.Dest,26.Source2,21.0b110011101,12.1,11./+LongUnsignedImmediate::::or.ft l
-"or.ft 0x%08lx<LongUnsignedImmediate>, r<Source2>, r<Dest>"
-{
- do_or (_SD, rDest, ~LongUnsignedImmediate, vSource2);
-}
-
-// or.tf
-31.Dest,26.Source2,21.0b0011011,14.UnsignedImmediate::::or.tf i
-"or.tf <UnsignedImmediate>, r<Source2>, r<Dest>"
-{
- do_or (_SD, rDest, vSource1, ~vSource2);
-}
-31.Dest,26.Source2,21.0b110011011,12.0,11./,4.Source1::::or.tf r
-"or.tf r<Source1>, r<Source2>, r<Dest>"
-{
- do_or (_SD, rDest, vSource1, ~vSource2);
-}
-31.Dest,26.Source2,21.0b110011011,12.1,11./+LongUnsignedImmediate::::or.tf l
-"or.tf 0x%08lx<LongUnsignedImmediate>, r<Source2>, r<Dest>"
-{
- do_or (_SD, rDest, LongUnsignedImmediate, ~vSource2);
-}
-
-// rdcr
-void::function::do_rdcr:unsigned32 Dest, int cr
-{
- TRACE_SINK2 (MY_INDEX, Dest, cr);
- GPR (Dest) = CR (cr);
-}
-31.Dest,26.0,21.0b0000100,14.UCRN::::rdcr i
-"rdcr CR[<UCRN>], r<Dest>"
-{
- do_rdcr (_SD, Dest, UCRN);
-}
-31.Dest,26.0,21.0b110000100,12.0,11./,4.INDCR::::rdcr r
-"rdcr CR[r<INDCR>], r<Dest>"
-{
- do_rdcr (_SD, Dest, UCRN);
-}
-31.Dest,26.0,21.0b110000100,12.1,11./+UnsignedControlRegisterNumber::::rdcr l
-"rdcr CR[<UnsignedControlRegisterNumber>], r<Dest>"
-{
- do_rdcr (_SD, Dest, UnsignedControlRegisterNumber);
-}
-
-// rmo
-31.Dest,26.Source,21.0b111111001,12.0,11./::::rmo
-"rmo r<Source>, r<Dest>"
-{
- int b;
- for (b = 0; b < 32; b++)
- if (vSource & BIT32 (b))
- break;
- if (b < 32)
- b = 31 - b;
- TRACE_ALU2 (MY_INDEX, b, vSource);
- *rDest = b;
-}
-
-// rotl - see sl.dz
-
-
-// rotr - see sl.dz
-
-
-// shl - see sl.iz
-
-
-// sl.{d|e|i}{m|s|z}
-void::function::do_shift:int Dest, unsigned32 source, int Merge, int i, int n, int EndMask, int Rotate
-{
- /* see 10-30 for a reasonable description */
- unsigned32 input = source;
- unsigned32 rotated;
- unsigned32 endmask;
- unsigned32 shiftmask;
- unsigned32 cm;
- int nRotate;
- /* rotate the source */
- if (n)
- {
- rotated = ROTR32 (source, Rotate);
- nRotate = (- Rotate) & 31;
- }
- else
- {
- rotated = ROTL32 (source, Rotate);
- nRotate = Rotate;
- }
- /* form the end mask */
- if (EndMask == 0)
- endmask = ~ (unsigned32)0;
- else
- endmask = (1 << EndMask) - 1;
- if (i)
- endmask = ~endmask;
- /* form the shiftmask */
- switch (Merge)
- {
- case 0: case 1: case 2:
- shiftmask = ~ (unsigned32)0; /* disabled */
- break;
- case 3: case 5: /* enabled - 0 -> 32 */
- if (nRotate == 0)
- shiftmask = ~ (unsigned32)0;
- else
- shiftmask = ((1 << nRotate) - 1); /* enabled - 0 -> 0 */
- break;
- case 4:
- shiftmask = ((1 << nRotate) - 1); /* enabled - 0 -> 0 */
- break;
- case 6: case 7:
- shiftmask = ~((1 << nRotate) - 1); /* inverted */
- break;
- default:
- sim_engine_abort (SD, CPU, cia,
- "0x%lx: Invalid merge (%d) for shift",
- (long) cia.ip, (int) source);
- shiftmask = 0;
- }
- /* and the composite mask */
- cm = shiftmask & endmask;
- /* and merge */
- switch (Merge)
- {
- case 0: case 3: case 6: /* zero */
- GPR (Dest) = rotated & cm;
- break;
- case 1: case 4: case 7: /* merge */
- GPR (Dest) = (rotated & cm) | (GPR (Dest) & ~cm);
- break;
- case 2: case 5: /* sign */
- {
- int b;
- GPR (Dest) = rotated & cm;
- for (b = 1; b <= 31; b++)
- if (!MASKED32 (cm, b, b))
- GPR (Dest) |= INSERTED32 (EXTRACTED32 (GPR (Dest), b - 1, b - 1),
- b, b);
- }
- break;
- default:
- sim_engine_abort (SD, CPU, cia,
- "0x%lx: Invalid merge (%d)",
- (long) cia.ip, (int) source);
- }
- TRACE_SHIFT (MY_INDEX, GPR (Dest), input, i, n, Merge, EndMask, Rotate);
-}
-const char *::function::str_Merge:int Merge
-{
- switch (Merge)
- {
- case 0: return "dz";
- case 1: return "dm";
- case 2: return "ds";
- case 3: return "ez";
- case 4: return "em";
- case 5: return "es";
- case 6: return "iz";
- case 7: return "im";
- default: return "?";
- }
-}
-31.Dest,26.Source,21.0b0001,17.Merge,14./,11.i,10.n,9.EndMask,4.Rotate::::sl i
-"sl.%s<Merge> <Rotate>, <EndMask>, r<Source>, r<Dest>"
-{
- do_shift (_SD, Dest, vSource, Merge, i, n, EndMask, Rotate);
-}
-31.Dest,26.Source,21.0b110001,15.Merge,12.0,11.i,10.n,9.EndMask,4.RotReg::::sl r
-"sl.%s<Merge> r<RotReg>, <EndMask>, r<Source>, r<Dest>"
-{
- do_shift (_SD, Dest, vSource, Merge, i, n, EndMask, GPR (RotReg) & 31);
-}
-
-// sli.{d|e|i}{m|s|z} - see shift
-
-
-// sr.{d|e|i}{m|s|z} - see shift
-
-
-// sra - see sr.es - see shift
-
-
-// sri.{d|e|i}{m|s|z} - see shift
-
-
-// srl - see sr.ez
-
-
-// st[{.b|.h|.d}]
-void::function::do_st:int Source, unsigned32 base, unsigned32 *rBase, int m , int sz, int S, unsigned32 offset
-{
- unsigned32 addr;
- switch (sz)
- {
- case 0:
- addr = base + (S ? (offset << 0) : offset);
- STORE (addr, 1, GPR(Source));
- break;
- case 1:
- addr = base + (S ? (offset << 1) : offset);
- STORE (addr, 2, GPR(Source));
- break;
- case 2:
- addr = base + (S ? (offset << 2) : offset);
- STORE (addr, 4, GPR(Source));
- break;
- case 3:
- {
- signed64 val;
- if (Source & 0x1)
- sim_engine_abort (SD, CPU, cia,
- "0x%lx: st.d with odd source register %d",
- cia.ip, Source);
- addr = base + (S ? (offset << 3) : offset);
- val = U8_4 (GPR(Source + 1), GPR(Source));
- STORE (addr, 8, val);
- }
- break;
- default:
- addr = -1;
- sim_engine_abort (SD, CPU, cia, "st - invalid sz %d", sz);
- }
- if (m)
- *rBase = addr;
- TRACE_ST (Source, m, S, base, offset);
-}
-31.Source,26.Base,21.0b0110,17.m,16.sz,14.SignedOffset::::st i
-"st%s<sz> <SignedOffset> (r<Base>%s<m>), r<Source>"
-{
- do_st (_SD, Source, vBase, rBase, m, sz, 0, vSignedOffset);
-}
-31.Source,26.Base,21.0b110110,15.m,14.sz,12.0,11.S,10.0,9./,4.IndOff::::st r
-"st%s<sz> r<IndOff>%s<S> (r<Base>%s<m>), r<Source>"
-{
- do_st (_SD, Source, vBase, rBase, m, sz, S, rIndOff);
-}
-31.Source,26.Base,21.0b110110,15.m,14.sz,12.1,11.S,10.0,9./+LongSignedImmediateOffset::::st l
-"st%s<sz> 0x%08lx<LongSignedImmediateOffset>%s<S> (r<Base>%s<m>), r<Source>"
-{
- do_st (_SD, Source, vBase, rBase, m, sz, S, LongSignedImmediateOffset);
-}
-
-// sub
-void::function::do_sub:signed32 *rDest, signed32 Source1, signed32 Source2
-{
- ALU_BEGIN (Source1);
- ALU_SUB (Source2);
- ALU_END (*rDest);
- TRACE_ALU3 (MY_INDEX, *rDest, Source1, Source2);
-}
-31.Dest,26.Source2,21.0b101101,15.0,14.SignedImmediate::::sub i
-"sub <SignedImmediate>, r<Source2>, r<Dest>"
-{
- do_sub (_SD, rDest, vSource1, vSource2);
-}
-31.Dest,26.Source2,21.0b11101101,13.0,12.0,11./,4.Source1::::sub r
-"sub r<Source1>, r<Source2>, r<Dest>"
-{
- do_sub (_SD, rDest, vSource1, vSource2);
-}
-31.Dest,26.Source2,21.0b11101101,13.0,12.1,11./+LongSignedImmediate::::sub l
-"sub 0x%08lx<LongSignedImmediate>, r<Source2>, r<Dest>"
-{
- do_sub (_SD, rDest, LongSignedImmediate, vSource2);
-}
-
-// subu
-void::function::do_subu:unsigned32 *rDest, unsigned32 Source1, signed32 Source2
-{
- unsigned32 result = Source1 - Source2;
- TRACE_ALU3 (MY_INDEX, result, Source1, Source2);
- *rDest = result;
-}
-// NOTE - the book has 15.1 which conflicts with subu.
-31.Dest,26.Source2,21.0b101101,15.1,14.SignedImmediate::::subu i
-"subu <SignedImmediate>, r<Source2>, r<Dest>"
-{
- do_subu (_SD, rDest, vSource1, vSource2);
-}
-31.Dest,26.Source2,21.0b11101101,13.1,12.0,11./,4.Source1::::subu r
-"subu r<Source1>, r<Source2>, r<Dest>"
-{
- do_subu (_SD, rDest, vSource1, vSource2);
-}
-31.Dest,26.Source2,21.0b11101101,13.1,12.1,11./+LongSignedImmediate::::subu l
-"subu 0x%08lx<LongSignedImmediate>, r<Source2>, r<Dest>"
-{
- do_subu (_SD, rDest, LongSignedImmediate, vSource2);
-}
-
-// swcr
-void::function::do_swcr:int Dest, signed32 source, signed32 cr
-{
- tic80_control_regs reg = tic80_index2cr (cr);
- /* cache the old CR value */
- unsigned32 old_cr = CR (cr);
- /* Handle the write if allowed */
- if (cr >= 0x4000 || !(CPU)->is_user_mode)
- switch (reg)
- {
- case INTPEN_CR:
- CR (cr) &= ~source;
- break;
- default:
- CR (cr) = source;
- break;
- }
- /* Finish off the read */
- GPR (Dest) = old_cr;
- TRACE_SINK3 (MY_INDEX, source, cr, Dest);
-}
-31.Dest,26.Source,21.0b000010,15.1,14.UCRN::::swcr i
-"swcr CR[<UCRN>], r<Dest>"
-{
- do_swcr (_SD, Dest, vSource, UCRN);
-}
-31.Dest,26.Source,21.0b11000010,13.1,12.0,11./,4.INDCR::::swcr r
-"swcr CR[r<INDCR>], r<Dest>"
-{
- do_swcr (_SD, Dest, vSource, UCRN);
-}
-31.Dest,26.Source,21.0b11000010,13.1,12.1,11./+LongUnsignedControlRegisterNumber::::swcr l
-"swcr CR[<LongUnsignedControlRegisterNumber>], r<Dest>"
-{
- do_swcr (_SD, Dest, vSource, LongUnsignedControlRegisterNumber);
-}
-
-// trap
-void::function::do_trap:unsigned32 trap_number
-{
- int i;
- TRACE_SINK1 (MY_INDEX, trap_number);
- switch (trap_number)
- {
- case 72:
- switch (GPR(15))
- {
- case 1: /* EXIT */
- {
- sim_engine_halt (SD, CPU, NULL, cia, sim_exited, GPR(2));
- break;
- }
- case 4: /* WRITE */
- {
- unsigned i;
- if (GPR(2) == 1)
- for (i = 0; i < GPR(6); i++)
- {
- char c;
- c = MEM (unsigned, GPR(4) + i, 1);
- sim_io_write_stdout (SD, &c, 1);
- }
- else if (GPR(2) == 2)
- for (i = 0; i < GPR(6); i++)
- {
- char c;
- c = MEM (unsigned, GPR(4) + i, 1);
- sim_io_write_stderr (SD, &c, 1);
- }
- else
- sim_engine_abort (SD, CPU, cia,
- "0x%lx: write to invalid fid %d",
- (long) cia.ip, (int) GPR(2));
- GPR(2) = GPR(6);
- break;
- }
- case 20: /* GETPID */
- {
- GPR(2) = getpid ();
- break;
- }
- case 37: /* KILL */
- if ( GPR (2) != (unsigned) getpid ())
- {
- int ret = kill (GPR(2), GPR(4));
- if (ret < 0)
- ret = -errno;
- GPR (2) = ret;
- break;
- }
- else
- {
- sim_engine_halt (SD, CPU, NULL, cia, sim_signalled, GPR(4));
- break;
- }
- default:
- /* For system calls which are defined, just return EINVAL instead of trapping */
- if (GPR(15) <= 204)
- {
- GPR(2) = -22; /* -EINVAL */
- break;
- }
- sim_engine_abort (SD, CPU, cia,
- "0x%lx: unknown syscall %d",
- (long) cia.ip, (int) GPR(15));
- }
- break;
- case 73:
- sim_engine_halt (SD, CPU, NULL, cia, sim_stopped, SIM_SIGTRAP);
-
- /* Add a few traps for now to print the register state */
- case 74:
- case 75:
- case 76:
- case 77:
- case 78:
- case 79:
- if (!TRACE_ALU_P (CPU))
- trace_one_insn (SD, CPU, cia.ip, 1, itable[MY_INDEX].file,
- itable[MY_INDEX].line_nr, "trap",
- "Trap %ld", (long) trap_number);
-
- for (i = 0; i < 32; i++)
- sim_io_eprintf (SD, "%s0x%.8lx%s", ((i % 8) == 0) ? "\t" : " ", (long)GPR(i),
- (((i+1) % 8) == 0) ? "\n" : "");
- sim_io_write_stderr (SD, "\n", 1);
- break;
-
- default:
- sim_engine_abort (SD, CPU, cia,
- "0x%lx: unsupported trap %d",
- (long) cia.ip, (int) trap_number);
- }
-}
-31./,27.0,26./,21.0b0000001,14.UTN::::trap i
-"trap <UTN>"
-{
- do_trap (_SD, UTN);
-}
-31./,27.0,26./,21.0b110000001,12.0,11./,4.INDTR::::trap r
-"trap r<INDTR>"
-{
- do_trap (_SD, UTN);
-}
-31./,27.0,26./,21.0b110000001,12.1,11./+UTN::::trap l
-"trap 0x%08lx<UTN>"
-{
- do_trap (_SD, UTN);
-}
-
-// vadd.{s|d}{s|d}
-31.*,26.Dest,21.0b11110,16./,15.0b000,12.0,11./,10.*,9.*,7.PD,6.*,5.P1,4.Source::f::vadd r
-31.*,26.Dest,21.0b11110,16./,15.0b000,12.1,11./,10.*,9.*,7.PD,6.*,5.P1,4.Source::f::vadd l
-
-
-// vld{0|1}.{s|d} - see above - same instruction
-#31.Dest,26.*,21.0b11110,16.*,10.1,9.S,8.*,6.p,7.******::f::vld
-
-
-// vmac.ss{s|d}
-#31.*, 26.Source2,21.0b11110,16.a0,15.0b110,12.0,11.a1,10.*,9.*, 8.Z,7./,6.*,5./,4.Source1::f::vmac.ss ra
-31.Dest,26.Source2,21.0b11110,16.a0,15.0b110,12.0,11.a1,10.0,9.PD,8.Z,7./,6.0,5./,4.Source1::f::vmac.ss rr
-#31.*, 26.Source2,21.0b11110,16.a0,15.0b110,12.1,11.a1,10.*,9.*, 8.Z,7./,6.*,5./,4./::f::vmac.ss ia
-31.Dest,26.Source2,21.0b11110,16.a0,15.0b110,12.1,11.a1,10.0,9.PD,8.Z,7./,6.0,5./,4./::f::vmac.ss ir
-
-
-// vmpy.{s|d}{s|d}
-31.*,26.Dest,21.0b11110,16./,15.0b010,12.0,11./,10.*,8.*,7.PD,6.*,5.P1,4.Source::f::vmpy r
-31.*,26.Dest,21.0b11110,16./,15.0b010,12.1,11./,10.*,8.*,7.PD,6.*,5.P1,4./::f::vmpy l
-
-
-// vmsc.ss{s|d}
-#31.*, 26.Source2,21.0b11110,16.a0,15.0b111,12.0,11.a1,10.*,9.*, 8.Z,7./,6.*,5./,4.Source1::f::vmsc.ss ra
-31.Dest,26.Source2,21.0b11110,16.a0,15.0b111,12.0,11.a1,10.0,9.PD,8.Z,7./,6.0,5./,4.Source1::f::vmsc.ss rr
-#31.*, 26.Source2,21.0b11110,16.a0,15.0b111,12.1,11.a1,10.*,9.*, 8.Z,7./,6.*,5./,4./::f::vmsc.ss ia
-31.Dest,26.Source2,21.0b11110,16.a0,15.0b111,12.1,11.a1,10.0,9.PD,8.Z,7./,6.0,5./,4./::f::vmsc.ss ir
-
-
-// vmsub.{s|d}{s|d}
-31.*,26.Dest,21.0b11110,16.a0,15.0b011,12.0,11.a1,10.*,8.Z,7.PD,6.*,5./,4.Source::f::vmsub r
-31.*,26.Dest,21.0b11110,16.a0,15.0b011,12.1,11.a1,10.*,8.Z,7.PD,6.*,5./,4./::f::vmsub l
-
-
-// vrnd.{s|d}{s|d}
-31.*,26.Dest,21.0b11110,16.a0,15.0b100,12.0,11.a1,10.*,8.PD,6.*,5.P1,4.Source::f::vrnd f r
-31.*,26.Dest,21.0b11110,16.a0,15.0b100,12.1,11.a1,10.*,8.PD,6.*,5.P1,4./::f::vrnd f l
-
-
-// vrnd.{i|u}{s|d}
-31.*,26.Dest,21.0b11110,16./,15.0b101,12.0,11./,10.*,8./,7.PD,6.*,5.P1,4.Source::f::vrnd i r
-31.*,26.Dest,21.0b11110,16./,15.0b101,12.1,11./,10.*,8./,7.PD,6.*,5.P1,4./::f::vrnd i l
-
-
-// vst.{s|d} - see above - same instruction
-#31.Source,26.*,21.0b11110,16.*,10.0,9.S,8.*,6.1,5.*::f::vst
-
-
-// vsub.{i|u}{s|d}
-31.*,26.Dest,21.0b11110,16./,15.0b001,12.0,11./,10.*,8./,7.PD,6.*,5.P1,4.Source::f::vsub r
-31.*,26.Dest,21.0b11110,16./,15.0b001,12.1,11./,10.*,8./,7.PD,6.*,5.P1,4./::f::vsub l
-
-
-// wrcr - see swcr, creg, source, r0
-
-
-// xnor
-void::function::do_xnor:signed32 *rDest, signed32 source1, signed32 source2
-{
- unsigned32 result = ~ (source1 ^ source2);
- TRACE_ALU3 (MY_INDEX, result, source1, source2);
- *rDest = result;
-}
-31.Dest,26.Source2,21.0b0011001,14.UnsignedImmediate::::xnor i
-"xnor <UnsignedImmediate>, r<Source2>, r<Dest>"
-{
- do_xnor (_SD, rDest, vSource1, vSource2);
-}
-31.Dest,26.Source2,21.0b110011001,12.0,11./,4.Source1::::xnor r
-"xnor r<Source1>, r<Source2>, r<Dest>"
-{
- do_xnor (_SD, rDest, vSource1, vSource2);
-}
-31.Dest,26.Source2,21.0b110011001,12.1,11./+LongUnsignedImmediate::::xnor l
-"xnor 0x%08lx<LongUnsignedImmediate>, r<Source2>, r<Dest>"
-{
- do_xnor (_SD, rDest, LongUnsignedImmediate, vSource2);
-}
-
-// xor
-void::function::do_xor:signed32 *rDest, signed32 source1, signed32 source2
-{
- unsigned32 result = source1 ^ source2;
- TRACE_ALU3 (MY_INDEX, result, source1, source2);
- *rDest = result;
-}
-31.Dest,26.Source2,21.0b0010110,14.UnsignedImmediate::::xor i
-"xor <UnsignedImmediate>, r<Source2>, r<Dest>"
-{
- do_xor (_SD, rDest, vSource1, vSource2);
-}
-31.Dest,26.Source2,21.0b110010110,12.0,11./,4.Source1::::xor r
-"xor r<Source1>, r<Source2>, r<Dest>"
-{
- do_xor (_SD, rDest, vSource1, vSource2);
-}
-31.Dest,26.Source2,21.0b110010110,12.1,11./+LongUnsignedImmediate::::xor l
-"xor 0x%08lx<LongUnsignedImmediate>, r<Source2>, r<Dest>"
-{
- do_xor (_SD, rDest, LongUnsignedImmediate, vSource2);
-}
diff --git a/sim/v850/ChangeLog b/sim/v850/ChangeLog
deleted file mode 100644
index cbf109f8d9b..00000000000
--- a/sim/v850/ChangeLog
+++ /dev/null
@@ -1,1094 +0,0 @@
-2001-04-15 J.T. Conklin <jtc@redback.com>
-
- * Makefile.in (simops.o): Add simops.h to dependency list.
-
-2001-03-14 Andrew Cagney <ac131313@redhat.com>
-
- * Makefile.in (gencode): Link with libintl.
-
-2001-01-31 Jonathan Larmour <jlarmour@redhat.com>
-
- * Makefile.in (gencode): Link with libopcodes in build tree rather
- than building source files from there.
-
-2000-05-30 Nick Clifton <nickc@cygnus.com>
-
- * v850.igen: Remove illegal instruction pattern, since it is the
- same as the breakpoint pattern.
-
-Tue May 23 21:39:23 2000 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-2000-04-14 Gary Thomas <gthomas@redhat.com>
-
- * v850.igen: Define 'br *' as illegal since this is the only
- way to provide a breakpoint on some v850 family processors.
-
-2000-03-24 Frank Ch. Eigler <fche@redhat.com>
-
- * v850.igen (ilgop): New insn pattern for four-byte breakpoints.
-
-Thu Sep 2 18:15:53 1999 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-1999-05-08 Felix Lee <flee@cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Tue Dec 1 17:25:16 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * Makefile.in (NL_TARGET): Define as -DNL_TARGET_v850.
-
-Wed Nov 25 17:52:58 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * Makefile.in (simops.o): Depends on targ-vals.h
- * simops.c: Include targ-vals.h instead of
- libgloss/.../syscall.h. Replace SYS_* with TARGET_SYS_*.
- (divn, divun, OP_1C007E0, OP_18207E0, OP_1C207E0,OP_18007E0):
- Replace signed long int with signed32.
-
-Fri Oct 9 18:02:25 1998 Doug Evans <devans@canuck.cygnus.com>
-
- * interp.c: #include "itable.h".
- (get_insn_name): New function.
- (sim_open): Initialize CPU_INSN_NAME,CPU_MAX_INSNS.
- * sim-main.h (MAX_INSNS,INSN_NAME): Delete.
-
-Wed May 6 19:43:27 1998 Doug Evans <devans@canuck.cygnus.com>
-
- * sim-main.h (INSN_NAME): New arg `cpu'.
-
-Tue Apr 28 18:33:31 1998 Geoffrey Noer <noer@cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Sun Apr 26 15:31:55 1998 Tom Tromey <tromey@creche>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
- * config.in: Ditto.
-
-Sun Apr 26 15:19:14 1998 Tom Tromey <tromey@cygnus.com>
-
- * acconfig.h: New file.
- * configure.in: Reverted change of Apr 24; use sinclude again.
-
-Fri Apr 24 14:16:40 1998 Tom Tromey <tromey@creche>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
- * config.in: Ditto.
-
-Fri Apr 24 11:18:08 1998 Tom Tromey <tromey@cygnus.com>
-
- * configure.in: Don't call sinclude.
-
-Sat Apr 4 20:36:25 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
- * sim-main.h (SIM_MAIN_H): Wrap header.
-
-Fri Mar 27 16:15:52 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Wed Mar 25 12:35:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Tue Mar 10 15:54:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * interp.c (sim_stop): Delete, second attempt.
-
-Thu Feb 26 19:09:47 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * interp.c (sim_info): Delete.
-
-Wed Feb 18 10:47:32 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-main.h (TRACE_ALU_INPUT*): Delete. Moved to sim-trace.[hc].
-
- * simops.c (trace_result): Call trace_generic instead of
- trace_one_insn.
- (trace_module): Change variable type to integer.
- (trace_input): Initialize trace_module with TRACE_ALU_IDX.
-
- * sim-main.h (trace_module): Change variable decl to integer type.
- (TRACE_BRANCH*, TRACE_LD, TRACE_ST): Update.
-
-Tue Feb 17 12:51:18 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * interp.c (sim_store_register, sim_fetch_register): Pass in
- length parameter. Return -1.
-
-Tue Feb 3 16:24:42 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-main.h (IMEM16, IMEM16_IMMED): Rename IMEM and
- IMEM_IMMED. To match recent igen change.
-
-Sun Feb 1 16:47:51 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Sat Jan 31 18:15:41 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Fri Jan 30 09:51:27 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-main.h (CPU_CIA): Delete, replaced by.
- (CIA_SET, CIA_SET): Define.
-
-Mon Jan 19 22:26:29 1998 Doug Evans <devans@seba>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Mon Dec 15 23:17:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
- * config.in: Ditto.
-
-Fri Dec 5 09:26:08 1997 Nick Clifton <nickc@cygnus.com>
-
- * v850.igen: Revert break value back to its old value.
-
-Thu Dec 4 09:21:05 1997 Doug Evans <devans@canuck.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Wed Dec 3 17:27:19 1997 Nick Clifton <nickc@cygnus.com>
-
- * v850.igen: Make break have a zero first field, since otherwise
- it clashes with the DIVH instruction.
-
-Sat Nov 22 21:32:07 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * simops.c (OP_10007E0): Rename SIGABRT -> SIM_SIGABRT. Give
- sim_stopped instead of sim_signalled.
-
- * v850.igen (BREAK), simops.c (OP_12007E0): Rename SIGTRAP to
- SIM_SIGTRAP.
- (illegal): Rename SIGILL to SIM_SIGILL.
-
- * sim-main.h, simops.c, interp.c: Do not include signal.h.
-
- * sim-main.h: Include sim-signal.h instead of signal.h.
- (SIGTRAP, SIGQUIT): Delete definition.
- (SIG_V850_EXIT): Delete definition.
-
-Tue Nov 18 15:33:48 1997 Doug Evans <devans@canuck.cygnus.com>
-
- * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS).
-
-Fri Oct 31 10:33:40 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * interp.c (sim_open): Check state magic number.
- (sim-assert.h): Include.
-
-Tue Oct 28 11:06:47 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * v850.igen: Add model filter field to records.
-
-Fri Oct 3 09:28:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Fri Sep 26 11:56:02 1997 Felix Lee <flee@cygnus.com>
-
- * sim-main.h: delete null override of SIM_ENGINE_HALT_HOOK and
- SIM_ENGINE_RESTART_HOOK.
-
-Wed Sep 24 17:38:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Wed Sep 24 17:28:26 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-main.h (WITH_TARGET_WORD_MSB): Delete.
-
- * configure.in (SIM_AC_OPTION_BITSIZE): Specify 32 bit
- architecture with MSB == 31.
-
-Wed Sep 24 14:04:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * v850.igen: Make divh insn with RRRRR==0 breakpoint.
-
-Tue Sep 23 11:04:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Tue Sep 23 10:19:51 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * Makefile.in (SIM_WARNINGS, SIM_ALIGNMENT, SIM_ENDIAN,
- SIM_HOSTENDIAN, SIM_RESERVED_BITS): Delete, moved to common.
- (SIM_EXTRA_CFLAGS): Update.
-
-Mon Sep 22 11:46:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
- * configure.in: Really specify NONSTRICT_ALIGNMENT as the default.
-
-Fri Sep 19 17:45:25 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure.in: Specify NONSTRICT_ALIGNMENT as the default.
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Fri Sep 19 10:37:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * v850.igen (disp16): Use EXTEND16 to sign extend disp.
- (disp22): Only shift left by 1, not 2.
- ("jmp"): Ensure PC is 2 byte aligned.
-
- * simops.c, v850.igen: Move "Bcond", "jr", "jarl" code to
- v850.igen. Fix tracing.
-
- * simops.c (OP_300, OP_400, OP_500): Move "sdl.b", "sld.h",
- "sld.w" insns to v850.igen. Fix tracing.
- (OP_70): Ditto for "sld.hu".
-
- * v850.igen: Clarify tracing of "sld.b", "sld.h" et.al.
-
- * simops.c (condition_met): Make global.
-
- * sim-main.h (TRACE_ALU_INPUT3, TRACE_BRANCH0, TRACE_LD,
- TRACE_ST): Define.
- (TRACE_LD_NAME): Define.
-
- * simops.c: Move "cmov", "cmov imm" to v850.igen, fix.
-
-Wed Sep 17 16:21:08 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * simops.c: Move "mov", "reti", to v850.igen, fix tracing.
-
- * interp.c (hash): Delete.
-
- * v850.igen (nop): Really do nothing.
-
- * interp.c (do_interrupt): Mask interrupts after PSW is saved, not
- before.
- * v850.igen (reti): Return to current PC not previous.
-
-Wed Sep 17 14:02:10 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * simops.c: Move "ctret", "bsw", "hsw" to v850.igen, fix tracing.
- (trace_module): Global, save component/module name across insn.
-
- * simops.c: Move "bsh" to v850.igen, fix.
-
- * v850.igen (callt): Load correct number of bytes. Fix tracing.
- (stsr, ldsr): Correct src, dest fields. Fix tracing.
- (ctret): Force alignment. Fix tracing.
-
-Tue Sep 16 22:14:01 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * simops.c (trace_output): Add result argument.
- (trace_result): New function. Simpler version of trace_output,
- assumes trace needed.
- (trace_output): Call trace_result.
- (trace_output): For IMM_REG_REG, trace correct register.
- (trace_input): Add case for 16bit immediates.
- (OP_600, OP_640, OP_680, OP_6C0, OP_6A0): Use.
-
- * sim-main.h (TRACE_ALU_INPUT, TRACE_ALU_RESULT): Define.
- (trace_values, trace_name, trace_pc, trace_num_values): Make
- global.
- (GR, SR): Define.
-
- v850.insn (movea, stsr): Use.
- (sxb, sxh, zxb, zxh): Ditto.
-
-Tue Sep 16 21:14:01 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * simops.c: Move "movea" from here.
- * v850.igen: To here.
-
- * v850.igen (simm16): Define, sign extend imm16.
- (uimm16): Define, no sign extension.
- (addi, andi, movea, movhi, mulhi, ori, satsubi, xori): Use.
-
- * simops.c: Move "sxh", "switch", "sxb", "callt", "dispose",
- "mov32" from here.
- * v850.igen: To here.
- (switch): Fix off by two error in NIA calc.
-
-Tue Sep 16 15:14:01 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * simops.c (trace_pc, trace_name, trace_values, trace_num_values):
- New static globals.
- (trace_input): Just save pc, name and values for trace_output.
- (trace_output): Write trace values to a buffer. Use
- trace_one_insn to print trace info and buffer.
- (SIZE_OPERANDS, SIZE_LOCATION): Delete.
-
-Tue Sep 16 09:02:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-main.h (struct _sim_cpu): Add psw_mask so that reserved bits
- can be masked out.
-
- * simops.c (OP_2007E0, OP_4007E0): Move "ldsr", "stsr"
- instructions from here.
- * v850.igen (ldsr, stsr): To here. Mask out reserved bits when
- setting PSW.
-
- * interp.c (sim_open): Set psw_mask if machine known.
-
-Tue Sep 16 10:20:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * v850-dc: Add rule to diferentiate between breakpoint and divh.
- * v850.igen (break): New instruction, breakpoint simulator.
- * v850.igen (breakpoint): Enable. Change to a 32bit instruction.
-
-Mon Sep 15 18:44:05 1997 Jim Wilson <wilson@cygnus.com>
-
- * simops.c (Multiply64): Don't store into register zero.
-
-Tue Sep 16 09:02:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * Makefile.in (semantics.o): Add dependency.
-
- * sim-main.h (SAVE_1, SAVE_2): Perform backward compatible save,
- do not adjust CIA/NIA.
-
-Mon Sep 15 17:36:15 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * simops.c (OP_300, OP_400, OP_70): Make behavour depend on PSW[US].
-
- * simops.c: Move "divun", "sld.bu", "divhn", "divhun", "divn",
- "divun", "pushml" code from here to v850.igen.
- (divun): Make global.
- (type3_regs): Make global
-
- * v850.igen: Move simops.c code to here.
-
- * interp.c (sim_create_inferior): For v850eq set US bit by
- default.
-
- * interp.c (sim_open): Don't set arch, now set by
- sim_analyze_program.
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Mon Sep 15 14:39:34 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * simops.c (op_types): Move from here.
- sim-main.h: To here.
-
- * sim-main.h (trace_input, trace_output), simops.c: Make global.
-
- * simops.c (OP_60): Move "jmp" code from here.
- * v850.igen (jmp): To here.
-
- * simops.c (OP_60): Move "sld.bu" code from here.
- * v850.igen (sld.bu): To here.
-
-Fri Sep 12 15:11:03 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * v850.igen (prepare, ...): Add to v850eq architecture.
-
- * interp.c (sim_open): Default to v850eq.
-
- * interp.c (sim_open): Default to v850e.
- * sim-main.h (signal.h): Include.
-
- * v850.igen (illegal): Report/halt illegal instructions.
-
- * Makefile.in (SIM_EXTRA_CFLAGS): Add SIM_RESERVED_BITS.
-
- * configure.in: Add reserved bits option.
- * configure: Regenerate.
-
-Thu Sep 11 08:40:03 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * interp.c (sim_open): Use sim_do_commandf instead of asprintf.
-
- * sim-main.h (INSN_NAME):
-
- * Makefile.in (INCLUDE): Add SIM_EXTRA_DEPS.
- (SIM_EXTRA_DEPS): Add itable.h
- (tmp-gencode): Does not depend on simops.h
-
- * sim-main.h (itable.h): Include.
- (MAX_INSNS, INSN_NAME): Define.
-
- * interp.c: Compute inttype from the interrupt_names index that
- was passed in.
-
-Wed Sep 10 10:25:40 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * simops.c (trace_input): Use trace_printf instead of
- sim_io_printf.
- (trace_output): Ditto.
- (trace_input): Only trace when TRACE_ALU_P. Delete code
- disasembling instruction.
- (trace_output): Only trace when TRACE_ALU_P.
-
-Tue Sep 9 01:29:50 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * simops.c (trace_input, trace_output): Use sim_io_printf.
- (OP_620): Pass correct argument to trace.
- (OP_E607E0): Ditto.
- (trace_input): Obtain prog_bfd, text_start et.al from simulator
- struct.
-
-Mon Sep 8 21:03:52 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * v850.igen: New file.
- * v850-dc: New file.
-
-Mon Sep 8 18:33:04 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
-
- * sim-main.h (SEXT16): Delete, use EXTEND16.
- (SEXT8): Delete, use EXTEND8.
- (SEXT32): Delete, used?
- (SEXT40, SEXT44, SEXT64): Use UNSIGNED64 for constants, not ...LL.
- (WITH_TARGET_WORD_MSB): Define as 31. v850 little bit endian.
-
- * simops.c: Use EXTEND15 from sim-bits instead of SEXT16.
-
- * sim-main.h (DEBUG_TRACE, DEBUG_VALUES, v850_debug): Delete,
- replace with TRACE_INSN_P and TRACE_ALU_P.
-
- * simops.c (trace_input, trace_output): Update.
-
- * interp.c (sim_engine_run): Delete.
- (lookup_hash): Delete.
- (sim_open): Do not fill hash table.
- (sim_trace): Delete.
-
-Fri Sep 5 17:04:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * simops.c (OP_FFFF): Use sim_engine_halt.
- (OP_12007E0): Ditto.
- (OP_10007E0): Ditto.
-
- * sim-main.h (struct sim_cpu): Delete member exception. Using
- sim-engine et.al.
-
- * interp.c (sim_info): Do not do anything in sim-info.
- (sim_stop): Delete, replace with sim-stop.
- (sim_stop_reason): Delete, replace with sim-reason.
-
- * sim-main.h (WITH_WATCHPOINTS): Define.
- (WITH_MODULO_MEMORY): Define
-
- * Makefile.in (SIM_OBJS): Add sim-resume, sim-watch, sim-stop,
- sim-reason.
-
- * interp.c (enum interrupt_cond_type): Delete.
- (struct interrupt_generator): Delete.
- (enum interrupt_type): Drop int_none.
- (sim_open): Initialize WATCHPOINT module.
- (sim_resume, sim_run): Rename sim_resume to sim_run.
- (sim_engine_run): Replace interrupt code with call to sim-events.
- (sim_set_interrupt): Delete.
- (sim_parse_number): Delete.
-
-Thu Sep 4 17:21:23 1997 Doug Evans <dje@seba>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Thu Sep 4 18:11:37 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * simops.c (fetch_argv): New function, fetch a arg vector from
- simulator memory.
-
- * configure.in: Check for fork, execve, execv.
- * configure: Regenerate.
-
- * interp.c (sim_store_register, sim_fetch_register): Use H2T_4 and
- T2H_4 for byte swapping.
-
- * sim-main.h, interp.c (get_word, get_half, get_byte, put_word,
- put_half, put_byte): Delete.
-
- * Makefile.in (SIM_OBJS): Add sim-memopt.o module.
-
- * sim-main.h (load_mem, store_mem): Redefine as macros.
- (IMEM, IMEM_IMMED): New macros - fetch instructions.
-
- * simops.c (OP_10007E0): For SYS_read, SYS_write, SYS_open
- transfer data via a buffer.
- (fetch_str): New function, fetch string from memory.
-
- * Makefile.in (SIM_OBJS): Add sim-hrw.o module.
-
- * interp.c (sim_open): Establish memory maps using sim-memopt.c
- via sim_do_command.
- (sim_do_command): Print error if memory-map command is used. Call
- sim_args_command.
- (map): Delete, replaced by sim-core.
- (sim_memory_init): Delete, replaced by sim-core.
- (sim_set_memory_map): Delete, replaced by sim-memopt.
- (load_mem): Delete, replaced by sim-core.
- (store_mem): Delete, replaced by sim-core.
- (sim_write): Delete, replaced by sim-hrw.
- (sim_read): Delete, replaced by sim-hrw.
-
- * sim-main.h (struct sim_state): Remove memory members, using
- sim-core.c
-
-Wed Sep 3 10:18:55 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * sim-main.h: Replace SIM_HAVE_FLATMEM with mem ptr.
- * interp.c (map): Do not add to a void pointer.
-
- * Makefile.in (INCLUDE): Add sim-main.h
-
- * configure.in: Check for time.h
- * configure: Re-generate.
-
- * interp.c (struct interrupt_generator): Make time unsigned long,
- address SIM_ADDR.
- (sim_resume): Make oldpc SIM_ADDR.
- (struct hash_entry): Make mask/opcode unsigned.
-
- * v850_sim.h (struct simops ): Make opcode and mask unsigned.
-
- * simops.c (utime.h): Include if available.
- (OP_10007E0): Check for UTIME function.
- (divun): Put parentheses around shift argument.
- (OP_640): Put parentheses around shift argument, was wrong.
- (OP_107F0): Return something.
-
- * interp.c (sim_parse_number): Use strtoul not strtol.
- (sim_resume): Use sim_elapsed_time_get to keep track of the time.
-
- * configure.in (SIM_AC_OPTION_WARNINGS): Add.
- (SIM_AC_OPTION_ENDIAN): Set to hardwired big.
- (SIM_AC_OPTION_HOST_ENDIAN): Add.
- (AC_CHECK_FUNCS): Add utime.
- (AC_CHECK_HEADERS): Add stdlib.h, string.h, strings.h, utime.h
- configure: Regenerate.
-
-
- * Makefile.in (SIM_RUN_OBJS): Use nrun.o.
- (SIM_OBJS): Add sim-io.o, sim-hload.o, sim-utils.o, sim-options.o,
- sim-config.o, sim-module.o, sim-events.o, sim-core.o,
- sim-endian.o, sim-engine.o, sim-trace.o, sim-profile.o
- (SIM_ENDIAN, SIM_WARNGINS): Define.
-
- * simops.c (OP_10007E0): Use sim_io_* for transfers.
-
- * interp.c (sim_resume): Pass sd around.
-
- * simops.c (sim-main.h): Include.
-
- * gencode.c (write_template): Generate #include sim-main.h.
- (write_opcodes): Ditto.
-
- * interp.c (prog_bfd, prog_bfd_was_opened_p): Delete.
- (v850_callback): Ditto.
- (sim_kind, myname): Ditto.
- (lookup_hash): Pass SD. Use sim_io_error.
- (sim_set_memory_map): Pass in SD, use.
- (init_system): Pass in SD, use.
- (sim_open): Update.
- (sim_set_profile): Delete.
- (sim_set_profile_size): Delete.
- (do_interrupt): Pass in SD, use.
- (sim_info): Use sim_io_printf.
- (sim_create_inferior): Reset registers. Set PC from prog_bfd
- argument.
- (sim_load): Delete, use common/sim-hload.c
- (sim_size): Rename to sim_memory_init.
- (sim_write): Remove call to init_system.
- (init_system): Delete.
- (sim_set_callbacks): Delete.
- (sim_set_interrupt): Pass in SD, use.
- (start_time): Delete.
-
- * v850_sim.h: Remove everything except `struct simops' from here.
- * sim-main.h: Move most to here.
- * gencode.c: Move #includes to here.
-
- * sim-main.h(struct _sim_cpu): Rename struct _state.
- (#define PC, et.al.): Update
- (v850_callback): Delete. Replaced with SIM_DESC arg.
- (int8, uint8, int16, uint16, int32, uint32): Define types using
- unsigned8 et.al from common/sim-types.h.
- * sim-main.h (State): Define as STATE_CPU.
-
-Mon Sep 1 12:07:55 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure.in: Check for time, chmod.
- * configure: Regenerate.
- * simops.c (SYS_time, SYS_chmod): Use HAVE_TIME, HAVE_CHMOD.
-
- * simops.c (../../libgloss/v850/sys/syscall.h): Include instead of
- sys/syscall.h.
- (OP_10007E0): Check the existance each SYS_* macro independantly.
-
- * v850_sim.h (SIGQUIT, SIGTRAP): Only define if missing.
-
-Wed Aug 27 18:13:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
- * config.in: Ditto.
-
-Tue Aug 26 10:42:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * interp.c (sim_kill): Delete.
- (sim_create_inferior): Add ABFD argument.
- (sim_load): Move setting of PC from here.
- (sim_create_inferior): To here.
-
-Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
- * config.in: Ditto.
-
-Mon Aug 25 11:31:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * interp.c (sim_open): Add ABFD argument.
-
-Fri Aug 22 10:39:28 1997 Nick Clifton <nickc@cygnus.com>
-
- * simops.c (bsh): Only set CY flag if either of the bottom
- bytes is zero.
-
- * simops.c (prepare, dispose): Lower numbered
- registers go to higher numbered address.
-
- * simops.c (unsigned divide instructions): S bit set if result has
- top bit set.
-
- * simops.c (pushml, pushmh, popml, popmh): Lower numbered
- registers go to higher numbered address.
-
-Wed Aug 20 13:56:35 1997 Nick Clifton <nickc@cygnus.com>
-
- * simops.c (OP_107E0, OP_107F0, OP_307E0, OP_307F0): Use correct
- interpretation of SR bit in list18 structure.
- (divn, divun): New functions to perform N step divide functions.
-
-Mon Aug 18 10:59:02 1997 Nick Clifton <nickc@cygnus.com>
-
- * simops.c (OP_300, OP_400, OP_60, OP_70): Support variant opcodes
- with US bit set in the PSW.
-
-Wed Aug 13 19:06:55 1997 Nick Clifton <nickc@cygnus.com>
-
- * interp.c (sim_resume): Opcode functions return amount to be
- added to PC and all opcodes take a standard format in the OP[]
- array.
-
- (do_format_*): Functions removed.
-
- * v850_sim.h (SP, EP): New register mnemonics.
-
- * gencode.c (write_header): Functions prototypes return an
- integer.
-
- * simops.c: Opcode functions return amount to be added to PC.
-
- * v850_sim.h (CTPC, CTPSW, CTBP): New register mnemonics.
-
- * simops.c: Add support for v850e instructions.
-
- * simops.c: Add support for v850eq instructions.
-
-Tue May 20 10:24:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * interp.c (sim_open): Add callback argument.
- (sim_set_callbacks): Delete SIM_DESC argument.
-
-Thu Apr 24 00:39:51 1997 Doug Evans <dje@canuck.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Wed Apr 23 17:20:16 1997 Doug Evans <dje@canuck.cygnus.com>
-
- * interp.c (prog_bfd_was_opened_p): New static local.
- (prog_bfd): New global variable.
- (sim_open): Undo patch to add -E support.
- (sim_close): Close prog_bfd if sim_load opened it.
- (sim_load): Record bfd of loaded file in prog_bfd.
- * simops.c (prog_bfd): Renamed from exec_bfd.
-
-Fri Apr 18 14:17:12 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * interp.c (sim_stop): Stub function.
-
-Thu Apr 17 03:53:18 1997 Doug Evans <dje@canuck.cygnus.com>
-
- * Makefile.in (SIM_OBJS): Add sim-load.o.
- * interp.c (sim_kind, myname): New static locals.
- (sim_open): Set sim_kind, myname. Ignore -E arg.
- (sim_load): Return SIM_RC. New arg abfd. Call sim_load_file to
- load file into simulator. Set start address from bfd.
- (sim_create_inferior): Return SIM_RC. Delete arg start_address.
-
-Wed Apr 16 19:53:55 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * simops.c (OP_10007E0): Only provide system calls SYS_execv,
- SYS_wait, SYS_wait, SYS_utime, SYS_time if defined by the host.
-
-Mon Apr 7 15:45:02 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
- * config.in: Ditto.
-
-Wed Apr 2 15:06:28 1997 Doug Evans <dje@canuck.cygnus.com>
-
- * interp.c (sim_open): New arg `kind'.
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Wed Apr 2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Wed Mar 19 01:14:00 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Mon Mar 17 15:10:07 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
-
- * configure: Re-generate.
-
-Fri Mar 14 10:34:11 1997 Michael Meissner <meissner@cygnus.com>
-
- * configure: Regenerate to track ../common/aclocal.m4 changes.
-
-Thu Mar 13 13:00:54 1997 Doug Evans <dje@canuck.cygnus.com>
-
- * interp.c (sim_open): New SIM_DESC result. Argument is now
- in argv form.
- (other sim_*): New SIM_DESC argument.
-
-Tue Feb 4 13:33:30 1997 Doug Evans <dje@canuck.cygnus.com>
-
- * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
- COMMON_{PRE,POST}_CONFIG_FRAG instead.
- * configure.in: sinclude ../common/aclocal.m4.
- * configure: Regenerated.
-
-Thu Jan 23 11:46:23 1997 Stu Grossman (grossman@critters.cygnus.com)
-
- * configure configure.in Makefile.in: Update to new configure
- scheme which is more compatible with WinGDB builds.
- * configure.in: Improve comment on how to run autoconf.
- * configure: Re-run autoconf to get new ../common/aclocal.m4.
- * Makefile.in: Use autoconf substitution to install common
- makefile fragment.
-
-Mon Jan 20 16:05:34 1997 Michael Meissner <meissner@tiktok.cygnus.com>
-
- * simops.c (OP_{E0,2E0,6E0}): The multiply operations sign extend,
- not zero extend.
-
-Tue Jan 14 17:06:03 1997 Stu Grossman (grossman@critters.cygnus.com)
-
- * simops.c: Put ifdefs around things to make MSVC happy. Get rid
- of unistd.h. Disable SYS_stat, SYS_chown, SYS_time, SYS_times,
- SYS_gettimeofday and SYS_utime from MSVC.
-
-Tue Dec 31 18:11:13 1996 Michael Meissner <meissner@tiktok.cygnus.com>
-
- * simops.c (OP_10007E0): Know that kill encodes the signal number
- via: 0xdead0000 | signal and turn it back into a signal.
-
-Fri Dec 27 14:44:06 1996 Michael Meissner <meissner@tiktok.cygnus.com>
-
- * v850_sim.h (SIG_V850_EXIT): Define as -1.
-
- * interp.c (sim_open): Cast calloc function.
- (sim_stop_reason): If signal is SIG_V850_EXIT, inform gdb the
- program exited with the appropriate exit code.
- (sim_set_interrupt): Declare buildargv.
-
- * simops.c (OP_10007E0): Make exit signal normal exit. Make time
- type correct and work on big endian systems.
-
-Wed Nov 20 02:18:44 1996 Doug Evans <dje@canuck.cygnus.com>
-
- * Makefile.in: Delete stuff moved to ../common/Make-common.in.
- (SIM_OBJS,SIM_EXTRA_CFLAGS,SIM_EXTRA_CLEAN): Define.
- * configure.in: Simplify using macros in ../common/aclocal.m4.
- Call AC_CHECK_HEADERS(unistd.h).
- * configure: Regenerated.
- * config.in: New file.
- * simops.c: #include "config.h". #include <unistd.h> if present.
-
-Sun Nov 3 23:02:54 1996 Stan Shebs <shebs@andros.cygnus.com>
-
- * v850_sim.h (State): New slots dummy_mem, pending_nmi.
- (EIPC, etc): New macros for system registers.
- * simops.c, interp.c: Use everywhere.
-
- * interp.c: Add support for interrupts issued by interrupt
- generators, either PC- or time-based. Controlled by simulator
- command "sim interrupt".
-
- * interp.c: Add support for variable-size allocation of memory,
- via simulator command "sim memory-map".
- (map): Issue SIGSEGV for references to invalid memory regions.
-
-Thu Oct 31 14:44:10 1996 Gavin Koch <gavin@cygnus.com>
-
- * simops.c: Include <sys/time.h> for struct timeval and
- struct timezone.
-
-Wed Oct 30 08:49:10 1996 Jeffrey A Law (law@cygnus.com)
-
- * simops.c (OP_10007E0): Handle SYS_times and SYS_gettimeofday.
-
- * simops.c (OP_10007E0): Handle SYS_time.
-
-Tue Oct 29 14:22:55 1996 Jeffrey A Law (law@cygnus.com)
-
- * simops.c: Include <sys/stat.h>.
- (OP_10007E0): Handle SYS_stat.
-
-Thu Oct 24 12:26:35 1996 Jeffrey A Law (law@cygnus.com)
-
- * simops.c (OP_10007E0): Don't declare errno.
-
- * simops.c (OP_500): Mask off low bit in displacement
- for sld.w.
- (OP_501): Similarly.
-
- * simops.c (OP_500): Fix displacement handling for sld.w.
- (OP_501): Similarly for sst.w.
-
- * simops.c (trace_input): Remove all references to SEXT7.
- (OP_300, OP_400, OP_500, OP_380, OP_480, OP_501): Displacement
- is zero extended for sst/sld instructions.
- * v850_sim.h (SEX7): Delete. It's no longer needed (and it
- was incorrect anyway).
-
-Thu Oct 24 10:33:33 1996 Stu Grossman (grossman@critters.cygnus.com)
-
- * Makefile.in: Get rid of srcroot. Set all INSTALL macros via
- autoconf.
- * gencode.c (write_opcodes): Pad operands field to account for
- MSVC braindamage.
- * simops.c: Include errno.h. Exclude SYS_chown, since MSVC
- doesn't support it. (Why is this here in the first place?!?)
- * v850_sim.h: Get rid of 64 bit defs. Also, get rid of #elif's.
- Change number of operands in struct simops from 9 to 6. Define
- SIGTRAP and SIGQUIT for MSVC.
-
-Tue Oct 15 16:19:51 1996 Stu Grossman (grossman@critters.cygnus.com)
-
- * interp.c (MEM_SIZE): It's now bytes, not a power of 2.
- * (map): Add support for external mem in the 1->2 meg range.
- Also, abort() when memory access is way out of bounds. (Better to
- die than to give wrong result. (This will be fixed later.))
- * (sim_size): MEM_SIZE is now bytes, not shift factor.
-
-Tue Oct 1 15:53:24 1996 Gavin Koch <gavin@cygnus.com>
-
- * simops.c (trace_input): Swapped order of operands for output
- output of OP_IMM_REG. Changed the fetching of the operands for
- OP_LOAD32, and OP_STORE32 to work like op-function.
-
-Mon Sep 30 15:46:33 1996 Stu Grossman (grossman@critters.cygnus.com)
-
- * interp.c: Move includes of remote-sim.h and callback.h to
- v850-sim.h.
- * (lookup_hash): Add PC to report of hash failure.
- * (map load_mem store_mem): New memory subsystem. Models V851
- memory system.
- * (sim_write sim_read): Use new memory subsystem.
- * (sim_resume): Don't load and save PC into EIPC anymore. Needed
- to make user-defined traps work right.
- * simops.c (OP_*): Use new memory subsystem.
- * (OP_14007E0 (reti)): Implement reti.
- * (OP_14996E0 (trap)): Implement user-defined traps. Move I/O to
- trap 31. Use new memory subsystem.
- * v850_sim.h: Prototypes for load_mem, store_mem and map. Use
- load_mem in RLW macro.
-
-Fri Sep 27 18:34:09 1996 Stu Grossman (grossman@critters.cygnus.com)
-
- * gencode.c (write_opcodes): Output hex values for opcode mask
- and patterns.
- * interp.c (sim_resume): Save and restore PC from the appropriate
- register.
- * (sim_fetch_register sim_store_register): Fix byte-order problem
- with reading and writing registers.
- * simops.c (OP_FFFF): Implement pseudo-breakpoint insn.
-
-Fri Sep 27 17:42:37 1996 Jeffrey A Law (law@cygnus.com)
-
- * simops.c (trace_input): Fix thinko.
-
-Wed Sep 18 09:54:12 1996 Michael Meissner <meissner@tiktok.cygnus.com>
-
- * simops.c (exec_bfd): Rename from sim_bfd.
- (trace_input): Ditto.
-
-Thu Sep 12 12:03:05 1996 Michael Meissner <meissner@tiktok.cygnus.com>
-
- * simops.c (trace_input): Use find_nearest_line to print line
- number, function name or file name of PC.
-
-Wed Sep 11 16:44:37 1996 Michael Meissner <meissner@tiktok.cygnus.com>
-
- * simops.c: Add tracing support. Use SEXTxx macros instead of
- doing hardwired shifts.
-
- * configure.in (--enable-sim-cflags): Add switch to add additional
- flags to simulator buld. If --enable-sim-cflags=trace, turn on
- tracing.
- * configure: Regenerate.
-
- * Makefile.in: Don't require a VPATH capable make if configuring
- in the same directory. Don't use CFLAGS for configuration flags.
- Add flags from --enable-sim-cflags. Support canadian cross
- builds. Rebuild whole simulator if include files change.
-
- * interp.c (v850_debug): New global for debugging.
- (lookup_hash,sim_size,sim_set_profile): Use
- printf_filtered callback, instead of calling printf directly.
- (sim_{open,trace}): Enable tracing if -t and compiled for tracing.
-
- * v850_sim.h: Use limits.h to set the various sized types.
- (SEXT{5,7,16,22}): New macros.
-
-Mon Sep 9 20:50:46 1996 Jeffrey A Law (law@cygnus.com)
-
- * interp.c (hash): Make this an inline function
- when compiling with GCC. Simplify.
- * simpos.c: Explicitly include "sys/syscall.h". Remove
- some #if 0'd code. Enable more emulated syscalls.
-
-Wed Sep 4 01:48:55 1996 Jeffrey A Law (law@cygnus.com)
-
- * interp.c: Fix sign bit handling for add and sub instructions.
-
-Tue Sep 3 10:20:30 1996 Jeffrey A Law (law@cygnus.com)
-
- * gencode.c: Fix various indention & style problems.
- Remove test code. Remove #if 0 code.
- * interp.c: Provide prototypes for all static functions.
- Fix minor indention problems.
- (sim_open, sim_resume): Remove unused variables.
- (sim_read): Return type is "int".
- * simops.c: Remove unused variables.
- (divh): Make result of divide-by-zero zero.
- (setf): Initialize result to keep compiler quiet.
- (sar instructions): These just clear the overflow bit.
- * v850_sim.h: Provide prototypes for put_byte, put_half
- and put_word.
-
- * interp.c: OP should be an array of 32bit operands!
- (v850_callback): Declare.
- (do_format_5): Fix extraction of OP[0].
- (sim_size): Remove debugging printf.
- (sim_set_callbacks): Do something useful.
- (sim_stop_reason): Gross hacks to get c-torture running.
- * simops.c: Simplify code for computing targets of bCC
- insns. Invert 's' bit if 'ov' bit is set for some
- instructions. Fix 'cy' bit handling for numerous
- instructions. Make the simulator stop when a halt
- instruction is encountered. Very crude support for
- emulated syscalls (trap 0).
- * v850_sim.h: Include "callback.h" and declare
- v850_callback. Items in the operand array are 32bits.
-
-Sun Sep 1 22:35:35 1996 Jeffrey A Law (law@cygnus.com)
-
- * interp.c (sim_resume): Fix code to check for a format 3
- opcode.
- * simops.c: bCC insns only argument is a constant, not a
- register value (duh...)
-
-Fri Aug 30 10:33:49 1996 Jeffrey A Law (law@cygnus.com)
-
- * simops.c: Fix "not1" and "set1".
-
- * simops.c: Don't forget to initialize temp for
- "ld.h" and "ld.w"
-
- * interp.c: Remove various debugging printfs.
-
- * simops.c: Fix satadd, satsub boundary case handling.
-
- * interp.c (hash): Fix.
- * interp.c (do_format_8): Get operands correctly and
- call the target function.
- * simops.c: Rough cut at "clr1", "not1", "set1", and "tst1".
-
-Thu Aug 29 13:53:29 1996 Jeffrey A Law (law@cygnus.com)
-
- * interp.c (do_format_4): Get operands correctly and
- call the target function.
- * simops.c: Rough cut at "sld.b", "sld.h", "sld.w", "sst.b",
- "sst.h", and "sst.w".
-
- * v850_sim.h: The V850 doesn't have split I&D spaces. Change
- accordingly. Remove many unused definitions.
- * interp.c: The V850 doesn't have split I&D spaces. Change
- accordingly.
- (get_longlong, get_longword, get_word): Deleted.
- (write_longlong, write_longword, write_word): Deleted.
- (get_operands): Deleted.
- (get_byte, get_half, get_word): New functions.
- (put_byte, put_half, put_word): New functions.
- * simops.c: Remove unused functions. Rough cut at
- "ld.b", "ld.h", "ld.w", "st.b", "st.h", "st.w" insns.
-
- * v850_sim.h (struct _state): Remove "psw" field. Add
- "sregs" field.
- (PSW): Remove bogus definition.
- * simops.c: Change condition code handling to use the psw
- register within the sregs array. Handle "ldsr" and "stsr".
-
- * simops.c: Handle "satadd", "satsub", "satsubi", "satsubr".
-
- * interp.c (do_format_5): Get operands correctly and
- call the target function.
- (sim_resume): Don't do a PC update for format 5 instructions.
- * simops.c: Handle "jarl" and "jmp" instructions.
-
- * simops.c: Fix minor typos. Handle "cmp", "setf", "tst"
- "di", and "ei" instructions correctly.
-
- * interp.c (do_format_3): Get operands correctly and call
- the target function.
- * simops.c: Handle bCC instructions.
-
- * simops.c: Add condition code handling to shift insns.
- Fix minor typos in condition code handling for other insns.
-
- * Makefile.in: Fix typo.
- * simops.c: Add condition code handling to "sub" "subr" and
- "divh" instructions.
-
- * interp.c (hash): Update to be more accurate.
- (lookup_hash): Call hash rather than computing the hash
- code here.
- (do_format_1_2): Handle format 1 and format 2 instructions.
- Get operands correctly and call the target function.
- (do_format_6): Get operands correctly and call the target
- function.
- (do_formats_9_10): Rough cut so shift ops will work.
- (sim_resume): Tweak to deal with format 1 and format 2
- handling in a single funtion. Don't update the PC
- for format 3 insns. Fix typos.
- * simops.c: Slightly reorganize. Add condition code handling
- to "add", "addi", "and", "andi", "or", "ori", "xor", "xori"
- and "not" instructions.
- * v850_sim.h (reg_t): Registers are 32bits.
- (_state): The V850 has 32 general registers. Add a 32bit
- psw and pc register too. Add accessor macros
-
- * Makefile.in, interp.c, v850_sim.h: Bring over endianness
- changes from the d10v simulator.
-
- * simops.c: Add shift support.
-
- * simops.c: Add multiply & divide support. Abort for system
- instructions.
-
- * simops.c: Add logicals, mov, movhi, movea, add, addi, sub
- and subr. No condition codes yet.
-
-Wed Aug 28 13:53:22 1996 Jeffrey A Law (law@cygnus.com)
-
- * ChangeLog, Makefile.in, configure, configure.in, v850_sim.h,
- gencode.c, interp.c, simops.c: Created.
-
diff --git a/sim/v850/Makefile.in b/sim/v850/Makefile.in
deleted file mode 100644
index 2500fca96d9..00000000000
--- a/sim/v850/Makefile.in
+++ /dev/null
@@ -1,140 +0,0 @@
-# Makefile template for Configure for the V850 sim library.
-# Copyright (C) 1996, 1997 Free Software Foundation, Inc.
-# Written by Cygnus Support.
-#
-# This program is free software; you can redistribute it and/or modify
-# it under the terms of the GNU General Public License as published by
-# the Free Software Foundation; either version 2 of the License, or
-# (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
-## COMMON_PRE_CONFIG_FRAG
-
-SIM_OBJS = \
- $(SIM_NEW_COMMON_OBJS) \
- simops.o interp.o \
- itable.o semantics.o idecode.o icache.o engine.o irun.o support.o \
- sim-engine.o \
- sim-hload.o \
- sim-hrw.o \
- sim-resume.o \
- sim-reason.o \
- sim-stop.o
-
-SIM_RUN_OBJS = nrun.o
-
-# List of extra dependencies.
-# Generally this consists of simulator specific files included by sim-main.h.
-SIM_EXTRA_DEPS = v850_sim.h sim-main.h simops.h itable.h
-
-# List of flags to always pass to $(CC)
-SIM_EXTRA_CFLAGS = \
- -DDEBUG \
- -I$(srcdir)/../../newlib/libc/sys/sysnecv850
-SIM_EXTRA_CLEAN = clean-extra
-
-INCLUDE = $(sim_main_headers) $(SIM_EXTRA_DEPS)
-
-NL_TARGET = -DNL_TARGET_v850
-
-## COMMON_POST_CONFIG_FRAG
-
-simops.h table.c: tmp-gencode
-tmp-gencode: gencode
- ./gencode >tmp-table.c
- mv tmp-table.c table.c
- ./gencode -h >tmp-simops.h
- mv tmp-simops.h simops.h
- touch tmp-gencode
-gencode.o: gencode.c
- $(CC_FOR_BUILD) $(BUILD_CFLAGS) -c $(srcdir)/gencode.c
-gencode: gencode.o ../../opcodes/libopcodes.a ../../intl/libintl.a
- $(CC_FOR_BUILD) $(BUILD_CFLAGS) -o gencode gencode.o ../../opcodes/libopcodes.a ../../intl/libintl.a
-
-
-
-BUILT_SRC_FROM_IGEN = \
- icache.h \
- icache.c \
- idecode.h \
- idecode.c \
- semantics.h \
- semantics.c \
- model.h \
- model.c \
- support.h \
- support.c \
- itable.h \
- itable.c \
- engine.h \
- engine.c \
- irun.c
-$(BUILT_SRC_FROM_IGEN): tmp-igen simops.h
-#
-
-.PHONY: clean-igen
-clean-igen:
- rm -f $(BUILT_SRC_FROM_IGEN)
- rm -f tmp-igen tmp-insns
-
-../igen/igen:
- cd ../igen && $(MAKE)
-
-IGEN_TRACE= # -G omit-line-numbers # -G trace-rule-selection -G trace-rule-rejection -G trace-entries
-IGEN_INSN=$(srcdir)/v850.igen
-IGEN_DC=$(srcdir)/v850-dc
-tmp-igen: $(IGEN_INSN) $(IGEN_DC) ../igen/igen
- cd ../igen && $(MAKE)
- ../igen/igen \
- $(IGEN_TRACE) \
- -G gen-direct-access \
- -i $(IGEN_INSN) \
- -o $(IGEN_DC) \
- -x \
- -n icache.h -hc tmp-icache.h \
- -n icache.c -c tmp-icache.c \
- -n semantics.h -hs tmp-semantics.h \
- -n semantics.c -s tmp-semantics.c \
- -n idecode.h -hd tmp-idecode.h \
- -n idecode.c -d tmp-idecode.c \
- -n model.h -hm tmp-model.h \
- -n model.c -m tmp-model.c \
- -n support.h -hf tmp-support.h \
- -n support.c -f tmp-support.c \
- -n itable.h -ht tmp-itable.h \
- -n itable.c -t tmp-itable.c \
- -n engine.h -he tmp-engine.h \
- -n engine.c -e tmp-engine.c \
- -n irun.c -r tmp-irun.c
- $(srcdir)/../../move-if-change tmp-icache.h icache.h
- $(srcdir)/../../move-if-change tmp-icache.c icache.c
- $(srcdir)/../../move-if-change tmp-idecode.h idecode.h
- $(srcdir)/../../move-if-change tmp-idecode.c idecode.c
- $(srcdir)/../../move-if-change tmp-semantics.h semantics.h
- $(srcdir)/../../move-if-change tmp-semantics.c semantics.c
- $(srcdir)/../../move-if-change tmp-model.h model.h
- $(srcdir)/../../move-if-change tmp-model.c model.c
- $(srcdir)/../../move-if-change tmp-support.h support.h
- $(srcdir)/../../move-if-change tmp-support.c support.c
- $(srcdir)/../../move-if-change tmp-itable.h itable.h
- $(srcdir)/../../move-if-change tmp-itable.c itable.c
- $(srcdir)/../../move-if-change tmp-engine.h engine.h
- $(srcdir)/../../move-if-change tmp-engine.c engine.c
- $(srcdir)/../../move-if-change tmp-irun.c irun.c
- touch tmp-igen
-
-clean-extra: clean-igen
- rm -f table.c simops.h gencode
-
-#interp.o: interp.c table.c $(INCLUDE)
-simops.o: simops.c simops.h $(INCLUDE) targ-vals.h
-#table.o: table.c
-semantics.o: $(INCLUDE)
diff --git a/sim/v850/acconfig.h b/sim/v850/acconfig.h
deleted file mode 100644
index f9b87a10c60..00000000000
--- a/sim/v850/acconfig.h
+++ /dev/null
@@ -1,15 +0,0 @@
-
-/* Define to 1 if NLS is requested. */
-#undef ENABLE_NLS
-
-/* Define as 1 if you have catgets and don't want to use GNU gettext. */
-#undef HAVE_CATGETS
-
-/* Define as 1 if you have gettext and don't want to use GNU gettext. */
-#undef HAVE_GETTEXT
-
-/* Define as 1 if you have the stpcpy function. */
-#undef HAVE_STPCPY
-
-/* Define if your locale.h file contains LC_MESSAGES. */
-#undef HAVE_LC_MESSAGES
diff --git a/sim/v850/config.in b/sim/v850/config.in
deleted file mode 100644
index a49ca9cda39..00000000000
--- a/sim/v850/config.in
+++ /dev/null
@@ -1,183 +0,0 @@
-/* config.in. Generated automatically from configure.in by autoheader. */
-
-/* Define if using alloca.c. */
-#undef C_ALLOCA
-
-/* Define to empty if the keyword does not work. */
-#undef const
-
-/* Define to one of _getb67, GETB67, getb67 for Cray-2 and Cray-YMP systems.
- This function is required for alloca.c support on those systems. */
-#undef CRAY_STACKSEG_END
-
-/* Define if you have alloca, as a function or macro. */
-#undef HAVE_ALLOCA
-
-/* Define if you have <alloca.h> and it should be used (not on Ultrix). */
-#undef HAVE_ALLOCA_H
-
-/* Define if you have a working `mmap' system call. */
-#undef HAVE_MMAP
-
-/* Define as __inline if that's what the C compiler calls it. */
-#undef inline
-
-/* Define to `long' if <sys/types.h> doesn't define. */
-#undef off_t
-
-/* Define if you need to in order for stat and other things to work. */
-#undef _POSIX_SOURCE
-
-/* Define as the return type of signal handlers (int or void). */
-#undef RETSIGTYPE
-
-/* Define to `unsigned' if <sys/types.h> doesn't define. */
-#undef size_t
-
-/* If using the C implementation of alloca, define if you know the
- direction of stack growth for your system; otherwise it will be
- automatically deduced at run-time.
- STACK_DIRECTION > 0 => grows toward higher addresses
- STACK_DIRECTION < 0 => grows toward lower addresses
- STACK_DIRECTION = 0 => direction of growth unknown
- */
-#undef STACK_DIRECTION
-
-/* Define if you have the ANSI C header files. */
-#undef STDC_HEADERS
-
-/* Define if your processor stores words with the most significant
- byte first (like Motorola and SPARC, unlike Intel and VAX). */
-#undef WORDS_BIGENDIAN
-
-/* Define to 1 if NLS is requested. */
-#undef ENABLE_NLS
-
-/* Define as 1 if you have gettext and don't want to use GNU gettext. */
-#undef HAVE_GETTEXT
-
-/* Define as 1 if you have the stpcpy function. */
-#undef HAVE_STPCPY
-
-/* Define if your locale.h file contains LC_MESSAGES. */
-#undef HAVE_LC_MESSAGES
-
-/* Define if you have the __argz_count function. */
-#undef HAVE___ARGZ_COUNT
-
-/* Define if you have the __argz_next function. */
-#undef HAVE___ARGZ_NEXT
-
-/* Define if you have the __argz_stringify function. */
-#undef HAVE___ARGZ_STRINGIFY
-
-/* Define if you have the __setfpucw function. */
-#undef HAVE___SETFPUCW
-
-/* Define if you have the chmod function. */
-#undef HAVE_CHMOD
-
-/* Define if you have the chown function. */
-#undef HAVE_CHOWN
-
-/* Define if you have the dcgettext function. */
-#undef HAVE_DCGETTEXT
-
-/* Define if you have the execv function. */
-#undef HAVE_EXECV
-
-/* Define if you have the execve function. */
-#undef HAVE_EXECVE
-
-/* Define if you have the fork function. */
-#undef HAVE_FORK
-
-/* Define if you have the getcwd function. */
-#undef HAVE_GETCWD
-
-/* Define if you have the getpagesize function. */
-#undef HAVE_GETPAGESIZE
-
-/* Define if you have the getrusage function. */
-#undef HAVE_GETRUSAGE
-
-/* Define if you have the munmap function. */
-#undef HAVE_MUNMAP
-
-/* Define if you have the putenv function. */
-#undef HAVE_PUTENV
-
-/* Define if you have the setenv function. */
-#undef HAVE_SETENV
-
-/* Define if you have the setlocale function. */
-#undef HAVE_SETLOCALE
-
-/* Define if you have the sigaction function. */
-#undef HAVE_SIGACTION
-
-/* Define if you have the stpcpy function. */
-#undef HAVE_STPCPY
-
-/* Define if you have the strcasecmp function. */
-#undef HAVE_STRCASECMP
-
-/* Define if you have the strchr function. */
-#undef HAVE_STRCHR
-
-/* Define if you have the time function. */
-#undef HAVE_TIME
-
-/* Define if you have the utime function. */
-#undef HAVE_UTIME
-
-/* Define if you have the <argz.h> header file. */
-#undef HAVE_ARGZ_H
-
-/* Define if you have the <fcntl.h> header file. */
-#undef HAVE_FCNTL_H
-
-/* Define if you have the <fpu_control.h> header file. */
-#undef HAVE_FPU_CONTROL_H
-
-/* Define if you have the <limits.h> header file. */
-#undef HAVE_LIMITS_H
-
-/* Define if you have the <locale.h> header file. */
-#undef HAVE_LOCALE_H
-
-/* Define if you have the <malloc.h> header file. */
-#undef HAVE_MALLOC_H
-
-/* Define if you have the <nl_types.h> header file. */
-#undef HAVE_NL_TYPES_H
-
-/* Define if you have the <stdlib.h> header file. */
-#undef HAVE_STDLIB_H
-
-/* Define if you have the <string.h> header file. */
-#undef HAVE_STRING_H
-
-/* Define if you have the <strings.h> header file. */
-#undef HAVE_STRINGS_H
-
-/* Define if you have the <sys/param.h> header file. */
-#undef HAVE_SYS_PARAM_H
-
-/* Define if you have the <sys/resource.h> header file. */
-#undef HAVE_SYS_RESOURCE_H
-
-/* Define if you have the <sys/time.h> header file. */
-#undef HAVE_SYS_TIME_H
-
-/* Define if you have the <time.h> header file. */
-#undef HAVE_TIME_H
-
-/* Define if you have the <unistd.h> header file. */
-#undef HAVE_UNISTD_H
-
-/* Define if you have the <utime.h> header file. */
-#undef HAVE_UTIME_H
-
-/* Define if you have the <values.h> header file. */
-#undef HAVE_VALUES_H
diff --git a/sim/v850/configure b/sim/v850/configure
deleted file mode 100755
index 900d46be86b..00000000000
--- a/sim/v850/configure
+++ /dev/null
@@ -1,4412 +0,0 @@
-#! /bin/sh
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-sim_inline="-DDEFAULT_INLINE=0"
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-# This file is derived from `gettext.m4'. The difference is that the
-# included macros assume Cygnus-style source and build trees.
-
-# Macro to add for using GNU gettext.
-# Ulrich Drepper <drepper@cygnus.com>, 1995.
-#
-# This file file be copied and used freely without restrictions. It can
-# be used in projects which are not available under the GNU Public License
-# but which still want to provide support for the GNU gettext functionality.
-# Please note that the actual code is *not* freely available.
-
-# serial 3
-
-
-
-
-
-# Search path for a program which passes the given test.
-# Ulrich Drepper <drepper@cygnus.com>, 1996.
-#
-# This file file be copied and used freely without restrictions. It can
-# be used in projects which are not available under the GNU Public License
-# but which still want to provide support for the GNU gettext functionality.
-# Please note that the actual code is *not* freely available.
-
-# serial 1
-
-
-
-# Check whether LC_MESSAGES is available in <locale.h>.
-# Ulrich Drepper <drepper@cygnus.com>, 1995.
-#
-# This file file be copied and used freely without restrictions. It can
-# be used in projects which are not available under the GNU Public License
-# but which still want to provide support for the GNU gettext functionality.
-# Please note that the actual code is *not* freely available.
-
-# serial 1
-
-
-
-
-
-
-# Guess values for system-dependent variables and create Makefiles.
-# Generated automatically using autoconf version 2.13
-# Copyright (C) 1992, 93, 94, 95, 96 Free Software Foundation, Inc.
-#
-# This configure script is free software; the Free Software Foundation
-# gives unlimited permission to copy, distribute and modify it.
-
-# Defaults:
-ac_help=
-ac_default_prefix=/usr/local
-# Any additions from configure.in:
-ac_help="$ac_help
- --disable-nls do not use Native Language Support"
-ac_help="$ac_help
- --with-included-gettext use the GNU gettext library included here"
-ac_help="$ac_help
- --enable-maintainer-mode Enable developer functionality."
-ac_help="$ac_help
- --enable-sim-bswap Use Host specific BSWAP instruction."
-ac_help="$ac_help
- --enable-sim-cflags=opts Extra CFLAGS for use in building simulator"
-ac_help="$ac_help
- --enable-sim-debug=opts Enable debugging flags"
-ac_help="$ac_help
- --enable-sim-stdio Specify whether to use stdio for console input/output."
-ac_help="$ac_help
- --enable-sim-trace=opts Enable tracing flags"
-ac_help="$ac_help
- --enable-sim-profile=opts Enable profiling flags"
-ac_help="$ac_help
- --enable-sim-endian=endian Specify target byte endian orientation."
-ac_help="$ac_help
- --enable-sim-alignment=align Specify strict, nonstrict or forced alignment of memory accesses."
-ac_help="$ac_help
- --enable-sim-hostendian=end Specify host byte endian orientation."
-ac_help="$ac_help
- --enable-build-warnings[=LIST] Enable build-time compiler warnings"
-ac_help="$ac_help
- --enable-sim-reserved-bits Specify whether to check reserved bits in instruction."
-ac_help="$ac_help
- --enable-sim-bitsize=N Specify target bitsize (32 or 64)."
-
-# Initialize some variables set by options.
-# The variables have the same names as the options, with
-# dashes changed to underlines.
-build=NONE
-cache_file=./config.cache
-exec_prefix=NONE
-host=NONE
-no_create=
-nonopt=NONE
-no_recursion=
-prefix=NONE
-program_prefix=NONE
-program_suffix=NONE
-program_transform_name=s,x,x,
-silent=
-site=
-sitefile=
-srcdir=
-target=NONE
-verbose=
-x_includes=NONE
-x_libraries=NONE
-bindir='${exec_prefix}/bin'
-sbindir='${exec_prefix}/sbin'
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-{ (eval echo configure:729: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
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- echo "$ac_err" >&5
- echo "configure: failed program was:" >&5
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-{ (eval echo configure:746: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
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-echo $ac_n "checking for POSIXized ISC""... $ac_c" 1>&6
-echo "configure:798: checking for POSIXized ISC" >&5
-if test -d /etc/conf/kconfig.d &&
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- echo "$ac_t""no" 1>&6
- ISC=
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-
-echo $ac_n "checking for ANSI C header files""... $ac_c" 1>&6
-echo "configure:819: checking for ANSI C header files" >&5
-if eval "test \"`echo '$''{'ac_cv_header_stdc'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 824 "configure"
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-ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:832: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
-ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
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- ac_cv_header_stdc=yes
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- echo "$ac_err" >&5
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- ac_cv_header_stdc=no
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-rm -f conftest*
-
-if test $ac_cv_header_stdc = yes; then
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-if (eval "$ac_cpp conftest.$ac_ext") 2>&5 |
- egrep "memchr" >/dev/null 2>&1; then
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- rm -rf conftest*
- ac_cv_header_stdc=no
-fi
-rm -f conftest*
-
-fi
-
-if test $ac_cv_header_stdc = yes; then
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-#line 867 "configure"
-#include "confdefs.h"
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-if (eval "$ac_cpp conftest.$ac_ext") 2>&5 |
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-rm -f conftest*
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-
-if test $ac_cv_header_stdc = yes; then
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- cat > conftest.$ac_ext <<EOF
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-if { (eval echo configure:899: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null
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- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
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-
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-
-echo "$ac_t""$ac_cv_header_stdc" 1>&6
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-
-echo $ac_n "checking for working const""... $ac_c" 1>&6
-echo "configure:923: checking for working const" >&5
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- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 928 "configure"
-#include "confdefs.h"
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-{ /* SCO 3.2v4 cc rejects this. */
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-{ /* Someone thinks the Sun supposedly-ANSI compiler will reject this. */
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-{ /* Sun SC1.0 ANSI compiler rejects this -- but not the above. */
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-{ /* AIX XL C 1.02.0.0 rejects this saying
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-{ /* ULTRIX-32 V3.1 (Rev 9) vcc rejects this */
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-if { (eval echo configure:977: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
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- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
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-rm -f conftest*
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-
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-fi
-
-echo $ac_n "checking for inline""... $ac_c" 1>&6
-echo "configure:998: checking for inline" >&5
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-if { (eval echo configure:1012: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
- rm -rf conftest*
- ac_cv_c_inline=$ac_kw; break
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- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
-fi
-rm -f conftest*
-done
-
-fi
-
-echo "$ac_t""$ac_cv_c_inline" 1>&6
-case "$ac_cv_c_inline" in
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-
-echo $ac_n "checking for off_t""... $ac_c" 1>&6
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-if eval "test \"`echo '$''{'ac_cv_type_off_t'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1043 "configure"
-#include "confdefs.h"
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-#include <stdlib.h>
-#include <stddef.h>
-#endif
-EOF
-if (eval "$ac_cpp conftest.$ac_ext") 2>&5 |
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- rm -rf conftest*
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-fi
-rm -f conftest*
-
-fi
-echo "$ac_t""$ac_cv_type_off_t" 1>&6
-if test $ac_cv_type_off_t = no; then
- cat >> confdefs.h <<\EOF
-#define off_t long
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-
-fi
-
-echo $ac_n "checking for size_t""... $ac_c" 1>&6
-echo "configure:1071: checking for size_t" >&5
-if eval "test \"`echo '$''{'ac_cv_type_size_t'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1076 "configure"
-#include "confdefs.h"
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-#if STDC_HEADERS
-#include <stdlib.h>
-#include <stddef.h>
-#endif
-EOF
-if (eval "$ac_cpp conftest.$ac_ext") 2>&5 |
- egrep "(^|[^a-zA-Z_0-9])size_t[^a-zA-Z_0-9]" >/dev/null 2>&1; then
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- ac_cv_type_size_t=yes
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- rm -rf conftest*
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-rm -f conftest*
-
-fi
-echo "$ac_t""$ac_cv_type_size_t" 1>&6
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-fi
-
-# The Ultrix 4.2 mips builtin alloca declared by alloca.h only works
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-echo "configure:1106: checking for working alloca.h" >&5
-if eval "test \"`echo '$''{'ac_cv_header_alloca_h'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1111 "configure"
-#include "confdefs.h"
-#include <alloca.h>
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-if { (eval echo configure:1118: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- rm -rf conftest*
- ac_cv_header_alloca_h=yes
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- ac_cv_header_alloca_h=no
-fi
-rm -f conftest*
-fi
-
-echo "$ac_t""$ac_cv_header_alloca_h" 1>&6
-if test $ac_cv_header_alloca_h = yes; then
- cat >> confdefs.h <<\EOF
-#define HAVE_ALLOCA_H 1
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-
-fi
-
-echo $ac_n "checking for alloca""... $ac_c" 1>&6
-echo "configure:1139: checking for alloca" >&5
-if eval "test \"`echo '$''{'ac_cv_func_alloca_works'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1144 "configure"
-#include "confdefs.h"
-
-#ifdef __GNUC__
-# define alloca __builtin_alloca
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-# ifdef _MSC_VER
-# include <malloc.h>
-# define alloca _alloca
-# else
-# if HAVE_ALLOCA_H
-# include <alloca.h>
-# else
-# ifdef _AIX
- #pragma alloca
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-# ifndef alloca /* predefined by HP cc +Olibcalls */
-char *alloca ();
-# endif
-# endif
-# endif
-# endif
-#endif
-
-int main() {
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-if { (eval echo configure:1172: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- rm -rf conftest*
- ac_cv_func_alloca_works=yes
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- ac_cv_func_alloca_works=no
-fi
-rm -f conftest*
-fi
-
-echo "$ac_t""$ac_cv_func_alloca_works" 1>&6
-if test $ac_cv_func_alloca_works = yes; then
- cat >> confdefs.h <<\EOF
-#define HAVE_ALLOCA 1
-EOF
-
-fi
-
-if test $ac_cv_func_alloca_works = no; then
- # The SVR3 libPW and SVR4 libucb both contain incompatible functions
- # that cause trouble. Some versions do not even contain alloca or
- # contain a buggy version. If you still want to use their alloca,
- # use ar to extract alloca.o from them instead of compiling alloca.c.
- ALLOCA=alloca.${ac_objext}
- cat >> confdefs.h <<\EOF
-#define C_ALLOCA 1
-EOF
-
-
-echo $ac_n "checking whether alloca needs Cray hooks""... $ac_c" 1>&6
-echo "configure:1204: checking whether alloca needs Cray hooks" >&5
-if eval "test \"`echo '$''{'ac_cv_os_cray'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1209 "configure"
-#include "confdefs.h"
-#if defined(CRAY) && ! defined(CRAY2)
-webecray
-#else
-wenotbecray
-#endif
-
-EOF
-if (eval "$ac_cpp conftest.$ac_ext") 2>&5 |
- egrep "webecray" >/dev/null 2>&1; then
- rm -rf conftest*
- ac_cv_os_cray=yes
-else
- rm -rf conftest*
- ac_cv_os_cray=no
-fi
-rm -f conftest*
-
-fi
-
-echo "$ac_t""$ac_cv_os_cray" 1>&6
-if test $ac_cv_os_cray = yes; then
-for ac_func in _getb67 GETB67 getb67; do
- echo $ac_n "checking for $ac_func""... $ac_c" 1>&6
-echo "configure:1234: checking for $ac_func" >&5
-if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1239 "configure"
-#include "confdefs.h"
-/* System header to define __stub macros and hopefully few prototypes,
- which can conflict with char $ac_func(); below. */
-#include <assert.h>
-/* Override any gcc2 internal prototype to avoid an error. */
-/* We use char because int might match the return type of a gcc2
- builtin and then its argument prototype would still apply. */
-char $ac_func();
-
-int main() {
-
-/* The GNU C library defines this for functions which it implements
- to always fail with ENOSYS. Some functions are actually named
- something starting with __ and the normal name is an alias. */
-#if defined (__stub_$ac_func) || defined (__stub___$ac_func)
-choke me
-#else
-$ac_func();
-#endif
-
-; return 0; }
-EOF
-if { (eval echo configure:1262: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=yes"
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=no"
-fi
-rm -f conftest*
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-
-if eval "test \"`echo '$ac_cv_func_'$ac_func`\" = yes"; then
- echo "$ac_t""yes" 1>&6
- cat >> confdefs.h <<EOF
-#define CRAY_STACKSEG_END $ac_func
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-
- break
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- echo "$ac_t""no" 1>&6
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-
-done
-fi
-
-echo $ac_n "checking stack direction for C alloca""... $ac_c" 1>&6
-echo "configure:1289: checking stack direction for C alloca" >&5
-if eval "test \"`echo '$''{'ac_cv_c_stack_direction'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
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- if test "$cross_compiling" = yes; then
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- cat > conftest.$ac_ext <<EOF
-#line 1297 "configure"
-#include "confdefs.h"
-find_stack_direction ()
-{
- static char *addr = 0;
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- if (addr == 0)
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-{
- exit (find_stack_direction() < 0);
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-if { (eval echo configure:1316: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null
-then
- ac_cv_c_stack_direction=1
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -fr conftest*
- ac_cv_c_stack_direction=-1
-fi
-rm -fr conftest*
-fi
-
-fi
-
-echo "$ac_t""$ac_cv_c_stack_direction" 1>&6
-cat >> confdefs.h <<EOF
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-
-fi
-
-for ac_hdr in unistd.h
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-echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6
-echo "configure:1341: checking for $ac_hdr" >&5
-if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1346 "configure"
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-ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:1351: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
-ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
-if test -z "$ac_err"; then
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- eval "ac_cv_header_$ac_safe=yes"
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- echo "$ac_err" >&5
- echo "configure: failed program was:" >&5
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- eval "ac_cv_header_$ac_safe=no"
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- ac_tr_hdr=HAVE_`echo $ac_hdr | sed 'y%abcdefghijklmnopqrstuvwxyz./-%ABCDEFGHIJKLMNOPQRSTUVWXYZ___%'`
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-echo "configure:1380: checking for $ac_func" >&5
-if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1385 "configure"
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-#include <assert.h>
-/* Override any gcc2 internal prototype to avoid an error. */
-/* We use char because int might match the return type of a gcc2
- builtin and then its argument prototype would still apply. */
-char $ac_func();
-
-int main() {
-
-/* The GNU C library defines this for functions which it implements
- to always fail with ENOSYS. Some functions are actually named
- something starting with __ and the normal name is an alias. */
-#if defined (__stub_$ac_func) || defined (__stub___$ac_func)
-choke me
-#else
-$ac_func();
-#endif
-
-; return 0; }
-EOF
-if { (eval echo configure:1408: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=yes"
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=no"
-fi
-rm -f conftest*
-fi
-
-if eval "test \"`echo '$ac_cv_func_'$ac_func`\" = yes"; then
- echo "$ac_t""yes" 1>&6
- ac_tr_func=HAVE_`echo $ac_func | tr 'abcdefghijklmnopqrstuvwxyz' 'ABCDEFGHIJKLMNOPQRSTUVWXYZ'`
- cat >> confdefs.h <<EOF
-#define $ac_tr_func 1
-EOF
-
-else
- echo "$ac_t""no" 1>&6
-fi
-done
-
-echo $ac_n "checking for working mmap""... $ac_c" 1>&6
-echo "configure:1433: checking for working mmap" >&5
-if eval "test \"`echo '$''{'ac_cv_func_mmap_fixed_mapped'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- if test "$cross_compiling" = yes; then
- ac_cv_func_mmap_fixed_mapped=no
-else
- cat > conftest.$ac_ext <<EOF
-#line 1441 "configure"
-#include "confdefs.h"
-
-/* Thanks to Mike Haertel and Jim Avera for this test.
- Here is a matrix of mmap possibilities:
- mmap private not fixed
- mmap private fixed at somewhere currently unmapped
- mmap private fixed at somewhere already mapped
- mmap shared not fixed
- mmap shared fixed at somewhere currently unmapped
- mmap shared fixed at somewhere already mapped
- For private mappings, we should verify that changes cannot be read()
- back from the file, nor mmap's back from the file at a different
- address. (There have been systems where private was not correctly
- implemented like the infamous i386 svr4.0, and systems where the
- VM page cache was not coherent with the filesystem buffer cache
- like early versions of FreeBSD and possibly contemporary NetBSD.)
- For shared mappings, we should conversely verify that changes get
- propogated back to all the places they're supposed to be.
-
- Grep wants private fixed already mapped.
- The main things grep needs to know about mmap are:
- * does it exist and is it safe to write into the mmap'd area
- * how to use it (BSD variants) */
-#include <sys/types.h>
-#include <fcntl.h>
-#include <sys/mman.h>
-
-/* This mess was copied from the GNU getpagesize.h. */
-#ifndef HAVE_GETPAGESIZE
-# ifdef HAVE_UNISTD_H
-# include <unistd.h>
-# endif
-
-/* Assume that all systems that can run configure have sys/param.h. */
-# ifndef HAVE_SYS_PARAM_H
-# define HAVE_SYS_PARAM_H 1
-# endif
-
-# ifdef _SC_PAGESIZE
-# define getpagesize() sysconf(_SC_PAGESIZE)
-# else /* no _SC_PAGESIZE */
-# ifdef HAVE_SYS_PARAM_H
-# include <sys/param.h>
-# ifdef EXEC_PAGESIZE
-# define getpagesize() EXEC_PAGESIZE
-# else /* no EXEC_PAGESIZE */
-# ifdef NBPG
-# define getpagesize() NBPG * CLSIZE
-# ifndef CLSIZE
-# define CLSIZE 1
-# endif /* no CLSIZE */
-# else /* no NBPG */
-# ifdef NBPC
-# define getpagesize() NBPC
-# else /* no NBPC */
-# ifdef PAGESIZE
-# define getpagesize() PAGESIZE
-# endif /* PAGESIZE */
-# endif /* no NBPC */
-# endif /* no NBPG */
-# endif /* no EXEC_PAGESIZE */
-# else /* no HAVE_SYS_PARAM_H */
-# define getpagesize() 8192 /* punt totally */
-# endif /* no HAVE_SYS_PARAM_H */
-# endif /* no _SC_PAGESIZE */
-
-#endif /* no HAVE_GETPAGESIZE */
-
-#ifdef __cplusplus
-extern "C" { void *malloc(unsigned); }
-#else
-char *malloc();
-#endif
-
-int
-main()
-{
- char *data, *data2, *data3;
- int i, pagesize;
- int fd;
-
- pagesize = getpagesize();
-
- /*
- * First, make a file with some known garbage in it.
- */
- data = malloc(pagesize);
- if (!data)
- exit(1);
- for (i = 0; i < pagesize; ++i)
- *(data + i) = rand();
- umask(0);
- fd = creat("conftestmmap", 0600);
- if (fd < 0)
- exit(1);
- if (write(fd, data, pagesize) != pagesize)
- exit(1);
- close(fd);
-
- /*
- * Next, try to mmap the file at a fixed address which
- * already has something else allocated at it. If we can,
- * also make sure that we see the same garbage.
- */
- fd = open("conftestmmap", O_RDWR);
- if (fd < 0)
- exit(1);
- data2 = malloc(2 * pagesize);
- if (!data2)
- exit(1);
- data2 += (pagesize - ((int) data2 & (pagesize - 1))) & (pagesize - 1);
- if (data2 != mmap(data2, pagesize, PROT_READ | PROT_WRITE,
- MAP_PRIVATE | MAP_FIXED, fd, 0L))
- exit(1);
- for (i = 0; i < pagesize; ++i)
- if (*(data + i) != *(data2 + i))
- exit(1);
-
- /*
- * Finally, make sure that changes to the mapped area
- * do not percolate back to the file as seen by read().
- * (This is a bug on some variants of i386 svr4.0.)
- */
- for (i = 0; i < pagesize; ++i)
- *(data2 + i) = *(data2 + i) + 1;
- data3 = malloc(pagesize);
- if (!data3)
- exit(1);
- if (read(fd, data3, pagesize) != pagesize)
- exit(1);
- for (i = 0; i < pagesize; ++i)
- if (*(data + i) != *(data3 + i))
- exit(1);
- close(fd);
- unlink("conftestmmap");
- exit(0);
-}
-
-EOF
-if { (eval echo configure:1581: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null
-then
- ac_cv_func_mmap_fixed_mapped=yes
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -fr conftest*
- ac_cv_func_mmap_fixed_mapped=no
-fi
-rm -fr conftest*
-fi
-
-fi
-
-echo "$ac_t""$ac_cv_func_mmap_fixed_mapped" 1>&6
-if test $ac_cv_func_mmap_fixed_mapped = yes; then
- cat >> confdefs.h <<\EOF
-#define HAVE_MMAP 1
-EOF
-
-fi
-
-echo $ac_n "checking for Cygwin environment""... $ac_c" 1>&6
-echo "configure:1604: checking for Cygwin environment" >&5
-if eval "test \"`echo '$''{'ac_cv_cygwin'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1609 "configure"
-#include "confdefs.h"
-
-int main() {
-
-#ifndef __CYGWIN__
-#define __CYGWIN__ __CYGWIN32__
-#endif
-return __CYGWIN__;
-; return 0; }
-EOF
-if { (eval echo configure:1620: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
- rm -rf conftest*
- ac_cv_cygwin=yes
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- ac_cv_cygwin=no
-fi
-rm -f conftest*
-rm -f conftest*
-fi
-
-echo "$ac_t""$ac_cv_cygwin" 1>&6
-CYGWIN=
-test "$ac_cv_cygwin" = yes && CYGWIN=yes
-echo $ac_n "checking for mingw32 environment""... $ac_c" 1>&6
-echo "configure:1637: checking for mingw32 environment" >&5
-if eval "test \"`echo '$''{'ac_cv_mingw32'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1642 "configure"
-#include "confdefs.h"
-
-int main() {
-return __MINGW32__;
-; return 0; }
-EOF
-if { (eval echo configure:1649: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
- rm -rf conftest*
- ac_cv_mingw32=yes
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- ac_cv_mingw32=no
-fi
-rm -f conftest*
-rm -f conftest*
-fi
-
-echo "$ac_t""$ac_cv_mingw32" 1>&6
-MINGW32=
-test "$ac_cv_mingw32" = yes && MINGW32=yes
-
-# autoconf.info says this should be called right after AC_INIT.
-
-
-ac_aux_dir=
-for ac_dir in `cd $srcdir;pwd`/../.. $srcdir/`cd $srcdir;pwd`/../..; do
- if test -f $ac_dir/install-sh; then
- ac_aux_dir=$ac_dir
- ac_install_sh="$ac_aux_dir/install-sh -c"
- break
- elif test -f $ac_dir/install.sh; then
- ac_aux_dir=$ac_dir
- ac_install_sh="$ac_aux_dir/install.sh -c"
- break
- fi
-done
-if test -z "$ac_aux_dir"; then
- { echo "configure: error: can not find install-sh or install.sh in `cd $srcdir;pwd`/../.. $srcdir/`cd $srcdir;pwd`/../.." 1>&2; exit 1; }
-fi
-ac_config_guess=$ac_aux_dir/config.guess
-ac_config_sub=$ac_aux_dir/config.sub
-ac_configure=$ac_aux_dir/configure # This should be Cygnus configure.
-
-
-# Do some error checking and defaulting for the host and target type.
-# The inputs are:
-# configure --host=HOST --target=TARGET --build=BUILD NONOPT
-#
-# The rules are:
-# 1. You are not allowed to specify --host, --target, and nonopt at the
-# same time.
-# 2. Host defaults to nonopt.
-# 3. If nonopt is not specified, then host defaults to the current host,
-# as determined by config.guess.
-# 4. Target and build default to nonopt.
-# 5. If nonopt is not specified, then target and build default to host.
-
-# The aliases save the names the user supplied, while $host etc.
-# will get canonicalized.
-case $host---$target---$nonopt in
-NONE---*---* | *---NONE---* | *---*---NONE) ;;
-*) { echo "configure: error: can only configure for one host and one target at a time" 1>&2; exit 1; } ;;
-esac
-
-
-# Make sure we can run config.sub.
-if ${CONFIG_SHELL-/bin/sh} $ac_config_sub sun4 >/dev/null 2>&1; then :
-else { echo "configure: error: can not run $ac_config_sub" 1>&2; exit 1; }
-fi
-
-echo $ac_n "checking host system type""... $ac_c" 1>&6
-echo "configure:1716: checking host system type" >&5
-
-host_alias=$host
-case "$host_alias" in
-NONE)
- case $nonopt in
- NONE)
- if host_alias=`${CONFIG_SHELL-/bin/sh} $ac_config_guess`; then :
- else { echo "configure: error: can not guess host type; you must specify one" 1>&2; exit 1; }
- fi ;;
- *) host_alias=$nonopt ;;
- esac ;;
-esac
-
-host=`${CONFIG_SHELL-/bin/sh} $ac_config_sub $host_alias`
-host_cpu=`echo $host | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\1/'`
-host_vendor=`echo $host | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\2/'`
-host_os=`echo $host | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\3/'`
-echo "$ac_t""$host" 1>&6
-
-echo $ac_n "checking target system type""... $ac_c" 1>&6
-echo "configure:1737: checking target system type" >&5
-
-target_alias=$target
-case "$target_alias" in
-NONE)
- case $nonopt in
- NONE) target_alias=$host_alias ;;
- *) target_alias=$nonopt ;;
- esac ;;
-esac
-
-target=`${CONFIG_SHELL-/bin/sh} $ac_config_sub $target_alias`
-target_cpu=`echo $target | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\1/'`
-target_vendor=`echo $target | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\2/'`
-target_os=`echo $target | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\3/'`
-echo "$ac_t""$target" 1>&6
-
-echo $ac_n "checking build system type""... $ac_c" 1>&6
-echo "configure:1755: checking build system type" >&5
-
-build_alias=$build
-case "$build_alias" in
-NONE)
- case $nonopt in
- NONE) build_alias=$host_alias ;;
- *) build_alias=$nonopt ;;
- esac ;;
-esac
-
-build=`${CONFIG_SHELL-/bin/sh} $ac_config_sub $build_alias`
-build_cpu=`echo $build | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\1/'`
-build_vendor=`echo $build | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\2/'`
-build_os=`echo $build | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\3/'`
-echo "$ac_t""$build" 1>&6
-
-test "$host_alias" != "$target_alias" &&
- test "$program_prefix$program_suffix$program_transform_name" = \
- NONENONEs,x,x, &&
- program_prefix=${target_alias}-
-
-if test "$program_transform_name" = s,x,x,; then
- program_transform_name=
-else
- # Double any \ or $. echo might interpret backslashes.
- cat <<\EOF_SED > conftestsed
-s,\\,\\\\,g; s,\$,$$,g
-EOF_SED
- program_transform_name="`echo $program_transform_name|sed -f conftestsed`"
- rm -f conftestsed
-fi
-test "$program_prefix" != NONE &&
- program_transform_name="s,^,${program_prefix},; $program_transform_name"
-# Use a double $ so make ignores it.
-test "$program_suffix" != NONE &&
- program_transform_name="s,\$\$,${program_suffix},; $program_transform_name"
-
-# sed with no file args requires a program.
-test "$program_transform_name" = "" && program_transform_name="s,x,x,"
-
-# Extract the first word of "gcc", so it can be a program name with args.
-set dummy gcc; ac_word=$2
-echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:1799: checking for $ac_word" >&5
-if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- if test -n "$CC"; then
- ac_cv_prog_CC="$CC" # Let the user override the test.
-else
- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
- ac_dummy="$PATH"
- for ac_dir in $ac_dummy; do
- test -z "$ac_dir" && ac_dir=.
- if test -f $ac_dir/$ac_word; then
- ac_cv_prog_CC="gcc"
- break
- fi
- done
- IFS="$ac_save_ifs"
-fi
-fi
-CC="$ac_cv_prog_CC"
-if test -n "$CC"; then
- echo "$ac_t""$CC" 1>&6
-else
- echo "$ac_t""no" 1>&6
-fi
-
-if test -z "$CC"; then
- # Extract the first word of "cc", so it can be a program name with args.
-set dummy cc; ac_word=$2
-echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:1829: checking for $ac_word" >&5
-if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- if test -n "$CC"; then
- ac_cv_prog_CC="$CC" # Let the user override the test.
-else
- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
- ac_prog_rejected=no
- ac_dummy="$PATH"
- for ac_dir in $ac_dummy; do
- test -z "$ac_dir" && ac_dir=.
- if test -f $ac_dir/$ac_word; then
- if test "$ac_dir/$ac_word" = "/usr/ucb/cc"; then
- ac_prog_rejected=yes
- continue
- fi
- ac_cv_prog_CC="cc"
- break
- fi
- done
- IFS="$ac_save_ifs"
-if test $ac_prog_rejected = yes; then
- # We found a bogon in the path, so make sure we never use it.
- set dummy $ac_cv_prog_CC
- shift
- if test $# -gt 0; then
- # We chose a different compiler from the bogus one.
- # However, it has the same basename, so the bogon will be chosen
- # first if we set CC to just the basename; use the full file name.
- shift
- set dummy "$ac_dir/$ac_word" "$@"
- shift
- ac_cv_prog_CC="$@"
- fi
-fi
-fi
-fi
-CC="$ac_cv_prog_CC"
-if test -n "$CC"; then
- echo "$ac_t""$CC" 1>&6
-else
- echo "$ac_t""no" 1>&6
-fi
-
- if test -z "$CC"; then
- case "`uname -s`" in
- *win32* | *WIN32*)
- # Extract the first word of "cl", so it can be a program name with args.
-set dummy cl; ac_word=$2
-echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:1880: checking for $ac_word" >&5
-if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- if test -n "$CC"; then
- ac_cv_prog_CC="$CC" # Let the user override the test.
-else
- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
- ac_dummy="$PATH"
- for ac_dir in $ac_dummy; do
- test -z "$ac_dir" && ac_dir=.
- if test -f $ac_dir/$ac_word; then
- ac_cv_prog_CC="cl"
- break
- fi
- done
- IFS="$ac_save_ifs"
-fi
-fi
-CC="$ac_cv_prog_CC"
-if test -n "$CC"; then
- echo "$ac_t""$CC" 1>&6
-else
- echo "$ac_t""no" 1>&6
-fi
- ;;
- esac
- fi
- test -z "$CC" && { echo "configure: error: no acceptable cc found in \$PATH" 1>&2; exit 1; }
-fi
-
-echo $ac_n "checking whether the C compiler ($CC $CFLAGS $LDFLAGS) works""... $ac_c" 1>&6
-echo "configure:1912: checking whether the C compiler ($CC $CFLAGS $LDFLAGS) works" >&5
-
-ac_ext=c
-# CFLAGS is not in ac_cpp because -g, -O, etc. are not valid cpp options.
-ac_cpp='$CPP $CPPFLAGS'
-ac_compile='${CC-cc} -c $CFLAGS $CPPFLAGS conftest.$ac_ext 1>&5'
-ac_link='${CC-cc} -o conftest${ac_exeext} $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS 1>&5'
-cross_compiling=$ac_cv_prog_cc_cross
-
-cat > conftest.$ac_ext << EOF
-
-#line 1923 "configure"
-#include "confdefs.h"
-
-main(){return(0);}
-EOF
-if { (eval echo configure:1928: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- ac_cv_prog_cc_works=yes
- # If we can't run a trivial program, we are probably using a cross compiler.
- if (./conftest; exit) 2>/dev/null; then
- ac_cv_prog_cc_cross=no
- else
- ac_cv_prog_cc_cross=yes
- fi
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- ac_cv_prog_cc_works=no
-fi
-rm -fr conftest*
-ac_ext=c
-# CFLAGS is not in ac_cpp because -g, -O, etc. are not valid cpp options.
-ac_cpp='$CPP $CPPFLAGS'
-ac_compile='${CC-cc} -c $CFLAGS $CPPFLAGS conftest.$ac_ext 1>&5'
-ac_link='${CC-cc} -o conftest${ac_exeext} $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS 1>&5'
-cross_compiling=$ac_cv_prog_cc_cross
-
-echo "$ac_t""$ac_cv_prog_cc_works" 1>&6
-if test $ac_cv_prog_cc_works = no; then
- { echo "configure: error: installation or configuration problem: C compiler cannot create executables." 1>&2; exit 1; }
-fi
-echo $ac_n "checking whether the C compiler ($CC $CFLAGS $LDFLAGS) is a cross-compiler""... $ac_c" 1>&6
-echo "configure:1954: checking whether the C compiler ($CC $CFLAGS $LDFLAGS) is a cross-compiler" >&5
-echo "$ac_t""$ac_cv_prog_cc_cross" 1>&6
-cross_compiling=$ac_cv_prog_cc_cross
-
-echo $ac_n "checking whether we are using GNU C""... $ac_c" 1>&6
-echo "configure:1959: checking whether we are using GNU C" >&5
-if eval "test \"`echo '$''{'ac_cv_prog_gcc'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.c <<EOF
-#ifdef __GNUC__
- yes;
-#endif
-EOF
-if { ac_try='${CC-cc} -E conftest.c'; { (eval echo configure:1968: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }; } | egrep yes >/dev/null 2>&1; then
- ac_cv_prog_gcc=yes
-else
- ac_cv_prog_gcc=no
-fi
-fi
-
-echo "$ac_t""$ac_cv_prog_gcc" 1>&6
-
-if test $ac_cv_prog_gcc = yes; then
- GCC=yes
-else
- GCC=
-fi
-
-ac_test_CFLAGS="${CFLAGS+set}"
-ac_save_CFLAGS="$CFLAGS"
-CFLAGS=
-echo $ac_n "checking whether ${CC-cc} accepts -g""... $ac_c" 1>&6
-echo "configure:1987: checking whether ${CC-cc} accepts -g" >&5
-if eval "test \"`echo '$''{'ac_cv_prog_cc_g'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- echo 'void f(){}' > conftest.c
-if test -z "`${CC-cc} -g -c conftest.c 2>&1`"; then
- ac_cv_prog_cc_g=yes
-else
- ac_cv_prog_cc_g=no
-fi
-rm -f conftest*
-
-fi
-
-echo "$ac_t""$ac_cv_prog_cc_g" 1>&6
-if test "$ac_test_CFLAGS" = set; then
- CFLAGS="$ac_save_CFLAGS"
-elif test $ac_cv_prog_cc_g = yes; then
- if test "$GCC" = yes; then
- CFLAGS="-g -O2"
- else
- CFLAGS="-g"
- fi
-else
- if test "$GCC" = yes; then
- CFLAGS="-O2"
- else
- CFLAGS=
- fi
-fi
-
-# Find a good install program. We prefer a C program (faster),
-# so one script is as good as another. But avoid the broken or
-# incompatible versions:
-# SysV /etc/install, /usr/sbin/install
-# SunOS /usr/etc/install
-# IRIX /sbin/install
-# AIX /bin/install
-# AIX 4 /usr/bin/installbsd, which doesn't work without a -g flag
-# AFS /usr/afsws/bin/install, which mishandles nonexistent args
-# SVR4 /usr/ucb/install, which tries to use the nonexistent group "staff"
-# ./install, which can be erroneously created by make from ./install.sh.
-echo $ac_n "checking for a BSD compatible install""... $ac_c" 1>&6
-echo "configure:2030: checking for a BSD compatible install" >&5
-if test -z "$INSTALL"; then
-if eval "test \"`echo '$''{'ac_cv_path_install'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
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- ac_safe=`echo "libintl.h" | sed 'y%./+-%__p_%'`
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-
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- echo "$ac_t""no" 1>&6
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-
- cat > conftest.$ac_ext <<EOF
-#line 2651 "configure"
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-
-int main() {
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-; return 0; }
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-if { (eval echo configure:2659: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
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- CATOBJEXT=.gmo
- DATADIRNAME=share
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- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- CATOBJEXT=.mo
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-rm -f conftest*
- INSTOBJEXT=.mo
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- fi
-
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- echo "$ac_t""no" 1>&6
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-
-
-
- if test "$CATOBJEXT" = "NONE"; then
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-
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- IFS="$ac_save_ifs"
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-MSGFMT="$ac_cv_path_MSGFMT"
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-
- # Extract the first word of "gmsgfmt", so it can be a program name with args.
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- *)
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-
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- echo "$ac_t""no" 1>&6
-fi
-
-
- USE_INCLUDED_LIBINTL=yes
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- INSTOBJEXT=.mo
- DATADIRNAME=share
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- INTLLIBS=$INTLDEPS
- LIBS=`echo $LIBS | sed -e 's/-lintl//'`
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-
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- nls_cv_header_intl=libintl.h
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-
- # If this is used in GNU gettext we have to set USE_NLS to `yes'
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-
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-
-
-
-
-
-
-
-
-
-
-
-
-
-
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- echo $ac_n "checking for catalogs to be installed""... $ac_c" 1>&6
-echo "configure:2851: checking for catalogs to be installed" >&5
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- esac
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- fi
-
- if test -n "$LINGUAS"; then
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- fi
- fi
-
- if test $ac_cv_header_locale_h = yes; then
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- else
- INCLUDE_LOCALE_H="\
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- fi
-
-
- if test -f $srcdir/po2tbl.sed.in; then
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-echo "configure:2879: checking for linux/version.h" >&5
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- cat > conftest.$ac_ext <<EOF
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-{ (eval echo configure:2889: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
-ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
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- eval "ac_cv_header_$ac_safe=yes"
-else
- echo "$ac_err" >&5
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=no"
-fi
-rm -f conftest*
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-if eval "test \"`echo '$ac_cv_header_'$ac_safe`\" = yes"; then
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- msgformat=linux
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- echo "$ac_t""no" 1>&6
-msgformat=xopen
-fi
-
-
- sed -e '/^#/d' $srcdir/$msgformat-msg.sed > po2msg.sed
- fi
- sed -e '/^#.*[^\\]$/d' -e '/^#$/d' \
- $srcdir/po2tbl.sed.in > po2tbl.sed
- fi
-
- if test "$PACKAGE" = "gettext"; then
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- GT_YES=
- else
- GT_NO=
- GT_YES="#YES#"
- fi
-
-
-
- MKINSTALLDIRS="\$(srcdir)/../../mkinstalldirs"
-
-
- l=
-
-
- if test -d $srcdir/po; then
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- if test "x$srcdir" != "x."; then
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- else
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- fi
- else
- posrcprefix="../"
- fi
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- < $srcdir/po/POTFILES.in > po/POTFILES
- fi
-
-
-# Check for common headers.
-# FIXME: Seems to me this can cause problems for i386-windows hosts.
-# At one point there were hardcoded AC_DEFINE's if ${host} = i386-*-windows*.
-for ac_hdr in stdlib.h string.h strings.h unistd.h time.h
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-else
- cat > conftest.$ac_ext <<EOF
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- echo "$ac_err" >&5
- echo "configure: failed program was:" >&5
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-echo "configure:2998: checking for $ac_hdr" >&5
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- echo "$ac_err" >&5
- echo "configure: failed program was:" >&5
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- eval "ac_cv_header_$ac_safe=no"
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- ac_tr_hdr=HAVE_`echo $ac_hdr | sed 'y%abcdefghijklmnopqrstuvwxyz./-%ABCDEFGHIJKLMNOPQRSTUVWXYZ___%'`
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-
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-
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-echo "configure:3038: checking for $ac_hdr" >&5
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-ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
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- echo "$ac_err" >&5
- echo "configure: failed program was:" >&5
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- eval "ac_cv_header_$ac_safe=no"
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- ac_tr_hdr=HAVE_`echo $ac_hdr | sed 'y%abcdefghijklmnopqrstuvwxyz./-%ABCDEFGHIJKLMNOPQRSTUVWXYZ___%'`
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-
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-for ac_hdr in dlfcn.h errno.h sys/stat.h
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-echo "configure:3078: checking for $ac_hdr" >&5
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- cat > conftest.$ac_ext <<EOF
-#line 3083 "configure"
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-ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
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-ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
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- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
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- eval "ac_cv_header_$ac_safe=no"
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- ac_tr_hdr=HAVE_`echo $ac_hdr | sed 'y%abcdefghijklmnopqrstuvwxyz./-%ABCDEFGHIJKLMNOPQRSTUVWXYZ___%'`
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-
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- eval "ac_cv_func_$ac_func=yes"
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- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=no"
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-
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-
-
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-/* Override any gcc2 internal prototype to avoid an error. */
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-if { (eval echo configure:3191: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
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-
-
-. ${srcdir}/../../bfd/configure.host
-
-
-
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-
-
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-# Check whether --enable-sim-bswap or --disable-sim-bswap was given.
-if test "${enable_sim_bswap+set}" = set; then
- enableval="$enable_sim_bswap"
- case "${enableval}" in
- yes) sim_bswap="-DWITH_BSWAP=1 -DUSE_BSWAP=1";;
- no) sim_bswap="-DWITH_BSWAP=0";;
- *) { echo "configure: error: "--enable-sim-bswap does not take a value"" 1>&2; exit 1; }; sim_bswap="";;
-esac
-if test x"$silent" != x"yes" && test x"$sim_bswap" != x""; then
- echo "Setting bswap flags = $sim_bswap" 6>&1
-fi
-else
- sim_bswap=""
-fi
-
-
-
-# Check whether --enable-sim-cflags or --disable-sim-cflags was given.
-if test "${enable_sim_cflags+set}" = set; then
- enableval="$enable_sim_cflags"
- case "${enableval}" in
- yes) sim_cflags="-O2 -fomit-frame-pointer";;
- trace) { echo "configure: error: "Please use --enable-sim-debug instead."" 1>&2; exit 1; }; sim_cflags="";;
- no) sim_cflags="";;
- *) sim_cflags=`echo "${enableval}" | sed -e "s/,/ /g"`;;
-esac
-if test x"$silent" != x"yes" && test x"$sim_cflags" != x""; then
- echo "Setting sim cflags = $sim_cflags" 6>&1
-fi
-else
- sim_cflags=""
-fi
-
-
-
-# Check whether --enable-sim-debug or --disable-sim-debug was given.
-if test "${enable_sim_debug+set}" = set; then
- enableval="$enable_sim_debug"
- case "${enableval}" in
- yes) sim_debug="-DDEBUG=7 -DWITH_DEBUG=7";;
- no) sim_debug="-DDEBUG=0 -DWITH_DEBUG=0";;
- *) sim_debug="-DDEBUG='(${enableval})' -DWITH_DEBUG='(${enableval})'";;
-esac
-if test x"$silent" != x"yes" && test x"$sim_debug" != x""; then
- echo "Setting sim debug = $sim_debug" 6>&1
-fi
-else
- sim_debug=""
-fi
-
-
-
-# Check whether --enable-sim-stdio or --disable-sim-stdio was given.
-if test "${enable_sim_stdio+set}" = set; then
- enableval="$enable_sim_stdio"
- case "${enableval}" in
- yes) sim_stdio="-DWITH_STDIO=DO_USE_STDIO";;
- no) sim_stdio="-DWITH_STDIO=DONT_USE_STDIO";;
- *) { echo "configure: error: "Unknown value $enableval passed to --enable-sim-stdio"" 1>&2; exit 1; }; sim_stdio="";;
-esac
-if test x"$silent" != x"yes" && test x"$sim_stdio" != x""; then
- echo "Setting stdio flags = $sim_stdio" 6>&1
-fi
-else
- sim_stdio=""
-fi
-
-
-
-# Check whether --enable-sim-trace or --disable-sim-trace was given.
-if test "${enable_sim_trace+set}" = set; then
- enableval="$enable_sim_trace"
- case "${enableval}" in
- yes) sim_trace="-DTRACE=1 -DWITH_TRACE=-1";;
- no) sim_trace="-DTRACE=0 -DWITH_TRACE=0";;
- [-0-9]*)
- sim_trace="-DTRACE='(${enableval})' -DWITH_TRACE='(${enableval})'";;
- [a-z]*)
- sim_trace=""
- for x in `echo "$enableval" | sed -e "s/,/ /g"`; do
- if test x"$sim_trace" = x; then
- sim_trace="-DWITH_TRACE='(TRACE_$x"
- else
- sim_trace="${sim_trace}|TRACE_$x"
- fi
- done
- sim_trace="$sim_trace)'" ;;
-esac
-if test x"$silent" != x"yes" && test x"$sim_trace" != x""; then
- echo "Setting sim trace = $sim_trace" 6>&1
-fi
-else
- sim_trace=""
-fi
-
-
-
-# Check whether --enable-sim-profile or --disable-sim-profile was given.
-if test "${enable_sim_profile+set}" = set; then
- enableval="$enable_sim_profile"
- case "${enableval}" in
- yes) sim_profile="-DPROFILE=1 -DWITH_PROFILE=-1";;
- no) sim_profile="-DPROFILE=0 -DWITH_PROFILE=0";;
- [-0-9]*)
- sim_profile="-DPROFILE='(${enableval})' -DWITH_PROFILE='(${enableval})'";;
- [a-z]*)
- sim_profile=""
- for x in `echo "$enableval" | sed -e "s/,/ /g"`; do
- if test x"$sim_profile" = x; then
- sim_profile="-DWITH_PROFILE='(PROFILE_$x"
- else
- sim_profile="${sim_profile}|PROFILE_$x"
- fi
- done
- sim_profile="$sim_profile)'" ;;
-esac
-if test x"$silent" != x"yes" && test x"$sim_profile" != x""; then
- echo "Setting sim profile = $sim_profile" 6>&1
-fi
-else
- sim_profile="-DPROFILE=1 -DWITH_PROFILE=-1"
-fi
-
-
-
-echo $ac_n "checking return type of signal handlers""... $ac_c" 1>&6
-echo "configure:3414: checking return type of signal handlers" >&5
-if eval "test \"`echo '$''{'ac_cv_type_signal'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 3419 "configure"
-#include "confdefs.h"
-#include <sys/types.h>
-#include <signal.h>
-#ifdef signal
-#undef signal
-#endif
-#ifdef __cplusplus
-extern "C" void (*signal (int, void (*)(int)))(int);
-#else
-void (*signal ()) ();
-#endif
-
-int main() {
-int i;
-; return 0; }
-EOF
-if { (eval echo configure:3436: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
- rm -rf conftest*
- ac_cv_type_signal=void
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- ac_cv_type_signal=int
-fi
-rm -f conftest*
-fi
-
-echo "$ac_t""$ac_cv_type_signal" 1>&6
-cat >> confdefs.h <<EOF
-#define RETSIGTYPE $ac_cv_type_signal
-EOF
-
-
-
-
-
-echo $ac_n "checking for executable suffix""... $ac_c" 1>&6
-echo "configure:3458: checking for executable suffix" >&5
-if eval "test \"`echo '$''{'ac_cv_exeext'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- if test "$CYGWIN" = yes || test "$MINGW32" = yes; then
- ac_cv_exeext=.exe
-else
- rm -f conftest*
- echo 'int main () { return 0; }' > conftest.$ac_ext
- ac_cv_exeext=
- if { (eval echo configure:3468: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; }; then
- for file in conftest.*; do
- case $file in
- *.c | *.o | *.obj | *.ilk | *.pdb) ;;
- *) ac_cv_exeext=`echo $file | sed -e s/conftest//` ;;
- esac
- done
- else
- { echo "configure: error: installation or configuration problem: compiler cannot create executables." 1>&2; exit 1; }
- fi
- rm -f conftest*
- test x"${ac_cv_exeext}" = x && ac_cv_exeext=no
-fi
-fi
-
-EXEEXT=""
-test x"${ac_cv_exeext}" != xno && EXEEXT=${ac_cv_exeext}
-echo "$ac_t""${ac_cv_exeext}" 1>&6
-ac_exeext=$EXEEXT
-
-
-sim_link_files=
-sim_link_links=
-
-sim_link_links=tconfig.h
-if test -f ${srcdir}/tconfig.in
-then
- sim_link_files=tconfig.in
-else
- sim_link_files=../common/tconfig.in
-fi
-
-# targ-vals.def points to the libc macro description file.
-case "${target}" in
-*-*-*) TARG_VALS_DEF=../common/nltvals.def ;;
-esac
-sim_link_files="${sim_link_files} ${TARG_VALS_DEF}"
-sim_link_links="${sim_link_links} targ-vals.def"
-
-
-
-
-wire_endian="LITTLE_ENDIAN"
-default_endian=""
-# Check whether --enable-sim-endian or --disable-sim-endian was given.
-if test "${enable_sim_endian+set}" = set; then
- enableval="$enable_sim_endian"
- case "${enableval}" in
- b*|B*) sim_endian="-DWITH_TARGET_BYTE_ORDER=BIG_ENDIAN";;
- l*|L*) sim_endian="-DWITH_TARGET_BYTE_ORDER=LITTLE_ENDIAN";;
- yes) if test x"$wire_endian" != x; then
- sim_endian="-DWITH_TARGET_BYTE_ORDER=${wire_endian}"
- else
- if test x"$default_endian" != x; then
- sim_endian="-DWITH_TARGET_BYTE_ORDER=${default_endian}"
- else
- echo "No hard-wired endian for target $target" 1>&6
- sim_endian="-DWITH_TARGET_BYTE_ORDER=0"
- fi
- fi;;
- no) if test x"$default_endian" != x; then
- sim_endian="-DWITH_DEFAULT_TARGET_BYTE_ORDER=${default_endian}"
- else
- if test x"$wire_endian" != x; then
- sim_endian="-DWITH_DEFAULT_TARGET_BYTE_ORDER=${wire_endian}"
- else
- echo "No default endian for target $target" 1>&6
- sim_endian="-DWITH_DEFAULT_TARGET_BYTE_ORDER=0"
- fi
- fi;;
- *) { echo "configure: error: "Unknown value $enableval for --enable-sim-endian"" 1>&2; exit 1; }; sim_endian="";;
-esac
-if test x"$silent" != x"yes" && test x"$sim_endian" != x""; then
- echo "Setting endian flags = $sim_endian" 6>&1
-fi
-else
- if test x"$default_endian" != x; then
- sim_endian="-DWITH_DEFAULT_TARGET_BYTE_ORDER=${default_endian}"
-else
- if test x"$wire_endian" != x; then
- sim_endian="-DWITH_TARGET_BYTE_ORDER=${wire_endian}"
- else
- sim_endian=
- fi
-fi
-fi
-
-wire_alignment=""
-default_alignment="NONSTRICT_ALIGNMENT"
-
-# Check whether --enable-sim-alignment or --disable-sim-alignment was given.
-if test "${enable_sim_alignment+set}" = set; then
- enableval="$enable_sim_alignment"
- case "${enableval}" in
- strict | STRICT) sim_alignment="-DWITH_ALIGNMENT=STRICT_ALIGNMENT";;
- nonstrict | NONSTRICT) sim_alignment="-DWITH_ALIGNMENT=NONSTRICT_ALIGNMENT";;
- forced | FORCED) sim_alignment="-DWITH_ALIGNMENT=FORCED_ALIGNMENT";;
- yes) if test x"$wire_alignment" != x; then
- sim_alignment="-DWITH_ALIGNMENT=${wire_alignment}"
- else
- if test x"$default_alignment" != x; then
- sim_alignment="-DWITH_ALIGNMENT=${default_alignment}"
- else
- echo "No hard-wired alignment for target $target" 1>&6
- sim_alignment="-DWITH_ALIGNMENT=0"
- fi
- fi;;
- no) if test x"$default_alignment" != x; then
- sim_alignment="-DWITH_DEFAULT_ALIGNMENT=${default_alignment}"
- else
- if test x"$wire_alignment" != x; then
- sim_alignment="-DWITH_DEFAULT_ALIGNMENT=${wire_alignment}"
- else
- echo "No default alignment for target $target" 1>&6
- sim_alignment="-DWITH_DEFAULT_ALIGNMENT=0"
- fi
- fi;;
- *) { echo "configure: error: "Unknown value $enableval passed to --enable-sim-alignment"" 1>&2; exit 1; }; sim_alignment="";;
-esac
-if test x"$silent" != x"yes" && test x"$sim_alignment" != x""; then
- echo "Setting alignment flags = $sim_alignment" 6>&1
-fi
-else
- if test x"$default_alignment" != x; then
- sim_alignment="-DWITH_DEFAULT_ALIGNMENT=${default_alignment}"
-else
- if test x"$wire_alignment" != x; then
- sim_alignment="-DWITH_ALIGNMENT=${wire_alignment}"
- else
- sim_alignment=
- fi
-fi
-fi
-
-
-# Check whether --enable-sim-hostendian or --disable-sim-hostendian was given.
-if test "${enable_sim_hostendian+set}" = set; then
- enableval="$enable_sim_hostendian"
- case "${enableval}" in
- no) sim_hostendian="-DWITH_HOST_BYTE_ORDER=0";;
- b*|B*) sim_hostendian="-DWITH_HOST_BYTE_ORDER=BIG_ENDIAN";;
- l*|L*) sim_hostendian="-DWITH_HOST_BYTE_ORDER=LITTLE_ENDIAN";;
- *) { echo "configure: error: "Unknown value $enableval for --enable-sim-hostendian"" 1>&2; exit 1; }; sim_hostendian="";;
-esac
-if test x"$silent" != x"yes" && test x"$sim_hostendian" != x""; then
- echo "Setting hostendian flags = $sim_hostendian" 6>&1
-fi
-else
-
-if test "x$cross_compiling" = "xno"; then
- echo $ac_n "checking whether byte ordering is bigendian""... $ac_c" 1>&6
-echo "configure:3619: checking whether byte ordering is bigendian" >&5
-if eval "test \"`echo '$''{'ac_cv_c_bigendian'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- ac_cv_c_bigendian=unknown
-# See if sys/param.h defines the BYTE_ORDER macro.
-cat > conftest.$ac_ext <<EOF
-#line 3626 "configure"
-#include "confdefs.h"
-#include <sys/types.h>
-#include <sys/param.h>
-int main() {
-
-#if !BYTE_ORDER || !BIG_ENDIAN || !LITTLE_ENDIAN
- bogus endian macros
-#endif
-; return 0; }
-EOF
-if { (eval echo configure:3637: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
- rm -rf conftest*
- # It does; now see whether it defined to BIG_ENDIAN or not.
-cat > conftest.$ac_ext <<EOF
-#line 3641 "configure"
-#include "confdefs.h"
-#include <sys/types.h>
-#include <sys/param.h>
-int main() {
-
-#if BYTE_ORDER != BIG_ENDIAN
- not big endian
-#endif
-; return 0; }
-EOF
-if { (eval echo configure:3652: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
- rm -rf conftest*
- ac_cv_c_bigendian=yes
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- ac_cv_c_bigendian=no
-fi
-rm -f conftest*
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
-fi
-rm -f conftest*
-if test $ac_cv_c_bigendian = unknown; then
-if test "$cross_compiling" = yes; then
- { echo "configure: error: can not run test program while cross compiling" 1>&2; exit 1; }
-else
- cat > conftest.$ac_ext <<EOF
-#line 3672 "configure"
-#include "confdefs.h"
-main () {
- /* Are we little or big endian? From Harbison&Steele. */
- union
- {
- long l;
- char c[sizeof (long)];
- } u;
- u.l = 1;
- exit (u.c[sizeof (long) - 1] == 1);
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-EOF
-if { (eval echo configure:3685: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null
-then
- ac_cv_c_bigendian=no
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -fr conftest*
- ac_cv_c_bigendian=yes
-fi
-rm -fr conftest*
-fi
-
-fi
-fi
-
-echo "$ac_t""$ac_cv_c_bigendian" 1>&6
-if test $ac_cv_c_bigendian = yes; then
- cat >> confdefs.h <<\EOF
-#define WORDS_BIGENDIAN 1
-EOF
-
-fi
-
- if test $ac_cv_c_bigendian = yes; then
- sim_hostendian="-DWITH_HOST_BYTE_ORDER=BIG_ENDIAN"
- else
- sim_hostendian="-DWITH_HOST_BYTE_ORDER=LITTLE_ENDIAN"
- fi
-else
- sim_hostendian="-DWITH_HOST_BYTE_ORDER=0"
-fi
-fi
-
-
-# Check whether --enable-build-warnings or --disable-build-warnings was given.
-if test "${enable_build_warnings+set}" = set; then
- enableval="$enable_build_warnings"
- build_warnings="-Wall -Wpointer-arith -Wstrict-prototypes -Wmissing-prototypes -Wmissing-declarations"
-case "${enableval}" in
- yes) ;;
- no) build_warnings="-w";;
- ,*) t=`echo "${enableval}" | sed -e "s/,/ /g"`
- build_warnings="${build_warnings} ${t}";;
- *,) t=`echo "${enableval}" | sed -e "s/,/ /g"`
- build_warnings="${t} ${build_warnings}";;
- *) build_warnings=`echo "${enableval}" | sed -e "s/,/ /g"`;;
-esac
-if test x"$silent" != x"yes" && test x"$build_warnings" != x""; then
- echo "Setting warning flags = $build_warnings" 6>&1
-fi
-WARN_CFLAGS=""
-WERROR_CFLAGS=""
-if test "x${build_warnings}" != x -a "x$GCC" = xyes
-then
- # Separate out the -Werror flag as some files just cannot be
- # compiled with it enabled.
- for w in ${build_warnings}; do
- case $w in
- -Werr*) WERROR_CFLAGS=-Werror ;;
- *) WARN_CFLAGS="${WARN_CFLAGS} $w"
- esac
- done
-fi
-else
- build_warnings=""
-fi
-
-
-default_sim_reserved_bits="1"
-# Check whether --enable-sim-reserved-bits or --disable-sim-reserved-bits was given.
-if test "${enable_sim_reserved_bits+set}" = set; then
- enableval="$enable_sim_reserved_bits"
- case "${enableval}" in
- yes) sim_reserved_bits="-DWITH_RESERVED_BITS=1";;
- no) sim_reserved_bits="-DWITH_RESERVED_BITS=0";;
- *) { echo "configure: error: "--enable-sim-reserved-bits does not take a value"" 1>&2; exit 1; }; sim_reserved_bits="";;
-esac
-if test x"$silent" != x"yes" && test x"$sim_reserved_bits" != x""; then
- echo "Setting reserved flags = $sim_reserved_bits" 6>&1
-fi
-else
- sim_reserved_bits="-DWITH_RESERVED_BITS=${default_sim_reserved_bits}"
-fi
-
-wire_word_bitsize="32"
-wire_word_msb="31"
-wire_address_bitsize=""
-wire_cell_bitsize=""
-# Check whether --enable-sim-bitsize or --disable-sim-bitsize was given.
-if test "${enable_sim_bitsize+set}" = set; then
- enableval="$enable_sim_bitsize"
- sim_bitsize=
-case "${enableval}" in
- 64,63 | 64,63,* ) sim_bitsize="-DWITH_TARGET_WORD_BITSIZE=64 -DWITH_TARGET_WORD_MSB=63";;
- 32,31 | 32,31,* ) sim_bitsize="-DWITH_TARGET_WORD_BITSIZE=32 -DWITH_TARGET_WORD_MSB=31";;
- 64,0 | 64,0,* ) sim_bitsize="-DWITH_TARGET_WORD_BITSIZE=32 -DWITH_TARGET_WORD_MSB=0";;
- 32,0 | 64,0,* ) sim_bitsize="-DWITH_TARGET_WORD_BITSIZE=32 -DWITH_TARGET_WORD_MSB=0";;
- 32) if test x"$wire_word_msb" != x -a x"$wire_word_msb" != x0; then
- sim_bitsize="-DWITH_TARGET_WORD_BITSIZE=32 -DWITH_TARGET_WORD_MSB=31"
- else
- sim_bitsize="-DWITH_TARGET_WORD_BITSIZE=32 -DWITH_TARGET_WORD_MSB=0"
- fi ;;
- 64) if test x"$wire_word_msb" != x -a x"$wire_word_msb" != x0; then
- sim_bitsize="-DWITH_TARGET_WORD_BITSIZE=64 -DWITH_TARGET_WORD_MSB=63"
- else
- sim_bitsize="-DWITH_TARGET_WORD_BITSIZE=64 -DWITH_TARGET_WORD_MSB=0"
- fi ;;
- *) { echo "configure: error: "--enable-sim-bitsize was given $enableval. Expected 32 or 64"" 1>&2; exit 1; } ;;
-esac
-# address bitsize
-tmp=`echo "${enableval}" | sed -e "s/^[0-9]*,*[0-9]*,*//"`
-case x"${tmp}" in
- x ) ;;
- x32 | x32,* ) sim_bitsize="${sim_bitsize} -DWITH_TARGET_ADDRESS_BITSIZE=32" ;;
- x64 | x64,* ) sim_bitsize="${sim_bitsize} -DWITH_TARGET_ADDRESS_BITSIZE=64" ;;
- * ) { echo "configure: error: "--enable-sim-bitsize was given address size $enableval. Expected 32 or 64"" 1>&2; exit 1; } ;;
-esac
-# cell bitsize
-tmp=`echo "${enableval}" | sed -e "s/^[0-9]*,*[0-9*]*,*[0-9]*,*//"`
-case x"${tmp}" in
- x ) ;;
- x32 | x32,* ) sim_bitsize="${sim_bitsize} -DWITH_TARGET_CELL_BITSIZE=32" ;;
- x64 | x64,* ) sim_bitsize="${sim_bitsize} -DWITH_TARGET_CELL_BITSIZE=64" ;;
- * ) { echo "configure: error: "--enable-sim-bitsize was given cell size $enableval. Expected 32 or 64"" 1>&2; exit 1; } ;;
-esac
-if test x"$silent" != x"yes" && test x"$sim_bitsize" != x""; then
- echo "Setting bitsize flags = $sim_bitsize" 6>&1
-fi
-else
- sim_bitsize=""
-if test x"$wire_word_bitsize" != x; then
- sim_bitsize="$sim_bitsize -DWITH_TARGET_WORD_BITSIZE=$wire_word_bitsize"
-fi
-if test x"$wire_word_msb" != x; then
- sim_bitsize="$sim_bitsize -DWITH_TARGET_WORD_MSB=$wire_word_msb"
-fi
-if test x"$wire_address_bitsize" != x; then
- sim_bitsize="$sim_bitsize -DWITH_TARGET_ADDRESS_BITSIZE=$wire_address_bitsize"
-fi
-if test x"$wire_cell_bitsize" != x; then
- sim_bitsize="$sim_bitsize -DWITH_TARGET_CELL_BITSIZE=$wire_cell_bitsize"
-fi
-fi
-
-
-for ac_func in time chmod utime fork execve execv chown
-do
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-echo "configure:3833: checking for $ac_func" >&5
-if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 3838 "configure"
-#include "confdefs.h"
-/* System header to define __stub macros and hopefully few prototypes,
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-#include <assert.h>
-/* Override any gcc2 internal prototype to avoid an error. */
-/* We use char because int might match the return type of a gcc2
- builtin and then its argument prototype would still apply. */
-char $ac_func();
-
-int main() {
-
-/* The GNU C library defines this for functions which it implements
- to always fail with ENOSYS. Some functions are actually named
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-#if defined (__stub_$ac_func) || defined (__stub___$ac_func)
-choke me
-#else
-$ac_func();
-#endif
-
-; return 0; }
-EOF
-if { (eval echo configure:3861: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=yes"
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=no"
-fi
-rm -f conftest*
-fi
-
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- echo "$ac_t""yes" 1>&6
- ac_tr_func=HAVE_`echo $ac_func | tr 'abcdefghijklmnopqrstuvwxyz' 'ABCDEFGHIJKLMNOPQRSTUVWXYZ'`
- cat >> confdefs.h <<EOF
-#define $ac_tr_func 1
-EOF
-
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- echo "$ac_t""no" 1>&6
-fi
-done
-
-for ac_hdr in unistd.h stdlib.h string.h strings.h utime.h time.h
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-echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6
-echo "configure:3889: checking for $ac_hdr" >&5
-if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 3894 "configure"
-#include "confdefs.h"
-#include <$ac_hdr>
-EOF
-ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:3899: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
-ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
-if test -z "$ac_err"; then
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=yes"
-else
- echo "$ac_err" >&5
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=no"
-fi
-rm -f conftest*
-fi
-if eval "test \"`echo '$ac_cv_header_'$ac_safe`\" = yes"; then
- echo "$ac_t""yes" 1>&6
- ac_tr_hdr=HAVE_`echo $ac_hdr | sed 'y%abcdefghijklmnopqrstuvwxyz./-%ABCDEFGHIJKLMNOPQRSTUVWXYZ___%'`
- cat >> confdefs.h <<EOF
-#define $ac_tr_hdr 1
-EOF
-
-else
- echo "$ac_t""no" 1>&6
-fi
-done
-
-
-
-
-trap '' 1 2 15
-cat > confcache <<\EOF
-# This file is a shell script that caches the results of configure
-# tests run on this system so they can be shared between configure
-# scripts and configure runs. It is not useful on other systems.
-# If it contains results you don't want to keep, you may remove or edit it.
-#
-# By default, configure uses ./config.cache as the cache file,
-# creating it if it does not exist already. You can give configure
-# the --cache-file=FILE option to use a different cache file; that is
-# what configure does when it calls configure scripts in
-# subdirectories, so they share the cache.
-# Giving --cache-file=/dev/null disables caching, for debugging configure.
-# config.status only pays attention to the cache file if you give it the
-# --recheck option to rerun configure.
-#
-EOF
-# The following way of writing the cache mishandles newlines in values,
-# but we know of no workaround that is simple, portable, and efficient.
-# So, don't put newlines in cache variables' values.
-# Ultrix sh set writes to stderr and can't be redirected directly,
-# and sets the high bit in the cache file unless we assign to the vars.
-(set) 2>&1 |
- case `(ac_space=' '; set | grep ac_space) 2>&1` in
- *ac_space=\ *)
- # `set' does not quote correctly, so add quotes (double-quote substitution
- # turns \\\\ into \\, and sed turns \\ into \).
- sed -n \
- -e "s/'/'\\\\''/g" \
- -e "s/^\\([a-zA-Z0-9_]*_cv_[a-zA-Z0-9_]*\\)=\\(.*\\)/\\1=\${\\1='\\2'}/p"
- ;;
- *)
- # `set' quotes correctly as required by POSIX, so do not add quotes.
- sed -n -e 's/^\([a-zA-Z0-9_]*_cv_[a-zA-Z0-9_]*\)=\(.*\)/\1=${\1=\2}/p'
- ;;
- esac >> confcache
-if cmp -s $cache_file confcache; then
- :
-else
- if test -w $cache_file; then
- echo "updating cache $cache_file"
- cat confcache > $cache_file
- else
- echo "not updating unwritable cache $cache_file"
- fi
-fi
-rm -f confcache
-
-trap 'rm -fr conftest* confdefs* core core.* *.core $ac_clean_files; exit 1' 1 2 15
-
-test "x$prefix" = xNONE && prefix=$ac_default_prefix
-# Let make expand exec_prefix.
-test "x$exec_prefix" = xNONE && exec_prefix='${prefix}'
-
-# Any assignment to VPATH causes Sun make to only execute
-# the first set of double-colon rules, so remove it if not needed.
-# If there is a colon in the path, we need to keep it.
-if test "x$srcdir" = x.; then
- ac_vpsub='/^[ ]*VPATH[ ]*=[^:]*$/d'
-fi
-
-trap 'rm -f $CONFIG_STATUS conftest*; exit 1' 1 2 15
-
-DEFS=-DHAVE_CONFIG_H
-
-# Without the "./", some shells look in PATH for config.status.
-: ${CONFIG_STATUS=./config.status}
-
-echo creating $CONFIG_STATUS
-rm -f $CONFIG_STATUS
-cat > $CONFIG_STATUS <<EOF
-#! /bin/sh
-# Generated automatically by configure.
-# Run this file to recreate the current configuration.
-# This directory was configured as follows,
-# on host `(hostname || uname -n) 2>/dev/null | sed 1q`:
-#
-# $0 $ac_configure_args
-#
-# Compiler output produced by configure, useful for debugging
-# configure, is in ./config.log if it exists.
-
-ac_cs_usage="Usage: $CONFIG_STATUS [--recheck] [--version] [--help]"
-for ac_option
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- case "\$ac_option" in
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- echo "running \${CONFIG_SHELL-/bin/sh} $0 $ac_configure_args --no-create --no-recursion"
- exec \${CONFIG_SHELL-/bin/sh} $0 $ac_configure_args --no-create --no-recursion ;;
- -version | --version | --versio | --versi | --vers | --ver | --ve | --v)
- echo "$CONFIG_STATUS generated by autoconf version 2.13"
- exit 0 ;;
- -help | --help | --hel | --he | --h)
- echo "\$ac_cs_usage"; exit 0 ;;
- *) echo "\$ac_cs_usage"; exit 1 ;;
- esac
-done
-
-ac_given_srcdir=$srcdir
-ac_given_INSTALL="$INSTALL"
-
-trap 'rm -fr `echo "Makefile.sim:Makefile.in Make-common.sim:../common/Make-common.in .gdbinit:../common/gdbinit.in config.h:config.in" | sed "s/:[^ ]*//g"` conftest*; exit 1' 1 2 15
-EOF
-cat >> $CONFIG_STATUS <<EOF
-
-# Protect against being on the right side of a sed subst in config.status.
-sed 's/%@/@@/; s/@%/@@/; s/%g\$/@g/; /@g\$/s/[\\\\&%]/\\\\&/g;
- s/@@/%@/; s/@@/@%/; s/@g\$/%g/' > conftest.subs <<\\CEOF
-$ac_vpsub
-$extrasub
-s%@sim_environment@%$sim_environment%g
-s%@sim_alignment@%$sim_alignment%g
-s%@sim_assert@%$sim_assert%g
-s%@sim_bitsize@%$sim_bitsize%g
-s%@sim_endian@%$sim_endian%g
-s%@sim_hostendian@%$sim_hostendian%g
-s%@sim_float@%$sim_float%g
-s%@sim_scache@%$sim_scache%g
-s%@sim_default_model@%$sim_default_model%g
-s%@sim_hw_cflags@%$sim_hw_cflags%g
-s%@sim_hw_objs@%$sim_hw_objs%g
-s%@sim_hw@%$sim_hw%g
-s%@sim_inline@%$sim_inline%g
-s%@sim_packages@%$sim_packages%g
-s%@sim_regparm@%$sim_regparm%g
-s%@sim_reserved_bits@%$sim_reserved_bits%g
-s%@sim_smp@%$sim_smp%g
-s%@sim_stdcall@%$sim_stdcall%g
-s%@sim_xor_endian@%$sim_xor_endian%g
-s%@WARN_CFLAGS@%$WARN_CFLAGS%g
-s%@WERROR_CFLAGS@%$WERROR_CFLAGS%g
-s%@SHELL@%$SHELL%g
-s%@CFLAGS@%$CFLAGS%g
-s%@CPPFLAGS@%$CPPFLAGS%g
-s%@CXXFLAGS@%$CXXFLAGS%g
-s%@FFLAGS@%$FFLAGS%g
-s%@DEFS@%$DEFS%g
-s%@LDFLAGS@%$LDFLAGS%g
-s%@LIBS@%$LIBS%g
-s%@exec_prefix@%$exec_prefix%g
-s%@prefix@%$prefix%g
-s%@program_transform_name@%$program_transform_name%g
-s%@bindir@%$bindir%g
-s%@sbindir@%$sbindir%g
-s%@libexecdir@%$libexecdir%g
-s%@datadir@%$datadir%g
-s%@sysconfdir@%$sysconfdir%g
-s%@sharedstatedir@%$sharedstatedir%g
-s%@localstatedir@%$localstatedir%g
-s%@libdir@%$libdir%g
-s%@includedir@%$includedir%g
-s%@oldincludedir@%$oldincludedir%g
-s%@infodir@%$infodir%g
-s%@mandir@%$mandir%g
-s%@host@%$host%g
-s%@host_alias@%$host_alias%g
-s%@host_cpu@%$host_cpu%g
-s%@host_vendor@%$host_vendor%g
-s%@host_os@%$host_os%g
-s%@target@%$target%g
-s%@target_alias@%$target_alias%g
-s%@target_cpu@%$target_cpu%g
-s%@target_vendor@%$target_vendor%g
-s%@target_os@%$target_os%g
-s%@build@%$build%g
-s%@build_alias@%$build_alias%g
-s%@build_cpu@%$build_cpu%g
-s%@build_vendor@%$build_vendor%g
-s%@build_os@%$build_os%g
-s%@CC@%$CC%g
-s%@INSTALL_PROGRAM@%$INSTALL_PROGRAM%g
-s%@INSTALL_SCRIPT@%$INSTALL_SCRIPT%g
-s%@INSTALL_DATA@%$INSTALL_DATA%g
-s%@CC_FOR_BUILD@%$CC_FOR_BUILD%g
-s%@HDEFINES@%$HDEFINES%g
-s%@AR@%$AR%g
-s%@RANLIB@%$RANLIB%g
-s%@SET_MAKE@%$SET_MAKE%g
-s%@CPP@%$CPP%g
-s%@ALLOCA@%$ALLOCA%g
-s%@USE_NLS@%$USE_NLS%g
-s%@MSGFMT@%$MSGFMT%g
-s%@GMSGFMT@%$GMSGFMT%g
-s%@XGETTEXT@%$XGETTEXT%g
-s%@USE_INCLUDED_LIBINTL@%$USE_INCLUDED_LIBINTL%g
-s%@CATALOGS@%$CATALOGS%g
-s%@CATOBJEXT@%$CATOBJEXT%g
-s%@DATADIRNAME@%$DATADIRNAME%g
-s%@GMOFILES@%$GMOFILES%g
-s%@INSTOBJEXT@%$INSTOBJEXT%g
-s%@INTLDEPS@%$INTLDEPS%g
-s%@INTLLIBS@%$INTLLIBS%g
-s%@INTLOBJS@%$INTLOBJS%g
-s%@POFILES@%$POFILES%g
-s%@POSUB@%$POSUB%g
-s%@INCLUDE_LOCALE_H@%$INCLUDE_LOCALE_H%g
-s%@GT_NO@%$GT_NO%g
-s%@GT_YES@%$GT_YES%g
-s%@MKINSTALLDIRS@%$MKINSTALLDIRS%g
-s%@l@%$l%g
-s%@MAINT@%$MAINT%g
-s%@sim_bswap@%$sim_bswap%g
-s%@sim_cflags@%$sim_cflags%g
-s%@sim_debug@%$sim_debug%g
-s%@sim_stdio@%$sim_stdio%g
-s%@sim_trace@%$sim_trace%g
-s%@sim_profile@%$sim_profile%g
-s%@EXEEXT@%$EXEEXT%g
-
-CEOF
-EOF
-
-cat >> $CONFIG_STATUS <<\EOF
-
-# Split the substitutions into bite-sized pieces for seds with
-# small command number limits, like on Digital OSF/1 and HP-UX.
-ac_max_sed_cmds=90 # Maximum number of lines to put in a sed script.
-ac_file=1 # Number of current file.
-ac_beg=1 # First line for current file.
-ac_end=$ac_max_sed_cmds # Line after last line for current file.
-ac_more_lines=:
-ac_sed_cmds=""
-while $ac_more_lines; do
- if test $ac_beg -gt 1; then
- sed "1,${ac_beg}d; ${ac_end}q" conftest.subs > conftest.s$ac_file
- else
- sed "${ac_end}q" conftest.subs > conftest.s$ac_file
- fi
- if test ! -s conftest.s$ac_file; then
- ac_more_lines=false
- rm -f conftest.s$ac_file
- else
- if test -z "$ac_sed_cmds"; then
- ac_sed_cmds="sed -f conftest.s$ac_file"
- else
- ac_sed_cmds="$ac_sed_cmds | sed -f conftest.s$ac_file"
- fi
- ac_file=`expr $ac_file + 1`
- ac_beg=$ac_end
- ac_end=`expr $ac_end + $ac_max_sed_cmds`
- fi
-done
-if test -z "$ac_sed_cmds"; then
- ac_sed_cmds=cat
-fi
-EOF
-
-cat >> $CONFIG_STATUS <<EOF
-
-CONFIG_FILES=\${CONFIG_FILES-"Makefile.sim:Makefile.in Make-common.sim:../common/Make-common.in .gdbinit:../common/gdbinit.in"}
-EOF
-cat >> $CONFIG_STATUS <<\EOF
-for ac_file in .. $CONFIG_FILES; do if test "x$ac_file" != x..; then
- # Support "outfile[:infile[:infile...]]", defaulting infile="outfile.in".
- case "$ac_file" in
- *:*) ac_file_in=`echo "$ac_file"|sed 's%[^:]*:%%'`
- ac_file=`echo "$ac_file"|sed 's%:.*%%'` ;;
- *) ac_file_in="${ac_file}.in" ;;
- esac
-
- # Adjust a relative srcdir, top_srcdir, and INSTALL for subdirectories.
-
- # Remove last slash and all that follows it. Not all systems have dirname.
- ac_dir=`echo $ac_file|sed 's%/[^/][^/]*$%%'`
- if test "$ac_dir" != "$ac_file" && test "$ac_dir" != .; then
- # The file is in a subdirectory.
- test ! -d "$ac_dir" && mkdir "$ac_dir"
- ac_dir_suffix="/`echo $ac_dir|sed 's%^\./%%'`"
- # A "../" for each directory in $ac_dir_suffix.
- ac_dots=`echo $ac_dir_suffix|sed 's%/[^/]*%../%g'`
- else
- ac_dir_suffix= ac_dots=
- fi
-
- case "$ac_given_srcdir" in
- .) srcdir=.
- if test -z "$ac_dots"; then top_srcdir=.
- else top_srcdir=`echo $ac_dots|sed 's%/$%%'`; fi ;;
- /*) srcdir="$ac_given_srcdir$ac_dir_suffix"; top_srcdir="$ac_given_srcdir" ;;
- *) # Relative path.
- srcdir="$ac_dots$ac_given_srcdir$ac_dir_suffix"
- top_srcdir="$ac_dots$ac_given_srcdir" ;;
- esac
-
- case "$ac_given_INSTALL" in
- [/$]*) INSTALL="$ac_given_INSTALL" ;;
- *) INSTALL="$ac_dots$ac_given_INSTALL" ;;
- esac
-
- echo creating "$ac_file"
- rm -f "$ac_file"
- configure_input="Generated automatically from `echo $ac_file_in|sed 's%.*/%%'` by configure."
- case "$ac_file" in
- *Makefile*) ac_comsub="1i\\
-# $configure_input" ;;
- *) ac_comsub= ;;
- esac
-
- ac_file_inputs=`echo $ac_file_in|sed -e "s%^%$ac_given_srcdir/%" -e "s%:% $ac_given_srcdir/%g"`
- sed -e "$ac_comsub
-s%@configure_input@%$configure_input%g
-s%@srcdir@%$srcdir%g
-s%@top_srcdir@%$top_srcdir%g
-s%@INSTALL@%$INSTALL%g
-" $ac_file_inputs | (eval "$ac_sed_cmds") > $ac_file
-fi; done
-rm -f conftest.s*
-
-# These sed commands are passed to sed as "A NAME B NAME C VALUE D", where
-# NAME is the cpp macro being defined and VALUE is the value it is being given.
-#
-# ac_d sets the value in "#define NAME VALUE" lines.
-ac_dA='s%^\([ ]*\)#\([ ]*define[ ][ ]*\)'
-ac_dB='\([ ][ ]*\)[^ ]*%\1#\2'
-ac_dC='\3'
-ac_dD='%g'
-# ac_u turns "#undef NAME" with trailing blanks into "#define NAME VALUE".
-ac_uA='s%^\([ ]*\)#\([ ]*\)undef\([ ][ ]*\)'
-ac_uB='\([ ]\)%\1#\2define\3'
-ac_uC=' '
-ac_uD='\4%g'
-# ac_e turns "#undef NAME" without trailing blanks into "#define NAME VALUE".
-ac_eA='s%^\([ ]*\)#\([ ]*\)undef\([ ][ ]*\)'
-ac_eB='$%\1#\2define\3'
-ac_eC=' '
-ac_eD='%g'
-
-if test "${CONFIG_HEADERS+set}" != set; then
-EOF
-cat >> $CONFIG_STATUS <<EOF
- CONFIG_HEADERS="config.h:config.in"
-EOF
-cat >> $CONFIG_STATUS <<\EOF
-fi
-for ac_file in .. $CONFIG_HEADERS; do if test "x$ac_file" != x..; then
- # Support "outfile[:infile[:infile...]]", defaulting infile="outfile.in".
- case "$ac_file" in
- *:*) ac_file_in=`echo "$ac_file"|sed 's%[^:]*:%%'`
- ac_file=`echo "$ac_file"|sed 's%:.*%%'` ;;
- *) ac_file_in="${ac_file}.in" ;;
- esac
-
- echo creating $ac_file
-
- rm -f conftest.frag conftest.in conftest.out
- ac_file_inputs=`echo $ac_file_in|sed -e "s%^%$ac_given_srcdir/%" -e "s%:% $ac_given_srcdir/%g"`
- cat $ac_file_inputs > conftest.in
-
-EOF
-
-# Transform confdefs.h into a sed script conftest.vals that substitutes
-# the proper values into config.h.in to produce config.h. And first:
-# Protect against being on the right side of a sed subst in config.status.
-# Protect against being in an unquoted here document in config.status.
-rm -f conftest.vals
-cat > conftest.hdr <<\EOF
-s/[\\&%]/\\&/g
-s%[\\$`]%\\&%g
-s%#define \([A-Za-z_][A-Za-z0-9_]*\) *\(.*\)%${ac_dA}\1${ac_dB}\1${ac_dC}\2${ac_dD}%gp
-s%ac_d%ac_u%gp
-s%ac_u%ac_e%gp
-EOF
-sed -n -f conftest.hdr confdefs.h > conftest.vals
-rm -f conftest.hdr
-
-# This sed command replaces #undef with comments. This is necessary, for
-# example, in the case of _POSIX_SOURCE, which is predefined and required
-# on some systems where configure will not decide to define it.
-cat >> conftest.vals <<\EOF
-s%^[ ]*#[ ]*undef[ ][ ]*[a-zA-Z_][a-zA-Z_0-9]*%/* & */%
-EOF
-
-# Break up conftest.vals because some shells have a limit on
-# the size of here documents, and old seds have small limits too.
-
-rm -f conftest.tail
-while :
-do
- ac_lines=`grep -c . conftest.vals`
- # grep -c gives empty output for an empty file on some AIX systems.
- if test -z "$ac_lines" || test "$ac_lines" -eq 0; then break; fi
- # Write a limited-size here document to conftest.frag.
- echo ' cat > conftest.frag <<CEOF' >> $CONFIG_STATUS
- sed ${ac_max_here_lines}q conftest.vals >> $CONFIG_STATUS
- echo 'CEOF
- sed -f conftest.frag conftest.in > conftest.out
- rm -f conftest.in
- mv conftest.out conftest.in
-' >> $CONFIG_STATUS
- sed 1,${ac_max_here_lines}d conftest.vals > conftest.tail
- rm -f conftest.vals
- mv conftest.tail conftest.vals
-done
-rm -f conftest.vals
-
-cat >> $CONFIG_STATUS <<\EOF
- rm -f conftest.frag conftest.h
- echo "/* $ac_file. Generated automatically by configure. */" > conftest.h
- cat conftest.in >> conftest.h
- rm -f conftest.in
- if cmp -s $ac_file conftest.h 2>/dev/null; then
- echo "$ac_file is unchanged"
- rm -f conftest.h
- else
- # Remove last slash and all that follows it. Not all systems have dirname.
- ac_dir=`echo $ac_file|sed 's%/[^/][^/]*$%%'`
- if test "$ac_dir" != "$ac_file" && test "$ac_dir" != .; then
- # The file is in a subdirectory.
- test ! -d "$ac_dir" && mkdir "$ac_dir"
- fi
- rm -f $ac_file
- mv conftest.h $ac_file
- fi
-fi; done
-
-EOF
-
-cat >> $CONFIG_STATUS <<EOF
-ac_sources="$sim_link_files"
-ac_dests="$sim_link_links"
-EOF
-
-cat >> $CONFIG_STATUS <<\EOF
-srcdir=$ac_given_srcdir
-while test -n "$ac_sources"; do
- set $ac_dests; ac_dest=$1; shift; ac_dests=$*
- set $ac_sources; ac_source=$1; shift; ac_sources=$*
-
- echo "linking $srcdir/$ac_source to $ac_dest"
-
- if test ! -r $srcdir/$ac_source; then
- { echo "configure: error: $srcdir/$ac_source: File not found" 1>&2; exit 1; }
- fi
- rm -f $ac_dest
-
- # Make relative symlinks.
- # Remove last slash and all that follows it. Not all systems have dirname.
- ac_dest_dir=`echo $ac_dest|sed 's%/[^/][^/]*$%%'`
- if test "$ac_dest_dir" != "$ac_dest" && test "$ac_dest_dir" != .; then
- # The dest file is in a subdirectory.
- test ! -d "$ac_dest_dir" && mkdir "$ac_dest_dir"
- ac_dest_dir_suffix="/`echo $ac_dest_dir|sed 's%^\./%%'`"
- # A "../" for each directory in $ac_dest_dir_suffix.
- ac_dots=`echo $ac_dest_dir_suffix|sed 's%/[^/]*%../%g'`
- else
- ac_dest_dir_suffix= ac_dots=
- fi
-
- case "$srcdir" in
- [/$]*) ac_rel_source="$srcdir/$ac_source" ;;
- *) ac_rel_source="$ac_dots$srcdir/$ac_source" ;;
- esac
-
- # Make a symlink if possible; otherwise try a hard link.
- if ln -s $ac_rel_source $ac_dest 2>/dev/null ||
- ln $srcdir/$ac_source $ac_dest; then :
- else
- { echo "configure: error: can not link $ac_dest to $srcdir/$ac_source" 1>&2; exit 1; }
- fi
-done
-EOF
-cat >> $CONFIG_STATUS <<EOF
-
-EOF
-cat >> $CONFIG_STATUS <<\EOF
-case "x$CONFIG_FILES" in
- xMakefile*)
- echo "Merging Makefile.sim+Make-common.sim into Makefile ..."
- rm -f Makesim1.tmp Makesim2.tmp Makefile
- sed -n -e '/^## COMMON_PRE_/,/^## End COMMON_PRE_/ p' <Make-common.sim >Makesim1.tmp
- sed -n -e '/^## COMMON_POST_/,/^## End COMMON_POST_/ p' <Make-common.sim >Makesim2.tmp
- sed -e '/^## COMMON_PRE_/ r Makesim1.tmp' \
- -e '/^## COMMON_POST_/ r Makesim2.tmp' \
- <Makefile.sim >Makefile
- rm -f Makefile.sim Make-common.sim Makesim1.tmp Makesim2.tmp
- ;;
- esac
- case "x$CONFIG_HEADERS" in xconfig.h:config.in) echo > stamp-h ;; esac
-
-exit 0
-EOF
-chmod +x $CONFIG_STATUS
-rm -fr confdefs* $ac_clean_files
-test "$no_create" = yes || ${CONFIG_SHELL-/bin/sh} $CONFIG_STATUS || exit 1
-
-
diff --git a/sim/v850/configure.in b/sim/v850/configure.in
deleted file mode 100644
index 03e892df1f4..00000000000
--- a/sim/v850/configure.in
+++ /dev/null
@@ -1,18 +0,0 @@
-dnl Process this file with autoconf to produce a configure script.
-sinclude(../common/aclocal.m4)
-AC_PREREQ(2.5)dnl
-AC_INIT(Makefile.in)
-
-SIM_AC_COMMON
-
-SIM_AC_OPTION_ENDIAN(LITTLE_ENDIAN)
-SIM_AC_OPTION_ALIGNMENT(,NONSTRICT_ALIGNMENT)
-SIM_AC_OPTION_HOSTENDIAN
-SIM_AC_OPTION_WARNINGS
-SIM_AC_OPTION_RESERVED_BITS
-SIM_AC_OPTION_BITSIZE(32,31)
-
-AC_CHECK_FUNCS(time chmod utime fork execve execv chown)
-AC_CHECK_HEADERS(unistd.h stdlib.h string.h strings.h utime.h time.h)
-
-SIM_AC_OUTPUT
diff --git a/sim/v850/gencode.c b/sim/v850/gencode.c
deleted file mode 100644
index 05ce8666b68..00000000000
--- a/sim/v850/gencode.c
+++ /dev/null
@@ -1,149 +0,0 @@
-#include <stdio.h>
-#include <ctype.h>
-#include "ansidecl.h"
-#include "opcode/v850.h"
-#include <limits.h>
-
-static void write_header PARAMS ((void));
-static void write_opcodes PARAMS ((void));
-static void write_template PARAMS ((void));
-
-long Opcodes[512];
-static int curop=0;
-
-int
-main (argc, argv)
- int argc;
- char *argv[];
-{
- if ((argc > 1) && (strcmp (argv[1], "-h") == 0))
- write_header();
- else if ((argc > 1) && (strcmp (argv[1], "-t") == 0))
- write_template ();
- else
- write_opcodes();
- return 0;
-}
-
-
-static void
-write_header ()
-{
- struct v850_opcode *opcode;
-
- for (opcode = (struct v850_opcode *)v850_opcodes; opcode->name; opcode++)
- printf("int OP_%X PARAMS ((void));\t\t/* %s */\n",
- opcode->opcode, opcode->name);
-}
-
-
-/* write_template creates a file all required functions, ready */
-/* to be filled out */
-
-static void
-write_template ()
-{
- struct v850_opcode *opcode;
- int i,j;
-
- printf ("#include \"sim-main.h\"\n");
- printf ("#include \"v850_sim.h\"\n");
- printf ("#include \"simops.h\"\n");
-
- for (opcode = (struct v850_opcode *)v850_opcodes; opcode->name; opcode++)
- {
- printf("/* %s */\nvoid\nOP_%X (void)\n{\n", opcode->name, opcode->opcode);
-
- /* count operands */
- j = 0;
- for (i = 0; i < 6; i++)
- {
- int flags = v850_operands[opcode->operands[i]].flags;
-
- if (flags & (V850_OPERAND_REG | V850_OPERAND_SRG | V850_OPERAND_CC))
- j++;
- }
- switch (j)
- {
- case 0:
- printf ("printf(\" %s\\n\");\n", opcode->name);
- break;
- case 1:
- printf ("printf(\" %s\\t%%x\\n\", OP[0]);\n", opcode->name);
- break;
- case 2:
- printf ("printf(\" %s\\t%%x,%%x\\n\",OP[0],OP[1]);\n",
- opcode->name);
- break;
- case 3:
- printf ("printf(\" %s\\t%%x,%%x,%%x\\n\",OP[0],OP[1],OP[2]);\n",
- opcode->name);
- break;
- default:
- fprintf (stderr,"Too many operands: %d\n", j);
- }
- printf ("}\n\n");
- }
-}
-
-static void
-write_opcodes ()
-{
- struct v850_opcode *opcode;
- int i, j;
- int numops;
-
- /* write out opcode table */
- printf ("#include \"sim-main.h\"\n");
- printf ("#include \"v850_sim.h\"\n");
- printf ("#include \"simops.h\"\n\n");
- printf ("struct simops Simops[] = {\n");
-
- for (opcode = (struct v850_opcode *)v850_opcodes; opcode->name; opcode++)
- {
- printf (" { 0x%x,0x%x,OP_%X,",
- opcode->opcode, opcode->mask, opcode->opcode);
-
- Opcodes[curop++] = opcode->opcode;
-
- /* count operands */
- j = 0;
- for (i = 0; i < 6; i++)
- {
- int flags = v850_operands[opcode->operands[i]].flags;
-
- if (flags & (V850_OPERAND_REG | V850_OPERAND_SRG | V850_OPERAND_CC))
- j++;
- }
- printf ("%d,{",j);
-
- j = 0;
- numops = 0;
- for (i = 0; i < 6; i++)
- {
- int flags = v850_operands[opcode->operands[i]].flags;
- int shift = v850_operands[opcode->operands[i]].shift;
-
- if (flags & (V850_OPERAND_REG | V850_OPERAND_SRG | V850_OPERAND_CC))
- {
- if (j)
- printf (", ");
- printf ("%d,%d,%d", shift,
- v850_operands[opcode->operands[i]].bits,flags);
- j = 1;
- numops++;
- }
- }
-
- switch (numops)
- {
- case 0:
- printf ("0,0,0");
- case 1:
- printf (",0,0,0");
- }
-
- printf ("}},\n");
- }
- printf ("{ 0,0,NULL,0,{0,0,0,0,0,0}},\n};\n");
-}
diff --git a/sim/v850/interp.c b/sim/v850/interp.c
deleted file mode 100644
index 0ce5e3aa905..00000000000
--- a/sim/v850/interp.c
+++ /dev/null
@@ -1,360 +0,0 @@
-#include "sim-main.h"
-#include "sim-options.h"
-#include "v850_sim.h"
-#include "sim-assert.h"
-#include "itable.h"
-
-#ifdef HAVE_STDLIB_H
-#include <stdlib.h>
-#endif
-
-#ifdef HAVE_STRING_H
-#include <string.h>
-#else
-#ifdef HAVE_STRINGS_H
-#include <strings.h>
-#endif
-#endif
-
-#include "bfd.h"
-
-#ifndef INLINE
-#ifdef __GNUC__
-#define INLINE inline
-#else
-#define INLINE
-#endif
-#endif
-
-static const char * get_insn_name (sim_cpu *, int);
-
-/* For compatibility */
-SIM_DESC simulator;
-
-
-
-/* v850 interrupt model */
-
-enum interrupt_type
-{
- int_reset,
- int_nmi,
- int_intov1,
- int_intp10,
- int_intp11,
- int_intp12,
- int_intp13,
- int_intcm4,
- num_int_types
-};
-
-char *interrupt_names[] = {
- "reset",
- "nmi",
- "intov1",
- "intp10",
- "intp11",
- "intp12",
- "intp13",
- "intcm4",
- NULL
-};
-
-static void
-do_interrupt (sd, data)
- SIM_DESC sd;
- void *data;
-{
- char **interrupt_name = (char**)data;
- enum interrupt_type inttype;
- inttype = (interrupt_name - STATE_WATCHPOINTS (sd)->interrupt_names);
-
- /* For a hardware reset, drop everything and jump to the start
- address */
- if (inttype == int_reset)
- {
- PC = 0;
- PSW = 0x20;
- ECR = 0;
- sim_engine_restart (sd, NULL, NULL, NULL_CIA);
- }
-
- /* Deliver an NMI when allowed */
- if (inttype == int_nmi)
- {
- if (PSW & PSW_NP)
- {
- /* We're already working on an NMI, so this one must wait
- around until the previous one is done. The processor
- ignores subsequent NMIs, so we don't need to count them.
- Just keep re-scheduling a single NMI until it manages to
- be delivered */
- if (STATE_CPU (sd, 0)->pending_nmi != NULL)
- sim_events_deschedule (sd, STATE_CPU (sd, 0)->pending_nmi);
- STATE_CPU (sd, 0)->pending_nmi =
- sim_events_schedule (sd, 1, do_interrupt, data);
- return;
- }
- else
- {
- /* NMI can be delivered. Do not deschedule pending_nmi as
- that, if still in the event queue, is a second NMI that
- needs to be delivered later. */
- FEPC = PC;
- FEPSW = PSW;
- /* Set the FECC part of the ECR. */
- ECR &= 0x0000ffff;
- ECR |= 0x10;
- PSW |= PSW_NP;
- PSW &= ~PSW_EP;
- PSW |= PSW_ID;
- PC = 0x10;
- sim_engine_restart (sd, NULL, NULL, NULL_CIA);
- }
- }
-
- /* deliver maskable interrupt when allowed */
- if (inttype > int_nmi && inttype < num_int_types)
- {
- if ((PSW & PSW_NP) || (PSW & PSW_ID))
- {
- /* Can't deliver this interrupt, reschedule it for later */
- sim_events_schedule (sd, 1, do_interrupt, data);
- return;
- }
- else
- {
- /* save context */
- EIPC = PC;
- EIPSW = PSW;
- /* Disable further interrupts. */
- PSW |= PSW_ID;
- /* Indicate that we're doing interrupt not exception processing. */
- PSW &= ~PSW_EP;
- /* Clear the EICC part of the ECR, will set below. */
- ECR &= 0xffff0000;
- switch (inttype)
- {
- case int_intov1:
- PC = 0x80;
- ECR |= 0x80;
- break;
- case int_intp10:
- PC = 0x90;
- ECR |= 0x90;
- break;
- case int_intp11:
- PC = 0xa0;
- ECR |= 0xa0;
- break;
- case int_intp12:
- PC = 0xb0;
- ECR |= 0xb0;
- break;
- case int_intp13:
- PC = 0xc0;
- ECR |= 0xc0;
- break;
- case int_intcm4:
- PC = 0xd0;
- ECR |= 0xd0;
- break;
- default:
- /* Should never be possible. */
- sim_engine_abort (sd, NULL, NULL_CIA,
- "do_interrupt - internal error - bad switch");
- break;
- }
- }
- sim_engine_restart (sd, NULL, NULL, NULL_CIA);
- }
-
- /* some other interrupt? */
- sim_engine_abort (sd, NULL, NULL_CIA,
- "do_interrupt - internal error - interrupt %d unknown",
- inttype);
-}
-
-/* Return name of an insn, used by insn profiling. */
-
-static const char *
-get_insn_name (sim_cpu *cpu, int i)
-{
- return itable[i].name;
-}
-
-/* These default values correspond to expected usage for the chip. */
-
-uint32 OP[4];
-
-
-SIM_DESC
-sim_open (kind, cb, abfd, argv)
- SIM_OPEN_KIND kind;
- host_callback *cb;
- struct _bfd *abfd;
- char **argv;
-{
- SIM_DESC sd = sim_state_alloc (kind, cb);
- int mach;
-
- SIM_ASSERT (STATE_MAGIC (sd) == SIM_MAGIC_NUMBER);
-
- /* for compatibility */
- simulator = sd;
-
- /* FIXME: should be better way of setting up interrupts */
- STATE_WATCHPOINTS (sd)->pc = &(PC);
- STATE_WATCHPOINTS (sd)->sizeof_pc = sizeof (PC);
- STATE_WATCHPOINTS (sd)->interrupt_handler = do_interrupt;
- STATE_WATCHPOINTS (sd)->interrupt_names = interrupt_names;
-
- /* Initialize the mechanism for doing insn profiling. */
- CPU_INSN_NAME (STATE_CPU (sd, 0)) = get_insn_name;
- CPU_MAX_INSNS (STATE_CPU (sd, 0)) = nr_itable_entries;
-
- if (sim_pre_argv_init (sd, argv[0]) != SIM_RC_OK)
- return 0;
-
- /* Allocate core managed memory */
-
- /* "Mirror" the ROM addresses below 1MB. */
- sim_do_commandf (sd, "memory region 0,0x100000,0x%lx", V850_ROM_SIZE);
- /* Chunk of ram adjacent to rom */
- sim_do_commandf (sd, "memory region 0x100000,0x%lx", V850_LOW_END-0x100000);
- /* peripheral I/O region - mirror 1K across 4k (0x1000) */
- sim_do_command (sd, "memory region 0xfff000,0x1000,1024");
- /* similarly if in the internal RAM region */
- sim_do_command (sd, "memory region 0xffe000,0x1000,1024");
-
- /* getopt will print the error message so we just have to exit if this fails.
- FIXME: Hmmm... in the case of gdb we need getopt to call
- print_filtered. */
- if (sim_parse_args (sd, argv) != SIM_RC_OK)
- {
- /* Uninstall the modules to avoid memory leaks,
- file descriptor leaks, etc. */
- sim_module_uninstall (sd);
- return 0;
- }
-
- /* check for/establish the a reference program image */
- if (sim_analyze_program (sd,
- (STATE_PROG_ARGV (sd) != NULL
- ? *STATE_PROG_ARGV (sd)
- : NULL),
- abfd) != SIM_RC_OK)
- {
- sim_module_uninstall (sd);
- return 0;
- }
-
- /* establish any remaining configuration options */
- if (sim_config (sd) != SIM_RC_OK)
- {
- sim_module_uninstall (sd);
- return 0;
- }
-
- if (sim_post_argv_init (sd) != SIM_RC_OK)
- {
- /* Uninstall the modules to avoid memory leaks,
- file descriptor leaks, etc. */
- sim_module_uninstall (sd);
- return 0;
- }
-
-
- /* determine the machine type */
- if (STATE_ARCHITECTURE (sd) != NULL
- && STATE_ARCHITECTURE (sd)->arch == bfd_arch_v850)
- mach = STATE_ARCHITECTURE (sd)->mach;
- else
- mach = bfd_mach_v850; /* default */
-
- /* set machine specific configuration */
- switch (mach)
- {
- case bfd_mach_v850:
- case bfd_mach_v850e:
- STATE_CPU (sd, 0)->psw_mask = (PSW_NP | PSW_EP | PSW_ID | PSW_SAT
- | PSW_CY | PSW_OV | PSW_S | PSW_Z);
- break;
- case bfd_mach_v850ea:
- PSW |= PSW_US;
- STATE_CPU (sd, 0)->psw_mask = (PSW_US
- | PSW_NP | PSW_EP | PSW_ID | PSW_SAT
- | PSW_CY | PSW_OV | PSW_S | PSW_Z);
- break;
- }
-
- return sd;
-}
-
-
-void
-sim_close (sd, quitting)
- SIM_DESC sd;
- int quitting;
-{
- sim_module_uninstall (sd);
-}
-
-SIM_RC
-sim_create_inferior (sd, prog_bfd, argv, env)
- SIM_DESC sd;
- struct _bfd *prog_bfd;
- char **argv;
- char **env;
-{
- memset (&State, 0, sizeof (State));
- if (prog_bfd != NULL)
- PC = bfd_get_start_address (prog_bfd);
- /* For v850ea, set PSW[US] by default */
- if (STATE_ARCHITECTURE (sd) != NULL
- && STATE_ARCHITECTURE (sd)->arch == bfd_arch_v850
- && STATE_ARCHITECTURE (sd)->mach == bfd_mach_v850ea)
- PSW |= PSW_US;
- return SIM_RC_OK;
-}
-
-int
-sim_fetch_register (sd, rn, memory, length)
- SIM_DESC sd;
- int rn;
- unsigned char *memory;
- int length;
-{
- *(unsigned32*)memory = H2T_4 (State.regs[rn]);
- return -1;
-}
-
-int
-sim_store_register (sd, rn, memory, length)
- SIM_DESC sd;
- int rn;
- unsigned char *memory;
- int length;
-{
- State.regs[rn] = T2H_4 (*(unsigned32*)memory);
- return -1;
-}
-
-void
-sim_do_command (sd, cmd)
- SIM_DESC sd;
- char *cmd;
-{
- char *mm_cmd = "memory-map";
- char *int_cmd = "interrupt";
-
- if (sim_args_command (sd, cmd) != SIM_RC_OK)
- {
- if (strncmp (cmd, mm_cmd, strlen (mm_cmd) == 0))
- sim_io_eprintf (sd, "`memory-map' command replaced by `sim memory'\n");
- else if (strncmp (cmd, int_cmd, strlen (int_cmd)) == 0)
- sim_io_eprintf (sd, "`interrupt' command replaced by `sim watch'\n");
- else
- sim_io_eprintf (sd, "Unknown command `%s'\n", cmd);
- }
-}
diff --git a/sim/v850/sim-main.h b/sim/v850/sim-main.h
deleted file mode 100644
index 37ea31f3f4c..00000000000
--- a/sim/v850/sim-main.h
+++ /dev/null
@@ -1,388 +0,0 @@
-#ifndef SIM_MAIN_H
-#define SIM_MAIN_H
-
-/* General config options */
-
-#define WITH_CORE
-#define WITH_MODULO_MEMORY 1
-#define WITH_WATCHPOINTS 1
-
-
-/* The v850 has 32bit words, numbered 31 (MSB) to 0 (LSB) */
-
-#define WITH_TARGET_WORD_MSB 31
-
-
-#include "sim-basics.h"
-#include "sim-signal.h"
-
-typedef address_word sim_cia;
-
-#include "sim-base.h"
-
-#include "simops.h"
-#include "bfd.h"
-
-
-typedef signed8 int8;
-typedef unsigned8 uint8;
-typedef signed16 int16;
-typedef unsigned16 uint16;
-typedef signed32 int32;
-typedef unsigned32 uint32;
-typedef unsigned32 reg_t;
-
-
-/* The current state of the processor; registers, memory, etc. */
-
-typedef struct _v850_regs {
- reg_t regs[32]; /* general-purpose registers */
- reg_t sregs[32]; /* system registers, including psw */
- reg_t pc;
- int dummy_mem; /* where invalid accesses go */
-} v850_regs;
-
-struct _sim_cpu
-{
- /* ... simulator specific members ... */
- v850_regs reg;
- reg_t psw_mask; /* only allow non-reserved bits to be set */
- sim_event *pending_nmi;
- /* ... base type ... */
- sim_cpu_base base;
-};
-
-#define CIA_GET(CPU) ((CPU)->reg.pc + 0)
-#define CIA_SET(CPU,VAL) ((CPU)->reg.pc = (VAL))
-
-struct sim_state {
- sim_cpu cpu[MAX_NR_PROCESSORS];
-#if (WITH_SMP)
-#define STATE_CPU(sd,n) (&(sd)->cpu[n])
-#else
-#define STATE_CPU(sd,n) (&(sd)->cpu[0])
-#endif
-#if 0
- SIM_ADDR rom_size;
- SIM_ADDR low_end;
- SIM_ADDR high_start;
- SIM_ADDR high_base;
- void *mem;
-#endif
- sim_state_base base;
-};
-
-/* For compatibility, until all functions converted to passing
- SIM_DESC as an argument */
-extern SIM_DESC simulator;
-
-
-#define V850_ROM_SIZE 0x8000
-#define V850_LOW_END 0x200000
-#define V850_HIGH_START 0xffe000
-
-
-/* Because we are still using the old semantic table, provide compat
- macro's that store the instruction where the old simops expects
- it. */
-
-extern uint32 OP[4];
-#if 0
-OP[0] = inst & 0x1f; /* RRRRR -> reg1 */
-OP[1] = (inst >> 11) & 0x1f; /* rrrrr -> reg2 */
-OP[2] = (inst >> 16) & 0xffff; /* wwwww -> reg3 OR imm16 */
-OP[3] = inst;
-#endif
-
-#define SAVE_1 \
-PC = cia; \
-OP[0] = instruction_0 & 0x1f; \
-OP[1] = (instruction_0 >> 11) & 0x1f; \
-OP[2] = 0; \
-OP[3] = instruction_0
-
-#define COMPAT_1(CALL) \
-SAVE_1; \
-PC += (CALL); \
-nia = PC
-
-#define SAVE_2 \
-PC = cia; \
-OP[0] = instruction_0 & 0x1f; \
-OP[1] = (instruction_0 >> 11) & 0x1f; \
-OP[2] = instruction_1; \
-OP[3] = (instruction_1 << 16) | instruction_0
-
-#define COMPAT_2(CALL) \
-SAVE_2; \
-PC += (CALL); \
-nia = PC
-
-
-/* new */
-#define GR ((CPU)->reg.regs)
-#define SR ((CPU)->reg.sregs)
-
-/* old */
-#define State (STATE_CPU (simulator, 0)->reg)
-#define PC (State.pc)
-#define SP (State.regs[3])
-#define EP (State.regs[30])
-
-#define EIPC (State.sregs[0])
-#define EIPSW (State.sregs[1])
-#define FEPC (State.sregs[2])
-#define FEPSW (State.sregs[3])
-#define ECR (State.sregs[4])
-#define PSW (State.sregs[5])
-#define CTPC (SR[16])
-#define CTPSW (SR[17])
-#define DBPC (State.sregs[18])
-#define DBPSW (State.sregs[19])
-#define CTBP (State.sregs[20])
-
-#define PSW_US BIT32 (8)
-#define PSW_NP 0x80
-#define PSW_EP 0x40
-#define PSW_ID 0x20
-#define PSW_SAT 0x10
-#define PSW_CY 0x8
-#define PSW_OV 0x4
-#define PSW_S 0x2
-#define PSW_Z 0x1
-
-#define SEXT3(x) ((((x)&0x7)^(~0x3))+0x4)
-
-/* sign-extend a 4-bit number */
-#define SEXT4(x) ((((x)&0xf)^(~0x7))+0x8)
-
-/* sign-extend a 5-bit number */
-#define SEXT5(x) ((((x)&0x1f)^(~0xf))+0x10)
-
-/* sign-extend a 9-bit number */
-#define SEXT9(x) ((((x)&0x1ff)^(~0xff))+0x100)
-
-/* sign-extend a 22-bit number */
-#define SEXT22(x) ((((x)&0x3fffff)^(~0x1fffff))+0x200000)
-
-/* sign extend a 40 bit number */
-#define SEXT40(x) ((((x) & UNSIGNED64 (0xffffffffff)) \
- ^ (~UNSIGNED64 (0x7fffffffff))) \
- + UNSIGNED64 (0x8000000000))
-
-/* sign extend a 44 bit number */
-#define SEXT44(x) ((((x) & UNSIGNED64 (0xfffffffffff)) \
- ^ (~ UNSIGNED64 (0x7ffffffffff))) \
- + UNSIGNED64 (0x80000000000))
-
-/* sign extend a 60 bit number */
-#define SEXT60(x) ((((x) & UNSIGNED64 (0xfffffffffffffff)) \
- ^ (~ UNSIGNED64 (0x7ffffffffffffff))) \
- + UNSIGNED64 (0x800000000000000))
-
-/* No sign extension */
-#define NOP(x) (x)
-
-#define INC_ADDR(x,i) x = ((State.MD && x == MOD_E) ? MOD_S : (x)+(i))
-
-#define RLW(x) load_mem (x, 4)
-
-/* Function declarations. */
-
-#define IMEM16(EA) \
-sim_core_read_aligned_2 (CPU, PC, exec_map, (EA))
-
-#define IMEM16_IMMED(EA,N) \
-sim_core_read_aligned_2 (STATE_CPU (sd, 0), \
- PC, exec_map, (EA) + (N) * 2)
-
-#define load_mem(ADDR,LEN) \
-sim_core_read_unaligned_##LEN (STATE_CPU (simulator, 0), \
- PC, read_map, (ADDR))
-
-#define store_mem(ADDR,LEN,DATA) \
-sim_core_write_unaligned_##LEN (STATE_CPU (simulator, 0), \
- PC, write_map, (ADDR), (DATA))
-
-
-/* compare cccc field against PSW */
-int condition_met (unsigned code);
-
-
-/* Debug/tracing calls */
-
-enum op_types
-{
- OP_UNKNOWN,
- OP_NONE,
- OP_TRAP,
- OP_REG,
- OP_REG_REG,
- OP_REG_REG_CMP,
- OP_REG_REG_MOVE,
- OP_IMM_REG,
- OP_IMM_REG_CMP,
- OP_IMM_REG_MOVE,
- OP_COND_BR,
- OP_LOAD16,
- OP_STORE16,
- OP_LOAD32,
- OP_STORE32,
- OP_JUMP,
- OP_IMM_REG_REG,
- OP_UIMM_REG_REG,
- OP_IMM16_REG_REG,
- OP_UIMM16_REG_REG,
- OP_BIT,
- OP_EX1,
- OP_EX2,
- OP_LDSR,
- OP_STSR,
- OP_BIT_CHANGE,
- OP_REG_REG_REG,
- OP_REG_REG3,
- OP_IMM_REG_REG_REG,
- OP_PUSHPOP1,
- OP_PUSHPOP2,
- OP_PUSHPOP3,
-};
-
-#ifdef DEBUG
-void trace_input PARAMS ((char *name, enum op_types type, int size));
-void trace_output PARAMS ((enum op_types result));
-void trace_result PARAMS ((int has_result, unsigned32 result));
-
-extern int trace_num_values;
-extern unsigned32 trace_values[];
-extern unsigned32 trace_pc;
-extern const char *trace_name;
-extern int trace_module;
-
-#define TRACE_BRANCH0() \
-do { \
- if (TRACE_BRANCH_P (CPU)) { \
- trace_module = TRACE_BRANCH_IDX; \
- trace_pc = cia; \
- trace_name = itable[MY_INDEX].name; \
- trace_num_values = 0; \
- trace_result (1, (nia)); \
- } \
-} while (0)
-
-#define TRACE_BRANCH1(IN1) \
-do { \
- if (TRACE_BRANCH_P (CPU)) { \
- trace_module = TRACE_BRANCH_IDX; \
- trace_pc = cia; \
- trace_name = itable[MY_INDEX].name; \
- trace_values[0] = (IN1); \
- trace_num_values = 1; \
- trace_result (1, (nia)); \
- } \
-} while (0)
-
-#define TRACE_BRANCH2(IN1, IN2) \
-do { \
- if (TRACE_BRANCH_P (CPU)) { \
- trace_module = TRACE_BRANCH_IDX; \
- trace_pc = cia; \
- trace_name = itable[MY_INDEX].name; \
- trace_values[0] = (IN1); \
- trace_values[1] = (IN2); \
- trace_num_values = 2; \
- trace_result (1, (nia)); \
- } \
-} while (0)
-
-#define TRACE_BRANCH3(IN1, IN2, IN3) \
-do { \
- if (TRACE_BRANCH_P (CPU)) { \
- trace_module = TRACE_BRANCH_IDX; \
- trace_pc = cia; \
- trace_name = itable[MY_INDEX].name; \
- trace_values[0] = (IN1); \
- trace_values[1] = (IN2); \
- trace_values[2] = (IN3); \
- trace_num_values = 3; \
- trace_result (1, (nia)); \
- } \
-} while (0)
-
-#define TRACE_LD(ADDR,RESULT) \
-do { \
- if (TRACE_MEMORY_P (CPU)) { \
- trace_module = TRACE_MEMORY_IDX; \
- trace_pc = cia; \
- trace_name = itable[MY_INDEX].name; \
- trace_values[0] = (ADDR); \
- trace_num_values = 1; \
- trace_result (1, (RESULT)); \
- } \
-} while (0)
-
-#define TRACE_LD_NAME(NAME, ADDR,RESULT) \
-do { \
- if (TRACE_MEMORY_P (CPU)) { \
- trace_module = TRACE_MEMORY_IDX; \
- trace_pc = cia; \
- trace_name = (NAME); \
- trace_values[0] = (ADDR); \
- trace_num_values = 1; \
- trace_result (1, (RESULT)); \
- } \
-} while (0)
-
-#define TRACE_ST(ADDR,RESULT) \
-do { \
- if (TRACE_MEMORY_P (CPU)) { \
- trace_module = TRACE_MEMORY_IDX; \
- trace_pc = cia; \
- trace_name = itable[MY_INDEX].name; \
- trace_values[0] = (ADDR); \
- trace_num_values = 1; \
- trace_result (1, (RESULT)); \
- } \
-} while (0)
-
-#else
-#define trace_input(NAME, IN1, IN2)
-#define trace_output(RESULT)
-#define trace_result(HAS_RESULT, RESULT)
-
-#define TRACE_ALU_INPUT0()
-#define TRACE_ALU_INPUT1(IN0)
-#define TRACE_ALU_INPUT2(IN0, IN1)
-#define TRACE_ALU_INPUT2(IN0, IN1)
-#define TRACE_ALU_INPUT2(IN0, IN1 INS2)
-#define TRACE_ALU_RESULT(RESULT)
-
-#define TRACE_BRANCH0()
-#define TRACE_BRANCH1(IN1)
-#define TRACE_BRANCH2(IN1, IN2)
-#define TRACE_BRANCH2(IN1, IN2, IN3)
-
-#define TRACE_LD(ADDR,RESULT)
-#define TRACE_ST(ADDR,RESULT)
-
-#endif
-
-
-extern void divun ( unsigned int N,
- unsigned long int als,
- unsigned long int sfi,
- unsigned32 /*unsigned long int*/ * quotient_ptr,
- unsigned32 /*unsigned long int*/ * remainder_ptr,
- boolean * overflow_ptr
- );
-extern void divn ( unsigned int N,
- unsigned long int als,
- unsigned long int sfi,
- signed32 /*signed long int*/ * quotient_ptr,
- signed32 /*signed long int*/ * remainder_ptr,
- boolean * overflow_ptr
- );
-extern int type1_regs[];
-extern int type2_regs[];
-extern int type3_regs[];
-
-#endif
diff --git a/sim/v850/simops.c b/sim/v850/simops.c
deleted file mode 100644
index f6f43ee2368..00000000000
--- a/sim/v850/simops.c
+++ /dev/null
@@ -1,2733 +0,0 @@
-#include "sim-main.h"
-#include "v850_sim.h"
-#include "simops.h"
-
-#ifdef HAVE_UTIME_H
-#include <utime.h>
-#endif
-
-#ifdef HAVE_TIME_H
-#include <time.h>
-#endif
-
-#ifdef HAVE_UNISTD_H
-#include <unistd.h>
-#endif
-
-#ifdef HAVE_STRING_H
-#include <string.h>
-#else
-#ifdef HAVE_STRINGS_H
-#include <strings.h>
-#endif
-#endif
-
-#include "targ-vals.h"
-
-#include "libiberty.h"
-
-#include <errno.h>
-#if !defined(__GO32__) && !defined(_WIN32)
-#include <sys/stat.h>
-#include <sys/times.h>
-#include <sys/time.h>
-#endif
-
-/* This is an array of the bit positions of registers r20 .. r31 in
- that order in a prepare/dispose instruction. */
-int type1_regs[12] = { 27, 26, 25, 24, 31, 30, 29, 28, 23, 22, 0, 21 };
-/* This is an array of the bit positions of registers r16 .. r31 in
- that order in a push/pop instruction. */
-int type2_regs[16] = { 3, 2, 1, 0, 27, 26, 25, 24, 31, 30, 29, 28, 23, 22, 20, 21};
-/* This is an array of the bit positions of registers r1 .. r15 in
- that order in a push/pop instruction. */
-int type3_regs[15] = { 2, 1, 0, 27, 26, 25, 24, 31, 30, 29, 28, 23, 22, 20, 21};
-
-#ifdef DEBUG
-#ifndef SIZE_INSTRUCTION
-#define SIZE_INSTRUCTION 18
-#endif
-
-#ifndef SIZE_VALUES
-#define SIZE_VALUES 11
-#endif
-
-
-unsigned32 trace_values[3];
-int trace_num_values;
-unsigned32 trace_pc;
-const char *trace_name;
-int trace_module;
-
-
-void
-trace_input (name, type, size)
- char *name;
- enum op_types type;
- int size;
-{
-
- if (!TRACE_ALU_P (STATE_CPU (simulator, 0)))
- return;
-
- trace_pc = PC;
- trace_name = name;
- trace_module = TRACE_ALU_IDX;
-
- switch (type)
- {
- default:
- case OP_UNKNOWN:
- case OP_NONE:
- case OP_TRAP:
- trace_num_values = 0;
- break;
-
- case OP_REG:
- case OP_REG_REG_MOVE:
- trace_values[0] = State.regs[OP[0]];
- trace_num_values = 1;
- break;
-
- case OP_BIT_CHANGE:
- case OP_REG_REG:
- case OP_REG_REG_CMP:
- trace_values[0] = State.regs[OP[1]];
- trace_values[1] = State.regs[OP[0]];
- trace_num_values = 2;
- break;
-
- case OP_IMM_REG:
- case OP_IMM_REG_CMP:
- trace_values[0] = SEXT5 (OP[0]);
- trace_values[1] = OP[1];
- trace_num_values = 2;
- break;
-
- case OP_IMM_REG_MOVE:
- trace_values[0] = SEXT5 (OP[0]);
- trace_num_values = 1;
- break;
-
- case OP_COND_BR:
- trace_values[0] = State.pc;
- trace_values[1] = SEXT9 (OP[0]);
- trace_values[2] = PSW;
- trace_num_values = 3;
- break;
-
- case OP_LOAD16:
- trace_values[0] = OP[1] * size;
- trace_values[1] = State.regs[30];
- trace_num_values = 2;
- break;
-
- case OP_STORE16:
- trace_values[0] = State.regs[OP[0]];
- trace_values[1] = OP[1] * size;
- trace_values[2] = State.regs[30];
- trace_num_values = 3;
- break;
-
- case OP_LOAD32:
- trace_values[0] = EXTEND16 (OP[2]);
- trace_values[1] = State.regs[OP[0]];
- trace_num_values = 2;
- break;
-
- case OP_STORE32:
- trace_values[0] = State.regs[OP[1]];
- trace_values[1] = EXTEND16 (OP[2]);
- trace_values[2] = State.regs[OP[0]];
- trace_num_values = 3;
- break;
-
- case OP_JUMP:
- trace_values[0] = SEXT22 (OP[0]);
- trace_values[1] = State.pc;
- trace_num_values = 2;
- break;
-
- case OP_IMM_REG_REG:
- trace_values[0] = EXTEND16 (OP[0]) << size;
- trace_values[1] = State.regs[OP[1]];
- trace_num_values = 2;
- break;
-
- case OP_IMM16_REG_REG:
- trace_values[0] = EXTEND16 (OP[2]) << size;
- trace_values[1] = State.regs[OP[1]];
- trace_num_values = 2;
- break;
-
- case OP_UIMM_REG_REG:
- trace_values[0] = (OP[0] & 0xffff) << size;
- trace_values[1] = State.regs[OP[1]];
- trace_num_values = 2;
- break;
-
- case OP_UIMM16_REG_REG:
- trace_values[0] = (OP[2]) << size;
- trace_values[1] = State.regs[OP[1]];
- trace_num_values = 2;
- break;
-
- case OP_BIT:
- trace_num_values = 0;
- break;
-
- case OP_EX1:
- trace_values[0] = PSW;
- trace_num_values = 1;
- break;
-
- case OP_EX2:
- trace_num_values = 0;
- break;
-
- case OP_LDSR:
- trace_values[0] = State.regs[OP[0]];
- trace_num_values = 1;
- break;
-
- case OP_STSR:
- trace_values[0] = State.sregs[OP[1]];
- trace_num_values = 1;
- }
-
-}
-
-void
-trace_result (int has_result, unsigned32 result)
-{
- char buf[1000];
- char *chp;
-
- buf[0] = '\0';
- chp = buf;
-
- /* write out the values saved during the trace_input call */
- {
- int i;
- for (i = 0; i < trace_num_values; i++)
- {
- sprintf (chp, "%*s0x%.8lx", SIZE_VALUES - 10, "", trace_values[i]);
- chp = strchr (chp, '\0');
- }
- while (i++ < 3)
- {
- sprintf (chp, "%*s", SIZE_VALUES, "");
- chp = strchr (chp, '\0');
- }
- }
-
- /* append any result to the end of the buffer */
- if (has_result)
- sprintf (chp, " :: 0x%.8lx", (unsigned long)result);
-
- trace_generic (simulator, STATE_CPU (simulator, 0), trace_module, buf);
-}
-
-void
-trace_output (result)
- enum op_types result;
-{
- if (!TRACE_ALU_P (STATE_CPU (simulator, 0)))
- return;
-
- switch (result)
- {
- default:
- case OP_UNKNOWN:
- case OP_NONE:
- case OP_TRAP:
- case OP_REG:
- case OP_REG_REG_CMP:
- case OP_IMM_REG_CMP:
- case OP_COND_BR:
- case OP_STORE16:
- case OP_STORE32:
- case OP_BIT:
- case OP_EX2:
- trace_result (0, 0);
- break;
-
- case OP_LOAD16:
- case OP_STSR:
- trace_result (1, State.regs[OP[0]]);
- break;
-
- case OP_REG_REG:
- case OP_REG_REG_MOVE:
- case OP_IMM_REG:
- case OP_IMM_REG_MOVE:
- case OP_LOAD32:
- case OP_EX1:
- trace_result (1, State.regs[OP[1]]);
- break;
-
- case OP_IMM_REG_REG:
- case OP_UIMM_REG_REG:
- case OP_IMM16_REG_REG:
- case OP_UIMM16_REG_REG:
- trace_result (1, State.regs[OP[1]]);
- break;
-
- case OP_JUMP:
- if (OP[1] != 0)
- trace_result (1, State.regs[OP[1]]);
- else
- trace_result (0, 0);
- break;
-
- case OP_LDSR:
- trace_result (1, State.sregs[OP[1]]);
- break;
- }
-}
-#endif
-
-
-/* Returns 1 if the specific condition is met, returns 0 otherwise. */
-int
-condition_met (unsigned code)
-{
- unsigned int psw = PSW;
-
- switch (code & 0xf)
- {
- case 0x0: return ((psw & PSW_OV) != 0);
- case 0x1: return ((psw & PSW_CY) != 0);
- case 0x2: return ((psw & PSW_Z) != 0);
- case 0x3: return ((((psw & PSW_CY) != 0) | ((psw & PSW_Z) != 0)) != 0);
- case 0x4: return ((psw & PSW_S) != 0);
- /*case 0x5: return 1;*/
- case 0x6: return ((((psw & PSW_S) != 0) ^ ((psw & PSW_OV) != 0)) != 0);
- case 0x7: return (((((psw & PSW_S) != 0) ^ ((psw & PSW_OV) != 0)) || ((psw & PSW_Z) != 0)) != 0);
- case 0x8: return ((psw & PSW_OV) == 0);
- case 0x9: return ((psw & PSW_CY) == 0);
- case 0xa: return ((psw & PSW_Z) == 0);
- case 0xb: return ((((psw & PSW_CY) != 0) | ((psw & PSW_Z) != 0)) == 0);
- case 0xc: return ((psw & PSW_S) == 0);
- case 0xd: return ((psw & PSW_SAT) != 0);
- case 0xe: return ((((psw & PSW_S) != 0) ^ ((psw & PSW_OV) != 0)) == 0);
- case 0xf: return (((((psw & PSW_S) != 0) ^ ((psw & PSW_OV) != 0)) || ((psw & PSW_Z) != 0)) == 0);
- }
-
- return 1;
-}
-
-static unsigned long
-Add32 (unsigned long a1, unsigned long a2, int * carry)
-{
- unsigned long result = (a1 + a2);
-
- * carry = (result < a1);
-
- return result;
-}
-
-static void
-Multiply64 (boolean sign, unsigned long op0)
-{
- unsigned long op1;
- unsigned long lo;
- unsigned long mid1;
- unsigned long mid2;
- unsigned long hi;
- unsigned long RdLo;
- unsigned long RdHi;
- int carry;
-
- op1 = State.regs[ OP[1] ];
-
- if (sign)
- {
- /* Compute sign of result and adjust operands if necessary. */
-
- sign = (op0 ^ op1) & 0x80000000;
-
- if (((signed long) op0) < 0)
- op0 = - op0;
-
- if (((signed long) op1) < 0)
- op1 = - op1;
- }
-
- /* We can split the 32x32 into four 16x16 operations. This ensures
- that we do not lose precision on 32bit only hosts: */
- lo = ( (op0 & 0xFFFF) * (op1 & 0xFFFF));
- mid1 = ( (op0 & 0xFFFF) * ((op1 >> 16) & 0xFFFF));
- mid2 = (((op0 >> 16) & 0xFFFF) * (op1 & 0xFFFF));
- hi = (((op0 >> 16) & 0xFFFF) * ((op1 >> 16) & 0xFFFF));
-
- /* We now need to add all of these results together, taking care
- to propogate the carries from the additions: */
- RdLo = Add32 (lo, (mid1 << 16), & carry);
- RdHi = carry;
- RdLo = Add32 (RdLo, (mid2 << 16), & carry);
- RdHi += (carry + ((mid1 >> 16) & 0xFFFF) + ((mid2 >> 16) & 0xFFFF) + hi);
-
- if (sign)
- {
- /* Negate result if necessary. */
-
- RdLo = ~ RdLo;
- RdHi = ~ RdHi;
- if (RdLo == 0xFFFFFFFF)
- {
- RdLo = 0;
- RdHi += 1;
- }
- else
- RdLo += 1;
- }
-
- /* Don't store into register 0. */
- if (OP[1])
- State.regs[ OP[1] ] = RdLo;
- if (OP[2] >> 11)
- State.regs[ OP[2] >> 11 ] = RdHi;
-
- return;
-}
-
-
-/* Read a null terminated string from memory, return in a buffer */
-static char *
-fetch_str (sd, addr)
- SIM_DESC sd;
- address_word addr;
-{
- char *buf;
- int nr = 0;
- while (sim_core_read_1 (STATE_CPU (sd, 0),
- PC, read_map, addr + nr) != 0)
- nr++;
- buf = NZALLOC (char, nr + 1);
- sim_read (simulator, addr, buf, nr);
- return buf;
-}
-
-/* Read a null terminated argument vector from memory, return in a
- buffer */
-static char **
-fetch_argv (sd, addr)
- SIM_DESC sd;
- address_word addr;
-{
- int max_nr = 64;
- int nr = 0;
- char **buf = xmalloc (max_nr * sizeof (char*));
- while (1)
- {
- unsigned32 a = sim_core_read_4 (STATE_CPU (sd, 0),
- PC, read_map, addr + nr * 4);
- if (a == 0) break;
- buf[nr] = fetch_str (sd, a);
- nr ++;
- if (nr == max_nr - 1)
- {
- max_nr += 50;
- buf = xrealloc (buf, max_nr * sizeof (char*));
- }
- }
- buf[nr] = 0;
- return buf;
-}
-
-
-/* sst.b */
-int
-OP_380 ()
-{
- trace_input ("sst.b", OP_STORE16, 1);
-
- store_mem (State.regs[30] + (OP[3] & 0x7f), 1, State.regs[ OP[1] ]);
-
- trace_output (OP_STORE16);
-
- return 2;
-}
-
-/* sst.h */
-int
-OP_480 ()
-{
- trace_input ("sst.h", OP_STORE16, 2);
-
- store_mem (State.regs[30] + ((OP[3] & 0x7f) << 1), 2, State.regs[ OP[1] ]);
-
- trace_output (OP_STORE16);
-
- return 2;
-}
-
-/* sst.w */
-int
-OP_501 ()
-{
- trace_input ("sst.w", OP_STORE16, 4);
-
- store_mem (State.regs[30] + ((OP[3] & 0x7e) << 1), 4, State.regs[ OP[1] ]);
-
- trace_output (OP_STORE16);
-
- return 2;
-}
-
-/* ld.b */
-int
-OP_700 ()
-{
- int adr;
-
- trace_input ("ld.b", OP_LOAD32, 1);
-
- adr = State.regs[ OP[0] ] + EXTEND16 (OP[2]);
-
- State.regs[ OP[1] ] = EXTEND8 (load_mem (adr, 1));
-
- trace_output (OP_LOAD32);
-
- return 4;
-}
-
-/* ld.h */
-int
-OP_720 ()
-{
- int adr;
-
- trace_input ("ld.h", OP_LOAD32, 2);
-
- adr = State.regs[ OP[0] ] + EXTEND16 (OP[2]);
- adr &= ~0x1;
-
- State.regs[ OP[1] ] = EXTEND16 (load_mem (adr, 2));
-
- trace_output (OP_LOAD32);
-
- return 4;
-}
-
-/* ld.w */
-int
-OP_10720 ()
-{
- int adr;
-
- trace_input ("ld.w", OP_LOAD32, 4);
-
- adr = State.regs[ OP[0] ] + EXTEND16 (OP[2] & ~1);
- adr &= ~0x3;
-
- State.regs[ OP[1] ] = load_mem (adr, 4);
-
- trace_output (OP_LOAD32);
-
- return 4;
-}
-
-/* st.b */
-int
-OP_740 ()
-{
- trace_input ("st.b", OP_STORE32, 1);
-
- store_mem (State.regs[ OP[0] ] + EXTEND16 (OP[2]), 1, State.regs[ OP[1] ]);
-
- trace_output (OP_STORE32);
-
- return 4;
-}
-
-/* st.h */
-int
-OP_760 ()
-{
- int adr;
-
- trace_input ("st.h", OP_STORE32, 2);
-
- adr = State.regs[ OP[0] ] + EXTEND16 (OP[2]);
- adr &= ~1;
-
- store_mem (adr, 2, State.regs[ OP[1] ]);
-
- trace_output (OP_STORE32);
-
- return 4;
-}
-
-/* st.w */
-int
-OP_10760 ()
-{
- int adr;
-
- trace_input ("st.w", OP_STORE32, 4);
-
- adr = State.regs[ OP[0] ] + EXTEND16 (OP[2] & ~1);
- adr &= ~3;
-
- store_mem (adr, 4, State.regs[ OP[1] ]);
-
- trace_output (OP_STORE32);
-
- return 4;
-}
-
-/* add reg, reg */
-int
-OP_1C0 ()
-{
- unsigned int op0, op1, result, z, s, cy, ov;
-
- trace_input ("add", OP_REG_REG, 0);
-
- /* Compute the result. */
-
- op0 = State.regs[ OP[0] ];
- op1 = State.regs[ OP[1] ];
-
- result = op0 + op1;
-
- /* Compute the condition codes. */
- z = (result == 0);
- s = (result & 0x80000000);
- cy = (result < op0 || result < op1);
- ov = ((op0 & 0x80000000) == (op1 & 0x80000000)
- && (op0 & 0x80000000) != (result & 0x80000000));
-
- /* Store the result and condition codes. */
- State.regs[OP[1]] = result;
- PSW &= ~(PSW_Z | PSW_S | PSW_CY | PSW_OV);
- PSW |= ((z ? PSW_Z : 0) | (s ? PSW_S : 0)
- | (cy ? PSW_CY : 0) | (ov ? PSW_OV : 0));
- trace_output (OP_REG_REG);
-
- return 2;
-}
-
-/* add sign_extend(imm5), reg */
-int
-OP_240 ()
-{
- unsigned int op0, op1, result, z, s, cy, ov;
- int temp;
-
- trace_input ("add", OP_IMM_REG, 0);
-
- /* Compute the result. */
- temp = SEXT5 (OP[0]);
- op0 = temp;
- op1 = State.regs[OP[1]];
- result = op0 + op1;
-
- /* Compute the condition codes. */
- z = (result == 0);
- s = (result & 0x80000000);
- cy = (result < op0 || result < op1);
- ov = ((op0 & 0x80000000) == (op1 & 0x80000000)
- && (op0 & 0x80000000) != (result & 0x80000000));
-
- /* Store the result and condition codes. */
- State.regs[OP[1]] = result;
- PSW &= ~(PSW_Z | PSW_S | PSW_CY | PSW_OV);
- PSW |= ((z ? PSW_Z : 0) | (s ? PSW_S : 0)
- | (cy ? PSW_CY : 0) | (ov ? PSW_OV : 0));
- trace_output (OP_IMM_REG);
-
- return 2;
-}
-
-/* addi sign_extend(imm16), reg, reg */
-int
-OP_600 ()
-{
- unsigned int op0, op1, result, z, s, cy, ov;
-
- trace_input ("addi", OP_IMM16_REG_REG, 0);
-
- /* Compute the result. */
-
- op0 = EXTEND16 (OP[2]);
- op1 = State.regs[ OP[0] ];
- result = op0 + op1;
-
- /* Compute the condition codes. */
- z = (result == 0);
- s = (result & 0x80000000);
- cy = (result < op0 || result < op1);
- ov = ((op0 & 0x80000000) == (op1 & 0x80000000)
- && (op0 & 0x80000000) != (result & 0x80000000));
-
- /* Store the result and condition codes. */
- State.regs[OP[1]] = result;
- PSW &= ~(PSW_Z | PSW_S | PSW_CY | PSW_OV);
- PSW |= ((z ? PSW_Z : 0) | (s ? PSW_S : 0)
- | (cy ? PSW_CY : 0) | (ov ? PSW_OV : 0));
- trace_output (OP_IMM16_REG_REG);
-
- return 4;
-}
-
-/* sub reg1, reg2 */
-int
-OP_1A0 ()
-{
- unsigned int op0, op1, result, z, s, cy, ov;
-
- trace_input ("sub", OP_REG_REG, 0);
- /* Compute the result. */
- op0 = State.regs[ OP[0] ];
- op1 = State.regs[ OP[1] ];
- result = op1 - op0;
-
- /* Compute the condition codes. */
- z = (result == 0);
- s = (result & 0x80000000);
- cy = (op1 < op0);
- ov = ((op1 & 0x80000000) != (op0 & 0x80000000)
- && (op1 & 0x80000000) != (result & 0x80000000));
-
- /* Store the result and condition codes. */
- State.regs[OP[1]] = result;
- PSW &= ~(PSW_Z | PSW_S | PSW_CY | PSW_OV);
- PSW |= ((z ? PSW_Z : 0) | (s ? PSW_S : 0)
- | (cy ? PSW_CY : 0) | (ov ? PSW_OV : 0));
- trace_output (OP_REG_REG);
-
- return 2;
-}
-
-/* subr reg1, reg2 */
-int
-OP_180 ()
-{
- unsigned int op0, op1, result, z, s, cy, ov;
-
- trace_input ("subr", OP_REG_REG, 0);
- /* Compute the result. */
- op0 = State.regs[ OP[0] ];
- op1 = State.regs[ OP[1] ];
- result = op0 - op1;
-
- /* Compute the condition codes. */
- z = (result == 0);
- s = (result & 0x80000000);
- cy = (op0 < op1);
- ov = ((op0 & 0x80000000) != (op1 & 0x80000000)
- && (op0 & 0x80000000) != (result & 0x80000000));
-
- /* Store the result and condition codes. */
- State.regs[OP[1]] = result;
- PSW &= ~(PSW_Z | PSW_S | PSW_CY | PSW_OV);
- PSW |= ((z ? PSW_Z : 0) | (s ? PSW_S : 0)
- | (cy ? PSW_CY : 0) | (ov ? PSW_OV : 0));
- trace_output (OP_REG_REG);
-
- return 2;
-}
-
-/* sxh reg1 */
-int
-OP_E0 ()
-{
- trace_input ("mulh", OP_REG_REG, 0);
-
- State.regs[ OP[1] ] = (EXTEND16 (State.regs[ OP[1] ]) * EXTEND16 (State.regs[ OP[0] ]));
-
- trace_output (OP_REG_REG);
-
- return 2;
-}
-
-/* mulh sign_extend(imm5), reg2 */
-int
-OP_2E0 ()
-{
- trace_input ("mulh", OP_IMM_REG, 0);
-
- State.regs[ OP[1] ] = EXTEND16 (State.regs[ OP[1] ]) * SEXT5 (OP[0]);
-
- trace_output (OP_IMM_REG);
-
- return 2;
-}
-
-/* mulhi imm16, reg1, reg2 */
-int
-OP_6E0 ()
-{
- trace_input ("mulhi", OP_IMM16_REG_REG, 0);
-
- State.regs[ OP[1] ] = EXTEND16 (State.regs[ OP[0] ]) * EXTEND16 (OP[2]);
-
- trace_output (OP_IMM16_REG_REG);
-
- return 4;
-}
-
-/* divh reg1, reg2 */
-int
-OP_40 ()
-{
- unsigned int op0, op1, result, ov, s, z;
- int temp;
-
- trace_input ("divh", OP_REG_REG, 0);
-
- /* Compute the result. */
- temp = EXTEND16 (State.regs[ OP[0] ]);
- op0 = temp;
- op1 = State.regs[OP[1]];
-
- if (op0 == 0xffffffff && op1 == 0x80000000)
- {
- result = 0x80000000;
- ov = 1;
- }
- else if (op0 != 0)
- {
- result = op1 / op0;
- ov = 0;
- }
- else
- {
- result = 0x0;
- ov = 1;
- }
-
- /* Compute the condition codes. */
- z = (result == 0);
- s = (result & 0x80000000);
-
- /* Store the result and condition codes. */
- State.regs[OP[1]] = result;
- PSW &= ~(PSW_Z | PSW_S | PSW_OV);
- PSW |= ((z ? PSW_Z : 0) | (s ? PSW_S : 0)
- | (ov ? PSW_OV : 0));
- trace_output (OP_REG_REG);
-
- return 2;
-}
-
-/* cmp reg, reg */
-int
-OP_1E0 ()
-{
- unsigned int op0, op1, result, z, s, cy, ov;
-
- trace_input ("cmp", OP_REG_REG_CMP, 0);
- /* Compute the result. */
- op0 = State.regs[ OP[0] ];
- op1 = State.regs[ OP[1] ];
- result = op1 - op0;
-
- /* Compute the condition codes. */
- z = (result == 0);
- s = (result & 0x80000000);
- cy = (op1 < op0);
- ov = ((op1 & 0x80000000) != (op0 & 0x80000000)
- && (op1 & 0x80000000) != (result & 0x80000000));
-
- /* Set condition codes. */
- PSW &= ~(PSW_Z | PSW_S | PSW_CY | PSW_OV);
- PSW |= ((z ? PSW_Z : 0) | (s ? PSW_S : 0)
- | (cy ? PSW_CY : 0) | (ov ? PSW_OV : 0));
- trace_output (OP_REG_REG_CMP);
-
- return 2;
-}
-
-/* cmp sign_extend(imm5), reg */
-int
-OP_260 ()
-{
- unsigned int op0, op1, result, z, s, cy, ov;
- int temp;
-
- /* Compute the result. */
- trace_input ("cmp", OP_IMM_REG_CMP, 0);
- temp = SEXT5 (OP[0]);
- op0 = temp;
- op1 = State.regs[OP[1]];
- result = op1 - op0;
-
- /* Compute the condition codes. */
- z = (result == 0);
- s = (result & 0x80000000);
- cy = (op1 < op0);
- ov = ((op1 & 0x80000000) != (op0 & 0x80000000)
- && (op1 & 0x80000000) != (result & 0x80000000));
-
- /* Set condition codes. */
- PSW &= ~(PSW_Z | PSW_S | PSW_CY | PSW_OV);
- PSW |= ((z ? PSW_Z : 0) | (s ? PSW_S : 0)
- | (cy ? PSW_CY : 0) | (ov ? PSW_OV : 0));
- trace_output (OP_IMM_REG_CMP);
-
- return 2;
-}
-
-/* setf cccc,reg2 */
-int
-OP_7E0 ()
-{
- trace_input ("setf", OP_EX1, 0);
-
- State.regs[ OP[1] ] = condition_met (OP[0]);
-
- trace_output (OP_EX1);
-
- return 4;
-}
-
-/* satadd reg,reg */
-int
-OP_C0 ()
-{
- unsigned int op0, op1, result, z, s, cy, ov, sat;
-
- trace_input ("satadd", OP_REG_REG, 0);
- /* Compute the result. */
- op0 = State.regs[ OP[0] ];
- op1 = State.regs[ OP[1] ];
- result = op0 + op1;
-
- /* Compute the condition codes. */
- z = (result == 0);
- s = (result & 0x80000000);
- cy = (result < op0 || result < op1);
- ov = ((op0 & 0x80000000) == (op1 & 0x80000000)
- && (op0 & 0x80000000) != (result & 0x80000000));
- sat = ov;
-
- /* Store the result and condition codes. */
- State.regs[OP[1]] = result;
- PSW &= ~(PSW_Z | PSW_S | PSW_CY | PSW_OV);
- PSW |= ((z ? PSW_Z : 0) | (s ? PSW_S : 0)
- | (cy ? PSW_CY : 0) | (ov ? PSW_OV : 0)
- | (sat ? PSW_SAT : 0));
-
- /* Handle saturated results. */
- if (sat && s)
- State.regs[OP[1]] = 0x80000000;
- else if (sat)
- State.regs[OP[1]] = 0x7fffffff;
- trace_output (OP_REG_REG);
-
- return 2;
-}
-
-/* satadd sign_extend(imm5), reg */
-int
-OP_220 ()
-{
- unsigned int op0, op1, result, z, s, cy, ov, sat;
-
- int temp;
-
- trace_input ("satadd", OP_IMM_REG, 0);
-
- /* Compute the result. */
- temp = SEXT5 (OP[0]);
- op0 = temp;
- op1 = State.regs[OP[1]];
- result = op0 + op1;
-
- /* Compute the condition codes. */
- z = (result == 0);
- s = (result & 0x80000000);
- cy = (result < op0 || result < op1);
- ov = ((op0 & 0x80000000) == (op1 & 0x80000000)
- && (op0 & 0x80000000) != (result & 0x80000000));
- sat = ov;
-
- /* Store the result and condition codes. */
- State.regs[OP[1]] = result;
- PSW &= ~(PSW_Z | PSW_S | PSW_CY | PSW_OV);
- PSW |= ((z ? PSW_Z : 0) | (s ? PSW_S : 0)
- | (cy ? PSW_CY : 0) | (ov ? PSW_OV : 0)
- | (sat ? PSW_SAT : 0));
-
- /* Handle saturated results. */
- if (sat && s)
- State.regs[OP[1]] = 0x80000000;
- else if (sat)
- State.regs[OP[1]] = 0x7fffffff;
- trace_output (OP_IMM_REG);
-
- return 2;
-}
-
-/* satsub reg1, reg2 */
-int
-OP_A0 ()
-{
- unsigned int op0, op1, result, z, s, cy, ov, sat;
-
- trace_input ("satsub", OP_REG_REG, 0);
-
- /* Compute the result. */
- op0 = State.regs[ OP[0] ];
- op1 = State.regs[ OP[1] ];
- result = op1 - op0;
-
- /* Compute the condition codes. */
- z = (result == 0);
- s = (result & 0x80000000);
- cy = (op1 < op0);
- ov = ((op1 & 0x80000000) != (op0 & 0x80000000)
- && (op1 & 0x80000000) != (result & 0x80000000));
- sat = ov;
-
- /* Store the result and condition codes. */
- State.regs[OP[1]] = result;
- PSW &= ~(PSW_Z | PSW_S | PSW_CY | PSW_OV);
- PSW |= ((z ? PSW_Z : 0) | (s ? PSW_S : 0)
- | (cy ? PSW_CY : 0) | (ov ? PSW_OV : 0)
- | (sat ? PSW_SAT : 0));
-
- /* Handle saturated results. */
- if (sat && s)
- State.regs[OP[1]] = 0x80000000;
- else if (sat)
- State.regs[OP[1]] = 0x7fffffff;
- trace_output (OP_REG_REG);
- return 2;
-}
-
-/* satsubi sign_extend(imm16), reg */
-int
-OP_660 ()
-{
- unsigned int op0, op1, result, z, s, cy, ov, sat;
- int temp;
-
- trace_input ("satsubi", OP_IMM_REG, 0);
-
- /* Compute the result. */
- temp = EXTEND16 (OP[2]);
- op0 = temp;
- op1 = State.regs[ OP[0] ];
- result = op1 - op0;
-
- /* Compute the condition codes. */
- z = (result == 0);
- s = (result & 0x80000000);
- cy = (op1 < op0);
- ov = ((op1 & 0x80000000) != (op0 & 0x80000000)
- && (op1 & 0x80000000) != (result & 0x80000000));
- sat = ov;
-
- /* Store the result and condition codes. */
- State.regs[OP[1]] = result;
- PSW &= ~(PSW_Z | PSW_S | PSW_CY | PSW_OV);
- PSW |= ((z ? PSW_Z : 0) | (s ? PSW_S : 0)
- | (cy ? PSW_CY : 0) | (ov ? PSW_OV : 0)
- | (sat ? PSW_SAT : 0));
-
- /* Handle saturated results. */
- if (sat && s)
- State.regs[OP[1]] = 0x80000000;
- else if (sat)
- State.regs[OP[1]] = 0x7fffffff;
- trace_output (OP_IMM_REG);
-
- return 4;
-}
-
-/* satsubr reg,reg */
-int
-OP_80 ()
-{
- unsigned int op0, op1, result, z, s, cy, ov, sat;
-
- trace_input ("satsubr", OP_REG_REG, 0);
-
- /* Compute the result. */
- op0 = State.regs[ OP[0] ];
- op1 = State.regs[ OP[1] ];
- result = op0 - op1;
-
- /* Compute the condition codes. */
- z = (result == 0);
- s = (result & 0x80000000);
- cy = (result < op0);
- ov = ((op1 & 0x80000000) != (op0 & 0x80000000)
- && (op1 & 0x80000000) != (result & 0x80000000));
- sat = ov;
-
- /* Store the result and condition codes. */
- State.regs[OP[1]] = result;
- PSW &= ~(PSW_Z | PSW_S | PSW_CY | PSW_OV);
- PSW |= ((z ? PSW_Z : 0) | (s ? PSW_S : 0)
- | (cy ? PSW_CY : 0) | (ov ? PSW_OV : 0)
- | (sat ? PSW_SAT : 0));
-
- /* Handle saturated results. */
- if (sat && s)
- State.regs[OP[1]] = 0x80000000;
- else if (sat)
- State.regs[OP[1]] = 0x7fffffff;
- trace_output (OP_REG_REG);
-
- return 2;
-}
-
-/* tst reg,reg */
-int
-OP_160 ()
-{
- unsigned int op0, op1, result, z, s;
-
- trace_input ("tst", OP_REG_REG_CMP, 0);
-
- /* Compute the result. */
- op0 = State.regs[ OP[0] ];
- op1 = State.regs[ OP[1] ];
- result = op0 & op1;
-
- /* Compute the condition codes. */
- z = (result == 0);
- s = (result & 0x80000000);
-
- /* Store the condition codes. */
- PSW &= ~(PSW_Z | PSW_S | PSW_OV);
- PSW |= ((z ? PSW_Z : 0) | (s ? PSW_S : 0));
- trace_output (OP_REG_REG_CMP);
-
- return 2;
-}
-
-/* mov sign_extend(imm5), reg */
-int
-OP_200 ()
-{
- int value = SEXT5 (OP[0]);
-
- trace_input ("mov", OP_IMM_REG_MOVE, 0);
-
- State.regs[ OP[1] ] = value;
-
- trace_output (OP_IMM_REG_MOVE);
-
- return 2;
-}
-
-/* movhi imm16, reg, reg */
-int
-OP_640 ()
-{
- trace_input ("movhi", OP_UIMM16_REG_REG, 16);
-
- State.regs[ OP[1] ] = State.regs[ OP[0] ] + (OP[2] << 16);
-
- trace_output (OP_UIMM16_REG_REG);
-
- return 4;
-}
-
-/* sar zero_extend(imm5),reg1 */
-int
-OP_2A0 ()
-{
- unsigned int op0, op1, result, z, s, cy;
-
- trace_input ("sar", OP_IMM_REG, 0);
- op0 = OP[0];
- op1 = State.regs[ OP[1] ];
- result = (signed)op1 >> op0;
-
- /* Compute the condition codes. */
- z = (result == 0);
- s = (result & 0x80000000);
- cy = (op1 & (1 << (op0 - 1)));
-
- /* Store the result and condition codes. */
- State.regs[ OP[1] ] = result;
- PSW &= ~(PSW_Z | PSW_S | PSW_OV | PSW_CY);
- PSW |= ((z ? PSW_Z : 0) | (s ? PSW_S : 0)
- | (cy ? PSW_CY : 0));
- trace_output (OP_IMM_REG);
-
- return 2;
-}
-
-/* sar reg1, reg2 */
-int
-OP_A007E0 ()
-{
- unsigned int op0, op1, result, z, s, cy;
-
- trace_input ("sar", OP_REG_REG, 0);
-
- op0 = State.regs[ OP[0] ] & 0x1f;
- op1 = State.regs[ OP[1] ];
- result = (signed)op1 >> op0;
-
- /* Compute the condition codes. */
- z = (result == 0);
- s = (result & 0x80000000);
- cy = (op1 & (1 << (op0 - 1)));
-
- /* Store the result and condition codes. */
- State.regs[OP[1]] = result;
- PSW &= ~(PSW_Z | PSW_S | PSW_OV | PSW_CY);
- PSW |= ((z ? PSW_Z : 0) | (s ? PSW_S : 0)
- | (cy ? PSW_CY : 0));
- trace_output (OP_REG_REG);
-
- return 4;
-}
-
-/* shl zero_extend(imm5),reg1 */
-int
-OP_2C0 ()
-{
- unsigned int op0, op1, result, z, s, cy;
-
- trace_input ("shl", OP_IMM_REG, 0);
- op0 = OP[0];
- op1 = State.regs[ OP[1] ];
- result = op1 << op0;
-
- /* Compute the condition codes. */
- z = (result == 0);
- s = (result & 0x80000000);
- cy = (op1 & (1 << (32 - op0)));
-
- /* Store the result and condition codes. */
- State.regs[OP[1]] = result;
- PSW &= ~(PSW_Z | PSW_S | PSW_OV | PSW_CY);
- PSW |= ((z ? PSW_Z : 0) | (s ? PSW_S : 0)
- | (cy ? PSW_CY : 0));
- trace_output (OP_IMM_REG);
-
- return 2;
-}
-
-/* shl reg1, reg2 */
-int
-OP_C007E0 ()
-{
- unsigned int op0, op1, result, z, s, cy;
-
- trace_input ("shl", OP_REG_REG, 0);
- op0 = State.regs[ OP[0] ] & 0x1f;
- op1 = State.regs[ OP[1] ];
- result = op1 << op0;
-
- /* Compute the condition codes. */
- z = (result == 0);
- s = (result & 0x80000000);
- cy = (op1 & (1 << (32 - op0)));
-
- /* Store the result and condition codes. */
- State.regs[OP[1]] = result;
- PSW &= ~(PSW_Z | PSW_S | PSW_OV | PSW_CY);
- PSW |= ((z ? PSW_Z : 0) | (s ? PSW_S : 0)
- | (cy ? PSW_CY : 0));
- trace_output (OP_REG_REG);
-
- return 4;
-}
-
-/* shr zero_extend(imm5),reg1 */
-int
-OP_280 ()
-{
- unsigned int op0, op1, result, z, s, cy;
-
- trace_input ("shr", OP_IMM_REG, 0);
- op0 = OP[0];
- op1 = State.regs[ OP[1] ];
- result = op1 >> op0;
-
- /* Compute the condition codes. */
- z = (result == 0);
- s = (result & 0x80000000);
- cy = (op1 & (1 << (op0 - 1)));
-
- /* Store the result and condition codes. */
- State.regs[OP[1]] = result;
- PSW &= ~(PSW_Z | PSW_S | PSW_OV | PSW_CY);
- PSW |= ((z ? PSW_Z : 0) | (s ? PSW_S : 0)
- | (cy ? PSW_CY : 0));
- trace_output (OP_IMM_REG);
-
- return 2;
-}
-
-/* shr reg1, reg2 */
-int
-OP_8007E0 ()
-{
- unsigned int op0, op1, result, z, s, cy;
-
- trace_input ("shr", OP_REG_REG, 0);
- op0 = State.regs[ OP[0] ] & 0x1f;
- op1 = State.regs[ OP[1] ];
- result = op1 >> op0;
-
- /* Compute the condition codes. */
- z = (result == 0);
- s = (result & 0x80000000);
- cy = (op1 & (1 << (op0 - 1)));
-
- /* Store the result and condition codes. */
- State.regs[OP[1]] = result;
- PSW &= ~(PSW_Z | PSW_S | PSW_OV | PSW_CY);
- PSW |= ((z ? PSW_Z : 0) | (s ? PSW_S : 0)
- | (cy ? PSW_CY : 0));
- trace_output (OP_REG_REG);
-
- return 4;
-}
-
-/* or reg, reg */
-int
-OP_100 ()
-{
- unsigned int op0, op1, result, z, s;
-
- trace_input ("or", OP_REG_REG, 0);
-
- /* Compute the result. */
- op0 = State.regs[ OP[0] ];
- op1 = State.regs[ OP[1] ];
- result = op0 | op1;
-
- /* Compute the condition codes. */
- z = (result == 0);
- s = (result & 0x80000000);
-
- /* Store the result and condition codes. */
- State.regs[OP[1]] = result;
- PSW &= ~(PSW_Z | PSW_S | PSW_OV);
- PSW |= ((z ? PSW_Z : 0) | (s ? PSW_S : 0));
- trace_output (OP_REG_REG);
-
- return 2;
-}
-
-/* ori zero_extend(imm16), reg, reg */
-int
-OP_680 ()
-{
- unsigned int op0, op1, result, z, s;
-
- trace_input ("ori", OP_UIMM16_REG_REG, 0);
- op0 = OP[2];
- op1 = State.regs[ OP[0] ];
- result = op0 | op1;
-
- /* Compute the condition codes. */
- z = (result == 0);
- s = (result & 0x80000000);
-
- /* Store the result and condition codes. */
- State.regs[OP[1]] = result;
- PSW &= ~(PSW_Z | PSW_S | PSW_OV);
- PSW |= ((z ? PSW_Z : 0) | (s ? PSW_S : 0));
- trace_output (OP_UIMM16_REG_REG);
-
- return 4;
-}
-
-/* and reg, reg */
-int
-OP_140 ()
-{
- unsigned int op0, op1, result, z, s;
-
- trace_input ("and", OP_REG_REG, 0);
-
- /* Compute the result. */
- op0 = State.regs[ OP[0] ];
- op1 = State.regs[ OP[1] ];
- result = op0 & op1;
-
- /* Compute the condition codes. */
- z = (result == 0);
- s = (result & 0x80000000);
-
- /* Store the result and condition codes. */
- State.regs[OP[1]] = result;
- PSW &= ~(PSW_Z | PSW_S | PSW_OV);
- PSW |= ((z ? PSW_Z : 0) | (s ? PSW_S : 0));
- trace_output (OP_REG_REG);
-
- return 2;
-}
-
-/* andi zero_extend(imm16), reg, reg */
-int
-OP_6C0 ()
-{
- unsigned int result, z;
-
- trace_input ("andi", OP_UIMM16_REG_REG, 0);
-
- result = OP[2] & State.regs[ OP[0] ];
-
- /* Compute the condition codes. */
- z = (result == 0);
-
- /* Store the result and condition codes. */
- State.regs[ OP[1] ] = result;
-
- PSW &= ~(PSW_Z | PSW_S | PSW_OV);
- PSW |= (z ? PSW_Z : 0);
-
- trace_output (OP_UIMM16_REG_REG);
-
- return 4;
-}
-
-/* xor reg, reg */
-int
-OP_120 ()
-{
- unsigned int op0, op1, result, z, s;
-
- trace_input ("xor", OP_REG_REG, 0);
-
- /* Compute the result. */
- op0 = State.regs[ OP[0] ];
- op1 = State.regs[ OP[1] ];
- result = op0 ^ op1;
-
- /* Compute the condition codes. */
- z = (result == 0);
- s = (result & 0x80000000);
-
- /* Store the result and condition codes. */
- State.regs[OP[1]] = result;
- PSW &= ~(PSW_Z | PSW_S | PSW_OV);
- PSW |= ((z ? PSW_Z : 0) | (s ? PSW_S : 0));
- trace_output (OP_REG_REG);
-
- return 2;
-}
-
-/* xori zero_extend(imm16), reg, reg */
-int
-OP_6A0 ()
-{
- unsigned int op0, op1, result, z, s;
-
- trace_input ("xori", OP_UIMM16_REG_REG, 0);
- op0 = OP[2];
- op1 = State.regs[ OP[0] ];
- result = op0 ^ op1;
-
- /* Compute the condition codes. */
- z = (result == 0);
- s = (result & 0x80000000);
-
- /* Store the result and condition codes. */
- State.regs[OP[1]] = result;
- PSW &= ~(PSW_Z | PSW_S | PSW_OV);
- PSW |= ((z ? PSW_Z : 0) | (s ? PSW_S : 0));
- trace_output (OP_UIMM16_REG_REG);
-
- return 4;
-}
-
-/* not reg1, reg2 */
-int
-OP_20 ()
-{
- unsigned int op0, result, z, s;
-
- trace_input ("not", OP_REG_REG_MOVE, 0);
- /* Compute the result. */
- op0 = State.regs[ OP[0] ];
- result = ~op0;
-
- /* Compute the condition codes. */
- z = (result == 0);
- s = (result & 0x80000000);
-
- /* Store the result and condition codes. */
- State.regs[OP[1]] = result;
- PSW &= ~(PSW_Z | PSW_S | PSW_OV);
- PSW |= ((z ? PSW_Z : 0) | (s ? PSW_S : 0));
- trace_output (OP_REG_REG_MOVE);
-
- return 2;
-}
-
-/* set1 */
-int
-OP_7C0 ()
-{
- unsigned int op0, op1, op2;
- int temp;
-
- trace_input ("set1", OP_BIT, 0);
- op0 = State.regs[ OP[0] ];
- op1 = OP[1] & 0x7;
- temp = EXTEND16 (OP[2]);
- op2 = temp;
- temp = load_mem (op0 + op2, 1);
- PSW &= ~PSW_Z;
- if ((temp & (1 << op1)) == 0)
- PSW |= PSW_Z;
- temp |= (1 << op1);
- store_mem (op0 + op2, 1, temp);
- trace_output (OP_BIT);
-
- return 4;
-}
-
-/* not1 */
-int
-OP_47C0 ()
-{
- unsigned int op0, op1, op2;
- int temp;
-
- trace_input ("not1", OP_BIT, 0);
- op0 = State.regs[ OP[0] ];
- op1 = OP[1] & 0x7;
- temp = EXTEND16 (OP[2]);
- op2 = temp;
- temp = load_mem (op0 + op2, 1);
- PSW &= ~PSW_Z;
- if ((temp & (1 << op1)) == 0)
- PSW |= PSW_Z;
- temp ^= (1 << op1);
- store_mem (op0 + op2, 1, temp);
- trace_output (OP_BIT);
-
- return 4;
-}
-
-/* clr1 */
-int
-OP_87C0 ()
-{
- unsigned int op0, op1, op2;
- int temp;
-
- trace_input ("clr1", OP_BIT, 0);
- op0 = State.regs[ OP[0] ];
- op1 = OP[1] & 0x7;
- temp = EXTEND16 (OP[2]);
- op2 = temp;
- temp = load_mem (op0 + op2, 1);
- PSW &= ~PSW_Z;
- if ((temp & (1 << op1)) == 0)
- PSW |= PSW_Z;
- temp &= ~(1 << op1);
- store_mem (op0 + op2, 1, temp);
- trace_output (OP_BIT);
-
- return 4;
-}
-
-/* tst1 */
-int
-OP_C7C0 ()
-{
- unsigned int op0, op1, op2;
- int temp;
-
- trace_input ("tst1", OP_BIT, 0);
- op0 = State.regs[ OP[0] ];
- op1 = OP[1] & 0x7;
- temp = EXTEND16 (OP[2]);
- op2 = temp;
- temp = load_mem (op0 + op2, 1);
- PSW &= ~PSW_Z;
- if ((temp & (1 << op1)) == 0)
- PSW |= PSW_Z;
- trace_output (OP_BIT);
-
- return 4;
-}
-
-/* di */
-int
-OP_16007E0 ()
-{
- trace_input ("di", OP_NONE, 0);
- PSW |= PSW_ID;
- trace_output (OP_NONE);
-
- return 4;
-}
-
-/* ei */
-int
-OP_16087E0 ()
-{
- trace_input ("ei", OP_NONE, 0);
- PSW &= ~PSW_ID;
- trace_output (OP_NONE);
-
- return 4;
-}
-
-/* halt */
-int
-OP_12007E0 ()
-{
- trace_input ("halt", OP_NONE, 0);
- /* FIXME this should put processor into a mode where NMI still handled */
- trace_output (OP_NONE);
- sim_engine_halt (simulator, STATE_CPU (simulator, 0), NULL, PC,
- sim_stopped, SIM_SIGTRAP);
- return 0;
-}
-
-/* trap */
-int
-OP_10007E0 ()
-{
- trace_input ("trap", OP_TRAP, 0);
- trace_output (OP_TRAP);
-
- /* Trap 31 is used for simulating OS I/O functions */
-
- if (OP[0] == 31)
- {
- int save_errno = errno;
- errno = 0;
-
-/* Registers passed to trap 0 */
-
-#define FUNC State.regs[6] /* function number, return value */
-#define PARM1 State.regs[7] /* optional parm 1 */
-#define PARM2 State.regs[8] /* optional parm 2 */
-#define PARM3 State.regs[9] /* optional parm 3 */
-
-/* Registers set by trap 0 */
-
-#define RETVAL State.regs[10] /* return value */
-#define RETERR State.regs[11] /* return error code */
-
-/* Turn a pointer in a register into a pointer into real memory. */
-
-#define MEMPTR(x) (map (x))
-
- switch (FUNC)
- {
-
-#ifdef HAVE_FORK
-#ifdef TARGET_SYS_fork
- case TARGET_SYS_fork:
- RETVAL = fork ();
- break;
-#endif
-#endif
-
-#ifdef HAVE_EXECVE
-#ifdef TARGET_SYS_execv
- case TARGET_SYS_execve:
- {
- char *path = fetch_str (simulator, PARM1);
- char **argv = fetch_argv (simulator, PARM2);
- char **envp = fetch_argv (simulator, PARM3);
- RETVAL = execve (path, argv, envp);
- zfree (path);
- freeargv (argv);
- freeargv (envp);
- break;
- }
-#endif
-#endif
-
-#if HAVE_EXECV
-#ifdef TARGET_SYS_execv
- case TARGET_SYS_execv:
- {
- char *path = fetch_str (simulator, PARM1);
- char **argv = fetch_argv (simulator, PARM2);
- RETVAL = execv (path, argv);
- zfree (path);
- freeargv (argv);
- break;
- }
-#endif
-#endif
-
-#if 0
-#ifdef TARGET_SYS_pipe
- case TARGET_SYS_pipe:
- {
- reg_t buf;
- int host_fd[2];
-
- buf = PARM1;
- RETVAL = pipe (host_fd);
- SW (buf, host_fd[0]);
- buf += sizeof(uint16);
- SW (buf, host_fd[1]);
- }
- break;
-#endif
-#endif
-
-#if 0
-#ifdef TARGET_SYS_wait
- case TARGET_SYS_wait:
- {
- int status;
-
- RETVAL = wait (&status);
- SW (PARM1, status);
- }
- break;
-#endif
-#endif
-
-#ifdef TARGET_SYS_read
- case TARGET_SYS_read:
- {
- char *buf = zalloc (PARM3);
- RETVAL = sim_io_read (simulator, PARM1, buf, PARM3);
- sim_write (simulator, PARM2, buf, PARM3);
- zfree (buf);
- break;
- }
-#endif
-
-#ifdef TARGET_SYS_write
- case TARGET_SYS_write:
- {
- char *buf = zalloc (PARM3);
- sim_read (simulator, PARM2, buf, PARM3);
- if (PARM1 == 1)
- RETVAL = sim_io_write_stdout (simulator, buf, PARM3);
- else
- RETVAL = sim_io_write (simulator, PARM1, buf, PARM3);
- zfree (buf);
- break;
- }
-#endif
-
-#ifdef TARGET_SYS_lseek
- case TARGET_SYS_lseek:
- RETVAL = sim_io_lseek (simulator, PARM1, PARM2, PARM3);
- break;
-#endif
-
-#ifdef TARGET_SYS_close
- case TARGET_SYS_close:
- RETVAL = sim_io_close (simulator, PARM1);
- break;
-#endif
-
-#ifdef TARGET_SYS_open
- case TARGET_SYS_open:
- {
- char *buf = fetch_str (simulator, PARM1);
- RETVAL = sim_io_open (simulator, buf, PARM2);
- zfree (buf);
- break;
- }
-#endif
-
-#ifdef TARGET_SYS_exit
- case TARGET_SYS_exit:
- if ((PARM1 & 0xffff0000) == 0xdead0000 && (PARM1 & 0xffff) != 0)
- /* get signal encoded by kill */
- sim_engine_halt (simulator, STATE_CPU (simulator, 0), NULL, PC,
- sim_signalled, PARM1 & 0xffff);
- else if (PARM1 == 0xdead)
- /* old libraries */
- sim_engine_halt (simulator, STATE_CPU (simulator, 0), NULL, PC,
- sim_stopped, SIM_SIGABRT);
- else
- /* PARM1 has exit status */
- sim_engine_halt (simulator, STATE_CPU (simulator, 0), NULL, PC,
- sim_exited, PARM1);
- break;
-#endif
-
-#if !defined(__GO32__) && !defined(_WIN32)
-#ifdef TARGET_SYS_stat
- case TARGET_SYS_stat: /* added at hmsi */
- /* stat system call */
- {
- struct stat host_stat;
- reg_t buf;
- char *path = fetch_str (simulator, PARM1);
-
- RETVAL = stat (path, &host_stat);
-
- zfree (path);
- buf = PARM2;
-
- /* Just wild-assed guesses. */
- store_mem (buf, 2, host_stat.st_dev);
- store_mem (buf + 2, 2, host_stat.st_ino);
- store_mem (buf + 4, 4, host_stat.st_mode);
- store_mem (buf + 8, 2, host_stat.st_nlink);
- store_mem (buf + 10, 2, host_stat.st_uid);
- store_mem (buf + 12, 2, host_stat.st_gid);
- store_mem (buf + 14, 2, host_stat.st_rdev);
- store_mem (buf + 16, 4, host_stat.st_size);
- store_mem (buf + 20, 4, host_stat.st_atime);
- store_mem (buf + 28, 4, host_stat.st_mtime);
- store_mem (buf + 36, 4, host_stat.st_ctime);
- }
- break;
-#endif
-#endif
-
-#ifdef HAVE_CHOWN
-#ifdef TARGET_SYS_chown
- case TARGET_SYS_chown:
- {
- char *path = fetch_str (simulator, PARM1);
- RETVAL = chown (path, PARM2, PARM3);
- zfree (path);
- }
- break;
-#endif
-#endif
-
-#if HAVE_CHMOD
-#ifdef TARGET_SYS_chmod
- case TARGET_SYS_chmod:
- {
- char *path = fetch_str (simulator, PARM1);
- RETVAL = chmod (path, PARM2);
- zfree (path);
- }
- break;
-#endif
-#endif
-
-#ifdef TARGET_SYS_time
-#if HAVE_TIME
- case TARGET_SYS_time:
- {
- time_t now;
- RETVAL = time (&now);
- store_mem (PARM1, 4, now);
- }
- break;
-#endif
-#endif
-
-#if !defined(__GO32__) && !defined(_WIN32)
-#ifdef TARGET_SYS_times
- case TARGET_SYS_times:
- {
- struct tms tms;
- RETVAL = times (&tms);
- store_mem (PARM1, 4, tms.tms_utime);
- store_mem (PARM1 + 4, 4, tms.tms_stime);
- store_mem (PARM1 + 8, 4, tms.tms_cutime);
- store_mem (PARM1 + 12, 4, tms.tms_cstime);
- break;
- }
-#endif
-#endif
-
-#ifdef TARGET_SYS_gettimeofday
-#if !defined(__GO32__) && !defined(_WIN32)
- case TARGET_SYS_gettimeofday:
- {
- struct timeval t;
- struct timezone tz;
- RETVAL = gettimeofday (&t, &tz);
- store_mem (PARM1, 4, t.tv_sec);
- store_mem (PARM1 + 4, 4, t.tv_usec);
- store_mem (PARM2, 4, tz.tz_minuteswest);
- store_mem (PARM2 + 4, 4, tz.tz_dsttime);
- break;
- }
-#endif
-#endif
-
-#ifdef TARGET_SYS_utime
-#if HAVE_UTIME
- case TARGET_SYS_utime:
- {
- /* Cast the second argument to void *, to avoid type mismatch
- if a prototype is present. */
- sim_io_error (simulator, "Utime not supported");
- /* RETVAL = utime (path, (void *) MEMPTR (PARM2)); */
- }
- break;
-#endif
-#endif
-
- default:
- abort ();
- }
- RETERR = errno;
- errno = save_errno;
-
- return 4;
- }
- else
- { /* Trap 0 -> 30 */
- EIPC = PC + 4;
- EIPSW = PSW;
- /* Mask out EICC */
- ECR &= 0xffff0000;
- ECR |= 0x40 + OP[0];
- /* Flag that we are now doing exception processing. */
- PSW |= PSW_EP | PSW_ID;
- PC = ((OP[0] < 0x10) ? 0x40 : 0x50) - 4;
-
- return 0;
- }
-}
-
-/* tst1 reg2, [reg1] */
-int
-OP_E607E0 (void)
-{
- int temp;
-
- trace_input ("tst1", OP_BIT, 1);
-
- temp = load_mem (State.regs[ OP[0] ], 1);
-
- PSW &= ~PSW_Z;
- if ((temp & (1 << State.regs[ OP[1] & 0x7 ])) == 0)
- PSW |= PSW_Z;
-
- trace_output (OP_BIT);
-
- return 4;
-}
-
-/* mulu reg1, reg2, reg3 */
-int
-OP_22207E0 (void)
-{
- trace_input ("mulu", OP_REG_REG_REG, 0);
-
- Multiply64 (false, State.regs[ OP[0] ]);
-
- trace_output (OP_REG_REG_REG);
-
- return 4;
-}
-
-#define BIT_CHANGE_OP( name, binop ) \
- unsigned int bit; \
- unsigned int temp; \
- \
- trace_input (name, OP_BIT_CHANGE, 0); \
- \
- bit = 1 << State.regs[ OP[1] & 0x7 ]; \
- temp = load_mem (State.regs[ OP[0] ], 1); \
- \
- PSW &= ~PSW_Z; \
- if ((temp & bit) == 0) \
- PSW |= PSW_Z; \
- temp binop bit; \
- \
- store_mem (State.regs[ OP[0] ], 1, temp); \
- \
- trace_output (OP_BIT_CHANGE); \
- \
- return 4;
-
-/* clr1 reg2, [reg1] */
-int
-OP_E407E0 (void)
-{
- BIT_CHANGE_OP ("clr1", &= ~ );
-}
-
-/* not1 reg2, [reg1] */
-int
-OP_E207E0 (void)
-{
- BIT_CHANGE_OP ("not1", ^= );
-}
-
-/* set1 */
-int
-OP_E007E0 (void)
-{
- BIT_CHANGE_OP ("set1", |= );
-}
-
-/* sasf */
-int
-OP_20007E0 (void)
-{
- trace_input ("sasf", OP_EX1, 0);
-
- State.regs[ OP[1] ] = (State.regs[ OP[1] ] << 1) | condition_met (OP[0]);
-
- trace_output (OP_EX1);
-
- return 4;
-}
-
-/* This function is courtesy of Sugimoto at NEC, via Seow Tan
- (Soew_Tan@el.nec.com) */
-void
-divun
-(
- unsigned int N,
- unsigned long int als,
- unsigned long int sfi,
- unsigned32 /*unsigned long int*/ * quotient_ptr,
- unsigned32 /*unsigned long int*/ * remainder_ptr,
- boolean * overflow_ptr
-)
-{
- unsigned long ald = sfi >> (N - 1);
- unsigned long alo = als;
- unsigned int Q = 1;
- unsigned int C;
- unsigned int S = 0;
- unsigned int i;
- unsigned int R1 = 1;
- unsigned int DBZ = (als == 0) ? 1 : 0;
- unsigned long alt = Q ? ~als : als;
-
- /* 1st Loop */
- alo = ald + alt + Q;
- C = (((alt >> 31) & (ald >> 31))
- | (((alt >> 31) ^ (ald >> 31)) & (~alo >> 31)));
- C = C ^ Q;
- Q = ~(C ^ S) & 1;
- R1 = (alo == 0) ? 0 : (R1 & Q);
- if ((S ^ (alo>>31)) && !C)
- {
- DBZ = 1;
- }
- S = alo >> 31;
- sfi = (sfi << (32-N+1)) | Q;
- ald = (alo << 1) | (sfi >> 31);
-
- /* 2nd - N-1th Loop */
- for (i = 2; i < N; i++)
- {
- alt = Q ? ~als : als;
- alo = ald + alt + Q;
- C = (((alt >> 31) & (ald >> 31))
- | (((alt >> 31) ^ (ald >> 31)) & (~alo >> 31)));
- C = C ^ Q;
- Q = ~(C ^ S) & 1;
- R1 = (alo == 0) ? 0 : (R1 & Q);
- if ((S ^ (alo>>31)) && !C && !DBZ)
- {
- DBZ = 1;
- }
- S = alo >> 31;
- sfi = (sfi << 1) | Q;
- ald = (alo << 1) | (sfi >> 31);
- }
-
- /* Nth Loop */
- alt = Q ? ~als : als;
- alo = ald + alt + Q;
- C = (((alt >> 31) & (ald >> 31))
- | (((alt >> 31) ^ (ald >> 31)) & (~alo >> 31)));
- C = C ^ Q;
- Q = ~(C ^ S) & 1;
- R1 = (alo == 0) ? 0 : (R1 & Q);
- if ((S ^ (alo>>31)) && !C)
- {
- DBZ = 1;
- }
-
- * quotient_ptr = (sfi << 1) | Q;
- * remainder_ptr = Q ? alo : (alo + als);
- * overflow_ptr = DBZ | R1;
-}
-
-/* This function is courtesy of Sugimoto at NEC, via Seow Tan (Soew_Tan@el.nec.com) */
-void
-divn
-(
- unsigned int N,
- unsigned long int als,
- unsigned long int sfi,
- signed32 /*signed long int*/ * quotient_ptr,
- signed32 /*signed long int*/ * remainder_ptr,
- boolean * overflow_ptr
-)
-{
- unsigned long ald = (signed long) sfi >> (N - 1);
- unsigned long alo = als;
- unsigned int SS = als >> 31;
- unsigned int SD = sfi >> 31;
- unsigned int R1 = 1;
- unsigned int OV;
- unsigned int DBZ = als == 0 ? 1 : 0;
- unsigned int Q = ~(SS ^ SD) & 1;
- unsigned int C;
- unsigned int S;
- unsigned int i;
- unsigned long alt = Q ? ~als : als;
-
-
- /* 1st Loop */
-
- alo = ald + alt + Q;
- C = (((alt >> 31) & (ald >> 31))
- | (((alt >> 31) ^ (ald >> 31)) & (~alo >> 31)));
- Q = C ^ SS;
- R1 = (alo == 0) ? 0 : (R1 & (Q ^ (SS ^ SD)));
- S = alo >> 31;
- sfi = (sfi << (32-N+1)) | Q;
- ald = (alo << 1) | (sfi >> 31);
- if ((alo >> 31) ^ (ald >> 31))
- {
- DBZ = 1;
- }
-
- /* 2nd - N-1th Loop */
-
- for (i = 2; i < N; i++)
- {
- alt = Q ? ~als : als;
- alo = ald + alt + Q;
- C = (((alt >> 31) & (ald >> 31))
- | (((alt >> 31) ^ (ald >> 31)) & (~alo >> 31)));
- Q = C ^ SS;
- R1 = (alo == 0) ? 0 : (R1 & (Q ^ (SS ^ SD)));
- S = alo >> 31;
- sfi = (sfi << 1) | Q;
- ald = (alo << 1) | (sfi >> 31);
- if ((alo >> 31) ^ (ald >> 31))
- {
- DBZ = 1;
- }
- }
-
- /* Nth Loop */
- alt = Q ? ~als : als;
- alo = ald + alt + Q;
- C = (((alt >> 31) & (ald >> 31))
- | (((alt >> 31) ^ (ald >> 31)) & (~alo >> 31)));
- Q = C ^ SS;
- R1 = (alo == 0) ? 0 : (R1 & (Q ^ (SS ^ SD)));
- sfi = (sfi << (32-N+1));
- ald = alo;
-
- /* End */
- if (alo != 0)
- {
- alt = Q ? ~als : als;
- alo = ald + alt + Q;
- }
- R1 = R1 & ((~alo >> 31) ^ SD);
- if ((alo != 0) && ((Q ^ (SS ^ SD)) ^ R1)) alo = ald;
- if (N != 32)
- ald = sfi = (long) ((sfi >> 1) | (SS ^ SD) << 31) >> (32-N-1) | Q;
- else
- ald = sfi = sfi | Q;
-
- OV = DBZ | ((alo == 0) ? 0 : R1);
-
- * remainder_ptr = alo;
-
- /* Adj */
- if (((alo != 0) && ((SS ^ SD) ^ R1))
- || ((alo == 0) && (SS ^ R1)))
- alo = ald + 1;
- else
- alo = ald;
-
- OV = (DBZ | R1) ? OV : ((alo >> 31) & (~ald >> 31));
-
- * quotient_ptr = alo;
- * overflow_ptr = OV;
-}
-
-/* sdivun imm5, reg1, reg2, reg3 */
-int
-OP_1C207E0 (void)
-{
- unsigned32 /*unsigned long int*/ quotient;
- unsigned32 /*unsigned long int*/ remainder;
- unsigned long int divide_by;
- unsigned long int divide_this;
- boolean overflow = false;
- unsigned int imm5;
-
- trace_input ("sdivun", OP_IMM_REG_REG_REG, 0);
-
- imm5 = 32 - ((OP[3] & 0x3c0000) >> 17);
-
- divide_by = State.regs[ OP[0] ];
- divide_this = State.regs[ OP[1] ] << imm5;
-
- divun (imm5, divide_by, divide_this, & quotient, & remainder, & overflow);
-
- State.regs[ OP[1] ] = quotient;
- State.regs[ OP[2] >> 11 ] = remainder;
-
- /* Set condition codes. */
- PSW &= ~(PSW_Z | PSW_S | PSW_OV);
-
- if (overflow) PSW |= PSW_OV;
- if (quotient == 0) PSW |= PSW_Z;
- if (quotient & 0x80000000) PSW |= PSW_S;
-
- trace_output (OP_IMM_REG_REG_REG);
-
- return 4;
-}
-
-/* sdivn imm5, reg1, reg2, reg3 */
-int
-OP_1C007E0 (void)
-{
- signed32 /*signed long int*/ quotient;
- signed32 /*signed long int*/ remainder;
- signed long int divide_by;
- signed long int divide_this;
- boolean overflow = false;
- unsigned int imm5;
-
- trace_input ("sdivn", OP_IMM_REG_REG_REG, 0);
-
- imm5 = 32 - ((OP[3] & 0x3c0000) >> 17);
-
- divide_by = State.regs[ OP[0] ];
- divide_this = State.regs[ OP[1] ] << imm5;
-
- divn (imm5, divide_by, divide_this, & quotient, & remainder, & overflow);
-
- State.regs[ OP[1] ] = quotient;
- State.regs[ OP[2] >> 11 ] = remainder;
-
- /* Set condition codes. */
- PSW &= ~(PSW_Z | PSW_S | PSW_OV);
-
- if (overflow) PSW |= PSW_OV;
- if (quotient == 0) PSW |= PSW_Z;
- if (quotient < 0) PSW |= PSW_S;
-
- trace_output (OP_IMM_REG_REG_REG);
-
- return 4;
-}
-
-/* sdivhun imm5, reg1, reg2, reg3 */
-int
-OP_18207E0 (void)
-{
- unsigned32 /*unsigned long int*/ quotient;
- unsigned32 /*unsigned long int*/ remainder;
- unsigned long int divide_by;
- unsigned long int divide_this;
- boolean overflow = false;
- unsigned int imm5;
-
- trace_input ("sdivhun", OP_IMM_REG_REG_REG, 0);
-
- imm5 = 32 - ((OP[3] & 0x3c0000) >> 17);
-
- divide_by = State.regs[ OP[0] ] & 0xffff;
- divide_this = State.regs[ OP[1] ] << imm5;
-
- divun (imm5, divide_by, divide_this, & quotient, & remainder, & overflow);
-
- State.regs[ OP[1] ] = quotient;
- State.regs[ OP[2] >> 11 ] = remainder;
-
- /* Set condition codes. */
- PSW &= ~(PSW_Z | PSW_S | PSW_OV);
-
- if (overflow) PSW |= PSW_OV;
- if (quotient == 0) PSW |= PSW_Z;
- if (quotient & 0x80000000) PSW |= PSW_S;
-
- trace_output (OP_IMM_REG_REG_REG);
-
- return 4;
-}
-
-/* sdivhn imm5, reg1, reg2, reg3 */
-int
-OP_18007E0 (void)
-{
- signed32 /*signed long int*/ quotient;
- signed32 /*signed long int*/ remainder;
- signed long int divide_by;
- signed long int divide_this;
- boolean overflow = false;
- unsigned int imm5;
-
- trace_input ("sdivhn", OP_IMM_REG_REG_REG, 0);
-
- imm5 = 32 - ((OP[3] & 0x3c0000) >> 17);
-
- divide_by = EXTEND16 (State.regs[ OP[0] ]);
- divide_this = State.regs[ OP[1] ] << imm5;
-
- divn (imm5, divide_by, divide_this, & quotient, & remainder, & overflow);
-
- State.regs[ OP[1] ] = quotient;
- State.regs[ OP[2] >> 11 ] = remainder;
-
- /* Set condition codes. */
- PSW &= ~(PSW_Z | PSW_S | PSW_OV);
-
- if (overflow) PSW |= PSW_OV;
- if (quotient == 0) PSW |= PSW_Z;
- if (quotient < 0) PSW |= PSW_S;
-
- trace_output (OP_IMM_REG_REG_REG);
-
- return 4;
-}
-
-/* divu reg1, reg2, reg3 */
-int
-OP_2C207E0 (void)
-{
- unsigned long int quotient;
- unsigned long int remainder;
- unsigned long int divide_by;
- unsigned long int divide_this;
- boolean overflow = false;
-
- trace_input ("divu", OP_REG_REG_REG, 0);
-
- /* Compute the result. */
-
- divide_by = State.regs[ OP[0] ];
- divide_this = State.regs[ OP[1] ];
-
- if (divide_by == 0)
- {
- overflow = true;
- divide_by = 1;
- }
-
- State.regs[ OP[1] ] = quotient = divide_this / divide_by;
- State.regs[ OP[2] >> 11 ] = remainder = divide_this % divide_by;
-
- /* Set condition codes. */
- PSW &= ~(PSW_Z | PSW_S | PSW_OV);
-
- if (overflow) PSW |= PSW_OV;
- if (quotient == 0) PSW |= PSW_Z;
- if (quotient & 0x80000000) PSW |= PSW_S;
-
- trace_output (OP_REG_REG_REG);
-
- return 4;
-}
-
-/* div reg1, reg2, reg3 */
-int
-OP_2C007E0 (void)
-{
- signed long int quotient;
- signed long int remainder;
- signed long int divide_by;
- signed long int divide_this;
- boolean overflow = false;
-
- trace_input ("div", OP_REG_REG_REG, 0);
-
- /* Compute the result. */
-
- divide_by = State.regs[ OP[0] ];
- divide_this = State.regs[ OP[1] ];
-
- if (divide_by == 0 || (divide_by == -1 && divide_this == (1 << 31)))
- {
- overflow = true;
- divide_by = 1;
- }
-
- State.regs[ OP[1] ] = quotient = divide_this / divide_by;
- State.regs[ OP[2] >> 11 ] = remainder = divide_this % divide_by;
-
- /* Set condition codes. */
- PSW &= ~(PSW_Z | PSW_S | PSW_OV);
-
- if (overflow) PSW |= PSW_OV;
- if (quotient == 0) PSW |= PSW_Z;
- if (quotient < 0) PSW |= PSW_S;
-
- trace_output (OP_REG_REG_REG);
-
- return 4;
-}
-
-/* divhu reg1, reg2, reg3 */
-int
-OP_28207E0 (void)
-{
- unsigned long int quotient;
- unsigned long int remainder;
- unsigned long int divide_by;
- unsigned long int divide_this;
- boolean overflow = false;
-
- trace_input ("divhu", OP_REG_REG_REG, 0);
-
- /* Compute the result. */
-
- divide_by = State.regs[ OP[0] ] & 0xffff;
- divide_this = State.regs[ OP[1] ];
-
- if (divide_by == 0)
- {
- overflow = true;
- divide_by = 1;
- }
-
- State.regs[ OP[1] ] = quotient = divide_this / divide_by;
- State.regs[ OP[2] >> 11 ] = remainder = divide_this % divide_by;
-
- /* Set condition codes. */
- PSW &= ~(PSW_Z | PSW_S | PSW_OV);
-
- if (overflow) PSW |= PSW_OV;
- if (quotient == 0) PSW |= PSW_Z;
- if (quotient & 0x80000000) PSW |= PSW_S;
-
- trace_output (OP_REG_REG_REG);
-
- return 4;
-}
-
-/* divh reg1, reg2, reg3 */
-int
-OP_28007E0 (void)
-{
- signed long int quotient;
- signed long int remainder;
- signed long int divide_by;
- signed long int divide_this;
- boolean overflow = false;
-
- trace_input ("divh", OP_REG_REG_REG, 0);
-
- /* Compute the result. */
-
- divide_by = State.regs[ OP[0] ];
- divide_this = EXTEND16 (State.regs[ OP[1] ]);
-
- if (divide_by == 0 || (divide_by == -1 && divide_this == (1 << 31)))
- {
- overflow = true;
- divide_by = 1;
- }
-
- State.regs[ OP[1] ] = quotient = divide_this / divide_by;
- State.regs[ OP[2] >> 11 ] = remainder = divide_this % divide_by;
-
- /* Set condition codes. */
- PSW &= ~(PSW_Z | PSW_S | PSW_OV);
-
- if (overflow) PSW |= PSW_OV;
- if (quotient == 0) PSW |= PSW_Z;
- if (quotient < 0) PSW |= PSW_S;
-
- trace_output (OP_REG_REG_REG);
-
- return 4;
-}
-
-/* mulu imm9, reg2, reg3 */
-int
-OP_24207E0 (void)
-{
- trace_input ("mulu", OP_IMM_REG_REG, 0);
-
- Multiply64 (false, (OP[3] & 0x1f) | ((OP[3] >> 13) & 0x1e0));
-
- trace_output (OP_IMM_REG_REG);
-
- return 4;
-}
-
-/* mul imm9, reg2, reg3 */
-int
-OP_24007E0 (void)
-{
- trace_input ("mul", OP_IMM_REG_REG, 0);
-
- Multiply64 (true, (OP[3] & 0x1f) | ((OP[3] >> 13) & 0x1e0));
-
- trace_output (OP_IMM_REG_REG);
-
- return 4;
-}
-
-/* ld.hu */
-int
-OP_107E0 (void)
-{
- int adr;
-
- trace_input ("ld.hu", OP_LOAD32, 2);
-
- adr = State.regs[ OP[0] ] + EXTEND16 (OP[2] & ~1);
- adr &= ~0x1;
-
- State.regs[ OP[1] ] = load_mem (adr, 2);
-
- trace_output (OP_LOAD32);
-
- return 4;
-}
-
-
-/* ld.bu */
-int
-OP_10780 (void)
-{
- int adr;
-
- trace_input ("ld.bu", OP_LOAD32, 1);
-
- adr = (State.regs[ OP[0] ]
- + (EXTEND16 (OP[2] & ~1) | ((OP[3] >> 5) & 1)));
-
- State.regs[ OP[1] ] = load_mem (adr, 1);
-
- trace_output (OP_LOAD32);
-
- return 4;
-}
-
-/* prepare list12, imm5, imm32 */
-int
-OP_1B0780 (void)
-{
- int i;
-
- trace_input ("prepare", OP_PUSHPOP1, 0);
-
- /* Store the registers with lower number registers being placed at higher addresses. */
- for (i = 0; i < 12; i++)
- if ((OP[3] & (1 << type1_regs[ i ])))
- {
- SP -= 4;
- store_mem (SP, 4, State.regs[ 20 + i ]);
- }
-
- SP -= (OP[3] & 0x3e) << 1;
-
- EP = load_mem (PC + 4, 4);
-
- trace_output (OP_PUSHPOP1);
-
- return 8;
-}
-
-/* prepare list12, imm5, imm16-32 */
-int
-OP_130780 (void)
-{
- int i;
-
- trace_input ("prepare", OP_PUSHPOP1, 0);
-
- /* Store the registers with lower number registers being placed at higher addresses. */
- for (i = 0; i < 12; i++)
- if ((OP[3] & (1 << type1_regs[ i ])))
- {
- SP -= 4;
- store_mem (SP, 4, State.regs[ 20 + i ]);
- }
-
- SP -= (OP[3] & 0x3e) << 1;
-
- EP = load_mem (PC + 4, 2) << 16;
-
- trace_output (OP_PUSHPOP1);
-
- return 6;
-}
-
-/* prepare list12, imm5, imm16 */
-int
-OP_B0780 (void)
-{
- int i;
-
- trace_input ("prepare", OP_PUSHPOP1, 0);
-
- /* Store the registers with lower number registers being placed at higher addresses. */
- for (i = 0; i < 12; i++)
- if ((OP[3] & (1 << type1_regs[ i ])))
- {
- SP -= 4;
- store_mem (SP, 4, State.regs[ 20 + i ]);
- }
-
- SP -= (OP[3] & 0x3e) << 1;
-
- EP = EXTEND16 (load_mem (PC + 4, 2));
-
- trace_output (OP_PUSHPOP1);
-
- return 6;
-}
-
-/* prepare list12, imm5, sp */
-int
-OP_30780 (void)
-{
- int i;
-
- trace_input ("prepare", OP_PUSHPOP1, 0);
-
- /* Store the registers with lower number registers being placed at higher addresses. */
- for (i = 0; i < 12; i++)
- if ((OP[3] & (1 << type1_regs[ i ])))
- {
- SP -= 4;
- store_mem (SP, 4, State.regs[ 20 + i ]);
- }
-
- SP -= (OP[3] & 0x3e) << 1;
-
- EP = SP;
-
- trace_output (OP_PUSHPOP1);
-
- return 4;
-}
-
-/* mul reg1, reg2, reg3 */
-int
-OP_22007E0 (void)
-{
- trace_input ("mul", OP_REG_REG_REG, 0);
-
- Multiply64 (true, State.regs[ OP[0] ]);
-
- trace_output (OP_REG_REG_REG);
-
- return 4;
-}
-
-/* popmh list18 */
-int
-OP_307F0 (void)
-{
- int i;
-
- trace_input ("popmh", OP_PUSHPOP2, 0);
-
- if (OP[3] & (1 << 19))
- {
- if ((PSW & PSW_NP) && ((PSW & PSW_EP) == 0))
- {
- FEPSW = load_mem ( SP & ~ 3, 4);
- FEPC = load_mem ((SP + 4) & ~ 3, 4);
- }
- else
- {
- EIPSW = load_mem ( SP & ~ 3, 4);
- EIPC = load_mem ((SP + 4) & ~ 3, 4);
- }
-
- SP += 8;
- }
-
- /* Load the registers with lower number registers being retrieved from higher addresses. */
- for (i = 16; i--;)
- if ((OP[3] & (1 << type2_regs[ i ])))
- {
- State.regs[ i + 16 ] = load_mem (SP & ~ 3, 4);
- SP += 4;
- }
-
- trace_output (OP_PUSHPOP2);
-
- return 4;
-}
-
-/* popml lsit18 */
-int
-OP_107F0 (void)
-{
- int i;
-
- trace_input ("popml", OP_PUSHPOP3, 0);
-
- if (OP[3] & (1 << 19))
- {
- if ((PSW & PSW_NP) && ((PSW & PSW_EP) == 0))
- {
- FEPSW = load_mem ( SP & ~ 3, 4);
- FEPC = load_mem ((SP + 4) & ~ 3, 4);
- }
- else
- {
- EIPSW = load_mem ( SP & ~ 3, 4);
- EIPC = load_mem ((SP + 4) & ~ 3, 4);
- }
-
- SP += 8;
- }
-
- if (OP[3] & (1 << 3))
- {
- PSW = load_mem (SP & ~ 3, 4);
- SP += 4;
- }
-
- /* Load the registers with lower number registers being retrieved from higher addresses. */
- for (i = 15; i--;)
- if ((OP[3] & (1 << type3_regs[ i ])))
- {
- State.regs[ i + 1 ] = load_mem (SP & ~ 3, 4);
- SP += 4;
- }
-
- trace_output (OP_PUSHPOP2);
-
- return 4;
-}
-
-/* pushmh list18 */
-int
-OP_307E0 (void)
-{
- int i;
-
- trace_input ("pushmh", OP_PUSHPOP2, 0);
-
- /* Store the registers with lower number registers being placed at higher addresses. */
- for (i = 0; i < 16; i++)
- if ((OP[3] & (1 << type2_regs[ i ])))
- {
- SP -= 4;
- store_mem (SP & ~ 3, 4, State.regs[ i + 16 ]);
- }
-
- if (OP[3] & (1 << 19))
- {
- SP -= 8;
-
- if ((PSW & PSW_NP) && ((PSW & PSW_EP) == 0))
- {
- store_mem ((SP + 4) & ~ 3, 4, FEPC);
- store_mem ( SP & ~ 3, 4, FEPSW);
- }
- else
- {
- store_mem ((SP + 4) & ~ 3, 4, EIPC);
- store_mem ( SP & ~ 3, 4, EIPSW);
- }
- }
-
- trace_output (OP_PUSHPOP2);
-
- return 4;
-}
-
diff --git a/sim/v850/v850-dc b/sim/v850/v850-dc
deleted file mode 100644
index 997a3750f11..00000000000
--- a/sim/v850/v850-dc
+++ /dev/null
@@ -1,30 +0,0 @@
-# most instructions
-# ------ options ------ : Fst : Lst : ff : fl : fe : word : --- fmt --- : model ...
-# { : mask : value : word }
-
-# Top level - create a very big switch statement.
-
- padded-switch,combine : 15 : 5 : : : : 0 : :
-
-
-# for opcode 60,124
-
- switch,combine : 4 : 0 : : : : 1 : V,VII :
- switch,combine : 4 : 0 : : : : 1 : V,XIII : v850e
- switch,combine : 4 : 0 : : : : 1 : V,XIII : v850ea
-
-
-# for opcode 63, 127, 1087 et.al.
-
- switch,combine : 9 : 5 : : : : 1 : :
- switch,combine : 4 : 0 : : : : 1 : :
-
-
-# for opcode 40 et.al.
-
- switch,combine : 4 : 0 : : : : 0 : III,IV :
- switch,combine : 4 : 0 : : : : 0 : III,IV,XIV : v850ea
-
-# for opcode 66 - divh/break
-
- switch,combine : 4 : 0 : : : : 0 : I :
diff --git a/sim/v850/v850.igen b/sim/v850/v850.igen
deleted file mode 100644
index 34fa43f2648..00000000000
--- a/sim/v850/v850.igen
+++ /dev/null
@@ -1,1418 +0,0 @@
-:option:::insn-bit-size:16
-:option:::hi-bit-nr:15
-
-
-:option:::format-names:I,II,III,IV,V,VI,VII,VIII,IX,X
-:option:::format-names:XI,XII,XIII
-:option:::format-names:XIV,XV
-:option:::format-names:Z
-
-
-:model:::v850:v850:
-
-:option:::multi-sim:true
-:model:::v850e:v850e:
-
-:option:::multi-sim:true
-:model:::v850ea:v850ea:
-
-
-
-// Cache macros
-
-:cache:::unsigned:reg1:RRRRR:(RRRRR)
-:cache:::unsigned:reg2:rrrrr:(rrrrr)
-:cache:::unsigned:reg3:wwwww:(wwwww)
-
-:cache:::unsigned:disp4:dddd:(dddd)
-:cache:::unsigned:disp5:dddd:(dddd << 1)
-:cache:::unsigned:disp7:ddddddd:ddddddd
-:cache:::unsigned:disp8:ddddddd:(ddddddd << 1)
-:cache:::unsigned:disp8:dddddd:(dddddd << 2)
-:cache:::unsigned:disp9:ddddd,ddd:SEXT32 ((ddddd << 4) + (ddd << 1), 9 - 1)
-:cache:::unsigned:disp16:dddddddddddddddd:EXTEND16 (dddddddddddddddd)
-:cache:::unsigned:disp16:ddddddddddddddd: EXTEND16 (ddddddddddddddd << 1)
-:cache:::unsigned:disp22:dddddd,ddddddddddddddd: SEXT32 ((dddddd << 16) + (ddddddddddddddd << 1), 22 - 1)
-
-:cache:::unsigned:imm5:iiiii:SEXT32 (iiiii, 4)
-:cache:::unsigned:imm6:iiiiii:iiiiii
-:cache:::unsigned:imm9:iiiii,IIII:SEXT ((IIII << 5) + iiiii, 9 - 1)
-:cache:::unsigned:imm5:iiii:(32 - (iiii << 1))
-:cache:::unsigned:simm16:iiiiiiiiiiiiiiii:EXTEND16 (iiiiiiiiiiiiiiii)
-:cache:::unsigned:uimm16:iiiiiiiiiiiiiiii:iiiiiiiiiiiiiiii
-:cache:::unsigned:imm32:iiiiiiiiiiiiiiii,IIIIIIIIIIIIIIII:(iiiiiiiiiiiiiiii < 16 + IIIIIIIIIIIIIIII)
-:cache:::unsigned:uimm32:iiiiiiiiiiiiiiii,dddddddddddddddd:((iiiiiiiiiiiiiiii << 16) + dddddddddddddddd)
-
-:cache:::unsigned:vector:iiiii:iiiii
-
-:cache:::unsigned:list12:L,LLLLLLLLLLL:((L << 11) + LLLLLLLLLLL)
-:cache:::unsigned:list18:LLLL,LLLLLLLLLLLL:((LLLL << 12) + LLLLLLLLLLLL)
-
-:cache:::unsigned:bit3:bbb:bbb
-
-
-// What do we do with an illegal instruction?
-:internal::::illegal:
-{
- sim_io_eprintf (SD, "Illegal instruction at address 0x%lx\n",
- (unsigned long) cia);
- sim_engine_halt (SD, CPU, NULL, cia, sim_signalled, SIM_SIGILL);
-}
-
-
-
-// Add
-
-rrrrr,001110,RRRRR:I:::add
-"add r<reg1>, r<reg2>"
-{
- COMPAT_1 (OP_1C0 ());
-}
-
-rrrrr,010010,iiiii:II:::add
-"add <imm5>,r<reg2>"
-{
- COMPAT_1 (OP_240 ());
-}
-
-
-
-// ADDI
-rrrrr,110000,RRRRR + iiiiiiiiiiiiiiii:VI:::addi
-"addi <simm16>, r<reg1>, r<reg2>"
-{
- COMPAT_2 (OP_600 ());
-}
-
-
-
-// AND
-rrrrr,001010,RRRRR:I:::and
-"and r<reg1>, r<reg2>"
-{
- COMPAT_1 (OP_140 ());
-}
-
-
-
-// ANDI
-rrrrr,110110,RRRRR + iiiiiiiiiiiiiiii:VI:::andi
-"andi <uimm16>, r<reg1>, r<reg2>"
-{
- COMPAT_2 (OP_6C0 ());
-}
-
-
-
-// Map condition code to a string
-:%s::::cccc:int cccc
-{
- switch (cccc)
- {
- case 0xf: return "gt";
- case 0xe: return "ge";
- case 0x6: return "lt";
-
- case 0x7: return "le";
-
- case 0xb: return "h";
- case 0x9: return "nl";
- case 0x1: return "l";
-
- case 0x3: return "nh";
-
- case 0x2: return "e";
-
- case 0xa: return "ne";
-
- case 0x0: return "v";
- case 0x8: return "nv";
- case 0x4: return "n";
- case 0xc: return "p";
- /* case 0x1: return "c"; */
- /* case 0x9: return "nc"; */
- /* case 0x2: return "z"; */
- /* case 0xa: return "nz"; */
- case 0x5: return "r"; /* always */
- case 0xd: return "sa";
- }
- return "(null)";
-}
-
-
-// Bcond
-ddddd,1011,ddd,cccc:III:::Bcond
-"b%s<cccc> <disp9>"
-{
- int cond;
- if ((ddddd == 0x00) && (ddd == 0x00) && (cccc == 0x05)) {
- // Special case - treat "br *" like illegal instruction
- sim_engine_halt (SD, CPU, NULL, cia, sim_stopped, SIM_SIGTRAP);
- } else {
- cond = condition_met (cccc);
- if (cond)
- nia = cia + disp9;
- TRACE_BRANCH1 (cond);
- }
-}
-
-
-
-// BSH
-rrrrr,11111100000 + wwwww,01101000010:XII:::bsh
-*v850e
-*v850ea
-"bsh r<reg2>, r<reg3>"
-{
- unsigned32 value;
- TRACE_ALU_INPUT1 (GR[reg2]);
-
- value = (MOVED32 (GR[reg2], 23, 16, 31, 24)
- | MOVED32 (GR[reg2], 31, 24, 23, 16)
- | MOVED32 (GR[reg2], 7, 0, 15, 8)
- | MOVED32 (GR[reg2], 15, 8, 7, 0));
-
- GR[reg3] = value;
- PSW &= ~(PSW_Z | PSW_S | PSW_CY | PSW_OV);
- if (value == 0) PSW |= PSW_Z;
- if (value & 0x80000000) PSW |= PSW_S;
- if (((value & 0xff) == 0) || (value & 0x00ff) == 0) PSW |= PSW_CY;
-
- TRACE_ALU_RESULT (GR[reg3]);
-}
-
-// BSW
-rrrrr,11111100000 + wwwww,01101000000:XII:::bsw
-*v850e
-*v850ea
-"bsw r<reg2>, r<reg3>"
-{
-#define WORDHASNULLBYTE(x) (((x) - 0x01010101) & ~(x)&0x80808080)
- unsigned32 value;
- TRACE_ALU_INPUT1 (GR[reg2]);
-
- value = GR[reg2];
- value >>= 24;
- value |= (GR[reg2] << 24);
- value |= ((GR[reg2] << 8) & 0x00ff0000);
- value |= ((GR[reg2] >> 8) & 0x0000ff00);
- GR[reg3] = value;
-
- PSW &= ~(PSW_Z | PSW_S | PSW_CY | PSW_OV);
-
- if (value == 0) PSW |= PSW_Z;
- if (value & 0x80000000) PSW |= PSW_S;
- if (WORDHASNULLBYTE (value)) PSW |= PSW_CY;
-
- TRACE_ALU_RESULT (GR[reg3]);
-}
-
-// CALLT
-0000001000,iiiiii:II:::callt
-*v850e
-*v850ea
-"callt <imm6>"
-{
- unsigned32 adr;
- unsigned32 off;
- CTPC = cia + 2;
- CTPSW = PSW;
- adr = (CTBP & ~1) + (imm6 << 1);
- off = load_mem (adr, 2) & ~1; /* Force alignment */
- nia = (CTBP & ~1) + off;
- TRACE_BRANCH3 (adr, CTBP, off);
-}
-
-
-// CLR1
-10,bbb,111110,RRRRR + dddddddddddddddd:VIII:::clr1
-"clr1 <bit3>, <disp16>[r<reg1>]"
-{
- COMPAT_2 (OP_87C0 ());
-}
-
-rrrrr,111111,RRRRR + 0000000011100100:IX:::clr1
-*v850e
-*v850ea
-"clr1 r<reg2>, [r<reg1>]"
-{
- COMPAT_2 (OP_E407E0 ());
-}
-
-
-// CTRET
-0000011111100000 + 0000000101000100:X:::ctret
-*v850e
-*v850ea
-"ctret"
-{
- nia = (CTPC & ~1);
- PSW = (CTPSW & (CPU)->psw_mask);
- TRACE_BRANCH1 (PSW);
-}
-
-// CMOV
-rrrrr,111111,RRRRR + wwwww,011001,cccc,0:XI:::cmov
-*v850e
-*v850ea
-"cmov %s<cccc>, r<reg1>, r<reg2>, r<reg3>"
-{
- int cond = condition_met (cccc);
- TRACE_ALU_INPUT3 (cond, GR[reg1], GR[reg2]);
- GR[reg3] = cond ? GR[reg1] : GR[reg2];
- TRACE_ALU_RESULT (GR[reg3]);
-}
-
-rrrrr,111111,iiiii + wwwww,011000,cccc,0:XII:::cmov
-*v850e
-*v850ea
-"cmov %s<cccc>, <imm5>, r<reg2>, r<reg3>"
-{
- int cond = condition_met (cccc);
- TRACE_ALU_INPUT3 (cond, imm5, GR[reg2]);
- GR[reg3] = cond ? imm5 : GR[reg2];
- TRACE_ALU_RESULT (GR[reg3]);
-}
-
-// CMP
-rrrrr,001111,RRRRR:I:::cmp
-"cmp r<reg1>, r<reg2>"
-{
- COMPAT_1 (OP_1E0 ());
-}
-
-rrrrr,010011,iiiii:II:::cmp
-"cmp <imm5>, r<reg2>"
-{
- COMPAT_1 (OP_260 ());
-}
-
-
-
-// DI
-0000011111100000 + 0000000101100000:X:::di
-"di"
-{
- COMPAT_2 (OP_16007E0 ());
-}
-
-
-
-// DISPOSE
-// 0000011001,iiiii,L + LLLLLLLLLLL,00000:XIII:::dispose
-// "dispose <imm5>, <list12>"
-0000011001,iiiii,L + LLLLLLLLLLL,RRRRR:XIII:::dispose
-*v850e
-*v850ea
-"dispose <imm5>, <list12>":RRRRR == 0
-"dispose <imm5>, <list12>, [reg1]"
-{
- int i;
- SAVE_2;
-
- trace_input ("dispose", OP_PUSHPOP1, 0);
-
- SP += (OP[3] & 0x3e) << 1;
-
- /* Load the registers with lower number registers being retrieved
- from higher addresses. */
- for (i = 12; i--;)
- if ((OP[3] & (1 << type1_regs[ i ])))
- {
- State.regs[ 20 + i ] = load_mem (SP, 4);
- SP += 4;
- }
-
- if ((OP[3] & 0x1f0000) != 0)
- {
- nia = State.regs[ (OP[3] >> 16) & 0x1f];
- }
-
- trace_output (OP_PUSHPOP1);
-}
-
-
-// DIV
-rrrrr,111111,RRRRR + wwwww,01011000000:XI:::div
-*v850e
-"div r<reg1>, r<reg2>, r<reg3>"
-{
- COMPAT_2 (OP_2C007E0 ());
-}
-
-
-// DIVH
-rrrrr!0,000010,RRRRR!0:I:::divh
-"divh r<reg1>, r<reg2>"
-{
- COMPAT_1 (OP_40 ());
-}
-
-rrrrr,111111,RRRRR + wwwww,01010000000:XI:::divh
-*v850e
-"divh r<reg1>, r<reg2>, r<reg3>"
-{
- COMPAT_2 (OP_28007E0 ());
-}
-
-
-// DIVHU
-rrrrr,111111,RRRRR + wwwww,01010000010:XI:::divhu
-*v850e
-"divhu r<reg1>, r<reg2>, r<reg3>"
-{
- COMPAT_2 (OP_28207E0 ());
-}
-
-
-// DIVU
-rrrrr,111111,RRRRR + wwwww,01011000010:XI:::divu
-*v850e
-"divu r<reg1>, r<reg2>, r<reg3>"
-{
- COMPAT_2 (OP_2C207E0 ());
-}
-
-
-// EI
-1000011111100000 + 0000000101100000:X:::ei
-"ei"
-{
- COMPAT_2 (OP_16087E0 ());
-}
-
-
-
-// HALT
-0000011111100000 + 0000000100100000:X:::halt
-"halt"
-{
- COMPAT_2 (OP_12007E0 ());
-}
-
-
-
-// HSW
-rrrrr,11111100000 + wwwww,01101000100:XII:::hsw
-*v850e
-*v850ea
-"hsw r<reg2>, r<reg3>"
-{
- unsigned32 value;
- TRACE_ALU_INPUT1 (GR[reg2]);
-
- value = GR[reg2];
- value >>= 16;
- value |= (GR[reg2] << 16);
-
- GR[reg3] = value;
-
- PSW &= ~(PSW_Z | PSW_S | PSW_CY | PSW_OV);
-
- if (value == 0) PSW |= PSW_Z;
- if (value & 0x80000000) PSW |= PSW_S;
- if (((value & 0xffff) == 0) || (value & 0xffff0000) == 0) PSW |= PSW_CY;
-
- TRACE_ALU_RESULT (GR[reg3]);
-}
-
-
-
-// JARL
-rrrrr!0,11110,dddddd + ddddddddddddddd,0:V:::jarl
-"jarl <disp22>, r<reg2>"
-{
- GR[reg2] = nia;
- nia = cia + disp22;
- TRACE_BRANCH1 (GR[reg2]);
-}
-
-
-
-// JMP
-00000000011,RRRRR:I:::jmp
-"jmp [r<reg1>]"
-{
- nia = GR[reg1] & ~1;
- TRACE_BRANCH0 ();
-}
-
-
-
-// JR
-0000011110,dddddd + ddddddddddddddd,0:V:::jr
-"jr <disp22>"
-{
- nia = cia + disp22;
- TRACE_BRANCH0 ();
-}
-
-
-
-// LD
-rrrrr,111000,RRRRR + dddddddddddddddd:VII:::ld.b
-"ld.b <disp16>[r<reg1>], r<reg2>"
-{
- COMPAT_2 (OP_700 ());
-}
-
-rrrrr,111001,RRRRR + ddddddddddddddd,0:VII:::ld.h
-"ld.h <disp16>[r<reg1>], r<reg2>"
-{
- COMPAT_2 (OP_720 ());
-}
-
-rrrrr,111001,RRRRR + ddddddddddddddd,1:VII:::ld.w
-"ld.w <disp16>[r<reg1>], r<reg2>"
-{
- COMPAT_2 (OP_10720 ());
-}
-
-rrrrr!0,11110,b,RRRRR + ddddddddddddddd,1:VII:::ld.bu
-*v850e
-*v850ea
-"ld.bu <disp16>[r<reg1>], r<reg2>"
-{
- COMPAT_2 (OP_10780 ());
-}
-
-rrrrr!0,111111,RRRRR + ddddddddddddddd,1:VII:::ld.hu
-*v850e
-*v850ea
-"ld.hu <disp16>[r<reg1>], r<reg2>"
-{
- COMPAT_2 (OP_107E0 ());
-}
-
-
-// LDSR
-regID,111111,RRRRR + 0000000000100000:IX:::ldsr
-"ldsr r<reg1>, s<regID>"
-{
- TRACE_ALU_INPUT1 (GR[reg1]);
-
- if (&PSW == &SR[regID])
- PSW = (GR[reg1] & (CPU)->psw_mask);
- else
- SR[regID] = GR[reg1];
-
- TRACE_ALU_RESULT (SR[regID]);
-}
-
-
-
-// MOV
-rrrrr!0,000000,RRRRR:I:::mov
-"mov r<reg1>, r<reg2>"
-{
- TRACE_ALU_INPUT0 ();
- GR[reg2] = GR[reg1];
- TRACE_ALU_RESULT (GR[reg2]);
-}
-
-
-rrrrr!0,010000,iiiii:II:::mov
-"mov <imm5>, r<reg2>"
-{
- COMPAT_1 (OP_200 ());
-}
-
-00000110001,RRRRR + iiiiiiiiiiiiiiii + IIIIIIIIIIIIIIII:VI:::mov
-*v850e
-*v850ea
-"mov <imm32>, r<reg1>"
-{
- SAVE_2;
- trace_input ("mov", OP_IMM_REG, 4);
- State.regs[ OP[0] ] = load_mem (PC + 2, 4);
- trace_output (OP_IMM_REG);
-}
-
-
-
-// MOVEA
-rrrrr!0,110001,RRRRR + iiiiiiiiiiiiiiii:VI:::movea
-"movea <simm16>, r<reg1>, r<reg2>"
-{
- TRACE_ALU_INPUT2 (GR[reg1], simm16);
- GR[reg2] = GR[reg1] + simm16;
- TRACE_ALU_RESULT (GR[reg2]);
-}
-
-
-
-// MOVHI
-rrrrr!0,110010,RRRRR + iiiiiiiiiiiiiiii:VI:::movhi
-"movhi <uimm16>, r<reg1>, r<reg2>"
-{
- COMPAT_2 (OP_640 ());
-}
-
-
-
-// MUL
-rrrrr,111111,RRRRR + wwwww,01000100000:XI:::mul
-*v850e
-*v850ea
-"mul r<reg1>, r<reg2>, r<reg3>"
-{
- COMPAT_2 (OP_22007E0 ());
-}
-
-rrrrr,111111,iiiii + wwwww,01001,IIII,00:XII:::mul
-*v850e
-*v850ea
-"mul <imm9>, r<reg2>, r<reg3>"
-{
- COMPAT_2 (OP_24007E0 ());
-}
-
-
-// MULH
-rrrrr!0,000111,RRRRR:I:::mulh
-"mulh r<reg1>, r<reg2>"
-{
- COMPAT_1 (OP_E0 ());
-}
-
-rrrrr!0,010111,iiiii:II:::mulh
-"mulh <imm5>, r<reg2>"
-{
- COMPAT_1 (OP_2E0 ());
-}
-
-
-
-// MULHI
-rrrrr!0,110111,RRRRR + iiiiiiiiiiiiiiii:VI:::mulhi
-"mulhi <uimm16>, r<reg1>, r<reg2>"
-{
- COMPAT_2 (OP_6E0 ());
-}
-
-
-
-// MULU
-rrrrr,111111,RRRRR + wwwww,01000100010:XI:::mulu
-*v850e
-*v850ea
-"mulu r<reg1>, r<reg2>, r<reg3>"
-{
- COMPAT_2 (OP_22207E0 ());
-}
-
-rrrrr,111111,iiiii + wwwww,01001,IIII,10:XII:::mulu
-*v850e
-*v850ea
-"mulu <imm9>, r<reg2>, r<reg3>"
-{
- COMPAT_2 (OP_24207E0 ());
-}
-
-
-
-// NOP
-0000000000000000:I:::nop
-"nop"
-{
- /* do nothing, trace nothing */
-}
-
-
-
-// NOT
-rrrrr,000001,RRRRR:I:::not
-"not r<reg1>, r<reg2>"
-{
- COMPAT_1 (OP_20 ());
-}
-
-
-
-// NOT1
-01,bbb,111110,RRRRR + dddddddddddddddd:VIII:::not1
-"not1 <bit3>, <disp16>[r<reg1>]"
-{
- COMPAT_2 (OP_47C0 ());
-}
-
-rrrrr,111111,RRRRR + 0000000011100010:IX:::not1
-*v850e
-*v850ea
-"not1 r<reg2>, r<reg1>"
-{
- COMPAT_2 (OP_E207E0 ());
-}
-
-
-
-// OR
-rrrrr,001000,RRRRR:I:::or
-"or r<reg1>, r<reg2>"
-{
- COMPAT_1 (OP_100 ());
-}
-
-
-
-// ORI
-rrrrr,110100,RRRRR + iiiiiiiiiiiiiiii:VI:::ori
-"ori <uimm16>, r<reg1>, r<reg2>"
-{
- COMPAT_2 (OP_680 ());
-}
-
-
-
-// PREPARE
-0000011110,iiiii,L + LLLLLLLLLLL,00001:XIII:::prepare
-*v850e
-*v850ea
-"prepare <list12>, <imm5>"
-{
- int i;
- SAVE_2;
-
- trace_input ("prepare", OP_PUSHPOP1, 0);
-
- /* Store the registers with lower number registers being placed at
- higher addresses. */
- for (i = 0; i < 12; i++)
- if ((OP[3] & (1 << type1_regs[ i ])))
- {
- SP -= 4;
- store_mem (SP, 4, State.regs[ 20 + i ]);
- }
-
- SP -= (OP[3] & 0x3e) << 1;
-
- trace_output (OP_PUSHPOP1);
-}
-
-
-0000011110,iiiii,L + LLLLLLLLLLL,00011:XIII:::prepare00
-*v850e
-*v850ea
-"prepare <list12>, <imm5>, sp"
-{
- COMPAT_2 (OP_30780 ());
-}
-
-0000011110,iiiii,L + LLLLLLLLLLL,01011 + iiiiiiiiiiiiiiii:XIII:::prepare01
-*v850e
-*v850ea
-"prepare <list12>, <imm5>, <uimm16>"
-{
- COMPAT_2 (OP_B0780 ());
-}
-
-0000011110,iiiii,L + LLLLLLLLLLL,10011 + iiiiiiiiiiiiiiii:XIII:::prepare10
-*v850e
-*v850ea
-"prepare <list12>, <imm5>, <uimm16>"
-{
- COMPAT_2 (OP_130780 ());
-}
-
-0000011110,iiiii,L + LLLLLLLLLLL,11011 + iiiiiiiiiiiiiiii + dddddddddddddddd:XIII:::prepare11
-*v850e
-*v850ea
-"prepare <list12>, <imm5>, <uimm32>"
-{
- COMPAT_2 (OP_1B0780 ());
-}
-
-
-
-// RETI
-0000011111100000 + 0000000101000000:X:::reti
-"reti"
-{
- if ((PSW & PSW_EP))
- {
- nia = (EIPC & ~1);
- PSW = EIPSW;
- }
- else if ((PSW & PSW_NP))
- {
- nia = (FEPC & ~1);
- PSW = FEPSW;
- }
- else
- {
- nia = (EIPC & ~1);
- PSW = EIPSW;
- }
- TRACE_BRANCH1 (PSW);
-}
-
-
-
-// SAR
-rrrrr,111111,RRRRR + 0000000010100000:IX:::sar
-"sar r<reg1>, r<reg2>"
-{
- COMPAT_2 (OP_A007E0 ());
-}
-
-rrrrr,010101,iiiii:II:::sar
-"sar <imm5>, r<reg2>"
-{
- COMPAT_1 (OP_2A0 ());
-}
-
-
-
-// SASF
-rrrrr,1111110,cccc + 0000001000000000:IX:::sasf
-*v850e
-*v850ea
-"sasf %s<cccc>, r<reg2>"
-{
- COMPAT_2 (OP_20007E0 ());
-}
-
-
-
-
-// SATADD
-rrrrr!0,000110,RRRRR:I:::satadd
-"satadd r<reg1>, r<reg2>"
-{
- COMPAT_1 (OP_C0 ());
-}
-
-rrrrr!0,010001,iiiii:II:::satadd
-"satadd <imm5>, r<reg2>"
-{
- COMPAT_1 (OP_220 ());
-}
-
-
-
-// SATSUB
-rrrrr!0,000101,RRRRR:I:::satsub
-"satsub r<reg1>, r<reg2>"
-{
- COMPAT_1 (OP_A0 ());
-}
-
-
-
-// SATSUBI
-rrrrr!0,110011,RRRRR + iiiiiiiiiiiiiiii:VI:::satsubi
-"satsubi <simm16>, r<reg1>, r<reg2>"
-{
- COMPAT_2 (OP_660 ());
-}
-
-
-
-// SATSUBR
-rrrrr!0,000100,RRRRR:I:::satsubr
-"satsubr r<reg1>, r<reg2>"
-{
- COMPAT_1 (OP_80 ());
-}
-
-
-
-// SETF
-rrrrr,1111110,cccc + 0000000000000000:IX:::setf
-"setf %s<cccc>, r<reg2>"
-{
- COMPAT_2 (OP_7E0 ());
-}
-
-
-
-// SET1
-00,bbb,111110,RRRRR + dddddddddddddddd:VIII:::set1
-"set1 <bit3>, <disp16>[r<reg1>]"
-{
- COMPAT_2 (OP_7C0 ());
-}
-
-rrrrr,111111,RRRRR + 0000000011100000:IX:::set1
-*v850e
-*v850ea
-"set1 r<reg2>, [r<reg1>]"
-{
- COMPAT_2 (OP_E007E0 ());
-}
-
-
-
-// SHL
-rrrrr,111111,RRRRR + 0000000011000000:IX:::shl
-"shl r<reg1>, r<reg2>"
-{
- COMPAT_2 (OP_C007E0 ());
-}
-
-rrrrr,010110,iiiii:II:::shl
-"shl <imm5>, r<reg2>"
-{
- COMPAT_1 (OP_2C0 ());
-}
-
-
-
-// SHR
-rrrrr,111111,RRRRR + 0000000010000000:IX:::shr
-"shr r<reg1>, r<reg2>"
-{
- COMPAT_2 (OP_8007E0 ());
-}
-
-rrrrr,010100,iiiii:II:::shr
-"shr <imm5>, r<reg2>"
-{
- COMPAT_1 (OP_280 ());
-}
-
-
-
-// SLD
-rrrrr,0110,ddddddd:IV:::sld.b
-"sld.bu <disp7>[ep], r<reg2>":(PSW & PSW_US)
-"sld.b <disp7>[ep], r<reg2>"
-{
- unsigned32 addr = EP + disp7;
- unsigned32 result = load_mem (addr, 1);
- if (PSW & PSW_US)
- {
- GR[reg2] = result;
- TRACE_LD_NAME ("sld.bu", addr, result);
- }
- else
- {
- result = EXTEND8 (result);
- GR[reg2] = result;
- TRACE_LD (addr, result);
- }
-}
-
-rrrrr,1000,ddddddd:IV:::sld.h
-"sld.hu <disp8>[ep], r<reg2>":(PSW & PSW_US)
-"sld.h <disp8>[ep], r<reg2>"
-{
- unsigned32 addr = EP + disp8;
- unsigned32 result = load_mem (addr, 2);
- if (PSW & PSW_US)
- {
- GR[reg2] = result;
- TRACE_LD_NAME ("sld.hu", addr, result);
- }
- else
- {
- result = EXTEND16 (result);
- GR[reg2] = result;
- TRACE_LD (addr, result);
- }
-}
-
-rrrrr,1010,dddddd,0:IV:::sld.w
-"sld.w <disp8>[ep], r<reg2>"
-{
- unsigned32 addr = EP + disp8;
- unsigned32 result = load_mem (addr, 4);
- GR[reg2] = result;
- TRACE_LD (addr, result);
-}
-
-rrrrr!0,0000110,dddd:IV:::sld.bu
-*v850e
-*v850ea
-"sld.b <disp4>[ep], r<reg2>":(PSW & PSW_US)
-"sld.bu <disp4>[ep], r<reg2>"
-{
- unsigned32 addr = EP + disp4;
- unsigned32 result = load_mem (addr, 1);
- if (PSW & PSW_US)
- {
- result = EXTEND8 (result);
- GR[reg2] = result;
- TRACE_LD_NAME ("sld.b", addr, result);
- }
- else
- {
- GR[reg2] = result;
- TRACE_LD (addr, result);
- }
-}
-
-rrrrr!0,0000111,dddd:IV:::sld.hu
-*v850e
-*v850ea
-"sld.h <disp5>[ep], r<reg2>":(PSW & PSW_US)
-"sld.hu <disp5>[ep], r<reg2>"
-{
- unsigned32 addr = EP + disp5;
- unsigned32 result = load_mem (addr, 2);
- if (PSW & PSW_US)
- {
- result = EXTEND16 (result);
- GR[reg2] = result;
- TRACE_LD_NAME ("sld.h", addr, result);
- }
- else
- {
- GR[reg2] = result;
- TRACE_LD (addr, result);
- }
-}
-
-
-// SST
-rrrrr,0111,ddddddd:IV:::sst.b
-"sst.b r<reg2>, <disp7>[ep]"
-{
- COMPAT_1 (OP_380 ());
-}
-
-rrrrr,1001,ddddddd:IV:::sst.h
-"sst.h r<reg2>, <disp8>[ep]"
-{
- COMPAT_1 (OP_480 ());
-}
-
-rrrrr,1010,dddddd,1:IV:::sst.w
-"sst.w r<reg2>, <disp8>[ep]"
-{
- COMPAT_1 (OP_501 ());
-}
-
-
-
-// ST
-rrrrr,111010,RRRRR + dddddddddddddddd:VII:::st.b
-"st.b r<reg2>, <disp16>[r<reg1>]"
-{
- COMPAT_2 (OP_740 ());
-}
-
-rrrrr,111011,RRRRR + ddddddddddddddd,0:VII:::st.h
-"st.h r<reg2>, <disp16>[r<reg1>]"
-{
- COMPAT_2 (OP_760 ());
-}
-
-rrrrr,111011,RRRRR + ddddddddddddddd,1:VII:::st.w
-"st.w r<reg2>, <disp16>[r<reg1>]"
-{
- COMPAT_2 (OP_10760 ());
-}
-
-
-
-// STSR
-rrrrr,111111,regID + 0000000001000000:IX:::stsr
-"stsr s<regID>, r<reg2>"
-{
- TRACE_ALU_INPUT1 (SR[regID]);
- GR[reg2] = SR[regID];
- TRACE_ALU_RESULT (GR[reg2]);
-}
-
-
-
-// SUB
-rrrrr,001101,RRRRR:I:::sub
-"sub r<reg1>, r<reg2>"
-{
- COMPAT_1 (OP_1A0 ());
-}
-
-
-
-// SUBR
-rrrrr,001100,RRRRR:I:::subr
-"subr r<reg1>, r<reg2>"
-{
- COMPAT_1 (OP_180 ());
-}
-
-
-
-// SWITCH
-00000000010,RRRRR:I:::switch
-*v850e
-*v850ea
-"switch r<reg1>"
-{
- unsigned long adr;
- SAVE_1;
- trace_input ("switch", OP_REG, 0);
- adr = (cia + 2) + (State.regs[ reg1 ] << 1);
- nia = (cia + 2) + (EXTEND16 (load_mem (adr, 2)) << 1);
- trace_output (OP_REG);
-}
-
-
-// SXB
-00000000101,RRRRR:I:::sxb
-*v850e
-*v850ea
-"sxb r<reg1>"
-{
- TRACE_ALU_INPUT1 (GR[reg1]);
- GR[reg1] = EXTEND8 (GR[reg1]);
- TRACE_ALU_RESULT (GR[reg1]);
-}
-
-// SXH
-00000000111,RRRRR:I:::sxh
-*v850e
-*v850ea
-"sxh r<reg1>"
-{
- TRACE_ALU_INPUT1 (GR[reg1]);
- GR[reg1] = EXTEND16 (GR[reg1]);
- TRACE_ALU_RESULT (GR[reg1]);
-}
-
-
-
-// TRAP
-00000111111,iiiii + 0000000100000000:X:::trap
-"trap <vector>"
-{
- COMPAT_2 (OP_10007E0 ());
-}
-
-
-
-// TST
-rrrrr,001011,RRRRR:I:::tst
-"tst r<reg1>, r<reg2>"
-{
- COMPAT_1 (OP_160 ());
-}
-
-
-
-// TST1
-11,bbb,111110,RRRRR + dddddddddddddddd:VIII:::tst1
-"tst1 <bit3>, <disp16>[r<reg1>]"
-{
- COMPAT_2 (OP_C7C0 ());
-}
-
-rrrrr,111111,RRRRR + 0000000011100110:IX:::tst1
-*v850e
-*v850ea
-"tst1 r<reg2>, [r<reg1>]"
-{
- COMPAT_2 (OP_E607E0 ());
-}
-
-
-
-// XOR
-rrrrr,001001,RRRRR:I:::xor
-"xor r<reg1>, r<reg2>"
-{
- COMPAT_1 (OP_120 ());
-}
-
-
-
-// XORI
-rrrrr,110101,RRRRR + iiiiiiiiiiiiiiii:VI:::xori
-"xori <uimm16>, r<reg1>, r<reg2>"
-{
- COMPAT_2 (OP_6A0 ());
-}
-
-
-
-// ZXB
-00000000100,RRRRR:I:::zxb
-*v850e
-*v850ea
-"zxb r<reg1>"
-{
- TRACE_ALU_INPUT1 (GR[reg1]);
- GR[reg1] = GR[reg1] & 0xff;
- TRACE_ALU_RESULT (GR[reg1]);
-}
-
-// ZXH
-00000000110,RRRRR:I:::zxh
-*v850e
-*v850ea
-"zxh r<reg1>"
-{
- TRACE_ALU_INPUT1 (GR[reg1]);
- GR[reg1] = GR[reg1] & 0xffff;
- TRACE_ALU_RESULT (GR[reg1]);
-}
-
-
-// Right field must be zero so that it doesn't clash with DIVH
-// Left field must be non-zero so that it doesn't clash with SWITCH
-11111,000010,00000:I:::break
-{
- sim_engine_halt (SD, CPU, NULL, cia, sim_stopped, SIM_SIGTRAP);
-}
-
-
-// New breakpoint: 0x7E0 0x7E0
-00000,111111,00000 + 00000,11111,100000:X:::ilgop
-{
- sim_engine_halt (SD, CPU, NULL, cia, sim_stopped, SIM_SIGTRAP);
-}
-
-// DIVHN
-rrrrr,111111,RRRRR + wwwww,01010,iiii,00:XI:::divhn
-*v850ea
-"divhn <imm5>, r<reg1>, r<reg2>, r<reg3>"
-{
- signed32 quotient;
- signed32 remainder;
- signed32 divide_by;
- signed32 divide_this;
- boolean overflow = false;
- SAVE_2;
-
- trace_input ("divhn", OP_IMM_REG_REG_REG, 0);
-
- divide_by = EXTEND16 (State.regs[ reg1 ]);
- divide_this = State.regs[ reg2 ];
-
- divn (imm5, divide_by, divide_this, & quotient, & remainder, & overflow);
-
- State.regs[ reg2 ] = quotient;
- State.regs[ reg3 ] = remainder;
-
- /* Set condition codes. */
- PSW &= ~(PSW_Z | PSW_S | PSW_OV);
-
- if (overflow) PSW |= PSW_OV;
- if (quotient == 0) PSW |= PSW_Z;
- if (quotient < 0) PSW |= PSW_S;
-
- trace_output (OP_IMM_REG_REG_REG);
-}
-
-
-
-// DIVHUN
-rrrrr,111111,RRRRR + wwwww,01010,iiii,10:XI:::divhun
-*v850ea
-"divhun <imm5>, r<reg1>, r<reg2>, r<reg3>"
-{
- signed32 quotient;
- signed32 remainder;
- signed32 divide_by;
- signed32 divide_this;
- boolean overflow = false;
- SAVE_2;
-
- trace_input ("divhun", OP_IMM_REG_REG_REG, 0);
-
- divide_by = State.regs[ reg1 ] & 0xffff;
- divide_this = State.regs[ reg2 ];
-
- divun (imm5, divide_by, divide_this, & quotient, & remainder, & overflow);
-
- State.regs[ reg2 ] = quotient;
- State.regs[ reg3 ] = remainder;
-
- /* Set condition codes. */
- PSW &= ~(PSW_Z | PSW_S | PSW_OV);
-
- if (overflow) PSW |= PSW_OV;
- if (quotient == 0) PSW |= PSW_Z;
- if (quotient & 0x80000000) PSW |= PSW_S;
-
- trace_output (OP_IMM_REG_REG_REG);
-}
-
-
-
-// DIVN
-rrrrr,111111,RRRRR + wwwww,01011,iiii,00:XI:::divn
-*v850ea
-"divn <imm5>, r<reg1>, r<reg2>, r<reg3>"
-{
- signed32 quotient;
- signed32 remainder;
- signed32 divide_by;
- signed32 divide_this;
- boolean overflow = false;
- SAVE_2;
-
- trace_input ("divn", OP_IMM_REG_REG_REG, 0);
-
- divide_by = State.regs[ reg1 ];
- divide_this = State.regs[ reg2 ];
-
- divn (imm5, divide_by, divide_this, & quotient, & remainder, & overflow);
-
- State.regs[ reg2 ] = quotient;
- State.regs[ reg3 ] = remainder;
-
- /* Set condition codes. */
- PSW &= ~(PSW_Z | PSW_S | PSW_OV);
-
- if (overflow) PSW |= PSW_OV;
- if (quotient == 0) PSW |= PSW_Z;
- if (quotient < 0) PSW |= PSW_S;
-
- trace_output (OP_IMM_REG_REG_REG);
-}
-
-
-
-// DIVUN
-rrrrr,111111,RRRRR + wwwww,01011,iiii,10:XI:::divun
-*v850ea
-"divun <imm5>, r<reg1>, r<reg2>, r<reg3>"
-{
- signed32 quotient;
- signed32 remainder;
- signed32 divide_by;
- signed32 divide_this;
- boolean overflow = false;
- SAVE_2;
-
- trace_input ("divun", OP_IMM_REG_REG_REG, 0);
-
- divide_by = State.regs[ reg1 ];
- divide_this = State.regs[ reg2 ];
-
- divun (imm5, divide_by, divide_this, & quotient, & remainder, & overflow);
-
- State.regs[ reg2 ] = quotient;
- State.regs[ reg3 ] = remainder;
-
- /* Set condition codes. */
- PSW &= ~(PSW_Z | PSW_S | PSW_OV);
-
- if (overflow) PSW |= PSW_OV;
- if (quotient == 0) PSW |= PSW_Z;
- if (quotient & 0x80000000) PSW |= PSW_S;
-
- trace_output (OP_IMM_REG_REG_REG);
-}
-
-
-
-// SDIVHN
-rrrrr,111111,RRRRR + wwwww,00110,iiii,00:XI:::sdivhn
-*v850ea
-"sdivhn <imm5>, r<reg1>, r<reg2>, r<reg3>"
-{
- COMPAT_2 (OP_18007E0 ());
-}
-
-
-
-// SDIVHUN
-rrrrr,111111,RRRRR + wwwww,00110,iiii,10:XI:::sdivhun
-*v850ea
-"sdivhun <imm5>, r<reg1>, r<reg2>, r<reg3>"
-{
- COMPAT_2 (OP_18207E0 ());
-}
-
-
-
-// SDIVN
-rrrrr,111111,RRRRR + wwwww,00111,iiii,00:XI:::sdivn
-*v850ea
-"sdivn <imm5>, r<reg1>, r<reg2>, r<reg3>"
-{
- COMPAT_2 (OP_1C007E0 ());
-}
-
-
-
-// SDIVUN
-rrrrr,111111,RRRRR + wwwww,00111,iiii,10:XI:::sdivun
-*v850ea
-"sdivun <imm5>, r<reg1>, r<reg2>, r<reg3>"
-{
- COMPAT_2 (OP_1C207E0 ());
-}
-
-
-
-// PUSHML
-000001111110,LLLL + LLLLLLLLLLLL,S,001:XIV:::pushml
-*v850ea
-"pushml <list18>"
-{
- int i;
- SAVE_2;
-
- trace_input ("pushml", OP_PUSHPOP3, 0);
-
- /* Store the registers with lower number registers being placed at
- higher addresses. */
-
- for (i = 0; i < 15; i++)
- if ((OP[3] & (1 << type3_regs[ i ])))
- {
- SP -= 4;
- store_mem (SP & ~ 3, 4, State.regs[ i + 1 ]);
- }
-
- if (OP[3] & (1 << 3))
- {
- SP -= 4;
-
- store_mem (SP & ~ 3, 4, PSW);
- }
-
- if (OP[3] & (1 << 19))
- {
- SP -= 8;
-
- if ((PSW & PSW_NP) && ((PSW & PSW_EP) == 0))
- {
- store_mem ((SP + 4) & ~ 3, 4, FEPC);
- store_mem ( SP & ~ 3, 4, FEPSW);
- }
- else
- {
- store_mem ((SP + 4) & ~ 3, 4, EIPC);
- store_mem ( SP & ~ 3, 4, EIPSW);
- }
- }
-
- trace_output (OP_PUSHPOP2);
-}
-
-
-
-// PUSHHML
-000001111110,LLLL + LLLLLLLLLLLL,S,011:XIV:::pushmh
-*v850ea
-"pushhml <list18>"
-{
- COMPAT_2 (OP_307E0 ());
-}
-
-
-
-// POPML
-000001111111,LLLL + LLLLLLLLLLLL,S,001:XIV:::popml
-*v850ea
-"popml <list18>"
-{
- COMPAT_2 (OP_107F0 ());
-}
-
-
-
-// POPMH
-000001111111,LLLL + LLLLLLLLLLLL,S,011:XIV:::popmh
-*v850ea
-"popmh <list18>"
-{
- COMPAT_2 (OP_307F0 ());
-}
-
diff --git a/sim/v850/v850_sim.h b/sim/v850/v850_sim.h
deleted file mode 100644
index bf597279c33..00000000000
--- a/sim/v850/v850_sim.h
+++ /dev/null
@@ -1,8 +0,0 @@
-struct simops
-{
- unsigned long opcode;
- unsigned long mask;
- int (* func) PARAMS ((void));
- int numops;
- int operands[12];
-};
diff --git a/sim/w65/ChangeLog b/sim/w65/ChangeLog
deleted file mode 100644
index 088f8b24867..00000000000
--- a/sim/w65/ChangeLog
+++ /dev/null
@@ -1,148 +0,0 @@
-Tue May 23 21:39:23 2000 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Thu Sep 2 18:15:53 1999 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-1999-05-08 Felix Lee <flee@cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Sun Apr 26 15:31:55 1998 Tom Tromey <tromey@creche>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
- * config.in: Ditto.
-
-Sun Apr 26 15:19:08 1998 Tom Tromey <tromey@cygnus.com>
-
- * acconfig.h: New file.
- * configure.in: Reverted change of Apr 24; use sinclude again.
- Don't call AC_C_CROSS.
-
-Fri Apr 24 14:16:40 1998 Tom Tromey <tromey@creche>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
- * config.in: Ditto.
-
-Fri Apr 24 11:17:46 1998 Tom Tromey <tromey@cygnus.com>
-
- * acconfig.h: Removed.
- * configure.in: Call CY_GNU_GETTEXT.
- * Makefile.in (INTLLIBS): New macro.
- (INTLDEPS): Likewise.
- ($(RUN_PROG)): Depend on INTLDEPS; link against INTLLIBS.
- (top_builddir): New macro.
-
-Wed Apr 22 14:29:50 1998 Michael Meissner <meissner@cygnus.com>
-
- * configure: Regenerate with autoconf 2.12.1.
-
-Tue Feb 17 12:52:24 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * run.c (main): Pass length into sim_fetch_register.
-
- * interp.c (sim_store_register, sim_fetch_register): Pass in
- length parameter. Return -1.
-
-Tue Aug 26 10:43:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * interp.c (sim_kill): Delete.
- (sim_create_inferior): Add ABFD argument. Set PC from same.
-
-Mon Aug 25 16:34:33 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * interp.c (sim_open): Add ABFD argument. Change ARGV to PARGV.
-
-Tue May 20 10:24:54 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * interp.c (sim_open): Add callback argument.
-
-Tue Apr 15 14:55:10 1997 Ian Lance Taylor <ian@cygnus.com>
-
- * Makefile.in (INSTALL): Set to @INSTALL@.
- (INSTALL_XFORM, INSTALL_XFORM1): Remove.
- (install): Depend upon installdirs. Use $(program_transform_name)
- directly, rather than using $(INSTALL_XFORM) and
- $(INSTALL_XFORM1).
- (installdirs): New target.
-
-Mon Apr 14 16:30:02 1997 Ian Lance Taylor <ian@cygnus.com>
-
- * Makefile.in (INSTALL): Change install.sh to install-sh.
-
-Wed Apr 2 15:40:30 1997 Doug Evans <dje@canuck.cygnus.com>
-
- * interp.c (sim_open): New arg `kind'. `name is now `argv'.
-
-Thu Oct 3 16:17:59 1996 Jason Molenda (crash@godzilla.cygnus.co.jp)
-
- * Makefile.in (mostlyclean): Move config.log to distclean.
-
-Wed Jun 26 12:30:45 1996 Jason Molenda (crash@godzilla.cygnus.co.jp)
-
- * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
- INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
- (docdir): Removed.
- * configure.in (AC_PREREQ): autoconf 2.5 or higher.
- (AC_PROG_INSTALL): Added.
- * configure: Rebuilt.
-
-Wed Feb 21 12:17:04 1996 Ian Lance Taylor <ian@cygnus.com>
-
- * configure: Regenerate with autoconf 2.7.
-
-Thu Oct 19 21:44:14 1995 Fred Fish <fnf@cygnus.com>
-
- * Makefile.in: Remove tabs from otherwise empty line.
- Confuses many older non-GNU versions of "make".
-
-Tue Oct 10 11:13:01 1995 Fred Fish <fnf@cygnus.com>
-
- * Makefile.in (BISONFLAGS): Remove macro.
-
-Wed Sep 20 13:35:43 1995 Ian Lance Taylor <ian@cygnus.com>
-
- * Makefile.in (maintainer-clean): New synonym for realclean.
-
-Fri Sep 8 14:03:32 1995 Ian Lance Taylor <ian@cygnus.com>
-
- * configure.in: Convert to use autoconf.
- * configure: New file, built by autoconf.
- * acconfig.h: New file.
- * config.in: New file, built by autoheader.
- * Makefile.in: Various changes for new configure script. Also:
- (INSTALL): Go up two levels, not one.
- (ALLOCA, MALLOC, OPCODES): Remove.
- (gencode): Use $(CC_FOR_BUILD).
- (case.o): Remove.
- (run.o, interp.o): Depend upon config.h.
- * interp.c: Include "config.h". Don't include "sysdep.h".
- Include <stdlib.h>, <time.h>, and <unistd.h> if they exist.
- * run.c: Include "config.h". Don't include "sysdep.h". Include
- <stdlib.h> if it exists. Include "getopt.h". Declare printf if
- necessary.
-
-Thu Aug 3 10:45:37 1995 Fred Fish <fnf@cygnus.com>
-
- * Update all FSF addresses except those in COPYING* files.
-
-Wed Jul 5 16:12:53 1995 J.T. Conklin <jtc@rtl.cygnus.com>
-
- * w65.mt: Removed.
-
-Wed May 24 16:31:38 1995 Jim Wilson <wilson@chestnut.cygnus.com>
-
- * configure.in: Fix typo in last change.
-
-Mon Mar 27 10:32:34 1995 J.T. Conklin <jtc@rtl.cygnus.com>
-
- * run.c: parse arguments with getopt().
-
-Tue Feb 28 17:31:36 1995 Ian Lance Taylor <ian@cygnus.com>
-
- * configure.in: Use ../../bfd/hosts/std-host.h if specific
- host unavailable.
-
- * Started ChangeLog.
diff --git a/sim/w65/Makefile.in b/sim/w65/Makefile.in
deleted file mode 100644
index 8943bd5d683..00000000000
--- a/sim/w65/Makefile.in
+++ /dev/null
@@ -1,247 +0,0 @@
-# Makefile for GNU binary-file utilities
-# Copyright (C) 1992, 93, 94, 95, 96, 97, 1998 Free Software Foundation, Inc.
-
-# This file is part of GNU binutils.
-
-# This program is free software; you can redistribute it and/or modify
-# it under the terms of the GNU General Public License as published by
-# the Free Software Foundation; either version 2 of the License, or
-# (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
-VPATH = @srcdir@
-srcdir = @srcdir@
-
-prefix = @prefix@
-exec_prefix = @exec_prefix@
-
-host_alias = @host_alias@
-target_alias = @target_alias@
-program_transform_name = @program_transform_name@
-bindir = @bindir@
-libdir = @libdir@
-tooldir = $(exec_prefix)/$(target_alias)
-
-datadir = @datadir@
-mandir = @mandir@
-man1dir = $(mandir)/man1
-man2dir = $(mandir)/man2
-man3dir = $(mandir)/man3
-man4dir = $(mandir)/man4
-man5dir = $(mandir)/man5
-man6dir = $(mandir)/man6
-man7dir = $(mandir)/man7
-man8dir = $(mandir)/man8
-man9dir = $(mandir)/man9
-infodir = @infodir@
-includedir = @includedir@
-
-# This can be referenced by the gettext configuration code.
-top_builddir = ..
-
-SHELL = /bin/sh
-
-INSTALL = @INSTALL@
-INSTALL_PROGRAM = @INSTALL_PROGRAM@
-INSTALL_DATA = @INSTALL_DATA@
-
-AR = @AR@
-AR_FLAGS = qv
-CC = @CC@
-CFLAGS = @CFLAGS@
-MAKEINFO = makeinfo
-TEXI2DVI = texi2dvi
-RANLIB = @RANLIB@
-TEXI2ROFF=texi2roff
-MAKEOVERRIDES=
-CC_FOR_BUILD = @CC_FOR_BUILD@
-
-HDEFINES = @HDEFINES@
-TDEFINES =
-
-# Comment these out if using lex.
-# Distribution version
-
-# Distribution name
-
-# Where to find texinfo.tex to format docn with TeX
-TEXIDIR = $(srcdir)/../texinfo
-
-# These should all be the same program too.
-RUN_PROG=run
-SIM_LIB=libsim.a
-ADDL_LIBS=
-
-PROGS = $(RUN_PROG)
-LIBS= $(SIM_LIB)
-
-DISTSTUFF = $(PROGS) $(LIBS)
-
-BASEDIR = $(srcdir)/../..
-BFDDIR = $(BASEDIR)/bfd
-INCDIR = $(BASEDIR)/include
-GDBDIR = $(BASEDIR)/gdb
-INCLUDES = -I. -I$(srcdir) -I../../bfd -I$(BFDDIR) -I$(INCDIR) -I$(GDBDIR)
-
-#### host and target dependant Makefile fragments come in here.
-###
-
-ALL_CFLAGS = $(INCLUDES) $(HDEFINES) $(TDEFINES) $(CFLAGS)
-
-.c.o:
- $(CC) -c $(ALL_CFLAGS) $<
-
-LIBIBERTY = ../../libiberty/libiberty.a
-
-BFD = ../../bfd/libbfd.a
-
-INTLLIBS = @INTLLIBS@
-INTLDEPS = @INTLDEPS@
-
-RUNTEST = runtest
-RUNTESTFLAGS =
-FLAGS_TO_PASS = \
- "CC=$(CC)" \
- "CFLAGS=$(CFLAGS)" \
- "RUNTEST=$(RUNTEST)" \
- "RUNTESTFLAGS=$(RUNTESTFLAGS)"
-
-#
-## The rules
-
-all: $(LIBS) $(PROGS)
-
-
-$(RUN_PROG): $(LIBS) run.o $(BFD) $(INTLDEPS)
- $(CC) $(CFLAGS) $(LDFLAGS) -o $(RUN_PROG) run.o $(SIM_LIB) $(BFD) $(INTLLIBS) $(LIBIBERTY)
-
-$(SIM_LIB): case.o interp.o
- rm -f $(SIM_LIB)
- $(AR) $(AR_FLAGS) $(SIM_LIB) case.o interp.o
- $(RANLIB) $(SIM_LIB)
-
-case.c: gencode
- ./gencode -c >case.c ; \
- if [ -x /usr/latest/bin/indent ] ; then \
- /usr/latest/bin/indent case.c ; \
- fi
-
-optable:gencode
- ./gencode >optable
- ./gencode -a >$(srcdir)/../../opcodes/w65-opc.h
-
-gencode:gencode.c
- $(CC_FOR_BUILD) -o gencode $<
-
-run.o:run.c config.h
-interp.o:interp.c config.h
-
-
-######################################################################
-
-mostlyclean:
- -rm -f *.o *~ \#* core binutils.?? binutils.??? case.c
-
-clean: mostlyclean
- -rm -f $(PROGS) *.o *.a
-
-distclean:
- -rm -f Makefile config.status sysdep.h *.o *~ \#* core y.* \
- binutils.?? binutils.??s binutils.aux binutils.log \
- binutils.toc gencode run config.log
- -rm -f $(PROGS) config.h stamp-h
-
-maintainer-clean realclean: clean distclean
- -rm -f $(DISTSTUFF) TAGS
-
-etags tags: TAGS
-
-TAGS: force
- etags $(INCDIR)/*.h $(srcdir)/*.[hc]
-
-install: all installdirs
- for i in $(PROGS) ; do \
- n=`echo $$i | sed -e 's/.new//' | sed '$(program_transform_name)'`; \
- $(INSTALL_PROGRAM) $$i $(bindir)/$$n; \
- done
-
-installdirs:
- $(SHELL) $(srcdir)/../../mkinstalldirs $(bindir)
-
-install-info:
-
-clean-info:
- -rm -rf *.info*
-
-# Making a dist:
-# cvs rtag binutils-x-yy ld+utils
-# cvs co -r binutils-x-yy ld+utils
-# cd {HERE}; make dist [-f Makefile.in]
-
-dist: $(DIST_NAME).tar.z
-
-diststuff: $(DISTSTUFF)
-
-$(DIST_NAME).tar.z:
- cd ../..; rm -f $(DIST_NAME); ln -s devo $(DIST_NAME)
- make diststuff -f Makefile.in
- cd ../ld; make diststuff -f Makefile.in
- cd ../gprof; make diststuff -f Makefile.in
- cd ../texinfo; mv texinfo.tex ..; rm -rf *; mv ../texinfo.tex .
- # Take out texinfo from configurable dirs
- mv ../configure.in tmp; \
- sed -e '/^host_tools=/s/texinfo //' <tmp >../configure.in; rm tmp
- cd ..; chmod og=u `find . -print`
- cd ../..; tar chf - $(DIST_NAME) | gzip >$(DIST_NAME).tar.z
- rm -rf ../../$(DIST_NAME)
-
-
-# Dummy target to force execution of dependent targets.
-#
-force:
-
-# Target to uncomment host-specific lines in this makefile. Such lines must
-# have the following string beginning in column 1: #__<hostname>__#
-# Original Makefile is backed up as 'Makefile.old'.
-#
-# Invoke with: make make HOST=xxx
-#
-make:
- -@if test $(HOST)x = x ; then \
- echo 'Specify "make make HOST=???"'; \
- exit 1; \
- fi ; \
- grep -s "^#The next line was generated by 'make make'" Makefile; \
- if test $$? = 0 ; then \
- echo "Makefile has already been processed with 'make make'";\
- exit 1; \
- fi ; \
- mv -f Makefile Makefile.old; \
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diff --git a/sim/w65/acconfig.h b/sim/w65/acconfig.h
deleted file mode 100644
index b61140cbe6e..00000000000
--- a/sim/w65/acconfig.h
+++ /dev/null
@@ -1,18 +0,0 @@
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diff --git a/sim/w65/config.in b/sim/w65/config.in
deleted file mode 100644
index 68d2bf7e5a6..00000000000
--- a/sim/w65/config.in
+++ /dev/null
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diff --git a/sim/w65/configure b/sim/w65/configure
deleted file mode 100755
index 8b2b9ecbaa7..00000000000
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- case "$ac_option" in
- *=*) ;;
- *) ac_optarg=yes ;;
- esac
- eval "with_${ac_package}='$ac_optarg'" ;;
-
- -without-* | --without-*)
- ac_package=`echo $ac_option|sed -e 's/-*without-//'`
- # Reject names that are not valid shell variable names.
- if test -n "`echo $ac_package| sed 's/[-a-zA-Z0-9_]//g'`"; then
- { echo "configure: error: $ac_package: invalid package name" 1>&2; exit 1; }
- fi
- ac_package=`echo $ac_package| sed 's/-/_/g'`
- eval "with_${ac_package}=no" ;;
-
- --x)
- # Obsolete; use --with-x.
- with_x=yes ;;
-
- -x-includes | --x-includes | --x-include | --x-includ | --x-inclu \
- | --x-incl | --x-inc | --x-in | --x-i)
- ac_prev=x_includes ;;
- -x-includes=* | --x-includes=* | --x-include=* | --x-includ=* | --x-inclu=* \
- | --x-incl=* | --x-inc=* | --x-in=* | --x-i=*)
- x_includes="$ac_optarg" ;;
-
- -x-libraries | --x-libraries | --x-librarie | --x-librari \
- | --x-librar | --x-libra | --x-libr | --x-lib | --x-li | --x-l)
- ac_prev=x_libraries ;;
- -x-libraries=* | --x-libraries=* | --x-librarie=* | --x-librari=* \
- | --x-librar=* | --x-libra=* | --x-libr=* | --x-lib=* | --x-li=* | --x-l=*)
- x_libraries="$ac_optarg" ;;
-
- -*) { echo "configure: error: $ac_option: invalid option; use --help to show usage" 1>&2; exit 1; }
- ;;
-
- *)
- if test -n "`echo $ac_option| sed 's/[-a-z0-9.]//g'`"; then
- echo "configure: warning: $ac_option: invalid host type" 1>&2
- fi
- if test "x$nonopt" != xNONE; then
- { echo "configure: error: can only configure for one host and one target at a time" 1>&2; exit 1; }
- fi
- nonopt="$ac_option"
- ;;
-
- esac
-done
-
-if test -n "$ac_prev"; then
- { echo "configure: error: missing argument to --`echo $ac_prev | sed 's/_/-/g'`" 1>&2; exit 1; }
-fi
-
-trap 'rm -fr conftest* confdefs* core core.* *.core $ac_clean_files; exit 1' 1 2 15
-
-# File descriptor usage:
-# 0 standard input
-# 1 file creation
-# 2 errors and warnings
-# 3 some systems may open it to /dev/tty
-# 4 used on the Kubota Titan
-# 6 checking for... messages and results
-# 5 compiler messages saved in config.log
-if test "$silent" = yes; then
- exec 6>/dev/null
-else
- exec 6>&1
-fi
-exec 5>./config.log
-
-echo "\
-This file contains any messages produced by compilers while
-running configure, to aid debugging if configure makes a mistake.
-" 1>&5
-
-# Strip out --no-create and --no-recursion so they do not pile up.
-# Also quote any args containing shell metacharacters.
-ac_configure_args=
-for ac_arg
-do
- case "$ac_arg" in
- -no-create | --no-create | --no-creat | --no-crea | --no-cre \
- | --no-cr | --no-c) ;;
- -no-recursion | --no-recursion | --no-recursio | --no-recursi \
- | --no-recurs | --no-recur | --no-recu | --no-rec | --no-re | --no-r) ;;
- *" "*|*" "*|*[\[\]\~\#\$\^\&\*\(\)\{\}\\\|\;\<\>\?]*)
- ac_configure_args="$ac_configure_args '$ac_arg'" ;;
- *) ac_configure_args="$ac_configure_args $ac_arg" ;;
- esac
-done
-
-# NLS nuisances.
-# Only set these to C if already set. These must not be set unconditionally
-# because not all systems understand e.g. LANG=C (notably SCO).
-# Fixing LC_MESSAGES prevents Solaris sh from translating var values in `set'!
-# Non-C LC_CTYPE values break the ctype check.
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-if test "${LC_ALL+set}" = set; then LC_ALL=C; export LC_ALL; fi
-if test "${LC_MESSAGES+set}" = set; then LC_MESSAGES=C; export LC_MESSAGES; fi
-if test "${LC_CTYPE+set}" = set; then LC_CTYPE=C; export LC_CTYPE; fi
-
-# confdefs.h avoids OS command line length limits that DEFS can exceed.
-rm -rf conftest* confdefs.h
-# AIX cpp loses on an empty file, so make sure it contains at least a newline.
-echo > confdefs.h
-
-# A filename unique to this package, relative to the directory that
-# configure is in, which we can look for to find out if srcdir is correct.
-ac_unique_file=Makefile.in
-
-# Find the source files, if location was not specified.
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- ac_srcdir_defaulted=yes
- # Try the directory containing this script, then its parent.
- ac_prog=$0
- ac_confdir=`echo $ac_prog|sed 's%/[^/][^/]*$%%'`
- test "x$ac_confdir" = "x$ac_prog" && ac_confdir=.
- srcdir=$ac_confdir
- if test ! -r $srcdir/$ac_unique_file; then
- srcdir=..
- fi
-else
- ac_srcdir_defaulted=no
-fi
-if test ! -r $srcdir/$ac_unique_file; then
- if test "$ac_srcdir_defaulted" = yes; then
- { echo "configure: error: can not find sources in $ac_confdir or .." 1>&2; exit 1; }
- else
- { echo "configure: error: can not find sources in $srcdir" 1>&2; exit 1; }
- fi
-fi
-srcdir=`echo "${srcdir}" | sed 's%\([^/]\)/*$%\1%'`
-
-# Prefer explicitly selected file to automatically selected ones.
-if test -z "$sitefile"; then
- if test -z "$CONFIG_SITE"; then
- if test "x$prefix" != xNONE; then
- CONFIG_SITE="$prefix/share/config.site $prefix/etc/config.site"
- else
- CONFIG_SITE="$ac_default_prefix/share/config.site $ac_default_prefix/etc/config.site"
- fi
- fi
-else
- CONFIG_SITE="$sitefile"
-fi
-for ac_site_file in $CONFIG_SITE; do
- if test -r "$ac_site_file"; then
- echo "loading site script $ac_site_file"
- . "$ac_site_file"
- fi
-done
-
-if test -r "$cache_file"; then
- echo "loading cache $cache_file"
- . $cache_file
-else
- echo "creating cache $cache_file"
- > $cache_file
-fi
-
-ac_ext=c
-# CFLAGS is not in ac_cpp because -g, -O, etc. are not valid cpp options.
-ac_cpp='$CPP $CPPFLAGS'
-ac_compile='${CC-cc} -c $CFLAGS $CPPFLAGS conftest.$ac_ext 1>&5'
-ac_link='${CC-cc} -o conftest${ac_exeext} $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS 1>&5'
-cross_compiling=$ac_cv_prog_cc_cross
-
-ac_exeext=
-ac_objext=o
-if (echo "testing\c"; echo 1,2,3) | grep c >/dev/null; then
- # Stardent Vistra SVR4 grep lacks -e, says ghazi@caip.rutgers.edu.
- if (echo -n testing; echo 1,2,3) | sed s/-n/xn/ | grep xn >/dev/null; then
- ac_n= ac_c='
-' ac_t=' '
- else
- ac_n=-n ac_c= ac_t=
- fi
-else
- ac_n= ac_c='\c' ac_t=
-fi
-
-
-
-
-
-ac_aux_dir=
-for ac_dir in `cd $srcdir;pwd`/../.. $srcdir/`cd $srcdir;pwd`/../..; do
- if test -f $ac_dir/install-sh; then
- ac_aux_dir=$ac_dir
- ac_install_sh="$ac_aux_dir/install-sh -c"
- break
- elif test -f $ac_dir/install.sh; then
- ac_aux_dir=$ac_dir
- ac_install_sh="$ac_aux_dir/install.sh -c"
- break
- fi
-done
-if test -z "$ac_aux_dir"; then
- { echo "configure: error: can not find install-sh or install.sh in `cd $srcdir;pwd`/../.. $srcdir/`cd $srcdir;pwd`/../.." 1>&2; exit 1; }
-fi
-ac_config_guess=$ac_aux_dir/config.guess
-ac_config_sub=$ac_aux_dir/config.sub
-ac_configure=$ac_aux_dir/configure # This should be Cygnus configure.
-
-
-# Do some error checking and defaulting for the host and target type.
-# The inputs are:
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-#
-# The rules are:
-# 1. You are not allowed to specify --host, --target, and nonopt at the
-# same time.
-# 2. Host defaults to nonopt.
-# 3. If nonopt is not specified, then host defaults to the current host,
-# as determined by config.guess.
-# 4. Target and build default to nonopt.
-# 5. If nonopt is not specified, then target and build default to host.
-
-# The aliases save the names the user supplied, while $host etc.
-# will get canonicalized.
-case $host---$target---$nonopt in
-NONE---*---* | *---NONE---* | *---*---NONE) ;;
-*) { echo "configure: error: can only configure for one host and one target at a time" 1>&2; exit 1; } ;;
-esac
-
-
-# Make sure we can run config.sub.
-if ${CONFIG_SHELL-/bin/sh} $ac_config_sub sun4 >/dev/null 2>&1; then :
-else { echo "configure: error: can not run $ac_config_sub" 1>&2; exit 1; }
-fi
-
-echo $ac_n "checking host system type""... $ac_c" 1>&6
-echo "configure:713: checking host system type" >&5
-
-host_alias=$host
-case "$host_alias" in
-NONE)
- case $nonopt in
- NONE)
- if host_alias=`${CONFIG_SHELL-/bin/sh} $ac_config_guess`; then :
- else { echo "configure: error: can not guess host type; you must specify one" 1>&2; exit 1; }
- fi ;;
- *) host_alias=$nonopt ;;
- esac ;;
-esac
-
-host=`${CONFIG_SHELL-/bin/sh} $ac_config_sub $host_alias`
-host_cpu=`echo $host | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\1/'`
-host_vendor=`echo $host | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\2/'`
-host_os=`echo $host | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\3/'`
-echo "$ac_t""$host" 1>&6
-
-echo $ac_n "checking target system type""... $ac_c" 1>&6
-echo "configure:734: checking target system type" >&5
-
-target_alias=$target
-case "$target_alias" in
-NONE)
- case $nonopt in
- NONE) target_alias=$host_alias ;;
- *) target_alias=$nonopt ;;
- esac ;;
-esac
-
-target=`${CONFIG_SHELL-/bin/sh} $ac_config_sub $target_alias`
-target_cpu=`echo $target | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\1/'`
-target_vendor=`echo $target | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\2/'`
-target_os=`echo $target | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\3/'`
-echo "$ac_t""$target" 1>&6
-
-echo $ac_n "checking build system type""... $ac_c" 1>&6
-echo "configure:752: checking build system type" >&5
-
-build_alias=$build
-case "$build_alias" in
-NONE)
- case $nonopt in
- NONE) build_alias=$host_alias ;;
- *) build_alias=$nonopt ;;
- esac ;;
-esac
-
-build=`${CONFIG_SHELL-/bin/sh} $ac_config_sub $build_alias`
-build_cpu=`echo $build | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\1/'`
-build_vendor=`echo $build | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\2/'`
-build_os=`echo $build | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\3/'`
-echo "$ac_t""$build" 1>&6
-
-test "$host_alias" != "$target_alias" &&
- test "$program_prefix$program_suffix$program_transform_name" = \
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- program_prefix=${target_alias}-
-
-if test "$program_transform_name" = s,x,x,; then
- program_transform_name=
-else
- # Double any \ or $. echo might interpret backslashes.
- cat <<\EOF_SED > conftestsed
-s,\\,\\\\,g; s,\$,$$,g
-EOF_SED
- program_transform_name="`echo $program_transform_name|sed -f conftestsed`"
- rm -f conftestsed
-fi
-test "$program_prefix" != NONE &&
- program_transform_name="s,^,${program_prefix},; $program_transform_name"
-# Use a double $ so make ignores it.
-test "$program_suffix" != NONE &&
- program_transform_name="s,\$\$,${program_suffix},; $program_transform_name"
-
-# sed with no file args requires a program.
-test "$program_transform_name" = "" && program_transform_name="s,x,x,"
-
-# Extract the first word of "gcc", so it can be a program name with args.
-set dummy gcc; ac_word=$2
-echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:796: checking for $ac_word" >&5
-if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- if test -n "$CC"; then
- ac_cv_prog_CC="$CC" # Let the user override the test.
-else
- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
- ac_dummy="$PATH"
- for ac_dir in $ac_dummy; do
- test -z "$ac_dir" && ac_dir=.
- if test -f $ac_dir/$ac_word; then
- ac_cv_prog_CC="gcc"
- break
- fi
- done
- IFS="$ac_save_ifs"
-fi
-fi
-CC="$ac_cv_prog_CC"
-if test -n "$CC"; then
- echo "$ac_t""$CC" 1>&6
-else
- echo "$ac_t""no" 1>&6
-fi
-
-if test -z "$CC"; then
- # Extract the first word of "cc", so it can be a program name with args.
-set dummy cc; ac_word=$2
-echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:826: checking for $ac_word" >&5
-if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- if test -n "$CC"; then
- ac_cv_prog_CC="$CC" # Let the user override the test.
-else
- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
- ac_prog_rejected=no
- ac_dummy="$PATH"
- for ac_dir in $ac_dummy; do
- test -z "$ac_dir" && ac_dir=.
- if test -f $ac_dir/$ac_word; then
- if test "$ac_dir/$ac_word" = "/usr/ucb/cc"; then
- ac_prog_rejected=yes
- continue
- fi
- ac_cv_prog_CC="cc"
- break
- fi
- done
- IFS="$ac_save_ifs"
-if test $ac_prog_rejected = yes; then
- # We found a bogon in the path, so make sure we never use it.
- set dummy $ac_cv_prog_CC
- shift
- if test $# -gt 0; then
- # We chose a different compiler from the bogus one.
- # However, it has the same basename, so the bogon will be chosen
- # first if we set CC to just the basename; use the full file name.
- shift
- set dummy "$ac_dir/$ac_word" "$@"
- shift
- ac_cv_prog_CC="$@"
- fi
-fi
-fi
-fi
-CC="$ac_cv_prog_CC"
-if test -n "$CC"; then
- echo "$ac_t""$CC" 1>&6
-else
- echo "$ac_t""no" 1>&6
-fi
-
- if test -z "$CC"; then
- case "`uname -s`" in
- *win32* | *WIN32*)
- # Extract the first word of "cl", so it can be a program name with args.
-set dummy cl; ac_word=$2
-echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:877: checking for $ac_word" >&5
-if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- if test -n "$CC"; then
- ac_cv_prog_CC="$CC" # Let the user override the test.
-else
- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
- ac_dummy="$PATH"
- for ac_dir in $ac_dummy; do
- test -z "$ac_dir" && ac_dir=.
- if test -f $ac_dir/$ac_word; then
- ac_cv_prog_CC="cl"
- break
- fi
- done
- IFS="$ac_save_ifs"
-fi
-fi
-CC="$ac_cv_prog_CC"
-if test -n "$CC"; then
- echo "$ac_t""$CC" 1>&6
-else
- echo "$ac_t""no" 1>&6
-fi
- ;;
- esac
- fi
- test -z "$CC" && { echo "configure: error: no acceptable cc found in \$PATH" 1>&2; exit 1; }
-fi
-
-echo $ac_n "checking whether the C compiler ($CC $CFLAGS $LDFLAGS) works""... $ac_c" 1>&6
-echo "configure:909: checking whether the C compiler ($CC $CFLAGS $LDFLAGS) works" >&5
-
-ac_ext=c
-# CFLAGS is not in ac_cpp because -g, -O, etc. are not valid cpp options.
-ac_cpp='$CPP $CPPFLAGS'
-ac_compile='${CC-cc} -c $CFLAGS $CPPFLAGS conftest.$ac_ext 1>&5'
-ac_link='${CC-cc} -o conftest${ac_exeext} $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS 1>&5'
-cross_compiling=$ac_cv_prog_cc_cross
-
-cat > conftest.$ac_ext << EOF
-
-#line 920 "configure"
-#include "confdefs.h"
-
-main(){return(0);}
-EOF
-if { (eval echo configure:925: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- ac_cv_prog_cc_works=yes
- # If we can't run a trivial program, we are probably using a cross compiler.
- if (./conftest; exit) 2>/dev/null; then
- ac_cv_prog_cc_cross=no
- else
- ac_cv_prog_cc_cross=yes
- fi
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- ac_cv_prog_cc_works=no
-fi
-rm -fr conftest*
-ac_ext=c
-# CFLAGS is not in ac_cpp because -g, -O, etc. are not valid cpp options.
-ac_cpp='$CPP $CPPFLAGS'
-ac_compile='${CC-cc} -c $CFLAGS $CPPFLAGS conftest.$ac_ext 1>&5'
-ac_link='${CC-cc} -o conftest${ac_exeext} $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS 1>&5'
-cross_compiling=$ac_cv_prog_cc_cross
-
-echo "$ac_t""$ac_cv_prog_cc_works" 1>&6
-if test $ac_cv_prog_cc_works = no; then
- { echo "configure: error: installation or configuration problem: C compiler cannot create executables." 1>&2; exit 1; }
-fi
-echo $ac_n "checking whether the C compiler ($CC $CFLAGS $LDFLAGS) is a cross-compiler""... $ac_c" 1>&6
-echo "configure:951: checking whether the C compiler ($CC $CFLAGS $LDFLAGS) is a cross-compiler" >&5
-echo "$ac_t""$ac_cv_prog_cc_cross" 1>&6
-cross_compiling=$ac_cv_prog_cc_cross
-
-echo $ac_n "checking whether we are using GNU C""... $ac_c" 1>&6
-echo "configure:956: checking whether we are using GNU C" >&5
-if eval "test \"`echo '$''{'ac_cv_prog_gcc'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.c <<EOF
-#ifdef __GNUC__
- yes;
-#endif
-EOF
-if { ac_try='${CC-cc} -E conftest.c'; { (eval echo configure:965: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }; } | egrep yes >/dev/null 2>&1; then
- ac_cv_prog_gcc=yes
-else
- ac_cv_prog_gcc=no
-fi
-fi
-
-echo "$ac_t""$ac_cv_prog_gcc" 1>&6
-
-if test $ac_cv_prog_gcc = yes; then
- GCC=yes
-else
- GCC=
-fi
-
-ac_test_CFLAGS="${CFLAGS+set}"
-ac_save_CFLAGS="$CFLAGS"
-CFLAGS=
-echo $ac_n "checking whether ${CC-cc} accepts -g""... $ac_c" 1>&6
-echo "configure:984: checking whether ${CC-cc} accepts -g" >&5
-if eval "test \"`echo '$''{'ac_cv_prog_cc_g'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- echo 'void f(){}' > conftest.c
-if test -z "`${CC-cc} -g -c conftest.c 2>&1`"; then
- ac_cv_prog_cc_g=yes
-else
- ac_cv_prog_cc_g=no
-fi
-rm -f conftest*
-
-fi
-
-echo "$ac_t""$ac_cv_prog_cc_g" 1>&6
-if test "$ac_test_CFLAGS" = set; then
- CFLAGS="$ac_save_CFLAGS"
-elif test $ac_cv_prog_cc_g = yes; then
- if test "$GCC" = yes; then
- CFLAGS="-g -O2"
- else
- CFLAGS="-g"
- fi
-else
- if test "$GCC" = yes; then
- CFLAGS="-O2"
- else
- CFLAGS=
- fi
-fi
-
-# Find a good install program. We prefer a C program (faster),
-# so one script is as good as another. But avoid the broken or
-# incompatible versions:
-# SysV /etc/install, /usr/sbin/install
-# SunOS /usr/etc/install
-# IRIX /sbin/install
-# AIX /bin/install
-# AIX 4 /usr/bin/installbsd, which doesn't work without a -g flag
-# AFS /usr/afsws/bin/install, which mishandles nonexistent args
-# SVR4 /usr/ucb/install, which tries to use the nonexistent group "staff"
-# ./install, which can be erroneously created by make from ./install.sh.
-echo $ac_n "checking for a BSD compatible install""... $ac_c" 1>&6
-echo "configure:1027: checking for a BSD compatible install" >&5
-if test -z "$INSTALL"; then
-if eval "test \"`echo '$''{'ac_cv_path_install'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- IFS="${IFS= }"; ac_save_IFS="$IFS"; IFS=":"
- for ac_dir in $PATH; do
- # Account for people who put trailing slashes in PATH elements.
- case "$ac_dir/" in
- /|./|.//|/etc/*|/usr/sbin/*|/usr/etc/*|/sbin/*|/usr/afsws/bin/*|/usr/ucb/*) ;;
- *)
- # OSF1 and SCO ODT 3.0 have their own names for install.
- # Don't use installbsd from OSF since it installs stuff as root
- # by default.
- for ac_prog in ginstall scoinst install; do
- if test -f $ac_dir/$ac_prog; then
- if test $ac_prog = install &&
- grep dspmsg $ac_dir/$ac_prog >/dev/null 2>&1; then
- # AIX install. It has an incompatible calling convention.
- :
- else
- ac_cv_path_install="$ac_dir/$ac_prog -c"
- break 2
- fi
- fi
- done
- ;;
- esac
- done
- IFS="$ac_save_IFS"
-
-fi
- if test "${ac_cv_path_install+set}" = set; then
- INSTALL="$ac_cv_path_install"
- else
- # As a last resort, use the slow shell script. We don't cache a
- # path for INSTALL within a source directory, because that will
- # break other packages using the cache if that directory is
- # removed, or if the path is relative.
- INSTALL="$ac_install_sh"
- fi
-fi
-echo "$ac_t""$INSTALL" 1>&6
-
-# Use test -z because SunOS4 sh mishandles braces in ${var-val}.
-# It thinks the first close brace ends the variable substitution.
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-
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-if { (eval echo configure:1335: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null
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- ac_cv_type_off_t=yes
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- rm -rf conftest*
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-rm -f conftest*
-
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-echo "$ac_t""$ac_cv_type_off_t" 1>&6
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-
-fi
-
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-echo "configure:1507: checking for size_t" >&5
-if eval "test \"`echo '$''{'ac_cv_type_size_t'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
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- cat > conftest.$ac_ext <<EOF
-#line 1512 "configure"
-#include "confdefs.h"
-#include <sys/types.h>
-#if STDC_HEADERS
-#include <stdlib.h>
-#include <stddef.h>
-#endif
-EOF
-if (eval "$ac_cpp conftest.$ac_ext") 2>&5 |
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- rm -rf conftest*
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-rm -f conftest*
-
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-echo "$ac_t""$ac_cv_type_size_t" 1>&6
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-#line 1547 "configure"
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-if { (eval echo configure:1554: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
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-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- ac_cv_header_alloca_h=no
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-rm -f conftest*
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-
-echo "$ac_t""$ac_cv_header_alloca_h" 1>&6
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-
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-
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-echo "configure:1575: checking for alloca" >&5
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-#line 1580 "configure"
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-if { (eval echo configure:1608: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
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- ac_cv_func_alloca_works=yes
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- echo "configure: failed program was:" >&5
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-
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-
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-
-echo $ac_n "checking whether alloca needs Cray hooks""... $ac_c" 1>&6
-echo "configure:1640: checking whether alloca needs Cray hooks" >&5
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- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1645 "configure"
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- ac_cv_os_cray=yes
-else
- rm -rf conftest*
- ac_cv_os_cray=no
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-rm -f conftest*
-
-fi
-
-echo "$ac_t""$ac_cv_os_cray" 1>&6
-if test $ac_cv_os_cray = yes; then
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- echo $ac_n "checking for $ac_func""... $ac_c" 1>&6
-echo "configure:1670: checking for $ac_func" >&5
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- echo $ac_n "(cached) $ac_c" 1>&6
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- cat > conftest.$ac_ext <<EOF
-#line 1675 "configure"
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-char $ac_func();
-
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-if { (eval echo configure:1698: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
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- eval "ac_cv_func_$ac_func=yes"
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- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=no"
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-
-if eval "test \"`echo '$ac_cv_func_'$ac_func`\" = yes"; then
- echo "$ac_t""yes" 1>&6
- cat >> confdefs.h <<EOF
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-
- break
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- echo "$ac_t""no" 1>&6
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-
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-
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-echo "configure:1725: checking stack direction for C alloca" >&5
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-#line 1733 "configure"
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-{
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-{
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-}
-EOF
-if { (eval echo configure:1752: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null
-then
- ac_cv_c_stack_direction=1
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -fr conftest*
- ac_cv_c_stack_direction=-1
-fi
-rm -fr conftest*
-fi
-
-fi
-
-echo "$ac_t""$ac_cv_c_stack_direction" 1>&6
-cat >> confdefs.h <<EOF
-#define STACK_DIRECTION $ac_cv_c_stack_direction
-EOF
-
-fi
-
-for ac_hdr in unistd.h
-do
-ac_safe=`echo "$ac_hdr" | sed 'y%./+-%__p_%'`
-echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6
-echo "configure:1777: checking for $ac_hdr" >&5
-if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1782 "configure"
-#include "confdefs.h"
-#include <$ac_hdr>
-EOF
-ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:1787: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
-ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
-if test -z "$ac_err"; then
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=yes"
-else
- echo "$ac_err" >&5
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=no"
-fi
-rm -f conftest*
-fi
-if eval "test \"`echo '$ac_cv_header_'$ac_safe`\" = yes"; then
- echo "$ac_t""yes" 1>&6
- ac_tr_hdr=HAVE_`echo $ac_hdr | sed 'y%abcdefghijklmnopqrstuvwxyz./-%ABCDEFGHIJKLMNOPQRSTUVWXYZ___%'`
- cat >> confdefs.h <<EOF
-#define $ac_tr_hdr 1
-EOF
-
-else
- echo "$ac_t""no" 1>&6
-fi
-done
-
-for ac_func in getpagesize
-do
-echo $ac_n "checking for $ac_func""... $ac_c" 1>&6
-echo "configure:1816: checking for $ac_func" >&5
-if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1821 "configure"
-#include "confdefs.h"
-/* System header to define __stub macros and hopefully few prototypes,
- which can conflict with char $ac_func(); below. */
-#include <assert.h>
-/* Override any gcc2 internal prototype to avoid an error. */
-/* We use char because int might match the return type of a gcc2
- builtin and then its argument prototype would still apply. */
-char $ac_func();
-
-int main() {
-
-/* The GNU C library defines this for functions which it implements
- to always fail with ENOSYS. Some functions are actually named
- something starting with __ and the normal name is an alias. */
-#if defined (__stub_$ac_func) || defined (__stub___$ac_func)
-choke me
-#else
-$ac_func();
-#endif
-
-; return 0; }
-EOF
-if { (eval echo configure:1844: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=yes"
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=no"
-fi
-rm -f conftest*
-fi
-
-if eval "test \"`echo '$ac_cv_func_'$ac_func`\" = yes"; then
- echo "$ac_t""yes" 1>&6
- ac_tr_func=HAVE_`echo $ac_func | tr 'abcdefghijklmnopqrstuvwxyz' 'ABCDEFGHIJKLMNOPQRSTUVWXYZ'`
- cat >> confdefs.h <<EOF
-#define $ac_tr_func 1
-EOF
-
-else
- echo "$ac_t""no" 1>&6
-fi
-done
-
-echo $ac_n "checking for working mmap""... $ac_c" 1>&6
-echo "configure:1869: checking for working mmap" >&5
-if eval "test \"`echo '$''{'ac_cv_func_mmap_fixed_mapped'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- if test "$cross_compiling" = yes; then
- ac_cv_func_mmap_fixed_mapped=no
-else
- cat > conftest.$ac_ext <<EOF
-#line 1877 "configure"
-#include "confdefs.h"
-
-/* Thanks to Mike Haertel and Jim Avera for this test.
- Here is a matrix of mmap possibilities:
- mmap private not fixed
- mmap private fixed at somewhere currently unmapped
- mmap private fixed at somewhere already mapped
- mmap shared not fixed
- mmap shared fixed at somewhere currently unmapped
- mmap shared fixed at somewhere already mapped
- For private mappings, we should verify that changes cannot be read()
- back from the file, nor mmap's back from the file at a different
- address. (There have been systems where private was not correctly
- implemented like the infamous i386 svr4.0, and systems where the
- VM page cache was not coherent with the filesystem buffer cache
- like early versions of FreeBSD and possibly contemporary NetBSD.)
- For shared mappings, we should conversely verify that changes get
- propogated back to all the places they're supposed to be.
-
- Grep wants private fixed already mapped.
- The main things grep needs to know about mmap are:
- * does it exist and is it safe to write into the mmap'd area
- * how to use it (BSD variants) */
-#include <sys/types.h>
-#include <fcntl.h>
-#include <sys/mman.h>
-
-/* This mess was copied from the GNU getpagesize.h. */
-#ifndef HAVE_GETPAGESIZE
-# ifdef HAVE_UNISTD_H
-# include <unistd.h>
-# endif
-
-/* Assume that all systems that can run configure have sys/param.h. */
-# ifndef HAVE_SYS_PARAM_H
-# define HAVE_SYS_PARAM_H 1
-# endif
-
-# ifdef _SC_PAGESIZE
-# define getpagesize() sysconf(_SC_PAGESIZE)
-# else /* no _SC_PAGESIZE */
-# ifdef HAVE_SYS_PARAM_H
-# include <sys/param.h>
-# ifdef EXEC_PAGESIZE
-# define getpagesize() EXEC_PAGESIZE
-# else /* no EXEC_PAGESIZE */
-# ifdef NBPG
-# define getpagesize() NBPG * CLSIZE
-# ifndef CLSIZE
-# define CLSIZE 1
-# endif /* no CLSIZE */
-# else /* no NBPG */
-# ifdef NBPC
-# define getpagesize() NBPC
-# else /* no NBPC */
-# ifdef PAGESIZE
-# define getpagesize() PAGESIZE
-# endif /* PAGESIZE */
-# endif /* no NBPC */
-# endif /* no NBPG */
-# endif /* no EXEC_PAGESIZE */
-# else /* no HAVE_SYS_PARAM_H */
-# define getpagesize() 8192 /* punt totally */
-# endif /* no HAVE_SYS_PARAM_H */
-# endif /* no _SC_PAGESIZE */
-
-#endif /* no HAVE_GETPAGESIZE */
-
-#ifdef __cplusplus
-extern "C" { void *malloc(unsigned); }
-#else
-char *malloc();
-#endif
-
-int
-main()
-{
- char *data, *data2, *data3;
- int i, pagesize;
- int fd;
-
- pagesize = getpagesize();
-
- /*
- * First, make a file with some known garbage in it.
- */
- data = malloc(pagesize);
- if (!data)
- exit(1);
- for (i = 0; i < pagesize; ++i)
- *(data + i) = rand();
- umask(0);
- fd = creat("conftestmmap", 0600);
- if (fd < 0)
- exit(1);
- if (write(fd, data, pagesize) != pagesize)
- exit(1);
- close(fd);
-
- /*
- * Next, try to mmap the file at a fixed address which
- * already has something else allocated at it. If we can,
- * also make sure that we see the same garbage.
- */
- fd = open("conftestmmap", O_RDWR);
- if (fd < 0)
- exit(1);
- data2 = malloc(2 * pagesize);
- if (!data2)
- exit(1);
- data2 += (pagesize - ((int) data2 & (pagesize - 1))) & (pagesize - 1);
- if (data2 != mmap(data2, pagesize, PROT_READ | PROT_WRITE,
- MAP_PRIVATE | MAP_FIXED, fd, 0L))
- exit(1);
- for (i = 0; i < pagesize; ++i)
- if (*(data + i) != *(data2 + i))
- exit(1);
-
- /*
- * Finally, make sure that changes to the mapped area
- * do not percolate back to the file as seen by read().
- * (This is a bug on some variants of i386 svr4.0.)
- */
- for (i = 0; i < pagesize; ++i)
- *(data2 + i) = *(data2 + i) + 1;
- data3 = malloc(pagesize);
- if (!data3)
- exit(1);
- if (read(fd, data3, pagesize) != pagesize)
- exit(1);
- for (i = 0; i < pagesize; ++i)
- if (*(data + i) != *(data3 + i))
- exit(1);
- close(fd);
- unlink("conftestmmap");
- exit(0);
-}
-
-EOF
-if { (eval echo configure:2017: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null
-then
- ac_cv_func_mmap_fixed_mapped=yes
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -fr conftest*
- ac_cv_func_mmap_fixed_mapped=no
-fi
-rm -fr conftest*
-fi
-
-fi
-
-echo "$ac_t""$ac_cv_func_mmap_fixed_mapped" 1>&6
-if test $ac_cv_func_mmap_fixed_mapped = yes; then
- cat >> confdefs.h <<\EOF
-#define HAVE_MMAP 1
-EOF
-
-fi
-
-
- for ac_hdr in argz.h limits.h locale.h nl_types.h malloc.h string.h \
-unistd.h values.h sys/param.h
-do
-ac_safe=`echo "$ac_hdr" | sed 'y%./+-%__p_%'`
-echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6
-echo "configure:2045: checking for $ac_hdr" >&5
-if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 2050 "configure"
-#include "confdefs.h"
-#include <$ac_hdr>
-EOF
-ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:2055: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
-ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
-if test -z "$ac_err"; then
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=yes"
-else
- echo "$ac_err" >&5
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=no"
-fi
-rm -f conftest*
-fi
-if eval "test \"`echo '$ac_cv_header_'$ac_safe`\" = yes"; then
- echo "$ac_t""yes" 1>&6
- ac_tr_hdr=HAVE_`echo $ac_hdr | sed 'y%abcdefghijklmnopqrstuvwxyz./-%ABCDEFGHIJKLMNOPQRSTUVWXYZ___%'`
- cat >> confdefs.h <<EOF
-#define $ac_tr_hdr 1
-EOF
-
-else
- echo "$ac_t""no" 1>&6
-fi
-done
-
- for ac_func in getcwd munmap putenv setenv setlocale strchr strcasecmp \
-__argz_count __argz_stringify __argz_next
-do
-echo $ac_n "checking for $ac_func""... $ac_c" 1>&6
-echo "configure:2085: checking for $ac_func" >&5
-if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 2090 "configure"
-#include "confdefs.h"
-/* System header to define __stub macros and hopefully few prototypes,
- which can conflict with char $ac_func(); below. */
-#include <assert.h>
-/* Override any gcc2 internal prototype to avoid an error. */
-/* We use char because int might match the return type of a gcc2
- builtin and then its argument prototype would still apply. */
-char $ac_func();
-
-int main() {
-
-/* The GNU C library defines this for functions which it implements
- to always fail with ENOSYS. Some functions are actually named
- something starting with __ and the normal name is an alias. */
-#if defined (__stub_$ac_func) || defined (__stub___$ac_func)
-choke me
-#else
-$ac_func();
-#endif
-
-; return 0; }
-EOF
-if { (eval echo configure:2113: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=yes"
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=no"
-fi
-rm -f conftest*
-fi
-
-if eval "test \"`echo '$ac_cv_func_'$ac_func`\" = yes"; then
- echo "$ac_t""yes" 1>&6
- ac_tr_func=HAVE_`echo $ac_func | tr 'abcdefghijklmnopqrstuvwxyz' 'ABCDEFGHIJKLMNOPQRSTUVWXYZ'`
- cat >> confdefs.h <<EOF
-#define $ac_tr_func 1
-EOF
-
-else
- echo "$ac_t""no" 1>&6
-fi
-done
-
-
- if test "${ac_cv_func_stpcpy+set}" != "set"; then
- for ac_func in stpcpy
-do
-echo $ac_n "checking for $ac_func""... $ac_c" 1>&6
-echo "configure:2142: checking for $ac_func" >&5
-if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 2147 "configure"
-#include "confdefs.h"
-/* System header to define __stub macros and hopefully few prototypes,
- which can conflict with char $ac_func(); below. */
-#include <assert.h>
-/* Override any gcc2 internal prototype to avoid an error. */
-/* We use char because int might match the return type of a gcc2
- builtin and then its argument prototype would still apply. */
-char $ac_func();
-
-int main() {
-
-/* The GNU C library defines this for functions which it implements
- to always fail with ENOSYS. Some functions are actually named
- something starting with __ and the normal name is an alias. */
-#if defined (__stub_$ac_func) || defined (__stub___$ac_func)
-choke me
-#else
-$ac_func();
-#endif
-
-; return 0; }
-EOF
-if { (eval echo configure:2170: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=yes"
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=no"
-fi
-rm -f conftest*
-fi
-
-if eval "test \"`echo '$ac_cv_func_'$ac_func`\" = yes"; then
- echo "$ac_t""yes" 1>&6
- ac_tr_func=HAVE_`echo $ac_func | tr 'abcdefghijklmnopqrstuvwxyz' 'ABCDEFGHIJKLMNOPQRSTUVWXYZ'`
- cat >> confdefs.h <<EOF
-#define $ac_tr_func 1
-EOF
-
-else
- echo "$ac_t""no" 1>&6
-fi
-done
-
- fi
- if test "${ac_cv_func_stpcpy}" = "yes"; then
- cat >> confdefs.h <<\EOF
-#define HAVE_STPCPY 1
-EOF
-
- fi
-
- if test $ac_cv_header_locale_h = yes; then
- echo $ac_n "checking for LC_MESSAGES""... $ac_c" 1>&6
-echo "configure:2204: checking for LC_MESSAGES" >&5
-if eval "test \"`echo '$''{'am_cv_val_LC_MESSAGES'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 2209 "configure"
-#include "confdefs.h"
-#include <locale.h>
-int main() {
-return LC_MESSAGES
-; return 0; }
-EOF
-if { (eval echo configure:2216: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- rm -rf conftest*
- am_cv_val_LC_MESSAGES=yes
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- am_cv_val_LC_MESSAGES=no
-fi
-rm -f conftest*
-fi
-
-echo "$ac_t""$am_cv_val_LC_MESSAGES" 1>&6
- if test $am_cv_val_LC_MESSAGES = yes; then
- cat >> confdefs.h <<\EOF
-#define HAVE_LC_MESSAGES 1
-EOF
-
- fi
- fi
- echo $ac_n "checking whether NLS is requested""... $ac_c" 1>&6
-echo "configure:2237: checking whether NLS is requested" >&5
- # Check whether --enable-nls or --disable-nls was given.
-if test "${enable_nls+set}" = set; then
- enableval="$enable_nls"
- USE_NLS=$enableval
-else
- USE_NLS=yes
-fi
-
- echo "$ac_t""$USE_NLS" 1>&6
-
-
- USE_INCLUDED_LIBINTL=no
-
- if test "$USE_NLS" = "yes"; then
- cat >> confdefs.h <<\EOF
-#define ENABLE_NLS 1
-EOF
-
- echo $ac_n "checking whether included gettext is requested""... $ac_c" 1>&6
-echo "configure:2257: checking whether included gettext is requested" >&5
- # Check whether --with-included-gettext or --without-included-gettext was given.
-if test "${with_included_gettext+set}" = set; then
- withval="$with_included_gettext"
- nls_cv_force_use_gnu_gettext=$withval
-else
- nls_cv_force_use_gnu_gettext=no
-fi
-
- echo "$ac_t""$nls_cv_force_use_gnu_gettext" 1>&6
-
- nls_cv_use_gnu_gettext="$nls_cv_force_use_gnu_gettext"
- if test "$nls_cv_force_use_gnu_gettext" != "yes"; then
- nls_cv_header_intl=
- nls_cv_header_libgt=
- CATOBJEXT=NONE
-
- ac_safe=`echo "libintl.h" | sed 'y%./+-%__p_%'`
-echo $ac_n "checking for libintl.h""... $ac_c" 1>&6
-echo "configure:2276: checking for libintl.h" >&5
-if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 2281 "configure"
-#include "confdefs.h"
-#include <libintl.h>
-EOF
-ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:2286: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
-ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
-if test -z "$ac_err"; then
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=yes"
-else
- echo "$ac_err" >&5
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=no"
-fi
-rm -f conftest*
-fi
-if eval "test \"`echo '$ac_cv_header_'$ac_safe`\" = yes"; then
- echo "$ac_t""yes" 1>&6
- echo $ac_n "checking for gettext in libc""... $ac_c" 1>&6
-echo "configure:2303: checking for gettext in libc" >&5
-if eval "test \"`echo '$''{'gt_cv_func_gettext_libc'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 2308 "configure"
-#include "confdefs.h"
-#include <libintl.h>
-int main() {
-return (int) gettext ("")
-; return 0; }
-EOF
-if { (eval echo configure:2315: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- rm -rf conftest*
- gt_cv_func_gettext_libc=yes
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- gt_cv_func_gettext_libc=no
-fi
-rm -f conftest*
-fi
-
-echo "$ac_t""$gt_cv_func_gettext_libc" 1>&6
-
- if test "$gt_cv_func_gettext_libc" != "yes"; then
- echo $ac_n "checking for bindtextdomain in -lintl""... $ac_c" 1>&6
-echo "configure:2331: checking for bindtextdomain in -lintl" >&5
-ac_lib_var=`echo intl'_'bindtextdomain | sed 'y%./+-%__p_%'`
-if eval "test \"`echo '$''{'ac_cv_lib_$ac_lib_var'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- ac_save_LIBS="$LIBS"
-LIBS="-lintl $LIBS"
-cat > conftest.$ac_ext <<EOF
-#line 2339 "configure"
-#include "confdefs.h"
-/* Override any gcc2 internal prototype to avoid an error. */
-/* We use char because int might match the return type of a gcc2
- builtin and then its argument prototype would still apply. */
-char bindtextdomain();
-
-int main() {
-bindtextdomain()
-; return 0; }
-EOF
-if { (eval echo configure:2350: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- rm -rf conftest*
- eval "ac_cv_lib_$ac_lib_var=yes"
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_lib_$ac_lib_var=no"
-fi
-rm -f conftest*
-LIBS="$ac_save_LIBS"
-
-fi
-if eval "test \"`echo '$ac_cv_lib_'$ac_lib_var`\" = yes"; then
- echo "$ac_t""yes" 1>&6
- echo $ac_n "checking for gettext in libintl""... $ac_c" 1>&6
-echo "configure:2366: checking for gettext in libintl" >&5
-if eval "test \"`echo '$''{'gt_cv_func_gettext_libintl'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 2371 "configure"
-#include "confdefs.h"
-
-int main() {
-return (int) gettext ("")
-; return 0; }
-EOF
-if { (eval echo configure:2378: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- rm -rf conftest*
- gt_cv_func_gettext_libintl=yes
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- gt_cv_func_gettext_libintl=no
-fi
-rm -f conftest*
-fi
-
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-
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- # Extract the first word of "msgfmt", so it can be a program name with args.
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- *)
- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
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-
- # Extract the first word of "xgettext", so it can be a program name with args.
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- cat > conftest.$ac_ext <<EOF
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-
- # Extract the first word of "gmsgfmt", so it can be a program name with args.
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- IFS="$ac_save_ifs"
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-else
- echo "$ac_t""no" 1>&6
-fi
-
-
- USE_INCLUDED_LIBINTL=yes
- CATOBJEXT=.gmo
- INSTOBJEXT=.mo
- DATADIRNAME=share
- INTLDEPS='$(top_builddir)/../intl/libintl.a'
- INTLLIBS=$INTLDEPS
- LIBS=`echo $LIBS | sed -e 's/-lintl//'`
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- nls_cv_header_libgt=libgettext.h
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-
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- else
- echo "$ac_t""found xgettext programs is not GNU xgettext; ignore it" 1>&6
- XGETTEXT=":"
- fi
- fi
-
- # We need to process the po/ directory.
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-
- # If this is used in GNU gettext we have to set USE_NLS to `yes'
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-
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- done
-
-
-
-
-
-
-
-
-
-
-
-
-
-
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- LINGUAS=
- else
- echo $ac_n "checking for catalogs to be installed""... $ac_c" 1>&6
-echo "configure:2763: checking for catalogs to be installed" >&5
- NEW_LINGUAS=
- for lang in ${LINGUAS=$ALL_LINGUAS}; do
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- esac
- done
- LINGUAS=$NEW_LINGUAS
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- fi
-
- if test -n "$LINGUAS"; then
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- fi
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-
- if test $ac_cv_header_locale_h = yes; then
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- else
- INCLUDE_LOCALE_H="\
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-
-
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-echo $ac_n "checking for linux/version.h""... $ac_c" 1>&6
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- echo "configure: failed program was:" >&5
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- echo "$ac_t""no" 1>&6
-msgformat=xopen
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-
-
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- sed -e '/^#.*[^\\]$/d' -e '/^#$/d' \
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-
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-
-
-
- MKINSTALLDIRS="\$(srcdir)/../../mkinstalldirs"
-
-
- l=
-
-
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-
-
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-echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6
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-
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-
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-
-trap 'rm -f $CONFIG_STATUS conftest*; exit 1' 1 2 15
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-
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-ac_cs_usage="Usage: $CONFIG_STATUS [--recheck] [--version] [--help]"
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-
-ac_given_srcdir=$srcdir
-ac_given_INSTALL="$INSTALL"
-
-trap 'rm -fr `echo "Makefile config.h:config.in" | sed "s/:[^ ]*//g"` conftest*; exit 1' 1 2 15
-EOF
-cat >> $CONFIG_STATUS <<EOF
-
-# Protect against being on the right side of a sed subst in config.status.
-sed 's/%@/@@/; s/@%/@@/; s/%g\$/@g/; /@g\$/s/[\\\\&%]/\\\\&/g;
- s/@@/%@/; s/@@/@%/; s/@g\$/%g/' > conftest.subs <<\\CEOF
-$ac_vpsub
-$extrasub
-s%@sim_environment@%$sim_environment%g
-s%@sim_alignment@%$sim_alignment%g
-s%@sim_assert@%$sim_assert%g
-s%@sim_bitsize@%$sim_bitsize%g
-s%@sim_endian@%$sim_endian%g
-s%@sim_hostendian@%$sim_hostendian%g
-s%@sim_float@%$sim_float%g
-s%@sim_scache@%$sim_scache%g
-s%@sim_default_model@%$sim_default_model%g
-s%@sim_hw_cflags@%$sim_hw_cflags%g
-s%@sim_hw_objs@%$sim_hw_objs%g
-s%@sim_hw@%$sim_hw%g
-s%@sim_inline@%$sim_inline%g
-s%@sim_packages@%$sim_packages%g
-s%@sim_regparm@%$sim_regparm%g
-s%@sim_reserved_bits@%$sim_reserved_bits%g
-s%@sim_smp@%$sim_smp%g
-s%@sim_stdcall@%$sim_stdcall%g
-s%@sim_xor_endian@%$sim_xor_endian%g
-s%@WARN_CFLAGS@%$WARN_CFLAGS%g
-s%@WERROR_CFLAGS@%$WERROR_CFLAGS%g
-s%@SHELL@%$SHELL%g
-s%@CFLAGS@%$CFLAGS%g
-s%@CPPFLAGS@%$CPPFLAGS%g
-s%@CXXFLAGS@%$CXXFLAGS%g
-s%@FFLAGS@%$FFLAGS%g
-s%@DEFS@%$DEFS%g
-s%@LDFLAGS@%$LDFLAGS%g
-s%@LIBS@%$LIBS%g
-s%@exec_prefix@%$exec_prefix%g
-s%@prefix@%$prefix%g
-s%@program_transform_name@%$program_transform_name%g
-s%@bindir@%$bindir%g
-s%@sbindir@%$sbindir%g
-s%@libexecdir@%$libexecdir%g
-s%@datadir@%$datadir%g
-s%@sysconfdir@%$sysconfdir%g
-s%@sharedstatedir@%$sharedstatedir%g
-s%@localstatedir@%$localstatedir%g
-s%@libdir@%$libdir%g
-s%@includedir@%$includedir%g
-s%@oldincludedir@%$oldincludedir%g
-s%@infodir@%$infodir%g
-s%@mandir@%$mandir%g
-s%@host@%$host%g
-s%@host_alias@%$host_alias%g
-s%@host_cpu@%$host_cpu%g
-s%@host_vendor@%$host_vendor%g
-s%@host_os@%$host_os%g
-s%@target@%$target%g
-s%@target_alias@%$target_alias%g
-s%@target_cpu@%$target_cpu%g
-s%@target_vendor@%$target_vendor%g
-s%@target_os@%$target_os%g
-s%@build@%$build%g
-s%@build_alias@%$build_alias%g
-s%@build_cpu@%$build_cpu%g
-s%@build_vendor@%$build_vendor%g
-s%@build_os@%$build_os%g
-s%@CC@%$CC%g
-s%@INSTALL_PROGRAM@%$INSTALL_PROGRAM%g
-s%@INSTALL_SCRIPT@%$INSTALL_SCRIPT%g
-s%@INSTALL_DATA@%$INSTALL_DATA%g
-s%@HDEFINES@%$HDEFINES%g
-s%@AR@%$AR%g
-s%@RANLIB@%$RANLIB%g
-s%@CC_FOR_BUILD@%$CC_FOR_BUILD%g
-s%@SET_MAKE@%$SET_MAKE%g
-s%@CPP@%$CPP%g
-s%@ALLOCA@%$ALLOCA%g
-s%@USE_NLS@%$USE_NLS%g
-s%@MSGFMT@%$MSGFMT%g
-s%@GMSGFMT@%$GMSGFMT%g
-s%@XGETTEXT@%$XGETTEXT%g
-s%@USE_INCLUDED_LIBINTL@%$USE_INCLUDED_LIBINTL%g
-s%@CATALOGS@%$CATALOGS%g
-s%@CATOBJEXT@%$CATOBJEXT%g
-s%@DATADIRNAME@%$DATADIRNAME%g
-s%@GMOFILES@%$GMOFILES%g
-s%@INSTOBJEXT@%$INSTOBJEXT%g
-s%@INTLDEPS@%$INTLDEPS%g
-s%@INTLLIBS@%$INTLLIBS%g
-s%@INTLOBJS@%$INTLOBJS%g
-s%@POFILES@%$POFILES%g
-s%@POSUB@%$POSUB%g
-s%@INCLUDE_LOCALE_H@%$INCLUDE_LOCALE_H%g
-s%@GT_NO@%$GT_NO%g
-s%@GT_YES@%$GT_YES%g
-s%@MKINSTALLDIRS@%$MKINSTALLDIRS%g
-s%@l@%$l%g
-
-CEOF
-EOF
-
-cat >> $CONFIG_STATUS <<\EOF
-
-# Split the substitutions into bite-sized pieces for seds with
-# small command number limits, like on Digital OSF/1 and HP-UX.
-ac_max_sed_cmds=90 # Maximum number of lines to put in a sed script.
-ac_file=1 # Number of current file.
-ac_beg=1 # First line for current file.
-ac_end=$ac_max_sed_cmds # Line after last line for current file.
-ac_more_lines=:
-ac_sed_cmds=""
-while $ac_more_lines; do
- if test $ac_beg -gt 1; then
- sed "1,${ac_beg}d; ${ac_end}q" conftest.subs > conftest.s$ac_file
- else
- sed "${ac_end}q" conftest.subs > conftest.s$ac_file
- fi
- if test ! -s conftest.s$ac_file; then
- ac_more_lines=false
- rm -f conftest.s$ac_file
- else
- if test -z "$ac_sed_cmds"; then
- ac_sed_cmds="sed -f conftest.s$ac_file"
- else
- ac_sed_cmds="$ac_sed_cmds | sed -f conftest.s$ac_file"
- fi
- ac_file=`expr $ac_file + 1`
- ac_beg=$ac_end
- ac_end=`expr $ac_end + $ac_max_sed_cmds`
- fi
-done
-if test -z "$ac_sed_cmds"; then
- ac_sed_cmds=cat
-fi
-EOF
-
-cat >> $CONFIG_STATUS <<EOF
-
-CONFIG_FILES=\${CONFIG_FILES-"Makefile"}
-EOF
-cat >> $CONFIG_STATUS <<\EOF
-for ac_file in .. $CONFIG_FILES; do if test "x$ac_file" != x..; then
- # Support "outfile[:infile[:infile...]]", defaulting infile="outfile.in".
- case "$ac_file" in
- *:*) ac_file_in=`echo "$ac_file"|sed 's%[^:]*:%%'`
- ac_file=`echo "$ac_file"|sed 's%:.*%%'` ;;
- *) ac_file_in="${ac_file}.in" ;;
- esac
-
- # Adjust a relative srcdir, top_srcdir, and INSTALL for subdirectories.
-
- # Remove last slash and all that follows it. Not all systems have dirname.
- ac_dir=`echo $ac_file|sed 's%/[^/][^/]*$%%'`
- if test "$ac_dir" != "$ac_file" && test "$ac_dir" != .; then
- # The file is in a subdirectory.
- test ! -d "$ac_dir" && mkdir "$ac_dir"
- ac_dir_suffix="/`echo $ac_dir|sed 's%^\./%%'`"
- # A "../" for each directory in $ac_dir_suffix.
- ac_dots=`echo $ac_dir_suffix|sed 's%/[^/]*%../%g'`
- else
- ac_dir_suffix= ac_dots=
- fi
-
- case "$ac_given_srcdir" in
- .) srcdir=.
- if test -z "$ac_dots"; then top_srcdir=.
- else top_srcdir=`echo $ac_dots|sed 's%/$%%'`; fi ;;
- /*) srcdir="$ac_given_srcdir$ac_dir_suffix"; top_srcdir="$ac_given_srcdir" ;;
- *) # Relative path.
- srcdir="$ac_dots$ac_given_srcdir$ac_dir_suffix"
- top_srcdir="$ac_dots$ac_given_srcdir" ;;
- esac
-
- case "$ac_given_INSTALL" in
- [/$]*) INSTALL="$ac_given_INSTALL" ;;
- *) INSTALL="$ac_dots$ac_given_INSTALL" ;;
- esac
-
- echo creating "$ac_file"
- rm -f "$ac_file"
- configure_input="Generated automatically from `echo $ac_file_in|sed 's%.*/%%'` by configure."
- case "$ac_file" in
- *Makefile*) ac_comsub="1i\\
-# $configure_input" ;;
- *) ac_comsub= ;;
- esac
-
- ac_file_inputs=`echo $ac_file_in|sed -e "s%^%$ac_given_srcdir/%" -e "s%:% $ac_given_srcdir/%g"`
- sed -e "$ac_comsub
-s%@configure_input@%$configure_input%g
-s%@srcdir@%$srcdir%g
-s%@top_srcdir@%$top_srcdir%g
-s%@INSTALL@%$INSTALL%g
-" $ac_file_inputs | (eval "$ac_sed_cmds") > $ac_file
-fi; done
-rm -f conftest.s*
-
-# These sed commands are passed to sed as "A NAME B NAME C VALUE D", where
-# NAME is the cpp macro being defined and VALUE is the value it is being given.
-#
-# ac_d sets the value in "#define NAME VALUE" lines.
-ac_dA='s%^\([ ]*\)#\([ ]*define[ ][ ]*\)'
-ac_dB='\([ ][ ]*\)[^ ]*%\1#\2'
-ac_dC='\3'
-ac_dD='%g'
-# ac_u turns "#undef NAME" with trailing blanks into "#define NAME VALUE".
-ac_uA='s%^\([ ]*\)#\([ ]*\)undef\([ ][ ]*\)'
-ac_uB='\([ ]\)%\1#\2define\3'
-ac_uC=' '
-ac_uD='\4%g'
-# ac_e turns "#undef NAME" without trailing blanks into "#define NAME VALUE".
-ac_eA='s%^\([ ]*\)#\([ ]*\)undef\([ ][ ]*\)'
-ac_eB='$%\1#\2define\3'
-ac_eC=' '
-ac_eD='%g'
-
-if test "${CONFIG_HEADERS+set}" != set; then
-EOF
-cat >> $CONFIG_STATUS <<EOF
- CONFIG_HEADERS="config.h:config.in"
-EOF
-cat >> $CONFIG_STATUS <<\EOF
-fi
-for ac_file in .. $CONFIG_HEADERS; do if test "x$ac_file" != x..; then
- # Support "outfile[:infile[:infile...]]", defaulting infile="outfile.in".
- case "$ac_file" in
- *:*) ac_file_in=`echo "$ac_file"|sed 's%[^:]*:%%'`
- ac_file=`echo "$ac_file"|sed 's%:.*%%'` ;;
- *) ac_file_in="${ac_file}.in" ;;
- esac
-
- echo creating $ac_file
-
- rm -f conftest.frag conftest.in conftest.out
- ac_file_inputs=`echo $ac_file_in|sed -e "s%^%$ac_given_srcdir/%" -e "s%:% $ac_given_srcdir/%g"`
- cat $ac_file_inputs > conftest.in
-
-EOF
-
-# Transform confdefs.h into a sed script conftest.vals that substitutes
-# the proper values into config.h.in to produce config.h. And first:
-# Protect against being on the right side of a sed subst in config.status.
-# Protect against being in an unquoted here document in config.status.
-rm -f conftest.vals
-cat > conftest.hdr <<\EOF
-s/[\\&%]/\\&/g
-s%[\\$`]%\\&%g
-s%#define \([A-Za-z_][A-Za-z0-9_]*\) *\(.*\)%${ac_dA}\1${ac_dB}\1${ac_dC}\2${ac_dD}%gp
-s%ac_d%ac_u%gp
-s%ac_u%ac_e%gp
-EOF
-sed -n -f conftest.hdr confdefs.h > conftest.vals
-rm -f conftest.hdr
-
-# This sed command replaces #undef with comments. This is necessary, for
-# example, in the case of _POSIX_SOURCE, which is predefined and required
-# on some systems where configure will not decide to define it.
-cat >> conftest.vals <<\EOF
-s%^[ ]*#[ ]*undef[ ][ ]*[a-zA-Z_][a-zA-Z_0-9]*%/* & */%
-EOF
-
-# Break up conftest.vals because some shells have a limit on
-# the size of here documents, and old seds have small limits too.
-
-rm -f conftest.tail
-while :
-do
- ac_lines=`grep -c . conftest.vals`
- # grep -c gives empty output for an empty file on some AIX systems.
- if test -z "$ac_lines" || test "$ac_lines" -eq 0; then break; fi
- # Write a limited-size here document to conftest.frag.
- echo ' cat > conftest.frag <<CEOF' >> $CONFIG_STATUS
- sed ${ac_max_here_lines}q conftest.vals >> $CONFIG_STATUS
- echo 'CEOF
- sed -f conftest.frag conftest.in > conftest.out
- rm -f conftest.in
- mv conftest.out conftest.in
-' >> $CONFIG_STATUS
- sed 1,${ac_max_here_lines}d conftest.vals > conftest.tail
- rm -f conftest.vals
- mv conftest.tail conftest.vals
-done
-rm -f conftest.vals
-
-cat >> $CONFIG_STATUS <<\EOF
- rm -f conftest.frag conftest.h
- echo "/* $ac_file. Generated automatically by configure. */" > conftest.h
- cat conftest.in >> conftest.h
- rm -f conftest.in
- if cmp -s $ac_file conftest.h 2>/dev/null; then
- echo "$ac_file is unchanged"
- rm -f conftest.h
- else
- # Remove last slash and all that follows it. Not all systems have dirname.
- ac_dir=`echo $ac_file|sed 's%/[^/][^/]*$%%'`
- if test "$ac_dir" != "$ac_file" && test "$ac_dir" != .; then
- # The file is in a subdirectory.
- test ! -d "$ac_dir" && mkdir "$ac_dir"
- fi
- rm -f $ac_file
- mv conftest.h $ac_file
- fi
-fi; done
-
-EOF
-cat >> $CONFIG_STATUS <<EOF
-
-EOF
-cat >> $CONFIG_STATUS <<\EOF
-case x$CONFIG_HEADERS in xconfig.h:config.in) echo > stamp-h ;; esac
-exit 0
-EOF
-chmod +x $CONFIG_STATUS
-rm -fr confdefs* $ac_clean_files
-test "$no_create" = yes || ${CONFIG_SHELL-/bin/sh} $CONFIG_STATUS || exit 1
-
diff --git a/sim/w65/configure.in b/sim/w65/configure.in
deleted file mode 100644
index e2da7db1919..00000000000
--- a/sim/w65/configure.in
+++ /dev/null
@@ -1,48 +0,0 @@
-dnl Process this file with autoconf to produce a configure script.
-sinclude(../common/aclocal.m4)
-AC_PREREQ(2.5)dnl
-AC_INIT(Makefile.in)
-
-AC_CONFIG_HEADER(config.h:config.in)
-
-AC_CONFIG_AUX_DIR(`cd $srcdir;pwd`/../..)
-AC_CANONICAL_SYSTEM
-AC_ARG_PROGRAM
-AC_PROG_CC
-AC_PROG_INSTALL
-
-. ${srcdir}/../../bfd/configure.host
-
-AC_SUBST(CFLAGS)
-AC_SUBST(HDEFINES)
-AR=${AR-ar}
-AC_SUBST(AR)
-AC_PROG_RANLIB
-
-# Put a plausible default for CC_FOR_BUILD in Makefile.
-if test "x$cross_compiling" = "xno"; then
- CC_FOR_BUILD='$(CC)'
-else
- CC_FOR_BUILD=gcc
-fi
-AC_SUBST(CC_FOR_BUILD)
-
-dnl We don't use gettext, but bfd does. So we do the appropriate checks
-dnl to see if there are intl libraries we should link against.
-ALL_LINGUAS=
-CY_GNU_GETTEXT
-
-AC_CHECK_HEADERS(stdlib.h time.h unistd.h)
-
-AC_MSG_CHECKING([whether printf must be declared])
-AC_CACHE_VAL(sim_cv_decl_needed_printf,
-[AC_TRY_COMPILE([#include <stdio.h>],
-[int (*pfn) = (int (*)) printf],
-sim_cv_decl_needed_printf=no, sim_cv_decl_needed_printf=yes)])
-AC_MSG_RESULT($sim_cv_decl_needed_printf)
-if test $sim_cv_decl_needed_printf = yes; then
- AC_DEFINE(NEED_DECLARATION_PRINTF)
-fi
-
-AC_OUTPUT(Makefile,
-[case x$CONFIG_HEADERS in xconfig.h:config.in) echo > stamp-h ;; esac])
diff --git a/sim/w65/gencode.c b/sim/w65/gencode.c
deleted file mode 100644
index cbbeb5b535b..00000000000
--- a/sim/w65/gencode.c
+++ /dev/null
@@ -1,991 +0,0 @@
-/* Program to write out opcode tables for the W65816 and friends
- Copyright (C) 1995 Free Software Foundation, Inc.
- Written by Steve Chamberlain sac@cygnus.com
-
-
-GDB is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-GDB is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License
-along with this program; if not, write to the Free Software
-Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
-
-
-#include <stdio.h>
-
-
-struct opinfo
- {
- int code;
- char *opcode;
- char *mode;
- int clocks;
- int cpu;
- struct ainfo *ai;
- struct oinfo *oi;
- };
-
-#define W16_ONLY 1
-#define C02_ONLY 2
-
-struct ainfo
- {
- char *name;
- char *enumname;
- char *disasmstring;
- char *sizer;
- char *reloc0;
- char *howlval;
-
- /* If addr val could be reg addr - used for disasssmbly of
- args into reg names - you want lda <0x10 to turn into lda <r0
- but you don't want lda #0x10 to do the same. */
- char regflag;
- };
-
-#define GET_M 1
-#define SPECIAL_CASE 2
-#define COP_GET 3
-#define G2_GET 4
-#define BRANCH 5
-#define GET_X 6
-#define STANDARD_PC_GET 7
-#define PUSH_16 8
-#define PUSH_8 9
-#define PUSH_X 10
-#define PUSH_M 11
-#define POP_16 12
-#define POP_8 13
-#define POP_X 14
-#define POP_M 15
-#define STORE_M 16
-#define STORE_X 17
-struct oinfo
- {
- char *name;
- int howsrc;
- char *howto;
- };
-struct oinfo olist[] =
-{
- {"adc", GET_M, "{ int old_acc = GET_A; int old_src =src; src = old_src + old_acc + GET_CBIT; SET_NBIT_M(src); SET_VBIT_M(old_src, old_acc, src); SET_CBIT_M(src); SET_ZBIT_M(src); SET_A(src);}"},
- {"and", GET_M, "src = GET_A & src; SET_NBIT_M(src); SET_ZBIT_M(src);SET_A(src);"},
- {"asl", G2_GET, " src <<=1; SET_CBIT_M(src); SET_ZBIT_M(src);SET_NBIT_M(src);"},
- {"bcc", BRANCH, "GET_CBIT==0"},
- {"bcs", BRANCH, "GET_CBIT==1"},
- {"beq", BRANCH, "GET_ZBIT==1"},
- {"bit", GET_M, "SET_NBIT_M(src); SET_VBIT((src >> (GET_MBIT ? 6:14 ) &1)); SET_ZBIT_M (GET_A & src);"},
- {"bmi", BRANCH, "GET_NBIT==1"},
- {"bne", BRANCH, "GET_ZBIT==0"},
- {"bpl", BRANCH, "GET_NBIT==0"},
- {"bra", BRANCH, "1"},
- {"brk", SPECIAL_CASE,
- "\
-{\
- if (GET_E == 1) \
- { PUSH16(GET_PC + 1); PUSH8 (GET_P | BFLAG); SET_P (GET_P | IFLAG); SET_ONLY_PC(fetch16 (0xfffe));}\
- else \
- { PUSH8 (GET_PBR_LOW); PUSH16 (GET_PC); PUSH8(GET_P); SET_P(GET_P |IFLAG); SET_PBRPC(fetch16 (0xffe6));};\
- }"},
- {"brl", BRANCH, "1"},
- {"bvc", BRANCH, "GET_VBIT==0"},
- {"bvs", BRANCH, "GET_VBIT==1"},
- {"clc", SPECIAL_CASE, "SET_CBIT(0);"},
- {"cld", SPECIAL_CASE, "SET_DBIT(0);"},
- {"cli", SPECIAL_CASE, "SET_IBIT(0);"},
- {"clv", SPECIAL_CASE, "SET_VBIT(0);"},
- {"cmp", GET_M, "src = GET_A - src; SET_ZBIT_M(src); SET_CBIT_M(~src); SET_NBIT_M(src);"},
- {"cop", COP_GET,
- "\
-{\
- if (GET_E == 1) \
- { PUSH16(GET_PC + 1); PUSH8 (GET_P | BFLAG); SET_P ((GET_P | IFLAG) & ~DFLAG); SET_ONLY_PC(fetch16 (0xfff4));}\
- else \
- { PUSH8 (GET_PBR_LOW); PUSH16 (GET_PC); PUSH8(GET_P); SET_P((GET_P |IFLAG) & ~DFLAG); SET_PBRPC(fetch16 (0xffe4));};\
- }"},
- {"cpx", GET_X, "src = GET_X - src; SET_NBIT_X(src); SET_ZBIT_X(src); SET_CBIT_X(~src);"},
- {"cpy", GET_X, "src = GET_Y - src; SET_NBIT_X(src); SET_ZBIT_X(src); SET_CBIT_X(~src);"},
- {"dec", G2_GET, "src --; SET_NBIT_M(src); SET_ZBIT_M(src); "},
- {"dex", SPECIAL_CASE, "SET_X(GET_X -1); SET_NBIT_X(GET_X); SET_ZBIT_X(GET_X);"},
- {"dey", SPECIAL_CASE, "SET_Y(GET_Y -1); SET_NBIT_X(GET_Y); SET_ZBIT_X(GET_Y);"},
- {"eor", GET_M, "src = GET_A ^ src; SET_NBIT_M(src); SET_ZBIT_M(src);SET_A(src); "},
- {"inc", G2_GET, "src ++; SET_NBIT_M(src); SET_ZBIT_M(src); "},
- {"inx", SPECIAL_CASE, "SET_X(GET_X +1); SET_NBIT_X(GET_X); SET_ZBIT_X(GET_X);"},
- {"iny", SPECIAL_CASE, "SET_Y(GET_Y +1); SET_NBIT_X(GET_Y); SET_ZBIT_X(GET_Y);"},
- {"jmp", STANDARD_PC_GET, "SET_ONLY_PC(lval);"},
- {"jsr", STANDARD_PC_GET, "if (l) { PUSH8(GET_PBR_LOW);} PUSH16(GET_PC); SET_ONLY_PC(lval);\n"},
- {"lda", GET_M, "SET_A(src); SET_NBIT_M(GET_A); SET_ZBIT_M(GET_A);"},
- {"ldx", GET_X, "SET_X(src);SET_NBIT_X(GET_X); SET_ZBIT_X(GET_X);"},
- {"ldy", GET_X, "SET_Y(src);SET_NBIT_X(GET_Y); SET_ZBIT_X(GET_Y);"},
- {"lsr", G2_GET,
- "SET_CBIT(src & 1); \
- SET_NBIT(0); \
- src = src >> 1; \
- SET_ZBIT_M(src);"},
- {"mvn", SPECIAL_CASE,
- "{ int dst_bank; int src_bank; dst_bank = fetch8 ( GET_PC)<<16; INC_PC(1); src_bank = fetch8 (GET_PC)<<16; INC_PC(1);\
- do { store8 ( dst_bank + GET_X, fetch8 (src_bank + GET_Y)); SET_X(GET_X+1); SET_Y(GET_Y+1); SET_A((GET_A-1) & 0xffff); } while (GET_A != 0xffff);}"},
- {"mvp", SPECIAL_CASE,
- "{ int dst_bank; int src_bank; dst_bank = fetch8 ( GET_PBRPC)<<16; INC_PC(1); src_bank = fetch8 (GET_PBRPC)<<16; INC_PC(1);\
- do { store8 ( dst_bank + GET_X, fetch8 (src_bank + GET_Y)); SET_X(GET_X-1); SET_Y(GET_Y-1); SET_A((GET_A-1) & 0xffff); } while (GET_A != 0xffff);}"},
-
- {"nop", SPECIAL_CASE, ""},
-{"ora", GET_M, "SET_A(GET_A | src); SET_NBIT_M(GET_A); SET_ZBIT_M(GET_A);"},
- {"pea", PUSH_16, "src = fetch16(GET_PBRPC); INC_PC(2);"},
- {"pei", PUSH_16, "src = fetch16(fetch8(GET_PBRPC) + GET_D); INC_PC(1);"},
- {"per", PUSH_16, "src = fetch16(GET_PBRPC) + GET_PC+2; INC_PC(2);"},
- {"pha", PUSH_M, "src = GET_A;"},
- {"phb", PUSH_8, "src = GET_DBR_LOW;"},
- {"phd", PUSH_16, "src = GET_DPR;"},
- {"phk", PUSH_8, "src = GET_PBR_LOW;"},
- {"php", PUSH_8, "src = GET_P;"},
- {"phx", PUSH_X, "src = GET_X;"},
- {"phy", PUSH_X, "src = GET_Y;"},
- {"pla", POP_M, "SET_A( src); SET_NBIT_M(GET_A);SET_ZBIT_M(GET_A);"},
- {"plb", POP_8, "SET_DBR_LOW(src);SET_NBIT_8(src); SET_ZBIT_8(src);"},
- {"pld", POP_16, "SET_DPR(src);SET_NBIT_16(src); SET_ZBIT_16(src);"},
- {"plp", POP_8, "SET_P(src); RETHINK;"},
- {"plx", POP_X, "SET_X(src);SET_NBIT_X(src);SET_ZBIT_X(src);"},
- {"ply", POP_X, "SET_Y(src);SET_NBIT_X(src);SET_ZBIT_X(src);"},
- {"rep", COP_GET, "SET_P(GET_P & ~src); RETHINK;"},
- {"rol", G2_GET, "src = (src << 1) | GET_CBIT; SET_CBIT((src >> (GET_MBIT ? 7 : 15)) &1); SET_ZBIT_M(src);"},
- {"ror", G2_GET, "{ int t = src; src = (src>>1) | (GET_CBIT<<((GET_MBIT ? 8:16)-1));SET_NBIT_M(src);SET_ZBIT_M(src); SET_CBIT(t&1);}"},
- {"rti", SPECIAL_CASE, "{ int t; POP16(t); SET_ONLY_PC(t); if (GET_E==0) { POP8(t); SET_PBR(t);} POP8(t);SET_P(t);}"},
- {"rtl", SPECIAL_CASE, "{ int t; POP24(t); SET_PBRPC(t);}"},
- {"rts", SPECIAL_CASE, "{ int t; POP16(t); SET_ONLY_PC(t);}"},
- {"sbc", GET_M,
- "{ int old_acc = GET_A & AMASK; int old_src = src & AMASK; src = old_acc - old_src - !GET_CBIT; SET_A(src);\
- SET_CBIT(!(src>>(GET_MBIT?8:16) &1)); SET_VBIT_M(old_src,old_acc, src); SET_ZBIT_M(src); SET_NBIT_M(src);}"},
- {"sec", SPECIAL_CASE, "SET_CBIT(1);"},
- {"sed", SPECIAL_CASE, "SET_DBIT(1);"},
- {"sei", SPECIAL_CASE, "SET_IBIT(1);"},
- {"sep", COP_GET, "SET_P(GET_P | src);RETHINK;"},
- {"sta", STORE_M, "src = GET_A;"},
- {"stp", SPECIAL_CASE, "abort();"},
- {"stx", STORE_X, "src = GET_X;"},
- {"sty", STORE_X, "src = GET_Y;"},
- {"stz", STORE_M, "src = 0;"},
-{"tax", SPECIAL_CASE, "SET_X(GET_A); SET_NBIT_X(GET_A);SET_ZBIT_X(GET_A);"},
-{"tay", SPECIAL_CASE, "SET_Y(GET_A); SET_NBIT_X(GET_A);SET_ZBIT_X(GET_A);"},
- {"tcd", SPECIAL_CASE, "SET_DPR(GET_A); SET_NBIT_X(GET_A); SET_ZBIT_X(GET_A);"},
- {"tcs", SPECIAL_CASE, "SET_S(GET_A);"},
- {"tdc", SPECIAL_CASE, "SET_A(GET_DPR); SET_NBIT_M(GET_A); SET_ZBIT_M(GET_A);"},
- {"trb", G2_GET, "SET_ZBIT_M(src & GET_A); src = src & ~GET_A; "},
- {"tsb", G2_GET, "SET_ZBIT_M(src & GET_A); src = src | GET_A;"},
-{"tsc", SPECIAL_CASE, "SET_A(GET_S); SET_NBIT_16(GET_A); SET_ZBIT_16(GET_A);"},
-{"tsx", SPECIAL_CASE, "SET_X(GET_S); SET_NBIT_X(GET_X); SET_ZBIT_X(GET_X);"},
-{"txa", SPECIAL_CASE, "SET_A(GET_X); SET_NBIT_M(GET_A); SET_ZBIT_M(GET_A);"},
- {"txs", SPECIAL_CASE, "SET_S(GET_X);"},
-{"txy", SPECIAL_CASE, "SET_Y(GET_X); SET_NBIT_X(GET_Y); SET_ZBIT_X(GET_Y);"},
-{"tya", SPECIAL_CASE, "SET_A(GET_Y); SET_NBIT_M(GET_A); SET_ZBIT_M(GET_A);"},
-{"tyx", SPECIAL_CASE, "SET_X(GET_Y); SET_NBIT_X(GET_X); SET_ZBIT_X(GET_X);"},
- {"wai", SPECIAL_CASE, "wai();INC_PC(-1);"},
- {"wdm", SPECIAL_CASE, "SET_A(wdm(GET_A, GET_X));"},
- {"xba", SPECIAL_CASE,
- "if (GET_XBIT==0) { SET_A(((GET_A >> 8) & 0xff) | ((GET_A & 0xff)<<8));} else { int t = GET_A; SET_A(GET_B); SET_B(t);}; SET_NBIT_8(GET_A); SET_ZBIT_8(GET_A);"},
- {"xce", SPECIAL_CASE, "{ int t = GET_E; SET_E(GET_CBIT); SET_CBIT(GET_E);if (GET_E) { SET_MBIT(1); SET_XBIT(1);}}; goto top;"},
- 0};
-
-struct ainfo alist[] =
-{
- {"#a", "IMMTOA", "#$0", "M==0 ? 2:1", "M==0 ? %sR_W65_ABS16 : %sR_W65_ABS8", "lval = GET_PBRPC; INC_PC(GET_MBIT ? 1:2); ", 0},
- {"#c", "IMMCOP", "#$0", "1", "%sR_W65_ABS8", "lval = GET_PBRPC; INC_PC(1); ", 0},
- {"#i", "IMMTOI", "#$0", "X==0 ? 2:1", "X==0 ? %sR_W65_ABS16 : %sR_W65_ABS8", "lval = GET_PBRPC; INC_PC(GET_XBIT ? 1:2);", 0},
- {"A", "ACC", "a", "0", 0, "*FAIL**", 0},
- {"r", "PC_REL", "$0", "1", "%sR_W65_PCR8", "lval = GET_PBR_HIGH + (0xffff &(fetch8sext(GET_PBRPC) + GET_PC + 1)); INC_PC(1);", 0},
- {"rl", "PC_REL_LONG", "$0", "2", "%sR_W65_PCR16", "lval = GET_PBR_HIGH + (0xffff & (fetch16 (GET_PBRPC) + GET_PC + 2)); INC_PC(2);", 0},
- {"i", "IMPLIED", "", "0", "", 0},
- {"s", "STACK", "", "0", "", 0},
- {"d", "DIR", "<$0", "1", "%sR_W65_ABS8", "lval = fetch8(GET_PBRPC) + GET_D; INC_PC(1);", 1},
- {"d,x", "DIR_IDX_X", "<$0,x", "1", "%sR_W65_ABS8", "lval = fetch8(GET_PBRPC) + GET_X+ GET_D; INC_PC(1);", 1},
- {"d,y", "DIR_IDX_Y", "<$0,y", "1", "%sR_W65_ABS8", "lval = fetch8(GET_PBRPC) + GET_Y + GET_D; INC_PC(1);", 1},
- {"(d)", "DIR_IND", "(<$0)", "1", "%sR_W65_ABS8", "lval = GET_DBR_HIGH + (0xffff & fetch16(fetch8(GET_PBRPC) + GET_D));INC_PC(1);",1},
- {"(d,x)", "DIR_IDX_IND_X", "(<$0,x)", "1", "%sR_W65_ABS8", "lval = GET_DBR_HIGH + (0xffff & (fetch8 (GET_PBRPC) + GET_D + GET_X)) ; INC_PC(1);",1},
- {"(d),y", "DIR_IND_IDX_Y", "(<$0),y", "1", "%sR_W65_ABS8", "lval = fetch16(fetch8(GET_PBRPC) + GET_D) + GET_Y + GET_DBR_HIGH;INC_PC(1);",1},
- {"[d]", "DIR_IND_LONG", "[$0]", "1", "%sR_W65_ABS8", "lval = fetch24(GET_D + fetch8(GET_PBRPC));INC_PC(1);",1},
-
- {"[d],y", "DIR_IND_IDX_Y_LONG", "[$0],y", "1", "%sR_W65_ABS8", "lval = fetch24(fetch8(GET_PBRPC) + GET_D) + GET_Y;INC_PC(1);",1},
-
- {"a", "ABS", "!$0", "2", "%sR_W65_ABS16", "lval = fetch16(GET_PBRPC) + GET_DBR_HIGH; INC_PC(2) ; ",1},
- {"a,x", "ABS_IDX_X", "!$0,x", "2", "%sR_W65_ABS16", "lval = fetch16(GET_PBRPC) + GET_DBR_HIGH + GET_X; INC_PC(2); ",1},
- {"a,y", "ABS_IDX_Y", "!$0,y", "2", "%sR_W65_ABS16", "lval = fetch16(GET_PBRPC) + GET_DBR_HIGH + GET_Y; INC_PC(2); ", 1},
- {"al", "ABS_LONG", ">$0", "3", "%sR_W65_ABS24", "lval = fetch24(GET_PBRPC); INC_PC(3);\nl=1;\n", 1},
- {"[a]", "ABS_IND_LONG", "[>$0]", "2", "%sR_W65_ABS16", "lval = fetch24(fetch16(GET_PBRPC)); INC_PC(2);", 1},
- {"al,x", "ABS_LONG_IDX_X", ">$0,x", "3", "%sR_W65_ABS24", "lval = fetch24(GET_PBRPC) + GET_X; INC_PC(3);", 1},
- {"d,s", "STACK_REL", "$0,s", "1", "%sR_W65_ABS8", "lval = fetch8(GET_PBRPC) + GET_S; INC_PC(1);", 0},
- {"(d,s),y", "STACK_REL_INDX_IDX", "($0,s),y", "1", "%sR_W65_ABS8", "lval = fetch16(fetch8(GET_PBRPC) + GET_S) + GET_DBR_HIGH + GET_Y;INC_PC(1);",0},
- {"(a)", "ABS_IND", "($0)", "2", "%sR_W65_ABS16", "lval = fetch16(GET_PBRPC) + GET_DBR_HIGH; INC_PC(2);", 1},
- {"(a,x)", "ABS_IND_IDX", "($0,x)", "2", "%sR_W65_ABS16",
- "lval = fetch16((0xffff & (fetch16(GET_PBRPC) + GET_X )) + GET_PBR_HIGH) + GET_PBR_HIGH;INC_PC(2);",1},
- {"xyz", "BLOCK_MOVE", "", "2", "", 0},
- 0};
-
-
-struct opinfo optable[257] =
-{
- {0x00, "brk", "s"},
- {0x01, "ora", "(d,x)"},
- {0x02, "cop", "#c"},
- {0x03, "ora", "d,s"},
- {0x04, "tsb", "d"},
- {0x05, "ora", "d"},
- {0x06, "asl", "d"},
- {0x07, "ora", "[d]"},
- {0x08, "php", "s"},
- {0x09, "ora", "#a"},
- {0x0a, "asl", "A"},
- {0x0b, "phd", "s"},
- {0x0c, "tsb", "a"},
- {0x0d, "ora", "a"},
- {0x0e, "asl", "a"},
- {0x0f, "ora", "al"},
- {0x10, "bpl", "r"},
- {0x11, "ora", "(d),y"},
- {0x12, "ora", "(d)"},
- {0x13, "ora", "(d,s),y"},
- {0x14, "trb", "d"},
- {0x15, "ora", "d,x"},
- {0x16, "asl", "d,x"},
- {0x17, "ora", "[d],y"},
- {0x18, "clc", "i"},
- {0x19, "ora", "a,y"},
- {0x1a, "inc", "A"},
- {0x1b, "tcs", "i"},
- {0x1c, "trb", "a"},
- {0x1d, "ora", "a,x"},
- {0x1e, "asl", "a,x"},
- {0x1f, "ora", "al,x"},
- {0x20, "jsr", "a"},
- {0x21, "and", "(d,x)"},
- {0x22, "jsr", "al"},
- {0x23, "and", "d,s"},
- {0x24, "bit", "(d)"},
- {0x25, "and", "d"},
- {0x26, "rol", "d"},
- {0x27, "and", "[d]"},
- {0x28, "plp", "s"},
- {0x29, "and", "#a"},
- {0x2a, "rol", "A"},
- {0x2b, "pld", "s"},
- {0x2c, "bit", "a"},
- {0x2d, "and", "a"},
- {0x2e, "rol", "a"},
- {0x2f, "and", "al"},
- {0x30, "bmi", "r"},
- {0x31, "and", "(d),y"},
- {0x32, "and", "(d)"},
- {0x33, "and", "(d,s),y"},
- {0x34, "bit", "(d,x)"},
- {0x35, "and", "d,x"},
- {0x36, "rol", "d,x"},
- {0x37, "and", "[d],y"},
- {0x38, "sec", "i"},
- {0x39, "and", "a,y"},
- {0x3a, "dec", "A"},
- {0x3b, "tsc", "i"},
- {0x3c, "bit", "a,x"},
- {0x3d, "and", "a,x"},
- {0x3e, "rol", "a,x"},
- {0x3f, "and", "al,x"},
- {0x40, "rti", "s"},
- {0x41, "eor", "(d,x)"},
- {0x42, "wdm", "i"},
- {0x43, "eor", "d,s"},
- {0x44, "mvp", "xyz"},
- {0x45, "eor", "d"},
- {0x46, "lsr", "d"},
- {0x47, "eor", "[d]"},
- {0x48, "pha", "s"},
- {0x49, "eor", "#a"},
- {0x4a, "lsr", "A"},
- {0x4b, "phk", "s"},
- {0x4c, "jmp", "a"},
- {0x4d, "eor", "a"},
- {0x4e, "lsr", "a"},
- {0x4f, "eor", "al"},
- {0x50, "bvc", "r"},
- {0x51, "eor", "(d),y"},
- {0x52, "eor", "(d)"},
- {0x53, "eor", "(d,s),y"},
- {0x54, "mvn", "xyz"},
- {0x55, "eor", "d,x"},
- {0x56, "lsr", "d,x"},
- {0x57, "eor", "[d],y"},
- {0x58, "cli", "i"},
- {0x59, "eor", "a,y"},
- {0x5a, "phy", "s"},
- {0x5b, "tcd", "i"},
- {0x5c, "jmp", "al"},
- {0x5d, "eor", "a,x"},
- {0x5e, "lsr", "a,x"},
- {0x5f, "eor", "al,x"},
- {0x60, "rts", "s"},
- {0x61, "adc", "(d,x)"},
- {0x62, "per", "rl"},
- {0x63, "adc", "d,s"},
- {0x64, "stz", "d"},
- {0x65, "adc", "d"},
- {0x66, "ror", "d"},
- {0x67, "adc", "[d]"},
- {0x68, "pla", "s"},
- {0x69, "adc", "#a"},
- {0x6a, "ror", "A"},
- {0x6b, "rtl", "s"},
- {0x6c, "jmp", "(a)"},
- {0x6d, "adc", "a"},
- {0x6e, "ror", "a"},
- {0x6f, "adc", "al"},
- {0x70, "bvs", "r"},
- {0x71, "adc", "(d),y"},
- {0x72, "adc", "(d)"},
- {0x73, "adc", "(d,s),y"},
- {0x74, "stz", "d,x"},
- {0x75, "adc", "d,x"},
- {0x76, "ror", "d,x"},
- {0x77, "adc", "[d],y"},
- {0x78, "sei", "i"},
- {0x79, "adc", "a,y"},
- {0x7a, "ply", "s"},
- {0x7b, "tdc", "i"},
- {0x7c, "jmp", "(a,x)"},
- {0x7d, "adc", "a,x"},
- {0x7e, "ror", "a,x"},
- {0x7f, "adc", "al,x"},
- {0x80, "bra", "r"},
- {0x81, "sta", "(d,x)"},
- {0x82, "brl", "rl"},
- {0x83, "sta", "d,s"},
- {0x84, "sty", "d"},
- {0x85, "sta", "d"},
- {0x86, "stx", "d"},
- {0x87, "sta", "[d]"},
- {0x88, "dey", "i"},
- {0x89, "bit", "#a"},
- {0x8a, "txa", "i"},
- {0x8b, "phb", "s"},
- {0x8c, "sty", "a"},
- {0x8d, "sta", "a"},
- {0x8e, "stx", "a"},
- {0x8f, "sta", "al"},
- {0x90, "bcc", "r"},
- {0x91, "sta", "(d),y"},
- {0x92, "sta", "(d)"},
- {0x93, "sta", "(d,s),y"},
- {0x94, "sty", "d,x"},
- {0x95, "sta", "d,x"},
- {0x96, "stx", "d,x"},
- {0x97, "sta", "[d],y"},
- {0x98, "tya", "i"},
- {0x99, "sta", "a,y"},
- {0x9a, "txs", "i"},
- {0x9b, "txy", "i"},
- {0x9c, "stz", "a"},
- {0x9d, "sta", "a,x"},
- {0x9e, "stz", "a,x"},
- {0x9f, "sta", "al,x"},
- {0xa0, "ldy", "#i"},
- {0xa1, "lda", "(d,x)"},
- {0xa2, "ldx", "#i"},
- {0xa3, "lda", "d,s"},
- {0xa4, "ldy", "d"},
- {0xa5, "lda", "d"},
- {0xa6, "ldx", "d"},
- {0xa7, "lda", "[d]"},
- {0xa8, "tay", "i"},
- {0xa9, "lda", "#a"},
- {0xaa, "tax", "i"},
- {0xab, "plb", "s"},
- {0xac, "ldy", "a"},
- {0xad, "lda", "a"},
- {0xae, "ldx", "a"},
- {0xaf, "lda", "al"},
- {0xb0, "bcs", "r"},
- {0xb1, "lda", "(d),y"},
- {0xb2, "lda", "(d)"},
- {0xb3, "lda", "(d,s),y"},
- {0xb4, "ldy", "d,x"},
- {0xb5, "lda", "d,x"},
- {0xb6, "ldx", "d,y"},
- {0xb7, "lda", "[d],y"},
- {0xb8, "clv", "i"},
- {0xb9, "lda", "a,y"},
- {0xba, "tsx", "i"},
- {0xbb, "tyx", "i"},
- {0xbc, "ldy", "a,x"},
- {0xbd, "lda", "a,x"},
- {0xbe, "ldx", "a,y"},
- {0xbf, "lda", "al,x"},
- {0xc0, "cpy", "#i"},
- {0xc1, "cmp", "(d,x)"},
- {0xc2, "rep", "#c"},
- {0xc3, "cmp", "d,s"},
- {0xc4, "cpy", "d"},
- {0xc5, "cmp", "d"},
- {0xc6, "dec", "d"},
- {0xc7, "cmp", "[d]"},
- {0xc8, "iny", "i"},
- {0xc9, "cmp", "#a"},
- {0xca, "dex", "i"},
- {0xcb, "wai", "i"},
- {0xcc, "cpy", "a"},
- {0xcd, "cmp", "a"},
- {0xce, "dec", "a"},
- {0xcf, "cmp", "al"},
- {0xd0, "bne", "r"},
- {0xd1, "cmp", "(d),y"},
- {0xd2, "cmp", "(d)"},
- {0xd3, "cmp", "(d,s),y"},
- {0xd4, "pei", "d"},
- {0xd5, "cmp", "d,x"},
- {0xd6, "dec", "d,x"},
- {0xd7, "cmp", "[d],y"},
- {0xd8, "cld", "i"},
- {0xd9, "cmp", "a,y"},
- {0xda, "phx", "s"},
- {0xdb, "stp", "i"},
- {0xdc, "jmp", "[a]"},
- {0xdd, "cmp", "a,x"},
- {0xde, "dec", "a,x"},
- {0xdf, "cmp", "al,x"},
- {0xe0, "cpx", "#i"},
- {0xe1, "sbc", "(d,x)"},
- {0xe2, "sep", "#c"},
- {0xe3, "sbc", "d,s"},
- {0xe4, "cpx", "d"},
- {0xe5, "sbc", "d"},
- {0xe6, "inc", "d"},
- {0xe7, "sbc", "[d]"},
- {0xe8, "inx", "i"},
- {0xe9, "sbc", "#a"},
- {0xea, "nop", "i"},
- {0xeb, "xba", "i"},
- {0xec, "cpx", "a"},
- {0xed, "sbc", "a"},
- {0xee, "inc", "a"},
- {0xef, "sbc", "al"},
- {0xf0, "beq", "r"},
- {0xf1, "sbc", "(d),y"},
- {0xf2, "sbc", "(d)"},
- {0xf3, "sbc", "(d,s),y"},
- {0xf4, "pea", "a"},
- {0xf5, "sbc", "d,x"},
- {0xf6, "inc", "d,x"},
- {0xf7, "sbc", "[d],y"},
- {0xf8, "sed", "i"},
- {0xf9, "sbc", "a,y"},
- {0xfa, "plx", "s"},
- {0xfb, "xce", "i"},
- {0xfc, "jsr", "(a,x)"},
- {0xfd, "sbc", "a,x"},
- {0xfe, "inc", "a,x"},
- {0xff, "sbc", "al,x"},
- 0};
-
-
-int pfunc(a,b)
-struct opinfo *a;
-struct opinfo *b;
-{
-return strcmp(a->mode, b->mode);
-
-}
-static void
-dump_table ()
-{
- int x;
- int y;
- printf (" |");
- for (x = 0; x < 16; x++)
- {
- printf (" %x |", x);
- }
- printf ("\n");
- printf (" |");
- for (x = 0; x < 16; x++)
- {
- printf ("-------|");
- }
- printf ("\n");
-
- for (y = 0; y < 16; y++)
- {
- printf ("%x |", y);
- for (x = 0; x < 16; x++)
- {
- struct opinfo *p = &optable[y * 16 + x];
- if (p->opcode)
- {
- printf ("%-7s", p->opcode);
- }
- else
- {
- printf ("*******");
- }
- printf ("|");
- }
- printf ("\n");
- printf (" |");
-
- for (x = 0; x < 16; x++)
- {
- struct opinfo *p = &optable[y * 16 + x];
- if (p->mode)
- {
- printf ("%-7s", p->mode);
- }
- else
- {
- printf ("*******");
- }
- printf ("|");
- }
- printf ("\n");
- printf (" |");
- for (x = 0; x < 16; x++)
- {
- printf ("-------|");
- }
-
-
- printf ("\n");
- }
-}
-
-dt ()
-{
-#if 0
- int i;
- for (i = 0; i < 256; i++)
- {
- struct opinfo *p = &optable[i];
- printf ("/* %02x */ ", i);
- if (p->opcode)
- printf ("{\"%s\",\"%s\",%d,%d},", p->opcode->name, p->addr->name);
-
- printf ("\n");
- }
-#endif
-
-}
-static
-void
-init_table ()
-{
- int i;
- for (i = 0; i < 256; i++)
- {
- struct opinfo *p = optable + i;
- struct ainfo *a;
- struct oinfo *o;
- for (a = alist; a->name; a++)
- {
- if (strcmp (a->name, p->mode) == 0)
- {
- p->ai = a;
- goto done;
- }
- }
- printf ("bad %x\n", i);
- done:;
- for (o = olist; o->name; o++)
- {
- if (strcmp (o->name, p->opcode) == 0)
- {
- p->oi = o;
- goto doneo;
- }
- }
- printf ("bad %x\n", i);
- doneo:;
-
- }
-}
-
-/* Dump the opcodes sorted by name */
-static
-void
-assembler_table (as)
-{
- int i;
- struct oinfo *o;
- struct ainfo *a;
- int n = 0;
- /* Step through the sorted list of opnames */
- printf (" /* WDC 65816 Assembler opcode table */\n");
- printf (" /* (generated by the program sim/w65/gencode -a) */\n");
-
- for (a = alist; a->name; a++)
- {
- printf ("#define ADDR_%-20s%d\t /* %-7s */\n", a->enumname, ++n, a->name);
- }
-
- printf ("struct opinfo {\n\tint val;\n\tint code;\n\tchar *name;\n\tint amode;\n};\n");
-
- printf ("struct opinfo optable[257]={\n");
- if (as)
- {
- i = 1;
- for (o = olist; o->name; o++)
- {
- printf ("#define O_%s %d\n", o->name, i++);
- }
-
- qsort (optable, 256, sizeof (struct opinfo), pfunc);
-
- printf ("#ifdef DEFINE_TABLE\n");
- for (o = olist; o->name; o++)
- {
-
- for (i = 0; i < 256; i++)
- {
- struct opinfo *p = optable + i;
-
- if (p->oi == o)
- {
- /* This opcode is of the right name */
- printf ("\t{0x%02X,\tO_%s,\t\"%s\",\tADDR_%s},\n", p->code, p->oi->name, p->oi->name, p->ai->enumname);
- }
- }
- }
- }
- else
- {
- for (i = 0; i < 256; i++)
- {
- struct opinfo *p = optable + i;
- printf ("\t{0x%02X,\t\"%s\",\tADDR_%s},\n", i, p->oi->name, p->ai->enumname);
- }
- }
-
- printf ("0};\n");
- printf ("#endif\n");
-
-
- /* Generate the operand disassembly case list */
-
- printf ("#define DISASM()\\\n");
- {
- struct ainfo *a;
- for (a = alist; a->name; a++)
- {
- printf (" case ADDR_%s:\\\n\t", a->enumname);
- if (strcmp (a->enumname, "BLOCK_MOVE") == 0)
- {
- printf ("args[0] = (asR_W65_ABS16 >>8) &0xff;\\\n");
- printf ("\targs[1] = ( asR_W65_ABS16 & 0xff);\\\n");
- printf ("\tprint_operand (0,\"\t$0,$1\",args);\\\n");
- }
- else if (a->reloc0 == 0)
- {
- printf ("print_operand (0, \"\t%s\", 0);\\\n", a->disasmstring );
- }
- else if (strlen (a->reloc0))
- {
- printf ("args[0] = ");
- printf (a->reloc0, "as","as");
- printf (";\\\n");
- printf ("\tprint_operand (%d, \"\t%s\", args);\\\n",
- a->regflag,
- a->disasmstring);
- }
-
- printf ("\tsize += %s;\\\n\tbreak;\\\n", a->sizer);
- }
- }
-
- printf ("\n");
-
- /* Generate the operand size and type case list */
-
- printf ("#define GETINFO(size,type,pcrel)\\\n");
- {
- struct ainfo *a;
- for (a = alist; a->name; a++)
- {
- printf ("\tcase ADDR_%s: ", a->enumname);
- printf ("size = %s;type=", a->sizer);
- if (a->reloc0 && strlen (a->reloc0))
- {
- printf (a->reloc0, "", "");
- }
- else
- printf ("-1");
- printf (";pcrel=%d;", a->name[0] == 'P');
- printf ("break;\\\n");
- }
- }
- printf ("\n");
-}
-
-
-/* Write out examples of each opcode */
-static
-void
-test_table ()
-{
- struct opinfo *o;
- for (o = optable; o->opcode; o++)
- {
- printf ("\t%s\t", o->opcode);
- printf (o->ai->disasmstring, 0x6543210, 0x6543210);
- printf ("\n");
- }
-
-}
-
-static void
-op_table ()
-{
- struct opinfo *o;
- int i = 0;
- /* Write four optables, M=0,1 X=0,1 */
-
- for (o = optable; o->opcode; o++)
- {
- printf ("{0x%02x, \"%s\", \"%s\"\t},\n",
- i++,
- o->opcode,
- o->mode);
- }
-}
-
-int worked_out_lval;
-static void
-genfetch (amode, size)
- struct ainfo *amode;
- int size;
-{
- if (amode->howlval)
- {
- if (strcmp (amode->name, "A") == 0)
- {
- /* Can't get the lval for the accumulator */
- printf ("src = GET_A;\n");
- }
- else
- {
- printf ("%s\n", amode->howlval);
-worked_out_lval = 1;
- if (size == 0)
- {
- printf ("src = fetch16 (lval);\n");
- }
- else
- {
- printf ("src = fetch8 (lval);\n");
- }
- }
- }
-
-}
-
-static void
-genstore (amode, size)
- struct ainfo *amode;
- int size;
-{
- if (amode->howlval)
- {
- if (strcmp (amode->name, "A") == 0)
- {
- /* Can't get the lval for the accumulator */
- printf ("SET_A (src);\n");
- }
- else
- {
- if (!worked_out_lval)
- printf ("%s\n", amode->howlval);
- if (size == 0)
- {
- printf ("store16(lval, src);\n");
- }
- else
- {
- printf ("store8(lval, src);\n");
- }
- }
- }
-}
-/* Generate the code to simulate the instructions */
-static void
-code_table ()
-{
- struct opinfo *o;
- int x, m;
- printf("#include \"interp.h\"\n");
-
- for (x = 0; x < 2; x++) {
- for (m = 0; m < 2; m++) {
- printf("ifunc_X%d_M%d() {\n",x,m);
- printf("#undef GET_MBIT\n");
- printf("#undef GET_XBIT\n");
- printf("#define GET_XBIT %d\n", x);
- printf("#define GET_MBIT %d\n", m);
- printf("STARTFUNC();\n");
- printf("do { register opcode = fetch8(GET_PBRPC); insts++; INC_PC(1);\n");
- printf ("switch (opcode) {\n");
- for (o = optable; o->opcode; o++)
- {
- printf (" /* %s %s */\n", o->opcode, o->ai->name);
- printf ("case 0x%02x:\n", o->code);
- printf ("{\n");
- printf ("int l ;\n");
- printf ("register int src;\n");
- printf ("register int lval;\n");
-worked_out_lval = 0;
- switch (o->oi->howsrc)
- {
- case POP_M:
- if (m == 0)
- printf ("POP16 (src);");
- else
- printf ("POP8(src);");
- break;
- case POP_X:
- if (x == 0)
- printf ("POP16 (src);");
- else
- printf ("POP8 (src);");
- break;
- case POP_8:
- printf ("POP8 (src);");
- break;
- case POP_16:
- printf ("POP16 (src);");
- break;
-
- case STANDARD_PC_GET:
- printf ("%s\n", o->ai->howlval);
- break;
-
- case GET_M:
- genfetch (o->ai, m);
- break;
- case G2_GET:
- genfetch (o->ai, m);
- break;
- case GET_X:
- genfetch (o->ai, x);
- break;
- case BRANCH:
- printf ("%s", o->ai->howlval);
- break;
- case COP_GET:
- genfetch(o->ai,1);
- break;
- case STORE_X:
- case STORE_M:
- ;
- }
-
- switch (o->oi->howsrc)
- {
- case BRANCH:
- printf ("if (%s) { SET_ONLY_PC(lval);} ", o->oi->howto);
- break;
- case SPECIAL_CASE:
- case GET_M:
- case GET_X:
- case STORE_X:
- case STANDARD_PC_GET:
- case G2_GET:
- case PUSH_16:
- case PUSH_8:
- case PUSH_M:
- case PUSH_X:
- case POP_16:
- case POP_8:
- case POP_M:
- case POP_X:
- case COP_GET:
- case STORE_M:
- printf ("%s", o->oi->howto);
- break;
- }
-
- switch (o->oi->howsrc)
- {
- case STORE_M:
- genstore (o->ai, m);
- break;
- case STORE_X:
- genstore (o->ai, x);
- break;
- case PUSH_M:
- if (m == 0)
- printf ("PUSH16 (src);");
- else
- printf ("PUSH8(src);");
- break;
- case PUSH_X:
- if (x == 0)
- printf ("PUSH16 (src);");
- else
- printf ("PUSH8 (src);");
- break;
- case PUSH_8:
- printf ("PUSH8 (src);");
- break;
- case PUSH_16:
- printf ("PUSH16 (src);");
- break;
- case G2_GET:
- genstore (o->ai, x, m);
- break;
- }
- printf ("}\n");
-
- printf ("break;\n");
- }
- printf ("}\n}\n");
- printf("while (!saved_state.exception);\n");
- printf("#undef GET_MBIT\n");
- printf("#undef GET_XBIT\n");
- printf("#define GET_MBIT (the_mbit)\n");
- printf("#define GET_XBIT (the_xbit)\n");
-
- printf("ENDFUNC();\n");
- printf("}");
- }
- }
-}
-
-int
-main (ac, av)
- char **av;
-{
- init_table ();
-
- if (ac > 1)
- {
- if (av[1][1] == 'a')
- {
- assembler_table (1);
- }
- if (av[1][1] == 't')
- {
- test_table ();
- }
- if (av[1][1] == 'o')
- {
- op_table ();
- }
- if (av[1][1] == 'c')
- {
- code_table ();
- }
- }
- else
- dump_table ();
-
- dt ();
-
- return 0;
-}
diff --git a/sim/w65/interp.c b/sim/w65/interp.c
deleted file mode 100644
index 36c4e322c9c..00000000000
--- a/sim/w65/interp.c
+++ /dev/null
@@ -1,388 +0,0 @@
-/* Simulator for the WDC 65816 architecture.
-
- Written by Steve Chamberlain of Cygnus Support.
- sac@cygnus.com
-
- This file is part of W65 sim
-
-
- THIS SOFTWARE IS NOT COPYRIGHTED
-
- Cygnus offers the following for use in the public domain. Cygnus
- makes no warranty with regard to the software or it's performance
- and the user accepts the software "AS IS" with all faults.
-
- CYGNUS DISCLAIMS ANY WARRANTIES, EXPRESS OR IMPLIED, WITH REGARD TO
- THIS SOFTWARE INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.
-
-*/
-
-#include "config.h"
-
-#include <stdio.h>
-#include <signal.h>
-#ifdef HAVE_STDLIB_H
-#include <stdlib.h>
-#endif
-#ifdef HAVE_TIME_H
-#include <time.h>
-#endif
-#ifdef HAVE_UNISTD_H
-#include <unistd.h>
-#endif
-#include <sys/param.h>
-#include "bfd.h"
-#include "callback.h"
-#include "remote-sim.h"
-#include "../../newlib/libc/sys/w65/sys/syscall.h"
-
-#include "interp.h"
-
-saved_state_type saved_state;
-
-int
-get_now ()
-{
- return time ((long *) 0);
-}
-void
-control_c (sig, code, scp, addr)
- int sig;
- int code;
- char *scp;
- char *addr;
-{
- saved_state.exception = SIGINT;
-}
-
-wai ()
-{
- saved_state.exception = SIGTRAP;
-}
-
-
-
-wdm (acc, x)
- int acc;
- int x;
-
-{
-int cycles;
- /* The x points to where the registers live, acc has code */
-
-#define R(arg) (x + arg * 2)
-unsigned R0 = R(0);
-unsigned R4 = R(4);
-unsigned R5 = R(5);
-unsigned R6 = R(6);
-unsigned R7 = R(7);
-unsigned R8 = R(8);
-unsigned char *memory = saved_state.memory;
- int a1 = fetch16 (R (4));
- switch (a1)
- {
- case SYS_write:
- {
- int file = fetch16 (R5);
- unsigned char *buf = fetch24 (R6) + memory;
- int len = fetch16 (R8);
- int res = write (file, buf, len);
- store16 (R0, res);
- break;
- }
- case 0:
- printf ("%c", acc);
- fflush (stdout);
- break;
- case 1:
- saved_state.exception = SIGTRAP;
- break;
- default:
- saved_state.exception = SIGILL;
- break;
- }
-}
-
-
-void
-sim_resume (step, insignal)
- int step;
- int insignal;
-{
- void (*prev) ();
- register unsigned char *memory;
- if (step)
- {
- saved_state.exception = SIGTRAP;
- }
- else
- {
- saved_state.exception = 0;
- }
-
-
- prev = signal (SIGINT, control_c);
- do
- {
- int x = (saved_state.p >> 4) & 1;
- int m = (saved_state.p >> 5) & 1;
- if (x == 0 && m == 0)
- {
- ifunc_X0_M0 ();
- }
- else if (x == 0 && m == 1)
- {
- ifunc_X0_M1 ();
- }
- else if (x == 1 && m == 0)
- {
- ifunc_X1_M0 ();
- }
- else if (x == 1 && m == 1)
- {
- ifunc_X1_M1 ();
- }
- }
- while (saved_state.exception == 0);
-
- signal (SIGINT, prev);
-}
-
-
-
-
-init_pointers ()
-{
- if (!saved_state.memory)
- {
- saved_state.memory = calloc (64 * 1024, NUMSEGS);
- }
-}
-
-int
-sim_write (addr, buffer, size)
- SIM_ADDR addr;
- unsigned char *buffer;
- int size;
-{
- int i;
- init_pointers ();
-
- for (i = 0; i < size; i++)
- {
- saved_state.memory[(addr + i) & MMASK] = buffer[i];
- }
- return size;
-}
-
-int
-sim_read (addr, buffer, size)
- SIM_ADDR addr;
- unsigned char *buffer;
- int size;
-{
- int i;
-
- init_pointers ();
-
- for (i = 0; i < size; i++)
- {
- buffer[i] = saved_state.memory[(addr + i) & MMASK];
- }
- return size;
-}
-
-
-
-struct
-{
- unsigned int *ptr;
- int size;
-}
-rinfo[] =
-
-{
- &saved_state.r[0], 2,
- &saved_state.r[1], 2,
- &saved_state.r[2], 2,
- &saved_state.r[3], 2,
- &saved_state.r[4], 2,
- &saved_state.r[5], 2,
- &saved_state.r[6], 2,
- &saved_state.r[7], 2,
- &saved_state.r[8], 2,
- &saved_state.r[9], 2,
- &saved_state.r[10], 2,
- &saved_state.r[11], 2,
- &saved_state.r[12], 2,
- &saved_state.r[13], 2,
- &saved_state.r[14], 2,
- &saved_state.r[15], 4,
- &saved_state.pc, 4,
- &saved_state.a, 4,
- &saved_state.x, 4,
- &saved_state.y, 4,
- &saved_state.dbr, 4,
- &saved_state.d, 4,
- &saved_state.s, 4,
- &saved_state.p, 4,
- &saved_state.ticks, 4,
- &saved_state.cycles, 4,
- &saved_state.insts, 4,
- 0
-};
-
-int
-sim_store_register (rn, value, length)
- int rn;
- unsigned char *value;
- int length;
-{
- unsigned int val;
- int i;
- val = 0;
- for (i = 0; i < rinfo[rn].size; i++)
- {
- val |= (*value++) << (i * 8);
- }
-
- *(rinfo[rn].ptr) = val;
- return -1;
-}
-
-int
-sim_fetch_register (rn, buf, length)
- int rn;
- unsigned char *buf;
- int length;
-{
- unsigned int val = *(rinfo[rn].ptr);
- int i;
-
- for (i = 0; i < rinfo[rn].size; i++)
- {
- *buf++ = val;
- val = val >> 8;
- }
- return -1;
-}
-
-
-sim_reg_size (n)
-{
- return rinfo[n].size;
-}
-int
-sim_trace ()
-{
- return 0;
-}
-
-void
-sim_stop_reason (reason, sigrc)
- enum sim_stop *reason;
- int *sigrc;
-{
- *reason = sim_stopped;
- *sigrc = saved_state.exception;
-}
-
-int
-sim_set_pc (x)
- SIM_ADDR x;
-{
- saved_state.pc = x;
- return 0;
-}
-
-
-void
-sim_info (verbose)
- int verbose;
-{
- double timetaken = (double) saved_state.ticks;
- double virttime = saved_state.cycles / 2.0e6;
-
- printf ("\n\n# instructions executed %10d\n", saved_state.insts);
- printf ("# cycles %10d\n", saved_state.cycles);
- printf ("# real time taken %10.4f\n", timetaken);
- printf ("# virtual time taken %10.4f\n", virttime);
-
- if (timetaken != 0)
- {
- printf ("# cycles/second %10d\n", (int) (saved_state.cycles / timetaken));
- printf ("# simulation ratio %10.4f\n", virttime / timetaken);
- }
-
-}
-
-
-
-void
-sim_open (kind, cb, abfd, argv)
- SIM_OPEN_KIND kind;
- host_callback *cb;
- struct _bfd *abfd;
- char **argv;
-{
-}
-
-
-
-#undef fetch8
-fetch8func (x)
-{
- if (x & ~MMASK)
- {
- saved_state.exception = SIGBUS;
- return 0;
- }
- return saved_state.memory[x];
-}
-
-fetch8 (x)
-{
-return fetch8func(x);
-}
-
-void
-sim_close (quitting)
- int quitting;
-{
- /* nothing to do */
-}
-
-int
-sim_load (prog, from_tty)
- char *prog;
- int from_tty;
-{
- /* Return nonzero so gdb will handle it. */
- return 1;
-}
-
-
-void
-sim_create_inferior (abfd, argv, env)
- struct _bfd *abfd;
- char **argv;
- char **env;
-{
- SIM_ADDR start_address;
- int pc;
- if (abfd != NULL)
- start_address = bfd_get_start_address (abfd);
- else
- start_address = 0; /*??*/
- /* ??? We assume this is a 4 byte quantity. */
- pc = start_address;
- sim_store_register (16, (unsigned char *) &pc);
-}
-
-void
-sim_set_callbacks (ptr)
-struct host_callback_struct *ptr;
-{
-
-}
diff --git a/sim/w65/interp.h b/sim/w65/interp.h
deleted file mode 100644
index 2fd5d228b7b..00000000000
--- a/sim/w65/interp.h
+++ /dev/null
@@ -1,194 +0,0 @@
-#define fetch8(x) fetch8func((cycles++,(x)))
-#define NFAKES 16
-typedef struct
- {
- unsigned a;
- unsigned x;
- unsigned y;
- unsigned pc; /* Keep pbr in there too */
- unsigned dbr;
- unsigned d;
- unsigned s;
- unsigned p;
- unsigned e;
- unsigned char *memory;
- unsigned int exception;
- unsigned int ticks;
- unsigned int cycles;
- unsigned int insts;
- unsigned int r[NFAKES];
- }
-saved_state_type;
-
-
-
-#define GET_P \
- ((GET_NBIT << 7) \
- | (GET_VBIT << 6) \
- | (GET_MBIT << 5) \
- | (GET_XBIT << 4) \
- | (GET_DBIT << 3) \
- | (GET_IBIT << 2) \
- | (GET_ZBIT << 1) \
- | (GET_CBIT << 0))
-
-#define SET_P(_bits) \
-{ int bits = _bits; \
-SET_NBIT((bits>>7)&1); \
-SET_VBIT((bits>>6)&1); \
-SET_MBIT((bits>>5)&1); \
-SET_XBIT((bits>>4)&1); \
-SET_DBIT((bits>>3)&1); \
-SET_IBIT((bits>>2)&1); \
-SET_ZBIT((bits>>1)&1); \
-SET_CBIT((bits>>0)&1); }
-
-#define BFLAG (1<<4)
-#define DFLAG (1<<3)
-
-#define GET_A (the_a)
-#define GET_E (the_e)
-#define GET_B (the_b)
-#define GET_CBIT (the_cbit)
-#define GET_D (the_d)
-#define GET_DBIT (the_dbit)
-#define GET_DBR_HIGH (the_dbr)
-#define GET_DBR_LOW (the_dbr >> 16)
-#define GET_DPR (the_dpr)
-#define GET_IBIT (the_ibit)
-#define GET_MBIT (the_mbit)
-#define SET_XBIT(x) { the_xbit = x; }
-#define GET_NBIT (the_nbit)
-#define GET_PBRPC (the_pc)
-#define GET_PBR_HIGH (the_pc & 0xff0000)
-#define GET_PBR_LOW (the_pc >> 16)
-#define GET_PC (the_pc & 0xffff)
-#define GET_S (the_s)
-#define GET_VBIT (the_vbit)
-#define GET_X (the_x)
-#define GET_XBIT (the_xbit)
-#define GET_Y (the_y)
-#define GET_ZBIT (the_zbit)
-#define IFLAG (1<<2)
-#define INC_PC(x) {the_pc += x;}
-#define POP16(x) { int _xx; POP8(x); POP8(_xx); x+= _xx<<8;}
-#define POP24(x) { int _xx; POP8(x); POP8(_xx); x += _xx << 8; POP8(_xx); x += _xx << 16; }
-#define POP8(x) { SET_S(GET_S +1); x = fetch8(GET_S);}
-#define PUSH16(x) { int _xx = x;PUSH8(_xx >> 8); PUSH8(_xx);}
-#define PUSH8(x) { store8(GET_S, x); SET_S(GET_S-1);}
-#define SET_A(x) { the_a = x & AMASK; }
-#define SET_B(x) { the_b = x;}
-#define SET_CBIT(x) { the_cbit = x;}
-#define SET_CBIT_M(x) { the_cbit = (x & (GET_MBIT ? 0x100: 0x10000)) != 0;}
-#define SET_CBIT_X(x) { the_cbit = (x & (GET_XBIT ? 0x100: 0x10000)) != 0;}
-#define SET_D(x) {the_d = x;}
-#define SET_DBIT(x) { the_dbit= x;}
-#define SET_DBR_LOW(x) {the_dbr = (x<<16);}
-#define SET_DPR(x) { the_dpr = x;}
-#define SET_E(x) { the_e = x;}
-#define SET_IBIT(x) { the_ibit = x;}
-#define SET_MBIT(x) { the_mbit = x; }
-#define SET_NBIT(x) { the_nbit = x;}
-#define SET_NBIT_16(x) { the_nbit= ( ((x) & (0x8000)) != 0);}
-#define SET_NBIT_8(x) { the_nbit= ( ((x) & (0x80)) != 0);}
-#define SET_NBIT_M(x) { if (GET_MBIT) { SET_NBIT_8(x); } else { SET_NBIT_16(x);}}
-#define SET_NBIT_X(x) { if (GET_XBIT) { SET_NBIT_8(x); } else { SET_NBIT_16(x);}}
-#define SET_PBR(x) { the_pc = (the_pc & 0xffff) + ((x)<<16);}
-#define SET_PBRPC(x) { the_pc = x;}
-#define SET_ONLY_PC(x) { the_pc = (the_pc & 0xff0000) + ((x ) & 0xffff);}
-#define SET_S(x) {the_s = x; }
-#define SET_VBIT_16(x) {the_vbit = ((((int)x) < -0x8000) || (((int)x) > 0x7fff));}
-#define SET_VBIT_8(x) {the_vbit = ((((int)x) < -0x80) || (((int)x) > 0x7f));}
-/*#define SET_VBIT_M(x) { if(GET_MBIT) {SET_VBIT_8(x);}else {SET_VBIT_16(x);}}*/
-#define SET_ZBIT_16(x) { the_zbit = ((x & 0xffff) == 0);}
-#define SET_ZBIT_8(x) { the_zbit = ((x & 0xff) == 0);}
-#define SET_ZBIT_M(x) { if(GET_MBIT) {SET_ZBIT_8(x);}else {SET_ZBIT_16(x);}}
-#define SET_ZBIT_X(x) { if(GET_XBIT) {SET_ZBIT_8(x);}else {SET_ZBIT_16(x);}}
-#define SET_VBIT(x) { the_vbit = x; }
-#define SET_ZBIT(x) { the_zbit = x; }
-#define SET_X(x) { the_x = (x) & (GET_XBIT ? 0xff : 0xffff);}
-#define SET_Y(x) { the_y = (x) & (GET_XBIT ? 0xff : 0xffff);}
-
-#define AMASK ( GET_MBIT ? 0xff : 0xffff)
-#define SMASK ( GET_MBIT ? 0x80 : 0x8000)
-#define SET_VBIT_M(s1,acc,d) ( the_vbit = ((s1 ^ acc) & (acc ^ d) & SMASK )!=0)
-
-/*#define fetch8(x) (memory[x&MMASK])*/
-#define fetch16(x) (fetch8(x) + (fetch8((x)+1)<<8))
-#define fetch24(x) (fetch8(x) + (fetch8((x)+1)<<8) + (fetch8((x)+2)<<16))
-#define fetch8sext(x) ((char)fetch8(x))
-#define fetch16sext(x) ((short)fetch16(x))
-#define store8(x,y) {memory[x&MMASK]=y;}
-#define store16(x,y) { store8(x,y); store8(x+1,y>>8);}
-#define SEXTM(x) (GET_MBIT ? ((char)x): ((short)x))
-
-
-#define STARTFUNC() \
- register unsigned char *memory;\
- int the_s; \
- int the_b; \
- int the_x; \
- int the_d; \
- int the_y; \
- int the_dbr; \
- int the_pc; \
- int the_nbit; \
- int the_vbit; \
- int the_z; \
- int the_mbit; \
- int the_ibit; \
- int the_xbit; \
- int the_zbit; \
- int the_cbit; \
- int the_dbit; \
- int the_dpr; \
- int the_e; \
- int the_a; \
- int tick_start = get_now ();\
- int cycles = 0; \
- int insts = 0; \
- \
- SET_E (saved_state.e); \
- SET_P (saved_state.p); \
- SET_A (saved_state.a); \
- SET_X (saved_state.x); \
- SET_Y (saved_state.y); \
- SET_ONLY_PC (saved_state.pc); \
- SET_PBR (saved_state.pc >> 16); \
- SET_DBR_LOW (saved_state.dbr); \
- SET_D (saved_state.d); \
- SET_S (saved_state.s); \
- memory = saved_state.memory ; \
-{ int k; for (k = 0; k < NFAKES; k++) \
- store16(0x10 + k * 2, saved_state.r[k]); }\
- \
- top: \
-
-
-
-#define ENDFUNC() \
- rethink: \
- saved_state.ticks += get_now () - tick_start;\
- saved_state.cycles += cycles; \
- saved_state.insts += insts; \
-{ int k; for (k = 0; k < NFAKES; k++) \
-saved_state.r[k] = fetch16(0x10 + k * 2); }\
- \
- saved_state.e = GET_E; \
- saved_state.p = GET_P; \
- saved_state.a = GET_A; \
- saved_state.x = GET_X; \
- saved_state.y = GET_Y; \
- saved_state.pc = GET_PBRPC; \
- saved_state.dbr = GET_DBR_LOW; \
- saved_state.d = GET_D; \
- saved_state.s = GET_S; \
- \
- return 0; \
-
-
-extern saved_state_type saved_state;
-
-#define MMASK 0xfffff
-#define NUMSEGS 16
-#define RETHINK goto rethink;
diff --git a/sim/w65/run.c b/sim/w65/run.c
deleted file mode 100644
index 2d966eeddae..00000000000
--- a/sim/w65/run.c
+++ /dev/null
@@ -1,131 +0,0 @@
-/* run front end support for W65
- Copyright (C) 1995 Free Software Foundation, Inc.
-
-This file is part of W65 SIM
-
-GNU CC is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-GNU CC is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License
-along with this program; if not, write to the Free Software
-Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
-
-
-/* Steve Chamberlain
- sac@cygnus.com */
-
-#include "config.h"
-
-#include <stdio.h>
-#ifdef HAVE_STDLIB_H
-#include <stdlib.h>
-#endif
-#include "getopt.h"
-#include "bfd.h"
-
-#ifdef NEED_DECLARATION_PRINTF
-extern int printf ();
-#endif
-
-void usage();
-extern int optind;
-
-int
-main (ac, av)
- int ac;
- char **av;
-{
- bfd *abfd;
- bfd_vma start_address;
- asection *s;
- int i;
- int verbose = 0;
- int trace = 0;
- char *name = "";
-
- while ((i = getopt (ac, av, "tv")) != EOF)
- switch (i)
- {
- case 't':
- trace = 1;
- break;
- case 'v':
- verbose = 1;
- break;
- default:
- usage();
- }
- ac -= optind;
- av += optind;
-
- if (ac != 1)
- usage();
-
- name = *av;
-
- if (verbose)
- {
- printf ("run %s\n", name);
- }
- abfd = bfd_openr (name, "coff-w65");
- if (abfd)
- {
-
- if (bfd_check_format (abfd, bfd_object))
- {
-
- for (s = abfd->sections; s; s = s->next)
- {
- unsigned char *buffer = malloc (bfd_section_size (abfd, s));
- bfd_get_section_contents (abfd,
- s,
- buffer,
- 0,
- bfd_section_size (abfd, s));
- sim_write (s->vma, buffer, bfd_section_size (abfd, s));
- free (buffer);
- }
-
- start_address = bfd_get_start_address (abfd);
- sim_set_pc (start_address);
- if (trace)
- {
- int done = 0;
- while (!done)
- {
- done = sim_trace ();
- }
- }
- else
- {
- sim_resume (0, 0);
- }
- if (verbose)
- sim_info (printf, 0);
-
- /* Find out what was in r0 and return that */
- {
- unsigned char b[4];
- sim_fetch_register(0, b, 4);
- return b[3];
- }
-
- }
- }
-
- return 1;
-}
-
-void
-usage()
-{
- fprintf (stderr, "usage: run [-tv] program\n");
- exit (1);
-}
diff --git a/sim/z8k/ChangeLog b/sim/z8k/ChangeLog
deleted file mode 100644
index 64468a129be..00000000000
--- a/sim/z8k/ChangeLog
+++ /dev/null
@@ -1,482 +0,0 @@
-Tue May 23 21:39:23 2000 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Thu Sep 2 18:15:53 1999 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-1999-05-08 Felix Lee <flee@cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Wed Nov 25 18:22:10 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * support.c: Include <errno.h>
-
-Tue Apr 28 18:33:31 1998 Geoffrey Noer <noer@cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Sun Apr 26 15:31:55 1998 Tom Tromey <tromey@creche>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
- * config.in: Ditto.
-
-Sun Apr 26 15:18:45 1998 Tom Tromey <tromey@cygnus.com>
-
- * acconfig.h: New file.
- * configure.in: Reverted change of Apr 24; use sinclude again.
-
-Fri Apr 24 14:16:40 1998 Tom Tromey <tromey@creche>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
- * config.in: Ditto.
-
-Fri Apr 24 11:17:28 1998 Tom Tromey <tromey@cygnus.com>
-
- * configure.in: Don't use sinclude.
-
-Sat Apr 4 20:36:25 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Fri Mar 27 16:15:52 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Wed Mar 25 12:35:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Wed Mar 18 12:38:12 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Tue Feb 17 12:54:05 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * iface.c (sim_store_register, sim_fetch_register): Pass in length
- parameter. Return -1.
-
-Sun Feb 1 16:47:51 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Sat Jan 31 18:15:41 1998 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Mon Jan 19 22:26:29 1998 Doug Evans <devans@seba>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Mon Dec 15 23:17:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
- * config.in: Ditto.
-
-Thu Dec 4 09:21:05 1997 Doug Evans <devans@canuck.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Wed Oct 22 14:43:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * iface.c (sim_load): Pass lma_p and sim_write args to
- sim_load_file.
-
-Fri Oct 3 09:28:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Wed Sep 24 17:38:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Tue Sep 23 11:04:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Mon Sep 22 11:46:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Fri Sep 19 17:45:25 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Wed Sep 17 13:23:45 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * Makefile.in (CONFIG_H): Use config.h from local directory.
-
-Mon Sep 15 17:36:15 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Thu Sep 4 17:21:23 1997 Doug Evans <dje@seba>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Wed Aug 27 18:13:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
- * config.in: Ditto.
-
-Tue Aug 26 10:43:33 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * iface.c (sim_kill): Delete.
- (sim_create_inferior): Add ABFD argument.
- (sim_load): Move setting of PC from here.
- (sim_create_inferior): To here.
- (sim_open, sim_load): Add FIXME about need to move arch test to
- sim_open.
-
-Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
- * config.in: Ditto.
-
-Mon Aug 25 16:36:10 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * iface.c (sim_open): Add ABFD argument. Change ARGV to PARGV.
-
-Tue May 20 10:28:07 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * iface.c (sim_set_callbacs): Delete SIM_DESC argument.
- (sim_open): Add callback argument.
-
-Wed Apr 30 10:28:34 1997 Doug Evans <dje@canuck.cygnus.com>
-
- * iface.c (sim_load): Set sim_z8001_mode if bfd_mach_z8001.
- * tconfig.in (SIM_PRE_LOAD): Delete, no longer used.
-
-Thu Apr 24 00:39:51 1997 Doug Evans <dje@canuck.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Fri Apr 18 14:18:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * mem.h (Z8k_PAGE_SIZE): Rename from PAGE_SIZE. Is it used?
-
- * iface.c (sim_stop): New function.
- (NULL): Define if not already.
-
-Thu Apr 17 03:54:23 1997 Doug Evans <dje@canuck.cygnus.com>
-
- * Makefile.in (SIM_OBJS): Add sim-load.o.
- * iface.c: #include bfd.h.
- (z8k_callback): New global.
- (sim_kind, myname): New static locals.
- (sim_open): Set sim_kind, myname.
- (sim_load): Return SIM_RC. New arg abfd. Call sim_load_file to
- load file into simulator. Set start address from bfd.
- (sim_create_inferior): Return SIM_RC. Delete arg start_address.
- (sim_set_callbacks): Set z8k_callback.
-
-Thu Apr 17 11:36:04 1997 Andrew Cagney <cagney@b1.cygnus.com>
-
- * tm.h (sim_trace) : Remove prototype - now in remote-sim.h
- * support.c (sim_trace): Update.
-
-Mon Apr 7 15:45:02 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
- * config.in: Ditto.
-
-Wed Apr 2 15:06:28 1997 Doug Evans <dje@canuck.cygnus.com>
-
- * iface.c (sim_open): New arg `kind'.
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Wed Apr 2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Wed Mar 19 01:14:00 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
-
- * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Mon Mar 17 15:10:07 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
-
- * configure: Re-generate.
-
-Fri Mar 14 10:34:11 1997 Michael Meissner <meissner@cygnus.com>
-
- * configure: Regenerate to track ../common/aclocal.m4 changes.
-
-Thu Mar 13 13:02:08 1997 Doug Evans <dje@canuck.cygnus.com>
-
- * iface.c (sim_open): New SIM_DESC result. Argument is now
- in argv form.
- (other sim_*): New SIM_DESC argument.
-
-Tue Feb 4 13:33:30 1997 Doug Evans <dje@canuck.cygnus.com>
-
- * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
- COMMON_{PRE,POST}_CONFIG_FRAG instead.
- * configure.in: sinclude ../common/aclocal.m4.
- * configure: Regenerated.
-
-Thu Jan 23 11:46:23 1997 Stu Grossman (grossman@critters.cygnus.com)
-
- * configure configure.in Makefile.in: Update to new configure
- scheme which is more compatible with WinGDB builds.
- * configure.in: Improve comment on how to run autoconf.
- * configure: Re-run autoconf to get new ../common/aclocal.m4.
- * Makefile.in: Use autoconf substitution to install common
- makefile fragment.
-
-Wed Nov 20 02:28:21 1996 Doug Evans <dje@canuck.cygnus.com>
-
- * Makefile.in: Delete stuff moved to ../common/Make-common.in.
- (SIM_OBJS,SIM_EXTRA_CFLAGS,SIM_EXTRA_CLEAN): Define.
- * configure.in: Simplify using macros in ../common/aclocal.m4.
- * configure: Regenerated.
- * iface.c (sim_size): New function.
- (sim_stop_reason): Properly set sim_exited return code.
- * support.c: #include "callback.h".
- * run.c: Deleted, using one in ../common now.
- * tconfig.in: New file.
-
-Thu Oct 3 16:19:07 1996 Jason Molenda (crash@godzilla.cygnus.co.jp)
-
- * Makefile.in (mostlyclean): Don't remove config.log here.
-
-Wed Jun 26 12:32:29 1996 Jason Molenda (crash@godzilla.cygnus.co.jp)
-
- * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
- INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
- (docdir): Removed.
- * configure.in (AC_PREREQ): autoconf 2.5 or higher.
- (AC_PROG_INSTALL): Added.
- * configure: Rebuilt.
-
-Wed Feb 21 12:17:27 1996 Ian Lance Taylor <ian@cygnus.com>
-
- * configure: Regenerate with autoconf 2.7.
-
-Thu Jan 11 16:59:07 1996 Jim Wilson <wilson@chestnut.cygnus.com>
-
- * writecode.c (info_args, case CLASS_DISP8): Sign extend using
- shifts instead of char cast.
- (shift): Likewise.
-
-Fri Jan 5 15:36:26 1996 Jim Wilson <wilson@chestnut.cygnus.com>
-
- * mem.c (get_page_and_offset): Allocate 16MB not 8MB.
-
-Fri Oct 13 15:02:45 1995 steve chamberlain <sac@slash.cygnus.com>
-
- * iface.c (sim_set_callbacks): New.
-
-Tue Oct 10 11:13:55 1995 Fred Fish <fnf@cygnus.com>
-
- * Makefile.in (BISON): Remove macro.
-
-Wed Sep 20 13:35:35 1995 Ian Lance Taylor <ian@cygnus.com>
-
- * Makefile.in (maintainer-clean): New synonym for realclean.
-
-Fri Sep 8 13:16:10 1995 Ian Lance Taylor <ian@cygnus.com>
-
- * Makefile.in (install): Don't install in $(tooldir).
-
- * configure.in: Call AC_CONFIG_HEADER. Don't try to use
- bfd/hosts/*.h file or bfd/config/*.mh file. Call AC_PROG_CC and
- AC_PROG_RANLIB. Substitute in values for CFLAGS, HDEFINES, AR,
- and CC_FOR_BUILD. Call AC_CHECK_HEADERS for various header files.
- Touch stamp.h if creating config.h.
- * configure: Rebuild.
- * config.in: New file, created by autoheader.
- * Makefile.in (AR): Define as @AR@.
- (CC): New variable, defined as @CC@.
- (CFLAGS): Define as @CFLAGS@.
- (CC_FOR_BUILD): New variable, defined as @CC_FOR_BUILD@.
- (RANLIB): Define as @RANLIB@.
- (HDEFINES, TDEFINES): New variables.
- (@host_makefile_frag@): Remove.
- (support.o, comped1.o, comped3.o): Depend upon config.h.
- (compedb3.o, comped2.o): Likewise.
- (mem.o): New target.
- (tc-gen2.h): Depend upon writecode, not quick.c.
- (writecode): Build using $(CC_FOR_BUILD).
- (writecode.o, list.o, quick.o): New targets.
- (mostlyclean): Make the same as clean, not distclean.
- (clean): Remove config.log.
- (distclean): Remove config.h and stamp-h.
- (Makefile): Don't depend upon @frags@. Just rebuild Makefile when
- invoking config.status.
- (config.h, stamp-h): New targets.
- * comped1.c: Don't include "sysdep.h".
- (INLINE): Define as inline, not static inline.
- * comped3.c, compedb3.c, run.c: Don't include "sysdep.h".
- * mem.c: Include "config.h". Don't include "sysdep.h". Include
- <stdlib.h> if it exists.
- * support.c: Include "config.h". Don't include "sysdep.h".
- Include <stdio.h>. Include <time.h> and <sys/times.h> if they
- exists. Include <sys/types.h> and <sys/stat.h>.
- (get_now): Only use times if <sys/times.h> exists; otherwise use
- time.
- * writecode.c: Include "config.h". Include <stdio.h>. Include
- <stdlib.h> and <string.h> if they exist. Include <strings.h> if
- it exists and <string.h> does not.
-
-Thu Aug 3 10:45:37 1995 Fred Fish <fnf@cygnus.com>
-
- * Update all FSF addresses except those in COPYING* files.
-
-Mon Jul 31 10:18:06 1995 steve chamberlain <sac@slash.cygnus.com>
-
- * support.c (normal_flags_16): Calculate carry correctly.
- (support_call): Return values in std regs too.
-
-Fri Jul 28 12:10:06 1995 steve chamberlain <sac@slash.cygnus.com>
-
- * inlines.h (put_byte_mem_da): Moved.
- * run.c (main): Return program result.
- * support.c (support_call): Return exit argument.
- * writecode.c (rotate): Fix a load of bugs.
- (info_decode): Insert missing break after OPC_rrc.
-
-Wed Jul 5 16:13:43 1995 J.T. Conklin <jtc@rtl.cygnus.com>
-
- * Makefile.in, configure.in: converted to autoconf.
- * configure: New file, generated with autconf 2.4.
-
- * z8k.mt: Removed.
-
-Fri Jun 30 16:53:09 1995 Stan Shebs <shebs@andros.cygnus.com>
-
- * iface.c (sim_do_command): New function.
-
-Wed May 24 16:31:38 1995 Jim Wilson <wilson@chestnut.cygnus.com>
-
- * configure.in: Fix typo in last change.
-
-Mon Mar 27 10:32:34 1995 J.T. Conklin <jtc@rtl.cygnus.com>
-
- * run.c: parse arguments with getopt().
-
-Tue Feb 28 17:31:00 1995 Ian Lance Taylor <ian@cygnus.com>
-
- * configure.in: Use ../../bfd/hosts/std-host.h if specific
- host unavailable.
-
-Sun Feb 12 16:03:29 1995 Steve Chamberlain <sac@splat>
-
- * iface.c (sim_stop_reason): (Make a bad syscall give a SIGILL.
- * writecode.c (adiv): Divides are always signed.
-
-Wed Dec 28 21:30:09 1994 Steve Chamberlain (sac@jonny.cygnus.com)
-
- * inlines.h: Make INLINES static.
- * mem.c (sitoptr): New instance.
- * support.c (normal_flags_[32|16|8]): New functions.
- (optimize_normal_flags): Use new functions.
- * writecode.c (info_special): Handle sbc. (optimize_normal_flags):
- Always recalc flags.
-
-Wed May 18 14:38:49 1994 Doug Evans (dje@canuck.cygnus.com)
-
- * support.c (sim_open): Delete from here.
- (sim_set_args): Delete from here.
- (sim_kill): Delete from here.
- * iface.c (sim_*): Make result void where there isn't one.
- (sim_clear_breakpoints): Delete.
- (sim_set_pc): Delete.
- (sim_info): Delete printf_fn arg, all callers changed.
- (sim_open): Define here.
- (sim_close): New function.
- (sim_load): New function.
- (sim_create_inferior): Renamed from sim_set_args.
- (sim_kill): Define here.
- * run.c (printf): Delete declaration.
- (main): Call sim_create_inferior instead of sim_set_pc.
- * sim.h (sim_clear_breakpoints): Delete.
-
-Wed May 18 13:22:02 1994 Steve Chamberlain (sac@jonny.cygnus.com)
-
- * writecode.c (main): Disable the chopping of large initializers.
- GCC can now cope.
-
-Sat May 7 17:24:46 1994 Steve Chamberlain (sac@cygnus.com)
-
- * writecode.c (info_args): Add resflg and setflg.
- * list.c : Regenerated.
- * Makefile.in: First rule is now called 'all'
-
-Sat Dec 11 16:39:30 1993 Steve Chamberlain (sac@thepub.cygnus.com)
-
- * iface.c (sim_store_register): Get regval the right way up.
- * writecode.c (info_args): Add lda.
-
-Tue Oct 26 13:01:46 1993 Doug Evans (dje@canuck.cygnus.com)
-
- * Makefile.in (INCDIR): Fix definition.
- (CSEARCH): Add -I$(srcdir)/../../gdb
- (comped1.o, comped3.o, compedb3.o, comped2.o): Use CSEARCH, not INCDIR.
- * iface.c: Replace #include "../include/wait.h" with "remote-sim.h".
- (sim_set_pc): int result, use SIM_ADDR for type of arg `addr'.
- (sim_store_register): int result, pass value by reference.
- (sim_fetch_register): Use unsigned char * for arg `buf'.
- (sim_write): int result, use SIM_ADDR for `where' arg,
- use unsigned char * for `what' arg.
- (sim_read): Ditto.
- (sim_resume): int result.
- (sim_stop_reason): Renamed from sim_stop_signal, int result,
- new arg `reason'.
- (sim_info): int result, merge sim_info_print into here.
- (sim_info_print): Deleted.
- * run.c: #include <stdio.h>
- (main): Update call to sim_info.
- * sim.h: Remove various prototypes defined in remote-sim.h.
-
-Sat Oct 23 15:16:45 1993 Doug Evans (dje@canuck.cygnus.com)
-
- * iface.c (sim_stop_signal): Result is now enum sim_stop.
-
-Thu Oct 7 19:01:07 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
-
- * writecode.c (doset, info_docode): Understand set and res insns.
-
-Thu Sep 30 11:30:42 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
-
- * support.c (tm_info_print): If no timetaken, don't divide by zero.
-
-Fri Jul 30 15:51:54 1993 david d `zoo' zuhn (zoo@rtl.cygnus.com)
-
- * writecode.c (div): rename to divide, to resolve conflict with
- ANSI function div from <stdlib.h>
-
-Mon Mar 15 15:48:50 1993 Ian Lance Taylor (ian@cygnus.com)
-
- * z8k.mt (DO_INSTALL): Renamed from INSTALL.
-
-Tue Mar 9 12:32:29 1993 Steve Chamberlain (sac@thepub.cygnus.com)
-
- * writecode.c (main): Make the vector 'big' static, so that it
- will compile on the apollo.
- * support.c: Use the ANSI compilant __inline__.
-
-Fri Mar 5 07:54:18 1993 Steve Chamberlain (sac@thepub.cygnus.com)
-
- * writecode.c (main): When using gcc, split the tables into
- sections so that it will compile.
- * Makefile.in: Get ar args right.
- * tm.h: Fix gcc prototypes.
-
-Wed Mar 3 15:04:48 1993 Steve Chamberlain (sac@poseidon.cygnus.com)
-
- * support.c (fail): Get the argument count right.
- * tm.h: Lint.
- * writecode.c (main): Pass all the arguments emit needs.
-
-Tue Feb 2 07:49:42 1993 Steve Chamberlain (sac@thepub.cygnus.com)
-
- * lint, prototypes
-
-Fri Jan 15 12:43:08 1993 Steve Chamberlain (sac@thepub.cygnus.com)
-
- * New
-
-
diff --git a/sim/z8k/Makefile.in b/sim/z8k/Makefile.in
deleted file mode 100644
index f6432d4157a..00000000000
--- a/sim/z8k/Makefile.in
+++ /dev/null
@@ -1,66 +0,0 @@
-# Makefile template for Configure for the z8k sim library.
-# Copyright (C) 1993, 95, 96, 1997 Free Software Foundation, Inc.
-# Written by Cygnus Support.
-#
-# This program is free software; you can redistribute it and/or modify
-# it under the terms of the GNU General Public License as published by
-# the Free Software Foundation; either version 2 of the License, or
-# (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
-## COMMON_PRE_CONFIG_FRAG
-
-SIM_OBJS = iface.o mem.o support.o quick.o \
- comped1.o comped2.o comped3.o compedb3.o sim-load.o
-# FIXME: hack to find syscall.h. Better support for syscall.h is
-# in progress.
-SIM_EXTRA_CFLAGS = -I$(srcdir)/../../newlib/libc/sys/z8k
-SIM_EXTRA_CLEAN = clean-extra
-
-CONFIG_H = config.h
-
-## COMMON_POST_CONFIG_FRAG
-
-support.o:support.c inlines.h $(CONFIG_H)
-mem.o: mem.c tm.h mem.h sim.h $(CONFIG_H)
-
-comped1.o:comped1.c tc-gen1.h $(CONFIG_H)
-comped3.o:comped3.c tc-gen3.h $(CONFIG_H)
-compedb3.o:compedb3.c tc-genb3.h $(CONFIG_H)
-comped2.o:comped2.c tc-gen2.h $(CONFIG_H)
-
-tc-gen1.h:writecode
- ./writecode -1 >tc-gen1.h
-
-tc-gen2.h:writecode
- ./writecode -2 >tc-gen2.h
-
-tc-gen3.h:writecode
- ./writecode -3 >tc-gen3.h
-
-tc-genb3.h:writecode
- ./writecode -b3 >tc-genb3.h
-
-writecode: writecode.o list.o bquick.o
- $(CC_FOR_BUILD) -o writecode writecode.o list.o bquick.o
-
-writecode.o: writecode.c $(CONFIG_H)
- $(CC_FOR_BUILD) -c $(CFLAGS) $(HDEFINES) $(CSEARCH) $(CSWITCHES) $(srcdir)/writecode.c
-
-list.o: list.c
- $(CC_FOR_BUILD) -c $(CFLAGS) $(HDEFINES) $(CSEARCH) $(CSWITCHES) $(srcdir)/list.c
-
-# Two copies of quick.o are created. One for $build and one for $host.
-bquick.o: quick.c
- $(CC_FOR_BUILD) -c $(CFLAGS) $(HDEFINES) $(CSEARCH) $(CSWITCHES) $(srcdir)/quick.c -o bquick.o
-
-clean-extra:
- rm -f tc-gen1.h tc-gen2.h tc-gen3.h tc-genb3.h writecode
diff --git a/sim/z8k/acconfig.h b/sim/z8k/acconfig.h
deleted file mode 100644
index f9b87a10c60..00000000000
--- a/sim/z8k/acconfig.h
+++ /dev/null
@@ -1,15 +0,0 @@
-
-/* Define to 1 if NLS is requested. */
-#undef ENABLE_NLS
-
-/* Define as 1 if you have catgets and don't want to use GNU gettext. */
-#undef HAVE_CATGETS
-
-/* Define as 1 if you have gettext and don't want to use GNU gettext. */
-#undef HAVE_GETTEXT
-
-/* Define as 1 if you have the stpcpy function. */
-#undef HAVE_STPCPY
-
-/* Define if your locale.h file contains LC_MESSAGES. */
-#undef HAVE_LC_MESSAGES
diff --git a/sim/z8k/comped1.c b/sim/z8k/comped1.c
deleted file mode 100644
index 6c565138cfb..00000000000
--- a/sim/z8k/comped1.c
+++ /dev/null
@@ -1,31 +0,0 @@
-/* instruction interpreter module 1
- Copyright (C) 1992, 1993 Free Software Foundation, Inc.
-
-This file is part of Z8KSIM
-
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-Z8KZIM is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License
-along with Z8KZIM; if not, write to the Free Software
-Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
-
-#include <ansidecl.h>
-#include "tm.h"
-#include "sim.h"
-
-
-#ifdef __GNUC__
-#define INLINE inline
-#include "inlines.h"
-#endif
-
-#include "tc-gen1.h"
-
diff --git a/sim/z8k/comped2.c b/sim/z8k/comped2.c
deleted file mode 100644
index 60012d17034..00000000000
--- a/sim/z8k/comped2.c
+++ /dev/null
@@ -1,25 +0,0 @@
-/* instruction interpreter module 2
- Copyright (C) 1992, 1993 Free Software Foundation, Inc.
-
-This file is part of Z8KSIM
-
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License
-along with Z8KZIM; if not, write to the Free Software
-Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
-
-#include <ansidecl.h>
-#include "tm.h"
-#include "sim.h"
-#include "tc-gen2.h"
-
-
diff --git a/sim/z8k/comped3.c b/sim/z8k/comped3.c
deleted file mode 100644
index c5269699170..00000000000
--- a/sim/z8k/comped3.c
+++ /dev/null
@@ -1,28 +0,0 @@
-/* instruction interpreter module 2
- Copyright (C) 1987, 1992 Free Software Foundation, Inc.
-
-This file is part of Z8KSIM
-
-Z8KSIM is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-Z8KSIM is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License
-along with Z8KZIM; if not, write to the Free Software
-Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
-
-
-#include <ansidecl.h>
-#include "tm.h"
-#include "sim.h"
-
-#include "inlines.h"
-#include "tc-gen3.h"
-
-
diff --git a/sim/z8k/compedb3.c b/sim/z8k/compedb3.c
deleted file mode 100644
index 54541dbf1df..00000000000
--- a/sim/z8k/compedb3.c
+++ /dev/null
@@ -1,29 +0,0 @@
-/* instruction interpreter module 3
- Copyright (C) 1992, 1993 Free Software Foundation, Inc.
-
-This file is part of Z8KSIM
-
-Z8KSIM is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-Z8KSIM is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License
-along with Z8KZIM; if not, write to the Free Software
-Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
-
-#define ushort_type unsigned short
-
-#include <ansidecl.h>
-#include "tm.h"
-#include "sim.h"
-#include "inlines.h"
-
-#include "tc-genb3.h"
-
-
diff --git a/sim/z8k/config.in b/sim/z8k/config.in
deleted file mode 100644
index 7547724b34a..00000000000
--- a/sim/z8k/config.in
+++ /dev/null
@@ -1,161 +0,0 @@
-/* config.in. Generated automatically from configure.in by autoheader. */
-
-/* Define if using alloca.c. */
-#undef C_ALLOCA
-
-/* Define to empty if the keyword does not work. */
-#undef const
-
-/* Define to one of _getb67, GETB67, getb67 for Cray-2 and Cray-YMP systems.
- This function is required for alloca.c support on those systems. */
-#undef CRAY_STACKSEG_END
-
-/* Define if you have alloca, as a function or macro. */
-#undef HAVE_ALLOCA
-
-/* Define if you have <alloca.h> and it should be used (not on Ultrix). */
-#undef HAVE_ALLOCA_H
-
-/* Define if you have a working `mmap' system call. */
-#undef HAVE_MMAP
-
-/* Define as __inline if that's what the C compiler calls it. */
-#undef inline
-
-/* Define to `long' if <sys/types.h> doesn't define. */
-#undef off_t
-
-/* Define if you need to in order for stat and other things to work. */
-#undef _POSIX_SOURCE
-
-/* Define as the return type of signal handlers (int or void). */
-#undef RETSIGTYPE
-
-/* Define to `unsigned' if <sys/types.h> doesn't define. */
-#undef size_t
-
-/* If using the C implementation of alloca, define if you know the
- direction of stack growth for your system; otherwise it will be
- automatically deduced at run-time.
- STACK_DIRECTION > 0 => grows toward higher addresses
- STACK_DIRECTION < 0 => grows toward lower addresses
- STACK_DIRECTION = 0 => direction of growth unknown
- */
-#undef STACK_DIRECTION
-
-/* Define if you have the ANSI C header files. */
-#undef STDC_HEADERS
-
-/* Define to 1 if NLS is requested. */
-#undef ENABLE_NLS
-
-/* Define as 1 if you have gettext and don't want to use GNU gettext. */
-#undef HAVE_GETTEXT
-
-/* Define as 1 if you have the stpcpy function. */
-#undef HAVE_STPCPY
-
-/* Define if your locale.h file contains LC_MESSAGES. */
-#undef HAVE_LC_MESSAGES
-
-/* Define if you have the __argz_count function. */
-#undef HAVE___ARGZ_COUNT
-
-/* Define if you have the __argz_next function. */
-#undef HAVE___ARGZ_NEXT
-
-/* Define if you have the __argz_stringify function. */
-#undef HAVE___ARGZ_STRINGIFY
-
-/* Define if you have the __setfpucw function. */
-#undef HAVE___SETFPUCW
-
-/* Define if you have the dcgettext function. */
-#undef HAVE_DCGETTEXT
-
-/* Define if you have the getcwd function. */
-#undef HAVE_GETCWD
-
-/* Define if you have the getpagesize function. */
-#undef HAVE_GETPAGESIZE
-
-/* Define if you have the getrusage function. */
-#undef HAVE_GETRUSAGE
-
-/* Define if you have the munmap function. */
-#undef HAVE_MUNMAP
-
-/* Define if you have the putenv function. */
-#undef HAVE_PUTENV
-
-/* Define if you have the setenv function. */
-#undef HAVE_SETENV
-
-/* Define if you have the setlocale function. */
-#undef HAVE_SETLOCALE
-
-/* Define if you have the sigaction function. */
-#undef HAVE_SIGACTION
-
-/* Define if you have the stpcpy function. */
-#undef HAVE_STPCPY
-
-/* Define if you have the strcasecmp function. */
-#undef HAVE_STRCASECMP
-
-/* Define if you have the strchr function. */
-#undef HAVE_STRCHR
-
-/* Define if you have the time function. */
-#undef HAVE_TIME
-
-/* Define if you have the <argz.h> header file. */
-#undef HAVE_ARGZ_H
-
-/* Define if you have the <fcntl.h> header file. */
-#undef HAVE_FCNTL_H
-
-/* Define if you have the <fpu_control.h> header file. */
-#undef HAVE_FPU_CONTROL_H
-
-/* Define if you have the <limits.h> header file. */
-#undef HAVE_LIMITS_H
-
-/* Define if you have the <locale.h> header file. */
-#undef HAVE_LOCALE_H
-
-/* Define if you have the <malloc.h> header file. */
-#undef HAVE_MALLOC_H
-
-/* Define if you have the <nl_types.h> header file. */
-#undef HAVE_NL_TYPES_H
-
-/* Define if you have the <stdlib.h> header file. */
-#undef HAVE_STDLIB_H
-
-/* Define if you have the <string.h> header file. */
-#undef HAVE_STRING_H
-
-/* Define if you have the <strings.h> header file. */
-#undef HAVE_STRINGS_H
-
-/* Define if you have the <sys/param.h> header file. */
-#undef HAVE_SYS_PARAM_H
-
-/* Define if you have the <sys/resource.h> header file. */
-#undef HAVE_SYS_RESOURCE_H
-
-/* Define if you have the <sys/time.h> header file. */
-#undef HAVE_SYS_TIME_H
-
-/* Define if you have the <sys/times.h> header file. */
-#undef HAVE_SYS_TIMES_H
-
-/* Define if you have the <time.h> header file. */
-#undef HAVE_TIME_H
-
-/* Define if you have the <unistd.h> header file. */
-#undef HAVE_UNISTD_H
-
-/* Define if you have the <values.h> header file. */
-#undef HAVE_VALUES_H
diff --git a/sim/z8k/configure b/sim/z8k/configure
deleted file mode 100755
index c21edf82008..00000000000
--- a/sim/z8k/configure
+++ /dev/null
@@ -1,4024 +0,0 @@
-#! /bin/sh
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-sim_inline="-DDEFAULT_INLINE=0"
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-# This file is derived from `gettext.m4'. The difference is that the
-# included macros assume Cygnus-style source and build trees.
-
-# Macro to add for using GNU gettext.
-# Ulrich Drepper <drepper@cygnus.com>, 1995.
-#
-# This file file be copied and used freely without restrictions. It can
-# be used in projects which are not available under the GNU Public License
-# but which still want to provide support for the GNU gettext functionality.
-# Please note that the actual code is *not* freely available.
-
-# serial 3
-
-
-
-
-
-# Search path for a program which passes the given test.
-# Ulrich Drepper <drepper@cygnus.com>, 1996.
-#
-# This file file be copied and used freely without restrictions. It can
-# be used in projects which are not available under the GNU Public License
-# but which still want to provide support for the GNU gettext functionality.
-# Please note that the actual code is *not* freely available.
-
-# serial 1
-
-
-
-# Check whether LC_MESSAGES is available in <locale.h>.
-# Ulrich Drepper <drepper@cygnus.com>, 1995.
-#
-# This file file be copied and used freely without restrictions. It can
-# be used in projects which are not available under the GNU Public License
-# but which still want to provide support for the GNU gettext functionality.
-# Please note that the actual code is *not* freely available.
-
-# serial 1
-
-
-
-
-
-
-# Guess values for system-dependent variables and create Makefiles.
-# Generated automatically using autoconf version 2.13
-# Copyright (C) 1992, 93, 94, 95, 96 Free Software Foundation, Inc.
-#
-# This configure script is free software; the Free Software Foundation
-# gives unlimited permission to copy, distribute and modify it.
-
-# Defaults:
-ac_help=
-ac_default_prefix=/usr/local
-# Any additions from configure.in:
-ac_help="$ac_help
- --disable-nls do not use Native Language Support"
-ac_help="$ac_help
- --with-included-gettext use the GNU gettext library included here"
-ac_help="$ac_help
- --enable-maintainer-mode Enable developer functionality."
-ac_help="$ac_help
- --enable-sim-bswap Use Host specific BSWAP instruction."
-ac_help="$ac_help
- --enable-sim-cflags=opts Extra CFLAGS for use in building simulator"
-ac_help="$ac_help
- --enable-sim-debug=opts Enable debugging flags"
-ac_help="$ac_help
- --enable-sim-stdio Specify whether to use stdio for console input/output."
-ac_help="$ac_help
- --enable-sim-trace=opts Enable tracing flags"
-ac_help="$ac_help
- --enable-sim-profile=opts Enable profiling flags"
-
-# Initialize some variables set by options.
-# The variables have the same names as the options, with
-# dashes changed to underlines.
-build=NONE
-cache_file=./config.cache
-exec_prefix=NONE
-host=NONE
-no_create=
-nonopt=NONE
-no_recursion=
-prefix=NONE
-program_prefix=NONE
-program_suffix=NONE
-program_transform_name=s,x,x,
-silent=
-site=
-sitefile=
-srcdir=
-target=NONE
-verbose=
-x_includes=NONE
-x_libraries=NONE
-bindir='${exec_prefix}/bin'
-sbindir='${exec_prefix}/sbin'
-libexecdir='${exec_prefix}/libexec'
-datadir='${prefix}/share'
-sysconfdir='${prefix}/etc'
-sharedstatedir='${prefix}/com'
-localstatedir='${prefix}/var'
-libdir='${exec_prefix}/lib'
-includedir='${prefix}/include'
-oldincludedir='/usr/include'
-infodir='${prefix}/info'
-mandir='${prefix}/man'
-
-# Initialize some other variables.
-subdirs=
-MFLAGS= MAKEFLAGS=
-SHELL=${CONFIG_SHELL-/bin/sh}
-# Maximum number of lines to put in a shell here document.
-ac_max_here_lines=12
-
-ac_prev=
-for ac_option
-do
-
- # If the previous option needs an argument, assign it.
- if test -n "$ac_prev"; then
- eval "$ac_prev=\$ac_option"
- ac_prev=
- continue
- fi
-
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-echo $ac_n "checking for POSIXized ISC""... $ac_c" 1>&6
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-echo $ac_n "checking for ANSI C header files""... $ac_c" 1>&6
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- echo "configure: failed program was:" >&5
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- ac_cv_header_stdc=no
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-rm -f conftest*
-
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-
-if test $ac_cv_header_stdc = yes; then
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-if (eval "$ac_cpp conftest.$ac_ext") 2>&5 |
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-if { (eval echo configure:887: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null
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-
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-
-echo "$ac_t""$ac_cv_header_stdc" 1>&6
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-
-echo $ac_n "checking for working const""... $ac_c" 1>&6
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-#line 916 "configure"
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-{ /* AIX XL C 1.02.0.0 rejects this saying
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-{ /* ULTRIX-32 V3.1 (Rev 9) vcc rejects this */
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-if { (eval echo configure:965: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
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- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
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-rm -f conftest*
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-
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-echo $ac_n "checking for inline""... $ac_c" 1>&6
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-if { (eval echo configure:1000: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
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- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
-fi
-rm -f conftest*
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-
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-
-echo "$ac_t""$ac_cv_c_inline" 1>&6
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-echo $ac_n "checking for off_t""... $ac_c" 1>&6
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- cat > conftest.$ac_ext <<EOF
-#line 1031 "configure"
-#include "confdefs.h"
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-if (eval "$ac_cpp conftest.$ac_ext") 2>&5 |
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- rm -rf conftest*
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-
-fi
-echo "$ac_t""$ac_cv_type_off_t" 1>&6
-if test $ac_cv_type_off_t = no; then
- cat >> confdefs.h <<\EOF
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-
-fi
-
-echo $ac_n "checking for size_t""... $ac_c" 1>&6
-echo "configure:1059: checking for size_t" >&5
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- echo $ac_n "(cached) $ac_c" 1>&6
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- cat > conftest.$ac_ext <<EOF
-#line 1064 "configure"
-#include "confdefs.h"
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-if (eval "$ac_cpp conftest.$ac_ext") 2>&5 |
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-
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- echo $ac_n "(cached) $ac_c" 1>&6
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- cat > conftest.$ac_ext <<EOF
-#line 1099 "configure"
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-if { (eval echo configure:1106: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
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- ac_cv_header_alloca_h=yes
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- ac_cv_header_alloca_h=no
-fi
-rm -f conftest*
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-
-echo "$ac_t""$ac_cv_header_alloca_h" 1>&6
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-
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-
-echo $ac_n "checking for alloca""... $ac_c" 1>&6
-echo "configure:1127: checking for alloca" >&5
-if eval "test \"`echo '$''{'ac_cv_func_alloca_works'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1132 "configure"
-#include "confdefs.h"
-
-#ifdef __GNUC__
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-# ifdef _MSC_VER
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-# if HAVE_ALLOCA_H
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-# ifdef _AIX
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-# endif
-# endif
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-
-int main() {
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-if { (eval echo configure:1160: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- rm -rf conftest*
- ac_cv_func_alloca_works=yes
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- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- ac_cv_func_alloca_works=no
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-rm -f conftest*
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-
-echo "$ac_t""$ac_cv_func_alloca_works" 1>&6
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- cat >> confdefs.h <<\EOF
-#define HAVE_ALLOCA 1
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-
-fi
-
-if test $ac_cv_func_alloca_works = no; then
- # The SVR3 libPW and SVR4 libucb both contain incompatible functions
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- # contain a buggy version. If you still want to use their alloca,
- # use ar to extract alloca.o from them instead of compiling alloca.c.
- ALLOCA=alloca.${ac_objext}
- cat >> confdefs.h <<\EOF
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-
-
-echo $ac_n "checking whether alloca needs Cray hooks""... $ac_c" 1>&6
-echo "configure:1192: checking whether alloca needs Cray hooks" >&5
-if eval "test \"`echo '$''{'ac_cv_os_cray'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1197 "configure"
-#include "confdefs.h"
-#if defined(CRAY) && ! defined(CRAY2)
-webecray
-#else
-wenotbecray
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-
-EOF
-if (eval "$ac_cpp conftest.$ac_ext") 2>&5 |
- egrep "webecray" >/dev/null 2>&1; then
- rm -rf conftest*
- ac_cv_os_cray=yes
-else
- rm -rf conftest*
- ac_cv_os_cray=no
-fi
-rm -f conftest*
-
-fi
-
-echo "$ac_t""$ac_cv_os_cray" 1>&6
-if test $ac_cv_os_cray = yes; then
-for ac_func in _getb67 GETB67 getb67; do
- echo $ac_n "checking for $ac_func""... $ac_c" 1>&6
-echo "configure:1222: checking for $ac_func" >&5
-if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1227 "configure"
-#include "confdefs.h"
-/* System header to define __stub macros and hopefully few prototypes,
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-#include <assert.h>
-/* Override any gcc2 internal prototype to avoid an error. */
-/* We use char because int might match the return type of a gcc2
- builtin and then its argument prototype would still apply. */
-char $ac_func();
-
-int main() {
-
-/* The GNU C library defines this for functions which it implements
- to always fail with ENOSYS. Some functions are actually named
- something starting with __ and the normal name is an alias. */
-#if defined (__stub_$ac_func) || defined (__stub___$ac_func)
-choke me
-#else
-$ac_func();
-#endif
-
-; return 0; }
-EOF
-if { (eval echo configure:1250: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=yes"
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=no"
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-rm -f conftest*
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-
-if eval "test \"`echo '$ac_cv_func_'$ac_func`\" = yes"; then
- echo "$ac_t""yes" 1>&6
- cat >> confdefs.h <<EOF
-#define CRAY_STACKSEG_END $ac_func
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-
- break
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- echo "$ac_t""no" 1>&6
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-
-done
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-
-echo $ac_n "checking stack direction for C alloca""... $ac_c" 1>&6
-echo "configure:1277: checking stack direction for C alloca" >&5
-if eval "test \"`echo '$''{'ac_cv_c_stack_direction'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
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- if test "$cross_compiling" = yes; then
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- cat > conftest.$ac_ext <<EOF
-#line 1285 "configure"
-#include "confdefs.h"
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-{
- static char *addr = 0;
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-{
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-if { (eval echo configure:1304: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null
-then
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- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -fr conftest*
- ac_cv_c_stack_direction=-1
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-rm -fr conftest*
-fi
-
-fi
-
-echo "$ac_t""$ac_cv_c_stack_direction" 1>&6
-cat >> confdefs.h <<EOF
-#define STACK_DIRECTION $ac_cv_c_stack_direction
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-fi
-
-for ac_hdr in unistd.h
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-echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6
-echo "configure:1329: checking for $ac_hdr" >&5
-if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then
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-else
- cat > conftest.$ac_ext <<EOF
-#line 1334 "configure"
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-ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
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- eval "ac_cv_header_$ac_safe=yes"
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- echo "$ac_err" >&5
- echo "configure: failed program was:" >&5
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- eval "ac_cv_header_$ac_safe=no"
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- ac_tr_hdr=HAVE_`echo $ac_hdr | sed 'y%abcdefghijklmnopqrstuvwxyz./-%ABCDEFGHIJKLMNOPQRSTUVWXYZ___%'`
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- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1373 "configure"
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-/* We use char because int might match the return type of a gcc2
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-char $ac_func();
-
-int main() {
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-/* The GNU C library defines this for functions which it implements
- to always fail with ENOSYS. Some functions are actually named
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-$ac_func();
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-
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-if { (eval echo configure:1396: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=yes"
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- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=no"
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-rm -f conftest*
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-
-if eval "test \"`echo '$ac_cv_func_'$ac_func`\" = yes"; then
- echo "$ac_t""yes" 1>&6
- ac_tr_func=HAVE_`echo $ac_func | tr 'abcdefghijklmnopqrstuvwxyz' 'ABCDEFGHIJKLMNOPQRSTUVWXYZ'`
- cat >> confdefs.h <<EOF
-#define $ac_tr_func 1
-EOF
-
-else
- echo "$ac_t""no" 1>&6
-fi
-done
-
-echo $ac_n "checking for working mmap""... $ac_c" 1>&6
-echo "configure:1421: checking for working mmap" >&5
-if eval "test \"`echo '$''{'ac_cv_func_mmap_fixed_mapped'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- if test "$cross_compiling" = yes; then
- ac_cv_func_mmap_fixed_mapped=no
-else
- cat > conftest.$ac_ext <<EOF
-#line 1429 "configure"
-#include "confdefs.h"
-
-/* Thanks to Mike Haertel and Jim Avera for this test.
- Here is a matrix of mmap possibilities:
- mmap private not fixed
- mmap private fixed at somewhere currently unmapped
- mmap private fixed at somewhere already mapped
- mmap shared not fixed
- mmap shared fixed at somewhere currently unmapped
- mmap shared fixed at somewhere already mapped
- For private mappings, we should verify that changes cannot be read()
- back from the file, nor mmap's back from the file at a different
- address. (There have been systems where private was not correctly
- implemented like the infamous i386 svr4.0, and systems where the
- VM page cache was not coherent with the filesystem buffer cache
- like early versions of FreeBSD and possibly contemporary NetBSD.)
- For shared mappings, we should conversely verify that changes get
- propogated back to all the places they're supposed to be.
-
- Grep wants private fixed already mapped.
- The main things grep needs to know about mmap are:
- * does it exist and is it safe to write into the mmap'd area
- * how to use it (BSD variants) */
-#include <sys/types.h>
-#include <fcntl.h>
-#include <sys/mman.h>
-
-/* This mess was copied from the GNU getpagesize.h. */
-#ifndef HAVE_GETPAGESIZE
-# ifdef HAVE_UNISTD_H
-# include <unistd.h>
-# endif
-
-/* Assume that all systems that can run configure have sys/param.h. */
-# ifndef HAVE_SYS_PARAM_H
-# define HAVE_SYS_PARAM_H 1
-# endif
-
-# ifdef _SC_PAGESIZE
-# define getpagesize() sysconf(_SC_PAGESIZE)
-# else /* no _SC_PAGESIZE */
-# ifdef HAVE_SYS_PARAM_H
-# include <sys/param.h>
-# ifdef EXEC_PAGESIZE
-# define getpagesize() EXEC_PAGESIZE
-# else /* no EXEC_PAGESIZE */
-# ifdef NBPG
-# define getpagesize() NBPG * CLSIZE
-# ifndef CLSIZE
-# define CLSIZE 1
-# endif /* no CLSIZE */
-# else /* no NBPG */
-# ifdef NBPC
-# define getpagesize() NBPC
-# else /* no NBPC */
-# ifdef PAGESIZE
-# define getpagesize() PAGESIZE
-# endif /* PAGESIZE */
-# endif /* no NBPC */
-# endif /* no NBPG */
-# endif /* no EXEC_PAGESIZE */
-# else /* no HAVE_SYS_PARAM_H */
-# define getpagesize() 8192 /* punt totally */
-# endif /* no HAVE_SYS_PARAM_H */
-# endif /* no _SC_PAGESIZE */
-
-#endif /* no HAVE_GETPAGESIZE */
-
-#ifdef __cplusplus
-extern "C" { void *malloc(unsigned); }
-#else
-char *malloc();
-#endif
-
-int
-main()
-{
- char *data, *data2, *data3;
- int i, pagesize;
- int fd;
-
- pagesize = getpagesize();
-
- /*
- * First, make a file with some known garbage in it.
- */
- data = malloc(pagesize);
- if (!data)
- exit(1);
- for (i = 0; i < pagesize; ++i)
- *(data + i) = rand();
- umask(0);
- fd = creat("conftestmmap", 0600);
- if (fd < 0)
- exit(1);
- if (write(fd, data, pagesize) != pagesize)
- exit(1);
- close(fd);
-
- /*
- * Next, try to mmap the file at a fixed address which
- * already has something else allocated at it. If we can,
- * also make sure that we see the same garbage.
- */
- fd = open("conftestmmap", O_RDWR);
- if (fd < 0)
- exit(1);
- data2 = malloc(2 * pagesize);
- if (!data2)
- exit(1);
- data2 += (pagesize - ((int) data2 & (pagesize - 1))) & (pagesize - 1);
- if (data2 != mmap(data2, pagesize, PROT_READ | PROT_WRITE,
- MAP_PRIVATE | MAP_FIXED, fd, 0L))
- exit(1);
- for (i = 0; i < pagesize; ++i)
- if (*(data + i) != *(data2 + i))
- exit(1);
-
- /*
- * Finally, make sure that changes to the mapped area
- * do not percolate back to the file as seen by read().
- * (This is a bug on some variants of i386 svr4.0.)
- */
- for (i = 0; i < pagesize; ++i)
- *(data2 + i) = *(data2 + i) + 1;
- data3 = malloc(pagesize);
- if (!data3)
- exit(1);
- if (read(fd, data3, pagesize) != pagesize)
- exit(1);
- for (i = 0; i < pagesize; ++i)
- if (*(data + i) != *(data3 + i))
- exit(1);
- close(fd);
- unlink("conftestmmap");
- exit(0);
-}
-
-EOF
-if { (eval echo configure:1569: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null
-then
- ac_cv_func_mmap_fixed_mapped=yes
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -fr conftest*
- ac_cv_func_mmap_fixed_mapped=no
-fi
-rm -fr conftest*
-fi
-
-fi
-
-echo "$ac_t""$ac_cv_func_mmap_fixed_mapped" 1>&6
-if test $ac_cv_func_mmap_fixed_mapped = yes; then
- cat >> confdefs.h <<\EOF
-#define HAVE_MMAP 1
-EOF
-
-fi
-
-echo $ac_n "checking for Cygwin environment""... $ac_c" 1>&6
-echo "configure:1592: checking for Cygwin environment" >&5
-if eval "test \"`echo '$''{'ac_cv_cygwin'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1597 "configure"
-#include "confdefs.h"
-
-int main() {
-
-#ifndef __CYGWIN__
-#define __CYGWIN__ __CYGWIN32__
-#endif
-return __CYGWIN__;
-; return 0; }
-EOF
-if { (eval echo configure:1608: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
- rm -rf conftest*
- ac_cv_cygwin=yes
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- ac_cv_cygwin=no
-fi
-rm -f conftest*
-rm -f conftest*
-fi
-
-echo "$ac_t""$ac_cv_cygwin" 1>&6
-CYGWIN=
-test "$ac_cv_cygwin" = yes && CYGWIN=yes
-echo $ac_n "checking for mingw32 environment""... $ac_c" 1>&6
-echo "configure:1625: checking for mingw32 environment" >&5
-if eval "test \"`echo '$''{'ac_cv_mingw32'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 1630 "configure"
-#include "confdefs.h"
-
-int main() {
-return __MINGW32__;
-; return 0; }
-EOF
-if { (eval echo configure:1637: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
- rm -rf conftest*
- ac_cv_mingw32=yes
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- ac_cv_mingw32=no
-fi
-rm -f conftest*
-rm -f conftest*
-fi
-
-echo "$ac_t""$ac_cv_mingw32" 1>&6
-MINGW32=
-test "$ac_cv_mingw32" = yes && MINGW32=yes
-
-# autoconf.info says this should be called right after AC_INIT.
-
-
-ac_aux_dir=
-for ac_dir in `cd $srcdir;pwd`/../.. $srcdir/`cd $srcdir;pwd`/../..; do
- if test -f $ac_dir/install-sh; then
- ac_aux_dir=$ac_dir
- ac_install_sh="$ac_aux_dir/install-sh -c"
- break
- elif test -f $ac_dir/install.sh; then
- ac_aux_dir=$ac_dir
- ac_install_sh="$ac_aux_dir/install.sh -c"
- break
- fi
-done
-if test -z "$ac_aux_dir"; then
- { echo "configure: error: can not find install-sh or install.sh in `cd $srcdir;pwd`/../.. $srcdir/`cd $srcdir;pwd`/../.." 1>&2; exit 1; }
-fi
-ac_config_guess=$ac_aux_dir/config.guess
-ac_config_sub=$ac_aux_dir/config.sub
-ac_configure=$ac_aux_dir/configure # This should be Cygnus configure.
-
-
-# Do some error checking and defaulting for the host and target type.
-# The inputs are:
-# configure --host=HOST --target=TARGET --build=BUILD NONOPT
-#
-# The rules are:
-# 1. You are not allowed to specify --host, --target, and nonopt at the
-# same time.
-# 2. Host defaults to nonopt.
-# 3. If nonopt is not specified, then host defaults to the current host,
-# as determined by config.guess.
-# 4. Target and build default to nonopt.
-# 5. If nonopt is not specified, then target and build default to host.
-
-# The aliases save the names the user supplied, while $host etc.
-# will get canonicalized.
-case $host---$target---$nonopt in
-NONE---*---* | *---NONE---* | *---*---NONE) ;;
-*) { echo "configure: error: can only configure for one host and one target at a time" 1>&2; exit 1; } ;;
-esac
-
-
-# Make sure we can run config.sub.
-if ${CONFIG_SHELL-/bin/sh} $ac_config_sub sun4 >/dev/null 2>&1; then :
-else { echo "configure: error: can not run $ac_config_sub" 1>&2; exit 1; }
-fi
-
-echo $ac_n "checking host system type""... $ac_c" 1>&6
-echo "configure:1704: checking host system type" >&5
-
-host_alias=$host
-case "$host_alias" in
-NONE)
- case $nonopt in
- NONE)
- if host_alias=`${CONFIG_SHELL-/bin/sh} $ac_config_guess`; then :
- else { echo "configure: error: can not guess host type; you must specify one" 1>&2; exit 1; }
- fi ;;
- *) host_alias=$nonopt ;;
- esac ;;
-esac
-
-host=`${CONFIG_SHELL-/bin/sh} $ac_config_sub $host_alias`
-host_cpu=`echo $host | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\1/'`
-host_vendor=`echo $host | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\2/'`
-host_os=`echo $host | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\3/'`
-echo "$ac_t""$host" 1>&6
-
-echo $ac_n "checking target system type""... $ac_c" 1>&6
-echo "configure:1725: checking target system type" >&5
-
-target_alias=$target
-case "$target_alias" in
-NONE)
- case $nonopt in
- NONE) target_alias=$host_alias ;;
- *) target_alias=$nonopt ;;
- esac ;;
-esac
-
-target=`${CONFIG_SHELL-/bin/sh} $ac_config_sub $target_alias`
-target_cpu=`echo $target | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\1/'`
-target_vendor=`echo $target | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\2/'`
-target_os=`echo $target | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\3/'`
-echo "$ac_t""$target" 1>&6
-
-echo $ac_n "checking build system type""... $ac_c" 1>&6
-echo "configure:1743: checking build system type" >&5
-
-build_alias=$build
-case "$build_alias" in
-NONE)
- case $nonopt in
- NONE) build_alias=$host_alias ;;
- *) build_alias=$nonopt ;;
- esac ;;
-esac
-
-build=`${CONFIG_SHELL-/bin/sh} $ac_config_sub $build_alias`
-build_cpu=`echo $build | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\1/'`
-build_vendor=`echo $build | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\2/'`
-build_os=`echo $build | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\3/'`
-echo "$ac_t""$build" 1>&6
-
-test "$host_alias" != "$target_alias" &&
- test "$program_prefix$program_suffix$program_transform_name" = \
- NONENONEs,x,x, &&
- program_prefix=${target_alias}-
-
-if test "$program_transform_name" = s,x,x,; then
- program_transform_name=
-else
- # Double any \ or $. echo might interpret backslashes.
- cat <<\EOF_SED > conftestsed
-s,\\,\\\\,g; s,\$,$$,g
-EOF_SED
- program_transform_name="`echo $program_transform_name|sed -f conftestsed`"
- rm -f conftestsed
-fi
-test "$program_prefix" != NONE &&
- program_transform_name="s,^,${program_prefix},; $program_transform_name"
-# Use a double $ so make ignores it.
-test "$program_suffix" != NONE &&
- program_transform_name="s,\$\$,${program_suffix},; $program_transform_name"
-
-# sed with no file args requires a program.
-test "$program_transform_name" = "" && program_transform_name="s,x,x,"
-
-# Extract the first word of "gcc", so it can be a program name with args.
-set dummy gcc; ac_word=$2
-echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:1787: checking for $ac_word" >&5
-if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- if test -n "$CC"; then
- ac_cv_prog_CC="$CC" # Let the user override the test.
-else
- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
- ac_dummy="$PATH"
- for ac_dir in $ac_dummy; do
- test -z "$ac_dir" && ac_dir=.
- if test -f $ac_dir/$ac_word; then
- ac_cv_prog_CC="gcc"
- break
- fi
- done
- IFS="$ac_save_ifs"
-fi
-fi
-CC="$ac_cv_prog_CC"
-if test -n "$CC"; then
- echo "$ac_t""$CC" 1>&6
-else
- echo "$ac_t""no" 1>&6
-fi
-
-if test -z "$CC"; then
- # Extract the first word of "cc", so it can be a program name with args.
-set dummy cc; ac_word=$2
-echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:1817: checking for $ac_word" >&5
-if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- if test -n "$CC"; then
- ac_cv_prog_CC="$CC" # Let the user override the test.
-else
- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
- ac_prog_rejected=no
- ac_dummy="$PATH"
- for ac_dir in $ac_dummy; do
- test -z "$ac_dir" && ac_dir=.
- if test -f $ac_dir/$ac_word; then
- if test "$ac_dir/$ac_word" = "/usr/ucb/cc"; then
- ac_prog_rejected=yes
- continue
- fi
- ac_cv_prog_CC="cc"
- break
- fi
- done
- IFS="$ac_save_ifs"
-if test $ac_prog_rejected = yes; then
- # We found a bogon in the path, so make sure we never use it.
- set dummy $ac_cv_prog_CC
- shift
- if test $# -gt 0; then
- # We chose a different compiler from the bogus one.
- # However, it has the same basename, so the bogon will be chosen
- # first if we set CC to just the basename; use the full file name.
- shift
- set dummy "$ac_dir/$ac_word" "$@"
- shift
- ac_cv_prog_CC="$@"
- fi
-fi
-fi
-fi
-CC="$ac_cv_prog_CC"
-if test -n "$CC"; then
- echo "$ac_t""$CC" 1>&6
-else
- echo "$ac_t""no" 1>&6
-fi
-
- if test -z "$CC"; then
- case "`uname -s`" in
- *win32* | *WIN32*)
- # Extract the first word of "cl", so it can be a program name with args.
-set dummy cl; ac_word=$2
-echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:1868: checking for $ac_word" >&5
-if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- if test -n "$CC"; then
- ac_cv_prog_CC="$CC" # Let the user override the test.
-else
- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
- ac_dummy="$PATH"
- for ac_dir in $ac_dummy; do
- test -z "$ac_dir" && ac_dir=.
- if test -f $ac_dir/$ac_word; then
- ac_cv_prog_CC="cl"
- break
- fi
- done
- IFS="$ac_save_ifs"
-fi
-fi
-CC="$ac_cv_prog_CC"
-if test -n "$CC"; then
- echo "$ac_t""$CC" 1>&6
-else
- echo "$ac_t""no" 1>&6
-fi
- ;;
- esac
- fi
- test -z "$CC" && { echo "configure: error: no acceptable cc found in \$PATH" 1>&2; exit 1; }
-fi
-
-echo $ac_n "checking whether the C compiler ($CC $CFLAGS $LDFLAGS) works""... $ac_c" 1>&6
-echo "configure:1900: checking whether the C compiler ($CC $CFLAGS $LDFLAGS) works" >&5
-
-ac_ext=c
-# CFLAGS is not in ac_cpp because -g, -O, etc. are not valid cpp options.
-ac_cpp='$CPP $CPPFLAGS'
-ac_compile='${CC-cc} -c $CFLAGS $CPPFLAGS conftest.$ac_ext 1>&5'
-ac_link='${CC-cc} -o conftest${ac_exeext} $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS 1>&5'
-cross_compiling=$ac_cv_prog_cc_cross
-
-cat > conftest.$ac_ext << EOF
-
-#line 1911 "configure"
-#include "confdefs.h"
-
-main(){return(0);}
-EOF
-if { (eval echo configure:1916: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
- ac_cv_prog_cc_works=yes
- # If we can't run a trivial program, we are probably using a cross compiler.
- if (./conftest; exit) 2>/dev/null; then
- ac_cv_prog_cc_cross=no
- else
- ac_cv_prog_cc_cross=yes
- fi
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- ac_cv_prog_cc_works=no
-fi
-rm -fr conftest*
-ac_ext=c
-# CFLAGS is not in ac_cpp because -g, -O, etc. are not valid cpp options.
-ac_cpp='$CPP $CPPFLAGS'
-ac_compile='${CC-cc} -c $CFLAGS $CPPFLAGS conftest.$ac_ext 1>&5'
-ac_link='${CC-cc} -o conftest${ac_exeext} $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS 1>&5'
-cross_compiling=$ac_cv_prog_cc_cross
-
-echo "$ac_t""$ac_cv_prog_cc_works" 1>&6
-if test $ac_cv_prog_cc_works = no; then
- { echo "configure: error: installation or configuration problem: C compiler cannot create executables." 1>&2; exit 1; }
-fi
-echo $ac_n "checking whether the C compiler ($CC $CFLAGS $LDFLAGS) is a cross-compiler""... $ac_c" 1>&6
-echo "configure:1942: checking whether the C compiler ($CC $CFLAGS $LDFLAGS) is a cross-compiler" >&5
-echo "$ac_t""$ac_cv_prog_cc_cross" 1>&6
-cross_compiling=$ac_cv_prog_cc_cross
-
-echo $ac_n "checking whether we are using GNU C""... $ac_c" 1>&6
-echo "configure:1947: checking whether we are using GNU C" >&5
-if eval "test \"`echo '$''{'ac_cv_prog_gcc'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.c <<EOF
-#ifdef __GNUC__
- yes;
-#endif
-EOF
-if { ac_try='${CC-cc} -E conftest.c'; { (eval echo configure:1956: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }; } | egrep yes >/dev/null 2>&1; then
- ac_cv_prog_gcc=yes
-else
- ac_cv_prog_gcc=no
-fi
-fi
-
-echo "$ac_t""$ac_cv_prog_gcc" 1>&6
-
-if test $ac_cv_prog_gcc = yes; then
- GCC=yes
-else
- GCC=
-fi
-
-ac_test_CFLAGS="${CFLAGS+set}"
-ac_save_CFLAGS="$CFLAGS"
-CFLAGS=
-echo $ac_n "checking whether ${CC-cc} accepts -g""... $ac_c" 1>&6
-echo "configure:1975: checking whether ${CC-cc} accepts -g" >&5
-if eval "test \"`echo '$''{'ac_cv_prog_cc_g'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- echo 'void f(){}' > conftest.c
-if test -z "`${CC-cc} -g -c conftest.c 2>&1`"; then
- ac_cv_prog_cc_g=yes
-else
- ac_cv_prog_cc_g=no
-fi
-rm -f conftest*
-
-fi
-
-echo "$ac_t""$ac_cv_prog_cc_g" 1>&6
-if test "$ac_test_CFLAGS" = set; then
- CFLAGS="$ac_save_CFLAGS"
-elif test $ac_cv_prog_cc_g = yes; then
- if test "$GCC" = yes; then
- CFLAGS="-g -O2"
- else
- CFLAGS="-g"
- fi
-else
- if test "$GCC" = yes; then
- CFLAGS="-O2"
- else
- CFLAGS=
- fi
-fi
-
-# Find a good install program. We prefer a C program (faster),
-# so one script is as good as another. But avoid the broken or
-# incompatible versions:
-# SysV /etc/install, /usr/sbin/install
-# SunOS /usr/etc/install
-# IRIX /sbin/install
-# AIX /bin/install
-# AIX 4 /usr/bin/installbsd, which doesn't work without a -g flag
-# AFS /usr/afsws/bin/install, which mishandles nonexistent args
-# SVR4 /usr/ucb/install, which tries to use the nonexistent group "staff"
-# ./install, which can be erroneously created by make from ./install.sh.
-echo $ac_n "checking for a BSD compatible install""... $ac_c" 1>&6
-echo "configure:2018: checking for a BSD compatible install" >&5
-if test -z "$INSTALL"; then
-if eval "test \"`echo '$''{'ac_cv_path_install'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- IFS="${IFS= }"; ac_save_IFS="$IFS"; IFS=":"
- for ac_dir in $PATH; do
- # Account for people who put trailing slashes in PATH elements.
- case "$ac_dir/" in
- /|./|.//|/etc/*|/usr/sbin/*|/usr/etc/*|/sbin/*|/usr/afsws/bin/*|/usr/ucb/*) ;;
- *)
- # OSF1 and SCO ODT 3.0 have their own names for install.
- # Don't use installbsd from OSF since it installs stuff as root
- # by default.
- for ac_prog in ginstall scoinst install; do
- if test -f $ac_dir/$ac_prog; then
- if test $ac_prog = install &&
- grep dspmsg $ac_dir/$ac_prog >/dev/null 2>&1; then
- # AIX install. It has an incompatible calling convention.
- :
- else
- ac_cv_path_install="$ac_dir/$ac_prog -c"
- break 2
- fi
- fi
- done
- ;;
- esac
- done
- IFS="$ac_save_IFS"
-
-fi
- if test "${ac_cv_path_install+set}" = set; then
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- else
- # As a last resort, use the slow shell script. We don't cache a
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- # removed, or if the path is relative.
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- fi
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-echo "$ac_t""$INSTALL" 1>&6
-
-# Use test -z because SunOS4 sh mishandles braces in ${var-val}.
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-
-test -z "$INSTALL_SCRIPT" && INSTALL_SCRIPT='${INSTALL_PROGRAM}'
-
-test -z "$INSTALL_DATA" && INSTALL_DATA='${INSTALL} -m 644'
-
-
-# Put a plausible default for CC_FOR_BUILD in Makefile.
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-else
- CC_FOR_BUILD=gcc
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-
-
-
-
-AR=${AR-ar}
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-# Extract the first word of "ranlib", so it can be a program name with args.
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- if test -n "$RANLIB"; then
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- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
- ac_dummy="$PATH"
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- break
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- test -z "$ac_cv_prog_RANLIB" && ac_cv_prog_RANLIB=":"
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-else
- echo "$ac_t""no" 1>&6
-fi
-
-
-ALL_LINGUAS=
-
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-{ (eval echo configure:2131: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
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-char $ac_func();
-
-int main() {
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-/* The GNU C library defines this for functions which it implements
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- echo "configure: failed program was:" >&5
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- eval "ac_cv_func_$ac_func=no"
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- ac_tr_func=HAVE_`echo $ac_func | tr 'abcdefghijklmnopqrstuvwxyz' 'ABCDEFGHIJKLMNOPQRSTUVWXYZ'`
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-
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- echo "$ac_t""no" 1>&6
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-
-
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- eval "ac_cv_func_$ac_func=no"
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-
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- ac_tr_func=HAVE_`echo $ac_func | tr 'abcdefghijklmnopqrstuvwxyz' 'ABCDEFGHIJKLMNOPQRSTUVWXYZ'`
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-
-else
- echo "$ac_t""no" 1>&6
-fi
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-
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-
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- cat > conftest.$ac_ext <<EOF
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-
-echo "$ac_t""$am_cv_val_LC_MESSAGES" 1>&6
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-
- fi
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- echo $ac_n "checking whether NLS is requested""... $ac_c" 1>&6
-echo "configure:2313: checking whether NLS is requested" >&5
- # Check whether --enable-nls or --disable-nls was given.
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- USE_NLS=yes
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-
- echo "$ac_t""$USE_NLS" 1>&6
-
-
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-
- echo $ac_n "checking whether included gettext is requested""... $ac_c" 1>&6
-echo "configure:2333: checking whether included gettext is requested" >&5
- # Check whether --with-included-gettext or --without-included-gettext was given.
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-else
- nls_cv_force_use_gnu_gettext=no
-fi
-
- echo "$ac_t""$nls_cv_force_use_gnu_gettext" 1>&6
-
- nls_cv_use_gnu_gettext="$nls_cv_force_use_gnu_gettext"
- if test "$nls_cv_force_use_gnu_gettext" != "yes"; then
- nls_cv_header_intl=
- nls_cv_header_libgt=
- CATOBJEXT=NONE
-
- ac_safe=`echo "libintl.h" | sed 'y%./+-%__p_%'`
-echo $ac_n "checking for libintl.h""... $ac_c" 1>&6
-echo "configure:2352: checking for libintl.h" >&5
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- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
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-ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:2362: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
-ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
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- eval "ac_cv_header_$ac_safe=no"
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- echo $ac_n "checking for gettext in libc""... $ac_c" 1>&6
-echo "configure:2379: checking for gettext in libc" >&5
-if eval "test \"`echo '$''{'gt_cv_func_gettext_libc'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 2384 "configure"
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-if { (eval echo configure:2391: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
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- gt_cv_func_gettext_libc=yes
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- gt_cv_func_gettext_libc=no
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-rm -f conftest*
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-
-echo "$ac_t""$gt_cv_func_gettext_libc" 1>&6
-
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-echo "configure:2407: checking for bindtextdomain in -lintl" >&5
-ac_lib_var=`echo intl'_'bindtextdomain | sed 'y%./+-%__p_%'`
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-else
- ac_save_LIBS="$LIBS"
-LIBS="-lintl $LIBS"
-cat > conftest.$ac_ext <<EOF
-#line 2415 "configure"
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-/* We use char because int might match the return type of a gcc2
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-int main() {
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-; return 0; }
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-if { (eval echo configure:2426: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
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- eval "ac_cv_lib_$ac_lib_var=yes"
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- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
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- eval "ac_cv_lib_$ac_lib_var=no"
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-LIBS="$ac_save_LIBS"
-
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- echo $ac_n "checking for gettext in libintl""... $ac_c" 1>&6
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-if { (eval echo configure:2454: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
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- gt_cv_func_gettext_libintl=yes
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- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
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-
-echo "$ac_t""$gt_cv_func_gettext_libintl" 1>&6
-else
- echo "$ac_t""no" 1>&6
-fi
-
- fi
-
- if test "$gt_cv_func_gettext_libc" = "yes" \
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-
- # Extract the first word of "msgfmt", so it can be a program name with args.
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-echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
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-char $ac_func();
-
-int main() {
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-/* The GNU C library defines this for functions which it implements
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- IFS="$ac_save_ifs"
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-
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-else
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- *)
- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS="${IFS}:"
- for ac_dir in $PATH; do
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- ;;
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-XGETTEXT="$ac_cv_path_XGETTEXT"
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-else
- echo "$ac_t""no" 1>&6
-fi
-
- cat > conftest.$ac_ext <<EOF
-#line 2639 "configure"
-#include "confdefs.h"
-
-int main() {
-extern int _nl_msg_cat_cntr;
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-; return 0; }
-EOF
-if { (eval echo configure:2647: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
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- CATOBJEXT=.gmo
- DATADIRNAME=share
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- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- CATOBJEXT=.mo
- DATADIRNAME=lib
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-rm -f conftest*
- INSTOBJEXT=.mo
- fi
- fi
-
-else
- echo "$ac_t""no" 1>&6
-fi
-
-
-
- if test "$CATOBJEXT" = "NONE"; then
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- fi
-
- if test "$nls_cv_use_gnu_gettext" = "yes"; then
- INTLOBJS="\$(GETTOBJS)"
- # Extract the first word of "msgfmt", so it can be a program name with args.
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- *)
- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS="${IFS}:"
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- IFS="$ac_save_ifs"
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-fi
-
- # Extract the first word of "gmsgfmt", so it can be a program name with args.
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- *)
- IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":"
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- done
- IFS="$ac_save_ifs"
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-fi
-
- # Extract the first word of "xgettext", so it can be a program name with args.
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-echo "configure:2749: checking for $ac_word" >&5
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- IFS="$ac_save_ifs"
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- echo "$ac_t""no" 1>&6
-fi
-
-
- USE_INCLUDED_LIBINTL=yes
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- INSTOBJEXT=.mo
- DATADIRNAME=share
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- LIBS=`echo $LIBS | sed -e 's/-lintl//'`
- nls_cv_header_intl=libintl.h
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-
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- nls_cv_header_intl=libintl.h
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-
- # If this is used in GNU gettext we have to set USE_NLS to `yes'
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- fi
-
- for lang in $ALL_LINGUAS; do
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- POFILES="$POFILES $lang.po"
- done
-
-
-
-
-
-
-
-
-
-
-
-
-
-
- if test "x$CATOBJEXT" != "x"; then
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- echo $ac_n "checking for catalogs to be installed""... $ac_c" 1>&6
-echo "configure:2839: checking for catalogs to be installed" >&5
- NEW_LINGUAS=
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- esac
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- echo "$ac_t""$LINGUAS" 1>&6
- fi
-
- if test -n "$LINGUAS"; then
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- fi
- fi
-
- if test $ac_cv_header_locale_h = yes; then
- INCLUDE_LOCALE_H="#include <locale.h>"
- else
- INCLUDE_LOCALE_H="\
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- fi
-
-
- if test -f $srcdir/po2tbl.sed.in; then
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-echo $ac_n "checking for linux/version.h""... $ac_c" 1>&6
-echo "configure:2867: checking for linux/version.h" >&5
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- cat > conftest.$ac_ext <<EOF
-#line 2872 "configure"
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-#include <linux/version.h>
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-{ (eval echo configure:2877: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
-ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
-if test -z "$ac_err"; then
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=yes"
-else
- echo "$ac_err" >&5
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=no"
-fi
-rm -f conftest*
-fi
-if eval "test \"`echo '$ac_cv_header_'$ac_safe`\" = yes"; then
- echo "$ac_t""yes" 1>&6
- msgformat=linux
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- echo "$ac_t""no" 1>&6
-msgformat=xopen
-fi
-
-
- sed -e '/^#/d' $srcdir/$msgformat-msg.sed > po2msg.sed
- fi
- sed -e '/^#.*[^\\]$/d' -e '/^#$/d' \
- $srcdir/po2tbl.sed.in > po2tbl.sed
- fi
-
- if test "$PACKAGE" = "gettext"; then
- GT_NO="#NO#"
- GT_YES=
- else
- GT_NO=
- GT_YES="#YES#"
- fi
-
-
-
- MKINSTALLDIRS="\$(srcdir)/../../mkinstalldirs"
-
-
- l=
-
-
- if test -d $srcdir/po; then
- test -d po || mkdir po
- if test "x$srcdir" != "x."; then
- if test "x`echo $srcdir | sed 's@/.*@@'`" = "x"; then
- posrcprefix="$srcdir/"
- else
- posrcprefix="../$srcdir/"
- fi
- else
- posrcprefix="../"
- fi
- rm -f po/POTFILES
- sed -e "/^#/d" -e "/^\$/d" -e "s,.*, $posrcprefix& \\\\," -e "\$s/\(.*\) \\\\/\1/" \
- < $srcdir/po/POTFILES.in > po/POTFILES
- fi
-
-
-# Check for common headers.
-# FIXME: Seems to me this can cause problems for i386-windows hosts.
-# At one point there were hardcoded AC_DEFINE's if ${host} = i386-*-windows*.
-for ac_hdr in stdlib.h string.h strings.h unistd.h time.h
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-echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6
-echo "configure:2946: checking for $ac_hdr" >&5
-if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then
- echo $ac_n "(cached) $ac_c" 1>&6
-else
- cat > conftest.$ac_ext <<EOF
-#line 2951 "configure"
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-ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:2956: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
-ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
-if test -z "$ac_err"; then
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=yes"
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- echo "$ac_err" >&5
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_header_$ac_safe=no"
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-if eval "test \"`echo '$ac_cv_header_'$ac_safe`\" = yes"; then
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- ac_tr_hdr=HAVE_`echo $ac_hdr | sed 'y%abcdefghijklmnopqrstuvwxyz./-%ABCDEFGHIJKLMNOPQRSTUVWXYZ___%'`
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-
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-
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-echo "configure:2986: checking for $ac_hdr" >&5
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-{ (eval echo configure:2996: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
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- eval "ac_cv_header_$ac_safe=yes"
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- echo "$ac_err" >&5
- echo "configure: failed program was:" >&5
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- eval "ac_cv_header_$ac_safe=no"
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- ac_tr_hdr=HAVE_`echo $ac_hdr | sed 'y%abcdefghijklmnopqrstuvwxyz./-%ABCDEFGHIJKLMNOPQRSTUVWXYZ___%'`
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-
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-
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-echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6
-echo "configure:3026: checking for $ac_hdr" >&5
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-{ (eval echo configure:3036: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
-ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
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- echo "$ac_err" >&5
- echo "configure: failed program was:" >&5
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- eval "ac_cv_header_$ac_safe=no"
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- ac_tr_hdr=HAVE_`echo $ac_hdr | sed 'y%abcdefghijklmnopqrstuvwxyz./-%ABCDEFGHIJKLMNOPQRSTUVWXYZ___%'`
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-
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-
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-echo "configure:3066: checking for $ac_hdr" >&5
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- cat > conftest.$ac_ext <<EOF
-#line 3071 "configure"
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-ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:3076: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
-ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
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- eval "ac_cv_header_$ac_safe=yes"
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- echo "$ac_err" >&5
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
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- eval "ac_cv_header_$ac_safe=no"
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- ac_tr_hdr=HAVE_`echo $ac_hdr | sed 'y%abcdefghijklmnopqrstuvwxyz./-%ABCDEFGHIJKLMNOPQRSTUVWXYZ___%'`
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-
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-else
- cat > conftest.$ac_ext <<EOF
-#line 3110 "configure"
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-
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-
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-
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- eval "ac_cv_func_$ac_func=yes"
-else
- echo "configure: failed program was:" >&5
- cat conftest.$ac_ext >&5
- rm -rf conftest*
- eval "ac_cv_func_$ac_func=no"
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-
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-
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-
-
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-echo "configure:3160: checking for bind in -lsocket" >&5
-ac_lib_var=`echo socket'_'bind | sed 'y%./+-%__p_%'`
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-cat > conftest.$ac_ext <<EOF
-#line 3168 "configure"
-#include "confdefs.h"
-/* Override any gcc2 internal prototype to avoid an error. */
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-if { (eval echo configure:3179: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
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- eval "ac_cv_lib_$ac_lib_var=yes"
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-LIBS="$ac_save_LIBS"
-
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- ac_tr_lib=HAVE_LIB`echo socket | sed -e 's/[^a-zA-Z0-9_]/_/g' \
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-
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-
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-echo "configure:3207: checking for gethostbyname in -lnsl" >&5
-ac_lib_var=`echo nsl'_'gethostbyname | sed 'y%./+-%__p_%'`
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-#line 3215 "configure"
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-
-
-. ${srcdir}/../../bfd/configure.host
-
-
-
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-
-
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- sim_bswap=""
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-
-
-
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- no) sim_cflags="";;
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- sim_cflags=""
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-
-
-
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- *) sim_debug="-DDEBUG='(${enableval})' -DWITH_DEBUG='(${enableval})'";;
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- sim_debug=""
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-
-
-
-# Check whether --enable-sim-stdio or --disable-sim-stdio was given.
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- no) sim_stdio="-DWITH_STDIO=DONT_USE_STDIO";;
- *) { echo "configure: error: "Unknown value $enableval passed to --enable-sim-stdio"" 1>&2; exit 1; }; sim_stdio="";;
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- sim_stdio=""
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-
-
-
-# Check whether --enable-sim-trace or --disable-sim-trace was given.
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- sim_trace=""
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- sim_trace="$sim_trace)'" ;;
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- sim_trace=""
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-
-
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-
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-
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-
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-
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-if test "${CONFIG_HEADERS+set}" != set; then
-EOF
-cat >> $CONFIG_STATUS <<EOF
- CONFIG_HEADERS="config.h:config.in"
-EOF
-cat >> $CONFIG_STATUS <<\EOF
-fi
-for ac_file in .. $CONFIG_HEADERS; do if test "x$ac_file" != x..; then
- # Support "outfile[:infile[:infile...]]", defaulting infile="outfile.in".
- case "$ac_file" in
- *:*) ac_file_in=`echo "$ac_file"|sed 's%[^:]*:%%'`
- ac_file=`echo "$ac_file"|sed 's%:.*%%'` ;;
- *) ac_file_in="${ac_file}.in" ;;
- esac
-
- echo creating $ac_file
-
- rm -f conftest.frag conftest.in conftest.out
- ac_file_inputs=`echo $ac_file_in|sed -e "s%^%$ac_given_srcdir/%" -e "s%:% $ac_given_srcdir/%g"`
- cat $ac_file_inputs > conftest.in
-
-EOF
-
-# Transform confdefs.h into a sed script conftest.vals that substitutes
-# the proper values into config.h.in to produce config.h. And first:
-# Protect against being on the right side of a sed subst in config.status.
-# Protect against being in an unquoted here document in config.status.
-rm -f conftest.vals
-cat > conftest.hdr <<\EOF
-s/[\\&%]/\\&/g
-s%[\\$`]%\\&%g
-s%#define \([A-Za-z_][A-Za-z0-9_]*\) *\(.*\)%${ac_dA}\1${ac_dB}\1${ac_dC}\2${ac_dD}%gp
-s%ac_d%ac_u%gp
-s%ac_u%ac_e%gp
-EOF
-sed -n -f conftest.hdr confdefs.h > conftest.vals
-rm -f conftest.hdr
-
-# This sed command replaces #undef with comments. This is necessary, for
-# example, in the case of _POSIX_SOURCE, which is predefined and required
-# on some systems where configure will not decide to define it.
-cat >> conftest.vals <<\EOF
-s%^[ ]*#[ ]*undef[ ][ ]*[a-zA-Z_][a-zA-Z_0-9]*%/* & */%
-EOF
-
-# Break up conftest.vals because some shells have a limit on
-# the size of here documents, and old seds have small limits too.
-
-rm -f conftest.tail
-while :
-do
- ac_lines=`grep -c . conftest.vals`
- # grep -c gives empty output for an empty file on some AIX systems.
- if test -z "$ac_lines" || test "$ac_lines" -eq 0; then break; fi
- # Write a limited-size here document to conftest.frag.
- echo ' cat > conftest.frag <<CEOF' >> $CONFIG_STATUS
- sed ${ac_max_here_lines}q conftest.vals >> $CONFIG_STATUS
- echo 'CEOF
- sed -f conftest.frag conftest.in > conftest.out
- rm -f conftest.in
- mv conftest.out conftest.in
-' >> $CONFIG_STATUS
- sed 1,${ac_max_here_lines}d conftest.vals > conftest.tail
- rm -f conftest.vals
- mv conftest.tail conftest.vals
-done
-rm -f conftest.vals
-
-cat >> $CONFIG_STATUS <<\EOF
- rm -f conftest.frag conftest.h
- echo "/* $ac_file. Generated automatically by configure. */" > conftest.h
- cat conftest.in >> conftest.h
- rm -f conftest.in
- if cmp -s $ac_file conftest.h 2>/dev/null; then
- echo "$ac_file is unchanged"
- rm -f conftest.h
- else
- # Remove last slash and all that follows it. Not all systems have dirname.
- ac_dir=`echo $ac_file|sed 's%/[^/][^/]*$%%'`
- if test "$ac_dir" != "$ac_file" && test "$ac_dir" != .; then
- # The file is in a subdirectory.
- test ! -d "$ac_dir" && mkdir "$ac_dir"
- fi
- rm -f $ac_file
- mv conftest.h $ac_file
- fi
-fi; done
-
-EOF
-
-cat >> $CONFIG_STATUS <<EOF
-ac_sources="$sim_link_files"
-ac_dests="$sim_link_links"
-EOF
-
-cat >> $CONFIG_STATUS <<\EOF
-srcdir=$ac_given_srcdir
-while test -n "$ac_sources"; do
- set $ac_dests; ac_dest=$1; shift; ac_dests=$*
- set $ac_sources; ac_source=$1; shift; ac_sources=$*
-
- echo "linking $srcdir/$ac_source to $ac_dest"
-
- if test ! -r $srcdir/$ac_source; then
- { echo "configure: error: $srcdir/$ac_source: File not found" 1>&2; exit 1; }
- fi
- rm -f $ac_dest
-
- # Make relative symlinks.
- # Remove last slash and all that follows it. Not all systems have dirname.
- ac_dest_dir=`echo $ac_dest|sed 's%/[^/][^/]*$%%'`
- if test "$ac_dest_dir" != "$ac_dest" && test "$ac_dest_dir" != .; then
- # The dest file is in a subdirectory.
- test ! -d "$ac_dest_dir" && mkdir "$ac_dest_dir"
- ac_dest_dir_suffix="/`echo $ac_dest_dir|sed 's%^\./%%'`"
- # A "../" for each directory in $ac_dest_dir_suffix.
- ac_dots=`echo $ac_dest_dir_suffix|sed 's%/[^/]*%../%g'`
- else
- ac_dest_dir_suffix= ac_dots=
- fi
-
- case "$srcdir" in
- [/$]*) ac_rel_source="$srcdir/$ac_source" ;;
- *) ac_rel_source="$ac_dots$srcdir/$ac_source" ;;
- esac
-
- # Make a symlink if possible; otherwise try a hard link.
- if ln -s $ac_rel_source $ac_dest 2>/dev/null ||
- ln $srcdir/$ac_source $ac_dest; then :
- else
- { echo "configure: error: can not link $ac_dest to $srcdir/$ac_source" 1>&2; exit 1; }
- fi
-done
-EOF
-cat >> $CONFIG_STATUS <<EOF
-
-EOF
-cat >> $CONFIG_STATUS <<\EOF
-case "x$CONFIG_FILES" in
- xMakefile*)
- echo "Merging Makefile.sim+Make-common.sim into Makefile ..."
- rm -f Makesim1.tmp Makesim2.tmp Makefile
- sed -n -e '/^## COMMON_PRE_/,/^## End COMMON_PRE_/ p' <Make-common.sim >Makesim1.tmp
- sed -n -e '/^## COMMON_POST_/,/^## End COMMON_POST_/ p' <Make-common.sim >Makesim2.tmp
- sed -e '/^## COMMON_PRE_/ r Makesim1.tmp' \
- -e '/^## COMMON_POST_/ r Makesim2.tmp' \
- <Makefile.sim >Makefile
- rm -f Makefile.sim Make-common.sim Makesim1.tmp Makesim2.tmp
- ;;
- esac
- case "x$CONFIG_HEADERS" in xconfig.h:config.in) echo > stamp-h ;; esac
-
-exit 0
-EOF
-chmod +x $CONFIG_STATUS
-rm -fr confdefs* $ac_clean_files
-test "$no_create" = yes || ${CONFIG_SHELL-/bin/sh} $CONFIG_STATUS || exit 1
-
-
diff --git a/sim/z8k/configure.in b/sim/z8k/configure.in
deleted file mode 100644
index e96fc7d0e52..00000000000
--- a/sim/z8k/configure.in
+++ /dev/null
@@ -1,10 +0,0 @@
-dnl Process this file with autoconf to produce a configure script.
-sinclude(../common/aclocal.m4)
-AC_PREREQ(2.5)dnl
-AC_INIT(Makefile.in)
-
-SIM_AC_COMMON
-
-AC_CHECK_HEADERS(string.h strings.h stdlib.h time.h sys/times.h)
-
-SIM_AC_OUTPUT
diff --git a/sim/z8k/iface.c b/sim/z8k/iface.c
deleted file mode 100644
index 1b3883ef545..00000000000
--- a/sim/z8k/iface.c
+++ /dev/null
@@ -1,263 +0,0 @@
-/* gdb->simulator interface.
- Copyright (C) 1992, 1993, 1994, 1997 Free Software Foundation, Inc.
-
-This file is part of Z8KSIM
-
-Z8KSIM is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-Z8KSIM is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License
-along with Z8KZIM; if not, write to the Free Software
-Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
-
-#include "ansidecl.h"
-#include "sim.h"
-#include "tm.h"
-#include "signal.h"
-#include "bfd.h"
-#include "callback.h"
-#include "remote-sim.h"
-
-#ifndef NULL
-#define NULL 0
-#endif
-
-host_callback *z8k_callback;
-
-static SIM_OPEN_KIND sim_kind;
-static char *myname;
-
-void
-sim_size (n)
- int n;
-{
- /* Size is fixed. */
-}
-
-int
-sim_store_register (sd, regno, value, length)
- SIM_DESC sd;
- int regno;
- unsigned char *value;
- int length;
-{
- /* FIXME: Review the computation of regval. */
- int regval = (value[0] << 24) | (value[1] << 16) | (value[2] << 8) | value[3];
-
- tm_store_register (regno, regval);
- return -1;
-}
-
-int
-sim_fetch_register (sd, regno, buf, length)
- SIM_DESC sd;
- int regno;
- unsigned char *buf;
- int length;
-{
- tm_fetch_register (regno, buf);
- return -1;
-}
-
-int
-sim_write (sd, where, what, howmuch)
- SIM_DESC sd;
- SIM_ADDR where;
- unsigned char *what;
- int howmuch;
-{
- int i;
-
- for (i = 0; i < howmuch; i++)
- tm_write_byte (where + i, what[i]);
- return howmuch;
-}
-
-int
-sim_read (sd, where, what, howmuch)
- SIM_DESC sd;
- SIM_ADDR where;
- unsigned char *what;
- int howmuch;
-{
- int i;
-
- for (i = 0; i < howmuch; i++)
- what[i] = tm_read_byte (where + i);
- return howmuch;
-}
-
-static void
-control_c (sig, code, scp, addr)
- int sig;
- int code;
- char *scp;
- char *addr;
-{
- tm_exception (SIM_INTERRUPT);
-}
-
-int
-sim_stop (sd)
- SIM_DESC sd;
-{
- tm_exception (SIM_INTERRUPT);
- return 1;
-}
-
-void
-sim_resume (sd, step, sig)
- SIM_DESC sd;
- int step;
- int sig;
-{
- void (*prev) ();
-
- prev = signal (SIGINT, control_c);
- tm_resume (step);
- signal (SIGINT, prev);
-}
-
-void
-sim_stop_reason (sd, reason, sigrc)
- SIM_DESC sd;
- enum sim_stop *reason;
- int *sigrc;
-{
- switch (tm_signal ())
- {
- case SIM_DIV_ZERO:
- *sigrc = SIGFPE;
- break;
- case SIM_INTERRUPT:
- *sigrc = SIGINT;
- break;
- case SIM_BAD_INST:
- *sigrc = SIGILL;
- break;
- case SIM_BREAKPOINT:
- *sigrc = SIGTRAP;
- break;
- case SIM_SINGLE_STEP:
- *sigrc = SIGTRAP;
- break;
- case SIM_BAD_SYSCALL:
- *sigrc = SIGILL;
- break;
- case SIM_BAD_ALIGN:
- *sigrc = SIGSEGV;
- break;
- case SIM_DONE:
- {
- sim_state_type x;
- tm_state (&x);
- *sigrc = x.regs[2].word & 255;
- *reason = sim_exited;
- return;
- }
- default:
- abort ();
- }
- *reason = sim_stopped;
-}
-
-void
-sim_info (sd, verbose)
- SIM_DESC sd;
- int verbose;
-{
- sim_state_type x;
-
- tm_state (&x);
- tm_info_print (&x);
-}
-
-SIM_DESC
-sim_open (kind, cb, abfd, argv)
- SIM_OPEN_KIND kind;
- host_callback *cb;
- struct _bfd *abfd;
- char **argv;
-{
- /* FIXME: The code in sim_load that determines the exact z8k arch
- should be moved to here */
-
- sim_kind = kind;
- myname = argv[0];
- z8k_callback = cb;
-
- /* fudge our descriptor for now */
- return (SIM_DESC) 1;
-}
-
-void
-sim_close (sd, quitting)
- SIM_DESC sd;
- int quitting;
-{
- /* nothing to do */
-}
-
-SIM_RC
-sim_load (sd, prog, abfd, from_tty)
- SIM_DESC sd;
- char *prog;
- bfd *abfd;
- int from_tty;
-{
- extern bfd *sim_load_file (); /* ??? Don't know where this should live. */
- bfd *prog_bfd;
-
- /* FIXME: The code determining the type of z9k processor should be
- moved from here to sim_open. */
-
- prog_bfd = sim_load_file (sd, myname, z8k_callback, prog, abfd,
- sim_kind == SIM_OPEN_DEBUG,
- 0, sim_write);
- if (prog_bfd == NULL)
- return SIM_RC_FAIL;
- if (bfd_get_mach (prog_bfd) == bfd_mach_z8001)
- {
- extern int sim_z8001_mode;
- sim_z8001_mode = 1;
- }
- /* Close the bfd if we opened it. */
- if (abfd == NULL)
- bfd_close (prog_bfd);
- return SIM_RC_OK;
-}
-
-SIM_RC
-sim_create_inferior (sd, abfd, argv, env)
- SIM_DESC sd;
- struct _bfd *abfd;
- char **argv;
- char **env;
-{
- if (abfd != NULL)
- tm_store_register (REG_PC, bfd_get_start_address (abfd));
- else
- tm_store_register (REG_PC, 0);
- return SIM_RC_OK;
-}
-
-void
-sim_do_command (sd, cmd)
- SIM_DESC sd;
- char *cmd;
-{
-}
-
-void
-sim_set_callbacks (ptr)
- host_callback *ptr;
-{
- z8k_callback = ptr;
-}
diff --git a/sim/z8k/inlines.h b/sim/z8k/inlines.h
deleted file mode 100644
index 1bf209ece49..00000000000
--- a/sim/z8k/inlines.h
+++ /dev/null
@@ -1,486 +0,0 @@
-/* inline functions for Z8KSIM
- Copyright (C) 1992, 1993 Free Software Foundation, Inc.
-
-This file is part of Z8KSIM
-
-GNU CC is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-GNU CC is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License
-along with Z8KZIM; if not, write to the Free Software
-Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
-
-#ifndef INLINE
-#define INLINE
-#endif
-#define UGT 0x0b
-#define ULE 0x03
-#define ULT 0x07
-#define UGE 0x0f
-#define SLOW 0
-#define T 0x8
-#define F 0x0
-#define LT 0x1
-#define GT 0xa
-#define LE 0x2
-#define EQ 0x6
-#define NE 0xe
-#define GE 0x9
-
- static int is_cond_true PARAMS((sim_state_type *context, int c));
- static void makeflags PARAMS((sim_state_type *context, int mask));
-
-static INLINE
-long
-sitoptr (si)
-long si;
-{
- return ((si & 0xff000000) >> 8) | (si & 0xffff);
-}
-static INLINE long
-ptrtosi (ptr)
-long ptr;
-{
- return ((ptr & 0xff0000) << 8) | (ptr & 0xffff);
-}
-
-static INLINE
-void
-put_long_reg (context, reg, val)
- sim_state_type *context;
- int reg;
- int val;
-{
- context->regs[reg].word = val >> 16;
- context->regs[reg + 1].word = val;
-}
-
-static INLINE
-void
-put_quad_reg (context, reg, val1, val2)
- sim_state_type *context;
- int reg;
- int val1;
- int val2;
-{
- context->regs[reg].word = val2 >> 16;
- context->regs[reg + 1].word = val2;
- context->regs[reg + 2].word = val1 >> 16;
- context->regs[reg + 3].word = val1;
-}
-
-static INLINE
-void
-put_word_reg (context, reg, val)
- sim_state_type *context;
- int reg;
- int val;
-{
- context->regs[reg].word = val;
-}
-
-static INLINE
-SItype get_long_reg (context, reg)
- sim_state_type *context;
- int reg;
-{
- USItype lsw = context->regs[reg + 1].word;
- USItype msw = context->regs[reg].word;
-
- return (msw << 16) | lsw;
-}
-
-#ifdef __GNUC__
-static INLINE
-struct UDIstruct
-get_quad_reg (context, reg)
- sim_state_type *context;
- int reg;
-{
- UDItype res;
- USItype lsw = get_long_reg (context, reg + 2);
- USItype msw = get_long_reg (context, reg);
-
- res.low = lsw;
- res.high = msw;
- return res;
-}
-
-#endif
-
-static INLINE void
-put_byte_mem_da (context, addr, value)
- sim_state_type *context;
- int addr;
- int value;
-{
- ((unsigned char *) (context->memory))[addr] = value;
-}
-
-static INLINE
-void
-put_byte_reg (context, reg, val)
- sim_state_type *context;
- int reg;
- int val;
-{
- int old = context->regs[reg & 0x7].word;
- if (reg & 0x8)
- {
- old = old & 0xff00 | (val & 0xff);
- }
- else
- {
- old = old & 0x00ff | (val << 8);
- }
- context->regs[reg & 0x7].word = old;
-}
-
-static INLINE
-int
-get_byte_reg (context, reg)
- sim_state_type *context;
- int reg;
-{
- if (reg & 0x8)
- return context->regs[reg & 0x7].word & 0xff;
- else
- return (context->regs[reg & 0x7].word >> 8) & 0xff;
-}
-
-static INLINE
-void
-put_word_mem_da (context, addr, value)
- sim_state_type *context;
- int addr;
- int value;
-{
- if (addr & 1)
- {
- context->exception = SIM_BAD_ALIGN;
- addr &= ~1;
- }
- put_byte_mem_da(context, addr, value>>8);
- put_byte_mem_da(context, addr+1, value);
-}
-
-static INLINE unsigned char
-get_byte_mem_da (context, addr)
- sim_state_type *context;
- int addr;
-{
- return ((unsigned char *) (context->memory))[addr];
-}
-
-
-#if 0
-#define get_word_mem_da(context,addr)\
- *((unsigned short*)((char*)((context)->memory)+(addr)))
-
-#else
-#define get_word_mem_da(context,addr) (get_byte_mem_da(context, addr) << 8) | (get_byte_mem_da(context,addr+1))
-#endif
-
-#define get_word_reg(context,reg) (context)->regs[reg].word
-
-static INLINE
-SItype
-get_long_mem_da (context, addr)
- sim_state_type *context;
- int addr;
-{
- USItype lsw = get_word_mem_da(context,addr+2);
- USItype msw = get_word_mem_da(context, addr);
-
- return (msw << 16) + lsw;
-}
-
-static INLINE
-void
-put_long_mem_da (context, addr, value)
- sim_state_type *context;
- int addr;
- int value;
-{
- put_word_mem_da(context,addr, value>>16);
- put_word_mem_da(context,addr+2, value);
-}
-
-static INLINE
-int
-get_word_mem_ir (context, reg)
- sim_state_type *context;
- int reg;
-{
- return get_word_mem_da (context, get_word_reg (context, reg));
-}
-
-static INLINE
-void
-put_word_mem_ir (context, reg, value)
- sim_state_type *context;
- int reg;
- int value;
-{
-
- put_word_mem_da (context, get_word_reg (context, reg), value);
-}
-
-static INLINE
-int
-get_byte_mem_ir (context, reg)
- sim_state_type *context;
- int reg;
-{
- return get_byte_mem_da (context, get_word_reg (context, reg));
-}
-
-static INLINE
-void
-put_byte_mem_ir (context, reg, value)
- sim_state_type *context;
- int reg;
- int value;
-{
- put_byte_mem_da (context, get_word_reg (context, reg), value);
-}
-
-static INLINE
-int
-get_long_mem_ir (context, reg)
- sim_state_type *context;
- int reg;
-{
- return get_long_mem_da (context, get_word_reg (context, reg));
-}
-
-static INLINE
-void
-put_long_mem_ir (context, reg, value)
- sim_state_type *context;
- int reg;
- int value;
-{
-
- put_long_mem_da (context, get_word_reg (context, reg), value);
-}
-
-static INLINE
-void
-put_long_mem_x (context, base, reg, value)
- sim_state_type *context;
- int base;
- int reg;
- int value;
-{
- put_long_mem_da (context, get_word_reg (context, reg) + base, value);
-}
-
-static INLINE
-void
-put_word_mem_x (context, base, reg, value)
- sim_state_type *context;
- int base;
- int reg;
- int value;
-{
- put_word_mem_da (context, get_word_reg (context, reg) + base, value);
-}
-
-static INLINE
-void
-put_byte_mem_x (context, base, reg, value)
- sim_state_type *context;
- int base;
- int reg;
- int value;
-{
- put_byte_mem_da (context, get_word_reg (context, reg) + base, value);
-}
-
-static INLINE
-int
-get_word_mem_x (context, base, reg)
- sim_state_type *context;
- int base;
- int reg;
-{
- return get_word_mem_da (context, base + get_word_reg (context, reg));
-}
-
-static INLINE
-int
-get_byte_mem_x (context, base, reg)
- sim_state_type *context;
- int base;
- int reg;
-{
- return get_byte_mem_da (context, base + get_word_reg (context, reg));
-}
-
-static INLINE
-int
-get_long_mem_x (context, base, reg)
- sim_state_type *context;
- int base;
- int reg;
-{
- return get_long_mem_da (context, base + get_word_reg (context, reg));
-}
-
-
-static
-void
-makeflags (context, mask)
- sim_state_type *context;
- int mask;
-{
-
- PSW_ZERO = (context->dst & mask) == 0;
- PSW_SIGN = (context->dst >> (context->size - 1));
-
- if (context->broken_flags == TST_FLAGS)
- {
- extern char the_parity[];
-
- if (context->size == 8)
- {
- PSW_OVERFLOW = the_parity[context->dst & 0xff];
- }
- }
- else
- {
- /* Overflow is set if both operands have the same sign and the
- result is of different sign.
-
- V = A==B && R!=B jumping logic
- (~(A^B))&(R^B)
- V = (A^B)^(R^B) boolean
- */
-
- PSW_OVERFLOW =
- ((
- (~(context->srca ^ context->srcb)
- & (context->srca ^ context->dst))
- ) >> (context->size - 1)
- );
-
- if (context->size < 32)
- {
- PSW_CARRY = ((context->dst >> context->size)) & 1;
- }
- else
- {
- /* carry is set when the result is smaller than a source */
-
-
- PSW_CARRY = (unsigned) context->dst > (unsigned) context->srca ;
-
- }
- }
- context->broken_flags = 0;
-}
-
-
-/* There are two ways to calculate the flags. We can
- either always calculate them and so the cc will always
- be correct, or we can only keep the arguments around and
- calc the flags when they're actually going to be used. */
-
-/* Right now we always calc the flags - I think it may be faster*/
-
-
-#define NORMAL_FLAGS(c,s,d,sa,sb,sub) \
- if (s == 8) \
- normal_flags_8(c,d,sa,sb,sub); \
- else if (s == 16) \
- normal_flags_16(c,d,sa,sb,sub); \
- else if (s == 32) \
- normal_flags_32(c,d,sa,sb,sub);
-
-static INLINE
-void
-normal_flags (context, size, dst, srca, srcb)
- sim_state_type *context;
- int size;
- int dst;
- int srca;
- int srcb;
-{
- context->srca = srca;
- context->srcb = srcb;
- context->dst = dst;
- context->size = size;
- context->broken_flags = CMP_FLAGS;
-}
-
-static INLINE
-void
-TEST_NORMAL_FLAGS (context, size, dst)
- sim_state_type *context;
- int size;
- int dst;
-{
- context->dst = dst;
- context->size = size;
- context->broken_flags = TST_FLAGS;
-}
-
-static INLINE
-void
-put_ptr_long_reg (context, reg, val)
- sim_state_type *context;
- int reg;
- int val;
-{
- context->regs[reg].word = (val >> 8) & 0x7f00;
- context->regs[reg + 1].word = val;
-}
-
-static INLINE
-long
-get_ptr_long_reg (context, reg)
- sim_state_type *context;
- int reg;
-{
- int val;
-
- val = (context->regs[reg].word << 8) | context->regs[reg + 1].word;
- return val;
-}
-
-static INLINE
-long
-get_ptr_long_mem_ir (context, reg)
-sim_state_type *context;
-int reg;
-{
- return sitoptr (get_long_mem_da (context, get_ptr_long_reg (context, reg)));
-}
-
-static INLINE
-long
-get_ptr_long_mem_da (context, addr)
-sim_state_type *context;
-long addr;
-{
- return sitoptr (get_long_mem_da (context, addr));
-}
-
-static INLINE
-void
-put_ptr_long_mem_da (context, addr, ptr)
-sim_state_type *context;
-long addr;
-long ptr;
-{
- put_long_mem_da (context, addr, ptrtosi (ptr));
-
-}
diff --git a/sim/z8k/list.c b/sim/z8k/list.c
deleted file mode 100644
index 40de7601c47..00000000000
--- a/sim/z8k/list.c
+++ /dev/null
@@ -1,11266 +0,0 @@
-short int z8k_inv_list[] = {
-
-10
-#ifdef __GNUC__
-};
-short int int_list0[] = {
-#else
-,
-#endif
-10,10,10,10,10,10,10,10,10,10,10,10,10,10,10,
-7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,
-7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,
-7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,
-7
-#ifdef __GNUC__
-};
-short int int_list64[] = {
-#else
-,
-#endif
-7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,
-7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,
-7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,
-7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,
-7
-#ifdef __GNUC__
-};
-short int int_list128[] = {
-#else
-,
-#endif
-7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,
-7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,
-7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,
-7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,
-7
-#ifdef __GNUC__
-};
-short int int_list192[] = {
-#else
-,
-#endif
-7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,
-7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,
-7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,
-7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,
-5
-#ifdef __GNUC__
-};
-short int int_list256[] = {
-#else
-,
-#endif
-5,5,5,5,5,5,5,5,5,5,5,5,5,5,5,
-2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,
-2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,
-2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,
-2
-#ifdef __GNUC__
-};
-short int int_list320[] = {
-#else
-,
-#endif
-2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,
-2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,
-2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,
-2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,
-2
-#ifdef __GNUC__
-};
-short int int_list384[] = {
-#else
-,
-#endif
-2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,
-2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,
-2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,
-2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,
-2
-#ifdef __GNUC__
-};
-short int int_list448[] = {
-#else
-,
-#endif
-2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,
-2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,
-2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,
-2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,
-370
-#ifdef __GNUC__
-};
-short int int_list512[] = {
-#else
-,
-#endif
-370,370,370,370,370,370,370,370,370,370,370,370,370,370,370,
-367,367,367,367,367,367,367,367,367,367,367,367,367,367,367,367,
-367,367,367,367,367,367,367,367,367,367,367,367,367,367,367,367,
-367,367,367,367,367,367,367,367,367,367,367,367,367,367,367,367,
-367
-#ifdef __GNUC__
-};
-short int int_list576[] = {
-#else
-,
-#endif
-367,367,367,367,367,367,367,367,367,367,367,367,367,367,367,
-367,367,367,367,367,367,367,367,367,367,367,367,367,367,367,367,
-367,367,367,367,367,367,367,367,367,367,367,367,367,367,367,367,
-367,367,367,367,367,367,367,367,367,367,367,367,367,367,367,367,
-367
-#ifdef __GNUC__
-};
-short int int_list640[] = {
-#else
-,
-#endif
-367,367,367,367,367,367,367,367,367,367,367,367,367,367,367,
-367,367,367,367,367,367,367,367,367,367,367,367,367,367,367,367,
-367,367,367,367,367,367,367,367,367,367,367,367,367,367,367,367,
-367,367,367,367,367,367,367,367,367,367,367,367,367,367,367,367,
-367
-#ifdef __GNUC__
-};
-short int int_list704[] = {
-#else
-,
-#endif
-367,367,367,367,367,367,367,367,367,367,367,367,367,367,367,
-367,367,367,367,367,367,367,367,367,367,367,367,367,367,367,367,
-367,367,367,367,367,367,367,367,367,367,367,367,367,367,367,367,
-367,367,367,367,367,367,367,367,367,367,367,367,367,367,367,367,
-365
-#ifdef __GNUC__
-};
-short int int_list768[] = {
-#else
-,
-#endif
-365,365,365,365,365,365,365,365,365,365,365,365,365,365,365,
-362,362,362,362,362,362,362,362,362,362,362,362,362,362,362,362,
-362,362,362,362,362,362,362,362,362,362,362,362,362,362,362,362,
-362,362,362,362,362,362,362,362,362,362,362,362,362,362,362,362,
-362
-#ifdef __GNUC__
-};
-short int int_list832[] = {
-#else
-,
-#endif
-362,362,362,362,362,362,362,362,362,362,362,362,362,362,362,
-362,362,362,362,362,362,362,362,362,362,362,362,362,362,362,362,
-362,362,362,362,362,362,362,362,362,362,362,362,362,362,362,362,
-362,362,362,362,362,362,362,362,362,362,362,362,362,362,362,362,
-362
-#ifdef __GNUC__
-};
-short int int_list896[] = {
-#else
-,
-#endif
-362,362,362,362,362,362,362,362,362,362,362,362,362,362,362,
-362,362,362,362,362,362,362,362,362,362,362,362,362,362,362,362,
-362,362,362,362,362,362,362,362,362,362,362,362,362,362,362,362,
-362,362,362,362,362,362,362,362,362,362,362,362,362,362,362,362,
-362
-#ifdef __GNUC__
-};
-short int int_list960[] = {
-#else
-,
-#endif
-362,362,362,362,362,362,362,362,362,362,362,362,362,362,362,
-362,362,362,362,362,362,362,362,362,362,362,362,362,362,362,362,
-362,362,362,362,362,362,362,362,362,362,362,362,362,362,362,362,
-362,362,362,362,362,362,362,362,362,362,362,362,362,362,362,362,
-260
-#ifdef __GNUC__
-};
-short int int_list1024[] = {
-#else
-,
-#endif
-260,260,260,260,260,260,260,260,260,260,260,260,260,260,260,
-257,257,257,257,257,257,257,257,257,257,257,257,257,257,257,257,
-257,257,257,257,257,257,257,257,257,257,257,257,257,257,257,257,
-257,257,257,257,257,257,257,257,257,257,257,257,257,257,257,257,
-257
-#ifdef __GNUC__
-};
-short int int_list1088[] = {
-#else
-,
-#endif
-257,257,257,257,257,257,257,257,257,257,257,257,257,257,257,
-257,257,257,257,257,257,257,257,257,257,257,257,257,257,257,257,
-257,257,257,257,257,257,257,257,257,257,257,257,257,257,257,257,
-257,257,257,257,257,257,257,257,257,257,257,257,257,257,257,257,
-257
-#ifdef __GNUC__
-};
-short int int_list1152[] = {
-#else
-,
-#endif
-257,257,257,257,257,257,257,257,257,257,257,257,257,257,257,
-257,257,257,257,257,257,257,257,257,257,257,257,257,257,257,257,
-257,257,257,257,257,257,257,257,257,257,257,257,257,257,257,257,
-257,257,257,257,257,257,257,257,257,257,257,257,257,257,257,257,
-257
-#ifdef __GNUC__
-};
-short int int_list1216[] = {
-#else
-,
-#endif
-257,257,257,257,257,257,257,257,257,257,257,257,257,257,257,
-257,257,257,257,257,257,257,257,257,257,257,257,257,257,257,257,
-257,257,257,257,257,257,257,257,257,257,257,257,257,257,257,257,
-257,257,257,257,257,257,257,257,257,257,257,257,257,257,257,257,
-255
-#ifdef __GNUC__
-};
-short int int_list1280[] = {
-#else
-,
-#endif
-255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,
-252,252,252,252,252,252,252,252,252,252,252,252,252,252,252,252,
-252,252,252,252,252,252,252,252,252,252,252,252,252,252,252,252,
-252,252,252,252,252,252,252,252,252,252,252,252,252,252,252,252,
-252
-#ifdef __GNUC__
-};
-short int int_list1344[] = {
-#else
-,
-#endif
-252,252,252,252,252,252,252,252,252,252,252,252,252,252,252,
-252,252,252,252,252,252,252,252,252,252,252,252,252,252,252,252,
-252,252,252,252,252,252,252,252,252,252,252,252,252,252,252,252,
-252,252,252,252,252,252,252,252,252,252,252,252,252,252,252,252,
-252
-#ifdef __GNUC__
-};
-short int int_list1408[] = {
-#else
-,
-#endif
-252,252,252,252,252,252,252,252,252,252,252,252,252,252,252,
-252,252,252,252,252,252,252,252,252,252,252,252,252,252,252,252,
-252,252,252,252,252,252,252,252,252,252,252,252,252,252,252,252,
-252,252,252,252,252,252,252,252,252,252,252,252,252,252,252,252,
-252
-#ifdef __GNUC__
-};
-short int int_list1472[] = {
-#else
-,
-#endif
-252,252,252,252,252,252,252,252,252,252,252,252,252,252,252,
-252,252,252,252,252,252,252,252,252,252,252,252,252,252,252,252,
-252,252,252,252,252,252,252,252,252,252,252,252,252,252,252,252,
-252,252,252,252,252,252,252,252,252,252,252,252,252,252,252,252,
-25
-#ifdef __GNUC__
-};
-short int int_list1536[] = {
-#else
-,
-#endif
-25,25,25,25,25,25,25,25,25,25,25,25,25,25,25,
-22,22,22,22,22,22,22,22,22,22,22,22,22,22,22,22,
-22,22,22,22,22,22,22,22,22,22,22,22,22,22,22,22,
-22,22,22,22,22,22,22,22,22,22,22,22,22,22,22,22,
-22
-#ifdef __GNUC__
-};
-short int int_list1600[] = {
-#else
-,
-#endif
-22,22,22,22,22,22,22,22,22,22,22,22,22,22,22,
-22,22,22,22,22,22,22,22,22,22,22,22,22,22,22,22,
-22,22,22,22,22,22,22,22,22,22,22,22,22,22,22,22,
-22,22,22,22,22,22,22,22,22,22,22,22,22,22,22,22,
-22
-#ifdef __GNUC__
-};
-short int int_list1664[] = {
-#else
-,
-#endif
-22,22,22,22,22,22,22,22,22,22,22,22,22,22,22,
-22,22,22,22,22,22,22,22,22,22,22,22,22,22,22,22,
-22,22,22,22,22,22,22,22,22,22,22,22,22,22,22,22,
-22,22,22,22,22,22,22,22,22,22,22,22,22,22,22,22,
-22
-#ifdef __GNUC__
-};
-short int int_list1728[] = {
-#else
-,
-#endif
-22,22,22,22,22,22,22,22,22,22,22,22,22,22,22,
-22,22,22,22,22,22,22,22,22,22,22,22,22,22,22,22,
-22,22,22,22,22,22,22,22,22,22,22,22,22,22,22,22,
-22,22,22,22,22,22,22,22,22,22,22,22,22,22,22,22,
-20
-#ifdef __GNUC__
-};
-short int int_list1792[] = {
-#else
-,
-#endif
-20,20,20,20,20,20,20,20,20,20,20,20,20,20,20,
-17,17,17,17,17,17,17,17,17,17,17,17,17,17,17,17,
-17,17,17,17,17,17,17,17,17,17,17,17,17,17,17,17,
-17,17,17,17,17,17,17,17,17,17,17,17,17,17,17,17,
-17
-#ifdef __GNUC__
-};
-short int int_list1856[] = {
-#else
-,
-#endif
-17,17,17,17,17,17,17,17,17,17,17,17,17,17,17,
-17,17,17,17,17,17,17,17,17,17,17,17,17,17,17,17,
-17,17,17,17,17,17,17,17,17,17,17,17,17,17,17,17,
-17,17,17,17,17,17,17,17,17,17,17,17,17,17,17,17,
-17
-#ifdef __GNUC__
-};
-short int int_list1920[] = {
-#else
-,
-#endif
-17,17,17,17,17,17,17,17,17,17,17,17,17,17,17,
-17,17,17,17,17,17,17,17,17,17,17,17,17,17,17,17,
-17,17,17,17,17,17,17,17,17,17,17,17,17,17,17,17,
-17,17,17,17,17,17,17,17,17,17,17,17,17,17,17,17,
-17
-#ifdef __GNUC__
-};
-short int int_list1984[] = {
-#else
-,
-#endif
-17,17,17,17,17,17,17,17,17,17,17,17,17,17,17,
-17,17,17,17,17,17,17,17,17,17,17,17,17,17,17,17,
-17,17,17,17,17,17,17,17,17,17,17,17,17,17,17,17,
-17,17,17,17,17,17,17,17,17,17,17,17,17,17,17,17,
-415
-#ifdef __GNUC__
-};
-short int int_list2048[] = {
-#else
-,
-#endif
-415,415,415,415,415,415,415,415,415,415,415,415,415,415,415,
-412,412,412,412,412,412,412,412,412,412,412,412,412,412,412,412,
-412,412,412,412,412,412,412,412,412,412,412,412,412,412,412,412,
-412,412,412,412,412,412,412,412,412,412,412,412,412,412,412,412,
-412
-#ifdef __GNUC__
-};
-short int int_list2112[] = {
-#else
-,
-#endif
-412,412,412,412,412,412,412,412,412,412,412,412,412,412,412,
-412,412,412,412,412,412,412,412,412,412,412,412,412,412,412,412,
-412,412,412,412,412,412,412,412,412,412,412,412,412,412,412,412,
-412,412,412,412,412,412,412,412,412,412,412,412,412,412,412,412,
-412
-#ifdef __GNUC__
-};
-short int int_list2176[] = {
-#else
-,
-#endif
-412,412,412,412,412,412,412,412,412,412,412,412,412,412,412,
-412,412,412,412,412,412,412,412,412,412,412,412,412,412,412,412,
-412,412,412,412,412,412,412,412,412,412,412,412,412,412,412,412,
-412,412,412,412,412,412,412,412,412,412,412,412,412,412,412,412,
-412
-#ifdef __GNUC__
-};
-short int int_list2240[] = {
-#else
-,
-#endif
-412,412,412,412,412,412,412,412,412,412,412,412,412,412,412,
-412,412,412,412,412,412,412,412,412,412,412,412,412,412,412,412,
-412,412,412,412,412,412,412,412,412,412,412,412,412,412,412,412,
-412,412,412,412,412,412,412,412,412,412,412,412,412,412,412,412,
-410
-#ifdef __GNUC__
-};
-short int int_list2304[] = {
-#else
-,
-#endif
-410,410,410,410,410,410,410,410,410,410,410,410,410,410,410,
-407,407,407,407,407,407,407,407,407,407,407,407,407,407,407,407,
-407,407,407,407,407,407,407,407,407,407,407,407,407,407,407,407,
-407,407,407,407,407,407,407,407,407,407,407,407,407,407,407,407,
-407
-#ifdef __GNUC__
-};
-short int int_list2368[] = {
-#else
-,
-#endif
-407,407,407,407,407,407,407,407,407,407,407,407,407,407,407,
-407,407,407,407,407,407,407,407,407,407,407,407,407,407,407,407,
-407,407,407,407,407,407,407,407,407,407,407,407,407,407,407,407,
-407,407,407,407,407,407,407,407,407,407,407,407,407,407,407,407,
-407
-#ifdef __GNUC__
-};
-short int int_list2432[] = {
-#else
-,
-#endif
-407,407,407,407,407,407,407,407,407,407,407,407,407,407,407,
-407,407,407,407,407,407,407,407,407,407,407,407,407,407,407,407,
-407,407,407,407,407,407,407,407,407,407,407,407,407,407,407,407,
-407,407,407,407,407,407,407,407,407,407,407,407,407,407,407,407,
-407
-#ifdef __GNUC__
-};
-short int int_list2496[] = {
-#else
-,
-#endif
-407,407,407,407,407,407,407,407,407,407,407,407,407,407,407,
-407,407,407,407,407,407,407,407,407,407,407,407,407,407,407,407,
-407,407,407,407,407,407,407,407,407,407,407,407,407,407,407,407,
-407,407,407,407,407,407,407,407,407,407,407,407,407,407,407,407,
-73
-#ifdef __GNUC__
-};
-short int int_list2560[] = {
-#else
-,
-#endif
-73,73,73,73,73,73,73,73,73,73,73,73,73,73,73,
-70,70,70,70,70,70,70,70,70,70,70,70,70,70,70,70,
-70,70,70,70,70,70,70,70,70,70,70,70,70,70,70,70,
-70,70,70,70,70,70,70,70,70,70,70,70,70,70,70,70,
-70
-#ifdef __GNUC__
-};
-short int int_list2624[] = {
-#else
-,
-#endif
-70,70,70,70,70,70,70,70,70,70,70,70,70,70,70,
-70,70,70,70,70,70,70,70,70,70,70,70,70,70,70,70,
-70,70,70,70,70,70,70,70,70,70,70,70,70,70,70,70,
-70,70,70,70,70,70,70,70,70,70,70,70,70,70,70,70,
-70
-#ifdef __GNUC__
-};
-short int int_list2688[] = {
-#else
-,
-#endif
-70,70,70,70,70,70,70,70,70,70,70,70,70,70,70,
-70,70,70,70,70,70,70,70,70,70,70,70,70,70,70,70,
-70,70,70,70,70,70,70,70,70,70,70,70,70,70,70,70,
-70,70,70,70,70,70,70,70,70,70,70,70,70,70,70,70,
-70
-#ifdef __GNUC__
-};
-short int int_list2752[] = {
-#else
-,
-#endif
-70,70,70,70,70,70,70,70,70,70,70,70,70,70,70,
-70,70,70,70,70,70,70,70,70,70,70,70,70,70,70,70,
-70,70,70,70,70,70,70,70,70,70,70,70,70,70,70,70,
-70,70,70,70,70,70,70,70,70,70,70,70,70,70,70,70,
-65
-#ifdef __GNUC__
-};
-short int int_list2816[] = {
-#else
-,
-#endif
-65,65,65,65,65,65,65,65,65,65,65,65,65,65,65,
-62,62,62,62,62,62,62,62,62,62,62,62,62,62,62,62,
-62,62,62,62,62,62,62,62,62,62,62,62,62,62,62,62,
-62,62,62,62,62,62,62,62,62,62,62,62,62,62,62,62,
-62
-#ifdef __GNUC__
-};
-short int int_list2880[] = {
-#else
-,
-#endif
-62,62,62,62,62,62,62,62,62,62,62,62,62,62,62,
-62,62,62,62,62,62,62,62,62,62,62,62,62,62,62,62,
-62,62,62,62,62,62,62,62,62,62,62,62,62,62,62,62,
-62,62,62,62,62,62,62,62,62,62,62,62,62,62,62,62,
-62
-#ifdef __GNUC__
-};
-short int int_list2944[] = {
-#else
-,
-#endif
-62,62,62,62,62,62,62,62,62,62,62,62,62,62,62,
-62,62,62,62,62,62,62,62,62,62,62,62,62,62,62,62,
-62,62,62,62,62,62,62,62,62,62,62,62,62,62,62,62,
-62,62,62,62,62,62,62,62,62,62,62,62,62,62,62,62,
-62
-#ifdef __GNUC__
-};
-short int int_list3008[] = {
-#else
-,
-#endif
-62,62,62,62,62,62,62,62,62,62,62,62,62,62,62,
-62,62,62,62,62,62,62,62,62,62,62,62,62,62,62,62,
-62,62,62,62,62,62,62,62,62,62,62,62,62,62,62,62,
-62,62,62,62,62,62,62,62,62,62,62,62,62,62,62,62,
--1
-#ifdef __GNUC__
-};
-short int int_list3072[] = {
-#else
-,
-#endif
--1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
-54,67,247,-1,383,176,403,-1,46,-1,-1,-1,-1,-1,-1,-1,
-54,67,247,-1,383,176,403,-1,46,-1,-1,-1,-1,-1,-1,-1,
-54,67,247,-1,383,176,403,-1,46,-1,-1,-1,-1,-1,-1,-1,
-54
-#ifdef __GNUC__
-};
-short int int_list3136[] = {
-#else
-,
-#endif
-67,247,-1,383,176,403,-1,46,-1,-1,-1,-1,-1,-1,-1,
-54,67,247,-1,383,176,403,-1,46,-1,-1,-1,-1,-1,-1,-1,
-54,67,247,-1,383,176,403,-1,46,-1,-1,-1,-1,-1,-1,-1,
-54,67,247,-1,383,176,403,-1,46,-1,-1,-1,-1,-1,-1,-1,
-54
-#ifdef __GNUC__
-};
-short int int_list3200[] = {
-#else
-,
-#endif
-67,247,-1,383,176,403,-1,46,-1,-1,-1,-1,-1,-1,-1,
-54,67,247,-1,383,176,403,-1,46,-1,-1,-1,-1,-1,-1,-1,
-54,67,247,-1,383,176,403,-1,46,-1,-1,-1,-1,-1,-1,-1,
-54,67,247,-1,383,176,403,-1,46,-1,-1,-1,-1,-1,-1,-1,
-54
-#ifdef __GNUC__
-};
-short int int_list3264[] = {
-#else
-,
-#endif
-67,247,-1,383,176,403,-1,46,-1,-1,-1,-1,-1,-1,-1,
-54,67,247,-1,383,176,403,-1,46,-1,-1,-1,-1,-1,-1,-1,
-54,67,247,-1,383,176,403,-1,46,-1,-1,-1,-1,-1,-1,-1,
-54,67,247,-1,383,176,403,-1,46,-1,-1,-1,-1,-1,-1,-1,
--1
-#ifdef __GNUC__
-};
-short int int_list3328[] = {
-#else
-,
-#endif
--1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
-50,59,243,-1,379,156,399,-1,42,282,-1,-1,-1,-1,-1,-1,
-50,59,243,-1,379,156,399,-1,42,282,-1,-1,-1,-1,-1,-1,
-50,59,243,-1,379,156,399,-1,42,282,-1,-1,-1,-1,-1,-1,
-50
-#ifdef __GNUC__
-};
-short int int_list3392[] = {
-#else
-,
-#endif
-59,243,-1,379,156,399,-1,42,282,-1,-1,-1,-1,-1,-1,
-50,59,243,-1,379,156,399,-1,42,282,-1,-1,-1,-1,-1,-1,
-50,59,243,-1,379,156,399,-1,42,282,-1,-1,-1,-1,-1,-1,
-50,59,243,-1,379,156,399,-1,42,282,-1,-1,-1,-1,-1,-1,
-50
-#ifdef __GNUC__
-};
-short int int_list3456[] = {
-#else
-,
-#endif
-59,243,-1,379,156,399,-1,42,282,-1,-1,-1,-1,-1,-1,
-50,59,243,-1,379,156,399,-1,42,282,-1,-1,-1,-1,-1,-1,
-50,59,243,-1,379,156,399,-1,42,282,-1,-1,-1,-1,-1,-1,
-50,59,243,-1,379,156,399,-1,42,282,-1,-1,-1,-1,-1,-1,
-50
-#ifdef __GNUC__
-};
-short int int_list3520[] = {
-#else
-,
-#endif
-59,243,-1,379,156,399,-1,42,282,-1,-1,-1,-1,-1,-1,
-50,59,243,-1,379,156,399,-1,42,282,-1,-1,-1,-1,-1,-1,
-50,59,243,-1,379,156,399,-1,42,282,-1,-1,-1,-1,-1,-1,
-50,59,243,-1,379,156,399,-1,42,282,-1,-1,-1,-1,-1,-1,
-127
-#ifdef __GNUC__
-};
-short int int_list3584[] = {
-#else
-,
-#endif
-127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,
-127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,
-127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,
-127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,
-127
-#ifdef __GNUC__
-};
-short int int_list3648[] = {
-#else
-,
-#endif
-127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,
-127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,
-127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,
-127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,
-127
-#ifdef __GNUC__
-};
-short int int_list3712[] = {
-#else
-,
-#endif
-127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,
-127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,
-127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,
-127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,
-127
-#ifdef __GNUC__
-};
-short int int_list3776[] = {
-#else
-,
-#endif
-127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,
-127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,
-127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,
-127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,
-128
-#ifdef __GNUC__
-};
-short int int_list3840[] = {
-#else
-,
-#endif
-128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,
-128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,
-128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,
-128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,
-128
-#ifdef __GNUC__
-};
-short int int_list3904[] = {
-#else
-,
-#endif
-128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,
-128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,
-128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,
-128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,
-128
-#ifdef __GNUC__
-};
-short int int_list3968[] = {
-#else
-,
-#endif
-128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,
-128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,
-128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,
-128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,
-128
-#ifdef __GNUC__
-};
-short int int_list4032[] = {
-#else
-,
-#endif
-128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,
-128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,
-128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,
-128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,
-86
-#ifdef __GNUC__
-};
-short int int_list4096[] = {
-#else
-,
-#endif
-86,86,86,86,86,86,86,86,86,86,86,86,86,86,86,
-83,83,83,83,83,83,83,83,83,83,83,83,83,83,83,83,
-83,83,83,83,83,83,83,83,83,83,83,83,83,83,83,83,
-83,83,83,83,83,83,83,83,83,83,83,83,83,83,83,83,
-83
-#ifdef __GNUC__
-};
-short int int_list4160[] = {
-#else
-,
-#endif
-83,83,83,83,83,83,83,83,83,83,83,83,83,83,83,
-83,83,83,83,83,83,83,83,83,83,83,83,83,83,83,83,
-83,83,83,83,83,83,83,83,83,83,83,83,83,83,83,83,
-83,83,83,83,83,83,83,83,83,83,83,83,83,83,83,83,
-83
-#ifdef __GNUC__
-};
-short int int_list4224[] = {
-#else
-,
-#endif
-83,83,83,83,83,83,83,83,83,83,83,83,83,83,83,
-83,83,83,83,83,83,83,83,83,83,83,83,83,83,83,83,
-83,83,83,83,83,83,83,83,83,83,83,83,83,83,83,83,
-83,83,83,83,83,83,83,83,83,83,83,83,83,83,83,83,
-83
-#ifdef __GNUC__
-};
-short int int_list4288[] = {
-#else
-,
-#endif
-83,83,83,83,83,83,83,83,83,83,83,83,83,83,83,
-83,83,83,83,83,83,83,83,83,83,83,83,83,83,83,83,
-83,83,83,83,83,83,83,83,83,83,83,83,83,83,83,83,
-83,83,83,83,83,83,83,83,83,83,83,83,83,83,83,83,
--1
-#ifdef __GNUC__
-};
-short int int_list4352[] = {
-#else
-,
-#endif
--1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
--1,284,284,284,284,284,284,284,284,284,284,284,284,284,284,284,
--1,284,284,284,284,284,284,284,284,284,284,284,284,284,284,284,
--1,284,284,284,284,284,284,284,284,284,284,284,284,284,284,284,
--1
-#ifdef __GNUC__
-};
-short int int_list4416[] = {
-#else
-,
-#endif
-284,284,284,284,284,284,284,284,284,284,284,284,284,284,284,
--1,284,284,284,284,284,284,284,284,284,284,284,284,284,284,284,
--1,284,284,284,284,284,284,284,284,284,284,284,284,284,284,284,
--1,284,284,284,284,284,284,284,284,284,284,284,284,284,284,284,
--1
-#ifdef __GNUC__
-};
-short int int_list4480[] = {
-#else
-,
-#endif
-284,284,284,284,284,284,284,284,284,284,284,284,284,284,284,
--1,284,284,284,284,284,284,284,284,284,284,284,284,284,284,284,
--1,284,284,284,284,284,284,284,284,284,284,284,284,284,284,284,
--1,284,284,284,284,284,284,284,284,284,284,284,284,284,284,284,
--1
-#ifdef __GNUC__
-};
-short int int_list4544[] = {
-#else
-,
-#endif
-284,284,284,284,284,284,284,284,284,284,284,284,284,284,284,
--1,284,284,284,284,284,284,284,284,284,284,284,284,284,284,284,
--1,284,284,284,284,284,284,284,284,284,284,284,284,284,284,284,
--1,284,284,284,284,284,284,284,284,284,284,284,284,284,284,284,
-375
-#ifdef __GNUC__
-};
-short int int_list4608[] = {
-#else
-,
-#endif
-375,375,375,375,375,375,375,375,375,375,375,375,375,375,375,
-372,372,372,372,372,372,372,372,372,372,372,372,372,372,372,372,
-372,372,372,372,372,372,372,372,372,372,372,372,372,372,372,372,
-372,372,372,372,372,372,372,372,372,372,372,372,372,372,372,372,
-372
-#ifdef __GNUC__
-};
-short int int_list4672[] = {
-#else
-,
-#endif
-372,372,372,372,372,372,372,372,372,372,372,372,372,372,372,
-372,372,372,372,372,372,372,372,372,372,372,372,372,372,372,372,
-372,372,372,372,372,372,372,372,372,372,372,372,372,372,372,372,
-372,372,372,372,372,372,372,372,372,372,372,372,372,372,372,372,
-372
-#ifdef __GNUC__
-};
-short int int_list4736[] = {
-#else
-,
-#endif
-372,372,372,372,372,372,372,372,372,372,372,372,372,372,372,
-372,372,372,372,372,372,372,372,372,372,372,372,372,372,372,372,
-372,372,372,372,372,372,372,372,372,372,372,372,372,372,372,372,
-372,372,372,372,372,372,372,372,372,372,372,372,372,372,372,372,
-372
-#ifdef __GNUC__
-};
-short int int_list4800[] = {
-#else
-,
-#endif
-372,372,372,372,372,372,372,372,372,372,372,372,372,372,372,
-372,372,372,372,372,372,372,372,372,372,372,372,372,372,372,372,
-372,372,372,372,372,372,372,372,372,372,372,372,372,372,372,372,
-372,372,372,372,372,372,372,372,372,372,372,372,372,372,372,372,
--1
-#ifdef __GNUC__
-};
-short int int_list4864[] = {
-#else
-,
-#endif
--1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
--1,279,279,279,279,279,279,279,279,279,279,279,279,279,279,279,
--1,279,279,279,279,279,279,279,279,279,279,279,279,279,279,279,
--1,279,279,279,279,279,279,279,279,279,279,279,279,279,279,279,
--1
-#ifdef __GNUC__
-};
-short int int_list4928[] = {
-#else
-,
-#endif
-279,279,279,279,279,279,279,279,279,279,279,279,279,279,279,
--1,279,279,279,279,279,279,279,279,279,279,279,279,279,279,279,
--1,279,279,279,279,279,279,279,279,279,279,279,279,279,279,279,
--1,279,279,279,279,279,279,279,279,279,279,279,279,279,279,279,
--1
-#ifdef __GNUC__
-};
-short int int_list4992[] = {
-#else
-,
-#endif
-279,279,279,279,279,279,279,279,279,279,279,279,279,279,279,
--1,279,279,279,279,279,279,279,279,279,279,279,279,279,279,279,
--1,279,279,279,279,279,279,279,279,279,279,279,279,279,279,279,
--1,279,279,279,279,279,279,279,279,279,279,279,279,279,279,279,
--1
-#ifdef __GNUC__
-};
-short int int_list5056[] = {
-#else
-,
-#endif
-279,279,279,279,279,279,279,279,279,279,279,279,279,279,279,
--1,279,279,279,279,279,279,279,279,279,279,279,279,279,279,279,
--1,279,279,279,279,279,279,279,279,279,279,279,279,279,279,279,
--1,279,279,279,279,279,279,279,279,279,279,279,279,279,279,279,
-210
-#ifdef __GNUC__
-};
-short int int_list5120[] = {
-#else
-,
-#endif
-210,210,210,210,210,210,210,210,210,210,210,210,210,210,210,
-207,207,207,207,207,207,207,207,207,207,207,207,207,207,207,207,
-207,207,207,207,207,207,207,207,207,207,207,207,207,207,207,207,
-207,207,207,207,207,207,207,207,207,207,207,207,207,207,207,207,
-207
-#ifdef __GNUC__
-};
-short int int_list5184[] = {
-#else
-,
-#endif
-207,207,207,207,207,207,207,207,207,207,207,207,207,207,207,
-207,207,207,207,207,207,207,207,207,207,207,207,207,207,207,207,
-207,207,207,207,207,207,207,207,207,207,207,207,207,207,207,207,
-207,207,207,207,207,207,207,207,207,207,207,207,207,207,207,207,
-207
-#ifdef __GNUC__
-};
-short int int_list5248[] = {
-#else
-,
-#endif
-207,207,207,207,207,207,207,207,207,207,207,207,207,207,207,
-207,207,207,207,207,207,207,207,207,207,207,207,207,207,207,207,
-207,207,207,207,207,207,207,207,207,207,207,207,207,207,207,207,
-207,207,207,207,207,207,207,207,207,207,207,207,207,207,207,207,
-207
-#ifdef __GNUC__
-};
-short int int_list5312[] = {
-#else
-,
-#endif
-207,207,207,207,207,207,207,207,207,207,207,207,207,207,207,
-207,207,207,207,207,207,207,207,207,207,207,207,207,207,207,207,
-207,207,207,207,207,207,207,207,207,207,207,207,207,207,207,207,
-207,207,207,207,207,207,207,207,207,207,207,207,207,207,207,207,
--1
-#ifdef __GNUC__
-};
-short int int_list5376[] = {
-#else
-,
-#endif
--1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
--1,275,275,275,275,275,275,275,275,275,275,275,275,275,275,275,
--1,275,275,275,275,275,275,275,275,275,275,275,275,275,275,275,
--1,275,275,275,275,275,275,275,275,275,275,275,275,275,275,275,
--1
-#ifdef __GNUC__
-};
-short int int_list5440[] = {
-#else
-,
-#endif
-275,275,275,275,275,275,275,275,275,275,275,275,275,275,275,
--1,275,275,275,275,275,275,275,275,275,275,275,275,275,275,275,
--1,275,275,275,275,275,275,275,275,275,275,275,275,275,275,275,
--1,275,275,275,275,275,275,275,275,275,275,275,275,275,275,275,
--1
-#ifdef __GNUC__
-};
-short int int_list5504[] = {
-#else
-,
-#endif
-275,275,275,275,275,275,275,275,275,275,275,275,275,275,275,
--1,275,275,275,275,275,275,275,275,275,275,275,275,275,275,275,
--1,275,275,275,275,275,275,275,275,275,275,275,275,275,275,275,
--1,275,275,275,275,275,275,275,275,275,275,275,275,275,275,275,
--1
-#ifdef __GNUC__
-};
-short int int_list5568[] = {
-#else
-,
-#endif
-275,275,275,275,275,275,275,275,275,275,275,275,275,275,275,
--1,275,275,275,275,275,275,275,275,275,275,275,275,275,275,275,
--1,275,275,275,275,275,275,275,275,275,275,275,275,275,275,275,
--1,275,275,275,275,275,275,275,275,275,275,275,275,275,275,275,
-15
-#ifdef __GNUC__
-};
-short int int_list5632[] = {
-#else
-,
-#endif
-15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,
-12,12,12,12,12,12,12,12,12,12,12,12,12,12,12,12,
-12,12,12,12,12,12,12,12,12,12,12,12,12,12,12,12,
-12,12,12,12,12,12,12,12,12,12,12,12,12,12,12,12,
-12
-#ifdef __GNUC__
-};
-short int int_list5696[] = {
-#else
-,
-#endif
-12,12,12,12,12,12,12,12,12,12,12,12,12,12,12,
-12,12,12,12,12,12,12,12,12,12,12,12,12,12,12,12,
-12,12,12,12,12,12,12,12,12,12,12,12,12,12,12,12,
-12,12,12,12,12,12,12,12,12,12,12,12,12,12,12,12,
-12
-#ifdef __GNUC__
-};
-short int int_list5760[] = {
-#else
-,
-#endif
-12,12,12,12,12,12,12,12,12,12,12,12,12,12,12,
-12,12,12,12,12,12,12,12,12,12,12,12,12,12,12,12,
-12,12,12,12,12,12,12,12,12,12,12,12,12,12,12,12,
-12,12,12,12,12,12,12,12,12,12,12,12,12,12,12,12,
-12
-#ifdef __GNUC__
-};
-short int int_list5824[] = {
-#else
-,
-#endif
-12,12,12,12,12,12,12,12,12,12,12,12,12,12,12,
-12,12,12,12,12,12,12,12,12,12,12,12,12,12,12,12,
-12,12,12,12,12,12,12,12,12,12,12,12,12,12,12,12,
-12,12,12,12,12,12,12,12,12,12,12,12,12,12,12,12,
--1
-#ifdef __GNUC__
-};
-short int int_list5888[] = {
-#else
-,
-#endif
--1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
--1,271,271,271,271,271,271,271,271,271,271,271,271,271,271,271,
--1,271,271,271,271,271,271,271,271,271,271,271,271,271,271,271,
--1,271,271,271,271,271,271,271,271,271,271,271,271,271,271,271,
--1
-#ifdef __GNUC__
-};
-short int int_list5952[] = {
-#else
-,
-#endif
-271,271,271,271,271,271,271,271,271,271,271,271,271,271,271,
--1,271,271,271,271,271,271,271,271,271,271,271,271,271,271,271,
--1,271,271,271,271,271,271,271,271,271,271,271,271,271,271,271,
--1,271,271,271,271,271,271,271,271,271,271,271,271,271,271,271,
--1
-#ifdef __GNUC__
-};
-short int int_list6016[] = {
-#else
-,
-#endif
-271,271,271,271,271,271,271,271,271,271,271,271,271,271,271,
--1,271,271,271,271,271,271,271,271,271,271,271,271,271,271,271,
--1,271,271,271,271,271,271,271,271,271,271,271,271,271,271,271,
--1,271,271,271,271,271,271,271,271,271,271,271,271,271,271,271,
--1
-#ifdef __GNUC__
-};
-short int int_list6080[] = {
-#else
-,
-#endif
-271,271,271,271,271,271,271,271,271,271,271,271,271,271,271,
--1,271,271,271,271,271,271,271,271,271,271,271,271,271,271,271,
--1,271,271,271,271,271,271,271,271,271,271,271,271,271,271,271,
--1,271,271,271,271,271,271,271,271,271,271,271,271,271,271,271,
-241
-#ifdef __GNUC__
-};
-short int int_list6144[] = {
-#else
-,
-#endif
-241,241,241,241,241,241,241,241,241,241,241,241,241,241,241,
-238,238,238,238,238,238,238,238,238,238,238,238,238,238,238,238,
-238,238,238,238,238,238,238,238,238,238,238,238,238,238,238,238,
-238,238,238,238,238,238,238,238,238,238,238,238,238,238,238,238,
-238
-#ifdef __GNUC__
-};
-short int int_list6208[] = {
-#else
-,
-#endif
-238,238,238,238,238,238,238,238,238,238,238,238,238,238,238,
-238,238,238,238,238,238,238,238,238,238,238,238,238,238,238,238,
-238,238,238,238,238,238,238,238,238,238,238,238,238,238,238,238,
-238,238,238,238,238,238,238,238,238,238,238,238,238,238,238,238,
-238
-#ifdef __GNUC__
-};
-short int int_list6272[] = {
-#else
-,
-#endif
-238,238,238,238,238,238,238,238,238,238,238,238,238,238,238,
-238,238,238,238,238,238,238,238,238,238,238,238,238,238,238,238,
-238,238,238,238,238,238,238,238,238,238,238,238,238,238,238,238,
-238,238,238,238,238,238,238,238,238,238,238,238,238,238,238,238,
-238
-#ifdef __GNUC__
-};
-short int int_list6336[] = {
-#else
-,
-#endif
-238,238,238,238,238,238,238,238,238,238,238,238,238,238,238,
-238,238,238,238,238,238,238,238,238,238,238,238,238,238,238,238,
-238,238,238,238,238,238,238,238,238,238,238,238,238,238,238,238,
-238,238,238,238,238,238,238,238,238,238,238,238,238,238,238,238,
-236
-#ifdef __GNUC__
-};
-short int int_list6400[] = {
-#else
-,
-#endif
-236,236,236,236,236,236,236,236,236,236,236,236,236,236,236,
-233,233,233,233,233,233,233,233,233,233,233,233,233,233,233,233,
-233,233,233,233,233,233,233,233,233,233,233,233,233,233,233,233,
-233,233,233,233,233,233,233,233,233,233,233,233,233,233,233,233,
-233
-#ifdef __GNUC__
-};
-short int int_list6464[] = {
-#else
-,
-#endif
-233,233,233,233,233,233,233,233,233,233,233,233,233,233,233,
-233,233,233,233,233,233,233,233,233,233,233,233,233,233,233,233,
-233,233,233,233,233,233,233,233,233,233,233,233,233,233,233,233,
-233,233,233,233,233,233,233,233,233,233,233,233,233,233,233,233,
-233
-#ifdef __GNUC__
-};
-short int int_list6528[] = {
-#else
-,
-#endif
-233,233,233,233,233,233,233,233,233,233,233,233,233,233,233,
-233,233,233,233,233,233,233,233,233,233,233,233,233,233,233,233,
-233,233,233,233,233,233,233,233,233,233,233,233,233,233,233,233,
-233,233,233,233,233,233,233,233,233,233,233,233,233,233,233,233,
-233
-#ifdef __GNUC__
-};
-short int int_list6592[] = {
-#else
-,
-#endif
-233,233,233,233,233,233,233,233,233,233,233,233,233,233,233,
-233,233,233,233,233,233,233,233,233,233,233,233,233,233,233,233,
-233,233,233,233,233,233,233,233,233,233,233,233,233,233,233,233,
-233,233,233,233,233,233,233,233,233,233,233,233,233,233,233,233,
-115
-#ifdef __GNUC__
-};
-short int int_list6656[] = {
-#else
-,
-#endif
-115,115,115,115,115,115,115,115,115,115,115,115,115,115,115,
-112,112,112,112,112,112,112,112,112,112,112,112,112,112,112,112,
-112,112,112,112,112,112,112,112,112,112,112,112,112,112,112,112,
-112,112,112,112,112,112,112,112,112,112,112,112,112,112,112,112,
-112
-#ifdef __GNUC__
-};
-short int int_list6720[] = {
-#else
-,
-#endif
-112,112,112,112,112,112,112,112,112,112,112,112,112,112,112,
-112,112,112,112,112,112,112,112,112,112,112,112,112,112,112,112,
-112,112,112,112,112,112,112,112,112,112,112,112,112,112,112,112,
-112,112,112,112,112,112,112,112,112,112,112,112,112,112,112,112,
-112
-#ifdef __GNUC__
-};
-short int int_list6784[] = {
-#else
-,
-#endif
-112,112,112,112,112,112,112,112,112,112,112,112,112,112,112,
-112,112,112,112,112,112,112,112,112,112,112,112,112,112,112,112,
-112,112,112,112,112,112,112,112,112,112,112,112,112,112,112,112,
-112,112,112,112,112,112,112,112,112,112,112,112,112,112,112,112,
-112
-#ifdef __GNUC__
-};
-short int int_list6848[] = {
-#else
-,
-#endif
-112,112,112,112,112,112,112,112,112,112,112,112,112,112,112,
-112,112,112,112,112,112,112,112,112,112,112,112,112,112,112,112,
-112,112,112,112,112,112,112,112,112,112,112,112,112,112,112,112,
-112,112,112,112,112,112,112,112,112,112,112,112,112,112,112,112,
-110
-#ifdef __GNUC__
-};
-short int int_list6912[] = {
-#else
-,
-#endif
-110,110,110,110,110,110,110,110,110,110,110,110,110,110,110,
-107,107,107,107,107,107,107,107,107,107,107,107,107,107,107,107,
-107,107,107,107,107,107,107,107,107,107,107,107,107,107,107,107,
-107,107,107,107,107,107,107,107,107,107,107,107,107,107,107,107,
-107
-#ifdef __GNUC__
-};
-short int int_list6976[] = {
-#else
-,
-#endif
-107,107,107,107,107,107,107,107,107,107,107,107,107,107,107,
-107,107,107,107,107,107,107,107,107,107,107,107,107,107,107,107,
-107,107,107,107,107,107,107,107,107,107,107,107,107,107,107,107,
-107,107,107,107,107,107,107,107,107,107,107,107,107,107,107,107,
-107
-#ifdef __GNUC__
-};
-short int int_list7040[] = {
-#else
-,
-#endif
-107,107,107,107,107,107,107,107,107,107,107,107,107,107,107,
-107,107,107,107,107,107,107,107,107,107,107,107,107,107,107,107,
-107,107,107,107,107,107,107,107,107,107,107,107,107,107,107,107,
-107,107,107,107,107,107,107,107,107,107,107,107,107,107,107,107,
-107
-#ifdef __GNUC__
-};
-short int int_list7104[] = {
-#else
-,
-#endif
-107,107,107,107,107,107,107,107,107,107,107,107,107,107,107,
-107,107,107,107,107,107,107,107,107,107,107,107,107,107,107,107,
-107,107,107,107,107,107,107,107,107,107,107,107,107,107,107,107,
-107,107,107,107,107,107,107,107,107,107,107,107,107,107,107,107,
--1
-#ifdef __GNUC__
-};
-short int int_list7168[] = {
-#else
-,
-#endif
--1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
--1,217,-1,-1,-1,-1,-1,-1,387,214,-1,-1,-1,-1,-1,-1,
--1,217,-1,-1,-1,-1,-1,-1,387,214,-1,-1,-1,-1,-1,-1,
--1,217,-1,-1,-1,-1,-1,-1,387,214,-1,-1,-1,-1,-1,-1,
--1
-#ifdef __GNUC__
-};
-short int int_list7232[] = {
-#else
-,
-#endif
-217,-1,-1,-1,-1,-1,-1,387,214,-1,-1,-1,-1,-1,-1,
--1,217,-1,-1,-1,-1,-1,-1,387,214,-1,-1,-1,-1,-1,-1,
--1,217,-1,-1,-1,-1,-1,-1,387,214,-1,-1,-1,-1,-1,-1,
--1,217,-1,-1,-1,-1,-1,-1,387,214,-1,-1,-1,-1,-1,-1,
--1
-#ifdef __GNUC__
-};
-short int int_list7296[] = {
-#else
-,
-#endif
-217,-1,-1,-1,-1,-1,-1,387,214,-1,-1,-1,-1,-1,-1,
--1,217,-1,-1,-1,-1,-1,-1,387,214,-1,-1,-1,-1,-1,-1,
--1,217,-1,-1,-1,-1,-1,-1,387,214,-1,-1,-1,-1,-1,-1,
--1,217,-1,-1,-1,-1,-1,-1,387,214,-1,-1,-1,-1,-1,-1,
--1
-#ifdef __GNUC__
-};
-short int int_list7360[] = {
-#else
-,
-#endif
-217,-1,-1,-1,-1,-1,-1,387,214,-1,-1,-1,-1,-1,-1,
--1,217,-1,-1,-1,-1,-1,-1,387,214,-1,-1,-1,-1,-1,-1,
--1,217,-1,-1,-1,-1,-1,-1,387,214,-1,-1,-1,-1,-1,-1,
--1,217,-1,-1,-1,-1,-1,-1,387,214,-1,-1,-1,-1,-1,-1,
--1
-#ifdef __GNUC__
-};
-short int int_list7424[] = {
-#else
-,
-#endif
--1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
-202,202,202,202,202,202,202,202,202,202,202,202,202,202,202,202,
-202,202,202,202,202,202,202,202,202,202,202,202,202,202,202,202,
-202,202,202,202,202,202,202,202,202,202,202,202,202,202,202,202,
-202
-#ifdef __GNUC__
-};
-short int int_list7488[] = {
-#else
-,
-#endif
-202,202,202,202,202,202,202,202,202,202,202,202,202,202,202,
-202,202,202,202,202,202,202,202,202,202,202,202,202,202,202,202,
-202,202,202,202,202,202,202,202,202,202,202,202,202,202,202,202,
-202,202,202,202,202,202,202,202,202,202,202,202,202,202,202,202,
-202
-#ifdef __GNUC__
-};
-short int int_list7552[] = {
-#else
-,
-#endif
-202,202,202,202,202,202,202,202,202,202,202,202,202,202,202,
-202,202,202,202,202,202,202,202,202,202,202,202,202,202,202,202,
-202,202,202,202,202,202,202,202,202,202,202,202,202,202,202,202,
-202,202,202,202,202,202,202,202,202,202,202,202,202,202,202,202,
-202
-#ifdef __GNUC__
-};
-short int int_list7616[] = {
-#else
-,
-#endif
-202,202,202,202,202,202,202,202,202,202,202,202,202,202,202,
-202,202,202,202,202,202,202,202,202,202,202,202,202,202,202,202,
-202,202,202,202,202,202,202,202,202,202,202,202,202,202,202,202,
-202,202,202,202,202,202,202,202,202,202,202,202,202,202,202,202,
--1
-#ifdef __GNUC__
-};
-short int int_list7680[] = {
-#else
-,
-#endif
--1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
-152,152,152,152,152,152,152,152,152,152,152,152,152,152,152,152,
-152,152,152,152,152,152,152,152,152,152,152,152,152,152,152,152,
-152,152,152,152,152,152,152,152,152,152,152,152,152,152,152,152,
-152
-#ifdef __GNUC__
-};
-short int int_list7744[] = {
-#else
-,
-#endif
-152,152,152,152,152,152,152,152,152,152,152,152,152,152,152,
-152,152,152,152,152,152,152,152,152,152,152,152,152,152,152,152,
-152,152,152,152,152,152,152,152,152,152,152,152,152,152,152,152,
-152,152,152,152,152,152,152,152,152,152,152,152,152,152,152,152,
-152
-#ifdef __GNUC__
-};
-short int int_list7808[] = {
-#else
-,
-#endif
-152,152,152,152,152,152,152,152,152,152,152,152,152,152,152,
-152,152,152,152,152,152,152,152,152,152,152,152,152,152,152,152,
-152,152,152,152,152,152,152,152,152,152,152,152,152,152,152,152,
-152,152,152,152,152,152,152,152,152,152,152,152,152,152,152,152,
-152
-#ifdef __GNUC__
-};
-short int int_list7872[] = {
-#else
-,
-#endif
-152,152,152,152,152,152,152,152,152,152,152,152,152,152,152,
-152,152,152,152,152,152,152,152,152,152,152,152,152,152,152,152,
-152,152,152,152,152,152,152,152,152,152,152,152,152,152,152,152,
-152,152,152,152,152,152,152,152,152,152,152,152,152,152,152,152,
--1
-#ifdef __GNUC__
-};
-short int int_list7936[] = {
-#else
-,
-#endif
--1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
-38,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
-38,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
-38,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
-38
-#ifdef __GNUC__
-};
-short int int_list8000[] = {
-#else
-,
-#endif
--1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
-38,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
-38,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
-38,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
-38
-#ifdef __GNUC__
-};
-short int int_list8064[] = {
-#else
-,
-#endif
--1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
-38,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
-38,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
-38,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
-38
-#ifdef __GNUC__
-};
-short int int_list8128[] = {
-#else
-,
-#endif
--1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
-38,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
-38,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
-38,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
--1
-#ifdef __GNUC__
-};
-short int int_list8192[] = {
-#else
-,
-#endif
--1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
-182,182,182,182,182,182,182,182,182,182,182,182,182,182,182,182,
-182,182,182,182,182,182,182,182,182,182,182,182,182,182,182,182,
-182,182,182,182,182,182,182,182,182,182,182,182,182,182,182,182,
-182
-#ifdef __GNUC__
-};
-short int int_list8256[] = {
-#else
-,
-#endif
-182,182,182,182,182,182,182,182,182,182,182,182,182,182,182,
-182,182,182,182,182,182,182,182,182,182,182,182,182,182,182,182,
-182,182,182,182,182,182,182,182,182,182,182,182,182,182,182,182,
-182,182,182,182,182,182,182,182,182,182,182,182,182,182,182,182,
-182
-#ifdef __GNUC__
-};
-short int int_list8320[] = {
-#else
-,
-#endif
-182,182,182,182,182,182,182,182,182,182,182,182,182,182,182,
-182,182,182,182,182,182,182,182,182,182,182,182,182,182,182,182,
-182,182,182,182,182,182,182,182,182,182,182,182,182,182,182,182,
-182,182,182,182,182,182,182,182,182,182,182,182,182,182,182,182,
-182
-#ifdef __GNUC__
-};
-short int int_list8384[] = {
-#else
-,
-#endif
-182,182,182,182,182,182,182,182,182,182,182,182,182,182,182,
-182,182,182,182,182,182,182,182,182,182,182,182,182,182,182,182,
-182,182,182,182,182,182,182,182,182,182,182,182,182,182,182,182,
-182,182,182,182,182,182,182,182,182,182,182,182,182,182,182,182,
-167
-#ifdef __GNUC__
-};
-short int int_list8448[] = {
-#else
-,
-#endif
-167,167,167,167,167,167,167,167,167,167,167,167,167,167,167,
-164,164,164,164,164,164,164,164,164,164,164,164,164,164,164,164,
-164,164,164,164,164,164,164,164,164,164,164,164,164,164,164,164,
-164,164,164,164,164,164,164,164,164,164,164,164,164,164,164,164,
-164
-#ifdef __GNUC__
-};
-short int int_list8512[] = {
-#else
-,
-#endif
-164,164,164,164,164,164,164,164,164,164,164,164,164,164,164,
-164,164,164,164,164,164,164,164,164,164,164,164,164,164,164,164,
-164,164,164,164,164,164,164,164,164,164,164,164,164,164,164,164,
-164,164,164,164,164,164,164,164,164,164,164,164,164,164,164,164,
-164
-#ifdef __GNUC__
-};
-short int int_list8576[] = {
-#else
-,
-#endif
-164,164,164,164,164,164,164,164,164,164,164,164,164,164,164,
-164,164,164,164,164,164,164,164,164,164,164,164,164,164,164,164,
-164,164,164,164,164,164,164,164,164,164,164,164,164,164,164,164,
-164,164,164,164,164,164,164,164,164,164,164,164,164,164,164,164,
-164
-#ifdef __GNUC__
-};
-short int int_list8640[] = {
-#else
-,
-#endif
-164,164,164,164,164,164,164,164,164,164,164,164,164,164,164,
-164,164,164,164,164,164,164,164,164,164,164,164,164,164,164,164,
-164,164,164,164,164,164,164,164,164,164,164,164,164,164,164,164,
-164,164,164,164,164,164,164,164,164,164,164,164,164,164,164,164,
-297
-#ifdef __GNUC__
-};
-short int int_list8704[] = {
-#else
-,
-#endif
-297,297,297,297,297,297,297,297,297,297,297,297,297,297,297,
-293,293,293,293,293,293,293,293,293,293,293,293,293,293,293,293,
-293,293,293,293,293,293,293,293,293,293,293,293,293,293,293,293,
-293,293,293,293,293,293,293,293,293,293,293,293,293,293,293,293,
-293
-#ifdef __GNUC__
-};
-short int int_list8768[] = {
-#else
-,
-#endif
-293,293,293,293,293,293,293,293,293,293,293,293,293,293,293,
-293,293,293,293,293,293,293,293,293,293,293,293,293,293,293,293,
-293,293,293,293,293,293,293,293,293,293,293,293,293,293,293,293,
-293,293,293,293,293,293,293,293,293,293,293,293,293,293,293,293,
-293
-#ifdef __GNUC__
-};
-short int int_list8832[] = {
-#else
-,
-#endif
-293,293,293,293,293,293,293,293,293,293,293,293,293,293,293,
-293,293,293,293,293,293,293,293,293,293,293,293,293,293,293,293,
-293,293,293,293,293,293,293,293,293,293,293,293,293,293,293,293,
-293,293,293,293,293,293,293,293,293,293,293,293,293,293,293,293,
-293
-#ifdef __GNUC__
-};
-short int int_list8896[] = {
-#else
-,
-#endif
-293,293,293,293,293,293,293,293,293,293,293,293,293,293,293,
-293,293,293,293,293,293,293,293,293,293,293,293,293,293,293,293,
-293,293,293,293,293,293,293,293,293,293,293,293,293,293,293,293,
-293,293,293,293,293,293,293,293,293,293,293,293,293,293,293,293,
-292
-#ifdef __GNUC__
-};
-short int int_list8960[] = {
-#else
-,
-#endif
-292,292,292,292,292,292,292,292,292,292,292,292,292,292,292,
-288,288,288,288,288,288,288,288,288,288,288,288,288,288,288,288,
-288,288,288,288,288,288,288,288,288,288,288,288,288,288,288,288,
-288,288,288,288,288,288,288,288,288,288,288,288,288,288,288,288,
-288
-#ifdef __GNUC__
-};
-short int int_list9024[] = {
-#else
-,
-#endif
-288,288,288,288,288,288,288,288,288,288,288,288,288,288,288,
-288,288,288,288,288,288,288,288,288,288,288,288,288,288,288,288,
-288,288,288,288,288,288,288,288,288,288,288,288,288,288,288,288,
-288,288,288,288,288,288,288,288,288,288,288,288,288,288,288,288,
-288
-#ifdef __GNUC__
-};
-short int int_list9088[] = {
-#else
-,
-#endif
-288,288,288,288,288,288,288,288,288,288,288,288,288,288,288,
-288,288,288,288,288,288,288,288,288,288,288,288,288,288,288,288,
-288,288,288,288,288,288,288,288,288,288,288,288,288,288,288,288,
-288,288,288,288,288,288,288,288,288,288,288,288,288,288,288,288,
-288
-#ifdef __GNUC__
-};
-short int int_list9152[] = {
-#else
-,
-#endif
-288,288,288,288,288,288,288,288,288,288,288,288,288,288,288,
-288,288,288,288,288,288,288,288,288,288,288,288,288,288,288,288,
-288,288,288,288,288,288,288,288,288,288,288,288,288,288,288,288,
-288,288,288,288,288,288,288,288,288,288,288,288,288,288,288,288,
-336
-#ifdef __GNUC__
-};
-short int int_list9216[] = {
-#else
-,
-#endif
-336,336,336,336,336,336,336,336,336,336,336,336,336,336,336,
-332,332,332,332,332,332,332,332,332,332,332,332,332,332,332,332,
-332,332,332,332,332,332,332,332,332,332,332,332,332,332,332,332,
-332,332,332,332,332,332,332,332,332,332,332,332,332,332,332,332,
-332
-#ifdef __GNUC__
-};
-short int int_list9280[] = {
-#else
-,
-#endif
-332,332,332,332,332,332,332,332,332,332,332,332,332,332,332,
-332,332,332,332,332,332,332,332,332,332,332,332,332,332,332,332,
-332,332,332,332,332,332,332,332,332,332,332,332,332,332,332,332,
-332,332,332,332,332,332,332,332,332,332,332,332,332,332,332,332,
-332
-#ifdef __GNUC__
-};
-short int int_list9344[] = {
-#else
-,
-#endif
-332,332,332,332,332,332,332,332,332,332,332,332,332,332,332,
-332,332,332,332,332,332,332,332,332,332,332,332,332,332,332,332,
-332,332,332,332,332,332,332,332,332,332,332,332,332,332,332,332,
-332,332,332,332,332,332,332,332,332,332,332,332,332,332,332,332,
-332
-#ifdef __GNUC__
-};
-short int int_list9408[] = {
-#else
-,
-#endif
-332,332,332,332,332,332,332,332,332,332,332,332,332,332,332,
-332,332,332,332,332,332,332,332,332,332,332,332,332,332,332,332,
-332,332,332,332,332,332,332,332,332,332,332,332,332,332,332,332,
-332,332,332,332,332,332,332,332,332,332,332,332,332,332,332,332,
-331
-#ifdef __GNUC__
-};
-short int int_list9472[] = {
-#else
-,
-#endif
-331,331,331,331,331,331,331,331,331,331,331,331,331,331,331,
-327,327,327,327,327,327,327,327,327,327,327,327,327,327,327,327,
-327,327,327,327,327,327,327,327,327,327,327,327,327,327,327,327,
-327,327,327,327,327,327,327,327,327,327,327,327,327,327,327,327,
-327
-#ifdef __GNUC__
-};
-short int int_list9536[] = {
-#else
-,
-#endif
-327,327,327,327,327,327,327,327,327,327,327,327,327,327,327,
-327,327,327,327,327,327,327,327,327,327,327,327,327,327,327,327,
-327,327,327,327,327,327,327,327,327,327,327,327,327,327,327,327,
-327,327,327,327,327,327,327,327,327,327,327,327,327,327,327,327,
-327
-#ifdef __GNUC__
-};
-short int int_list9600[] = {
-#else
-,
-#endif
-327,327,327,327,327,327,327,327,327,327,327,327,327,327,327,
-327,327,327,327,327,327,327,327,327,327,327,327,327,327,327,327,
-327,327,327,327,327,327,327,327,327,327,327,327,327,327,327,327,
-327,327,327,327,327,327,327,327,327,327,327,327,327,327,327,327,
-327
-#ifdef __GNUC__
-};
-short int int_list9664[] = {
-#else
-,
-#endif
-327,327,327,327,327,327,327,327,327,327,327,327,327,327,327,
-327,327,327,327,327,327,327,327,327,327,327,327,327,327,327,327,
-327,327,327,327,327,327,327,327,327,327,327,327,327,327,327,327,
-327,327,327,327,327,327,327,327,327,327,327,327,327,327,327,327,
-36
-#ifdef __GNUC__
-};
-short int int_list9728[] = {
-#else
-,
-#endif
-36,36,36,36,36,36,36,36,36,36,36,36,36,36,36,
-32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,
-32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,
-32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,
-32
-#ifdef __GNUC__
-};
-short int int_list9792[] = {
-#else
-,
-#endif
-32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,
-32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,
-32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,
-32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,
-32
-#ifdef __GNUC__
-};
-short int int_list9856[] = {
-#else
-,
-#endif
-32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,
-32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,
-32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,
-32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,
-32
-#ifdef __GNUC__
-};
-short int int_list9920[] = {
-#else
-,
-#endif
-32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,
-32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,
-32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,
-32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,
-31
-#ifdef __GNUC__
-};
-short int int_list9984[] = {
-#else
-,
-#endif
-31,31,31,31,31,31,31,31,31,31,31,31,31,31,31,
-27,27,27,27,27,27,27,27,27,27,27,27,27,27,27,27,
-27,27,27,27,27,27,27,27,27,27,27,27,27,27,27,27,
-27,27,27,27,27,27,27,27,27,27,27,27,27,27,27,27,
-27
-#ifdef __GNUC__
-};
-short int int_list10048[] = {
-#else
-,
-#endif
-27,27,27,27,27,27,27,27,27,27,27,27,27,27,27,
-27,27,27,27,27,27,27,27,27,27,27,27,27,27,27,27,
-27,27,27,27,27,27,27,27,27,27,27,27,27,27,27,27,
-27,27,27,27,27,27,27,27,27,27,27,27,27,27,27,27,
-27
-#ifdef __GNUC__
-};
-short int int_list10112[] = {
-#else
-,
-#endif
-27,27,27,27,27,27,27,27,27,27,27,27,27,27,27,
-27,27,27,27,27,27,27,27,27,27,27,27,27,27,27,27,
-27,27,27,27,27,27,27,27,27,27,27,27,27,27,27,27,
-27,27,27,27,27,27,27,27,27,27,27,27,27,27,27,27,
-27
-#ifdef __GNUC__
-};
-short int int_list10176[] = {
-#else
-,
-#endif
-27,27,27,27,27,27,27,27,27,27,27,27,27,27,27,
-27,27,27,27,27,27,27,27,27,27,27,27,27,27,27,27,
-27,27,27,27,27,27,27,27,27,27,27,27,27,27,27,27,
-27,27,27,27,27,27,27,27,27,27,27,27,27,27,27,27,
--1
-#ifdef __GNUC__
-};
-short int int_list10240[] = {
-#else
-,
-#endif
--1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
-143,143,143,143,143,143,143,143,143,143,143,143,143,143,143,143,
-143,143,143,143,143,143,143,143,143,143,143,143,143,143,143,143,
-143,143,143,143,143,143,143,143,143,143,143,143,143,143,143,143,
-143
-#ifdef __GNUC__
-};
-short int int_list10304[] = {
-#else
-,
-#endif
-143,143,143,143,143,143,143,143,143,143,143,143,143,143,143,
-143,143,143,143,143,143,143,143,143,143,143,143,143,143,143,143,
-143,143,143,143,143,143,143,143,143,143,143,143,143,143,143,143,
-143,143,143,143,143,143,143,143,143,143,143,143,143,143,143,143,
-143
-#ifdef __GNUC__
-};
-short int int_list10368[] = {
-#else
-,
-#endif
-143,143,143,143,143,143,143,143,143,143,143,143,143,143,143,
-143,143,143,143,143,143,143,143,143,143,143,143,143,143,143,143,
-143,143,143,143,143,143,143,143,143,143,143,143,143,143,143,143,
-143,143,143,143,143,143,143,143,143,143,143,143,143,143,143,143,
-143
-#ifdef __GNUC__
-};
-short int int_list10432[] = {
-#else
-,
-#endif
-143,143,143,143,143,143,143,143,143,143,143,143,143,143,143,
-143,143,143,143,143,143,143,143,143,143,143,143,143,143,143,143,
-143,143,143,143,143,143,143,143,143,143,143,143,143,143,143,143,
-143,143,143,143,143,143,143,143,143,143,143,143,143,143,143,143,
--1
-#ifdef __GNUC__
-};
-short int int_list10496[] = {
-#else
-,
-#endif
--1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
-139,139,139,139,139,139,139,139,139,139,139,139,139,139,139,139,
-139,139,139,139,139,139,139,139,139,139,139,139,139,139,139,139,
-139,139,139,139,139,139,139,139,139,139,139,139,139,139,139,139,
-139
-#ifdef __GNUC__
-};
-short int int_list10560[] = {
-#else
-,
-#endif
-139,139,139,139,139,139,139,139,139,139,139,139,139,139,139,
-139,139,139,139,139,139,139,139,139,139,139,139,139,139,139,139,
-139,139,139,139,139,139,139,139,139,139,139,139,139,139,139,139,
-139,139,139,139,139,139,139,139,139,139,139,139,139,139,139,139,
-139
-#ifdef __GNUC__
-};
-short int int_list10624[] = {
-#else
-,
-#endif
-139,139,139,139,139,139,139,139,139,139,139,139,139,139,139,
-139,139,139,139,139,139,139,139,139,139,139,139,139,139,139,139,
-139,139,139,139,139,139,139,139,139,139,139,139,139,139,139,139,
-139,139,139,139,139,139,139,139,139,139,139,139,139,139,139,139,
-139
-#ifdef __GNUC__
-};
-short int int_list10688[] = {
-#else
-,
-#endif
-139,139,139,139,139,139,139,139,139,139,139,139,139,139,139,
-139,139,139,139,139,139,139,139,139,139,139,139,139,139,139,139,
-139,139,139,139,139,139,139,139,139,139,139,139,139,139,139,139,
-139,139,139,139,139,139,139,139,139,139,139,139,139,139,139,139,
--1
-#ifdef __GNUC__
-};
-short int int_list10752[] = {
-#else
-,
-#endif
--1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
-102,102,102,102,102,102,102,102,102,102,102,102,102,102,102,102,
-102,102,102,102,102,102,102,102,102,102,102,102,102,102,102,102,
-102,102,102,102,102,102,102,102,102,102,102,102,102,102,102,102,
-102
-#ifdef __GNUC__
-};
-short int int_list10816[] = {
-#else
-,
-#endif
-102,102,102,102,102,102,102,102,102,102,102,102,102,102,102,
-102,102,102,102,102,102,102,102,102,102,102,102,102,102,102,102,
-102,102,102,102,102,102,102,102,102,102,102,102,102,102,102,102,
-102,102,102,102,102,102,102,102,102,102,102,102,102,102,102,102,
-102
-#ifdef __GNUC__
-};
-short int int_list10880[] = {
-#else
-,
-#endif
-102,102,102,102,102,102,102,102,102,102,102,102,102,102,102,
-102,102,102,102,102,102,102,102,102,102,102,102,102,102,102,102,
-102,102,102,102,102,102,102,102,102,102,102,102,102,102,102,102,
-102,102,102,102,102,102,102,102,102,102,102,102,102,102,102,102,
-102
-#ifdef __GNUC__
-};
-short int int_list10944[] = {
-#else
-,
-#endif
-102,102,102,102,102,102,102,102,102,102,102,102,102,102,102,
-102,102,102,102,102,102,102,102,102,102,102,102,102,102,102,102,
-102,102,102,102,102,102,102,102,102,102,102,102,102,102,102,102,
-102,102,102,102,102,102,102,102,102,102,102,102,102,102,102,102,
--1
-#ifdef __GNUC__
-};
-short int int_list11008[] = {
-#else
-,
-#endif
--1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
-98,98,98,98,98,98,98,98,98,98,98,98,98,98,98,98,
-98,98,98,98,98,98,98,98,98,98,98,98,98,98,98,98,
-98,98,98,98,98,98,98,98,98,98,98,98,98,98,98,98,
-98
-#ifdef __GNUC__
-};
-short int int_list11072[] = {
-#else
-,
-#endif
-98,98,98,98,98,98,98,98,98,98,98,98,98,98,98,
-98,98,98,98,98,98,98,98,98,98,98,98,98,98,98,98,
-98,98,98,98,98,98,98,98,98,98,98,98,98,98,98,98,
-98,98,98,98,98,98,98,98,98,98,98,98,98,98,98,98,
-98
-#ifdef __GNUC__
-};
-short int int_list11136[] = {
-#else
-,
-#endif
-98,98,98,98,98,98,98,98,98,98,98,98,98,98,98,
-98,98,98,98,98,98,98,98,98,98,98,98,98,98,98,98,
-98,98,98,98,98,98,98,98,98,98,98,98,98,98,98,98,
-98,98,98,98,98,98,98,98,98,98,98,98,98,98,98,98,
-98
-#ifdef __GNUC__
-};
-short int int_list11200[] = {
-#else
-,
-#endif
-98,98,98,98,98,98,98,98,98,98,98,98,98,98,98,
-98,98,98,98,98,98,98,98,98,98,98,98,98,98,98,98,
-98,98,98,98,98,98,98,98,98,98,98,98,98,98,98,98,
-98,98,98,98,98,98,98,98,98,98,98,98,98,98,98,98,
--1
-#ifdef __GNUC__
-};
-short int int_list11264[] = {
-#else
-,
-#endif
--1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
-123,123,123,123,123,123,123,123,123,123,123,123,123,123,123,123,
-123,123,123,123,123,123,123,123,123,123,123,123,123,123,123,123,
-123,123,123,123,123,123,123,123,123,123,123,123,123,123,123,123,
-123
-#ifdef __GNUC__
-};
-short int int_list11328[] = {
-#else
-,
-#endif
-123,123,123,123,123,123,123,123,123,123,123,123,123,123,123,
-123,123,123,123,123,123,123,123,123,123,123,123,123,123,123,123,
-123,123,123,123,123,123,123,123,123,123,123,123,123,123,123,123,
-123,123,123,123,123,123,123,123,123,123,123,123,123,123,123,123,
-123
-#ifdef __GNUC__
-};
-short int int_list11392[] = {
-#else
-,
-#endif
-123,123,123,123,123,123,123,123,123,123,123,123,123,123,123,
-123,123,123,123,123,123,123,123,123,123,123,123,123,123,123,123,
-123,123,123,123,123,123,123,123,123,123,123,123,123,123,123,123,
-123,123,123,123,123,123,123,123,123,123,123,123,123,123,123,123,
-123
-#ifdef __GNUC__
-};
-short int int_list11456[] = {
-#else
-,
-#endif
-123,123,123,123,123,123,123,123,123,123,123,123,123,123,123,
-123,123,123,123,123,123,123,123,123,123,123,123,123,123,123,123,
-123,123,123,123,123,123,123,123,123,123,123,123,123,123,123,123,
-123,123,123,123,123,123,123,123,123,123,123,123,123,123,123,123,
--1
-#ifdef __GNUC__
-};
-short int int_list11520[] = {
-#else
-,
-#endif
--1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
-119,119,119,119,119,119,119,119,119,119,119,119,119,119,119,119,
-119,119,119,119,119,119,119,119,119,119,119,119,119,119,119,119,
-119,119,119,119,119,119,119,119,119,119,119,119,119,119,119,119,
-119
-#ifdef __GNUC__
-};
-short int int_list11584[] = {
-#else
-,
-#endif
-119,119,119,119,119,119,119,119,119,119,119,119,119,119,119,
-119,119,119,119,119,119,119,119,119,119,119,119,119,119,119,119,
-119,119,119,119,119,119,119,119,119,119,119,119,119,119,119,119,
-119,119,119,119,119,119,119,119,119,119,119,119,119,119,119,119,
-119
-#ifdef __GNUC__
-};
-short int int_list11648[] = {
-#else
-,
-#endif
-119,119,119,119,119,119,119,119,119,119,119,119,119,119,119,
-119,119,119,119,119,119,119,119,119,119,119,119,119,119,119,119,
-119,119,119,119,119,119,119,119,119,119,119,119,119,119,119,119,
-119,119,119,119,119,119,119,119,119,119,119,119,119,119,119,119,
-119
-#ifdef __GNUC__
-};
-short int int_list11712[] = {
-#else
-,
-#endif
-119,119,119,119,119,119,119,119,119,119,119,119,119,119,119,
-119,119,119,119,119,119,119,119,119,119,119,119,119,119,119,119,
-119,119,119,119,119,119,119,119,119,119,119,119,119,119,119,119,
-119,119,119,119,119,119,119,119,119,119,119,119,119,119,119,119,
--1
-#ifdef __GNUC__
-};
-short int int_list11776[] = {
-#else
-,
-#endif
--1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
-177,177,177,177,177,177,177,177,177,177,177,177,177,177,177,177,
-177,177,177,177,177,177,177,177,177,177,177,177,177,177,177,177,
-177,177,177,177,177,177,177,177,177,177,177,177,177,177,177,177,
-177
-#ifdef __GNUC__
-};
-short int int_list11840[] = {
-#else
-,
-#endif
-177,177,177,177,177,177,177,177,177,177,177,177,177,177,177,
-177,177,177,177,177,177,177,177,177,177,177,177,177,177,177,177,
-177,177,177,177,177,177,177,177,177,177,177,177,177,177,177,177,
-177,177,177,177,177,177,177,177,177,177,177,177,177,177,177,177,
-177
-#ifdef __GNUC__
-};
-short int int_list11904[] = {
-#else
-,
-#endif
-177,177,177,177,177,177,177,177,177,177,177,177,177,177,177,
-177,177,177,177,177,177,177,177,177,177,177,177,177,177,177,177,
-177,177,177,177,177,177,177,177,177,177,177,177,177,177,177,177,
-177,177,177,177,177,177,177,177,177,177,177,177,177,177,177,177,
-177
-#ifdef __GNUC__
-};
-short int int_list11968[] = {
-#else
-,
-#endif
-177,177,177,177,177,177,177,177,177,177,177,177,177,177,177,
-177,177,177,177,177,177,177,177,177,177,177,177,177,177,177,177,
-177,177,177,177,177,177,177,177,177,177,177,177,177,177,177,177,
-177,177,177,177,177,177,177,177,177,177,177,177,177,177,177,177,
--1
-#ifdef __GNUC__
-};
-short int int_list12032[] = {
-#else
-,
-#endif
--1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
-157,157,157,157,157,157,157,157,157,157,157,157,157,157,157,157,
-157,157,157,157,157,157,157,157,157,157,157,157,157,157,157,157,
-157,157,157,157,157,157,157,157,157,157,157,157,157,157,157,157,
-157
-#ifdef __GNUC__
-};
-short int int_list12096[] = {
-#else
-,
-#endif
-157,157,157,157,157,157,157,157,157,157,157,157,157,157,157,
-157,157,157,157,157,157,157,157,157,157,157,157,157,157,157,157,
-157,157,157,157,157,157,157,157,157,157,157,157,157,157,157,157,
-157,157,157,157,157,157,157,157,157,157,157,157,157,157,157,157,
-157
-#ifdef __GNUC__
-};
-short int int_list12160[] = {
-#else
-,
-#endif
-157,157,157,157,157,157,157,157,157,157,157,157,157,157,157,
-157,157,157,157,157,157,157,157,157,157,157,157,157,157,157,157,
-157,157,157,157,157,157,157,157,157,157,157,157,157,157,157,157,
-157,157,157,157,157,157,157,157,157,157,157,157,157,157,157,157,
-157
-#ifdef __GNUC__
-};
-short int int_list12224[] = {
-#else
-,
-#endif
-157,157,157,157,157,157,157,157,157,157,157,157,157,157,157,
-157,157,157,157,157,157,157,157,157,157,157,157,157,157,157,157,
-157,157,157,157,157,157,157,157,157,157,157,157,157,157,157,157,
-157,157,157,157,157,157,157,157,157,157,157,157,157,157,157,157,
-226
-#ifdef __GNUC__
-};
-short int int_list12288[] = {
-#else
-,
-#endif
-226,226,226,226,226,226,226,226,226,226,226,226,226,226,226,
-187,187,187,187,187,187,187,187,187,187,187,187,187,187,187,187,
-187,187,187,187,187,187,187,187,187,187,187,187,187,187,187,187,
-187,187,187,187,187,187,187,187,187,187,187,187,187,187,187,187,
-187
-#ifdef __GNUC__
-};
-short int int_list12352[] = {
-#else
-,
-#endif
-187,187,187,187,187,187,187,187,187,187,187,187,187,187,187,
-187,187,187,187,187,187,187,187,187,187,187,187,187,187,187,187,
-187,187,187,187,187,187,187,187,187,187,187,187,187,187,187,187,
-187,187,187,187,187,187,187,187,187,187,187,187,187,187,187,187,
-187
-#ifdef __GNUC__
-};
-short int int_list12416[] = {
-#else
-,
-#endif
-187,187,187,187,187,187,187,187,187,187,187,187,187,187,187,
-187,187,187,187,187,187,187,187,187,187,187,187,187,187,187,187,
-187,187,187,187,187,187,187,187,187,187,187,187,187,187,187,187,
-187,187,187,187,187,187,187,187,187,187,187,187,187,187,187,187,
-187
-#ifdef __GNUC__
-};
-short int int_list12480[] = {
-#else
-,
-#endif
-187,187,187,187,187,187,187,187,187,187,187,187,187,187,187,
-187,187,187,187,187,187,187,187,187,187,187,187,187,187,187,187,
-187,187,187,187,187,187,187,187,187,187,187,187,187,187,187,187,
-187,187,187,187,187,187,187,187,187,187,187,187,187,187,187,187,
-224
-#ifdef __GNUC__
-};
-short int int_list12544[] = {
-#else
-,
-#endif
-224,224,224,224,224,224,224,224,224,224,224,224,224,224,224,
-169,169,169,169,169,169,169,169,169,169,169,169,169,169,169,169,
-169,169,169,169,169,169,169,169,169,169,169,169,169,169,169,169,
-169,169,169,169,169,169,169,169,169,169,169,169,169,169,169,169,
-169
-#ifdef __GNUC__
-};
-short int int_list12608[] = {
-#else
-,
-#endif
-169,169,169,169,169,169,169,169,169,169,169,169,169,169,169,
-169,169,169,169,169,169,169,169,169,169,169,169,169,169,169,169,
-169,169,169,169,169,169,169,169,169,169,169,169,169,169,169,169,
-169,169,169,169,169,169,169,169,169,169,169,169,169,169,169,169,
-169
-#ifdef __GNUC__
-};
-short int int_list12672[] = {
-#else
-,
-#endif
-169,169,169,169,169,169,169,169,169,169,169,169,169,169,169,
-169,169,169,169,169,169,169,169,169,169,169,169,169,169,169,169,
-169,169,169,169,169,169,169,169,169,169,169,169,169,169,169,169,
-169,169,169,169,169,169,169,169,169,169,169,169,169,169,169,169,
-169
-#ifdef __GNUC__
-};
-short int int_list12736[] = {
-#else
-,
-#endif
-169,169,169,169,169,169,169,169,169,169,169,169,169,169,169,
-169,169,169,169,169,169,169,169,169,169,169,169,169,169,169,169,
-169,169,169,169,169,169,169,169,169,169,169,169,169,169,169,169,
-169,169,169,169,169,169,169,169,169,169,169,169,169,169,169,169,
-225
-#ifdef __GNUC__
-};
-short int int_list12800[] = {
-#else
-,
-#endif
-225,225,225,225,225,225,225,225,225,225,225,225,225,225,225,
-189,189,189,189,189,189,189,189,189,189,189,189,189,189,189,189,
-189,189,189,189,189,189,189,189,189,189,189,189,189,189,189,189,
-189,189,189,189,189,189,189,189,189,189,189,189,189,189,189,189,
-189
-#ifdef __GNUC__
-};
-short int int_list12864[] = {
-#else
-,
-#endif
-189,189,189,189,189,189,189,189,189,189,189,189,189,189,189,
-189,189,189,189,189,189,189,189,189,189,189,189,189,189,189,189,
-189,189,189,189,189,189,189,189,189,189,189,189,189,189,189,189,
-189,189,189,189,189,189,189,189,189,189,189,189,189,189,189,189,
-189
-#ifdef __GNUC__
-};
-short int int_list12928[] = {
-#else
-,
-#endif
-189,189,189,189,189,189,189,189,189,189,189,189,189,189,189,
-189,189,189,189,189,189,189,189,189,189,189,189,189,189,189,189,
-189,189,189,189,189,189,189,189,189,189,189,189,189,189,189,189,
-189,189,189,189,189,189,189,189,189,189,189,189,189,189,189,189,
-189
-#ifdef __GNUC__
-};
-short int int_list12992[] = {
-#else
-,
-#endif
-189,189,189,189,189,189,189,189,189,189,189,189,189,189,189,
-189,189,189,189,189,189,189,189,189,189,189,189,189,189,189,189,
-189,189,189,189,189,189,189,189,189,189,189,189,189,189,189,189,
-189,189,189,189,189,189,189,189,189,189,189,189,189,189,189,189,
-223
-#ifdef __GNUC__
-};
-short int int_list13056[] = {
-#else
-,
-#endif
-223,223,223,223,223,223,223,223,223,223,223,223,223,223,223,
-162,162,162,162,162,162,162,162,162,162,162,162,162,162,162,162,
-162,162,162,162,162,162,162,162,162,162,162,162,162,162,162,162,
-162,162,162,162,162,162,162,162,162,162,162,162,162,162,162,162,
-162
-#ifdef __GNUC__
-};
-short int int_list13120[] = {
-#else
-,
-#endif
-162,162,162,162,162,162,162,162,162,162,162,162,162,162,162,
-162,162,162,162,162,162,162,162,162,162,162,162,162,162,162,162,
-162,162,162,162,162,162,162,162,162,162,162,162,162,162,162,162,
-162,162,162,162,162,162,162,162,162,162,162,162,162,162,162,162,
-162
-#ifdef __GNUC__
-};
-short int int_list13184[] = {
-#else
-,
-#endif
-162,162,162,162,162,162,162,162,162,162,162,162,162,162,162,
-162,162,162,162,162,162,162,162,162,162,162,162,162,162,162,162,
-162,162,162,162,162,162,162,162,162,162,162,162,162,162,162,162,
-162,162,162,162,162,162,162,162,162,162,162,162,162,162,162,162,
-162
-#ifdef __GNUC__
-};
-short int int_list13248[] = {
-#else
-,
-#endif
-162,162,162,162,162,162,162,162,162,162,162,162,162,162,162,
-162,162,162,162,162,162,162,162,162,162,162,162,162,162,162,162,
-162,162,162,162,162,162,162,162,162,162,162,162,162,162,162,162,
-162,162,162,162,162,162,162,162,162,162,162,162,162,162,162,162,
-175
-#ifdef __GNUC__
-};
-short int int_list13312[] = {
-#else
-,
-#endif
-175,175,175,175,175,175,175,175,175,175,175,175,175,175,175,
-173,173,173,173,173,173,173,173,173,173,173,173,173,173,173,173,
-173,173,173,173,173,173,173,173,173,173,173,173,173,173,173,173,
-173,173,173,173,173,173,173,173,173,173,173,173,173,173,173,173,
-173
-#ifdef __GNUC__
-};
-short int int_list13376[] = {
-#else
-,
-#endif
-173,173,173,173,173,173,173,173,173,173,173,173,173,173,173,
-173,173,173,173,173,173,173,173,173,173,173,173,173,173,173,173,
-173,173,173,173,173,173,173,173,173,173,173,173,173,173,173,173,
-173,173,173,173,173,173,173,173,173,173,173,173,173,173,173,173,
-173
-#ifdef __GNUC__
-};
-short int int_list13440[] = {
-#else
-,
-#endif
-173,173,173,173,173,173,173,173,173,173,173,173,173,173,173,
-173,173,173,173,173,173,173,173,173,173,173,173,173,173,173,173,
-173,173,173,173,173,173,173,173,173,173,173,173,173,173,173,173,
-173,173,173,173,173,173,173,173,173,173,173,173,173,173,173,173,
-173
-#ifdef __GNUC__
-};
-short int int_list13504[] = {
-#else
-,
-#endif
-173,173,173,173,173,173,173,173,173,173,173,173,173,173,173,
-173,173,173,173,173,173,173,173,173,173,173,173,173,173,173,173,
-173,173,173,173,173,173,173,173,173,173,173,173,173,173,173,173,
-173,173,173,173,173,173,173,173,173,173,173,173,173,173,173,173,
-228
-#ifdef __GNUC__
-};
-short int int_list13568[] = {
-#else
-,
-#endif
-228,228,228,228,228,228,228,228,228,228,228,228,228,228,228,
-212,212,212,212,212,212,212,212,212,212,212,212,212,212,212,212,
-212,212,212,212,212,212,212,212,212,212,212,212,212,212,212,212,
-212,212,212,212,212,212,212,212,212,212,212,212,212,212,212,212,
-212
-#ifdef __GNUC__
-};
-short int int_list13632[] = {
-#else
-,
-#endif
-212,212,212,212,212,212,212,212,212,212,212,212,212,212,212,
-212,212,212,212,212,212,212,212,212,212,212,212,212,212,212,212,
-212,212,212,212,212,212,212,212,212,212,212,212,212,212,212,212,
-212,212,212,212,212,212,212,212,212,212,212,212,212,212,212,212,
-212
-#ifdef __GNUC__
-};
-short int int_list13696[] = {
-#else
-,
-#endif
-212,212,212,212,212,212,212,212,212,212,212,212,212,212,212,
-212,212,212,212,212,212,212,212,212,212,212,212,212,212,212,212,
-212,212,212,212,212,212,212,212,212,212,212,212,212,212,212,212,
-212,212,212,212,212,212,212,212,212,212,212,212,212,212,212,212,
-212
-#ifdef __GNUC__
-};
-short int int_list13760[] = {
-#else
-,
-#endif
-212,212,212,212,212,212,212,212,212,212,212,212,212,212,212,
-212,212,212,212,212,212,212,212,212,212,212,212,212,212,212,212,
-212,212,212,212,212,212,212,212,212,212,212,212,212,212,212,212,
-212,212,212,212,212,212,212,212,212,212,212,212,212,212,212,212,
-37
-#ifdef __GNUC__
-};
-short int int_list13824[] = {
-#else
-,
-#endif
-310,310,310,310,310,310,310,310,310,310,310,310,310,310,310,
-310,310,310,310,310,310,310,310,310,310,310,310,310,310,310,310,
-310,310,310,310,310,310,310,310,310,310,310,310,310,310,310,310,
-310,310,310,310,310,310,310,310,310,310,310,310,310,310,310,310,
-310
-#ifdef __GNUC__
-};
-short int int_list13888[] = {
-#else
-,
-#endif
-310,310,310,310,310,310,310,310,310,310,310,310,310,310,310,
-310,310,310,310,310,310,310,310,310,310,310,310,310,310,310,310,
-310,310,310,310,310,310,310,310,310,310,310,310,310,310,310,310,
-310,310,310,310,310,310,310,310,310,310,310,310,310,310,310,310,
-310
-#ifdef __GNUC__
-};
-short int int_list13952[] = {
-#else
-,
-#endif
-310,310,310,310,310,310,310,310,310,310,310,310,310,310,310,
-310,310,310,310,310,310,310,310,310,310,310,310,310,310,310,310,
-310,310,310,310,310,310,310,310,310,310,310,310,310,310,310,310,
-310,310,310,310,310,310,310,310,310,310,310,310,310,310,310,310,
-310
-#ifdef __GNUC__
-};
-short int int_list14016[] = {
-#else
-,
-#endif
-310,310,310,310,310,310,310,310,310,310,310,310,310,310,310,
-310,310,310,310,310,310,310,310,310,310,310,310,310,310,310,310,
-310,310,310,310,310,310,310,310,310,310,310,310,310,310,310,310,
-310,310,310,310,310,310,310,310,310,310,310,310,310,310,310,310,
-227
-#ifdef __GNUC__
-};
-short int int_list14080[] = {
-#else
-,
-#endif
-227,227,227,227,227,227,227,227,227,227,227,227,227,227,227,
-205,205,205,205,205,205,205,205,205,205,205,205,205,205,205,205,
-205,205,205,205,205,205,205,205,205,205,205,205,205,205,205,205,
-205,205,205,205,205,205,205,205,205,205,205,205,205,205,205,205,
-205
-#ifdef __GNUC__
-};
-short int int_list14144[] = {
-#else
-,
-#endif
-205,205,205,205,205,205,205,205,205,205,205,205,205,205,205,
-205,205,205,205,205,205,205,205,205,205,205,205,205,205,205,205,
-205,205,205,205,205,205,205,205,205,205,205,205,205,205,205,205,
-205,205,205,205,205,205,205,205,205,205,205,205,205,205,205,205,
-205
-#ifdef __GNUC__
-};
-short int int_list14208[] = {
-#else
-,
-#endif
-205,205,205,205,205,205,205,205,205,205,205,205,205,205,205,
-205,205,205,205,205,205,205,205,205,205,205,205,205,205,205,205,
-205,205,205,205,205,205,205,205,205,205,205,205,205,205,205,205,
-205,205,205,205,205,205,205,205,205,205,205,205,205,205,205,205,
-205
-#ifdef __GNUC__
-};
-short int int_list14272[] = {
-#else
-,
-#endif
-205,205,205,205,205,205,205,205,205,205,205,205,205,205,205,
-205,205,205,205,205,205,205,205,205,205,205,205,205,205,205,205,
-205,205,205,205,205,205,205,205,205,205,205,205,205,205,205,205,
-205,205,205,205,205,205,205,205,205,205,205,205,205,205,205,205,
-311
-#ifdef __GNUC__
-};
-short int int_list14336[] = {
-#else
-,
-#endif
-311,311,311,311,311,311,311,311,311,311,311,311,311,311,311,
-311,311,311,311,311,311,311,311,311,311,311,311,311,311,311,311,
-311,311,311,311,311,311,311,311,311,311,311,311,311,311,311,311,
-311,311,311,311,311,311,311,311,311,311,311,311,311,311,311,311,
-311
-#ifdef __GNUC__
-};
-short int int_list14400[] = {
-#else
-,
-#endif
-311,311,311,311,311,311,311,311,311,311,311,311,311,311,311,
-311,311,311,311,311,311,311,311,311,311,311,311,311,311,311,311,
-311,311,311,311,311,311,311,311,311,311,311,311,311,311,311,311,
-311,311,311,311,311,311,311,311,311,311,311,311,311,311,311,311,
-311
-#ifdef __GNUC__
-};
-short int int_list14464[] = {
-#else
-,
-#endif
-311,311,311,311,311,311,311,311,311,311,311,311,311,311,311,
-311,311,311,311,311,311,311,311,311,311,311,311,311,311,311,311,
-311,311,311,311,311,311,311,311,311,311,311,311,311,311,311,311,
-311,311,311,311,311,311,311,311,311,311,311,311,311,311,311,311,
-311
-#ifdef __GNUC__
-};
-short int int_list14528[] = {
-#else
-,
-#endif
-311,311,311,311,311,311,311,311,311,311,311,311,311,311,311,
-311,311,311,311,311,311,311,311,311,311,311,311,311,311,311,311,
-311,311,311,311,311,311,311,311,311,311,311,311,311,311,311,311,
-311,311,311,311,311,311,311,311,311,311,311,311,311,311,311,311,
--1
-#ifdef __GNUC__
-};
-short int int_list14592[] = {
-#else
-,
-#endif
--1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
-220,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
-220,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
-220,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
-220
-#ifdef __GNUC__
-};
-short int int_list14656[] = {
-#else
-,
-#endif
--1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
-220,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
-220,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
-220,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
-220
-#ifdef __GNUC__
-};
-short int int_list14720[] = {
-#else
-,
-#endif
--1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
-220,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
-220,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
-220,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
-220
-#ifdef __GNUC__
-};
-short int int_list14784[] = {
-#else
-,
-#endif
--1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
-220,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
-220,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
-220,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
--1
-#ifdef __GNUC__
-};
-short int int_list14848[] = {
-#else
-,
-#endif
--1,-1,-1,138,338,265,351,-1,-1,-1,-1,-1,-1,-1,-1,
-149,342,269,354,138,338,265,351,148,-1,267,353,-1,-1,-1,-1,
-149,342,269,354,138,338,265,351,148,-1,267,353,-1,-1,-1,-1,
-149,342,269,354,138,338,265,351,148,-1,267,353,-1,-1,-1,-1,
-149
-#ifdef __GNUC__
-};
-short int int_list14912[] = {
-#else
-,
-#endif
-342,269,354,138,338,265,351,148,-1,267,353,-1,-1,-1,-1,
-149,342,269,354,138,338,265,351,148,-1,267,353,-1,-1,-1,-1,
-149,342,269,354,138,338,265,351,148,-1,267,353,-1,-1,-1,-1,
-149,342,269,354,138,338,265,351,148,-1,267,353,-1,-1,-1,-1,
-149
-#ifdef __GNUC__
-};
-short int int_list14976[] = {
-#else
-,
-#endif
-342,269,354,138,338,265,351,148,-1,267,353,-1,-1,-1,-1,
-149,342,269,354,138,338,265,351,148,-1,267,353,-1,-1,-1,-1,
-149,342,269,354,138,338,265,351,148,-1,267,353,-1,-1,-1,-1,
-149,342,269,354,138,338,265,351,148,-1,267,353,-1,-1,-1,-1,
-149
-#ifdef __GNUC__
-};
-short int int_list15040[] = {
-#else
-,
-#endif
-342,269,354,138,338,265,351,148,-1,267,353,-1,-1,-1,-1,
-149,342,269,354,138,338,265,351,148,-1,267,353,-1,-1,-1,-1,
-149,342,269,354,138,338,265,351,148,-1,267,353,-1,-1,-1,-1,
-149,342,269,354,138,338,265,351,148,-1,267,353,-1,-1,-1,-1,
--1
-#ifdef __GNUC__
-};
-short int int_list15104[] = {
-#else
-,
-#endif
--1,-1,-1,-1,339,263,350,-1,-1,-1,-1,-1,-1,-1,-1,
--1,-1,268,-1,-1,339,263,350,147,-1,266,352,-1,-1,-1,-1,
--1,-1,268,-1,-1,339,263,350,147,-1,266,352,-1,-1,-1,-1,
--1,-1,268,-1,-1,339,263,350,147,-1,266,352,-1,-1,-1,-1,
--1
-#ifdef __GNUC__
-};
-short int int_list15168[] = {
-#else
-,
-#endif
--1,268,-1,-1,339,263,350,147,-1,266,352,-1,-1,-1,-1,
--1,-1,268,-1,-1,339,263,350,147,-1,266,352,-1,-1,-1,-1,
--1,-1,268,-1,-1,339,263,350,147,-1,266,352,-1,-1,-1,-1,
--1,-1,268,-1,-1,339,263,350,147,-1,266,352,-1,-1,-1,-1,
--1
-#ifdef __GNUC__
-};
-short int int_list15232[] = {
-#else
-,
-#endif
--1,268,-1,-1,339,263,350,147,-1,266,352,-1,-1,-1,-1,
--1,-1,268,-1,-1,339,263,350,147,-1,266,352,-1,-1,-1,-1,
--1,-1,268,-1,-1,339,263,350,147,-1,266,352,-1,-1,-1,-1,
--1,-1,268,-1,-1,339,263,350,147,-1,266,352,-1,-1,-1,-1,
--1
-#ifdef __GNUC__
-};
-short int int_list15296[] = {
-#else
-,
-#endif
--1,268,-1,-1,339,263,350,147,-1,266,352,-1,-1,-1,-1,
--1,-1,268,-1,-1,339,263,350,147,-1,266,352,-1,-1,-1,-1,
--1,-1,268,-1,-1,339,263,350,147,-1,266,352,-1,-1,-1,-1,
--1,-1,268,-1,-1,339,263,350,147,-1,266,352,-1,-1,-1,-1,
--1
-#ifdef __GNUC__
-};
-short int int_list15360[] = {
-#else
-,
-#endif
--1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
-137,137,137,137,137,137,137,137,137,137,137,137,137,137,137,137,
-137,137,137,137,137,137,137,137,137,137,137,137,137,137,137,137,
-137,137,137,137,137,137,137,137,137,137,137,137,137,137,137,137,
-137
-#ifdef __GNUC__
-};
-short int int_list15424[] = {
-#else
-,
-#endif
-137,137,137,137,137,137,137,137,137,137,137,137,137,137,137,
-137,137,137,137,137,137,137,137,137,137,137,137,137,137,137,137,
-137,137,137,137,137,137,137,137,137,137,137,137,137,137,137,137,
-137,137,137,137,137,137,137,137,137,137,137,137,137,137,137,137,
-137
-#ifdef __GNUC__
-};
-short int int_list15488[] = {
-#else
-,
-#endif
-137,137,137,137,137,137,137,137,137,137,137,137,137,137,137,
-137,137,137,137,137,137,137,137,137,137,137,137,137,137,137,137,
-137,137,137,137,137,137,137,137,137,137,137,137,137,137,137,137,
-137,137,137,137,137,137,137,137,137,137,137,137,137,137,137,137,
-137
-#ifdef __GNUC__
-};
-short int int_list15552[] = {
-#else
-,
-#endif
-137,137,137,137,137,137,137,137,137,137,137,137,137,137,137,
-137,137,137,137,137,137,137,137,137,137,137,137,137,137,137,137,
-137,137,137,137,137,137,137,137,137,137,137,137,137,137,137,137,
-137,137,137,137,137,137,137,137,137,137,137,137,137,137,137,137,
--1
-#ifdef __GNUC__
-};
-short int int_list15616[] = {
-#else
-,
-#endif
--1,-1,-1,136,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
-135,135,135,135,135,135,135,135,135,135,135,135,135,135,135,135,
-135,135,135,135,135,135,135,135,135,135,135,135,135,135,135,135,
-135,135,135,135,135,135,135,135,135,135,135,135,135,135,135,135,
-135
-#ifdef __GNUC__
-};
-short int int_list15680[] = {
-#else
-,
-#endif
-135,135,135,135,135,135,135,135,135,135,135,135,135,135,135,
-135,135,135,135,135,135,135,135,135,135,135,135,135,135,135,135,
-135,135,135,135,135,135,135,135,135,135,135,135,135,135,135,135,
-135,135,135,135,135,135,135,135,135,135,135,135,135,135,135,135,
-135
-#ifdef __GNUC__
-};
-short int int_list15744[] = {
-#else
-,
-#endif
-135,135,135,135,135,135,135,135,135,135,135,135,135,135,135,
-135,135,135,135,135,135,135,135,135,135,135,135,135,135,135,135,
-135,135,135,135,135,135,135,135,135,135,135,135,135,135,135,135,
-135,135,135,135,135,135,135,135,135,135,135,135,135,135,135,135,
-135
-#ifdef __GNUC__
-};
-short int int_list15808[] = {
-#else
-,
-#endif
-135,135,135,135,135,135,135,135,135,135,135,135,135,135,135,
-135,135,135,135,135,135,135,135,135,135,135,135,135,135,135,135,
-135,135,135,135,135,135,135,135,135,135,135,135,135,135,135,135,
-135,135,135,135,135,135,135,135,135,135,135,135,135,135,135,135,
--1
-#ifdef __GNUC__
-};
-short int int_list15872[] = {
-#else
-,
-#endif
--1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
-264,264,264,264,264,264,264,264,264,264,264,264,264,264,264,264,
-264,264,264,264,264,264,264,264,264,264,264,264,264,264,264,264,
-264,264,264,264,264,264,264,264,264,264,264,264,264,264,264,264,
-264
-#ifdef __GNUC__
-};
-short int int_list15936[] = {
-#else
-,
-#endif
-264,264,264,264,264,264,264,264,264,264,264,264,264,264,264,
-264,264,264,264,264,264,264,264,264,264,264,264,264,264,264,264,
-264,264,264,264,264,264,264,264,264,264,264,264,264,264,264,264,
-264,264,264,264,264,264,264,264,264,264,264,264,264,264,264,264,
-264
-#ifdef __GNUC__
-};
-short int int_list16000[] = {
-#else
-,
-#endif
-264,264,264,264,264,264,264,264,264,264,264,264,264,264,264,
-264,264,264,264,264,264,264,264,264,264,264,264,264,264,264,264,
-264,264,264,264,264,264,264,264,264,264,264,264,264,264,264,264,
-264,264,264,264,264,264,264,264,264,264,264,264,264,264,264,264,
-264
-#ifdef __GNUC__
-};
-short int int_list16064[] = {
-#else
-,
-#endif
-264,264,264,264,264,264,264,264,264,264,264,264,264,264,264,
-264,264,264,264,264,264,264,264,264,264,264,264,264,264,264,264,
-264,264,264,264,264,264,264,264,264,264,264,264,264,264,264,264,
-264,264,264,264,264,264,264,264,264,264,264,264,264,264,264,264,
--1
-#ifdef __GNUC__
-};
-short int int_list16128[] = {
-#else
-,
-#endif
--1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
-262,262,262,262,262,262,262,262,262,262,262,262,262,262,262,262,
-262,262,262,262,262,262,262,262,262,262,262,262,262,262,262,262,
-262,262,262,262,262,262,262,262,262,262,262,262,262,262,262,262,
-262
-#ifdef __GNUC__
-};
-short int int_list16192[] = {
-#else
-,
-#endif
-262,262,262,262,262,262,262,262,262,262,262,262,262,262,262,
-262,262,262,262,262,262,262,262,262,262,262,262,262,262,262,262,
-262,262,262,262,262,262,262,262,262,262,262,262,262,262,262,262,
-262,262,262,262,262,262,262,262,262,262,262,262,262,262,262,262,
-262
-#ifdef __GNUC__
-};
-short int int_list16256[] = {
-#else
-,
-#endif
-262,262,262,262,262,262,262,262,262,262,262,262,262,262,262,
-262,262,262,262,262,262,262,262,262,262,262,262,262,262,262,262,
-262,262,262,262,262,262,262,262,262,262,262,262,262,262,262,262,
-262,262,262,262,262,262,262,262,262,262,262,262,262,262,262,262,
-262
-#ifdef __GNUC__
-};
-short int int_list16320[] = {
-#else
-,
-#endif
-262,262,262,262,262,262,262,262,262,262,262,262,262,262,262,
-262,262,262,262,262,262,262,262,262,262,262,262,262,262,262,262,
-262,262,262,262,262,262,262,262,262,262,262,262,262,262,262,262,
-262,262,262,262,262,262,262,262,262,262,262,262,262,262,262,262,
-8
-#ifdef __GNUC__
-};
-short int int_list16384[] = {
-#else
-,
-#endif
-8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,
-9,9,9,9,9,9,9,9,9,9,9,9,9,9,9,9,
-9,9,9,9,9,9,9,9,9,9,9,9,9,9,9,9,
-9,9,9,9,9,9,9,9,9,9,9,9,9,9,9,9,
-9
-#ifdef __GNUC__
-};
-short int int_list16448[] = {
-#else
-,
-#endif
-9,9,9,9,9,9,9,9,9,9,9,9,9,9,9,
-9,9,9,9,9,9,9,9,9,9,9,9,9,9,9,9,
-9,9,9,9,9,9,9,9,9,9,9,9,9,9,9,9,
-9,9,9,9,9,9,9,9,9,9,9,9,9,9,9,9,
-9
-#ifdef __GNUC__
-};
-short int int_list16512[] = {
-#else
-,
-#endif
-9,9,9,9,9,9,9,9,9,9,9,9,9,9,9,
-9,9,9,9,9,9,9,9,9,9,9,9,9,9,9,9,
-9,9,9,9,9,9,9,9,9,9,9,9,9,9,9,9,
-9,9,9,9,9,9,9,9,9,9,9,9,9,9,9,9,
-9
-#ifdef __GNUC__
-};
-short int int_list16576[] = {
-#else
-,
-#endif
-9,9,9,9,9,9,9,9,9,9,9,9,9,9,9,
-9,9,9,9,9,9,9,9,9,9,9,9,9,9,9,9,
-9,9,9,9,9,9,9,9,9,9,9,9,9,9,9,9,
-9,9,9,9,9,9,9,9,9,9,9,9,9,9,9,9,
-3
-#ifdef __GNUC__
-};
-short int int_list16640[] = {
-#else
-,
-#endif
-3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,
-4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,
-4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,
-4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,
-4
-#ifdef __GNUC__
-};
-short int int_list16704[] = {
-#else
-,
-#endif
-4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,
-4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,
-4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,
-4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,
-4
-#ifdef __GNUC__
-};
-short int int_list16768[] = {
-#else
-,
-#endif
-4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,
-4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,
-4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,
-4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,
-4
-#ifdef __GNUC__
-};
-short int int_list16832[] = {
-#else
-,
-#endif
-4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,
-4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,
-4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,
-4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,
-368
-#ifdef __GNUC__
-};
-short int int_list16896[] = {
-#else
-,
-#endif
-368,368,368,368,368,368,368,368,368,368,368,368,368,368,368,
-369,369,369,369,369,369,369,369,369,369,369,369,369,369,369,369,
-369,369,369,369,369,369,369,369,369,369,369,369,369,369,369,369,
-369,369,369,369,369,369,369,369,369,369,369,369,369,369,369,369,
-369
-#ifdef __GNUC__
-};
-short int int_list16960[] = {
-#else
-,
-#endif
-369,369,369,369,369,369,369,369,369,369,369,369,369,369,369,
-369,369,369,369,369,369,369,369,369,369,369,369,369,369,369,369,
-369,369,369,369,369,369,369,369,369,369,369,369,369,369,369,369,
-369,369,369,369,369,369,369,369,369,369,369,369,369,369,369,369,
-369
-#ifdef __GNUC__
-};
-short int int_list17024[] = {
-#else
-,
-#endif
-369,369,369,369,369,369,369,369,369,369,369,369,369,369,369,
-369,369,369,369,369,369,369,369,369,369,369,369,369,369,369,369,
-369,369,369,369,369,369,369,369,369,369,369,369,369,369,369,369,
-369,369,369,369,369,369,369,369,369,369,369,369,369,369,369,369,
-369
-#ifdef __GNUC__
-};
-short int int_list17088[] = {
-#else
-,
-#endif
-369,369,369,369,369,369,369,369,369,369,369,369,369,369,369,
-369,369,369,369,369,369,369,369,369,369,369,369,369,369,369,369,
-369,369,369,369,369,369,369,369,369,369,369,369,369,369,369,369,
-369,369,369,369,369,369,369,369,369,369,369,369,369,369,369,369,
-363
-#ifdef __GNUC__
-};
-short int int_list17152[] = {
-#else
-,
-#endif
-363,363,363,363,363,363,363,363,363,363,363,363,363,363,363,
-364,364,364,364,364,364,364,364,364,364,364,364,364,364,364,364,
-364,364,364,364,364,364,364,364,364,364,364,364,364,364,364,364,
-364,364,364,364,364,364,364,364,364,364,364,364,364,364,364,364,
-364
-#ifdef __GNUC__
-};
-short int int_list17216[] = {
-#else
-,
-#endif
-364,364,364,364,364,364,364,364,364,364,364,364,364,364,364,
-364,364,364,364,364,364,364,364,364,364,364,364,364,364,364,364,
-364,364,364,364,364,364,364,364,364,364,364,364,364,364,364,364,
-364,364,364,364,364,364,364,364,364,364,364,364,364,364,364,364,
-364
-#ifdef __GNUC__
-};
-short int int_list17280[] = {
-#else
-,
-#endif
-364,364,364,364,364,364,364,364,364,364,364,364,364,364,364,
-364,364,364,364,364,364,364,364,364,364,364,364,364,364,364,364,
-364,364,364,364,364,364,364,364,364,364,364,364,364,364,364,364,
-364,364,364,364,364,364,364,364,364,364,364,364,364,364,364,364,
-364
-#ifdef __GNUC__
-};
-short int int_list17344[] = {
-#else
-,
-#endif
-364,364,364,364,364,364,364,364,364,364,364,364,364,364,364,
-364,364,364,364,364,364,364,364,364,364,364,364,364,364,364,364,
-364,364,364,364,364,364,364,364,364,364,364,364,364,364,364,364,
-364,364,364,364,364,364,364,364,364,364,364,364,364,364,364,364,
-258
-#ifdef __GNUC__
-};
-short int int_list17408[] = {
-#else
-,
-#endif
-258,258,258,258,258,258,258,258,258,258,258,258,258,258,258,
-259,259,259,259,259,259,259,259,259,259,259,259,259,259,259,259,
-259,259,259,259,259,259,259,259,259,259,259,259,259,259,259,259,
-259,259,259,259,259,259,259,259,259,259,259,259,259,259,259,259,
-259
-#ifdef __GNUC__
-};
-short int int_list17472[] = {
-#else
-,
-#endif
-259,259,259,259,259,259,259,259,259,259,259,259,259,259,259,
-259,259,259,259,259,259,259,259,259,259,259,259,259,259,259,259,
-259,259,259,259,259,259,259,259,259,259,259,259,259,259,259,259,
-259,259,259,259,259,259,259,259,259,259,259,259,259,259,259,259,
-259
-#ifdef __GNUC__
-};
-short int int_list17536[] = {
-#else
-,
-#endif
-259,259,259,259,259,259,259,259,259,259,259,259,259,259,259,
-259,259,259,259,259,259,259,259,259,259,259,259,259,259,259,259,
-259,259,259,259,259,259,259,259,259,259,259,259,259,259,259,259,
-259,259,259,259,259,259,259,259,259,259,259,259,259,259,259,259,
-259
-#ifdef __GNUC__
-};
-short int int_list17600[] = {
-#else
-,
-#endif
-259,259,259,259,259,259,259,259,259,259,259,259,259,259,259,
-259,259,259,259,259,259,259,259,259,259,259,259,259,259,259,259,
-259,259,259,259,259,259,259,259,259,259,259,259,259,259,259,259,
-259,259,259,259,259,259,259,259,259,259,259,259,259,259,259,259,
-253
-#ifdef __GNUC__
-};
-short int int_list17664[] = {
-#else
-,
-#endif
-253,253,253,253,253,253,253,253,253,253,253,253,253,253,253,
-254,254,254,254,254,254,254,254,254,254,254,254,254,254,254,254,
-254,254,254,254,254,254,254,254,254,254,254,254,254,254,254,254,
-254,254,254,254,254,254,254,254,254,254,254,254,254,254,254,254,
-254
-#ifdef __GNUC__
-};
-short int int_list17728[] = {
-#else
-,
-#endif
-254,254,254,254,254,254,254,254,254,254,254,254,254,254,254,
-254,254,254,254,254,254,254,254,254,254,254,254,254,254,254,254,
-254,254,254,254,254,254,254,254,254,254,254,254,254,254,254,254,
-254,254,254,254,254,254,254,254,254,254,254,254,254,254,254,254,
-254
-#ifdef __GNUC__
-};
-short int int_list17792[] = {
-#else
-,
-#endif
-254,254,254,254,254,254,254,254,254,254,254,254,254,254,254,
-254,254,254,254,254,254,254,254,254,254,254,254,254,254,254,254,
-254,254,254,254,254,254,254,254,254,254,254,254,254,254,254,254,
-254,254,254,254,254,254,254,254,254,254,254,254,254,254,254,254,
-254
-#ifdef __GNUC__
-};
-short int int_list17856[] = {
-#else
-,
-#endif
-254,254,254,254,254,254,254,254,254,254,254,254,254,254,254,
-254,254,254,254,254,254,254,254,254,254,254,254,254,254,254,254,
-254,254,254,254,254,254,254,254,254,254,254,254,254,254,254,254,
-254,254,254,254,254,254,254,254,254,254,254,254,254,254,254,254,
-23
-#ifdef __GNUC__
-};
-short int int_list17920[] = {
-#else
-,
-#endif
-23,23,23,23,23,23,23,23,23,23,23,23,23,23,23,
-24,24,24,24,24,24,24,24,24,24,24,24,24,24,24,24,
-24,24,24,24,24,24,24,24,24,24,24,24,24,24,24,24,
-24,24,24,24,24,24,24,24,24,24,24,24,24,24,24,24,
-24
-#ifdef __GNUC__
-};
-short int int_list17984[] = {
-#else
-,
-#endif
-24,24,24,24,24,24,24,24,24,24,24,24,24,24,24,
-24,24,24,24,24,24,24,24,24,24,24,24,24,24,24,24,
-24,24,24,24,24,24,24,24,24,24,24,24,24,24,24,24,
-24,24,24,24,24,24,24,24,24,24,24,24,24,24,24,24,
-24
-#ifdef __GNUC__
-};
-short int int_list18048[] = {
-#else
-,
-#endif
-24,24,24,24,24,24,24,24,24,24,24,24,24,24,24,
-24,24,24,24,24,24,24,24,24,24,24,24,24,24,24,24,
-24,24,24,24,24,24,24,24,24,24,24,24,24,24,24,24,
-24,24,24,24,24,24,24,24,24,24,24,24,24,24,24,24,
-24
-#ifdef __GNUC__
-};
-short int int_list18112[] = {
-#else
-,
-#endif
-24,24,24,24,24,24,24,24,24,24,24,24,24,24,24,
-24,24,24,24,24,24,24,24,24,24,24,24,24,24,24,24,
-24,24,24,24,24,24,24,24,24,24,24,24,24,24,24,24,
-24,24,24,24,24,24,24,24,24,24,24,24,24,24,24,24,
-18
-#ifdef __GNUC__
-};
-short int int_list18176[] = {
-#else
-,
-#endif
-18,18,18,18,18,18,18,18,18,18,18,18,18,18,18,
-19,19,19,19,19,19,19,19,19,19,19,19,19,19,19,19,
-19,19,19,19,19,19,19,19,19,19,19,19,19,19,19,19,
-19,19,19,19,19,19,19,19,19,19,19,19,19,19,19,19,
-19
-#ifdef __GNUC__
-};
-short int int_list18240[] = {
-#else
-,
-#endif
-19,19,19,19,19,19,19,19,19,19,19,19,19,19,19,
-19,19,19,19,19,19,19,19,19,19,19,19,19,19,19,19,
-19,19,19,19,19,19,19,19,19,19,19,19,19,19,19,19,
-19,19,19,19,19,19,19,19,19,19,19,19,19,19,19,19,
-19
-#ifdef __GNUC__
-};
-short int int_list18304[] = {
-#else
-,
-#endif
-19,19,19,19,19,19,19,19,19,19,19,19,19,19,19,
-19,19,19,19,19,19,19,19,19,19,19,19,19,19,19,19,
-19,19,19,19,19,19,19,19,19,19,19,19,19,19,19,19,
-19,19,19,19,19,19,19,19,19,19,19,19,19,19,19,19,
-19
-#ifdef __GNUC__
-};
-short int int_list18368[] = {
-#else
-,
-#endif
-19,19,19,19,19,19,19,19,19,19,19,19,19,19,19,
-19,19,19,19,19,19,19,19,19,19,19,19,19,19,19,19,
-19,19,19,19,19,19,19,19,19,19,19,19,19,19,19,19,
-19,19,19,19,19,19,19,19,19,19,19,19,19,19,19,19,
-413
-#ifdef __GNUC__
-};
-short int int_list18432[] = {
-#else
-,
-#endif
-413,413,413,413,413,413,413,413,413,413,413,413,413,413,413,
-414,414,414,414,414,414,414,414,414,414,414,414,414,414,414,414,
-414,414,414,414,414,414,414,414,414,414,414,414,414,414,414,414,
-414,414,414,414,414,414,414,414,414,414,414,414,414,414,414,414,
-414
-#ifdef __GNUC__
-};
-short int int_list18496[] = {
-#else
-,
-#endif
-414,414,414,414,414,414,414,414,414,414,414,414,414,414,414,
-414,414,414,414,414,414,414,414,414,414,414,414,414,414,414,414,
-414,414,414,414,414,414,414,414,414,414,414,414,414,414,414,414,
-414,414,414,414,414,414,414,414,414,414,414,414,414,414,414,414,
-414
-#ifdef __GNUC__
-};
-short int int_list18560[] = {
-#else
-,
-#endif
-414,414,414,414,414,414,414,414,414,414,414,414,414,414,414,
-414,414,414,414,414,414,414,414,414,414,414,414,414,414,414,414,
-414,414,414,414,414,414,414,414,414,414,414,414,414,414,414,414,
-414,414,414,414,414,414,414,414,414,414,414,414,414,414,414,414,
-414
-#ifdef __GNUC__
-};
-short int int_list18624[] = {
-#else
-,
-#endif
-414,414,414,414,414,414,414,414,414,414,414,414,414,414,414,
-414,414,414,414,414,414,414,414,414,414,414,414,414,414,414,414,
-414,414,414,414,414,414,414,414,414,414,414,414,414,414,414,414,
-414,414,414,414,414,414,414,414,414,414,414,414,414,414,414,414,
-408
-#ifdef __GNUC__
-};
-short int int_list18688[] = {
-#else
-,
-#endif
-408,408,408,408,408,408,408,408,408,408,408,408,408,408,408,
-409,409,409,409,409,409,409,409,409,409,409,409,409,409,409,409,
-409,409,409,409,409,409,409,409,409,409,409,409,409,409,409,409,
-409,409,409,409,409,409,409,409,409,409,409,409,409,409,409,409,
-409
-#ifdef __GNUC__
-};
-short int int_list18752[] = {
-#else
-,
-#endif
-409,409,409,409,409,409,409,409,409,409,409,409,409,409,409,
-409,409,409,409,409,409,409,409,409,409,409,409,409,409,409,409,
-409,409,409,409,409,409,409,409,409,409,409,409,409,409,409,409,
-409,409,409,409,409,409,409,409,409,409,409,409,409,409,409,409,
-409
-#ifdef __GNUC__
-};
-short int int_list18816[] = {
-#else
-,
-#endif
-409,409,409,409,409,409,409,409,409,409,409,409,409,409,409,
-409,409,409,409,409,409,409,409,409,409,409,409,409,409,409,409,
-409,409,409,409,409,409,409,409,409,409,409,409,409,409,409,409,
-409,409,409,409,409,409,409,409,409,409,409,409,409,409,409,409,
-409
-#ifdef __GNUC__
-};
-short int int_list18880[] = {
-#else
-,
-#endif
-409,409,409,409,409,409,409,409,409,409,409,409,409,409,409,
-409,409,409,409,409,409,409,409,409,409,409,409,409,409,409,409,
-409,409,409,409,409,409,409,409,409,409,409,409,409,409,409,409,
-409,409,409,409,409,409,409,409,409,409,409,409,409,409,409,409,
-71
-#ifdef __GNUC__
-};
-short int int_list18944[] = {
-#else
-,
-#endif
-71,71,71,71,71,71,71,71,71,71,71,71,71,71,71,
-72,72,72,72,72,72,72,72,72,72,72,72,72,72,72,72,
-72,72,72,72,72,72,72,72,72,72,72,72,72,72,72,72,
-72,72,72,72,72,72,72,72,72,72,72,72,72,72,72,72,
-72
-#ifdef __GNUC__
-};
-short int int_list19008[] = {
-#else
-,
-#endif
-72,72,72,72,72,72,72,72,72,72,72,72,72,72,72,
-72,72,72,72,72,72,72,72,72,72,72,72,72,72,72,72,
-72,72,72,72,72,72,72,72,72,72,72,72,72,72,72,72,
-72,72,72,72,72,72,72,72,72,72,72,72,72,72,72,72,
-72
-#ifdef __GNUC__
-};
-short int int_list19072[] = {
-#else
-,
-#endif
-72,72,72,72,72,72,72,72,72,72,72,72,72,72,72,
-72,72,72,72,72,72,72,72,72,72,72,72,72,72,72,72,
-72,72,72,72,72,72,72,72,72,72,72,72,72,72,72,72,
-72,72,72,72,72,72,72,72,72,72,72,72,72,72,72,72,
-72
-#ifdef __GNUC__
-};
-short int int_list19136[] = {
-#else
-,
-#endif
-72,72,72,72,72,72,72,72,72,72,72,72,72,72,72,
-72,72,72,72,72,72,72,72,72,72,72,72,72,72,72,72,
-72,72,72,72,72,72,72,72,72,72,72,72,72,72,72,72,
-72,72,72,72,72,72,72,72,72,72,72,72,72,72,72,72,
-63
-#ifdef __GNUC__
-};
-short int int_list19200[] = {
-#else
-,
-#endif
-63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,
-64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,
-64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,
-64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,
-64
-#ifdef __GNUC__
-};
-short int int_list19264[] = {
-#else
-,
-#endif
-64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,
-64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,
-64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,
-64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,
-64
-#ifdef __GNUC__
-};
-short int int_list19328[] = {
-#else
-,
-#endif
-64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,
-64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,
-64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,
-64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,
-64
-#ifdef __GNUC__
-};
-short int int_list19392[] = {
-#else
-,
-#endif
-64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,
-64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,
-64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,
-64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,
-55
-#ifdef __GNUC__
-};
-short int int_list19456[] = {
-#else
-,
-#endif
-69,248,-1,384,180,404,-1,47,-1,-1,-1,-1,-1,-1,-1,
-56,68,249,-1,385,178,405,-1,48,-1,-1,-1,-1,-1,-1,-1,
-56,68,249,-1,385,178,405,-1,48,-1,-1,-1,-1,-1,-1,-1,
-56,68,249,-1,385,178,405,-1,48,-1,-1,-1,-1,-1,-1,-1,
-56
-#ifdef __GNUC__
-};
-short int int_list19520[] = {
-#else
-,
-#endif
-68,249,-1,385,178,405,-1,48,-1,-1,-1,-1,-1,-1,-1,
-56,68,249,-1,385,178,405,-1,48,-1,-1,-1,-1,-1,-1,-1,
-56,68,249,-1,385,178,405,-1,48,-1,-1,-1,-1,-1,-1,-1,
-56,68,249,-1,385,178,405,-1,48,-1,-1,-1,-1,-1,-1,-1,
-56
-#ifdef __GNUC__
-};
-short int int_list19584[] = {
-#else
-,
-#endif
-68,249,-1,385,178,405,-1,48,-1,-1,-1,-1,-1,-1,-1,
-56,68,249,-1,385,178,405,-1,48,-1,-1,-1,-1,-1,-1,-1,
-56,68,249,-1,385,178,405,-1,48,-1,-1,-1,-1,-1,-1,-1,
-56,68,249,-1,385,178,405,-1,48,-1,-1,-1,-1,-1,-1,-1,
-56
-#ifdef __GNUC__
-};
-short int int_list19648[] = {
-#else
-,
-#endif
-68,249,-1,385,178,405,-1,48,-1,-1,-1,-1,-1,-1,-1,
-56,68,249,-1,385,178,405,-1,48,-1,-1,-1,-1,-1,-1,-1,
-56,68,249,-1,385,178,405,-1,48,-1,-1,-1,-1,-1,-1,-1,
-56,68,249,-1,385,178,405,-1,48,-1,-1,-1,-1,-1,-1,-1,
-51
-#ifdef __GNUC__
-};
-short int int_list19712[] = {
-#else
-,
-#endif
-61,244,-1,380,160,400,-1,43,-1,-1,-1,-1,-1,-1,-1,
-52,60,245,-1,381,158,401,-1,44,-1,-1,-1,-1,-1,-1,-1,
-52,60,245,-1,381,158,401,-1,44,-1,-1,-1,-1,-1,-1,-1,
-52,60,245,-1,381,158,401,-1,44,-1,-1,-1,-1,-1,-1,-1,
-52
-#ifdef __GNUC__
-};
-short int int_list19776[] = {
-#else
-,
-#endif
-60,245,-1,381,158,401,-1,44,-1,-1,-1,-1,-1,-1,-1,
-52,60,245,-1,381,158,401,-1,44,-1,-1,-1,-1,-1,-1,-1,
-52,60,245,-1,381,158,401,-1,44,-1,-1,-1,-1,-1,-1,-1,
-52,60,245,-1,381,158,401,-1,44,-1,-1,-1,-1,-1,-1,-1,
-52
-#ifdef __GNUC__
-};
-short int int_list19840[] = {
-#else
-,
-#endif
-60,245,-1,381,158,401,-1,44,-1,-1,-1,-1,-1,-1,-1,
-52,60,245,-1,381,158,401,-1,44,-1,-1,-1,-1,-1,-1,-1,
-52,60,245,-1,381,158,401,-1,44,-1,-1,-1,-1,-1,-1,-1,
-52,60,245,-1,381,158,401,-1,44,-1,-1,-1,-1,-1,-1,-1,
-52
-#ifdef __GNUC__
-};
-short int int_list19904[] = {
-#else
-,
-#endif
-60,245,-1,381,158,401,-1,44,-1,-1,-1,-1,-1,-1,-1,
-52,60,245,-1,381,158,401,-1,44,-1,-1,-1,-1,-1,-1,-1,
-52,60,245,-1,381,158,401,-1,44,-1,-1,-1,-1,-1,-1,-1,
-52,60,245,-1,381,158,401,-1,44,-1,-1,-1,-1,-1,-1,-1,
--1
-#ifdef __GNUC__
-};
-short int int_list19968[] = {
-#else
-,
-#endif
--1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
--1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
--1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
--1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
--1
-#ifdef __GNUC__
-};
-short int int_list20032[] = {
-#else
-,
-#endif
--1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
--1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
--1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
--1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
--1
-#ifdef __GNUC__
-};
-short int int_list20096[] = {
-#else
-,
-#endif
--1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
--1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
--1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
--1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
--1
-#ifdef __GNUC__
-};
-short int int_list20160[] = {
-#else
-,
-#endif
--1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
--1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
--1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
--1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
--1
-#ifdef __GNUC__
-};
-short int int_list20224[] = {
-#else
-,
-#endif
--1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
--1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
--1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
--1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
--1
-#ifdef __GNUC__
-};
-short int int_list20288[] = {
-#else
-,
-#endif
--1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
--1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
--1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
--1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
--1
-#ifdef __GNUC__
-};
-short int int_list20352[] = {
-#else
-,
-#endif
--1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
--1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
--1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
--1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
--1
-#ifdef __GNUC__
-};
-short int int_list20416[] = {
-#else
-,
-#endif
--1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
--1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
--1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
--1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
-84
-#ifdef __GNUC__
-};
-short int int_list20480[] = {
-#else
-,
-#endif
-84,84,84,84,84,84,84,84,84,84,84,84,84,84,84,
-85,85,85,85,85,85,85,85,85,85,85,85,85,85,85,85,
-85,85,85,85,85,85,85,85,85,85,85,85,85,85,85,85,
-85,85,85,85,85,85,85,85,85,85,85,85,85,85,85,85,
-85
-#ifdef __GNUC__
-};
-short int int_list20544[] = {
-#else
-,
-#endif
-85,85,85,85,85,85,85,85,85,85,85,85,85,85,85,
-85,85,85,85,85,85,85,85,85,85,85,85,85,85,85,85,
-85,85,85,85,85,85,85,85,85,85,85,85,85,85,85,85,
-85,85,85,85,85,85,85,85,85,85,85,85,85,85,85,85,
-85
-#ifdef __GNUC__
-};
-short int int_list20608[] = {
-#else
-,
-#endif
-85,85,85,85,85,85,85,85,85,85,85,85,85,85,85,
-85,85,85,85,85,85,85,85,85,85,85,85,85,85,85,85,
-85,85,85,85,85,85,85,85,85,85,85,85,85,85,85,85,
-85,85,85,85,85,85,85,85,85,85,85,85,85,85,85,85,
-85
-#ifdef __GNUC__
-};
-short int int_list20672[] = {
-#else
-,
-#endif
-85,85,85,85,85,85,85,85,85,85,85,85,85,85,85,
-85,85,85,85,85,85,85,85,85,85,85,85,85,85,85,85,
-85,85,85,85,85,85,85,85,85,85,85,85,85,85,85,85,
-85,85,85,85,85,85,85,85,85,85,85,85,85,85,85,85,
--1
-#ifdef __GNUC__
-};
-short int int_list20736[] = {
-#else
-,
-#endif
--1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
-285,286,286,286,286,286,286,286,286,286,286,286,286,286,286,286,
-285,286,286,286,286,286,286,286,286,286,286,286,286,286,286,286,
-285,286,286,286,286,286,286,286,286,286,286,286,286,286,286,286,
-285
-#ifdef __GNUC__
-};
-short int int_list20800[] = {
-#else
-,
-#endif
-286,286,286,286,286,286,286,286,286,286,286,286,286,286,286,
-285,286,286,286,286,286,286,286,286,286,286,286,286,286,286,286,
-285,286,286,286,286,286,286,286,286,286,286,286,286,286,286,286,
-285,286,286,286,286,286,286,286,286,286,286,286,286,286,286,286,
-285
-#ifdef __GNUC__
-};
-short int int_list20864[] = {
-#else
-,
-#endif
-286,286,286,286,286,286,286,286,286,286,286,286,286,286,286,
-285,286,286,286,286,286,286,286,286,286,286,286,286,286,286,286,
-285,286,286,286,286,286,286,286,286,286,286,286,286,286,286,286,
-285,286,286,286,286,286,286,286,286,286,286,286,286,286,286,286,
-285
-#ifdef __GNUC__
-};
-short int int_list20928[] = {
-#else
-,
-#endif
-286,286,286,286,286,286,286,286,286,286,286,286,286,286,286,
-285,286,286,286,286,286,286,286,286,286,286,286,286,286,286,286,
-285,286,286,286,286,286,286,286,286,286,286,286,286,286,286,286,
-285,286,286,286,286,286,286,286,286,286,286,286,286,286,286,286,
-373
-#ifdef __GNUC__
-};
-short int int_list20992[] = {
-#else
-,
-#endif
-373,373,373,373,373,373,373,373,373,373,373,373,373,373,373,
-374,374,374,374,374,374,374,374,374,374,374,374,374,374,374,374,
-374,374,374,374,374,374,374,374,374,374,374,374,374,374,374,374,
-374,374,374,374,374,374,374,374,374,374,374,374,374,374,374,374,
-374
-#ifdef __GNUC__
-};
-short int int_list21056[] = {
-#else
-,
-#endif
-374,374,374,374,374,374,374,374,374,374,374,374,374,374,374,
-374,374,374,374,374,374,374,374,374,374,374,374,374,374,374,374,
-374,374,374,374,374,374,374,374,374,374,374,374,374,374,374,374,
-374,374,374,374,374,374,374,374,374,374,374,374,374,374,374,374,
-374
-#ifdef __GNUC__
-};
-short int int_list21120[] = {
-#else
-,
-#endif
-374,374,374,374,374,374,374,374,374,374,374,374,374,374,374,
-374,374,374,374,374,374,374,374,374,374,374,374,374,374,374,374,
-374,374,374,374,374,374,374,374,374,374,374,374,374,374,374,374,
-374,374,374,374,374,374,374,374,374,374,374,374,374,374,374,374,
-374
-#ifdef __GNUC__
-};
-short int int_list21184[] = {
-#else
-,
-#endif
-374,374,374,374,374,374,374,374,374,374,374,374,374,374,374,
-374,374,374,374,374,374,374,374,374,374,374,374,374,374,374,374,
-374,374,374,374,374,374,374,374,374,374,374,374,374,374,374,374,
-374,374,374,374,374,374,374,374,374,374,374,374,374,374,374,374,
--1
-#ifdef __GNUC__
-};
-short int int_list21248[] = {
-#else
-,
-#endif
--1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
-280,281,281,281,281,281,281,281,281,281,281,281,281,281,281,281,
-280,281,281,281,281,281,281,281,281,281,281,281,281,281,281,281,
-280,281,281,281,281,281,281,281,281,281,281,281,281,281,281,281,
-280
-#ifdef __GNUC__
-};
-short int int_list21312[] = {
-#else
-,
-#endif
-281,281,281,281,281,281,281,281,281,281,281,281,281,281,281,
-280,281,281,281,281,281,281,281,281,281,281,281,281,281,281,281,
-280,281,281,281,281,281,281,281,281,281,281,281,281,281,281,281,
-280,281,281,281,281,281,281,281,281,281,281,281,281,281,281,281,
-280
-#ifdef __GNUC__
-};
-short int int_list21376[] = {
-#else
-,
-#endif
-281,281,281,281,281,281,281,281,281,281,281,281,281,281,281,
-280,281,281,281,281,281,281,281,281,281,281,281,281,281,281,281,
-280,281,281,281,281,281,281,281,281,281,281,281,281,281,281,281,
-280,281,281,281,281,281,281,281,281,281,281,281,281,281,281,281,
-280
-#ifdef __GNUC__
-};
-short int int_list21440[] = {
-#else
-,
-#endif
-281,281,281,281,281,281,281,281,281,281,281,281,281,281,281,
-280,281,281,281,281,281,281,281,281,281,281,281,281,281,281,281,
-280,281,281,281,281,281,281,281,281,281,281,281,281,281,281,281,
-280,281,281,281,281,281,281,281,281,281,281,281,281,281,281,281,
-208
-#ifdef __GNUC__
-};
-short int int_list21504[] = {
-#else
-,
-#endif
-208,208,208,208,208,208,208,208,208,208,208,208,208,208,208,
-209,209,209,209,209,209,209,209,209,209,209,209,209,209,209,209,
-209,209,209,209,209,209,209,209,209,209,209,209,209,209,209,209,
-209,209,209,209,209,209,209,209,209,209,209,209,209,209,209,209,
-209
-#ifdef __GNUC__
-};
-short int int_list21568[] = {
-#else
-,
-#endif
-209,209,209,209,209,209,209,209,209,209,209,209,209,209,209,
-209,209,209,209,209,209,209,209,209,209,209,209,209,209,209,209,
-209,209,209,209,209,209,209,209,209,209,209,209,209,209,209,209,
-209,209,209,209,209,209,209,209,209,209,209,209,209,209,209,209,
-209
-#ifdef __GNUC__
-};
-short int int_list21632[] = {
-#else
-,
-#endif
-209,209,209,209,209,209,209,209,209,209,209,209,209,209,209,
-209,209,209,209,209,209,209,209,209,209,209,209,209,209,209,209,
-209,209,209,209,209,209,209,209,209,209,209,209,209,209,209,209,
-209,209,209,209,209,209,209,209,209,209,209,209,209,209,209,209,
-209
-#ifdef __GNUC__
-};
-short int int_list21696[] = {
-#else
-,
-#endif
-209,209,209,209,209,209,209,209,209,209,209,209,209,209,209,
-209,209,209,209,209,209,209,209,209,209,209,209,209,209,209,209,
-209,209,209,209,209,209,209,209,209,209,209,209,209,209,209,209,
-209,209,209,209,209,209,209,209,209,209,209,209,209,209,209,209,
--1
-#ifdef __GNUC__
-};
-short int int_list21760[] = {
-#else
-,
-#endif
--1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
-277,276,276,276,276,276,276,276,276,276,276,276,276,276,276,276,
-277,276,276,276,276,276,276,276,276,276,276,276,276,276,276,276,
-277,276,276,276,276,276,276,276,276,276,276,276,276,276,276,276,
-277
-#ifdef __GNUC__
-};
-short int int_list21824[] = {
-#else
-,
-#endif
-276,276,276,276,276,276,276,276,276,276,276,276,276,276,276,
-277,276,276,276,276,276,276,276,276,276,276,276,276,276,276,276,
-277,276,276,276,276,276,276,276,276,276,276,276,276,276,276,276,
-277,276,276,276,276,276,276,276,276,276,276,276,276,276,276,276,
-277
-#ifdef __GNUC__
-};
-short int int_list21888[] = {
-#else
-,
-#endif
-276,276,276,276,276,276,276,276,276,276,276,276,276,276,276,
-277,276,276,276,276,276,276,276,276,276,276,276,276,276,276,276,
-277,276,276,276,276,276,276,276,276,276,276,276,276,276,276,276,
-277,276,276,276,276,276,276,276,276,276,276,276,276,276,276,276,
-277
-#ifdef __GNUC__
-};
-short int int_list21952[] = {
-#else
-,
-#endif
-276,276,276,276,276,276,276,276,276,276,276,276,276,276,276,
-277,276,276,276,276,276,276,276,276,276,276,276,276,276,276,276,
-277,276,276,276,276,276,276,276,276,276,276,276,276,276,276,276,
-277,276,276,276,276,276,276,276,276,276,276,276,276,276,276,276,
-13
-#ifdef __GNUC__
-};
-short int int_list22016[] = {
-#else
-,
-#endif
-13,13,13,13,13,13,13,13,13,13,13,13,13,13,13,
-14,14,14,14,14,14,14,14,14,14,14,14,14,14,14,14,
-14,14,14,14,14,14,14,14,14,14,14,14,14,14,14,14,
-14,14,14,14,14,14,14,14,14,14,14,14,14,14,14,14,
-14
-#ifdef __GNUC__
-};
-short int int_list22080[] = {
-#else
-,
-#endif
-14,14,14,14,14,14,14,14,14,14,14,14,14,14,14,
-14,14,14,14,14,14,14,14,14,14,14,14,14,14,14,14,
-14,14,14,14,14,14,14,14,14,14,14,14,14,14,14,14,
-14,14,14,14,14,14,14,14,14,14,14,14,14,14,14,14,
-14
-#ifdef __GNUC__
-};
-short int int_list22144[] = {
-#else
-,
-#endif
-14,14,14,14,14,14,14,14,14,14,14,14,14,14,14,
-14,14,14,14,14,14,14,14,14,14,14,14,14,14,14,14,
-14,14,14,14,14,14,14,14,14,14,14,14,14,14,14,14,
-14,14,14,14,14,14,14,14,14,14,14,14,14,14,14,14,
-14
-#ifdef __GNUC__
-};
-short int int_list22208[] = {
-#else
-,
-#endif
-14,14,14,14,14,14,14,14,14,14,14,14,14,14,14,
-14,14,14,14,14,14,14,14,14,14,14,14,14,14,14,14,
-14,14,14,14,14,14,14,14,14,14,14,14,14,14,14,14,
-14,14,14,14,14,14,14,14,14,14,14,14,14,14,14,14,
--1
-#ifdef __GNUC__
-};
-short int int_list22272[] = {
-#else
-,
-#endif
--1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
-273,272,272,272,272,272,272,272,272,272,272,272,272,272,272,272,
-273,272,272,272,272,272,272,272,272,272,272,272,272,272,272,272,
-273,272,272,272,272,272,272,272,272,272,272,272,272,272,272,272,
-273
-#ifdef __GNUC__
-};
-short int int_list22336[] = {
-#else
-,
-#endif
-272,272,272,272,272,272,272,272,272,272,272,272,272,272,272,
-273,272,272,272,272,272,272,272,272,272,272,272,272,272,272,272,
-273,272,272,272,272,272,272,272,272,272,272,272,272,272,272,272,
-273,272,272,272,272,272,272,272,272,272,272,272,272,272,272,272,
-273
-#ifdef __GNUC__
-};
-short int int_list22400[] = {
-#else
-,
-#endif
-272,272,272,272,272,272,272,272,272,272,272,272,272,272,272,
-273,272,272,272,272,272,272,272,272,272,272,272,272,272,272,272,
-273,272,272,272,272,272,272,272,272,272,272,272,272,272,272,272,
-273,272,272,272,272,272,272,272,272,272,272,272,272,272,272,272,
-273
-#ifdef __GNUC__
-};
-short int int_list22464[] = {
-#else
-,
-#endif
-272,272,272,272,272,272,272,272,272,272,272,272,272,272,272,
-273,272,272,272,272,272,272,272,272,272,272,272,272,272,272,272,
-273,272,272,272,272,272,272,272,272,272,272,272,272,272,272,272,
-273,272,272,272,272,272,272,272,272,272,272,272,272,272,272,272,
-239
-#ifdef __GNUC__
-};
-short int int_list22528[] = {
-#else
-,
-#endif
-239,239,239,239,239,239,239,239,239,239,239,239,239,239,239,
-240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,
-240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,
-240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,
-240
-#ifdef __GNUC__
-};
-short int int_list22592[] = {
-#else
-,
-#endif
-240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,
-240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,
-240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,
-240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,
-240
-#ifdef __GNUC__
-};
-short int int_list22656[] = {
-#else
-,
-#endif
-240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,
-240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,
-240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,
-240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,
-240
-#ifdef __GNUC__
-};
-short int int_list22720[] = {
-#else
-,
-#endif
-240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,
-240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,
-240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,
-240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,
-234
-#ifdef __GNUC__
-};
-short int int_list22784[] = {
-#else
-,
-#endif
-234,234,234,234,234,234,234,234,234,234,234,234,234,234,234,
-235,235,235,235,235,235,235,235,235,235,235,235,235,235,235,235,
-235,235,235,235,235,235,235,235,235,235,235,235,235,235,235,235,
-235,235,235,235,235,235,235,235,235,235,235,235,235,235,235,235,
-235
-#ifdef __GNUC__
-};
-short int int_list22848[] = {
-#else
-,
-#endif
-235,235,235,235,235,235,235,235,235,235,235,235,235,235,235,
-235,235,235,235,235,235,235,235,235,235,235,235,235,235,235,235,
-235,235,235,235,235,235,235,235,235,235,235,235,235,235,235,235,
-235,235,235,235,235,235,235,235,235,235,235,235,235,235,235,235,
-235
-#ifdef __GNUC__
-};
-short int int_list22912[] = {
-#else
-,
-#endif
-235,235,235,235,235,235,235,235,235,235,235,235,235,235,235,
-235,235,235,235,235,235,235,235,235,235,235,235,235,235,235,235,
-235,235,235,235,235,235,235,235,235,235,235,235,235,235,235,235,
-235,235,235,235,235,235,235,235,235,235,235,235,235,235,235,235,
-235
-#ifdef __GNUC__
-};
-short int int_list22976[] = {
-#else
-,
-#endif
-235,235,235,235,235,235,235,235,235,235,235,235,235,235,235,
-235,235,235,235,235,235,235,235,235,235,235,235,235,235,235,235,
-235,235,235,235,235,235,235,235,235,235,235,235,235,235,235,235,
-235,235,235,235,235,235,235,235,235,235,235,235,235,235,235,235,
-113
-#ifdef __GNUC__
-};
-short int int_list23040[] = {
-#else
-,
-#endif
-113,113,113,113,113,113,113,113,113,113,113,113,113,113,113,
-114,114,114,114,114,114,114,114,114,114,114,114,114,114,114,114,
-114,114,114,114,114,114,114,114,114,114,114,114,114,114,114,114,
-114,114,114,114,114,114,114,114,114,114,114,114,114,114,114,114,
-114
-#ifdef __GNUC__
-};
-short int int_list23104[] = {
-#else
-,
-#endif
-114,114,114,114,114,114,114,114,114,114,114,114,114,114,114,
-114,114,114,114,114,114,114,114,114,114,114,114,114,114,114,114,
-114,114,114,114,114,114,114,114,114,114,114,114,114,114,114,114,
-114,114,114,114,114,114,114,114,114,114,114,114,114,114,114,114,
-114
-#ifdef __GNUC__
-};
-short int int_list23168[] = {
-#else
-,
-#endif
-114,114,114,114,114,114,114,114,114,114,114,114,114,114,114,
-114,114,114,114,114,114,114,114,114,114,114,114,114,114,114,114,
-114,114,114,114,114,114,114,114,114,114,114,114,114,114,114,114,
-114,114,114,114,114,114,114,114,114,114,114,114,114,114,114,114,
-114
-#ifdef __GNUC__
-};
-short int int_list23232[] = {
-#else
-,
-#endif
-114,114,114,114,114,114,114,114,114,114,114,114,114,114,114,
-114,114,114,114,114,114,114,114,114,114,114,114,114,114,114,114,
-114,114,114,114,114,114,114,114,114,114,114,114,114,114,114,114,
-114,114,114,114,114,114,114,114,114,114,114,114,114,114,114,114,
-108
-#ifdef __GNUC__
-};
-short int int_list23296[] = {
-#else
-,
-#endif
-108,108,108,108,108,108,108,108,108,108,108,108,108,108,108,
-109,109,109,109,109,109,109,109,109,109,109,109,109,109,109,109,
-109,109,109,109,109,109,109,109,109,109,109,109,109,109,109,109,
-109,109,109,109,109,109,109,109,109,109,109,109,109,109,109,109,
-109
-#ifdef __GNUC__
-};
-short int int_list23360[] = {
-#else
-,
-#endif
-109,109,109,109,109,109,109,109,109,109,109,109,109,109,109,
-109,109,109,109,109,109,109,109,109,109,109,109,109,109,109,109,
-109,109,109,109,109,109,109,109,109,109,109,109,109,109,109,109,
-109,109,109,109,109,109,109,109,109,109,109,109,109,109,109,109,
-109
-#ifdef __GNUC__
-};
-short int int_list23424[] = {
-#else
-,
-#endif
-109,109,109,109,109,109,109,109,109,109,109,109,109,109,109,
-109,109,109,109,109,109,109,109,109,109,109,109,109,109,109,109,
-109,109,109,109,109,109,109,109,109,109,109,109,109,109,109,109,
-109,109,109,109,109,109,109,109,109,109,109,109,109,109,109,109,
-109
-#ifdef __GNUC__
-};
-short int int_list23488[] = {
-#else
-,
-#endif
-109,109,109,109,109,109,109,109,109,109,109,109,109,109,109,
-109,109,109,109,109,109,109,109,109,109,109,109,109,109,109,109,
-109,109,109,109,109,109,109,109,109,109,109,109,109,109,109,109,
-109,109,109,109,109,109,109,109,109,109,109,109,109,109,109,109,
--1
-#ifdef __GNUC__
-};
-short int int_list23552[] = {
-#else
-,
-#endif
-219,-1,-1,-1,-1,-1,-1,388,216,-1,-1,-1,-1,-1,-1,
--1,218,-1,-1,-1,-1,-1,-1,389,215,-1,-1,-1,-1,-1,-1,
--1,218,-1,-1,-1,-1,-1,-1,389,215,-1,-1,-1,-1,-1,-1,
--1,218,-1,-1,-1,-1,-1,-1,389,215,-1,-1,-1,-1,-1,-1,
--1
-#ifdef __GNUC__
-};
-short int int_list23616[] = {
-#else
-,
-#endif
-218,-1,-1,-1,-1,-1,-1,389,215,-1,-1,-1,-1,-1,-1,
--1,218,-1,-1,-1,-1,-1,-1,389,215,-1,-1,-1,-1,-1,-1,
--1,218,-1,-1,-1,-1,-1,-1,389,215,-1,-1,-1,-1,-1,-1,
--1,218,-1,-1,-1,-1,-1,-1,389,215,-1,-1,-1,-1,-1,-1,
--1
-#ifdef __GNUC__
-};
-short int int_list23680[] = {
-#else
-,
-#endif
-218,-1,-1,-1,-1,-1,-1,389,215,-1,-1,-1,-1,-1,-1,
--1,218,-1,-1,-1,-1,-1,-1,389,215,-1,-1,-1,-1,-1,-1,
--1,218,-1,-1,-1,-1,-1,-1,389,215,-1,-1,-1,-1,-1,-1,
--1,218,-1,-1,-1,-1,-1,-1,389,215,-1,-1,-1,-1,-1,-1,
--1
-#ifdef __GNUC__
-};
-short int int_list23744[] = {
-#else
-,
-#endif
-218,-1,-1,-1,-1,-1,-1,389,215,-1,-1,-1,-1,-1,-1,
--1,218,-1,-1,-1,-1,-1,-1,389,215,-1,-1,-1,-1,-1,-1,
--1,218,-1,-1,-1,-1,-1,-1,389,215,-1,-1,-1,-1,-1,-1,
--1,218,-1,-1,-1,-1,-1,-1,389,215,-1,-1,-1,-1,-1,-1,
-204
-#ifdef __GNUC__
-};
-short int int_list23808[] = {
-#else
-,
-#endif
-204,204,204,204,204,204,204,204,204,204,204,204,204,204,204,
-203,203,203,203,203,203,203,203,203,203,203,203,203,203,203,203,
-203,203,203,203,203,203,203,203,203,203,203,203,203,203,203,203,
-203,203,203,203,203,203,203,203,203,203,203,203,203,203,203,203,
-203
-#ifdef __GNUC__
-};
-short int int_list23872[] = {
-#else
-,
-#endif
-203,203,203,203,203,203,203,203,203,203,203,203,203,203,203,
-203,203,203,203,203,203,203,203,203,203,203,203,203,203,203,203,
-203,203,203,203,203,203,203,203,203,203,203,203,203,203,203,203,
-203,203,203,203,203,203,203,203,203,203,203,203,203,203,203,203,
-203
-#ifdef __GNUC__
-};
-short int int_list23936[] = {
-#else
-,
-#endif
-203,203,203,203,203,203,203,203,203,203,203,203,203,203,203,
-203,203,203,203,203,203,203,203,203,203,203,203,203,203,203,203,
-203,203,203,203,203,203,203,203,203,203,203,203,203,203,203,203,
-203,203,203,203,203,203,203,203,203,203,203,203,203,203,203,203,
-203
-#ifdef __GNUC__
-};
-short int int_list24000[] = {
-#else
-,
-#endif
-203,203,203,203,203,203,203,203,203,203,203,203,203,203,203,
-203,203,203,203,203,203,203,203,203,203,203,203,203,203,203,203,
-203,203,203,203,203,203,203,203,203,203,203,203,203,203,203,203,
-203,203,203,203,203,203,203,203,203,203,203,203,203,203,203,203,
-153
-#ifdef __GNUC__
-};
-short int int_list24064[] = {
-#else
-,
-#endif
-153,153,153,153,153,153,153,153,153,153,153,153,153,153,153,
-154,154,154,154,154,154,154,154,154,154,154,154,154,154,154,154,
-154,154,154,154,154,154,154,154,154,154,154,154,154,154,154,154,
-154,154,154,154,154,154,154,154,154,154,154,154,154,154,154,154,
-154
-#ifdef __GNUC__
-};
-short int int_list24128[] = {
-#else
-,
-#endif
-154,154,154,154,154,154,154,154,154,154,154,154,154,154,154,
-154,154,154,154,154,154,154,154,154,154,154,154,154,154,154,154,
-154,154,154,154,154,154,154,154,154,154,154,154,154,154,154,154,
-154,154,154,154,154,154,154,154,154,154,154,154,154,154,154,154,
-154
-#ifdef __GNUC__
-};
-short int int_list24192[] = {
-#else
-,
-#endif
-154,154,154,154,154,154,154,154,154,154,154,154,154,154,154,
-154,154,154,154,154,154,154,154,154,154,154,154,154,154,154,154,
-154,154,154,154,154,154,154,154,154,154,154,154,154,154,154,154,
-154,154,154,154,154,154,154,154,154,154,154,154,154,154,154,154,
-154
-#ifdef __GNUC__
-};
-short int int_list24256[] = {
-#else
-,
-#endif
-154,154,154,154,154,154,154,154,154,154,154,154,154,154,154,
-154,154,154,154,154,154,154,154,154,154,154,154,154,154,154,154,
-154,154,154,154,154,154,154,154,154,154,154,154,154,154,154,154,
-154,154,154,154,154,154,154,154,154,154,154,154,154,154,154,154,
-39
-#ifdef __GNUC__
-};
-short int int_list24320[] = {
-#else
-,
-#endif
--1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
-40,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
-40,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
-40,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
-40
-#ifdef __GNUC__
-};
-short int int_list24384[] = {
-#else
-,
-#endif
--1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
-40,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
-40,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
-40,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
-40
-#ifdef __GNUC__
-};
-short int int_list24448[] = {
-#else
-,
-#endif
--1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
-40,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
-40,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
-40,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
-40
-#ifdef __GNUC__
-};
-short int int_list24512[] = {
-#else
-,
-#endif
--1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
-40,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
-40,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
-40,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
-183
-#ifdef __GNUC__
-};
-short int int_list24576[] = {
-#else
-,
-#endif
-183,183,183,183,183,183,183,183,183,183,183,183,183,183,183,
-184,184,184,184,184,184,184,184,184,184,184,184,184,184,184,184,
-184,184,184,184,184,184,184,184,184,184,184,184,184,184,184,184,
-184,184,184,184,184,184,184,184,184,184,184,184,184,184,184,184,
-184
-#ifdef __GNUC__
-};
-short int int_list24640[] = {
-#else
-,
-#endif
-184,184,184,184,184,184,184,184,184,184,184,184,184,184,184,
-184,184,184,184,184,184,184,184,184,184,184,184,184,184,184,184,
-184,184,184,184,184,184,184,184,184,184,184,184,184,184,184,184,
-184,184,184,184,184,184,184,184,184,184,184,184,184,184,184,184,
-184
-#ifdef __GNUC__
-};
-short int int_list24704[] = {
-#else
-,
-#endif
-184,184,184,184,184,184,184,184,184,184,184,184,184,184,184,
-184,184,184,184,184,184,184,184,184,184,184,184,184,184,184,184,
-184,184,184,184,184,184,184,184,184,184,184,184,184,184,184,184,
-184,184,184,184,184,184,184,184,184,184,184,184,184,184,184,184,
-184
-#ifdef __GNUC__
-};
-short int int_list24768[] = {
-#else
-,
-#endif
-184,184,184,184,184,184,184,184,184,184,184,184,184,184,184,
-184,184,184,184,184,184,184,184,184,184,184,184,184,184,184,184,
-184,184,184,184,184,184,184,184,184,184,184,184,184,184,184,184,
-184,184,184,184,184,184,184,184,184,184,184,184,184,184,184,184,
-165
-#ifdef __GNUC__
-};
-short int int_list24832[] = {
-#else
-,
-#endif
-165,165,165,165,165,165,165,165,165,165,165,165,165,165,165,
-166,166,166,166,166,166,166,166,166,166,166,166,166,166,166,166,
-166,166,166,166,166,166,166,166,166,166,166,166,166,166,166,166,
-166,166,166,166,166,166,166,166,166,166,166,166,166,166,166,166,
-166
-#ifdef __GNUC__
-};
-short int int_list24896[] = {
-#else
-,
-#endif
-166,166,166,166,166,166,166,166,166,166,166,166,166,166,166,
-166,166,166,166,166,166,166,166,166,166,166,166,166,166,166,166,
-166,166,166,166,166,166,166,166,166,166,166,166,166,166,166,166,
-166,166,166,166,166,166,166,166,166,166,166,166,166,166,166,166,
-166
-#ifdef __GNUC__
-};
-short int int_list24960[] = {
-#else
-,
-#endif
-166,166,166,166,166,166,166,166,166,166,166,166,166,166,166,
-166,166,166,166,166,166,166,166,166,166,166,166,166,166,166,166,
-166,166,166,166,166,166,166,166,166,166,166,166,166,166,166,166,
-166,166,166,166,166,166,166,166,166,166,166,166,166,166,166,166,
-166
-#ifdef __GNUC__
-};
-short int int_list25024[] = {
-#else
-,
-#endif
-166,166,166,166,166,166,166,166,166,166,166,166,166,166,166,
-166,166,166,166,166,166,166,166,166,166,166,166,166,166,166,166,
-166,166,166,166,166,166,166,166,166,166,166,166,166,166,166,166,
-166,166,166,166,166,166,166,166,166,166,166,166,166,166,166,166,
-295
-#ifdef __GNUC__
-};
-short int int_list25088[] = {
-#else
-,
-#endif
-295,295,295,295,295,295,295,295,295,295,295,295,295,295,295,
-294,294,294,294,294,294,294,294,294,294,294,294,294,294,294,294,
-294,294,294,294,294,294,294,294,294,294,294,294,294,294,294,294,
-294,294,294,294,294,294,294,294,294,294,294,294,294,294,294,294,
-294
-#ifdef __GNUC__
-};
-short int int_list25152[] = {
-#else
-,
-#endif
-294,294,294,294,294,294,294,294,294,294,294,294,294,294,294,
-294,294,294,294,294,294,294,294,294,294,294,294,294,294,294,294,
-294,294,294,294,294,294,294,294,294,294,294,294,294,294,294,294,
-294,294,294,294,294,294,294,294,294,294,294,294,294,294,294,294,
-294
-#ifdef __GNUC__
-};
-short int int_list25216[] = {
-#else
-,
-#endif
-294,294,294,294,294,294,294,294,294,294,294,294,294,294,294,
-294,294,294,294,294,294,294,294,294,294,294,294,294,294,294,294,
-294,294,294,294,294,294,294,294,294,294,294,294,294,294,294,294,
-294,294,294,294,294,294,294,294,294,294,294,294,294,294,294,294,
-294
-#ifdef __GNUC__
-};
-short int int_list25280[] = {
-#else
-,
-#endif
-294,294,294,294,294,294,294,294,294,294,294,294,294,294,294,
-294,294,294,294,294,294,294,294,294,294,294,294,294,294,294,294,
-294,294,294,294,294,294,294,294,294,294,294,294,294,294,294,294,
-294,294,294,294,294,294,294,294,294,294,294,294,294,294,294,294,
-290
-#ifdef __GNUC__
-};
-short int int_list25344[] = {
-#else
-,
-#endif
-290,290,290,290,290,290,290,290,290,290,290,290,290,290,290,
-289,289,289,289,289,289,289,289,289,289,289,289,289,289,289,289,
-289,289,289,289,289,289,289,289,289,289,289,289,289,289,289,289,
-289,289,289,289,289,289,289,289,289,289,289,289,289,289,289,289,
-289
-#ifdef __GNUC__
-};
-short int int_list25408[] = {
-#else
-,
-#endif
-289,289,289,289,289,289,289,289,289,289,289,289,289,289,289,
-289,289,289,289,289,289,289,289,289,289,289,289,289,289,289,289,
-289,289,289,289,289,289,289,289,289,289,289,289,289,289,289,289,
-289,289,289,289,289,289,289,289,289,289,289,289,289,289,289,289,
-289
-#ifdef __GNUC__
-};
-short int int_list25472[] = {
-#else
-,
-#endif
-289,289,289,289,289,289,289,289,289,289,289,289,289,289,289,
-289,289,289,289,289,289,289,289,289,289,289,289,289,289,289,289,
-289,289,289,289,289,289,289,289,289,289,289,289,289,289,289,289,
-289,289,289,289,289,289,289,289,289,289,289,289,289,289,289,289,
-289
-#ifdef __GNUC__
-};
-short int int_list25536[] = {
-#else
-,
-#endif
-289,289,289,289,289,289,289,289,289,289,289,289,289,289,289,
-289,289,289,289,289,289,289,289,289,289,289,289,289,289,289,289,
-289,289,289,289,289,289,289,289,289,289,289,289,289,289,289,289,
-289,289,289,289,289,289,289,289,289,289,289,289,289,289,289,289,
-334
-#ifdef __GNUC__
-};
-short int int_list25600[] = {
-#else
-,
-#endif
-334,334,334,334,334,334,334,334,334,334,334,334,334,334,334,
-333,333,333,333,333,333,333,333,333,333,333,333,333,333,333,333,
-333,333,333,333,333,333,333,333,333,333,333,333,333,333,333,333,
-333,333,333,333,333,333,333,333,333,333,333,333,333,333,333,333,
-333
-#ifdef __GNUC__
-};
-short int int_list25664[] = {
-#else
-,
-#endif
-333,333,333,333,333,333,333,333,333,333,333,333,333,333,333,
-333,333,333,333,333,333,333,333,333,333,333,333,333,333,333,333,
-333,333,333,333,333,333,333,333,333,333,333,333,333,333,333,333,
-333,333,333,333,333,333,333,333,333,333,333,333,333,333,333,333,
-333
-#ifdef __GNUC__
-};
-short int int_list25728[] = {
-#else
-,
-#endif
-333,333,333,333,333,333,333,333,333,333,333,333,333,333,333,
-333,333,333,333,333,333,333,333,333,333,333,333,333,333,333,333,
-333,333,333,333,333,333,333,333,333,333,333,333,333,333,333,333,
-333,333,333,333,333,333,333,333,333,333,333,333,333,333,333,333,
-333
-#ifdef __GNUC__
-};
-short int int_list25792[] = {
-#else
-,
-#endif
-333,333,333,333,333,333,333,333,333,333,333,333,333,333,333,
-333,333,333,333,333,333,333,333,333,333,333,333,333,333,333,333,
-333,333,333,333,333,333,333,333,333,333,333,333,333,333,333,333,
-333,333,333,333,333,333,333,333,333,333,333,333,333,333,333,333,
-329
-#ifdef __GNUC__
-};
-short int int_list25856[] = {
-#else
-,
-#endif
-329,329,329,329,329,329,329,329,329,329,329,329,329,329,329,
-328,328,328,328,328,328,328,328,328,328,328,328,328,328,328,328,
-328,328,328,328,328,328,328,328,328,328,328,328,328,328,328,328,
-328,328,328,328,328,328,328,328,328,328,328,328,328,328,328,328,
-328
-#ifdef __GNUC__
-};
-short int int_list25920[] = {
-#else
-,
-#endif
-328,328,328,328,328,328,328,328,328,328,328,328,328,328,328,
-328,328,328,328,328,328,328,328,328,328,328,328,328,328,328,328,
-328,328,328,328,328,328,328,328,328,328,328,328,328,328,328,328,
-328,328,328,328,328,328,328,328,328,328,328,328,328,328,328,328,
-328
-#ifdef __GNUC__
-};
-short int int_list25984[] = {
-#else
-,
-#endif
-328,328,328,328,328,328,328,328,328,328,328,328,328,328,328,
-328,328,328,328,328,328,328,328,328,328,328,328,328,328,328,328,
-328,328,328,328,328,328,328,328,328,328,328,328,328,328,328,328,
-328,328,328,328,328,328,328,328,328,328,328,328,328,328,328,328,
-328
-#ifdef __GNUC__
-};
-short int int_list26048[] = {
-#else
-,
-#endif
-328,328,328,328,328,328,328,328,328,328,328,328,328,328,328,
-328,328,328,328,328,328,328,328,328,328,328,328,328,328,328,328,
-328,328,328,328,328,328,328,328,328,328,328,328,328,328,328,328,
-328,328,328,328,328,328,328,328,328,328,328,328,328,328,328,328,
-34
-#ifdef __GNUC__
-};
-short int int_list26112[] = {
-#else
-,
-#endif
-34,34,34,34,34,34,34,34,34,34,34,34,34,34,34,
-33,33,33,33,33,33,33,33,33,33,33,33,33,33,33,33,
-33,33,33,33,33,33,33,33,33,33,33,33,33,33,33,33,
-33,33,33,33,33,33,33,33,33,33,33,33,33,33,33,33,
-33
-#ifdef __GNUC__
-};
-short int int_list26176[] = {
-#else
-,
-#endif
-33,33,33,33,33,33,33,33,33,33,33,33,33,33,33,
-33,33,33,33,33,33,33,33,33,33,33,33,33,33,33,33,
-33,33,33,33,33,33,33,33,33,33,33,33,33,33,33,33,
-33,33,33,33,33,33,33,33,33,33,33,33,33,33,33,33,
-33
-#ifdef __GNUC__
-};
-short int int_list26240[] = {
-#else
-,
-#endif
-33,33,33,33,33,33,33,33,33,33,33,33,33,33,33,
-33,33,33,33,33,33,33,33,33,33,33,33,33,33,33,33,
-33,33,33,33,33,33,33,33,33,33,33,33,33,33,33,33,
-33,33,33,33,33,33,33,33,33,33,33,33,33,33,33,33,
-33
-#ifdef __GNUC__
-};
-short int int_list26304[] = {
-#else
-,
-#endif
-33,33,33,33,33,33,33,33,33,33,33,33,33,33,33,
-33,33,33,33,33,33,33,33,33,33,33,33,33,33,33,33,
-33,33,33,33,33,33,33,33,33,33,33,33,33,33,33,33,
-33,33,33,33,33,33,33,33,33,33,33,33,33,33,33,33,
-29
-#ifdef __GNUC__
-};
-short int int_list26368[] = {
-#else
-,
-#endif
-29,29,29,29,29,29,29,29,29,29,29,29,29,29,29,
-28,28,28,28,28,28,28,28,28,28,28,28,28,28,28,28,
-28,28,28,28,28,28,28,28,28,28,28,28,28,28,28,28,
-28,28,28,28,28,28,28,28,28,28,28,28,28,28,28,28,
-28
-#ifdef __GNUC__
-};
-short int int_list26432[] = {
-#else
-,
-#endif
-28,28,28,28,28,28,28,28,28,28,28,28,28,28,28,
-28,28,28,28,28,28,28,28,28,28,28,28,28,28,28,28,
-28,28,28,28,28,28,28,28,28,28,28,28,28,28,28,28,
-28,28,28,28,28,28,28,28,28,28,28,28,28,28,28,28,
-28
-#ifdef __GNUC__
-};
-short int int_list26496[] = {
-#else
-,
-#endif
-28,28,28,28,28,28,28,28,28,28,28,28,28,28,28,
-28,28,28,28,28,28,28,28,28,28,28,28,28,28,28,28,
-28,28,28,28,28,28,28,28,28,28,28,28,28,28,28,28,
-28,28,28,28,28,28,28,28,28,28,28,28,28,28,28,28,
-28
-#ifdef __GNUC__
-};
-short int int_list26560[] = {
-#else
-,
-#endif
-28,28,28,28,28,28,28,28,28,28,28,28,28,28,28,
-28,28,28,28,28,28,28,28,28,28,28,28,28,28,28,28,
-28,28,28,28,28,28,28,28,28,28,28,28,28,28,28,28,
-28,28,28,28,28,28,28,28,28,28,28,28,28,28,28,28,
-145
-#ifdef __GNUC__
-};
-short int int_list26624[] = {
-#else
-,
-#endif
-145,145,145,145,145,145,145,145,145,145,145,145,145,145,145,
-144,144,144,144,144,144,144,144,144,144,144,144,144,144,144,144,
-144,144,144,144,144,144,144,144,144,144,144,144,144,144,144,144,
-144,144,144,144,144,144,144,144,144,144,144,144,144,144,144,144,
-144
-#ifdef __GNUC__
-};
-short int int_list26688[] = {
-#else
-,
-#endif
-144,144,144,144,144,144,144,144,144,144,144,144,144,144,144,
-144,144,144,144,144,144,144,144,144,144,144,144,144,144,144,144,
-144,144,144,144,144,144,144,144,144,144,144,144,144,144,144,144,
-144,144,144,144,144,144,144,144,144,144,144,144,144,144,144,144,
-144
-#ifdef __GNUC__
-};
-short int int_list26752[] = {
-#else
-,
-#endif
-144,144,144,144,144,144,144,144,144,144,144,144,144,144,144,
-144,144,144,144,144,144,144,144,144,144,144,144,144,144,144,144,
-144,144,144,144,144,144,144,144,144,144,144,144,144,144,144,144,
-144,144,144,144,144,144,144,144,144,144,144,144,144,144,144,144,
-144
-#ifdef __GNUC__
-};
-short int int_list26816[] = {
-#else
-,
-#endif
-144,144,144,144,144,144,144,144,144,144,144,144,144,144,144,
-144,144,144,144,144,144,144,144,144,144,144,144,144,144,144,144,
-144,144,144,144,144,144,144,144,144,144,144,144,144,144,144,144,
-144,144,144,144,144,144,144,144,144,144,144,144,144,144,144,144,
-141
-#ifdef __GNUC__
-};
-short int int_list26880[] = {
-#else
-,
-#endif
-141,141,141,141,141,141,141,141,141,141,141,141,141,141,141,
-140,140,140,140,140,140,140,140,140,140,140,140,140,140,140,140,
-140,140,140,140,140,140,140,140,140,140,140,140,140,140,140,140,
-140,140,140,140,140,140,140,140,140,140,140,140,140,140,140,140,
-140
-#ifdef __GNUC__
-};
-short int int_list26944[] = {
-#else
-,
-#endif
-140,140,140,140,140,140,140,140,140,140,140,140,140,140,140,
-140,140,140,140,140,140,140,140,140,140,140,140,140,140,140,140,
-140,140,140,140,140,140,140,140,140,140,140,140,140,140,140,140,
-140,140,140,140,140,140,140,140,140,140,140,140,140,140,140,140,
-140
-#ifdef __GNUC__
-};
-short int int_list27008[] = {
-#else
-,
-#endif
-140,140,140,140,140,140,140,140,140,140,140,140,140,140,140,
-140,140,140,140,140,140,140,140,140,140,140,140,140,140,140,140,
-140,140,140,140,140,140,140,140,140,140,140,140,140,140,140,140,
-140,140,140,140,140,140,140,140,140,140,140,140,140,140,140,140,
-140
-#ifdef __GNUC__
-};
-short int int_list27072[] = {
-#else
-,
-#endif
-140,140,140,140,140,140,140,140,140,140,140,140,140,140,140,
-140,140,140,140,140,140,140,140,140,140,140,140,140,140,140,140,
-140,140,140,140,140,140,140,140,140,140,140,140,140,140,140,140,
-140,140,140,140,140,140,140,140,140,140,140,140,140,140,140,140,
-104
-#ifdef __GNUC__
-};
-short int int_list27136[] = {
-#else
-,
-#endif
-104,104,104,104,104,104,104,104,104,104,104,104,104,104,104,
-103,103,103,103,103,103,103,103,103,103,103,103,103,103,103,103,
-103,103,103,103,103,103,103,103,103,103,103,103,103,103,103,103,
-103,103,103,103,103,103,103,103,103,103,103,103,103,103,103,103,
-103
-#ifdef __GNUC__
-};
-short int int_list27200[] = {
-#else
-,
-#endif
-103,103,103,103,103,103,103,103,103,103,103,103,103,103,103,
-103,103,103,103,103,103,103,103,103,103,103,103,103,103,103,103,
-103,103,103,103,103,103,103,103,103,103,103,103,103,103,103,103,
-103,103,103,103,103,103,103,103,103,103,103,103,103,103,103,103,
-103
-#ifdef __GNUC__
-};
-short int int_list27264[] = {
-#else
-,
-#endif
-103,103,103,103,103,103,103,103,103,103,103,103,103,103,103,
-103,103,103,103,103,103,103,103,103,103,103,103,103,103,103,103,
-103,103,103,103,103,103,103,103,103,103,103,103,103,103,103,103,
-103,103,103,103,103,103,103,103,103,103,103,103,103,103,103,103,
-103
-#ifdef __GNUC__
-};
-short int int_list27328[] = {
-#else
-,
-#endif
-103,103,103,103,103,103,103,103,103,103,103,103,103,103,103,
-103,103,103,103,103,103,103,103,103,103,103,103,103,103,103,103,
-103,103,103,103,103,103,103,103,103,103,103,103,103,103,103,103,
-103,103,103,103,103,103,103,103,103,103,103,103,103,103,103,103,
-100
-#ifdef __GNUC__
-};
-short int int_list27392[] = {
-#else
-,
-#endif
-100,100,100,100,100,100,100,100,100,100,100,100,100,100,100,
-99,99,99,99,99,99,99,99,99,99,99,99,99,99,99,99,
-99,99,99,99,99,99,99,99,99,99,99,99,99,99,99,99,
-99,99,99,99,99,99,99,99,99,99,99,99,99,99,99,99,
-99
-#ifdef __GNUC__
-};
-short int int_list27456[] = {
-#else
-,
-#endif
-99,99,99,99,99,99,99,99,99,99,99,99,99,99,99,
-99,99,99,99,99,99,99,99,99,99,99,99,99,99,99,99,
-99,99,99,99,99,99,99,99,99,99,99,99,99,99,99,99,
-99,99,99,99,99,99,99,99,99,99,99,99,99,99,99,99,
-99
-#ifdef __GNUC__
-};
-short int int_list27520[] = {
-#else
-,
-#endif
-99,99,99,99,99,99,99,99,99,99,99,99,99,99,99,
-99,99,99,99,99,99,99,99,99,99,99,99,99,99,99,99,
-99,99,99,99,99,99,99,99,99,99,99,99,99,99,99,99,
-99,99,99,99,99,99,99,99,99,99,99,99,99,99,99,99,
-99
-#ifdef __GNUC__
-};
-short int int_list27584[] = {
-#else
-,
-#endif
-99,99,99,99,99,99,99,99,99,99,99,99,99,99,99,
-99,99,99,99,99,99,99,99,99,99,99,99,99,99,99,99,
-99,99,99,99,99,99,99,99,99,99,99,99,99,99,99,99,
-99,99,99,99,99,99,99,99,99,99,99,99,99,99,99,99,
-124
-#ifdef __GNUC__
-};
-short int int_list27648[] = {
-#else
-,
-#endif
-124,124,124,124,124,124,124,124,124,124,124,124,124,124,124,
-125,125,125,125,125,125,125,125,125,125,125,125,125,125,125,125,
-125,125,125,125,125,125,125,125,125,125,125,125,125,125,125,125,
-125,125,125,125,125,125,125,125,125,125,125,125,125,125,125,125,
-125
-#ifdef __GNUC__
-};
-short int int_list27712[] = {
-#else
-,
-#endif
-125,125,125,125,125,125,125,125,125,125,125,125,125,125,125,
-125,125,125,125,125,125,125,125,125,125,125,125,125,125,125,125,
-125,125,125,125,125,125,125,125,125,125,125,125,125,125,125,125,
-125,125,125,125,125,125,125,125,125,125,125,125,125,125,125,125,
-125
-#ifdef __GNUC__
-};
-short int int_list27776[] = {
-#else
-,
-#endif
-125,125,125,125,125,125,125,125,125,125,125,125,125,125,125,
-125,125,125,125,125,125,125,125,125,125,125,125,125,125,125,125,
-125,125,125,125,125,125,125,125,125,125,125,125,125,125,125,125,
-125,125,125,125,125,125,125,125,125,125,125,125,125,125,125,125,
-125
-#ifdef __GNUC__
-};
-short int int_list27840[] = {
-#else
-,
-#endif
-125,125,125,125,125,125,125,125,125,125,125,125,125,125,125,
-125,125,125,125,125,125,125,125,125,125,125,125,125,125,125,125,
-125,125,125,125,125,125,125,125,125,125,125,125,125,125,125,125,
-125,125,125,125,125,125,125,125,125,125,125,125,125,125,125,125,
-120
-#ifdef __GNUC__
-};
-short int int_list27904[] = {
-#else
-,
-#endif
-120,120,120,120,120,120,120,120,120,120,120,120,120,120,120,
-121,121,121,121,121,121,121,121,121,121,121,121,121,121,121,121,
-121,121,121,121,121,121,121,121,121,121,121,121,121,121,121,121,
-121,121,121,121,121,121,121,121,121,121,121,121,121,121,121,121,
-121
-#ifdef __GNUC__
-};
-short int int_list27968[] = {
-#else
-,
-#endif
-121,121,121,121,121,121,121,121,121,121,121,121,121,121,121,
-121,121,121,121,121,121,121,121,121,121,121,121,121,121,121,121,
-121,121,121,121,121,121,121,121,121,121,121,121,121,121,121,121,
-121,121,121,121,121,121,121,121,121,121,121,121,121,121,121,121,
-121
-#ifdef __GNUC__
-};
-short int int_list28032[] = {
-#else
-,
-#endif
-121,121,121,121,121,121,121,121,121,121,121,121,121,121,121,
-121,121,121,121,121,121,121,121,121,121,121,121,121,121,121,121,
-121,121,121,121,121,121,121,121,121,121,121,121,121,121,121,121,
-121,121,121,121,121,121,121,121,121,121,121,121,121,121,121,121,
-121
-#ifdef __GNUC__
-};
-short int int_list28096[] = {
-#else
-,
-#endif
-121,121,121,121,121,121,121,121,121,121,121,121,121,121,121,
-121,121,121,121,121,121,121,121,121,121,121,121,121,121,121,121,
-121,121,121,121,121,121,121,121,121,121,121,121,121,121,121,121,
-121,121,121,121,121,121,121,121,121,121,121,121,121,121,121,121,
-181
-#ifdef __GNUC__
-};
-short int int_list28160[] = {
-#else
-,
-#endif
-181,181,181,181,181,181,181,181,181,181,181,181,181,181,181,
-179,179,179,179,179,179,179,179,179,179,179,179,179,179,179,179,
-179,179,179,179,179,179,179,179,179,179,179,179,179,179,179,179,
-179,179,179,179,179,179,179,179,179,179,179,179,179,179,179,179,
-179
-#ifdef __GNUC__
-};
-short int int_list28224[] = {
-#else
-,
-#endif
-179,179,179,179,179,179,179,179,179,179,179,179,179,179,179,
-179,179,179,179,179,179,179,179,179,179,179,179,179,179,179,179,
-179,179,179,179,179,179,179,179,179,179,179,179,179,179,179,179,
-179,179,179,179,179,179,179,179,179,179,179,179,179,179,179,179,
-179
-#ifdef __GNUC__
-};
-short int int_list28288[] = {
-#else
-,
-#endif
-179,179,179,179,179,179,179,179,179,179,179,179,179,179,179,
-179,179,179,179,179,179,179,179,179,179,179,179,179,179,179,179,
-179,179,179,179,179,179,179,179,179,179,179,179,179,179,179,179,
-179,179,179,179,179,179,179,179,179,179,179,179,179,179,179,179,
-179
-#ifdef __GNUC__
-};
-short int int_list28352[] = {
-#else
-,
-#endif
-179,179,179,179,179,179,179,179,179,179,179,179,179,179,179,
-179,179,179,179,179,179,179,179,179,179,179,179,179,179,179,179,
-179,179,179,179,179,179,179,179,179,179,179,179,179,179,179,179,
-179,179,179,179,179,179,179,179,179,179,179,179,179,179,179,179,
-161
-#ifdef __GNUC__
-};
-short int int_list28416[] = {
-#else
-,
-#endif
-161,161,161,161,161,161,161,161,161,161,161,161,161,161,161,
-159,159,159,159,159,159,159,159,159,159,159,159,159,159,159,159,
-159,159,159,159,159,159,159,159,159,159,159,159,159,159,159,159,
-159,159,159,159,159,159,159,159,159,159,159,159,159,159,159,159,
-159
-#ifdef __GNUC__
-};
-short int int_list28480[] = {
-#else
-,
-#endif
-159,159,159,159,159,159,159,159,159,159,159,159,159,159,159,
-159,159,159,159,159,159,159,159,159,159,159,159,159,159,159,159,
-159,159,159,159,159,159,159,159,159,159,159,159,159,159,159,159,
-159,159,159,159,159,159,159,159,159,159,159,159,159,159,159,159,
-159
-#ifdef __GNUC__
-};
-short int int_list28544[] = {
-#else
-,
-#endif
-159,159,159,159,159,159,159,159,159,159,159,159,159,159,159,
-159,159,159,159,159,159,159,159,159,159,159,159,159,159,159,159,
-159,159,159,159,159,159,159,159,159,159,159,159,159,159,159,159,
-159,159,159,159,159,159,159,159,159,159,159,159,159,159,159,159,
-159
-#ifdef __GNUC__
-};
-short int int_list28608[] = {
-#else
-,
-#endif
-159,159,159,159,159,159,159,159,159,159,159,159,159,159,159,
-159,159,159,159,159,159,159,159,159,159,159,159,159,159,159,159,
-159,159,159,159,159,159,159,159,159,159,159,159,159,159,159,159,
-159,159,159,159,159,159,159,159,159,159,159,159,159,159,159,159,
--1
-#ifdef __GNUC__
-};
-short int int_list28672[] = {
-#else
-,
-#endif
--1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
-188,188,188,188,188,188,188,188,188,188,188,188,188,188,188,188,
-188,188,188,188,188,188,188,188,188,188,188,188,188,188,188,188,
-188,188,188,188,188,188,188,188,188,188,188,188,188,188,188,188,
-188
-#ifdef __GNUC__
-};
-short int int_list28736[] = {
-#else
-,
-#endif
-188,188,188,188,188,188,188,188,188,188,188,188,188,188,188,
-188,188,188,188,188,188,188,188,188,188,188,188,188,188,188,188,
-188,188,188,188,188,188,188,188,188,188,188,188,188,188,188,188,
-188,188,188,188,188,188,188,188,188,188,188,188,188,188,188,188,
-188
-#ifdef __GNUC__
-};
-short int int_list28800[] = {
-#else
-,
-#endif
-188,188,188,188,188,188,188,188,188,188,188,188,188,188,188,
-188,188,188,188,188,188,188,188,188,188,188,188,188,188,188,188,
-188,188,188,188,188,188,188,188,188,188,188,188,188,188,188,188,
-188,188,188,188,188,188,188,188,188,188,188,188,188,188,188,188,
-188
-#ifdef __GNUC__
-};
-short int int_list28864[] = {
-#else
-,
-#endif
-188,188,188,188,188,188,188,188,188,188,188,188,188,188,188,
-188,188,188,188,188,188,188,188,188,188,188,188,188,188,188,188,
-188,188,188,188,188,188,188,188,188,188,188,188,188,188,188,188,
-188,188,188,188,188,188,188,188,188,188,188,188,188,188,188,188,
--1
-#ifdef __GNUC__
-};
-short int int_list28928[] = {
-#else
-,
-#endif
--1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
-170,170,170,170,170,170,170,170,170,170,170,170,170,170,170,170,
-170,170,170,170,170,170,170,170,170,170,170,170,170,170,170,170,
-170,170,170,170,170,170,170,170,170,170,170,170,170,170,170,170,
-170
-#ifdef __GNUC__
-};
-short int int_list28992[] = {
-#else
-,
-#endif
-170,170,170,170,170,170,170,170,170,170,170,170,170,170,170,
-170,170,170,170,170,170,170,170,170,170,170,170,170,170,170,170,
-170,170,170,170,170,170,170,170,170,170,170,170,170,170,170,170,
-170,170,170,170,170,170,170,170,170,170,170,170,170,170,170,170,
-170
-#ifdef __GNUC__
-};
-short int int_list29056[] = {
-#else
-,
-#endif
-170,170,170,170,170,170,170,170,170,170,170,170,170,170,170,
-170,170,170,170,170,170,170,170,170,170,170,170,170,170,170,170,
-170,170,170,170,170,170,170,170,170,170,170,170,170,170,170,170,
-170,170,170,170,170,170,170,170,170,170,170,170,170,170,170,170,
-170
-#ifdef __GNUC__
-};
-short int int_list29120[] = {
-#else
-,
-#endif
-170,170,170,170,170,170,170,170,170,170,170,170,170,170,170,
-170,170,170,170,170,170,170,170,170,170,170,170,170,170,170,170,
-170,170,170,170,170,170,170,170,170,170,170,170,170,170,170,170,
-170,170,170,170,170,170,170,170,170,170,170,170,170,170,170,170,
--1
-#ifdef __GNUC__
-};
-short int int_list29184[] = {
-#else
-,
-#endif
--1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
-190,190,190,190,190,190,190,190,190,190,190,190,190,190,190,190,
-190,190,190,190,190,190,190,190,190,190,190,190,190,190,190,190,
-190,190,190,190,190,190,190,190,190,190,190,190,190,190,190,190,
-190
-#ifdef __GNUC__
-};
-short int int_list29248[] = {
-#else
-,
-#endif
-190,190,190,190,190,190,190,190,190,190,190,190,190,190,190,
-190,190,190,190,190,190,190,190,190,190,190,190,190,190,190,190,
-190,190,190,190,190,190,190,190,190,190,190,190,190,190,190,190,
-190,190,190,190,190,190,190,190,190,190,190,190,190,190,190,190,
-190
-#ifdef __GNUC__
-};
-short int int_list29312[] = {
-#else
-,
-#endif
-190,190,190,190,190,190,190,190,190,190,190,190,190,190,190,
-190,190,190,190,190,190,190,190,190,190,190,190,190,190,190,190,
-190,190,190,190,190,190,190,190,190,190,190,190,190,190,190,190,
-190,190,190,190,190,190,190,190,190,190,190,190,190,190,190,190,
-190
-#ifdef __GNUC__
-};
-short int int_list29376[] = {
-#else
-,
-#endif
-190,190,190,190,190,190,190,190,190,190,190,190,190,190,190,
-190,190,190,190,190,190,190,190,190,190,190,190,190,190,190,190,
-190,190,190,190,190,190,190,190,190,190,190,190,190,190,190,190,
-190,190,190,190,190,190,190,190,190,190,190,190,190,190,190,190,
--1
-#ifdef __GNUC__
-};
-short int int_list29440[] = {
-#else
-,
-#endif
--1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
-163,163,163,163,163,163,163,163,163,163,163,163,163,163,163,163,
-163,163,163,163,163,163,163,163,163,163,163,163,163,163,163,163,
-163,163,163,163,163,163,163,163,163,163,163,163,163,163,163,163,
-163
-#ifdef __GNUC__
-};
-short int int_list29504[] = {
-#else
-,
-#endif
-163,163,163,163,163,163,163,163,163,163,163,163,163,163,163,
-163,163,163,163,163,163,163,163,163,163,163,163,163,163,163,163,
-163,163,163,163,163,163,163,163,163,163,163,163,163,163,163,163,
-163,163,163,163,163,163,163,163,163,163,163,163,163,163,163,163,
-163
-#ifdef __GNUC__
-};
-short int int_list29568[] = {
-#else
-,
-#endif
-163,163,163,163,163,163,163,163,163,163,163,163,163,163,163,
-163,163,163,163,163,163,163,163,163,163,163,163,163,163,163,163,
-163,163,163,163,163,163,163,163,163,163,163,163,163,163,163,163,
-163,163,163,163,163,163,163,163,163,163,163,163,163,163,163,163,
-163
-#ifdef __GNUC__
-};
-short int int_list29632[] = {
-#else
-,
-#endif
-163,163,163,163,163,163,163,163,163,163,163,163,163,163,163,
-163,163,163,163,163,163,163,163,163,163,163,163,163,163,163,163,
-163,163,163,163,163,163,163,163,163,163,163,163,163,163,163,163,
-163,163,163,163,163,163,163,163,163,163,163,163,163,163,163,163,
--1
-#ifdef __GNUC__
-};
-short int int_list29696[] = {
-#else
-,
-#endif
--1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
-174,174,174,174,174,174,174,174,174,174,174,174,174,174,174,174,
-174,174,174,174,174,174,174,174,174,174,174,174,174,174,174,174,
-174,174,174,174,174,174,174,174,174,174,174,174,174,174,174,174,
-174
-#ifdef __GNUC__
-};
-short int int_list29760[] = {
-#else
-,
-#endif
-174,174,174,174,174,174,174,174,174,174,174,174,174,174,174,
-174,174,174,174,174,174,174,174,174,174,174,174,174,174,174,174,
-174,174,174,174,174,174,174,174,174,174,174,174,174,174,174,174,
-174,174,174,174,174,174,174,174,174,174,174,174,174,174,174,174,
-174
-#ifdef __GNUC__
-};
-short int int_list29824[] = {
-#else
-,
-#endif
-174,174,174,174,174,174,174,174,174,174,174,174,174,174,174,
-174,174,174,174,174,174,174,174,174,174,174,174,174,174,174,174,
-174,174,174,174,174,174,174,174,174,174,174,174,174,174,174,174,
-174,174,174,174,174,174,174,174,174,174,174,174,174,174,174,174,
-174
-#ifdef __GNUC__
-};
-short int int_list29888[] = {
-#else
-,
-#endif
-174,174,174,174,174,174,174,174,174,174,174,174,174,174,174,
-174,174,174,174,174,174,174,174,174,174,174,174,174,174,174,174,
-174,174,174,174,174,174,174,174,174,174,174,174,174,174,174,174,
-174,174,174,174,174,174,174,174,174,174,174,174,174,174,174,174,
--1
-#ifdef __GNUC__
-};
-short int int_list29952[] = {
-#else
-,
-#endif
--1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
-213,213,213,213,213,213,213,213,213,213,213,213,213,213,213,213,
-213,213,213,213,213,213,213,213,213,213,213,213,213,213,213,213,
-213,213,213,213,213,213,213,213,213,213,213,213,213,213,213,213,
-213
-#ifdef __GNUC__
-};
-short int int_list30016[] = {
-#else
-,
-#endif
-213,213,213,213,213,213,213,213,213,213,213,213,213,213,213,
-213,213,213,213,213,213,213,213,213,213,213,213,213,213,213,213,
-213,213,213,213,213,213,213,213,213,213,213,213,213,213,213,213,
-213,213,213,213,213,213,213,213,213,213,213,213,213,213,213,213,
-213
-#ifdef __GNUC__
-};
-short int int_list30080[] = {
-#else
-,
-#endif
-213,213,213,213,213,213,213,213,213,213,213,213,213,213,213,
-213,213,213,213,213,213,213,213,213,213,213,213,213,213,213,213,
-213,213,213,213,213,213,213,213,213,213,213,213,213,213,213,213,
-213,213,213,213,213,213,213,213,213,213,213,213,213,213,213,213,
-213
-#ifdef __GNUC__
-};
-short int int_list30144[] = {
-#else
-,
-#endif
-213,213,213,213,213,213,213,213,213,213,213,213,213,213,213,
-213,213,213,213,213,213,213,213,213,213,213,213,213,213,213,213,
-213,213,213,213,213,213,213,213,213,213,213,213,213,213,213,213,
-213,213,213,213,213,213,213,213,213,213,213,213,213,213,213,213,
-171
-#ifdef __GNUC__
-};
-short int int_list30208[] = {
-#else
-,
-#endif
-171,171,171,171,171,171,171,171,171,171,171,171,171,171,171,
-172,172,172,172,172,172,172,172,172,172,172,172,172,172,172,172,
-172,172,172,172,172,172,172,172,172,172,172,172,172,172,172,172,
-172,172,172,172,172,172,172,172,172,172,172,172,172,172,172,172,
-172
-#ifdef __GNUC__
-};
-short int int_list30272[] = {
-#else
-,
-#endif
-172,172,172,172,172,172,172,172,172,172,172,172,172,172,172,
-172,172,172,172,172,172,172,172,172,172,172,172,172,172,172,172,
-172,172,172,172,172,172,172,172,172,172,172,172,172,172,172,172,
-172,172,172,172,172,172,172,172,172,172,172,172,172,172,172,172,
-172
-#ifdef __GNUC__
-};
-short int int_list30336[] = {
-#else
-,
-#endif
-172,172,172,172,172,172,172,172,172,172,172,172,172,172,172,
-172,172,172,172,172,172,172,172,172,172,172,172,172,172,172,172,
-172,172,172,172,172,172,172,172,172,172,172,172,172,172,172,172,
-172,172,172,172,172,172,172,172,172,172,172,172,172,172,172,172,
-172
-#ifdef __GNUC__
-};
-short int int_list30400[] = {
-#else
-,
-#endif
-172,172,172,172,172,172,172,172,172,172,172,172,172,172,172,
-172,172,172,172,172,172,172,172,172,172,172,172,172,172,172,172,
-172,172,172,172,172,172,172,172,172,172,172,172,172,172,172,172,
-172,172,172,172,172,172,172,172,172,172,172,172,172,172,172,172,
--1
-#ifdef __GNUC__
-};
-short int int_list30464[] = {
-#else
-,
-#endif
--1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
-206,206,206,206,206,206,206,206,206,206,206,206,206,206,206,206,
-206,206,206,206,206,206,206,206,206,206,206,206,206,206,206,206,
-206,206,206,206,206,206,206,206,206,206,206,206,206,206,206,206,
-206
-#ifdef __GNUC__
-};
-short int int_list30528[] = {
-#else
-,
-#endif
-206,206,206,206,206,206,206,206,206,206,206,206,206,206,206,
-206,206,206,206,206,206,206,206,206,206,206,206,206,206,206,206,
-206,206,206,206,206,206,206,206,206,206,206,206,206,206,206,206,
-206,206,206,206,206,206,206,206,206,206,206,206,206,206,206,206,
-206
-#ifdef __GNUC__
-};
-short int int_list30592[] = {
-#else
-,
-#endif
-206,206,206,206,206,206,206,206,206,206,206,206,206,206,206,
-206,206,206,206,206,206,206,206,206,206,206,206,206,206,206,206,
-206,206,206,206,206,206,206,206,206,206,206,206,206,206,206,206,
-206,206,206,206,206,206,206,206,206,206,206,206,206,206,206,206,
-206
-#ifdef __GNUC__
-};
-short int int_list30656[] = {
-#else
-,
-#endif
-206,206,206,206,206,206,206,206,206,206,206,206,206,206,206,
-206,206,206,206,206,206,206,206,206,206,206,206,206,206,206,206,
-206,206,206,206,206,206,206,206,206,206,206,206,206,206,206,206,
-206,206,206,206,206,206,206,206,206,206,206,206,206,206,206,206,
-312
-#ifdef __GNUC__
-};
-short int int_list30720[] = {
-#else
-,
-#endif
-312,312,312,312,312,312,312,312,312,312,312,312,312,312,312,
-312,312,312,312,312,312,312,312,312,312,312,312,312,312,312,312,
-312,312,312,312,312,312,312,312,312,312,312,312,312,312,312,312,
-312,312,312,312,312,312,312,312,312,312,312,312,312,312,312,312,
-312
-#ifdef __GNUC__
-};
-short int int_list30784[] = {
-#else
-,
-#endif
-312,312,312,312,312,312,312,312,312,312,312,312,312,312,312,
-312,312,312,312,312,312,312,312,312,312,312,312,312,312,312,312,
-312,312,312,312,312,312,312,312,312,312,312,312,312,312,312,312,
-312,312,312,312,312,312,312,312,312,312,312,312,312,312,312,312,
-312
-#ifdef __GNUC__
-};
-short int int_list30848[] = {
-#else
-,
-#endif
-312,312,312,312,312,312,312,312,312,312,312,312,312,312,312,
-312,312,312,312,312,312,312,312,312,312,312,312,312,312,312,312,
-312,312,312,312,312,312,312,312,312,312,312,312,312,312,312,312,
-312,312,312,312,312,312,312,312,312,312,312,312,312,312,312,312,
-312
-#ifdef __GNUC__
-};
-short int int_list30912[] = {
-#else
-,
-#endif
-312,312,312,312,312,312,312,312,312,312,312,312,312,312,312,
-312,312,312,312,312,312,312,312,312,312,312,312,312,312,312,312,
-312,312,312,312,312,312,312,312,312,312,312,312,312,312,312,312,
-312,312,312,312,312,312,312,312,312,312,312,312,312,312,312,312,
-221
-#ifdef __GNUC__
-};
-short int int_list30976[] = {
-#else
-,
-#endif
--1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
-222,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
-222,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
-222,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
-222
-#ifdef __GNUC__
-};
-short int int_list31040[] = {
-#else
-,
-#endif
--1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
-222,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
-222,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
-222,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
-222
-#ifdef __GNUC__
-};
-short int int_list31104[] = {
-#else
-,
-#endif
--1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
-222,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
-222,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
-222,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
-222
-#ifdef __GNUC__
-};
-short int int_list31168[] = {
-#else
-,
-#endif
--1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
-222,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
-222,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
-222,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
-134
-#ifdef __GNUC__
-};
-short int int_list31232[] = {
-#else
-,
-#endif
--1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
--1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
--1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
--1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
--1
-#ifdef __GNUC__
-};
-short int int_list31296[] = {
-#else
-,
-#endif
--1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
--1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
--1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
--1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
--1
-#ifdef __GNUC__
-};
-short int int_list31360[] = {
-#else
-,
-#endif
--1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
--1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
--1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
--1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
--1
-#ifdef __GNUC__
-};
-short int int_list31424[] = {
-#else
-,
-#endif
--1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
--1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
--1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
--1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
-151
-#ifdef __GNUC__
-};
-short int int_list31488[] = {
-#else
-,
-#endif
--1,-1,-1,-1,-1,-1,-1,232,231,229,-1,-1,230,-1,-1,
--1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,230,-1,-1,
--1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,230,-1,-1,
--1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,230,-1,-1,
--1
-#ifdef __GNUC__
-};
-short int int_list31552[] = {
-#else
-,
-#endif
--1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,230,-1,-1,
--1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,230,-1,-1,
--1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,230,-1,-1,
--1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,230,-1,-1,
--1
-#ifdef __GNUC__
-};
-short int int_list31616[] = {
-#else
-,
-#endif
--1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,230,-1,-1,
--1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,230,-1,-1,
--1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,230,-1,-1,
--1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,230,-1,-1,
--1
-#ifdef __GNUC__
-};
-short int int_list31680[] = {
-#else
-,
-#endif
--1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,230,-1,-1,
--1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,230,-1,-1,
--1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,230,-1,-1,
--1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,230,-1,-1,
-106
-#ifdef __GNUC__
-};
-short int int_list31744[] = {
-#else
-,
-#endif
-106,106,106,118,118,118,118,106,106,106,106,118,118,118,118,
--1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
--1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
--1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
--1
-#ifdef __GNUC__
-};
-short int int_list31808[] = {
-#else
-,
-#endif
--1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
--1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
--1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
--1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
--1
-#ifdef __GNUC__
-};
-short int int_list31872[] = {
-#else
-,
-#endif
--1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
--1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
--1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
--1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
--1
-#ifdef __GNUC__
-};
-short int int_list31936[] = {
-#else
-,
-#endif
--1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
--1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
--1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
--1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
-192
-#ifdef __GNUC__
-};
-short int int_list32000[] = {
-#else
-,
-#endif
-192,192,192,192,192,192,192,191,191,191,191,191,191,191,191,
-192,192,192,192,192,192,192,192,191,191,191,191,191,191,191,191,
-192,192,192,192,192,192,192,192,191,191,191,191,191,191,191,191,
-192,192,192,192,192,192,192,192,191,191,191,191,191,191,191,191,
-192
-#ifdef __GNUC__
-};
-short int int_list32064[] = {
-#else
-,
-#endif
-192,192,192,192,192,192,192,191,191,191,191,191,191,191,191,
-192,192,192,192,192,192,192,192,191,191,191,191,191,191,191,191,
-192,192,192,192,192,192,192,192,191,191,191,191,191,191,191,191,
-192,192,192,192,192,192,192,192,191,191,191,191,191,191,191,191,
-192
-#ifdef __GNUC__
-};
-short int int_list32128[] = {
-#else
-,
-#endif
-192,192,192,192,192,192,192,191,191,191,191,191,191,191,191,
-192,192,192,192,192,192,192,192,191,191,191,191,191,191,191,191,
-192,192,192,192,192,192,192,192,191,191,191,191,191,191,191,191,
-192,192,192,192,192,192,192,192,191,191,191,191,191,191,191,191,
-192
-#ifdef __GNUC__
-};
-short int int_list32192[] = {
-#else
-,
-#endif
-192,192,192,192,192,192,192,191,191,191,191,191,191,191,191,
-192,192,192,192,192,192,192,192,191,191,191,191,191,191,191,191,
-192,192,192,192,192,192,192,192,191,191,191,191,191,191,191,191,
-192,192,192,192,192,192,192,192,191,191,191,191,191,191,191,191,
-313
-#ifdef __GNUC__
-};
-short int int_list32256[] = {
-#else
-,
-#endif
-313,313,313,313,313,313,313,313,313,313,313,313,313,313,313,
-313,313,313,313,313,313,313,313,313,313,313,313,313,313,313,313,
-313,313,313,313,313,313,313,313,313,313,313,313,313,313,313,313,
-313,313,313,313,313,313,313,313,313,313,313,313,313,313,313,313,
-313
-#ifdef __GNUC__
-};
-short int int_list32320[] = {
-#else
-,
-#endif
-313,313,313,313,313,313,313,313,313,313,313,313,313,313,313,
-313,313,313,313,313,313,313,313,313,313,313,313,313,313,313,313,
-313,313,313,313,313,313,313,313,313,313,313,313,313,313,313,313,
-313,313,313,313,313,313,313,313,313,313,313,313,313,313,313,313,
-313
-#ifdef __GNUC__
-};
-short int int_list32384[] = {
-#else
-,
-#endif
-313,313,313,313,313,313,313,313,313,313,313,313,313,313,313,
-313,313,313,313,313,313,313,313,313,313,313,313,313,313,313,313,
-313,313,313,313,313,313,313,313,313,313,313,313,313,313,313,313,
-313,313,313,313,313,313,313,313,313,313,313,313,313,313,313,313,
-313
-#ifdef __GNUC__
-};
-short int int_list32448[] = {
-#else
-,
-#endif
-313,313,313,313,313,313,313,313,313,313,313,313,313,313,313,
-313,313,313,313,313,313,313,313,313,313,313,313,313,313,313,313,
-313,313,313,313,313,313,313,313,313,313,313,313,313,313,313,313,
-313,313,313,313,313,313,313,313,313,313,313,313,313,313,313,313,
-320
-#ifdef __GNUC__
-};
-short int int_list32512[] = {
-#else
-,
-#endif
-320,320,320,320,320,320,320,320,320,320,320,320,320,320,320,
-320,320,320,320,320,320,320,320,320,320,320,320,320,320,320,320,
-320,320,320,320,320,320,320,320,320,320,320,320,320,320,320,320,
-320,320,320,320,320,320,320,320,320,320,320,320,320,320,320,320,
-320
-#ifdef __GNUC__
-};
-short int int_list32576[] = {
-#else
-,
-#endif
-320,320,320,320,320,320,320,320,320,320,320,320,320,320,320,
-320,320,320,320,320,320,320,320,320,320,320,320,320,320,320,320,
-320,320,320,320,320,320,320,320,320,320,320,320,320,320,320,320,
-320,320,320,320,320,320,320,320,320,320,320,320,320,320,320,320,
-320
-#ifdef __GNUC__
-};
-short int int_list32640[] = {
-#else
-,
-#endif
-320,320,320,320,320,320,320,320,320,320,320,320,320,320,320,
-320,320,320,320,320,320,320,320,320,320,320,320,320,320,320,320,
-320,320,320,320,320,320,320,320,320,320,320,320,320,320,320,320,
-320,320,320,320,320,320,320,320,320,320,320,320,320,320,320,320,
-320
-#ifdef __GNUC__
-};
-short int int_list32704[] = {
-#else
-,
-#endif
-320,320,320,320,320,320,320,320,320,320,320,320,320,320,320,
-320,320,320,320,320,320,320,320,320,320,320,320,320,320,320,320,
-320,320,320,320,320,320,320,320,320,320,320,320,320,320,320,320,
-320,320,320,320,320,320,320,320,320,320,320,320,320,320,320,320,
-11
-#ifdef __GNUC__
-};
-short int int_list32768[] = {
-#else
-,
-#endif
-11,11,11,11,11,11,11,11,11,11,11,11,11,11,11,
-11,11,11,11,11,11,11,11,11,11,11,11,11,11,11,11,
-11,11,11,11,11,11,11,11,11,11,11,11,11,11,11,11,
-11,11,11,11,11,11,11,11,11,11,11,11,11,11,11,11,
-11
-#ifdef __GNUC__
-};
-short int int_list32832[] = {
-#else
-,
-#endif
-11,11,11,11,11,11,11,11,11,11,11,11,11,11,11,
-11,11,11,11,11,11,11,11,11,11,11,11,11,11,11,11,
-11,11,11,11,11,11,11,11,11,11,11,11,11,11,11,11,
-11,11,11,11,11,11,11,11,11,11,11,11,11,11,11,11,
-11
-#ifdef __GNUC__
-};
-short int int_list32896[] = {
-#else
-,
-#endif
-11,11,11,11,11,11,11,11,11,11,11,11,11,11,11,
-11,11,11,11,11,11,11,11,11,11,11,11,11,11,11,11,
-11,11,11,11,11,11,11,11,11,11,11,11,11,11,11,11,
-11,11,11,11,11,11,11,11,11,11,11,11,11,11,11,11,
-11
-#ifdef __GNUC__
-};
-short int int_list32960[] = {
-#else
-,
-#endif
-11,11,11,11,11,11,11,11,11,11,11,11,11,11,11,
-11,11,11,11,11,11,11,11,11,11,11,11,11,11,11,11,
-11,11,11,11,11,11,11,11,11,11,11,11,11,11,11,11,
-11,11,11,11,11,11,11,11,11,11,11,11,11,11,11,11,
-6
-#ifdef __GNUC__
-};
-short int int_list33024[] = {
-#else
-,
-#endif
-6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,
-6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,
-6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,
-6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,
-6
-#ifdef __GNUC__
-};
-short int int_list33088[] = {
-#else
-,
-#endif
-6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,
-6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,
-6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,
-6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,
-6
-#ifdef __GNUC__
-};
-short int int_list33152[] = {
-#else
-,
-#endif
-6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,
-6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,
-6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,
-6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,
-6
-#ifdef __GNUC__
-};
-short int int_list33216[] = {
-#else
-,
-#endif
-6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,
-6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,
-6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,
-6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,
-371
-#ifdef __GNUC__
-};
-short int int_list33280[] = {
-#else
-,
-#endif
-371,371,371,371,371,371,371,371,371,371,371,371,371,371,371,
-371,371,371,371,371,371,371,371,371,371,371,371,371,371,371,371,
-371,371,371,371,371,371,371,371,371,371,371,371,371,371,371,371,
-371,371,371,371,371,371,371,371,371,371,371,371,371,371,371,371,
-371
-#ifdef __GNUC__
-};
-short int int_list33344[] = {
-#else
-,
-#endif
-371,371,371,371,371,371,371,371,371,371,371,371,371,371,371,
-371,371,371,371,371,371,371,371,371,371,371,371,371,371,371,371,
-371,371,371,371,371,371,371,371,371,371,371,371,371,371,371,371,
-371,371,371,371,371,371,371,371,371,371,371,371,371,371,371,371,
-371
-#ifdef __GNUC__
-};
-short int int_list33408[] = {
-#else
-,
-#endif
-371,371,371,371,371,371,371,371,371,371,371,371,371,371,371,
-371,371,371,371,371,371,371,371,371,371,371,371,371,371,371,371,
-371,371,371,371,371,371,371,371,371,371,371,371,371,371,371,371,
-371,371,371,371,371,371,371,371,371,371,371,371,371,371,371,371,
-371
-#ifdef __GNUC__
-};
-short int int_list33472[] = {
-#else
-,
-#endif
-371,371,371,371,371,371,371,371,371,371,371,371,371,371,371,
-371,371,371,371,371,371,371,371,371,371,371,371,371,371,371,371,
-371,371,371,371,371,371,371,371,371,371,371,371,371,371,371,371,
-371,371,371,371,371,371,371,371,371,371,371,371,371,371,371,371,
-366
-#ifdef __GNUC__
-};
-short int int_list33536[] = {
-#else
-,
-#endif
-366,366,366,366,366,366,366,366,366,366,366,366,366,366,366,
-366,366,366,366,366,366,366,366,366,366,366,366,366,366,366,366,
-366,366,366,366,366,366,366,366,366,366,366,366,366,366,366,366,
-366,366,366,366,366,366,366,366,366,366,366,366,366,366,366,366,
-366
-#ifdef __GNUC__
-};
-short int int_list33600[] = {
-#else
-,
-#endif
-366,366,366,366,366,366,366,366,366,366,366,366,366,366,366,
-366,366,366,366,366,366,366,366,366,366,366,366,366,366,366,366,
-366,366,366,366,366,366,366,366,366,366,366,366,366,366,366,366,
-366,366,366,366,366,366,366,366,366,366,366,366,366,366,366,366,
-366
-#ifdef __GNUC__
-};
-short int int_list33664[] = {
-#else
-,
-#endif
-366,366,366,366,366,366,366,366,366,366,366,366,366,366,366,
-366,366,366,366,366,366,366,366,366,366,366,366,366,366,366,366,
-366,366,366,366,366,366,366,366,366,366,366,366,366,366,366,366,
-366,366,366,366,366,366,366,366,366,366,366,366,366,366,366,366,
-366
-#ifdef __GNUC__
-};
-short int int_list33728[] = {
-#else
-,
-#endif
-366,366,366,366,366,366,366,366,366,366,366,366,366,366,366,
-366,366,366,366,366,366,366,366,366,366,366,366,366,366,366,366,
-366,366,366,366,366,366,366,366,366,366,366,366,366,366,366,366,
-366,366,366,366,366,366,366,366,366,366,366,366,366,366,366,366,
-261
-#ifdef __GNUC__
-};
-short int int_list33792[] = {
-#else
-,
-#endif
-261,261,261,261,261,261,261,261,261,261,261,261,261,261,261,
-261,261,261,261,261,261,261,261,261,261,261,261,261,261,261,261,
-261,261,261,261,261,261,261,261,261,261,261,261,261,261,261,261,
-261,261,261,261,261,261,261,261,261,261,261,261,261,261,261,261,
-261
-#ifdef __GNUC__
-};
-short int int_list33856[] = {
-#else
-,
-#endif
-261,261,261,261,261,261,261,261,261,261,261,261,261,261,261,
-261,261,261,261,261,261,261,261,261,261,261,261,261,261,261,261,
-261,261,261,261,261,261,261,261,261,261,261,261,261,261,261,261,
-261,261,261,261,261,261,261,261,261,261,261,261,261,261,261,261,
-261
-#ifdef __GNUC__
-};
-short int int_list33920[] = {
-#else
-,
-#endif
-261,261,261,261,261,261,261,261,261,261,261,261,261,261,261,
-261,261,261,261,261,261,261,261,261,261,261,261,261,261,261,261,
-261,261,261,261,261,261,261,261,261,261,261,261,261,261,261,261,
-261,261,261,261,261,261,261,261,261,261,261,261,261,261,261,261,
-261
-#ifdef __GNUC__
-};
-short int int_list33984[] = {
-#else
-,
-#endif
-261,261,261,261,261,261,261,261,261,261,261,261,261,261,261,
-261,261,261,261,261,261,261,261,261,261,261,261,261,261,261,261,
-261,261,261,261,261,261,261,261,261,261,261,261,261,261,261,261,
-261,261,261,261,261,261,261,261,261,261,261,261,261,261,261,261,
-256
-#ifdef __GNUC__
-};
-short int int_list34048[] = {
-#else
-,
-#endif
-256,256,256,256,256,256,256,256,256,256,256,256,256,256,256,
-256,256,256,256,256,256,256,256,256,256,256,256,256,256,256,256,
-256,256,256,256,256,256,256,256,256,256,256,256,256,256,256,256,
-256,256,256,256,256,256,256,256,256,256,256,256,256,256,256,256,
-256
-#ifdef __GNUC__
-};
-short int int_list34112[] = {
-#else
-,
-#endif
-256,256,256,256,256,256,256,256,256,256,256,256,256,256,256,
-256,256,256,256,256,256,256,256,256,256,256,256,256,256,256,256,
-256,256,256,256,256,256,256,256,256,256,256,256,256,256,256,256,
-256,256,256,256,256,256,256,256,256,256,256,256,256,256,256,256,
-256
-#ifdef __GNUC__
-};
-short int int_list34176[] = {
-#else
-,
-#endif
-256,256,256,256,256,256,256,256,256,256,256,256,256,256,256,
-256,256,256,256,256,256,256,256,256,256,256,256,256,256,256,256,
-256,256,256,256,256,256,256,256,256,256,256,256,256,256,256,256,
-256,256,256,256,256,256,256,256,256,256,256,256,256,256,256,256,
-256
-#ifdef __GNUC__
-};
-short int int_list34240[] = {
-#else
-,
-#endif
-256,256,256,256,256,256,256,256,256,256,256,256,256,256,256,
-256,256,256,256,256,256,256,256,256,256,256,256,256,256,256,256,
-256,256,256,256,256,256,256,256,256,256,256,256,256,256,256,256,
-256,256,256,256,256,256,256,256,256,256,256,256,256,256,256,256,
-26
-#ifdef __GNUC__
-};
-short int int_list34304[] = {
-#else
-,
-#endif
-26,26,26,26,26,26,26,26,26,26,26,26,26,26,26,
-26,26,26,26,26,26,26,26,26,26,26,26,26,26,26,26,
-26,26,26,26,26,26,26,26,26,26,26,26,26,26,26,26,
-26,26,26,26,26,26,26,26,26,26,26,26,26,26,26,26,
-26
-#ifdef __GNUC__
-};
-short int int_list34368[] = {
-#else
-,
-#endif
-26,26,26,26,26,26,26,26,26,26,26,26,26,26,26,
-26,26,26,26,26,26,26,26,26,26,26,26,26,26,26,26,
-26,26,26,26,26,26,26,26,26,26,26,26,26,26,26,26,
-26,26,26,26,26,26,26,26,26,26,26,26,26,26,26,26,
-26
-#ifdef __GNUC__
-};
-short int int_list34432[] = {
-#else
-,
-#endif
-26,26,26,26,26,26,26,26,26,26,26,26,26,26,26,
-26,26,26,26,26,26,26,26,26,26,26,26,26,26,26,26,
-26,26,26,26,26,26,26,26,26,26,26,26,26,26,26,26,
-26,26,26,26,26,26,26,26,26,26,26,26,26,26,26,26,
-26
-#ifdef __GNUC__
-};
-short int int_list34496[] = {
-#else
-,
-#endif
-26,26,26,26,26,26,26,26,26,26,26,26,26,26,26,
-26,26,26,26,26,26,26,26,26,26,26,26,26,26,26,26,
-26,26,26,26,26,26,26,26,26,26,26,26,26,26,26,26,
-26,26,26,26,26,26,26,26,26,26,26,26,26,26,26,26,
-21
-#ifdef __GNUC__
-};
-short int int_list34560[] = {
-#else
-,
-#endif
-21,21,21,21,21,21,21,21,21,21,21,21,21,21,21,
-21,21,21,21,21,21,21,21,21,21,21,21,21,21,21,21,
-21,21,21,21,21,21,21,21,21,21,21,21,21,21,21,21,
-21,21,21,21,21,21,21,21,21,21,21,21,21,21,21,21,
-21
-#ifdef __GNUC__
-};
-short int int_list34624[] = {
-#else
-,
-#endif
-21,21,21,21,21,21,21,21,21,21,21,21,21,21,21,
-21,21,21,21,21,21,21,21,21,21,21,21,21,21,21,21,
-21,21,21,21,21,21,21,21,21,21,21,21,21,21,21,21,
-21,21,21,21,21,21,21,21,21,21,21,21,21,21,21,21,
-21
-#ifdef __GNUC__
-};
-short int int_list34688[] = {
-#else
-,
-#endif
-21,21,21,21,21,21,21,21,21,21,21,21,21,21,21,
-21,21,21,21,21,21,21,21,21,21,21,21,21,21,21,21,
-21,21,21,21,21,21,21,21,21,21,21,21,21,21,21,21,
-21,21,21,21,21,21,21,21,21,21,21,21,21,21,21,21,
-21
-#ifdef __GNUC__
-};
-short int int_list34752[] = {
-#else
-,
-#endif
-21,21,21,21,21,21,21,21,21,21,21,21,21,21,21,
-21,21,21,21,21,21,21,21,21,21,21,21,21,21,21,21,
-21,21,21,21,21,21,21,21,21,21,21,21,21,21,21,21,
-21,21,21,21,21,21,21,21,21,21,21,21,21,21,21,21,
-416
-#ifdef __GNUC__
-};
-short int int_list34816[] = {
-#else
-,
-#endif
-416,416,416,416,416,416,416,416,416,416,416,416,416,416,416,
-416,416,416,416,416,416,416,416,416,416,416,416,416,416,416,416,
-416,416,416,416,416,416,416,416,416,416,416,416,416,416,416,416,
-416,416,416,416,416,416,416,416,416,416,416,416,416,416,416,416,
-416
-#ifdef __GNUC__
-};
-short int int_list34880[] = {
-#else
-,
-#endif
-416,416,416,416,416,416,416,416,416,416,416,416,416,416,416,
-416,416,416,416,416,416,416,416,416,416,416,416,416,416,416,416,
-416,416,416,416,416,416,416,416,416,416,416,416,416,416,416,416,
-416,416,416,416,416,416,416,416,416,416,416,416,416,416,416,416,
-416
-#ifdef __GNUC__
-};
-short int int_list34944[] = {
-#else
-,
-#endif
-416,416,416,416,416,416,416,416,416,416,416,416,416,416,416,
-416,416,416,416,416,416,416,416,416,416,416,416,416,416,416,416,
-416,416,416,416,416,416,416,416,416,416,416,416,416,416,416,416,
-416,416,416,416,416,416,416,416,416,416,416,416,416,416,416,416,
-416
-#ifdef __GNUC__
-};
-short int int_list35008[] = {
-#else
-,
-#endif
-416,416,416,416,416,416,416,416,416,416,416,416,416,416,416,
-416,416,416,416,416,416,416,416,416,416,416,416,416,416,416,416,
-416,416,416,416,416,416,416,416,416,416,416,416,416,416,416,416,
-416,416,416,416,416,416,416,416,416,416,416,416,416,416,416,416,
-411
-#ifdef __GNUC__
-};
-short int int_list35072[] = {
-#else
-,
-#endif
-411,411,411,411,411,411,411,411,411,411,411,411,411,411,411,
-411,411,411,411,411,411,411,411,411,411,411,411,411,411,411,411,
-411,411,411,411,411,411,411,411,411,411,411,411,411,411,411,411,
-411,411,411,411,411,411,411,411,411,411,411,411,411,411,411,411,
-411
-#ifdef __GNUC__
-};
-short int int_list35136[] = {
-#else
-,
-#endif
-411,411,411,411,411,411,411,411,411,411,411,411,411,411,411,
-411,411,411,411,411,411,411,411,411,411,411,411,411,411,411,411,
-411,411,411,411,411,411,411,411,411,411,411,411,411,411,411,411,
-411,411,411,411,411,411,411,411,411,411,411,411,411,411,411,411,
-411
-#ifdef __GNUC__
-};
-short int int_list35200[] = {
-#else
-,
-#endif
-411,411,411,411,411,411,411,411,411,411,411,411,411,411,411,
-411,411,411,411,411,411,411,411,411,411,411,411,411,411,411,411,
-411,411,411,411,411,411,411,411,411,411,411,411,411,411,411,411,
-411,411,411,411,411,411,411,411,411,411,411,411,411,411,411,411,
-411
-#ifdef __GNUC__
-};
-short int int_list35264[] = {
-#else
-,
-#endif
-411,411,411,411,411,411,411,411,411,411,411,411,411,411,411,
-411,411,411,411,411,411,411,411,411,411,411,411,411,411,411,411,
-411,411,411,411,411,411,411,411,411,411,411,411,411,411,411,411,
-411,411,411,411,411,411,411,411,411,411,411,411,411,411,411,411,
-74
-#ifdef __GNUC__
-};
-short int int_list35328[] = {
-#else
-,
-#endif
-74,74,74,74,74,74,74,74,74,74,74,74,74,74,74,
-74,74,74,74,74,74,74,74,74,74,74,74,74,74,74,74,
-74,74,74,74,74,74,74,74,74,74,74,74,74,74,74,74,
-74,74,74,74,74,74,74,74,74,74,74,74,74,74,74,74,
-74
-#ifdef __GNUC__
-};
-short int int_list35392[] = {
-#else
-,
-#endif
-74,74,74,74,74,74,74,74,74,74,74,74,74,74,74,
-74,74,74,74,74,74,74,74,74,74,74,74,74,74,74,74,
-74,74,74,74,74,74,74,74,74,74,74,74,74,74,74,74,
-74,74,74,74,74,74,74,74,74,74,74,74,74,74,74,74,
-74
-#ifdef __GNUC__
-};
-short int int_list35456[] = {
-#else
-,
-#endif
-74,74,74,74,74,74,74,74,74,74,74,74,74,74,74,
-74,74,74,74,74,74,74,74,74,74,74,74,74,74,74,74,
-74,74,74,74,74,74,74,74,74,74,74,74,74,74,74,74,
-74,74,74,74,74,74,74,74,74,74,74,74,74,74,74,74,
-74
-#ifdef __GNUC__
-};
-short int int_list35520[] = {
-#else
-,
-#endif
-74,74,74,74,74,74,74,74,74,74,74,74,74,74,74,
-74,74,74,74,74,74,74,74,74,74,74,74,74,74,74,74,
-74,74,74,74,74,74,74,74,74,74,74,74,74,74,74,74,
-74,74,74,74,74,74,74,74,74,74,74,74,74,74,74,74,
-66
-#ifdef __GNUC__
-};
-short int int_list35584[] = {
-#else
-,
-#endif
-66,66,66,66,66,66,66,66,66,66,66,66,66,66,66,
-66,66,66,66,66,66,66,66,66,66,66,66,66,66,66,66,
-66,66,66,66,66,66,66,66,66,66,66,66,66,66,66,66,
-66,66,66,66,66,66,66,66,66,66,66,66,66,66,66,66,
-66
-#ifdef __GNUC__
-};
-short int int_list35648[] = {
-#else
-,
-#endif
-66,66,66,66,66,66,66,66,66,66,66,66,66,66,66,
-66,66,66,66,66,66,66,66,66,66,66,66,66,66,66,66,
-66,66,66,66,66,66,66,66,66,66,66,66,66,66,66,66,
-66,66,66,66,66,66,66,66,66,66,66,66,66,66,66,66,
-66
-#ifdef __GNUC__
-};
-short int int_list35712[] = {
-#else
-,
-#endif
-66,66,66,66,66,66,66,66,66,66,66,66,66,66,66,
-66,66,66,66,66,66,66,66,66,66,66,66,66,66,66,66,
-66,66,66,66,66,66,66,66,66,66,66,66,66,66,66,66,
-66,66,66,66,66,66,66,66,66,66,66,66,66,66,66,66,
-66
-#ifdef __GNUC__
-};
-short int int_list35776[] = {
-#else
-,
-#endif
-66,66,66,66,66,66,66,66,66,66,66,66,66,66,66,
-66,66,66,66,66,66,66,66,66,66,66,66,66,66,66,66,
-66,66,66,66,66,66,66,66,66,66,66,66,66,66,66,66,
-66,66,66,66,66,66,66,66,66,66,66,66,66,66,66,66,
-57
-#ifdef __GNUC__
-};
-short int int_list35840[] = {
-#else
-,
-#endif
--1,250,-1,386,-1,406,-1,49,-1,-1,-1,-1,-1,-1,-1,
-57,-1,250,-1,386,-1,406,-1,49,-1,-1,-1,-1,-1,-1,-1,
-57,-1,250,-1,386,-1,406,-1,49,-1,-1,-1,-1,-1,-1,-1,
-57,-1,250,-1,386,-1,406,-1,49,-1,-1,-1,-1,-1,-1,-1,
-57
-#ifdef __GNUC__
-};
-short int int_list35904[] = {
-#else
-,
-#endif
--1,250,-1,386,-1,406,-1,49,-1,-1,-1,-1,-1,-1,-1,
-57,-1,250,-1,386,-1,406,-1,49,-1,-1,-1,-1,-1,-1,-1,
-57,-1,250,-1,386,-1,406,-1,49,-1,-1,-1,-1,-1,-1,-1,
-57,-1,250,-1,386,-1,406,-1,49,-1,-1,-1,-1,-1,-1,-1,
-57
-#ifdef __GNUC__
-};
-short int int_list35968[] = {
-#else
-,
-#endif
--1,250,-1,386,-1,406,-1,49,-1,-1,-1,-1,-1,-1,-1,
-57,-1,250,-1,386,-1,406,-1,49,-1,-1,-1,-1,-1,-1,-1,
-57,-1,250,-1,386,-1,406,-1,49,-1,-1,-1,-1,-1,-1,-1,
-57,-1,250,-1,386,-1,406,-1,49,-1,-1,-1,-1,-1,-1,-1,
-57
-#ifdef __GNUC__
-};
-short int int_list36032[] = {
-#else
-,
-#endif
--1,250,-1,386,-1,406,-1,49,-1,-1,-1,-1,-1,-1,-1,
-57,-1,250,-1,386,-1,406,-1,49,-1,-1,-1,-1,-1,-1,-1,
-57,-1,250,-1,386,-1,406,-1,49,-1,-1,-1,-1,-1,-1,-1,
-57,-1,250,-1,386,-1,406,-1,49,-1,-1,-1,-1,-1,-1,-1,
-53
-#ifdef __GNUC__
-};
-short int int_list36096[] = {
-#else
-,
-#endif
-337,246,298,382,58,402,251,45,-1,-1,-1,-1,-1,-1,-1,
-53,337,246,298,382,58,402,-1,45,-1,-1,-1,-1,-1,-1,-1,
-53,337,246,298,382,58,402,-1,45,-1,-1,-1,-1,-1,-1,-1,
-53,337,246,298,382,58,402,-1,45,-1,-1,-1,-1,-1,-1,-1,
-53
-#ifdef __GNUC__
-};
-short int int_list36160[] = {
-#else
-,
-#endif
-337,246,298,382,58,402,-1,45,-1,-1,-1,-1,-1,-1,-1,
-53,337,246,298,382,58,402,-1,45,-1,-1,-1,-1,-1,-1,-1,
-53,337,246,298,382,58,402,-1,45,-1,-1,-1,-1,-1,-1,-1,
-53,337,246,298,382,58,402,-1,45,-1,-1,-1,-1,-1,-1,-1,
-53
-#ifdef __GNUC__
-};
-short int int_list36224[] = {
-#else
-,
-#endif
-337,246,298,382,58,402,-1,45,-1,-1,-1,-1,-1,-1,-1,
-53,337,246,298,382,58,402,-1,45,-1,-1,-1,-1,-1,-1,-1,
-53,337,246,298,382,58,402,-1,45,-1,-1,-1,-1,-1,-1,-1,
-53,337,246,298,382,58,402,-1,45,-1,-1,-1,-1,-1,-1,-1,
-53
-#ifdef __GNUC__
-};
-short int int_list36288[] = {
-#else
-,
-#endif
-337,246,298,382,58,402,-1,45,-1,-1,-1,-1,-1,-1,-1,
-53,337,246,298,382,58,402,-1,45,-1,-1,-1,-1,-1,-1,-1,
-53,337,246,298,382,58,402,-1,45,-1,-1,-1,-1,-1,-1,-1,
-53,337,246,298,382,58,402,-1,45,-1,-1,-1,-1,-1,-1,-1,
-129
-#ifdef __GNUC__
-};
-short int int_list36352[] = {
-#else
-,
-#endif
-129,129,129,129,129,129,129,129,129,129,129,129,129,129,129,
-129,129,129,129,129,129,129,129,129,129,129,129,129,129,129,129,
-129,129,129,129,129,129,129,129,129,129,129,129,129,129,129,129,
-129,129,129,129,129,129,129,129,129,129,129,129,129,129,129,129,
-129
-#ifdef __GNUC__
-};
-short int int_list36416[] = {
-#else
-,
-#endif
-129,129,129,129,129,129,129,129,129,129,129,129,129,129,129,
-129,129,129,129,129,129,129,129,129,129,129,129,129,129,129,129,
-129,129,129,129,129,129,129,129,129,129,129,129,129,129,129,129,
-129,129,129,129,129,129,129,129,129,129,129,129,129,129,129,129,
-129
-#ifdef __GNUC__
-};
-short int int_list36480[] = {
-#else
-,
-#endif
-129,129,129,129,129,129,129,129,129,129,129,129,129,129,129,
-129,129,129,129,129,129,129,129,129,129,129,129,129,129,129,129,
-129,129,129,129,129,129,129,129,129,129,129,129,129,129,129,129,
-129,129,129,129,129,129,129,129,129,129,129,129,129,129,129,129,
-129
-#ifdef __GNUC__
-};
-short int int_list36544[] = {
-#else
-,
-#endif
-129,129,129,129,129,129,129,129,129,129,129,129,129,129,129,
-129,129,129,129,129,129,129,129,129,129,129,129,129,129,129,129,
-129,129,129,129,129,129,129,129,129,129,129,129,129,129,129,129,
-129,129,129,129,129,129,129,129,129,129,129,129,129,129,129,129,
-130
-#ifdef __GNUC__
-};
-short int int_list36608[] = {
-#else
-,
-#endif
-130,130,130,130,130,130,130,130,130,130,130,130,130,130,130,
-130,130,130,130,130,130,130,130,130,130,130,130,130,130,130,130,
-130,130,130,130,130,130,130,130,130,130,130,130,130,130,130,130,
-130,130,130,130,130,130,130,130,130,130,130,130,130,130,130,130,
-130
-#ifdef __GNUC__
-};
-short int int_list36672[] = {
-#else
-,
-#endif
-130,130,130,130,130,130,130,130,130,130,130,130,130,130,130,
-130,130,130,130,130,130,130,130,130,130,130,130,130,130,130,130,
-130,130,130,130,130,130,130,130,130,130,130,130,130,130,130,130,
-130,130,130,130,130,130,130,130,130,130,130,130,130,130,130,130,
-130
-#ifdef __GNUC__
-};
-short int int_list36736[] = {
-#else
-,
-#endif
-130,130,130,130,130,130,130,130,130,130,130,130,130,130,130,
-130,130,130,130,130,130,130,130,130,130,130,130,130,130,130,130,
-130,130,130,130,130,130,130,130,130,130,130,130,130,130,130,130,
-130,130,130,130,130,130,130,130,130,130,130,130,130,130,130,130,
-130
-#ifdef __GNUC__
-};
-short int int_list36800[] = {
-#else
-,
-#endif
-130,130,130,130,130,130,130,130,130,130,130,130,130,130,130,
-130,130,130,130,130,130,130,130,130,130,130,130,130,130,130,130,
-130,130,130,130,130,130,130,130,130,130,130,130,130,130,130,130,
-130,130,130,130,130,130,130,130,130,130,130,130,130,130,130,130,
-87
-#ifdef __GNUC__
-};
-short int int_list36864[] = {
-#else
-,
-#endif
-87,87,87,87,87,87,87,87,87,87,87,87,87,87,87,
-87,87,87,87,87,87,87,87,87,87,87,87,87,87,87,87,
-87,87,87,87,87,87,87,87,87,87,87,87,87,87,87,87,
-87,87,87,87,87,87,87,87,87,87,87,87,87,87,87,87,
-87
-#ifdef __GNUC__
-};
-short int int_list36928[] = {
-#else
-,
-#endif
-87,87,87,87,87,87,87,87,87,87,87,87,87,87,87,
-87,87,87,87,87,87,87,87,87,87,87,87,87,87,87,87,
-87,87,87,87,87,87,87,87,87,87,87,87,87,87,87,87,
-87,87,87,87,87,87,87,87,87,87,87,87,87,87,87,87,
-87
-#ifdef __GNUC__
-};
-short int int_list36992[] = {
-#else
-,
-#endif
-87,87,87,87,87,87,87,87,87,87,87,87,87,87,87,
-87,87,87,87,87,87,87,87,87,87,87,87,87,87,87,87,
-87,87,87,87,87,87,87,87,87,87,87,87,87,87,87,87,
-87,87,87,87,87,87,87,87,87,87,87,87,87,87,87,87,
-87
-#ifdef __GNUC__
-};
-short int int_list37056[] = {
-#else
-,
-#endif
-87,87,87,87,87,87,87,87,87,87,87,87,87,87,87,
-87,87,87,87,87,87,87,87,87,87,87,87,87,87,87,87,
-87,87,87,87,87,87,87,87,87,87,87,87,87,87,87,87,
-87,87,87,87,87,87,87,87,87,87,87,87,87,87,87,87,
--1
-#ifdef __GNUC__
-};
-short int int_list37120[] = {
-#else
-,
-#endif
--1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
-287,287,287,287,287,287,287,287,287,287,287,287,287,287,287,287,
-287,287,287,287,287,287,287,287,287,287,287,287,287,287,287,287,
-287,287,287,287,287,287,287,287,287,287,287,287,287,287,287,287,
-287
-#ifdef __GNUC__
-};
-short int int_list37184[] = {
-#else
-,
-#endif
-287,287,287,287,287,287,287,287,287,287,287,287,287,287,287,
-287,287,287,287,287,287,287,287,287,287,287,287,287,287,287,287,
-287,287,287,287,287,287,287,287,287,287,287,287,287,287,287,287,
-287,287,287,287,287,287,287,287,287,287,287,287,287,287,287,287,
-287
-#ifdef __GNUC__
-};
-short int int_list37248[] = {
-#else
-,
-#endif
-287,287,287,287,287,287,287,287,287,287,287,287,287,287,287,
-287,287,287,287,287,287,287,287,287,287,287,287,287,287,287,287,
-287,287,287,287,287,287,287,287,287,287,287,287,287,287,287,287,
-287,287,287,287,287,287,287,287,287,287,287,287,287,287,287,287,
-287
-#ifdef __GNUC__
-};
-short int int_list37312[] = {
-#else
-,
-#endif
-287,287,287,287,287,287,287,287,287,287,287,287,287,287,287,
-287,287,287,287,287,287,287,287,287,287,287,287,287,287,287,287,
-287,287,287,287,287,287,287,287,287,287,287,287,287,287,287,287,
-287,287,287,287,287,287,287,287,287,287,287,287,287,287,287,287,
-376
-#ifdef __GNUC__
-};
-short int int_list37376[] = {
-#else
-,
-#endif
-376,376,376,376,376,376,376,376,376,376,376,376,376,376,376,
-376,376,376,376,376,376,376,376,376,376,376,376,376,376,376,376,
-376,376,376,376,376,376,376,376,376,376,376,376,376,376,376,376,
-376,376,376,376,376,376,376,376,376,376,376,376,376,376,376,376,
-376
-#ifdef __GNUC__
-};
-short int int_list37440[] = {
-#else
-,
-#endif
-376,376,376,376,376,376,376,376,376,376,376,376,376,376,376,
-376,376,376,376,376,376,376,376,376,376,376,376,376,376,376,376,
-376,376,376,376,376,376,376,376,376,376,376,376,376,376,376,376,
-376,376,376,376,376,376,376,376,376,376,376,376,376,376,376,376,
-376
-#ifdef __GNUC__
-};
-short int int_list37504[] = {
-#else
-,
-#endif
-376,376,376,376,376,376,376,376,376,376,376,376,376,376,376,
-376,376,376,376,376,376,376,376,376,376,376,376,376,376,376,376,
-376,376,376,376,376,376,376,376,376,376,376,376,376,376,376,376,
-376,376,376,376,376,376,376,376,376,376,376,376,376,376,376,376,
-376
-#ifdef __GNUC__
-};
-short int int_list37568[] = {
-#else
-,
-#endif
-376,376,376,376,376,376,376,376,376,376,376,376,376,376,376,
-376,376,376,376,376,376,376,376,376,376,376,376,376,376,376,376,
-376,376,376,376,376,376,376,376,376,376,376,376,376,376,376,376,
-376,376,376,376,376,376,376,376,376,376,376,376,376,376,376,376,
--1
-#ifdef __GNUC__
-};
-short int int_list37632[] = {
-#else
-,
-#endif
--1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
-283,283,283,283,283,283,283,283,283,283,283,283,283,283,283,283,
-283,283,283,283,283,283,283,283,283,283,283,283,283,283,283,283,
-283,283,283,283,283,283,283,283,283,283,283,283,283,283,283,283,
-283
-#ifdef __GNUC__
-};
-short int int_list37696[] = {
-#else
-,
-#endif
-283,283,283,283,283,283,283,283,283,283,283,283,283,283,283,
-283,283,283,283,283,283,283,283,283,283,283,283,283,283,283,283,
-283,283,283,283,283,283,283,283,283,283,283,283,283,283,283,283,
-283,283,283,283,283,283,283,283,283,283,283,283,283,283,283,283,
-283
-#ifdef __GNUC__
-};
-short int int_list37760[] = {
-#else
-,
-#endif
-283,283,283,283,283,283,283,283,283,283,283,283,283,283,283,
-283,283,283,283,283,283,283,283,283,283,283,283,283,283,283,283,
-283,283,283,283,283,283,283,283,283,283,283,283,283,283,283,283,
-283,283,283,283,283,283,283,283,283,283,283,283,283,283,283,283,
-283
-#ifdef __GNUC__
-};
-short int int_list37824[] = {
-#else
-,
-#endif
-283,283,283,283,283,283,283,283,283,283,283,283,283,283,283,
-283,283,283,283,283,283,283,283,283,283,283,283,283,283,283,283,
-283,283,283,283,283,283,283,283,283,283,283,283,283,283,283,283,
-283,283,283,283,283,283,283,283,283,283,283,283,283,283,283,283,
-211
-#ifdef __GNUC__
-};
-short int int_list37888[] = {
-#else
-,
-#endif
-211,211,211,211,211,211,211,211,211,211,211,211,211,211,211,
-211,211,211,211,211,211,211,211,211,211,211,211,211,211,211,211,
-211,211,211,211,211,211,211,211,211,211,211,211,211,211,211,211,
-211,211,211,211,211,211,211,211,211,211,211,211,211,211,211,211,
-211
-#ifdef __GNUC__
-};
-short int int_list37952[] = {
-#else
-,
-#endif
-211,211,211,211,211,211,211,211,211,211,211,211,211,211,211,
-211,211,211,211,211,211,211,211,211,211,211,211,211,211,211,211,
-211,211,211,211,211,211,211,211,211,211,211,211,211,211,211,211,
-211,211,211,211,211,211,211,211,211,211,211,211,211,211,211,211,
-211
-#ifdef __GNUC__
-};
-short int int_list38016[] = {
-#else
-,
-#endif
-211,211,211,211,211,211,211,211,211,211,211,211,211,211,211,
-211,211,211,211,211,211,211,211,211,211,211,211,211,211,211,211,
-211,211,211,211,211,211,211,211,211,211,211,211,211,211,211,211,
-211,211,211,211,211,211,211,211,211,211,211,211,211,211,211,211,
-211
-#ifdef __GNUC__
-};
-short int int_list38080[] = {
-#else
-,
-#endif
-211,211,211,211,211,211,211,211,211,211,211,211,211,211,211,
-211,211,211,211,211,211,211,211,211,211,211,211,211,211,211,211,
-211,211,211,211,211,211,211,211,211,211,211,211,211,211,211,211,
-211,211,211,211,211,211,211,211,211,211,211,211,211,211,211,211,
--1
-#ifdef __GNUC__
-};
-short int int_list38144[] = {
-#else
-,
-#endif
--1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
-278,278,278,278,278,278,278,278,278,278,278,278,278,278,278,278,
-278,278,278,278,278,278,278,278,278,278,278,278,278,278,278,278,
-278,278,278,278,278,278,278,278,278,278,278,278,278,278,278,278,
-278
-#ifdef __GNUC__
-};
-short int int_list38208[] = {
-#else
-,
-#endif
-278,278,278,278,278,278,278,278,278,278,278,278,278,278,278,
-278,278,278,278,278,278,278,278,278,278,278,278,278,278,278,278,
-278,278,278,278,278,278,278,278,278,278,278,278,278,278,278,278,
-278,278,278,278,278,278,278,278,278,278,278,278,278,278,278,278,
-278
-#ifdef __GNUC__
-};
-short int int_list38272[] = {
-#else
-,
-#endif
-278,278,278,278,278,278,278,278,278,278,278,278,278,278,278,
-278,278,278,278,278,278,278,278,278,278,278,278,278,278,278,278,
-278,278,278,278,278,278,278,278,278,278,278,278,278,278,278,278,
-278,278,278,278,278,278,278,278,278,278,278,278,278,278,278,278,
-278
-#ifdef __GNUC__
-};
-short int int_list38336[] = {
-#else
-,
-#endif
-278,278,278,278,278,278,278,278,278,278,278,278,278,278,278,
-278,278,278,278,278,278,278,278,278,278,278,278,278,278,278,278,
-278,278,278,278,278,278,278,278,278,278,278,278,278,278,278,278,
-278,278,278,278,278,278,278,278,278,278,278,278,278,278,278,278,
-16
-#ifdef __GNUC__
-};
-short int int_list38400[] = {
-#else
-,
-#endif
-16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,
-16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,
-16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,
-16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,
-16
-#ifdef __GNUC__
-};
-short int int_list38464[] = {
-#else
-,
-#endif
-16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,
-16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,
-16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,
-16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,
-16
-#ifdef __GNUC__
-};
-short int int_list38528[] = {
-#else
-,
-#endif
-16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,
-16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,
-16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,
-16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,
-16
-#ifdef __GNUC__
-};
-short int int_list38592[] = {
-#else
-,
-#endif
-16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,
-16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,
-16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,
-16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,
--1
-#ifdef __GNUC__
-};
-short int int_list38656[] = {
-#else
-,
-#endif
--1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
-274,274,274,274,274,274,274,274,274,274,274,274,274,274,274,274,
-274,274,274,274,274,274,274,274,274,274,274,274,274,274,274,274,
-274,274,274,274,274,274,274,274,274,274,274,274,274,274,274,274,
-274
-#ifdef __GNUC__
-};
-short int int_list38720[] = {
-#else
-,
-#endif
-274,274,274,274,274,274,274,274,274,274,274,274,274,274,274,
-274,274,274,274,274,274,274,274,274,274,274,274,274,274,274,274,
-274,274,274,274,274,274,274,274,274,274,274,274,274,274,274,274,
-274,274,274,274,274,274,274,274,274,274,274,274,274,274,274,274,
-274
-#ifdef __GNUC__
-};
-short int int_list38784[] = {
-#else
-,
-#endif
-274,274,274,274,274,274,274,274,274,274,274,274,274,274,274,
-274,274,274,274,274,274,274,274,274,274,274,274,274,274,274,274,
-274,274,274,274,274,274,274,274,274,274,274,274,274,274,274,274,
-274,274,274,274,274,274,274,274,274,274,274,274,274,274,274,274,
-274
-#ifdef __GNUC__
-};
-short int int_list38848[] = {
-#else
-,
-#endif
-274,274,274,274,274,274,274,274,274,274,274,274,274,274,274,
-274,274,274,274,274,274,274,274,274,274,274,274,274,274,274,274,
-274,274,274,274,274,274,274,274,274,274,274,274,274,274,274,274,
-274,274,274,274,274,274,274,274,274,274,274,274,274,274,274,274,
-242
-#ifdef __GNUC__
-};
-short int int_list38912[] = {
-#else
-,
-#endif
-242,242,242,242,242,242,242,242,242,242,242,242,242,242,242,
-242,242,242,242,242,242,242,242,242,242,242,242,242,242,242,242,
-242,242,242,242,242,242,242,242,242,242,242,242,242,242,242,242,
-242,242,242,242,242,242,242,242,242,242,242,242,242,242,242,242,
-242
-#ifdef __GNUC__
-};
-short int int_list38976[] = {
-#else
-,
-#endif
-242,242,242,242,242,242,242,242,242,242,242,242,242,242,242,
-242,242,242,242,242,242,242,242,242,242,242,242,242,242,242,242,
-242,242,242,242,242,242,242,242,242,242,242,242,242,242,242,242,
-242,242,242,242,242,242,242,242,242,242,242,242,242,242,242,242,
-242
-#ifdef __GNUC__
-};
-short int int_list39040[] = {
-#else
-,
-#endif
-242,242,242,242,242,242,242,242,242,242,242,242,242,242,242,
-242,242,242,242,242,242,242,242,242,242,242,242,242,242,242,242,
-242,242,242,242,242,242,242,242,242,242,242,242,242,242,242,242,
-242,242,242,242,242,242,242,242,242,242,242,242,242,242,242,242,
-242
-#ifdef __GNUC__
-};
-short int int_list39104[] = {
-#else
-,
-#endif
-242,242,242,242,242,242,242,242,242,242,242,242,242,242,242,
-242,242,242,242,242,242,242,242,242,242,242,242,242,242,242,242,
-242,242,242,242,242,242,242,242,242,242,242,242,242,242,242,242,
-242,242,242,242,242,242,242,242,242,242,242,242,242,242,242,242,
-237
-#ifdef __GNUC__
-};
-short int int_list39168[] = {
-#else
-,
-#endif
-237,237,237,237,237,237,237,237,237,237,237,237,237,237,237,
-237,237,237,237,237,237,237,237,237,237,237,237,237,237,237,237,
-237,237,237,237,237,237,237,237,237,237,237,237,237,237,237,237,
-237,237,237,237,237,237,237,237,237,237,237,237,237,237,237,237,
-237
-#ifdef __GNUC__
-};
-short int int_list39232[] = {
-#else
-,
-#endif
-237,237,237,237,237,237,237,237,237,237,237,237,237,237,237,
-237,237,237,237,237,237,237,237,237,237,237,237,237,237,237,237,
-237,237,237,237,237,237,237,237,237,237,237,237,237,237,237,237,
-237,237,237,237,237,237,237,237,237,237,237,237,237,237,237,237,
-237
-#ifdef __GNUC__
-};
-short int int_list39296[] = {
-#else
-,
-#endif
-237,237,237,237,237,237,237,237,237,237,237,237,237,237,237,
-237,237,237,237,237,237,237,237,237,237,237,237,237,237,237,237,
-237,237,237,237,237,237,237,237,237,237,237,237,237,237,237,237,
-237,237,237,237,237,237,237,237,237,237,237,237,237,237,237,237,
-237
-#ifdef __GNUC__
-};
-short int int_list39360[] = {
-#else
-,
-#endif
-237,237,237,237,237,237,237,237,237,237,237,237,237,237,237,
-237,237,237,237,237,237,237,237,237,237,237,237,237,237,237,237,
-237,237,237,237,237,237,237,237,237,237,237,237,237,237,237,237,
-237,237,237,237,237,237,237,237,237,237,237,237,237,237,237,237,
-116
-#ifdef __GNUC__
-};
-short int int_list39424[] = {
-#else
-,
-#endif
-116,116,116,116,116,116,116,116,116,116,116,116,116,116,116,
-116,116,116,116,116,116,116,116,116,116,116,116,116,116,116,116,
-116,116,116,116,116,116,116,116,116,116,116,116,116,116,116,116,
-116,116,116,116,116,116,116,116,116,116,116,116,116,116,116,116,
-116
-#ifdef __GNUC__
-};
-short int int_list39488[] = {
-#else
-,
-#endif
-116,116,116,116,116,116,116,116,116,116,116,116,116,116,116,
-116,116,116,116,116,116,116,116,116,116,116,116,116,116,116,116,
-116,116,116,116,116,116,116,116,116,116,116,116,116,116,116,116,
-116,116,116,116,116,116,116,116,116,116,116,116,116,116,116,116,
-116
-#ifdef __GNUC__
-};
-short int int_list39552[] = {
-#else
-,
-#endif
-116,116,116,116,116,116,116,116,116,116,116,116,116,116,116,
-116,116,116,116,116,116,116,116,116,116,116,116,116,116,116,116,
-116,116,116,116,116,116,116,116,116,116,116,116,116,116,116,116,
-116,116,116,116,116,116,116,116,116,116,116,116,116,116,116,116,
-116
-#ifdef __GNUC__
-};
-short int int_list39616[] = {
-#else
-,
-#endif
-116,116,116,116,116,116,116,116,116,116,116,116,116,116,116,
-116,116,116,116,116,116,116,116,116,116,116,116,116,116,116,116,
-116,116,116,116,116,116,116,116,116,116,116,116,116,116,116,116,
-116,116,116,116,116,116,116,116,116,116,116,116,116,116,116,116,
-111
-#ifdef __GNUC__
-};
-short int int_list39680[] = {
-#else
-,
-#endif
-111,111,111,111,111,111,111,111,111,111,111,111,111,111,111,
-111,111,111,111,111,111,111,111,111,111,111,111,111,111,111,111,
-111,111,111,111,111,111,111,111,111,111,111,111,111,111,111,111,
-111,111,111,111,111,111,111,111,111,111,111,111,111,111,111,111,
-111
-#ifdef __GNUC__
-};
-short int int_list39744[] = {
-#else
-,
-#endif
-111,111,111,111,111,111,111,111,111,111,111,111,111,111,111,
-111,111,111,111,111,111,111,111,111,111,111,111,111,111,111,111,
-111,111,111,111,111,111,111,111,111,111,111,111,111,111,111,111,
-111,111,111,111,111,111,111,111,111,111,111,111,111,111,111,111,
-111
-#ifdef __GNUC__
-};
-short int int_list39808[] = {
-#else
-,
-#endif
-111,111,111,111,111,111,111,111,111,111,111,111,111,111,111,
-111,111,111,111,111,111,111,111,111,111,111,111,111,111,111,111,
-111,111,111,111,111,111,111,111,111,111,111,111,111,111,111,111,
-111,111,111,111,111,111,111,111,111,111,111,111,111,111,111,111,
-111
-#ifdef __GNUC__
-};
-short int int_list39872[] = {
-#else
-,
-#endif
-111,111,111,111,111,111,111,111,111,111,111,111,111,111,111,
-111,111,111,111,111,111,111,111,111,111,111,111,111,111,111,111,
-111,111,111,111,111,111,111,111,111,111,111,111,111,111,111,111,
-111,111,111,111,111,111,111,111,111,111,111,111,111,111,111,111,
--1
-#ifdef __GNUC__
-};
-short int int_list39936[] = {
-#else
-,
-#endif
--1,-1,-1,-1,-1,-1,-1,390,-1,-1,-1,-1,-1,-1,-1,
--1,-1,-1,-1,-1,-1,-1,-1,390,-1,-1,-1,-1,-1,-1,-1,
--1,-1,-1,-1,-1,-1,-1,-1,390,-1,-1,-1,-1,-1,-1,-1,
--1,-1,-1,-1,-1,-1,-1,-1,390,-1,-1,-1,-1,-1,-1,-1,
--1
-#ifdef __GNUC__
-};
-short int int_list40000[] = {
-#else
-,
-#endif
--1,-1,-1,-1,-1,-1,-1,390,-1,-1,-1,-1,-1,-1,-1,
--1,-1,-1,-1,-1,-1,-1,-1,390,-1,-1,-1,-1,-1,-1,-1,
--1,-1,-1,-1,-1,-1,-1,-1,390,-1,-1,-1,-1,-1,-1,-1,
--1,-1,-1,-1,-1,-1,-1,-1,390,-1,-1,-1,-1,-1,-1,-1,
--1
-#ifdef __GNUC__
-};
-short int int_list40064[] = {
-#else
-,
-#endif
--1,-1,-1,-1,-1,-1,-1,390,-1,-1,-1,-1,-1,-1,-1,
--1,-1,-1,-1,-1,-1,-1,-1,390,-1,-1,-1,-1,-1,-1,-1,
--1,-1,-1,-1,-1,-1,-1,-1,390,-1,-1,-1,-1,-1,-1,-1,
--1,-1,-1,-1,-1,-1,-1,-1,390,-1,-1,-1,-1,-1,-1,-1,
--1
-#ifdef __GNUC__
-};
-short int int_list40128[] = {
-#else
-,
-#endif
--1,-1,-1,-1,-1,-1,-1,390,-1,-1,-1,-1,-1,-1,-1,
--1,-1,-1,-1,-1,-1,-1,-1,390,-1,-1,-1,-1,-1,-1,-1,
--1,-1,-1,-1,-1,-1,-1,-1,390,-1,-1,-1,-1,-1,-1,-1,
--1,-1,-1,-1,-1,-1,-1,-1,390,-1,-1,-1,-1,-1,-1,-1,
-314
-#ifdef __GNUC__
-};
-short int int_list40192[] = {
-#else
-,
-#endif
-314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,
-314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,
-314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,
-314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,
-314
-#ifdef __GNUC__
-};
-short int int_list40256[] = {
-#else
-,
-#endif
-314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,
-314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,
-314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,
-314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,
-314
-#ifdef __GNUC__
-};
-short int int_list40320[] = {
-#else
-,
-#endif
-314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,
-314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,
-314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,
-314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,
-314
-#ifdef __GNUC__
-};
-short int int_list40384[] = {
-#else
-,
-#endif
-314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,
-314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,
-314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,
-314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,
-299
-#ifdef __GNUC__
-};
-short int int_list40448[] = {
-#else
-,
-#endif
-299,299,299,299,299,299,299,299,299,299,299,299,299,299,299,
--1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
--1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
--1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
--1
-#ifdef __GNUC__
-};
-short int int_list40512[] = {
-#else
-,
-#endif
--1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
--1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
--1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
--1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
--1
-#ifdef __GNUC__
-};
-short int int_list40576[] = {
-#else
-,
-#endif
--1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
--1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
--1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
--1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
--1
-#ifdef __GNUC__
-};
-short int int_list40640[] = {
-#else
-,
-#endif
--1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
--1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
--1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
--1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
-315
-#ifdef __GNUC__
-};
-short int int_list40704[] = {
-#else
-,
-#endif
-315,315,315,315,315,315,315,315,315,315,315,315,315,315,315,
-315,315,315,315,315,315,315,315,315,315,315,315,315,315,315,315,
-315,315,315,315,315,315,315,315,315,315,315,315,315,315,315,315,
-315,315,315,315,315,315,315,315,315,315,315,315,315,315,315,315,
-315
-#ifdef __GNUC__
-};
-short int int_list40768[] = {
-#else
-,
-#endif
-315,315,315,315,315,315,315,315,315,315,315,315,315,315,315,
-315,315,315,315,315,315,315,315,315,315,315,315,315,315,315,315,
-315,315,315,315,315,315,315,315,315,315,315,315,315,315,315,315,
-315,315,315,315,315,315,315,315,315,315,315,315,315,315,315,315,
-315
-#ifdef __GNUC__
-};
-short int int_list40832[] = {
-#else
-,
-#endif
-315,315,315,315,315,315,315,315,315,315,315,315,315,315,315,
-315,315,315,315,315,315,315,315,315,315,315,315,315,315,315,315,
-315,315,315,315,315,315,315,315,315,315,315,315,315,315,315,315,
-315,315,315,315,315,315,315,315,315,315,315,315,315,315,315,315,
-315
-#ifdef __GNUC__
-};
-short int int_list40896[] = {
-#else
-,
-#endif
-315,315,315,315,315,315,315,315,315,315,315,315,315,315,315,
-315,315,315,315,315,315,315,315,315,315,315,315,315,315,315,315,
-315,315,315,315,315,315,315,315,315,315,315,315,315,315,315,315,
-315,315,315,315,315,315,315,315,315,315,315,315,315,315,315,315,
-186
-#ifdef __GNUC__
-};
-short int int_list40960[] = {
-#else
-,
-#endif
-186,186,186,186,186,186,186,186,186,186,186,186,186,186,186,
-186,186,186,186,186,186,186,186,186,186,186,186,186,186,186,186,
-186,186,186,186,186,186,186,186,186,186,186,186,186,186,186,186,
-186,186,186,186,186,186,186,186,186,186,186,186,186,186,186,186,
-186
-#ifdef __GNUC__
-};
-short int int_list41024[] = {
-#else
-,
-#endif
-186,186,186,186,186,186,186,186,186,186,186,186,186,186,186,
-186,186,186,186,186,186,186,186,186,186,186,186,186,186,186,186,
-186,186,186,186,186,186,186,186,186,186,186,186,186,186,186,186,
-186,186,186,186,186,186,186,186,186,186,186,186,186,186,186,186,
-186
-#ifdef __GNUC__
-};
-short int int_list41088[] = {
-#else
-,
-#endif
-186,186,186,186,186,186,186,186,186,186,186,186,186,186,186,
-186,186,186,186,186,186,186,186,186,186,186,186,186,186,186,186,
-186,186,186,186,186,186,186,186,186,186,186,186,186,186,186,186,
-186,186,186,186,186,186,186,186,186,186,186,186,186,186,186,186,
-186
-#ifdef __GNUC__
-};
-short int int_list41152[] = {
-#else
-,
-#endif
-186,186,186,186,186,186,186,186,186,186,186,186,186,186,186,
-186,186,186,186,186,186,186,186,186,186,186,186,186,186,186,186,
-186,186,186,186,186,186,186,186,186,186,186,186,186,186,186,186,
-186,186,186,186,186,186,186,186,186,186,186,186,186,186,186,186,
-168
-#ifdef __GNUC__
-};
-short int int_list41216[] = {
-#else
-,
-#endif
-168,168,168,168,168,168,168,168,168,168,168,168,168,168,168,
-168,168,168,168,168,168,168,168,168,168,168,168,168,168,168,168,
-168,168,168,168,168,168,168,168,168,168,168,168,168,168,168,168,
-168,168,168,168,168,168,168,168,168,168,168,168,168,168,168,168,
-168
-#ifdef __GNUC__
-};
-short int int_list41280[] = {
-#else
-,
-#endif
-168,168,168,168,168,168,168,168,168,168,168,168,168,168,168,
-168,168,168,168,168,168,168,168,168,168,168,168,168,168,168,168,
-168,168,168,168,168,168,168,168,168,168,168,168,168,168,168,168,
-168,168,168,168,168,168,168,168,168,168,168,168,168,168,168,168,
-168
-#ifdef __GNUC__
-};
-short int int_list41344[] = {
-#else
-,
-#endif
-168,168,168,168,168,168,168,168,168,168,168,168,168,168,168,
-168,168,168,168,168,168,168,168,168,168,168,168,168,168,168,168,
-168,168,168,168,168,168,168,168,168,168,168,168,168,168,168,168,
-168,168,168,168,168,168,168,168,168,168,168,168,168,168,168,168,
-168
-#ifdef __GNUC__
-};
-short int int_list41408[] = {
-#else
-,
-#endif
-168,168,168,168,168,168,168,168,168,168,168,168,168,168,168,
-168,168,168,168,168,168,168,168,168,168,168,168,168,168,168,168,
-168,168,168,168,168,168,168,168,168,168,168,168,168,168,168,168,
-168,168,168,168,168,168,168,168,168,168,168,168,168,168,168,168,
-296
-#ifdef __GNUC__
-};
-short int int_list41472[] = {
-#else
-,
-#endif
-296,296,296,296,296,296,296,296,296,296,296,296,296,296,296,
-296,296,296,296,296,296,296,296,296,296,296,296,296,296,296,296,
-296,296,296,296,296,296,296,296,296,296,296,296,296,296,296,296,
-296,296,296,296,296,296,296,296,296,296,296,296,296,296,296,296,
-296
-#ifdef __GNUC__
-};
-short int int_list41536[] = {
-#else
-,
-#endif
-296,296,296,296,296,296,296,296,296,296,296,296,296,296,296,
-296,296,296,296,296,296,296,296,296,296,296,296,296,296,296,296,
-296,296,296,296,296,296,296,296,296,296,296,296,296,296,296,296,
-296,296,296,296,296,296,296,296,296,296,296,296,296,296,296,296,
-296
-#ifdef __GNUC__
-};
-short int int_list41600[] = {
-#else
-,
-#endif
-296,296,296,296,296,296,296,296,296,296,296,296,296,296,296,
-296,296,296,296,296,296,296,296,296,296,296,296,296,296,296,296,
-296,296,296,296,296,296,296,296,296,296,296,296,296,296,296,296,
-296,296,296,296,296,296,296,296,296,296,296,296,296,296,296,296,
-296
-#ifdef __GNUC__
-};
-short int int_list41664[] = {
-#else
-,
-#endif
-296,296,296,296,296,296,296,296,296,296,296,296,296,296,296,
-296,296,296,296,296,296,296,296,296,296,296,296,296,296,296,296,
-296,296,296,296,296,296,296,296,296,296,296,296,296,296,296,296,
-296,296,296,296,296,296,296,296,296,296,296,296,296,296,296,296,
-291
-#ifdef __GNUC__
-};
-short int int_list41728[] = {
-#else
-,
-#endif
-291,291,291,291,291,291,291,291,291,291,291,291,291,291,291,
-291,291,291,291,291,291,291,291,291,291,291,291,291,291,291,291,
-291,291,291,291,291,291,291,291,291,291,291,291,291,291,291,291,
-291,291,291,291,291,291,291,291,291,291,291,291,291,291,291,291,
-291
-#ifdef __GNUC__
-};
-short int int_list41792[] = {
-#else
-,
-#endif
-291,291,291,291,291,291,291,291,291,291,291,291,291,291,291,
-291,291,291,291,291,291,291,291,291,291,291,291,291,291,291,291,
-291,291,291,291,291,291,291,291,291,291,291,291,291,291,291,291,
-291,291,291,291,291,291,291,291,291,291,291,291,291,291,291,291,
-291
-#ifdef __GNUC__
-};
-short int int_list41856[] = {
-#else
-,
-#endif
-291,291,291,291,291,291,291,291,291,291,291,291,291,291,291,
-291,291,291,291,291,291,291,291,291,291,291,291,291,291,291,291,
-291,291,291,291,291,291,291,291,291,291,291,291,291,291,291,291,
-291,291,291,291,291,291,291,291,291,291,291,291,291,291,291,291,
-291
-#ifdef __GNUC__
-};
-short int int_list41920[] = {
-#else
-,
-#endif
-291,291,291,291,291,291,291,291,291,291,291,291,291,291,291,
-291,291,291,291,291,291,291,291,291,291,291,291,291,291,291,291,
-291,291,291,291,291,291,291,291,291,291,291,291,291,291,291,291,
-291,291,291,291,291,291,291,291,291,291,291,291,291,291,291,291,
-335
-#ifdef __GNUC__
-};
-short int int_list41984[] = {
-#else
-,
-#endif
-335,335,335,335,335,335,335,335,335,335,335,335,335,335,335,
-335,335,335,335,335,335,335,335,335,335,335,335,335,335,335,335,
-335,335,335,335,335,335,335,335,335,335,335,335,335,335,335,335,
-335,335,335,335,335,335,335,335,335,335,335,335,335,335,335,335,
-335
-#ifdef __GNUC__
-};
-short int int_list42048[] = {
-#else
-,
-#endif
-335,335,335,335,335,335,335,335,335,335,335,335,335,335,335,
-335,335,335,335,335,335,335,335,335,335,335,335,335,335,335,335,
-335,335,335,335,335,335,335,335,335,335,335,335,335,335,335,335,
-335,335,335,335,335,335,335,335,335,335,335,335,335,335,335,335,
-335
-#ifdef __GNUC__
-};
-short int int_list42112[] = {
-#else
-,
-#endif
-335,335,335,335,335,335,335,335,335,335,335,335,335,335,335,
-335,335,335,335,335,335,335,335,335,335,335,335,335,335,335,335,
-335,335,335,335,335,335,335,335,335,335,335,335,335,335,335,335,
-335,335,335,335,335,335,335,335,335,335,335,335,335,335,335,335,
-335
-#ifdef __GNUC__
-};
-short int int_list42176[] = {
-#else
-,
-#endif
-335,335,335,335,335,335,335,335,335,335,335,335,335,335,335,
-335,335,335,335,335,335,335,335,335,335,335,335,335,335,335,335,
-335,335,335,335,335,335,335,335,335,335,335,335,335,335,335,335,
-335,335,335,335,335,335,335,335,335,335,335,335,335,335,335,335,
-330
-#ifdef __GNUC__
-};
-short int int_list42240[] = {
-#else
-,
-#endif
-330,330,330,330,330,330,330,330,330,330,330,330,330,330,330,
-330,330,330,330,330,330,330,330,330,330,330,330,330,330,330,330,
-330,330,330,330,330,330,330,330,330,330,330,330,330,330,330,330,
-330,330,330,330,330,330,330,330,330,330,330,330,330,330,330,330,
-330
-#ifdef __GNUC__
-};
-short int int_list42304[] = {
-#else
-,
-#endif
-330,330,330,330,330,330,330,330,330,330,330,330,330,330,330,
-330,330,330,330,330,330,330,330,330,330,330,330,330,330,330,330,
-330,330,330,330,330,330,330,330,330,330,330,330,330,330,330,330,
-330,330,330,330,330,330,330,330,330,330,330,330,330,330,330,330,
-330
-#ifdef __GNUC__
-};
-short int int_list42368[] = {
-#else
-,
-#endif
-330,330,330,330,330,330,330,330,330,330,330,330,330,330,330,
-330,330,330,330,330,330,330,330,330,330,330,330,330,330,330,330,
-330,330,330,330,330,330,330,330,330,330,330,330,330,330,330,330,
-330,330,330,330,330,330,330,330,330,330,330,330,330,330,330,330,
-330
-#ifdef __GNUC__
-};
-short int int_list42432[] = {
-#else
-,
-#endif
-330,330,330,330,330,330,330,330,330,330,330,330,330,330,330,
-330,330,330,330,330,330,330,330,330,330,330,330,330,330,330,330,
-330,330,330,330,330,330,330,330,330,330,330,330,330,330,330,330,
-330,330,330,330,330,330,330,330,330,330,330,330,330,330,330,330,
-35
-#ifdef __GNUC__
-};
-short int int_list42496[] = {
-#else
-,
-#endif
-35,35,35,35,35,35,35,35,35,35,35,35,35,35,35,
-35,35,35,35,35,35,35,35,35,35,35,35,35,35,35,35,
-35,35,35,35,35,35,35,35,35,35,35,35,35,35,35,35,
-35,35,35,35,35,35,35,35,35,35,35,35,35,35,35,35,
-35
-#ifdef __GNUC__
-};
-short int int_list42560[] = {
-#else
-,
-#endif
-35,35,35,35,35,35,35,35,35,35,35,35,35,35,35,
-35,35,35,35,35,35,35,35,35,35,35,35,35,35,35,35,
-35,35,35,35,35,35,35,35,35,35,35,35,35,35,35,35,
-35,35,35,35,35,35,35,35,35,35,35,35,35,35,35,35,
-35
-#ifdef __GNUC__
-};
-short int int_list42624[] = {
-#else
-,
-#endif
-35,35,35,35,35,35,35,35,35,35,35,35,35,35,35,
-35,35,35,35,35,35,35,35,35,35,35,35,35,35,35,35,
-35,35,35,35,35,35,35,35,35,35,35,35,35,35,35,35,
-35,35,35,35,35,35,35,35,35,35,35,35,35,35,35,35,
-35
-#ifdef __GNUC__
-};
-short int int_list42688[] = {
-#else
-,
-#endif
-35,35,35,35,35,35,35,35,35,35,35,35,35,35,35,
-35,35,35,35,35,35,35,35,35,35,35,35,35,35,35,35,
-35,35,35,35,35,35,35,35,35,35,35,35,35,35,35,35,
-35,35,35,35,35,35,35,35,35,35,35,35,35,35,35,35,
-30
-#ifdef __GNUC__
-};
-short int int_list42752[] = {
-#else
-,
-#endif
-30,30,30,30,30,30,30,30,30,30,30,30,30,30,30,
-30,30,30,30,30,30,30,30,30,30,30,30,30,30,30,30,
-30,30,30,30,30,30,30,30,30,30,30,30,30,30,30,30,
-30,30,30,30,30,30,30,30,30,30,30,30,30,30,30,30,
-30
-#ifdef __GNUC__
-};
-short int int_list42816[] = {
-#else
-,
-#endif
-30,30,30,30,30,30,30,30,30,30,30,30,30,30,30,
-30,30,30,30,30,30,30,30,30,30,30,30,30,30,30,30,
-30,30,30,30,30,30,30,30,30,30,30,30,30,30,30,30,
-30,30,30,30,30,30,30,30,30,30,30,30,30,30,30,30,
-30
-#ifdef __GNUC__
-};
-short int int_list42880[] = {
-#else
-,
-#endif
-30,30,30,30,30,30,30,30,30,30,30,30,30,30,30,
-30,30,30,30,30,30,30,30,30,30,30,30,30,30,30,30,
-30,30,30,30,30,30,30,30,30,30,30,30,30,30,30,30,
-30,30,30,30,30,30,30,30,30,30,30,30,30,30,30,30,
-30
-#ifdef __GNUC__
-};
-short int int_list42944[] = {
-#else
-,
-#endif
-30,30,30,30,30,30,30,30,30,30,30,30,30,30,30,
-30,30,30,30,30,30,30,30,30,30,30,30,30,30,30,30,
-30,30,30,30,30,30,30,30,30,30,30,30,30,30,30,30,
-30,30,30,30,30,30,30,30,30,30,30,30,30,30,30,30,
-146
-#ifdef __GNUC__
-};
-short int int_list43008[] = {
-#else
-,
-#endif
-146,146,146,146,146,146,146,146,146,146,146,146,146,146,146,
-146,146,146,146,146,146,146,146,146,146,146,146,146,146,146,146,
-146,146,146,146,146,146,146,146,146,146,146,146,146,146,146,146,
-146,146,146,146,146,146,146,146,146,146,146,146,146,146,146,146,
-146
-#ifdef __GNUC__
-};
-short int int_list43072[] = {
-#else
-,
-#endif
-146,146,146,146,146,146,146,146,146,146,146,146,146,146,146,
-146,146,146,146,146,146,146,146,146,146,146,146,146,146,146,146,
-146,146,146,146,146,146,146,146,146,146,146,146,146,146,146,146,
-146,146,146,146,146,146,146,146,146,146,146,146,146,146,146,146,
-146
-#ifdef __GNUC__
-};
-short int int_list43136[] = {
-#else
-,
-#endif
-146,146,146,146,146,146,146,146,146,146,146,146,146,146,146,
-146,146,146,146,146,146,146,146,146,146,146,146,146,146,146,146,
-146,146,146,146,146,146,146,146,146,146,146,146,146,146,146,146,
-146,146,146,146,146,146,146,146,146,146,146,146,146,146,146,146,
-146
-#ifdef __GNUC__
-};
-short int int_list43200[] = {
-#else
-,
-#endif
-146,146,146,146,146,146,146,146,146,146,146,146,146,146,146,
-146,146,146,146,146,146,146,146,146,146,146,146,146,146,146,146,
-146,146,146,146,146,146,146,146,146,146,146,146,146,146,146,146,
-146,146,146,146,146,146,146,146,146,146,146,146,146,146,146,146,
-142
-#ifdef __GNUC__
-};
-short int int_list43264[] = {
-#else
-,
-#endif
-142,142,142,142,142,142,142,142,142,142,142,142,142,142,142,
-142,142,142,142,142,142,142,142,142,142,142,142,142,142,142,142,
-142,142,142,142,142,142,142,142,142,142,142,142,142,142,142,142,
-142,142,142,142,142,142,142,142,142,142,142,142,142,142,142,142,
-142
-#ifdef __GNUC__
-};
-short int int_list43328[] = {
-#else
-,
-#endif
-142,142,142,142,142,142,142,142,142,142,142,142,142,142,142,
-142,142,142,142,142,142,142,142,142,142,142,142,142,142,142,142,
-142,142,142,142,142,142,142,142,142,142,142,142,142,142,142,142,
-142,142,142,142,142,142,142,142,142,142,142,142,142,142,142,142,
-142
-#ifdef __GNUC__
-};
-short int int_list43392[] = {
-#else
-,
-#endif
-142,142,142,142,142,142,142,142,142,142,142,142,142,142,142,
-142,142,142,142,142,142,142,142,142,142,142,142,142,142,142,142,
-142,142,142,142,142,142,142,142,142,142,142,142,142,142,142,142,
-142,142,142,142,142,142,142,142,142,142,142,142,142,142,142,142,
-142
-#ifdef __GNUC__
-};
-short int int_list43456[] = {
-#else
-,
-#endif
-142,142,142,142,142,142,142,142,142,142,142,142,142,142,142,
-142,142,142,142,142,142,142,142,142,142,142,142,142,142,142,142,
-142,142,142,142,142,142,142,142,142,142,142,142,142,142,142,142,
-142,142,142,142,142,142,142,142,142,142,142,142,142,142,142,142,
-105
-#ifdef __GNUC__
-};
-short int int_list43520[] = {
-#else
-,
-#endif
-105,105,105,105,105,105,105,105,105,105,105,105,105,105,105,
-105,105,105,105,105,105,105,105,105,105,105,105,105,105,105,105,
-105,105,105,105,105,105,105,105,105,105,105,105,105,105,105,105,
-105,105,105,105,105,105,105,105,105,105,105,105,105,105,105,105,
-105
-#ifdef __GNUC__
-};
-short int int_list43584[] = {
-#else
-,
-#endif
-105,105,105,105,105,105,105,105,105,105,105,105,105,105,105,
-105,105,105,105,105,105,105,105,105,105,105,105,105,105,105,105,
-105,105,105,105,105,105,105,105,105,105,105,105,105,105,105,105,
-105,105,105,105,105,105,105,105,105,105,105,105,105,105,105,105,
-105
-#ifdef __GNUC__
-};
-short int int_list43648[] = {
-#else
-,
-#endif
-105,105,105,105,105,105,105,105,105,105,105,105,105,105,105,
-105,105,105,105,105,105,105,105,105,105,105,105,105,105,105,105,
-105,105,105,105,105,105,105,105,105,105,105,105,105,105,105,105,
-105,105,105,105,105,105,105,105,105,105,105,105,105,105,105,105,
-105
-#ifdef __GNUC__
-};
-short int int_list43712[] = {
-#else
-,
-#endif
-105,105,105,105,105,105,105,105,105,105,105,105,105,105,105,
-105,105,105,105,105,105,105,105,105,105,105,105,105,105,105,105,
-105,105,105,105,105,105,105,105,105,105,105,105,105,105,105,105,
-105,105,105,105,105,105,105,105,105,105,105,105,105,105,105,105,
-101
-#ifdef __GNUC__
-};
-short int int_list43776[] = {
-#else
-,
-#endif
-101,101,101,101,101,101,101,101,101,101,101,101,101,101,101,
-101,101,101,101,101,101,101,101,101,101,101,101,101,101,101,101,
-101,101,101,101,101,101,101,101,101,101,101,101,101,101,101,101,
-101,101,101,101,101,101,101,101,101,101,101,101,101,101,101,101,
-101
-#ifdef __GNUC__
-};
-short int int_list43840[] = {
-#else
-,
-#endif
-101,101,101,101,101,101,101,101,101,101,101,101,101,101,101,
-101,101,101,101,101,101,101,101,101,101,101,101,101,101,101,101,
-101,101,101,101,101,101,101,101,101,101,101,101,101,101,101,101,
-101,101,101,101,101,101,101,101,101,101,101,101,101,101,101,101,
-101
-#ifdef __GNUC__
-};
-short int int_list43904[] = {
-#else
-,
-#endif
-101,101,101,101,101,101,101,101,101,101,101,101,101,101,101,
-101,101,101,101,101,101,101,101,101,101,101,101,101,101,101,101,
-101,101,101,101,101,101,101,101,101,101,101,101,101,101,101,101,
-101,101,101,101,101,101,101,101,101,101,101,101,101,101,101,101,
-101
-#ifdef __GNUC__
-};
-short int int_list43968[] = {
-#else
-,
-#endif
-101,101,101,101,101,101,101,101,101,101,101,101,101,101,101,
-101,101,101,101,101,101,101,101,101,101,101,101,101,101,101,101,
-101,101,101,101,101,101,101,101,101,101,101,101,101,101,101,101,
-101,101,101,101,101,101,101,101,101,101,101,101,101,101,101,101,
-126
-#ifdef __GNUC__
-};
-short int int_list44032[] = {
-#else
-,
-#endif
-126,126,126,126,126,126,126,126,126,126,126,126,126,126,126,
-126,126,126,126,126,126,126,126,126,126,126,126,126,126,126,126,
-126,126,126,126,126,126,126,126,126,126,126,126,126,126,126,126,
-126,126,126,126,126,126,126,126,126,126,126,126,126,126,126,126,
-126
-#ifdef __GNUC__
-};
-short int int_list44096[] = {
-#else
-,
-#endif
-126,126,126,126,126,126,126,126,126,126,126,126,126,126,126,
-126,126,126,126,126,126,126,126,126,126,126,126,126,126,126,126,
-126,126,126,126,126,126,126,126,126,126,126,126,126,126,126,126,
-126,126,126,126,126,126,126,126,126,126,126,126,126,126,126,126,
-126
-#ifdef __GNUC__
-};
-short int int_list44160[] = {
-#else
-,
-#endif
-126,126,126,126,126,126,126,126,126,126,126,126,126,126,126,
-126,126,126,126,126,126,126,126,126,126,126,126,126,126,126,126,
-126,126,126,126,126,126,126,126,126,126,126,126,126,126,126,126,
-126,126,126,126,126,126,126,126,126,126,126,126,126,126,126,126,
-126
-#ifdef __GNUC__
-};
-short int int_list44224[] = {
-#else
-,
-#endif
-126,126,126,126,126,126,126,126,126,126,126,126,126,126,126,
-126,126,126,126,126,126,126,126,126,126,126,126,126,126,126,126,
-126,126,126,126,126,126,126,126,126,126,126,126,126,126,126,126,
-126,126,126,126,126,126,126,126,126,126,126,126,126,126,126,126,
-122
-#ifdef __GNUC__
-};
-short int int_list44288[] = {
-#else
-,
-#endif
-122,122,122,122,122,122,122,122,122,122,122,122,122,122,122,
-122,122,122,122,122,122,122,122,122,122,122,122,122,122,122,122,
-122,122,122,122,122,122,122,122,122,122,122,122,122,122,122,122,
-122,122,122,122,122,122,122,122,122,122,122,122,122,122,122,122,
-122
-#ifdef __GNUC__
-};
-short int int_list44352[] = {
-#else
-,
-#endif
-122,122,122,122,122,122,122,122,122,122,122,122,122,122,122,
-122,122,122,122,122,122,122,122,122,122,122,122,122,122,122,122,
-122,122,122,122,122,122,122,122,122,122,122,122,122,122,122,122,
-122,122,122,122,122,122,122,122,122,122,122,122,122,122,122,122,
-122
-#ifdef __GNUC__
-};
-short int int_list44416[] = {
-#else
-,
-#endif
-122,122,122,122,122,122,122,122,122,122,122,122,122,122,122,
-122,122,122,122,122,122,122,122,122,122,122,122,122,122,122,122,
-122,122,122,122,122,122,122,122,122,122,122,122,122,122,122,122,
-122,122,122,122,122,122,122,122,122,122,122,122,122,122,122,122,
-122
-#ifdef __GNUC__
-};
-short int int_list44480[] = {
-#else
-,
-#endif
-122,122,122,122,122,122,122,122,122,122,122,122,122,122,122,
-122,122,122,122,122,122,122,122,122,122,122,122,122,122,122,122,
-122,122,122,122,122,122,122,122,122,122,122,122,122,122,122,122,
-122,122,122,122,122,122,122,122,122,122,122,122,122,122,122,122,
-378
-#ifdef __GNUC__
-};
-short int int_list44544[] = {
-#else
-,
-#endif
-378,378,378,378,378,378,378,378,378,378,378,378,378,378,378,
-378,378,378,378,378,378,378,378,378,378,378,378,378,378,378,378,
-378,378,378,378,378,378,378,378,378,378,378,378,378,378,378,378,
-378,378,378,378,378,378,378,378,378,378,378,378,378,378,378,378,
-378
-#ifdef __GNUC__
-};
-short int int_list44608[] = {
-#else
-,
-#endif
-378,378,378,378,378,378,378,378,378,378,378,378,378,378,378,
-378,378,378,378,378,378,378,378,378,378,378,378,378,378,378,378,
-378,378,378,378,378,378,378,378,378,378,378,378,378,378,378,378,
-378,378,378,378,378,378,378,378,378,378,378,378,378,378,378,378,
-378
-#ifdef __GNUC__
-};
-short int int_list44672[] = {
-#else
-,
-#endif
-378,378,378,378,378,378,378,378,378,378,378,378,378,378,378,
-378,378,378,378,378,378,378,378,378,378,378,378,378,378,378,378,
-378,378,378,378,378,378,378,378,378,378,378,378,378,378,378,378,
-378,378,378,378,378,378,378,378,378,378,378,378,378,378,378,378,
-378
-#ifdef __GNUC__
-};
-short int int_list44736[] = {
-#else
-,
-#endif
-378,378,378,378,378,378,378,378,378,378,378,378,378,378,378,
-378,378,378,378,378,378,378,378,378,378,378,378,378,378,378,378,
-378,378,378,378,378,378,378,378,378,378,378,378,378,378,378,378,
-378,378,378,378,378,378,378,378,378,378,378,378,378,378,378,378,
-377
-#ifdef __GNUC__
-};
-short int int_list44800[] = {
-#else
-,
-#endif
-377,377,377,377,377,377,377,377,377,377,377,377,377,377,377,
-377,377,377,377,377,377,377,377,377,377,377,377,377,377,377,377,
-377,377,377,377,377,377,377,377,377,377,377,377,377,377,377,377,
-377,377,377,377,377,377,377,377,377,377,377,377,377,377,377,377,
-377
-#ifdef __GNUC__
-};
-short int int_list44864[] = {
-#else
-,
-#endif
-377,377,377,377,377,377,377,377,377,377,377,377,377,377,377,
-377,377,377,377,377,377,377,377,377,377,377,377,377,377,377,377,
-377,377,377,377,377,377,377,377,377,377,377,377,377,377,377,377,
-377,377,377,377,377,377,377,377,377,377,377,377,377,377,377,377,
-377
-#ifdef __GNUC__
-};
-short int int_list44928[] = {
-#else
-,
-#endif
-377,377,377,377,377,377,377,377,377,377,377,377,377,377,377,
-377,377,377,377,377,377,377,377,377,377,377,377,377,377,377,377,
-377,377,377,377,377,377,377,377,377,377,377,377,377,377,377,377,
-377,377,377,377,377,377,377,377,377,377,377,377,377,377,377,377,
-377
-#ifdef __GNUC__
-};
-short int int_list44992[] = {
-#else
-,
-#endif
-377,377,377,377,377,377,377,377,377,377,377,377,377,377,377,
-377,377,377,377,377,377,377,377,377,377,377,377,377,377,377,377,
-377,377,377,377,377,377,377,377,377,377,377,377,377,377,377,377,
-377,377,377,377,377,377,377,377,377,377,377,377,377,377,377,377,
-96
-#ifdef __GNUC__
-};
-short int int_list45056[] = {
-#else
-,
-#endif
--1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
-96,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
-96,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
-96,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
-96
-#ifdef __GNUC__
-};
-short int int_list45120[] = {
-#else
-,
-#endif
--1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
-96,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
-96,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
-96,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
-96
-#ifdef __GNUC__
-};
-short int int_list45184[] = {
-#else
-,
-#endif
--1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
-96,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
-96,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
-96,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
-96
-#ifdef __GNUC__
-};
-short int int_list45248[] = {
-#else
-,
-#endif
--1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
-96,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
-96,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
-96,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
-132
-#ifdef __GNUC__
-};
-short int int_list45312[] = {
-#else
-,
-#endif
--1,-1,-1,-1,-1,-1,133,-1,-1,131,-1,-1,-1,-1,-1,
-132,-1,-1,-1,-1,-1,-1,133,-1,-1,131,-1,-1,-1,-1,-1,
-132,-1,-1,-1,-1,-1,-1,133,-1,-1,131,-1,-1,-1,-1,-1,
-132,-1,-1,-1,-1,-1,-1,133,-1,-1,131,-1,-1,-1,-1,-1,
-132
-#ifdef __GNUC__
-};
-short int int_list45376[] = {
-#else
-,
-#endif
--1,-1,-1,-1,-1,-1,133,-1,-1,131,-1,-1,-1,-1,-1,
-132,-1,-1,-1,-1,-1,-1,133,-1,-1,131,-1,-1,-1,-1,-1,
-132,-1,-1,-1,-1,-1,-1,133,-1,-1,131,-1,-1,-1,-1,-1,
-132,-1,-1,-1,-1,-1,-1,133,-1,-1,131,-1,-1,-1,-1,-1,
-132
-#ifdef __GNUC__
-};
-short int int_list45440[] = {
-#else
-,
-#endif
--1,-1,-1,-1,-1,-1,133,-1,-1,131,-1,-1,-1,-1,-1,
-132,-1,-1,-1,-1,-1,-1,133,-1,-1,131,-1,-1,-1,-1,-1,
-132,-1,-1,-1,-1,-1,-1,133,-1,-1,131,-1,-1,-1,-1,-1,
-132,-1,-1,-1,-1,-1,-1,133,-1,-1,131,-1,-1,-1,-1,-1,
-132
-#ifdef __GNUC__
-};
-short int int_list45504[] = {
-#else
-,
-#endif
--1,-1,-1,-1,-1,-1,133,-1,-1,131,-1,-1,-1,-1,-1,
-132,-1,-1,-1,-1,-1,-1,133,-1,-1,131,-1,-1,-1,-1,-1,
-132,-1,-1,-1,-1,-1,-1,133,-1,-1,131,-1,-1,-1,-1,-1,
-132,-1,-1,-1,-1,-1,-1,133,-1,-1,131,-1,-1,-1,-1,-1,
-301
-#ifdef __GNUC__
-};
-short int int_list45568[] = {
-#else
-,
-#endif
-348,301,325,306,-1,306,-1,303,345,303,322,308,-1,308,-1,
-301,348,301,325,306,-1,306,-1,303,345,303,322,308,-1,308,-1,
-301,348,301,325,306,-1,306,-1,303,345,303,322,308,-1,308,-1,
-301,348,301,325,306,-1,306,-1,303,345,303,322,308,-1,308,-1,
-301
-#ifdef __GNUC__
-};
-short int int_list45632[] = {
-#else
-,
-#endif
-348,301,325,306,-1,306,-1,303,345,303,322,308,-1,308,-1,
-301,348,301,325,306,-1,306,-1,303,345,303,322,308,-1,308,-1,
-301,348,301,325,306,-1,306,-1,303,345,303,322,308,-1,308,-1,
-301,348,301,325,306,-1,306,-1,303,345,303,322,308,-1,308,-1,
-301
-#ifdef __GNUC__
-};
-short int int_list45696[] = {
-#else
-,
-#endif
-348,301,325,306,-1,306,-1,303,345,303,322,308,-1,308,-1,
-301,348,301,325,306,-1,306,-1,303,345,303,322,308,-1,308,-1,
-301,348,301,325,306,-1,306,-1,303,345,303,322,308,-1,308,-1,
-301,348,301,325,306,-1,306,-1,303,345,303,322,308,-1,308,-1,
-301
-#ifdef __GNUC__
-};
-short int int_list45760[] = {
-#else
-,
-#endif
-348,301,325,306,-1,306,-1,303,345,303,322,308,-1,308,-1,
-301,348,301,325,306,-1,306,-1,303,345,303,322,308,-1,308,-1,
-301,348,301,325,306,-1,306,-1,303,345,303,322,308,-1,308,-1,
-301,348,301,325,306,-1,306,-1,303,345,303,322,308,-1,308,-1,
-300
-#ifdef __GNUC__
-};
-short int int_list45824[] = {
-#else
-,
-#endif
-347,300,324,305,349,305,326,302,344,302,321,307,346,307,323,
-300,347,300,324,305,349,305,326,302,344,302,321,307,346,307,323,
-300,347,300,324,305,349,305,326,302,344,302,321,307,346,307,323,
-300,347,300,324,305,349,305,326,302,344,302,321,307,346,307,323,
-300
-#ifdef __GNUC__
-};
-short int int_list45888[] = {
-#else
-,
-#endif
-347,300,324,305,349,305,326,302,344,302,321,307,346,307,323,
-300,347,300,324,305,349,305,326,302,344,302,321,307,346,307,323,
-300,347,300,324,305,349,305,326,302,344,302,321,307,346,307,323,
-300,347,300,324,305,349,305,326,302,344,302,321,307,346,307,323,
-300
-#ifdef __GNUC__
-};
-short int int_list45952[] = {
-#else
-,
-#endif
-347,300,324,305,349,305,326,302,344,302,321,307,346,307,323,
-300,347,300,324,305,349,305,326,302,344,302,321,307,346,307,323,
-300,347,300,324,305,349,305,326,302,344,302,321,307,346,307,323,
-300,347,300,324,305,349,305,326,302,344,302,321,307,346,307,323,
-300
-#ifdef __GNUC__
-};
-short int int_list46016[] = {
-#else
-,
-#endif
-347,300,324,305,349,305,326,302,344,302,321,307,346,307,323,
-300,347,300,324,305,349,305,326,302,344,302,321,307,346,307,323,
-300,347,300,324,305,349,305,326,302,344,302,321,307,346,307,323,
-300,347,300,324,305,349,305,326,302,344,302,321,307,346,307,323,
-1
-#ifdef __GNUC__
-};
-short int int_list46080[] = {
-#else
-,
-#endif
-1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,
-1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,
-1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,
-1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,
-1
-#ifdef __GNUC__
-};
-short int int_list46144[] = {
-#else
-,
-#endif
-1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,
-1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,
-1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,
-1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,
-1
-#ifdef __GNUC__
-};
-short int int_list46208[] = {
-#else
-,
-#endif
-1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,
-1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,
-1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,
-1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,
-1
-#ifdef __GNUC__
-};
-short int int_list46272[] = {
-#else
-,
-#endif
-1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,
-1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,
-1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,
-1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,
-0
-#ifdef __GNUC__
-};
-short int int_list46336[] = {
-#else
-,
-#endif
-0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
-0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
-0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
-0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
-0
-#ifdef __GNUC__
-};
-short int int_list46400[] = {
-#else
-,
-#endif
-0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
-0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
-0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
-0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
-0
-#ifdef __GNUC__
-};
-short int int_list46464[] = {
-#else
-,
-#endif
-0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
-0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
-0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
-0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
-0
-#ifdef __GNUC__
-};
-short int int_list46528[] = {
-#else
-,
-#endif
-0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
-0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
-0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
-0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
-319
-#ifdef __GNUC__
-};
-short int int_list46592[] = {
-#else
-,
-#endif
-319,319,319,319,319,319,319,319,319,319,319,319,319,319,319,
-319,319,319,319,319,319,319,319,319,319,319,319,319,319,319,319,
-319,319,319,319,319,319,319,319,319,319,319,319,319,319,319,319,
-319,319,319,319,319,319,319,319,319,319,319,319,319,319,319,319,
-319
-#ifdef __GNUC__
-};
-short int int_list46656[] = {
-#else
-,
-#endif
-319,319,319,319,319,319,319,319,319,319,319,319,319,319,319,
-319,319,319,319,319,319,319,319,319,319,319,319,319,319,319,319,
-319,319,319,319,319,319,319,319,319,319,319,319,319,319,319,319,
-319,319,319,319,319,319,319,319,319,319,319,319,319,319,319,319,
-319
-#ifdef __GNUC__
-};
-short int int_list46720[] = {
-#else
-,
-#endif
-319,319,319,319,319,319,319,319,319,319,319,319,319,319,319,
-319,319,319,319,319,319,319,319,319,319,319,319,319,319,319,319,
-319,319,319,319,319,319,319,319,319,319,319,319,319,319,319,319,
-319,319,319,319,319,319,319,319,319,319,319,319,319,319,319,319,
-319
-#ifdef __GNUC__
-};
-short int int_list46784[] = {
-#else
-,
-#endif
-319,319,319,319,319,319,319,319,319,319,319,319,319,319,319,
-319,319,319,319,319,319,319,319,319,319,319,319,319,319,319,319,
-319,319,319,319,319,319,319,319,319,319,319,319,319,319,319,319,
-319,319,319,319,319,319,319,319,319,319,319,319,319,319,319,319,
-318
-#ifdef __GNUC__
-};
-short int int_list46848[] = {
-#else
-,
-#endif
-318,318,318,318,318,318,318,318,318,318,318,318,318,318,318,
-318,318,318,318,318,318,318,318,318,318,318,318,318,318,318,318,
-318,318,318,318,318,318,318,318,318,318,318,318,318,318,318,318,
-318,318,318,318,318,318,318,318,318,318,318,318,318,318,318,318,
-318
-#ifdef __GNUC__
-};
-short int int_list46912[] = {
-#else
-,
-#endif
-318,318,318,318,318,318,318,318,318,318,318,318,318,318,318,
-318,318,318,318,318,318,318,318,318,318,318,318,318,318,318,318,
-318,318,318,318,318,318,318,318,318,318,318,318,318,318,318,318,
-318,318,318,318,318,318,318,318,318,318,318,318,318,318,318,318,
-318
-#ifdef __GNUC__
-};
-short int int_list46976[] = {
-#else
-,
-#endif
-318,318,318,318,318,318,318,318,318,318,318,318,318,318,318,
-318,318,318,318,318,318,318,318,318,318,318,318,318,318,318,318,
-318,318,318,318,318,318,318,318,318,318,318,318,318,318,318,318,
-318,318,318,318,318,318,318,318,318,318,318,318,318,318,318,318,
-318
-#ifdef __GNUC__
-};
-short int int_list47040[] = {
-#else
-,
-#endif
-318,318,318,318,318,318,318,318,318,318,318,318,318,318,318,
-318,318,318,318,318,318,318,318,318,318,318,318,318,318,318,318,
-318,318,318,318,318,318,318,318,318,318,318,318,318,318,318,318,
-318,318,318,318,318,318,318,318,318,318,318,318,318,318,318,318,
--1
-#ifdef __GNUC__
-};
-short int int_list47104[] = {
-#else
-,
-#endif
--1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
-393,-1,397,-1,394,-1,398,-1,391,-1,395,-1,392,-1,396,-1,
-393,-1,397,-1,394,-1,398,-1,391,-1,395,-1,392,-1,396,-1,
-393,-1,397,-1,394,-1,398,-1,391,-1,395,-1,392,-1,396,-1,
-393
-#ifdef __GNUC__
-};
-short int int_list47168[] = {
-#else
-,
-#endif
--1,397,-1,394,-1,398,-1,391,-1,395,-1,392,-1,396,-1,
-393,-1,397,-1,394,-1,398,-1,391,-1,395,-1,392,-1,396,-1,
-393,-1,397,-1,394,-1,398,-1,391,-1,395,-1,392,-1,396,-1,
-393,-1,397,-1,394,-1,398,-1,391,-1,395,-1,392,-1,396,-1,
-393
-#ifdef __GNUC__
-};
-short int int_list47232[] = {
-#else
-,
-#endif
--1,397,-1,394,-1,398,-1,391,-1,395,-1,392,-1,396,-1,
-393,-1,397,-1,394,-1,398,-1,391,-1,395,-1,392,-1,396,-1,
-393,-1,397,-1,394,-1,398,-1,391,-1,395,-1,392,-1,396,-1,
-393,-1,397,-1,394,-1,398,-1,391,-1,395,-1,392,-1,396,-1,
-393
-#ifdef __GNUC__
-};
-short int int_list47296[] = {
-#else
-,
-#endif
--1,397,-1,394,-1,398,-1,391,-1,395,-1,392,-1,396,-1,
-393,-1,397,-1,394,-1,398,-1,391,-1,395,-1,392,-1,396,-1,
-393,-1,397,-1,394,-1,398,-1,391,-1,395,-1,392,-1,396,-1,
-393,-1,397,-1,394,-1,398,-1,391,-1,395,-1,392,-1,396,-1,
-316
-#ifdef __GNUC__
-};
-short int int_list47360[] = {
-#else
-,
-#endif
-316,316,316,316,316,316,316,316,316,316,316,316,316,316,316,
-316,316,316,316,316,316,316,316,316,316,316,316,316,316,316,316,
-316,316,316,316,316,316,316,316,316,316,316,316,316,316,316,316,
-316,316,316,316,316,316,316,316,316,316,316,316,316,316,316,316,
-316
-#ifdef __GNUC__
-};
-short int int_list47424[] = {
-#else
-,
-#endif
-316,316,316,316,316,316,316,316,316,316,316,316,316,316,316,
-316,316,316,316,316,316,316,316,316,316,316,316,316,316,316,316,
-316,316,316,316,316,316,316,316,316,316,316,316,316,316,316,316,
-316,316,316,316,316,316,316,316,316,316,316,316,316,316,316,316,
-316
-#ifdef __GNUC__
-};
-short int int_list47488[] = {
-#else
-,
-#endif
-316,316,316,316,316,316,316,316,316,316,316,316,316,316,316,
-316,316,316,316,316,316,316,316,316,316,316,316,316,316,316,316,
-316,316,316,316,316,316,316,316,316,316,316,316,316,316,316,316,
-316,316,316,316,316,316,316,316,316,316,316,316,316,316,316,316,
-316
-#ifdef __GNUC__
-};
-short int int_list47552[] = {
-#else
-,
-#endif
-316,316,316,316,316,316,316,316,316,316,316,316,316,316,316,
-316,316,316,316,316,316,316,316,316,316,316,316,316,316,316,316,
-316,316,316,316,316,316,316,316,316,316,316,316,316,316,316,316,
-316,316,316,316,316,316,316,316,316,316,316,316,316,316,316,316,
--1
-#ifdef __GNUC__
-};
-short int int_list47616[] = {
-#else
-,
-#endif
--1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
-80,198,93,-1,82,-1,95,-1,76,194,89,-1,78,-1,91,-1,
-80,198,93,-1,82,-1,95,-1,76,194,89,-1,78,-1,91,-1,
-80,198,93,-1,82,-1,95,-1,76,194,89,-1,78,-1,91,-1,
-80
-#ifdef __GNUC__
-};
-short int int_list47680[] = {
-#else
-,
-#endif
-198,93,-1,82,-1,95,-1,76,194,89,-1,78,-1,91,-1,
-80,198,93,-1,82,-1,95,-1,76,194,89,-1,78,-1,91,-1,
-80,198,93,-1,82,-1,95,-1,76,194,89,-1,78,-1,91,-1,
-80,198,93,-1,82,-1,95,-1,76,194,89,-1,78,-1,91,-1,
-80
-#ifdef __GNUC__
-};
-short int int_list47744[] = {
-#else
-,
-#endif
-198,93,-1,82,-1,95,-1,76,194,89,-1,78,-1,91,-1,
-80,198,93,-1,82,-1,95,-1,76,194,89,-1,78,-1,91,-1,
-80,198,93,-1,82,-1,95,-1,76,194,89,-1,78,-1,91,-1,
-80,198,93,-1,82,-1,95,-1,76,194,89,-1,78,-1,91,-1,
-80
-#ifdef __GNUC__
-};
-short int int_list47808[] = {
-#else
-,
-#endif
-198,93,-1,82,-1,95,-1,76,194,89,-1,78,-1,91,-1,
-80,198,93,-1,82,-1,95,-1,76,194,89,-1,78,-1,91,-1,
-80,198,93,-1,82,-1,95,-1,76,194,89,-1,78,-1,91,-1,
-80,198,93,-1,82,-1,95,-1,76,194,89,-1,78,-1,91,-1,
--1
-#ifdef __GNUC__
-};
-short int int_list47872[] = {
-#else
-,
-#endif
--1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,
-79,197,92,-1,81,-1,94,-1,75,193,88,-1,77,-1,90,-1,
-79,197,92,-1,81,-1,94,-1,75,193,88,-1,77,-1,90,-1,
-79,197,92,-1,81,-1,94,-1,75,193,88,-1,77,-1,90,-1,
-79
-#ifdef __GNUC__
-};
-short int int_list47936[] = {
-#else
-,
-#endif
-197,92,-1,81,-1,94,-1,75,193,88,-1,77,-1,90,-1,
-79,197,92,-1,81,-1,94,-1,75,193,88,-1,77,-1,90,-1,
-79,197,92,-1,81,-1,94,-1,75,193,88,-1,77,-1,90,-1,
-79,197,92,-1,81,-1,94,-1,75,193,88,-1,77,-1,90,-1,
-79
-#ifdef __GNUC__
-};
-short int int_list48000[] = {
-#else
-,
-#endif
-197,92,-1,81,-1,94,-1,75,193,88,-1,77,-1,90,-1,
-79,197,92,-1,81,-1,94,-1,75,193,88,-1,77,-1,90,-1,
-79,197,92,-1,81,-1,94,-1,75,193,88,-1,77,-1,90,-1,
-79,197,92,-1,81,-1,94,-1,75,193,88,-1,77,-1,90,-1,
-79
-#ifdef __GNUC__
-};
-short int int_list48064[] = {
-#else
-,
-#endif
-197,92,-1,81,-1,94,-1,75,193,88,-1,77,-1,90,-1,
-79,197,92,-1,81,-1,94,-1,75,193,88,-1,77,-1,90,-1,
-79,197,92,-1,81,-1,94,-1,75,193,88,-1,77,-1,90,-1,
-79,197,92,-1,81,-1,94,-1,75,193,88,-1,77,-1,90,-1,
-309
-#ifdef __GNUC__
-};
-short int int_list48128[] = {
-#else
-,
-#endif
-309,309,309,309,309,309,309,309,309,309,309,309,309,309,309,
-309,309,309,309,309,309,309,309,309,309,309,309,309,309,309,309,
-309,309,309,309,309,309,309,309,309,309,309,309,309,309,309,309,
-309,309,309,309,309,309,309,309,309,309,309,309,309,309,309,309,
-309
-#ifdef __GNUC__
-};
-short int int_list48192[] = {
-#else
-,
-#endif
-309,309,309,309,309,309,309,309,309,309,309,309,309,309,309,
-309,309,309,309,309,309,309,309,309,309,309,309,309,309,309,309,
-309,309,309,309,309,309,309,309,309,309,309,309,309,309,309,309,
-309,309,309,309,309,309,309,309,309,309,309,309,309,309,309,309,
-309
-#ifdef __GNUC__
-};
-short int int_list48256[] = {
-#else
-,
-#endif
-309,309,309,309,309,309,309,309,309,309,309,309,309,309,309,
-309,309,309,309,309,309,309,309,309,309,309,309,309,309,309,309,
-309,309,309,309,309,309,309,309,309,309,309,309,309,309,309,309,
-309,309,309,309,309,309,309,309,309,309,309,309,309,309,309,309,
-309
-#ifdef __GNUC__
-};
-short int int_list48320[] = {
-#else
-,
-#endif
-309,309,309,309,309,309,309,309,309,309,309,309,309,309,309,
-309,309,309,309,309,309,309,309,309,309,309,309,309,309,309,309,
-309,309,309,309,309,309,309,309,309,309,309,309,309,309,309,309,
-309,309,309,309,309,309,309,309,309,309,309,309,309,309,309,309,
-201
-#ifdef __GNUC__
-};
-short int int_list48384[] = {
-#else
-,
-#endif
-201,201,201,201,201,201,201,201,201,201,201,201,201,201,201,
-201,201,201,201,201,201,201,201,201,201,201,201,201,201,201,201,
-201,201,201,201,201,201,201,201,201,201,201,201,201,201,201,201,
-201,201,201,201,201,201,201,201,201,201,201,201,201,201,201,201,
-201
-#ifdef __GNUC__
-};
-short int int_list48448[] = {
-#else
-,
-#endif
-201,201,201,201,201,201,201,201,201,201,201,201,201,201,201,
-201,201,201,201,201,201,201,201,201,201,201,201,201,201,201,201,
-201,201,201,201,201,201,201,201,201,201,201,201,201,201,201,201,
-201,201,201,201,201,201,201,201,201,201,201,201,201,201,201,201,
-201
-#ifdef __GNUC__
-};
-short int int_list48512[] = {
-#else
-,
-#endif
-201,201,201,201,201,201,201,201,201,201,201,201,201,201,201,
-201,201,201,201,201,201,201,201,201,201,201,201,201,201,201,201,
-201,201,201,201,201,201,201,201,201,201,201,201,201,201,201,201,
-201,201,201,201,201,201,201,201,201,201,201,201,201,201,201,201,
-201
-#ifdef __GNUC__
-};
-short int int_list48576[] = {
-#else
-,
-#endif
-201,201,201,201,201,201,201,201,201,201,201,201,201,201,201,
-201,201,201,201,201,201,201,201,201,201,201,201,201,201,201,201,
-201,201,201,201,201,201,201,201,201,201,201,201,201,201,201,201,
-201,201,201,201,201,201,201,201,201,201,201,201,201,201,201,201,
-304
-#ifdef __GNUC__
-};
-short int int_list48640[] = {
-#else
-,
-#endif
-304,304,304,304,304,304,304,304,304,304,304,304,304,304,304,
-304,304,304,304,304,304,304,304,304,304,304,304,304,304,304,304,
-304,304,304,304,304,304,304,304,304,304,304,304,304,304,304,304,
-304,304,304,304,304,304,304,304,304,304,304,304,304,304,304,304,
-304
-#ifdef __GNUC__
-};
-short int int_list48704[] = {
-#else
-,
-#endif
-304,304,304,304,304,304,304,304,304,304,304,304,304,304,304,
-304,304,304,304,304,304,304,304,304,304,304,304,304,304,304,304,
-304,304,304,304,304,304,304,304,304,304,304,304,304,304,304,304,
-304,304,304,304,304,304,304,304,304,304,304,304,304,304,304,304,
-304
-#ifdef __GNUC__
-};
-short int int_list48768[] = {
-#else
-,
-#endif
-304,304,304,304,304,304,304,304,304,304,304,304,304,304,304,
-304,304,304,304,304,304,304,304,304,304,304,304,304,304,304,304,
-304,304,304,304,304,304,304,304,304,304,304,304,304,304,304,304,
-304,304,304,304,304,304,304,304,304,304,304,304,304,304,304,304,
-304
-#ifdef __GNUC__
-};
-short int int_list48832[] = {
-#else
-,
-#endif
-304,304,304,304,304,304,304,304,304,304,304,304,304,304,304,
-304,304,304,304,304,304,304,304,304,304,304,304,304,304,304,304,
-304,304,304,304,304,304,304,304,304,304,304,304,304,304,304,304,
-304,304,304,304,304,304,304,304,304,304,304,304,304,304,304,304,
-317
-#ifdef __GNUC__
-};
-short int int_list48896[] = {
-#else
-,
-#endif
-317,317,317,317,317,317,317,317,317,317,317,317,317,317,317,
-317,317,317,317,317,317,317,317,317,317,317,317,317,317,317,317,
-317,317,317,317,317,317,317,317,317,317,317,317,317,317,317,317,
-317,317,317,317,317,317,317,317,317,317,317,317,317,317,317,317,
-317
-#ifdef __GNUC__
-};
-short int int_list48960[] = {
-#else
-,
-#endif
-317,317,317,317,317,317,317,317,317,317,317,317,317,317,317,
-317,317,317,317,317,317,317,317,317,317,317,317,317,317,317,317,
-317,317,317,317,317,317,317,317,317,317,317,317,317,317,317,317,
-317,317,317,317,317,317,317,317,317,317,317,317,317,317,317,317,
-317
-#ifdef __GNUC__
-};
-short int int_list49024[] = {
-#else
-,
-#endif
-317,317,317,317,317,317,317,317,317,317,317,317,317,317,317,
-317,317,317,317,317,317,317,317,317,317,317,317,317,317,317,317,
-317,317,317,317,317,317,317,317,317,317,317,317,317,317,317,317,
-317,317,317,317,317,317,317,317,317,317,317,317,317,317,317,317,
-317
-#ifdef __GNUC__
-};
-short int int_list49088[] = {
-#else
-,
-#endif
-317,317,317,317,317,317,317,317,317,317,317,317,317,317,317,
-317,317,317,317,317,317,317,317,317,317,317,317,317,317,317,317,
-317,317,317,317,317,317,317,317,317,317,317,317,317,317,317,317,
-317,317,317,317,317,317,317,317,317,317,317,317,317,317,317,317,
-185
-#ifdef __GNUC__
-};
-short int int_list49152[] = {
-#else
-,
-#endif
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185
-#ifdef __GNUC__
-};
-short int int_list49216[] = {
-#else
-,
-#endif
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185
-#ifdef __GNUC__
-};
-short int int_list49280[] = {
-#else
-,
-#endif
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185
-#ifdef __GNUC__
-};
-short int int_list49344[] = {
-#else
-,
-#endif
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185
-#ifdef __GNUC__
-};
-short int int_list49408[] = {
-#else
-,
-#endif
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185
-#ifdef __GNUC__
-};
-short int int_list49472[] = {
-#else
-,
-#endif
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185
-#ifdef __GNUC__
-};
-short int int_list49536[] = {
-#else
-,
-#endif
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185
-#ifdef __GNUC__
-};
-short int int_list49600[] = {
-#else
-,
-#endif
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185
-#ifdef __GNUC__
-};
-short int int_list49664[] = {
-#else
-,
-#endif
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185
-#ifdef __GNUC__
-};
-short int int_list49728[] = {
-#else
-,
-#endif
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185
-#ifdef __GNUC__
-};
-short int int_list49792[] = {
-#else
-,
-#endif
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185
-#ifdef __GNUC__
-};
-short int int_list49856[] = {
-#else
-,
-#endif
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185
-#ifdef __GNUC__
-};
-short int int_list49920[] = {
-#else
-,
-#endif
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185
-#ifdef __GNUC__
-};
-short int int_list49984[] = {
-#else
-,
-#endif
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185
-#ifdef __GNUC__
-};
-short int int_list50048[] = {
-#else
-,
-#endif
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185
-#ifdef __GNUC__
-};
-short int int_list50112[] = {
-#else
-,
-#endif
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185
-#ifdef __GNUC__
-};
-short int int_list50176[] = {
-#else
-,
-#endif
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185
-#ifdef __GNUC__
-};
-short int int_list50240[] = {
-#else
-,
-#endif
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185
-#ifdef __GNUC__
-};
-short int int_list50304[] = {
-#else
-,
-#endif
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185
-#ifdef __GNUC__
-};
-short int int_list50368[] = {
-#else
-,
-#endif
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185
-#ifdef __GNUC__
-};
-short int int_list50432[] = {
-#else
-,
-#endif
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185
-#ifdef __GNUC__
-};
-short int int_list50496[] = {
-#else
-,
-#endif
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185
-#ifdef __GNUC__
-};
-short int int_list50560[] = {
-#else
-,
-#endif
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185
-#ifdef __GNUC__
-};
-short int int_list50624[] = {
-#else
-,
-#endif
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185
-#ifdef __GNUC__
-};
-short int int_list50688[] = {
-#else
-,
-#endif
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185
-#ifdef __GNUC__
-};
-short int int_list50752[] = {
-#else
-,
-#endif
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185
-#ifdef __GNUC__
-};
-short int int_list50816[] = {
-#else
-,
-#endif
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185
-#ifdef __GNUC__
-};
-short int int_list50880[] = {
-#else
-,
-#endif
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185
-#ifdef __GNUC__
-};
-short int int_list50944[] = {
-#else
-,
-#endif
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185
-#ifdef __GNUC__
-};
-short int int_list51008[] = {
-#else
-,
-#endif
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185
-#ifdef __GNUC__
-};
-short int int_list51072[] = {
-#else
-,
-#endif
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185
-#ifdef __GNUC__
-};
-short int int_list51136[] = {
-#else
-,
-#endif
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185
-#ifdef __GNUC__
-};
-short int int_list51200[] = {
-#else
-,
-#endif
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185
-#ifdef __GNUC__
-};
-short int int_list51264[] = {
-#else
-,
-#endif
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185
-#ifdef __GNUC__
-};
-short int int_list51328[] = {
-#else
-,
-#endif
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185
-#ifdef __GNUC__
-};
-short int int_list51392[] = {
-#else
-,
-#endif
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185
-#ifdef __GNUC__
-};
-short int int_list51456[] = {
-#else
-,
-#endif
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185
-#ifdef __GNUC__
-};
-short int int_list51520[] = {
-#else
-,
-#endif
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185
-#ifdef __GNUC__
-};
-short int int_list51584[] = {
-#else
-,
-#endif
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185
-#ifdef __GNUC__
-};
-short int int_list51648[] = {
-#else
-,
-#endif
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185
-#ifdef __GNUC__
-};
-short int int_list51712[] = {
-#else
-,
-#endif
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185
-#ifdef __GNUC__
-};
-short int int_list51776[] = {
-#else
-,
-#endif
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185
-#ifdef __GNUC__
-};
-short int int_list51840[] = {
-#else
-,
-#endif
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185
-#ifdef __GNUC__
-};
-short int int_list51904[] = {
-#else
-,
-#endif
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185
-#ifdef __GNUC__
-};
-short int int_list51968[] = {
-#else
-,
-#endif
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185
-#ifdef __GNUC__
-};
-short int int_list52032[] = {
-#else
-,
-#endif
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185
-#ifdef __GNUC__
-};
-short int int_list52096[] = {
-#else
-,
-#endif
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185
-#ifdef __GNUC__
-};
-short int int_list52160[] = {
-#else
-,
-#endif
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185
-#ifdef __GNUC__
-};
-short int int_list52224[] = {
-#else
-,
-#endif
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185
-#ifdef __GNUC__
-};
-short int int_list52288[] = {
-#else
-,
-#endif
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185
-#ifdef __GNUC__
-};
-short int int_list52352[] = {
-#else
-,
-#endif
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185
-#ifdef __GNUC__
-};
-short int int_list52416[] = {
-#else
-,
-#endif
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185
-#ifdef __GNUC__
-};
-short int int_list52480[] = {
-#else
-,
-#endif
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185
-#ifdef __GNUC__
-};
-short int int_list52544[] = {
-#else
-,
-#endif
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185
-#ifdef __GNUC__
-};
-short int int_list52608[] = {
-#else
-,
-#endif
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185
-#ifdef __GNUC__
-};
-short int int_list52672[] = {
-#else
-,
-#endif
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185
-#ifdef __GNUC__
-};
-short int int_list52736[] = {
-#else
-,
-#endif
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185
-#ifdef __GNUC__
-};
-short int int_list52800[] = {
-#else
-,
-#endif
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185
-#ifdef __GNUC__
-};
-short int int_list52864[] = {
-#else
-,
-#endif
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185
-#ifdef __GNUC__
-};
-short int int_list52928[] = {
-#else
-,
-#endif
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185
-#ifdef __GNUC__
-};
-short int int_list52992[] = {
-#else
-,
-#endif
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185
-#ifdef __GNUC__
-};
-short int int_list53056[] = {
-#else
-,
-#endif
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185
-#ifdef __GNUC__
-};
-short int int_list53120[] = {
-#else
-,
-#endif
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185
-#ifdef __GNUC__
-};
-short int int_list53184[] = {
-#else
-,
-#endif
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,185,
-41
-#ifdef __GNUC__
-};
-short int int_list53248[] = {
-#else
-,
-#endif
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41
-#ifdef __GNUC__
-};
-short int int_list53312[] = {
-#else
-,
-#endif
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41
-#ifdef __GNUC__
-};
-short int int_list53376[] = {
-#else
-,
-#endif
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41
-#ifdef __GNUC__
-};
-short int int_list53440[] = {
-#else
-,
-#endif
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41
-#ifdef __GNUC__
-};
-short int int_list53504[] = {
-#else
-,
-#endif
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41
-#ifdef __GNUC__
-};
-short int int_list53568[] = {
-#else
-,
-#endif
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41
-#ifdef __GNUC__
-};
-short int int_list53632[] = {
-#else
-,
-#endif
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41
-#ifdef __GNUC__
-};
-short int int_list53696[] = {
-#else
-,
-#endif
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41
-#ifdef __GNUC__
-};
-short int int_list53760[] = {
-#else
-,
-#endif
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41
-#ifdef __GNUC__
-};
-short int int_list53824[] = {
-#else
-,
-#endif
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41
-#ifdef __GNUC__
-};
-short int int_list53888[] = {
-#else
-,
-#endif
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41
-#ifdef __GNUC__
-};
-short int int_list53952[] = {
-#else
-,
-#endif
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41
-#ifdef __GNUC__
-};
-short int int_list54016[] = {
-#else
-,
-#endif
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41
-#ifdef __GNUC__
-};
-short int int_list54080[] = {
-#else
-,
-#endif
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41
-#ifdef __GNUC__
-};
-short int int_list54144[] = {
-#else
-,
-#endif
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41
-#ifdef __GNUC__
-};
-short int int_list54208[] = {
-#else
-,
-#endif
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41
-#ifdef __GNUC__
-};
-short int int_list54272[] = {
-#else
-,
-#endif
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41
-#ifdef __GNUC__
-};
-short int int_list54336[] = {
-#else
-,
-#endif
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41
-#ifdef __GNUC__
-};
-short int int_list54400[] = {
-#else
-,
-#endif
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41
-#ifdef __GNUC__
-};
-short int int_list54464[] = {
-#else
-,
-#endif
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41
-#ifdef __GNUC__
-};
-short int int_list54528[] = {
-#else
-,
-#endif
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41
-#ifdef __GNUC__
-};
-short int int_list54592[] = {
-#else
-,
-#endif
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41
-#ifdef __GNUC__
-};
-short int int_list54656[] = {
-#else
-,
-#endif
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41
-#ifdef __GNUC__
-};
-short int int_list54720[] = {
-#else
-,
-#endif
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41
-#ifdef __GNUC__
-};
-short int int_list54784[] = {
-#else
-,
-#endif
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41
-#ifdef __GNUC__
-};
-short int int_list54848[] = {
-#else
-,
-#endif
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41
-#ifdef __GNUC__
-};
-short int int_list54912[] = {
-#else
-,
-#endif
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41
-#ifdef __GNUC__
-};
-short int int_list54976[] = {
-#else
-,
-#endif
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41
-#ifdef __GNUC__
-};
-short int int_list55040[] = {
-#else
-,
-#endif
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41
-#ifdef __GNUC__
-};
-short int int_list55104[] = {
-#else
-,
-#endif
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41
-#ifdef __GNUC__
-};
-short int int_list55168[] = {
-#else
-,
-#endif
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41
-#ifdef __GNUC__
-};
-short int int_list55232[] = {
-#else
-,
-#endif
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41
-#ifdef __GNUC__
-};
-short int int_list55296[] = {
-#else
-,
-#endif
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41
-#ifdef __GNUC__
-};
-short int int_list55360[] = {
-#else
-,
-#endif
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41
-#ifdef __GNUC__
-};
-short int int_list55424[] = {
-#else
-,
-#endif
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41
-#ifdef __GNUC__
-};
-short int int_list55488[] = {
-#else
-,
-#endif
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41
-#ifdef __GNUC__
-};
-short int int_list55552[] = {
-#else
-,
-#endif
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41
-#ifdef __GNUC__
-};
-short int int_list55616[] = {
-#else
-,
-#endif
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41
-#ifdef __GNUC__
-};
-short int int_list55680[] = {
-#else
-,
-#endif
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41
-#ifdef __GNUC__
-};
-short int int_list55744[] = {
-#else
-,
-#endif
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41
-#ifdef __GNUC__
-};
-short int int_list55808[] = {
-#else
-,
-#endif
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41
-#ifdef __GNUC__
-};
-short int int_list55872[] = {
-#else
-,
-#endif
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41
-#ifdef __GNUC__
-};
-short int int_list55936[] = {
-#else
-,
-#endif
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41
-#ifdef __GNUC__
-};
-short int int_list56000[] = {
-#else
-,
-#endif
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41
-#ifdef __GNUC__
-};
-short int int_list56064[] = {
-#else
-,
-#endif
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41
-#ifdef __GNUC__
-};
-short int int_list56128[] = {
-#else
-,
-#endif
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41
-#ifdef __GNUC__
-};
-short int int_list56192[] = {
-#else
-,
-#endif
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41
-#ifdef __GNUC__
-};
-short int int_list56256[] = {
-#else
-,
-#endif
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41
-#ifdef __GNUC__
-};
-short int int_list56320[] = {
-#else
-,
-#endif
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41
-#ifdef __GNUC__
-};
-short int int_list56384[] = {
-#else
-,
-#endif
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41
-#ifdef __GNUC__
-};
-short int int_list56448[] = {
-#else
-,
-#endif
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41
-#ifdef __GNUC__
-};
-short int int_list56512[] = {
-#else
-,
-#endif
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41
-#ifdef __GNUC__
-};
-short int int_list56576[] = {
-#else
-,
-#endif
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41
-#ifdef __GNUC__
-};
-short int int_list56640[] = {
-#else
-,
-#endif
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41
-#ifdef __GNUC__
-};
-short int int_list56704[] = {
-#else
-,
-#endif
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41
-#ifdef __GNUC__
-};
-short int int_list56768[] = {
-#else
-,
-#endif
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41
-#ifdef __GNUC__
-};
-short int int_list56832[] = {
-#else
-,
-#endif
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41
-#ifdef __GNUC__
-};
-short int int_list56896[] = {
-#else
-,
-#endif
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41
-#ifdef __GNUC__
-};
-short int int_list56960[] = {
-#else
-,
-#endif
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41
-#ifdef __GNUC__
-};
-short int int_list57024[] = {
-#else
-,
-#endif
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41
-#ifdef __GNUC__
-};
-short int int_list57088[] = {
-#else
-,
-#endif
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41
-#ifdef __GNUC__
-};
-short int int_list57152[] = {
-#else
-,
-#endif
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41
-#ifdef __GNUC__
-};
-short int int_list57216[] = {
-#else
-,
-#endif
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41
-#ifdef __GNUC__
-};
-short int int_list57280[] = {
-#else
-,
-#endif
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,41,
-155
-#ifdef __GNUC__
-};
-short int int_list57344[] = {
-#else
-,
-#endif
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155
-#ifdef __GNUC__
-};
-short int int_list57408[] = {
-#else
-,
-#endif
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155
-#ifdef __GNUC__
-};
-short int int_list57472[] = {
-#else
-,
-#endif
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155
-#ifdef __GNUC__
-};
-short int int_list57536[] = {
-#else
-,
-#endif
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155
-#ifdef __GNUC__
-};
-short int int_list57600[] = {
-#else
-,
-#endif
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155
-#ifdef __GNUC__
-};
-short int int_list57664[] = {
-#else
-,
-#endif
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155
-#ifdef __GNUC__
-};
-short int int_list57728[] = {
-#else
-,
-#endif
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155
-#ifdef __GNUC__
-};
-short int int_list57792[] = {
-#else
-,
-#endif
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155
-#ifdef __GNUC__
-};
-short int int_list57856[] = {
-#else
-,
-#endif
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155
-#ifdef __GNUC__
-};
-short int int_list57920[] = {
-#else
-,
-#endif
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155
-#ifdef __GNUC__
-};
-short int int_list57984[] = {
-#else
-,
-#endif
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155
-#ifdef __GNUC__
-};
-short int int_list58048[] = {
-#else
-,
-#endif
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155
-#ifdef __GNUC__
-};
-short int int_list58112[] = {
-#else
-,
-#endif
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155
-#ifdef __GNUC__
-};
-short int int_list58176[] = {
-#else
-,
-#endif
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155
-#ifdef __GNUC__
-};
-short int int_list58240[] = {
-#else
-,
-#endif
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155
-#ifdef __GNUC__
-};
-short int int_list58304[] = {
-#else
-,
-#endif
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155
-#ifdef __GNUC__
-};
-short int int_list58368[] = {
-#else
-,
-#endif
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155
-#ifdef __GNUC__
-};
-short int int_list58432[] = {
-#else
-,
-#endif
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155
-#ifdef __GNUC__
-};
-short int int_list58496[] = {
-#else
-,
-#endif
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155
-#ifdef __GNUC__
-};
-short int int_list58560[] = {
-#else
-,
-#endif
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155
-#ifdef __GNUC__
-};
-short int int_list58624[] = {
-#else
-,
-#endif
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155
-#ifdef __GNUC__
-};
-short int int_list58688[] = {
-#else
-,
-#endif
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155
-#ifdef __GNUC__
-};
-short int int_list58752[] = {
-#else
-,
-#endif
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155
-#ifdef __GNUC__
-};
-short int int_list58816[] = {
-#else
-,
-#endif
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155
-#ifdef __GNUC__
-};
-short int int_list58880[] = {
-#else
-,
-#endif
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155
-#ifdef __GNUC__
-};
-short int int_list58944[] = {
-#else
-,
-#endif
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155
-#ifdef __GNUC__
-};
-short int int_list59008[] = {
-#else
-,
-#endif
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155
-#ifdef __GNUC__
-};
-short int int_list59072[] = {
-#else
-,
-#endif
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155
-#ifdef __GNUC__
-};
-short int int_list59136[] = {
-#else
-,
-#endif
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155
-#ifdef __GNUC__
-};
-short int int_list59200[] = {
-#else
-,
-#endif
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155
-#ifdef __GNUC__
-};
-short int int_list59264[] = {
-#else
-,
-#endif
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155
-#ifdef __GNUC__
-};
-short int int_list59328[] = {
-#else
-,
-#endif
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155
-#ifdef __GNUC__
-};
-short int int_list59392[] = {
-#else
-,
-#endif
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155
-#ifdef __GNUC__
-};
-short int int_list59456[] = {
-#else
-,
-#endif
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155
-#ifdef __GNUC__
-};
-short int int_list59520[] = {
-#else
-,
-#endif
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155
-#ifdef __GNUC__
-};
-short int int_list59584[] = {
-#else
-,
-#endif
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155
-#ifdef __GNUC__
-};
-short int int_list59648[] = {
-#else
-,
-#endif
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155
-#ifdef __GNUC__
-};
-short int int_list59712[] = {
-#else
-,
-#endif
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155
-#ifdef __GNUC__
-};
-short int int_list59776[] = {
-#else
-,
-#endif
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155
-#ifdef __GNUC__
-};
-short int int_list59840[] = {
-#else
-,
-#endif
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155
-#ifdef __GNUC__
-};
-short int int_list59904[] = {
-#else
-,
-#endif
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155
-#ifdef __GNUC__
-};
-short int int_list59968[] = {
-#else
-,
-#endif
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155
-#ifdef __GNUC__
-};
-short int int_list60032[] = {
-#else
-,
-#endif
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155
-#ifdef __GNUC__
-};
-short int int_list60096[] = {
-#else
-,
-#endif
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155
-#ifdef __GNUC__
-};
-short int int_list60160[] = {
-#else
-,
-#endif
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155
-#ifdef __GNUC__
-};
-short int int_list60224[] = {
-#else
-,
-#endif
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155
-#ifdef __GNUC__
-};
-short int int_list60288[] = {
-#else
-,
-#endif
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155
-#ifdef __GNUC__
-};
-short int int_list60352[] = {
-#else
-,
-#endif
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155
-#ifdef __GNUC__
-};
-short int int_list60416[] = {
-#else
-,
-#endif
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155
-#ifdef __GNUC__
-};
-short int int_list60480[] = {
-#else
-,
-#endif
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155
-#ifdef __GNUC__
-};
-short int int_list60544[] = {
-#else
-,
-#endif
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155
-#ifdef __GNUC__
-};
-short int int_list60608[] = {
-#else
-,
-#endif
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155
-#ifdef __GNUC__
-};
-short int int_list60672[] = {
-#else
-,
-#endif
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155
-#ifdef __GNUC__
-};
-short int int_list60736[] = {
-#else
-,
-#endif
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155
-#ifdef __GNUC__
-};
-short int int_list60800[] = {
-#else
-,
-#endif
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155
-#ifdef __GNUC__
-};
-short int int_list60864[] = {
-#else
-,
-#endif
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155
-#ifdef __GNUC__
-};
-short int int_list60928[] = {
-#else
-,
-#endif
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155
-#ifdef __GNUC__
-};
-short int int_list60992[] = {
-#else
-,
-#endif
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155
-#ifdef __GNUC__
-};
-short int int_list61056[] = {
-#else
-,
-#endif
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155
-#ifdef __GNUC__
-};
-short int int_list61120[] = {
-#else
-,
-#endif
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155
-#ifdef __GNUC__
-};
-short int int_list61184[] = {
-#else
-,
-#endif
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155
-#ifdef __GNUC__
-};
-short int int_list61248[] = {
-#else
-,
-#endif
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155
-#ifdef __GNUC__
-};
-short int int_list61312[] = {
-#else
-,
-#endif
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155
-#ifdef __GNUC__
-};
-short int int_list61376[] = {
-#else
-,
-#endif
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,155,
-97
-#ifdef __GNUC__
-};
-short int int_list61440[] = {
-#else
-,
-#endif
-97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,
-97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,
-97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,
-97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,
-97
-#ifdef __GNUC__
-};
-short int int_list61504[] = {
-#else
-,
-#endif
-97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,
-97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,
-97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,
-97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,
-117
-#ifdef __GNUC__
-};
-short int int_list61568[] = {
-#else
-,
-#endif
-117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,
-117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,
-117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,
-117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,
-117
-#ifdef __GNUC__
-};
-short int int_list61632[] = {
-#else
-,
-#endif
-117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,
-117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,
-117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,
-117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,
-97
-#ifdef __GNUC__
-};
-short int int_list61696[] = {
-#else
-,
-#endif
-97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,
-97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,
-97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,
-97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,
-97
-#ifdef __GNUC__
-};
-short int int_list61760[] = {
-#else
-,
-#endif
-97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,
-97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,
-97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,
-97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,
-117
-#ifdef __GNUC__
-};
-short int int_list61824[] = {
-#else
-,
-#endif
-117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,
-117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,
-117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,
-117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,
-117
-#ifdef __GNUC__
-};
-short int int_list61888[] = {
-#else
-,
-#endif
-117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,
-117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,
-117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,
-117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,
-97
-#ifdef __GNUC__
-};
-short int int_list61952[] = {
-#else
-,
-#endif
-97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,
-97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,
-97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,
-97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,
-97
-#ifdef __GNUC__
-};
-short int int_list62016[] = {
-#else
-,
-#endif
-97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,
-97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,
-97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,
-97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,
-117
-#ifdef __GNUC__
-};
-short int int_list62080[] = {
-#else
-,
-#endif
-117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,
-117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,
-117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,
-117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,
-117
-#ifdef __GNUC__
-};
-short int int_list62144[] = {
-#else
-,
-#endif
-117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,
-117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,
-117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,
-117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,
-97
-#ifdef __GNUC__
-};
-short int int_list62208[] = {
-#else
-,
-#endif
-97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,
-97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,
-97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,
-97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,
-97
-#ifdef __GNUC__
-};
-short int int_list62272[] = {
-#else
-,
-#endif
-97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,
-97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,
-97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,
-97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,
-117
-#ifdef __GNUC__
-};
-short int int_list62336[] = {
-#else
-,
-#endif
-117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,
-117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,
-117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,
-117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,
-117
-#ifdef __GNUC__
-};
-short int int_list62400[] = {
-#else
-,
-#endif
-117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,
-117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,
-117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,
-117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,
-97
-#ifdef __GNUC__
-};
-short int int_list62464[] = {
-#else
-,
-#endif
-97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,
-97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,
-97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,
-97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,
-97
-#ifdef __GNUC__
-};
-short int int_list62528[] = {
-#else
-,
-#endif
-97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,
-97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,
-97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,
-97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,
-117
-#ifdef __GNUC__
-};
-short int int_list62592[] = {
-#else
-,
-#endif
-117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,
-117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,
-117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,
-117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,
-117
-#ifdef __GNUC__
-};
-short int int_list62656[] = {
-#else
-,
-#endif
-117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,
-117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,
-117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,
-117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,
-97
-#ifdef __GNUC__
-};
-short int int_list62720[] = {
-#else
-,
-#endif
-97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,
-97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,
-97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,
-97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,
-97
-#ifdef __GNUC__
-};
-short int int_list62784[] = {
-#else
-,
-#endif
-97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,
-97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,
-97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,
-97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,
-117
-#ifdef __GNUC__
-};
-short int int_list62848[] = {
-#else
-,
-#endif
-117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,
-117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,
-117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,
-117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,
-117
-#ifdef __GNUC__
-};
-short int int_list62912[] = {
-#else
-,
-#endif
-117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,
-117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,
-117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,
-117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,
-97
-#ifdef __GNUC__
-};
-short int int_list62976[] = {
-#else
-,
-#endif
-97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,
-97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,
-97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,
-97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,
-97
-#ifdef __GNUC__
-};
-short int int_list63040[] = {
-#else
-,
-#endif
-97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,
-97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,
-97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,
-97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,
-117
-#ifdef __GNUC__
-};
-short int int_list63104[] = {
-#else
-,
-#endif
-117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,
-117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,
-117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,
-117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,
-117
-#ifdef __GNUC__
-};
-short int int_list63168[] = {
-#else
-,
-#endif
-117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,
-117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,
-117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,
-117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,
-97
-#ifdef __GNUC__
-};
-short int int_list63232[] = {
-#else
-,
-#endif
-97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,
-97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,
-97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,
-97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,
-97
-#ifdef __GNUC__
-};
-short int int_list63296[] = {
-#else
-,
-#endif
-97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,
-97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,
-97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,
-97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,
-117
-#ifdef __GNUC__
-};
-short int int_list63360[] = {
-#else
-,
-#endif
-117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,
-117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,
-117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,
-117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,
-117
-#ifdef __GNUC__
-};
-short int int_list63424[] = {
-#else
-,
-#endif
-117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,
-117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,
-117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,
-117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,
-97
-#ifdef __GNUC__
-};
-short int int_list63488[] = {
-#else
-,
-#endif
-97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,
-97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,
-97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,
-97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,
-97
-#ifdef __GNUC__
-};
-short int int_list63552[] = {
-#else
-,
-#endif
-97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,
-97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,
-97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,
-97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,
-117
-#ifdef __GNUC__
-};
-short int int_list63616[] = {
-#else
-,
-#endif
-117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,
-117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,
-117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,
-117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,
-117
-#ifdef __GNUC__
-};
-short int int_list63680[] = {
-#else
-,
-#endif
-117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,
-117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,
-117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,
-117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,
-97
-#ifdef __GNUC__
-};
-short int int_list63744[] = {
-#else
-,
-#endif
-97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,
-97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,
-97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,
-97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,
-97
-#ifdef __GNUC__
-};
-short int int_list63808[] = {
-#else
-,
-#endif
-97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,
-97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,
-97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,
-97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,
-117
-#ifdef __GNUC__
-};
-short int int_list63872[] = {
-#else
-,
-#endif
-117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,
-117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,
-117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,
-117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,
-117
-#ifdef __GNUC__
-};
-short int int_list63936[] = {
-#else
-,
-#endif
-117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,
-117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,
-117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,
-117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,
-97
-#ifdef __GNUC__
-};
-short int int_list64000[] = {
-#else
-,
-#endif
-97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,
-97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,
-97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,
-97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,
-97
-#ifdef __GNUC__
-};
-short int int_list64064[] = {
-#else
-,
-#endif
-97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,
-97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,
-97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,
-97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,
-117
-#ifdef __GNUC__
-};
-short int int_list64128[] = {
-#else
-,
-#endif
-117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,
-117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,
-117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,
-117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,
-117
-#ifdef __GNUC__
-};
-short int int_list64192[] = {
-#else
-,
-#endif
-117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,
-117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,
-117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,
-117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,
-97
-#ifdef __GNUC__
-};
-short int int_list64256[] = {
-#else
-,
-#endif
-97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,
-97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,
-97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,
-97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,
-97
-#ifdef __GNUC__
-};
-short int int_list64320[] = {
-#else
-,
-#endif
-97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,
-97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,
-97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,
-97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,
-117
-#ifdef __GNUC__
-};
-short int int_list64384[] = {
-#else
-,
-#endif
-117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,
-117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,
-117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,
-117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,
-117
-#ifdef __GNUC__
-};
-short int int_list64448[] = {
-#else
-,
-#endif
-117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,
-117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,
-117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,
-117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,
-97
-#ifdef __GNUC__
-};
-short int int_list64512[] = {
-#else
-,
-#endif
-97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,
-97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,
-97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,
-97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,
-97
-#ifdef __GNUC__
-};
-short int int_list64576[] = {
-#else
-,
-#endif
-97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,
-97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,
-97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,
-97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,
-117
-#ifdef __GNUC__
-};
-short int int_list64640[] = {
-#else
-,
-#endif
-117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,
-117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,
-117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,
-117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,
-117
-#ifdef __GNUC__
-};
-short int int_list64704[] = {
-#else
-,
-#endif
-117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,
-117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,
-117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,
-117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,
-97
-#ifdef __GNUC__
-};
-short int int_list64768[] = {
-#else
-,
-#endif
-97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,
-97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,
-97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,
-97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,
-97
-#ifdef __GNUC__
-};
-short int int_list64832[] = {
-#else
-,
-#endif
-97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,
-97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,
-97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,
-97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,
-117
-#ifdef __GNUC__
-};
-short int int_list64896[] = {
-#else
-,
-#endif
-117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,
-117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,
-117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,
-117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,
-117
-#ifdef __GNUC__
-};
-short int int_list64960[] = {
-#else
-,
-#endif
-117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,
-117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,
-117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,
-117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,
-97
-#ifdef __GNUC__
-};
-short int int_list65024[] = {
-#else
-,
-#endif
-97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,
-97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,
-97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,
-97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,
-97
-#ifdef __GNUC__
-};
-short int int_list65088[] = {
-#else
-,
-#endif
-97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,
-97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,
-97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,
-97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,
-117
-#ifdef __GNUC__
-};
-short int int_list65152[] = {
-#else
-,
-#endif
-117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,
-117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,
-117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,
-117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,
-117
-#ifdef __GNUC__
-};
-short int int_list65216[] = {
-#else
-,
-#endif
-117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,
-117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,
-117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,
-117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,
-97
-#ifdef __GNUC__
-};
-short int int_list65280[] = {
-#else
-,
-#endif
-97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,
-97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,
-97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,
-97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,
-97
-#ifdef __GNUC__
-};
-short int int_list65344[] = {
-#else
-,
-#endif
-97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,
-97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,
-97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,
-97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,97,
-117
-#ifdef __GNUC__
-};
-short int int_list65408[] = {
-#else
-,
-#endif
-117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,
-117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,
-117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,
-117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,
-117
-#ifdef __GNUC__
-};
-short int int_list65472[] = {
-#else
-,
-#endif
-117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,
-117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,
-117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,
-117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,117};
diff --git a/sim/z8k/mem.c b/sim/z8k/mem.c
deleted file mode 100644
index 6942a668fb0..00000000000
--- a/sim/z8k/mem.c
+++ /dev/null
@@ -1,126 +0,0 @@
-/* memory support for Z8KSIM
- Copyright (C) 1987, 1992 Free Software Foundation, Inc.
-
-This file is part of Z8KSIM
-
-Z8KSIM is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-Z8KSIM is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License
-along with Z8KZIM; if not, write to the Free Software
-Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
-
-#include "config.h"
-
-#include <ansidecl.h>
-
-#ifdef HAVE_STDLIB_H
-#include <stdlib.h>
-#endif
-
-#include "tm.h"
-#include "mem.h"
-#include "sim.h"
-
-#define INLINE
-static
-long
-sitoptr (si)
-long si;
-{
- return ((si & 0xff000000) >> 8) | (si & 0xffff);
-}
-
-static
-unsigned short *
-get_page_and_offset (context, where, offset_ptr)
- sim_state_type *context;
- sim_phys_addr_type where;
- int *offset_ptr;
-{
- /* Is the page allocated ? */
-
- if (context->memory == 0)
- {
- /* Must allocate 16MB in order to run Z8001 programs. */
- context->memory = (unsigned short *)calloc(64*1024*64,4);
- }
-
- *offset_ptr = sitoptr(where);
- return context->memory;
-}
-
-void
-sim_write_byte (context, where, what)
- sim_state_type *context;
- sim_phys_addr_type where;
- int what;
-{
- unsigned int offset;
- char *ptr = (char *)get_page_and_offset (context, where, &offset);
-
- ptr[offset] = what;
-}
-
-void
-sim_write_short (context, where, what)
- sim_state_type *context;
- sim_phys_addr_type where;
- int what;
-{
- int offset;
- char *ptr = (char *)get_page_and_offset (context, where, &offset);
-
- ptr[offset] = what >> 8;
- ptr[offset + 1] = what;
-}
-
-void
-sim_write_long (context, where, what)
- sim_state_type *context;
- sim_phys_addr_type where;
- int what;
-{
- int offset;
- char *ptr = (char *)get_page_and_offset (context, where, &offset);
-
- ptr[offset] = what >> 24;
- ptr[offset + 1] = what >> 16;
- ptr[offset + 3] = what >> 8;
- ptr[offset + 4] = what;
-}
-
-int
-sim_read_byte (context, where)
- sim_state_type *context;
- sim_phys_addr_type where;
-{
- int offset;
- char *ptr = (char *)get_page_and_offset (context, where, &offset);
-
- return ptr[offset];
-}
-
-unsigned
-sim_read_short (context, where)
- sim_state_type *context;
- sim_phys_addr_type where;
-{
- int what;
- int offset;
-
- char *ptr = (char *)get_page_and_offset (context, where, &offset);
-
- what = (ptr[offset] << 8) | ptr[offset + 1];
- return what;
-}
-
-
-
diff --git a/sim/z8k/mem.h b/sim/z8k/mem.h
deleted file mode 100644
index 2089bd409e8..00000000000
--- a/sim/z8k/mem.h
+++ /dev/null
@@ -1,8 +0,0 @@
-#define Z8k_PAGE_SIZE (1<<PAGE_POWER)
-
-int sim_read_byte PARAMS((sim_state_type *, sim_phys_addr_type));
-unsigned int sim_read_short PARAMS((sim_state_type *, sim_phys_addr_type));
-void sim_write_long PARAMS((sim_state_type *, sim_phys_addr_type,
- int));
-void sim_write_short PARAMS((sim_state_type *, sim_phys_addr_type, int));
-void sim_write_byte PARAMS((sim_state_type *, sim_phys_addr_type, int));
diff --git a/sim/z8k/quick.c b/sim/z8k/quick.c
deleted file mode 100644
index e847c7d22df..00000000000
--- a/sim/z8k/quick.c
+++ /dev/null
@@ -1,783 +0,0 @@
-/* list of opcodes to compile all the way */
-int quick[]=
-{
-#if 0
- /* 110000*/ 0xc,
- /* 35*/ 0x104,
- /* 4*/ 0x105,
- /* 3*/ 0x107,
- /* 20*/ 0x10d,
- /* 2*/ 0x1dc,
- /* 69*/ 0x20f,
- /* 1*/ 0x40d,
- /* 40*/ 0x501,
- /* 7*/ 0x504,
- /* 7*/ 0x505,
- /* 6*/ 0x508,
- /* 6*/ 0x509,
- /* 8*/ 0x609,
- /* 118*/ 0x60c,
- /* 2*/ 0x702,
- /* 85*/ 0x704,
- /* 88*/ 0x705,
- /* 3*/ 0x707,
- /* 5*/ 0x708,
- /* 4*/ 0x709,
- /* 110000*/ 0xa08,
- /* 101571*/ 0xa09,
- /* 110000*/ 0xa0c,
- /* 100000*/ 0xa0f,
- /* 300000*/ 0xa6d,
- /* 101681*/ 0xb02,
- /* 100077*/ 0xb04,
- /* 8*/ 0xb05,
- /* 110000*/ 0xb07,
- /* 10005*/ 0xb08,
- /* 140000*/ 0xb0a,
- /* 100036*/ 0xb0c,
- /* 100042*/ 0xb0d,
- /* 3*/ 0xc25,
- /* 105158*/ 0xc58,
- /* 300236*/ 0xc74,
- /* 20*/ 0xd41,
- /* 100008*/ 0xd45,
- /* 10*/ 0xd51,
- /* 10*/ 0xd54,
- /* 110000*/ 0xdc5,
- /* 100000*/ 0xdd5,
- /* 79*/ 0xdf9,
- /* 6*/ 0x1004,
- /* 53*/ 0x1008,
- /* 5*/ 0x13f4,
- /* 1*/ 0x1402,
- /* 2*/ 0x1404,
- /* 2*/ 0x1406,
- /* 7*/ 0x1408,
- /* 4*/ 0x1606,
- /* 72*/ 0x1e48,
- /* 6*/ 0x1f40,
- /* 100006*/ 0x205e,
- /* 2*/ 0x2068,
- /* 110000*/ 0x206c,
- /* 110000*/ 0x207c,
- /* 300000*/ 0x207d,
- /* 101642*/ 0x2088,
- /* 101539*/ 0x2089,
- /* 101679*/ 0x208c,
- /* 40*/ 0x209c,
- /* 8*/ 0x2102,
- /* 120009*/ 0x2104,
- /* 110003*/ 0x2105,
- /* 130000*/ 0x2106,
- /* 110068*/ 0x2107,
- /* 32*/ 0x2108,
- /* 1*/ 0x2109,
- /* 105*/ 0x210c,
- /* 1*/ 0x210d,
- /* 3*/ 0x2126,
- /* 3*/ 0x2142,
- /* 120002*/ 0x2144,
- /* 100012*/ 0x2145,
- /* 10000*/ 0x2147,
- /* 100000*/ 0x2148,
- /* 6*/ 0x2156,
- /* 100000*/ 0x2157,
- /* 100000*/ 0x2158,
- /* 101677*/ 0x2165,
- /* 100000*/ 0x2168,
- /* 110000*/ 0x2174,
- /* 2*/ 0x2190,
- /* 2*/ 0x2198,
- /* 2*/ 0x21c4,
- /* 2*/ 0x21c5,
- /* 110000*/ 0x21c8,
- /* 110000*/ 0x21ca,
- /* 2*/ 0x21cd,
- /* 100002*/ 0x21d7,
- /* 100000*/ 0x21dc,
- /* 101677*/ 0x2960,
- /* 2*/ 0x29c0,
- /* 4*/ 0x2e48,
- /* 101677*/ 0x2e5c,
- /* 100000*/ 0x2e7c,
- /* 31*/ 0x2f24,
- /* 1*/ 0x2f28,
- /* 100000*/ 0x2f45,
- /* 3*/ 0x2f46,
- /* 100000*/ 0x2f47,
- /* 100000*/ 0x2f48,
- /* 100000*/ 0x2f54,
- /* 130000*/ 0x2f56,
- /* 100000*/ 0x2f58,
- /* 10000*/ 0x2f64,
- /* 100000*/ 0x2f65,
- /* 100000*/ 0x2f72,
- /* 110000*/ 0x2f74,
- /* 10000*/ 0x2f78,
- /* 110000*/ 0x2fa4,
- /* 110000*/ 0x2fa8,
- /* 1*/ 0x2fc2,
- /* 100000*/ 0x2fc4,
- /* 100000*/ 0x2fc7,
- /* 2*/ 0x2fc8,
- /* 110000*/ 0x2fca,
- /* 100002*/ 0x2fdc,
- /* 77*/ 0x3144,
- /* 3*/ 0x3146,
- /* 2*/ 0x3342,
- /* 3*/ 0x3346,
- /* 100000*/ 0x3445,
- /* 2*/ 0x3454,
- /* 100000*/ 0x3456,
- /* 10000*/ 0x3458,
- /* 6*/ 0x3459,
- /* 100000*/ 0x3464,
- /* 100000*/ 0x3468,
- /* 10000*/ 0x3485,
- /* 100000*/ 0x3486,
- /* 1*/ 0x34a0,
- /* 110026*/ 0x34a4,
- /* 110069*/ 0x34a5,
- /* 110014*/ 0x34a6,
- /* 20038*/ 0x34a7,
- /* 1*/ 0x34a9,
- /* 1*/ 0x34ad,
- /* 100000*/ 0x34c4,
- /* 100000*/ 0x34c5,
- /* 2*/ 0x34d4,
- /* 100000*/ 0x34f5,
- /* 100000*/ 0x34f7,
- /* 4*/ 0x4102,
- /* 4*/ 0x4104,
- /* 1*/ 0x4169,
- /* 110000*/ 0x41a4,
- /* 100000*/ 0x41a5,
- /* 100000*/ 0x41a6,
- /* 100000*/ 0x41a8,
- /* 100000*/ 0x41f4,
- /* 100000*/ 0x4302,
- /* 100000*/ 0x4305,
- /* 110000*/ 0x4308,
- /* 1*/ 0x4369,
- /* 1*/ 0x43a4,
- /* 100000*/ 0x43a5,
- /* 100000*/ 0x43a8,
- /* 100000*/ 0x43a9,
- /* 120000*/ 0x43ac,
- /* 2*/ 0x43c5,
- /* 100000*/ 0x43f5,
- /* 100000*/ 0x43fa,
- /* 110000*/ 0x4504,
- /* 4*/ 0x45a1,
- /* 18*/ 0x45a4,
- /* 100018*/ 0x45a5,
- /* 1*/ 0x4968,
- /* 130000*/ 0x4a08,
- /* 100000*/ 0x4a0b,
- /* 100000*/ 0x4aac,
- /* 3*/ 0x4b68,
- /* 100000*/ 0x4ba8,
- /* 100000*/ 0x4ba9,
- /* 4*/ 0x4bc5,
- /* 110000*/ 0x4c01,
- /* 120000*/ 0x4c05,
- /* 32*/ 0x4c78,
- /* 100000*/ 0x4ca1,
- /* 100000*/ 0x4ca5,
- /* 1*/ 0x4cc4,
- /* 20*/ 0x4cd4,
- /* 110007*/ 0x4d04,
- /* 110004*/ 0x4d05,
- /* 110000*/ 0x4d08,
- /* 2*/ 0x4d25,
- /* 1*/ 0x4d28,
- /* 8*/ 0x4d41,
- /* 100000*/ 0x4d44,
- /* 100000*/ 0x4d45,
- /* 101679*/ 0x4d64,
- /* 100034*/ 0x4da1,
- /* 110005*/ 0x4da4,
- /* 140014*/ 0x4da5,
- /* 100001*/ 0x4da8,
- /* 100003*/ 0x4dc4,
- /* 110000*/ 0x4dc5,
- /* 2*/ 0x4dd4,
- /* 100000*/ 0x4dd5,
- /* 100000*/ 0x4df5,
- /* 3*/ 0x4e2d,
- /* 30000*/ 0x4ea8,
- /* 52*/ 0x4ea9,
- /* 100000*/ 0x4eab,
- /* 100000*/ 0x4eac,
- /* 32*/ 0x4ead,
- /* 100000*/ 0x4eae,
- /* 100000*/ 0x4eaf,
- /* 2*/ 0x4ec8,
- /* 2*/ 0x4ecd,
- /* 3*/ 0x50a6,
- /* 32*/ 0x50a8,
- /* 1*/ 0x520c,
- /* 18*/ 0x52a8,
- /* 2*/ 0x53f0,
- /* 6*/ 0x53f4,
- /* 3*/ 0x53fa,
- /* 1*/ 0x5406,
- /* 8*/ 0x5448,
- /* 4*/ 0x54a2,
- /* 42*/ 0x54a4,
- /* 10*/ 0x54a6,
- /* 322*/ 0x54a8,
- /* 3*/ 0x56a4,
- /* 3*/ 0x56a6,
- /* 110000*/ 0x59a4,
- /* 100000*/ 0x59f4,
- /* 4*/ 0x5d02,
- /* 1*/ 0x5d0c,
- /* 2*/ 0x5d48,
- /* 33*/ 0x5da4,
- /* 48*/ 0x5da6,
- /* 213*/ 0x5da8,
- /* 32*/ 0x5e01,
- /* 110005*/ 0x5e02,
- /* 100005*/ 0x5e03,
- /* 101728*/ 0x5e06,
- /* 31*/ 0x5e07,
- /* 100266*/ 0x5e08,
- /* 100006*/ 0x5e09,
- /* 100033*/ 0x5e0a,
- /* 100080*/ 0x5e0b,
- /* 100030*/ 0x5e0e,
- /* 1*/ 0x5e0f,
- /* 262032*/ 0x5f00,
- /* 110000*/ 0x6008,
- /* 100000*/ 0x6009,
- /* 2*/ 0x600c,
- /* 110000*/ 0x604c,
- /* 4*/ 0x604d,
- /* 6*/ 0x606f,
- /* 36*/ 0x6089,
- /* 140064*/ 0x60a8,
- /* 48*/ 0x60a9,
- /* 100096*/ 0x60ac,
- /* 100000*/ 0x60ad,
- /* 2*/ 0x60c8,
- /* 19*/ 0x60cc,
- /* 2*/ 0x60cd,
- /* 8*/ 0x60dc,
- /* 120009*/ 0x6104,
- /* 120032*/ 0x6105,
- /* 110001*/ 0x6106,
- /* 110000*/ 0x6107,
- /* 2*/ 0x6108,
- /* 1*/ 0x6109,
- /* 1*/ 0x610d,
- /* 1*/ 0x610f,
- /* 4*/ 0x6145,
- /* 100000*/ 0x6147,
- /* 2*/ 0x614c,
- /* 2*/ 0x614d,
- /* 100000*/ 0x6157,
- /* 100002*/ 0x6158,
- /* 3*/ 0x6159,
- /* 6*/ 0x6165,
- /* 12*/ 0x6168,
- /* 32*/ 0x6181,
- /* 4*/ 0x6191,
- /* 2*/ 0x6194,
- /* 2*/ 0x6198,
- /* 68*/ 0x61a0,
- /* 101682*/ 0x61a1,
- /* 110066*/ 0x61a2,
- /* 100040*/ 0x61a3,
- /* 120232*/ 0x61a4,
- /* 110172*/ 0x61a5,
- /* 101800*/ 0x61a6,
- /* 110119*/ 0x61a7,
- /* 143923*/ 0x61a8,
- /* 110098*/ 0x61a9,
- /* 44*/ 0x61ac,
- /* 4*/ 0x61c0,
- /* 2*/ 0x61c4,
- /* 1*/ 0x61c5,
- /* 110002*/ 0x61c7,
- /* 3*/ 0x61c8,
- /* 100000*/ 0x61d4,
- /* 2*/ 0x61d8,
- /* 2*/ 0x61dc,
- /* 100000*/ 0x61f3,
- /* 100000*/ 0x61f4,
- /* 100000*/ 0x61f5,
- /* 100000*/ 0x61f7,
- /* 100000*/ 0x61fb,
- /* 100000*/ 0x68a0,
- /* 110000*/ 0x6940,
- /* 110032*/ 0x69a0,
- /* 100000*/ 0x69f0,
- /* 2*/ 0x6b40,
- /* 101679*/ 0x6b60,
- /* 100044*/ 0x6ba0,
- /* 2*/ 0x6bc0,
- /* 6*/ 0x6f02,
- /* 120000*/ 0x6f04,
- /* 100002*/ 0x6f05,
- /* 7*/ 0x6f45,
- /* 110000*/ 0x6f47,
- /* 100007*/ 0x6f48,
- /* 15*/ 0x6f49,
- /* 100000*/ 0x6f4b,
- /* 100000*/ 0x6f54,
- /* 100000*/ 0x6f58,
- /* 10000*/ 0x6f64,
- /* 10000*/ 0x6f68,
- /* 2*/ 0x6f94,
- /* 145*/ 0x6fa0,
- /* 101714*/ 0x6fa1,
- /* 94*/ 0x6fa2,
- /* 120060*/ 0x6fa4,
- /* 100109*/ 0x6fa5,
- /* 100123*/ 0x6fa6,
- /* 100157*/ 0x6fa7,
- /* 111842*/ 0x6fa8,
- /* 100091*/ 0x6fa9,
- /* 4*/ 0x6fc0,
- /* 1*/ 0x6fc2,
- /* 1*/ 0x6fc5,
- /* 1*/ 0x6fcd,
- /* 2*/ 0x6fd8,
- /* 100000*/ 0x6ff4,
- /* 56*/ 0x705c,
- /* 100000*/ 0x706d,
- /* 100000*/ 0x7078,
- /* 100000*/ 0x708d,
- /* 100000*/ 0x708e,
- /* 100000*/ 0x709e,
- /* 110000*/ 0x70dd,
- /* 110000*/ 0x7157,
- /* 100000*/ 0x715b,
- /* 56*/ 0x727c,
- /* 120000*/ 0x7348,
- /* 31*/ 0x7424,
- /* 100000*/ 0x7446,
- /* 100000*/ 0x7447,
- /* 10000*/ 0x7449,
- /* 120000*/ 0x7454,
- /* 2*/ 0x7468,
- /* 32*/ 0x7472,
- /* 110000*/ 0x74a4,
- /* 100000*/ 0x74b4,
- /* 100000*/ 0x74b5,
- /* 10*/ 0x74c2,
- /* 100000*/ 0x74c4,
- /* 32*/ 0x74d4,
- /* 1*/ 0x7f01,
- /* 2*/ 0x7f04,
- /* 2*/ 0x7f13,
- /* 1*/ 0x7f16,
- /* 2*/ 0x7f17,
- /* 2*/ 0x8128,
- /* 190091*/ 0x8144,
- /* 100000*/ 0x8145,
- /* 100000*/ 0x8154,
- /* 110000*/ 0x8155,
- /* 100000*/ 0x8156,
- /* 100000*/ 0x8164,
- /* 100000*/ 0x8165,
- /* 110000*/ 0x8166,
- /* 100000*/ 0x8167,
- /* 140000*/ 0x8176,
- /* 100000*/ 0x8177,
- /* 130000*/ 0x8184,
- /* 40*/ 0x818c,
- /* 100000*/ 0x8194,
- /* 110000*/ 0x81b4,
- /* 100000*/ 0x81bb,
- /* 2*/ 0x81c9,
- /* 36*/ 0x81d0,
- /* 4*/ 0x81d1,
- /* 40*/ 0x81dc,
- /* 111677*/ 0x8222,
- /* 110076*/ 0x8244,
- /* 100038*/ 0x8255,
- /* 110006*/ 0x8266,
- /* 131679*/ 0x8277,
- /* 107*/ 0x8300,
- /* 131*/ 0x8311,
- /* 140015*/ 0x8322,
- /* 2*/ 0x832d,
- /* 110056*/ 0x8342,
- /* 100019*/ 0x8344,
- /* 100000*/ 0x8352,
- /* 100000*/ 0x8354,
- /* 110003*/ 0x8355,
- /* 100001*/ 0x8366,
- /* 6*/ 0x8377,
- /* 71*/ 0x8388,
- /* 2*/ 0x838d,
- /* 34*/ 0x8399,
- /* 100000*/ 0x83a4,
- /* 120002*/ 0x83c4,
- /* 4*/ 0x83c8,
- /* 113*/ 0x83cc,
- /* 2*/ 0x83d4,
- /* 4*/ 0x84c9,
- /* 4*/ 0x84d9,
- /* 3*/ 0x8524,
- /* 4*/ 0x8559,
- /* 100000*/ 0x8adc,
- /* 10000*/ 0x8ae8,
- /* 100000*/ 0x8ae9,
- /* 130000*/ 0x8aef,
- /* 100000*/ 0x8af8,
- /* 2*/ 0x8b26,
- /* 20000*/ 0x8b28,
- /* 1*/ 0x8b45,
- /* 100000*/ 0x8b48,
- /* 32*/ 0x8b49,
- /* 20000*/ 0x8b56,
- /* 10000*/ 0x8b58,
- /* 100000*/ 0x8b59,
- /* 105158*/ 0x8b65,
- /* 100000*/ 0x8b68,
- /* 2*/ 0x8b75,
- /* 2*/ 0x8b82,
- /* 260*/ 0x8b8c,
- /* 100000*/ 0x8ba3,
- /* 100000*/ 0x8bab,
- /* 100000*/ 0x8bc2,
- /* 100000*/ 0x8bc3,
- /* 10000*/ 0x8bc8,
- /* 10002*/ 0x8bc9,
- /* 2*/ 0x8bd5,
- /* 4*/ 0x8bd9,
- /* 32*/ 0x8bdc,
- /* 101674*/ 0x8c84,
- /* 100063*/ 0x8cc4,
- /* 1*/ 0x8ce2,
- /* 100000*/ 0x8ce4,
- /* 32*/ 0x8d04,
- /* 107*/ 0x8d14,
- /* 140019*/ 0x8d24,
- /* 20*/ 0x8d28,
- /* 100040*/ 0x8d44,
- /* 120003*/ 0x8d48,
- /* 110013*/ 0x8d54,
- /* 2*/ 0x8d58,
- /* 2*/ 0x8d62,
- /* 100088*/ 0x8d64,
- /* 218*/ 0x8d84,
- /* 91*/ 0x8dc4,
- /* 85*/ 0x8dd4,
- /* 110127*/ 0x91fc,
- /* 1*/ 0x93f0,
- /* 36*/ 0x93f1,
- /* 3*/ 0x93f4,
- /* 1*/ 0x93f8,
- /* 6*/ 0x93f9,
- /* 142037*/ 0x93fa,
- /* 120015*/ 0x93fc,
- /* 100000*/ 0x9420,
- /* 4*/ 0x9426,
- /* 1*/ 0x942c,
- /* 42*/ 0x9446,
- /* 1*/ 0x9462,
- /* 3*/ 0x9464,
- /* 1*/ 0x94c4,
- /* 1*/ 0x94c6,
- /* 110126*/ 0x95fc,
- /* 3*/ 0x9646,
- /* 32*/ 0x9666,
- /* 110*/ 0x9688,
- /* 142033*/ 0x97fa,
- /* 120014*/ 0x97fc,
- /* 1*/ 0x9a40,
- /* 110112*/ 0x9b20,
- /* 100000*/ 0x9b40,
- /* 64*/ 0x9c48,
- /* 38*/ 0x9c88,
- /* 100000*/ 0x9e06,
- /* 262035*/ 0x9e08,
- /* 110000*/ 0x9e0e,
- /* 100002*/ 0xa08c,
- /* 32*/ 0xa08d,
- /* 20000*/ 0xa08f,
- /* 8*/ 0xa0ac,
- /* 111681*/ 0xa0ca,
- /* 100000*/ 0xa0cd,
- /* 110001*/ 0xa0ce,
- /* 101684*/ 0xa0cf,
- /* 100032*/ 0xa0dc,
- /* 110000*/ 0xa0df,
- /* 100000*/ 0xa0ec,
- /* 100006*/ 0xa0ed,
- /* 101677*/ 0xa0fc,
- /* 6*/ 0xa0fe,
- /* 100056*/ 0xa104,
- /* 100000*/ 0xa105,
- /* 100000*/ 0xa108,
- /* 110000*/ 0xa114,
- /* 100000*/ 0xa115,
- /* 56*/ 0xa116,
- /* 100032*/ 0xa124,
- /* 76*/ 0xa12d,
- /* 1*/ 0xa134,
- /* 40*/ 0xa13d,
- /* 100000*/ 0xa141,
- /* 100041*/ 0xa142,
- /* 1*/ 0xa143,
- /* 1*/ 0xa144,
- /* 110009*/ 0xa145,
- /* 100007*/ 0xa146,
- /* 100008*/ 0xa147,
- /* 110000*/ 0xa148,
- /* 100000*/ 0xa149,
- /* 100000*/ 0xa14a,
- /* 100000*/ 0xa14b,
- /* 110000*/ 0xa14c,
- /* 100002*/ 0xa14d,
- /* 100000*/ 0xa150,
- /* 100004*/ 0xa154,
- /* 100000*/ 0xa156,
- /* 100006*/ 0xa157,
- /* 100000*/ 0xa158,
- /* 100000*/ 0xa159,
- /* 100000*/ 0xa15a,
- /* 110000*/ 0xa15c,
- /* 100002*/ 0xa15d,
- /* 112*/ 0xa161,
- /* 120006*/ 0xa164,
- /* 100006*/ 0xa165,
- /* 100000*/ 0xa167,
- /* 6*/ 0xa168,
- /* 10000*/ 0xa16b,
- /* 120012*/ 0xa16c,
- /* 100062*/ 0xa172,
- /* 60*/ 0xa174,
- /* 100000*/ 0xa175,
- /* 100000*/ 0xa176,
- /* 6*/ 0xa179,
- /* 110000*/ 0xa17a,
- /* 110008*/ 0xa17c,
- /* 110014*/ 0xa17d,
- /* 110000*/ 0xa184,
- /* 110000*/ 0xa185,
- /* 20000*/ 0xa186,
- /* 100004*/ 0xa189,
- /* 100000*/ 0xa18b,
- /* 4*/ 0xa191,
- /* 56*/ 0xa192,
- /* 100000*/ 0xa1a1,
- /* 100000*/ 0xa1a5,
- /* 110000*/ 0xa1a6,
- /* 110000*/ 0xa1a7,
- /* 112033*/ 0xa1af,
- /* 10000*/ 0xa1c1,
- /* 100062*/ 0xa1c2,
- /* 110009*/ 0xa1c4,
- /* 110005*/ 0xa1c5,
- /* 120000*/ 0xa1c6,
- /* 15*/ 0xa1c7,
- /* 4*/ 0xa1d0,
- /* 2*/ 0xa1d2,
- /* 4*/ 0xa1d4,
- /* 100004*/ 0xa1d5,
- /* 120036*/ 0xa1d6,
- /* 110004*/ 0xa1d7,
- /* 112038*/ 0xa1fa,
- /* 20000*/ 0xa880,
- /* 101499*/ 0xa910,
- /* 3*/ 0xa921,
- /* 100002*/ 0xa940,
- /* 100000*/ 0xa941,
- /* 100000*/ 0xa943,
- /* 100000*/ 0xa945,
- /* 110000*/ 0xa949,
- /* 105160*/ 0xa950,
- /* 120000*/ 0xa955,
- /* 100000*/ 0xa959,
- /* 310005*/ 0xa960,
- /* 100000*/ 0xa965,
- /* 1*/ 0xa967,
- /* 290180*/ 0xa970,
- /* 130000*/ 0xa971,
- /* 3*/ 0xa974,
- /* 111751*/ 0xa980,
- /* 100036*/ 0xa981,
- /* 100000*/ 0xa984,
- /* 1*/ 0xa987,
- /* 100040*/ 0xa990,
- /* 5*/ 0xa991,
- /* 2*/ 0xa993,
- /* 1*/ 0xa997,
- /* 110000*/ 0xa9a0,
- /* 100194*/ 0xa9c0,
- /* 100000*/ 0xa9d0,
- /* 63*/ 0xa9f1,
- /* 40*/ 0xa9f3,
- /* 110000*/ 0xab40,
- /* 100004*/ 0xab50,
- /* 56*/ 0xab80,
- /* 55*/ 0xabc0,
- /* 100069*/ 0xabf1,
- /* 100000*/ 0xabf3,
- /* 100001*/ 0xabf5,
- /* 100006*/ 0xabf7,
- /* 50*/ 0xabf9,
- /* 100014*/ 0xabfb,
- /* 2*/ 0xabfd,
- /* 2*/ 0xabff,
- /* 20*/ 0xaf26,
- /* 120000*/ 0xaf46,
- /* 3*/ 0xaf47,
- /* 1*/ 0xaf56,
- /* 1*/ 0xaf5e,
- /* 1*/ 0xb107,
- /* 110112*/ 0xb10a,
- /* 4*/ 0xb120,
- /* 100001*/ 0xb12a,
- /* 3*/ 0xb14a,
- /* 5*/ 0xb170,
- /* 1*/ 0xb18a,
- /* 4*/ 0xb2d1,
- /* 6*/ 0xb2e1,
- /* 2*/ 0xb345,
- /* 1*/ 0xb347,
- /* 130000*/ 0xb349,
- /* 4*/ 0xb359,
- /* 2*/ 0xb35b,
- /* 100006*/ 0xb369,
- /* 6*/ 0xb36d,
- /* 100017*/ 0xb379,
- /* 2*/ 0xb37b,
- /* 67*/ 0xb385,
- /* 2*/ 0xb3cb,
- /* 120002*/ 0xba51,
- /* 110000*/ 0xbd21,
- /* 2*/ 0xbd32,
- /* 100000*/ 0xbd41,
- /* 100000*/ 0xbd4a,
- /* 2*/ 0xbd51,
- /* 100000*/ 0xbd5a,
- /* 2*/ 0xbd5b,
- /* 4*/ 0xbd61,
- /* 110000*/ 0xbd6a,
- /* 2*/ 0xbd71,
- /* 110000*/ 0xbd7a,
- /* 1*/ 0xbd91,
- /* 32*/ 0xbd9a,
- /* 110000*/ 0xbda2,
- /* 100000*/ 0xbda3,
- /* 34*/ 0xbdc1,
- /* 100000*/ 0xbdc2,
- /* 110000*/ 0xbdc3,
- /* 120000*/ 0xc841,
- /* 100000*/ 0xcb41,
- /* 110000*/ 0xcc41,
- /* 110000*/ 0xce41,
- /* 100000*/ 0xcf41,
- /* 2*/ 0xe106,
- /* 3*/ 0xe10a,
- /* 110000*/ 0xe1ea,
- /* 220*/ 0xe1ec,
- /* 40*/ 0xe1f2,
- /* 2*/ 0xe202,
- /* 40*/ 0xe203,
- /* 32*/ 0xe204,
- /* 2*/ 0xe2ea,
- /* 100000*/ 0xe2ec,
- /* 110000*/ 0xe2ee,
- /* 120000*/ 0xe2f9,
- /* 100000*/ 0xe2fb,
- /* 30000*/ 0xe3db,
- /* 7*/ 0xe602,
- /* 300128*/ 0xe603,
- /* 15*/ 0xe604,
- /* 110002*/ 0xe605,
- /* 32*/ 0xe606,
- /* 72*/ 0xe607,
- /* 3*/ 0xe608,
- /* 101624*/ 0xe609,
- /* 34*/ 0xe60a,
- /* 110002*/ 0xe60b,
- /* 100040*/ 0xe60c,
- /* 120000*/ 0xe60d,
- /* 1*/ 0xe60e,
- /* 1*/ 0xe60f,
- /* 3*/ 0xe610,
- /* 40*/ 0xe614,
- /* 2*/ 0xe616,
- /* 2*/ 0xe619,
- /* 30*/ 0xe622,
- /* 3*/ 0xe62c,
- /* 180*/ 0xe62d,
- /* 4*/ 0xe632,
- /* 2*/ 0xe639,
- /* 56*/ 0xe63a,
- /* 40*/ 0xe640,
- /* 2*/ 0xe6f2,
- /* 300000*/ 0xe6f9,
- /* 4*/ 0xe706,
- /* 105158*/ 0xe7fc,
- /* 100045*/ 0xe801,
- /* 121677*/ 0xe802,
- /* 110000*/ 0xe803,
- /* 110002*/ 0xe804,
- /* 110000*/ 0xe806,
- /* 42*/ 0xe808,
- /* 40*/ 0xe80a,
- /* 2*/ 0xe80e,
- /* 40*/ 0xe810,
- /* 103*/ 0xe815,
- /* 1*/ 0xe81b,
- /* 2*/ 0xe81c,
- /* 10000*/ 0xe820,
- /* 2*/ 0xe831,
- /* 2*/ 0xe83b,
- /* 34*/ 0xe901,
- /* 32*/ 0xe903,
- /* 1*/ 0xe906,
- /* 101679*/ 0xe908,
- /* 32*/ 0xe90f,
- /* 110000*/ 0xe916,
- /* 24*/ 0xe9ee,
- /* 22*/ 0xe9ef,
- /* 110000*/ 0xea02,
- /* 110000*/ 0xea03,
- /* 100000*/ 0xea11,
- /* 110000*/ 0xea13,
- /* 4*/ 0xeaee,
- /* 33*/ 0xeaf9,
- /* 110000*/ 0xeb01,
- /* 100000*/ 0xeb24,
- /* 100000*/ 0xeb26,
- /* 40*/ 0xebbf,
- /* 110000*/ 0xee01,
- /* 110002*/ 0xee02,
- /* 8*/ 0xee03,
- /* 130076*/ 0xee04,
- /* 6*/ 0xee05,
- /* 110002*/ 0xee06,
- /* 1*/ 0xee0b,
- /* 4*/ 0xee0e,
- /* 1*/ 0xee0f,
- /* 20000*/ 0xee11,
- /* 100000*/ 0xee14,
- /* 110000*/ 0xee15,
- /* 1*/ 0xee18,
- /* 1*/ 0xee27,
- /* 1*/ 0xee2d,
- /* 103*/ 0xee33,
- /* 2*/ 0xee3b,
- /* 1*/ 0xee42,
- /* 3*/ 0xeee1,
- /* 101539*/ 0xeee2,
- /* 110000*/ 0xeef4,
- /* 2*/ 0xeef9,
- /* 100000*/ 0xeefa,
- /* 14*/ 0xeefc,
- /* 180*/ 0xeefd,
- /* 2*/ 0xef02,
- /* 1*/ 0xef04,
- /* 2*/ 0xef11,
- /* 2*/ 0xef15,
-#endif
- 0,};
diff --git a/sim/z8k/sim.h b/sim/z8k/sim.h
deleted file mode 100644
index 65332f549dc..00000000000
--- a/sim/z8k/sim.h
+++ /dev/null
@@ -1,9 +0,0 @@
-#define SIM_SINGLE_STEP 1
-#define SIM_DONE 2
-#define SIM_BREAKPOINT 3
-#define SIM_INTERRUPT 4
-#define SIM_BAD_INST 5
-#define SIM_DIV_ZERO 6
-#define SIM_BAD_SYSCALL 7
-#define SIM_BAD_ALIGN 8
-#define SIM_BAD_ADDR 9
diff --git a/sim/z8k/support.c b/sim/z8k/support.c
deleted file mode 100644
index 73923640628..00000000000
--- a/sim/z8k/support.c
+++ /dev/null
@@ -1,784 +0,0 @@
-/* support routines for interpreted instructions
- Copyright (C) 1992, 1993 Free Software Foundation, Inc.
-
-This file is part of Z8KSIM
-
-Z8KSIM is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-Z8KSIM is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License
-along with Z8KZIM; if not, write to the Free Software
-Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
-
-#include "config.h"
-
-#include <ansidecl.h>
-#include <signal.h>
-#include <errno.h>
-
-#include "tm.h"
-#include "sim.h"
-#include "mem.h"
-#include <stdio.h>
-#ifdef HAVE_TIME_H
-#include <time.h>
-#endif
-#ifdef HAVE_SYS_TIMES_H
-#include <sys/times.h>
-#endif
-#include <sys/types.h>
-#include <sys/stat.h>
-#include <sys/param.h>
-#include "callback.h"
-#include "remote-sim.h"
-#include "syscall.h"
-
-static int get_now PARAMS ((void));
-static int now_persec PARAMS ((void));
-static int put_long PARAMS ((sim_state_type * context, int ptr, int value));
-static int put_short PARAMS ((sim_state_type * context, int ptr, int value));
-
-int sim_z8001_mode;
-
-static int
-get_now ()
-{
-#ifdef HAVE_SYS_TIMES_H
- struct tms b;
-
- times (&b);
- return b.tms_utime + b.tms_stime;
-#else
- return time (0);
-#endif
-}
-
-static int
-now_persec ()
-{
- return 50;
-}
-
-
-/* #define LOG /* define this to print instruction use counts */
-
-#ifdef __GNUC__
-#define INLINE __inline__
-#include "inlines.h"
-#else
-#include "inlines.h"
-#endif
-
-/* This holds the entire cpu context */
-static sim_state_type the_state;
-
-int
-fail (context, dummy)
- sim_state_type *context;
- int dummy;
-{
- context->exception = SIM_BAD_INST;
- return 1;
-}
-
-void
-sfop_bad1 (context)
- sim_state_type *context;
-{
- context->exception
- = SIM_BAD_INST;
-}
-
-void
-bfop_bad1 (context)
- sim_state_type *context;
-{
- context->exception
- = SIM_BAD_INST;
-}
-
-void
-fop_bad (context)
- sim_state_type *context;
-{
- context->exception =
- SIM_BAD_INST;
-}
-
-/* Table of bit counts for all byte values */
-
-char the_parity[256] =
-{
- 0, 1, 1, 2, 1, 2, 2, 3, 1, 2, 2, 3, 2, 3, 3, 4, 1, 2, 2, 3, 2, 3, 3,
- 4, 2, 3, 3, 4, 3, 4, 4, 5, 1, 2, 2, 3, 2, 3, 3, 4, 2, 3, 3, 4, 3, 4,
- 4, 5, 2, 3, 3, 4, 3, 4, 4, 5, 3, 4, 4, 5, 4, 5, 5, 6, 1, 2, 2, 3, 2,
- 3, 3, 4, 2, 3, 3, 4, 3, 4, 4, 5, 2, 3, 3, 4, 3, 4, 4, 5, 3, 4, 4, 5,
- 4, 5, 5, 6, 2, 3, 3, 4, 3, 4, 4, 5, 3, 4, 4, 5, 4, 5, 5, 6, 3, 4, 4,
- 5, 4, 5, 5, 6, 4, 5, 5, 6, 5, 6, 6, 7, 1, 2, 2, 3, 2, 3, 3, 4, 2, 3,
- 3, 4, 3, 4, 4, 5, 2, 3, 3, 4, 3, 4, 4, 5, 3, 4, 4, 5, 4, 5, 5, 6, 2,
- 3, 3, 4, 3, 4, 4, 5, 3, 4, 4, 5, 4, 5, 5, 6, 3, 4, 4, 5, 4, 5, 5, 6,
- 4, 5, 5, 6, 5, 6, 6, 7, 2, 3, 3, 4, 3, 4, 4, 5, 3, 4, 4, 5, 4, 5, 5,
- 6, 3, 4, 4, 5, 4, 5, 5, 6, 4, 5, 5, 6, 5, 6, 6, 7, 3, 4, 4, 5, 4, 5,
- 5, 6, 4, 5, 5, 6, 5, 6, 6, 7, 4, 5, 5, 6, 5, 6, 6, 7, 5, 6, 6, 7, 6,
- 7, 7, 8};
-
-
-int read ();
-int write ();
-int open ();
-int close ();
-int open ();
-int close ();
-
-int link ();
-int fstat ();
-
-static int
-put_short (context, ptr, value)
- sim_state_type *context;
- int ptr;
- int value;
-{
- put_word_mem_da (context, ptr, value);
- return ptr + 2;
-}
-
-static int
-put_long (context, ptr, value)
- sim_state_type *context;
- int
- ptr;
- int value;
-{
- put_long_mem_da (context, ptr, value);
- return ptr + 4;
-}
-
-#define aptr(x) ((sitoptr(x)) + (char *)(context->memory))
-
-static int args[3];
-static int arg_index; /* Translate a z8k system call into a host system call */
-void
-support_call (context, sc)
- sim_state_type *context;
- int sc;
-{
- extern int errno;
- int ret;
- int retnext = 0;
- int fd;
-
- int olderrno = errno;
- errno = 0;
- switch (sc)
- {
- case SYS_ARG:
- args[arg_index++] = context->regs[0].word << 16 | context->regs[1].word;
- break;
- case SYS_exit:
- context->exception = SIM_DONE;
- ret = args[0];
- arg_index = 0;
- break;
- case SYS_close:
- ret = close ((int) (args[0]));
- arg_index = 0;
- break;
- case SYS_creat:
- ret = creat (aptr (args[0]), args[1]);
- arg_index = 0;
- break;
- case SYS_isatty:
- ret = isatty (args[0]);
- arg_index = 0;
- break;
- case SYS_open:
- ret = open (aptr (args[0]), args[1], args[2]);
- arg_index = 0;
- break;
- case SYS_lseek:
- ret = lseek (args[0], (off_t) args[1], args[2]);
- arg_index = 0;
- break;
- case SYS_read:
- ret = read (args[0], aptr (args[1]), args[2]);
- arg_index = 0;
- break;
- case SYS_write:
- ret = write (args[0],aptr (args[1]), args[2]);
- arg_index = 0;
- break;
- case SYS_time:
- {
- int dst = args[0];
-
- ret = time (0);
- if (dst)
- {
- put_long_mem_da (context,
- sitoptr (dst), ret);
- }
- retnext = ret;
- ret = retnext >> 16;
- arg_index = 0;
- }
- break;
- case SYS_fstat:
- {
- int buf;
- struct stat host_stat;
- fd = args[0];
- buf = sitoptr (args[1]);
- ret = fstat (fd, &host_stat);
- buf = put_short (context, buf, host_stat.st_dev);
- buf = put_short (context, buf, host_stat.st_ino);
- /* FIXME: Isn't mode_t 4 bytes? */
- buf = put_short (context, buf, host_stat.st_mode);
- buf = put_short (context, buf, host_stat.st_nlink);
- buf = put_short (context, buf, host_stat.st_uid);
- buf = put_short (context, buf, host_stat.st_uid);
- buf = put_short (context, buf, host_stat.st_rdev);
- buf = put_long (context, buf, host_stat.st_size);
- buf = put_long (context, buf, host_stat.st_atime);
- arg_index = 0;
- } break;
- default:
- case SYS_link:
- context->exception = SIM_BAD_SYSCALL;
- arg_index = 0;
- break;
- }
- context->regs[2].word = ret;
- context->regs[3].word = retnext;
- context->regs[5].word = errno;
-
-
- /* support for the stdcall calling convention */
- context->regs[6].word = retnext;
- context->regs[7].word = ret;
-
- errno = olderrno;
-}
-
-#undef get_word_mem_da
-
-int
-get_word_mem_da (context, addr)
- sim_state_type *context;
- int addr;
-{
- return (get_byte_mem_da (context, addr) << 8) | (get_byte_mem_da (context, addr + 1));
-
-}
-
-#undef get_word_reg
-int
-get_word_reg (context, reg) sim_state_type
-* context;
- int reg;
-{
- return context->regs[reg].word;
-}
-
-#ifdef LOG
-int log[64 * 1024];
-
-#endif
-
-void
-tm_store_register (regno, value)
- int regno;
- int value;
-{
- switch
- (regno)
- {
- case REG_PC:
- the_state.sometimes_pc = value;
- break;
-
- default:
- put_word_reg (&the_state, regno, value);
- }
-}
-
-void
-swap_long (buf, val)
- char *buf;
- int val;
-{
- buf[0] = val >> 24;
- buf[1] = val >> 16;
- buf[2] = val >> 8;
- buf[3] = val >> 0;
-}
-
-void
-swap_word (buf, val)
- char *buf;
- int val;
-{
- buf[0] = val >> 8;
- buf[1] = val >> 0;
-}
-
-void
-tm_fetch_register (regno, buf)
- int regno;
- char *buf;
-{
- switch
- (regno)
- {
- case REG_CYCLES:
- swap_long (buf, the_state.cycles);
- break;
- case REG_INSTS:
- swap_long (buf, the_state.insts);
- break;
- case
- REG_TIME:
- swap_long (buf, the_state.ticks);
- break;
- case REG_PC:
- swap_long (buf, the_state.sometimes_pc);
- break;
- case REG_SP:
- {
- if (sim_z8001_mode)
- {
- swap_long (buf, get_long_reg (&the_state, 14));
- }
- else
- {
- swap_long (buf, get_word_reg (&the_state, 15));
- }
- }
- break;
- case
- REG_FP:
- {
- if (sim_z8001_mode)
- {
- swap_long (buf, get_long_reg
- (&the_state, 10));
- }
- else
- {
- swap_long (buf,
- get_word_reg (&the_state, 10));
- }
- }
- break;
- default:
- {
- swap_word (buf,
- get_word_reg (&the_state, regno));
- }
- }
-}
-
-void
-tm_resume (step)
- int step;
-{
- int now = get_now ();
- struct op_info
- *p;
- int word;
- int pc;
- extern int (*(sfop_table[])) ();
- extern int (*(bfop_table[])) ();
- int (*((*table))) ();
- sim_state_type *context = &the_state;
-
- if (step)
- {
- context->exception = SIM_SINGLE_STEP;
- }
- else
- {
- context->exception = 0;
- }
-
- pc = context->sometimes_pc;
- if (sim_z8001_mode)
- {
- table = bfop_table;
- pc = MAP_PHYSICAL_TO_LOGICAL (pc);
- }
- else
- {
- table = sfop_table;
- }
-
-
- do
- {
- word = get_word_mem_da (context, pc);
- p = op_info_table + word;
-
-#ifdef LOG
- log[word]++;
-#endif
- pc = table[p->exec] (context, pc, word);
- context->insts++;
-
- }
- while (!context->exception);
-
-
-
- context->sometimes_pc = MAP_LOGICAL_TO_PHYSICAL (pc);
- context->ticks += get_now () - now;
-}
-
-int
-tm_signal ()
-{
- return the_state.exception;
-}
-
-void
-tm_info_print (x)
- sim_state_type *x;
-{
- double timetaken = (double) x->ticks / (double) now_persec ();
- double virttime = x->cycles / 4.0e6;
-
- printf ("instructions executed : %9d\n", x->insts);
- printf ("cycles counted : %9d \n", x->cycles);
- printf ("cycles / inst : %9.1f \n", (double) x->cycles / (double) x->insts);
- printf ("virtual time taked (at 4 Mhz) : %9.1f \n", virttime);
- printf ("real time taken : %9.1f \n", timetaken);
-
- if (timetaken)
- {
- printf ("virtual instructions per second : %9.1f\n", x->insts / timetaken);
- printf ("emulation speed : %9.1f%%\n", virttime / timetaken * 100.0);
- }
-#ifdef LOG
- {
- extern int quick[];
-
- for (i = 0; quick[i]; i++)
- {
- log[quick[i]] += 100000;
- }
- }
-
- for (i = 0; i < 64 * 1024; i++)
- {
- if (log[i])
- {
- printf (" /*%7d*/ 0x%x,\n", log[i], i);
- }
- }
-#endif
-
-}
-
-int
-sim_trace (sd)
- SIM_DESC sd;
-{
- int i;
- char buffer[10];
- int r;
-
- printf ("\n");
- for (r = 0; r < 16; r++)
- {
- int m;
-
- printf ("r%2d", r);
- printf ("=%04x ", get_word_reg (&the_state,
- r));
- for (m = -4; m < 8; m++)
- {
- if (m == 0)
- printf (">");
- printf ("%04x ",
- get_word_mem_da (&the_state, (0xfffe & get_word_reg (&the_state, r)) + m * 2));
- }
- printf ("\n");
- }
-
- printf ("\n");
- printf ("%9d %9d %08x ", the_state.cycles,
- the_state.insts, the_state.sometimes_pc);
-
- for (i = 0; i < 6; i++)
- {
- buffer[i] = get_byte_mem_da (&the_state,
- the_state.sometimes_pc + i);
- }
-
- print_insn_z8001 (the_state.sometimes_pc, buffer, stdout);
- printf
- ("\n");
- tm_resume (1);
- if (the_state.exception != SIM_SINGLE_STEP)
- return 1;
- return 0;
-}
-
-void
-tm_state (x)
- sim_state_type *x;
-{
- *x = the_state;
-}
-
-void
-tm_exception (x)
- int x;
-{
- the_state.exception = x;
-}
-
-int
-tm_read_byte (x)
- int x;
-{
- x &= 0x3f00ffff;
- return sim_read_byte (&the_state, x);
-}
-
-void
-tm_write_byte (x, y)
- int x, y;
-{
- x &= 0x3f00ffff;
- sim_write_byte (&the_state, x, y);
-}
-
-#define SIGN(x) ((x) & MASK)
-normal_flags_32(context,d,sa,sb,sub)
-sim_state_type *context;
-unsigned int d;
-unsigned int sa;
-unsigned int sb;
-unsigned int sub;
-{
-#undef MASK
-#define MASK (1<<31)
- context->broken_flags = 0;
- if (sub)
- PSW_CARRY = sa < sb;
- else
- PSW_CARRY = d < sa;
- if (sub)
- PSW_OVERFLOW = (SIGN(sa) != SIGN(sb)) && (SIGN(d) == SIGN(sb));
- else
- PSW_OVERFLOW = (SIGN(sa) == SIGN(sb)) && (SIGN(d) != SIGN(sb));
-
- PSW_SIGN = ((int)d) <0;
- PSW_ZERO = d == 0;
-}
-
-normal_flags_16(context,d,sal,sbl,sub)
-sim_state_type *context;
-unsigned int d;
-unsigned int sal;
-unsigned int sbl;
-unsigned short int sub;
-{
- unsigned short sa = sal;
- unsigned short sb = sbl;
-#undef MASK
-#define MASK (1<<15)
- context->broken_flags = 0;
- if (sub)
- PSW_CARRY = sal < sbl;
- else
- PSW_CARRY = (d & 0x10000) != 0;
-
- if (sub)
- PSW_OVERFLOW = (SIGN(sa) != SIGN(sb)) && (SIGN(d) == SIGN(sb));
- else
- PSW_OVERFLOW = (SIGN(sa) == SIGN(sb)) && (SIGN(d) != SIGN(sb));
-
- PSW_SIGN = ((short int)d) <0;
- PSW_ZERO = ((short)d) == 0;
-}
-
-normal_flags_8(context,d,sa,sb,sub)
-sim_state_type *context;
-unsigned char d;
-unsigned char sa;
-unsigned char sb;
-unsigned char sub;
-{
-#undef MASK
-#define MASK (1<<7)
- context->broken_flags = 0;
- if (sub)
- PSW_CARRY = sa < sb;
- else
- PSW_CARRY = d < sa;
- if (sub)
- PSW_OVERFLOW = (SIGN(sa) != SIGN(sb)) && (SIGN(d) == SIGN(sb));
- else
- PSW_OVERFLOW = (SIGN(sa) == SIGN(sb)) && (SIGN(d) != SIGN(sb));
- PSW_SIGN = ((char)d) <0;
- PSW_ZERO = d == 0;
-}
-
-
-static int
-is_cond_true (context, c)
- sim_state_type *context;
- int c;
-{
- switch (c)
- {
- case T:
- return 1;
- case F:
- return 0; /* F */
- case LE:
- return (PSW_ZERO | (PSW_SIGN ^ PSW_OVERFLOW)) & 1; /*LE */
- case GT:
- return (~(PSW_ZERO | (PSW_SIGN ^ PSW_OVERFLOW))) & 1; /*GT */
- case 0x5:
- return (PSW_SIGN & 1); /* sign */
- case 0xd:
- return (~(PSW_SIGN)) & 1; /* not sign */
- case 0x3:
- return ((PSW_CARRY | PSW_ZERO) & 1); /* ule*/
- case UGT:
- return ((~(PSW_CARRY | PSW_ZERO)) & 1); /* ugt */
- case 0x4:
- return (PSW_OVERFLOW & 1);/* overflow */
- case 0xc:
- return (~(PSW_OVERFLOW)) & 1; /* not overflow */
- case LT:
- return (PSW_SIGN ^ PSW_OVERFLOW) & 1; /* LT */
- case GE:
- return (~(PSW_SIGN ^ PSW_OVERFLOW)) & 1; /* GE */
- case EQ:
- return (PSW_ZERO) & 1; /* zero */
- case NE:
- return ((~PSW_ZERO) & 1); /* not zero */
- case 0x7:
- return (PSW_CARRY) & 1; /* carry */
- case 0xf:
- return (~PSW_CARRY) & 1; /* not carry */
- default:
- abort ();
- }
-}
-
-int
-COND (context, c)
- sim_state_type *context;
- int c;
-{
- if (c == 8)
- return 1;
-
- /* We can calculate what the flags would have been by
- looking at the src and dst and size of the operation */
-
- if (context->broken_flags)
- {
- int slow = 0;
- int size;
- int dst;
- int srca;
- int srcb;
- int mask;
- int ans;
-
- /* see if we can short-cut the nasty flag calcs */
-
- switch (size = context->size)
- {
- default:
- abort();
- return 0;
- case 8:
- srca = (char) (context->srca);
- srcb = (char) (context->srcb);
- dst = (char) (context->dst);
- mask = 0xff;
- break;
- case 16:
- srca = (short) (context->srca);
- srcb = (short) (context->srcb);
- dst = (short) (context->dst);
- mask = 0xffff;
- break;
- case 32:
- srca = (long) (context->srca);
- srcb = (long) (context->srcb);
- dst = (long) (context->dst);
- mask = 0xffffffff;
- break;
- }
-
- switch (c)
- {
- case T:
- return 1;
- case F:
- return 0;
- case EQ:
- return !dst;
- case NE:
- return dst;
- case GT:
- ans = ((dst)) > 0;
- if (slow)
- {
- if (is_cond_true (context, c) != ans)
- abort ();
- }
- return ans;
- case LE:
- ans = ((dst)) <= 0;
- if (slow)
- {
- if (is_cond_true (context, c) != ans)
- abort ();
- }
- return ans;
- case GE:
- ans = ((dst)) >= 0;
- if (slow)
- {
- if (is_cond_true (context, c) != ans)
- abort ();
- }
- return ans;
- case LT:
- ans = ((dst)) < 0;
- if (slow)
- {
- if (is_cond_true (context, c) != ans)
- abort ();
- }
- return ans;
- default:
- break;
- }
-
- /* Can't fake it, we'll have to work out the flags the
- hard way */
-
- makeflags (context, mask);
- }
-
- /* don't know how to fake a test, inspect the flags
- the hard way */
-
- return is_cond_true (context, c);
-}
diff --git a/sim/z8k/syscall.h b/sim/z8k/syscall.h
deleted file mode 100644
index 489cd5f088c..00000000000
--- a/sim/z8k/syscall.h
+++ /dev/null
@@ -1,43 +0,0 @@
-/* system call numbers
- Copyright (C) 1992, 1993 Free Software Foundation, Inc.
-
-This file is part of Z8KSIM
-
-Z8KSIM is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-Z8KSIM is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License
-along with Z8KZIM; if not, write to the Free Software
-Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
-
-
-#define SYS_exit 1
-#define SYS_fork 2
-#define SYS_read 3
-#define SYS_write 4
-#define SYS_open 5
-#define SYS_close 6
-#define SYS_wait4 7
-#define SYS_creat 8
-#define SYS_link 9
-#define SYS_unlink 10
-#define SYS_execv 11
-#define SYS_chdir 12
-#define SYS_mknod 14
-#define SYS_chmod 15
-#define SYS_chown 16
-#define SYS_lseek 19
-#define SYS_getpid 20
-#define SYS_isatty 21
-#define SYS_fstat 22
-#define SYS_time 23
-
-
-#define SYS_ARG 24
diff --git a/sim/z8k/tconfig.in b/sim/z8k/tconfig.in
deleted file mode 100644
index 8dc0c322c5a..00000000000
--- a/sim/z8k/tconfig.in
+++ /dev/null
@@ -1,13 +0,0 @@
-/* z8k target configuration file. */
-
-/* Define this if the simulator supports profiling.
- See the mips simulator for an example.
- This enables the `-p foo' and `-s bar' options.
- The target is required to provide sim_set_profile{,_size}. */
-/* #define SIM_HAVE_PROFILE */
-
-/* Define this if the simulator uses an instruction cache.
- See the h8/300 simulator for an example.
- This enables the `-c size' option to set the size of the cache.
- The target is required to provide sim_set_simcache_size. */
-/* #define SIM_HAVE_SIMCACHE */
diff --git a/sim/z8k/tm.h b/sim/z8k/tm.h
deleted file mode 100644
index 4527ff9304d..00000000000
--- a/sim/z8k/tm.h
+++ /dev/null
@@ -1,192 +0,0 @@
-/* tm.h
- Copyright (C) 1992, 1993 Free Software Foundation, Inc.
-
-This file is part of Z8KSIM
-
-Z8KSIM is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-Z8KSIM is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License
-along with Z8KZIM; if not, write to the Free Software
-Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
-
-#ifndef _TM_H
-#define _TM_H
-
-#ifdef __FOOBEYGNUC__
-typedef SFtype __attribute__ ((mode (SF)));
-typedef DFtype __attribute__ ((mode (DF)));
-
-typedef int HItype __attribute__ ((mode (HI)));
-typedef int SItype __attribute__ ((mode (SI)));
-
-typedef unsigned int UHItype __attribute__ ((mode (HI)));
-typedef unsigned int USItype __attribute__ ((mode (SI)));
-#else
-typedef float SFtype;
-typedef double DFtype;
-typedef short int HItype;
-typedef long int SItype;
-typedef unsigned short UHItype ;
-typedef unsigned int USItype ;
-#endif
-
-typedef struct UDIstruct
-{
- USItype high;
- USItype low;
-} UDItype;
-
-#define BIG_ENDIAN_HOST
-typedef unsigned int sim_phys_addr_type;
-typedef unsigned int sim_logical_addr_type;
-
-#define PAGE_POWER 23 /* only one pages */
-
-#define MAP_PHYSICAL_TO_LOGICAL(x) (((x >> 8) & 0x7f0000) | (x & 0xffff))
-#define MAP_LOGICAL_TO_PHYSICAL(x) (((x <<8) & 0x7f000000) | (x & 0xffff))
-#define REG_PC 17
-#define REG_CYCLES 18
-#define REG_INSTS 19
-#define REG_TIME 20
-#define REG_FP 21
-#define REG_SP 22
-#define REG_CCR 16
-
-#define SET_REG(x,y) set_reg(x,y)
-#define SINGLE_STEP 1
-
-#define PSW_CARRY context->carry
-#define PSW_OP context->op
-#define PSW_OVERFLOW context->overflow
-#define PSW_SIGN context->sign
-#define PSW_ZERO context->zero
-#define GET_PC() context->pc
-#define SET_PC(x) context->pc = x
-
-struct op_info
-{
- short int exec;
-};
-
-extern struct op_info op_info_table[];
-
-typedef union
-{
- unsigned short int word;
-
-}
-
-borw_type;
-
-typedef struct state_struct
-{
- unsigned short *memory;
- int carry;
- int sign;
- int zero;
- int overflow;
- int op;
- int cycles;
-
- borw_type regs[16];
-
- sim_phys_addr_type sometimes_pc;
-#ifdef __GNUC__
- volatile
-#endif
- int exception;
-
-#define iwords_0 iwords0
-#define iwords_1 iwords1
-#define iwords_2 iwords2
-#define iwords_3 iwords3
-
-#define ibytes_0 (iwords_0>>8)
-#define ibytes_1 (iwords_0&0xff)
-#define ibytes_2 (iwords_1>>8)
-#define ibytes_3 (iwords_1& 0xff)
-#define ibytes_4 (iwords_2>>8)
-
- int insts;
- int ticks;
-
- int next_inst;
- int broken_flags;
-
- int srca;
- int srcb;
- int dst;
- int size;
-}
-
-sim_state_type;
-
-#define CMP_FLAGS 100
-#define TST_FLAGS 101
-#endif
-
-extern int get_word_mem_da PARAMS((sim_state_type *context, int addr));
-extern int get_word_reg PARAMS((sim_state_type *context, int reg));
-extern void support_call PARAMS((sim_state_type *context, int sc));
-extern void tm_exception PARAMS((int x));
-extern int tm_read_byte PARAMS((int x));
-extern int tm_signal PARAMS((void));
-extern void tm_state PARAMS((sim_state_type *x));
-extern void tm_write_byte PARAMS((int x, int y));
-extern void bfop_bad1 PARAMS(());
-extern int fail PARAMS((sim_state_type *context, int v));
-extern void fop_bad PARAMS((sim_state_type *context));
-extern void sfop_bad1 PARAMS(());
-extern void swap_long PARAMS((char *buf, int val));
-extern void swap_word PARAMS((char *buf, int val));
-extern void tm_fetch_register PARAMS((int regno, char *buf));
-extern void tm_info_print PARAMS((sim_state_type *x));
-extern void tm_resume PARAMS((int step));
-extern void tm_store_register PARAMS((int regno, int value));
-
-
-#ifndef __GNUC__
-/* If were using gnuc then these will be inlined, so the prototypes
- won't be right */
-long int sitoptr PARAMS((long int si));
-long int ptrtosi PARAMS((long int ptr));
-void put_long_reg PARAMS((sim_state_type *context, int reg, int val));
-void put_quad_reg PARAMS((sim_state_type *context, int reg, int val1, int val2));
-void put_word_reg PARAMS((sim_state_type *context, int reg, int val));
-SItype get_long_reg PARAMS((sim_state_type *context, int reg));
-void put_byte_reg PARAMS((sim_state_type *context, int reg, int val));
-int get_byte_reg PARAMS((sim_state_type *context, int reg));
-void put_word_mem_da PARAMS((sim_state_type *context, int addr, int value));
-unsigned char get_byte_mem_da PARAMS((sim_state_type *context, int addr));
-void put_byte_mem_da PARAMS((sim_state_type *context, int addr, int value));
-SItype get_long_mem_da PARAMS((sim_state_type *context, int addr));
-void put_long_mem_da PARAMS((sim_state_type *context, int addr, int value));
-int get_word_mem_ir PARAMS((sim_state_type *context, int reg));
-void put_word_mem_ir PARAMS((sim_state_type *context, int reg, int value));
-int get_byte_mem_ir PARAMS((sim_state_type *context, int reg));
-void put_byte_mem_ir PARAMS((sim_state_type *context, int reg, int value));
-int get_long_mem_ir PARAMS((sim_state_type *context, int reg));
-void put_long_mem_ir PARAMS((sim_state_type *context, int reg, int value));
-void put_long_mem_x PARAMS((sim_state_type *context, int base, int reg, int value));
-void put_word_mem_x PARAMS((sim_state_type *context, int base, int reg, int value));
-void put_byte_mem_x PARAMS((sim_state_type *context, int base, int reg, int value));
-int get_word_mem_x PARAMS((sim_state_type *context, int base, int reg));
-int get_byte_mem_x PARAMS((sim_state_type *context, int base, int reg));
-int get_long_mem_x PARAMS((sim_state_type *context, int base, int reg));
-int COND PARAMS((sim_state_type *context, int c));
-void NORMAL_FLAGS PARAMS((sim_state_type *context, int size, int dst, int srca, int srcb));
-void TEST_NORMAL_FLAGS PARAMS((sim_state_type *context, int size, int dst));
-void put_ptr_long_reg PARAMS((sim_state_type *context, int reg, int val));
-long int get_ptr_long_reg PARAMS((sim_state_type *context, int reg));
-long int get_ptr_long_mem_ir PARAMS((sim_state_type *context, int reg));
-long int get_ptr_long_mem_da PARAMS((sim_state_type *context, long int addr));
-void put_ptr_long_mem_da PARAMS((sim_state_type *context, long int addr, long int ptr));
-#endif
diff --git a/sim/z8k/writecode.c b/sim/z8k/writecode.c
deleted file mode 100644
index 8b4c868edea..00000000000
--- a/sim/z8k/writecode.c
+++ /dev/null
@@ -1,2011 +0,0 @@
-
-/* generate instructions for Z8KSIM
- Copyright (C) 1992, 1993 Free Software Foundation, Inc.
-
-This file is part of Z8KSIM
-
-Z8KSIM is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-Z8KSIM is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License
-along with Z8KZIM; if not, write to the Free Software
-Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
-
-/* This program generates the code which emulates each of the z8k
- instructions
-
- code goes into three files, tc-gen1.h, tc-gen2.h and tc-gen3.h.
- which file being made depends upon the options
-
- -1 tc-gen1.h contains the fully expanded code for some selected
- opcodes, (those in the quick.c list)
-
- -2 tc-gen2.h contains a list of pointers to functions, one for each
- opcode. It points to functions in tc-gen3.h and tc-gen1.h
- depending upon quick.c
-
- -3 tc-gen3.h contains all the opcodes in unexpanded form.
-
- -b3 tc-genb3.h same as -3 but for long pointers
-
- -m regenerates list.c, which is an inverted list of opcodes to
- pointers into the z8k dissassemble opcode table, it's just there
- to makes things faster.
- */
-
-/* steve chamberlain
- sac@cygnus.com */
-
-#include "config.h"
-
-#include <ansidecl.h>
-#include <stdio.h>
-#ifdef HAVE_STDLIB_H
-#include <stdlib.h>
-#endif
-#ifdef HAVE_STRING_H
-#include <string.h>
-#else
-#ifdef HAVE_STRINGS_H
-#include <strings.h>
-#endif
-#endif
-
-#define NICENAMES
-
-#define DEFINE_TABLE
-#include "../opcodes/z8k-opc.h"
-
-#define NOPS 500
-
-#define DIRTY_HACK 0 /* Enable if your gcc can't cope with huge tables */
-extern short z8k_inv_list[];
-struct opcode_value
-{
- int n;
- struct opcode_value *next;
-};
-
-#define NICENAMES
-int BIG;
-
-static char *reg_names[] =
-{"bad", "src", "dst", "aux_a", "aux_b", "aux_r", "aux_x"};
-
-#define IS_DST(x) ((x & 0xf) == 2)
-#define IS_SRC(x) ((x & 0xf)==1)
-#define SIZE_ADDRESS (BIG ? 8 : 4) /* number of nibbles in a ptr*/
-
-static int file;
-static int makelist;
-
-static int nibs = 0;
-
-static char *current_size;
-static char *current_name;
-static char current_word0[40];
-static char current_byte0[40];
-static char current_byte1[40];
-static int indent;
-static char *p;
-static char *d;
-
-struct opcode_value *list[NOPS];
-
-static opcode_entry_type *
-lookup_inst (what)
- int what;
-{
- if (makelist)
- {
-
- int nibl_index;
- int nibl_matched;
- unsigned short instr_nibl;
- unsigned short tabl_datum, datum_class, datum_value;
- char instr_nibbles[8];
-
- opcode_entry_type *ptr = z8k_table;
-
- nibl_matched = 0;
-
- instr_nibbles[3] = (what >> 0) & 0xf;
- instr_nibbles[2] = (what >> 4) & 0xf;
- instr_nibbles[1] = (what >> 8) & 0xf;
- instr_nibbles[0] = (what >> 12) & 0xf;
-
- while (ptr->name)
- {
- nibl_matched = 1;
- for (nibl_index = 0; nibl_index < 4 && nibl_matched; nibl_index++)
- {
- instr_nibl = instr_nibbles[nibl_index];
-
- tabl_datum = ptr->byte_info[nibl_index];
- datum_class = tabl_datum & CLASS_MASK;
- datum_value = ~CLASS_MASK & tabl_datum;
-
- switch (datum_class)
- {
- case CLASS_BIT_1OR2:
- if (datum_value != (instr_nibl & ~0x2))
- nibl_matched = 0;
- break;
-
- case CLASS_BIT:
- if (datum_value != instr_nibl)
- nibl_matched = 0;
- break;
- case CLASS_00II:
- if (!((~instr_nibl) & 0x4))
- nibl_matched = 0;
- break;
- case CLASS_01II:
- if (!(instr_nibl & 0x4))
- nibl_matched = 0;
- break;
- case CLASS_0CCC:
- if (!((~instr_nibl) & 0x8))
- nibl_matched = 0;
- break;
- case CLASS_1CCC:
- if (!(instr_nibl & 0x8))
- nibl_matched = 0;
- break;
- case CLASS_0DISP7:
- if (!((~instr_nibl) & 0x8))
- nibl_matched = 0;
- nibl_index += 1;
- break;
- case CLASS_1DISP7:
- if (!(instr_nibl & 0x8))
- nibl_matched = 0;
- nibl_index += 1;
- break;
- case CLASS_REGN0:
- if (instr_nibl == 0)
- nibl_matched = 0;
- break;
- default:
- break;
- }
- }
- if (nibl_matched)
- {
- return ptr;
- }
- ptr++;
- }
- return 0;
- }
- else
- {
-
- if (z8k_inv_list[what] < 0)
- return 0;
- return z8k_table + z8k_inv_list[what];
- }
-}
-
-static char *
-insn_4 (n)
- int n;
-{
- switch (n)
- {
- case 1:
- return "((iwords_0>>8) & 0xf)";
- case 2:
- return "((ibytes_1 >> 4) & 0xf)";
- case 3:
- return "((ibytes_1) & 0xf)";
- case 4:
- return "((ibytes_2>>4) & 0xf)";
- case 5:
- return "((ibytes_2) & 0xf)";
- case 6:
- return "((ibytes_3 >> 4) & 0xf)";
- case 7:
- return "((ibytes_3) & 0xf)";
- default:
- return "****";
- }
-}
-
-char *
-ptr_mode ()
-{
- if (BIG)
- {
- return "ptr_long";
- }
- return "word";
-}
-
-static
-char *
-ptr_size ()
-{
- if (BIG)
- return "4";
- return "2";
-}
-
-static char *
-reg_n (x)
- unsigned int x;
-{
- return reg_names[x & 0xf];
-}
-
-char *
-stack_ptr ()
-{
- return BIG ? "14" : "15";
-}
-
-char *
-mem ()
-{
-#if 0
- return BIG ? "segmem" : "unsegmem";
-#else
- return "mem";
-#endif
-}
-
-int
-match (a)
- char *a;
-{
- if (strncmp (p, a, strlen (a)) == 0)
- {
- p += strlen (a);
- return 1;
- }
- return 0;
-}
-
-static
-void
-sub (y)
- char *y;
-{
- sprintf (d, "%s", y);
- d += strlen (d);
-}
-
-static char *
-insn_16 (n)
- int n;
-{
- switch (n)
- {
- case 0:
- return "(iwords_0)";
- case 4:
- return "(iwords_1)";
- case 8:
- return "(iwords_2)";
- case 12:
- return "(iwords_3)";
- default:
- return "****";
- }
-}
-
-static
-char *
-insn_32 (n)
- int n;
-{
- switch (n)
- {
- case 0:
- return "((iwords_0<<16) | (iwords_1))";
- case 4:
- return "((iwords_1<<16) | (iwords_2))";
- case 8:
- return "((iwords_2<<16) | (iwords_3))";
- default:
- return "****";
- }
-}
-
-static char *
-size_name (x)
- int x;
-{
- switch (x)
- {
- case 8:
- return "byte";
- case 16:
- return "word";
- case 32:
- return "long";
- case 64:
- return "quad";
- }
- return "!!";
-}
-
-/*VARARGS*/
-void
-emit (string, a1, a2, a3, a4, a5)
- char *string;
- char* a1;
- char* a2;
- char* a3;
- char* a4;
- char* a5;
-{
- int indent_inc = 0;
- int indent_dec = 0;
- int i;
- char buffer[1000];
-
- d = buffer;
- p = string;
-
- while (*p)
- {
- if (match ("<fop>"))
- {
- if (BIG)
- {
- sub ("bfop");
- }
- else
- {
- sub ("sfop");
- }
- }
- else if (match ("<iptr>"))
- {
- if (BIG)
- {
- switch (nibs)
- {
- case 4:
- sub ("(((iwords_1 << 8) | (iwords_2)) & 0x7fffff)");
- break;
- default:
- sub ("fail(context,124)");
- break;
- }
- }
- else
- {
- switch (nibs)
- {
- case 4:
- sub ("iwords_1");
- break;
- default:
- sub ("fail(context,123)");
- break;
- }
- }
- }
- else if (match ("<name>"))
- {
- sub (current_name);
- }
- else if (match ("<size>"))
- {
- sub (current_size);
- }
- else if (match ("<insn_4>"))
- {
- sub (insn_4 (nibs));
- }
- else if (match ("<insn_16>"))
- {
- sub (insn_16 (nibs));
- }
- else if (match ("<insn_32>"))
- {
- sub (insn_32 (nibs));
- }
- else if (match ("iwords_0"))
- {
- sub (current_word0);
- }
- else if (match ("ibytes_0"))
- {
- sub (current_byte0);
- }
- else if (match ("<ibytes_1>"))
- {
- sub (current_byte1);
- }
- else if (match ("<next_size>"))
- {
- if (strcmp (current_size, "word") == 0)
- sub ("long");
- if (strcmp (current_size, "byte") == 0)
- sub ("word");
- else if (strcmp (current_size, "long") == 0)
- sub ("quad");
- else
- abort ();
- }
- else if (match ("<addr_type>"))
- {
- if (BIG)
- sub ("unsigned long");
- else
- sub ("unsigned short");
- }
-
- else if (match ("<c_size>"))
- {
- if (strcmp (current_size, "word") == 0)
- sub ("short");
- else if (strcmp (current_size, "byte") == 0)
- sub ("char");
- else if (strcmp (current_size, "long") == 0)
- sub ("long");
- else
- abort ();
- }
-
- else if (match ("<pc>"))
- {
- sub ("pc");
- }
- else if (match ("<mem>"))
- {
- sub (mem ());
- }
- else if (match ("<sp>"))
- {
- sub (stack_ptr ());
- }
- else if (match ("<ptr_size>"))
- {
- sub (ptr_size ());
- }
- else if (match ("<ptr_mode>"))
- {
- sub (ptr_mode ());
- }
- else if (match ("<insn_8>"))
- {
- switch (nibs)
- {
- case 2:
- sub ("(iwords_0&0xff)");
- break;
- case 4:
- sub ("(iwords_1>>8)");
- break;
- case 6:
- sub ("(iwords_1&0xff)");
- break;
- case 8:
- sub ("(iwords_2>>8)");
- break;
- case 12:
- sub ("(/* WHO */iwords_3&0xff)");
- break;
- default:
- abort ();
- }
- }
- else
- {
- if (*p == '{')
- indent_inc++;
- if (*p == '}')
- indent_dec++;
- *d++ = *p;
- p++;
- }
- }
- *d++ = 0;
- indent -= indent_dec;
- for (i = 0; i < indent; i++)
- printf ("\t");
- indent += indent_inc;
- printf (buffer, a1, a2, a3, a4, a5);
-
-}
-
-/* fetch the lvalues of the operands */
-void
-info_args (p)
- opcode_entry_type *p;
-{
- unsigned int *s;
-
- int done_one_imm8 = 0;
-
- /* int done_read = 4;*/
- s = p->byte_info;
- nibs = 0;
- while (*s)
- {
- switch (*s & CLASS_MASK)
- {
- case CLASS_BIT_1OR2:
- emit ("register unsigned int imm_src=(<insn_4>& 2)?2:1;\n");
- break;
- case CLASS_BIT:
- /* Just ignore these, we've already decoded this bit */
- nibs++;
- break;
- case CLASS_REGN0:
- case CLASS_REG:
- /* this nibble tells us which register to use as an arg,
- if we've already gobbled the nibble we know what to use */
- {
- int regname = *s & 0xf;
-
- emit ("register unsigned int reg_%s=<insn_4>;\n",
- reg_names[regname]);
-
- nibs++;
- }
- break;
- case CLASS_ADDRESS:
- emit ("register unsigned base_%s=<iptr>;\n", reg_n (*s));
-
- nibs += SIZE_ADDRESS;
-
- break;
- case CLASS_01II:
- case CLASS_00II:
- emit ("register unsigned int imm_src=<insn_4>&0x2;\n");
- nibs++;
- break;
- case CLASS_FLAGS:
- emit ("register unsigned int imm_src=<insn_4>;\n");
- nibs++;
-break;
- case CLASS_IMM:
- /* Work out the size of the think to fetch */
-
- {
- switch (*s & ~CLASS_MASK)
- {
- case ARG_IMM16:
- emit ("register unsigned imm_src=<insn_16>;\n");
- nibs += 4;
- break;
- case ARG_IMM32:
- emit ("register unsigned int imm_src= %s;\n", insn_32 (nibs));
- nibs += 8;
- break;
- case ARG_IMM4:
- emit ("register unsigned int imm_src=<insn_4>;\n");
- nibs++;
- break;
- case ARG_IMM2:
- emit ("register unsigned int imm_src=<insn_4> & 0x2;\n");
- nibs++;
- break;
-
- case ARG_IMM4M1:
- emit ("register unsigned int imm_src=(<insn_4> + 1);\n");
- nibs++;
- break;
- case ARG_IMM_1:
- emit ("register unsigned int imm_src=1;\n");
- break;
- case ARG_IMM_2:
- emit ("register unsigned int imm_src=2;\n");
- break;
- case ARG_NIM8:
- emit ("register unsigned int imm_src=-<insn_8>;\n");
- nibs += 2;
- break;
- case ARG_IMM8:
- if (!done_one_imm8)
- {
- emit ("register unsigned int imm_src=<insn_8>;\n");
- nibs += 2;
- done_one_imm8 = 1;
- }
- break;
- default:
- emit ("register int fail%d=fail(context,1);\n", nibs);
- break;
- }
- break;
-
- case CLASS_DISP8:
- /* We can't use `(char)' since char might be unsigned.
- We can't use `(signed char)' because the compiler might be K&R.
- This seems safe, since it only assumes that bytes are 8
- bits. */
- emit ("register unsigned int oplval_dst=((ibytes_1 << (sizeof (int) * 8 - 8)) >> (sizeof (int) * 8 - 9)) + pc;\n");
-#if 0
- /* Original code: fails if characters are unsigned. */
- emit ("register unsigned int oplval_dst=(((char)ibytes_1)<<1) + pc;\n");
-#endif
- nibs += 2;
- break;
- case CLASS_CC:
- emit ("register unsigned int op_cc=<insn_4>;\n");
- nibs++;
- break;
- default:
- emit ("register int FAIL%d=fail(context,2);\n", nibs);
- break;
- }
- ;
- /* work out how to fetch the immediate value */
- }
-
- s++;
- }
-}
-
-void
-info_special (p, getdst, nostore, before, nosrc)
- opcode_entry_type *p;
- int *getdst;
- int *nostore;
- int *before;
- int *nosrc;
-{
- switch (p->opcode)
- {
- case OPC_exts:
- case OPC_extsb:
- case OPC_extsl:
- *nostore = 1;
- *nosrc = 1;
- break;
- case OPC_ldm:
- *nostore = 1;
- *nosrc = 1;
- break;
- case OPC_negb:
- case OPC_neg:
- case OPC_sla:
- case OPC_slab:
- case OPC_slal:
- case OPC_sda:
- case OPC_sdab:
- case OPC_sdal:
- case OPC_com:
- case OPC_comb:
- case OPC_adc:
- case OPC_sbc:
- case OPC_nop:
- case OPC_adcb:
- case OPC_add:
- case OPC_addb:
- case OPC_addl:
- case OPC_inc:
- case OPC_sub:
- case OPC_subb:
- case OPC_subl:
- case OPC_and:
- case OPC_andb:
- case OPC_xorb:
- case OPC_xor:
- break;
-
- case OPC_mult:
- case OPC_multl:
- case OPC_div:
- case OPC_divl:
-
- *nostore = 1;
- break;
-
- case OPC_testb:
- case OPC_test:
- case OPC_testl:
- case OPC_cp:
- case OPC_cpb:
- case OPC_cpl:
- case OPC_bit:
- *nostore = 1;
- *before = 0;
- break;
-
- case OPC_bpt:
- case OPC_jr:
- case OPC_jp:
- case OPC_ret:
- case OPC_call:
- case OPC_tcc:
- *nosrc = 1;
- *nostore = 1;
- *before = 1;
- break;
- case OPC_sc:
- *nostore = 1;
- *before = 0;
- break;
- case OPC_clrb:
- case OPC_clr:
- *before = 1;
- *nosrc = 1;
- break;
- case OPC_ldi:
- case OPC_ldib:
- case OPC_lddb:
- case OPC_ldd:
-
- *before = 1;
- *nostore = 1;
- *nosrc = 1;
- break;
- case OPC_ldk:
- case OPC_ld:
- case OPC_ldb:
- case OPC_ldl:
- *before = 1;
- *getdst = 0;
- break;
- case OPC_push:
- case OPC_pushl:
- case OPC_pop:
- case OPC_popl:
- *before = 1;
- *getdst = 0;
- break;
- case OPC_lda:
- *nosrc = 1;
- break;
- }
-}
-
-/* calculate the lvalues required for the opcode */
-void
-info_lvals (p)
- opcode_entry_type *p;
-{
- /* emit code to work out lvalues, if any */
- unsigned int *i = p->arg_info;
-
- while (*i)
- {
- current_name = reg_n (*i);
- current_size = size_name (p->type);
- switch (*i & CLASS_MASK)
- {
- case CLASS_X:
- /* address(reg) */
- emit ("register <addr_type> oplval_<name>= ((base_<name> + (short)get_word_reg(context,reg_<name>)) & 0xffff) + (base_<name> & ~0xffff);\n");
- break;
- case CLASS_IR:
- /* Indirect register */
- emit ("register int oplval_<name> = get_<ptr_mode>_reg(context,reg_<name>);\n");
- break;
- case CLASS_DA:
- emit ("register int oplval_<name>=base_<name>;\n");
- break;
- case CLASS_IMM:
- case CLASS_REG_WORD:
- case CLASS_REG_LONG:
- case CLASS_REG_BYTE:
- case CLASS_PR:
- break;
- case CLASS_BA:
- emit ("register int oplval_<name> = get_<ptr_mode>_reg(context,reg_<name>) + (short)(imm_src);\n");
- break;
- case CLASS_BX:
- emit ("register int oplval_<name> = get_<ptr_mode>_reg(context,reg_<name>)\n");
- emit (" + get_word_reg(context,reg_aux_x);\n");
- break;
- }
- i++;
- }
-}
-
-/* emit code to fetch the args from calculated lvalues */
-int allregs;
-void
-info_fetch (p, getdst)
- opcode_entry_type *p;
- int getdst;
-{
- unsigned int *i = p->arg_info;
- int had_src = 0;
-
- allregs = 1;
- while (*i)
- {
-
- current_name = reg_n (*i);
- current_size = size_name (p->type);
- switch (*i & CLASS_MASK)
- {
- case CLASS_X:
- case CLASS_IR:
- case CLASS_BA:
- case CLASS_BX:
- case CLASS_DA:
- if (!getdst && IS_DST (*i))
- break;
- emit ("register int op_<name>= get_<size>_<mem>_da(context,oplval_<name>);\n");
- allregs = 0;
- break;
- case CLASS_IMM:
- if (!had_src)
- {
- if (p->opcode == OPC_out ||
- p->opcode == OPC_outb ||
- p->opcode == OPC_sout ||
- p->opcode == OPC_soutb)
- {
- /* The imm is a dest here */
- emit ("register int op_dst = imm_src;\n");
- }
- else
- {
- emit ("register int op_src = imm_src;\n");
- }
- }
- break;
- case CLASS_REG_QUAD:
- if (!getdst && IS_DST (*i))
- break;
- had_src |= IS_SRC (*i);
- emit ("UDItype op_<name> ;\n");
-
- break;
- case CLASS_REG_WORD:
- if (!getdst && IS_DST (*i))
- break;
- had_src |= IS_SRC (*i);
- emit ("register int op_<name> = get_word_reg(context,reg_<name>);\n");
- break;
-
- case CLASS_REG_LONG:
- if (!getdst && IS_DST (*i))
- break;
- had_src |= IS_SRC (*i);
- emit ("register int op_<name> = get_long_reg(context,reg_<name>);\n");
- break;
- case CLASS_REG_BYTE:
- if (!getdst && IS_DST (*i))
- break;
- had_src |= IS_SRC (*i);
- emit ("register int op_<name> = get_byte_reg(context,reg_<name>);\n");
- break;
- }
- i++;
- }
-}
-
-static void
-normal_flags (p, s, neg)
- opcode_entry_type *p;
- char *s;
-{
- emit (" %s;\n", s);
- emit ("NORMAL_FLAGS(context,%d, tmp, op_dst, op_src,%d); \n", p->type,neg);
-}
-
-static void
-test_normal_flags (p, s, opt)
- opcode_entry_type *p;
- char *s;
- int opt;
-{
- emit (" %s;\n", s);
- if (0 && opt)
- {
- emit ("context->broken_flags = TST_FLAGS;\n");
- emit ("context->size = %d;\n", p->type);
- }
- else
- {
- emit ("TEST_NORMAL_FLAGS(context,%d, tmp); \n", p->type);
- }
-
-}
-
-static void
-optimize_normal_flags (p, s,neg)
- opcode_entry_type *p;
- char *s;
-{
- emit (" %s;\n", s);
-#if 0
- emit ("context->broken_flags = CMP_FLAGS;\n");
-#else
- emit ("NORMAL_FLAGS(context,%d, tmp, op_dst, op_src,%d); \n", p->type, neg);
-#endif
-}
-
-static
-void
-jp (p)
- opcode_entry_type *p;
-{
-
- emit ("if(op_cc == 8 || COND(context,op_cc)) pc = oplval_dst;\n");
-}
-
-static void
-jr (p)
- opcode_entry_type *p;
-{
- emit ("if(op_cc == 8 || COND(context,op_cc)) pc = oplval_dst;\n");
-}
-
-static void
-ret (p)
- opcode_entry_type *p;
-{
- emit ("if(op_cc == 8 || COND(context,op_cc))\n{\n");
- emit ("pc = get_<ptr_mode>_<mem>_ir(context,<sp>);\n");
- emit ("put_<ptr_mode>_reg(context,<sp>, get_<ptr_mode>_reg(context,<sp>) + <ptr_size>);\n");
- emit ("};\n");
-}
-
-static void
-call (p)
- opcode_entry_type *p;
-{
- emit ("put_<ptr_mode>_reg(context,<sp>,tmp = get_<ptr_mode>_reg(context,<sp>) - <ptr_size>);\n");
- emit ("put_<ptr_mode>_<mem>_da(context,tmp, pc);\n");
- emit ("pc = oplval_dst;\n");
-}
-
-static void
-push (p)
- opcode_entry_type *p;
-{
- emit ("tmp = op_src;\n");
- emit ("oplval_dst -= %d;\n", p->type / 8);
- emit ("put_<ptr_mode>_reg(context,reg_dst, oplval_dst);\n");
-}
-
-static void
-pop (p)
- opcode_entry_type *p;
-{
- emit ("tmp = op_src;\n");
- emit ("put_<ptr_mode>_reg(context,reg_src, oplval_src + %d);\n", p->type / 8);
-}
-
-static void
-ld (p)
- opcode_entry_type *p;
-{
- emit ("tmp = op_src;\n");
-}
-
-static void
-sc ()
-{
- emit ("support_call(context,imm_src);\n");
-}
-
-static void
-bpt ()
-{
- emit ("pc -=2; \n");
- emit ("context->exception = SIM_BREAKPOINT;\n");
-}
-
-static void
-ldi (p, size, inc)
- opcode_entry_type *p;
- int size;
- int inc;
-{
- int dinc = (size / 8) * inc;
-
- current_size = size_name (size);
- emit ("{ \n");
- emit ("int type = %s;\n", insn_4 (7));
- emit ("int rs = get_<ptr_mode>_reg(context,reg_src);\n");
- emit ("int rd = get_<ptr_mode>_reg(context,reg_dst);\n");
- emit ("int rr = get_word_reg(context,reg_aux_r);\n");
- emit ("do {\n");
- emit ("put_<size>_<mem>_da(context,rd, get_<size>_<mem>_da(context,rs));\n");
- emit ("rd += %d;\n", dinc);
- emit ("rs += %d;\n", dinc);
- emit ("rr --;\n");
- emit ("context->cycles += 9;\n");
- emit ("} while (!type && rr != 0 && context->exception <= 1);\n");
- emit ("if (context->exception>1) pc -=4;\n");
- emit ("put_<ptr_mode>_reg(context,reg_src, rs);\n");
- emit ("put_<ptr_mode>_reg(context,reg_dst, rd);\n");
- emit ("put_word_reg(context,reg_aux_r, rr);\n");
- emit ("}\n");
-
-}
-
-static void
-shift (p, arith)
- opcode_entry_type *p;
- int arith;
-{
-
- /* We can't use `(char)' since char might be unsigned.
- We can't use `(signed char)' because the compiler might be K&R.
- This seems safe, since it only assumes that bytes are 8 bits. */
- emit ("op_src = (op_src << (sizeof (int) * 8 - 8)) >> (sizeof (int) * 8 - 8);\n");
-#if 0
- /* Original code: fails if characters are unsigned. */
- emit ("op_src = (char)op_src;\n");
-#endif
- emit ("if (op_src < 0) \n");
- emit ("{\n");
- emit ("op_src = -op_src;\n");
- emit ("op_dst = (%s <c_size>)op_dst;\n", arith ? "" : "unsigned");
- emit ("tmp = (%s op_dst) >> op_src;\n", arith ? "" : "(unsigned)");
- emit ("context->carry = op_dst >> (op_src-1);\n", p->type);
- emit ("}\n");
- emit ("else\n");
- emit ("{\n");
- emit ("tmp = op_dst << op_src;\n");
- emit ("context->carry = op_dst >> (%d - op_src);\n", p->type);
- emit ("}\n");
- emit ("context->zero = (<c_size>)tmp == 0;\n");
- emit ("context->sign = (int)((<c_size>)tmp) < 0;\n");
- emit ("context->overflow = ((int)tmp < 0) != ((int)op_dst < 0);\n");
- emit ("context->cycles += 3*op_src;\n");
- emit ("context->broken_flags = 0;\n");
-
-}
-
-static void
-rotate (p, through_carry, size, left)
- opcode_entry_type *p;
- int through_carry;
- int size;
- int left;
-{
-
- if (!left)
- {
- emit ("while (op_src--) {\n");
- emit ("int rotbit;\n");
- emit ("rotbit = op_dst & 1;\n");
- emit ("op_dst = ((unsigned)op_dst) >> 1;\n");
-
- if (through_carry)
- {
- emit ("op_dst |= context->carry << %d;\n", size - 1);
- }
- else
- {
- emit ("op_dst |= rotbit << %d;\n", size - 1);
- }
- emit ("context->carry = rotbit;\n");
- emit ("}\n");
- }
- else
- {
- emit ("while (op_src--) {\n");
- emit ("int rotbit;\n");
-
- emit ("rotbit = (op_dst >> (%d))&1;\n", size - 1);
- emit ("op_dst <<=1;\n");
- if (through_carry)
- {
- emit ("if (context->carry) op_dst |=1;\n");
- }
- else
- {
- emit ("if (rotbit) op_dst |= 1;\n");
- }
- emit ("context->carry = rotbit;\n");
- emit ("}\n");
- }
- emit ("tmp = (<c_size>)op_dst;\n");
- emit ("context->zero = tmp == 0;\n");
- emit ("context->sign = (int)tmp < 0;\n");
- emit ("context->overflow = ((int)tmp < 0) != ((int)op_dst < 0);\n");
- emit ("context->cycles += 3*op_src;\n");
- emit ("context->broken_flags = 0;\n");
-
-}
-
-static void
-adiv (p)
- opcode_entry_type *p;
-{
- emit ("if (op_src==0)\n");
- emit ("{\n");
- emit ("context->exception = SIM_DIV_ZERO;\n");
- emit ("}\n");
- emit ("else\n");
- emit ("{\n");
-
- if (p->type == 32)
- {
- emit ("op_dst.low = (int)get_long_reg(context,reg_dst+2);\n");
- emit ("op_dst.high = (int)get_long_reg(context,reg_dst+0);\n");
-#ifdef __GNUC__
- emit ("tmp = (((long long)op_dst.high << 32) + (op_dst.low)) / (int)op_src;\n");
-#else
- emit ("tmp = (long)op_dst.low / (int)op_src;\n");
-#endif
- emit ("put_long_reg(context,reg_dst+2, tmp);\n");
-#ifdef __GNUC__
- emit ("put_long_reg(context,reg_dst, (((long long)op_dst.high << 32) + (op_dst.low)) %% (int)op_src);\n");
-#else
- emit ("put_long_reg(context,reg_dst, (int)op_dst.low %% (int)op_src);\n");
-#endif
-
- emit ("context->zero = op_src == 0 || (op_dst.low==0 && op_dst.high==0);\n");
- }
- else
- {
- emit ("tmp = (long)op_dst / (short)op_src;\n");
- emit ("put_word_reg(context,reg_dst+1, tmp);\n");
- emit ("put_word_reg(context,reg_dst, (long) op_dst %% (short)op_src);\n");
- emit ("context->zero = op_src == 0 || op_dst==0;\n");
- }
-
- emit ("context->sign = (int)tmp < 0;\n");
- emit ("context->overflow =(tmp & 0x%x) != 0;\n",
- ~((1 << (p->type)) - 1));
- emit ("context->carry = (tmp & 0x%x) != 0;\n",
- ~(1 << (p->type)));
-
- emit ("}\n");
-}
-
-static void
-dobit (p)
-opcode_entry_type *p;
-{
- emit("context->zero = (op_dst & (1<<op_src))==0;\n");
- emit("context->broken_flags = 0;\n");
-}
-static void
-doset (p, v)
-opcode_entry_type*p;
-int v;
-{
- if (v)
- emit (" tmp = op_dst | (1<< op_src);\n");
- else
- emit (" tmp = op_dst & ~(1<< op_src);\n");
-}
-
-static void
-mult (p)
- opcode_entry_type *p;
-{
-
- if (p->type == 32)
- {
- emit ("op_dst.low = get_long_reg(context,reg_dst+2);\n");
- emit ("tmp = op_dst.low * op_src;\n");
- emit ("put_long_reg(context,reg_dst+2, tmp);\n");
- emit ("put_long_reg(context,reg_dst, 0);\n");
- }
- else
- {
- emit ("op_dst = get_word_reg(context,reg_dst+1);\n");
- emit ("tmp = op_dst * op_src;\n");
- emit ("put_long_reg(context,reg_dst, tmp);\n");
- }
-
- emit ("context->sign = (int)tmp < 0;\n");
- emit ("context->overflow =0;\n");
- emit ("context->carry = (tmp & 0x%x) != 0;\n", ~((1 << (p->type)) - 1));
- emit ("context->zero = tmp == 0;\n");
-
-}
-
-static void
-exts (p)
- opcode_entry_type *p;
-{
- /* Fetch the ls part of the src */
- current_size = size_name (p->type * 2);
-
- if (p->type == 32)
- {
- emit ("tmp= get_long_reg(context,reg_dst+2);\n");
- emit ("if (tmp & (1<<%d)) {\n", p->type - 1);
- emit ("put_long_reg(context,reg_dst, 0xffffffff);\n");
- emit ("}\n");
- emit ("else\n");
- emit ("{\n");
- emit ("put_long_reg(context,reg_dst, 0);\n");
- emit ("}\n");
- }
- else
- {
- emit ("tmp= get_<size>_reg(context,reg_dst);\n");
- emit ("if (tmp & (1<<%d)) {\n", p->type - 1);
- emit ("tmp |= 0x%x;\n", ~((1 << p->type) - 1));
- emit ("}\n");
- emit ("else\n");
- emit ("{\n");
-
- emit ("tmp &= 0x%x;\n", ((1 << p->type) - 1));
- emit ("}\n");
- emit ("put_<size>_reg(context,reg_dst, tmp);\n");
- }
-}
-doflag(on)
-int on;
-{
- /* Load up the flags */
- emit(" COND (context, 0x0b);\n");
-
- if (on)
- emit ("{ int on =1;\n ");
- else
- emit ("{ int on =0;\n ");
-
- emit ("if (imm_src & 1)\n");
- emit ("PSW_OVERFLOW = on;\n");
-
- emit ("if (imm_src & 2)\n");
- emit ("PSW_SIGN = on;\n");
-
- emit ("if (imm_src & 4)\n");
- emit ("PSW_ZERO = on;\n");
-
- emit ("if (imm_src & 8)\n");
- emit ("PSW_CARRY = on;\n");
- emit("}\n");
-
-
-}
-/* emit code to perform operation */
-void
-info_docode (p)
- opcode_entry_type *p;
-{
- switch (p->opcode)
- {
- case OPC_clr:
- case OPC_clrb:
- emit ("tmp = 0;\n");
- break;
- case OPC_ex:
- case OPC_exb:
-
- emit ("tmp = op_src; \n");
- if (allregs)
- {
- emit ("put_<size>_reg(context,reg_src, op_dst);\n");
- }
- else
- {
- emit ("put_<size>_mem_da(context, oplval_src, op_dst);\n");
- }
- break;
- case OPC_adc:
- case OPC_adcb:
- normal_flags (p, "op_src += COND(context,7);tmp = op_dst + op_src ;",0);
- break;
- case OPC_sbc:
- normal_flags (p, "op_src += COND(context,7);tmp = op_dst - op_src ;",1);
- break;
- case OPC_nop:
- break;
- case OPC_com:
- case OPC_comb:
- test_normal_flags (p, "tmp = ~ op_dst", 1);
- break;
- case OPC_and:
- case OPC_andb:
- test_normal_flags (p, "tmp = op_dst & op_src", 1);
- break;
- case OPC_xor:
- case OPC_xorb:
- test_normal_flags (p, "tmp = op_dst ^ op_src", 1);
- break;
- case OPC_or:
- case OPC_orb:
- test_normal_flags (p, "tmp = op_dst | op_src", 1);
- break;
- case OPC_sla:
- case OPC_slab:
- case OPC_slal:
- case OPC_sda:
- case OPC_sdab:
- case OPC_sdal:
- shift (p, 1);
- break;
-
- case OPC_sll:
- case OPC_sllb:
- case OPC_slll:
- case OPC_sdl:
- case OPC_sdlb:
- case OPC_sdll:
- shift (p, 0);
- break;
- case OPC_rl:
- rotate (p, 0, 16, 1);
- break;
- case OPC_rlb:
- rotate (p, 0, 8, 1);
- break;
- case OPC_rr:
- rotate (p, 0, 16, 0);
- break;
- case OPC_rrb:
- rotate (p, 0, 8, 0);
- break;
- case OPC_rrc:
- rotate (p, 1, 16, 0);
- break;
- case OPC_rrcb:
- rotate (p, 1, 8, 0);
- break;
- case OPC_rlc:
- rotate (p, 1, 16, 1);
- break;
- case OPC_rlcb:
- rotate (p, 1, 8, 1);
- break;
-
- case OPC_extsb:
- case OPC_exts:
- case OPC_extsl:
- exts (p);
- break;
- case OPC_add:
- case OPC_addb:
- case OPC_addl:
- case OPC_inc:
- case OPC_incb:
- optimize_normal_flags (p, "tmp = op_dst + op_src",0);
- break;
- case OPC_testb:
- case OPC_test:
- case OPC_testl:
- test_normal_flags (p, "tmp = op_dst", 0);
- break;
- case OPC_cp:
- case OPC_cpb:
- case OPC_cpl:
- normal_flags (p, "tmp = op_dst - op_src",1);
- break;
- case OPC_negb:
- case OPC_neg:
- emit ("{\n");
- emit ("int op_src = -op_dst;\n");
- emit ("op_dst = 0;\n");
- optimize_normal_flags (p, "tmp = op_dst + op_src;\n",1);
- emit ("}");
- break;
-
- case OPC_sub:
- case OPC_subb:
- case OPC_subl:
- case OPC_dec:
- case OPC_decb:
- optimize_normal_flags (p, "tmp = op_dst - op_src",1);
- break;
- case OPC_bpt:
- bpt ();
- break;
- case OPC_jr:
- jr (p);
- break;
- case OPC_sc:
- sc ();
- break;
- case OPC_jp:
- jp (p);
- break;
- case OPC_ret:
- ret (p);
- break;
- case OPC_call:
- call (p);
- break;
- case OPC_tcc:
- case OPC_tccb:
- emit ("if(op_cc == 8 || COND(context,op_cc)) put_word_reg(context,reg_dst, 1);\n");
- break;
- case OPC_lda:
- emit ("tmp = oplval_src; \n");
- /*(((oplval_src) & 0xff0000) << 8) | (oplval_src & 0xffff); \n");*/
- break;
- case OPC_ldk:
- case OPC_ld:
-
- case OPC_ldb:
- case OPC_ldl:
- ld (p);
- break;
- case OPC_ldib:
- ldi (p, 8, 1);
- break;
- case OPC_ldi:
- ldi (p, 16, 1);
- break;
-
- case OPC_lddb:
- ldi (p, 8, -1);
- break;
- case OPC_ldd:
- ldi (p, 16, -1);
- break;
-
- case OPC_push:
- case OPC_pushl:
- push (p);
- break;
-
- case OPC_div:
- case OPC_divl:
- adiv (p);
- break;
- case OPC_mult:
- case OPC_multl:
- mult (p);
- break;
- case OPC_pop:
- case OPC_popl:
- pop (p);
- break;
- case OPC_set:
- doset (p,1);
- break;
- case OPC_res:
- doset (p,0);
- break;
- case OPC_bit:
- dobit(p);
- break;
- case OPC_resflg:
- doflag(0);
- break;
- case OPC_setflg:
- doflag(1);
- break;
- default:
-
- emit ("tmp = fail(context,%d);\n", p->opcode);
- break;
- }
-}
-
-/* emit code to store result in calculated lvalue */
-
-void
-info_store (p)
- opcode_entry_type *p;
-{
- unsigned int *i = p->arg_info;
-
- while (*i)
- {
- current_name = reg_n (*i);
- current_size = size_name (p->type);
-
- if (IS_DST (*i))
- {
- switch (*i & CLASS_MASK)
- {
- case CLASS_PR:
- emit ("put_<ptr_mode>_reg(context,reg_<name>, tmp);\n");
- break;
- case CLASS_REG_LONG:
- case CLASS_REG_WORD:
- case CLASS_REG_BYTE:
-
- emit ("put_<size>_reg(context,reg_<name>,tmp);\n");
- break;
- case CLASS_X:
- case CLASS_IR:
- case CLASS_DA:
- case CLASS_BX:
- case CLASS_BA:
-
- emit ("put_<size>_<mem>_da(context,oplval_<name>, tmp);\n");
- break;
- case CLASS_IMM:
- break;
- default:
- emit ("abort(); ");
- break;
- }
-
- }
- i++;
- }
-}
-
-static
-void
-mangle (p, shortcut, value)
- opcode_entry_type *p;
- int shortcut;
- int value;
-{
- int nostore = 0;
- int extra;
- int getdst = 1;
- int before = 0;
- int nosrc = 0;
-
- emit ("/\052 %s \052/\n", p->nicename);
- if (shortcut)
- {
- emit ("int <fop>_%04x(context,pc)\n", value);
- }
- else
- {
- emit ("int <fop>_%d(context,pc,iwords0)\n", p->idx);
- emit ("int iwords0;\n");
- }
- emit ("sim_state_type *context;\n");
- emit ("int pc;\n");
- emit ("{\n");
- emit ("register unsigned int tmp;\n");
- if (shortcut)
- {
- emit ("register unsigned int iwords0 = 0x%x;\n", value);
- }
-
- /* work out how much bigger this opcode could be because it's large
- model */
- if (BIG)
- {
- int i;
-
- extra = 0;
- for (i = 0; i < 4; i++)
- {
- if ((p->arg_info[i] & CLASS_MASK) == CLASS_DA
- || (p->arg_info[i] & CLASS_MASK) == CLASS_X)
- extra += 2;
- }
- }
- else
- {
- extra = 0;
- }
- printf (" /* Length %d */ \n", p->length + extra);
- switch (p->length + extra)
- {
- case 2:
- emit ("pc += 2\n;");
- break;
- case 4:
- emit ("register unsigned int iwords1 = get_word_mem_da(context,pc+2);\n");
- emit ("pc += 4;\n");
- break;
- case 6:
-
- emit ("register unsigned int iwords1 = get_word_mem_da(context,pc+2);\n");
- emit ("register unsigned int iwords2 = get_word_mem_da(context,pc+4);\n");
- emit ("pc += 6;\n");
- break;
- case 8:
- emit ("register unsigned int iwords1 = get_word_mem_da(context,pc+2);\n");
- emit ("register unsigned int iwords2 = get_word_mem_da(context,pc+4);\n");
- emit ("register unsigned int iwords3 = get_word_mem_da(context,pc+6);\n");
- emit ("pc += 8;\n");
- break;
- default:
- break;
-
- }
- emit ("context->cycles += %d;\n", p->cycles);
-
- emit ("{\n");
- info_args (p);
- info_special (p, &getdst, &nostore, &before, &nosrc);
-
- info_lvals (p);
- if (!nosrc)
- {
- info_fetch (p, getdst);
- }
-
- if (before)
- {
- info_docode (p);
- }
- else
- {
- info_docode (p);
- }
- if (!nostore)
- info_store (p);
- emit ("}\n");
- emit ("return pc;\n");
- emit ("}\n");
-}
-
-void
-static
-one_instruction (i)
- int i;
-{
- /* find the table entry */
- opcode_entry_type *p = z8k_table + i;
-
- if (!p)
- return;
- mangle (p, 0, 0);
-}
-
-void
-add_to_list (ptr, value)
- struct opcode_value **ptr;
- int value;
-{
- struct opcode_value *prev;
-
- prev = *ptr;
- *ptr = (struct opcode_value *) malloc (sizeof (struct opcode_value));
-
- (*ptr)->n = value;
- (*ptr)->next = prev;
-}
-
-void
-build_list (i)
- int i;
-{
- opcode_entry_type *p = lookup_inst (i);
-
- if (!p)
- return;
- add_to_list (&list[p->idx], i);
-}
-
-int
-main (ac, av)
- int ac;
- char **av;
-{
- int i;
- int needcomma = 0;
-
- makelist = 0;
-
- for (i = 1; i < ac; i++)
- {
- if (strcmp (av[i], "-m") == 0)
- makelist = 1;
- if (strcmp (av[i], "-1") == 0)
- file = 1;
- if (strcmp (av[i], "-2") == 0)
- file = 2;
- if (strcmp (av[i], "-3") == 0)
- file = 3;
- if (strcmp (av[i], "-b3") == 0)
- {
- file = 3;
- BIG = 1;
- }
-
- }
- if (makelist)
- {
-
- int i;
- needcomma = 0;
- printf ("short int z8k_inv_list[] = {\n");
-
- for (i = 0; i < 1 << 16; i++)
- {
- opcode_entry_type *p = lookup_inst (i);
-
- if(needcomma)
- printf(",");
- if ((i & 0xf) == 0)
- printf ("\n");
-
-#if 0
- printf ("\n /*%04x %s */", i, p ? p->nicename : "");
-#endif
-
- if (!p)
- {
- printf ("-1");
- }
- else
- {
- printf ("%d", p->idx);
- }
-
- if ((i & 0x3f) == 0 && DIRTY_HACK)
- {
- printf ("\n#ifdef __GNUC__\n");
- printf ("};\n");
- printf("short int int_list%d[] = {\n", i);
- printf ("#else\n");
- printf (",\n");
- printf ("#endif\n");
- needcomma = 0;
- }
- else
- needcomma = 1;
-
- }
- printf ("};\n");
- return 1;
- }
-
- /* First work out which opcodes use which bit patterns,
- build a list of all matching bit pattens */
- for (i = 0; i < 1 << 16; i++)
- {
- build_list (i);
- }
-#if DUMP_LIST
- for (i = 0; i < NOPS; i++)
- {
- struct opcode_value *p;
-
- printf ("%d,", i);
- p = list[i];
- while (p)
- {
- printf (" %04x,", p->n);
- p = p->next;
- }
- printf ("-1\n");
- }
-
-#endif
-
- if (file == 1)
- {
- extern int quick[];
-
- /* Do the shortcuts */
- printf (" /* SHORTCUTS */\n");
- for (i = 0; quick[i]; i++)
- {
- int t = quick[i];
-
- mangle (z8k_table + z8k_inv_list[t],
- 1,
- t);
- }
- }
- if (file == 3)
- {
- printf (" /* NOT -SHORTCUTS */\n");
- for (i = 0; i < NOPS; i++)
- {
- if (list[i])
- {
- one_instruction (i);
- }
- else
- {
- emit ("int <fop>_%d(context,pc)\n", i);
- printf ("sim_state_type *context;\n");
- printf ("int pc;\n");
- emit ("{ <fop>_bad1();return pc; }\n");
- }
- }
- emit ("int <fop>_bad() ;\n");
-
- /* Write the jump table */
- emit ("int (*(<fop>_table[]))() = {");
- needcomma = 0;
- for (i = 0; i < NOPS; i++)
- {
- if (needcomma)
- printf (",");
- emit ("<fop>_%d\n", i);
- needcomma = 1;
- if ((i & 0x3f) == 0 && DIRTY_HACK)
- {
- printf ("#ifdef __GNUC__\n");
- printf ("};\n");
- emit ("int (*(<fop>_table%d[]))() = {\n", i);
- printf ("#else\n");
- printf (",\n");
- printf ("#endif\n");
- needcomma = 0;
- }
- }
- emit ("};\n");
- }
-
- if (file == 2)
- {
- extern int quick[];
- /* Static - since it's too be to be automatic on the apollo */
- static int big[64 * 1024];
-
- for (i = 0; i < 64 * 1024; i++)
- big[i] = 0;
-
- for (i = 0; quick[i]; i++)
- {
-#if 0
-
- printf ("extern int <fop>_%04x();\n", quick[i]);
-#endif
-
- big[quick[i]] = 1;
- }
-
- for (i = 0; i < NOPS; i++)
- {
-#if 0
- printf ("extern int fop_%d();\n", i);
-#endif
- }
-#if 0
- printf ("extern int fop_bad();\n");
-#endif
- printf ("struct op_info op_info_table[] = {\n");
- for (i = 0; i < 1 << 16; i++)
- {
- int inv = z8k_inv_list[i];
- opcode_entry_type *p = z8k_table + inv;
-
- if (needcomma)
- printf (",");
-#if 0
- if (big[i])
- {
- printf ("<fop>_%04x", i);
- }
- else
-#endif
- if (inv >= 0)
- {
- printf ("%d", inv);
- }
- else
- printf ("400");
- if (inv >= 0)
- {
- printf (" /* %04x %s */\n", i, p->nicename);
- }
- else
- {
- printf ("\n");
- }
- needcomma = 1;
- if ((i & 0x3f) == 0 && DIRTY_HACK)
- {
- printf ("#ifdef __GNUC__\n");
- printf ("}; \n");
- printf ("struct op_info op_info_table%d[] = {\n", i);
- printf ("#else\n");
- printf (",\n");
-
- printf ("#endif\n");
- needcomma = 0;
- }
- }
- printf ("};\n");
-
- }
- return 0;
-}
-
-char *
-insn_ptr (n)
- int n;
-{
- if (BIG)
- {
- abort ();
- }
-
- switch (n)
- {
- case 4:
- return "iwords_1";
- default:
- return "fail(context,123)";
- }
-}
-
-/* work out if the opcode only wants lvalues */
-int
-lvalue (p)
- opcode_entry_type *p;
-{
- switch (p->opcode)
- {
- case OPC_lda:
- return 1;
- case OPC_call:
- case OPC_jp:
- return 1;
- default:
- return 0;
- }
-}
-
-int
-info_len_in_words (o)
- opcode_entry_type *o;
-{
- unsigned int *p = o->byte_info;
- int nibs = 0;
-
- while (*p)
- {
- switch (*p & CLASS_MASK)
- {
- case CLASS_BIT:
- case CLASS_REGN0:
- case CLASS_REG:
- case CLASS_01II:
- case CLASS_00II:
- nibs++;
- break;
- case CLASS_ADDRESS:
- nibs += SIZE_ADDRESS;
- break;
- case CLASS_IMM:
- switch (*p & ~CLASS_MASK)
- {
- case ARG_IMM16:
- nibs += 4;
- break;
- case ARG_IMM32:
- nibs += 8;
- break;
- case ARG_IMM2:
- case ARG_IMM4:
- case ARG_IMM4M1:
- case ARG_IMM_1:
- case ARG_IMM_2:
- case ARG_IMMNMINUS1:
- nibs++;
- break;
- case ARG_NIM8:
-
- case ARG_IMM8:
- nibs += 2;
- break;
- default:
- abort ();
- }
- break;
- case CLASS_DISP:
- switch (*p & ~CLASS_MASK)
- {
- case ARG_DISP16:
- nibs += 4;
- break;
- case ARG_DISP12:
- nibs += 3;
- break;
- case ARG_DISP8:
- nibs += 2;
- break;
- default:
- abort ();
- }
- break;
- case CLASS_0DISP7:
- case CLASS_1DISP7:
- case CLASS_DISP8:
- nibs += 2;
- break;
- case CLASS_BIT_1OR2:
- case CLASS_0CCC:
- case CLASS_1CCC:
- case CLASS_CC:
- nibs++;
- break;
- default:
- emit ("don't know %x\n", *p);
- }
- p++;
- }
-
- return nibs / 4; /* return umber of words */
-}